230786 001_Intel_Software_Handbook_1984 001 Intel Software Handbook 1984
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SOFTWARE HANDBOOK
1984
Intel Corporation makes no warranty for the use of its products and assumes no
responsibility for any errors which may appear in this document nor does it make a
commitment to update the information contained herein.
Intel software products are copyrighted by and shall remain the property of Intel
Corporation. Use, duplication or disclosure is subject to restrictions stated in
Intel's software license, or as defined in ASPR 7-104.9(a) (9). lritel Corporation
assumes no responsibility for the use of any circuitry other than circuitry
embodied in an Intel product. No other circuit patent licenses are implied.
No part of this document may be copied or reproduced in any form or by any
means without the prior written consent of Intel Corporation.
The following are trademarks of Intel Corporation and may only be used to identify
Intel products:
t.
BITBUS, COMMputer, CREDIT, Data Pipeline, GENIUS, i, ICE, iCS, iDBp,
iDIS, 12 1CE, iLBX, i m , iMMX, Insite, Intel, intel, intelBOS, Intelevision,
inteligent Identifier, inteligent Programming, Intellec, Intellink, iOSP, iPDS,
iSBC, iSBX, iSDM, iSXM, Library tVianager, MCS, Megachassis, MICROMAINFRAME, MULTI BUS, MULTICHANNEL, MULTIMODULE, Plug-ABubble, PROMPT, Promware, QUEST, QUEX, Ripplemode, RMXl80, Rl:JPI,
Seamless, SOLO, SYSTEM 2000, and UPI, and the combination of ICE, iCS,
iRMX, iSBC, MCS, or UPI and a numerical suffix.
The following are trademarks of the companies indicated and may only be used to
identify products of the owners.
CP/M is a trademark of Digital Research, Inc.
DEC, DEC-10, DEC-20, PDP-H, DECnet, DECwriter, RSTS, and VAX are
trademarks of Digital Equipment Corporation.
MDS is an ordering code only and is not used as a product name or trademark.
MD&!! is a registered trademark of Mohawk Data Sciences Corporatio.n.
Microsoft is a trademark of Microsoft, Inc.
C>
Intel Corporation. 1983
Table
of Contents
CHAPTER 1
.
OVERVIEW
Introduction. . .. .. .. . . .. .. . . .. .. . .. . ... . .. . . .... ...... .. .. .. ... ... . . . .. ... .. .. ... . ..
1-1
CHAPTER 2
OPERATING SYSTEMS
Introduction ....................................................•.•...•••..... . . . . . .
8080/8085 Microprocessor Family
DATA SHEET
Digital Research Inc. CP/M 2.2 Operating System..................................
8086/8088 Microprocessor Family
DATA SHEETS
iRMX 86 Operating System ......................................................
iRMX 88 Real-Time Multitasking Executive ........................................
Preconfigured iRMX 86 Operating System ........................................
iOSP 86 iAPX 86/30 and iAPX 88/30 Support Package .............................
iMMX 800 MULTI BUS Message Exchange Software........................... .....
FACT SHEET
XENIX 286 Operating Systems ....................•..............................
APPLICATION NOTE
AP-130 Using Operating Systems Processor's to Simplify Microcomputer DeSigns ....
ARTICLE REPRINTS
AR-236 Let Operating Systems Aid in Component Designs .........................
AR-286 Software That Resides in Silicon ..........................................
AR-287 Putting Real-Time Operating Systems to Work .............................
AR-288 Intel's Matchmaking Strategy: Marry iRMX Operating
System with Hardware .•....•.....................•.....•........•..•....
AR-289 iRMX 86 Has Functionality, Configurability ................................
2-1
2-2
2-5
2-25
2-31
2-37
2-41
2-45
2-51
2-102
2-110
2-116
2-128
2-131
CHAPTER 3
TRANSLATORS AND UTILITIES FOR PROGRAM DEVELOPMENT
Introduction .......................................... , . .. ... .. .. ...•. .. . ... . . . . . . . .
MCS®-80/85 Microprocessor Family
DATA SHEETS
PUM 80 High Level Programming Language ......................................
FORTRAN 808080/8085 ANS FORTRAN 77 Intellec Resident Compiler. . . . . . . . . . . . . .
Microsoft, Inc. MACRO-80 Utility Software Package ...............•...............
Microsoft, Inc. BASIC-80 Interpreter Software Package ...•........................
Microsoft, Inc. Pascal-80 Software Package .......................................
iAPX 86, 88 Software Development Packages for Series II/PDS .....................
iAPX 86/88/186/188/286 Microprocessor Family
DATA SHEETS
PUM 86/88/186/188 Software Package ............................ 0>..............
Pascal 86/88 Software Package ........................••..........•.............
FORTRAN 86/88 Software Package ..............................................
C-86 C Compiler for the 8086 .......................•............................
8087 Software Support Package .............................•...................
8087 Support Library. . . . . . . . . . . . . • . . . . . . . . . . . . . . . . . . • . . . • . . . . . . . . . . . . . . . . . . . . . ..
8089 lOP Software Support Package ........•...........•........................
iAPX 286 Software Development Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
iAPX 286 Evaluation Package ....................................................
PUM 286 Software Package ...................•......................•..........
VAXlVMX Resident iAPX 86/88/186 Software Development Packages ................
iSDM 86 System Debug Monitor ....................................•............
iSDM 286 iAPX 286 System Debug Monitor .......................................
FACT SHEETS
iRMX Languages .................•.......••........•.....•................•.•.•
iRMX Operating Systems .................•............•...•..........•..........
XENIX Languages .....................•..•..................................,...
iii
3-1
3-3
3-6
3-10
3-12
3-15
3-18
3-28
3-32
3-35
3-39
3-43
3-46
3-50
3-53
3-58
3-60
3-64
3-71
3-76
3-79
3-84
3-90
inter
Single Chip Mlcrocontroller Software
DATA SHEETS
2920 Software Support Package ..................•......•.......•...•....•...... ' 3-94
MC5-48 Diskette-Based Software Support Package . ~ ....•••.•..•........•••.•••.•• 3-105
8051 Software Development Package ..•.........•....•...............•...•....... 3-107
PUM 51 Software ............................................................... 3-110
MCS-96 Software Support Package ....•...•..............•.......•.••......•.... ' 3-114
CHAPTER 4
PRODUCTIVITY TOOLS AND COMMUNICATION SOFTWARE
Introduction ..•..•..•..•.......••••.••••............••..•........•..••. ; • . . . . . . . . • . .
Program Development and Management Tools
,DATA SHEETS
PSCOPE High-Level Program Debugger .••.•.•..........•.•• . . . . . . . . . . . . . . • . . . • . .
Program Management Tools .......•..................................•..........
ISIS-II Software Toolbox ............................' .......,.....................
8086 Software Toolbox ...................................'.......................
AEDIT Text Editor ........................................................... ~ . .
CREDIT CRT-Based Text Editor. . . . . • . . . . . . . . . . . . . . . . . . . . . . . . . . . • . . . . . . . . . . . . . . . .
CommunlcaUon Software
DATA SHEETS
Mainframe Link for Distributed Development......................................
Intel Asynchronous Communications Link ......................•.................,
iNA 960 Network Software ......•................................................
NOS-II Electronic Mail ........................................................••
4-1
4-2
4-7
4-10
4-12
4-14
4-16
4-20
4-23
4-26
4-38
CHAPTERS
SYSTEM AND APPLICATIONS SOFTWARE
FACT SHEETS
XENIX Productivity Software Tools...............................................
iTPS Transaction Processing Systems Terminal Application
Processing System (iTAPS) .........................•..............•.........
iTPS Transaction Processing Systems Communications. . . . . . . . . . . . . . • . • . . . . . . . . . . .
System 2000 Database Management System Sperry (Univac) 1100 Series ............
5-1
5-9
5-12
5-16
CHAPTER 6
COMPONENT SOFTWARE
DATA SHEETS
80130/80130-2 iAPX 86/30, 88/30, 186/30, 188/30 iRMX 86
Operating System Processors ..............••...............................
80150/80150-2 iAPX 86/50, iAPX 88/50, 186/50, 188/50 CPIM 86
Operating Sys!em Processors ......•.•.•.....•.•... ,........................
6-1
6-23
CHAPTER 7
, USER LIBRARY
,
Introduction. • . . . . . . . . . . . . . . . . . . . . . . . . . . . . • . . . . . • . . . . . . . . . . . . . . . . . . . . . • . . . . . . . . . . . • .
User Library
Insite User's Prog(am Library ...............•...............•••..........•.......
Insite Submittal Requirements .........................•.•.......................
Insite Index of Program ................•.•.•..•......•.......•..........•. ,......
7-1
7-2
7-3
7-5
APPENDIX A
Software Standards...... ........ ......... .... .................. .......... ..............
A-1
APPENDIX B
Software Support... ............................................... .....................
iv
B-1
Software Handbook
Overview
1
inter
SOFTWARE HANDBOOK OVERVIEW
Welcome to the Intel Software Handbook. This handbook is a complete guide to the software products and
services offered by Intel.
Intel's software products follow the open systems strategy that allows Intel products to be purchased at the
customers' desired level of integration. Hence these products are available for component, board, or systems
applications. This open systems philosophy is backed by software standards that insure that the software can
operate at numerous levels of integration. These software standards are described in the appendix.
Software for Intel's products is available both from Intel and from Independent Software Vendors (ISVs). For a
complete listing of software available from ISVs, see the Intel Yellow Pages which is published annually by Intel.
This handbook describes software products that are available through Intel, consisting of Intel-developed and
ISV-developed products. Products that are offered by Intel have all been evaluated and tested to meet Intel's
quality standard. They are backed by an extensive support organization described in the appendix.
1-1
Operating Systems
2
OPERATING SYSTEMS
INTRODUCTION
The ability to convert advanced microprocessor technology into solutions for modern day problems begins with
effective and efficient designs for new hardware products and architecture. However, a most critical element in
the success of any microcomputer solution is the availability of a high quality, reliable operating system.
Without this software counterpart, the technological advances cannot be fully implemen,ted, nor their benefits
fully realized.
The classic role of the microcomputer operating system can be outlined by viewing its major functions and
purposes. The functions of the microcomputer operating system are threefold: 1) to manage system resources
and the allocation of these resources to users; 2) to provide automatic functions such as initialization and
start-up procedures; and 3) to provide an efficient, straightforward and consistent method for user programs to
interface with the hardware subsystems, including a simple and friendly human interface. Typically, the
operating systems have one of two main purposes. First, they can be used to develop a new software system
that runs on another machine. These systems are usually large and fairly sophisticated. ISIS and 'XENIX are
examples of such developmental operating systems. The second purpose for microcomputer operating
systems is directed toward the execution of software programs for targeted application. The largest number of
operating systems are of this type, including the RMX systems. The most critical requirement is for these
systems to be effective and efficient since they are usually small, fast systems dedicated to a specific real-time
application.
This rather neat and simple categorization of microcomputer operating systems, which has been useful in the
past, is quickly becoming blurred. The rapid developments in microcomputer technology have increased the
power and decreased the cost of microcomputers, allowing them to become applicable to the solution of a
broader variety and more sophisticated set of problems. Microcomputer systems must increasingly provide
such capabilities as multiprogramming, multitasking, multiprocessing, networking, as well as scheduling and
priority determination. As systems become more complex, they must still remain responsive to real-tim!
applications. Operating systems must be able to capitalize on the trends toward plaCing more and more
software into silicon. This trend is blurring the distinction between the hardware and software subsystems.
Microcomputer systems are also evolving to encompass both the developmental and target application
purposes into one system.
These dramatic changes in technology place additional demands on operating systems. We see operating
systems undergoing changes to consider the need for: 1) modularity and ease of configurability;
2) evolutionary, not revolutionary, path of growth; and 3) standardization in languages, networks and the
operating system itself. The first need is required to allow the system to be a powerful development tool yet
configurable to more specialized applications. The last two items are needed to provide protection of a firm's
software investment, including the option to move toward silicon software.
The operating systems and executives in this section are state-of-the-art microcomputer systems that have
taken to task the challenges posed by advancing microprocessor technology. These operating systems offer
the widest range of solutions with the highest quality and most future-oriented software available today.
Consequently, our customers can select the appropriately optimized option to achieve their price/pel10rmance
goals and give them time-to-market advantage over their competitors.
'XENIX is a trademark of Microsoft Corp.
2-1
DIGITAL RESEARCH INC.
CP/M* 2.2 OPERATING SYSTEM
• More than 1,000 commercially available
compatible software products
• High-performance, single-console
operating system
• Simple, reliable file system matched to
microcomputer resources
• Table-driven architecture allows field
reconfiguration to match a wide variety
of disk capacities and needs
• Extensive documentation covers all
facts of CP/M applications
• General-purpose subroutines and
table-driven data-access algorithms
provide a truly universal data
management system
• Upward compatibility from all previous
versions
CP/M 2.2 is a monitor control program for microcomputer system and application uses on InteI8080/8085-based
microcomputer (see the CP/M-86' Operating System data sheet for information on CP/M for Intel 8086/8088based systems). CP/M provides a general environment for program ex~cution, construction, storage, and
editing, along with. the program assembly and check-out facilities.
The CP/M monitor provides rapid access to programs through a comprehensive file management package. The
file subsystem supports a named file structure, allowing dynamic allocation of file space as well as sequential
and random file access. Using this system, a large number of distinct programs can be stored in both sourceand machine-executable form.
CP/M also supports a powerful context editor, Intel-compatible assembler, and debugger subsystems. Nearly all
personal software programs can be bought configured to run under CP/M, several of which are available from
Intel.
FEATURES
CP/M is logically divided into four distinct modules:
-Uses less than 4K of memory allowing plenty of
memory space for applications programs
-Uses less than 4K of memory
. BIOS-Basic 1/0 System
-Makes programs transportable from system to
system
-Provides primitive operations for access to disk
drives and interface to standard peripherals
(teletype, CRT, paper tape reader/punch, bubble
memory, and user-defined peripherals)
-Entry points include the following primitive
operations which can be programmatically
accessed:
-Allows user modification for tailoring to a particular hardware environment
BOOS-Basic Disk Operating System
SEARCH
Look for a particular disk file by
name
OPEN
Open a file for further operations
CLOSE
Close a file after processing
-Provides disk management for one to sixteen disk
drives containing independent file directories
RENAME
Chan,ge the name of a particular file
READ
Read a record from a particular file
-Implements disk allocation strategies for fully
dynamic file construct1on and minimization of
head movement acrOss the disk
WRITE
Write a record to a particular file
SELECT
Select a particular disk drive for
further operations
©INTEL CORPORATION. 1983
2-2
MAY 1983
ORDER NUMBER:210288-003
inter
DIGITAL RESEARCH, INC.
CP/M 2.2
CCP-Console Command Processor
ASM
-Provides primary user interface by reading and
interpreting commands entered through the
console
Fast 8080 Assembler-uses standard
Intel mnemonics and pseudo
operations with free-format input, and
conditional assembly features
DDT
Dynamic Debugging Tool-contains
an integral assembler/disassembler
module that lets the user patch,and
display memory in either assembler
mnemonic or hexadecimal form and
trace program execution with full
register and status display;
instructions can be executed between
breakpoints in real-time, or run fully
monitored, one instruction at a time
SUBMIT
Allows a group of CP/M commands to
be batched together and submitted to
the operating system by a single
command
STAT
-Programs created under CP/M can be checked out
by loading and executing these programs in
theTPA
Lists the number of bytes of storage
remaining on the currently logged
disks, provides statistical information
about particular files, and displays or
alters device assignments
LOAD
-User programs, loaded into the TPA, may use the
CCP area for the program's data area
Converts Intel hex format to absolute
binary, ready for direct load and
execution in the CP/M environment
SYSGEN
Creates new CP/M system disks for
back-up purposes
-Loads and transfers.control to transient programs,
such as assemblers, editors, and debuggers
-Processes built-in standard commands including:
ERA
Erase specified files
DIR
List file names in the directory
REN
Rename the specified file
SAVE
Save memory contents in a file
TYPE
Display the contents of a file on
the console
TPA-Transient Program Area
-Holds programs which are loaded from the disk
under command of the CCP
-Transient commands are specified in the same
manner as built-in commands
MOVCPM Provides regeneration of CP/M
systems for various memory
configurations and works in
conjunction with SYSGEN to provide
additional copies of CP/M
-Additional commands can be easily defined by the
user
-Defined transient commands include:
PIP
ED
Peripheral Interchange Program
-implements the basic media transfer
operations necessary to load, print,
punch, copy, and combine disk files;
PIP also performs various
reformatting and concatenation
functions. Formatting options include
parity-bit removal, case conversion,
Intel hex file validation, subfile
extraction, tab expansion, line number
generation, and pagination
BENEFITS
-Easy implementation on any computer configuration which uses an Intel 8080/8085 Central Processing Unit (see the CP/M-86 data sheet for CP/M
applications on the iAPX86 CPU)
-iPDS version supports bubble memory option as
an additional diskette drive. Also allows diskette
duplication with a single drive
Text Editor-allows creation and
modification of ASCII files using
extensive context editing commands:
string substitution, string search,
insert, delete and block move; ED
allows text to be located by context,
line number, or relative position with a
macro command for making extensive
text changes with a single command
line
-Extensive selection of CP/M-compatible programs
allows production and support of a comprehensive software package at low cost
-Field programmability for special-purpose operating system requirements
-Upward compatibility from previous versions of
CP/M release 1
2-3
AFN-02"'C
inter
DIGITAL RESEARCH, INC.
CP/M 2.2
-Provides field specification of one to sixteen logical drives, each containing up to eight megabytes
-Files may contain up to 65,536 records of 128 bytes
each but may not exceed the size of any single disk
-Each disk is designed for 64 distinct files-more
directory entries may be allocated if necessary
-Individual users are physically separated by user
numbers, with facilities for file copy operations
from one user area to another
-Relative-record random-access functions provide
direct access to any of the 65,536 records of an
eight-megabyte file
SPECIFICATIONS
Hardware Required
Shipping Media
-Model 800 with 720 kit
(Specify by Alpha Character when ordering.)
-OS 235 kit or MDS 225 with 720 kit (integral drive
supported except as system boot device)
B-double density
A-single density (IBM 3740/1 compatible)
-iPDS Personal Development System
Optional:
RAM up to 64K
F-double-sided, double density 5%" floppy (iPDS
format)
-Additional floppy disk drives
Order Code
-Single density via 201 controller
-Bubble memory and optional Shugart 460 5%"
disk drive for iPDS
Documentation Package
Title
CP/M 2.2 documentation consisting
of 7 manuals:
An Introduction to CP/M Features
and Facilities
CP/M 2.2 User's Guide
CP/M Assembler (ASM) User's
GUide
CP/M Dynamic Debugging Tool
(DDT) User's Guide
ED: A Context Editor for the CP/M
Disk System User's Manual
CP/M 2 Interface Guide
CP/M 2 Alteration Guide
Product Description
See Price List CP/M (Control Program for
Microcomputers) is a disk-based
operating system for the Intel
SOSO/SOS5-based systems. CP/M
provides a general environment for
program development, test, execution
and storage. CP/M storage is available
via a comprehensive, named-file
structure supporting both sequential
and random access. CP/M support
tools include a Text Editor, a
debugger, and an SOSO/SOS5
assembler.
SUPPORT:
Intel offers several levels of support for this product. depending on the system configuration in which it is used.
Please consult the price list for a detailed description of the support options available.
An Intel Software License required.
'CP/M is a registered trademark of Digital Research. Inc.
'CP/M-8S, MP/M, CP/NETand MP/NET are trademarks of Digital ResearCh, Inc.
2-4
AFN-02111C
iRMX™ 86
OPERATING SYSTEM
• Real-time processor management for
time-critical iAPX 86 and iAPX 88
applications
• Multi-terminal support with multi-user
human interface
• Broad range of device drivers included
for industry standard MULTIBUS®
peripheral controllers
• On-target system development with
Universal Development Interface (UDI)
• Configurable system size and function
for diverse application requirements
• Expandable to multi-processor systems
with iMMX™ 800 Message Exchange
Software
• All iRMX™ 86 code can be (P)ROM'ed
to support totally solid state designs
• Compatible operating system services
for iAPX 86/30 and 88/30 Operating
System Processors (iOSPTM 86)
• Extendable to iAPX 286 systems with
iRMX™ 286R option
• Powerful utilities for interactive
configuration and real-time debugging
The iRMX™ 86 Operating System is an easy-to-use, real-time, multi-tasking and muiti-programmming software
system designed to manage and extend the resources of iSBC® 86 and iSBC 88 Single Board Computers, as well
as other iAPX 86- and iAPX 88-based microcomputers. iRMX 86 functions are available in silicon with the iAPX 86/30
and 88/30 Operating System Processors, in a user configurable software package, and fully integrated into the
SYSTEM 86/300 Family of Microcomputer Systems. The Operating System provides a number of standard interfaces
that allow iRMX 86 applications to take advantage of industry standard device controllers, hardware components,
and a multitude of software packages developed by Independent Software Vendors (ISVs). Many high-performance
features extend the utility of iRMX 86 Systems into applications such as data collection, transaction processing, and
process control where immediate access to advances in VLSI technology is paramount. These systems may deliver
real-time performance and explicit control over resources; yet also support applications with multiple users needing
to simultaneously access terminals. The configurable layers of the System provide services ranging from interrupt
management and standard device drivers for many sophisticated controllers, to data-file maintenance commands
provided by a comprehensive multi-user human interface. By providing access to the standard Universal Development Interface (UDt) for each user terminal, Original Equipment Manufacturers (OEMs) can pass program development
and target application customization capabilities to their users.
HUMAN INTERFACE
USER APPLICATIONS
iRMXTM 86 VLSI Operating System
The toIowlng are trademarks of Intel CorporatIOn and may be used only to descnbe Intel products Intel, ICE, IMMX, IOSP, IRMX, ISse, ISex, ISXM, MULTIBUS, MULTICHANNEL and MULTI MODULE
Inlel Corporation assumes no responslblhty tor the use of any CircUitry other than CirCUitry embodied In an Intel product No other ClfCUIt patent hcenses are Implied
INTEL CORPORATION. 1983
2-5
January, 1983
Order Number' 210111-001
iRMX™ 86
The iRMX 86 Operating System is a complete set of
system software modules that' provide the res()urce
management functions needed by computer systems.
These management functions allow Original Equipment
Manufacturers (OEMs) to best use resources available
in microcomputer systems while getting their products
to market quickly, saving time and money. Engineers
are relieved of writing complex system software and can
concentrate instead on their application software.
Process Management
To implement multi-tasking application systems, programmers require a method of managing the different
processes of their application, and for allowing the processes to communicate with each other. The Nucleus
layer of the iRMX 86 System provides a number of facilities
to efficiently manage these processes, and to effectively
communicate between them. These facilities are provided
by system calls that manipulate data structures called
tasks, jobs, semaphores, regions, and mailboxes. The
iRMX 86 System refers to these structures as "objects".
This data sheet describes the major features of the
iRMX 86 Operating System. The benefits provided to
engineers who write application software and to users
who want to take advantage of improving microcomputer
price and performance are explained. The first section
outlines the system resource management functions of
the Operating System and describes several system
calls. The second section gives a detailed overview of
iRMX 86 features aimed at serving both the iRMX 86
system designer and programmer, as well as the end
users of the product into which the Operating System
is incorporated.
Tasks are the basic element of all applications built on
the iRMX 86 Operating System. Each task is an entity
capable of executing CPU instructions and issuing system calls in order to perform a function. Tasks are characterized by their register values (including those of an
optional 8087 Numeric Processor Extension), a priority
between 0 and 255, and the resources associated with
them.
Each iRMX 86 task in the system is scheduled for operation by the iRMX 86 nucleus. Figure 1 shows the five
states in which each task may be placed, and some examples of how a task may move from one state to another. The iRMX 86 nucleus ensures that each task is
placed in the correct state, defined by the events in its
external environment and by the task issuing system
calls. Each task has a priority to indicate its relative importance and need to respond to its environment. The
nucleus guarantees that the highest priority ready-to-run
task is the task that runs.
FUNCTIONAL DESCRIPTION
To take best advantage of iAPX 86 and 88 microprocessors in applications where the computer is required
to perform many functions simultaneously, the iRMX 86
Operating System provides a multiprogramming environment in which many independent, multi-tasking application programs may run. The flexibility of independent
environments allows application programmers to separately manage each application's resources during both
the development and test phases.
Jobs are used to define the operating environment of
a group of tasks. J09s effectively limit the scope of an
application by collecting all of its tasks and other objects
into one group. Because the environment for execution
of an application is defined by an iRMX 86 job, separate
applications can be efficiently developed by separate
development teams.
The resource management functions of the iRMX 86
System are supported by a number of configurable software layers. While many of the functions supplied by the
innermost layer, the Nucleus, are required by all systems, all other functions are optional. The I/O systems,
for example, need not be included in systems having no
secondary storage requirement. Each layer provides
functions that encourage application programmers to
use modular design techniques which aid in quick development of easily maintainable programs.
The iRMX 86 Operating System provides two primary
techniques for real-time event synchronization in mUltitask applications: regions and semaphores.
Regions are used to restrict access to critical sections
The components of the iRMX 86 Operating System provide both implicit and explicit management of system
resources. These resources include processor scheduling, up to one megabyte of system memory., up to 57
independent interrupt sources, all input and output devices, as well as' directory and data files contained on
mass storage ,devices and accessed by a number of independent users. Management of each of these system
resources and how the resources can be shared between
multiple processors and users is discussed in the following sections.
of code and data. Once the iRMX 86 Operating System
gives a task access to resources guarded by a region,
no other tasks may make use of the resources, and the
task is given protection against deletion and suspension.
Regions are typically used to protect data structures from
being simultaneously updated by multiple tasks.
Semaphores are used to provide mutual exclusion be-
tween tasks. They contain abstract "units" that are sent
between the tasks, and can be used to implement the
cooperative sharing of re~ources.
Or~er Number 210885-001
2-6
inter
iRMX™ 86
any task can gain access to the object by knowing its
name, and job environment that contains the directory.
Three example jobs are shown in Figure 2 to demon·
strate how two tasks can share an object that was not
known to the programmers at the time the tasks were
developed. Both Job 'A' and Job 'B' exist within the en·
vironment of the 'Root Job' that forms the foundation of
all iRMX 86 systems. Each job possesses a directory in
which tasks may catalog the name of an object. Sema·
phore 'RS', for example, is accessable by all tasks in the
system, because its name is cataloged in the directory
of the Root Job. Mailbox 'AN' can be used to transfer
objects between Tasks 'A2' and 'A3' because its token
is accessable in the object directory for Job 'A'
(Si
(9i
Table 1 lists the major functions of the iRMX 86 Nucleus
that manage system processes.
!
(10)
(NON EXISTENT)
SYSTEM ROOT JOB
NOT·ES:
(1) Task
(S
created
JOB A
JOB B
(2) Task becomes highest Priority ready task
TASK A1
(3) Task gets pre·empted by one with higher Priority
(0
TASK B1
MAILBOX
(4) Task calls SLEEP or task walts at an exchange
b
(5) Task sleep period has ended. message was sent to
waiting task or walt has ended
TASK 82
SEMAPHORE
(6) Task calis SUSPEND on self
(7) Task suspended by other than self
(8) Task suspended by other than self or a resume that
did not bring suspension depth to zero
OBJECT DIRECTORY
MAILBOX AM
MAILBOX AN
TASK A3
(9) Task was resumed by other task
(10) Task
IS
deleted
OBJECT DIRECTORY
TASK B2
OBJECT DIRECTORY
MAILBOX RM.l.QLA
SEMAPHORE RS.IQLJI
TASK B2
Figure 1. Task State Diagram
Multi-tasking applications must communicate information
and share system resources among cooperating tasks.
The iRMX 86 Operating System assigns a unique 16-bit
number, called a token, to each object created in the
System. Any task in possession of this token is able to
access the object. The iRMX 86 Nucleus allows tasks
to gain access to objects, and hence system resources,
at run-time with two additional mechanisms: mailboxes
and object directories.
Figure 2. Object Directories
Memory Management
Each job in an iRMX 86 System defines the amount of
the one megabyte of addressable memory to be used
by its tasks. The iRMX 86 Operating System manages
system memory and allows jobs to share this critical resource by providing another object type: segments.
Mailboxes are used by tasks wishing to share objects
with other tasks. A task may share an object by sending
the object's token via a mailbox. The receiving task can
check to see if a token is there, or can wait at the mailbox
until a token is present.
Segments are contiguous pieces of memory, between
16 Bytes and 64K Bytes in length, that exist within the
environment of the job in which they were created. Segments form the fundamental piece of system memory
used for task stacks, data storage, system buffers, loading
programs from secondary storage, passing information
between tasks, etc.
Object Directories are also used to make an object
available to other tasks. An object is made public by cataloging its token and name in a directory. In this manner,
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iRMX™86
Table 1. Process Management System Calls
System Call
Function Performed
RQ$CREATE$JOB
Creates an environment for a number of tasks and other objects, as well as creating an
initial task and its stack.
RQ$DELETE$JOB
Deletes a job and all the objects currently defined within its bounds. All memory used
is returned to the job from which the deleted job was created.
RQ$OFFSPRING
Provides a list of all the current jobs created by the specified job.
RQ$CATALOG$OBJECT
Enters a name and token for an object into the object directory of a job.
RQ$UNCATALOG$OBJECT
Removes an object's token and its name from a job's object directory.
RQ$LOOKUP$OBJECT
Returns a token for the object with the specified name found in the object directory of
the specified job.
RQ$GET$TYPE
Returns a code for the type of Object referred to by the specified token.
RQ$CREATE$MAILBOX
Creates a mailbox with queues for waiting tasks and objects with FIFO or PRIORITY
discipline.
RQ$DELETE$MAILBOX
Deletes a mailbox.
RQ$SEND$MESSAGE
Sends an object to a specified mailbox. If a task is waiting, the object is passed to the
appropriate task according to the queuing discipline. If no task is waiting, the object is
queued at the mailbox.
RQ$RECEIVE$MESSAGE
Attempts to receive an object token from a specified mailbox. The calling task may
choose to wait for a specified number of system time units if no token is available.
RQ$DISABLE$DELETION
Prevents the deletion of a specified object by increasing its disable count by one.
RQ$ENABLE$DELETION
Reduces the disable count of an object by one, and if zero, enables deletion of that
object.
RQ$FORCE$DELETE
Forces the deletion of a specified object if the disable count is either 0 or 1.
RQ$GREATE$TASK
Creates a task with the specified priority and stack area.
RQ$DELETE$TASK
Deletes a task from the system, and removes it from any queues in which it may be
waiting.
RQ$SUSPEND$TASK
Suspends the operation of a task. If the task is already suspended, its suspension
depth is increased by one.
RQ$RESUME$TASK
Resumes a task. If the task had been suspended multiple times, the suspension depth
is reduced by one, and it remains suspended.
I
RQ$SLEEP
Causes a task to enter the ASLEEP state for a specified number of system time units.
RQ$GET$TASK$TOKENS
Gets the token for the calling task or associated objects within its environment.
RQ$SET$PRIORITY
Dynamically alters the priority of the specified task.
RQ$GET$PRIORITY
Obtains the current priority of a specified task.
RQ$CREATE$REGION
Creates a region, with an associated queue of FIFO or PRIORITY ordering discipline.
RQ$DELETE$REGION
Deletes the specified region if it is not currently in use.
RQ$ACCEPT$CONTROL
Gains control of a region only if the region is immediately available.
RQ$RECEIVE$CONTROL
Gains control of a region. The calling task may specify the number of system time
• units it wishes to wait if the region is not immediately available.
RQ$SEND$CONTROL
Relinquishes control of a region.
RQ$CREATE$SEMAPHORE
Creates a semaphore.
RQ$DELETE$SEMAPHORE
Deletes a semaphore.
RQ$SEND$UNITS
Increases a semaphore counter by the specified number of units.
RQ$RECEIVE$UNITS
Attempts to gain a specified number of units from a semaphore. If the units are not
immediately available, the calling task may choose to wait.
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iRMX™ 86
The example in Figure 2 also demonstrates when information IS shared between Tasks 'A2' and 'A3'; 'A2'
only needs to create a segment, put the information in
the memory allocated, and send it via the Mailbox 'AM'
using the RQ$SEND$MESSAGE system call (see Table
1}.Task 'A3' would get the message by using the RQ$
RECEIVE$MESSAGE system call. The Figure also shows
how the receiving task could signal the sending task by
sending an acknowledgement via the second Mailbox
'AN'.
to make any iRMX 86 system call. While an interrupt task
is servicing an interrupt, interrupts of lower priority are
not allowed to pre-empt the system.
Table 3 shows the iRMX 86 System Calls provided to
manage interrupts.
INTERRUPT MANAGEMENT EXAMPLE
Figure 3 illustrates how the iRMX 86 Interrupt System
may be used to output strings of characters to a printer.
In the example, a mailbox named 'PRINT' is used by all
tasks in the system to queue messages to be printed.
Application tasks put the characters in segments that are
transmitted to the printer interrupt service task via the
PRINT Mailbox. Once printing is complete, the same interrupt task passes the messages on to another application
via the FINISHED Mailbox so that an operator message
can be displayed.
Each job is created with both maximum and minimum
limits set for its memory pool. Memory required by all
objects and resources created in the job is taken from
this pool. If more memory is required, a job may be allowed to borrow memory from the pool of its containing
job (the job from which it was created). In this manner,
initial jobs may efficienty allocate memory to jobs they
subsequently create, without exactly knowing their requirements.
The iRMX 86 Operating System supplies other memory
managment functions to search specific address ranges
for available memory. The System performs this search
at system initialization, and can be configured to ignore
non-existent memory and addresses reserved for 1/0
devices and other application requirements.
Table 2 lists the major system calls used to manage the
system memory.
Interrupt Management
.
.
.
Real-time systems, by their nature, must respond to
asynchronous and unpredictable events quickly. The
iRMX 86 Operating System uses interrupts and the eventdriven nucleus described earlier to give real-time response
to events. Use of a pre-emptive scheduling technique
ensures that the servicing high priority events always
take precedence over other system activities.
Figure 3. Interrupt Management Example
BASIC 110 SYSTEM
The Basic 110 System (BIOS) provides the direct access
to 110 devices needed by real-time applications. The
BIOS allows I/O functions to overlap other system functions. In this manner, application tasks make asynchronous calls to the iRMX 86 BIOS, and proceed to perform
other activities. When the 110 request must be completed
before an application can continue, the task waits at a
mailbox for the result of the operation.
The iRMX 86 Operating System gives applications the
flexibility to optimize either interrupt response time or
interrupt response capability by providing two tiers of Interrupt Management. These two distinct tiers are managed by Interrupt Handlers and Interrupt Tasks.
Interrupt Handlers are the first tier of interrupt service.
For small, simple functions, interrupt handlers are often
the most efficient means of responding to an event. They
provide faster response than interrupt tasks, but must
be kept simple since interrupts (except the iAPX 86 and
88 non-maskable interrupt) are masked during their execution. When extended interrupt service. is required, interrupt handlers "signal" a waiting interrupt task that,
in turn, performs more complicated functions.
Some system calls provided by the BIOS are listed in
Table 4.
The Basic 110 System communicates with peripheral devices through device drivers. These device drivers provide
the System with four basic functions needed to control
and communicate with devices: Initialize 110, Finish 110,
Queue 110, and Cancel 110. Using the device driver interface, users of non-standard devices may write custom
drivers compatible with the I/O System.
Interrupt Tasks are distinct tasks whose priority is associated with a hardware interrupt level. They are permitted
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iRMX™ 86
Table 2. Memory Management System Calls
Function Performed
System Call
RQSCREATESSEGMENT
Dynamically allocates a memory segtnent of the specified size.
RQSDELETESSEGMENT
Deletes the specified segment by deallocating the memory.
RQSGETSPOOLSATTRIBUTES
Returns attributes such as the minimum and maximum, as well as current size of
the memory in the environment of the calling task's job.
RQSGETSSIZE
Returns the size (in bytes) of a segment.
RQSSETSPOOLSMIN
Dynamically changes the minimum memory requirements of the job environment
containing the calling task.
Table 3. Interrupt Management System Calls
Function Performed
System Call
RQSSETSINTERRUPT
Assigns an interrupt handler and, if desired, an interrupt task to the specified interrupt
level. Usually the calling task becomes the interrupt task.
RQSRESETSINTERRUPT
Disables an interrupt level, and cancels the assignment of the interrupt handler for that
level. If an interrupt task was assigned, it is deleted.
RQSGETSLEVEL
Returns the number of the highest priority interrupt level currently being processed.
RQSSIGNALSINTERRUPT
Used by an interrupt handler to signal the associated interrupt task that an interrupt has
occurred.
RQSWAITSINTERRUPT
Used by an interrupt task to SLEEP until the associated interrupt handler signals the
occurrence of an interrupt.
RQSEXITSINTERRUPT
Used by an interrupt handler to relinquish control of the System.
RQSENABLE
Enables the hardware to accept interrupts from a specified level.
RQSDISABLE
Disables the hardware from accepting interrlolpts at or below a specified level.
Table 4. Key BIOS I/O Management System Calls
System Call
Function Performed
RQSASATTACHSFILE
Creates a Connection to an existing file.
RQSASCHANGESACCESS
Changes the types of accesses permitted to the specified user(s) for a specific file.
_
RQSASCLOSE
Closes the Connection to the specified file so that it may be used again, or so that
the type of access may be changed.
RQSASCREATESDIRECTORY
Creates a Named File used to store the names and locations of other Named Files.
RQSASCREATESFILE
Creates a data file with the specified access rights.
RQSASDELETESCONNECTION
Deletes the Connection to the specified file.
RQSASGETSFILESSTATUS
Returns the current status of a specified file.
RQSASOPEN
Opens a file for either read, write, or update access.
RQSASREAD
Reads a number of bytes from the current position in a specified file.
RQSASSEEK
Moves the current data pOinter of a Named or Physical file.
RQSASWRITE
Writes.a number of bytes at the current position in a file.
RQSWAITSIO
Synchronizes a task with the I/O System by causing it to wait for I/O operation
results.
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iRMX™86
files. Whereas the BIOS provides users with the basic
system calls needed for direct management of 1/0 resources, many users prefer to have the system perform
all the buttering and synchronization of 1/0 requests automatically. The EIOS allows users to access 1/0 devices
without having to write procedures for buffering data, or
to specify particular devices with constant device names.
The iRMX 86 Operating System includes a number of
device drivers to allow applications to use standard
USART serial communication devices, multiple CRTs
and keyboards, bubble memories, diskettes, disks, a
Centronics-type parallel printer, and many of Intel's
iSBC and iSBX™ device controllers (see Table 9). If an
application requires use of a non-standard device, users
need only write a device driver to be included with the
BIOS, and access it as if it were part of the standard
system. For most random-access devices, this job is
further simplified by using standard routines provided
with the System. Use of this technique ensures that applications can remain device independent.
By performing device buffering automatically, the iRMX
86 EIOS optimizes accesses to disks and other devices.
Often, when an application task asks the System to READ
a portion of a file, the System is able to respond immediately with the data it has read in advance of the request.
Similarly, the EIOS will not delay a task for writing data
to a device unless it is specifically told to, or if its output
buffers are filled.
MULTI-TERMINAL SUPPORT
The iRMX 86 Terminal Support provides line editing and
terminal control capabilities. The Terminal Support communicates with devices through simple drivers that do
only character 1/0 functions. Dynamic terminal reconfiguration is provided so that attributes such as terminal
type and line speed may be changed without modifying
the application or the Operating System. Dynamic configuration may be typed in, generated programmatically
or stored in a file and copied to a terminal 1/0 connection.
Logical file and device names are provided by the EIOS
to give applications complete file and device independence. Applications may send data to the 'line printer'
(:LP:) without needing to know which specific device will
be used as the printer. This logical name may, in fact,
not be a printer at all, but it could be a disk file that is
later scheduled for printing.
The EIOS uses the functions provided by the BIOS to
synchronize individual 1/0 requests with results returned
by device drivers. Most EIOS system calls are similar to
the BIOS calls, except that they appear to suspend the
operation of the calling task until the 1/0 requests are
completed.
The iRMX 86 Terminal Support provides automatic translation of control characters to specific control sequences
for each terminal. This translation enables applications
. using standard control characters to function with nonstandard terminals. The translation requirements for each
terminal can be stored in terminal description files and
copied to a connection, as described above.
Table 5. BIOS Typical Performance
DISK I/O PERFORMANCE
Function
Table 5 shows iRMX 86 performance obtained using the
iSBC 215 Winchester Disk and iSBX 218 Diskette Controllers under the specified conditions.
Average
Character Throughput
Byte. per Second·
Wlnche.ter DI.k
Each device driver can be used to interface to a number
of separate and, in some cases, different devices (See
Figure 4). The iSBC 215 Device Driver, supplied with the
system, is capable of supporting the iSBC 215 Winchester
Disk Controller, the iSBC 220 SMD Disk Controller, and
the iSBX 218 Flexible Disk Controller (when mounted
on an iSBC 215 board). Each device controller may, in
turn, control a number of separate device units. In addition, each driver may control a number of like device
controllers. This capability allows the use of large storage
systems with a minimum of 1/0 system code to write or
maintain.
Single File Read
42,000
Two File Read
(Same Device)
36,800
Diskette
.
15,800
5,700
Single File Write
23,800
5,400
Two File Write
(Different Devices)
36,200
6,900
Read/Write Two Files
(Different Devices)
38,900
6,000
• These measurements were made in the followong enVIronment:
Entire IRMX ™ 86 operatong system and application code and data
located in on-board RAM of a 8-MHz ISBC"' 86/30 Songle Board
Computer. Named files, each with a flie size of 128 KByles, were
used with a device and volume granularity of 1 KByles and six 1
KByle buffers. The disk interleave factor was 2. The iSSC 215
Winchester Controller was attached to two 20-Mbyle drives, and
supported the ISBXTM 218 Diskette Controller that, In turn, was attached to two double denSity 8" diskette drives. ThiS performance
IS, to a large part, restricted by the mechanical speed of the devices.
EXTENDED I/O SYSTEM
The iRMX 86 Extended 110 System (EIOS) adds a number
of 1/0 management capabilities to simplify access to
Order Number 210885-001
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iRMX™86
APPLICATION SOFTWARE
TASK
TASK
TASK
TASK TASK
TASK
TASK
TASK
TASK
TASK
STREAM
FilE
DRIVER
PHYSICAL
FilE
DRIVER
Isac'
iSBX'·
215
iSBC'
DEVICE
DRIVER
254
,SBC'
218
215
DEVICE
CONT·
ROllER
DEVICE
CONT·
ROllER
UN·
CONN.
DEVICE
UNIT
DEVICE
DRIVER
,SBC'
254
BUBBLE
MEMORY
FilE
CONN. DEVICE UNITS
CONDUITS REPRESENT DEVICE CONNECTIONS
WIRES iN CONDUITS REPRESENT FilE CONNECTIONS
Figure 4. Device Driver and Controller Relationships
File Management
Whenever a request is made involving a file name, the
System will search the appropriate directory in order to
find the necessary information about the file's size, access rights, and specific location on the storage device.
The iRMX 86 Operating System provides three distinct
types of files to ensure efficient management of both program and data files: Named Files, Physical Files, and
Stream Files. Each file type provides access to 110 devices through the standard device drivers mentioned
earlier. The same device driver is used to access physical
and named files for a given device.
The iRMX 86 BIOS uses an efficient format for writing
the directory and data information into secondary storage. This standard iRMX 86 format is fully compatible
with the ISO Media standard, and other Intel systems
such as the iRMX 88 Operating System. This structure
enables the system to directly access any byte in a file,
often without having to do additional 110 to access space
allocation information. The maximum size of an individual
file is 2 32 (4.3 billion) bytes.
NAMED FILES
Named files allow users to access information on secondary storage by referring to a file with its ASCII name. The
, names of files stored on a device are stored in special
files called directories. As directories are themselves
named files, the iRMX 86 File System allows directories
to contain the names of other directories. Figure 5 illustrates the resulting hierarchical file structure. This structure is useful for isolating file names to particular user
applications, and for tailoring system data to the requirements of users and applications sharing storage devices.
Using different branches on the directory tree, different
users do not have to coordinate in naming their files to
ensure unique names.
EASE OF ACCESS
The hierarchical file structure is provided to isolate and
organize collections of named files. To give operators
fast and simple access to any level within the file tree,
an ATTACHFILE command is provided. This command
allows operators to give a logical name to a point in the
tree so that a long sequence of characters need not be
typed each time a file is referred to.
Order Number 210885·001
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intel'
IRMX TII 86
SIM
SOURCE
SIM
OBJECT
TEST OBJECT
?
I
I
= DIRECTORY
1\
~
= NAMED
DATA FILE
BATCH·' BATCH 2
Figure 5. Hierarchical Named File Structure
ACCESS PROTECTION
grams, for example, wishing to preserve file and device
independence allowing data sent to a printer one time,
to a disk file another time, and to another program on
a different occasion.
Access to each Named File is protected by the rights
assigned to each user by the owner of the file. Rights
to read, append, update, and delete may be selectively
granted to other users of the system. In general, users
of Named Files are classified into one of three categories:
User, .Group, and World. Users and Groups are used
when different programmers and programs need to share
information stored in a file. The World classification is
used when rights are to be granted to all who can use
the system.
BOOTSTRAP AND APPLICATION LOADERS
Two utilities are supplied with the System to load programs and data into system memory from secondary
storage devices:
The IRMX 86 Bootstrap Loader can be configured to
a size of less than 600 bytes of P(ROM). and is typically
used to load the initial system from the system disk into
memory, and begin its execution.
PHYSICAL FILES
Physical Files allow more direct device access than
Named Files. Each Physical File occupies an entire de·
vice, treated as a single stream of individually accessable
bytes. No access control is provided for Physical Files
as they are typically used for such applications as.driving
a printing device, translating from one device format to
another, driving a paper tape device, and controlling
analog mechanisms.
The Application Loader is typically used by application
programs already running in the system to load additional
programs and data from any secondary storage device.
The Human Interface layer, for example, uses the Application Loader to load the non-resident Human Interface
Commands. The Application Loader is capable of loading
both relocatable and absolute code, as well as program
overlays.
STREAM FILES
Human Interface
Stream Files provide applications with a method of using
iRMX 86 file management methods for data that does
not need to go into secondary storage. Stream Files act
as direct ch,annels, through system memory, from one
task to another. These channels are very useful to pro-
The flexibility of the interface between computer controlled machines and their users often determines the
usability and ultimate success of the machines, Table 12
lists iRMX 86 Human Interface functions giving users
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IRMX TIII 86
and applications simple access to the file and system
management capabilities described earlier. The process,
interrupt, and memory managment functions described
earlier, are performed automatically for Human Interface
users.
The initial program specified for each terminal can be
a special application program, a custom Human Interface, or the standard iRMX 86 Command Line Interpreter (CLI). For example, you may choose to use the
Microsoft Basic Interpreter as this initial program. After
system start-up, each terminal user would be able to run
the interpreter without asking for it to be loaded. From
the BASIC interpreter an operator, for example, could run
a data collection program, written in BASIC, that communicates with several laboratory instruments, and prints
charts and reports based on certain test results. When
finished entering, changing, or running a BASIC program,
the terminal would remain in BASIC for the next user.
MULTI·USER ACCESS
Using the multi-terminal support provided by the BIOS,
the iRMX 86 Human Interface can support several simultaneous users. The real-time nature of the system
is maintained by providing a priority for each user, and
using the event-driven iRMX 86 Nucleus to schedule tasks.
High-performance interrupt response is guaranteed even
while users interact with various application packages.
For example, multi-terminal support allows one person
to be using the iRMX 86 Editor, while another. compiles
a FORTRAN 86 or PASCAL 86 program, while several
others load and access applications.
Specifying an application program as a terminal's initial
program makes the interface between operators and the
computer system much simpler. Each operator need only
be aware of the function of a particular application; not
needing to interact with any unfamiliar functions also
available on h.is application system.
Specifying the standard iRMX 86 Human Interface CLI
as the initial program enables users of the terminals to
access all iRMX 86 functions. This CLI makes it easy to
manage iRMX 86 files, load and execute Intel-supplied
and custom programs, and submit command files for
later execution.
Each terminal attached to the iRMX 86 multi-user Human
Interface is automatically associated with a user, a memory pool, and an initial program to run when the terminal
is connected. This association is made using a file that
may be changed at any time. Changes are effective the
next time the system is initialized.
Table 6. IRMXTM Real·Tlme Performance
Real·Tlme
Function
Execution
Time (msec)
.SUSPEND TASK
I
0.45
INTERRUPT LATENCY
(to Handler)
INTERRUPT LATENCY
(to Handler)
SYSTEM BUFFERS
AND DATA
0.20
(Max)
"
APPLICATION CODE
OPERATOR
CONSOLE
APPLICATIONS
RAM
0.03
I
I
BACKGROUND
APPLICATION
0.68
(Max)
BIOS
I
EIOS
WINCHESTER
DISK
I
DRIVER
SEND MESSAGE
(no context switch)
0.30
0.57
SEND CONTROL
(no context switch)
0.19
BOOTSTRAP LOADER
BUILDING SECURITY
SYSTEM
RAM
SEND CONTROL
(with context switching)
0.50
RECEIVE CONTROL
(no waiting)
0.25
FLOPPY
DISK
DRIVER
NUCLEUS
PROM
SEND MESSAGE
(with context switch)
I
HUMAN INTERFACE
(Typical)
CONTEXT SWITCH CAUSED
BY INTERRUPT
COMMON
UTILITIES
f
SYSTEM
BUFFERS
DATA
16K BYTES
APPLICATION CODE
PROM
Context switch time is the time between executing In the context of
a task. and the first instruction to execute In the context of another
task.
SK BYTES NUCLEUS CODE
oOSP 66 INTERFACE
801300SF
,sec'
DATA COMMUNICATION
CONTROLLER
These times were measured using an 8 MHz
86/30 Single Board
Computer with the standard configuration supported by the Preconfigured System, and all program and data stored In on-board dynamiC
RAM,
Figure 6. Typical iRMXTM 86 Configurations
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iRMX™ 86
MULTIPROGRAMMING SPECTRUM
FLEXIBILITY
PERFORMANCE
FEATURES
.....
------~
LANGUAGE
DEVELOPMENT TOOLS
STRUCTURED DESIGN
EXECUTION
ENVIRONMENT
DEVELOPMENT
ENVIRONMENT
FEATURE OVERVIEW
software package to divide and coordinate various system
activities among multiple processors. Typical iRMX 86
system performance characteristics are shown in Table 6.
The iRMX 86 Operating System is well suited to serve
the demanding needs of real-time applications executing
on complex microprocessor systems. The iRMX 86 System also provides many tools and features needed by
real-time system developers and programmers. The following sections describe features useful in both the development and execution environments. The description
of each feature outlines the advantages given to hardware and software engineers concerned with overall
system cost, expandability with custom and industry
standard options, and long-term maintenance of iRMX
86-based systems. The development environment features also Clescribe the ease with which the iRMX 86
Operating System can be incorporated into overall system
designs.
Many real-time systems require high-performance operation. To meet this requirement, all of iRMX 86 (except
for the Human Interface commands) can be put into zero
wait-state P(ROM). ThiS approach eliminates the possibility of disk access times slowing down performance,
while allowing system designers to take advantage of
high performance memory devices.
CONFIGURABILITY
...
The iRMX 86 Operating System is configurable by system
layer, and by system call within each layer. In addition,
all the I/O port addresses used by the System are configurable by the user. This flexibility gives designers the
freedom to choose configurations of hardware and software that best suit their size and functional requirements.
Two example configurations are shown in Figure 6.
Execution Environment Features
REAL-TIME PERFORMANCE
Most configuration options are selected during system
design stages. Qthers may be selected during system
operation. For example, the amount of memory devoted
to queues within a Mailbox can be specified at the time
the Mailbox is created. Devoting more memory to the
Mailbox allows more messages to be transmitted to other
tasks without having to degrade system perfoJmance to
allocate additional memory dynamically.
The iRMX 86 Operating System is designed to offer the
high performance, multi-tasking functions required by
real-time systems. Designers can make use of the latest
VLSI devices such as the 8087 Numeric Processor Extension, and the 80130 Operating System Firmware
Component to improve their system cost/performance
ratio, or the iMMX'" 800 MULTIBUS@Message Exchange
Order Number 21018&·001
2-15
iRMXTM 86
The chart shown in Table 7 indicates the actual memory
size required to support these different configurations
of the iRMX 86 System. Systems requiring only Nucleus
level functions may require no more than 13 KBytes for
the Operating System (Use of the iAPX 86/30 requires
only 4K Bytes of RAM). Other applications, needing 110
management functions, may select portions of additional
layers that fit their needs and size constraints.
The iRMX 86 System provides easy-to-use support for
applications to access multiple terminals. It also enables
multiple and different users to access different applications concurrently.
Figure 7 illustrates a typical iRMX 86 application simultaneously supporting multi-terminal data collection and
real-time environments. Shown is a group of terminals
used by"machinists on a shop floor to communicate with
ajob management program, a building security system
that constantly monitors energy usage requirements, a
system operator console capable of accessing all system
functions, and a group of terminals in the Production
Engineering department used to monitor job costs while
developing new device control specifications and instructions. The iSBC 544 Intelligent Terminal Interface supports multiple user terminals without degrading system
performance to handle character 110.
This configurability also applies to the Terminal Handler
and Debugger layers. They need be included only when
the iRMX 86 Debugger is needed (usually only during
system development) or wilen a serial terminal interface
is needed in a system that otherwise doesn't need an
1/0 System.
MULTI-PROCESSING
The resources provided by a single processor are often
not enough to perform certain functions. With the standard
interfaces provided by the iMMX 800 MULTIBUS Message
Exchange package, the iRMX 86 Operating System su~
ports a loosely-coupled multi-processing environment.
Tasks running on one processor may communicate with
tasks running on other processors, even if they operate
under different operating systems. The iMMX 800 software is capable of sending messages over the MULTIBUS
to tasks operating under either the iRMX 80 8-bit MultiTasking Executive, the iRMX 88 Executive, or the iRMX
86 Operating System. Using this message exchange
mechanism, applications may increase their system performance quite easily, improve overall Interrupt response,
gain access to the iSBC 550 Ethernet Controller, and
leave room for future product enhancements.
I ,sac
-g
~
DATA
COLLECTION
TERMINALS
h
~
fJQ
MULTI-USER ACCESS
Many real-time systems must provide a vanety of users
access to system control functions and collected data.
System Layer
544
.
Figure 7. Multi-Terminal and
Real-Time System
Multi~User
Table 7. iRMXTM 86 Configuration Size Chart
Bootstrap Loader
Nucleus
BIOS
Application Loader
EIOS
Human Interface
UDI
Terminal Handler
Debugger
Human Interface Commands
Interactive Configuration Utility
Min. ROMabie
Size
Max .
Size
Data
Size
O.5K
1.5K
6K'
10.5K
26K
24K
2K
78K
1K
4K
10K
2K
10.5K
12.5K
1K
22K
22K
15K
11K
11K
0
3K
3K
O.3K
28.5K
28.5K
1K
116K
308K
• Usable by System after bootloadlng.
Order Number 210885-001
2-16
iRMX™86
EXTENDABILITY
EXCEPTiON HANDLING
The iRMX 86 Operating System provides three means
of extensions. This extendability is essential for support
of OEM and volume end user value added features. This
ability is provided by: Ilser-defined operating system calls,
user-defined objects (similar to Jobs, Tasks, etc.), and
the ability to add functions later in the product life cycle.
The modular, layered structure of the System easily facilitates later additions to iRMX 86 applications. Userdefined objects are supported by the functions listed in
Table 8.
The System includes predefined exception handlers for
typical 1/0 and parameter error conditions. The error
handling mechanism is both configurable and extendable.
SUPPORT OF STANDARDS
The iRMX 86 Operating System supports the many hardware and software standards needed by most application
systems to ensure that commonly available hardware
and software packages may be interfaced with a minimum of cost and effort. The iRMX 86 System supports
the iSBC family of products built on the Intel MULTIBUS
(IEEE Standard 796), and a number of standard software
interfaces such as the UDI and the common device driver
interface (See Figure 8). The procedural interfaces of
Using standard iRMX 86 system calls users may define
custom objects, enabling applications to easily manipulate commonly used structures as if they were part of
the original operating system.
Table 8. User Extension System Calls
Function Performed
System Call
RO$CREATE$COMPOSITE
Creates a custom object built of previously defined objects.
RO$DELETE$COMPOSITE
Deletes the custom object, but riot the vanous objects from which it was built.
RO$INSPECT$COMPOSITE
Returns a list of Token Identifiers for the component objects from which the specified
composite object is built.
RQ$ALTER$COMPOSITE
Replaces a component object of a composite object
RQ$CREATE$EXTENSION
Creates a new type of object and assigns a mailbox used for collecting these objects
when they are deleted.
RQ$DELETE$EXTENSION
Deletes an extension definition.
Figure 8. iRMXTM 86 Standard Interfaces
Order Number 21088S 001
2-17
iRMXTM 86
minal 110 by locally managing input and Ol,ltput
buffers. The iSBC 544 firmware provided with the
operating system can off-load the system CPU by
as much as 75%.
.
the UDI, a software analogy to the MULTIBUS, 'are listed
in Table 10.
.
The Operating System includes support for the proposed
IEEE 80·bit extended real·variable format of the 8087
Numeric Data Processor, the IEEE 796 (MULTIBUS)
hardware interface, and the Intel· Universal Run·time In·
terface (URI). Other standards such as the iMMX 800
MULTIBUS Message Exchange, and an Ethernet· com·
munication interface, are supported by optional software
packages available to run on the IRMX 86 System.
The i$BC 534 Four-Channel USART Controller
Device Driver also provides support for multiple
controller boards each supporting up to 4 standard
RS232 terminals.
Table 9. Supported Devices
\
iSBCI!> Device
Controller
SPECTRUM OF CPU PERFORMANCE
TheiRMX 86 System supports 8086 and 8088 based
systems directly at a variety of processor clock speeds.
With the iRMX 286R Operating System option, completely compatible systems can be built around the iAPX
286 processor. By choosing the appropriate CPU, designers can select from a wide range of performance
without having to change application software.
iSBCI!> 86,88
ISBC® 204
ISBC® 206
iSBC® 208
COMPONENT LEVEL SUPPORT
iSBC® 215
iSBCI!> 220
iSBC® 254
iSBC® 534,544
The iRMX 86 System may be tailored to support specific
hardware configurations. In addition to system memory,
only an iAPX 86 or iAPX 88 microprocessor, an 8259A
Programmable Interrupt Controller, and either an 8253
or 8254 Programmable Interval Timer are required. In
addition, the iRMX 86 Operating System may be used
to augment the functions of the 80130 Operating System
Firmware Component that not only provides these hardware functions, but eliminates the need for approximately
14 KBytes of the iRMX 86 Nucleus code (see Figure 6).
For systems requiring extended mathematics capability,
an 8087 Numeric Data Processor may be added to perform these functions up to 100 times faster than equivalent
software. For applications servicing more than 8 Interrupt sources, additional 8259A's may be configured as
slave controllers.
iSBXTM 218
iSBXTM 270
Supported Devices
Serial Port to CRT, Parallel Port to
Centronics-type Printer, InterVal
Timer, and Interr.upt Controller
Single Density Diskette
Cartridge-type Hard Disk
Single & Double Density,
Single & Double Sided.
8" & 5.25" Diskette
Standard Winchester Disks
Standard Storage Module Disks
Bubble Memory Board
4-Channel.Serial Ports to CRTs.
Modems
Single & Double Density, Single
& Double Sided, 8" & 5.25" Diskette (When used on an iSBel!> 215
Winchester Controller)
Black and White CRT's and full
ASCII keyboards
Development Environment Features
The iRMX 86 Operating System supports the efficient
utilization of programming time by providing important
tools for program development. Some of the tools necessary to develop and debug real-time systems are included
with the Operating System. Others, such as language
compilers, are available from Intel and from leading Independent Software Vendors.
BOARD LEVEL SUPPORT
The iRMX 86 Operating System includes device drivers
to support a broad range of MULTIBUS device controllers.
The particular boards and types of devices supported are
listed in Table 9. The device controllers all adhere to industry standard electrical and functional interfaces.
'LANGUAGES
In addition to the on-CPU board terminal drivers, the
iRMX 86 BIOS includes two iSBC board-level device
drivers to support multiple terminal interfaces:
The iRMX 86 Operating System supports a group of 31
standard system calls known as the Universal Development Interface (UDI). Figure 8 shows that the additional
features of this standard interface provide iRMX 86 systems the capability: of using many compilers and language translators. These include the iAPX 86 and 88
Macro Assembler, and the Pascal 86/88, PUM 86/88,
and FORTRAN 86/88 compilers available from Intel. They
also include a number of other Intel development tools,
The iSBC 544 Intelligent Four-Channel Terminal
Interface Device Driver provides support for multiple controllers each supporting up to 4 standard
RS232 terminals. The iSBC 1544 driver takes advantage of an on-board 8085 processor to greatly
reduce the system processor time required for ter• Ethernet IS a trademark of Xerox Corporation.
Order Number 210885·001
2-18
iRMX™ 86
and language translators and utilities available from other
software vendors. A subset of the UOI SYlltem Calls provides another standard interface called the Universal
Runtime Interface (URI). The URI calls are those required
to execute a compiled,program, while the full set of UOI
calls is required to run a compiler.
These standard software interfaces (the URI and the UOI)
ensure that users of the iRMX 86 Operating System may
transport their applications to future releases of the iRMX
86 Operating System and other Intel and independent
vendor software products. The calls available in the URI
and UOI are shown in Table 10.
Table 10. URI and UOI System Calls
Function Performed
System Call
Memory Management:
OQ$ALLOCA TE
Crea!es a Segment of a specified size.
OQ$FREE
Returns the specified segment to the System.
OO$GET$SIZE"
Returns the size of the specified Segment.
OO$RESERVE$IO$MEMORY"
Reserves memory to OPEN and ATTACH files.
File Management:
OO$ATTACH
,
I
Creates a Connection to a specified file.
OQ$CHANGE$ACCESS"
Changes the user access rights associated With a file or directory
OO$CHANGE$EXTENSION
Changes the extension of a file name In'memory
DQ$CLOSE
Closes the specified file Connecllon
OO$CREATE
Creates a Named File.
OO$OELETE
Oeletes a Named File.
OQ$OETACH
Closes a Named File and deletes Its Connection.
OQ$OPEN
Opens a file for a particular type of access
OQ$GET$CON NECTION$STATUS'
Returns the current status of the specified file Connection
OQ$FILE$INFO'
Returns data about a file Connection
OO$REAO
Reads the next sequence of bytes from a file.
DQ$RENAME'
Renames the specified Named File
OO$SEEK
Moves the position pointer of a file.
OO$TRUNCATE
Truncates a file.
OO$WRITE
Writes a sequence of bytes to a file.
Process Management:
OQ$EXIT
Exits from the current application job.
OQ$OVERLAY'
Causes the specified overlay to be. loaded
OQ$SPECIAL
Performs special 110 related functions on terminals With speCial control
features.
OQ$TRAP$CC
Captures control when CNTRLlC IS typed.
Exception Handling:
OQ$GET$EXCEPTION$HANOLER
Returns a pointer to the program currently being used to process errors.
OQ$OECOOE$EXCEPTION
Returns a short description of the specified error code
OQ$TRAP$EXCEPTION
Identifies a custom exception processing program for a particular type of error
Application Assistance:
OQ$OECOOE$TIME
Returns system time and date in binary and ASCII character format.
OQ$GET$ARGUMENT"
Returns the next argument from the character string used to invoke the application program
OQ$GET$SYSTEM$IO"
Returns the name of the underlYing operating system supporting the UDI.
Od$GET$TIME"
Returns the current t"ime of day as kept by the underlying operating system.
DQ$SWITCH$BUFFER
Selects a new buffer from which to process commands.
• Calls available only through the UDI
Order Number ?10RAr,
2-19
~Ol
iRMX™86
..
The high performance of the iRMX 86 Operating System
enhances the throughput of compUers and other·development utilities. Table 11 indicates the average performance
of typical development environment functions operating
in the same configuration described in Table 5.
Table 12. Major Human Interface Utilities (Con't.)
Command
Table 11. Development Environment Performance
Function
TIME
Set the system time-of-day clock.
VERIFY
Verify the structure of an iRMXTM 86
Named File.volume, and check for
possible disk data errors.
Average
EX8Cuti9n Time
INTERACTIVE CONFIGURATION UTILITY
Directory Command
(S Format with 25 files)
5.3 sec
Load the COpy Commal)Q
1.2 sec
Copy a 1K Byte File
(Winchester to Winchester)
1.0 sec
Copy a 16K Byte File
1.7 sec
Copy a 64K Byte File
Copy a 1K Byte File
(Winchester to Diskette)
3.9 sec
Compile PUM 86
3931pm
Compile PASCAL 86
Program
4531pm
The iRMX 86 Operating System is designed to provide
OEMs the ability to configure for specific system hardware and software requirements. The Interactive Configuration Utility (ICU) builds iRMX 86 configurations by
asking appropriate questions and making reasonable
assumptions. It runs on either an Intellec® Series III Development System or iRMX 86 System supporting the UDI
and a hard disk. Table 13 lists the hardware and support
software requirements of different iRMX 86 development system environments.
1.4 sec
Table 13. IRMXTM 86 Development Environment
Intellecl!> Series III:
MDS 313 PUM 86/88 Compiler
One hard disk and one diskette drive
TOOLS
Certain tools are necessary for the development of microcomputer applications. The IRMX 86 Human Interface
includes many of these tools as non-resident commands.
They can be included on the system disk of an application system, and brought into memory when needed to
per.form functions as listed in Table 12.
iRMXTM 86 Preconfigured System
iRMXTM 860 Utility
iRMXTM 863 PUM 86/88 Compiler
iSBCI!> 957B Monitor
448K Bytes of RAM
5M Byte On· Line Storage and one double-density
diskette drive
-
Table 12. Major Human Interface Utilities
Command
Function
Function
BACKUP
Copy directories and files from one
device to another.
COpy
Copy one or more files to one or
more destination files.
CREATEDIR
Create a directory file to store the
names of other files.
DIR
List the names, sizes. owners, etc.
of the files contained in a directory.
ATIACHFILE
Give a logical name to a specified
location in a file directory tree.
PERMIT
Grant or rescind user access to a
file.
RENAME
Change the name of a file.
SUBMIT
Start the processing of a series of
commands stored in a file.
SUPER
Change operator's ID to that of the
System Manager with global access
rights and privileges.
SYSTEM 86/330 Microcomputer System
Basic configuration
Figure 9 shows one of the many screens displayed during
the process of defining a configuration. It shows the abbreviations for each choice on the left, a more complete
description with the range of possible answers in the
center, and the current (sometimes default) choice on
the right. The bottom of the screen shows three changes
made by the operator (lower case lettering), and a request
for help on the Exception Mode question. In response
to a request for help, the ICU displays an additional
screen outlining possible choices and some overall sys·
tem effects.
The ICU requests only information required as a result
of previous choices. For example, if no Extended I/O
System functions are required, the ICU will not ask any
further questions about the EIOS. Once a configuration
session is complete, the operator may save all the information in a file. Later, when small changes are necesOrder Number 210885·001
2-20
iRMX™86
sary, this file can be modified. A completely new'session
is not required.
Nucleus
(ASC)
(PV)
(ROD)
(MTS)
(DEH)
(NiH)
(EM)
(NR)
AHSysca1ls{'t'tslNo1
PoromtIef V_,on (VHINoI
Root Object Dllary Sue 10-1IfftIh1
",,_ Tllnsfer Silt ~- OFfFFHI
Excepbon Hlndler (V1IINoIDeII/Use1
Narneot Ex Hindle< ObJICI Maclute 1.-32ch'1
E.cep1~n _
IN..../Program/Envrron/AIiI
Nucleus In ROIIIVHINoI
Del,,"
execution are accessable from a terminal connected directly to the iAPX 86 or 88 system.
Yes
Yes
OO.CH
0040H
rNTELLEC
SERIES
MOOEL 210
Ves
UPP
CHANNEL
Never
No
En." Changes IAbbre_no 'I, ne.·VlIueI ASC, N
pv:no
rod ,48
SERIAL CH2
em'
Figure 9. ICU Screen for IRMXTM 86 Nucleus
Figure 10. Typical iSBC® 957B Configuration
REAL-TIME DEBUGGING TOOLS
The iRMX 86 Operating System supports three distinct
debugging environments: Static, Dynamic, and PostMortem. While the iRMX 86 Operating System does
support a mUlti-user Human Interface, these real-time
debugging aids are usually most useful in a single-user
environment where modifications made to the system
cannot affect other users.
The static debugging aid is the iSBC 957B Monitor (included in the first shipment of some iRMX 86 options).
The Monitor provides a basic debugging capability for
both system and application code. The iRMX 86 Debugger provides a dynamic system debugging tool for testing
and debugging real-time systems. The Debugger allows
programmers to stop and inspect one task while the rest
of the system continues to operate. The iRMX 86 Crash/
Dump Analyzer enables programmers to intpect a system's structure after a problem has caused it to stop normal operation. Each of these debugging facilities are
described below.
iRMX™ 86 Debugger
The iRMX 86 Debugger runs as part of an iRMX 86 application. It may be used at any time during program development, or may be integrated into an OEM system
to aid in the discovery of latent errors. The Debugger can
be used to search for errors in any task, even while the
other tasks in the system are running. The iRMX 86 Debugger communicates with the developer via a terminal
handler that supports full line editing.
System Crash/Dump Analyzer
The often difficult job of debugging real-time applications
is made much simpler with the System Crash/Dump
Analyzer. The analyzer allows program developers to
record system memory for later analysis even if the system has halted. This analYSis lists such vital Information
as which jobs have active tasks, which system queues
contain which tasks, and what segments contain which
- data.
iSBC@ 957B Monitor
The information used by the Analyzer is obtained from
a copy of iRMX 86 data structures after a fault has caused
an unexpected halt (crash). The processor also may be
halted deliberately to perform a system analysis. The
system information is created by a two-step process:
The iSBC 957B Monitor can be used either as a standalone monitor for static debugging and system start-up,
or as a communication link to an Intellec Development
System. A number of PROMs are included along with the
necessary cables to control a hardware configuration
such as is pictured in Figure 10. All programs necessary
for the Intellec system and the target system are included.
Configuration tools for users wishing to support different
hardware configurations are also included.
1. Transferring an image 01 iRMX 86 system memory
to a disk file on an Intellec Senes III Microcomputer
Development system,
2. Later printing an analyzed and formatted printout
description of the stale of the system.
Debugging of any iAPX 86 or 88 application is accomplished in an interactive manner via either of the two ter:
minals shown in Figure 10. If an Intellec Development
System is not present, all debugging instructions necessary to view and modify register and memory contents,
set execution breakpoints and provide single instruction
Figure 11 shows a portion of a Crash/Dump Analyser
display for an iRMX 86 Mailbox. The display identifies
the mailbox by its token and shows its key attributes.
This information is followed by a list of tokens for objects
(if any) queued at the mailbox.
Order Number
2-21
21088~·OO'
IRMXT,M as
Ii
Ii - -- ---- - - --- ------------------ - ------------Ii
Ii
_ .......,taUn=4AM
PRIORITY
Ii
OUEUE
~
Ii
- -------- ------ or- ---- - ---- ... --- ------- ----- ......
c-mng Jab
484D
Tllkq_hood
Dbjectcochtdeplll
DOOO
Ie
Dbject queue
484DJ14A83G
484DJl4A6DG
0 - dllciplont
Dbjectquouehood
PRJ
W3
NO TASKS WAITING
484DJ14A1I'G
484DJ14A68G
JFOR
CONTAINING JOB
484DJ14A6FG
484DJ14A69G
the full Complement of devices shown in Figure 12. The
shaded area of the Figure represents the minimum hardware required by the start-up system. Other combinations
of the devices, up to the full compliment shown, that
support additional on-line storage are also possible. The
Preconfigured System includes all iRMX 86 System Calls
and the complete Universal Development Interface (UDI).
The UDI supports Intel High-Level Languages and many
applications available from Intel and many Independent
Software Vendors.
G FOR SEGMENT
ONOUEUE
~..,~"
Figure 11. Mailbox Analysis Report
The analysis displays all the mailboxes (among other
things) which exist within each job. Thus a user might
learn critical information by observing a number of objects different from that expected.
,saC'S34
•••••• ' .
.....
Performance problems can be identified under some
circumstances. Noticing that certain mailboxes frequently
have many objects queued may suggest an increase in
the high performance cache size for the mailbox to improve its throughput, or give the designer cause to investigate the receiving task operation to see why the
queue is so large.
The analyzer automatically. checks for system inconsistencies such as corrupted data structures, incorrect object
types, and stack overflow. Reports of such problems accompany the, reports on specific system objects.
PARAMETER VALIDATION
Some iRMX 86 System Calls require parameters that
may change during the course of developing iRMX 86
applications. The iRMX 86 Operating System includes
an optional set of routines to validate these parameters
to ensure that correct numeric values are used, and that
correct object types are used where the System expects
to manipulate an object. For systems based only on the
iRMX 86 Nucleus, these routines may be removed to improve the performance and code size of the System once
the development phase is completed.
~
• ""!J:.
.
,"','
-"~
FLOPPIES
WINCHESTERS
Fig~re
12. Pre-Configured iRMXTM 86 System
The Preconfigured System is intended to aid the initial
use of iRMX 86.features. Any 808fH)ased system currently
supporting an iRMX 86 environment with a double density diskette may simply plug in the start-up system and
run. Further, thiS start-up system may be used to run the
ICU (!fa Winchester disk is attached to the system) to
develop custom configurations such as those pictured
in Figure 7. As shipped, the Human Interface supports
a single user terminal. However, the Preconfigured System user terminal file may be altered easily to support
from two to five users. .
A ready-to-run, multi-user, Preconfigured System is included in each iRMX 86 KIT. Its configuration supports
This System is also available as a separate product (order
code RMX 86PC E) for-those iRMX 86 users that do not
require the ability to tailor their system to custom hardware and software configurations. The SYSTEM 86/300
Family of Microcomputer Systems also provide users
immediate access to programming tools and system applications with a ready-to-Ioad preconfigured iRMX 86
Operating System.
SPECIFICATIONS
iRMX 860
iRMX 86 Development Utilities
Package including the iAPX 86 and 88
Linker, L.:ocater, Macro Assembler,
Librarian, and the iRMX 86 Editor
iRMX 861
PASCAL 86/88 Compiler
PRECONFIGURED SYSTEM
Supported Software Products
iRMX 286R
iRMX 86-compatible Operating System
extension for iAPX 80286
Order Number 210885·001
iRMX TII 86
iRMX 862
FORTRAN 86/88 Compiler
iRMX863
PUM 86/88 Compiler
Introduction to the iRMX 86 Operating System
(9803124-04)
iRMX864
TX Screen-oriented Editor
.iRMX 86 Operator's Manual (144523-001)
iMMX800
MULTIBUS Message Exchange software package for iRMX 80, 86, and 88
application systems
Master Index for iRMX 86 Release 5 Documentation
(145015-001)
iOSP86
Support Package for iAPX 86/30 and
88/30 Operating System Processors
Getting Started With The Release 5 iRMX 86 System
(145073-001)
. iRMX 86 Installation Guide (9803125-05)
iRMX Configuration Guide (9803126-05)
iRMX 86 Nucleus Reference Manual (9803122-04)
Supported Hardware Products
iRMX 86 Terminal Handler Reference Manual
(143324-002)
CPMPONENTS
iRMX 86 Debugger Reference Manual (143323-002)
iAPX 86 and 88 Microprocessors
IRMX 86 Basic 110 System Reference Manual
(9803123-05)
iAPX 286 Microprocessors (with iRMX 286R)
8087 Numeric Data Processor Extension
IRMX 86 Loader Reference Manual (143318-002)
iAPX 86/30 (80130) Operating System Firmware
Component (with iOSP 86)
IRMX 86 Extended 110 System Reference Manual
( 143308-002)
8253 and 8254 Programmable Interval Timers
IRMX 86 Human Interface Reference Manual
(9803202-003)
8259A Programmable Interrupt Controller
8251A USART
GUide to Writing DeVice Drivers for the iRMX 86 and
iRMX 88110 Systems (142926-004)
8255 Programmable Parallel Interface
IRMX 86 Programming Techniques (142982-003)
User's Guide For The ISBC 957B IAPX 86, 88 Interface
and Execution Package (143979-002) ,
iSBC® MULTIBUS@ BOARD AND SYSTEM PRODUCTS
iSBC 86/12A, 86/05, 86/14, 86/30, 88/25, and 88/40
Single Board Computers
iRMX 86 Disk Verification Utility Reference Manual
(144133-002)
iSBC 286110 Single Board Computer (With iRMX 286R)
Runtime Support Manual for iAPX 86, 88 Applications
(121776-002)
iSBC 204 Diskette Controller
iSBC 206 Hard Disk Controller
IRMX 86 Crash Analyzer Reference Manual
(144522-001)
iSBC 208 Diskette Controller
iSBC 215 Winchester Disk Controller ,
OPTIONAL REFERENCE MATERIALS
iSBC 220 SMD Disk Controller
iSBC 254 Bubble Memory System
Edit Reference Manual (143587-002)
iSBC 534 4-Channel Terminal Interface
Guide to Using iRMX 86 Languages (142907-001)
iSBC 544 Intelligent 4-channel Terminal Interface and
Controller
APPLICATION NOTES
iSBX 218 Diskette Controller (with iSBC 215)
Ap Note 86 - iRMX 86 Realtime Multitasking
Operating System
iSBX 350 Parallel Port (Centronics-type Printer Interface)
Ap Note 130 - Using Operating System Processors to
Simplify Microcomputer Designs
iSBX 351 Serial Communications Port
iSBX 270 CRT, Light Pen and Keyboard Interface
SYSTEM 86/330 Computer System
TRAINING COURSES
SYSTEM 86/380 Computer System
Introduction to the iRMX 86 Operating System
Advanced 'iRMX 86 Operating System Concepts
Available Literature
CUSTOMER SEMINARS
The iRMX 86 Documentation Set is comprised of following reference manuals. Each is also be available under
the order numbers shown.
Contact Local Intel Sales Office for details on available
video-tape and slide presentations.
Order Number 210885 001
2-23
ORDERING INFORMATION
RMX 86 KIT ERO:
The iRMX 86 Operating System is available under a
number of different licensing options as noted here. Except for source listings (available on microfichel all options
are provided on either single or double density ISIS-formatted diskettes, or on double density iRMX 86-formatted
diskettes. ISIS-format diskettes may be used on Intel
Intellec Development Systems. The iRMX 86-format may
be used on any iRMX 86-based system supporting the
appropriate compilers and 'development environment.
Other licensing options include prepayment of all future
incorporation fees, single use rights for a single machine,
use at a second development site, one-year support service extensions, the right to make copies for a(ldltional
development systems, and source listing materials.
Each option includes 90 days of support service that
provides a periodic NEWSLETTER, Software Problem
Report Service, and copies of System updates that occur
during this period. Except for source listings, all initial
licenses include the iSBC 957B iAPX 86 and 88 System
Monitor, and a complete set of iRMX 86 Documentation.
The OEM license options listed here allow users to incorporate the iRMX 86 Operating System into their applications. Each use requires payment of an Incorporation
Fee.
Order Code
Description
RMX 86 KIT ARO:
Single density OEM license.
RMX 86 KIT BRO:
Double density OEM license.
Double density iRMX 86-Format
OEM license for use on iRMX
86-based environments.
As with all Intel software, purchase of any of these options
requires the execution of a standard Intel Master Software License. The specific rights granted to users depend
on the specific option and the License signed.
2-24
iRMX™ 88
REAL·TIME MULTITASKING EXECUTIVE
• Event-driven multitasking executive
software supports iSBC® 86/05,
• Supports component or iSBC™·based
system generation through Interactive
Configuration Utility
86/12A, 86/14, 86/30, 88/25, 88/40,
88145 or iAPX 86, 88 based applications
• I/O system provides compatible
iRMX™ 86 files and device independent
110 interface
• Small, high·performance, PROMable
executive supports high sample rates
• Provides simple, intertask communica·
tions and synchronization
• 110 system supports the User Run·time
Interface (URI) for PUM, PASCAL and
FORTRAN coded application tasks
• Supports the 8087 Numeric
Processor Extension (NPX) for
arithmetic applications
• Memory management of full megabyte
iAPX 86, 88 memory
The iRMX 88 Real·Time Multitasking Executive is a small, event-driven single-user executive system. Designed
for dedicated computer applications using iSBC 86/05, 86/12A, 86/14, 86/30, 88/25, 88/40, 88/45 or iAPX
86, 88 custom products, the modular software package provides real-time application support for PASCAL,
FORTRAN, PUM and assembler coded tasks. Application tasks utilize intertask communications, synchronous
I/O control, priority-based resource allocation and file support for the iSBC 204, 206, 208, 215/218, and
220 Disk Controllers, and the iSBC 254 Bubble Memory product.
The small, high performance iRMX 88 Executive can be located in EPROM or bootstrapped into RAM
memory. The iRMX 88 Executive offers features that are suitable for performance·critical process control
applications, production test stand units, sophisticated laboratory analysis, instrumentation, specialized
data acquisition systems or monitoring stations. The iRMX 88 design, based upon the iRMX 80 Real·Time
Executive, offers iRMX 80·like interfaces for those 8·bit applications which are upgrading to 16·bit solutions for the 1 Megabyte addressing, expanded application functions, and higher performance data sam·
piing requirements.
USER
APPLICATION
Figure 1. Module Representation
The follOWing are trademarks of Intel Corporation and may be used only to desCribe Intel products Intel, CREDIT, Index, Instte, Intellec, library Manager, Megachanls,
Mlcromap, MULTIBUS, PROMPT, UPI, ,"Scope, Promware, MeS, ICE, tRMX, .SSC, .sex, MULTIMODULE and teS Intel CorporatIOn assumes no responsibility lor the use alany
cIrcuitry other than Circuitry embodied in an Intel product No other circuit patent licenses are Implied
© INTEL CORPORATION, 1981
October, 1;81
Order Number: '.3130.002
2-25
intJ
iRMX™ 88
. ance flexibility since it masks all Interrupts and
supports burst-rate data sample gathering. The interrupt task Is useful for lower frequency interrupts, masking only lower priority interrupts..
FUNCTIONAL DESCRIPTION
The IRMX 88 Real-Time Multitasking Executive
Software package provides facilities for executing
tasks concurrently, managing resources and servIcing asynch'ronous events to users of Intel's
single board computers and custom iAPX 86,
88-based products. The foundation modules support real-time dedicated computer applications
with priority-based task scheduling, interrupt
dispatching, real-time clock control with 1 ms
resolution, multiple event monitoring and control,
and file services for flexible, hard, Winchester,
SMD disk units and bubble memory devices. The
software package includes the primary modules:
Nucleus, Free Space Manager, Terminal Handler,
I/O System and Bootstrap Loader. The Interactive
Configuration Utility (ICU) executes on a Series III
Intellec System, or iRMX 86 Operating System
with a Universal Development Interface·(UDI).
Small High-Performance Executive
The iRMX 88 Executive software utilizes a simple,
straightforward architecture which minimizes the
memory requirements, as shown in Table 1. In addition, the modules are deSigned to be totally
EPROM resident for those systems where mass
storage devices cannot be used because of the
danger of ,contamination.
Real-time microcomputer solutions require the
recognition of' interrupts. The performance of the
system is with respect to data sample rates, If there
is no activity in progress when an interrupt occurs,
the time to handle that interrupt is dependent on
the number of instructions executed, e.g., 52
microseconds interrupt latency time on an iSBC
86/12A board. Most real-time solutions have mUltiple events occurring and background operations in
progress. Seldom does a background task have
critical sections of code which cannot be interrupted.
FEATURE OVERVIEW
Event-Driven Multitasking
The i RMX 88 Executive provides a control software
foundation called a Nucleus. The iRMX88 Nucleus
provides two major functions: first, the facility for
concurrent task execution; secondly, the facility
for handling simultaneous asynchronous events.
Intertask Communications
The iRMX 88 Nucleus provides a simple, easy-touse intertask communications mechanism based
upon a message. Messages are transferred between tasks with two basic procedure calls, a send
(ROSEND) and a wait (ROWAIl'). Task "A" requests
the Nucleus to ROSEND the pOinter to a message
buffer to Task "B" (see Figure 2). The Nucleus controls the message flow by activating the higherpriority Task B, or queuing the message If a lowerpriority Task B is not waiting for the message. The
receiving task does an ROWAIT to get the message pOinter and can now access the data which
may be for synchronization or real-time control
operations.
The structured multitasking environment permits
segmenting of the application tasks. The number
of tasks, managed by the Nucleus, Is limited only
by the available 1 Megabyte memory space. The
tasks are prioritized such that the highest-ranked'
task is executing, e.g., an alarm event preempts
the lower priority executing task. The Nucleus
supports 255 priority levels.
Since internal or external events (interrupts) occur
randomly, the Nucleus synchronizes the event
with a task. The Nucleus ~upports either an interrupt service routi.ne or an interrupt task. The interrupt service routine offers high-speed perform-
Table 1. IRMX™ 88 Module Memory Requirements
MODULE
EPROM·
(K bytes)
NUCLEUS
4.0
TERMINAL
HANDLER
FREE
SPACE
MANAGER
PHYSICAL**
NAMED**
BOOTSTRAP * * •
2.5
1.5
20.0
32.0
1.5
1/0 SYSTEM
• amount 01 code configured In EPROM; all numbers are approximate
•• includes one 3K byte deVIce driver (named Iile plus phYSIcal lile is 34.0K bytes)
••• includes an O,5K byte device driver
AFN'()1108A
2-26
intJ
IRMX™ 88
Numeric Data Processor
TASK ENTRY POINT
TASK A
The iRMX 88 Nucleus fully supports the 8087
Numeric Processor Extension (NPX) functions for
high·speed arithmetic functions of real·time ap·
plications. High·performance numeric processing
applications, which utilize 8·, 16·,32· and 64·bit in·
tegers, 32·, 64· and 80·bit floating pOint or 18·digit
BCD operations, are accelerated up to 100 times
over a iAPX 86, 88 software solution. The NPX
functions, including trigonometric, logarithmic
and exponential functionals, are essential in
scientific, engineering, navigational or military ap·
plications.
INITIALIZE TASK
•
PERFORM FUNCTION
INITIALIZE OPERATION (ROSEN D)
(SEND MESSAGE)
1.
WAIT FOR RESPONSE (ROWAIT)
TASK ENTRY POINT
TASK B
INITIALIZE TASK
Nucleus Primitives
WAIT FOR MESSAGE (ROWAIT)
FROM TASK A
The Nucleus performs other functions as shown in
Table 2, in addition to the message communica·
tions management. Some primitives like CREATE
TASK and DELETE TASK allow dynamic crea·
tion/deletion of tasks during run·time. This
dynamic capability allows the Nucleus tables to
PERFORM FUNCTION
1.
SEND RESPONSE (ROSEN D)
TO TASK A
Figure 2. Intertask Communications
Table 2. Nucleus Primitives
NAME
ACCEPT
FUNCTION
Accept a message from specified exchange. Returns message ad·
dress if available, zero otherwise.
CREATE TASK
Create task by building new Task Descriptor based on specified
Static Task Descriptor.
CREATE EXCHANGE
Create exchange at specified RAM address.
DISABLE INTERRUPT
Disable specified interrupt level.
DELETE EXCHANGE
Delete specified exchange.
DELETE TASK
Delete the task specified.
ENABLE INTERRUPT
Initialize' message portion of the Interrupt Exchange Descriptor
associated with the specified interrupt level (the first time called
only), and enable specified interrupt level.
END INTERRUPT
Signals specific end·of-interrupt for the specified interrupt exchange
in a user-supplied interrupt service routine.
INTERRUPT SEND
Send an interrupt message to the specified interrupt exchange.
RESUME
Resume a task that has previously been suspended.
SEND
Send the message located-at "msg-addr" to the exchange specified
by "exch-addr."
SET INTERRUPT
Set interrupt vector address. An interrupt is to be serviced by the
user-supplied routine starting at the address, thus bypassing
Nucleus interrupt software.
SUSPEND TASK
Suspend execution of the task specified by the Task Descriptor.
WAIT
Wait at the specified exchange until a message is available or time
limit expires. Return address of system timeout message or liser
message.
AFN 01108A
2-27
intJ
IRMX™88
expand and accommodate infrequently used tasks
which are loaded into memory from a mass
storage device.
files can be "double buffered" so that the task can
be processing data in one buffer while the IDS is
filing another.
Interactive System Generation
The IDS provides access to two types of files:
• Named Flies allow applications to refer to collections of bytes (files) by using a name. These
names are cataloged in a directory which allows
files to be accessed by different tasks.
• Physical Files allow applications to make a
physical connection to a storage device.
Typically used for simple devices such as
printers, terminals or sequential data logging
where file structures are not necessary.
The iRMX 88 Executive is constructed in a'
thoroughly modular manner with the ful~ range of
facilities being offered in library mOdules. By
selecting the appropriate features and combining
them with the user-written application tasks the
generated system is tailored to the application's
requirements minimizing memory overhead for
;
unused features.
An Int'eractive Configuration Utility provides a
query-based tool that configures the i RMX
88-based application_ Responding to questions
from the ICU utility program executing on a Series
IIIlnteliec Microcomputer Development System or
an iRMX 86-based system, the user quickly tailors
the real-time application system.
The file types are a compatible subset of the iRMX
86 Basic 110 System with a flat (non-hierarchical)
directory.
Bootstrap Loader
110 System
The iRMX 88 110 System provides an extensive
facility for device-independent 110. Through a
series of supplied iRMX 86 compatible device
drivers, the 110 System supports a wide-range of
iSBC peripheral controllers. Custom peripheral
controllers are supported through user-written ,
device drivers which are integrated with the 110
System at system configuration time. The deviceindependent nature of the system allows use of
different devices without application redesign.
The 110 System (IDS) procedures manage real-time
file operations supporting both sequential and
random access (see Table 3). The IDS maximizes
system throughput by allowing multiple disk
operations to proceed in parallel. For example,
The iRMX 88 IDS has a Bootstrap Loader which
loads a file from mass storage into system
memory. The configurable Bootstrap Loader loads
the file from a specific device, automatically from
the first-ready device of, a designated device list,
or accepts the file name from a terminal. Storing
the system software on disk allows easier future
changes to the application system.
Run-Time Interface
The iRMX88 Executive provides the User Run-time
Interface (URI). This URI interface, in addition to
encompassing the 110 System services, provides
additional functionality for tasks. The additional
functionality includes a trap function and memory
management routines which provide the run-time
foundation for PASCAL-86, FORTRAN-86, or
PUM-86 coded application tasks.
Table 3_ 1/0 System Services
Data Transfer
Services.
File Connection
Services
Volume Preparation
SERVICE
FUNCTION
CLOSE
OPEN
READ
SEEK
TRUNCATE
WRITE
ATTACH
CREATE
CONNECTION STATUS
DELETE
DETACH
RENAME
FORMAT
Closes a file connection·.
Opens a file connection for access.
Reads a number of bytes from a file.
Seeks to the indicated position within a file.
Truncates a file.
Writes a number of bytes to that file.
Attaches to a file connection.
Creates a file and returns a file connection.
Returns the file connection status.
Marks the file for deletion.
Detaches a file connection.
Renames an existing file.
Formats the disk for files.
AFN'()1706A
2-28
intJ
iRMXTM 88
SPECIFICATIONS
Intellec® System Configuration and
Generation Requirements
Series III Intellec Microcomputer Development
System with UDI support and a minimum of 2
diskette drives.
IRMX™·Based Configuration and
Generation Requirements
iRMX 86-based system with UDI support and a
minimum of2 diskette drives.
Supported Hardware
ISBC™ SUPPORTED MICROCOMPUTERS
iSBC
iSBC
iSBC
iSBC
iSBC
iSBC
iSBC
86/05 Board
86/12A Board
86/14 Board
86/30 Board
88/25 Board
88/40 Board
88/45 Board
MULTIMODULE™ BOARDS
iSBX 218 Flexible Disk Controller (when used with
the iSBC 215 Controller)
iSBC 337 Numeric Data Processor
iSBX 351 Serial 110 Board
CUSTOM IAPX 86, 88·BASED SYSTEMS
REQUIREMENTS
8253 or 8254 Programmable Interval Timer
8259A Programmable Interrupt Controller
8251A USART or iSBX 351 board (when the Terminal Handler is configured into the system).
8087 Numeric Processor Extension (when NPX
tasks are configured into the system).
Reference Manuals (supplied)
143238 - Introduction to the iRMX 80/88 RealTime Multitasking Executives
143241 - iRMX 88 Installation Instructions
MASS STORAGE
143232 - iRMX 88 Reference Manual
iSBC
iSBC
iSBC
iSBC
iSBC
iSBC
iSBC
142603 - iRMX 80/88 Interactive Configuration
User's Guide
204 Flexible Diskette Controller
206 Flexible Disk Controller
208 Flexible Disk Controller
215A Winchester Disk Controller
215B Winchester Disk Controller
220 SMD Disk Controller
254 Bubble Memory Board
142926 - Guide to Writing Device Drivers for the
iRMX 86 and iRMX 88 110 Systems
AFN·OI708A
2-29
iRMX™ 88
ORDERING INFORMATION
Part Number Description
Part Number Description
RMX 88 ABY
Single Density ISIS media. In·
cludes incorporation fee
buyout.
RMX 88 BBY
Double Density ISIS media. In·
cludes incorporation fee
buyout.
RMX88 DBY
Single Density RMX·86 media.
Includes incorporation fee
buyout.
RMX88 AWX
One year Single Density ISIS
media update service.
RMX88 BWX
One year Double Density ISIS
media update service.
RMX 88 DWX
One year Single Density
RMX·88 media update service.
RMX 88 LST
Human readable source lis.tings
for iRMX 88 software.
RMX 88 LWX
Update service for human
readable source listings.
RMX 88 RF
Incorporation fee.
RMX88
RMX88 ARO
A licensed product which in·
cludes Nucleus, Terminal
Handler, Free Space Manager,
and 110 System object modules.
Package also includes UDI·
compatible Interactive Config·
uration Utility program for
system generation and a com·
plete set of manuals. Purchase
price includes an iRMX 88
Customer Training Course
credit.
Single Density ISIS media. Re·
quires derivative work incor·
poration fee.
RMX 88 BRO
Double Density ISIS media. Re·
quires derivative work incor·
poration fee.
RMX 88 ORO
Single Density RMX·86 media.
Requires derivative work incor·
poration fee.
2-30
PRECONFIGURED iRMX™ 86
OPERATING SYSTEM
• Ready-to-run Preconflgured iRMX™ 86
Operating System for ISB~ systems
• Direct support for Intel on-target
compilers and development tools
• Efficient realtime multitasking
scheduler with 255 priority levels
• Simple program load and debug with
Bootstrap and Monitor In 2732A
EPROMs
• Device drivers included for diskettes,
Winchester hard disks, serial
terminal Interface, and parallel line
printer
• Complete support of 8087 numeric
processor extension
• Direct support of Independent
software vendor compilers and
applications
• A complete, high-performance,
execution engine for UDI applications
The Intel Preconfigured iRMX 86 Operating System is a flexible, realtime; and multitasking system which
is configured to run on a low-cost, iSBC 86-based hardware system_ The iRMX 86 Operating System is
designed to provide a structured and efficient environment for many time- and performance-critical applications such as factory automation, business data and text processing, medical electronics, data communications and process control. The Preconfigured System provides this environment without requiring
specific hardware and software configurations. Based on the UOI software interface architecture for optional compilers and interpreters, the iRMX 86 PC System supports development of sophisticated applications using the target hardware. A ready-to-use comprehensive human interface provides advanced services including creating and maintaining a hierarchical file system, entering the debug monitor and
backing-up diskette volumes.
SOFTWARE INTERFACE ARCHITECTURE
UNIVERSAL DEVELOPMENT
INTERFACE
(UDlj
UNIVERSAL RUN· TIME
INTERFACE
IUIUI
STANDARD I/O INTERFACES
REAL TIME NUCLEUS
MUL TlPAOCESSING SYSTEMS IUS
MULTIBUS
Figure 1. IRMXTM 88 PC Support for Standard Interfacas
The follOWing are trademaltt. of Intel Corporation and may be used only to desCribe Inte' products Intel, CREDIT. Index, Inslte, Intallee, Library Manager, Megachaasls,
Mlcromap. MULTIBUS, PROMPT. UPI,,,$cope, Promware, MCS, ICE, IRMX••sac,
MULTI MODULE and ICS Inte' Corporation IllUmes no responsibility for the use of any
CircUitry other than CirCUitry emboched In an Inte' product No other CirCUit patent IIc.n••••r. Implied
,sax,
© INTEL CORPORATION. 1982
M." •• 1982
0 _ Nu...... : 21CMH-OOl
2-31
IRMX™ 86 PC
The Preconfigured iRMX 86 Operating System is a
complete set of system software modules that are
ready-to-run in a simple MULTIBUS system consisting of an iSBC 86 computer, memory, and a
diskette controlleJ board. All the features of the
iRMX 86 Operating System are provided along with
a bootstrap monitor to load the system diskette into the system.
These commands are especialiy useful for managing user programs and data stored on diskettes.
File Management
The iRMX 86 PC file management system allows
users to access information on diskettes by referring to a file with its ASCII name. The names of
files stored on a disk are catalogued in special
files called directories. As directories are themselves named files, the iRMX 86 file system allows
directories to contain the names of other directories. This leads to a hierarchical file structure as
illustrated in Figure 2. This structure is useful for
isolating file names of particular applications, and
for tailoring the system's data to the requirements
of users and applications sharing storage devices.
The Preconfigured iRMX 86 System provides both
implicit and explicit management of system
resources. These resources include the processor's
time and registers, up to one megabyte of system
memory, independent interrupt sources, all input and
output devices, as well as directory and data files
contained on diskettes or 8" Winchester disks.
FUNCTIONAL DESCRIPTION
In applications where computers are required to
perform many functions simultaneously, the iRMX
86 Operating System provides a multiprogramming environment in which many independent,
and optionally multitasking, applications may run.
Each application environment may be treated separately to allow application programmers the flexibility to separately manage each application's
resources. A complete description of the iRMX 86
Operating System can be found in the iRMX 86
Data Sheet (Order Number: 210330).
6
D
FILE
DIRECTORY
DIR
(OTHER)
User Commands
The iRMX 86 PC System provides a number of
powerful tools necessary for the development of
microcomputer applications. They are included on
the system disk and brought into memory when
needed to perform the functions listed in Table 1.
URXSML
URXCOM
URXLRG
UOI
LIB
LIB
LIB
EXT
Figure 2. IRMXTM 86 PC System Disk Directory Tree
I
Table 1. IRMXTM 86 PC Commands
Command
AITACHDEVICE
BACKUP
COpy
CREATEDIR
DATE
DELETE
DEBUG
DETACH DEVICE
DIR
FORMAT
RENAME
RESTORE
SUBMIT
TIME
VERIFY
Function
Gives a logical name to a specific disk, CRT, or Printer device
Copy directories and files from one device to another
Copy one or more files to one or more destination files
Create a directory file to store the names of ~ther files
Set the system calendar
Delete a file or directory
Enter the System Monitor
Remove a device from the system
List the names, sizes, owners, etc. of the files. contained in a directory
Prepare a new diskette volume for use
Change the name of a file
Recreates a volume saved by BACKUP
Start the processing of a series of commands stored in a file
Set the system time-of-day clock
Verify the structure of an iRMX 86 Named File volume, and check for possible disk data errors
AFN·02202A
2-32
IRMX™ 86 PC
Figure 2 also shows the siructure of the directories on the iRMX 86 PC system diskette. It contains all the programs and commands that make
up the iRMX 86 PC System. Users may add other
files and directories anywhere in the structure.
Whenever an operator makes a request to use one
of these files, the System will search the appropriate directory tree in order to find the necessary
informati,on about the file's size, access rights,
and specific location on the diskette. Applications
may also refer to a specific file or group of files by
specifying the directory from which to start the
search.
Universal Development Interface (UDI). Figure 1
shows how this interface provides iRMX 86
systems the capability of using many compilers
and language translators. Th~se include the iAPX
86 and 88 Macro Assembler, and the PASCAL
86/88, PLiM 86/88, and FORTRAN 86/88 compilers
available from Intel. They also include a number of
other Intel development tools, and language translators and applications available from independent software vendors.
The standard UDI software interface establishes a
path to future Intel software products and opens
the door to a host of compilers, interpreters, and
application programs available from independent
software vendors. These UDI calls are easy-to-use
and are listed in Table 2. A more complete list of all
the system calls provided by the iRMX 86 PC
System can be found in the iRMX 86 Data Sheet.
Standard Interfaces
The iRMX 86 PC System supports a group of 31
easy-to-use standard system calls known as the
Table 2. UDI System Calls
System Call
Function Performed
Memory Management:
DQ$ALLOCATE
DQ$FREE
DQ$GET$SIZE
DQ$RESERVE$10$MEMORY
Creates a segment of a specified size for use by the application.
Returns the specified segment to the system'.
Returns the size of the specified segment.
Reserves memory for use by 110 operations.
File Management:
DQ$AITACH
DQ$CHANGE$EXTENSION
DQ$CLOSE
DQ$CREATE
DQ$DELETE
DQ$DETACH
DQ$OPEN
DQ$READ
DQ$RENAME
DQ$SEEK
DQ$TRUNCATE
DQ$WRITE
DQ$FILE$INFO
DQ$CHANGE$ACCESS
Creates a connection to a specified file.
Changes or adds an extension to a file name.
Closes the specified file connection.
Creates a Named File for use by the application.
Deletes a Named File.
Closes a file and deletes its connection.
Opens a file for a particular type of access.
Reads the next sequence of bytes from a file.
Renames the specified Named File.
Moves the current position pointer of a file.
Truncates a file.
Writes a sequence of bytes to a file.
Returns information about the specified file.
Changes the access rights of the specified file.
Process Management:
DQ$EXIT
DQ$GET$CONNECTIONS$STATUS
DQ$OVERLAY
DQ$SPECIAL
Exception Handling:
DQ$GET$EXCEPTION$HANDLER
DQ$DECODE$EXCEPTION
Exits from the current application job.
Returns the current status of the specified file connection.
Causes the specified overlay to be loaded.
Performs speci,al 1/0 related functions on terminals with special control
features.
Returns a pointer to the program currently being used to process errors.
Returns a short description of the specified error code.
AFN 02202A
2-33
IRMX™86 PC
Table 2. UOI System Calls (con't.)
Function Performed
System Can
Exception Handlirig (con't.)
DO$TRAP$EXCEPTION
Identifies a custom exception processing program for a particular type of
error.
Identifies a custom handler for processing CNTUC keyboard inputs.
DO$TRAP$CC
Application Assistance:
DO$GET$ARGUMENT
Returns the next argument from the character string used to invoke the
application program.
Returns the name of the underlying operating system supporting the UDI.
Returns the current time of day as kept by the underlying operating
system.
Selects a new buffer from which to process commands.
Returns date and time in ASCII characters.
DO$GET$SYSTEM$ID
DO$GET$TlME
DO$SWITCH$BUFFER
DO$DECODE$TIME
iRMX 86 System directly. The iRMX 86 PC System
includes a separate diskette with the complete set
of iRMX 86 multitasking system call declarations for
those programmers requiring more function than is
supplied by the UDI.
Simple System Start-Up
The iRMX 86 PC system includes a comprehensive
Monitor and Bootstrap Loader in four 2732A
EPROMs. These programs have been configured
to support the hardware shown in Figure 3. As
shown, the Monitor is capable of communicating
with an Intellec Microcomputer Development
System. This communications link can be used to
transfer programs and data between an iRMX 86
System and the Intellec Development System.
Debugging Aids
The iRMX 86 PC System includes a System
Monitor that provides the capability of debugging
one task at a time. The monitor includes instructions for examining and modifying the contents of
all 8086 and 8087 registers, setting system breakpOints, single-stepping, examining and modifying
system memory, executing CPU I/O, and disassembling program instructions.
This start·up system provides a perfect environment for the development and efficient execution
of applications programs. When these programs
require different I/O devices or a different software
configuration, they can be moved to any other
INTEllEC"
DEVELOPMENT
SYSTEM
PARAllEL
PORT
2732A EPROMS
(WITHl~~~~~T:~~ _ _-H,--_..j.
MONITOR)
MEMORY BOARD(S)
Figure 3. Hardware Configuration of PC System
AFN·02202A
2-34 .
IRMX™ 86 PC
SPECIFICATIONS
Getting Started with the iRMX 86 System
(144340-001) (Included in PC System Package)
Optional Intel@ Software Products
Introduction to the iRMX 86 Operating System
(9803124-03)
iRMX 86
Fully configurable iRMX 86 Realtime
Operating System
iRMX 860 iRMX 86 Development Utilities Package including the iAPX 86 and 88
linker, Locater, and Macro Assembler,
librarian, and the iRMX 86 Editor
iRMX 861 PASCAL 86/88 Compiler for execution
on iRMX 86 Systems
iRMX 862 FORTRAN 86/88 Compiler for execution on iRMX 86 Systems
iRMX 863 PUM 86/88 Compiler for execution on
iRMX 86 Systems
iSBC 957B iAPX 86 System Monitor and Microcomputer Development System Com·
munications link
iRMX 86 Installation Guide (9803125-04)
iRMX 86 Configuration Guide (9803126-04)
iRMX 86 NUCLEUS Reference Manual (9803122-03)
iRMX 86 Terminal Handler Reference Manual
(143324-01)
iRMX 86 Debugger Reference Manual (143323-01)
iRMX 86 Basic 1/0 System Reference Manual
(9803123-04)
iRMX 86 Loader Reference Manual (143318-01)
iRMX 86 Extended 1/0 System Reference Manual
(143318-001)
iRMX 86 Human Interface Reference Manual
(9803202-002)
Supported Hardware Products
ISBC® MULTIBUS® PRODUCTS
iRMX 86 System Programmer's Reference Manual
(142721-003)
iSBC 86/12A, 86/14, and 86130 Single Board Com·
puters
Guide to Writing Device Drivers for the iRMX 86
and iRMX 88110 Systems (142926-003)
iSBC 208 Flexible Disk Controller
iRMX 86 Programming Techniques (142982-002)
User's Guide for the iSBC 8578 iAPX 86,88 Interface and Execution Package (143979-002)
PERIPHERAL DEVICE
CRT -
RS232 at 9600 Baud
Printer - Centronics-type Parallel Interface
iRMX 86 Disk Verification Utility Reference Manual
(144133-001 )
Diskettes - 2 to 4 Single- or Double-Density,
Single- or Double·Sided
iRMX 86 Pocket Reference (142861-002)
Edit Reference Manual (143587-001)
Memory Requirements
Runtime Support Manual for iAPX 86,88 Applications (121776-001)
200K Bytes to support applications less than 16K
Bytes.
.
Guide to Using iRMX 86 Languages (143907-001)
384K Bytes to support Intel's PASCAL 86 Compiler.
Reference material may be ordered from any Intel
sales representative, distributor oftice, or from
Intel literature Department, 3065 Bowers Avenue,
Santa Clara, CA 95051.
256K Bytes to support Microsoft's Basic Interpreter and a 32K Byte user program and data
space.
Training Courses
Reference Material
Introduction to the iRMX 86 Operating System
iRMX 86 Operating System Data Sheet (210330)
iRMX 86 1/0 System Concepts
AFN 02202A
2-35
ORDERING INFORMATION
The IRMX 86 PC System Is provided on a doubledensity, iRMX 86 compatible system diskette (format type E). The iRMX 86 PC System is shipped
with a comprehensive users' manual ("Getting
Started With The iRMX 86 System), Bootloader and
Monitor EPROMs, and the complete iRMX 86 Interface Libraries contained on a second diskette. A
full year of Intel Support Level D (Software Problem
Report Service) is included. This Intel copyrighted
system is licensed as a single-use software product
as defined by Intel's Master Software Licenses.
Order Code
Description
RMX 86PC E
Complete Preconfigured iRMX
86 Operating System with interface libraries, bootstrap monitor,
and user documentation. \
2-36
inter
iOSP™ 86
iAPX 86/30 AND iAPX 88/30 SUPPORT PACKAGE
• Compatible with Intel PL/M 86/88,
PASCAL 86/88, FORTRAN 86/88, and
iAPX 86/88 ASSEMBLER
• Development and run·time support for
iAPX 86/30 and 88/30 Operating
System Processors
• Supports (P)ROM or RAM based
system
• Total iRMX™ 86 Operating System
software compatibility
• Complete system initialization aids
• Complete system configuration aids
• Extendable with iRMX™ 86 Operating
System calls
• OSP Interactive. Configuration Utility
The Intel iOSP 86 Support Package for the iAPX 86/30 and 88/30 Operating System Processors contains a
comprehensive set of easy-to-use tools necessary to develop (P)ROM or RAM-based applications that use
the 80130 Operating System Firmware component. All of the system initialization and run-time facilities
are provided in libraries that may be configured to specific requirements, and linked to application programs 'written in either iAPX 86 or iAPX 88 Assembler or a high level programming language such as
PASCAL 86 and PUM 86. The iOSP 86 Package provides users with the basic initialization and interface
routines needed to build application software based on the fundamental operating system functions of the
iAPX 86/30 and 88/30 Operating System Processors. The iOSP 86 Package also enables users to add higher
level I/O functions from the fully compatible iRMX 86 Operating System, or to form custom, real-time
systems.
-
The fOllOWing are trademarks of Intel Corporation and may be used only to describe Intel products Intel, CREDIT, Index, Inslte, 1ntellee, Library Manager, MegachasSl5.
Mlcromap. MULTISUS, PROMPT, UP!, p.Scope. Promware, MeS, ICE, ,RMX, ,sac, tSBX, MUlTIMODULE, IOSP and les Intel Corporation assumes no responsibilIty for the useel
any circUitry other than Circuitry embodied In an Intel product No other Circuit patent hcense~ afe ~n1phed
,
t
OCIO~', 1881
Order Numb.r: 2102,..001
INTELCORPORATION.1981
2-37
iOSP™ 86
FUNCTIONA,L DESCRIPTION
The iAPX 86/30 and iAPX 88/30 Operating System,
Processors (OSPs) provide an easy-to-use foundation on which many real-time applications may be
built. They provide the functions and system support needed to implement bot~ simple and complex applications that require multiple tasks to run
concurrently (see Figure 1). These services are
made possible by the addition of the five new data
types integrated into the 80130 Operating System
Firmware (OSF) component. The 80130 OSF extends the basic data types of the CPU (integer,
byte, character, etc.) by adding new system data
types (JOB's, TASK's, MAILBOX's, SEGMENT's,
and REGION's), and extensive timer, interrupt,
memory, and error management designed to give
real-time response to multitasking and multiprogramming applications. As shown in the second half of the figure, other operating system functions such as mass storage 1/0 services and an
easy·to-use Human Interface can be added easily,
by using modules from the complete operating
system services of the i RMX 86 Operating System.
The iOSP 86 Support Package provides both an interface between application software and the
Operating System Processors, and development
tools designed to make the implementation and
initialization of real-time, multitasking systems
much simpler.
The iOSP 86 Support Package provides system
developers with the configuration options necessary
to tailor the iAPX 86/30 and 88/30 Operating System
Processors to custom applications. Central to the entire configuration process is the OSP Interactive
Configuration Utility (OSPICU). This utility is an easyto-use tool which allows you to make configuration
decisions by responding to screen-oriented displays.
Using the ICU, users can form easy-to-use initializa-
tion routines, and support code. The interface
libraries form a simple interface between application
software and the operating system primitives of the
80130 OSF component. The various configuration
options include:
Memory and 110 Addressing
The 80130 OSF requires a 16K byte block of
memory address space to be reserved for accessjng
internal functions. The iOSP 86 Support Package
is used to specify the base address of the 80130
and the beginning of the initialization routines.
All, Interrupt and Timer management of the OSF is
controlled via a reserved 16-byte I/O address block
that may be selected by the user. In addition, from
1 to 7 slave 8259A interrupt controllers can be
specified in order to provide the system with up to
57 priority interrupt sources. The OSF baud rate
generator may also be configured to support an
optional terminal interface.
Ex~ending the 80130 OSF
The 80130 OSF allows users to add their own
operating system extensions. These extensions
may take advantage of the detailed and efficient
intertask communication and synchronization
primitives already provided by the 80130, and/or
may utilize custom functions tailored to specific
applications. The Support Package also enables
users to extend the OSF with the extensive services of Intel's iRMX 86 Operating System, thereby
allowing applications to grow without having to
change or alter application software already written, or having to write other operating system software. Use of the 80130 with the iRMX 86 Operating
system greatly reduces the amount of memory
needed for the i RMX 86 Nucleus layer, and enables
applications to take advantage of the increased
COMPLEX
APPLICATION SOFTWARE
COMPILERS
MULTITASKING. REAL·TlME
APPLICATION SOFTWI.RE
HUMAN INTERFACE
EIOS
BASIC 110 SYSTEM
IRMX" 86 NUCLEUS
10SP" ,6 INTERFACE LIBRARIES
~7
(OPTIONAL)
I
10SP" 86 INTERFACE LIBRARIES
~6
OR
~6
I
80130
8087
(OPTIONAL)
I
8086
OR
~8
I
80130
Figure 1_ Structure of Typical Systems
AFN-- 60
THEN 00,
AC*CVCLE.cDUNT-o.
CM.L. RCiISIGNALIINTERRUPTCACIINTERRUPTILEVEL.
eAC'EXCEPT~OOE) •
END.
aBE CALL RClM:X]TIINTERRUPT(ACIINTERRUPTILEVEL.
IACtEXCEPTICODE) I
END At.HANDLER,
Example 5.
eG-l1z A.c' Interrupt Handler
, In its initialization phase, TIME$TASK sets up the
interrupt handler by calling the RQ$SET$
INTERRUPT routine. The body ofTIME$TASK (the
execution phase) is just a series of nested loops counting hours, minutes, and seconds. When TIME$TASK
calls .RQ$WAIT$INTERRUPT inside its biner-most
loop, the OSP suspends execution of the task until
AC$HANDLER signals that another second's worth
of A.C. cycles has elapsed. Thus, interrupt handlers
can serve to "pace" interrupt tasks. After a day,
TIME$TASK completes and deletes itself.
DECLARE SECONDtCOUNT BYTE.
PlINVTE.CDUNl' BVTE.
HOURtcOUNT BVTE.
Tlf'tE'TASK • PROCEDURE.
DECLARE Tlf1E.EXCEPT'CDDE WORD.
AC.CYCLE'COUNT-O.
CALL RGUET.INTERRUPTCAC.INTERRUPT.LEVEL.01H.
INTERRUPTfPTR (ACfHANDLER ). DATA.BEQ.AImR BASE.
tTItE.EXCEPT.CODE) •
CALL "GtRESUI1E'TA~K( INlT.TASK.TOKEN. tTIME'EXCEPT.CODE).
DO HOURfCOUNT=O TO 23.
DO l'lINUTE'COUNT-= '0') AND (CONSOLEtCHAR
THEN DO.
Initialization Task
DO CASE
'9')
(CONSOLE.CHAR- '0'),
CALL PRINT_TOO,
CALL PRINT.STATUS,
Now that the application tasks have been written, we
can write the initialization task.
CALL RO.SUSPENDtTASK(CRTtOUTtTASKtTOKEN.
.COMMANDtEXCEPT.CODE) ,
CALL RO.RESUME$TASK (CRT$OUT.TASK.TOKEN,
.COMMANDSEXCEPTSCODE) ,
CALL RQSDISABLE(AC.INTERRUPTSLEVEL,
@COMMAND.EXCEPT$CODEl,
CALL RQ.ENABLE(AC.INTERRUPT.LEVEL,
@COMMAND.EXCEPT$CODEl,
CALL ROSSUSPEND.T ASK (MOTORST ASKSTOKEN,
aCOMMAND.EXCEPTtCODE) ,
CALL RO$RESUME.TASK (MOTOR$TASK$TOKEN,
@COMMAND.EXCEPTtCODE).
CALL RQ$SUSPEND$TASK(STATUS.TASK.TOKEN,
aCOMMANDSEXCEPTtCODE) •
CALL ROSRESUMESTASK (STATUS$TASK$TOKEN,
ctCOMMAND.EXCEPTtCODE) •
END,
1* OF CASE-LIST *1
1* OF COMMAND PROCESSING *1
All applications require a special type of task to initialize system variables and peripherals and create tasks
and other objects used by the application. It, too, is
written as a PUM procedure, and can thus be divided
conceptually into the same three phases.
Example 12 shows such a task for the demonstration
system. The first thing INIT$TASK does is determine
the base address of the job data segment by assigning
pointer DATA$SEG$PTR with its own address. Next it
calls the RQ$GET$TASK$TOKENS routine, which
tells the task what token value the OSP assigned it at
run time. It then initializes the system peripherals by
creating the hardware initialization task discussed
above; this code could have been integrated into
INIT$TASK itself just as easily. During its own
"execution" phase, INIT$TASK calls routines to
create the OSP data structures shared by the application tasks: the REGION controlling access to the
USART, and the MAILBOX repository for output messages. INIT$TASK creates the application tasks themselves by calling RQ$CREATE$TASK.
END
END;
END,
COMMAND"TASK,'
Example 11. Task to Accept and Process Keyboard
Commands
INITSTASK PROCEDURE PUBLIC.
DECLARE INIT'EXCEf!TSCODE WORD,
DATA.SEGSPTR=@INITSTASKSTOKEN.
I*LOAD DATA SEGMENT BASE*I
CRT.MAILBOX$TOKEN=ROSCREATE$MAILBOX (0, I1INIT$EXCEPTSCODE),
CRT.REG ION$TOKEN=RQSCREATESREGION( 0, ItINITSEXCEPTSCODE),
INIUTASK.TOl'.EN=RG.GETSTASK.TOKENS (a. (tINJ T'iiEXCEPT.CODE),
HARDWARE. I N I T.T ASK.TOKEN=RO$CREATE.TASK
(110. I1HARDWARESINIT.TASK. DATA.SEG.ADDR BASE. O. 300.
O.I:INlTtEXCEPT.CODEl,
CALL RG.SUSPEND$TASK (0, (UNIT.EXCEPT.CODE)!
STATUS.TASKSTOKEN=RG.CREATE.TASK( 110•• STATUS.TASK,
DATAtSEG.ADOR BASE. 0. 300, 0. GtINIT.EXCEPTSCOOE) j
CALL ROtSUSPENO.TASK(O, (!INIT.EXCEPTtCODEl,
MOTORSTASK$TOKEN-RQ$CREATE'TASK( 110, IMOTORtTASK,
DATAtSEGSADDR BASE, 0, 300. 0. (fINITtEXCEPT$COOE).
CALL RG.SUSPEND.TASK(O, Cl:INIT$EXCEPT.CODEl.
TIME$TASKSTOKEN""ROSCREATE$TASK (I~O.I!TIME'TASK,
DATA$SEG$ADDR BASE. 0, 300, 0, .INIT$EXCEPTSCODE),
CALL ROSSUSPENO$TASK(O.@INIT.EXCEPTSCOOE),
CRTSOUT.TASK.TOKEN"'ROSCREATESTASKC 120, IICRTSOUT$TASK,
DATASSEGSADOR BASE, 0, 300, O. (!INITSEXCEPT$CODE).
CALL RQ.SUSPEND$TASKCO,@INITSEXCEPT$CODE),
COMMANOtTASKSTOKEN=RQ.CREATE.TASK( 130. (!CQMMAND$TASK.
DATASSEGSADDR BASE, 0. 300. O. \lINITtEXCEPT$CODEl,
CALL RGSSUSPENDSTASK C0, @INIT.EXCEPT$COOE).
CALL RQSENO$INITSTASK,
CALL RQSDELETESTASK (0, @INIT.EXCEPT$COOE),
END
INIT$TASK.
Though not always required, it is common practice for
the overall initialization task to suspend itself after
creating each offspring, to let the newborn task get
started. Under this convention, each offspring task
must resume the initialization task by calling the
Example 12. Task to Initialize System Software
Table 2. Special Console Commands
--- -- ----
Key
Function
0
Send Time-of-day message to CRT.
-
-~
.. -
---
1
Send status update message to CRT.
2
Suspend CRT output task. The OSP will automatically save messages tll the task
in the CRT mailbox queue.
3
4
5
6
7
Resume CRT output task. Queued messages will be displayed.
Disable 6O-Hz interrupt-driven time base. Time-of-day clock will stop.
Enable 6O-Hz time base to resume clock execution.
Suspend motor control task. Motor will stop.
Resume motor control task. Note that if task was suspended 17 times, it must be
resumed 17 times.
Suspend status polling task. Lights indicating system status will freeze in current state.
Resume status polling task.
8
9
<'""
CAll PROTECTED.CRT.CUT(eR),
CALL PROTECTED.CRT.O~T (IF),
2-73
AP-130
RQ$RESUME$TASK routine when its own local initialization is complete. This convention is called
synchronous initialization; its purpose is to ensure that
each task is allowed to complete its own start-up phase
before the next task is created. Otherwise, there's a risk
that higher-priority tasks created later could start executing before earlier tasks were ready for them, with (at
best) unpredicatable results.
Functions which return a byte or word value (i.e., typed
procedures) do so in the CPU AL or AX registers.
Pointers are returned through the ES:AX register pair.
The PLiM Programming Manual explains these conventions more fully.
One way to see how an assembly language routine
would interface with PUM is to first write a dummy
PUM procedure using th.e same parameter sequence as
the desired assembly language routine. Compile this
procedure with the compiler CODE switch set. The
listing will then include the appropriate assembly language instruction sequence, and may be followed as a
pattern for the final routine.
When all the tasks have been created, INIT$TASK has
served its purpose. It must then call RQ$SEND$
INIT$TASK. This short procedure (actually selfcontained in an OSP Support Package interface library,
not built into the 80130) tells the OSP that all the offspring tasks have been created for a given job. At this
point, INIT$TASK could continue with non-initialization activities. The code for KEYBOARD$TASK might
have been implemented here, for example. Since this
example has nothing more to do, INIT$TASK deletes
itself with a final call to RQ$DELETE$TASK.
SOFTWARE CONFIGURATIONS &
INTEGRATION
When the application code has been written and compiled, the hardest part of program development is over.
Before the code may be executed, though, the OSP
must be told various things about the system hardware
environment, desired software options, application job
characteristics, and so forth.
Code Translation
That's all, folks. Mix together the above code fragments, declare literals and global variables, and compile until done (about four minutes). The source file
name selected for this example is AP130.PLM. The
compiler will produce two files: an annotated source
listing (named AP130.LST) reproduced in toto in Appendix B, and a relocatable object file (AP130.0BJ)
which will be used in the installation procedure discussed next.
High-Level Parameter Passing
Conventions
This information is conveyed during a multi-phase sequence of steps collectively called the Configuration
process. Though the process is somewhat lengthy and
time-consuming, it is also v.ery "mechanical"; the person doing the work d,oes not need to understand any of
the application code or even know what it does. Normally, configuration would be performed by a technician or a single member of the programming team, aided
. by appropriate SUBMIT command files. This chapter
shows the full configuration and installation process for
the demonstration system. For more details, refer to
the osp User's Manual.
Well-designed programs generally rely on subprograms
("procedures" in PLiM terminology) for oftenrepeated instruction sequences, or to perform
machine-Ievel.operations within High-Level Language
programs. PUM-86 and other Intel high-level languages
use a standard set of conventions to pass parameters
and results between procedures; assembly language
. programmers are advised to adhere to these conventions for software compatibility.
The three phases of the configuration are:
I. Generating, linking, and locating OSP support code
.required for the EPROM immediately above the
80130 address space;
2. Linking and locating the object file for the application job developed in Section IV;
3. Creating, linking, and locating a short module
(called the Root Job) which initializes the OSP and
application jobs when system is reset.
Before calling a subroutine or function, input
parameters must be pushed sequentially onto the stack,
in the order (Ieft-to-right) they appear in the procedure
parameter list. When eight-bit parameters are pushed,
the high-order byte associated with them is undefined.
Thirty-two-bit pointer values are pushed in two steps,
offset word before base word. The stack "grows"
down, so the left-most parameter will have highestnumbered address.
Finally, of course, the absolute code resulting from each
phase must be programmed into EPROMs or loaded
into a test system before it can be executed.
Before starting, though, it is beneficial to draw up a
memory map for host system hardware, to determine
what sections of memory are available. This map will be
filled in as each module is linked and located.
2-74
AFN-02058A
AP·130
The prototype system memory space has two areas of
interest: addresses OOOOOH through 01FFFH contain
RAM, while OFCOOOH through OFFFFFH contain
EPROM. Since the CPU uses the first lK bytes of RAM
for the CPU interrupt pointers, and the last 16 bytes for
the restart sequence, these areas should be recorded on
the map. For reference purposes, Figure 11 also indicates that addresses OF8000H through OFBFFFH
enable the 80130 firmware. All this is shown in
Figure 11.
Generating the OSP Support Code
The OSP support code "customizes" the OSP firmware
for a particular hardware environment, initializes the
system, and supports extended software capabilities.
To define the hardware environment, the user creates a
source file which invokes a series of Intel-supplied
macros. Parameters for these macros specify the 80130
I/O base address, SYSTICK interval (in system clock
cycles), and how the interrupt request pins will be used.
For instance, the code example in Figure 12 defines the
prototype system hardware. This source file must be
assembled, linked with several libraries from the OSP
support disk, and located to produce the actual OSP
support code. Figure 13 shows the actual sequence of
commands needed. The DATA starting address specified within the LOC86 parameter list (00400H) is the
first free byte of system RAM (see Figure 11); the
CODE address (OF8000H) is simply the 80130 firmware
starting address.
{---
STARTING ENDING
ADDRESS ADDRESS
OFFFF:O OFFFF:F
MEMORY MODULE
EPROM
(212764)
OFCOO:O
80130 MEMORY SPACE
OF8OO:O
OFBFF:F
O1FF:F
"
RAM
8088 INTERRUPT VECTOR
0000:0
003F:F
APPLICATION JOB STARTING ADDRESS: _ _ _ __
~JOBSTARTlNGA~ESS: _____________
Figure 11. Example System Memory Map
'TITLE(S0130 DEVICE CONFIQURATION TABLE)
NAMEODEVCF
SINCLUDE( Fl NDEVCF MAC)
l(,MASTER_PIC(80130. 2000H. O. 0)
,SLAVE_PIC( SLAVE_TYPE.
BASE_PORT.
EDGE_VSj.EVEL.
MASTER .LEVEL )
l(,TIMER (80130. 2008H. 28H. 12500)
• NDP _SUPPORT ( ENCODED,.LEVEL )
END
Figure 12. 80130 Device Configuration Table
2-75
AP-130
FO ASMB6 . Fl' SUP 130 AS6 F'RINT( Fl SUP130 Lsn ERRORPRINT t,.
MACRO(BO) PAQEWIDTH( 132)
FO LIN~B6 eFI OSX LIB (OSX96. OSXCNF).
FI NUCI LIB(NBEQINl.
FI ODEVCF OB~.
FI OSX LIB.
Fl NUCl LIB.
FI.OSX LIB.
FI. NUC2 LIB.
. FI OSX LIB.
FI NUC4 LIB.
Fl OSX LIB,
Fl. NURSLV LIB.
a.
"
a.
a-
"
I<
I<
8<
I<
8c
8c
8c
Fl OSX LIB
TO FI SUPI30 LNK MAP PRINT( FI SUPI30 MPI) NAME (MINIMAL_BOI30)
FO LOCS6
FI SUPI30 LNK TO
SEQSIZE(STACK(O»
•
&:
FI SUPI30 MAP PRINT( FI SUPI30 MP2) SC(3) 8<
I<
ADDRESSESCCLASSES(CODE COFSOOOH), DATAC00400H»)
ORDER (CLASSES (DATA. STACK) )
OB~ECTCONTROLS(NOLINES.
8c
&:
NOCOMMENTS. NOSYMBOLS)
Figure 13. Support Code Conflguratlon'Commands
A reliable and relatively straightforward way to perform this step is to create a file containing the exact
command sequence shown in Figure 13 and execute
this file using the SUBMIT utility program. Of course,
the example assumes SUBMIT, ASM86, LlNK86,
and LOC86 are all on drive :FO:, and that the various
libraries have been copied from the support disk to
drive :Fl:. /
(An alternate, support-code configuration scheme lets
the user modify the OSP software characteristics in
special situations. A programmer working with iRMX
86; for instance, may wish to augment the OSP
firmware to support all the iRMX Nucleus primitives.
This would be done by editing and assembling file
OTABLE.A86 to select from a menu of software options, and modifying the linkage step slightly to include
one of the iRMX 86 libraries. The OSP built-in features
are more than sufficient for the purposes of this note,
though, so only the first approach is illustrated.)
Appendix D reproduces the Locate map file produced
during this phase. Near the end of file SUP130.MP2 is a
table of memory usage, showing that the last bytes of
RAM and ROM consumed are OOA6: FH and OFC61:
FH, respectively. Update Figure 11 with this information. (The final version 'of the demonstration-system
memory map appears in Appendix C.) This phase
needn't be repeated unless the system hardware characteristics change.
Application Code Configuration
After compiling the application job, it must be linked
with a library of interface routines from the support
diskette; and located within· available memory. Use
RPIFC.LlB or RPIFL.LlB, depending on whether the
job was compiled with the Compact or Large software
model. Figure 14 is a command sequence file suggested
for this purpose. Again, the starting addresses specified
for LOC86 are taken from the system memory map.
Whenever the support code is reconfigured, check
SUP130.MP2 to see if its memory needs have changed.
If so, the application-job-configuration command file
. will need to be edited. This is still aJot simpler (not to
mention more reliable) than retyping ~e whole sequence each time application jobs are revised. Readers
familiar with the capabilities of the SUBMIT program
may prefer to represent these variables by parameters,
such that they may be easily specified each time the
command file is invoked.
As in the first phase, examine the locate map
("AP130.MP2", reproduced in Appendix E) after the
application code has been configured and update the
memory map. Also, note the segment and offset values
assi8ned to the initialization task. These will be needed
later.
2-76
AP-130
Creating the Root Job
By now, all of the code needed to execute the application program has been prepared and is ready to run
-except it has no way to get it started! The OSP hardware and system data structures must be initialized
before INIT$TASK can be created. A short module
called the Root Job performs this function.
Figure 15 is the Root Job source file for the demonstration system, dubbed RJB130.A86. It consists ofjust five
macro calls. The %JOB macro defines certain characteristics of the applicationjob; for a full description see
the asp User's Manual. One of these parameters is the
initialization-task starting address (noted in the last
step), which will likely change with each iteration of the
application software.
The process closely resembles the one which produced
the OSP support code. First, determine various system
characteristics. Then create a file defining these characteristics as macro input parameters. Finally, assemble,
link, and locate the file to produce the final code.
The two %SAB macros define "System Address
Blocks" -sections ofthe overall memory space which
the OSP should not consider "free space." Note that
the first invocation blocks off the RAM addresses consumed so far in the memory map, plus an extra 140H
bytes reserved for the Root Job initialization stack.
SUBMIT FILE TO LINK APPLICATION ..JOB TO INTERFACE LIBRARY
AND LOCATE RESULTING OUTPUT.
REVISED 10/23/91 - .JHW
LINK86 Fl AP130.0BJ.
Fl'RPIFC LIB TO
MAP PRINT(' Fl' AP130 MPl)
Fl.AP130 LNK
&:
LOC86 Fl AP130 LNK TO : Fl AP130
&
ORDER CCLASSES(DATA, STACK. MEMORY»
@,
SEQSIZE (STACK (0»
&!
ADDRESSES (CLASSES (DATA (OOA70H).
~
CODE (OFC620H»)
&
MAP PRINT ( Fl AP130 MP2)
&:
OB,JECTCONTROLS (NOLINES. NOCOMMENTS. NOPUBLICS. NOSYMBOLS)
OHB6
Fl AP130 TO
COPY
Fl AP130 MPl TO . LP:
Fl AP130. H86
COPY
Fl AP130 MP2 TO
LP
Figure 14. Job Configuration Commands
,SOURCE PROGRAM DEFINING CHARACTERISTICS OF ROOT .JOB FOR
,AP-130 DEMONSTRATION PROGRAM
(JHW - 10/2'/81)
SINCLUDE( Fl CTABLE MAC)
'Y.SAB(O. ooeo. U)
'Y.SAB C0200. FFFF. U)
'Y.JOBCO. DeOH. loaH. OFFFFH. OFFFFH. 1.00.1. 0,100. OFC62' 06B5. O. 0 0, 200H. 0)
'Y.DSX
WFBOOOH, N)
'Y.SYSTEM(FBOQ, Q, 4. N. N. 1)
END
Figure 15. Root Job Configuration File
2-77
AFN-0206IIA
AP-130
(After completing this phase, examine RJB130.MP2 to
confirm that 140H is the correct number.) The second
%SAB invocation excludes addresses 02000H through
OFFFFFH, all of which is non-RAM, either EPROM,
80130 firmware, or non-existent. The %SYSTEM
macro defines system-wide software parameters.
UPM memory buffer. The three commands in Figure 18
perform this function.
When the final system is reset, execution must branch
into the root job initialization sequence. When the absolute code modules have finished loading, manually
patch a jump instruction into the buffer area corresponding to the CPU reset vector. The opcode for the
8086 or 8088 intersegmentjump is OEAH; the instruction's address field must contain the address assigned to
label RQ$START$ADDRESS (read from the root job
locate map), the 16-bit segment offset (low byte first)
followed by the segment base address (ditto). The UPM
CHANGE command shQuld be used to make this
patch, as illustrated in Figure 19.
Figure 16 is a command file to translate, link, and locate
the root job. Once again, the LOC86 parameters come
from Figure 11. The listings produced during this phase
are reproduced in Appendix R The final memory map
appears in Appendix C.
EPROM Programming
We are now ready to program EPROMs with the program modules linked and located above. Intel's Universal PROM Programmer (UPP) and a control program
called the Universal Prom Mapper (UPM) will be used
in this step. Particular commands to the UPM will vary
with program size, memory location, and EPROM type,
but the general sequence should resemble that shown
here.
'
The UPM memory buffer now contains a complete
image of the code needed for the system EPROMs. Up ,
until now, all software-related steps-'-source code
preparation, translation, linking and locating-have
been the same for 8086- or 8088-based systems. At this
point, however, the software installation procedures
diverge slightly.
The first step is to invoke UPM and initialize the programming system, following a command sequence
similar to that in Figure 17. The example system incorporates two 2764 devices, so 16K bytes of memory
buffer are cleared.
Recall that the 8086 fetches instructions 16 bits at a
time, from coordinated pairs ofEPROMs. One contains
only even-numbered program bytes, the other, odd. To
separate the linear UPM buffer into high- and low-order
bytes for iAPX 86/30 designs, use the UPM STRIP
command as shown in Figure 20.
Next, all the final code modules produced above (e.g.,
SUP130, AP130, and RJB 130) must be loaded into the
Now "burn" the EPROMs with the PROGRAM command in Figure 21.
LINK AND LOCATE THE lRMX 86 ROOT JOB
MODIFIED FOR TWO-DRIVE OPERATION
REVISED 10/25 - JHW
ASM86
f1 RJB130 AB6 MACRO(75)
LINK86
.p1 CT'oot 11b(root),
~
.p1 RJB13Q obJ.
&
fi croot llb
&:
TO
.pi RJD130 1nk
&
MAP PRINT( fl1 RJB130 mp 1)
LoeS6
f:1 RJB130 Ink
TO
Fl RJIiI130
MAP PRINT( f l RJB130 mp2)
De
Figure A-1. Example System Schematics
I
AP-130
G1
1
A11
EN1G
2 S1A
A12
3 S1B
ElilCS
11
~
• ,VO
5 IV1
mcs
6 IY2
EIi4CS
7 IV3
GN~
Vee
~+5
•
15
EN2G
S2A ,.
O!
r!!1
f8
S2B 13
2YO 12
OR1CS
2V1 11
OR2CS
2Y2 10
OR3CS
OR.CS
2V3 9
GND
3
D3
03
AO
13
12
1
2
8
03
12
13
04
11
10
9
F1
A15
A13
A1'
(80130)=
USART
1
•
3
f---1
EN1G
S1A
S1B
IVO
IV1
e-s
6 IY2
.PRll'e-s
7 IV3
~
f8
~GNO
Vee JL+5
15
EN2G
S2A 1L-A1.
S2B ~A15
12
'VO
2Y1 11
2Y2 10
2V3 9
?
LEPCS (2764)
MEMCS (80130)
MEPCS (2764)
Figure A-1. Example System Schematics (continued)
2-82
AfN.()2058A
AP-130
APPENDIX B
,
SOURCE CODE LISTINGS
2-83
AFN-GaoIl8A
AP-130
ISIS-II PIJM-86 V2.0 COMPILATION OF MODULE DEM0130
OBJECT MODULE PLACED IN :F1:AP130.0BJ
COMPILER INVOKED BY' PLM86 :F1:AP130.PLM DATE(12/21)
tDEBUG COMPACT ROM TITLE('AP-130 APPENDIX B
DEMOt130:
1*
12/21/81')
DO;
SYSTEM-WIDE LITERAL DECLARATIONS:
*1
DECLARE FOREVER LITERALLY 'WHILE OlH';
1*
110 PORT DEFINITIONS:
*1
3
DECLARE CHARtS1 LITERALLY '4000H',
CMDtS1 LITERALLY '4002H',
STAT$Sl LITERALLY '4002H';
4
DECLARE PPI$A LIlERAlLY '6001H',
PPItB LITERALLY '6003H',
PPItC LITERALLY '600SH',
PPItCMD LITERALLY '6007H',
PPISSTAT I.ITERA'LLY '6007H';
5
DECL.ARE TI MERtCMD LI TERALL Y '200EH',
BAUDtTIMER LITERAL.LY '200CH';
6
DECLARE ACtINTERRUPTtLEVEL LITERALLY '00111000B';
7
DECLARE CR LITERALLY 'ODH',
LF,LITERALLY 'OAH',
BEL LITERALLY '07H';
8
DECLARE ASCIltCODE (16) BYTE DATA ('01234S6789ABCDEF');
$EJECT
$INCLUDE (.Fl:NUCLUS.EXT)
tSAVE NOLIST
tINCLUDE (: r1: NEXCEP. LIT>
tsave nolist
1*
GLOBAL VARIABLE 'DECLARATIONS:
*1
299
DECLARE DATAtSEGtPTR POINTER,
DATAtSEGtADDR STRUCTURE (OFFSET WORD, BASE WORD)
AT (@DATAtSEG$PTR);
300
DECLARE HARDWARE$INIT$TASK$TOKEN WORD,
STATUStTASKtTOKEN WORD,
MOTOR$TASK$TOKEN WORD,
TIME$TASKtTOKEN WORD,'
AC$HANDL.ER$TOKEN WORD,
CRT$OUT$TASK$TOKEN WORD,
COMMAND$TASK$TOKEN WORD,
INIT$TASK$TOKEN WORD;
301
DECLARE CRl$MAlL.BOX$TOKEN WORD,
CRT$REGION$TOKEN WORD;
2-84
AFN-ll2058A
AP-130
SEJECT
1*
302
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304
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2
30t?
306
30'7
2
2
308
30Y
~
~
310
31J
312
1
3
3
2
2
CODE EXAMPLE 2, SIMPLE CRT INPUT AND OUTPUT ROUTINES, *1
CSOUT, PROCEDURE (CHARII
DECLARE CHAR BYTE I
DO WHILE (INPUT(STATSS11 AND 01HI=01
1* NOTHING *1
ENDI
OUTPUT(CHARS511=CHARI
END CSOUTI
CSIN' PROCEDURE BYTE.
DO WHILE (INPUT(STATS51I AND 02HI=01
1* NOTHING *1
ENDI
RETURN INPUT (CHARSS1 I;
END CUN;
SEJECT
1*
31:.3
314
1
"2
31~
:2
316
317
2
2
318
2
319
320
321
322
3"23
3;:4
2
:1~5
, 20
"27
;,';>8
329
330
331
CODE EXAMPLE 1,
HARDWARE INITIALIZATION TASK,
*1
HARDWARESINITSTASK: PROCEDUREI
DECLARE HARDSINITSEXCEPTSCODE WORDl
DECLARE PARAMSSI (*1 BYTE DATA (40H.,9DH. OOH. 40H. 4EH. 27HI;
DECL.ARE PARAMS51$INDEX BYTE;
DECLARE SIGNSONSMESSAGE (*1 BYTE DATA
(CR. LF. 'iAPX 96/30 HARDWARE INITIALIZED'. CR. LFII
DECLARE'. SIGNSONSINDEX BYTE;
OUTPUT (PP ISCMD I =90Hl
OUTPUT(TIMERSCMDI=OB6HI
OUTPUT(BAUDSTIMERI=331 I*GENERATES 9600 BAUD FROM 5 MHZ*I
OUTPU1(BAUDSTIMERI=01
DO PARAMS51SINDEX=0 TO (SIZE(PARAMS511-111
OUTPUT (CMDSS1 I=PARAMSS1 (PARAMSS1SINOEXII
END.
I*OF USART INITIALIZATION DO-LOOP*I
DO SIGNSONSINDEX=O TO (SIZE(SIGNSONSMESSAGEI-111
CAI.L CSOUT< SIGNSONSMESSAGE (SIGNSONSINDEX 1)1
ENOl
I*OF SIGN-ON DO-LOOP*I
CALL RGSRESUMESTASK(INITSTASKSTOKEN.eHAROSINITSEXCEPTSCODE)I
CALL RGSDELETESTASK(o.eHAROSINITsEXCEPTSCOOEII
eND HARDWARESINITSTASKI
2
2
;<
2
3
:.;
2
:i
3
"2
2
2
SEJe-CT
1*
3a2
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341
34"2
1
2
2
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2
3
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3
3
2
CODE EXAMPLE 3.
STATUS POLLING AND REPORTING TASK.
*1
STATUSSTASK' PROCEDUREI
DECLARE STATUSSCOUNTER BYTEI
DECLARE STATUSSEXCEPTSCODE WORDI
STATUSSCOUNTER=OI
CALL RGSRESUMESTASK(INITSTASKSTOKEN.eSTATUSSEXCEPTSCOOEII
DO FOREVER.
OUTPUT(PPISBI=INPUT(PPI.AI XOR STATUSSCOUNTERI
STATUSSCOUNTER=STATUS.COUNTER+l1
CALL RG.SLEEP(100.eSTATUS.EXCEPT.COOEII
END;
END STATUS.TASKl
2-85
AFN-02QII8A
AP.130
$E.JECT
1*
CODE EXAMPLE 4.
STEPPER MOTOR CONTROL TASK.
*1
DECLARE CW$STEP$DELAY BYTE.
CCW$STEP$DELAY, BYTE.
CW$PAUSE$DELAY BYTE.
CCWSPAUSESDELAY BYTE,
343
344
345
346
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2
2
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2
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349
350
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353
354
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356
357
358
359
360
361
362
363
364
365
366
367
2
2
2
2
:2
MOTOR$TASK: PROCEDUREI
DECLARE MOTORSEXCEPT$CODE WORD,
DECLARE MOTOR$POSITION BYTE.
MOTOR$PHASE BYTE,
DECLARE PHASE$CODE (41 BYTE
DATA (00000101B;0000~110B.00001010B.00001001Bl'
=
CW$STEP$DELAY=501
I*INITIAL STEP DELAYS
1/4 SECOND*I
CCWSSTEP$DELAY=50,
CWSPAUSE$DELAY=:200,
I*PAUSES AFTER ROTATION = 1 SECOND*I
CCWSPAUSESDELAY-200,
CALL ROSRESUMESTASK(INITSTASKSTOKEN.@MOTORSEXCEPTSCODEl,
DO FOREVER,
DO MOTORSPOSITION=O TO 100,
MOTOR$PHASE-MOTORSPOSITION AND 0003H,
OUTPUT(PPISC I =PHASESCODE (MOTOR$PHASE I ,
CALL ROSSLEEP(CWSSTEP$D~LAY.@MOTORSEXCEPT$CODEl'
END,
CALL RO$SLEEP(CW$PAUSESDELAY.@MOTORSEXCEPTSCODEl,
DO MOTORSPOSITION~O TO 100,
MOTORSPHASE=(100-MOTORSPOSITIONI AND 0003H,
OUTPUT(PPISCl=PHASESCODE(MOTOR$PHASEl,
CALL ROSSLEEP(CCW$STEP$DELAY.@MOTOR$EXCEPTSCODEl,
END,
\
CALL ROSSLEEP(CCWSPAUSESDELAYj@MOTORSEXCEPT$CODE),
END,
END MOTORSTASK,
2
3
4
4
4
4
3
3
4
4
4
4
3
3
:2
$E.JECT
1*
368
INTERRUPT HANDLER TO TRACK 60 HZ INPUT.
*1
DECLARE AC$CYCLESCOUNT BYTE;
369
370
2
371
372
373
2
2
2
376
3
3
377
378
3
379
2
375
CODE EXAMPLE 5.
2
ACSHANDLER: PROCEDURE INTERRUPT 59,
DECLARE ACSEXCEPTSCODE WORDI
I*VECTOR FOR 80130 INT3*1
CALL ROSENTER$INTERRUPT(AC$INTERRUPT$LEVEL.@AC$EXCEPT$CODEl'
AC$CYCLE$COUNT=AC$CYCLE$COUNT+l,
IF AC$CYCLE$COUNT >= 60
THEN DO,
AC$CYCLE$COUNT=OI
CALL RO$SIGNAL$INTERRUPT(AC$INTERRUPT$LEVEL.
@ACSEXCEPT$CODEl;
END,
ELSE CALL RO$EXIT$INTERRUPT(AC$INTERRUPT$LEVEL.
@AC$EXCEPT$CODEl,
END AC$HANDLERI
2-86
AP-130
$EJECT
I~
380
381
382
383
384
385
386
387
388
2
2
2
2
3
2
2
2
CODE EXAMPLE 7.
PROTECTED CRT OUTPUT SUBROUTINE.
*1
PROTECTED$CRT$OUT:
PROCEDURE (CHAR) REENTRANT.
DECLARE CHAR BYTE.
DECLARE CRT$EXCEPTSCODE WORD;
CALL RGSRECEIVESCONTROL(CRTSREGIONSTOKEN.@CRT$EXCEPTSCODE),
DO WHILE (INPUT(STAT$51) AND 01H)=O.
1* NOTHING *1
END.
OUTPUT(CHAR$51)=CHAR;
CALL RGSSENDSCONTROL(@CRTSEXCEPTSCODE);
END PROTECTED$CRTSOUT;
$EJECT
1*
389
INTERRUPT TASK TO MONITOR CLOCK TIME.
*1
DECLARE SECONDSCOUNT BYTE.
MINUTESCOUNT BYTE.
HOlJR$COUNT BYTE;
390
391
1
2
392
393
2
2
394
395
396
397
398
2
2
3
4
5
399
5
401
402
403
404
5
4
3
405
406
CODE EXAMPLE O.
2
2
2
TIMESTASK:
PROCEDURE;
DECLARE TIMESEXCEPTSCODE WORD;
ACSCYCLESCOUNT=O.
CALL RGSSET$INTERRUPT(ACSINTERRUPTSLEVEL.01H.
INTERRUPT$PTR(ACSHANDLER).DATASSEGSADDR.BASE.
@TIMESEXCEPTSCODEl;
CALL RGSRESUME$TASK(INITSTASKSTOKEN.@TIMESEXCEPTSCODE);
DO HOUR$COUNT=O TO 23.
DO MINUTESCOUNT=O TO 59.
DO SECONDSCOUNT=O TO 59.
CALL RGSWAITS INTERRUPT (ACSINTERRUPT$LEVEL,
@TIMESEXCEPTSCODE) •
IF SECONDSCOUNT MOD 5 = 0
THEN CALL PROTECTEDSCRTSOUT(BEL).
END;
1* SECOND LOOP *1
END;
1* MINUTE LOOP *1
END.
1* HOUR LOOP *1
CALL RGSRESETSINTERRUPT(ACSINTERRUPTSLEVEL.
@TIMESEXCEPTSCODE).
CALL RGSDELETESTASK(O.@TIMESEXCEPTSCODE).
END TIMESTASK.
2-87
$E.JECT
1*
407
408
409
410
2
2
2
411
412
2
413
414
2
2
~:
415
416
417
418
419
2
2
2
420
3
2
422
2
2
2
423
424
425
2
427
2
2
428
2
2
426
42<'1J
SUBROUTINE TO CREATE TIME-OF-DAY MESSAGE. *1
TOD$MESSAGE$TOKEN=RQ$CREATE$SEGMENT(2S.@TOD$EXCEPT$CODE);
TOD$SEGMENT$BASE=TOD$MESSAGE$TOKEN;
TDD$SEGMENT$OFFSET=O;
DO TOD$STRING$INDEX=O TO 27;
TOD$STRING(TOD$STRING$INDEX)=
TOD$TEMPLATE(TOD$STRING$INDEX);
END;
TOD$STRING(17)=ASCII$CODE(HOUR$COUNT/I0);
TOD$STRING(18)=ASCII$CODE(HOUR$COUNT MOD 10);
TOD$STRING(20)=ASCII$CODE(MINUTE$COUNT/I0);
TOD$STRING(21i=ASCII$CODE(MINUTE$COUNT MOD 10);
. TOD$STR I NG (23) =ASC I I $CODE (SECOND$COUNT 110) ;
TOD$STRING(24)=ASCII$CODE(SECOND$COUNT MOD 10);
CALL RQ$SEND$MESSAGE(CRT$MAILBOX$TOKEN.
TOD$MESSAGE$TOKEN.O.@TOD$EXCEPT$CODE);
RETURN;
END PRINT$TOD;
2
3
421
CODE EXAMPLE S.
PRINT$TOD: PROCEDURE;
DECLARE TOD$MESSAGE$TOKEN WORD;
DECLARE TOD$EXCEPT$CODE WORD;
DECLARE TOD$SEGMENT$OFFSET WORD.
TOD$SEGMENT$BASE WORD;
DECLARE TOD$SEGMENT$PNTR POINTER AT (@TOD$SEGMENT$OFFSET);
DECLARE TOD$TEMPLATE (2S) BYTE
DATA (27. 'THE TIME IS NOW hh:mm:ss. '.CR.LF);
DECLARE TOD$STRING BASED TOD$SEGMENT$PNTR (2S) BYTE;
DECLARE TOD$STRING$INDEX BYTE;
$E.JE·CT
1*
430
431
432
:2
2
433
~
434
2
435
2
4:l6
437
438
:2
439
2
440
441
-,
-,
2
2
2
442
2
443
3
444
445
44"
447
3
448
449
4:;0
3
451
2
2
2
3
3
2
CODE EXAMPLE 9. SUBROUTINE TO CREAT,E SWITCH STATUS MESSAGE. *1
PRINT$STATUS: PROCEDURE;
DECLARE STATUS$MESSAGE$TOKEN WORD;
DECLARE STATUS$EXCEPT$CODE WORD;
DECLARE STATUS$SEGMENT$OFFSET WORD.
STATUS$SEGMENT$BASE WORD;
DECLARE STATUS$SEGMENT$PNTR POINTER
AT (@STATUS$SEGMENT$OFFSET);
DECLARE STATUS$TEMPLATE (40) BYTE DATA
<:39. 'THE SW ITCHES ARE NOW SET TO ........ B •• CR. LF);
DECLARE STATUS$STRING BASED STATUS$SEGMENT$PNTR (40) BYTE;
DECLARE STATUS$STRING$INDEX BYTE;
DECLARE BIT$PATTERN BYTE;
STATUS$MESSAGE$TOKEN=RQ$CREATE$SEGMENT(40.
@STATUS$EXCEPT$CODE);
STATUS$SEGMENT$BASE=STATUS$MESSAGE$TOKEN;
STATUS$SEGMENT$OFFSET=O;
DO STATUS$STRING$INDEX=O TO 39,
STATUS$STRING(STATUS$STRING$INDEX)=
STATUS$TEMPLATE(STATUS$STRING$INDEX);
END;
BIT$PATTERN=INPUT(PPI$A);
DO STATUS$STRING$INDEX=29 TO 36;
STATUS$STRING(STATUssSTRINGsINDEX)=
ASCII$CODE(BITsPATTERN AND OlH).
BIT$PATTERN=ROR(BITsPATTERN.1);
END;
CALL RQ$SENDsMESSAGE(CRTsMAILBOX$TOKEN.
STATUS$MESSAGEsTOKEN.O.@STATUS$EXCEPTsCODE);
END PRINTsSTATUS;
2-88
AFN-Q20S8A
Ap·130
SEJECT
/.*
2
2
;:>
'"
2
;8
;;>
4:,9
:2
46()
"'
4
c
461
3
46:3
464
46:,
466
467
468
3
46 C?
::J
3
2
470
4"11
CAL.L RGSRESUMESTASK(INITSTASKSTOKEN.@MESSAGESEXCEPTSCODE),
DO FOREVER.
MESSAGESTOKEN=RGSRECE I VESMESSAGE (CRTSMAILBOXSTOKEN. OFF FFH.
@RESPONSESTOKEN.@MESSAGESEXCEPTSCODE),
MESSAGESSEGMENTSOFFSET=O,
MESSAGESSEGMENTSBASE=MESSAGESTOKEN.
MESSAGESLENGTH=MESSAGESSTRINGSCHAR.
DO MESSAGESSEGMENTSOFFSET=l TO MESSAGESLENGTH.
CALL PROTECTEDSCRTSOUT(MESSAGESSTRINGSCHAR),
END.
CALL RGSDELETESSEGMENT(MESSAGESTOKEN.@MESSAGESEXCEPTSCODE),
END)
1* OF FOREVER-LOOP *1
END CRTSOUTSTASK,
2
46Z!
TASK TO RECEIVE MESSAGES AND TRANSMIT THEM TO CRT.
CRTSOUTSTASK' PROCEDURE.
DECLARE MESSAGESLENGTH BYTE,
DECLARE MESSAGESTOKEN WORD,
DECLARE RESPONSESTOKEN WORD.
DECLARE MESSAGESEXCEPTSCODE WORD,
DECLARE MESSAGESSEGMENTSOFFSET WORD.
MESSAGESSEGMENTSBASE WORD,
DECLARE MESSAGESSEGMENTSPNTR POINTER AT (@MESSAGESSEGMENTSOFFSET),
DECL.ARE MESSAGESSTRINGSCHAR BASED MESSAGESSEGMENTSPNTR BYTE,
452
45:l
454
45 c,
456
457
CODE EXAMPLE 10.
~:::
3
:J
4
4
SEJECT
/*
472
473
474
4"15
476
477
:;'
d
478
479
:l
481
J
483
484
48:5
48"
487
488
4
4
4
489
5
490
5
491
5
492
5
~
5
5
493
5
494
5
49::;
5
496
497
498
499
4
3
2
TASK TO POLL KEYBOARD AND PROCESS COMMANDS.
COMMANDSTASK: PROCEDURE,
DECLARE CONSOLESCHAR BYTE,
DECLARE COMMANDSEXCEPTSCODE WORD.
;:>
2
3
3
CODE EXAMPLE 11.
5
,
CALL RGSRESUMESTASK(INITSTASKSTOKEN.@COMMANDSEXCEPTSCODE»)
DO FOREVER,
CONSOLESCHAR=CSIN AND 7FH,
CAL.L PROTECTEDSCRTSOUT(CONSOLESCHAR),
IF CONSOLESCHAR=CR
THEN CALL PROTECTEDSCRTSOUT(LF),
IF (CONSOLESCHAR >= '0') AND (CONSOLESCHAR <= '9')
THEN DO,
CALL PROTECTEDSCRTSOUT(CR),
CALL PROTECTEDSCRTSOUT(LF),
DO CASE (CONSOLESCHAR-'O'),
CALL PRINTSTOD,
CALL PRINTSSTATUS,
CALL RGSSUSPENDSTASK(CRTSOUTSTASKSTOKEN.
@COMMANDSEXCEPTSCODE),
.
CALL RGSRESUMESTASK(CRTSOUTSTASKSTOKEN.
@COMMANDSEXCEPTSCODE),
CALL RGSDISABLE(ACSINTERRUPTSLEVEL.
@COMMANDSEXCEPTSCODE),
CALL RGSENABLE(ACSINTERRUPTSLEVEL.
@COMMANDSEXCEPTSCODE),
CALL RGSSUSPENDSTASK(MOTORSTASKSTOKEN.
@COMMANDSEXCEPTSCODE).
CALL RGSRESUMESTASK(MOTORSTASKSTOKEN.
@COMMANDSEXCEPTSCODE),
CALL RGSSUSPENDSTASK(STATUSSTASKSTOKEN.
. @COMMANDSEXCEPTSCODE),
CALL RGSRESUMESTASK(STATUSSTASKSTOKEN.
@COMMANDSEXCEPTSCODE»)
END,
1* OF CASE-LIST *1
END,
1* OF COMMAND PROCESSING *1
END,
END COMMANDSTASK,
2-89
*1
*1
AP-130
SEJECT
1*
500
501
1
2
502
503
504
505
506
2
2
2
2
50~'
508
2
2
509
510
2
511
512
2
513
514
2
2
515
516
2
2
517
518
519
520
2
2
2
2
TASK TO INITIALIZE OSP SOFTWARE.
*1
INITSTASK: PROCEDURE PUBLIC.
DECLARE INITSEXCEPTSCODE WORD,
DATASSEGSPTR=@INITSTASKSTOKEN.
I*LOAD DATA SEGMENT BASE*I
CRTSMAILBOXSTOKEN=ROSCREATE$MAILBOXCO.@INITSEXCEPTSCODEl.
CRTSREGIONSTOKEN=ROSCREATESREGIONCO.@INITSEXCEPTSCODEI,
INITSTASKSTOKEN=ROSGETSTASKSTOKENSCO.@INITSEXCEPTSCODEI;.
HARDWARESINITSTASKSTOKEN=RO_CREATESTASK
(110.@HARDWARESINITSTASK.DATASSEGSADDR.BASE.O.300.
O.@INITSEXCEPTSCODEI.
CALL RO$SUSPENDSTASKCO.@INITSEXCEPTSCODEI.
STATUSSTASKSTOKEN=ROSCREATESTASKCII0.@STATUSSTASK.
DATASSEGSADDR. BASE.O.300.0.@INITSEXCEPTSCODEI.
CALL ROSSUSPENDSTASKCO,@INITSEXCEPTSCODEI.
MOTORSTASKSTOKEN=ROSCREATESTASKCI10.@MOTORSTASK.
DATASSEGSADDR. BASE.O.300.0.@INITSEXCEPTSCODEI.
CALL ROSSUSPENDSTASK(O.@INITSEXCEPTSCODEI.
TIMESTASKSTOKEN=ROSCREATESTASKC120.@TIMESTASK.
DATASSEGSADDR. BASE.0.300.0.@INITSEXCEPTSCODEI.
CALL ROSSUSPENDSTASKCO.@INITSEXCEPTSCODEI.
CRTSOUTSTASKSTOKEN=RQSCREATESTASKC120.@CRTSOUTSTASK.
DATASSEGSADDR.BASE.O.300.0.@INITSEXCEPTSCODEI.
CALL ROSSUSPENDSTASK(O.@INITSEXCEPTSCODEI.
COMMANDSTASKSTOKEN=ROSCREATESTASKCI30.@COMMANDSTASK.
DATASSEGSADDR.BASE.0.300.0.@INITSEXCEPTSCODEI.
CALL ROSSUSPENDSTASKCO.@INITSEXCEPTSCODEI.
CALL ROSENDSINITSTASK.
CALL ROSDELETESTASKCO.@INITSEXCEPTSCODEI.
END INITSTASK,
2
2
2
521
CODE EXAMPLE 12.
END
DEMO' 130.
MODULE INFORMATION.
CODE AREA SIZE
- 084CH
CONSTANT AREA SIZE • OOOOH
VARIABLE AREA SIZE • 0052H
MAXIMUM STACK SIZE
0026H
848 LI NES READ
PROGRAM ERRORCS)
21240
00
820
380
°
END OF PL/M-86 COMPILATION
2-90
AFN-020S8A
AP-130
APPENDIXC
SYSTEM MEMORY MAP
2-91
AP~130
EXAMPLE SYSTEM MEMORY MAP
MEMORY MODULE
8088 RESiART VECTOR
ROOT JDB CODE AREA
STARTING
ADDRESS
OFFFF:O
OFD18:0
ENDING
ADDRESS
OFFFF:F
OFD36:6
OFC62:0
OFD17:B
{
RAM
OFCOO.o
OFC61:F
80130 MEMORY SPACE
0F800:0
OFBFF:F
FREE SYSTEM RAM)
OOGO:O
01 FF:F
ROOT JOB DATA AREA
OOAD:O
OOBF:F
APPLICATION JOB DATA AREA
OOA7:0
OOAC:1
DSP SUPPORT DATA AREA
0040:0
OOA6:F
8086 INTERRUPT VECTOR
0000:0
INITIALIZATION TASK STARTING ADDRESS:
003F:F
FC62:06B5
ROOT JOB STARTING ADDRESS: _ _..!FD=18"':001=1'--_ _
2-92
AFN-02QSBA
AP·130
APPENDIX D
SUPPORT CODE LOCATE MAP
2-93
AFN'()2068A
AP-130
ISIS-I I Me8-86 LOCATER. VI 2 INVOKED BY
FO LOCBb
&
FI SUPI30 LNK TO FI SUPI30 MAP PRINT( FI SUP130 1'1P2) SC(3) ..
SEOSIZE(STACK(O) )
ADDRESSES (CLASSES (CODE (OF8000H) , OAT /lit (00400H) ) }
ORDER (CLASSES(DATA, STACK»
OBJECTCONTROLS(NOLINES, NOCOMMENTS, NOSYMBOLS)
WARNING 2b
DECREASING SIZE OF SEGMENT
SEOMENT
STACK
. .
"
SYMBOL TABLE OF 110DULE MINIMAL_BOI30
READ FROM FILE Fl SUPI30 LNK
WRITTEN TO FILE FI SUPI30
BASE
OFFSET TYPE SYMBOL
BASE
OFFSET TYPE SYMBOL
BASE
OFFSET TYPE SVt'llDL
0040H
0040H
OOOOH
014BH
PUB
PUB
0040H
0040H
0120H
0040H
0040H
0144H
0040H
01~l!H
PUB
0040H
0"4H
0040H
0040H
01~BH
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PUB
PUB
0040H
0040H
015AH
OlbOH
0040H
0164H
0040H
0166H
0040H
017BH
0040H
01EBH
DEFAULTJOBH
05lSH
052FH
053FH
055AH
OS68H
Q5S8H
059DH
05ADH
OSB2H
OSBFH
05DOH
O~EOH
O~FAH
0610H
661CH
063CH
Ob5CH
Ob7CH
069CH
06B3H
06SSH
MESSAGESEGMENl SA
-SE
BAS , MESSAGESTR I NGCHA
LR
SYM CONSOLECHAR
LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
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LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
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LIN
LIN
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LIN
LIN
LIN
LIN
LIN
INITTASK
\4--, INITIALIZATION TASK STARTING ADDRESS
302
30.
307
309
311
313
320
322
324
326
328
330
332
336
338
340
342
348
350
352
354
356
358
360
362
364
366
369
372
37'
377
379
383
385
387
::190
393
395
397
399
401
403
40'
407
416
418
420
422
424
426
428
430
440
442
444
446
448
4.0
452
461
463
465
467
469
471
475
477
479
481
484
486
488
490
492
494
496
499
502
2-98
AFN-oaoSBA
AP·130
FC62H
FC62H
FC62H
FC62H
FCocH
FC62H
FC62H
FC6~H
FC62H
FC6.;!H
06C4H
06E6H
071FH
075SH
07BBH
07C1H
07F7H
OB2DH
OB3DH
0084H
LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
LIN
~03
~O~
~07
509
511
~13
~1~
517
519
521
FC62H
• FC62H
FC62H
FC62H
06D5H
06.6H
072CH
0762H
FC62H
FC62H
FC62H
079BH
OB04H
LIN
LIN
LIN
LIN
LIN
LIN
LIN
FC62H
FC62H
OB3AH
OEl4AH
LIN
07CEH
LIN
504
506
~OB
510
512
514
.16
51B
520
MEHORY MAP OF MODULE DEM0130
READ FROM FILE Fl AP130 LNK
WRITTEN TO FILE Fl AP130
SEGMENT MAP
START
STOP
LENGTH AL I GN NAME
CLASS
W
DATA
00AC1H
0052H __________
100A70H
L;.;:~=-----,==~_.:..:..:=
DA_t_A..J~ LAST DATA BYTE OF APPLICATION JOB
OOAC2H
OOADOH
00AC2H
OOADOH
OOOOH
W
STACK
OOOOH
G
........SEG
STACK
_ _ _ _ _ _ _ OB5CH
____
---,_ _ _ _ _ _ _ _
C_OD_E..J~WUITCODE~EOFA~TION~OB
I~FC620H
W _
CODE
FD17BH
FD11CH
FD17CH
OOOOH
W
GROUP MAP
ADDRESS
FC620H
QROUP OR SEGMENT NAME
CGROUP
00A70H
CODE
DQROUP
DATA
MEMORY
MEMORY
AP-130
APPENDIX F
ROOT JOB LOCATE MAP
2-100
AFN-02058A
Ap·130
ISIS-II MCS-8b LOCATER. Vl 2 INVOKED BY
LDC86
fl R.JB130 lnk
L
TO . Fl RJB130
MAP PRINT( fl'R.JB130 mp2)
&
ac (no1 i. 1'I0p L 11oc:m. no.b) &
PC(noll. pI. nocm, nosb)
&
&
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d.tilCOOADOH» )
WARNING 26
DECREASING SIZE OF SEGMENT
SEGMENT
STACK
"
~
&
SYMBOL TABLE OF MODULE ROOT
READ FROM FILE
Fl R.JB130 LNK
WRITTEN TO FILE
Fl RJB130
BASE
OFFSET TYPE SYMBOL
BASE
OFFSET TYPE SYMBOL
FD18H
OlSOH
FD18H
0184H
IFD18H
PUB
PUB
0Ol1H
ooaOH
FDIBH
FOIBH
FD18H
FDIBH
0030H
OllaH
0124H
FD18H
OOADH
014bH
OOOOH
PUB
PUB
PUB
PUB
PUB
PUB
NUC_INIT _ENTRY
RGSTARTADDRES6'~
CRASH
ROOTTASK
RGCREATEJOB
ROSUSPENDTASK
RG_N_C_RETURN_40
-JQBNUMBER
ROOT JOB
FD18H
FD18H
FD1BH
FD18H
FD18H
OO:;zAH
OlOCH
011EH
012AH
0162H
OOADH
0OO2H
PUB
CODEDATA
STARTING ADDRESS
PUB
PUB
PUB
PUB
PUB
PUB
FD18H
OOlOH
PUB
RGROOT JOBVERSION
SYSTEMSUIC IDE
RQGETTASKTOKENS
RG_N_C_RETURN_Q
RGERROR
ROaTT ASKSTATUS
t1EMORY MAP OF MODULE ROOT
READ FROM FILE Fl R-J)H30 LNK
WRITTEN TO FILE
Fl RJB130
MODULE START ADDRESS
SEGMENT MAP
START
OOADOH
IOOAD4H
OOCOOH
OOcaOH
FD1S0H
FD33AH
STOP
OOAD3H
OOBFFH
aocaOH
OOCOOH
FD339H
F034SH
PARAGRAPH
=
F01BH
OFFSET
LENGTH AL I ON NAME
0OO4H
012CH
OOOOH
OOOOH
OlSAH
OOOCH
W
W
W
G
W
W
DATA
INIT_STACK
= OOllH
CLASS
DATA
STACK
STACK
STACK
"''''SEG
CODE
SAB...oESCRIPTOR
CODE
t--
LAST DATA BYTE OF ROOT JOB
CODE
-5
FD346H
FD368H
FD366H
FD368H
0021H
OOOOH
W
W
_~_J_DESCRIPTOR
MEMORY
CODE
i'4---LAST CODE BYTE OF RDDT JOB
MEMORY
GROUP MAP
ADDRESS
OOADOH
GROUP OR SEGMENT NAME
DGROUP
DATA
FD180H
COROUP
CODE
SAB OESeR IPTQRS
U_,·COESCRIPTORS
2-101
INTERROR
. ARTICLE
. REPRINT
AR-236
November, 1982
AopttnIOd _
permloolan from Com"",", Deoign - September 1882. _ ; CGpyrIgId 11182 by eornp.- Doooan Pubilohing Co.
2-102
LET OPERATING SYSTEMS
AID IN COMPONENT
DESIGNS
The iRMX 86 operating system processor package offers
hardware designers a set of thoroughly tested software
primitives upon which to build present and future custom
hardware designs
by George Heider
C
omponent users build application systems by
integrating standard and custom hardware, software, and packaging. Microprocessors and other
very large scale integration cOPlponents are replacing
much custom hardware with larger, more powerful
standard hardware modules. Microprocessors lead to
powerful systems, but they often require complex
system management software. While this complex software often comprises one third or less of the final
system software, it may require two thirds or more of
the storage development effort. Worse, bugs in system
management software sometimes do not show up until
late in development or after the product is at the
customer's site.
One solution to this problem is to employ standard
management software such as operating systems. More.
complex, multifunction applications in a realtime
environment benefit greatly from operating systems.
Examples of these applications include file subsystems,
public automatic branch exchange (PABX) systems, and
transaction processing systems. But implementing
George Heider is a senior applications engineer at
Intel's OEM Microcomputer Systems Div, 5200 NE
Elam Young Pkwy, Hillsboro. OR 97123. He works
primarily with 16-bit software applications, including
the iRMX 86 operating system. Previous experience
includes telecommunications systems engineering.
microprocessor systems, microprocessor operating
system development, and disk storage system
software. Mr Heider holds an MS in computer science
from the University of California, Santa Barbara and
a BSEEfrom Oregon State University.
.
Fig 1 iRMX operating system arcbltectnu. Kernel consists
of primitives also implemented In bardware In iAPX 16/30 and
iAPX 18/30 OSP.
operating system functions in a component design requires
new software tools, education, and expertise. Also, these
functions are often specific to the particular design, so tools
and expertise developed for one application are not suitable
for subsequent designs.
.
These problems are directly addressed by the Intel iAPX
86/30 and iAPX 88/30 operating system processors (OSP) and
the iRMX· 86 operating system. The iRMX 86 is a ful!featured, realtime multitasking operating system for iAPX
86 or iAPX 88 based systems. The Intel OSP implements the
iRMX 86 kernel functions in hardware consisting of an iAPX
86 or iAPX 88 central processor coupled with an operating
system firmware (OSF) component, the Intel 80130. The
OSF extends the base iAPX 86 and iAPX 88 architecture by
adding 37 operating system primitive instructions to the
base iAPX 86 or iAPX 88 instruction set; systems can be
built directly on the OSP. System implementation time is
thus decreased by having fully debugged operating system
functions in hardware. Further capabilities can be added by
IRMXTM is a trademark of Intel Corp
Compute, Deelgn • September, 1982
2-103
AR-236
extending the set of the OSP primitives
or by integrating portions of the iRMX
86 on top of the OSP.
Operating syllam architecture
TABLE 1
OSPprlmitivea
Primitive
JOB
CREATE JOB
Description
Creates a iob partition including memory pool, task list.
The iRMX 86 architecture shown in
and stack area.
Fig I consists of the nucleus and
layers for the basic input/output
TASK
CREATE TASK
Creates a task with specified environment and priority.
(I/O) system, extended I/O system,
Task is created in ready state. Checks for insufficient
application loader, and human
memory available within containing job.
interface. The system also provides
DELETE TASK
Deletes a task from system as well as from any queues
a debugger, a terminal handler, a
it is awaiting. Task's state and stack segment are
bootstrap loader, and a patch
deallocated.
facility.
SUSPEND TASK
Suspends a task (changes its status to suspended) or
While the nucleus is the lowest
increases task's suspension count by 1. A sleeping task
layer of the operating system, funmay also be suspended and will awaken suspended
damental system functions are
unless resumed.
handled by the nucleus kernel,
RESUME TASK
Decreases suspension count of a task by 1. If at that
point count is reduced to 0, task state is made ready. If
which is the core of any operating
it was suspend-asleep, it is put backJo sleep.
system. The kernel controls memory
SLEEP
Puts task in asleep state; up to 10 ms units can be
allocation, allocates processor
specified.
resources, communicates between
GET TASK TOKENS Gives token for a task or task's job partition.
processes, and manages interrupts.
In the Intel OSP these functions are
INTERRUPT
implemented in hardware. (OSP
SET PRIORITY
, Changes task's priority to value passed in primitive.
functions are described in Table I;
Assigns an interrupt handler to a level. Task that makes
·SET INTERRUPT
additional functions supported by
this call is made interrupt task for same level. unless call
the iRMX 86 nucleus are shown in
indicates there is no interrupt task.
Table 2.) Software development can
Disables an interrupt level; cancels interrupt handler;
RESET INTERRUPT
deletes interrupt task for level if assigned.
be based on either the OSP or the .
iRMX 86, allowing software developReturns number of, the interrupt level for highest priority
GET LEVEL
interrupt handler currently in operation (several interrupt
ment to proceed in parallel with
handlers can be operating).
hardware development.
Completes interrupt processing and sends end of
EXIT INTERRUPT
In addition to the operating system
interrupt signal to hardware.
primitives, the OSP contains timers
Invokes interrupt task aSSigned to a level from that
SIGNAL
INTERRUPT
and interrupt control logic expandable
level's interrupt handler.
from 8 to 57 interrupt levels. The
Suspends interrupt task state pending a signal interrupt
WAIT INTERRUPT
timers include a system clock, Refrom an interrupt handler. Used by an interrupt task to
served delay timer, and baud rate
signal its readiness to service an interrupt.
generator. The 40-pin OSP has bus bufSets dala seg";ent base for an interrupt handler.
ENTER INTERRUPT
fers and demultiplex logic, which
Enables external interrupt level.
ENABLE
allows it to interface directly to the
Disables an external interrupt level.
DISABLE
iAPX 86 or iAPX 88 multiplexed bus.
Reads location and exception handling mode of current
GET EXCEPTION
The OSP can be located at any 16 byte
OSP exception handler for a task.
HANDLER
address boundary in the 1M-byte
Establishes location and exception handling mode of
SET EXCEPTION
system address space. Application incurrent OSP exception handler for task.
HANDLER
terface to OSP stepping and revision
SIGNAL EXCEPTION Notifies current OSP exception handler of exception.
levels is independent. A block diagram
of the 80130 is shown in Fig 2.
Minimum hardware· requirements for the iRMX 86 requests are made by system calls, or primitives, which
operating system shown in Fig 3 are 1.8k bytes of random are comparable to subroutine calls for system actions.
access memory (RAM), about 16k bytes of kernel code Since the kernel manages much of the system hardware,
memory, and integrated circuits. By comparison, the OSP the application code need not concern itself with many
shown in Fig 4 stilI requires I.8k bytes of RAM, but does hardware details. This independence is not absolute,
not require the kernel code, the programmable interrupt however: system hardware or resources not managed by
controller, or the programmable interrupt timer. These are the kernel still require application code.
Basic kernel concepts can be explained using a general
all replaced by the OSP. Approximately I k bytes of required
system configuration code are not shown in Figs 3 and 4. purpose system (Fig S). Input data can be characters.
analog signals, or digital signals; processing can be
numerical analysis, editing, spectrum analysis, process
Karnal functions
Since it defines system architecture, application requests control algorithms, or virtually any other transformafor system operations like interrupt management and tion. Processed data must be sent to an interrupt driven
memory allocation must go through the kernel. These output device-a display, a communications line, '
Computer D..llln
•
September, 1982
2-104
AR-236
Prlmltlve
SEGMENT
CREATE SEGMENT
DELETE SEGMENT
Oe.crlptlon
Dynamically allocates area of memory of specified length
In 16·byte paragraph units up to 64k·byte maximUm leg,
for use as buffer). Returns location token for segment
allocated.
Deallocates memory segment Indicated by parameter
token.
ENABLE DELETION
Allows deletion of system data type value Indicated by
location token.
DISABLE DELETION
MAILBOX
CREATE MAILBOX
DELETE MAILBOX
Prevents deletion of system data type value Indicated by
location token.
Creates a mailbox With specified task queuing dlsclplone.
Returns location token.
Deletes a mailbox and returns Its memory. If tasks are
waiting for mailbox, they are awakened (Ie, their state
made ready) with appropriate exception condition. If
messages are waiting for tasks, they are discarded
IS
system initialization, The input task
requests each buffer, or memory
segment, from the kernel by making
the kernel system call "create segment" with 128 bytes, If a larger
buffer is needed, the create segment
call needs a larger value for the size
parameter, When the buffer is full,
the input task gives the segment to
the process task, When the buffer is
no longer needed, it can be returned
to the system memory pool by a
"delete segment" system call,
Because the kernel dynamically
manages memory allocation and
buffer access, no additional code
for these functions is necessary,
Communication and synchronization
through mailboxes
The sample system needs a dispatching algorithm to send the
segments from task to task, Such an
Sends message segment to mailbox.
SEND MESSAGE
algorithm can be written without an
RECEIVE MESSAGE
Task IS ready to receive message at mailbox. Task IS
operating system, For example, the
placed on mailbox task queue. Task can walt for
response Indefinitely, walt (generally 10 ms) Units, or
input task can fill a buffer and call
not wait. When complete, primitive returns to task the
the process task, When the process
location token of message segment received.
task finishes, it can call the output
task; the output task can finish with
REGION
CREATE REGION
data
type
value,
specifying
queUing
Creates region
the buffer and return, When control
discipline. Returns token for region.
returns to the input task, system
Deletes region If the region IS not In use.
DELETE REGION
processing for that buffer is comGains control of regIOn if region immediately' available,
ACCEPT CONTROL
plete, Another method is to have a
but does not wait If not available.
polling task occasionally check if
RECEIVE CONTROL
Same pnrvitlve as accept control but task that performs
buffers are ready to be sent to other
it may elect to walt.
tasks. Both methods are inefficient
and rigid, requiring that each task
SEND CONTROL
Relinquishes region,
finish processing data in each buffer
OTHER
before another task can run,
SET OS EXTENSION Links new primitive With kernel.
With an operating system, the
GET TYPE
Gives system type code of a system data type.
buffers can be sent from task to task
through "mailboxes" -places
where tasks can send or receive
data. (See Fig 6.) Task A sends a
message (segment) to mailbox I and
specifies mailbox 2 as a return
mailbox, Task A then waits for a
return message at mailbox 2, Task B
receives the message (segment) from
mailbox I, then sends a return
message with status to mailbox 2.
control hardware, or mass storage, In this general pur- Task A receives the return message, which contains task
pose system, input, process, and output are the only B status, and synchronizes the two tasks,
functions, or tasks, that make up the system,
In general, each task o,Ptains a segment, modifies its
contents, sends the segment to the next task, and waits
Buffer management
.
for another segment. The input task first gets a segment
Assume input data wiJI be placed into 128-byte buffers using "create segment." When the segment is full, the
by the input task. Without help from the operating input task uses the kernel call "send message" to send
system, the buffers must be prelocated in RAM. Soft- the segment to mailbox A, The process task uses .the
ware is needed to manage the buffers, which must be "receive message" system call to wait at mailbox A for
given to the tasks.in the correct sequence and returned the segment. The process task receives the segment, pro. for reuse when empty, If the buffers are too small, or if cesses the data, puts the new data in the segment, and
RAM is moved, the software must handle these changes,
sends the segment to mailbox B, The process task then
If an operating system or osp is used, the locations waits at mailbox A for the next segment from the input
and sizes of RAM are made known to the kernel during task, The output task takes the segment from mailbox B
Computer Design • September, 1982
2-105
inter
AR-236
TABLE 2
AcIcIltional primitive•• upported by Ihe iRMX B6 nucleus
CATALOGING SYSTEM
DATA TYPES
CATALOG OBJECT
UNCATALOG OBJECT
LOOKUP OBJECT
Catalogs "system data type token under name gIven
bV task In Job partition directory.
Removes name and token from Job partition
directory.
Uses name to fInd token cataloged in Job partItIon
Idirectory.
NEW SYSTEM
DATA TYPES
CREATE EXTENSION
Notifies kernel of new system data type code for
new system data type.
DELETE EXTENSiON
Removes ~ystem data type code and deletes aJI
composite sy'stem data types with that system data
type code.
CREA TE COMPOSITE
Creates new system data type from list of current
system data types and system data type code
received from create extension.
DELETE COMPOSITE
Deletes new syste,m data type.
INSPECT COMPOSITE
Gives list of system data types that form new
ALTER COMPO'SiTE
Changes Itst of svstem data types that form new
system data type.
system data type.
SEMAPHORES
CREA TE SEMAPHORE
Creates semaphore system data type.
DELETE SEMAPHORE
Deletes semaphore system data type
SEND UNITS
Task adds a number of Units to semaphore.
RECEIVE UNITS
Task asks for a number of units from semaphore
Task can walt for response indeflnately, walt
appear, an error routine can alert
the system operator that processing
has stopped.
The mailbox method has several
advantages over synchronization
algorithms and polling tasks. The
entire process is synch,ronized by the
availability of data in segments,
eliminating the need for algorithms
and extra code; the same process
applies whether the tasks operate at
the same or different speeds. Also,
burst input or output rates can be
handled by adding buffers. For instance, if too much data arrives for
the process or output tasks to handle
immediately, the input task fills
multiple buffers and passes them to
mailbox A. The process task takes
each segment in turn. After processing is completed, the segments
are all sent to mailbox C, and the
process waits for the next burst of
data. The only interfaces between
the tasks are mailboxes and segments, so tasks can be easily replaced or added to the processing
loop; the same scheme works for
larger or smaller segments.
Tasks and task scheduling
Tasks are independent bodies of
executing code, initialized and
(generally 10 ms). or not wait.
scheduled by the kernel. Therefore,
OTHER
tasks must have iRMx 86 parameters
PRIMITIVES
like priority, initi'll memory
Gives priority level of task.
GET PRIORITY
resources, entry address, and other
Deletes system data type even if disabled delete has
FORCE DELETE
iRMX 86 data. A task is like an
been called for system data type.
expanded subroutine managed by
Gives byte size of memory segment.
GET SIZE
an operating system. The actual
application code is written much the
ADDITIONAL JOB
PRIMITIVES
same as it is without an operating
Returns child Job partitions created by a task In
OFFSPRING
system except that requests are
parent Job partition.
made using kernel calls.
GET POOL ATTRIBUTES Gives memory pool attributes of job partition,
Even though the system's multiincluding pool minimum, pool maximum, iOitlal Size,
ple independent tasks appear to run
number of bytes used, and number of bytes
simultaneously, only one task
available.
actually runs at one time. Some
Changes p'ool minimum for Job partitIOn.
SET POOL MINIMUM
method of scheduling is needed to
Deletes job partition and returns Its memory to parent
DELETE JOB
decide which task receives control of
job partition.
the system processor; this schedand outputs the data. The output task has two choices: uling depends on the task priority. Since data coming
it can either delete the segment, letting the input task into a system must not be missed, the input task has the
create more segments, or it can send the segment to hi~hest priority. Data going out of the system are next in
mailbox C. After sending or deleting the segment, the importance, so the output task has second priority; the
output task waits at mailbox B for the next segment sequential process task has the lowest priority. The
from the process task. If the output task sent the seg- scheduling algQrithm is simple-the highest priority task
ment to mailbox C, the input task segments from the that is ready to run will get control of the processor.
output task, synchronizing the input task with the out- This is an example of preemptive priority. In this case,
put task. If the output task deleted the segment, the ready to run means that a task is complete-it has a seginput task creates a new segment and waits for input ment to fill and data coming in (input task), data to prodata. - The entire process runs continuously, synchro- cess (process task), or data to output (output task). For
nized by mailboxes and segment availability. Addi- instance, if input data arrives when the process task is
tionally, the tasks can elect to wait for a specified running and the input task has a buffer waiting for data,
amount of time at mailboxes, and if no segments the input task will preempt the process task to receive
Computer Dallign • September, 1882
2-106
inter
AR-236
scheduling functions. A system with work balanced
among the tasks runs as though all tasks perform
simultaneously.
The net result of task scheduling is that the system
runs as fast as it can. When data come in, the input task
will always get control of the processor. The output task
will execute whenever it has data to send and the input
task is not running. The process task will run whenever
it has data and no other tasks are running. Also, tuning
the system is easier with the standardized mailbox interfaces: slower tasks can be easily removed and replaced
, with faster tasks, and remaining tasks will not be
affected.
In a multitasking system, multiple independent tasks
execute concurrently. Buffer transfers occur through
mailboxes rather than through a direct interface to
tasks. and system functions not related to the primary
data processing functions can be handled by other tasks.
For example. a supervisory task that monitors a system
console for operator requests can be added to the system
at a lower priority than the process task. No changes to
any scheduling algorithm would be required.
r------OPFRAr;G~~TT\4V;;;i------l
I,
KERNEL
CON1ROl
STORE
DllA¥
BAUD RAn
3 ClUCK
<;IAruS
ADDRESS :
_
DATA BUS I
L ________
~~~~~
_______
I
~:A~ONTROl
!NTERRUPT
~
Fit 1 101:10 Brmware eomponent performs clock and
Interrupt control funellons, and supplies operatin& system
primitives.
Interrupt management
the data. If the input task is not running and the hardware driven by the output task is ready to output
another data value, the output task will receive control
of the processor.
Since the operating system schedules the tasks, each
task is designed as though it has sole control of the processor. Tasks make system calls such as receive message,
which may cause another task to run because no
message is waiting. In addition, interrupts will likely
cause a different task to run. ');he kernel can schedule
the tasks because only interrupts or system calls can
cause a higher priority task to become ready, and both
of these are handled by the kernel. Thus any time an
interrupt occurs or a "System call is made, the kernel runs
the highest priority task that is ready. The tasks are
written without any code to manage scheduling. The
kernel scheduling is general purpose, so adding new
tasks to the system does not require modifying the
The iRMX 86 kernel and the OSP provide two classes of
interrupt management: interrupt handlers and interrupt
tasks. An interrupt handler is a short procedure whose
only function is to respond to the interrupt as quickly as
possible. All interrupts become disabled in order to let
the interrupt handler execute at top speed. Interrupt
handlers can make only a few system calls. In the
sample system. the interrupt procedure receives a data
value, places it in a buffer, and returns. When the
buffer is full, the interrupt handler notifies the interrupt
task. Typical response time for an 8-MHz iAPX 86 processor, from the time an interrupt occurs until the interrupt handler gets control is 30 to SO ,.s. In the unlikely
event of a worst-case time, response time is about 160 ,.s.
Higher priority interrupts are enabled when an interrupt handler gets control, is 30 to SO
In the unlikely
task uses a mailbox to pass the fun buffet on to the next
task. Since both interrupts and tasks have priorities
assigned to them, the kernel uses the task priority to
,.5.
,APX 86110
OR
,APX 88110
INT£RRUPT
INTERRUPT LINES
FIt 3 Iwx .. lIardware requlremenll. Operatin& system iiroeeuor fill Into basic hardware system
for Iwx .. and brillp wltll It fllllCtions of kemel .._ory, I259A proarammable inlenapt controller,
ud 1253 proarammable Interrupt timer.
Computer DMlgn • SepI8mIIet, 11112
2-107
inter
r:-----'
I
I
I
I
:
CLOCK
INTERRUPT
--~
I
I
I
I
I
.
,APX 86110
OR
,API 88110
STATUS
PROGRAM
MEMORY
DATA
MEMORY
I
I r--...l..--~_ _---lw:;""
INTERRUPT
STATUS
I
I
80130
I
BAUD RATE
DELAV
TIMER
TIMER
SYSTEM
TIMER
,APX 86/30,88/30
Fla 4 Billie hardware system with iAPX OSP. OSP replaces kernel code, programmahle interrupt
'
controUer, and pro....mmable interval timer.
determine if interrupts should be disabled or enabled. If
the task priority is higher than an interrupt priority, that
interrupt is disabled while the task is running. A priority
level can be given to a task that disables all. some, or
none' of the interrupts: ie, defining a task that is more
important than all interrupts (initialization task), more
important than some interrupts (input task), or less important than all interrupts (processing task).
Multiprogramming
System parameters in a component system are normally
well defined: RAM locations are fixed, code addresses
are known, and address and I/O ports are specified.
Application code usually depends on these parameters.
If the system changes, substantial alterations are often
needed in the application code. However, if an iRMX 86
operating system is used, the kernel is made aware of
system resources during system configuration. System
configuration assigns these resources to "jobs."
Jobs do not do work but instead serve as resource
boundaries, containing tasks that accomplish system
functions. Many component applications systems,
including the sample system, will have only one job. All
system resources are given to the job and all tasks are
contained there. When the system is initialized, the job
is created and control is passed to the first task in
the job . .
Multiprogramming occurs when a system has two or
more 'jobs. The system boundari~s provided by jobs
confine errors and define limits for system resources
such as memory. These boundaries limit the effect of
one job on another. For instance, the system debugger is
a separate job. During development, the sample processing system would look like Fig 7. After'development, the debugger would be removed, leaving only the
application system. The job environment of the processing system IS not affected by adding or removing the
debugger. The overall system will, of course, be affected
la)
MAILBOX
Ib)
Fig 5 General purpose system consists of 3 basic functions.
AppUcadon code receives data, places data in buffer, then
proceues it. Processed data are sent to interrupt driven
output devices.
Fig 6 MaDboxes allow intertask communication by
providing places to send and receive messages (a).
Synchronization is easy since tasks can poll a maDb'ox and
walt for messageS. Mailboxes also form interfaces between
tasks in application system (b) so tasks can be easUy added
or removed without changing code.
.
Computer De8ign • September, 1982
2-108
AR-236
because removing the debugger will
cause more. system resources to be
available for other jobs.
The jobs, tasks, segments, and
mailboxes are part of a large set of
system data types which are data
structures managed by the operating
system. System data types are manipulated only through system calls,
which enforce the rules that govern
their use. Together system data
types and system calls form the application interface to the operating
1.1
101
APPLICATION S¥STEM
Fig 7 Job structure for development provides distinct boundaries so tbat a
debugger (a) or otber piece of development software can be used during system
system. This interface provides not
development and later removed wltbout disturbing application job (b).
only a good boundary for error
detection and debugging, but also common architecture process can be in the same job and use the mailbox
that can be carried from application to application.
interfaces to send data to one output task. If system
designers are careful, they can design systems whose
functions can be added in the field. Thus, expensive
Debugging
The i RMX 86 operating system has a debugger that inter- custom software will not have to be rewritten for each
prets and uses system data types, and manipulates them new application.
to control the system. For example, the processing flow
Users with a wide range of applications will find that
in the sample system can be halted by the debugger this approach allows them to implement a correswhen a segment is sent to mailbox A. Data flow through ponding range of capabilities, expanding an OSP based
the system can be traced by halting or break pointing the system up to a high level human interface. A complete
system as the segment goes from mailbox to mailbox.
iRMX 86 operating system includes extensive 110
Debugging is further aided by the modularity of the capabilities, a debugger, an application loader, a
tasks and jobs. Modules limit error effects; the inter- bootstrap loader, and integrated user console functions.
faces between the modules are well defined; and the Such a system can perform general purpose processing
modules are easily inserted or removed. A standard and still provide all iRMX 86 facilities. With these
system debugger can be used for all applications, features, one operating system can be used for current
avoiding the need to develop specific diagnostic tools.
projects and expanded for future ones, minimizing software learning curves for new applications.
Conclusion
Multiprogramming and multitasking promote application code modularity, allowing applications to be
created by adding new functions to old software. The
same scheduling and kernel interfaces work for systems
with only a few tasks, or systems 'with many tasks performing multiple processes. An entirely new process can
be added to the example by adding more tasks. If the
new and existing processes have nothing in common, the
new process can be in a different job. If both processes
can share general purpose tasks, such as output, the new
Bibliography
Introduction to the iRMX 86 Operating System. no 9803124,
Intel Corp, Santa Clara, Calif. 1982
iRMX 86 Nucleus Reference Manual. no 9803122. Intel Corp.
Santa Clara, Calif, 1981
Using the iRMX 86 Operating System on iAPX 86 Component
Designs, Application Note APIIO. Intel Corp, Santa Clara,
Calif, 1981
J. Zarella, Operating Systems Concepts and Principles,
Microcomputer Applications, Suisun City, Calif, 1979
2-109
intJ
ARTICLE
REPRINT
AR-286
June 1983
Reprinted with permission from VLSI Design magazine.
MarchiAprill983. Copyrlght© 1983.
2-110
210341-004
inter
AR-286
Software That Resides In SUlcon
Ron Slamp and Jim Person, Intel Corporation
S
ilicon software sounds like a contradiction in terms. The
casting of software in silicon implies that the software
cannot be changed; yet software does and must change.
For example, it must be possible to alter a microprocessor
operating system so that the system will support different hardware and software designs, as well as accommodate new hardware components and applications. And if the software has
been committed to silicon, then a way must exist to overcome
any bugs that are discovered later.
Design Considerations
Silicon software consists of two kinds of code; on-chip code
and off-chip code (see Figure I). In a typical case, some of the
off-chip code works closely with the on-chip code, and IS developed as part of the silicon software package. This special offchip (or "support") code might contain initialization, interface,
system, and version update codes. For silicon software to
tolerate change and be usable In more than one system, the
on-chip code must have three qualities: position independence,
configuration independence and stepping independence.
Position Independence
Because the most advanced microprocessors address at least
I megabyte of memory, system software that resides in silicon
must work right regardless of its location in memory. Absolute
addresses in the read-only, on-chip code or data restricts the
configuration of the system. Because the on-chip code recognizes only offsets, absolute addresses are unacceptable. On·
chip code cannot presume to know the location of any code or
data, it can only presume to know the structure of the data
which it accesses. It cannot know, except relatively, where in
memory it (or any other code) resides. If the on-chip code is to
be position independent, then any absolute addresses needed
by the on-chip code must be obtained via the processor's
registers.
Position independence is not a new concept; in fact, it is'
rather an obvious requirement for silicon software. Compilers
and relocatable assemblers allow linking and locating, thus
making it easier to produce positIOn-independent code. But
most of these tools can also produce code that is not position
independent. Silicon software developers need to be aware of
the positIon-Independence reqUIrement throughout the design,
implementation and test phases for their products.
Configuration Independence
The second requirement for silicon-resident software is that
the on-chip code must not depend on the underlying hardware
and software configuration of the system. Instead, the on-chip
code must have indirect access to other code or data, and must
then check the run-time data to deduce the system
configuration.
VLSI DESIGN March/April 1983
On-Chip Code
Oft-Chlp Code
r---.,
I
I
SlilCOfl
Software
I
~~J:~r~
Other Code
I
I
I
I
I
I
System Memory
IL _ _ _ JI
FIGURE I. SlllcOD software Is divided IDtO oD-chip code and offchip code. The off-chip code either directly supports the
oD-chlp code or contains other appllcailons code.
Because of the read-only nature of silicon software, constants can cause problems when they are located within the
on-chip code. Values representing a hardware device must not
reside on-chip if that device can be located anywhere in the
system, or when values support several devices having similar
functions but different programming interfaces. Indirect access
is necessary for all values that vary depending on the configuration of the system.
Slepping Independence
Stepping independence is an expansion of configuration independence, and is perhaps the most elusive of the
requirements to be met by software intended for residence in
silicon. A "step" is an updated version of the on-chip code. The
on-chip code and the off-chip code must remain compatible,
regardless of changes in either of them. Stepping independence
exists when all vc"ions of the on-chip code work with all
versions of the off-chip code.
If stepping indepcndence is taken into consideration when
the silicon software i, developed, then provisions can be made
for the subsequent additions of options without changing the
on-chip code. Otherwise, the static nature of the on-chip code
might make it impossible to add options. Although configuration independence can be designed into software from the start,
stepping independence can be achieved only if a system's existII1g silicon software does not include features that p~event it.
One type of data that is likely to change between steps is the
value representing the size of a data area. If the software is to be
stepping independent, it cannot know the sizes of the data areas
accessed by on-chip code prior to run time. (No problems arise
if on-chip and off-chip code agree on the size of the data area.)
But what happens if the on-chip code is not from the same
version of the product as the off-chip code, and if the size of the
data area has changed between versions'! If the size of the data
area is defined by a constant in the on-chip code, then that area
might be smaller than the off-chip code expects it to be. This
misunderstanding can lead to disaster as the off-chip code reads
and writes beyond the data area.
2-111
210341_
AR-286
This problem is solved when the on-chip code ascertains the
size of the data area from off-chip data. Thus, the size of the
data areas for the system becomes a configuration option.
Getting the Bugs Out of Sll1con Software
Every large program contains bugs. Designers usually
remove bugs by modifying the program to correct the problem,
and then discarding the old program. However, a program in
silicon cannot be modified without stepping the component.
And even so, it is undesirable to discard the outdated
component.
Software designed for silicon should include a facility for
fixing bugs in on-chip code. One way to fix an on-chip bug is to
prevent access to the routine containing the bug. A correct
version of the routine is provided off-chip, and program execution is forced to branch to the off-chip version whenever the
routine is invoked. Modular programming practices during development help reduce the cost of such off-chip duplication.
This on-chip bug-fix works well over time. Each component
step has an associated collection of bug-fix modules. The collection is updated for each new version of the product, as
component steps fix known bugs. During system configuration,
the user specifies which component step is being used; the fixes
for that step are included automatically in the off-chip code.
Because of this facility, one step looks just like another to the
user.
nGURE 2. The OSF componenl works With systems that use Ihe
IAPX 86, 88, 186, or 188 microprocessor. Close coupling of Ihe
CPU and Ihe OSF allows maximum .ero-watl-slate performance
of Ihe OSF software.
On-Chi p Code
Ofl-GhlpCocIe
r
I
80130
Kernel
Control
Store
Intel's OSF: A Software Component
The 80130: The
iRMX~M
86 Kernel in Silicon
Intel's first software-on-silicon product is the 80130. It provides a fUl)ctional subset of the iRMX™ 86 Nucleus, which is
the heart of the iRMX 86 operating system (OS). The iRMX 86
OS is a real-time, multi-tasking, mUltiprogramming operating
system intended for 16-bit microprocessor designs. The iRMX
86 family of standard software modules includes a nucleus, a
stand-along terminal handler, a stand-alone debugger, an asynchronous 110 system, a synchronous 110 system, a loader, a
human interface, ahd options required for real-time applications. The nucleus manages the creation and dynamic deletion
of all system architectural features (tasks, program environments, memory segments,
data~communication
managers,
etc.). It also schedules tasks, based on priority, interrupt management, memory management, validation of parameters,
management of exceptional conditions, and co-processor
support.
How the 80130 Satisfies
the Silicon Software Criteria
The iRMX 86 Nucleus provides both the on-chip and off-chip
codes needed to implement the operating system. The on-chip
code resides in the 16K-byte ROM space of the 80130. It is the
main portion of the Nucleus code, and includes the kernel of the
Software
,
I
I
,
User ExecutoO!"l
I
~ ~~u,estfor
. . _ I ~~~I~g~ment ! ~servlce
~
I
L....._ _ _---'
The Operating System Firmware (OSF) component consists
of several hardware modules (see Figure 2). These modules
provide two functions that are essential to operating systems:
interrupts and timers. The OSF modules include a Control
Store (16K bytes of fast RO M) to contain the silicon software,
three programmable interval timers, an eight-input programmable interrupt controller, a bus interface, control logic, a data
buffer, and address latch logiC.
Su~rt-
_K."m
~
L _?:::J
+
nGURE 3. The posltion·lndependenl Inlerface supplies data
locatIOn and run-time values, and slart. on·chlp ezecution of
Ihe software.
operating system and the primitives, which are present in the
basic 80130 configuration. The off-chip code is stored in external RAM or ROM. It consists of initialization code, and code
that either cannot be position independent or cannot be known
before a given system is configured.
Position independence is guaranteed if entry to the on-chip
code is possible only through an interface in the off-chip code
that sets up the necessary registers. The off-chip positionindependence interface (see Figure 3) provides an absolute
data location and begins on-chip execution by the siliconresident code. All run-time values can be determined based on
the data location. On-chip execution gives the processor a
location in the on-chip code from which other on-chip locations
can be calculated.
It was relatively easy to make the 80130 configuration independent, because (like most operating-system kernels) it contains only general-purpose functions. The off-chip code
contains all the drivers for particular peripheral chips. The
Interactive Configuration Utility integrates the drivers with the
80130.
The interface between the off-chip and on-chip codes
remains stable across component steps. The steppingindependence interface (see Figure 4) resides on the chip, and
is a map of the on-chip code. This interface gives the off-chip
code indirect access to all on-chip "publics" (e.g., externally
accessible routines, modules, and labels). It is also a chart that
routes execution to the proper on-chip location. The off-chip
code uses an index of this chart to specify which public should
2-112
VLSI DESIGN
March/April 1983
210341·004
inter
AR-286
On-chipCod.
0
11i:r.fI
.......
80'30
I
T.....
I
'-"'=-......-:
I
1~.:utlon
'
Logoca' 0
I.ocatlon
CCP
Code
~
...~...
Set:Up I~
I
CCP
Code
CCP
Data
+800
BOOS
Coda
"IilURE 4. All on-chip acce._ are routed through the on-c:lI.lp
.t.pplng-lDd.pend.nce Int.dace, wll.tcll. proYld•• compatl·
bUlt, betw••n on-c:1I.1p and oU-cll.1p cod.: B.cau•• til..
Int.dac. stnrc:ture stays const_t, til.. ext.mal referenc.
also stays coDltant, wlI.Ue til.. on-cII.Ip OFFSET change. to
point to til.. DeW location of til.. on·cll.tp cod•.
BOOS
Code
be accessed. The index of a given routine remains the same
BIOS
across component steps, even though the actual address (offset
into the component) of the public has changed. For different
versions of the on-chip and off-chip codes to work correctly, all
access from outside the component must be routed through the
stepping-independence interface.
BOOS
Constants and mnaag_
BIOS
Const.nt. and meueges
+,61<
(a)
16-byta cold-boot
initialization
(11.)
"GURE 5. (a) Til.••tandard disk-based CP IM-16 modul.1I on.
long structur. contalD1ng both cod. and data. (b) IDt.1
reorgaDII.d til.. ballc CP IM-a6 arcll.ttecture to fit th. op.ratlng
.,st.m Into til.. 80150 OS flrmwar. compon.nt.
I. A preconJigured-mode system, for which the system de-
signer needs to do no operating-system code development
or extension.
2. A configurable-mode system, for which the designer makes
a selection from among the Intel drivers supplied, and
makes changes as required to meet hardware needs.
8251A Universal Asynchronous Receiver/Transmitter
(UART)
8274 Multi-Protocol Serial Controller (MPSC)
825SA Programmable Parallel Interface (PPI)
8275 Floppy-Disk eontroller
8237 Direct Memory Access (DMA) Controller
If the 80150 is used as a co-processor with the iAPX 186 or
the 188, then the on-chip peripherals of these processors
(DMA, timers, interrupt controller, chip-select logic) are also
used.
Configuration independence is achieved via the Configuration Block (CB), with which whole BIOS drivers, data structures, and built-in utilities can be selected independently by the
system integrator.
CP/M-86 n-ansformations
Intel and Digital Research together addressed the issues of
position dependence and intermixed code, dllta, buffers, and
stacks. The CCP and BDOS were reorganized to consolidate
code and to use the 80150's ROM space efficiently.
CP/M-86 was originally developed using an 8080 model structure. The use of this structure implied that the code and data
groups would overlap, as they do in the classical 8080-based
CP/M design. Each module contained set-aside buffer areas,
and included separate data stacks. Therefore, all variable areas
2-113
March/April 1983
CCP
~
The CP/M-86 operating system consists of three modules.
The Console Command Processor (CCP) handles command
line processing, and executes built-in utilities. The Basic Disk
Operating System (BDOS) performs logical disk I/O, including
disk reading and writing, directory management, and sector
allocation. The Basic Input/Output System (BIOS), which contains the configuration-dependent code and data, also provides
I/O for specific peripheral chips.
CP/M-86 is a single-user, single-tasking operating system
written in position-dependent code. The 80150 contains the
entire CP/M-86 operating system; for many configurations, it
requires no off-chip code. Intel's goal was to use the
configuration-independent CCP and BDOS elements as a base,
and add to them a BIOS that supported a variety of peripheral
components but was still configuration independent.
The 80150 BIOS supports the following two functional configuration options:
VLSI DESIGN
Constants and meuages
Code
The CP/M-86 Architecture
tnuhmarlt. of Org,'al R~'('a,cll. 1m
BIOS
Data
Intel's decision to implement CP/M-86 operating system in
silicon (the 80150) raised a different design problem. With the
80130, Intel only had to deal with Intel-designed software. Code
design, implementation, extensions, corrections, support, and
the subsequent effect on the end user were all under Intel's
control. The selection of an independent software system such
as CP/M-86 (a product of Digital Research, Inc.) introduced
new factors into the implementation.
~PIM-86 16 II
Coda
+2500
The 80150: CP/II-86* 1D SWC:OD
The 80150 BIOS includes drivers for the following chips:
BOOS
inter
AR-286
;'
.
CCP
Constants and Messages
BOOS
Constants and Messages
/
/
/
/
E~or
BIOS
and Stack
(a)
_
_
Start of 810S
-t---==:..::.:.==--t
" " ' , ............. ' ............
.......
~ I'............
............
............
...........
!'-.., ............
messages
.......... """ .............
Input/output control blocks
CRT
1'-.
-""
\ -
'---............
.......................: : : : ............
~~~~UT
.........
.....
BIOS code
CONIN
_____
CONOUT _____ _
--------
CONST--~--
Keyboard
Printer
Disk
Disk-parameter header
Disk-parameter block
Olsk~skew tables
BOOS
Van ables, Buffer
~~~ST " "
AUXST
Disk read
DI.Sk write
Vanables, Bu Her
and Stack
Addres&-BIOS - ,_ _
Addresses of user entry POIn~ CONIN ~
CONOUT ,""'-..c
LlSTST
BIOS
Constants and Messages
CCP
Vanables. Buffer
and Stack
Address-BOOS
BIOS stack
""
l&-dlsk-dnve disk-parameter headers
All dlsk-pararneter blocks
Check vectors
Allocation vectors
Track/sector disk buffers
' L____________
__
~.----
--~
(e)
(b)
nGOE 6. The Configuration Block (CB) reconfigures the 80150 for specific hardware systems. a) The CB constants read
down from the 80150, and vanables used at run-time. b) The BIOS portion of the CB conta1Ds configuration-dependent data.
c)These addres.es proTide access to the 80150 on-chip code, to alter e"ecullon paths for different coDfiguratlons and stepplngl.
and stack areas had to be removed from code that would reside
in ROM.
Figure 5(a) shows the general structure of the original CCP
and BOOS. Although a natural separation between code and
data is clear, Digital Research did not distinguish between
constants, literal messages, and pure scratch storage.
Intel's first step in the transformation of CP/M-86 was to
group all variables within each module, including buffers and
stacks. We then placed thIS data grouping at the end of the
constants and literal mes,age, for each of the CCP and BOOS
modules.
The new structure (Figure 5(b)) includes all code, constants,
and internal messages, as well as a 16-byte initial-programo·load
(IPL) boot resident in the 16K-byte OSF ROM; We removed all
variables from the body of CP/M-86, and put them in an eXternal RAM-based structure.
.
Second, the implementation of CP/M via the Intel 8086
"small model" (separate code and data segments) rather than
via the 8080 model (intermixed code and data), meant that the
necessary additional variable data space would be available at
80150 execution time. The segmented architecture of the iAPX
86 family made this implementation easy, because separate
CPU registers were available for data and code addresses. As
part of the BIOS initialization, we moved the constant data
structures for the CCP, BDOS, and BIOS to the base of a
RAM-resident Configuration Block (CB). An additional
amount of RAM equivalent to the total variable space was also
allocated and preset to zero. This 8086 "small-model" transformation not only made it easy to separate code and data, but also
made the code more efficient and eliminated approximately
2100 bytes.
We achieved configuration and stepping independence via
the off-chip RAM-based Configuration Block. Figure 6(a)
shows the overall structure of the CB as constructed during
BIOS initialization. During initializatiOJi, the 80150 BIOS
copies the CCP, BOOS, and BIOS constant and literal structures into the Configuration Block, and appends additional
space for variable and scratch-pad storage. Even the location of
the CB is alterable, based on the address stored in locations
0:3FE-3FF.
Figure 6(b) shows expanded portions of the CB. The data
area contains pointers that can be changed to select custom
off-chip code instead of the standard on-chip code. The entire
BIOS can be replaced. (The BIOS code insert in Figure 6(c) and
the various code labels are reflected back to the CB.) Complete
I/O control block structures are Pcovided for each CP/M logical
device, including CRT, keyboard, list, auxiliary, and disk. The
control block includes port addresses, protocol support, and
other default data needed to detect and control the status of
each peripheral. Figure 6(b) also expands the systems 'tables
and buffers created for disk support.
The addresses in Figure 6(b) indicate how stepping independence is achieved. Any off-chip routines changed by the user
can be selected by altering the address of the CB. If Intel
updates an on-chip routine, the address in the CB is updated
automatically when the 80150 copies its constant structures
into the CB. As explained above, full stepping independence is
maintained, because any ROM changes can also be imple-
2-114
VLSI DESIGN March/April 1983
210341·004
intJ
AR-286
men ted off-chip by- having the address in the CB point to an
off-chip patch. (The CB contains BDOS entry points (shown in
Figure 6(b» that make thiS change possible.)
RAM data is somewhat more innovative. One silicon-related
specter that haunts software designers is the fear of
"committing code before its time." But software designers can
never expect to produce bug-free code the first time: And system designers cannot always predict the capabilities or the
implementation requirements of peripheral devices that have
yet to be built. Nevertheless, software designers who use the
general silicon-implementation strategies of position independence and configuration independence, and who provide for
stepping independence, can create standard silicon hardware
0
without fear of component obsolescence.
The Configuration-Independent Interlace
Use ofthe predefined configuration requires that the 80150 be
installed at the top of the 8086 memory address space (FCOO:O).
The I6-byte internal hardware boot is activated at all POWER
ON and hardware resets. and passes control to the 80150. The
80150 initialization sequence uses this positioning to indicate
the default hardware configuration (floppy disk, printer port,
serial console, or auxiliary port). Each device has predefined
port addresses, interrupt assignments, and protocols. The
iAPX 186 or 188 CPU supports programmable chip-selection
and the on-chip DMA drives the floppy disk controller.
If the configuration must be altered, or if the BIOS code
needs revision, the 80150 can be installed on any 16K code
boundary except at the very top or bottom of memory. A
PROM that contains off-chip code and data for a user's particular configuration is also installed at the top of memory.
The 80150 initializes the default system hardware tables,
then calls an EPROM to complete or revise the existing data in
the off-chip CB RAM area. At this point, the CB contains the
addresses that select either on-chip or off-chip code. When the
configuration is complete, control is returned to the 80150. The
80150 completes the CP/M initialization, displaying the familiar
CP/M "A" sign-on.
About the Authors
Ron Stamp received the AS. degree in
software technology from Portland Community College, and gained much of his skill in
electronics at Clark Community College in
Vancouver, Washington. He has worked In
Intel's OEM Module Operation III Hawthorne, Oregon since 1978 and IS currently
the project leader for component software.
Jim Person received the B. S degree
Conclusion
Converting software to silicon is not new. But redesigning
software to consist of on-chip ROM code and configurable
In mathemattcs in 1962 from the UOIverslty of
Arizona. He was the engmeenng project
manager at Intel for the 80150 "CP/M-on-achip."
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. ARTICLE
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June 1983
Reprinted with permission from Electronics,
March 24,1983. Copyrlght© 1983. McGrayrHllllnc. All nghts reserved
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SPECIAL REPORT
Punching in for real-time jobs
in industry, R&D, and offices,
operating systems use special
software structures to squeeze
better-than-ever performance
out of 16-bit microprocessors
by Stephen Evanczuk, Software Editor
oA
special class of operating systems is hard at
work in the 16-bit microsystem world. For controlling
environmental processes, acquiring data at high
speed, or even handling transactions at a commercial bank, these operating systems contain mechanisms that enable them to respond rapidly to external events and that differentiate them from the more
familiar general-purpose operating systems.
In fact, all the operating systems for 16-bit microprocessors respond in a reasonable period of time.
But the general-purpose, or developmental, operating
systems like CPIM, Bell Laboratories' Unix, and MSDOS are intended for standard programming activities like editing, compiling, and file management
[Electronics, March 24, 1982, p. 113]. As such, they
lack certain software structures needed for reliable
control of processes producing data at a high speed.
Real-time operating systems tend to fall into two
general categories-multipurpose and embedded, reflecting the type of hardware they run on. Multipurpose real-time systems are typically built around fullfledged microcomputer systems with terminal,
keyboard, plenty of system memory, and mass storage. Furthermore, in process-control or data-acquisition applications, some special-purpose hardware is
usually included in these systems to serve equipment
or high-speed data input operations. Besides the familiar applications for research and development,
transaction-processing environments are an' example
of situations needing multipurpose real-time systems.
No doubt the largest class in volume because of
their growing use in consumer items, embedded systems are minimal hardware systems, often just onechip microprocessors that control limited parts of a
larger system. Programmers ordinarily employ a special development system to create the software,
which is loaded into the target system for use and
ideally is never seen again.
To meet the needs of these two classes of applications, real-time operating systems 'come in three
flavors for 16-bit microprocessors. Serving multipurpose real-time systems, one type-discussed in the
first part of this report (see p. 106)-includes all the
software development support found in their generalpurpose counterparts. Furthermore, many can be
stripped of the layers needed in the developmental
environment and placed in programmable read-only
memory for use in an embedded system.
For "'ose who swear by Unix, the group of Unixbased operating systems discussed in the second
part (see p. 111) may mean no need to swear at it in
real-time applications. A growing number of vendors
are starting to convert this admittedly non.:..real-time
operating system into versions that can be used to
handle external processes. Although the industry is
cautious, if not downright skeptical, of real-time versions of Unix, the fact that C-the language of
Unix-is so highly regarded for use in real-time applications may help swing this group iDto the forefront.
The potential for distributed-control systems based
on embedded microprocessors hinges largely on the
availability of high-performance real-time operating
systems that can be plugged into the application with
the same ease as an integrated circuit. Called silicon
software, these operating systems discussed in the
last part (see p. 114) have been deSigned to be
stored in read-only memory. Providing a fixed set of
system calls, they present programmers with a consistent set of high-level commands to perform the
low-level functions usually built from scratch.
Building system-level software from scratch has
long been the hallmark of real-time programmers,
even a mark of honor. Fortunately, however, the increased acceptance of ready-made operating systems using well-understood algorithms (described in
the first part) is helping to replace this software "random logiC" with rather more standardized packages.
On still another level, the unique responsiveness
and throughput demonstrated by real-time operating
systems is a truly user-friendly feature. For this reason, these systems should find their way into less
obvious real-time applications, such as transaction
processing, word processing, and personal work stations for office automation.
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AI90rithms star in
multipurpose slJstems
o Whatever environment it finds itself in, the function of
an operating system is the efficient management of
shared resources by a number of users, whether these are
human beings accessing a computer through teiminals or
programs vying for a single central processing unit. In
fact, the degree of sophistication of an operating system
is reflected by the number and types of physical resources it manages and by the fineness of control it
exercises in their management. And operating systems
targeted for control of the external environment must
wrestle with the most demanding resource of all-time.
The degree of care with which such software is designed
to manage time is what determines its suitability for the
real-time environment.
Schedule,. and queu••
Two critical aspects of the r~-time environment are
the random nature of physical events and the simultaneous occurrence of physical processes. Consequently,
interrupt handling and multitasking are primary attributes of a real-time operating system. In fact, it might be
EXECUTING
PROCESS
Cl
TASK WAITING
TO EXECUTE
RELATIVE
PRIORITY
I.) ROUND·RDBIN SCHEDULING
EXECUTING
PROCESS
Ib) PRIORITY'BASED PREEMPTIVE SCHEDULING
1. PriOrlti.s.)n round-robin scheduling (a), tasks (or processes) talle
equal turns executing, while a higher-priority task Will supersede a
lower-priority one in priority-based preemptive scheduhng (b) Most
schedulers employ some combination of these techniques.
argued that the mechanism for handling multitaskingthe scheduler-is the heart of the operating system. The
rest of the operating system lies atop this kernel and
serves the specific demands of the application
environment.
In particular, the lists, or queues, and their managers
that surround the scheduler are constructed to deal with
the different physical resources supported by the operating system, Thus, one queue may contain those tasks
(processes, or programs in the course' of being run) that
are ready to execute on the processor, another queue
may be tasks waiting for access to input/output hardware, and another queue may contain tasks waiting for
some specified event to occur.
In any multitasking operating system, the scheduler
uses the queues as input. Its output, on the other hand, is
a single task that has been activated and allowed to
execute on the central processing unit. The scheduling
algorithm in large part defines the operating system.
In one system, the scheduler may simply select a task
on a first-come, first-served basis, allowing it to run until
completion or, until some specified period of time has
elapsed. This type of relatively primitive algorithm was
commonly used in mainframe computers running simple
batch-oriented operating systems.
In a slightly more sophisticated operating system that
can be used interactively through terminals, the scheduler may select tasks on a round-robin basis and permit
each of them to run for a specified period -of time (Fig.
1). Once the task exceeds its time slice, it is placed at the
end of the queue and forced to wait until all other tasks
have had a chance to execute.
Round-robin scheduling with equal time slices is adequate if every task is no more important than any other
task. However, if some are considered to possess a higher
priority, then a more sophisticated scheduling algorithm
must be used-one that recognizes that some tasks are
more important, but that no task should be excluded
from using the CPU.
One solution is the use of several queues, where the
length of the time slice is related to the priority of
elements in the queue. In this case, the scheduler would
allow all tasks in each queue of a different priority to
execute on the cPu, but lower-priority tasks would be
given less time.
A further refinement permits higher-priority tasks to
suspend a running task. This technique, called preemptive scheduling, is an important feature for real-time
environments, in which the delayed execution of a highpriority task could have disastrous results, rather than
simply disappointing the user.
In scheduling algorithms, tasks may exist in a number
of logical states, depending on their readiness to run. In
the Versatile Real-TimeExecutive (VRTX) from Hunter
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& Ready Inc .• Palo Alto. Calif.• for example. tasks are
the task may be reactivated. Thus at each clock tick only
the counter in the element at the head of the queue need
be decremented, rather than every counter in every queue
element. This method takes longer to insert new elements
into the queue and so requires slightly higher overhead
for insertion than when the total time is maintained by
each counter; however. that overhead is more than offset
by the time saved by Updating only a single counter.
Real-time environments pose a special set of problems
for resource allocation. Besides all the more familiar
problems of scheduling. a real-time operating system
must maintain reliable behavior under extremes of load
when it is driven by a high rate of external stimuli. From
the system user's point of view, the system must maintain a predictable level of respOnse and throughput.
In an interactive environment, users sitting at terminals measure response as the time the system needs to
react to a keystroke. In general, system response is the
time that the system needs to detect and collect data
from some external stimulus. Throughput, in an interactive environment. is seen as the number of users able to
utilize the installation simultaneously. In a more general
Another u.. for queu..
real-time environment. throughput is the rate at which
In addition to having queues serving the scheduler the system is able to collect, proces$, and store data.
directly. most systems use them as the preferred means
In fact, although response and throughput share some
of associating a task with a required resource. For exam- common software elements, operating-system designers
ple. one capability commonly found in real-time operat- will invariably find themselves forced to make choices
ing systems is the ability to suspend a task for a specified that will tend to optimize one at the expense of the other.
period of time. Typically. the operating system contains a Often. the interrupt-handling requirements of a real-time
special queue for this function. Each element in the operating system force this choice.
Interrupt processing is hardware and software integraqueue is a task in a suspended state. Associated with
each task is a counter that contains the number of clock tion at its most demanding (see "Handling hardware
interrupts," p. 108). To handle interrupts, operating systicks remaining until it should be reactivated. ,
For example. in iRMX-86 from Intel Corp., Santa tems often place layers of software between the user and
Clara. Calif.. the counters keep track of the incremental the microprocessor in order to allow different levels of
time remaining with respect to the previous element in performance and capability.
Intel's RMX-86 is a typical example of distinct levels
the queue. rather than the total time remaining before
of software used to perform basic interrupt processing.
At the lowest level. an interrupt handler works intimately with the hardware to execute some operation, such as
sending a message character by character to a printer.
Code for interrupt handlers is kept compact and simple,
since system interrupts afe disabled during their operation. The higher level, called the interrupt task. works at
a prionty a.~sociated with the particular hardware it services. Interrupt tasks act as interfaces between application tasks, working with specific interrupt handlers to
complete execution of operations dealing with external
devices. RMX makes this interrupt-handling mechanism
available to application programs through a special set of
system calls.
driven through four possible states by external events. by
other tasks and system utilities. or by their own system
calls (Fig. 2). For example. an executing task may delete
itself-in which case it enters a dormant state-or may
cause itself to be blocked either explicitly through a call
to suspend itself or implicitly through a call to perform
some I/O function. On the other hand. once suspended. a
task may reschedule itself through a system call. or ·an
external real-time event may bring the task back into the
ready queue.
Recognizing the importance of scheduler design. at
least one software vendor has made it easier for real-time
users to build systems around a prepared kernel. yPited
States Software of Portland. Ore.. is offering a basic
scheduler that assembles into less than 100 bytes of object code for the target microprocessor [Electronics. Nov.
17. 1982. p.206]. Furthermore. in anticipation of realtime systems targeted for specific application areas. U. S.
Software supplies a list of design notes detailing extensions to the basic kernel.
2. T,... ...... As one task (or process) runs, others may be in
various states of readiness. In Hunter & Ready's VRTX, for example,
tasks can be ready (able to run immediately), suspended (waiting for a
resource), or dormant (deleted by a system call).
Protection and communication
Once the interrupt software has completed its function.
tasks that use the data are indistinguishable from any
other task in the system as far as the operating system is
concerned. Unless special care is taken, conflicts could
still arise between two separate tasks that might need to
use the same resource, such as the same location in
memory. MP/M-86. for example. employs a special
queue. called a mutual exclusion queue, that contains a
unique message representing the shared resource. In or-
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AR-287
der to use the resource, a,
task must first capture
the message, much as a
node in a token-passing
network must first obtain
the token before being at
liberty to trapsmit.
Per Brinch Hansen l
identified such shared resources as key elements in multitasking systems. Sections of code that access critical resources are called critical regions. The simple expedient
of ensuring that only one task at a time is allowed in a
critical region guarantees that multiple tasks may share
the same critical resource without fear that its integrity
may be compromised when two of them attempt to access it simultaneously (Fig. 3).
This concept of the mutual exclusion of tasks from
critical regions is implemented in a structure called a
monitor, in which critical regions are gathered in one
section of code and protected from use by more than one
task at a time. The MSP operating system from Hemenway Corp. of Boston [Electronics, Jan. 27, 1983, p. 119]
explicitly supports mutual exclusion through monitors in
its internal structure.
Furthermore, user-written routines needing monitor
protection are provided with four functions in MSP that
are implemented using hardware traps for rapid access:
Entermon, Exitmon, Wait, and Signal. Entermon and
Exitmon serve as monitor entry and exit points, respectively, performing required housekeeping functions. Entermon disables system interrupts and preserves all registers, while Exitmon reverses these actions. Wait and
Signal, on the other hand, work in tandem to control
access to a critical resource. Wait queues up tasks needing an unavailable resource. Signal releases them from
the queue when the resource becomes available.
Wait and Signal are examples of an intertask communication mechanism, called semaphores, found in most
real-time operating systems. As noted, these commands
simply queue up and release tasks needing a critical
resource. Such a resource may be an 110 device, a memory location, or simply a go-ahead' signal that synchronizes a pair of tasks. For example, task A may execute
only after task B, has completed. In this case, task A
would begin with a Wait (flag) command, where the flag
is used as an associated variable. Task B, on the other
hand, would end with a Signal (flag) command. In this
way, task A would be blocked until task B had executed
its Signal command at the end of its processing. But
exchanging simple go-no-go signals is not sufficient for
many multitasking environments.
For longer messages, real-time operating systems offer
extensive intertask communication facilities called mailboxes. Mailboxes are essentially semaphores with storage.
As such, tasks needing data from another task will wait
until the other has loaded the mailbox with the information. Intel's object-oriented RMX-86 transfers any of the
defined objects in the system through mailboxes. Hemen, way's MSP, on the other hand, provides a buffer of fixed
size that may be used without restriction on its contents,
as long as the 256-byte buffer is not exceeded. With its'
Multibus message exchange (iMMX) extension to RMX for
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software has evolved into complete operating systems in
memory, engendering the term silicon software. Complementing hardware for distributed-processing architectures, such silicon-software systems signal a migration of
application software into dedicated microcomputers previously considered unable to gain full systems capability.
For developers of dedicated microcomputers embedded
in some larger real-time system, silicon software spells
the end of the need to reinvent the wheel to carry out the
fundamental functions of a real-time operating system.
protection, timing, and communication problems (see
pp. 106-111). In fact, the development problems extend
beyond the purely logistical exercise of maintaining a
separate ROM-based instruction store and one for variables that need to be placed in system read-write memory. Treading a fine edge between the full function of a
general operating system and the fine-tuned performance
of special-purpose software, silicon systems need to balance the need for a wide range of system functions with
the requirement that they squeeze into a minimal amount
of ROM.
Flexlbll~ for exPansIon
Still, once a system meets a reasonable compromise
between capahility and size, it should not irrevocably
lock the user into accepting its choices. For example,
many real-time applications require some custom peripheral-device drivers and system-level functions. Consequently, the program should provide a mechanism for
logically incorporating user-written extensions to the operating system, such as the user-defined pointers in the
VRTX system from Hunter & Ready, Palo Alto, Calif.
lldendlng the mlcroproceaor
In VRTX, a configuration table (Table 2) in system
Functionally, silicon operating systems extend the mi- random-access memory allows specification of a custom
croprocessor's instruction set to include system-level in- routine that is to be executed whenever the system is
structions that perform operations on software structures, initialized. For even more delicate control of system oplike queues and tables, rather than on hardware registers. erations by custom software, a trio of pointers in the
Application-program developers are then presented with table specifies user-written routines to be accessed whena virtual machine-one that is perceived by the program- ever a task is created or deleted or whenever a context
mer as different from the actual host processor. In these switch is performed. Hunter & Ready also includes a
virtual operating-system machines, their instruction set location in this baseline configuration table for its anticiincludes a well-defined set of system calls as well as the pated file-management extensions to VRTX.
basic machine instructions of the host microprocessor.
The 80130, an RMX-86 kernel in silicon from Intel
For example, with systems like VRTX and RMX, the virtu- Corp., Santa Clara, Calif., generalizes this approach
al microprocessor has a special set of instructions for through an index table containing pointers to system
handling interrupts (see Table I).
routines. If circumstances require the replacement of an
For system developers, however, the problems in devel- existing system routine, the index-table pointer is merely
oping reliable silicon software extend beyond resource altered to indicate the address of the new routine. In an
Ileotronlca/March 24, 1983
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TABL l 1 SYSTE:-M (ALl S FOR HANDIINC, JNHRHlJP1S
TABLE 2 VRTX CONFIGURATION TABLE
J£~H~~:~~~::~~
Versatile Real Time Executive (VRTX)
UI POST
sys RAM addr
deposit message from Interrupt
system beginning address
handler
UI EXIT
UI TIMER
timer mterrupt
UI RXCHR
receiver ready Interrupt
UITXRDY
transmitter ready mterrupt
assign Interrupt handler
ROSRESETSINTER RUPT
deassign Interrupt handler
ROSGETSLEVEL
return number of highest-priority
mterrupt level currently belOg
processed
ROSSIGNALSI NTE R RUPT
system memory size
system stack size
user RAM-addr
starting address for available memory
In
Initial partition
oRMX-86
ROSSETSI NTE R R UPT
sys RAM-Size
sys-stack-slze
eXit from mterrupt handler
signal from mterrupt handler that
user-RAM-size
size of Inlt.al partition
user-block-size
size of memory block for dynamiC allocation
user-stack-slze
size of stack for user tasks
user-task-addr
address of first user task
user-task-count
maximum number of tasks
Sys-Inlt-addr
address of user-supplied Initialization routine
sys-tcreate-addr
address of user-supplied routme accessed
when a task IS created
sys-tdelete-addr
address of user·supplted routine accessed
when a task IS deleted
sys·tswap-addr
address of user-supplied routme accessed
when a context SWitch occurs
(RESERVEDI
address of Hunter & Ready future
extensions to VATX
event has occurred
ROSWAITSINTERRUPT
walt for occurrence of event
ROSEXITSINTERRUPT
relinquish control of the system
ROSENABLE
enable hardware to accept mterrupts
ROSDISABLE
disable hardware from acceptmg
Interrupt!>
embedded system, this new routine could be placed in
ROM along with application software.
Now that programs in ROM have matured into silicon
systems, the development of software for embedded systems may now follow a more hospitable development
cycle. The particular method used to create embedded
systems will, in general, fall into one of two paths represented by the two major camps.
On one hand, kernels in silicon from systems such as
RMX-86 or the MSP from Hemenway Corp., Boston,
Mass., for the 68000 or Z8000 are self-contained subsets
of the full operating system. Consequently, software programmers may use the full development version of the
same operating system as that in the eventual target to
create the application package. On the other hand, development of application programs around the ZRTS system
from Zilog Corp., Cupertino, Calif., or Hunter &
Ready's VRTX for the Z8002, iAPX-86 family, or 68000
relies on the use of a separate development system to
create software for the target microprocessor, since this
software does not have development versions.
Two approach.s
The significance of these two approaches as usual depends on the intended application. Hunter & Ready
views VRTX as a set of processor-independent building
blocks that programmers use to construct application
packages for embedded systems. As such, the programmers employ the same development systems that they
might use to build application code, but now with the
benefit of a sophisticated set of ready-made system-software components.
In playing its part in Intel's systematic drive toward
providing an Integrated enVironment around the iAPX86 family, the K0130 holds the anchor position in an
interlocked set of components. Able to function independently of the upper layers of the operating system, it
provides a hardware base for the rest of RMX-86. Serving as a viewport IIlto this system-software base for the
central processing unit, Intel's universal run-time and
development interfaces offer the mechanism for software
portability needed for the next stage in the company's
plan to grow into higher-performance microprocessors,
such as the 186, 286, and 386.
While interlocking with the software in this way, the
80130 also must play its role in the complementary relationships being established at the hardware level. As
such, it includes on-chip hardware support for systemlevel functions, including timers, interrupt controller, bus
control, and bus interface.
Meanwhile, Intel's plan for software-in-silicon becomes
evident as it gathers the other pieces of the puzzle, such
as the 82730 text-coprocessor chip, the 82586 local-network coprocessor, and the 82720 graphics processor
chip. Similar to the 80130 software connection, the 82720
graphics part interlocks with the rest of the system at the
software level through its support of another well-defined
software interface-the virtual device interface. Yet to
come are pieces for voice 1/0 support, as well as some
level of hardware support for data-base access.
0
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June 1983
Copynght© 1983. CMP PublicatIOns. Inc I 111 E Shore, Rd, Manhasset, NY 11030
Repnnted wIth permission from Electronic Englneenng TImes.
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Intel's Matchmaking Strategy: Marry
iRMXTM Operating System With Hardware
Intel's major software product, the iRM)(TM-86 I6-bit
operating system, which is now in its fifth release,
represented a three-year development investment which
most independent software vendors would have found a
daunting prospect in 1978 when the project was conceived.
The investment was essential. By the mid-I970s, feedback
from OEMs working with Intel's hardware revealed problems with system integration-the marriage of software
with hardware. It consequently slowed sales, with the
prospect of even greater problems at higher levels of circuit integration. Intel management, looking for ways of
coping with the ballooning software requirements of the
rapidly accelerating hardware program, began stepping up
software development programs in the mid-I970s.
Object-oriented programming is a method which has
worked best in creating a software program blending with
the component approach. By hiding data representation
within an object with its own object manager, changes in
the hardware environment that affect the data can be accommodated without having to change the rest of the
software.
"The RMX program illustrates a number of things one
needs to keep in mind with developing a real-time
operating system;' explained Bill Lattin, Intel's OEM
microcomputer systems manager. "Foundations must be
well laid so the system can grow and evolve over time. And
there is a need for the system to be open to modification
by typical OEM-specific applications.
"Although the RMX program has been around since
1978, it has only recently hit its stride, as processor
technology has advanced to use the full range of its
features;' Lattin said.
The fast-paced microcomputer market had created a new
situation for systems designers in terms of a radical shift
in the hardware/software cost ratio. Earlier hardware
generations involved various expensive centralized
facilities. Not only was software cheap in comparison, but
the hardware environment changed slowly, so that it was
also feasible to rewrite systems as needed.
A price is paid in terms of program size with this approach, however. And it was difficult at the time to justify
this kind of liability with the existing onboard memories
of the 8-bit generation.
Bill Stevens, iRMX-86 program manager for release five,
explained the difficult decisions that had to be made at the
outset of the program. "Every engineering decision
involves a trade-off. We wanted to optimize program productivity and we had to have modularity. The consequence of this was large size. It turned out that a minimum
configuration was 12 kbytes wide and the full configuration was 128 kbytes. At the time we did not have 64k
dynamic RAMs and 64k EPROMs, so we didn't have the
technology to realize the systems of initial specifications
times. Bruce Schafer has to take credit for making that
decision to go ahead anyway, early on. . . it was a gutsy
decision, and it turned out to be absolutely righe'
But when the price of a computer drops to as low as $5,
the hardware environment becomes volatile and software
turns into a major investment. Intel was finding that
customers might invest as much as two-thirds of their
development costs in software, only to see it eclipsed by
evolving VLSI technology.
It became evident that merely supplying components
would become increasingly counterproductive. Thus, the
Intel "total solution" emerged-a consistent systems approach to hardware sales, which naturally depends heavily
on a viable software program.
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Had Intel known of th~ difficulty it was about to encounter in producing its 64-kbyte RAM, Schafer may have
had second thoughts.
processing aspects of real-time applications required a
special test apparatus to simulate a real-world
environment.
Schafer joined Intel in 1976 and began working on
iRMX-80. "It was a nice little system;' Schafer said. "A
miniature dispatcher had evolved to handle multiple asynchronous events and became a primitive OEM operating
system. It was tempting to do an enlarged version of it,
mainly because I was already working on it for the 16-bit
generation!'
What they came up with is a nucleus executing directly on
the 8086 and 8088 processors as the basic building block
of the system. Together with the next Iayer-a basic I/O
system-a minimal operating system can be configured,
which has been found useful in many applications.
Schafer soon found himself centrally involved in the task
of heading off the 16-bit software crunch, laying groundwork for a system that could cover a wide range of applications, many of them unknown at the time, and a
system which could also evolve with hardware advances.
"When you set out to design a system of that scope, you
don't just sit down and start writing code. It's definitely
a top-down process;' explained Schafer. He discovered
early in the project that the purely technical hurdles in
writing software were minor compared to orchestrating a
team of engineers on such a comprehensive project.
The iRMX-86 system is multi-layered, and the project had
to be coordinated across these layers along with the sequence of planning, design and implementation. On top
of that, a thorough testing program had to be coordinated
with all phases.
"I had a difficult time convincing engineers on the project that documentation of their work was as important
as the work itself. Specifications were absolutely crucial
to the development phase!' said Schafer.
Schafer began with a customer survey to discover the kind
of problems OEMs were experiencing with system design.
He wrote a production implementation plan, which was
critiqued by marketing and engineering personnel. This
was approved in June 1978 and formed the basis for
engineering specifications. A critiquing process evolved as
the organizing principle behind initial product design;
engineers on the project would exchange qocumentation
and then meet to evaluate the progress of the system.
The sessions were lively and the problems of coordinating
implementation, testing and design along with the pressure
of deadlines for the whole progr"ilm generated quite a bit
of excitement.
Development testing turned out to be a particularly thorny problem-the asynchronous interrupts and multiple-
However, it was necessary to develop an application on
the Series-III development system even though the target
was going to be RMX. "We quickly realized that users
want to be able to do development work on the machine
they target on;' said Schafer. "This is particularly important for field maintenance ... you can't drag a Series-III
out to an oil derrick!' To realize this goal, Intel built higher
layers around iRMX so that program development could
be done without a Series-III. Higher layers involve extended I/O and human interface facilities. After this,
customer-written software can be added in high-level
languages.
A major objective has been to provide a stable base for
independent software vendors; with its latest release,
Intel also announced an ISV program initially involving
three major vendors; Microsoft, Digital Research and
Mark Williams Inc.
The first release of iRMX-86 came out in April 1980. Since
then, the system has been refined and released four more
times, with release five al?pearing last December. An Interactive Configuration Utility appeared for the first time
with release five, a further attempt to aid OEMs in putting their systems together. The system designer runs the
ICU program on a terminal and is quizzed on his requirements, after which the program generates the unique
iRMX software for his application.
"It has been a successful product in its own right, apart
from its role in the hardware program, but I doubt that
anyone would have wanted to invest in a three-year
development process before, there was a chance at some
return;' observed Stevens, who has been most excited by
the diverse applications he has seen. "I've really enjoyed
the iRMX symposiums. There is always some new system
demonstrated. In Tokyo, I just saw an 8086-based scientific system with really first-class graphics put together by
Seiko. Another time I saw a blood analyzer based on the
system. There are even RMX-based personal computers!'
2-130
21OM1.Q04
ARTICLE
REPRINT
AR-289
June 1983
21034'-004
Copynghl© 1983 by Techntcal Pubhshmg, a dlVls10n of Dun-Donnelley Publication Corp,
a company of Dun & Bradstreet Corp, Hudson, Mass 01749
2-131
intel·
AR-289
iRMX™ 86 Has Functionality, Configurability
The iRMXTM 86 operating system provides a modular set
of building blocks from which users can create a wide
variety of applications. iRMX 86 features include:
multitasking; interrupt support; multiprogramming support; device independence; tree-structured directories, file
access control; and interactive debugging.
The iRMX 86 operating system combines the concepts of
objects, types, and type extension to form a highlyfunctional and highly-configurable foundation for applications software. The operating system is designed for
use with programs executing on the iAPX 86 and iAPX
88 processors. The 8087 numeric data processor is supported as on option.
Execution Environment
The iRMX 86 Operating System can be used with a variety
of hardware configurations. Interactive disk-based
systems as well as ROM-resident systems can be
constructed.
Any part of the operating system's code can reside in
ROM/PROM memory. Alternatively, ail or part of this
code can be "bootstrapped" into RAM using a small,
configurable bootstrap loader provided with the product.
The application code can similarly be committed to
PROM or bootstrapped into RAM.
The operating system divides the execution envirqnment
into jobs and tasks. A task is described by a set of processor registers, a stack, a priority, and a state. Jobs provide resources for tasks. A job can be viewed as a task
environment. In the simplest case a job represents a
memory pool. Tasks executing in the same lob share the
same pool of memory. When a job is deleted, all tasks
within the job are also deleted and all memory allocated
to these tasks is deallocated.
The design of the iRMX 86 Operating System is based on
a set of objsct types. The operating system supports
dynamic object creation. Each time an object is created,
the operating system allocates the proper resources to the
object and returns a 16-bit virtual address called the object's token. This token is subsequently used by the application to identify the specific object.
By implementing this object-oriented approach, the
iRMX 86 Operating System hides implementation details
from the application software. The iRMX 86 Nucleus also
allows users to add custom object types without changing
the Nucleus.
I/O Devices
I/O devices can be manipulated in two ways. The first approach allows the application to receive interrupts directly
from the I/O device. The second approach utilizes the
iRMX 86 Basic I/O System. With this approach, a device
driver must be written for initiation of I/O requests and
for interrupt handling. The application software interfaces
to these drivers through the Basic 110 System by making
read, write, seek, and special-function requests.
The iRMX 86 Operating System currently includes device
drivers for diskettes, Winchester disks, magnetic bubble
storage devices, and Storage Module Device (SMD)
interfaces.
The iRMX ,6 Extended 110 System defines the concept
of a logical device. Using this feature, each device is
assigned a logical name. Application programs refer to
logical devices without knowing which physical device is
associated witl) each logical device. In this manner, the
physic'al devic~ can be changed without changing the application programs.
The iRMX 86 system is composed of several layers. The
innermost layer is the Nucleus, which provides multitasking, interrupt control, and multiprogramming support.
The first optional layer , the Basic I/O System, supports
device-independence, directories, random access, and file
access control.
The Basic 110 System provides asynchronous 110 functions. Each asynchronous function is initiated by a procedure call that queues the request. The procedure call
returns immediately with an indication of whether the request was successfully queued. When the request is actually completed, a response message is sent to the mailbox
specified.
"On top" of this layer, users may add the Extended I/O
System (providing services such as automatic buffering)
or the Application Loader (which supports loading both
absolute code and locatable code). The Human Interface
uses these inner layers to support user-defined commands
in addition to a set of standard commands.
The Extended I/O System automatically synchronizes I/O
requests. Again, a procedure call is used to initiate 110.
The procedure, however, does not return until the request
is complete. To enhance efficiency when this automatic
synchronization is used, the Extended I/O System permits
read-ahead and write-behind.
210341-004
2-132
AR-289
The iRMX 86 Human Interface automatically parses input lines and invokes the appropriate program based on
the first word in each line. A program executing under the
iRMX 86 Human Interface can request command execution by providing the text for these commands to the command line interpreter.
Scheduling requires changing the state of the task and
placing the task in a queue of ready tasks. Whenever a task
is scheduled or descheduled, the Nucleus checks the ready
queue and allocates the processor to the highest priority
ready task. In order to ensure event-driven scheduling, the
iRMX 86 Nucleus is designed to place an absolute limit on
the interval during which interrupts are masked.
One attribute of the job type is a memory pool. Each
memory pool represents the memory resources available
to the tasks executing within a job. All objects created by
these tasks are allocated memory from the pool.
The iRMX 86 Human Interface is supplied with a basic
set of commands to manipulate files. These commands include directory display, create directory, rename file, copy
file, delete file, and submit a set of commands. Users can
add custom commands to this set.
The iRMX 86 Debugger provides the capability to debug
one or more tasks while the rest of the system continues
to execute. The Debugger allows a user to specify that a
task be suspended when the task executes a particular instruction and when the task communicates with other
tasks.
The iRMX 86 Operating System supports three file types.
In all cases, application programs read and write data
without knowing the device or the file type that is used.
The following file types are supported:
The most general communication mechanism provided by
the iRMX 86 Nucleus is the mailbox object type. Each object of this type is described by two queues-a queue of
messages waiting to be handled by tasks and a queue of
tasks waiting for messages. An additional attribute of a
mailbox is the specification of whether the queue of tasks
is to be handled first-in, first-out or on a relative priority
basis.
2) Stream-Stream files do not exist on actual physical
devices; rather, data is transmitted directly from one program to another.
The iRMX 86 Operating System also provides a
semaphore object type. Each semaphore is described by
a queue of waiting tasks and a unit count. This unit count
is equivalent to a count of empty messages at a mailbox,
but, because no actual messages are involved, a
semaphore is a more efficient mechanism than a mailbox.
Since semaphores allow multiple units to be sent at the
same time, semaphores are used to create deadlock allocation functions.
To provide additional efficiency, the iRMX 86 Nucleus
also provides a special type of semaphore called a region.
Each iRMX 86 task has a dynamic priority attribute. This
priority describes the relative importance of the Task's
function with respect to other system functions. The
iRMX 86 Nucleus always runs the highest priority ready
task. When several tasks of the same priority are ready,
the Nucleus arbitrarily chooses between them.
1) Physical-A device accessed as a physical file is treated
as a contiguous sequence of bytes.
3) Named-Named files represent the traditional notion
of files. Named files are described by a path through a
tree-structured network of directories.
The name of an iRMX 86 file is given as a path through
a tree-structured network of directories. Each directory in
this structure can point directly to data files and to other
directories. One directory on each device is considered the
root directory. All paths on a particular device begin in
this directory.
The basic file functions for all three file types are: open,
close, read, and write. When random file access is required, the seek system call is added to this set. For named files, additional functions are needed. These functions
include the rename function, the truncate function, and
the change-access funcHon.
When a file is opened, the calling program specifies the
type of file access required. For a data file, three types of
access are permitted: read, write, and the read/write combination. The 110 system verifies that the specified access
is available and grants the open request only if the requested access is available.
210361-004
2-133
,.
Translators and Utilities
for Program Development
3
inter
TRANSLATORS AND UTILITIES
FOR PROGRAM DEVELOPMENT
Intel offers an extensive selection of program development tools for its microprocessor (8080, 8086, 8088,
80186, 80286) and microcontroller (8048, 8051, 8096 etc.) families. These tools include translators and
programming utilities such as linkers, relocators, and library managers. These program development tools are
high quality, time tested tools for the professional. Based on a set of well-defined standards, they provide an
integrated development environment. The result is an extremely flexible and prod uctive program development
environment.
A LANGUAGE FOR EVERY NEED
The iAPX-86 family has the most comprehensive set of translators available for a microprocessor. These
include a macro assembler and compilers for PUM, Pascal, FORTRAN, and C (see Table 1). The macro
assembler produces the most optimum code. PL/M is the most popular 8086 language for systems
programming and provides the best of both optimal code and high level language capabilities.
The main advantage of 'C' is portability across different target machines. Pascal and FORTRAN are used
extensively for applications programming. To allow applications to be portable, Pascal and FORTRAN conform
to ISO and ANSI77 standards respectively, with many useful extensions for microprocessor applications.
Intel's microcontrollerfamily (8048, 8051, 8096 etc.) is similarly the best supported in the industry. PUM-51 was
the first high level language ever to be introduced for a microcontroller. The 8096 is similarly supported with
PUM-96. Every microcontroller in the family is supported with an assembler and linkage utilities.
USE A MIXTURE OF LANGUAGES FOR MAXIMUM FLEXIBILITY
Programs are typically decomposed into modules to exploit the many benefits of modular programming. Intel's
integrated programming technology allows different modules of the same program to be programmed in a
variety of languages. For instance, the most performance-sensitive system modules may be coded in assembler
or in PUM. The application modules, on the other hand, can be written in Pascal to speed up programming. The
system and application modules can then be linked into one program using the linker. Hence, the various
modules of a program can each be coded in the most suitable-programming language.
UTILITIES ENHANCE PROGRAMMING PRODUCTIVITY
A set of utilities is provided to support modular and position independent programming. The linkers combine
the constituent modules of a program into one system. A locator is provided to position the code in memory.
This allows code to be placed in appropriate ROM and RAM locations. Also, coding can be done in a
position-independent way. The librarian provides a structured way of organizing frequently used routines. The
routines needed by a particular program can be linked in by the linker. The linker automatically selects only
those modules from the libaray that are needed by the program. For the protected, virtual-memory, and
multi-tasking processor iAPX 286, a sophisticated operating system configuration utility BUILD-286, is
provided.
FULL RANGE OF DEBUG SUPPORT
The programming tools are integrated with the debugging tools via the well-defined Intel object module format
standard. iAPX-86 family programs may be debugged using any of the Intel 8086 debug tools. This includes
PSCOPE which provides source level software debug, and' the ICE products which provide in-target real-time
debug. Microcontroller software is similarly supported by the various emulators and ICE units.
CHOOSE FROM A VARIETY OF HOST CONFIGURATIONS
The programming tools are provided on a variety of development host environments to meet the needs of
different project sizes and development budgets (see Table 1). The environments span personal development
systems (iPDS), stand alone development systems (Series III, Series IV), network development systems
(NDS-II) and even theWAXNMS microcomputer. The programming tools work identically, no matter which of
the available host configuratons is chosen. This allows the user to grow his development environment, as his
needs grow, without impacting previous investment in software.
* VAXNMS is a trademark of Digital Equipment Corporation.
3-1
inter
Table 1. Intel Translator/Host Summary
Language
Component Family
Macro Assembler + Utilities
2920
MCS-85 Family
MCS-48 Family
MCS-51 Family
iACX-96 Family
iAPX-86 Family
iAPX-286 (Protected Mode)
1,2
1
1
1
2
1,2,3,
2,3*
PUM
MCS-85 Family
MCS-51 Family
iACX-96 Family
iAPX-86 Family
iAPX-286 (Protected Mode)
1
1
2*
1,2,3,
2,3*
PASCAL
MCS-85 Family
iAPX-86 Family
iAPX-286 (Protected Mode)
1
2,3
2,3*
FORTRAN
MCS-85 Family
iAPX-86 Family
iAPX-286 (Protected Mode)
1
2
3*
lie"
iAPX-86 Family
iAPX-286 (Protected Mode)
2,3*
2*,3*
Ada
iAPX-86 Family
iAPX-286 (Protected Mode)
3*
3*
NOTE: • = Planned
HOST CODES
1 = Intel 8085 Based Development System (iPDS, MDX Series liE)
2 = Intel iAPX-86 Based Development System (Series III, Series IV)
3 = VAX/VMS Minicomputer
3-2
Host Code
PL/M 80
HIGH LEVEL PROGRAMMING LANGUAGE
• Provides Resident Operation on
Intellec® Microcomputer Development
System and Intellec® Series"
Microcomputer Development Systems
• Speeds Project Completion with
Increased Programmer Productivity
• Produces Relocatable and Linkable
Object Code
• Improves Product Reliability with
Simplified Language and Consequent
Error Reduction
• Cuts Software Development and
Maintenance Costs
• Sophisticated Code Optimization
Reduces Application Memory
Requirements
• Eases Enhancement as System
Capabilities Expand
The PLIM SO High Level Programming Language Intellec Resident Compiler is an advanced, high level programming language for Intel SOSO and SOS5 microprocessors, iSBC-SO OEM computer systems, and Intellec
microcomputer development systems. PL/M has been substantially enhanced since its introduction in 1973
and has become one of the most effective and powerful microprocessor systems implementation tools available. It is easy to learn, facilitates rapid program development and debugging, and significantly reduces maintenance costs. PL/M is an algorithmic language in which program statements naturally express the algorithm
to be programmed, thus freeing programmers to concentrate on system development rather than assembly
language details (such as register allocation, meanings of assembler mnemonics, etc.). The PLIM compiler effiCiently converts free-form PLIM programs into equivalent SOSO/SOS5 instructions. Substantially fewer PLIM
statements are necessary for a given application than would be using assembly language or machine code.
Since PL/M programs are problem oriented and thus more compact, programming in PLIM results in a high
degree of productivity during development efforts, resulting in Significant cost reduction in software development and maintenance for the user.
MAY 1983
© INTEL CORPORATION. 1983 '
ORDER NUMBER:210327-G02
3-3
inter
PLIM 80
FUNCTIONAL DESCRIPTION
Block Structure - aids in utilization of structured programming techniques.
The PUM compi-Ier is an efficient multi phase compi.ler
that accepts source programs, translates them into
object code, and produces requested listings. After
compilation, the object program may be first linked to
other modules, then located to a specific area of memory, and finally executed. The diagram shown-in Figure 1
illustrates a program development cycle where the program consists of three modules: PUM, FORTRAN, and
assembly language. A typical PUM compiler procedure
is shown in Table 1.
Access - provided by high level PUM statements to
hardware resourc.es (interrupt systems, absolute
addresses, CPU input/output ports).
Data Definition - enables complex data structures to
be defined at a high level.
Re-entrant Procedures option.
may be specified as a user
Benefits
PUM is designed to be an efficient, cost-effective solution to the speCial requirements of microcomputer soft~
ware development as illustrated by the following benefits of PUM use:
Features
Major features of the Intel PUM 80 compiler and programming language include:
Low Learning Effort - even for the novice programmer,
because PUM is easy to learn.
Resident Operation - on Intellec microcomputer development systems eliminates the need for a large inhouse computer or costly timesharing system.
Earlier Project Completion - on critical projects,
because PUM substantially increases programmmer
productivity while reducing program development time.
Object Code Generation - of relocatable and linkable
object codes permits PUM program development and
debugging in small modules, which may be easily linked
with other modules and/or library routines to form a
complete application.
Lower Development Cost - because increased programmer productivity requiring less programming
resources for a given function translates into lower software development costs.
Extensive Code Optimization - including compile time
arithmetic, constant sUbscript resolution, and common
subexpression elimination, results in generation of
short, efficient CPU instruction sequences.
Increased Reliability - because of PUM's use of simple
statements in the program algorithm, which are easier
to correct and thus substantially reduce the risk of
costly errors in systems that have already reached full
production status.
Symbolic Debugging - fully supported in the PUM
compiler and ICE-85 in-circuit emulators.
Easier Enhancement and Maintenance - because programs written in PUM are easier to read and easier to
understand than assembly language, and thus are easier to enhance and maintain as system capabilities
expand and future products are developed.
Compile Time Options - includes general listing format commands, symbol table listing, cross reference
listing, and "innerlist" of generated assembly language
instructions.
I
Figure 1_ Program Development Cycle Block Diagram
3-4
AFN-008188
PUM 80
ging software for 8080 and 8085 microcomputers, and
the use of expensive (and remote) timesharing or large
computers is consequently not required.
Simpler Project Development - because the Intellec
microcomputer development system with resident
PUM 80 is all that is needed for developing and debug·
Table 1. PUM·80 Compiler Sample Factorial Generator Procedure
$OBJECT(:F1 :FACT.OB2)
$DEBUG
$XREF
$TITLE('FACTORIAL GENERATOR $PAGEWIDTH(80)
PROCEDURE')
FACT:
DO;
2
DECLARE NUMCH BYTE PUBLIC;
3
4
5
6
1
2
2
2
FACTORIAL: PROCEDURE (NUM,PTR) PUBLIC;
DECLARE NUM BYTE, PTR ADDRESS;
DECLARE DIGITS BASED PTR (161) BYTE;
DECLARE (I,C,M) BYTE;
7
10
11
12
13
14
15
2
2
3
3
4
4
4
4
NUMCH = 1; DIGITS(1)= 1;
DO M = 1 TO NUM;
C=O;
DO 1=1 TO NUMCH;
DIGITS(I) = DIGITS(I)*M + C;
C= DIGITS(I)/10;
DIGITS(I)= DIGITS(I) - 10*C;
END;
16
17
18
20
21
22
3
3
4
4
4
4
IF C<>O THEN
DO;
NUMCH = NUMCH + 1; DIGITS(NUMCH) = C;
C= DIGITS(NUMCH)/10;
DIGITS(NUMCH)= DIGITS(NUMCH) - 10*C;
END
END;
24
2
9
END FACTORIAL;
25
END;
SPECIFICATIONS
OPERATING ENVIRONMENT
DOCUMENTATION
Intel Microcomputer Development Systems
(Series II, Series III, Series IV)
Intel Personal Development System
PLiM 80 Programming Manual
ISIS-II PL/M 80 Compiler Operator's Manual
ORDERING INFORMATION
SUPPORT:
Product Code
MDS *-PLM
Hotline Telephone Support. Software Performance
Report (SPR), Software Updates. Technical Reports. and
Monthly Technical NeWSletters are available.
Description
PLiM 80 High Level Language
Compiler. Needs Software License.
*MDS is an ordering code only and is not used as a product or trademark MDS@ is a registered trademark of Mohawk Data Sciences
Corporation.
3-5
AFN·00818B
FORTRAN 80
8080/8085 ANS FORTRAN 77
INTELLEC® RESIDENT COMPILER
• Meets ANS FORTRAN 77
Subset Language Specification plus
adds Intel~ microprocessor extensions
• Supports full symbolic debugging with
ICE-SOTM and ICE-S5™
• Produces relocatable and linkable
object code compatible with resident
PL/M SO and SOSO/SOS5 Macro
Assembler
• Supports Intel Floating Point
Standard with the FORTRAN 80 software routines, the iSBC-310™ High
Speed Mathematics Board, or the
iSBC-332™ math multimodule
• Provides optional run-time library to
execute in RMX-SOTM environment
• Executes on Intellec Microcomputer
Development System, Intellec Series
" Microcomputer Development System,
, and Personal Development System
• Has well defined I/O interface for
configuration with user-supplied
drivers
FORTRAN 80 is a computer industry-standard. high-level programming language and compiler that translates FORTRAN
statements into relocatable object modules, When the object modules are linked together and located into absolute
program modules. they are suitable for execution on Intel 8080/8085 Microprocessors. iSBC-~O OEM Computer Systems.
Intellec Microcomputer Development Systems and Personal Development Systems, FORTRAN 80 meets the ANS
FORTRAN 77 Language Subset Specification1 , In addition. extensions designed specifically for microprocessor applications are inc,luded. The compiler operates on the Intellec Microcomputer Development System and Personal Development
System under the ISIS-II Disk Operating Systems and produces efficient relocatable object modules that are compatible
for linkage with PL/M 80 and 8080/8085 Macro Assembler modules,
The ANS FORTRAN 77 language specification offers many powerful extensions to the FORTRAN language that are
, especially well suited to Intel 808018085 Microprocessor software development. Because FORTRAN 80 conforms to
the ANS FORTRAN 77 standard. the user is assured of compatibility with existing FORTRAN software that meets the
standard as well as a guarantee of upward compatibility to other computer systems supporting an ANS FORTRAN 77
Compiler.
1ANSI X3J3190
MAY 1983
(9INTEL CORPORATION. 1983
ORDER NUMBER:40061o-001
3-6
intJ
FORTRAN 80
• The INCLUDE control permits specified source
files to be combined into a compilation unit at compile lime.
FORTRAN 80 LANGUAGE FEATURES
Major ANS FORTRAN 77 features supported by the Intel
FORTRAN 80 Programming Language include:
• Structured Programming is supported with the IF ...
THEN ... ELSE IF ... ELSE ... END IF constructs.
• Transparent Interface for software and hardware
floating pOint support, allowing either to be chosen
at time of linking.
• CHARACTER data type permits alphanumeric data
to be handled as strings rather than characters
stored in array elements.
• Full 1/0 capabilities include:
Sequential and Direct Access files
Error handling facilities
Formatted, Free-formatted, and Unformatted
data representation
Internal (in-memory) file units provide capability to format and reformat data in internal
memory buffers
List Di rected Formatting
• Supports arrays of up to seven dimensions.
• Supports logical operators
.EOV.
- Logical equivalence
.NEOV. - Logical nonequivalence
Major extensions to FORTRAN 77 in Intel FORTRAN-80
Include:
• Direct 8080/8085 port 1/0 supported by intrinsic
subroutines.
• Binary and Hexadecimal integer constants.
• Well defined interface to FORTRAN-80 1/0 statements (READ, OPEN, etc.), allowing easy use of
user-supplied 1/0 drivers.
• User-defined INTEGER storage lengths of 1, 2 or 4
bytes.
• User-defined LOGICAL storage lengths of 1, 2 or 4
bytes.
• REAL STORAGE lengths of 4 bytes.
• Bitwise Boolean operations using logical operators
on integer values.
• Hollerith data constants.
• Implicit extension of the length of an integer or
logical expression to the length of the left-hand
side in an assignment statement.
• A format descriptor to suppress carriage return on
a terminal output device at the end of the record.
FORTRAN 80 BENEFITS
FORTRAN 80 provides a means of developing application software for Intel MCS-80/85 products in a
familiar, widely accepted, and computer Industrystandardized programming language. FORTRAN 80 will
greatly enhance the user's ability to provide costeffective solutions to software development for Intel
microprocessors as illustrated by the following:
• Completely Complementary to Existing Intel Software Design Tools - Object modules are linkable
with new or existing Assembly Language and PUM
Modules.
• Incremental Runtime Library Support - Runtime
overhead is limited only to facilities required by the
program.
• Low Learning Effort - FORTRAN 80, like PUM, Is
easy to learn and use. Existing FORTRAN software
can be ported to FORTRAN 80, and programs
developed in FORTRAN 80 can be run on any other
computer with ANS FORTRAN 77.
• Earlier Project Completion - Critical projects are
completed earlier than otherwise possible because
FORTRAN 80 will substantially increase programmer productivity, and is complementary to PUM
Modules by providing comprehensive arithmetic,
I/O formatting, and data management support in
the language.
• Lower Development Cost - Increases in programmer productivity translates into lower software
development costs because less programming
resources are required for a given function.
• Increased Reliability - The nature of high-level
languages, including FORTAN 80, IS that they lend
themselves to simple statements of the program
algorithm. This substantially reduces the risk of
costly errors in systems that have already reached
production status.
• Easier Enhancements and Maintenance - Like
PUM, program modules written in FORTRAN 80 are
easier to read and understand than assembly
language. This means it is easier to enhance and
maintain FORTRAN 80 programs as system
capabilities expand and future prod\lcts are
developed.
FORTRAN 80 COMPILER FEATURES
• Supports multiple compilation units in single
source file.
.
• Optional Assembly Language code listing.
• Comprehensive cross-reference, symbol attribute
and error listing.
• Compiler controls and directives are compatible
with other Intel language translators.
•
•
•
•
• Comprehensive, Yet Simple Project Development The Intellec Microcomputer Development System
and Personal Development System, with the
8080/8085 Macro Assembler, PL/M 80 and FORTRAN
80 are the most comprehensive software design
facilities available for the Intel MCS-80/85 Microprocessor family. This reduces development time and
cost because expentive (and remote) timesharing or
large computers are not required.
Optional Reentrancy.
User-defined default storage lengths.
Optional FORTRAN 66 Do Loop semantics.
Source files may be prepared in free format.
3-7
AFN-00241C
FORTRAN 80
SAMPLE FORTRAN·aO SOURCE PROGRAM
LISTING
•
•
•• THIS PROGRAM IS AN EXAMPLE OF ISIS-II FORTRAN-80 THAT
•• ,CONVERTS TEMPERATURE BETWEEN CELSIUS AND FARENHEIT
PROGRAM CONVRT
CHARACTER·1 CHOICE, SCALE
PRINT 100
•• ENTER CONVERSION SCALE (C OR F)
PRINT 200
READ (5,300) SCALE
•
10
IF (SCALE ,EQ. 'C')
THEN,
PRINT 400
•• ENTER THE NUMBER OF DEGREES FARENHEIT
READ (5,.) DEGF
DEGC = 5./9 .• (DEGF-32)
•• PRINT THE ANSWER
WRITE (6,500) DEGF,DEGC
•• RUN AGAIN?
PRINT 600
READ (5,300) CHOICE
IF (CHOICE .EQ. 'Y')
+
THEN
GOTO 10
ELSE IF (CHOICE .EQ. 'N')
+
THEN
CALL EXIT
ELSE
GOTO 20
END IF
ELSE IF (SCALE .EQ. 'F')
+
THEN
-- CONVERT FROM FARgNHEIT TO CELSIUS
PRINT 100
,
READ (5,-) DEGC
DEGF = 9./5.-DEGC+32.
-. PRINT THE ANSWER
WRITE (6,800) DEGC,DEGF
GOTO 20
ELSE
•• NOT A VALID ENTRY FOR THE SCALE
WRITE (6,900) SCALE
GOTO 10
END IF
FORMAT(' TEMPERATURE CONVERSION PROGRAM',II,
+' TYPE C FOR FARENHEIT TO CELSIUS OR' ,I,
+' TYPE F FOR CELSIUS TO FARENHEIT',II)
FORMAT(/,' CONVERSION? ',$)
FORMAT (A 1)
FORMAT(/,'ENTER DEGREES FARENHEIT: ',$)
FORMAT(/,F1.2, DEGREES FARENHEIT = ',F1.2,' DEGREES CELSIUS')
FORMAT(/,' AGAIN (Y OR N)? ',$)
FORMAT(/,' ENTER DEGREES CELSIUS: ',$)
FORMAT(/,F1.2,' DEGREES CELSIUS = ',F1.2,' DEGREES FARENHEIT' ,I)
FORMAT(/,1H ,A1,' NOT A VALID CHOICE - TRY AGAIN I , ,I)
END
'
+
•
•
•
20
-
-
-
100
200
300
400
500
600
100
800
900
3-8
intJ
FORTRAN 80
The FORTRAN 80 Compiler is an efficient, multi phase compiler that accepts source programs, translates them into
relocatable object code, and produces requested listings. After compilation, the object program may be linked to other
modules, located to a specific area of memory,. then executed. The diagram shown below illustrates a program devel·
opment cycle where the program consists of modules created by FORTRAN 80, PUM 80 and the 808018085 Macro
.
Assembler.
ISI5-11
LOADER
ISIS·II
TEXT
EDITOR
FORTRANBO
SOURCE
DEBUG
VIA
MONITOR
ISIS·II
PUMBO
SOURCE
TEXT
EDITOR
LOCATE
DPTIONAL
ICE-IO™
ICE-I5™
IN·CIRCUIT
EMULATOR
ISI5-11
TEXT
EDITOR
ASSEMBLY
LANGUAGE
SOURCE
RELOCATABLE
OBJECT
MODULE
PROM
PROGRAMMER
SPECIFICATIONS
DOCUMENTATION PACKAGE
OPERATING ENVIRONMENT
FORTRAN-SO Programming Manual
Required Hardware:
ISIS-II FORTRAN-SO Compiler Operator's Manual
•1.
Intel Microcomputer Development Systems
-MDS-800 and Series II
FORTRAN-SO Programming Reference Card
or
2. Personal Development System
ORDERING INFORMATION
PART NO.
DESCRIPTION
Model MDS-301
FORTRAN 80 Compiler for
Intellec Microcomputer Development Systems
SUPPORT
Intel offers several levels of support for this product
which are explained in detail in the price list. Please
consult the price list for a description of the support
options available.
Requires Software License.
*MDS is an ordering code only and is not used as a product name or trademark. MDS is a registered trademark of
Mohawk Data SCiences Corporation.
3-9
AFN·OO2<1C
MICROSOFT*~
INC. MACRO-80 UT,ILITY
SOFTWARE PACKAGE
• Includes the MACRO-SO macro
assembler, LINK-SO linking loader, and
CREF-SO cross-reference facility
• Assembly rate of over 1000 lines per
minute
• Provides "big computer"
assembler
I
features without sacrificing speed or
memory space
• Supports a complete, Intel-standard
MACRO facility, including IRP, IRPC,
REPEAT, local variables, and EXITM
• Provides a complete set of listing
controls
• Supports conditional assembly,
including testing of assembly pass,
, symbol definition, and parameters to
MACROs
• LINK-SO loads relocatable modules at
user-specified locations
• CREF-SO cross-reference facility
alphabetizes program variables and
shows where each is defined and
referenced
• Code is assembled in relocatable
modules for easy manipulation by the
LINK-SO linking loader
The Microsoft Utility Software Package is a complete system for developing assembly language programs,
routines, and subroutines. The Utility Software Package includes the MACRO-80 macro assembler, the LlNK-80
linking loader, and the CREF-80 cross-reference facility. The CP/M' version also includes the LlB-80 Library
Manager.
The Utility Software Package is supplied with all Microsoft compiiers to provide assembly language subroutine
support to main programs in the high-level programming languages. The LlNK-80 linking loader is used
by all Microsoft compilers for linking and loading compiled relocatable modules. Thus, LlNK-80 allows the
programmer to link together relocatable modules from different Microsoft languages.
FEATURES
MACRO-SO Macro Assembler
More MACR0-80 features:
MACRO-80 incorporates almost all "big computer"
assembler features without sacrificing speed or
memory space. The assembler supports a complete,
Intel-standard macro facility, including IRP, IRPC,
REPEAT, local variables, and EXITM. Macro names
take precedence over instruction mnemonics and
pseudo operations. Nesting of macros is limited only
by memory. Code is assembled in relocatable
modules that are easily manipulated with the flexible
linking loader. Conditional assembly capability is
greatly enhanced by an expanded set of conditional .
pseudo operations that include testing of assembly
pass, symbol definition, and parameters to macros.
Conditionals may be nested up to 255 levels.
© INTEL CORPORATION, 1983
3-10
-Comment blocks
-Variable input radix from base 2 to base 16
-Octal or hex listings
-INCLUDE statement assembles an alternate
source file into the current program
-PRINTX statement for printing assembly or
diagnostic messages
-PHASE/DEPHASE statements allow code to
reside'in one area of memory but execute in
another
-Complete set of listing controls
MAY 1983
ORDER NUMBER:210243-003
inter
MICROSOFT, INC.
MACRO-aO UTILITY
LlNK-ao linking Loader
CREF-ao Cross-Reference Faclllt~
With LINK-SO, any number of programs may be
loaded with one command, relocatable modules may
be loaded in user-specified locations, and external
references between modules are resolved automatically by the loader. The loader also performs library
searches for system subroutines and generates a
memory load map showing the locations of the main
program and subroutines.
The Cross-Reference Facility that is included with the
Utility Software Package supplies a convenient alphabetic list of all program variable names, along
with line numbers where they are referenced and
defined.
SPECIFICATIONS
Operating Environment
Required Software
MACRO-SO resides in approximately 19K bytes of
memory. LlNK-80 resides in approximately 14K bytes
of memory. CREF-SO requires about 6K bytes. The
MACRO-SO Utility Software Package is compatible
with the CP/M" operating system.
CP/M Operating System or MP/M-U* Operating
System.
Required Hardware
One copy of each manual is supplied with the
software package.
Documentation Package
Intellec® Microcomputer Development System
-iPDS (Personal Development System)
-minimum of 1 diskette drive
Description
Microsoft Utility Software Manual
ORDERING INFORMATION
Order Code
SD106CPMSOF
Description
Microsoft MACRO-SO Utility Software Package. CP/M v~rsion (iPDS Format)
SUPPORT:
Intel offers several levels of support for this product, depending on the system configuration in which it is used.
Please consult the price list for a detailed description of the support options available.
An Intel Software License reqUired.
"Microsoft is a trademark of Microsoft. Inc.
"CP/M is a registered trademark of Digital Research. Inc.
"MP/M-II is a trademark of Digital Research. Inc.
3-11
AFN·0208SC
MICROSOFT*, INC. BASIC-SO INTERPRETER
SOFTWARE PACKAGE
'
Ii Meets the requirements for the ANSI
• Compatible with other Microsoft BASIC
compilers and interpreters
subset standard for BASIC, and
supports many enhancem~nts
• Sophisticated string handling and
structured programming features for
applications development
• Extensive text edIting features built-in
• Automatic line number generation and
renumbering
• Direct transfer of BASIC programs to
the 8085, 8086 and 8088
• Supports assembly language
subroutine calls
• Random and sequential file
manipulation where random file record
length is user-definable
• Trace facilities for easier debugging
• Read or write memory location
capabilities
BASIC Release 5.0 from Microsoft is an extensive implementation of BASIC. Microsoft BASIC gives users what
they want from a BASIC-ease of use plus the features that are comparable to a minicomputer or large
mainframe.
BASIC-80 meets the requirements for the ANSI subset standard for BASIC, as set forth in document BSRX3.601978. It supports many unique features rarely found in other BASICs.
FEATURES
-Four variable types: Integer (-32768, +32767),
String (up to 255 characters), Single-Precision
Floating Point (7 digits), Double-Precision
Floating Point (16 digits).
-Formatted output using the PRINT USING facility,
including asterisk fill, floating dollar sign,
scientific notation, trailing sign, and comma
insertion.
-Trace facilities (TRON/TROFF) for easier
debugging.
-Direct acCess to I/O ports with the INP and OUT
functions.
-Error trapping l:lsing the ON ERROR GOTO
statement.
-Extensive program editing facilities via EDIT
command and EDIT mode subcommands.
-PEEK and POKE statements to read or write any
memory location.
-Assembly language subroutine calls (up to 10 per
program) are supported.
-Automatic line number generation and
renumbering, including reference line numbers.
-IF/THEN/ELSE and nested IF/THEN/ELSE
constructs.
-Matrices with up to' 255 dimensions.
-Supports variable-length random and sequential
disk files with a complete set of file manipulation
statements: OPEN, CLOSE, GET, pur, KILL,
NAME, MERGE.
-Boolean operators OR, AND, NOT, XOR, EQV,
IMP.
MAY 1983
©INTEL CORPORATION. 1983.
AFN-02086C
3-12
inter
MICROSOFT, INC.
BASIC-80 INTERPRETER
Arithmetic Functions
BASIC-80 Commands, Statements,
Functions
AUTO'
LIST
NULL
TROFF
CLEAR
LOAD
RENUM
WIDTH
CONT
MERGE
RUN
DELETE
RANDOMIZE
COMMON
DEF FN
ERROR
POKE
, RESUME
SWAP
DEFDBL
DEFSTR
DEFSNG
DEFINT
LOG
FIX
COS
RND
TAN
String Functions
Program Statements
CALL
GOSUB
END
GOTO
STOP
WHILE/
WEND
CHAIN
DEF USR
LET
REM
SIN
CDBL
CSNG
CINT
SOR
ABS
INT
SGN
ATN
EXP
NAME
SAVE
EDIT
NEW
TRON
ASC
LEN
STRING$
CHR$
LEFT$
RETURN
WAIT
ON GOSUB
DIM
FOR/NEXT/
STEP
IF/THEN/
ELSE
ON ERROR
GOTO
OPTION BASE
INSTR
RIGHT$
MID$
SPACES
STR$
HEX$
OCT$
VAL
Operators
II
<=
<
>
<>
XOR
NOT
EOV
MOD
IMP
OR
AND
+
\
>=
Input/Output Statements and Functions
CLOSE
KILL
OUT
RESTORE
READ
TAB
DATA
LINE
INPUT
PRINT
WRITE
LPRINT
GET
POS
FIELD
LSET/RSET
PRINT
USING
LOC
MKI$
MKS$
MKD$
LLiST
LPOS
NAME
PUT
EOF
SPC
INKEY$
INPUT
OPEN
CVD
CVI
CVS
Special Functions
ERL
USR
VARPTR
PEEK
ERR
FRE
SPECIFICATIONS
Operating Environment
Required Software
The standard disk version of Microsoft BASIC-80
occupies 24K bytes of memory. Microsoft BASIC-80
Interpreter is compatible with Intel's ISIS operating
system or CP/M" operating system.
ISIS Operating System or CP/M Operating System.
Documentation Package
Required Hardware.
One copy of each manual is supplied with the
software package.
Intellec Microcomputer Development System
-iPDS (Personal Development System)
-minimum of 1 diskette drive
Description
BASIC-SO Reference Manual
BASIC Reference Book
3-13
AFN·02086C
MICROSOFT, INC.
BASIC-80 INTERPRETER
ORDERING INFORMATION
Order Code
Description
SD102CPM80F
Microsoft BASIC-BO Interpreter Software Package, CP/M version (Double-Sided,
Double Density 5W Floppy) iPDS format
SD1021SS80F
Microsoft BASIC-80 Interpreter Software Package, ISIS version (Double-Sided,
Double Density 5W Floppy) iPDS format
SUPPORT
Int~1 offers several levels of support for this product,
depending on the system configuration in which it is
used. Please consult the price list for a detailed
description of the support options available.
An Inlel Software License required.
'MIcrosoft IS a trademark of Microsoft, Inc.
'CP/M is a regIstered trademark of Digital Research, Inc.
'MP/M-II is a trademark of DIgital Research, Inc.
3-14
AFN-Q2086C
MICROSOFT*, INC. PASCAL-80
SOFTWARE PACKAGE
• Native code compiler with language
extensions designed for system
software implementation
• Assembly language routines callable
from PASCAL programs
• Global optimizer produces compact,
fast compiled code
• Meets current ISO draft standard
• Fully portable, with machineindependent front end
• Three levels of implementation- •
standard, extended and system
-to conform to different levels of
standardization and levels of machine
interface
• Can replace assembly language for
most system software programming
tasks
A critical need is emerging for more and more software "tools"-compilers, jnterpreters, operating systems,
database managers, and dedicated application programs. The demand for system software with ashor!
development time and a long lifespan is rapidly making assembly language impractical: As a result, the trend in
system software is toward a new "tool maker"-a system-oriented language.
Microsoft Pascal-SO is a high-level language compiler specifically designed for microprocessor system
software implementation. The language is ISO-standard Pascal, with the addition of many system-oriented
extensions. The compiler includes a global optimizer and modular code generator identical to other Microsoft
Pascal products.
With Pascal-SO, system software is highly readable, modular, and transportable. Plus, Pascal's clean block
structure and procedure orientation make system programming more efficient than with assembly language.
FEATURES
THE PASCAL-80 COMPILER
DESCRIPTION
Pascal-SO was designed to generate state-of-the-art
compact system software. Many extensions have
been made to the language that not only adapt it to
system programming, but make it easier to use in any
application ..
-Expanded string support with variable-size
LSTRING type
-UNITS and USES interfaces for clean separate
compilation
-Machine-oriented WORD type and operators
-Dynamic and conform ant arrays using SUPER
array types
-Attributes for variables and procedures
-Machine address types and operators
All the enhancements to Pascal:SO are natural extensions of the existing language. Care has been taken
to maintain the structured nature of Pascal while
assimilating new features. Many low-level escapes
have also been provided, such as direct access to
memory locations, calls to assembly language subroutines, and a RETYPE function.
©INTELCORtORATION,1983
3-15
The compiler operates in three phases. The front-end
phase translates the source into an intermediate
form and does all error checking and listing generation. The global optimizer phase analyzes the intermediate code and does constant folding, common
subexpression elimination, strength reduction, and
other optimizations. The code generator phase
translates the intermediate code into relocatable object code and does register allocation and peephole
optimizations. All phases are written in Pascal.
The runtime system handles program initialization
and termination, runtime error reporting, floating
point arithmetic, string handling, set operations,
dynamic variable allocation, input/output interfacing
to the operating system, and low-level utility
routines. Pascal-SO is designed to interface easily to
operating system and floating point packages.
Pasca1-S0 uses Microsoft's Linking Loader which allows independent code and data segment Iqcation,
MAY 1983
ORDER NO: 2102_
MICROSOFT, INC.
PASCAL-80
library searching, global memory maps, and combination of Pascal-SO output with the output of
Microsoft's other compilers and assembler.
-Attributes can be given to variables and
procedures:
Variables: STATIC READONLY PORT
Procedures: INTERRUPT PURE
Either: PUBLIC EXTERN ORIGIN.
Language Description
OPERATORS AND INTRINSICS
The Pascal-80 language is organized into three levels
(Standard, Extended, and System) based on the
degree of portability provided. Standard level includes all features in the pending ISO standard
DP7185. Standard level also contains the metalanguage, which controls error checking, listing format, and other options. Programs using only
Standard level are portable across all Pascals that
conform to the standard.
-Bitwise AND, OR, and NOT on WORDs and
INTEGERs
-String constants can be concatenated with "*"
-String-oriented intrinsics:
STRING/LSTRING: POSITN SCAN EO SCANNE
LSTRING only: CONCAT INSERT DELETE
-Standard library includes 19 more routines
-FORTRAN library includes 17 more REAL
functions
-Extended instrinsic procedures and functions:
LOWER, UPPER get bounds of array, set,
subrange
.
ABORT invokes runtime error handler
SIZEOF returns size of variable in bytes
MicrosoFT's extensions to Pascal appear in the Extended level and the System level. The Extended level
contains high-level features that are natural to Pascal and are machine independent. Programs using
only Standard and Extended levels are portable
across Microsoft Pascal target machines. The System level contains 10w~level extensions that provide
an escape from Pascal restrictions or are machine
dependent.
CONTROL FLOW AND STRUCTURE
-CONST, TYPE, VAR, VALUE sections in any order
-MODULE source' file for separate compilation
Standard Level Features
INPUT/OUTPUT AND FILES
-READ enumerated, pointer, BOOLEAN, STRING,
LSTRING
-WRITE enumerated, pOinter, LSTRING
-READ and WRITE for hexadecimal, octal and
binary
-Negative field width justifies left instead of right
-Temporary files, file name created automatically
-ASSIGN and CLOSE procedures
--FILEMODES type, access with file.MODE
-Error trapping, access with file.TRAP and
file.ERRS
LISTING INFORMATION
-Object listing shows generated code, with line
numbers.
METALANGUAGE DIRECTIVES
-7 directives control specific runtime error checks.
Extended Level Features
DATA TYPES AND MODES
-Numeric constants in hexadecimal, octal, or
binary
-BYTE/WORD types for S/16-bit unsigned
operations
-SUPER array types permit passing any size array
to a procedure or allocating any size array on
the heap
-LSTRING type provides variable-length array of
characters; current length access with Istring.
LEN
-STRING and LSTRING predeclared super array
types
-CONST parameter type passes long constant by
reference
-Functions can return arrays, records, or sets
3-16
SYSTEM LEVEL FEATURES
-Record types can give explicit byte offset to
fields
-All file types identical to special FCBFOO record
type
-System intrinsic byte movers: MOVEL MOVER
FILLC
-Address types permit low-level machine access
ADR OF type declares address (all ADRs
compatible)
ADR prefix operator gets variable or constant
address
adr. R gives WORD address value, adr gives
data at address
AFN-02093C
MICROSOFT, INC
PASCAL·80
Utility Software Package
LINK-SO linking loader, and the CREF-SO CrossReference Facility. Refer to the description of the
Microsoft Utility Software Package for full details.
The PASCAL-SO package includes the Microsoft
Utility Software Package. The Utility Software Package includes the MACRO-SO macro assembler, the
SPECIFICATIONS
Operating Environment
Required Software
The Pascal compiler running under CP/M resides in
approximately 40K bytes of memory and requires an
additionalSK byte minimum (or4BK bytes minimum)
plus symbol table space when compiling. '
CP/M* Operating System or MP/M-II* Operating
System.
Documentation Package
Required Hardware
One copy of each manual is provided with the
software package.
Intellec Microcomputer Development System
-iPDS (Personal Development System)
-minimum of 1 diskette drive
Description
PASCAL-SO Reference Manual
Microsoft Utility Software Manual
ORDERING INFORMATION
Description
Order Code
SD105CPMSOF
Microsoft Pascal-SO Software Package, CP/M version (iPDS Format)
SUPPORT
Intel offers several levels of support for this product,
depending on the system configuration in which it is
used. Please consult the price list for a detailed
description of the support options available.
An Intel Software License required
'Microsoft is a trademark of Microsoft, Inc.
'CP/M IS a registered trademark of Digital Research, Inc.
'MP/M-II IS a trademark of Digital Research. Inc
3-17
AFN·02093C
iAPX 86,88
SOFTWARE DEVELOPMENT PACKAGES
FOR SERIES II/PDS
• PLIM 86/88 High L.:evel Programming
Language
• ASM 86/88 Macro Assembler for
iAPX 86,88 Assembly Language
Programming
• LINK 86/88 and LOC 86/88 Linkage and
Relocation Utilities
• CONY 86/88 Converter for Conversion
of 8080/8085 Assembly Language
Source Code to iAPX 86, 88 Assembly
Language Source Code
• OH 86/88 Object-to-Hexadecimal
Converter
• LIB 86/88 Library Manager
. The iAPX 86,88 Software Development Packages for Series II provide a set of software development tools for
the iAPX 86/88 CPUs and the iSBC 86/12A single board computer. The packages operate under the ISIS-II
operating system on Intel Microcomputer Development Systems-Model 800, Series II or the Personal Development System (PDS)-thus minimizing requirements for additional hardware or training for Intel Microcomputer Develbpment System users.
These packages permit 8080/8085 users to efficiently upgrade existing programs into iAPX 86/88 code from
either 8080/8085 assembly language source code or PLIM 80 source code.
For the new Intel Microcomputer Development System user, the packages operating on a PDS or an Intellec
Series II, such as a Model 235, provide total iAPX 86,88 software development capability.
© INTEL CORPORATION. 1983
MAY 1983
3-18
AFN·01239E
inter
iAPX 86,88 SOFTWARE DEVELOPMENT PACKAGES FOR SERIES II/PDS
PUM 86/88 COMPILER
FOR SERIES II/PDS
• Language is Upward Compatible from
PUM 80, Assuring MCS®-80/85 Design
Portability
• Produces Relocatable Object Code
Which is Linkable to All Other 8086
Object Modules
• Supports 16-blt Signed Integer and
32-blt Floating Point Arithmetic in
Accordance with IEEE Proposed
Standard
• Supports Full Extended Addressing
Features of the iAPX 86/10 and 88/10
Microprocessors (Up to 1 Mbyte)
• Easy-to-Learn, Block-Structured
Language Encourages Program
Modularity
• Code Optimization Assures Efficient
Code Generation and Minimum
Application Memory Utilization
Like its counterpart for MCS-80/85 program development, PL/M 86/88 is an advanced, structured high-level
programming language. The PL/M 86/88 compiler was created specifically for performing software development for the Intel iAPX 86,88 Microprocessors.
PL/M 86/88 has significant new capabilities over PL/M 80 that take advantage of the new facilities provided by
the iAPX 86,88 microsystem, yet the PL/M 86/88 language remains compatible witli PL/M 80.
With the exception of hardware-dependent modules, such as interrupt handlers, PL/M 80 applications may be
recompiled with PL/M 86/88 with little r,eeed for modification. PL/M 86/88, like PL/M 80, is easy to learn,
facilitates rapid program development, and reduces program mai~tenance costs.
PLIM is a powerful, structured, high-level system implementation language in which program statements can
naturally express the program algorithm. This frees the programmer to concentrate on the logic of the
program without concern for burdensome details of machine or assembly language programming (such as
register allocation, meanings of assembler mnemonics, etc.).
The PLIM 86/88 compiler efficiently converts free-form PL/M language statements into equivalent 86/88
machine instructions. Substantially fewer PLIM statements are necessary for a given application than if it were
programmed at the assembly language or machine code level.
The use of PLIM high-level language for system programming, instead of assembly language, results in a high
degree of engineering productivity during project development. This translates Into significant reductions in
initial software development and follow-on maintenance costs for the user
FEATURES
structure allows the use of REENTRANT which is
especially useful in system design.
Major features of the Intel PLIM 86/88 compiler and
programming language include:
Language Compatibility
Block Structure
PL/M 86/88 object modules are compatible with object modules generated by all other 86/88 translators.
This means that PLIM programs may be linked to
programs written in any other 86/88 language.
PLIM source code is developed in a series of modules, procedures, and blocks. Encouraging program
modularity in this manner makes programs more
readable, and easier to maintain and debug. The
language becomes more flexible by clearly defining
the scope of user variables (local to a private procedure, global to a public module, for example).
Object modules are compatible with ICE-88 and
ICE-86 units; DEBUG compiler control provides the
In-Circuit Emulators with symbolic debugging
capabilities.
PLIM 86/88 Language is upward-compatible with
PL/M 80, so that application programs may be easily
ported to run on the iAPX 86 or 88.
The use of procedures to break down a large problem is paramount to productive software development. The PL/M 86/88 implementation of a block
3-19
AFN·01239E
inter
iAPX 86,88 SOFTWARE DEVELOPMENT PACKAGES FOR SERIES II/PDS
Supports Five Data Types
Interrupt Handling
PUM makes use of five data types for various applications. These data types range from 'one to four
bytes, and facilitate various arithmetic, logic, and
addressing functions:
PUM has the facility for generating interrupts to
the iAPX 86 or 88 via software. A procedure may be
defined with the INTERRUPT attribute, and the
compiler will automatically initialize an interrupt
vector at the appropriate memory location. The
compiler will also generate code to same and restore the processor status', for execution of the
user-defined interrupt handler routine. The procedure SET$INTERRUPT, the function retuning
an INTERRUPT$PTR, and the PL/M statement
CAUSE$INTERRUPT all add flexibility to user programs involving interrupt handling.
-Byte:
-Word:
-Integer:
-Real:
-Pointer:
8-bit unsigned number
16-bit unsigned number
i6-bit signed number
32-bit floating point number
16-bit or 32-bit memory address
indicator
Another powerful facility allows the use of BASED
variables that map more than one variable to the
same memory location. This is especially useful for
passing parameters, relative and absolute addressing, and memory allocation.
Two Data Structuring Facilities
In addition to the five data types and based variables,
PL/M supports two data structuring facilities. These
add flexibility to the referencing of data stored in
large. groups.
-Array:
-Structure:
Indexed list of same type data
elements
Named collection of same or different type data elements
-Combinations
of Each:
Arrays of structures or
structures of arrays
8087 Numerics Support
PUM programs that use 32-bit REAL data may be
executed using the Numeric Data Processor for improved performance. All floating-point operations
supported by PUM may be executed on the 8087
NDP, or the 8087 Emulator (a software module)
provided with the package. Determination of use of
the chip or emulator takes place at link-time, allowing compilations to be run-time independent.
Segmentation Control
The PUM 86/88 compiler takes full advantage of
program addressing with the SMALL, COMPACT,
MEDIUM, and LARGE segmentation controls. Programs with less than 64KB total code space can
exploit the most efficient memory addressing
schemes, which lowers total memory requirements.
Larger programs can exploit the flexibility of extended one-megabyte addressing.
Code Optimization
The PUM 86/88 compiler offers four levels of optimization for Significantly reducing overall program
size.
-Combination or "folding" of constant expressions; and short-circuit evaluation of Boolean expressions.
-"Strength reductions" (such as a shift left rather
than multiply by 2); and elimination of common
sub-expressions within the same block.
-Machine code optimizations; elimination of
superfluous branches; re-use of duplicate code;
removal of unreadable code.
-Byte comparisons (rather than 20-bit address calculations) for pointer variables; optimization of
based-variable operations.
Compiler Controls
Built-In String Handling Facilities
The PUM 86/88 compiler offers more than 25 controls that facilitate such features as:
The PUM 86/88 language contains built-in functions
for string manipulaiton. These byte and word functions perform the following operations on character
strings: MOVE, COMPARE, TRANSLATE, SEARCH,
SKIP, and SET.
-Conditional compilation
-Intra- and Inter-module cross reference
-Corresponding assembly language code in the
listing file
-Setting overflow conditions for run-time handling
3-20
AFN-01239E
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iAPX 86,88 SOFTWARE DEVELOPMENT PACKAGES FOR SERIES II/PDS
BENEFITS
because less programming resources are required
for a given programmed function.
PL/M 86/88 is designed to be an efficient, costeffective solution to the special requirements of
iAPX 86 or 88 Microsystem Software Development,
as illustrated by the following benefits of PUM use:
Increased Reliability
PUM 86/88 is designed to aid in the development of
reliable software (PUM 86/88 programs are simple
statements ofthe program algorithm). This substantially reduces the risk of costly correction of errors in
systems that have already reached full production
status, as the more simply stated the program is, the
more likely it is to perform its intended function.
Low Learning Effort
PUM 86/88 is easy to learn and to use, even for the
novice programmer.
Earlier Project Completion
Critical projects are completed much earlier than
otherwise possible because PL/M 86/88, a
structured high-level language, increases programmer productivity.
Easier Enhancements and Maintenance
Programs written in PL/M tend to be selfdocumenting, thus easier to read and understand.
This means it is easier to enhance and maintain
PUM programs as the system capabilities expand
and future products are developed.
Lower Development Cost
Increases in programmer productivity translate immediately into lower software development costs
iAPX 86,88 MACRO ASSEMBLER
FOR SERIES II/PDS
• Powerful and Flexible Text Macro
Facility with Three Macro Listing
Options to Aid Debugging
• High-Level Data Structuring Facilities
Such as "STRUCTUREs" and
"RECORDs"
• Highly Mnemonic and Compact
Language, Most Mnemonics Represent
Several Distinct Machine Instructions
• Over 120 Detailed and Fully Documented Error Messages
• "Strongly Typed" Assembler Hetps
Detect Errors at Assembly Time
• Produces Relocatable and Linkable
Object Code
ASM 86/88 is the "high-level" macro assembler for the iAPX 86,88 assembly language. ASM 86/88 translates
symbolic 86/10, 88/10 assembly language mnemonics into 86/10, 88/10 relocatable object code.
ASM 86/88 should be used where maximum code effici~ncy and hardware control is needed. The iAPX 86,88
assembly language includes approximately 100 instruction mnemonics. From these few mnemonics the
assembler can generate over 3,800 distinct machine instructions. Therefore, the software development task is
simplified, as the programmer need know only 100 mnemonics to generate all possible 86/10, 88/10 machine
instructions. ASM 86/88 will generate the shortest machine instruction possible given no forward referencing
or given explicit information as to the characteristics of forward referenced symbols.
ASM 86/88 offers many features normally found only in high-level languages. The iAPX 86,88 assembly
language is strongly typed. The assembler performs extensive checks on the usage of variables and labels.
The assembler uses the attributes which are derived explicitly when a variable or I~bel is first defined, then
makes sure that each use of the symbol in later instructions conforms to the usage defined for that symbol.
This means that many programming errors will be detected when the program is assembled, long before it is
being debugged on hardware.
3-21
AFN-01239E
,inter
iAPX
86~88 SOFTWARE ,DEVELOPMENT PACKAGES FOR SERIES II/PDS
FEATURES
Over 120 Detailed Error Messages
Major featu res of the Intel iAPX 86,88 assembler and
assembly language include:
-
Powerful and Flexible Text Macro Facility
-
-
Macro calls may appear anywhere
Allows user to define the syntax of each macro
Built-in functions
conditional assembly (IF-THEN-ELSE, WHILE)
repetition (REPEAT)
string processing functions (MATCH)
support of assembly ti me I/O to console (IN, OUT),
Three Macro Listing Options include a GEN
mode which provides a complete trace of all
macro calls and expansions
High-Level Data Structuring Capability
-
-
STRUCTURES: Defined to be a template and
then used to allocate storage, The familiar dot
notation may be used to form instruction
addresses with structure fields.
ARRAYS: Indexed list of same type data elements.
RECORDS: Allows bit-templates to be defined
and used as instruction operands and/or to alloc~te storage.
Appear both in regular listfile and error print file.
User documentation fully explains the occurrence of each error and suggests a method to
correct it.
Support for ICE-86 Emulation and
Symbolic Debugging
-
Debug options for inclusion of symbol table in
object modules for In-Circuit Emulation with
symbolic debugging,
Generates Relocatable and Linkable
Object Code-Fully Compatible with
LINK 86/88, LOC 86/88 and LIB 86/88
-
Permits ASM 86/88 programs to be developed
and debugged in small modules. These modules
can be easily linked with other ASM 86/88 or
PL/M 86/88 object modules and/or library
routines to form a complete application system.
Fully Supports iAPX 86,88
Addressing Modes
-
-
BENEFITS
Provides for complex address expressions involving base and indexing registers and
(structure) field offsets.
Powerf,ul EQU facility allows complicated expreSSions to be named and the name can be used
as a synonym for the expression throughout the
module.
The iAPX 86,88 macro assembler allows the extensive capabilities of the 86/88 CPU's to be fully exploited. In any application, time and space critical
routines can be effectively written in ASM 86/88. The
86,88 assemqler outputs relocatable and linkable object modules, These object modules may be easily
combined with object modules written in PLIM
86/88-lntel's structured, high-level programming
language. ASM 86/88 compliments PLIM 86/88 as the
programmer may choose to write each module in the
language most appropriate to the task and then combine the modules into the complete applications program using the iAPX 86,88 relocation and linkage
utilities.
Powerful STRING MANIPULATION
INSTRUCTIONS
-
Permit direct transfers to or from memory or the
accumulator.
Can be prefixed with a repeat operator for repetitive execution with a count-down and a condition test.
3-22
N'N-01239E
'
inter
IAPX 86,88 SOFTWARE DEVELOPMENT PACKAGES FOR SERIES II/PDS
CONV 86/88
MC~·80/85 to iAPX 86,88 ASSEMBLY LANGUAGE
CONVERTER UTILITY PROGRAM
• Translates 8080/8085 Assembly
Language Source Code to iAPX 86,88
Assembly Language Source Code
• Automatically Generates Proper ASM
86/88 Directives to Set Up a "Virtual
8080" Environment that is Compatible
with PL/M 86/88
• Provides a Fast and Accurate Means to
Convert 8080/8085 Programs to the
iAPX 86/88 Facilitating Program
Portability
In support of Intel's commitment to software portability, CONV 86/88 is offered as a tool to move 8080/8085
programs to the iAPX 86/88. A comprehensive manual, "MCS-86 Assembly Language Converter Operating
Instructions for ISIS-II Users," covers the entire conversion process. Detailed methodology of the conversion
process is fully described therein.
-
CONV 86/88 will accept as input an error-free
8080/8085 assembly-language source file and
optional controls, and produce as output, optional PRINT and OUTPUT files.
-
The PRINT file is a formatted copy of the
8080/8085 source and the 86/88 source file with
embedded caution messages.
•
Because CONV 86/88 is a transliteration proc'ess,
there is the possibility of as much as a 15%-20%
code expansion over the 8080/8085 code, For compactness and efficiency it is recommended that critical portions of programs be re-coded in iAPX 86,88
assembly language.
- The OUTPUT file is an 86/88 source file.
Also, as a consequence of the transliteration, some
manual editing may be required for converting instruction sequences dependent on:
- CONV 86/88 issues a caution message when it
detects a potential problem in the converted
86/88 code.
-instruction length, timing, or encoding
-interrupt processing"
-PL/M parameter passing conventions"
-
A transliteration of the 8080/8085 programs occurs, with each 8080/8085 construct mapped to its
exact 86/88 counterpart:
"Mechanical editing procedures for these are suggested in the converter manual.
Registers
Condition flags
Instruction
Operands
Assembler directives
Assembler control lines
Macros
The accompanying figure illustrates the flow of the
conversion process. Initially, the abstract program
may be represented in 8080/8085 or iAPX 86,88 assembly language to execute on that respective target
machine, The conversion process is porting a source
destined for the 8080/8085 to the 86/88 via CONV
86/88.
3-23
AFN·01239E
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IAPX 86,88 SOFTWARE DEVELOPMENT PACKAGES FOR SERIES jl/PDS
ABSTRACT PROGRAM
SOURCE CODE
IN 8080/1085
ASSEMBLY LANG
-~
-----------------------
ASSEMBLE
FOR
88110,88110
CONV88/88
FOR
8080/1085
EXECUTE
ON
8080/8085
SOURCE CODE
IN 88110, 88110
ASSEMBLY LANG
-
ALGORITHM
EQUIVALENT
FUNCTION
-------------------_ _.....
EXECUTE
ON
88110,88110
Figure 1. Porting 8080/8085 Source Code to the IAPX 86/10 and 88/10
LINK 86/88
• Automatic Combination of Separately
Complied or Assembled IAPX 86, 88
Programs Into a Relocatable Module
• Automatic Generation of a Summary
Map Giving Results of the LINK 86/88
, Process
• Automatic Selection of Required
Modules from Specified Libraries to
Satisfy Symbolic References
• Abbreviated Control Syntax
• Reloca.able Modules may be Merged
Into a Single Module Suitable for
Inclusion in a Library
• Supports "Incremental" Linking
• Supports Type Checking of Public and
External Symbols
• Extensive Debug Symbol
Manipulation, Allowing Line Numbers,
Local Symbols, and Public Symbols to
be Purged and Listed Selectively
LINK 86/88 combines object modules specified in the LINK 86/88 input list into a single output module, LINK
86/88 combines segments from the input modules according to the order in which the modules are listed.
LINK 86/88 will accept libraries and object modules built from PL/M 86188, ASM 86/88, or any other translator
generating Intel's iAPX 86/88 Relocatable Object Modules.
'
Support for incremental linking is provided since an output module produced by LINK 86/88 can be an input to
another link. At each stage in the incremental linking process, unneeded public symbols may be purged.
LINK 86/88 supports type checking of PUBLIC and EXTERNAL symbols reporting an error if their types are not
consistent.
'
LINK 86/88 will link any valid set of input modules without any controls. However, controls are available to control the output of diagnostic information in the LINK 86/88 process and to control the content of the output
module.
o
LINK 86188 allows the user to create'a large program as the combination of several smaller, separately compiled modules. After development and debugging of these component modules the user can link them
together, locate them using LOC 86/88 and enter final testing with much of the work accomplished.
3-24
AFN-Q1239E
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iAPX 86,88 SOFTWARE DEVELOPMENT PACKAGES FOR SERIES II/PDS
LIB 86/88
• LIB 86/88 is a Library Manager
Program which Allows You to:
• Libraries Can be Used as Input to
LINK 86/88 Which Will Automatically
Link Modules from the Library that
Satisfy External References in the
Modules Being Linked
Create Specially Formatted Files to
Contain Libraries of Object Modules
Maintain These Libraries by Adding or
Deleting Modules
Print a Listing of the Modules and
Public Symbols in a Library File
• Abbreviated Control Syntax
Libraries aid in the job of building programs. The library' manager program LIB 86/88 creates and maintains
files containing object modules. The operation of LIB 86/88 is controlled by commands to indicate which operation LIB 86/88 is to perform. The commands are:
CREATE:
ADD:
DELETE:
LIST:
EXIT:
creates an empty library file
adds object modules to a library file
deletes modules from a library file
lists the module directory of library files
terminates the LIB 86 program and returns control to ISIS-II
When using object libraries, the linker will call only those object modules that are required to satisfy external
references, thus saving memory space.
Loe 86/88
• Automatic Generation of a Summary
Map Giving Starting Address, Segment
Addresses and Lengths, and Debug
Symbols and their Addresses
• Automatic and Independent
Relocation of Segments. Segments
May Be Relocated to Best Match
Users Memory Configuration
• Extensive Capability to Manipulate the
Order and Placement of Segments in
iAPX 86/88 Memory
• Extensive Debug Symbol
Manipulation, Allowing Line Numbers,
Local Symbols, and Public Symbols to
be Purged and Listed Selectively
• Abbreviated Control Syntax
Relocatability allows the programmer to code programs or sections of programs without having to know the
final arrangement of the object code in memory.
LOC 86/88 converts relative addresses in an input module to absolute addresses. LOC 86/88 orders the segments in the input module and assigns absolute addresses to the segments. The sequence in which the segments in the input module are assigned absolute addresses is determined by their order in the input module
and the controls supplied with the command.
LOC 86/88 will relocate any valid input module without any controls. However, controls are available to control
the output of diagnostic information in the LOC 86/88 process, to control the content of the output module, or
both.
The program you are developing will almost certainly use some mix of random access memory (RAM), readonly memory (ROM), andlor programmable read-only memory (PROM). Therefore, the location of your program affects both cost and performance in your application. The relocation feature allows you to develop your
program on the Intellec development system and then simply relocate the object code to suit your application.
3-25
AFN-01239E
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iAPX 86,88 SOFTWARE DEVELOPMENT PAC.KAGES FOR SERIES' II/PDS
OH 86/88
• Converts an iAPX 86/88 Absolute
Object Module to Symbolic
Hexadecimal Format
• Converts an Absolute Module to a
More Readable Format that can be
Displayed on a CRT or Printed for
Debugging
• Facilitates Preparing a File for Later
Loading by a Symbolic Hexadecimal
Loader, such as the iSBC™ M9nitor
SDK-86 Loader, or Universal PROM
Mapper
The OH 86/88 utility converts an 86/88 absolute object module to the hexadecimal format. This conversion may
be necessary to format a module for later loading by a hexadecimal loader such as the iSBC 86/12 monitor or
Universal PROM Mapper. The conversion may also be made to put the module in a more readable format than
can be displayed or printed.
The module to be converted must be in absolute format; the output from LaC 86/88 is in absolute format.
Figure 2. iAPX 86,88 So.ftware Development Cycle
3-26
AFN-01239E
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iAPX 86,88 SOFTWARE DEVELOPMENT PACKAGES FOR SERIES II/PDS
ORDERING INFORMATION
SPECIFICATIONS
Operating Environment
iAPX 86,88 Software Development
Packages for Series II:
Intel Microcomputer Development Systems
Intel Personal Development System
Part No.
Documentation
Description
PL/M-86 Programming Manual
MDS-30S*
Assembler and Utilities
Package
MDS-309*
PUM compiler and Utilities
Package
MCS-86 Assembly Language Converter Operating
Instructions for 1515-1/ Users
MDS-311*
PUM compiler, Assembler,
and Utilities Package
Universal PROM Programmer User's Manual
All Packages Require Software Licenses
1515-1/ PL/M-86 Compiler Operator's Manual
MCS-86 User's Manual
MCS-86 Software Development Utilities Operating
Instructions for 1515-1/ Users
MCS-86 Macro Assembly Language Reference
Manual
MCS-86 Macro Assembler Operating Instructions
for 1515-1/ Users
SUPPORT:
Hotline Telephone Support, Software Performance Reports (SPR), Software Updates, Technical Reports,
Monthly Newsletters are available.
*MDS is an ordering code only and is not used as a product name or trademark. MDS® is a registered trademark of Mohawk Data Sciences Corporation.
3-27
AFN-01239E
PL/M 86/88/186/188 Software Package
Systems Programming Language for
• the
iAPX 86/88/1861188 Processors
Improved Compiler Performance Now
• Supports
More User Symbols and
Faster Compilation Speeds
Language Is Upward COn:'patible from
• PUM
80, Assuring MCS®·80185 Design
.
Produc!Js Relocatable Object Code
• Which
Is Linkable to All Other 8086
Portability
Object Modules
Structured System Imp/a• Advanced
mentation Language for Algorithm
Optimization Assures Efficient
• Code
Code Generation and Minimum
Development
Application Memory Utilization
Supports 16·Bit Signed Integer and
• 32·Bit
Floating Point Arithmetic in
Built·ln Syntax Checker Doubles Per·
• formance
for Compiling Programs
Accordance with IEEE Proposed
Standard
Containing Errors
Resident on iAPX 86 Intel Micro• computer
Development Systems
Easy-to-Learn Block-Structured
• Language
Encourages Program
Modularity
PUM 86 is an advanced, structured, high-level systems programming language. The RUM 86 compiler was
created specifically for performing software development for the Intel 8086, 8088, 80186 and 80188 Microprocessors. PL/M was designed so that program statements naturally express the program algorithm. This frees the
programmer to concentrate on the logic of the program without concern for burdensome details of machine or
assembly language programming (such as register allocation, meanings of assembler mnemonics, etc.).
The PUM 86 compiler efficiently converts free-form PUM language statements into machine instructions. Substantially fewer PLiM statements are necessary for a given application than if it were programmed at the assembly
language or machine code level.
The use of PUM high-level language for system programming, instead of assembly language, results in a
high degree of engineering productivity during project development. This translates into significant reductions in initial software development and follow-up maintenance costs for the user.
NOTE' The Intellec~ Development System pictured here IS not Included with the PlfM 86/88 Software package but merely depIcts a language In Its operating environment.
The following are trademarks of Intel Corporation and Its afflhates and may be used only to Identify Intel products. exp, CREDIT, I, ICE, ICS, 1m, In site, intel, INTEL, IntelevlSlon,
Intel ink, Intellec, IMMX, IOSP, IPDS, IRMX, ISBC, ,SBX, library Manager, MeS, MULTI MODULE, Megachassis Micromainframe, MULTlaUS, Multichannel, Plug·A-Bubble,
PROMPT, Promware, AUPI, RMX/80, System 2000, UPI, and the combination ICS, iAMX, ISaC, iSBX, ICE, ,2ICE, MCS, or UPI and numerical suffix Intel Corporation Assumes NoResponsibility for the use of Any Circuitry Other Than Circuitry Embodied In an Intel product No Other Patent licenses are Implied ©INTEL CORPORATION. 1983
MAY 1983
ORDER NUMBER:210689-002
3-28
PL/M 86188/186 SOFTWARE PACKAGE
Another powerful facility allows the use of BASED
variables that map more than one variable to the
same memory location. This is especially useful
for passing parameters, relative and absolute addressing, and memory allocation.
FEATURES
Major features of the Intel PLIM 86 compiler and
programming language include:
Block Structure
Two Data Structuring Facilities
PLIM source code is developed in a series of
modules, procedures, and blocks. Encouraging
program modularity in this manner makes programs more readable, and easier to maintain and
debug. The language becomes more flexible, by
clearly defining the scope of user variables (local
to a private procedure).
In addition to the five data types and based
variables, PLIM supports two data structuring
facilities. These help the user to organize data into logical groups.
- Array: Indexed list of same type data elements
- Structure: Named collection of same or different type data elements
~ Combinations of Each: Arrays of structures or
structures of arrays
The use of procedures to break down a large
problem is paramount to productive software
development. The PLIM 86 implementation of a
block structure allows the use of REENTRANT
(recursive) procedures, which are especially useful in system design.
8087 Numerics Support
PLIM programs that use 32-bit REAL data may be
executed using the Numeric Data Processor for
improved performance. All floating-point operations supported by PLIM may be executed on the
iAPX 86/20 or 88/20 NDP, or the 8087 Emulator (a
software module) provided with the package.
Determination of use of the chip or Emulator
takes place at linktime, allowing compilations to
be run-time independent.
Language Compatibility
PLIM 86 object modules are compatible with object modules generated by all other iAPX 86
translators. This means that PLIM programs may
be linked to programs written in any other iAPX 86
language.
Object modules are compatible with In-Circuit
Emulators; DEBUG compiler control provides the
In-Circuit Emulators with symbolic debugging
capabilities.
.
Built·ln String Handling Facilities
PLIM 86 Language is upward compatible with
PLIM 80, so that application programs may be
easily ported to run on the iAPX 86.
The PLIM 86 language contains built-in functions
for string manipulation. These byte and word
functions perform the following operations on
character strings: MOVE, COMPARE,
TRANSLATE, SEARCH, SKIP, and SET.
Supports Seven Data Types
Interrupt Handling
PL/M makes use of seven data types for various
applications. These data types range from one to
four bytes, and facilitate various arithmetic, logic,
and addressing functions:
PL/M has the facility for handling interrupts. A
procedure may be defined with the INTERRUPT
attrioute, and the compiler will automatically initialize an interrupt vector at the appropriate
memory location. The compiler will also generate
code to save and restore the processor status, for
execution of the user-defined interrupt handler
routine. The procedure SET$INTERRUPT, the
function retuning an INTERRUPT$PTR, and the
PLIM statement CAUSE$INTERRUPT all add flexibility to user programs involving interrupt and
handling.
-Byte: 8-bit unsigned number
-Word: 16-bit unsigned number
-DWORD: 32-bit unsigned number
-Integer: 16-bit signed number
-Read: 32-bit floating point number
-Pointer: 16-bit or 32-bit memory address
indicator
-Selector: 16-bit base portion of a pointer
3-29
AFN·01881C
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PL/M 86/88/186 SOFTWARE PACKAGE
Compiler Controls
Including several that have been mentioned, the
PLIM 86 compiler offers more than 25 controls
that facilitate such features as:
- Conditional compilation
- Including additional PLIM source files from
disk
- Corresponding assembly language code in the
listing file
- Setting overflow conditions for run-time
handling
- Combination or "folding" of constant expressions; and short-circuit evaluation of Boolean
expressions
- "Strength reductions" (such as a shift left
rather than multiply by 2); and elimination of
common sub-expressions within the same
block
- Machine code optimizations; elimination of
superfluous branches; re-use of duplicate
code; removal of unreachable code
- Byte comparisons (rather than 20-bit address
calculations) for pointer variables; optimization
of based-variable operations
Segmentation Control
The PLIM 86 compiler takes full advantage of program addressing with the SMALL, COMPACT,
MEDIUM, and LARGE segmentation controls_ Programs with less than 64KB total code space can
exploit the most efficient memory addressing
schemes, which lowers total memory requirements. Larger programs can exploit the flexibility
of extended one-megabyte addressing.
Error Checking
The PLIM 86 compiler has a very powerful feature
to speed up compilations. If a syntax or program
error is detected, the compiler will skip the code
generation and optimization passes. This usually
yields a 2X performance increase for compilation
of programs with errors.
A fully detailed set of programming and compilation errors is provided by the compiler.
Code Optimization
The PLIM 86 compiler offers four levels of optimization for significantly reducing overall program size.
MOO. 1* Beglnnmg of module 'I
SORTPROC PROCEDURE (PTR. COUNT. RECSIZE. KEYINDEX) ~ I PUBLIC and EXTERNAL attributes promote
~L___
programmodulanty
DECLARE PTR POINTER. (COUNT. RECSIZE. KEYINDEX) INTEGER.
l
j*
Parameters
PTA IS pOinter to ftrst record '
COUNT IS number 01 records to be sorted
RECSIZE IS number of bytes In each record-max IS 128
KEYINDEX IS byte pOSItion wlthm each record of a BYTE scalar
\' "Based" Vanables allow manipulation of external data by
to be used as sort key '/
-~--~ ~~~~~I~~~~h~a~~~bW:~aa~: ~~~J\~~ep~r~~I~tt;Pp:s~~g, and
DECLARE @ECORDBASEDPTBJ(1) BYTE,
the execution time to perform many STACK operatIons
CURRENT (128) BYTE,
(I. J) INTEGER.
SORT
FIND
DO
J~
1 TO COUNT-l.
CALL MOVB(@RECORD(J'RECSIZE). ""'.:..::....:.-_,
I""J,
- __
DO WHILE I ,0
AND RECORD((I- WRECSIZE-KEYINDEX)
·CURRENT(KEYINDEX).
CALL MOVB(@RECORD((I-l)'RECSIZE).
@RECORO(I·RECSIZE).
RECSIZE).
The "AT" operator returns the address of a
variable, Instead of Its contents Th,s IS very useful
In passIng pOInters for based variables.
I~I-l.
END FIND.
CALLCM~B~CURRENT. @RECORD(I·RECSIZE). RECSIZE).
END SORT.
One of several PL/M bwltMtn procedures for stnng
manIpulatIon
END SORTPROC.
END M.
rEnd of module"!
Figure 1. Sample PLIM 88 Program.
3-30
AFN-Ol661C
PLIM 861881186 SOFTWARE PACKAGE
BENEFITS
Lower Development Cost
PLIM 86 is designed to be an efficient, cost-effective solution to the special requirements of iAPX
86 Microsystem Software Development, as illustrated by the following benefits of PLIM use:
Increases in programmer productivity translate
immediately into lower software development
costs because fewer programming resources are
required for a given programmed function.
Increased Reliability
Cost· Effective Alternative to
Assembly Language
PLiM 86 is designed to aid in 'the development of
reliable software (PLIM 86 programs are simple
statements of the program algorithm). This
substantially reduces the risk of costly correction
of errors in systems that have already reached full
production status, as the more simply stated the
prograll1 is, the more likely it is to perform its intended function.
PLIM 86 programs are code efficient. PLIM 86
combines all of the benefits of a high-level
language (ease of use, high productivity) with the
ability to access the iAPX 86 architecture. Consequently, for the development of systems software,
PLiM 86 is the cost-effective alternative to
assembly ianguage programming.
Easier Enhancements
and Maintenance
Low Learning Effort
PLiM is easy to learn and to use, even for the
novice programmer.
Programs written in PLiM tend to be selfdocumenting, thus easier to read and understand.
This means it is easier to enhance and maintain
PLiM programs as the system capabilities expand
and future products are developed.
Earlier Project Completion
Critical projects are completed much earlier than
otherwise possible because PLiM 86, a structured
high-level language, increases programmer productivity.
SPECIFICATIONS
Documentation Package
Operating Environment
PLlM-86 User's Guide for 8086-based Development Systems (121636)
REQUIRED HARDWARE:
Intel Microcomputer Development Systems (Series
III/Series IV)
SUPPORT:
Hotline Telephone Support, Software Performance
Reporting (SPR), Software Updates, Technical
Reports, Monthly Newsletter available.
ORDERING INFORMATION
Requires Software License
Part Number
MDS-313*
'MDS IS an ordering code only and is not used as a product
name or trademark. MDS'" is a registered trademark of
Mohawk Data Sciences Corporation.
Description
PLiM 86 Software Package
3-31
AFN·OI661C
intJ
PASCAL 86/88
SOFTWARE PACKAGE
• Resident on IAPX 86 Based Intel
Microcomputer Development Systems
• Object Compatible and Linkable with
PLIM 86/88, ASM 86/88 and FORTRAN
86/88
• ICE™ Symbolic Deb~gglng Fully
Supported
• PSCOPE Source Level Debugging Fully
Supported
• Implements REALMATH for Consistent
and Reliable Results
• Unlimited User Program Symbols
• Supports iAPX86/20, 88/20 Numeric
Data Processors
• Strict Implementation of ISO Standard
Pascal
• Useful Extensions Essential for
Microcomputer Applications
• Separate Compilation with TypeChecking Enforced Between Pascal
Modules
• Complier Option to Support Full RunTime Range-Checking
PASCAL 86{88 conforms to and implements the ISO Draft Proposed Pascal standard. The language is
enhanced to support microcomputer applications with special features, such as separate compilation, interrupt handling and direct port I{O. To assist the development of portable software, the compiler can be directed
to flag all non-standard features.
The PASCAL 86/88 compiler runs on Series III and Series IV Microcomputer Development Systems. A well-defined I/O interface is
provided for run-time support. This allows a user-written operating system to support application programs as an alternate to the
development system environment. Program modules compiled under PASCAL 86/88 are colllpatible and linkable with modules
written in PUM 86/88, ASM 86/88 or FORTRAN 86/88. With a complete family of compatible programming languages for the iAPX
86,88, 186, 188 one can implement each module in the language most appropriate to the task at hand.
PASCAL 86{88 object modules contain symbol and type information for program debugging using ICE™
emulators and PSCOPE source language debugger. For final production version, the compiler can remove this
extra information and code.
MAY 1983
@INTEL CORPORATION. 1983
ORDER NUMBER:400670-001
3-32
PASCAL 86/88
FEATURES
Supports numerous compiler options to control the
compilation process, to INCLUDE files, flag nonstandard Pascal statements and others to control
program listings and object modules.
Includes all the language features of Jensen & Wirth
Pascal as defined in the ISO Draft Proposed Pascal
Standard.
Supports required extensions for microcomputer
applications.
Utilizes the IEEE standard for Floating-Point Arithmetic (the Intel REALMATH standard) for arithmetic
operations.
Well-defined and documented run-time operating
system interfaces allow the user to execute the applications under user-designed operating systems.
-Interrupt handling
-Direct port I/O
Separate compilation extensions allow:
Predefined type extensions allow:
-Modular decomposition of large programs
-Create precision in read, integer, and unsigned
calculations.
-Linkage with other Pascal modules as well as PUM
86/88/186/188, ASM 86/88/186/188 and FORTRAN
86/88.
-Means to check 8087 erl'Ors
-Circumvention of rigid type checking on calls to
non-Pascal routines
-Enforcement of type-checking at LINK-time
Provides run-time support for co-processors. All
real-type arithmetic is performed on the 86/20 numeric data processor unit or software emulator.
Run-time library routines, common between Pascal
and other Intel languages (such as FORTRAN), permit efficient and consistently accurate results.
BENEFITS
Provides a standard Pascal for iAPX 86, 88,186,188
based applications.
-Pascal has gained wide acceptance as the portable application language for microcomputer
applications
Extended relocation and linkage support allows the user to
link Pascal program modules with routines written in other
languages for certain parts of the program. For example, realtime or hardware dependent routines written in ASM
86/88/186/188 or PUM 86/88/186/188 can be linked to Pascal
routines, further extending the user's ability to write structured
and modular programs.
-It is being taught in many colleges and universities
around the world
-It is easy to learn, originally intended as a vehicle
for teaching computer programming
-Improves maintainability: Type mechanism is
both strictly enforced and user extendable
-Few machine specific language constructs
PASCAL 86/88 programs "talk" to the resident
operating system using Intel's standard interface for
translated programs. This allows users to replace
the development operating system by their own
operating systems in the final application.
Strict implementation of the proposed ISO standard
for Pascal aids portability of application programs. A
compile time option checks conformance to the
standard making it easy to write conforming
programs.
PASCAL 86/88 takes full advantage of iAPX 86, 88, 186, 188
high level language architecture to generate effiCient machine
code.
PASCAL 86/88 extensions via predefined procedures for interrupt handling and direct port I/O make
it possible to code an entire application in Pascal
without compromising portability.
Compiler options can be used to control the program
listings and object modules. While debugging, the
user may generate additional information such as the
symbol record information required and useful for
debugging using PSCOPE or ICE emulation. After
debugging, the production version may be streamlined by removing this additional information.
Standard Intel REALMATH is easy to use and provides reliable results, consistent with other Intel
languages and other implementations of the IEEE
proposed Floating-Point standard.
3-33
AFN.()1652B
PASCAL 86/88
SPECIFICATIONS
Operating Environment
Documentation Package
REQUIRED HARDWARE
PASCAL 86 User's Guide
Intel Microcomputer Development Systems (Series III, Series
IV)
ORDERING INFORMATION
Part Number
Description
MDS*-314
PASCAL 86/88 Software Package
Requires software license .
• MDS is an ordering code only and is not used as a product name or trademark. MDS" is a registered trademark of Mohawk Data Science.
SUPPORT:
Hotline Telephone Support, Software Performance Report (SPR), Software Updates, Technical Reports, and
Monthly Technical Newsletters are available.
3-34
AFN·01652B
intJ
FORTRAN 86/88
SOFTWARE PACKAGE
• Features high-level language support
for floating-point calculations,
transcendentals, Interrupt procedures,
and run-time exception handling
• Offers powerful extensions tailored to
microprocessor applications
• Meets ANS FORTRAN 77 Subset
Language Specifications
• Provides FORTRAN run-time support
for iAPX 86,88,186,188-based design
• Offers upward compatibility with
FORTRAN 80
• Supports IAPX 86/20, 88/20 Numeric
Data Processor for fast and efficient
execution of numeric instructions
• Provides users ability to do formatted
and unformatted 1/0 with sequential or
direct access methods
• Uses REALMATH Floating-Point
Standard for consistent and reliable
results
• ICE™ Symbolic Debugging Fully
Supported
• Supports Arrays Larger Than 64K
• PSCOPE Source Level Debugging Fully
Supported
• Unlimited User Program Symbols
FORTRAN 86{88 meets the ANS FORTRAN 77 Language Subset Specification'and includes many features of
the full standard. Therefore, the user is assured of portability of most existing ANS FORTRAN programs and of
full portability from other computer systems with an' ANS FORTRAN 77 Compiler.
FORTRAN 86{88 programs developed and debugged on the Intel Microcomputer Development Systems may be
tested with the prototype using ICE symbolic debugging, and executed on an RMX-86 operating system, or on a
user's iAPX 86,88,186,188-based operating system.
FORTRAN 86{88 is one of a complete family of compatible programming languages for iAPX 86,88,186,188
development: PL)M, Pascal, FORTRAN, and Assembler. Therefore, users may choose the language best suited
for a specific problem solution.
MAY 1983
@INTELCORPORATION. 1983
ORDER NUMBER:400630-001
3-35
FORTRAN 86/88 SOFTWARE PACKAGE
FEATURES
Intel® MicroproCeSsor Support
Extensive High-Level Language
Numeric Processing Support
FORTRAN 86/88 language features sUPPort of iAPX
86/20, 88/20 Numeric Data Processor
Single (32-bit), double (64-bit), and double extended
precision (80-bit) floating-point data types
Compiler generates in-line iAPX 86/20, 88/20 Numeric Data Processor object code for floating-point
arithmetic (See Figure 1)
REALMATH Proposed IEEE Floating-Point Standard) for consistent and reli@ble results
Intrinsics allow user to control iAPX 86/20, 88/20
Numeric Data Processor,
Full support for all other data types: integer, logical,
character
iAPX 86,88,186,188 architectural advantages used
,
for indexing and character-string handling
Ability to use hardware (iAPX 86/20, 88/20 Numeric
Data Processor) or software (sin:1Ulator) floatingpoint support chosen at link time
Symbolic debugging of application using ICE
emulators
ANS FORTRAN 77 Standard
Source level debugging using PSCOPE.
FLOATING-POINT-STATMENT
TEMPER = (PRESS - VOLUM I ~UEK) - i.45 I (PRESS - VOLUM
- (PRESS - VOLUM I QUEK) • (PRESS - VOLUM I QUEK)
&
I
QUEK)
OBJECT CODE GENERATED
Intel FDRTRAN-86 Compl.ler
IAPX 86/20, 88/20
MACHINE CODE
0013
0018
0010
0022
0025
0028
002E
0031
0034
0037
003A
0030
0040
0045
9809060COO
9808360000
9B082E0800
980001
9B2E083EOOaO
9B09C9
980002
980EE9
9B09C1
9808C8
9BOOC2
9BOEE1
98091E0400
98
ASSEMBLER MNEMONICS
FLJ
FDIV
,F sus ~
FST
FOIV~
FXCIiG
r:ST
FSUBRP
FLO
FMUL
FFREE
FSUSP
FSTP
I.,
IIOLUM
STATEMENT " 2
~UEK
PRESS
T:JS+1H
CS:iilCONST
TOS+1H
TOS+2H
T:JS+1H
TOS
TOS+2H
TEMPER
lolA IT
Figure 1. Object Code Generated by FORTRAN 86/88 for a Floating-Point Calculation Using IAPX 86/20,
88/20 Numeric Processor
3-36
AFN-Ol6S38
inter
FORTRAN 86/88 SOFTWARE PACKAGE
Microprocessor Application Support
Early Project Completion
-Direct byte- or word-oriented port 1/0
FORTRAN is an industry-standard, high-level
numerics processing language. FORTRAN programmers can use FORTRAN 86/88 on microprocessor projects with little retraining. Existing FORTRAN software can be compiled with FORTRAN
86/88 and programs developed in FORTRAN 86/88
can run on other computers with ANS FORTRAN 77
with little or no change. Libraries of mathematical
programs using ANS 77 standards may be compiled
with FORTRAN 86/88.
-Reentrant procedures
-Interrupt procedures
Flexible Run-Time Support
Application object code may be executed in iAPX 86,
88,186,188-based environment of user's choice:
-a Series III or Series IV Intellec Development System
-an iAPX 86,88,186,188-based system with iRMX-86
Operating System
Application Object Code
Portability for a Processor Family
-an iAPX 86,88,186,188-based system with userdesigned Operating System
FORTRAN 86/88 modules "talk" to the resident Intellec development operating system using Intel's standard interface for all development-system software.
This allows an application developed under the ISIS\I operating system to execute on iRMXl86, or a usersupplied operating system by linking in the iRMXl86
or other appropriate interface library. A standard
logical-record interface enables communication
with non-standard I/O devices.
Run-time exception handling for fixed-point numerics, floating-point numerics, and 1/0 errors
Relocatable object libraries for complete run-time
support of I/O and arithmetic functions. In-line code
execution is generated for iAPX 86/20, 88/20 Numeric Data Processor
BENEFITS
FORTRAN 86/88 provides a means of developing ap- '
plication software for the Intel iAPX 86,88,186,188
products lines in a familiar, widely accepted, and
industry-standard programming language. FORTRAN 86,88 will greatly enhance the user's ability to
provide cost-effective software development for
Intel microprocessors as illustrated by the following:
I
Comprehensive, Reliable
and Efficient Numeric Processing
The unique combination of FORTRAN 86/88, iAPX
86/20, 88/20 Numeric Data Processor, and
REALMATH (Proposed IEEE Floating-Point Standard) provide universal consistency in results of
numeric computations and efficient object code
generation.
SPECIFICATIONS
Documentation Package
Operating Environment
FORTRAN 86/88 User's Guide
Intel Microcomputer Development Systems (Series
III/Series IV)
3-37
AFN·01Ml8
intJ
FORTRAN 86/88 SOFTWARE PACKAGE
ORDERING INFORMATION
Part Number Description
MDS*-315
FORTRAN 86/88 Software Package
Requires Software License
SUPPORT
Intel offers several levels of support for this product
which are explained in detail in the price list. Please
consult the price list for a description of the support
options available.
*MDS is an ordering code only and is not used as a product name or trademark. MDS is a registered trademark of
Mohawk Data Sciences Corporation.
3-38
AFN·01653B
C-86
C COMPILER FOR THE 8086
• Implements full C Language
•. Produces high density code rivaling
assembler
• Supports Intel Object Module Format
(OMF)
• Supports both small and large models of
computation
• Supports ICE ™ 86 and DEBUG- 86/88
• Supports IEEE Floating Point Math with
8087 coprocessor
• Supports Bit Fields
• Supports full standard 110 Library (STDIO)
• Written in C
• Runs under the Intel UDI on
Intel Development Systems and
iRMX™ 86
• Available for the VAX/VMS* Operating
System
The C Programming Language was originally designed in 1972 and has become increasingly popular as a
systems development language. C is not a "very high level" language and is not tied to any specific application
area. Although it is used for writing operating systems, it has been used equally well to write numerical, textprocessing and data base programs. C combines the flexibility and programming speed of a higher level
language with the efficiency and comrol of assembly language.
Intel C-86 brings the full power of the C programming language to 8086 and 8088 based microprocessor
systems.
Intel C-86 supports the full C language as described in the Kernighan and Ritchie book, "The C Programming
Language," (Prentice-Hall, 1978). Also included are the latest enhancements to the C language: structure
as~ignments, functions taking structure arguments and returning structures, and the "void" and "enum" data
types.
C is rapidly becoming the standard microprocessor system implementation language because it provides:
1. the ability to manipulate the fundamental objects of the machine (including machine addresses) as easily
as assembly language.
2. the power and speed of a structured language supporting a large number of data types, storage classes, expressions and statements,
3. processor independence (most programs developed for other processors can be easily transported to the
8086), and
.
4. code that rivals assembly language in efficiency
INTEL C-86 COMPILER DESCRIPTION
semantic error checking. The code generator phase
converts the parser's output into an efficient intermediate binary code, performs constant folding, and
features an extremely efficient' register allocator,
ensuring high quality code. The optimizer phase
converts the output of the code generator into
The C-86 compiler operates in four phases: preprocessor, parser, code generator, and optimizer. The
preprocessor phase interprets directives in C source
code, including conditional compilations (#define).
The parser phase converts the C program into an
intermediate free form and does all syntactic and
MAY 1983
ORDER NUMBER:210768-002
3-39
intJ
C-86*
C COMPILER FOR THE 8086
relocatable Intel Object Module Format (OMF) code,
without creating an intermediate assembly file. Optionally, the C-86 compiler can produce a symbolic
assembly like file. The C-86 optimizer eliminates
common code, eliminates redundant loads and
stores" and resolves span dependencies (shortens
branches) within a program.
The C-86 runtime library consists of a number of
functions which the C programmer can call. The runtime system includes the standard lIO library
(STDIO), conversion routines, routines for manipulating strings, special routines to perform functions
not available on the 8086 (32-bit arithmetic and
emulated floating point), and (where appropriate)
routines for interfacing with the operating system.
C-86 uses Intel's linker and locator and generates
debug records for symbols and lines on request,
permitting access to Intel's ICE-86 and DEBUG-86 to
aid in program testing.
FEATURES
Support for Small and Large Models
Intel C-86 supports both the SMALL and LARGE
modes of segmentation. A SMALL model program
can have up to 64K bytes of code and 64K bytes of
data, with all pointers occupying two bytes. Because
two byte pointers permit the generation of highly
compact and efficient code, this model is recommended for programs that can meet the size restrictions. The LARGE segmentation model is used by
programs that require access to the full addressing
space of the 8086/8088 processors. In this model,
each source file generates a distinct pair of code and
data segments of up to 64k bytes in length. All point.
ers are four bytes long.
ments from arrays, and extract fields from structures
or unions
Arithmetic operators: add, subtract, multiply, divide,
modulus
,Relational operators: greater than, greater than or
equal, less than, less than or equal, not equal
Unary operators: indirect through a pOinter, compute
an address, logical negation, ones complement, provide the size in bytes of an operand. •
Logical operators: AND, OR
Bitwise operators: AND, exclusive OR, inclusive OR,
bitwise complement
Preprocessor Directives
Data Types and Storage Classes
#define-defines a macro
Data in C is described by its type and storage class.
The type determines its representation and use, and
the storage class determines its lifetime, scope, and
storage allocation. The following data types-are fully
supported by C-86:
#include- includes code outside of the program
source file
#if - conditionally includes or excludes code
Other preprocessor directives include #undef, #ifdef,
#ifndef, #else, #endif, and #line.
char
Statements
int
an 8 bit signed integer
a 16 bit signed integer
The C language supports a variety of statements:
short
Conditionals: IF, IF-ELSE
same as int (on the 8086)
Loops: WHILE, DO-WHILE, FOR
long
Selection of cases: SWITCH, CASE, DEFAULT
a 32 bit signed integer
Exit from a function: RETURN
unsigned
a modifier for integer data types (char, int,
short, and long) which doubles the positive
range of values
Loop cqntrol: CONTINUE, BREAK
Branching: GOTO
float
Expressions and Operators
a32 bit floating point number which utilizes the
8087 or a software floating point library
The C language includes a rich set of expressions
and operators.
double
Primary expression: invoke functions, select ele-
a 64 bit floating point number
3-40
AFN-Q0144B
inter
C-S6·
C COMPILER FOR THE SOS6
void
a special type that cannot be used as an
operand in expressions; normally used for
functions called only for effect (to prevent their
use in contexts where a value is required).
extern
a variable defined outside of the function where
it is declared; retaining its value throughout the
entire program and accessible to other
modules
enum
an enumerated data type
auto
a local variable, created when a block of code is
entered and discarded when the block is
existed
These fundamental data types may be used to
create other data types including: arrays, functions, structures, pointers, and unions.
static
a local variable that retains its value until the
termination of the entire program
The storage classes available in C-86 include:
register
suggests that a variable be kept in a machine
register, often enhancing code density and
speed
typedef
defines a new data type name from existing
data types
BENEFITS
variety of machines can easily be transported to the
8086.
Faster Compilation
Intel C-86 compiles C programs substantially faster
than standard C compilers because it produces Intel
OMF code directly, eliminating the traditional intermediate process of generating an assembly file.
Rapid Program Development
Intel C-86 provides the programmer with detailed
error messages and access to ICE-86 and DEBUG-86
to speed program development.
Generates High Quality Code
For typical programs using the SMALL model, the
Intel C-86 Compiler produces code that is 14-16%
smaller than on a Digital Equipment PDP-11.
Full Manipulation of the 8086
Intel C-86 enables the programmer to utilize features
of the C language to control bit fields, pointers, addresses and register allocation, taking full advantage
of the fundamental concepts of the 8086. '
Portability of Code
Because Intel C-86 supports the .STDIO and produces Intel OMF code, programs developed on a
SPECIFICATIONS
Operating Environment
-Dual Diskette Drives, Single or Doubl~ Density
The C-86 compiler runs host resident on both the
Intel Series III Microcomputer DevelopmentSystem
under ISIS-II and on the System 86/330 under the
iRMX 86 operating system. C-86 can also run as a
cross compiler on a VAX 11/780 computer under the
VMS operating system. 96 KBytes of User Memory is
required on all versions. Specify desired version
when ordering.
-System Console; CRT or Hardcopy Interactive
Device
iRMX 86 version:
-Any iAPX 86/88, iSBC'" 86/88, iTPS 86/XXX, or
SYS 86/3XX based system capable of running the
iRMX 86 Operating System
Required Hardware
Development System Version
VAX version:
-Intellec® Microcomputer Development System; Series III
or Series IV
-Digital Equipment Corporation VAX 11/780 or
compatible computer
3-41
AFN-001''''8
inter
C-86*
C COMPILER FOR THE 8086
Optional Hardware
iRMX 86 version:
ISIS-II version:
-No,ne
-ICE-86
VAX version:
iRMX 86 version:
-MDS·-384 Kit-Mainframe Link for distributed development, or
iMDX-394'Asynchronous Communications Link.
-Numeric Data Processors for support of the
REALMATH standard
-VAX-IAPX 86/88/186 MACRO Assembler and
utilities package (iMDX-341VX)
VAX version:
-None
Documentation Package
Required Software
ISIS-II version:
The C Programming Language by Kernighan and
Ritchie (1978 Prentice-Hall)
-ISIS-II Diske!te Operating System
C-B6 User Manual
-Series III Operating System
Shipping Media
iRMX 86 version:
Development System Version:
-One single and one douQle density ISIS-II format
8" diskette, one S-25" Series IV Format
-iRMX 86 Realtime Multiprogramming Operating
System
-iRMX 860 Utilities Package
iRMX 86 version:
VAX version:
-Double Density iRMX 86 format 8" diskette
-VMS Operating System
-Double Density iRMX 86 format 5V4' diskette
VAX version:
Optional Software
-1600 bpi, 9 track Magnetic tape
Development System Version:
-One single and one double density ISIS-II format
8" diskette
-None
ORDERING INFORMATION
Order Code
iMDX-317
SUPPORT
Intel offers several levels of support for this product
which are explained in detail in the price list. Please
consult the price list for a description of the support
options available.
Description
C-86 Compiler for ISIS-II
iRMX-866
C-86 Compiler for iRMX 86
IMDX-347
C-86 Cross Compiler for
VAXNMS
Intel Software License required.
*MDS is an ordering code only and is not used as a product name or trademark. MDS is a registered trademark of
Mohawk Data Sciences Corporation.
3-42
AFN-00144B
8087
SOFTWARE SUPPORT PACKAGE
• Program Generation for the 8087
Numeric Data Processor on 8080/8085
Based Intel Microcomputer
Development Systems
• 8087 Emulator Duplicates Each 8087
Floating-Point Instruction in Software,
for Evaluation of Prototyping, or for
Use in an End Product
• Macro Assembler and 8087 Emulator
are Fully Compatible with Other
8086/8088 Development Software
• Consists of: 8086/8087/8088 Macro
Assembler, 8087 Software Emulator
• Macro Assembler Generates Code for
8087 Processor or Emulator, While
Also Supporting the 8086/8088
Instruction Set
• Implementation of the IEEE Proposed
Floating-Point Standard (the Intel®
Realmath Standard)
The 8087 Software Support Package is an optional extent ion of Intel's 8086/8088 Software Development
Package that runs under ISIS-II.
The 8087 Software Support Package consists of the 8086/8087/8088 Macro Assembler, and the Full 8087
Emulator. The assembler is a functional superset of the 8086/8088 Macro Assembler, and includes instructions for over sixty new floating-point operations, plus new data types supported by the 8087.
The 8087 Emulator is an 8086/8088 object module that simulates the environment of the 8087, and executes
each floating-point operation using software algorithms. This emulator functionally duplicates the operation
of the 8087 Numeric Data Processor.
Also included in this package are interface libraries to link with 8086/8087/8088 object modules, which are
used for specifying whether the 8087 Processor or the 8087 Emulator is to be used. This enables the run-time
environment to be invisible to the programmer at assembly time.
The followmg are trademarks of Intel Corporation and may be used only to Identify Intel products exp, CREDIT, Intellee, Multlbu$, I, .SBC, Multlmodule, ICE, ISBX, PROMPT, IRMX,
IGS. Library Manager, Promware, Inslte, MeS, RMX, Intel, Megachassls, UPI, InteleVISlon, Mlcromap, IJ.Scope and the combination of ICE, IGS, .SBC, [SBX, MeS, or RMX and a
numerical suffix
@INTELCORPORATION. 1983
MAY 1983
3-43
ORDER NUMBER:402150-001
8087 SOFTWARE SUPPORT PACKAGE
floating-point instructions, the macro assembler
also introduces two new 8087 data types: QWORD
(8 bytes) and TBYTE (ten bytes). These support the
highest precision of data processed by the 8087.
FUNCTIONAL DESCRIPTION
8086/8087/8088 Macro Assembler
The 8086/8087/8088 Macro Assembler translates
symbolic macro assembly language instructions
into appropriate machine instructions. It is an extended version of the 8086/8088 Macro Assembler,
and therefore supports all of the same features and
functions, such as limited type checking, conditional assembly, data structures, macros, etc. The
extensions are the new instructions and data types
to support floating-point operations. Realmath
floating-point instructions (see Table 1) generate
code capable of being converted to either 8087 instructions or interrupts for the 8087 Emulator. The
Processor/Emulator selection is made via interface
libraries at LINK-time. In addition to the new
Full 8087 Emulator
The Full 8087 Emulator is a 16-kilobyte object module that is linked to the application program for
floating-point operations. Its functionality is identical to the 8087 chip, and is ideal for prototyping and
debugging floating-point applications. The
Emulator is an alternative to the use 01 the 8087 chip,
although the latter executes floating-point applications up to 100 times faster than an 8086 with the
8087 Emulator. Furthermore, since the 8087 is a
"co-processor," use of the chip will allow many operations to be performed in parallel with the 8086.
Table 1. 8087 Instructions
Processor Control Instructions
Arithmetic Instructions
Addition
FADD
FADDP
FIADD
Add real
Add real and pop
Integer add
Subtraction
FSUB
FSUBP
FISUB
FSUBR
FSUBRP
FISUBR
Subtract real
Subtract real and pop
Integer subtract
Subtract real reversed
Subtract real reversed and
pop
Integer subtract reversed
Multiplication
FMUL
FMULP
FIMUL
Multiply real
Multiply real and pop
Integer multiply
Division
FDIV
FDIVP
FIDIV
FDIVR'
FDIVRP
FIDIVR
Divide real
Divide real and pop
Integer divide
Divide real reversed
Divide real reversed arid
pop
Integer divide reversed
FABS
FCHS
Initialize processor
Disable interrup,ts
FENI/FNENI
Enable interrupts
FLDCW
Load control word
FSTCW/FNSTCW
Store control word
FSTSW/FNSTSW
Store status word
FCLEX/FNCLEX
Clear exceptions
FSTENV/FNSTENV
Store environment
FLDENV
Load environment
FSAVE/FNSAVE
Save state
FRSTOR
Restore state
FINCSTP
Increment stack pointer
FDECSTP
Decrement stack pointer
FFREE
Free register
FNOP
No operation
FWAIT
CPU wait
Comparison Instructions
FCOM
Other Operations
FSQRT
FSCALE
FPREM
FRNDINT
FXTRACT
FINIT/FNINIT
FDISI/FNDISI
Square root
Scale
Partial remainder
Round to integer
Extract exponent and
significand
Absolute value
Change sign
Compare real and pop
FCOMPP
Compare real and pop
twice
Integer cOl}1pare
FICOM
3,-44
Compare real
FCOMP
FICOMP
Integer compare and pop
FTST
Test
FXAM
Examine
AFN·01574B
8087 SOFTWARE SUPPORT PACKAGE
Table 1. 8087 Instructions (cont'd)
Data Transfer Instructions
Transcendental Instructions
FPTAN
Partial tangent
FPATAN
Partial arctangent
F2XM1
2'-1
FYL2X
y. 10g,X
FYL2XP1
y. log2(X+ 1)
Real Transfers
FLO
FST
FSTP
FXCH
Constant Instructions
Load +00
FLD1
Load + 1.0
FLDPI
Load rr
FLDL2T
Load log21O
FLDL2E
Load log2e
FLDLG2
Load log '02
FLDLN2
Load log,2
Integer load
Integer store
Integer store and pop
Packed Decimal Transfers
FBLD
FBSTP
Packed decimal (BCD)
load
Packed decimal (BCD)
store and pop
SPECIFICATIONS
Documentation Package
Operating Environment
BOB6/BOB7/B08B Macro Assembly Language Reference Manual for BOBO/BOBS-Based Development
Systems
REQUIRED HARDWARE
Intel Microcomputer Development Systems
-Model BOO
-Series II
-Personal Development System
-Series IV
BOB6/BOB7/BOBB Macro Assembler Operating Instructions for BOBO/B08S-Based Development Systems
The 8086 Family Users Manual Supplement for the
8087 Numeric Data Processor
REQUIRED SOFTWARE
BOB6/BOBB Software Development Package
ORDERING INFORMATION
Part Number
Description
MDS*-3B7
BOB7 Software Support Package
;
Integer Transfers
FILD
FIST
FISTP
FLDZ
I
Load real
Store real
Store real an d pop
Exchange registers
Requires Software License
SUPPORT
Intel offers several levels of support for this product
which are explained in detail .in the price list. Please
consult the price list for a description of the support
options available.
*MDS is an ordering code only and is not used as a product name or trademark. MDS is a registered trademark of
Mohawk Data Sciences Corporation.
3-45
I
I
I
i
8087 SUPPORT LIBRARY
• Full 8087 Software Emulator for soft·
ware debugging without the 8087
component
• Library to support floating point
arithmetic in PUM·86 and ASM·86
• Common elementary function library
provides trigonometric, logarithmic
and other useful functions
• Accurate, verified and efficient imple·
mentation of algorithms for functions
• Decimal conversion module supports
blnary·decimal conversions
• Supports proposed IEEE Floating
Point Standard for high accuracy and
software portability
• Error·handler module simplifies
floating point error recovery
The 8087 Support LibrarY provides PUM-86 and ASM-86 users with the equivalent numeric data processing capability
of Fortran-86. With the Library, it is easy for PUM-86 and ASM-86 programs to do floating point arithmetic. Programs
can link in modules to do trigonometric, logarithmic and other numeric functions, and the user is guaranteed accurate,
reliable results for all appropriate inputs. The 8087 Support Library implements Intel's REALMATH standard and also
supports the proposed IEEE Floating Point Standard. Consequently, by using this Library, the PUM-86 user not only
saves software development time, but is guaranteed that the numeric software meets industry standards and is
portable-his software investment is maintained.
The 8087 Support Library consists of the common elementary function library, the decimal conversion module, the
error handler module, the full 8087 Software emulator and interface libraries to the 8087 and to the 8087 emulator.
B.PLM
A.PLM
DECLARE (INPUT
VALUE OUTPUT
VALUE) REAL
1----1
OUTPUT
VAWE.mqe,TNN(INFUT
,. Now .. "h,h.,e01.npu' OUTPUT
o 5511290J,
PLM·86
1---1
VALUE)
VALUE .. a.bou'
D.ASM
C.ASM
'l'!tloEXTIIM mu"oppe.,ou, .. deoloIiSEGMEMTEHDS
pa".
UTRNmq.,TNH FAR
INPUT
VALVE
OUTPUT
DO 40 62
VALUE DO
I--'-----I~ LINK 86
~:;~:ll"Hon " • I.ot
1---1
LINKED USER
OBJECT MODULE
'
The loU"",ngcode duphcate.th •• bovePLtN
''''gnmenl
.aIlWie,
sla'.m~nt
.,a.p' ",lit LONG /lEAL
Loodthpo,ome,e,Onlo ,h. SOS1
.,.cI:
CALLmqlt,TNH
fSTPOUTPUT VALUE
, ••• ,heh".."bo],cl."Q_nt
,Io,elheon.we,ondpoplh.
a087.'ack
W,th ,h. le,l InP"! OUTPUT VALUE,st>O",,,bou1
055112603
©INTEL CORPORATION, 1983
MAY 1983
ORDER NUMBER:121653-001
3-46
8087 SUPPORT LIBRARY
CEL87.LIB
THE COMMON ELEMENTARY FUNCTION LIBRARY
CEl87.LlB contains commonly used floating pOint functions. It is used along with the 8087 numeric coprocessor or
the 8087 emulator and it provides a complete package of elementary functions, giving valid results for all appropriate
inputs. This library provides PUM·86 and ASM·86 users all the math functions supported intrinsically by the
Fortran-86. Following is a summary of CEl87 functions, grouped by functionality.
Rounding and Truncation Functions:
mqerlEX, mqerlE2, and mqerlE4 round a real number to the nearest integer; to the even integer if there is a tie. The
answer returned is real, a 16-bit integer or a 32-bit integer respectively.
mqerlAX, mqerlA2, mqerlA4 round a real number to the nearest integer, to the integer away from zero if there is a tie;
the answer returned is real, a 16-bit integer or a 32-bit integer, respectively.
mqerlCX, mqerlC2, mqerlC4 truncate the fractional part of a real input; the answer is real, a 16-bit integer or a 32-bit integer, respectively.
Logarithmic and Exponential Functions:
mqerlGD computes decimal (base 10) logarithms.
mqerLGE computes natural (base e) logarithms.
mqerEXP computes exponentials to the base e.
mqerY2X computes exponentials to any base.
mqerYI2 raises an input real to a 16-bit integer power.
mqerYI4 is as mqerYl2, except to a 32-bit integer power.
mqerYIS is as mqerYl2, but it accommodates PUM-86 users.
Trigonometric and Hyperbolic Functions:
mqerSIN, mqerCOS, mqerTAN compute sine, cosine, and tangent.
mqerASN, mqerACS, mqerATN compute the corresponding inverse functions.
mqerSNH, mqerCSH, mqerTNH compute the corresponding hyperbolic functions.
mqerAT2 is a special version of the arc tangent function that accepts rectangular coordinate inputs.
Other Functions:
mqerDIM is FORTRAN's positive difference function.
mqerMAX returns the maximum of two real inputs.
mqerMIN returns the minimum of two real inputs.
mqerSGH combines thE! sign of one input with the magnitude of the other input.
mqerMOD computes a modulus, retaining the sign of the dividend.
mqerRMD computes a modulus, giving the value closest to zero.
DCON87.LlB
THE DECIMAL CONVERSION LIBRARY
DCON87.LlB is a library of procedures which convert binary representations of floating point numbers and ASCIIencoded string of digits.
The binary-to-decimal procedure mqcBIN DECLOW accepts a binary number in any of the formats used for the
representation of floating point numbers in the 8087. Because there are so many output formats for floating point
numbers, mqcBIN_DEClOW does not attempt to provide a finished, formatted text string. Instead, it provides the
"building blocks" for you to use to construct the output string which meets your exact format specification.
3-47
AFN-02063B
8087 SUPPORT LIBRARY
7
.
The decimal-ta-binary procedure mqcDEC_BIN accepts a text string which consists of a decimal number with
optional sign, decimal pOint, and/or power-of-ten exponent. It translates the string into the caller's choice ·of binary
formats.
.
Decimal-to-binary procedure mqcDECLOW_BIN is provided for callers who have already broken the decimal number
Into its constituent parts.
The procedures mqcLONG_TEMP, mqcSHORT_TEMP, mqcTEMP_LONG, and mqcTEMP_SHORT convert floating
point numbers between the longest binary format, TEMP_REAL, and the shorter formats ..
EHS7.LlB
THE ERROR HANDLER MODULE
EH87.LlB Is a library of five utility procedures which a user can utilize for writing trap handlers. Trap handlers are
called when an unmasked 8087 error occurs.
The 8087 error reporting mechanism can be used not only to report error conditions, but also to let software implement
IEEE standard options not directly supported by the chip. The three such extensions to the 8087 are: normalizing
mode, non-trapping not-a-number (NaN), and non-ordered comparison. The utility procedures support these extra
features.
DECODE is called near the beginning of the trap handler. It preserves the complete state of the 8087, and also identifies what function called the trap handler, and returns available arguments and/or results. DECODE eliminates much
of the effort needed to determine what error caused the trap handler to be called.
NORMAL provides the "normalizing mode" capability for handling the "D" exception. By calling NORMAL in your trap
handler, you eliminate the need to write code in your application program which tests for non-normal inputs.
SIEVE provides two capabilities for handling the "I" exception. It implements non-trapping NaN's and non-ordered
comparisons. These two IEEE standard features are useful for diagnostic work.
ENCODE is called near the end of the trap handler. It restores the state of the 8087 saved by dECODE, and performs a
choice of concluding actions, by either retrying the offending function or returning a specified result.
FILTER calls each of the above four procedures. If your error handler does nothing more than detect fatal errors and
implement the features supported by SIEVE and NORMAL, then your interface to EH87.LlB can be accomplished with
a single call to FILTER.
ESOS7
THE FULL SOS7 EMULATOR
E8087 is an object module that functionally emulates the 8087 coprocessor chip. It is ideal for use during prototyping
and debugging floating point programs. However, the target system should use the 8087 component because it executes 1000 times faster and uses Significantly less memory.
3-48
AFN·02063B
inter
8087 SUPPORT LIBRARY
E8087.L1B, 8087.L1B, 87NULL.LIB
INTERFACE LIBRARIES
EBOB7. LIB, BOB7.LlB and B7NULL. LIB libraries configure a user's application program for his run·time environment:
running with the emulator, with the BOB7 component or without floating point arithmetic, respectively.
SPECIFICATIONS
TARGET ENVIRONMENT
Required Software
BOB6/BOBB Based Microcomputer System
For Series II:
BOB6/80BB Software Development Package
DEVELOPMENT ENVIRONMENT
Required Hardware
Documentation Package
All Intel Microcomputer Development Systems (Series II.
Numeric Support Library Manual
Series III/Series IV)
• Recommended
ORDERING INFORMATION
Part Number
Description
MDS*·319
BOB7 Support Library
Requires Software License
SUPPORT
Intel offers several levels of support for this prodiJct
which are explained in detail in the price list. Please
consult the price list for a description of the support
options available.
*MDS is an ordering code only and is not used as a product name or trademark. MDS is a registered trademark of
Mohawk Data Sciences Corporation.
3-49
AFN-02063B
8089 lOP
SOFTWARE SUPPORT PACKAGE
#407200
• Program Generation for the 8089 1/0
Processor on the Intellec®
Microcomputer Development System
• Supports 8089·Based Addressing
Modes with a Structure Facility that
Enables Easy Access to Based Data
• Contains 8089 Macro Assemhler, plus
Relocation and Linkage Utilities
• Powerful Macro Capabilities
• Relocatable Object Module
Compatible with All iAPX 86 and iAPX
88 Object Modules
• Provides Timing Information in
Assembly Listing
• Fully Supports Symbolic Debugging
with the RBF·89 Software Debugger
• Fully Detailed Set of Error Messages
The lOP Software Support Package extends Intellec Microcomputer Development System support to the 8089
I/O Processor. The macro assembler translates symbolic 8089 macro assembly language instructions into
relocatable machine code. The relocation and linkage utilities provide compatibility with iAPX 86, iAPX 88, and
8089 modules. and make structured, modular programming easier.
'
The macro assemb.ler also provides symbolic debugging capability when used with the RBF-89 software
debugger. 8089 program modularity is supported with inter-segment jumps and calls. The macro assembler
also provides instruction cycle counts in the listing file, for giving the programmer execution timing information. The programs in the 8089 Software Support Package run on any Intellec Series II or Model 800 with 64K
bytes of memory.
•
•
The following are trademarks of Intel Corporation and may be used only to Identify Intel products exp, CREDIT, Intallee, Multlbus. I, ,sec, Multlmodule, ICE, ,sex, PROMPT, les,
tRMX, l-Ibrary Manager, Promware,lnslte, MeS, RMX, Intel, Megachassts, UP!, InteleVISlon, Mlcromap, /-,Scope and the combination of ICE, .sec, ISBX, MeS. or RMX and a numerical
suffiX
MAY 1983
ORDER NUMBER:210853-002
© INTEL CORPORATION 1983
3-50
8089 lOP SOFTWARE SUPPORT PACKAGE
so that any changes to that sequence need to be
made in only one place in the program. Common
code sequences that differ only slightly can also be
referred to with a macro call, and the differences can
be substituted with macro parameters.
FUNCTIONAL DESCRIPTION
The lOP Software Support Package contains:
ASM89 -The 8089 Macro Assembler.
LlNK86 - Resolves control transfer references between 8089 object modules, and data references in 8086, 8088, and 8089
modules.
ASM89 provides symbolic debugging information in
the object file. The RBF-89 debugger makes use of
this information, so the programmer can symbolically debug 8089 programs. ASM89 also provides
cycle counts for each instruction in the assembly
listing file (see Table 1). These cycle counts help the
programmer determine how long· a particular
routine or code sequence will take to execute on the
8089.
LOC86 -Assigns absolute memory addresses to
8089 object modules.
OH86
-Converts absolute object modules to
hexadecimal format.
UPM
- The Universal PROM Mapper, which supports PROM programming In all IAPX
86/11 and iAPX 88/11 applications.
ASM89 provides relocatable object module compatibility with the 8086 and 8088 microprocessors.
This object module compatibility, along with the
8086/8088 relocation and linkage utilities, facilitates
the designing of iAPX 86/11 and iAPX 88/11 systems.
ASM89 translates symbolic 8089 macro assembly
language instructions into the appropriate machine
codes. The ability to refer to both program and data
addresses with symbolic n'ames makes it easier to
develop and modify programs, and avoids the errors
of hand translation.
The powerful macro facility allows frequently used
code sequences to be referred to by a single name,
ASM89 fully supports the based addressing modes
of the 8089. A structure facility allows the user to
define a template that enables accessing of based
data symbolically.
SPECIFICATIONS
Shipping Media
Operating Environment
-Single and Double Density Diskettes
Intel Microcomputer Development Systems (Model
800, Series II, Series III, Series IV)
ORDERING INFORMATION
Support
Hotline Telephone Support, Software Performance
Report (SPR), Software Updates, Technical Reports,
and Monthly Technical Newsletters are available.
Part Number
Description
MDS*-312
8089 lOP Software Support Package
Requires Software License
Documentation Package
8089 Macro Assembler User's Guide (9800938)
8089 Macro Assembler Pocket Reference (9800936)
MCS-86 Software Development Utilities Operating
Instructions for ISIS-II Users (9800639)
'MDS is an ordering code only and IS not used as a product name
or trademark MDS'" IS a registered trademark of Mohawk Data
Sciences Corporation
Universal PROM Programmer .User's Manual
(9800819)
3-51
AFN·OO8408C
8089 lOP SOFTWARE SUPPORT PACKAGE
Table 1. Sample Program Listing
i~rS-11 H83 ttR(,I(oJ .. 3)t:"8!.E~ 1005 IolS~Ett8L{ OF ItOflUL£ TASk
oe'Ef '40DUlf PLACEiJ !'I
rl r",s. OS)
1I4YOt
"'~~E~81.fR
OilHl.T CO[fE
!I'4C
"lie
L rHE
souitC£
....... "" , ........... ~ ...... ~ .. '1· .......... •• .. •• ...... •• ...... •••• ...... • .. :
e86~
BIIB
iI
!'Ill.!'!'
TASK
T >I Sf.
£grams can use built-in functions and predefined
p rocedu res-I N I T$R E AL$ M ATH$ UNIT,
SET$REAL$MODE. GET$REAL$ERROR,
SAVE$REAL$STATUS, RESTORE$REAL$STATUS
-to control the operation of the 80287 within the
scope of the language.
Language Compatibility
PL/M 286 object modules are compatible with object
modules generated by all other 286 translators. This
means that PL/M programs may be linked to programs written in any other 286 language.
Object modules are compatible with In-Circuit
Emulators; DEBUG compiler control prol(ides the InCircuit Emulators with full symbolic debugging
capabilities.
Built-In String Handling Facilities
PL/M 286 language is upward compatible with PLiM
86 and PL/M 80 so that application programs may be
easily ported to run on the protected mode iAPX 286.
The PL/M 286 language contains built-in functions
for string manipulation. These byte and word functions perform the following operations on character
strings: MOVE, COMPARE, TRANSLATE, SEARCH,
SKIp, and SET.
Supports Seven Data Types
PL/M makes use of seven data types for various
applications. -These data types range from one to
four bytes and facilitate various arithmetic, logic,
and addressing functions:
Built-In Port I/O
PL/M 286 directly supports input and output from the
iAPX 286 ports for single BYTE and WORD transfers.
For BLOCK transfers, PLiM 286 programs can make
calls to predefined procedures.
-Byte: 8-bit unsigned number
-Word: 16-bit unsigned number
-Dword: 32-bit unsigned number
-Integer: 16-bit signed number
-Real: 32-bit flo~ting-point number
-Pointer: 16-bit or 32-bit memory address
indicator
-Selector: 16-bit pointer base.
Interrupt Handling
PL/M 286 has the facility for generating and handling
interrupts on the iAPX 286. A procedure may be
defined as an interrupt handler through use of
the INTERRUPT attribute. The compiler will
then generate code to save and restore the processor status on each execution of the user-defined
Another powerful facility allows the use of BASED
variables which permit run-time mapping of var-
3-61
AFN-OOM3B
infel'
PUM 286 SOFTWARE PACKAGE
interrupt handler routine. The PLIM statement
CAUSE$INTERRUPT allows the user to trigger a software interrupt from within the program.
-"Strength reductions": a shift left ratheT than
multiply by 2; and elimination of common subexpressions within the same block
-Machine code optimizations; elimination of
superfluous branches; reuse of duplicate code;
removal of unreachable code
-Optimization of based-variable operations and
cross-statement loadl store.
Protection Model
PLIM 286 supports the implementation of protected
operating system software by providing built-in procedures and variables to access the protection
mechanism of the iAPX 286. Predefined variablesTASK$REGISTER, LOCAL$TABLE, MACHINE$
STATUS, etc.-allow direct access and modification
of the protection system. Untyped procedures and
functions-SAVE$GLOBAl$TABLE, RESTORE$
GLOBAL$TABLE, SAVE$INTERRUPT$TABLE,
RESTORE$INTERRUPT$TABLE, ClEAR$TASK$
SWITCHED$FLAG, GET$ACCESS$RIGHTS, GET
$SEGMENT$lIMIT, SEGMENT$READABLE,
SEGMENT$WRITABLE, ADJUST$RPL-provide all
the facilities needed to implement efficient operating
system software.
Error Checking
The Pl/M 286 compiler has a very powerful feature
to speed up compilations. If a syntax or program
error is detected, the compiler will skip the code
generation and optimization passes. This usually
yields a 2X performarce increase for compilation of
programs with errors.
A fully detailed and helpful set of programming and
compilation error messages is provided by the compiler and user's guide.
.:1"'"
BENEFITS
Complier Controls
PLIM 286 is designed to be an efficient, costeffective solution to the special requirements of
protected mode iAPX 286 Microsystem Software Development, as illustrated by the following benefits of
PLIM use:
The PL/M 286 compiler offers controls that facilitate
such features as:
-Optimization
-CQnditional compilation
-The inclusion of additional PL/M source files
from disk
-Cross-reference of symbols
-Optional assembly language code in the
listing file
- The setting of overflow conditions for run-time
handling.
Low Learning Effort
PL/M 286 is easy to learn and use, even for the novice
programmer.
Earlier Project Completion
Addressing Control
Critical projects are completed much earlier than
otherwise possible because PL/M 286, a structured
high-level language, increases programmer
productivity.
The PL/M 286 compiler uses the SMALL, COMPACT,
MEDIUM, and LARGE controls to generate optimum
addressing instructions for programs. Programs
of any size can be easily modularized into
"subsystems" to exploit the most efficient memory
addressing schemes. This lowers total memory requirements and improves run-time execution of
programs.
Lower Development Cost
Increases in programmer productivity translate immediately into lower software development costs because less programming resources are required for a
given programmed function.
Code Optimization
Increased Reliability
The PL/M 286 compiler offers four levels of optimization for significantly reducing overall program size.
PL/M 286 is designed to aid in the development of
reliable software (PL/M 286 programs are simple
statements of the program algorithm). This substantially reduces the risk of costly correction of errors in
-Combination or "folding" of constant
expressions; and short·circuit evaluation of
Boolean expressions
3-62
AFN-00643B
PL/M 286 SOFTWARE PACKAGE
systems that have already reached full production
status, as the more simply stated the program is, the
more likely it is to perform its intended function.
Cost-Effective Alternative to
Assembly Language
Programs written in PL/M tend to be saitdocumenting, thus easier to read and understand.
This means it is easier to enhance and maintain
PL/M programs as the system capabilities expand
and future products are developed.
PL/M 286 programs are code efficient. PLIM 286
combines all of the benefits of a high-level language
(ease of use, high productivity) with the ability to
access the iAPX 286 architecture, This includes language features for control of the iAPX 286 protection
mechanism. Consequently, for the development of
systems software, PLIM 286 is the cost-effective alternative to assembly language programming.
SPECIFICATIONS
Documentation Package
Operating Environment
PL/M 286 User's Guide
Easier Enhancements and Maintenance
Intel Microcomputer Development System (Series
III/Series IV)
ORDERING INFORMATION
SUPPORT:
Part Number
Description
iMDX 323
PL/M 286 Software Package
Hotline Telephone Support. Software Performance
Report (SPR). Software Updates. Technical Reports.
and Monthly Technical Newsletters are available.
Requires Software License
3-63
AFN-CKMI438
inter
VAX*/VMS* RESIDENT
iAPX-86/88/186
SOFTWARE DEVELOPMEN.T PACKAGES
•
Execut~s on DEC VAX· MInicomputer
under VMS· Operating System to
translate PUM-86, Pascal-86 and
ASM-86 Programs for iAPX-86, 88
and 186 Microprocessors.
• Packages include Pascal-86; PUM-86;
ASM-86; Link and Relocation Utilities;
OH-86 Absolute Object Module to
Hexadecimal Format Converter; and
Libra.ry Manager Program.
• Output linkable with Code Generated
on Intellec® Development Systems.
The VAX.NMS Resident Software Development Packages contain software development tools for the iAPX-86,
88, and 186 microprocessors. The package lets the user de~elop, compile, maintain libraries, and link and
locate programs on ~ VAX. running the VMS operating system. The translator output is object module compatible with programs translated by the corresponding version of the translator on an Intellec Development System.
Three packages are available:
1. An ASM-86 Assembler Package which includes the Assembler, the Link Utility, the Locate Utility,
the absolute object to hexadecimal format conversion utility and the Library Manager Program.
2. A PLlM-86 Compiler Package which contains the PLlM-86 Compiler and Runtime Support Libraries.
3. A Pascal-86 Compiler Package which contains the Pascal-86 Compiler and Runtime Support Libraries.
The VAXIVMS resident development packages and the Inteliec Development System development packages
are built from the same technology base. Therefore, the VAXIVMS resident development packages and the
Intellec Developmerrl System development packages are very similar. .
Version numbers can be used to Identify features correspondence. The VAXNMS resident development
packages will have the same features as the Intellec Development System product with the same version
.
number.
Support for the iAPX-186 processor will be provided as an update to the iAPX-86, 88 software.
The object modules produced by the translators contain symbol and type information for programming
debugging using ICET• translators and/or the PSCOPE debugger. For final production version, the compiler
can remove this extra information and code.
·VAX, DEC, and VMS are trademarks of DIgital EqUipment Corporation
@INTEL CORPORATION. 1983
ORDER
3-64
MAY 1983
NUMBER:21~
VAX*IVMS* RESIDENT
VAX*-PL/M-86/88/186 SOFTWARE PACKAGE
• Executes on VAX*Minicomputer Under
the VMS* Operating System
iii
Supports 16~Bit Signed Integer and
32-Bit Floating Point Arithmetic in
Accordance with IEEE Proposed
Standard
• Code Optimization Assures Efficient
Code Generation and Minimum
Application Memory Utilization
• Bunt-In Syntax Checker Doubles
Performance for Compiling Programs
Containing Errors
• Easy-To-Learn Block-Structured
Language Encourages Program
Modularity
• Source Input/Object Output Compatible
with PL/M-86 Hosted on an Intellec®
Development System
• Produces Relocatable Object Code
Which is Linkable to All Other Intel 8086
Object Modules, Generated on Either a
VAX* or Intellec® Development Systems
• ICE™, PSCOPE Symbolic Debugging
Fully Supported
Like its counterpart for MCS®-80/85 program development, and Intellec® hosted IAPX-86 program development, VAX-PL/M-86 is an advanced, structured high-level programming language. The VAX-PLlM-86
compiler was created specifically for performing software development for the Intel iAPX-86, 88, and 186
Microprocessors.
PL/M is a powerful, structured, high-level system implementation language In which program statements can
naturally express the program algorithm. This frees the programmer to concentrate on the logic of the
program without concern for burdensome details of machine or assembly language programming (such as
register allocation, meanings of assembler mnemonics, etc.).
The VAX-PLlM-86 compiler efficiently converts free-form PLiM language statements into equivalent
iAPX-86/88/186 machine instructions. Substantially fewer PLiM statements are necessary for a given application than if it were programmed at the assembly language or machine code level.
The use Qf PLiM high-level language for system programming, instead of assembly language, results in a high
degree of engineering productivity during project development. This translates into significant reductions in
initial software development and follow-on maintenance costs for the user.
'VAX, DEC. and VMS are trademarks of Digital Equipment Corporation
3-65
AFN·OO680C
VAX·NMS· RESIDENT
VAX*-PASCAL-86/88 SOFTWARE PACKAGE
• Executes on VAX· Minicomputer Under
the VMS· Operating System
• Strict Implementation of ISO Standard
Pascal
• Produces Relocatable Object Code
Which Is Linkable to All Other Intel 8086
Object Modules, Generated on Either a
VAX· or Intellec® Development Systems
• Useful Extensions Essential for Microcomputer Applications
• Separate Compilation with TypeChecking Enforced Between Pascal
Modules
• ICE™, PSCOPE Symbolic Debugging
Fully Supported
• Compiler Option to Support Full RunTime Range-Checking
• Implements REALMATH for Consistent
and Reliable Results
• Source Input/Object Output
Compatible with Pascal-86 Hosted on a
Intellec Development System
• Supports iAPX-86/20, 88/20 Numeric
Data Processors
VAX-PASCAL-86 conforms to and implements the ISO Pascal standard. The language is enhanced to
support microcomputer applications with special features, such as separate compilation, interrupt
handling and direct port I/O. Other extensions include additional data types not required by the standard
and miscellaneous enhancements such as an allowed underscore in names, an OTHERWISE clause in
CASE construction and so forth. To assist the development of portable software, the compiler can be
directed to flag all non-standard features.
The VAX-PASCAL-86 compiler runs on the Digital Equipment Corporation VAX under the VMS
Operating System A well-defined I/O interface is provided for run-time support. This allows a userwritten operating system to support application programs on the target system as an alternate to the
development system environment. Program modules compiled under PASCAL-86 are compatilble and
linkable with modules written in PUM-86, and ASM-86. With a.complete family of compatible programming languages for the iAPX-86, 88, and 186 one can implement each module in the language most
appropriate to the task at hand.
'VAX, DEC, and VMS are trademarks of Dlgllal Equipment Corporation
3-66
AFN-0068OC
VAX*/vMS* RESIDENT
VAX*-iAPX-86/88/186 MACRO ASSEMBLER
• Executes on VAX· Minicomputer Under
The VMS· Operating System
• "Strongly Typed" Assembler Helps
Detect Errors at Assembly Time
• Produces Relocatable Object Code
Which Is Linkable to All Other Intel
iAPX-86/88/186 Object Modules,
Generated on Either a VAX· or Intellec®
Development Systems
• High-Level Data Structuring Facilities
Such as "STRUCTURES" and
"RECORDS"
• Over 120 Detailed and Fully Documented
Error Messages
• Powerful and Flexible Text Macro Facility
with Three Macro Listing Options to Aid
Debugging
• Produces Relocatable and Linkable
Object Code
• Source Input/Object Output Compatible
with ASM-86 hosted on an Intellec
Development System
• Highly Mnemonic and Compact
Language, Most Mnemonics Represent
Several Distinct Machine Instructions
VAX-ASM-86 is the "high-level" macro assembler for the iAPX-86/88/186 assembly language. VAX-ASM-86
translates symbolic iAPX-86/88/186 assembly language mnemonics into iAPX-86/88/186 relocatable
object code.
VAX-ASM-86 should be used where maximum code efficiency and hardware control is needed. The
iAPX-86/88/186 assembly language includes approximately 100 instruction mnemonics. From these few
mnemonics the assembler can generate over 3,800 distinct machine instructions. Therefore, the software
development task is simplified, as the programmer need know only 100 mnemonics to generate all
possible iAPX-86/88/186 machine instructions. VAX-ASM-86 will generate the shortest machine instruction
possible given no forward referencing or given explicit information as to the characteristics of forward
referenced symbols.
VAX-ASM-86 offers many features normally found only in high-level languages. The iAPX-86/88/186
assembly language is strongly typed. The assembler performs extensive checks on the usage of variable
and labels. The assembler uses the attributes which are derived explicity when a variable or label is first
defined, then makes sure that each use of the symbol in later instructions conforms to the usage defined for
that symbol. This means that many programming errors will be detected when the program is assembled,
long before it is being debugged on hardware.
·VAX, DEC. and VMS are trademarks of Ol91tal Equipment Corporatlon
3-67
AFN-0068OC
VAX*IVMS*RESIDENT
VAX*-LIB-86
• Executes on VAX* Minicomputer Under
the VMS* Operating System
• Libraries Can be Used as Input to
VAX*-LINK-86.Which Will Automatically
Link Modules from the Library that
Satisfy External References in the
Modules Being Linked
• VAX*-LIB-86 is a Library Manager
Program which Allows You to:
Create Specifically Formatted Files to
Contain Libraries of Object Modules
Maintain These Libraries by Adding or .
Deleting Modules
Print a Listing of the Modules and
Public Symbols in a Library File
• Abbreviated Control Syntax
Libraries aid in the job of building programs. The library manager program VAX-LlB-86 creates and
maintains files containing object modules. The operation of VAX-UB-86 is control/ed by commands to
indicate which operation VAX-LlB-86 is to perform. The commands are:
CREATE:
ADD:
DELETE:
LIST:
EXIT:
creates an empty library file
adds object modules to a library file
deletes modules from a library file
lists the module directory of library files
terminates the LlB-86 program and returns control to VMS
When using object libraries, the linker will call only those object modules that are required to satisfy external
references, thus saving memory space.
VAX-OH-86
• Facilitates Preparing a file for Loading
by $ymbolic Hexadecimal Loader (e.g.
iSBC™ Monitor SDK-86 Loader), or
Universal PROM Mapper
• Executes on VAX* Minicomputer Under
the VMS* Operating System
• Converts an iAPX 86/88/186 Absolute
Object Module to Symbolic
Hexadecimal Format
• Converts an Absolute Module to a More
Readable Format that can be Displayed
on a CRT or Printed for Debugging
The VAX-OH-86 utility converts an 86/88 absolute object module to the hexadecimal format. This conversion
may be necessary for later loading by a hexadecimal loader such as the iSBC 86/1·2 monitor or the Universal
PROM Mapper. The conversion may also be made to put the module in a more readable format that can be
displayed or printed.
The module to be converted must be in absolute form; the output from VAX-LOC-86 is in absolute format.
'VAX, VMS are trademarks of Digital Equipment Corporation.
3-68
AFN·OO68QC
intJ
VAX*IVMS*RESIDENT
VAX*-LINK-86
• Automatic Generation of a Summary
Map Giving Results of the LINK-86
Process
• Executes on VAX* Minicomputer Under
the VMS* Operating System
• Automatic Combination of Separately
Compiled or Assembled 86/88/186
Programs Into a Relocatable Module,
Generated on Either a VAX or an Intellec®
Development System
• Abbreviated Control Syntax
• Relocatable modules may be Merged into
a Single Module Suitable for Inclusion in
a Library
• Automatic Selection of Required
Modules from Specified Libraries to
Satisfy Symbolic References
• Supports "Incremental" Linking
• Supports Type Checking of Public and
External Symbols
• Extensive Debug Symbol Manipulation,
allowing Line Numbers, Local Symbols,.
and Public Symbols to be Purged and
Listed Selectively
VAX-lINK-86 combines object modules specified in the VAX-lINK-86 input list into a single output module.
VAX-lINK-86 combines segments from the input modules according to the order in which the modules are
listed.
'
VAX-lINK-86 will accept libraries and object modules built from VAX-PLlM-86, VAX-PASCAL-86, VAX-ASM86, or any other Intel translator generating 8086 Relocatable Object Modules, such as the Series III resident
translators.
Support for incremental linking is provided since an output module produced by VAX-lINK-86 can be an
input to another link. At each stage in the incremental linking process, unneeded public symbols may be
purged.
VAX-lINK-86 supports type checking of PUBLIC and EXTERNAL symbols reporting a warning if their
types are not consistent.
VAX-lINK-86 will link any valid set of input modules without any controls. However, controls are available
to control the output of diagnostic information in the VAX-lINK-86 process and to control the content of
the output module.
VAX-lINK-86 allows the user to create a large program as the combination of several smaller, separately
compiled modules. After development and debugging of these component modules the user can link them
together, locate them using VAX-LOC-86 and enter final testing with much of the work accomplished.
·VAX, DEC, and VMS are trademarks of Digital EqUipment Corporation
3-69
AFN·OO8IOC
VAX*/VMS*RESIDENT
VAX*-LOC-86
• Executes on the VAX* Minicomputer
Under the VMS* Operating. System
• Abbreviated Control Syntax
• Automatic and Independent Relocation
of Independent Relocation of Segments.
Segments May be Relocated to Best
Match Users Memory Configuration
• Automatic Generation of a Summary
Map Giving Starting Address, Segment
Addresses and Length, and Debug
Symbols and their Addresses
• Extensive Debug Symbol Manipulation,
Allowing Line Numbers, Local Symbols,
and Public Symbols to be Purged and
Listed Selectively
• Extensive Capability to Manipulate the
Order and Placement of Segments in
8086/80$8 Memory
ReJocatability allows the programmer to code programs or sections of programs without having to know the
final arrangement of the object code in memory.
VAX-LOC-B6 converts relative addresses in an input module in iAPX-B6/BB/1B6 object module format to
absolute addresses. VAX-LOC-B6 orders the segments in the input module and assigns absolute addresses
to the segments. The sequence in which the segments in the input module are assigned absolute
addresses is determined by their order in the input module and the controls supplied with the command.
VAX-LOC-B6 will relocate any valid input module without any controls. However, controls are available to
control the output of diagnostic information in the VAX-LOC-B6 process, to control the content of the
output module, or both.
The program you are developing will almost certainly use some mix of random access memory (RAM),
read-only memory (ROM), and/or programmable read-only memory (PROM). Therefore, the location
of your program affects both cost and performance in your application. The relocation feature allows you to
develop your program and then simply relocate the object code to suit your application.
SPECIFICATIONS
Documentation Package
Operating Environment
iAPX-B6, BB Development Software Installation
Manual and User's Guide for VAXNMS, Order
number 121950-001
Required Hardware
VAX' 11/7BO, 11/7B2, 11/750, or 11/730
9 Track Magnetic Tape Drive, 1600 BPI
Shipping Media
9 Track Magnetic Tape 1600 bpi
Required Software
ORDERING INFORMATION
-VMS Operating System V3.0 or Later. All of the development packages are delivered as unlinked VAX object code which can be linked to VMS as designed for
the system where the development package is to be
us",d. VMS command files to perform the link are
provided.
Part Number Description
iMDX-341VX
VAX-ASM-86, VAX-LiNK-B6, VAXLOC-B6, VAX-LlB-B6, VAX-OH-86,
Package
iMDX-343VX VAX-PLM-B6 Package
IMDX-344VX VAX-PASCAL-B6 Package
REQUIRES SOFTWARE LICENSE
'VAX, DEC, and VMS are trademarks of Digital Equipment Corporation
3-70
AFN-0068OC
iSDM™ 86
SYSTEM DEBUG MONITOR
• Supports application access to ISIS-II
files
• Supports target system debugging 10r
iSBC® liAPX 86,88,186 and 188-based
applications
• Provides interactive debugging
commands including single-step code
execution and symbolic displays of
results
• Supports 8087 Numeric Processor
Extension (NPX) for high-speed math
applications
• Allows building of custom commands
through the Command Extension
Interface (CEI)
• Provides program load capability from
an Intellec® Development System
• Contains configuration facilities which
allow an applications bootstrap from
iRMX™ 86 and 88 file compatible
peripherals
• Modular to allow use from an Intellec
Development System or from a stlJndalone terminal
The Intel iSDMTM 86 System Debug Monitor package contains the necessary hardware, software, cables, EPROMs
and documentation required to interface, through a serial or parallel connection, an iSBC® 86/05, 86/12A, 86/14,
86/30,88/25,88/40,88/45,186/03,186/51,188/48, or iAPX 86, 88,186 or 188 target system to an MDS 800, Series
II or Series IIIlntellec® Microcomputer Development System for execution and interactive debugging of applications
software on the target system. The Monitor can: load programs into the target system; execute the programs instruction by instruction or at full speed; set breakpoints; and examinelmodify CPU registers, memory content, and other
crucial environmental details. Additional custom commands can be built using the Command Extension Interface
(CEI). The Monitor supports the OEM's choice of the iRMXTM 86 Operating System, the iRMX 88 Real-Time MUltitasking Executive or a custom system for the target application system. OEM's may utilize any iRMX 86,88 supported
target system peripheral for a bootstrap of the application system or have full access to the ISI8-11 files of the Intellec
System.
The following are trademarks of Intel Corporation and may be used only to describe Intel products" Intel, ICE, IMMX, lRMX, iSBe, Isex, ISXM, MUl TI8US, Multichannel and MULTIMODULE
Intel Corporation assumes no responsIbility for the use of any circuitry other than circuitry embodied In an Intel product. No other Circuit patent He.nses are Implied Information contained
heretn supercedes previously published specifICations on these deVices from Intel
© INTEL CORPORATION. 1983
3-71
October. 1983
Order Number: 230812-001
inter
iSDM™ 86
FUNCTIONAL DESCRIPTION
features included are: bootstrap of application software;
selective execution of program modules based on breakpoints or single stepping requests; examination, modification and movement of memory contents; examination
and modification of CPU registers, including NPX registers. All results are displayed in clearly understandable
formats. Refer to Table 1 for a more detailed list of the
iSDM 86 monitor commands.
Overview
The iSDM 86 Monitor extends the software development
capabilities of the Intellee system so the user can effectively develop applications to ensure timely product availability.
The iSDM 86 package consists of ,four parts:
Numeric Data Processor Support
• The loader program
Arithmetic applications utilizing the 8087 Numeric Processor Extension (NPX) are fully supported by the iSDM
86 Monitor. In addition to executing applications with the
full NPX performance, users may examine and modify
the NPX's registers using decimal and real number format.
• . The iSDM 86 Monitor
• The Command Extension Interface (CEI)
• The ISIS-II Interface
The user can use the ISDM 86 package to load programs
into the target system from the development system,
execute programs in an instruction-by-instruction manner,
and add custom commands through the command extension interface. The user also has the option of using
just the iSDM 86 Monitor and the CEI in a stand-alone
application, without the use of an Intellec development
system.
This feature allows the user to feel confident that correct
and meaningful numbers are entered for the application
without having to encode and decode complex real,
integer, and BCD hexadecimal formats.
Command Extension Interface (CEI)
The Command Extension Interface (CEI) allows the addition of custom commands to the i8DM 86 Monitor commands. The CEI consists of various procedures that can
be used to generate custom commands. Up to three
custom commands (or sets of commands) can be added.
Powerful Debugging"Commands
The iSDM 86 Monitor contains a powerful set of como.
mands to support the debugging process. Some of the
Table 1. Monitor Commands
Command
B
Function
Bootstrap application program from target systems peripheral device
C
Compare two memory blocks
D
Display contents of memory block
E'
Exit from loader program to ISIS-II Interface
F
G
Find speCified constant in a memory block
I
Execute application program
Input and display data obtained from input port
L'
Load absolute Intellec® object'file into target system memory
M
Move contents of memory block to another location
N
Display and exec::ute single instruction
0
Output data to output port
P
Print values of literals
R'
Load and execute absolute Intellec® object file in target system memory
S
Display and (optionally) modify contents of memory
T'
Transfer block of memory'to anlntellec® file
U,V,W
X
User defined custom commands extensions
Examine and (optionally) modify CPU and NPX registers
• Commands require an attached Series II/Series III.
3-72
inter
iSDM™ 86
of the target system. Pre-configured EPROM-resident
monitors are supplied by Intel for the iSBC 86105, 86/12A,
86/14,86/30,88/45,186/03,186/51, and 188/48 boards.
The monitor must be configured by the user for the iSBC
88/25, 88/40 boards and for other iAPX 86, 88, 186, 188
applications. iRMX 86 and iRMX 88 system users may
use the configuration facilities to include the iAPX 86,
88 Bootstrap Loader (V5.0 or newer) in the monitor.
to the monitor without programming new EPROMs or
changing the monitor's source code.
iSiS-ii Interface
The ISIS-II interface consists of libraries which contain
interlaces to ISIS-II 1/0 calls. A program running on an
iAPX 86, 88, 186 or 188-based system can use the ISIS-II
interlace and access the individual ISIS-II 110 calls. The
interlace allows the inclusion of these calls into the program; however, most of the calls require a Series III
Series III system. Table 2 contains a summary of the
major 1/0 calls and parameters.
Variety of Connections Available
The physical interface between the Intellec Microcomputer Development System and the target system can'
be established in one of three ways. The systems can
be connected via a serial link, a parallel link or a fast
paraliellink. The fast parallel link requires the use of an
iSBC 108(A), 116(A), 517 or 5191/0 expansion board in
the Inteliec system and is only available for connections
with the Series IIISeries III systems. The cabling arrangement is different depending upon the development system being used. Figure 1 displays the cable connections
needed between an Inteliec Series III system and a target
system for a serial interlace.
Program Load Capability
The iSDM 86 loader allows the loading of iAPX 86, 88,
186 or 188-based programs into the target system. It executes on a Intellec Microcomputer Development System
and communicates with the target system through a
serial or a parallel load interlace. If a Series IIISeries III
system containing an Intel 1/0 expansion board is being
used, the board can be used as a fast parallel load interface, freeing up the UPP port for application use.
The iSDM 86 Monitor does not require the use of a development system. The monitor can be used by simply
attaching a stand-alone terminal to the target system.
Figure 1 also displays the cable connections needed for·
this arrangement.
Configuration Facility
The monitor contains a full set of configuration facilities
which allow it to be carefully tailored to the requirements
Table 2. Routines for ISIS·II Services Available to Target System Applications
Target System Function
Routine
ATTRIB
Changes to ISIS-II file attribute
CI
Returns a character input from the console
CO
Transfers a character for console output
CLOSE
Clo~es
DELETE
Deletes the specified ISIS-II file
DQ$CFG
Returns information about monitor's communication link and type
an opened ISIS-II file
ERROR
Displays an error message on the Intellec@ console
EXIT
Exits to the target system monitor
LOAD
Loads target system memory with ISIS-II object code file
OPEN
Opens an ISIS-II file for access
READ
Reads up to 4096 bytes from an ISIS-II file to memory
RENAME
Renames an ISIS-II disk file
SEEK
Seeks to the specified ISIS-II file location
WRITE
Writes up to 4096 bytes from memory to an ISIS-II file
3-73
iSDMTM 86
SERIAL 110
PORT
A
fo
/'
I
APPROPRIATE
ISBC· BOARD
OEM RS232C
CABLE
INTELLEC® SERIES '"
DEVELOPMENT SYSTEM
Figure 1. Typical iSDM ™ 86 Serial Connection Environment
SPECIFICATIONS
• For Serial link:
- 8251A USART or 8274 Multiprotocol Serial Controller, and 8253/4 or 80130 or iAPX 186/188 timer,
or
Development System Environment
The Intellec Microcomputer Development System may
be utilized for application program development and, if
used, requires the following to support the iSDM 86
package:
- 82530 Serial Communications Controller, including
82530 timer
Hardware
• 48 Kbytes memory
• Supported iSBC Microcomputers:
• Double density or single density diskette subsystem
iSBC 86/05
Single Board Computer
• ISIS-II Operating System and associated language
translators
iSBC86/12A
iSBC 86/14
Single Board Computer
iSBC 86/30
Single Board Computer
iAPX 86, 88, 186, 188 TARGET SYSTEM
ENVIRONMENT
To support the iSDM 86 package, the target system must
contain the following:
• 2K read-write memory beginning at location OH
• 16K read-only memory beginning at location FCOOOH
Single Board Computer
iSBC 88/25
Single Board Computer
iSBC 88/40
iSBC 88/45
Single Board Computer
iSBC 186/03
Single Board Computer
iSBC 186/51
Single Board Computer
iSBC 188/48
Single Board Computer
Single Board Computer
• Supported iSBX MULTIMODULETM Boards:
iSBX 350 Parallel I/O MULTIMODULE Board
• For Parallel link:
- 8255A Programmable Peripheral Interface
iSBX 351 Serial I/O MULTIMODULE Board
3-74
inter
iSDMTM 86
System Monitor EPROMs:
iSDM™ 86 Package Contents
Cables:
Microcomputer
1-
Parallel I/O Cable (upload/download)
iSBC®86/05
2-
RS232 Cables
iSBC® 86/12A
Adaptors:
iSBC® 86/14
1-
Parallel Status Adaptor
iSBC® 86/30
1-
Parallel Adaptor
iSBC® 88/45
I/O Drivers and Terminators:
iSBC® 186/03
4-
Pull-up Resistor Packs
iSBC® 186/51
4-
Pull-up/down Resistor Packs
iSBC® 188/48
4-
Line Driver Packs
Single Density, ISIS Compatible
1-
Double Density, ISIS Compatible
Description
iSDM 86
Intellec to target system interface
and target system monitor, suitable
for use on iSBC 86, 88, 186, 188
computers, or other iAPX 86, 88,
186, 188 microcomputers. Package
includes cables, EPROMs, software and operator manual.
The iSDM 86 package includes
SPR Service for, 90 days after
shipment.
As with all Intel Software, purchase
of any of these options requires
execution of a standard Intel
Master Software License.
iSDM 86 RO
Object Software
iSDM 86 BSR
Machine Readable Source
Two 2764 EPROMs
Two 2764 EPROMs
Two 2764 EPROMs
146165-001 - iSDM 86 System Debug Monitor Reference Manual
ORDERING INFORMATION
Part Number
Four 2732A EPROMs
Reference Manual (Supplied):
Interface and Execution Software Diskettes:
1-
EPROM
3-75
iSDM™ 286
iAPX 286 SYSTEM DEBUG MONITOR
,
• Development support of iSBC® 286·and
iAPX 286·based applications
• Supports 80287 Numeric Processor
Extension (NPX) for high-speed math
applications
• Real Address Mode (RAM) and
Protected Virtual Address Mode
(PVAM) support
• Universal Development Interface (UDI)
support via development system
connection
• Underlying debugging tool for
iRMX™ 286R applications
• Program load capability from Intellec®
Series III Development Systems
• Bootstrap Loader for iRMX™ 286R, 86,
and 88 file compatible peripherals
• iAPX 286 single step operation allowed
The Intel iSDMTM 286 System Debug Monitor package contains the necessary hardware, software, cables,
EPROMs, and documentation required to interface in iSBC® 286 board or iAPX 286 component applications to
an Intell'ec® Series III through a high-speed link. The System Debug Monitor supports an OEM's choice of .the
iRMXTM 286R Real-Time Multitasking Operating System or custom operating system, with debugging tools to examine CPU registers, memory content, CPU descriptor tables, and other crucial environmental details. The Monitor
also allows programs to access files on the development system via the internal UDI support and the serial communication link .
..
3-76
iSDM™ 286
FUNCTIONAL DESCRIPTION
Single-step CPU operation
Overview
Change between Real Address Mode and Protected
Virtual Address Mode
The iSOM 286 System Oebug Monitor provides programmers of iAPX 286-based applications with the debugging tools needed to test new applications ranging
from single-user systems to complex operating
systems. Programmers are given direct access to both
the Real Address (ram) and Protected Virtual Address
(pvam) Modes of the CPU via a simple terminal interface, or via an Intellec Series'" Oevelopment System.
data structures Into clearly understandable displays.
ThiS display gives programmers a formatted view of
CPU registers such as LOTs, GOTs, lOTs, Segment
Selectors, and Task State Segments - not Just a senes
of unconnected digits.
Universal Development Interface
Numeric Data Processor Support
Any iRMX 86, Series III, or other UOI-based application
can be supported by the iSOM 286 Monitor. The Monitor
emulates many of the UOI calls (ram or pvam), and
passes all requests for a file system to the host development station. UOI applications such as compilers and
other programs available from Independent Software
Vendors can be tested in the target iAPX 286 environment Immediately.
In addition to executing 80287 Numenc Processor Extension (NPX) applications with full NPX performance,
programmers may examine and modify NPX registers
using decimal and real number format. Any locallon In
memory known to contain numenc values in standard
real format (IEEE P754) may be examined or modified
using normal decimal notation. In thiS manner programmers may feel confident that correct and meaningful
numbers are available to applications without having to
encode and decode complex real, integer, and BCO
hexadecimal formats.
Formatted Displays
The 150M 285 MonItor formats all iAPX 286 pre·defined
Powerful. Debugging Commands
A powerful set of user functions includes commands to:
Examine and Modify CPU Registers
High-Speed Serial Connection
Examine, Modify, and Move memory locations
Target application hardware is connected to the development system via a serial link cap~ble of 19.2K baud. •
All control operations and UOI file manipulations occur
over this link through the cables supplied. As shown in
Figure 1, the serial link is supported by the iSBC 86
USART port of the ~evelopment system.
Symbolic reference to variable names
Find and compare memory contents
Set program breakpoints
Bootstrap load application software
SERIAL I/O
PORT
,sec
286/10
Figure 1. Typical i5DM Til 286 Environment
AFN-01B04A
3-77
iSDM™ 286
SPECIFICATIONS
Development System Environment
Intellec MOS Series III with 64 KBytes.
Target System Environment
Any iAPX 286 system with 8274 (non-vectored mode)
serial link and 8254 timer, such as the iSBC 286110 Single
Board Computer. The 8259A interrupt controller is
optional.
EPROMs are supplied for locations OFF8000H through
OFFFFFFH.
ORDERING INFORMATION
Part Number
Description
SDM 286
iSBC 286 and iAPX 286 System Debug
Monitor package including cables,
EPROMs, software, and operator
manual.
Also available with the iSBC 286/10
ES Kit or with the iRMX 286R Kit.
A Software License Agreement
must be or have been executed.
SDM 286 BSR
Machine Readable source for SOM
286.
Special source code license agreement is required in addition to Soft\ ware License Agreement.
AFN·1804A
3-78
intJ
iRMX™
LANGUAGES
• Industry-standard languages and
utilities for developing applications on
iRMX-based systems. Includes
FORTRAN, Pascal, C, BASIC, PL/M,
assembler, text editor
• Complete set of utilities to create and
manage object modules
• Mix languages on single application
system with VDI standard
• Intel 8087 math coprocessor support
• Worldwide post-sales service and
support organization
;~~~~~~~ trademark of Bel! Laboratones
3-79
Because the high-level languages are
actually resident on the iRMX-based
system, OEMs can pass application
software directly on to end users. End
users may then tailor the OEM's system
to better meet application needs by writing programs uSing the same languages.
Language-Independent
Application Development
Intel's Universal Run-time Interface
(URI) and Object Module Format (OMF)
enable several users to write different
modules of an application, in different
languages, then link them together.
Full Language Support
for iRMXTM -Based Systems
Intel's iRMX™ 86 and 286R-based systems are completely supported by a wide
variety of popular languages and utilities
with which to build fast, real-time,
multi-tasking applications. Included are
the latest versions of FORTRAN, Pascal,
BASIC, C, PUM and Assembler for
Intel's iAPX 86 and iAPX 286 processors. Previously developed applications using any of these languages port
easily to iRMX-based systems with
minimal source code modifications.
In addition to the wealth of languages
available, iRMX-based systems are complemented by utilities with which to
create and manage object modules. This
latitude in configurability allows programmers to team their efforts in order to
achieve a shorter development time than
would otherwise be possible.
The OMF provides users with the ability
to mix languages on a single application
system, affording the luxury of choosing
exactly the right language tools for
specific pieces of the application, rather
than compromising specialized tasks for
the sake of one, project-wide language.
iRMX languages are fully compatible
with the Intel Series III Development
System, should the ilser choose to develop
applications on a specialized development system. Applications are easily
moved to the final target system for test,
debug and· minor redevelopment.
Fast, Lean Programs
For Rapid Processing
The iRMX language products enable
programmers to write the smallest, fastest programs available in high-level languages, due to the compiler's superior
ability to optimize code.
It is also possible to make iRMX
operating system calls directly from
FORTRAN, PASCAL and PUM. This
means that application developers can
take full advantage of the iRMX multiiasking capability, whereby multiple
applications execute concurrently on
the operating system. Multi-tasking, a
requirement of most real-time systems, is
sometimes as necessary in application
software development as in an operating
system environment.
3-80
Standardized REALMATH
Support
All the iRMX languages (except BASIC
and C) support the REALMATH floating
point standard. This ensures universal
consistency in numeric computation
results and enables the user to take
advantage of the Intel iAPX 86/20 and
iAPX 88/20 Numeric Data Processor or
iSBC® 337 MULTIMODULpM boards,
which boost performance two to four
times over that possible on a minicomputer.
All the Utilities Needed to
Link Languages
Utilities for iRMX operating
systems include Intel's own
EDIT, LINK, LOCATE
and LIBRARIAN. The
iRMX EDIT program
meets the needs of both
novice and sophisticated
users with powerful lineoriented editing facilities.
Using the iRMX LINK program, users
may link individually compiled object
modules to form a single; relocatable
object module. This provides the ability
to merge work from several programmers
into one cohesive application system.
The iRMX LOCATE utility maps
relocatable object code into the processor
memory segments, allowing user definition of module/memory type allocation.
For example, often-used portions of an
application may be mapped to (P)ROM.
The LIBRARIAN object code library
manager affords easy creation, collection
and maintenance of related object code to
reduce the overhead of separately maintained modules.
I
I
TARGET
Finally, the iRMX Assembler for the
iAPX 86 and iAPX 286 processors generate extremely efficient code and invoke
8086/8087 machme instructions,
iRMXTM 86 Pascal
iRMX Pascal meets the proposed ISO
language standard and implements
several mIcrocomputer extensions. A
compile-time option checks conformance
to the standard, making it easy to write
uniform code. Industry-standard specifications contribute to portability of application programs and provide greater
reliability.
.
iRMX 86 Pascal supports extensions,
such as an interrupt-handler and direct
port I/O extension, that allow programs
to be written specifically for microcomputers. Separate module compilation
allows linkage of Pascal modules with
modules written in other high-level
languages.
For more information on iRMX 86 Pascal see the Pascal 86 Software Package
data sheet (Intel order number 400670).
iRMXTM 86 FORTRAN
The iRMX 86 FORTRAN compiler provides total compatibility with FORTRAN
3-81
66 language standards, plus most new
features provided by the FORTRAN 77
language standard (the only significant
exception is complex numbers). iRMX
86 FORTRAN includes extensions specifically for microcomputer application
development. Programming is simplified
by relocatable object libraries, which
provide run-time support for execution
time activities.
.
iRMX 86 FORTRAN supports the 8087
math coprocessor for the most powerful
microcomputer solution available in
number-intensive applications. For more
information on iRMX 86 FORTRAN see
tbe FORTRAN 86 Software Package
data sheet (Intel order number 400630).
iRMX™ 86 PL/M
PLiM offers full access to micro com• puter architecture while simultaneously
offering all tbe benefits of a high-level
language. Invented by Intel in 1976,
PLiM 80 was the first microcomputerspecific; block-structured, high-level
language available. Since then, tbousands of users have generated
code for millions of microcomputerbased systems using PLiM 80 and
PLiM 86.
Software written for 8-bit
processors (PLIM 80)
are easily ported to the
more powerful 16-bit
(PLIM 86) environment. The
same portability will be available
future VLSI.
For more information about iRMX 86
PLiM see tbe PLiM 86/88 Software
Package data sheet (Intel order number
210689).
segmentation models, enabling applications to be written efficiently. The iRMX
86 C compiler combines assembly
language efficiency witb high-level language convenience; it can manipulate on
a machine-address level while maintaining tbe power and speed of a structured
language.
The iRMX 86 C compiler affords easy
portability of existing C programs to
iRMX-based systems. For more information on tbe iRMX C compiler see tbe
iRMx 86 C Software Package data sheet
(Intel order number 210768).
iRMXTM 86 Text Editor
The iRMX 86 Text Editor is screenoriented, menu-driven and easy to learn.
Guided by tbe menu of commands always before him, tbe user can edit text
and programs easily and efficiently.
iRMX 86 Text Editor allows tbe simultaneous edit of two files. This allows
easy trans(erral of text between files and
use of existing material in tbe creation of
new files. Creating macros, strings of
freqnently-used commands, is also very
simple. The editor' 'remembers" tbe
selected commands and allows the user to
re-use them repeatedly.
iRMX™ 86 BASIC
Intel's offering of Microsoft BASIC is a
standardized version of tbe most popular
high-level language in the world. Existing BASIC programs are easily ported to
iRMX-based systems. BASIC is an excellent pass-through language by which
an OEM can offer customers the ability
to wri te and modify their own
applications.
iRMX™ 86 C Compiler
l'
The popular new programming language,
C (Mark William's Company version), is
fully supported on iRMX-based systems.
iRMX 86 C offers both small and large
Intel Has Total Solutions
for Real-Time Systems
iRMX 86 and 286R are the fastest, most
powerful operating systems available for
multi-tasking, multi-user, real-time
applications. Complemented by a wide
range of industry-standard languages and
utilities, 'the iRMX-based systems are
highly flexible and configurable .
Application development for iRMXbased systems is possible at tbe board or
tbe system level. OEMs can integrate
functionality at the most profitable level
of product design, using one system for
both development and target use. Intel's
choice of industry standard high-level
languages enables the end user to extend
OEM-provided functionality even
further, if desired.
Who is better qualified to write and supply software for Intel VLSI tban Intel?
Today you have the ability to tap into
hundreds of available application software packages, languages and utilities,
peripherals and controllers and
MULTIBUS® boards.
Tomorrow, and ten years down the road,
you will be able to tap into tbe latest,
high-performance VLSI - without losing
today's software i~vesttnent.
Worldwide Service
and Support
All iRMX systems are completely supported by Intel's worldwide staff of
trained hardware and software engineers.
iRMX Language customers receive a
warranty that includes Hotline Support,
Software Updates, and Subscription
Service.
Complete documentation is provided for
all operating system and application
software languages, as well as for system
hardware components. An Intel system is
not a collection of hardware and software
pieces as much as a cohesive whole that
is supported and serviced as such.
,-•-
~~iRMXLANGUAGES@---3-82
Specifications
Required Hardware
Required Software
• Any iAPX 861286 based or iSBC 861
286 based system including Intel's
System 86/300 and 286/300 family. In
addition, object code from the compilers will run on iAPX 88 based systems.
The lKMX 86 Operanng Syslem Rdea,e
5 or later including the nucleus, basic I/O
system, extended I/O system and human
interface
• I40KB of memory
The iRMX 286 Operating System Release 2 or later including the nucleus,
basic I/O system, extended I/O system
and human interface
• Two iRMX 86 compatible floppy disks
or one hard disk
• One 8" double density or 5.25" doubledensity floppy disk drive for distribution of software
• System console device
-Of-
Purchase of any RMX language requires
signing of Intel's OEM License
Agreement (OLA).
Ordering Information
Language
Order Code
Product Contents
Warranty
ASM86,
Utilities
RMX860
Two 8" disk and two 5.25" diskettes
Edit Reference Manual-143587
iAPX 86/88 FamIly Utilities User's
Guide-121616
Macro Assembler Operating Instructions
-121628
ASM 86 Language Reference Manual121703
8087 Support Library Reference Manual
-121725
90 days:
Pascal
RMX861
Two8" diskettes and two 5.25" diskettes
Pascal 86 User's Guide-121539
90 days:
Software Updates, Subscription Service,
Hotline Support
FORTRAN
RMX862
Two 8" diskettes and two 5.25" diskettes
FORTRAN 86 User's Guide-121570
90 days:
One 8" diskette and one 5.25" diskette
PLiM 86 User's Guide-121636
90 days:
PLiM
RMX863
Software Updates, Subscription Service,
Hotline Support
Software Updates, Subscription Service,
HotlIne Support
Software Updates, Subscription Service,
Hotline Support
TX Editor
RMX864
One 8" diskette and one 5.25" diskette
TX Screen Echter User's Guide-14541O
90 days:
Software Updates, SubscnptlOn Service
BASIC
RMX865
One 8" diskette and one 5.25" diskette
BASIC Reference Manual-121806
BASIC 86 User's Guide-121986
One 8" diskette and one 5.25" diskette
90 days:
Software Updates, Subscription Service
One 8" diskette and one 5.25" diskette
C Programming Language by
Kernighan and Ritchie (Prentice Hall)
C 86 Compiler User's Guide-122085
90 days:
C
RMX866
3-83
•
Software Updates, Subscription Service,
Hotline Support
intJ
iRMX™
• High performance, real-time, multitasking operating system for Intel's
861300 and 2861300 microcomputer
systems.
OPERATING
SYSTEMS
• Highly configurable, modular structure
for easy system expansion.
• Wealth of desigu facilities and industrystandard languages to support fast, easy
development.
• Application software portable to next
generation of Intel VLSI •
• Supported by Intel's post-sales software
support organization.
© INTEL CORPORATION, SEPTEMBER 1983
3-84
ORDER NUMBER' 230751-001
with tasks running on other boards, even
if they operate under different Intel oper
ating systems or microprocessors.
The Total Solution for the
Real-Time Application OEM
Intel's iRMXTII 86 and iRMX 286R
Operating Systems are real-time, multitasking, multiuser, multiprogramming
operating systems designed to support
high performance, time-critical applications such as factory automation, industrial control and communications networks. The iRMX operating systems
serve as optimized event-driven executives for managing and extending the
resources of Intel's 861300 and 286/300
systems in real-time applications where
high speed and low interrupt latency are
required. Added performance for demanding numeric-intensive tasks comes
from support of Intel's floating point
math coprocessors.
Comprised of modular layers, Intel's
iRMX operating systems are highly configurable, allowing the OEM to easily
customize the system to meet the needs
of target applications. In addition to
application customization, the iRMX
operating systems provide OEMs with
complete development capabilities. They
have systems debuggers, crash analyzers,
screen editors, utilities, and an Interactive Configuration Utility (ICU)everything the development engineer
needs to design and configure efficiently.
possible the utilization of the highperformance capabilities of Intel's iAPX
286 microprocessor for those demanding
high-speed applications.
Further accelerating processing power in
number-crunching and floating point
math applications is iRMX operating
system's support of Intel's math
coprocessors .
Modular Software for
Versatile, Easy Configuration
The iRMX operating systems shipped
with Intel's 86/300 and 286/300 hardware
systems are preconfigured at the factory
to support a standard board set; however,
the OEM can additionally configure or
Our 8087 numeric data processor in our
iRMX 86-based systems can perform
floating point operations four times faster
than competitive minicomputers with
hardware math processors. For even
greater performance, OEMs can select
the iAPX 286 and the 80287 coprocessor
working in tandem in iRMX 286R-based
systems.
A complete set of industry-standard
languages enables OEMs to take advantage
of existing application software which
further reduces development time.
Shaving months off development time is
a key advantage to the competitive OEM.
The superior price/performance ratio that
results from combining Intel's iRMX
operating systems and the System 300
family makes the choice clear: a more
competitive Intel micro-based system
over a more expensive minicomputerbased system.
Speed, the Name of the
Real-Time Game
Add More Processors for
More Power, More Speed
In a real-time system the computer must
respond to interrupts instantly; time is
always at a premium. Intel's iRMX
operating systems deliver superior realtime performance, thanks to ultra-fast
context switching, task synchronization
and memory-based message passing.
Need still more micro-muscle in your
application? In an iRMX-based system.
additional intelligent boards can be
added to enhance system throughput.
The iRMX 286R Operating System manages the resources of the 286/300 systems
in real-address mode. iRMX 286R makes
MUltiprocessing is possible due to the
hardware capabilities of Intel's System
300 MULTIBUS System Bus and the
software support provided by iMMX
800. Overall system performance and
flexibility can be greatly enhanced by
off-loading the main CPU with such intelligent llO boards as Intel's quad serial
communication controller, digital controller or Ethernet communications
controller.
With the iMMX™ 800 (MULTIBUSiIIl
, Message Exchange) software package,
the iRMX 86 and iRMX 286R Operating
Systems support a loosely-coupled
multiprocessing environment. Tasks running on one board may communicate
3-85
HUMAN
INTERFACE
USER APPLICATIONS
extend the operating system to meet
specific needs.
standard peripherals. You simply select
the ones you need.
The Interactive Configuration Utility
(ICU) is a built-in facility for assisting
the OEM in the configuration'process.
The lCU prompts the user for system
parameters and requirements, then builds
a command file to compile, assemble,
link, and locate necessary files.
Intel's iRMX operating systems are configurable by system layer and by system
call within each layer. Such flexibility
gives designers the ability to choose
software featores that best suit their application's size and functional requirements. The iRMX operating systems also
include I/O drivers for many of Intel's
MULTIBUS boards and industry-
The net results for the OEM: fast, easy
system configuration with quick timeto-marke~ benefits.
For customizing and extending your
iRMX system, Intel has provided all the
"hooks" necessary to make the job easy.
The iRMX 86 and iRMX 286R Operating Systems contain extendability features that enable the OEM to add custom
operating system calls, custom features,
and custom functionality to his application-at any time in the application's
life. The ability to add functions late in a
product's life is key to an OEM's competitive edge in a fast-changing market.
iRMX™ Operating System
has All the Fundamentals
Too!
The Human Interface function give
users and applications simple access to
the file and system management capabilities. Using the multiterminal support
provided by the Basic I/O system, the
Human Interface can support several
simultaneous users. For example,
multi-terminal support allows one person
to be using the iRMX Editor, while another compiles a FORTRAN or Pascal
program, while several others load and
access applications.
On-Target Development:
One System Does It All
The beauty of Intel systems lies in their
flexibility. Engineers developing an
iRMX-based target system can use the
same iRMX-based system in the development process; the development and
target systems are one in the same. The
bottom-line benefit is low entry-level
costs for the OEM.
On-target development contributes immeasurably to a shorter development
curve and decreased time-to-market,
since it isn't necessary to purchase and
learn separate development systems.
With Intel's iRMX-based system, one
system does it all.
In addition to multiprocessing, Intel's
iRMX operating systems have all the
basics you would expect to find in a
minicomputer operating system ...
capabilities such as multitasking,
mUltiprogramming, and multiterminal
support.
Multitasking requires a method of
managing the different processes of
an application and for allowing
these processes to communicate
with each other. The iRMX Nucleus provides these facilities plus
task scheduling. The Basic I/O
System provides users with the
system calls for direct management ofI/O devices needed for
real-time applications. The Extended I/O System adds a number
ofI/O management capabilities to
simplify access to files, such as
automatic buffering and synchronization ofI/O requests.
3-86
Tap into a Wide Range of
Languages and Utilities
An Intel iRMX-based system supports
many industry-standard and widely
available languages: FORTRAN 77,
Pascal (ISO Draft Standard) and PUM
compilers; Intel Assemblers, and popular
independent vendor products, such as
Microsoft's BASIC and Mark Williams'
Ccompiler.
iRMX operating systems also have a
An OEM who builds his product around
year increments after the initial 90-day
menu-dt~ver.,
ane of !nte! 's RMX -board systems is as-
'''fB-rran!y Hotline servkp- i~ available
sured of multi vendor hardware/software
alternatives and a future upgrade path. In
today's highly competitive markets, that
is the only kind of system to build.
separately to customers needing quick
response software support. All software
is completely documented, and users receive monthly technical reports, newsletters and access to the iRMX users
group and software libraries.
screen oriented text editor
and a varieLy of utilities for manipulating
object code to facilitate the development
process.
Multiple-language support is made
possible by a set of systems calls known
as the Universal Development Interface
(UOl) which enables the iRMX systems
to interface with many compilers and
language translators. UDI ensures that
users will be able to transport applications to future releases of iRMX operating systems as well as use language and
utilities of other software vendors that
support UDL (For more information on
Intel iRMX languages, see the iRMX
Language Fact Sheet)
Intel's Open Systems
Approach Means Freedom
to Grow
At Intel, we believe that systems need to
expand in order to meet the needs. of a
changing market; and that is how we
design our products.
Standards are the key to systems that are
open to future expansion, future technology and future markets.
Today, you'll have the ability to tap into
readily available application software
packages, languages, and utilities,
MULTIBUS boards, and peripherals.
Tomorrow, you will be able to tap into the
latest, high-performance VLSI without
sacrificing today's software investment.
Applications written on iRMX 86 (for
Intel's iAPX 86) are completely portable
to iRMX 286R running on Intel's
iAPX 286-based systems.
Not to be forgotten are the advantages of
starting from the systems level to begin
with. Intel has invested hundreds of
man-years in software and hardware development for its systems products. For
the OEM trying to meet a market window, time-to-market is much faster when
starting with a system instead of boards
or components. It makes good business
sense to let Intel provide the "microengine ", so you can concentrate on your
area of expertise and get to market
sooner!
Worldwide Service and
Support
The iRMX 86 Operating System is a
mature proven product with thousands of
installations at the component, board and
systems levels. Post-sales software support is available to Intel iRMX 86 and
iRMX 286R Operating Systems OEMs
in the form of software updates and
routine systems software maintenance.
Software support is extendable in one-
Intel's iRMX operating systems are
built from the inside-out with industry standards: UDI (Universal
Development Interface), R TI
(Runtime Interface), MULTIBUS
System Bus (IEEE 796), iMMX
800 Package (MULTIBUS multi
processing), Ethernet (IEEE
802.3), extended math format
(IEEE P754), and industry-standard
peripheral device interfaces.
iRMX users can also take advantage
of Intel's worldwide staff of trained
hardware and software engineers for
application design assistance. We offer
. complete training for operating system
.software and associated system
hardware, bringing OEM's up to speed
and helping get their products to market
quickly.
Intel, the Technology Leader
... With the Total Solution
Intel started the microprocessor revolution with the 4004 arid has been the
market leader with every generation of
advanced microprocessor VLSI since.
We not only invented the microprocessor
but MULTIBUS single board computers,
as well.
Intel's technology leadership has, by
necessity, extended from microprocessors into operating system
software. iRMX is recognized as the
industry standard real-time VLSI operating system.
It has evolved since 1978 utilizing the
experience of thousands of installations
to contribute to enhancing the performance and quality of the product.
OEMs can enhance their product's marketability by leveraging their value-added
on top of the solid foundation of an
iRMX -based Intel 300 microcomputer
system. Intel's solution offers the most
price/performance with the least risk to
progressive OEMs ... because we know
the real-time game from the inside out.
•
MX OPERATING
Specifications
Supported Software
Products
iRMX 860
iRMX 86 Development
Utilities Package including
the iAPX 86 and 88 Linker,
LOcator, Macro Assembler,
Librarian, and the iRMX 86
Editor
iSBC254
Bubble Memory System
iSBC534
4-Channel Terminal
Interface
iSBC544
Intelligent 4-Channel
Terminal Interface and
Controller
iRMX 86 Nucleus Reference Manual
(9803122-04)
.
iRMX 86 Terminal Handler Reference
Manual (143324-002)
iRMX 86 Debugger Reference Manual
(143323-002)
iSBX218
Flexible Disk Controller
iSBX350
Parallel Port (Centronix-type
Printer Interface)
iRMX 86 Basic I/O System Reference
Manual (9803123-05)
iRMX 861
Pascal 86/88 Compiler
iRMX 862
FORTRAN 86/88 Compiler
iSBX351
Serial Communications Port
iRMX 86 Loader Reference Manual
(143318-002)
iSBX270
CRT, Light Pen and
Keyboard Interface
iRMX 86 Extended I/O System
Reference Manual (143308-002)
iRMX 863
PUM 86/88 Compiler
iRMX 864
TX-Screen-Oriented Editor
iRMX 865
BASIC Interpreter
iRMX 866
C Compiler
iMMX 800 MULTIBUS® Message
Exchange software package
for iRMX 80, 86, 88, and
286 application systems
Supported Hardware
Products
iSBC· MULTIBUS· Products
iSBC 204
Flexible Disk Controller
Hard Disk Controller
iRMX 86 Human Interface Reference
Manual (9803202-003)
iRMX 286R Operating System
Installation and Configuration Guide
for Release 1 (145556-001)
Guide to Writing Device Drivers for the
iRMX 86 and iRMX 88 I/O Systems
(142926-004)
All of the manuals listed below are
supplied with iRMX 86 Release 5 and are
available separately under the order
numbers shown.
iRMX 86 Programming Techniques
(142982-003)
Introduction to the iRMX 86 Operating
System (9803124-04)
iSBC 86/12A, 86/05, 86/14, 86/30,
88/25,88/40, and 286/10
Single Board Computers
iSBC 206
Available Literature
iRMX 86 Operator's Manual
(144523-001)
Master Index for iRMX 86 Release 5
Documentation (145015-00t)
Getting Started With The Release 5
iRMX 86 System (145073-001)
iSBC 208
Flexible Disk Controller
iSBC 215
Winchester Disk Controller
iSBC 220
SMD Disk Controller
iRMX 86 Installation Guide
(9803125-05)
.
iSBC 251
Bubble Memory System
(iRMX 286R only)
iRMX Configuration Guide
(9803126-05)
User's Guide for the iSBC 957B, iAPX
86, 88 Interface and Execution
Package (143979-002)
iRMX 86 Disk Verification Utility
Reference Manual (144133-002)
Runtime Support Manual for iAPX 86,
88 Applications (1211776-002)
iRMX 86 Crash Analyzer Reference
Manual (144522-001)
iRMX™ 86/286R Configuration Size Chart
System Layer
Bootstrap loader
Nucleus
BIOS
Application loader
EIOS
Human Interface
UDI
Terminal Handler
Debugger
Human Interface Commands
Interactive Configuration Utility
System 86/300 Memory:
Maximum Addressable Memory:
Minimum Memory Required with ICU loaded:
'Usable by System after BooUoadlng
348KB
1MB
448KB
3-88
Min. ROMabie
Size
Max.
Size
Data
Size
0.5K
10.5K
26K
4K
10.5K
22K
11K
3K
28.5K
1.5K
24K
78K
10K
12.5K
22K
11K
3K
28.5K
6K*
2K
1K
2K
1K
15K
o
0.3K
1K
116K
308K
intJ
Ordering Information
Each iRMX operating system includes a preconfigured version
supporting Intel's System 300 standard hardware, a configurable
iRMX operating system, iRMX 860 (Assembler, Linker, Locator,
Libraries, Editor, Utilities), iRMX 863 (PLIM Language), iRMX
System Software License and are prepaid incorporation Fee. Also
included: Software Problem Reporting Service (iPR), and a 90
day System Software Subscription (new s/w release updates).
Also includes System Software documentation.
NOTE: iRMX operating systems for Intel's System 300 mIcrocomputers
are available kltted with System 300 hardware only.
Refer to Intel's OEM price list, OEM Microcomputer System section, for
ordering information.
3-89
inter
XENIX·
LANGUAGES
• COBOL and FORTRAN support for
XENIX·based systems .
• Conformation to international
standards: ANSI 77 subset FORfRAN
and ANSI X3.231974 COBOL to
Federal High Level
•. Powert1\J microcomputer extensions to
ANSI standards
• Easy porting of mainframe and
minicomputer applications to micro
environment
• Intel 8087 math coprocessor support
• Worldwide service and support
organization
'
High-level Language
Support for XENIXBased Systems
Intel's Xenix operating system, aVllllable
for component, board, or system-level
integration, is a multi-user operating
system well suited for both technical and
commercial interactive applications.
Typical applications include small business systems, software development/
engineering workstations, distributed
data processing and graphics.
For OEM and end-user application development on Xenix, Intel has provided
two industry-standard, high-level
languages-FORTRAN and COBOLwith which to build microcomputer-based
solutions for systems products or component and board-level applications. Xenix
FORTRAN and COBOL accommodate
easy porting of existing mainframe and
mini-based applications to the micro
environment.
XENIX FORTRAN for
Scientific and Technical
Applications
FORTRAN is the most popular programming language for scientific and
numerical applications. There are
thousands of existing FORTRAN programs and subroutines written in mainframe and minicomputer environments,
most of which can be ported to a micro
environment via Intel's offering of
Microsoft FORTRAN.
Compliance with the X3.91978 ANSI
standard for FORTRAN at the subset
level ensures portability with minimal
source code modifications. By moving to
a microcomputer-based system, you lose
none of your mainframe and minideveloped software investment.
Speed and Accuracy
Where They're Needed
Scientific, math-oriented applications
usually require fast, highly accurate processing. Xenix FORTRAN delivers accuracy with double-precision arithmetic
which handles numbers containing 14
significant digits.
High speed results from Xenix FORTRAN support of the Intel 8087 floating
point coprocessor, as well as from an
extensive subroutine library, which includes subroutines for 16- and 32-bit
integer arithmetic and 32- and 64-bit
floating-point arithmetic. Because of
Xenix FORTRAN's 8087 math coprocessor support, some programs written in Xenix FORTRAN will execute
from two to four times faster than their
Calls to "c" and ASM 86 are possible, making it easy to interface
non-standard peripherals to Xenix
FORTRAN programs.
FORTRAN
XENIX COBOL for
the Micro Environment
Intel's offering of Microfocus COBOL
is a mainframe-caliber compiler for
ANSI 1974 COBOL programs, enabling
Xenix-based systems to compile and run
existing COBOL programs with minimal
source code modification. Xenix
COBOL aiso contains features specifi- .
cally aimed at facilitating the interactive
I///////////////""""""IIIIIIIIIIIIII~.
defined communications module provides the user with a standard mechanism
for program-to-program messagepassihg in multi-user networks such as
those found in an "office of the future"
setting.
Forms-2™ SUpport for
Screen-Painting
program development of new applications in a microcomputer environment.
These features include a facility for
dynamically loading sub-programs
from disk as required which effectively
removes limits on the size of the application code that can be run. Xenix COBOL
augments the functionality of the ANSI
standard with additional compiler features, such as interactive screenhandling, that further increase convenience and programmer productivity.
Xenix COBOL supports FORMS-2,
a powerful visual programming tool that
speeds the creation of programs involving interactive screen-handling. In an
extremely user-friendly environment, the
user "paints" a form on the screen, and
FORMS-2 generates the COBOL source
code to support it. FORMS-2 results in
greatly improved programmer productivity in a microcomputer, screenbuilding environment.
Worldwide Service
and Support
All Xenix systems are fully supported by
Intel's worldwide staff of trained hardware and software engineers. Complete
documentation is provided for all
, operating systems and application software languages, as well as for system
hardware components. The Xenix and
Xenix Languages warranty includes
Hotline support, Software Updates, and
Subscription Service.
Total Solutions for
Interactive, MultiUser Applications
Intel's Xenix-based systems offer the
most complete solutions for interactive,
multi-user applications requiring fast,
accurate throughput and a friendly,
programming environment. Xenix is
complemented by industry-standard,
high-level languages with which OEMs
can create flexible and open end-user
systems.
Xenix languages are completely portable
- from one level of integration to another (chip to board to system).
Intel is paving the way into the future of
VLSI and pioneering VLSI-based systems. We are committed to providing
customers with smooth, uninterrupted
application development on the latest
VLSI-based systems - today and
tomorrow.
Users can license a separate run-time
support package. This enables OEMs to
pass COBOL applications onto customers at a much lower cost than that involved in transferring full COBOL
packages.
Xenix COBOL is one of only eleven
COBOL compilers in existence-and
the only one for microcomputers-that
has been GSA-certified
as error-free at the
High Level. A
special ANSI-
',IIIIIIIII.'XENIX LANGUAGES
3-92
inter
Specifications
Required Hardware:
Required Software:
• Any iAPX 86/286 based or iSBC®
86/286 based system including Intel's
System 86/300, 286/300 family and
iDIS systems
• Intel's Xenix 86 or Xenix 286"
Operating System
• 128 KB memory
• Two floppy disks or one hard disk
• Purchase of any Xenix Language
requires signing of Intel's OEM
License Agreement (OLA)
*The flrst release of FORTRAN will support only Xenlx 86
• One 8" double-density or 5.25"
double-density floppy disk drive for
distribution of media
Ordering Information
Language
Orc;lerCode
Product Contents
warranty
COBOL
XNX867
One 8" diskette and one 5.25" diskette
Level II COBOL Language Reference
Manual-122l58
Level II COBOL Opentting
Guide-1221S9
Forms II Utility Manual-122l60
Level II COBOL Pocket Guide-122l6l
90 days:
Software Updates, Subscription Service
XNX868
Incorporation Fee for passing through the
COBOL Runtime System
XNX862
One 8" diskette and one 5.25" diskette
Fortran Reference Manual
Fortran User's Guide
,
FORTRAN
FORMS-2 is a trademark of Micro Focus
3-93
90 days:
Software Updates, Subscription Service
2920 SOFTWARE SUPPORT PACKAGE
• Complete software design and
development support for the 2920
• Extends Intellec® Microcomputer
Development System to support 2920
software development
The 2920 Software Support Package furnishes a 2920 Signal Processing Applications Software/Compiler, 2920
Assembler, and 2920 Software Simulator. These three softwilre design and development tools run on the Intellec@
Microcomputer Development System.
The 2920 'Signal Processing Application Software/Compiler is an interactive tool' for designing software to be
executed on the 2920 Signal Processor. The compiler accepts English-like statements from the user and generates
2920 assembly language code.
The assembler tra,lslates symbolic 2920 assembly language programs into the machine operation code. The user can
load the code into the simulator for 2920 simulation or to the Universal PROM Programmer for 2920 EPROM
programming.
The simulator, operating entirely in software, allows the user to test and symbolically debug 2920 programs. The user
can specify input signals, simulate program execution, set up breakpoints, display input and output, and display and
alter the contents of the 2920 registers and memory locations. The simulator can also stop or trace the program and
constructively give the user access to the key elements inside a 2920 for analyzing his program.
The compiler, assembler, and simulator enable the designer to develop and test an entire program without a
complete prototype design. The 2920 designer works on the Intellec® Microcomputer Development System rather
than on' a breadboard. The development system can program, store and recall programs or routines and aid in 2920
program design.
•
•
•
2920 Software Support Package
The foilowlng are trademarks of Intel Corproallon and may be used only to Identify Intel products eXP,lnteliec Mulhbus, I, .SBC, Muilimodule ICE .• sax PROMPT les. library
Manager Prom ware Inslte, MeS RMX Intel. Megachassis UPI JnteleVISlon. Mlcroamp. ~Scope and the combination of tCE. les .SBC ,SBX MeS or AMX and a numerical
suffiX
Sept 1980
1662208
Intel Corporation 1980
3-94
inter
2920 SOFTWARE SUPPORT PACKAGE
2920 SIGNAL PROCESSING APPLICATIONS
SOFTWARE/COMPILER
• Interactive software support tool for
2920 Signal Processor
• Compiler generates 2920 Assembly
Language Code
• Extensive command set for designing
electrical filters
• Extends Intellec® Microcomputer
Development System support of the
2920
• Graphics capability enhances analysis
of filter response or piecewise linear
function approximations
• Contains MACRO library for several
standard filters and Signal processing
functions
• Powerful MACRO capability for
executing frequently used routines
The 2920 Signal Processing Applications Software/Compiler (SPAS20) is an interactive tool for designing
software to execute on the 2920 Signal Processor
The SPAS20 package can be visualized as being comprised of four inter-related sections: A cpmpiler section,
a filter design section, a curve fitting section, and a MACRO section.
Among the abilities of SPAS20 are: ability to generate 2920 assembly language code directly from
specifications of Signal processing building blocks such as filters and waveform generators; ability to
generate 2920 assembly language code for several classes of algebraic equations such as Y C· X, Y C· Y,
and Y C· X + Y where X, Yare variables and C is a constant; ability to generate 2920 assembly language
code for one variable function Y(X) = F(X); ability to examine time and frequency responses of filter sections
specified by continuous or sampled poles and zeroes; ability to examine piecewise linear approximation of
specific function; ability for users to implement more complex commands by grouping sets of commonly
used commands into a MACRO.
=
=
=
The SPAS20 package runs under ISIS-II on any Intellec® Microcomputer Development System with 64K
RAM. The output of SPAS20 can be assembled with the 2920 assembler, tested with the 2920 Simulator, and
programmed into the 2920 chip with the Universal PROM Programmer for prototyping.
3-95
AFN 01386A
intJ
- 2920 SOFTWARE SUPPORT PACKAGE
FUNCTIONAL DESCRIPTION
DATA
The 2920 Signal Processing Applications Software!
Compiler gives the analog designer a "high level
language" for his 2920 applications-it decreases
the need to code 2920 assembly language. Furthermore, the compiler Is interactive. This feature
enables the designer to define a filter, or transfer
function, graph their response, and change their
parameters many times, without having to program
and test in an actual 2920 implementation.
This command allows for specification of a set of vertices (Le. X - Y
coordinate pairs) which determine a
piecewise linear approximation of
some defined function, filter.
response characteristics, etc.
HOLD
Command to correct attenuation
due to sample-and-hold distortion:
if ON, it corrects absolute gain by
sin(x)!x and phase by adding x,
where x=TS*FREQ*". It corrects
group delay by subtracting ,,*TS.
Once a filter is realized by moving poles and zeros
in the continuous and sampled planes, the filter
may be coded and written onto an ISIS file. Similarly, after a function Y = F(X) has been defined, the
code for a piecewise linear approximation can be
stored onto an ISIS file. Several other file commands are available to store and retrieve command
sequences for SPAS20 sessions.
EVALUATE
Gives the decimal numeric value of
any expression.
CODE
Creates 2920 assembly language
code for given poles, and zeros,
equations, and user defined functions.
SPAS20 Command Language
The SPAS20 compiler also recognizes the following commands for file handling:
DEFINE
This command defines a p'ole or
zero by associating it with a
number (Le., POLE 3), and with. real
and imaginary coordinates in the
continuous or sampled plane.
This command also defines a symbol by associating a name with a
numeric value, or a MACRO by providing a pointer to a specified command sequence.
GRAPH!
OGRAPH
MOVE
This command graphically displays
the values of obJect(s) specified,
For example, GRAPH GAIN and
GRAPH PHASE are used to display
filter response. The OGRAPH command will "overgraph", the new
respons.e over the old response,
after any changes have been
made. (Y.ou may also graph Group
Delay, Step, and Impulse.)
Allows the definition of a pole or
zero to be changed-its coordinates, its plane, or both.
REMOVE
Deletes the definition of a pole,
zero, symbol, or macro.
HELP
Types an explanatory message on
the console, pertaining to a command or its attributbs.
FIT
This command performs curve fitting, Le. it approximates an arbitrary
user supplied function with a piecewise linear function.
'
PUT I
APPEND
Writes out objects (commands) to
a specified file, either creating a
new one or appending an existing
one. This enables the user to
store all or' part of a SPAS20 session on a diskette to be brought
back la,ter with the INCLUDE
command.
DISPLAY
Copies the contents of a file to the
console.
INCLUDE
Executes a sequence of
instructions from a diskette file as
if they were typed in fro'm the co'nsole.
LIST
Creates a file containing
conso,le interactions.
all
In addition to naming macros for specific command sequences, compound and conditional
commands may be formed using all of the above
.statements, These compound commands are:
IF
Establishes conditional flow of
control within a block of
commands.
REPEAT
Used for repetition of a block of
commands; executes indefinitely
or until a condition is met (using
WHILE, UNTIL, and END
statements).
COUNT
Establishes the number of times a
command sequence is to, be
executed, in a looping fashion.
3-96
AFN·01386A
intJ
2920 SOFTWARE SUPPORT PACKAGE
Intel also supplies several MACRO library files containing the following commonly needed MACROs:
SPAS20 MACRO Facility
A macro is a sequence of commands that is stored
on a temporary diskette file. The command
sequence is executed when the macro name is
entered as a command. This saves repetitive entry
of the sequence, and permits alogorithms to be
saved or. diskette for future use, This SPAS20
facility allows you to do the following:
Filter design MACROS
- Butterworth filter
- Chebyshev filter
- Bilinear transform
- Evaluate gain or phase of digital filter
In paraliel form
- Time response simulation
Function design MACROs
- Code and error optimization
- Calculate instertitial error
MACROs for generation of 2920 code
- Code for all-POLE filter
- Input and AID conversion
- Multiplication
- Division
- Logarithm functions
- Square-root functions
- Sinewave oscillator
Display the text of any macro.
•
Define a macro, specifying its name and any
parameters that are to be used by the block.
This definition is followed by the contents of
the macro (commands) and the EM statement
to end its definition.
•
Invoke a macro by entering its name and
appropriate values for any parameters.
•
List the names of all defined macros.
Removeanyor~lmacros,
SAMPLE SPAS20 FILTER DESIGN SESSION
-' Fl : SPAS20 • SFT
·
··
ISIS-II 2920 SIGNAL PROCESSING APPLICATIONS COMPILER. V2.0
; CREATE. POLE IN CONTINUOUS i-PLANE
.DEFINE POLE 1 • -707.707
•• :
POcE
1 •
LISI ALL POLES AN~ ZEROS
-707 00000.707 OOOOO.CONTINUOUS
.rS(.ALE •
100.10000
.V'>~HLE
-45,1
; ESTABLISHES .REQUENC'
~ANGE
OF INTEREST
ESTASLISHES "AGNITUDE rESPONSE RANGE OF INTEREST
PLOT "AGNITUDE RESPONSE OF POLE FAIR
G~ i M
LO
-'5""
_"? ••~
- :.J. "
- 1
~.
-!
L'
!
- 1 ':<. ')
-1 L"
-2,. :
- 2(1. ~
- 2'5.
~
-z~,
-
- 3L ~
-H. )
-3.;.2
-33.4
- .1). ':.
- 41'. ~
- .. S. \)
De I
HZ
.........
,
"...
100 150 200
,
........
...
300
A
~oo
"
...
500
..... ' . '
...
,.
700 1000
'"
I~OO
2000
3000
5000
10000
•. THE UNITS USED IN GRAPHING GAIN ARE SHOW~ IH THE LOWER LEFT CORNER
GAIN IN DECIBELS IS GRAPHEO YERSES FREQUENCV IN HERTZ
.; PPEPARE TO "OYE TO THE OIGITAL OO"AIN
•. SA"PLE RATE MUST BE SPEC1FIED
.Ii • 1/13020
TS = 7 .805004/10 •• 5
RATE FOR 1'2 IHSTRUCTION PROGRA" ANO 10"H2 CLOC¥
AFN·01386A
3-97
intJ
2920 SOFTWARE SUPPORT PACKAGE
SAMPLE SPAS20 FILTER DESIGN SESSION (Cont'd.)
COHYE'T FILTER TO
.""VE POLE TO Z
I POLES/ZE'OES "OYED
VIA "ATCHED-Z TRANSFOR"ATION
DIGIT~L
o
oP
LIST TRANSFO'"ED POLE
POLE 1 • 0 71092836,0 341183'9, Z
o
(O"PARE RESPONSES OF THE ANALOG AHD DIGITAL FILTERS BY GRAPNIHG THE
HEW RESPONSE OVER THE OLD
0;
0'
t ................. , ............
t.1
~
.... A
••••
~
................. "
~
•
•
•
••
...,
"
--------------------------- •..
: .~
... '). '*
. . .;
~
+ -.
.. 1 ,). I)
-1 Z. I
- I4•3
+- :
... !
+' +' - •
+ -•
• + ' -- ..
++
~. ~
.. Z(t,
.' .
+' •
... : .~. ::
~
... .? l. ~
-.t'$.7.
•• .+
-H. ... '3 ••
... 3"
~
++
.+
o,t)
-3·;, ~
-H.4
-04;). .:
..
... 4 Z. ::
-0$ I). )
C'BIHZ
••
•••
•
•
•
•
•
•
0,
FLUS SIGNS INDICATE OLO CURVE
HOTE THAT THE DIGITAL FILTER RESPONSE BEGINS TO INCREASE ACAIN
~T HALF THE SA"PLE RATE ( '510 HZ I,
0;
THE PHASE CHARACTERISTICS OF THIS FILTER CAN 8E EXAMINEO
0,
"
•
OY$C~LE
OCR~PH
,
100' i 50 .200' .. 300 .~ 00 . 500' '100' i 00 0 • i .joo . 2000' . 3coo .... 5000 ..... i 00 00
• -PI.PI
, ESTABLISHES RAHGE OF INTE.EST
PHASE
PHttSE
1 .•
I ••••
v" ........................... ~ ................................. A
••••••• A
••••••••• '
2.$4
~.~4
2.24
I."
I •• 5
l.n
I. 05
0.75
0 .• 5
O.! 5
-0.15
-0.45
-0. ~5
-1.05
.,
I
~I
"
.. _ _ _ _ - - ,,'
# - ..
"
.. -
-1.35
-1."
-I. , .
-2.24
-2.54
-2.84
-3'14
RAD I HZ
P.
i 00 . i;o . 200 ... 300 .400' 500 .. 700' i 000 . i 400 . 2000' •iooo .... 5000 ..... i 00 00
)
.....
•
n .17
0.:!7
",'n
n.l~
0.14
0.09
0.(1)
".on
! ............................................................................ !
0.1
0.2
0.1
0.4
n.s
0.6
0.7
n.~
O.?
1.on
*
n,nn
*OGRAPIf '(**3
FllnCTIOtl
;
TIIF. 1l[ltFERANCr.
RF.TI1F.F.N TUE CnlJF:1> Arm Tiff.
ACTUAl. APiJP.ARS
AS
"+".
! ................................................................................... !
I.no
+'
n.qs
+~
o.qn
+ ••
+.
+++ -
n.Rit
O.AI
0.7h
n.7I
++.
0.~7
n. (,2
+ -
++. '
0.~7
n.;2
0.48
+.+++.'
0.41
+.'
n.1R
n.ll
0.29
+.-+
n.~4
n .19
++.-~
++.--'
0.14
n.IO
+ •• --'
+++++++ ••• --' ,
n.OI)
n.no
,
!::::::::::: :::::::: ............. t ..................... ........................... r
n.oo 0.1
0.2
0.1
n.4
o.s
0.6
0.1
O.R
0.9
1.00
(X.*3)-DATA(X)
; T'IR P.RROR WILL Rt CRAP11RO.
FUNCTInN ! .............................................................................. !
0.041
*G~A
0.04)
0.039
n.f)'H,
n.n32
0.n28
0.025
0.021
0.017
0.014
n.O-IO
n.OM
0.001
-o.nol
-0.005
-O.noA
-n.012
-0.016
-0.n20
-0.021
-0.027
-0.n31
*
*r.XlT
! ................................................................................. 1
O.R
0.00 0.1
n.2
0.3
0.4
O. ~
n.7
1.00
T~AT·
S AU FOI.KS
3-100
2920 SOFTWARE SUPPORT PACKAGE
2920 ASSEMBLER
2920 program development on Intellec@
Microcomputer Development Systems
Produces Assembly Listing, Object Code
File, and Error Diagnostics
Translates symbolic assembly language
Instructions into 2920 machine code
Output used for 2920 programming with
the Int~lIec PROM Programmer or the
2920 Simulator for program debug
The 2920 Assembler translates symbolic 2920 Assembly Language instructions into the appropriate machine
operation codes. Through this facility, the programmer is able to symbolically program 2920 hardware operations.
Compared to machine code, these symbolic references provide faster programming, easier debugging, and greater
reliability.
The Assembler produces an object code file (executable machine code), a complete assembly listing, and error
diagnostics. The object code output from the Assembler may be loaded directly into the lnlel Universal PROM
Programmer for programming the 2920 EPROM. The object code may also be loaded to the 2920 Simulator for 2920
system design and debug.
The 2920 Assembler runs under the 1515·11 Operating System on the Intellec Microcomputer Development Systems.
Sample 2920 Assembly Listing
PAGE
ISIS-II 2'20 ASSEMBLEI XI02
RS'EMILER IH¥OKED BY' AS2'20 SAW A'M DEBUG
SAWTOOTH YA¥E GEHER.TOI
LINE
LOC OBJECT SOUICE STATEMENT
$TITLE(' SAYTOOTH . .VE GENERATOR' )
0 OOOOEF
I OOOOEF
2 OOOOH
3 OOeAEB
OOIAOA
0044EF
7A8AEI>
6000EF
7082EF
4044 EF
10 4000EF
11 4000H
12 4000EF
\3 8000EF
14 8000EF
15 8000H
I i 'OOOH
17 8000EF
18 8000EF
8000H
, ,•
8
:0
:1
!2
:3
:4
:5
16
:7
:,:8
10
ZI
12
Z3
24
15
,
I'
SYMBOL:
INO
INO
INO
SUI
SUI
LOR
ADD
cns
) SAMPLE INPUT CHANNEL 0
Y. KPI.INO
Y.KPt.RloIHO
DAI. Y.INO
)
Y. KP7 .CHDS
LDA Y.KPO.CHOS
LOA DAI.Y
HOP
HOP
HOP
OUTO
OUTO
OUTO
EOI'
OUTO
OUTO
OUT a
SIMULTAHEOUSLY CALCULATE SAWTOOTH
IV SUBTRACTING 3/1' FROM V
ALSO CHECK SIGN 81T OF Y
IF V NtGATIVE START HEXT TOOTH
CONYERT SAMPLED INPUT TO DIGITAL (SIGN 81T)
SUPPRESS SAWTOOTH IF IHPUT WAS < 0
PREPRRE TO OUTPUT SAWTOOTH
RNALOG LEYEL MUST SETTLE
OUTPUT SAWTOOTH
PROGRAM WILL END IN THREE MDRE IHSTRUCTIONS
EHD
VALUE'
a
ASSEMBLY COMPLETE
ERROl'S
o
.. A1tHINGS •
o
RIIIHS!ZE
I
lOftS lZE
20
3-101
AFN Q'386A
inter
2920 SOFTWARE SUPPO.,T PACKAGE
2920 SIMULATOR
Speeds test and debug of 2920 programs
Output and, internal data can be saved
on disk for further analysis.
Simulates 2920 Intern~1 operation
Operates on Intellecl!l Microcomputer
Development Systems
Provides ability to set breakpoints and to
collect trace information
Easy·to·learn commands
Allows users to specify 2920 input
signals, and display or alter ROM, RAM,
and system variables
The 2920 Simulator is a software facility that provides testing and symbolic debugging of 2920 programs in an Inteliec
Microcomputer Development Systems environment. The 2920 designers have the capability to specify the 2920 input
signals, to set breakpoints, to coliect and display 2920 input, output, system variables,.and ROM and RAM data values
during simulation. The 2920 Simulator accepts the hex format object files produced by the 2920 assembler. Output
values and internal trace data may be saved on ISIS-II disk files for further analysis.
Functional Description
2920 Input Signal Specification
The four analog signal inputs to the 2920 processor can
be specified as algebraic combinations of basic
functions of time. The basic functions are SIN, COS,
EXP, LOG, SOR, SAW, saw, ABS,
2920 Simulation
The simulation of 2920 machine instructions is performed in software. All 2920 internal registers, memory,
input values, output values, and other sys~em variables
can be examined and modified. The internal processing
of the 2920 is simulated. Time constants for the sample
and hold capacitators are assumed to be zero. Calculation of input signals is performed in single precision
floating point. The speed of simulation varies with the
complexity of the input signal, breakpoinl setting, and
trace condition. Exclusive of 1/0 time requirements,
2920 instructions will be simulated at a rate of approximately several hundred instructions per second.
Breakpoint Capabilities
After' each instruction is Simulated, the breakpoint is
evaluated to determine whether to stop or continue
simulation. Conditional breakpoints are also provided
for debugging purposes. Simulation can be manua1ly
stopped at any time by pressing the ESC key on the
Intellec console.
Trace Capabilities
Based on the qualifier's condition, trace data records
can be collected during simulation. The trace data
records are stored in In!ellec resident memory and ,are
optionally written to the console for display or to a disk,
fi Ie for record.
Symbolic Debugging Capabilities
The 2920 Simulator allows the user to refer to program
addresses symbolically. The user can load or save the
symbols generated from the hex format object files or
created .OOI12 ; ~I"ULATF. FOR TWO CYCLP.~
*RASV.-O
; S~T THF. BAS" Tn OEct~AL
*smULAT .. FROII 0
; BEGIN SlllllLATION
,.
nAR
RA!1 1
3-103
"FN 0'380"
inter
292(1 SOFTWARE SI}PpbRT PACK.A~E
c; l'WT.ATION J\F,r.UN
0.00010000
0.00020000
0.00030000
0.00040000
0.00050000
0.B3QR4175
0.R4277334
0.~R359375
0.~R554~83
0.12734375
0.21093750
0.52R320lh
0.17109370
0.213R6714
0.00060000
O.0546R750
0.0566405~
0.00070000
O.OOOROOOO
0.00090000
0.0 0 10 0000
0.00110000
0.00120000
0.00130000
-0.10156250
0.73828125
0.18203125
0.42578125
0.26953125
0.10937500
-0.046B7500
0.89941396
0.74218745
0.5R496089
0.1~7IR710
o• 'I 2 7 7 371 3 3
0.27050776
0.11328119
0.95605459
SHIULATION TE,RMINAT£n
*GRAPll ON
; qWITCHES TqE DISPLAY '100£ TO CRAPHICS
*TRACF.-T,O,DAR,RA:1.aSC , -I I - l . l , l
; 'iETS ITEMS TO BE TRACED
.ose-ONE
i INITIALIZE THE RAI1 LOCATION
*SHWLATF. FRO~f"O
T
DAR
RAil I
-I
SHfULATION RF.GUN
~AH
-I
-)*
o *
I
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I
I·
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o *
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I
2 I
SIMULATION TERMINATED
3
.
*
·EXIT
SPECI FICATIONS
Optional Software
Operating Equipment
FORTRAN·80 (Product Code MDS·301)
Required Hardware
.
.
Intellec® Microcomputer Development System
RUNNING ISIS
Documentation Package
2920 Assembly User's Guide (9800987)
2920 Simulator User's Guide (980098?)
2920 Signal Processing Application Compiler
User's Guide (121529)
Required Software
ISIS·II Diskette Operating System
Optional Hardware
Shipping Media
line Printer
Universal PROM Programmer
Flexible Diskettes
.
ORDERING INFORMATION
Product Code
Description
MCI·20-SPS
2920 Software Support Package
Includes 2920 Signal Processing
Application Software/Compiler and 2920
Assembler/Similator Software
3-104
AFN·01386A
MCS@-48
DISKETTE-BASED SOFTWARE
SUPPORT PACKAGE
• Extends Intellec microcomputer
development system to support MC8-48
development
• MCS-48 assembler provides conditional
assembly and macro capability
• Takes advantage of powerfullSIS·n file
handling and storage capabilities
• Provides assembler output in standard
Intel hex format
The MCS-48 assembler translates symbolic 8048 assembly language instructions into the appropriate machine
operation codes, and provides both conditional and macroassembler programming. Output may be loaded
either to an ICE-49 module for debugging or into the iUP Universal PROM Programmer for 8748 PROM
programming. The MCS-48 assembler operates under the ISIS-II operating system on Intel Development
systems.
MAY 1983
©INTEL CORPORATION, 1983
3-105
AFN·00619D
inter
FUNCTIONAL
MCS@·48
DES~RIPTION
Table 1_ Simple MC8-48 Dlskette-Blsed
The MCS-48 assembler translates symbolic 8048
assembly language Instructions ihto the appropriate
machine operation codes. The ability to refer to program
addresses with symbolic names eliminates the errors of
hand translation and makes it easier to modify programs
when adding or deleting instructions. Conditional
assembly permits the programmer to specify which portions of the master source document should be included or deleted in variations on a basic system deSign,
such as the code required to handle optional external
devices. Macro capability allows the programmer use of
a single label to define a routine. The MCS-48 assembler
will assemble the code required by the reserved routine
whenever the macro label is inserted in the text. Output
from the assembler is in standard Intel hex format. It
may be either loaded directly to an in-circuit emulator
(lCE-49) module for integrated hardware/software
debugging, or loaded into the iUP Universal PROM
Progtammer for 8748 PROM programming. A
sample assembly listing is shown in Table 1.
.... ,
ISI8 "8D4I MACAOASSEMBLEA, V1 0
LOC 0tIJ
SOURCE STATEMENT
. .0
,DECIMAL ADDITION ROUTINE ADO BCD NUMBER
•
5
e
.,."
""
""
0100 881E
0102
Bt28
·
""
,000)
INIT
MaY
'U,IADDNO
•
L1
MOV
ENDM
At.ICNT
"
'3
ALPHA
.
14
BETA
15
COUNT
eQU
eQU
eQU
,
22
FO
01011 11
0108 57
DIOA AI
010a 18
Oloe:;: IV
0100 EA07
USER SYMBOLS
ALPHA ooolE
LI
0102
LP
COUNT 0005
"UOND,ADONe,CNT
AD,'AUGND
I
30
40
OIIG
'OOH
INIT
ALPHA BETA COUNT
AO 'ALPHA
R1 taETA
R2 ICOUNT
MOV
""
BETA 0028
MACAO
MOY
19+Ll
0104 BAU
0108 97
0107
7
..."..."
.".
"
0100
AT LOCATION 'BETA' TO ICD NUMBER AT Al..PHA WITH
,RESULT IN 'ALPHA LENGTH OF NUMBER IS 'COUNT' DIGIT
,PAIAS IASSUME BOTH 8ETA AND ALPHA ARE SAME LENGTH
.AND HAVE eVEN NUMIER OF DIGITS OR M80 IS 0 IF
MOV
.OY
C",
MOY
AOor.:
DA
.OY
INC
INC
OJ""
'NO
C
A ORO
:
.,'"
OR1
ORO A
"' LP
LP 0107
ASSEMBLY COMPLETE NO ERRORS
ISIS II ASSEMBLER SYMBOl CROSS REfERENCE VIO
PAGE 1
SYMBOL CROSS REfERENCE
The MCS 48 assembler supports the 8048, 8049. 8050, 8020.
8021.8022. 8041 and 8042. The MCS 48 assembler can also
support CMOS versions of the 8048 family.
ALPHA 1a.
17
BETA
cOUla 1M
''''
17
17
7.
11
INIT
Ll
1M
LP
221
28
SPECIFICATIONS
Operating Environment
(All)
Documentation Package
Intel Microcomputer Development Systems
(Series II. Series
III/Se~jes
Titles of:
IV)
Intel Personal Development System
Ordering Information
Part Number
User Guides
Operating Instructions
Reference Manuals
SUPPORT:
Hotline Telephone Support. Software Performance
Reports (SPR). Software Updates. Technical
Reports. Monthly Newsletters are available.
~8Crlption
MDS-D48'
MCS-48 Disk Based Assembler
Requires Software License
*MDS is an ordering code only and is not used as a product name or trademark'. MDS is a registered trademark of
Mohawk Data Sciences Corporation.
3-106
AFN-00619D
inter
8051 SOFTWARE DEVELOPMENT PACKAGE
• Symbolic relocatable assembly
language programming for 8051
mlcrocontrollers
• Extends Intellec® Microcomputer
Development System to support 8051
program development
• Produces Relocatable Object Code
which is linkable to other 8051 Object
Modules
• Encourage modular program design
for maintainability and reliability
• Macro Assembler features conditional
assembly and macro capabilities
• CONV51 Converter for translation of
8048 assembly language source code
to 8051 assembly language source
code
• Provides upward compatibility from
the MCS·48™ family of single·chip
microcontrollers
The 8051 software development package provides development system support for the powerful 8051 family of single
chip microcomputers. The package contains a'symbolic macro assembler and MCS·48 source code converter.
The assembler produces relocatable object modules from 8051 macro assembly language instructions. The object
code modules can be linked and located to absolute memory locations. This absolute object code may be used to pro·
gram the 8751 EPROM version of the chip. The assembler output may also be debugged using the ICE-51TM in-circuit
emulator.
The converter translates 8048 assembly language instructions into 8051 source instructions to provide software compatibility between the two families of microcontrollers.
MAY 1983
©INTEL CORPORATION, 1983
ORDER NUMBER:162771-Q01
3-107
inter
8051 SOFTWARE DEVELOPMENT PACKAGE
8051 MACRO ASSEMBLER
• Supports 8051 family program development on IntelleC® Microcomputer
Development Systems
• Gives symbolic access to powerful
8051 hardware features
• Produces object file~ listing file and
error diagnostics
• Object files are linkable and locatable
• Provides software support for many
addressing and data allocation
capabilities
• SymboliC Assembler supports symbol
table, cross·reference, macro
capabilities, and conditional assembly
The 8051 Macro Assembler (ASM51) translates symbolic 8051 macro assembly language modules in.to linkable and
locatable object code modules. Assembly I~nguage mnemonics are easier to program and are more readable than
binary or hexadecimal machine instructions. By allowing the programmer to give symbolic names to memory locations
rather than absolute addresses, software design and debug are performed more quickly and reliably. Furthermore,
since modules are linkable and relocatable, the programmer can do his software in modular fashion. This makes programs easy to understand, maintainable and reliable.
The assembler supports macro definitions and calls. This is a convenient way to program a frequently used code
sequence only once. The assembler also provides conditional assembly capabilities·.
Cross referencing is provided in the symbol table listing, showing the user the lines in which each symbol was defined
and referenced.
ASM51 provides symbolic access to the many useful addressing features of the 8051 architecture. These features include
referencing for bit and byte locations, and for providing 4-bit ope~ations for BCD arithmetic. The assembler also provides symbolic
access to hardware registers, 1/0 ports, control bits, and RAM addresses. ASM51 can support all members of the 8051 family.
Math routines are enhanced by the MUltiply and DIVide instructions.
If an 8051 program contains errors, the assembler provides a comprehensive set of error diagnostics, which are included in the
assembly listing or on another file. Program testing may be performed by using the iUP Universal Programmer and iUP F87/51
personality module to program the 8751 EPROM version of the Chip.
ICE51 and EMV51 are available for program debugging.
RL51 LINKER AND RELOCATOR PROGRAM
• Links modules generated by the
assembler
• Enables modular programming of soft·
ware for effiCient program development
• Locates the linked object to absolute
memory locations
• Modular programs are easy to
understand, maintainable and reliable
The 8051 linker and relocator (RL51) is a utility which enables 8051 programmers to develop software in a modular
fashion. The linker resolves all references between modules and the relocator assigns absolute memory locations to
all. the relocatable segments, co.mbining relocatable partial segments with the same name.
With this utility, software can be developed more quickly because small functional modules are easier to understand,
design and test than large programs.
The number of symbols in the software is very large because the assembler symbol limit applies only per module not
the entire program. Therefore programs can be more readable and better documented.
Modules can be saved and used on different programs. Therefore the software investment of the customer is maintained.
RL51 produces two files. The absolute object module file can be directly executed by the 8051 family. The listing file
shows the results of the link/locate process.
3-108
AFN-OI944C
8051 SOFTWARE DEVELOPMENT PACKAGE
CO NV51
8048 TO 8051 ASSEMBLY LANGUAGE
CONVERTER UTILITY PROGRAM.
• Enables software written for the
MCS·48 family to be upgraded to run
on the 8051
• Preserves comments; translates 8048
macro definitions and calls
• Provides diagnostic information and
warning messages embedded In the
output listing
• Maps each 8048 Instruction to a corre·
spondlng 8051 Instruction
The 8048 to 8051 Assembly Language Converter is a utility to help users of the MCS-48 family of microcomputers
upgrade their delsgns with the high performance 8051 architecture. By converting 8048 source code to 8051 source
code, the software Investment developed for the 8048 is maintained when the system is upgraded.
The goal of the converter (CONV51) is to attain functional equivalence with the 8048 code by mapping each 8048
instruction to a corresponding 8051 instruction. In some cases a different instruction is produced because of the
enhanced instruction set (e.g., bit CLR instead of ANL).
Although CONV51 tries to attain functional equivalence with each instruction, certain 8048 code sequences cannot be
automatically converted. For example, a delay routine which depends on 8048 execution speed would require manual
adjustment. A few instructions, in fact, have no 8051 equivalent (such as those involving P4-P7). Finally, there are a
few areas of possible intervention such as PSW manipulation and interrupt processing, which at least require the user
to confirm proper translation. The converter always warns the user when it cannot guarantee complete co~version.
CONV51 produces two files. The output file contains the ASM51 source program produced from the 8048 instructions.
The listing file produces correlated listings of the input and output files, with warning messages In the output file to
point out areas that may require users' intervention in the conversion.
SPECIFICATIONS
OPERATING ENVIRONMENT
Documentation Package:
MCS-51 Macro Assembler User's Guide
MCS-51 Utilities User's Guide for 8080/8085 Based Development System
MCS-51 8048-to-8051 Assembly Language Converter
Operating Instructions for ISIS-II Users
All Intel Microcomputer Development Systems or Intel
Personal Development System
ORDERING INFORMATION
SUPPORT:
Part Number
Description
MCI-51-ASM
8051 Software Development
Package
Hotline Telephone Support, Software Performance
Reporting (SPR), Software Updates, Technical Reports,
Monthly Newsletter available.
'Requires Software License
3-109
AFN'()1944C
PUM 51 SOFTWARE PACKAGE
• High-level programming language for
the Intel MCS®-51 slngle-chlp
microcomputer family
• Compatible with PL/M 80 assuring
MCS®-ao/85 design portability
• Enhanced to support boolean
processing
.
• Tailored to provide an optimum balance
among on-chlp RAM usage, code size
and code execution time
• Allows programmer to have complete
control of microcomputer resources
• Produces relocatable object code
which Is linkable to object modules
generated by all other 8051 translators
• Extends high-level language
programming advantages to
microcontroller software development
• Improved reliability, lower maintenance
costs, Increased programmer
productivity and software portability
• Includes the linking and relocating
utility and the library manager
• Supports all members of the Intel
MCS®-51 architecture
PL/M 51 is a structured, high-level programming language for the Intel MCS-51 family of microcomputers. The
PL/M 51 language and compiler have been designed to support the unique software development requirements of the single-chip microcomputer environment. The PLiM language has been enhanced to support
Boolean processing and efficient access to the microcomputer functions. New compiler controls allow the
programmer complete control over what microcomputer resources are used by PL/M programs.
PL/M 51 is largely compatible with PL/M 80 and PL/M 86. A significant proportion of existing PL/M software can
be ported to the.MCS-51 with modifications to support the MCS-51 architecture. Existing PL/M programmers
can start programming for the MCS-51 with a small relearning effort.
PL/M 5.1 is the high-level alternative to assembly language programming for the MCS-51. When code size and
code execution speed are not critical factors, PL/M 51 is the cost-effective approach to developing reliable,
maintainable software.
The PL/M 51 compiler has been designed to support efficiently all phases of software implementation with
features like a syntax checker, multiple levels of optimization, cross-reference generation and debug record
generation.
LEGEND
o
~.J:~~:';?=:OOLS
r.
~
MC5-51
SOFTWARE TOOLS
-__-":J
O
O
USER..cODED
SOFTWARE
Figure 1. MCS®-S1 Program Development Process
MAY 1983
ORDER NUMBER:210566-001
3-110
inter
PL/M 51 SOFTWARE PACKAGE
PL/M 51 Compiler
FEATURES
Interrupt Handling
Major features of the Intel PL/M 51 compiler and
programming language include:
A procedure may be defined with the INTERRUPT
attribute. The compiler will generate code to save
and restore the processor status, for execution of the
user-defined interrupt handler routines.
Structured Programming
PL/M source code is developed in a series of modules, procedures, and blocks. Encouraging program
modularity in this manner makes programs more
readable, and easier to maintain and debug. The
language becomes more flexible, by clearly defining
the scope of user variables (local to a private procedure, for example).
Language Compatiblity
PL/M 51 object modules are compatible with object
modules generated by all other MCS-51 translators.
This means that PL/M programs may be linked to
programs written in any other MCS-51 language.
Object modules are compatible with In-Circuit
Emulators and Emulation Vehicles for MCS-51 processors; the DEBUG compiler control provides these
tools with symbolic debugging capabilities.
Compiler Controls
The PL/M 51 compiler offers controls that facilitate
such features as:
-Including additional PL/M 51 source files from
disk
-Cross-reference
-Corresponding assembly language code in the
listing file
Program Addressing Control
The PL/M 51 compiler takes full advantage of
program addressing with the ROM (SMALL/
MEDIUM/LARGE) control. Programs with less than 2
KB code space can use the SMALL or MEDIUM option to generate optimum addressing instructions.
Larger programs can address over the full 64 KB
range.
Supports Three Data Types
PL/M makes use of three data types for various applications. These data types range from one to sixteen bits and facilitate various arithmetic, logic, and
address functions:
-Bit: a binary digit
-Byte: a-bit unsigned number or,
-Word: 16-bit unsigned number.
Another powerful facility allows the use of BASED
variables that map more than one variable to the
same memory location. This is especially useful for
passing parameters, relative and absolute addressing, and memory allocation.
Code Optimization
The PL/M 51 compiler offers four levels of optimization for significantly reducing overall program size.
-Combination or "folding" of constant expressions;
"Strength reductions" (a shift left rather than mUltiply by 2)
-Machine code optimizations; elimination of superfluous branches
-Automatic overlaying of on-chip RAM variables
-Register history: an off-chip variable will not be
reloaded if its value is available in a register.
Error Checking
Two Data Structuring Facilities
PL/M 51 supports two data structuring facilities.
These add flexibility to the referencing of data stored
in large groups.
-Array: Indexed list of same type data elements
-Structure: Named collection of same or different
type data elements
-Combinations of Both: Arrays of structures or
structures of arrays.
The PLIM 51 compiler has a very powerful feature to
speed up compilations. If a syntax or program error is
detected, the compiler will skip the code generation
and optimization passes. This usually yields a 2X
performance increase for compilation of programs
with errors.
A fully detailed set of programming and compilation
error messages is provided by the compiler and
user's guide.
3-111
AFN.()()047B
inter
PL/M 51 SOFTWARE PACKAGE
BENEFITS
Lower Development Cost
PLIM 51 is designed to be an efficient, cost-effective
solution to the special requirements of MCS-51 Microsystem Software Development, as illustrated by
the following benefits of PL/M use:
Increases in programmer productivity translate immediately into lower software development costs because less programming resources are required for a
given programmed function.
Increased Reliabilty
Low Learning Effort
PL/M 51 is easy to learn and to use, even for the
novice programmer.
Earlier Project Completion
I
Critical projects are completed much earlier than
otherwise" possible because PL/M 51, a structured
high-level language, increases programmer
productivity.
PL/M 51 is designed to aid in the development of
reliable software (PL/M programs are simple
statements of the program algorithm). This substantially reduces the risk of costly correction of errors in
systems that have already reached full production
status, as the more simply stated the program is, the
more likely it is to perform its intended function.
Easier Enhancements and Maintenance
Programs written in PL/M tend to be selfdocumenting, thus easier to read and understand.
This means it is easier to enhance and maintain
PL/M programs as the system capabilities expand
and future products are developed.
RL51 Linker and Relocator
• Links modules generated by the
assembler and the PL/M compiler
• Enables modular programming of
software-efficient program
development
• Locates the linked object to absolute
memory locations
• Modular programs are easy to
understand, maintainable and reliable
The MCS-51 linker and relocator (RL51) is a utility which enables MCS-51 programmers to develop software in a
modular fashion. The utility resolves all references between modules and assigns absolute memory locations to
all the relocatable segments, combining relocatable partial segments with the same name.
With this utility, software can be developed more quickly because small functional modules are easier to
understand, design and test than large. programs.
The total number of allowed symbols in user-developed software is very large because the assembler number of
symbols' limit applies only per module, not to the entire program. Therefore programs can be more readable
and better documented.
Modules can be saved and used on different programs. Therefore the software investment of the customer is
maintained.
RL51 produces two files. The absolute object module file can be directly executed by the MCS-51 family. The
listing file shows the results of the link/locate process.
3-112
AFN.Q0047e
intJ
PL/M 51 SOFTWARE PACKAGE
LlB51 Librarian
The LlB51 utility enables MCS-51 programmers to
create and maintain libraries of software object modules. With this utility, the customer can develop standard software modules and place them in libraries,
which programs can access through a standard interface. When using object libraries, the linker will
call only object modules that are required to satisfy
external references.
Consequently, the librarian enables the customer
to port and reuse software on different projects
-thereby maintaining the customer's software
investment.
SPECIFICATIONS
Documentation Package
Operating Environment
PLIM 51 User's Guide
MC5-51 Utilities User's Guide
All Intel Microcomputer Development Systems or
Intel Personal Development Systems
ORDERING INFORMATION
Part Number
Description
iMDX 352
Requires Software License
PL/M 51 Software
Package
SUPPORT:
Hotline Telephone Support, Software Performance Report (SPR), Software Updates, Technical Reports, and
monthly Technical Newsletters are available.
3-113
AFN·00041B
MCS@·96 SOFTWARE SUPPORT PACKAGE
• Symbolic relocatable assembly
language programming for the 8096
microcontroller family
• System Utilities for Program Linking
and Relocation
• Extends Intellec® Microcomputer
Development System to support
MCS-96 program development
• Encourages modular program design
for maintainability and reliability
The MCS-96 Software Support Package provides development system support for the MCS-96 family of 16 bit
single chip microcomputers. The support package includes a macro assembler and system utilities.
The assembler produces relocatab!e object modules from MCS-96 macro assembly language instructions. The
object modules then are linked and located to absolute memory locations.
The assembler and utilities run on the Intellec Serie,s III or equivalent Microcomputer Development System.
.
MCS·96 SOFTWARE SUPPORT PACKAGE
~
/
ASM·96
MACRO
ASSEMBLER
RL·96
LINKER AND
RELOCATOR
LIB·96
SOFTWARE
LIBRARIAN
Figure 1. MCS-96 Software Support Package
MARCH 1983
ORDER NUMBER:230613-002
© INTEL CORPORATION 1983
3-114
MCS@·96 SOFTWARE SUPPORT PACKAGE
8096 MACRO ASSEMBLER
• Supports 8096 family program
development on Intellec®
Microcomputer Development System
• Gives symbolic access to powerful
8096 hardware features
• Object files are linkable and
locatable
• Symbolic Assembler supports
macro capabilities, cross reference,
symbol table and conditional
assembly
ASM-96 is the macro assembler for the iACX family of microcontrollers. ASM-96 translates symbolic
assembly language mnemonics into relocatable object code. Since the object modules are linkable and
locatable, ASM-96 encourages modular programming practices.
The macro facility in ASM-96 allows programmers to save development and maintenance time since
common code sequences only have to be done once. The assembler also provides conditional
assembly capabilities.
ASM-96 supports symbolic access to the many features of the 8096 architecture. An "Include" file is
provided with all of the 8096 hardware registers defined. Alternatively~ the user can define any subset of
the 8096 hardware register set.
Math routines are supported with mnemonics for 16 x 16-bit multiply or 32/16-bit divide instructions.
The assembler runs on a Series III/Series IV Inteilec Development Systems for high performance.
RL96 LINKER AND RELOCATOR PROGRAM
• Links modules generated by
the assembler
• Locates the linked object module
to absolute memory locations
• Encourages modular programming
for faster program development
• Automated selection of required
modules from Libraries to sa.tlsfy
symbolic references
RL96 is a utility that performs two functions useful in MCS-96 software development:
-The link function which combines a number of MCS-96 object modules into a single program.
-The locate functions which assigns an absolute address to ail relocatable addresses in the MCS-96 object
module.
RL96 resolves all external symbol references between modules and will select object modules from
library files if necessary.
.
RL96 creates two files:
- The program or absolute object module file that can be executed by the targeted member of the MCS-96 family.
- The listing file that shows the results of link/locate, including a memory map symbol table and an
optional cross reference listing.
The relocator allows programmers to concentrate on software functionality and not worry about the
al;lsolute addresses of the object code. RL96 promotes modular programming. The application can be
broken down into separate modules that are easier to deSign, test and maintain. Standard modules can
be developed and used in different applications thus saving software development time.
3-115
230613-002
"m_le>
, 111'tr
MC$@-98 SOFTWARE SUPPORT PACKAGE
LIB 96
The LIB 96 utility creates and maintains libraries of software object modl,lIes. The customer can develop
standard modules and place them in libraries. Application programs can then call these modules using
predefined interfaces.
LIB 96 uses the following set of commands:
-CREAT,E: Creates an empty library file.
-ADD:
Adds object mOdufes to a library file.
-DELETE: Deletes object modules from a library file.
-LIST:
Lists the modules in the library file.
-EXIT:
Terminates 'LIB 96
When using object libraries,' RL96 will Include only those object modules that are required to satisfy
external references, thus saving memory space.
SPECIFICATIONS
Operating Environment
Documentation Package:
REQUIRED HARDWARE:
Intellec Microcomputer Development System
-Series III/Series IV
MCS-96 MACRO ASSEMBLER USER'S GUIDE
MCS-96 UTILITIES USER'S GUIDE
MCS-96 ASSEMBLER AND UTILITIES POCKET
REFERENCE CARD
ORDERING INFORMATION
Part Number
Description
iMDX·355
MCS-96 SOFTWARE SUPPORT PACKAGE
Requires Software License
3-116
Productivity Tools and
Communications Software
4
inter
PRODUCTIVITY TOOLS AND COMMUNICATIONS SOFTWARE
INTRODUCTION
Improving an engineering team's productivity is a never ending task in loday's competitive envfronments.lntel
offers software tools and communication systems that optimize the usage of expensive engineering personnel
and capital equipment. Software tools boost a programming team·s productivity, thtHeby lowering development
costs and shortening product development times. Communication software provides further productivity gains
by linking mUlti-computer engineering environments into highly effective networks.
One software tool that substantially increases software productivity is PSCOPE, a source level symbolic
debugger. The PSCOPE debugger allows the high-level language programmer to completely debug his code at
the same level at which it was written. Breakpointing, tracing, and patching are all done in a faster and less
error-prone manner than through obsolete machine-level debuggers. As software testing and maintenance
consume a greater portion of development life-cycle time and cost, PSCOPE debugging can significantly
improve programming efficiency.
Another set of valuable software tools are Intel's Program Management Tools (PMTs), which provide the
essential ingredients to manage large software development projects. PMTs decrease the time spent on
tracking program changes and manually generating new systems, thereby giving engineers more time for
software design, development, and testing. PMTs consist of a Software Version Control System (SVCS), and an
automated software generation facility (MAKE). Together these tools control, examine, and automate the
management of a software system that may contain many versions consisting of numerous modules.
Intel's software toolboxes are collections of utilities that perform a variety of productivity-oriented functions.
The ISIS-II Software Toolbox offers conditional submit file control tools, source management tools, and other
tools that operate at the ISIS-II command level. The 8086 Software Toolbox is a collection of 16-bit software
tools that are valuable for text formatting and preparation, software testing and performance analysis, 286/287
software development, and a multitude of other applications.
Intel also offers AEDIT ,an advanced editor that significantly improves programmer productivity. AEDIT was
designed with the programmer in mind, and offers full screen editing, the ability to edit two files at once,
features f9r manipulating large blocks of text, and dynamic macro command definition. In addition, Intel
continues to offer and support CREDIT, an 8-bit CRT-based editor.
The trend toward distributed data processing is well supported by Intel's complete line of communication
software and systems. Mainframe Link integrates user mainframe computers with Intellec Development
systems by emulating the operation of an IBM 2780 or 3780 Remote Job Entry terminal. The Asynchronous
Communication Link enables one or more Intel Microcomputer Development Systems to communicate with a
Digital Equipment Corporation VAX computer. The iNA 950 and iNA 960 are ready-to-use communication
software building blocks for OEM suppliers of networked systems for both technical and commercial
applications. Finally, NOS-II Electronic Mail enables users to send and receive messages and files between any
nodes on the NOS-II network.
4-1
inter
PSCOPE
HIGH-LEVEL PROGRAM DEBUGGER
• Compatible with Intel's 12 1CE T.
Integrated Instrumentation and InCircuit Emulation System for Target
System Debugging
• Source-Level Debugging for Higl)
Productivity
• Breakpoint, Single-Step and Execution
Trace by Statement Numbers,
Procedure Names and Labels
• Native CPU Execution for iAPX 88 and
86 Architectures I
• Supports PL/M, Pascal, and FORTRAN
Program Debugging
• High-Level Code Patching
PSCOPE is an interactive, symbolic debugger for high-level language programs. It allows users to scrutinize
program execution at the source level, using high-level statement numbers, procedure and variable names and
labels. This is typically a more productive way of debugging high-level language (HLL) programs than at the
machine level.
Source-level debugging means that traditional functions, such as setting breakpoints or tracing execution flow,
are more powerful in PSCOPE. For example, tracing procedure entry (or exit) points conveys much more
information than tracing machine instructions. Single-step execution is more powerful, using statements and
procedures, as well.
The productivity improvement from debugging in a high-level language is analogous to programming in a
high-level language, when compared to assembly-level programming and debugging.
PSCOPE users may define high-level code patches, which are "compiled" and patched into the user's program.
Code patches may be stored on diSk, so they may be later incorporated into the program source file.
PSCOPE is an integral part of the advanced 12 1CE Integrated Instrumentation and In-Circuit Emulation System.
This allows a smooth migration from program debugging to target system debugging.
PSCOPE's symbol capacity is virtually unlimited. Symbols are paged to disk when necessary.
PROGRAM
DEVELOPMENT
ASSEMBLY
LANGUAGE
MODULES
SOURCE-LEVEL
DEBUGGING
~
V
HIGH·LEVEL
MODULE'S:
PSCOPE:
CPU·LEVEL DEBUGGING
REGISTERS
-
-V
PL/M-86
PASCAL-86
-V
BREAKPOINTS
TRACE POINTS
SINGLE STEP
EXAMINE/MODIFY
CODE PATCHING
PSCOPE AND INSTRUMENTATION:
~
PSCOPE:
HIGH-LEVEL DEBUGGING
~
TARGET SYSTEM
INTEGRATION
REAL· TIME EMULATION
HIGH·LEVEL DEBUGGING
CPU·LEVEL DEBUGGING
-
FORTRAN-86
Figure 1. Debugging Methodology with PSCOPE
4-2
MAY 1983
ORDER NUMBER:21035CHl03
PSCOPE
HIGH-LEVEL PROGRAM DEBUGGER
inter
SAMPLE DEBUGGER SESSION
SERIES-III Pascal-86, VI.l
Sourc~
Elle~
:F2:~AXMIN.PAS
ObJect F.le: :F2:MAXMIN.OBJ
DEBUG.
Controls SpecIfIed:
STMT LINE NESTING
1
1 0 0
2
2 0 ~
3
4
4
5
6
7
8
9
5
5
G
7
8
11
9
10
10
11
12
12
13
14
15
16
13
14
14
18
19
20
16
21
18
20
22
23
21
21
21
22
25
26
27
28
23
24
25
26
27
30
31
32
33
34
0
0
SOURCE T~XT: :F2:MAXMIN.PAS
proyram calc(input,output)i
va!'" a,b: Integer;
procedure sum(x,Y:lnteger);
var Z: Integer;
begIn
Z:=X*Yi
writeln('The sum IS I,Z);
end;
procedure difference(x,Y:lnteger);
var Z: Integer;
begin
z:=aos(x-y);
wflteln('The dIfference IS ',Z)i
end;
procedure maxmin{x,y:integer);
begIn
If x') 'break? I
.11 1 t eI == I y' then return true
else return fals~ endlf
*
""def Ine proc PRI
This illustrates the facility where a debug procedure
(PR1) is called when reaching a breakpoint at line
#21. Here, some values are displayed, and a condition is evaluated (in this case, a query to the user).
Had the condition been false, program execution
would continue with no break. The high-level constructs in the command language make this a very
powerful facility.
.*end
*d br B3 = aZI call PRl
*go uSlng b3
INPUT TWO INTEGERS:
(Input)
23 24
THE SUI"! IS
47
TH~
DIFFERENCE IS
1
'fHE MAXIMUM IS
24
THE MINIMUM IS
24
the numbers and the product are:
+23 +24 +552
Dreak ? 'i
.
[Hr~ak
at #21 J
*ex 1 t
PSCOPE
terllllnated
4-6
AFN-02166C
inter
PROGRAM MANAGEMENT TOOLS,
• Increase Software Engineering
Productivity
• Decrease Software Administration
Overhead
• Allow Users to Control, Automate and
Examine the Evolution of a Software Project
• Enhance the Capability of Networked
(NOS-II) and Standalone Development
Systems
• SVCS Simplifies Administration of
Software Modules and Systems
• MAKE Automatically Generates New
Releases of Software Systems
• Both Tools Easily Incorporated Into
Existing Software Development
Methodologies
Intel's Program Management Tools (PMTs) provide the essential ingredients to manage large software development projects. PMTs decrease the time spent on tracking program changes and manually generating new
systems, thereby giving engineers more time for software deSign, development, and testing.
PMTs consist of a "Software Version Control System" (SVCS), and an automated software generation facility
(MAKE). Together these tools control, examine, and automate the management of a software system that may
contain many versions consisting of numerous modules.
SVCS controls and documents software changes for all file types. SVCS handles storage and retrieval of
different versions of a given module, controls update privileges, prevents different users from making changes
independently, and requires all changes be thoroughly documented by recording who made what changes,
when and why.
MAKE produces the specification of a "minimum-work" job required to generate a new system. This job (Le.
submit file) typically includes compiles and links of the latest versions of specified source and object modules. If
a newer source module exists for any specified object module, MAKE will specify a compile of this module,
replacing the older module in the completed program. Unnecessary links and compiles, however, are
eliminated. MAKE does the minimum work required to ensure consistent, up-to-date software, thus saving many
hours of compiles and links.
Incorporating PMTs ,into an existing project is easy. PMTs work with existing operating systems and software
tools (editors, compilers, utilities) and require very little relearning. New users can quickly gain expertise in using
PMTs by working through the examples contained in the PMT Tutorial Manual and Diskette, which are included
with every PMT software package. Program Management Tools are ideal in a networked (NOS-II) environment,
where multi-version software control is critical. PMTs are also extremely valuable on standalone systems (with
Winchester disk) as well.
i
i
iI
SVCS
Get the source module out of database.
AEDIT
Make code changes using editor.
SVCS
Put module back into database.
MAKE
Automatically generate new version of system.
OPTIMAL CONTROL OF A SOFTWARE PROJECT.
Intel COrporation Assumes No Responslbtllty lOr tile Use of Any Circuitry OIlIer Than Circuitry Embodied in an Intel Product. No Other ClrcuR Patent
lJcenses are implied
4-7
MAY 1983
C INTEL CORPORATION, 1983.
ORDER NUM8ER:210567-G03
PROGRAM MANAGEMENT TOOLS
SOFTWARE VERSION CONTROL SYSTEM (SVCS)
• Simplifies Administ~ation of Software
Modules and Systems
• Maintains Change History Information
on Every Module
• Prevents Users From Accidently
Deleting System Software or Making
Simultaneous Module Changes
• Offers an Effective Software Version
Generation and Control Mechanism
Intel's Software Version Control System (SVCS) is a utility that greatly simplifies "software system housekeeping. SVCS automatically controls and documents software modules in a large project, eliminating costly manual
administration by a project leader or librarian.
SVCS maintains a system database of software modules called units. Each unit is divided into four classes:
Source, which contains the unit's source code; Object, which contains the unit's object code; History, which
contains the unit's history file; and Composition, which can be arbitrarily used by the user.
Users interact with the database by using SVCS administrative and access commands. Project managers use
administrative commands to create new system databases, add and delete database units, set unit access
rights, and create and name new system variants. Programmers use SVCS access commands to check out and
return database modules when making system changes. For every change made, SVCS records what
changed, who changed it, when it was changed, and why.
SVCS variant generation and control enable project administrators to effectively create and identify new versions of software systems. Stable versions may be write protected and placed in the public domain, working
versions may be identified and accessible only to programming personnel, and special versions may be created
for customized releases. In addition, version control can minimize software archival, maintenance, and support
administrative overhead.
AUTOMATED SOFTWARE GENERATION (MAKE)
• Automatically Creates New Software
Systems, Using the Latest Versions of
Source Modules
• Automatically Determines Which Source
Modules Need Recompiling
• Works Closely with SVCS for Generating
Complete, Up-To-Date Systems
• Easily Adopted into Existing
Developm,nt Methodologies
• Offers Many Powerful Macro Constructs
• Eliminates Unnecessary Compiles and
Links
MAKE is a utility that greatly simplifies the generation of software systems. MAKE produces a "minimum-work"
submit file that can generate a complete, up-to-date system without any unnecessary compiles and links. MAKE
can reduce system generation times trom hours to minutes while concurrently minimizing administrative
overhead.
4-8
ORDER NUMBER:21056NI03
PROGRAM MANAGEMENT TOOLS
MAKE accepts a text input file that instructs it how to generate a new software system. The input file specifies all
modules required to generate the new system and includes a description of system dependencies. It also
specifies specific system operations, such as compiles, links, SVCS operations, line-printer spoolings, and other
system commands. MAKE uses this input file in conjunction with the time and date stamps on each module to
determine the optimum system generation procedure that eliminates all unnecessary compiles and links.
Typically a MAKE input file is created once at the start of a project. Very occasionally during the life of the project
it may need modification. A powerful set of macros makes the creation and subsequent modification of a
generation procedure an easy task. Overall, the management of the MAKE input file is negligible compared to
maintaining numerous submit files for system generations.
The close relationship between SVCS and MAKE help simplify the overall job of software control at all levels.
For example, the very latest version of a source module may not be stable enough to be included in a
generation. A less functional, but more reliable version may exist. Since SVCS keeps unique versions distinct,
an SVCS-module containing the more reliable version may be specified in the MAKE input file.
BENEFITS: SVCS AND MAKE
Intel's Program Management Tools eliminate common problems such as:
"We've modified module FOO, which has introduced a
new set of problems. Now we can't restore it back to
the'earlier version."
"Module FOO2 has been modified; no one seems to
know who changed it, or why."
"We often have several programmers making
changes to the same modules. Trying to avoid simultaneous changes is a lot of effort, and we waste time
synthesizing two sets of changes int!> one module."
"To ensure that we release up-to-date, correct software, we periodically go into "release mode" for a
few days. Everyone stops work completely while we
find the latest versions, and then start the generation
from the ground up. It literally takes days, when we
could be making productive changes,"
SVCS and MAKE together provide a service that fits
easily into your existing design methodology, and
solves administrative problems such as those
described above.
SPECIFICATIONS·
Networked, Multi-User Software Control
NOS-II with at least one Intellec Microcomputer
Development System
iNDX, ISIS-III(N) System Software
Standalone Use
Intellec Series III with Model 750 Winchester Disk or
Intellec Series IV
SVCS and MAKE will not operate on ISIS-II local
floppies or Model 740 Hard Disks.
SVCS and MAKE may be exported from any
workstation in an NDS;II configuration.
Documentation
''A User's Guide to Program Management Tools"
(121958)
SOFTWARE SUPPORT
This product includes a 9O-day initial support consisting of new software releases, updates, subscription
services (software performance reports and technical
reports), and telephone hotline support. Additional
software support services are available separately.
ORDERING INFORMATION
Part Number
iMDX-332
Description
Intel Program
Management Tools
ORDER NUMBER:21056HI03
ISIS-II SOFTWARE TOOLBOX
• Significantly Improves Programmer
Productivity
• Provides Source File Management,
Showing Source Changes, and
Performing Version Control
• Collection of Utilities that Speed Up
Software Design
• Provides Conditional Control and
I'Structured Programming" to Submit
Files
• Enhances Capabilities of ISIS-II
Operating System
• Runs on Model 800, Series II,
Series III, and Series IV Intellec®
Development Systems
• Most Utilities will Operate on NDSII Workstations and Remote Directories
The ISIS-II Software Toolbox is a collection of system utilities that perform a variety of "productivityoriented" functions. There are two major subsets of Toolbox tools, in addition to numerous ad hoc
utilities. These subsets provide Conditional Submit File Control and Source File Management.
The Conditional Submit File Control tools provide "structured programming" at the ISIS-II command level.
Jumps, Calls, Returns, etc. are supported, as well as conditional command execution, based on assertions such as file existence, program errors, file matching, and string matching.
The. Source Management Tools support version number tracking, and allow users to identify which versions of each source module were used to create a load module. There is also a tool which compares
source files and reports all differences.
The tools outside of the two major subsets assist the programmer in some very specific development and
debugging tasks. One tool manages all PUBLIC/EXTERNAL declarations in a system. Another merges the
locate maps into a program listing, giving absolute symbolic debugging information. There's a directory
sorter, a file compactor, and a tool to display just the last block of a file.
PASSIF
LATEST
COM PAR
GENPEX
U
fJ
MERGBO
MERG8S
MRKOBJ
ERRS
LAST
CHKLOD
MANY TOOLS IN THE TOOLBOX ENHANCE SPECIFIC PHASES OF THE DEVELOPMENT
CYCLE OTHERS IMPROVE PRODUCTIVITY IN ALL PHASES.
The lollowmg are trademarks of Intel Corporallon and may be used only to Identify Intel prOducts BXP. CflEOIT, t. ICE. les. 1m. Instte, Intel, mtel, InteleVISlon, Intellee, tRMX,
Library Manager. MeS, Megachassls, Mlcromap, MUitlbus, Multlrnodule. PROMPT. Promware. RMXI80. System 2000, UP!' ~Scope, and the combmatlon of ICE. leS,
,sac tsex.
lRMX .• sec. ,SBX, MeS, or AMX and a numencal suffiX
@In,.,Corpora',onI981
4-10
ORDER NUMBER:210567-oD3
ISIS-II SOFTWARE TOOLBOX
GENPEX-produces include file for PLIM external
declarations (source level)
PASSIF-general purpose assertion checking,
testing, and reporting tool
FUNCTIONAL DESCRIPTION
Submit File Execution Control
Text Processing
IF/ELSE/ENDIF-conditional submit file execution based on file existence, program errors,
pattern matching, plus several other conditions
GOTO-causes submit execution to resume at a
specified label
RETURN-causes execution to return to the "submitter" (calling file)
EXIT-halts sub,mit file execution
LOOP-forces execution to resume at the beginning of the submit file
RESCAN-allows submit execution to begin
anywhere in file
NOTE-allows "progress report" notes to be
placed in submit files
WAIT-displays a message, and waits for user
input to continue or abort
STOPIF-halts submit file execution if specified
listing contains errors
COMPAR-performs line-oriented text file comparison (shows source changes)
UPPER-changes all letters in an ASCII text file to
uppercase
LOWER-changes all letters in an ASCII text file to
lowercase
LAST-displays the last 512 bytes of a file
SORT-sophisticated line-oriented text file sorting tool
Disk Backup and File Processing
DCOPY-fast track-by-track diskette copying
HOBACK - sophisticated hard disk to floppy disk
backup program
PACK-compacts text files by removing strings of
blanks
UNPACK-reconstitutes "packed" files
Source Management
Disk Recovery
XLATE2-submit-like tool with intelligent
parameter substitution (for version control)
MRKOBJ-"marks" object modules with source
version information
CHKLOD-lists source version data put in load
modules by MRKOBJ
CLEAN-deletes all old versions off a specified
disk
LATEST-displays latest version numbers of
specified files
GANEF*-interactively reads and writes floppy or
hard disk data blocks
Program Identification
WHICH-displays version number of Software
Toolbox Programs
"These programs will not operate on NOS-II remote
directories.
This product includes a 90-day initial support consisting of new software releases, updates, subscription
services (software performance reports and technical
reports), and telephone hotline support. Additional software support services are available separately.
Operating System Functions
CONSOL-reassigns console input and console
output as directed
DSORT*-alphabetically sorts floppy disk and
hard disk directories
RELAB*-changes disk name to any other
specified name
ORDERING INFORMATION
Program Development and Debugging
Product Code
MDS-363 t
ERRS-fast display of program errors in PLI M 80,
PLIM 86, and ASM 86 listings
MERG80-merges debug data from locate maps
into PLIM 80 listings
MERG86-merges debug data from symbol maps
into PLIM 86 and Pascal 86 listings
Description
ISIS~II SOFTWARE TOOLBOX
Requires software license.
'MDS is an ordering code only and is not used as a product name or trademark. MDS is a registered
trademark of Mohawk Data Science.
4-'1
ORDER NUMBER:210HHI03
8086 SOFTWARE TOOLBOX
• Collection of Tools That Speed Software
Development
• OMC 286 and 287 EMULATOR Aid 80286
and 80287 Software Development
• MPl, a Standalone Macro Processor, is
Ideal for Debugging Macros
• Many Other Valuable 16-Bit Software
Tools Are Included
• SCRIBl and SPEll Assist Text
Preparation
• Runs on Series III and Series IV
Microcomputer Dev,lopment Systems
The 8086 Software Toolbox isa collection of 16-bit software tools that can significantly improve programmer
productivity. These tools are valuable for text formatting and preparation, software testing and performance
analysis, 286/287 software development, and a multitude of other applications.
Text processing tools ease document formatting and preparation. SCRIBl is a text formatting program that uses
commands embedded in text to do paging, centering, left and right margins, subscripts, etc. SPEll finds
misspelled words in a text file and comes with a user expandable dictionary. COMP compares two text or source
files and displays their differences.
Test and performance analysis tools aid software testing and performance evaluation. PERF, a performance
analysis tool for 8086 software, is ideal for isolating code "hot spots." PASS IF is a general-purpose assertion
qhecking and reporting tool perfect for running test suites.
Software development for 286/287 components is assisted by two software tools: OMC 286, an 8086 to 80286
object module convertor, and 287 EMULATOR, an 80287 emulator that runs on the 80286.
Additional tools are included that aid 16-bit sQftware development efforts. All tools run on Series III and Series IV
Microcomputer Development Systems.
PERFORMANCE
MEASUREMENT & TESTING
TEXT PROCESSING
SCRIBl
PERF
SPELL
GRAPHIT
MPL
PASSIF
WSORT
COMP
286/287 DEVELOPMENT
MISCELLANEOUS TOOLS
OMC 286
FUNC
287 EMULATOR
XREF
DC
HSORT
,8086 SOFTWARE TOOLBOX TOOLS
Intel Corporation Assumes No Responsibility for the Use of Any Circuiby Other Than Circuitry Embodied in an Intel Product. No Other Circuit Patent
Licenses are implied
OCTOBER 1983
© INTEL CORPORATION, 1983.
4-12
ORDER HUMBER:210567-CI03
inter
8086 SOFTWARE TOOLBOX
FUNCTIONAL DESCRIPTION
FUNC-allows user to redefine the keys on a Series
III keyboard and define function keys. Requires the
iMDX 511 firmware.
Text Processing
SCRIBl-text formatting program that does paging,
centering, left and right margins, justification, page
headers and footers, underlines, boldface type, subscripts and superscripts, upper and lower case, and
much more. Formatting commands are embedded in
text.
XREF-produces cross-reference tables from translator list files. Cross-references aii symbolsvariables, labels, literallies, and quoted strings.
DC-floating pOint desk calculator program; allows
variable definitions.
MPl-standalone macro processor that processes
the macro language used in 8086, 80286, 8089, and
8051 assembler-s. Can be used interactively which
makes it ideal for debugging macros, MPL can be
used to ~reprocess any text file.
HSORT-general heap sort utility.
SPECIFICATIONS
SPEll-finds misspelled words in a text file. Dictionary of correctly spelled words is user expandable.
Operating Environment
Required Hardware
WSORT-utility for creating the SPELL dictionary.
Series III or Series IV Microcomputer Development
System
COMP-performs line-oriented text file comparison
(shows source changes). Also understands 8086 object module formats for comparing 8086 object files.
Required Software
ISIS-II (W), ISIS-III (N), or iNDX Operating System
Performance Measurement and Testing
PASSIF-general-purpose assertion checking, testing; and reporting tool. Helps automate the software
testing process.
PERF-performance analysis tool for 8086 software.
Monitors references in the code segment; segment
monitored is user defined. Works with small or compact bound loadable modules. Ideal for isolating code
"hot spots." Will only run on the Series III.
GRAFIT-'"graphing utility for use with PERF.
Miscellaneous Tools
OMC286 - object module convertor that converts
8086 object modules into 80286 object modules.
287 EMULATOR-an 80287 emulator that runs on
the 80286.
4-13
Documentaton
"8086 Software Toolbox."
(122203)
Software Support
This product includes a 90-day initial support consisting of new software releases, updates, subscription
services (software performance reports and technical
reports), and telephone hotline support. Additional
software support services are available separately.
ORDERING INFORMATION
Product Code
Description
iMDX-364
8086 Software Toolbox
ORDER NUMBER:210567-OO3
AEDIT TEXT EDITOR
•
•
•
AEDIT -80 Operates on any .
Intelleas> Series II, Model 800, or
IPDS Development System
AEDlT-86 Operates on any Intellec®
Series III or Series IV system
Full Screen Editing Capabilities
•
•
•
•
Menu-Driven, Easy-to-Use
Designed for the Programmer
Dual File Editing
Easy Handling of Large Blocks of
Text
AEDIT is a programmer-oriented screen editor for lise on any Intellec Development System. It is
designed to be easy to learn and easy to use. The user is guided by a menu which is used not only to
select commands, but also to select options to commands-thu6the user is guided at all times.
AEDIT provides full screen editing capabilities. In addition, AEDIT offers features to easily handle
(move, copy, delete) large blocks of text. Additional commands are available to find and selectively
replace text.
AEDIT allows commands to be prefixed with a count, so commands can be repetitively applied to
large portions of th'e file being edited. To facilitate command entry, the last command and last text
strings (for FIND and REPLACE) are retained for convenient re-use.
AEDIT has been designed with the programmer in mind. Two files can be edited during one session.
The user can easily switch between files and transfer text between the files. AEDIT has options to
automatically indent text to help with the entry of high-level language source. This can considerably
shorten the programmer's editing task.
.
AEDIT can optionally use blanks instead of tabs to indent text. This means that compiler-produced
listing files will have the same indentation as the programmer-created source file.
Many other features make AEDIT the editor of the programmer's chOice. AEDIT can edit files of any
size and optionally creates back-up copies of the file being edited. The user need not bother with complex and incomqrehensible command macro's-with AEDIT a macro is created simply by executing it.
AEDIT remembers the user's actions for re-use, and stores them on file if requested.
The following are trademarks of Intel Corporation and its affiliates and may be used only to identify Intel products: BXP, CREDIT, i,lCE,
iCS, 1m, Inslte, Intel INTEL, Intelevision, Intellec, iMMX, iOSP, iPDS, iRMX, iSBC, ISBX, Library manager, MCS, MUlTiMODUlE,
Megachassis, Micromainframe, Micromap, MULTI BUS, Multichannel, Plug·A·Bubble, PROMPT, Promware, RMX/80, System 2000, UPI,
and the combination of ICS, iRMX, ISBC, iSBX, ICE, MCS, or UPI and a numerical suffix, Intel Corporation Assumes No Responsibility for
the use of Any Circuitry Other Than Circuitry Embodied in an Intel Product. No Other Patent licenses are implied.
© INTEL CORPORATION, 1983
MAY 1983
4-14
ORDER NUMBER:210996-002
AEDIT TEXT EDITOR
MANUALS
ORDERING INFORMATION
AEDIT is supplied with a user manual documen·
ting all the aspects of the editor, and a pocket
reference card. The manual includes an in·
troductory tutorial.
iMDX·335
AEDIT·SO Text Editor.
Includes 8" single and double den·
sity diskeHes for Series liE, Series
II, or Model SOO. and a 5%"
diskette for iPDS.
iMDX·334
AEDIT·S6 Text Editor
Includes S" single and double density
diskettes for Series III.
HOST SYSTEM
AEDIT·SO is an SOSO/SOS5·based utility and can be
run on any Intellec Development System, Series liE,
Series II, Model SOD, or iPDS, as well as on ISIS
Cluster workstations.
The higher·performance AEDIT·S6 is an SOS6·based
utility that can be run on any Intellec Series IIIE, Se·
ries III, or Series IV Development system. Any Series
liE, Series II or Model SOD system can be upgraded
to Series III functionality.
AEDIT can be configured to run with non·lntel
terminals. Tested configurations are available
for the following popular terminals:
ADDS Regent 200, Viewpoint 3A +
Beehive Mini·Bee
DEC VT52, VT100
Hazeltine 1510
Lear·Seigler ADM·3A
Zentec ZMS·35
Regent 200 is a trademark of ADDS
Mini·Bee is a trademark of Beehive
DEC designated Digital Equipment Corporation
ADM·3A is a trademark of Lear·Siegler
4·15
CREDIT™
CRT-BASED TEXT EDITOR
MICROCOMPUTER DEVELbpMENT SYSTEMS
• Provides Interactive Editing of ASCII
Text Files
• Displays Full Page of Text
• CRT Screen Display with Cursor-Based
Editing Using Single Character
Commands for Insertion, Deletion,
Page Forward and Backward
• Dynamic Macro Command Definition
• Operates Under the ISIS-II Operating
System on Intellec® and Intellec® ,
Series II Microcomputer Development
Systems
• Command Line Editing with String
Search, Deletion, Insertion and Move
CREDIT is a CRT-based text editor that aids in the creation and editing of ASCII text files on Intellec Microcomputer Development Systems. Once the text has been edited to the programmer's satisfaction, it can
be directed to the appropriate language processor for compilation, assembly or interpretation. CREDIT
features are easy to use and simplify the change or rearrangement of text files. CREDIT runs under ISIS-II
on any Intellec or Intellec Series II Microcomputer Development System with an Intel supplied CRT, disk
drive(s) and 64K bytes of memory. Alternatively, it may be configured to run with non-Intel CRTs
supporting cursor controls.
There are two editing modes in CREDIT: a screen mode and a command line mode. The screen mode
makes full use of the display characteristics of the CRT. The cursor pOSition is visible on the screen and
can.be positioned by use of the cursor control keys. Display text can be corrected in two ways-either by
sim"ply retyping the text, or by using the Single-stroke control keys. Specifically, the Single-character control keys are used for change, deletion, insertion and paging forward and page backward.
In addition to screen editing, there is command line editing, whiQh includes commands for more powerful
and complex editing tasks. Some examples of functions available in the command line mode are search,
block move and copy, macro definition and manipulation of external files. These easily used, high-level
commands facilitate complex editing and speed microcomputer development.
4-16
CREDlfTM EDITOR
CREDIT™ EDITOR FEATURES
• Change CREDIT features with ALTER command
• Two editing modes: cursor-driven screen
editing and command line context editing
• Conditional iteration
• User-defined tab settings
• Symbolic tag positions
CRT Editing Inoludes:
• Automatic disk full warning
• Runs under ISIS-II SUBMIT facility
• Option to exit at any time with original file intact
• Displays full page of text
• Single control key commands for insertion,
deletion, page forward and backward
• HELP command
• Type-over correction and replacement
• Immediate feedback of the results of each
operation
BENEFITS OF CREDIT™ EDITOR
• Speeds source program creatipn and
editing-lowers the cost of these functions
• The current state of the text is always
represented on the display
• Easy to learn and use-source text is clearly displayed
-Single command keys used for CRT editing
-HELP command is available for easy
reference when needed
Command Line Editing Includes:
• String search and substitute
• String delete, change or insert
• Complements existing software - source text
used for PLlM, PASCAL, FORTRAN, BASIC,
and Assemblers
• Block move
• Block copy
• User-defined macros
• Aids in the management of source file libraries
• Offers .full use of Intel supplied CRT cursor
functions
• External file handling
ISIS-II
LOADER
DEBUG
VIA
MONITOR
OPTIONAL
ICE T"
IN-CIRCUIT
EMULATOR
PROM
PMGRAMMER
Figure 1. Microcomputer Program Development
AFN~1083B
4-17
CREDIT™ EDITOR
SCREEN MODE COMMANDS
MOVE CURSOR:
Use the directional arrow keys
on the keyboard.
REPLACE:
Type over existing text with
replacement new text.
INSERT:
Insert one character.
Insert more
character.
DELETE:
than
one
Delete one character.
Set boundaries and delete all
text between them.
PAGE:
Next Page: Get next screenful
of text.
Previous Page: Get previous
screenful.
View Page: Rewrite current
page with possible reframing.
COMMAND MODE COMMANDS
HELP:
Display summary
commands.
PRINT:
Print n lines or up to tag.
JUMP:
Move cursor position
characters or to tag.
TAGS:
EXIT:
of
any
INSERT:
Insert before CP
between delimiters.
text
DELETE:
Delete n characters,
characters up to tag.
or
Delete n lines
backward.
or
n
Transfer Copy block of text
. from tag1, for n lines or
through tag2, to cursor
position.
MACROS:
forward
Search for text; move pointer if
found.
SUBST:
newtext replaces oldtext if
oldtext is found. (Optional
query to user before replacement.)
FILES:
Open file "filename"
Reading or Writing.
Close the current
Read (Write) file.
Define a macro.
Delete a macro, or all macros if
name=*.
all
FIND:
Transfer move: like Transfer
Copy but the old copy is
deleted.
ADVANCED EDITING COMMANDS
Normal exit.
Exit Quit: Abandon
changes to edit file.
Move cursor position n lines
forward or backward.
MOVE:
Set tag n, n = 0-9. Tag n is
referenced as Tn.
for
external
Go to beginning of current
Read file.
Expand and execute macro
contents, command mode.
Expand and execute macro
contents, screen mode.
Read and insert n lines from
the Read file.
Print names and definitions of
all macros.
Write n lines to the external
Write file.
AFN·01083B
4-18
intJ
CREDIT™ EDITOR
GET: .
Get contents
command line.
QUERY:
Query User: set Query Flag
accordingly.
Do command only if Query
Flag is True.
YES:
of
file
into
Do command only if Query
Flag is False.
Do command only if Yes
(Search) Flag is False.
Do command only if
(Search) Flag is False.
Yes
LOOP:
Exit current iteration loop.
ALTER:
Configure the command input
keys to work with alternative
CRTs.
USER:
Copy text to the console.
HELP:
Display summary
commands.
SPECIFICATIONS
Required Software
Operating Environment
ISIS-II Diskette Operating System
-Single or double density
of
Required Hardware
Documentation Package
Intellec® Microcomputer Development System
-Model 800 or Series II with 64k bytes of RAM
memory
-Series III
Diskette Drive(s)
-Single or double density
System Console
-Intel supplied CRT or alternative CRT supporting
cursor controls
CREDIT'" (CRT-Based Text Editor) User's Guide
(9800902)
CREDIT'" Pocket Reference (9800903)
Shipping Media
Flexible Diskettes
-Single or double density
Optional Hardware
Line Printer
Additional diskette drive(s)
ORDERING INFORMATION
Part Number
Description
MDS-360*
ISIS-II CREDIT
CRT-Based Text Editor
Requires Software License
*MDS is an ordering code ·only, and is not used
as a product name or trademark.
MDS'" is a registered trademark of Mohawk Data
Sciences Corporation.
SUPPORT CATEGORY:
Level B
4-19
intJ
MAINFf'AME LINK FOR
DISTRIBUTED DEVELOPMENT
• Integrate. u.er mainframe re.ouree.
with Intellec· Development Sy.tem•.
• U.e. IBM 2780/3780 ..andarel BISYNC
protocol .upported by a maJority of
mainframe. and mlnlcompute,..
• Protocol .upporta full error detection
with automatic retry.
• Software run. under ISIS-II on any
Intellee· Development Sy.tem.
• Communicate. with remote .y.tem. on
dedicated or .wltched (dial-up)
telephone line..
• Package al.o Include. te.t. and a
connector for loop-back .elf-te.t
capability.
The Mainframe Link consists of software, moclem cable to connect the development system to the modem and
a loopback connector for diagnostic 'testing. The software runs under ISI8-11 on Intellec Development Systems. It emulates the operation of an IBM 2780 or 3780 Remote Job Entry (RJE) terminal to (1) transmit ISI8-11
files to a remote system or (2) receive files from a remote system using standard BISYNC 2780/3780 protocol.
The remote system can be any mainframe or minicomputer which supports the IBM 2780 or 3780 communica·
tions interface staDdard. Files may contain ASCII or binary data so that either program source files (ASCII) or
program object files (binary) may be transmitted.
The Mainframe Link allows the user to integrate in-house mainframe resources with Intellec Microcomputer
Development resources. The mainframe can be used for storage, maintenance and management of program
source and object, files. The program source can be downloaded to a development system for compilation,
assembly, linkage, and/or location. The linked modules can be transmitted and saved on the mainframe to be
shared by all programmers. The linked program can then be downloaded to a development system for
debugging using ICE emulation.
USE MAINFRAME TO
•
•
•
•
•
•
•
CREATE SOURCE PROG USING MULTIPLE CRT'.
STORE BACKUP & MAINTAIN LARGE DISK FILES
LIST PROGRAMS USING FAST PRINTERS
TRACK UPDATES & VERSION CONTROL
PROTECT ACCESS TO SOURCE/OBJECT FILES
SHARE COMMON LIBRARIES & MASTER PROGRAMS
ORGANIZE. CONTROL, MANAGE LARGE PROJECTS
USE MDS FOR:
• SYMBOLIC DEBUGGING
USING ICE
The following ore _
01 Intel Corporoban and may lie ulOll only 10 ~ Intel produ": I. Int.I.INTEL. INTEI.LEC. MCS. Im.1CB. ICE. IIPI. BXP.18Iic. _.IN8ITE. _ .
_
lCSond._'"
CREOIT.RMXAIO.,.llcope.Mu_.PIOF1'.-.~.Lobrwy _ _.MAlNMULnaoouLl.ond"' _
IUIIIx: e.g.. is/IC.8O.
"'MCS.ICE.SBC._ ..
MAY 1883
© INTEL CORPORATION, 1983
AFN'()l549C
4-20
intJ
MAINFRAME LINK
FEATURES
Automatic translation from ASCII to EBCDIC
and vice verse
• Runs under ISI8-11 on any Intellec· Microcomputer Development System.
Receive' chaining for receiving multiple files
• Communicates with a remote system using IBM
278013780 standard BISYNC protocol, which is
supported by a majority of minicomputers and
mainframes, on dedicated or switched (dial-up)
telephone lines.
• The modem cable supplied with the package can
be used to connect the Intellec. Development
System to the modem (or modem eliminator)
using the standard RS232C port.
• Supports user selectable data transmission rates
of up to 9600 baud.
• Package includes diagnostic tests used to verity
the operation of the Intellec· Development System using the loop-back connector supplied and
data transmission up to the modem using the
analog loop-back feature.
• System can be configured to match the requirements of the installation, i.e., using modem
eliminators for connections up to fifty (SO) feet, or
by using modems and telephone lines.
• Software can be configured from several configuration options such as:
• Intel mode is used mainly for file transfers between two Intellec· Development Systems. The
files are duplicated exactly.
;;; Console commands support all standard features
including:
SEND data in Transparent or Non-transparent
mode, with or without translation to EBCDIC
RECEIVE in Transparent or Noh-transparent
mode, with or without translation to EBCDIC.
Support for an IBM RJE console (such as HASP)
• Special utility programs are provided. STRZ strips
extra binary zero's from the end of object files.
CONSOL assigns system console input to an ISISII disk file.
• Can process commands interactively from the
console or sequentially from an ISI8-11 file under
the SUBMIT facility for semi-automatic batch
operation.
• Error detection in line transmission and error recovery by automatic retransmission.
• A special command such as DIAGNOSE. allows
logging of all data activity on the line, during
transmission and reception.
2780, 3780 or Intel Mode
• When not used for communicating with the mainframe, the Intellec· Development System is available as a complete, stand-alone system.
Transparent mode for binary data
Non-transparent mode for ASCII data
BENEFITS
• Allows the customer to use an in-house mainframe or minicomputer for program sourcepreparation, editing, back-up and maintenance
using inexpensive CRT's and multi-terminal access. The common files may be shared and others
protected.
• Many programmers can use and share the highperformance devices normally available on large
computer systems, e.g., fast printers to reduce
listing time, the large capacity disks with their fast
access time to store large program files.
• The source files can be downloaded using the
Mainframe Link to an Intellec Development System (e.g., Model 240 or 245) for compilation, linking and locating.
4-21
• The compiled and/or linked object files may be
transmitted back to the remote for storage. Updates and version numbers and dates can be
tracked to ensure that the latest ,verSion is always
used and back-up files are available. Binary object
files can be later downloaded to an Intellec Development System for debugging using' an ICE
emulator.
• In short, provides a powerful and flexible tool
combining the best of both micro and mainframe
worlds, i.e., powerful CPU with large disk capacity, file sharing, multi-terminal access, etc.,
from a 'mainframe or minicomputer with Intel's
versatile and compatible software support systems (including PUM, PASCAL, FORTRAN, Assembler, R & L) and sophisticated debugging
tools such as ICE emUlators.
AFN-01549C
inter
MAINFRAME LINK
SPECIFICATIONS
Remote System Requirements
Operating Environment
• IBM 278013780 BISYNC protocol as supported by
a majority of mainframes and minicomputers including: all IBM-360/370 Systems, PDP-11/70,
VAX-111780, Data General ECLIPSE.
Required Hardware:
• Users should purchase this standard software
package from the remote system vendor and any
additional required hardware such as a synchronous communications interlace.
Intellec· Microcompute'r Development System
Model 800
Models 220, 225. 230, 235, 240 or 245
• The operating system at the remote must be configured (SYSGEN'ed) with correct options such as
line address, 2780 or 3780, ...
64KB of Memory
One Diskette Drive
Single or Double Density
Communication Equipment Requirements
System Console
Intel CRT or non-Intel CRT
The Intellee Development System may be connected
to the remote system using anyone of the following
methods:
Recommended Hardware for Compilation:
Hard Disk (Models 240, 245, or Model 740 Upgrade)
Additional Hardware Required for Model 800
iSBC-955 T11 , iSBC-534T11
• For short distances (up to 50 feet), use a synchronous modem eliminator (e.g., SPECTRON
ME-81 FS-2).
• For distances up to folir miles, use short haul
synchronous modems and telephone lines.
Required Software:
• For distances greater than four miles, use synchronous modems and telephone lines. The following BELL modems or their equivalents are
recommended:
ISIS-II Diskette Operating System
Single or Double Density
BELL 201C 2400 bits/second
(half duplex, switched line)
BELL 208A 4800 bits/second
(full duplex, leased line)
BELL 208B 4800 bits/.second
(half duplex, switched line)
BELL 209A 9800 bits/second
(full duplex, leased line)
Documentation Package
Mainframe Link User's Guide (121565-001)
Shipping Media
Flexible Diskettes
Single and Double Density
• Modems at either end must be compatible.
ORDERING INFORMATION
'art Number
DeSCription
*MDS-384 Kit
Mainframe Link for
Distributed Development
"MDS is an ordering code only and is not used as a product name or trademark.
MOS· is a registered trademark of Mohawk Data Sciences Corporation.
4-22
AFN-Q1549C
inter
INTEL ASYNCHRONOUS COMMUNICATIONS LINK
Communications software for VAX·
• host
computer and Intel
microcomputer development systems
Compatible with VAXlVMS· and UNIXt
• operating
systems
Intel's Model 800,
• Supports
Series II, and Series III microcomputer
Intellec~
development systems
• Supports NOS-II workstations
Allows development system console to
• function
as a host terminal
Operates through direct cable
• connection
or over telephone lines
selectable transmission rate
• Software
from 300 to 9600 baud
Intel's Asynchronous Communications Link (ACL) enables one or more Intel microcomputer development systems to communicate with a Digital Equipment Corporation VAX family computer. The link
supports Intel Model 800, Intellec Series II, or Intellec Series III development systems and NOS-II
workstations. Programmers can use the editing and file management tools of the host computer and
then download to the Intel microcomputer development system for debugging and execution. Programmers can use their microcomputer development system as a host terminal and control the host
directly without changing terminals.
VAX
WORK
INTELLEC"
WORK
ASYNCHRONOUS
CIRCUIT
STATION
I
SERIES-lIIas
STATION
INTELLEC@
I
SERIES·III
ETHERNET"
I
I
WORK
WORK
STATION
STATION
INTELLEC" SERIES.m
INTELLEC" SERIES III
1
HRM
The following are tradem"arks of Intel Corporation and may be used only to describe Intel products: Intel, ICE, IRMX, iSBC, iSBX, iSXM,
MULTIBUS, MULTICHANNEL, MULTIMODULE and iCS. Intel Corporation assumes no responsibility for the use of any circuitry other
than circuitry embodied in an Intel product. No other circuit patent licenses are implied.
•
·VAX and VAXIVMS are trademarks of Digital Equipment Corporation"
t UNIX is a trademark of Bell Laboratories.
"Ethernet is a trademark of Xerox Corp.
MAY 1983
~ INTEL CORPORATION, 1983
4-23
ORDER NUMBER:210903-002
INTEL ASYNCHRONOUS COMMUNICATIONS, ,LIN'I(
FUNCTIONAL DESCRIPTION
HARDWARE CONNECTION
The Asynchronous Communication Link (ACL)
consists of cooperating programs: one that runs
on the host computer, and others that run on
each microcomputer development system. The
development system programs execute under
the ISIS-II or ISIS-III(N) operating sys\em and use
Its file system. They invoke the companion program on the VAX-11/7XX, which 'runs under either
the VAXlVMS or UNIX operatln~ system.
The Link sends data over an RS232C cable. The
communication line from the host computer
connects directly to a development system port.
TELECOMMUNICATIONS
USING THE LINK
The ACL is ideal for cross-host program development using a commercial timesharing service.
This configuration requires RS232C compatible
modems and a telecommunications line.
Depending on the anticipated level of usage,
wide-area telephone service (WATS), a leased
line, or a data communications network may be
chosen to keep operating overhead low.
I
The link provides three modes of communication: on-line transmission, single-line transmission, and file transfer. In on-line mode, the
development system' functions as a host terminal, enabling the programmer to develop programs using the host computer's editing, compilation, and file-management tools directly
from the development system's console. Later,
switching to file transfer mode, text flies and obJect code can be downloaded from the host to
the development system for debugging and- execution. Alternatively, flies can be sent back to
the host for editing or storage. In single line
mode, the programmer can send single-line commands to the host computer while remaining in
the ISIS-II or ISIS-III(N) environment.
The user can select transmission rates over the
link from 300 to 9600 baud. The link transmits in
encapsulated blocks. The receiver program
validates the transmission by checking recordnumber and checksum information In each
block's header. In the event of a transmission
error, the receiving program recognizes a bad
block and requests the sender to retransmit the
correct block. The result Is highly reliable data
commun ications.
SOFTWARE PACKAGE
The Asynchronous Communications Link
Package contains either a VAX/VMS or UNIX
compatible magnetic tape, a single- or doubledensity diskette compatible with, the Intellec
development system, and the Asynchronqus
CommunIcations Link User's Guide containing
installation, configuration, and operation infor·
matlon.
ND8-11 ACCESS USING THE LINK
The ACL is Ideal for Interconnecting VAX host·
computers with NOS-II. This configuration requires that an NOS-II workstation be connected
to the VAX host computer using the RS232C interface and to NOS-II using the Ethernet Interface.
All three modes of communication operate identically ,on NOS-II. In the on-line, mode, the
development workstation operates as a host terminal, and concurrently, as an NOS-II workstation. It is easy to tranSition between the VAX and
ISIS-III(N) operating systems environments as
LOGONILOGOFF sequences are not required to
re-enter environments.
In file transfer mode, text and object files can be
transferred from the VAX directly to the Winchester Disk at the NRM wit~out first copying
the files to the workstation local floppy disk.
- Similarly, flies residing on the NOS-II Network
File System (the Winchester Disk at the NRM)
can be transferred directly to the VAX without
using local workstation storage.
U.slng the EXPORTIIMPORT mechanisms of
NOS-II, a network workstation which, is not
directly connected to the VAX can cause flies to
be transferred between the VAX and NRM. For
example, any NOS-II workstation can "EXPORT"
ACL commands to another "IMPORT"lng NOS-II
/
4-24
AFN-210903B
INTEL ASYNCHRONOUS COMMUNICATIONS LINK
workstation which is physically connected to a
VAX. The "IMPORT"ing workstation executes
the ACL command file causing the desired ac·
tion to occur.
VAX ACCESS USING THE LINK
Users who want multiple workstations concur·
rently operating as VAX terminals (the ONLINE
mode) must physically connect each work·
station to the VAX. However, users who want
multiple workstations to be able to upload/
download files, for example, must only physical·
Iy connect one workstation to the VAX: By using
the EXPORT/IMPORT mechanism of NOS-II as
described above, the user can have multiple
workstations accessing the VAX using only one
connection.
SPECIFICATIONS
Required Intel Development System
Configuration
Software
Model 800, Intellec Series II, or Intellec Series III
under ISIS-II
Asynchronous Communications Link develop·
ment system programs
VAXIVMS or UNIX companion program
Required Connection
Media
RS232C compatible - cable 3M-3349/25 or
equivalent; 25-pin connector 3M-3482-1000 or
equivalent
Single- or double-density ISIS-II compatible disk·
ette
Recommended Modems for
Telecommunications
60b-ft. 1600 bpi magnetic tape, VAX/VMS or UNIX
compatible
300 baud - Bell* 103 modem; VAOICt 3455
modem or equivalent
Manual
1200 baud - Bell 202 modem; VAOIC 3451
modem or equivalent
Asynchronous Communications
Guide, Order No. 172174-001
Link User's
Required Host Configuration
VAX-11/7XX running VAX/VMS (Version 2.4) or
fourth Berkeley distribution of UNIX 32V
9600 baud - Bell 209A (full duplex, leased line)
or equivalent
Note: Since one of the two Model 800 ports uses a cur·
rent loop interface, Model 800 users need a ter·
mlnal or modem that is current loop compatible,
or a current 100plRS232C converter.
ORDERING INFORMATION
Product
Name
,
Ordering Code*
Asynchronous Communications Link
iMOX 395 for UNIX systems
iMOX 394 for VAX/VMS systems
"Bell is a trademark of American Telephone and Telegraph.
t VAOIC Is a trademark of Racal·Vadlc Inc.
*
See price book for proper suffixes for options and media
salectlon.
4-25
AFN'01083C
iNA 960 NETWORK SOFTWARE
•
-Collection of network usage
statistics
.
-Setting and inspecting of transport
and data link parameters
-Fault isolation and detection
-Boot Server
ISO Transport (8073) Class 4 services
-Guaranteed message integrity
-Data rate matching (flow control)
-Multiple connection capability
-Variable length messages
-Expedited delivery
-Negotiation of virtual circuit
characteristics during opens
•
•
Additional functionality
-Connection less transport
(Datagram)
-External Data Link
•
IEEE 802.3 Data Link protocol
(CSMAlCD) supported
•
•
Comprehensive Network Management
services
•
Compatible with multiple system
environments
-Runs as an iRMX™ 86 job
-Supports host operating system
independent designs based on 8086,
8088 or 80168 and 82586 components
Runs on iSBC® 186/51 COMMputer™
Board
Size configurable to suit specific
application requirements
iNA 960 is a general purpose local area network software' package implementing the class 4 services of the
ISO transport proposed specification and network management functions in system designs based on the 8086,
8088 and 80186 microprocessors and the 82586 communications co-processor. iNA 960 also supports Intel's
board level LAN products, the iSBC® 550 KIT and the iSBC® 186/51. Combined with the iSBC 186/51 COMMputer T• board, iNA 960 offers a high performance, costeffective network solution for MULTIBUS®/iRMX'M 86
users. See Figure 1 for iNA 960 functionality and operating environments.
iNA 960 is a ready-to-use software building block for OEM suppliers of networked systems for both technical and
commercial applications. Examples for such applications include networked design stations, manufacturing
process control, communicating word processors, and financial services workstations. Using the iNA 960
software the OEM can minimize development cost and time while achieving compatibility with a growing number
of equipment suppliers adapting the IEEE and ISO standards.
I
ISO MODEL
TYPICAL INA 960
HARDWARE ENVIRONMENTS
END-USER APPLICATION PROCESS
!
APPLICATION
PRESENTATION
SESSION
TRANSPORT
.1
NETWORK
MANAGEMENT
~
ISBC' 186151
COMMputer
BOARD
IMPLE-
NETWORK
DATA
LINK
LAYER
DATA LINK INTERFACE
.... ---- -- _.... ---i -_PHYSICAL
DATA LINK
I
PHYSICAL
>-~~~J:~6
IMPLEMENTED
BY 82586/82501
BASED HARDWARE
ISBC' 550
ETHERNET
CONTROLLER
Figure 1.
Intel Corporation Assumes No Responsibility for the Use of Any Circuitry Other Than Circuitry Embodied in an Intel Product. No Other Circuit
Patent Licenses are Implied. Information Contained Herein Supercedes PreVIously Published Specifications On These Devices From Intel.
4-26
©INTEL CORPORATION, 1983.
AUGUST 1983
ORDER NUMBER: 230777-001
inter
iNA 960 NETWORK SOFTWARE
FUNCTIONAL OVERVIEW
dedicated 8086, 8088 or 80186 processor coupled
with an 82586 to provide a communications front end
processor.
The iNA 960 design is a standard implementation of
the Class 4 transport protocol defined by the ISO OSI
model. The Transport Layer provides a reliable fullduplex message delivery service on top of the "best
effort" IEEE 802.3 standard packet delivery service
implemented by the 82586 (or equivalent) physical
and data link functions.
The software also includes a Network Management
service. This facility enables the user to monitor and
adjust the network's operation in order to optimize its
performance.
Consisting of linkable modules, the software can be
configured to implement a range of optional capabilities and interface protocols. In addition to reliable
process-to-process message delivery, the options include a datagram service, a boot server, a direct user
access to the Data Link Layer, and a comprehensive
network management facility.
The current release of iNA 960 includes a "null" Network Layer supporting the Data Link and Transport
Layers without providing internetwork routing service. This capability will be implemented in later
releases of iNA 960.
For a conceptual block diagram of iNA 960, refer to
Figure 2.
iNA 960 can be configured to run under iRMX 86
along with the user software, or to run on top of a
iRMX'" 86 OR
REMOTE HOST
INTERFACE
I
CLIENT
I
I
INTERFACE MODULE
j
+
~
r- - - - - - ...." - - - - - - - ,
TRANSPORT LAYER
ISO DP 8773
NETWORK
LAYER
DATA LINK
LAYER
I
DATAGRAM
(OPTIONAL)
I
I VIRTUAL CIRCUIT
IL.. _ _ _ _ _ ....L....-_ _ _ _
1~
....I
~
iNA 960
___N_U_L_L~LA_Y_E_R
___
~r.--
r - - - - -
~
r-t-------.
I
'1
I
EXTERNAL
DATA
LINK
DATA LINK
INTERFACE
I
I
::;
I
: o~Q
:
I
bffi~ •
I
mwl-
(/)e. •I
L.. _ _ _ -J
I
'- - - - - - L-rl-----...J
t
DATA LINK AND
PHYSICAL LAYERS
}HAFiDWARE
NETWORK
Figure 2. iNA 960 Conceptual Block Diagram
4-27
iNA 960 NETWORK SOFTWARE
TRANSPORT LAYER
The Transport Layer proVides message delivery
services between client processes running on computers (network "hosts" or "nodes") anywhere in the
network.
Client processes are identified by a combination of a
network address defining the node and a transport
service access point defining the interface point
through which the client accesses the transport
services. The combined parameters, called the
transport address, are supplied by the user for both
the local and the remote client processes to be
connected.
The iNA 960 transport layer implements two kinds of
message delivery services: virtual circuit and
datagram. The virtual circuit provides a reliable pointto-point message delivery service ensuring maximum data integrity, and it is fully. compatible with the
ISO 8073 Class 4 protocol. The datagram service
provides a best effort message delivery between
client processes requiring less overhead and
therefore allowing higher throughput than virtual
Circuits.
..
Virtual Circuit Services
-Reliable Delivery: Data is delivered to the destination in the exact order it was sent by the source,
with no errors, duplications or losses, regardless of
the quality of service available from the underlying
network service.
-Data Rate Matching (flow control): The Transport
Layer attempts to maximize throughput while
conserving communication subsystem resources
by controlling the rate at which messages are sent.
That rate is based on the availablity of receive buffers at the destination and its own resources.
-Multiple Connection Capability (Process Multiplexing): Several processes can be simultaneously
using the Transport Layer with no risk that progress or lack of progress by one process will interfere with others.
-Variable Length Messages: The client software
can submit arbitrarily short or long messages for
.transmittal without regard for the minimum or maximum network service data unit (NSDU) .Iengths
supported by the underlying network services.
-Expedited Delivery: With this service the client can
transmit up to 16 bytes of urgent data bypassing
the normal flow control. The expedited data is
guaranteed to arrive before any normal data submitted afterward.
Connection less Transport
(Datagram) Service
The datagram service option transfers data between
client processes without establishing a virtual circuit.
The service is a "best effort" capability and data may
be lost or misordered. Data can be transferred at one
time to a single destination or to several destinations
(multicast).
NETWORK MANAGEMENT (NM)
The network management option provides the users
of the network with planning, operation, maintenance
and initialization services described below.
-Planning: This service captures network usage
statistics on the various layers to help plan network
expansion. Statistics are maintained by the layers
themselves and are made available to users via an
interface with the NM .
-Operation: This service allows the user to monitor
network functions and to' inspect and adjust network parameters. The goal is to provide the tools
for performance optimization on the network.
-Maintenance: This service deals with detecting,
isolating and correcting network faults. It also provides the capabilitY\to determine the presence of
hosts and the viability of their connection to the
network.
-Initialization: NM provides initialization and remote
loading facilities.
Network management provides distributed management of the network; the user can request any of the
services to be performed on a remote as well as a
local node. The NM interfaces to every other network
layer both to utilize their services and to access their
internal data bases.
In support of the above services, the NM capabilities
include layer management, echo testing, limited
debugging facilities, and the ability to down line load
and up line dump a remote system.
4-28
inter
iNA 960, NETWORK SOFTWARE
Layer management deals with manipulating the internal database of a layer. The elements of these data
bases are termed objects. Some examples for objects are the number of collisions, retransmission
time-out limit, the number of packets sent, and the list
of nodes to boot. NM can examine and (I)odity objects in a layer's data base.
An echo facility is provided. Using this facility the host
can determine if a node is present on the network or
not, test the communication path to that node and
determine whether the remote node is functional.
NM enables the user to read or write memory in any
host present on the network. This feature is provided
as an aid to debugging.
NM can down line load any system present on the
network. A simple Data Link protocol is used to
ensure reliability. This facility can be used to load
databases, to boot systems without local mass
storage or to boot a set of nodes remotely, thus
ensuring that they have the same version of software, etc.
·Up line dumping is an operation equivalent to
memory read from the user's standpoint; however, up
line dumping uses the Data Link facilities while
memory read uses the transport facilities.
USER ENVIRONMENT
iNA 960 is designed to run on hardware based on the
8086, 8088 or 80186 microprocessors and the 82586
LAN Coprocessor. The software can be configured to
run under iRMX 86 or on a dedicated 8086', 8088 or
80186 processor separately from the host. The roilowing section describes these two operating
environments.
iRMX Environment
In this configuration, both the user program and iNA
960 are running under iRMX 86. The communications software is implemented as an iRMX 86 job
requiring the nucleus only for most operations. The
only exception is the boot server option which also
needs the Basic I/O System. iNA 960 will run in any
iRMX environment including configurations based on
the 80130. See Figure 3 for an illustration of iNA 960
running under iRMX 86.
Some of the typical hardware implementations include the iSBC 550 KIT combined with an 8086, 8088
or 80186 based host or the iSBC 186/51 COMMputer'· board integrating the host processor and the
communications controller into a Single, high performance MULTI BUS board. See Figure 4A and 4B for
a conceptual block diagram of these configurations.
Operating System/Processor
Independent Implementation
The External Data Link option allows the user to access the functionalities of the Data Link Layer directly
instead of having to go through the network and
transport layers. This flexibility is useful when the
user needs custom higher layer software, or does not
need the Network Layer and Transport Layer
services (e.g., when sending "best effort" messages,
or running customer diagnostics).
In those systems where iRMX 86 is not the primary
operating system, where off-loading the host of the
communications tasks is necessary for performance
reasons, or where an existing communications frontend processor configuration is being upgraded, the
user may wish to dedicate a processor for communications purposes. iNA 960 can be configured to support such implementations by providing network
services on an 8086, 8088 or 80186 processor. Figure 5 depicts the conceptual block diagram of this
configuration.
Through the EDL the capabilities supporting the
lower layers in iNA 960 are made directly available to
the user. EDL enables the user to establish and
delete data link connections, transmit packets to individual and multiple receivers, and configure the data
link software to meet the requirements of the given
network environment.
This approach provides the component and system
designer with an ISO standard communications software building block that can be adapted to his system's needs with a minimum interfacing effort. For
added flexibility, iNA 960 provides the user with the
alternative of using the included interface module or
writing his own module, if necessary.
EXTERNAL DATA LINK (EDl)
4-29
iNA 960 NETWORK SOFTWARE
Figure 3. As an iRMX T• Job, iNA 960 uses nucleus calls and, when the Boot Server Is present,
BIOS calls.
. NETWORK
Isec 86/30
ISBC' 550 KIT
WITH iRMX" 86
AND INA 960
MULTIBUS'
Figure 4A. 'TYpical configuration using ISBC® 550 kit, ISBC® 86/30, iRMX 86
4-30
T
•
and iNA 960.
INA 960 NETWORK SOFTWARE
~~_______N~E~TW~OR~K~______~t-
ISBC" 186/51
WITH IRMX86
AND INA 960
Figure 4B. Configuration using iSBC® 186/51, IRMX 86 and iNA 960.
-1
r-
NETWORK
,. . ________ J_________ -..
(
~
MEMORY
(iNA 960 PLUS
LOCAL
RAM/ROM)
I
82586
8086 OR
80186
I
I
I
I
I
I
I
I
I
.
SYSTEM
BUS
INTERFACE
_________
I
DEDICATED
I
COMMUNICATIONS I
PROCESSOR
I
_________ J
)
Figure 5. In the operating system/processor independent implementation iNA 960 Is running on a
dedicated 8086, 8088 or 80186 processor.
4-31
iNA 960 NETWORK SOFTWARE
USER INTERFACE
iNA 960 is designed to run both under iRMX 86 and
on a dedicated communications front end processor
separately from the host. In both environments, the
interface is based on exchanging memory segments
called request blocks between iNA 960 and the
client. The format and contents of the request blocks
remain the same in both configurations; only the request block delivery mechanism changes. See Figure 6 for a simplified interface diagram.
Request blocks are memory segments containing the
data to be passed from the user to iNA 960
(commands), or from iNA 960 to the user
(responses). The iNA 960 request blocks consist of
fixed format fields identical across all user commands and argument fields unique to the individual
commands. Refer to Figure 7 for the standard request block format.
Issuing an iNA 960 command consists of filling in the
request block fields and transferring the block to iNA
960 for execution. After processing the command,
iNA 960 returns the request block with one of the
pre-defined response codes placed in the response
code field of the request block. The response code
indicates whether the command was executed suc- .
cessfully or whether an error occurred. By examining
the response code, the user can take appropriate
action for that command.
For iRMX users, iNA 960 also provides a procedural
interface option to simplify writing the application
software interface. In this case, the allocation and
formatting of request blocks are replaced by a procedure call with parameters that specify the user's command options. The procedure execution will create a
request block and fill in the appropriate fields from the
user's parameter list.
CLIENT
iNA 960
For component users the request block delivery
mechanism is the means by which- the host processor and the communications processor running iNA
960 software exchange the request blocks. iNA 960
provides several such mechanisms as well as permitting user-defined techniques to be utilized.
Figure 6.
WORD/BYTE
Reserved (2)
Length
User I.D.
Response Port
Return Mailbox Token
Segment Token
Subsystem
Opcode
Response Code
Arguments
WORD
BYTE
. WORD
BYTE
WORD
WORD
BYTE
BYTE
WORD
BYTE
FIXED FORMAT
FIELDS
(same for all
commands)
I
Figure 7. iNA 960 Request Block Format
4-32
ARGUMENTS
(changes by
command)
iNA 960
NETWOR~
SOFTWARE
Transport Layer User Interface
The following table summarizes the user commands and the corresponding transport layer responses.
Command
,
Function
1. OPEN
Allocates memory for the connection data base of a virtual circuit (or
connection) to be established. The connection database contains
data concerning the connection.
2. SEND CONNECT
Requests connection to a fully specified remote transport address
using specified ISO connection negotiation options.
REQUEST
-
3. AWAIT CONNECT
REQUESTrrRAN
Indicates that the transport client is willing to consider incoming connection requests based on pre-established acceptance criteria.
4. AWAIT CONNECT
Indicates that the transport client is willing to consider incoming connection requests. If the request meets the address and negotiation
option criteria, it is passed to the client for further consideration.
REQUEST/USER
5. ACCEPT CONNECT
REQUEST
6. SEND DATA or
SEND EOM DATA
Indicates that the connection requested by a remote transport service is accepted by the client.
With this command, the client requests the transmission of the data
in the buffers using the normal delivery service of the specified
connection.
The SEND EOM DATA command signals that the end of the data
marks the end of the transport service data unit.
7. RECEIVE DATA
Posts normal receive data buffers for a specific connection or for a
buffer pool used by a class of connections.
8. WITHDRAW RECEIVE
Withdraws normal receive data buffers previously posted by a
RECEIVE DATA command.
BUFFER
9. SEND EXPEDITED
DATA
Transmits up to 16 bytes of data using the expedited delivery service.
The expedited data is guaranteed to arrive at the destination before
any normal data submitted afterward.
10. RECEIVE EXPEDITED
DATA
Posts receive data- buffers for expedited delivery for a specific connection or for a pool of buffers used by a class of connections.
11. WITHDRAW EXPEDITED
DATA BUFFER
Withdraws expedited receive data buffers previously posted by a
RECEIVE EXPEDITED DATA command.
12. CLOSE
Terminates an existing connection or rejects an incoming connection
request. Any normal or expedited data queued up to be sent will not
be sent.
13. AWAIT CLOSE
Requests notification of the client of the termination of a specified
connection.
14. STATUS and DEFERRED
Places status information about transport and, optionally, about a
specified connection into a supplied buffer.
STATUS
4-33
I
INA $60 NETWORK SOFTWARE
Command
Function
15. SEND DATAGRAM
Requests transmission of the data in the buffers using the transport
datagram service.
16. RECEIVE DATAGRAM
Posts a receive buffer for a specific receiver or a class of receivers to '
receive data from a transport datagram.
17. WITHDRAW DATAGRAM
,
BUFFER
Withdraws datagram receive buffers previously posted by a
RECEIVE DATAGRAM command.
Network Management Layer User Interface
Function
Command
"
1.
READ OBJECT
Returns the value of the Specified object to the client.
2.
SET OBJECT
Sets the value of an object as specified by the client.
3.
READ AND CLEAR
OBJECT
Returns the value of the specified object to the client then clears the
Object.
4.
ECHO
This function is used to determine the presence of a node, to test the
communication path to the node and to ascertain the viability and
functionality of the remote host addressed.
5.
UP LINE DUMP
Requests a remote node to dump a specified memory area.
6.
READ MEMORY
Reads memory of the specified network node.
7.
SET MEMORY
Sets memory of the specified network node.
8.
FORCE LOAD
Causes a node to attempt a remote load from another node.
External Data Link Interface
Command
Function
1.
CONNECT
With this command the client establishes a data link connection.
2.
DISCONNECT
Eliminates a previously established connection.
3.
TRANSMIT
Transmits data contained in buffers specified by the client.
4.
posr RECEIVE PACKET
DESCRIPTOR
Allocates memory for maintaining records on receive data buffers.
Also may be used to allocate memory for buffering receive data.
5.
POST RECEIVE BUFFER
Allocates memory for buffering receive data.
6.
ADD MULTICAST
ADDRESS
Adds an address to the list of data link multicast addresses.
7.
REMOVE MULTICAST
ADDRESS
Removes an address from the list of data link multicast addresses.
8.
SeT DATA LINK 1.0.
Sets up a unique data link 1.0. for the station.
4-34
iNA 960 NETWORK SOFTWARE
CONFIGURING iNA 960
in the desired module to set up for the iRMX 86 or the
operating system independent configurations.
In order to adapt iNA 960 to his specific application,
the user must configure the software to define the
Layer parameters and confiuration options are first
edited into layer configuration files, then assembled
and linked into INA 960. Layer parameters adjust the
network's operation to match the usage pattern and
the available resources. For example, within the
Transport Layer,' the flow control parameters, the
retransmission timer parameters, the transport data
base parameters, etc. can be set via this process.
desired functions, to select the appropriate interface,
to set the layer parameters and to set up for the
required hardware configuration.
There are four optional functionalities the user may
elect to implement in his application: the datagram
service, the External Data Link interface, network
management, and the boot server. These capabilities
can be made available simply by linking in the corresponding software modules. The interface options are
also implemented in a modular fashion; the user links
HARDWARE
REQUIRED:
The user also sets up for the required hardware configuration, such as port addresses and interrupt
levels, during this process. For the flow diagram of
configuring iNA 960, refer to Figure 8.
INPUTS
_
I
OPTIONAL FUNCTIONS
_ USER ENVIRONMENT
_ LAYER PARAMETERS
_ H/W CONFIGURATION
-MDS SERIES III
OR
-86/300 AND
iRMX'" 86
-UNIVERSAL PROM
PROGRAMMER
IF USER SYSTEM
IS IN FIRMWARE
SOFTWARE
UTILITIES
REQUIRED:
-TEXT EDITOR
-ASM 86
-LINK 86
-LOC.86
Figure 8. The Configuration Process for iNA 960
4-35
inter
iNA 960 NETWORK SOFTWARE
SPECIFICATIONS·
Available Llterature/
Reference Materials:
-iNA 960 Programmer's Reference Manual (11/83)
-iSBC 186/51 Data Sheet (Now)
-iSBC 186/51 Hardware Reference Manual (11/83)
Hardware Supported:
-iSBC 186/51 Communicating Computer.
-iSBC 550 KIT Ethernet controller board(s) configured to run with iSBC 86/30 or iSBC 86/12B Multibus processor boards.
-Custom designs based on 8086, 8088 and 80186
microprocessors and the 82586 Local Communications Controller.
Ordering Information
The following is a list of ordering options for the iNA
960 Network Software. All options include a full year
of update service that provides a periodic NEWSLETTER, Software Problem Report Service, and copies
of system updates that occur during this period. All of
the object code options listed are available on either
ISIS or RMX compatible double density diskettes.
lYplcal Throughput at transport:
Environments:
186/51 and
50K to 200K bytes/sec
iRMX86
Dedicated 80186/
100K to 300K bytes/sec
82586 COMMengine
As with all Intel software, purchase of any of these
options requires the execution of a standard Intel
Master Software License. The specific rights granted
to users depend on the specific option and the
License signed.
Memory Requirements: (in bytes)
Base Transport System
Net Management Option
Datagram Option
External Data Link Option
Boot Server Option
32K plus configurable Buffer
Memory
1K to 5K
2K plus Data Base
Memory
3K
5K
4-36
inter
iNA 960 NETWORK SOFTWARE
Description
Order Code
iNA 960 BRO
OEM object code license requiring the payment of incorporation fees for
each derivative work based on iNA 960; ISIS formatted diskettes
iNA 960 ERO
Same as above; RMX tormatted diskettes
iNA 960 BST
.
Object code license to use the product at a second site or facility; ISIS
formatted diskettes
iNA 960 EST
Same as above; RMX formatted diskettes
INA 960 BBY
Object code buy-out license requiring no further payment of incorporation
fees; ISIS formatted diskettes
iNA 960 EBY
Same as above; RMX formatted diskettes
iNA 960 BSU
Object code single use license only; ISIS formatted diskettes
iNA 960 ESU
Same as above; RMX formatted diskettes
iNA 960 BSR
License for machine readable source code of iNA 960; ISIS formatted
diskettes
iNA 960 ESR
Same as above; RMX formatted diskettes
iNA 960 LST
Source listing of iNA 960 provided on microfiche under a special source
code license agreement
iNA 960 LWX
One year extension of software support service for source listings
iNA 960 BWX
Same as above for ISIS customers
iNA 960 EWX
Same as above for RMX customers
iNA 960 RF
Order code for the payment of incorporation fees
4-37
NOS-II ELECTRONIC MAIL
• Improves Project Coordination and
Communication
• MAIL Operates Either Interactively or in
Command-Tail Format
• Minimizes "Phone Tag" and Excess
Paperwork
• User, Group, and "Bulletin Board"
Mailboxes Can Be Created
• Users Can Send and Receive Text or
Object Files
• Operates on any Workstation in the
NOS-II Development Environment
Electronic Mail enables users to send and receive messages and files between any nodes on the NOS-II
network. In dOing so, Electronic Mail improves the communication and coordination between members, reduces
"phone tag" and paper generation, aids project configuration management by enabling simplified file transfers,
and increases flexibility in workstation location.
Mail maintains a directory, called the "post office," which contains user, group, and bulletin board mailboxes.
Each NOS-II user has a mailbox which is only accessible to that user. Group mailboxes are accessible by a
defined group of users, and bulletin board mailboxes are accessible by all users. Both group and bulletin board
mailboxes can be easily created by any system user.
Users can send a message to any of the mailbox types listed above. Messages can consist of text generated
when Mail is invoked, or a text or object file. Options available when sending mail include using a subject string
to categorize a message, specifying a message expiration date and time, delaying message delivery until a
specific date and time, marking the message URGENT, and maintaining a log of all messages sent.
Users can interactively read their mail and perform the following operations: print messages on their workstation
console, delete messages from a mailbqx, save messages in a file, forward messages to other users, and reply
to message senders. In addition, users can request a mailbox summary which includes, for each message, the
sender'S name, date sent, subject, urgency, code type (text or object), and message number.
NOS-II Electronic Mail executes on all existing NOS-II workstations using either the iNOX or ISIS-III(N)!ISIS
Cluster operating systems.
TYPICAL MAIL USAGE
TYPICAL MAIL BENEFITS
• DISTRIBUTE SUPERUSER MESSAGES
• IMPROVE TEAM COMMUNICATION AND
• CREATE AND SEND INTERNAL MEMOS
COORDINATION
• COLLECT PROJECT MILESTONE DATA
• REDUCE PHONE TAG
• REPORT PROGRAM BUGS AND
• MINIMIZE PAPER GENERATION
RECOMMEND SYS'fEM CHANGES
• AID PROJECT CONFIGURATION MANAGEMENT
• SEND SOURCE AND OBJECT FILES
• INCREASE WORKSTATION LOCATION FLEXIBILITY
• USE AS TELEPHONE MESSAGE CENTER
• OVERALL, BOOST DEVELOPMENT TEAM
PRODUCTIVITY
NOS-II ELECTRONIC MAIL
Intel Corporation Assumes No Responsibility for the Use of Any Circuitry Other Than Circuitry Embodied in an Intel Product. No Other Circu~ Patent
Licenses are implied
OCTOBER 1983
© INTEL CORPORATION, 1983.
4-38
ORDER NUMBER:2105870003
NDS·II ELECTRONIC MAIL
OPERATING ENVIRONMENT
SOFTWARE SUPPORT
This product includes a 90-day initial support consisting of new software releases, updates, subscription
services (software performance reports and technical
reports), and telephone hotline support. Additional
software support services are available separately.
Required Hardware
NOS-II Environment with any 8 or 16 bit Microcomputer Deve!opment System Workstation
Required Software
iNOX or ISIS-III(N)/ISIS Cluster System Software
ORDERING INFORMATION
DOCUMENTATION
"NOS-II Electronic Mail User's Guide"
(122146)
4-39
Product Code
Description
iMOX-337
NOS-II Electronic Mail
ORDER NUMBER:210587-DD3
Systems and
Applications Software
5
XENIX*
• iWORD Processing
• iPLAN (Multiplan*) Spreadsheet
• iMENU Development System
Productivity
Software
Tools
il
1983 Intel Corporation
'XENIX and Multiplan are trademarks of Microsoft Corporation
5-1
NOVEMBER 1983
ORDER NUMBER 230844-001
XENIX PRODUCTIVITY SOFTWARE TOOLS
INTRODUCTION
Software tools for the
XENIX environment
Intel's
"Software Backplane"
Intel's productivity software tools are
designed to meet the basic information
processing needs of the office environment. Thilored specifically for the
XENIX* operating system, the software tools are available as individual
packages which can be applied to
specific end-user tasks. Intel's application packages are also offered as a
Seamless™ set of software tools, integrated with a hardware/software
system such as Intel's Database Information System (iDIS™ 861735).
Seamless software tools support the
transparent sharing of data files among
various application packages with complete data integrity. With Seamless
software, results from one application
package are readily accessible and
compatible as input for another form
of processing.
IWORD*
• Standard text editing/formatting
commands
The powerful, versatile
word processing tool
• Designed especially for the
XENIX operating system
Inters iWORD package is a
sophisticated, yet friendly word processing tool for preparing business
documents, such as reports, letters,
memoranda, technical papers, and
more. Written in the ·C" language and
tailored to the XENIX operating
system, the iWORD package can run
in both multi-user and single-user en:
vironments. Menu-driven and screenoriented, the iWORD package supports
all standard text editing, storage, and
formatting development functions.
• Easy-to-use for beginners, powerful for experts
• Full-screen text editor
• Access to XENIX typesetter and
printer drivers .
• Embedded commands for global
formatting
• On-screen display of formatted
text
• On-line Help facility, spelling/dictionary module, and mail/merge
facility
• Worldwide service. and support
An effiCient, easy-to-use
text processor
Inexperienced users will find the
iWORD software concepts intuitively
easy. For example, the user accesses a
documejlt file by opening a "drawer,"
and editing commands follow familiar
"cut and paste" procedures.
All commands are in plain English.
No memorization is necessary, and
many operations are executed by a
"IWORD is a version of Horizon Wlrd Processing, a trademark of Horizon Software Systems, Inc.
5-2
single keystroke. Concise command
menus and an .on-line Help facility are
continuously available so that novice
users can quickly advance in their
word processing abilities. The iWORD
system is sufficiently powerful to meet
the needs of more experienced users
as well.
Designed around
office needs
"Inters iWORD software is based on
the simple concept of an office file
cabinet, defined by a collection of
drawers, each of which contains files
(documents) .
The user may:
• Open an existing drawer or make a
new drawer
• Create a new file or select an existing file
• Rename a drawer or file
• Add to, change, copy, move or
delete the selected file.
There is no limit to the number of
user-created drawers other than the
availability of disk storage space.
inter
XENIX PRODUCTIVITY SOFTWARE TOOLS
On-screen display of
formatted text
The word processor allows users to
visually format documents and print
them as they are displayed on the terminal, or to format them with the
powerful text processing filcilities inherent to the XENIX operating system.
This on-screen display capability is
particularly helpful in preparing
documents for typesetting.
The results of text formatting co!TImands appear immediately on the
screen. Examples of these commands
include:
• Right justification
• Underlining
• Indentation
• Centering
• Alignment.
Advanced word processing
features
Inexperienced users may execute
commands from a simple menu (and
related Help screens), while more proficient users may opt to use up to 64
function keys without accessing the
menu.
The iWORD system allows
simultaneous support for multiple
character andlor line printers at the
local or system level; printer selection
is an operator option at print time.
The iWORD package includes a
spelling checker and correction filcility
with an extensive on-line dictionary.
A Mail/Merge facility is available to
combine mailing lists and document
files (e.g., form letters) for printer output. MaillMerge also provides the
capability of incorporating paragraphs
'
from a third file.
The iWORD processing allows onscreen sorting of numeric or alphabetic
text.
Special editing commands
• Find commands ("string search") to
locate characters or words in text for
possible changes or additions
• Deletion commands for removing
words, sentences, lines, paragraphs
and entire files
• Fill commands to fit as many words
as possible in a finite space
• Form command to type over existing
text
• Command to mark location of the
cursor within text
• Paste-in command to copy a section
of text
• Replace command that replaces one
text area with another
• Tab setting commands
Embedded "dot" commands
When formatting or printing needs
are complex, the user has easy access
to more powerful embedded "dot" commands. "Dot" commands are most
useful for medium-sized and long
documents requiring sophisticated formatting functions like subscripts,
superscripts, and footnotes. "Dot" commands are fully compatible with
NROFF and TROFF, the XENIXsupplied printing and typesetting
utilities, The results of "dot" commands are displayed on-screen before
the document is printed,
Embedded commands for global formatting include:
• Page layout
• Justification
• Automatic hyphenation
• Running headers and footers
• Footnotes
• Superscripts and subscripts
• Automatic page numbering
• XENIX typesetting commands
(TROFF)
• XENIX printing commands
(NROFF).
5-3
Editing two files
simultaneously
The iWORD package provides a
moveable "window" into a file for fullscreen text editing. The user may
slmultaneousiy display two areas of the
same document or two different
documents in two screen "windows:'
Employing this "split screen" capability, the user may review two different
files at the same time, as well as move
text between files.
'Designed for experienced
and novice users
The iWORD software provides the
experienced word processing user the
full strength of XENIX text preparation commands, such as NROFF and
TROFP. The iWORD package also offers a compn;hensive menu shell which
makes the word processing software
easy to use for even the most
inexperienced computer user. In conclusion, the iWORD system is a
powerful, "user friendly," and flexible
word processing package intended for
all levels of computer proficiency.
.
XENIX PRODUCTIVITY SOFTWARE TOOLS
The iPLAN matrix format
The most advanced
electronic spreadsheet
IPLAN·
Th~
• Indilstry standard advanced electronk~~&h~t~n~ou
• SOphisticated formatting options
• Easy-to-use English commands
• Exteulve, on-line Help facilities
• ScroUIng features and multiwindow/multi-table display
• Links and updates multiple interrelated sp~&h~ts
• Automatk:aUy updates calculations
• Wlrldwlde service and support
iPLAN Multiplan Spreadsheet
software is one of the most powerful,
easy-to-use "electronic worksheet" programs available. Developed by Microsoft Corporation, Multiplan has been
enhanced for Intel hardware environments operating under XENIX.
The iPLAN package is a multipurpose tool capable of a wide variety
of business and scientific applications:
financial modeling, planning,
forecasting, tabulations, calculation of
engineering formulas,' and much more.
It supports "what-if' decision-modeling
with a versatile two-dimensional matrix
that can be custom-tailored for specific
use.
Unlike other sp~adsheets, the
iPLAN system is designed to meet the
needs of both inexperienced and
sophisticated computer users. It also
offers versatile presentation and reporting capabilities.
The iPLAN softwclre displays
numerical data, text, or formulas in
matrix (row/column) format. The
spreadsheet screen is divided into
'cells' which are referenced by row and
column numbers. Cells may contain
numeric data, formulas, text, or labels.
Commands are listed at the bottom of
the screen along with the current addressed cell, the amount of unused
spreadsheet storage space, and the
name of the file in use.
Designed for ease-of-use
Beginning iPLAN users can start
building worksheets after a couple
hours of initial use. While simple to
operate, the iPLAN system functionality is enhanced by the skill of the user.
• IPLAN ~ a venIon of Microsoft Multlplan~ a trademark of Mlcnisoft Corporation.
,.
~----~~~---------:--------~-----------===::::====::::~~~~::::::~~~IVE
2
3
BORDERED
#2
WINDOW 112
3
1
3 Sales
4
5 Cost
6
7
8
MENU
SELECTION
2
3
2
COLUMNS (1-63)
9
10 Total Costs
11
12
13
14
( 15 Gross Profits
16
$20000.00
$20000.00
4
5
Material $4000.00
Labor $7000.00
Overhead $4000.00
6
7
8
9
$15000.00
10
11
DOLLAR FORMAT
$4000.00
$7000.00
$4000.00
$15000.00
$5000.00
17
12
13
14
15
16
18
17
$5000.00
CELL
POINTER
18
STORAGE
REMAINING
MESSAGE
---+--
COMMAND: Alpha Blank Copy Delete Ed~ Format Goto Help Inset Lock Move
Name Options Print Qu" Sort Transfer Value Window Xternal
Select option or type command letter
R10C3
SUM(R6:8C3)
95% Free
LOCATION --:::::::.~---
AND CONTENTS
OF~IVECELL
ABSOLUTE REFERENCE
Typical Multiplan Screen Display
5-4
SHEET NAME
XENIX PRODUCTIVITY SOFTWARE TOOLS
The iPLAN package does not use
cryptic, abbreviated commands or
reference codes (e.g. "AZ23"). Instead,
it uses plain English commands (e.g.
COPY) and reference names (e.g.
COSTS or SALES). Completely menudriven, the iPLAN software prompts
the user with simple commands that
can be executed with a single
keystroke. To help in command selection, the user can access a reference
guide.
Notable iPLAN features include:
• Ability to build formulas by highlighting cells
• Menu-driven functions and command prompting
• Plain English command words and
formulas
• Comprehensive on-line reference
guide
• Eight-window display option
• Full-screen display of worksheet
formulas.
A dynamiC, versatile
workspace
The iPLAN package offers an effective workspace that is 63 columns
wide by 255 rows long. Worksheets are
easily designed to fit project requirements. Moreover, worksheets can
be linked to automatically receive or
transmit data into other related iPLAN
worksheets. Column width can be
varied to accept long (or short) words
and numerals; lines of text can be
typed across several columns.
Up to eight windows are available
with vertical and horizontal scrolling,
such that different areas of a very
large worksheet can be viewed
simultaneously. The windows can be
aligned, scrolled together, opened, or
closed at the user's choice.
Built-in data security
Flexible presentation
features
The iPLAN system enables users to
produce printed reports of professional
caliber. The program includes special
formatting, alignment, and printing
functions that support the printing of
presentauon-quaiity reports. The
iPLAN software can automatically
break a spreadsheet into multiple
pages, and the user can specify the appropriate margins.
Powerful modeling
capabilities
Highlights of iPLAN modeling
features include:
• Alphabetical or numerical sorting
capabilities
• Links and automatically updates up
to eight interrelated worksheets
• Automatically updates· subtotals,
totals, percentages, growth curves
and other calculations
• Performs multiple iterations to solve
closed-loop problems
• Automatically revises formulas when
reordering rows and columns in
displays
• ,Cells and areas can be named for
clarity
• Continuous formatting allows entries
across cell boundaries
• Formulas moved to various worksheet locations without retyping
• Includes special editing area for
quick additions or deletions
• Sheet display may be redesigned or
formatted in various ways without
altering the stored data
• Formulas, words, or numerals can
be entered into any location so that
printed sheets have titles and
descriptions
• Offers a rich repertoire of advanced
math functions and operators.
. The iPLAN software features cell
locking to protect worksheet data.
When data and formulas have been
entered, tie specified information can
be "locked" in place so that vital data
cannot be accidentally erased or
altered.
iMENU·
• Hierarchical control of menu
screens to organize application
program use
• On-line application development/maintenance system
• A menu screen design and menu
development system for
non-programmers
• On-line Help facility
• Written in the "C" language,
specifically for XENIX
• Supports turnkey application
development
• Worldwide service and support
Simplifies use, development
and maintenance of
XENIX-based applications
The iMENU software package is a
hierarchical user interface and application development tool that ties together
XENIX-based applications to achieve a
high level of software integration. The
iMENU package allows applications
developers to create integrated, logical,
and friendly interfaces to XENIX
applications.
In effect, the iMENU system allows
the XENIX operating system to appear
transparent to the non-te~hnical user,
while it offers all the power and functionality inherent to XENIX to the
more experienced user. The iMENU
package interfaces with virtually all
character-oriented terminals.
'Aids application
development and software
packaging
Programmers and experienced users
can apply the iMENU system in maintaining or creating menus, forms, or
Help screens for existing or new
applications.
• iMENU is a version of Schmidt's Imenus,
a trademark of Schmidt Associates.
5-5
XENIX PR·ODUCTIVITY SOFTWARE TOOLS
FIlii XENIXfunctio~ality is retained
and simplified with the iMENU software. Experienced users have the option of skipping step-by-step menu
selection via the fast menu selection
mode. Advanced users can also modify
the menu system to reflect changes in
existing applications or to incorporate
new applications.
Standard iMENU package functions
include:
• Definition of login IDs
• Add, delete, and list login IDs
• Authorization control
• Define, update, delete and list menu
items and attributes
• Screen and forms building
• Interaction with XENIX shell
commands
• Powerful macros
• Fast menu selection mode for experienced users
• On-line Help facility.
5-6
The iMENU software includes a
Menu Development Subsystem, which
is a menu-driven set of maintenance
functions allowing:
• Menu screen maintenance
• Form screen maintenance
• Help screen maintenance
• Menu selection maintenance
• Macro maintenance
• Shellscript maintenance
• Login ID maintenance
• Deauthorization maintenance
• Backup/restore.
inter
XENIX PRODUCTIVITY SOFTWARE TOOLS
Comprehensive on-line
Help system
complete data integrity. The iDIS
system is a multi-user, multi-tasking
XENIX-based microcomputer available
with the iWORD processor, the iPLAN
spreadsheet, the iMENU development
system, iXTRACT communication
facilities for downloading mainframe
databases, thc iDB DBMS for local
relational database management, and
software that supports networking of
personal computers. Application
development tools and high-level programming languages are also offered
with the iDIS system. Data can be
transferred among the Seamless software packages, and the iDIS menu
system and iHELP facility provide a
friendly, common user interface. The
iDIS system is an example of how Intel
provides hardware/software components
at all levels of integration to meet individual system needs.
The Help system is an interactive
user-assistance facility. The Help
system is completely integrated with
the iMENU package so the user need
no! rely on bulky reference manuals to
operate a particular application. In the
event the user encounters problems or
has questions, explanatory solutions
can be made available at all times. Using the iMENU system itself, programmers and experienced users can extend
or modify the Help system to include
new applications.
Expands markets and
increases profits
Systems integrators will find the
iMENU system to be an indispensible
tool for packaging XENIX-based applications software and integrated hardware/software systems.
Using the iMENU package, application developers can:
• Extend the user-interface to wrap
around new and existing applications
software
• Customize existing applications to
meet varying customer needs
• Develop application demos
• Create applications that are easily
used by non-programmers
• Package separate programs into integrated applications.
The iMENU software enhances the
cost-effectiveness of application
development by:
• Improving time to market for new
software products
• Reducing software development time
• Reducing the need for training and
support
• Decreasing software installation time
• Cutting documentation expenses
• Unifying a family of software products for consistent screen appearance and operation.
Worldwide service and
support
All Intel software included under an
active software maintenance agreement
is fully supported by Intel's staff of
trained software engineers. Depending
on the system configuration, several
levels of support are available. Each
package is offered with complete
documentation, including a comprehensive user manual and installation
guide.
SPECIFICATIONS
Required Hardware:
• Any 8086 or 80286-based system including Intel's SYSTEM 86/300,
286/300 family and iDIS systems
• Minimum of 128 KB memory
• At least two floppy disks or one
hard disk
• One 8 in. or 5.25 in. double-density
floppy disk drive for distribution
media
Required Software:
Integrated software for the
iOIS system
• Intel's XENIX 86/286 Operating
System
Intel's Database Information System
(iDIS 86/735) provides end users and
systems builders with a vehicle for incorporating a Seamless set of software
productivity tools. Seamless software
supports the transparent sharing of data
files among application packages with
Warranty:
90 days for:
Software Updates and application support. Continuing support services
available with subscription to a Software maintenance agreement.
5-7
XENIX PRODUCTIVITY SOFTWARE TOOLS
The following' are Irademarks of Inlel Corporation and may be used only to describe
Intel producls: BXp, CREDIT, i, ICE, 12 1CE,
ICS, iOBp, iOIS, iLBX, i m , iMMX, Insile,
INTEL,
, Inlelevision, Intellec, Inleligenl
IdentifierT", IntelBOS, inteligent Programming™, Intellink, iOSP, IPOS, iRMS, iSBC,
iSBX, iSDM, iSXM, Library Manager, MCS,
Megachassis, Micromainlt'ame, MULTIBUS,
Multichannel™ Plug-A-B(Jbble, Seamless,
MULTIMOOULE, PROMPT, Ripplemode,
RMX/BO, RUPI, SYSTEM 2000, Data
Pipeline, lOIS, iDBp, and UPI, and the combination of ICE, ICS, iRMX, iSBX, MCS, or
UPI and a numerical suffix. Intel Corporation assumes no responsibility for the use of
any circuitry other than circuitry embodied
in an Intel product. No other patent licenses
are implied. Specifications are subject to
change without notice.
iWORD is a version of Honzon Word Processing, a trademark of Horizon Software
Systems, Inc. iPLAN is a version of
Microsoft's multiplan, a trademark of
Microsoft Corporation. IMENU is a version
of Schmidt's Imenus, a trademark of
Schmidt Associates.
Information contained herein supercedes
previously published specifications on these
devices from Intel.
5-8
• Complete on-line transaction
processing monitor
• Easy-to-use, interactive screen
building utiliti($
• Flexible, on-line transaction
development facilities
• Reduced user coding with
standardized functions and
processing modules
• Variable indexed sequential database
structure
• Powerful interactive query language
with Boolean logic capability
• Multilevel user-defined security
• Real-time report writer
• Menu-prompting
iTPS Transaction
Processing Systems
Terminal Application
Processing System (iTAPS)
'
APIItL 1983
ORDER NUMBER' 210415-002
© INTEL CORPORATION. 1983
5-9
FUNCTIONAL DESCRIPTlON
Intel's Terminal Application Processing
System (iTAPS) is the on-line
'.
transaction processing software package
customized for Intel's Transaction
Processing System (iTPS). iTAPS
consists of an interactive application
development facility and a reliable
high-performance run-time transaction
processing monitor. In addition to
providing ready-to-use software for
building data files and maintaining
data relafionships and structures,
iTAPS interfaces with user-specific
processing modules. written in COBOL
or Pascal, iTAPS also supports a
powerful query language that provides
direct, easy and fast access to data
contained· in user database files.
FEATURES AND BENEFITS
Application development
As a complete transaction processing
application development tool, iTAPS frees
programmers from the coding
complexities normally associated with
development environments tb.at include
database management, telecommunications and multiprogramming-multiuser
on-line systems. iTAPS enables
programmers to write complex
transaction processing applications with
simple commands and easy-to-use
interactive utilities. iTAPS is primarily
intended for application programmers
and requires minimal. systems
programmer involvement.
iTAPS furnishes an on-line faciliry to
define screen formats, including the
variables to be processed and their video
characteristics. iTAPS simply requests the
programmer to "paint" the screen as it
should appear to the system user, and
fields are then defined interactively by
filling in a form on the screen.
iTAPS also provides a number of
standard modules used repetitively in any
transaction processing application. These
modules greatly simplify the development
and maintenance tasks by automating
such functions as:
• Initialization
• Addition of. a record to the database
• Modification of a record in the
database
• Deletion of a record from the
database
•
•
•
•
Index structure update
Data validation
Uniqueness checking
Dynamic specification of display
format
• File writing
• Database searching
• Sorting
the. ilpecified transaction, and manages
all the disk input/output. Because
"Intel's Transaction Processing System
has been optimized for transaction
procesSing, the system overhead is kept
at a minimum. Superior performance
results as measured in terms of both
throughput and response time.
In addition to the standard iTAPS
modules, the programmer may write
user-specific COBOL or Pascal
programs to address specific application
processing requirements. These
programs combined with the iTAPS
standard modules make up an
application transaction. The COBOL
or Pascal program calls upon iTAPS to
provide all database and terminal I/O
functions. The program can also access
non-iTAPS files using standard 110
programming.
.iTAPS provides first level data
validation. Errors are detected as they
occur and before the more complex
application processing takes place.
Thus iTAPS significantly assists not
only in validation and immediate
correction of the input data, but also
in realizing a more efficiently
performing system by reducing
unnecessary processing.
All these features add up to increased
system and programmer productivity.
Programmers can spend more time
designing and implementing their
applications and less time worrying
about multiuser on-line systems
requirements. As a result, applications
come on-line faster. Furthermore, the
consistent organization of iTAPS
application systems minimizes
maintenance and enhancement
problems.
iTAPS produces extensive application
documentation. Even if the program's
author has departed, very little time
will be lost reconstructing or enhancing
the application. This means that iTAPS
reduces the cost of application software
both in the development phase and in
the maintenance phase.
Run-time transaction processing
At run-time, iTAPS provides a
complete multiuser on-line transaction
processing environment with five levels
of predefined security checks: sign-on,
application system selection, data
add/delete, field read/write, and field
index. Two menu levels to select the
application system and the desired
tramaction are provided.
When iTAPS receives a request from a
terminal to initiate execution of a
particular transaction, it allocates the
resources between that terminal and
5-10
iTAPS supports a powerful query
facility based on predefined commands
and on the use of English words to
describe each data element. Compound
Boolean inquiries can be formulated
using aliases, data values and logical
operators. The response to an inquiry
can be displayed at the terminal or
printed on the system printer.
System Organization
iTAPS is composed of five modules:
•
•
•
•
•
The Executive
The Communication Manager
The Application Manager
The Data Manager
The iTAPS terminal
As shown, these modules interact with
the operating system, the user's
software, the terminal, and the
database. This segmentation enables
programmers to develop each module
as an independent entity and to modify
it without having to alter the entire
application. Each module is designed to
simplify application development,
implementation and execution.
The iTAPS Executive
The Executive provides the interface
with the iRMX 86 operating system
and acts as the run-time transaction
processing monitor. The Executive
controls sign-on and menu displays,
performs security-checking, and
maintains a log which posts the
appropriate "before" and/or "after"
image of any data file change. Based on
this log, the Executive provides defined
recovery capabilities:
•
•
At the network level: Following a
terminal or communication line
failure, the last transaction is
retrieved from storage 'and retransmitted to the terminal upo~ entry of
a command by the operator.
At the file level: Following a system
failure the recovery log is read to
update the file and back-out the
incomplete transactions. Full
recovery is also provided by the
recovery log in conjunction with the
last back-up.
In addition, the Executive provides
statistical services to evaluate system
use and performance, auditing facilities
to isolate illegal transmissions, and
documentation facilities to record the
application and data structures.
The iTAPS Communication Manager
The Communication Manager controls
the communications network. lt
collects data that has been transmitted
from a terminal, sends messages back
to the terminals, and maintains the
network buffers. Supporting both block
and TAPS modes, the Communication
Manager is designed to optimize line
transmission.
The Communication Manager is
completely transparent to the
application programmer as well as to
the user.
The iTAPS Application Manager
The Application Manager controls the
application processing sequence of each
terminal within the network. Upon
receipt of a request from the
Communication Manager, the
Application Manager determines the
transaction type, schedules the
appropriate processing modules,
transfers data, and generally manages
the logic of the application.
The iTAPS Data Manager
The Data Manager interfaces iTAPS
\vith the database. It perfof!Ps th~
additions, changes, deletions and
extractions requested by the
Application Manager. It can be
executed from a user module during
the processing of a transaction or when
the query language is used.
The Data Manager uses a valued,
inverted structure called Variable
Indexed Sequential Access Method
(VIS AM) to format the database. Each
VISAM database is composed of a
keyed access index file and a direct
access primary file. The primary file
contains the data records, and the
index file contains all the pointers to
the primary file records. Virtually all
fields in the database can be accessed
by keyed value. Both structured and
unstrl,lctured (text) fields can be
indexed.
The iTAPS terminal
When the TAPS mode feature is used
in the iTPS terminal, major iTAPS
functions are handled at the terminal
leveL Screen-formatting, edit-checking,
and data-validation are performed by
the terminaL This frees the central
processor from the burden of
performing these tasks. iTAPS supports
both block and TAPS modes in the
intelligent terminals. The TAPS mode
terminal feature enables an operator to
correct an error while the source
document is readily available.
IAMX OPERATING SYSTEM
Summary
iTAPS has been specifically designed to
satisfy the requirements of transaction
processing. It is a complete software
system with an efficient architecture, a
simplified programming style, and a
wide array of features designed to
optimize both applications development
and on-line transaction processing.
When Intel's iTPS is enhanced with
iTAPS, the result is application
development productivity and a
complete user friendly secure run-time
system.
5-11
iTPS Transaction
Processing "Systems
Communications
• Extensive array of remote
communication connection options
• Emulation of IBM 2780/3780 RJE
station
• Emulation of IBM 3270 BISYNC
cluster controller
-Intel Transaction Processing System
(iTPS) looks like IBM 3271 control
unit with up to 32 devices attached
-iTPS terminals look like IBM 3277
terminals
iTPS printers look like IBM 3284
printers
• Emulation of IBM 3270 SDLC/SNA
cluster controller
-iTPS looks like IBM 3274 control
unit with up to 16 devices attached
-iTPS terminals look like IBM 3278
model 2 terminals
-iTPS printers look like the IBM
3287 printer
• Communication speeds up to 19,200
bits per second (bps)
• Leased or switched communication
lines
APAL 1883
....
I
I
",,'
®
PROCESSES
FULL BUFFER
,
I
._._j
Figure 7. Multiple Buffer Example
SIGNAL INTERRUPT
Used by an INTERRUPT
HANDLER to activate an Interrupt Task.
WAIT INTERRUPT
Suspends the calling Interrupt Task until the INTERRUPT HANDLER performs a
.SIGNAL INTERRUPT to invoke it. If a SIGNAL INTERRUPT for the task has
occurred, it is processed.
CREATE SEGMENT primitive explicitly allocates a
memory area when one is needed by the TASK. For
example, a TASK may explicitly allocate a SEGMENT
for use as a memory buffer The SEGMENT length
can be any multiple of 16 bytes between 16 bytes and
64K bytes in length. The programmer may specify
any number of bytes from 1 byte to 64 KB, the OSP
will transparently round the value up to the appropriate segment size.
The two explicit memory allocatlon/deallocatlon
primitives are:
FREE MEMORY MANAGEMENT
The OSP Free Memory Manager manages the
memory pool which is allocated to each JOB for its
execution needs. (The CREATE JOB primitive allocates the new JOB's memory pool from the
memory pool of the parent JOB.) The memory pool IS
part of the JOB resources but is not yet allocated
between the tasks of the JOB. When a TASK, MAILBOX, or REGION system data type structure is
created within that JOB, the OSP implicitly allocates
memory for it from the JOB's memory pool, so that a
, separate call to allocate memory is not required. OSP
primitives that use free memory management implicitly include CREATE JOB, CREATE TASK,
DELETE TASK, CREATE MAILBOX, DELETE MAILBOX, CREATE REGION, and DELETE REGION. The
CREATE SEGMENT
Allocates a SEGMENT of specified length (in 16-byte-long
paragraphs) from the JOB
Memory Pool.
DELETE SEGMENT
Deallocates the SEGMENT's
memory area, and returns It
to the JOB memory pool.
Intertask Communication
The asp has built-in intertask synchronization and
communication, permitting TASKs to pass and share
information with each other. OSP MAILBOXes contain controlled handshaking facilities which guarantee that a complete message will always be sent from
a sending TASK to a receiving TASK. Each MAILBOX
consists of two interlocked que'ues, one of TASKs
6-9
AFN·02059B
80130/80130-2
iAPX 86/30, 88/30, 186/30, 188/30
and the other of Messages. Four OSP primitives for
itltertask synchronization and communication are
provided:
There are five OSP primitives for mutual exclusion:
CREATE REGION
Create a REGION (lock).
SEND CONTROL
Give up the REGION.
'
CREATE MAILBOX
Creates intertask message
exchange.
ACCEPT CONTROL
DELETE MAILBOX
Deletes an intertask message exchange.
Request the REGION, but do
not wait if it is not available.
RECEIVE CONTROL
RECEIVE MESSAGE
Calling TASK receivesamessage from the MAILBOX.
Request a REGION, wait if
not immediately available.
DELETE REGION
Delete a REGION.
SEND MESSAGE
Calling TASK sends a
message to the MAILBOX.
The CREATE MAILBOX primitive allocates a MAILBOX for use as an information exchange between
TASKs. The OSP will post information at the MAILBOX in a FIFO (First-In First-Out) manner when a
SEND MESSAGE instruction is issued. Similarily, a
message is retrieved by the OSP if a TASK issues a
RECEIVE MESSAGE primitive. The TASK which
creates the MAILBOX may make it available to other
TASKs to use.
The OSP also provides dynamic priority adjustment
for TASKs within priority REGIONs: If a higher- .
priority TASK issues a RECEIVE CONTROL primitive,
while a (lower-priority) TASK has the use of the same
REGION, the lower-priority TASK will be transparently, and temporarily, elevated to the waiting
TASK's priority until it relinquishes the REGION via
SEND CONTROL. At that point, since it is no longer
using the critical resource, the TASK will have its
normal priority restored.
OSP Control Facilities
If no message is available, the TASK attempting to
receive a message may choose to wait for one or
continue executing.
The OSP also includes system primitives that provide
both control and customization capabilities to a multitasking system. These primitives are used to control
the deletion of SOTs and the recovery of free memory
in a system, to allow interrogation of operating system status, and to provide uniform means of adding
user SOTs and type managers.
The queue management method for the task queue
(FIFO or PRIORITY) determines which TASK in the
MAILBOX TASK queue will receive a message from
the MAILBOX. The method is specified in the
CREATE MAILBOX primitive.
DELETION CONTROL
Deletion of each OSP system data type is explicitly
controlled by the applications programmer by setting a deletion attribute for that structure. For example, if a SEGMENT is to be kept in memory until DMA
activity is completed, its deletion attribute should be
disabled. Each TASK, MAILBOX, REGION, and SEGMENT SOT is created with its deletion attribute enabled (i.e., they may be deleted). Two OSP primitives
control the deletion attribute: ENABLE DELETION
and DISABLE DELETION.
Intertask Synchronization and Mutual
Exclusion
Mutual exclusion is essential to multiprogramming
and i multiprocessing systems. The REGION system
data type implements mutual exclusion. A REGION is
represented by a queue of TASKS waiting to use a
resource which must be accessed by only one TASK
at a time. The OSP provides primitives to use
REGIONs to manage mutually exclusive data and
resources. Both critical code sections and shared'
data structures can be protected by these primitives
from simultaneous use by more than one task.
REGIONs support both FIFO (First-In First-Out) or
Priority queueing disciplines for the TASKS seeking I
to enter the REGION. The REGION SOT can also be
used to implement software locks.
ENVIRONMENTAL CONTROL
The OSP provides inquiry and control operations
which help the user interrogate the application envi~
ronment and implement flexible exception handling.
These features aid in run-time decision making and
in application error processing and recovery. There
are five OSP environmental control primitives.
Multiple REGIONs are allowed, and are automatically
exited in the reverse order of entry. While in a
REGION, a TASK cannot be suspended by itself or
any other TASK, and thereby avoids deadlock.
OS EXTENSIONS
The OSP architecture is defined to allow new userdefined System Data Types and the primitives to manipulate them to be--added to OSP capabilities
6-10
AFN·02059B
inter
80130/80130-2
iAPX 86/30, 88/30, 186/30, 188/30
allow the OSP primitives to report parameter errors
in pr.imitive calls, and errors in primitive usage. Exception handling procedures are flexible and can be
individually programmed by the application. In general, an exception handler if called will perform one
or more of the following functions:
provided by the built-in System Data Types. The type
managers created for the user-defined SOTs are
called user OS extensions and are installed in the
system by the SET OS EXTENSION primitive. Once
:nstal!ed, the functions of the type manager may be
invoked with user primitives conforming to the OSP
interface. For well-structured extended architectures, each OS extension should support a separate
user-defined system data type, and every OS extension should provide the same calling sequence and
program interface for the user as is provided for a
built-in SOT. The type manager for the extension
would be written to suit the needs of the application.
OSP interrupt vector entries (224-255) are reserved
for user OS extensions and are not used by the OSP.
After assigning an interrupt number to the extension,
the extension user may then call it with the standard
OSP call sequence (Figure 4), and the unique
software interrupt number assigned to the
extension.
ENABLE DELETION
Allows a specific SEGMENT,
TASK, MAILBOX, or REGION
SOT to be deleted.
DISABLE DELETION
Prevents a specific SEGMENT, TASK, MAILBOX, or
REGION SOT from being
deleted.
GET TYPE
Given a token for an instance of a system data type,
returns the type code.
GET TASK TOKENS
Returns to the caller information about the current
task environment.
-Log the Error.
-Delete/Suspend the Task that caused the
exception.
-Ignore the error, presumably because it is not
serious.
An EXCEPTION HANDLER is written as a procedure.
If PLM/86 is used, the "compact," "medium" or
"large" model of computation should be specified for
the compilation of the program. The mode in which
the EXCEPTION HANDI;.ER operates may be specified in the SET EXCEPTION HANDLER primitive. The
return information from a primitive call is shown in
Figure 4. CX is used to return standard system error
conditions. Table 7 shows a list of these conditions,
using the default EXCEPTION HANDLER of the OSP.
HARDWARE DESCRIPTION
The 80130 operates in a closely coupled mode with
the iAPX 86/10 or 88/10 CPU. The 80130 resides on
the CPU local multiplexed bus (Figure 8). The main
processor is always configured for maximum mode
operation. The 80130 automatically selects between
its 88/30 and 86/30 operating modes.
The 80130 used in the 86/30 configuration, as shown
in Figure 8 (or a similar 88/30 configuration),
operates at both 5 and 8 MHz without requiring processor wait states. Wait state memories are fully supported, however. The 80130 may be configured with
both an 8087 NPX"and an 8089 lOP, and provides
full context control over the 8087.
GET EXCEPTION
HANDLER
Returns information about
the calling TASK's current information handler: its address, and when it is used.
SET EXCEPTION
HANDLER
Provides the address and
usage of an exception
handler for a TASK.
SET OS EXTENSION
Modifies one of the interrupt
vector entries' reserved for ~
OS extensions (224-255) to
point to a user OS extension
procedure.
SIGNAL EXCEPTION
For use in OS extension error processing.
The 80130 (shown'in Figure 3) is internally divided
into a control unit (CU) and operating system unit
(OSU). The OSU contains facilities for OSP kernel
support including the system timers for scheduling
and timing waits, and the interrupt controller for
interrupt management support.
iAPX 86/30, iAPX 88/30 System
Configuration
The 80130 is both I/O and memory mapped to the
local CPU bus. The CPU's status SO/-S21 is
decoded along with 10CSI (with BHE and AD3ADo) or MEMCSI (with AD13-ADo). The pins are
internally latched. See Table 1 for the decoding of
these lines.
EXCEPTION HANDLING
The OSP supports exception handlers. These are
similar to CPU exception handlers such as OVERFLOW and ILLEGAL OPERATION. Their purpose is to
6-11
AFN·02059B
80130/80130-2
iAPX 86/30,88/30,186/30,188/30
Memory Mapping
RAM Requirements
Address lines A19 -A14 can be used to form MEMCS/
since the 80130's memory-mapped portion is aligned
along a 16K-byte boundry. The 80130 can reside on
any 16K-byte boundry excluding the highest
(FCOOOH-FFFFFH) and lowest (00000H-003FFH). The
80130 control store code is position-independent except as limited above, in order to make it compatible
with many decoding logic designs. AD13-ADo are
decoded by the 80130's kernel control store.
The OSP manages its own interrupt vector, which is
assigned to low RAM memory. Working RAM storage
is required as stack space and data area. The
memory space must be allocated in user RAM.
OSP interrupt vector memory locations OH-3FFH
must be RAM based. The OSP requires 2 bytes of
allocated RAM. The processor working storage is
dynamically ,allocated from free memory. Approximately BOO bytes of stack should be allocated for
each OSP task.
I/O Mapping
The I/O-mapped portion of the 80130 must be aligned
along a 16-byte boundry. Address lines A1S -A4
should be used to form 10CS/.
TYPICAL SYSTEM CONFIGURATION
Figure 8 shows the processing cluster of a "typical"
iAPX 86/30 or iAPX 88/30 OSP system. Not shown are
subsystems likely to vary with the application. The
configuration includes an 8086 (or 8088) operating in
maximum mode, an 8284A clock generator and an
8288 system controlier. Note that the 80130 is located
on the CPU side of any latches or transceivers. See
Intel Application Note 130 for further details on
configuration.
System Performance
The approximate performance of representitive OSP
primitives is given in Table 5. These times are shown
for a typical iAPX 86/30 implementation with an 8
MHz clock. These execution times are very comparable t9 the execution times of similar functions in
minicomputers (where available) and are an order of
magnitude faster than previous generation
microprocessors.
OSP Timers
Initialization
The OSP Timers are connected to the lower half of
the data bus and are addressed at even addresses.
The timers are read as two successive bytes, always
LSB followed by MSB, The MSB is always latched on
a read operation and remains latched until read.
Timers are not gatable.
Both application system initialization and OSPspecific initialization/configuration are required to
use the OSP. Configuration is based on a "database"
provided by the user to the iOSP 86 support package.
The OSP-specific initialization and configuration information area is assigned to a user memory address
adjacent to the 80130's memory-mapped location.
(See Application Note 130 for f.urther'details.) The
configuration data defines whether 8087 support is
configured in the system, specifies if slave 8259A
interrupt controllers are used in addition to the
80130, and sets the operating system ti me base (Tick
Interval). Also located in the configuration area are
the exception handler control parameters, the address location of the (separate) application system
configuration area and the OSP extensions in use.
The OSP application system configuration area may
be located anywhere in the user memory and must
include the starting address of the application instruction code to be executed, plus the locations of
the RAM memory blocks to be managed by the OSP
free memory manager. Complete application system
support and the req'uired 80130 configuration support are provided by the iAPX 86/30 and iAPX 88/30
OPERATING SYSTEM PROCESSOR SUPPORT
PACKAGE (iOSP 86).
Baud Rate Generator
The baud rate generator is 8254 compatible (square
wave mode 3). Its output, BAUD, is initially high and
remains high until tpe Count Register is loaded. The
first falling edge of the clock after the Count Register
is loaded causes the transfer of the internal counter
to the Count Register. The output stays high for N/2
[(N+l)/2 if N is odd] and then goes low for N/2
[(N-l)/2 if N is oddJ. On the falling edge of the clock
which signifies the final count for the output in low
state, the output returns to high state and the Count
Register is transferred to the internal counter, The
whole process is then repeated. Baud Rates are
shown in Table 6.
The baud rate generator is located at OCH (12), relative to the 16-byte boundary in the I/O space in which
the 80130 component is located ("OSF" in the following example), the timer control word is located at
6-12
~AFN·02059B
80130/80130-2
iAPX 86/30, 88/30, 186/30, 188/30
CONTROL
tJ
B086
aHE
aHE
'19
'"
ADORESS
INTA
.00
LOCAL
AND
SYSTEM
RESOURCES
'0
D15
8286
DATA
DE
----J)
DO
INTERRUPT REQUESTS
Figure 8. Typical OSP Configuration
Interrupt Controller
relative address, OEH(14). Timers are addressed with
IOCS=O. Timers 0 and 1 are assigned to the use by
the OSP, and should not be altered by the user.
The Programmable Interrupt Controller (PIC), is also
an integral unit of the 80130. Its eight input pins
handle eight vectored priority interrupts. One of
these pins must be used for the SYSTICK time function in timing waits, using an external connection as
shown. During the 80130 initialization and configuration sequence, each 80130 interrupt pin is individually programmed as either level or edge sensitive.
External slave 8259A interrupt controllers can be
used to expand the total number of OSP external
interrupts to 57.
For most baud-rate generator applications, the command byte
OB6H
Read/Write Baud-Rate Delay Value
will be used. A typical sequence to set a baud rate
of 9600 using a count value of 52 follows (see
Table 6):
MOV AX.OB6H
;Prepare to Write Delay to
Timer 3.
;Control Word.
OUT OSF+14,AX
MOV AX, 52
OUT OSF+12,AL ;LSB written first
XCHG AL,AH
OUT OSF + 12,AL ;MSB written after.
In addition to standard PIC funtions, 80130 PIC unit
has an LlR output signal, which when low indicates
an interrupt acknowledge cycle. LlR=O is provided to
control the 8289 Bus Arbiter SYSB/RESB pin. This
will avoid the need of requesting the system bus to
acknowledge local bus non-slave interrupts. The
user defines the interrupt system as part of the
configuration.
The 80130 timers are subset compatible with 8254
timers.
6-13
AFN·02059B
80130/80130-2
iAPX 86/30, 88/30, 186/30, 188/30
signal which drives one of 80130 edge-triggered interrupt request pins once each A.C. cycle. The Interrupt Handler responds to the interrupts, keeping
track of one second's A.C. cycles. The Interrupt Task
counts the seconds and after a day deletes itself. In
typical systems it might perform a data logging operation once each day. The Interrupt Handler and InterruptTask are written as separate modular programs.
INTERRUPT SEQUENCE
The OSP interrupt sequence is as follol/Vs:
1. One or more of the interrupts is set by a low-tohigh transition on edge-sensitivelR inputs or by a
high input on level-sensitive IR inputs.
2. The 80130 evaluates these requests, and sends an
INT to the CPU, if appropriate.
3. The CPU acknowledges the INT and responds
with an interrupt acknowledge cycle which is encoded in S2-S0'
4. Upon receiving the first interrupt acknowledge
from the CPU, the highest-priority interrupt is set
by the 80130 and the corresponding edge detect
latch is reset. The 80130 does not drive the address/data bus during this bus cycle but does
acknowledge the cycle by making ACK=O and
sending the LlR value for the IR input being
acknowledged.
The Interrupt Handler will actually service interrupt
59 when it occurs. It simply counts each interrupt,
and at a count of 60 performs a SIGNAL INTERRUPT
to notify the InterruptTask that a second has elapsed.
The Interrupt Handler (ACS HANDLER) was assigned
to this level by the SET INTERRUPT primitive. After
doing this, the InterruptTask performed the Primitive
RESUME TASK to resume the application task (INITS
TASKS TOKEN).
The main body of the task is the counting loop. The
InterruptTask is Signaled by the SIGNAL INTERRUPT
primitive in the Interrupt Handler (at interrupt level
ACS INTERRUPTS LEVEL). When the task is signalled by the Interrupt Handler it will execute the
loop exactly one time, increasing the time count
variables. Then it will execute the WAIT INTERRUPT
primitive, and wait until awakened by the Interrupt
Handler. Normally, the task will now wait some period
of time for the next signal. However, since the interface between the Handler and the Task is asynchronous, the handler may have already queued the
interrupt for servicing, the writer of the task does not
have to worry about this possibility.
5. The CPU will th.en initiate a second interrupt acknowledge cycle. During this cycle, the 80130 will
supply the cascade address of the interrupting
input at T1 on the bus and also release an 8-bit
pointer onto the bus if appropriate, where it is
read by the CPU. If the 80130 does supply the
pointer, then ACK will be low for the cycle. This
cycle also has the value LlR for the IR input being
acknowledged.
6. This completes the interrupt cycle. The ISR bit
remains set until an appropriate EXIT INTERRUPT
primitive (EOI command) is called at the end of
the Interrupt Handler.
At the end of the day, the task will exit the loop and
execute RESET INTERRUPT, which disables the interrupt level, and deletes the interrupt task. The OSP
now reclaims the memory used by the Task and
schedules another task. If an exception occurs, the
coded value for the exception is available in TIMES
EXCEPTS CODE after the execution of the primitive.
OSP APPLICATION EXAMPLE
Figure 5 shows an application of the OSP primitives
to keep track of time of day in a simplified example.
The system design uses a 60 Hz A.C. signal as a time
base. The power supply provides a TTL-compatible
A typical PL/M-86 calling sequence is illustrated by
the call to RESET INTERRUPT shown in Figure 5.
6-14
AFN·02059B
intel'
80130/80130-2
iAPX 86/30, 8B/30, 186/30, 188/30
Table 2, OSP System Data Type Summary
Job
I
,
Task
Jobs are the means of organizing the program environment and resources. An application consists of
one or more jobs. Each IAPX 86/30 system data type IS contained In some job.,Jobs are independent of
each other, but they may share access to resources. Each job has one or more tasks, one of which is an
Initial task. Joi')s are given pools at memory, ana lney may c,,,ai .. subordinate offspring jobs, which
may borrow memory from thel r parents.
Tasks are the means by which computations are accomplished. A task IS an instruction stream with its
own execution stack and private data. Each task is part of a job and is restricted to the resources
provided by Its job. Tasks may perform general Interrupt handling as well as other computational
functions Each task has a set of attributes, which is maintained for it by the IAPX 86/30, which
characterize its status These attributes are'
its
ItS
Its
ItS
ItS
its
Its
containing job
register context
Priority (0-255)
execution state (asleep, suspended, ready, running, asleep/suspended).
suspension depth
user-se!ected exception handler
optional 8087 extended task state
Segment
Segments are the units of memory allocation A segment IS a phYSically contiguous sequence of
16-byte, 8086 paragraph-length, units. Segments are created dynamically from the free memory
space of a Job as one of its Tasks requests memory for ItS use. A segment IS deleted when it IS no longer
needed The IAPX 86/30 maintains and manages free memory in an orderly fashion, it obtains memory
space from the pool assigned to the containing job of the requesting task and returns the space to the
Job memory pool (or the parent Job pool) when it IS no longer needed. It does not allocate memory to
create a segment if sufficient free memory IS not available,to it, in that case it returns an error
exception code
Mailbox
Mailboxes are the means of mtertask communication. Mailboxes are used by tasks to send and
receive message segments The IAPX 86/30 creates and manages two queues for each mailbox. One
of these queues contains message segments sent to the mailbox but not yet received by any task. The
other mailbox queue consists of tasks that are waiting to receive messages. The IAPX 86/30 operation
assures that waiting tasks receive messages as soon as messages are available Thus at any moment
one or possibly both of two mailbox queues Will be empty.
Region
Regions are the means of serialization and mutual exclUSion. Regions are familiar as '"critical code
regions'" The iAPX 86/30 region data type consists of a queue of tasks. Each task walts to execute in
mutually exclUSive code or to access a shared data region, for example to update a file record.
Tokens
I
I
The OSP Interface makes use of a 16-bltTOKEN data type to identify individual OSF data structures.
Each of these (each Instance) has Its own unique TOKEN. When a primitive is called, it is passed the
TOKENs of the data structures on which it Will operate.
6-15
AFN·02059B
80130/80130·2
iAPX 86/30, 88/30, 186/30, 188/30
Table 3. System Data Type Codes and Attributes
Code
Jobs
1
Tasks
Memory Pool
S.o.T. Directory
Tasks
2
Priority
Stack
Code
State
Exceptton Handler
Mailboxes
3
Queue of S.o.T.s
(generally segments)
Queue ofTasks
waiting for S.o.T.s
5
Queue of Tasks
waiting for mutually
exclusive code or
data
6
Buffer
Length
I
I
I
Region
~
Table 4.
Class
Attributes
S.D.T.
OSP
Primitive
OS~Primitives
Interrupt
Number
Entry Code
inAX
Parameters
On Caller's Stack
CREATE JOB
184
0100H
'See 80130 User Manual
CREATE TASK
184
0200H
DELETE TASK
SUSPEND TASK
RESUME TASK
SET PRIORITY
SLEEP
184
184
184
184
184
0201H
0202H
0203H
0209H
0204H
PriOrity, IP Ptr, Data Segment, Stack
Seg, Stack Size Task Information,
ExcptPtr
TASK, ExcptPtr
TASK, ExcptPtr
TASK, ExcptPtr
TASK, PriOrity, ExcptPtr
Time Llmlt,ExcptPtr
DISABLE
ENABLE
ENTER INTERRUPT
EXIT INTERRUPT
GET LEVEL
RESET INTERRUPT
SET INTERRUPT
190
184
184
186
188
184
184
0705H
0704H
0703H
NONE
0702H
,0706H
0701H
SIGNAL INTERRUPT
WAIT INTERRUPT
185
187
NONE
NONE
J
I
0
r
B
I
I
i
I
T
A
S
K
I
I
N
T
E
i
I
I
R
R
U
P
T
Level, ExcptPtr
Level #, ExcptPtr
Level #, ExcptPtr
Level #, ExcptPtr
Level #, ExcptPtr
Level #, ExcptPtr
Level, Interrupt Task Flag Interrupt
Handler Ptr, Interrupt Handler DataSeg
ExcptPtr
Level, ExcptPtr
Level, ExcptPtr
f - - - -..--.--+---------f------~-------_t_---.-~----------
I
i
s
i
6-16
AFN-02059B
80130/80130-2
iAPX 86/30, 88/30, 186/30, 188/30
Table 4. OSP Primitives (Continued)
Parameters
On Caller's Stack
OSP
Primitive
Interrupt
Number
Entry Code
in AX
CREATE MAILBOX
DELETE MAILBOX
RECEIVE MESSAGE
184
184
184
0300H
0301H
0303H
SEND MESSAGE
184
0302H
Mailbox flags. ExcptPtr
MAILBOX. ExcptPtr
MAILBOX. Time Limit ResponsePtr.
ExcptPtr
MAILBOX. Message Response. ExcptPtr
R
E
G
I
0
N
ACCEPT CONTROL
CREATE REGION
DELETE REGION
RECEIVE CONTROL
SEND CONTROL
184
184
184
184
184
0504H
0500H
0501H
0503H
0502H
REGION. ExcptPtr
Region Flags. ExcptPtr
REGION, ExcptPtr
REGION. ExcptPtr
ExcptPtr
E
N
V
I
R
0
N
M
E
N
T
DISABLE DELETION
ENABLE DELETION
GET EXCEPTION
HANDLER
GETTYPE
GET TASK TOKENS
SET EXCEPTION
HANDLER
SET OS EXTENSION
SIGNAL
EXCEPTION
184
184
000lH
0OO2H
TOKEN.ExcptPtr
TOKEN.ExcptPtr
184
184
184
0800H
OOOOH
0206H
Ptr.ExcptPtr
TOKEN.ExcptPtr
Request. ExcptPlr
184
184
0801H
0700H
Plr, ExcptPtr
Code,lnsIPtr. ExcptPtr
184
0802H
Exception Code. Parameter Number,
StackPtr.O.O.ExcptPtr
Class
M
A
I
L
B
0
X
A
L
NOTES:
All parameters are pushed onto the
asp stack
Each parameter is one word See Figure 3 for Call Sequence.
Explanation of the Symbols
JOB
TASK
REGION
MAILBOX
SEGMENT
TOKEN
Level
ExcptPtr
Message
Ptr
Seg
asp JOB SOT Token
asp TASK SOT Token
asp REGION SOT Token
asp MAILBOX SOT Token
asp SEGMENT SOT Token
Any SOT Token
Interrupt Level Number
POinter to Exception Code
Message Token
POinter to Code. Stack etc. Address
Value Loaded mto appropriate Segment Register
Value Parameter
6-17
AFN·02059B
80130/80130-2
iAPX 86/30, 88/30, 186/30, 188/30
Table 5. OSP Primitive Performance Examples
Primitive Execution Speed·
(microseconds)
Datatype' Class
JOB
TASK
SEGMENT
MAILBOX
CREATE JOB
CREATE TASK (no preemption)
CREATE SEGMENT
SEND MESSAGE (with task switch)
SEND MESSAGE (no task switch)
RECEIVE MESSAGE (task waiting)
RECEIVE MESSAGE (message waiting)
SEND CONTROL
RECEIVE CONTROL
REGION
2950
1360
700
475
265
540
260
170
205
's MHz iAPX 86/30 asp Configuation,
Table 6. Baud Rate Count Values (16X)
Baud
Rate
8 MHz Count
Value
5 MHz Count
Value
300
600
1200
2400
4800
9600
1667
833
417
208
104
52
1042
521
260
130
65
33
6-18
AFN,02059B
80130/80130·2
iAPX 86/30, 88/30, 186/30, 188/30
Table 7a. Mnemonic Codes for Unavoidable Exceptions
E$OK
Exception Code Value = 0
the operation was successful
E$TIME
Exception Code Value = 1
the specified time limit expired before completion of the operations was possible
E$MEM
Exception Code Value = 2
insufficient nucleus memory IS available to satisfy the request
E$BUSY
Exception Code Value - 3
specified region is currently busy
E$LlMIT
Exception Code Value = 4
attempted violation of a job, semaphore, or system limit
E$CONTEXT
Exception Code Value - 5
I
the primitove was called In an Illegal context (e.g., call to enable for an already enabled
interrupt)
,
E$EXIST
Exception Code Value - 6
a token argument does not currently refer to any object; note that the object could have
been deleted at any time by its owner
E$STATE
Exception Code Value
=
7
l
~~~~~~~~~____-ra~t_te_m~p~te_d~I~'II_eg~a_l~s~ta_t_e_t_ra~n_s_it_io_n__b_y_a_t_a_s_k______________________._________4
E$NOT$CONFIGURED
Exception Code Value = 8
the primitive called is not configured In this system
~E·~I~N~T~E~R~R~U~P~T~$~S~AT~U~R~AT~I~O~N~E~x-C-e-p~tio-n~C~0~d-e~V~al~u-e-=~9---------------------------------------·-
The interrupt task on the requested level has reached Its user specified saturation pOint
for Interrupt service requests. No further interrupts will be allowed on the level until the
interrupt task executes a WAIT$INTERRUPT. (This error IS only returned, in line, to
~~~~~~~~~~~-+~ln-t-er-r~u~p-t-h=an-d~l-e~rs~.)~--~------------_______________________________ 1
E$INTERRUPT$OVERFLOW
Exception Code Value = 10
I
I
The interrupt task on the requested level preViously reached its saturation pOint and
caused an E$INTERRUPT$SATURATION condition. It subsequently executed an
ENABLE allowing further interrupts to come in and has received another SIG- I
NAL$INTERRUPTcall, bringing It over its speCified saturation pOint for Interrupt service
requests. (This error is only returned, in line, to interrupt handlers).
-.J
II
Table 7b. Mnemonic Codes for Avoidable Exceptions
E$ZERO$DIVIDE
Exception Code Value = 8000H
diVide by zero Interrupt occurred
E$OVERFLOW
Exception Code Value - 8001 H
oVEjrflow interrupt occurred
E$TYPE
Exception Code Value = 8002H
a token argument referred to an object tha was not of required type
E$BOUNDS
Exception Code Value = 8003H
an offset argument is out of segment bounds
E$PARAM
Exception Code Value = 8004H
a (non-token,non-offset) argument has an illegal value
E$BAD$CALL
Exception Code Value = 8005H
an entry code for which there is no corresponding primitive was passed
1
Ii
-------1
!
.----~.~
E$ARRAY$BOUNDS = 8006H Hardware or Language has detected an array overflow
E$NDP$ERROR
Exception Code Value = 8007H
an 8087 (Numeric data Processor) error has been detected; (the 8087 status Information !
is contained in a parameter to the exception handler)
J
6-19
AFN-02059B
intel'
80130/80130-2
iAPX 86/30,88/30,186/30,188/30
ABSOLUTE MAXIMUM RATINGS*
"NOTICE: Stresses above those listed under Absolute
Maximum Ratings may ca'use permanent damage to the
device, This is a stress rating only and functional operation
of the device at these or any other conditions above those
indicated in the operational sections of this specification
is not implied. Exposure to absolute maximum rating conditions for extended period may affect device reliability.
e
Ambient Temperature Under Bins ......... O°C to 700
Storage Temperature ................. -65°C to 150°C
Voltage on Any Pin With
Respect to Ground .................. - 1.0V to + 7V
Power Dissipation ........................... 1.0 Watts
D.C. CHARACTERISTICS
Symbol
Min.
Max.
Units
V'L
V,H
Input low Voltage
- 0.5
0.8
V
Input High Voltage
2.0
Output low Voltage
Vcc +.5
0.45
V
VOL
VOH
Output High Voltage
Test Conditions
V
IOL
V
=
2mA
Icc
Power Supply Current
200
mA
IOH = -400~A
TA = 25 C
lu
Input Leakage Current
10
~A
0< V,N < Vcc
ILR
IR Input Load Current
10
-300
~A
Y'N
Y'N
2.4
/J.A
ILO
Output leakage Current.
10
Vcu
VCHI
Clock Input Low
0.6
/J.A
V
C'N
C,O
Input Capacitance
10
pF
110 Capacitance
15
pF
Icu
Clock Input Leakage Current
10
150
10
/J.A
Clock Input High
A.C. CHARACTERISTICS
Symbol
-
(TA = DoC to 70°C, Vee = 4.5 to 5.5V)
Parameter
3.9
(TA = 0-70°C, Vcc
Parameter
=
=
~A
~A
Max.
-
125
ns
Units
lCLCH
ClK low Time
90
-
55
-
TC~CL
ClK High Time
69
2000
44
2000
ns
TSVCH
TCHSV
TSHCL
Status Active Setup Time
80
-
65
ns
Status Inactive Hold Time
10
-
-
10
-
ns
Status Inactive Setup Time
55
-
-
ns
TCLSH
Status Active Hold Time
10
-
55
10
-
ns
TASCH
Address Valid Setup Time
8
-
8
-
ns
-
10
ns
100
-
100
Read Data Valid Delay
-
140
105
ns
Read Data Hold Time
10
10
-
ns
Read Data to Floating
10
-
-
100
10
100
ns
-
85
-
65
ns
Chip Select Hold Time
0
Write Data Setup Time
80
TCHDH
TJLJH
TCLDV
Write Data Hold Time
IR low Time
10
TCLDH
TCLDX
TCLCA
Cascade Address Delay Time
20
0
60
10
Test Conditions
ns
-
10
20
.
80130-2
ClK Cycle Period
Address Hold Time
Vcc
Ground)
TCLCL
Chip Select Setup Time
=
Y'N = Vcc
Y'N = 2.5V
Y'N = OV
Min.
TCSCL
TCHCS
TDSCL
Vcc
0
.45 = Y'N
80130
Min,
Max.
TCLAH
=
V
4.5-5.5 Volt, Vss
200
=
ns
ns
ns
ns
ns
CL = 200 pE
6-20
AFN·02059B
80130/80130·2
iAPX 86/30, 88/30, 186/30, 188/30
A.C. CHARACTERISTICS (Continued)
Symbol
Min.
Parameter
Cascade Addre::,st: Hold Time
TCLCF
T,AVE
INTA Status t Acknowledge
TCHEH
Acknowledge Hold Time
TCSAK
TSACK
Chip Select to ACK
TAACK
Address to ACK
TCLOO
Timer Output Delay Time
TCLOO1
-
----- f----0
- -- - f-----.-----
Units
10
-
n~
80
-
80
ns
-
0
-
ns
-
110
ns
_.
110
140
- - - - f------
. _ - - f------
90
--200
Tlmer1 Output Delay Time
-
200
TJHIH
INT Output Delay
-
200
T'ACL
IR Input Set Up
-.
80130-2
Min.
Max.
-
10
._-
Status to ACK
80130
Max.
140
-----
90
-.
- --f-- 200
200
200
- f------
ns
Notes
----~----.
ns
-.-
-~.--
20
ns
ns
ns
CL - 100pF
CL 100pF
,.
---
ns
WAVEFORMS
A.C.
elK
$VSTICK
DELAY BAUD
______________ _____
~x
elK
IA
INT
!
i
I-~
TIRCl
----I
I~-
TJHIH
.. --
6-21
AFN 020598
80130/80130·2
iAPX 86/30, 88/30, 186/30, 188/30
WAVEFORMS
A.C.
.
n
T'
.. TCHCL
•
I
-'
ClK
~TCHSV"I
52. $1. S 0
\
~
~I
~A
VAUD
'k---J
r
ADDRESS VALID
:T
J
'fJ{f}IX
-I I. . . . . TCSAK
'\
-I
TAACK
FLOAT
I
-I
TCtDX
~
TCLDV
READ DATAVAlIQ
I
~
I~
FLOAT
~
\
TSACK
TCLeF
2ND IN TA CYCLE
-ADo
I
WRITE DATA VAllO
ADDRESS VALID
I
I~
--.-J
A
TDSCL_ _
REA o CYCLE
K
:;5
reseL
I
A
AC
I
S
I
AO'5-
j
I:SHC~
I
WRI TE CYCLE
AD
I
I
'T'
S"T
T'
TW
:cls~1
r---
I
T3
\
relel
lSVCH
BHE A
8HE, AD
I
T2
I
reLCH
I----FLOAT
CD CASCADE ADDRESS
FLOAT
®
POINTER
TIAVE
I
\
K
\
0
\
IR
TIAVE
@
~
/--T,CHEH
--t~
TCHEH
J
NOTES
1 CASCADE ADDRESS PRESENTED ON AD8, AD9 AND ADt 0 CORRESPONDING TO CASO CAS 1
AND CAS2 RESPECTIVELY AD1 1-AD1 5 UNES ARE ACTIVE AI\ID HAVE UNKNOWN VALUES AOO-AD7
ARE TRISTATE,
2 POINTER VALUE IS ACTIVE ONLY IF POINTER IS GENERATED FROM THE 80150 AND NOT FROM
EXTERNAL SLAVE UNIT
,
ACTIVE LOW ONLY WHEN POINTER DATA IS,BE'NG SUPPLIED BY THE 80150
LOW ONLY FOR LOCAL INTERRuPT
6-22
AFN-02059B
inter
80150/80150-2
JA\@WJA\OO©~ OOOIF@IRl~JA\ii'O@OO
iAPX 86/50, 88/SO, 186/50, 188150
CP/M-86* OPERATING SYSTEM PROCESSORS
• High·Performance Two·Chip Data
Processors Containing the Complete
CP/M·86 Operating System
• Memory Disk Makes Possible Diskless
CP/M·86 Systems
• Standard On·Chip BIOS (Basic
Input/Output System) Contains Drivers
for 8272A, 8274, 8255A, 8251A
• Bullt·ln Operating System Timers and
Interrupt Controller
• No License or Serialization Required
• 8086/80150/80150-2/8088/80186/80188
• BIOS Extensible with User· Supplied
Peripheral Drivers
Compatible At Up To 8 MHz Without
wait States
• User Intervention Points Allow Addition
of New System Commands
The Intel iAPX 86/50, 88/50; 186/50, and 188/50 are two-chip microprocessors offering general-purpose
CPU instructions combined with the CP/M-86 operating system. Respectively, they consist of the 8- and
16-bit software compatible 8086,8088,80186, and 80188 CPU plus the 80150 CP/M-86 operating system
extension.
CP/M-86 is a single-user operating system designed for computers based on the Intel iAPX 86, 88, 186,
and 188 microprocessors. The system allows full utilization of the one megabyte of memory available for
application programs. The 80150 stores CP/M-86 in its 16K bytes of on-chip memory. The 80150 will run
third-party applications software written to run under standard Digital Research CP/M-86.
The 80150 is implemented in N-Channel, depletion-load, silicon-gate technology (HMOS), and is housed
in a 40-pin package. Included on the 80150 are the CP/M-86 operating system, Version 1.1, plus hardware
support for eight interrupts, a system timer, a delay timer, and a baud rate generator.
*CPfM·86 Is a trademark of Digital Research, Inc.
,-------1
I
I
I
I
8284A
CLOCK
DRIVER
RDY
I
I
I
8088
OR
B086
INTERRUPT
PROGRAM
MEMORY
OATA
MEMORY
I
STATUS
:
I
I
BUS
INTERFACE
I~~--~----~~
I
INTERRUPT
STATUS
CS.LlR 1 - - - - - -....
I
80150
INTERRUPT
I
REQUESTS
_J~
BAUD RATE
TIMER
DELAY
TIMER
SYSTEM
TIMER
IAPX 88150, 88150
Figure 1_ iAPX 86150, 86150 Block Diagram
The following are trademarks of Intel Corporation and its affiliates and may be used only to identify Intel products. exp, CREDIT, 1,ICE.leS, 1m, Insite, Intel. INTEL, Intelevislon.lntelllnk,
~~.~~~~~~~: ~~::~~~~: ~~:7~sc:;~:~~~r:n~~~~;R~~~;S~~~;~~,~~~~~~1.:g~;u~:c:~;:~n~:;;~:~u~~:~~~~~~~~~~;~~ ::!.~~~b=:~rt~~~~~'s.
of Any Circuitry Other Than Circuitry Embodied
In
an Intel Product No Other Patent Licenses are implied ©INTEL CORPORATION, 1982.
6-23
SEPTEMBER 1982
ORDER NUMBER: 210705-4102
inter
80150/80150-2
iAPX 86150,88/50,186/50,188/50
! I
MAX
'::sE
V••
Vss
Vee
1.01.
1.015
1.01.
Vee
1.015
1.013
BHE
1.013
1.16/53
1.012
IR7
AD12
1.017/5'
1.011
IRS
AD11
1.18155
4010
IRS
AD10
1.19/56
ADS
IRO
AD9
AD8
IR3
ADa
MN/MX
1.07
IR2
1.07
iiii
ADS
IR1
ADS
iiQ{c'ffi
ADs
IRO
ADS
ROtGT1
AD<
'NT
AD.
LOCk
AD3
iii
AD3
52
BHE/S7 (HIGH)
1.02
51
AD2
Si
1.01
so
AD1
so
ADO
ACK
ADO
OSO
LlR
NMI
OSl
MEMCS
IOCS
INTR
SY$TICK
TEST
elK
DELAY
ClK
READY
V'S
BAUD
Vss
RESET
Figure 2. iAPX 86150, 88150 Pin Configuration
Table 1. 80150 Pin Description
Symbol
AD15-ADo
BFiE/S7
TYpe
I/O
I
Name and Function
Address Data: These pins constitute the time multiplexed memory address (T1) and
data (T2, T3, Tw, T4) bus. These lines are active HIGH. The address presented during
T1 of a bus cycle will be latched internally and interpreted as an 80150 internal
address if MEMCS or lacs is active for the invoked primitives. The 80150 pins float
whenever it is not chip selected, and drive these pins only during T2- T4 of a read
cycle and T1 of an INTA cycle.
Bus High Enable: The 80150 uses the SHE signal from the processor to determine
whether to respond with data on the upper or lower data pins, or both. The signal is
active LOW. SHE is latched by the 80150 on the trailing edge of ALE. It controls the
80150 output data as shown.
SHE
0
0
1
1
S2. Sl. So
I
Ao
0
1
0
1
Word on AD15-ADo
Upper byte on AD15 - ADs
Lower byte on AD7-ADo
Upper byte on AD7-ADo
Status: For the 80150, the status pins are !,!sed as inputs only. 80150encoding follows:
S2
0
0
0
0
1
1
1
s;0
0
1
1
0
0
1
So
0
1
0
1
0
1
X
INTA
lOAD
IOWA
Passive
Instruction fetch
MEMAD
Passive
6-24
AFN·01487A
inter
80150/80150·2
iAPX 86150,88/50,186/50,188/50
Table 1. 80150 Pin Description (Continued)
lYpe
Name and Function
CLK
I
Clock: The system clock provides the basic timing for the processor and bus controller.
It is asymmetric with a 33% duty cycle to provide optimized internal timing. The 80130
uses the system clock as an input to the SYSTICK and BAUD timers and to synchronize
operation with the host CPU
INT
0
Interrupt: INT is HIGH whenever a valid interrupt request is asserted. It is normally used
to interrupt the CPU by connecting it to INTR.
IR7 - IRo
I
Interrupt Requests: An interrupt request can be generated by raising an IR input (LOW
to HIGH) and holding it HIGH until it is acknowledged (Edge-Triggered Mode), or just by a
HIGH level on an IR input (Level-Triggered Mode).
ACK
0
Acknowledge: This line is LOW whenever an 80150 resource is being accessed. It is
also LOW during the first INTA cycle and second INTA cycle if the 80150 is supplying
the interrupt vector information. This signal can be used as a bus ready acknowledgement and/or bus transceiver control.
MEMCS
I
Memory Chip Select: This input must be driven LOW whell'l a kernel primitive is being
fetched by the CPU. AD13-ADo are used to select the instruction.
IOCS'
I
Input/Output Chip Select: When this input is low, during an lORD or IOWR cycle, the
80150's kernel primitives are acceSSing the appropriate peripheral function as specified by the following table:
Symbol
--
BHE
A3
A2
Al
Ao
0
X
X
X
0
0
1
1
1
1
X
X
1
0
0
0
1
1
X
X
X
X
0
1
X
1
X
0
0
0
0
0
X
1
1
1
1
1
LIR
0
Q
1
-
Passive
Passive
Passive
Interrupt Controller
Systick Timer
Delay Counter
Baud Rate Timer
Timer Control
Local Bus Interrupt Request: This signal is LOW when the interrupt request is for a
non-slave input or slave input programmed as being a local slave.
Vee
Power: Vee is the +5V supply pin.
VSS
Ground: VSS is the ground pin.
SYSTICK
0
System Clock Tick: Timer 0 Output.
DELAY
0
DELAY Timer: Output of timer 1.
BAUD
0
Baud Rate Generator: 8254 Mode 3 compatible output. Output of 80150 Timer 2.
The 80150 breaks new ground in operating system
software-on-silicon components. It is unique
because it is the first time that an industrystandard personal/small business computer
operating system is being put in silicon. The
80150 contains Digital Research's CP/M-86
operating system, which is designed for Intel's
line of software- and interface-colTJpatible iAPX
86, 88, 186, and 188 microprocessors. Since the
entire CP/M-86 operating system is contained on
the chip, it is now possible to design a diskless
computer that runs proven and commonly
available applications software. The 80150 is a
-
true operating system extension to the host
microprocessor, since it also integrates key
operating system-related peripheral functions
onto the chip.
MODULAR DESIGN
Based on a proven, modular design, the system includes the:
• CCP: Console C.ommand Processor
The CCP is the human interface to the
operating system and' performs decoding and
6-25
AFN·Ol«17A
inter
80150/80150-2
iAPX' 86150,88/50,186/50,188/50, t!.\@Wt!.\OO©~ O~IF@IR1~t!.\iiO@OO '
creased significantly. Since CP/M-86 is now
always in the system as a standard hardware
operating system, a properly functioning
system diskette is not required. CP/M-86 in
hardware can no longer be overwritten accidentally by a runaway program. System reliability
is enhanced by the decreased dependence on
floppy disks and fewer chips and interconnections required by the highly integrated 80150.
execution of user commands.
• BOOS: Basic Disk Operating System
The BOOS is the logical, invariant portion of the
operating system; it supports a named file
system with a maximum of 16 logical drives,
containing up to 8 megabytes each for a potential of 128 megabytes of on-line storage.
• BIOS: Basic Input/Output System '
4. The microcomputer system boots up CP/M-86
on power-on, rather than requiring the user to
go through a complicated boot sequence thus
lowering the user expertise required.
'
The physical, variant portion of the operating
system, the BIOS contains the systemdependent input/output device handlers.
CP/M* COMPATIBILITY
5. Diskless CP/M-based systems are now easy to
design. Since CP/M is already in the microcomputer hardware, there is no need for a disk drive
in the system if it is not desired. Without a disk
, drive, a system is more portable, simpler to use,
less costly, and more reliable.
CP/M-86 files are completely compatible with
CP/M for 8080- and 8085-based microcomputer
systems. This simplifies the conversion of software developed under CP/M to take full advantage
of iAPX 86, 88, 186, 188-based systems.
The user will notice no significant difference between CP/M and CP/M-86. Commands such as
olR, TYPE, REN, and ERA respond the same way,
in both systems.
CP/M-86 uses the iAPX 86, 88, 186, 188 registers
corresponding to 8080 registers for system call
and return parameters to further simplify software
transport. The 80150 allows application code and
data segments to overlap, making the mixture of
code and data that often appears in CP/M applications acceptable to the iAPX 86, 88, 186, 188.
6. The administrative costs associated with
distributing CP/M-86 are eliminated. Since
CP/M-86 is now resident on the 80150 in the
microcomputer system, there is no end-user
licensing required nor is there any serialization
requirement' for the 80150 (because no CP/M
diskette is used).
7. End-users will value having their CP/M
operating system resident in their computer
rather than on a diskette. They will no longer
have to back up the operating system or have a
diskette working properly to bring the system
up in CP/M, increasing their confidence in the
integrity, reliability, and usability of the system.
Unique Capabllitle,s of CP/M·86 in Silicon
1. CP/M-86 on-a-chipreduces software development required by the system designer. It can
change the implementation of the operating
system into the simple inclusion of the 80150
on the CPU board.
80150 FUNCTIONAL DESCRIPTION
The 80150 is a processor extension that is fully
compatible with the 8086, 8088, 80186, and 80188
microprocessors. When the 80150 is combined
with the microprocessor, the two-chip set is
called' an Operating System Processor and is
denoted as the iAPX 86/50, 88/50,186/50, or 188/50.
The basic system configuration is shown in
Figure 1. The 80150 connects"directly to the multiplexed address/data bu's and runs up to 8 MHz
without wait states.
'As described later, the designer can either
simply incorporate the Intel chip without the
need for writing even a single line of additional
code, or he can add additional device drivers by
writing only the small amount of additional
code required.
2. The 80150 is the most cost-effective way to imple~ent CP/M-86 in a microcomputer. The integration of CP/M-86 with, the 16K bytes of
system memory It requires, the two boot ROMS
required in a diskette-based CP/M-86, and, the
on-chip peripherals (interrupt controller and
timers) lead to savings in software, parts cost,
board space, and Interconnect wiring.
A. Hardware. Figure 3 is a functional diagram of
the 80150 itself. CP/M-86 is stored in the
16K-bytes of control store. The timers are compatible with the ~tandard 8254 timer. The inter- .
rupt controlier, with its eight programmable interrupt Inputs and one interrupt output, is
compatible with the 8259A Programmable Interrupt Controller. ,External slave 8259A inter-
3. The reliability of the microcomputer is in-
·CP/M is a registered trademark of Digital Research, Inc. '
6-26
AFN·OI487A,
inter
80150/80150·2
iAPX 86150,88/50,186/50, 188/50 l!.\W\V7l!.\OO©~ DOOIF@OOIMll!.\'ii'D@OO
,----------------------------------,I
I
1
OPERATING SYSTEM UNIT
I
00-7
I
I
:
I
I
r
I_
I
I '
PROGRAMMABLE
I
IN~~~~~PT
I
/ (
INTERRUPT INPUTS
I
I
I
CONTROL
j
STORE
'--------'i
I
~
:
r-------~:
I~
:
::
C··
:
,S
SYSTEM
DELAY
.>I
:
l~
I:
I "-
16
I
BAUD RATE
GENERATOR
1
ADDRESS,
I
DATA BUS
I
I
I
L
DELAY
I:LLI_~
~
BAUD RATE
- -- -- ---------1
r:-
I
rl--
.
DATA
BUFFER
I
TIMER
Ir--------~
/'--L."7'--N...1
SYSTEM
II-rV~--------~:
f------------- - - - - - - - --
!
~
TIMER:
r--r-hl,.-v""L;:~~===~:
_
:~------~
INTERRUPT OUT
(:=====~=J
&
BUS
INTERFACE
AND
ADDRESS
CONTROL.
LATCH
~
~
I
CLOCK
STATUS
4
I~,
~
BUS CONTAOL
~ LOCAL
CONTROL UNIT
__________________________________
I
I
~
INTERRUPT
([ijli)
Figure 3. 80150 Internal Block Diagram
rupt controllers can be cascaded with the
80150 to expand the total number of interrupts
to 57.
vided to format diskettes, transfer files between
devices (based on Digital Research's Peripheral
Interchange Program PIP), and alter and display
I/O device and file status (based on Digital
Research's STAT).
.
B. Software. Digital Research's version 1.1 of
CP/M·86 forms the basis of the 80150. CP/M
consists of three major parts: the Console
Command Processor (CCP), the Basic Disk
Operating System (BOOS), and the Basic In·
put/Output System (BIOS). Details on CP/M·86
are provided in Digital Research's CPIM-86
Operating System User's Guide and CPIM-86
Operating System System Guide.
Through User Intervention Points, the standard
CP/M-86 CCP.is enhanced to allow the user to add
new built-in commands to further customize a
CP/M-86 system.
BOOS - Basic Disk Operating System
Once the CCP has parsed a command, it sends it
to the BOOS, which performs system services
such as managing disk directories and flies.
Some of the standard BOOS functions provide:
Console Status
Console Input and Output
List Output
Select Drive
Set Track and Sector
CCP - Console Command Processor
The CCP provides all of the capabilities provided
by Digital Research's CCP. Bullt·in commands
have been expanded to include capabilities normally included as transient utilities on the Digital
Research CP/M-86 diskette: Commands are pro6-27
AFN-Ol467B
80150/80150-2
iAPX 86150,88/50,186/50,188/50
fered on the 80150 or substitute or add any additional device drivers of his choice.
ReadlWrite Sector
Load Program
The 8DOS in the 80150 provides the same functions as the standard Digital Research CP/M-86
BOOS.
BIOS - Basic Input/Output System
The BIOS contains the system-dependent I/O
drivers. The 80150 BIOS offers two fundamental
configuration options:
These two options negate the potential softwareon-silicon pitfall of inflexibility in system design.
The OEM can customize the end system as
desired.
The predefined configuration offers a choice
among several peripheral chip drivers Included on
the 80150. Drivers for the following chips are included in the 80150 BIOS:
8251A
1. A predefined configuration which supports
minimum cost CPIM~86 microcomputer
systems and which requires no operating
system development by the system designer.
8274
2. An OEM-configurable mode, where the
designer can choose among several drivers.of·
8272A
8255A
Universal Synchronous/
Asynchronous Receiver/Transmitter (USART)
Multi-Protocol Serial Controller
(MPSC)
Programmable Parallel Interface
(PPI)
Floppy Disk Controller
FLOPl DISK
808818086180186180188
CPU
8272A
80150
ADDRESS/DATA BUS
8251A
cONLLE
8255A
PRIL~
Figure 4. Predefined Configuration
6-28
AFN.()14678
80150/80150-2
iAPX 86150,88/50,186/50,188/50
Even In the predefined configuration, the system
designer (or end user, if the system designer
desires) may select parameters such as the baud
rates for the console and printer, and the floppy
disk size (standard 8" or 5Y4" mini-floppy) and
format (FM single density or MFM double density,
single-sided or double-sided).
peripheral chips, such as bubble memories or
more complex CRT controliers. These drivers
would be stored in memory external to the 80150
itself. By providing the configurability option, the
80150 is applicable to a far broader range of
designs that it would be with an inflexible BIOS.
Drivers for the 80150 on-chip timers and interrupt
controller are also included in the BIOS.
MEMORY ORGANIZATION
When using the predefined configuration of the
80150 BIOS, the 80150 must be placed in the top
16K of the address space of the microprocessor
(starting at location FCOOOH) so that the 80150
gains control when the microprocessor is reset.
Upon receipt of control, the 80150 writes a configuration block into the bottom of the micro,
processor's address space, which must be in
RAM. The 80150 uses the area after the interrupt vectors for system configuration information
and scratch-pad storage.
The 80150 takes advantage of the 80186 and 80188
on-chip peripherals in an iAPX 186/50 or 188/50
system. For example, the integrated DMA controlier is
used. Also fully utilized are the integrated memory chip
selects and I/O chip selects.
Since ali microcomputer configurations cannot
be anticipated, the OEM-configurable rhode
allows the system designer to use any set of
peripheral chips desired. This configuration is
shown in Figure 5.
By simply changing the jump addresses in a configuration table, the designer can also gain the
flexibility of adding custom BIOS drivers for other
When using the OEM-configurable mode of the
80150 BIOS, the 80150 is placed on any 16K boun-
FLOPPY DISK
I
8088/808~~~86/80188
f----
80150
OTHER
PERIPHERALS
8272A
ADDRESS/DATA BUS
8255A
8251A
I
ASYNCHRONOUS
COMMUNICATIONS,
CONSOLE,
SERIAL PRINTER
I
KEYBOARD,
PARALLEL PRINTER
8274
I
SYNCHRONOUS LINE,
SERIAL PRINTER,
CONSOLE
'Figure 5. OEM Configurable System
6-29
AFN-01467B
inter
80150/80150-2
iAPX 86150,88/50,186/50, 188/50
dary of memory except the highest (FCOOOH) or
lowest (OOOOOH). The user writes interface code (in
the form of a simple boot ROM) to Incorporate and
link additional features and changes into the
standard 80150 environment. The configuration
block may be located as desired in the address
space, and its size may vary widely depending on
the application.
&@W&IJ\I.J©~ OIJ\l.J!F@OOfi\1l&'ii'O@1J\I.J
a number of ways:
a.
b.
c.
d.
e.
telephone lines via a modem.
ROM-based software.
a ne.twork.
bubble memory based software.
low-cost cassettes.
TYPICAL SYSTEM CONFIGURATION
Memory Disk
A unique capability offered by the 80150 is the
Memory Disk. The Memory Disk consists of a
block of RAM whose size can be selected by the
designer. The Memory Disk is treated by the
aDOS as any standard floppy diSk, and is one of
the 16 disks that CPIM can address. Thus files can
be opened and closed, programs stored, and
statistics gathered on the amount of Memory Disk
space left.
The Memory Disk opens the possibility of a portable low-cost diskless microcomputer or network
station. Applications software can be provided in
Figure 6 shows the processing cluster of a
"typical" iAPX 86/50 or lAPX 88/50 OSP system.
Not shown are subsystems likely to vary with the
application. The configuration includes an 8086
(or 8088) operating in maximum mode, an 8284A
clock generator and an 8288 system controller.
Note that the 80150 is located on the CPU side of
any I~tches or transceivers.
Timers
The Timers are connected to the lower half of the
data bus and are addressed at even addresses.
The timers are read as two successive bytes,
ClK
0
f-
CONTROL
52
elK
S!!r--
~
8086
8288
~
.,.
SHE
~RESS/o~
SHE
AI'
8282
ADDRESS
1ADO
INT
-
LOCAL
AND
SYSTEM
RESOURCES
AO
...---015
...
"-
8286 ,
_
INT
52
~
VI-
AD~~
ClK
ADO
10CS
r:-r-
MEMes
DECODE
lOGIC
r~
"
b
,~
ill
.
L1R
IRO
r-
BAUD
DO
L-
1
A
INTERRUPT REQUESTS
IR7
$YSTICK
~
Figure 6. Typical OSP Configuration
6-30
AFN'()I467B
80150/80150-2
iAPX 86150,88/50,186/50,188/50
always LSB followed by MSB. The MSB is always
latched on a read operation and remains latched
until read. Timers are not gatable. An external
8254 Programmable Interval Timer may be added
to the system.
In addition to standard PIC functions, the 80150
PIC unit has an LlR output signal, which when low
indicates an interrupt acknowledge cycle. LlR=O
is provided to control the 8289 Bus Arbiter
SYSB/RE:SB pin. This will avoid the need of requesting the system bus to acknowledge local
bus non-slave interrupts. The user defines the interrupt system as part of the configuration.
Baud Rate Generator
The baud rate generator operates like an 8254
(square wave mode 3). Its output, BAUD, is initially
high and remains high until the Count Register is
loaded. The first falling edge of the clock after the
Count Register is loaded causes the transfer of
the internal counter to the Count Register. The
output stays high for N/2 [(N + 1)/2 if N is odd] and
then goes low for N/2 [(N - 1)/2 if N is odd]. On the
falling edge of the clock which signifies the final
count for the output in low state, the output
returns to high state and ,the Count Register is
transferred to the internal counter. The baud rates
can vary from 300 to 9600 baud.
INTERRUPT SEQUENCE
The interrupt sequence is as follows:
1. One or more of the interrupts is set by a lowto-high transition on edge-sensitive IR inputs
or by a high input on level-sensitive IR inputs.
2. The 80150 evaluates these requests, and
sends an INT to the CPU, if appropriate.
3. The CPU acknowledges the INT and responds
with an interrupt acknowledge cycle which is
encoded in S2 - SO,
The baud rate generator is located at OCH (12),
relative to the 16-byte boundary in the I/O space in
which the 80150 component is located. T~e timer
control word is located at relative address,
OEH(14). Timers are addressed with 10CS = O.
Timers 0 and 1 are assigned to use by the OSP,
and should not be altered by the user.
4. Upon receiving the first interrupt acknowledge
from the CPU, the highest-priority interrupt is
set by the 80150 and the corresponding edge
detect latch is reset. The 80150 does not drive
the address/data bus during this bus cycle but
does acknowledge the ~cle by making
ACK = 0 and sending the LlR value for the IR
input being acknowledged.
'
The 80150 timers are subset compatible with 8254
timers.
5. The CPU will then initiate a second interrupt
acknowledge cycle. During this cycle, the
80150 will supply the cascade address of the
interrupting input at T 1 on the bus and also
release an 8-bit pointer onto the bus if appropriate, where it is read by the CPU. If the
80150 does supply the pOinter, then ACK will
be low for the cycle. This cycle also has the
value LlR for the IR input being acknowledged.
Interrupt Controller
The Programmable Interrupt Controller (PIC), is
also an integral unit of the 80150. Its eight input
pins handle eigl'lt vectored priority interrupts. One
of these pins must be used for the SYSTICK time
function in timing waits, using an external connection as shown. During the 80150 initialization
and configuration sequence, each 80150 interrupt
pin is individually programmed as either level or
edge sensitive. External slave 8259A interrupt
controllers can be used to expand the total
number of interrupts to 57.
6. This completes the interrupt cycle. The ISR bit
remains set until an appropriate EXIT INTERRUPT primitive (EOI command) is called at the
end of the Interrupt Handler.
6-31
AFN·01467B
80150/80150·2
iAPX 86150,88/50,186/50,188/50
ABSOLUTE MAXIMUM RATINGS·
'NOTICE: Stresses above those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. This is a stress rating only and functional operation
of the device at these or any other conditions above those
indicated in the operational sections of this specification
is not implied. Exposure to absolute maximum rating conditions for extended period may affect device reliability.
Ambient Temperature .Under Bias ........ o·e to 70·e
Storage Temperature ................. -65·C to 150·C
Voltage on Any Pin With
Respect to Ground .................. -1.0V to + 7V
Power Dissipation .......................... 1.0 Watts
D.C. CHARACTERISTICS
Symbol
VIL
VIH
VOL
VOH
lee
ILl
ILR
ILo
VCLi
VeHI
CIN
CIO
leu
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
Power Supply Current
Input Leakage Current
IR Input Load Current
TCLCL
,fCLCH
TCHCL
TSVCH
TCHSV
TSHCL
TCLSH
TASCH
TCLAH
TCSCL
TCHCS
TDSCL
TCHDH
TJWH '
TCLDV
TCLDH
TCLDX
TCLCA
Test Conditions
Min.
Max.
Units
- 0.5
2.0
0.8
V
V
V
V
mA
10L ~ 2mA
IOH ~ - 400!LA
TA = 25 C
!LA
0< VIN < Vee
~A
VIN = Vee
VIN = 0
.45 :5 VIN " Vec
Vee +.5
0.45
2.4
200
10
10
-300
10
0.6
Output Leakage Current
Clock Input LOW
Clock Input High
Input Capacitance
110 Capacitance
Clock Input Leakage Current
A.C. CHARACTERISTICS
Symbol
(TA = o·c to TO·C. Vee = 4.5 to 5.5V)
Parameter
!LA
!LA
V
V
pF
pF
3.9
'10
15
10
150
10
!LA
~A
!LA
..
VIN = Vee
VIN = 2.5V
VIN = OV
(TA = 0-70·C, Vee = 4.5-5,5 Volt, Vss = Ground)
Parameter
Mil!.
CLK Cycle Period
CLKLowTIme
CLK High Time
200
90
69
Status Active Setup Time
Status Inactive Hold Time
Status Inactive Setup Time
Status Active Hold Time
Apdress Valid Setup Time
Address Hold Time.
Chip Select Setup Time
Chip Select Hold Time
Write Data Setup Time
Wr~e Data Hold Time
IRLowTIme
Read Data Valid Delay
Read Data Hold Time
Read Data to Floating
cascade Address Dalay Time
80
10
55
10
8
10
20
0
80
10
100
10
10
-
80150
Max.
Min.
-
125
-
2000
55
44
2000
-
-
-
-
80150·2
Max.
-
65
10
55
10
-
-
-
8
10
20
0
60
10
100
140
-
105
1-
100
85
-
-
-
10
10
-
>
100
65
Units
Test Conditions
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ils
ns
ns
ns
ns
ns
ns
CL - 200pF
6-32
AFN·01467B
80150/80150·2
iAPX 86150,88/50,186/50,188/50
inter
~@\Vl~OO©~ OOOIF@!raIMJ~'IT'O@OO
A.C. CHARACTERISTICS (Continued)
80150
Parameter
Symbol
TCLCF
Cascade Addresse Hold TIme
T\AVE
INTA Status t Acknowledge
Acknowledge Hold Time
Chip Select to ACK
TCHEH
TCSAK
TSACK
TAACK
TCLOO
TCLC01
TJHIH
T1RCL
80150-2
Min.
Max.
Min.
Max.
10
-
10
-
80
-
-
0
-
Status to ACK
Address to ACK
Timer Output Delay Time
-
Timerl Output Delay Time
-
200
-
INT Output Delay
IR Input Set Up
20
0
80
-
110
-
110
140
-
140
90
200
-
200
-
90
-
200
-
200
200
20
-
-
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
CL ~ 100pF
CL ~ 100pF
WAVEFORMS
A.C.
eLK
-- _____
____________
TelOO
SV$TICK.
DELAY, BAUD
I
~x~
CUI
IR
INT
6-33
. AFN.()1467B
inter
80150/80150·2
iA~X 86150,88/50, 18~/50,1,88/SO tA\1P>WtA\OO©rg OOOIP@OOIM]b.\'U'O@OO
WAVEFORMS
A.c.
TCHCL
.-
ClK
.~
S2. 11. SO
I
TelCH
\
I
12
T1
T4
T3
TW
I
TSVCH
I
TClS"
TCLCl
I
F~1-----
~
I
T4
,
I
'r
I
I
BHE. AI',-Ao VALID
BHE.AD
"TO
r:;s
TCSCl
I
B"T
S
,
AD
I
ADDRESS VALID
'{
'f..JI'f.NX
-I
f9
TDSCL
L
WRI TEC'tCLE
r
TCSAK
~
TAACK
I
READ CYCLE
J
K
I
I
WAITE DATA VALID
1--1
FLOAT
AODRESS VALID
TCLDX
~.,:r"1
rCLOV
REAO DATA VALID
I
I
~
2ND INTAC'tCLE
AJs
~
\
T5ACK
I
FlOAT
CD CASCADE ADDRESS
F9
FLOAT
1M
FLOAT
®
POINTER
TlAVE
®
I
--I
j-TCHEH
I
\
iTR
TIAVE
I
@
,
NOICS
1 CASCADE ADDRESS PRESENTED ON AD8, AD9 AND "D10 CORRESPONDING TO CABO, CAS1
AND CAS2 RESPECTIVELY ADl1-AD15 UNES ARE ACTIVE AND HAVE UNKNOWN YAUJE8. NJO-/lD7
ARE TRISTATE
2 POMER VALUE IS ACTIVE ONLY IF POINTER IS GENERATED FROM THE 80150 AND NOT FROM
EXTERNAL SLAVE UNIT
ACTIVE LOW ONLY WHEN POINTER DATA JS BaNG SUPPLIED BY THE 80150
LOW ONLV FOR LOCAL 1NTERRlPJ'
-.:fFTCHEH
User Library
7
inter
USER LIBRARY
The Insite User's Program Library Is an Intel-sponsored software library supporting Intel microcomputer
products. There are currently over 325 programs in the Library collection.
Insite offices are located in the U.S., Brussels, PariS, Germany, the U.K., and Japan, serving about 1,500
members worldwide.
As the Library collection is built on programs submitted by I ntel employees as well.as customers, we encourage
and welcome all program contributions. These contributionsllre essential to the growth and success of Insite.
In the following pages you will be introduced to more in-depth information about Inslte. Membership and
program submittal forms, including a complete program index listing, are also included for your convenience.
7-1
inter
INSITE'M USER'S PROGRAM LIBRARY
• Programs for 8048, 8051, 8080/8085,
and 808618087/8088 Processors
• Diskettes, ,Paper Tapes, and Listings
'
Available for Library Programs
• Accepted Program Submittals Entitle
You to a Free Membership or Free
Program Package
• Program Library Catalog Offering
Hundreds of Programs
• Updates of New Programs Sent During
SubSCription Period
• Worldwide Offices to Serve You
Insite, Intel's Software Index and Technology Exchange Library, is a varied collection of programs and
routines that have been written by users of Intel microcomputers, single-board computers, and develop·
ment systems. This expanding library of programs covers a broad range of software tools that includes
monitors, conversion routines, peripheral drivers, translators, math packages, and even games. As a
library member, you can acquire a copy of any program wlth'n the library on any of its available types of
media. By taking advantage of the availability of existing library programs, numerous hours of coding and
debugging time can be saved and routine or redundant programming operations can be eliminated. The
Insite Program Library also serves as a learning tool fbr individuals unfamiliar with assembly or high·level
languages associated with Intel's family of microcomputers.
Membership. Membership in Insite Is available on an annual basis. Intel customers may become
members through an accepted program contribution or paid membership fee.
Program Submittals. The Insite Library is built on program submittals contributed by users.
Customers are encouraged to submit their programs. (Details and forms are available through the Insite
Library.) For each accepted program, submittors will receive a choice of three free programs (A, e, C, or D ca,tegory),
or free membership with Insite for one year.
Program Library Service. PAPER TAPES, DISKETTES OR SOURCE LISTINGS are available for every
program in Insite. Diskettes are available on single or double density. Membership Is required to purchase
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Inslte™ Program Library Catalog. Each member will be sent the Program Library Catalog consisting
of an abstract for each program indicating the function of the routine, required hardware and software,
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Insite members will be updated with abstracts of new programs submitted to the Library during the sub·
scription period. For catalog and yearly subscription fee please refer to the Intel OEM Price List or contact
the nearest IlJsite or Intel Sales Office.
INSITE OFFICES ARE WORLDWIDE, WITH FIVE LOCATIONS TO SERVE YOU:
THE ORIENT
Intel Japan K.K.
5-6 Tohkohdai, Toyosato-cho,
Tsukuba·gun, Ibarakl, 300-26, Japan
ATTN: Inslte User's Program Library
Telephone: 029747·8511
NORTH AMERICA
Intel Corporation
3065 Bowers Avenue
Santa Clara, California 95051
ATTN: Inslte User's Program Library
Telephone: 408-987-8080
Intel Corporation S.A.R.L.
5 Place de la Balance
SlIIc 223
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ATTN: Inslte User's Program Library
Telephone: 0687·22·21
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8000 Muenchen 2
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ATTN: Inslte User's Program Library
Telephone: 089-5389-1
7-2
Intel Corporation (U.K.) Ltd.
Pipers Way
Swlndon SN3 LRJ
Wiltshire, England
ATTN: Inslte User's Program Library
Telephone: 0793-488·388
inter
SUBMlnAL REQUIREMENTS
Programs submitted for Insite review must follow the guidelines listed below:
Programs must be written in a language capable of compilation and assembly by the currently-supported
version of an Intel standard compiler/assembler. Accepted languages are documented In the following
manuals available through Intel's Literature Department.
- BASIC-80 Reference Manual, Order No. 980758
- ICIS-COBOL Language Reference Manual, Order No. 980927
- FORTRAN-80 Programming Manual, Order No. 980481
- FORTRAN-86 User's Guide, Order No. 121570
- Pascal-80 User's Guide, Order No. 981015
- Pascal-86 User's Guide, Order No. 121539
- PUM-80 Programming Manual, Order No. 980268
- PUM-86 Programming Manual, Order No. 980466
- MCS-48 and UPI-41 A Assembly Language Manual, 'Order No. 980255
- MCS-86 Macro Assembly Language Reference Manual. Order No. 121703
- 8080/8085 Assembly Language Programming Manual, Order No. 980940
- 8086/8087/8088 Macro Assembly Language Reference Manual for 80185 Based Development System,
Order No. 121623
- 8086/8087/8088 Macro Assembly Language Reference Manual for 80/86 Based Development System,
Order No. 121703
- 8089 Assembly Language Reference Manual, Order No. 980255
- Microsoft BASIC Compiler Reference Manual, Order No. 121805
- Mi~rosoft BASIC-80 Reference Manual, Order No. 121806
- Microsoft BASIC Reference Book, Order No. 121857
- Microsoft FORTRAN-80 Reference Manual, Order No. 121798
- Microsoft FORTRAN-80 User's Manual, Order No. 121799
- Microsoft M/Sort Reference Manual, Order No. 121809
- Microsoft Utility Software Manual, Order No. 121797
A well-documented source code furnished on an ISIS-formatted 8" diskette, CP/M-formatted 8" diskette, PDS 5 W'
diskette, or ASCII-coded paper tape.
A source listing of the program must be included. This must be the output listing of a compilation or an
assembly. No consideration will be given to incomplete programs or duplications of programs already in
the Library.
A link and locate listing.
A demonstration program which assures the validity of the contributed program must be included. This
must show the accurate operation of the program.
A complete submittal form.
Licensed software or copyrighted material must be accompanied by a written release from the appropriate, authorized person.
7-3
,'ner
INSllET- USER'S PROGRAM LIBRARY
SUBMITTAL FORM
Processor
0 8048 08051 0 808018085 o 808818087/8088 0 Other
Indicate the MDS series model the program was created on by checking the appropriate box, and Identify other MDS serles'~odels the program·may be compatible with.
.
Program
Title
,
Function
Required
Hardware
Required
Software
j
Input
Parameters
Output
Results
,
Regl.t.... Modlfl.d:
Prog...mm.r:
RAM Required:
Compeny:
ROM Required:
Addre..:
Maximum Subroutine N••tlnll Lev.l:
City:
A...mbl.rtComp".r Und:
Stat.:
T_phone:
Progremmlng Leng".",:
ACKNOWLEDGEMENT AND AGREEMENT
To tho boot of my knowledge, I hove tho right to contributothlo program motorial without breaching any obligation concomlng nondlacl08u",
of proprietary or confidential Information of other persons or organlzatlon~. I am contributing this program material on a nonconfldentlal
nonobligatory boolsto tho Inolto Uoofo Llb",ry lor InclU810n In It. prog,..m library, and I agree that tho Library may u.o, duplicate,. modlly,
publish. and sell the program material without obligation or liability of any kind. The Inslte Unr's Library may publish my name and address, as
the contributor, to facilitate user Inqulrl.. pertaining to thle program material.
Signature
Dato
7-4
LIST OF PROGRAMS
ALPHABETICAL, BY APPLICATION
Program Title
Order No.
ADD AND SUBTRACT: BCD Numbers ...............................................
ASSEMBLER: 8080 MACRO, V4.1 ..................................................
ASSEMBLER, CROSS: 8008 Code. . . . .. . . . . . . . .. .. . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . ..
ASSEMBLER, CROSS: 8048 On DG Nova .................................... . . . . . ..
ASSEMBLER, CROSS: DEC PDP-8 or PDP-11 .......................................
ASSEMBLER, CROSS: DEC PDP-11 ................................................
ASSEMBLER, CROSS: DEC PDP-11 ................................................
ASSEMBLER, CROSS: MCS-48 ....................................................
ASSEMBLER, ON-LINE . . . . . . . . . . . . . . . . . . . . . .. .. . . . .. . . . . . . . . . . . .. . . . . . .. . . . .. . . . ..
CB11
BF4
BC5
BC6
BC2
BC3
BC4
BC1
BF5
BAUD RATE: Modify ...................................... . . . . . . .. . . . . . .. . . . .. . . . ..
BAUD RATE: Modify Under CP/M ...................................................
BIT HANDLING: 8048 .............................................................
BRANCH: MCS-48 Branch Table Routine ............................................
BREAKPOINT: 8089 ...............................................................
BG25
BG26
BG35
BG37
BD15
CALCULATE: CHECKSUM .........................................................
CALCULATE: Sine or Cosine Routine ................................................
CALCULATE: Square Root .........................................................
CALCULATION: Least Squares Quadratic Fitting ....... : ..............................
CALCULATION: Natural Logarithm ............................... '.... , ..............
CHANGE: Load Addresses, iAPX-86/88 Object File .................................. ,
CHECKBOOK ...... ,.............................................................
CLOCK: 8748 Clock and LCD Tachometer ...........................................
CLOCK: MICRO/SYS MC1460 Real Time Clock Board Utilities .........................
CLOCK: Real Time ................................................................
COMMANDS: Meta-Programs ......................................................
COMMUNICATION: DEC PDP-11 to Intellec Development System ......................
COMMUNICATION: HP Calculator with Intellec Development System-800 ................
COMMUNICATION: Intellec Development System 220/230 with SDK-85, V1.0 ............
COMMUNICATION: Intellec Model 220/230 to-Timesharing Computer ...................
COMMUNICATION: Intellec Model 800 to/from DEC PDP-10 ..... _................ , ....
COMMUNICATION: Intellec Development System to/from DEC .........................
COMMUNICATION: Intellec Development System to/from Tektronix 8001 ................
COMMUNICATION: Intellec Development System Series-II with Minicomputer ............
COMMUNICATION: Intellec Development System Series-II with PROMPT-48 .............
COMMUNICATION: Intellec Development System to PROMPT-48 or -80 .................
COMMUNICATION: Intellec System to Serial Output Device .............. , .............
COMMUNICATION: Intel DevelOpment System to/from Hewlett-Packard Computer ........
COMMUNICATION: Intel Development System to/from VAX 11 ............. '...... : .....
COMMUNICATION: Intel MDS-Data I/O Programmer Interface ..........................
COMMUNICATION: NDS-II to/from iPDS Running CP/M-80 ." .... , ... , ... , .... , ... , ...
COMMUNICATION: Tektronix DAS 9100 Digital Analysis System
to Intel Development System ... " .. - ... "., .... , ... , .. , .. , ..... , ... ,., ........ , ..
COMMUNICATION: Two Intellec Series-II Development Systems ....... , .. , .. , .. , ...... ,
COMMUNICATION: Xerox File Transfer Facility ............. ,."." ...... , ......... ".
COMPARE: 8048 or 8049 ROMS .. , ... , ......... , ...... , .. , , ... , .... , ..... , . . . . . . . ..
COMPARE: Files ... _.... , . , .. , ...... , .... , ... , , .. , , .. , .. , , . , ....... , . . . . . . . . . . . . ..
COMPILER: Pascal ...... , , ... , .. , ... , ..... , , . , .... , , .. , ......... , , .. , .... , .. , . , . ..
CONSOLE ACCESS: Input and Output for Series III ... , .... , ......... , ..... ,.,........
CONTROLLER: 8278 Keyboard/Display ... , . , . , ....... , ... , .... , . , ...... , . , ........ "
CONTROLLER: 8292 on 8741A ., .. " .. , ... , .......... , ......... " ................ ,.
CONTROLLER: Dual Floppy Disk Drive, .. , . , . , .. , .. , ............ , ...... , .. , ... , , .. "
CONTROLLER: Firmware for iSBC-589 , .. ,., .... , .................... , .. , ...... , .. ,.
BD16
CB13
CB5
CB3
CB4
BG42
BA6
BG30
BG31
BG29
BG38
BB16
AD1
AD4
AD6
AD8
AD10
AD11
AD9
AD2
AD3
AD14
AD15
AD13
BE8
AD17
7-5
AD12
AD7
AD16
AE11
BD11
BF1
BD36
AC3
AC4
AB11
AC7
inter
Program ntle
Order No.
CONTROLLER: PID Control Loops ..................................................
CONTROLLER: PROMPT-48 Interactive ....... '. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
CONTROLLER: UP1-41 8-Digit LED Display ..........................................
CONTROLLER: UP1-41A142 Digital Cassette, V2.5 ......................... , ...........
CONVERSION: ASCII-Decimal to/from FPAL Number .................................
CONVERSION: ASCII Floating Point Numbers to AM9711 and
Intel 8231 4 Byte FP Fomiat .....................................................
CONVERSION: ASCII to Floating Point ..............................................
CONVERSION: ASCII to/from EBCDIC ..............................................
CONVERSION: ASCII to/from Floating Point .........................................
CONVERSION: ASCII ~ode to/from Intel Floating Point ................................
CONVERSION: Binary to BCD ............................ . . . . . . . . . . . . . . . . . . . . . . . . ..
CONVERSION: Binary to BCD ......................................................
CONVERSION: Convert/Format/Print ................................................
CONVERSION: Decimal to/from Floating Point .......................................
CONVERSION: FORTRAN or FPAL Floating Point to/from Decimal .....................
CONVERSION: Hex to ASCII .......................................................
CONVERSION: ISIS-II to/from CP/M ......................•.........................
CONVERSION: MCON-6800 Source Code to 8086/88 Source Code .....................
CONVERSION: ZCON-Z80 to 8086/88 Source Converter ..............................
CONVERT: Doubleword to ASCII String ......................................... ',' . ..
CONVERT: Fixed Point to Floating Point .............................................
COPY: Disk. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
COPY: Diskette ...................................................................
COPY: Diskette ...................................................................
COPY: iPDS CP/M-80 Diskette. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
COPY: PDP-11 Disk File to Intel ISIS-II Disk File ......................................
COUNT: ICE-80 Machine Cycles ............ , .......................................
COUNT: Program Usage ...........................................................
CREDIT: Tutorial ..................................................................
CREDIT: Used on Modified Hazeltine 1500 ...........................................
AB20
AB2
AC1
AC5
BB13
DEBUG: CAT.88 (iRMX88 Task Debugger) ...........................................
DEMO: 208 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
DEMO: iAPX-88 ...................................................................
DEMO: iRMX 86 Multitasking spectrum Analysis ......................................
DEMO SOFTWARE: 8275 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
DEVICE, I/O: UPI-41 A Combination .................................................
DIAGNOSTIC: S080 110 .. , ................................................. .' . . . . . ..
DIAGNOSTIC: Microcomputer Development System 230 ...............................
DISASM ........ " . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
DISASSEMBLER: 8048 Object Code ..............................................•.
DISASSEMBLER: 8080 Code .......................................................
DISASSEMBLER: 8080 Code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
DISASSEMBLER: 8080 Object Code .... '............................................
DISASSEMBLER: ICE-SO Ver 2.1 ...................................................
DISASSEMBLER: ISIS-II Object Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
DIVISION: 32-Bit by 16-Bit .........................................................
DOWNLOAD: iPDS to Serial Port ..................................... , .............
DRIVER: 8048 Seven-Segment Display ..............................................
DRIVER: 8085 Serial 110 ...........................................•...............
DRIVER: Audio Cassette Recorder ..................................................
DRIVER: Bios and Boot Program for CP/M-80 ........................................
DRIVER: Cassette Operating System ................................................
DRIVER: Dumb Terminal Simulator ..................................................
DRIV,ER: Intellec Development System Series-II as Dumb Terminal ............... : . . . . ..
DRIVER: iPDS Dumb Terminal .....................................•................
BD34
AE7
AE13
AE8
AE6
AC2
AE2
AE9
BD6
BD8
BD1
BD4
BD2,
BD3
BD5
CB12
AD18
AB5
AB1
AB6
AB22
AB7
AB10
AB9
AB23
7-6
~~5
BB14
BB1
BB11
BB12
BB6
BB7
BB8
BB9
BB10
BB2
BB18
BB3
BB4
BB22
BB21
BG28
BG27
B~43
BG45
BB15
BD10
BG40
E6
BG33
Program Title
Order No.
DRIVER: iSBC 86/12 Real Time Clock Driver 00000000000000000000000000000000000000000
DRIVER: PROM Programmer 0000000000000000000000000000000000000000000000000000000
DRIVER: RMX-80, for the iSBC 254 Bubble Memory with 80/10 Board 0000000000000000000
DRIVER: RMX-80, for the iSBC 254 Bubble Memory with 80/20/30 Board 0000000000000000
DRIVER: RMX-86, for the iSBC 254 Bubble Memory Board 00000000000000000000000000000
DRIVER: RMX-80 for iSBC 534 0000 0000000000000 "0 0000000000000000000000000000000000
DRIVER: RMX-80 for SBC 215 Controller Board 00000000000000000000000000000000000000
DRIVER: RMX-86, for the iPAB-128, iPAB-256, iSBX-251 Bubble Memory Products 0000000
DRIVER: RMX-86, High Performance Driver for iSBC-550
Ethemet CommunicatiOnS Controller 000000000000000000000000000000000000000000000000
DRIVER: SYCOR 135 Cassette Operating System 0' 0000000000000000000000000000000000
DRIVER: Tektronix 4010 Graphic Screen 00000000000000000000000000• 000000000000000000
DRIVER: Tol. Omni 810 Lineprinter 00000000000000000000000000000000000.00000000000000
DRIVER: USART for iSBC-86/XX 0000000000000000000000000000000000000000000• 00000000
DUMP: Diskette 0000000000000000000000000000000000000000000000000000000000000000000
DUMP: Diskette File 000000000000000000000000000000000000000000000000000000000000000
DUMP: Diskette File 000000000000000000000000000000000000000000000000000000000000000
DUMP: iAPX-86/88 Absolute Object File 000000000000000000000000000000000000000000000
DUMP: iSBC 86/12 Memory 00000000000000000000000000000000000000000000000000000000
DUMP: Symbol Table 00000000000000000000000000000000000000000000000000000000000000
AB19
BE7
AB14
AB15
AB16
AB12
AB13
ABH
EDIT: Disk 00000000000000000000000000000000000000... 0... 00000. 000. 0000000. 000000000
EDIT: Hex File 00000000000000000000000000000000000000000000000000000000000000000000
EDIT: Inspect and Change File 000000000000000000000000000000000000000000000000000000
EDIT: Text 000000000000000000000000000000000000000000000000000000000000000000000000
EDITOR: Text, Intel X111 00000000000000000000000000000000000000000000000000000000000
EXECUTIVE: Real Time 0000000000000000000000000000000000000. 0000000000000000000000
EXERCISE: Data Translation MULTIBUS Analog I/O Boards 0000000000000000000000000000
BD33
BD31
BD32
BA4
BA3
AA8
BE6
AB 18
AB8
AB3
AB4
AB21
BD27
BD28
BD26
BD30
BD29
BD21
FIFO 00000000000000000000000000000.0000000000000000000000 0000000000000000000000000 BG13
FIFO 0000000000000000000000000000000000000000000000000000 000000000000000000000000. BG12
GAME: Bandit 00000000000000000000000000000.0000000000000000000000 o. 0000000.000000 '03
GAME: Black Box . 00000000000000000000. 00000000000000000000.. 00000. 000000000000000 015
GAME: Breakout . 000000000.00000000000000000000000000000. 0000000000000000000000000 013
GAME: Craps 0000000. 0000000... 000000000000000000000000000000000000000000000000000 05
GAME: Darts 00000000000000. 00. 0000. 00. 00000. 00. 000000000000000000000. 0000. 0000000 06
GAME: Fruit Machine 000000000000. 00000. 00000. 00000000000. 0000000000000000000000000 04
GAME: Hangman 00000000000.. 00000000. 0000000000000000000000000000000000000000000 07
GAME: Mastermind 0000000000000. 000000000000000000000000. 0000000000000000000000000 09
GAME: Maze 0000. 0000000000000000000000000000000000000. 0.00000. 000000000000000000 02
GAME: Maze 000000000000000000. 000000000000000000000000000000• 0000000000000000• 00 01
GAME: Othello 000000000. 0000000000000000000000000000000000000• 00000000000000: 00• 00 010
GAME: Poker 00000000000000.0000000000000000000000000000. 000000000000000000000000 I 014
GAME: Slalom, V104 0000000000000000000000000000000000000000000000000000000• 00• 0000 08
GAME: Tiny Chess 86 0000000000000000000000000000000000000000000000000000 000000000 012
GENERATE: 16-Bit Random Number 00000000000000000000.0000000000.000000000000. 000 CB2
GENERATE: Calendar 00000. 0000000000000000. 00000000000000000000000000000000000000 BA8
GENERATE: CCITT Cyclic Redundancy Check 000. 0000000• 0000000000000000000000000o. BD37
GENERATE: Disk Directory Library 00000000000000000000000000000000000000000000.0000 0 BA15
GENERATE: Fast Generation of IBM Bi-Sync CRC16 0000000000000000000000000000000000 BD20
GENERATE: Graph 000000000000000000000000000000000000000000• 000000000000000000000 CB7
GENERATE: High and Low Bytes from 8086 Hex File 00000.00.000000000000000000000000 BD35
GENERATE: Histogram o. 00000000000000000000000000000• 00000000• 0000000000000000000 CB8
GENERATE: IBM Bi-Sync CRC16 0000000000000000000000.: 0000000o. 0.000000.000000000 BD19
GENERATE: Music for SDK-85 0000000000000000000000000000000000• 000000000000000000 011
GENERATE: Output Signal . 0000000000000000. 000000000000000000000000000000000000000 BG5
7-7
Program Title
Order No.
GENERATE: PLIM Cross Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. B025
GENERATE: PROM Checksum Calculation ........................................... B018
GENERATE: Public Symbol Cross Reference ......................................... B038
GENERATE: 'Random Number ...................................................... COO
GENER~TE: Software Documentation ............................................... BA14
GENERATE: 'Stochastic Variates and Histograms ........ , . . . . . . . . . . . . . . . . . . . . . . . . . . . .. CA23
GENERATE: Symbol List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. B024
GENERATE: Symbol Table for BASIC-80 . : .......................................•. " 8023
GENERATE: Tabs .................................................................. BA16
GENERATE: X-V Graph ............................................................ CB9
HANDLER: RMXl80 Minimal Terminal. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. BE2
INCREMENT: Program Counter .....................................................
INITIALIZE: Baud Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
INITIALIZE: Baud Rate .................. " ........ , ................................
INTERPRETER: 8086 Tiny BASIC ..................................................
INTERPRETER: Interactive 8087 Instruction Interpreter .............................. ,.
INTERPRETER: LISP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
INTERPRETER: LLL BASIC-II ......................................................
INTERPRETER: LLUChernack BASIC ...............................................
INTERPRETER: MCS-51 Tiny BASIC, V2.2 ..........................................
INTERPRETER: PILOT-80 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
INTERPRETER: RMX/80 Command Line .............................................
INTERPRETER: Single-Step . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
B039
BG24
BG23
BF9
AA12
BF3
BF7
BF8
BF10
BF2
BG4
BD7
LINKAGE: Series III i8087 Linkage Modules ..........................................
LIST: Directory, ISIS Diskette/NOS Disk ................. , ............................
LIST: Diskette Directory ......................................................'.. " ..
LIST: File. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . ..
LIST: File .............................................. , ...........................
LIST: File Errors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LIST: PL/M Compiler Errors ........................................................
L1ST/P.RINT/TYPE , ........................... , ....................................
LIST: Save Error. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
LOAD/SAVE: RAM ................................................................
BG36
8G18
BG17
BG15
BG16
B012
BD13
BG14
B014
BG1
MACROS: Block Structures .........................................................
MACROS: Block Structures. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
MAIL 'LIST ......................................... '. . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
MAIL LIST ............................. : ..........................................
MAIL LISTS FOR BASIC 80 ........................................................
MATH PACKAGE 8231 ..............................................................
MATH PACKAGE 8051 .............................................................
MATH PACKAGE: 8080/8085 Fundamental Support Package ...........................
MATH PACKAGE: 8231 Arithmetic Processing Unit ....................................
MATH PACKAGE: Arithmetic Functions ..............................................
MATH PACKAGE: Arithmetic Functions for MCS-48 ...................................
MATH PACKAGE: Double Precision Floating Point ....................................
MATH PACKAGE: Double Precision Integer ...........................................
MATH PACKAGE: Fixed and Floating Point ...........................................
MATH PACKAGE: Floating Point, ....................................................
MATH PACKAGE:,Floating Point ....................................................
MATH PACKAGE: Floating Point ....................................................
MATH PACKAGE: Floating Point ....................................................
MATH PACKAGE: Floating Point Library/8086 .........................................
MATH PACKAGE: Floating Point Utilities for FPAL.L1B .................................
BG10
BG11
BA9
BA11
BA 12
CA17
CA18
CA20
CA16
CA11
CA22
CA12
CA4
CA5
CA2
CA1
CA7
CA6
CA13
CA8
7-8
Program Title
Order No.
MATH PACKAGE: HigH Speed Binary Math Package for 8031/8051 .....................
MATH PACKAGE: Multiple Precision Arithmetic/8086 ..................................
MATH PACKAGE: Multiply/Divide ....................................................
MATH PACKAGE: Optimized Floating Point . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
MATH PACKAGE: Optimized Floating Point ...........................................
MATH PACKAGE: PLIM Multiple Precision ...........................................
MATH PACKAGE: 'Recursive Computation of Mean and Standard Deviation .............•
MERGE: Mailing List. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. .. . .. . . .. . . ...
MONITOR: Intellec 8/MOD80 .......................................................
MONITOR: Bubble Memory Development Software for Intel BPK-72 .....................
MONITOR: HSE-49 Expansion Monitor.. .. . .. . .. .. .. .. . . .. . . .. .. . .. . . .. .. . .. . .. .. ....
MONITOR: Intellec Development System, V2.0 .......................................
MONITOR: iSBC 250 1-MegabitBubble Memory ......................................
MONITOR: iSBC 254 Bubble Memory Board Monitor ..................................
MONITOR: iSBC 544 ..............................................................
MONITOR: iSBC 80/05 or 80/04 ....................................................
MONITOR: iSBC 80/10 .............................................................
MONITOR: iSBC 80/10 or 80/10A ...................................................
MONITOR: iSBC 80/20 or 80/20-4 . .. .. . .. .. . .. .. .. .. . .. .. .. .. . . . . . . .. .. .. . .. .. .. . . ..
MONITOR: iSBC 80/24 .. .. .. .. . . . .. . .. . .. . .. .. .. .. .. .. .. .. .. . .. .. . .. . . .. . .. .. .. .. ..
MONITOR: ISBC BO/30 .............................................................
MONITOR: iSBC 86/12 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
MONITOR: SDK-85, V2.0 .................. , .......... , .... , .................. ,...
MONITOR: SDK-86 Keypad ................................. , ... , ........... ,......
MONITOR: SDK-85 Serial, V1.1 .............................. , ...... , ............. ,.
MONITOR: Super Monitor 80 .................... , ... , .......................... ,...
MONITOR: Super Monitor 86 ........................... , ............. , ......... , ...
MONITOR: Super Monitor 86 for the iSBC 88/45 ......................................
MORSE CODE TUTOR V2.0 .......................... , ........................ ,...
MULTIPLICATION: 8748 BCD ........................................ , ..............
MULTIPLICATION: 4O-Bit ...........................................................
CA21
CA 14
CA15
CA9
CA10
CA3
CA19
BA 10
AA 1
AA10
AA 13
AA6
AA9
AA 11
AA7
AA14
AA15
AA16
AA 17
AA 18
AA19
PRINT: Cover Page. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
PRINT: Discounted Cash Flow ......................................................
PRINT: File .......................................................................
PRINT: Files ......................................................................
PRINT: Files ....................................................... " . . . . . . . . . . . . ..
PRINT: High Speed Utility ..........................................................
PROCEDURE: Pascal 86 Screen/Cursor Control ......................................
PROCEDURE: PLIM DOCASE .....................................................
PROCEDURES: PLIM Output ......................................................
PROCEDURES: PLIM Utilities ......................................................
PROCESSOR: Macro . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
PROCESSOR: Text. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
PROGRAM: 8741A as iSBC 941 .....................................................
PROGRAMMER: EPROM-8755A .. .. .. .. . .. . . .. .. . .. .. .. . .. .. . .. . .. .. .. . .. . . .. .. .. ..
PROGRAMMER: EPROMS 2708/16132 ..............................................
BA 1
BA7
BA 17
BA18
BA19
BG32
BG34
BG9
BG8
BG7
BF6
BA5
AC6
BE5
BE4
READ: Paper Tape to SDK-85 RAM .................................................
RECEIVE ........................................................................
RECOVER: Diskette ...............................................................
RECOVERY: Diskette File ..........................................................
RELOCATE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
REPORT: Status of Exported Job ...................................................
BE3
AD5
BG2
BA2
BG41
BG44
AA2
AA3
AA5
AA4
AA20
AA21
AA22
E3
CB10
CB14
SIMULATE: iACX-96 .,. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. BD40
SIMULATOR: 8048/49 Code, V1.3 ................................................... BB19
7-9
inter
Program Title
'i'
Order No.
SIMULATOR: 8048/49 Simulator ....................................................
SORT: BUbble Sort and Binary Search Routines : ........ : .... .' .. :....................
SORT: Disk Directory ............................................... : ........ : .....
SORT: Disk Directory .................................................. '. . . . . . . . . . ..
SORT: Diskette File ......................................................... ".......
SORT: General ...................................... '..................... '~ : . . . . . ..
SORT: Public Symbols ................................................' ............. '
SORT: Symbol Table from an Absolute File ...........................................
SOURCE FILES: iAPX-86/SS System Workshop Summary and Review ..................
SOURCE FILES: MCS-SO/S5 System Workshop Summary and Review ..................
SPELL .................... ; ............ , .........................................
SUBMIT: ISIS Command String ............................... :.....................
BB20
BG22
BG19
BG20
BG21 ,
BA13
BD39
BD22
E1
E2
BA21
BG6
TEST: 80S0 CPU .......................................................... : .......
TEST: iSBC SO/10 I/O Ports ........'................................................
TEST: Error Correcting Code .......................................................
TEST: MCS-4S Family CPU ........................................................
TEST: Memory .....................................................................
TEST: Memory ....................................................................
TEST: PROM/ROM Checksum Self-Test. . . . . . . . . . . .. . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . ..
THERMOMETER: Thermistor Controlled .............................................
TRACE: ICE-SO ..................................... :.............................
TRANSFORM:' Discrete Fourier .................................................. ; ..
AE1
AE3
AE12
AE10
AE5
AE4
BD17
BE1
BD9
CB1
UTILITIES: Circular Lists ...........................................................
UTILITIES: Menu ............................ : .....................................
UTILI'TIES: RT11 Diskette Utility for Intellec SOO .......................................
UTILITIES: Talk ...................................................................
BG3
E5
B817
E4
WORD PROCESSOR. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. BA20
7-10
Appendix
A
INTEL SOFTWARE STANDARDS
Intel's software is built on standards which facilitate software portability and provide an open system for
software.
Intel's soft.ware utilizes the emerging standards in graphics, networking, database and portable operating
system interfaces. This base system software provides a mapping from architectural and operating system
dependencies to a standard interface. High-level applications are built from the standard interfaces and
remain portable across multiple configurations and operating systems. Figure 1 illustrates the open software
model relationship.
OPEN SOFTWARE MODEL
Applications
8ase System
Software
Operating
Systems
Microprocessors
Languages
R&L
UDI
Word
Processing
I
Language
Run-Time
Mail &
Document
Filling
Spread
Sheet
t
LAN
J
RMX, Xenix
CPIM, MS-DOS
Business
Graphics
Graphics
Project
Management
1
Database
86,186,286,386
Figure 1
Intel has supported its fundamental software across multiple operating systems through the UDI operating
system interface. By writing software to use ttTe UDI interface which provides memory management, 1/0
routines, and exception handling-Intel is able to port high level languages, language run-time, and
fundamental software to a new release or new operating system tn minimal time. Thus Intel's software is
operating system independent.
Intel's local area netwo(king products use the IEEE 802.3 CSMAlCD Access Method and physical layer. The
work for this standard was done jointly by Intel, DEC, and Xerox and is commonly known as the Ethernet
protocol. The transport layer uses the proposed ISO transport protocol specification.
A-1
Intel supports the ANSI graphios standardization effort and will offer produots whioh utilize these standards.
The Virtual Devioe Interfaoe (VOl) standard developed by the ANSI X3H3 oommittee is intended to provide a
single standard whioh supports mulitple graphios devioes with the same set of graphios funotions. A
oompanion standard Virtual Devioe Metafile (VDM) will give a means of storing or transmitting piotures as
streams of VOl funotions. A third graphics standard being supported by Intel is the North American Presentation Level Protoool Syntax (NAPLPS). NAPL!;,S is suited for raster-soan display (both CRT and hardoopy) and
is ourrently in final approval stage by ANSI.
intel's Pasoal-and FORTRAN adhere to the ANSI standard and support optional extensions. All Intel
languages (ASM-86, PUM, FORTRAN, and Pasoal) use oommon data types and parameter passing
conventions to allow inter-language calis The real number data types in these languages utilize the IEEE
real math standard and use the numerics coprocessor or an emulator to support the real math operations
and funotions. The objeot module formats (OMF) are oommonly used by all of the 86 language produots as
well as many language produots supplied by independent software vendors.
INTEL SOFTWARE STANDARDS DOCUMENTS
Standard
Document
UDI
Run-Time Support Manual For iAPX 86, 88 Applioations, Appendix A
(Intel 121776-002)
Intel's Guide To Understanding The ANSI Videotex Presentation Level
Protoool (Intel 145;412-001)
Draft of proposed American Standard for the Virtual Device Metafile,
ANSI X3H33 Virtual Device Interface Task Group
NAPLPS
VDM, VOl
Local Area Network
- Data link and physical
layer (Ethernet)
- Transport layer
FORTRAN 77
Pascal
Real Math
Language Data Types.
and Parameter Passing
- Pascal
- FORTRAN
Object Module Formats
-86
-286
Draft IEEE Standard 802.3 CSMA/CD Access Method and Physical
Layer Specifications, IEEE Computer Society
ISO draft proposal 8073 Information Proce~sing Systems, Open
Systems Interconnection-Connection Oriented Transport Protocol
Specification
Intel's extension to ANSI FORTRAN 77 specified in FORTRAN-86
User's Guide (Intel 121570-002)
Intel's extension to ANSI Pascal specified in Pascal-86 User's,Guide
(Intel 1215~9-001)
Draft 10.0 of IEEE Task P754, Deoember 1982.
8087 Support Library Reference Manual (Intel 121725-001 ).
Pascal-86 User's Guide, A~pendix J (Intel 121539-003)
FORT~AN-86 User's Guide, Appendix H (InteI1?1570-002)
8086 Relocatable Object Module Formats (Intel 121748-001)
The Concrete Representation of 80286 Object Modules, Intel internal
document
iAPX 286 Compilers Writer's GiJide, (Intel-in preparation)
---------------
A-2
----~-.-~
Appendix
B
SOFTWARE SUPPORT SERVICES
A FULL SERVICE SUPPORT PROGRAM
Intel's Software Support Services is a comprehensive range of post-sales support programs for software and
systems purchased from Intel. Its objectives are to maximize the system's performance and minimize
unnecessary downtime for greater productivity. These services are provroed for all Intel developed and most
Intel marketed third-party software.
DESCRIPTION OF SERVICES
Software support services will be available for the Customer as follows:
Initial Sl,Ipport
Initial support provides each Intel system and licensed product with gO-day support after product delivery. It
includes automatic updates and new releaSes, Software Performance Reporting (SPR) Service, technical
reports and monthly technical bulletin. Also available on designated products will be telephone assistance for
product specific technical information and assistance with work-arounds, patches, and other solutions for Intel
defined product deficiencies.
SUBSCRIPTION SERVICE (available for Individual software products)
1.
Technical Reports
A technical report will be published quarterly for active products and semi-annually for mature products.
This Will contain a Configuration and Compatibility Guide, a product performance exceptions list
providing solutions to known problems and a review of important current Software Performance Reports
(SPR's) submitted by customers. A listing of product manuals available from Intel is also provided.
2.
Software Performance Reporting Service (SPR)
Intel will respond to written questions (submitted on a standard SPR form) on product-specific software,
system, or documentation issues. Intel will verify receipt ofthe SPR within 48 hours and will respond within
3 weeks. Intel does not guarantee a resolution will always be available to specific problems.
SOFTWARE INFORMATION SERVICE
This service provides the Customer with direct communication with an Intel Software Support Engineer (SSE).
The Customer may call a single service number (U.S.) between 8:00 A.M. and 5:00 P.M., (Pacific Time) for
product-specific inquiries.
This service enables the Customer to:
1.
Obtain assistance in using the product.
__ documentation clarification.
__ operational understanding.
2.
Obtain product specific information.
__ problem identification.
__ work-around, patch, or other solution when available.
__ information on existing SPRs.
3.
If the reported condition is not an already documented SPR, obtain assistance in problem isolation
techniques.
As part of the Software Information Service, Software Support Services maintain a list of reported problems
and problem resolutions. Software Information Services does not include user application or engineering
time to derive a resolution to a problem if none is currently available. (See Phone Consulting under
Consulting Services). However, the Software Support Engineer will submit a problem report into the SPR
system under the Customer name when appropriate.
Software Information Service is offered as a supplemental tool for obtaining maximum utilization of Intel
software products. It is expected that the Customer will avail himself of training classes as appropriate, and
will make reasonable efforts to utilize all product documentation.
The Customer must designate one System Manager and one alternate as authorized callers. Additional
persons can be authorized for an additional charge. This service is offered on a one-year period.
8-1
SYSTEM/SOFTWARE SUPPORT PACKAGES
We have structured very specific support packages to assist our customers with the installation and
reconfiguration of such systems as NDS-II and 86/330.
NDS-II Installation Package.
.
Includes software installation, system generation, and
network orientation .
NDS-II Network Reconfiguration Pkg.
Includes regeneration and installation of NDS-II System
Software.
RMX System Installation Package.
Includes installation and customer orientation of the RMX
operating system on the 86/330 or 86/380 System.
RMX 86 Installation Package.
Includes one day installation, configuration and/or
assistance; ~ training credit for one RMX86 class; 16 hours of
phone consulting.
XENIX System Installation Package.
Includes up to 2 days of installation and customer orientation
of the XENIX Operating System on the 86i330 AX or
86/380 AX System.
121CE Installation Package.
Includes the installation of and orientation to the host and
probe software for the 121CE on a Series III or Series IV
Intellec Development System.
CONSULTING SERVICES
Consulting Services provides customized support for system, board, and component level customers.
Consulting services provide a wide range of support - from system designs to solving difficult development
problems to complete project management and project implementation.
1.
Field Consulting - The Customer may contract for an Intel Software Support Engineer to come on-site to
assist and advise the customer in utilizing Intel software products. This service is available on a Time and
Material basis. Minimum period: 1 day (8 hours). Travel time and expenses are billed separately as specified
in the price list.
2.
Phone Consulting - The Customer may contract for an Intel Software Support Engineer in the Customer
Support Group to provide customer or application-specific research, effort, or consultation. Blocks oftime
may be purchased and utilized in minimum fifteen (15) minute increments.
UPDATES
Updates and new releases for licensed products are offered on a per update basis. Each update will be
separately priced for any registered Intel customer to purchase. Notification of updates and who requires
which updates, will be provided through the monthly technical bulletin, ;COMMENTS, and each productspecific technical report.
INSITE USER'S PROGRAM LIBRARY
Intel's Software Index and Technology Library is a library of programs that have been submitted by users of
Intel microcomputers, single-board computers, and development systems. Membership in INSITE enables the
Customer to order programs at a nominal charge. Members are provided a program catalog and catalog updates.
LIMITATIONS
A.
Software Support Services are limited to standard Intel system configurations supported by software
products, as defined in the applicable software product data sheet. Services will be performed within a
12-month period from effective date of the purchased services.
B. Software support services do not include hardware maintenance.
C. Any change in the equipment site of the system within the U.S. may affect Intel's ability to deliver the
support services ordered and may result in increased charges. If the system is moved outside the
continental U.S., it shall not be eligible for continued service as ordered, but may be eligible for continued
service under I ntel's local terms and conditions then in effect for a like system in the country or territory of
reinstallation.
B-2
OTHER INFORMATION
A.
Software Support Services is Intel's commitment to providing the customer with consistent, high-quality,
post-sales software and system support. It is our way of delivering guaranteed support which the customer
can rely on. To tailor a full service software/system support program that addresses specific needs, contact
the local Intel sales or service office for more information.
B. Term: Service will be provided for the period specified in the price list. Subscription services will
automatically be renewed on an annual basis unless specified otherwise in writing by the customer.
C. Charges: There are three kinds of billings utilized with the service offerings: front-end billing, monthly
billing (not less than $100 per month):and post-service billing. The customer will be billed on one of the
referenced types of billings, depending on the type of service. Prices will be those specified in the current
Intel price list.
D.
In order to obtain maximum service from Software Support Services, it is advised that the customer
maintain the system to the latest reviSion level, and assign a System Manager who will be the key contact for
Software Support Services.
E.
Guidelines:
1.
The customer must have signed an Intel Master Software License agreement. All services and
materials made available to the customer through Software Support Services, including documentation
and program materials, are subject to the terms and conditions of the license/sale.
2.
The License Fee or List Price for covered software products includes a period of Initial Support as
defined in individual product descriptions. Additional support services may be obtained as listed in the
price list.
3.
Updates are available separately for software products. Each update to a specified software product
has a Single charge and is purchased separately. The customer must have a valid software license that
covers the software product to obtain any update or new release.
The following chart summarizes the services available for various operating system environments at different
levels of integration.
Software Support Services
PRODUCT NAil.
PAMMU.BIlR
.S.S
INDX
INITIAL
Included In
hcense fee
or pnce of
SYS
SYS
SUPPORT
OPERATING SYSTEM
XENIX+
lUX'·
SYS
BAD
SYS
BRD
CP/ .. ··80
I
SYS
each product
I
CONTRACT
SERVICE
SubSCription
Service
SPR-TECH-REP
Hotlme
Service
HOTLINE
SYS
UPDATES
Each update has a
umque part number
SYS
~PPORT
I
Ii
I
SYS
I
PACKAGES
NOS-II
NOS-II
RMX-86
RMX Systems
XENIX Sys
12ICE'-
~~:~~:\~~~~tt
J,
SYS
I
SYS
BRD
SYS
BRD
SYS
BRD
SYS
BRD
SYS
SYS
SYS
BRD
SVS
BRD
SYS
SYS
SYS
SYS
SYS
CONSULT-FIELD
SYS
CONSULT-LT
SYS
iI
I
SYS
CONSULT-EXP
INSITI! U••R'.
PROGRAM
LIBRARY
N/A
KEY
SYS
BAD
COMP:=
SYS
I
I
I
I
I
I
I
SYS, BRD
SYS
I
SYS
SYS, BRD
COMP
SYS, BRD
COMP
SYS
SYS, BRD
COMP
SYS, BRD
COMP
SYS
SYS, BRD
COMP
SYS, BRD
COMP
Consulting
Expenses
I
I
I
CONSULT-PHONE
I
SYS
I
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AI! Intel standard system hardware, languages and software packages deSigned to operate on or Within
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SelVlce prOVided for thiS Operatmg System and assOCiated language and software deSigned to operate on
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Support dunng the development of a user's system based on an Intel microprocessor component and
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·CP/M IS a trademark of Digital Research, Inc
+XENIX IS a trademark of Microsoft Corp
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DOMESTIC SALES OFFICES
.............
Intel Corp
303 Williams Avenue, S W
SUite 1422
riw,I&'o'lliti 35BOI
Tel
(205) 533-9353
AIIIZQNA
~ntel
Corp
11225 N 28th OrNe
Suite 214D
Phoenix 85029
Tel (S02) 869-4980
CAUFORNIA
Intel Corp
1010 Hurley Way
Suite 300
Sacramenlo 95825
Tel
(916) 929-4078
Intel Corp
~~?t~ ?f~OI1unlty Road
r7~4) D2m~35~3111
Corp·
2000 East 4th Slreet
Intel
Suite 100
Santa Ana 92705
~x (7~{6_5~~:1~442
Intel Corp·
1350 Shorebird Way
MI Vtew 94043
Tel (415) 968-8086
T\NX
910-339-9279
910-338-0255
Intel Corp·
5530 Corblr Avenue
SUite 120
Tarzana 91356
Tel (213) 708-0333
TWX
9tC-49b ::-045
COLORADO
Intel Corp
4445 Norlhpark Dn... e
Suite 100
Colorado Springs 80907
Tei {303) 594-6622
Intel Corp·
650 S. Cherry Street
SUlle 720
Denver 80222
~ (3~1~_9~~~~g~6
ILliNOIS
NEW MEXICO
TEXAS
Intel Corp·
2550 Goll Road
SIJ'te 815
intel Corp
1120 Juan Tabo N E
"tWX 910-651-5881
Nlw YOAK
Intel Corp'
12300 Ford !-mad
Suite 380
Dallas 75234
Tel (214) 241 808 7
TWX 910 860-5617
INDIANA
Intel Corp'
300 Vanderbilt Motor Parkway
~n~i C~~ ~
9100 Porous Road
fJ30An~teA~d~~~'ngnve
Intel Corp·
211 While Spruce Boulevard
Intel Co,p
8400 W l1t)lh Stleet
SlIlts '70
Overland Pari< 66210
Tel (qI3) 642-8080
T-Squared
LOUISIANA
T-Squared
"1353 Pittsford
Victor Road
Victor 14564
Tel (716) 924-9101
TWX 510-254-854?
Industrial Digital Systems Corp
2332 Severn Avenue
Swle 202
Metairie 70001
(504) 831-6492
MARYLAND
Intel Corp·
~~~~1I:a1foa16 Dnve
t~ (3~116_ls~~;~~~0
Iniei Corp
1620 Elton Road
Silver Spring 20903
Tel (30t) 431-1200
MA&SACHUSETTS
Inte! Corp·
2 i Industrial Avenue
Chelmsford 01824
i~ (6gJ_3~~~6:,a3U~
EMC Corp
385 Elhot Street
Nemor 02164
26500 Norlhwestern Hwy
Suite 401
Soulhfleld 48075
Tel (313) 353-0920
TWX
810-24404915
MINNESOTA
Intel Corp
~J~I ~r~altland
SUite 205
Maitland 32751
~ (3g1~_8~~9~~~3
GEORGIA
Intel Corp
3300 Holcombe Bridge Road
SUite 225
Norcross 30092
Tel (404) 449-0t>41
SUIte 360
~:(6J~~~:~~~~i~~2
MISSOURI
Tel
TWX
Intel Corp
268 West 400 South
¥!t" (~b~j
~~~"8~~~01
VIRGINIA
Inlel Corp
1603 Santa Rosa Road
Swte 109
NORTH CAROUttA
Richmond 23288
Tel (804) 282-5668
Intel Corp
2306 W MeadOWView Road
SUite 206
Greensboro 27407
Tel (919) 294-1541
WASHtNGTON
Intel Corp
110 Hath Avenue N E
SUite 510
""'0
Bellevue 96004
~x (2~~4!~~J~~~6
Intel Corp·
6500 Poe Avenue
Dayton 45414
Te! (513) 890-5350
TWX 810-450-2528
Intel Corp·
Chagflo-Braloara Bldg. No
6~~v~~aZha~~1~2touleva'd
WISCONSIN
300
Intel Corp
450 N Sunnyslope Road
SUite 130
Brookfieid 53005
Tel (414) 184·9060
Tel
(216) 464-6915
TWX 810·427-9298
CANADA
OKLAHOMA
ONTARIO
Intel Corp
4157 S Harvard Al/eTlue
SUite 123
Tulsa 74135
Tel (918) f49-8688
lotel Semiconductor of Canada, lid
39 Hwy 7, Bell Mews
Napean K2H BR2
Tel (613) 829-9714
TELEX 053-4115
OREGON
Intel Corp
10700 S W Bea-.erton
Hillsdale Highway
SUite 22
Beaverton 97005
~x (5glJ_4~j~8~~~6
Intel Semiconductor 01 Canada, ltd
50 Galaxy Boulevard
SUite 12
Aexdale M9W 4Y5
Tel (416J 675·,2105
TELEX
06983574
Inlel Semlconduc1or of Ganada, ltd
201 Coosumer~ Road
Intel Corp·
SUite 200
Wdlowdrue M2J 4GB
Tel (416) 494·6831
TELEX 4946831
n~ ~~~~~fg~a 1~~~ue
_IEC
PENNSYLVANIA
Tel
TWX
(215) 641-1000
510-661-2077
Intel Semiconductor 01
3860 Cote Vertu Road
SUIte 210
canads,
LId
51 laurent H4R 1V4
f~LE*51 ~5_~~!,~~60
(314) 291-1990
l[1tel Corp·
Raman Plaza Itl
Rantan Center
Edison 08837
Tel (:?Ol) 225-3000
UTAH
(315) 463-85'12
710-541-0St>4
~~ g~ 630~5
NEW JERSEY
TeJ
~~:;cu~~d'~~20~oad
Inlel Corp
4203 Earth City Expressway
Tel
Austin 78752
(512) 454·3628
510·253-7391
3500 W 60th Street
62nd Street
SUite 104
Ft Lauderdale 33300
Tel (305) 771-0600
TWX 510-956-9407
~~I
{Otdefson Lane
Suite 314
Roc-hester 14623
Tel (716) 424"1050
TWX
~x (271~~~~i~~66
~~~ CJ~
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MICHIGAN
Intel Corp·
FLORIDA
N
Cedar Replds 52402
Tel (319) 393-5510
Tel
Induslrlal DI91tai Syslems Corp
5925 Sovereign
SUite 101
HOIJston 77036
Tel (713)988-9421
~ (9J{L~1~o~~~3
Intel Corp
Tel (517) 244-4740
1VVX 922531
393 Center Street
Intel Corp
80 Washington Street
PoughkeepSie 12601
IOWA
Freeway
SUite 1490
Houston 77074
i~x (7~~6_898~82~~~6
510.227-6236
TWX
Suite 400
Indianapolis 46258
Tei (317) 8750623
Intel Corp
36 Padanaram Road
DanbUry 06810
~~1I11O'3? 2O:~~91
~:Iuprtl~~e 21;~~~oo
Intel Corp
CONNEcncUT
EMC Corp
Albuquerqu*", 87112
Tel (505) 292-6086
i~III'731~'l~tt;20~OO(l8
QED .!::lectrQ:l'Os
300 N York Road
Hatboro 19040
Tel (215) 674-9600
1WX 710-480-6238
"Flel('! Application Location
inter
DOMESTIC DISTRIBUTORS
AUIIWIA
~..!.':r'~
Huntmlle 35405
Tel (205) 882-2730
So
,
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-
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-
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InC
2380 - . . .
S1 LoutS 63141
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~(3J:~7~~
tHamliton/A .... neI EleetronICS
13743 Shoreline Court
EarIh
Tel (314 344-1200
TWX 91 762-0684
-C'[ 63045
tHamlllon/Avnet ElectfOnlCl
Pm
--
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Overland Park 66215
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M~aI~rnue
~(9~flb~~
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6822 Oak Halt lane
fArrow ElecIronIc8, Inc
Columbia 21045
~(3W~
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CorporaIlOn
t~9J~~C8s~
¥.:"<3mr\i:~:~
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Ft Lauderdale 33309
Tel (305) 776-7790
TWX 510-955·9456
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71{).828·9702
t_
9100 GIlIIher Road
GodheB.'1. 20877
~ (3?~61i:~'~
....
........".
tHamIllon/Avnet EI8ctromc8
10 Irduetnal
FaIrfield 07006
Tel (201) 575-3390
TWX 710-734-4388
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Woburn 01801
~ (6jI61t:r.6W8
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Woburh 01801
~(6iJ6~Of
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tMTI Systems Sales
383 Route 46 W
Fairfield 07006
Tel (201) 227-5552
NEW IlEXICO
44 HartweU Avenue
;
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'::die Springs
Suile 412
t~ia~e32701
tPloneer/Ft Lauderdale
1500 82nc1 8tf8et NW
Saale 506
Ft lauderdale 33309
-
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14101 Frankbn Avenue
Tustin 92680
~(7J1~~:~
~n~)~l~200
TWX
710-326-6617
11tArrow ElectroniCS, Inc
3810 Varsrty DI'fV8
Ann Arbor 48104
~(3J~6-:~
NEW YOIIIC
t
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Road
fArrow ElectronIC8, Inc
2979 Pacific Drtve
Inc
Norcross 30071
Road
~(4£4J.7~~2
KI8rUIff EIecIronICI. Inc
2586 Commerce Way
Coo ~
9004.
Inc
~!2J,~
fArrow ElectronICS, Inc
20 Clef Avenue
H"'~117
••
Tel (51
231·1000
TWX 51 27-6623
tMlCfOOOmputer Syatem Technical Demonstrator Centen
DOMESTIC DISTRIBUTORS
_(Cont'tII
TEXAI _ I I )
tPioneer/Dayton
tHamItton/Avnet EIeCtronIca
8750 Weft Park
4433 Interpo/nI Boule'lard
~·\'M54I:""'"
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Ho8uton 71063
~ (7J~6~f-5Wa'
TWX 810-459-1622
t_ta-nd
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AutUn 78758
4800 E 13111 SIreeI
Cleveland 44105
-
~(218'1M5f~:~
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~ ~~th Avenue N.E
~312~7~21
-LA Varah, Ltd
2077 Alberta Stree1
Vancouver V5Y 1C4
~.(5J,~~~
~.(eg:~=;~'
tArrow Electronics, Inc
4719 S Memorial Dri'Ie
Tulsa 74145
Tel (918) 665-7700
--
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~~S.~"':8,~
8eaYerton 97005
~(5:~~~~0
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Bldg
L.A Varah, Lid
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tHamllton/Avnet Electronics
1585 Welt 2100 South
Sail lake CI~ 84119
w_
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~(~~,~r
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ac,
Salt Lake City 84104
Tel
tArrow Electronics. Inc
850 Seco Road
Monroeville 15146
Tel (412) 856-7000
(801) 974·9953
~(~~~=2
~,~~valley
Hanham, .....
tHamllton/Avnet ElectronICs
14212 NE 21st Street
Bellevue 98005
TEXAI
~(2:L~2~J4
tP\oneer/CiroHna
w_
103 Induatrlal Avenue
Greensboro 27406
-
~ (9~~6.9~~tm'
tArrow Electronics, inc
7620 McEwen Road
CentervIlle 45459
~(5J~6...~1~
tArrow Electronics, Inc
6238 Cochran Road
Solon 44139
~(2J~~~=
tHamIltOn/Avnet Electronics
954 Senate Drive
Oa~~ 45459
~(5~~6..t~~\0
tHamHton/Avnet Etectronic&
4588 Emery IncluafrIal Parkway
~C~~=44128
tArrow Electronics. Inc
430 W RauaBOn Avenue
Oakcreek 53154
tArrow Electronics. InC
10899 Klnghurat
Suite 100
Houston 77099
~(7~~6~~C:
LA~:;woniC8, Inc
Austin 78758
~ ("J~6.~~~g~o
LA Varah, Ltd
505 K8nOI'I!Ii Avenue
Hamilton L8E 3P2
Tel (416) 561-9311
TWX 061..e349
Zenlr0nk:8
8 TIlbury Court
E\ramptoi'I LtiT 3T4
Tel (416) 451·9600
lW)( 06-976·78
Z........
564110 Weber Street North
590 Berry Street
fV~n~)R?~~~
GUIIIEC
tHamllton/Avnet EIectrontcs
Rutland
78757
HaI'lIlton/Avnet EIIIctronIca
210 Colonnade Road South
NepeI!Iin K2E 7L5
Tel' (613) 226-1700
lWX 05-349-71
Z"""""'"
ALRRTA
~ (5Jf6.8~~~~~'
~("Jn...~~~~2
~~g'i~~==onIcs
CANADA
AllsUn
Hamillon/Avnet Eteclrof'llC8
6845 Rexwood Road
UntI8 G & H
MI8Sl888UQIII L4V lR2
Walerloo N2L 5C6
Tel (519) 884·5700
~ (5~6.l7~~~C:
2401
--
~ (4Jt6.kr.=
New BerlIn 53151
10125
Street
~rrns.) ~~5-~\
unl1 8
tAlmac E\ectronk:& Corporation
14360 S E Eastgale Way
Bellevue 98007
~(2~f~~~
~)
Z........
590 Berry Sireet
~(~~9~~'W
C, Suite 10
~1~~32 K~R E~fd
Tel
633-6190
TWX 07-55·365
tHamllton/Avnel ElectronICs
2816 21st Street N E
~~~2~3~Z3ke
~,r':n{C::. ~~~
lWX 03-827-642
Irving 75062
tLA Varah. ltd
~(2J1~':
4742 14th Street N E
~2~~~5
HamiHon/Avnet EtectronIc8
2670 Sabourin Street
$I Laurent H4S 1M2
~ (5J~L~~~~3
Zantronlc8
505 locke Street
St laurent H4T lX7
Tel (514) 735-5361
TWX
05-827·535
tMfcroc::ornpuI System Techmcal Demons1rator Center1
intJ
EUROPEAN SALES OFFICES
BELGtUM
FRANCE (Cont'd)
ISRAEL
Intel CorporatIon S A
Inlel CorporatIOn, S A A l
Immeuble BBC
4 Qual des Elrarla
69005 lyon
Tel (7) 642 40 89
TElEX 305153
Intel Semiconductor Ltd'
PO Box 1659
Haifa
Tel 4/524
TELEX 46511
~:: Jue%OUlin a Paplef 51
Boite 1
8-1160 Brussels
Tel (02}6f: 07 11
TELEX 28414
ITALY
WEST GERMANY
DENIIAIIK
Spa'
Inlet SemICOnductor GmbW
Seldlsuasse 27
_.
Intel Sweden A.8·
Box. 20092
Archlmedesvagen 5
S·16120 Brooima
Tel (08) 98 53 85
TELEX 12261
SWITZERLAND
0-8000 Muenchen 2
Tel
(89) 53891
TELEX 05-23177 INTl 0
Intel' Semiconductor GmbH'
Malnzer SlrUie 75
FlNLMD
Intel Finland OY
Hameentl9 103
SF - 00550 Helsinki 55
Tel 0/716 955
TELEX
123 332
0-6200 WI9sbaden 1
Tel (6121) 70 08 74
TELEX
04186183 INTW 0
Inlel SemIConductor GmbH
Brueckslraase 81
7012 Fellbach
FRANCE
Intel Corporation, S A A L •
5 Place de la Balance
Sllle 223
~:F2101~U6R~ 2:d~:
TELEX 270475
West Germany
Tel (7tt) 58 00 82
TELEX 7254826 INTB 0
Intel Semiconductor GmbH'
HohenzoUern Suasse 5'
3000 Hannover 1
i~lE*51~2;~254~N~~
0
NETHERLANDS
Intel Semiconductor Nederland B V·
~::~deM":~ul~~ng
3068 Rotterdam
Tel (10) 21 23 77
TELEX 22283
NORWAY
~~I ~~~2 AIS
Hvamvelen 4
N-2013
~;Ie~)
TELEX
UNITED kINGDOM
Intel Corporallon (UK) Lid'
5 Hospital Street
NantwlOO, Cheshlre CW5 5RE
Tel (0270) 626 560
TELEX 36e20
Intel Corporation (U K) Ltd'
PIpers Way
SWlndon, WIRshlre SN3 lRJ
Tel (0793) 488 388
TELEX 444447 INT SWN
742 420
18018
Inter SemlCOnduclOl' GmbH
Ober-Ralherstrasse 2
0-4000 Dusseldorf 30
f~LE*21~_~~9}~ T~TL
0
"Field Appllcabon Location
EUROPEAN DISTRIBUTORS/REPRESENTATIVES
AUSTRIA
FRANCE (Cont'd)
ITALY (COnt'cI)
Bacher Eleklronlsche Geraete GmbH
Tekelec Alrtromc
Cite des oBruyeres
Rue carte Vernel
F-92310 Sevres
Tel (Ot) 534 75 35
TELEX 204552
Intesl
Mllanfion Pal E/5
20090 Assago
Milano
Tel (02) 82470
TELEX 311351
WEST GERMANY
NETHERLANDS
SWITZERLAND
ElectroniC 2000 Vertrlebs A G
Neumarkter Strasse 75
[).8oo0 Munich 80
Tel (89) 43 40 61
TElEX 522561 EIEC 0
~~~~ l!:aan
2544 EN's Gravenhage
Tel 31 (70) 210101
TELEX 31528
Industrade AG
Gemsenstrasse 2
Postcheck 80 - 21190
CH-8021 Zurich
Tel (Ot) 363 23 20
TELEX 56788 INOEL CH
NORWAY
UNITED KINGDOM
Nordisk Elekll'onic (Norge) A/S
Postofhce Box 122
~~d8~~~;I~d 4
Bytech Ltd
Unit 57
london Road
Earley, Reading
Berkshire
Tel (0734) 61031
TELEX 848215
~tf,~~e~renS:
26
Tef (222) 83 63 96
TELEX 11532 BASAT A
BELGIUM
DENMARK
MultlKomponent AlS
Fabnksparken 3t
OK·2600 Gloskrup
~' Jg~t545 66 45
ScandlnSVl8n SemlcondllClOr
Supply AIS
~~2~38a~ode8nhSQer1
Tel (01) 83 50 90
TELEX 19037
FINlAND
~lk~~~~~iC 2~BA
SF·00210
HelSinki 21
Tel (0) 692 60 22
TELEX 124 224 Flron SF
FRANCE
Genenm
2 I de Courtaboeuf
Avenue de la Balllque
91943 les uris Cedex-B P 88
Tel (6) 907 78 79
TELEX F691700
Jermyn SA
rue Jules Ferry 35
¥~17~,)B~~~OI~~
TELEX
04 -
~'Wa~h Grr~~
Schulstrasse 48
0-6277 Bad Cambetg
Tel (06434) 231
TELEX 484426 JEAM 0
Celdls Enatechnlk Syslems GmbH
Gutenbetgstrasse 4
2359 Henstedt-Ulzburg 1
Tel (04193) 4026
TELEX 2180260
PORTUGAL
Proelectron VerITlebs GmbH
Max Planck Strasse 1-3
6072 Drelelch bel Frankfurt
Tel (6103) 33564
TELEX 417983
Dlnem
Componentes E Etectrol'Hca LOA
133
Tel' (19) 545 313
TELEX 1;4182 8neks-P
IRELAND
SPAIII
MICro Msrkellng
Glenageary Office Park
Glenageary
Co OublIO
Tel (1) 85 62 88
TELEX 31584
Interface SA
Ronda San Pedro 22,3
Barcelona 10
~X {3~d8J 78 5f
.......L
Easlronlcs Ltd
11 Rozanls Street
POBox 39300
Tel AvIV 61390
Tel (3) 47 51 51
TELEX 33638
21810 F
Metrologle
La Tour d' Asnleres
" Avenue Laurent eely
92606-Asnteres
Tel (1) 791 44 44
TELEX 611-448
Tei (2) 786 210
TELEX 77546
ITALY
Eledrs 3S SPA
Vlale Elve'<'la, 18
I 20154 Milano
Tel (2) 34 97 51
TELEX 332332
~~oo~lt~:bo~mbarda,
lIT SESA
MIguel Angel 23-3
Madrid 10
Tel (1) 419 54 00
TELEX 27707
_N
A8 Gosla Backstrom
Box 12009
Aistroemergatan 22
8-10221 Stockholm 12
Tel (8) 541 080
TELEX 10135
SWEDEN (Cont'd)
Comway MlCI'osystems ltd
Market $lreet
UK-BraCl
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