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User Manual: AES27
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Efficient Audio Power Amplification
ficient Audio Power Amplification
Photograph of Frederiksborg Castle courtesy Danish Tourist Board; Photographer: Klaus Bentzen
Hillerød, Copenhagen, Denmark
September 2–4, 2005
27
27TH
TH AES
AES INTERNA
INTERNATIONA
TIONAL
LCONFERENCE
CONFERENCE
The magnificent castle pictured above, Frederiks-
borg Slot, is only a short distance northwest
of Copenhagen in the town of Hillerød, which
(at the nearby Pharmakon conference center)
will be the site of the AES 27th International
Conference, Efficient Audio Power Amplification,
September 2–4.
Linear (Class A/AB/B) amplification has been the standard
for power amplification for many decades. During the last ten
years, interest in higher efficiency power amplification has
increased, particularly in the audio industry. The major driv-
ing force has been the need to provide fresh opportunities in
audio design with the advantages that higher efficiency
potentially offers: higher power with increased power den-
sity, savings in energy and battery life, potential cost savings,
and even potential performance improvement in audio
reproduction.
The interest in this new field is global and includes all
major industrial segments, such as consumer electronics,
automotive audio, pro audio, and mobile devices. A
paradigm shift in power amplification seems to be underway.
Conference Chair Jan Abildgaard Pedersen and his com-
mittee have forged a conference program that will present an
overview of the current state-of-the-art in a broad perspective
and address many of the new scientific disciplines involved
in this emerging field.
THE TECHNICAL PROGRAM
Michael Andersen and Thomas Frederiksen, papers
cochairs, have coordinated a program of six sessions during
the three days of the conference. Andersen will get things
rolling on Friday afternoon with a keynote address in which
he will discuss the challenges facing the companies and indi-
viduals developing efficient audio power amplification.
Following the keynote address Jens Christensen will pre-
sent an invited paper, “The Industrial Dynamics of Open
Innovation: Evidence from the Transformation of Sound
Amplification from Linear Solid-State to Class D
Technology.”
The next and final papers session on Friday after-
noon will be comprised of three papers on the topic of
power stage topologies. Later in the evening after din-
ner there will be a table-top demo session in which
participants will be able to display some of the inno-
vative technologies they are developing.
The Saturday morning session will feature five papers
delving into the topic of modulation and control. Skip Taylor
will lead off this session with an invited paper, “Taking
Advantage of Improved Digital Signal Processing Tech-
niques to Reduce the Implementation Complexities of High-
Performance, High-Efficiency Digital Amplifiers.” The sec-
ond session on Saturday morning, concentrating on errors
and distortion, will open with another invited paper, “Design
Criteria for Ultra Low Distortion Open Loop PWM Output
Stages,” by Brian Attwood. The papers in the afternoon ses-
sion are on IC and integration
The final papers session, devoted to measurements and
tests, will be on Sunday morning. The rest of the technical
program on Sunday will be a workshop on measurement and
instrumentation and a tutorial and workshop on EMI/EMC.
The calendar, complete program with abstracts, and registra-
tion form follow.
SOCIAL EVENTS, DANISH HISTORY,
COPENHAGEN
At press time, an excursion and banquet on Saturday
evening were still in the planning stages. But they are sure to
be memorable events. You certainly want to make sure you
have time to visit Frederiksborg Castle. The National His-
tory Museum has been housed in the castle since 1878.
The Pharmakon conference center is situated on the south-
ern outskirts of Hillerød about one kilometer from the train
and bus terminal. It takes approximately 45 minutes to reach
Pharmakon by train from Copenhagen City, which is a 15-
minute train ride from Copenhagen Airport.
Before or after the conference be sure to spend a day or
two in Copenhagen, one of the great capital cities of Europe.
Its museums and concert halls are world-class. The spectacu-
lar new waterfront opera house has recently opened to rave
reviews. Check for updates on the conference at
http://www.aes.org/events/27. These new developments in
power amplification will have a significant impact on future
developments in the audio industry. Don’t miss this impor-
tant event. Join colleagues in Denmark September 2–4 at the
AES 27th International Conference, Efficient Audio Power
Amplification.

Technical Sessions*
*This preliminary program is accurate as of press time.
Friday, September 2 14.10
KEYNOTE ADDRESS
Efficient Audio Power Amplification—Challenges
Keynote Speaker Michael A. E. Andersen, 27th
Conference Papers Chair
For more than a decade efficient audio power amplification has
evolved and today switch-mode audio power amplification in
various forms are the state-of-the-art. The technical steps that
lead to this evolution are described and in addition many of the
challenges still to be faced and where extensive research and
development are needed is covered.
Friday, September 2 15.00–16.00
PAPER SESSION 1: INVITED PAPER
1-1 The Industrial Dynamics of Open Innovation:
Evidence from the Transformation of Sound
Amplification from Linear Solid-State to Class D
Technology—Jens Frøslev Christensen, Michael
Holm Olesen, Jonas Sorth Kjær, Copenhagen
Business School, Frederiksberg, Denmark
This paper addresses how the open innovation concept,
as recently coined by Henry Chesbrough, can be ana-
lyzed from an industrial dynamics perspective. The main
proposition of the paper is that the specific modes in
which different companies manage open
innovation in regard to an emerging technology reflect
their differential position within the innovation system in
question and the stage of maturity of the technology. The
proposition is analyzed through an in-depth study of the
current transformation of sound amplification from linear
solid-state technology to switched or digital technology
within the consumer electronics system of innovation.
Friday, September 2 16.30–18.00
PAPER SESSION 2: POWER STAGE TOPOLOGIES
2-1 A 97 Percent Efficiency Power Stage Design for
High Performance Class D Audio Amplification—
René Lambruschi, Nicola Lomuto, Frédérik Dezé,
CL3, Pontoise, France
An innovative solution of switching power conversion is
introduced, and its benefits on class D audio amplifiers
is demonstrated. The smart association of a high side
N MOSFET and a low side P MOSFET in the power
stage combines the dynamic parameters of the two
MOSFETS, so that only one drive signal is used and
the risk due to skew and unmatched thresholds is elim-
inated. No dead time is needed, therefore lowering
distortion and allowing high efficiency (97 percent and
more). Exceptional sound reproduction and scale inte-
gration in an enclosed environment are permitted. The
proposed architecture is patent pending and will be
referred to as Gemincore.
2-2 Digital Audio Power Amplifier Based on Multilevel
Power Converters—Victor M. E. Antunes,1
Vitor Fernao Pires,2Jose Fernando Silva3
1Instituto Politécnico de Setúbal, Portugal
2Instituto Superior Técnico (IST), UTL, Lisbon,
Portugal
3Centro Automática Universidade Técnica Lisboa
(CAUTL), Lisbon, Portugal
The concepts and design aspects of all-digital open-
loop audio power amplifiers, based on multilevel
power converters, are presented. Innovative modula-
tion techniques to reduce harmonic distortion of this
type of amplifiers are also presented. A prototype of a
digital multilevel audio power amplifier has been
developed, implemented, and tested. THD plus noise per-
formance comparisons between some class A, AB, and D
amplifiers are presented. Results show that the proposed
digital audio power amplifier can be a promising solution
for a high-quality digital audio power amplifier.
2-3 Self-Oscillating Modulators for Direct Energy
Conversion Audio Power Amplifiers—Petar Ljusev,
Michael A. E. Andersen, Technical University of
Denmark, Lyngby, Denmark
Direct energy conversion of an audio power amplifier
represents the total integration of a switching-mode
power supply and class D audio power amplifier into
one compact stage, achieving high efficiency, high
level of integration, low component count, and eventu-
ally low cost. This paper presents how self-oscillating
modulators can be used with the direct switching-mode
audio power amplifier to improve its performance by
providing fast hysteretic control with high power supply
rejection ratio, open-loop stability, and high bandwidth.
Its operation is thoroughly analyzed, and experimental
results from a prototype amplifier are presented.
Friday, September 2 20.00–22.00
DEMONSTRATIONS
Table-Top Demonstrations
Technology demonstrations by participants/inventors.
Saturday, September 3 09.00–12.00
PAPER SESSION 3: MODULATION AND CONTROL
3-1 Taking Advantage of Improved Digital Signal
Processing Techniques to Reduce the
Implementation Complexities of High-
Performance, High Efficiency Digital Amplifiers
[Invited Paper]—SkipTaylor, D2Audio, Austin, TX, USA
With the recent move from the classical PWM amplifier
approaches, which employ a hysteretic comparator
technology to the newer emerging sigma-delta tech-
niques, there is increased interest and motivation to
revisit the strategic importance of high performance
switching amplifiers. The new modulation techniques
have found their way into the newer, low-profile,
“lifestyle” systems in the home theater and whole house
audio markets where single-chip and two-chip designs
offer a manageable solution. However, the limited per-
formance and power levels of the initial offerings have
fallen short of the requirements of the more challenging
high-end home theater applications and other market
segments where a more audiophile quality is desired.
Out of necessity, the requirements for these more
demanding markets will dictate an ability to manage and
tame discrete output drivers, output stages, and output
AES 27th INTERNATIONAL CONFERENCE PROGRAM
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filters in a very scalable implementation. The trade-offs
between seemingly contradictory design considerations
(EMI, efficiency, performance, cost) force the need to
take an innovative and more system-centric approach to
the amplifier design. This paper addresses a unique and
previously unrealized technique of using advanced
adaptive digital signal processing technology and ampli-
fier system modeling to assure not only the performance
of the legacy linear analog solutions, but also a very
cost-effective system realization. This technique is pre-
sented as it relates to the total system implementation
and as it integrates into the graceful fault protection
methods that have come to be expected in these appli-
cations. It includes descriptions of the critical circuit
blocks, the software/firmware algorithms and tech-
niques, and the final amplifier topology. Results are
shown that illustrate both the performance improve-
ments and the reduction in complexity of the total sys-
tem design.
3-2 Real-Time Power Supply Feedback Reduces
Power Conversion Requirements for Digital Class
D Amplifiers— Randy Boudreaux, Cirrus Logic, Inc.,
Austin, TX, USA
The development of real-time power supply feedback
for an all-digital class D PWM amplifier enables the
use of many different power conversion techniques
allowing a greater number of alternatives to meet sys-
tem demand requirements. With a typical voltage ripple
rejection of 40dB at 60Hz, an all-digital PWM amplifier
with this PSR compensation can achieve better than
105dB system dynamic range and a total harmonic dis-
tortion plus noise measurement of 0.1 percent. The
system performance of the real-time PSR feedback is
discussed and evaluated for a half-bridge and full-
bridge amplifier output stage powered from a low cost
unregulated linear power supply.
3-3 Distortion and Error Reduction in a Class D Power
Stage Using Feedback—Michael Pate,1Lars Risbo,2
Pietro Andreani,3Kwong Chao1
1Texas Tech University, Lubbock, TX, USA
2Texas Instruments, Lyngby, Denmark
3Technical University of Denmark, Lyngby, Denmark
In this paper a method for minimizing the total har-
monic distortion (THD) is presented for a class D out-
put stage by optimizing a loop filter. A second-order fil-
ter is chosen to create large error suppression through
the audio band while keeping the overall system com-
plexity low. The stability of the optimized loop is exam-
ined to ensure proper operation. SIMULINK simula-
tions are given to verify the theory introduced.
3-4 Derivation and Analysis of a Low-Cost, High-
Performance Analog BPCM Control Scheme for
Class D Audio Power Amplifiers—Mikkel C. W.
Høyerby, Michael A. E. Andersen, Technical
University of Denmark, Lingby, Denmark
This paper presents a low-cost analog control scheme
for class D audio power amplifiers. The scheme is
based around bandpass current-mode (BPCM) control
and provides ample stability margins and low distortion
over a wide range of operating conditions. Implementa-
tion is very simple and does not require the use of
operational amplifiers. Small-signal behavior of the
controller is accurately predicted, and design is carried
out using standard transfer function based linear con-
trol methodology. Effectiveness of the approach is
demonstrated via a 60-W/8-W single-ended switching
amplifier with THD+N of typically 0.02 percent.
3-5 Discrete-Time Modeling of Continuous-Time Pulse
Width Modulator Loops—Lars Risbo, Texas
Instruments Denmark, Lingby, Denmark
Traditionally, the dynamics of continuous-time PWM
loops are analyzed by using linearized continuous-time
models where the comparator is modeled as a linear
gain. However, this method fails to accurately explain
several important characteristics such as noise alias-
ing, image components, and loop stability. This paper
analyzes the sampling nature of the comparator and
derives a general linear discrete-time loop small-signal
model that can be applied to loops of any order—both
driven (synchronized) and free running (self-oscillating).
Saturday, September 3 13.00–15:00
PAPER SESSION 4: ERRORS AND DISTORTION
4-1 Design Criteria for Ultra Low Distortion Open Loop
PWM Output Stages [Invited Paper]—Brian E.
Attwood, PWM Systems
A previous paper by the author (JAES November 1983)
looked at various distortion mechanisms in switching
amplifiers and discussed circuit topologies to overcome
these limitations. While the basic content of this paper
still applies today, advances in semiconductors and the
developing area of fully digital amplifiers for DVD, SACD,
and AV markets means that a fresh look should be taken
at consistently achieving the lowest possible open loop
system performance. Since digital amplifiers (those with
no input A/D converters) are operating totally in the digi-
tal domain, overall feedback becomes a much more
complex issue compared to conventional analog (Class
D) pwm systems where 30 dB can be readily achieved.
Some solutions have been proposed that look very
promising at the moment; however, most currently avail-
able digital switching amplifiers are still operating under
open loop conditions. Under these circumstances it
becomes essential to achieve the best possible system
linearity, and since most predominant distortion mecha-
nisms will occur in the power output stage this is the area
that will be fully considered. In order to help digital feed-
back systems techniques evolve, another factor will also
become important, that of successfully operating at
higher switching frequencies. This reduces phase shifts
and will help extend feedback loop gains to the higher
audio frequencies. The proposed paper thus seeks to
define all the necessary steps to achieve good output
stage linearity not only at 384 KHz, but also at 768 KHz
and even higher, combined with high efficiency. This will
then lay the groundwork for optimal performance both for
open loop and feedback systems alike. Components and
semiconductors need to be chosen very carefully, partic-
ularly when operating at the higher frequencies, and
some parameters, which are of crucial importance are
not usually quoted or even mentioned in most manufac-
turers data sheets. As an example, the
intrinsic internal gate resistance Rg of Mosfets is rarely
mentioned or quoted, yet this is very important to fully
optimize circuit switching characteristics. So the criteria
needed to ensure optimum selection of semiconductors
for a particular application and supply rail will also feature
prominently in the paper.
4-2 Harmonic Distortion Reduction with Output
Capacitance in PWM Inverters—Gael Pillonnet,1,2
Nacer Abouchi,1Philippe Marguery2
1CPE Lyon, Lyon, France
2ST Microelectronics, Grenoble, France
An audio class D converter has nonlinear distortion pro-
vided by power stage. In fact, the PWM inverter is influ- ➥
27th International Conference Program

enced by the switching dead time introduced by the
power output control system. If output capacitance is
added, the audio quality is improved. In this paper the
interaction between the dead time effect and the output
stage capacitance is investigated. At first, each effect is
investigated separately. Then, the sum of the effects is
analyzed to predict the improvement of audio quality.
Finally, the calculated results are compared with low level
simulation in order to confirm the validity of the analysis.
4-3 Time Domain Analysis of Open Loop Distortion
in Class D Amplifier Output Stages—Flemming
Nyboe,1,2 Lars Risbo1, Pietro Andreant2
1Texas Instruments, Lyngby, Denmark
2Technical University of Denmark, Lyngby, Denmark
During the long history of class AB amplifiers, many
topology improvements have been developed with the
aim of reducing open-loop THD. As class D amplifiers
become widely used, a new learning of such improve-
ments is needed, since the basic distortion mecha-
nisms are very different from those of class AB ampli-
fiers. This is even more important with class D
designs because the very high feedback loop gains
seen in class AB designs is not always achievable in
class D designs. In some cases no feedback is used
at all, because it cannot easily be applied to digital
input systems at low cost. This paper analyzes the
nature of different contributors to THD in class D out-
put stages. It is shown how large-signal transfer
characteristic analysis can be applied to individual
parts of a PWM output signal, to help identify prob-
lems and optimize a design for minimum THD.
Saturday, September 3 15.00–16.30
PAPER SESSION 5: IC AND INTEGRATION
5-1 An Integrated 40-W Analog Input Class D Amplifier
with Improved Clipping Recovery and Reduced
Turn-on Transients—Ronnie Bean, Ryan Lind,
Texas Instruments, Ridgeland, MS, USA
A 20-W per channel, analog input, class D amplifier is
presented. This paper includes an overview of the
design, stability equations and describes several inno-
vations used to improve the performance of the device.
Among these innovations is a novel Operational
Transconductance Amplifier (OTA) input structure that
greatly reduces pops and clicks at startup and a spe-
cial clipping recovery circuit that reduces clipping
distortion. The design tradeoffs and the silicon results
are also presented.
5-2 Commercializing Class D Amplifier Technologies
—Paul Mathews, Philip R. Jeffs, Rane Corporation,
Mukilteo, WA, USA
The popularity of commercial audio systems having
large numbers of channels has resulted in a growing
demand for smaller, lighter, and less expensive multi-
channel power amplifier products. This paper
describes how careful integration of power factor cor-
rected switchmode power supplies, class D power
amplifiers, and digital signal processors yields high
power density and especially reliable and electromag-
netically quiet products at a reasonable cost.
5-3 A High Performance 8x150-W Digital Audio
System—Kim Nordtorp Madsen, Thomas Morch,
Lars Risbo, Texas Instruments Denmark A/S,
Copenhagen, Denmark
An eight-channel digital audio amplifier solution using
pulse width modulation (PWM) and power stage pro-
viding superior dynamic range performance and a high
level of system integration is presented. The typical
dynamic range in a well-designed system is better than
110 dB and 115 dB is possible in a parallel coupling
setup. Including the Power Supply Volume Control
(PSVC) feature additional 24 dB dynamic range is pos-
sible at normal listening levels in a typical application.
Sunday, September 4 09.00–10:30
PAPER SESSION 6: MEASUREMENTS AND TESTS
6-1 Measuring Distortion in Switching Amplifiers—
Bruce Hofer, Audio Precision, Inc., Beaverton, OR,
USA
The distortion performance of switching amplifiers
(a.k.a. “Class-D” amplifiers) has rapidly improved in
recent years. Unfortunately they still exhibit a form
of high-frequency nonlinearity that is not clearly
revealed by traditional THD+N and SMPTE-IMD
tests. The Twin-Tone IMD measurement technique
provides an excellent way to measure this form of
distortion.
6-2 Comparison Between Different IDDQ Measurement
Techniques on Class D Audio Amplifiers—Victor-
Hugo Lopez de Nava, Texas Instruments, Dallas, TX,
USA
During the IDDQ test on class D audio amplifiers, it is
very common to have a higher current measurement
on the Automated Test Equipment (ATE) than on
bench. This is an issue that is always present on the
ATE-to-bench correlation process. In order to over-
come this issue, test engineers have come up with
several techniques or compensation methods to help
reduce the measurement differences between ATE
and bench. Some of these methods are discussed in
the next sections.
6-3 Click and Pop Measuring Technique—Tomas
Bruunshuus Sørensen, Texas Instruments Denmark
A/S, Copenhagen, Denmark
During various occasions a digital amplifier can generate
a click or a pop. The click is generated at changes of the
operational modes of the amplifier, e.g., charging of
capacitors or mute / unmute. For class D amplifier sys-
tems click is typically at PWM start and stop. The audibil-
ity of a click is very dependent on the system, amplifier,
and speaker. Also, perception of the click is subjective.
This makes it difficult to compare the
results from two different systems. This paper specifies a
measurement technique, which can be used for all sys-
tems and makes results comparable, and give
limits to what is acceptable in an end application. The
described measurement technique applies to all
systems, which have a start up sequence of less than 1
ms. For Purepath systems this applies to TAS5026,
TAS5036, TAS5066, TAS5076, TAS5028, TAS5508,
and TAS5518. Measurements on 2 EVM’s TAS5066-
5121K6EVM and TAS5508-5121K6EVM are shown for
reference.
Sunday, September 4 10.30–12.30
WORKSHOP
Measurement and Instrumentation Workshop
Abstract Not Available at Press Time
Sunday, September 4 14.00–16.00
TUTORIAL AND WORKSHOP
EMI/EMC Tutorial and Workshop
Abstract Not Available at Press Time
27th International Conference Program

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Registration
Banquet
Session 4
Errors and Distortion
Session 3
Modulation and Control
EMI/EMC Tutorial and Workshop
Measurement and Instrumentation Workshop
Registration
Table-Top Demonstrations
Opening Ceremony and
Keynote Address
Session 1 Invited Paper
Lunch
Session 6
Measurements and Tests
Social Event—Excursion
Session 2
Power Stage Topologies
Lunch
Lunch
Session 5
IC and Integration
08:00
08:30
09:00
09:30
10:00
10:30
11:00
11:30
12:00
12:30
13:00
13:30
14:00
14:30
15:00
15:30
16:00
16:30
17:00
17:30
18:00
18:30
19:00
19:30
20:00
20:30
21:00
22:00
23:00
This schedule reflects accurate information as of press time.
FRIDAY, SEPTEMBER 2 SATURDAY, SEPTEMBER 3 SUNDAY, SEPTEMBER 4
Photograph of Frederiksborg Castle courtesy Danish Tourist Board; Photographer: Klaus Bentzen

Conference Registration. Please check appropriate box (all figures in Danish Kroner DKK)
Registration fee includes meals and banquet.
■■AES MEMBERS ■■6500 (before July 2) ■■7000 (after July 2)
■■NONMEMBERS ■■7200 (before July 2) ■■7900 (after July 2)
■■AUTHORS ■■4200
■■AES STUDENT MEMBERS ■■4200
ACCOMPANYING PERSON ■■220 Sept. 2–4 including breakfast only
Lunches, dinners, and banquet will be handled on site.
Family Name________________________________First Name_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
Company/organization_____________________________________Job Title ________________________________________
Street Address ________________________________________________________________________________________
City________________________State_______________Post Code____________Country ___________________
Tel:______________________Fax:___________________________Email:___________________________________
AES Membership No. _____________________ Name of Accompanying person___________________________
1
2
Payment Modes (check box) Total Amount DKK_________________________
■■Giro / Bank Transfer to BG Bank, account No. 1199 7412282. Account holder - AES Denmark
on Date : ————————————
Please charge my credit card in US$:
■■Amex ■■Mastercard/Eurocard ■■Visa
3
Card Number
Month Year
/
Name on card (print)_____________________________________________________Date:__________________
Signature of Cardholder_________________________________________________________________________
Please print/type all information as you wish it to appear on your badge.
Arrival date Departure date
Extra Nights: ■■685 single room, per night including breakfast
■■905 double room, per night including breakfast
Expiration Date
REGISTRATION FORM
AES 27th International Conference
Efficient Audio Power Amplification
Pharmakon a/s, Hillerød, Denmark
September 2–4, 2005
Mail or fax this form with payment information to
AES 27th International Conference
Treasurer, S. K. Pramanik
Sarpsborgvej 56, 7600 Struer. Denmark
Fax +45 97853105
or register on line at
www.aes.org/events/27/registration