6025008_PC_Technical_Reference_Aug81 6025008 PC Technical Reference Aug81
User Manual: 6025008_PC_Technical_Reference_Aug81
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LIMITED WARRANTY
The International Business Machines Corporation warrants this IBM Personal
Computer Product to be in good working order for a period of 90 days from the
date of purchase from IBM or an authorized IBM Personal Computer dealer.
Should this Product fail to be in good working order at any time during this
e)Q-day warranty period, IBM will, at its option, repair or replace this Product
at no addi tiona! charge except as set forth below. Repair parts and replacemen t
Products will be furnished on an exchange basis and will be either reconditioned
or new. All replaced parts and Products become the property ofTBM. This
IiIlli ted warranty does ilot inc! udc service to repair damage to the Produc t
resultiJig from accident, disaster. misuse. abuse, or non-IBM modification ur
the Product.
Limited Warranty service may be obtained by delivering the Product during the
90-day warranty period to an authorized IBM Personal Computer dealer or IBM
Service Center and providing proof of purchase date. If this Product is delivered
by mail, you agree to insure the Product or assume the risk of loss or damage in
transit, to prepay shipping charges to the warranty service location and to use the
original shipping container or equivalent. Contact an au thorized IBM Personal
Computer dealer or write to IBM Personal Computer, Sales and Service, P.O.
Box 1328-W. Boca Raton, Florida 33432, for further information.
ALL EXPRESS AND IMPLIED WARRANTIES FOR THIS PRODUCT
INCLUDING THE WARRANTIES OF MERCHANTABILITY AND FITNESS
FOR A PARTICULAR PURPOSE, ARE LIMITED IN DURATION TO A
PERIOD OF 90 DAYS FROM TilE DATE OF PURCHASE, AND NO
WARRANTIES, WHETHER EXPRESS OR IMPLIED, WILL APPLY AFTER
THIS PERIOD. SOME STATES DO NOT ALLOW LIMITATIONS ON HOW
LONG AN IMPLIED WARRANTY LASTS, SO THE ABOVE LIMITATIONS
MAY NOT APPLY TO YOU.
IF THIS PRODUCT IS NOT IN GOOD WORKING ORDER AS WARRANTED
ABOVE. YOUR SOLE REMEDY SHALL BE REPAIR OR REPLACEMENT
AS PROVIDED ABOVE. IN NO EVENT WILL IBM BE LIABLE TO YOU FOR
ANY DAMAGES, INCLUDING ANY LOST PROFITS, LOST SAVINGS OR
OTIIER INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF
THE USE OF OR INABILITY TO USE SUCH PRODUCT, EVEN IF IBM OR
AN AUTHORIZED IBM PERSONAL COMPUTER DEALER HAS BEEN
ADVISED OF THE POSSIBILITY OF SUCH DAMAGES, OR FOR ANY
CLAIM BY ANY OTHER PARTY.
SOME STATES DO NOT ALLOW THE EXCLUSION OR LIMITATION OF
INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR CONSUMER
PRODUCTS, SO THE ABOVE LIMITATIONS OR EXCLUSIONS MAY NOT
APPLY TO YOU.
THIS WARRANTY GIVES YOU SPECIFIC LEGAL RIGHTS, AND YOU MAY
ALSO HAVE OTHER RIGHTS WHICH MAY VARY FROM STATE TO STATE.
------------- ----_.-
-----
Personal Computer
Hardware Reference
Library
Technical
Reference
FEDERAL COMMUNICATIONS COMMISSION
RADIO FREQUENCY INTERFERENCE STATEMENT
WARNING: This equipment has been certified to comply with the
limits for a Class B computing device, pursuant to Subpart J of Part
15 of FCC rules. Only peripherals (computer input/output devices,
terminals, printers, etc.) certified to comply with the Class B limits
may be attached to this computer. Operation with non-certified
peripherals is likely to result in interference to radio and TV
reception.
First Edition (August 1981)
Changes are periodically made to the information herein; these changes will be
incorporated in ncw editions of this publication.
Products are not stocked at the address below. Requests for copies of this
product and for technical information about the system should be made to
your authorized IBM Personal Computer Dealer.
A Product Comment Form is provided at the back of this publication. If this
form has been removed, address comment to: IBM Corp., Personal Computer,
P.O. Box 1328, Boca Raton, Florida 33432. IBM may use or distribute any of
the information you supply in any way it believes appropriate without incurring
any obligations whatever.
© Copyright International Business Machines Corporation 1981
CONTENTS
SECTION 1. HARDWARE OVERVIEW ......... 1-1
System Block Diagram ............................ 1-4
SECTION 2. HARDWARE ...................... 2-1
System Board ................................... 2-3
System Board Data Flow .......................... 2-6
I/O Channel ..................................... 2-8
I/O Channel Diagram ............................ 2-9
System Board I/O Channel Description ............. 2-10
System Board Component Diagram ................. 2-13
Keyboard ........................................ 2-14
Keyboard Interface Block Diagram ................. 2-15
Keyboard Diagram ............................... 2-16
Keyboard Scan Codes ............................. 2-17
Keyboard Interface Connector Specifications ......... 2-18
Cassette User Interface ............................ 2-19
Cassette Jumpers ............................... 2-19
Circuit Block Diagrams ......................... 2-19
Cassette Interface Connector Specifications .......... 2-21
Speaker Interface ................................. 2-22
Speaker Drive System Block Diagram............. 2-22
I/O Address Map ................................. 2-23
System Memory Map ............................. 2-25
System Board And Memory Expansion Switch Settings ... 2-28
5 1/4" Diskette Drives Switch Settings .............. 2-29
Monitor Type Switch Settings ...................... 2-29
System Board Memory Switch Settings .............. 2-30
32/64 KB Memory Expansion Option Switch Settings ... 2-31
Power Supply ................................... 2-33
Power Supply Location ............................ 2-34
Input Requirements ............................... 2-34
DC Output ...................................... 2-34
AC Output ...................................... 2-34
Power Supply Connectors And Pin Assignments ...... 2-35
Important Operating Characteristics ................. 2-36
Over Voltage/Current Protection ................. 2-36
Signal Requirements ............................ 2-36
iii
IBM Monochrome Display and Parallel
Printer Adapter................................. 2-37
Parallel Interface Description ...................... 2-37
IBM Monochrome Display Adapter Block Diagram ... 2-38
System Channel Interface .......................... 2-39
Lines Used .................................... 2-39
wads ......................................... 2-39
Special Timing ................................. 2-39
Data Rates .................................... 2-39
Interrupt and DMA Response Requirements ....... 2-39
Modes Of Operation .............................. 2-40
Programming Considerations ....................... 2-41
Programming the 6845 CRT Controller ........... 2-41
Sequence of Events ............................. 2-41
Memory Requirements .......................... 2-41
DMA Channel ................................. 2-42
Interrupt Levels ................................ 2-42
I/O Address and Bit Map ....................... 2-42
IBM Monochrome Display ........................ 2-43
Operating Characteristics ........................ 2-43
IBM Monochrome Direct Drive Interface and
Pin Assignment ................................. 2-44
Color/Graphics Monitor Adapter ................. 2-45
Color/Graphics Monitor Adapter Block Diagram ..... 2-47
Major Components Definitions ..................... 2-48
Motorola 6845 CRT Controller .................. 2-48
Mode Set and Status Registers ................... 2-48
Display Buffer ................................. 2-48
Character Generator ............................ 2-48
Timing Generator .............................. 2-48
Composite Color Generator...................... 2-48
Modes of Operation ............................... 2-49
Alphanumeric Mode ............................ 2-49
Color TV ...................................... 2-49
Color Monitor ................................. 2-50
mM Monochrome Display Adapter Vs. Color/Graphics .. .
Adapter Attribute Relationship ..................... 2-51
Color/Graphics Modes ............................ 2-51
Graphics Storage Map .......................... 2-52
Description of Basic Operations .................. 2-54
Summary of Available Colors .................... 2-55
iv
Programming Considerations ....................... 2-55
Programming The 6845 Controller. ............... 2-55
6845 Register Description ....................... 2-56
Programming the Mode Control and Status Register ... 2-57
Color Select Register ........................... 2-57
Mode Select Register ........................... 2-58
Mode Register Summary ........................ 2-58
Status Register ................................. 2-59
Sequence of Events ............................. 2-59
Memory Requirements .......................... 2-60
Interrupt Level ................................. 2-60
I/O Address and Bit Map ....................... 2-61
Color/Graphics Monitor Adapter Direct Drive, and
Composite Interface Pin Assignment ............... 2-62
Color/Graphics Monitor Adapter Auxiliary
Video Connectors ............................... 2-63
Parallel Printer Adapter .......................... 2-65
Parallel Printer Block Diagram ..................... 2-66
Programming Considerations ....................... 2-67
Parallel Printer Adapter Interface Connector
Specifications ................................... 2-69
IBM 80 CPS Matrix Printer ....................... 2-70
Printer Specifications .............................. 2-71
Setting The DIP Switches ......................... 2-72
Functions and Conditions of DIP Switch 1 ........ 2-72
Functions and Conditions of DIP Switch 2 ........ 2-73
Parallel Interface Description ...................... 2-73
Connector Pin Assignment and Descriptions of
Interface Signals .............................. 2-74
Parallel Interface Timing Diagram ................ 2-77
ASCII Coding Table ...........
2-78
ASCII Control Codes ............................. 2-79
<
••••••••••••••••••
5 1/4" Diskette Drive Adapter .................... 2-89
5 1/4" Diskette Drive Adapter Block Diagram ....... 2-90
Functional Description ............................ 2-91
Digital Output Register .......................... 2-91
Floppy Disk Controller.......................... 2-91
Programming Considerations ....................... 2-94
Symbol Descriptions ............................ 2-94
Command Summary ............................ 2-96
Command Status Registers ...................... 2-100
v
Progranuning Summary ............................ 2-103
DPC Registers ................................. 2-103
Drive Constants ................................ 2-104
Comments ..................................... 2-104
System I/O Channel Interface ...................... 2-104
Drive A and B Interface ........................... 2-106
Adapter Outputs ............................... 2-106
Adapter Inputs ................................. 2-107
5 1/4" Diskette Drive Adapter Internal Interface
Specifications ................................... 2-108
5 1/4" Diskette Drive Adapter External Interface
Specifications ................................... 2-109
5 1/4" Diskette Drive ............................. 2-110
Diskettes ........................................ 2-111
Mechanical and Electrical Specifications ............ 2-112
Memory Expansion Options ...................... 2-113
Operating Characteristics .......................... 2-113
Memory Module Description ....................... 2-114
Memory Module Pin Configuration ................. 2-114
Switch Configurable Start Address .................. 2-115
Game Control Adapter ........................... 2-117
Game Control Adapter Block Diagram .............. 2-117
Functional Description ............................ 2-118
Address Decode ................................ 2-118
Data Buss Buffer/Driver ........................ 2-118
Trigger Buttons ................................. 2-118
Joystick Positions .............................. 2-118
I/O Channel Description .......................... 2-119
Interface Description .............................. 2-119
Joystick Schematic ................................ 2-121
Game Control Adapter (Analog Input) Connector
Specifications ................................... 2-122
Asynchronous Communications Adapter .......... 2-123
Asynchronous Communications Adapter Block
Diagram ....................................... 2-124
Modes of Operation ............................... 2-125
I/O Decode for Communications Adapter ......... 2-125
Interrupts ...................................... 2-126
Interface Description .............................. 2-126
Current Loop Interface .......................... 2-127
Voltage Interchange Information .................. 2-128
VI
INS 8250 Functional Pin Description ............... 2-129
Input Signals ................................... 2-129
Output Signals ................................. 2-132
Input/Output Signals ............................ 2-133
Programming Considerations ....................... 2-13 3
Asynchronous Communications Reset Functions ... 2-133
INS 8250 Accessable Registers .................. 2-134
INS 8250 Line Control Register.................. 2-134
INS 8250 Programmable Baud Rate Generator .... 2-135
Line Status Register ............................ 2-137
Interrupt Identification Register .................. 2-139
Interrupt Enable Register. ....................... 2-141
Modem Control Register ........................ 2-142
Modem Status Register. ......................... 2-143
Receiver Buffer Register. ........................ 2-144
Transmitter Holding Register .................... 2-145
Selecting The Interface Format. .................... 2-146
Asynchronous Communications Adapter Connector
Interface Specifications .......................... 2-147
SECTION 3. ROM and SYSTEM USAGE ....... 3-1
ROM BIOS ..................................... 3-2
Use of BIOS ..................................... 3-2
Parameter Passing ................................ 3-2
Interrupt Vector Listing............................ 3-3
Vectors With Special Meaning ..................... 3-5
Interrupt 1CH - Timer Tick...................... 3-5
Interrupt 1DH - Video Parameters ................ 3-5
Interrupt 1EH - Diskette Parameters .............. 3-5
Interrupt 1FH - Graphics Character Extensions .... 3-6
Other Read/Write Memory Usage ................ 3-6
BIOS Programming Tip ........................... 3-6
BIOS Memory Map............................... 3-7
BIOS Cassette Logic ............................. 3-8
Interrupt 15 ...................................... 3-8
Cassette Write ................................... 3-8
Cassette Read .................................... 3-9
Data Record Architecture .......................... 3-10
Error Recovery ................................... 3-10
vii
Keyboard Encoding and Usage ................... 3-11
Encoding ........................................ 3-11
Character Codes .................................. 3-11
Extended Codes .................................. 3-13
Extended Functions ............................ 3-13
Shift States .................................... 3-14
Shift Key Priorities ............................. 3-15
Special Handling ................................. 3-15
System Reset .................................. 3-15
Break ......................................... 3-16
Pause ......................................... 3-16
Print Screen ................................... 3-16
Keyboard Usage .................................. 3-17
BASIC Screen Editor Special Functions ............. 3-19
DOS Special Functions ........................... 3-19
Low Memory Maps .............................. 3-21
0-7F Interrupt Vectors ............................ 3-21
BASIC and DOS Reserved Interrupts (80-3FF) •..... 3-22
Reserved Memory Locations (400-5FF) ............. 3-22
BASIC Workspace Variables ...................... 3-23
APPENDICES .................................. A-O
Appendix A: ROM BIOS Listing ................. A-I
Appendix B: Assembly Instruction Set Reference ... B-1
Appendix C: Of Characters Keystrokes and Color .... C-l
Appendix D: Logic Diagrams ..................... D-l
Appendix E: Unit Specifications .................. E-l
Glossary ........................................ G-l
Bibliography .................................... Bib-l
Index ................................... , ....... 1-1
viii
FIGURE LISTING
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
17.
18.
19.
20.
21.
22.
System Block Diagram ........................ 1-4
System Board Data Flow ...................... 2-6, 7
I/O Channel Diagram ......................... 2-9
System Board Component Diagram ............. 2-13
Keyboard Interface Block Diagram.............. 2-15
Keyboard Diagram ............................ 2-16
Cassette Interface Read Hardware .............. 2-19
Cassette Interface Write Hardware .............. 2-20
Cassette Motor Control. ....................... 2-20
Speaker Drive System Block Diagram ........... 2-22
System Memory Map ......................... 2-25
System Memory Map (Increments of 16KB) ..... 2-26
Power Supply and Connectors .................. 2-35
IBM Monochrome Display AdapterBlockDiagram ... 2-38
Color/Graphics Monitor Adapter Block Diagram ... 2-47
Parallel Printer Adapter Block Diagram ......... 2-66
Location of (Printer) DIP Switches ............. 2-72
Parallel Interface Timing....................... 2-77
5 1/4" Diskette Drive Adapter Block Diagram ... 2-90
Game Control Adapter Block Diagram .......... 2-117
Joystick Schematic ............................ 2-121
Asynchronous Communications Adapter
Block Diagram ............................... 2-124
23. Current Loop Interface ........................ 2-127
24. Selecting The Interface Format. ................ 2-146
25. BIOS Memory Map ........................... 3-7
IX
TABLE LISTING
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
17.
18.
19.
20.
21.
22.
23.
24.
25.
26.
27.
28.
29.
30.
31.
32.
x
J(eyboard Scan Codes ......................... 2-17
6845 Initialization Parameters .................. 2-41
Monochrome Vs Color/Graphics Attributes ...... 2-51
Color/Graphics Modes ........................ 2-51
Summary of Available Colors .................. 2-55
6845 Register Description ..................... 2-56
Printer Specifications .......................... 2-71
Functions and Conditions of DIP Switch 1 ....... 2-72
Functions and Conditions of DIP Switch 2 ....... 2-73
Connector Pin Assignment and
Description of Interface Signals ................. 2-74
ASCII Coding Table .......................... 2-78
DCl/DC3 and Data Entry ..................... 2-82
Symbol Description ........................... 2-94
Status Register O.............................. 2-100
Status Register 1.............................. 2-101
Status Register 2 .............................. 2-102
Status Register 3.............................. 2-103
Mechanical and Electrical Specifications ......... 2-112
Memory Module Pin Configuration ............. 2-114
DIP Module Start Address ..................... 2-115
I/O Decodes (3F8 - 3FF) ..................... 2-125
Asynchronous Communications Reset Functions ... 2-133
BAUD Rate at 1.843 Mhz ..................... 2-137
Interrupt Control Functions (Asynchronous) ..... 2-140
Character Codes .............................. 3-11
J(eyboard Extended Functions .................. 3-14
J(eyboard - Commonly Used Functions .......... 3-17
Basic Screen Editor Special Functions ........... 3-19
DOS Special Functions ........................ 3-19
0-7F Interrupt Vectors ........................ 3-21
Basic & DOS Reserved Interrupts (80-3FF) ..... 3-22
Reserved Memory Locations (400-5FF) ......... 3-22
SECTION I.
HARDWARE OVERVIEW
The IBM Personal Computer has two major elements; a System Unit
and a keyboard. In addition, a variety of options are offered including
one or two 5-1/4" Diskette Drives with adapter which can be housed
inside the System Unit, an IBM Monochrome Display, an 80 CPS
Matrix Printer, two display adapters, storage increments to 256 KB, an
Asynchronous Communications Adapter, Printer Adapter and a
Game Control Adapter.
The System Unit is the heart of your IBM Personal Computer system.
The System Unit houses the microprocessor, Read-Only Memory
(ROM), Read/Write Memory, Power Supply, and System Expansion
Slots for the attachment of up to five options. One or two 5-1/4"
Diskette Drives can also be mounted in the system Unit providing
160KB of storage each.
The System Board is a large board which fits horizontally in the base
of the System Unit and includes the microprocessor, 40KB ROM and
16KB memory. The memory can be expanded in 16KB increments to
64KB. The System Board also includes an enhanced version of the
Microsoft BASIC-80 Interpreter without diskette functions. The
BASIC Interpreter is included in the ROM. The System Board also
permits the attachment of an audio cassette recorder for loading or
saving programs and data.
The System Unit power system is a 63.5 watt, 4 level DC and 120 AC
unit. It is a switching regulator design" allowing for light weight and
high efficiency. The DC power capacity is designed to support an
expanded system.
The 5-1/4" Diskette Drive Adapter fits into one of the five System
Expansion Slots. This attachment supports two internal drives. The
5-1/4" Diskette Drive Adapter uses write precompensation and a
phase lock loop for clock and data recovery.
The 5-1/4" Diskette Drive permits the IBM Personal Computer to
read, write and store data on 5-1/4" diskettes. Each diskette stores
approximately 160KB of data. Two of these drives may be installed
internally in the System Unit.
The keyboard is attached to the System Unit with a light-weight, coiled
cable. The keyboard features 83 keys, and offers commonly used data
and word processing functions in a design combining the familiar
typewriter and calculator pad layouts.
1-1
A base system requires one of two different display adapters, either a
Color/Graphics medium resolution Monitor adapter or a high
resolution monochrome alphanumeric adapter with a parallel printer
adapter.
The Color/Graphics adapter operates at standard television frequencies (15,750Hz), allowing attachment to a variety of industry
standard monitors, including home TVs with a user supplied RF
modulator.
The Color/Graphic Monitor adapter supports a variety of modes
selected by program control. The adapter supports color or black and
white alphanumeric modes with line width of 40 or 80 characters and
25 lines. In the alphanumeric mode there are 256 characters.
This adapter provides both a standard composite video and direct
drive outputs. In addition, a light pen feature input port is provided.
The IBM Monochrome Display is a high resolution green phosphor
display offering the personal computer user quality usually found on
larger computer systems. The display features an 11-1/2" screen with
an anti-glare surface and a variety of highlighting choices. The screen
displays 25 lines of 80 characters. It supports 256 different letters,
numbers and special characters that are formed in a nine by 14 dot
matrix.
The IBM Monochrome Display requires the Monochrome Display and
Printer Adapter Option. This option installs in one of the System Unit's
five System Expansion Slots. The display is powered from the System
Unit.
The 80 CPS Matrix Printer is a versatile, low cost, quality printer for
the IBM Personal Computer. It prints in both directions at a nominal
horizontal speed of80 characters per second on continuous-feed, single
or mUlti-part paper. The printer features four character sizes (40,66, 80
or 132 characters per line), Power-on Self-test and simple paper
loading and ribbon cartridge uppercase and lower case ASCII character set and 64 special graphic characters.
The 80 CPS Matrix Printer requires either the Monochrome Display
and Printer Adapter or the Printer Adapter. These options install in one
of the Systems Unit's five System Expansion Slots. The Printer
requires standard 120 volt, 60 Hz power through its own power cord.
The printer requires the Printer Cable Option for attachment to the
System Unit.
1-2
The 16KB Memory Expansion Kits allow you to increase the memory
size of your IBM Personal Computer. The base system comes standard
with 16KB of memory. Up to three 16KB Memory Expansion Kits
may be installed to increase the memory size to 64 KB. Memory can be
further increased to 256KB with additional memory options once these
three Expansion Kits are installed.
The Expansion Kits plug into the System Board and must be installed
sequentially. They do not occupy any of the five System Expansion
Slots.
The 32KB and 64KB Memory Expansion Options permit you to
increase memory capacity beyond 64KB. Multiple 32KB and 64KB
Memory Expansion Options may be installed as long as System
Expansion Slots are available. A maximum of three 64 KB memory
options may be installed for a total of 256KB of memory.
The 32KB and 64KB Memory Expansion Options require a System
Expansion Slot in the System Unit. The first 64KB on the System
Board is required before 32KB and 64KB Memory Expansion Options
can be installed.
The Asynchronous Communications Adapter provides a channel to
data processing or input/output devices outside of your immediate
system. These can be connected by telephone using a plug-in modem,
or directly by cable when the device is nearby.
This option utilizes the RS232C asynchronous (start-stop) interface
permitting attachment to a variety of devices including a large "host"
computer or another IBM Personal Computer.
This option supports 50 to 9600 BPS transmission speeds. One 25 pin
"D" shell, male type connector is provided to attach various peripheral
devices. A "current loop" interface is located in the same connector,
and a jumper block is provided to manually select either the voltage or
the current loop interface.
The Asynchronous Communications Adapter requires a System
Expansion Slot in the System Unit. An external modem is required for
telephone line transmission.
The Game Control Adapter permits the attachment of user-supplied
joysticks or paddles. Two joysticks and up to four paddles may be
attached. IBM does not manufacture either the joysticks or the paddles.
This option provides connectors for joysticks or paddles and requires a
System Expansion Slot in the System Unit.
A block diagram of the system is on the following page (1-4).
1-3
System Block Diagram
• OSC
• CLK
• eNTRl
8088
MAIN
PROCESSING
UNIT
2081T
4 CH
OMA
16 BIT
ROS
8K x 8
ROS
8K x 8
16 x 9 READ!
WRITE MEMORY
ROS
BK x 8
ROS
BK x 8
16KB MEMORY
EXPANSION
ROS
BK x 8
ROS
8K x 8
16KB MEMORY
EXPANSION
KEYBOARD
ATTACHMENT
3 CH
TIC
110 CHANNEL
16KB MEMORY
EXPANSION
Figure 1. SYSTEM BLOCK OIAGRAM
1-4
SYSTEM BOARD
SECTION 2. HARDWARE
Contents:
System Board ... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Supply. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IBM Monochrome Display And Printer Adapter. . .
IBM Monochrome Display. . . . . . . . . . . . . . . . . . . . . . .
Color/Graphics Monitor Adapter. . . . . . . . . . . . . . . . .
Printer Adapter and Printer. . . . . . . . . . . . . . . . . . . . . . .
5-1/4" Diskette Drive Adapter. . . . . . . . . . . . . . . . . . . .
5-1/4" Diskette Drive.................. ... .......
Memory Expansion Options 32KB and 64KB. . . . . .
Game Control Adapter. . . . . . . . . . . . . . . . . . . . . . . . . . .
Asynchronous Communications Adapter ... . . . . . . .
2-3
2-33
2-37
2-43
2-45
2-65
2-89
2-110
2-113
2-117
2-123
2-1
NOTES
2-2
SYSTEM BOARD
The System Board fits horizontally in the base of the System Unit
and has dimensions of approximately 8-1/2 inches by 11 inches. The
System Board is a multilayer single land-per-channel design, with
ground and power internal planes provided. DC power and a signal
from the power supply enter the board through two six pin connectors.
Other connectors on the board are for attaching the keyboard, audio
cassette, and the speaker. Five 62-pin card edge sockets are also
mounted on the System Board. The system I/O channel is bussed
across these five I/O slots.
There are 16 (13 used) Dual In-line Package (DIP) switches mounted
on the card which can be read under program control. These switches
are used to indicate to the system software what options are installed.
They are used to indicate amounts of installed storage, both on the
System Board and in the System Expansion slots, type of display
adapter installed, and desired operation modes upon power-up; ie,
color or black and white and 80- or 40 character lines. Switches are also
used to identify when the operating system is to be loaded from
diskette, and how many diskette drives are attached.
The major elements of the System Board are divided into five major
functional areas. They are, the processor subsystem and its support
elements, the Read-Only Memory (ROM) subsystem, the Read/Write
(R/W) Memory subsystem, integrated I/O adapters, and the I/O
channel. All functions are described in detail in this section, except for
the I/O channel, which has its own section. Figure 2.0 "System Board
Data Flow" page 2-6, illustrates these functional areas.
The heart of the System Board is the Intel 8088 microprocessor.
This processor is an 8-bit bus version of the 16-bit 8086 processor by
Intel. It is software compatible with the 8086 and, thus, supports 16-bit
operations including multiply and divide. The processor supports 20
bits of addressing (1 megabyte of storage). The processor is
implemented in maximum mode so a co-processor can be added as a
feature. The processor is operated at 4.77 Mhz. This frequency is
derived from a 14.31818 Mhz crystal which is divided by three for the
processor clock and by four to obtain the 3.58 Mhz color burst signal
required for color televisions.
At the 4.77 Mhz clock rate, the 8088 bus cycles are four clocks of
210 ns or 840 ns. I/O cycles take five 210 ns clocks or 1.05 microsec
(m sec).
2-3
The processor is supported by a set of high function support devices
providing four channels of 20-bit Direct Memory Access (DMA),
three 16-bit timer counter channels, and eight prioritized
interrupt levels.
Three of the four DMA channels are available on the I/O bus and are
provided to support high speed data transfers between I/O devices and
memory without processor intervention. The fourth DMA channel is
programmed to refresh the system dynamic memory. This is done by
programming a channel of the timer counter device to periodically
request a dummy DMA transfer. This creates a .memory read cycle
which is available to refresh dynamic storage both on the System Board
and in the System Expansion slots. All DMA data transfers, except the
refresh channel, take five processor clocks of 210 ns or 1.05 ns if the
processor ready line is not deactivated. Refresh DMA cycles take four
clocks or 840 ns.
The three timer/counters are used by the system as follows: Channel 0
is used to time and request refresh cycles from the DMA channel,
Channel 2 is used to support the tone generation for the audio speaker,
and Channel 1 is used by the system as a general purpose timer
providing a constant time base for implementing a time-of-day clock.
Each channel has a minimum timing resolution of 1.05 J-tsec.
Of the eight prioritized levels of interrupt, six are bussed to the I/O slots
for use by feature cards. Two levels are used on the System Board.
Level 0, the highest priority, is attached to Channell of the timer
counter and provides a periodic interrupt. Level 1 is attached to the
keyboard adapter circuits and receives an interrupt for each scan code
sent by the keyboard. The Non-Maskable Interrupt (NMI) of the 8088
is used to report memory parity errors.
The System Board is designed to support both ROM and ReadIWrite
Memory. The System Board contains space for 48K x 8 of ROM or
EPROM. Six module sockets are provided, each capable of accepting
an 8K x 8 device. Five of the sockets are populated with 40 KB of
ROM. This ROM contains the Cassette BASIC interpreter, cassette
operating system, Power-on Self-test, I/O drivers, dot patterns for 128
characters inn graphics mode, and a diskette bootstrap loader. The
ROM is packaged in 24-pin modules and has an access time of250 ns
and a cycle time of 375 ns.
The System Board also contains from 16K x 9 to 64K x 9 of Read/
Write Memory. A minimum system would have 16 KB of memory with
module sockets for an additional 48 KB. In a cassette version of the
system, approximately 4 KB is used by the system leaving approximately 12 KB of user's space for BASIC programs. Additional
memory beyond the System Board's maximum of64 KB, is obtained by
adding memory cards in the System Expansion slots.
2-4
The memory is dynamic 16K x 1 chips with an access time of 250 ns
and a cycle time of 410 ns. All R/W memory is parity checked.
The System Board contains circuits for attaching an audio cassette,
the serial keyboard, and the speaker. The cassette adapter allows the
attachment of any good quality audio cassette via either the microphone
or auxiliary inputs. The board has a jumper for either input. This
interface also provides a cassette motor control line for transport
starting and stopping under program control. This interface reads and
writes the audio cassette at a data rate of between 1,000 and 2,000
baud. The baud rate is variable and dependent on data content since a
different bit-cell time is used for O's and 1's. For diagnostic purposes,
the tape interface can loop read to write to test the board's circuits.
The system software blocks cassette data, generates and checks data
with a Cyclic Redundancy Check (CRC).
The processor also contains the adapter circuits for attaching the
serial interface from the keyboard. This generates an interrupt to the
processor when a complete scan code is received. This interface can
request execution of a diagnostic in the keyboard.
Both the keyboard and cassette interfaces are provided via 5-pin
DIN connectors, which are right angle mounts on the System Board
and extend through the rear panel of the System Unit.
The system is provided with a 2-1/4-inch audio speaker mounted inside
the System Unit. The System Board contains the control circuits and
driver for the speaker. The speaker connects through a 2-wire interface
which attaches to a 4-pin header on the System Board.
The speaker drive circuit is capable of approximately a 1/2 watt of
power. The control circuits allow the speaker to be driven several
different ways. First, a direct program control register bit may be
toggled to generate a pulse train; second, the output of Channel 2 of the
timer counter may be programmed to generate a waveform to the
speaker. Third, the clock input to the timer/counter can be modulated
with a program controlled I/O Register Bit. All three forms of control
may be performed simultaneously.
2-5
System Board Data Flow
p ,
NPIRO~"
D
B2UA
&
H
14,11111 MHZ
rl'~08'----f.~~NM~I~
READY
~
MAIN
PROCESSOR
I--",CL""_--f~~
~
PRESET
~~~~~~~~~~~~~~~~
L~~'~
t------<
'B
T~~"sZ4'
74LSZ44
74L5144
A"
~
Jlll "-
ADOR
ADDRESS
~
BUfFER
BUfFER
f---4
AUX
PROCESSOR
SOCKH
O-74LS373
~
i----~it--
AD7
ADDRESS
BUFFER
DO-
~
AD7
74LS245
DATA
BUfFER
~
i--.----.;,
~;ss';ss'§'S~
~
i--
I-----~
f,..,.,----~ADO-
~
8259A
110
CS
DECODE
INTERRUPT
CNTRlR
o
~
I 2 ] 4 5 6
r'------------------;,
Ir
7~
LOCAl ADORESS.
DATA STATUS,
AND CONTROL
~
i--.-----~,
f-
s------------f
J
j.--
f---------i
~
eLK/RESET
~~IlllllIlllll~&l8l~~ij~&l8l~
L -_ _ _ _ _ _ _ _ _ _ WAIT
--I
~_~
ROM
cs
WAI T
tb~r~
D[COO(
CONTROL
LINES
EXTERNAL ADDRESS
BUSIXAI
Figure 2. SYSTEM BOARD DATA flOW (SHEET 1 OF 2)
2-6
I
System Board Data Flow
1
CONTROL BUS
>
---j
NL-
j.)-
~12V .. 12V-
~
>>
---. SPARE 8KX8
ROM SPACE
'::_{l'+SV
_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _--'
)
> -
PI)
> -
TO
'WR
SUPPl Y
> > -
Figure 2. SYSTEM BOARD DATA FLOW (SHEET 2)
2-7
I/O Channel
The I/O channel is an extension of the 8088 microprocessor bus.
It is, however, demultiplexed, repowered, and enhanced by the addition
of interrupts and Direct Memory Access (DMA) functions.
The I/O channel contains an 8-bit bidirectional data bus, 20 address
lines, 6 levels of interrupt, control lines for memory and I/O read or
write, clock and timing lines, 3 channels ofDMA control lines, memory
refresh timing control lines, a channel check line, and power and ground
for the adapters. Four voltage levels are provided for I/O card +5 Vdc, 5 Vdc, + 12 Vdc, and-12 Vdc. These functions are provided in a 62-pin
connector with 100 mil card tab spacing.
A ready line is available on the I/O channel to allow operation with
slow I/O or memory devices. If the channel's Ready line is not
activated by an addressed device, all processor generated memory
read and write cycles take four 210 ns clock or 840 ns/byte. All
processor-generated I/O read and write cycles require five 210 ns
clocks or 1.05 m sec/byte. All DMA transfers require five clocks for a
cycle time of 1.05 m sec/byte. Refresh cycles are present once every 72
clocks or approximately 15 m sec and require five clocks or approximately 7% of the bus bandwidth.
I/O devices are addressed using I/O mapped address space. The
channel is designed so that 512 I/O device addresses are available to
the I/O channel cards.
A channel check line exists for reporting error conditions to the
processor. Activating this line results in a NMI to the 8088 processor.
Memory Expansion Options use this line to report parity errors.
The I/O channel is repowered so there is sufficient drive to power
all five System Expansion Slots, assuming two loads per slot. The
IBM Option I/O adapters typically use only one load. A graphic
illustration of the System I/O Channel and its descriptions are on the
following pages.
2-8
I/O Channel Diagram
REAR PANEL
SIGNAL NAME
GNo
-
1\
r-
Bl
Al-
roo---
SIGN ALNAME
-110 CH CK
+RESET ORV
i-
-
+07
+5V
i-
+06
-'. +IRDZ
r-
-
-SVoC
i-
-
+04
+oRDZ
I-
-
+03
-lZV
I-
RESERVED
r-
+lZV
I-
GNO
I-
-MEMW
I-
-MEMR
r-
-lOW
I-
-lOR
r-
+05
-
+02
+01
BID
+00
+1/0 CH ROY
AID -
-
-OACK3
r-
+oRD3
I-
-
+AEN
+A19
+A18
+A17
+A16
+A15
-oACKl
I-
-
+A14
+oRD1
r-
-
+A13
-OACKD
I-
CLOCK
I- B20
+lAm
I-
-
+A1D
+IAD6
I-
-
+A9
+IAD5
I-
-
+A8
+IRD4
I-
-
+A7
+IRD3
I-
-
+A6
-
+A12
+All
AZD-
-oACKZ
I-
-
+A5
+T/C
r-
-
+A4
+ALe.
I-
-
+A3
+5V
f-
-
+A2
+OSC
I-
-
+Al
-
+GNo
NOTE:
A description of each signal
is on the following pa ges.
f-
B31
A31 -
-
"-
+AD
\
COMP ONENT SIDE
Figure 3. I/O CHANNEL DIAGRAM
2-9
System Board I/O Channel Description
The following is a description of the IBM Personal Computer System
Board I/O Channel. All signal lines are TTL compatible.
Signal
OSC
CLK
RESET DRV
AO-AI9
DO-D7
ALE
I/O CH CK
2-10
I/O Description
0
Oscillator: This signal is a high speed clock
with a 70 nsec. period (14.31818 MHz.) It ha:
a 50% duty cycle.
Clock: This is the system clock. It is a divide 0
by - three of the oscillator and has a period of
210 nsec. (4.77 Mhz.) The clock has a 33%
duty cycle.
Reset Driver: This line is used to reset or
0
initialize system logic upon power-up or during
a low line voltage outage. This signal is synchronized to the falling edge of clock and is active
HIGH.
Address Bits 0 to 19: These lines are used to
0
address memory and I/O devices within the
system. The 20 address lines allow access of up
to 1 megabyte of memory. AO is the Least
Significant Bit (LSB) while A19 is the Most
Significant Bit (MSB). These lines are generated by either the processor or the DMA
Controller. They are active HIGH.
I/O Data Bits 0 to 7: These lines provide data bus
bits 0 to 7 for the processor, memory, and I/O
Devices. DO is the Least Significant Bit (LSB)
and D7 is the Most Significant Bit (MSB).
These lines are active HIGH.
0 Address Latch Enable: This is provided by the
8288 Bus Controller and is used on the System
Board to latch valid addresses from the processor. It is available to the I/O Channel as an
indicator of a valid processor address (When
used in conjunction with AEN). Processor
addresses are latched with the falling edge of
ALE.
I
-I/O Channei Check: This line provides the
CPU with parity (error) information on memory or devices in the I/O Channel. When this
signal is active LOW, a parity error is
indicated.
I/OCHRDY
I
I/O Channel Ready: This line (normally high
or "READY") is pulled low ("NOT
READY") by a memory or I/O device to
lengthen I/O or memory cycles. It allows
slower devices to attach to the I/O Channel
with a minimum of difficulty. Any slow device
using this line should drive it low immediately
upon detecting a valid address and a Read or
write command. This line should never be held
low for any period in excess of 10 clock cycles
(2.1 usec.) Machine cycles (I/O or memory)
are extended by an integral number of CLK
cycles (210 ns).
IRQ2-IRQ?
I
Interrupt Request 2 to ?: These lines are used to
signal the processor that an I/O device requires
attention. They are prioritized with IRQ2 as
the highest priority and IRQ? as the lowest. An
Interrupt Request is generated by raising an
IRQ line (Low to High) and holding it high until
it is acknowledged by the processor (Interrupt
Service Routine).
lOR
0
-I/O Read Command: This command line instructs an I/O device to drive its data onto the
data bus. It may be driven by the processor or
the DMA Controller. This signal is active
LOW.
lOW
0
-I/O Write Command: This command line
instructs an I/O device to read the data on the
data bus. It may be driven by the processor or
the DMA controller. This signal is active LOW.
MEMR
MEMW
-Memory Read Command: This command line
instructs the memory to drive its data onto the
data bus. It may be driven by the processor or
the DMA Controller. This signal is active LOW.
0
-Memory Write Command: This command
line instructs the memory to store the data
present on the data bus. It may be driven by
the processor or the DMA Controller. This
signal is active LOW.
2-11
DRQI-DRQ3
I
D MA Request 1 to 3: These lines are asynchronous channel requests used by peripheral devices to gain DMA service. They are prioritized with DRQl having highest priority and
DRQ3 the lowest. A request is generated by
bringing a DRQ line to an active level (HIGH).
A DRQ line must be held high until the
corresponding DACK line goes active.
DACKODACK3
o
-DMA Acknowledge 0 to 3: These lines are
used to acknowledge DMA requests (DRQ1DRQ3) and to refresh system dynamic memory (DACKO). They are active LOW.
AEN
o
Address Enable: This line is used to degate the
processor and other devices from the I/O
Channel to allow Direct Memory Access
(DMA) transfers to take place. When this line
is active (HIGH), the DMA Controller has
control of the address bus, data bus, read
command lines, (memory and I/O), and the
write command lines, (memory and I/O.
T/C
0
Terminal Count: This line provides a pulse
when the terminal count for any DMA channel
is reached. This signal is active HIGH.
The following voltages are available on the System Board I/O Channel:
+5 Vdc + 5%, Located on 2 connector pins.
-5 Vdc + 10%, Located on 1 connector pin.
+ 12 Vdc + 5%, Located on 1 connector pin.
-12 Vdc + 10%, Located on 1 connector pin.
GND (Ground), Located on 3 connector pins.
2-12
System Board Component Diagram
SYSTEM
EXPANSION
I/O SLOTS
CASSETTE I/O
'\
-_.../'
, - J1
J2
J3
,
KEYBOARD I/O
J4
O
J5
I
,,
:
P1 ~
I
I
~
CONNECTION
p
-
-
0
0
-
D
0
P2 -
READ
ONLY
MEMORY
SYSTEM BOARD
POWER
0
I
:: ~
I
-
D
CLOCK CHIP
TRIMMER
I~.
er:~:CESSOR
SOCKET
,
it1
=2
Donun
n :~~1~= :::::~~~~
un
UU
o00000 00
16-64 KB
READ/WRITE
MEMORY"
CONFIGURATION
'''~''''''
o 00000000 DO DO 000
o DDDDDDDDODDDDDD
o 00000000 00 DODD D
o D~QDD~,~~,~ 00000
SPEAKER OUTPUT
MIC OR AUX
SElECT
Figure 4. SYSTEM BOARD COMPONENT DIAGRAM
2-13
Keyboard
The Keyboard is a device separate from the System Unit. It is attached
via a serial interface cable approximately 6 feet in length which plugs
into the rear of the System Unit. The attaching cable is coiled, like that
of a telephone headset, and is a shielded four-wire wire connection. The
interface contains power (+ 5 Vdc), ground and two bidirectional signal
lines. The cable is permanently attached at the keyboard end and plugs
into the System Unit via a DIN connector.
The keyboara uses a capacitive technology with a microcomputer
(Intel 8048) performing the keyboard scan function. The keyboard is
packaged in a low-profile enclosure with a tilt adjustment for 5 degree or
15 degree orientations.
The keyboard contains 83 keys laid out in three major groupings.
The central portion of the keyboard contains a standard typewriter
keyboard layout. On the left side, arranged as a 2x5 block, are 10
function keys. These keys are user-defined by software. On the right is
a 16-key, key pad area. This area is, defined by the software but
contains legends for the functions of numeric entry, cursor control
calculator pad screen edit.
The keyboard interface is defined so system software has the maximum
flexibility in defining keyboard operations such as shift states of keys,
make/break keys, and typematic operation. This is accomplished by
having the keyboard return scan codes rather than American National
Standard Control Characters (ASCII) codes. In addition, all keys
except control keys are typematic and generates both a make and a
break-scan code. For example, key 1 produces scan code 01 on make,
and code 81 on break. Break codes are formed by adding X '80' to make
codes. The keyboard I/O driver can define keyboard keys as shift keys
or typematic as required by the application.
The microcomputer (Intel 8048) in the keyboard performs several
functions including a Power-on Self-test and when requested by the
System Unit. This diagnostic CRC checks the microcomputer ROM,
tests memory and checks for stuck keys. Additional functions
are: keyboard scanning, key debounce, buffering of up to 20 key scan
codes, maintaining bidirectional serial communications with the
System Unit, and executing the hand shake protocol required by each
scan code transfer. A keyboard diagram and table of scan codes are on
the following pages. Figure (5) is a block diagram of the keyboard
interface on the System Board.
2-14
Keyboard Interface Block Diagram
74S74
74LS322
PAO
PAl
PA2
PA3
PM
PA5
PAS
PA7
--,.
+5V -
0
~
+5V-O
L
-DE
-CLR
PB7
~
00
-SE
OS
SI-P
-G
01
4
.--.---
0
QH
OH
OG
OF
OE
00
OC
OB
OA
GNO-
CLOCK
-CLR
-PR
I~
9
LSl25
+5V
4.7KOHM
-6
KEYBOARO
OATA
ORV
0
~" "'"
CLOCK
-0
IROI
LATCH
i
0
CLOCK
0
CLOCK
:J1
LS04
I
PB 6
I
I.
r
GNO-
0
ORV
r
-G
9
KEYBOARO CLOCK
4.7K OHM
LSl25
+5V
PCL K
Figure 5. KEYBOARD INTERFACE BLOCK DIAGRAM
2-15
-
~
~
~
a-o
0'1
~
"'1
0..
_.~
~
81 DH~J ~ Diu J1 (] i[] DIDiD) []JtJJ[D1DEJO[JEJC[J0u ~
'i ElIElI U~JDf[]'iEJ'j[]J[]I[]l tJTEJrDI[]rEJIDlu[]~"='i ~T[]r~ID 1 3
TElrElI 'OEl[]EJj fJT[JrDrEJrEJj[lTDTElrDIDl [] fgr~JI[] y[JT~
6[ElIEl JTu8uIOJ(EJIUI[]IEJIEJtEJ1EJJ[lJIDID llE][DIrJI[]I~JI []
6[ElIEJJ SOEJuj[
lIOEJDO(]DObJO
5[EJ1(EJJ
I[
J[
57
NOTE
1 NOMENCLATURE IS ON BOTH TOP AND FRONT FACE OF KEYBUTTON AS SHOWN.
THE NUMBER TO THE UPPER LEFT DESIGNATES THE BUTTON POSITION.
Figure 6. KEYBOARD DIAGRAM
Table 1.
Keyboard Scan Codes
Key Position
Scan Code in Hex
Key Position
Scan Code in Hex
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
01
02
03
04
05
06
07
08
09
OA
OB
OC
00
OE
OF
10
11
12
13
14
15
16
17
18
19
lA
lB
lC
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
2B
2C
20
2E
2F
30
31
32
33
34
35
36
37
38
39
3A
3B
3C
3D
3E
3F
40
41
42
43
44
45
46
47
48
49
4A
4B
4C
40
4E
4F
50
51
52
53
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
10
IE
IF
20
21
22
23
24
25
26
27
28
29
2A
72
73
74
75
76
77
78
79
80
81
82
83
2-17
Keyboard Interface Connector Specifications
REAR PANEl
5 PIN DIN CONNECTOR
SIGNAL
PIN
1
+ Keyboard Clock
2
+ Keyboard Data
3
- Keyboard Reset (Not used by keyboard)
4
5
2-18
Ground
+5 Volts
Cassette User Interface
The cassette interface control is implemented in software. (See FIRMWARE Section). An 825 3 timer output is used to control the data to the
cassette recorder. This output exits the System Board, at the rear,
through pin 5 of a DIN connector. The cassette input data is read by
an 8255A-5 Programmable Peripheral Interface (PPI) input port bit.
This signal is received through pin 4 of the cassette connector. Software
algorithms are used to generate and read cassette data. The casette
drive motor is controlled through pins 1 & 3 ofthe cassette connector.
The motor on/off is controlled by an 8255A-PPI output port bit.
(Port '61H', bit 3). The 8255A address and bit assignments are defined
in the I/O Address Map page. On the following pages are read, write,
and motor control block diagrams.
Cassette Jumpers
A 2x2 Berg Pin and Jumper are used on the cassette Data Out line.
The jumper will allow the Data Out line to be used as a microphone
input (75 mv.) when the jumper is placed across M and C pins. An
auxiliary input is available when the jumper is placed across the A and
C pins. The auxiliary input provides a .68 volt input to the recorder.
Refer to System Board Component Diagram page (2-13) for cassette
jumper location.
M
A
M
A
JUMPER DIAGRAM
Aux·O.68V
Mike· 75 Mv.
Circuit Block Diagrams
GND
+5V
CASSETTE
DATA IN
-5V
1
DATA FROM
CASSETTE
RECORDER
EARPHONE
JACK
GND
SI LICON
DIODE
VIR=.4V
CATHODE
GND
Figure 7. CASSETTE INTERFACE READ HARDWARE
2-19
+5V
I
74LS38
3.9K OHM
R
8253 TIMER #2 L O
OUTPUT
OR
j.
o
T
4.7K OHM
R
j.
0
.678V
TO AUX
INPUT
I
1.2K OHM
R
.I..
0
.075V
TO MIC
INPUT
T
150 OHM
R
I
GNO
Figure 8. CASSETTE INTERFACE WRITE HARDWARE
+5V
I
I
4.7
KOHM
+5V
I
RELAY
SN75475
+ 5 V - CLAMP
COIL
S
C ------4
74LS38
vec
MOTO~O
OR
IN
OUT
N/O
CASSETTE
MOTOR
CONTROL
COIL
ON
o
~
VSS
GNO
Figure 9. CASSETTE MOTOR CONTROL
2-20
COM
Cassette Interface Connector Specifications
REAR PANEL
·
_.c~[[[ut
~
~
q@
CASSETTE
(S)
5 PIN DIN CONNECTOR
PIN
SIGNAL
ELECTRICAL CHARACTERISTICS*
1
Motor Control
Common from Relay
2
Ground
3
Motor Control
6 VDC; 1A (Relay N.O.!
4
Data In
500nA at ±13V - at 1,000·2,000 Baud
5
Data Out (Mic or Aux)
250 IlA at
} .68V
or
**
75mv
*AII voltages and currents are maximum ratings and should not be exceeded.
**Data out can be chosen using a jumper located on planar.
(AU X --+ .68V or MIC --+ 75 mV).
Interchange of these voltages on the cassette recorder could lead to damage
of recorder inputs.
2-21
Speaker Interface
The sound system contains a small permanent magnet 2-1/4" speaker.
The speaker can be driven from one or both of two sources. The
sources are:
1. An 8255A-5 PPI output bit. The address and bit are defined in
the I/O Address Map pages 2-23 and 2-24.
2. A timer Channel Clock out where the output is programmable
within the functions of the 8253-5 timer with a 1.19 Mhz clock
input. The timer gate is also controlled by an 8255A-5 PPloutput
port bit. Address and bit assignment are in the I/O Address
Map pages 2-23 and 2-24.
1.19 MHz
PPI BIT 1, I/O ADDR x'0061'
CLOCK
IN 2
AND
TIMER CLKOUT 2
DRV
LOW
PASS
FILTER
PPI BIT 0, I/O ADDRESS X'0061'
Figure 10. SPEAKER DRIVE SYSTEM BLOCK DIAGRAM
Channel 2
(Tone generation for Speaker!
GATE 2
- Controlled by 8255A-5 PPI Bit
(See I/O Map)
ClK IN 2 -1.19318 Mhz OSC
ClK OUT 2 - Used to drive Speaker
- Used to write data on the Audio
Cassette
Speaker Connection - 4 Pin Berg Connector, Refer to
System Board Diagram page 2-13 for speaker connection.
PIN
FUNCTION
1
2
3
DATA
KEY
GROUND
+5 VOLTS
4
2-22
TO
SPEAKER
I/O Address Map
HEX RANGE
~O-OF
20-21
.40-43
r60-63
·80-83
J AX
CX
EX
3F8-3FF
3FO-3F7
2F8-2FF
378-37F
3DO-3DF
278-27F
200-20F
.~3BO-3BF
9 8
7 6 5 4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
1
0
1
0
1
0
1
1
1
1
1
I
1
1
1
1
1
0
I
0
0
1
1 1 1
1 1 1
1 1 1
1 1 1
1 0 1
I 1 1
0 0 0
0 1 I
1
0
1
1
0
1 0
1 1
0
0
1
1
0
0
1 1
1 1
Z
Z
Z
Z
Z
3
2
1
0
DEVICE
A3
A2
Z
Z
Z
Z
Al
Z
Al
Al
Al
AO
AO
AO
AO
AO
DMA CHIP 8237-2
INTERRUPT 8259A
TIMER 8253-5
PP18255A-5
DMA PAGE REGS
NMI MASK REG
RESERVED
RESERVED
A2
A2
A2
Z
A2
Z
A2
A2
Al
Al
Al
Al
Al
Al
Al
Al
AO
AO
AO
AO
AO
AO
AO
AO
TP RS-232-C CD
51/4" DRV ADAPTER
RESERVED
PARALLEL PRTR PRT
CD LD R/G RAPH I CS ADAPTE R
RESERVED
GAME I/O ADAPTER
IBM MONOCHROME DISPLAY
PARALLEL PRINTER ADAPTER
Z
Z
Z
Z
1
0
1
I
A3
1
A3
A3
Z = Don't Care, i.e., Not in Decode
* At power on time, the Non Mask Interrupt NMI into the SOSS is masked off. This
mask bit can be set and reset via system software as follows:
Set mask: write X'SO' to I/O Address X'AO' (enable NMI)
Clear mask: write X'OO' to I/O Address X'AO' (disable NMI)
2-23
I/O Address Map
X'0060'
X'0061'
I
N
P
U
T
0
U
T
P
U
T
PAD
1
2
3
4
5
6
7
+KBO SCAN CODE
IPL 51/4 DISKETTE DRIVE
RESERVED
SYS. BD. READ/WRITE MEMORY SIZE
SYS. BD. READ/WRITE MEMORY SIZE
+DISPLAY TYPE 1
+DISPLAY TYPE 2
ND. OF 51/4 DRVS
NO. OF 5 1/4 DRVS
PBO
1
2
3
4
5
6
7
+TIMER 2 GATE SPEAKER
+SPEAKER DATA
+(REAO READ/WRITE MEMORY SIZE) OR (READ SPARE KEY)
+CASSETTE MOTOR OFF
-ENABLE READ/WRITE MEMORY
-ENABLE I/O CH CK
-HOLD KBD CLK LOW
-(ENABLE KBD) DR + (CLR KBD & ENABLE SENSE SW'S)
PCO
1
2
3
4
5
6
7
I/O READ/WRITE MEMORY (SW2-llj
]
I/O REAO/WRITE MEMORY (SW2-2)
BINARY
I/O READIWRITE MEMORY (SW2-3)
VALUE
I/O READIWRITE MEMORY (SW2-4)
X 32KB
+CASSETTE DATA IN
+TlMER CHANNEL2 OUT
+110 CHANNEl CHECK
+READIWRITE MEMORY PCK
1
2
3
4 OR
5
6
7
X'0062'
I
N
P
U
T
X'0063'
eMD/MODE REGISTER
[
SPARE KEY (SW2-5)
OR
4 3
MODE REG VALUE
1
1
X'gg'
PA3
SWI-4
o
o
PA2
SWI-3
AMOUNT OF MEMORY
LOCATED ON SYS. BD.
16K BYTES
32K BYTES
4SK BYTES
64K BYTES
o
1
PA5
SWI-6
o
o
PA4
SWI-5
TYPE OF DISPLAY
o
RESERVED
COLOR CARD 40X25 (BW MODE)
COLOR CARD SOX25 (BW MODE)
IBM MONOCHROME DISPLAY (SO X 25)
1
1
1
o
PA7
SW1-S
PA6
SWI-7
o
o
o
1
1
2
1
1
NUMBER OF 5-1/4" DRIVES
IN SYSTEM
o
3
4
8255A - 110 BIT MAP
NOTE: PA
PA
2-24
bit~O
bit~1
implies switch "ON".
implies switch "OFF".
*
*
(SW1-l)
(SWI-2)
(SWI-3)
(SWI-4)
(SWI-5)
(SWI-6)
(SWI-71
(SW1-S)
System Memory Map
X'OOOOO'
16 TO 64KB
ON SYSTEM
BOARD
I/O CHANNEL
ADDED MEM
MAX 192KB
384K MEMORY
FUTURE
EXPANSION
128KB
265KB R/W MEMORY
PRESENT
SYSTEM
MAX MEMORY
FUTURE
EXPANSION
3/4 MEG
MEMORY
ADDRESS
SPACE
128KB RESERVED
GRAPHIC/DISPLAY
BUFFER
EXPANSION
MEMORY
216KB
256KB ROM
ADDRESS
SPACE
40KB
BASE SYSTEM
ROM
X'FFFFF'
Figure 11. SYSTEM MEMORY MAP
2-25
System Memory Map (Increments of 16KB)
START ADDRESS:
DECIMAL HEX
0
16K
32K
48K
00000
04000
08000
OCOOO
64K
80K
96K
112K
10000
14000
18000
1COOO
128K
144K
160K
178K
20000
24000
28000
2COOO
192K
208K
224K
240K
30000
34000
38000
3COOO
256K
272K
288K
304K
40000
44000
48000
4COOO
320K
336K
352K
368K
50000
54000
58000
5COOO
384K
400K
416K
432K
60000
64000
68000
6COOO
448K
464K
480K
496K
70000
74000
78000
7COOO
512K
528K
544K
560K
80000
84000
88000
8COOO
576K
592K
608K
624K
90000
94000
98000
9COOO
FUNCTION:
16-64 KB READ/WRITE MEMORY
ON SYSTEM BOARD
UP TO 192 KB
MEMORY IN I/O
CHANNEL
384 KB FUTURE
R/W MEMORY EXPANSION
IN I/O CHANNEL
Figure 12. SYSTEM MEMORY MAP (INCREMENTS OF 16KB) (SHEET 1 OF 2)
2-26
System Memory Map Cont.
START ADDRESS:
DECIMAL HEX
FUNCTION:
640K
ADOOO
656K
672K
688K
A4000
A8000
ACOOO
704K
BOOOO
720K
B4000
736K
B8000
752K
BCOOO
768K
784K
800K
816K
COOOO
C4000
C8000
CCOOO
832K
848K
864K
880K
00000
04000
08000
OCOOO
896K
912K
928K
944K
EOOOO
E4000
E8000
ECOOO
960K
FOOOO
RESERVED
976K
992K
1.008M
F4000
F8000
FCOOO
48 KB BASE
SYSTEM ROM
RESERVED
MONOCHROME
112 KB
GRAPH ICS/DiSPLA Y
VIDEO BUFFER
COLOR/GRAPHICS
192 KB MEMORY
EXPANSION AREA
Figure 12. SYSTEM MEMORY MAP (16KB) (SHEET 2)
2-27
System Board and Memory
Expansion Switch Settings
On the following four pages are graphic illustrations of switch settings.
These are necesary for the system to address components attached,
and to specify the amount of memory installed both on the System
Board and in the System Expansion Slots. Refer to the System Board
Component Diagram (page 13) for DIP switch locations.
SWITCH 1
o
1
2
3
4
5
6
7
8
""
fDuDDDDDD
\
POSITION
FUNCTION
1-7-8
NUMBER OF 5%" DISKETTE DRIVES INSTALLED; PAGE 2-29
UNUSED-MUST BE ON (RESERVED FOR CO-PROCESSOR)
AMOUNT OF MEMORY ON SYSTEM BOARD; PAGE 2-30
TYPE OF MONITOR YOU ARE USING; PAGE 2-29
2
3-4
5-6
SWITCH 2
0'2
34
5678
fDDDDUUU~
\
\
POSITION
FUNCTION
1-2-3-4
5-6-7-8
AMOUNT OF MEMORY OPTIONS INSTALLED; PAGE 2-30
ALWAYS IN THE OFF POSITION
2-28
5-1/4" Diskette Drives Switch Settings
SWITCH 1
0· DRIVES
t ~DnDOO~~
12345678
I - DRIVE
r~DDDDD~~
Monitor Type Switch Settings
SWITCH 1
'"" t DOOO~~OO
(40 x 25)·TELEVISION
OR MONITOR
COLOR/GRAPHICS
MONITOR
ADAPTER
no3 D4 rl~rlo8
"i~ 0' U
~UU
D8
i~ 0' 000~nD7
U~
2
(80x25)-HIGH
RESOLUTION MONITOR
3
4
~1~;L2:~I~~ :~T~O;~:EOSME i~ 0' 000nno7
0
~~
2
3
4
8
OF DISPLAY ADAPTERS.
"
NOTE: SOME TELEVISIONS AND MONITORS OPERATED
IN (80 x 25) MODE MAY HAVE CHARACTER LOSS.
2-29
System Board Memory Switch Settings
SWITCH 1
12345678
32KB
48KB
64KB
tOD~DOOOO t ~~~~OOOD
f DO~~OOOO
fDD~~DDDD
160 KB
192KB
f~u[jLJnnDD
12345678
tOD~~OOOO f~~Q~UOOD
12345678
t[JnW~DDnD t~uw~nDDD
' "'" tm~~omo
2-30
12345678
tDowQOOOO fW~~~OODQ
12345678
224 KB
t~~~~ODDD
tDU~~DDDD t[j~uuDDDD
12345678
128 KB
12345678
f DD~[jnnDD tuu[j[jDDDD
12345678
96 KB
SWITCH 2
t~[JU~Dm[
32/64KB Memory Expansion Option
Switch Settings
Note: Positions 6-7-8 must always be ON. The sequence shown
below must be followed to allow the system to address the
memory properly.
32 KB
t~u~~~DDD
12345678
96 KB
64 KB
128 K8
160 KB
192 KB
t~~~~~ooo
32KB
32KB
64KB
32KB
32 KB
32 KB
32 KB
12345678
12345678
12345678
64KB
64KB
t~u[j~uDDD t [j[j[j~QDDD t[j[j~u[jDDD
64 KB
32 KB
32 KB
12345678
12345678
12345678
12345678
64 KB
12345678
32 KB
12345678
64 KB
12345678
64 KB
12345678
64 KB
12345678
tu~u~~DDD
64 KB
224 KB
256 KB
t[j[j~~[jDDD t[j~~u~DDD
t[j[ju~[jDDD t[j~~~~DDD t~~~~uDDD
tu~~~uDDD t[j[j~[j~DDD rn~W~~DUU
2-31
NOTES
2-32
Power Supply
The system DC power supply is a 63.5 watt, 4 voltage level switching
regulator. It is integrated into the System Unit and supplies power for
the System Unit, its options, and the keyboard. The supply provides 7
amps of +5 Vdc, +5% 2 amps of + 12Vdc, +5% 300 rna of -5Vdc,
+10% and 250 rna of -12 Vdc, +10%. All power levels are regulated
with overvoltage and over current protection. The input is 120 Vac and
fused. DC over-load or over-voltage conditions exist, the supply will
automatically shut down until the condition is corrected. The supply is
designed for continuous operation at 63.5 watts.
The System Board takes approximately 3 amps of +5 Vdc thus
allowing approximately 4 amps of 5 Vdc for the adapters in the System
Expansion Slots. The + 12 Vdc power level is designed to power the
two internal 5-1/4" Diskette Drives and the system's dynamic
memory. It is assumed that only one drive motor is active at a time. The
-5 Vdc level is used for memory bias voltage and analog circuits in
the diskette adapter phase lock loop. The + 12 Vdc and -12 Vdc are
used for powering the serial interface card EIA drivers and receivers
for the Asynchronous Communications Adapter. All four power levels
are bussed across the five System Expansion Slots and available
for option adapter.
The IBM Monochrome Display is self-powered. However, the high
resolution display receives its AC power from the System Unit power
system. It is switched on and off with the power switch, which saves a
wall outlet. The AC output for the display is a nonstandard connector,
so only the AC high resolution Display can use this AC port.
2-33
Power Supply Location
The Power Supply is located at the right rear area ofthe System Unit. It
supplies operating voltages to the System Board, IBM Monochrome
Display, annd provides two seperate connections for power to the 51/4" Diskette Drives (if installed). The nominal power requirements
and output voltages are listed on the following tables:
Input Requirements
Voltage
VOLTAGE
NOMINAL
Vac
120
@
60 Hz
MINIMUM
Vac
104
MAXIMUM
Vac
127
Frequency
60 Hz +/- .5 Hz
Current
2.5 AMPS MAX @ LOW LINE INPUT
VOLTAGE OF 120 VAC 60 HZ
DC Output
CURRENT
AMPS
VOLTAGE
Vdc
REGULATION
TOLERANCE
NOMINAL
MIN
MAX
±%
-%
+ 5.0
- 5.0
+12.0
-12.0
2.3
0.0
0.0
0.0
7.0
0.3
2.0
0.25
5
10
5
10
4
8
4
9
AC Output
VOLTAGE
Vac
CURRENT
AMPS
NOMINAL
MIN
120.0
0.0
2-34
I
I
VOLTAGE
LIMITS Vac
MAX
MIN
.75
101.0
T
I
MAX
130.0
§~~
Q.e:
CD
"'0
() '0
('I)
S'(JQ ~
=
0' g.'8
~=~
~
~PIN
PIN
5%" DISKETTE DRIVE
POWER CONNECTORf
4, + 5VDC
PIN 3, + 5VDC RTN
~PIN
2, +12 VDC RTN
1,+12VDC
t:l
~
CIl ()
S'o
,\ : - - <«
o
---------
PIN 5, +5VDC
'<
'0
CIl
-<()!3S"
o
/ /o
t:xj
aa
50
o .....
.~CIl
POWER ON/OFF
®
~
120 VAC ·IBM DISPLAY
POWER CONNECTOR
(INTERNALLY SWITCHEO)
o
KEY
PIN 4, ·12VDC
PIN 3.+12VDC
PIN 2, KEY
SYSTEM UNIT POWER CONNECTOR
PIN 1, PWR GOOD
l:J"N
CD '0
:nntMOHlfH
,.....
~
c:Il
:.>
=
C"'0
......
:.>
(JQ
~. !3
CIl
VI
('I)
(")
oe,
t:lS"
'"I
~
=
=
c:Il
c:Il
~§
~CD
s·()
t:J
(1
0
S·
'0
t:I CD
::tI()
Figure 13. POWER SUPPL Y AND CONNECTORS
-
,..,- =
~
o
~
5 CD S
c::r~t:I
~~
g.
OCllCD
::E
s::
C/.l
.. '0,<
l~
'"t
Vl
~
00
~
~
CDS"5
CIlg. CD
~'O'"I
PIN 6, +5VDC
0
....
=
3
,.....
=
('I)
Important Operating Characteristics
Over Voltage/Current Protection
PRIMARY (INPUT)
VOLTAGE
NOMINAL
VAC
120
TYPE PROTECTION
60 Hz
FUSE TYPE 2 SOC SD4
RATING
AMPS
2AMPS
Power On/Off Cycle: When the supply is turned off for a maximum of
S seconds, and then turned on, the power good signal will be
regenerated.
Signal Requirements
The power good signal indicated that there is adequate power to
continue processing. If the power goes below the specified levels,
the power good signal triggers a system shut-down.
The Power Supply. Provides a power good signal out, to indicate the
presence of the + / - SV and + / -12V outputs are above the sense level
defmed in the chart below, the power good signal is an up level (2.4V to
S.SV), TTL compatible and capable of sourcing 60 VA. When any of
the four sensed output voltages is below its sense level voltage as
defined in the chart below, the power good signal is down level (OV to
O.4V), TTL compatible and capable of sinking 500 VA. The power
good signal (after all levels of the output voltage are good) has a tum
on delay of 100 MS, but no greater than SOO MS.
The sense levels of the +/-SV and +/-12V outputs are:
OUTPUT
+5V
-5V
+12V
-12V
2-36
MIN
SENSE VOLTAGE
NOMINAL
+3.7
-3.7
+8.5
-8.5
+4.0
-4.0
+9.6
-9.6
MAX
+4.3
-4.3
+10.5
-10.5
IBM Monochrome Display and Parallel
Printer Adapter
This adapter has dual functions. The first is to provide the interface to
the IBM Monochrome Display. The second function is a parallel
interface for the IBM 80 CPS Matrix Printer.
The monitor interface is designed around the Motorola 6845 CRT
Controller module. There are 4K bytes of static memory on the card
which are used for the display buffer. The memory is dual ported and
may be accessed directly by the CPU. No parity is provided on the
display buffer. A block diagram of the Monochrome Display function
in on page 2-38.
The characteristics of the design are listed below:
• 80x25 Screen
• Direct Drive Output
• 9x14 Character Box
• 7x9 Character
• 18 Khz Monitor
• Character Attributes
The adapter supports 256 character codes. An 8K byte character
generator contains the fonts for the character codes. The characters,
values, keystrokes and screen characteristics are tabled in Appendix
C. Of Characters, Keystrokes and Color.
Note: This Adapter when used with a display containing P39
Phospor, will not support a light pen!
Parallel Interface Description
This topic is discussed in full on pages 2-65 through page 2-69.
2-37
IBM Monochrome Display Adapter Block Diagram
(10)
(10) •
2KMEMORY
CHARACTER
CODE
2KMEMORY
ATTRIBUTE
(12)
CPUAooR
MEMORY
ADDRESS
MUX
,........
(11)
,
(S)
--..
CPUoATA
-
DATA
BUS
GATING
BDO-7
,~
,
(S)
(S)
~LOCI
OCTAL
LATCH
MA
I
~
r
1
RA
,It
CHARACTER
--
I
OCTAL
LATCH
~
ATTRIBUTE
DECODE
CHARACTER
GENERATOR
(4)
AD
CHIP
SELECT
TIMING
SIGNALS
-------
MC6S45
CRTC
,
,
DOTCLK
SHIFT
REGISTER
I
1
VIDEO
PROCESS
LOGIC
SOOTS
r
-.
HSYNC. VSYNC. CURSOR. DlSPEN
CHARACTER
CLOCK
,
~
MONITOR
DIRECT DRIVE
OUTPUTS
Figure 14. IBM MONOCHROME DISPLAY ADAPTER BLOCK DIAGRAM
2-38
System Channel Interface
Lines Used
This card uses the address and data bus, memory and I/O read/write
signals, reset, I/O Ready, I/O Clock, and IRQ7.
Loads
Where possible, only one "LS" load is on the signals present at the
I/O slot. Some of the address bus lines have two "LS" loads. No
signal has more than two "LS" loads.
Special Timing
At least one wait state will be inserted on all memory and I/O accesses
from the CPU. The duration of the wait-state will vary because the
CPU/monitor access is synchronized with the character clock on
this adapter.
To insure proper initialization of the attachment, the first instruction
issued to the card must be to set the high resolution bit of the monitor
output Port 1. (OUT PORT 3B8 = OIR). A CPU access to this
adapter must never occur if the high resolution bit is not set.
System configurations which have two display adapter cards must
insure that both adapters are properly initialized after a power on
reset. Damage to either display may occur if not properly initialized.
Data Rates
For the IBM Monochrome Display Adapter, two bytes are fetched
from the display buffer in 553 ns providing a data rate of 1.8M
bytes/ second.
Interrupt and DMA Response Requirements
• The display buffer can be written into, or read from using DMA.
• The parallel interface uses the +IRQ7 line. Interrupt becomes
active when the acknowledge input is low, and interrupts are
enabled via the control port.
2-39
Modes of Operation
The IBM Monochrome Display and Printer Adapter supports 256
character codes. In the character set are alphanumerics and block
graphics. Each character in the display buffer has a corresponding
character attribute. The character code must be an even address and the
attribute code must be an odd address in the display buffer.
7
5
6
4
3
o
2
CHARACTER CODE
EVEN ADDRESS (M)
7
6
BL
R
I
5
4
G
B
3
2
R
0
I
G
I
ATTRIBUTE CODE
ODD ADDRESS (M+1)
B
-t::
...~
FOREGROUND
INTENSITY
BACKGROUND
BLINK
The adapter decodes the character attribute byte as defined above. The
BLINK and INTENSITY bits may be combined with the FOREGROUND and BACKGROUND bits to further enhance the character attribute functions listed below.
BACKGROUND
R G B
FOREGROUND
R G B
0 0 0
0 0 0
0 0 0
0 o 0
0 0 1
1 1 1
1
000
1 ;1
I If
2-40
FUNCTION
NON DISPLAY
UNDERLINE
WHITE CHARACTER/
BLACK BACKGROUND
REVERSE VIDEO
Programming Considerations
Programming the 6845 CRT Controller
The following table summarizes the 6845 Internal Data Registers and
their functions and parameters. For the IBM Monochrome Display,
the values in the table must be programmed into the 6845 to insure
proper initialization of the device.
Table 2. 6845 INITIALIZATION PARAMETERS
#
REGISTER
FILE
PROGRAM
UNIT
80x25
MONOCHROME
RO
Rl
R2
R3
R4
R5
R6
R7
R8
R9
Rl0
Rll
R12
R13
R14
R15
R16
R17
HORIZONTAL TOTAL
HORIZONTAL DISPLAYED
HSYNC POSITION
HSYNC WIDTH
VERTICAL TOTAL
VTOTAL ADJUST
VERTICAL DISPLAYED
VSYNC POSITION
INTERLACE MODE
MAX SCAN LINE ADDRESS
CURSOR START
CURSOR END
START ADDRESS (H)
START ADDRESS (Ll
CURSOR (H)
CURSOR (Ll
RESERVED
RESERVED
CHARACTERS
CHARACTERS
CHARACTERS
CHARACTERS
CHAR ROWS
SCAN LINE
CHAR ROW
CHAR ROW
61H
50H
52H
FH
19H
6H
lSH
19H
02
DH
BH
CH
OOH
OOH
DOH
DOH
REGISTER
--SCAN LINE
SCAN LINE
SCAN LINE
-----
-----
-----
---
---
Sequence of Events
The first command issued to this attachment must be to output to
PORT 3B8, hex 01, to set high resolution mode. If the high resolution
mode is not set, an infinite CPU wait-state will occur!
Memory Requirements
The attachment has 4K bytes of memory which is used for the display
buffer. The memory supports one screen of 25 rows of 80 characters,
plus a character attribute for each display character. No parity is
provided on the memory. No system Read/Write memory is required
for the monochrome adapter portion. The display buffer starts at
address 'BOOOO'.
2·41
DMA Channels
The display buffer will support a DMA operation, however CPU
wait-states will be inserted during DMA.
Interrupt Levels
Interrupt Level 7 is used on the parallel interface. Interrupts can be
enabled or disabled via the Printer Control Port. The interrupt is a high
level active signal.
I/O Address and Bit Map
The table below breaks down the functions of the I/O Address decode
for the card. The I/O address decode is from '3BO' through '3BF'.
The bit assignment for each I/O address follows:
I/O Address Function
3BO
3Bl
3B2
3B3
3B4
3B5
3B6
3B7
3B8
3B9
3BA
3BB
3BC
3BD
3BE
3BF
Not Used
Not Used
Not Used
Not Used
6845 Index Register
6845 Data Register
Not Used
Not Used
CRT Control Port 1
Reserved
CRT Status Port
Reserved
Parallel Data Port
Printer Status Port
Printer Control Port
Not Used
The 6845 Index and Data Registers are used to program the CRT
controller to interface to the high resolution Monochrome Display.
• CRT Output Port 1 (I/O Address '3B8')
Bit 11=
2-42
Function
o
+high resolution mode
1
2
3
4
5
6,7
Not used
Not used
+ video enable
Not used
+ enable blink
Not used
•
CRT Status Port (I/O Address '3BA')
Bit
o
1
2
3
Function
+ Horizontal Drive
Reserved
Reserved
+B/W Video
IBM Monochrome Display
The high resolution IBM Monochrome Display unit attaches to the
System Unit via two cables of approximately 3' (914 mm) in length.
One cable is a signal cable which contains direct drive interface from
the IBM Monochrome Display and Printer Adapter.
The second cable provides AC power to the display from the System
Unit. This allows the System Unit power ON/OFF switch to also
control the display unit. An additional benefit is a reduction in the
requirements for wall outlets to power the system. The monitor
contains an 12" (305 mm) diagonal 90° deflection CRT. The CRT and
analog circuits are packaged in an enclosure so the display may either
sit on top of the System Unit or on a nearby table top or desk. The unit
has both brightness and contrast adjustment controls on the front
available to the operator.
Operating Characteristics
Screen
High persistance green phosphor (P 39) with an etched surface to
reduce glare. Unit displays an 80 character by 25 line screen with a
9 dot wide by 14 dot tall character box.
Video Signal
Maximum video bandwidth of 16.27 Mhz.
Vertical Drive
Screen refreshed at 50 Hz with 350 vertical lines of resolution and
720 lines of horizontal resolution.
Horizontal Drive
Positive level TTL compatible frequency, 18.432 Khz.
2-43
IBM Monochrome Direct Drive Interface
and Pin Assignment
REAR PANEl
9 PIN "0"
SHELL CONNECTO
o
•
••
•
•
••
•
o
At Standard TTL Levels
IBM
Monochrome
Display
,...
....,
.......
.......
NOTE:
2-44
Ground
1
Ground -
2
Not Used
3
Not Used
4
Not Used
5
+ Intensity
6
+ Video
7
+ Horizontal
8
- Vertical
9
Signal voltages are 0 - .6 Vdc at down level
+5 Vdc at high level
IBM
Monochrome
Display and
Parallel Printer
Adapter
Color/Graphics Monitor Adapter
The Color/Graphics Monitor Adapter is designed to attach a wide
variety of TV frequency monitors and TV sets (user-supplied RF
modulator required for TVs). It is capable of operating in black and
white or color, and provides three video interfaces; a composite video
port, a direct drive port, and connection interface for driving a user
supplied RF modulator. In addition, a light pen interface is provided.
The adapter has two basic modes of operation; alphanumeric (NN)
and all points addressable graphics (APA). Additional modes are
available within NN and APA modes. In A/N mode, the display can
be operated in a 40x25 mode for low resolution monitor and TVs or
80x25 mode for high resolution monitors. In both modes, characters
are defined in an 8x8 box and are 5x7 with one line of descender for
lowercase (both uppercase and lowercase characters are supported in
all modes). In black and white mode, the character attributes of Reverse
Video, Blinking and Highlighting are available. In color mode, there are
16 foreground colors and 8 background colors available per character.
In addition, blinking on a per character basis is available.
The adapter card contains 16KB of storage; thus, for a 40x25 screen,
1000 bytes are used to store character information and 1000 bytes are
used for attribute/color information. This means that up to 8 pages of
screens can be stored in the adapter memory. Similarly, in an 80x25
mode, 4 pages of display screen may be stored in the adapter. The full
16KB storage on the display adapter is directly addressable by the
processor allowing maximum software flexibility in managing the
screen. In A/N color modes, it is also possible to select the screen
border color. One of 16 colors may be selected.
2-45
In APA mode, there are two resolutions available; 320x200 and
640x200. In the 320x200, each (picture element) pel may have one of
four colors. The background color (color 0) may be any of the 16
possible colors. The remaining 3 colors come from one of the two
software selectable palettes. One palette contains red/green/brown,
the other contains cyan/magenta/white.
The 640x200 mode is only available in black and white since the full
16KB of storage is used to define the on or off state of the pel.
The adapter operates in noninterlace mode at either 7 or 14 megahertz
(Mhz) video bandwidth depending on the mode of operation selected.
In NN mode, characters are formed from a ROM character generator.
The character generator contains dot patterns for 256 characters.
The character set contains the following major grouping of characters.
Sixteen special characters for game support, 15 characters for support
of word processing editing functions, the standard 96 ASCII graphic
set, 48 characters to support foreign languages, 48 characters for
business block graphics allowing drawing of charts, boxes and tables
using single and double lines, 16 of the most often used Greek
characters, and 15 of the most often used scientific notation characters.
The Color/Graphics Monitor Adapter function is packaged on a single
card which fits into one of the five System Expansions Slots on the
System Board. The direct drive and composite video ports are rightangle mounted connectors at the rear of the adapter and extend through
the rear panel of the System Unit.
The display adapter is implemented using a Motorola 6845 CRT
controller device. This adapter is highly programmable with respect to
raster and character parameters. Thus, many additional modes are
possible with clever programming of the adapter. A block diagram of
the Color/Graphics Adapter is on the following page.
2-46
DISPLAY
BUFFER
(16K
BYTESI
ADDRESS
LATCH
CPU
ADDRESS
.--
()
0
0
~
-
INPUT
BUFFER
CPU DATA
0""'t
~
l
CPU
DATA
~
6845
CRTC
~
ADDRESS
LATCH
f---
DATA
LATCH
"0
OUTPUT
LATCH
4
.....
=-
t---
(')
til
DATA
LATCH
t
-,.
,--.
,..
I
CHARACTER
GEN.
RDS
~
ALPHA
SER IALIZER
s:
0
f-----.
GRAPHICS
SERIALIZER
COLOR
ENCODER
::s.....
1-+
f""t-
r---+
""'t
0
>
1-+
(l.
t--
~
"0
f""t-
~
-+
N
J:..
-..J
ttl
PALETTE!
OVERSCAN
MODEL
CONTROL
""'t
--.
TIMING
GENERATOR
& CONTROL
L
Figure 15. COLOR/GRAPHICS MONITOR ADAPTER BLOCK DIAGRAM
)HYMOHYH
HORIZ,
VERT
~
0
COMPOSITE
COLOR
GENERATOR
(')
f-----.
:;:;-
0
.....
~
(fQ
""'t
~
9
Major Components Definitions
Motorola 6845 CRT Controller
This device provides the necessary interface to drive a raster scan
CRT.
Mode Set And Status Registers
This is a general purpose programmable I/O register. It has I/O points
which may be individually programmed. Its function in this attachment
is to provide mode selection (page 2-49 and 2-50) and color selection in
the medium resolution color graphics mode (page 2-51.)
Display Buffer
The Display Buffer resides in the CPU address space starting at
address X'B8000'. It provides 16K bytes of dynamic read/write
memory. A dual-ported implementation allows the CPU and the
graphics control unit to access this buffer. The CPU and the CRT
control unit have equal access to this buffer during all modes of
operation except in high resolution alphanumeric mode. In this mode
the CPU should access this buffer during the horizontal retrace
intervals. The CPU may however, write to the required buffer at any
time, but a small amount of display fetches will result if not during
retrace intervals.
Character Generator
This attachment utilizes a ROM character generator. It consists of 8K
bytes of storage which cannot be read/written under software control.
This is a general purpose ROM character generator with three different
character fonts. Two character fonts are used on this card (a 7x7 double
dot and 5x7 single dot), selected by a cardjumper. No jumper gives a
7x7 double dot, with a jumper a single dot font is selected.
Timing Generator
This block generates the timing signals used by the 6845 CRT
controller and by the dynamic memory. It also resolves the CPU/
graphic controller contentions for accessing the Display Buffer.
Composite Color Generator
The logic in this block generates base band video color information.
2-48
Modes of Operation
There are two basic modes of operation, 'Alphanumeric' and
'Graphics'. Each of these modes provide further options in both color
and black-and-white. The following text describes each mode of
operation.
Alphanumeric Mode
Alphanumeric Display Architecture
Every display character position is defined by two bytes in the regen
buffer (part of display adapter, not system memory). Both the color and
the black and white display adapter use this 2 byte character/attribute
format.
DISPLAY CHAR CODE BYTE
6
4
ATTRIBUTE BYTE
3
6
4
Attribute Byte Definition
ATTRIBUTE BYTE
7
6
5
4
3
2
B
R
G
B
I
R
ATTRIBUTE FUNCTION
FG
NORMAL
REVERSE VIDEO
NON DISPLAY (BLK)
NON DISPLAY (WHITE)
B
B
B
B
BACKGROUND
0
1
0
1
0
1
0
1
0
1
0
1
o
G
B
FOREGROUND
I
I
I
I
1
0
0
1
1
0
0
1
1
0
0
1
I = HIGH LIGHT FOREGROUND (CHAR)
B= BLINK FOREGROUND (CHAR)
Color TV
•
•
•
•
•
•
Display up to 25 rows of 40 characters each
Maximum of 256 characters
Requires 2000 bytes of Read/Write Memory (on the adapter)
8x8 character box
7x7 double dotted characters (one descender)
Character attributes (one for each character)
2-49
7 6 543 2 1 0
7 6 543 2 1 0
CHARACTER CODE
ATTRIBUTE CODE
EVEN ADDRESS (M) ODD ADDRESS (M+1)
ATTRIBUTE BYTE DEFINITIONS
R: Red
G: Green
B: Blue
I: Intensity
76543210
B
II
R G
BI
Foreground Color
Background Color
Blinking
Note: The starting address of the display buffer must be an
even location.
Color Monitor (with Direct Drive input capability)
Display up to 25 rows of 80 characters each
Requires 4000 bytes of Read/Write Memory (on the adapter)
Maximum of 256 character set
8x8 character box
7x7 character with one descender
Same format for attributes as for color TV
Note: The starting address of the display buffer must be an
even location.
2-50
IBM Monochrome Display Adapter Vs. Color/
Graphics Adapter Attribute Relationship
Monochrome Vs Color/Graphics Attributes
Table 3.
6
5
4
3
2
1
0
B
R
G
B
I
R
G
B
CHAR.
COLOR
BKGD.
COLOR
CHAR.
COLOR
BKGD.
COLOR
WHITE
BLACK
BLACK
WHITE
BLACK
WHITE
BLACK
WHITE
WHITE
BLACK
BLACK
WHITE
WHITE
BLACK
WHITE
B
B
B
B
BACKGROUND
0
0
0
1
1
1
0
0
0
1
1
1
FOREGROUND
I
I
I
I
1
1
1
0
0
0
0
0
1
1
0
1
ALL OTHER CODES
DEFINE FOREGROUND
BACKGROUND COLOR
COMBINATIONS
R
G
•
1
o"
•
ON THE
COLOR/GRAPHIC
DISPLAY ADAPTER
7
FG
NORMAL
RVV
NON DISP (BLK)
NON DISP (WHT)
ON THE
MONOCHROME
DISPLAY ADAPTER
BLACK
BLUE
GREEN
CYAN
RED
MAGENTA
YELLOW
WHITE
AN ADDITIONAL
8 COLOR (ACTUAL)
01 FFERENT SHADES
OF THE ABOVEI
ARE SELECTED BY
SETTING THE
(I) BIT
ALL OTHER
CODES RESU LT
IN WHITE
CHAR ON BLACK
BACKGROUND
BL-ACK
ALL OTHER
CODES CHANGE
FOREGROUND
BACKGROUND
COLOR TO
SELECTED
VALUE
CODE WRITTEN WITH AN UNDERLINE
ATTRIBUTE FOR THE IBM MONOCHROME DISPLAY
WHEN EXECUTED ON A COLOR/GRAPHICS ADAPTER
WILL RESULT IN A BLUE CHARACTER
WHERE THE UNDERLINE ATTRIBUTES
ARE ENCOUNTERED.
CODE WRITTEN ON A COLOR/GRAPHICS ADAPTER
WITH BLUE CHARACTERS, WILL BE
DISPLAYED AS WHITE CHARACTERS
ON BLACK BACKGROUND WITH A
WHITE UNDERLINE ON THE MONOCHROME DISPLAY
Note: Not all Monitors Recognize the (1) Bit
Table 4.
Color/Graphics Modes
HORIZONTAL
VERTICAL
NO OF COLORS
(INCL. BACKGROUND COLOR)
LOW RES
160
100
16 (INCLUDES BLACK AND
WHITE)
MED RES
320
200
4 COLORS: 1 OF 16 FOR
BACKGROUND PLUS GREEN,
RED, YELLOW OR CYAN,
MAGENTA, WHITE
HIGH RES
640
200
B&WONLY
2-51
1.
Low resolution color graphics (TV or monitor). (Note: This
mode is not supported in ROM).
• Up to 100 rows of 160 pels each (2x2)
• 1 of 16 colors each pel specified by I, R, G and B
• Requires 8000 byte of Read/Write Memory (on the adapter)
• Memory mapped graphics (requires special memory map
and set up to be defined later)
2.
Medium resolution color graphics (TV or monitor)
• Up to 200 rows of 320 pels each (lxl)
• lout of 4 preselected colors in each box
• Requires 16000 bytes of Read/Write Memory
(on the adapter)
• Memory mapped graphics
4 pels/byte
FORMAT:
7
654
3
2
C1
CO
C1
CO
C1
CO
0
C1
CO
I
First display
pel
• Graphics storage is organized in two banks of
8000 bytes each.
Graphics Storage Map
Memory Address
#0000
even scans (0, 2, 4, ... , 198)
(8000 bytes)
#lF3F
#2000
odd scans (1,3,5, ... , 199)
(8000 bytes)
#3F3F
Address #0000 contains pel information for upper left comer of
display area.
2-52
Color selection is determined by the following logic:
Cl and CO will select 4 of 16 preselected colors.
This color selection (palette) is preloaded in an I/O port.
Cl CO CODE SELECT COLOR FOR DISPLAY
POSITION
o 0 DOT TAKES ON COLOR OF 1 OF 16
PRESELECTED BACKGROUND COLORS.
o 1 SELECT 1ST COLOR OF PRESELECT COLOR
SET" 1" OR "2"
1 0
SELECT 2ND COLOR OF PRESELECT COLOR
SET" 1" OR "2"
1
1
SELECT 3RD COLOR OF PRESELECT COLOR
SET" 1" OR "2"
The two color sets are:
SET ONE
COLOR 1 - CYAN
COLOR 2 - MAGENTA
COLOR 3 - WHITE
SET TWO
COLOR 1 - GREEN
COLOR 2 - RED
COLOR 3- BROWN
The background colors are the same basic 8 color as defined for
low resolution graphic plus 8 alternate intensities defined by the
intensity bit for a total of 16 color including black and white.
3.
Black and white high resolution graphics (monitor)
• Up to 200 rows of 640 pels each (1 xl)
• Black and white only
• Requires 16000 bytes of Read/Write Memory
(on the adapter)
• Addressing and mapping is the same as for medium resolution color graphics, but the data format is different. In this
mode each bit in memory is mapped to a pelon the screen.
• 8 pels/byte
76543210
I I I I I I I
I
2-53
Description of Basic Operations
In the alphanumeric mode the adapter fetches character and attribute
information from its display buffer. The starting address ofthe display
buffer is programmable through the 6845, but it must be an even
address. The character codes and attributes are then displayed
according to their relative position in the buffer.
DISPLAY BUFFER
(EVEN) Starting Address
CHAR CODE 'A'
(Example of a 40x25 screen)
ATTRIBUTE
A
B
CHAR CODE '8'
ATTRIBUTE
X
Video Screen
CHAR CODE 'X'
Last Address
1000
ATTRIBUTE
The CPU and the display control unit have equal access to the display
buffer during all the operating modes except high resolution alphanumeric. During this mode, the CPU should access the display buffer
during the vertical retrace time (if not, then the display will be affected
with random patterns as the CPU is using the display buffer). The
characters are displayed from a prestored "character generator" which
contains the dot patterns of all the displayable characters.
In the graphics mode the displayed dots and colors are also fetched
from the display buffer (up to 16K bytes). In the Color/Graphics Mode
Section, the bit configuration for each graphics mode is explained.
2-54
Summary of Available Colors
Table 5.
I
R G B
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
COLOR
Black
Blue
Green
Cyan
Red
Magenta
Brown
Light Gray
Dark Gray
Light Blue
Light Green
Light Cyan
Light Red
Light Magenta
Yellow
White
Note: "I" provides extra luminance (brightness) to each shade
available. Resulting in the light colors listed above, except
where the "I" bit is not recognized by some monitors.
Programming Considerations
Programming the 6845 CRT Controller
The 6845 has 19 internal registers which are used to define and control
a raster scanned CRT display. One of these registers, the Address
Register, is actually used as a pointer to the other 18 registers. It is a
write only register which is loaded from the CPU by executing an OUT
instruction to I/O address 3D4. The five least significant bits ofthe I/O
bus are loaded into the Address Register.
In order to load any of the other 18 registers, the Address Register is
first loaded with the necessary pointer and then the CPU may output a
value to I/O address 3D5 in order to load the information in the
preselected register.
The following table defines the values which must be loaded in 6845
Registers in order to control the different modes of operation supported
by the attachment.
2-55
Table 6. 6845 Register Description
ADDR
REG.
REG.
#
0
RO
1
Rl
2
R2
3
R3
4
R4
5
R5
6
R6
7
R7
8
R8
9
R9
A
REGISTER
TYPE
Horizontal
Total
Horizontal
Displayed
Horiz. Sync
Position
Horiz. Sync
Width
Vertical Total
UNITS
I/O
Char.
Write
Only
Write
Only
Write
Only
Write
Only
Write
Only
Write
Only
Write
Only
Write
Only
Write
Only
Write
Only
Write
Only
Write
Only
Write
Only
Write
Only
Read/
Write
Read/
Write
Read
Only
Read
Only
Char.
Char.
Char.
Char.
Row
Vertical Total
Adjust
Vertical
Displayed
Vert. Sync
Position
Interlace Mode
Scan
Line
Char.
Row
Char.
Row
Rl0
Max Scan
Line Addr.
Cursor Start
B
Rll
Cursor End
Scan
Line
Scan
Line
Scan
Line
C
R12
Start Addr. (H)
-
D
R13
Start Addr. (U
-
E
R14
-
F
R15
10
R16
Cursor
Addr. (H)
Cursor
Addr. (U
Light Pen (H)
11
R17
Light Pen (U
-
-
-
4ox25
ALPHA
Box25
ALPHA
GRAPHIC
MODES
38
71
38
28
50
28
2D
5A
2D
OA
OA
OA
IF
IF
7F
06
06
06
19
19
64
lC
lC
70
02
02
02
07
07
01
06
06
06
07
07
07
00
00
00
00
00
00
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
XX
Note: All register values are given in hexadecimal.
2-56
Programming the Mode Control and Status Register
The following I/O devices are defined on the Color/Graphics Adapter.
HEX AD DR.
A9
A8
A7
A6
A5
A4
A3
A2
Al
AD
FUNCTION OF REGISTER
X'308'
X'309'
X'30A'
X'30B'
X'30C'
X'300'
X'301'
X'300'
X'301'
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
0
D
0
0
0
0
0
0
0
I
I
I
I
I
I
I
I
I
I
I
I
I
0
0
0
0
0
0
0
0
I
Z
Z
Z
Z
0
0
I
I
0
0
I
0
I
0
0
I
0
I
DO REG (MODE CONTROl)
DO REG (COLOR SELECT)
01 REG (STATUS)
CLEAR LIGHT PEN LATCH
PRE SET LIGHT PEN LATCH
6845 REGISTERS
6845 REGISTERS
6845 REGISTERS
6845 REGISTERS
1
Z
Z
Z
Z
Z = don't care condition
Color Select Register
This is a 6 bit output only, register, it can not be read, its address is
X'3D9' and can be written using the 8088 I/O OUT command.
The following is a description of the Register functions.
Bit 0
B (BLUE) Border Color Select ALPHA/BACKGROUND
Bit 1
G (GREEN) Border Color Select ALPHA/BACKGROUND
Bit 2
R (RED) Border Color Select ALPHA/BACKGROUND
Bit 3
I Intensifies Border Color Select ALPHA/BACKGROUND IN 320 X 200
Bit 4
Select Alt Back Color Set For Alpha Color Modes
Bit 5
320 x 200 Color Set Select
Bit 6
Not Used
Bit 7
Not Used
Bits 0, 1, 2, 3. Select the screens border color in 40x25 alpha mode. In
graphics mode (medium resolution) 320 x 200 color, the screen
background color (CO-Cl) is selected by these bit settings.
Bit 4. This bit when set will select on alternate, intensified, set of background colors in the alpha mode.
Bit 5 is only used in the medium resolution color mode (320 x 200).
It is used to select the active set of screen colors for the display.
2-57
When bit 5 is set to a "1" colors are detennined as follows.
The
Cl
o
o
1
1
CO Set selected are:
0 Background as defmed by Bit 0-3 of Port '309'
1
Cyan
0
Magenta
1
White
When bit 5 is set to a "0" Colors are detennined as follows.
The
CO
Cl
o
o
0
1
1
0
0
1
Set selected are:
Background as defmed by Bit 0-3 of Port '309'
Green
Red
Yellow
Mode Select Register
This is a 6 bit output only register, it can not be read. Its address is
X'30S'. It can be written using the 80SS I/O OUT command.
The following is a description of the registers functions.
Bit 0
Bit 0
Bit 1
Bit 2
Bit 3
. Bit 4
Bit 5
Bit 6
Bit 7
so x 25 mode
Graphic Select
B & W Select
Enable Video Signal
High Res 640 x 200 B & W Mode
Change BACKGROUNO INTENSITY
to Blink Bit
Not Used
Not Used
Bit 0
Selects between 40 x 25 and SO x 25 alpha mode, a "1"
sets it to SO x 25 mode.
Bit 1
Selects between ALPHA mode and 320 x 200 graphics
mode, a "1" select 320 x 200 graphics mode.
Bit 2
Selects color or B & W mode, a "I" selects B & W.
Bit 3
Enables the video signal at certain times when modes are
aeing changed. The video signal should be disabled when
changing modes. A "1" enables the video signal.
Bit 4
When on, this bit selects the 640 x 200 B & W graphics
mode. One color of S can be selected on direct drive sets in
this mode by using register 309.
2-58
Bit 5
When on, this bit will change the character background
intensity to the blinking attribute function for ALPHA
modes. When the high order attribute bit is not selected, 16
background colors (or intensified colors) are available. For
normal operation, this bit should be set to "1" to allow the
blinking function.
Mode Register Summary
Bits
0
1
2
3
4
5
0
0
1
1
0
1
40 x 25 ALPHA B & W
0
0
0
1
0
1
40 x 25 ALPHA COLOR
1
0
1
1
0
1
80 x 25 ALPHA B & W
1
0
0
1
0
1
80 x 25 ALPHA CO LO R
0
1
1
1
0
z
320 x 200 B & W GRAPHICS
0
1
0
1
0
z
320 x 200 COLOR GRAPHICS
0
1
1
1
1
z
640 x 200 B & W GRAPHICS
j~
J~
.~
.~
.~
n
ENABLE BLINK ATTRIBUTE
640 x 200 B & W
ENABLE VIDEO
SELECT B & W MODE
SELECT 320 x 200 GRAPHICS
80 x 25 ALPHA SElECT
z = don't care condition
* THE LOW RESOLUTION 160 x 100 MODE REQUIRES SPECIAL PROGRAMMING
AND IS SET UP AS ALPHA MODE 40 x 25
Status Register
The status register is a 4 bit read only register. Its address is X'3DA'.
It can be read using the 8088 I/O IN instruction.
2-59
The following is a description of the register functions.
Bit 0
Display Enable
Bit 1
Light Pen Trigger Set
Bit 2
Light Pen SW Made
Bit 3
Alpha Dots
Bit 4
Not Used
Not Used
Bit 5
Not Used
Bit 6
Not Used
Bit 7
Bit 0
This input bit, when active, indicates that a regen buffer
memory access can be made without interfering with the
Display.
This bit, when active, indicates that a positive going edge
from the light pen input has set the light pen trigger. This
trigger is reset on power on and may also be cleared by doing
an I/O OUT command to address X'3DB'. No specific data
setting is required, the action is address activated.
The light pen switch status is reflected in this status bit.
The switch is not latched or debounced. A "0" indicates
the switch is on.
The ALPHA video output signal is readable in this status bit.
Its purpose is to verify that video information is being
generated for RAS purposes.
Bit 1
Bit 2
Bit 3
Sequence of Events
1.
2.
3.
4.
Determine mode of operation
Reset Video Enable bit
Program 6845 to select mode
Program mode/color select registers
Memory Requirements
The memory used by this adapter is self-contained. It consists of
16k bytes of memory without parity. This memory is used as both a
display buffer for alphanumeric data and as a bit map for graphics data.
The Regen Buffers address starts at X'B8000'.
Interrupt Level (Vertical Retrace)
Level 2
2-60
I/O Address and Bit Map
Read/Write Memory Address Space
01000
System Read!Write Memory
B8000
Display Buffer (16K Bytes)
128K RESERVED
REGEN AREA
BBFFF
Display Buffer (16 K Bytes)
C8FFF
2-61
Color/Graphics Monitor Adapter Direct Drive, and
Composite Interface Pin Assignment
REAR PANEL
o
• •
• ••
6
:
9
•
o
COLOR DIRECT
DRIVE 9 PIN "D"
SHELL CONNECTO
AT STANDARD TTL LEVELS
Direct
Drive
Monitor
........
....
~
......
~
....
Ground
1
Ground
2
Red
3
Green
4
Blue
5
Intensity
6
~
Reserved·
7
~
Horizontal Drive
8
Vertical Drive
9
....
....
.......
Color/Graph ics
Direct Drive
Adapter
COMPOSITE PHONO JACK
HOOK·UP TO MONITORS
Composite Video Signal of approximately 1.5 Volts
Video ~ Peak to Peak Amplitude
Monitor ....
. G
ChassIs rou nd
2-62
1
2
Color/Graphic s
Composite Jac k
Color/Graphics Monitor Adapter
Auxiliary Video Connectors
PI-4 PIN BERG STRIP
FOR RF
MODULATOR
P2-G PIN BERG STRIP
GOLOR/GRAPHICS
ADAPTER
...
-,
RF
Modulator
L.IIIl
....
+12 Volts
1
(key) Not Used
2
Composite Video Output
3
Logic Ground
4
Color/Graphics
Adapter
RF Modulator Interface
- Light Pen Input
(key) Not Used
Light
Pen
- Light Pen Switch
Chassis Ground
...
.......
-,
1 ...
2"3 .. Color/Graphics
4"'- Adapter
+ 5 Volts
5
+12Volts
6
LIght Pen Interface
2-63
NOTES
2-64
Parallel Printer Adapter
The Printer Adapter is specifically designed to attach printers with a
parallel port interface, but it can be used as a general input/output port
for any device or application which matches its input!output capabilities. It has 12 TTL buffer output points which are latched and can be
written and read under program control using the processor IN or OUT
instructions. The adapter also has five steady state input points that
may be read using the processor's IN instructions.
In addition, one input can also be used to create a processor interrupt.
This interrupt can be enabled and disabled under program control.
Reset from the power-on circuit is also "ORed" with a program output
point allowing a device to receive a power-on reset when the processor
is reset.
This function is packaged on an adapter which fits into any of the five
System Expansion slots on the System Board. The input!output signals
are made available at the back of the adapter via a right angle PCB
mounted 25 PIN "D" type connector. This connector protrudes
through the rear panel of the System Unit where a cable and shield may
be attached.
When this adapter is used to attach a printer, data, or printer,
commands are loaded into an 8-bit latched output port, and the strobe
line is activated writing data to the printer. The program then may read
the input ports for printer status indicating when the next character can
be written or it may use the interrupt line to indicate "not busy" to
the software.
The output ports may also be read at the card's interface for diagnostic
loop functions. This allows fault isolation determination between the
adapter and the attaching device.
This same function is also part of the combination IBM Monochrome
Display and Printer Adapter. A block diagram of the printer adapter is
on the following page.
2-65
Parallel Printer Adapter Block Diagram
BUS BUFFER
-----.
~
~
8
8
...
---.
ENABLE
CLOCK
8
TRANSCEIVER
r
25 PIN "0" SHE LL
CONNECTOR
DATA LATCH
DIR
C
~O
DlJ
E READ
DATA
AEN
M
C
M
0
A
0
N
E
D
WRITE DATA
WRITE CONTROL
READ STATUS
READ
R rf-0NTROL
BUS
BUFFERS
4
ENABLE
---.
5
-+-
CONTROL
LATCH
O.C.
ORIVERS
CLOCK
-
....
-~
5
SLCT IN
STROBE
AUTO
FD XT
INIT
ENABLE
...
~
~
CLR
RESET
Figure 16. PARALLEL PRINTER ADAPTER BLOCK DIAGRAM
2-66
ERROR
SLCT
PE
ACK
BUSY
Programming Considerations
The Printer Adapter responds to 5 I/O instructions - 2 output and 3
input. The output instructions transfer data into 2 latches whose outputs
are presented on pins of a 25 Pin "D" shell connector.
Two of the three input instructions allow the CPU to read back the
contents of the two latches. The third allows the CPU to -read the real
time status of a group of pins on the connector.
A description of each instruction follows.
Parallel Printer Adapter
IBM Monochrome Display & Printer Adapter
Output to address
Bit 7
Pin 9
I
Bit 6
Pin 8
3BCH
I
Bit 5
Pin 7
I
Bit 4
Pin 6
Output to address
37BH
Bit 3
Pin 5
Bit 1
Pin 3
I
Bit 2
Pin 4
I
Bit 0
Pin 2
This instruction captures data from the data bus and is present on the
respective pins. These pins are each capable of sourcing 2.6 rna and
sinking 24 rna.
lt is essential that the external device not try to pull these lines to
ground.
IBM Monochrome Display & Printer Adapter
Output to address
3BEH
Parallel Printer Adapter
Output to address
37AH
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
IRQ
Pin 17
Pin 16
Pin 14
Pin 1
Enable
This instruction causes this latch to capture the five least significant
bits of data bus. The four least significant bits present their outputs, or
inverted versions of their outputs to the respective pins shown above. If
bit 4 is written 1, the card will interrupt the CPU on the condition that
Pin 10 transitions high to low.
These pins are driven by open collector drivers pulled to +5 V through
4.7K OHM resistors. They can each sink approximately 7 rna and
maintain 0.8 volts down level.
Note: For pin references, see Parallel Interface Connector
Specifications, page 2-69.
2-67
Parallel Printer Adapter
IBM Monochrome Display & Printer Adapter
Input from address x' '3BC'
Input from address
378H
This command presents the CPU with data present on the pins
associated with the out to x' '3BC'. This should normally reflect the
exact value that was last written to x '3BC'. If an external device should
be driving data on these pins (in violation of usage ground rules) at the
time of an input, this data will be 'or' ed with the latch contents.
Parallel Printer Adapter
IBM Monochrome Display & Printer Adapter
Input from address 3BDH
Input from address
379H
This command presents real time status to the CPU from the pins
as follows.
Bit 1
Input from address 3BEH
Input from address
Bit 0
37 AH
This instruction causes the data present on pins 1, 14, 16, 17 and IRQ
bit to be read by the CPU. In the absence of external drive applied to
these pins, data read by the CPU will exactly match data last written to
x' '3BE' in the same bit positions. Note that data bits 0-2 are not
included. If external drivers are dotted to these pins, that data will be
'or'ed with data applied to the pins by the x' '3BE' latch.
Bit 7
Bit 6
Bit 5
Bit4
IRQ
Enable
Por=O
-Pin 17
Bit 3
Bit 1
Bit 0
Pin 16
Bit 2
- Pin 14 Pin 1
Por=l
Por=O
Por=1
Por=1
These pins assume the states shown after a reset from the CPU.
Note: For pin references see Parallel Printer Adapter Interface
Connector Specifications page 2-69.
2-68
Parallel Printer Adapter
Interface Connector Specifications
REAR PANEL
25 PIN "D"
NOTE:
• •
•
• •
• ••
•
• ••
•
• ••
• •
•
• ••
•
•
All outputs are software generated,
and all inputs are real time signals
(not latched).
14·
25
0
AT STANDARD TTL LEVELS
.........
.........
AMP
Name
Pin No
- Strobe
1
+ Data Bit 0
2
.......
....
....
3
+ Data Bit 2
4
.........
.......
.........
...
"""...
..
.
.....
...•
...
~
+ Data Bit 1
...
Printer
Signal
+ Data Bit 3
5
+ Data Bit 4
6
+ Data Bit 5
7
+ Data Bit 6
8
+ Data Bit 7
9
- Acknowledge
10
+ Busy
11
+ P. End (out of Paper)
12
+ Select
13
- Auto Feed
14
- Error
15
- Initialize Printer
16
- Select Input
17
Parallel Printe
Adapter
...
...
po
..
..
po
~
~
Ground
18·25
...
po
2-69
IBM 80 CPS Matrix Printer
The printer is a self powered, standalone table top unit. It attaches to the
System Unit via a parallel signal cable which is 6 feet in length. The unit
obtains its AC power from a standard wall outlet (120 Vac). The printer
is an 80 Character Per Second (CPS) bidirectional wire matrix device.
It has a 9 wire head, allowing it to print characters in a 9x9 dot matrix.
It can print in compressed mode 132 characters per line and in standard
font, 80 characters per line. A large font also prints in 66 characters per
line mode. The printer can print double size characters and double
dotted characters. The printer prints the standard ASCII 96 character
uppercase and lowercase character sets. In addition, a set of 64 special
block graphic characters are available.
The printer can also accept commands setting the feed control desired
for the application. Setting of 1 to 66 lines per page can be programmed
and the lines per inch may be set to 5,8, or 10. This printer attaches to
the System Unit via the Parallel Printer Adapter or the combination
Monochrome Display Adapter and Parallel Printer Adapter. The cable
is a 25 lead shielded cable with a 25 pin "D" type connector at the
System Unit end, and a 36 pin connector on the printer end.
N ote: You may lose data anytime you are running a program with the
printer off and attached to the System Unit.
2-70
Table 7.
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
(10)
(11 )
(12)
(13)
Printer Specifications
PRINT METHOD:
PRINT SPEED:
PRINT DIRECTION:
NUMBER OF PINS IN HEAD:
LINE SPACING:
PRINTING CHARACTERISTICS
Matrix:
Character Set:
Graphic Character:
PRINTING SIZES
Normal:
Enlarged:
Condensed:
Condensed Enlarged:
MEDIA HANDLING
Paper Feed:
Paper Width Range:
Copies:
Paper Path:
INTERFACES
Standard:
INKED RIBBON
Color:
Type:
Life Expectancy:
ENVIRONMENTAL CONDITIONS
Operating Temperature Range:
Operating Humidity:
POWER REQUIREMENT
Voltage:
Current:
Power Consumption:
PHYSICAL CHARACTERISTICS
Height:
Width:
Depth:
Weight:
Serial impact dot matrix
80 CPS
Bidirectional with logical seeking
9
4.23 mm (1/6") or programmable
9x9
Full 96-character ASCII with decoders.
plus 9 international characters/symbols
64 block characters
Characters
per inch
10
5
16.5
8.25
Maximum
characters
per line
80
40
132
66
Adjustable sprocket pin feed
101.6 mm (4") to 254 mm (10")
One original plus two carbon copies {total
thickness not to exceed 0.3 mm 10.012")
Rear
Parallel 8-bit
Data & Control Lines
Black
Cartridge
3 million characters
5 to 35 0 C (41 to 95 0 F)
10 to 80% non-condensing
120VAG, 60 Hz
1 Amp maximum
100 VA maximum
107 mm (4.2")
374 mm (14.7")
305 mm (12.0")
5.5 kg (12 Ibs.)
2-71
Setting The DIP Switches
There are two DIP switches on the control circuit board. In order to suit
the user's specific requirements, desired control modes are selectable
by the DIP switches. The functions of the switches and their preset
conditions at the time of shipment are as shown in Table 8 (DIP
Switch 1) and Table 9 (DIP Switch 2).
Function
Pin No.
2-72
ON
-
OFF
Factory-set
Condition
-
ON
1
Not applicable
2
CR
{ Print & line Feed
Print only
Print only
Print &
line feed
ON
3
Buffer full
{ Print & line Feed
Print only
Print only
Print &
line feed
ON
4
Cancel code
{ Valid
Invalid
Invalid
Valid
OFF
5
Delete code
{ Valid
Invalid
Invalid
Valid
ON
6
Error
Buzzer
Sounds
Does not
sound
ON
7
Character generator
(Graphic pattern select)
N.A.
Graphic
patterns
select
OFF
8
SLCT IN signal
Fixed internally
Not fixed internally
Fixed
Not fixed
ON
Table 9. Functions and Conditions of DIP Switch 2
Function
Pin No.
1
ON
OFF
-
-
Not applicable
-
2
~
3
AUTO FEED
XT signal
4
Coding table select
Fixed internally
Not fixed internally
-
Factory-set
Condition
ON
ON
Fixed
Not fixed
OFF
N.A.
Standard
OFF
Parallel Interface Description
(1)
(2)
(3)
Specifications
Data transfer rate: 1000 CPS (max.)
(a)
(b)
Synchronization: By externally supplied STROBE
pulses.
(c)
Handshaking: ACKNLG or BUSY signals.
(d)
Logic level: Input data and all interface control signals
are compatible with the TTL level.
Connector
Plug: 57-30360 (AMPHENOL)
Connector pin assignment and descriptions of signals.
Connector pin assignment and descriptions of respective
interface signals are provided in Table (10) page 2-74.
2-73
Table 10. Connector Pin Assignment and Descriptions
of Interface Signals
Signal
Pin No.
Return
Pin No.
Direction
Descriptio n
1
19
STROBE
In
STROBE pulse to read
data in. Pu Ise width
must be more than
0.5ps at receiving
terminal.
The signal level is
normally "HIGH";
read·in of data is per·
formed at the "LOW"
level of th is signal.
2
20
DATA 1
In
3
21
DATA 2
In
4
22
DATA 3
In
5
23
DATA 4
In
6
24
DATA 5
In
These signals represent
information of the
1st to 8th bits of
parallel data respectively. Each signal is
at "HIGH" level when
data is logical "1" and
"LOW" when logical
"0".
Signal
7
25
DATA 6
In
8
26
DATA 7
In
9
27
DATAS
In
10
28
ACKNLG
Out
Approx.. 5ps pulse.
"LOW" indicates that
data has been received
and that the pri nter
is ready to accept
other data.
11
29
BUSY
Out
A "HIGH" signal
indicates that the
printer cannot receive
data. The signal
becomes "High" in
the following cases:
1. During data entry
2. During printing
operation
3.ln OFF·L1NE state
4. During printer error
status.
2-74
Table 10. Connector Pin Assignment and Descriptions
of Interface Signals (cont.)
Signal
Pin No.
Return
Pin No.
12
30
13
-
14
-
Signal
Direction
Description
PE
Out
A "HIGH" signal
indicates that the
printer is out of paper.
SLCT
Out
This signal indicates
that the printer is in
the selected state.
AUTO
FEED XT
In
With this signal being
at "LOW" level, the
paper is automatically
fed one line after
printing.
(The signal level can
be fixed to "LOW"
with DIP SW pin 2·3
provided on the
control circuit boardj
15
16
-
NC
-
OV
17
-
CHASSIS-GN D
-
18
-
NC
-
19-30
-
GND
31
-
INIT
Not used.
Logic GN D level.
Printer chassis GN D.
In the printer, the
chassis GN D and the
logic GND are ilOlated
from each other.
Not used.
TWISTED-PAIR
RETU RN signal
GND level.
-
In
When the level of this
signal becomes" LOW"
the printer controller
is reset to its initial
state and the print
buffer is cleared. This
signal is normally at
"HIGH" level, and
its pulse width must
be more than 50ps at
the receiving
terminal.
2-75
Table 10. Connector Pin Assignment and Descriptions
of Interface Signals (cont.)
Signal
Pin No.
32
Return
Pin No.
Signal
ERROR
Direction
Out
Description
The level of this signal
becomes "LOW"
when the printer is
in1. PAPER END state
2. OFF·LI NE state
3. Error state
33
-
GND
-
Same as with Pin No.
19 to 30.
34
-
NG
-
Not used.
35
36
NOTES
2-76
Pulled up to t5V
through 4.7 KS1
resistance.
-
SLGTIN
In
Data entry to the
printer is possible
only when the level
of this signal is
"LOW". (Internal
fixing can be carried
out with DIP SW 1·8.
The condition at the
time of shipment is
set "LOW" for this
signal.)
1: "Direction" refers to the direction of signal flow as viewed from the printer.
2: "Return" denotes "TWISTED PAl R RETU RN" and is to be connected
at signal ground level.
As to the wiring for the interface, be sure to use a twisted·pair cable for
each signal and never fail to complete connection on the Return side. To
prevent noise effectively, these cables should be shielded and connected
to the chassis of the System Unit and the printer, respectively.
3: All interface conditions are based on TTL level. Both the rise and fall times
of each signal must be less than O.2ps.
4: Data transfer must not be carried out by ignoring the ACKN LG or BUSY
signal. (Data transfer to this printer can be carried out only after confirming
the ACKN lG signal or when the level of the BUSY signal is "LOW".)
(4)
Data transfer sequence
Fig. 17 shows the sequence for data transmission.
BUSY -----,
ACKNLG
0.511<: (MIN.)
DATA--~
STROBE
0.511
<;
(MIN.)
0.5il' (MIN.)
Figure 18. PARALLEL INTERFACE TIMING DIAGRAM
2-77
ASCII Coding Table
Table 11 shows all available codes when the Printer is set for
operation with standard coding by setting the DIP switch pin 2-4 to
the OFF position. This DIP switch pin is factory-set to the OFF
position.
Table 11.
-'"
-....
-M
N
~
LJ.J
D
U
ca
-
~--
- -
0
0
-
~.
•
0
«
en
en
co
.....
-
0
0
0
0
0
N
M
U
U
u
D
....u
Z
U
D
D
D
U
'"
«
-I
co
<.0
'"
'"
.... ....
::>
f-
LJ.J
Z
::r:
ca
0..
CT
-
M
;;
;;
;;
0
0
;;
-;;
0
0
N
N
- 0
0
;;
0
ro
~
~
-
::>
>
~
~
f-
-I
>
N
'-.-'
S
x
>-
u
"C
~
'"
..c:
.-
'-
~
~
•
--
-
E
c:::
f-
::>
>
;;:
X
>-
N
-
/'
ro
«
ca
U
D
LJ.J
~
C!)
::r:
-
...,
~
-I
0
-
N
M
.... '"
<.0
.....
co
en
..
..
''i.
"-
_.
:
*"
*
+
-
N
M
0
0
U
U
U
D
D
....u
D
D
~
-I
0
Z
u
u
'"
«
f-
LJ.J
0
0
0
0
0
0
;;
N
M
....
;;
::r:
ca
-
0
0
0
;;
C;
'"
en,
-I
LJ.J
D
0
I
~
:;;;
"
Z
0
.\
".
.....
I
LJ.J
-I
::>
Z
- -
""
CIJ
('
CIJ
."
0
-
ex:
'"
ex:
U
..
d
;;
0
0
0
0
.c
~
0..
0
0
0
0
2-78
~I
LJ.J
-I
0
M
..
0
.....
---;:::
-;;
---;;
;;
-0
0
co
ASCII Coding Table
~
-I
f-
>
~
ex:
~
U
~
0
0
;;
0
D
LJ.J
en
- - - ;;- -- -- - -- -- -«
.....
0
C;
<.0
0
0
0
0
0
co
en
0
0
;;
aJ
U
~
ASCII Control Codes
Control Codes
Various kinds of control codes are contained in Table 11. These control
codes are recognized by the printer and perform specified functions
upon receipt of these codes. The following are descriptions of respective control codes.
(1)
CR (Carriage Return)
When the CR code is transmitted to the print buffer, all data
stored in the print buffer is printed.
(When AUTO FEED XT (Pin No. 14) is at "LOW" level or
DIP switch pin 2-2 is ON, the paper is advanced one line
automatically after printing.)
Note: When 80 columns of print data (including spaces) are
continuously received and the following data is valid and
printable, the Printer automatically begins to print the
data stored in the print buffer. In this case, if AUTO
FEED XT is at "LOW" level or DIP switch pin 2-3 is
ON, the paper is advanced one line after printing.
(2)
LF (Line Feed)
When the LF code is input, all data in the print buffer is printed
and the paper is advanced one line.
Note: If no data precedes the LF code, or if all preceding data
is "SPACE", only paper feeding is performed.
For example, if the data is transferred in the order of
DATA-+CR-+LF, DATA will be printed by the CR
code, and when the Printer receives the LF code, it only
carries out one line feed.
VT (Vertical Tab)
(3)
When the VT code is input, all data preceding this code is
printed. And the paper is advanced to the line position set by
"ESC B" (described later). If no vertical tab position is set by
ESC B, the VT code behaves like the LF code. Therefore, the
paper is advanced one line after printing.
(4)
FF (Form Feed)
The FF code carries out the printing of all data stored in the
print buffer and advances the paper to the next predetermined
Top of Form position. The Top of Form is determined when the
POWR switch is turned on or the INIT signal is applied. If the
form length per page is not set by "ESC C+n", it is regarded
as 66 or 72 lines.
2-79
(5)
1.
2.
Note: The form length of 72 lines per page is applicable to only
the version marked with identifier code "M72" on the
rear side of the lower case of the Printer.
This code always initializes the printing of the data stored in
the print buffer.
SO (Shift Out)
When the SO code is input, all data that follows it in the same
line will be printed out in enlarged (double width) characters.
This code is cancelled by the printing operation or the input of
"DC 4" code and can be input at any column position on a line.
Therefore, normal size and enlarged characters can be mixed
on the same line.
ABC
[PRINT]
ABCDEFGHI
[DATA
[PRINT
(6)
1.
2.
(7)
ABCD ~ EFGH
ABCDEFGH
IJKLMNOP
~
GHI
~
[gJ
[TI]
IJLK
ISO 1 MNOP
~
[!;£J
SI (Shift In)
When the SI code is input, all data that follows it will be printed
out in condensed characters. This code is cancelled by the input
of "DC 2" code. The SI code can be input at any column
position on a line, but all characters/symbols on the line
containing SI code are printed out in condensed characters.
When printing condensed characters, the data capacity of the
print buffer will become 132 columns per line.
When the SO code is received after the input of the SI code,
condensed enlarged characters (double width of condensed
characters) can be printed. This condition is cancelled by
"DC 4" code, and the character size returns to "condensed".
[DATA]
~
ABCDEFGHIJKL
[PRINT]
ABCDEFGHIJKL
[DATA]
[PRINT]
ABC ~ DEF
ABCDEFGHIJKL
[§J ~
Iso I GHIJKL
~
0
DC 4 (Device Control 4)
The DC 4 code cancels the SO mode.
[DATA]
[PRINT]
2-80
ISO 1 DEF IDC41
[DATA]
~
ABCDEF ~ GHI
ABCDEFGHIJKL
IDC 41
JKL
~
[gJ
(8)
DC 2 (Device Control 2)
The DC 2 code cancels the SI mode.
[DATA]
[PRINT]
@I
ABCDEF
ABCDEFGHI
Iso I GHI @] @] IDC 21
JKLMN
1CR I ~
JKLMN
(9)
(10)
(11)
(12)
(13)
1.
HT (Horizontal Tab)
The HT code carries out the horizontal tabulation. If there is no
tab position set, this code is ignored. The tab stop positions are
set by "ESC D+n" (described later).
CAN (Cancel)
Upon the input of the CAN code, all data previously stored in
the print buffer is cancelled. Therefore, this code is regarded as
the print buffer clear command. This code clears the print
buffer, but control codes (Excluding the SO code) are still valid
even if the CAN code is transferred. The validity or invalidity of
the CAN code is selectable by the DIP switch pin 1-4 on the
control circuit board.
DEL (Delete)
This code functions the same as the CAN code. The validity or
invalidity of the DEL code is selectable by the DIP switch pin
1-5 on the control circuit board.
DC 1 (Device Cantrall)
The DC 1 code places the Printer in the Selected state. With the
Printer in the Selected state, if the DC 1 code is input during
data transfer, all data stored before the DC 1 code is ignored.
DC 3 (Device Control 3)
The DC 3 code places the Printer in the Deselected state. In
other words, it disables the Printer to receive data. Once the
Printer is put in the Deselected state by the DC 3 code, the
Printer will not revert to the Selected state unless the DC 1 code
is input again.
Note: When the DC 1 and DC 3 codes are used, DIP switch
pin 1-8 should be in the "OFF" position.
[DATA]
[PRINT]
2.
@DJ
AAAAA IDc31
BBBBB
IDcll
CCCCC
ICRI
~
AAAAACCCCC
[ DATA]
AAAAA
[PRINT]
BBBBB
~ BBBBB
IDC 31
CCCCC
IDC 11 @ID [ill
2-81
Relations among the ON LINE switch, SLCT IN signal,
DCl/DC3 code and interface signals are shown in Table
12 below.
Table 12. DClIDC3 And Data Entry
--
ON LINE
SWITCH
--
SLCT IN
DC l/DC 3
ERRDR
BUSY
ACKNLG
SLCT
DATA ENTRY
OFF-LINE
HIGH/LOW
OC l/DC 3
LOW
HIGH
Not
Generated
LOW
Impossible
DC 1
HIGH
LOW/
HIGH
Generated
HIGH
Possible
(Normal entry)
HIGH
DC 3
HIGH
LOWI
HIGH
Generated
LOW
Possible
(See Note 1.)
LOW
DC l!DC 3
HIGH
LOW/
HIGH
Generated
HIGH
Possible
(Normal entry)
ON-LINE
NOTES
(14)
(15)
(16)
2-82
1: In Table 12, it is assumed that as soon as the Printer receives data, it sends back the ACKN LG signal,
though this data is not stored in the print buffer. In this status, the Printer is waiting for the DC 1
code for normal entry.
2: The DC l/DC 3 code is valid under the condition that the DIP switch pin 1-8 is OFF, namely, the
level of SLCT IN at the pin No. 36 of the interface connector is "HIGH". When SLCT IN is "LOW",
the DC 1IDC 3 code is not valid.
NUL (Null)
The NUL code is regarded as the termination for tabulation
setting sequence (described in detail later).
BEL (Bell)
When the BEL code is input, the buzzer sounds for about 3
seconds.
Escape (ESC) control
(a)
Escape numerical control
Input of an "E SC" code followed by an ASCII numeric
code permits each of the following functions to be
performed.
1) ESC 0 (Escape 0)
Receipt of an "ESC" followed by ASCII code
"0" causes the line spacing to be set at 1/8 inch.
Input of the ESC 2 code or INIT signal to the
interface connector or turning the power off and on
again causes the line spacing to return to 1/6 inch.
2) ESC 1 (Escape 1)
Receipt of an "ESC" followed by ASCII code
"1" causes the line spacing to be set at 7/72 inch.
Input of the ESC 2 code or INIT signal to the
interface connector or turning the power off and on
again causes the line spacing to return to 1/6 inch.
3)
(b)
ESC 2 (Escape 2)
Receipt of an "ESC" followed by ASCII code
"2" causes the line spacing to be set at 1/6 inch.
When the POWER switch is turned on, the line
spacing is set at initial 116 inch. The ESC 2 code is
also a command to execute "ESC A+n" modes
(described later).
4) ESC 8 (Escape 8)
The ESC 8 code makes it possible to transmit data
even if there is no paper in the Printer. This code
should be transmitted before the Printer runs out
of paper. After transmitting this code, when the
Printer runs out of paper, the PE signal of the
interface connector turns to High level; the
ERROR signal remains at High level.
5) ESC 9 (Escape 9)
This code cancels the ESC 8 condition. When the
power is turned on, the Printer is initialized into
ESC 9 status. Therefore, the Printer cannot
receive data when there is no paper.
6) ESC SI
This code functions the same as "SI".
7) ESC SO
This code functions the same as "SO".
ESC alphabetic control
Receipt of an "ESC" code followed by ASCII code
"X"(alphabetic code) permits each of the following
functions to be performed.
Note: "n" represents a 7-bit binary number, and the
most significant bit is not treated as data. "+" is
inserted for the purpose of legibility only, and
should not be input in actual operation.
1) ESC A+n
This code specifies the amount of line spacing in
the Line Feed 1«n> 10<85 (Decimal): "n" is a
binary number. "n"= 1 is equivalent to 1/72 inch
paper advancement. Since the distance between
any two dot wires of the print head is 1/72 inch,
any line spacing in increments proportional to the
distance between the dot wires can be established.
2-83
The ESC A code is the command only to store
spacing data into the memory. In other words,
even if spacing data was transferred into the
memory, the Printer does not actually carry out
the line spacing in accordance with the spacing
data. To execute the line spacing in accordance
with the stored data, the ESC 2 code should be
followed. Namely, the ESC 2 code is considered
as the execution command for the line spacing.
[DATA]
[PRINT]
AAAAAAA
JCRI JLFI
CCCCCCC
ICRI
EEEEEEE
ICR I
AAAAAAA}
BBBBBBB
[!!]
[ill
BBBBBBB
DDDDDDD
FFFFFFF
JCRI ILFIIESCA+241
IEsC21 ICRI
[IT]
I CR I I LF I
1/6 inch = 12 steps/72
CCCCCCC
DDDDDDD
}
1/3 inch = 24 steps/72
EEEEEEE
FFFFFFF
2)
2-84
Note:
When "n" is actually transferred to the
Printer as data, it is transferred in the form
of a 7-bit binary number.
In case of "ESC A+24", actual output to
the Printer is performed as
H<41>H<18>H in hexadecimal
code.
ESC B+nl +n2+nk+ NUL
(1«n>1O<66, 1H
AAAAAAA
[PRINT]
IVTI
<6>H
H
BBBBBBB
IVTI
INULI
eeeeeee
IVTI
DDDDDDD
AAAAAAA .... 1st line
BBBBBBB .... 4th lines
eeeeeee .... 6th lines
DDDDDDD .... 10th lines
3)
4)
ESC C+n (1 «n>1O<66)
This code specifies the form length per page. The
form length is determined by the number of lines
(="n"). The amount of a line spacing at this point
is a predetermined numerical value by "ESC
A +n". When the form length is not programmed,
one page is assumed at 66 or 72 lines. Prior to
setting the vertical tab position, the form length
should be set.
ESC D+n1+n2+ ..... +nk+NUL
(1 «n> 1O<127,Ic:;112)
This code specifies the horizontal tab stop positions. The first 112 tab stops per line are
recognized in the Printer, and subsequent tab
stops are ignored. Tab stop numbers must be
received in incremental numerical order.
If a tab stop position of higher value than 80 is
received in normal character printing mode, all
horizontal tab functions after 80 columns are
ignored.
To execute tab stop positions, the HT code should
be input. The HT code is ignored when the horizontal tab position has not been programmed.
2-85
The NUL code should be input as the command
for the termination of the tab set sequence, and the
lack of this code will cause incorrect data printout.
1.
In case of 5th, 10th and 21st columns.
[DATA] IESCDI
H
H
H
INULI
ABC
([jJ
([jJ
DEF
[EIJ
GHI
JKL
IQD I1£l
[PRINT]
2.
ABC
DEF
[DATA] IESCDI
[PRINT]
3.
[PRINT]
ABC
H
DEF
IESCDI
2.
H
INULI
ABC
[[iJ
!EII
DEF
GHI
[EIJ
JKL
[f!jJ [ill
GHIJKL
H
ABCDEF
H
GHI
H
INULI
ABCDEF
INULI
ABCD
[ETI
GHI
[iIT]
JKL
[BIJ
EFGH
@KI ~
JKL
In case of transferring two HT codes at a time.
[DATA]
IESCDI
[PRINT]
ABCD
H
[DATA]
H
H
I ESC E
I
[DATA]
Isol IESC EI
ABCDEFGHI
6)
7)
ICR
I [IT]
ABCDEFGHI
ICRI
ABCDEFGHI
ABCDEFGHI
2-86
ISPACEI
[£F!] [ill
ESC E
The ESC E code causes the Printer to print
emphasized characters. Emphasized printing
gives the character a stronger impression on the
paper.
This code can be input in any column position on a
line.
The speed of the head carriage reduces to 40 CPS
while printing emphasized characters.
[PRINT]
[PRINT]
[EIJ
EFGH
5)
1.
JKL
In case of character data transferring over next tab stop.
[DATA]
4.
GHI
In case of lack of stop position.
[ill
ESC F
The ESC F code cancels the emphasized printing
mode.
ESC G
The ESC G code causes the Printer to perform the
double printing. Double printing is carried out in
the following manner:
a) A character is printed.
b) The paper is advanced by 1/216 inch.
c) The print head prints the same character
again.
In this way, the character becomes bold.
[DATA]
[PRINT]
I ESC G I ABCDEFGHI
ICRI ILF I
ABCDEFGHI
8)
ESC H
The ESC H code cancels the double printing
mode.
2-87
NOTES
2-88
5 1/4-Inch Diskette Drive Adapter
The System Unit has space and power for one or two 5-1/4" Diskette
Drives. The drives are soft sectored, single sided, with 40 tracks. They
are Modified Frequency Modulation (MFM) coded in 512 byte
sectors, giving a formatted capacity of 163,840 bytes per drive. They
have a track to track access time of 8 ms and a motor start time
of 500 ms.
The 5-1/4" Diskette Drive Adapter fits in one of the System Board's
five System Expansion Slots. It attaches to the two drives via an
internal daisy chained flat cable which connects to one end of the drive
adapter. The adapter has a second connector on the other end which
extends through the rear panel of the System Unit. This connector
contains the signals for two additional external drives, thus the 5-1/4"
Diskette Drive Adapter is capable of attaching four 5-1/4" drives, two
internal, and two external.
The adapter is designed for double density MFM coded drives and uses
write precompensation with an analog phase locked loop for clock and
data recovery. The adapter is a general purpose device using the NEe
,uPD765 compatible controller. Thus the drive parameters are
programmable. In addition, the attachment supports the drive's write
protect feature.
The adapter is buffered on the I/O bus and uses the System Board direct
memory access (DMA) for record data transfers. An interrupt level is
also used to indicate operation complete and status condition requiring
processor attention.
In general, the 5-1/4" Diskette Drive Adapter presents a high-level
command interface to software I/O drivers. A block diagram of the
5-1/4" Diskette Drive Adapter is on the following page.
2-89
~
-
,.....
1.0
CLOCK &
TIMING CKT
o
~
-to
WRITE
PRECDMP.
CKT
Ul
K
WRITE DATA
.............
~
......
1
~
'----
-to
WRITE
DATA
RO DATA
DATA
SEPARATOR
VCO SYNC
0..
~
o~
i:I';"'
l
DRIVE A MOTOR ON
~
IIHR.
~
-.<
''"1"""
TRACT D
~
''""""""
('I)
('I)
WRITE PROTECT
I'"
lRESET
i:I';"'
('I)
~
INDEX
~
til
"0
HEAD SELECT
I'"
_
~.
r
DIGITAL
CONTROL
PORT
-V
DECODER
'l
_.
-B
~
-C
~
-0
DRIVE A SELECT
-B
-c
-0
l,..-
Figure 19. 5%" DISKETTE DRIVE ADAPTER BLOCK DIAGRAM
(fQ
'"1
~
3
Functional Description
From a programming point of view, this attachment consists of an 8-bit
digital output register in parallel with a NEC ,uPD765 or equivalent
Floppy Disk Controller (FDC).
In the following description, drives numbers 0-3 are equivalent to drives
A-D respectively.
Digital Output Register (DOR)
The Digital Output Register (DOR) is an output only register used to
control drive motors, drive selection, and feature enable. All bits are
cleared by the I/O interface reset line. The bits have the following
functions:
Bits 0 and 1
These bits are decoded by the hardware to select
one drive if its motor is on:
Bit 1 0 Drive
o 0
0 A
o liB
1 0
2 C
1 1
3 D
Bit 2
The FDC is held reset when this bit is clear. It
must be set by the program to enable the FDC.
Bit 3
This bit allows the FDC interrupt and DMA
requests to be gated onto the I/O interface. If this
bit is cleared, the interrupt and DMA request I/O
interface drivers are disabled.
Bits 4,5,6, and 7 These bits control respectively the motors of
drives 0,1,2,A,B,C, and 3,D. If a bit is clear,
the associated motor is off, and the drive
cannot be selected.
Floppy Disk Controller (FDC)
The following is a brief summary of the registers and commands implemented by the FDC.
The FDC contains two registers which may be accessed by the main
system processor; a Status Register and a Data Register. The 8-bit
Main Status Register contains the status information of the FDC, and
may be accessed at any time. The 8-bit Data Register (actually
consisting of several registers in a stack with only one register presented
to the data bus at a time) stores data, commands, parameters, and FDD
status information. Data bytes are read out of, or written into, the Data
2-91
Register in order to program or obtain the results after a particular
command. The Main Status Register may only be read and is used to
facilitate the transfer of data between the processor and FDC.
The bits in the Main Status Register are defined as follows:
Bit
Number
Name
Symbol
Description
DBOFDD
FDD A Busy
DAB
DBl
FDD B Busy
DBB
DB2
FDD C Busy
DCB
DB3
FDD D Busy
DDB
DB4
FDC Busy
CB
DBS
Non-DMA
Mode
Data Input/
NDM
Request for
Master
RQM
FDD number is in the
Seek mode.
FDD number 1 is in the
Seek mode.
FDD number 2 is in the
Seek mode.
FDD number 3 is in the
Seek mode.
A read or write command
is in process.
The FDC is in the nonDMAmode.
Indicates direction of data
transfer between FDC
and Processor. If
DIO = "l", then transfer
is from FDC Data Register to the Processor, If
DIO = "0", then transfer
is from the Processor to
FDC Data Register.
Indicates Data Register is
ready to send or receive
data to or from the Processor. Both bits DIO and
RQM should be used to
perform the handshaking
functions of "ready" and
"direction" to the
processor.
DB6
DB7
2-92
DIO
The FDC is capable of perfonning 15 different commands. Each
command is initiated by a multi-byte transfer from the processor, and
the result after execution of the command may also be a multi-byte
transfer back to the processor. Because ofthis multi-byte interchange of
infonnation between the FDC and the processor, it is convenient to
consider each command as consisting of three phases:
Command Phase
The FDC receives all information required to perform a particular operation
from the processor.
Execution Phase
The FDC perfonns the operation it was instructed to do.
Result Phase
After completion of the operation, status and other housekeeping
infonnation are made available to the processor.
2-93
Programming Considerations
Table 13.
Symbol Descriptions
The following tables define the symbols used in the command summary
which follows.
SYMBOL
NAME
DESCRIPTION
AO
Address Line 0
AO controls selection of Main Status Register
(AO = 0) or Data Register (AO = 1I.
C
Cylinder Number
C stands for the current/selected Cylinder
(track) number of the medium.
D
Data
o stands for the data pattern which is going to
be written into a Sector.
07-00
Data Bus
8-bit Data Bus, where 07 stands for a most
significant bit, and 00 stands for a least
significant bit.
OTl
Data Length
When N is defined as 00, OTl stands for the
data length which users are going to read out
or write into the Sector.
EDT
End of Track
EDT stands for the final Sector number on a
Cylinder.
GPl
Gap length
GPl stands for the length of Gap 3 (spacing
between Sectors excluding VCD Sync. Field).
H
Head Address
H stands for head number 0 or 1, as specified
in 10 field.
HO
Head
H0 stands for a selected head number 0 or 1.
(H = H0 in all command words.)
HLT
Head Load Time
HLT stands for the head load time in the FO 0
(4 to 512 ms in 4 ms increments).
HUT
Head Unload Time
HUT stands for the head unload time after a
read or write operation has occurred (0 to
480 ms in 32 ms increments.)
MF
FM or MFM Mode
If MF is low, FM mode is selected, and if it is high,
MFM mode is selected only if MFM is implemented.
MT
Multi-Track
If MT is high, a multi-track operation is to
be performed. (A cylinder under both HOO
and H0 1 will be read or written.)
N
Number
N stands for the number of data bytes written
in a Sector.
NCN
New Cylinder
Number
NCN stands for a new Cylinder number, which
is going to be reached as a result of the Seek
operation. Desired position of Head.
2-94
Table 13.
Symbol Descriptions (continued)
SYMBOL
NO
NAME
Non-DMA Mode
OESCRIPTION
NO stands for operation in the Non-D MA Mode.
PCN
Present Cylinder
Number
PCN stands for Cylinder number at the completion of SENSE INTERRUPT STATUS Command,
indicating the position of the Head at present
time.
R
Record
R stands for the Sector number, which will
be read or written.
R/W
Read/Write
R/W stands for either Read (R) or Write (W)
signal.
SC
Sector
SC indicates the number of Sectors per Cylinder.
SK
Skip
SK stands for Skip Deleted Data Address Mark.
SRT
Step Rate Time
SRT stands for the Stepping Rate for the FDD.
(2 to 32 ms in 2 ms increments.)
ST 0
ST 1
ST 2
ST3
Status 0
Status 1
Status 2
Status 3
ST 0-3 stand for one of four registers which
store the status information after a command
has been executed. This information is available
during the result phase after command execution. These registers should not be confused
with the main status register (selected by AO = 0).
ST 0-3 may be read only after a command has
been executed and contain information
relevant to that particular command.
STP
Scan Test
During a Scan operation, if STP = 1, the data in
contiguous sectors is compared byte by byte
with data sent from the processor (or DMA),
and if STP = 2, then alternate sectors are
read and compared.
US~,
Unit Select
US stands for a selected drive number
encoded the same as bits 0 and 1
of the digital register (DO R) p 2-91
USl
2-95
Command Summary
o indicates 'logical 0' for that bit, 1 means 'logical 1',
X means 'don't care'.
PHASE
Command
RIW
W
W
W
W
W
W
W
W
W
OATA BUS
04
03
06
05
MT
MF
REAO DATA
SK
a 0
X
X
07
X
X
X
02
1
HD
01
00
REMARKS
1
US1
a
usa
Command Codes
C
H
R
Sector 10
information prior
to Command execution
N
EDT
GPl
OTL
Data-transfer between
the FDD and main-system
Status information after
Command execution
Execetion
Result
Command
ST 0
ST 1
ST 2
C
H
R
R
R
R
R
R
R
R
W
W
W
W
W
W
W
W
W
Sector 10 information
after Command execution
N
MT
X
READ DELETED DATA
MF SK
a 1 1
X
X
X HD
X
C
H
R
0
US1
0
usa
Sector 10 information
prior to Command
execution
N
EDT
GPl
DTL
Data-transfer between
the FDD and main-system
Status information after
command execution
Execution
Result
Command
ST a
ST 1
ST 2
C
H
R
R
R
R
R
R
R
R
W
W
W
W
W
W
W
W
W
2-96
R
R
R
R
R
R
R
Sector 10 information
after command execution
N
MT
MF
X
X
WRITE DATA
a 0 a
X
X
X
C
H
R
1
HD
0
US1
1
usa
Command Codes
Sector 10 information
to command execution
N
EDT
GPl
DTl
Execution
Result
Command Codes
STO
ST 1
ST 2
C
H
R
N
Data-transfer between
the main-system and FDD
Status information after
command execution
Sector 10 information
after command execution
Command Summary (continued)
PHASE
Command
RIW
W
W
W
W
W
W
W
W
W
07
MT
X
06
05
OATA BUS
03
04
02
01
WRITE DELETED DATA
MF
0
1
0
0
0
X
X
X
X HD
US1
C
H
R
N
EDT
GPL
DTl
00
1
Command
R
R
R
R
R
R
R
W
W
W
W
W
W
W
W
W
Sector 10 information
prior to command
execution
~
Data-transfer between
F0 D and mai n-system
Status 10 information
after common execution
STO
ST 1
ST 2
C
H
R
N
0
X
MF
X
Sector 10 information
after command execution
READ A TRACK
0
0
0
X
X
X HD
C
H
R
N
EDT
GPL
DTl
SK
1
US1
0
USD
Command
R
R
R
R
R
R
R
W
W
MF
0
X
X
R
R
R
R
R
R
R
Sector ID information
after command execution
READID
1
0
X
X
Execution
Result
Data-transfer between
the F0 0 and main-system_
FDC reads all of cylinders
contents from index hole
to EDT.
Status information after
command execution
STO
ST 1
ST 2
C
H
R
N
0
X
ST 0
ST 1
ST 2
C
H
R
Command Codes
Sector 10 information
prior to command
execution
Execution
Result
Command Codes
usn
Execution
Result
REMARKS
0
HD
1
US1
0
USD
Command Codes
The first correct ID
information on the
cylinder is stored in
data register.
Status information
after command execution
Sector 10 information
during execution phase
N
2-97
t:~
~
F.:
Command Summary (continued)
PHASE
RIW
Command
W
W
W
W
W
W
07
a
X
06
MF
X
OATA BUS
04
02
03
05
FORMAT A TRACK
01
a
a
1
1
a
X
X
X
N
SC
GPL
0
HO
USl
00
REMARKS
a
usa
Command Codes
Bytes/Sector
Sector/Track
Gap 3
filler byte
FOC formats an entire
cylinder
Status information
after command
execution
In this case, the ID
information has no
meaning
Execution
Result
R
R
R
R
R
R
R
Command
W
W
W
W
W
W
W
W
W
ST a
ST 1
ST 2
C
H
R
N
MT
X
MF
X
SK
X
SCAN EQUAL
1
a a
X
X HD
C
H
R
N
EDT
GPL
STP
a
US1
1
Sector ID information
prior to command
execution
Data compared between
the FDD and main-system
Status information after
command execution
Execution
Result
Command
ST a
ST 1
ST 2
C
H
R
N
R
R
R
R
R
R
R
W
W
W
W
W
W
W
W
W
MT
X
MF
X
SCAN LOW OR EQUAL
SK
1
1
a
X
X
X HD
C
H
R
N
EDT
GPL
STP
Execution
Result
2-98
R
R
R
R
R
R
R
STO
ST 1
ST 2
C
H
R
N
Command Codes
usa
Sector ID information
a
1
US1
usa
Command Codes
Sector ID information
prior to command
execution
Data compared between
the FDD and main-system
Status information after
command execution
Sector ID information
after command execution
Command Summary (continued)
PHASE
R/W
07
Command
W
W
W
W
W
W
W
W
W
MT
X
DATA BUS
01
05
04
03
02
SCAN HIGH OR EQUAL
1
MF SK
0
X
X
US,
X
X HO
C
H
R
N
EDT
GPL
STP
06
,
,
DO
,
Command
R
R
R
R
R
R
R
W
W
Sector ID information
prior to command
execution
Data compared between
the F0 D and main-system
Status information after
command execution
ST 0
ST'
ST 2
C
H
R
N
0
X
0
X
0
X
Sector ID information
after command execution
RECALIBRATE
0
0
X
Command Codes
USO
Execution
Result
REMARKS
X
, , ,
0
US,
Command Codes
usa
Execution
No Result
Phase
Head retracted to track 0
SENSE INTERRUPT STATUS
0
0
1
0
0
ST 0
PCN
Command
Result
W
R
R
0
Command
W
W
W
0
0
-SRT
--HLT
W
W
R
0
X
W
W
0
X
0
0
SPECIFY
0
0
0
0
, ,
Command Codes
Status information at
the end of seek operation about the FOC
Command Codes
HUTND
No Result
Phase
Command
Result
Command
w
0
X
0
X
SENSE DRIVE STATUS
0
0
0
1
X
X HO
X
ST3
0
X
0
SEEK
1
X
X
0
US1
Command Codes
Status information
about FO 0
, ,
HO
0
usa
US1
1
Command Codes
usa
NCN
Execution
Head is positioned
over proper cylinder
on diskette
No Result
Phase
Command
W
INVALID
Inval id Codes
Result
R
STO
Invalid command codes
(NoOp - FOC goes into
standby statel
ST 0; 80
2-99
Command Status Registers
Table 14. Status Register 0
BIT
NO.
NAME
SYMBOL
07
DESCRIPTION
07 = 0 and 06 = 0
Normal termination of command, (NT),
Command was completed and properly
executed.
07 = 0 and 06 =1
Abnormal termination of command,
(AT). Execution of command was
started, but was not successfully
completed.
07 =1 and 06 = 0
Invalid command issue (lC). Command
which was issued was never started.
07 = 1 and 06 =1
Abnormal termination because during
command execution the ready signal
from FOO changed state.
Interrupt
Code
IC
05
Seek End
SE
When the FOC completes the Seek
command, this flag is set to 1 (high).
04
Equipment
Check
EC
If a fault signal is received from the
FOO, or if the track 0 signal fails to
occur after 77 step pulses (recalibrate
command) then this flag is set.
03
Not Ready
NR
When the FO 0 is in the not-ready state
and a read or write command is issued,
this flag is set. If a read or write command
is issued to side 1 of a single sided drive,
then this flag is set.
02
Head Address
HO
This flag is used to indicate the state
of the head at interrupt.
01
00
Unit Select 1
Unit Select 0
US 1
US 0
These flags are used to indicate a Orive
unit Number at interrupt.
06
2-100
Table 15. Status Register 1
BIT
SYMBOL
DESCRIPTION
NO.
NAME
07
End of Cylinder
EN
06
-
-
Not used. This bit is always 0 (low).
05
Data Error
DE
When the FOC detects a CRC error in
either the 10 field or the data field,
this flag is set.
When the F0 C tries to access a sector
beyond the final sector of a cylinder,
this flag is set.
04
Over Run
OR
If the FOC is not serviced by the mainsystems during data transfers within a
certain time interval, this flag is set.
03
-
-
Not used. This bit is always 0 (low).
02
No Data
NO
During Execution of a Read Data, Write
Deleted Data, or Scan command, if the
FDC cannot find the sector specified
in the 10 register, this flag is set.
During execution of the Read 10
command, if the FDC cannot read
the 10 field without an error, then
this flag is set.
During the execution of the Read-aCylinder command, if the starting
sector cannot be found, then this
flag is set.
01
Not Writable
NW
During Execution of a Write Data, Write
Deleted Data, or Format a Cylinder
command, if the FOC detects a write
protect signal from the F0 0, then th is
flag is set.
DO
Missing Address
Mark
MA
If the FDC cannot detect the 10 Address
Mark, this flag is set. Also at the same
time, the MO (Missing Address Mark in
Data Field) of Status Register 2 is set.
2-101
•
~
E
~
g
f:.:.
Table 16. Status Register 2
BIT
NO.
NAME
D7
-
-
Not Used. This bit is always 0 {low!.
D6
Control Mark
CM
During execution of the Read Data or
Scan command, if the FDC encounters
a sector which contains a Deleted Data
Address Mark, this flag is set.
D5
Data Error in
Data Field
DD
If the FDC detects a CRC error in the
data then th is flag is set.
D4
Wrong Cylinder
WC
This bit is related with the ND bit, and
when the contents of C on the medium
are different from that stored in the
ID Register, this flag is set.
D3
Scan Equal Hit
SH
During execution of the Scan command,
if the condition of "equal" is satisfied,
th is flag is set.
D2
Scan Not
Satisifed
SN
During execution of the Scan command,
if the FDC cannot find a sector on the
cylinder which meets the condition, then
th is flag is set.
Dl
Bad Cylinder
BC
This bit is related with the ND bit, and
when the contents of C on the medium
are different from that stored in the ID
Register, and the content of C is FF, then
this flag is set.
DO
Missing Address
Mark in Data
Field
MD
When data is read from the medium, if
the FDC cannot find a Data Address
Mark or Deleted Data Address Mark,
then this flag is set.
2-102
SYMBOL
DESCRIPTION
Table 17. Status Register 3
BIT
NO.
NAME
SYMBOL
DESCRIPTION
D7
Fault
FT
This bit is used to indicate the status of
the Fault signal from the FDD.
D6
Write Protected
WP
This bit is used to indicate the status of
the Write Protected signal from the FDD.
D5
Ready
RY
This bit is used to indicate the status of
the Ready signal from the FDD.
~
D4
Track 0
TO
This bit is used to indicate the status of
the Track 0 signal from the FDD.
~
D3
Two Side
TS
This bit is used to indicate the status of
the Two Side signal from the FDD.
D2
Head Address
HD
This bit is used to indicate the status of
Side Select signal to the FDD.
D1
Unit Select 1
US 1
This bit is used to indicate the status of
the Unit Select 1 signal to the FDD.
DO
Unit Select 0
US 0
This bit is used to indicate the status of
the Unit Select 0 signal to the FDD.
Programming Summary
DPC Registers (Ports)
FDC Data Reg
I/O Address 3F5
FDC Main Status Reg
I/O Address 3F4
Digital Output Reg
I/O Address 3F2
00: DR #A 10: DR #C
Drive
01: DR #B 11: DR #D
Select
Not FDC Reset
Enable INT & DMA Requests
Drive A Motor Enable
Drive B Motor Enable
Drive C Motor Enable
7
Drive D Motor Enable
All bits cleared with channel reset.
Bit 0
1
2
3
4
5
6
2-103
~
~
Interrupt 6
DMA 2
100 Disk Format
1 Head, 45 cylinders, 8 sectors/TRK, 512 bytes/sector,MFM.
FDC Constants
N: H'02', SC: 08, HUT: F, SRT: C, GPL FORMAT: H'05',
GPL RD/WR: 2A, HLT: 01, (8ms track-track)
Drive Constants
HD Load
HD Settle
Motor Start
35 ms
25 ms
500 ms
Comments
1.
Head loads with drive select, wait HD Load time before RD/WR.
2.
Following access, wait HD Settle time before RD/WR.
3.
Drive motors should be offwhen not in use. Only A or Band C or:
may run simultaneously. Wait Motor Start time before RD/WR.
4.
Motor must be on for drive to be selected.
5.
Data Errors can occur while using a Home Television as the
system display. Locating the TV too close to the diskette area can
cause this to occur. To correct the problem, move the TV away
from, or to the opposite side of the System Unit.
System I/O Channel Interface
All signals are TTL compatible:
MPUL 5.5 Vdc
LPUL 2.7 Vdc
MPDLO.5 Vdc
LPDL -0.5 Vdc
The following lines are used by this adapter.
+DO-7
(Bidirectional, Load: 1 74LS; Driver: 74LS 3-state)
These eight lines form a bus by which all commands,
status, and data are transferred. Bit 0 is the loworder bit.
2-104
+ AO-9
(Adapter Input, Load: 1 74LS)
These ten lines form an address bus by which a
register is selected to receive or supply the byte
transferred via lines DO-7. Bit 0 is the low-order bit.
+AEN
(Adapter Input, Load: 1 74LS)
The content of lines AO-9 is ignored if this line is
active.
-lOW
(Adapter Input, Load: 1 74 LS)
The content of lines DO-7 is stored in the register
addressed by lines AO-9 or DACK2 at the trailing
edge of this signal.
-lOR
(Adapter Input, Load: 1 74LS)
The content of the register addressed by lines AO-9
or DACK2 is gated onto lines DO-7 when this line
is active.
-DACK2
(Adapter Input, Load: 2 74LS)
This line active degates output DRQ2, selects the
FDC data register as the source/destination of bus
DO-7, and indirectly gates T/C to IRQ6.
+T/C
(Adapter Input, Load: 474LS)
This line and DACK2 active indicates that the byte
of data for which the DMA count was initialized is
now being transferred.
+RESET
(Adapter Input, Load: 1 74LS)
An up level aborts any operation in process and
clears the Digital Output Register (DOR).
+DRQ2
(Adapter Output, Driver: 74LS 3-state)
This line is made active when the attachment is ready
to transfer a byte of data to or from main storage. The
line is made inactive by DACK2 becoming active or
an I/O read of the FDC data register.
+IRQ6
(Adapter Output, Driver: 74LS 3-state)
This line is made active when the FDC has completed an operation. It results in an interrupt to a
routine which should examine the FDC result bytes
to reset the line and determine the ending condition.
2-105
Drive A and B Interface
All signals are TTL compatible:
MPUL 5.5
LPUL 204
MPDLOo4
LPDL -0.5
Vdc
Vdc
Vdc
Vdc
All adapter outputs are driven by open-collector gates. The drive(s)
must provide termination networks to Vcc (except Motor Enable 1
which has a two kohm resistor to Vcc).
Each adapter input is terminated with a 150 ohm resistor to Vcc.
Adapter Outputs
-Drive Select A&B
(Driver: 7438)
These two lines are used by drives A&B to
degate all drivers to the adapter and
receivers from the attachment (except Motor
Enable) when the line associated with a drive is
not active.
-Motor Enable A&B (Driver: 7438)
The drive associated with each of these lines
must control its spindle motor such that it starts
when the line becomes active and stops when
the line becomes not active.
-Step
(Driver: 7438)
The selected drive moves the read/write head
one cylinder in or out per the direction line
for each pulse present on this line.
-Direction
(Driver: 7438)
F or each recognized pulse of the step line the
read/write head moves one cylinder toward
the spindle if this line is active, and away
from the spindle if not-active.
-Write Data
(Driver: 7438)
For each not-active to active transition of this
line while Write Enable is active, the selected
drive causes a flux change to be stored on
the disk.
-Write Enable
(Driver: 7438)
The drive disables write current in the head
unless this line is active.
2-106
Adapter Inputs
-Index
The selected drive supplies one pulse per
disk revolution on this line.
-Write Protect
The selected drive makes this line active if
a write protected diskette is mounted in the
drive.
-Track 0
The selected drive makes this line active if
the read/write head is over track O.
-Read Data
The selected drive supplies a pulse on this
line for each flux change encountered on the
disk.
2-107
5-1/4" Diskette Drive Adapter
Internal Interface Specifications
34 PIN KEYED
EDGE CONNECTOR
NOTE: LANDS 1-33 ARE ON THE BACKSIDE
OF THE BOARD, LANDS 2-34 ARE ON THE
FRONT, OR COMPONENT SIDE.
COMPONENT
SIDE
AT STANDARD TTL LEVELS
-..
...
,
~
......
IBM 51/4" ,
Diskette
:...
Drives
"'"
..
.......
I'
~
"'"
~
I'"
2-108
Land No.
Graund-Odd Numbers
1-33
Unused
2,4,6
Index
8
Motor Enable A
10
Drive Select B
12
Drive Select A
14
Motor Enable B
16
Direction (Stepper Motor)
18
Step Pulse
20
Write Data
22
Write Enable
24
Track 0
26
Write Pratect
28
Read Data
30
Select Head 1
32
Unused
34
...
5 1/4" Diskette
Drive
Adapter
....
...
..-
..
5-1/4" Diskette Drive Adapter
External Interface Specifications
REAR PANEL
37 PIN 'D' SHELL
CONNECTOR
0
19
•
•
•
•
•
•
•
•
•
•
•
•
•
•
••
•
•
•
• 20
••
•
•
•
•
•
•
•
•
•
•
•
•
•
•
• 37
0
AT STANDARD TTL LEVELS
Unused
Pin no.
1 ·5
Index
Motor Enable C
Drive Select D
8
""'..."
Drive Select C
9
I~
Motor Enable D
10
Direction (Stepper Motor)
11
Step Pulse
12
Select Head 1
13
Write Enable
14
Track 0
15
Write Protect
16
Read Data
17
Write Data
18
I~
....
...
'
....
""II"
I~
External ""II"
Drives ....
~
.......
I ...
.
....
Ground
6
7
...•
Diskette
Drive
Adapter
5)1,,"
.
--..
.......
po
20·37
2-109
5-1/4" Diskette Drive
The IBM 5-1/4" Diskette Drive is a single sided, double density, 40
track unit. The Diskette Drive has a formatted capacity of 163,840
bytes, and is capable of reading and recording digital data using
Modified Frequency Modulation (MFM) methods. User access for
diskette loading is provided by way of a slot located at the front
of the unit.
The Diskette Drive is fully self-contained and requires no operator
intervention during normal operation. The Drive consists of a spindle
drive system, a head positioning system, and read/write/erase system.
When the front latch is opened, access is provided for the insertion of a
diskette. The diskette is positioned in place by plastic guides, and the
front latch. In/out location is ensured when the diskette is inserted until
a back stop is encountered.
Closing the front latch activates the cone/clamp system resulting in
centering of the diskette and clamping of the diskette to the drive hub.
The drive hub is driven at a constant speed of 300 rpm by a servo
controlled DC motor. In operation, the magnetic head is loaded into
contact with the recording medium whenever the front latch is closed.
The magnetic head is positioned over the desired track by means of a
4-phase stepper motor/band assembly and its associated electronics.
This positioner employs a one-step rotation to cause a I-track linear
movement. When a write-protected diskette is inserted into the Drive,
the write-protect sensor disables the write electronics of the Drive and
an appropriate signal is applied to the interface.
When performing a write operation, a 0.33 mm (O.013-in.) data track
is recorded. This track is then tunnel erased to 0.30 mm (0.012 in.).
Data recovery electronics include a low-level read amplifier, differentiator, zero-crossing detector, and digitizing circuits. All data decoding
is provided by the adapter card.
The Drive is also supplied with the following sensor systems:
(1)
A track 00 switch which senses when the Head/Carriage
assembly is positioned at Track 00.
(2)
The index sensor, which consists of a LED light source and
phototransistor, is positioned such that when an index hole is
detected, a sigital signal is generated.
2-110
(3)
The write-protect sensor disables the Diskette Drive electronics
whenever a write-protect tab is applied to the diskette.
For Interface Information, refer to the Diskette Drive Adapter
section.
Diskettes
The IBM 5-1/4" Diskette Drive uses a standard 133.4 mm (5.25 in.)
diskette. For programming considerations, single sided, double density
soft sectored diskettes are used. The figure below is a simplified
drawing of the diskette used with the Diskette Drive. This recording
medium is a flexible magnetic disk enclosed in a protective jacket. The
protected disk, free to rotate within the jacket, is continuously cleaned
by the soft fabric lining of the jacket during normal operation.
Read/Write erase head access is made through an opening in the jacket.
Openings for the drive hub and diskette index hole are also provided.
3.56 mm
10.140 INCH)
I
m
1
I
ml
--
-- ru-:-
rn
I"
:;.;·::~~H)
I
@
I1
6.30
+
- - ~F 10.25 +
0.25 mm
0.01 INCH)
1
-
k~
~~
or
133.4 mm
15.25]'''",
·1- -
133.4 mm
15.25 INCH)
I"
~~~~~~TIVE~{
JACKET
I -,
/
/' --
·1
----- " "
IOXIOECOATED
MYLAR DISK
(Af5J
/
""\
"''"co
I
U''"~TV) '-3 :~~:~ I
~
'~
O--~~:~TU//
__ /'
RECORDING MEDIUM
2-111
Table 18.
Mechanical and Electrical Specifications
Media
Industry-compatible 5Yo-inch diskette
Tracks per inch
48
Number of Tracks
(40)
Dimensions
Height
Width
Depth
Weight
85.85 mm (3.38 inches)
149.10 mm (5.87 inches)
203.2 mm (8.0 inches)
2.04 Kg (4.5 Ibs.)
Temperature
(Exclusive of Media)
Operating
Non-operating
100e to 44 0e (50 0 F to 112 0 F)
-40 0e to BOoe (-40 0 F to 140 0 F)
Relative Humidity
(Exclusive of Media)
Operating
Non-operating
20% to 80% (Non-condensing)
5% to 95% (Non-condensing)
Seek Time
8 msec track to track
Head Setting Time
25 msec (last track addressed)
Error Rate
1 per 10 9 (recoverable)
1 per 10 12 (non-recoverable)
1 per 10 6 (seeks)
Head Life
20,000 hours (normal use)
Media Life
3.0 x 10 6 passes per track
Disk Speed
300 rpm ± 1.5% (long term)
Instantaneous Speed Variation
±3.0%
Start/Stop Time
500 msec (maximum)
Transfer Rate
250 K bits/sec
Recording Mode
MFM
Power
+12 de ± O.Bv 900 ma AVE.
+5v dc ± 0.25 v, BOO ma AVE.
2-112
Memory Expansion Options
Two Memory Expansion Options offered for the IBM Personal
Computer are the 32K x 9 and the 64K x 9 Memory Expansion
Options. These options plug into any of the five System Expansion slots
on the System Board. These options are used to extend system memory
beyond 64KB. A maximum of 64KB of memory may be installed on
the System Board as modules without using any System Expansion
Slots or Expansion Options.
An expansion option must be configured to reside at sequential 3 2K or
64K memory address boundary within the system address space. This
is done by setting dip switches on the option.
The expansion options are designed with 250 ns access 16K x I
dynamic memory chips. On the 32KB card, 16-pin industry standard
parts are used. On the 64KB card, stacked modules are used resulting
in a 32K x 1I8-pin module. This allows the 32KB and 64KB to have
approximately the same packaging densities.
Both expansion options are parity checked and if a parity error is
detected, a latch is set and an I/O channel check line is activated,
indicating an error to the processor.
In addition to the memory modules, the expansion options contain the
following circuits: bus buffering, dynamic memory timing generation,
address multiplexing, and card select decode logic.
Dynamic memory refresh timing and address generation are functions
which are not performed on the expansion options but are done once on
the System Board and made available in the I/O channel for all devices.
To allow the System to address 32KB and 64KB Memory Expansion
Options, refer to the system configuration switch settings page 2-28.
Operating Characteristics
The System Board operates at a frequency of 4.77 Mhz, which results
in a clock frequency of 210 ns.
Normally, four clock cycles are required for a bus cycle so that an
840 nsec memory cycle time is achieved. Memory write and memory
read cycles both take four clock cycles, or 840 ns.
2-113
General specifications for memory used on both cards are:
Access - 250 ns
Cycle - 410 ns
Memory Module Description
Each option contains 18 dynamic memory modules. The 32KB
Memory Expansion Option utilizes 16K x 1 bit modules and the
64KB Memory Expansion Options utilizes 32K x 1 bit modules.
Both memory modules require three voltage levels (+5Vdc, -5Vdc,
+ 12Vdc) and 128 refresh cycles every 2 msec. Absolute maximum
access times are:
From RAS: 250 ns
From CAS: 165 ns
Table 19.
Memory Module Pin Configuration
PIN
NO.
16K X 1 BIT MODULE
(Used on 32KB Card)
32K X 1 BIT MODULE
(Used on 64KB Card)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
- 5V
Data In **
- Write
- RAS
AO
A2
A1
+12V
+5V
A5
- 5V
Data In **
- Write
- RASO
- RAS 1
AO
A2
A1
+12V
+5V
A5
A4
A3
A6
Data Out **
- CAS
GNO
-
*
- *
A4
A3
A6
Data Out **
- CAS 1
- CASO
GNO
* 16K X 1 bit module has only 16 pins.
** Data In and Data Out are tied together (three state bus).
2-114
Switch - Configurable Start Address
Each card has a small DIP Module which contains eight switches. The
switches are used to set the card start address as follows:
Table 20. DIP Module Start Address
NO.
1
2
3
4
5
6
7
8
DESCRIPTION
ON: A19=Q; OFF: A19=1
ON: A18=Q; OFF: A18=1
ON: A17=Q; OFF: A17=l
ON: A16=Q; OFF: A16=1
ON: A15=Q; OFF: A15=1 *
Not Used
Not Used
Used Only In 64KB RAM Card *
* Switch No.8 may be set on the 64KB Memory Expansion Option to use only half the
memory on the card {i.e., 32KBI. If Switch No.8 is ON, all 64KB is accessible. If Switch
No.8is OFF,address bitA15 (asset by Switch No.5) is used to determine which 32KB
are accessible and the 64KB option behaves exactly like a 32KB option.
2-115
NOTES
2-116
Game Control Adapter
The Game Control Adapter allows the system to attach paddles and
joysticks. Up to four paddles or two joysticks may be attached. In
addition, four input for switches are provided. Paddle and joystick
positions are determined by changing resistive values sent to the
adapter. The adapter plus system software converts the present
resistive value to a relative paddle or joystick position. On receipt of an
output signal, four timing circuits are started. By determining the time
required for the circuit to time out (a function of the resistance), the
paddle position can be determined. This card could be used as a general
purpose I/O card with four analog (resistive) inputs plus four digital
input points. This card fits into any of the five System Board I/O slots.
The game control interface cable attaches to the rear of the card which
protrudes through the rear panel of the System Unit.
Game Control Adapter Block Diagram
A9 - AD
I
10
.JI..
..
AEN
p
.....
..
lOW
lOR
•
...)
p
!---
p
...
8
DATA BUS
BUFFER!
DRIVER
,
A
RESISTIVE INPUT
I
4
"
-
....-
07-00
A
CONVERT
RESISTANCE
TO
DIGITAL
PULSE
INSTRUCTION
DECODE
TYPICAL FREQUENCY
OF 833 H~
A
(
4
"
,
DIGITAL INPUTS
.of
~
4
"
I
Figure 20. GAME CONTROL ADAPTER BLOCK DIAGRAM
2-117
Functional Description
Address Decode
The select on the Game Control Adapter is generated by two
74LS138's as an address decoder. AEN must be inactive while the
address is 201 in order to generate the select. The select allows a write
to fire the one-shots or a read to give the values ofthe trigger buttons and
one-shot outputs.
Data Bus Buffer/Driver
The data bus is buffered by a 74LS244 buffer/driver. For an IN from
address X'20 1" the Game Control Adapter will drive the data bus; at
all other times the buffer is left in the high impedance state.
Trigger Buttons
The trigger button inputs are read via an IN from address X'201'. A
trigger button is on each joystick/paddle. These values are seen on
data bits 7 through 4 (see Software Interface sub-section). These
buttons default to an open state and are read as "1". When a button is
depressed, it is read as "0". Software should be aware that these
buttons are NOT debounced in hardware.
Joystick Positions
The joystick position is indicated by a potentiometer for each
coordinate. Each potentiometer has a range from 0 to 100 K ohms that
varies the time constant for each of the four one-shots. As this time
constant is set at different values, the output of the one-shot will be of
varying durations.
All four one-shots are fired at once by an OUT to address X'20 1'. All
four one-shot outputs will go true after the fire pulse and will remain
high for varying times depending on where each potentiometer is set.
These four one-shot outputs are read via an IN from address X'201'
and are seen on data bits 3 through O.
2~118
I/O Channel Description
A9-AO:
Address lines 9 through 0 are used to
address the Game Control Adapter.
D7-DO:
Data lines 7 through 0 are the data bus.
lOR, lOW:
I/O Read and I/O Write are used when reading from or writing to an adapter (IN, OUT).
AEN:
When active, the adapter must be inactive
and the data bus driver inactive.
+SV:
Power for the Game Control Adapter.
GND:
Common ground.
AI9-AlO:
Unused
MEMR,MEMW:
Unused
DACKO-DACK3:
Unused
IRQ7-IRQ2
Unused
DRQ3-DRQI:
Unused
ALE, TIC:
Unused
CLK,OSC:
Unused
I/O CHCK:
Unused
I/O CHRDY:
Unused
HRQ I/O CH:
Unused
RESETDRV:
Unused
-Sv, +12v, -12v:
Unused
Interface Description
The Game Control Adapter has 8 input lines, 4 of which are digital
inputs and 4 of which are resistive inputs. The inputs are read with one
IN from address x'20 I '.
The 4 digital inputs each have a IK ohm pullup resistor to +SV. With
no drive on these inputs, a 'I' is read. For a '0' reading, the inputs must
be pulled to ground.
The 4 resistive inputs, measured to +SV, will be converted to a digital
pulse with a duration proportional to the resistive load, acccording to
the following equation:
Time = 24.2 J.Lsec + 0.011 (r) J.Lsec
2-119
The user must first begin the conversion by an OUT to address x'20 I'.
An IN from address x'201' will show the digital pulse go high and
remain high for the duration according to the resistance value. All four
bits (Bit 3-Bit 0) function in the same manner, their digital pulse will all
go high simultaneously and will reset independently according to the
input resistance value.
Input from address x'201'
Bit 7
,
Bit 6
I
---
Bit 5
Bit 4
Bit 3
,
J
Bit 2
--
Bit 1
Bit 0
I
Resistive Inputs
Digital Inputs
The typical input to the Game Control Adapter is a set of joysticks or
game paddles.
The joysticks will typically have a set of two joysticks (A&B). These
will have one or two buttons each with two variable resistances each,
with a range from 0 to 100 K ohms. One variable resistance will
indicate the X coordinate and the other variable resistance will indicate
the Y coordinate. This should be attached to give the following
input data:
Bit 7
Bit 6
Bit 5
Bit4
Bit 3
Bit 2
Bit 1
Bit 0
B·#l
Button
B-#l
Button
A·#2
Button
A·#l
Button
B·Y
Coord.
B·X
Coord.
A·Y
Coord.
A·X
Coord.
The game paddles will have a set of two (A&B) or four (A,B,C, & D)
paddles. These will have one button each and one variable resistance
each, with a range from 0 to lOOK ohms. This should be attached to
give the following input data:
Bit 7
Bit 6
Bit 5
Bit4
Bit3
Bit 2
Bit 1
Bit 0
D
C
B
A
0
C
B
A
Button
Button
Button
Button
Coord.
Coord.
Coord.
Coord.
A schematic diagram for attaching a set of game controllers is on
page 2-121.
2-120
~
15 PIN MALE '0' SHELL
o
_.
"<
~
JOYSTICK B
~------------,
I
I
I
I
I
I
I
/--
i:~
,
:'"
I
I •
I
I
I 13
I
I
II 14
•
I
I
IL _____________ I
I
:
I
I
:
I
I
I
----
I
I
I
/
NOTE: POTENTIOMETER FOR X & Y COORDINATES HAS A RANGE OF 0 TO 100KS1.
BUTTON IS NORMALL V OPEN; CLOSED WHEN DEPRESSED.
I
N
Figure 21. JOYSTICK SCHEMATIC
311VMOIIVH
~
CI:I
~
::r
(1)
3
""
_.
~
~
~
I
I
IL _____________ ...J
I
-/
I
~
Y COORDINATE
I
I
I
X COORDINATE
L- BUTTON ~
! ['
7
• I
8
• II
......
J
!
I
I •
1 15
I
I
I
5
•
6
•
--
--
I
!
J"
N
I
I
3
I
I 12
Y COORDINATE
..
r-------------~
9 .
I •
BUTT~J
:
~
JOYSTICK A
•
2
I
X COORDINATE
""
CONNECTOR
_-.....
--1 \
Game Controller Adapter (Analog Input)
Connector Specifications
REAR PANEL
15 PIN "0" SHEll
CONNECTOR
0
·
_·C-6
~
0
1
• •
• •
•
•
•
•
•
•
0~
•
•
•
••
9
15
0
AT STANDARD TTL LEVELS
Voltage
AMP
Pin No.
.........
External
Devices
.........
.....
....
~
....
2-122
+ 5 Volts
1
Button 4
2
Position 0
3
Ground
4
Ground
5
Position 1
6
Button 5
7
+ 5 Volts
8
+ 5 Volts
Button 6
9
Position 2
11
Ground
12
Position 3
13
Button 7
14
+ 5 Volts
15
10
......
.....
..
.......
..........
..
.....
---..
...
Game Control
Adapter
Asynchronous Communications Adapter
The Asynchronous Communications Adapter is a 4"H x 5"W card
that plugs into a System Expansion Slot. All system control signals and
voltage requirements are provided through a 2 x 31 position card edge
tab. Ajumper module is provided to select either RS-232-C or current
loop operation.
The adapter is fully programmable and supports asynchronous
communications only. It will add and remove start bits, stop bits, and
parity bits. A programmable baud rate generator allows operation from
50 baud to 9600 baud. Five, six, seven or eight bit characters with 1,
1-1/2, or 2 stop bits are supported. A fully prioritized interrupt system
controls transmit, receive, error, line status and data set interrupts.
Diagnostic capabilities provide loopback functions oftransmitlreceive
and input/output signals.
Figure (22) is a block diagram of the Asynchronous Communications
Adapter.
The heart of the adapter is a INS8250 LSI chip or functional equivalent. The following is a summary of the 8250's key features:
• Adds or Delete Standard Asynchronous Communication Bits
(Start, Stop, and Parity) to or from Serial Data Stream.
• Full Double Buffering Eliminates Need for Precise
Synchronization.
• Independently Controlled Transmit, Receive, Line Status, and
Data Set Interrupts.
• Programmable Baud Rate Generator Allows Division of Any
Input Clock by 1 to (2 16-1) and Generates the Intemal16x Clock.
• Independent Receiver Clock Input.
• MODEM Control Functions Clear to Send (CTS), Request to
Send (RTS), Data Set Ready (DSR), Data Terminal Ready
(DTR), Ring Indicator (RI), and Carrier Detect.
• Fully Programmable Serial-Interface Characteristics
5-, 6-, 7-, or 8-Bit Characters
Even, Odd, or No-Parity Bit Generation and Detection
1-, 1 1/2-, or 2-Stop Bit Generation
Baud Rate Generation (DC to 9600 Baud)
2-123
• False Start Bit Detection.
• Complete Status Reporting Capabilities.
• Line Break Generation and Detection.
• Internal Diagnostic Capabilities.
Loopback Controls for Communications Link Fault
Isolation.
Break, Parity, Overrun, Framing Error Simulation.
• Full Prioritized Interrupt System Controls.
All communications protocol is a function of the system microcode
and must be loaded before the adapter is operational. All pacing ofthe
interface and control signal status must be handled by the system
software.
Asynchronous Communications Block Diagram
ADDRESS BUSS
CHIP SELECT
ADDRESS
DECODE
DATA BUS
INTERRUPT
8250
ASYNCHRONOUS
COMMUNICATIONS
ELEMENT
OSCILLATOR
1.8432 Mhz
EIA
RECEIVERS
..
~
EIA
ORIVERS
A
-1
CURRENT LOOP
A
L
J
f-
...
25 PIN
"O"SHELLCONNECTOR
Figure 22. ASYNCHRONOUS COMMUNICATIONS ADAPTER
BLOCK DIAGRAM
2-124
Modes of Operation
The different modes of operation are selected by programming the
8250 Asynchronous Communications Element. This is done by
selecting the I/O address (3F8 to 3FF) and writing data outtothe card.
Address bit AO, Al and A2 select the different registers which define
the modes of operation. Also, the Divisor Latch Access Bit (Bit 7) of
the line control register is used to select certain registers.
I/O Decode for Communications Adapter
Table 21. I/O Decodes (3F8 to 3FF)
I/O
DECODE
REGISTER SELECTED
DLABSTATE
3F8
3F8
3F8
3F9
3F9
TX BUFFER
RX BUFFER
DIVISOR LATCH LSB
DIVISOR LATCH MSB
INTERRUPT ENABLE REGISTER
DLAB=O
DLAB=O
DLAB=l
DLAB=l
DLAB=O
3FA
INTERRUPT IDENTIFICATION
REGISTERS
3FB
LINE CONTROL REGISTER
3FC
MODEM CONTROL REGISTER
3FD
LINE STATUS REGISTER
3FE
MODEM STATUS REGISTER
(WRITE)
(READ)
ADDRESS BITS
3F8 to 3FF
A9
1
A8
1
A7
1
A6
1
A1
A5
A4
A3
A2
1
1
1
X
X
X
0
0
0
0
0
0
0
0
1
0
1
0
1
1
1
1
1
1
0
0
0
1
1
0
0
0
0
0
1
X
X
X
X
X
X
1
0
AD
1
1
DLAB
1
REGISTER
Receive Buffer
(read), Transmit
Holding Reg.
(write)
Interrupt Enable
Interrupt Identification
Line Control
Modem Control
Line Status
Modem Status
None
Divisor Latch (LSB)
Divisor latch (MSB)
A2, Al and AO bits are "Don't Cares" and are used to select the
different register of the communications chip.
2-125
Interrupts
One interrupt line is provided to the system. This interrupt is IRQ4 and
will be positive active. To allow the communications card to send
interrupts to the system, Bit 3 of the Modem Control Register must be
set = 0 (low). At this point, any interrupts allowed by the Interrupt
Enable Register will cause an interrupt.
The data format will be as follows:
TRANSMITTER OUTPUT AND RECEIVER INPUT
00
01
02
03
04
05
06
07
Transmit
Oata Marking
Data Bit 0 is the first bit to be transmitted or received. The adapter
automatically inserts the start bit, the correct parity bit if programmed
to do so, and the stop bit (1, 1-1/2 or 2 depending on the command in
the Line Control Register).
Interface Description
The communications adapter provides an EIA RS-232-C like interface. One 25 pin "D" shell, male type connector is provided to attach
various peripheral devices. In addition, a current loop interface is also
located in this same connector. Ajumper block is provided to manually
select either the voltage interface, or the current loop interface.
The current loop interface is provided to attach certain printers
provided by IBM Corporation that use this particular type of interface.
Pin
Pin
Pin
Pin
18 + receive current loop data (20Ma)
25 - receive current loop return (20Ma)
9 + transmit current loop return (20Ma)
11 - transmit current loop data (20Ma)
2-126
+5V
I
TRANSMIT CIRCUIT
I
~o~~
~
4990
:.PIN9
Tx DATA ---~~VV'l.""-- - - - - - - - -.- . PIN 11
+5V
RECEIVE CIRCUIT
5.6Krl
OPTO ISOLATOR
--+-....,
: : 0 - - - Rx DATA
PIN 18 ....
PIN 25 4 - - - t - - '
+5V
Figure 23. CURRENT LOOP INTERFACE
The voltage interface is a serial interface. It supports certain data and
control signals as listed below.
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
2
3
4
5
6
7
8
20
22
Transmit Data
Receive Data
Request to Send
Clear to Send
Data Set Ready
Signal Ground
Carrier Detect
Data Terminal Ready
Ring Indicate
The adapter converts these signals to/from TTL levels to EIA voltage
levels. These signals are sampled or generated by the communication
control chip. These signals can then be sensed by the system software
to determine the state of the interface or peripheral device.
2-127
Voltage Interchange Information
Interchange Voltage
Binary State
Signal Condition
Positive Voltage =
Binary (0)
Negative Voltage =
Binary (1)
=Spacing
= Marking
Interface
Control Function
=On
=Off
Invalid Levels
+15V----------On Function
+3V - - - - - - - - - - 0\1
Invalid Levels
-3V - - - - - - - - - - Off Function
-15V----------Invalid Levels
The signal will be considered in the "marking" condition when the
voltage on the interchange circuit, measured at the interface point, is
more negative than minus three volts with respect to signal ground. The
signal will be considered in the "spacing" condition when the voltage is
more positive than plus three volts with respect to signal ground. The
region between plus three volts and minus three volts is defined as the
transition region, will be considered in invalid levels. The voltage which
is more negative than -15V or more positive than +15V will be
considered in invalid levels.
During the transmission of data, the "marking" condition will be used
to denote the binary state "one" and "spacing" condition will be used to
denote the binary state "zero".
For interface control circuits, the function is "on" when the voltage
is more positive than +3V with respect to signal ground and is "off"
when the voltage is more negative than -3V with respect to signal
ground.
2-128
INS8250 Functional Pin Description
The following describes the function of all INS8250 input/output pins.
Some of these descriptions reference internal circuits.
Note: In the following descriptions, a low represents a logic 0 (0 volt
nominal) and a high represents a logic I (+2.4 volts nominal).
Input Signals
Chip Select (SCO, CSt, CS2), Pins 12-14: When CSO and CSI are high
and CS2 is low, the chip is selected. Chip selection is complete when
the decoded chip select signal is latched with an active (low) Address
Strobe (ADS) input. This enable comunication between the INS8250
and the CPU.
Data Input Strobe (DISTRDISTR) Pins 22 and 21: When DISTR is
high or DISTRis low while the chip is selected, allows the CPU to read
status information or data from a selected register of the INS8250.
Note: Only an active DISTR or DISTR input is required to transfer
data from the INS8250 during a read operation. Therefore, tie either
the DISTR input permanently low or the DISTR input permanently
high, if not used.
Data Output Strobe (DOSTR, DOSTR), Pins 19 and 18: When
DOSTR is high or DOSTR is low while the chip is selected, allows the
CPU to write data or control words into a selected register of the
INS8250.
Note: Only an active DOSTR or DOSTR input is required to transfer
data to the INS8250 during a write operation. Therefore, tie either the
D PSTR input permanently low or the DOS TR input permanently high,
if not used.
Address Strobe (ADS), Pin 25: When low, provides latching for the
Register Select (AO, AI, A2) and Chip Select (SOC, CSI, CS2)
signals.
Note: An active ADS input is required when the Register Select
(AO, AI, A2) signals are not stable for the duration of a read or write
operation. If not required, the ADS input permanently low.
2-129
Register Select (AO, AI, A2), Pins 26-28: These three inputs are used
during a read or write operation to select an INS8250 register to read
from or write into as indicated in the table below. Note that the state of
the Divisor Latch Access Bit (DLAB), which is the most significant bit
of the Line Control Register, affects the selection of certain INS8250
registers. The DLAB must be set high by the system software to access
the Baud Generator Divisor Latches.
DLAB
A2
Al
AD
0
0
0
0
Receiver Buffer (read), Transmitter Holding
Register (write)
0
0
0
1
Interrupt Enable
X
0
1
0
Interrupt Identification (read only)
X
0
1
1
Line Control
Register
X
1
0
0
MODEM Control
X
1
0
1
Line Status
X
1
1
0
MODEM Status
X
1
1
1
None
1
0
0
0
Divisor Latch (least significant byte)
1
0
0
1
Divisor Latch (most significant byte)
Master Reset (MR), Pin 35: When high, clears all the registers
(except the Receiver Buffer, Transmitter Holding, and Divisor
Latches), and the control logic of the INS8250. Also, the state of
various output signals (SOUT, INTRPT, OUT 1, OUT 2, RTS,
DTR) are affected by an active MR input. (Refer to Table 1.)
Receiver Clock (RCLK), Pin 9: This input is the 16x baud rate
clock for the receiver section of the chip.
Serial Input (SIN), Pin 10: Serial data input from the communications link (peripheral device, MODEM, or data set).
Clear to Send (CTS), Pin 36: The CTS signal is a MODEM control
function input whose condition can be tested by the CPU by reading
Bit 4 (CTS) of the MODEM Status Register. Bit 0 (DCTS) of the
MODEM Status Register indicates whether the CTS input has
changed state since the previous reading of the MODEM Status
Register.
Note: Whenever the CTS bit of the MODEM Status Register changes
state, an interrupt is generated if the MODEM Status Interrupt
is enabled.
2-130
Data Set Ready (DSR), Pin 37: When low, indicates that the
MODEM or data set is ready to establish the communications link and
transfer data with the INS8250. The DSR signal is a MODEM-control
function input whose condition can be tested by the CPU by reading Bit
5 (DSR) of the MODEM Status Register. Bit I (DDSR) of the
MODEM Status Register indicates whether the DSR input has
changed state since the previous reading of the MODEM Status
Register.
~
Whenever the DSR bit ofthe MODEM Status Register changes
state, an interrupt is generated if the MODEM Status Interrupt
is enabled.
Received Line Signal Detect (RLSD), Pin 38: When low, indicates
that the data carrier has been detected by the MODEM or data set.
The RLSD signal is a MODEM-Control function input whose
condition can be tested by the CPU by reading Bit 7 (RLSD) of the
MODEM Status Register. Bit 3 (DRLSD) of the MODEM Status
Register indicates whether the RLSD input has changed state since the
previous reading of the MODEM Status Register.
Note: Whenever the RLSD bit of the MODEM Status Register
changes state, an interrupt is generated if the MODEM Status Interrupt
is enabled.
Ring Indicator (RI), Pin 39: When low, indicates that a telephone
ringing signal has been received by the MODEM or data set. The Rl
signal is a MODEM-control function input whose condition can be
tested by the CPU by reading Bit 6 (Rl) of the MODEM Status
Register. Bit 2 (TERl) of the MODEM Status Register indicates
whether the Rl input has changed from a low to a high state since the
previous reading of the MODEM Status Register.
Note: Whenever the Rl bit of the MODEM Status Register changes
from a high to a low state, an interrupt is generated if the MODEM
Status Interrupt is enabled.
VCC, Pin 40: +5 volt supply.
VSS, Pin 20: Ground (O-volt) reference.
2-131
Output Signals
Data Terminal Ready (DTR), Pin 33: When low, informs the
MODEM or data set that the INS8250 is ready to communicate. The
DTR output signal can be set to an active low by programming Bit 0
(DTR) of the MODEM Control Register to a high level. The DTR
signal is set high upon a Master Reset operation.
Request to Send(RTS), Pin 32: When low, informs the MODEM or
data set that the INS8250 is ready to transmit data. the RTS output
signal can be set to an active low by programming Bit 1 (RTS) of the
MODEM Control Register. The RTS signal is set high upon a Master
Reset operation.
Output 1 (OUT 1), Pin 34: User-designated output that can be set to
an active low by programming Bit 2 (OUT 1) ofthe MODEM Control
Register to a high level. The OUT 1 signal is set high upon a Master
Reset operation.
Output 2 (OUT 2), Pin 31: User-designated output that can be set
to an active low by programming Bit 3 (OUT 2) of the MODEM
Control Register to a high level. The OUT 2 signal is set high upon a
Master Reset operation.
Chip Select Out (CSOUT), Pin 24: When high, indicates that the
chip has been selected by active CSO, CS1, and CS2 inputs. No data
transfer can be initiated until the CSOUT signal is a logic 1.
Driver Disable (DDIS), Pin 23: Goes low whenever the CPU is
reading data from the INS8250. A high-level DDIS output can be
used to disable an external transceiver (if used between the CPU and
INS8250 on the D7-DO Data Bus) at all times, except when the CPU
is reading data.
Baud Out (BAUDOUT), Pin 15: 16x clock signal for the transmitter
section of the INS8250. The clock rate is equal to the main reference
oscillator frequency divided by the specified divisor in the Baud
Generator Divisor Latches. The BAUD OUT may also be used for the
receiver section by typing this output to the RCLK input of the chip.
Interrupt (INTRPT), Pin 30: Goes high whenever anyone of the
following interrupt types has an active high condition and is enabled via
the IER: Receiver Error Flag; Received Data Available; Transmitter
Holding Register Empty; and MODEM Status. The INTRPT Signal is
reset low upon the appropriate interrupt service or a Master Reset
operation.
Serial Output (SO UT), Pin 11: Composite serial data output to the
communications link (peripheral, MODEM or data set). The SOUT
signal is set to the Marking (Logic 1) state upon a Master Reset
operation.
2-132
Input/Output Signals
Data (07-00) Bus, Pins 1-8: This bus comprises eight TRI-STATE
input/output lines. The bus provides bidirectional communications
between the INS8250 and the CPU. Data, control words, and status
information are transferred via the 07-00 Data Bus.
External Clock Input/Output (XTAL1, XTAL2, Pins 16 and 17:
These two pins connect the main timing reference (crystal or signal
clock) to the INS8250.
Programming Considerations
Table 22. Asynchronous Communications Reset Functions
Register/Signal
Reset Control
Reset State
Interrupt Enable Register
Master Reset
All Bits Low
(0-3 Forced and 4-7
Permanent)
Interrupt Identification
Register
Master Reset
Bit 0 is High,
Bits 1 and 2 Low
Bits 3-7 are
Permanently Low
Line Control Register
Master Reset
All Bits Low
MODEM Control Register
Master Reset
All Bits Low
Line Status Register
Master Reset
Except Bits 5 & 6 are High
MODEM Status Register
Master Reset
SOUT
INTRPT (RCVR Errs)
Master Reset
Bits 0-3 Low
Bits 4-7 - Input Signal
High
Read LSR/MR
Low
INTRPT (RCVR Data
Ready)
Read RBR/MR
Low
INTRPT (RCVR Data
Ready)
Read II RlWrite
THR/MR
Low
INTRPT (MODEM
Status Changes)
Read MSR/MR
Low
OUT2
Master Reset
High
RTS
Master Reset
High
DTR
Master Reset
High
OUT 1
Master Reset
High
2-133
INS8250 Accessible Registers
The system programmer may access or control any of the INS8250
registers via the CPU. These registers are used to control INS8250
operations and to transmit and receive data.
INS8250 Line Control Register
The system programmer specifies the format of the asynchronous data
communications exchange via the Line Control Register. In addition to
controlling the format, the programmer may retrieve the contents of the
Line Control Register for inspection. This feature simplifies system
programming and eliminates the need for separate storage in system
memory of the line characteristics. The contents of the Line Control
Register are indicated and described below.
Line Control Register (LCR)
3FB
BIT
7 6 5 4 3 2 1 0
I I I :wmd l ..gth
S,I,,, Bit 0 (WlSOI
Word Length Select Bit 1 (W LS1)
Number of Stop Bits (STB)
'------I~
Parity Enable (PEN)
'-------i~ Even
Parity Select (EPS)
L--------I.Stick Parity
L-_ _ _ _ _ _ _ Set Break
~
'-----------I~
Divisor Latch Access Bit (D LAB)
Bit 0 and 1: These two bits specify the number of bits in each
transmitted or received serial character. The encoding of bits 0 and 1
is as follows:
Bit 1
Bit 0
Word Length
0
0
0
1
1
0
5 Bits
6 Bits
7 Bits
8 Bits
1
1
Bit 2: This bit specifies the number of Stop bits in each transmitted or
received serial character. If bit 2 is a logic 0, 1 Stop bit is generated or
checked in the transmit or receive data, respectively. If bit 2 is logic 1
when a 5-bit word length is selected via bits 0 and 1, 1-1/2 Stop bits are
generated or checked. Ifbit 2 is logic 1 when either a 6-, 7-, or 8-bit word
length is selected, 2 Stop bits are generated or checked.
2-134
Bit 3: This bit is the Parity Enable bit. When bit 3 is a logic 1, a Parity
bit is generated (transmit data) or checked (receive data) between the
last data word bit and Stop bit of the serial data. (The Parity bit is used
to produce an even or odd number of 1's when the data word bits and the
Parity bit are summed.)
Bit 4: This bit is the Even Parity Select bit. When bit 3 is a logic 1 and
bit 4 is a logic 0, an odd number oflogic 1's is transmitted or checked in
the data word bits and Parity bit. When bit 3 is a logic 1 and bit 4 is a
logic 1, an even number of bits is transmitted or checked.
Bit 5: This bit is the Stick Parity bit. When bit 3 is a logic 1 and bit 5 is a
logic 1, the Parity bit is transmitted and then detected by the receiver as
a logic 0 if bit 4 is a logic 1 or as a logic 1 if bit 4 is a logic O.
Bit 6: This bit is the Set Break Control bit. When bit 6 is a logic 1, the
serial output (SOUT) is forced to the Spacing (logic 0) state and
remains there regardless of other transmitter activity. The set break is
disabled by setting bit 6 to a logic O. This feature enables the CPU to
alert a terminal in a computer communications system.
Bit 7:This bit is the Divisor Latch Access Bit (DLAB). It must be set
high (logic 1) to access the Divisor Latches of the Baud Rate Generator
during a Read or Write operation. It must be set low (logic 0) to access
the Receiver Buffer, the Transmitter Holding Register, or the Interrupt
Enable Register.
INS8250 Programmable Baud Rate Generator
The INS8250 contains a programmable Baud Rate Generator that is
capable of taking the clock input (1.8432 MHz) and dividing it by any
divisor from 1 to (2 16 -1). The output frequency of the Baud Generator
is 16x the Baud rate [divisor =/1== ( frequency input) / (baud rate x 16)].
Two 8-bit latches store the divisor in a 16-bit binary format. These
Divisor Latches must be loaded during initialization in order to ensure
desired operation of the Baud Rate Generator. Upon loading either of
the Divisor Latches, a 16-bit Baud counter is immediately loaded. This
prevents long counts on initial load.
2-135
Divisor Latch
3F8
DLAB=l
BIT
7
6
Least Significant Bit (DLL)
5
4
3
2
BIT 0
BIT 1
BIT 2
BIT 3
BIT4
L...-_ _ _ _ _ _ _ _ _ _ _ _ _ _ BIT 5
BIT 6
BIT 7
Divisor Latch
3F9
DLAB=l
BIT
7
6
Most Significant Bit (DLM)
5
4
3
2
1
0
I
L.
BIT8
~BIT9
L...-_ _ _ _--I. BIT 10
L...-_ _ _ _ _ _ _. . BIT 11
L...-_ _ _ _ _ _ _ _--I.
BIT 12
L . . . - - - - - - - - - - - - _ _ a BIT 13
' - - - - - - - - - - - - - - -__ BIT 14
' - - - - - - - - - - - - - - - - - - - 1 . BIT 15
Table 23 illustrates the use of the Baud Rate Generator with a
frequency of 1.8432 Mhz. For baud rates of 9600 and below, the error
obtained is minimal.
Note: The maximum operating frequency of the Baud Generator is
3.1 Mhz. In no case should the data rate be greater than 9600 Baud.
2-136
Table 23. BAUD RATE AT 1.843 Mhz
Desired
Baud
Rate
Divisor Used
to Generate
16x Clock
Decimal
2304
1536
1047
857
768
384
192
96
64
58
48
32
24
16
12
50
75
110
134.5
150
300
600
1200
1800
2000
2400
3600
4800
7200
9600
Hex
'900'
'600'
'417'
'359'
'300'
'180'
'OCO'
'060'
'040'
'03A'
'030'
'020'
'018'
Perce nt Erro r
Difference Between
Desired & Actual
---
0.026
0.058
------
0.69
--
-----
'OW'
'OOC'
Line Status Register
This 8-bit register provides status information to the CPU concerning
the data transfer. The contents of the Line Status Register are indicated
and described below.
Line Status Register (LSR)
3FD
BIT
7
6
5
4
3
210
Il~
DATA READY (DR)
OVERRUN ERROR (OR)
PARITY ERROR (PE)
FRAMING ERROR (FE)
' - - - - - - - - - - _ _ . BREAK INTERRUPT (BI)
TRANSMITTER HOLDING
REGISTER EMPTY (THRE)
TX SHIFT REGISTER
EMPTY (TSRE)
=0
2-137
Bit 0: This bit is the receiver Data Ready (DR) indicator. BitO is set to a
logic 1 whenever a complete incoming character has been received and
transferred into the Receiver Buffer Register. Bit 0 may be reset to a
logic 0 either by the CPU reading the data in the Receiver Buffer
Register or by writing a logic 0 into it from the CPU.
Bit 1: This bit is the Overrun Error (OE) indicator. Bit 1 indicates that
data in the Receiver Buffer Register was not read by the CPU before the
next character was transferred into the Receiver Buffer Register,
thereby destroying the previous character. The OE indicator is reset
whenever the CPU reads the contents of the Line Status Register.
Bit 2: This bit is the Parity Error (PE) indicator. Bit 2 indicates that
the received data character does not have the correct even or odd parity,
as selected by the even parity-select bit. the PE bit is set to a logic 1
upon detection of a parity error and is reset to a logic 0 whenever the
CPU reads the contents of the Line Status Register.
Bit 3:This bit is the Framing Error (FE) indicator. Bit 3 indicates that
the received character did not have a valid Stop bit. Bit 3 is set to a logic
1 whenever the Stop bit following the last data bit or parity bit is
detected as a zero bit (Spacing level).
Bit 4: This bit is the Break Interrupt (BI) indicator. Bit 4 is set to a logic
1 whenever the received data input is held in the Spacing (logic 0) state
for longer than a full word transmission time (that is, the total time of
Start bit + data bits + Parity + Stop bits).
Note: Bits 1 through 4 are the error conditions that produce a Receiver
Line Status interrupt whenever any of the corresponding conditions
are detected.
Bit 5: This bit is the Transmitter Holding Register Empty (THRE)
indicator. Bit 5 indicates that the INS8250 is ready to accept a new
character for transmission. In addition, this bit causes the INS8250 to
issue an interrupt to the CPU when the Transmit Holding Register
Empty Interrupt enable is set high. The THRE bit is set to a logic 1
when a character is transferred from the Transmitter Holding Register
into the Transmitter Shift Register. The bit is reset to logic 0
concurrently with the loading of the Transmitter Holding Register by
the CPU.
Bit 6: This bit is the Transmitter Shift Register Empty (TSRE)
indicator. Bit 6 is set to a logic 1 whenever the Transmitter Shift
Register is idle. It is reset to logic 0 upon a data transfer from the
Tranmitter Holding Register to the Transmitter Shift Register. Bit 6
is a read-only bit.
Bit 7: This bit is permanently set to logic O.
2-138
Interrupt Identification Register
The INS8250 has an on-chip interrupt capability that allows for
complete flexibility in interfacing to all the popular microprocessors
presently available. In order to provide minimum software overhead
during data character transfers, the INS8250 prioritizes interrupts into
four levels. The four levels of interrupt conditions are as follows:
Receiver Line Status (priority 1); Received Data Ready (priority 2);
Transmitter Holding Register Empty (priority 3); and MODEM
Status (priority 4).
Information indicating that a prioritized interrupt is pending and the
type of that interrupt are stored in the Interrupt Identification Register
(refer to Table 5). The Interrupt Identification Register (IIR), when
addressed during chip-select time, freezes the highest priority interrupt
pending and no other interrupts are acknowledged until that particular
interrupt is serviced by the CPU. The contents of the IIR are indicated
and described below.
Interrupt Identification Register (IIR)
3FA
BIT
7
6
5
4
I
3
I
2
I
.
1
I
1_:
0
~~-
OIF INTERRUPT PEND'"
INTERRUPTIDBIT(O)
INTERRUPT 10 BIT (1)
'---------. =0
L -_ _ _ _ _ _ _ _. .
L -_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
~
'---------------------~
L -_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
~
=0
=0
=0
=0
Bit 0: This bit can be used in either a hardwired prioritized or polled
environment to indicate whether an interrupt is pending. When bit 0 is a
logic 0, an interrupt is pending and the IIR contents may be used as a
pointer to the appropriate interrupt service routine. When bitO is a logic
1, no interrupt is pending and polling (if used) continued.
Bits 1 and 2: These two bits of the IIR are used to identify the highest
priority interrupt pending as indicated in Table 5.
Bits 3 through 7:These five bits of the IIR are always logic O.
2-139
Table 24. Interrupt Control Functions
Interrupt 10
Register
Interrupt Set and Reset Functions
Bit 2
Bit 1
Bit 0
Priority
level
0
0
1
-
Interrupt
Type
Interrupt
Source
None
None
1
1
0
Highest
Receiver
Line Status
1
0
0
Second
Received
Data Available
0
0
2-140
1
0
0
0
Third
Fourth
Transmitter
Holding Register Empty
MODEM Status
Overrun Error
or
Parity Error
or
Framing Error
or
Break Interrupt
Receiver
Data Available
Transmitter
Holding Register Empty
Clear to Send
or
Data Set Ready
or
Ring Indicator
or
Received Line
Signal Detect
Interrupt
Reset Control
-
Reading the
Line Status
Register
Reading the
Receiver
Buffer
Register
Reading the
II R Register
lif source of
interrupt)
or
Writing into
the Transmitter Holding Register
Reading the
MODEM Status
Register
Interrupt Enable Register
This 8-bit register enables the four types of interrupt of the INS8250
to separately activate the chip Interrupt (INTRPT) output signal. It is
possible to totally disable the interrupt system by resetting bits 0
through 3 of the Interrupt Enable Register. Similarly, by setting the
appropriate bits of this register to a logic 1, selected interrupts can be
enabled. Disabling the interrupt system inhibits the Interrupt Identification Register and the active (high) INTRPT output from the chip.
All other system functions operate in their normal manner, including
the setting of the Line Status and MODEM Status Registers. The
contents of the Interrupt Enable Register are indicated and
described below.
Interrupt Enable Register (IER)
3F9
BIT
DLAB=O
7
6
5
4
3
2
1
0
L:
L -_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _• •
1= ENABLE DATA
AVAILABLE INTERRUPT
l=ENABLE TX HOLDING REG
EMPTY INTERRUPT
1= ENABLE RECEIVE LINE
STATUS INTERRUPT
l=ENABLE MOOEM STATUS
INTERRUPT
=0
=0
=0
=0
Bit 0: This bit enables the Received Data Available Interrupt when set
to logic 1.
Bit 1: This bit enables the Transmitter Holding Register Empty
Interrupt when set to logic 1.
Bit 2: This bit enables the Receiver Line Status Interrupt when set to
logic 1.
Bit 3: This bit enables the MODEM Status Interrupt when set to
logic 1.
Bits 4 through 7: These four bits are alway logic O.
2-141
MODEM Control Register
This 8-bit register controls the interface with the MODEM or data set
(or a peripheral device emulating a MODEM). The contents of the
MODEM Control Register are indicated and described below.
MODEM Control Register (MCR)
3FC
BIT
6
43210
I
11--:
I~I
~~
~~~~ESTTO
I
1_________
_
DATA TER"INAl READY IOTRI
_
SENO (RTS)
- =0
OUT2
' - - - - - - - - -... LOOP
L -_ _ _ _ _ _ _ _ _ _
L -_ _ _ _ _ _ _ _ _ _ _-----.
.. = 0
L -_ _ _ _ _ _ _ _ _ _ _ _
=0
~
Bit 0: This bit controls the Data Terminal Ready (DTR) output. When
bit 0 is set to a logic 1, the DTR output is forced to a logic O. When bit 0
is reset to a logic 0, the DTR output is forced to a logic 1.
Note: The DTR output of the INS8250 may be applied to an EIA
inverting line driver (such as the DS 1488) to obtain the proper polarity
input at the succeeding MODEM or data set.
Bit 1: This bit controls the Request to Send (RTS) output. Bit 1 affects
the RTS output in a manner identical to that described above for bit O.
Bit 2: This bit controls the Output 1 (OUT 1) signal, which is an
auxiliary user-designated output. Bit 2 affects the OUT 1 output in a
manner identical to that described above for bit O.
Bit 3: This bit controls the Output 2 (OUT 2) signal, which is an
auxiliary user-designated output. Bit 3 affects the OUT 2 output in a
manner identical to that described above for bit O.
Bit 4: This bit provides a loopback feature for diagnostic testing of the
INS8250. When bit 4 is set to logic 1, the following occur: the
transmitter Serial Output (SO UT) is set to the Marking (logic 1) state;
the receiver Serial Input (SIN) is disconnected; the output of the
Transmitter Shift Register is "looped back" into the Receiver Shift
Register input; the four MODEM Control inputs (CTS,DSR, RLSD,
and RI) are disconnected; and the four MODEM Control outputs
(DTR, RTS, OUT 1, and OUT 2) are internally connected to the four
MODEM Control inputs. In the diagnostic mode, data that is
transmitted is immediately received. This feature allows the processor
to verify the transmit- and receive-data paths of the INS8250.
2-142
In the diagnostic mode, the receiver and transmitter interrupts are fully
operational. The MODEM Control Interrupts are also operational but
the interrupts' sources are now the lower four bits of the MODEM
Control Register instead of the four MODEM Control inputs. The
interrupts are still controlled by the Interrupt Enable Register.
The INS8250 interrupt system can be tested by writing into the lower
four bits of the MODEM Status Register. Setting any of these bits to a
logic 1 generates the appropriate interrupt (if enabled). The resetting of
these interrupts is the same as in normal INS8250 operation. To return
to normal operation, the registers must be reprogrammed for normal
operation and then bit 4 of the MODEM Control Register must be reset
to logic O.
Bits 5 through 7: These bits are permanently set to logic O.
MODEM Status Register
This 8-bit register provides the current state of the control lines from the
MODEM (or peripheral device) to the CPU. In addition to this currentstate information, four bits of the MODEM Status Register provide
change information. These bits are set to a logic 1 whenever a control
input from the MODEM changes state. They are reset to logic 0
whenever the CPU reads the MODEM Status Register.
The content of the MODEM Status Register are indicated and
described below.
MODEM Status Register (MSR)
3FE
BIT
7
6
5
4
I
3
2
1
0
I •
L:;
DElTACLEARTO
SEND (DCTS)
DELTA DATA SET
READY (DDSR)
' - - - - - - . TRAILING EDGE RING
INDICATOR (TER!)
' - - - - - - - - - - 1 . DElTA RX LINE SIGNAL
DETECT (DRLSD)
' - - - - - - - - - -. . CLEAR TO SEND (CTS)
L -_ _ _ _ _ _ _ _ _ _. . DATA SET READY (DSD)
' - - - - - - - - - - - - - - . RING INDICATOR (R!)
' - - - - - - - - - - - - - - - _ _ _ _ . . RECEIVE LINE SIGNAL
DETECT (RLSD)
2-143
Bit 0: This bit is the Delta Clear to Send (DCTS) indicator. Bit 0
indicates that the CTS input to the chip has changed state since the last
time it was read by the CPU.
Bit 1: This bit is the Delta Data Set Ready (DDSR) indicator. Bit 1
indicates that the DSR input to the chip has changed state since the last
time it was read by the CPU.
Bit 2: This bit is the Trailing Edge of Ring Indicator (TERI) detector.
Bit 2 indicates that the RI input to the chip has changed from an On
(logic 1) to an Off (logic 0) condition.
Bit 3: This bit is the Delta Received Line Signal Detector (DRLSD)
indicator. Bit 3 indicates that the RLSD input to the chip has changed
state.
Note: Whenever bit 0, 1,2, or 3 is set to a logic 1, a MODEM Status
interrupt is generated.
Bit4: This bit is the complement of the Clear to Send (CTS) input. Ifbit
4 (loop) of the MCR is set to ai, this bit is equivalent to RTS in the
MCR.
Bit 5: This bit is the complement of the Data Set Ready (DSR) input. If
bit 4 of the MCR is set to ai, this bit is equivalent to DTR in the MCR.
Bit 6: This bit is the complement of the Ring Indicator (RI) input. Ifbit 4
of the MCR is set to a 1, this bit is equivalent to OUT 1 in the MCR.
Bit 7: This bit is the complement of the Received Line Signal Detect
(RLSD) input. If bit 4 of the M CR is set to ai, this bit is equivalent to
OUT 2 of the MCR.
Receiver Buffer Register
The Receiver Buffer Register contains the received character as
defined below.
Receiver Buffer Register (RBR)
3F8
BIT
DLAB=O
READ DNLY
4
I
3
I
0
I ~~lmml
L ._ _ _ _ _ _ _- . :
DATA BIT 4
' - - - - - - - - - - - - - . DATA BIT 5
' - - - - - - - - - - - - - - - - - - - 1 > DATA BIT 6
' - - - - - - - - - - - - - - - - _ _ _ . DATA BIT7
Bit 0 is the least significant bit and is the first bit serially received.
2-144
Transmitter Holding Register
The Transmitter Holding Register contains the character to be serially
transmitted and is defined below:
Transmitter Holding Register (THR)
3F8
DLAB=Q
BIT
7
6
WRITE ONLY
5
4
3
2
1
Q
I I ..
DATA BIT Q
L-==; DATA BIT 1
' - - - - - - - . DATABIT2
DATA BIT 3
' - - - - - - - - - - -___ DATA BIT 4
'--------------------------_ DATABIT5
DATA BIT 6
~--------------------------------~ DATABIT7
Bit 0 is the least significant bit and is the first bit serially transmitted.
2-145
Selecting The Interface Format
The Voltage or Current loop interface is selected by plugging the
programmed shunt module, with the locator dot up or down. See the
figure below for the two configurations.
o
D
D
O!--""""';!!Ir
D
o
ASYNCHRONOUS
COMMUNICATIONS ......................u....L...........,,~. . . . . . . . . . . . . . . . . . . . . . ~.........................
ADAPTER
CURRENT LOOP
INTERFACE
DOT DOWN
DOT UP
Figure 23. SELECTING THE INTERFACE FORMAT
2-146
Asynchronous Communications Adapter Connector
Interface Specifications
REAR PANEL
0
•
•
•
•
•
•
•
•
•
•
•
o eog
~
~
~~
•
•
•
•
•
••
25
•
•
•
•
•
• •
14
0
AT STANDARD TTL LEVELS
Description
...
Pin
NC
1
Transmit Data
2
Receive Data
3
Request to send
4
~
...
--..
~
Clear to send
5
Data set ready
6
....
~
Signal ground
7
Carrier detect
8
...
+Transmit current loop return (20 rna)
9
...
-Transmit current loop data (20 rna)
'"
External
Device
'"
....
'"
~
NC
NC
10
11
Asynchronous
Communications
Adapter
(RS232C)
12
NC
13
NC
14
NC
15
NC
16
NC
17
+Receive current loop data (20 rna)
18
NC
19
Data Terminal Ready
20
NC
21
Ring Indicate
22
NC
23
NC
24
- Receive current loop return (20 rna)
NOTE:
..
25
....
---.
....
To avoid inducing voltage surges on interchange circuits, signals from Interchange
circuits shall not be used to drive inductive devices, such as relay coils.
2-147
NOTES
2-148
SECTION 3. ROM and SYSTEM
USAGE
Contents:
ROM BIOS. . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . .
3-2
BIOS Cassette Logic. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3-8
Keyboard Encoding and Usage . . . . . . . . . . . . . . . . . . .
3-11
Low Memory Maps. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3-21
3-1
ROM BIOS
The ROM resident Basic I/O System (BIOS) provides the device
level control of the major I/O devices in the System Unit. The
BIOS routines allow the assembly language programmer to
perform block (diskette and cassette) or character (Video,
communications, keyboard and printer) level I/O operations
without any concern for device address and operating characteristics. Additionally, system services such as time of day and
memory size determination are provided. The goal is to provide
an operational interface to the system and relieve the programmer from
concern over hardware device characteristics.
Finally the BIOS interface insulates the user from the hardware
allowing new devices to be added to the System Unit, yet
retaining the BIOS level interface to the device. In this manner,
user programs become transparent to hardware modifications
and enhancements. A complete listing of the BIOS is provided
in Appendix "A".
Use of BIOS
Access to the BIOS function is through the 8088 software
interrupts. Each BIOS entry point is available through its own
interrupt, which can be found in the interrupt vector listing.
The software interrupts lOH through lAH each access a
different BIOS routine. For example, to determine the amount
of memory available in the system,
INT
12H
will invoke the memory size determination routine in BIOS
and return the value to the caller.
Parameter Passing
All parameters passed to and from the BIOS routines go through
the 8088 registers. The prologue of each BIOS function indicate
the registers used on the call and the return. For the memory
size example above, no parameters are passed, and the result,
memory size in 1K Byte increments is returned in the
AX register.
Where a BIOS function has several possible operations, the AH
register is used on input to indicate the desired operation. For
example, to set the time of day, the following code is required.
3-2
MOV
AH,l
;function is to set time of
day.
MOV
CX,HIGH_COUNT ;establish the current time.
DX, Low_COUNT
MOV
INT
lAH
;Set the time.
While to read the time of day:
MOV
AH,O
;function is to read the time
of day.
INT
lAH
;read the timer.
As a general rule, the BIOS routines preserve all registers except
for AX and the flags. Other registers are modified on return
only if they are returning a value to the caller. The exact register
usage can be seen in the prologue of each BIOS function.
Interrupt Vector Listing
Interrupt Number
Name
BIOS Initialization
0
1
2
3
4
5
6
7
Divide by Zero
Single Step
Non Maskable
Breakpoint
Overflow
Print Screen
Unused
Unused
None
None
NMUNT (FOOO:E2C3)
None
None
PRINLSCREEN (FOOO:FF54)
8
9
A
B
C
0
E
F
Time of Day
Keyboard
Unused
Unused
Unused (Reserved Communications)
Unused
Diskette
Unused (Reserved Printer)
TIMER_INT (FOOO:FEA5)
KLINT (FOOO:E987)
12
13
14 BIOS
15 Entry
16 Points
17
18
19
1A
Video
Equipment Check
Memory
Diskette
Communications
Cassette
Keyboard
Printer
Cassette BASI C
Bootstrap
Time of Day
VIDEO_I 0 (FOOO:F065)
EQUIPMENT (FOOO: F84D)
MEMORY_SIZE_OETERMINE (FOOO: F841)
DISKETTE_I 0 (FOOO:EC59)
RS23LI 0 (FOOO:E739)
CASSETTE_I 0 (FOOO:F859)
KEYBOARD_I 0 (FOOO:E82E)
PRINTER-I 0 (FOOO:EF02)
(F600:0000)
BOOLSTRAP (FOOO:E6F2)
TIME_OLDAY (FOOO:FE6E)
1B
1C
User Supplied
Routines
Keyboard Break
Timer l1ick
,
DUMMY_RETURN (FOOO:FF53)
DUMMLRETURN (FOOO:FF53)
10
1E
1F
BIOS
Parameters
Video Initialization
Diskette Parameters
Video Graphics Chars
VIDEO_PARMS (FOOO:FOA4)
DISK_BASE (FOOO:EFC7)
None
8259
Interrupt
Vectors
10
11
DISK_I NT (FOOO:EF57)
3-3
NOTES
3-4
Vectors With Special Meanings
Interrupt I BH - Keyboard Break Address
This vector points to the code to be exercised when the CTRL
BREAK keys are depressed on the keyboard. The vector is
invoked while responding to the keyboard interrupt, and control
should be returned via an lRET instruction. The power on routines
initialize this vector to point to an lRET instruction, so that nothing
happens when CTRL BREAK keys are depressed unless
the application program sets a different value.
Control may be retained by this routine, with the following
problems. The BREAK may have occurred during interrupt
processing, so that one or mor End of Interrupt commands must
be set to the 8259 controller. Also, all I/O devices should be reset in
case an operation was underway at that time.
Interrupt I CH - Timer Tick
This vector points to the code to be executed on every tick of the
system clock. This vector is invoked while responding to the
timer interrupt, and control should be returned via an lRET
instruction. The power on routines initialize this vector to point
to an lRET instruction, so that nothing happens unless the
application modifies the pointer. It is the responsibility of the
application to save and restore all registers that will be modified.
Interrupt IDH - Video Parameters
This vector points to a data region containing the parameters
required for tJ.\e initialization of the 6845 on the video card. Note
that there are four separate tables, and all four must be
reproduced if all modes of operation are to be supported. The
power on routines initialize this vector to point to the parameters contained in the ROM video routine.
Interrupt I EH - Diskette Parameters
This vector points to a data region containing the parameters
required for the diskette drive. The power on routines initialize
the vector to point to the parameters contained in the ROM
diskette routine. These default parameters represent the
specified values for any IBM drives attached to the machine.
Changing this parameter block to reflect the specifications of
the other drives attached may be necessary.
3-5
Interrupt 1FH - Graphics Character Extensions
When operating in the graphics modes of the Color/Graphics Monitor
Adapter (320 x 200 or 640 x 200), the read/write character interface
will form the character from the ASCII code point, using a set of dot
patterns. The dot patterns for the first 128 code points are
contained in ROM. To access the other 128 code points, this
vector must be established to point at a table of up to 1K bytes,
where each code point is represented by 8 bytes of graphic
information. At power on this vector is initialized to 0:0, and it is
the responsibility of the user to change this vector if the
additional code points are required.
Other Read/Write Memory Usage
The IBM ROM BIOS routines use 256 bytes of memory starting
at absolute 400 to 4 FF. Locations 400-407 contain the base
addresses of any RS232 cards attached to the system, O's if none
attached. These locations, in order, represent the 0 to 3 values used as
the parameter to the RS232 BIOS routine. Locations
408-40F provide the same function, but for the PRINTER.
Memory locations 300-3FF are used as a stack area during the
power on initialization, and the bootstrap, when control passed
to it from power on. If the user desires the stack in a different area,
it must be set by the application.
Note: Use the Interrupt Vector Listing as an aid to locate these topics
in the ROM BIOS listing, Appendix "A".
BIOS Programming Tip
When programming with BIOS you should keep in mind that if an error
is reported by the diskette code, to reset the diskette adapter and retry
the operation. A specified number ofretrys should be required on reads
to ensure the problem is not due to motor start-up.
3-6
BIOS Memory Map
STARTING ADDRESS HEX
00000
r-------------------~
BIOS
INTERRUPT
VECTORS
00080
AVAILABLE
INTERRUPT
VECTORS
00400
BIOS
DATA
AREA
00500
USER
READ/
WRITE
MEMORY
,.,.,
..... r""
F4000
USER
READ ONLY
MEMORY
F6000
CASSETTE
BASIC
INTERPRETER
FEOOO
BIOS
PROGRAM
AREA
Figure 24. BIOS MEMORY MAP
3-7
BIOS Cassette Logic
Software Algorithms
Interrupt 15
The cassette routine will be called with the request type in AR and
the address of the bytes to be read or written will be specified by
(ES):(BX) and the number of bytes to read/write will be specified by
(CX). The actual number of bytes read will be returned in (DX).
Read block and write block will automatically tum the motor on at the
start and off at the end. The requests are as follows:
(AR) = 0
Tum the cassette motor on.
(AR) = 1
Tum the cassette motor off.
(AR) = 2
(Read Block) Read (CX) bytes into
memory beginning at address (ES):(BX)
and return actual number of bytes read in
(DX). Return the cassette status in (AR).
(AR) = 3
(Write Block) Write (CX) bytes onto the
cassette beginning at address (DS):(BX).
Return the cassette status in (AR).
STATUS:
No errors
AR=OO
AR=OI
CRe-Error (Read Block)
AR=02
No data transitions
AR=04
No leader
AR=80
Invalid command
The carry flag will be set on any error.
Note:
Cassette Write
The WRITE BLOCK routine writes a tape block on the cassette. The
tape block is described in Data Record Architecture page (3-10).
The WRITE BLOCK routine turns on the cassette motor and a synchronization bit (0) and then writes 256 bytes of all ones, the leader,
to the tape. Next, one or more data blocks are written (depends on
number in CX). After each data block of 256 bytes, a two byte
CRC is written. The data bytes are taken from the memory location
pointed at by ES.
The WRITE BYTE routine disassembles the byte and writes it a
bit at a time to the cassette. The method used is to set TIMER 2 to
the period of the desired data bit. The timer is set to a period of
1.0 millisecond for a one bit and 0.5 millisecond for a zero bit.
3-8
The timer is set mode 3 which means it will output a square wave
with period given by its count register. The timer's period is changed on
the fly for each data bit to be written to the cassette. If the number of
data bytes to be written is not an integral multiple off256, then after the
last desired data byte from memory has been written, the data block will
be extended to 256 bytes by writing multiples of the last data byte. The
last block will be closed with two CRC bytes as usual. After the last
data block, a trailer consisting of four bytes of all one bits will be
written. Finally, the motor will be turned off. There are no errors
reported by this routine.
j...-
250 USEe
-+I
I
~r----
ZERO BIT
500 USEe - - - . . . . ,•.-tl
____________----'1
ONE BIT
~r---------l000 USEe ---------~.I
Cassette Read
The READ BLOCK routine turns on the cassette motor and then
delays for approximately 0.5 secs for it to come up to speed.
The READ BLOCK routine then searches for leader and must
detect all one bits for approximately 1/4 ofleader length before it
can look for the sync byte. If a correct sync byte (X '16') is not
found, the routine goes back and searches for leader again.
The data is read a bit a a time and assembled into bytes. After
each byte is assembled it is written into memory at location
ES:BX and then BX is incremented by one.
After each multiple of 256 data bytes are read, the CRC is read
and compared to the CRC generated. If a CRC error is detected,
the routine will exit with the carry flag set to indicate an error
and status (AH) - 01 for CRC error. DX will contain the number
of bytes written into memory.
Note: The Time of Day Interrupt (IRQO) is disabled during the
cassette read operation.
3-9
Data Record Architecture
MOTOR
MOTOR
ON
OFF
1.
2.
3.
4.
5.
Leader 256 bytes (of ones)
Sync byte ASCII Sync Char (X'16')
Sync byte (X '16')
Data Blocks 256 bytes
CRC -- 2 bytes - for each data block
Error Recovery
Error recovery is handled by software. A cyclic redundancy
check (CRC) is used to detect errors. The polynomial used is:
G(X) - X16 «X12 « X5 X 1
Which is the polynomial used by the SDLC interface. Essentially, as bits are written/read from tape, they are passed through
the CRC-register in software. After a block of data is written, the
complemented value of the calculated CRC-register is written on
tape. On reading the cassette data, the CRC bytes are read and
compared to the generated CRC value. If the read CRC does not
equal the generated one, the processor's carry flag is set and
status (AH) is set to X'OI' to indicate a CRC error has occurred.
Also, the routine is exited on CRC error.
3-10
Keyboard Encoding and Usage
Encoding
['he keyboard routine provided by IBM in ROM BIOS is
'esponsible for converting the keyboard scan codes into what
~i11 be termed "Extended ASCII",
~xtended ASCII encompasses one byte character codes with
>os sible values of 0-255, an extended code for certain extended
(eyboard functions and functions that are handled within the
(eyboard routine or through interrupts.
Character Codes
['he following character codes are passed through the BIOS
(eyboard routine to the system or application program. A
'-1" means the combination is suppressed in the keyboard
'outine. The codes are returned in AL. See Appendix C for exact
:odes. Use keyboard Scan Code diagram for reference page 2-17.
Table 25. Character Codes
KEV#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
BASE CASE
ESC
1
2
3
4
5
6
7
8
9
0
UPPER CASE
ESC
Yo
@
#
$
%
/\
&
*
(
)
-
+
Backspace (008) Backspace (008)
~ (Note 1)
---+I (009)
Q
q
W
w
E
e
R
r
t
T
=
y
u
i
0
y
U
1
0
p
P
[
]
{
}
CTRL
ESC
-1
NUL (000) Note 1
-1
-1
-1
RS (030)
-1
-1
-1
-1
US (031)
-1
DEL(127)
-1
DCl (017)
ETB (023)
ENQ (005)
DC2 (018)
DC4 (020)
EM (025)
NAK (021)
HT (009)
SI (015)
OLE (016)
ESC (027)
GS (029)
ALT
-1
Note
Note
Note
Note
Note
Note
Note
Note
Note
Note
Note
Note
-1
-1
Note
Note
Note
Note
Note
Note
Note
Note
Note
Note
-1
-1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
3-11
Table 25. Character Codes (cont.)
KEY#
BASE CASE
UPPER CASE
CTRl
28
29CTRl
30
31
32
33
34
35
36
37
38
39
40
41
42SHIFT
43
44
45
46
47
48
49
50
51
52
53
54SHIFT
55
56AlT
57
58 CAPS
LOCK
59
60
61
62
63
64
65
66
67
68
69NUM
LOCK
70SCROLL
LOCK
CR
-1
a
s
d
f
g
h
j
k
I
,
,
CR
-1
A
S
IF (010)
-1
SOH (001)
DC3 (019)
EDT (004)
ACK (006)
BEL (007)
BS (008)
IF (010)
VT (011)
FF (012)
-1
-1
-1
-1
FS (028)
SUB (026)
CAN (024)
ETX (003)
SYN (022)
STX (002)
SO (014)
CR (013)
-1
-1
-1
-1
(Note 1)
-1
SP
-1
0
F
G
H
J
K
l
"
\
~
-1
-1
\
z
Z
I
I
X
C
V
B
N
M
x
c
v
b
n
m
<
>
)
?
/
-1
(Note 2)
-1
SP
-1
-1
*
-1
SP
-1
NUL
NUL
NUL
NUL
NUL
NUL
NUL
NUL
NUL
NUL
(Note
(Note
(Note
(Note
(Note
(Note
(Note
(Note
(Note
(Note
-1
-1
1)
1)
1)
1)
1)
1)
1)
1)
1)
1)
NUL
NUL
NUL
NUL
NUL
NUL
NUL
NUL
NUL
NUL
(Note
(Note
(Note
(Note
(Note
(Note
(Note
(Note
(Note
(Note
-1
1)
1)
1)
1)
1)
1)
1)
1)
1)
1)
-1
Note 1: Refer to Extended Codes Page (3-131Note 2: Refer to Special Handling Page (3-15).
3-12
NUL (Note 1)
NUL (Note 1)
NUL (Note 1)
NUL (Note 1)
NUL (Note 1)
NUL (Note 1)
NUL(Note1)
NUL (Note 1)
NUL(Note1)
NUL(Note1)
Pause
(Note 2)
Break
(Note 2)
AlT
-1
-1
Note
Note
Note
Note
Note
Note
Note
Note
Note
-1
-1
-1
-1
-1
Note
Note
Note
Note
Note
Note
Note
-1
-1
-1
-1
-1
-1
SP
-1
NUL
NUL
NUL
NUL
NUL
NUL
NU L
NUL
NUL
NUL
-1
-1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
(Note
(Note
(Note
(Note
(Note
(Note
(Note
(Note
(Note
(Note
1)
1)
1)
1)
1)
1)
1)
1)
1)
1)
Keys 71-83 have meaning only in base case, in NUMLOCK (or
shifted) states, or in CTRL state. It should be noted that the shift
key temporarily reverses the current NUMLOCK state.
KEV#
NUM LOCK
BASE CASE
71
72
73
74
75
7
8
9
4
Home (Note
t (Note
PageUp (Note
~
(Note
76
77
5
6
~(Note1)
Note 1
Note 1
78
79
+
1
+
End (Note 1)
-1
Note 1
80
81
2
3
.J. (Note 1)
PageDown (Note 1)
Note 1
Note 1
82
83
0
INS
DEL (Notes 1,2)
Note 1
Note 2
-
ALl
1)
1)
1)
1)
-1
Note
Note
Note
-1
Note
ClRL
1
1
1
1
Clear Screen
-1
Top of Text & Home
-1
Reverse Word
(Note 1)
-1
AdvWord
(Note 1)
-1
Erase to EO L
(Note 1)
-1
Erase to EOS
(Note 1)
-1
Note 2
Note 1: Refer to Extended Codes Page (3·13).
Note 2: Refer to Special Handling Page (3-15).
Extended Codes
A. Extended Functions
For certain functions that can not be represented in the
standard ASCII code, an extended code is used. A character
code of 000 (NUL) is returned in AL. This indicates that the
system or application program should examine a second
code that will indicate the actual function. Usually, but not
always, this second code is the scan code of the primary key
that was pressed. This code is returned in AH.
3-13
Table 26. Keyboard Extended Functions
SECONO CODE
3
15
16-25
30-38
44-50
59-68
71
72
73
75
77
79
80
81
82
83
84-93
94-103
104-113
114
115
116
117
118
119
120-131
132
B.
FUNCTION
NUL Character
-E-
AL Tn, W, E, R, T, Y, U, 1,0, P
ALTA, S, D, F, G, H, J, K, L
AL T Z, X, C, V, B, N, M
F1-F10 Function Keys Base Case
Home
l'
Page Up & Home Cursor
~
...,.
End
-J,
Page Down & Home Cursor
INS
DEL
F11-F20 (Upper Case F1-F10)
F21-F30 (CTR L F1-FlO)
F31-F40 (ALT F1-F10)
CTRL PRTSC (Start/Stop Echo to Printer) Key 55
CTR L ~ Reverse Word
CTR L --7 Advance Word
CTRL END Erase EOL
CTRL PG DN Erase EOS
CTRL HOME Clear Screen and home
AL T 1, 2, 3,4,5.6.7,8,9,0, -, = (Keys 2-13)
CTRL PG UP TOP 25 Lines of Text & Home Cursor
Shift States
Most shift states are handled within the keyboard routine
transparently to the system or application program. In any
case, the current set of active shift states are available by
calling an entry point in the ROM keyboard routine. The
following keys result in altered shift states:
Shift - Temporarily shifts keys 2-13, 15-27, 30-41,43-53,55,
59-68 to upper case (lower case if in CAPSLOCK state).
Temporarily reverses NUMLOCK/NONUMLOCK state of
keys 71-73, 75, 77, 79-83.
CTRL - Temporarily shifts keys 3, 7, 12, 14, 16-28, 30-38,
43-50,55,59-71, 73, 75, 77, 79, 81 to CTRL state. Used with
ALT and DEL to cause "system reset" function described in
Section 1.3. Used with SCROLL LOCK to cause "break"
function described in Section I.3. Used with NUMLOCK to
cause "pause" function described in Section I.3.
3-14
ALT - Temporarily shifts keys 2-13, 16-25, 30-38,44-50, and
59-68 to ALT state. Used with CTRL and DEL to cause
system reset function described in Section 1.3.
ALT has a special use to allow the user to enter any character
code (0-255) into the system from the keyboard. The user
holds down the ALT key and types the decimal value of
characters using the numeric keyboard (keys 71-73, 75-77,
79-82). The ALT key is then released. If more than three
digits are typed, a modulo 256 result is created. These three
keys are interpreted as a character code (000-255) and are
transmitted through the keyboard routine to the system or
application program. ALT is handled internal to keyboard
routine.
CAPS LOCK - Shifts keys 16-25, 30-38, 44-50 to upper case
A second depression of CAPS LOCK reverses the action.
Handled internal to keyboard routine.
NUM LOCK - Shifts keys 71-73, 75-77, 79-83 to numeric
state. A second depression of NUM LOCK reverses the
action. Handled internal to keyboard routine.
SCROLL LOCK - Interpreted by appropriate application
programs as indicating that the use of the cursor control
keys should cause windowing over the text rather than
cursor movement. A second depression of SCROLL LOCK
reverses the action. The keyboard routine simply records
the current shift state of SCROLL LOCK. It is up to the
system or application program to perform the function.
C. Shift Key Priorities and Combinations
If combinations of ALT, CTRL and SHIFT are pressed and
only one is valid, the precedence is as follows: Highest is
ALT, then CTRL, then SHIFT. The only valid combination
is ALT CTRL, which is used in system reset.
Special Handling
A. System Reset
The combination of ALT CTRL DEL (Key 83) will result in
the keyboard routine initiating the equivalent of a system
reset/reboot. Handled internal to keyboard routine.
3-15
B.
Break
The combination CTRL BREAK will result in the keyboard
routine signaling interrupt -1 A. Also, the extended characters (AL =OOH, AH = OOH) will be returned.
Power up initialization, this interrupt is set up to cause the
break sequence to be ignored. It is up to the system or
application initialization code to change the interrupt
vector in order to support an actual "break" function.
C. Pause
The combination CTRL NUM-LOCK will cause the keyboard interrupt routine to loop, waiting for any key except
NUM-LOCK to be pressed. This provides a system/
application transparent method of suspending list/print/
etc. temporarily, and then resuming. The "Unpause" key
is thrown away. Handled internal to keyboard routine.
D. The -following keys win have their typematic action
suppressed by the keyboard routine: CTRL, SHIFT, ALT,
NUM-LOCK, SCROLL-LOCK, CAPS LOCK, INS.
E.
Print Screen
The combination SHIFT-PRINT SCREEN (Key 55) will
result in an interrupt invoking the print screen routine.
This routine works in alpha/graphics mode, with unrecognizable characters printing as blanks.
The keyboard routine does its own buffering. The buffer is big
enough to support a fast typist. If a key is entered when the
buffer is full, the key will be ignored and the "bell" will
be sounded.
3-16
Keyboard Usage
This section is intended to outline a set of guidelines for key usage when
performing commonly used functions.
Table 27.
Keyboard - Commonly Used Functions
FUNCTION
KEV(S)
COMMENT
Home Cursor
HOME
Editors; word processors
Return to outermost menu
HOME
Menu driven applications
t
Full screen editor, word
processor
PG UP
Editors; word processors
Move cursor up
Page up, scroll backwards
25 lines & home
Move cursor left
+- Key 75
Text, command entry
Move cursor right
--+-
Text, command entry
Scroll to end of text
Place cursor at end of line
END
Editors; word processors
!
Full screen editor, word
processor
Page down, scroll forwards
25 lines & home
PG ON
Ed itors; word processors
Start/Stop insert text at
cursor, shift text right
in buffer
INS
Text, command entry
Delete character at cursor
DEL
Text, command entry
Move cursor down
Destructive backspace
+- Key 14
Text, command entry
Tab forward
---+I
Text entry
Tab reverse
~
Text entry
Clear screen and home
CTRL HOME
Scroll up
t
Command entry
In scroll lock mode
Scroll down
!
Scroll left
+-
In scroll lock mode
Scroll right
--+-
In scroll lock mode
In scroll lock mode
Delete from cursor to
EOL
CTRL END
Text, command entry
Exit/Escape
ESC
Editor, 1 level of menu, etc
Start/Stop Echo screen
to printer
PRTSC
CTRL K55
Any time
Delete from cursor to
EOS
CTRL PG
ON
Text, command entry
3-17
Table 27. Keyboard - Commonly Used Functions (cont.)
FUNCTION
Advance word
KEyeS)
-.
CTRL
...-
COMMENT
Text entry
Text entry
Reverse word
CTRL
Window Right
CTRL
-.
Window Left
CTRL
...-
Enter insert mode
INS
Exit insert mode
INS
Line editor
When text is too wide to fit
screen
When text is too wide to fit
screen
Line editor
Cancel current line
ESC
Command entry, text entry
Suspend system (pause)
CTRL
NUMLOCK
Stop list, stop program, etc.
Resumes on any key
Break interrupt
CTRL
BREAK
Interrupt current process
System reset
ALT CTRL
DEL
Reboot
Top of document and
home cursor
CTRL PG UP
Editors, word processors
Standard Function Keys
F1-F10
Primary function keys
Secondary function keys
SHIFT F1-F10
CTRL F1-F10
ALT F1-Fl0
Extra function keys if 10
are not sufficient
Extra function keys
AL T Keys
2-13
(1-9,0,-,=)
Used when stickers are
put along top of keyboard
Extra function keys
ALT A-Z
Used when function starts
with same letter as one of
the alpha keys
3-18
Table 28.
BASIC Screen Editor Special Functions
FUNCTION
Carriage retu rn
Line feed
Bell
Home
Cursor up
Cursor down
Cursor left
Cursor right
Advance one word
Reverse one word
Insert
Delete
Clear screen
Freeze output
Tab advance
Stop execution (break)
Delete current line
Delete to end of line
Position cursor to end of line
Table 29.
KEY
......
CTRl~
CTRl G
HOME
\
+---+
CTRl--+
CTRl+-INS
Del
CTRl HOME
CTRl NUMlOCK
--+I
CTRl BREAK
ESC
CTRl END
END
DOS Special Functions
FUNCTION
Suspend
Ech 0 to pri nter
Stop echo to printer
Exit current function
(break)
Backspace
Line feed
Cancel line
Copy character
Copy till match
Copy remaining
Skip character
Skip until match
Enter insert mode
Exit insert mode
Make new line the template
String separator in REPLACE
End of file in keyboard input
KEY
CTRl NUMlOCK
CTRl-PRTSC
(Key 55 any case)
CTRl-PRTSe
(Key 5!1 any case)
CTRl
BREAK
+- Key 14
CTRl ~
ESC
F1 or --+
F2
F3
Del
F4
INS
INS
F5
F6
F6
3·19
NOTES
3-20
Low Memory Maps (O-'0600'x)
Table 30.
Interrupt Vectors (O-7F)
ADDRESS
HEX
INTERRUPT
HEX
0-3
4-7
8-B
C-F
10-13
14-17
18-1F
20-23
24-27
28-37
38-3B
3C-3F
40-43
44-47
48-4B
4C-4F
50-53
54-57
58-5B
5C-5F
60-63
64-67
68-68
6C-6F
70-73
74-77
78-7B
7C-7F
0
Notes:
1
2
3
4
5
6,7
8
9
A,8,C,D
E
F
10
11
12
13
14
15
16
17
18
19
1A
1B
1C
10
lE
IF
FUNCTION
Divide by Zero
Single step
Non-Maskable Interrupt (NMI)
Break Point Instruction ('CC'x)
Overflow
Pri nt Screen
Reserved
Timer 08.2 per second)
Keyboard Interrupt
Reserved
Diskette Interrupt
Reserved
Video I/O Call
Equipment Check Call
Memory Check Call
Diskette I/O Call
RS232 I/O Call
Cassette I/O Call
Keyboard I/O Call
Printer 1/0 Call
ROM Basic Entry Code
Boot Strap Loader
Time of Day Call
Get Control on Keyboard Break: Note 1
Get Control on timer interrupt: Note 1
Pointer to video initialization table: Note 2
Pointer to diskette parameter table: Note 2
Pointer to table (1 KB) for graphics character
Generator for ASCII 128-255. Defaults to 0:0
(1) Initialized at power up to point to an IRET Instruction.
(2) Initialized at power up to point to tables in ROM.
BASIC and DOS Reserved Interrupts
(80-3FF)
Table 31.
ADDRESS
HEX
INTERRUPT
HEX
80-83
84-87
88-8B
8C-8F
90-93
94-97
98-9B
9C-9F
AO-FF
100-1 FF
200-217
218-3C3
3C4-3FF
20
21
22
23
24
25
26
27
28-3F
40-7F
80-85
86-FO
F1-FF
Table 32.
DOS Program Terminate
DOS Function Call
DOS Terminate Address
DOS CTRL-BRK Exit Address
DOS Fatal Error Vector
DOS Absolute Disk read
DOS Absolute Disk write
DOS Terminate, Fix in Storage
Reserved for DOS
Not Used
Reserved By BASIC
Used by BASIC Interpreter while BASIC is Running.
Not Used
Reserved Memory Locations (400-SFF)
ADDRESS
HEX
400-48F
490-4CF
400-4EF
4FO-4FF
MODE
ROM BIOS
DOS
500-5FF
500
DOS
504
510-511
512-515
516-519
51A-51D
DOS
BASIC
BASIC
BASIC
BASIC
3-22
FUNCTION
FUNCTION
See BIOS Listing
Used by DOS Mode Command
Reserved
Reserved as Intra-Application Communication
area for any application.
Reserved for DOS and BASIC
Print Screen status flag store.
O-Print screen not active or successful print
screen operation.
1-Print screen in progress.
255-Error encountered during print screen
operation.
Single drive mode status byte.
BASI C's segment address store.
Clock interrupt vector segment: offset store.
Break key interrupt vector segment: 'offset store.
Disk error interrupt vector segment: offset store.
BASIC Workspace Variables
If you do DEF SEG (Default workspace segment)
Line number of current line being executed
Line number of last error
Offset into segment of start of program text
Offset into of start of variables
(end of program text 1-1)
Keyboard buffer contents
if O-no characters in buffer
if l-characters in buffer
if you POKE & H6A, 0 you
flush any characters in buffer
OFFSET
LENGTH
X '2E'
X '347'
X '3~'
X '358'
2
2
2
2
X '6A'
1
Example:
100 Print
PEEK (&H2E) + 256*PEEK (&H2F)
)
100
H
L
I
X '64'
I
X '00'
I
3-23
NOTES
3-24
,1",
(\1':': '
'"i,".,
:ti
1,'1.
APPENDIX A
ROM BIOS LISTINGS
CONTENTS
ITEM
Equates and Data Areas
LINE
NUMBER ADDRESS
PAGE
A-2
1
Power-on Self-test
198
E016
A-4
Boot Strap Loader
1355
E6F2
A-20
I/O Support
Asynchronous
Communications
(RS 232) I/O
Keyboard I/O
Diskette I/O
Printer I/O
Display (VIDEO) I/O
Cassette I/O
1410
1640
2255
3007
3119
4977
E729
E82E
EC59
EFD2
F045
F859
A-20
A-23
A-32
A-42
A-43
A-68
4903
F841
A-67
4933
F84D
A-67
5503
5642
5817
FA6E
FE6E
FF53
A-75
A-77
A-79
A-81
System Configuration Analysis
Memory-SizeDetermination
EquipmentDetermination
(Options)
Graphics-Character Generator
Time-of-day
Print Screen
Notes for the BIOS Listing
A-I
lOC OBJ
LINE
SOURCE
$fITlEtROtI aIOS fOR IeH PERSDNAL COMPUtER)
; "'... ...
...
-- ---- --_ _ --_... _--- -
J EQUATES
0060
4
S
i--.. --...... -----------------P~T
PORT_A
PORT_9
EQU
.OH
;8255
006).
EQU
61H
i 8255 PORT B ADCA
0062
0063
PDRT_C
EQU
.3tf
EQU
•• H
; 8255 PORT C ADDA
CMO_PORT EQU
.OH
;8259 PORT
;82:59 PORT
0020
•
tNl'AOO
OOZ!
10
tNTAOl
EQU
21H
0020
11
0040
12
E'%
TIMER
'QU
EQU
20H
40H
004]
13
14
0040
0001
0008
0000
0540
0410
0060
0002
0060
0061
0000
0000
0008
0008
0014
0014
0020
0020
0020
OD40
0040
0074-
0074
0078
0078
007C
D07e
7COD
7COO
,.
,.
••
IS
.
17
21
••
0040
0000 (4 t11t J
0008 (4 ????)
0010 ????
0012 11
0013 ????
0015 ????
j
40H
;8251 TIttER/eNTER 0 PORT ADOR
EQU
EQU
01
08
JTIMER 0 INTR RECVD MAS)(
;OI1A STATUS REG FORT ADOR
DM"
EQU
00
IDMA CHANNEL 0 ADDRESS REG PORT ADDR
HA)CPERIOD EQU
540H
HIN_PERIOD eqtJ
"OH
K8D~IN
60H
EQU
EQU
KBDINT
••
EQU
KB_DATA
EQU
8253 TII'ff:R CONTROL PORT ADOR
;KEYBOARD DATA IN AnDR PORT
j
6'H
blH
; - - -- ------ - - ----- ----- --- -------- -- --- --- --; 8OS8 INTERRUPT lOCAnONS
26
.1
; - -- ---- - - ---- -- - - -- -- ---- --- ------- -- -- -- ---ASS.
SEGMENT' AT 0
••3.
NHI_PTR
STS_LOto
3.
33
INT5_PTR
34
INT.ADDR
35
INT_PTR
ORG
5"
OIlG
.<4
LABEL
ORG
VIDED.INT
38
3'
PARM_PTR
40
41
DISK_POINTER
4'
LABEL
LABEL
4S
46
47
BOOT_LOCH
ASSG
WORD
DWORD
01EH*4
ORG
WORD
LABEL
OIlG
ORG
WORD
10H*4
10H*4
EXT_PTR LABEL
BytE
LABEl
OIlG
4'
44
; CONTROL BITS FOR KEYBOARD SENse DATA
'<4
LABEL
31
3b
31
LABEL
'RG
KEYBOARD INTR HASK
; KEYBOARD SCAN CODE PORT
24
25
LABEL
WORD
DWORD
; POINTER TO VIDEO PARHS
INTERRUPT 1EH
DWORD
OlFH*4
LOCATION OF POINTER
DWORD
; POINTER TO EXTENSION
7eDOH
LABEL
FAll
ENDS
j ---------------------
; STACK -- USED DURING INITIALIZATION ONLY
SO
; ----------------------
51
STACK
SEGMENT AT 30H
5'
53
OW
128 OUP(? )
TOS
LABEL
WORD
54
STACK
ENDS
55
56
J - -- - - - -- - ---- -- - - - - ------ ---- -- ------- - - ----
57
; ROM BIOS DATA AREAS
s.
.0
RS232.BASE
OW
4 DUPf 11
; ADDRESSES OF RS232 ADAPTERS
PRINTER_BASE
ow
40UP(?)
j
ADDRESSES OF PRINTERS
INSTAllED HARDWARE
.
.,
.,••
••
.5
b.
67
68
0017 ?1
43tf
EQU
KB_CTL
48
49
0000 (128 1111 J
0100
TIM_CTL EQU
TIHERO
THIHT
OMAas
03
••
A ADDR
DATA
SEGMENT AT 40H
EQUIPJLAG
DW
j
MFG_TST
DB
; INITIALIZATION FLAG
MEMORY_SIZE
ow
; MEMORY SIZE IN K BYTES
IO_RAM_SIZE
DW
j
;
MEMORY IN I/O CHANNEL
-------- ------------- ------ --- -- --- -- -------
; KEYBOARD DATA AREAS
i --------------------------------------------
••7.
KBJLAG
71
;------ SHIft FLAG EQUATES WITHIN KBJLAG
DB
n
7.
INS_STATE
0040
74
CAPS_STATE
EQU
80H
40H
0020
7.
HUM_STATE
0010
7b
SCROLL_STATE
EOU
EOU
.OH
10H
; SCROLL LOCK STATE HAS BEEN TOGGLED
0008
77
ALT_SHIFT
EOU
08H
; ALTERNATE SHIFT KEY DEPRESSED
0080
A-2
EQU
j
INSERT STATE IS ACTIVE
; CAPS lOCK STATE HAS BEEN TOGGLED
j
NUN LOCK STATE HAS BEEN TOGGLED
lOC OBJ
0004
LINE
SOURCE
76
CTL_SHIFT
EOU
04H
0002
7.
EOU
EOU
LEFT SHIFT KEY DEPRESSED
80
lEFT_SHIFT
RIGHT_SHIFT
02H
0001
OIH
RIGHT SHIFT KEY DEPRESSED
CONTROL SHIFT KEY DEPRESSED
81
0018 :1
8'
8'
0080
84
0040
SECOND BYTE OF KEYBOARD STATUS
DB
INS_SHIFT
EOU
EOU
80H
INSERT KEY IS DEPRESSED
40H
CAPS LOCK KEY IS DEPRESSED
85
CAPS_SHIFT
0020
86
NVH_SHIFT
87
SCROLL_SHIFT
EOU
EOU
'OH
10H
NUN LOCK KEY IS DEPRESSED
ODIO
0008
86
HOLD_STATE
EOU
08H
SUSPEND KEY HAS BEEN TOGGLED
SCROll LOCK KEY IS DEPRESSED
8.
0019 1:
90
ALT_INPUT
DB
STORAGE FOR ALTERNATE KEYPAD ENTRY
001A ????
91
BUFFER_HEAD
OW
POINTER TO HEAD OF KEYBOARD BUFFER
ODIC ????
92
BUFFER TAIL
DW
ODIE (16 ????)
9l
94
KB_SUFFER
OW
16 DUP(? J ; ROOM FOR 15 ENTRIES
KB_BUFFER_END
LABEL
WORD
003E
POINTER TO TAIL OF KEYBOARD BUffER
95
96
j------
HEAD: TAIL INDICATES THAT THE BUFFER IS EMPTY
.7
0045
96
0046
99
0038
NUMJEY
EOU
69
SCAN CODE FOR NUMBER LOCK
EOU
70
SCROll LOCK KEY
100
ALTJEY
EOU
56
AL HRNATE SHIFT KEY SCAN CODE
0010
101
CTlJEY
EOU
'9
SCAN CODE FOR CONTROL KEY
003A
10'
CAPS_KEY
EOU
EOU
56
SCAN CODE FOR SHIFT LOCK
002:.0.
103
LEFT_KEY
0036
0052
104
RIGHT_KEY
105
H-IS_KEY
0053
106
DEL_KEY
EOU
EOU
EOU
42
SCAN CODE FOR LEFT SHIFT
54
SCAN CODE FOR RIGHT SHIFT
82
SCAN CODE FOR INSERT KEY
83
SCAN CODE FOR DELETE KEY
107
108
109
003E
??
0060
i ---- ---- ------------------------------------
; DISKETTE DATA AREAS
110
; --------------------------------------------
III
SEEK_STATUS
112
In
114
; DRIVE RECALIBRATIOH STATUS
DB
BIT 3-0 = DRIVE 3-0 NEEDS RECAL BEFORE
NEXT SEEK IF BIT IS
= 0
INTJLAG
EQU
OBOH
MOTO~_STATUS
DB
; MOTOR STATUS
BIT 3-0 = DRIVE 3-0 IS CURRENTLY RUNNING
003f ??
115
11_
117
I
0040 ??
118
MOTOR_COUNT
DB
0025
119
MOTOR_WAIT
EQU
;
INTERRUPT OCCURRENCE FLAG
BIT 7
;: CI.JRRENT OPERATION IS A WRITE. REQUIRES DELAY
37
; TWO SECONDS OF COUNTS FOR MOTOR TURH Off
TIME OUT COUNTER FOR DRIVE TURN OfF
120
0041 ??
0080
121
I
IZZ
DISKETTE_STATUS DB
123
TIME_OUT
EQU
i
SINGLE BYTE OF RETURN CODE INfO FOR STATUS
60H
; ATTACHMENT r'AIlED TO RESPOND
0040
1'4
BAD_SE:EK
EQU
40H
; SEEK OPERATION fAILED
0020
les
BAD_NEe
EQU
0010
1,6
BAD_CRe
EQU
'OH
10H
; BAD CRC ON DISKETTE READ
0009
1,7
DMA_BOUNDARY
EQU
O.H
; ATTEMPT TO DMA. ACROSS 64K BOUNDARY
0008
128
BAD_DMA
EQU
06H
; DHA OVERRUN ON OPERATION
0004
129
RECORD_NOT]ND
EQU
04H
; REQUESTED SECTOR NOT FOUND
0003
130
WRITE_PROTECT
EQU
; WRITE ATTEMPTED ON WRITE PROT DISK
OOOZ
III
112
8AD_ADDR_MARK
EQU
O'H
02H
BAD_CND
EQU
OIH
; BAD COMMAND PASSED TO DISKETTE I/O
DB
7 DUP{'!)
0001
i
NEe CONTROLLER HAS FAILED
; ADDRESS HARK NOT FOUND
113
0042 (7 ??J
134
• STATUS BYTES FROM NEC
llS
136
137
; -------------------------------------------; VIDEO DISPLAY DATA AREA
138
; --------------------------------------------
0049 ?!
n9
CRT_MOOE
DB
004.4. ????
140
CRT_COLS
OW
; NUl1BER Of COLUMNS ON SCREEN
004C ????
004E ????
0050 (8 ???? J
0060 ????
0062 ?1
0063 ????
141
CRT_LEN
Ow
;
14'
14>
CRT_START
OW
; STARTING ADDRESS IN REGEN BUFFER
CURSOR_POSH
OW
144
CURSOR_MODE
OW
; CURRENT CURSOR MODE SETTING
ACTIVE_PAGE
14S
; CURRENT CRT MODE
8DUP!?)
LENGTH OF REGEN IN BYTES
; CURSOR fOR EACH OF UP TO 8 PAGES
DB
; CURRENT PAGE BEING DISPLAYED
14_
ADDR_6845
OW
; BASE ADDRESS FOR ACTIVE DISPLAY CARD
0065 '??
147
CRT_HODE_SET
DB
; CURRENT SETTING OF THE 3X8 REGISTER
0066 ??
146
CRT_PALLETTE
DB
; CURRENT PALLETTE SETTING COLOR CARD
149
150
; --------------------------------------------
151
; CASSETTE DATA AREA
152
; ---- ---- ------------------------------------
0067 ????
IS3
DW
;TIME COUNT AT DATA EDGE
0069 ????
154
DW
;CRC REGISTER
A-3
lOC OBJ
006B ??
006C n??
006E ????
0070
n
0071 ??
0072 ????
LINE
SOURCE
155
156
OB
IS 7
~
IS8
; TIMER DATA AREA
159
; -----------------------------______________ _
------------------------ ------------- ______ _
160
TIMER_LOW
161
162
TINER_HIGH
OW
TINER_OFL
OB
16'
; COUNTS_SEC
EOU
18
16.
16S
iCOUNTS_MIN
EOU
EOU
EOU
1092
65543
TIMER HAS ROLLED OVER SINCE LAST READ
=
1800BOH
166
.COUNTS_DAY
1---------------------------------__________ _
169
170
; SYSTEM DATA AREA
; ------------------------------- ____________ _
171
BIOS_BREAK
DB
172
RESETJLAG
0\.1
17'
17.
DATA
175
; --------_-
176
; EXTRA DATA AREA
177
~OO ??
184
BIT 7
=1
'.,--.~------------------ _________
XXOATA
DB
ENDS
; -------------------------------------------J VIDEO DISPLAY BUFFER
; ------------------------- -------------------
18S
VIDEO_RAM
SEGMENT AT OB800H
18b
REGEN
LABEL
BYTf
187
188
18.
REGENW
LABE L
WORD
190
i ------------------------------------------
191
_
SEGMEHT AT SOH
DB
16384 DUPf '!)
VIDEO_RAM
ENOS
; ROM RESIDEHT CODE
192
; ----- - ---- ----- - --------- ---- ---- ---- - ----CODE
0000 157344 ?? J
19'
19.
195
EOOO 35373030303531
196
FOOO
IF BREAK KEY HAS BEEN DEPRESSED
; WORO = 1234H IF KEYBOARD RESET UNDERWAY
1-------------------------------------------XXOATA
STATUS_BYTE
182
181
1573040
EtlDS
178
0000 116384 ?? J
LOW WORD OF TIMER COUNT
HIGH WORD OF TIMER COUNT
j
167
168
17.
180
181
0000
OW
icownS_HOUR
0050
B800
0000
; LAST INPUT VALUE
SEGMENT AT OFOOOH
DB
57344 DUPf'!)
DB
'5700051 COPR. IBH 1981'
; FILL LOWEST 56K
; COPYRIGHT NOTICE
20434FS0522:EZO
4942:402:0313938
Jl
197
198
; --- - --- - -------- -- - -------- ------- ------ ----
199
i
200
201
; ---- --- ------ ------- -- ------ - ---- -- ---- - ----
INITIAL RELIABILITY TESTS -- PHASE 1
202
203
; --- - --- - ------------ --- ---- ------- ----- - ----
ASSUME
CS:CDDE,5S:COOE,ES:ABSO,DS:DATA
DATA DEFINITImlS
20r~
1---- --------- ------ - ------- --- ---- ----- - -- --
E016 D8EO
20S
Cl
OW
Cll
; RETURN ADDRESS
E018 EDEI
206
207
C2
OW
C24
; RETURN ADDRESS FOR DUMMY STACK
- -- --------- ------- ------- ----------------THIS SUBROUTINE PERFORMS A READ/WRITE STORAGE TEST ON A 16K BLOCK
208
209
OF STORGAGE.
210
,ENTRY REQUIREMEtHS:
ES
= ADDRESS
212
05
=
213
WHEtl EtH(RIHG AT STGTST_CtH. CX MUST BE LOADED WITH TIlE BYTE COUNT.
211
214
;EXIT PARAMETERS:
215
ZERO FLAG
=
0 IF STORAGE ERROR (DATA COMPARE OR PARITY CHECK.
DENOTES A PARITY CHECK.
216
AL:::O
ELSE AL=XCR'EO BIT PATTERH Of THE
EXPECTED OATA PATTERN VS THE ACTUAL DATA READ.
217
AX,BX.CX,QX.DI. At:o 51 ARE ALL DESrROYED.
218
EOIA
OF STORAGE SEGMENT BErNG TESTED
ADDRESS OF STORAGE SEGMENT BEING TESTED
219
; --------------------------------------------
2Z0
STGTST
PROC
EOlA 890040
221
tl0V
EOlD
222
STGTST_CNT:
NEAR
CX,4000H
JSETUP (NT TO TEST A 16K BLK
;5ET OIR FlAG TO ItICRENENT
221
CLO
EOlE 8B09
22'
nov
BX.CX
;SAVE BYTE CNT (4K FOR VIDEO OR 16K)
E02:0 B8FFFF
225
MOV
AX,OFfFFH
JGET DATA PATTERN TO
E023 6A55AA
226
no',
DX,OAA55H
,SETUP OTHER DATA PATTERNS TO USE
E026 2:BfF
2"
SUB
DI,or
;D1 " OFFSET 0 RELATIVE TO ES REG
E02:8 F3
228
REP
SlOSS
;WRITE STORAGE LOCATIONS
EOlD FC
E029 AA
A-4
~RITE
lOC OBJ
E024
LINE
22'
SOURCE
C3:
; STGOI
EDa 4F
230
DEC
E028 FD
STO
C4:
f02E 8&8
nl
232
233
f030 At
234
1:5'
EOll
E033
E035
E037
235
236
E02C 8BF7
32C4
7525
£462
24tO
£039 BODO
E03B 75lD
237
238
23.
240
DI
MOV
SI,DI
HOY
CX,BX
; SETUP BYTE CNT
}COR
Al.AH
;DATA READ AS EXPECTED?
J"'
IN
C7
; NO - GO TO ERROR ROUTINE
;010 A PARITY ERROR OCCUR?
AND
AL.OCOH
;READ CHAR FROM STORAGE
LooSB
Al.PORT_C
MOV
ALtO
JNZ
C7
CMP
AH,.
J'
C6
; CONTINUE READING
Al.Ol
;GET NEXT DATA PATTERN TO WRITE
f03D 80Feoo
E040 7403
241
E042: 8At2
243
MOV
E044 AA
244
5T058
E04S
245
E045 £2£9
246
LOOP
C5
E047 80FtOO
247
eMP
AH,O
242
; POINT TO LAST BYTE JUST WRITTEN
;SET DIR flAG TO GO CACKWARDS
;AL=O DATA CDHPARE OK
;READING ZERO PATTERN?
TILL END
;WRITE IN BYTE LOC WE JUST READ
C6:
; WRITE_HO_MORE
;CONTINUE TIll 16K/4K BLOCK TESTED
iZERa PATTERN WRITTEN TO ~TG
EOltA. 740E
248
JE
C7
;YES - RETURN TO CALLER
E04t BAED
240
HOY
AH.AL
;SETUP TO NEW VALUE TO COMPARE
E04E 86F2
250
XCHG
DH.OL
E050 FC
E051 47
251
CLD
INC
;MOVE ZERO DATA PATTERN TO DL
;SET DIR flAG TO GO FORWARD
01
;SET POINTER TO BEG LOCATION
iREAD/URlTE FORWARD IN STG
E052 7408
252
253
£054 4F
254
f055 BAOIOO
2SS
EOSS ESOO
256
£05A
2S7
E05A C3
258
JZ
C4
DEC
01
MOV
DX,l
;SETUP 01 AND 00 PATTERNS
JHP
SHORT C3
;READ/WRITE BACKWARD IN STG
C7:
RET
259
STGTST
260
261
; -------------------------------------------;TEST.Ol
262
~63
ENOP
8088 PROCESSOR TEST
;DESCRIPTION
VERIFY 8088 FLAGS. REGISTERS AND CONDITIONAL JUMPS
264
----------------- ------ -------------- --- ----
265
;
EOSB
266
RESET
LABEL
E058 FA
267
START:
CLI
Eose B4D5
268
MOV
AH .OOSH
E05E 9£
26.
EOSF 734E
ERROl
i GO TO ERR ROUTINE IF CF NOT SET
f061 754C
270
271
SAHF
JNC
JUZ
ERROl
; GO TO ERR ROUTINE IF ZF NOT SET
ED63 7B4A.
272
JNP
ERROl
; GO TO ERR ROUTINE IF PF NOT SET
£065 7948
E067 9F
273
JN5
ERROl
274
LAHF
£068 8105
275
MOV
Cl.S
f06A D2EC
276
277
SHR
AH,CL
;GO TO ERR ROUTINE IF SF NOT SET
; LOAD flAG IMAGE TO AH
; LOAD CNT REG WITH SHIFT CNT
jSHIFT AF INTO CARRY BIT POS
ERROl
;SO TO ERR ROUTINE IF AF NOT SET
E06E B040
278
HOV
AL,40H
; SET THE OF F LAG ON
£070 ODED
270
SHL
AL,l
; SETUP FOR TESTING
fon
713B
280
JtlO
ERROl
; GO TO ERR ROUTINE IF OF NOT SET
£074 32Ft
281
XOR
AH.AH
iSET AH ;:: 0
E076 9£
282
SAHF
E077 7236
283
JC
E079 7434
284
JZ
ERROl
; GO TO ERR ROUTINE IF ZF ON
f078 7832
E07D 7A30
285
286
JS
ERROl
;GO TO ERR ROUTINE IF SF ON
JP
ERROl
; GO TO ERR ROUTINE IF PF ON
; LOAD CNT REG WITH SHIFT tNT
EObC 7341
JIlC
NEAR
;DISABLE INTERRUPTS
;SET SF, CF, ZF, AND AF FLAGS ON
;CLEAR SF". tF". ZF. ANO PF
ERROl
;GO TO ERR ROUTINE IF CF ON
287
LAHF
E08D B105
288
HOV
(L.s
E082 DZEC
28'
SHR
AH .Cl
; SHIFT
E084 7229
2.0
JC
ERROl
;GO TO ERR ROUTINE IF ON
EOB6 DOf4
201
SHL
AJhl
iCHECK 'THAT
E088 7025
202
JO
ERROl
;GO TO ERR ROUTINE IF ON
E07F 9F
.; LOAD FLAG IMAGE TO AH
AF'
INTO CARRY BIT POS
OF' IS CLEAR
203
REAOIWRITE THE: 80BS GENERAl AND SEGMENTATION REGISTERS
2.4
205
WITH ALL ONE'S AND ZEROES'S.
2.6
E08A BSFFFF
2.7
E08D F9
2.8
AX,OFFFFH
JSETUP ONE'S PATTERN IN AX
HOY
DS.AX
IWRITE PATTERN TO ALL REGS
MOV
BX.DS
MOV
STe
E090 SCDB
"0
300
E092 8EC3
301
NOV
ES.BX
E094 8CCt
302
MOV
CX.ES
£096 8EDl
303
MOY
SS.CX
E098 8C02
304
MOV
DX.SS
E09,\ 8BE2
305
MOV
SP,DX
E09C 6BEt
306
MOV
BP,SP
E08E 8E08
CS:
A-5
LOC OBJ
L1NE
sou Ref
E09E BBF5
307
NOV
Sl tBP
EOAO 8BFE
306
HOV
01,51
fOA2 7307
309
JNC
C9
EOA4 33C7
310
XOR
AX,DI
jPATTERU MAIRENT ADDRESS AtJD W-OPD
350
CHAt~11ElS.
V[PlrY TlIAT TIMER 1 FU!ICTIONS OK.
CGu~n
REGISTERS fOR All
nHTIl',lIZE At;O START OtlA FOR MEtlOPY REFRESH.
351
DISABLE DNA CONTROLLER
352
353
EOOA 9004
35'
HOV
Eooe E608
35S
OUT
;DISABLE DMA CONTROLLER
356
VERIFY THAT TIMER I FUNCTIONS OK
357
356
EOOE 8054
359
HOV
AL.54H
EOEO £643
360
OUT
TIMERt3.AL
EOE2 28C9
361
SUB
ex.ex
EOf4 8AD9
362
HOV
fOE6 8ACI
363
HOV
AL.CL
EOE8 E641
36.
OUT
TIMERtl.Al
EOEA
365
;SEl TIMER I.LSB,MOOE Z
Bl.CL
C12:
,SET INITIAL TIMER CNT TO 0
; TIMERl_BITS_DN
EOEA 8040
366
MO'I
AL.40H
EOEC E643
367
OUT
TIMERt3.AL
; LATCH TIMER 1 COUNT
,READ TIMER 1 COtmT
fOEE £441
366
IN
AL, TIMER-t-l
EOFO OA06
36.
OR
BL,Al
jAlL BITS ON IN TIMER
EOF2 80FBFF
CMP
BL.OFFH
iYES - SEE IF ALL BITS GO OFF
ECFS 7404
370
371
JE
C13
; TIMERl_BITS_OFF
EOF7 E2Ft
372
lOOP
ClZ
; TIMERI_BITS_ON
EOF9 EBB4
373
JMP
SHORT ERROl
;TIMER 1 FAILURE, HALT SYS
EOFB
37.
C13:
, TIMERl_BITS_OFF
EOFS 8AC3
375
HOV
AL,BL
EOFD 26C9
376
SUB
CX,CX
EOFF E641
377
OUT
TINERtl,AL
fl01
378
EIOI 6040
379
MOV
Al,40H
fl03 £643
360
331
OUT
TIMERt3.Al
EI05 E441
C14:
j
SET TIMER 1 CNT
; TIMER_lOOP
IN
AL.TIMER+l
j
LATCH TIMER 1 eoUNT
,READ TIMER 1 COUNT
EI07 2208
EI09 7404
382
AND
BL.AL
363
JZ
CIS
WRAP_DNA_REG
EIOB E2F4
3. .
LOOP
CI4
TIMER_LOOP
A-6
LaC OBJ
EIOD EBAD
LINE
SOURCE
JMP
385
SHORT ERROl
386
INITIALIZE TIMER 1 TO REFRESH MEMORY
307
388
ElOF
flOF 6054
elll E643
E113 B012
389
390
; WRAP_DHA_REG
C15:
;5EL TIM 1, lSB, MODE 2.
MOV
AL.54H
391
OUT
TIMER+3,Al
il.IRITE TIMER HODE REG
392
MOV
AL.I8
,SETUP DIVISOR FOR REFRESH
jl<:RITE TIMER 1 CNT REG
JSEND MASlER CLEAR TO DNA
EllS E641
393
OUT
TIMER+1.Al
E1l7 E600
394
OUT
DMA+ODH.AL
395
WRAP DNA CHANNElS ADDRESS ANO COUNT REGISTERS
396
397
E119 BOFF
398
EllB BADS
399
EllD 8AFB
400
AL,OFFH
il·IRITE PATTERt-I FFH TO All REGS
MOV
BL.Al
iSAVE PATTERN FOR COHPARE
MOV
BH.AL
MOV
CX.8
OX.OMA
OX,AL
iSETUP LOOP tNT
OUT
NOV
C16:
fllf 890800
401
E122 BADDOD
402
El2.5 EE
403
EI26 EE
40t.
OUT
OX,AL
JHSB OF 16 BIT REG
E127 B80101
405
MOV
C17:
iSETUP liD PORT AODR OF REG
jWRITE PATTERI'{ TO REG, LSB
110V
AX,OIOlH
,.boX TO ANOTHER' PAT BEFORE RD
EIU EC
406
III
Al.DX
EIZB BAED
Elza EC
EIZE 3B08
407
~lOV
408
IN
AH.Al
Al,OX
iREAD 16-BIT OHA CH REG. lsa
iSAVE LSB OF 16-BIT REG
jREAD MSB OF DHA CH REG
409
CtlP
BX.AX
;PATT[RN READ AS WRITTEN?
EnD 7403
41.
411
JE
C18
iYES - CHECK NEXT REG
E132 E97AFF
JtlP
ERROl
iNa - HALT THE SYSTEM
E135
412
CI8:
i NXT_DMA_CH
£135 42
413
INC
OX
iSET liD PORT TO NEXT CH REG
E136 EZED
414
LOOP
C17
E138 F6DO
415
NOT
Al
JZ
C16
;~ITE PATTERN TO NEXT REG
iSET PATTERN TO ZERO
,WRITE TO CHANUEL REGS
E13A 740F
416
417
INITIALIZE AND START OMA FOR MEMORY REFRESH.
418
419
EBe BOFF
EBE E601
42.
421
MOV
Al,OFFH
OUT
DHA+1.AL
OUT
DHMl,AL
iSH CNT OF 64K FOR RAM REFRESH
E140 E601
422
E142 B05S
423
~lOV
AL.058H
,SH DMA MODE ,CH 0 ,READ ,AUOTItfT
E144 E60B
424
OUT
DHA+OSH,AL
;WRITE DHA MODE REG
El46 BOOO
425
MOV
AL.O
; ENABLE DHA CONTROLLER
E148 E608
426
OUT
OHAt8.AL
;SETUP DHA COI1MAh'D REG
E14A E60A
OUT
DMA+I0 .AL
; ENABLE CHANNE L 0 FOR REFRESH
El4C 6041
427
428
NOV
AL,41H
E14E E608
429
OUT
DNAtOBH,AL
ElSO 6042
43.
NOV
Al.42H
EI52 E608
431
OUT
DMA+OBH,Al
E154 8043
432
NOV
AL,43H
433
OUT
DMA+OBH,AL
E156 E60B
434
; --- ------------
435
; TEST. 04
436
iSET MODE FOR CHANNEL 1
;SET MODE FOR CHANNEL 2
iSET MODE FOR CHANNEl 3
-----------------------------
BASE 16K REAOIWRITE STORAGE TEST
437
438
;DESCRIPTION
439
WRITE/READIVERIFY DATA PATTERNS FF ,55.AA..Ol. AND 00 TO 1ST 16K OF
VERIFY STORAGE ADDRESSABILITY.
440
STORAGE.
441
INITIALIZE THE 8259 INTERRUPT CONTROLLER CHIP FOR CHECKING
MANUFACTURING TEST 2 MODE.
442
443
i --------------------------------------------
444
DETERMINE MEMORY SIZE AND FILL HEMORY WITH DATA
Elsa 884.000
445
446
HOV
AX,DATA
E156 8E08
447
MOV
DS,AX
jPOINT OS TO DATA SEG
E150 8BlE7Z00
448
MOV
E161 26CO
44.
SUB
6X,RESET_FLAG
AX,AX
; SET ES AfID OS TO 0
E163 8ECO
450
MOV
ES,AX
; SETUP E5 SEGMENT REG
E165 8ED8
MOV
DS,AX
01,01
;SAVE
RESET_FLAG' IN BX
E167 ZBFF
451
452
SUB
EI69 E460
453
IN
AL.PORT_A
,DETERMINE BASE RAM SIZE
E168 240e
454
A1ID
AL,OCH
; ISOLATE RAM SIZE SW5
; CALCULATE MEMORY SIZE
E160 0404
455
ADO
AL, 4
E16F BlOC
456
MOV
CL. 12
El71 03EO
457
5HL
E173 88C8
458
NOV
AX. CL
AX
ex.
E175 BAED
459
MOV
AH, AL
EI77 Fe
460
46,
CLD
; SET OIR flAG TO meR
STOSB
,FILL BASE RAM WITH DATA
E178 AA
C19:
A-7
LOC OBJ
E179 E2FD
LINE
SOURCE
lOOP
4.2
lOOP TIL ALL ZERO
C1.
4.,
•• 4
DETERMINE 10 CHANNEl RAM SIZE
4.5
El7B E462
E17D 240F
4 ••
IN
AL.PORT_C
4.7
AND
AL.OfH
COl
E17F 7418
468
JZ
E181 BA0010
4.,
MOV
OX.lOOOH
El84 8AEO
470
MDV
AH.AL
MOV
AL.O
I10V
ES,DX
El86 BODO
471
El88
47'
473
El88 8ECZ
; SEGMENT FOR 110 RAM
; FIll_IO:
C20:
EISA 690080
H8D ZBFF
474
MOV
CX,BOOOH
475
SUB
OI.OJ
E18F F3
47.
REP
STOSB
OX.800H
i
fIlL 32K BYTES
El90 AA
El91 81C20008
.77
ADD
E195 FEee
E197 75£F
47&
DEC
AH
47.
JtlZ
C'O
480
INITIALIZE THE 82:59 INTERRUPT CONTROLLER CHIP
--------- ---------- --- ---. -- ------ .-.-. -----
'82
;
El'99
48.
C21:
£199 B013
.84
El9D B008
; FILl_IO
i ----------- ------ -- -------------- -------- ---
481
El9B £620
; NEXT SEGMENT VALUE
'8S
48.
MOV
Al.13H
OUT
INTAOO,AI..
MOV
487
OUT
488
MOV
AL.8
INTAOl.AL
AL,9
48.
OUT
INTAOI,AL
;ltWl - EDGE, SNGl, ICW4
;SETUP lewz - INT TYPE 8 (8-F)
E19F E621
HAl B009
ElA3 £621
EIAS 2Beo
4.0
SL'B
EIA7 8EtO
4"
MOV
ES,AX
•••
,
MOV
SI,DATA
;POINT OS TO DATA SEG
493
MOV
05,51
ElAE 891E72:00
494
MOV
RESET]LAG,BX
;RESTORE RESET]L.J.G
ElB2: 813E72003412
495
CMP
RESETJLAG,1234H
;RESETJLAG SET?
JE
C25
iYES - SKIP STG TEST
MOV
DS.AX
,POUlT OS TO 1ST 16K OF STG
ElA9 8E4000
EIAC SEDE
EIB8 743B
ElBA 8ED8
•••
4.7
4.8
AX,AX
; POINT OS AND ES TO BEGIN
;
-------- - ---- -- ------- --- -------------------
;
-- ------ -- --------- -- - ------ -------- ---- -- --
OF IUW STORAGE
CHECK FDR MANUFACTURING TEST 2. TO LOAD TEST PROGRAMS FROH KEYBOARD.
4.9
500
;SETUP ICW4 - BUFfRD,8086 MODE
EIBC BCF03F
501
MOV
EIBF 8EOO
MOV
55, AX
ElCl 8BF8
50'
50.
MOV
01, AX
ElC3 882400
504
MOV
BX, 24H
EIC6 C10186E2
505
MDV
WORD PTR [BXJ.OFFSET Dll
EICA 43
50.
INC
EICB 43
507
INC
BX
BX
; ESTABLISH TEttPORARY STACK
SP. 3FFOH
;SET UP KB INTERRUPT
[BXJ,CS
ElCC 8COF
508
MOV
EleE E88704
509
CALL
KBD_RESET
; READ IN KB RESET COOE TO BL
ElDl 80F865
510
CNP
BL,065H
; IS TlfIS MANUFACTURING TEST 2?
EI04 750E
511
JNZ
C2l
; JUMP IF NOT MAN. TEST
EID6 B2FF
512
MOV
OL.255
; READ IN TEST PROGRAM
EID8 E8BA04
51>
EIDB 8AC3
514
EIDD AA
C22:
CALL
SP_TEST
MOV
AL.BL
515
STOSS
ElOE FEeA
51.
DEC
Dl
flED 15F6
517
JNZ
C22
; JUMP IF NOT DONE YET
ElE2: CD3E
518
XUT
3EH
;SET INTERUPT TYPE 62: ADDRESS F8H
ElE4
ElE4 DE
51'
520
PUSH
CS
ElES 11
521
POP
55
;CONTINUE IN NORMAL HODE
e2:3:
j
PUT 55 BACK
EIE6 FA
52.
ell
ElE1 Be18EO
523
MOV
SP.OFFSET CZ
.SETUP RETURN ADDRESS
ElEA EnDFE
524
JMP
STGTST
;GO TO RDIWRT STS SUBROUTINE
EIED 7403
525
JE
C25
JGO TO NEXT TEST IF OK
ElEF E9BDFE
526
JMP
ERROl
C24:
527
528
SETUP STACK SES AND SP
529
E1FZ
~30
ElFZ B83000
5>1
MDV
AX ,STACK
; GET STACK VALUE
EIFS 8EDO
5>2
MOV
SS.AX
; SET THE STACK UP
ElF7 BCOOOI
5»
MDV
SP.OFFSET TOS
; STACK IS READY TO GO
C25:
534
535
53.
A-8
SETUP THE tlMI INTERRUPT VECTOR POINTER
LOC OBJ
LINE
SOURCE
EIFA 26C7060aOaC3EZ R
537
NOV
ES:NMI_PTR,OFFSET NMI_INT
f201 26C7060AOOOOFO R
538
NOV
ES:NHI_PTR+2.CODE
f208 EnAOO
539
540
JNP
T5T6
f208
fl08 890020
fZOE 32:CO
541
ROS_CHECKSUM
542
E210
543
544
E210 2E0207
PROC
NOV
eX.BIn
XOR
AL,Al
jGO TO NEXT TEST
NEAR
; NEXT_ROS_MODUlE
iHUMBER OF BYTES TO AIlD
C,6:
AL,CS:[BX]
545
AOO
£213 43
546
INC
BX
E214 EZFA
547
lOOP
C26
JADD All BYTES IN ROS MODULE
£216 OACO
546
OR
AL,Al
;SUM
E218 C3
549
;POINT TO NEXT BYTE
=
O?
RET
ENOP
550
ROS_CHECKSUM
551
552
; -------------------------------------; INITIAL RELIABILITY TEST -- PHASE Z
553
;'---- -----------------------------------
554
ASSUME
CS:COOE,ES:.ABSO
555
E219 50415249545920
556
01
557
OIL
De
'PARITY CHECK 2'
43484543482032
DaDE
E227
50415249545~
43484543462031
$-01
EQU
556
02
DB
559
560
Oll
EQU
561
i1E51.06
'PARITY CHECK I'
,/
OOOE
; -- ------ ---------- ------------------ --------
562
563
8259 INTERRUPT CONTROLLER TEST
;DESCRIPTION
564
READ.lWRITE THE INTERRUPT MASK REGISTER I IMR J WITH ALL ONES AHO ZEROES.
565
566
HOT INTERRUPTS (UNEXPECTED).
ENABLE SYSTEM INTERRUPTS.
MASK DEVICE INTERRUPTS OFF _
567
; -------------- --------------------- --- ------
E235
566
1516:
E235 2BCO
569
SUB
AX.AX
E237 8ECO
570
MOV
ES.AX
CHECK FOR
;SET UP ES REG
571
S7Z
j------ SET UP THE INTERRUPT 5 POINTER TO A DUMMY
573
E239 26C706140054FF R
E240 26C706160000FO F!
574
575
NOV
ES:INT5_PTR,QFFSET PRINT_SCREEN
MOV
ES: INTS_PTR+2, CODE
; PRINT SCREEN
576
577
TEST THE IHR REGISTER
576
579
eLI
E248 BOOO
580
NOV
AL,O
E24A E621
581
OUT
INTAOl.AL
E247 FA
iOIABLE INTERRUPTS
Al.ItHAOl
; SET INR TO ZERO
jREAD IMR
E24C E421
582
IN
E24E OACO
583
OR
AL.Al
;INR = O?
E250 7526
584
JllZ
06
;60 TO ERR ROUTINE IF NOT 0
E252 BOFF
585
NOV
AL.OFFH
jDISABLE DEVICE INTERRUPTS
E254 E621
586
OUT
INTAOI,Al
;\ol~ITE
E256 £421
587
HI
Al.INTAOI
jREAO Itm
E258 0401
58.
AOO
Al,!
; ALL INR BIT ON?
ElSA. 7521
58.
JNZ
06
; NO - GO TO ERR ROUTINE
TO IMR
590
CHECK FOR HOT INTERRUPTS
591
592
Else Fe
593
iSET OIR FLAG TO GO FORWARD
CLO
E250 890800
594
MOV
eX,8
H6D BF2000
f263
f2:63 8886E2
595
NOV
OI,OFFSET 1NT_PTR
597
MOV
AX.OFFSET 011
E266 AS
596
STQSW
596
03:
f267 BBOOFO
599
MOV
600
STOSW
E268 83C304
601
ADD
602
JGET ADDRESS OF INT PROt TABLE
; VECTBLO:
noA AS
f26E ElF]
; SETUP TEMP IHT RTNE IN PRT TBl
lOOP
iMQVE ADDR OF INTR PROt TO TSl
AX,CODE
;GET AODR OF INTR PROt SEG
BX.4
03
; SET BX TO POINT TO NEXT VAL
; VECTBlO
603
INTERRUPTS ARE MASKED OFF.
604
CHECK THAT NO INTERRUPTS OCCUR.
605
E270 32E4
606
XOR
AH,AH
;ClEAR AH REG
E272 fB
607
STI
E273 26C9
608
SUB
ex.ex
Ez.75 EZFE
609
04:
lOOP
04
; ENABLE EXTERNAL INTERRUPTS
;WAIT 1 SEC FOR ANY INTRS THAT
; NIGHT OCCUR
E277 ElFE
610
05:
lOOP
05
E2:79 OAE4
6"
OR
AH.AH
;010 ANY INTERRUPTS OCCUR?
A-9
LOC OBJ
LINE
EZ7B 7408
612
E27D BADIOI
613
E280 EBAD03
SOURCE
06:
61.
JZ
D7
; NO - GO TO NEXT TEST
tlOV
DX.lOIH
;BEEP SPEAKER IF ERROR
CALL
ERR_BEEP
;GO TO BEEP SUBROUTINE
E263 FA
615
eLI
E284 F4
61.
HlT
617
618
;
--------------------- -----------------------
lTEST.7
8253 TIMER CHECKOUT
619
620
,DESCRIPTION
621
VERIFY THAT THE SYSTEM TIMER (01 DOESN'T COutlT TOO FAST NOR
--------------------------------------------
623
;
624
07:
E265 8400
625
MOV
AH.O
;RESET TIMER INTR REevo FLAG
E287 32EO
626
XOR
CH,CH
;CLEAR THE CH REG
MOV
AL.OFEH
E289 BOFE
roo
SLOW.
622
E285
iHAl T THE SYSTEM
627
;MASK ALL INTRS EXCEPT lVL 0
E288 E621
628
OUT
INTAOl,AL
;WRITE THE 8259 IMR
E280 BOlO
62'
MOV
AL,DODIDoooe
;SEL TIM 0, lSB. MODE O. BINARY
E26F E643
630
OUT
TIM_CTl,Al
;WRITE TIMER CONTROL MODE REG
E291 8116
631
tl0V
CL,16H
; SET PGM lOOP CNT
Ei::93 SACl
632
"OY
Al.Cl
i SET TIMER a CNT REG
EZ95 E640
63>
OUT
TIMERO.AL
;WRITE TIMER 0
TEST
AH.OFFH
iDID TIHf.R a INTERRUPT OCCUR?
JtlZ
09
;. YES - CHECK TINER OP FOR SLOW TIME
08
iWAIT FOR INTR FOR SPECIFIED TIME
EZ97 F6C4FF
634
E,9A 7504
635
E,9C E,F9
08:
LOOP
636
E,9E EBOD
637
EZAO B112
638
E2A, BOFF
E,A4 E640
C~H
REG
TIMER 0 INTR OION T OCCUR -
J~\P
06
HOV
CLol6
;. sn PGH LOOP CNT
63'
MOV
Al.OffH
; loo.'lHTE TIMER 0 CNT REG
09:
j
64.
OUT
TIMEPO,Al
E,Ab B400
641
MOV
AH.O
,RESET WTR RECEIVED FLAG
E2A8 BOFE
642
MOV
At,OFEH
;.REENABLE TIMER a ItITERRUTS
INTAOl,Al
E2AA E621
643
E,AC F6C4FF
644
TEST
AH .OFFH
;DID TIMER 0 INTERRUPT OCCUR?
ElAF 75CC
645
JUZ
06
;YES -
E281 EZF9
646
lOOP
010
iWAIT FOR INTR FOR SPECIFIED TIME
..J11P
T5T6
,GO TO NEXT TEsr ROUTINE
E2B3 E93600
647
OUT
ERR
010:
650
-- ----- -- ------------------ - ---------------TEMPORARY INTERRUPT SERVICE ROUTINE
;--------------------------------------------
E,86
651
Dll
HB6 8401
652
648
649
TIMER CNTING TOO FAST, ERR
;.
PROC
NEAR
MOV
AH,l
E,B8 50
653
PUSH
AX
jSAVE REG AX CONTENTS
EZB9 BOH
654
MOY
Al.OFF"
;MASK ALL INTERRUPTS OFF
£2BB E6Z1
655
OUT
INTAOl,Al
EzaD BOZO
656
MOV
AL.EO!
E2Bf E6,0
657
OUT
INTAOO.AL
Elel 58
658
POP
AX
E,CZ CF
659
660
;RESTORE REG AX CONTENTS
IRET
011
ENDP
661
NEAR
662
NMI_INT PROC
EZC3 50
663
PUSH
EZC4 E462
66'
665
IN
AL,PORT_C
TEST
AL.40H
;. 10 CH PARITY CHECK?
EZC3
EZC6 A840
AX
;. SAVE ORIG CONTENTS OF AX
EZC6 7406
666
JZ
667
fl0Y
01'
SI ,OffSET 01
; YES - flAG IS SET TO 0
EZCA. 8El9EZ
fZCD 690EOO
668
MOV
CX.Oll
iMSG LENGTH
EZDO EeOA
669
JMP
SHORT 013
jOISPlAY ERROR HSG
fZO,
670
f,OZ A880
671
TEST
At.80H
iPlANAR RAN P-CHECK?
;. AOOR OF ERROR MSG
012::
JZ
014
IND - AUX tNT
E2.0& BEZ7EZ
673
"OV
51 • OF FSET DZ
; AODR OF ERROR MSG
fl09 MOEDO
674
MOV
eX,Oll
iMSG LENGTH
ElOC
675
AX.!)
; nUT AUt) SET MODE FOR VIDEO
EZ04 7410
672
E20C B80000
013:
MOV
676
E,DF COlO
677
INT
10H
lCALL VIOEO_to PROCEDURE
ElEl £8E603
678
CALL
P_NSG
;PRINT ERROR HSG
EZE4 FA
679
ElE5 F4
68'
EZE6
681
ElE6 58
EZE7 CF
A-tO
682
eLI
;HALT SYSTEM
HlT
014:
POP
683
IRET
68.
NMI_INT ENOP
AX
;.RESTORE ORIG CONTENTS Of AX
lOC OBJ
LINE
685
686
687
688
SOURCE
j-------------------------------------------------------- ------------------
.
; INITIAL RELIABILITY TEST -- PHASE 3
ASSUME
CS :COCE ,DS:DATA
689
f2E8 20323031
0004
69,
El
DB
691
Ell
EQU
201 '
$-E1
6n
ESTABLISli 8IOS SUBROUTINE CAll INTERRUPT VECTORS
693
694
[2Ee
695
T518:
; SET DIR flAG TO GO FORWARD
f2Ee Fe
696
CLD
E.ZED SF4DOO
697
MDV
E2FO DE
698
PUSH
CS
; SETUP A.ODR OF VECTOR TABLE
; OFFSET VECTOR_TABlE+3Z
oI.OFFSET VIDEO_IHT
699
POP
as
ElF2 BE13FF
700
Mav
SI,OFF13H
EZFS S92000
701
MOV
eX.20H
702
REP
MOVS\.I
E2Fl IF
EZF8 F3
iSETUP AODR TO INTR AREA
;MOVE VECTOR TABLE TO RAM
EZF9 AS
703
SETUP TIMER 0 TO HODE 3
704
705
EZfA BOff
706
MOV
Al.OFFH
E2fC E621
707
OUT
INTAOt.At
EZFE B036
708
MOV
Al.3&H
iSEl TIM O.lSB.t1SB.HODE 3
BOO [643
709
OUT
TIMER+3,AL
iWRITE TIMER HODE REG
E302 BODO
710
MOV
AL.O
EJ04 E640
711
OUT
TIMER.AL
;WRITE LSB TO TIMER 0 REG
n06 E640
712
OUT
TIMER,AL
;WRITE M58 TO TIMER 0 REG
;DISABLE ALL DEVICE INTERRUPTS
713
714
SETUP TUIER 0 TO BLINK LED IF MANUFACTURING TEST HODE
715
ASSUME
DS:DATA
E308 884000
71'
717
MOV
AX.DATA
nOB 8E08
718
MOV
DS,AX
nOD E87803
719
CALL
KBD_RESET
;SEND SOFTWARE RESET TO KEYBRD
E310 80FBAA
7Z0
,POINT DS TO DATA SEG
CM?
BL.OAAH
;SCAN CODE
E313 7426
7Z1
JE
E3
; YES - CONTINUE (NON MFG MODE)
£lIS B03C
7Z2
MOV
Al,3CH
;EN KBD. SET KBD CLK LINE LOW
OUT
PORT_B.AL
;"''RITE 8255 PORT B
;WAS A BIT CLOCKED IN?
£317 E661
7Z3
E319 90
7Z4
HOP
E3lA 90
7Z5
Nap
E31B £460
AA' RETURNED?
7Z6
IN
AL,PORT_A
EllD 24FF
727
AND
AL,OFFH
E3lf 7516
728
JNZ
E.
;YES - CONTINUE (NON MfG MODE)
E3l! FE061200
7Z.
INC
MFG_TST
; ELSE SET SW FOR MFG TEST MODE
E325 26C7062000B2£6 R
730
MOV
ES:INT_AoDR.OFFSET BLINK_1NT
;SETUP TIMER INTR TO BLINK LED
E32C 26C706220000FO R
731
MOV
ES: INT_ADDR+2 .CODE
E333 BOfE
732
MOV
AL,OFEH
E33S E621
733
OUT
INTAOl.Al
E337
734
E337 Boce
735
MOV
AL.DCCH
E339 E661
736
OUT
PORT_B.AL
737
738
E2:
; JUMPER_NOT_IN:
---------------
;RESET THE KE'I'BO.lRD
-- --------------------------
;TEST.OS
739
740
; ENABLE TIMER INTERRUPT
ROS CHECKSUN I I
,DESCRIPTION
741
A CHECKSUM IS DONE FOR THE 4 ROS MODULES CONTAINING BASIC COOE
742
i -- ------------------------------------------
EBB
743
E3:
E338 8204
744
£330 BB0060
745
El40
E340 E8C8FE
74'
747
£343 7507
748
£345 fECA
749
E347 7SF7
750
MOV
DL.4
; NO. OF ROS MODULES TO CHECK
MOV
BX.6000H
;SETUP STARTING ROS ADDR
CALL
ROS_CHECKSUH
JNE
E5
;BEEP SPEAKER IF ERROR
DEC
Ol
;AHY MORE TO DO?
JNZ
E4
oYES - CONTINUE
JHP
E6
E4:
; CHECK_ROS:
£349 E80790
751
E34C
752
E34C BAOI0l
753
MOV
E34F E8DE02
754
CAll
;NO - GO TO NEXT TEST
o ROS_ERROR:
E5:
DX.IOIH
ERR_BEEP
,BEEP SPEAKER
A-II
LOC OBJ
LINE
SOURCE
------- -------------------------------------
755
;
756
;TE51.08
INITIALIZE AHO START CRT cmnROllEp. (68451
757
TEST VIDEO READ/WRITE STORAGE.
758
759
;DESCRIPTION
SIG~lAL.
760
RESET THE VIDEO EtlABlE
761
SELECT ALPHANUMERIC MODE. 40
762
READ/UIUTE DATA PATl[::tlS TO STG. CHECK STG ADDRESSABlllTY.
*
,5. B & W.
----------- --- ----- ----- ---- ----------------
763
;
E352
76.
E6:
£352 E460
765
IN
AL,PORT_A
E354 8400
7••
HOV
AH,O
£356 A31000
767
HOV
EQUIPJlAG.AX
E359 2430
AND
Al.3DH
ElS8 7503
7'8
7 ••
JNZ
E7
;VIDEO SWS SET TO 01
ElSD E99800
770
JMP
n.
;SKIP VIDEO TESTS FOR BURN-IN
; TEST_VIDEO:
£7:
;READ SENSE SWITCHES
;STORE SENSE SW ItlFO
; ISOLATE VIDEO SUS
E360
771
E36D 86EO
772
XCHG
AH,AL
£362 eOFC30
773
eMP
AH.30H
;B/W CARD ATTACHED?
77.
JE
E8
; YES - SET MODE FOR 8/W CARD
775
INC
AL
;SET COLOR HODE FOR COLOR CO
n6S 7409
067 FEtD
E369 80FC2:0
77.
eMP
AH.2:0H
;80X25 t10DE SELECTED'?
E36C 7502
777
JNE
E8
;NO - SET HODE FOR 40X2:5
E36E BOO]
778
HOV
AL.3
;SET HOOE FOR 80XZ5
E370
77.
E370 50
780
PUSH
AX
iSAVE VIDEO HODE ON STACK
E371 2AI:4
781
SUB
AH.AH
; INITIALIZE TO ALPHANUMERIC P1D
E373 COlO
762
INT
10H
JCAll VIDEO_IO
E375 58
783
POP
784
PUSH
AX
AX
jRESTORE VIDEO SENSE SWS IN AH
E376 50
E8:
; SET_MODE:
; RESAVE VALUE
£377 B800BO
785
NOV
BX,OBQOOH
;BEG VIOEO RAM ADOR B/w CD
EllA BA8803
76.
HOV
OX,3BSH
;HoDE REG FOR B/W
E37D MOOIO
787
HOV
CX,4096
;RAH BYTE CNT FOR B/W CD
El80 8001
788
HOV
AL,I
; SET HODE FOR BW CARD
E382: BOFC30
78'
790
CtlP
AH,30H
;B/W VIDEO CARD ATTACHED?
JE
EO
; YES - GO TEST VIDEO STG
HOV
BX.OB800H
El8A 8A0803
7'1
792
HOV
OX,308H
jMQOE REG FOR COLOR CD
E38D 890040
793
HOV
CX,4000H
;RAH BYTE CNT FOR COLOR CO
£390 FEce
79.
DEC
AL
; SET HOOE TO 0 FOR COLOR CD
E392
7.,
E3B5 740B
E387 8B0088
£9:
iBEG VIDEO RAM ADOR COLOg CD
; TEST_VIDEO_STG:
E392 EE
79.
OUT
OX.AL
jOISABLE VIDEO FOR COLOR CD
£"393 BEC3
797
HOV
ES,BX
; POINT ES TO VIDEO RAM STG
AX.DATA
;PDINT OS TO DATA SEGMENT
796
HOV
E398 8£08
7 ••
HOV
OS,AX
£39A 813E72003412:
£395 B84000
600
eMP
RESET_FlAG,l2:34H
E3AO 7400
801
JE
no
E3A2: BEOB
602
HOV
OS.BX
; POINT OS TO VIDEO RAM STG
E3A4 E876FC
803
CALL
STGTST_CNT
.GO TEST VIDEO RI'W STG
;POD INITIATED BY KSD RESET?
; YES - SKIP VIDEO RAM TEST
E3A7 7406
80.
JE
no
; STG OK - CONTINUE TESTING
E3A9 BA02:01
805
HOV
DX.I02:H
;SETUP I OF BEEPS
E3AC E88102:
8 ••
CALL
ERR_BEEP
,GO BEEP SPEAKER
807
808
; --------j.TEST .09
SETUP VIDEO DATA ON SCREEN fOR VIDEO LINE TEST.
809
810
;DESCRIPTION
EIIABLE VIDEO SIGNAL Aim SET HODE.
611
812
E3Af
-----------------------------------
DISPLAY A HORIZONTAL BAR ON SCREW.
813
;--------------------------------------------
81.
ElO:
E3Af 58
815
POP
81'
817
PUSH
AX
AX
;GET VIDEO SENSE SWS (AH)
E3BO 50
HOV
AH,O
; EUABLE VIDEO AND SET MODE
E3BI 8400
;SAVE IT
E383 COlO
818
INT
10H
; VIDEO
E385 882:070
81.
MOV
AX.702:0H
;WRT BLANKS IN REVERSE VIDEO
nBS 2BFF
SUB
OI,OI
; SETUP STARTING LOC
E3BA B92:800
8"
821
HOV
CX.40
iNO. OF BLANKS TO DISPLAY
nBD FC
6"
CLO
nSE f3
823
REP
ST05W
;WRITE VIDEO STORAGE
E3BF AS
A-12
;SET OIR flAG TO INCREMENT
LOC OBJ
LINE
SOURCE
824
;--------------------------------------------
825
JTEST .10
8,6
827
CRT INTERFACE LINES TEST
jDESCRIPTION
SENSE ON/OFF TRANSITION OF THE VIDEO ENABLE AND HORIZONTAL
828
SYNC LINES.
829
830
nco
;
----------- ---- --- --- ------- ----------------
58
831
POP
AX
,GET VIDEO SENSE SW INFO
nCI 50
DC2 80FC30
832
PUSH
AX
;SAVE IT
8"
834
eMP
AH,30H
jB/W CARD ATTACHED?
E3C5 BABA03
MOV
OX,03BAH
.SETUP ADDR OF BW STATUS PORT
nCB 7403
835
JE
Ell
; YES - GO TEST LINES
MOV
DX,03DAH
;COLOR CARD IS ATTACHED
MOV
AH.8
SUB
ex.ex
IN
AL.DX
;READ CRT STATUS PORT
.CHECK VIDEOIHORZ LINE
; ITS ON - CHECK IF IT GOES OFf
E3eA BAOA03
836
nco
837
E3tD 6408
838
Ell:
; LINE_1ST:
EI;?::
EXF
83.
nCf 28C9
n01 EC
840
E302 22C4
842
8",
ANO
AL.AH
EJDct 750ct
JNZ
El4
nOb E2F9
844
LOOP
El3
; LOOP TIll ON OR TIMEOUT
E30B EB13
845
JMP
SHORT £17
; GO PRINT
841
E13:
; OFLOOP_CNT:
ERRO~
MSG
nOA 2BC9
846
E14:
SUB
cx,cx
not
847
E15:
IN
AL.DX
.READ CRT STA.TUS PORT
EC
nOD 22C4
848
ANO
AL.AH
;CHECK VIfJEO/HORZ LINE
E3DF 7404
84.
850
JZ
El6
; ITS ON - CHECK NEXT LINE
nEl ElF9
LOOP
El5
; LOOP IF OFF TIll IT GOES ON
E3E3 EB06
851
JMP
SHORT E17
E16:
; NXT_LINE:
nE5
852
nE5 6103
853
MOV
CL.3
E3E7 OlEC
854
SHO
AH.CL
E3E9 75E4
855
E3E8 EB06
856
E3ED
857
nED BA0201
65.
E3FO E83002
859
;6ET HEXT BIT TO CHECK
JNZ
El2
;GO CHECK HORIZONTAL LINE
JMP
SHORT £18
;DISPLAY CURSOR ON SCREEN
MOV
OX.I02H
E17:
; CRT_ERR:
CAll
ERR_BEEP
E3F3
•• 0
E3F3 58
861
POP
AX
;GET VIDEO SENSE SWS tAH J
E3F4 8400
862
MOV
AH.O
iSH tlOoE AND DISPLAY CURSOR
'f3F6 COlO
8.3
lin
IOH
;CALL VIDEO 1/0 PROCEDURE
864
--------------------------------------------
6.5
;
;TEST .11
666
,.7
;DESCRIPTION
ADDITIONAL READI"WRITE STORAGE TEST
WRITE/READ DATA PATTERNS TO ANY READ/WRITE STORAGE AFTER THE BASIC
868
869
870
16K.
872
E3F8 884000
873
874
E3FB 8E08
STORAGE ADORESSABIlITY IS CHECKED.
; - - - - - - - - - - - - - -------------------------------
ASSUME
871
BF8
;GO BEEP SPEAKER
; DISPLAY_CURSOR:
E18:
DS:DATA
E19:
MOV
AX.DATA
MOV
OS.AX
875
DETERMINE RAM SIZE ON PLANAR BOARD
87.
877
E3FD 8A261000
878
E401 80E40C
.79
E404 B004
E406 F6E4
AH .BYTE PTR EQUIP_flAG
; GET SENSE S!.lS INFO
AND
AH.OCH
; ISOLATE RAM SIZE SWS
MOV
AL-.4
MOV
880
881
HUL
AH
E408 0410
882
AOO
AL.16
; ADO BASIC 16K
£40A 8800
883
MOV
DX.AX
;SAVE PLANAR RAM SIZE IN OX
E40C 8608
8B4
MOV
BX.AX
;
885
. .6
DETERMINE 10 CHAtlNEl RAM SIZE
AND IN ex
887
E40E E462
888
IN
Al,PORT_C
; READ 10 CH RAM SIZE SWS
£410 240F
88'
8.0
ANO
AL,OFH
; ISOLATE FROM OTHER BITS
MOV
AH,32
E414 F6£4
891
MUL
£416 A31500
892
MOV
IO_RAM_SIZE,AX
; SAVE 10 CHANNE l
£419 83F840
893
eMP
BX,40H
;PLANAR RAM SIZE:: 64K?
E412 8420
E41C 7402
894
E41E l8CO
895
E420
89.
AH
JE
E20
SUB
AX,AX
E20:
; YES -
RAM SIZE
ADO 10 CHN RAM SIZE
; NO - DON T ADD ANY 10 RAM
; ADD_IO_SIZE:
AOO
E420 03C3
897
AX.BX
;SUM TOTAL RAM SIZE
E422 A31300
898
t10V
MEMORY_SIZE,AX
;SETUP MEMORY SIZE PARH
E425 813E72003412
899
eMP
RESETJLAG.IZ34 t1
;POO INITIATED BY KBD RESET?
A-13
LOC OUJ
£428 7440
LINE
SOURCE
JE
'00
i YES - SKIP MEI10RY TEST
E22
'01
TEST ANY OTHER READ/WRITE STORAGE AVAILABLE
'0'
.03
£420 8BOO04
E433 3801
E43!i 7646
.0'
.05
.0.
.07
.08
E437 8ED8
.0.
£430 891000
E433
E439 8EC3
NOV
BX.400H
NOV
eX.16
CMP
E21:
'10
.11
OX,ex
;ANY tIORE 51G TO BE TESTED?
JBE
En
;NO - GO TO NEXT TEST
MOV
NOV
os.ex
tX,16
BX,400H
.15
'1'
PUSH
£445 E8D2FB
.1.
CALL
CX
BX
OX
51G15T
E448 SA
'17
E449 5B
E44A 59
£448 74E6
'18
POP
PDP
POP
JE
OX
BX
CX
EZI
£438 83CnO
£43£ 81C30004
E442 51
E443 53
E444 52
'1'
.13
'1'
•• 0
i SETUP STG ~DR IN OS AND ES
ES.BK
ADD
ADD
PUSH
PUSH
; INCREMENT srG BYTE COUNTER
; SET POINTER TO NEXT 161<; BLK
.SAVE REGS
;GO TEST A 16K BLK OF STS
;RESTORE REGS
;CHECK IF I10RE STG TO TEST
'Z1
OZ •
• 23
PRINT FAILING ADDRESS AND )(OR'ED PATTERN IF DATA COMPARE ERROR
'2'
OZ5
MOV
MOV
DX.DS
;CONVERT FAILING HIGH-ORDER
CH.Al
;SAVE FAILING BIT PATTERN
'2.
.27
AL,OH
Cl.4
•• 8
NOV
NOV
SH•
iGET FAILING ADDR (HIGH BYTE)
£453 B104
E455 OZES
AL,CI.
;RIGHT-JUSTIFY HIGH BYTE
;CONVERT AND PRINT CODE
EltCtD 8CD'"
E44F 8Af8
E451 SAC6
•••
CALL
XLAT_PRINT_CDDE
930
931
MDV
AL,I)H
AND
Al,OFH
E4SE E83700
93.
CALI.
XLAT_PRINT_CDDE
;CONVERT AND PRINT CODE
MOV
MOV
SH.
Al,eH
;GET FAILING BIT PATTERN
CL,4
j
CALL
XLAT_PRINT_CDDE
.,,.
Al,CH
;GET FAILING BIT PATTERU AND
Al,OFH
;
E457 E83EOO
E454 8AC6
E45C 240F
£461 8ACS
.33
E463 BI04
93.
£465 D2E8
935
93.
937
938
E467 E82EOO
E46. 8AC5
E46C 240F
£46E E82700
E471 BEEeH
£474 690400
E477 E65002£47...
E47J. E94AOO
E.7D
E47D B84000
£480 8£08
£482 SB161500
£486 0602
1:488 74fO
E48... B90000
E46D 81FBOOIO
E491 77E7
£493 B80010
Elt96 E898
MOV
AND ISOLATE LEFTMOST NIBBLE
Al,Cl
;CONVERT AND PRINT CODE
ISOLATE RIGHTMOST NIBBLE
93.
CALL
XLAT_PRINT_CDDE
;CONVERT AND PRINT CODE
.40
941
MOV
MOV
SI,OFFSET £1
.SETUP ADDRESS Of ERROR MS6
ex,Ell
;GET M5G BYTE coum
CAll
P_MSG
; PRINT ERROR MSG
JMP
TST12
.4.
943
•••
•••
945
947
948
•••
...
'50
'51
.53
'54
.55
.5.
'57
£22:
; GO_TSTlZ:
; GO TO NEXT TEST
E23:
; STG_TEST_DONE:
MDV
NOV
NOV
O•
JZ
MOV
AX,DATA
,POINT OS TO DATA SEGMENT
5 CH6 "AD£ 3/2:7/81
OS.AX
DX,IO_RAM_SIZE
;GET 10 CHANNEl RAM SIZE
DX,DX
;SET fLAG RESULT
...
HID 10 RAM. GO TO NEXT TEST
ex,o
i HAS 10 RAM BEEN TESTED
CMP
JA
MDV
BXolOOOH
E22
j
BX,lDOOH
; SETUP BEG LOe FOR 10 RAI1
JMP
SHORT E21
;GO TEST 10 CHANNEL RAM
YES - GO TO NEXT TEST
j -- ------ -- ------ - ------ - ---------- --- -------
CONVERT AND PRINT ASCII CODE
'58
'5'
•• 0
961
E498
£498 IE
£499 OE
£49A IF
E49B BBB7Elt
E49£ 07
E49F ectOE
E4AI 8700
E4A3 CDIO
E4AS IF
E4A6 C3
A-14
•••
•• 3
•••
9.5
•••
967
•• 8
•••
'70
'71
97.
973
Al I1UST CONTAIN NUMBER TO BE CONVERTED.
AX AND ex DESTROYED •
-- ------ -- ----------------- ------- ----------
;
XLAT_PRINT_CODE
P.OC
HEAR
ISAvE DS VAI,.UE
PDP
OS
CS
OS
IIDY
BX,OE467H
I OffSET ASCII_ T8l-XlAT TABLE
PUSH
PUSH
; POINT OS TO CODE SEG
XLATB
MDV
MDV
UlT
PDP
RET
XLAT_PRINT_toDE
AH,lft
6H,O
10H
OS
...,p
.CALL VIDEO_IO
;RESTORE ORIG VALUE IN DS
LOC OBJ
LINE
974
SOURCE
;
--------------------------_.---------------------._--------------------------
975
; INITIAL RELIABILITY TEST --. PHASE 4
97.
;
ASSUME
977
E4A7 Z0333031
0004
E4AB 313331
00-03
E4AE 363031
0003
976
Fl
979
CS :CODE .DS:OATA
DB
• 301'
FlL
EOU
$-Fl
; KEYBOARD MESSAGE
98'
FZ
DB
96'
F2L
EOU
j
962
F3
DB
'131 '
$-FZ
'601 •
F3L
EOU
$-F3
; DISKETTE MESSAGE
F4
LABEL
WORD
; PRINTER SOURCE TABLE
963
CASSETTE MESSAGE
96'
E4Bl
965
E481 BC03
96.
OW
36CH
£483 7803
987
OW
378H
E485 780Z
968
E487
989
'4E
99'
ASCICT6L
991
;
992
ITEST.12
E481 30313Z33343536
OW
2:78H
LABEL
WORD
'0123456 789ABCDEF'
DB
373133941424344
4546
----------------------------------- ------._-
993
994
KEYBOARD TEST
;OESCRIPTION
995
PESET THE KEYBOARD AND CHECK THAT SCAN CODE
996
TO THE CPU.
AA' IS RETURNED
CHECK FOR STUCK KEYS.
---_.---_.-----._- --------------------------
997
;
E4C7
998
TSTl2:
E4C7 B84000
999
MOV
AX,DATA
E4CA 8ED8
1000
MOV
DS.AX
E4CC 803El£:0001
1001
CM"
tlFG_TST .1
;MAUUfACTUIUHG TEST MODE?
£401 7439
£403 £88201
1002
1003
JE
'7
CAll
KBD_RESET
£406 £32B
1004
JCXZ
,.
; YES - SKIP KEYBOARD TEST
J ISSUE SOFTWARE RESET TO KEYBRD
E4D8 B040
1005
I10V
Al.4DH
;POINT os TO DATA SEG
; PRINT ERR HSG IF NO INTERRUPT
;ENABLE KEYBOARD
E40A £661
1006
OUT
PORT_B.Al
E40C BOFBAA
1007
eMP
BL,OAAH
;SCAN CODE AS EXPECTED?
E4DF 7522
1008
JNE
F.
;NO - DISPLAY ERROR t1SG
1009
1010
CHECK FOR STUCK KEYS
1011
E4E1 Boce
101Z
MDV
AL,OCcH
E4E3 E661
1013
OUT
PORT_B.AL
E4E5 B04C
1014
MOV
AL,4tH
E4E7 E661
lOIS
OUT
PORT_B,AL
E4E9 2BC9
1016
SUB
cX,ex
E4EB
1017
E4EB E2FE
1018
lOOP
F5
;DElAY FOR A WHILE
FS:
ICU! KBD. SET CLK LINE HIGH
;ENABLE KBO,CLK IN NEXT BYTE
; KBD_WAIT:
E4ED E460
1019
IN
AL,KBD_IN
;CHECK fOR STUCK KEYS
E4EF 3(00
1020
CMP
Al,O
;SCAN CODE ::;. O?
E4F1 7419
1021
JE
F7
; YES - tONTINUE TESTING
E4F3 SAE8
1022
MOV
CH,Al
E4F5 BI04
1023
MOV
CL,4
E4F7 02E8
1024
SHR
AL,Cl
;RIGHT-JUSTIFY HIGH BYTE
E4F9 E89CFf
;SAVE SCAN CODE
1025
CAll
XLAT_P!;IINT_CODE
;eOHVERT AHD PRINT
E4Fe SAC5
1026
HOV
Al,eH
;RECOVER SCAN ceDE
E4F£ 240F
1027
AND
Al,OFH
;ISOLATE lOW ORDER BYTE
E500 E89SFF
1028
CALL
XLAT_PIUNT_CODE
;CONVERT AND PRINT
E503 BEA7E4
R
1029
F6:
MOV
5I.OFFSET F1
i GET MSG ADDR
ES06 B90400
1030
MOV
CX, fIt
; GET t1SG BYTE COUNT
E509 E8BEOI
1031
CALL
P_I1SG
j
PRINT MSG ON SCREEN
1032
1033
SETUP INTERRUPT VECTOR TABLE
1034
F7:
E50C
1035
ESOC 28CO
1036
SUB
AX,AX
ESOE SEeD
1037
HDV
ES,AX
E510 893000
1038
MOV
CX,24*2
;GET VECTOR CNT
E513 OE
1039
PUSH
CS
;SETUP OS SEG REG
ES14 If
1040
POP
OS
; SETUP_INT_TABlE:
ES15 BEF3FE
1041
HOV
SI.OFEF3H
£518 BF20DD
1042
MOV
DI.OfFSET INT_PTR
ESIB Fe
1043
1044
CLD
ESIC F3
REP
; OffSET VECTOR_TABLE
110VSW
ESID AS
A-IS
LaC OBJ
LINE
SOURCE
1045
i --------------- ----------------------------
1046
;1E5T.13
1047
1048
CASSETTE DATA WRAP TEST
;DESCRIPTION
1049
TURN CASSETTE MOTOR OFF. WRITE A BIT OUT TO THE CASSETTE DATA BUS.
1050
1051
VERIfY THAT CASSETTE DATA READ IS WITHIN A VALID RANGE.
,-- ------ ------ -- --- - - ------ ---- -- -- ------ ---
1052
TURN THE CASS!::TTE MOTOR OFF
lOS}
1054
;POINT OS REG TO DATA SEG
E51E 8840110
1055
MOV
AX.OATA
t:521 6ED8
1056
MOV
OS,AX
E523 8040
1057
MOV
Al.040H
; SET TIMER 2 SPK OUT, AND CASST
1058
CUT
FORT_B.Al
;OUT BITS ON. CASSETTE MOT OFF
E525 E661
1059
WRITE A BIT
1060
1061
E527 BOFF
1062
MOV
Al,OFFH
E529 E621
1063
C'JT
INTAOl,Al
E528 8086
1064
MOV
AL.OB6H
; DISABLE TIMER INTERRUPTS
jSEL TIM 2. lSB. I1SB. t1D 3
£52:0 £643
1065
OtIT
TIMER+3,AL
;WRITE 8253 CMD/MOOE REG
E52F 880304
1066
MOV
AX,1235
;SET TINER 2 CNT FOR 1000 USEe
E532 E642
1067
OUT
TIMER+2.Al
,WRITE TIMER 2 COUNTER REG
£534 SAC4
1068
MOV
AL.AH
;WRITE M58
E536 E642
1069
OUT
TIHER+2.Al
1070
1071
REAO CASSEnE INPUT
1072
E538 E462
1073
IN
Al,PORT_C
iREAD VALUE OF tASS IN BIT
E53A ,410
1074
AND
AL.10H
; ISOLATE FROM OTHER BITS
ES3C AlbBOO
1075
MOV
LAST_VAl,Al
E53F £83E14
1076
CAll
READ_HALF _BIT
E5(t2 E83814
1077
CALL
READ_HALF _BIT
f545 f30C
1078
JCXZ
F8
E547 81 FB400S
1079
eMF
BX.MAX_PERlOO
£548 7306
1080
JNe
F8
E54D 81FBI004
1081
eMF
BX.NIN_PERIOD
E551 7309
1082
E553
1083
E553 BEABE4
E556 890300
E559 E66EOI
JNe
F9
1084
MOV
SI.oFFSET F2
1085
MOV
eX.F2L
1086
CALL
P_MSG
F8;
i -------- - - - ---- - ---- ------------------------
1088
; TEST .14
1089
CAS_ERR
iGo TO NEXT TEST IF OK
I CAS_ERR:
1087
1090
i
; CAS_ERR
; cASSEnE WRAP FAI LED
;GO PRINT ERROR MSG
DISKEnE ATTACHMENT TEST
;DESCRIPTIoN
1091
CHECK IF IPl DISKETTE DRIVE IS ATTACHED TO SYSTEM.
IF ATTACHED,
1092
VERIFY STATUS OF NEC FOC AfTER A RESET.
1093
CMO TO FOC AND CHECK STATUS. COMPLETE SYSTEM INITIALIZATION THEN
1094
1095
ISSUE A RECAl AND SEEK
PASS CONTROL TO THE BOOT LOADER PROGRAM.
----- ------------------------------------ ---
;
F9:
Esse
1096
Esse 80Ft
1097
MOV
Al,OfCH
E55E £621
1098
OUT
INTACt,Al
E560 AOtOQO
1099
MOV
Al.BYTE PTR EQUIP_flAG
j GET SENSE SWS INFO
E563 ASOI
1100
TEST
Al.OIH
iIPl DISKETTE DRIVE ATTCH?
JNZ
FlO
; YES - TEST DISKETTE CONTR
JMF
F22
,NO - SKIP THIS TEST
MOV
Al.OBCH
; ENABLE DISKETTE. KEYBOARD,
E565 7503
1101
£567 E98900
1102
E56A
1103
E56A BOBC
1104
FlO:
j ENABLE TIMER AND KBo INTS
i
0 ISK_TEST:
1105
OUT
INTAol.Al
; AND TIMER INTERRUPTS
ES6E 8400
1106
MOV
AH.O
;RESET
E570 CD13
1107
INT
13H
,VERIFY STATUS AFTER RESET
ES6e E621
t~Ee
E57Z F6C4FF
1108
TEST
AH ,OFFH
iSTATUS OK?
£575 7520
1109
JNZ
F13
;NO -
FOC
FOC FAllED
1110
TURN DRIVE 0 MOTOR ON
1111
1112
£577 BAF203
1113
MOV
OX.03F2H
jGET ADOR OF Foe CARD
E57A BOlt
1114
MOV
AL,ICH
; TURN MOTOR ON. EN DMA/INT
E57C EE
1115
OUT
OX.AL
£570 28C9
1116
SUB
eX,ex
E57F
1117
Fll:
LOOP
F11
E581
1119
E581 E2FE
1120
LOOP
F12
E583 3302
1121
XOR
OX,OX
E57F E2FE
A-16
1118
iWRITE FDC CONTROL REG
; MOTOR_WAIT:
jWAIT FOR 1 SECOND
; MOTOR_WAIT 1 :
F12 :
; SHECT DRIVE 0
lOC OBJ
E585 8501
LINE
SOURCE
; SElECT TRACK 1
1HZ
1123
MOV
MOV
SEEK_STATUS.DL
1124
CALL
SEEK
1125
1126
JC
F13
IGO TO ERR SUBROUTINE IF ERR
£590 8522
NOV
CH,34
;SElECT TRACK 34
£592 E8ECDe
1127
CAll
SEEK
;5EEK TO TRACK l4
JNC
Fl4
;OK, TURN HOTOR OFF
E587 88163£00
E588 E8F308
ES8E 7207
ClI,I
;RECALIBRATE DISKETTE
£595 7]09
1128
£597
1129
£597 BEAEElI
1130
lUI
I10V
MaV
SI,OFFSET F3
iGET ADOA' OF I1SG
£59. 890300
CX,F3L
;GET HSG BYTE COUNT
£59D E82A01
1132:
CALL
P_t'lSG
iGO PRINT ERROR t'ISG
FI3:
; DSK_ERR:
1133
"34
TURN DRIVE 0 HOTOR OFF
1135
1136
£5AO
eooc
F14:
; ORO_OFF:
1137
tIOV
Al,OCH
jTURN DRIVE 0 MOTOR OFF
£5A2 BAF203
1138
MOV
DX.03F2H
; FDC CTL ADDRESS
[SA5 EE
1139
1140
OUT
OX,AL
1141
SETUP PRINTER AND RS232 BASE ADDRESSES IF DEVICE ATTACHED
ESAO
1142
£5A6
£5A6 C7061AOO 1EOD
ESAC C7061COOIEOO
1143
1144
FlS:
1145
E5B2 BDBIU
1146
E585 8£0000
1147
ESB8
1148
i JMP_BOOT:
I10V
BUFFER_HEAD,OFFSET KB_BUFFER
MOV
MOV
BUFFER_TAIL, OFFSET KB_BUFFER
MOV
51.0
;SETUP KEYBOARD PARAHETERS
BP.OFFSET F4
F16:
j
PRT_BASE:
ESSB 2e885600
1149
MOV
Dx.cs:lBPJ
;GET PRINTER BASE ADDR
ESBC BOAA
1150
Al.OAAH
IWRITE DATA TO PORT A
DX.Al
Al.AL
1151
MOV
OUT
£58F 2ACO
1152
SUS
E5Cl EC
1153
IN
AL.ox
ESC2 3CAA
1154
CMP
AL.OAAH
;DATA PATTERN SAHE
E5C4 7506
£5C6 89940800
1155
JNE
F17
;NO - CHECK NEXT PRT CD
1156
MOV
PRINTER_BASEl SI J.DX
;YES - STORE PRT BASE ADDR
ESCA 46
1157
INC
llSB
INC
SI
SI
; INCREMENT TO NEXT WORD
£see
; POINT TO NEXT BASE ADoR
Es8E EE
lt6
[SCC
1159
;READ PORT A
F17:
j
ESCC "-5
1160
INC
BP
ESCD 45
1161
INC
BP
NO_STORE:
ESCE 81FD87£4-
1162
CM?
BP.OFFSET F4E
JALL POSSIBLE ADDRS CHECKED?
E502 75£4
1163
JHE
FlO
;PRT_BASE
E5D4 B80000
MOV
MOV
BX,O
jPOINTER TO RSZ3Z TABLE
DX.3FAH
;CHECK IF RS232 CD 1 AnCH?
IN
AL.OX
;READ INTR 10 REG
E5DB ABF8
1164
1165
1166
1167
TEST
AL.OFSH
ESDD 7S08
1168
JNZ
F18
E507 BAFA03
ESDA EC
ESDF C7870000F803
1169
MOV
RS232_BASEIBX J,3FSH
E5E5 43
1170
INC
£5£6 43
1171
INC
BX
BX
FIB:
;5ETUP RS232 CD 11 ADDR
MOV
OX,2FAH
;CHECK IF RS232 CD 2 ATTCH
[SEA EC
1173
IN
Al.DX
.READ INTERRUPT ID REG
ESES A6F8
1174
TEST
AL,OF8H
E5E7 SAfAD2
117Z
ESED 7508
1175
JtlZ
Fl.
:lBASE_ENO
ESEF C7870000F802
1176
MOV
RS232_BASEl BX J., 2F8H
;SETUP RS232 CD IZ
E5F5 43
1177
INC
INC
BX
BX
£5F6 43
1178
1179
1180
i------
SET UP EQUIP FUoG TO INDICATE NUI18ER OF PRINTERS AND RS232 CARDS
1181
ESF7
1182
F19:
; BASE_EN!);
E5f7 8BC6
1183
MOV
AX,SI
; 51 HAS 2* NUt1BER OF RS232
ESF9 B103
1184
MOV
Cl,l
j
SHIFT COUNT
£5f8 D2C8
1I8S
OOR
Al,CL
; ROTATE RIGHT 3 POSITIONS
ESFD OAC]
1186
OR
Al,BL
i OR IN THE PRINTER COUNT
ESFF A21100
1197
MOV
BYTE PTR EQUIP_FLAG+l.AL
£602 8AOI02
1188
MOV
DX,201H
£605 EC
1189
IN
Al,OX
£606 A80F
1190
TEST
£608 7505
1191
JNZ
£60A 800£110010
1192
£60F
1193
1194
£60F 8080
1197
MOV
£611 £6AO
1198
OUT
1195
; STORE AS SECOND BYTE
Al,OFH
"0
BYTE PTR EQUIP_FLAG+l,16
F20:
ENABlF NMI INTERRUPTS
1196
;ENABlE NMI INTERRUPTS
A-17
LOC OBJ
LINE
SOURCE
£613 803£120001
1199
C"'
MFG_TST.l
j"FG HODE?
E618 7406
1200
JE
1201
"OV
'21
DX.l
I
E61A 8AOI00
£610 £81000
£620
1202
E620 E9CFOO
1204
12:03
E623
1205
£623 803£120001
1206
E628 7503
1207
1208
1209
1210
1211
E62A E92EFA.
£62:D
£620 [976FF
1212
1213
1214
1215
ERR_BEEP
iBEEP 1 SHORT TONE
J"'
BOOT_STRAP
;GO TO TtlE BOOT LOADER
C"'
JNE
f1FG_T5T.l
;t1ANUFACTURING TEST HODE?
.23
i NO - GO TO BOOT LOADER
J"'
START
iYES -
J"'
FlS
j
F2:2:
LOAD_BOaT_SnAP:
• LOOP_POD:
F23:
LOOP POWER-ON-DIAGS
; GO_TO_Boon
j
Jr1P_BOOT
,----- --------------------------------------;
INITIAL RELIABILITY TEST -- SUBROUTINES
i -- --- - -- - -- ----- - --- --- ---- - -- ----- ---------
ASSUME
CS:CODE,DS:DATA
1-------------------------------------------SUBROUTINES FOR POWER ON DIAGNOSTICS
1------- - - -------- ---------- -- ------- --------
1218
TH IS PROCEDURE WILL ISSUE ONE LONG TONE (3 SECS) AND ONE OR
1219
MORE SHORT TONES (I SEC) TO INDICATE A FAILURE ON THE PLANAR
12:2:0
BOARD. A BAD RAM I1ODULE. OR A PROBLEM WITH THE tRT.
1221
jENTRY PARAMETERS:
122:2
= NUMBER
= tlUMBER
OH
12:~3
E630
CALL
F21:
1216
1217
LOAD_BOOT_STRAP
DL
OF LONG TONES TO BEEP
OF SHORT TONES TO BEEP.
12:24
i --------- ----- ------------------------------
1225
ERR_BEiZP
PROC
NEAR
E630 9C
12:2:6
PUSHF
iSAVE flAGS
E631 FA
1227
CLI
,DISABLE SYSTEI1 INTERRUPTS
E632 IE
1228
PUSH
£633 864000
12:29
MoV
£636 8ED8
1230
£638 OAF6
1231
OS
iSAVE OS REG CONTENTS
AX.DATA
jPOlNT bS TO DAYA SEG
"".
OS,AX
OR
CH.DH
; ANY LONG ONES TO BEEP
JZ
GJ
; NO. DO THE SHORT ONES
"OV
8L.6
i COUNTER FOR BEEPS
CAlL
BEEP
; DO THE BEEP
LOOP
G2
j
DEC
DH
j
E63A 7418
lZ32
E63C
1233
EUC B306
1234
E63E £82S00
1235
£641 E2FE
1236
E643 FECE
1237
E645 75F5
1236
JIIZ
GI
i
DO IT
£647 803£12:0001
12:39
C"P
t1fG_TST,1
j
HFG TEST MODE?
E64C 7506
1240
J~{E
GJ
i
YES - CONTINUE BEEPING SPEAKER
£64£ BOCD
1241
"OV
Al.oeDH
; STOP BLINKING LED
£650 E661
1242
OUT
PORT_B.AL
J"'
SHORT Gl
£652 EBE8
1243
£654
1244
G1:
; LONG_BEEP;
G2:
G3:
DELAY BETWEEN BEEPS
ANY MORE TO DO
; SHORT_BEEP:
E654 B301
1245
I10V
1246
CALL
BL,l
BEEP
I COUNTER FOR A SHORT BEEP
£656 £80000
E659 E2FE
1247
LOOP
G4
; OEUY BETWEEN BEEPS
USB F£CA
1246
1249
DEC
Dl
; DONE WITH SHORTS
E650 75F5
Jt~Z
E65F ElFE
1250
G5:
GJ
GS
; LONG DELAY BEFORE RETURN
E661 E2FE
1251
G6:
E663 IF
1252
E664 90
12:53
£665 C3
1254
1255
Gft.:
LOOP
LOOP
G6
'DP
POPF
OS
~
DO SOHE HORE
iRESTORE ORIG CONTENTS OF DS
;RESTORE FUGS TO ORIG SETTINGS
RET
ERR_BEEP
; DO THE SOUND
j RETURN TO CALLER
EtIlP
1256
1257
ROUTINE TO SOUND BEEPER
1258
£666
1259
E666 BOB6
1260
"OV
AL.I0110110B
;SEL TIM 2. L5B,HSB,BlHARY
£668 E643
1261
OUT
T1I1ER+3.AL
;WRITE THE TIMER HODE REG
£66A B83305
1262
"OV
AX,S33H
jDIVlSOR FOR 1000 HZ
E66D £642
1263
OUT
TIMER+2.AL
JWI'UTE TIHER 2 CHT - LSB
BEEP
PROC
NEAR
E66F eAe4
1264
t1~V
.4.L.AH
E671 E642
12:65
OUT
TIMER+2.AL
jWRITE TII'IER 2 tNT - "SB
£673 E461
1266
IN
AL.PORT_B
;GET CURRENT SETTING OF PORT
£675 BAEO
12:67
"OV
AH.AL
; SAVE TlIAT SETTINGH
E677 OCOl
1266
OR
AL.03
; TURN SPEAKER ON
£679 E661
1269
OUT
PORT_BtAL
E67B 2BC9
1270
SUB
CX,CX
jSET CNT TO WAIT 500 ns
LQOP
G7
;OEUY BEFORE TURNING OFF
DEC
Bl
;DEUY CtlT EXPIRED?
1273
JUZ
.7
;NO - CONTINUE BEEPING SPK
1274
MDV
ALlAH
J RECOVER VALUE OF PORT
£670 E2FE
1271
E67F FECB
1272
E681 7SFA
E683 8AC4
A-18
G7:
lOC OBJ
LINE
EMS E661
1Z75
E687 c3
1276
SOURCE
OUT
iRETURN TO CALLER
RET
1277
BEEP
ENOP
1278
1279
; -------------------------------------------THIS PROCEDURE WILL SEND A SOFTWARE RESET TO TlIE KEYBOARD.
1280
1281
SCAN CODE
AA' SHOULD BE RETURNED TO THE CPU.
,--- - ----------------------------------------
E688
1262
PROC
E688 BoDe
1283
AL, DCH
NEAR
£68A E661
;SET KBD eLK LINE LOW
1284
OUT
PORT_B,Al
£68t 895629
1285
NOV
CX,10582
;HOLD KBD CLK LOW FOR 20 MS
E68F E2FE
1286
LOOP
G8
; lOOP FOR 20 MS
MOV
AL.DCCH
OUT
PORCB.AL
E691 Boce
£693 E661
1281
E695
1289
G8:
1288
SP_TEST:
,SET eLK. ENABLE LINES HIGH
; ENTRY FOR MANUFACTURING TEST 2
E695 B04C
12QO
E697 E661
1291
OUT
PORT_B,AL
£699 BOFD
1292
MOV
Al.OFDH
E698 £621
1293
OUT
INTAOl,Al
E690 FB
1294
1295
MOV
£69E 6400
£6AO 28C9
1296
E6A2 F6C4FF
1297
E6A5 7502
1298
E647 ElF9
E649 E460
1299
1300
EbAS 8A08
.WRITE 8255 PORT B
MOV
AL.4CH
;SET KBD CLK HIBH. ENABLE lOW
;ENABlE KEYBOARD INTERRUPTS
,WRITE 8259 urn
STI
;RESET INTERRUPT ItIDICATOR
ex,cx
;SETUP INTERRUPT TIMEOUT CNT
TEST
AH. OFFH
.010 A KEYBOARD INTR OCCUR?
"JtIZ
GI0
;YES - READ SCAN CODE RETIJRNED
LOOP
69
SUB
G9:
.ENABlE SYSTEH INTERRUPTS
AH.O
; NO - LOOP TI II TIMEOUT
GI0:
;READ KEYBOARD SCAN CODE
1301
MOV
BL.AL
;SAVE SCAN CODE JUST READ
E6AD BOte
1302
MOV
AL.DeCH
;CLEAR KEYBOARD
E6AF E661
1303
OUT
PORT_B,AL
E681 C3
1304
1305
KBD_RESET
1306
;
EHOP
BLINK LED PROCEDURE FOR MFG BURN-IN AND RUN-IN TESTS
1301
{LEO WILL BLINK APPROXIMATELY .Z5 SECOND)
1308
£68l
;RETURN TO CALLER
RET
--- ------------------------ ------------- ----
1309
1-------- -- -- --- --- ---- - -- --- - -- -- - -- -- ------
BLINK_INT
£682 FB
1310
1311
E6B3 51
1312
ruSH
CX
;SAVE CX REG CONTENTS
E664 50
1313
PUSH
AX
;SAVE AX REG CONTENTS
E6B5 f461
1314
1315
IN
AL,PORT_B
E687 24Bf
A~m
AL.OBFH
£669 E661
1316
OUT
!"OIH_B.AL
SUB
cx.ex
E6BB 28[:9
1317
E6BD E2FE
E6BF OC40
1318
1319
£6tl E661
£6C3 B020
NEAR
PROC
STI
611:
LOOP
;READ CURRENT VAL OF PORT B
;BLIt« LEO
GIl
OR
AL.40H
1320
OUT
PORT_B,AL
AL.EOI
;STOP BLINKING LEO
1321
1322-
MOV
£6e5 E620
OUT
INTAOO.AL
£6t7 58
1323
POP
AX
JRESTORE AX REG
£6C8 S9
1324
POP
ex
;RESTORE CX REG
£6e9 CF
1325
IRET
ENDP
1326
BLINK_INT
1327
; --------------------------------------------
1328
THIS SUBROUTINE WILL PRINT A MESSAGE ON THE DISPLAY
1329
,
1330
;ENTRY REQUIREMEtUS:
51
= OFFSET(AODRESS)
1332
CX
= MESSAGE
1333
MAXIMUM MESSAGE LENGTH IS 36 CHARACTERS
1331
1334
OF MESSAGE BUFfER
BYTE COutU
; ------------------ ----------------- --------P_M5G
PROC
NEAR
E6e..
1335
EbeA 684000
1336
HOV
AX.DATA
E6eD 8£08
1331
MOV
OS,AX
E6CF 803£120001
1338
CMP
E604 7505
JNE
MFG_TST.l
GI2
,NO - DISPLAY ERROR MSG
MOV
OH,l
; YES - SETUP TO BEEP SPEAKER
JMP
ERR_BEEP
;YES - BEEP SPEAKER
Al.CS:[SIJ
;POINT os TO DATA SEG
;MFG TEST MODE?
E606 6601
1339
1340
£608 E955Ff
1341
E60B
1342
£60B 2E8A04
13(.3
MOV
E6DE 46
1344
1345
INC
51
; POINT TO NEXT CHAR
E6DF 8701)
MOV
SH,O
;SET PAGE U TO ZERO
E6E1 840£
1346
MOV
AH.14
;J..'RITE CHAR (TTY-INTERFACE)
GIZ:
; WRITE_M5G:
; PUT CHAR IN AL
E6E3 COlO
1347
un
10H
;CALL VIDEO_IO
E6E5 E2F4
1348
LOOP
G12
;CONTINUE TILL MSG WRITTEN
E6E7 B8000E
1349
HOV
AX.CEODH
;POSITION CURSOR TO NEXT LINE
EbEA COlO
1350
niT
10H
;SENO CARRIAGE RETURN AND
A-19
LOC OBJ
LINE
SOURCE
E6EC 880AO£
1351
MOV
AX,OEOAH
E6EF COlO
E6F1 C3
1352:
WT
10H
1353
.ET
; LINE FEED CHARS
1354
P_I1SG
1355
1356
;--- tNT l'il ----------------------------;BOOT STRAP LOADER
1357
ENOP
IF A 5 1/4" DISKETTE DRIVE IS AVAIlABLE
1358
ON THE SYSTEM, TRACK 0, SECTOR 1 IS READ INTO THE
1359
BOOT LOCATION (SEGl'lENT 0, OFFSET 7COO)
1360
AHIJ CONTROL IS
TRAt~SFERRED
THERE.
1361
1362
1363
1364
IF niERE IS NO DISKETTE DRIVE, OR IF THERE IS
IS A HARDWARE ERROR CONTROL IS TRANSFERRED
TO THE CASSETTE BASIC ENTRY POINT.
1365
1366
; IPI. ASSUHPTIONS
8255 PORT 60H BIT 0
1367
:: 1 IF IPL FRon DISKETTE
1368
1369
J --- ---- - --- ---- --------- ---- - -----------
1370
£6F2
1371
ASSUHE
BOOT_STRAP
CS:CODE.DS:DATA
PROC
NEAR
1372
1173
STI
E6F3 884000
1374
MOY
AX ,DATA
E6F6 8ED8
£6f8 A,11000
1375
1376
NOV
DS.AX
AX. EQUIP_FUG
; GET THE EQUIPHENT SWITCHES
EbFB .l801
1377
TEST
AL.I
; ISOLATE IPL SENSE SWITCH
UFO 7423
1378
JZ
H3
; GO TO CASSETTE BASIC ENTRY POINT
E6F2 FB
HOV
; ENABLE INTERRUPTS
; ESTABLISH ADDRESSING
1379
1380
; ------ HUST LOAD SYSTEH FRDf1 DISKETTE --
ex
HAS RETRY COUNT
1381
E6FF 890400
E702
1382
1383
HDV
ex,.
; SET RETRY COUNT
HI:
i IPL_SYSTEH
£702 51
"84
PUSH
ex
j
SAVE RETRY COUNT
E703 8400
1385
MOV
AH,D
j
RESET THE DISKETTE SYSTEH
E705 COll
1386
DISKETTE_IO
j
1387
INT
Je
1,"
£701 7214
H2
; IF ERROR. TRY AGAIN
£709 8402
1388
HOY
AH.2
; READ IN THE SINGLE SECTOR
BX,O
; TO THE BOOT LOCI. TlON
E10B B80000
1389
HOY
E70E 8EC]
1390
MDV
ES,BX
E710 BBD07e
1391
MDV
BX,QFFSET BOOT_LOCN
E7l3 BAOOOO
1392
MOV
OX.O
E716 890100
1393
1394
MDV
ex ..
J SECTOR 1, TRACK 0
E719 BOOl
MOV
AL.1
• READ ONE SECTOR
E71B CD13
1395
INT
"H
j
E7ID 59
1396
PDP
ex
; RECOVER RETRY COUNT
E71E 7301t
1397
1398
JNe
H.
HI
; CF SET BY UNSUCCESSFUL READ
H20 £2EO
H2:
LOOP
i DRIVE O. HEAD 0
j
DIS1(ETTE_IO
DO IT FOR RETRY TIMES
1399
1400
.------ IJtlABLE TO IPL FRDtI THE DISKEnE
1401
£722
1402
£722 COlS
1403
; CASSETTE_JUMP:
H3:
INT
; USE INTERRUPT YECTOR TO GET TO BASIC
18H
1404
1405
;------ IPL WAS SUCCESSFUL
1406
£724-
1407
£724 EAOO7CODOQ
1408
H4:
JMP
1409
1410
; -----INT 14---------------------------------
1411
;R5232_10
1412
THIS ROUTINE PROYIDES BYTE STREAM I/O TO THE COI1MUNICATIDNS
1413
PORT ACCORDING TO TlfE PARAMETERS:
1414
{AH)=O
1415
INITIALIZE THE COMMUNICATIONS PORT
tAll HAS PIlRMS FOR INITIAllZA.TION
1416
1417
-PARITY--
STOPBIT
XO - NONE
o-
01 -
000
1422:
010 -
11 -
EVEN
1423
1424
1425
011 - 600
100 - 1200
101 - 2400
1426
110 - 4800
1427
111 - 9600
1421
A·20
•
000 - 110
001 - 150
1416
1419
1420
----- BAUD RATE --
300
1
1 - 2
--WORD LENGTH--
10 - 7 BITS
11 - 8 BITS
LOC OBJ
LINE
SOURCE
1428
1429
ON RETURN, CONlITIONS SET AS IN CALL TO CDI1HO STATUS fAH=3J
1430
SEND THE CHARACTER IN (ALJ OVER THE COI'I1O LINE
(AL) REGISTER IS PRESERVED
1431
ON EXIT. BIT 7 OF AH IS SET IF THE ROUTINE WAS UNABLE TO
fAltJ=l
1432
1433
TO TRANSMIT 'THE BYTE OF DATA OVER THE LINE.
REFELECTING THE CURRENT STATUS OF THE LINE.
14'"
1435
IAH)=2
RECEIVE A CHARACTER IN IAU FROH C0tl10 LINE BEFORE
RETlJRNING TO CALLER
14"
ON EXIT, AH HAS THE CURRENT LINE STATUS, AS SET BY THE
1437
1438
1439
I ...
TliE STATUS ROUTINE, EXCEPT THAT THE ONLY BITS
LEFT ON ARE THE ERROR BITS 17,4,3,2,1)
IN THIS CASE. THE TIME OUT BIT INDICATES DATA SET
READY WAS NOT RECEIVED.
1"1
1442
UHI=3
14'+3
THUS. AH IS NON ZERO ONLY WHEN AN ERROR OCCURRED.
RETURN THE C0l1J10 PORT STATUS IN lAX)
1444
1445
1446
144.
1448
BIT 6 :;: TRANS SHIFT REGISTER E"PTY
1449
BIT 3 :;: FRAMING ERROR
1450
1451
1452
1453
1454
BIT 2
PARITY ERROR
BIT 1 = OVERRUN ERROR
BIT 0
DATA READY
Al CONTAIt~S THE MODEt'! STATUS
AH CONTAINS THE LINE CONTROL STATUS
BIT 7
= TIME
BIT 5
= "tRAN-
BIT 4
= BREAK
OUT
MaUliNG REGISTER EMPTY
DETECT
=
=
1455
1456
1457
BIT 7
BIT 6
= RECEVED
BIT 5
BIT 4
= DATA SET
= CLEAR TO
= RING
LINE SIGNAL DETECT
INDICATOR
READY
SEND
BIT 1 :;: DELTA RECEIVE LINE SIGNAL DETECT
14sa
1459
1460
1461
1462
1463
146.
1465
1466
1467
BIT 2
BIT 1
BIT
lOX)
j
=
= TRAILING EDGE RING DETECTOR
= DELTA DATA SET READY
a ;;
DELTA CLEAR TD SEN)
PARAMETER INDICATING WHICH RS232 CARD (0,1 ALLOWED)
DATA AREA RS232_BASE CONTAINS THE BASE ADDRESS OF THE 8250 ON THE CARD
LOCATION 400H CONTAINS UP TO 4 RS232 ADDRESSES POSSIBLE
iOUTPUT
AX
MODIFIED ACCORDING TO PARHS OF CALL
ALL OTHERS UNCHANGED
1468
1469
1470
J --------------- --- - --- --- ---- ---- -----------
E729
1471
AI
E729 1704
1472
1473
1474
1475
OW
1047
OW
7••
38.
19.
1476
OW
E72B 0003
E720 8001
E72F COOO
E731 6000
E733 3000
E735 1800
E737
oeoo
ASSUHE
LABEL
1481
E739 FB
1483
11485
CS:CODE.DS:DATA
WORD
ow
OW
1477
1478
1479
1480
E739
THE
REMAINDER OF AH IS SET AS IN A STAnJS REQUEST,
OW
DW
OW
PROC
RS232_IO
9.
.8
••
12
; 110 BAUD
; TABLE OF INIT VAWE
15.
J 300
; 600
i
1200
i 2400
i 4800
i
ljI600
FAR
1482
; ------ VECTOR TO APFi?OPRIATE ROUTINe
I INTERRUPTS BACK ON
STI
E734 IE
I_
PUSH
OS
E73B 52
1487
PUSH
OX
Ene 56
E73D 57
1488
PUSH
PUSH
51
01
E748 88940000
1489
1490
1491
1492
1493
1494
1495
E74ft 0$02
1496
DR
E7itE 7416
1497
1498
1499
JZ
DR
JZ
1500
DEC
1501
1502
1503
1504
E7lE 51
E73F 88F2
£741 D1E6
E743 814000
E746 BEDA
E7S0 OAE4
E7S2 7418
E754 FEee
£756 74ftE
E758 FECC
E7SA 7503
E75C E98900
PUSH
J SAVE SEGMENT
CX
MDY
SI,DX
J RS232 VALUE TO 51
SHL
51.1
; WORD OFFSET
I1DY
DX.DATA
I1DY
MDY
DS,DX
..
i
SET UP OUR SEGHENT
DX,RS2:32_BASEISIl
DX.DX
i GET BASE ADDRESS
i TEST FOR 0 BASE ADDRESS
; REnJRN
TEST FOR (AH )=0
AH.AH
i
A.
i CDtIt1UH INlT
AH
i
JZ
DEC
AS
i SEND Al
AH
; TEST FOR (AHJ=2
JHZ
A.
AI2
; RECEIVE INTO AI.
JMP
TEST FOR IAH 1=1
A-21
LOC OBJ
LINE
SOURCE
£75F
1505
E7SF fEtt
E761 7503
£763 £98900
£766
1506
DEC
AH
1507
1508
JHZ
A3
JI1P
Al8
pop
ex
E766 59
1509
A2:
; RETURN FROt1 RS232
1512
1513
POP
pop
pop
SI
DX
E76A IF
1514
POP
OS
E768 CF
1515
IRET
E767 SF
1516
1517
, COMt1lJNICAUON STATUS
A3:
1!ilO
1511
E769 SA
E768 5£
I TEST FOR (AH)=3
01
; RETURN TO CALLER. NO ACTION
j------ INITIALIZE THE COI1I1UNICATIONS PORT
1518
A4:
E76C
1519
E?bC 8AEO
1520
ttOY
£76£ 83C203
1521
ADD
E771 B08D
1522
MaY
E77l EE
1523
OUT
; SAVE INIT PARMS IN AH
AH.AL
DX.3
Al,80H
OX,Al
;
POINT TO 8250 CONTROL REGISTER
; SET DLAB=l
1524
1525
;------ DETERHINE BAUD RATE DIVISOR
1526
E774 8,lD4
U27
HDY
OL.AH
E776 DOC2
1528
ROL
ROL
ROL
Ol.l
E776 ooe2
1529
E77. DOCt
1530
Ol.1
; GET PARMS TO OL
; GET BAUD RATE TERM TO LOW
; liZ FOR WORD TABLE ACCESS
1532
OX.OEH
; ISOLATE THEM
E782 8F29£7
E?8S 03FA
1533
ROL
AIm
MOY
OL,I
E77£ 81E20£00
OI.OFFSET Al
; BASE OF TABLE
1534
ADD
OJ.DX
; PUT INTD INDEX REGISTER
1535
E77e DOC2
E787
E788
E78C
E790
[791
88940000
42
ZE8A4S01
EE
4A
1531
MaY
DX,RSZ3Z_BASEESIJ
1536
INC
1537
MaY
DX
Al.CS:IOI]+1
; GET HIGH ORDER OF DIVISOR
; POINT TO HIGH ORDER OF DIVISOR
1538
OUT
OX.AL
; SET I1S OF DIV TO 0
DEC
GET LOW ORDER OF DIVISOR
OUT
DX
AL.CS: 101 J
OX.AL
j
E795 EE
1539
154.
1541
j
SET LOW OF DIVISOR
AOO
OX.]
E792 2£8A05
MOV
£796 8le203
1542
E799 64C4
E79a 241F
[79D EE
1_
1543
MOV
AL,AH
; GET PARHS BACK
'""
OUT
ALtOIFH
OX.At
; STRIP OFF THE BAUD BITS
1545
E79£ 83EAOt
1546
SUB
OX,2
j
LINE CONTROL TO 8 BITS
AL,O
E7Al 8000
1547
ttOV
E7A3 EE
1548
OUT
OX.AL
I INTERRUPT ENABLES ALL OFF
E7A4 E879
1549
JMP
SHORT A18
j
1550
1551
J------
BITS
OL,I
CotI_STATUS
SEND CHARACTER IN (All OVER COl'I1O LINE
1552
E7. .
1553
1554
1555
1556
1557
PUSH
ADD
HOV
OUT
HAD 33C9
E7A' 83C202
1558
XOR
CX,CX
1559
ADD
OX.2
E782
1560
E7A6 50
E7A7 63C2G4
E7M 8003
E7AC EE
AX
OX,4
AL,3
OX.AL
A6:
I SAVE CHAR TO SEND
j MODEn CONTROL REGISTER
j. OTR AND RTS
J DATA TERI1INAl READY. REQUEST TO SEND
; INITIALIZE TIME OUT COUNT
" HODEM STATUS REGISTER
I WAIT_DATA_SET_READY
GET nOOEn STATUS
1561
1562
IN
AL,DX
E7B3 .l820
TEST
AL.20H
i DATA SET READY
£185 7508
1563
JHZ
A7
I TEST_CLEAR_ TO_SEND
E7Bt EC
E7B? E2F9
1564
LOOP
A6
E7B9 58
1565
1566
POP
AX
E7BA 80CC50
OR
AH,80
E78D EBA?
1567
U8F
1568
E7BF 28C9
1569
JMP
A3
SUB
CX.CX
.7:
j
j
WAIT_DATA_SET_READY
Ii INDICATE TIME OUT
;
RETURt~
; TEST_ClEAR_ TO_SEND
.1.8:
; WAIT_CLEAR_ TO_SEND
E7CI
E7Cl EC
1570
1571
IN
AL,DX
Ii GET MODEn STATUS
E7C2 A810
1572
TEST
AL,10H
; TEST CLEAR TO SEND
E7C4 7508
1573
JNl
A9
E7U E2F9
1574
lOOP
A8
;. WAIT_ClEAR_TO_SEHD
E7ea 58
1575
pop
AX
; TIME OUT HAS OCCURRED
E7C' 80tt80
1576
OR
AH.80H
E7CC E898
E7CF 2BC9
1577
1578
157C)
1580
E7DI
1581
E7tE
E7CE 4A
A-22
JHP
A3
DEC
DX
CX.CX
...9:
SUB
AlO:
j
RETURN
j
ClEAR_TD_SENO
LINE STATUS REGISTER
INITIALIZE WAIT COUNT
WAIT_SEND
lOC 08J
LINE
SOURCE
f701 EC
1582
IN
Al.DX
E7D2 A820
1583
1584
TEST
AL.20H
; IS TRANSMITTER READY
JNZ
All
; OUT_CHAR
LOOP
AID
t GO BACK FOR MORE. AND TEST FOR TIt1E OUT
; RECOVER ORIGINAL INPUT
004 1506
E7Ub E2f9
E708
sa
E7D9 80eC80
E70C EBaa
E70E
1565
1586
1567
1586
1589
POP
AX
OR
AH.80H
JHP
Al
; GET STATUS
; SET THE TIHE OUT BIT
I RETURN
All:
; OUT_CHAR
E7DE 83EA05
1590
SUB
ox,S
; DATA PORT
E7El 59
E7E2 SACl
1591
1592
POP
CX
MOil
; RECOVER IN ex TEHPORARIl Y
; GET OUT CHAR TO Al FOR OUT. STATUS IN AH
E7E4 EE
1593
OUT
E7E5 E97EFf
1594
JHP
Al.CL
DX,AL
Al
; OUTPUT CHARACTER
; RETURN
1595
1596
1------ RECEIVE CHARACTER FROM COMMO LINE
1597
E7E8
15~8
f7E8 802671007F
1599
ANO
BIOS_BREAK.07FH
E7ED 83C204
1600
AOO
OX.4
; MODEM CONTROL REGISTER
E7fO BOOI
1601
HOV
Al.!
; DATA TERMINAL READY
E7F2 EE
A12:
~
TURH OFF BREAK BIT IN BYTE
1602
OUT
DX.AL
E7F3 83C202
1603
AOO
OX.2
; MODEM STATUS REGISTER
E7F6 28(9
1604
1605
SUB
cX.CX
; ESTABlISH TIME OUT cOUNT
E7Fe
E1FB EC
E7F9 AB20
E7FB 7507
E7FO ElF9
E7FF
E7FF 6480
E601 E962FF
E604
1;::804 4A
E805
f805 fC
E806 A801
E80S 7509
E80A F606710Q80
feoF 74F4
E611 E6EC
Eeu
All:
; WAIT_DSR
1606
1607
1606
1609
1610
1611
1612
Al,DX
;
~IOOEM
Al,20H
j
DATA SET READY
JNZ
A1S
i
IS IT READY YET
; WAIT UNTIL IT IS
A15:
1615
1616
A16:
STATUS
LOOP
A13
HOV
AH,80H
; SET TIME OUT ERROR
JMP
A3
; RETURN WITH ERROR
OEC
OX
A14:
1613
1614
; TIME_OUT_ERR
;
~AIT_DSrCENO
; LINE STATUS REGISTER'
; WAIT_RECV
1617
1616
1619
1620
1621
1622
IN
TEST
IN
.Al.DX
; GET STATUS
TEST
ALd
; RECEIVE BUFFER fUll
JNZ
A17
; GET CHAR
TEST
BIOS_BREAK ,80H
; TEST FOR BREAK KEY
JZ
AI.
i
LOOP IF tlOT
JMP
AI'
i
SET TINE OUT ERROR
Al7:
; GET_CHAR
feU 241E
1623
ANO
Al.OOOllllOB
; TEST FOR ERROR CONDITIONS ON RECV CHAR
E815 BAEO
1624
HOV
AH.AL
; SAVE THIS PART OF STATUS FOli! LATER OPERATION
E817 88940000
E81B EC
1625
1626
HOV
OX .RS232_BASE[SI J
III
Al,OX
; GET CHARACTER FROM LINE
E81C E947Ff
1627
1628
1629
JMP
A3
; RETURN
EelF
ESIF 86940000
E82:3 83C205
E8Z6 EC
E827 BAEO
E829 4Z
E82A EC
EBZB E938FF
1630
1631
1632:
;------ COMMO PORT STATUS ROUTINE
A16:
1633
1634
1635
1636
1637
1638
1639
1640
1641
1642:
16431644
HOV
DX .RSZ32_BASEl 51
J
AOD
DX,S
; CONTROL PORT
IN
Al,DX
t'!OV
AH,AL
i
INC
OX
IN
Al,DX
; GET 1100EM CONTROL STATUS
JHP
A3
; RETURN
ENOP
; ---- INT 16 ------------------.. ------------j
KEYBOARD I/O
THESE ROUTINES PROVIDE f?',-I.O,-I,'
LABEL
BYTE
E920 Z1402324255E
E926 262A28295F2Boeoo
EnE 51574552545955
'. OOH,-I, 'ASDFGHJKL:'"
494F507B7DODFF
E93C "153444647484A
464C3A22
E947 7EFF
'.-1
E949 7C5A58435642:4£
4D3C3E3FFFOOFF2DFF
1767
;------ uc
£959
E,959 5455565758595A
1768
K12
1769
DB
84~85,86,67,86.8?,90
E960 56SC5D
1770
08
91.92:.93
1771
E963
1772
TABLE SCAN
LABEL
BYTE
;------ ALT TABLE SCAN
KB
LABEl
BYTE
E963 68696A6B6C
1773
DB
104.105.106.107.108
E968 6D6E6F7071
1774
DB
109,110,1110112.113
1775
1776
;------ NUM STATE TABLE
E96D
1777
K14
E960 3736392D343536
1778
lABEl
BYTE
DB
'789-456+1230.'
2:8313233302E
E'97A
1779
; ------ BASE CASE TABLE
1760
K15
LABEl
BYTE
E'97. 474849FF4BFF4D
1781
DB
71.72.73,-1.75,-1,77
E'961 FF4F50515Z53
1782
DB
-1.79,80.81,82.83
1783
1764
;------ KEYBOARD INTERRUPT ROUTINE
1785
E'967
1786
E'967 FB
1787
ST!
E966 50
1788
1789
PUSH
AX
E989 53
PUSH
BX
E96A 51
KB_INT
PROt
FAR
; ALLOW FURTHER INTERRUPTS
1790
PUSH
ex
E'968 52
1791
PUSH
OX
E98C 56
1792
PUSH
E980 57
1793
PUSH
51
01
E98E IE
PUSH
OS
E'98F 06
1795
PUSH
ES
'E990 FC
1796
ClD
E991 884000
1797
NOV
1794
; FORWARD DIRECTION
AX , DATA
A-25
LOC OBJ
LINE
£994 8£D8
1798
MOV
DS.AX
; SET UP ADDRESSING
£996 E460
IH
AL.KB_DATA
; READ IN THE CHARACTER
PUSH
IN
MOV
AX
AL,KB_CTl
AH.AL
; SAVE IT
E99B 8.£0
1799
1800
IIl0!
1802
E99D Dceo
1803
DR
AL.80H
; RESET BIT FOR KEYBOARD
£99f £661
1804
1805
OIIT
XCHG
KB_CTL.AL
AH,AL
J GET BACK ORIGINAL CONTROL
1806
OIIT
KB_CTL.AL
; KB HAS BEEN RESET
1607
1808
1809
pop
AX
; RECOVER SCAN COOE
nov
AH.AL
J SAVE SCAN CODE IN AM ALSO
£998 50
E9'9 £461
E9Al 86EO
[9.3 £661
£9AS 58
E9.6 BAED
uno
SOURCE
J------
; GET THE CONTROL PORT
I SAVE VALUE
TEST FOR OVERRUN SCAN CODE FROf1 KEYBOARD
1811
E9A8 3eFF
1812
E9AA 7503
1813
1814
1815
1816
1817
1818
1819
1820
nAt £97502
E9AF
E9AF 247f
E9Bl DE
CMP
JIll
.JHP
J------
AL,OFFH
i
"6Z
; BUFFERJULL_BEEP
".6
IS THIS AN OVERRUN CHAR
I NO. TEST FDR SHIFT 'KEY
TEST FOR SHIFT KEYS
K16:
E9B2 07
AND
AL.07FH
PUSH
CS
ES
OX,OFFSET K6
POP
E9B3 BF82E8
nov
E9B6 190800
MOV
REPHE
E9B. F2
; TURN OFF THE BREAK BIT
CX.K6L
SCASB
E9BA AE
nBS SAC4
1825
E9BD 7403
1826
E'SF E'8S00
1827
18Z8
1829
MOV
JE
AL,AH
; RECOVER SCAN CODE
"17
; JUMP IF MATCH FOUND
JrtP
K2'
I IF NO MATCH, THEN SHIFT
J------
SHIFT KEY FOUND
K17:
SUB
DI.OFFSET K6..
MOV
TEST
AH,CS:K7(O:[J
J GET MASK INTO AN
AL,80H
J TEST FOR BREAK KEY
JNZ
K23
j
~
FtUUJ
1830
E9C2 81£F83£8
1831
E9C6 2E8AASSAE8
1832
1833
E9C8 A880
nco 75S4
'834
; ADJUST PTR TO SCAN CODE HTeH
BREAICSHIFTJOUND
1835
1836
J ------ SHIFT HAKE fOUND. DETERMINE SET OR TOGGl.E
1837
E9CF aOFelO
1838
E9DZ 7307
1639
1840
1641
E904 08261700
E90S [98300
R
.-
C!1P
; IF SCROLL SHIFT OR ABOVE. TOGGLE KEY
JAE
1------ PLAIN SHIFT KEY, SET SHIFT ON
.842
.843
DR
J"P
; TURN ON SHIFT BIT
K26
i
INTERRUPT_RETURN
.84.
1846
1------ TOGGLEO SHIFT KEY, TEST FOR 1ST HAKE OR NOT
1847
E. .B
E9DB F606170004
£9EO 7568
1848
K18:
; SHIFT-TOGGLE
TEST
KB_FLAG, CTl..SHIFT
; CHECK CTl SHIFT STATE
1850
JHZ
"2'
i JUt1P IF eTl STAn:
E9Et 3C52
1851
CMP
AL, INS_KEY
i CHECK FOR INSERT KEY
E9E4 7525
1852
JHZ
"22
J JUt'lP IF NOT INSERT KEY
1853
TEST
KB_FLAG, ALT_SHIfT
I CHECK FOR ALTERNATE SHIFT
£9E6 F606170008
1849
R
1855
nED £B5890
£9FO F606170020
R
.856
K ••
i JUt1P IF NOT At TERNATE SHIFT
JMP
K ••
I JUMP IF ALTERNATE SHIFT
TEST
KB_fUG, NUll_STATE
J CHECK FOR BASE STATE
; JUMP IF NUtI LOCK IS ON
JZ
.854
E'fB 7lt03
K19:
£9F5 7500
1857
JHZ
"21
E9F7 f606170003
.858
1859
.860
1861
TEST
KB_FUG. LEFT_SHIFT+ RIGHT_SHIFT
JZ
K22
E9FC 740D
E9FE 881052
,
EA01 £90801
...
K2D:
1863
EA04
1864
K2l:
E'FE
EA04 F606170003
R
MOV
J"P
AX, S2lOH
1<57
; JUMP I f BASE STATE
I NUI'IERIC ZERO, NOT INSERT KEY
; PUT OUT AN ASCII ZERO
J BUFFER_FILL
; HIGHT BE NUHERIC
JZ
KB_FLAG. LEFT_SHUT+ RIGHT_SHIFT
I JIJIP NlI1ERIC I NOT INSERT
"20
TEST
AH,K.8]lAG_l
; IS KEY ALREADY DEPRESSED
1870
JHZ
"26
; JUt1P IF KEY ALREADY DEPRESSED
1871
DR
KB_fLAG_l.AH
; INDICATE TH4T THE KEY IS DEPRESSED
1872
XOR
KB_FLAG.AH
i TOGGLE THE SHIFT STATE
EAI9 ]CS2
1873
EEoe ODED
2567
2568
EEDA 6404
2569
EE07 AC
Laos
NEC_STATUS
j
SAL
Al,I
; TEST fOR EaT FOUND
NOV
AH .RECORD_NOTJND
EEOC 7224
2570
Je
JI'
fEOE ODED
2571
SAL
Al.l
; RWJAIl
EElO ODED
257Z
SAL
EE12 8410
2573
NOV
AH ,BAD_CRe
EE14 72IC
2574
Je
AL.I
2575
SAL
JI'
ALol
EE18 8408
2576
EEtA 7216
2577
MOV
JC
JI'
HlC ODED
2:578
EEI6 DOEll
; TEST fOR CRC ERROR
; RW_FAIl
; TEST FOR DMA OVERRUN
AH,BAD_OMA
SAL
Al.l
EEIE ODED
2579
SAL
Al,l
EE20 8404
2:580
NOV
AH. RECORD _NOTJHO
EEZ2- nOE
2561
JC
JI'
EE24 ODED
2:592
GET STl
SAL
i
TEST FOR RECORD NOT FOUND
Al.l
H26 8403
2583
NOV
AH ,IoIIHTE_PROTECT
; TEST FOR WRITE_PROTECT
fE,8 7208
2:584
Je
; RWJAIL
EEZA ODED
JI'
AL.l
2585
SAL
EE2C 8402
2:586
NOV
AH .BAD_ADOR_MARK
EEZE 7202
2587
Je
JI.
; TEST MISSING AOORESS HARK
; RW_FAIl
25M
2569
;------ NEe MUST HAVE FAILED
Z590
EBO
2591
2592
JI8:
EnD 8420
fE32
2593
J19:
EE32 08264100
2594
2595
EEl6 f87701
EE39
2596
EE39 C3
2597
NOV
RW-FAIL
DISKETTE_STATUS ,AH
OR
CAll
HOW MANY WERE REAllY TRANSFERRED
J20:
; RW_ERR
RET
; RETURN TO CALLER
2596
EE3A
2599
EElA f62EOI
2600
EE3D C3
J21 :
RW_ERR_RES
RESULTS
CALL
FLUSH THE RESULTS BUFFER
RET
2601
2602
2603
----- OPERATION WA5 SUCCESSFUL
2604
J22 :
EBE
2605
EE3f E56Fai
2606
CAU
HUH_TRANS
; HOW MANY GOl MDVED
EfCc 1 32E4
2607
XOR
AH.AH
; NO F.RRORS
EE43 C3
2608
2609
; OPl-COK
RET
RW_OPN
EHOP
2:610
; ---------- -------- ---------------------- ----
21)11
; NECOUTPUT
2612
THIS ROUTINE SENDS A BYTE TO THE NEC CONTROLLER
2613
AFTER TESTING FOR CORRECT DIRECTION AND CONTROllER READY
2614
THIS ROUTINE WILL TIME OUT I f THE BYTE IS NOT ACCEPTED
2615
HITHIN A REASONABLE AMOUNT OF TINE, SETTING THE DISKETTE STATUS
2616
ON COMPLETION
2617
INPUT
(AHI
2618
2619
=
2620
CY
2621
CY :: 1
2623
HIGHER THAN THE CALLER OF NEC_OUTPUT
THIS REMOVES THE REQUIREMENT OF TESTING AFTER EVERY CALL
OF NEC_OUTPUT
2626
(AL I DESTROYED
-------- ------------ --------------------- ---
2627
;
EE44
2628
NEC_OUTPUT
EE44 52
26Z9
2630
2631
EE49 33C9
SUCCESS
FAILURE -- DISKETTE STATUS UPDATED
I f A FAILURE HAS OCCURREO. THE RETURN IS MADE ONE lEVEL
2.624
EE46 BAF403
0
2:62.2
2625
EE45 51
BYTE TO BE OUTPUT
; OUTPUT
PUSH
PROC
OX
NEAR
; SAVE REGISTERS
PUSH
ex
MOV
DX,03F4H
; STATUS PORT
XOR
eX,ex
; COUNT FOR TIME OUT
EE4B
"""
EE4B EC
2634
III
Al.DX
; GET STATUS
EE4C A840
2635
TEST
AL,040H
; TEST DIRECTION BIT
EE4E 740C
2636
JZ
J25
EE50 E2F9
2637
lOOP
J23
EE52
2638
A-36
2633
J23:
J24:
; DIRECTION OK
; TIME_ERROR
lOC OBJ
LINE
SOURCE
££52 800£410080
2639
OR
DISKETTE_STATUS. TIME_OUT
EE57 59
2640
POP
CX
EE58 5.1.
2641
POP
OX
i
££59 58
EESA F9:
EE58 Cl
2642
2643
2644
POP
Al(
; DISCARD THE RETURN ADDRESS
STC
i
SET ERROR CODE AND RESTORE REGS
INDICATE ERROR TO CAllER
RET
2645
J25:
EESC
EESC 33C9
EESE
EESE EC
2646
2647
2648
2649
At.OX
; GET THE STATUS
EESF .1.880
2650
TEST
AL.OSDH
; IS IT READY
£E61 75(14
2651
JNZ
J27
£E63 E2F9
2652
LOOP
J2.
5 YES. GO OUTPUT
;; COUNT DOWN Aim TRY AGAIN
£E65 EBEB
2653
JMP
J2'
£E67
2654
EE6 7
8AC~
ex.ex
XOR
; RESET THE CO\.tJT
J26:
IN
CONDITIOt~
;. ERROR
J27:
; OUTPUT
;. GET BYTE TO OUTPUT
AL,AH
2655
MOV
fE69 BAFS03
2656
MOV
DX,03F5H
EE6e EE
'EE6D 59
2657
2658
OUT
OX.AL
;. OUTPUT THE BYTE
POP
CX
J RECOVER REGISTERS
EE6E 5A
2659
POP
OX
EE6F Cl
2660
2661
NEC_OUTPUT
2662
; ------------------------------------------
2663
; GET_PARM
;. DATA PORT
RET
2664
; CY
=
0 FROH TEST INSTRUCTION
ENDP
THIS ROUTINE FETCHES THE ImEXED POINTER FROM
2665
j
2666
;
2667
i
2668
;
THE DISK_BASE BLOCK POINTED AT BY 11iE DATA
VARIABLE DISK_POINTER
A. BYTE FROM THAT TABLE IS THEN MOVED INTO AH.
THE INDEX OF THAT BYTE BEING THE PARH IN
2669
ENTRY --
2670
ax =
2671
INDEX OF BYTE TO BE FETCHED
IF THE LOW BIT OF
2672
ex
*
ex
2:
IS ON, mE BYTE IS IMMEDJA TEL Y
OUTPUT TO THE NEt CONTROLLER
2673
EXIT --
2674
AH
= THAT
BYTE FROM BLOCK
- ------------ -- ------------ -- ----- ---- -- ----
2:675
;
EE70
2676
GET_PARM
EE70 1£
2677
E£71 2BCa
EE73 8E08
PROC
NEAR
PUSH
OS
j
2678
SUB
AX.AX
i ZERO TO AX
2:679
MOV
DS.AX
DS:ABSO
SAVE SEGMENT
2680
ASSUI1E
EE75 C5367800
26B1
LOS
SI.DISK_POINTER ;. POINT TO BLOCK
£E79 D1EB
2:682:
SHR
ex.!
; DIVIDE BX BY 2. AND SET FLAG FOR EXIT
EE7B 8A20
2683
MOV
AH.(SI+BXJ
; GET THE WORD
EE7D 1F
2684
2685
POP
OS
; RESTORE SEGMENT
ASSlR1E
DS:DATA
EE7E 72C4
2686
JC
NEC_OUTPUT
EE80 t3
2687
RET
; I f f UG SET t OUTPUT TO CONTROLLER
j
RETURN TO CALLER
[NDP
2688
GET_PARH
2689
2690
j --------------------------------------------
;. SEEK
2691
THIS ROUTINE WILL MOVE THE HEAD ON THE NAMED DRIVE
2692
TO THE NAMED TRACK.
2693
SINCE THE DRIVE RESET Cottr:'IAHD WAS ISSUED t THE DRIVE WILL BE
2694
2695
RECALIBRATED.
INPUT
(DLJ :; DRIVE TO SEEK ON
2696
2697
2698
(eH)
=
TRACK TO SEEK TO
; OUTPUT
Z699
CY
2700
CY
2701
2702
IF THE DRIVE HAS NOT BEEN ACCESSED
=0
=1
SUCCESS
FAILURE -- DISKETTE_STATUS SET ACCORDINGLY
(AX) DESTROYED
------ -- ---- ------ ----- ---------------------
;
SEEK
EE81
EE81· B001
2703
2704
MOV
EE8351
EE84 8ACA
2705
PUSH
CX
;. SAVE INPUT VALUES
2706
MOY
CL.Ol
; GET DRIVE VALUE INTO CL
EE86 D2tO
2707
OOL
AL,CL
; SHIFT IT BY THE DRIVE VALUE
EE88 59
2708
PUP
ex
j
EE89 84063EOO
2709
TEST
AL.SEEK_STATUS
; TEST FOR RECAL REQUIRED
EEBD 7513
EE8F 08063[00
JIlZ
J2.
; NO_RECAL
SEEK_STATUS,AL
j
TlIRt~
EE93 8407
2710
2711
2712
MOV
AH.07H
j
REtALIBRATE COMMAND
EE95 E8ACFf
2713
CALL
NEC_OUTPUT
EE98 BAEt
2714
MOV
AH,DL
EE9A E8A7FF
2715
CALL
NEt_OUTPUT
PROC
OR
NEAR
AL.1
j
ESTABLISH MASK FOR RECAL TEST
RECOVER TRACK VALUE
ON THE NO RECAl BIT IN FLAG
; OUTPUT THE DRIVE NlmSER
A-37
LOC OBJ
EEW E87200
EEAO 7229
LINE
2716
2717
2718
GET THE INTERUPT AND SENSE tNT STATUS
CALL
CHK_STAT_Z
i
JC
J32
; SEEK_ERP.OR
2719
j----- DRIVE IS IN SYNCH WITH CONTROllER.
J28:
EEAZ B40F
2720
2721
2722
EEA4 E89DFF
2723
EEA2
SOURCE
MOV
CALL
AH,OFH
i
SEEK CotftfAtID TO NEe
tlEe_OUTPUT
EEA7 &AEt
2724
EEA9 E898FF
2725
CALL
NEe_OUTPUT
EEAC SAES
2726
HOV
AH.CH
EEAE E893FF
2:727
CALL
NEe_OUTPUT
EEBI [85£00
272S
CALL
CHK_STAT_2
I10V
SEEK TO TRACK
; DRIVE NUt1BER
AH.DL
; TRACK NUl1BER
I GET EI«JING INTERRUPT AND SENSE STATUS
2729
2730
fEe5 BIUzoO
2731
2732
2733
[EBB E88SfF
2734
EEBB 51
2735
EEBe
2736
EEM 9C
; ----- MAIT FOR HEAD SETTLE
PUSHF
i
MOV
eX,lo
CALL
GET_PARM
PUSH
CX
cx.sso
2737
HOV
2738
OR
AH,AH
EECI
EEC3
EECS
EEC7
EEC9
2739
JZ
J31
LOOP
J3.
J30:
2742
2743
; DECREMENT THE COUNT
J2.
J DO IT SOME tfOR E
CX
; RECOVER STATE
J31:
2744
POP
274S
POPF
EECB
2746
J32:
2747
; SEEK_ERROR
; RETURN TO CAllER
OET
2748
SEEK
2749
;
; DHA_SETUP
ENOP
--------------------------------------------
2751
THIS ROUTINE SETS UP THE Df1A FOR READ/WRITEIVERIFY
2752
OPERATIONS.
2753
J INPUT
(AU = f10DE BYTE fOR THE OI1A
2754
2755
2756
fES:BK) - ADDRESS TO READ/WRITE TIfE DATA
, DlITPIIT
(AX J DESTROYED
2757
EECC
; DELAY FOR 1 tIS
AH
JHP
EECA 90
2750
i 1 HS LOOP
; TEST FOR TIHE EXPIRED
DEC
EEC9 59
EEeB C3
SAVE REGISTER
; HEAD_SETTLE
EEBF OAE4
2740
2741
o
J29:
EEBe 892'602
7406
E2:FE
FEce
EBFl
SAVE STATUS FLAGS
; GET HEAD SETTLE PARAMETER
------------ ---------------- --------- -- -----
2758
;
2759
DMA_SETUP
PROC
NEAR
SAVE THE REGISTER
EECC 51
2760
PUSH
CX
j
EECD [60t
2761
OUT
DMA+12,Al
; SET TIfE FIRST/LAST F/F
EECF E60B
DMA+ll,Al
; OUTPUT THE MODE BYTE
2762
OUT
EEDI actO
2763
HOV
AX.ES
; GET THE ES VALUE
EED3 BI04-
2764
HOV
CL,4
; SHIFT COUtU
EEDS D3eo
276S
OOL
AX,Cl
; ROTATE lEFT
HD7 8AE8
2766
MOV
CH,Al
; GET HIGHEST NYBLE OF ES TO CH
fED9 24FO
2767
ANO
AL.OFOH
; ZERO THE lOW HYeelE FROI'I SEGMENT
HOB 03C3
2768
ADD
Ax.ex
i
EEDD 7302
2769
JHe
J33
EEDF FECS
277D
INC
CH
, CARRY MEANS HIGH 4 BITS HUST BE INC
EEEI
2771
TEST FOR CARRY FROH ADDITION
J33:
EEEl 50
2772
PUSH
AX
I SAVE START ADDRESS
EEEZ E604
2773
OUT
OMA+4,Al
, OUTPUT lOW ADDRESS
EEEif 8AC4
2.774
MOV
AL.AH
EEE6 E604
2775
OUT
DMA+4,Al
, OUTPUT HIGH ADDRESS
EEEB BACS
2776
2777
MOV
AL.eH
; GET HIGH 4 BITS
EEEA 240F
A'l!)
AL,OFH
EEEe E681
2778
OUT
081H,AL
; OUTPUT THE HIGH 4 BITS TO PAGE REGISTER
2779
2780
;------ DETERMINE COUNT
2781
EEEE SAE6-
2782
MOV
EEFO 2ACO
2783
SUB
AH.DH
Al,Al
,
EEF2 01E8
2784
SH.
AX.I
; SECTORS
EEF4 50
2785
PUSH
AX
EEF5 880600
2766
MOV
BX,6
EEF8 E875FF
; NUMBER OF SECTORS
TIMES 2:56 INTO AX
*
128 INTO AX
; GET THE BYTES/SECTOR rARM
2787
CALL
GET_PARt1
EEFB SAce
2788
NOV
el,AH
EEFD 58
2789
POP
AX
EEFE 03EO
2790
SHL
AX,CL
EFOO 48
2791
OEC
AX
i
EFOI 50
2792
PUSH
AX
I SAVE COUNT YALUE
A-38
; USE AS SHIFT COUNT (0=128. 1=256 ETC)
l f1ULTIPl Y BY CORRECT AI10UNT
-I FOR DMA VALUE
LDC 08J
LINE
SOURCE
EF02 E605
2793
OUT
EF04- SACft
/UlV
AL.AH
OUT
DHA+S.AL
EF06 S9
2794
2795
2796
POP
ex
j
EF09 58
2797
POP
AX
i RECOVfR ADDRESS VAlUE
EFOA 03el
2798
ADD
AX.CX
j
ADD .. TEST fOR 64K OVERfLOW
EFoe 59
2799
pop
CX
~
RECOVER REGISTER
EfOO B002
2600
HOV
Al,Z
; HODE fOR 8217
DMA+I0,AL
; ItUTIALIZE THE DISKETTE CHANNEL
; RETURN TO ULLER. efL SET BY ABOVE IF ERROR
EF06 E605
EFOF £60A
Z601
OUT
EFU C3
2802
RET
DHA+S.AL
; LOW BYTE Of COUNT
; HIGH BYTE OF COUNT
RECOVER COUNT VALUE
ENDP
2803
OHA_SETUP
2604
2805
; ----. -- -- ----- --- - ---- ----,..--------- -------; CHK_STAT_2
28126
THIS ROUTINE HANDLES THE INTERRUPT RECEIVED AfTER
2807
A RECALIBRATE, SEEK, OR RESET TO THE ADAPTER.
2808
THE INTERRUPT IS WAITED FOR. THE INTERRUPT STATUS SENSED.
28P9
AUD THE RfSUL T RETURNED iO THE CALLER.
Z610
; INPUT
2811
•
HONE
I OUTPUT
2812
=
=
2813
CV
2814
CY
2815
(AX l DESTROYED
2816
EF12
0 SUCCESS
1 fAILURE -- ERROR IS IN DISKETTE_STA.TUS
; -- - - --- -- ----- ----- - -- -- ------- ----- -------CHK_STAT_2
EF12 ESIEGO
[FIS 7214£FI78408
CALL
EF19 E828FF
CAU
JC
; WAIT fOR THE INTERRUPT
; If ERROR. RETURN IT
; SENSE INTERRUPT STATUS CQHHAt-I)
J34
/UlV
CALL
RESULTS
; READ IN THE RESULTS
EFtF 72:0,1,
JC
J34
; CHK2_RETURN
EF21 ,1,04200
HOV
EFIC E84COD
j
GET THE FIRST STATUS BYTE
EFZ4 2460
AND
EF26 3C60
CHP
Al.060H
AL.060H
; TEST FOR CORRECT VALUE
JZ
J35
; I f ERROR. GO MARK IT
EF28 7402
EFtA f8
; ISOLATE THE BITS
; GOOD RETURN
Cle
J34:
EF2B
EFtB C3
i RETURN TO CALLER
RET
J35:
EFtC
; CHK2_ERROR
EF2C 600£410040
EFn F9
En2 C3
OR
DISKETTE_STATUS,BAD_SEEK
; ERROR RETURN CODE
STC
RET
CHK_STAT_2
283~
; - - - - -- - - -- -- ----- - - -- - - - --- - --- ----- -- ------
2'637
; WAIT_IHT
THIS ROUTINE WAITS FOR AN INTERRUPT TO OCCUR
2838
2839
A TIME OUT ROUTINE TAKES PLACE DUiHUG THE WAIT, 50
2a40
TliAT AN ERROR HAY BE RETURtlED I f THE DRIVE IS NOT READY
2841
; INPUT
2642
2843
NONE
; OUTPUT
CY = 0 SUCCESS
CV ;: 1 FAILURE
2844
2845
2847
-~
DISKETTE_STATUS IS SET ACCORDINGLY
(AX J DESTROYED
2646
J -~ ---- --~ -~- ~-- ~ --- ----- --- ---- ----- -- -----WAIT_INT
PRot
NEAR
; TURN ON INTERRUPTS. JUST IN CASE
SrI
Ef3]
2:8't8
£F33 F8
EF34 53
284'
2. . .
PUSH
8X
£F35 51
2651
PUSH
ex
i
SAVI: REGISTERS
£'36 B302
2852
HOV
al..2
; ClJ;AR THE COUNTERS
Ef38 33C9
2853
XOR
CX,CX
; FOR 2 SECOND WAIT
EnA
2854
EF3A F6063£0080
2855
TEST
SEEK_STATUS,INTJLA&
EF3F 750C
2856
JHZ
J37
EF41 E2F7
Ef43 fECB
2857
lOOP
J36
; COUNT DOWN WHll.E WAITING
2658
DEC
BL
; SECOND LEVEL COUNTER
J36:
£F45 75F3
2:659
JHZ
J3.
EF47 800E410080
2$60
OR
DISKEnE_SlATUS. TIHE_OUT
EF4C F9
2861
i NOTHING HAPPENED
src
ERROR RETURN
J37:
EF4D
2862
EF4D 9C
2663
PUSHF
Ef4E 802631;007F
2864
AND
i SAVE CURRI:NT CARRY
SEEK_SlATUS.NOT INTJLAG
EFS] 9D
2865
POPF
EF54 59
2866
POP
CX
EF55 58
2867
POP
8X
EfS6 C3
2868
2869
I TEST FOR INTERRUPT DCCURRING
RET
WAIT_INT
; TURN OFf INTERRUPT flAG
j
RECOVER CARRY
; RECOV£!;! REGISTERS
j
GOOD RETURN CODE COHES FROH TEST INST
ENDP
A-39
LOC OBJ
LINE
2870
2871
SOURCE
; - --- - -- - ----- --- -- ----------------- --------• DISK_INT
2872
2873
THIS ROUTINE HANDLES THE OISKETTE INTERRUPT
; INPUT
2874
2875
NONE
; OUTPUT
2876
2877
THE INTERRUPT FLAG IS SET IS SEEK_STATUS
; ------------------- - - - - ---- ------- - ----- ----
US7
2878
EFS7 FB
2879
sn
EF58 IE
2880
PUSH
os
Ef59 50
2881
PUSH
AX
EFSA 884000
2:882
MOV
AX,DATA
EF50 BEDS
2883
MOV
DS,AX
EFSF 800EJE0080
2:884
OR
SEEK_STATUS.INT_FLAG
PROC
FAR
; RE ENABLE INTERRUPTS
EF64 B020
2885
MOV
AL.20H
END OF INTERRUPT MARKER
EF66 E620
2886
OUT
20H.AL
INTERRUPT CONTROL PORT
Hb8 58
2:887
POP
AX
EFb9 IF
2888
PCP
OS
EF6A Cf
2889
IRET
RECOVER SYSTEM
RETURN FROM INTERRUPT
HIDP
2890
2891
; --------- ---- --- -- ------ - --- ----------------
289Z
; RESULTS
ROUTlr~E
2:893
THIS
2:894
HAS TO SAY FOLLOWING AN INTERRUPT.
2895
INPUT
~lONE
2696
2897
WILL READ ANYTHING THAT THE NEC CONTROLLER
; OUTPUT
TRA~lSFER
CY :: 0
SUCCESSFUL
2899
CY :: 1
fAILURE -- TIME OUT IN WAITING FOR STATUS
2900
NEC_STATUS AREA HAS STATUS BYTE LOADED INTO IT
2:898
2901
(AH) DESTROYED
2902
; ---- - ---- --- --- - -- ------ - ----- --------- -----
£F6B
EF6B Fe
2903
2904
RESULTS PRoe
CLD
EF6e BF42DO
2905
MDV
OI.OFFSET NEC_STATUS
; POINTER TO DATA AREA
EF6f 51
2906
PUSH
CX
; SAVE COUNTER
EF70 52
2:907
PUSH
OX
NEAR
EF71 53
2:908
PUSH
ex
Ef7:?: 8307
2909
MOV
SL.7
; MAX STATUS BYTES
2910
2:911
;------ WAIT FOR REQUEST FOR MASTER
291Z
EF74
2913
EF74 33C9
2914
J38:
; INPUT_LOOP
XOR
cx.ex
; COUNTER
MOV
OX.03F4H
; STATUS PORT
AL.OX
; GET STATUS
EF76 BAF403
2915
EF79
2916
EF79 EC
2917
'N
EF7A ABBD
2:918
TEST
Al.080H
; MASTER READY
EF7C 7S0C
2919
)NZ
J40A
i
EF7E E2F9
LOOP
J39
; WAIT_MASTER
HaD 800E410060
2920
2921
OR
DISKETTE_STATUS, TIME_OUT
EFes
2:92Z
HBS F9
2923
2924
2925
2926
2927
2928
EFa6 58
EFS? SA
EFBB 59
EFa9 C3
; WAIT FOR MASTER
J39:
J40:
; RESULTS_ERROR
STC
POP
; SET ERROR RETURN
BX
POP
OX
POP
ex
RET
2:929
j------ TEST THE DIRECTION BIT
EFaA EC
2930
2931
J40A:
HBB A640
2932
fFaO 7507
2933
EF8F
2934
EF8f 800E410020
2935
EF94 EBEf
2936
TEST_DIR
It,
AL.DX
; GET STATUS REG AGAIN
TEST
Al,040H
; TEST DIRECTION BIT
)NZ
)42
; OK TO READ STATUS
DR
DISKETTE_STATUS. BAO_NEC
)MP
J40
; NECJAIL
J41:
; P.ESULTS_ERROR
2937
2938
;------ READ IN THE STATUS
2939
J4Z:
; INPUT_STAT
EF96
2940
EF96 42
2941
'NC
OX
; POINT AT DATA PORT
EF97 EC
2942
AL.DX
; GET TliE DATA
EF98 8805
[oIl.AL
STORE THE BYTE
EF9A 47
2943
2944
'N
MDV
INC
0'
INCREMENT THE POINTER
EF9B B90AOO
2945
A-40
MOV
ex.to
LOOP TO KILL TIME FOR NEC
lOC OBJ
LINE
SOURCE
J43:
EF9E E2fE
2946
lOOP
J43
EFAO 4A
2947
DEC
2948
IN
OX
AL,DX
; POilil AT STATUS PORT
EFAl EC
EFAZ ABlO
2949
TEST
At,OIOH
; TEST FOR NEe STILL BUSY
EFA4 7406
; GET STATUS
2950
Jl
J44
; RESUl15 DmlE
EFA6 FEes
2951
DEC
BL
; DECREMENT THE STATUS COUNTER
EFA8 75CA
2952
JNl
J3.
; GO BACK FOR HORE
EFAA EBE3
2953
JHP
J41
; CHIP HAS FAILED
2954
2955
;------ RESULT OPERATION IS DONE
2956
EFAC
2957
J44:
sa
2958
POP
EfAD 5A
2959
POP
ox
EFAE 59
2960
POP
ex
HAC
EFAF C3
; GOOD RETUFm CODE FROM TEST INST
------------------ - --------------- -- ---- ----
;
2963
; NUM_ TRANS
2964
THIS ROUTINE CALCULATES THE NUMBER OF SECTORS THAT
2965
WERE ACTUALLY TRANSFERRED TO/FROM THE DISKETTE
INPUT
,96 7
(eL)
=
=
(AL )
= NUMBER
(CH)
,968
,969
; RECOVER REGISTERS
RET
2961
2962
2966
BX
cnIHOER OF OPERATION
START SECTOR OF OPERATION
; OUTPUT
2:970
I~O
2971
~CTUALLY TRAt~SFERRED
OTHER REGISTERS MODIFIED
2972
j --------------- ----- ----------------- -------
HUH_TRANS
EFBO
2973
EFBO A04500
,974
HOV
AL .NEC_STATUS+ 3
EFB3 3ACS
2975
CHP
AL.CiI
SAME AS WE STARTED
EFB5 A04700
2:976
HOV
AL.UEC_STATUS+5
GET ENDING SECTOR
HBB 740A
,977
JZ
J45
EFBA 8B0800
2:978
HOV
BX.8
EFBD f8BOFE
2979
CALL
GET_PARM
EFCO 8A(4
2980
EFez FEeD
EFC4 2:ACl
2:931
EFe6 C3
2983
2982
J45:
PROC
NEAR
; GET CYLINDER HIDED UP ON
IF ON SAME
cn.
THEN NO ADJUST
; GET EDT VALUE
;
nHO AL
HOV
AL.AH
INC
AL
i
SUB
AL.CL
; SUBTRACT START FROM END
USE EOT+l FOR CALCULATION
RET
2984
NUM_TRANS
,985
RESULTS ENOP
ENOP
2986
2987
2988
; --------------- ----------------------------DISK_BASE
2:989
THIS IS THE SET OF PARAMETERS REQUIRED FOR
2990
DISKETTE OPERATION.
2991
DATA VARIABLE DISK_POINTER.
2:992
2993
THEY ARE POIUTED AT BY THE
TO MODIFY THE PARAMETERS.
BUILD ANOTHER PARAMETER BLOCK AND POINT AT IT
i --- ---- ------------------ -- ----- ---- -- ------
2994
LABEL
BYTE
EFe7
2:995
EFe7 CF
,996
110011116
; SRT=C. HO UNlOAO=OF -
EFee 02:
,997
DB
Z
; HD lOAO=l. HODE=DMA - 2ND SPECIFY BYTE
EFC9 25
,998
DB
MOTOR_WAIT
;
EFeA 02
2:999
DB
EFeB 08
3000
DB
EFCC ZA
3001
DB
02:AH
1ST SPECIFY BYTE
WAIT AFTER OPN TIL MOTOR OFF
512 BYTES/SECTOR
EDT ( lAST SECTOR ON TRACK)
GAP lENGTH
3002
DB
OFfH
EFeE 50
3003
DB
OSOH
EFCF F6
3004
DB
OF6H
i
EFDO 19
3005
DB
Z5
; HEAD SETTLE TIME (MILLISECONDS)
EFDl 04
3006,
DB
4
; MOTOR START TIME (118 SECONDS)
EFCD FF
OIL
GAP lENGTH FOR FORHAT
FIll BYTE FOR FORMAT
A-41
LOC OBJ
LINE
SOURCE
3007
; --- INT 17 ---------------------------------
3008
; PRItHER_IO
3009
THIS ROUTINE PROVIDES COMMUNICATION WITH THE PRINTER
3010
(AH)=O
PRINT THE CHARACTER IN IALI
3011
ON RETURN, AH=l IF CHARACTER COULD NOT BE PRINTED (TIME OUT)
301Z
OTHER BITS SET AS ON NORMAL STATUS CAll
(AH)::l
3013
INITIAllZE THE PRImER PORT
RETURNS WITH (AH) SET WITH PRINTER STATUS
3014
'AHI=2
3015
i '- 1,::':~~:D
READ THE PRINTER STATUS INTO IAHI
301&
7 ·
3017
3018
3019
_ 1 :: SElECTED
3020
1 :: OUT OF PAPER
3021
1
3022
1
3023
3024
3026
ACKNOWLEDGE
BUSY
IN PRINTER_BASE AREA
; DATA AREA PRINTER_BASE COUTAIUS TUE BASE ADDRESS OF lliE PRINTER CAROlS)
AVAILABLE 1 LOCATED AT BEGIHHIUG OF OATA SEGMENT. 408H ABSOLUTE, 3 NORDS)
3<126
3029
=
=
(OX) = PRINTER TO BE USED 10,1,21 CORRESPONDING TO ACTUAL VALUES
302:5
302:7
TIME OUT
=
51
;REGISTERS
3030
AH IS MODIFIED
ALL OTHERS UNCHANGED
3031
ASSUME
3032-
CS:CODE,DS;DATA
EFD2
3033
EFOZ FB
SH
EF03 IE
3034
3035
PUSH
OS
fF04 52
3036
PUSH
OX
PRINTE.R._l0
PRoe
FAR
INTERRUPTS BACK ON
SAVE SEGMENT
EFOS 56
3037
PUSH
EF06 51
3036
PUSH
CX
EFD7 53
3039
PUSH
BX
EFDB 8£4000
3040
MOV
SI.DATA
EFOB aEDE
3041
MOV
OS,SI
ESTABLISH PRINTER SEGMENT
EFDD SBF2
3042
3043
MOV
SI,DX
GET Pr:lINTER PARM
EFOF DlE6
SHL
51.1
WORD OFFSET INTO TABLE
EFEI 86940800
3044
MOV
OX. PRINTER_BASE( 51]
EFES OB02-
3045
O'
DX,DX
; TEST OX FOR ZERO. INDICATING NO PRINTER
; RETURN
51
; GET BASE ADDRESS FOR PRINTER CARD
3046
JZ
Bl
EFE9 OAE4
3047
OR
EFEB 740E
3048
JZ
.,
PRItlT_AL
TEST FOR fAH)"'l
EFE7 740C
AH.AH
TEST FOR I AH l"'O
fFED FEee
3049
DEC
AH
EFEF 7442
3050
JZ
Be
INIT_PRT
EFFI FEee
3051
DEC
AH
TEST FOR IAH)=2
JZ
B5
EFFS
3053
EFFS 58
3054
POP
BX
EFF6 59
CX
ErF3 742A
3052
Bl:
PRINTER STATUS
; RETURN
3055
POP
Ern 5f
3056
POP
51
RECOVER REGISTERS
ErF8 SA
3057
POP
OX
RECOVER REGISTERS
EFF9 If
3056
POP
OS
EFFA CF
3059
IRET
3060
3061
; ------ PRINT THE CHARACTER IN {Al)
3062
EFrs
3003
EFfS 50
3064
PUSH
AX
j
SAVE VALUE TO PRINT
EFFC B30A
3065
MOV
BL.IO
i
TIME OUT VALUE
; ESTABLISH SHIFT COUNT
82:
EHE 33C9
3066
XO.
CX.CX
FOOD EE
3067
OUT
OX.At
FOOl 42-
3066
mc
OX
F002
3069
83:
3070
; OUTPUT CHAR TO PORT
I POINT TO STATUS PORT
; WAIT_BUSY
AL,OX
; GET STATUS
F003 SAED
3071
tiOV
AH,AL
; STATUS TO AH ALSO
F005 A88a
307.2
TEST
AL.80H
; IS iKE PRItlTER CURRENTLY BUSY
F007 750£
3073
JNl
B'
j
OUT_STROBE
F009 EZF7
3074
LOOP
BJ
j
OECRENENT COUNT ON TIME OUT
F008 FEee
3075
DEC
BL
FOOD 7SFl
3076
JNZ
BJ
; WAIT FOR NOT BUSY
; SET ERROR flAG
F002 EC
IN
3077
O.
AH.l
F012 80E4F9
3078
; TURN OFF THE OTHER BITS
3079
""
AH,OF9H
F015 EB14
SHORT 87
; RETURN WITH ERROR FLAG SET
F017
3080
F017 BOOD
3081
MOV
Al,OOH
SET THE STROBE HIGH
FOl9 42
308Z
II:C
OX
STR08E IS BIT 0 OF PORT C OF B255
FOOF 60ec01
A-42
JMP
84:
OUT_STROBE
LOC OBJ
FOIA EE
FDIB BODC
fOlD EE
FOlE 58
LINE
SOURCE
OUT
3083
3...
3085
3086
OX,AL
MOV
Al~OCH
OUT
OX.AL
POP
AX
; SET THE STROBE lON
; RECOVER THE OUTPUT CHAR
3087
3088
3089
FOIF
3090
1------ PRINTER STATUS
B5:
PUSH
AX
MOV
DX, PRINTER_BASE (51 J
3094
IIIC
OX
3095
3096
IN
AL,DX
MOV
AH,Al
3097
AND
AH,OFSH
FOIF 50
3091
F020
F02D 88940800
F024 42
3092
f025 EC
F026 BAEO
F028 80E4F8
; SAVE At REG
86:
3093
j
GET PRINTER STATUS
; TURN OFF UNUSED BITS
87:
F028
3098
f028 SA
3099
POP
DX
; RECOVER AL REG
Foze 8AC:?:
3100
3101
3102
3103
3104
3105
3106
3107
3108
HOV
; GET CHARACTER INTO At
XO.
AL.Dl
AH,46H
JMP
81
; RETURN FROM ROUTINE
F02E 80F448
F031 E8C2.
F033
F033 50
F034 83C202
f037 B008
;------
j
STATUS_SET
FLIP A COUPLE OF BITS
INITIALIZE THE PRINTER PORT
88:
PUSH
AX
; SAVE At
ADD
DX,2
i
POINT TO OUTPUT PORT
j
SET INIT LINE LOW
3109
MOV
AL.a
F039 EE
3110
OUT
F03A B8E803
3111
DX.At
AX,1000
MOV
89:
F03D
311Z
F03D 48
3113
DEC
AX
F03E 75FD
3114
JNZ
B'
; INIT_LOOP
F040 BoDe
3115
MOV
AL.OCH
; NO INTERRUPTS, NON AUTO IF. INIT HIGH
OUT
DX,Al
JMP
80
F042 EE
F043 EBDB
3116
3117
; INIT_LOOP
; LOOP FOR RESET TO TAKE
S PRT_STATUS_1
ENDP
3118
PRINTER_IO
3119
;--- IHT 10 --------------------------------; VIDEO_IO
312:0
3121
THESE ROUTINES PROVIDE THE CRT INTERFACE
312:2:
THE FOllOWltlG FUNCTIONS ARE PROVIDED:
(AH)=O SET HOOE tAU CONTAINS HODE VALUE
3123
tAlJ=O 40X2S BW (POWER ON DEFAULTJ
3124
I AL )=1 40X2:S COLOR
3125
3126
(AU=2
80X2S BW
3127
tAU=]
80X2:5 COLOR
312:8
GRAPHICS HODES
tAU=4 320X200 COLOR
3129
IAU=5
320X2:00 BW
3131
IALJ=6
640X200 BW
3132
CRT MODE = 7 BOX2S B&W CARD (USED INTERNAL TO VIDEO ONLY)
3130
***
3133
NOTE BW MODES OPERATE SAME AS COLOR MODES, aUT COLOR
BURST IS NOT ENASLED
3134
3135
IAH):::l
313050
SET CURSOR TYPE
leH) ~ BITS 4-0
~
START LINE FOR CURSOR
3137
**
HARDWARE WIll ALWAYS CAUSE BLINK
3138
*'If
SETTING BIT 5 OR 6 WILL CAUSE ERRATIC BLINKING
OR NO CURSOR AT ALL
3139
3140
3141
ICll =
IAH)=2
3144
SET CURSOR POSITION
IDH.DL)
3142
314J
100)
(AH)~3
BITS 4-0 = END LINE FOR CURSOR
= ROW.COLUMN'
= PAGE
REAO CURSOR POSITION
= PAGE
3145
(BH)
3146
ON EXIT (DR.Dl)
3147
3148
10,0) IS UPPER LEFT
NU:19ER (MUST BE 0 FOR GRAPHICS MODES)
HLlMBER (MUST BE 0 FOR GRAPHICS HOOES)
=-'~OW,COLUMN
OF CURRENT CURSOR
(CH,CLJ :: CURSOR MODE CURRENTLY SET
fAHl=4
READ LIGHT PEN POSITION
3149
ON EXIT:
3150
(AH) = 0 -- LIGHT PEN SWITCH NOT DDWNINOT TRIGGERED
3151
(AH) = 1 -- VALID LIGHT PEN VALUE IN REGISTERS
3152
(DH,DLJ = ROW,COLUMN OF CHARACTER LP POSH
3153
(CH)
3154
(ex)
3155
3156
(AH)=5
= RASTER LINE (0-199)
= PIXEL COLUMN (0-319,639)
SELECT ACTIVE DISPLAY PAGE (VAllO ONLY FOR ALPHA troDES)
(AU=NEW PAGE VALUE (0-7 FOR HODES 0&1, 0-3 FOR HOOES 2&3)
A-43
LOC OBJ
LINE
3157
3158
SOURCE
fAH)~6
SCROLL ACTIVE PAGE UP
3160
= HUI1BER OF LINES. INPUT LINES BlANKED AT BOTTOH OF WINDOW
At = 0 MEANS BLANK ENTIRE WINDOW
(CH.tl) = ROW.COLUMN Of UPPER LEFT CORNER OF SCROLL
3161
(OH.Dl)
3162
(BH)
fAU
3159
3163
(AH)=7
=
(AU
= HUMBER
At
3167
3168
3169
3175
3176
3177
3178
3179
3180
3181
3182
3183
3164
3185
3166
3187
3188
3189
3190
3191
3192
3193
3194
3195
3196
3197
OF LINES. INPUT LINES BLANKED AT TOP Of WINDOW
MEANS BLANK ENTIRE WINDOW
CHARACTER HAND LING ROUTINES
3171
3173
3174
=0
(CH,CLJ = ROW,COLUMN OF UPPER LEFT CORNER OF SCROLL
(OH.DU - ROW.COLUMN OF LOWER RIGHT CORNER OF SCROLL
fBHI = ATTRIBUTE TO BE USED ON BLANK LINE
3166
3172:
OF LOWER RIGHT CORNER OF SCROLL
SCROLL ACTIVE PAGE DOWN
3164
3165
3170
= ROW.COLUMN'
ATTRIBUTE TO BE USED ON BLANK LINE
=8
READ ATTRIBUTE/CHARACTER AT CURRENT CURSOR POSITION
(8H) ;;; DISPLAY PAGE (VALID FOR ALPHA MODES ONLY)
ON EXIT:
(AL)
CHAR READ
(AH) ;;; ATTRIBUTE OF CHARACTER READ (ALPHA MODES ONLY)
UH)
9 WRITE ATTRIBUTEICHARACTER AT CURRENT CURSOR POSITION
(BH) = DISPLAY PAGE (VALID FOR ALPHA HODES ONLY)
(CX)
COUNT OF CHARACTERS TO WRITE
(AL) = CHAR TO WRITE
IBU
ATTRIBUTE OF CHARACTER (ALPHAJ/COLOR OF CHAR (GRAPHICS)
SEE NOTE ON WRITE DOT FOR 8IT 7 OF BL
1.
UH)
10 WRITE CHARACTER ONLY AT CURRENT CURSOR POSITION
(BHI ;;; DISPLAY PAGE (VALID fOR ALPHA MODES ONLY)
(CX) = COUNT Of CHARACTERS TO WRITE
(AU = CHAR TO WRITE
FOR REAOIWRITE CHARACTER INTERFACE WHILE IN GRAPHICS HOOE. THE
CHARACTERS ARE FORMED FROM A CHARACTER GENERATOR IMAGE
MAINTAINED IN THE SYSTEM ROM. ONLY THE 1ST 128 CHARS
ARE CONTAINED THERE. TO READIWRITE THE SECOND 128 CHARS,
THE USER MUST INITIALIZE THE POINTER AT ItITERRUPT 1FH
(lOCATION 0007CH) TO POINT TO tHE lK BYTE TABLE CONTAINING
THE COOE POINTS fDA THE SECOND 128 CHARS (128-255L
FOR WRITE CHARACTER INTERFACE IN GRAPHICS MODE. THE REPLICATION FACTOR
CONTAINED IN ICXI ON ENTRY WILL PRODUCE VALID RESULTS ONLY
FOR CHARACTERS CONTAINED ON THE SAME ROW. CONTINUATION TO
SUCCEEDItlG LINES WILL NOT PRODUCE CORRECTLY.
(AH)
=
=
=
=
=
=
3198
3211
3212
GRAPHICS INTERFACE
11 SET COLOR PALETTE
IAHI
(BHI = PALLETTE COLOR ID BEING SET (0-127)
(BL I ;;; COLOR VALUE TO BE USED WITH THAT COLOR IU
NOTE: FOR THE CURRENT COLOJ:l CARD. THIS ENTRY POINT HAS
HEANING ONLY fOR 320X200 GRAPHICS.
COLOR ID
0 SELECTS THE BACKGROUHD COLOR (0-15)
COLOR ID
1 SELECTS THE PALLETTE TO BE USED:
o = GREEN( 1 )/RED( 2 )IYELLOW(3)
1 = tYANIl)IHAGENTAIZ)IWHITE(3)
IN 40X25 OR 80X25 ALPHA MODES. THE VALUE SET FOR
PALLETTE COLOR 0 INDICATES THE BORDER COLOR
TO BE USED (VALUES 0-31, WHERE 16-31 SELECT THE
HIGH INTENSITY BACKGROUND SET.
3213
(AHI
= 12
IAH)
VALUE
IF BIT 7 OF AL
1. THEN THE COLOR VALUE IS EXCLUSIVE
OR'D WITH THE CURRENT CONTENTS Of THE DOT
= 13 READ DOT
(OX)
ROW NUMBER
(CX) ;;;; COLut1H NUMBER
(AU RETtlRNS THE DOT READ
3199
32:00
3Z01
3202
3203
32:04
3205
3206
3207
3208
3209
3210
=
=
=
WRITE DOT
(OX I
ROW NUMBER
I CX) ;;; COLUMN NUMBER
3214
3215
3216
3217
(All
3218
3219
=
= COLOR
=
=
3220
3221
3222
3223
3224
; ASCII TELETYPE ROUTINE FOR OUTPUT
3225
3226
3227
3228
3229
3230
3231
A-44
I AH)
=
14 WRITE TELETYPE
I AL I = CHAR TO WRITE
I BLl
fOREGROUND COLOR IN GRAPHICS MODE
IBH) ;;; DISPLAY PAGE IN ALPHA MODE
NOTE -- SCREEN WIDTH IS CONTROLLED BY PREVIOUS MODE SET
=
LaC OBJ
LINE
SOURCE
3232
= 15 CURRENT
(AH)
VIDEO STATE
3233
RETURNS TliE CURRENT VIDEO STATE
3234
(AU
3235
(AH) ::; NUJ1BER OF CHARACTER COLUMNS ON SCREEN
= MODE
CURRENTLY SET ( seE AH=O FOR EXPLANATION)
IBH) ;; CURRENT ACTIVE DISPLAY PAGE
3236
3237
3238
3239
CS,SS,DS,ES.BX,CX,DX PRESERVED DURING CALL
ALL OTHERS DESTROYED
;-----------------------------------:---------
3240
3241
3242
ASSUME
CS: CODE. OS: DATA. ES: VIDEO.RAM
LABEL
WORD
J TABLE OF ROUTINES WITHIN VIDEO I/O
F04S FCFO
3244
SET_MODE
3245
ow
ow
OFFSET
F047 CFFl
F049 FOFl
f04B lAFZ
OffSET
SET.CTYPE
3246
DW
OFFSET
SET.CPOS
3247
DW
OfFSET
READ.CURSOR
F04D A9F7
3248
DW
OFFSET
READ_lPEN
ACT.DISP.PAGE
SCROLl.UP
FOltS
3243
HI
F04f 30F2
FOS1 9CF2
3249
ow
OFFSET
3250
OW
OFFSET
F053 41F3
3251
ow
OFFSET
SCROLl.DOWN
FOSS 7DF3
3252
DW
OFFSET
RCAO.AC_ClmREUT
F057 C3F3
3253
ow
F059 FbF3
3254
DW
OFFSET
OFFSET
WRITE_t_CURRENT
F059 54F2
3.255
OW
OFFSET
SET_COLOR
F050 38F4
3256
lo:RITE_DOT
3257
ow
ow
OFFSET
FOSF .27F4
OFFSET
REA.D_DOT
f061 2:2F7
32.58
DW
OFFSET
WRITE_TTY
F063 7AF2
32.59
DW
OFFSET
VIDEO_STATE
0020
3.260
3261
HIL
EQU
$-111
VIDEO_IO
rROt
WRITE_At_CURRENT
tl'EAR
F06S
32.62
F065 FB
3263
STI
; INTERRUPTS BACK ON
; SET DIRECTION FORWARD
F066 FC
3264
ClD
F067 06
3265
PUSH
F068 IE
3266
PUSH
DS
F069 52
3267
PUSH
OX
F06A 51
3268
PUSH
CX
F068 53
3269
PUSH
B'
F06C 56
3270
PUSH
51
F060 57
3271
PUSH
01
F06E 50
3272
PUSH
F06F 8AC4
3.273
MV
Fon 32E4
3274
AX
AL,AH
AH,AH
F073 DIED
3275
XO'
SAL
F075 8BFO
3276
HOV
SI,AX
i PUT INTO 51 FOR BRANCH
F077 302000
3277
CMP
AX,Mll
i
F07l 7204
3278
JB
H2
; BRANCH AROUND BRANCH
; THROW AWAY THE PARAMETER
F07C 58
3279
ES
o SAVE SEGMENT REGISTERS
; SAVE AX VAlUE
; GET INTO LOW BYTE
; ZERO TO HIGH BYTE
AX,l
; *2 FOR TABLE LOOKUP
POP
AX
JMP
VIDEO_REnJRN
MDV
AX. DATA
TEST FOR WITHIN RANGE
F07D E94701
3280
F080 684000
3281
FDB3 8EDB
3282
F085 B600B8
3263
MV
AX,OBSOOH
; SEGt1ENT FOR COLOR CARD
F068 8831:1000
F08C 81E73000
3284
HOV
DI,EQUIP_FLAG
; GET EQUIPMENT SETTING
3285
AUD
DI.30H
; ISOLATE CRT SWITCHES
112:
MDV
i DO NOTHING IF NOT IN RANGE
OS,AX
F090 83FF30
3286
CMP
DI,30H
j
F093 7S03
F095 8800eo
3287
JHE
HDV
H'
AX,OBOOOH
; SEGMENT FOR BW CARD
F098 8ECO
3289
3286
MV
ES,AX
; SET UP TO POINT AT VIDEO RAM AREAS
F09A 58
3290
POP
3291
HOV
AX
AH ,CRT_HODE
; RECOVER VALUE
F098 8A264900
F09F 2EFfA44SFO
3292
JMP
WORD PTR CS:[SI+OFFSET till
3293
M3:
IS SETTING FOR BW CARD?
VIDEO_ID
; GET CURRENT MODE INTO AH
ENDP
3294
0------------------------------------------
3295
; SET_MODE
3296
THIS ROUTINE INITIALIZES THE ATTACHMENT TO
3297
3298
THE SE LEeTED MODE.
3299
3300
(AU
= MODE
SELECTED (RANGE 0-9)
; OUTPUT
3301
3302
THE StREEN IS BLANKED.
; INPUT
NONE
;
--------- ------ -- ---- --- -- -----------------
3303
3304
0------ TABLES FOR USE IN SEnING OF HODE
3305
FOA4
3306
VIDEO_PARNS
3307
;------ INIT_TABLE
LABEL
BYTE
A-45
LOC OBJ
LINE
FOA4 3828200AIF0619
FGAB lC02070607
3308
3309
FOBO 00000000
3310
0010
3311
3312
SOURCE
M4
DB
38H. 28H ,2DH ,OAH, IfH,6 ~ 19H
DB
DB
lCH.2,7,6.7
0,0.0,0
EQIJ
.-VIDEO_PARMS
FOB4 71505AOAIF0619
3313
DB
71H.50H .SAH.OAH, IfH.6 ,19H
fOBB lC02070607
3314
FOCO 00000000
3315
DB
DB
0.0,0,0
FOCl't 3828200A7F0664
3316
3317
; SET UP fOR 40X25
; SET UP FOR BOX2S
lCH.t,7,6.?
38H .28H,20H,OAH, 7fH ,6,64H
FOCB 7002010607
3318
DB
DB
70H,2,1,6,7
fOOO 00000000
3319
DB
0,0,0,0
DB
DB
61H .50H ,S2H.OFH,19H,6.19H
DB
0.0,0.0
LABEL
"".0
2048
; 40X2S
; SET UP fOR GRAPHICS
FOD4 6150520F190619
3320
3321
FODe 19020D080(;
3:522
FOEO 00000000
FOE4 0008
332:3
332ft
3325
3326
FOE6 0010
3327
j
3328
OW
OW
4096
FOE8 0040
16384
; GRAPHICS
FOE4 0040
3329
OW
16384
3330
3131
;------ COLut1NS
FOEC
FOEC 2828505028285050
3332
J16
fOE4
t15
J SET UP FOR 80X2S B&N CARD
19H,2,ODH,OBH.OCtJ
OW
; TABLE OF REGEN LENGTHS
BOX2S
LABEL
BYTE
DB
40,40,80,80,40,40,80,80
3333
333't
3335
;------ C_RE:G_ToAB
FOF4
3336
M7
FOF4 2C282D.292A2EIEt9
3337
lASH
BYTE
DB
2Ctf ,28H,20H. 29H,2AH ,2EH .1£H,29H J
MOV
MOV
DX,03D4H
; ADDRESS OF COLOR CARD
Bl,O
; MODE SET FOR COLOR CARD
CMP
DI,30H
I
JHE
MOV
M"
AL,7
I OK WITH COLOR
MOV
IHC
OX.0384H
BL
; TABLE OF HODE SETS
33.)1;1
FOFC
3339
FOFC 8A0403
3340
FOFF B3aO
3341
FlOl
FI04
F106
FI08
FlOB
F10D
3342
3343
3344
3345
3346
3347
83FFlO
7507
B007
8A8403
FEtl
8AEO
SET_HOOE
M8:
PROt
HEAR
IS Bioi CARD INSTALLED
INDICATE Bioi CARD MODE
ADDRESS OF
aw CARD
ew CARD
HOOE SET FOR
FlOf A24900
3348
HOV
MOV
CRT_t100E .AL
I SAVE IN GLOBAL V,lRIABlE
F112 89166300
3349
HOV
ADDR_6845,DX
; SAVE ADDRESS OF BASE
Fl16 IE
FI17 50
3350
3351
PUSH
OS
AX
; SAVE MODE
F116 52
3352
OX
; SAVE OUTPUT PORT VALUE
FI19
File
FUE
FUF
3353
3354
3355
3356
83C204
SAC3
EE
5A
F120 ZBtD
3357
F122 8ED8
3358
F124 C51E7400
PUSH
PUSH
AH.Al
; SAVE ttODE IN AH
j
SAVE POINTER TO DATA SEGMENT
ADO
MOV
OX.4
j
AL-,Dl
J GET MODE SET FOR CARD
OUT
POP
OX,AL
; RESET VIDEO
OX
A)(,AX
; SET UP FOR AB50 SEGMENT
POUlT TO CONTROL REGISTER
; BACK TO BASE REGISTER
SUB
MOV
DS,AX
3359
3360
ASSUME
DS:ABSO
lOS
BX,PARM_PTR
; GET POINTER TO VIDEO PARMS
3361
3362
3361
3364
POP
ASSUME
MOV
CMP
AX
; RECOVER PARMS
FU6 7209
F138 0309
Fl3A 80FC07
3365
3366
3367
3368
3369
3370
FI30 nOl?:
3371
F13F 0309
3372
3373
3374
3375
3376
F128 58
f129
FI2e
FI2f
FUI
B91000
80FC02
7210
0309
F133 80FC04
F14t
f141 50
f142 32E4
I ESTABLISH VECTOR TABl.E ADDRESSING
DS:CODE
CX.M4
; LENGTH OF EAC"" ROW OF TABLE
DETERMItlE WHICH ONE TO USE
AH.2
j
JC
M9
i MODE IS 0 OR 1
ADD
CMP
ex,tx
J MOVE TO NEXT ROW OF INIT T A8lE
JC
AH.4
ADO
M9
8X,CX
CMP
AH,7
JC
ADO
M"
8x,ex
;------ ex
; I10DE IS
e
OR 3
J MOVE TO GRAPHICS ROW OF INIT_TASlE
i
MOOE IS 4.S. OR 6
, MOVE TO BN CARD ROW OF INIT_TABLE
POINTS TO CORRECT RON OF INITIALIZATION TABLE
M9:
; OUT_INIT
3377
PUSH
3376
xo.
AX
AH,AH
; SAVE NODE IN AH
i
AH
~IlL
SERVE AS REGISTER HUttB[R DURING LOOP
3379
3380
;------ lOOP TltRCUGH TABLE, OUTPUTTTING REG ADDRESS, THEN VALUE FRDt1 TA8LE
3381
Fl44
3362
F144 BAC4
3383
A-46
; nUT lOOP
M10:
MOV
j
GET 6845 REGISTER NUMBER
lOC OBJ
LINE
F146 EE
3384
OUT
DX,Al
F147 42
3385
INC
OX
POINT TO OAT A PORT
F14& FEe4
3386
INC
AH
NEXT REGISTER VALUE
F14A 8AO?
3387
HOV
AL,lBX]
GET TABLE VALUE
Fl4C EE
Fl40 43
3388
OUT
DX,AL
3389
INC
BX
F14E 4A
3390
OEC
OX
; BACK TO POINTER REGISTER
F14F E2f3
3391
LOOP
M1.
; 00 THE WHOLE TABLE
FIS1 58
3392
POP
F152 IF
SOURCE
OUT TO CHIP
~lEXT
AX
IN TABLE
GET MODE BACK
3393
POP
os
3394
ASSUME
DS:DATA
; RECOVER SEGMENT VALUE
3395
3396
; ------ FILL REGEN AREA WITH BLANK
3397
Fl53 33fF
3398
XOR
01.01
Fl55 893E4EOO
3399
HOV
CRT_STA~n
SET UP POINTER FOR REGEN
,01
START ADDRESS SAVED IN GLOBAL
F 159 C606620000
3400
HOV
ACTIVE_PAGE ,0
SET PAGE VALUE
F15E 890020
3401
HOV
CX.8192
NUMBER OF WORDS IN COLOR CARD
Fl61 BOFC04
3402
CMP
AH,4
TEST FOR GRAPHICS
NO_GRAPHICS_INIT
noe
3403
JC
M12
F 166 80FC07
3404
CHP
AH.7
TEST FOR
Fl69 7404
3405
JE
H11
BW_CARD_INIT
Flb4
Flbe 33CO
3406
Fl6D EB06
3407
FloF
3406
FloF 890008
3409
FIn
3410
FIn 882007
3411
FI7S
3412
fl7S F3
3413
XOR
AX,AX
JHP
SHORT 1113
B~
CARD
FIll FOR GRAPHICS MODE
CLEAR_BUFFER
H11:
BW_CARO_INIT
MOV
CX.2'048
BUFFER SIZE ON BW CARD
HOV
AX ••
FILL CHAR FOR AlPHA
H12:
NO_GRAPHICS_INIT
• +7*256
H13:
; ClEAR_BUFFER
REP
STOSW
; FIll THE REGEN BUFFER WITH BLANKS
FI76 AS
3414
3415
;------ ENABLE VIDEO AND CORRECT PORT SETTING
3416
FI77 C706bOQ06700
3417
HOV
CURSOR_MOOE,67H
SET CURRENT CURSOR MODE
F17D A04900
3416
MOV
AL.CRCMOOE
GET THE MODE
Flao 32E4
3419
XOR
F182 8BFO
3420
MOV
SI.AX
TABLE POINTER. IHDEXED BY MODE
FIB4 88166300
3421
MOV
DX.ADDR_6845
PREPARE TO OUTPUT TO VIDEO ENABLE PORT
OX.4
INTO AX REGISTER
AH, AH
FlBB 83C204
3422
ADD
FIBB 2E8A84f4FO
3423
NOV
Al,cs:lsI+QFFSET H7]
F 190 EE
3424
OUT
OX.AL
FI9l A2bSOO
3425
HOV
SET VIDEO ENABLE PORT
3426
3427
;------ DETERMINE NUMBER OF COLUMNS, BOTH FOR ENTIRE DISPLAY
3428
;------ AND THE HUMBER TO BE USED FOR TTY INTERFACE
3429
F 194 2:EBA84ECFO
3430
MOV
Al.CS:[SI + OFFSET M61
FI99 32E4
3431
XOR
AH,AH
FI9B A34AOO
3432
NOV
;. NUMBER OF COll.JMl'.fS IN THIS SCREEN
3433
3434
; ------ SET CURSOR POSITIONS
3435
F19E 81E60EOO
3436-
AND
SI.OEH
FlA2 2E8BBCE4FO
3437
MOV
CX.CS:[SI + OFFSET M5J
FlA7 890E4COO
3433
MOV
; SAVE LENGTH OF CRT -- tWT USED FOR Bioi
FlAB 890800
3439
HOV
; ClEAR ALL CURSOR POSITIONS
FUE BF5COO
3440
HOV
FIBI IE
3441
FIBl 07
3442
POP
ES
FIB3 33CO
3443
XOR
AX.AX
FIBS F3
3444
REP
STaSI.!
PUSH
OS
j
WORD OFFSET INTO ClEAR lENGTH TABLE
;, LENGTH TO CLEAR
ESTABLISli SEGMENT
ADDRESSING
; FILL WITH ZEROES
FlB6 AS
3445
3446
j------
SET UP OVERSCAN REGISTER
3447
FIB7 42
3448
INC
OX
SET OVERSCAN PORT TO A OEFAUL T
FIBB B030
F ISA 803E490006
FIBf 7502
3449
HOV
AL,30H
VALUE OF 30H FOR ALL MODES EXCEPT 640X200
3450
CHP
CRT_MODE .6
SEE IF THE MODE IS 640X200 BW
3451
JNZ
M14
IF IT IStH O,,+OX200. THEN GOTO REGULAR
FICI S03F
3452
HOV
AL,3FH
IF IT IS 640X200. THEN PUT IN 3FH
FlC] EE
3453
OUT
DX.Al
OUTPUT THE CORRECT vALUE TO 309 PORT
FIC4 Al600D
3454
HoV
CRT_PAllETTE .AL ; SAVE THE VALUE FOR FUTURE USE
M14:
3455
3456
j------ NORMAL RETURN FROM All VIDEO RETURNS
3457
A-47
LaC OBJ
LINE
SOURCE
FlC7
3458
FIC7 SF
3459
POP
Flce SE
3460
POP
01
51
FIC9 56
3461
POP
BX
FlCA
3462
FICA 59
3463
POP
CX
Flce SA
3464
POP
OX
Flee IF
3465
3466
POP
os
FICO 07
POP
ES
FICE CF
3467
IRET
VIDEO_RETURN:
MIS:
j
VIDEO_RETURN_C
RECOVER SEGMENTS
All DONE
3468
SET_MODE
3469
; - --- -- ----- - ----------------------- ---------
3470
SET_CTYPE
3471
3472
THIS ROUTINE SETS THE CURSOR VALUE
INPUT
3473
3474
ENOP
(ex)
HAS CURSOR VALUE CH-START LINE, Cl-STOP LINE
; OUTPUT
3475
NONE
FieF B40A
3476
3477
34"18
fIDl 890E6000
3479
MOV
CURS!)R_MOOE,CX
SAVE IN DATA AREA
FlDS E80200
3480
CAll
Hl6
OUTPUT
Fl08 EBED
3481
JMP
FIeF
; - - -- - - -- -------- ------------------- ----- ---PROC
NEAR
6845 REGISTER FOR ClmSOR SET
AH,10
ex
REG
3482
3483
;------ THIS ROUTINE OUTPUTS THE CX REGISTER TO THE 6845 REGS NAMED IN AH
3484
N16:
FICA
FIOA 88166300
3485
3486
OX.ADDR_6845
; ADDRESS REGISTER
FIDE 8AC4
3487
MOV
Al,AH
; GET VALUE
FlED EE
3488
OUT
OX,Al
FIEI 42
3489
WC
OX
FIE2 MCS
3490
HOV
Al.CH
FlE4 EE
3491
OUT
OX,AL
FIE5 4A
OX
MOV
; REGISTER SET
DATA REGISTER
; DATA
3492
DEC
FIE6 BAC4
3493
MOV
FIE8 FEee
34q4
INC
Al
POINT TO OTHER DATA REGISTER
flEA EE
3495
OUT
OX.Al
SET FOR SECOND REGISTER
FIEB 42
3496
INC
FlEC BACI
3497
MOV
Al,CL
flEE EE
3498
OUT
OX.AL
fiEF C3
3501
3502
SET_CTYPE
3503
ALL DONE
Elmp
---------------
THIS ROUTINE SETS THE CURRENT CURSOR POSITION TO THE
NEW X- Y VALUES PASSED
INPUT
3506
DX -
3507
3$08
SECOND DATA VALUE
-------------------------- SET_CPOS
3504
350$
OX
RET
3499
3500
AL.AH
ROW,COLUMN OF NEW CURSOR
BH - DISPLAY PAGE OF CURSOR
; OUTPUT
3509
CURSOR IS SET AT 6845 IF DISPLAY PAGE IS ClmRENT DISPLAY
3510
; ----- ---- --------- --------------- -----------
FIFO
3511
SET_CPOS
FIFO 8ACF
3512
F IF2 32EO
3513
XOR
CH.CH
,
FIF4 DlE1
3514
SAl
CX.1
; WORD OFFSET
FIF6 88Fl
3515
MOV
SI.CX
; USE INDEX REGISTER
FIFS 89945000
PROC
MOV
NEAR
CL,ElH
t ShOFFSET
ESTAElLISH lOOP COUNT
3516
MOV
Fife 383E6200
3517
CHP
ACTIVE_PAGE .BH
FlOD 7505
3518
JHZ
M17
; SET_epOS_RETURN
Fl02 8BC2
Fl04 E80200
3519
MOV
AX,DX
; GET RaW/COLUMN TO AX
352:0
CALL
M18
Fl07
3521
Fl07 EBBE
3522
JMP
VIDEO_RETt.mN
3523
CURSOR_POSH) ,OX
; SAVE THE POINTER
CURSOR_SET
M17:
SET_CPOS_RETURN
SET_CPOS
END?
3524
3525
;------ SET CURSOR POSITION, AX HAS ROW/COLUMN FOR CURSOR
3526
F209
3527
F209 Ee7FOD
3528
CALL
POSITION
FlOC 89C8
3529
MOV
CX.AX
FlOE 030E4EOO
3530
ADO
CX,CRr_START
F212: DIF9
3531
SAR
CX,1
MOV
AH,14
F214 B40E
A-48
3532
M18
PROC
NEAR
; DETERMINE LOCATION IN REGEN BUFFER
;
ADD IN THE START ADDRESS FOR THIS PAGE
DIVIDE BY 2: FOR CHAR ONLY COUNT
; REGISTER NUMBER FOR CURSOR
lOC OBJ
LINE
SOURCE
F216 ESCIFF
3533
F219 C3
3534
3535
",.
3536
3537
i --------------------------------------------
CALL
Hlb
; OUTPUT THE VALUE TO THE 6845
RET
ENDP
READ_CURSOR
3538
THIS ROUTINE READS THE CURRENT CURSOR VALUE fROM THE
3539
6845, FORMATS IT, AND SENDS IT BACK TO THE CAllER
3540'
INPUT
3541
3542
BH -
PAGE OF CURSOR
; OUTPUT
3543
OX - ROW, COLUMN OF THE CURRENT CURSOR POSITION
ex - CURRENT CURSOR MODE
3544
3545
j -- -- -- ---------- --- - ---- -- - - --- -- -- ---- ----
3546
READ_CURSOR
F2lA 8ADF
3547
FZIC 32:FF
F21E DIU
3548
"OV
XOR
BH.BH
3549
SAL
BX.l
F220 88975000
3550
HOV
OX. [BX+OFFSET CURSOR_POSN)
F224 SSOE6000
HOV
F228 5F
3551
3552
CX,CURSOR_MODE
POP
DI
F229 5£
3553
PDP
SI
F22A 58
3554-
PDP
BX
F22:B 58
3555
PDP
AX
F2tC 58
3556
PDP
AX
F214
PROC
NEAR
BL.BH
F220 IF
3557
PDP
OS
F22E 07
3558
POP
ES
F2:2:F CF
3559
IRET
; WORD OFFSET
; DISCARD SAVED ex AND ox
WOP
3560
READ.CURSOR
3561
3562
; ---- ---------------------------------------; AtT_DISP_PAGi:
THIS ROUTINE SETS THE ACTIVE DISPLAY PAGE, AlLOWING
3563
3564
THE FULL USE OF THE RAM SET ASIDE FOR THE VIDEO ATTACHMENT
3565
INPUT
3566
3567
AL HAS THE NEW ACTIVE DISPLAY PAGE
; OUTPUT
3568
F2:30
3569
3570
THE 6845 IS RESET TO DISPLAY THAT PAGE
; -------------------------------------------ACT_DISP_PAGE
PROC
NEAR
F230 A26200
3571
MOY
ACTIVE_PAGE .AL
F233 8BOE4COO
3572
MOV
CX,CRT.LEN
F237 98
3573
CBW
F2.38 50
; SAVE ACTIVE PAGE VALUE
I GET SAVED LENGTH OF REGEN BUFFER
; CONVERT AL TO WORD
3574
PUSH
AX
F239 F7El
3575
HUL
ex
j
F2:38 434£00
3576
MOV
CRT_START ,AX
; SAVE START ADDRESS FOR LATER REQUIREMENTS
F23E 8BCS
3577
MOV
CX,AX
; START ADDRESS TO
F2:40 DlF9
3578
SAR
CX.l
; DIVIDE BY 2 FOR 6845 HANDLING
F2:42 B40C
3579
MOV
AH.12
; 6845 REGISTER FOR START ADDRESS
F2:44 EM!FF
3580
CALL
1116
3581
POP
BX
F247
sa
; SAVE PAGE VALUE
DISPLAY PAGE TIMES REGEN LENGTH
; RECOVER PAGE VALUE
H48 DIE3
3582
SAL
eX.l
F24A 88875000
3583
MOV
AX. [ex
H4E EBB8FF
3584
CALL
1118
F251 £973FF
3585
; *2 FO'R WORD OFFSET
JMP
VIDEO_RETURN
+
OffSET CURSOR_POSN I
j
ACT_DISP_PAGE
3587
j --------------------------------------------
nus
PAGE
EHOP
SET COLOR
3589
THIS ROUTINE WILL ESTABLISH THE BACKGROUND COLOR, THE OVERSCAN COLOR,
3590
AND TIlE FOREGROUND COLOR SET FOR MEDIUM RESOLUTION GRAPHICS
3591
INPUT
3592
(BHJ HAS COLOR 10
3593
IF BH=O, THE BACKGROUND COLOR VALUE IS SET
3594
FROI1 THE LOW BITS OF BL 10-31)
3595
IF BH=I. THE PALLETTE SELECTION IS MADE
BASED ON THE LOW BIT OF BL:
3596
3597
0
3598
I
= GREEN, RED,
= BLUE. CYAN,
YELLOW fOR COLORS 1.2,3
MAGENTA FOR COLORS 1,2.3
(BU HAS THE COLOR VALUE TO BE USED
3599
3600
; GET CURSOR FOR
SET THE CURSOR POSITION
3586
3588
ex
; OUTPUT
THE COLOR SELECTION IS UPDATED
3601
------------------ -- ------------ ------------
3602
;
F2:54
3603
SET_COLOR
F254. 68166300
3604
MDV
DX,ADDR_6B45
j
F2:58 83C205
3605
ADD
DX,S
; OVERSCAN PORT
F2:58 AQ6600
3606
MDV
AL.CRT_PALLETTE
j
F2:SE OAFF
3607
OR
BH.BH
; IS THIS COLOR O?
PROC
NEAR
I/O PORT FOR PALETTE
GET THE CURRENT PALLETTE VALUE
A-49
LOC QBJ
F260 750E
LINE
SOURCE
M,.
JHZ
360B
; OUTPUT COLOR 1
3609
3610
;------ HANDLE COLOR 0 BY SETTING THE BACKGROUND COLOR
3611
F262 24EO
3612
AND
AL,OEOH
F264 aODIF
3613
AND
BL,OlFH
; TURN OFF HIGH 3 BITS OF INPUT VALUE
f267 OAC3
3614
OR
AL,BL
; pur
F269
3615
F269 EE
3616
3617
OUT
OX,AL
F26A A26600
MOV
CRT_PAllETTE .Al ; SAVE THE CmOR VAWI:
F26D E957FF
3618
JMP
VIDEO_RETURN
; TURN OFF LOW 5 BITS OF CURRENT
M19:
VALUE INTO REGISTER
; OUTPUT THE PALLETTE
;output color selection to 3d9 port
3619
3620
; ------ HANDLE COLOR 1 BY SElECTING THE PALLETTE TO BE USED
3621
F270
362:2
F270 240F
3623
AND
AL,OOFH
F272 DOE6
3624
5"R
BL.l
F274 73F3
3625
JNe
M19
f276 OCZO
3626
F278 EBEF
3627
M20:
; TURN OFF PAllETTE SElECT BIT
TEST THE LOW ORDER BIT OF Bl
; ALREADY DONE
OR
AL,20H
j
JMP
M19
;GODOn
3626
SET_COLOR
3629
3630
;
jVlOEO STATE
TURN ON PALlETTE SElECT BIT
ENOP
--------------------------------------------
3631
RETURNS THE CURRENT VIDEO STATE IN AX
3632
AH
= NUMBER
OF COLlJt1NS ON THE SCREEN
3633
AL '" CURRENT VIDEO MODE
3634
BH
=
CURRENT ACTIVE PAGE
F27A
3635
3636
VIDEO_STATE
; ---- ---- -------- --- ------------------------PROC
NEAR
F27A 8A264AOO
3637
MOV
F27E A04900
3638
MOV
AL.CRT_MODE
j
F281 8A3E6200
3639
MOV
BH,ACTIVE_PAGE
; GET CURRENT ACTIVE PAGE
; RECOVER REGISTERS
AH ,BYTE PTR CRT_COLS
; GET NUMBER OF COLUMNS
CURRENT MODE
F265 SF
3640
POP
or
F286 5E
3641
POP
F287 59
3642
POP
5r
ex
j
Fl68 E93FFF
3643
JMP
M15
; RETURN TO CAllER
DISCARD SAVED
ex
3644
3645
3646
;
---- --- ---------------------------POSITION
THIS SERVICE ROUTINE CALCULATES THE REGEN BUFFER ADDRESS
3647
3648
3649
OF A CHARACTER IN THE ALPHA MODE
; INPUT
3650
3651
3653
AX
= ROW.
AX
=
COLUMN POSITION
; OUTPUT
3652
OFFSET OF CHAR POSITION IN REGEN BUFFER
j -- ---- ----- --- ----- ------------- ----
FlaB
3654
F28B 53
3655
PUSH
BX
F28C 8608
3656
MOV
aX.AX
Fl8E 8AC4
3657
MOV
f290 F6264AOO
3658
MUl
f294 32fF
3659
XOR
BH,BH
F296 03C3
3660
AOD
AX,BX
; ADD IN COlUT1N VALUE
F298 DIED
3661
SAL
AX.l
• ,. 2 FOR ATTRIBUTE BYTES
F29A 56
3662
PDP
BX
F29B C3
3663
RET
POSITION
PRoe
3664
POSITION
3665
; ---- ----- ---
3666
; SCROLL UP
SAVE REGISTER
ROWS TO AL
AL.AH
; DETERMINE BYTES TO ROW
ENDP
------------------------------
THIS ROUTINE MOVES A BLOCK OF CHARACTERS UP
3667
3668
3669
NEAR
ON THE SCREEN
,INPUT
= CURRENT CRT MODE
= HUME·ER OF ROWS TO
3670
(AH)
3671
(AL)
3672
(CX)
3673
(OX)
=
=
3674
(BH J
= ATTRIBUTE
3675
(OS)
= OAT A
3676
(ES) '" REGEN BUFFER SEGMENT
3677
SCROLL
ROW/COLUl1N OF UPPER LEFT CORNER
ROW/COLUMN Of LOI--IER RIGHT CORNER
TO BE USED ON BLANKED LINE
SEGMENT
; OUTPUT
3678
NONE -- THE REGEN BUFFER IS MODIFIED
3679
; -- ---------- ----- -- - -------------- --- -- ----
3680
ASSUME
CS :CODE ,OS: DATA .ES:DATA
PROC
NEAR
F29C
3681
F29C BADB
3682
MOV
BL.AL
; SAVE LINE COUNT IN BL
F29E 80FC04
3683
eMP
AH.4
; TEST FOR GRAPHICS MODE
A-50
SCROLL_UP
LOC OBJ
LINE
SOURCE
HAl 72:08
f243 80FC07
3684
JC
NI
; HANDLE SEPARATELY
3685
CMP
AH,7
; TEST F OR Bioi CARD
F2A6 7403
""86
3687
JE
JMP
NI
F2A8 E9F301
f2A8
3688
f2AB 53
3669
PUSH
BX
; SAVE FILL ATTRIBUTE IN BH
; UPPER LEFT POSITION
GRAPHICS_UP
Nl:
j
UP_COtHINllE
FZAC 8BCl
3690
MOV
AX,CX
FZA£ £83900
3691
CALL
SCROLL_POSITION ; DO SETUP FOR SCROll
F2Bl 7433
3692
JZ
F283 03FO
3693
ADO
FlBS 8A£b
MOV
; # ROWS IN BLOCK
F2B7 ZAB
3694
3695
SUB
; I ROWS TO BE MOVED
F289
3696
F289 E67500
3697
3698
FlBC 03F5
; BLANK_FIELD
; FROM ADDRESS
; ROW_LOOP
CAll
ADO
HI0
SI,BP
DI,BP
; MOVE ONE ROW
; COUNT (IF LINES TO MOVE
FlBE 03FO
F2eo fEee
3699
AOO
3700
DEC
AM
F2:C2: 75F5
3701
JNZ
N2
f2:C4
3702
F2C4 58
3703
F2C5 B020
3704
F2:C7
3705
F2C7 £87000
3706
; POINT TO NEXT LINE IN BLOCK
; ROJrCLOOP
N3:
; CLEAR_ENTRY
POP
AX
MOV
AL,
; RECOVER ATTRIBUTE IN AH
; FILL WlTH BLANKS
I
; CLEAR_lOOP
N4:
CALL
NIl
; CLEAR THE ROW
F2CA 03FO
3707
ADO
nI,BP
; POINT TO NEXT LINE
Flce FEeB
FleE 75F7
3708
DEC
BL
; COUNTER OF LINES TO SCROLL
3709
JNZ
N4
; CLEAR_100P
FZOO
3710
; SCROLL_END
; GET LOCATION
F2:00 884000
3711
MOV
AX,OATA
F2D3 8E08
3712
MOV
OS,AX
F205 803£490'007
3713
CMP
CRT_MODE,7
JE
N6
; IS THIS THE BLACK AND WHITE CARD
; IF SO. SKIP THE MODE RESET
FlOA 7407
3714
FZOC A06500
3715
MOV
AL,CRT_MODE_SET ; GET THE VALUE OF THE MODE SET
FZOF 8A0803
3716
MOV
OX,030BH
F2El EE
3717
OUT
OX,AL
F2E3
3718
F2£3 E9EIFE
3719
F2E6
3720
F2E6 BADE
3721
F2:E8 EBOA
; ALWAYS SET COLOR CARD PORT
N6:
JMP
N7:
; BLANK_FIElD
BL,DH
; GET ROW COUNT
3722
N3
; GO CLEAR THAT AREA
3723
ENOP
3724
3725
; ----- HANDLE COMMON SCROLL SET UP HERE
3726
FlEA
372.7
F2:EA 803£490002
3728
F2.EF 7219
F2Ft 803£490003
FZF6 7712
3731
SCROLl.-POSITlON PRoe
NEAR
Ct1P
CRT_t10DE,2
; TEST FOR SPECIAl CASE HERE
3729
JB
N9
; HAVE TO HANDLE BOX25 SEPARATELY
3730
CMP
JA
3732
3733
;------ SOX2S COLOR CARD SCROLL
3734
3735
PUSH
ox
fZF9 BADA03
3736
MOV
nX,30AH
f2fC 50
3737
PUSH
AX
F2FD
3738
fZFD EC
3739
F2F8 52
; GUARANTEED TO BE COLOR CARD HERE
N8:
IN
Al,OX
; GET PORT
F2:fE A808
3740
TEST
Al,S
; WAIT FOR VERTICAL RETRACE
noD 74F8
f302 B025
3741
3742
JZ
HB
; WAIT_DISP_ENABLE
MOV
AL.25H
F304 BAD803
3743
MOV
DX.03D8H
f307 EE
3744
OUT
OX.Al
; TURN OFF VIDEO
nOB 58
F309 5A
3745
POP
AX
; DURING VERTICAL RETRACE
f30A E87EFF
FlOD
flU
F31l
F31S
03064£00
86F8
B8FO
28Dl
3746
3747
POP
N9:
OX
CALL
POSITION
374S
ADD
AX , CRT_START
; CONVERT TO REGEN POINTER
; OFFSET OF ACTIVE PAGE
3749
MOV
OI.AX
; TO ADDRESS FOR SCROLL
3750
MOV
51 ,A)(
; FROM ADDRESS FOR SCROLL
37501
SUB
OX,CX
; DX :: #ROWS. ICOLS IN BLOCK
DH
F3I7 FEC6
3752
INC
F319 FEe2
3753
INC
OL
; INCREMENT FOR 0 ORIGIN
F3IB 32£0
3754
XOR
CH.CH
; SET HISH BYTE OF COUNT TO ZERO
F3ID 882£4AOO
3755
MOV
sp,eRT_COlS
; GET NUMBER OF COLUMNS IN DISPLAY
F3tl 03EO
3756
ADD
BP,SP
; TIMES 2 FOR ATTRIBUTE BYTE
F323 8AC3
3757
MOV
AL.BL
; GET LINE COUNT
F325 F62:64400
3758
MUL
SYTE PTR CRT_COLS
F32:9 03eo
3759
ADD
AX,AX
i
DETERMINE OfFSET TO FROM ADDRESS
; *2 fOR ATTRIBUTE BYTE
A-51
LOC OBJ
LINE
SOURCE
F326 06
3760
PUSH
ES
F32C IF
3761
POP
as
F320 80FBoa
3762
CNP
BL,D
F330 C3
3763
3764
ESTABLISH ADDRESSING TO REGEN BUFFER
FOR BOTH POINTERS
o
RET
SCROll MEANS BLANK FIELD
; RETURN WITH f LAGS SET
SCROll_POSITION ENOP
3765
3766
; ------ HOVE_ROW
F331
3767
HID
F331 BACA
3768
NOV
el.Ol
; GET • OF COLS TO MOVE
F333 56
3769
PUSH
F334 57
3770
PUSH
sr
or
; SAVE START ADDRESS
F335 F3
3771
REP
MOVSW
j
POP
or
sr
; RECOVER ADDRESSES
PROC
NEAR
MOVE THAT LINE ON SCREEN
F336 A5
F337 SF
3772:
F338 SE
3773
POP
F339 C3
3774
RET
3775
HI0
ENDP
3776
3777
; ------ CLEAR_ROW
F33A
3778
Hll
F33A BACA
3779
NOV
F33C 57
3780
PUSH
or
F3JD F3
3781
REP
STOSIo!
POP
or
PROt
NEAR
eL,Ol
; GET. COLlJttNS TO CLEAR
I STORE THE FILL CHARACTER
F33E AS
F33F SF
3782
F340 C3
3783
RET
3784
Hll
ENDP
3785
;
3786
; SCROll_DOWN
---- --------- ---- -------- ----------
3787
THIS ROUTINE MOVES THE CHARACTERS WITHIN A DEFIt-tED
3788
BLOCK DOWN' ON THE SCREEN. FILLING THE TOP LINES
3789
3790
WITH A DEFINED CHARACTER
;II'!PUT
37'H
(AH 1 ;: CURRENT CRT MODE
3792
(AL) ;: NUMBER OF LINES TO SCROLL
3793
(ex)
3794
{OX, ;: LOWER RIGHT CORNER OF REGIOI'!
;: UPPER LEFT CaRtIER OF REGION
(BH) ;: FILL CHARACTER
3795
3796
(OS, ;: DATA SEGMENT
3797
I ES J ;: REGEN SEGMENT
3798
;OUPUT
NONE -- SCREEN IS SCROLLED
3799
3800
-
-- ------ -------------- ---- ----
F341
3801
SCROLl_DOI-JN
F341 FD
3802
STO
PROC
NEAR
F342 8AM
3803
~IOV
BL,AL
LINE coutn TO 8L
TEST FOR GRAPHICS
DIRECTION FOR SCROll DOWN
F344 80FC04
3804
CMP
AH.4
F347 7208
3805
JC
H12
TEST FOR BW CARD
F349 80FC07
3806
CNP
F34C 7403
3807
JE
H12
F34E E9A601
3808
JNP
GRAPHICS_DOWN
AH.7
F351
3809
F351 53
3810
PUSH
8X
LOWER RIGHT CORNER
GET REGEN LOCATION
1'112:
; CONTINUE_DOWN
F352 86C2-
3811
NOV
AX,OX
F354 E893FF
3812
CALL
SCROLL_POSITION
; SAVE ATTRIBUTE IN BH
F357 7420
3813
JZ
H16
F359 2BFO
3814
SUB
SI,AX
F35B 8AE6
3815
MOV
AH,DH
F3S0 ZAn
3816
SU8
AH,Bl
COUNT TO MOVE IN SCROll
HOVE
51 IS FROM ADDRESS
; GET TOTAL
'* ROWS
1'113:
F3SF
3817
F35F E8CFFf
3818
CAll
HID
F362 2BF5
3819
SUB
SI.BP
F364 2BFO
OI.BP
3820
SUB
F366 FEee
31321
DEC
AH
F3b8 75F5
3822
JHZ
H13
F3bA.
3823
F36A S8
3824
POP
AX
F3bB B020
3825
NOV
Al.
nbD
3826
F360 E8CAFF
ot~E
ROW
N14:
i
RECOVER ATTRIBUTE IN AH
NlS:
3827
CALL
Hll
CLEAR OHE ROW
F370 2BfD
3828
SUB
DI,DP
GO TO NEXT ROW
F372 fECB
3829
OEC
8L
F374 7SF7
3830
JNl
N15
F376 E957FF
3831
F379
3832
F379 8ADE
3833
A-52
JNP
H5
NOV
BL,DH
N16:
; SCROll_END
LOC OBJ
LINE
Fl7B EBED
3834
JMP
3835
SCROlL_DO\i.:N
3836
; ------ ------------- ---- -------------------
3837
SOURCE
ENDP
READ_AC_CURRENT
3838
THIS ROUTINE READS THE ATTRIBUTE AND CHARACTER AT THE CURRENT
3839
3840
N1'
CURSOR POSITION AND RETURNS THEM TO THE CALLER
; INPUT
3841
(AH) :; CURRENT CRT HODE
3842
(BH I :; DISPLAY PAGE ( ALPHA HODES ONLY
3843
(oS I :; DATA SEGMENT
3344
(ES) :; REGEN SEGI1ENT
3845
; OUTPUT
3846
(Al) :; CHAR READ
(AHI :; ATTRIBUTE READ
3847
3848
; ----------- ---- ---- - - -- - - -- ------ - - ------ASSUME
3849
CS :CODE .05: DATA. ES :DATA
READ_At_CURRENT PROt
F37D
3850
Fl7D BOFC04
3851
eMP
AH.4
FloO 7208
3852
Je
P1
FlB2 BOFC07
AH.7
NEAR
; IS THIS GRAPHICS
; IS THIS BW CARD
3853
eMP
F3B5 7403
3854
JE
P1
F387 E9A902
3855
JMP
GRAPHICS_READ
DBA
3e56
F3aA E8lAOO
3857
CAll
FINO_POSITION
F3BD BaF3
3856
MOV
SI.ax
3859
3860
I
PI:
;------
; READ_AC_CDNTlNUE
~AIT
; ESTABLISH ADDRESSING IN SI
FOR HORIZONTAL RETRACE
3861
F38F B8166300
3862
MOV
DX.ADDR_6845
; GET BASE ADDRESS
DX.6
; POINT AT STATUS PORT
f393 83C206
3863
ADO
F396 06
3864
PUSH
ES
F397 IF
3865
POP
os
; GET SEGMENT FOR QUICK ACCESS
F398
3866
P2:
; WAIT FOR RETRACE lOW
F39B EC
3867
IN
Al.DX
; GET STATUS
F399 ABOI
3868
TEST
Al.I
; IS HaRZ RETRACE lOW
F39B 75FB
3869
JNZ
P'
; WAIT UNTIL IT IS
F39D FA
3870
eLI
F39E
3871
F39E EC
3872
IN
AL.DX
; GET STATUS
F39F A801
3873
TEST
AL,1
; IS IT HIGH
FlAl 74FB
3874
JZ
P'
i
FlA3 AD
3875
lOOSW
F3A4 EnOFE
3876-
JMP
3877
READ_AC_CURRENT ENDP
F3A7
FlA7 BACF
3879
F3A9 32EO
3881
XOR
CH .CH
F3AB B8Fl
3882
HOV
SI.CX
; HOVE TO 51 FOR INDEX
;
; NO HORE INTERRUPTS
P3:
; WAIT FOR RETRACE HIGH
WAIT UNTIL IT IS
i GET THE CHAR/ATTR
VIDEO_RETURN
3878
FIND_POSITION
PROC
MoV
3880
NEAR
Cl.BH
; DISPLAY PAGE TO
'*
ex
F3AO 01E6
38&3
SAL
SI.l
F3AF 8B845000
3884
MOV
AX.[SI+ OFFSET CURSOR_POSH]
F3Bl 310B
3885
XOR
eX.BX
SET START ADDRESS TO ZERO
F3B5 E306
3886
JCXZ
P5
NO_PAGE
F387
F3B7 031E4COO
3887
nBB EZfA
3889
F3BD
3890
F3BO EBCBFE
nco
D308
F3CZ C3
P4:
3888
LENGTH OF BUFFER
lOOP
P5:
3891
; NO_PAGE
CALL
POSITION
3892
AOO
aX,AX
RET
DETERMINE LOCATION IN REGEN
; AOD TO START OF REGEN
3894
FINO_POSITION
3895
; - - ------ ---------------------------------
389&
i14RITE_AC_CURRENT
3897
Et-.'DP
THIS ROUTINE WRITES THE ATTRIBUTE AND CHARACTER AT
3898
THE CURRENT CURSOR POSITION
; INPUT
3900
I AH) ;; CURRENT CRT MODE
3901
(BH) ::; DISPLAY PAGE
3902
{CX I ;; COUNT OF CHARACTERS TO WRITE
3903
(All
3904
(Bli ;; ATTRIBUTE OF CHAR TO WRITE
3905
3908
3909
=
CHAR TO WRITE
105 I :; DATA SEGMENT
3906
3907
; GET ROW/COLUMN OF THAT PAGE
PAGE_LOOP
ADO
3693
3899
2 FOR WORD OffSET
(ES I ;; REGEN SEGMENT
; OUTPUT
NONE
; ------- -
~
- -- - -- --------------------- ---- ----
A-53
LOC OBJ
LINE
SOURCE
F3C3
3910
F3C3 80FC04
3911
eHP
AH.4
F3C6 7208
3912
Je
P6
nee
3913
eHP
AH.7
80FC07
Flee 7403
WRITE_AC_CURRENT
PROt
NEAR
IS THIS GRAPHICS
IS THIS Bioi CARD
JE
P6
JHP
GRAPHICS_WRITE
3917
HOV
AH,BL
F302 50
3'118
PUSH
AX
; SAVE ON STACK
F303 51
3919
PUSH
ex
; SAVE WRITE COUNT
F304 ESCOFF
3920
CALL
FIND_POSITION
n07 8BFB
3921
HOV
DI.ex
j
F3D9 59
392Z
POP
ex
; WRITE COUNT
F30A 58
3923
POP
ex
; CHARACTER IN ex REG
nco
E98101
3914
391~
F30a
3916
F300 BAn
F30B
3924
P6:
; WRITE_AC_CONTINUE
j
P7:
i
GET ATTRIBUTE TO AH
ADDRESS TO
or
REGISTER
WRITE_lOOP
3925
3926
;------ WAIT FOR HORIZONTAL RETRACE
3927
FlOB 88166300
3928
F1DF 83C206
3929
F3Ez
3930
MOV
DX,ADDR_6845
; GET BASE ADDRESS
ADO
OX.6
; POINT AT STATUS PORT
IN
pe:
3932
TEST
Al.OX
Al,!
; GET STATUS
F3E3 A80l
F3E5 75F6
3933
JNZ
P8
; WAIT UNTIL IT IS
F3E7 FA
3934
eLI
F3E2 EC
F3EB
3931
3935
; IS IT LOW
; NO MORE INTERRUPTS
P9:
F3EB EC
3936
Al.DX
; GET STATUS
F3E9 ABOI
3937
TEST
Alol
; IS IT HIGH
FlEB 74FB
3938
JZ
P9
; WAIT lmTIL IT IS
F3ED BBC3
AX,BX
; RECOVER THE CHAIUATTR
IN
3939
HOV
F3EF AB
3940
STOSW
F3FO FB
3941
STI
F3F1 f2E8
3942
lOOP
P7
F3f3 E9DIFD
3943
JNP
VIDEO_RETURN
; PUT THE CHAR/ATTR
INTERRUPTS BACK ON
;
3944
WRITE_At_CURRENT
3945
; ----- ---- ------------
3946
iWRlTE_C_CURRENT
--------- -----------
THIS ROUTINE WRITES THE CHARACTER AT
3947
3948
3949
THE CURRENT CURSOR POSITION. ATTRIBUTE UNCHANGED
; INPUT
{AH)
3950
=
CURRENT CRT MODE
3951
(BH) :; DISPLAY PAGE
3952
(ex J
:; COUNT OF CHARACTERS TO WRITE
3953
(AU
= CHAR
3954
(OS)
=
3955
(ES) :; REGEN SEGMENT
3956
AS MANY TIMES AS REQUESTED
ENOP
TO WRITE
DATA SEGMENT
iOUTPUT
NONE
3957
--------------------------------------------
3956
;
FlF6
3959
WRITE_C_CURRENT PROC
F3F6 80FC04
3960
CHP
NEAR
AH.4
F3F9 7208
3961
Je
Pl.
F3FB 80FC07
396Z
CNP
AH.7
F3FE 7403
3963
JE
PI0
F400 E97EOI
3964
JNP
GRAPHICS_WRITE
F403
3965
F403 50
3966
PUSH
AX
F404 51
3967
PUSH
ex
; IS THIS GRAPHICS
; IS THIS BW CARD
PIO:
; SAVE ON STACK
; SAVE WRITE COUNT
F405 E89FFF
3968
CALL
FIND_POSITION
F408 8BFB
3969
MOV
OI.BX
; ADDRESS TO 01
F40A 59
3970
POP
CX
; WRITE COUNT
F40B 58
3971
POP
ex
; Bl HAS CHAR TO WRITE
F40C
3972
Pl1:
; WRITE_lOOP
3973
3974
;------ WAIT FOR HORIZONTAL RETRACE
3975
F40C 88166300
3976
HOV
OX.AOOR_6645
; GET BASE ADORESS
F410 83C206
3977
ADO
DX.6
; POINT AT STATUS PORT
F413
3978
F413 EC
3979
IN
fJ.l.DX
; GET STATUS
F414 A801
3980
TEST
AL.I
j
F416 75F8
3981
JNZ
P12
; WAIT UNTIL IT IS
PIZ:
IS IT LOW
; NO MORE INTERRUPTS
F418 FA
398Z
F419
3983
F419 EC
3984
IN
AL.DX
; GET STATUS
F4lA .11.801
3<;185
TEST
Al.I
; IS IT HIGH
A-54
eLI
P13:
LaC OBJ
F41C 74F8
LINE
SOURCE
; WAIT UNTIL IT IS
F41E 8'&'C3
3987
Jl
MOV
F42:0 AA.
3988
SIOSB
INC
lOOP
01
Plt
JMP
VIDEO_RETURN
3986
F421 47
3989
F422 E2E8
3990
F424 E9A.OFD
3991
3992
PI3
AL,Bl
; RECOVER CHAR
; PUT THE CHAR/ATTR
; BUMP POINTER PAST ATTRIBUTE
i
AS MANY TIMES AS REQUESTED
WRITE_C_CURRENT ENDP
3993
; ------------- -------------------------------
3994
; READ DOT
3995
-- WRITE OOT
THESE ROUTINES WILL WRITE A 001, OR READ THE
3996
DOT AT THE IHOICATEO LOCATION
3997
ENTRY --
=
ROW (0-1991
!THE ACTUAL VALUE DEPeNOS ON THE HODEl
3998
OX
3999
CX ;:: COLUMN (
4000
Al = DOT VALUE TO WRITE (1,2 OR 4 BITS DEPEIICING ON MODE,
0-6391 ( THE VALUES ARE NOT RANGE CHECKED
I
REQ'O FOR WRITE DOT ONLY. RIGHT JUSTIFlEOI
4001
BIT 7 OF AL = 1 INDICATES XOR THE VALUE INTO TJ-IE LOCATION
4002
4003
OS ;:: DATA SEGMENT
ES ;:: REGEN SEGMENT
4004
4005
EXIT
4006
AL = DOT VALUE READ, RIGHT JUSTIFIED, READ ONLY
4007
4008
i --------------- -- ------ -- ----------- ----- ---
4009
ASSUME
CS :CODE ,DS:DATA,ES:OATA
4011
CALL
R'
4012
NOV
AL,fS:[SIJ
4013
ANO
F42F OlEO
4014
SHL
AL,AH
AL,Cl
F427
4010
F427 f83100
F42A 268A04
F42D 22C4
PROC
READ_DOT
NEAR
; DETERMINE BYTE POSITION OF DOT
; GET THE;: BYTE
; MASK OfF THE OTHER BITS IN TJ-IE BYTE
F431 8ACE
4015
HOV
F433 02CO
4016
ROL
CL.OH
AL,CL
; LEFT JUSTIFY THE VALUE
; GET NUMBER OF BITS IN RESULT
; RIGHT JUSTIFY THE RESULT
F435 E98FFD
4017
JMP
VIDEO_RETURN
; RETURN FROM VIDEO 10
ENOP
4018
4019
F438
F438 50
4021
4020
WRITE_DOT
PROC
AX
F439 50
4022
PUSH
PUSH
F43,., E8lEOO
4023
CALL
R3
F43D 02E8
4024
SHR
NEAR
AX
f43F 22C4
4025
AND
F441 Z68AOC
4026
MOV
AL,CL
AL,AH
CL,ES:[SII
F444 56
4027
POP
ex
F445 F6C380
4028
TEST
.2
F448 7500
BL.80H
4029
JNZ
F44A. F6D4
4030
NOT
AH
F44C 22CC
4031
ANO
(:L.AH
SAVE OOT VALUE
TWICE
DETERMIHE BYTE POSITION OF THE DOT
; SHIFT TO SET UP THE BITS FOR OUTPUT
; STRIP OFF THE OTHER BITS
; GET THE CURRENT BYTE
; RECOVER XOR FLAG
; IS IT ON
; YES. XOR THE DOT
; SET THE MASK TO REMOVE THE INDICATEO BITS
OR
AL.Cl
; OR IN THE NEW VALUE OF THOSE BITS
MOV
ES:[SI1,AL
; FINISH_DOT
; RESTORE THE BYTE IN MEMORY
POP
AX
JMP
VIDEO_RETURN
XO.
AL,CL
F44E OAel
4032
F450
F450 268804
4033
4034
F4S3 58
4035
F454 E970FO
4036
F4S7
4037
F457 32Cl
f459 EBFS
4038
4039
JMP
RI
Rl:
RZ:
; RETURN FROM VIDEO 10
; XOR_D01
; EXCLUSIVE OR THE DOTS
; fINISH UP THE I-IRITING
4040
WRITCDOT
4041
; --- ------------------------------------ -----
[NDP
THIS SUBROUTINE DETERMINES THE REGEN BYTE LOCATION OF
4042
4043
INDICATED ROW COLUMN VALUE IN GRAPHICS MODE.
4044
ENTRY
OX = ROW VALUE (0-1991
ex ::: COLUMN VALUE (0-6391
4045
4046
EXIT --
4047
4048
SI ::: OFFSET INTO REGEN BUFFER FOR BYTE OF INTEREST
4049
AH ::: MASK TO STRIP OFF THE BIT$ OF INTEREST
CL = BITS TO SHIFT TO RIGHT JUSTIFY THE MASK IN AH
4050
DH ::: I BITS IN RESULT
4051
4052
F45B
4053
F458 53
4054
F45C 50
4055
nil::
~-
; ------------------- -- --- --------- ~----- -----
R'
PROC
NEAR
PUSH
PUSH
6X
; SAVE BX DURING OFERATION
AX
; WILL SAVE AL DURING OPERATION
4056
4057
;------ DETERMINE 1ST BYTE IN IOICATED ROW BY MULTIPLYING ROW VAUJE BY 40
4058
; -.---. ( LOW BIT OF ROW DETERMINES EVEN/ODD. 80 BYTESIROki
4059
F45D B028
4060
MOV
AL.40
F45F 52
4061
PUSH
OX
SAVE ROW VALUE
A-55
LOC OBJ
LINE
SOURCE
F460 80E2FE
4062
AND
OL,OFEH
; STRIP OFF ODD/EVEN BIT
F463 F6E2
4063
MUL
OL
; AX HAS ADDRESS OF 1ST BYTE OF INDICATED ROW
F465 SA
4064
POP
OX
; RECOVER IT
F466 F6CZOl
4065
TEST
OL.!
; TEST FOR EVEN/ODD
F469 7403
4066
JZ
F46B 050020
4067
R"
AX,20DOH
F46E
4068
F46E 8BFO
4069
F470 58
4070
POP
AX
j
F471 8BDl
4071
MOV
OX,CX
; COLUMN VALUE TO OX
ADO
• JUMP IF EVEN ROW
; OFFSET TO LOCATION OF ODD ROWS
R4:
; EVEN_ROW
MOV
SI,AX
; MOVE POINTER TO SI
RECOVER AL VALUE
4072
4073
;------ DETERMINE GRAPHICS MODE CURRENTLY IN EFFECT
4074
4075
; SET UP THE REGISTERS ACCORDING TO THE MODE
4076
CH :: MASK FOR LOW OF COLUMN ADDRESS ( 7/3 FOR HIGHIHED RES)
4077
CL :: '" OF ADDRESS BITS IN COLUMN VALUE I 31Z FOR HIM}
4078
BL = MASK TO SELECT BITS FROM POItHED BYTE (80H/COH FOR HIM)
4079
BH :: NUMBER OF VALID BITS IN POINTED BYTE (
112 FOR H/M)
4080
F473 66C002
4081
F476 890203
4082
NOV
CX,302H
F479 803E490006
4083
MOV
CMP
BX,2COH
CRT_MODE ,6
F47E n06
4084
JC
R5
F480 BB8001
4085
MOV
BX,leOH
F483 890307
4086
MOV
CX,703H
; SET PARMS FOR MED RES
; HANDLE IF MED ARES
; SET PARMS FOR HIGH RES
4087
408e
F486
4089
F486 22EA
4090
; ------ DETERMINE BIT OFFSET IN BYTE FROM COLUMN MASK
RS:
AND
; ADDRESS OF PEL WITHIN BYTE TO CH
CH,DL
4091
4092
;------ DETERMINE:. BYTE OFFSET FOR THIS LOCATION IN COLUMN
4093
F488 D3EA
4094
DX,CL
; SHIFT BY CORRECT AMOUNT
F48A 03F2
4095
ADO
SI,OX
; ItICRfHENT THE POINTER
F48C 8AF7
4096
MOV
SHR
DH,BH
; GET THE # OF BITS IN RESULT TO DH
4097
4098
;------ MULTIPLY BH (VALID BITS IN BYTE) BY CH (BIT OFFSETJ
4099
F4SE 2AC9
4100
F490
4101
SUB
CL,CL
ZERO INTO STORAGE LOCATION
R6:
f490 DOC8
4102:
AL,1
LEFT JUSTIFY THE VALUE IN At (FOR WRITE)
F492 02CD
4103
ADO
CL,CH
ADD I!" THE BIT OFFSET VALUE
F494 HCF
4104
DEC
BH
F496 75F8
4105
JNZ
R6
, ON EXIT I CL HAS SHIFT COUNT TO RESTORE BITS
F498 8AE3
4106
MOV
AH,BL
; GET MASK TO AH
ROR
LOOP CONTROL
F49A D2EC
4107
SHR
AH,CL
; MOVE THE MASK TO CORRECT LOCATION
F49C 56
4108
POP
BX
; RECOVER REG
F490 C3
4109
RET
j
RETURN WITH EVERYTHING SET UP
4110
R3
4111
; --------------- -----------------------------
4112
; SCROLL UP
4113
4114
4115
4116
4117
4118
4119
ENDP
THIS ROUTINE SCROLLS UP THE INFORMATION ON THE CRT
WTRY -CH,CL :: UPPER LEFT CORNER OF REGION TO SCROLL
OH ,OL = LOWER RIGHT CORNER OF REGION TO SCROLL
BOTH OF THE ABOVE ARE IN CHARACTER POSITIONS
BH = FILL VALUE FOR BLANKED LINES
AL :: # LINES TO SCROLL (AL=O MEANS BLANK THE ENTIRE fIELD)
4120
OS = DATA SEGMENT
4121
ES
4122
4123
4124
=
REGEN SEGMENT
EXIT -NOTHHIG, THE SCREEN IS SCROllED
; -- -------- ----- ------------ --- --------------
F49E
4125
PROC
NEAR
F49E 8A08
4126
MOV
BL,AL
; SAVE LWE COUNT IN BL
f4AO 8BCl
4127
MOV
AX,CX
; GET UPPER LEFT POSITION INTO AX REG
4128
4129
;------ USE CHARACTER SUBROUTINE fOR POSITIONING
4130
j------ ADDRESS RETURNED IS MULTIPLIED BY 2: FROM CORRECT VALUE
4131
F4A2 E86A02
4132
CAll
GRAPH_POSN
F4A5 8BFS
4133
MOV
DI,AX
4134
4135
4136
A-56
;------ DETERMINE SIZE OF WINDOW
SAVE RESULT AS DESTINATION ADDRESS
lOC OBJ
F4A7 ZBDI
LINE
SOURCE
4137
SUB
DX,CX
F4A9 81C20101
4138
ADD
DX.I01H
; ADJUST VALUES
F4AO 00E6
4139
SAL
DHtl
; MULTIPLY' ROWS BY 4 SINCE 8 VERT DOTS/CHAR
F4AF 00£6
4140
SAL
DH,I
j
AND EVEN/ODD ROWS
4141
4142
;------ DETERMINE CRT MODE
4143
F4BI 803E490006
4144
eMP
TEST FOR MEDIUM RES
F4B6 1304
4145
JNC
FIND._SOURCE
4146
4147
;------ MEDIUM RES UP
*
F4BB 00£2
4148
SAL
OL.!
; a'COLUMNS
F4BA 01£7
4149
SAL
01.1
; OFFSET *2: SINCE 2 BYTES/CHAR
2. SINCE 2 BYTES/CHAR
4150
4151
;------ DETERMINE THE SOURCE ADDRESS IN THE BUFFER
F4BC
4152
R7:
F4BC 06
PUSH
F4BO IF
4153
4154
POP
OS
F4B£ 2A£O
4155
SUB
CH,ett
; ZERO TO HIGH OF COUNT REG
Don
4156
4157
SAL
BL,I
; MULTIPLY NUMBER OF LINES BY 4
F4CZ DOE3
SAL
BL,1
RlI
F4CO
; FIND_SOURCE
; GET SEGMENTS BOTH POINTING TO REGEN
ES
f4C4 742:0
4158
JZ
F4C6 8AC3
4159
MOV
AL,BL
; GET NUMBER OF LINES IN AL
F4CB 8450
4160
MOV
AH,BO
; 80 BYTES/ROW
F4CA F6£4
; If ZERO, THEN BLANK ENTIRE FIELD
DETERMINE OFFSET TO SOURCE
4161
NUL
AH
i
F4CC 8BF7
4162
MOV
51,01
; SET UP SOURCE
F4C£ 03FO
4163
ADO
SI,AX
;
F400 8AE6
4164
MOV
AH,DH
; NUMBER OF ROWS IN FIE LO
SUB
AH,BL
; DETERMINE NUMBER TO MOVE
F402 2AE3
4165
ADO IN OFFSET TO IT
4166
4167
;------ LOOP THROUGH, MOVING ONE ROW AT A TIME. BOTH EVEN AND ODD FIELDS
F404
4168
R8:
F4D4 EB8000
4169
CALL
Rll
i
F4D7 81££BOIF
4170
SUB
S!,2000H-80
; MOVE TO NEXT ROW
F40B 81£FBOIF
OI,2000H-80
; ROI,C LOOP
MOVE ONE ROW
4171
SUB
F4DF FEee
4172'
DEC
AH
; NUMBER OF ROWS TO MOVE
F4El 75Fl
4173
JNZ
R.
; CONTINUE TIll ALL MOVED
4174
4175
j------ fILL IN THE VACATED LINECS)
F4E3
4176
R9:
F4E3 8AC7
4177
F4E5
F4E5 EB8800
4178
4179
F4E8 8lEFBOIF
4180
SUB
F4EC FEeB
4181
DEC
BL
j
F4EE 75F5
4182
JNZ
RIO
; CLEAR_LOOP
F4FO E904Ft
4183
JMP
VIDEO_RETURN
j
; CLEAR_ENTRY
MOV
AL.BH
; ATTRIBUTE TO FILL WITH
RIa
; CLEAR THAT ROW
OI.2000H-80
; POINT TO NEXT LINE
RIO:
CALL
NUMBER OF LINES TO FILL
EVERYTHING DONE
4184
Rll:
; BLANK_FIELD
F4F3
4185
F4F3 SADE
4186
MDV
BL.CH
; SET BLANK COUNT TO EVERYTHING IN FIELD
F4F5 EBEC
4187
JMP
R'
; CLEAR THE fIELD
4188
GRAPHICS_UP
ENOP
4189
; -------------------- --------------------- ---
4190
; SCROLL DOWN
4191
4192
THIS ROUTINE SCROLLS DOWN THE INFORMATION ON THE CRT
ENTRY --
4193
CH,CL ::: UPPER LEFT CORNER OF REGION TO SCROll
4194
OH,DL::: LOWER RIGHT CORNER OF REGION TO SCROLL
4195
BOTH OF THE ABOVE ARE IN CHARACTER POSITIONS
4196
BH ::: FILL VALUE FOR BLANKED LINES
4197
AL ::: # LINES TO SCROLL IAL:::O MEANS BLANK THE ENTIRE FIELD)
4198
OS ::: DATA SEGMENT
4199
42:00
4201
4202
ES ::: REGEN SEGMENT
EXIT -NOTHING. THE SCREEN IS SCROLLED
; --- -----------------------------------------
4203
F4F7
42:04
F4F7 FD
42:05
STD
F4F8 8AD8
42:06
MOV
Bl.AL
SAVE LINE COUNT IN Bl
F4FA 88C2
4207
MOV
AX,OX
GET LOWER RIGHT POSITION INTO AX REG
GRAPHICS_DOWN
PRDC
NEAR
SET DIRECTION
4208
42:09
j------
4210
;------ ADDRESS
USE CHARACTER SUBROUTINE fOR POSITIONING
RETUR~~ED
IS MULTIPLIED BY 2 FROM CORRECT VALUE
4211
F4FC E81002
4212
A-57
LOC OBJ
LINE
F4FF SSFS
4213
42:14
42:15
SOURCE
MOV
i------
; SAVE RESULT AS DESTINATION ADDRESS
DI,AX
DETERMINE SIZE OF WINDOW
4216
F501 ZBD!
4217
SUB
ox.ex
F503 81C20101
F507 00£6
4~18
ADD
DX,lOlH
j
4219
4220
SAL
DH,l
; nULTIPLY • ROWS BY
SAL
DH']
;:
F50' DOE6
ADJUST VALUES
'+
SINCE 8 VERT DOTS/CHAR
AND EVEN/ODD ROIolS
4221
4222
;------ DETERI1INE CRT HODE
4223
F508 803E490006
4224
CMP
; TEST FOR HEDtUtt RES
F510 7305
4225
JtIC
;: FIND_SOURCE_DOWN
4226
F512 00E2
F514 01E7
F516 47
4227
4228
i ------ MEDIUM RES DOWN
4229
4230
*
SAL
j
SAL
;: OFFSET *2 SINCE 2 BYTES/cHAR
INC
j
•
COLUMNS
2, SINCE 2 BYTES/CHAR (OFFSET OK)
POINT TO LAST BYTE
4231
F517
F517 06
F518 IF
FS19 UfO
F518 81C7FOOO
F51F DOn
F521 DOE3
f523 742E
4232
4233
4234
4235
1------ DETERt1INE THE SOURCE ADDRESS IN THE BUFFER
R12:
j
FIND_SOURCE_DOWN
PUSH
ES
POP
OS
lt236
4237
SUB
CH,CH
i
ADD
01.240
; POINT TO UST ROW OF PIXE lS
4218
4Z39
SAL
Bltl
; MULTIPLY NUMBER OF LINES BY 4
SAL
Bld
4240
JZ
RIO
; BOTH SEGMENTS TO REGEN
o
ZERO TO HIGH OF COUNT REG
IF ZERO, THEN BLANK ENTIRE fIELD
F525 8AC3
4241
MOV
.t.l,BL
; GET NUMBER OF LINES IN Al
F527 8450
MOV
AH,80
; 80 BYTESIROW
F529 F6£4
4242
4241
MUL
All
; DETERMINE OFFSET TO SOURCE
F528 BSF7
4244
MOV
SI,DI
F52:0 28FO
F52F 8A£6
4245
SUB
SI,AX
,
4246
Mav
AH.DH
; NUMBER DF ROt.5 IN FIELD
F531 ZAn
4247
SUB
AH,Bl
;: DETERMINE NUMBER TO MOVE
j
SET UP SOURCE
SUBTRACT THE OFFSET
42lt8
4249
;------ LOOP THROUGH. MOVING ONE ROW AT A TIME. BOTH EVEN AND ODD FIELDS
F533
4250
Rll:
F533 £82100
4251
F536 81EE5020
CALL
4252
R17
; ROW_lOOP_DOIolN
I MOVE atlE ROW
i MOVE TO NEXT ROW
SUB
51.2000H"80
f53A 8lEFSOZa
4253
SUB
OI,2000H .. OO
F53£ FEee
4254
DEC
AH
; NUMBER OF ROWS TO I10YE
F540 7Sf!
4255
JNZ
R13
;: CONTINUE TILL ALL HOVED
4256
4257
j------
FILL IN THE VACATED LINE(S)
F542
4258
F542: 8AC7
4259
FSitlt
F544 E82900
4260
4261
CALL
R1S
F547 81 £f502:0
4262
SUB
DI.2000H+80
F548 FEte
4263
4264
DEC
BL
i CLEAR A ROW
j POINT TO NEXT LINE
; NUMBER OF LINES TO FIll
JHZ
R15
; CLEAR_LOOP_DOI,IN
4265
CLD
4266
JMP
VIDEO_RETURN
MOV
Bl,OH
; SET BLANK COUNT TO EVERYTHING IN FIELD
JMP
R14
; CLEAR THE FIELD
FS4D 75F5
F54F FC
F550 E974Ft
R14:
j
Mev
Al,BH
RIS:
CLEAR_ENTRCOOWH
; ATTRIBUTE TO FILL WITH
; CLEAR_LOOP_DOWN
; RESET THE DIRECTION flAG
; EVERYTHING DONE
4267
F553
F553 8ADE
F555 EBES
4268
R16:
4269
4270
4271
4212
4273
; BLAtlK]IElD_DDWN
GRAPHICS_DOWN
;~-----
ENOP
ROUTINE TO MOVE ONE ROW OF INFORMATION
4274
F557
4275
F557 BACA
4276
R17
.. DC
NEAR
MOV
CL~Dl
; NUMBER OF BYTES IN TItE ROW
F559 56
4277
PUSH
SI
F55.57
42:78
PUSH
01
; SAVE POINTERS
FSS8 F3
42.79
REP
MOYSB
; MOVE THE EVEN FIElD
POP
01
SI
F55C 1.4
FS5D SF
f55E 5£
FSSF 81C6002.0
4280
4281
POP
ADD
SI.2000H
ADD
Dt.2000H
PUSH
SI
F568 57
42.82
4263
42844285
PUSH
01
; SAVE THE POINTERS
F569 8ACA
4286
NOV
Cl,Dl
; COUNT BACK
F563 81C70020
F567 56
A-58
; POINT TO TltE ODD FIELD
LOC OBJ
LINE
FS6B F3
4287
SOURCE
Movsa
REP
MOVE THE ODD FIELD
F56C A4
4288
POP
01
F56E SE
4289
POP
S1
F56F C3
4290
RET
F560 5F
4291
RI7
;. POINTERS BACK
; RETURN TO CALLER
ENDP
4292
4293
; ------ CLEAR A SINGLE ROW
4294
F570
4295
F570 BACA
4296
MOV
Cl.OL
; NUMBER OF BYTES IN FIElD
F572 57
4297
PUSH
01
; SAVE POINTER
F573 F3
4298
REP
STose
; STORE THE NEW VALUE
F575 SF
4299
POP
01
F576 81C70020
4300
ADD
01. ZODOH
F57A 57
4301
PUSH
01
F57B BAtA
4302
HOV
Cl.Ol
FS7D F3
4303
REP
STOSS
POP
DI
RI8
NEAR
PROt
F574 AA
POINTER BACK
; POINT TO ODD FIElD
FILL THE 000 FILElD
F57E AA
F57f SF
F580 C3
4304
4305
; RETURN TO CALLER
RET
ENDP
4306
RIB
4307
4308
; GRAPHICS WRITE
4309
4310
4311
; --------------------------------- ----------THIS ROUTINE WRITES THE ASCII CHARACTER TO THE CURRENT
POSITION ON THE SCREEN.
ENTRY --
4312
AL
=
4313
BL
= COLOR
CHARACTER TO "''RITE
ATTRIBUTE TO BE USED FOR FOREGROUND COLOR
IF BIT 7 IS SET, THE CHAR IS XOR '0 INTO THE REGEN BUFFER
4314
4315
(0 IS USED FOR THE BACKGROUND COLOR)
4316
CX :: NUMBER OF CHARS TO WRITE
4317
DS::; DATA SEGMENT
4318
ES ::; REGEN SEGNENT
4319
EXIT -NOTHING IS RETURNED
4320
4321
4322
4323
GRAPHICS READ
THIS ROUTINE REAOS THE ASCII CHARACTER AT TIlE CURRENT CURSOR
4324
POSITION ON THE SCREEN BY MATCHING THE DOTS ON THE SCREEN TO THE
4325
CHARACTER GENERATOR CODE POINTS
432:6
4327
4328
4329
ENTRY -NONE
lOIS ASSUMED AS THE BACKGROUND COLOR
EXIT -AL
= CHARACTER
READ AT THAT POSITION (0 RETURNED IF NONE FOlJI'ID)
4330
4331
FOR BOTH ROUTINES. THE INAGES USED TO FORN CHARS ARE CONTAINED IN ROM
4332
FOR THE 1ST 128 CHARS.
4333
MUST INITIALIZE THE VECTOR AT INTERRUPT IfH (LOCATION 0007CH J TO
4334
POWT TO THE USER SUPPLIED TABLE OF GRAPHIC IMAGES (8Xe BOXESI.
4335
TO ACCESS CHARS IN THE SECOND HALF. THE USER
FAILURE TO DO SO WILL CAUSE IN STRAtlGE RESULTS
4336
4337
; ------------ -------------------------------ASSUME CS:CODE.DS:DATA,ES:DATA
f5Bl
FS81 8400
4338
GRAPHICS_a..iRITE
4339
MOV
AH,O
; ZERO TO HIGH OF CODE POINT
F583 50
4340
PUSH
AX
; SAVE CODE POINT VALUE
PROC
NEAR
4341
4342
;------ DETERMINE POSITION IN REGEN BUFFER TO PUT CODE POINTS
4343
F584 E86501
4344
CAU
526
; FINO lOCATION IN REGEN BUFFER
F587 88F8
4345
MOV
OI.AX
; REGEN POINTER IN 01
4346
4347
i------
DETERMINE REGION TO GET CODE paWlS FROM
4348
F589 5&
4349
POP
AX
RECOVER CODE POINT
F58A 3eBO
4350
CHP
AL.80H
IS IT IN SECOND HALF
Fsec 7306
4351
JAE
51
YES
4352
4353
;------ IMAGE IS IN FIRST HALF. CONTAINED IN ROM
4354
F58E BE6EFA
4355
HOV
SI,OFAbEH
F591 DE
4356
PUSH
OS
; SAVE SEGMENT ON STACK
f592 ESOF
4357
JHP
SHORT S2
; DETERMINE_MODE
; OFFSET CRT_CHAR_GEN-OffSET Of IMAGES
4358
A-59
LOC OBJ
LINE
4359
SOURCE
;------ IMAGE IS IN SECOND HALF. IN USER RAM
4360
F594
4361
F594 2CBO
4362
SUB
AL,80H
ZERO ORIGIN FOR SECOND HALF
F596 IE
4363
PUSH
os
SAVE DATA POINTER
F597 2BF6
4364
SUB
SI.SI
F599 BEDE
4365
MOV
05.51
4366
ASSUME
OS: ABSD
F59B C5367COO
4367
LOS
SI.EXT_PTR
F59F 8COA
4368
MOV
OX.OS
4369
ASSUME
OS:OATA
FSAI IF
4370
POP
OS
; RECOVER DATA SEGMENT
PUSH
OX
j
F5AZ 52
SI:
4371
EXTEND_CHAR
ESTABLISH VECTOR
ADD~ESSING
GET THE OFFSET OF THE TABLE
GET THE SEGMENT OF THE TABLE
SAVE TABLE SEGNENT ON STACK
4372
4373
j------ DETERNINE GRAPHICS MODE IN OPERATION
4374
FSA3
4375
FSA3 OlEO
4376
SAL
AX,l
F5AIi OlEO
4377
SAL
AX,l
FSA7 DIED
4378
SAL
AX,1
52:
D£TERMINE_MOOE
MULTIPLY CODE POINT
VALUE BY 8
4379
ADD
FSAB 803E490006
4380
CMP
F5BO IF
4381
POP
OS
RECOVER TABLE POINTER SEGMENT
JC
57
TEST FOR MEDIUM RESOLUTION MODE
F5A9 03FO
F5BI 7:?:2C
4382
SI.AX
j
51 HAS OFFSET OF DESIRED CODES
4383
FSB3
4384
;------ HIGH RESOLUTION MODE
43~5
53:
; !,UGH_CHAR
FSB3 57
4386
PUSH
[II
FSB4 56
4387
PUSH
SI
F5BS 8604
FSB7
4388
MOV
FSB7 AC
4390
F5B6 F6C380
4391
TEST
BL,~"'~
FSBB 7516
4392
JNZ
56
FSBD AA
4393
STOSB
FSBE AC
4389
;. SAVE REGEN POINTER
• SAVE CODE POINTER
; NUMBER OF TIMES THROUGH lOOP
54:
LOoSB
4394
; GET 'lYTE FROM CODE POINTS
; SHOULD WE USE TilE FUNCTION
TO PUT CHAR IN
STORE IN REGEN BUFFER
lODSB
F5SF
4395
FSBF 26888SFFlF
4396
FSC4 83C74F
4397
ADD
01,79
; MOVE TO NEXT ROW IN REGEN
F5C7 FECE
4398
DEC
DH
; DONE WITH LOOP
MOV
ES:(DI ... 2000H-IJ,AL
; STORE IN SECOND HALF
F5C9 75EC
4399
JNZ
54
F5CB 5E
4400
POP
S!
F5CC SF
4401
POP
01
FSCD 47
4402
INC
01
POINT TO NEXT CHAR POSITION
F5CE E2E3
4403
LOOP
S3
MORE CHARS TO WRITE
AL.ES:tDIJ
EXCLUSIVE OR WITH CURRENT
FSDO E9F4FB
RECOVER REGEN POINTER
4404
4405
FSD3
4406
F5D3 263205
4407
56:
XOR
FSD6 AA
4408
STOSS
FSD7 AC
4409
loose
FSD8 2632BSFFlF
4410
XOR
Al.ES:[OI-t2:000H-IJ
FSOO EBEO
4411
JMP
55
STORE THE CODE POINT
AGAIN FOR ODD FIElD
• BACK TO MAINSTREAM
4412
4413
j------
FSOF
4414
57:
F5QF 8A03
4415
HOV
Ol.Sl
SAVE HIGH COLOR BIT
FSEI OlE7
4416
SAL
01.1
OfFSET*2 SINCE 2 BYTES/CHAR
FSE3 E80100
4"+17
CALL
SI9
F5E6
4418
PUSH
01
HEOIUM RESOLUTION WRITE
; MED_RES_WRITE
EXPAND BL TO FUll WORD Of COLOR
MED_CHAR
S8:
SAVE REGEN POINTER
F5E6 57
"+419
F5E7 56
4420
PUSH
Sl
F5EB B604
442:1
MOV
DH.4
NUMBER OF lOOPS
521
DOUBLE UP All THE BITS
FSEA
; SAVE THE CODE POINTER
4422
GET CODE POINT
FSEA AC
442:3
LODSS
F5EB E80EOO
4424
CAll
F5EE 23C3
4425
AND
Ax.ex
F5FO F6C2:80
4426
TEST
Dl.80H
• IS THIS XOR FUNCTION
F5F3 7407
4427
JZ
510
; NO, STORE IT IN AS IT IS
FSfS 263Z25
4428
XOR
AH,ES:[Qll
;, DO FUNCTION WITH HALF
F5F8 26324501
4429
XOR
AL,ES: [01+1 ]
;
F5FC
4430
f5FC 268825
4431
HOV
ES:[OI1,AH
j
MOV
ES:!OI+IJ.Al
AND WITH OTHER HALF
510:
F5FF 26884501
4"+32
F603 AC
4433
loose
F604 E8C500
4434
CAll
A-60
CONVERT THEM TO FOREGROUND COLOR ( 0 BACK J
STORE FIRST BYTE
;, STORE SECOND BYTE
; GET CODE POINT
S21
LOC OBJ
llNE
SOURCE
f607 23C3
4435
AND
AX,ex
; CONVERT TO COLOR
F609 F6C280
4436
TEST
Ol,BaH
; AGAIN, IS THIS XOR FUNCTION
F60C 740A
4437
JZ
Sl1
; NO. JUST STORE THE VALUES
F60E 2632A500Z0
4438
XOR
AH, ES: lDI+2000H ]
F613 26328501Z0
4439
XQR
A.L.E5:[OI+2001H]
F618
4440
F618 2688A50020
4441
MOV
ES: [DI+2000H I,AH
F61D 2688850120
4442
MOV
E5: [DI+2000H+l J .AL
F6ZZ 83C750
4443
ADO
01,80
F625 FEeE
4444
DEC
DH
F627 75tl
4445
JNZ
59
; KEEP GOING
F629 5E
4446
POP
SI
; RECOVER CODE PONTER
F62A SF
4447
POP
01
; RECOVER REGEN POINTER
F62B 83C702
4448
ADD
DI.;?:
; POINT TO NEXT CHAR POSITIOH
F62E EZ.B6
4449
lOOP
58
; HORE TO WRITE
F630 E994FB
4450
JHP
VIDEO_RETlnm
4451
4452
FUNCTION WITH FIRST HALF
; AND WITH SECOND HALF
511:
; STORE IN SECOND PORTION OF BUFFER
; POINT TO NEXT LOCATION
GRAPHICS_WRITE WOP
; ------ -------- -- - ---------------- _____ _
4453
; GRAPHICS READ
F633
4454
4455
; -- ---- ----- ---- ------------------------GRAPHICS_READ
PROt
NEAR
F633 E80600
4456
CALL
526
F636 8BFO
4457
MOV
51.AX
j
F638 83Ee08
4458
SUB
SP.8
; ALLOCATE SPACE TO SAVE THE READ CODE POINT
F63B 8BEt
4459
MOV
BP.SP
; CONVERTED TO OFfSET IN REGEN
SAVE IN 51
POINTER TO SAVE AREA
4460
4461
; ------ DETERMINE GRAPHICS MODES
4462
f630 803E490006
4463
CNP
CRT_MOOE.6
F642 06
4464
PUSH
ES
f643 If
4465
POP
OS
; POINT TO REGEN SEGHENT
F644 721A
4466
JC
513
j
MEDIUM RESOLUTION
4467
4468
;------ HIGH RESOLUTION READ
4469
4470
F646 6604
4471
;------ GET VALUES fROM REGEN BUffER AND CONVERT TO CODE POINT
MOV
DH,4
; NUMBER OF PASSES
F648
4472
F648 8A04
4473
HOV
AL'[SIJ
; GET FIRST BYTE
F64A 884600
4474
MOV
[BPhAl
; SAVE IN STORAGE AREA
F640 45
4475
INC
BP
F64E 8A840020
4476
MOV
Al.[SI+2000Hl
; GET LOWER REGION BYTE
F652 684600
4477
HOV
[BP I .AL
j
SIZ:
j
NEXT LOCATION
ADJUST AND STORE
f655 45
4478
F656 83t650
4479
AOD
51.80
F659 FECE
4480
DEC
DH
LOOP CONTROL
F65B 75E6
4481
JNZ
S12
DO IT SOME MORE
F65D E61790
4482
JMP
515
GO MATCH THE SAVED CODE POINTS
INC
BP
; POINTER INTO REGEN
4483
4484
; ------ MEDIUM RESOLUTION READ
S13:
f660
4485
F660 o1E6
4486
SAL
51,1
OFFSETJf2 SWCE .2 BYTES/CHAR
F662 B604
4487
MOV
DH,4
MED_RES_READ
NUMBER OF PASSES
F664
4488
514:
F664 E88800
44B9
CALL
523
; GET PAIR BYTES FROM REGEN INTO SINGLE SAVE
f667 81C60020
4490
ADD
51. ZOOOH
; GO TO LOWER REGION
F668 E88100
4491
CALL
523
; GET THIS PAIR INTO 5AVE
SI,2aDOH-BO
F66E 8lEEBOIF
449Z
SUB
F672 FECE
4493
DEC
QH
F674 75EE
4494
JNZ
514
; ADJUST POINTER BACK INTO UPPER
; KEEP GOING UNTI l ALL 8 DONE
4495
4496
;-------- SAVE AREA HA.S CHARACTER IN IT. MATCH IT
F676
4497
SIS:
F676 BF6EFA
4498
MOV
; FIND_CHAR
o1.OfA6EH
F679 DE
4499
PUSH
F67A 07
4500
POP
ES
F67B 83EDD8
4501
SUB
BP.8
F67E 8BFS
4502
MOV
SI.BP
; OFfSET CRT_CHAR_GEN-ESTA6lISH ADDRESSING
CS
CLD
; CODE POINTS IN C5
; ADJUST POINTER TO BEGINNING OF SAVE AREA
; ENSURE DIRECTION
F680 FC
4503
F681 BOOO
4504
F683
4505
F683 16
4506
F684 IF
4507
POP
OS
F685 BA8000
4508
HOV
OX,12S
; NUMBER TO TEST AGAINST
F688
4509
F688 56
4510
PUSti
51
; SAVE SAVE AREA. POINTER
MOV
A.l.O
CURRENT CODE POINT BEING HA.TCHED
S16:
PUSH
5S
ESTABLISH ADDRESSING TO STACK
fOR THE STRING COMPARE
517:
A-61
laC OBJ
LINE
SOURCE
F689 57
4511
PUSH
01
; SAVE CODE POINTER
F68A B90800
4512
MOV
CX.8
; NUMBER OF BYTES TO MATCH
F68D f3
4513
REPE
CMPSB
; COMPARE THE 8 BYTES
F68F SF
4514
POP
01
; RECOVER THE POINTERS
F690 5E
4515
POP
51
F691 7'tIE
F6BE A6
4516
Jl
f693 FEeD
4517
INC
AL
; NO MATCH. HOVE ON TO NEXT
F695 83e708
4518
ADD
I NEXT CODE POINT
F698 4A
4519
DEC
01.8
OX
; LOOP CONTROL
F699 75EO
4520
JNl
517
; 00 All OF THEM
518
I
IF ZERO FLAG SET. THEN MATCH OCCURRED
4521
4522
j------ CHAR NOT MATCHED. MIGHT BE IN USER SUPPLIED SECOND HALF
4523
f69B 3eoo
4524
eM?
AL.O
F690 7412
4525
JE
518
F69F 28eo
4526
SUB
AX.AX
F6Al 8E08
4527
MOV
OS,AX
4528
ASSUME
DS:ABSO
4529
LES
OI,EXT_PTR
F6A3 C43E7COO
; AlO 0 IF ONLY 1ST HALF SCANNED
IF
= 0,
THEN ALL HAS BEEN SCANNED
ESTABLISH ADDRESSING TO VECTOR
; GET POINTER
Beeo
4530
MOV
F6A9 OBC7
4531
OR
AX,DI
; IF ALL O. THEN DOESN I T EXIST
F6AB 740ct
4532
JZ
518
; NO SENSE LOOKING
F6AD 8080
4533
MOV
AL,l2S
; ORIGIN FOR SECOND HALF
F6AF EB02:
4534
JMP
516
; GO BACK AND TRY FOR IT
4535
ASSUME
OS:OATA
F6A7
AX.ES
; SEE IF THE POINTER REALLY EXISTS
4536
4537
;---.-- CHARACTER IS FOUND ( Al=O I f NOT FOUND )
F6Bl
4538
518:
F661 83C408
4539
ADD
; READJUST THt STACK.
F684 E910FB
4540
JM?
; ALL
4541
GRAPHICS_READ
4542
; --------- ~----- -- --- ---------------.--------
4543
THR~
ENDP
EXPAND_MED_COLOR
THIS ROUTINE EXPANDS THE LOW 2 BITS IN BL TO
4544
4545
FIll THE ENTIRE BX REGISTER
4546
ENTRY -BL = COLOR TO BE USEQ ( LOW 2 BITS )
4547
4548
EXIT --
ex = COLOR TO BE USED ( 8 REPLICATIONS OF THE 2: COLOR BITS I
4549
4550
;--------------------------------------------
F6B7
4551
519
PROC
NEAR
F6B7 BOE303
4552
AND
BL.3
; ISOLATE THE COLOR BITS
f6BA BAC3
4553
MOV
Al.BL
, COpy TO Al
F6se 51
4554
PUSH
ex
MOV
eX.:3AL.!
F6BD B90300
4555
AWAY SAVE
~ONE
F6eo
4556
F6CO ODED
4557
SAL
F6C2 ODED
4558
SAL
AL,l
SAVE REGISTER
; NUMBER OF TIMES TO 00 THIS
S20:
lEFT SHIFT BY 2
F6C4 OADB
4559
OR
Bl.Al
ANOTHER COLOR VERSION INTO Bl
F6C6 E2FB
4560
LOOP
520
FILL ALL OF BL
F6tB BAfB
4561
MOV
BH.Bl
F6CA 59
4562
PO?
ex
F6CB C3
; ALL DONE
RET
4563
FILL UPPER PORTION
; REGISTER BACK
EtlOP
4564
519
4565
; -- -- - - -------------- -------------- - ---------
4566
EXPAND_BYTE
ROUTIt~E
4567
THIS
4568
OF THE BITS, TURNING THE 8 BITS INTO 16 BITS.
4569
TAKES THE BYTE IN AL AND DOU6LES ALL
THE RESULT IS LEFT IN AX
----- --- --- --------- --------------_._-------
4570
;
F6tt
4571
521
F6CC 52:
4572
PROC
UEAR
PUSH
OX
; SAVE REGISTERS
F6CD 51
4573
PUSH
ex
F6CE 53
4574
PUSH
BX
F6CF BAOOOO
4575
MOV
DX.O
j
F602 890100
4576
MOV
CX.l
• MASK REGISTER
RESULT REGISTER
F6D5
4577
F605 8808
4578
457'9
MOV
BX.AX
; BASE INTO TEMP
F6D7 2309
AND
eX,ex
; USE MASK TO EXTRACT A BIT
F609 0803
4580
DR
DX,BX
F608 DIED
4581
5HL
AX.l
F600 01El
4582
5HL
CX,!
; SHIfT BASE AND MASK BY 1
F6DF 880B
4583
MOV
BX.AX
; BASE TO TEMP
FoE! 2309
4584
AND
ax,cx
F6B OB03
4585
OR
OX,BX
A-62
522:
; PUT INTO RESULT REGISTER
EXTRACT THE SAME BIT
; PUT INTO RESULT
lOC OBJ
LINE
SOURCE
F6E5 olEl
4586
SHl
ex. 1
F6E7 73fC
4587
JNC
522
f6E9 aBez
4588
HOV
AX.OX
f6EB 58
4589
POP
BX
F6EC 59
4590
POP
CX
F6EO SA
4591
POP
ox
F6£E C3
4592
RET
4593
S21
; RECOVER REGISTERS
; ALL DONE
EtlDP
4594
I ------ --- -----------------------------------
4595
; I1ED_READ_BYTE
4596
THIS ROUTINE WIll TAKE 2: BYTES FROM THE REGEN BUFFER.
4597
COMPARE AGAINST THE CURRENT FOREGROUND COLOR. AND PLACE
4598
THE CORRESpmmlNG ON/OFF BIT PATTERN INTO THE CURRENT
4599
4600
POSITION IN THE SAVE AREA
ENTRY --
4601
S1,OS
4602
ex =
BP =
4603
4604
4605
F6EF
SHIFT ONLY MASK NOW. MOVING TO NEXT BASE
USE MASK BIT COMING OUT TO TERMINATE
I RESULT TO PARM REGISTER
= POINTER
TO REGEN AREA OF INTEREST
EXPANDED FOREGROUND COLOR
POINTER TO SAVE AREA
EXIT -BP IS INCPEMENT AFTER SAVE
4606
; ------------- ---------- ----------- ----------
4607
S21
PROC
NEAR
F6EF 8A24
4608
HOV
AH.[SIJ
i
F6Fl BA44Dl
4609
HOV
AL.[Shll
; GET SECOND BYTE
F6F4 8900CO
4610
HOV
CX.OCOOOH
; 2 BIT MASK TO TEST THE ENTRIES
GET FIRST BYTE
F6f7 6200
4611
HOV
DL.O
; RESULT REGISTER
F6F9
F6F9 85CI
4612
4613
TEST
AX,CX
; IS THIS SECTION BACKGROUND?
F6FB Fa
F6FC 7401
F6FE F9
4614
elC
F6FF 0002
4617
S24:
4615
JZ
4616
STC
525:
Rel
; CLEAR CARRY IN HOPES THAT IT IS
; IF ZERO, IT IS BACKGROUND
525
; WASH' T, SO SET CARRY
OLd
; MOVE THAT BIT INTO THE RESULT
F70! 01E9
4618
SHR
F703 01E9
4619
SHR
CX.l
; MOVE THE MASK TO THE RIGHT BY 2 BITS
F705 73F2
4620
JNC
52.
; DO IT AGAIN IF MASK DIDN'T FALL OUT
CXol
HOV
(BP),OL
; STORE RESULT IU SAVE AREA
f70A 45
4622
mc
BP
; ADJUST POINTER
nOB C3
4623
RET
F707 885600
4621
; ALL DONE
Etmp
4624
523
4625
4626
; -- -------- - ---- ---------------------- ----
4627
V4_POSITIOH
THIS ROUTINE TAKES THE CURSOR POSITION CONTAINED IN
4628
THE MEMORY LOCATION. AND CONVERTS IT INTO AN OFFSET
4629
INTO THE REGEN BUFFER. ASSUMING ONE BYTE/CHAR.
4630
FOR MEDIUM RESOLUTION GRAPHICS. THE NUMBER MUST
4631
BE DOUBLED.
4632
ENTRY -- NO REGISTERS,MEMORY LOCATION CURSOR POSH IS USED
4633
EXIT--
4634
AX CONTAINS OFFSET INTO REGEN BUFFER
4635
j--------------------------------- --------
F10e
4636
FlOC A15000
4637
F70F
4638
F70F 53
4639
S26
PROC
HOV
GRAPH_POSN
NEAR
AX,CURSOR_POSN
LABEL
; GET CURRENT CURSOR
NEAR
PUSH
BX
; SAVE REGISTER
F710 8808
4640
HOV
BX.AX
; SAVE A COPY OF CURRENT CURSOR
F712 8AC4
4641
MOV
AL.AH
; GET ROWS TO AL
F714 F6264AOO
4642
HUl
BYTE PTR CRT_COLS
truL TIPL Y BY BYTES/COLUMN
F7l8 DIED
4643
SHl
AX.l
NUL TIPl Y
F7lA DIED
F71C 2AFF
4644
SHl
AX.l
4645
SUB
BH.BH
ISOLATE COLUMN VALUE
*
4 SINCE 4 ROWSIB'l'TE
f71E 03C3
4646
AOD
AX,BX
DETERMINE OFfSET
fno 58
4647
POP
BX
RECOVER POINTER
F7Z1 C3
4648
RET
ALL OONE
4649
S26
ENDP
4650
; ---- ----------------------------------------
4651
WRITE_TTY
4652
THIS INTERFACE PROVIDES A TELETYPE LIKE INTERFACE TO THE
THE INPUT CHARACTER IS WRITTEN TO THE CURRENT
4653
VIDEO CARD.
4654
CURSOR POSITION, AND THE CURSOR IS MOVED TO THE NEXT POSITION.
4655
IF THE CURSOR LEAVES THE LAST COLUMN OF THE FIELD. THE COLUMN
4656
IS SET TO ZERO, AND THE ROW VALUE IS INCREMENTED.
4657
ROW VALUE LEAVES THE FIELD, THE CURSOR IS PLACED ON THE LAST ROW.
4656
IF THE ROW
FIRST COLUMN. AND THE ENTIRE SCREEN IS SCROLLED UP ONE LWE.
4659
WHEN THE SCREEN IS SCROLLED UP. THE ATTRIBUTE FOR fILLING THE
4660
NEWLY BLANKED LINE IS READ FROM THE CURSOR POSITION ON THE PREVIOUS
4661
LINE BEFORE THE SCROLL, IN CHARACTER MODE.
IN GRAPHICS HaDE,
A-63
LOC OSJ
LINE
sou RCE
THE 0 COLOR IS USED.
4662
4663
ENTRY --
4664
I AH )
4665
(AL)
=
=
4667
AS COMMANDS RATHER THAN AS DISPLAYABLE GRAPHICS
EXIT --
4670
4671
CHARACTER TO BE WRITTEN
(Bll "" FOREGROUND COLOR FOR CHAR WRITE I f CURRENTLY IN A GRAPHICS MODE
4668
4669
CURRENT CRT MODE
NOTE THAT BACK SPACE. CAR RET. BELL AND LINE FEED ARE HANDLED
4666
ALL REGISTERS SAVED
; ---- -----
4672
------ - ------------------- -- -- -----
ASSUME
CS:COOE,OS:DATA
F722
4673
F722: 50
4674
PUSH
AX
F723 50
4675
PUSH
AX
F72:4 6403
F726 COlO
MOV
AH,3
4677
INT
lOH
; READ THE CURRENT CURSOR POSITION
F72:6 56
4678
POP
AX
; RECOVER CHAR
WRITE_TTY
4676
PROC
NEAR
SAVE REGISTERS
; SAVE CHAR TO WRITE
4679
4680
;------ OX NOW HAS THE CURRENT CURSOR POSITION
4681
; IS IT A BACKSPACE
Fn9 3e06
4682
CNP
AL.a
F72B 7459
4683
JE
U8
; BACK_SPACE
F72D 3eOD
4684
CNP
AL.OOH
; IS IT CARRIAGE RETURN
F72F 745E
4685
JE
U9
; CAR_RET
F731 3COA
4686
CNP
AL,OAH
F733 745E
4687
JE
UI0
F735 3C07
4686
Cf1P
AL.07H
IS IT A BELL
F737 7461
4689
JE
Ull
BELL
IS IT A LINE FEED
LINEJEEO
4690
4691
;------ WRITE THE CHAR TO THE SCREEN
4692
BH
.ACTIVE~PAGE
F739 8A3E6Z00
4693
MOV
F73D 840A
4694
4695
MOV
AH • lO
; I-lR HE CHAR ONLY
F73F B90100
Mav
eX.l
;: ONLY ONE CHAR
; GET THE CURRENT ACTIVE PAGE
f742 COlO
4696
INT
lOH
;: WRITE THE CHAR
4697
4698
; ------ POSITION THe: CURSOR FOR NEXT CHAR
4699
F744 FEel
4700
INC
F746 3.6oI64AOO
4701
CMP
OL.BYTE PTJ(
F74A 7536
4702
JNZ
U7
; SET_CURSOR
F74C B200
4703
NOV
OL.O
; COLUMN FOR CURSOR
F74E BOFEIS
F751 7520
4704
CMP
DH.24
4705
JNZ
U6
DL
CRT~COLS
; TEST FOR COLUMN OVERFLOW
4706
F753
4707
;------ SCROLL REQUIRED
4708
U1:
4709
F753 8402
4710
MOV
AH.2
F755 8700
4711
MOV
BH,O
4712
INT
10"
F157 COlO
; SET THE CURSOR
4713
4714
; ------ DETERMINE VALUE TO FILL WITH DURING SCROLL
4715
F759 ,6,04900
4716
NOV
AL,CRT_MODE
F75C 3(04
4717
CMP
AL.4
JC
U2
; GET THE CURRENT MODE
;. READ-CURSOR
F75E 7206
4718
F7bD 3C07
4719
CMP
AL,7
F762 B700
4720
MOV
BH,O
; FI LL WITH BACKGROUND
F764 7506
4721
JHE
U3
; SCROLL-UP
NOV
AH,8
4722
F766
4723
F766 8408
4724
U2:
READ-CURSOR
F76G COlO
4725
INT
10H
F76A SAFe
4726
NOV
BH.AH
READ CHAR/ATTR AT CURRENT CURSOR
; STORE IN BH
4727
; SCROLL-UP
F76C
4728
F76C e80106
4729
NOV
AX,60lH
; SCROLL ONE LINE
F76F 890000
4730
NOV
CX,O
; UPPER LEFT CORNER
F772 8618
4731
NOV
DH ,24
; LOWER RIGHT ROW
U3:
F774 6A164.6oOO
4732
NOV
DL,BYTE PTR CRT_COLS
F778 fECA
4733
OEC
OL
f77A
4734
F77A COlO
4735
F77C
4736
F77C 58
4737
A-64
;
U4:
INT
10H
POP
AX
us:
; LOWER RIGHT COLUI1N
VIOEO~CALL-RETURH
; SCROlL UP THE SCREEN
;
TTY~RETURN
; RESTORE THE CHARACTER
LOC OBJ
LINE
SOURCE
Fno E947FA
Fl8D
F7SD FEC6
F782
Fl6Z 8402
F784 EBF4
us:
F7a6
F7a6 BOFAOO
eMP
Dl,O
F7B9 74F7
JE
U7
F7BB FECA
F7S0 EBn
4752
DEC
Ol
JMP
U7
ALREADY AT END OF LINE
NO -- JUST NOVE IT BACK
{t753
4754
4755
F7BF
4756
;~-----
CARRIAGE RETURN fOUND
U9:
F78F B200
4757
MOV
Dl.O
F791 EBEF
4758
JHP
U7
; MOVE TO FIRST COLUMN
SET_CURSOR
4759
4760
j------
LINE fEED FOUND
4761
U10:
F793
4762
F793 80FElS
4763
eMP
DH.2.4
F796 75E8
4764
JNE
U6
F798 EBB9
4765
JMP
Ul
; BOTTOM OF SCR E EN
YES. SCROLL THE SCREEN
j
NO. JUST SET THE CURSOR
4766
4767
j------
BELL FOUND
4768
U11:
F79A
4769
F79A 8302
4770
MOV
SL.G
SET UP COUNT FOR BEEP
F79C E8C7EE
4771
CALL
BEEP
SOUND THE POD BE LL
F79F EBDB
4772
JMP
US
TTY]ETURN
4773
4774
ENDP
; -- - ----- ------------------------ -- --- ------
4775
LIGHT PEN
4776
THIS ROUTINE TESTS THE LIGHT PEN SWITCH ANn THE LIGHT
IF BOTH ARE SET, THE LOCATION OF THE LIGHT
4777
PEN TRIGGER.
4778
PEN IS DETERMINED.
4760
ON EXIT:
(AH I
4781
=0
4782
IF NO LIGHT PEN INFORMATION IS AVAILABLE
BX,ex,Ox ARE DESTROYED
(AH)
4763
4784
1 IF LIGHT PEN IS AVAILABLE
{DH,OU :; ROw,COLUMN OF CURRENT LIGHT PEN POSITION
4785
{CH , :; RASTER POSITION
4786
4787
OTHERWISE, A RETURN WITH NO INFORMATION
IS MADE.
4779
(ex)
= BEST
GUESS AT PIXEL HORIZIDfTAL POSITION
; -- -- ---- --------- ---- -- ---- -- - -------- -- -- --
4786
ASSUME
4789
j------
FlA.I
4790
Vl
FlAI 0303050503030304
4791
F7A9
4792
es:eOOE,OS:DATA
SUBTRACT_TABLE
LABEl
DB
READ_lPEN
BYTE
3.3,5.5,3,3,3,4
PROC
NEAR
4793
4794
j------
WAIT FOR LIGHT PEN TO BE DEPRESSED
4795
AH,O
F7A9 8400
47?6
MOV
F7AB 86166300
4797
MOV
OX, ADDR_6645
F7AF 83C206
4798
ADO
DX.6
POINT TO STATUS REGISTER
F7B2 EC
4799
IN
AL,OX
GET STATUS REGISTER
F7B3 40804
4800
TEST
AL.4
TEST LIGHT
F7BS 7578
4801
JNZ
V6
NOT SET, RETURN
; SET NO LIGHT PEN RETURN CODE
GET BASE ADDRESS OF 6845
PEt~
SWITCH
4802
4803
j------
NOW TEST FOR LIGHT PEN TRIGGER
4804
F7B7 A802
4805
TEST
AL,2
TEST LIGHT PEN TRIGGER
F7B9 747E
4806
Jl
V7
RETURN WITHOUT RESETTING TRIGGER
4807
4808
;------ TRIGGER HAS BEEN SET. READ THE VALUE IN
4809
F7BB 8410
4810
NOV
AH,16
; LIGHT PEN REGISTERS ON 6845
4811
4812
F7SD 8Bl6630rJ
j------ INPUT REGS POIUTED TO BY AH, AND CONVERT TO ROW eOLUMN IN ox
rlov
; JlOORESS REGTSTEP FOR 6845
A-65
LOC OBJ
LINE
SOU RCE
nCI 8AC4
4815
HOV
AL.AH
I REGISTER TO READ
F7C3 EE
4816
OUT
OX.AL
; SET IT UP
F7C4 42
4817
OX
; DATA REGISTER
INC
F7C5 EC
4818
IN
AL.DX
; GET THE VALUE
f7c6 8AE8
4619
MOV
CH.AL
; SAVE IN CX
; ADDRESS REGISTER
F7Ca 4A
4820
DEC
OX
F7C9 FEC4
4821
INC
AH
F7Ca 8AC4
4822
MOV
AL,AH
F7CD EE
4823
OUT
DX.AL
; SECOND DATA REGISTER
F7CE 42
4824
INC
OX
; POINT TO DATA REGISTER
F7CF EC
4825
IN
AL,DX
; GET SECOND DATA VALUE
F700 8AE5
4826
MOV
AH,CH
; AX HAS INPUT VALUE
4827
4828
; ------ AX HAS THE VALUE READ IN FROM THE 6845
4829
f7D2 6AIE4900
4830
MOV
BL,CRT_MODE
F706 2AFF
4831
SUB
BH.BH
F708 ZE8A9FAIF7
4832
MOV
6L,CS:V1l6Xl
; DETERMINE AMOlMT TO SUBTRACT
F70D 26C3
4833
SUB
AX,ex
; TAKE IT AWAY
; CONVERT TO CORRECT PAGE ORIGIN
f7DF 2B064EOO
4834
SUB
Ax.eRT_START
F7E3 7903
4835
JNS
V2
PES B80000
4636
MOV
AX,O
; MODE VALUE TO BX
IF POSITIVE. DETERMINE MODE
; <0 PLAYS AS 0
4837
4838
;------ DETERMINE HaDE OF OPERATION
4839
V2:
DETERMINE HODE
F7Ea
4840
F7EB 8103
4841
MOV
F7EA 603E490004
4842
CMP
F7EF 722.11..
4843
J8
4844
CMP
F7Fl 803E490007
F7F6 7423
4845
JE
CL,3
SET *8 SHIfT COlMT
DETERMINE IF GRAPHICS OR ALPHA
; ALPHA_PEN
V4
4846
4847
;------ GRAPHICS MODE
4848
F7F8 BU8
4849
MOV
DL,40
I OIVISOR FOR GRAPHICS
F7FA F6F2
4850
DIV
DL
; DETERMINE ROW(AU AND COLUMN(AH)
4851
4852
;
.6.l RANGE 0-99, AH RANGE 0-39
;------ DETERMINE GRAPHIC ROW POSITION
4853
4854
F7FE 02EO
4855
ADD
CH,CH
Faoo BADe
4856
HOV
BL.AH
COLUMN VALUE TO BX
Fe02 2AFF
4857
SUB
BH,8H
MULTIPLY BY 8 FOR MEDILn1 RES
F804 803E490006
4858
eMP
CRT_MODE.6
DETERMINE MEDIUM OR HIGH RES
F809 7504
4859
JNE
V3
NOT_HIGH_RES
FaDe 8104
4860
MOV
CL,4
SHIFT VALUE FOR HIGH RES
FaDO 00E4
4861
SAL
AH,l
COLUMN VALUE TIMES 2 FOR HIGH RES
SHL
6X,CL
MULTIPLY *16 FOR HIGH RES
F80F
4862
FaOF D3E3
4863
MOV
SAVE ROW VALUE IN CH
F7FC 8AE8
CH.AL
*2 FOR EVEN/ODD FIElD
V3:
~mT_HIGH_RES
4864
4865
; ------ DETERHINE ALPHA CHAR POSITION
4866
F811 8.11..04
4867
MOV
OL,AH
F813 BAFO
4868
MOV
DH.AL
ROW VALUE
F81S oOEE
4869
SHR
OH,l
DIVIDE BY 4
F817 DOEE
4870
SHR
DH.l
F819 Eall
4871
JHP
SHORT V5
; COLUHN VALUE FOR RETURN
FOR VALUE IN 0-24 RANGE
LIGHT_PEN_RETURN_SET
4872
4873
j------ ALPHA MODE ON LIGHT PEN
4874
F8lS
4875
V4:
; ALPHA_PEN
F81e F6364AOO
4876
DIV
BYTE PTR CRT_COLS
F81F 8AFO
4877
MOV
OH,AL
F8Z1 8A04
4878
MOV
F8Z3 02EO
4879
SAL
AL,CL
; NUL TIPl Y ROWS
f8Z5 BAE8
4880
MOV
CH,AL
; GET RASTER VAlUE TO RETURN REG
F827 8ADC
4881
MOV
Bl,AH
; COLUMN VALUE
XOR
BH,BH
SAL
BX,CL
DL,AH
; DETERMINE ROW,COLUMN VALUE
; ROWS TO OH
; COLS TO OL
*
8
F829 32FF
4882
F8ZB D3E3
4883
F82D
4884
TO BX
F8Z0 6401
4885
F8ZF
4886
F82F 52
4887
PUSH
OX
SAVE RETURN VALUE (IN CASE J
Fa30 86166300
4888
MOV
DX,ADOR_6645
GET BASE ADDRESS
LIGHT_PEN_RETURN_SET
V5:
INDICATE EVERTHING SET
V6:
LlGHT_PEN_RETURN
F834 83C207
4889
ADD
ox,]
POINT TO RESET PARM
F8n fE
4890
OUT
DX,Al
ADDRESS. NOT DATA, IS IMPORTANT
A-66
LOC OBJ
LINE
SOURCE
POP
DX
4893
POP
Dl
F836 5A
4891
F839
4892
F639 SF
; RETURN_NO_RESET
4894
POP
Sl
F838 IF
4895
POP
DS
F63C IF
4696
POP
DS
F83A SE
F83D IF
4897
POP
DS
F83E IF
4898
4899
POP
DS
F63F 07
POP
ES
F840 CF
4900
IRET
4901
; RECOVER VALUE
V7:
READ_LPni
DISCARD SAVED BX.CX,DX
ENOP
4902
; --- INT 12 ---------------------------------
4903
; MEMORY_SIZE_DETERMINE
4904
THIS ROUTINE DETERf1INES THE AMOUNT OF MEMORY IN THE SYSTEM
4905
AS REPRESENTED BY THE SWITCHES ON THE PLANAR.
4906
THE SYSTEM MAY NOT BE ABLE TO USE I/O HEMORY UNLESS THERE
4907
IS A FUll COMPLEMENT OF 64K BYTES ON THE PLANAR.
4908
INPUT
4909
NO REGISTERS
4910
THE MEMORY_SIZE VARIABLE IS SET DURING POWER ON DIAGNOSTICS
4911
ACCORDING TO THE FOLLOWING HARDWARE ASSUMPTIONS:
4912
PORT 60 BITS 3,2 ;:: 00 -
16K BASE RAN
4913
01 -
32K BASE RAM
4914
10 - 48K BASE RAM
4915
11 - 64K BASE RAM
4916
PORT 62 BITS 3-0 INDICATE AMOUNT OF I/O RAM IN 32K INCREMENTS
4917
E.G •• 0000 - NO RAM IN I/O CHANNEL
0010 - 64K RAM IN I/O CHANNEL, ETC.
491B
4919
; OUTPUT
4920
4921
{AX)
= NUMBER
OF CONTIGUOUS lK BLOCKS OF MEMORY
; -------- ----------------------- --- ----------
492:2:
ASSUME
F641
492:3
MEMORY_SIZE_DETERMINE
F841 FB
4924
STI
F642 IE
4925
PUSH
F843 884000
4926
MOV
AX.DATA
F846 8E08
4927
MOV
OS.AX
F848 1411300
4928
MOV
AX,MEMORY_SIZE
F848 IF
492:9
POP
DS
F84C CF
NOTE THAT
CS:COOE.DS:OATA
PROC
; INTERRUPTS BACK ON
DS
; SAVE SEGMENT
ESTABLISH ADDRESSING
GET VALUE
RECOVER SEGMENT
!RET
4930
FAR
i
RETURN TO CALLER
4931
MEMORY_SIZCDETERMINE.
4932:
;--- !NT 11 ---------------------------------
4933
ENDP
EQUIPMENT OETERMINATlON
4934
THIS ROUTINE ATTEMPTS TO DETERMINE WHAT OPTIONAL
4935
DEVICES ARE ATTACHED TO THE SYSTEM.
4936
INPUT
NO REGISTERS
4937
THE EqUIPJLAG VARIABLE IS SET DURING THE POWER ON DIAGNOSTICS
4938
4939
USING THE FOLLOWING HARDWARE ASSUMPTIONS:
4940
PORT 60
4941
PORT 3FA
4942:
BYTE OF EQUPMENT
10 REGISTER OF 82:50
BITS 7-3 ARE ALWAYS 0
4943
=
PORT 378
4944
4945
= LOW ORDER
= INTERRUPT
OUTPUT PORT OF PRINTER -- 82:55 PORT THAT
CAN BE READ AS WELL AS WRITTEN
j
OUTPUT
4946
(AX) IS SET. BIT SIGNIFICANT, TO INDICATE ATTACHED 1/0
4947
BIT 15.14
4948
BIT 13 NOT USED
= NUH9ER
= GAME
OF PRINTERS ATTACHED
4949
BIT 12
4950
BIT 11.10.9 :;; NUMBER OF R5232 CAROS ATTACHED
4951
BIT 8 UNUSED
4952
BIT 7.6 = NUMBER OF OISKETTE DRIVES
4953
4954
I/O ATTACHED
00=1. 01=2. 10=3, 11=4 ONl.Y IF BIT 0 = 1
BIT 5.4 = INITIAL VIDEO MODE
4955
00 - UNUSED
4956
01 -
4957
10 - 80X25 BW USING COLOR CARO
4958
11 - aOX25 BW USING BW CARD
4959
BIT 3.2: = PLANAR RAM SIZE (OO=16K.Ol=32K,10=48K,Il=64K)
4960
BIT 1 NOT USED
4961
BIT 0
4962
40X25 BW USING COLOR CARD
= IPL
FROM DISKETTE -- THIS BIT INDICATES THAT THERE ARE DISKETTE
DRIVES ON THE SYSTEM
4963
4964
4965
4966
NO OTHER REGISTERS AffECTED
; ----------------- --------------------------ASSUMF CS:CODE,OS:DATA
A-67
LOC OBJ
LINE
SOURCE
PROC
F840
4967
F840 FB
4968
STI
F84E IE
4969
EQUIPMENT
PUSH
OS
FAR
; SAVE SEGMENT REGISTER
F84F 684000
4970
MOV
AX.DATA
; ESTABLISH ADDRESSING
F852 BED8
4971
MOV
oS.AX
F854 All000
4972
MOV
AX,EQUIPJLAG
; GET THE CURRENT SETTINGS
F857 iF
4973
POP
OS
; RECOVER SEGMENT
F8S8 CF
4974
; INTERRUPTS BACK ON
IRET
; RETURN TO CALLER
4975
EQUIPMENT
ENDP
4976
;--- INT 15 ---------------------------------
4977
j CASSETTE I/O
=0
4976
I AH I
4979
IAHJ = 1
TURN CASSETTE MOTOR OFF
4980
(AHI = 2
READ 1 OR MORE 256 BYTE BLOCKS FROM CASSETTE
TURN CASSETTE MOTOR ON
IES,BX) = POINTER TO DATA BUffER
4981
=
498Z
(CX)
4983
ON EXIT:
COUNT OF BYTES TO READ
I ES .BX) = POINTER TO LAST BYTE READ + 1
4984
=
4985
(OX)
4986
(CY I = 0 IF NO ERROR OCCURRED
4987
COUNT OF BYTES ACTUALLY READ
= 1 IF ERROR OCCURRED
4986
(AH)
=
ERROR RETURN IF (CY)= 1
4989
= 01 IF CRC ERROR WAS DETECTED
4990
=.
=
4991
4992
I AH)
=3
WRITE 1 OR MORE 256 BYTE BLOCKS TO CASSETTE
4993
(ES,BX) = POUlTER TO DATA BUFFET..
4994
(CX) = COUNT OF BYTES TO WRITE
4995
ON EXIT:
4996
(EX ,BX) = POINTER TO LAST BYTE WRITTEN + 1
4997
(ex)
4998
4999
5000
=a
(AH) = ANY OTHER THAN ABOVE VALUES CAUSES (eYl= 1
AND UH)= 80 TO BE RETURNED (INVALID COMMAND),
; ---------------- -------- - -------------------
5001
FB59
02 IF DATA TRANSITIONS ARE LOST
04 IF NO DATA WAS FOUND
ASSUME
DS:DATA. ES:NOTHING.SS:NOTHING.eS:CODE
500Z
CASSETTE_IO
F8S9 FB
5003
STI
FBSA IE
5004
PUSH
PRoe
OS
F85B 50
5005
PUSH
AX
F8SC B84000
5006
MOV
FBSF BE OS
5007
MOV
OS. AX
F861 802671007F
5008
AND
BIOS_BREAK. 7FH
INTERRUPTS BACK ON
ESTABLISH ADDRESSING TO DATA
AX, DATA
F866 58
5009
POP
AX
F867 Ea0400
5010
CALL
WI
Fe6A IF
5011
POP
DS
F86B CA0200
5012
RET
F86E
FAR
; MAKE SURE BREAK FLAG IS OFF
INTERRUPT RETURN
5013
CASSETTE_IO
ENOP
5014
1011
NEAR
5015
; ----------------------------------- ---------
5016
PROC
PURPOSE:
5017
TO CALL APPROPRIATE ROUTINE DEPENDING ON REG AH
5018
5019
AN
ROUTINE
5020
MOTOR ON
5021
5022
MOTOR OFF
5023
READ CASSETTE BLOCK
5024
WRITE CASSETTE BLOCK
5025
5026
F86E OAE4
5027
OR
AH.AH
,TURN ON MOTOR?
F870 7413
5026
JZ
MOTOR_ON
JYES, DO IT
Fe72 FEee
5029
DEC
AN
jTURN OFF MOTOR?
FB74 7416
5031)
JZ
MOTOR_OFF
;YES. 00 IT
F876 FEee
5031
DEC
AN
;READ CASSETTE BLOCK?
;YES, 00 IT
Fe78 74lA
5032
JZ
READ_BLOCK
Fe7A FEee
5033
DEC
AN
F87C 7503
5034
JHZ
"2
> NOT_DEFINED
F87E E92701
5035
JHP
WRITE_BLOCK
;YES. DO IT
AH.oeOH
;WRITE CASSETTE BLOCK?
5036
;COMMAND NOT DEFINED
1012:
FB8l
5037
FaBI B4BO
5038
MOV
F883 F9
5039
STC
FB84 C3
5040
5041
5042
A-68
RET
WI
ENDP
;ERROR, UNDEfINED OPERATION
;ERROR flAG
LaC OBJ
F88.
LINE
SOURCE
5043
F885 £461
PROt
NEAR
5044
j ---------------------------------
5045
;
5046
;
5047
i - - -- -- -- ----- ---- -- - - - - - -- --------
PURPOSE:
TO TURN ON CASSETTE MOTOR
5048
IN
Al.PORT_B
F887 24F7
5049
AND
AL.NOT 08H
F889 £661
5050
F888 2AE4
5051
FeaD C3
5052.
5053
5054
5055
5056
FsaE
5057
F88E E461
i READ CASSETTE OUTPUT
; ClEAR BIT TO TURN ON MOTOR
;WRITE IT OUT
;CLEAR AH
ENOP
MOTOR_OFF
PRoe
NEAR
-- ----------- -- --- --- --- -- ----------
;
; PURPOSE:
5058
;
5059
J -- -- -- ---- --- ------ ---- --- ------ - ----
TO TURN CASSETTE MOTOR OFF
IN
OR
AL.PORT_B
;READ CASSETTE OUTPUT
AL.08H
; SET BIT TO TURN OFF
Wl
ENOP
PROC
JWRITE IT, CLEAR ERROR, RETURN
F890 DeDa
5060
5061
F892 EBFS
5062
F894
5063
5064
J"P
MOTOR_OFF
REA.D_BLOCK
5065
5066
; -------------------------------------------; PURPOSE:
5067
;
5068
5069
; ON ENTRY:
5070
NEAR
TO READ 1 OR MORE 256 BYTE BLOCKS fROM CASSETTE
ES IS SEGMENT fOR MEt10RY BUFFER «FOR COttPACT CODE I
ex
5071
5072
;
;
5073
• ON EXIT:
POINTS TO START OF MEMORY BUFFER
ex CONTAINS NUMBER OF BYTES TO READ
5074
5075
ex
5076
DX CONTAINS NUMBER OF BYTES ACTUALLY READ
POINTS 1 BYTE PAST LAST BYTE PUT IN MEM
CX CONTAINS DECREMENTED BYTE COUNT
5077
CARRY FLAG IS CLEAR IF NO ERROR DETECTED
CARRY flAG IS SET IF CRC ERROR DETECTED
5078
5079
F894 53
F895 51
F896 56
Fe97 8E0700
F89,A, E8C201
F890
F89D
fe9F
F8Al
F8A4
E462
2410
A26800
BA7A3F
F8A7
F8A7 F606710080
FeAt 7403
FBAE E9SADa
5080
5081
5082
J -------------------------------------------;SAVE BX
PUSH
.x
;SAVE ex
; SAVE SI
PUSH
CX
5083
PUSH
5084
5085
MOV
SI
51. 7
CALL
BEGIN_DP
5088
50B9
IN
AND
MOV
Al~010H
5090
MOV
DX~16250
;SAVE IN LOC LAST_VAL
; I OF TRANSITIONS TO LOOK FOR
5093
TEST
BIOS_BREAK. 80H
; CHECK FOR BREAK KEY
5094
5095
JZ
w.
J"P
W17
5086
5087
5091
5092
W4:
AL.PORT_C
LAST_VAL.AL
W5:
SET UP RETRY COUNT FOR LEADER
; BEGIN BY STARTING MOTOR
i SEARCH FOR LEADER
;GET INTIAL VALUE
;MASK OFF EXTRANEOUS BITS
; WAITJOR_EOGE
JUt1P IF NO BREAK KEY
; JUMP IF BREAK KEY HIT
5096
FBSI 4A
F8B2 7503
5097
5098
W6:
DEC
OX
JHZ
.7
JMP
W17
CALL
READ_HALF _BIT
JCXZ
W.
JUMP IF BEGINNING OF LEADER
F8B4 E98400
5099
5100
F887 E8e600
5101
F8BA E3ES
F8BC BA7803
5102
5103
MOV
DX~0378H
; CHECK FOR HALF BITS
FaBF 890002
5104
HOV
CX.200H
;MUST HAVE AT LEAST THIS MANY ONE SIZE
; PULSES BEFORE CHECKNG FOR SYNC BIT (0)
F8Ct E421
5105
5106
AL. 021H
Fec4 DeDI
FSC6 E621
5107
5108
INTERRUPT MASK REGISTER
; DISABLE TIMER INTERRUPTS
W7:
IN
OR
JUMP IF NO LEADER FOUND
OUT
AL.1
021H. AL
BIOS_BREAK, 80H
we:
;IGNORE FIRST EDGE
; JUMP IF NO EDGE DETECTED
; SEARCH-LDR
F8ce
5109
Fecs F606710080
5110
TEST
FeCD 756C
5111
JUZ
W17
; Jtr.1P IF BREAK KEY HIT
FSCF 51
5112
CX
;SAVE REG CX
F8DO E8AOOO
READ_HALF _BIT
F8Dl 08C9
5113
5114
PUSH
CALL
OR
CX~
F8DS 59
FOO6 74C5
5115
5116
POP
CX
J RESTORE ONE BIT COUNTER
JZ
W4
; JUMP IF NO TRANSITION
F8D8 3803
5117
CMP
DX.BX
j
ex
; CHECK FOR BREAK KEY
;GET PULSE WIDTH
j
CHECK FOR TRANSITION
CHECK PULSE WIDTH
A-69
LOC OBJ
LINE
SOURCE
; IF C)(::O THEN WE CAN LOOK
FaOA B04
5118
JCXZ
W'
FaDe 73BF
5120
JNC
W4
i
F8DE E2E8
5121
lOOP
W8
;DEC
F8EO
f8EO 72Eb
5123
JC
W8
; JUMP IF ONE BIT (STIll LEADER)
;FOR SYNC BIT 10)
5119
512.2
W9:
JUMP IF ZERO BIT (NOT GOOD LEADER)
ex
AND READ ANOTHER HALF ONE BIT
FINO-SYNC
5124
A SYNCH BIT HAS BEEN FOUND.
512:5
READ SYN CHARACTER:
5126
FeEZ E89800
5127
F8ES E86AOO
512:8
CALL
CAll
F8ES 3e16
512:9
f8EA 7549
5130
READ_HALF _BIT
; SKIP OTHER HALF OF SYNC BIT (0)
READ_BYTE
; READ SYN BYTE
CMP
AL,
; SYNCHRONIZATION CHARACTER
JNE
Wl.
16H
i JUMP IF BAD lEADER FOUND.
5131
;------ GOOD CRe so READ DATA BLOCK{S)
FaEC SE
5132
5133
F8ED 59
5134
POP
CX
FaEE 56
5135
POP
BX
5136
5137
POP
; RESTORE REGS
S!
;--------------------------------------------
,
READ 1 OR MORE 256 BYTE BLOCKS FROM CASSETTE
5138
5139
; ON ENTRY:
5140
,
5141
5142
,
ES IS SEGMENT fOR MEMORY BUfFER (FOR COMPACT CODE I
BX POINTS TO START OF MEMORY BUFfER
ex CONTAINS NUMBER OF BYTES TO READ
5~43
; ON EX;:T:
5144
,
5145
5146
5147
F8EF 51
5148
F8FO
5149
,
BX POINTS 1 8YTE PAST LAST BYTE PUT IN MEM
CX CONTAINS DECREMENTED BYTE COUNT
ox CONTAINS HUMBER OF BYTES ACTUALLY READ
;-------------------------------------------PUSH
i SAVE BYTE COUNT
CX
WI0:
;COME HERE BEFORE EACH
;256 BYTE BLOCK IS READ
5150
F8FO C7066900FFFF
5151
MDV
CRC_REG,OFFFFH
; INIT CRC REG
F8F6 BAOOOI
5152
MDV
DX.25b
iSET OX TO DATA BLOCK SIZE
F8F9
5153
10111:
i RD_BLK
FeF9 F6067100ao
5154
TEST
BIOS_BREAK. aOH
i
FaFE 7523
5155
JNZ
WI3
; JUMP IF BREAK KEY HIT
F900 E84FOO
5156
CALL
READ_BYTE
;READ BYTE FROM CASSETTE
CHECK FOR BREAK KEY
F903 721E
5157
JC
W13
iCY SET INDICATES NO DATA TRANSITIONS
F905 nos
5158
JCXI
W12
;IF WE 'VE ALREADY REACHED
5159
;EHD OF MEMORY BUFFER
5160
;SKIP REST OF BLOCK
f907 268807
5Ibl
ES:[BX],AL
;STORE DATA. BYTE AT BYTE PTR
f90A 43
51b2
INC
"X
; INC BUFFER PTR
F90B 49
5163
DEC
CX
f90C
5164
HOV
10112:
; DEC BYTE COUNTER
lOOP UNTIL DATA BLOCK HAS BEEN READ FROM CASSETTE.
F90C 4A
5165
OX
JDEC BLOCK CNT
F90D 7FEA
516b
JG
W11
I RD_BLK
f90F E84000
5167
CALL
READ_BYTE
iNOW READ TWO CRe BYTES
F912 E83000
5168
CALL
READ_BYTE
F915 ZAE4
5169
SUB
AH,AH
F917 813E69000F 10
5170
CMP
CRC_REG,lDOFH
; IS Tt-IE CRC CORRECT
F91D 750b
5171
JNE
w'4
IIF NOT EQUAL CRe IS BAD
5172
JCXZ
W15
F91F E30b
DEC
IIf BHE COUNT IS ZERO
517.3
; THE~I WE HAVE READ ENOUGH
5174
I SO !-IE WILL EXIT
F9l1 EBCD
5175
F923
5176
JHP
WI0
iNC DATA TRANSITIONS SO
5178
MOV
AH,OlH
INC
AH
5180
F925 FEC4
5181
;SET AH;:;02 TO INDICATE
;DATA TIMEOUT
5179
Fn5
iSTIlL MORE. SO READ ANOTHER BLOCK
;MISSING-DATA
10113:
5177
Fn3 8401
;CLEAR AH
I BAO-CRC
W14:
,EXIT EARLY ON ERROR
;SET AH;:;Ol TO INDICATE CRC ERROR
5182.
i RO-BLK-EX
W15:
Fn7
5183
F92.7 5A
5184
POP
OX
;CALCULATE COUNT OF
Fn8 2.BOl
518S
SUB
OX,CX
iDATA BYTES ACTUALLY READ
F92A 50
5187
PUSH
AX
iSAVE AX (RET CODE)
FnB F6C403
5188
TEST
AH, OJH
j
CHECK FOR ERRORS
FnE 7513
5189
JNZ
Wl"
i
JUMP IF ERROR DETECTED
jRETURN COUNT IN REG ox
5186
F930 E8lFOO
5190
CALL
READ_BYTE
;READ TRAILER
F933 EBOE
5191
JMP
SHORT 10118
;SKIP TO TURN OFF MOTOR
o£c
51
F935
5192
f935 4E
51'n
A-70
i BAD-LEADER
W16:
;. CI-!":':If EjI'T!1IES
lOC OBJ
LINE
F936 7403
5194
F938 E962FF
5195
F936
5196
5197
SOURCE
JZ
WI7
; JUHP IF TOO MANY REnnES
JMP
; JUMP IF NOT TOO MANY RETRIES
10117:
; NO VALID DATA FOUND
j ------
NO DATA FROM CASSETTE ERROR. 1. E. TIMEOUT
5198
F935 SE
5199
POP
SI
; RESTORE REGS
F93C 59
5200
5201
POP
POP
CX
BX
OX,OX
;RESTORE REGS
F930 5B
AH ,Q4H
;TIME OUT ERROR (NO lEADER)
F93E ZSQZ
5202
F940 8404
5203
SUB
MOV
F942 50
5204
PUSH
AX
F943
5205
iZERQ NUMBER OF BYTES READ
; MOT-OFf
JoI18:
F943 E421
5206
IN
AL. 021H
F945 24FE
5207
AND
OUT
AL. OFFH- 1
F947 HZ1
5208
F949 E842FF
5209
F94C 58
5210
F940 80FCOI
5211
f950 F5
5212
F951 C3
5213
F952
CALL
POP
CMP
CMC
RET
; RE_ENABLE INTERRUPTS
021H. AL
MOTOR_OFF
;TURN OFF MOTOR
AX
jRESTORE RETURN CODE
AH,OlH
j
SET CARRY If ERROR (AH>O J
jf!NISHED
ENDP
5214
READ_BLOCK
5215
; ---- ------------- - ------ --------- -------PRoe
5216
5217
NEAR
PURPOSE:
5218
TO READ A BYTE FROM CASSETTE
5219
;1:20
5221
ON EXIT REG AL CONTAINS READ DATA BYTE
; ----- -- ---------- - ---------------- --- -- -.--
F952 53
5222
PUSH
5223
PUSH
ex
ex
;SAVE REGS Bx.ex
F953 51
F9546108
5224
HOV
el,SH
; SET Bn COUNTER FOR 8 BITS
PUSH
ex
F956
5225
F956 51
5226
F957 1;82600
F95A
nzo
; BYTE-ASH
1<.119:
;SAVE ex
----------.------.-------. --.-------
5227
; -----
5228
;
5229
; --- ----- - - - -- --- --- ---.-- ------------.--READ_HALF _BIT
iREAD DUE PULSE
CALI.
5230
READ DATA BIT FROM CASSETTE
JCXZ
5231
W21
j
If CX:::O THW TIMEOUT
iBECAUSE OF NO DATA TRANSITIONS
5232
f95C 53
5233
PUSH
ex
,SAVE 1ST HALF BIT'S
F950 E82000
5235
CALL
READ_HALF _BIT
;READ COMPLEMENTARY PULSE
F960 58
5236
POP
AX
;COHPUTE DATA BIT
F961 E319
5237
; PULSE mOTH (IN BX)
523f+
JCXZ
W21
;IF CX=O THEN TIMEOUT OUE TO
ADO
CMP
BX,AX
.PERIOD
ex.
; CHECK FOR ZERO BIT
;NO OATA TRANSITIONS
5238
F963 0308
F965 8lF8F006
5239
F969 FS
5240
5241
F96A 9F
5242
F966 59
5243
CMC
lAHf
POP
06fOH
; CARRY IS SET IF ONE BIT
cx
;SAVE CARRY IN AH
lRESTORE ex
;NOTE:
5244
5245
i
; REG CH IS SHIFTED LEFT WITH
5247
i
CARRY BEING INSERTED WTD LS
i
AFTER All a BITS HAVE BEEN
BIT OF CH.
5248
5241;1
READ. THE I1S BIT OF THE DATA BYTE
5250
WIll BE IN THE MS BIT OF REG CH
5251
F96C ODDS
MS BIT OF BYTE IS READ fIRST.
5246
5('52
RCL
CH.l
;RorATE REG CH lEfT ;·,tITH CARRY TO
lS BIT OF REG 01
5253
;RESTORE CARRY FOR CRC ROUTINE
F9H 9E
5254
SAHf
F96F E8D900
5255
CALL
CRC_GEN
;GENERATE CRe FOR aIr
F9n FEe9
52.56
DEC
CL
; LOOP TILL All 8 BITS OF DATA.
JHZ
W19
; BYTE_ASM
MOV
AL.CH
i ASSEMBLED IN REG CH
5257
F974 75EO
5ZS8
F976 SACS
5259
F978 f8
5Z60
F979
5261
; RO-BYT-EX
F979 59
5262
POP
ex
F97A 56
S:Z6-3
pop
BX
F97~
C3
5264
RET
F97C 59
5ZH
5266
F97D F9
5267
F97C
;RETURN O.A.TA BYTE IN REG At
ClC
W20:
;RESTORE REGS CX.BX
;FINISHED
; NO-DATA
W21:
POP
STC
CX
;RESTORE CX
;INDICATE ERROR
A-71
LOC OBJ
F97E EBF9
LINE
""
5268
5269
5270
F980
SOURCE
ENOP
; --------------------------------------------
NEAR
5271
5272
PURPOSE:
5273
TO CONPUTE TINE TILL NEXT DATA
5274
TRANSITION (EDGE)
5275
5276
; ON ENTRY:
5277
j
EDGE_CNT CONTAINS LAST EDGE COUNT
5278
5279
; ON EXIT:
5280
;
AX CONTAINS OLD LAST EDGE COUNT
5281
;
BX CONTAINS PULSE WIDTH (HALF BIT)
5282
; -------------- --------------- -----------
F'980 896400
5283
HOV
ex.
f983 BA266BOO
5:!84
HOV
AH,lAST_VAL
F987
5285
; SET TIME TO WAIT fOR BIT
100
W22:
;GET PRESENT INPUT VALUE
; RD-H-BIT
F967 E462
5286
IN
AL.PORT_C
,INPUT DATA BIT
F989 2410
5287
AND
AL.OIOH
;MASK OFF EXTRANEOUS BITS
f98B 3AC4
5288
eMP
AL.AH
;SAME AS BEFORE?
F98D EIFS
5289
LOOPE
"22
; LOOP TILL IT CHANGES
LAST_V.A.L,AL
;UPDATE LAST_VAL WITH NEW VALUE
;READ TINER'S COUNTER COMMAND
5290
MOV
F992 BOOO
5291
HOV
AL.O
F994 E643
5292
OUT
TIM_CTL.At
F99b E440
5293
HI
At, TIMERO
;GET lS BYTE
F998 BAEO
5294
5295
MOV
IN
AH.AL
;SAVE IN AH
F98F AlbBDO
t9'9A f:.440
AL. TIMERO
; LATCH COUNT ER
;GET MS BYTE
F99C 66C4
5296
XCHG
Al.AH
;XCHG AL.AH
f99E 6BIE6700
5297
HOV
BX.EDGE_CNT
; ex
F9A2 2806
5298
SUB
BX,AX
iSH BX EQUAL TO HALF BIT PERIOD
F9A4 A36700
5299
MOV
EDGE_CNT .AX
;UPDATE EDGE COUNT;
F9A7 C3
5300
F9A8
GETS LAST EDGE COUNT
RET
5301
READ_HAlF _BIT
5302
; --------- - ---------------------- ---------
5303
ENDP
PRoe
NEAR
5304
5305
; WRITE 1 OR MORE 256 BYTE BLOCKS TO CASSETTE.
5306
THE DATA IS PADDED TO FILL OUT THE LAST 256 BYTE BLOCK.
5307
5308
ON ENTRY:
5309
ex
5310
CX CONTAINS NUMBER OF BYTES TO WRITE
POINTS TO MEHORY BUffER ADDRESS
5311
5312
ON EXIT:
BX POUlTS I BYTE PAST lAST BYTE WRITTEN TO CASSETTE
5313
5314
5315
F9A8 53
5316
F9A9 51
5317
CX IS ZERO
; -------------------------------------------PUSH
BX
PUSH
ex
F9AA E461
5318
IN
AL.PORT_B
F9AC 24FO
5319
AND
Al.NOT 02H
F9AE OCOI
5320
OR
AL. OlH
F9BO E661
5321
OUT
PORT_B,Al
F9B2 B086
5322
MOV
Al.OB6H
;DISABLE SPEAKER
; ENABLE TIMER
; SET UP TIMER -- MODE 3 SQUARE WAVE
F9B4 E643
5323
OUT
TIM_CTl,AL
F9B6 ESA600
5324
CAll
BEGIN_OP
; START MOTOR AND DELAY
F9B9 B8A004
5325
MOV
AX.1184
; SET NORMAL BIT SIZE
F9BC E88500
5326
CALL
"31
; SET_TIMER
F9BF 890008
5327
MOV
CX.0800H
W23:
5328
5329
STe
; WRITE ONE BITS
F9Cl E86800
5330
CALL
WRITE_BIT
F9C6 EZFA
5331
lOOP
W23
F9C6 F8
5332
eLe
F9C9 E86200
5333
CAll
WRITE_BIT
, LOOP
'TIL LEADER IS WRITTEN
;WRITE SYNC BIT
F9CC 59
5334
POP
ex
F9CD 58
5335
POP
BX
F9CE B016
5336
MOV
Al.
F900 E84400
5337
CAll
IolRITE_BYTE
A-72
;SET CX FOR LEADER BYTE COUNT
; WRITE LEADER
F9C2
F9C2 F'9
(0)
iRESTORE REGS CX.BX
l6H
WRITE SYN CHARACTER
lOC OBJ
LINE
5338
SOURCE
; --------------- -- ---------------------------
5339
WRITE 1 OR MORE 256 BYTE BLOCKS TO CASSETTE
5340
ON ENTRY:
BX POINTS TO MEMORY BUFFER ADDRESS
5341
5342
ex
5343
CONTAINS NUMBER OF BYTES TO WRITE
5344
5345
ON EXIT:
BX POINTS 1 BYTE PAST LAST BYTE WRITTEN TO CASSETTE
5346
5347
F9DJ
; ------- - ------- ---------- --------- ---- -----
5349
WR_BLOCK:
F903 C7066900FFFF
5350
F9D9 BAOOO I
5351
F9DC
CX IS ZERO
5348
5352
eRe
NOV
CRC_REG.OFFfFH
;INIT
MOV
OX,2S6
; FOR 256 BYTES
; Wj:;I-BLK
1424:
AL.ES: faX)
;READ BYTE FROM MEM
F9DC 268M7
5353
NOV
F9DF E83500
F9E2 [302
5354
5355
CALL
WRITE_BYTE
JCXZ
WZ5
;UNLESS CX=O. ADVANCE PTRS & DEC COUNT
F9E4 43
5356
INC
BX
UNC BUFFER POINTER
;DEC BYTE COUNTER
; WRITE IT TO CASSETTE
f9E5 49
5357
DEC
ex
F9E6
5358
f9E6 4A
5359
DEC
DX
;DEC BLOCK CNT
F9E7 7FF3
5360
JG
W24
;LOOP TIll 256 BYTE BLOCK
W25:
; SKIP-ADV
5361
5362
5363
5364
;
IS WRITTEN TO TAPE
j-------------------
WRITE CRe -------------WRITE l'S COMPLEMENT OF CRe REG TO CASSETTE
;
WHICH IS CHECKED FOR CORRECTNESS IoIHEN THE BLOCK IS READ
5365
F9E9 Al6900
5366
; REG AX IS MODIFIED
5367
; ----------------- ---- -- -- -----------------
5368
NOV
AX.CRt_REG
;WRITE THE ONE'S COMPLEMENT OF THE
;
TWO BYTE CRC TO TAPE
NOT
AX
;; fOR 1'S COMPLEMENT
AX
;SAVE IT
5369
F9EC f700
5370
F9EE 50
5371
PUSH
F9EF 86EO
5372
XCHG
AH,AL
;WRITE MS BYTE FIRST
F9Fl E82300
5373
CALL
WRITE_BYTE
;WRITE IT
F9F4 58
5374
POP
AX
;GET IT BACK
F9F5 E81FOO
5375
CALL
WRITE_BYTE
;NOW WRITE LS BYTE
F9F8 OBC9
5376
OR
ex.ex
; IS BYTE COUNT EXHAUSTED?
F9FA 7507
5377
JNZ
WR_BLOCK
; JUMP IF NOT DONE YET
F9FC 51
5378
PUSH
ex
NOV
ex.
f9FD B92000
5379
FAOO
5380
fADO F9
5381
STe
;SAVE REG CX
32
1426:
;WRITE OUT TRAILER BITS
;; TRAIL-LOOP
FAOI EB2AOO
5382
CALL
FA04 EZFA
5383
5384
LOOP
W2.
;: WRITE UNTIL TRAILER WRITTEN
FA06 59
POP
ex
;RESTORE REG
FAD7 BOBO
5385
NOV
AL. OBOH
;; TURN TIMER2 OFF
FA09 E643
5386
5367
5388
OUT
TIN_CTl, AL
NOV
AX. 1
fADE E83300
CALL
W31
;; SET_TIMER
; TURN NOTOR OFF
FAOB B80l00
WRITE_BIT
fAll E87AfE
5389
CALL
MOTOR_OFF
FA14 2ECO
5390
SUB
AX,AX
FAl6 C3
5391
RET
5392:
WRITE_BLOCK
FA17
5393
5394
; -----------------------------------------WRITE_BYTE
PROC
NEAR
5395
;
WRITE A eYTE TO CASSETTE.
5396
;
BYTE TO WRITE IS IN REG At.
ex
;NO ERRORS REPORTED ON WRITE OP
;FINISHED
ENDP
5397
fAl7 51
5398
PUSH
ex
FAl8 50
5399
PUSH
AX
FAl9 SAE8
5400
NOV
CH.AL
;AL=BYTE TO WRITE.
NOV
CL.a
;FOR 8 DATA BITS IN BYTE.
RCl
CH,1
(MS BI r WRITTEN fIRST)
5401
FAlB BI08
5402
NOTE: TWO EDGES PER BIT
5403
FAID
5404
FAID 0005
5405
fAH 9C
5406
;SAVE REGS eX,AX
1427:
; DISASSEMBLE THE DATA BIT
jROTATE HS BIT INTO CARRY
;SAVE flAGS.
PUSHf
NOTE: DATA BIT IS IN CARRY
5407
FA20 E80600
5408
CALL
FAZ3 90
5409
POPF
WRITE_BIT
;WRITE DATA BIT
; RESTORE CARRY fOR CRe CALC
FAZ4 E62400
5410
CALL
CRe_GEN
; COMPUTE CRC ON OAT A BIT
FA27 FEC9
5411
DEC
el
; LOOP TILL ALL 8 BITS DONE
fAZ9 7SF2
5412
JHZ
W27
; JUMP IF NOT DONE YET
FA2B 56
5413
POP
AX
jRESTORE REGS AX.eX
FA2C 59
5414
POP
ex
A-73
LaC OBJ
FAZO C3
LINE
SOURCE
5415
i WE ARE FINISHED
ENDP
5416
FA2E
5417
5418
5419
;---------------------------------------WRITE_BIT
PROC
NEAR
PURPOSE:
5420
5421
TO WRITE A DATA BIT TO CASSETTE
5422
CARRY FLAG CONTAINS DATA BIT
54Z3
I.E. IF SET
DATA BIT IS A ONE
IF CLEAR DATA BIT IS A ZERO
5424
5425
5426
NOTE: TWO EDGES ARE WRITTEN PER BIT
ONE BIT
5427
5428
HAS 500 USEe BETWEEN EDGES
FOR A 1000 USEe PERIOD (1 MILlISEC)
5429
5430
ZERO BIT HAS 250 USEC BETWEEN EDGES
FOR A
5431
500 USEC PERIOD (.5 MIlllSEC)
5432
• CARRY flAG IS DATA BIT
5433
1-------------------------------------------
5434
JASSUME IT'S A ' I '
FAZE B6A004
5435
FAll 7203
5436
NOV
JC
FAl3 885002
5<'t37
FA36
5438
FA36 50
5439
FA37
5440
FA37 E462
5441
FA39 242:0
5442
FA3B 74FA
5443
FA 3D
5444
AX.l184
; SET AX TO NOMINAL ONE SIZE
NOV
"'"
j
PUSH
AX
;WRITE BIT WITH PERIOD EQ TO VALUE AX
IN
AND
Al,PORT_C
JINPUT TIMER_O OUTPUT
AL,020H
JZ
"29
; LOOP TILL HIGH
;NOW WAIT TILL TIMER'S OUTPUT 1'5 LOW
AX.5"n
JutlP IF ONE BIT
; NO, SET TO NOHINAL ZERO SIZE
W28:
; WRITE-BIT-AX
WZ9:
W30:
fA3D E462
5445
IN
AL.PORT_C
FA3F 2420
5446
FA41 75FA
5447
AND
JNZ
"30
POP
AX
JRESTORE PERIOD COUNT
042H, AL
• SET TIMER
; '5ET LOW BYTE OF TIMER 2:
AL,020H
5448
;RELOAD TIMER WITH PERIOD
5449
; FOR NEXT DATA BIT
FA43 58
5450
FA44
5451
FA44 E642
5452
FA46 8AC4
5453
OUT
NOV
AL. AH
FA46 E642
5454
OUT
042H, AL
FA4A Cl
5455
RET
5456
FA48
1431:
WRITE_BIT
; SET HIGH BYTE OF TIMER 2
ENDP
5457
; --------- ---- - ------- ------------ --------
5458
CRC_GEN
5459
PROC
NEAR
UPDATE CRe REGISTER WITH NEXT DATA BIT
5460
5461
CRC IS USED TO DETECT READ ERRORS
5462
5463
ASSUMES DATA BIT IS IN CARRY
5464
5465
5466
5467
FA48 A16900
REG AX IS MODIFIED
flAGS ARE MODIFIED
; --- -- - ------ ---- --- ----------------------
5468
NOV
5469
i THE FOLLOWING INSTUCTIONS
5470
; WILL SET THE OVERFLOW FLAG
5471
; IF CARRY AND NS BIT OF CRe
5472
FA4E 0108
; ARE UNEQUAL
5473
RCR
AX.l
FASO DIDO
FA52 f8
5474
5475
PCl
ClC
AX.l
FA53 7104
5476
JNo
"32
FA55 351008
5479
XOP
AX.08IOH
;CLEAR CARRY
i SKIP IF NO OVERFLOW
5477
;IF DATA BIT XORED WITH
5476
• CRC REG BIT 15 IS ONE
; THEN XOR eRC REG WITH
5480
FA58 F9
5481
FA59
5482
• 0810H
;SET CARRY
STO
W12:
FA59 DIDO
5483
PCl
AX,I
;ROTATE CARRY (DATA BITl
rA5B A36900
5485
NOV
CRC_REG,AX
.UPDATE CRC_REG
FASE C3
5486
RET
5487
CRC_GEN
5486
5489
j ---- ------------- ---------- -----------------
FA5F
; INTO CRC REG
5484
,FINISHED
ENDP
PROC
NEAR
; START TAPE AND DELAY
5490
5491
A-74
; ---------- ------- ---------------------------
LOC OBJ
LINE
SOURCE
FA5F E823FE
5492
CALL
MOTOR_ON
j
FAbZ 8342
5493
MOV
BL.42H
;oELAY FOR TAPE DRIVE
5494
5495
FA64
FA64 890007
5497
FA6'9 FEes
5498
fAbS 7SF7
FA6D CJ
N34:
MOV
CX,700H
LOOP
1.134
DEC
BL
5499
JNZ
W33
5500
RET
5501
5502
5503
(1/2 SEC)
N33:
5496
FA67 EZFE
TURN 01>1 MOTOR
; TO GET UP TO SPEED
jINNER LOOP= APPROX. 10 HILLISEC
Et5
FCZ6 FCCCOC1830303000
5561
5562
5563
5564
FCZE 78CCCC78CCCC7800
5565
DB
078H.OCCH.OCCH,078H.OCCH.OCCH.078H,OOOH ; 8 o_38
FC36 76CCCC7COC167000
5566
5567
DB
018H.OCCH,OCCH.07CH,OOCH,018H.070H,OOOH
9 0_39
DB
OOOH.030H.030H,OOOH.OODH.030H.030H.OOOH
: 0_3A
FC16 fCCOF80COCCC7800
FCIE 3860COFSCCCC7800
FC3E
OQ30300000!.Q'll0~
DB
036H.060H.OCOH.OF8H.OCC;H.OCC;H,078H.000H ; 6 o_36
DB
OFCH.OCCH,OOCH.018H.030H.030H.030H,000H ; 7 0_37
A-7S
lOC OBJ
LINE
SOURCE
FC46 0030300000303060
5568
DB
OOOH,030H,030H,OOOH,OOOH,030H,030H,060H ;
FC4E 183060C060301800
5569
DB
018H,030H,060H,OCOH,060H,030H,018H,OOOH ; < D_3C
; 0_3B
FCS6 OOOOFCOOOOFCOOOO
5570
DB
OOOH ,OOOH, OFCH, OOOH, DOOH, OFCH, OOOH, OOOH
:; 0_30
FC5E 6030180CI8306000
5571
DB
060H,030H,018H,OOCH,Ol8H,030H,060H,OOOH
FC66 78CCOC1830003000
5572
DB
078H,OCCH,OOCH,018H,030H,OOOH,030H,OOOH
> D_3E
? O_3F
07CH.OC6H,ODEH,OOEH,OOEH,OCOH,078H,OOOH ;
~
5573
0_40
FC6E 7CC6DEDEDEC07800
5574
DB
FC76 3078CCCCfeccccoo
5575
DB
030H,078H,OCCH,OCCH,OfCH,OCCH,OCCH,OOOH ; A 0_41
Fe7E FC66667C6666FCOO
5576
DB
OFCH,066H,066H.07CH,066H,066H,OFCH.OOOH ; B 0_42
Fce6 3C66COCOC0663COO
5577
DB
03CH,066H,OCOH,OCOH,OCOH,066H,03CH,OOOH ; e 0_43
FceE F86C6666666CF800
5578
DB
OFBH,06CH,066H,066H,066H,06CH,OFeH,OOOH ;
FC96 FE6268786862FEOO
5579
DB
OFEH.062H.068H.078H,068H,062H,OfEH,OOOH ; E 0_45
Fe9E FE6268786860FOOQ
5580
DB
OFEH,06ZH.06BH.078H,068H,060H.OFOH,OOOH ; F 0_46
FeA6 3C66COCOCE663EOO
5581
DB
03CH.066H,OCOH.OCOH.OCEH.066H,03EH,OOOH ; G 0_47
FeAE eceCCCFCCCCCCCOO
5582
DB
OCCH,OCCH.OCCH,OFCH,OCCH,OCCH,OCCH,OOOH
FeB6 7830303030307800
5583
DB
07BH,030H,030H,030H,030H.030H,078H,OOOH ; I
FeBE lEOCOCOCCCCC7800
5584
5585
DB
01EH,OOCH,00CH,00CH,OCCH.OCCH.07BH.OOOH ; J 0_4A
DB
OE6H,066H,06CH.078H,06CH,066H,OE6H.OOOH ; K 0_48
FeCE F06060606266FEOO
5586
DB
OFOH.060H,060H.060H,062H,066H.OFEH.OOOH ; L O_4C
FeD6 e6EEFEFE06C6C600
5587
DB
OC6H,OEEH,OfEH,OFEH,OD6H,OC6H,OC6H,OOOH ; M 0_40
FeOE C6E6F6DEeEe6C600
5588
DB
OC6H,OE6H.OF6H,ODEH.DCEH,OC6H,OC6H.OOOH ; N 0_4E
FCEb 386CC6C6C66C3800
5589
DB
038H,06CH,OC6H,OC6H,OC6H,06CH,038H,OOOH ; OO_4F
OFCH,066H.066H,07CH,060H,060H,OfOH,OOOH
Fee6 E6666C786C66E600
j
°
0_44
H 0_48
0_49
5590
PO_50
FeEE FC66667C6060FOOO
5591
DB
FCF6 78CCCCCCDC781eoo
5592
DB
078H,OCCH,OCCH,oceH,OOCH,078H.OICH,OOOH ; Q 0_51
FCFE Fe66667(6C66E600
5593
DB
OFCH,066H,066fl,07CH,06CH,066H,OE6H.OOOH ; R 0_52
FOUb 78CCE0701CCC7800
5594
j
DB
07BH,OCCH,OEOH,070H,OlCH,OCCH.078H,OOOH ; SO_53
FOOE FCB43U3U3U307800
5595
DB
OFCH,064H,030H,030H.030H,030H,078H,000H ; TO_54
F016 CCCCCCCCCCCCFCOO
5596
DB
OCCH.OCCH,OCCH.OCCH,OCCH,OCCH,OfCH,OOOH ; U 0_55
FOIE CCCCCCCCCC783000
5597
DB
OCCH.OCCH,OCCH,OCCH.OCCH,078H,030H,OOOH ; V 0_56
F026 C6C6C606FEEEC600
5598
DB
OC6H,OC6H.OC6H,006H,OFEH,OEEH,OC6H,OOOH ; W 0_57
F02E C6C66C38366CC6UO
5599
DB
OC6H.OC6H,06CH,03BH,03BH,06CH,OC6H,OOOH ; X 0_58
FD36 CCCCCC7830307800
5600
DB
OCCH,OCCH,OCCH,07BH,030H,030H,078H,OOOH ; YO_59
FD3E FEe68CI83266FEOO
5601
DB
F046 7860606060607800
OFEH.OC6H,08CH,OlBH,032:H,066H,OFEH,OOOH ; Z D_5A
5602
DB
078H,060H,060H,060H,060H,060H,07BH,OOOH ; ( 0_5B
F04E C06030180C060200
5603
DB
OCOH,060H,030H,OI8H,00CH,006H,002H.000H ; BACKSLASH 0_5C
FD56 7818181818187800
5604
DB
078H,018H,018H,018H,OI8H,OI8H.078H,OOOH ;
I 0_50
F05E 10386CC600000000
5605
DB
010H,038H,06CH,OC6H,OOOH,OOOH,OOOH.OOOH
CIRCUMFLEX 0_5E
F066 OOOOOOOOOOOOOOFF
5606
DB
OOOH,OOOH,OOOH.OOOH.OOOH,OOOH,OOOH.OFFH ; _ 0_5F
j
5607
030H,030H,OI6H,OOOH.000H,000H,OOOH,OOOH;
0_60
F06E 3030180000000000
5608
F076 0000780C7CCC7600
5609
DB
000H,OOOH.078H,OOCH,07CH,OCCH,076H.000H ; lOWER CASE A 0_61
F07E E060607C66660COO
5610
DB
OEOH,060H,060H.07CH.066H,066H.OOCH.000H
L.C. B 0_62
F086 000078CCCOCC7800
5611
DB
OOOH,OOOH,078H.OCCH,OCOH,OCCH.078H,OOOH
L.e. C 0_63
F08E lCOCOC7CCCCC7600
5612
DB
OlCH.OOCH,OOCH,07CH,OCCH,OCCH.076H.000H
FD96 000078CCFCC07800
5613
DB
OOOH.OOOH,078H,OCCH,OFCH,OCOH,078H,000H
L.C. E 0_65
Fo9E 386C60f06060FOOO
5614
DB
03BH,06CH,060H,OFOH,060H,060H,OFOH,OOOH ;
l.C. F 0_66
FoA6 000076ccce7COCF8
5615
DB
OOOH,OOOH,076H,OCCH,OCCH.07CH.OOCH.Of8H ; L.C. G 0_67
DB
L.C. D 0_64
FOAE E0606C766666E600
5616
DB
OEOH,060H.06CH,076H,066H,066H,OE6H,OOOH ; L.C. H 0_6B
FOB6 3000703030307800
5617
DB
030H,OOOH,070H.030H,030H,030H.078H.000H ; L.C. I 0_69
FOBE OCOOOCOCOCCCCC78
5618
DB
00CH,OOOH,OOCH,OOCH,OOCH.OCCH.OCCH,078H ; L.C. J 0_6A
FOC6 E060666C786CE600
561'9
DB
OEOH,060H.066H,06CH,078H,06CH,OE6H.000H ; l.C. K 0_6B
070H,030H,030H,030H,030H,030H,078H.OOOH ; l.C. L D_6C
FOCE 7030303030307800
5620
DB
F006 OOOOCCFEFE06C600
5621
DB
000H,OOOH,OCCH.OFEH.OFEH,OD6H.OC6H.OOOH ; L.C. M 0_60
FooE OOOOF8CCCCCCCCOO
5622
DB
OOOH,OOOH,OF8H,OCCH,OCCH,OCCH.OCCH.OOOH ; L.C. N 0_6E
FoE6 000078CCCCCC7BOO
5623
DB
OOOH,OOOH,078H,OCCH.OCCH,OCCH.078H,OOOH ; LC. 0 0_6F
DB
000H.000H.ODCH,066H,066H,07CH.060H.OFOH ; L.C. P 0_70
5624
FoEE 00000C66667C60FO
5625
FOF6 000076CCCC7COCIE
5626
DB
OOOH,OOOH,076H,OCCH,OCCH.07CH,OOCH,01EH ; L.C. Q 0_71
FOFE OOOOOC766660FOOO
5627
DB
OOOH,OOOH.ODCH,076H,066H,060H.OfOH,OOOH ; l.C. R 0_72
FE06 00007CC0780CF800
5628
DB
OOOH,OOOH.07CH,OCOH,078H,OOCH,OF8H,OOOH
HOE 10307C3030341800
5629
DB
010H.030H,07CH,030H,030H,034H,OlBH,OOOH ; LC. T 0_74
FEI6 00oocCCCCCCC7600
5630
DB
OOOH.OOOH.OCCH,OCCH,OCCH,OCCH,076H,OOOH • l.t. U 0_75
FEIE OOOOCCCCCC783000
5631
DB
000H,OOOH,OCCH,OCCH,OCCH,078H,030H,OOOH I L.C. V 0_76
FE2:6 0000C606FEFE6COO
5632:
DB
000H,OOOH,OC6H,006H,OFEH,OfEH,06CH,000H ; LC. W 0_77
FE2E 0000C66C386CC600
5633
DB
OOOH,OOOH,OC6H,06CH,038H,06eH,OC6H,OOOH ; L.C. X 0_78
OOOH,OOOH,OCCH,OCCH,OCCH.07CH,OOCH,Of8H
i
l.C. 50_73
l.C. Y 0_79
FE36 0000cceCCC7COCF8
5634
DB
FOE OOOOFC983064FCOO
5635
DB
000H,OOOH,OFCH,09BH,030H,064H,OFCH,OOOH ; L.C. Z 0_7A
FE46 lC3030E030301COO
5636
DB
OlCH, 030H, 0 30H, OEOH, 0 30H, 030H ,OlCH. OOOH;
0_78
FE4E 1818180018181800
5637
DB
OI8H.018H.OIBH,000H,018H,018H.OIBH,OOOH;
O_7C
0_70
O_7E
FE56 E030301C3030EOOO
5638
DB
OEOH.030H,0301l,01CH.030H,030H.OEOH.000H;
FE5E 76OCOOOOOOOOOOOO
5639
DB
076H, ODCH, OOOH, OOOH, OOOH. OOOH, OOOH, OOOH
FE66 0010386CC6C6FEOO
5640
DB
OOOH,010H,038H,06CH,OC6H,OC6H,OFEH.000H ; DELTA o_7F
A-76
LOC OBJ
LINE
5641
SOURCE
;--- 1NT 1A -------------------------------
5642
TIME_OF _OAY
5643
THIS ROUTINE ALLOWS THE ClOCK TO BE SET/READ
5644
5645
INPUT
5646
=
IAH)
READ THE CURRENT CLOCK SETTING
0
5647
RETURNS
5648
5649
ex '" HIGH POR rION OF COUNT
OX = LOW PORTION OF COUNT
Al = 0 IF TIMER HAS NOT PASSED
(AH) ::; 1
5652
5653
5654
SET THE CURRENT ClOCK
ex =
HIGH PORTION OF COUtU
ox =
LOW PORTIOI'{ OF caUNT
; NOTE: COUNTS OCCUR AT THE RATE CF 1193180/65536 COUNTS/SEC
(OR ABOUT 18.2 PER SECOND -- SEE EQUATES BElOWI
5655
5656
; --------------------- -- ---------------------
5657
ASSUME
CS: CODE, OS:DATA
FE6E
5658
TIME_OF _DAY
FE6E FB
5659
STI
FE6F IE
5660
PUSH
FE70 50
5661
PUSH
FE71 684000
5662
MOV
AX,DATA
FE74 8ED8
5663
MOV
OS.AX
FE76 58
5664
POP
AX
FE77 OAE4
5665
OR
AH,AH
; AH=O
; READ_TIME
PROC
FAR
INTERRUPTS BACK ON
OS
SAVE SEGMENT
AX
SAVE PARM
ESTABLISH ADDRESSING TO VALUES
GET BACK INPUT PARM
fE79 7407
5666
JZ
T2
FE7B FECC
5667
OEe
AH
AH;::l
FE7D 7416
5666
JZ
n
SET_TIME
FE7F
5669
Tl:
TOO_RETURN
5670
STI
FE80 IF
5671
POP
FE81 CF
5672
JRET
FE82
5674
FE82 FA
5675
eLI
FE83 A07000
5676
MOV
FE86 C606700000
5677
NOV
TIHER_OFl.O
FE8B 860E6EOO
5678
NOV
ex, TIMER_HIGH
FEaF 86166COO
5679
NOV
OX. TIMER_LOW
FE93 EBEA
5680
JMP
Tl
FE7F FB
2't HOURS SINCE LAST READ
<>0 IF ON ANOTHER DAY
5650
5651
INTERRUPTS BACK ON
; RECOVER SEGMENT
OS
; RETURN TO CALLER
5673
T2:
READ_TIME
NO TIMER INTERRUPTS WHILE READING
AL,TIMER_OFL
; GET OVERflOW, AND RESET THE FLAG
; TOD_RETlmN
5681
FE95
5682
T3:
SET_TIME
NO INTERRUPTS WHILE WRITING
FE95 FA
5683
eLI
FE96 89166COO
5684
NOV
TIMER_lOW, OX
FE9A 890E6EOO
5665
NOV
TIMER_HIGH,eX
FE9E C606700000
5686
NOV
TIMER_OFL,O
i
fEA3 EBOA
5687
JNP
Tl
; TOO_RETURN
; SET THE TIME
RESET OVERFLOW
TIME_OF _DAY
--------------------- - -- ------- -- ------ -----
5703
;
FEA5
5704
TIMER_INT
FEA5 FB
5705
FEA6 IE
5706
PUSH
OS
FEA7 50
5707
PUSH
AX
FEA8 52
5708
PUSH
OX
FEA9 684000
5709
NOV
AX,DATA
FEAC 8ED8
5710
PROC
fAR
; INTERRUPTS BACK ON
STI
; SAVE MACHINE STATE
NOV
OS.AX
FEAE FF066COO
5711
INC
TIMER_LOW
INCREMENT TIME
FEBl 7504
5712
JNZ
T4
TEST_DAY
FEB4 FF066EOO
5713
INC
TIMER_HIGH
FEBS
5714
T4:
ESTABLISH AOORESSABIlITY
WCREMEtH HIGH WORD Of TIME
TE~T_OAf
A-77
LOC OBJ
LINE
SOURCE
FEes 833E6E0018
5715
CMP
FEBD 7519
JHZ
FEBF 813E6C008000
5716
5717
CMP
TIMER_LOW.OBOH
FECS 7511
5718
JHZ
T5
TIMER_HIGH.OI6H ; TEST FOR COUNT EQUALLING 24 HOURS
T5
I DISKETTE_CTl
DISKETTE_CTL
i
5719
5720
;------ TIMER HAS GONE 24 HOURS
572:1
FEC7 C7066EOOOOOO
572:2
MOV
fEeD C7066COOOOOO
5723
5724
5725
NOV
TIMER_lOW. 0
MOV
TIMER_OFl.1
FEDl C606700001
5726
j------
TIMER_HIGH.O
TEST FOR DISKETTE TIME OUT
5727
T5:
FEDS
5728
FEDS fEOE4DOO
5729
DEC
HOTOR.COUNT
FEDe 7508
5730
JHZ
T6
J DISKETTE_CTL
; RETURN IF COUNT NOT OUT
MOTOR.STATUS,OFOH
i TURN OFF MOTOR RtmNING BITS
5731
AHD
FEEl BODC
5732
NOV
AL.OCH
FEES SAFZ03
5733
NOV
DX,03F2H
FEE8 EE
5734
OUT
DX.AL
FEDE 80263FOOFO
; FDC CTL PORT
TlIRN OFF THE f1OTOR
5735
F£E9
5736
fEE9 COlt
5737
IHT
ICH
FEES BOZO
5738
NOV
AL.EOI
FEED E620
5739
OUT
020H.AL
FEEr 5A
5740
POP
OX
FEFO 58
5741
POP
AX
fEFI IF
5742
POP
OS
FEF2 Cf
5743
IRET
FEF3
T6:
; TIMER.RET:
; TRANSFER CONTROL TO A USER ROUTINE
; END OF INTERRUPT TO 8259
j
RESET MACHINE STATE
; RETURN FROM INTERRUPT
ENOP
5744
TIMER.INT
5745
5746
,-------------------------------------------; THESE ARE THE VECTORS WHICH ARE HOVEn INTO
5747
j
THE 8086 INTERRUPT AREA DURING POWER ON
5748
j--------------------------------------------
5749
VECTOR.TABLE
LABEL
WORD
VECTOR TABLE FOR MOVE TO INTERRUPTS
5750
FEF3 AS'E
FEFS Oaf a
5751
5752
OW
COOE
FEF7 87E9
5754
OW
OFFSET
FEF9 DOFO
5755
5756
OW
CODE
5757
DO
5758
5759
DO
INTERRUPT B
DO
INTERRUPT C
00
INTERRUPT D
OW
OFFSET TIMER.INT
INTERRUPT 8
5753
FEFB OOODOOOO
FEFf 00000000
FF03 00000000
FF07 00000000
5760
KB.INT
INTERRUPT 9
; INTERRUPT A
5761
FFOB 57EF
5762
OW
OFFSET DISK.INT
FFOD OOFO
5763
ow
CODE
INTERRUPT E
5764
5765
5766
DO
FFl3 65FO
5767
5768
DW
DW
OFFSET VIDEO.IO
HIS OOFO
DW
DW
OFFSET EQUIPMENT
FFOF 00000000
INTERRUPT F
; INTERRUPT 10H
COOE
5769
FFl7 40F8
5770
FFI9 OOFO
5771
5772
5773
FFlB 41F6
DW
OFFSET "EMORY.SIZE.DETERMINE
OW
COOE
5776
5177
HID DOFO
5774
5775
FFlf 59ft
HZ1 OOFO
DW
OFFSET DISKETTE.IO
OW
CODE
fFZ3 39E7
5778
5779
DW
OFfSET RS232.IO
FF25 Doro
5780
OW
COOE
DW
DW
OffSET CASSETTE.IO
FFZ7 59F8
FF29 ooro
FF2:B 2EE8
FF20 OOFO
FFZf D2EF
FF31 OOFO
5781
5782
5783
; tNT 12H
i INTERRUPT 13H
i
INTERRUPT 14H
; INTERRUPT ISH
CODE
5784
5785
5786
5787
DW
DW
CODE
S7aa
5789
DW
DW
CODE
5790
A-78
INTERRUPT IlH
COOE
OFFSET KEYBDARD.IO
OFFSET PRINTER_IO
; INTERRUPT 16H
INTERRUPT 17H
LOC OBJ
FF33 0000
FF35 DOF6
LINE
SOURCE
5791
DW
ODaDaH
5792
DW
OfbOOH
DW
OfFSET BOOT_STRAP
DW
CODE
INTERRUPT 16H
ROM BASIC ENTRY POINT
5793
FF37 F2E6
5794
FF39 DOFO
579S
/
INTERRUPT 19H
5796
FI3S '6EfE
5797
DW
TIME_OF _DAY
FF~D
OOFO
5796
DW
CODE
FF3F 53fF
FF41 OOFO
5800
DW
OUNNY_RETURN
5801
DW
CODE
INTERRUPT lAH -- TIME OF DAY
5799
INTERRUPT IBH -- KEYBOARD BREAK AOOR
5802
FF43 53FF
5803
DW
DUMMY_RETURN
FF45 DOFO
5804
DW
CODE
INTERRUPT Ie -- TIMER BREAK ADOR
58(1S
FF47 A4FO
580b
DW
VIDEO_PARMS
Ff49 aOFO
5807
DW
CODE
5809
DW
OFFSET DISK_BASE
5610
DW
CODE
INTERRUPT 10 -- VIDEO PARAMETERS
5808
FF4B C7EF
FF40 aOFO
INTERRUPT IE -- DISK PARM5
5811
FF4F 00000000
INTERRUPT IF -- POINTER TO VIDEO EXT
DD
5812
5813
ff53
5814
FF53 CF
5815
5B16
DUMMY_RETURN:
IRET
; DUHHY RETlJ'RN FOR BREAK FROM KEYBOARD
,-- INT 5 -----------------------------------
SB17
THIS LOGIC WILL BE INVOKED BY INTERRUPT OSH TO PRINT
5816
THE SCREEN. THE CURSOR POSITION AT THE TIME THIS ROUTINE
5819
IS INVOKED WILL BE SAVED AND RESTORED UPON COMPLETION. THE
5820
ROUTH-IE IS INTENDED TO RUN WITH INTERRUPTS ENABLED.
5621
IF A SUBSEQUENT 'PRINT SCREEN KEY IS DEPRESSED DURING THE
5822
TIME THIS ROUTINE IS PRINTING IT WIll BE IGNORED.
5823
ADDRESS 50:0 CONTAINS THE STATUS OF THE PRINT SCREEN:
5824
582:5
50:0
EITHER PRINT SCREEN HAS NOT BEEN CALLED
OR UPON RETURN FROM A CALL THIS INDICATES
5826
A SUCCESSFUL OPERATION.
5827
5828
582:9
PRINT SCREEN IS IN PROGRESS
5830
5831
5832:
5633
=377
;
------------~---
ASSUME
ERROR ENCOUNTERED DURING PRINTING
----------------------------
CS:CODE,DS:XXDATA
5834
FF54
5835
PRINT_SCREEN
PRDe
FAR
,MUST RUN WITH INTERRUPTS ENASlED
FF54 F8
5636
ST!
FF55 IE
5837
PUSH
DS
FF56 50
5638
PUSH
AX
; MUST USE 50: 0 FOR DATA AREA STORAGE
FFS7 53
5839
PUSH
FFS851
5840
PUSH
ex
;WIlL USE THIS LATER FOR CURSOR lIMITS
FF59 52
5841
PUSH
DX
;WIlL HOLD CURRENT CURSOR POSITION
;HEX 50
8X
FF5A B85000
5642:
Mav
AX.XXDATA
FHO SEDS
5843
Mav
DS.AX
fF5F 803EOOOOOI
5844
eMP
STATUS_BYTE. 1
FF64 745f
H6t. C606000001
5845
JZ
EXIT
; JUHP IF PRINT ALREADY IN PROGRESS
5846
MDV
STATUS_BYTE. 1
;INDICATE PRINT NOW IN PROGRESS
FF68 B40F
5847
MaV
AH,I5
;WIlL REQUEST THE CURRENT SCREEN MODE
FF6D COlO
5646
INT
10H
;SEE IF PRINT ALREADY IN PROGRESS
{ Al1=HODE
5849
[AH J=NUHBER COLUMNS/LINE
5850
[BH]=VISUAl PAGE
5851
5853
AT THIS POINT WE KNOW THE COLUMNS/LINE ARE IN
{AX I AND THE PAGE IF APPLICABLE IS IN (Bli 1. THE STACK
5654
HAS DS,AX,BX,CX,DX PUSHED. [All HAS VIDEO HODE
5852
58550
5856
;************************************
FFbF BAce
5857
Mav
CL,AH
tWIll HAKE USE OF [eXI REGISTER TO
FF71 8519
5858
MDV
CH,25
;CONTROL ROW & COLUMNS
;CARRIAGE RETURN LINE FEED ROUTINE
FF73 E85500
5859
CALL
CRLF
ff76 51
FF77 8403
5860
PUSH
ex
;SAVE SCREEN BOUNDS
5861
Mav
AH,3
;WILL NOW READ THE CURSOR.
FF79 COli)
5862
INT
10H
;AND PRESERVE THE POSITION
FF7B 59
5863
POP
ex
;RECALL SCREEN BOUNDS
FF7C 52
5864
PUSH
DX
;RECALL IBHJ=VISUAL PAGE
FF7D 3302
5865
xaR
OX.DX
tWILl SET CURSOR POSITION TO [0,0]
A-79
LOC OBJ
LINE
5866
5867
SOURCE
;********************************************
THE lOOP FROM PRllO TO THE INSTRUCTION PRIOR TO PRUO
5868
IS THE LOOP TO READ EAtH CURSOR POSITION FROH THE SCREEN
5669
5870
AND PRINT.
;********************************************
PRIlO:
H7F B402:
5671
5672
FF83 8406
se73
MOV
INT
MOV
AH,2
FFS1 COlO
Has COlO
5874
INT
10H
;CHARACTER NOW IN (All
FFS7 OAtO
OR
JHZ
MOV
AL.AL
;SEE IF VALID CHAR
PRIIS
;JUMP IF VALID CHAR
Ff9S F6C425
5875
5876
5877
5878
5879
5880
S8et
5882
5883
5664
FF96 7521
5665
FF9A FEel
5866
5867
FF89 7502:
FF8B B020
FF6D
FF8D 52
FFeE 3302
FF90 32:E4
FF92 CD17
FF94 5A
FF9C 3ACA
;TO INDICATE CURSOR SET REQUEST
lOH
;NEW CURSOR POSITION ESTABLISHED
AH,8
;TO INDICATE READ CHARACTER
AL~
,
,MAKE A BLANK.
PR1l5:
PUSH
XOR
OX
OX,OX
;SAVE CURSOR POSITION
; INDICATE PRINTER 1
AH.AH
;TO INDICATE PRINT CHAR IN [AU
~NT
17H
;PRINT THE CHARACTER
pop
OX
jRECALL CURSOR POSITION
TEST
AH, 25H
ERRIO
; TEST FOR PRINTER ERROR
; JUMP IF ERROR DETECTED
XO.
JHZ
IHC
DL
jAOVANCE TO NEXT COLUMN
CMP
Cl,Dl
iSEE IF AT END OF LINE
5889
JHZ
XOR
PRIIO
Dl,DL
;IF NOT PROCEED
FFAO 3202
FFAZ BA!!2
5690
MOV
AH.Ol
;[AH]:::O
FFA4 52
5691
PUSH
ox
i5AVE NEW CURSOR POSITION
FFAS E82300
FF9E 750F
5888
j
BACK TO COLUMN 0
; LINE FEED CARRIAGE RETURN
5692
CALL
CRLF
FFAS SA
5693
IRECALl CURSOR POSITION
5894
OH
;ADVANCE TO NEXT LINE
FFA8 3AEE
"95
5696
POP
IHC
CMP
ox
FFA9 FEt6
FFAD 75DO
HAF SA
HBD 8402
5897
FFBl ColO
5899
5900
FFB9 EBOA
5901
FFBB SA
5902
ffBt 840Z
FFBE COlO
5903
5904
FfCD C606DOOOFf
5905
jFINISHED?
JHZ
PRIIO
j
POP
MOV
OX
AH.:!
JREtALL CURSOR POSITION
IHT
MOV
JMP
10H
,CURSOR POSITION RESTORED
STATUS_BYTE.O
;INDICATE FINISHED
SHORT EXIT
;EXIT THE ROUTINE
POP
MOV
ox
;GET CURSOR POSITION
AH.Z
;TO REQUEST CURSOR SET
10H
;CURSOR POSITION RESTORED
ERRZO:
IHT
MOV
EXIT:
POP
PRIZO:
5698
FFB4 C606000000
CH,DH
ERRI0:
IF NOT CONTINUE
;TO INDICATE CURSOR SET REQUEST
; INDICATE ERROR
STATUS_BYTE.OFFH
590&
fFC5 SA
5907
FFC6 59
5908
HC7 58
5909
fFC6 58
5910
fFC9 I f
5911
FFCA CF
591Z
IRET
5913
PRINT_SCREEN
POP
POP
POP
POP
ox
ex
;RESTORE ALL THE REGISTERS USED
"X
AX
DS
ENDP
5914
5915
; ------ CARRIAGE RETURN. LINE fEED SUBROUTINE
5916
fFCB
5917
ffCB 3302
5918
FFCD 32E4
5919
HCF BOOA
5920
FFOI CD17
5921
fF03 32E4
592Z
Ff05 BODO
5923
FF01 COl7
FF09 C3
PRoe
NEAR
XOR
XOR
OX.OX
;PRINTER 0
AH,AH
;WILL NOW SEND INITIAL LF ,eR TO PRINTER
MOV
INT
Al.IZQ
;LF
17H
;SEND THE LINE FEED
XOR
MOV
A.H.A.H
INOW FOR TltE CR
AL.15Q
oCR
5924
IHT
17H
JSEND THE CARRIAGE REruRN
5925
5926
CRLF
RET
ENDP
5927
CODE
ENDS
5928
5929
5930
fFFF
CRLf
;---------------------------------I POWER ON RESET VECTOR
5931
~----------------------------------
5932
VECTOR
SEGMENT AT OFFFFH
5933
5934
; ------ POWER ON RESET
5935
0000 EA580000FO
5936
JMP
RESET
DB
' 04/24181'
5937
0005 3Q34lF32342F38
5938
31
5939
5940
A-SO
VECTOR
ENDS
END
; RELEASE MARKER
Notes For The BIOS Listing
1. The wait loop for the printer times out on fonn
feed of > 51 lines. - line ref (3069)
2. Mode controls for the 320 x 200 video have
Color/BW reversed. - line ref (3338)
3. The RS232 Timeout is 80 decimal, not 80
hexadecimal. - line ref (1566)
4. The Base Pointer register is destroyed by some
video calls.
5. D_04 0 character in the character generator has
08 as it's last value, S/80. -line ref (5511)
6. If you hit print screen in the Color/Graphics
80x25 Character Mode, the screen may not
display during the print cycle.
A-Sl
NOTES
A-82
Appendix B. Assembly Instruction Set
Reference
B-1
8088
REGISTER MODEL
AX:
AH
AL
ACCUMULATO R
BX:
BH
BL
BASE
CX:
OX:
CH
CL
COUNT
DL
DATA
DH
SP
BP
I
I
I
-'~
«W
~I
STACK POINTER
W~
I
r---------------------~
SI
01
W
-'
LL.
r---------------------~
Z(!:J
BASE POINTER
SOURCE INDEX
WW
(!:J~
~==================~
0 ESTI NATION INDEX
IP
t - - - - - - - - - . - - - - - - - - - l l l NSTR UCTI 0 N POINTE R
FLAGSH
FLAGSL
. STATUS FLAGS
~========~=======~==~
CS
CODE SEGMENT
OS
DATA SEGMENT
I-
:=====================:
STACK SEGMENT
EXTRA SEGMENT
~~
t
SS
ES
~----------------
~
}
~~
~~
Instructions which reference the flag register file as a 16-bit object
use the symbol F LAGS to represent the file:
15
7
'X , X , X , X , OF , OF 'IF' TF , SF ZF
0
I I X I AF I X I PF I X I CF I
X = Don't Care
B-2
AF:
CF:
PF:
SF:
ZF:
AUXILIARY CARRY - BCD}
CARRY FLAG
PARITY FLAG
SIGN FLAG
ZERO FLAG
8080 FLAGS
OF:
IF:
OF:
TF:
DIRECTION FLAG (STRINGS)}
INTERRUPT ENABLE FLAG
OVERFLOW FLAG (CF EB SF)
TRAP - SINGLE STEP FLAG
8088 FLAGS
~
OPERAND SUMMARY
"reg" field Bit Assignments:
16-Bit (w=ll
8-Bit (w=O)
Segment
000 AX
001 CX
010 DX
011 BX
100 SP
101 BP
110 SI
111 DI
000 AL
001 CL
010 DL
011 BL
100 AH
101 CH
110 DH
111 BH
00 ES
01 CS
10 SS
11 DS
SECOND INSTRUCTION BYTE SUMMARY
Imod Ixxx Irim I
mod
Displacement
00
01
10
11
DISP = 0*, disp-Iow and disp-high are absent
DISP = disp-Iow sign-extended to 16-bits, disp-high is absent
DISP = disp-high: disp-Iow
rim is treated as a "reg" field
rim
Operand Address
000
001
010
011
100
101
110
111
(BX) + (SI) + DlSP
(BX) + (01) + DISP
(BP) + (SI) + DISP
(BP) + (01)+ DlSP
(SI) + DlSP
(DI) + DISP
(BP) + DISP*
(BX)+DISP
DlSP follows 2nd byte of instruction (before data if required).
*except if mod = 00 and rim = 110 then EA = disp-high: disp-Iow.
B-3
MEMORY SEGMENTATION MODEL
o
:t FFFFFH
r
LOGICAL
MEMORY SPACE
~
CODE SEGMENT
64KB
}
~
XXXXOH
~
}
STACK SEGMENT
}
DATA SEGMENT
}
EXTRA DATA
SEGMENT
DISPlA1EMENT
15
OFFSET
ADO RES S
I
0
DISPLACEMENT
r--~
I
I
I
15
SELECTED
SEGMENT
REGISTER
I
I
MSB
I
0
WORD {
I
LSB
BYTE
0000 f0000
0000
0000
CS
SS
DS
ES
--I
J
CS, SS, DS, ES
OR NONE
FOR I/O, INT
I
I
I
19
7
I
\j
I
I
,
•
ADDER
I
I
I
I
'7
t
1:
0
OOOOOH
PHYSICAL
ADD RESS
LATCH
SEGMENT OVERRIDE PREFIX
I0
0 1 reg 1 1 0
I
USE OF SEGMENT OVERRIDE
OPERAND REGISTER
I P (code address)
SP (stack address)
BP (stack address or stack marked
SI or 0 I (not incl. strings)
SI (implicit source addr for strings)
01 (implicit dest addr for strings)
B-4
DEFAULT
CS
SS
SS
OS
OS
ES
WITH OVERRIDE PREFIX
Never
Never
BP + OS or ES, or CS
ES, SS, or CS
ES, SS, or CS
Never
DATA TRANSFER
MOV = Move
Register/memory to/ from register
11 0 0 0 1 0 d w
I mod
reg
rIm
Immediate to register/memory
1 1 0 0 0 1 1 w
mod 0 0 0 rIm
data
data
data if w=l
addr-Iow
addr-high
addr-Iow
addr-high
data if w=l
Immediate to register
1 0 1 1 w reg
Memory to accumulator
1 0 1 0 0 0 0 w
Accumulator to memory
1 0 1 0 0 0 1 w
Register/memory to segment register
1 0 0 0 1 1 1 0
I mod
0 reg
rIm
mod 0 reg
rIm
Segment register to register/memory
1 0 0 0 1 1 0 0
PUSH = Push
Register/memory
1 1 1 1 1 1 1 1
mod
1 1 0 rIm
Register
0 1 0 1 0 reg
Segment register
I0
0 0 reg
1 0
POP = Pop
Register/memory
1 0 0 0 1 1 1 1
mod 0 0 0 rIm
Register
1
0 1 0 1 1 reg
Segment register
1
0 0 0 reg
1 1
B-5
XCHG = Exchange
Register/memory with register
11 0 0 0 0 1 1 w
I mod
reg
rim
I mod
reg
rim
mod
reg
r/m
mod reg
rim
Register with accumulator
11 0 0 1 0 reg
I
IN =Input to AL/AX from
Fixed port
11
1 1 0 0 lOw
port
Variable port (OX)
11110110w
OUT = Output from AL/AX to
Fixed port
11 1 1 0 0 1 1 w
port
Variable port (OX)
11110111W
XLAT = Translate byte to AL
1110101111
LEA = Load EA to register
1 0 0 0 1 1 0 1
LDS = Load pointer to DS
11 1 0 0 0 1 0 1
LES = Load pointer to ES
11
1 0 0 0 1 0 0
LAHF
Load AH with flags
=
1100111111
SAHF = Store AH into flags
1100111101
PUSHF
=
Push flags
110011100
POPF
=
Pop flags
110011101
B-6
ARITHMETIC
ADD = Add
Reg./memory with register to either
1 0 0 0 0 0 0 d w \ mod reg
r/m
I
Immediate to register/memory
11 0 0 0 0 0 s w
mod 0 0 0 rim
data
data
data if w=l
data if s:w=Ol \
Immediate to accumulator
I0
0 0 0 0 lOw
ADC = Add with carry
Reg./memory with register to either
10 0 0 1 0 0 d w
I mod
reg
rim
Immediate to register/memory
\1 0 0 0 0 0 s w
mod 0 1 0 rim
data
data
data if w=l
Immediate to accumulator
I0001010w
data if s:w=Oll
I
INC = Increment
Register /memory
mod 0 0 0 rIm
11111111w
Register
1 0 1 0 0 0 reg
I
AAA = ASCII adjust for add
100110111\
DAA = Decimal adjust for add
1001001111
SU B = Subtract
Reg./memory and register to either
I0
0 1 0 1 0 d w
I mod
reg
rim
Immediate from register/memory
11 0 0 0 0 0 s w
I mod
1 0 1 rIm
data
data if s:w=Ol \
Immediate from accumulator
0010110w
data
data if w=l
B-7
SBB = Subtract with borrow
Reg.!memory and register to either
I0
0 0 1 1 0 d w
I mod
reg
rim
Immediate from register/memory
11 0 0 0 0 0 s w
I mod
0 1 1 rim
data
data if s:w=01
Immediate from accumulator
data
10001110w
data if w=1
DEC = Decrement
Register/memory
11111111w
Registei"
1 0 1 0 0 1 reg
mod 0 0
rim
I
NEG = Change sign
1 1 111011w
mod 0 1 1 rim
CMP'" Compare
Register/memory and register
10 0 1 1 1 0 d w
I mod
reg
rim
Immediate with register/memory
11 0 0 0 0 0 s w 1 mod
1 1 1 rim
data
Immediate with accumulator
I0
0 1 1 1 lOw
I data
data if w=1
AAS = ASCII adjust for subtract
1001111111
DAS = Decimal adjust for subtract
1001011111
MUL = Multiply (unsigned)
11
1 1 1 0 1 1 w 1 mod
1 0 0 rim
IMUL = Integer multiply (signed)
11 1 1 1 0 1 1 w 1 mod
B-8
1 0 1
rim
data if s:w=Ol
AAM = ASCII adjust for multiply
\1 1 0 1 0 1 0 0 10 0 0 0 1 0 1 0
DIY = Divide (unsigned)
mod
11111011w
IDlY = Integer divide (signed)
11 1 1 1 0 1 1 w 1 mod
o
rIm
rIm
AAD =ASCII adjust for divide
111010101100001010
CBW = Convert byte to word
11 00110001
CWO = Convert word to double word
1100110011
lOGIC
NOT =Invert
11111011W
mod 0 1 0 rim
SHl/SAl =Shift logical/arithmetic left
11 1 0 1 0 0 v w 1 mod 1 0 0 rIm
SHR = Shift logical right
1 1 10100vW
mod 1 0 1 r/m
SAR = Shift arithmetic right
11 1 0 1 0 0 v w 1 mod 1 1 1 rIm
ROl = Rotate left
1110100vw
mod 0 0 0 rim
ROR = Rotate right
1 11 0100vw
mod 0 0 1 rim
RCl = Rotate through carry left
11 1 0 1 0 0 v w 1 mod 0 1 0 rim
RCR = Rotate through carry right
11 1 0 1 0 0 v w
mod 0 1 1 rim
B-9
AND = And
Reg./memory and register to either
\ 0 0 1 0 0 0 d w \ mod reg
rim
Immediate to register/memory
11 0 0 0 0 0 0 w
1
mod
1
data
1 0 0 rim
data
Immediate to accumulator
I
0 0 1 0 0 1 0 w
data if w=l
data if w=l
I
TEST = And function to flags, no result
Register/memory and register
\1 0 0 0 0 1 0 w \ mod reg
rim
Immediate data and register/memory
11
1 1 1 0 1 1 w
I
mod 0 0 0 rim
data
data if w=1
Immediate data and accumulator
11 0 1 0 1 0 '-O-w-.--d-a-ta------.----d-a-ta-i-f-w-=1-'
OR = Or
Reg./memory and register to either
I0
0 0 0 1 0 d w \ mod reg
rim
Immediate to register/memory
\1 0 0 0 0 0 0 w I mod 0 0 1 rim
data
data if w=1
Immediate to accumulator
I0000110w
data
data if w=1
XOR = Exclusive or
Reg./memory and register to either
1 0 0 1 1 0 0 d w 1 mod
reg
rim
Immediate to register/memory
\1 0 0 0 0 0 0 w I mod
1 1 0 rim
data
Immediate to accumulator
\001
B-lO
1 0 1 0 w
data
data if w=1
data if w=1
STRING MANIPULATION
REP
=Repeat
111 1 1001 z 1
MOVS = Move String
11010010w
CMPS = Compare String
11 0 1 0011w
SCAS =Scan String
/1010111w
LOOS = Load String
11010110w
STOS = Store String
11010101W
CONTROL TRANSFER
CALL = Call
Direct within segment
11 1 1 0 1 0 0 0
disp-Iow
disp-high
Indirect within segment
11
1 1 1 1 1 1
mod 0 1 0 rIm
Direct intersegment
11 0 0 1 1 0 1 0
offset-low
offset-high
seg-Iow
seg-high
Indirect intersegment
11
1 1 1 1 1 1
JMP = Unconditional Jump
Direct within segment
11
1 1 0 1 0 0 1
Direct within segment-short
11 1 1 0 1 0 1 1
mod 0 1 1 rIm
I disp-Iow
disp-high
I disp
B-ll
Indirect within segment
mod
11111111
1 0 0 rim
Direct intersegment
111101010
offset-low
offset-high
seg-Iow
seg-high
Indirect intersegment
mod
11111111
1 0 1 rim
RET = Return from CALL
Within segment
111000011\
Within seg. adding immed to SP
11
1 0 0 0 0 1 0 1 data-low
data-high
Intersegment
1110 0 1 0 1 1
Intersegment, adding immediate to SP
11 1 0 0 1 0 1 0
I data-low
JE/JZ =Jump on equal/zero
I0
1 1 1 0 1 0 0
I disp
JL/JNGE = Jump on less/not greater or equal
I0
1 1 1 1 1 0 0
I disp I
JLE/JNG = Jump on less or equal/not greater
I0
1 1 1 1 1 1 0
I disp I
JB/JNAE = Jump on below/not above or equal
I0
1 1 1 0 0 1 0
I disp I
JBE/JNA = Jump on below or equal/not above
I0
1 1 1 0 1 1 0
I disp I
JP/JPE = Jump on parity/parity even
10 1 1 1 1 0 1 0
I
disp
JO = Jump on overflow
I0
1 1 1 0 0 0 0
B-12
disp
I
data-high
JS = Jump on sign
10 1 1 1 1 0 0 0
disp
JNE/JNZ = Jump on not equal/not zero
1 0 1 1 1 0 1 0 1 1 disp
JNl/JGE
I0
I
=Jump on not less/greater or equal
1 1 1 1 1 0 1
I disp 1
JNLE/JG = Jump on not less or equal/greater
I0
1 1 1 1 1 1 1
I disp I
JNB/JAE = Jump on not below/above or equal
I0
1 1 1 0 0 1 1
I disp I
JNBE/JA = Jump on not below or equal/above
I0
1 1 1 0 1 1 1
JNP/JPO
I disp I
= Jump on not parity/parity odd
1 0 1 1 1 1 0 1 1 1 disp
JNO
I0
=
Jump on not overflow
1 1 1 0 0 0 1
disp
I
disp
I
JNS = Jump on not sign
I0
I
1 1 1 1 0 0 1
LOOP = Loop
ex times
11 1 1 0 0 0 1 0
disp 1
LOOPZ/LOOPE = Loop while zero/equal
11 1 1 0 0 0 0 1 1 disp
I
LOOPNZ/LOOPNE = Loop while not zero/not equal
11 1 1 0 0 0 0 0
JCXZ = Jump on
I disp I
ex zero
11 1 1 0 0 0 1 1
disp
B-13
8088 CONDITIONAL TRANSFER OPERATIONS
Instruction
Condition
Interpretation
JE or JZ
Jl or JNGE
JLE or JNG
ZF = 1
(SF xor OF) = 1
((SP xor OF) or
ZF) = 1
CF = 1
(CForZF)= 1
PF = 1
OF = 1
SF = 1
ZF =0
(SF xor OF) = 0
((SF xor OF) or
ZF) = 0
CF =0
(CForZF)=O
PF = 0
OF =0
SF = 0
"equal" or "zero"
"less" or "not greater or equal"
"less or equal" or "not greater"
JB or JNAE
JBE or JNA
JP or JPE
JO
JS
JNE or JNZ
JNl or JGE
JNlE or JG
JNB or JAE
JNBE or JA
JNP or JPO
JNO
JNS
"below" or "not above or equal"
"below or equal" or "not above"
"parity" or "parity even"
"overflow"
"sign"
"not equal" or "not zero"
"not less" or "greater or equal"
"not less or equal" or "greater"
"not below" or "above or equal"
"not below or equal" or "above"
"not parity" or "parity odd"
"not overflow"
"not sign"
*"Above" and "below" refer to the relation between two unsigned
values, while "greater" and "less" refer to the relation between
two signed values.
INT = Interrupt
Type specified
11 1 0 0 1 1 0 1
type
I
Type 3
11 1 0 0 1 1 0 1
INTO = Interrupt on overflow
\110011101
IRET = Interrupt return
11 1 001 1 1 1
PROCESSOR CONTROL
ClC = Clear carry
11111110001
CMC = Complement carry
1111101011
B-14
STC = Set carry
11111100
NOP = No operation
1100100001
CLD = Clear direction
1111111001
CLI
=
Clear interrupt
1111110101
HLT= Halt
1111101001
LOCK = Bus lock prefix
1111100001
STD = Set direction
1 11 1 1 1 1 0
STI = Set interrupt
111111011
WAIT = Wait
110011011
ESC = Escape (to external device)
11 1 0 1 1 x x x
mod x x x rim
I
Footnotes:
if d = 1 then "to"; if d = 0 then "from"
if w = 1 then word instruction; if w = 0 then byte instruction
if s:w = 01 then 16 bits of immediate data from the operand
if s:w = 11 then an immediate data byte is sign extended to form the
16-bit operand
if v = 0 then "count" = 1; if v = 1 then "count" in (C U
x = don't care
z is used for some string primitives to compare with ZF FLAG
AL = 8-bit accumulator
AX = 16-bit accumulator
CX = Count register
DS = Data segment
DX = Variable port register
ES = Extra segment
Above/below refers to unsigned value
Greater = more positive;
Less = less positive (more negative) signed values
B-15
8088 INSTRUCTION SET MATRIX
LO
1
0
HI
2
3
4
5
6
7
ADD
ADD
b,t,r/m
w,t,r/m
ADD
b.ia
Add
w.ia
PUSH
ES
PDP
ES
ADC
b.i
ADC
w.i
PUSH
SS
PDP
SS
AND
b.i
AND
w.i
SEG
DAA
XOR
b.i
XOR
w.i
SEG
w,t,r/m
INC
OX
INC
BX
INC
SP
INC
BP
INC
SI
INC
DI
PUSH
OX
PUSH
BX
PUSH
SP
PUSH
BP
PUSH
51
PUSH
DI
JBI
JNBI
JAE
JEI
JZ
JNEI
JNZ
JBEI
JNA
JNBEI
JA
0
ADD
b.f.r/m
ADD
w.f.r/m
1
ADC
b.f.r/m
ADC
w.f.r/m
ADC
ADC
b,t,r/m
w,t,r/m
AND
b.f.r/m
AND
w.f.r/m
AND
AND
b,t,r/m
w,t,r/m
XDR
b.f.r/m
XDR
XOR
XOR
w,/,r/m
b,t,r/m
4
INC
AX
INC
CX
5
PUSH
AX
PUSH
CX
JO
JNO
2
3
~ES
AAA
~SS
6
7
JNAE
8
9
A
B
Immed
Immed
Immed
Immed
TEST
TEST
XCHG
XCHG
b.r/m
w.r/m
b.r/m
is.r/m
b.r/m
w.r/m
b.r/m
w.r/m
NOP
XCHG
CX
XCHG
DX
XCHG
BX
XCHG
5P
XCHG
BP
XCHG
51
XCHG
01
MOV
MOV
m~AL
m~AX
MOV
AL-+m
MOV
AX"m
MOVS
b
MOVS
w
CMPS
b
CMPS
w
MOV
MOV
i+CL
MOV
i-+DL
MOV
i~Bl
MOV
i+AH
MOV
i+CH
MOV
i .. DH
MOV
i .. BH
RET.
(j+SP)
RET
LES
LDS
MOV
b.i.r/m
MOV
w.i.r/m
i~AL
C
D
Shift
b
Shift
w
Shift
b.v
Shift
w.v
AAM
AAD
E
LOOPNZI
LOOPNE
LOOPZI
LOOPE
LOOP
JCXZ
IN
b
IN
w
F
LOCK
REP
REP
Z
HLT
CMC
b = byte operation
d = direct
f ~ from CPU reg
i = immediate
ia = immed. to accum.
id = indirect
is = immed. byte, sign ext.
I = long ie. intersegment
B-16
XLAT
OUT
b
OUT
w
Grp 1
Grp 1
b.r/m
w.r/m
m ~ memory
rim = EA is second byte
si = short intrasegment
sr = segment register
t = to CPU reg
v = variable
w = word operation
z = zero
BOBBINSTRUCTION SET MATRIX
LO
E
F
9
A
B
C
0
0
OR
b.f.r/m
OR
OR
OR
w.f.r/m
b,t,r/m
w,t,r/m
OR
b.i
OR
w.i
PUSH
CS
1
SBB
bJ.r/m
SBB
w.f.r/m
SBB
SBB
b,t.r/m
w,t,r/m
SBB
b.i
SBB
w.i
PUSH
OS
POP
OS
SUB
b.l.r/m
SUB
b,t,r/m
SUB
SUB
b.i
SUB
w.i
SEG
CS
OAS
w.f.r/m
CMP
b.l.r/m
CMP
b,t,r/m
w,t,r/m
CMP
b.i
CMP
w.i
SEG
OS
AAS
w.l.r/m
4
DEC
AX
DEC
CX
DEC
OX
DEC
BX
DEC
SP
DEC
BP
DEC
SI
DEC
01
5
POP
AX
POP
CX
POP
OX
POP
BX
POP
SP
POP
BP
POP
SI
POP
01
JS
JNS
JPI
JNPI
JPO
JLI
JNGE
IN LI
JLEI
JNG
JNLEI
JG
LEA
MOV
sr.f.r/m
POP
rim
8
HI
2
3
SUB
CMP
w,t,r/m
CMP
6
7
JPE
JGE
MOV
b.l.r/m
MOV
MOV
MOV
MOV
w.l.r/m
b,t.r/m
w,t,r/m
sr.t.r/m
9
CBW
CWO
CALL
I.d
WAIT
PUSHF
POPF
SAHF
LAHF
A
TEST
b.i
TEST
w.i
STOS
b
STOS
LOOS
b
LODS
SCAS
b
SeAS
w
MOV
i ... AX
MOV
MOV
MOV
MOV
i~CX
i~OX
MOV
i",BX
i~SP
i... BP
MOV
i... SI
MOV
i... DI
RET
1,(j+SP)
RET
I
INT
Type 3
INT
(Any)
INTO
IRET
ESC
ESC
8
B
C
w
w
ESC
0
ESC
1
2
ESC
3
ESC
4
5
ESC
6
ESC
7
E
CALL
d
JMP
d
JMP
I.d
JMP
si.d
IN
v.b
IN
v.W
OUT
v.b
OUT
v.w
F
CLC
STC
CLI
STI
CLD
STO
Grp 2
b.r/m
Grp 2
w.r/m
0
where
modO rim
000
001
010
011
100
101
100
Immed
ADD
OR
ADC
SBB
AND
SUB
XOR
Shilt
ROL
ROR
RCL
RCR
SHLISAL
SHR
Grp 1
TEST
NOT
NEG
MUL
IMUL
DIV
Grp 2
INC
CALL
id
CALL
I,id
JMP
id
JMP
I,id
PUSH
DEC
III
CMP
SAR
IDIV
B-17
INSTRUCTION SET INDEX
Mnemonic
AAA
AAD
AAM
AAS
ADC
ADD
AND
CAll
CBW
ClC
CLD
CLI
CMC
CMP
CMPS
CWD
DAA
DAS
DEC
DIV
ESC
HLT
IDIV
IMUL
IN
INC
INT
INTO
IRET
JA
JAE
JB
JBE
JCXZ
JE
B-18
Page
Mnemonic
6
8
8
7
6
6
9
10
8
13
14
14
13
7
10
8
6
7
7
8
14
14
8
7
5
6
13
13
13
12
12
11
11
12
11
JG
JGE
Jl
JlE
JMP
JNA
JNAE
JNB
JNBE
JNE
JNG
JNGE
JNL
JNLE
JNO
JNP
JNS
JNZ
JO
JP
JPE
JPO
JS
JZ
LAHF
LDS
LEA
LES
LOCK
LODS
LOOP
LOOPE
LOOPNE
LOOPNZ
LOOPZ
Page
Mnemonic
12
12
11
11
10
11
11
12
12
12
11
11
12
12
12
12
12
12
11
11
11
12
12
11
5
5
5
5
14
10
12
12
12
12
12
MOV
MOVS
MUl
NEG
NOP
NOT
OR
OUT
POP
POPF
PUSH
PUSHF
RCL
RCR
REP
RET
ROL
ROR
SAHF
SAL
SAR
SBB
SCAS
SHl
SHR
STC
S10
STI
STOS
SUB
TEST
WAIT
XCHG
XLAT
XOR
Page
4
10
7
7
13
8
9
5
4
5
4
5
8
8
10
11
8
8
5
8
8
7
10
8
8
13
14
14
10
6
9
14
5
5
9
Appendix C. Of Characters Keystrokes
and Color
08
8
BLACK
DARK
GREY
NON-DISPLAY
09
9
BLACK
LIGHT
BLUE
HIGH INTENSITY
UNDERLINE
BLACK
LIGHT
GREEN
HIGH INTENSITY
CTRL K
BLACK
LIGHT
GREEN
HIGH INTENSITY
CTRL L.
BLACK
LIGHT
REO
HIGH INTENSITY
BLACK
LIGHT
MAGENTA
HIGH INTENSITY
BLUE
LIGHT
GREY
DB
11
d
DC
12
~
00
13
)
17
23
1
CTRL M•
.J SHIFT
CTRLW
..J
NORMAL
C-I
AS TEXT ATTRIBUTES
COLOR/GRAPHICS
MONITOR AOAPTER
VALUE
AS CHARACTERS
HEX DEC
SYMBOL KEYSTROKES MODES
18
24
19
BACKGROUND
FOREGROUND
IBM
MONOCHROME
OISPLAY
ADAPTER
I
CTRL X
BLUE
DARK
GREY
HIGH INTENSITY
25
I
CTRl Y
BLUE
LIGHT
BLUE
HIGH INTENSITY
UNDERLINE
lA
26
-
CTRL Z
BLUE
LIGHT
GREEN
HIGH INTENSITY
lB
27
-
CTRL L
ESC, SHIFT
ESC, CTRL
ESC
BLUE
LIGHT
CYAN
HIGH INTENSITY
IC
28
CTRL '\
BLUE
LIGHT
REO
HIGH INTENSITY
10
29
1
BLUE
LIGHT
MAGENTA
HIGH INTENSITY
IE
30
...
CTRl6
BLUE
YELLOW
HIGH INTENSITY
IF
31
T
CTRL -
BLUE
WHITE
HIGH INTENSITY
20
32
21
33
22
34
"
23
35
#
:#
24
36
$
25
37
26
38
27
39
28
40
(
(
29
41
)
2A
42
2B
43
2C
44
20
45
2E
46
C-2
L
-
BLANK
(SPACE
CTRL
GREEN
SPACE BAR,
SHIFT SPACE,
CTRL SPACE,
ALT SPACE
"
BLACK
NORMAL
,
!
SHIFT
GREEN
~LUE
UNDERLINE
"
SHIFT
GREEN
GREEN
NORMAL
SHIFT
GREEN
CYAN
•
NORMAL
$
SHIFT
GREEN
RED
NORMAL
%
%
SHIFT
GREEN
MAGENTA
NORMAL
&
&
SHIFT
GREEN
BROWN
NORMAL
GREEN
LIGHT.
GREY ~
NORMAL
SHIFT
GREEN
OARK
GREY
HIGH INTENSITY
)
SHIFT
GREEN
LIGHT
BLUE
HIGH INTENSITY
UNOERLINE
*
*
NOTE 1
GREEN
LIGHT
GREEN
HIGH INTENSITY
+
+
SHIFT
GREEN
!
-
NOTE 2
LIGHT CYAN
HIGH INTENSITY
GREEN
LIGHT
RED
HIGH INTENSITY
GREEN
LIGHT
MAGENTA
HIGH INTENSITY
GREEN
YELLOW
HIGH INTENSITY
AS TEXT ATTRIBUTES
AS CHARACTERS
VALUE
HEX DEC
COLOR/G RAPHICS
MONITOR AOAPTER
SYMBOL IKEYSI
HUI\t:)
MODES
2F
47
/
/
30
48
0
0
INOTE 3
31
49
1
1
NOTE 3
32
50
2
2
NOTE 3
3
33
34
35
NI
3
NI
3
McKG~QUN~
FOREGROUND
IBM
MONOCHROME
OISPLAY
ADAPTER
GREEN
WHITE
IHIGH
CYAN
BLACK
NOR
E
CYAN
INTENSITY
UNDERLINE
GREEN
NORMAL
NO
RED
5
NOTE 3
CY,
l
ENTA
36
54
6
6
NOTE 3
CYAN
BROWN
37
55
7
7
NOTE 3
CYAN
LIGHT
GREY
38
56
8
8
NOTE 3
CYAN
DARK
GREY
HIGH INTENSITY
39
57
9
9
NOTE 3
CYAN
LIGHT
BLUE
HIGH INTENSITY
UNDERLINE
3A
58
:
:
SHIFT
CYAN
LIGHT
GREEN
HIGH INTENSITY
3B
59
;
;
CYAN
LIGHT
CYAN
HIGH INTENSITY
3C
60
<
<
CYAN
LIGHT
RED
HIGH INTENSITY
3D
61
CYAN
LIGHT
MAGENTA
HIGH INTENSITY
3E
62
llOW
~
>
SHIFT
~
>
SHIFT
CYAN
IMAl
NORMAL
~
Ii
ITY
HIGH I
3F
63
?
?
SHIFT
CYAN
WHITE
HIGH INTENSITY
40
64
@
@
SHIFT
RED
BLACK
Al
41
65
A
A
NOTE 4
42
66
B
B
NOTE 4
RED
GREEN
IRMAl
43
67
C
C
NOTE 4
R
CYAN
44
68
0
0
NOTE 4
45
69
E
E
4
REO
MAG
46
70
F
F
NOTE 4
RED
BROWN
NORMAL
RED
LIGHT
GREY
NORMAL
l
R
TA
RMAl
47
71
G
G
NOTE 4
48
72
H
H
NOTE 4
RED
DARK
GREY
HIGH INTENSITY
49
73
I
I
NOTE 4
RED
LIGHT
BLUE
HIGH INTENSITY
UNDERLINE
4A
74
J
J
NOTE 4
REO
LIGHT
GREEN
HIGH INTENSITY
~
~
C-3
AS TEXT ATTRIBUTES
AS CHARACTERS
VALUE
HEX OEC
COLOR/GRAPHICS
MONITOR AOAPTER
SYMBOL
KEYSTROKES MODES
BACKGROUND
FOREGROUND
IBM
MONOCHROME
OISPLAY
ADAPTER
48
75
K
K
NOTE 4
RED
LIGHT
CYAN
HIGH INTENSITY
4C
76
L
L
NOTE 4
RED
LIGHT
RED
HIGH INTENSITY
40
77
M
M
NOTE 4
RED
LIGHT
MAGENTA
HIGH
4E
78
N
N
NOTE 4
RED
YELLOW
HIGH INTENSITY
4F
79
0
0
NOTE 4
RED
WHITE
HIGH INTENSITY
BLACK
NORMAL
INTE~SITY
50
80
P
P
NOTE 4
MAGENTA
51
81
Q
Q
NOTE 4
MAGENTA
BLUE
UNDERLINE
52
82
R
R
NOTE 4
MAGENTA
GREEN
NORMAL
53
83
S
S
NOTE 4
MAGENTA
CYAN
NORMAL
54
84
T
T
NOTE 4
MAGENTA
RED
NORMAL
55
85
U
U
NOTE 4
MAGENTA
MAGENTA
NORMAL
56
86
V
V
NOTE 4
MAGENTA
BROWN
NORMAL
57
87
W
W
NOTE 4
MAGENTA
LIGHT
GREY
NORMAL
58
88
X
X
NOTE 4
MAGENTA
DARK
GREY
HIGH INTENSITY
59
89
Y
Y
NOTE 4
MAGENTA
LIGHT
BLUE
HIGH INTENSITY
UNDERLINE
5A
90
Z
Z
NOTE 4
MAGENTA
LIGHT
GREEN
HIGH INTENSITY
5B
91
[
[
MAGENTA
LIGHT
CYAN
HIGH INTENSITY
5C
92
\
\
MAGENTA
LIGHT
RED
HIGH INTENSITY
50
93
I
I
MAGENTA
LIGHT
MAGENTA
HIGH INTENSITY
5E
94
/\
/\
SHIFT
MAGENTA
YELLOW
HIGH INTENSITY
5F
95
-
SHIFT
MAGENTA
WHITE
HIGH INTENSITY
60
96
YELLOW
BLACK
NORMAL
~
61
97
a
a
NOTE 5
YELLOW
BLUE
UNDERLINE
62
98
b
b
NOTE 5
YELLOW
GREEN
NORMAL
63
99
c
c
NOTE 5
YELLOW
CYAN
NORMAL
64
100
d
d
NOTE 5
YELLOW
RED
NORMAL
65
101
e
e
NOTE 5
YELLOW
MAGENTA
NORMAL
66
102
f
f
NOTE 5
YELLOW
BROWN
NORMAL
C-4
I
AS TEXT ATTRIBUTES
HEX DEC
67
103
104
68
COLOR/GRAPHICS
MONITOR ADAPTER
AS CHARACTERS
VALUE
SYMBOL
g
h
KEYSTROKES MODES
g
h
NOTE 5
NOTE 5
BACKGROUND
YELLOW
YELLOW
FOREGROUND
LIGHT
GREY
IBM
MONOCHROME
DISPLAY
ADAPTER
I
I
OARK
GREY
HIGH INTENSITY
I
I
105
i
i
NOTE 5
YELLOW
LIGHT
BLUE
HIGH INTENSITY
UNDERLINE
6A
106
j
j
NOTE 5
YELLOW
LIGHT
GREEN
HIGH INTENSITY
107
I
I
NORMAL
69
6B
I
I
I
I
I
k
k
NOTE 5
YELLOW
LIGHT
CYAN
HIGH INTENSITY
NOTE 5
YELLOW
LIGHT
RED
HIGH INTENSITY
I
I
I
6C
108
I
I
60
109
m
m
NOTE 5
YELLOW
LIGHT
MAGENTA
HIGH INTENSITY
6E
110
n
n
NOTE 5
YELLOW
YELLOW
HIGH INTENSITY
6F
111
0
a
NOTE 5
YELLOW
WHITE
HIGH INTENSITY
70
112
p
p
NOTE 5
WHITE
BLACK
REVERSE VIDEO
71
113
q
q
NOTE 5
WHITE
BLUE
UNDERLINE
72
114
r
r
NOTE 5
WHITE
GREEN
NORMAL
73
115
s
s
NOTE 5
WHITE
CYAN
NORMAL
74
116
t
t
NOTE 5
WHITE
RED
NORMAL
75
117
u
u
NOTE 5
WHITE
MAGENTA
NORMAL
I
76
118
v
v
NOTE 5
WHITE
BROWN
NORMAL
I
77
119
w
w
NOTE 5
WHITE
LIGHT
GREY
NORMAL
78
120
x
x
NOTE 5
DARK
GREY
REVERSE VIDEO
79
121
Y
Y
WHITE
LIGHT
BLUE
HIGH INTENSITY
UNDERLINE
z
z
WHITE
LIGHT
GREEN
HIGH INTENSITY
LIGHT
CYAN
HIGH INTENSITY
I'"
~I
~I
t=
t=1
--
I
I
I
I
I
'A
B
:
122
123
I
124
I
I
125
I
I
I
I
NOTE 5
NOTE 5
SHIFT
WHITE
WHITE
126
"-'
"-'
127
b.
CTRL-
I
I
I
I
I
I
LIGHT
RED
HIGH INTENSITY
SHIFT
WHITE
LIGHT
MAGENTA
HIGH INTENSITY
WHITE
YELLOW
HIGH INTENSITY
WHITE
WHITE
HIGH INTENSITY
-------
I
I
WHITE
SHIFT
I
I
SHIFT
I
I
I
I
I
I
I
C-S
I
AS TEXT ATTRIBUTES
AS CHARACTERS
VALUE
HEX DEC
* * *
80
128
COLOR/GRAPHICS
MONITOR ADAPTER
SYMBOL
KEYSTROKES MODES
BACKGROUND
FOREGROUND
IBM
MONOCHROME
OISPLAY
ADAPTER
80 HEX - FF HEX ARE FLASHING IN BOTH COLOR & IBM MONOCHROME * * * *
ALT 128
NOTE 6
BLACK
BLACK
NON-DISPLAY
C[
81
129
'u
ALT 129
NOTE 6
BLACK
BLUE
UNDERLINE
82
130
-i
AL T 130
NOTE 6
BLACK
GREEN
NORMAL
83
131
~
ALT 131
NOTE 6
BLACK
CYAN
NORMAL
84
132
ii
ALT 132
NOTE 6
BLACK
RED
NORMAL
85
133
~
AL T 133
NOTE 6
BLACK
MAGENTA
NORMAL
it
ALT 134
NOTE 6
BLACK
BROWN
NORMAL
AL T 135
NOTE 6
BLACK
LIGHT
GREY
NORMAL
86
134
87
135
88
136
~
ALT 136
NOTE 6
BLACK
DARK
GREY
NON-DISPLAY
89
137
e'
AL T 137
NOTE 6
BLACK
LIGHT
BLUE
HIGH INTENSITY
UNDERLINED
8A
138
~
AL T 138
NOTE 6
BLACK
LIGHT
GREEN
HIGH INTENSITY
8B
139
i
ALT 139
NOTE 6
BLACK
LIGHT
CYAN
HIGH INTENSITY
8C
140
1-
ALT 140
NOTE 6
BLACK
LIGHT
RED
HIGH INTENSITY
80
141
l'
AL T 141
NOTE 6
BLACK
LIGHT
MAGENTA
HIGH INTENSITY
8E
142
A
AL T 142
NOTE 6
BLACK
YELLOW
HIGH INTENSITY
8F
143
P-
ALT 143
NOTE 6
BLACK
WHITE
HIGH INTENSIT'I'
90
144
"E
ALT 144
NOTE 6
BLUE
BLACK
NORMAL
<1
91
145
ce
ALT 145
NOTE 6
BLUE
BLUE
UNDERLINE
92
146
FE
AL T 146
NOTE 6
BLUE
GREEN
NORMAL
93
147
~
ALT 147
NOTE 6
BLUE
CYAN
NORMAL
94
148
'0
ALT 148
NOTE 6
BLUE
RED
NORMAL
95
149
0'--
ALT 149
NOTE 6
BLUE
MAGENTA
NORMAL
96
150
'i}
ALT 150
NOTE 6
BLUE
BROWN
NORMAL
97
151
il'
ALT 151
NOTE 6
BLUE
LIGHT
GREY
NORMAL
98
152
y
AL T 152
NOTE 6
BLUE
DARK
GREY
HIGH
99
153
0
AL T 153
NOTE 6
BLUE
LIGHT
BLUE
HIGH INTEN~
UNDERLINE
9A
154
ij
ALT 154
NOTE 6
BLUE
LIGHT
GREEN
HIGH INTEN
C-6
INTEN~
AS TEXT ATTRIBUTES
COLOR/GRAPHICS
MONITOR ADAPTER
VALUE
AS CHARACTERS
HEX DEC
SYMBOL KEYSTROKES MODES
9B
155
¢
9C
156
£
90
157
BACKGROUND
FOREGROUND
IBM
MONOCHROME
DISPLAY
ADAPTER
ALT 155
NOTE 6
BLUE
LIGHT
CYAN
HIGH INTENSITY
AL T 156
NOTE 6
BLUE
LIGHT
REO
HIGH INTENSITY
Y-
AL T 157
NOTE 6
BLUE
LIGHT
MAGENTA
HIGH INTENSITY
T
9E
158
Pts
ALT 158
NOTE 6
BLUE
YELLOW
HIGH INTENSITY
9F
159
f
AL T 159
NOTE 6
BLUE
WHITE
HIGH INTENSITY
-1i
AL T 160
NOTE 6
GREEN
BLACK
NORMAL
I
ALT 161
NOTE 6
GREEN
BLUE
UNOERLINE
162
"'--0
ALT 162
NOTE 6
GREEN
GREEN
NORMAL
A3
163
--lI
AL T 163
NOTE 6
GREEN
CYAN
NORMAL
A4
164
AL T 164
NOTE 6
GREEN
REO
NORMAL
AO
160
Al
161
A2
/.
"v
n
"v
A5
165
N
ALT 165
NOTE 6
GREEN
MAGENTA
NORMAL
A6
166
~
ALT 166
NOTE 6
GREEN
BROWN
NORMAL
A7
167
2-
Al T 167
NOTE 6
GREEN
LIGHT
GREY
NORMAL
A8
168
i,
Al T 168
NOTE 6
GREEN
OARK
GREY
HIGH INTENSITY
A9
169
Al T 169
NOTE 6
GREEN
LIGHT
BLUE
HIGH INTENSITY
UNDERLINE
AA
170
--,
AlT 170
NOTE 6
GREEN
LIGHT
GREEN
HIGH INTENSITY
AB
171
Y,
ALT 171
NOTE 6
GREEN
HIGH INTENSITY
AC
172
,.
LIGHT
CYAN
AlT 172
NOTE 6
GREEN
LIGHT
RED
HIGH INTENSITY
AO
173
Al T 173
NOTE 6
GREEN
LIGHT
MAGENTA
HIGH INTENSITY
AE
174
AlT 174
NOTE 6
GREEN
YElLOW
HIGH INTENSITY
ALT 175
NOTE 6
GREEN
WHITE
HIGH INTENSITY
ALT 176
NOTE 6
CYAN
BLACK
NORMAL
AL T 177
NOTE 6
CYAN
BLUE
UNDERLINE
AF
175
BO
176
Bl
I
I
«
»
~~
177
~~
178
/y~
ALT 178
NOTE 6
CYAN
GREEN
NORMAL
B3
179
ALT 179
NOTE 6
CYAN
CYAN
NORMAL
B4
180 I - -
ALT 180
NOTE 6
CYAN
REO
NORMAL
NORMAL
NORMAL
B2
B5
181
!:::=
ALT 181
NOTE 6
CYAN
MAGENTA
B6
182
..........,1
ALT 182
NOTE 6
CYAN
BROWN
C-7
AS TEXT ATTRIBUTES
COLOR/GRAPHICS
MONITOR ADAPTER
AS CHARACTERS
VALUE
HEX DEC
SYMBOL
KEYSTROKES MODES
BACKGROUND
FOREGROUND
IBM
MONOCHROME
DISPLAY
ADAPTER
ALT 183
NOTE 6
CYAN
LIGHT
GREY
ALT 184
NOTE 6
CYAN
DARK
GREY
HIGH INTENSITY
ALT 185
NOTE 6
CYAN
LIGHT
BLUE
HIGH INTENSITY
UNDERLINE
ALT 186
NOTE 6
CYAN
LIGHT
GREEN
HIGH INTENSITY
ALT 187
NOTE 6
CYAN
LIGHT
CYAN
HIGH INTENSITY
B7
183
B8
184
I
B9
185
~
BA
186
BB
187
BC
188
~
ALT 188
NOTE 6
CYAN
LIGHT
RED
HIGH INTENSITY
BD
189
W
ALT 189
NOTE 6
CYAN
LIGHT
MAGENTA
HIGH INTENSITY
BE
190
ALT 190
NOTE 6
CYAN
YELLOW
HIGH INTENSITY
ALT 191
NOTE 6
CYAN
WHITE
HIGH INTENSITY
ALT 192
NOTE 6
REO
BLACK
NORMAL
ALT 193
NOTE 6
REO
BLUE
UNDERLINE
ALT 194
NOTE 6
RED
GREEN
NORMAL
BF
III
I
f=il
~
191
II
L-
NORMAL
CO
192
Cl
193
C2
194
C3
195
ALT 195
NOTE 6
RED
CYAN
NORMAL
C4
196
ALT 196
NOTE 6
RED
RED
NORMAL
C5
197
ALT 197
NOTE 6
RED
MAGENTA
NORMAL
RED
BROWN
NORMAL
NORMAL
I
~
C6
198
==
ALT 198
NOTE 6
C7
199
r-
ALT 199
NOTE 6
RED
LIGHT
GREY
C8
200
....:::::
ALT 200
NOTE 6
RED
DARK
GREY
HIGH INTENSITY
C9
201
rr=
ALT 201
NOTE 6
RED
LIGHT
BLUE
HIGH INTENSITY
UNDERLINE
CA
202
ALT 202
NOTE 6
RED
LIGHT
GREEN
HIGH INTENSITY
CB
203
r-r-
ALT 203
NOTE 6
RED
LIGHT
CYAN
HIGH INTENSITY
CC
204
P=
AL T 204
NOTE 6
RED
LIGHT
RED
HIGH INTENSITY
CD
205
ALT 205
NOTE 6
RED
LIGHT
MAGENTA
HIGH INTENSITY
CE
206
ALT 206
NOTE 6
RED
YELLOW
HIGH INTENSITY
CF
207
ALT 207
NOTE 6
RED
WHITE
HIGH INTENSITY
DO
208
ALT 208
NOTE 6
MAGENTA
BLACK
C-8
WL
I~~
II
NORMAL
AS TEXT ATTRIBUTES
AS CHARACTERS
VALUE
HEX DEc
COLOR/GRAPHICS
MONITOR ADAPTER
IKEYSTROKES
MODES
BACKGROUND
01
209
AL T 209
NOTE 6
MAGENTA
BLUE
UNDERLINE
02
210
ILT 210
NOTE 6
MAGENTA
GREEN
NORMAL
03
211
LL-
LT 211
NOTE 6
MAGENTA
CYAN
NORMAL
I:::::::
ALT 212
NOTE 6
MAGENTA
REO
NORMAL
F=
AL T 213
NOTE 6
MAGENTA
MAGENTA
NORMAL
04
212
05
213
SYMBOL
FOREGROUND
IBM
MONOCHROME
DISPLAY
ADAPTER
06
214
AL T 214
NOTE 6
MAGENTA
BROWN
NORMAL
07
215
ALT215
NOTE 6
MAGENTA
LIGHT
GREY
NORMAL
08
216
ALT 216
NOTE 6
MAGENTA
DARK
GREY
HIGH INTENSITY
09
217 I - -
AL T 217
NOTE 6
MAGENTA
LIGHT
BLUE
HIGH INTENSITY
UNDERLINE
OA
218
ALT 218
NOTE 6
MAGENTA
LIGHT
GREEN
HIGH INTENSITY
~
DB
219
AL T 219
NOTE 6
MAGENTA
LIGHT
CYAN
HIGH INTENSITY
;
DC
220
AL T 220
NOTE 6
MAGENTA
LIGHT
REO
HIGH INTENSITY
00
221
ALT 221
NOTE 6
MAGENTA
LIGHT
MAGENTA
HIGH INTENSITY
DE
222
ALT 222
NOTE 6
MAGENTA
YELLOW
HIGH INTENSITY
OF
223
ALT 223
NOTE 6
MAGENTA
WHITE
HIGH INTENSITY
224
ex:
E1
225
{j
E2
226
E3
227
1T
228
~
E5
229
6"'
E6
230
E7
231
E8
~
Y
IN
BLACK
6
INOTE 6
INOTE 6
YELLOW
GREEN
AL T 227
NOTE 6
YELLOW
CYAN
ALT 228
INOTE 6
YELLOW
REO
AL
225
226
NORMAL
NORMAL
~MAL
I AL" 229
NOTE 6
YELLOW
I AL T 230
INOTE 6
YELLOW
BROWN
NORMAL
7"
AL T 231
NOTE 6
YELLOW
LIGHT
GREY
NORMAL
232
AL T 232
NOTE 6
YELLOW
DARK
GREY
HIGH INTENSITY
E9
233
-e-
AL T 233
NOTE 6
YELLOW
LIGHT
BLUE
HIGH INTENSITY
UNDERLINE
EA
234
n
ALT 234
NOTE 6
YELLOW
LIGHT
GREEN
HIGH INTENSITY
EB
235
~
AL T 235
NOTE 6
YELLOW
LIGHT
CYAN
HIGH INTENSITY
r
NORMAL
C-9
~
~
~
AS TEXT ATTRIBUTES
HEX DEC
COLOR/GRAPHICS
MONITOR AOAPTER
AS CHARACTERS
VALUE
SYMBOL KEYSTROKES MODES
BACKGROUND
FOREGROUND
IBM
MONOCHROME
DISPLAY
ADAPTER
EC
236
00
ALT 236
NOTE 6
YELLOW
LIGHT
RED
HIGH INTENSITY
ED
237
q,
ALT 237
NOTE 6
YELlOW
LIGHT
MAGENTA
HIGH INTENSITY
EE
238
E
ALT 238
NOTE 6
YELLOW
YELLOW
HIGH INTENSITY
EF
239
n
ALT 239
NOTE 6
YELLOW
WHITE
HIGH INTENSITY
FO
240
-
ALT 240
NOTE 6
WHITE
BLACK
REVERSE VIDEO
F1
241
ALT 241
NOTE 6
WHITE
BLUE
UNDERLINE
F2
242
±
;:>
ALT 242
NOTE 6
WHITE
GREEN
NORMAL
F3
243
ALT 243
NOTE 6
WHITE
CYAN
NORMAL
F4
244
.;;;;
('
ALT 244
NOTE 6
WHITE
RED
NORMAL
..J
ALT 245
NOTE 6
WHITE
MAGENTA
NORMAL
ALT 246
NOTE 6
WHITE
BROWN
NORMAL
ALT 247
NOTE 6
WHITE
LIGHT
GREY
NORMAL
ALT 248
NOTE 6
WHITE
DARK
GREY
REVERSE VIDEO
ALT 249
NOTE 6
WHITE
LIGHT
BLUE
HIGH INTENSITY
UNDERLINE
•
ALT 250
NOTE 6
WHITE
LIGHT
GREEN
HIGH INTENSITY
~
ALT 251
NOTE 6
WHITE
LIGHT
CYAN
HIGH INTENSITY
F5
245
F6
246
F7
247
F8
248
F9
249
FA
250
FB
251
FC
252
n
ALT 252
NOTE 6
WHITE
LIGHT
RED
HIGH INTENSITY
FD
253
2
ALT 253
NOTE 6
WHITE
LIGHT
MAGENTA
HIGH INTENSITY
FE
254
I
ALT 254
NOTE 6
WHITE
YELLOW
HIGH INTENSITY
255
BLANK
ALT 255
NOTE 6
WHITE
WHITE
HIGH INTENSITY
FF
C-IO
~
0
•
NOTE 1 Asterisk (*) can easily be keyed using two methods:
1) hit the PRTSC key or 2) in shift mode hit the
[;] key.
*
I
I
NOTE 2 Period (.) can easily be keyed using two methods:
1) hit the[8 key or 2) in shift or NUM LOCK
mode hit the d~11 key.
I
NOTE 3 Numeric characters (0-9) can easily be keyed
using two methods: 1) hit the numeric keys on the
top row of the typewriter portion of the keyboard
or 2) in shift or NUM LOCK mode hit the numeric
keys in the 10-key pad portion of the keyboard.
NOTE 4 Upper case alphabetic characters (A-Z) can easily
be keyed in two modes: 1) in shift mode hit the
appropriate alphabetic key or 2) in CAPS LOCK
mode hit the appropriate alphabetic key.
NOTE 5 Lower case alphabetic characters (a-z) can easily
be keyed in two modes: 1) in "normal" mode hit
the appropriate alphabetic key or 2) in CAPS LOCK
combined with shift mode hit the appropriate alphabetic
key.
NOTE 6 The 3 digits after the ALT key must be typed from
the numeric key pad (keys 71-73,75-77,79-82).
Character codes 000 through 255 can be entered in
this fashion.
C-ll
Character Set (OO-7F) Quick Reference
•
0
16
32 48
64 80
•
HEXA·
DECIMAL
IVALUE
0
1
2
4
0
0
BLANK
(NULL)
~
BLANK
(SPACE)
1
1
g
......
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
A
DECIMAL
VALUE
-• "
+
•4-
•
0
cf'
12
C
Q
13
0
~~
14
E
15
F
0
1 A
II
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-
... •
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~
-.I
@
2 B
!
.. 41= 3 C
N /\ n 'L,
· 0
?
"
-
0
~
AS TEXT ATTRIBUTES
AS CHARACTERS
VALUE
HEX OEC
COLOR/GRAPHICS
MONITOR AOAPTER
SYMBOL
KEYSTROKES MODES
BACKGROUND
FOREGROUND
IBM
MONOCHROME
OISPLAY
ADAPTER
9
NOTE 5
YELLOW
LIGHT
GREY
NORMAL
h
h
NOTE 5
YELLOW
DARK
GREY
HIGH INTENSITY
105
i
i
NOTE 5
YELLOW
LIGHT
BLUE
HIGH INTENSITY
UNOERLINE
6A
106
i
i
NOTE 5
YELLOW
LIGHT
GREEN
HIGH INTENSITY
6B
107
k
k
NOTE 5
YELLOW
LIGHT
CYAN
HIGH INTENSITY
6C
108
I
I
NOTE 5
YELLOW
LIGHT
REO
HIGH INTENSITY
60
109
m
m
NOTE 5
YELLOW
LIGHT
MAGENTA
HIGH INTENSITY
6E
110
n
n
NOTE 5
YELLOW
YELLOW
HIGH INTENSITY
6F
111
0
0
NOTE 5
YELLOW
WHITE
HIGH INTENSITY
70
112
p
p
NOTE 5
WHITE
BLACK
REVERSE VIDEO
71
113
q
q
NOTE 5
WHITE
BLUE
UNDERLINE
72
114
r
r
NOTE 5
WHITE
GREEN
NORMAL
NOTE 5
WHITE
CYAN
NORMAL
NOTE 5
WHITE
REO
NORMAL
67
103
9
68
104
69
73
115
s
s
74
116
t
t
75
117
u
u
NOTE 5
WHITE
MAGENTA
NORMAL
76
118
v
v
NOTE 5
WHITE
BROWN
NORMAL
77
119
w
w
NOTE 5
WHITE
LIGHT
GREY
NORMAL
78
120
x
x
NOTE 5
WHITE
DARK
GREY
REVERSE VIDEO
79
121
y
y
NOTE 5
WHITE
LIGHT
BLUE
HIGH INTENSITY
UNDERLINE
7A
122
z
z
NOTE 5
WHITE
LIGHT
GREEN
HIGH INTENSITY
7B
123
I
I
I
SHIFT
WHITE
LIGHT
CYAN
HIGH INTENSITY
7C
124
I
I
I
SHIFT
WHITE
LIGHT
REO
HIGH INTENSITY
I
I
I
SHIFT
WHITE
LIGHT
MAGENTA
HIGH INTENSITY
I
SHIFT
WHITE
YELLOW
HIGH INTENSITY
WHITE
WHITE
HIGH INTENSITY
70
125
7E
126
~
7F
127
b.
~
CTRL-
C-5
~
~
;;:
::::
iii
AS TEXT ATTRIBUTES
AS CHARACTERS
VALUE
HEX DEC
* * *
COLOR/GRAPHICS
MONITOR AOAPTER
SYMBOL
KEYSTROKES MOOES
BACKGROUND
FOREGROUND
IBM
MONOCHROME
DISPLAY
ADAPTER
80 HEX - FF HEX ARE FLASHING IN BOTH COLOR & IBM MONOCHROME
80
128
~
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2
C-l3
NOTES
C-14
APPENDIX D LOGIC DIAGRAMS
Contents:
System Board .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Keyboard . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IBM Monochrome Display And Parallel Printer
Adapter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IBM Monochrome Display. . . . . . . . . . . . . . . . . . . . . . .
Color/Graphics Monitor Adapter. . . . . . . . . . . . . . . . .
IBM 80 CPS Matrix Printer. . . . . . . . . . . . . . . . . . . . . .
Parallel Printer Adapter. . . . . . . . . . . . . . . . . . . . . . . . . .
5 1/4" Diskette Drive Adapter. . . . . . . . . . . . . . . . . . . .
5 1/4" Diskette Drive. . . . . . . . . . . . . . . . . . . . . . . . . . . .
32 KB Memory Expansion . . . . . . . . . . . . . . . . . . . . . . .
64 KB Memory Expansion . . . . . . . . . . . . . . . . . . . . . . .
Asynchronous Communications Adapter .. . . . . . . . .
Game Control Adapter. . . . . . . . . . . . . . . . . . . . . . . . . . .
D-2
D-12
D-14
D-24
D-25
D-31
D-34
D-35
D-39
D-42
D-45
D-48
D-49
D-I
SYSTEM BOARD (PROCESSOR AND SUPPORT)
51 ~o
~0
18~
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N
Q
M
'=....
Q
1::
Q
eo
eo
=
en
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c:t
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~
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Q
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1;;
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Note: Logics one and two of twelve are not applicable
D-2
SYSTEM BOARD (WAIT STATE GENERATOR)
'"
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f'
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;;
D·3
SYSTEM BOARD (DEVICE DECODES)
~
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~
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~
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i 11111111
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D-6
SYSTEM BOARD (DYNAMIC MEMORY)
,I
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CI
co
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.
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...
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co
en
...
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co
.....
:cCD
"CI
C
~
w
i!"
CI
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CD
::!:
...
's
'"c
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Q
rllllill
11 I~
D-8
SYSTEM BOARD (SPEAKER/CASSETTE/TIMER/COUNTER)
-N
«:)
Q
...
.!:!
«:)
.....
I~
D-9
SYSTEM BOARD (KEYBOARD/SENSE/CONTROL)
N
~
D-I0
SYSTEM BOARD (I/O CHANNEL)
-.
o
N
os
C
.....
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C
=
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;;::
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t='
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POWER
-v
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6.2ul
.047""f
GND
~
2
471lH
x:
P21
LI
20.~1:~
AOI
A03
AD?
A09
A08
CONNECTOR
P2
~
810
B09
B08
BO'+
B03
BOI
AO'+
AID
ADZ
C2
20.1
I
1
22
CLOCK OUT
......1. X2
? EA UI
VSS
b INT
VDD
To
GND
T
POWER+~V
2b
~
VCC
18 DBb
11 DB~
Ib DB4
I~ DB3
14 DB2
13 DBI
12 DBO
CNT b4
CNT 32
CNTlb
CNT 8
CNT 4
CNT 2
CNT I
+KEY DEPRESSED
- MATRIX STROBE
39 TI
21 P20
4 RES
C6
4
2 U2 I 3
8048
PIO
P22
PII
27
23
-REG IN
DATA OUT
1
II
DATA IN
I
Keyboard Logic 1 of 2
~
8
AO~
R2
2.0
~KIl
CLOCK
A09
RI
2.0 KJl
R3
2.0KJl
C7
OIPF
C
01 PI'
U2 12
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2B
51PF
~
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C~
U2 9
~
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~
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DATA
CONNECTOR
PI
KEYBOARD
N
Q
N
u
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.
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0-13
IBM MONOCHROME DISPLAY AND PARALLEL PAINTER ADAPTER
,
t
g
00
D
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1: !,"1
0
l
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D-14
{
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c
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(5HT 8.12,)
(SHT
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rn
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IBM Monochrome Display And Parallel Printer Adapter Logic 4 of 12
VI
o XIONldd"
IBM MONOCHROME DISPLAY AND PARAllEl PRINTER ADAPTER
'"
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55. Microprocessor: A processing unit, or part of a processing unit,
that consists of microcode. In the IBM Personal Computer, the
microprocessor is the Intel-SOSS.
56. Mnemonic: Symbol or symbols used instead of terminology
more difficult to remember. Usually a mnemonic has two or
three letters.
>7. Mode: (1) A method of operation; for example, the binary
mode, the interpretive mode, the alphanumeric mode. (2) The
most frequent value in the statistical sense.
is. Monitor: (1) A device that observes and verifies the operation
of a data processing system and indicates any specific departure from the norm. (2) A television type display such as the
IBM Monochrome Display. (3) Software or hardware that
observes, supervises, controls, or verifies the operations of a
system.
i9. Multiplexer: A device capable of interleaving the events oftwo
or more activities or capable of distributing the events of an
interleaved sequence to their respective activities.
G-5
70. OR: A logic operator having the property that if P is a
statement, Q is a statement, Ris a statement... , then the OR of
P,Q,R, is true if at least one statement is true, false if all
statements are false. P OR Q is often represented by P+Q,
PVQ. The term is synonymous with boolean add; logic add.
71. "ORed": Past tense of OR.
72. OSC: Oscillator. (Refer to System Board I/O Channel
Descriptions ).
73. Output: Pertaininng to a device, process, or channel involved in
an output process, or to the data or states involved in an output
process.
74. Personal Computer: A small home or business computer
complete with a System Unit, keyboard, and available with a
variety of options such as monochrome display and a dot matrix
printer.
75. Pinout: A diagram of functioning pins on a pinboard.
76. Printed Circuit Board: A piece of material, usually fiberglass,
which contains a layer of conductive material, usually metal.
The metallic layer is then etched and electronic equipment is
then attached to the fiberglass. The electronic equipment then
has the capacity to transmit electronic signals through the board
by way of the etched metal tracks.
77. Program: (1) A series of actions designed to achieve a certain
result. (2) To design, write and test computer programs.
78. Read/Write Memory: Random access storage.
79. Reset Drv: Reset Driver. (Refer to System Board I/O Channel
Descriptions ).
80. RF Modulator: The device used to convert the composite video
signal to the antenna level input of a home TV.
81. ROM: Read-only Memory.
82. ROM BIOS: Read-only Memory/Basic Input Output System.
83. RS 232 Port: Asynchronous Type Communications.
84. RTS: Ready to Send. Associated with modem control.
G-6
85. Scan Line: The use of a cathode beam to test the cathode ray
tube of a display used with a personal computer.
86. Schematic: The description, usually in diagram form, of the
logical structure and physical structure of an entire data base
according to a conceptual model.
87. Software: (1) Computer programs, procedures, rules, and
possibly associated documentation concerned with the operation of a data processing system. (2) Contrast with hardware.
88. Strobe: (1) An instrument used to determine the exact speed of
circular or cyclic movement. (2) A flashing signal displaying an
exact event.
89. Text: In ASCII and data communication, a sequence of
characters treated as an entity if preceded and terminated by
one STX and one ETX transmission control respectively.
90. TX Data: Transmit Data. External connections ofthe RS 232
Asynchronous Communications Adapter interface.
91. Video: Computer data shown or displayed on a cathode ray
tube monitor or display.
G-7
NOTES
G-8
BIBLIOGRAPHY
IBM Publications
1.
IBM Personal Computer Guide to OperationsPN 6025000
General information on using the IBM Personal
Computer.
2.
IBM Personal Computer Hardware and ServicePN 6025072
Information on hardware and steps necessary when
servicing this IBM Personal Computer.
3.
IBM Personal Computer BASIC-PN 6025010
Information for programmers who are using BASIC.
4.
IBM Personal Computer Disk Operating System (DOS)PN 6024001
Information for programmers who are using DOS.
5.
IBM Personal Computer MACRO AssemblerPN 6024002
Information for experienced assembly language
programmers using the Macro Assembler.
6.
IBM Personal Computer Pascal Compiler-PN 6024010
Information for programmers who are familiar with the
Pascal language.
Bib-t
Other Related Publications
7.
NATIONAL SEMICONDUCTOR
INS 8250 Asynchronous Communications Element
This book documents physical and operating characteristics
of the INS 8250.
8.
INTEL
The 8086 Family Users Manual
This manual introduces the 8086 family of microcomputing
components and serves as a reference in system design
and implementation.
9.
INTEL
8086/8087/8088 Macro
ASSEMBLY Language
Reference Manual for 8088/8085 Based Development
System
The manual describes the 8086/8087/8088 Macro Assembly
Language, and is intended for use by persons who are familiar
with assembly language.
10.
MOTOROLA
The complete Microcomputer Data Library
This book can provide additional information on the Motorola
6845 CRT Controller used in the IBM Monochrome Display
and Parallel Printer Adapter, and the Color/Graphics
Monitor Adapter.
Bib-2
INDEX
A
AO-AI9 (Address Bits 0-19) 2-10
A.c. Output 2-34
Adapters
Asynchronous Communications (RS232) 2-123
Color/Graphics 2-45
5 1/4" Diskette Drive 2-89
Game Control 2-117
IBM Monochrome Display and Parallel Printer 2-37
Parallel Printer 2-65
Adapter Attribute Relationship 2-51
Adapter Inputs 2-107
Adapter Outputs 2-106
Address Bits (AO-AI9) 2-10
Address Decode 2-118
Address Enable (AEN) 2-12
Address Latch Enable (ALE) 2-10
Address Strobe (ADS) 2-129
ADS (Address Strobe) 2-129
AEN (Address Enable 2-12
ALE (Address Latch Enable) 2-10
Algorithms 3-8
All Points Addressable (APA) 2-45
Alphanumeric Mode 2-49
American Standard Code for Information Interchange (ASCII)
Analog Input 2-122
A/N (Alphanumeric) 2-49
Appendices A-O
A - ROM BIOS Listing A-I
B - Assembly Instruction Set Reference B-1
C - Of Characters, Keystrokes and Color C-l
D - Logic Diagrams D-l
E - Unit Specifications E-l
APA (All Points Addressable) 2-45
ASCII - (See American Standard Code for Information
Interchange) 1-2
ASCII Coding Table 2-78
ASCII Control Codes 2-79
ASCII (Extended) 3-11
Assembly Instruction Set Reference Appendix B
Assembly Language Reference Guide (See Bibliography)
Assessable Registers 2-154
1-2
1-1
Asynchronous Communications Adapter
Block Diagram 2-124
Current Loop Interface 2-127
Input/Output Decode 2-125
Input/Output Signals 2-133
Input Signals 2-129
Interface Description 2-126
Interface Specifications 2-147
Interrupt 2-126
Interrupt Enable Register 2-141
Interrupt Identification Register 2-139
INS 8250 Accessible Registers 2-134
INS 8250 Functional Pin Description 2-129
INS 8250 Line Control Register 2-134
INS 8250 Programmable Baud Rate Generator
Line Status Register 2-137
Logic Diagram D-48
Modem Control Register 2-142
Modem Status Register 2-143
Modes of Operation 2-125
Output Signals 2-132
Programming Considerations 2-133
Receiver Buffer Register 2-144
Reset Functions 2-133
Selecting the Interface Format 2-146
Transmitter Holding Register 2-145
2-135
B
BASIC (Beginner's all-purpose symbolic instruction code)
80 Interpreter 1-1
Reserved Interrupts 3-23
Screen Editor Special Functions 3-19
Workspace Variables 3-23
Baud (See .INS 8250 Programmable Baud Rate Generator)
Baud Out (BAUDOUT) 2-132
BEL (Bell) 2-82
Bell (BEL) 2-82
Berg Pin Connectors 2-63
BIOS
(Basic Input Output System) 3-2
Cassette Logic 3-8
Memory Map 3-7
Interrupt Vector Listing 3-3
Parameter Passing 3-2
1-2
2-132
BIOS (continued)
Programming Tip 3-2
ROM (Read Only Memory) 3-2
Use of 3-2
Vectors With Special Meaning 3-5
BIT
I/O Address 2-42
I/O Bit Map 2-24
Output Port Cassette 2-19
Output Port Speaker 2-22
Status Register 2-59
Block Diagrams
Asynchronous Communications Adapter 2-124
Cassette Motor Control 2-20
Cassette Interface Read 2-19
Cassette Interface Write 2-20
Color/Graphics Monitor Adapter 2-47
5 1/4" Diskette Drive Adapter 2-90
Game Control Adapter 2-117
Keyboard Interface 2-15
IBM Monochrome Display Adapter 2-38
Parallel Printer Adapter 2-66
System 1-4
Bootstrap 3-3
Byte:
Attribute Definition 2-49
Display Buffer 2-61
c
CAN (Cancel) 2-81
Cancel (CAN) 2-81
Carriage Retum(CR) 2-79
Cassette
Circuit Block Diagrams 2-19
Data Record Architecture 3-10
Error Recovery 3-10
Interface Connector Specifications
Interrupt 15 3-8
Jumpers 2-19
Logic (BIOS) 3-8
Read 3-9
Write 3-8
2-21
1-3
Character
Codes 3-11
Generator 2-48
"Of Characters, Keystrokes and Color Appendix C
Set (00-7F) Quick Reference C-12
Set (80-FF) C-13
Chip Select Out (CSOUT) 2-132
Clear To Send (CTS) 2-130
Clock (4.77 mhz) 2-10
CLK (Clock) 2-10
CNTRL (Control) 3-14
Coding Table (ASCII) 2-78
Color/Graphics Monitor Adapter
Block Diagram 2-47
Character Generator 2-48
Color/Graphics Mode 2-51
Color Select Register 2-57
Composite Color Generator 2-48
Description of Basic Operations 2-54
Display Buffer 2-48
Graphics Storage Map 2-52
I/O Address and Bit Map 2-61
Interrupt Level 2-60
Logic Diagrams D-25
Major Component Definitions 2-48
Memory Requirements 2-60
Mode Register Summary 2-58
Mode Select Register 2-58
Mode Set and Status Registers 2-48
Modes of Operation 2-49
Monitor Adapter Auxiliary Connectors 2-63
Monitor Adapter Direct Drive and Composite Interface
Pin Assignment 2-62
Monochrome Display Adapter Vs. Color/Graphics Adapter
Attribute Relationship 2-51
Motorola 6845 CRT Controller 2-48
Programming the 6845 Controller 2-48
Programming the Mode Control and Status Registers 2-57
6845 Register Description 2-56
Sequence of Events 2-59
Timing Generator 2-48
Composite Phone Jack 2-62
Computer (IBM Personal) 1-1
Command Phase 2-93
1-4
Command Status Registers
Register 0 2-100
Register 1 2-10 1
Register 2 2-102
Register 3 2-103
Control Codes
CPS (Characters Per Second) 2-70
CPU (Central Processing Unit) see System Board,
Microprocessor 2-3
CR (Carriage Return) 2-79
CRT:
(Cathode Ray Tube) 2-37
Output Port 1 (I/O Address '3B8') 2-42
Status Port (I/O Address '3BA') 2-43
CTS (Clear To Send) 2-130
CSOUT (Chip Select Out) 2-132
Current 2-34
Cursor 2-14
D
DO-D7 (Data Bits 0-7) 2-10
DAcKO - DAcK3 (DMA Acknowledge 0 to 3) 2-12
DATA
Bit (DO-D7) 2-10
Bus Buffer/Driver 2-118
Input Strobe (DISTR, DISTR) 2-129
Output Strobe (DOSTR, DOSTR) 2-129
Rates 2-39
Record Architecture 3-10
Set Ready (DSR) 2-131
Data Flow (System) 2-6
Data Flow (System) 2-6
DC 1 (Device Control 1) 2-81
DC 2 (Device Control 2) 2-81
DC 3 (Device Control 3) 2-81
DC 4 (Device Control 4) 2-80
DC Output 2-34
DEL (Delete) 2-81
Delete (DEL) 2-81
Device Control 1 (DC 1) 2-81
Device Control 2 (DC 2) 2-81
Device Control 3 (DC 3) 2-81
Device Control 4 (DC 4) 2-80
Digital Output Register (DOR) 2-91
1-5
DIN (Connectors) 2-5
DIP (Dual In-Line Package) 2-28
Diskettes 2-111
Diskette Drive (5 1/4") 2-110
Diskette Drive (5 1/4") Adapter
Adapter Inputs 2-106
Adapter Outputs 2-107
Block Diagram 2-90
Command Status Registers 2-100
Command Summary 2-96
Comments (Programming) 2-104
Digital Output Register 2-91
Drive A and B Interface 2-106
Drive Constants 2-104
DPC Registers 2-103
External Interface Specifications 2-109
Floppy Disk Controller 2-91
Functional Description 2-91
Internal Interface Specifications 2-108
Logic Diagrams D-35
Programming Considerations 2-94
Programming Summary 2-103
System I/O Channel Interface 2-104
Display (See IBM Monochrome Display) 2-43
Display Buffer 2-48
DISTR, DISTR (Data Input Strobe) 2-129
Divisor Latch 2-136
DMA (Direct Memory Access) 2-4
Dos Special Functions 3-19
DOSTR, DOSTR (Data Output Strobe) 2-129
Drive Constants 2-104
Drive Disable 2-132
DRQl - DRQ3 (DMA Request 1 to 3) 2-12
DSR (Data Set Ready) 2-131
DTR (Data Terminal Ready) 2-132
Dual In-Line Package Switches (DIP) 2-28
E
Edge Connector 2-108
Encoding 3-11
Error Recovery 3-10
ESC (Escape) 2-82
ESC A (Escape A) 2-83
ESC B (Escape B) 2-84
1-6
ESC C (Escape C) 2-85
ESC D (Escape D) 2-85
ESC E (Escape E) 2-86
ESC F (Escape F) 2-86
ESC G (Escape G) 2-86
ESC H (Escape H) 2-87
ESC 0 (Escape 0) 2-82
ESC 1 (Escape 1) 2-82
ESC 2 (Escape 2) 2-83
ESC 8 (Escape 8) 2-83
ESC 9 (Escape 9) 2-83
Escape (ESC) 2-82
Escape A (ESC A) 2-83
Escape B (ESC B) 2-84
Escape C (ESC C) 2-85
Escape D (ESC D) 2-85
Escape E (ESC E) 2-86
Escape F (ESC F) 2-86
Escape G (ESC G) 2-86
Escape H (ESC H) 2-87
Escape 0 (ESC 0) 2-82
Escape 1 (ESC 1) 2-82
Escape 2 (ESC 2) 2-83
Escape 8 (ESC 8) 283
Escape 9 (ESC 9) 2-83
Execution Phase 2-93
Extended Codes 3-13
F
FDC (Floppy Disk Controller) 2-91
Floppy Disk Controller (FDC) 2-91
Fonts 2-48
Functions and Conditions of DIP Switch 1 2-72
Functions and Conditions of DIP Switch 2 2-73
Functional Description
5 1/4" Diskette Drive Adapter 2-91
Game Control Adapter 2-118
INS 8250 2-129
G
Game Control Adapter
Address Decode 2-118
Block Diagram 2-117
1-7
Game Control Adapter (continued)
Connector Specifications 2-122
Data Bus Buffer/Driver 2-118
Functional Description 2-118
Interface Description 2-119
Joystick Positions 2-118
Joystick Schematic 2-121
Trigger Buttons 2-118
Glossary G-l
GND (Ground) 2-12
Graphics Character Extensions (Interrupt 1FH)
Graphics Mode (Color) 2-51
Graphics Storage Map 2-52
3-6
H
Hardware
Asynchronous Communications Adapter 2-123
Color/Graphics Monitor Adapter 2-45
5 1/4" Diskette Drive 2-110
5 1/4" Diskette Drive Adapter 2-89
Game Control Adapter 2-117
IBM Monochrome Display 2-43
IBM Monochrome Display and Parallel Printer Adapter 2-37
Memory Expansion Options 32KB and 64KB 2-113
Printer 2-70
Parallel Printer Adapter 2-65
Power Supply 2-33
System Board 2-3
Hardware
Overview 1-1
Data Flow 2-6
Hertz (Hz) 1-2
Horizontal Drive 2-43
Horizontal Tab (HT) 2-81
HT (Horizontal Tab) 2-81
I
IBM 80 CPS Matrix Printer 2-70
IBM Monochrome Display 2-43
IBM Monochrome Display and Parallel Printer Adapter
Block Diagram 2-38
Data Rates 2-39
Direct Drive Interface and Pin Assignment 2-44
1-8
IBM Monochrome Display and Parallel Printer Adapter (continued)
DMA Channel 2-42
Interrupt and DMA Response Requirements 2-39
Interrupt Levels 2-42
I/O Address and Bit Map 2-42
Lines Used 2-39
Loads 2-39
Memory Requirements 2-41
Modes of Operation 2-40
Programming the 6845 CRT Controller 2-41
Sequence of Events 2-41
Important Operating Characteristics 2-36
IER (Interrupt Enable Register) 2-141
IIR (Interrupt Identification Register) 2-139
Input/Output Signals:
Data (DO, D7) 2-133
External Clock Input/Output (XTAL1, XTAL2) 2-133
Input Requirements (Power Supply) 2-34
Input Signals
Address Strobe (ADS) 2-129
Chip Select (SCO, CSl, CS2) 2-129
Clear to Send (CTS) 2-130
Data Input Strobe (DISTR, DISTR) 2-129
Data Output Strobe (DOSTR, DOSTR) 2-129
Data Set Ready (DSR) 2-131
Master Reset (MR) 2-130
Received Line Signal (RCLK) 2-130
Receiver Clock (RCLK) 2-130
Register Select (AO, AI, A2) 2-130
Ring Indicator (RI) 2-131
Serial Input (SIN) 2-130
Interface Diagram
Asynchronous Communications Adapter 2-147
Cassette Connector Specifications 2-21
Color/Graphics Monitor Adapter 2-62
5 1/4" Diskette Drive Adapter External 2-109
5 1/4" Diskette Drive Adapter Internal 2-108
Game Control 2-122
IBM Monochrome Display Direct Drive 2-44
Keyboard Connector Specifications 2-18
Parallel Printer 2-69
INTRPT (Interrupt) 2-132
Interrupt Control Functions 2-140
Intel 8048 (Keyboard Microcomputer) 2-14
Intel 8088 (System Unit Microprocessor) 2-3
1-9
I/O (Input/Output)
Address Map 2-33
Channel 2-8
Channel Description (System Board) 2-10
Diagram 2-9
I/O CH CK (I/O Channel Check) 2-10
I/O CH RDY (I/O Channel Ready) 2-11
lOR (I/O Read Command) 2-11
lOW (I/O Write Command) 2-11
Interrupts
And DMA Response Requirements 2-39
Enable Register 2-141
Identification Register 2-139
Levels (O-XX) 2-42
Vector Listing 3-3
Vectors (0-7F) 3-21
1 CH - Timer Tick 3-5
1 DR - Video Parameters 3-5
1 EH - Diskette Parameters 3-5
1 FH - Graphics Character Extensions 3-6
15 3-8
K
KB - Kilobyte (See Memory Expansion Options)
Keyboard
Break 3-16
Character Codes 3-11
Diagram 2-16
Encoding 3-11
Extended Codes 3-13
Extended Functions 3-13
Interface Block Diagram 2-15
Interface Connector Specifications 2-18
Pause 3-16
Print Screen 3-16
Scan Codes 2-17
Shift States 3-14
Shift Key Priorities 3-15
Special Handling 3-15
System Reset 3-15
Usage 3-17
Kilobyte (KB) (See Memory Expansion Options)
1-10
L
LF (Line Feed) 2-79
Light Pen
Interface 2-63
Mode Control and Status Register 2-57
Register Description 2-56
Line Control Register (LCR) 2-134
Line Feed 2-79
Line Status Register (LSR) 2-137
Lines Used 2-39
Loads 2-39
Logic Diagrams Appendix D
Low Memory Maps
BASIC and DOS Reserved Interrupts (80-3FF)
BASIC Workspace Variables 3-23
Interrupt Vectors (0-7F) 3-21
Reserved Memory Locations (400-5FF) 3-22
3-22
M
Major Component Definitions 2-48
Matrix Printer (IBM 80 CPS) 2-70
Megabyte 2-3
Memory
BIOS Map 3-7
Map (System) 2-25
Module Description 2-114
Module Pin Configuration 2-114
Other ReadIWrite Usage 3-6
Requirements (Color/Graphics) 2-60
Requirements (IBM Monochrome) 2-41
System Board Switch Settings 2-30
32/64 KB Expansion Option Switch settings 2-31
Memory Expansion Options
Memory Module Description 2-14
Memory Module Pin Configuration 2-114
Operating Characteristics 2-113
Switch Configurable Starting Address 2-115
MEMR (Memory Read Command) 2-11
MEMW (Memory Write Command) 2-11
MFM (Modified Frequency Modulation) 2-110
Mhz (Megahertz) 2-43
Microprocessor 2-3
1-11
Microsecond 2-3
Mnemonic B-18
Mode Set and Status Register 2-48
Modem Control Register 2-142
Modem Status Register 2-143
Modes of Operation
Asynchronous Communications Adapter 2-125
Color/Graphics Monitor Adapter 2-49
IBM Monochrome Display Adapter 2-40
Mode Register Summary 2-58
Mode Select Register 2-58
Monitor Type Switch Settings 2-29
Monochrome Display (IBM) 2-43
Monochrome Display and Parallel Printer Adapter (See IBM)
Motorola 6845 CRT Controller 2-48
MR (Master Reset) 2-130
N
NMI (Non-Maskable Interrupt)
of the 8088 2-4
to the 8088 2-8
NMI Mask. Reg. - (I/O Address Map) 2-23
Nominal Power Requirements 2-24
NUL (Null) 2-82
Null (NUL) 2-82
NUM LOCK 3-14
o
Of Characters, Keystrokes and Color C-l
OHM Resistors 2-67
Operating Characteristics
Memory Expansion Options 2-113
Monochrome Display 2-43
Power Supply 2-36
Options
Asynchronous Communications Adapter 2-12
Color/Graphics Monitor Adapter 2-45
5 1/4" Diskette Drive 2-110
5 1/4" Diskette Drive Adapter 2-89
Game Control Adapter 2-117
IBM 80 CPS Matrix Printer 2-70
IBM Monochrome Display 2-43
32/64 KB Memory Expansion Options 2-113
1-12
Options (continued)
Parallel Printer Adapter 2-65
"ORed" 2-65
OSC (Oscillator) 2-10
Other Read/Write Memory Usage 3-6
OUT PORT 2-39
Output
AC 2-34
Address 2-67
DC 2-34
Port 2-65
OUT 1 2-132
OUT 2 2-132
Output Signals
Baud Out (BAUDOUT) 2-132
Chip Select Out (CSOUT) 2-132
Data Terminal Ready (DTR) 2-132
Driver Disable (DDIS) 2-132
Interrupt (INTRPT) 2-132
Output 1 (OUTl) 2-132
Output 2 (OUT2) 2-132
Request to Send (RTS) 2-132
Serial Output (SOUT) 2-132
Overview (Hardware) 1-1
Over Voltage/Current Protection 2-36
p
Parallel Printer Adapter
ASCII Coding Table 2-78
ASCII Control Codes 2-79
Block Diagram 2-66
Description 2-37
DMA Channel 2-42
IBM 80 CPS Matrix Printer 2-70
I/O Address and Bit Map 2-42
Interrupt Levels 2-42
Logic Diagram D-31
Parallel Interface Description 2-73
Printer Specifications 2-71
Programming Considerations 2-67
Programming the 6845 CRT Controller 2-41
Sequence of Events 2-41
Setting the DIP Switches 2-72
Timing 2-77
1-13
Parameters, 6845 Initialization 2-41
Parameter Passing, ROM BIOS 3-2
Parity Flag, 8080 Flags B-1
Pause, BIOS Cassette Logic Special Handling 3-16
Pin Connectors
P2-6 Pin Berg Strip for Light Pen Connector 2-63
Pl-4 Pin Berg Strip for RF Modulator 2-63
9 Pin Connector, Color Direct Drive 2-61
9 Pin Connector, IBM Monochrome Display 2-44
25 Pin Connector, Parallel Printer Adapter Block Diagram 2-66
25 Pin'D' Shell Connector, Asynchronous Adapter Block
Diagram 2-124
15 Pin 'D' Shell Connector, Game Controller Adapter (Analog
Input Connector Specifications) 2-122
25 Pin 'D' Shell Connector, Parallel Printer Adapter 2-69
5 Pin Din Connector, Keyboard Interface Connector
Specifications 2-18
15 Pin Male 'D' Shell Connector, Joystick Schematic 2-121
Planar (See System Board 2-3; Intel 8088 2-3)
Power-on Self-Test
System Board 2-4
Keyboard 2-14
Power Supply 2-33
AC Output 2-34
DC Output 2-34
Important Operating Characteristics 2-36
Over Voltage/Current Protection 2-36
Signal Requirements 2-36
Input Requirements 2-34
Power Supply Connectors and Pin Assignments 2-35
Power Supply Location 2-34
Preface i
Print Screen, Special Handling 3-16
Printer, IBM 80 CPS Matrix 2-70
Printer Specifications 2-71
Programmable Peripheral Interface (PPI) 8255A-5 2-19
Programming Considerations
Asynchronous Communications Adapter
Asynchronous Communications Reset Functions 2-133
INS 8250 Accessable Registers 2-134
INS 8250 Line Control Register 2-134
INS 8250 Programmable Baud Rate Generator 2-135
Interrupt Identification Register 2-139
Interrupt Enable Register 2-141
Line Status Register 2-137
Modem Control Register 2-142
1-14
Programming Considerations
Asynchronous Communications Adapter (continued)
Modem Status Register 2-143
Receiver Buffer Register 2-144
Transmitter Holding Register 2-145
Color/Graphics Monitor Adapter
Color Select Register 2-57
Control and Status Register 2-57
I/O Address and Bit Map 2-61
Interrupt Level 2-60
Mode Register Summary 2-58
Mode Select Register 2-58
Programming the 6845 Controller 2-55
Programming the Modem Control and Status Register 2-57
6845 Register Descriptions 2-56
Status Register 2-59
Sequence of Events 2-59
5 1/4" Diskette Drive Adapter
Command Status Registers 2-100
Command Summary 2-96
Symbol Descriptions 2-94
IBM Monochrome Display and Parallel Printer Adapter
DMA Channel 2-42
I/O Address and Bit Map 2-42
Interrupt Levels 2-42
Memory Requirements 2-41
Sequence of Events 2-41
Programming the CRT Controller 2-41
Programming the 6845 CRT Controller 2-41
Comments 2-104
DPC Registers 2-103
Drive Constants 2-104
R
RAS 2-114
Rating Amps, Over Voltage/Current Protection 2-36
Ready Line 2-8
Read Block 3-9
ReadData 2-107,2-108 (5 1/4" Diskette Drives. External) 2-109
Read Status (Parallel Printer Adapter Block Diagram) 2-66
Read/Write Memory
Color Monitor 2-50
Color TV 2-49
Future Expansion in I/O Channel, 384 KB 2-26
1-15
Read/Write Memory (continued)
Graphics Storage Map 2-53
Hardware Overview 1-1
I/O Address Map 2-24
Memory Address Space 2-61
Memory Expansion Options 2-113
User 3-7
Receive Circuit 2-127
Receiver Clock, (RCLK) 2-128
Recording Medium 2-111
Refresh Cycles 2-8
Registers, Address
Command Status 2-100
Data 2-9
Initialization
Parameters 2-41
INS 8250 Accessible 2-134
INS 8250 Line Control 2-134
Interrupt Enable 2-141
Line Control 2-134
Line Status 2-137
Main Status 2-9
Modem Control 2-142
Modem Status 2-143
Receiver Buffer 2-144
Transmitter Holding 2-145
6845 2-55
Register File
Color Select 2-57
6845 Data 2-41
Description 2-56
6845 Index 2-42
6845 Initialization Parameters 2-41
Mode Select 2-58
Status 2-57,2-59
Requirements
Input (Power Supply) 2-34
Memory 2-60
Signal (Power Supply) 2-36
RESET DRV (Reset Drive) 2-10
I/O Channel Description 2-119
ROM Address Space, 256 KB 2-25
=RESET 2-105
Reserved Memory Locations (400-5FF)
Result Phase 2-93
1-16
3-22"
Response Requirements, Interrupt and DMA 2-39
Reverse Video
Modes of Operation 2-40
Color Graphics Monitor Adapter 2-45
RF Modulator
Auxiliary Video Connector PI-4 Pin Berg Strip 2-63
Color Graphics Monitor Adapter 2-45
Interface 2-63
Ring Indicator 2-127
ROM
Character Generator 2-48
Color Graphics Mode 2-52
Color Graphics Monitor Adapter 2-46
Diagram 2-13
Hardware Overview 1-1
Keyboard 2-14
Memory Expansion Options 2-113
System Board 2-3,2-4
System Board Component Diagram 2-13
System Memory Map 2-27
ROM and System Usage 3-1
ROM BIOS
BIOS Cassette Logic 3-8
BIOS Memory Map 3-8
Cassette Read 3-9
Cassette Write 3-9
Data Record Architecture 3-10
Description 3-2
Error Recovery 3-10
Interrupt 15 3-8
Interrupt ICH Timer Tick 3-5
Interrupt IDH Video Parameters 3-5
Interrupt IEH Diskette Parameters 3-5
Interrupt IFH Graphics Character Extensions 3-6
Interrupt Vector Listing 3-3
Other Read/Write Memory Usage 3-7
ROM BIOS Listing Appendix A
ROS (Read Only Storage) (See ROM)
ROM, Request for Master 2-92
RS232-C (See Asynchronous Communications Adapter)
RTS (Ready to Send) 2-123
R/W (Read/Write)
Symbol Description 2-95
2-123
1-17
s
Scan Codes 2-17
Screen 2-43
Schematic (See Logic Diagrams)
SCROLL LOCK 3-15
Selecting the Interface Format 2-146
Sequence of Events 2-59
Serial Input (SIN) 2-130
Serial Output (SOUT) 2-132
Setting the DIP Switches 2-72
Shift In 2-80
Shift Out 2-80
Shift States 3-14
SI (Shift In) 2-80
Signal Requirements 2-36
SIN (Serial Input) 2-130
SO 2-80
Software Algorithms 3-8
SOUT (Serial Output) 3-132
Speaker
Drive System Block Diagram 2-22
Interface 2-22
Special Handling 3-15
Special Timing 2-39
Specifications
5 1/4" Diskette Drive 2-112
Printer 2-71
System Appendix E
Status Registers
Color/Graphics 2-59
0(5 1/4" Diskette Drive Adapter) 2-100
1 (5 1/4" Diskette Drive Adapter) 2-101
2 (5 1/4" Diskette Drive Adapter) 2-102
3 (5 1/4" Diskette Drive Adapter) 2-103
Storage (See Memory)
Strobe
Address 2-129
Data Output 2-129
Summary of Available Colors 2-55
Switch Settings
Configurable Start Address 2-115
5 1/4" Diskette Drives 2-29
32/64 KB Memory Expansion Option 2-31
Monitor Type 2-29
System Board Memory 2-30
1-18
System Board
Cassette Interface Connector Specifications 2-21
Cassette Jumpers 2-19
Cassette User Interface 2-19
Circuit Block Diagrams (Cassette) 2-19
Component Diagram 2-13
Data Flow 2-6
5 1/4" Diskette Drive Switch Settings 2-29
I/O Address Map 2-23
I/O Channel 2-8
I/O Channel Description 2-10
I/O Channel Diagram 2-9
Keyboard 2-14
Keyboard Diagram 2-16
Keyboard Interface Block Diagram 2-15
Keyboard Interface Connector Specifications 2-18
Keyboard Scan Codes 2-17
32/64 KB Memory Expansion Option Switch Settings
Memory Switch Settings 2-30
Monitor Type Switch Settings 2-29
Speaker Drive System Block Diagram 2-22
Speaker Interface 2-22
System Memory Map 2-25
System Expansion Slots (See I/O Slots) 2-3
System Memory Map 2-25
System Memory Map (16 KB Increments) 2-26
System Unit 1-1
System Unit Power Connector 2-35
System Usage (ROM and) 3-1
2-31
T
Tab (Vertical) 2-79
T/C (Terminal Count) 2-12
Terminal Count (T/C) 2-12
THR (Transmitter Holding Register) 2-145
Timing Generator 2-48
Transmit Circuit 2-127
Transmit Data (TX) 2-127
Transmitter Holding Register (THR) 2-145
Transmitter Output and Receiver Input 2-126
Trigger Buttons 2-118
TX Data (Transmit Data) 2-127
1-19
u
Unit Specifications Appendix E
Usage (Keyboard) 3-17
Use of BIOS 3-2
User Interface (Cassette) 2-19
v
Vectors
(O-7F Interrupt) 3-21
(Interrupt Listing) 3-3
Vectors With Special Meaning
Interrupt 1CH Timer Tick 3-5
Interrupt IDH Video Parameters 3-5
Interrupt lEH Diskette Parameters 3-5
Interrupt IFH Graphics Character Extensions 3-6
Other Read/Write Memory Usage 3-6
Vertical Drive 2-43
Video
Monitor 2-62
(Reverse) 2-45
Signal 2-43
Voltage Interchange Information 2-128
Voltage
Power Supply 2-33
I/O Channel 2-8
System Board I/O Channel Description 2-10
Keyboard Interface Connector Specifications 2-18
Cassette Interface Connector Specifications 2-21
Speaker Interface 2-22
Power Supply 2-33
Power Supply Location 2-34
Important Operating Characteristics 2-36
Color Graphics Monitor Adapter Direct Drive and
Composite Interface Pin Assignment 2-62
Color/Graphics Monitor Adapter Auxiliary Video
Connectors 2-62
Printer Specifications 2-71
Game Controller Adapter (Analog Input) Connector
Specifications 2-122
Voltage Interchange Information, Asynchronous Communications
Adapter 2-128
Selecting the Interface Format, Asynchronous Communications
Adapter 2-146
1-20
w
Workspace (BASIC Variables) 3-23
Write (Cassette) 3-8
Write (Cassette Interface Hardware) 2-20
Write Data 2-106
Write Enable 2-106
Write Protect 2-107
Numerics
5 1/4" Diskette Drive 2-110
5 1/4" Diskette Drive Adapter 2-91
32/64 KB Memory Expansion Options 1-3
80 CPS Matrix Printer, IBM 2-70
80 Interpreter, BASIC 1-1
6845 CRT Controller 2-48
8080 Parity Flags B-1
8088, Intel 2-3
8250 INS Accessible Registers 2-134
RS232C-A Asynchronous Communications Adapter 2-123
1-21
NOTES
1-22
The Personal Computer
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