Intel® 64 And IA 32 Architectures Software Developer’s Manual Volume 2B: Instruction Set Reference, M U Developer Vol 2b
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- Chapter 4 Instruction Set Reference, M-U
- 4.1 Imm8 Control Byte Operation for PCMPESTRI / PCMPESTRM / PCMPISTRI / PCMPISTRM
- 4.2 Common Transformation and Primitive Functions for SHA1XXX and SHA256XXX
- 4.3 Instructions (M-U)
- MASKMOVDQU—Store Selected Bytes of Double Quadword
- MASKMOVQ—Store Selected Bytes of Quadword
- MAXPD—Maximum of Packed Double-Precision Floating-Point Values
- MAXPS—Maximum of Packed Single-Precision Floating-Point Values
- MAXSD—Return Maximum Scalar Double-Precision Floating-Point Value
- MAXSS—Return Maximum Scalar Single-Precision Floating-Point Value
- MFENCE—Memory Fence
- MINPD—Minimum of Packed Double-Precision Floating-Point Values
- MINPS—Minimum of Packed Single-Precision Floating-Point Values
- MINSD—Return Minimum Scalar Double-Precision Floating-Point Value
- MINSS—Return Minimum Scalar Single-Precision Floating-Point Value
- MONITOR—Set Up Monitor Address
- MOV—Move
- MOV—Move to/from Control Registers
- MOV—Move to/from Debug Registers
- MOVAPD—Move Aligned Packed Double-Precision Floating-Point Values
- MOVAPS—Move Aligned Packed Single-Precision Floating-Point Values
- MOVBE—Move Data After Swapping Bytes
- MOVD/MOVQ—Move Doubleword/Move Quadword
- MOVDDUP—Replicate Double FP Values
- MOVDQA,VMOVDQA32/64—Move Aligned Packed Integer Values
- MOVDQU,VMOVDQU8/16/32/64—Move Unaligned Packed Integer Values
- MOVDQ2Q—Move Quadword from XMM to MMX Technology Register
- MOVHLPS—Move Packed Single-Precision Floating-Point Values High to Low
- MOVHPD—Move High Packed Double-Precision Floating-Point Value
- MOVHPS—Move High Packed Single-Precision Floating-Point Values
- MOVLHPS—Move Packed Single-Precision Floating-Point Values Low to High
- MOVLPD—Move Low Packed Double-Precision Floating-Point Value
- MOVLPS—Move Low Packed Single-Precision Floating-Point Values
- MOVMSKPD—Extract Packed Double-Precision Floating-Point Sign Mask
- MOVMSKPS—Extract Packed Single-Precision Floating-Point Sign Mask
- MOVNTDQA—Load Double Quadword Non-Temporal Aligned Hint
- MOVNTDQ—Store Packed Integers Using Non-Temporal Hint
- MOVNTI—Store Doubleword Using Non-Temporal Hint
- MOVNTPD—Store Packed Double-Precision Floating-Point Values Using Non-Temporal Hint
- MOVNTPS—Store Packed Single-Precision Floating-Point Values Using Non-Temporal Hint
- MOVNTQ—Store of Quadword Using Non-Temporal Hint
- MOVQ—Move Quadword
- MOVQ2DQ—Move Quadword from MMX Technology to XMM Register
- MOVS/MOVSB/MOVSW/MOVSD/MOVSQ—Move Data from String to String
- MOVSD—Move or Merge Scalar Double-Precision Floating-Point Value
- MOVSHDUP—Replicate Single FP Values
- MOVSLDUP—Replicate Single FP Values
- MOVSS—Move or Merge Scalar Single-Precision Floating-Point Value
- MOVSX/MOVSXD—Move with Sign-Extension
- MOVUPD—Move Unaligned Packed Double-Precision Floating-Point Values
- MOVUPS—Move Unaligned Packed Single-Precision Floating-Point Values
- MOVZX—Move with Zero-Extend
- MPSADBW — Compute Multiple Packed Sums of Absolute Difference
- MUL—Unsigned Multiply
- MULPD—Multiply Packed Double-Precision Floating-Point Values
- MULPS—Multiply Packed Single-Precision Floating-Point Values
- MULSD—Multiply Scalar Double-Precision Floating-Point Value
- MULSS—Multiply Scalar Single-Precision Floating-Point Values
- MULX — Unsigned Multiply Without Affecting Flags
- MWAIT—Monitor Wait
- NEG—Two's Complement Negation
- NOP—No Operation
- NOT—One's Complement Negation
- OR—Logical Inclusive OR
- ORPD—Bitwise Logical OR of Packed Double Precision Floating-Point Values
- ORPS—Bitwise Logical OR of Packed Single Precision Floating-Point Values
- OUT—Output to Port
- OUTS/OUTSB/OUTSW/OUTSD—Output String to Port
- PABSB/PABSW/PABSD/PABSQ — Packed Absolute Value
- PACKSSWB/PACKSSDW—Pack with Signed Saturation
- PACKUSDW—Pack with Unsigned Saturation
- PACKUSWB—Pack with Unsigned Saturation
- PADDB/PADDW/PADDD/PADDQ—Add Packed Integers
- PADDSB/PADDSW—Add Packed Signed Integers with Signed Saturation
- PADDUSB/PADDUSW—Add Packed Unsigned Integers with Unsigned Saturation
- PALIGNR — Packed Align Right
- PAND—Logical AND
- PANDN—Logical AND NOT
- PAUSE—Spin Loop Hint
- PAVGB/PAVGW—Average Packed Integers
- PBLENDVB — Variable Blend Packed Bytes
- PBLENDW — Blend Packed Words
- PCLMULQDQ - Carry-Less Multiplication Quadword
- PCMPEQB/PCMPEQW/PCMPEQD— Compare Packed Data for Equal
- PCMPEQQ — Compare Packed Qword Data for Equal
- PCMPESTRI — Packed Compare Explicit Length Strings, Return Index
- PCMPESTRM — Packed Compare Explicit Length Strings, Return Mask
- PCMPGTB/PCMPGTW/PCMPGTD—Compare Packed Signed Integers for Greater Than
- PCMPGTQ — Compare Packed Data for Greater Than
- PCMPISTRI — Packed Compare Implicit Length Strings, Return Index
- PCMPISTRM — Packed Compare Implicit Length Strings, Return Mask
- PDEP — Parallel Bits Deposit
- PEXT — Parallel Bits Extract
- PEXTRB/PEXTRD/PEXTRQ — Extract Byte/Dword/Qword
- PEXTRW—Extract Word
- PHADDW/PHADDD — Packed Horizontal Add
- PHADDSW — Packed Horizontal Add and Saturate
- PHMINPOSUW — Packed Horizontal Word Minimum
- PHSUBW/PHSUBD — Packed Horizontal Subtract
- PHSUBSW — Packed Horizontal Subtract and Saturate
- PINSRB/PINSRD/PINSRQ — Insert Byte/Dword/Qword
- PINSRW—Insert Word
- PMADDUBSW — Multiply and Add Packed Signed and Unsigned Bytes
- PMADDWD—Multiply and Add Packed Integers
- PMAXSB/PMAXSW/PMAXSD/PMAXSQ—Maximum of Packed Signed Integers
- PMAXUB/PMAXUW—Maximum of Packed Unsigned Integers
- PMAXUD/PMAXUQ—Maximum of Packed Unsigned Integers
- PMINSB/PMINSW—Minimum of Packed Signed Integers
- PMINSD/PMINSQ—Minimum of Packed Signed Integers
- PMINUB/PMINUW—Minimum of Packed Unsigned Integers
- PMINUD/PMINUQ—Minimum of Packed Unsigned Integers
- PMOVMSKB—Move Byte Mask
- PMOVSX—Packed Move with Sign Extend
- PMOVZX—Packed Move with Zero Extend
- PMULDQ—Multiply Packed Doubleword Integers
- PMULHRSW — Packed Multiply High with Round and Scale
- PMULHUW—Multiply Packed Unsigned Integers and Store High Result
- PMULHW—Multiply Packed Signed Integers and Store High Result
- PMULLD/PMULLQ—Multiply Packed Integers and Store Low Result
- PMULLW—Multiply Packed Signed Integers and Store Low Result
- PMULUDQ—Multiply Packed Unsigned Doubleword Integers
- POP—Pop a Value from the Stack
- POPA/POPAD—Pop All General-Purpose Registers
- POPCNT — Return the Count of Number of Bits Set to 1
- POPF/POPFD/POPFQ—Pop Stack into EFLAGS Register
- POR—Bitwise Logical OR
- PREFETCHh—Prefetch Data Into Caches
- PREFETCHW—Prefetch Data into Caches in Anticipation of a Write
- PREFETCHWT1—Prefetch Vector Data Into Caches with Intent to Write and T1 Hint
- PSADBW—Compute Sum of Absolute Differences
- PSHUFB — Packed Shuffle Bytes
- PSHUFD—Shuffle Packed Doublewords
- PSHUFHW—Shuffle Packed High Words
- PSHUFLW—Shuffle Packed Low Words
- PSHUFW—Shuffle Packed Words
- PSIGNB/PSIGNW/PSIGND — Packed SIGN
- PSLLDQ—Shift Double Quadword Left Logical
- PSLLW/PSLLD/PSLLQ—Shift Packed Data Left Logical
- PSRAW/PSRAD/PSRAQ—Shift Packed Data Right Arithmetic
- PSRLDQ—Shift Double Quadword Right Logical
- PSRLW/PSRLD/PSRLQ—Shift Packed Data Right Logical
- PSUBB/PSUBW/PSUBD—Subtract Packed Integers
- PSUBQ—Subtract Packed Quadword Integers
- PSUBSB/PSUBSW—Subtract Packed Signed Integers with Signed Saturation
- PSUBUSB/PSUBUSW—Subtract Packed Unsigned Integers with Unsigned Saturation
- PTEST- Logical Compare
- PTWRITE - Write Data to a Processor Trace Packet
- PUNPCKHBW/PUNPCKHWD/PUNPCKHDQ/PUNPCKHQDQ— Unpack High Data
- PUNPCKLBW/PUNPCKLWD/PUNPCKLDQ/PUNPCKLQDQ—Unpack Low Data
- PUSH—Push Word, Doubleword or Quadword Onto the Stack
- PUSHA/PUSHAD—Push All General-Purpose Registers
- PUSHF/PUSHFD—Push EFLAGS Register onto the Stack
- PXOR—Logical Exclusive OR
- RCL/RCR/ROL/ROR—Rotate
- RCPPS—Compute Reciprocals of Packed Single-Precision Floating-Point Values
- RCPSS—Compute Reciprocal of Scalar Single-Precision Floating-Point Values
- RDFSBASE/RDGSBASE—Read FS/GS Segment Base
- RDMSR—Read from Model Specific Register
- RDPID—Read Processor ID
- RDPKRU—Read Protection Key Rights for User Pages
- RDPMC—Read Performance-Monitoring Counters
- RDRAND—Read Random Number
- RDSEED—Read Random SEED
- RDTSC—Read Time-Stamp Counter
- RDTSCP—Read Time-Stamp Counter and Processor ID
- REP/REPE/REPZ/REPNE/REPNZ—Repeat String Operation Prefix
- RET—Return from Procedure
- RORX — Rotate Right Logical Without Affecting Flags
- ROUNDPD — Round Packed Double Precision Floating-Point Values
- ROUNDPS — Round Packed Single Precision Floating-Point Values
- ROUNDSD — Round Scalar Double Precision Floating-Point Values
- ROUNDSS — Round Scalar Single Precision Floating-Point Values
- RSM—Resume from System Management Mode
- RSQRTPS—Compute Reciprocals of Square Roots of Packed Single-Precision Floating-Point Values
- RSQRTSS—Compute Reciprocal of Square Root of Scalar Single-Precision Floating-Point Value
- SAHF—Store AH into Flags
- SAL/SAR/SHL/SHR—Shift
- SARX/SHLX/SHRX — Shift Without Affecting Flags
- SBB—Integer Subtraction with Borrow
- SCAS/SCASB/SCASW/SCASD—Scan String
- SETcc—Set Byte on Condition
- SFENCE—Store Fence
- SGDT—Store Global Descriptor Table Register
- SHA1RNDS4—Perform Four Rounds of SHA1 Operation
- SHA1NEXTE—Calculate SHA1 State Variable E after Four Rounds
- SHA1MSG1—Perform an Intermediate Calculation for the Next Four SHA1 Message Dwords
- SHA1MSG2—Perform a Final Calculation for the Next Four SHA1 Message Dwords
- SHA256RNDS2—Perform Two Rounds of SHA256 Operation
- SHA256MSG1—Perform an Intermediate Calculation for the Next Four SHA256 Message Dwords
- SHA256MSG2—Perform a Final Calculation for the Next Four SHA256 Message Dwords
- SHLD—Double Precision Shift Left
- SHRD—Double Precision Shift Right
- SHUFPD—Packed Interleave Shuffle of Pairs of Double-Precision Floating-Point Values
- SHUFPS—Packed Interleave Shuffle of Quadruplets of Single-Precision Floating-Point Values
- SIDT—Store Interrupt Descriptor Table Register
- SLDT—Store Local Descriptor Table Register
- SMSW—Store Machine Status Word
- SQRTPD—Square Root of Double-Precision Floating-Point Values
- SQRTPS—Square Root of Single-Precision Floating-Point Values
- SQRTSD—Compute Square Root of Scalar Double-Precision Floating-Point Value
- SQRTSS—Compute Square Root of Scalar Single-Precision Value
- STAC—Set AC Flag in EFLAGS Register
- STC—Set Carry Flag
- STD—Set Direction Flag
- STI—Set Interrupt Flag
- STMXCSR—Store MXCSR Register State
- STOS/STOSB/STOSW/STOSD/STOSQ—Store String
- STR—Store Task Register
- SUB—Subtract
- SUBPD—Subtract Packed Double-Precision Floating-Point Values
- SUBPS—Subtract Packed Single-Precision Floating-Point Values
- SUBSD—Subtract Scalar Double-Precision Floating-Point Value
- SUBSS—Subtract Scalar Single-Precision Floating-Point Value
- SWAPGS—Swap GS Base Register
- SYSCALL—Fast System Call
- SYSENTER—Fast System Call
- SYSEXIT—Fast Return from Fast System Call
- SYSRET—Return From Fast System Call
- TEST—Logical Compare
- TZCNT — Count the Number of Trailing Zero Bits
- UCOMISD—Unordered Compare Scalar Double-Precision Floating-Point Values and Set EFLAGS
- UCOMISS—Unordered Compare Scalar Single-Precision Floating-Point Values and Set EFLAGS
- UD2—Undefined Instruction
- UNPCKHPD—Unpack and Interleave High Packed Double-Precision Floating-Point Values
- UNPCKHPS—Unpack and Interleave High Packed Single-Precision Floating-Point Values
- UNPCKLPD—Unpack and Interleave Low Packed Double-Precision Floating-Point Values
- UNPCKLPS—Unpack and Interleave Low Packed Single-Precision Floating-Point Values