690305_PDP 11_Electrical_Design_Review 690305 PDP 11 Electrical Design Review
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INTEROFFICE
MEMORANDUM
DATE:
5
March
1969
SUB.JECT:
PDP-II
Electrical
Design
Review
(Second
Session)
TO:
PDP-II
'Design
Review
committee
FROM:
CC:
Engineering
Committee
Ro(ier
Cady
Nick
Mazzarese
Jerry
Butler
The
second
session
24
February
1969.
R.
Best,
G.
Fligg,
of
the
Design
Review,was
held
on
Monday,
Present
were:
G.
Saviers,
I.
Morris,
R.
Cady,
A.
Kotok,
R.
Pyle,
W.
Moroney
(for
D.
Dubary).
Comments
On
Last
Meeting
Minutes
Roger
Cady
said
that
the
market
for
the
PDP-II
should
include
the
single
user
as
v-Jell
as
O.E.M.
New
Topics
Discu~sion
continued
on
the
addressing
scheme.
Roger
out-
lines
some
changes
to
the
addressing
format.
copies
of
these
changes
were
passed
out
at
the
meeting.
The
committee
commented
that
the
new
scheme
takes
away
the
ability
to
address
the
major
registers
in
the
address
field
easily
for
register
to
register
operations
(using
a
single
byte
address).
Roger
recommended
that
a
set
of
register
to
register
instructions
is
being
considered
for
addition
to
the
machine.
It
was
commented
that
perhaps
the
auto
increment
capability
would
be
more
useful
incrementing
memory
instead
of
the
hardware
registers.
Load
byte
was
discussed
again,
and
most
agreed
that
load
byte
should
copy
the
sign
into
the
upper
byte
(contrary
to
our
previous
'comment),
as
long
as
all
byte
instructions
did
something
consistent
with
the
sign.
Also,
since
ASCII
characters
are
really
7-bit
characters,
the
sign
bit
shouldn't
give
much
trouble
when
handling
characters.
DIGITAL
EQUIPMENT
CORPORATION.
MAYNARD,
MASSACHUSETTS
PDP-II
Electrical
Design
Review
-2-
G.
Butler
~t-
Mnemonics
for
inc::lusive
.~
jump
to
subroutine
instructions
were
disC'ussed.
Inclusive
should
include
lIinclusive
ll
in
the
mnemonics
(~OR).
The
jump
to
subroutine
instructions
should
have
a
mnemonic
different
than
other
DEC
machines
as
it
behaves
differently(i.e.
don't
use
JSR,
JMS,
etc.).
The
break
point
jump
facility
should
go
to
a
fixed
location
in
page
0
but
not
location
zero.
A
comment
was
made
suggesting
doing
away
with
increment
and
decrement
AC
instructions
and
adding
more
sophisticated
rotates
or
leave
open
holes
in
the
op
code
for
future
expansion.
Alan
Kotok
suggested
considering
a
"multiply
step"
instruction
(like
the
PDP-l),
to
the
machine
to
improve
subroutine
multiples.
It
was
pointed
out
that
register
N
and
bit
N
of
the
condition
codes
may
have
a
name
conflict
when
trying
to
document
the
machine.
Topics
for
the
next
meeting
(AprilS,
1:00
PM,
N.
Mazzarese's
Conference
Room)
include:
1.
More
on
architecture
and
instruction
set
2.
I/O
philosophy
and
sequences
Please
notify
me
if
any
errors
or
omissions
have
been
made
in
these
minutes.
