70 01 752 U__70_752_Video_Data_Terminal_Maintenance_Manual_Oct73 U Video Data Terminal Maintenance Manual Oct73
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sr::>E~v-L.UNIVAC
T
COMPUTER SYSTEMS
Customer
Engineering
SERIES 70
MODEL 70/752 VIDEO DATA TERMINAL
Maintenance Manual
70-01-752-U
REVISION INSTRUCTIONS AND MANUAL HISTORY
EQUIPMENT:
70/752 Video Data Terminal
PURPOSE:
Adds Theory and Parts location information for the RCA High Voltage Power Supply (2166024) to 701752
Reissue, dated 080169.
NOTE:
PUBLICATION NO.
70-01-752-1
This revision reflects ERL 25 only; ERl 21 thru 24 are not included.
REVISION INSTRUCTIONS:
Delete and add pages as shown on the following table. File this page in front of page iii.
DELETE
ADD
Title page, ii, A85
Title page, iiA, 5·29 thru 5·34, A85 thru A97
NOTE: Revised pages are marked with the Rev. No. in the upper unbound comer. Revised areas are marked with a
vertical bar.
MANUAL HISTORY
REV.
NO.
1st Ptg.
2nd Ptg.
Rev.1
-REV.
TYPE
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080169
032770
CONTROL
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12/69
70-01-752-1
iiA
REVISION INSTRUCTIONS AND MANUAL HISTORY
EQUIPMENT:
PURPOSE:
PUBLICATION NO. 70-01-752-2
70/752 Video Data Terminal
Incorporates a new Keyboard Drive Train Adjustment procedure.
REVISION INSTRUCTIONS:
Delete and add pages as shown on the following table. File this page in front of page iiA.
DELETE
ADD
4·20
iiB, 4-20, 4-20A, 4·20B
NOTE: Revised pages are marked with the Rev. No. in the upper unbound comer. Revised areas are marked with a
vertical bar.
MANUAL HISTORY
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12/69
70-01-752-2
iiB
REVISION INSTRUCTIONS AND MANUAL HISTORY
PUBLICATION NO. 70-01-752-3
EQUIPMENT:
701752 Video Data Terminal
PURPOSE:
This revision incorporates all outstanding 701752 TiPs (except PM and recommended spares) to appropriate
sections of the maintenance manual for the Model 701752 Video Data Terminal.
Also included in this revision are important cautions pertaining to the new High Voltage Power Supply
(2166024·503). The cautions contain mandatory instructions relating to power supply adjustments when
components of the supply are replaced.
REVISION INSTRUCTIONS:
Delete and add pages as shown on the following table. File this page in front of pageiiB.
ADD
DELETE
1-15,1-16,4-7,4-8,4-15,4-16,4-19, thru 4-208,
4-31 thru 4-36,4-43. 4-44. 6-29 thru 5-34.
701752 TIPs #3.1, #4.2, #5. #6, #7, #8, #13, #14,
iiC, 1-15,1-16,4-7,4-8, 4-14A, 4-148, 4-15/4-16,
4-19.4-20. 4-2OA, 4-208, 4-31, 4-32, 4-32A. 4-32B,
4-33.4-34,4-35,4-36. 4-36A/4-36B, 4-43, 4-44,
4-45, 4-46. 5-29 thru 5-35
#15, #17
NOTE: Revised pages are marked with the Rev. No. in the upper unbound comer. Revised areas are marked with a
vertical bar.
MANUAL HISTORY
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-REV.
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REVISION INSTRUCTIONS AND MANUAL HISTORY
70-01-752-4
EQUIPMENT:
Model 70/752 Video Data Terminal
PURPOSE:
This revision adds a CAUTION to the Deflection Yoke replacement procedure to ensure that the associated
Deflection Amplifier is modified (when necessary) to increase the horizontal gain to produce the correct
screen raster.
PUBLICATION NO.
Also included in this revision are CAUTIONS and revised resistor values to the Deflection Amplifier IPB.
REVISION INSTRUCTIONS:
Delete and add pages as shown on the following table. File this page in front of page
DELETE
iiC.
ADD
iiD, 4-13, 4-14, A19, A20, A43, A44
4-13,4-14, A19, A20, A43. A44
NOTE: Revised pages are marked with the Rev. No. in the upper unbound corner. Revised areas are marked with a
vertical bar.
MANUAL HISTORY
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*REV.
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70-01-752-4
iiI)
REVISION INSTRUCTIONS AND MANUAL HISTORY
PUBLICATION NO.
EQUIPMENT:
Model 70/752 Video Data Terminal
PURPOSE:
This revision contains an entirely new Illustrated Parts Breakdown for the mechanical keyboard used in the
70-01-752-5
Video Data Terminal. Numerous parts and assemblies not previously identified are added. along with
associated part numbers. Vendor part numbers are listed wherever RCA numbers are not available.
This revision also corrects stock numbers in the Viewer plug-in boards.
REVISION INSTRUCTIONS:
Delete and add pages as shown on the following table. File this page in front of page iiD.
DELETE
ADD
Pages A1 through A8, At5, At6, At9, A20, A33, A34, A41.
Pages iiE. At through A8U/A8V. A15. A1S. A19. A20. A33.
A42. A47, and A48.
A34. A41. A42. A47. and A48.
NOTE: Revised pages are marked with the Rev. No. in the upper unbound comer. Revised areas are marked with a
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MANUAL HISTORY
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DOC. NO.
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REVISION INSTRUCTIONS AND MANUAL HISTORY
PUBLICATION NO.
EQUIPMENT:
Model 70/752 Video Data Terminal
PURPOSE:
To delete obsolete information on the 2166024-503 High Voltage Power Supply that has been revised and incorporated
into the power supply manual, 70-01-SPS, 2166024-503.
REVISION INSTRUCTIONS:
70-01-752-6
Delete and add pages as shown on the following table. File this page in front of page iiE.
DELETE
ADD
iiF. and 5-29/5-30
5-29 thru 5-36
,
NOTE: Revised pages are marked with the Rev. No. in the upper unbound comer. Revised areas are marked with a
vertical bar.
MANUAL HISTORY
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70-01-762-6
iiF
REVISION INSTRUCTIONS AND MANUAL HISTORY
PUBLICATION NO.
EQUIPMENT:
Model 70/752 Video Data Terminal
PURPOSE:
This revision adds a delay line adjustment procedure that enables conversion of Delay Line 2188422·2, used
in the 8752 Video Data Terminal, to Delay Line 2187310·3 for use in the 701752 Video Data Terminal.
REVISION INSTRUCTIONS:
70-01-752-7
Delete and add pages as shown on the following table. File this page in front of page iiF.
DELETE
ADD
Page 4-36A/4-36B.
Page iiG, and 4-36A through 4-36E.
,
NOTE: Revised pages are marked with the Rev. No. in the upper unbound comer. Revised areas are marked with a
vertical bar.
MANUAL HISTORY
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70-01-152-1·
iiG.
REVISION INSTRUCTIONS AND MANUAL HISTORY
EQUIPMENT:
Model 70/752 Video Data Terminal
PURPOSE:
Provides information for the incorporation of the Data Set Cable, Special Feature 5166. Adds installation
requirements for the Flexible Character Array, Special Feature 5734-01.
REVISION INSTRlICTIONS:
PUBLICATION NO.
Delete and add pages as shown on the following tahle. File this page in front of page iiG.
DELETE
ADO
Pages iiH, 1-21, 1-22,3-73, and 3-74
Pages 1-21, 1-22,3-73, and 3-74
NOTE:
70-01-752-8
Revised pages are marked with the Rev. No. in the upper unbound corner. Revised areas are marked with a
vertical bar.
MANUAL HISTORY
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-:At.,
....
70-01-752-8
iiH
UNIVAC SERIES 70
REVISION INSTRUCTIONS AND MANUAL HISTORY
EQUIPMENT:
Model 70/752 Video Data Terminal
PURPOSE:
This revision contains the following:
PUBLICATION NO.
70-01-752-UR9
1. Corrects contents pages to reflect changes made by previous revisions.
2. Adds new delay line parts breakdown to Appendix 8, Pages 815 and 816.
REVISION INSTRUCTIONS:
Delete and add pages as shown in the below table. File this page in front of page iiH.
ADD
DELETE
RCA Title Page, Pages iii thru xi, Aii
UNIVAC Title Page, Pages iii, iii thru xiii, Ai thru Aiv,
815,816
NOTE: Revised pages are marked with the UNIVAC Rev. No. in the upper unbound comer. Revised areas are marked
with a vertical bar.
MANUAL HISTORY
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UR - UNIVAC REVISION
70-01-752-UR9
iiI
UNIVAC SERIES 70
REVISION INSTRUCTIONS AND MANUAL HISTORY
EQUIPMENT:
Model 70/752 Video Data Terminal
PUBLICATION NO.
PURPOSE:
This interim revision changes the 70/752 Maintenance Manual as follows:
70-01-752-UR10
1. Adds tWO callouts to Figure 28 to identify the left-hand and right·hand key lever spring on the Keyboard
Assembly.
2.. Adds crQss references between early and late models of Keyboard Assembly.
REVISION INSTRUCTIONS:.
Del;i~ and ad4pages as shown
.
in the below table. File this pale in front of page iii •
. .,.
ADD
DELETE
Pages A5, A6, A7, A8, and A8C/A80
Pages iiJ, A5, A6. A7, A8 and A8C/A80
NOTE: Revised pages are marked with the UNIVAC Rev. No. in the upper Q;tlbounde<>mer. Revised areas are marked
with a vertical bar.
MANUAL HISTORY
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UR - UNIVAC REVISION
iiI
70-01-7S2-UR10
UR9
CONTENTS
SECTION ONE-INTRODUCTION
1.1
1.1.1
1.2
1.3
1.4
1.4.1
1.4.2
1.5
1.5.1
1.5.2
1.5.3
1.6
1.7
1.7.1
1.7.2
GENERAL . . . . . . . . . . . .
SYSTEM CONFIGURATION
FUNCTIONAL DESCRIPTION
Data Entry . . . . . . . . . .
Character Generation . . . . .
Editing of Composed Message
Message Transmission
CHARACTERISTICS . . . .
MAJOR ASSEMBLIES AND SUBASSEMBLIES
CONTROL PANEL
Matrix Switch Controls.
Keyboard . . . . . . . .
VIEWER . . . . . . . .
Logic Nest, A 1 through A6 .
Delay Line Memory, A7 ..
Character Generator . . . .
Video Section, A 11, A 12, and A20 .
Deflection Section, A9 . . . . . .
Low Voltage Power Supply, A 14 .
High Voltage Power Supply, A 13
MODES OF OPERATION
WRITEMODE . . . .
TRANSMIT MODE
RECEIVE MODE
CONTROLS AND INDICATORS
FEATURES . . . . . . .
STANDARD FEATURES . . .
Data Insert . . . . . . . . . . .
Message Segment Address (MSA)
SPECIAL FEATURES . . . . .
Keyboard Extension, Special Feature 5713
Data Format, Special Feature 5710
Printer Adapter, Special Feature 5711 . . .
Station Select, Special Feature 5707 . . . .
Video Data Switch (701755) . . . . . . . .
Flexible Character Array, Special Feature 5734-01
Data Set Cable, Special Feature 5766 . . . . . .
1-1
1-1
1-2
1-2
1-2
1-4
1-4
1-4
1-6
1-6
1-8
1-8
1-8
1-8
.1-10
.1-10
.1-11
.1-11
.1-11
.1-11
.1-11
.1-11
.1-11
.1-12
.1-13
.1-13
.1-13
.1-13
.1-15
.1-20
.1-20
.1-20
.1-21
.1-21
.1-21
.1-22
.1-22
SECTION TWO-INSTALLATION
GENERAL
. . . . . . . 2-1
iii
I
UR9
CONTENTS (Contd)
SECTION THREE-THEORY
3.1
3.2
3.2.1
3.2.2
3.3
3.3.1
3.3.2
3.3.3
3.3.4
3.4
3.4.1
3.4.2
I
3.4.3
3.4.4
3.4.5
iv
GENERAL
..... .
. . . . . . . . 3-1
. . . . . . . . 3-1
INTERFACE . . . . . .
. 3-1
LOCAL CONNECTION
REMOTE CONNECTION
3-1
FUNCTIONAL DESCRIPTION
3-1
KEYBOARD ENTRY . . .
3-2
MESSAGE TRANSMISSION
3-2
MESSAGE RECEPTION ..
3-3
VDT SYNCHRONIZATION
3-3
WAIT, START and HOLD Flip-Flops
3-3
Sync Pulse Generation . . . . . . . .
3-4
Sync Pulse Generation During the Power Up Sequence
3-5
LOGIC DESCRIPTION . . . . . . . . . . . . . . .
3-6
PRINTER TERMINATOR AND OSCILLATOR, A6
3-6
Spike Suppression Logic
3-9
TIMING LOGIC, A5
3-9
Timing Requirements
3-9
Functional Parts of A5
.3-10
Tickler Frequency Generation
.3-10
Two Phase Pulse Former . . .
.3-10
TBA and TBB Generation
.3-10
Bit Time Counter, BCNT1-BCNT5
.3-12
Bit Time Decoding . . . . . . . .
.3-14
Character Counter, CHC1-CHC6
.3-14
Line Counter, LC1-LC5 . . . . .
.3-15
DELAY LINE MEMORY, A7 ..
.3-16
Laboratory for Electronics Delay Line Memory
.3-16
Digital Devices Delay Line Memory
.3-21
.3-21
REGISTER LOGIC CARD, A3
Delay Line Register, DLR
.3-21
Display Register, DR. . . . . . .
.3-22
.3-22
Delay Line Register Entry Circuit
Keyboard Parity Generator . . . .
.3-22
.3-22
Keyboard Parity Checker . . . . .
.3-22
Normal Recirculation of Stored Data
.3-25
Parallel Shift of Data From DLR to DR
Delay Line Memory Entry Circuit
.3-25
.3-27
MARK LOGIC . . . .
.3-28
Mark Position Sensing
.3-28
Backspace Operation . .
.3-28
Mark Advance Operation
.3-28
Mark Control Cycle Counter
UR9
CONTENTS (Contd)
3.5
3.5.1
3.5.2
3.6
3.6.1
3.6.2
3.6.3
3.6.4
,
Keyboard Entry
Data Insert . . .
Erase Functions
CHARACTER GENERATOR
SELECTION AMPLIFIER, A8
Digital-To-Analog Converters .
Of A Selection Switches
Differential Operational Amplifier
Operational Amplifier Feedback Circuits
Skew Compensation Circuit .. .
Horizontal Sweep Circuit . . . . .
Vertical Sweep Generation Circuit
Tickler Input . . . . . . .
Voltage Regulator Circuits
Zener Regulated Voltages
-9.1 vdc Isolation Circuit
+50 Volt Regulation Circuit
MONOSCOPE ASSEMBLY, A10
Voltage Divider Network, A 1OA2
Video Preamplifier A10A1 . . . .
VIDEO DISPLAY CIRCUITS SECTION
VIDEO DRIVER, A12
Character Video Input . . .
Character Unblank .. . . .
I ndex Mark and Parity Blank
Monoscope Sweep Gate (MSG)
CRT Drive Network . . . . .
Viewer CRT Brightness Control
DEFLECTION AMPLIFIER, A9
Vertical Deflection Amplifier
Voltage Sensing Circuit .
Output Amplifier Circuit . . .
Vertical Centering . . . . . .
Horizontal Deflection Amplifier
DYNAMIC FOCUS NETWORK, A20
Dynamic Focusing . . . .
TICKLER DRIVER, A11 ..
Mark Unblank Circuit
Viewer CRT Tickler Circuit
Constant Amplitude and Phase Adjust
Tickler Phase Balance Adjust . . . . .
High Gain Feedback Amplifier . . . .
Phase Lag-Negative Feedback Network
.3-29
.3-29
.3-29
.3-37
.3-37
.3-40
.3-40
.3-40
.3-40
.3-42
.3-42
.3-42
.3-44
.3-44
.3-44
.3-45
.3-45
.3-45
.3-46
.3-46
.3-46
.3-47
.3-47
.3-47
.3-49
.3-49
.3-49
.3-49
.3-49
.3-50
.3-50
.3-50
.3-50
.3-53
.3-53
.3-53
.3-54
.3-54
.3-54
.3-57
.3-57
.3-57
.3-58
v
I
UR9
CONTENTS (Contd)
3. 7
I
•
vi
INPUT/OUTPUT CIRCUITS . . . . . . . . . . . . . . . . . 3-58
3.7.1 INPUT/OUTPUT CONTROL LOGIC
.3-58
3.7.2 INPUT/OUTPUT TIMING CONTROL .
. . . ..
. .. 3-58
3.7.3 INPUT/OUTPUT BUFFER CONTROL
.3-70
Basis Receive Mode
.3-71
Shift Pulse Control
.3-71
Data Transfer . . .
.3-71
Buffer Control ..
.3-72
3.8
SPECIAL FEATURES
.3-72
3.8.1 STATION SELECT, SF 5707
.3-72
3.8.2 PRINTER ADAPTER, SF 5711
.3-73
3.8.3 DATA FORMAT, SF 5710 . .. . . . . . . .
.3-73
.3-74
3.8.4 LOGIC OPERATION AND KEYBOARD EXTENSION
3.8.5 FLEXIBLE CHARACTER ARRAY, SF 5734-01
.3-74
Variable Array Limit . . . . .
.3-74
General Purpose Timing Board
.3-78
KEYBOARD OPERATION
.3-80
3.9
.3-80
3.9.1 GENERAL . . . . . . . . . .
.3-80
3.9.2 CHARACTER SELECTION
.3-81
3.9.3 LATCH BAIL ROD . . . . .
.3-83
3.9.4 FI LTER SHAFT FUNCTIONS
Bail Rod Selection . . . .
.3-83
Latch Interposer Function . .
.3-83
Storage Bar Action . . . . . .
.3-83
Keyboard Strobe . . . . . . .
.3-84
Clutch Cycling Arm and Associated Linkage
.3-84
Anti-Backlash Cam Action . . . . . . . . .
.3-84
.3-84
3.9.5 SELECTION COMPENSATOR TUBE FUNCTION
GENERAL . . . . . . . . . . .
4-1
4.1
PREVENTIVE
MAINTENANCE
4-1
4.2
OPERATIONAL CHECKS . . .
4-1
4.3
KEYBOARD LUBRICATION
4-4
4.4
PARTS REMOVAL AND REPLACEMENT PROCEDURES
4-8
4.5
4-8
4.5.1 VIEWER . . . . . . . . . . . .
Module Boards, A 1 through A5
4-8
Delay Line, A7 . . . . .
4-8
Selection Amplifier, A8
4-9
Deflection Amplifier, A9
4-9
Monoscope, Al0 . . . .
4-9
Monoscope Preamplifier Assembly, Al0Al
.4-10
Tickler Driver Module Assembly, All. . . .
.4-10
Video Driver, A12 . . . . . . . . . . . . .
.4-10
High Voltage Power Supply Assembly, A 13
.4-11
UR9
CONTENTS (Contd)
Low Voltage Power Supply Assembly and Regulator
Assembly, A14Al
.. 4-11
Dynamic Focus, A20 . .
. . . . .
. .4-12
Keyboard Filter, A21
. . . . . . .
.4-13
Cathode Ray Tube . . .
. . .. . . . . . . . .
. .4-13
Deflection Yoke . . . . . . . . . . . . . . . . . . . .
..4-14
4.5.2 INTEGRATED CIRCUIT PACKAGE REPLACEMENT
. .4-14
Tools Required . . . . . . . . . . . . . . . . . . . .
. .4-14
General . . . . . . . . . . . .
. . . ..
.4-14A
Removal Procedure . . . . . .
. . . . .
. 4-14B
Installation Procedure . . . .
. . . . . . . . . . . .4-17
Alternate Method . . . . . .
. . . . . . . . . . . .4-17
4.5.3 CONTROL PANEL ASSEMBLY .
. . . . . . . . . . . .4-18
Keyboard . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-18
Switch Matrix Subassembly . . . . . . . . . . . . . . . . . . 4-19
Switch Matrix Alignment . . . . . . . ... . . . . . . . . . . .4-19
4.6
KEYBOARD ALIGNMENT AND ADJUSTMENTS . . . . . . 4-20
4.6.1 KEYBOARD DRIVE TRAIN ADJUSTMENT (FIELD) . . . .4-20
4.6.2 BAIL ROD AUGNMENT AND ADJUSTMENT (FACTORY) 4-20B
4.6.3 FI LTER SHAFT ALIGNMENT (FACTORY) . . . . . . . . .4-22
4.6.4 FI LTER SHAFT CLEARANCE . . . . . . . . . . . . . . . .4-23
4.6.5 FI LTER SHAFT ADJUSTMENT WITH CLUTCH MOUNTED
(FACTORY). . . . . . . . . . . . . . . . . . . . . . . . . . 4-24
4.6.6 BACKLASH CAM ADJUSTMENT (FIELD) . . . . . . . . . . 4-25
4.6.7 INTERPOSER LATCH SPRING ADJUSTMENT (FACTORY) 4-26
4.6.8 KEEPER ARM AND LATCH PAWL OVERTRAVEL
ADJUSTMENT (FIELD) . . . . . . . . . . . . . . . . . . . 4-27
4.6.9 LATCH PAWL CLEARANCE (FIELD) . . . . . . . . . . . . 4-28
4.6.10 COMPLETioN OF INTERPOSER LATCH SPRING
ADJ USTM ENT. . . . . . . . . . . . . . . ... . . . .
· . .4-28
.4-30
4.6.11 CLEVIS ROD ADJUSTMENT (FACTORY) . . . . . .
4.6.12 SWITCH STORAGE TIME ADJUSTMENT (FIELD) .
· . .4-31
4.6.13 REINSTALLATION OF BAIL-UP STOP (FIELD)
· ..4-32
4.7
ELECTRICAL ADJUSTMENTS . . . . . . . . .
· .4-32A
4.7.1 DEFLECTION AMPLIFIER ADJUSTMENTS ..
· .4-32A
4.7.2 VIDEO DRIVER, A12 . . . . . . . . . . . . . .
· .4-32B
.4-32B
4.7.3 TICKLER DRIVER ADJUSTMENTS,Al1 . . . . .
4.7.4 ELECTRICAL ADJUSTMENTS USING UNE MASK
(REFER TO DWG. 932817)
· .4-32B
Line Length Adjustment ..
· .4-32B
.4-33
Parity Error Block Check ..
Vertical Scan Adjustment .
· .. 4-33
vii
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UR9
CONTENTS (Contd)
4.7.5
4.7.6
4.7.7
4.7.8
4.7A
4.7A.l
HIGH VOLTAGE POWER SUPPLY, A13 (FACTORY) . . . .4-33
CHARACTER GENERATOR ALIGNMENT
. . . . 4-34
DEFLECTION YOKE ALIGNMENT
.....
. . . . .4-34
INTERLOCK ADJUSTMENT
.. . . ..
. . . . .4-35
TESTING . . . . . . . . . .
. . . . .
. .. .4-35
BACK-TO-BACK TESTING .
.4-35
LocalOperation . . . . . . .
. . . . .
. . . . 4-35
Off-Line Testing . . . . . • .
. .. .4-36
4.7.A.2TESTING PREAMPLIFIER 2100692-501
. . . . 4-36
Test Equipment Required . . . . . . . . .
. . . . . . .4-36
Preliminary Procedure . . . . . . . . . . .
. . . . . . . 4-36
Test Procedure . . . . . . . . . . . . . . . . . . . . . . . . 4-36A
4.7B CONVERSION OF DELAY LINE 2188422-2 TO DELAY
. . . . . . 4-36B
LINE 2187310-3 . . . . . . . . . . .
4.7B.l TEST EQUIPMENT REQUIRED
. . . 4-36B
4.7B.2DETECTOR THRESHOLD BALANCE
. . . 4-36B
4.7B.3 AMPLIFIER GAIN ADJUSTMENT ..
. .. 4-36B
4.8
TROUBLESHOOTING.........
. .. .4-37
4.8.1 DELAY LINE TROUBLESHOOTING .
. .. .4-55
Standard Conditions For Troubleshooting .
. .. .4-55
Delay Line Termination . . .
. . . . .4-55
Electrical Test of Transducers
. . . . .4-56
Delay Line Electronics
.. .4-56
Driver
.4-56
Amplifier . . . . . . .
. . .4-57
SECTION FIVE-POWER SUPPLY
LOW VOLTAGE POWER SUPPLY
INPUT POWER REQUIREMENTS
INPUT TRANSFORMER
CONTROLS AND INDICATORS .
DC RECTIFIERS . . . . . . . . .
SERIES VOLTAGE REGULATION .
Series Regu lator . . . . . . .
Differential Amplifier . . . .
Overvoltage Protection Circuit
5.1.6 ADJUSTMENT . . . . . . . .
Preliminary . . . . . . . . . .
Plus 75 Volt Adjustment .. .
Plus 25 Volt Adjustment .. .
Plus 4.5 Volt Overvoltage Adjustment
Plus 15 Volt Adjustment . . . . . . .
5.1
5.1.1
5.1.2
5.1.3
5.1.4
5.1.5
viii
5-1
5-1
5-1
5-2
5-2
5-2
5-2
5-2
5-5
5-5
5-5
5-5
5-6
5-6
5-7
UR9
CONTENTS (Contd)
5.2
5.2.1
5.2.2
5.2.3
5.2.4
5.3
5.3.1
5.3.2
5.3.3
5.3.4
5.3.5
5.3.6
HIGH VOLTAGE POWER SUPPLY, ASTRO-METRIX
MODEL AMC-M-227 .. .
GENERAL . . . . . . . . .
THEORY OF OPERATION
Circuit Safety Features . . .
Inverter Switch Drive Frequency
Sweep Fail Circuit . . . . .
+ 400 V Regulation Circuit
+ 12 Kv Regulation . . . . .
+ 12 Kv Rectifier-Filter
Focus Output Circuit . . . .
-1800 Volt Rectifier Circuit
INSTALLATION . . . . . .
Adjustments (Factory) .. .
+ 400 V and + 12 Kv Adjustment
Focus Adjust (Factory) . . . . .
-1800 Volt Adjustment (Factory)
MAINTENANCE . . . . . . . . .
HIGH VOLTAGE POWER SUPPLY ITT/IPC> KV3214
GENERAL . . . . . .
Description . . . . . . . .
Physical Specifications
Electrical Specifications
Output Signals
Environmental
INSPECTION
OPERATION.
Signal Input
12 Kv Supply.
-1800 v Supply
+ 400v Supply
Sweep Fail . . .
Focus Control
ADJUSTMENTS
TROUBLESHOOTING
OPERATIONAL CHECKS
Test Equipment Needed
5-7
5-7
5-8
.5-15
.5-15
.5-15
.5-15
.5-15
.5-16
.5-16
.5-16
.5-17
.5-17
.5-17
.5-17
.5-18
.5-18·
.5-20
.5-20
.5-20
.5-20
.5-20
.5-21
.5-21
.5-22
.5-22
.5-22
.5-22
.5-25
.5-25
.5-25
.5-25
.5-26
.5-26
.5-26
.5-26
ix
UR9
CONTENTS (Contd)
SECTION SIX-TOOLS AND TEST EQUIPMENT
6.1
6.2
GENERAL . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-1
TEST EQUIPMENT CALIBRATION FREQUENCY . . . . . . 6-1
APPENDIX A-ILLUSTRATED PARTS BREAKDOWN
APPENDIX B-VENDOR PARTS INFORMATION
x
UR9
ILLUSTRATIONS
Model 701752 Video Data Terminal
1-1. System Configuration
1-2. Major Assemblies . . .
1-3. Controls and Indicators
1-4. Maintenance Controls
3-1. VDT Simplified Block Diagram
3-2. Character Format . . . . . . .
3-3. Sync Pulse Generation and Timing
3-4. Sync Pulse and Video . . . . . .
3-5. Master Oscillator, Block Diagram
3-6. VDT Block Diagram . • . . . . . .
3-7. Pulse Former, Block Diagram and Timing
3-8. Walk Grey Code Counter
3-9. Bit Counter Timing •..
3-10. Character Counter Timing
3-11. Line Counter Timing ..
3-12. Delay Line Schematic, LFE
3-13. Delay Line Schematic, Digital Devices
3-14. DLR, DR, and Delay Line Memory
3-15. Delay Li ne Entry, Block Diagram . .
3-16. Data Insert Data Flow . . . . . . . .
3-17. Character Generation, Block Diagram
3-18. Character Stencil . . • . . .
3-19. Horizontal Selection Channel . . . .
3-20. Vertical Selection Channel . . . . .
3-21 .. Selection Amplifier Voltage Regulator,
Simplified Schematic . . . . .
3-22. Monoscope • • • • . . . . . . . .
3-23. Video Circuits, Block Diagram
3-24. Video Driver, Simplified Schematic
3-25. Deflection Amplifiers, Simplified Schematic
3-26. Dynamic Focus, Simplified Schematic
3-27. Tickler Coil Driver, Simplified Schematic ..
3-28. Input/Output Logic, Block Diagram
3-29. 10M Sequencing for Basic Unit and with Printer Adapter
3-30. 10M Sequencing for Station Selector and with
Printer Adapter . . . • . . . . . • . . . . . .
3-31. Input/Output Counter Timing . . . . . . . .
3-32. Flexible Character Array Logic, Block Diagram
3-33. Keyboard Operation . . . . . . • . . . . . •
3-34. One Cycle of Keyboard Operation Flow Chart
3-35. Compensator Tube Interlock ..
4-1. Cycle Clutch Linkage Lubrication . . . . . . .
xii
1-1
1-7
.1-14
.1-15
3-2
3-3
3-4
3-5
3-6
3-7
.3-11
.3-12
.3-13
.3-15
.3-15
.3-17
.3-19
.3-23
.3-26
.3-37
;3-38
.3-39
.3-41
.3-43
.3-44
.3-46
.3-47
.3-48
.3-51
.3-54
.3-55
.3-59
.3-65
.3-66
.3-69
.3-75
.3-81
.3-82
.3-85
4-5
xi
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UR9
ILLUSTRATIONS (Contd)
4-2. Filter Shaft and Return Delay Arm Lubrication
4-3. Drive Motor Lubrication . . . . . .
4-4. Clutch Lubrication . . . . . . . . .
4-5. S8 and S10 Switch Contact Cleaning
4-5A. IC Pin Identification . . . . . . . .
4-5B. Drive Gear Adjustment . . . . . . .
4-6. Bail Rod Alignment and Adjustment
4-7. Latch Interposers . . . . . . . . . .
4-8. Filter Shaft and "-" Key Interposer
4-9. Filter Shaft Adjustment with. Clutch Mounted
4-10. Backlash Cam Adjustment . . . . . . . . . .
4-11. Interposer Latch Spring Adjustment . . . . .
4-12. Keeper Arm and Latch Overtravel Adjustment
4-13. Latch Pawl Clearance . . . . . . . . . . . . .
4-14. Storage Bar Adjusting Screws and Microswitches
4-15. Clevis Rod Adjustment
4-16. Bail-Up Stop Adjustment ..
4-16A. Maintenance Controls . . . .
4-16B. Test Equipment Connection
4-16C. Test Setup . . . . .
4-16D.Test Points
4-16E. High Side Flickering
4-16F. Correct Flickering
4-16G.Analog Signal . . .
4-17. I/O No.1 Logic Board (A1) Test Points
4-18. I/O No.2 Logic Board (A2) Test Points.
4-19. I/O No.2 Logic Board with Station Special Feature
(A2) Test Points . . . . . . . . . . . . . . . . . .
4-20. Register Logic Board (A3) Test Points . . . . . .
4-21. Mark and Data Insert Logic Board (A4) Test Points
4-22. Timing Logic Board (A5) Test Points . . . . .
4-23. Printer Terminator and Oscillator Logic Board
(A6) Test Points . . . . . . . . . . . . . . . .
4-24. Printer and Oscillator Logic Board (A6) Test Points
4-25. Troubleshooting Waveforms . . .
4-26. Delay Line Input Waveform . . .
4-27. Delay Line Test Point Waveform
5-1. LVPS Schematic . . . . . . . .
5-2. Astro-Metrix HVPS Schematic (Rev. C, CSC, D)
5-3. Astro-Metrix HVPS Schematic (Rev. A and B)
5-4. AMC-M-227 Power Supply, Simplified Block Diagram
5-5. ITT HVPS Schematic . . . .
5-6. ITT HVPS Bench Test Set-Up . . . . . . . . . . . . . .
I
xii
4-5
4-6
4-6
4-7
.4-14A
.4-20A
.4-21
.4-22
.4-23
.4-24
.4-25
.4-26
.4-27
.4-29
.4-29
.4-30
.4-32
.4-32A
.4-36A
.4-36C
.4-36C
.4-360
.4-360
.4-36E
.4-45
.4-45
.4-46
.4-47
.4-48
.4-49
.4-50
.4-51
.4-52
.4-56
.4-57
5-3
5-9
.5-11
.5-13
.5-23
.5-28
UR9
TABLES
1-1.
1-2.
1-3.
1-4.
1-5.
1-6.
3-1.
3-2.
3-3.
4-1.
4-2.
5-1.
5-2.
5-3.
5-4.
5-5.
5-6.
5-7.
ASC II Codes
Characteristics
Assembly Locations
PC Unit Functions
Controls and Indicators
Maintenance Controls .
Glossary of Mnemonics
Input/Output Mnemonics
Flexible Array Jumpers .
Keyboard Mechanical Troubleshooting
Viewer Troubleshooting . . . . . . .
L VPS Specifications . . . . . . . . .
Astro-Metrix Power Supply Revisions
Input Requirements . . . . .
Power Supply Outputs . . . . . . .
HVPS Troubleshooting Chart . . . .
Electrical Specifications (ITT HVPS)
Output Signals (ITT HVPS) . . . . .
5-8. Environmental Specifications (ITT HVPS)
6-1. Field Maintenance Recommended Test Equipment and Tools
6-2. Maintenance Center Recommended Test Equipment and Tools
1-3
1-4
1-9
.1-10
.1-16
.1-18
.3-30
.3-60
.3-76
.4-37
.4-38
5-1
5-7
I
5-8
5-8
.5-18
.5-20
.5-21
.5-21
6-1
. 6-2
xiii
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I
SECTION ONE
INTRODUCTION
1.1 GENERAL
The Model 70/752 Video Data Terminal is a completely self-contained, input/output
device which permits an operator at a remote station to interchange information
with a central computer facility via standard telephone lines. The Video Data
Terminal (VDT) consists of two major assemblies, the Viewer and the Control
Panel. The Viewer contains the display tube, display memory, character generator,
input/output logic, data set interface, power supply, and the circuitry required
for video and for read, write, and erase operations. The Control Panel contains
the keyboard and controls to operate the VDT. The central computer may be an
RCA Spectra 70/35, 45, 46, 55, or 60 processor.
1.1.1
SYSTEM CONFIGURATION (Refer To Figure 1.1.)
A 70/752 VDT may be linked to one of the processors by one multiplexor trunk
connected to a 70/720-21 Asynchronous Data Set (ADS) Buffer housed in a 70/668
Communications Controller-Multichannel (CCM). The VDT may also be remotely
located from the processor.
In this case, the VDT is connected to a communications link consisting of an AT & T 202C or 202D Data Set or equivalent, a
voice-grade communications channel, and another 202C or 202D Data Set, or equivalent. The data set on the processor site is then connected to the 70/720-21 ADE
Buffer.
10/752
REMOTE INSTALLATION
LOCAL COMPUTER FACILITY
,r-- - ---- - - - - -- ------ -- ------ ------ --- ------- - -. - - - ------1,
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:
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:
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:
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,
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,
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: PHONE LINE
, ,
r-----------~~~~~--~:~~~-ll--~--~~~c~-~~
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DATA SET
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!
:
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CC M 70/668
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WITH
BUffER 70/120
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,
:
VOT
7o/lS2
I
VDT
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70/752
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I~-
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__ -. _______________________ . _________________________ J'
______ • ________________________________________________ • _______ JI
10/752-D818
ligure
r· r•
System Configuration
1-1
In either installation the VOT operates in a half duplex mode at a transmission
rate up to 120 characters per second.
Up to 8 VOTs may be connected to a 70/755 Video Data Switch (VDS) which may be
connected to the 70/720-21 Buffer or to a communications link.
1.2 FUNOIONAL DESCRIPTION
The 70/752 VOT provides a means of communicating with a central computer facility
and gives the operator a means of entering data in and retrieving data from the
,'central computer.
The terminal contains a 12-inch rectangular cathode-ray tube that can simultaneously display a maximum of 1,080 characters in 20 lines of 54 characters per
line, and a 4~row keyboard to generate data characters and control codes.
A maximum character set of 64 different characters can be displayed. The VOT
uses the USA Standard COde for Information Interchang'e (USASCrr) as shown in
Table 1-1.
Inquiries and transactions are composed on the keyboard, verified on the display
screen, and if necessary corrected before transmission to the processor. The
response from the processor overwrites the inquiry, or if desired it may be
displayed along with the inquiry or with format headings. If a teletypewriter
is attached, the displayed message may be printed out as hard copy. Data may
be entered, changed, erased, inserted, or shifted at the keyboard. A moving
cursor (displayed as an underline) gives a continuous indication to the operator
of the position in which the next character will be entered or received" or from
which the character will be transmitted.
Data Entry
The operator enters data up to 20 characters per second by using the Control
Panel, which contains the keyboard and control switches. The operator can select
64 different alphanumerics to generate a 20 line message, each line consisting
of 54 characters for a total character count per page of 1080 characters. The
composed message is displayed on the viewer screen, enabling the operator to
edit the message before transmission to the Basic Processing Unit (BPU).
Character Generation
The characters displayed are generated from the keyboard, stored in display
memory, and by means of a character generator that converts the digital code to
analog voltag'es generate character video at the monoscope tube. The character
video is applied to the viewer CRT. The CRT deflection system provides a vertical sweep rate of 1.67 microseconds or a full page of display, refreshed at a
60 Hz rate. The horizontal sweep rate of 1280 Hz gives a 20 line display array
with 54 characters per line, or a ,total page count of 1080 characters. This
coincides with the maximum storage capacity of the VOT Delay Line Memory (1080
characters plus 200 character times reserved for retrace time).
1-2
Table 1-1.
ASCII
Code
b7
Displayed
Character
ASCII Codes
ASCII
Code
Displayed.
Character
b1
0100000
0100001
0100010
0100011
0100100
0100101
0100110
0100111
0101000
0101001
0101010
0101011
0101100
0101101
0101110
0101111
0110000
0110001
0110010
0110011
0110100
0110101
0110110
0110111
0111000
0111001
0111010
0111011
0111100
0111101
0111111
1000000
1000001
1000010
1000011
1000100
• (space)
+ (divide)
"
#
$
%
&
,
(
)
*
+
,
-
. (period)
/
0
1
2
3
4
5
6
7
8
9
:
;
<
=
?
@
A
B
C
D
.
1000101
1000110
1000111
1001000
1001001
1001010
1001011
1001100
1001101
1001110
1001111
1010000
1010001
1010010
1010011
1010100
1010101
1010110
1010111
1011000
1011001
1011010
1011011
1011100
1011101
1011110
0000000
0000010
0000011
0000100
0001101
0001110
0001111
1100001
thru
1111010
E
F
G
H
I
J
K
L
M
N
0
P
Q
R
S
T
U
V
W
X
y
Z
[
Not Displayed
]
x (multiply)
NUL (Not Displayed)
STX (Not Displayed)
.J (ETX)
EOT (Not Displayed, used in
Station Select)
« (return)
SO (Not Displayed)
SI (Not Displayed)
Reserved for TSC
(Feature 5707) Not
Displayed
*NOTE: All characters are generated with even parity
and checked for even parity.
1-3
The internal bit rate of the 70/752 VDT is 768,000 bits per second Or 76,800
characters per second. However, for external transmission, the bit rate is reduced to 1200 bits per second to match the processing speed of the Telephone
Line Data Sets.
When the printer option is installed, the VDT operator may select messages or
segments of messages to be printed out.
When the Data Format option is installed, theVDT operator may request a standard
format from the computer which is displayed on the viewer screen at approximately
one-half the intensity of the variable data entered by the operator.
Editing of composed Message
The message data may be changed, erased, or new data may be inserted in existing
words or lines allowing any type of corrections to be made before the data is
transmitted. A moveable mark (or cursor), displayed ~s an underscore, gives the
operator a continous indication of the position in which the next character will
be entered in the message format. The entire message is stored in the Delay
Line Memory and is constantly refreshed on the viewer screen at a 60 Hz rate.
When the entire message has been composed, the operator must enter an end-oftext symbol before the transmit mode will function.
Message Transmission
The message is transmitted at the option of the VDT operator, who may send the
entire message or a selected segment of the message. The message is transmitted
in ASCII Code to the central computer facility and the reply message is displayed
on the VDT viewer screen and stored in the VDT Memory so it can be constantly
refreshed on the screen until the operator initiates an erase operation.
1.3 CHARACTERISTICS
The operational and physical characteristics are shown in Table 1-2.
Table 1·2.
Characteristics
OPERATING CHARACTERISTICS
Power Requirements and Protection
Requirements
115 volts 48-52 Hz or 58-62 Hz
at 15 amps
Receiving and Transmitting Bit Rate
(maximum) :
1200 baud (bits per second)
Transmitted and Received Data Format:
10-bit serial7 1 start bit,
8 data bits, and 1 stop bit
Processed Data Format:
8-bit parallel: 7 data bits and
1 parity bit
Displayed Characters:
64 alphanumerics and symbols
1-4
Table 1·2.
Characteristics (cont'd.)
OPERAT IN3 CHARACTERISTICS -
(Cont I d. )
Display Format:
1080 characters in 20 lines
of 54 characters
Maximum Typing Speed:
20 characters per second
Parity Errors:
Displayed as a white block
equivalent to one character
space in the wrong character
position
Logic Levels:
Transmitted and Received:
1
=
Internally Processed:
1
= +4.5
-3 v to -25 v; 0
v; 0
=0
= +3
v to +25 v
v
CABLIN3 LIMITATIONS
Control Panel to Viewer:
Standard length 1 foot, optional
lengths available 5, 10, 15, or
20 feet
Data-Phone Data Set to Viewer:
50 feet
Viewer to 70/720 Buffer:
50 feet
Viewer to Teletype
Model 198420 Data Coupler:
50 feet
ENVIRONMENT
OPERATIN3
STORAGE
Temperature
20 to 65 percent
Humidity:
o
to 80 percent
KEYBOARD
Weight:
30 pounds
Height:
3.75 inches
Width:
16.9 inches
Depth:
7.75 inches
1-5
Table 1-2.
Characteristics (cont'd.)
VIEWER
Weight:
100 pounds
Height:
14.5 inches
Width:
16.9 inches
Depth:
20.5 inches
DATA-PHONE DATA SET OPTIONS
1.
Line classification of 1200 baud (bits/second)
2.
Voltage interface
3.
Two wire input/output line
*4.
Amplitude and/or delay equalization
*5.
Squelch and/or demodulation
*6.
600 ohm or 900 ohm line termination
*7.
o
db, -3 db, -6 db, or -9 db data transmit levels
NOTE: Those options marked with an * are installed at
the decision of the telephone company installation technician.
B.
The CY control lead is not used to reverse communications.
1.4 MAJOR ASSEMBLIES AND SUBASSEMBLIES (Refer To Figure 1·2.)
The 70/752 Video Data Terminal consists of two major assemblies, the Control
Panel Assembly and the Viewer Assembly.
1.4.1
CONTROL PANEL
The Control Panel consists of the Keyboard and the Matrix Switch Assembly and
contains all the VDT operator controls used to compose, edit, and transmit a
message to the central computer facility.
1-6
A9
A6
A2
AI
AI3
61
AIO
CRT
SHIELD
CIRCUIT
BREAKER
INTERLOCI<
figure 1.2. Maj
or Assemblies
1 -7
Matrix Switch Controls
The Matrix Switch Assembly consists of a series of indicator-type switches that
the VDT operator uses to select the mode of operation, and to activate the
Standard Features, such as Data Insert and Message Segment Address, and control
the mark. When Special Features, such as Print and Format Data are installed,
the optional control switches are also installed on the Matrix Switch Assembly.
Other matrix switches permit the operator to erase either a character, line, or
the full viewer screen. The POWER switch for the 115 volt 60 cycle input to the
VDT power supplies is also located at the top of the Matrix Switch Assembly.
Keyboard
The Keyboard is a modified electric typewriter 4-row keyboard. The keys, when
pressed, control a series of coding microswitches which produce the standard
ASCII digital code for each character. The digital code output enters the Viewer
through a sho.r:t cable, which may be replaced with a longer.cable when the Keyboard is
installed at a different location than the Viewer.
1.4.2
VIEWER
The Viewer Assembly is housed in a cabinet which may be adjacent to the Control
Panel Assembly or, when the keyboard extension is used, the Viewer may be
mounted up to 20 feet away from the Control Panel Assembly.
The Viewer contains the Logic Nest, consisting of printed circuit cards Al through
A6, the Delay Line Memory A7, the Character Generation section which consists of
the Selection Amplifier AS, the Character Generator Monoscope A10, the Video
Pre-amplifier A10Al, and voltage divider A10A2. Also contained in the Viewer
are the Deflection Amplifier A9, the Video System which consists of the Video
Amplifier A12, the l2-inch Display Tube, the Tickler Amplifier All, and the
Dynamic Focus C;ircuit Board A20. The High Voltage Power Supply A13, and the
Low Voltage Power Supply A14, are also contained in the VDT cabinet (Table 1-3).
The Selection Amplifier A8 and the Deflection Amplifier A9, are mounted with all
their adjustments available to the VDT operator inside a door located on the VDT
front panel, to the left side of the display tube (operator's right). Access
to the Logic Nest printed circuit cards (Al through A6) is available by removing
the Viewer Cabinet rear cover.
When the cabinet main cover is removed, all other subassemblies (except the
monoscope box assembly) are accessable for trouble-shooting or replacement. The
monoscope box components are accessable by removing the ends of the box and detaching the monoscope box from the Viewer Chassis.
Logic Nest (Al through A6)
The Logic Nest consists of a card cage located at the rear of the Viewer Cabinet
which contains six, four-layer printed circuit cards. The six logic cards contain all the timing and logic control circuits for the entire Viewer Assembly.
Each of the logic cards has an 80 pin connector and each card can mount up to
48 dual in-line integrated circuit packages plus a number of discrete components.
Up to 30 test points to internal connections on the logic module are available.
1-8
Table 1·3.
UNIT
Assemblv Locations
TITLE
DRAWING NO.
2134548
Installation Drawing-70/752 Video Data Terminal
2165479
Schematic-70/752 Video Data Terminal
Al.
2144559
Detailed Logic Diagram-I/O No. 1 Logic
A2
2144560
Detailed Logic Diagram-I/O No. 2 Logic
A3
2144558
Detailed Logic Diagram-Register Logic
A4
2144557
Detailed Logic Diagram-Mark Logic
A5
2144556
Detailed Logic Diagram-Timing Logic
A6
2144509
Schematic/Logic-Printer Terminator and Oscillator
A7
2039ACE23
Schematic-Delay Line (Mfg. by L.F.E)
5000-1055
Schematic-Delay Line (Mfg. by Digital Devices)
2144547
Schematic-Control Panel 70/752-10
A8
2110687 -501
Selection Amplifier
A9
2110686-501
Deflection Amplifier
Al.O
21.1.0691-501
Monoscope Assembly
AU
2110689-501
Tickler Driver
A12
2110588-501
Video Driver
Al3
100423
schematic-High Voltage Power Supply
(Mfg. by Astro Metrics)
KV-3214
Schematic-High Voltage Power Supply
(Mfg. by ITT, RCA HVPS Sub-assy.)
2165472
Schematic-Low Voltage Power Supply
2110683-501
Low Voltage Power Supply
A20
2144178-501
Dynamic Focus Board
A2l
2165856-501
Keyboard Filter
OPTION
2144565
Detailed Logic Diagram-Station Select
(Replaces A2)
OPTION
2144567
Detailed Logic Diagram-Data Format (Replaces A4)
OPTlON
2144570
Detailed Logic Diagram-Printer Adapter
(Replaces A6)
OPTION
2144570
Detailed Logic Diagram - Flexible Chi'tracter
Array (Replace A5)
70/752
70/752 SYSTEH
A14
1-9
Table 1-4 lists the name of each printed circuit card in the Logic Nest and gives
a brief description of the logic function performed by each card.
Table 1-4.
UNIT
PC Unit Functions
FUNCTION
Printer Terminator and Master
Oscillator, A6
Contains the 6.144 MHz Crystal
Oscillator that controls logic
timing generating the Master
Clock frequency of 3.072 MHz.
Timing Card, AS
Contains several timing circuits
that divide down the 3.072 MHz
Master Clock frequency to generate
all the timing pulses used in
the VDT.
Index Mark Logic Board, A4
Contains all logic controlling
the movement of the Mark and
controls the Data Insert function.
Register Card, A3
Contains the Delay Line Register,
the Display Register, and associated control logic.
Input/Output cards, Al and A2
These two cards contain three
Buffer Registers and the associated control logic for all
remote transmission and reception
operations.
Delay Line Memory, A7
The Delay Line Memory is mounted at the left side of the Viewer Chassis by a
hinge which permits access to the Selection Amplifier (A8) and the Deflection
Amplifier (A9). The Delay Line is mounted in a box approximately one-inch thick,
13 inches wide and 16 inches long. Detailed data on the Delay Line is given in
Section Three of this manual.
Character Generator
The Character Generator Section consists of the Selection Amplifier (A8)~ the
Monoscope Tube (A10), the Voltage Divider (AIOA2), and the Video Preamplifier
(AI0Al). The selection amplifier adjustments are available to the VDT operator
on the Viewer front panel. The monoscope (AIO) and its subassemblies (AIOA1 and
AI0A2) are all mounted in a box which provides shielding from magnetic fields.
1-10
yideo Section,
All'~-2nd
20
The Video Section consists of the Video Driver (A12), the Tickler Dri~er (All),
and the Dynamic Focus Card (A20). The Video Driver is mounted to the CRT Yoke
and the tube neck shield. The Tickler Driver circuit board is mounted on the
sloping back of the CRT shield. The Dynamic Focus board is mounted inside of
the CRT neck shield at the rear of the viewer chassis.
Deflection Section, A9
Both the Horizontal and Vertical Deflection amplifiers are contained on the Deflection amplifier card A9 which is mounted beside the Character Selection amplifier card AB. All adjustments are accessable on the viewer front panel. The
Deflection Amplifier has large heat sinks to disapate the heat from the Deflection
Amplifier output stages.
Low Voltage Power Supply, A14
The Low Voltage Power Supply (A14), is mounted to the Viewer Chassis at the upper
right front corner (as viewed from the rear). The power supply adjustments are
accessable by opening a hinged door located on the outside Viewer case. The adjustments are mounted on a printed circuit regulator board which is plugged into
the connector on the door. The power supply outputs connect to the viewer
cabling at a terminal board.
High Voltage Power Supply, A13
The High Voltage Power Supply is m~unted on the bottom of the viewer chassis at
the right front corner (as viewed from the rear). The unit is approximately
four-inches long.
1.5 .MODES OF OPERATION
The 70/752 VDT has three modes of operation: Write, Transmit, and Receive. The
normal mode sequence in operations is to Write, Transmit, Receive, and then
return to Write mode.
1.5.1
WRITE MODE
The Write Mode is entered by three means:
1.
Upon completion of the power-on procedure.
2.
By the operator pressing the WRITE switch on the operator's control panel.
3.
By the normal cycling of the VDT through the Transmit/Receive cycle and
automatically returning to the Write mode.
When the VDT is in the Write mode, the operator has complete control of the unit.
By using the keyboard and the control panel switches, the VDT operator can compose
a message (which will appear on the viewer screen), make corrections to themes$age
by either erasing old data, replacing characters, or inserting missing characters.
1-11
By use of the proper control switch, the operator can erase individual characters,
a complete line, or the entire screen. All editing of the message can be accomplished by the operator and the message proofed prior to transmission of the
message to the central computer facility.
The moveable mark (or cursor) is positioned on the Viewer Screen by the operator
to indicate the position in which the next character will be entered or deleted
from the message.
The ADVANCE control steps the mark to the right until the end of the line is
r.eached, then to the beginning of the next line of the raster. The RETURN
control moves the mark to the beginning of the next line. The BACKSPACE control
moves the mark within one line only and will not move the mark back the preceeding
line.
1.5.2
TRANSMIT MODE
Pressing the Transmit switch disables all local controls and enables the circuitry
to the Data Set unit, which converts the VDT output to FM signals for phone-line
transmission to the central computers Data Set unit.
Initiation of the Transmit
mode requires that an End-of-Text (ETX) character (J) has been entered at the
end of the composed message. After the transmission of last message character
(ETX), the VDT senses the End-of-Text character and automatically places the VDT
in the Receive mode. The transmitted message remains on the Viewer Screen unless
the operator manually returns the VDT to the Write mode by pressing the Write
switch.
Note
Manual intervention immediately after transmission
may interrupt a returning message from the central
computer.
When the original message must be changed after it has been transmitted, the
operator can place the VDT in the Write mode, make the necessary corrections,
return to the Transmit mode, and retransmit the corrected message to the central
computer complex.
1.5.3
RECEIVE MODE
The Receive mode is inhibited until the VDT has transmitted a message to the central computer. Then the VDT automatically enters the Receive mode. During normal
reception, the incoming message characters replace the existing message characters
on the Viewer Screen, one at a time, until the incoming message is complete. The
remainder of the Viewer Screen is then automatically erased, leaving only the
received message from the central computer. When the original VDT message is
transmitted using the Message Segment Address (MSA) feature, the original message
will remain on the Viewer Screen and the computer's response will be displayed
immediately following the ETX character of the original message. This allows
the VDT operator to observe the original querry and the computer response simultaneously.
1-12
1.6 CONTROLS AND INDICATORS
The controls and indicators available to the VDT operator at the operatorls position are shown in Figure 1-3. Figure 1-4 shows adjustments for maintenance personnel, which are located on the electrical adjustment panel located on the
Viewer Front Panel on the left side of the Viewer Screen (operatorls right).
Table 1-5 lists the keyboard keys and the matrix control switches located on the
Control Panel Assembly. The control designator, front panel title, and the function of each control are listed in the tables. Table 1-6 lists the maintenance
controls.
1.7 FEATURES
The features available on the 70/752 VDT may be grouped into two classifications,
Standard and Special. The Standard Features are those that are normally supplied
with the unit. The Special Features are available as options that the user may
select to satisfy a special need.
1.7.1
STANDARD FEATURES
Data Insert
Data Insert is a Standard Feature of the 70/752 VDT that permits the operator to
insert additional characters into the displayed message. The VDT must be in the
Write mode and the operator must press the DATA INSERT switch to enable the insert
logic. Pressing the DATA INSERT switch again, extinguishes the switch indicator
lamp and places the VDT in the normal Write mode.
When the DATA INSERT switch is activated (light on), a character entered from
the keyboard will be entered at the mark (cursor) position and all subsequent
characters, including the character previously over the mark, will be shifted one
character later in the Delay Line Memory. This moves all the characters following
the newly inserted character one space to the right on the Display. Characters
at the end of a line are advanced to the beginning of the next line, except RETURN
and ETX characters. These two characters, if needed, must be reinserted at the
desired position in the message after the Data Insert operation is completed.
When an affected memory location contains a NUL character, the NUL Or blank space
is over-written by characters being entered (or shifted). Characters at the end
of the last line of the displayed page are dropped from the VDT memory •.
Not• .
When the VDT is provided with the Data Format
Special Feature 5710, the Data Insert Feature
is not available.
1-13
I~
KEYBOARD
MASTER
ERASE
KEYBOARD KEYS
KEYBOARD
CONTROL PANEl
REAR
FRONT
4305 - 5
DATA SET
CABLE
PR INTER
CABLE
Figure 1-3. Contro's and Indicators
1-14
R3
Message Segment Address (MSA)
The Message Segment Address (MSA) feature is controlled by the MSA switch,
located on the Control Panel. The operator must press (to light) the MSA
switch to enable the MSA logic.
The Message Segment Address feature permits the VDT operator to display both
the originally composed message, which is transmitted to the central computer,
and the computer's response to the message. The MSA feature also allows the
VDT operator to transmit a segment of the composed message by entering an ETX
character at the end of that segment which is to be transmitted and then positioning the cursor at the beginning of the segment to be transmitted.
CONTROLS IN
THIS COLUMN
ARE FOR THE
DEFLECTION
AMPLIFIER
CONTROLS IN
THIS COLUMN
ARE FOR THE
SELECTION
AMPLIFIER
....
A9
A8
.-.
ASTIG
RI02
®@.
..,
PICTURE
R73
0
~~~Z
VERT CENT
RS6
@
HORIZ®
SKEW
RB2
BRIGHT
R72
O
HORIZ®
CENT
R7S
....
HORIZ CEN
R22
~
@
6
fOCUS
R74
YERTGAIN
R3e
HORIZ GAIN
R4
i)
c..
G
HORIZ®
SCAN
RS7
0 m~~
®
®
R43
~
~
VERT®
GAIN
~
RI4
'"
Rn
VERT@
SKEW ~
VERT@)
CENT r~
RIS
....
fi,u,. J-4. Maintenance Cont,o',
1-15
•
Table 1·5.
Controls and Indicators
CONTROL PANEL MATRIX SWITCHES
CONTROL
DESIGNATOR
TITLE
FUNCTION
A2S1
POWER
Applies and removes all power to the
Video Data Terminal.
A2S4
WRITE
Positions the cursor to beginning of
frame, permits data to be entered and
displayed, and is lighted in the Write
mode. When the Data Format Feature is
used, the cursor will be moved to the
first position available for data entry.
When the MSA feature is enabled, the
cursor is not moved.
A2S3
PRINT
Causes the displayed message to be
reproduced at the printer, is lighted
during printing operation, and is
enabled only in the Write mode.
A2S2
XMT
Causes the displayed message to be
transmitted, is lighted in the Transmit
mode, and is enabled only in the Write
mode.
A2S7
DATA INSERT
Permits insertion of a new character or
characters, causes all characters at and
to the right of the cursor to be shifted
one position to the right with each new
character entry, and is lighted when the
data insert operation is enabled.
A2S5
MSA
Causes transmit and print operations to
begin at the cursor location and end at
the location of the "J", and is lighted
when the MSA feature is enabled.
A2S6
FORMAT DATA
Erases characters in variable data display
fields when enabled by the master erase
key.
A2S10
CHAR
Erases the character in the position indicated by the cursor when enabled by the
master erase key.
A2S9
LINE
Erases all characters in the line at and
to the right of the position indicated by
the cursor and moves the cursor to the
beginning of the next line when enabled
by the master erase key. When using the
data format, only variable data is erased.
1-16
Table 1·5.
Controls and Indicators (Cont'd.)
CONTROL PANEL MATRIX SWITCHES CONTROL
DESIGNATOR
TITLE
A2S8
A2S13
SCREEN
+(Backspace)
-
A2S12
(Advance)
A2S11
+*.
(Return)
(CONT'D.)
FUNCTION
Erases the entire displayed message and
returns the cursor to beginning of the
page when enabled by the master erase
key.
Moves cursor one position to left.
If
held down, this will repeat at about
ten times'per second, five times per
second if the Data Format Feature 5710
is provided.
Moves cursor one position to right.
If
held down, this will repeat at about ten
times per second, five times per second
if the Data Format Feature 5710 is
provided.
Repositions cursor to first character of
next line. This control must be pressed
each time it is desired that the cursor
move to the next line.
KEYBOARD KEYS
-' (ETX)
« (Return
Character)
A1S10
A1S8A
o
(Master
Erase)
Produces the end-of-text character "J".
Produces the return character «<), erases
all characters of variable data at end to
the right of the position where the return
character is displayed, and positions the
cursor in the first available character
pOSition of the next line.
Enables the CHAR, LINE, SCREEN, and FORMAT
DATA erase actions.
SHIFT
Permits characters printed on upper
portion of keys to be entered and
displayed.
SHIFT LOCK
Locks the shift key operation so that
characters printed on upper portion of
the character keys are displayed when
they are pressed.
1-17
Table 1-5.
Controls and Indicators (Cont'd.)
KEYBOARD KEYS CONTROL
DESIGNATOR
(Cont'd. )
FUNCTION
TITLE
Space Bar
Inserts small dot and one-character space
into the displayed message for the space
between words.
Standard,
Character
Keys
Produce the characters of the displayed
message.
OPERATOR'S ADJUSTMENT PANEL CONTROLS AND INDICATORS
R73
PICTURE
Corrects double-image display of
characters.
R72
BRIGHTNESS
Controls the inter:sity of displayed
message.
R74
FOCUS
Controls the sharpness of displayed
message.
CB1
Circuit
Breaker
Provides circuit breaker control for
line input power. (Located on rear panel. )
Table 1-6.
Maintenance Controls
HORIZONTAL SELECTION AMPLIFIER
1-18
R57
HORIZ SCAN
Controls the amplitude of the horizontal
sweep ramp that is applied to the horizontal selection amplifier to scan the
character stencil in the monos cope tube.
R75
HORIZ CENT
Controls the monoscope horizontal centering
at the leading edge of the selected character cut-out.
R73
HORIZ GAIN
Controls the gain of operational amplifier
Z02 in the horizontal selection amplifier.
R82
HORIZ SKEW
Controls the amount of cross talk current
applied to the monoscope horizontal deflection plates to correct physical SKEW
in the monoscope tube deflection plates.
Table 1-6.
Maintenance Controls (Cont'd.)
VERTICAL SELECTION AMPLIFIER
CONTROL
DESIGNATOR
FUNCTION
TITLE
R14
VERT GAIN
Controls the gain of operational amplifier
ZOI in the vertical selection amplifier.
R15
VERT CENT
Controls the mono s cope vertical centering.
R22
VERT SKEW
Controls the amount of cross talk current
applied to the monoscope vertical deflection.
R43
VERT SCAN
Controls the amplitude of the tickler
scan on the monoscope character stencil.
R102
ASTIG.
Applies o to +75 vdc to XVI-9 astigmatism
grid of monoscbpe tube.
DEFLECTION AMPLIFIER
R56
VERT CENT
Controls the viewer display tube vertical
centering.
R22
HORIZ CENT
Controls horizontal centering of viewer
display tube.
R38
VERT GAIN
Controls gain of vertical sweep to
viewer CRT deflection yoke.
R4
HORIZ GAIN
Controls gain of horizontal sweep to
viewer CRT deflection yoke.
1-19
When the message has been transmitted, the mark will remain at the ETX character
of the message segment transmitted and the central computer response will be
displayed immediately following ETX, leaving the original message in place rather
th.an replacing the original message. When the Printer Adapter Special Feature
5711 is provided with the VDT, the printed message will be only the message segment enclosed by the mark and the ETX character. All NUL characters are converted by the print feature to spaces for Teletypewriter. readout.
1.7.2
SPECIAL FEATURES
Keyboard Extension, Special Feature 5713
The Keyboard Extension Feature is a cable, up to 20 feet in length, which connects the Control Panel to the Viewer Assembly. The use of the extension option
permits the Viewer to be installed in alternate positions for maximum shielding
or shelf installation of the Viewer Assembly.
Data Format, Special Feature 5710
When the VDT operator desires to use the Data Format Feature, he must type a
coded message to request a Standard Message Format from the central computer.
The Standard Message Format, which is a partial message consisting of columns
and headings, will appear on the viewer screen at approximately one-half the
intensity of the normal message characters. The VDT operator can then enter
variable data in the format blanks. The logic is so arranged to modify the
mark (or cursor) operation so that the mark cannot appear under any format character; therefore, the operator cannot modify the format except to completely
erase the entire viewer screen. When DATA FORMAT has been selected, the write
control logic will position the mark under the first available character position
within the first variable data field. When one line of the format variable data
has been entered, the return control logic will cause the mark to move to the
first available position on the next line.
Variable data may be entered in any or all of the variable data fields and then
transmitted to the central computer. Variable data entries may be erased by
pressing the DATA FORMAT switch, located on the Control Panel. Only the variable
data will be erased, leaving the Standard Data Format on the viewer screen. The
LINE erase switch, when pressed, will also erase only the variable data leaving
the format. The SCREEN erase switch when pressed, erases the entire screen of
all variable data and the format.
Note
When the Data Format Special Feature is installed
in the VDT by installation of the alternate mark
logic board A4, the Data Insert Standard Feature
is removed due to changes in the logic. The speed
of the repetitive mark operation is modified to
repeat at five times per second rather than the
normal ten times per second.
1-20
Printer Adapter, Special Feature 5711
The Printer Adapter Special Feature allows connection of a Model 33 or 35 Teletype to the VDT which enables the VDT operator to retain a hard copy of all
messages displayed, transmitted, or received on the VDT viewer screen. The
printer adapter may be enabled only when the VDT is in the Write mode. Pressing
the PRINT switch, located on the Control Panel will cause the Write mode switch
indicator to extinguish and will light the PRINT switch indicator. The message
will be printed on the Teletype at the rate of 10 characters per second following
the same 20 line presentation of the viewer screen. The VDT automatically sends
a Carriage Return and Line Feed to the teletype at the end of each line. All
NUL characters (all zeros) stored in the VDT memory are converted by the Print
feature and sent to the teletype as spaces. An ETX terminates the print operation and the VDT Print indicator .is extinguished and the Write indicator is lit,
returning the VDT to the Write mode.
When the MSA switch is pressed and the Print function is activated, the Print
operation begins at the mark location and the selected message segment is printed,
terminating the ETX character. When the Data Format option has been used in
composing the message, the format data will also be printed.
When the printer aQapte r feature is installed, the teletype (Model 33 or 35)
must be connected to the VDT with a Data COupler (198420). The teletypewriter
is connected to the VDT by a cable that is furnished with the print feature.
When the print feature is installed, the printer oscillator card A6 is replaced
by the alternate A6 card.
Station Select, Special Feature 5707
The Station Select Special Feature provides a means of using one multistation
communication line to link several VDT's (up to 26) to a common central computer.
This requires a separate Data Set for each VDT as well as a Data Set at the
70/720 Buffer, located at the central computer facility. The System is controlled by the central computer by use of a "Polling" sequence. Each station Data
Set is assigned a different Transmit Start Code (TSC); additional logic decoded
by a recognition diode matrix in each station Data Set allows the Data Set to
respond to the "polling" with a "no traffic" (EOT) signal when no message is ready
to transmit (in the Transmit mode), the polling sequence is interrupted and the
central computer accepts the stations message, sends a response to the station,
and continues the polling sequence.
The maximum number of VDT's that can be installed on one communication line,
using the Station Select Feature, is 26. Due to practical limitations, however,
at installations with heavy traffic loads the number of VOT's sharing one communication line may be held to a maximum of five to prevent the operators from
having to wait more than one and one-half minutes before receiving a reply from
the central computer. When the Station Select Feature is installed the I/O card
A2 is replaced by the alternate A2 card.
Video Data Switch (70/755)
The Video Data Switch (VDS) serves a function similar to that of the Station
Select Special Feature in that it permits a maximum of eight VDT's to be connected to one pOint-to-point private line telephone circuit. The Video Data
Switch differs from the Station Select Special Feature in that it permits a maximum of eight VDT's to be connected to one point-to-point private line telephone
1-21
R8
circuit. The Video Data Switch differs fram the Station Select Special Feature
in that only one Data Set is needed for the VDS~ the Station Select needs one
Data Set for each VDT connected to the line.
The VDS cabinet is approximately the size of the VDT unit and may be mounted on
a table or other convenient.support. When remote data transmission is not required, the VDS is connected by cable directly to the BPU Buffer eliminating the
two Data Sets used on the phone line for remote transmission.
The VDS services each VDT in an established sequence. When a VDT is in the Transmit mode and there is a message ready to transmit, the VDS establishes a connection to the central computer, or processor, and transmits the message. The processor prepares and transmits a response back through the VDS to the VDT. The
VDS then continues the scanning sequence of the remaining VDT's.
The processor must issue a new READ command within 45 milliseconds of the termination of its response to each VDT to ensure reception of the next VDT's inquiry.
VDS Delay Timer
The VDS is equipped with a timer to limit the time allotted for the BPU to reply
to a VDT message. The timer may be manually set to provide either a 15 or 30
second delay interval, or can be disabled. When used the timer is started upon
completion of a VDT transmission to the processor and is reset by the processor's
response to the VDT. When the response delay exceeds the selected time interval,
the timer expires, the VDT is disconnected, the VDS scan advances to the next
VDT, and the timer is reset.
Flexible Character Array, Special FeatUre 5734-01
The Flexible Character Array Special Feature provides a means of changing the
Viewer display format from a standard array of 20 lines of 54 characters each,
to several alternate arrays. The recommended configuration is a 14 line raster
of 81 characters per line. The changes in Viewer array are accomplished by means
of jumpers that change the sweep timing. Changing the array requires realignment
of the Viewer.
Data Set Cable, Special Feature 5766
The Data Set Cable Special Feature is intended for use on installations where
electrical noise radiation originating from other equipment is nearby.
Special Feature 5766 incorporates a twisted pair cable to minimize noise pickup
and is available by MI 2100383 with dash numbers designating available lengths
(e.g. -5, -25, -50, -100). The Cable Assembly Drawing Number and Installation
Drawing Number are 2166844-501 and 2134548, respectively.
1-22
SECTION TWO
INSTALLATION
GENERAL
Refer to the Systems Installation Manual (70-01-SIM) for installation procedures
for the Model 70/752 Video Data Terminal.
2-1
SECTION THREE
THEORY
3.1
GENERAL
The Video Data Terminal (VDT) functions as an information interchange unit between the operator and a central computer. The central computer may be located
at the same location as the VDT or, the computer can be at a remote facility and
data can be transmitted over telephone lines by using two Model 202 C/D Data Set
units manufactured by Bell (or equivalent). The Data Sets convert the serial
ASCII code (American Standard Code for Information Interchange) data to FM
signals for transmission over telephone lines.
The VDT contains a Delay Line Memory which has a capacity of 12,800 bits (1080
characters at 10 bits per character plus 200 character spaces for flyback time).
The characters are processed internally at a rate of 768,000 bits per second.
External transmission and reception rate is at 1200 bits per second (baud). The
operator input rate can be up to 20 characters per second.
3.2 INTERFACE
3.2.1
LOCAL CONNECTION
When the VDT is connected to a computer at the same location, the VDT output is
connected directly into the 70/720 Buffer at the 70/668 Communications Controller,
and no Data Set units are needed.
Some rewiring is necessary for local operatio~
Refer to the Installation manual for details.
3.2.2
REMOTE CONNECTION
When the VDT is connected to a remote computer facility, the VDT output data must
be converted from d.c. logic levels to equivalent FM signals for transmission
via telephone communication lines. This requires a Model 202C or 202D Data Set
(furnished by American Telephone and Telegraph Bell System) at each end of the
telephone line. The Data Set at the central computer facility is then connected
to the processor via the Communications Controller.
3.3 FUNCTIONAL DESCRIPTION (Refer To. Figure 3-1.)
The VDT operator manually composes a message on the Keyboard, and when necessary
can correct the message before it is transmitted to the central computer facility.
When the message is read~ the operator can transmit the message to the central
computer. The central computer processes the incoming message and then sends a
response message which is displayed on the Viewer screen.
3-1
o
[:j
PROCESSOR
-----------------------------------------------------1
I
I
I
I
:
!
I
II
COMMUNICATION
CONTROLLER
,,
I
~------------------iI
I
I
VDT '
I
KEYBOARD
I
I
I
I
I
I
TIMINJ
MASTER CLOCK
TIMIN3 LOOIC
&: COUNTERS
I
I
I
I
:
:,
I
I
VDT
:
1I __________________________________________________________
... ____
J
10/152-0100
figure 3·r. VDr $impljfiecl8loclc Diagram
3.3.1
KEYBOARD ENTRY
Data is entered from the Keyboard in the form of a seven bit ASCII digital code.
The code for each selected character is applied to the Display Register entry
logic. The Display Register (DR) is enabled after each character has been
selected to allow a parallel transfer from the Keyboard microswitches into the
DR. The DR output is then serially shifted through the Delay Line Memory. From
Memory, the data is shifted into the Delay Line Register. The Delay Line Register then parallel transfers the character bits into the Display Register. The
Display Register applies the character bits to the Selection Amplifier. The
Selection, Amplifier converts the digital code to gross positioning voltages for
the monoscope tube. The monos cope generates character video which is displayed
on the Viewer display tube.
3.3.2
MESSAGE TRANSMISSION
Message transmission is initiated by an automatically generated Start-of-Text
(STX) character. The STX character indicates to the Central Processor the start
of a new message. Following the STX character, each VDT message character is
transmitted serially beginning with the lowest order bit (bI). Refer to the
external character format in Figure 3-2. When, all of the message characters
have been transmitted, the ETX (End-of-Text), ~ , character, is transmitted.
This notifies the processor that the message is complete and that the VDT is
awaiting the processor's answer.
3-2
ASCII CHARACTER
r~------------------------~A~------------------------~,
MARK
BIT
PARITY
BIT
FORMAT
BIT
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
CHARACTER FORMAT IN DELAY LINE MEMORY
ASCII CHARACTER
, -______________________________
____________________
A~
~,
(
STOP
BIT
ALWAYS 1
PARITY
BIT
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
START
BIT
ALWAYS 0
CHARACTER FORMAT FOR TRANSMIT AND RECEIVE OPERATIONS
Figure 3-2.
C"arader Format
The central computer's Data Set reconverts the FM signals from the VDT Data Set
to d.c. logic levels and applies the message characters to the 70/720 Asynchro~
Data Set Buffer. The 70/720 Buffer then transfers the characters to the central
computer via the 70/668 Multichannel Communications Controller.
3.3.3
MESSAGE RECEPTION
When the BPU has processed the message, it begins its response with an STX
character, transmits the response message, and ends the message with an ETX
character. The ETX character notifies the VDT that the response is complete.
The VDT then automatically returns to the Write mode.
3.3.4
VOT SYNCHRONIZATION
To keep the Delay Line Memory and the system timing in synchronization, two
sync bits are generated at the start of each page (60 times per second). The
Master Clock is stopped and a new count is started at the beginning of each page.
This eliminates any problem that might be encountered due to the Delay Line
length varying with temperature.
WAIT, START and HOLD Flip-Flops
The WAIT, START, "and HOLD flip-flops control the timing synchronization7
1.
For the initial power up sequence.
3-3
2.
For timing resync each page time (60 Hz or once each 16.7 milliseconds).
3.
To generate new sync pulses after a Screen Erase and Master Clear operation.
Sync Pulse Generation (Refer to Figure 3-3.)
Note that the Line COunter advances during character count 55. Therefore, all
functions occurring during horizontal and vertical flyback times are considered
as being at the beginning of the following line. That is, timing resync occurs
during L1, which starts at character count 56 at the end of the last line.
DLOUT
\. DELAY LINE (A7) 1
DTDLM
A21
BOARD
ONE SHOT
(KEYBOARD
FILTER)
11 x 1.302.u Sec. = 14.32 .u Sec.
DLMIN
.n..
A3
DLS
REG
DLRIN
DLR (11 F/Fs)
~
BOARD
SUB
.J
CHAR. 59
I r/
1
~'I
WAITJ
--
BOG
START (1P)
AFTER
LAST LINE
I:
WAIT
.IL
~------------------------------------------------
I
I
I~------~-------------------{I'~'----------------------------~
START----!j
1"II1.f---..,.- 14.3 ~.
I
I
SYNC
n
----!I
I
n
lll
SYNC
2nd
SYNC
I
I
I
I
BT IA - - : - - - - - -..
~
I
~ 14.3
.. s Sec.
HOLD ____..........______~rrMAXIMUM
70/75'-DII6
3-4
~
--,~.___________________________________________
figure 3·3. Sync Pulse Generation and Timing .
At the end of the last line of each page dUring retrace time, the WAIT, START,
HOLD flip-flops stop the Character and Bit COunters, hold the Master Clock, and
generate two new sync pulses. Note that the Line Counter was advanced to L1 by
character count 55 after the last displayed line of the page. The WAIT flip-flop
is set at character count 59 after last line. When the WAIT flip-flop is set,
CHARACTER COUNTER TRIGGER (CHCT) is inhibited, holding the Character Counter at
count 59.
The START flip-flop is then set by the next "1" bit from the Delay Line. This
"I" bit represents the first sync bit. The HOLD ~lip-flop is then set during
BT1A and disables the output of the 3.072 MHz Master Clock. The counters now
are locked at count 59, L1, Bit Time BTIA·BT1B (the second 651 nanoseconds of
BT1A) •
The WAIT flip-flop is then reset. The HOLD flip-flop remains set for up to 14.3
microseconds, then is reset by the second sync pulse from the Delay Line which
starts the timing sequence by releasing the Master Clock and the Bit, Character,
and Line Counters. From the leading edge of th~ second sync bit to the start of
character 1 of line 1 is a dead time of 70 microseconds (Figure 3-4) to complete
the flyback time.
10 CHARACTER FLYBACK
-1 ~DEO
~~~IIIIIIIIIIIIIIIIIIIIIIIIIIIII"IIIIIIIIIIIIIIIIILffiW• • • •1mL
VIDEO
1403 ..
1·t
seco't · . ·70 ... S....
I
LINE I
VIDEO
LINE 2
LINE 3
VIDEO
LAST LINE
0
t·
10 /Tlt- .111
F;gure 3-4. Sync Pu'ses lind Video
The START flip-flop does not reset until character count 63 (IOBP) which is after
the timing resync sequence is completed.
Sync Pulse Generation During the Power Up Sequence
During the power up sequence, it is necessary to generate the two sync pulses
since the Delay Line Memory will not retain any information during power off
periods. During the power up sequence, relay K1, located at the rear of the
VDT, is deenergized until the operator presses the WRITE switch. When relay K1
is deenergized, pin 8 of the relay is connected to ground. This generates
SCREEN ERASE AND MASTER CLEAR (SEMC). SEMC resets the HOLD and WAIT flip-flops
and sets the START flip-flop.
Since the HOLD and WAIT flip-flops are reset by SEMC, the Bit, Character, and
Line Counters are running. When the counters reach L1, character count 59,
Bit Time BTlB, the Start Up Bit gate (56B5A-B) generates START UP BIT (SUB).
SUB sets the Delay Line Stretch (DLS) flip-flop (Gate 58C1B) of the DLR input
3-5
PIN 77
Yl & 02
OSC
o-__H;;.;O..L;...D-...;O.;;.P_....._ _ _ _ _ _ _ _ _- - ,
o
CLIPPER
NETWORK
Z03
CR1. Ll
F/F
&
SPIKE
DISENABLE
GATE
R3
ZOl
MASTER
OSC
F/F
o to 4.Sv
1
PIN
7S
MASTER CLOCK
3.072 MHz
TO AS
TIMING CARD
CLAMP
CR2
Figure 3·5. Master Oscillator, Block Diagram
circuit (Dwg. 2144558 Sheet 2). The DLS flip-flop sets the DLRIN flip-flop which
enters a "1" bit into the Delay Line Register (Figure 3-3).
The DLRIN flip-flop output also is applied to AND gate 68B1A. START is ANDED
with the 1 output of DLRIN to activate the BREAKOUT GATE (BOG). The BOG signal
is applied directly to the Delay Line Memory input as the first sync pulse. At
the same time, the same "1" bit from DLRIN is shifting through the DLR to generate the second sync pulse 14.3 microseconds later. The result will be two
sync pulses in the Delay Line spaced 14.3 microseconds apart.
When the VDT is in the Write mode and the operator presses the SCREEN ERASE with
MASTER ERASE held down, the SEMC signal will cause all the data stored in the
Delay Line Memory to be erased, including the two sync pulses. The sync pulse
generation cycle is then automatically repeated to generate two new sync pulses
for the Delay Line.
3.4 LOGIC DESCRIPTION (Refer to Figures 3·5 and 3·6.)
The VDT logic circuits (Figure 3-6) are on the six printed circuit boards (AI
through A6) in the Logic Nets. Each board has a specific set of logic functions
controlling a specific portion of the VDT. Table 3-1 lists the main mnemonics generated in the VDT logic. The following detailed logic description follows the
order of generation of timing signals from the 6.144 MHz crystal through the
countdown circuits to the 60 Hz output used for vertical resync. This includes
the generation of the master clock frequency, the timing clocks used to shift
the registers, the tickler frequency used in character generation and presentation, the Bit Counter, Character Counter, Line Counter, the 19.2 KHz Drive Enable,
the Horizontal and Vertical Sync pulses, the mode control logic, the mark control
logic and transmit/receive logic.
3.4.1
PRINTER TERMINATOR AND OSCILLATOR, A6 (Refer To Dwg. 2144509.)
The master oscillator card (Figure 3-5) contains a 6.144 MHz crystal controlled
oscillator, an amplifier with an output clipper network, a differential switch,
an emitter follower with an output clamp, spike suppression logic, and a triggered flip-flop.
3-6
CONTROL PANEL .....---.
KEYBOARD AND
MATRIX
SWITCHES
~
RECEIVE
A4
MARK
LOGIC
CARD
DELAY LINE REG ISTER
t
I
DLR
-----+
A1 & A2
INPUT/OUTPUT CARDS
Bl, B2, TR, TRO
DELAY LINE
INPUT CIRCUIT
DATA SET
I+______ II_.=.p.!!H~ON~E::....=L~I!!NE"__
_I.~
TRANSMIT
r-------l
;~ECTIOIl
I~~~g~R I
REG ISTER CONTROL
LOGIC
'-------+-----1----1_-.
rl__----------------~MO~N~OS~C~O~P~EL1S~W~E~E~P~G~A!TE~MSG~~----------------------------------------~
I
AMPLIFIER
A10 A2
VOLTAGE
DIVIDER
I
!
I
I
I
DISPLAY REGISTER DR
1
1-______.......'
HORIZONTAL
PARITY
GENERATOR
D/A
HORIZ
11---+!_~:;~~~"'i!..!!a:::C~i:...I_O..,N~
I
I
A10 V1
MONOSCOPE
TUBE
I
I
I
HaRIZ BITS 4,5. 7
VERTICAL
VERT BITS 1, 2, 3
I
L _____________________ _ ______________________ 1I
CHARACTER
VIDEO
PULSES
A10 A1
VIDEO
PREAMP
VIDEO
A12
VIDEO
DRIVER
VERTICAL
I I ~~i~~~ION
I :
r+iL _______ .J
D/A
PARITY BIT
VIDEO
FORMAT BIT (BRIGHTNESS)
DISPLAY CRT
r
L...----------I
MARK VIDEO
~J
VERTICAL TICKLER SCAN
r------------,~
~
MARK BIT
~~~~~------------------------------------------------------------------I-------------------------IHA11
r__~AL~TE~R~NA~T~E~T~I~CKL~E~R~S~C~A~N~____________________________________________________________________~__
r------------
I
I
I
I
I
I
I
I
I
I
WAIT It-'___~
I HOLD LOGIC I TIPS FLIP-FLOP I
TICKLER FREO • .
+ 2
I
1.536 MHz
r
LOGIC
+2
1
768 KHz
I
t-F;.,O;;.C;;.U:,:S:..,;CO=RRE=:::C:,:T.;:;I:::O::.JN
I
VERT SWEEP
A9
DEFLECT ION
TWO PHASE
PULSE FORMER
768 KHz
~
TeA
1.2 KHz
CHARACTER
COUNTER
.;. 64 1280 Hz
OUT
BIT COUNTER
+10 76.8Khz
OUT
.;.
L......
----
1.2 KHz
HORIZ SWEEP
AMPLIF H.'J{
L--~-_~~EPr------~
FA;IL
~
LINE COUNTER
+ 20 1200 Hz
16.7mSEC
OUT60 Hz
16.7 m Sec
AD
HIGH VOLTAGE
POWER SUPPLY
19.2 KHz
H.V. DRIVE
OUT
I
I
r-------------~~-~~~~~---------~
I
JI
+12 kv
-1800 VDC
+1750 VDC
+400 VDC
+75 we
+25 VDC
I
4
L _________________________________________________________________________________
70/7$2-811
A20
DYNAMIC
MONOSCOPE
SWEEP
LOGIC
I
I
I
rl
' -__F_O_C_U_S____....
I
I
I
L-________~T~I~CKL~-~~R~S~"'~·~J~l________..J
DRDreR
TICKLER COIL r
TO DLR
!
:
~
-------------------------------------------------------------,
A5 TIMIm CARD
I+-_---:I-fr START
A6 PRINTER
TERMINATOR AND
OSCILLATOR CARD
6.144 MHz CRYSTAL
+2=3.072 MHz
MASTER CLOCK
______________________________
H.V.
ENABLE
A14
LOW VOLTAGE
POWER SUPPLY
-15 VDC
+4.5 VDC
6.3 VAC
figure 3·6. VDT Block Diagram
3-7/8
The function of the oscillator circuit is to produce a Master Clock frequency that
is used to generate all the other timing pulses in the VDT logic. The sinusoidal
output of the colpits oscillator is amplified, clipped, and applied to a differential amplifier to produce a 6.144 MHz square wave. The clamped output of the
emitter follower triggers the Master Oscillator flip-flop ZOI thru the spike
suppression logic.
Note
The Printer Terminator and Oscillator Adapter
pic board is replaced when the Printer Special
Feature is installed by a Printer Adapter pic
board, No. 2144570.
Spike Suppression Logic
The spike suppression circuit consists of flip-flop Z03 and gate Z02. The function of the circuit is to prevent the oscillator emitter follower output from
setting the master oscillator flip-flop during resync time. During the timing
resync sequence, the HOLD-OP signal is applied to both the ZOI and Z03 flip-flops
to stop the master clock. When the HOLD signal terminates, the oscillator again
is able to set the master oscillator flip-flop (ZOl) and the 3.072 MHz clock
frequency is again applied to the Timing card A5.
3.4.2
TIMING LOGIC, A5 (Refer To Dwg. 2144556 Sheet 1.)
The Timing Logic card receives the 3.072 MHz Master Clock frequency from the
A6 card and generates all the countdown pulses required for the logic timing
of the VDT.
Timing Requirements
The VDT timing requires the following frequencies generated on card A5:
1.
1.536 MHz used to generate the tickler frequency.
2.
768 KHz used to generate the TBA and TBB timing clocks.
3.
76.8 Khz character count (10 bits per character).
4.
19.2 KHz used for H.V. DRIVE ENABLE.
5.
1200 Hz used for line time (Horizontal Sync).
6.
60 Hz used for page time (Vertical Resync).
In addition to the basic frequencies required, the Timing logic card generates
the START, WAIT, and HOLD signals. With the standard timing board, this timing
sequence contro"ls presentation of 1080 characters presented on a 20 line raster
with 54 characters per line displayed. An additional 10 character-times per
line are requjred for flyback time during horizontal retrace between lines.
This makes the total time per line 833 microseconds. Each character bit requires
1.302 microseconds. Each character (10 bits) requires 13.02 microseconds.
3-9
Each line of 54 characters requires 703 microseconds. The total viewer screen
page is refreshed at a 60 Hz rate to prevent flicker due to the short image persistance time of the viewer display tube.
Functional Parts of A5 (Refer to Figure 3-5.)
The Timing Logic card contains the following functional parts: two frequency
dividers, a TIPS flip-flop, a two-phase pulse former, a Bit Counter, a Character
Counter, a Line Counter, and the asynchronous delay line control timing. The
resulting outputs are the two clocks, ,TBA and TBB, A and B bit times, character
counts at character times 1, 2, 55, 58, and 63, and line counts used in establishing horizontal and vertical sync.
'
Tickler Freguency Generation (Refer to Dwg. 2144556.)
The input Master Clock frequency to A5 (from A6) is'app1ied to Frequency Divider
flip-flop 56C8B. This flip-flop divides the 3.072 Master Clock frequency to
1.536 MHz for use as the Tickler frequency. Both outputs of the Frequency
Divider flip-flop are applied to separate AND circuits, which also receive the
two outputs of the TIPS flip-flop, 56C8A. The TIPS flip-flop is triggered by
the VERTICAL SYNC signal (VSYNC-N). VSYNC occurs at the end of each page scan
of the Viewer tube. The AND circuits are arranged so that the OR circuit 56BSA
output to the Tickler Driver will apply opposite phases of the Tickler frequency
on alternate screen scans. This produces a better character presentation on the
screen by double scanning the Monoscope stencil to completely cover the character
cutout.
Two
Phase Pulse Former (Refer to Figure 3-7.)
The function of the two-phase pulse former is to generate two timing clocks,
TBA and TBB, which provide the basic timing for the VDT timing. The two-phase
pulse former consists of five transistors and a 100 nanosecond delay line. The
circuit input is a 768 KHz square wave from the Frequency Divider flip-flop,
56C7A, through two amplifiers 56D6A and 56D5A.
TBA and TBB Generation (Refer to Figure 3-7.)
The positive (+4.5v) half cycle of the square wave causes input transistor 03
to invert the input and 02 applies a ground level to one end of the' circuit's
100 nanosecond delay line. At the same time, 01 is turned off. The positive
change in 01 collector level applies an input signal to the ungrounded end of
the delay line. The delay line reflection 200 nanoseconds later causes the
collector of 01 to drop to zero. During the 200 nanosecond period that the
collector of 01 is positive, output transistor 04 is turned on. The 200 nanosecond timing clock (TBA) is generated and amplified by 56D6B and applied to
amplifier 56C6A. The output of 56C6A (TBA) is available at TP7 and is routed to
several other logic circuits.
When the 768 KHz input square wave goes negative, transistor 01 conducts to
ground one end of the delay line.
3-10
TP5
TBB-N
100 n
Sec. DELAY
768 KHz
1.072 MH?
J1.Il.IL
(lP)
TRIGGE~
FREQ
DIVIDER
F/F eBB
HOLD_OP
FREQ
1.516 MHz
DIVIDER
F/F C7A
"A" BIT COUNTS
•
•
TIPS
F/F
VSYNC-N
BIT COUNTER
5 STAGE (RING)
26,10,14
TP16
Z21
"8"BIT
GATING
LOGIC
C8A
n Sec PULSES AT 768 KHz PRF
1.516
MHz TICKLER FREQ
1+----+1651 n Sec
TBA
MASTER
CLOCK
II
II
r
---.J
L..J
L..J
3.072
hLTERNATE
TICKLER
I~
WAVEFORMS
70/752-Dll)
I
_ _ _ _--1
L
LOGIC
L
--1lL--_--Jnl...____
U....
T B B - - -....
--.....,~
co-:;:;rs
Note
The opposite end of the delay line is now grounded
compared to the TBA generation half cycle.
At the same time, transistor 02 is turned off, and the r~s~ng level of the 02
collector applies a signal to the ungrounded end of the delay line. 200 nanoseconds later the delay line reflection turns off transistor 02. During the
200 nanosecond period, output transistor 05 generates a 200 nanosecond timing
clock which is amplified by 56D5B. The output of 56D5B (TBB) is applied to a
fan-out of several amplifiers and is available at TP3. The amplifiers apply
the TBB signal to several other logic circuits, including the BIT COUNTER flipflop (BBCNT), 56C3A.
The result of the TBA and TBB generation circuits produces two 200 nanosecond
clock pulses spaced 651 nanoseconds apart and occurring at the leading and trailing edge of the positive half cycle of the 768 KHz square wave. This p~oduces
two clocks during each bit period of 1.302 microseconds.
Bit Time Counter, BCNTI-BCNT5 (Refer to Dwg. 2144556 Sheet 1.)
The Bit Time Counter located on the A5 board is a five stage ring counter with
a reset on the first two stages. The counter states are shown in Figure 3-8.
Initial conditions are set into the counter by clearing the first two stages.
The counter is shifted by the TBA-N pulses from amplifier 56D6B. TBA-N shifts
the state of the lower numbered stages to the higher number stages. The Bit
Counter utilizes a walking grey code, shown in Figure 3-8, to decode the ten
bit counts, BTIA through BTlOA.
COUNT
BCNTI
BCNT2
BCNT3
BCNT4
BeNT5
1
2
0
0
0
1
1
0
0
0
0
0
0
0
5
1
1
1
1
6
1
3
4
1
1
0
0
1
1
0
1
0
0
1
1
7
0
1
1
1
1
1
8
0
0
1
1
1
9
0
0
0
1
1
10
0
0
0
0
1
NOTE: These outputs may be seen at the "I" or "0" sides
of the BCNT flip-flops.
figure 3·8.
3-12
Walleing Grey Code Counter
TBA(P)
.651
r
~SEC--I
TBB(P)
,r-----r,--
-j ~~~~
200 N SEC
1-" ~~~~ 1-1 H !-
BCNT I(lP)
________----'r
BCNT 2.(lP)
BCNT 3UP)
BCNT 4(1P)
BCNT5(1P)
"If.'
BIT
J'"-____________
~
-....,.--..,..--T'""---.,r-----..--"'T""--,.....--'""'T--"'T""--T'""---.,r-----..--~
COUNTS
IA
2.A
3A
4A
6A
5A
7A
8A
9A
lOA
IA
2.A
L
BCNTUP)U
"B" BIT
..,..--,.....---,---r---r----.,r-----..--"'T""--,.....--....,.---r---.---r--
COUNTS
lOB
IB
BPIA
BP2A
BPIB
2B
4B
3B
BP3A
BP4A
BP3B
5B
BP5A
BP4B
BP6A
BP5B
7B
6B
BP7A
BP66
BP8A
BP7B
9B
8B
BP9A
BPBB
lOB
BPIOA
BP9B
IB
BPIA
BPIOB
BP2A
BPIB
BP2B
________
r:
n
~ I~------------------------------~ ~____
CHP~~__________________________________~n
DRS
L
MSG~
CHCT
•
•
•
•
CHP: CHARACTER PULSE- EVERY CHARACTER AT BPIA
DRS: DISPLAY REGISTER STROBE-EVERY CHARACTER AT BTIA AND BTiOB
MSG: MONOSCOPE SWEEP GATE- EvERY CHARACTER AT BTiA AND BT2A
CHCT: CHARACTER COUNTER TRIGGER-EVERY CHARACTER BT4A
70/752' DI21
figure
3·', Bit Counter Timing
3-13
The Bit Counter is a self-correcting type in that on initial start-up the states
of the counter are not determinable but after a few counts the reset will correct
the count.
For example, when the BCNT4 and BCNT5 flip-flops contain the "O:!."
count, the BCNT1 and BCNT2 flip-flops are reset.
In one case the count could be
"00101". The next counts then would be 00010 and 10001: then the first two
stages would again be reset to provide the counter state of 00001. The counter
would then proceed to count as shown in Figure 3-8.
Bit Time Decoding
The "A" bit times (BT1A-BT10A) are formed by ANDing the BIT COUNTER flip-flop
outputs to decode the desired counts.
The output of the "B" BIT COUNT flip-flop is applied to AND logic along with the
outputs of the Bit Counter to produce the bit times BT1B thru BT10B. The "B"
BIT COUNT flip-flop (BBCNT) is triggered by the second timing clock, TBB-N,
which occurs 651 nanoseconds later than TBA. The "B" bit times trail the "A"
bit times by 651 nanoseconds, as shown in Figure 3-9. Note that many of the
bit times are not decoded.
Character Counter, CHC1-CHC6 (Refer to Dwg. 2144556 Sheet 2.)
The Character Counter, located on the A5 board, is a standard six stage binary
counter with 64 counts. Each count corresponds to one of the 64 character positions on one line of the viewer 20 line raster. The Character Counter is triggered by CHARACTER COUNT TRIGGER, CHCT (56B7A-SH3), which occurs· once each character time.
The Character Counter outputs in conunction with the Line Counter
outputs generate the following signals (Figure 3-10):
BOL = Beginning-of-Line
EOL
BOP
End-of-Line
= Beginning-of-Page
IOBP
= I/O
COEOP
=
Beginning-of-Page
Center-or-end-of-page
= End-of-Page
SYNC = Vertical
EOP
V
.H SYNC
SYNC
= Horizontal
SYNC
For example, the logic decodes character count 55, and this count is ANDed with
BT10B to produce the END-OF-LINE (EOL) pulse, which triggers the Line Counter.
3-14
1'4
DISPLAYED
CHARACTER
~I
I
64
·1..
DATA DISPLAY TIME
2
CHARACTER
COUNTER
I
54
53
2
~
FL YBACK TIME
55
55
57
56
____ 62
63
57
56
_ _ _ _....;B;...;T...;,.IO;:;..;::;..JB~ (1st LINE ONLY)
BOP
BTiOB
BOL
n
,
(EVERY l,INE)
,,
,,
I
~YLINE)
EOL
r---:Ir------------~I
(EVERY LINE)
HSYNC
B;5A
,~'--------,
BT4A
L-
I
I
I
I
I
I
,
VSYNC
(LAST
I
EOP
LINE ONLY)
BT9A
~LAST LINE ONLY)
~
(LAST LINE ONLY)
10BP
figure 3-10. C"aracter Counter Timing
Line Counter, LC1-LC5 (Refer to Dwg. 2144556 Sht. 2.>
The Line Counter, located on card AS, is a five stage counter that generates
the 20 line count (Figure 3-11). The counter is a decrementing type counter
with selective reset in the second and third stages. Two outputs are generated
by the Line Counter.
LOOP occurs after line 10 and line 20 and is used to generate CENTER OR END-OF-PAGE (COEOP). Ll is generated after the last line and is
used to generate END-OF-PAGE (EOP) and BEGINNING-OF-PAGE (BOP). Ll is also used
to generate VERTICAL SYNC (VSYNC), which is sent to the Deflection Amplifier to
provide vertical retrace.
I I II I I I I I II I I I II I I I I I I I I I I I II I I I I I I I I I I I I 1
EOUN)I I
1 2 3 4 5 6 7 8 910111213141516171819202122232425262728293031323334353637.'£394041424344
LC3(P)~1
I
I
LC4(P)~1
I
I
oo~
11 00
I
I
I
I 110 01
ru
u
U
U
LC5(P)1o 00 0 0 o 000 01
I..
I PAGE TIME
J
uUL
.1
figure 3· JJ • Line Counter Timing
3-15
3.4.3
The
The
The
The
DELAY LINE MEMORY, A7
Delay Line Memory unit used in the 70/752 VDT is manufactured by two ve~dors.
first type is manufactured by Laboratory for Electronics, Inc. (Figure 3-12.)
second type is the unit manufactured by Digital Devices, Inc. (Figure 3-13.)
theory of operation of each type is covered in the following paragraphs.
Laboratory For Electronics Delay Line Memory
The Delay Line is a magnetostrictive type with a delay time of 16,703 ±27 microseconds. This storage time provides storage of one complete page of information
(1080 characters, each 13.02 microseconds in duration, plus 200 character times
utilized as flyback time, for a total of 1280 character times). Since each character contains ten bits of data of 1.302 microseconds duration each, the Delay
Line can contain 12,800 data bits in addition to a start character (sync bits),
and several NUL (all zero) characters.
The data inserted into the Delay Line is in the return-to-zero format; that is,
a "1" bit is applied to the delay line as a positive pulse while a "0" bit requires no pulse at all. The total length of the Delay Line varies with temperature and affects the total Delay Line storage time. The variance in the delay
time makes it necessary to resync the timing at the end of each displayed page.
This resync cycle is controlled by the WAIT-HOLD-START logic, which is explained
in paragraph 3.3.4.
The magnetostrictive Delay Line consists of a metal wire, about 160 feet long.
The input transducer, on one end of the delay wire, launches a torsional wave
into the wire. This wave propagates in the wire with a velocity of about 100
microseconds per foot. At the other end of the wire, the output transducer
translates the torsional wave into an electric signal. With an output current of
about 30 milliamps, the output voltage will be about two millivolts. Because of
the small output signal an amplifier is provided. The amplifier output signal is
reshaped in the detector and will then resemble the input signal. The driver
provides the current to the Delay Line input transducer.
Circuit Description (Refer to Figure 3-l2.)
The electrical portion of the Delay Line Memory is divided into three parts:
the driver, the amplifier, and the detector.
The input signal turns on 01 enabling current flow through the input transducer.
This current is limited by R3, a resistor inside the Delay Line. When 01 turns
off, the storage energy in the transducer is absorbed through CR2 by R3.
If no
input signal. is connected, CRl limits the negative base-emitter voltage of 01.
The output amplifier consists of three stages (03, 04, and 05) providing a voltage
gain of about 76 db. An emitter follower 02 is provided to make the delay line
output termination less dependent on the input impedance of the amplifier. The
gain of the amplifier is, in part, determined by the signal developed in the
ratio of collectors to emitter resistors of 03, 04, and 05. To provide a gain
control, the emitter resistor (R15) of 05 is variable and can change the gain by
about 6 db. Emitter follower Q6 isolates the detector from the amplifier and
provides the signal for the test pOint. A test point at the amplifier output
allows observation of the signal-to-noise ratio and the signal amplitude.
3-16
2
l
5
•• V'.,ON.
...~
~,
TEST POINT
R20
II
+25 YDC
7
..... 5YDC
100
o
1<10
2.2K
AI!
1.2K
RI4
2.2K
1<18.
100
R25
6,SK
RZI
I~
0
~t!J
IK
9
OUTPUT
r--~------'---~~~~
=.1
Il9
RII
Rk
.82
3
7
TRIM
.(1
~12
3K
c
c
!'IOTES:
R3
I ALL RE.5ISTOR,S
t w. ± ~ 'Yo. YALUES IN OHMS.
2. CAIl\(ITOR VALUES IN MICIO'ARAOS ALL CAPS. SOY. RATING.
MAGNETOSTRICTIVE DELAY Llr£
_____ J,
" ,..- ________ _._1,
"
lUCK
ItI'UT
•
\.;
RED
OUT~UT
\/
BLP(K
B
GREE'"
-15 YDC
~
- -PC CONNECTOR
"~.E.E
LAlt !ill'
uUo
OIESClilt .. TleN
c" "'
---
CR'
LI
QS
FIn
70/7~2
8M 2039ACEOI
·D844
5
.
SCHEMATIC AND
WIRING DIAGRAM
MAG LINE
.....
A~IC"'TtON
3
~.
2
Figure 3-12.
Delay Line Schematic (LFE)
3-17/18
+v
-+}
R48.I. (23
1\;7
_ - - + - - - - - 0 [) L ..
1
M3
Vee
Of-----1>-----0
+ (2+
QII
I
+v
__
o,--~--! ---~o
+
-v
TP2
+v
-v
(2.5
I
or----~I.----O
+I
(=f~ou,,",
(2.6
Vee
Vee
I
'22
R"I-
-v
R8
R7
RI
R27
+
R3
11.2
11.28
X
Cl
11.5
R+
R29
+.:c..'3
C20
-L
R34
~
CRI
-y
R33
n-__- .....
+*
R-~----~jv
(17
~--.------~ +
ilL"'"
---.R42
R51
+v
TPj
11.17
R21
11.2+
RI6
R25
1\19
~(4
Vee
R22
R32
11.30
.J...
cla C5.E -i.
+I
--- --
C13
+Ici •
--
(15~I/b
+IClb
o-v
(28
+I
70/7e2· D 819
Figure 3· 13. Delay Line Schematic (Di,ita' De"ices)
3-19/20
The detector consists basically of a tunnel diode (CR3) and a transistor (07)
with a bias network (CR4, R23, R26, C15). A signal of 1.5 volts at the emitter
of 06 will cause a current of about one milliamp to flow into the tunnel diode
through R22. Any increase in input signal will now drive the tunnel diode into
the negative resistance region. The voltage across the tunnel diode will increase
and most of the signal current will flow into the base of 07. This transistor
will turn on and its collector voltage will drop to about 0.25 volts. 08 will
turn off and the output voltage will rise to 4.5 volts. When the input signal
returns to zero, 07 will turn off and the collector current of 07 will now flow
into the base of 08. The output voltage will then be about 0.25 volts.
A bias of 0.4 volts provided by the network shifts the tunnel diode's characteristic curve. The load line of the combined tunnel diode-base/emitter (of 07)
characteristic will cross the base/emitter characteristic before it crosses the
portion of the tunnel diode characteristic after the valley point voltage. This
causes most of the tunnel diode current to flow into the base of 07 after the
input current exceeds the peak point current.
In a like manner, as the signal
voltage is removed, the tunnel diode retraces over the current peak and the
voltage falls, allowing insufficient bias for 07.
Digital Devices Delay Line Memory
The second Delay Line Memory is similar to the first type and utilizes the same
voltage levels. The two units are considered interchangeable and no rewiring is
necessary when replacing one type with the other.
Circuit Description (Refer to Figure 3-13.)
The electrical portion of the Delay Line Memory is divided into four parts:
the input driver, the amplifier, the quantizer, and the output one shot.
The INPUT signal is applied through logic gates ZlA and ZlB (an inverter)
to a push-pull output stage (011 and 12). The push-pull output drives the delay
line input transducer which launches a torsional wave into the delay line wire.
The delay line output transducer is connected to the output amplifier. The output amplifier consists of a six stage amplifier (01 through 06). Amplitude adjustment is made by adjusting potentiometer R11. The amplifier output is available at test point TP1.
The output of the six stage amplifier is applied to the quantizer consisting of
07 and CR1. The quantized output signal turns on 08. The one shot (09 and 10)
is triggered and the one shot output is available at test point TP2. The one
shot output is applied to the Delay Line Memory OUTPUT through logic gate ZlC.
3.4.4
REGISTER LOGIC CARD, A3 (Refer To Figure 3.14.)
Delay Line Register, DLR (Refer to Dwg. 2144558 Sht. 2.)
The DLR is an eleven stage shift register, the contents of which are parallel
transferred to the Display Register (DR). The function of the DLR is to act as
the input register for the Delay Line Memory, A7. During normal recirculation
of stored data, the Delay Line Memory output is amplified, shaped, stretched,
and applied to the input stage of the DLR. After being parallel shifted into the
DR, the character bits are again serially shifted back into the Delay Line Memory.
3-21
Display Register, DR (Refer to Dwg. 2144558 Sht. 2.)
The DR functions as a storage buffer between the DLR and the Selection Amplifier,
A8. This allows storage of each character for one full character time (13.02
microseconds) in the DR while the next character's bits are being serially shifted
out of the delay line and into the DLR, and the previous character's bits are
being shifted back into the delay line for recirculation. During this storage
time, the character bits stored in the. DR are applied to the Selection Amplifier,
A8, and D/A converters which convert the X and Y deflection bits into equivalent
gross positioning voltages for selection of the proper character on the monoscope
character stencil.
The Display Register also has a set of input AND gates connected to the set terminal of the seven flip-flops (DR1 through DR7), which are used to enter the
seven character bits from the keyboard microswitches during keyboard entry.
Delay Line Register Entry Circuit (Refer to Dwg. 2144558 Sht. 2.)
The delay line entry circuit, located on card A3, consists of an inverter-amplifier 58C1A, the DELAY LINE STRETCH (DLS) flip-flop, and the DELAY LINE REGISTER
INPUT flip-flop (DLRIN) (Figure 3-3).
The DLR entry circuit receives the 225 nanosecond output of the keyboard filter
one shot, which is the amplified Delay Line Memory output DLOUT-P. The DELAY
LINE STRETCH flip-flop (DLS) stretches the one shot signal and applies it to the
DELAY LINE REGISTER INPUT flip-flop (DLRIN). The TBB clock pulse controls the
shifting of the data into the DLR.
Keyboard Parity Generator (Refer to Dwg. 2144558 Sht. 1.)
The PARITY GENERATOR flip-flop (KBP) monitors the output of the Display Register
stage CR1. When a character has been entered into the DR from the keyboard microswitches, the character bits are serially shifted to the Delay Line Memory input
circuits through gate 58C6B. During the transfer of the character bits, the output of the KEYBOARD PARITY GENERATOR flip-flop is ANDed with BT8B-P. When the
number of "l's" counted by the KBP flip-flop is an odd number, the AND circuit
enters an additional "I" bit into the delay line input circuit to make the total
character "1" bit count an even number.
Keyboard Parity Checker (Refer to Dwg. 2144558.)
When the character bits exit the delay line and enter the DL~ the parity count
(number of "1" bits) is monitored by the DISPLAY PARITY CHECK flip-flop, DPC
(58A8A). When the DPC flip-flop parity count ("l's") is an even number, the
character in the DR is displayed. When the parity count ("l's") detected by the
DPC is an odd number, the logic causes a bright square block to be displayed in
place of the faulty character.
Normal Recirculation of Stored Data
Figure 3-14 shows the normal recirculation path of data stored in the Delay Line
Memory. Stored character bits are shifted serially into the Delay Line Register
from the Delay Line Memory, through a 225 nanosecond one shot pulse shaper,
located in the keyboard filter (A21), and through the DLR input circuit, located
on card A3.
3-22
----------------------------------------,
A21
KEYBOARD FILTER DWG 2165479
r---------------------------------------A7
i
I
;
I
I
I
:
:
:
: 31
~
I
E2A
30 I
O~O;HOT
DELAY LINE MEMORY
DIiG 2039ACE23 OR DIiG 5000-105S
'
TTP
:
:
DETECTOR·
~:i~R
AMPLIFIER
J7'
DL OUT-P
:
:
'J7
-'.'OUT
IN:";'
~~~r)~:--~~~~------~~~~:~~
DELAY LINE
,
I
"
DTDLM-P
~~~~~:~~~~~~~------------------------------------------------~
I
I
I
I ________________________________________ I
"
,L_______________________________________ JI
I
~
~
Ir------------------------------------------------------------------------------------------------------------------------------------------,
A3 REGISTER LOGIC BOARD DIiG 2144558
TP33
$
I
I
,,
I
DLRME-IP
DELAY LINE REGISTER (DLR)
, 26
DLMIN-P
L.----TV....j,I<,...")--...;;.;=;.;;...~--... C1A>-+l4
I
I
...
1 I--_--I~ 1
DLS
FIF
TBB-N
I
2
o
o
IH......_ _ _-+I
1 I....-....a. 1
DLRIN
FIF
,----
DLRMN
DLRF
DLRP
DI,R7
DLR4
DLR5
DLR6
DLR3
DLR2
DLRI
O~O
SEE FIGURE 3-15
[
I
•
XEYBOARD CHARACTER BITS
(7 BIT PARALLEL ENTRY,
ENABLED BY KBEN)
DPC
(PARITY
CHECKER)
J
....
70 - ' - DELAY LINE
ENTRY CIRCUIT
DLRMt:
KBP_lpL------I
•
DRM
(MARI<)
DRF
(FORMAT)
+
DRPE
(PARITY
ERROR)
DR7
+
.~
+
DR6
DR5
~
+
DR4
DR2
DR3
DRI
DRI- JIl
KBP
(PARITY
GEN)
r\
DISPLAY REGISTER (DR)
1
Y2
I
L----.-...I
ll~J
':HARAC'rER BITS
TO A12 VIDEO DRIVER
t t
t
X2
r
;P28
x'o
HORIZONTAL
(x)
t
TO AS SELECTION
CHARACTER BITS
t
t
~L1FIER
CHARAC'I'ER UNBLANK LOGIC
I
I
. _____I
1_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _. _ _ _ _ _ _ _ _ _ _ _
70/752' DB04
figure 3· J4. . DLR &DR and Delay Line Memory
3-23/24
TBB serial shifts the DLR every 1.302 microseconds; therefore the bit rate is
768,000 bits per second. When a character is shifted into the DLR, the least
significant bit is the first to shift from the delay line into DLRMN (Mark Now)
flip-flop. The first bit per character is shifted in at BT1B. At BT~OB the
complete ten bit character is in the DLR. The least significant ASCII character
bit is in DLR1 and the most significant bit is in DLR7. The parity bit is in
DLRP, and the mark bit is in DLRMN. The format bit will be set to "1" in DLRF
only for a format character.
Parallel Shift of Data From DLR to DR
The parallel shift is enabled by DLR ENABLE (DLREN) from 58C8B. The DLREN signal
is present at time BT1A·BT10B, during the second 651 nanoseconds of dT10B. During
this gating period the DLR contents are enabled through AND gates to set the
character bits into the Display Register where they are held for one character
period, or 13.02 microseconds. The serial shift of the DLR is continuous; the
character shifts out of the DLR into the delay line input for memory recirculation.
The next character from the delay line is similarly shifted into the DLR.
Delay Line Memory Entry Circuit (Refer to Dwg. 2144558 Sht. 1.)
The delay line entry circuit consists of an OR gate (58B6A and B) through which
data is routed from six sources and stored in the Delay Line Memory, A7
(Figure 3-15).
DTDLM Generation
To standardize the input signal to the delay line memory, all input signals are
routed from the delay line entry OR circuit to the AND circuit 58B6C, where the
input signal is ANDED with the 768 KHz square wave and the output of the 130
nanosecond delay line (DL1). The AND circuit generates a standardized pulse
521 nanoseconds wide and delayed 130 nanoseconds from the leading edge of the
TBA pulse. This standardized pulse is DISPLAY TO DELAY LINE MEMORY (DTDLM-P),
which is the "1" bit entered into the Delay Line Memory for each "1" bit of data
to be stored.
Normal Recirculation
The normal recirculation path from the Delay Line Register (DLR) output stage is
routed to the OR circuit (through other gating logic) to pin 4 of 58B6B. During
normal recirculation, all data displayed is recirculated at a 60 Hz rate to constantly refresh the viewer screen phosphor.
Keyboard Entry
When the operator selects a new character at the VDT Keyboard, the character bits
are entered into the Display Register, and serially shifted from the DR output
stage (DR1-P) through gating logic to the OR circuit input at 58B6B pin 2.
3-25
PARITY GENERATION--...r'----KEYBOARD ENTRY - - - - ( : l
58B6C
REMOTE DATA FROM
PROCESSOR
~_~D~TD~LM~-~P_~70
Z39
SYNC PULSE ENTRY
DL1 130 n Sec.
768 KHz
_---I
58B7A
Z45
SEMC'--~
58B6C-5 768 KHz ___
r
'---651 n s e c . - I
:-
1
!-._ _ _ _ _ _ _.....
I
I
I
1130nl--
58B6C-4 DELAYED ~ Sec.
768 KHz
I
I
I
I
I
I
I
I
I
I
I
!
....__________
58B6D-8 DTDLM-P _ _ _ _.....L521 n sec.-I
10/7&2-01111
figure 3-U. Delay Line Entry, Block Diagram
Remote Data Entry
When data is being received from the Basic Processor Unit, whether it is remotely
located or at the local installation, the received data is routed from the InputOutput Registers (in units Al and A2) through gating logic by the BUFFER TO DISPLAY
signal (BTD) and applied to the OR circuit at 58B6B pin 1.
Note
The received data is shifted into the I/O
registers at the 1200 bit rate of the Data
Set and shifted out of the I/O registers at
the 768 KHz rate of the delay U.'1e.
3-26
SYNC Pulse Entry
The SYNC pulse from the Breakout Gate (BOG) circuit is applied to the delay line
entry OR circuit at 58B6A pin 5. This enters the breakout gate signal "into the
delay line to form the first SYNC pulse stored in the Delay Line Memory during
RE-SYNC time at the beginning of each page display time (before the start of a
new page entry at line 1).
Format or Mark Insert (FOMI)
The initial entry of the mark (or cursor) is routed from the mark logic to the
OR gate at 5BB6A pin 4.
When the Format Special Feature is installed in the 70/752 VDT, the operator
can request a Standard Format from the BPU. The Format bit is entered in a
Format Data character through gating logic to the delay line entry OR circuit at
5BB6A pin 4.
Keyboard Parity Entry
When a new character is entered from the Keyboard and the parity generator generates a "1" to make the character parity count even, the parity bit is entered
into the Delay Line Memory at 58B6B pin 5.
3.4.5
MARK LOGIC, A4 (Refer to Dwg. 2133557.)
The mark logic board contains the logic that controls the movement of the mark
(or cursor) in the Delay Line Memory and the position of the mark on the Viewer
screen. The A4 board also controls the Data Insert Feature logic (one of the
standard features).
Some of the operations controlled by the mark movement are:
1.
Transmission of data
2.
Reception of data
3.
Erase operations
4.
Printing sequences
5.
Keyboard input
6.
Manual mark movements initiated by the operator such as:
a. Mark advance
b. Backspace
c. Line adv.ance
3-27
Mark Position Sensing
To enter characters in the Delay Line Memory at the proper position the position
of the mark must be sensed when it is in the Delay Line Register (DLR). This
ensures correct placement of characters, allows the mark to be advanced or backspaced, and additional characters to be inserted or erased.
The position of the mark is sensed in the DLR at the Register Input flip-flop
DLRIN, the Mark Now flip-flop (DLRMN), and at the output end of the register at
flip-flop DLRME, the Mark Early flip-flop (Dwg. 2144558 Sht. 2.).
Backspace Operation
During the backspace operation, when the character having the mark enters the
Delay Line Register and the mark bit is positioned in the DLRMN (Mark Nov') f.lipflop, the mark bit is sensed in the Mark Now flip-flop DLRMN. The Mark Early
flip-flop (DLRME) is set and the DLRMN flip-flop is cleared.
Note
The backspace command depends upon DLRMN.Steering
(DLRIN levels) to set the MKFF at BT10B. The output of the MKFF in this case enables the gate BKS-N
and at the next TBA, the BKS-N signal resets the
DLRMN flip-flop and sets the DLRME flip-flop,
effectively moving the mark back one character
time on the Viewer screen. This means the mark
bit now enters and exits the Delay Line Memory one
character time earlier than it did previous to the
backspace operation being initiated. This means
the mark will appear on the Viewer screen one
character time sooner than it had previously.
Mark Advance Operation
To advance the mark, it must be sensed in the Mark Early flip-flop.
Note
that this flip-flop is at the output end of the DLR and therefore the character
containing the mark bit has already been serially shifted out of the DLR (with
the exception of the mark bit). The Mark Early (DLRME) flip-flop can be cleared
and the Mark Now flip-flop (DLRMN) can be set. The mark bit will now enter and
exit Delay Line Memory one character time later than it did before the advance
operation was initiated. This means the mark will appear on the Viewer screen one
character time later, or effectively will be advanced one character on the display.
Mark COntrol cycle Counter (Refer to Dwg. 2144557 Sht. 2.)
Note
To eliminate the effects of the command switch
contact bounce, the outputs of all mark control
panel matrix switches and Keyboard Strobe are
ORed to produce the MARK CONTROL (MK CaNT) Signal.
The MARK CONTROL signal is used to activate the
Mark Control Cycle Counter.
3-28
The function of t.;1e Mark I'unt..rol Cycle COunter is ~o delay keyboard entry and
mark control actions for 0 to 16 milliseconds to bypass the contact bounce interval, and to cause advunce iiDd backspace functions to repeat at a rate of 9 times
per second.
When a mark command has been entered, t.he mark cOlltrnl and eOEOP, (eenter-orEnd-of-Page) signals will advance the counter 1'0 a count of one, (eel Set==OOl).
The next center-or-end-of-page pulse will advance the counter to a count of two
(ee2 Set==OlO). Note that the advance to count two may take [rom a minimum of
8.3 milliseconds to a maximum of 16.6 milliser:onds from the time the mark command
was entered.
The cOllnt of two (010) enables the steering gates of the MKFF to
sample the mark bit.. of ead character as it is shifted through the DLR. When the
mark is detected at DLRMN (for backspace) or DLRME (for other functions), tht=
MKFF is set. to move the mark.
The mark is detected at DLRMN to activate data
entry or erase functions.
Keyboard Entry
Normally, the Delay Line Register Enable signal (DLREN) transfers successive
characters from the DLR to the DR, where each is held for one character time.
When a character is typed, KBS activates the mark control logic. Detection of
the mark in DLRMN blocks DLREN and activates the Keyboard Enable signal (KBEN).
KBEN transfers the keyboard character into the DR and sets the Keyboard Entry
(KBE) flip-flop.
KBE enables the DATA INSERT AND KEYBOARD ENTRY (DIKE) Signal
(which blocks DLRME and enables DRI into the delay line input circuit) and activates the DISPLAY REGISTER TRIGGER (DRT) pulses, which shift the character
through the DRI. At: the end of the character time, KBE is cleared and data flow
returns to normal. A character may be entered into a blank position in the displayed page or it may replace a character previously stored.
Data Insert
If a character is to be inserted into a series of characters already stored
(for example, to change INERT or INSERT), the Data Insert switch is turned on
and the new character typed into the position occupied by the character which
should follow it (for example, position the mark under E and type S). The keyboard entry is done normally but, with the DI switch on, KBE sets the DATA INSERT
DISPLAY (DIDF) flip-flop.
DIDF maintains the DIKE and DRT functions after KBE is cleared. While the character in the DR is shifted to the delay line, the character in the DLR is shifted
into the DR (Figure 3-16.) As long as DIDF remains set, the previously stored
characters ar~ delayed one character time before being returned to the delay line.
At the end of each line, the End-of-Line flip-flop (EOLF) blocks DIKE and DRT to
hold the last character on the line until the beginning of the next line. DIDF
is cleared at the end of any line in which the last character is non-graphic
(NUL or control code) or at the end of page.
Erase Functions
The operator may select a Matrix Switch to enable logic to erase either an individual character,' a complete line (or last part of the Line), or the entire page
presentation on the viewer screen. When a single character is erased, the logic
will move the mark to the next character. When all or part of a line is erased, the
mark is automatically advanced to the beginning of the next line. When the entire
screen is erased, the mark returns to zero or the beginning of the first line of the
displayed page.
3-29
Table 3·1.
DESCRIPTION
MNEMONIC
3-30
Glossary of Mnemonics
DRAWING NO.
SHEET
19.2 KHz
H. V. ENABLE
56
2
A1-1P
BUFFER REGISTER NUMBER 1 (B1) FULL
59
2
A2 (lP)
BUFFER REGISTER NUMBER 2 (B2) FULL
59
2
ADVSW
ADVANCE SWITCH
ASK
ADVANCE OR STROBE KEYBOARD
57
2
AT (lP)
TR REGISTER FULL
59
2
ATA
TR REGISTER FULL (PRINTER)
70
1
Bll-B18
BUFFER 1 REGISTER
59
1
B21-B28
BUFFER 2 REGISTER
59
1
B2T
BUFFER 2 TRIGGER CONTROL
59
2
BBCNT
"B" BIT COUNT
BCNT1-BCNT5
BIT COUNTER
56
1
BllN
BUFFER 1 INPUT
59
2
BKS
BACKSPACE
57
1
BKSPL
BACKSPACE LOOKOUT
67
1
BOL
BEGINNING OF LINE
56
2
BOG
BREAKOUT GATE (1ST SYNC BIT)
58
2
BOP
BEGINNING OF PAGE
56
2
BTD
BUFFER TO DISPLAY
59
2
BTDS
BUFFER TO DISPLAY SET
59
2
BT1A-BT10A
BIT TIME lA-lOA
56
1
BT1B-BT10B
BIT TIME 1B-10B
B2T
BUFFER 2 TRIGGER CONTROL
59
2
CA2
CLEAR A2
60
2
CC1,2,4
CYCLE COUNTER
57
2
CCC
CLEAR CYCLE COUNTER
67
1
Table 3·1.
Glossary of Mnemonics (Conrd)
DESCRIPTION
MNEMONIC
DRAWING" NO.
SHEET
59
1
CFMC
CLEAR FORMAT MODE CONTROL
CHCI-CHC6
CHARACTER COUNTER (1-6)
CHI
CHARACTER COUNT 1
56
2
CH55
CHARACTER COUNT 55
56
2
58
2
CHARACTER UNBLANK
CHCT
CHARACTER COUNTER TRIGGER
56
3
C HOLD
CLEAR HOLD
56
3
CL
CLEAR
60
1
CNTI-CNTI0
PRINT TIMING COUNTS
70
2
COEOP
CENTER OR END OF PAGE
56
2
COG
CARRY OVER GATE
57
1
CR
CARRIAGE RETURN
57
1
CRCD
CARRIAGE RETURN CODE DETECT
58
1
CRDR
CARRIAGE RETURN IN DR
58
1
CRET
CARRIAGE RETURN OR END TEXT
58
1
CRLE
CARRIAGE RETURN OR LINE ERASE
57
1
CRRCV
CARRIAGE RETURN RECEIVED
59
1
CRSW
CARRIAGE RETURN SWITCH
57
1
C SYNC
CLEAR SYNC F.F.
COUNTER)
60
2
CTS
CLEAR TO SEND (FROM DATA SET)
CTS-D
CLEAR TO SEND DIRECT (TO PROCESSOR)
60
2
DATA
PRINTER OUTPUT
70
2
DIDF
DATA INSERT DISPLAY F.F.
57
2
DIKE
DATA INSERT OR KEYBOARD ENTRY
57
2
DISW
DATA INSERT SWITCH
(STARTING 1.0.
3-31
Table 3·1.
DESCRIPTlON
MNEMONIC
3-32
Glossary of Mnemonics (Cont/d)
DRAWING NO.
SHEET
DLMIN
DELAY LINE MEMORY lNTO DLR
DLRl-DLR7
DELAY LINE REGISTER
58
2
DLREN
DELAY LINE REGISTER ENABLE
57
1
DLRF
DELAY LINE REGISTER FORMAT BIT
58
2
DLRIN
DLR IN FF
58
2
DLRME
DELAY LINE REGISTER MARK EARLY
58
2
DLRMN
DELAY LINE REGISTER MARK NOW
DLRP
DELAY LINE REGISTER PARITY
58
2
DLS
DELAY LINE STRETCH F.F.
58
2
DPC
DISPLAY PARITY CHECK
58
1
DRl-DR7
DISPLAY REGISTER
58
2
DRF
DISPLAY REGISTER FORMAT
58
2
DRM
DISPLAY REGISTER MARK F.F.
58
2
DRPE
DISPLAY REGISTER PARITY ERROR
58
2
DRR
DISPLAY REGISTER RESET
58
2
DRT
DISPLAY REGISTER TRIGGER
58
1
DSR
DATA SET READY
DTB
DISPLAY-TO-BUFFER CONTROL
59
2
DTDLM
DISPLAY TO DELAY LINE MEMORY
58
1
DTR
DATA TERMINAL READY
60
2
EAR
ERASE AFTER RECEIVE
57
2
ELFl
ERASE LINE AND FLYBACK INHIBIT
57
1
EOL
END OF LINE
56
2
EOLF
END OF LINE F. F.
57
2
EOP
END OF PAGE
56
2
EOT
END OF TEXT
65
2
Table 3·1.
Glossary of Mnemonics (Cont'd)
MNEMONIC
DESCRIPTION
DRAWING NO.
SHEET
EP59
END OF PAGE, CHAR 59
56
3
ETX
END OF TEXT
65
1
ETXDR
END OF TEXT IN DISPLAY REGISTER
58
1
FBI
FORMAT BIT INSERT
67
2
FBMS
FORMAT BIT MARK STORE
67
3
FIG
FORMAT INSERT GATE
67
3
FMI
FLYBACK MARK INHIBIT
67
2
FMRF
FORMAT MARK REMEMBER F.F.
67
3
FOMI
FORMAT OR MARK INSERT
67
3
GC-N
GRAPHIC CHARACTER GATE
HOLD
STOPS BASIC TIMING
56
3
H SYNC
HORIZONTAL SYNC
56
2
IOBP
I/O BEGINNING OF PAGE
56
2
IFM
INHIBIT FORMAT
IOCNT 575
I/O COUNT 575
59.
2
IOCO-IOC9
r/o COUNTER
59
1
IOM3D
rOM 3 DELAYED
65
2
IOMCl- IOMC4
r/o MODE COUNTER
60
1
IOMO
WRITE MODE
IOMO-IOMI5
INPUT OUTPUT MODE (0-15)
60
1
IOMOCL
IOMO CLEAR
60
1
KBE
KEYBOARD ENTRY F.F.
57
2
KBEN
KEYBOARD ENABLE
57
1
KBEND
KEYBOARD ENTRY DELAYED'
57
2
KBP
KEYBOARD PARITY GENERATOR
58
1
KBS
KEYBOARD STROBE
58
2
3-33
Table 3·1.
Glossary of Mnemonics (Cont'd)
DESCRIPTION
MNEMONIC
SHEET
LCI-LC5
LINE COUNTER (1-5 )
56
2
LE
LINE ERASE
67
1
LEFF
3-34
DRAWING NO.
. LINE ERASE F.F.
LEG
LINE ERASE GATE
57
2
LESW
LINE ERASE SWITCH
57
1
LFCR
LINE FEED CARRIAGE RETURN
70
1
LOOP
CENTER OF PAGE LINE OR
END OF PAGE LINE
56
2
MAG
MARK ADVANCE GATE
57
1
MCL
MASTER CLEAR
MEL
MARK END OF LINE
57
1
MESS
MARK EARLY SET STROBE
57
2
MIG
MARK INHIBIT GATE
57
1
MK
MARK F. F.
57
1
MK CO NT
MARK CONTROL
57
1
MK/EOL
MARK/END OF LINE
70
1
MSG
MONOSCOPE SWEEP GATE
56
3
NIFTO
NULL INH IB IT TO FORMAT DATA
67
NONSEL
NON SELECTED
65
2
NULL
NULL CHARACTER DECODED
59
1
PCR
PRINT CARRIAGE RETURN
70
1
PLEOT
PRINT LOAD EOT
65
1
PLF
PRINT LINE FEED
70
1
PRT
PRINT MODE
70
1
PRXMT
PRINT/TRANSMIT
65
2
PSI-PS4
PRINT PULSE COUNTER
70
2
Table 3·1.
Glossary of Mnemonics (Cont'd)
DESCRIPTION
MNEMONIC
DRAWING NO.
SHEET
RAH
RECEIVE AFTER HOLD
67
1
RBNF
RECEIVE BUFFER NOT FULL
59
1
RCV
RECEIVE
60
1
RCV DATA
RECEIVE DATA
60
1
RCVR
RECEIVE START BIT FROM DATA SET
60
2
RCVT
RECEIVE (I/O MODE ENABLES
RECEIVE OF DATA)
60
1
RNC
REQUEST NEXT CHARACTER
70
2
RS
REQUEST TO SEND (TO DATA SET)
59
2
RS-D
REQUEST TO SEND DIRECT (FROM
PROCESSOR)
SAl
SET Al F. F.
1 FULL)
(INDICATES BUFFER
70
2
SA2
SET A2 F. F.
2 FULL)
(INDICATES BUFFER
SB16
SET B16 (81 REG BIT 6)
70
2
SBIT
SET BUFFER 1 TRIGGER F/F
70
1
SCNTI-SCNT4
PRINTER STROBE COUNTER
70
2
SCOR
STORE CHARACTER OR RECEIVE
57
1
SEMC
SCREEN ERASE OR MASTER CLEAR
57
1
SEMS
SCREEN ERASE MARK STORE
58
1
SETMN
SET MARK NOW
57
2
SFMC
SET FORMAT MODE CONTROL
59
1
SLSHR
SLOW SHIFT RECEIVE
59
2
SLSHX
SLOW SHIFT TRANSMIT
59
2
SLST
SLOW SHIFT START (PRINTER)
70
2
START
TIMING CONTROL F. F.
56
3
STX
START OF TEXT
60
2
3-35
Table 3·1.
Glossary of Mnemonics (Cont'd)
DESCRIPTION
MNEMONIC
3-36
DRAWING NO.
SHEET
56
3
59
2
SUB
START UP BIT
SYNC
SYNC. F. F.
TBA
TIMING CLOCK A
56
1
TBB
TIMING CLOCK B
56
1
T DATA
TRANSMITTED DATA
60
2
TIOMe
TRIGGER I/O MODE COUNTER
60
2
TRO-TR8
TRANSMIT/RECEIVE
60
2
TRIN
TRANSMIT/RECEIVE REGISTER INPUT
60
2
TRT
TRANSMIT/RECEIVE TRIGGER CONTROL
59
2
V SYNC
VERTICAL SYNC
56
2
WAIT
TIMING CONTROL F. F.
56
3
WFDE
WRITE MODE-FORMAT DATA ERASE
WRL
WRITE LAMP
60
1
WRSW
WRITE SWITCH
XBNF
TRANSMIT BUFFER NOT FULL
59
1
XMT, XMTF,
XMTR, XMTRC
TRANSMIT MODES
60
2
XMTSW
TRANSMIT SWITCH
60
2
ZIM
ZERO INDEX MARK
ZIM10
ZIM MODE 10
70
1
ZIM11
ZIM MODE 11
70
1
ZMD
ZERO MARK DELAY
67
3
ZMKS
ZERO MARK STORE F. F.
67
3
-
(IO COUNTER CONTROL)
REGISTER
r
\..
--.
L....+
'\
DELAY LINE
1
-
DELAY LINE REGISTER
DISPLAY REGISTER
A
~
j~
A
j~
KEYBOARD
Figure 3·l6. Data Insert Data Flow
70/7U-D810
3.S CHARACTER GENERATOR (Refer to Figure 3·17.)
The Character Generator's function is to convert the selected character digital
data into video for display on the Viewer screen. This is done by converting
the digital bits from the Display Register into equivalent analog deflection
voltages which are applied to the Monoscope tube (AlO) as gross deflection voltages to select the correctc:haracter on the Monoscope stencil (Figure 3-l8).
The Monoscope beam then scans the stencil cutout for the selected character and
generates a series of video pulses equivalent to the character which is then
applied to the Viewer CRT control grid. The Monoscope and the Viewer CRT Tickler
scan frequencies are synchronous so that the selected character appears on the
Viewer screen instantaneously as it is produced in the Monoscope tube.
3.5.1
SELECTION AMPLIFIER, AS
The Character Selection Amplifier card is located behind the Viewer front panel
with all circuit adjustments available to the operator on the adjustment panel
located at the left side of the Viewer panel (operator's right). The Selection
Amplifier circuit consists of two digital-to-analog (D/A) converters, (one for
X deflection bits and one for Y deflection bits,) a two channel deflection amplifier circuit and a horizontal sweep ramp generator. The function of the Selection Amplifier is to convert the selected character digital data bits (X and y)
from the Display Register into gross positioning deflection voltages which are
applied to the deflection plates of the Monoscope tube to select the correct
character cutout on the Monoscope stencil.
3-37
W
I
W
CD
CHARACTER
BITS
STORED
CHAaACTER
BITS FROM
DELAY LINE
REGISTER
.....
A3
DISPLAY
REGISTER
DR
YO
MONOSCOPE SWEEP GATE MSG
AS
SELECTION
AMPLIFIER
Yl
Y2
XO
...
Xl
ci'
S;
X2
CD
~
:""i
t""I
::r
~
Q
n
KEYBOARD
ENTRY
FROM
CONTROL
PANEL
.e::-+
....
FROM
L.V.P.S.
r+
-.
I
I
.
CD
:a
~
f=>7
VIDEO
A12
VIDEO DRIVER
PREAMP
~
AND HORIZ
SCAN
t
t
AIOA2
V. DIVIDER
I
FROM
MONOSCOPE
SWEEP LOGIC
I-VIDEO'"
:~
-YOKE
iii
...-.
:::!'.
FORMAT (BRIGHTNESS)
MARK
1.536 MHz
0
!'
QJ
1.536 MHz
FROM A5
TIMIN3
.....
All
TICKLER
·COIL
DRIVER
CJER
1. 536 MHz TICKLER
ii'
~
Q
A9
DEFLECTION
AMPLIFIERS
!I
FROM
A5
TIMlliI3
10/1~2· 080~
I
......
CRT
-
I
CD
Q
t:7
AIO
MONOSCOPE TUBE
PARITY
G')
--
VER.TICAL
~
I
CD
0'
n
GROSS
POSITION
VOLTAGE
PLUS
A20
DYNAMIC
FOCUS
1.6 m Sec VERTICAL
VERTICAL SWEEP
1. 2 KHz HORIZ
HORIZ SWEEP
r-
HORIZONTAL SELECTION CODE - b3 b2 bl
VERTICAL SELECTION CODE - b7 b~ b4
,
...
c;o
!
-.
Cool
!ID
g.
~
/
-I
~
~
" I-
""=-
~
Cit
=:
"
I
0
0
0
I
I
\,J
0
0
0
0
0
' , -••
-I- ,...
~
**
- .. + * )
h
""< ,
"" 1
"",
-"'"
/.
-r
'"'•
,
"'
" - ~rr'
""• ,'-
flo
lot
"
~
•
IV
Q
0
I
/
_Wl"
-• ~
• ~
'P'
H
•
1\
1..1 1'"'\
W
I
ID
(
0
0
I
0
I
0
""
xo
....,
1
~
-
- -~~
I
0
- ,
~ -I.
0
0
0
' , -r
~
- , **
.. + *
~
/
-I
•
~
'-'
h
....,
/1
-r
0
I-
~r
_.W l"
l
0
I
I
ML
r
l
•
1
0
" I"'-' i~
I
v.
1\
•
H
1..1
"
I I
b7 b5
b4
0
0
0
0
0
1
'"
Xo
• '"
""
""
~
WI
I I
I'
,
- "
;-'1
" "
ALTERNATE CHARACTER STENCIL
•
0
0
1\ :~1
1"""\
J I
I
'
:....I
\
~~
~
~
V I" I -I "'"" .
-/
--. I
I
"" -
~I~
•
""
"
, '" .....,
0
V
o b3
o b2
o bl
) (
1""• •
,"- -- ""
"f"
./
r'"
""0( """
I
1\
,'\.
0
0
•
""
'\.,
0
,."...
~
I I
v.
J
In
i~ M L
STANDARD CHARACTER STENCIL
W
•
:QJ
,
b4
0
'"
0
I
0
I I
0
I
0
1\
1\
...., '"
"
I
I
V~ V " I "
'-' 1 \ III
'\.,
I "V -I "'"' I / T
-
n b3
o b2
o bl
b7 b5
I
1
0
0
0
1
0
The gross positioning voltages position the Monoscope beam at the left side of
the stencil character cutout for the selected character. The beam then scans the
character cutout both horizontally and vertically to produce the equivalent series
of video pulses on the Monoscope plate or target.
Digital-TO-Analog converters (DACON, or D/A)
The X and Y channels of the Selection Amplifier D/A converters are similar,
therefore only the X or horizontal channel is explained in detail (Figure 3-19).
The input to the X channel of the D/A converter is a three-bit binary code from
the Display Register which represents the horizontal position of the selected
character on the Monoscope character stencil.
D/A Selection Switches
The binary coded bits determine how many of the seleqtion switches on the D/A
constant current ladder network will be turned off or on to subtract or add
current to the current summing bus (Figure 3-19).
The selected current on the
summing bus is applied to the input of integrated circuit Z02.
Note
The binary input permits selection of eight
discrete current levels that .can be injected
into the current summing bus which permits
horizontal gross positioning on the complete
Monoscope character stencil to select one of
64 characters.
Differential Operational Amplifier
The high-gain operational amplifier consists of Z02, 018, 19, 22, and 23
(Figure 3-19). The summed current injected into the input of differential amplifier Z02 is converted into a proportional voltage difference at the output of
Z02. The Z02 output is applied to a differential pair of transistors (018 and
019). The differential pair push-pull output is applied to a pair of emitter
followers (022 and 023) which apply the opposite phased deflection voltages to
the Monoscope horizontal deflection plates.
Operational Amplifier Feedback Circuits
The operational amplifier negative feedback circuit components are selected to
ensure that the voltage of the current summing bus remains at zero or ground
potential by draining away the exact amount of current injected at the circuit
input. This ensures that the voltage output of the differential amplifier will
always stabilize at a specific voltage level for a specific current input to give
accurate gross positioning voltages for the Mono'scope.
The secondary feedback circuit function is to maintain equal and opposite voltage
amplitudes at the operational amplifier output emitter followers 022 and 023.
The circuit consists of transistors 020 and 21 and resistors R98, R99, and R100.
3-40
CONSTANT
CURRENT
SOURCE
+25V
HORIZONTAL
DIFFERENTIAL
OPERAT ION AL
AMPLIFIER
SWEEP
G-ENERATOR
+75V
+75V
+50V
PRECISION
SELECTION
SWITCHES
R62
LADDER
NETWORK
R63
QI5
R61
CRI?
R91
CRIS
X2}-----+1
rl MONOSCOPETueE- - - --'1
-15V
1
+50V
R65
QI6
HORIZONTAL
DIGITAL
CODE BllS
R67
CR20
CRll
XI )---+-------~
FROM
DISPLAY
REGISTER
CIRCUIT
CR22
RIOO
1-4_"'\AI\-o~
R88
R69
CR23
R99
XO >--+---+1
R92
-15V
+50V
+25V
+25V
R75
I
FROM
"""""2.usec
CRI5
R83
JL
TO VERTICAL DEFLIECTION PLATES
70/752-0809
t
R76
+25 V' . .-1...- -....
~
-15V
+75V
SWEEP
RAMP
GENERATOR
MONOS COPE
SWEEP
GENERATOR
IN UNIT AI2
HORIZONTAL
DEFLECTION
PLATES
1
I
I
I
I
I
L
__________ J1
+50V
R70
UNIT AID
..------------~L+_l
+
t
-\5V
+25V
R93
BUS
-
1
SECONDARY
FEEDBACK
CURRENT
SUMMING
HORIZ
CENT
FIB
I
R97
+75V
_ 9, IV
Note
When a selection switch transistor is turned on
by a digital "1", the transistor subtracts the
current which its precision current source would
normally supply to the current summing bus. When
the D/A binary data bit is "0", the switch transistor is turned off (binary 000) and the maximum
current is injected into the summing bus. This
enables full conduction of transistor 019 of the
differential pair. Conversely, a binary 111 code
will enable full conduction of 018.
Skew Compensation Circuit
Both the horizontal and vertical channels of the Selection Amplifier have a
current pick-off potentiometer connected to the current summing bus to furnish
a small skew compensation current to the opposite channels Monoscope deflection
plates. This permits an electrical skew adjustment to compensate for any physical rotational misalignment between the Monoscope deflection plates and the
character stencil in both the horizontal and vertical plane by altering the deflection plates electrostatic fields.
The vertical D/A converter
horizontal channel, except
to generate the horizontal
selected stencil character
vertical sweep circuit for
and amplification channel function identically to the
that the horizontal channel has an additional circuit
sweep ramp needed to horizontally scan the individual
cutout, while the vertical channel has an additional
vertical tickler scan of the stencil.
Horizontal Sweep Circuit
The function of the horizontal sweep ramp circuit is to generate a ramp that can
be added to the horizontal gross positioning voltage which will cause the monoscope beam to horizontally scan the selected character on the monoscope stencil
while the vertical tickler frequency is causing the beam to also scan the stencil
vertically at the 1.5 MHz rate. The combined scans generate the character video
pulses on the Monoscope target or plate. The ramp generator circuit consists of
transistors 012, 13, and 14 and a linear charging circuit consisting of capacitor
C15, resistor R53 and associated components. During circuit operation, the two
microsecond MONOS COPE SWEEP GATE (MSG), which is generated on the Video Driver
(A12) is applied to the base of transistor Q12. The pulse causes transistor Q12
to conduct and dissipate the charge on capacitor C15. After the MSG pulse expires, capacitor C15 begins to charge at a linear rate. The resultant linear
ramp output is applied to the HORIZ SCAN potentiometer, R57. The wiper of R57
applies the horizontal sweep ramp to the current summing bus of Z02 where it is
added to the horizontal gross positioning voltage for the selected character.
This results in the generation of the horizontal scan for scanning the selected
character on the Monoscope character stencil. The horizontal scan duration is
10.4 microseconds, which gives a linear time base for the Vertical Tickler scan
of 1.5 MHz.
Vertical Sweep Generation Circuit (Refer to Figure 3-20.)
The output of the vertical channel of the Selection Amplifier differs from the
horizontal channel by the addition of a vertical sweep generator circuit. The
3-42
PRECISION
LADDER
NETWORK
+25V
SELECTION
SWITCHES
01
DIFFERENTIAL
OPERATIONAL
AMPLIFIER
CONSTANT
CURRENT
SOURCE
+SOV
VERTICAL
SWEEP
GENERATOR
+75V
+75V
R37
RI
.R2
CRI
R3
CR9
CR2
CRe
Y2
R4
[M.:0NOSCOPETUBE- IUNIT AIO
+25V
-15V
+25V
RS
...
IQ"
...
II:
CD
'="
~
?
+SOV
CR4
VERTICAL
DIGITAL
CODE BITS
FROM
DISPLAY
REGISTER
'1'1
-15V
...'<
•
SECONDARY
FEEDBACK
R34 CIRCUIT
-- +
'+
R31
R39
06
I
I
I
I
TI
VERTICAL
DEFLECTION
PLATES
I
•
I
I
RII
L ________ J
R41
9.IV
CD
RIO
CR6
RI2
03
YO
CR7
R40
t
RI3
ft
09
FIB
0"
-ISV
:I
R33
+75V
1"\
ill"
Q
:I
:I
CR3
!!..
FROM
UNITAl!
TICKLER
DRIVER
"::"
R49
VERTICAL SCAN INPUT (TICKLERI_
R23
RI8
RI5
[][]
R21
CENT
R20
-9.IV
§
GAIN
RI7
,
TO MONOSCOPE HOR I ZONTAL DEFLECTION PLATES
W
I
~
W
70/752-0808
"::"
I
I
I
I
I
CD
nQ"
I
I
+SOV
+25V
-..-'"
R6
CR5
R28
CURRENT
SUMMING
BUS
-1
RI9
[illD
SCAN
R44
"::"
circuit consists of a potentiometer, two transistors, and an output transformer,
T1, containing three windings.
Tickler Input
The 1.5 MHz Tickler frequency sine wave input is capacitively coupled to the
VERTICAL SCAN potentiometer R43. The potentiometer furnishes base drive to
transistor 010, which is connected to one end of the Tickler winding of transformer T1. The opposite end of the Tickler winding is connected to transistor
011. Adjustment of VERTICAL SCAN potentiometer R43 controls the amplitude of the
Tickler scan on the Monoscope character stencil.
The Tickler scan frequency is superimposed on the gross positioning voltage produced by the vertical Selection Amplifier (A8) and applied to the second T1
winding. The resultant voltage output is induced into the third T1 winding and
applied to the Monoscope vertical deflection plates.
Voltage Regulator Circuits (Refer to Dwg. 2165479 Sht. 2.)
Several prec~s~on voltage regulators required for proper operation of the horizontal and vertical Selection Amplifiers are located on unit AB.
Zener Regulated Voltages (Refer to Figure 3-21.)
The +5.6, -5.6, and -9.1 vdc power supplies are generated by zener diodes which
regulate a portion of a higher voltage supplied by the Low Voltage Power Supply
(L.V.P.S.), A14. The zener diodes (CR32, 31, and 34) are reverse-biased through
resistors R104, 103, and R110, respectively, to generate the +5.6, -5.6 and
-9.1 vdc supplies needed by the integrated circuits in the Selection Amplifiers.
+75V
-15V
+25V
....- - - . - 5 . 6 V
"'---"+5.6V
CR32
CR31
Rloa
-15V
Z03
025
1-1-----4.......... - 9.1 V
+75V
-15V
70/752-D823
Figure 3·21. Se'edion Amp'ifier Voltage Regulator, Simplified Schematic
3-44
-9.1 vdc Isolation Circuit (Refer to Figure 3-21.)
The -9.1 vdc supply has an additional isolation circuit consisting of transistors
024, 25, and 26. Transistors 024 and 26 form a differential pair and 025 is the
output stage, which also provides negative feedback to the differential pair.
The additional isolation circuit is required to ensure sufficient stability for
use as a reference in the +50 volt regulation circuit.
+50 Volt Regulation Circuit (Refer to Figure 3-21.)
The +50 volt precision-regulated power supply is used as a constant current source
for the ladder networks in both the horizontal and vertical selection amplifier
D!A converters. The +50 volts is also used in the horizontal sweep generator
circuit.
The +50 volt regulation circuit consists of differential amplifiers Z03, and
027 and 28, a Darlington emitter follower output stage, and a negative feedback
loop consisting of diodes CR33 and 35 and resistors R107 and 108.
The -9.1 vdc supply is used as an input reference level to differential amplifier
Z03. The output of Z03 drives a second differential amplifier consisting of
027 and 28. Transistor 028 drives the Darlington emitter follower (029 and 30)
which is connected to the +75 volts supplied by the LVPS. The regulated +50
volt output is taken off the emitter of Q30. Regulation is accomplished by
negative feedback through diodes CR23 and 35, and resistors R107 and 108. As
the external load varies, the negative feedback to the input of differential
amplifier Z03 causes the circuit to compensate for load variations and maintains
a constant +50 volt output, thus maintaining a constant current source for the
D!A converter ladder networks, regardless of the number of selection switches
being energized by the X and Y binary data bits from the Display Register.
3.5.2
MONOSCOPE ASSEMBLY, A10 (Refer to Figure 3-22.)
The Monoscope tube is aQ electrostatic deflection cathode-ray tube which contains an electron gun, a pair of horizontal deflection plates, a pair of vertical
deflection plates, a character stencil, an accelerator anode, and the target, or
plate, of the tube (Figure 3-22).
.
The gross positioning voltages from the horizontal and vertical Selection
Amplifiers are applied to the respective deflection plates in the Monoscope tube.
The selected character gross positioning voltages cause the electron beam to be
positioned on the character stencil at the left side of the selected character
cutout. The beam is then moved horizontally by the 11 microsecond horizontal
sweep ramp and is simultaneously scanned vertically by the 1.5 MHz Tickler frequency to cover the selected character stencil cutout.
The resultant variation in the voltage level of the plate or target electrode
of the Monoscope tube is the character video pulses which are applied through
the Video Preamplifier (A1DA) to the control grid of the Viewer CRT and generate
the character on the Viewer screen. In order to give a better character presentation on the Viewer screen, the phase of the 1.5 MHz Tickler frequency is
reversed 1800 on each alternate scan of the stencil to ensure complete coverage
of the selected character cutout (Figure 3-18.)
3-45
CHARACTER
STENCIL
CHARACTER BLANKING,
PARITY ERROR,
INDEX VIDEO, AND
BRIGHTNESS SIGNALS
NOTE: ALL INPUT SIGNALS
FROM LOG IC
1ST
SCAN
VIDEO
SIGNAL
AMPLIFICATION
1+--- VIDEO SIGNAL
2ND
SCAN
1.5MHz, HORIZONTAL,
ANO VERTICAL SYNC
SIGNALS
DEFLECT ION
AND SYNC
AMPLIFIERS
1ST TRACE VIDEO SIGNAL
nr-,n
n nn n
nnn
II
I I"
___ _ ..JLJ
II
:.....:~ .J~
II
II
II
II
I I
JLJL JL ..JLJ
II
L..JL _ _
2ND TRACE VIDEO SIGNAL
(PHASE SCAN SIGNAL REVERSED)
figure 3·22. Monoscope
Voltage Divider Network, A10A2 (Refer to Dwg. 2165479, Sheet 2.)
Voltage Divider (A10A2) divides down the -1.8 kv potential from the High Voltage
Power Supply (A13) for use on the control elements in the Monoscope CRT.
The following adjustment potentiometers are mounted on the voltage divider:
1.
INTENSITY (R1) controls Monoscope control grid XVl-2.
2.
FOCUS (R4) controls Monoscope focus grid XVl-5.
Video Preamplifier, A10AI (Refer to Dwg. 2165479 Sht. 2.)
The function of the Video Amplifier is to amplify the video microvolt pulses from
the Monoscope signal plate (or target) to a millivolt level for application to
the Video Driver (A12) located in the display circuits section of the VOT. The
circuit consists of a series of four high-frequency capacitive coupled amplification stages (01 through 04), and an output emitter follower driver stage.
There are no gain adjustments on the Video Preamplifier.
3.6 VIDEO DISPLAY CIRCUITS SECTION (Refer to Figure 3-23.)
The display circuits section consists of a Video Driver (A12), a Deflection Amplifier (A9), a Tickler Coil Driver (All), and a Dynamic Focus Network (A20). These
units provide the video, deflection, tickler scan, and dynamic focus correction
for the Viewer cathode-ray tube. A block diagram of the Video Section is shown
in Figure 3-23.
3-46
MONOSCOPE SWEEP GATE TO SELECTION AMP A8
VIDEO FROM PREAMP AIOAI
Al2
VIDEO
DRIVER
PARITY BIT FROM DR
FORMAT BIT FROM DR
INDEX
J
VIDEO
MARK FROM LOGIC
-...~
-'-"
~r
n
tFl
__
YOKE
LI
.
'\
VIEWER'
CRT
VI
--
-",- ..
I
I
~
All
TICKLER
COIL
DRIVER
TICKLER FROM LOGIC
I•
A20
DYNAMIC
FOCUS
1. 2 KHz (HORIZ)
FROM
A5
TIMING
16.7 m Sec (VERT)
A9
DEFLECTION
AMPLIFIER
~
TICKLER SCAN
FOCUS CORRECTION
VERT ICAL SWEEP
HORIZONTAL SWEEP
A14
LOW
VOLTAGE
POWER
SUPPLY
+75 VDC
+25 VDC
+4.5VDC
-15 VDC
Al3
HIGH
VOLTAGE
POWER
SUPPLY
+12 KV
+2 KV
-1.8 KV
+400 KV
6.3 VDC
70/752-0806
Figure 3·23. Video Circuits, Bloclc Diagram
3.6.1
VIDEO DRIVER, A12 (Refer to Dwg. 2165479, Sheet 2.)
The function of the Video Driver (Figure 3-24) is to amplify the video from the
Video Preamplifier (AIDAI) and apply it to the Viewer CRT control grid (XVI-2).
Additional circuit inputs from the resistor logic (A3) control brightness and
parity error. A mark video input, from the Tickler Coil Driver (All) supplies
the mark video.
A separate circuit provides amplification of the MONOSCOPE SWEEP GATE (MSG) from
the Timing Logic (A5) for use in the Video Driver (AI2) and also the Selection
Amplifier (AS). The zener power supply furnished a +55 volt reference for use
on the.CRT brightness and focus controls.
Character Video Input
The selected character video from the Video Preamplifier (AIDAI) is applied to
a differential amplifier (QI and Q2) and capacitively coupled from emitter
follower Q3 to drive a second differential amplifier (Q5 and Qa). The input to
the second differential amplifier is quantized by clamps CR2 and CR3.
Character Unblank
The CHARACTER UNBLANK signal from the register logic is applied through transistors Q4 and Q6 to control the collector of Qa. During character blanking, emmitter follower Q6 conducts and inhibits the video output of Qa. When the characters are not blanked (character unblank mode), the amplified video is applied
through forward biased diode CR5 to emitter follower 011 and to a second transistor NOR configuration (Q9 and QID).
3-47
+E
013
+E
(TO MONOSCOPE
SELECTION
....- - - - - -.... AMPLIFIER)
MONOS COPE
SWEEP GATE
+E
MONOSCOPE
SWEEP GATE
FROM TIMING
LOGIC
CRIO
BRIGHTNESS
FROM REGISTER ...-----------I-_~
+E
LOGIC)
TO CRT
BRIGHTNESS
AND FOCUS
CONTROLS
01
FROM
MONOSCOPE
VIDEO
PRE-AMPLIFIER
FORMAT
...JU'V'....-ta-E
+E
BRIGHTNESS
ADJUST
+E
+E
+E
TO CRT
SIGNAL GRID
- E _..J\0
•
Table 3-2.
MNEMONIC
Input/Output Mnemonics
DEFINITION
FUNCTION
IOM
INPUT OUTPUT MODE COUNTER
CONTROLS SEQUENCE OF TRANSMIT
AND RECEIVE MODES
TIOMC
TRIGGER IO MODE COUNTER
SEE 60A8C-2
ADVANCES THE 10M COUNTER
STX
START OF TEXT
SHIFTS INTO TR REGISTER TO START
XMIT OR RECEIVE.
TRT
TR TRIGGER CONTROL
AT(OP)
TR REGISTER CONTENT
INDICATOR F/F
XMTF(P)
TRANSMIT MODES
XMT
TRANSMIT
IOBP
I/O BEGINNING OF PAGE
EOP
END OF PAGE
ADVANCES IOM COUNTER TO IOM9
ZIM
ZERO INDEX MARK
PLACES INDEX MARK AT START OF
FIRST LINE AND ERASES ANY OTHER
INDEX MARKS ON PAGE.
BI
BI BUFFER REGISTER
B2
B2 BUFFER REGISTER
TR
TRANSMIT REGISTER
ETX
END OF TEXT
WHEN DETECTED, GENERATES TIOMC
TO ADVANCE 10M COUNTER
IOMC575
IOM COUNT 575
PRODUCES TIOMC TO ADVANCE 10M
TO IOMII AND IOM12
RCVDATA
RECE IVE DATA
SIGNAL FROM DATA SET ENABLED
BY IOM12
AI(OP)
Al FLIP FLOP OUTPUT
INDICATES BI REGISTER IS EMPTY
A2(OP)
A2 FLIP FLOP OUTPUT
INDICATES B2 REGISTER IS EMPTY
EAR
ERASE-AFTER-RECElVE
CLEARS DELAY LINE REGISTER,
ADVANCES IOM COUNTER TO ODD,
AND TRANSFERS VDT TO WRITE MODE.
3-60
INDICATES TR REGISTER IS EMPTY
Table 3.2.
MNEMONIC
Input/Output Mnemonics (Cont'd)
DEFINITION
FUNCTION
SYNC
SYNC SIGNAL
CLEARS IOM COUNTER
TRO
TR REGISTER OUTPUT ZERO
MAINTAINS STOP SIGNAL AT DATA
SET INPUT
CTS
CLEAR TO SEND (FROM
DATA SET)
CLEARS TRO, ENABLES IO COUNTER
TO GENERATE SLOW SHIFT PULSES
SLSHX
SLSHX
SLOW SHIFT XMIT PULSES
SLSHR
SLOW SHIFT RECEIVE PULSES
OCCUR IN MIDDLE OF BIT TIMES TO
SAMPLE AND SHIFT RECEIVED DATA
INTO TR REGISTER
DLRME
LAST STAGE OF DELAY
LINE REGISTER
(MARK EARLY F/F)
ENABLED BY DTB SIGNAL TO ENTER
DATA INTO B1 BUFFER REGISTER
DTB
DISPLAY-TO-BUFFER F/F
ENABLED BY DTB SIGNAL TO ENTER
DATA INTO B1 BUFFER REGISTER
BP1B
BIT PULSE 1B
BASIC TIMING PULSE 1B USED TO
RESET DTB F/F
XBNF
XMIT BUFFER NOT FULL
ENABLES DTB TO SHIFT IN DATA
ADV
ADVANCE
ADVANCES INDEX MARK ONE
CHARACTER
ASK
ADVANCE OR STROBE
KEYBOARD
KBS
KEYBOARD STROBE
GENERATED DURING KEYBOARD ENTRY
OF DISPLAYED CHARACTERS, ADVANCES
MARK ONE CHARACTER
MAG
MARK ADVANCE GATE
GENERATES ASK LEVEL TO RESET
DLRME F/F AND SET DLRMN TO
ADVANCE INDEX MARK ONE CHARACTER
DLRMN
FIRST STAGE OF DELAY
LINE (MARK NOW F/F)
SET DURING MARK ADVANCE OPERATION
TO ADVANCE MARK ONE CHARACTER
B1T
B1 TRIGGER F/F
CONTROLS SHIFT PULSES TO B1
BUFFER REGISTER
B2T
B2 TRIGGER F/F
CONTROLS SHIFT PULSES TO B2
BUFFER REGISTER
USED TO SHIFT I/O REGISTERS AT
1200 BAUD DATA SET RATE DURING
<
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--BT9A • E O T - - - - - - -
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11
8
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10
1
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13
14
STX • P R T - - - TR
OTD-H2 - oL
81
eR 8TS-CRRCV
02 I SO-sFMC. cA2
l SI-cFMC. cA2
8T9A • (HX + EOT. PRT) TR - - 81 {'SO
81 02 SI
OTo - - B2-0L
-OT9A • BTn. AT·
ERASE
I2--
15
-----------EOP
•
PRT-----WRITE
-Bl9A • IOCNT575 • PRlRS
cAT
7
TO
16
0"'
~
t
d,:
.1
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....
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u
~
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-8T9A. IOCNT575 • PRT-
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II
ZM
ri
12
i:';
13
14
~-*-
~8T9A'
EDT. PRT---
.{lEOT-TR
sAT
RS
TR--TO
-8T9A • I OCNT575 • PRT RS
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><
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- BT9A • E O T - - - - - I
RO-TR
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t
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cAT
PRINT ·OT9A. CNT5
L-OT9A ·IOCNT575 ·PRT
---'cPRT=IWIL'PRTSW
WQITE
7"/75,' 0845· Z
ligure 3-30. 10M Sequencing lor Station Selector And With Printer Adapter
3-66
::T
8T9A • IOCNT575
BT9A' OTB· ETXoR .K...-IE"'---==7:-::":':"'==";':';~---1
RO-TR
....
-BT9A'
Ro _
TR - 81 _
RS
TR~TO
sAT
6
8
><
12
-BT9i1 • EOT _ _ _ _ _ 1
rEDT~TR
-BT9A· EDT· PRT--fEOT-TR
RS
sAT
TR-TO
RS
8T9A • IOCNT575----RO - - TR
k"-';-
......
RNC-cAI
oTB-OLR-RI
BI-PRINTER
11
-
\-8T9A' EDT
.106P • PRT -=-=---lL-,.-_ _--='--=:..;B;,,;.T.:,9A~'~1.:.OC;,;,N;.;,T.:,57;.,;5:..-.;.,;PR,;, :T__ 1
sAI
Ro-TR
81 - B2
RS
82 ' - TR
TR -TO
8T9A • OT8 • ETXDR • PRTZM
RS
81--82
TR-TO
82-TR
~,
-8T9A • Ai • Ai • AT ___ XMIT
ZM
5
><
RS
--lOOP' XMTS •• PRT ..............:
ZM
RS
cA2
TR-TD
...
;-i-
PiiT-------
EOP •
STX -TR
sAT
7
:E
sAT
~ -1-
BT9A • EDT
~
....
F.OT - - - RS
TR~ TO
~ex:EOT~TR
S2
6
~
BT9A· EOT-_ _ __
RO-TK
-rl- I~BT9A'
TO
sAT
_
--BT9A. E O T - - - - - -
I
-
:i
-BT9A • 10CNT 5 7 5 - - RS
II 3
:!T
cAT
,
WRITE WRITr:
l_BT9.\ . 10CNT 575
I I
'==-BT9A • EiiT -::":~----XMI T PRINT ·IOBP· PRT--...1........,.,..----.=;;;;,;R:..;O.:._:.;..."T,.,:,R,:;.;;.:.;,,;,.,;:;,,;,.:.---1
.L.
RO-TR
BT7A·XMTSW·
ZM
..E...4.1 TO"O"
'ETXoR
A TO "0"
....L-
~
I
I2
I
RD-TR - - - - - -
TT
>
rl ~ T' ~::.~:'",----l
r
:t
~
1- 0
sA2
• -BT9A • E O T - - - - - - -
'"
~
~TXOR--'.A.."-s-P-R-T--
IOM7
During IOM7, the STX character is shifted into the TR (Transmit/Receiv~ register).
The STX character is formed by combining BT3A and BT9A in gate 60B5D-2 to produce
the character code 10000010. This signal is enabled by IOM7 and is shifted into
the TR by TBB which is enabled by TRT (TRIGGER TR REGISTER). The TRT signal is
produced by the TRT flip-flop when it is set by AT-OP (TR REGISTER EMPTY) and
XMTF-P. This occurs at BT2A of character 59. The next BT3A places a "1" into
the TR Register. Since TRT and TBB are shifting the TR Register, BT9A will put
the eighth bit into the TR Register. At BT10A the TRT flip-flop is reset and will
be inhibited from being set again by the setting of the AT flip-flop.
The AT
flip-flop is set at BT3A of the 60th character. The IOM7 period is terminated
after the XMT switch is released and the IOBP (10 BEGINNING OF PAGE) pulse occurs.
10MB
10MB allows the STX character to be transmitted·to the data set and the zero index
mark function (ZIM) in the register logic is enabled for one page time. The EOP
pulse advances the 10M counter to IOM9.
IOM9
IOM9 is the basic Transmit mode. Characters are transferred from the Delay Line
Register under control of the mark to the B1 and B2 Buffer Registers and to the
TR Register. The characters are then transferred to the data set under control
of the 10 timing which will be discussed later. Transferring the ETX character
to B1 generates the TIOMC signal to advance the 10M Counter.
IOM10
IOM10 enables the ZIM operation again and the remaining characters in the B1, B2,
and TR Registers are transmitted. When the registers are empty, indicated by
A1-0P, A2-0P, and AT-OP, gate 60CBA-2 will generate the TIOMC signal to advance
the 10M Counter at IOCNT575.
IOMll
IOM11 maintains the REQUEST-TO-SEND (RS) level. ZIM is also enabled to ensure that
the ZIM operation lasts at least one page time. This is accomplished by allowing
the 10 Counter to count for an additional 640 counts (one I/O character time).
At count 575, gate 60C7B-2 produces the TIOMC signal and advances the 10M Counter
to IOM12.
IOM12
The IOM12 mode enables the RCVDATA signal to be generated from the data bit pulses
from the data set. The IOM12 mode lasts until the STX character is detected in
the TR Register by gate 60B6C-2, generating the IOMC signal and advancing the
counter to count IOM13.
3-67
IOM13
IOM13 is the basic Receive mode. The data is still enabled by RCVT-P and is
shifted under control of IO timing into the TR, to the B1, to the B2 Registers,
and to the delay line under control of the mark logic. When the ETX character
is detected inthe TR Register, the TIOMC signal is again generated to advance
the counter to IOM14.
IOM14
This period allows the characters contained in registers TR, B1, and B2 to be
shifted into the Delay Line Memory. When the A1-0P and A2-0P signals occur,
indicating that the buffer registers are empty, the TIOMC signal advances the
10M Counter.
IOM15
The IOM15 period enables the erase operation to erase the remainder of the page.
This is accomplished by generating the EAR (ERASE AFTER RECEIVE) signal. This
signal will hold the Delay Line Register cleared until the EOP pulse advances
the IOM Counter to count.OOOO. This will transfer operations back to the write
mode and enable the operator to compose another message.
3.7.2
INPUT/OUTPUT TIMING CONTROL
The I/O timing is a function of the basic Video Data Terminal timing.
(Refer to
logic diagram 2144559.) Each transmitted or received character consists of 10
bits; 1 start bit, 7 data bits, 1 parity bit, and 1 stop bit. The transmission
and reception rate is 1200 bits per second, or 833 microseconds per input/output
bit. This period is regulated by the 10 Counter consisting of flip-flops lOCO
through IOC9.
Flip-flops lOCO through IOC5 count from 76,8 KHz (triggered by
BT1A) and repeat every 833 microseconds. Flip-flops IOC6 through IOC9 count the
number of input/output bit times until the counter is cleared by the SYNC signal.
A timing diagram of the counting states of the IO Counter is shown in Figure 3-31.
The SYNC flip-flop (59A7B-2) controls the IO Counter operation. When the SYNC
flip-flop is set, the 10 Counter is cleared and triggering is inhibited by gate
59A8A-1.
Initially TRO (60D4A-2) is in the set state maintaining the STOP level to the
data set. When a character is ready to be transmitted, gate 60B3A-2 clears TRO
to initiate the START bit. This requires that the CTS (CLEAR TO SEND) signal
from the data set is high, that there is a character in the TR Register (AT-1P),
and that transmission of the previous character, if any, has been completed
(SYNC-1P). Clearing TRO permits gate 59B6C-2 to clear the SYNC flip-flop and to
enable the IO Counter. The IO Counter generates the SLOW-SHIFT PULSES (SLSHX)
from gate 59C7C-2 to shift successive bits of the character into TRO. The SLSHX
pulses also shift "l's" into TR (60A6A-2) so that the ninth shift pulse shifts
the STOP bit into TRO.
IOCNT640(59B7A-2) sets the SYNC flip-flop after the tenth
bit.
A SLOW SHIFT PULSE is generated every 833 microseconds as shown in Figure 3-31.
When transmitting, SLSHX pulses occur at the end of each I/O bit time as they
supply successive bits to the data set. When receiving, SLSHR pulses occur in
the middle of each bit time to sample the received data and shift successive bits
into the TR Register. The first character shifted out of the TR Register is the
3-68
14
,
ONE DATA SET BIT TIME
.'
I
16
32
48
64
16
1111111111111111111111111111111111 III 111I1I 1111II11111 1111I1 1I111111III1 II II III I II I
BTIAs
I
roco
roci
rOC2
roC3 _ _ _ _.....
L.-
rOC4 _______________
rOC5
~
~
----------------------_
__________
-r------------~
__________-1r--
.....
rOC6 ___________________________________
~
__________________________________
~
I
I
I
I
*
- - - - - - - -
I
SLSHR
-
1
--
-------SLSHX
-
-- -
rOC4
IOC5
L---~----~
IOC6
_____ r - - - - ' _____s__t--,L--
roc?
~--------~--~~
I
I
I
roC8
IOC9
-----------------------------------------------T--------r--,:L--
,
I
32
SLSHR
96
I
64
START
I
I
PARITY
640
6~8:
576
,
BIT 7
I
I
512
,
BIT 6
544
I
448
,
BIT 5
480
I
384
I
BIT 4
416
I
320
I
BIT 3
352
1
256
,
BIT 2
288
,
192
I
BIT I
224
,
128
I
SLSHX
160
:
STOP:
~*--------------------------------------------------------------------~/-OR~'
DATA SYNcl
NOTE: TIMING SCALE CHANGES AT HEAVY DOTTED LINE
70/752- 0822
Rev
XMT
STX character. The output of DLRME, the last stage of the Delay Line Register,
is enabled through gate 59D3B-2 by the DTB (DrSPLAY TO BUFFER) signal and applied
to the B1 Buffer Register. The CTB signal is produced by setting the DTB fl~p-f]Op
when any output register is empty during rOM9 .and the mark occurs. This will
allow the code for one character to be transferred to the B1 Register.
rf the
B2 or TR Registers are still empty, the DTB flip-flop, although reset by BPlB,
may be set again until two more characters have been shifted to the B1 Register,
placing the first character transferred in the TR Register. At this time the
XBNF (XMT BUFFER NOT FULL) signal will not be present and the DTB flip-flop will
remain reset.
Three character codes are now contained in the buffer registers. These three
characters were selected by the mark, previously placed in the first character,
first line position by the zero index mark operation. The DTB signal is maintained
for one half bit time after each character is shifted out of the DLR.
rt will
perform the same function as the ADV (ADVANCE) or KBS (KEYBOARD STROBE) signals
and will advance the mark one character. The mark is sensed in DLR1 by gate
57C4B-1 which sets the MK (MARK) flip-flop during the. DTB signal. The MK flipflop and MAG (mark advance gate) generate the ASK level (57B7e-2) which will reset the DLRME flip-flop and will set the DLRMN flip-flop moving the mark to the
next character position. This sequence of operations is repeated each time a
character code is shifted into the buffer registers.
3.7.3
INPUT/OUTPUT BUFFER CONTROL
The Buffer Registers B1, B2 and TR (refer to logic diagrams 2144559 and 2144560)
are monitored by the A1, A2 and AT flip-flops, respectively. These flip-flops
indicate whether the registers are full (contain a character) or empty. During
the XMT operations if B1 and B2 Registers are full and the TR Register is empty,
the B1T and B2T flip-flops will be set to allow the registers to be shifted. The
TRT flip-flop will also be set to allow the TR Register to be shifted to accept
the character from the B2 Register.
The logic is formed so that when a register
is empty, the previous registers are shifted. For example, if B2 is empty and
TR is full, only registers B1 and B2 will be shifted: if only B1 is empty, the
A2-1P and AT-1P signals will inhibit setting the B2T and TRT flip-flops so that
the B2 and TR Registers will not be shifted.
The above operations will continue until the WRrTE switch is pressed or until
the ETX character is transferred to B1. At the time the ETX character is transferred, the rOM Counter is advanced to rOM10 and the remaining characters in the
B1, B2, and TR Registers are transmitted. When rOM9 is completed, the DTB flipflop may not be set: this prevents further transfers from the Dealy Line Register.
When all buffer registers are empty, the rOM Counter will be advanced to rOM11.
The rOM11 period allows the mark to be reset to the beginning of the page and
maintains the REQUEST TO SEND (RS) level to the data set to ensure transmission
of the last character. At the end of this period the rOM Counter is advanced to
rOM12 to enable the Rec~ive mode. The RCVT signal, generated by rOM12 and rOM13,
enables the received data to be sensed at the input of the TR Register and enables
the SLSHR pulses to shift the data into the TR Register. When the STX character
is detected in the TR Register, the rOM Counter is advanced to rOM13, which is
the basic Receive mode.
3-70
Basic Receive Mode
The IOM13 level enables the RCV level so that BTD (BUFFER TO DISPLAY) f~ip-flop
may be set. Since the RCV-P signal is not generated in IOM12 by gate 60B7D-1
enabling the BTD flip-flop to be set, the STX character is not shifted to the
Delay Line Memory. The BTD signal enables the B1T and RBNF (Receive mode and
Al or A2 buffers not full) signals. Therefore, while a character is being presented to the input of TR Register (RCVDATA to TRIN) the SLSHR-N pulses from the
IO counter will set the TRT flip-flop. The TRT flip-flop is reset between each
character time by BrlOA. The TR Register is full when the AT flip-flop is set
by IOCNT575 and BT9A. The character is then shifted out of the TR Register by
TRT and TBB (fast shift pulses) to the Bl Register as the Bl1N (BUFFER 1 INPUT)
signal. When the character is in the B1 buffer, the B1T flip-flop is set. Since
the B2 buffer is not full, the absence of the B2T level enables the character
to be shifted to the B2 buffer and the B2T flip-flop is set.
Shift Pulse Control
The content of B1 is shifted by the leading edge of TBB when the B1 TRIGGER CONTROL (B1T) is set. B1T is set by BT2A in any XMTR mode if B1 or B2 or TR is
empty (XBNF-XMT Buffer Not Full). During RCV, B1T is set if B1 or B2 is empty or
if the character in B2 is being transferred to the Delay Line (RBNF-RCV Buffer
Not Full). B1T is always cleared by BTlOA. This applies B shift pulses to B1
during every character time unless B1 contains a character which cannot be transferred to B2.
The content of B2 is shifted by TBB when B2T is set. B2T is always cleared by
BT10A and is set by BT2A if B2 is empty or if the BUFFER-TO-DISPLAY transfer (BTD)
is initiated or, in XMTR modes, if TR is empty. This applies B shift pulses per
character time unless B2 contains a character which cannot be transferred to the
display or to TR.
The content of TR is shifted by TBB when TRT is set. TRT is always cleared by
BT10A, and in any XMTF mode, is set by BT2A if TR is empty. This enables the
fast shift of B pulses per character time. When a character has been transferred
into TR, the slow shift output control is enabled as described in paragraph 3.7.2.
Each SLSHX pulse shifts TR1 into TRO, forces a "1" on the input of TRB (TRIN),
and sets TRT. Since SLSHX occurs at BT9A, only one shift pulse occurs each time
TRT is set. At the ninth SLSHX (IOCNT575), the STOP bit is in TRO and TR is, by
definition, empty. The next BT2A will set TRT and, if B2 is full, TR will be
refilled immediately.
In any RCVT mode, the slow shift input is enabled by receipt of a START bit (the
first zero bit of a character). Each SLSHR pulse sets TRT to shift successive
data bits from the processor into TR. At the ninth SLSHR (IOCNT543), TR contains
the complete B-bit character and IOCNT 575 sets the TR Full indicator (AT). If
B1 or B2 are empty, BT2A will set TRT to transfer TR to B1 and BTBB will clear AT.
Data Transfer
The DISPLAY-TO-BUFFER control (DTB) is set at BT2A in IOM9 if the buffer is not
full (XBNF) and if the DLR contains the character with the mark. (Note that the
mark is in flip-flop DLRF at BT2A. DTB gates the DLR output (ME) into B1 and
also activates the mark advance. DTB is cleared by BT1B. Since the mark is advanced each time, DTB will be set again to transfer successive characters until
the buffer is full. The BUFFER-TO-DISPLAY control (BTD) is set at BT1B in rOM13
3-71
or IOM14 if B2 is full and if the DLR contains the mark. BTD causes the character
from B2 instead of the DLR to. be stored in the Delay Line Memory. BTD also activates the mark advance so that all characters in the buffer can be stored. Recognition of a Return character in B2 (CRRCV) modifies the mark advance.
Buffer Control
The status of B1 (full or empty) is indicated by flip-flop A!.
Initially, A1 is
cleared by IOMO. A1 is set when buffer B1 is filled and cleared when B1 is
emptied. During XMTR, when a character is being transferred from the DLR to B1
(DTB) , BT7A sets A1. When the character in B1 is transferred to B2, BT7A clears
A1 unless another character is being transferred during the same character time
from DLR to B1 (B1T and not DTB). Since NULL characters are not to be transmitted
to the processor, A1 is cleared by BT10A when a NULL is recognized in B1.In
RCV, BT7A sets A1 when a received character is being transferred from TR to B1
(B1T and not AT).
B2 status is indicated by A2.
Initially, A2 is set by IOMO. This simulates 82
full to enable shifting the STX code into TR during IOM7. A2 is cleared at the
end of IOM7 (CA2) to prepare for normal operation. BT5A sets A2 if B1 is full
(A1) and clears A2 if B1 is empty and the character in B2 is being transferred
to TR or to the display (B2T and not A1). Since so (Format On) and SI (Format Off)
codes are used.with the FOrmat feature for control only, and are not to be stored
in the delay line, A2 is cleared by the control signal (SFMC or CFMC) generated
at BT10A when either code is recognized in B2.
TR status is indicated at AT. AT is cleared initially during IOMO. During XMTF,
BT3A sets AT if B2 is full (A2). BT4A clears AT after the last bit of the character has been transmitted (IOCNT575). During RCV, BT9A sets AT after the complete character has been received (IOCNT575). BT8B clears AT when the character
is transferred to B1 (B1T).
3.8 SPECIAL FEATURES
The following paragraphs describe Special Features available for installation in
the 70/752 VDT. All of the Special Features are compatible with three exceptions.
When the Data Format Special Feature is installed, the Standard Data Insert
Feature is removed due to changes in the logic. When the Local Operation Feature
is installed, the Station Select Feature cannot be installed. When the Flexible
Array Special Feature is installed, the Printer Adapter cannot be installed.
3.8.1
STATION SELECT, SF 5707
The Station Select Special Feature (logic diagram 2144665) enables reception of
a message from the Central Processor only when the correct Station Identifier is
sent to the Video Data Terminal to receive it. This process is used when a
number of Video Data Terminals are to communicate with the Central Processor via
a common line.
When there is no message to transmit, the Video Data Terminal is in the Write mode
or IOMO (Figure 3-30), the RCVT level is enabled, and the AT flip-flop is cleared.
The receive sequence consists of an EOT character and the Station Identifier.
The receipt of the EOT character advances the 10 mode counter to IOM1.
If the
next character is not the correct Station Identifier the 10 Mode COunter is reset
to IOMO.
If the character following EOT is the correct identifie4 the IO Mode
3-72
Counter is advanced to IOM2. During IOM2, the EaT character code is shifted into
the TR Register and transmitted to the Processor. When transmission of the EaT
character is complete, the IO Mode Counter is advanced to IOM3. The rOM3 mode
maintains the RS level to the Data Set for an additional 8 milliseconds and then
resets the IO Mode Counter to laMa.
When there is a message ready for transmission and the XMT switch has been pressed,
the IO Mode Counter is advanced to IOM4. When the EaT character is received from
the Processor laMS is enabled. The laMS mode is used to detect the correct
Station Identifier and advance the IO Mode Counter to IOM6.
If the letter received is not the correct Station Identifier, the IO Mode Counter is returned to
IOM4. The modes IOM6 through IOM15 are the same as those of the basic Video Data
Terminal.
3.8.2
PRINfER ADAPTER, SF 5711
All basic operations are the same as in the basic or Station Selector Special
Feature equipped models.
(Refer to logic diagram 2144570.)
The Printer uses IOMC3 and IOMC4 as a two-bit counter to generate the four modes
necessary for its operation. When the Print flip-flop (PRT) is set, the IOMC3
trigger (TRIOMC3) is isolated from IOMC3ADV and is controlled only by the Printer
logic. With the Station Select Feature, IOMCI and IOMC2 are used as an independent two-bit counter (if PRT is set) for the automatic recognition and response
function as described for IOMO through IOM3.
laM Advance control is inactive when PRT is set except for the gates used in
automatic operation of the Station Select Feature.
The data interface with the Printer is through the B1 buffer register. Characters
are transferred to the B1 buffer from the DLR under DTB control upon request of the
Printer logic. The Printer Carriage Return (PCR) and Line Feed (PLF) character
codes are shifted into the B1 buffer as controlled by the Printer logic. The
82 buffer register is not used in the Print mode. The TR Register is used only
for the automatic functions of the Station Selector Feature. The transfer of
data within the unit is essentially the same as in the basic unit: IOM9A is activated by PRT and IaMB: and XBNF (TRANSMIT BUFFERS NOT FULL) depends only upon the
status ofB1. Buffer Control flip-flop Al is set by the Printer logic (SAl) to
permit PCR and PLF to be generated before any display characters are printed. Al
is cleared by RNC to request the next display character, and set again by DTB.
Buffer control flip-flop A2 is set by PRT, indicating that B2 is always full (for
the benefit of XBNF). Since AT must be used by the Station Select function, the
AT input to XBNF (ATA) is held high by PRT.
NULL recognition in B1 is used by PRT to set 816 (space code) instead of clearing
Al so that the printed copy will be the same as the display.•
When the Printer Feature is not used, the Printer logic is replaced by jumpers to
interconnect the necessary lines (such as IOM9 to IOM9A and +4.5v to RNC).
3.8.3
DATA FORMAT, SF 5710
Each character stored in the DLM includes as one of its bits a format bit. This
identifies the character as a format character when the bit is logical "I" or set,
and as a variable character when the bit is cleared, "0".
3-73
R8
When the Format option is installed, control of format is accomplished by the
computer (logic diagram 2144567). As a message is received, Format ON/OFF is
decoded in the 10 logic and the results forwarded to the mark and control logic.
When the received message contains a format, the Format Mode Control flip-flop
(FMCFF) is set. It is used to enable received data format bit sensing logic;
Format Bit Insert gate (FBI).
FMRF is used when a Control Panel command (advance, for example) was attempted,
generating MESS. If MESS occurred with a format bit present in the character,
DLRF inhibits setting the mark now flip-flop, Signal SETMN. When MESS is generated in the presence of a format character, FMRF is set, enabling the format ',insert gate FIG. BT108-P is ANDed with the FMRF and the format bit DLRF-1N which
tells us when a non-format character is in the DLR. Also present is flyback inhibit FMI to prevent mark entry during the flyback time. Thus, the new mark will
be written in the first character position after a format character when an
ADVANCE is received.
3.8.4 LOCAL OPERATION AND KEYBOARD EXTENSION
The addition of the Logal Operation and Keyboard Extension Special Feature produces no change in logic operations. When the Local Dperation feature is installed, the Station Selector Feature may not be incorporated.
3.8.5 FLEXIBLE CHARACTER ARRAY, SF 5734·01
The function of the Flexible Character Array Feature is t:o permit the display
format to be changed from the standard array of 20 lines each having 54 characters
to the desired array. This is done by installation of jumpers on the alternate
A5 Timing Board. Table 3-3 lists the jumpers necessary for connectors P1 and P2
to obtain the various alternate array formats.
Figure 3-32 shows a block diagram
of the Flexible Display Array Logic.
Note
Changing the number of lines and characters per
line requires readjustment of the Deflection
Amplifier (A9) to obtain the proper horizontal
sweep length for the selected array format.
When the Flexible Character Array Feature is to be installed in a V.D.T having a
RCA High Voltage Power Supply, a new High Voltage Driver Board (A1), Drawing No.
2150231-502 must be used in this power supply. Failure to install this board
will result in damage to the power supply.
To operate the Flexible Character Array (SF 5734-01) and the Printer Adapter
(SF 5711) when both are installed in the same V.D.T. requires the addition of
the Timing Mod Kit #2112926.
Variable Array Limit
The number of variable arrays is limited by the total bit storage of the Delay
Line Memory, which is 12,800 bits. The maximum number of lines that can be displayed is 32 lines with 30 displayed characters per line for a total of 960 displayed characters. When maximum line length is desired, a raster of 14 lines
with 81 displayed characters per line is available. Other arrays within these
two extremes are determined by the formula:
NO. OF LINES
(Whole lines only)
3-74
=
1280
CHARACTERS PER LINE +10
J1
,....
USED FOR
ODD LINE
ARRAYS
ONLY
L.,..-
J1
,....
SELECTABLE
LINE
COUNTER
06C3A-2
EOP TRIG I---F/FS
06B48-2
06B49-2
1,.,0
SEMC
LI-P
LOGIC
EOP-P
BOP
~
J1
EXTERNAL
JUMPERS
INSTALLED
FOR
SELECTED
ARRAY
FORMAT
AS
SHOWN
!~T TABLE 3-
10M
SELECTABLE
CHARACTER
COUNTER
06C3A-3
06C4-3
OCTAL
DECODERS
06B3A-3
06B5A-3
~
CH56 ENABLE
HORIZ
AND
VERT
SYNC
F/F
06B6A-3
CH 64 RES:t:T
J2
CH 62
~
RETRACE
COUNTER
STEERIN3
F/FS
06C6A-3
06C6B-3
V SYNC-N
H SYNC-N
IOBP-N
~
CHARACTER COUNTER ENABLE
4
J1
SELECTABLE
HORIZONTAL
RETRACE
COUNTER
06C7-A3
LOGIC
I----
BT8B
rOBP
HIGH VOLTAGE
POWER SUPPLY
SYNC MODULE
19.2KHz H.V. ENABLE TO H.V.P.S.
(UNIT 13)
70/7II·D •• ,
fI,ure 3-32. fl,xible eharaef,r Array 10,ie, Bloele Dia,ram
3-75
Table 3·3.
FLEXIBLE ARRAY FORMATS
CHARACTERS
PER LIlJE
Flexible Array Jumpers
CONNECTOR P- 1 PIN NUIIBERS
LINES PER
PAGE
1
2
9
10
13
14
15
lO
l~
0
1
1
1
0
1
31
31
0
1
1
1
0
32
29
0
1
1
1
13
26
0
1
1
34
29
0
1
35
27
0
36
2b
,7
CONNECTOR P-::: PrN NUMBERS
Ib
17
18
1
:
0
"
0
0
1
1
+
0
0
0
1
0
+
0
0
0
1
0
1
1
1
0
1
1
1
1
1
0
1
0
1
0
1
1
27
0
1
1
1
38
21)
0
1
0
39
2&
0
1
40
25
0
41
25
42
,
'j
4
I,
9
10
11 12 11
14
18
+
1
-
1
0
1
1
.
(J
0
0
0
+
1
-
1
0
1
0
1
0
0
0
0
-
+
1
-
1
0
1
1
0
1
0
0
0
0
1
+
1
-
1
0
1
0
0
1
0
0
+
0
0
-
+
1
-
1
0
1
1
0
0
0
0
0
1
0
0
1
+
1
1
0
1
0
0
0
0
0
1
0
1
0
0
1
+
1
-
1
0
0
1
1
1
1
0
1
1
1
1
0
0
1
+
1
-
1
0
0
0
1
1
1
0
1
1
1
1
1
0
0
1
+
1
-
1
0
0
1
I
0
1
0
1
1
1
1
1
1
0
0
1
+
1
-
1
0
0
0
1
0
1
0
1
0
1
1
1
1
+
-
0
+
i-
1
-
1
0
0
1
0
1
1
0
0
1
1
1
1
1
1
+
-
0
+
+
1
-
1
0
0
0
U
1
1
0
22
0
1
1
0
1
1
0
1
1
0
0
+
1
-
1
0
0
1
0
0
1
0
43
24
0
1
1
1
1
1
1
0
1
0
0
+
1
-
1
0
0
0
0
0
1
0
44
22
0
1
1
0
1
1
1
1
1
0
0
+
1
1
0
0
1
1
1
0
0
45
22
0
1
0
1
1
1
0
1
1
0
0
+
1
-
1
0
0
0
1
1
0
0
46
22
0
1
1
1
1
1
0
1
1
0
0
+
1
-
1
0
0
1
1
0
0
0
47
22
0
1
0
1
1
1
1
1
1
0
0
+
1
1
0
0
0
1
0
0
0
48
22
0
1
1
1
1
1
1
1
1
0
0
+
1
-
1
0
0
1
0
1
0
0
49
21
0
1
1
1
1
1
0
+
t
0
0
+
1
1
0
0
0
0
1
0
0
50
20
0
1
1
0
1
1
1
0
1
0
0
+
1
1
0
0
1
0
0
0
0
51
21
0
1
1
1
1
1
1
+
1
0
-
+
1
-
1
0
0
0
0
0
0
0
52
20
0
1
1
1
0
1
0
0
1
0
1
+
1
-
1
0
0
1
1
1
1
0
53
20
U
1
0
1
U
1
1
0
1
0
1
+
1
1
0
0
0
1
1
1
0
54
20
0
1
1
1
0
1
1
0
1
0
1
+
1
-
1
0
0
1
1
0
1
0
55
19
0
1
1
1
0
1
0
+
1
0
1
+
1
-
1
0
0
0
1
0
1
0
56
19
0
1
0
1
0
1
1
+
1
0
1
+
1
-
1
0
0
1
0
1
1
U
57
19
0
1
1
1
0
1
1
+
1
0
1
+
1
-
1
0
0
0
0
1
1
0
58
18
0
1
0
1
0
1
0
1
1
0
1
+
1
-
1
0
0
1
0
U
1
0
59
18
0
1
1
1
0
1
0
1
1
0
1
+
1
-
1
0
0
0
()
()
I
0
1
,
1
-
1
0
(J
1
1
1
0
U
60
3-76
18
0
1
0
1
0
1
1
1
1
0
-
Table 3·3.
--
LTm:s pr,'
PAGE
I
2
9
10
13
14
15 16
':>1
lA
0
I
1
1
0
1
1
,,2
17
0
1
0
1
a
1
b3
17
a
I
1
1
0
64
17
a
1
0
1
bC,
17
a
1
1
bf,
16
0
1
()7
16
a
6A
16
69
CHARACl'ERS
PER LINE
CONNECTOR P-2 PIN NUMBERS
CONNECTOR P-l PIN NUMBERS
FT,F;XITlLE ARRAY FORMATS
._._---
Flexible Array Jumpers (Cont'd)
17
18
1
2
3
4
8
9
10
11 12 13
14
18
1
1
0
1
+
1
-
1
0
0
0
1
1
0
0
a
+
+
+
+
1
a
0
1
1
a
a
0
a
+
+
+
+
1
-
1
1
1
a
0
a
1
0
0
0
0
1
1
+
t
+
+
1
-
1
0
0
1
a
1
0
0
J
a
I
1
+
+
-
+
+
1
-
1
0
0
a a
1
a
a
1
a
0
1
1
0
0
~
0
+
1
-
1
0
0
1
0
0
0
0
1
0
1
0
1
0
0
0
1
a
+
1
-
1
a
0
0
0
0
0
0
0
1
1
1
I
1
0
0
a
1
0
+
1
-
0
0
1
1
1
1
1
0
Ib
a
1
a
1
1
1
1
0
0
1
0
+
1
-
a
0
1
a
1
1
1
a
70
Ib
a
1
1
1
1
1
1
a
a
1
0
+
1
-
a
a
1
1
1
a
1
0
71
15
0
1
1
0
1
I
1
+
0
1
0
+
1
-
0
a
1
0
1
a
1
0
72
1~
0
1
0
1
1
1
0
+
a
1
a
+
1
-
0
a
1
1
a
1
1
a
71
15
0
1
1
1
1
1
0
+
a
1
a
+
1
-
0
0
1
0
a
1
1
a
74
15
0
1
0
1
1
1
1
+
0
1
0
+
1
0
a
1
1
a a
1
0
75
15
a
1
1
1
1
1
1
+
0
1
a
+
1
0
a
1
1
1
1
0
0
7[',
.14
a
1
a
0
1
1
1
1
0
1
a
+
1
0
a
1
1
1
1
a
a
77
14
a
1
1
0
1
1
1
1
a
1
a
+
1
a
a
1
a
1
1
0
0
.78
14
0
1
0
1
1
1
a
1
a
1
a
+
1
-
a
0
1
1
1
0
a
0
79
14
0
1
1
1
1
1
a
1
a
1
0
+
1
-
0
0
1
0
1
0
0
0
80
14
a
1
0
1
1
1
1
1
a
1
0
+
1
0
0
1
1
a
1
0
0
81
14
a
1
1
1
1
1
1
1
a
1
0
+
1
-
a
a
1
a a
1
a
a
I
3-77
When the recommended configuration of 14 lines with 81 displayed characters is
used, the following spacing and character dimensions are obtained:
Viewer Screen Raster Area:
8.5 X 3.8 inches
Number of Lines:
14
Displayed Characters per line:
81
Character Height:
.120 inch
Character Width:
.085 inch
Vertical Spacing (Center-to-Center):
.280 inch
Horizontal Spacing (Center-to-Center):
.105 inch
General Purpose Timing Board (Refer to Dwg. 2146306.)
The General Purpose Timing board replaces the Standard Timing board in the Logic
Nest. The basic timing functions, such as the generation of timing bits and the
WAIT, HOLD, START logic, are the same as in the original AS timing card logic,
therefore only the new and altered circuits are described.
Adjustable Character Counter (06C3A and 06C4A-3)
The Adjustable Character Counter is contained in two integrated circuit modules
(Z41 and Z4S). Eighteen terminals are connected to PI and P2 to permit selection
of the desired number of displayed characters per line on the Viewer Screen, as
shown in Table 3-3 •. The Character Counter outputs are applied to the octal decoders to generate the selected character counts.
No'e
When a different number of characters per line
is selected, the character size must be changed
by readjustment of the Tickler Coil Driver, All.
Octal Decoders (06B3A-3 and 06BSA-3)
The octal decoders (Z38 and Z42) decode the character counts needed by the horizontal and vertical SYNC logic and the variable Horizontal Retrace Counter.
No'e
Certain signal names have been retained from the
standard AS timing card but now have a different
meaning. For example, the original term CHS4
designated the 54th or last character displayed
per line. The term CHS4 now means the "last
character displayed on each line."
3-78
The Character Counter enables the two octal decoder modules, one at a time to
generate the selected character count. The two octal modules alternately decode
until the total character count selected in obtained.
Horizontal and Vertical Sync Flip-Flop (06B6A-3)
The H.V. SYNC flip-flop (Z47) and associated logic generate the H SYNC and V SYNC
as well as the IOBP signals. The flip-flop is enabled by character 56 from the
octal decoder and is reset by character 64.
Selectable Horizontal Retrace Counter (06C7A-3)
The function of the Variable Horizontal Retrace Counter (Z34) is to maintain a
constant vertical retrace time to prevent the High Voltage Power Supply's sweep
loss protection circuit from being activated and turning off the high voltage
to the Viewer CRT. When a different character.array is selected, the total horizontal retrace time must be divided equally among the selected number of lines so
that the remaining vertical retrace time will always be the same regardless of the
number of lines displayed. This is accomplished by installing the appropriate
jumpers at Connector PI as shown in Table 3-3.
Retrace Counter Steering Flip-Flop (06C6A-3 and 06C6B-3)
The steering flip-flops and associated gating logic are used to steer the retrace
counter by use of CH62, from the octal decoder and bit times BT4, 5, and 7.
Adjustable Line Counter (06C3A-2)
The Line Counter is contained on one integrated circuit pack (Z3S) and has four
terminals connected to PI to permit selection of the desired line count by means
of external jumpering as shown in Table 3-3. The external jumpers are connected
to either +4.S vdc or ground as shown in the table for the desired number of lines
on the viewer display tube. The Line Counter outputs are applied to logic which
generates the following signals:
IOM
SEMC
LI-P
EOP-P
High Voltage Sync MOdule (06B3A-2)
The High Voltage Sync module (Z46) generates the 19.2 KHz H.V. ENABLE signal used
as the drive frequency in the High Voltage Power Supply (Unit AI3).
Jumpers Required
In all cases, regardless of the flexible array format selected, the following
pins of connectors PI and P2 on card AS (DLD 2146306) are to be jumpered as
shown below:
3-79
CONNECTOR P1
PINS
CONNECTOR P2
PINS
3-6
5-7
11-12
6-17
7-16
To change the flexible array, select the format desired in the left-hand column
of Table 3-3, and install jumpers as shown for the various connectors pins.
In
Table 3- 3 all pins designated by a "zero" (0) shall be connected to signal ground
(Pin 1 of P1 and Pin 18 of P2). All pins designated by a "one" (ll shall be
connected to +4.5 vdc (Pin 2 of P1 and Pin 3 of P2)~
End of Page Trigger Flip-Flops (06848 and 06B49)
When an odd number of lines are to be displayed, the outputs of the End of Page
Trigger flip-flops are used as an input to the Line Counter (06C3A-2) to generate
the odd line count. The output pins in Table 3-3 are designated by a plus sign
(+) (Pin 2 of P2) or minus sign (-) (Pin 4 of P2) to show which output of the
flip-flops are to be jumpered to P1 when an odd line format is selected.
Note
When the Flexible Array Special Feature is
installed, the PEinter Adapter Feature may
not be installea.
3.9 KEYBOARD OPERATION (Refer to Figure 3-33.)
3.9.1
GENERAL
The Keyboard is a IBM Selectric Typewriter keyboard modified to produce a seven
bit digital code for each of the 64 characters. 'There are 45 coded key interposers for the alpha, numerical, and upper case characters on the Keyboard. Each
key interposer is designed with a specific number of nrms to engage only those
bail rods needed to generate the seven bit digital ASCII code for the individual
character. There are seven bail rods which act as a selecting mechanism to activate only those latch interposers needed to generate a specific selected character's ASCII code. The seven latch interposers activate the seven microswitch
link rods that in turn activate the seven microswitches. The coded output of the
microswitches is applied to the Display Register for generation of the selected
character~
The following paragraphs describe one cycle of operation of the Keyboard from the
time the VDT operator presses a key until the Keyboard generates the selected
character's ASCII code, completes its full cycle and returns to the ready state.
Figure 3-34 shows one cycle of keyboard operation.
3.9.2
CHARACTER SELECTION
When the operator presses the key, the. key lever's downward movement causes the
key pawl to depress the selected character's key interposer downward. The selected interposer activates the compensator interlock by displacing the steel balls
3-80
in the compensator tube. The key interposer latch spring engages the end of the
key interposer holding the interposer in position to be engaged by the filter
shaft cam lobe.
70/782·D200
figure 3·33. Keyboard Operation
3.9.3
LATCH BAIL ROD
At the same time the latch spring engages, the interposer depresses the latch
bail rod. The latch bail rod trips the clutch latch pawl from the latch keeper
arm, permitting the spring-loaded slide arm to pull the cycle clutch arm from
the clutch cam releasing the clutch. The clutch arm engages the filter shaft
lobe. Releasing the clutch sp~ings enables the clutch to wind up the inner
clutch spring, thus engaging the clutch to the drive motor shaft and begins
cycling the filter shaft.
3-81
START
OPERATOR PRESSES POWER ON
AND WRITE SWITCH, THEN PRESSES
SELECTED CHARACTER KEY.
STORAnE BAR nr'Lns L INK RODS FOR
APPRO'(IMATELY 2, 1''' 28 MILLISECONDS,
ALLOWING THE SELE>:'I'ED MICROSWITCHES
TO STORE THE SELECTED CHARACTER CODE
FOR PARALLEL TRANSFER INTO nlE DISPLAY
REG [STER. '(ADDITIONAL MECHANICAL
DELAY RESULTS IN TOTAL STOPAGE TIME OF
APPROXIMATELY 3A TO 4A MILLISECONDS. )
1. KEY PAWL DEPRESSES
KEY TNTERPOSER.
2. SELECTED INTERPOSER ACTIVATES
COMPENSATOR INTERLOCK.
3. INTERPOSER ENGAGES SELECTED
LATCH SPRING.
4. LATCH BAIL ROD IS ACTIVATED,
RELEAS ING LA', CH PAWL FROM
KEEPER ARM AND THE CLUTCH ARM
FROM CLUTCH CAM.
1. FILTER SHAFT DISENGAGES
STORAGE ARMS, ALLOWING
RETURN SPRINGS ON STORAGE
BAR TO RELEASE MICROSWITCH
LINK, RODS. PERMITTING LINK
ROD RETURN SPRINGS TO PULL
LINK RODS TO UNSTORED
POSITrON (ALL SWITCH OUTPUTS
"JN~S" OR +4.5 VDC).
1. CLUTCH ENGAGEMENT STARTS
CYCLING OF FILTER SHAFT.
2. FILTER SHAFT LOBE E~AGES
SELECTED INTERPOSER; STARTING
FORWARD MOTION OF SELECTED
BAIL RODS, LATCH IUTERPOSERS,
AND MICROSWITCHES, WHICH
GENERATE THE SELECTED
=HARACTER'S SEVEN BIT ASCII CODE.
1. FILTER SHAFT ENGAGES STORAGE
ACTIVATING ARMS, WHICH PULL
STORAGE BAR up, PRESSING
MICROGWITCH LINK RODS AGAINST
THE NYLON STORAGE BAR TO
BEGIN STORAGE TIME.
1. CLUTCH ARM DISENGAGES FROM
FILTER SHAFT LOBE, RELATCHING
CLUTCH LATCH PAWL TO KEEPER
Af~.
2. CYCLE CLUTCH ENGAGES CLUTCH
CAM, RELEASING THE MECHANICAL
CLUTCH AND STOPPING FILTER
SHAFT CYCLE.
THE FORWARD ENERTIA OF THE
CLUTCH HOUSING ALLOWS nIE
BA<::KLASH CAM TO ENGAGE THE
LEAF SPRING, HOLDING THE CLUTCH
IN THE RELEASED POSITION.
2. KEY INTERPOSER DISENGAGES
COMPENSATOR BALL INTERLOCK
AND RETURNS TO NORMAL POSITION.~
CYCLE COMPLETE
KEYBOARD IS READY
FOR NEXT CHARACTE R
SELECTION
*
At this P'1\-1t +::hp. Keyboard is ready for next key sele~tion by
70')/7~2
)[et .ltor.
-01':11,
figure 3·34. One Cycle of Keyboard Operation flow Chart
3-82
3.9.4
FILTER SHAFT. FUNCTIONS
The filter shaft has three functions:
1.
To drive the key interposer and associated bail rods and latch interposers.
2.
To drive the storage bar actuating arms.
·3.
To drive the clutch cycling arm and associated latch pawl linkage.
Each function is described in sequential order.
Bail Rod Selection
When the filter shaft begins to turn, one of the shaft cam lobes engages the depressed key interposer end lug, and drives the interposer forward. The key interpower arms push the selected bail rods forward.. The selected bail rods push their
associated latch interposers forward.
Latch Interposer Function
The forward movement of the selected latch interposers pulls their microswitch
link rods forward and releases the tension on their selected microswitches,
allowing the selected microswitches to open.
Note
The seven microswitches are energized by +4.5 vdc
that is connected to the normally closed (NC)
contact of the switches. The switch outputs are
taken off the common (C) terminal. Normally
closed in this system is defined as that terminal
which is normally closed by the pressure of the
link rod in the quiescent (unstored) state.
Storage Bar Action
When the latch interposers have pulled the selected link rods forward to generate
the ASCII code for the selected character, the filter shaft lobe engages the two
storage actuating arms. The actuating arms lift up the storage bar. The storage
bar clamps all seven of the microswitch actuating link rods between the urethane
edge of the bar and the nylon storage block. This holds the selected link rods
in the stored position for a period of 25 to 28 milliseconds.
Note
The first segment of the storage time is approximately 28 milliseconds, during which time the
storage bar is actually holding the link rods.
The remaining storage time of 38 to 42 milliseconds
varies due to the delay in the complete cycle of
the mechanical parts advancing and returning to
their normal (unstored) position.
3-83
During storage time the selected key interposer disengages the compensator ball
interlock and begins to return to its normal position. At this point in time the
VDT operator may select the next character key even though there is a character
being held in storage. This permits faster typing speeds than would be possible
on a standard typewriter.
Keyboard Strobe
During the storage time, the keyboard entry logic of the Display Register is
enabled to allow a parallel transfer of the selected character's seven bit digital code from the keyboard microswitches into the DR Register.
The filter shaft cam disengages the two storage actuating arms and the storage
bar return springs lower the storage bar, releasing the link rods. The selected
link rods are then pulled back by the link rod return- springs and each rod closes
its associated microswitch completing the storage cycle.
Note
The output of the seven microswitches will be
all "ones" in the normal or unstored state
(+4.5 vdc = "1").
Clutch cycling Arm and Associated Linkage
During the storage cycle the clutch cycling arm has been returned sufficiently
by the filter shaft cam to permit the clutch latch pawl to overt ravel and clear
the keeper arm and allow the pawl spring to depress the pawl into position to
engage the keeper arm. As the clutch arm is released by the cam, the latch pawl
strikes the end of the keeper bar.
At this time the clutch spring engages the clutch housing cam and causes the
clutch ~o release the filter shaft (by unwinding the inner clutch spring).
Anti-Backlash Cam
Ac~ion
When the filter shaft clutch disengages, the forward inertia of the clutch
housing allows the leaf spring to engage the backlash cam, holding the clutch
in the released position. This completes one cycle of operation of the keyboard
mechartism during the selection of one character.
3.9.5
SELECTOR. COMPENSATOR TUBE FUNCTION
The function of the Selector Compensator Tube is to allow only one key interposer
to be depressed at a time, thus acting as an interlock to prevent a second character from being selected simultaneously with the first character.
The Compensator Tube is located at the rear of the keyboard and is directly below
the key interposer compensator arms. When a character is selected and the key
interposer is depressed, the interposer compensator arm is forced between two of
the steel balls in the compensator tube as shown in Figure 3-34.
3-84
o
KEY INTERPOSER LUG
KEY INTERPOSER ARM IN
POSITION WITH BALL
COMPENSATOR INTERLOCK
A.
SIMULTANEOUS KEYLEVER DEPRESSION BLOCKED
B.
SECOND KEYLEVER DEPRESSION BLOCKED
70/75&- 04 0 2
figure 3·35. Compensator Tube Interlock
Note
In the normal state with no key interposer
depressed, there is only enough space between
the steel balls to allow one key interposer
arm to be depressed.
When an interposer compensator arm is depressed between the steel balls, all of
the balls are offset enough to prevent any other interposer from being forceably
depressed as shown in Figure 3-35.
Note that the second key interposer arm is blocked by the top of one of the offset steel balls. When the key interposer completes its selection cycle, and the
filter shaft cam releases the interposer, the interposer compensator arm is
raised. out of the compensator tube by the interposer return spring. The steel
balls are immediately returned to their normal position. The second key may be
immediately selected, permitting faster typing speeds.
3-85
G,
o
o
o
o
o
0 ",
.'
SECTION FOUR
MAINTENANCE
4.1
GENERAL
This section contains the procedures for parts replacement fo..: major components,
mechanical and electrical adjustments, lubrication, and proced 1 lres for trouble
shooting and isolating malfunctions.
4.2 PREVENTIVE MAINTENANCE
Refer to the latest Spectra 70 TIP for preventive maintenance
cedures fur the Model 70/752 Video Data Terminal.
schedule~_
and pro-
4.3 OPERATIONAL CHECKS
1.
Remove the data set connector, apply pnwe, and let the unit warm up for five
press the WRITE switch, then press the MASTER ERASE and SCREEN
switch.
minutes~
[
2.
Press each key and ensure it does not repeat when it is held down.
If pressing the key does produce repeat characters, refer to the keyboard adjustment
procedures.
.
3.
Press and hold the -+ (advance) switch until the mark advances to the next
line~ ensure that it moves one character space at ?[ ] X.J« then press the WRITE switch and
with the ADVANCE switch and the Mkey fill the balance of the first line
with the letter M, place an M and «
characters in the third through ninth
line~, place alternately MIs and spaces six times in the tenth line, place
an M in the first position of the eleventh through nineteenth lines, and fill
the last line with several MIs and sets of numbers.
C:
c
c
c
4-1
9.
Press and hold the -+ (ADVANCE) switch and check that it returns to the beginning of the next line as it passes a return character and not when it
passes the position the return switch was pressed.
10. Check the display for the following qualities:
a. BRIGHTNESS adjustment
b. FOCUS adjustment
c. PICTURE (phase) adjustment
d. The distance from the center of the top line to the center of the bottom
line is approximately 5.5 inches.
e. The length of the top and bottom lines is approximately B.O inches.
f. The distance from the ends of the lines to the tube frame is approximately
equal (both horizontally and vertically).
"ote
If the above checks indicate need for adjustment
refer to paragraph 4.7.1 Deflection Amplifier
Adjustments.
g. Check that all characters are completely formed and there are no extraneous
spots around the characters.
"ote
If the display of the characters is not normal
refer to paragraph 4.7.5, Character Generator
Alignment.
11. Press the XMT switchr it will light. The WRITE light will go out, and the
mark will move to the third character position in the first line.
This indicates that the display-to-buffer transfer, buffer control, and automatic
mark control functions are operative.
(Note: Data set cable removed.)
12. Press the WRITE switch; move the mark under the second character with the
ADVANCE switch.
13. Press the MASTER ERASE key and CHAR switch1 check that the second character
has been erased, and the mark has moved to the third character position.
14. Press the MASTER ERASE key and LINE switch1 check that the remainder of the
line has been erased and the mark has moved to the beginning of the next1ine.
15. Press the MASTER ERASE key and SCREEN switchr check that the remainder of
the screen has been erased and the mark has moved to the beginning of the
page.
4-2
16. Type "DATA· INSERT· TEST· « DATA· INSERT." (it will appear as two lines.) Press
the WRITE switch and move the mark under the space betwE!en INSERT and TEST.
17. Press the DATA INSERT switch; it will light. Type" ED." Check that the display is "DATA· INSERTED.:.TEST·« DATA· INSERT." (Note: ED added.)
18. Press the Space Bar enough times until the word TEST has moved to the next
line. Check that the «
(carriage return) character has not moved to the
second line.
19. Press the DATA INSERT switch; it will go out.
20. Press the MSA switch; it will light.
J (ETX) character.
Press the return switch and enter the
21. Press the WRITE switch and move the mark under the" P
of the first line.
22. Press the XMT switch; it will light, the WRITE light will go out, and the
mark will move under the S.
23. Press the WRITE switch and then press the MASTER ERASE key and SCREEN switch.
24. If the Video Data Terminal does not have the Printer Adapter Special Feature,
skip steps 25, 26, and 27; if it does, type the mpssage "PRINTER· AD APTER·
TEST· « « «END TEST« ".
25. Press the PRINT switch; it will light and the following message will be
printed.
PRINTER AD APTER TEST
END TEST (paper moves up one line)
26. Check the printed message for quality printing and ensure that all characters
typed were printed.
27. Press the LF button on the printer to advance the paper.
28. If the Video Data Terminal does not have the Data Format Special Feature,
skip steps 29 through 30; if it does, request a standard message format.
29. Type some characters and ensure that the variable data characters are noticeably brighter than the data format characters.
30. Press and hold the -+ (ADVANCE) switch and ensure that the mark advances
from data fieid to data field.
31. Press the .L (RETURN) switch and ensure that the mark moves to the first
character poSition of the next variable data following that line.
4-3
4.4 KEYBOARD LUBRICATION
All lubrication must be performed from the following procedures.
CAUTION
Overlubrication of the 70/752 Keyboard mechanism
will cause m-llfunctions in the unit; therefore,
it is mandatory that all Field Personnel use only
those lubricants specified in this manual and
follow the lubrication procedure given. Excessive
lubrication will cause the mechanical adjustments
to give improper operation, and will lead to overadjustment which will result in excessive wear to
the mechanisms.
1.
Remove the Keyboard from the Control Panel baseplate (by removing four
mounting screws) and vacuum all foreign matter from the unit and baseplate.
2.
Lubricate ONLY those pOints shown in Figures 4-1 through 4-4. Each point
referenced in the illustrations specifies the type of lubricant that must
be us·)d.
CAUTION
Do NOT use an alternate grease, since lower welting
point grease will migrate and spin-off, causing
malfunctions in the keyboard.
a. At all points desigr'lated by the letter "A" in Figures 4-1 through 4-3
use light oil (No. 28 oil - 932694).
b. At all p::>ints designated by the letter "B" in Figures 4-1 and 4-2 use
IBM Lubri~ant No. 23, IBM part number 1280442,(RCA - 954163}.
Nole
Mlen lubricating the filter shaft (Figure 4-2, item
n), 1 i-Jhtly lubricate the entire length of the shaft
lobes.
c. Figure 4-4 shows the clutch lubrication point designated by the letter
"C". Lightly grease with Molube-Alloy No. 2 medium (RCA-95416'5).
Apply grease into slot by the spring tang (Figure 4-4, item 1) until
grease appears at the end of the col tar by the gear hub (Figure 4-4.
item 2). DO NOT apply grease to the oilite bearing.
3.
4-4
Clean the contacts of switches S8 and SlO, Figure 4-5, located on the lower
Keyboard frame, with bond paper saturated in alcohol, by drawing the paper
between the closed switch contacts.
Figure 4·1. Cycle Clutch Linkage Lubrication
~
(RCA 932694)
CD
(IBM 1280442)
B
A
Figure 4·2. Filter Shaft And Return Delay Arm Lubrication
4-5
~ (RCA 932694)
figure 4-3. Drive Motor Lubrication
figure 4-4. Clutch Lubrication
4-6
Figure 4-5. S8 and SJO Switch Contact Cleaning
4-7
R3
4.5 PARTS REMOVAL AND REPLACEMENT PROCEDURES·
Note
When ordering replacement parts it is
mandatory that the model number, serial
number, and Equipment Revision Level
'
(ERL) be included to ensure receiving
the correct replacement part.
The major components of the Video Data Terminal may be removed and replaced using
the following procedures. Unless otherwise specified, replacement procedures are
assumed to be in the reverse order of removal and are not described.
Assemblies that have been removed should be adequately protected to prevent
damage to parts or misalignment of electronic adjustments. When an assembly has
been replaced; perform all applicable alignment and adjustment procedures found
in Section Four.
Refer to Appendix A for the identification and location of assemblies and components.
4.5.1
VIEWER ASSEMBLY ACCESS
CAUTION
Prior to any parts removal or replacement the Video Data Terminal shall be
disconnected from its power source and
the data input/output connector P16
removed.
To gain access to the major components in the Viewer, remove the rear panel and
the housing as follows:
1.
Remove the six screws on the rear panel and tilt the panel backwards, allowing
the fan assembly in the upper left hand cover to clear the housing.
2.
When the fan assembly is clear, lift the rear panel free of the housing.
Disconnect the cable from the fan assembly.
3.
Remove the two screws in the lower corners that secure the housing to the
connector mounting bracket and the Low Voltage Power Supply.
4.
Slide the housing to the rear, taking care to clear the components on the
Tickler Driver component board, until the housing is free.
Module Boards, Al through A6
Each module board may be removed from the nest assembly by pulling firmly to the
rear to disconnect the boards from the appropriate connector (J1 through J6).
Delay Line, A7
The Delay Line is located on the hinged panel at the left side of the Viewer
(looking from ,the rear).
1.
2.
Remove the four screws on the front and rear brackets securing the Delay
Line panel.
SWing the brackets clear and carefully lower the Delay Line panel.
3.
Disconnect J7 and remove the screws securing the hinge to the basic assembly.
4-8
Selection
~plifier,
A8
With the Delay Line lowered, remove the Selection Amplifier by pulling, firmly
upward to disconnect the COmponent Board from J80l and J802.
Deflection Amplifier, A9
The Deflection Amplifier may be removed as follows:
1.
Lower the Delay Line.
2.
Open the front COntrol Panel and remove the three knobs on the BRIGHTNESS,
PICTURE, and FOCUS controls.
3.
Remove the Deflection Amplifier by pulling firmly upward to disconnect the
component board from J90l and J902.
Monos cope , AIO
The Monoscope Tube (VI) and the Monoscope Preamplifier (AlOAl) may be removed by
using the following procedures:
1.
Remove the four screws and the monoscope housing cover located at the rear
of the Viewer.
WARNING
Before proceeding, connect a grounding probe clip
lead to the viewer baseplate and carefully ground
all exposed terminals and anode l€ads.
2.
Mark and remove the two slide-tab connection:3 from the rear of the preamplifier assembly. These leads can be identified by their connection to the
£eedthrough capacitors Cl and C2 located near the end of the monoscope
housing.
CAUTION
During reinstallation to prevent shorting the
power supply ensure that the slide-tabs do not
short to the ground terminal, (tab openings
should face left).
3.
Remove the braided ground lead from the ground screw terminal El inside the
monoscope housing.
4.
Slide the top of the O-ring retainer off the end of the monoscope tube.
5.
Disconnect component board connector J12 from the Video Driver Board, A12.
Mark and remove the coaxial lead terminals 16 and 18 of Video Driver Board
connector, J12. Removal will require the use of an AMP liB" 810992-1
extraction tool.
6.
Grasp the end of the monoscope tube firmly and disconnect by pulling carefully
to the rear of Viewer, while feeding the coaxial lead through the housing
grommet.
4-9
7.
Upon replacement ensure proper alignment of the monoscope tube base with the
socket keyway in the monoscope assembly.
Monoscope Preamplifier Assembly, A10A1
The Monoscope Preamplifier Assembly may be removed after removal Qf the monoscope
tube using the procedure listed above (with preamplifier attached), in the
following manner:
1.
Remove the anode clip connector from the side of the monoscope tube.
2.
Roll or slip the O-ring past the preamplifier assembly support tabs located
near the base end of the monoscope tube.
3.
Carefully disconnect the board mounted anode clip from the opposite end of
the monoscope tube.
Tickler Driver Module Assembly, All
The Tickler Driver may be removed by using the following procedures:
1.
Remove the four screws, one with ground lead attached, from Q20 transistor
heat sink assembly.
2.
Remove the mounting screw from the upper left corner of the module as viewed
from the rear of the viewer.
3.
Grasp the module firmly and withdraw it towards the front of the Viewer while
disconnecting the module connector, J11.
4.
Prior to replacement of this module, clean the thermal compound from the
bottom of the Q20 heat sink and the mating surface of the Viewer 'CRT cover
with a clean, soft, lint-free cloth.
5.
Apply a thin film of Thermal Compound, RCA Part 2187263, to the heatsink
mating surface prior to assembly on the viewer.
Video Driver, A12
The Video Driver may be removed as follows:
1.
Disconnect J12 from the video driver component board.
2.
Remove four screws in the CR10 diode heatsink in the lower right hand
corner of the board.
3.
Remove the three screws securing the component board to the rear shield cover.
4.
Remove the nut securing the terminal and wire to the lower left hand corner
of the board.
5.
Prior to replacement of this module, clean the thermal compound from the
bottom of the CR10 heatsink and the mating surface on the Viewer CRT cover
with a clean, soft, lint-free cloth.
4-10
6.
Apply a thin film of thermal compound, RCA Part 2187263, to the heatsink
mating surface prior to assembly on the Viewer.
High Voltage Power Supply Assembly, A13
The High Voltage Power Supply may be removed by using the following procedures:
1.
Remove the six screws from the perforated safety cover and withdraw cover.
WARNING
Before proceeding, connect a grounding probe
clip lead to the viewer baseplate and carefully
ground all exposed terminals and anode leads.
In the absence of a ground probe, a clip lead
from the viewer baseplate to the metal shaft of
an insulated handle screwdriver can be used.
2.
Mark and remove the 6.3 vac filament leads from terminals E3 and E4. Terminals E3 and E4 are the top-most ceramic stand-off terminals on the right
wall of the power supply housing. On later production models, E3 and E4
are on the left wall of the Power Supply Housing.
3.
Mark and remove the high voltage leads from terminals El and E2. Terminals
El and E2 are the lower-most long ceramic terminals on the right wall of the
power supply housing.
4.
Mark and remove the harness w~r~ng from the outboard or nearest side of TBI.
Mark and remove the ground lead screw to the left of TBl which also serves
to secure the Power Supply to the baseplate. Slip the grommet and the
wiring harness out of the slot and bend clear.
5.
Remove the remaining securing screw located to the right of TB1.
6.
Carefully withdraw the Power Supply from the left side of the Viewer, ensuring not to damage or pull leads loosened in steps 2, 3, and 4.
7.
During replacement, ensure that the securing tab of the power supply base is
inserted properly into the slot provided in the center web of the Viewer.
8.
Care should be exercised when tightening the filament and high voltage leads
on the ceramic stand-off terminals •
Low Voltage Power Supply Assembly, A14 and Regulator Assembly A14Al
The low voltage power supply and the regulator assembly may be removed as follows:
1.
Remove the four screws on the power supply cover door and lower the door to
expose the interior of the power supply and the door-mounted regulator.
4-11
WARNING
Before proceeding, disconnect the ac plug,
connect a grounding probe clip lead to the
viewer baseplate and carefully ground all
exposed terminals and anode leads.
In the
absence of a ground probe, a clip lead from
the viewer basepla.te to the metal shaft on
an insulated handle screwdriver can be used.
2.
The Regulator Assembly, A14Al, may be removed at this point. Remove the two
mounting screws and withdraw the regulator assembly while disengaging connector J1.
3.
Remove the filament leads from the High Voltage Power Supply in accordance
with steps 1 and 2 of the Low Voltage Power Sup~ly procedure in paragraph
4.5.1.
4.
Remove the ring lug from screw terminal E7 located on the power supply
housing adjacent to the Jll and J12 component board connectors.
5.
Mark and remove the harness wiring from the outboard of TB5 on the bottom of
the Power Supply Assembly.
6.
Mark and remove the harness wiring from C2 (E2), C4 (E4), and CS (E5).
7.
Remove the two power supply securing screws from the bottom of the assembly
and one securing screw at the rear of the Viewer center web partition.
S.
Ensure that the Video Data Terminal power cord, blower fan supply cord, and
the wiring loosened above is free.
Carefully withdraw the Low Voltage Power
Supply Assembly from the left side of the Viewer.
Dynamic Focus, A20
The dynamic focus component board may be removed as follows:
1.
Disconnect J12 from the video driver component board.
2.
Remove the two screws securing the rear shield cover to the basic shield
assembly.
3.
Remove the three screws securing the component board to the rear shield
cover.
4.
Lift the rear shield cover free of the basic 3hie1d assembly, giving access
to the CRT base.
5.
For ease of work, disC'onnect the CRT .base socket.
6.
Remove the two screws securing the dynamic focus
basic shield assembly.
7.
Disconnect the component board from J20 hy pull ing firmly upward.
4-12
~omponent
board to the
8.
Remove the screw securing the stand-off terminal to the upper edge of the
board.
Keyboard Filter, A21
The Keyboard Filter may be removed as follows:
1.
Lower the Delay Line.
2.
Disconnect J2101 and J2102.
3.
Remove the four screws securing the Keyboard Filter component board to the
Nest Assembly.
Cathode Ray Tube
The Cathode Ray Tube may be removed by using the following procedure:
WARNING
Cathode Ray Tubes are dangerous to handle. Refer
servicing to qualified service personnel. The
Cathode Ray Tube in this unit employs integral
implosion protection.
1.
Remove the two screws from the rear of the CRT housing. Disconnect the
video driver connector, Jl2, and carefully slide the housing back until the
forward end tab is clear. Tilt the housing cover to the right side of the
Viewer while maintaining slack in the ground lead from the Video Driver.
Prop the housing cover clear of the CRT neck area.
2.
Mark the yoke and housing tab immediately above, with a fine pencil line.
Loosen the yoke clamp screw.
3.
Remove the anode clip lead from the left side of the CRT.
4.
Remove the socket connection from the base of the CRT.
5.
Lower the Delay Line A7, using the Delay Line replacement procedure in
previous paragraph. Remove Selection and Deflection Amplifiers, AB and A9,
using procedures contained in the previous paragraphs.
6.
Remove the screw from the access door on the bottom front of the Viewer and
hinge door down.
Remove the three bezel mounting screws which secure the
bezel to the baseplate.
7.
Remove the six screws from the forward end of the CRT housing.
are located on each side and the top of the CRT housing.
B.
Slide the bezel and CRT assembly forward while guiding the tube neck and
base through the deflection yoke. Lay the bezel and CRT face down on a
padded area.
Two screws
4-13
R4
Unhook the grounding braid tension spring from the CRT retaining cl~p.
Unhook the retaining clamp spring and remove the clamp from the four holding
clips.
9.
10. Lift the tube up and tilt to feed the tube neck and base through the·
grounding braid.
11.
replacement, refer to the deflection amplifier adjustment procedure
and the deflection yoke alignment procedure.
~ter
Deflection Yoke
CAUTION
Before replacing the deflection yoke,
check the serial number of the associated deflection amplifier in the VDT.
For deflection amplifiers serial numbers 0135 and below, the following
resistors must be replaced with the
values indicated on Page A43 before
the amplifier is used. Replace resistor R8 with IPB Figure 12, Item 27.
Replace resistors R5 and R39 with IPB
Figure 12, Item 32.
The deflection yoke may be removed by using the following procedure.
1.
Remove the CRT and bezel assembly by utilizing the procedures contained in
the previous paragraph.
2.
Mark and remove terminals 14, 15 and 16 of the J11 connector for the tickler
driver module and terminals 3, 5, 16 and 18 of the J901 connector for the
deflection amplifier module. Removal will require the use of an AMP "B"
810992-1 extraction tool.
3.
Carefully remove the deflection yoke from the Viewer while guiding the
wiring loosened in Step 2.
4.5.2
INTEGRATED CIRCUIT PACKAGE REPLACEMEN.T
When replacing an ICP, the primary consideration is that extreme care be taken
so that no damage is done to the printed board, etched lines, pads or other
components. Excessive heat or mechanical abuse will cause pads to lift and
lines to break. During the removal process, all possible precautions to avoid
damage to the board must be taken, even at the sacrifice of the Iep itself.
Tools Required
1.
2.
3.
4.
5.
6.
7.
4-14
Ungar Soldering Iron Handle
Ungar 37~ Watt Heating Element
Ungar Tiplet PL340
Soldapullt
Holder, Tronic Card
Jewelers Loupt
Tweezers
937442
937443
937445
938192
937351
937347
932775
8.
9.
10.
11.
12.
13.
Acid Brush
Cutters (Undter A95E)
Ersin Multicore Solder,
.032" dia., 370 flux
Chlorothene NU
Chlorothene Dispenser
Ungar 455 Cleaning Sponge
937468
938191
932783
939059
937976
938164
R3
General
CAUTION
Two of the Ie packages (RCA Dwgs.
2187271 and 2187272) have the index
notch reversed from that of the standard Ie packages. To avoid confusion,
use the color coded dot rather than
the index notch to determine the location of Pin No.1. When the Iep is
held in a vertical position with the
color code dot at the bottom, Pin No.
1 will be at the upper left corner of
the package. Refer to Figure 4-5A.
~~"::::~
6
10
11
12
13
INDEX
L---INDEX
10/151 "D'4'
STANDARD Iep
Figure 4-SA.
Iep 2187271, 2187272
I
Ie Pin Identification
From experience, it has been found that the 37~ watt Ungar iron with a
PL340 Tiplet paint provides the right amount of heat and can do a very
It is extremely important to keep the tip freshly tinned and free from
Retinning the iron and wiping it clean for each soldering operation is
practice.
3/64"
neat job.
slag.
a good
CAUTION
Do not use the large diameter single
core resin solder.
It is extremely
hard to control the flux flow when
working on small joints with this
type of solder. A solder such as
Ersin Multicore, with a diameter of
0.032 inches, should be used.
When soldering or resoldering a connection, do not work the sharp tip of the
iron into the hole or eyelet around the leads. This will result in physical
damage to the board itself. As much of the flat of the tip as possible should
be placed on top of the eyelet and intimate contact maintained so that optimum
heat transfer results. This will cause the solder to flow rapidly and prevent
heat damage to surrounding areas.
4-l4A
Removal Procedure
1.
Using the needle nose cutters, carefully clip the 14 leads close to the flat
pack body. Try to leave 1/32" to 1/16" of the lead on the board. This will
leave enough lead on the flat pack to provide contacts for testing (engineering analysis on returned defectiVe parts) and will also leave enough lead
on the board to allow easy removal (see step 2).
CAUTION
The flat pack body may be stuck to the
board with flux which was not completely removed during the manufacturing wash cycle. If this is encountered, use extreme care not to
lift the printed circuits that run
under the ICP. Tweezers can be used
to lift the ICP slightly while flowing chlorothene under the Iep to
dissolve the flux.
After all 14 leads are cut, remove the flat pack and return according to the
procedure in TIP General-4.
2.
Bend the portion of the leads remaining on the board up to a position perpendicular to the board.
3.
Mount the board in the Tronic Card Holder in a vertical position such that
both sides of the board are accessible. For right handers the component
side (front) should face to the right and the back side to the left.
4.
Cock the Soldapullt and place it over the ICP lead (on the back side) to be
removed. Heat the connection on the component side holding the flat of the
Tiplet point as flat as possible against the joint. As soon as the solder
is molten, trigger the Soldapullt. In most cases, the operation will have to
be repeated by reversing the iron and Soldapullt application from side to
side until the ICP lead is free to be removed from the back side with the
tweezers. Do not use force in removing the lead if it is still being held
by solder. Grip the protruding end lightly with the tweezers. Apply the
iron tip to the opposite side of the board~ when the solder is molten the
lead will slip out easily.
CAUTION
Do Not use the tip of the iron as a
pryor as a reamer since this will
cause mechanical damage. Do not use
excessive pressure with the iron tip
to transfer heat.
4-14B
5.
The best transfer of heat requires a clean tip. Frequently, add a little
solder to the iron tip in order to aid heat transfer and to add flux to the
joint. Wipe the iron tip on a solder sponge after removal of solder from
each terminal to avoid transporting a globule of solder to the next terminal
to be removed. Do not file the tiplet as it has a special iron~clad copper
tip.
Note
Occasionally, the Soldapullt will become sluggish and fail to withdraw
solder properly. Disassemble the
unit (see instructions accompanying
the Soldapullt), clean the cylinder
wall and the "0" ring on the plunger.
Apply a film of light oil to the cylinder, wiping it around the cylinder
wall.
6.
Repeat step 4 until all 14 leads are removed.
7.
Check each lead hole to make certain all solder has been removed. If
necessary, reheat and remove any remaining solder using the Soldapullt.
Clean the holes and surrounding area with Chlorothene applied with a
brush. Use the dispenser for convenience in handling the Chlorothene.
Wipe with a clean rag.
The holes should now be free from all foreign matter
and ready to accept the leads from the new flat pack. Use the jewelers
loupe for this inspection.
4-15/4-16
Installation Procedure
At this point, it is assumed that the defective flat pack has been removed from
the circuit board and that the board is in a condition suitable to accept the new
flat pack. The same general soldering rules for removing flat packs should be
followed for installation of flat packs.
1.
Replacement ICP flat packs will have preformed and precut leads. MOunt the
new flat pack on the board making sure that it is correctly oriented. The
appropriate data sheet will show the correct orientation.
CAUTION
Ensure that none of the leads are shorting to
each other. If any of the leads require additional
forming, use tweezers.
Hold the flat pack in place from the component side of the board and bend
all leads on the other side in a direction away from the flat pack proper
at an angle approximately 30 degrees with the back side of the board to hold
the ICP in place.
2.
Mount the board in the Tronic Card holder, component side towards the left.
3.
Solder each lead in turn in the top four-terminal row first. Apply heat to
the printed circuit pad and lead on the back side of the board and feed
solder to printed circuit pad on the component side of the board. The
solder will flow freely towards the iron and secure the connection at both
the front and back. Apply only the minimum amount of heat and solder necessary to make secure connections. Trim away the excess lead lengths in
the rOw just completed. Next, solder the three-terminal row and cut away
the excess lead lengths as before. Repeat the procedure for the other
leads to be soldered.
4.
Remove the resin from the area using cholorothene and the acid brush.
Alternate Method
1.
Plug iron into vanvac and set at 120 vac.
Nole
Do not change setting.
2.
Place CKT board on styrofoam pad, component side up.
3~'
Using small diagonals, carefully clip the 14 leads close to the board.
4-17
Note
Leave 1/32" to a 1/16
11
of the lead on the board.
CAUTION
In the following step, exercise extreme caution
to prevent damage to the pic board pad.
4.
After all 14 leads have been cut, remove the IC Body, carefully lift pack
from the board with fingers, without damaging pad or components.
5.
Remove one lead at a time by applying solder iron to the related circuit pad.
Apply just enough heat to remove lead with tweezers.
6.
Pick up braid, dip in kester flux and position braid across 7 pads. Position
iron and with light motion pull braid across 7 pads. Repeat for 2nd row.
Remove and residual solder in the mounting holes by heating pada~d inserting
piece of bus wire through the hole. Clean with bristle brush and alcohol.
4.5.3
CONTROL PANEL ASSEMBLY
To provide access to the major components in the Control Panel Assembly, remove
the cover as follows:
1.
Disconnect the Control Panel connector P15 from the Viewer and move the
Control Panel to a clear work area.
2.
Place the Control Panel Assembly upside down on a padded surface and remove
the six cover-retaining screws from the baseplate.
3.
Return the Control Panel Assembly and cover to an upright position and
remove the cover.
Keyboard
The Keyboard is removed using the following procedure:
1.
While maintaining the Control Panel in an upright position, remove the
four screws from beneath the baseplate of the unit.
CAUTION
Ensure that the wiring harness between the
Keyboard and the left side of the baseplate
is not restricted by the cabling tab.
2.
4-18
The tab can bp bent to an upright position to facilitate removal and
replacement.
R3
R3
3.
Raise the Keyboard slightly and withdraw to the left while observing the
drive motor and fan clearance through the motor shield.
4.
When clear of the baseplate, lay the Keyboard upside down on a "soft pad.
5.
Mark and remove the wiring harness from the front side of terminal board TBI.
Switch Matrix Subassembly
With the cover and Keyboard removed from the Control Panel, the switch matrix
subassembly may be removed in the following manner:
1.
Mark and remove the wiring harness from the rear side of terminal board TBI.
2.
Remove the two screws which secure connector J15 to the baseplate. These
screws, one male and one female, also serve to polarize the connection,
therefore a note of their locations sho~ld be made prior to disassembly.
3.
Remove the four mounting screws from beneath the baseplate which secures
the switch matrix subassembly and lift the unit and its harness free of the
baseplate.
Switch Matrix Alignment
1.
When a switch button pops out of the matrix switch, it is usually caused by
warping of the center tab on the lens cap. To correct this problem, hold
the lens cap and use a screwdriver to pry the center tab back. Hold the tab
back in this position with one hand, and with the other, bring a heated
soldering iron in close proximity of the center tab. (Be sure not to touch
the plastic cap with the iron.) Apply only enough heat to the tab to form
it into the outward position. Reinstall the lens cap when it has cooled
down.
2~
Remove the mounting plates which hold the matrix switch assembly.
3.
Loosen the 5 nuts which are secured with Loctite Grade E (932672) on the
shafts of the matrix switch assembly. This will allow the switches to
operate freely. When all switches are operating, finger tighten the 5 nuts
and apply Loctite Grade E.
4.
Before putting on mounting brackets, slide a flat washer on the bolt behind
the bracket. This will ensure that the bracket does not tighten down against
the screws of the matrix switch, causing the switches to stick again.
CAUTION
During reassembly ensure that the
wire harness is not pinched or can
later be abraded by any mechanical
assembly.
4-19
R3
4.6 KEYBOARD ALIGNMENT AND ADJUSTMENTS
The only mechanical adjustments to be made in the field are indicated by the
word (FIELD) following the title.
The word (FACTORY) following the title denotes adjustments that are normally
made at the factory.
When field personnel must replace major components, the
appropriate factory adjustments must be made.
CAUTION
The following procedures indicated as
FACTORY adjustments and alignments shall
NOT be performed unless replacement of
components is necessary. When required,
these procedures must be performed with
extreme care to ensure that all keyboard
alignments are made according·to the
procedures in the correct sequence.
4.6.1
I
KEYBOARD DRIVE TRAIN ADJUSTMENT (Field)
1.
Turn off the Video Data Terminals power.
2.
Remove the Control Panel housing as outlined in paragraph 4.5.3.
3.
Loosen the 6/32 inch nut on the drive motor's upper mounting screw, located
on the inside of the right hand Keyboard end frame (Figure 4-5B)~
4.
Press on the motor field to engage the drive motor's spur gear fully with
the urethane clutch gear.
5.
Obtain the special clutch gear gauge (part no. 1144869, stock no. 954361)
designed specifically for adjusting the clutch and drive motor gear clearance.
6.
Place the wire's feeler arm in the clutch gear as shown in Figure 4-5B and
slowly rotate the motor fan blade, allowing the wire to engage the motor's
spur gear; move the motor's loose mount back.
7.
When the feeler guage passes through the gear's point of tangency, ensure
that a slight friction is felt.
CAUT.ION
Excess pressure on the motor will cause
the wire to be imbedded in the soft
urethane clutch gear and result in improper adjustment.
A slight feel of
friction will result in an approximate
clearance of .009, which ensures
optimum performance.
8.
4-20
When the correct clearance is obtained, tighten the 6/32 nut on the motor's
upper mounting screw.
(View A)
URETHANE CLUTCH GEAR
URETHANE CLUTCH GEAR
ARM
FEELER ARM AT POINT OF TANGENCY
.010 STAINLESS WIRE
(8-INCHES LONG WITH
1/4-INCH RIGHT ANGLE
"FEELER ARM")
(View B)
Note
FRAME
1O/7:52 ' P409
MOUNTING SCREW
ROTATE MOTOR FAN UNTIL WIRE IS
AT POINT OF TANGENCY OF TWO
GEARS, THEN ADJUST AS
DESCRIBED IN PARAG. 4.6.1
figure 4-5 B. Drive Gear Ad;ustment
4-20A
•
R3
9.
Recheck the clearance by rotating the wire gauge through the point of tangency and ensure that only a slight friction is felt.
No',
Proper friction will be. just enough
to hold the 8-inch wire from rotating
under its own weight.
10. Remove the wire gauge.
11. Place the Control Panel POWER switch to ON and check for proper Keyboard
operation.
12. Place POWER switch to OFF.
13. Replace the Control Panel housing.
BAIL ROD ALIGNMENT AND ADJUSTMENT (Factory)
4.6.2
1.
Release two screws on left-hand side of Keyboard holding the bail plate
(FigUre 4-6, item 1) •
.2.
Move the bail plate forward or to the rear so that one bail rod (Figure 4-6,
item 2) is parallel to key interposer lugs (FigUre 4-6, item 3).
3.
Tighten the two screws on the bail plate.
4.
Release two. screws (FigUre 4-7, item 1) on latch interposer guide comb
(Figure 4-7, item 2), permitting no. 1 and 7 latch interposers to clear
respective bail rods approximately .005 inch (Figure 4-7, item 4).
5.
Tighten the two screws on the guide comb.
6.
Bend the guide comb tabs (FigUre 4-7, item 3) (Nos. 2 through 6) for a clear-
4-20B
ance of approximately .005 inches between latch interposer nos. 2 through 6
and their respective bail rods.
7.
Raise or lower the bail plate (Figure 4-~ item 1) by loosening the two screws
called out in step 1, so that the latch bail rod (Figure 4-6, item 4) is
parallel to the key interposer (Figure 4-~ item 3).
8.
Tighten the two screws.
9.
Recheck adjustment in Step 2.
(2 PLACES)
(6 PLACES)
BAIL
figure 4·6. Bai' Rod A'ignment And Adiustment
3
Figure 4·7. Latch Interposers
4.6.3
FILTER SHAFT ALIGNMENT (Factory)
1.
Press the "-" key and rotate the filter shaft (Figure 4-8, item 1) until the
filter shaft vane (Figure 4-8, item 2) touches the end of the "-" key interposer (Figure 4-8, item 3).
2.
Manually release the latch spring under the "-" key interposer (Figure 4-9,
item 1).
3.
Press the "1" key. The end of the "1" key interposer will raise, just touching the forward edge of the filter shaft vane.
4.
Manually release the latch spring under the "1" key interposer.
4-22
5.
If the key interposers do not align with the filter shaft as described above,
move the bearing block (Figure 4-8, item 4) forward or to the rear to correct
alignment.
____ / .-4
2
Figure 4·8. Filter Shaft and /1./1 Key Interposer
2
3
4.6.4
FILTER SHAFT CLEARANCE
5
1.
Press the "1" key.
2.
Press and hold down lightly the "_" key.
3.
Rotate. the filter shaft (Figure 4-8, item 1). The filter shaft vane (Figure
4-8, item 2) should clear the "_" key interposer by approximately .015 inches,
but should never touch (Figure 4-8, item 5).
4.
Repeat the above steps, using the "_" in Step 1 and the "1" in Steps 2 and 3.
5.
If the filter shaft clearance is incorrect, raise or lower either the lefthand or right-hand bearing block to obtain the correct clearance.
4-23
4.6.5
FILTER SHAFT ADJUSTMENT WITH CLUTCH MOUNTED (Factory)
1.
Check the clearance between end of clutch and the right-hand bearing assembly
(Figure 4-4, item 3) for approximately .015 inches.
2.
If the clearance is incorrect, perform the following steps.
3.
Position the filter shaft vane as indicated in Figure 4-9. The filter shaft
vane should be positioned at start of radius (Figure 4-9, item 2) of clutch
arm assembly.
4.
Loosen the two set screws (Figure 4-9, item 5) retaining the backlash cam
on the clutch housing, and move the cam off the clutch housing.
5.
Loosen the two set screws on the clutch housing.
6.
Position the filter shaft for the correct clearance between the clutch
housing and bearing block, as in step 1.
7.
Tighten the two set screws on the clutch housing (Figure 4-9, item 6).
8.
Readjust the backlash cam by performing the Backlash Cam Adjustment procedure
in paragraph 4.6.6.
3
ADJUST FROM
EDGE OF LOBE
figure 4-9. fil'er Shaf, Ad;ustment Wi,h Clutch Mounted
4-24
4.6.6
BACKLASH CAM ADJUSTMENT (Field)
1.
Position the filter shaft as indicated in step 3 of paragraph 4.6.5.
2.
Check the distance from the end of the leaf spring to the edge of the cam
lobe (as shown in Figure 4-9 item 3).
If the cam jaw area is approximately
.10 inch, check that the two cam set screws (Figure 4-9 item 5) are tight,
10ctite has been applied and proceed to step 5.
If the cam jaw area is not
.10 high perform adjustment given in steps 3 and 4.
3.
Loosen two set screws (Figure 4-9 item 5) and adjust cam jaw area to an
approximate .01 inch before the leaf spring latches (Figure 4-9 item 3).
4.
Tighten two set screws (Figure 4-9 item 5) on the cam and loctite.
5.
Loosen the two leaf spring mounting screws (Figure 4-10 item 2) and adjust
the leaf spring to the lower edge of the cam for an approximate .020 inch
bite as shown in Figure 4-10 item 1.
6.
Tighten the two leaf spring mounting screws (Figure 4-10 item 2) and recheck
for .020 bite.
7.
CYcle the clutch 360 0 and check that both cam jaw areas are approximately
.10 inch when the filter shaft vanes are positioned at the start of the
radius of the clutch arm assembly as shown in Figure 4-9 item 3.
If the
cam jaw areas are not equal repeat steps 1 through 4 to obtain approximately
equal cam jaw areas.
8.
Recheck the .020 bite adjustment and repeat steps 5 and 6 if necessary.
figure 4-10.
aaclelash Cam Ad;ustment
4-25
4.6.7
INTERPOSER LATCH SPRING ADJUSTMENT (Factory)
1.
Remove the bail-up stop (Figure 4-6, item 5) on the support bracket.
2.
Press the "H" key.
3.
Using a .020 inch feeler gauge (Figure 4-11, item 1), lift the "H" key interposer (Figure 4-11, item 3) to the top of the guide comb.
4.
Loosen three screws (Figure 4-11, item 4) on the right-hand section of the
latch springs (also referenced in Figure 4-6, item 5.)
5.
Raise or lower this spring section under the "H" key interposer to establish
a .020 inch clearance (Figure 4-11, item 2.)
6.
Tighten the three screws (Figure 4-11, item 4.)
Note
No other adjustment will be made on the
remaining latch springs until adjustment
procedures are completed on the latch
pawl and keeper.
Figure 4-JJ.
4-26
Interposer Latch Spring Ad;ustment
4.6.8
KEEPER ARM AND LATCH PAWL OVERTRAVi:l, AOJlJ ~'fME' i (ndr:}
1.
Rotate the filter shaft t o
(Figure 4-12 , it em 1) .
2.
At th i s p oi n t of travel, l
ing k eeper bracket (Fi~v ~p
3.
4.
~..ove
-
.
l,t',=, 1,(,, "' t "'11
Rot atE\ .tl1-':" fll-"-" ·,'l .. ,f\
1?
~~;q~i.tl~-')
•
t ,-·..t
u~41
'Ie
td~'
t"
t,.,
pol",l
<)'.l~j 1
lsh f'lll1 b
()
the .l a t.ch pawl
I h' t"K' '~\.~r ·!'''s ifi(jllre 4-.12 ,
I t. • '1\1; ), 'I '
':, lil\·" .
~cn
-.2 .
<'
brc1f.f1r~ ,,~ ,.!"It cd r
the kt:!eper
apl?rox imate~'E ~ i}1'
i tern ~,o,$ \(
trav e J~
e sta ~'lJ
';:1
11)~'
In;'(k
,"\"'-."
:
~ , ~',
..!t-.,"
l"'r~l
4 - 12 , item 4 ) of
k0e or arm (Figure 4-12,
['39l<[' ~
\'
~
: i..~.t.c"
t"u l ...:~t("'!~ .. ::·.:.} ..·:
item 2 ) mount-
\' ~t
~~
sh,,,ft- vanes .
"..."fie
"'ee.'p er
arn\ •
This over-
LATCH PAWL CLEARANCE (Field)
4.6.9
1.
Hold slide arm assembly (Figure 4-13, item 1) to prevent excessive movement
of the latch pawl (Figure 4-13, item 2).
2.
Press the "H" key.
3.
Check the vertical clearance (Figure 4-13, item 3) between latch pawl
(Figure 4-13, item 2) and keeper arm (Figure 4-13, item 4) 'for a .008 i.002
inch clearance.
4.
If this clearance is ~ncorrect, loosen the two screws (Figure 4-13, item 5)
mounting the keeper arm, and adjust the keeper arm for correct clearance.
5.
Recheck the adjustment.
4.6.10 COMPLETION OF INTERPOSER LATCH SPRING ADJUSTMENT (Factory)
1.
Press the "_" key.
2.
Release the two right-hand screws on the latch spring.
3.
Adjust the latch spring under the key interposer to maintain the clearance
obtained in Step 3 of paragraph 4.6.9.
4.
Tighten the extreme right-hand screw.
5.
Press the "K" key.
6.
Repeat Step 3.
7.
Tighten the remaining screw.
8.
Loosen the three screws on the left-hand latch
9.
Press the "G" key.
s~ring.
10. Repeat Step 3.
II. Tighten the right screw.
12. Press the "1" key.
13. Repeat Step 3.
14. Tighten left screw.
15. Press the liD" key.
16. Repeat Step 3.
17. Tighten the middle screw.
lB. Check and tighten all screws mounting the switch bracket assembly upon
completion of the adjustment.
4-28
5
figure 4·' 3. latch Pawl Clearance
( c)
TERMINAL
(NC) .
TERMINAL
figure 4-14. Storage: Bar Ad;usting Screws and Microswitches
4-29
CAUTION
Do not readjust the pawl latch on the above
adjustment.
4.6.11 CLEVIS ROD ADJUSTMENT (Fa dory}
1.
Place a .013 inch feeler gauge between the end of latch interposer No. 1
(Figure 4-15, item 2) and its guide comb (Figure 4-15, item 3).
2.
COnnect an ohmmeter to common (C) and normally close (NC) terminals of
microswitch No.1 (Figure 4-14.)
Figure 4-15. Clevis RocI Adjustment
4-30
R3
I
3.
Loosen the 5/32" jam nut on link rod No.1 (Figure 4-15, Item 4).
4.
Using miniature grooved pliers (stock No. 954164) adjust the link rod
(Figure 4-15, Item 5) until the ohmmeter indicates switch contacts open,
(ohmmeter measures open circuit).
5.
Grip the link rod and tighten the jam nut.
6.
Recheck the adjustment by moving the link rod slowly forward and then allow
the latch interposer (Figure 4-15, Item 2) to return slowly against a .013
inch feeler gauge and its respective guide comb (Figure 4-15, Item 3). The
ohmmeter should still indicate switch contacts open.
7.
Again move the link rod forward to its full travel.
8.
Release the link rod, allowing the latch spring to return the link rod.
9.
The ohmmeter should indicate microswitch closing.
closed circuit.)
10.
(Ohmmeter measures
Repeat the above procedure for link rods No.2 through No.7.
4.6.12 SWITCH STORAGE TIME ADJUSTMENT (Field)
CAUTION
Prior to making any adjustments to the
storage bar and microswitches, ensure
that the storage bar, (Figure 4-15,
Item 6), the nylon block (Figure 4-15,
Item 7), and the link rods (Figure
4-15, Item 5) are thoroughly cleaned
of any trace of lubricants or dirt
that could interfere with the free
movement of the storage bar and the
clamping action upon the microswitch
link rods during storage time.
1.
Loosen the two screws (Figure 4-15, Item 8; also referenced in Figure 4-14,
Item 1) mounting the nylon storage block.
2.
Loosen the jam nuts Figure 4-15, Item 9; also referenced in Figure 4-14,
Item 3, and adjust the two screws (Figure 4-15, Item 10) until a .030 inch
clearance is maintained between the switch link rod (Figure 4-15, Item 5)
.No. 1 and No. 7 and the storage bar (Item 6).
3.
Tighten the two screws (Figure 4-15, Item 8).
4.
Plug the keyboard into the viewer assembly.
5.
Connect an oscilloscope to the common (C) terminal of microswitch No. 1
(Figure 4-14).
6.
Turn on the keyboard.
4-31
Figure 4-16. Bail-up Stop Adjustment
7.
By pressing the "A" key; check the oscilloscope for +4.5 volt pulses. Tighten the two adjustment screws down on the bottom flange of the switch bracket
until the pulse is approximately 38 to 48 milliseconds wide. Lock the jam
nuts.
8.
Perform the above procedure on microswitch No.7.
CAUTION
Proper storage shou~d result in near
equal clearance between the switch
link rods and the storage bar. When
the correct storage adjustment has
been completed, tighten the two
screws on the switch plate and the
two jam nuts on the adjustment screw.
9.
Check pulse time on switches 2 through 6.
4.6. 13 REINSTALLATION OF BAIL-UP STOP (Field)
1.
Replace the bail-up stop (Figure 4-6, Item 5) removed in paragraph 4.6.7.
2.
Adjust the bail-up stop to clear the latch bail rod so that it will pull
the latch pawl (Figure 4-16, Item 1) down to accept a bite of 1/2 to 3/4
of the thickness of the keeper arm (Figure 4-16, Item 2).
3.
Tighten the two mounting screws on the bail-up stop (Figure 4-6, Item 5).
4-32
R3
4.7 ELECTRICAL ADJUSTMENTS
Note
I
Card Extender (stock no. 938256) can
be used to facilitate electrical
adjustments and troubleshooting.
The following electrical and electro-mechanical adjustments are to be made as
directed by the preventive maintenance procedures, when required after replacement, or as a maintenance operation.
4.7.1
DEFLECTION AMPLIFIER ADJUSTMENTS (Refer to Figure 4-16A.)
The seven adjustment controls for the Deflection Amplifier (A9) are located in
the front of the Viewer behind the door at the right of the display tube.
-
A9
CONTROLS IN
LEFT COLUMN
ARE FOR THE
DEFLECTION
AMPLIFIER
A9
A8
ASTlG®-
RI02
PICTURE
All
v•• ,
CEN'
R56
'AIGHT
1't12
WI
0
~nJl®
0
@
HOAIZ®
SKEW
0
m~z
@
6
MOAIl CEN
R22
i'
R82
R"~
'0'
V!:!)
6
HORIl@
SCAN
RSo1
YERTGAIN
R31
O VER'@)
i'
® V.R'®
_ " GAIN
VEU@
@
~
i.i
FQCUS
SCAN
"74
R4
"43
~
CONTROLS IN
RIGHT COLUMN
ARE FOR THE
SELECTION
AMPLIFIER
A8
'"
GAIN·
1It14
SKEW
R2Z
VERT@)
r:::.
CEN'
,tiS
figure 4-JU.
.,
•
Maintenance Controls
1.
If characters can be displayed proceed to Step 21 if not, align the
Character Generator section as outlined in Paragraph 4.7.5.
2.
Type the top line full with 54 characters and adjust the length of the line
to 7-7/8 inches using a flat, flexible ruler and the HORIZ GAIN control R4.
3.
Type a character and the return character «<) in each of the 20 lines and
adjust the displayed page height to 6 inches using the VERT GAIN control R39.
4.
Type the last line full of characters. Using the HORIZ CENTER and VERT
CENTER (R22 and R56 respectively) center the displayed message and readjust
the horizontal and vertical gain if necessary.
4-32A
5.
Recheck the vertical and horizontal size of the displayed me,ssage and readjust the horizontal and vertical gain if necessary.
6.
Adjust the FOCUS, BRIGHT, and PICTURE controls for the best presentatlon of
all characters.
4.7.2 VIDEO DRIVER, A12
The only adjustment on the Video Driver circuit board is the FORMAT data
brightness control R53. This adjustment control is varied until the desired
contrast between format data and variable data is reached. It will have no
effect on the brightness of information that is NOT format data and will decrease
the brightness of the format data.
Note that when the BRIGHTNESS control R72 is
set too high, there will be no contrast between the format data and the variable
data, and the format brightness control R53 will be ineffective.
4.7.3
TICKLER DRIVER ADJUSTMENTS, All
The Tickler Driver adjustment controls are located on the Tickler Driver which
is mounted above the CRT. The Tickler Driver adjustment procedure may cause the
overvoltage protection circuit in the Low voltage Power Supply to lock in.
1.
Turn the power off and on to generate a parity error block.
2.
Adjust the tickler GAIN control, R31 (the adjustment to the left when
looking at the front of the Viewer) to obtain a parity error block 0.2 inches
high.
3.
On the Maintenance Panel, center the PICTURE control at mid-range, then
adjust the tickler board COARSE PHASE control, (the adjustment to the right
when looking at the front of the Viewer), R26, to obtain the best formed E,
H, or - characters.
4.7.4
ELECTRICAL ADJUSTMENTS USING LINE MASK (REFER TO DRAWING 932817)
When the 20 line array is being used on the viewer screen, the line mask can be
used to simplify the adjustments for line length, character, or parity error
block size.
Note
When using a new line mask, it may be
necessary to trim the outside clear
acetate border so that the blue area
of the mask fits the bezel opening on
the viewer screen.
Line Length Adjustment
The viewing area of the mask is 5.6 inches by 77/8 inches. One line.of 54
characters can be adjusted horizontally to center in the 7 7/8 inch cutout of
the mask.
4-32B
R3
No',
Maintenance personnel should first
establish the height of the 20 line
raster by adjusting the VERTICAL SCAN
potentiometer R14. The height of
characters or parity blocks can then
be established by adjusting the TICKLER
SCAN control R31. Do NOT attempt to
adjust character size by readjusting
the VERTICAL SCAN potentiometer, R14,
since this will change the vertical
height of the 20 line raster which has
already been set.
Parity Error Block Check
The parity block height of 0.2 inch can be checked by measuring ten percent
(1~1o) above and below either line 10 or line 11.
Vertical Scan Adjustment
When adjusting the height of the letter M for the 0.14 inch measurement, adjust
the VERTICAL SCAN adjust R43 until the letter M fills the dark area of line 10
or line 11.
4.7.5 HIGH VOLTAGE POWER SUPPLY, A13 (Fadory)
The following adjustment procedure requires a high voltage probe and dc voltmeter.
WARNING
Use extreme caution when making the
following measurements and adjustments
as damage to the power supply and
severe electrical shock may occur.
Use a non-conductive tool when making
this adjustment.
CAUTION
Before the RCA DW-297 High Voltgae
Probe is used with a WV-38A multimeter to measure the CRT anode voltage, ensure that the resistor has
been installed in the probe handle.
The resistor must be installed to
extend the range of the meter to
25kV (250V range X100). The probe
stock number is 937524 and the resistor stock number is 937515.
4-33
1.
center the FOCUS control Rl2 at mid-range and adjust potentiometer R4 at the
front of the power supply using a non-conductive tool to obtain +12kV at the
high voltage anode lead on the CRT. Do not adju~t oVer +12kV.
2.
Connect the meter to the high voltage lead going to the monos cope chassis
and adjust trimpot R5 for -1.8kV.
3.
Measure +400 volts at TBl-7 in the High Voltage Power Supply to ensure
proper operation of the High Voltage Power Supply.
4.7.6
CHARACTER GENERATOR ALIGNMENT
The controls to align the character generator section are located on the
Selection Amplifier (9 controls) to the right of the display tube on the front
of the Viewer assembly (2 monoscope controls) and, accessible through the lower
door in the bottom of the front of the Viewer with your palms up. It will also
be helpful to refer to the illustration of the character stencil, Figure 3-18.
1.
Type the characters G @ G and adjust the @ symbol to the center with HORIZ
GAIN control, R14 and HORIZ CENT control R15.
2.
Adjust the VERT SKEW control R22, to place the @ on exactly the same line
as the G characters.
3.
Type the characters # l # and adjust the [
HORIZ skew control, R82.
4.
Adjust the VERT GAIN control R14 and VERT CENT control R15 to place the
[ exactly on the same line as the # sign (centered).
5.
Turn the POWER switch on and off to generate a parity error. The parity
error block should be 0.2 inches high~ if not, refer to Paragraph 4.7.3.
6.
Ensure that the horizontal lines are 7 7/8 inches
Paragraph 4.7.1.
7.
Type an M next to one of the parity errors and adjust the VERT SCAN control
R43 to obtain an M of 0.14 inches high.
8.
Move the mark under the M and adjust the HORIZ SCAN control, R57, so that
the mark extends approximately 10 percent on either side of the M.
9.
Adjust the focus control of the monos cope R4
(the one to the right), the
intensity control of the monos cope Rl, and the ASTIG control RI02 to obtain
the best formed characters.
4.7.7
symbol to the center with the
long~
if not, refer to
DEFLECTION YOKE ALIGNMENT
1.
Remove the covers from the viewer as outlined in Paragraph 4.5.1.
2.
Set
the
the
the
4-34
the POWER switch to "ON". Fill the top line of the viewer screen with
letter "T". Measure from the top of the first and last character to
bezel opening. Unequal measurements indicate the need for alignment of
deflection yoke. Proceed to step 3.
R3
3.
Set the POWER switch to "OFF" and remove the two screws from the rear of
the CRT housing. Disconnect the video driver connector J12 and carefully
slide the housing back until the forward end tab is clear. Tilt the housing
cover to the right side of the Viewer while maintaining slack in the ground
lead from the video board. Prop the housing cover clear of the CRT neck
area.
4.
Mark the yoke and housing tab immediately above with a fine pencil line.
Loosen the yoke clamp screw and rotate the yoke slightly in the direction
necessary to correct tilt observed in step 3. The yoke should be fitted
firmly against the flare of the CRT.
5.
While maintaining this position retighten the yoke clamp screw carefully.
6.
Replace the housing cover and screws.
and repeat step 2.
Reconnect J12 to the Video Driver
INTERLOCK ADJUSTMENT
4.7.8
1.
Remove the rear panel as outlined in Paragraph 4.5.1.
2.
Turn interlock adjustment until Video Data Terminal can only be turned on
when cover is in place.
4.7A TESTING
4.7A.l
BACK·TO.BACK TESTING
The 70/752 VDTlscan be tested back-to-back. The method that is used depends on
whether the 70/752 is a regular type or one with special features. Testing each
of these VDTls is described in the following paragraphs.
Local Operation
When a regular 70/752 (Data Set Operation) is connected to a 70/752 with the
special feature (for Local Operation no Data Set) built in, a normal cable can
be utilized. With this hookup, both of the 70/752 1 s will always have their
Write lights on. This is because the cable pin 13 acts as an "OR" function
connecting both Write lights together.
Normal (Remote) Operation
Testing regular type 70/752 1 s (Data Set Operation) back-to-back is enabled by
using a special cable, which is a modified normal cable. The normal cable is
modified by reworking one of the connectors as follows:
SWap wires on pins 2 and 3.
SWap wires on pins 6 and 20.
Move wire from pin 4 to 15.
Move wire from pin 5 to 15.
Add wire from pin 4 to 5.
Move wire from pin 13 to 14.
TD & RD
DTR & DSR
RS - Blank
CTS - Blank
RS - CTS
WLT - Blank
4-35
R3
When all connections are complete, tag or mark the connector to indicate that it
has been modified. Except for the case described in "Local Operation" above,
this special cable will allow testing 70/752's with all special features except
Station Select. The paragraph below described how to test VDT's with this
feature.
Off-Line Testing
70/752 VDT's with Station Select can be tested off-line by incorporating a few
jumpers in conjunction with the modified special cable. The jumpers are used on
the I/O No. 2 (A2) board to bypass the station select function.
Place one
jumper from Z25 pin 10 to Z33 pin 6, and another from Z37 pin 12 to Zll pin 4.
Install the modified cable as in previous VDT tests. The entire board can now
be checked out, with the exception of the station select gates. If the VDT's
work back-to-back, the problem will probably be with one of these. gates. This
solution can be verified by putting the VDT back on line for a few minutes in
order to check out the station select gates. In the event the units do not work
back-to-back after the above procedure, there will be no need to put the VDT
on-line, as the problem is probably something other than the station select gates.
4.7A.2
TESTING PREAMPLIFIER 2100692·501
This test procedure simulates the engineering test procedure used to test the
VDT preamplifier.
Test Equipment Required
The following test equipment is required.
Note
This test equipment shall be stocked
at Region and District levels.
Oscilloscope, Tektronix 545 or equivalent with lX probe
Signal Generator, H.P. 651A or equivalent
Attenuator, Kay 30-0 db or equivalent
Power Supply, Harrison Lab, or equivalent
Resistor, 100 ohms, 5%, ~W
Resistor, 1kohm, 5%, ~W
Test Jig (Copper Shielded)
Preliminary Procedure
1.
Connect the test equipment as shown in Figure 4-16B.
CAUTION
The +25 volt supply must be turned OFF
when connecting or disconnecting the
unit under test.
4-36
R7
2.
Turn ON the signal generator and adjust the 1.5MHz signal for a 7.0 millivolt
output as displayed on trace A of the Oscilloscope. (Set attenuator at
23 db.)
3.
Before connecting the power supply to the preamp turn it ON and adjust the
power supply output voltage to 25 volts (~5%).
4.
Turn OFF the power supply and connect it to the unit under test as shown in
Figure 4-16B.
Test Procedure
1.
Turn ON the +25 volt power supply and verify that the output is +5 volts.
2.
On Oscilloscope trace B the 1.5 MHz output signal shall be not less than
0.5 volts and shall not exceed 1.25 volts peak-to-peak.
3.
Visually monitor the output signal on trace ~ for a period of 1 minute.
Verify that the amplitude of the output signal did NOT increase more than
10 percent.
4.
With input to the unit under test open, a noise level of 70 millivolts
peak-to-peak should be measured at the output on trace B of the Oscilloscope.
5.
Should the unit fail to meet the above parameters use standard troubleshooting
techniques to isolate the faulty component.
6.
Turn off all test equipment.
7.
Disconnect test unit.
SIGNAL
GENERATOR
1.5 MHz
SCOPE
ATTEN-
t--f+~" UfjT;'BR
t - t - - - - - - f + - - - -__+-<}-A
,.0
UNIT
UNDER
TEST
+2Sv
POWER
SUPPLY
G.. o
Figure 4-16B.
I
Test Equipment Connection
4-36A
R7
4.78 CONVERSION OF DELAY LINE 2188422-2 TO DELAY LINE 2187310-3
NOTE
The following procedure is recommended
for depot use only.
To use delay line 2188422-2, manufactured by Andersen Laboratories, Inc. in the
'10/752 VDT, the following adjustments must be performed for proper operation.
Once the 2188422-2 delay line has been adjusted using the following instructions,
it should be re-marked as 2187310-3.
This procedure consists of two parts: Paragraph 4.7B.2 Detector Threshold Balance
and Paragraph 4.7B.3 Amplifier Gain Adjustment. The detector Threshold Balance
adjustment must always be done first.
NOTE
Both PC boards (No. 1 and No.2) must
be adjusted using this procedure,.
first No. 1 and then No.2. Complete
both the Detector Threshold Balance
and the Amplifier Gain Adjustments on
PC board No.1, and. then repeat the
procedure for PC board No.2.
4.7B.1 TEST EQUIPMENT REQUIRED
Following is a list of the test equipment necessary for the adjustment procedure
for converting delay line 2188422-2 to delay line 2187310-3.
1.
Oscilloscope, Tektronix 545 or equivalent.
2.
Oscilloscope Preamp, Tektronix lAl or equivalent.
3.
Probe Xl, Tektronix P6028 or equivalent.
4.
Probe X10, Tektronix P6006 or equivalent.
5.
Pattern Generator, Data Pulse 202 or equivalent.
6.
Plug-in Output unit, Data Pulse P901 or equivalent.
7.
DC
Power Supply +25 volts .:t2 • 5%.
8.
DC
Power Supply -15 volts .:t2 • 5%.
9.
DC
Power Supply +4 volts .±2.S%.
10. Crystal controlled frequency source 768 KHz .:to.005".
4.7B.2 DETECTOR THRESHOLD BALANCE
1.
Connect the delay line and test equipment as shown in Figure 4-16C.
a continuous ONES pattern into the delay line.
4-36B
Enter
R7
0
SYNC_
"0" SCOPE
1
I"'r-o
C
"A"
DELY'D
BY B
CLOCK
A
Q
B:r
I
I
T9 G
r~OS
I
B
5
Xl PROBE
Xl0PRDBE
LOGIC T.P.'S
r
1,1 8
·15V
-
+4.5V
-"J.:
T
11
D.C. SUPPLIES
3
AMP T.P.
1 18
.1
BD #2
DELAY LINE
MEMORY
BD #1
Figure 4-16C.
2.
+25V
MOO 200 OATA PULSE
GEN.
. .. .... 32
1.
CHAN 1
I
Test Setup
On the PC board being adjusted (Figure 4-16D), place the Xl probe on Analog
Data signal at junction of R4, R7, and C7, place the XIO probe on the
Unclocked Data signal at the junction of R17, R20, and Z1-12. Refer to
schematic diagram 5000-149-5.
~'.r-·-"-"-----r~D=E~~:Y~LI:N~E--'
L__~~~2
.---
____
DE~YLlNE
~:::::::::::::::::I-:I::;-'
1-
~1
~
-
-
I
,
O".NG(
I
....
"'<.
I
DAIVE
I~PUT
Figure 4-16D.
I
Test Points
4-36C
R7
3.
4.
While observing Unclocked Data, reduce signal gain by turning R4(GAIN
clockwi.se until Unclocked Data just starts to f.licker.
ADJ)
If data is only flickering on the high side (Figure 4-16E), turn detector
balance: potentiometer R14 clockwise to obtain as close· to a symmetrical
pulse train as possible. If data is flickering onthe·low side, turn R14
counterclockwise to obtain symmetry.
FLICKERING HIGH SIDE ONLY
UNBALANCED DETECTOR CONDITION
REOUI RES CW ADJUSTMENT OF
DETECTOR POT R-14
J
I
Figure 4-16E.
High Side Flickering
5.
Reduce gain again by turning R4 clockwise until flickering condition occurs.
To obtain symmetry, it may be necessary to further adjust detector potentiometer R14 if flickering condition only occurs on either the high or low
side.
6.
Adjust gain potentiometer R4 and detector R14· alternately until equal
flickering occurs on both high and low side of Unclocked Data simultaneously
(Figure 4-16F).
EOUAL INTENSITY SIMULTANEOUS
FLICKER ON HIGH AND LOW
SIDE OF DATA INDICATES
BALANCED DETECTOR
I
Figure 4-16F.
7.
Correct Flickering
This completes the Detector Threshold Balance adjustments.
Amplifier Gain adjustments for the same PC. board.
Proceed with the
4.78.3 AMPLlFI.ER GAIN ADJUSTMENT
NOTE
The Detector Threshold Balance adjustment must be performed before proceeding with the Amplifier Gain
adjustment.
1.
Connect the delay line and test equipment. as shown in Figure 4-16C.
2.
Enter a single ONE data pattern into the delay line.
3.
Observe the Analog Data signal at the junction of R4, R7, and C7; observe
the Unclocked Data signal at the junction of R17, R20, and ZI-12.
4.
Adjust the Analog Amplitude, using GAIN ADJ R4, so that the Unclocked Data
just begins to flicker.
4-36D
R7
5.
Note the amplitude of Z to C, or the third lobe of the Analoq siqnal (Fiqure
4-16G).
6.
Adjust the gain of R4 so that the
doubled.
7.
This completes the Amplifier Gain adjustment on the PC board being adjusted.
Remember that both PC boards must be adjusted, first No. 1 and then No.2.
z
to C amplitude noted in step 5 is
J
B
,....-.......----z
C
Z
A
B ~
C "
BASELINE
FIRST LOBE
SECOND LOBE
THIRD LOBE
Z TO C OR THI RD LOBE AMPLITUDE
ONLY IS USED TO DETERMINE THRESH·
OLD LEVEL AND AMPLIFIER GAIN SET
Z TO C SHOWN AT APPROXIMATE
LEVEL OF THRESHOLD (STEP 51
Figure 4-16G.
Analog Signal
I
4-36E
4.8 TROUBLESHOOTING
A list of possible Video Data terminal troubles are given in Table 4-1 and 4.2.
Along with these troubles are listed the possible causes and the corrective
action needed to clear the problem. Figures 4-17 through 4-24 contain test
point locations for all the logic boards. Figure 4-25 contains waveforms of
the Video Data Terminal to be used for more detailed troubleshooting.
Note
When troubleshooting the 70/752 VDT, always
verify that the Keyboard is functioning
properly and that the proper characters ASCII
codes are being generated at the Keyboard
before attempting to troubleshoot the Viewer
unit electronics. Refer to Table 4-1 for
Keyboard mechanical problems which can effect
the electrical output of the Keyboard.
Table 4-1.
MALFUNCTION
Keyboard Mechanical Troubleshooting
POSSIBLE CAUSE
CORRECTIVE ACTION
Excessive motor
gear noise
Incorrect DriveTrain adjustment
Perform Drive-Train adjustment
procedure (paragraph 4.6.1)
Continuous
Operation
(erractic cycling)
1. Maladjustment
of Latch Pawl
travel.
1. Perform Keeper Arm and Latch Pawl
2. Maladjustment
2. Perform adjustment of Bail-Up
Stop (paragraph 4.6.13.)
of Bail-Up Stop
3. Latch Bail Rod
not parallel
to Key Interposers.
4. Damaged Inter-
poser Latch
Spring
Keyboard Filter
Shaft fails to
cycle when key is
depressed.
overtravel adjustment
(paragraph 4.6.8.)
3. Perform Bail Rod Alignment and
Adjustment procedure (paragraph
4.6.2)
4. Replace or repair Spring and per-
form Interposer Latch Spring adjustment (paragraph 4.6.7)
5. Clutch Adjustment Set Screws
loose
5. Perform Filter Shaft adjustment
with Clutch mounted (paragraph
1. Improper Latch
1. Perform Latch Pawl clearance pro-
Pawl clearance
2. Maladjustment
of Latch Bail
Rod
4.6.5.)
cedure (paragraph 4.6.9.)
2. Bail Rod Alignment and adjustment
(paragraph 4.6.2)
4-37
Table 4-1.
MALFUNCTION.
Incorrect character
presented on Viewer
Screen (wrong Binary
Code output at Keyboard microswitches.)
Keylever failure to
return to normal
position.
Keyboard Mechanical Troubleshooting (Cont'd) .
POSSIBLE CAUSE
1. Grease on
Storage Bar or
Link Rods or
possible wear
on Storage
Bar.
1. Clean Storage Bar, replace if necessary, and perform Switch. St~rage
Time Adjustment procedure
(paragraph 4.6.12.)
2. Incorrect
Storage Bar
adjustment.
2. Same as above.
3. Incorrect
adjustment of
Clevis on
micro switch
Link Rods.
3. Perform Clevis Link Rod adjustment
procedure (paragraph 4.6.11.)
4. Possible
broken microswitch wire.
4. Repair as needed.
5. Microswitch
failure.
5. Check Bail Rod Alignment (paragraph
4.6.2) replace faulty switch.
Keylever restori~g Reinsert spring on Keylever-front of
leaf spring
keyboard.
Table 4-2.
MALFUNCTION
CORRECTIVE ACTION
Viewer Troubleshooting
POSSIBLE CAUSE
CORRECTIVE ACTION
NOTE: When one clear symptom is not indicated, check the
low-voltage power supply for correct voltages
on the regulator board connector as follows:
.l. Lower the
2. Check pin
3. Check pin
4. Check pin
5. Check pin
l. Fan and keyboard
motor do not
operate.
4-38
door of the low-voltage power supply
16 for +75 :! 2 volts
11 for +25 :! 2.5 volts
14 for +4.5 :! 0.75 volts
9 for -15 ± 1.25 volts
l. Relay Kl not
energized.
l. Close circuit breaker. Check that
rear panel is secure. Verify thi'lt
interlock sw:itch is adjusted properly. (Refer to paragraph 4.7.8)
2. Keyboard Connectors disconnected •.
2. Connect cable.
Table 4·2.
MALFUNCTION
2. WRITE switchindicator not
lighted after
being pressed.
3. No mark in
upper left
corner is
visible.
Viewer Troubleshooting (Confd)
POSSIBLE CAUSE
1. Circuit breaker
CORRECTIVE ACTION
1. Replace -4.5 volt fuse (F1)
in rear not
closed or interlock switch not
closed.
2. Lamp burned
out.
2. Replace lamp.
Faulty deflection
amplifier module,
keyboard filter
module, logic
board, video
driver module ,
tickler driver
module, highvoltage power
supply or Delay
Line.
Depress SCREEN erase switch and master
erase key simultaneously. If mark is
displayed in middle of screen, replace
defle·ction amplifier module A9. If
mark is still not visible check the
following points:
1. Check module A21 pin 31 for logic
pulses (waveform 1) at output of
delay line. If pulses are missing
depress SCREEN erase switch and
master erase key simultaneously
many times. If pulses are still
missing, check input of delay line
for logic pulses at J7-05. If
pulses are present, replace the
delay line. If logic pulses are
still missing, replace logic boards
A6, A5, A4, A3, A2 and A1 in sequence, one at a time.
2. Check video driver module at A12E1 for pulses nominally at +45v.
If +45v pulses are missing, check
module A12 connector pin 6 for
approximately +2.5v pulses. If
the +45v pulses are missing and
+2.5v pulses are present, replace
video driver module A12. If the
+2.5v pulses are missing, replace
tickler driver module All.
3. Check TBl-7 of. the high-voltage
power supply for +400v ~1~;'. If
the +400v !1~;' is present the highvoltage power supply is operating
properly. If the +400v ~1~;' is
missing proceed to the following
steps.
4-39
Table 4.2.
HALFUNCTION
3.
Viewer. Troubleshooting (Cont'p)·
CORRECTIVE ACTION
POSSIBLE CAUSE
.,
4. Check TBl-2 of the high~voltage
power supply for -IV to -2\7.
If a
positive voltage is present replace
the deflection ampl{fier module, A9.1
(Continued)
5. Remove 12KV lead from CRT highvol tage but.ton and verify that a
nominal 12KV is present. (Use hig11voltage probe.)
6.
C~eck TBI-l of the high-voltage
power supply for a 19.2 KHz square
wave.
7. If items (3) or (5) are not present
and items (4) and (6) are present,
replace the high-voltage power
supply.
8. After verifying the above remove
the CRT shield rear cover and verify
that the CRT is warm.
If the CRT
is not warm, disconnect socket from
CRT and check pins 1 and 12 of CRT
for an open filament.
Check pins 1
and 12 of connector for open filament transformer winding.
4. Mark immovable
5. Many marks displayed.
6. Erratic mark
behavior.
4-40
Function switches
partially depressed.
Release switches by pressing.
If
switches still partially depressed, replace matrix switch assembly in keyboard, or repair as required.
Faulty logic
board.
Replace module A4, A3, A2, and A1
in sequence,. one at a time.
1. Function
Switches
partially
depressed.
1. Release switches by pressing.
If
switches still partially depressed,
replace matrix switch assembly in
keyboard, or repair as required.
2. Faulty logic
board.
2. Replace module A4 or A5 or both.
Faulty logic
board.
Replace module A4, AS, or A3, or all
three.
Table 4.2.
MALFUNCTlnN
7. No character
displayed.
Viewer Troubleshooting (Cont'd)
CORRECTIVE ACTION
POSSIBLE CAUSE
Faulty logic
board, highvoltage power
supply, selection
amplifier module,
or monoscope.
1. Verify that monoscope i::; plugged
into connector.
2. Check module A2J, pin 31 and verify
character code is present (refer to
taule 1-1). If character i::; not
present, replace module A3 or A4
or both.
3. Check module A12, pin 7 fO! character unblank (CU) signal. Tt1is
signal will be high for chdracter
presence when typed in by the keyboard. If the unblank signdl is
missing replace module A3.
4. If unblank signal is present, remove cover from monos cope housing
of viewer) and touch preamplifier input with finger to verify
video output chain.
Noise will be
cisplayed in the number of character blocks that characters were
entered. If noise is not displayed,
replace the video preamplifier,
AIDAI or video driver module, A12.
~ear
5. If noise is present but no characters are displayed, check EI of
high-voltage power supply for
-1.8Kv.
If voltage is missing perform REMEDY items (3) through (7)
of SYMPTOM 3.
6. If -1.BKv is present, replace selection amplifier module AB or
module A3 or both.
7. Check that the filament of the
monoscope is functioning.
8. Incorrect
character
displayed.
Keyboard malfunction. Misadjustment of selection
amplifier, or
faulty logic
board.
1. Replace keyboard.
2. Check selection amplifier adjustment (refer to paragraph 4.7).
3. Replace selection amplifier module
AB.
4-41
Table 4·2. . Viewer Troubleshooting (Conrd)
MALFUNCTION
POSSIBLE CAUSE
CORREcTIVE
~2
~CTION
9. Transmit or receive failures:
Faulty logic
board.
Replace module A1 or
or both.
a. XMT switchindicator does
not light when
pressed and ETX
character is
displayed.
Bad write lamp
or button
contact.
Replace write button or reset
WRITE button.
10. Will not erase
line, screen or
character.
Keyboard malfunctions or
faulty logic
board.
Replace module A4 or A3 or both.
Replace Matrix switch assembly
in keyboard.
11. Data insert
not operating.
Faulty logic
board.
Replace module A4 or A3 or both.
12. Mark returns
to top of page
when pressing
MSA switchindicator.
Keyboard malfunctions or
faulty logic
board.
Replace module A4 or matrix switch
assembly in keyboard.
a. Slow or erratic
mark movement.
Faulty logic
Replace module A4
b. Format character not dim as
compared to
normal character.
Misadjustment
or faulty
video driver
board. Faulty
logic board.
1. Check adjustment of video driver
module (refer to J)aragraph 4.,7.2)
b. XMT switchindicator
lighted but
data not being
transmitted to
data set.
c. Will not
receive correct data
during receive.
13. Special features
failures:
2. Replace video driver module A12.
3. Replace module A3 or A4 or Both.
4-42
R3
Table 4·2.
MALFUNCTION
Viewer Troubleshooting (Cont'd)
POSSIBLE CAUSE
CORRECTIVE ACTION
c. Printer will
not operate
when print
switch is
pressed.
Faulty logic
board.
Replace module AI, A2, or A6 or all
three.
d. Cannot transmit or receive
after being
polled.
Faulty logic
board.
Replace module Al or A2 or both.
14. Poor focus
Improper focus
adjustment.
Faulty dynamic
focus module,
high:"voltage
power supply,
or CRT.
Adjust FOCUS (refer to paragraph
5.2.3.
If focus cannot be adJusted replace module A20 or highvoltage power supply or both.
If
focus still cannot be adjusted replace
the G:RT.
15. Character out
of phase
(double image) •
PICTURE control
or tickler
driver module
misadjusted.
Adjust PICTURE control on front panel.
If unable to adjust perform the
tickler driver adjustment (refer to
paragraph 4.7.3.
If still unable
to adjust, replace module All.
16. No horizontal
or vertical
scan.
Faul ty deflection amplifier
module.
Replace module A9.
17. Mark is bright
and character
is illegible.
Improper monoscope adjustment.
Adjust R1 or R4 or both on monoscope
assembly voltage divider A10A2.
18. Characters
shift on
Viewer Screen
1. Faulty High
Voltage
Power Supply
1. Turn the INTENSITY control counterclockwise until characters on
screen are dim. Quickly turn
INTENSITY fully clockwise. When
character shift is observed replace the High Voltage Power
Supply (Unit AI3).
2. Faulty
Selection
Amplifier
2. When no character shift is observed
replace Selection Amplifier
(Unit AS).
Faulty Driver
output stage on
Video Driver.
Replace Q17 on Video Driver (A12).
19. Center bar on
character E is
dim and center
bar of A is
bright.
I
4-43
R3
Table 4-2.
Viewer Troubleshooting (Cont'd.)
. --
MALFUNCTION
20_ Noisy keyboard
microswitch
outputs.
POSSIBLE CAUSE
CORRE.CT:J;VE ACTION
1- Vibration of
bail rods
due to excessive clearance between
bail rods and
key interposers (check
with pencil
eraser) •
2. Faulty
mi croswi t ch.
Perform bail rod adjustment procedure
and all subsequent adjustments.
NorE
Noise outside of the sampling period
can be disregarded.
Replace faulty microswitch.
Note
It is suggested that at sites with
several 70/752 VDT units, two separate
maintenance logs be kept for both the
Viewer Assembly and the Keyboards.
The assemblies should be listed by
serial numbers so that when keyboards
are moved from one viewer to another
as replacements the maintenance
history of each assembly can be monitored for frequency of repetition of
particular problems.
4-44
ASSEM8LY
2fl0695-501\AIl
(COMPONENT
ASSEM8LY
2110696-50I(A2)
SIDE)
(COMPONENT SIDE)
31
31.
I
TRIW(P)60A6A-2
2 CTS(P)60C3-2IRI0)
60B38-1
3
101ll71N) 6086C-I
4
IOMIIIN160848-1
6
IOMI5(0I16083C-1
9
10~6(N18
10M 14(N)35
SA2tN160868-1
10 TRIOMC3IPI60C5A-1
i
II
IOMC3(tP160C5A-1
12 TIOMC(P)60CBA-1
i;;"
59A3A-I
IOC9 (tP)45
6082
\~5.R6)
DTR\P) 45
15
16
--i~
RDATA(N)60CI-2IRtj
17 MCL(N160B78-1
18 IOM9IN)6085B-1
19 +4.5V 60D6-I(R191
60A4 -2 IRI4 ,RI5)CTS- DIP)50
21 IOMI2IN)6084C-I
59A68- 2
82TItP)~2
22 10MIO(N)&084A-1
5983D-2 AT(tP)53
24 XMTSW(N)&OA78-2
59A2-2
IRS,R6) RSIP)55
2& TDATA(N)60C4-2IR8,R9)
60
60
30
70/7S1-Dllt
I/O 110. r ....ic Iofltd (Al} rest 'oi.rs
I/O 110. J ....ic.ofItd (AJ} rest ,.,.
ASSEMBLY
2112706-501(A21
(COMPONENT SIDE)
65838-1 CTS(N)31
65838-1 R DATA (P) 35
65C3(RI0) CTS(P) 40
12 IOMC2(1P) 65C8C-2
14 OTR(P) (R5) 65A3-1
65C3(RI) R DATA(N)45
16 10MCI (IP) 65088-2
17 IOMC3 (I P) 65880 - 2
18 IOMC4(1P) 65A8A- 2
19 T DATA(N)(RB) 65CI-2
65A48-2
NONSEL(N) 53
65C7-2
+4.5\1 55
60
30
70/7112' 0826
figure 4- J9.
4-46
I/O No.2 Logic,
Board With Station ~eledor Special
feature (A1JTest Points
. ,
.
.,
,
"
ASSEMBLY 2110699-501(A3)
(COMPONENT SIDE)
5886C-2
PARITY ERROR (ON)!I
5B88A-2DRR(N)32
58038-2
DLRM·E(lP)33
5
INDEX UNBLANK(lN)5887D-2
6
8RIGHTNESS(lN)5887E-2
8
BUG(N)58BIA-2
9
KB I (P) 58C3B-2
10
CHESW(N)58A48-2
II
KB3(P)58C4B-2
13
KB2(P)58C4D-2
14
K85(P)58C5C-2
15
KB4(P)58C5E-2
17
KB7(P)58C6B-2
19
DRT(N)58A5A-1
20 KB6(P)58C5A-2
21
MSASW(P)58B2A-1
22 DPCIIP)58A8A-1
5888A-1
PECK 53
24 DRLF(ON)58A7A-2
26 RZ
PULSE
58A6A-1
28 KBP(lP)58A4A-1
29 DLRIN(OP)58B2A-2
60
30
DLRR(P)58D8A-2
70/TlZ'DU7
fI,,,,.. 4-20.
..,iner 'o,ic 80ar" (A3) Tes, '0;"'5
4-47
ASSEMBLY 2110697-501(A4)··
(COMPONENT SIDE)
31
·3 KBEN(N)57A5B-1
57D3A~1
OISW(P)57C2A-2
9
LESW(N) 5705A-1
BTD(lP)41
57B6D- 2
5706B-1
4
010(P)42
ADVSW (N)44
45
15
18 BKSPSW(N)5706A-1
19 CRSW(N) 5706B-1
57B6A-1
Oil (N)52
570B-2 WRSW(N)53
58B3A-1 VOW(N)
25 SESW(P)57B3A-1
26 LE(lP)57B7B-1
NOTE:
THE LOGIC BOARD REPLACING
THIS BOARD FOR INSTALLATION
OF THE FORMAT SPECIAL
FEATURE HAS NO TEST POINTS.
27
60
SETMN( N) 57A7A- 2
30
70/752 -DU8
figure 4·21. MarlcAnd Data'nsert .logic B~ard (A4) TeS! Points
4-48
ASSEMBLY 211069B-501(A5)
(COMPONENT SIDE)
5647A-3 MSG(N)31
3 TBB(N)5604A-1
5 TBB(N) 56058-1
7 TBAIP) 56C6A-1
5606B~I
TBA(N)41
17 HOLo(IP)56C7C-3
18 START liP) 56C5B-3
19 WAIT(lP)56C6C-3
20 EOL(N)56B4B-2
26 VSYNC(N) 56B7A-2
27 19.2KHZIN)56B2C-2
2B HSYNC(N)56C8C-2
29 IOBP(P)56A8A-2
60
Fi,ure 4.22.
30 EOP(P)56B6C-2
Tim;ng Log;c Boartl (AS) Test Points
4-49
ASSEMBLY 2112777-50\'(AS')
(COMPONENT SIDE)
31
09B3 (RII)6.144MHz 44
60
30
70/752-0850
figure 4-23.
4-50
Printer Terminator amlOsCillator logic 80';;" (A6) Test Points
ASSEMBLY 2112707(A6)
-
31
70DSA-2 SERIAL 46
DATA TO SE PRINTED
(COMPONENT SIDE)
•
70B2-3(RII)6.144MHZ4S.
70CSB-1 MK/EOL(iP149 •
70C7C-1 PRT(lP)50 •
70B5C-1
PLF (N) 5S
•
70B5A-2 CNT(P)60 •
30
"--
70/7112 '0811
Figure 4-24.
Printer And Oscillator Logic Bo"rd (A6) Test Poillts
4-51
LOCATION:
CH.A - A5,TP-3,5
CH. B - A3, TP-26
SCALE:
HOR. - 1 usee/em
VERT. - CH.A 5V/cm
CH,B 10V/em
SYNC:
INTERNAL
LOCATION:
CH.A - A5, TP-3,5
CH.B - A3, TP-32
SCA LE:
HOR. - 2 usee/em
VERT. - 5V/em
SYNC:
INTERNAL
LOCATI ON:
CH.A - A3,TP-22
CH.B - A5,TP-3,5
SCALE:
HOR. - 2 usee/em
YERT. - 5Y/em
SYNC:
Al2,PIH 6 CONNECTOR
LOCATION:
CH.A - All,Ol3 BASE
CH.B - All,Ol5 BASE
SCALE;
HOR: - 0.5 usee/em
VERT. - CH.A n.5Y/em
CH.B 2V/em
SYNC.
INTERNAL
TBB(N)
CH.A
RZ PULSE
CH. B
ov
ov
TBB(N)
CH.A
ov
DRR(N)
CH.B
ov
DPC(lP)
CH.A
CH.B
ov
TBB(N)
ov
1.53 MHz
TICKLER
1.53 MHz
TICKLER
CH.A
CH.B
:
/\'V, r/\\v I/~(\'~I '/ \\ / \ /',v
'\ '/'\\
/\ f\ /\ , /\, I.!
, ;'\, ,/\
j\,
\ /
/
\j
I
/
'i,ure 4-25. Tr,u"'.sllooting Waveforms (SlIeet , of 3) ,
4-52
"i\ j\(\
1\/\:\1\/
\ /
\,!
\!
\ . / \ ,..l
\ .. /
\ . ,'
\J'
\
'-
LOCATI ON:
CH.A - AII.017 BASE
CH.B - AII.02D COLLECTOR
SCALE:
HOR. - 0.5 usee em
VERT. - CH.A 5V em
CH.B 50V/em
SYNC.
INTERNA L
LOCATION:
CH.A - AII.04 BASE
CH.B - All .06 BASE
SCALE;
HOR. - 0.5 usee em
VERT. - CH.A 10V em
CH. B 2V em
SYNC:
INTERNAL
LOCATION:
CH.A - AII,OS COLLECTOR
CH.B - AII,Q9 BASE
SCA LE:
HOR. - 5 usee 'em
VERT. - 2V'em
SYNC:
INTERNAL
1.53 MHz
TICKLER
1.53 MHz
TICKLE,~
CH.A
CH.B
COIL DRIVE
INPUT TO
TICKLER
TICKLER
VERTICAL
CH.A
CH. B
SCAN
INDEX
MARK
VIDEO
CH.A
ov
ov
CH.B
INDEX
UNBLANK
SYNC
BITS
LOCAT ION:
A21-31 (80TH WAVEFORMS)
UPPER - WITH CHARACTER "A"
LOWER - WITHOUT CHARACTER
SCALE:
HOR. - 10 usee em
VERT. - IV. 'em
SYNC:
INTERNAL
CODE FOR
CH-ARACTER A
INO EX
MAR~
DLMIN(P)
SYNC BITS
INDEX MARK
figure 4·25. Troubleshooting Waveforms (Sheet 2 of 3)
4-53
LOCA TI ON:
A12, PIN 6 CONNECTOR
SCALE:
HOR. - 10 usee/em
VERT. - 0.2V/em
SYNC:
A9,R6S
INDEX MARK FROM VIDEO DRIVER
LOCATION:
AI2,PIN 16 CONNECTOR
SCALE:
HOR. - 10 usee/em
VERT. - 0.2V/em
SYNC:
A9,R6S
ov
VIDEO FROM PREAMP (AlDAl)
INDEX
CHARACTER A MARK
VIDEO
VIDEO
LOCATI ON:
A12 - El
SCALE:
HOR. - 5 usee/em
VERT. - 20V/cm
SYNC:
A9,R6S
USE DELAY AND MU LTI PL I ER
5V
VIDEO TO CRT
figure 4·25. Trou"'eshooting Wayeforms (Sheet 3 of 3)
4-54
4.8.1
DELAY LINE TROUBLESHOOTING
The following troubleshooting procedure is applicable to the delay line manufactured by Laboratory for Electronics schematic, Dwg. No. 2039ACE23; When the
alternate delay line, manufactured by Digital Devices (Dwg. No. 5000-105S) is
used the following procedure may be used as a guide.
Standard Conditions for Troubleshooting
Connector Pin Assignment:
Pin No.
I.
3.
5.
7.
9.
II.
2,4,6,8,10
12 thru 17,18
Function
Ground
-15VDC
Input
+4.5VDC
Output
+25VDC
Not connected
Ground
"a" level: From 0.0 to 0.3 volts
"I" level: From 2.7 to 4.5 volts
Bit width: 520 ~50 nanoseconds at 50% amplitude
Bit Spacing: 1.3 microseconds minimum
Input Signal:
The following order is recommended for troubleshooting:
1.) Voltages and signal at connector; 2.) Driver; 3.) Delay Line; 4.) Amplifier;
5 .) Detector
Delay Line Termination
CAUTION
The output termination (resistor and capacitor
R4 and C3) are mounted on the P.C. board. Because
the output termination can vary from line to line,
always have the terminating components remain with
the delay line. Remove these components from the
P.C. board and tape them to the Delay Line if the
P.C. board must be replaced.
The Delay Line is mounted under the large stainless steel cover and is not to be
disassembled. If the delay line is found to be defective, the complete delay
line assembly must be returned for repair. The black and grey wires are the input wires and the black and .red wires are the output wires.
CAUTION
The
and
was
the
green wire is connected to the case. Up to
including Serial No. 28039 the green wire
black. When there is no green wire, find
ground wire with the resistance meter.
All systems with a serial no. below 28070 will have the input terminating resistor and capacitor (R3, C1) mounted on the P.C. Board. All other units have
these components mounted inside the Delay Line.
4-55
Electrical Test of Transducers
CAUTION
If the signal at the test point is the opposite·
polarity of that in Figure 4-26 reverse the
input or output leads (not both) connected to
the delay line section.
Figure 4·26. 'Delay Line Input Waveform
The anode of CR2 must swing between qround and +25 vdc.
If the anode is at
steady ground level and the cathode of CR2 is at +25 vdc, it indicates that the
iq1llt r.runGdl'c:n coil is open.
Remove the wires from the P. C. board and measure
thp J ~,,3ist(lnce of the input transducers.
It should be 11 ohrns for delay lines
\:£-l t ( ; serial no. 28070 or 7()O ohms to 2K ohms for delay lines with serial numbers
18070 and hiqher.
'The Cl.'~:p'r. volt aJ'.'! of the delay line
CCin be measured with the oscilloscope and
8h1\11.J 11>:, between 1 and 2 millivolts.
If no signal is found, measure the res isi_Clnce of ':1Ie output transducer, which should be about 4') ohms.
If an opf:!n transduce' is found, the complete delay linp. assembly should be returned for repair.
Milke sure the
~;tandard
Test Conditions given in previous paragraph an:
.:.,~t
up.
CAUTION
In case the P.C. board is damaged, it can
replaced with another board.
However, terainating trimming rp.sistors and capacitors If\USt
~r! removed from the old board and must remain
with the delay line and Le mounted on the new
bO"'lrd.
If possible, r~plilce the delay system
(delay line with electrunics) as a complete
unit.
i 'J
Driver
The input signal will cause the base of Ql 'to swing from negative a.5v to positive a.Bv and the collector of 01 from positjve 2<;v t.) av.
If the input transducer is disconnected or defective, the collector will be at Ov. To test the
driver, substitute a lK ohm resistor in place of the input transducer at the
P.C. board.
4-56
The fall time of the negative going edge should be 50 nanoseconds or less.
The rise time of the positive going edge should be 100 nanoseconds or less.
Amplifier
The amplitude of the signal at the test point must be approximately +4
measured from baseline to peak.
The signal to noise ratio must be 3 to 1 or greater. The noise is defined as
every signal outside the main lobe area and measured from the baseline to the
maximum positive noise peak. (Refer to Figure 4-27.)
BASEliNE
Figure 4-27. '. Dela, line rest Point Waveform
If no signal is present, proceed with the following:
1.
Short the input terminals with a clip lead and measure the voltage according
to the following table. All readings should indicate within ±l~fo.
C = Collector; B = Base; E
= Emitter
C
B
E
02
03
04
24
14
14
-1
-1
05
14
a
*
*
*
06
24
14
* These values can vary from negative
*
-1
13.5
0.3 volts to negative 0.6
volts.
2.
Remove the clip lead and measure the signal at the collectors of 03, 04, and
The gain per stage should be about 17. If the gain of one of the stages
is much less than 17, check the decoupling capacitors (C5, and C6, C7 and
ca, or C10 and ell) for that stage.
05.
Detector
With a signal at the test point and no output signal, the Detector must be at
fault. The same AC Signal as at the test point must be present at the junction
of R22 and C14.
4-57
During no-signal periods, the signal baseline level should be 0.35 volts at the
anode and cathode of Tunnel Diode CR3.
During the input pulse, the level must rise to about 0.8 volts at the anode of
CR3.
If this signal is much smaller, CR3 is probably shorted.
larger, 07 is defective.
If this signal is much
With a base-emitter short in 07, the baseline at the Tunnel Diode Anode will be
less than 0.35 volts and the high level will be lower also. The collector of
07 should swing from +1.5 volts to +0.1 volts. If there is no output at Pin 9,
either 08 is defective, or a short external to the delay system exists.
Gain Adjustment
The only adjustment provided is the Gain Control located under the cover, closest
to Pin 18 on the connector.
The Gain Control, R15, must be adjusted while watching the output signal at
Pin 9. With the scope on positive internal triggering, the gain potentiometer
must be rotated until the widths of all output pulses fall within a range of
from 450 nanoseconds to 700 nanoseconds, measured at the 5~~ amplitude points.
Recheck the test point signal level to ensure that the signal level is at least
+3 volts.
4-58
SEalON FIVE
POWER
5.1
LOW VOLTAGE POWER SUPPLY (Refer To Figure 5·1.)
The Low Voltage Power Supply (L.V.P.S.) specifications are listed in Table 5-1.
Table 5·1.
NORMAL
OUTPUT VOLTAGE
5.1.1
MAXIMUM
CURRENT
LVPS Specifications
ADJUSTABLE TO
REMARK
MIN.
MAX.
+75 vdc
0.35 amps
+73v
+77v
+25 vdc
3 amperes
+22.5a
+27.5a
+4.5 vdc
2.5 amps
+3.75a
+5.25a
-15 vdc
2.5 amps
-13.75a -16.25a
6.3 vac
0.6 amps
6.3 vac
0.6 amps
-
-
OVER VOLT protection should
be.set to 1 imi t max. to 5. Ov.
For monoscope, insulated
for 2.5K volts.
-
INPUT POWER REQUIREMENTS
The input power required must be single phase, 48 to 62 Hz. The input transformer primary has seven taps which permit the use of the following ac voltages~
115, 190, 200, 210, 220, 230, or 240 vac.
CAUTION
Before applying input power, check the connection
of the transformer input voltage to ensure that
the proper primary tap has been connected to the
a.c. system voltage on TB 5 terminal 6, (the output
side, pin 1 of relay K1).
The input power is applied through interlock Sl to the control Panel Power
SWitch. The power switch output controls relay K1 which applies power to the
VDT System.
5.1.2
INPUT TRANSFORMER
The L.V.P.S. circuit consists of an input Transformer T1 which contains six
secondary windings. Two windings generate 6.3 vac. The first winding supplies
power to the Viewer CRT filament, while the second winding supplies 6.3 vac to
the monoscope tube filament.
5-1
5.1.3
CONTROLS AND INDICATORS
The Low Voltage POwer Supply circuit breaker, CB1, is located on the rear panel
of the 70/752 Viewer Assembly. An indicating rod extends through the rear panel.
When an overload occurs, the circuit breaker may be reset (after the cause of the
overload has been removed) by pressing the indicator rod when the tripping element
has cooled.
5.1.4
DC RECTIFIERS
The remaining four secondary windings are connected to .four full wave bridge
rectifiers which generate the following d.c. voltages: +75, +25, +4.5 and -15 vdc.
Each of the rectifiers generate a dc output approximately 1.1 times the desired
dc voltage output, to compensate for the voltage drop· in the Refilter on the
rectifier output.
5.1.5
SERIES VOLTAGE REGULATION
The Low Voltage Power Supply contains four series voltage regulators. Since all
four regulators are similar, only the +4.5 volt regulator is explained. The
circuit consists of a series regulator 05, a differential amplifier 011 and 012,
and a triple Darlington amplifier consisting of 06, 9 and10. In addition to the
basic series regulator components, the +4.5 volt circuit contains an overvoltage
protection circuit consisting of a silicon controlled rectifier, CR17, a reference zener CR5, and three amplifiers 017, 18 and 19.
Series Regulator
The filtered output from the rectifier is applied through fuse Fl to the emitter
of the regulator 05. The emitter output of 05 is connected to the output filter
capacitors (C6, 7, and 11) and to the sensing divider for the differential amplifier.
Differential Amplifier
One input to the differential amplifier is connected to ground as a reference
level and the other input i3 connected to the wiper of potentiometer R36 in the
sensing divider.
Note
The reference level in the other three regulators
are referenced to a zener voltage generated by CR2.
~he
output of the differential amplifier is applied to a triple Darlington
amplifier (06, 9, and 10) which controls the base drive of the series regulator,
05.
5-2
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figure 5-2. Astro-Metrix HVPS Schematic (Rev. e, esc, DJ
5-9/10
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10
10
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I
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Figure S-3. Asfro-Mefrix HVPS Schematic (Rev. A an" B)
5-11/12
-
+400v Fill
t
R4
+400v
D.C.
LEVEL
GAIN
CONTROL
AJ)J
TB1
Tl
REGULATED
+400 VOLT
OUTPUT
6
FKOM A5 TIMING CARD
DRIVERS
CR5
TBl
FULL WAVE
RECTIFIER
CR7, 8 ..
9, 10
19.2 KHzH.V. ENABLE
CLAMP
FROM A9
DEFLECTION AMP
H.V.
LEAD
SWEEP FAIL
+12Kv OUTPUT
CAP
+25v
FROM A14 L.V.P.S.
CRl
FROM A14 L.V.P.S.
1--_-;.;1~5:..:v_. ._4~>t_-.-6v REF VOLTAGE
L ________ JI
, .__~~~O~U~T~P~UT~~_~E2'-_ _~
1.5-1.95 Kv
FROM F P FOCUS ADJ R74
FOCUS INPUT
8
+ 55 v
to
+ 400 v
.
GND
4
FROM
2100v
R5
_1800v
TAP
ADJ
t
-1800v
ERROR
AMP
PASS
ELEMENT
-150 TO
-300vdc
-
-1800 VOLT FIB
Pi FILTER
~ WAVE
RECTIFIERL---,---~
GROUND
AMP
CR4
R30
--
FIB
10/fI5l~OfOS
figure 5-4. AMC·M·227 Power Supply, Simplified Bloelc Diagram
5-13/14
Circuit Safety Features
The High Voltage Power Supply is interlocked to the VDT system in two ways to
prevent damage to the Viewer CRT phosphor:
1.
When a clock failure occurs in A5.
2.
When there is a loss of Horizontal Sweep from the Deflection Amplifier, A9.
When either failure occurs, the High Voltage Power Supply outputs are turned off.
Inverter SWitch Drive Frequency (Refer to Figure 5-4)
The 19.2 KHz square wave (H.V. ENABLE) from the AS timing card is used as the
drive frequency for the inverter switch transistors 02 and 013. The inverters
generate opposite phased square waves to drive the push-pull drivers, 09 and OIl,
connected to the transformer's primary. Note that loss of the 19.2 KHz H.V.
ENABLE square wave from the timing card A5 will automatically cause the H.V.P.S.
outputs to drop to zero volts.
Sweep Fail Circuit
The input to the sweep fail transistor, 014, is a negative level~ developed in
the Deflection Amplifier's Horizontal Sweep Circuit (A9), which holds the base
of 014 cut-off during normal operation. When a horizontal sweep failure occurs,
the negative level is no longer generated, and a positive level (through R2) is
applied to the base of 014 turning on the transistor and shorting the output of
02. This inhibits the 19.2 KHz H.V. ENABLE from being applied to the Transformer
Tl, thus cutting off all outputs of the H.V.P.S. unit.
+400 V Regulation Circuit
The +400 v secondary winding of Transformer Tl (pins 6 and B) is connected to a
full wave bridge rectifier consisting of CR7, B, 9, and 10. The +400 v output
of the rectifier is connected to TB1, terminal 7, and is also applied to the
+400 volt regulator Error Amplifier consisting of transistors 01 and 015. The
Error Amplifier is referenced to a temperature compensated zener (CRl) through
the +400 ADJ potentiometer .R4. The output of the +400 volt Error Amplifier
(at 07) is applied to the cathode of a pair of diodes (CR5 and 6), and each of
the diode anodes is connected to the base of one of the transformer primary
driver transistors to control the gain of the drivers by furnishing a dc level,
which controls the amplitude of the square wave current pulses applied to the
primary winding and thus controls the resulting +400 volt dc output.
+12 Kv Regulation
The Transformer T1 is designed so that there is a good coupling efficiency between the +400 secondary winding and the high voltage winding for the +12 kv
(and the -l.B kv). Any change in loading of the 12 kvoutput affects the +400
volt supply output and is corrected for by the +400 volt regulator circuit.
5-15
+12 Kv Rectifier-Filter
The high voltage secondary winding (T1 terminals 1 and 3) produces a peak-to-peak
voltage of 3 kv which is applied to a voltage quadrupler to generate the +12 kv
output. The +12 kv is applied through a capacitive input filter and an R-C output filter, to the output terminal, pin 3 of the High Voltage Rectifier Assembly,
and to the high voltage lead cap.
Focus Output Circuit
The focus output level is generated by a voltage divider which is connected to
the output of the first voltage doubler of the 12 kv voltage quadrupler. Adjustment of the FOCUS OUTPUT potentiometer will vary the output (at terminal E2)
from 1.5 kv to 1.95 kv.
Note that the focus input from the front panel adjust
is connected to the lower end of the divider. This gives the VDT operator a
vernier control that can vary the focus output from zero to +400 volts. A clamp,
diode CR1, located on Terminal Board TB1 prevents the focus input from rising
above +400 volts.
-1800 Volt Rectifier Circuit
The transformer high voltage secondary winding is tapped for a -2100 volt output
(terminals 1 and 2). The -2100 volt tap (Tl-2) is connected to the -f800v halfwave rectifier, CR5, located on the High Voltage Rectifier Assembly No. 600749.
'l'he rectified voltage is applied to a capacitive input pi filter and the resul'.ting -1800 volt level is applied to output terminal E1.
-1800 Volt Regulation
The -1800 volt regulation circuit consists of an error amplifier (Q3 and Q16),
connected to the same reference zener (CR1) used by the +400 v error amplifier.
A divider consisting of R3 through R6 located at the -1800 v output applies a
feedback sample to the error amplifier input at the base of Q3. The -1800 volt
ADJ. potentiometer (R5) also connects the base of 03 to ground and provides an
adjustment of the amount of feedback to 03. The error amplifier output is applied
through 05 to the ground return pass element 08. Variations in the -1800 output
voltage are sensed on the feedback line and the error amplifier controls the conduction of the pass element so that the voltage of the collector of 08 will vary
from -150v to -300v and maintain a constant -1800 volt output at terminal post
E1.
Note
Diode CR12, located across the emitter base
terminals of the error amplifier 016, functions
as short circuit protection for the pass
element 08.
5-16
5.2.3
INSTALLATION
CAUTION
Use extreme caution during handling to ensure
that the components and circuit boards are not
damaged and that wiring is properly routed. The
-1800 volt and focus output leads must be routed
to clear the High Voltage Board by at least the
distance between terminals E1 and E2.
During installation, ensure that the chassis mounting hardware is tightened
securely to make a good ground connection to the VDT chassis.
Adjustments (Factory)
Normally all adjustments shall be made at the factory. Adjustments should be
made by field personnel only when replacement of critical components, such as
the reference zener, causes a large enough change in the output levels that system
performance will be affected.
CAUTION
When performing the +400 v and 12 kv adjustment,
do NOT short the wiper of R4. Use a non-conductive
tool when making the adjustment because the screw
driver slot is connected to the wiper of the
potentiometer.
+400 v and +12 kv Adjustment
CAUTION
Note that the adjustment of the +400 volt supply
also effects the 12 kv output. Do NOT overadjust
the +12 kv output. During adjustment, monitor both
voltage levels simultaneously to ensure against any
overvoltage condition.
While monitoring the +400 and 12 kv outputs, adjust R4, +400 ADJ located on the
High Voltage Regulator Board to obtain a +400 volt output at TB1 pin 7.
Focus Adj'ust (Factory)
1.
Set front panel FOCUS potentiometer R74 at the center of its range.
2.
Adjust FQCUS potentiometer R12, located on the High voltage Rectifier Board
to obtain optimum focus of characters on Viewer screen. (Nominal voltage
at output terminal post E2 should be approximately +1750 volts.)
5-17
3.
Turn front panel FOCUS potentiometer R74 fully counter clockwise.
at E2 should decrease.
4.
Turn front panel FOCUS potentiometer fully clockwise.
E2 should increase.
The voltage
The voltage level at
Note
This will give the VDT operator a vernier adjustment
of the Focus voltage at the front panel.
5.
Adjust the front panel FOCUS potentiometer (R74) for the best presentation
on the viewer screen.
6.
Note that the voltage monitored at Terminal E2 is near mid-range (between
1.5 kv and 1.95 kv).
-1800 Volt Adjustment (Factory)
1.
Monitor the -1800 volt output at Terminal E1.
2.
Adjust the multiturn trimpot R5, -1800 V ADJ, located on the High Voltage
Regulator board to obtain -1800 volts at Terminal E1.
5.2.4
MAINTENANCE
CAUTION
Do not use a cleaning device that may damage the
power supply components.
1.
Dust and other foreign matter shall be removed from the H.V.P.S. by lightly
blowing with an air hose.
2.
Check the supply wire routing and the condition of the insulated High
Voltage leads.
Table 5·5.
MALFUNCTION
No voltage at any of the
H.V.P.S. outputs and
excessive current being
drawn from +25 volt
power supply (greater
than 1.0 amp).
5-18
HVPS Troubleshooting Chart
.CORRECT IVE ACTION
POSSIBLE CAUSE
1 ) Shorted primary driver
transistor on T1
primary input circuit.
1)
Check primary driver
transistors (09 and
011) and inverter
amplifier transistors
010 and 12).
2) No 19.2 KHz drive to
the primary drivers.
2) 'Check inverter swiOtch
transistors (014 and 2).
Table 5·$.
MALFUNCTION
All H.V.P.S. outputs low
or zero.
No load regulation on
all outputs
HVPS Troubleshooting Chart (cont'd.)
POSSIBLE CAUSE
CORRECTIVE ACTION
1) Sweep fail negative
level missing or
positive.
1) Check sweep fail output at Deflection
Amplifier (Unit 9).
2) +25 V or -15 V input
voltages low or zero.
2) Check Low Voltage
Power Supply (Unit A14).
3) Loss of H.V. ENABLE
(19.2 KHz Drive
Frequency) •
3) Check Timing Card, AS,
H.V. ENABLE output.
1) Check three causes
above.
1) Perform appropriate
Corrective Action above.
2) +400 volt regulator
loop problem.
2) Check +400 V regulator
loop with Oscilloscope
for proper signal flow
and voltage levels in
the following sequence:
a. Error Amp (01 & 015)
b. Amplifiers (04,6,7)
c. Switch control
diodes (CR5 and 6)
d. Inverter Switches
(09 and 11)
e. Reference Zener CR1
f. +400 volt rectifier
and filter components (CR7-10,and C1)
No regulation of
-1800 volt output only
(other outputs normal)
1) Ground pass element
(08) failure.
1) Check -1800 volt regulator circuit with
oscilloscope in
following sequence:
a. Error amp (03 and 016)
b. Short circuit protection diode (CR12)
c. Amplifier (05)
d. Ground Return Pass
Element
e. Check -1800 volt
Rectifier (CR4) and
associated filter
(C6 and C7).
5-19
5.3 HIGH VOLTAGE POWER SUPPLY, ITT/IPD KV3214
5.3.1
GENERAL
This sUb-section provides information on the function, installation and operation,
theory and maintenance, of a Multi-Output High Voltage Power Supply. A cbmplete
parts list is included in Appendix B. Maintenance and troubleshooting is described in sufficient detail to enable a service technician to calibrate and perform routine maintenance on the equipment and in case of failure to make an intellignet appraisal and evaluation of the possible source of. malfunction, and to
take appropriate correction measures in the shorte·st possible time.
Description
The ITT/IPD KV3214 Multi-Output High Voltage Power Supply is a completely solid
state device designed to provide accelerating potential for a character monoscope
and display CRT, first anode and cathode bias, and second anode and focus voltage.
Physical Specifications
3.98" High
5.75" Wide
8.44" Long
Electrical Specifications -
(Refer to Table 5- 6 )
Table 5.6.
Electrical Specifications (ITT HVPS)
INPUT POWER
Voltage
dc (±2%)
Peak to Peak
Ripple (mv)
+25
-15
+75
Maximum
CUrrent (Al
100
100
100
0.8
0.05
0.01
INPUT SIGNAL
Signal Waveform:
Frequency:
Square wave, symmetrical within 0.5%.
19.2KHz
Z
0.3%.
Amplitude: +2.7v minimum amplitude with a driving source capable
of delivering at least 1.0ma.
Sweep Failure: With +O.7v minimum all outputs will collapse to
Ov Z 5% of nominal voltage.
Focus Input:
5-20
+55 to +400v with a minimum input resistance of lOOK ohms.
output Signals - (Refer to Table 5-7 )
Table 5·7.
Output Signals (ITT HVPS)
MONOSCOPE ACCELERATING POTENTIAL
Voltage: -1800 volts nominal, adjustable to within 1% of nominal.
Current:
1ma ± 2~~ at a voltage of 1800v (no transient loading).
Regulation, Ripple and Drift: The sum of regulation, ripple and
30 day drift is less than ± 0.4%.
FIRST ANODE AND CATHODE BIAS
Voltage:
+400v ±S%
Current:
1.0ma Zl~~
Regulation and Ripple:
than ± 1.5%.
The sum of regulation and ripple is less
SECOND ANODE
Voltage:
+12kv ± 5%
CUrrent:
10 to 40ua average including regulation plus leakage.
Regulation, Ripple and Drift: The sum of regulation ripple and 10
hour drift is less than 0.625% (applies over the temperature range
21 0 C to 3S0 C).
FOCUS
Voltage: +1750v nominal, adjustable over a range of ± 250v from
nominal (adjustment range should be measured with focus input set
at +17Sv).
Current:
Will not accommodate loading other than leakage.
Environmental - (Refer to Table 5- 8 )
Table 5·8.
Environmental Specifications (In HVSP)
ALTITUDE
Operating - Sea level to 7,500 feet.
Non Operating - Sea level to 12,000 feet.
5-21
Table 5·8.
Environmental Specifications (ITT HVSP) (confd.)
AMBIENT TEMPERATURE
Operating - +SoC to S5 0 C
Non Operating - -lBoC to +65 0 C
VIBRATION
Operating - 5-35.5cps @ .060" DA
Non Operating - 35.5 - 300 cps @ 1.56 Gs
SHOCK
IG for 11 + 1 millisecond
5.3.2
INSPECTION
After unpacking the unit from its shipping carton, inspect for damage. Remove
the perforated cover and inspect the unit in accordance with the following
procedure:
1.
Visually inspect transformer pies and circuit boards for damage.
2.
Inspect to see that transistor heat sionks are in place and not touching
each other.
3.
Inspect all screw terminals for loose or missing screws.
If a screw is
missing be sure it is not in the internal part of the unit before applying
power.
5.3.3
OPERATION (Refer To Figure 5·5.)
Signal Input
The 19.2KHz square wave HV ENABLE input from unit AS is amplifier by 07 and
emitter follower coupled by OB to the driver transformer Tl. The driver transformer provides a push-pull Signal to the output transformer T2. The secondaries
of the output transformer, in conjunction with the rectifiers, provides the dc
voltage for the +400, -lBOO, and +12kv regulators.
12Kv Supply
The 12kv is obtained from a half wave voltage quadrupler consisting of C10, C1I,
C12, C13 and CR7, CRB, CR9, CR10. The base voltage of 021 is established by
the zener CR2 and is compared against the base voltage of 020. The base voltage
of 020 is obtained from a divider R3B, R39, R41 and R42 with 019 providing the
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TO/7112 'DMO
figure 5-5. ITT HVPS Schematic
5-23/24
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RCA #2187577
TBl-8
Focus
Input
4"
~_____~~~
.>
OJ. l.8m
1 meq~
..
JOHN FLUKE
ELECTRO-STATIC
VOLTMETER
~ 450K
Model ESD
VOM
~
~
Model MX 202A
560K
.:~ 240K
70/712-1855
figure 5·6. ITT HVPS Bench Test Set.Up
5-28
Model 825A
R6
The power supply theory originally on
pages 5-29 thru 5-36 has been deleted
and the 2166024-503 supply theory is
now covered in the power supply manual
70-01-SPS.
I
5-29/5-30
SEOION SIX
TOOLS AND TEST EQUIPMENT
6.1
GENERAL
Due to servicing philosophies and the nature of the Model 70/752, two sets of
test equipment are required: one for Field Maintenance and one for the Maintenance Center. The Field Maintanance test equipment will consist of portable
test equipment (Table 6-1). The Maintenance Center test and repair equipment
will consist of standard test equipment (Table 6-2).
6.2 TEST EQUIPMENT CALIBRATION FREQUENCY
The test equipment used should be regularly calibrated to assure the accuracy
of measurements. The oscilloscope used, should be calibrated every 6 months
or every 500 operating hours. This frequency of calibration will assure sweep
frequency measurements within ±3 percent and voltage calibration accuracies of
~3 percent on the Tektronix types 531, 535, or 561A and ~1 percent on the
Tektronix type 435 oscilloscope.
The mu1timeter should also be calibrated every 6 months to assure accuracies
within ~3 percent of full scale DC voltages and currents, ~3 percent of exact
resistance measurement readings.
The oscilloscope probes are to be calibrated each time they are used with the
Voltage Calibrator on the front of the oscilloscope.
TABLE 6--1.
FIELD MAINTENANCE RECOMMENDED TEST EQUIPMENT AND TOOLS
Oscilloscope Tektronix Type 453: includes two foot 10xprobes (2254-091)
High Voltage Probe, RCA, WG-297 and Resistor WG-211A
Mu1timeter or VOM, RCA, WV-38A (2428-042)
Extraction Tool, AMP, B810992-1
Nut driver - 1/4 inch
Nut driver - 3/16 inch
Screw driver - 6 inches
Needle nose pliers
Water pump pliers - 3 inches (Channel Locks)
Open end wrench - 5/16 inch
Open end wrench - 5/32 inch
Long tweezer - 6 inches
Feeler gauge set - .008, .013, .020, .025
6-1
TABLE 6·2. MAINTENANCE CENTER RECOMMENDED TEST EQUIPMENT AND TOOLS
MODEL
EQUIPMENT/TOOL
Oscilloscope
Tektronix Type 453
Scope Cart
Atlantis Model A
Test Probes (2)
Tektronix Type P6006,
PT#010-0160-00, BNCconnector
High Voltage Probe
RCA, WG-297 and Resistor WG-2l1A
Multimeter or VOM
RCA, WV-38A
Extraction Tool
AMP, B 810992-1
Nut driver - 1/4 inch
Nut driver - 3/16 inch
Screw driver - 6 inches
Needle nose pliers
Water pump pliers - 3 inches
(Channel Locks)
Open end wrench - 5/16 inch
Open end wrench - 5/32 inch
Long tweezer - 6 inches
Feeler gauge set - .008,
.013, .020, .025
6-2
UR9
APPENDIX A
ILLUSTRATED PARTS BREAKDOWN
Ai
UR9
ILLUSTRATIONS
1.
2.
2 A.
2 B.
2 C.
2 D.
2 E.
2 F.
2 G.
2 H.
2 I.
2 J.
2 K.
2 L.
2 M.
3.
4.
5.
6.
7.
B.
9.
10.
11.
12.
13.
14.
15.
16.
17.
lB.
19.
20.
21.
22.
23.
24.
25.
26.
27.
2B.
29.
Ali
701752 Video Data Terminal
Control Panel Assembly
Control Panel Chassis . . . .
Keyboard Assy . . . . . . .
Clutch and Filter Shaft Assy; Anti-Backlash Spring
Slide and Keeper Assy . . . . . . .
Key Lever and Key Interposer Assy
Bail Rod Assy . . . . . . . . . .
Latch Interposers and Link Assy ..
Storage Bar and Microswitch Assy .
Key Lever Hardware and Leaf Switches
Selector Compensator Interlock
Shift Mechanism .. , . . . . . . . . .
Space Bar Assy . . . . . . . . . . . . .
Keycaps (Buttons) for Standard Keyboard
701752 Video Data Terminal Data Set Cable Assembly
701752 Video Data Terminal Viewer Assembly
Input/Output No.1 Logic Module Assembly
Input/Output No.2 Logic Module Assembly
Register Logic Module Assembly
Mark Logic Module Assembly . . . . . . .
Timing Logic Module Assembly . . . . . .
Oscillator and Printer Terminator Module Assembly
Selection Amplifier Module Assembly
Deflection Amplifier Module Assembly
Monoscope Assembly . . . . . . . .
Monoscope Pre Amplifier Assembly
Tickler Driver Module Assembly ..
Video Driver Module Assembly . . .
Low Voltage Power Supply Assembly
Low Voltage Power Supply Regulator Assembly
Dynamic Focus Module Assembly
Keyboard Filter Module Assembly
Station Selection Module Assembly
Mark Format Module Assembly ..
Printer Adapter Module Assembly
Keyboard Extension Cable Assembly SF 5713
RCA High Voltage Power Supply, A13
Al Module Assy., High Voltage Driver .. .
A2 Module Assy., -l.B Kv Regulator . . . .
A3 Module Assy., 12 Kv Reg/Sync Converter
A4 Module Assy., High Voltage Focus . . .
· Aii
· A2
· A4
· A6
· AB
. ABA
ABB
ABF
.ABI
ABJ
ABL
. ABO
ABP
ABS
ABT
· A9
Al0
A22
A24
A26
A2B
A30
A32
A34
A40
A46
A4B
A50
A56
A60
A6B
A74
A76
A7B
ABO
AB2
AB5
AB6
ABB
A90
A92
A94
UR9
ILLUSTRATIONS (Contd)
30.
31.
32.
A5 Module Assy., Transformer Interface ..
A6 Module Assy., Low Voltage Interface .
A7 Module Assy., High Voltage Multiplier .
A95
A96
A97
I
TABLE
1.
I nterposing Coding
. . . . . . . . . . . . . . . . . . ABE
Alii
I
UR9
Ai"
R5
FIG. &
INDEX
NUMBER
1-
-1
-2
-3
DESCRIPTION
70/752 VIDEO DATA TERMINAL, 60 Hz, STD COLOR
70/752 VIDEO DATA TERMINAL, 50 Hz
70/752 VIDEO DATA TERMINAL, 50 Hz (ENGLISH
ELECTRIC)
70/752 VIDEO DATA TERMINAL, 50 Hz (SIEMENS
HALSI
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
SHIFT
KEY
PRESSED
1
1
o
~
SHIFT
KEY
PRESSED
..J
«
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
1
0
1
1
1
1
1
1
1
1
iJ
0
SHIFT
KEY
PRESSED
1
1
A8E
RS
(SCREW END CR1MPED)
10!lSZ · P441
Figure 2F. Bail Rod Assy
I
A8F
R!
FIG. &
INDEX
NUMBER
2F- 1
- 2
- 3
- 4
- 5
- 6
- 7
- 8
- 9
-10
DESCRIPTION
BAIL ROD ASSY
SIDE PLATE, 7 BAIL LEFT
BAIL CHECK NO. 7 (BAIL ROD)
• STOP, INTERPOSER BAIL
• SCREW, DAMPER
• DAMPER, CYCLE BAIL
• SPRING, DAMPER
BAIL, CYCLE CLUTCH (LATCH BAIL ROD)
SIDE PLATE, 7 BAIL RIGHT
SCREW, BAIL PLATE
BAIL ROD, SELECTION (NOS. 1 THRU 6)
·
··· ·· ··
·· ··
·· ·· ·
· ·· ··
···
DRAWING OR
PART NUMBER
2187321-2
2187321-4
IBM1133579
2187321-9
IBH1134768
IBM1134831
IBM1123556
2144517-1
IBM1l27733
IBM1l23961
RCA STOCK
NUMBER
301928-
QTY. Nons
1
1
1
2
2
2
1
1
2
6
4'46/101
ABG/ABH
R5
,.
•
(
•
Figure 2G. Latch Interposers and Link Assy
FIG. &
INDEX
NUMBER
2G-
-
1
2
- 3
- 4
- 5
- 6
- 7
- 8
- 9
-10
-11
-12
-13
-14
DESCRIPTION
LATCH INTERPOSERS AND LINK ASSY
BRACKET, INTERPOSER MTG (GUIDE COMB)
SPRING, LATCH
INTERPOSER, LATCH (NO. 7)
CLEVIS, PIN
BUSHING, CLEVIS (NYLON)
NUT, HEX (NO. 2-64)
LINK, LATCH (CLEVIS ROD)
INTERPOSER, LATCH (NO. 6)
INTERPOSER, LATCH (NO. 5)
INTERPOSER, LATCH (NO. 4)
INTERPOSER, LATCH (NO. 3)
INTERPOSER, LATCH (NO. 2)
INTERPOSER. LATCH (NO. 1)
SCREW
· ·
·
·
··
·
··
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
DRAWING OR
PART NUMBER
IBM1141382
2187393-1
2187321-5
2187321-8
2173676-1
2187574-1
2144116-1
1141379 (18M
1141378 (IBM
1141377(IBM
1141376(IBM
1141375 (IBM
1141374(IBM
IHM1164576
RCA STOCK
NUMBER
301916
305643
301930
301908
#1)
#3)
#7)
#4)
#6)
#5)
301920
305847
305846
305845
305844
305843
305842
QTY. Nons
1
7
1
7
7
7
7
1
1
1
1
1
1
1
A81
RS
END VIEW
(Cut-A-Way)
I
Figure 2H. Storage Bar and Microswitch Assy
A81
R5 .
FIG. &
INDEX
NUMBER
2H-
1
2
3
4
5
DESCRIPTION
STORAGE BAR AND MICROSWITCH ASSY
SHAFT, SPACER (11.29 LG)
• GUIDE, RETURN DELAY (RH)
SPRING, TORSION (RH)
• RING, RETAINING
• ARM, RETURN DELAY
·· ·· ·
···
· ··
·
NOTE:
- 6
- 7
- 8
- 9
-10
-11
2144539-1
2173685-2
2144168-1
93605-106
2173684-1
RCA STOCK
NUMBER
301182
301910
252983
304893
QTY.• NOTES
1
1
1
4
2
WHEN EITHER THE PLATE ASSEMBLY (STORAGE
BAR), ITEM 6 OR THE GUIDE (STORAGE
BLOCK), ITEM 7 SHOW SUFFICIENT WEAR TO
WARRANT REPLACEMENT, BOTH PARTS SHOULD
BE REPLACED AT THE SAME TIME TO ENSURE
PROPER OPERATION.
PLATE ASSY (STORAGE BAR)
· · •• GUIDE
(STORAGE BLOCK)
· ·· • NUT, PLATE
·· · SWITCH ASSY, MICRO (STORAGE) Sl THRU S7
MTG (6-32 x 0.5 LG)
·· ··· •• SCREW,
BRACKET, SWITCH ASSY MTG (KEYBOARD
SN 1001-2000)
SWITCH ASSY MTG (KEYBOARD
· · · SNBRACKET,
2001 AND
SCREW, THO FORMING (2-56 x 0.25 LG)
· • NUT,
HEX (NO. 6-32)
·· ··· ·• SCREW,
ADJ (NO. 6-32 x 1.0 LG)
SCREW, PLATE MTG
·· ·· ·• SPRING, TORSION (LH)
RETURN DELAY (LH)
· · •• GUIDE,
SCREW (NO. 2-56 x 0.25 LG)
·· ·· • SCREW, PAN HO (NO. 6-32 x 0.50 LG)
up)
-12
-13
-14
-15
-16
-17
-18
-19
DRAWING OR
PART NUMBER
2173686-501
2144542-1
2173687-1
2144111-501
990386-113
307620
308187
307546
2144541-1
2144541-2
2187254-601
57435-104
990386-121
2187254-2
2144168-2
2173685-1
2187254-601
990386-113
1
1
1
7
2
1
308487
103891
301911
308487
1
14
2
2
2
1
1
4
2
.1.1/101
I
ASK
RS
P446
2............. /
~.
8
1
./
•
Figure 21. Key Lever Hardware and Leaf Switches
A8L
J~
R5
~.
Figure 2J. Selector Compensator
Interlock
.
---------------~---
_~N~U::MBE=R~_t--_r---
------,------~~~~--RCASTOCK
DESCRIPTION
SELECTOR COMPENSATOR INTERLOCK
. • PLUNGER MPENSATOR
•.
BALL, CO T
• •
SE
•
• SCREW, OMPENSATOR
• TUBE, C LAT HD
SCREW, FUlCRUM
•
T F ,
• SPACER,
SUPPOR • COMPENSATOR
• PLATE ABSY
• • : NUT
•
· ..
SCREW
18M11246B2
IBM1141B60
307950
IBM1l349BB
IBM1l349B7
IBM3B214
IBM11645B3
302642
ABO
RS
1· . 4 / ' 1
( (1 / (~ ~ · ~4~4
.
2K . Shift Mechanism
Figure
A8P
R5 ,
FIG. &
INDEX
NUMBER
2K- 1
- 2
- 3
- 4
- 5
- 6
- 7
- 8
- 9
-10
-11
-12
-13
-14
...:15
-16
-17
-18
-19
-20
-21
-22
-23
-24
DESCRIPTION
SHIFT MECHANISM
KEY LEVER ASSY, LH
SPACER
• RING, RETAINING
• BAR ASSY, SHIFT
• KEY LEVER ASSY, RH
RETAINER, SHAFT
• KEY BUTTON, RH SHIFT LEVER (GRAY)
RETAINER, CLIP
BAIL, SHIFT
SPRING, KEY LEVER, RH
• SLEEVE, SHIFT KEY LEVER
SPRING, SHIFT LOCK
• KEY BUTTON, LH SHIFT LEVER (GRAY)
KEY BUTTON, LH SHIFT LEVER (GRAY)
• SPRING, KEY LEVER, LH
• BELL CRANK, LOW VELOCITY
SCREW
.NUT
CLEVIS, PIN
• LINK SHIFT
BELL CRANK (BAIL)
NUT
• SCREW
WASHER
···
···
·· ··
··
···
··
···
···
·· ·· ·
···
··
···
··
··
···
· '.
···
··
··
·· ·· ··
···
DRAWING OR
PART NUMBER
IBM1133685
IBM1132013
2187798-1
2165971-501
IBM1133672
IBM1133593
IBM1l32252
IBM1l8361
IBM1132235
IBM150735
IBM1141269
IBM1074242
IBM1132226
IBM1l32259
IBM1090404
IBM1141835
IBM38566
IBM1142264
2187321-8
2149820-1
IBM1l24285
' IBM1134829
IBM1928
82278-105
RCA STOCK
NUMBER
302636
301789
259506
301930
301922
QTY. NOTES
1
1
1
1
1
1
1
1
1
1
2
1
1
1
1
1
1
1
2
1
1
1
1
1
A80/ABR
RS
12
70/752,0409
,
7=
-------
n~J
I
_J-..7
,l! ~
10
I
Figure 2L. Space Bar Assy
FIG. &
INDEX
NUMBER
2L-
-
1
2
3
4
5
- 6
- 7
- 8
-
- 9
-10
-11
-12
-13
DESCRIPTION
SPACE BAR ASSY
KEY BUTTON, SPACE BAR (GRAY)
SHAFT, SPACE BAR
KEY LEVER, SPACE BAR
RING, RETAINING
NUT, SHAFT SCREW
SCREW, SPACE BAR SHAFT
SPRING, SPACE BAR RETURN
BAIL, REPEAT
BRACKET, SPACE BAR SUPPORT
SCREW, SPRING, MTG
LINK, SPACE BAR GUIDE
STEM, SPACE BAR
STEM, LH
· ·
··
·
·
··
··
··
··
···
··
··
·
·
·
·
·
·
DRAWING OR
PART NUMBER
IBM1269422
2144539-1
2144140-1
2187798-1
IBM38051
IBM1123987
IBM15073,)
IBM1164467
IBM1164366
IBM1164579
IBM1164425
IBMl164427
IBMl134899
RCA STOCK
NUMBER
301182
301181
301789
QTY. NOTES
1
1
1
2
1
1
1
1
1
2
1
1
1
A8S
RS
. 38 SHIFT
1
70/752' 0 412
•
Figure 2M. Keycaps (Buttons) for Standard Keyboard
A8T
R5
FIG. &
INDEX
NUMBER
2M- 1
- 2
- 3
- 4
- 5
- 6
- 7
- 8
- 9
-10
-11
-12
-13
-14
-15
-16
-17
-18
-19
-20
-21
-22
-23
-24
-25
-26
-27
-28
-29
-30
-31
-32
-33
-34
-35
-36
-37
-38
-39
-40
-41
-42
:43
-44
-45
-46
-47
-48
-49
-50
DESCRIPTION
KEYCAPS (BUTTONS) FOR STANDARD KEYBOARD
~ (CAP, KEY MASTER ERASE)
+/1
"/2
#/3
$/4
%/5
&/6
'/7
(/8
)/9
0
*/:
=/BACK SPACE
Q
W
E
R
T
Y
U
I
2144151-1
IBM1197152
IBM1l24898
IBM1~24899
IBM1l24900
IBM1133318
IBM1133909
IBM1l33071
IBM1179891
IBM1197153
IBM1124450
IBMl133274
IBM1l24957
IBM1l33329
IBM1124959
IBM1133278
IBM1124961
IBM1124962
IBM1124963
Il')M1158126
IBM1179893
IBM1l97154
IBM1132266
IBM1133285
IBM1127612
IBM1127613
IBM1127614
IBM1l33337
IBM1127616
IBM1133291
IBM1179895
IBM1133293
RCA STOCK
NUMBER
QTY. NOTES
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
SHIFT (CAP, KEY SHIFT, RH)
KEYCAP (BUTTON), SPACE BAR (GRAY)
2144131-2
IBM1132259
IBM1133296
IBM1133342
IBM1133298
IBM1133343
IBM1127665
IBM1197573
IBM1133841
IBM1179899
IBM1179900
IBM1l27670
IBM1132252
IBM1269422
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
BLANK KEYCAPS (BUTTONS)
ROW 1
ROW 2
ROW 3
ROW 4
BACK SPACE
LOCK
SHIFT (RH)
SHIFT (LH)
IBM1133801
IBM1133802
IBM1133803
IaM1133804
IBM1133811
IBM1133810
IBMl127930
IBMll;17936
1
1
1
1
1
1
1
1
2187321-21
2187321-22
2187321-23
2187321-24
1
1
1
1
n~n;t;~
t
0
@/p
.J
LOCK
A
S
D
F
G
H
J
flK
L
+/;
«
(CAP, KEY CONTROL)
SHIFT (CAP, KEY SHIFT, LH)
Z
X
C
V
B
X/N
liM
/.
1//
SPECIAL KEYCAPS (BUTTONS) FOR EXPORT UNITS
£/1 (BRITISH POUND)
-YK
I/M
-/N
856-501
301053
1
990106-107
93618-107
82278-104
211587
QTY. NOTES
---*---35
• MODULE ASSY., KEYBOARD FILTER
(SEE FIGURE 20)
ATTACHING PARTS
• SCREW, PAN HD (NO. 6-32 x 0.31 LG)
• WASHER, LOCK (NO.6)
• WASHER, FLAT (NO.6)
4
4
4
---*---36
-37
SCREW, THREAD FORMING (NO. 10-32 x 0.37 LG)
WASHER, EXT TOOTH LOCK (NO. 10)
• WASHER, EXT TOOTH LOCK (NO. 10)
• COVER, DUST
ATTACHING PARTS
• SCREW, THREAD FORMING (NO. 4-40 x 0.25 LG)
2187254-302
93610-112
93618-112
2144500-2
2187254-1
2
2
97178
308486
2
1
10
---*---38
-39
• RETAINER, CABLE
CLAMP, LOOP
ATTACHING PARTS
SCREW, THREAD FORMING (NO. 6-32 x 0.25 LG)
2144195-1
8811154-6
1
1
. 2187254-101
2
•
---*---40
-41
• CABLE ABSY., KEYBOARD
MONOSCOPE ASSY. (SEE FIGURE 13)
ATTACHING PARTS
• SCREW, PAN HD (NO. 6-32 x 0.31 LG)
WASHER, EXT TOOTH LOCK (NO.6)
• SCREW, FLAT HD (NO. 6-32 x 0.37 LG)
2144194-501
2110691-501
308484
1
1
990106-107
93610-107
8924639-109
3
3
1
---*---42
-43
• COVER, SHIELD REAR
• COVER, SHIELD FRONT
ATTACHING PARTS
• SCREW, THREAD FORMING (NO. 4-40 x 0.25 LG)
2144552-501
2144551-501
2187254-1
1
1
308486
4
---*---44
-45
• BRACKET, FRONT
• BRACKET, REAR
ATTACHING PARTS
• SCREW, THREAD FORMING (NO. 6-32 x 0.25 LG)
• SCREW, SHOULDER
• WASHER
2144129-1
2144130-1
1
1
4
2187254-101
1021856-7
2187515-4
2
2
---*---46
-47
-48
GROMMET
• GROMMET
• YOKE, DEFLECTION
57421-1
57421-30
2187326-1
73155
52266
267000
1
2187325-1
2187562-1
2144549-1
2144550-1
2144573-1
2144122-1
2144124-1
2144507-501
266995
1
267673
1
1
4
4
1
2
1
CAUTION
Before replacing the deflection YOke,
check the serial number of the associated deflection amplifier in the VDT.
For deflection amplifiers serial numbers
0135 and below, the following resistors
must be replaced with the values indicated on Page A43 before the amplifier
is used. Replace resistor R8 with IPB
Figure 12. Item 27. Replace resistors
R5 and R39 with IPB Figure 12, Item 32.
-49
-50
-51
-52
-53
-54
-55
-56
•
•
•
•
•
•
•
•
TUBE, CATHODE RAY
SOCKET, CATHODE RAY TUBE
WIRE, CRT MOUNT
CLIP, CRT MOUNT
CUSHION, CRT MOUNT
SPRING, CRT RETAINING
SPRING, GROUND STRAP
STRAP CRT GROUND
1
1
4141 107
A19
FIG. &
INDEX
NUMBER
4-
-57
DESCRIPTION
··
-60
-61
-62
-67
·
·
· ·
·
··
·· ·
-68
-69
-70
484&/107
A20
x 0.32 LG)
x 0.38 LG)
SPRING, DOOR
ATTACHING PARTS
SCREW, THREAD FORMING (NO. 8-32 x 0.25 LG
(USED WITH UPPER DOOR)
SCREW, THREAD FORMING (NO. 6-32 x 0.25 LG
(USED WITH LOWER DOOR)
---*---
NAMEPLATE ABSY.
STRIP, RUBBER (TUBE BUMPER)
BEZEL
BEZEL
SHIELD
ATTACHING PARTS
SCREW, THREAD FORMING (NO. 8-32 x 0.25 LG
SCREW, THREAD FORMING (NO. 6-32 x 0.25 LG
2
2
267799
3
8
990248-115
8
2110682-501
2110682-502
2110682-503
2110682_504
2144174-1
2144127-1
1
1
1
1
1
1
990102-107
82278-102
93618-103
2
2
2
2144505-1
2144506-1
1
1
2187753-1
305987
4
990108-609
82278-605
2144128-1
97877
1
1
4
2187254-201
2
2187254-101
2
2144555-501
2187624-1
2144504-1
2144504-2
2144548-501
1
1
1
1
1
2187254-201
2187254-101
6
4
2144501-501
2183004-41
1
3
990106-115
82278-104
93618-107
57435-104
3
3
---*---
VIEWER
· STRAP,
· CHASSIS,
WIRE RETAINING
· ATTACHING PARTS
SCREW, PAN HD (NO. 6-32 x
· WASHER,
FLAT (NO. 6)
WASHER, LOCK (NO. 6)
· NUT, HEX (MP. 6-32)
·
---*--STRAP, WIRE RETAINING
·
QTY. NOTES
---*---
-63
-64
-65
-66
2187254-101
93610-107
2144131-501
2149826-1
ATTACHING PARTS
SCREW, PAN HD (NO. 4-40 x 0.37 LG)
FRAME ASSY., VIEWER 60 Hz
·• FRAME
ASSY., VIEWER 50 Hz
FRAME ASSY., VIEWER 50 Hz
· FRAME ASSY., VIEWER 60 Hz
· • DECAL, CONTROLS
DOOR
· HANDLE,
ATTACHING PARTS
SCREW, PAN HD (NO. 2-56
· · WASHER,
FLAT (NO. 2)
· WASHER, LOCK
·
---*--TOP
· DOOR,
LOWER
· · DOOR,
ATTACHING PARTS
SPIROL
· · PIN, ---*--SCREW, PAA HD (NO. 8-32
· WASHER,
FLAT (NO. 8)
·
RCA STOCK
NUMBER
---*---
ABSY.
· KNOB
BUMPER, GLIDE
·
-58
-59
ATTACHING PARTS
SCREW, THREAD FORMING (NO. 6-32 x 0.25 LG)
WASHER, INT TOOTH LOCK (NO. 6)
DRAWING OR
PART NUMBER
0.62 LG)
ATTACHING PARTS
SCREW, THREAD FORMING (NO. 4-40 x 0.38)
---*---
211587
103891
2183004-41
2187254-2
3
3
1
308487
2
A
B
C,D
E
A,B
A
B
A21
(CR2)
2
(R5)
12
(R6)
13
(01)
6
(CRn
I
(R2)
9
(RI)
8
(C5)
5
(R3)
10
(TBI)20
4(C6)
(R4)11
(C2)4
4(C4)
(02)7
«(;1)3
5(C3)
(Z37)15
(Z41)17
(Z45)17
14 (Z I)
(Z33)14
14(Z5)
(Z29)14
14(Z9)
(Z25)14
14(ZI3)
14(Z21)
(Z42)16
(Z461 15
15(Z2)
(Z38115
16(Z6)
(Z34)16
16(ZI0)
(Z30)16
18(ZI4)
(Z26)19
16(ZI8)
(Z47)16
16(Z22)
(Z43)16
16(Z3)
(Z39)17
16(Z7)
(Z35)14
17(Z4)
(Z48)16
16(ZII)
(Z44)15
15(Z8)
(Z40119
14
(Z311
16
(Z36)
16
(Z32)
14
(Z27)
14
(Z23)
15
(Z24)
17
(L20)
19
(ZI9)
14
(ZI6)
4305-105
figure s. Input/Output No. J Logic Module Assembly
A22
15
(ZI5)
16
(ZI2)
FIG. &
INDEX
NUMBER
5- 1
- 2
- 3
- 4
- 5
- 6
- 7
- 8
- 9
-10
-11
-12
-13
-14
-15
-16
-17
-18
-19
-20
DESCRIPTION
DRAWING OR
PART NUMBER
RCA STOCK
NUMBER
QTY. NOTES
2110695-501
266983
REF
2187382-1
2187354-1
2187355-1
229936
267744
266780
1
1
1
2187391-2
267728
3
·
2187355-3
266782
2
·
2187333-1
2187335-1
2180896-1
2187363-62
2187363-103
2187363-53
2187363-1044
2187363-27
2187363-658
2187268-1
2187270-1
21872"67-1
2187269-1
2187273_1
2187272-1
266788.
267789
270825
269895
122117
269511
267782
262016
258745
266774
266776
266773
266775
266779
266778
1
1
2
1
1
1
1
1
1
13
8
16
5
1
3
MODULE ASSY, INPUT/OUTPUT NO. 1 LOGIC
(SEE FIGURE 4 FOR NHA)
DIODE, 1N914
DIODE, 1N958B
CAPACITOR, FIXED, ELECTROLYTIC, 20 UF,
-10"10, +150%, 6 VDCW
CAPACITOR, FIXED, CERAMIC DIELECTRIC,
10 UF, +80"10, -20%, 50 VDCW
CAPACITOR, FIXED, ELECTROLYTIC, 20 UF
-10%, +150"10, 50 VDCW
TRANSISTOR
TRANS ISTOR, 2N4074
PAD, TRANSISTOR MTG
RESISTOR, FIXED FILM, 3.6K OHMS, 2%, 1/2W
RESISTOR, FIXED FILM, 180K OHMS, 2%, 1/2W
RESISTOR, FIXED FILM, 1.5K OHMS, 2%, 1/2W
RESISTOR, FIXED FILM, 620 OHMS, 2%, 2W
RESISTOR, FIXED FILM, 120 OHMS, 2%, 1/2W
RESISTOR, FIXED FILM, 2.4K OHMS, 2"10 , 1W
INTEGRATED CIRCUIT, FLIP-FLOP, DUAL
INTEGRATED CIRCUIT, LOGIC GATE QUAD TWO
INTEGRATED CIRCUIT, LOGIC GATE, DUAL FOUR
INTEGRATED CIRCUIT, BUFFER
INTEGRATED CIRCUIT, LOGIC GATE, EXCLUSIVE OR
INTEGRATED CIRCUIT, LOGIC GATE EXPANDER,
DIODE
PRINTED CIRCUIT BOARD
·
·
·
·
·
·
·
·
·
·
2165471-3
1
.141/107
A23
(RI3)
II
(RI7)
9
(RI5)
13
(RI4)
IZ
(RS)
13
(CR5)
Z
(RI)
S
(C5)
5
(CS)
4
(R5)
IZ
(CRZ)
Z
9(RZ)
(RZO)14
5(C3)
(CI)3
(R9)13
S(RIO)
(RS)IZ
4(C4)
(C2)4
9(RII)
I (CRI)
(CR3)Z
I (CR4)
(RIS)S
(R7)11
10(R3)
(CRS) I
10(RIZ)
(R IS)lO
S(04)
(03)7
6(01)
(RI9)S
II(R4)
(OS)6
7(02)
(05)7
15(ZI)
(Z45)19
16(ZI7)
(Z41)ZO
18(Z21)
(Z37)15
15(Z25)
(Z4S) 16
(Z4Z)ZO
IS(ZS)
(Z34)15
17(ZI0)
(Z301lS
IS(ZI4)
(ZZS)IS
16(ZIS)
(Z43)ZO
17(Z7)
(Z39)IS
IS(ZII)
(Z3S)19
IS(ZZZ)
(Z48)17
IS(ZIS)
(Z44)20
IS(ZI9)
(Z31)1S
Is(za)
(TBnZI
ZO
(Z40)
IS
(Z3S)
IS
(Z3Z)
17
(ZZ7)
17
(ZZS)
IS
(Z24)
IS
(Z23)
figure 6. Input/Output No. 210gi( Moclule Assembly
A24
16
(Z20)
IS
(ZIS)
IS
(ZI2)
FIG. &
INDEX
NUMBER
6- 1
- 2
- 3
- 4
- 5
- 6
- 7
- 8
- 9
-10
-11
-12
-13
-14
-15
-16
-17
-18
-19
-20
-21
DESCRIPTION
MODULE ASSY, INPUT/OUTPUT NO. 2 LOGIC
(SEE FIGURE 4 FOR NHAl
DIODE, IN914
DIODE, IN958B
CAPACITOR, FIXED, ELECTROLYTIC, 20 UF,
-10"10, +150"10, 6 VDCW
CAPACITOR, FIXED, CERAMIC DIELECTRIC, 1 UF
+80"10, -20"/0, 50 VDCW
CAPACITOR, FIXED, ELECTROLYT IC, 20 UF,
-10"/0 , +150"/0, 50 VDCW
• TRANSISTOR
TRANSISTOR, 2N4074
PAD, TRANSISTOR MTG
RESISTOR, FIXED FILM, 3.61< OHMS, 2"10, 1/2W
RESISTOR, FIXED FILM, 1801< OHMS, 2"10, 1/2W
RESISTOR, FIXED FILM, 1.51< OHMS, 2"10, 1/2W
RESISTOR, FIXED FILM, 620 OHMS, 2"10, 2W
RESISTOR, FIXED FILM, 120 OHMS, 2"10, 1/2W
RESISTOR, FIXED FILM, 2.41< OHMS, 2"10, 1W
RESISTOR, FIXED FILM, 200 OHMS, 2"10, 1/2W
INTEGRATED CIRCUIT, LOGIC GATE, QUAD TWO
INTEGRATED CIRCUIT, LOGIC GATE, DUAL FOUR
INTEGRATED CIRCUIT BUFFER
INTEGRATED CIRCUIT, SINGLE FLIP FLOP
INTEGRATED CIRCUIT, LOGIC GATE EXPANDER,
DIODE
INTEGRATED CIRCUIT, FLIP FLOP, DUAL
• PRINTED CIRCUIT BOARD
DRAWING OR
PART NUMBER
RCA STOCK
NUMBER
QTY. NOTES
2110696-501
266984
REF
2187382-1
2187354-1
2187355-1
229936
267744
266780
3
3
1
2187391-2
267728
3
2187355-3
266782
2
·
·
2187333-1
2187335-1
2180896-1
2187363-62
2187363-103
2187363-53
2187363-1044
2187363-27
2187363-658
2187363-32
2187270-1
2187261-1
2187269-1
2187271-1
2187272-1
267788
267789
270825
269895
122117
269511
267782
262016
258745
261530
266776
266773
266775
266771
266778
3
3
6
4
3
3
3
3
3
1
7
15
5
4
2
·
2187268-1
2165471-5
266774
5
1
·
·
·
·
·
·
·
·
·
·
·
.&41/101
A25
(C2)
2
(Rill
5
(R2)
6
(RI)
IR5)
(R3)
5
5
5
(Z25)
12
(R4)
(R7)
(R6)
(R9)
(OLl)
5
5
5
5
3
(CIIi
(QI)4
(Z29)12
(Z33112
(Z37112
(Z41)7
(Z45)6
(Z46)8
(Z42)9
(Z38)8 -"-4l-;';';:::~
(Z34)13
(Z30)13
(Z26113
--:~ 1I 111
(Z47)IO
(Z43)12
(Z39)IO
(Z35) 9
(Z31)9
(Z27)8
(TBI) 14
(Z40)8
12
(Z36)
10
(Z32)
10
(Z28)
10
(Z24)
II
(Z20)
8
(Zl6)
4305-107
figure 7. Regisler Logic Module Assembl,
A26
II
(ZI2)
10
(Z8)
8
(Z4)
FIG. &
INDEX
NUMBER
7- 1
-
2
- 3
- 4
- 5
- 6
- 7
- 8
- 9
-10
-11
-12
-13
-14
DESCRIPTION
MODULE ASSY, REGISTER LOGIC
(SEE FIGURE 4 FOR NHA)
CAPACITOR, FIXED ELECTROLYTIC, 20 UF, -2~/o
+15~/o, 6 VDCW
CAPACITOR, FIXED, CERAMIC DIELECTRIC,
0.1 UF, +8~/o, -2~/o, 50 VDCW
• DELAY LINE, FIXED DISTRIBUTED CONSTANT
• TRANSISTOR
• PAD, TRANSISTOR MTG.
RESISTOR, FIXED, FILM, 200 OHMS, 2%, 1/2W
• RESISTOR, FIXED, FILM, 1.5K OHMS 2%, 1/2W
• INTEGRATED CIRCUIT, FLIP-FLOP, SINGLE
• INTEGRATED CIRCUIT, LOGIC GATE QUAD TWO
• INTEGRATED CIRCUIT, BUFFER
INTEGRATED CIRCUIT, DUAL FOUR LOGIC GATE
• INTEGRATED CIRCUIT, LOGIC GATE EXPANDER,
DIODE
• INTEGRATED CIRCUIT, FLIP-FLOP DUAL
INTEGRATED CIRCUIT, LOGIC GATE EXCLUSIVE OR
• PRINTED CIRCUIT BOARD
DRAWING OR
PART NUMBER
RCA STOCK
NUMBER
QTY. NOTES
2110699-501
266987
REF
2187355-1
266780
1
2187391-2
267728
1
2187351-3
2187333-1
2180896-1
2187363-32
2187363-53
2187271-1
2187270-1
2187269-1
2187267-16
2187272-1
267705
267788
270825
261530
269511
266777
266776
266775
1
1
266778
2
2187268-1
2187273-1
2165471-2
266774
266779
7
4
1
11
1
12
10
4
7
1
4.4. 101
A27
(01)
(RII
(R81
(R5)
(RII)
3
4
6
4
7
(RI3)
4
(R2)
4
(0)
2
10
(Z29)
10
(Z331
8
(Z341
13
(Z35)
4305-10'
12
(Z361
8
(Z30)
8
(Z31l
10
(Z321
10
(Z28)
Figure B. Mark Logic Modu'e Assemb.y
A28
(Z201
(ZIS)
FIG. &
INDEX
NUMBER
8- 1
-
2
- 3
- 4
- 5
- 6
- 7
- 8
- 9
-10
-11
-12
-13
-14
DESCRIPTION
MODULE ASSY, MARK LOOIC
(SEE FIGURE 4 FOR NHA)
• CAPACITOR. FIXED, ELECTROLYTIC, 20 UF,
-10'-', +150%, 6 VDCW
• CAPACITOR, FIXED, CERAMIC DIELECTRIC, 1 UF
+80'-', -20%, ·50 VDCW
• TRANSISTOR, 2N4074
• PAD, TRANSISTOR MTG
• RESISTOR, FIXED FILM, 200 OHMS, ~-' 1!2W
• RESISTOR, FIXED FILM, 4.3K OHMS, 2%, 1!2W
• RESISTOR, FIXED FILM, 51 OHMS, 2%, 1!2W
RESISTOR, FIXED FILM, 1.8K OHMS, ~-" 1!2W
INTEGRATED CIRCUIT, L03IC GATE QUAD TWO
• INTEGRATED CIRCUIT, BUFFER
• INTEGRATED CIRCUIT, LOOIC GATE DUAL FOUR
• INTEGRATED CIRCUIT, LOO IC GATE EXPANDER,
DIODE
• INTEGRATED CIRCUIT, DUAL FLIP-FLOP
• INTEGRATED CIRCUIT, DUAL FLIP-FLOP
• PRINTED CIRCUIT BOARD
DRAWING OR
PART NUMBER
RCA STOCK
NUMBER
QTY. NOTES
2110697-501
266985
REF
2187355-1
266780
1
2187391-2
267728
3
2187335-1
2180896_1
2187363-32
2187363-64
2187363-18
2187363-55
2187270-1
2187269-1
2187267-1
2187272-1
267789
270825
261530
269518
269504
269513
266776
266775
266773
266778
2
2
7
2
2
2
14
2187268-1
2187268-2
2165471-4
266774
302085
1
1
1
1
17
2
•••• /10'
A29
(C2)
2
13
(01)
4
(RI)
(Z25)
9
(TBI)
5
(03)
(R2)
4
5
(Q2)
4
(Z5)
8
10
(Z30)
II
(Z35)
10
(Z42)
9
9
(Z44)
(Z40)
9
(Z36)
10
(Z26)
8
9
(Z3i)
8
(Z27) (Z24)
8
(Z32)
II
(Z28)
10
(Z22)
10
(ZI8)
4305- !09
figure 9. Timing logic Module Assembly
A30
8
9
(ZI2)
(Z8)
10
(Z6)
FIG. &
INDEX
NUMBER
9-
1
-
2
-
3
4
- 5
- 6
- 7
- 8
- 9
-10
-11
-12
-13
DESCRIPTION
MODULE ASSY, TIMIN3 LOGIC
(SEE FIGURE 4 FOR NHA)
CAPACITOR, FIXED, ELECTROLYTIC, 20 UF, -10'Y0,
+1500;.;, 6 VDCW
CAPACITOR, FIXED CERAMIC DIELECTRIC, 0.1 UF,
- 20";', +80";' , 50 VDCW
DELAY LINE, FIXED DISTRIBUTED CONSTANT
TRANSISTOR
PAD, TRANSISTOR M'II3
RESISTOR, FIXED FILM, 200 OHMS, 2%, 1/2W
RESISTOR, FIXED FILM, 1.3K OHMS, 2"/0 , 1/2W
RESISTOR, FIXED FILM, 270 OHMS, 2%, 1/2W
INTEGRATED CIRCUIT, BUFFER
INTEGRATED CIRCUIT, LOGIC GATE, QUAD TWO
INTEGRATED CIRCUIT, FLIP-FLOP, DUAL
INTEGRATED CIRCUIT, LOGIC GATE, DUAL FOUR
INTEGRATED CIRCUIT, LOG IC GATE E:xPANDER
PRINTED CIRCUIT BOARD
·
·
·
·
·
·
DRAWING OR
PART NUMBER
RCA STOCK
NUMBER
QTY. NOTES
2110698-501
266986
REF
2187355-1
266780
1
2187391-2
267728
1
2187351-2
2187333-1
2180896-1
2187363-32
2187363-52
2187363-35
2187269-1
2187270-1
2187268-1
2187267-1
2187272-1
2165471-1
267704
267788
270825
261530
269510
262020
266775
266776
266774
266773
266778
1
5
5
2
1
2
12
13
11
9
2
1
414B/IOT
A31
(ZI)
23
(Z3)
23
(RI5)
21
(RI6)
15
(CIO)
7
(C8)
7
(R2)
13
(RI)
12
(R4)
12
(Z2) 24
(RI4) 12
14(R3)
(RI2)21
10 (01)
(RI3) 21
9 (LI) .
(R5)15
I (eRI)
(eR2) I
6 (C6)
(RI0)20
2 (ell
(R9)19
10 (02)
(aS) II
5 (e5)
(C3) 3
22 (YI)
(e2) 3
10
(04)
7
(CII )
10
17
(Q3)
(R7)
18
(R8)
15
(RII)
16
(R6)
7
8
4
(C7)
(e9)
(e4)
4305-110
figure 10. Oscillator Gnd Printer Terminator Modu'e Assem"'y
A32
R5 '
FIG. &
INDEX
NUMBER
10- 1
2
-
- 3
- 4
- 5
- 6
- 7
- 8
- 9
-10
-11
-12
-13
-14
-15
-16
-17
-18
-19
-20
-21
-22
-23
-24
-25
DESCRIPTION
DRAWING OR
PART NUMBER
RCA STOCK
NUMBER
QTY. NOTES
2112777-501
301971
REF
·
2187382-1
2187355-1
229936
266780
2
1
·
2187355-3
266782
2
2187356-13
267706
1
2187356-58
230056
1
2187356-47
921435
1
2187391-2
267728
4
2187391-1
261444
1
267715
267797
267722
267788
270825
260606
258560
269505
261590
264811
267766
262025
267753
261536
218992
267709
266777
266775
1
4
4
1
1
3
1
1
3
1
1
1
1
1
3
1
2
1
1
MODULE ASSY, OSCILLATOR AND PRINTER TERMINATOR
(SEE FIGURE 4 FOR NEAl
DIODE, 1N914
CAPACITOR, FIXED, ELECTROLYTIC, 20 UF,
-10%, +150"/0, 6VDCW
CAPACITOR, FIXED, ELECTROLYTIC, 20 UF, -10%,
+150"/0, 50 VDCW
CAPACITOR, FIXED, MICA DIELECTRIC 33PF,
PLUS MINUS 2%, 500 VDCW
CAPACITOR, FIXED, MICA DIELECTRIC 2,400PF,
PLUS MINUS 2%, 500 VDCW
• CAPACITOR, FIXED, MICA DIELECTRIC 820PF,
PLUS MINUS 2%, 500 VDCW
CAPACITOR, FIXED, CERAMIC DIELECTRIC, 1 UF
+80"/0, - 20%, 50 VDCW
CAPACITOR, FIXED, CERAMIC DIELECTRIC, 05 UF
+80"/0, -20%, 150 VDCW
INDUCTOR, RADIO FREQ
TRANSISTOR
PAD, TRANSISTOR MTG
TRANSISTOR,
PAD, TRANSISTOR MTG
RESISTOR, FIXED FILM, 1.0K OHMS, 2%, 1/2W
RESISTOR, FIXED FILM, 620 OHMS, 2%, 1/2W
• RESISTOR, FIXED FILM, 160 OHMS, 2"/0, 1/2W
RESISTOR, FIXED FILM, 510 OHMS, 2"/0, 1/2W
RESISTOR, FIXED FILM, 680 OHMS, 2"/0, 1W
RESISTOR, FIXED FILM, 2.0K OHMS, 2"/0, 1W
RESISTOR, FIXED FILM, 910 OHMS, 2"/0, 1/2W
• RESISTOR, FIXED FILM, 47 OHMS, 2%, 1/2W
RESISTOR, FIXED FILM, 390 OHMS, 2%, 2W
RESISTOR, FIXED FILM, 390 OHMS, 2%, 1/2W
• CRYSTAL, QUARTZ
INTEGRATED CIRCUIT, FLIP-FLOP, SINSLE
INTEGRATED CIRCUIT, BUFFER
PRINTED CIRCUIT BOARD
·
·
·
·
·
·
·
··
·
·
·
·
·
·
2187531-30
2187379-1
2180896-21
2187331-1
'2180896-1
2187363-49
2187363-44
2187363-30
2187363-42
2187363-645
2187363-656
2187363-48
2187363-17
2187363-1039
2187363-39
2187553-1
2187271-1
2187269-1
2165497-1
•
.1.1/107
A33
(C34)
II
C39)
9
(C33)
63(TBI)
I f(C32) ....... ,~--,,--c-·
I(CR35)
IIIC30)
I ICR33)
31CR32l
I(CR31l
I(CR36)
IICRIS)
IOICIS)
IICRIS)
9(C31)
IICRI4)
I(CR2Sl
5(C2S)
SIC20l
11C22)
5~C231
5(CS)
8(C26)
9(CI2)
S(CS)
HCR 21)
I (CR26,)
1(C1)
IICR2S)
5(CIO)
SIC21)
I ICRlll
I(CRIO)
9(C21)
I(CRS)
SIC2S)
IICR21)
IICRIS)
ItCR1)
I(CR23)
IICRa)
fICR2)
I(CR24)
IICR29)
S(CS)
SICI)
I(CR30)
S(C24)
HCR6)
HCRI1l
f(CR4l
IICR20l
2
(CRI9)
701
757:'2 '3-'!
5
(CI16 .)
5
(CI7)
5
I
(CI4)(CRI3)
5
(CI3)
5
(C4)
I
(CRI)
Figure JJ. Selection Amplifier Module Assembly (Sheet J of 3)
A34
FIG. &
INDEX
NUMBER
11-
1
2
3
4
5
- 6
- 7
- 8
- 9
-10
-11
-12
-13
-14
-15
-16
-17
-18
-19
-20
-21
-22
-23
-24
-25
-26
DESCRIPTION
MODULE ASSY, SELECTION AMPLIFIER
(SEE FIGURE 4 FOR NHA)
• DIODE, IN914
• DIODE, 1N270
• DIODE, IN752
• DIODE, IN937A
• CAPACITOR, FIXED, CERAMIC DIELECTRIC,
0.1 UF, +8~Io, -2~Io, 50 VDCW
CAPACITOR, FIXED, MICA DIELECTRIC, 270 PF,
PLUS MINUS 2%, 500 VDCW
CAPACITOR, FIXED MICA DIELECTRIC, 10PF,
2%, 500 VDCW
• CAPACITOR, FIXED, MICA DIELECTRIC 5PF,
PLUS MINUS 2%, 500 VDC;W
CAPACITOR, FIXED, CERAMIC DIELECTRIC, 05 UF
+8~Io, - 2~Io, 200 VDCW
CAPACITOR, FIXED, MICA DIELECTRIC 1.000 PF
PLUS MINUS 2%, 500 VDCW
CAPACITOR, FIXED ~LECTROLYTIC, 20 UF,
-l~Io, +15~Io, 50 VDCW
CAPACITOR, FIXED ELECTROLYTIC, 10 UF
-10%, +15~Io, 100 VDCW
TRANSISTOR, 2N708, SILICON HIGH FREQ
TRANSISTOR, 2N2102
TRANSISTOR, MM3906
TRANSISTOR, MM3904
TRANSISTOR, (TYPE 2N2476)
HEAT SINK (USED WITH 010 AND 011)
TRANSISTOR, 2N3638
TRANSISTOR, 2N4074
PAD, TRANSISTOR MTG
• RESISTOR, FIXED PRECISION WW, 50K OHMS,
• RESISTOR, FIXED FILM, 3.9K OHMS, ~Io, 1/2W
RESISTOR, FIXED FILM, 2.7K OHMS, ~Io, 1/2W
RESISTOR, FIXED FILM, 5.6K OHMS, 2%, 1/2W
RESISTOR, FIXED FILM, 10K OHMS, ~Io, 1!2W
RESISTOR, FIXED PRECISION WW, 100,07K OHMS,
0.25%, 0.125W
DRAWING OR
PART NUMBER
RCA STOCK
NUMBER
QTY. NOTES
2110687-501
301976
REF
2] 87 382-1
2187383-1
2187526-1
2187525-1
2187391-2
229936
224882
267746
267728
34
2
2
1
20
2187356-35
922794
2
2187356-5
266781
2
2187356-1
219436
4
2187391-3
267729
6
2187356-496
219660
1
2187355-3
266782
3
2187155-5
266781
1
2187536-1
2187331-1
2187343-1
2187342-1
2187340-1
2184113-4
2187334-1
2187335-1
21808%-1
2187595-1
2187363-63
2187363-59
2187363-67
2187363-73
2187595-2
227000
230214
207410
307409
267792
6
12
4
3
3
2
233969
267789
270825
267716
260610
269515
269519
261462
267717
1
1
30
2
6
10
6
3
2
4.41/(01
A35
(R54)
31
(028)
14
(R56)
49
(029)
14
(030)
14
14(Q~7)
16(Q25)
15(Q26)
15(Q24)
14(g4)
14(Q9)
4(05)
(R78)51
(R88)37
62(Z!)
, 36(R24)
16(Q1)
(R97)41
IS(06)
14
13
(023) (015)
13
13
(QI6) (QI7)
14
46
(Q8) (R46)
11(QI0)
18
46
(R50)
36
(R41)
11(QII)
18
47
(R48)
~305-1II'2
figure JJ.
A36
Selection Amplifier Module Assembly (Sheet 2 of 3)
13
(Oil
13
(02)
13
(03)
FIG. &
INDEX
NUMBER
DESCRIPTION
DRAWING OR
PART NUMBER
RCA STOCK
NUMBER
QTY. NOTES
11-27
·
2187595-3
267718
2
-28
-29
-30
-31
-32
-33
-34
-35
_36
-37
-38
-39
-40
-41
-42
-43
-44
-45
-46
-47
-48
-49
-50
·
2187514-104
2187514-101
2187363-35
2187363-89
2187587-143
2187363-65
2187514-113
2187587-251
2187363-49
2187363-1
2187363-649
2187363-17
2187363-675
2187363-29
2187587-268
2187587-190
2187514-102
2187363-1037
2187.363-643
2187363-25
2187363-91
2187363_61
2187363-81
267677
267674
262020
269526
267738
230106
267683
236777
260606
275379
2
2
2
7
2
5
2
2
13
RESISTOR, FIXED PRECISION WW, 200.26K OHMS
0.25%, 0.125W
RESISTOR, VARIABLE COMP, 10K OHMS, 20%, 0.5W
RESISTOR, VARIABLE COMP, 10K OHMS, 20"/., o. 5W
RESISTOR, FIXED FILM, 270 OliMS, 2"/., 1/2W
RESISTOR, FIXED FILM, 47K OHMS, 2%, 1/2W
RESISTOR, FIXED FILM, 1. 50K OliMS, 1%, 1/2W
RESISTOR, FIXED FILM, 4.7K OHMS, 2%, 1/2W
RESISTOR, VARIABLE COMP, 25K OHMS, 2"10, 0.5W
RESISTOR, FIXED FILM, 20K OHMS, 1%, 1/2W
RESISTOR, FIXED FILM, 1.0K OHMS, 2"/., 1/2W
RESISTOR, FIXED FILM, 10 OHMS, 2"10 , 1/2W
RESISTOR, FIXED FILM, 1K OHMS, 2%, 1W
RESISTOR, FIXED FILM, 47 OHMS, 2%, 1/2W
RESISTOR, FIXED FILM, 12K OHMS, 2%, lW
RESISTOR, FIXED FILM, 150 OHMS, 2%, 1/2W
RESISTOR, FIXED FILM, 30.1K OHMS, 1%, 1/2W
RESISTOR, FIXED FILM, 4.64K OHMS, 1%, 1/2W
RESISTOR, VARIABLE COMP, lK OHMS, 20%, 0.5W
RESISTOR, FIXED FILM, 330 OHMS, 2%, 2W
RESISTOR, FIXED FILM, 560 OHMS, 2%, 1W
• RESISTOR, FIXED FILM, 100 OHMS, 2%, 1/2W
RESISTOR, FIXED FILM, 56K OHMS, 2%, 1/2W
RESISTOR, FIXED FILM, 3.3K OHMS, 2%, 1/2W
RESISTOR, FIXED FILM, 22K OHMS, 2%, 1/2W
·
·
·
·
267753
267771
233095
265506
236080
267675
267780
261529
269894
269517
269514
2
4
4
4
4
2
2
1
2
3
1
3
1
...../f07
A37
(R I 08) (RIIO) (RI17) (RI18) (RI14)(RI13) (RI15) (R121) (RI16)
59
60
37
52
37
31
31
53
47
(R I 09)
58
(RI20)
36
(RI07)
58
(R76)
30
55(RI02)
(R51)36
(R111)49
28(R73)
(RI04)36
34(R82)
(R53)48
29(R75)
(R55)36
30(RI6)
(RI06)57
37(R58)
(R52)36
44(R57)
(RI12)49
54(R101)
(RI00)43
31(R83)
37(R44)
(R94)39
44(R43)
(R93)36
56(RI03)
(R95)36
28(RI4)
(R89)39
34(R22)
(R25)31
25(RI9)
(R99)42
(RI7)31 _ _ __
29(RI5)
(R80)33
35(R23)
(R81)33
42(R40)
(R59)50
33(R20)
(R38)41
33(R21)
(R32)40
32(RI8)
(R28)37
36(R36)
(R91)40
24(R4)
(R96)41
(R90)38
24(R9)
(R65)26
(R92)40
(R61)21
(R64)24
(R68)24
(R69)27
(R63)23
(R62)22
23
22
25
(R67) (R66) (R60)
22
(R70)
24
23
(R72) (R7il
41
(R37)
31
(R77)
39
(R31)
3623
(R34) (R27)
36
(R42)
4305-111 - 3
figure JJ. Selection Amplifier Module Assembly (Sheet 3 of 3)
A38
39
(R35)
23
(R3)
22
(R2)
FIG. &
INDEX
NUMBER
11-51
-52
-53
DESCRIPTION
·
·
-54
-5~
-56
-57
-58
-59
-60
-61
-62
-63
·
··
·
·
·
·
RESISTOR, FIXED FILM, 9.lK OHMS, 2".k, 1/2W
RESISTOR, FIXED FILM, 18K O;IMS, 2%, 1/2W
RESISTOR, FIXED FILM, 820 OHI~S, 2%, 2W
2"10, 1/:1'1
RESISTOR, FIXED FILM, 68 OHM~"
RESISTOR, VARIABLE COMP, 5UK OHMS, 20'10, (). 5W
RESISTOR, FIXED FILM, 470 OHMS, 2".k, 1/2W
REf'ISrOk, FIXED FILM, 560 OJlM3, 2%, 1/2W
RES] STOR, FIXED FILM, 11K OHMS, 2"10, lW
RESISTOR, FIXED FILM, lK OHMS, 1%, 1/2W
RESISTOR, FIXED FILM, 357 OHMS, 1%, 1/2W
TRANSFORMER, PULSE
INTEGRATED CIRCUIT, RF AMPLIFIER
PRINTED CIRCUIT BOARD
DRAWING OR
PART NUMBER
RCA STOCK
NUMBER
2187363-72
2187363-79
2187363-1047
2187363-21
2187514-105
2187363-41
2187363-43
2182078-213
2187587-126
2187587-83
2187524-1
2187527-1
2165467-1
228938
269',22
2b77f'4
2', 1753
267678
261119
285212
237606
236062
267801
QTY. NOTES
1
1
1
1
1
1
1
2
1
1
1
3
1
4141/107
A39
19
(020) " , l-C9)
12 ;:"."
6
(CRI8)
3
(023)
12
(022)
12
(0211
12
(019)
13 ,
13(01~)
(025)18
15(0IS)
16(017)
3(CR17)
9(CS)
12 (014)
14(016)
4(C7)
3 (CRI6)
12(09)
12 (as)
3(CRI4)
13(06)
(013)17-_~_
5S(181l
(CRS) 3 - - - + -
I (CRI)
6--""-'--
15(05)
(C3)
(C R7) 3 .-----'--
3{CR6)
(011)17 - --;,..-
16(04)
-1(CR22)
(07)12
(02)13---+-
"-""---- 4 (C (4)
(C2) 5 - - - + -
10 (ell)
"'1 1 (eI3)
(012)18
14(03)
(CR5)
3 (CR4)
\
4305-112-1
II
(CI6)
II
(CIS)
3
3
7
(CRill
(CRI2)
(C5L
II
(CI2)
2
(CR2)
12
(01)
figure 12. Deflection Amplifier Module Assembly (Slreet J of 2)
A40
4
(CI)
R5
FIG. &
INDEX
NUMBER
12-
1
2
3
4
- 5
- 6
- 7
- 8
- 9
-10
-11
-12
_13
-14
-15
-16
-17
-18
-19
-20
-21
DESCRIPTION
MODULE ASSY, DEFLECTION AMPLIFIER
(SEE FIGURE 4 FOR NHA)
• DIODE, 1N935
• DIODE, 1N270
• DIODE, 1N914
• CAPACITOR, FIXED, CERAMIC DIELECTRIC,
0.1 UF, +80%, -20%, 50 VDCW
CAPACITOR, FIXED METALIZED-FILM
POLYCARBONATE, 0.1 UF, 10%, 200 VDCW
• CAPACITOR, FIXED, CERAMIC DIELECTRIC,
220 PF, PLUM MINUS 10%, 1000 VDCW
• CAPACITOR, FIXED ELECTROLYTIC, 20 UF,
-10%, +150%, 6 VDCW
• CAPACITOR, FIXED, PLASTIC DIELECTRIC,
.47 UF, 20%, 75 VDCW
• CAPACITOR, FIXED, METALIZED-FILM
POLYCARBONATE, 1.0 UF, 10%, 200 VDCW
• CAPACITOR, FIXED ELECTROLYTIC, 10 UF, -1~;',
+100%, 100 VDCW
• CAPACITOR, FIXED ELECTROLYTIC, 20 UF, -10%
+150%, 50 VDCW
• TRANSISTOR, 2N4074
• TRANSISTOR, M1-13906
• TRANSISTOR, 2N2476
• TRANSISTOR, 2N2102
• TRANSISTOR, 2N3638
• PAD, TRANSISTOR MTG
• TRANSISTOR, 2N2147, GERMANIUM POWER
• TRANSISTOR, 2N3054
• DISK, INSULATOR (USED WITH OIl, 013, 024,
AND 026)
• DISK, INSULATOR (USED WITH 012, AND 025
• HEAT SINK
ATTACHIN3 PARTS
• SCREW, PH (6-32)
• BUSHIN3, INSULATOR
• WASHER (NO.6)
• NUT (6-32)
---*---
• RESISTOR, FIXED FILM, 4.7K OHMS,
• RESISTOR, FIXED FILM, 2.7K OHMS,
~;.,
1/2W
2%, 1/2W
DRAWING OR
PART NUMBER
RCA STOCK
NUMBER
2110686-501
301962
REF
2187381-1
2187383-1
2187382-1
2187391-2
257071
229936
267728
2
2
18
5
2187532-1
267707
1
2187362-1
. 228037
2
2187355-1
266780
1
2187361-4
267727
1
2187532-2
267708
1
2187355-5
266781
1
2187355-3
266782
4
2187335_1
2187343-1
2187340-1
2187331-1
2187334-1
2180896-1
2187535-1
2187345-1
2185811-8
267789
307410
267794
230214
233969
270825
230523
262116
10
4
2
2
2
20
4
2
4
2187363-65
2187363-59
•
2
1
2185811-40
2165429_1
990106-65
2185812-4
93610-57
57435-54
QTY. NOTES
267953
230106
269515
12
12
12
12
4
2
4 •• 1/107
A41
(R691
46
(R68)
(R70)
(R57)
(R49)
(R50)
(R61)
(R59)
(R64)
45
51
50
32
33
39
39
20
38(R58)
35(R52)
40(R60)
(R53)35
49(R54)
(R55)34
54(R73)
29(R45)
(R48)34
37(R56)
(R46)30
26(R44)
31(R47)
(R65)43
53(R72)
(R63)42 _.....:....._
56(R75)
(R62)41 - - (R41)25
37(R22)
--+--
!:-.-;._ _ 28(R43)
(R67)44
~-=:--:::=_ 55 (R 74)
(R66)44 - - . -
57(R76)
(R51)31
32(R39)
(R36)20
23(R38)
(R31)44
26(R40)
(R32)44
21 (R37)
(R42)48
(R30)43
23(R4)
(R29)42
39(R25)
(R28)41
39(R27)
(R24)20
38(R23)
(R19)35
22(R3)
(R2U34
32(R5)
(R34)46
40(R26)
(R33)45
35(R18)
(R35)47
36(R20)
(R15)33
52(R71)
(R16)34
26(R10)
(R12)30
31
(R13)
24
(Rn)
31
(R17)
:::5
(R6)
27
(R8)
20
(RU
21
(R2)
26
(R7)
70 /752 - P2 14 -2
figure J2. Deflection Amplifier Module Assembly (Sheet 2 of 2)
A42
28
(R9)
29 32(R14)
(R11)
R4
FIG. &
INDEX
NUMBER
DESCRIPTION
RESISTOR,
RESISTOR,
RESISTOR,
RESISTOR,
RESISTOR.
12-22
-23
-24
-25
-26
FIXED FILM, 910 OHMS, 2%, ~W
VARIABLE COMP, 1K OHMS, 20%, 0.5W
FIXED FILM, 100 OHMS, 2%, ~W
FIXED FILM, 20K OHMS, 2%. ~W
FIXED FILM, 33K OHMS. 2%. ~W
DRAWING OR
PART NUMBER
RCA STOCK
NUMBER
QTY. NOTES
2187363-48
2187514-102
2187363-25
2187363-80
2187363-85
262025
267675
261529
269523
230215
1
2
1
2
4
2187587-210
2187363-1
2187363-1065
2187363-60
2187363-73
2187363-49
2187363-77
2187363-57
2187363-75
2187587-214
236084
275379
267786
269516
261462
260606
261454
260609
269521
236085
267676
267742
267749
260610
267785
267783
267777
262054
267732
267735
1
2
2
2
4
CAUTION
When replacing a deflection yoke.
check the serial number of the
associated deflection amplifier
in the VDT. For deflection amplifiers serial numbers 0135 and below,
the following resistors must be
replaced with the values indicated
on this page before the amplifier
is used. Replace resistor R8 with
Item 27. Replace resistors R5 and
R39 with Item 32.
-27
-28
-29
-30
-31
-32
-33
-34
-35
-36
-37
-38
-39
-40
-41
-42
-43
-44
-45
-46
·
·
·
·
·
RESISTOR,
RESISTOR.
RESISTOR,
RESISTOR.
RESISTOR,
RESISTOR,
RESISTOR,
RESISTOR,
RESISTOR,
RESISTOR,
RESISTOR,
RESISTOR,
RESISTOR,
RESISTOR,
RESISTOR,
RESISTOR,
RESISTOR,
RESISTOR,
RESISTOR,
RESISTOR,
FIXED FILM. 7.5K OHMS. 1%. ~W
FIXED FILM. 10 OHMS. 2%. ~W
FIXED FILM, 4.7K OHMS. 2%. 2W
FIXED FILM, 3K OHMS, 2"", ~W
FIXED FILM, 10K OHMS, 2%, ~W
FIXED FILM, 1K OHM, 2%. ~W
FIXED FILM, 15 K OHMS, 2"", ~W
FIXED FILM, 2.2K OHMS, 2%, ~W
FIXED FILM, 12K OHMS, 2%, ~W
FIXED FILM, B.25K OHMS, 1%, ~W
VlIRIABLE 5K OHMS. 20%, 0.5W
FIXED FILM, 23.2K OHMS, 1%, ~W
FIXED FILM, 15 OHMS, 2%, ~W
FIXED FILM, 3.9K OHMS, 2%, ~W
FIXED FILM, 1.5K OHMS, 2%, 2W
FIXED FILM, 680 OHMS, 2"", 2W
FIXED FILM, 33 OHMS, 2%, 2W
FIXED FILM, 100 OHMS, 2%, 2W
FIXED WW. 2.0 OHMS, 1%, 5W
FIXED WW, 5.0 OHMS, 1%, lOW
2187514-103
2187587-257
2187363-5
2187363-63
2187363-1053
2187363-1045
2187363-1013
2187363-1025
2187569-1
2187569-4
•
2
4
4
1
2
2
4
2
2
2
2
4
2
2
.. 1 .. 11 I 07
A43
i
FIG. &
INDEX
NUMBER'
DESCRIPTION
12-47
!
i
-53
-54
RESISTOR, VARIABLE CaMP, 100 OHMS,
-49
-50
-51
-52
i
II
I
I1
i
··
·
RCA STOCK
NUMBER
2187569-2
2187587-251
2187587-222
2187363-98
2187569-3
,2187363-39
2187514-112
267733
236777
236087
267759
267734
261455
267682
1
1
1
1
1
1
1
2187514-111
267681
1
2187514-115
267684
1
2187363-109
2187363-97
2144562-1
267762
233096
1
QTY. NOTES
0.5W
-55
i
FIXED W, 3.0 OHMS, 1%, 5W
FIXED FILM, 20K OHMS, 1%, 1/2W
FIXED Fn.M, 10K OHMS, 1%, 1/2W
FIXED Fn.M, 110K OHMS, 2%, 1/2W
FIXED W, 4.0 OHMS, 1%, 5W
FIXED Fn.M, 390 OHMS, 2%, 1/2W
VARIABLE CaMP, lOOK OHMS, 20%
RESISTOR,
RESISTOR,
RESISTOR,
RESISTOR,
RESISTOR,
RESISTOR,
RESISTOR,
-48
DRAWING OR
PART NUMBER
I
-56 I
-57 I
-~")8
,;
(
:
,
i,
l
,I
,"
i
I
,
j
I
!
,i
I
!,
I
!
I,
i
,
I,
!
A44
.,
I
I
I
20%
o.sw
RESISTOR, VARIABLE COMP, 1 MEG OHMS, 20%
O.5W
RESISTOR, FIXED Fn.M, 330K OHMS, 2%, 1/2W
RESISTOR, FIXED Fn.M, lOOK OHMS, 2%, 1/2W
PRINTED CIRCUIT BOARD
1
1
I
A45
8
(M)
12
5
18
(XVI)
17
2
13
(VI)
29 (A2R5)
(A2R4) 28
29 (A2R6)
(A2R3)27
29(A2R7)
20
(A2RI)25
21
22
(A2) 19
26(A2R21
I
(A2TBI)
4305-113
figure 13. Monoscope Assem6'y
A46
R5 .
FIG. &
INDEX
NUMBER
13-1
_2
-3
-4
-5
DESCRIPTION
MONOSCOPE ASSY (SEE FIG. 4 FOR NHA)
• KNOB ASSY
• COVER
• COVER
ATTACHING PARTS
• SCREW, THO FORM (4-40 X .25 LG)
• SCREW, PAN HD (NO. 6-32 X 0.38 LG)
WASHER, FLAT (NO.6)
• WASHER, LOCK (NO.6)
DRAWING OR
PART NUMBER
2110691-501
2144131-501
2144532-501
2144532-2
RCA STOCK
NUMBER
REF
267799
QTY. NOTES
REF
2
1
1
8
2187254-1
990106-109
82278-104
93618-106
4
4
4
---*---6
-7
-8
-9
-10
-11
-12
-13
-14
-15
-16
GROMMET
CAPACITOR, FIXED, CERAMIC FEED-THRU, 1500PF
:!: 20'/0 500 VDCW
• WASHER, EXT TOOTH (NO. 12)
GROMMET
HOUSING
DELETED
• .DELETED
• TERMINAL BOARD ASSY. PREAMPLIFIER (SEE
FIGURE 14)
O-RiNG
• O-RING
CAPACITOR, FIXED, CERAMIC DIELECTRIC, 1 UF.,
+80'/0 -20'10, 50 VDCW
• SCR"W, PAN HD (6-32 X, 50 LG)
SPk~ER
-17
-18
-19
-20
-21
-22
• WASHER, LOCK (;~O. 6)
WASHER, FLAT (NO.6)
• NUT (NO. 6-32)
• CATHODE RAY TUBE, MONOSCOPE
• SOCKET, ELECTRON TUBE
• TERMINAL BOARD ASSY, VOLTAGE DIVIDER
ATTACHING PARTS
• SPACER
• SCREW, PAN HD (4-40 X 62 LG)
• SCREW, PAN HD (4-40 X 38 LG)
• WASHER, FLAT (NO.4)
• WASHER, LOCK (NO.4)
2187570-1
2187582-1
57404
2
93611-114
2187570-2
2165428-501
2110692-501
2187636-1
. 2187636-2
2187391-2
990106-113
2187755-1
93618-107
82278-104
57435-104
2187511-1
2187559-1
2110693-501
2
2
3
1
267824
1
275379
304921
267728
1
1
2
1
1
1
1
1
266997
9952
267825
2185307-105
990104-115
990104-109
82278-103
93618-105
1
1
1
2
2
2
2
2
---*---23
-24
-25
-26
-27
-28
-29
-30
-31
• • CAPACITOR, FIXED, DISC CERAMIC 5,000PF
:!: 20% 3,000 VDCW
CAPACITOR, FIXED, CERAMIC DIELECTRIC, .1
UF, +80'10 -20% 200 VDCW
• • RESISTOR, VARIABLE COMP, 50K OHMS, 200/.,
0.5 W
•
RESISTOR, FIXED FILM, 27 K OHMS, 20/., IN
• • RESISTOR, FIXED FILM, 120 K OHMS, ~Io, lW
• • RESISTOR, VARIABLE COMP, 250 K OHMS, 20%
+.5W
• • RESISTOR, FIXED FILM, 560 K OHMS, 20/., 1W
SPACER
• • PRINTED CIRCUIT BOARD
INDUCTOR (L1)
2187583-1
232716
1
2187391-4
267730
1
2187514-109
267679
1
2187363-683
2187363-699
2187514-110
267772
267773
267680
1
2187363-715
2184521-16
2165469-1
2187531-20
267774
3
4
1
267714
1
1
1
•
4.415 107
A47
19------
18
- ~.;,....:;;;.;,;...;-.;,....:;;;.---- 12 (RI2)
--'-_ _
~
(CII)
~--
_--------'----........- 2 (C7)
!L.-----'---'~ 9 (R 16)
::!;------....................... 5 (C28)
5--------- IQ (RJ7)
Erf------..---............. 4 (C I 5)
10 (R23)
:ro~. 71t • '~IO .
~1'
figure J4.
A48
Monoscope Preamplifier Assembly
FIG. &
INDEX
NUMBER
14.- 1
-
2
-
-3
- 4
- 5
- 6
-
7
- 8
- 9
-10
-11
-12
-13
-14
-15
-16
-17
-18
-19
-20
-21
-22
DESCRIPTION
TERMINAL BOARD ASSY, PREAMPLIFIER
(SEE FIGURE 13 FOR NEAl
CAPACITOR, FIXED, CERAMIC, .22 UF, 120"/0 ,
25 VDCW
CAPACITOR, FIXED, SOLID TANTALUM, 2.2 UF,
I20";' , 20 VDCW
CAPACITOR, FIXED, CERAMIC DIELEC1'RIC,
.01 UF, +8a,'o, -20"/0, 50 VDCW
CAPACITOR, FIXED CERAMIC DIELECTRIC, 1000PF
110"/0, 1000 VDCW
CAPACITOR, FIXED, MICA DIELECTRIC, 390 PF
i2%, 500 VDCW
TRANSISTOR
PAD, TRANSISTOR MTG
RESISTOR, FIXED FILM, 100 OHMS, 2%, 1!4W
RESISTOR, FIXED FTI.M, 4.7K OHMS, 2%, 1!4W
RESISTOR, FIXED FILM, 2.7K OHMS, 2%, 1!4W
RESISTOR, FIXED, COMP, 10 OHMS, 5%, 1!4W
RESISTOR, FIXED FILM, 150 OHMS, 2%, 1!4W
RESISTOR, FIXED FILM, 1K OHMS, 2%, 1!4W
RESISTOR, FIXED FILM, 220 OHMS, 2%, 1!4W
RESISTOR, FIXED FILM, 1.2K OHMS, 2%, 1!4W
RESISTOR, FIXED FILM, 330 OHMS, 2%, 1!4W
RESISTOR, FIXED FILM, 5.1K OHMS, 2%, 1!4W
RESISTOR, FIXED FILM, 10.0K OHMS, 2%, 1!4W
SIGNAL CONNECTOR, BUTTON
LUG TERMINAL
CABLE, COAXIAL
CLIP
PRINTED CIRCUIT BOARD
·
·
·
·
·
·
·
·
·
·
·
·
·
·
·
DRAWING OR
PART NUMBER
RCA STOCK
NUMBER
2110692-501
267824
REF
2187546-1
267731
6
2187392-1
230028
8
2187391-5
224570
6
2187362-3
105778
5
2187356-39
218992
4
2187379-1
2180896-21
2182165-208
2182165-248
2182165-242
2182068-1
2182165-212
2182165-232
2182165-216
21821-65-234
2182165-220
2182165-249
2182165-256
2181460-2
2187604-1
2187641-1
2144176-1
2165409-1
267797
267722
267695
267700
267699
267787
267696
239949
239949
239950
267698
267701
267702
267952
5
5
4
4
4
4
4
4
1
267966
QTY. NOTES
1
2
1
1
2_
1
1
1
1
•••..,10'
A49
22 (Q4)
23
(Q3)
21
(TBJ)
60
(CRI)
I
4(C4)
5 (C5)
(CR2) 2
6 (C6)
(QI) 20
la (L1)
(C29) 16
19 (L2)
(C2) 4
7 (C7)
(Q7) 20
a (ca)
(Qa) 20
9 (C9)
(CR3)2
21 (Q5)
(CR4) 3
4 (CIO)
(Q9) 20
24 (Q6)
(CI2) 4
II (CI4)
(CI3) 10
21 (QIO)
(C25)13
15(C30)
(C31117
15 (C2a)
(C24)12
4 (CI6)
(Q20) 26
21 (QII)
27
(C27)14
20(QI2)
(C23) 4
10 (CIS)
(C33) 15
20 (QI3)
(C22) 4
20(QI4)
(C32) 15
4 (CI7)
(QI9)25
20(QI5)
(CR6) 2
4(Cla)
(CR5)3
20(QI6)
4305-115-1
21
(Qla)
4
4
4
(C21)
(C20)
(C191
22 (QI7)
23
figure JS. Ticlc'er Driver Module Assembly (Slteet J of 2)
A50
FIG. &
INDEX
NUMBER
DESCRIPTION
15-
MODULE ASSY, TICKLER DRIVER (SEE FIG. 4 FOR
NHA)
-1
-2
-3
-4
·
·
·
•
-5
0
-6
0
-7
o
-8
·
-9
0
-10
o
-11
0
-12
0
-13
o
-14
o
-15
·
-16
o
-17
·
-18
-19
-20
-21
-22
-23
-24
-25
0
0
0
0
o
o
·o
o
-26
·
DIODE, IN935
DIODE, IN270
DIODE, IN914
CAPACITOR, FIXED CERAMIC DIELECTRIC, 0.1UF
+80"" - 20"", 50VDCW
CAPACITOR, FIXED, MICA DIELECTRIC 200PF,
:t2%, 500 VDCW
CAPACITOR, FIXED, MICA DIELECTRIC 820PF,
:t2%, 500 VDCW
~ACITOR, FIXED, MICA DIELECTRIC 680PF,
-2%, 500 VDCW
CAPACITOR, FIXED, MICA DIELECTRIC 1.300PF
::2%, 500 VDCW
~ACITOR, FIXED, MICA DIELECTRIC 620 PF,
-2%, 500 VDCW
!fAPACITOR, FIXED, MICA DIELECTRIC 1,OOOPF,
-2%, 500 VDCW
CAPACITOR, FIXED, MICA DIELECTRIC 470PF,
:t2%, 500 VDCW
CAPACITOR, FIXED, MICA DIELECTRIC 1,200PF,
:t2<", 500 VDCW
CAPACITOR, FIXED, MICA DIELECTRIC 120PF,
'::2%, 500 VDCW
CAPACITOR, FIXED, CERAMIC DIELECTRIC, OolU
+80%, -20%, 200 VDCW
CAPACITOR, FIXED, ELECTROLYTIC, 20UF, -10%
+150%, 65VDCW
CAPACITOR, FIXED, ELECTROLYTIC, 20UF, -10%
+150%, 8VDCW
CAPACITOR, FIXED, ELECTROLYTIC, 10UF, -10%
+150%, 125 VDCW
INDUCTOR
INDUCTOR
TRANSISTOR, MM3904
TRANSISTOR, 2N4074
TRANSISTOR, 2N2102
HEAT SINK
TRANSISTOR; 2N2476
TRANSISTOR, 2N3638
PAD, TRANSISTOR MTG
TRANSISTOR, 2N3583
DRAWING OR
PART NUMBER
RCA STOCK
NUMBER
QTY. NOTES
2110689-501
301963
REF
2187381-1
2187383-1
2187382-1
257071
300506
229936
1
3
2
2187391-2
267728
14
2187356-32
2187356-47
922153
921435
1
1
2187356-45
229048
1
2187356-52
218590
1
2187356-44
922901
1
2187356-49
219660
2
2187356-41
229047
1
2187356-51
218969
1
2187356-27
921309
1
2187391-4
267730
1
2187355-3
266782
4
2187355-1
266780
1
2187355-5
266781
1
2187531-20
2187531-18
2187342-1
2187355-1
2187331-1
2184113-3
2187340-1
2187334-1
2180096-1
2187332-1
267714
267713
307409
267789
230214
1
1
10
5
2
2
1
1
19
1
267792
233969
270825263561
4141/107
A51
35(R9)
35(R8)
34 (R7)
40(R'S)
34(Rt7)
36(RtO)
3B(RtZ)
37(R t l)
36(Rt5)
Z9(RZ) ,
39(Rt3)
34(R18)
39(Rt4)
58(R6B)
37(R24}
31(RZI)
43(R26)
4Z(RZO) """-___
37(,.23)
, 37(R25)
"HRt9)
45(R,8)
4Z(R2Z) .......,.."..".",....,
3S(R29)
5B(R69) ..........".."."...",
44'R27)
58(R70) ,..".,.,,..,.,..,,,,,..,.;
4"R33)
58(R67) .."."..,...".,.","=
46(R3t) """",,...,.,,,.,,,,,...:
57(R6S)
57(RS5)
57(RS3)
57(RS4)
5S(R58)
56(R57)
5S(RSO)
58~R7Z)
' 4~R56) -,..,.,...",,""--~
56(RSI) 59(R7t) _
---.............,
_ ........._
55(RS3) ...........""......,~
42CRSt) _ ........_~.".....,.ia
2 9( RS2)
,
54(R49)
.
,~:I-1I5-2
figure J5. Ticlcler Driver Module Assembly (Sheet 2 of 2) ,
A52
I'
FIG. &
INDEX
NUMBER
DESCRIPTION
15-27
·
·
HEAT SINK
WASHER, INSULATED SHOULDER
LUG, RING
ATTACHING PARTS
SCREW (6-32)
DISK, INSULATOR
WASHER
· NUT
-28
-29
-30
-31
-32
-33
-34
-35
-36
-37
-38
-39
-40
-41
-42
-43
·
·
·
·
·
·
·
·
·
-44
-45
-4(,
-47
-48
·
DRAWING OR
PART NUMBER
RCA STOCK
NUMBER
2144523-1
2185812-4
8982998-13
267953
990106-65
2185811-8
93610-57
57435-54
1
2
1
2
1
2
2
---*---
RESISTOR,
RESISTOR,
RESI"TOR,
RESISTOR,
RESISTOR,
RESISTOR,
RESISTOR,
RESISTOR,
RESISTOR,
RESISTOR,
RESISTOR,
RESISTOH,
RESISTOR,
RESISTOR,
RESISTOR,
RESISTOR,
0.25W
RESISTOR,
RESISTOR,
RESISTOR,
0.25W
RESISTOR,
RESISTOR,
QTY. NOTES
FIXED FILM, 1.2K OHMS, 2%, 1!2W
FIXED FILM, 330 OHMS, 2"/0 , 1!2W
FIXED FILM, 22K OHMS, 2"/0 1/2W
FIXED FILM, 820 OHMS 2"/0, 1!2W
FIXED FILM, 68K OHMS, 2%, 1!2W
FIXED FILM, 39K OHMS, 2"/0, 1/2W
FIXED FILM, 3.3K OHMS 2%, 1!2W
FIXED FILM, 100 OHMS, 2%, 2W
FIXED FILM, 100 OHMS, 2"/0, 1/2W
FIXED FILM, 220 OHMS, 2"/0 , 1!2W
FIXED FILM, 2.2K OHMS, 2"/0, 1!2W
FIXED FILM, 470 OHMS 2"/0, 1W
FIXED FILM, 8.2 K OHMS, 2"/0, 1!2W
FIXED FILM, 13K OHMS, 2"/0, 1!2W
FIXED FILM, 4.7K OHMS, 2"/0 , 1!2W
VARIABLE, CARBON, lK OHMS, 20%,
2187363-51
2187363-37
2187363-81
2187363-47
2187363-93
2187363-87
2187363-61
2187363-1025
2187363-25
2187363-33
2187363-57
2187363-641
21137363-71
2187363-76
2187363-65
2187585-3
261533
261531
257071
269508
267758
26952"
269517
262054
261529
230563
260609
267765
269520
267757
230106
267687
2
4
1
4
1
1
3
2
4
5
2
2
1
1
3
1
FIXED FILM, 1.2K OHMS, 2%, lW
FIXED FILM, 470 OHMS, 2%, 1!2W
VARIABLE, CARBON, 2.5K OHMS, 20"/0 ,
2187363-651
2187363-41
2187585-4
269517
261119
267688
1
6
1
FIXED FILM,
FIXED FILM,
2187363-31
2187363-55
269506
269513
1
1
180 OHMS, 2%, 1/2W
1.8K OHMS, 2"/0, 1!2W
"1415/10 T
A53
FIG. &
INDEX
NUMBER
DESCRIPTION
DRAWING OR
PART NUMBER
RCA STOCK
NUMBER
QTY. NOTES
15
-49
-50
-51
-52
-53
-54
-55
-56
-57
-58
-59
-60
••• 1/101
A'i4
RESISTOR, FIXED, FILM, 15 OHMS, 2%, 1/2W
lK OHMS, 2%, 1/2W
6.8K OHMS, 2%, 1/2W
150 OHMS, 2%, 1/2W
2.7K OHMS, 2%, 1!2W
390 OHMS. 2%, 2W
18 OHMS, 2%, 1!2W
16 OHMS, 2%, 2W
82 OHMS, 2%, 2W
10 OHMS, 2".4 , 1!2W
10 OHMS, 2%, 1W
FIXED, FILM,
· RESISTOR,
FIXED. FILM,
· RESISTOR,
RESISTOR, FIXED, FILM,
· RESISTOR, FIXe:D, FILM,
· RESISTOR. FIXED, FILM,
· RESISTOR, FIXED, FILM,
·
FIXED, FILM,
· RESISTOR,
FIXED, FILM,
· RESISTOR,
FIXED, FILM,
· RESISTOR,
RESISTOR, FIXED, FILM,
· PRINTED CIRCUIT BOARD
·
2187363-5
2187363-49
2187363-69
2187363-29
2187363-59
2187363-1039
2187263-7
2187363-1006
2187363-1023
2187363-1
2187363-601
2144568-1
267749
269509
267755
233095
269515
261536
267750
267776
267778
275379
267763
1
2
1
1
2
1
2
5
4
5
1
1
A55
14(QI7)
16
(TB""~
(CRIO)
3
35
4
10(L!)
8 (CIO)
(QI9) 15
16
(C8)
7
5 (CII)
(C7)
6
II (QI8)
(QI6) 12
II (QI4)
(CRI!)
I
5 (C6)
(C5)
5
13 (Q151
(QII) II
2 (CR9)
II
II (QI2)
(Q9)
(QIO) "
2 (CR8)
(CR5)
2 (CR7)
2
(CR6)
II (Q7)
(CRI)
12(Q131
2 (C9)
(Q4)
"
(Q6)
"
(CR31
2
II (Q8)
(CI3)
9
I I (Q5)
(eI2)
5
2 (CR2)
(C4 )
5
5 (CI6)
(CI4)
8
II(Q2)
(CI)
5
5 (C3)
(C2)
5
II (Q3)
(C17 ) 9
II (QI)
I (CR4)
5(CI5)
4305-116-1
figure 16. Video Driver Module Assembly (Sheet 1 of 2)
A56
FIG. &
INDEX
NUMBER
16-
DRAWING OR
PART NUMBER
DESCRIPTION
MODULE ASSY, VIDEO DRIVER (SEE FIG. 4 FOR
RCA STOCK
NUMBER
QTY. NOTES
2110688-501
266989
REF
2187383-1
2187382-1
2187538-1
2144523-2
229936
267747
4
6
1
1
NHA)
-1
-2
-3
-4
-5
-6
-7
-8
-9
-10
-11
-12
-13
-14
-15
-16
-17
-18
-19
-20
-21
-22
-23
-24
1N270
· DIODE,
DIODE, 1N914
· DIODE,SINK
· HEAT ATTACHIN3
PARTS
NUT (10-32)
· WASHER, FLAT (NO. 10)
· WASHER, EXT TOOTH
· DISK, INSULATOR
·
---*--FIXED, CERAMIC DIELECTRIC,
· CAPACITOR,
+80% -20';' 50 VDCW
CAPACITOR, FIXED, CERAMIC DIELECTRIC,
· UF,
+80';' -20%, 200 VDCW
FIXED, ELECTROLYTIC, 10UF,
· CAPACITOR,
+150%, 100 VDCW
57435-56
82278-56
93610-62
2185811-20
.05UF.
·
·
·
·
·
·
·
·
2187391-1
261444
11
2187391-4
2187355-5
267730
266781
1
1
2187355-1
266780
2
2187355-3
266782
2
2187531-10
2187333-1
2187335-1
2187343-1
2187340-1
2187331-1
2184113-4 .
2187363-65
2187363-25
2187363-9
2187363-49
2187363-1
2187363-37 .
2187363-61
2187363-33
267997
267788
267789
307410
267792
230214
1
14
2
1
1
1
2
6
2
7
6
5
4
2
1
0.1
-10'''
• CAPACITOR, FIXED, ELECTROLYTIC, 20UF, -10%
+150%, 6 VDCW
• CAPACITOR, FIXED, ELECTROLYTIC, 20UF, -10%
+150%, 50 VDCW
INDUCTOR, RADIO FREO
• TRANSISTOR,
TRANSISTOR,2N4074
• TRANSISTOR, MM3906
• TRANSISTOR, 2N2476
• TRANS ISTOR, 2N2102
HEAT SINK, (USED WITH 017 AND 019)
RESISTOR, FIXED FILM, 4.7K OHMS, 2%, 1/2W
RESISTOR, FIXED FILM, 100 OHMS, 2%, 1/2W
RESISTOR, FIXED FILM, 22 OHMS, 2%, 1/2W
• RESISTOR, FIXED FILM, lK OHMS, 2%, 1/2W
RESISTOR, FIXED FILM, 10 OHMS, 2%, 1/2W
RESISTOR, FIXED FILM, 330 OHMS, 2%, 1/2W
RESISTOR, FIXED FILM, 3.3K OHMS, 2"/. 1/2W
RESISTOR, FIXED FILM, 220 OHMS, 2%, 1/2W
·
·
1
1
1
1
230106
261529
267751
269509
275379
261531
269517
230563
.1.1/107
A57
(R44)
31
(R45)
31
(R40)
17
(R39)
30
(R50) (R49)
31
31
(R48)
31
(R47)
31
(R46)
31
2I(R42)
32(R51)
19(R33)
22(R35)
20(34)
20(R54)
(R36)25
21 (R30)
(R52)33
18(R32)
(R43)26
22(R37)
(R55)25
19(R29)
23(R41)
(R53)34
19(R31)
(R26)22
21 (R27)
(R28)25
20(R20)
(RI2)25
17(R38)
(RI7)19
25(R25)
(RI6)28
28(R23)
20(R24)
(RI5)20
27(RI4)
(R22)17
24(RIIl
23(R9)
(RllI7
26(RI3)
(R21l17
19(RI0)
22(R7)
19(R8)
19(R3)
18(R2)
(RI8)29
(RI9)17
21
(R6)
4305-116-2
AS8
21
(R5)
20
(R4)
figure J6. Video Driver Module Assembly (Sheet 2 of 2)
FIG. &
INDEX
NUMBER
DESCRIPTION
DRAWING OR
PART NUMBER
RCA STOCK
NUMBER
QTY. NOTES
16
-25
-26
-27
-28
-29
-30
-31
-32
-33
-34
·
·
·
·
-35
-36
RESISTOR, FIXED FILM, 10K OHMS, 2%, 1/2W
RESISTOR, FIXED FILM, 2.2K OHMS, 2~, 1/2W
RESISTOR, FIXED FILM, 1.5K OHMS, 2%, 1/2W
RESISTOR, FIXED FILM, 15K OHMS, 2%, 1/2W
RESISTOR, FIXED FILM, 22K OHMS, 2"/0, 1/2W
RESISTOR, FIXED FILM, 33 OHMS, 2%, 1/2W
RESISTOR, FIXED FILM, 47 OHMS, 2%, 2W
RESISTOR, FIXED FILM, 15 OHMS, 2%, 2W
RESISTOR, FIXED FILM, 470 OHMS, 2"10, 2W
RESISTOR, VARIABLE, CARBON, 1K OHMS, 20%,
0.25W
SCREW
WASHER (NO. 4)
· NUT
· PRINTED
·
CIRCUIT BOARD
2187363-73
2187363-57
2187363-53
2187363-77
2187363-81
2187363-13
2187363-1017
2187363-1005
2187363-1041
2187585-3
990384-59
·93610-55
57435-53
2144564-1
261462
260609
269511
261454
269514
267752
262053
267775
267781
267687
5
2
1
2
1
1
7
1
1
1
1
1
2
1
.
. . . 1/107
A59
59
9
20 (T81)
( 81)57
II
20(T82)
18(RI)
18(R2)
18(R5)
18(R6)
18(R7)
18(R8)
19 (R3)
(C8)42
19(R41
(C7)41
(KI)25
(CI3)26
(C81) 24
22
54
(C3137
3 (AI)
4
40
(C6)
27
(C91
39
(C5)
56
(T85)
4305-117-1
Figure 17. Low Volt"ge Power Supply Assembly (Sheet I of 3)
A60
6
FIG. &
INDEX
NUMBER
17-
- 1
- 2
- 3
DESCRIPTION
POWER SUPPLY ASSY, LOW VOLTAGE 60 HZ
(SEE FIGURE 4 FOR NEA)
POWER SUPPLY ASSY, LOW VOLTAGE 50 HZ
(SEE FIGURE 4 FOR NEA)
COVER ASSY
ATTACH IN:; PARTS
SCREW, THD (4-40 x 0.25 LG)
·
·
·
- 4
- 5
·
- 6
·
---*--TERMINAL BOARD
ASSY, REGULATOR
(SEE FIGURE 18)
ATTACH IN:; PARTS
SCREW, PAN HD (6-32 x 0.38 LG)
WASHER, FLAT (NO. 6)
WASHER, LOCK (NO.6)
---*--TOP
· COVER,
ATTACHIN3 PARTS
THD (4-40 x
· SCREW,---*---
- 8
- 9
0.25 LG)
HEAT SINK MI'G
· BRACKET,
ATTACHING PARTS
· SCREW, THD (4_40 x 0.25
---*--HEAT SINK MI'G
· PLATE,
ATTACHING PARTS
FLAT
· SCREW,---*---
-10
-11
-12
-13
-14
-15
HI)
LG)
(4-40 x 0.25 LG)
SINK,·. TRANSISTOR (7 IN LG)
· HEAT
SINK, TRANS ISTOR (6 IN LG)
· HEAT
RECTIFIER, SILICON CONTROLLED
· TRANSISTOR
·
·· TRANSISTOR
TRANSISTOR
INSULATOR (USED ON CR17)
· BUSHING,
ATTACHIN:; PARTS
SCREW, PAN
(6-32 x 0.62 LG)
· BUSH
IN:; , INSULATOR
HI)
· (USED ON CRl,
•
•
•
•
·
-16
02, 03, 04, 05, 06, 07 AND 08)
DISK, INSULATOR (USED ON 02, 03, 05 AND 07)
DISK, INSULATOR (USED ON CRI7, 04, 06 AND
08)
WASHER, FLAT (NO. 6)
WASHER, LOCK (NO. 6)
LUG, TERMINAL
NUT, (6.32)
---*---
• HEAT SINK, DIODE
ATTACH IN:; PARTS
SCREW, PAN HD (4-40 x 0.38 LG)
WASHER, LOCK (NO. 4)
·
-17
RCA STOCK
NUMBER
QTY. NOTES
2110683-501
266999
REF
A
2110683-502
301295
REF
B
2144525-501
1
2187254-1
4
2112772-501
266988
990106-109
82278-104
93618-107
1
2
2
2
---*---
CONNECTOR, ELECT RECEPTACLE
ATTACHIN3 PARTS
SCREW, PAN HI) (6-32 x 0.38 LG)
• WASHER, FLAT (NO. 6)
WASHER, LOCK (NO. 6)
NUT, (NO. 6-32)
··
- 7
DRAWING OR
PART NUMBER
·
---*--· DIODE
ATTACHINJ PARTS
(10-32)
·· BUSHING,
INSULATOR
NUT
2187548-1
267691
1
990106-109
82278-104
93618-107
57435-104
2
2
2
2
2144123-1
1
2187254-1
6
2144522-1
1
2187254-1
4
214524-1
2
'8924635-105
8
2144120-1
2144120-2
2187540-1
2187344-1
2187337-1
40250
2187336-1
232628
1
1
1
1
4
3
16
267953
18
16
990106-115
2185812-4
276748
267796
267791
2185811-8
2185811-40
4
4
82278-104
93618-107
99061-5
57435-104
18
9
9
18
2144121-1
1
990104-109
93618-105
4
4
2187380-1
16
57435-106
2185812-8
267954
16
16
••••/10'
A61
(08)
(06)
15
15
14
(07)
14
(05)
(QI)
II
15
(04)
10
12
(CRI7)
figure 17. Low VoI,age Power Suppl, Assembl, (Shee' 2 of 3)
A62
(03)
14
13
14
(Q2)
FIG. &
INDEX
NUMBER
17
-18
-19
-20
·
·
·
·
·
·
·
·
-21
-22
-23
DRAWING OR
PART NUMBER
DESCRIPTION
DISK, INSULATOR
LUG,. TERMINAL
WASHER, FLAT (NO. 10)
WASHER, ;LOCK (NO. 10)
RESISTOR, POWER WW, .43 OHMS, 5", 2W
RESISTOR, FIXED WW, 2 OHMS, 5", 12W
TERMINAL STRIP
ATTACHIOO PARTS
SCREW, nAT an. (NO_ 4-40 x 0.25 LG)
WASHER,· LOCK (NO. 4)
NUT, (4-40)
---*--· GROMMET
PAN HD. (4-40
· SCREW,
NUT (4-40)
· SWITCH,
INTERLOCK
x 0.50
LG)
ATTACHIOO PARTS
SCREW, PAN HD. (NO. 6-32 x 0.25 LG)
WASHER, FLAT (NO. 6)
WASHER, LOCK (NO. 6)
-24
-25
··
·
·
·
·
·
---*---
-32
PAPE~ DIELE~RIC,
SCREW, PAN HD. (NO. 10-32
·· WASHER,
EXT TOOTH LOCK (NQ.
x 0.5 LG)
10)
LUG, RIOO
· GROUND
STRAP
·
·
·
·
·
·
-33
·
-34
·
·
8
8
8
1008816-1
990104-113
57435-103
2187581-1
AR
1
1
1
2~87584-1
FIXED, CERAMIC DIELECTRIC,
· CAPACITOR,
.1 UF, +80"-', -20%, 200 VDCW
FIXED, .CERAMlC DIELECTRIc,
· CAPACITOR,
.1 UF, +80%, -iO%, 50 VDCW
~APACITOR,
-31
16
16
16
16
6
2
4
8924635-105
93618-105
57435-103
2187584-2
2187369_1
;n87369-2
-27
-30
QTY. NOTES
267721
2
2
2
---*--~
CIRCUIT BREAKER
CIRCUIT BREAKER
RELAY, POWER
RELAY, POWER
ATTACHIOO P/l.RTS
NUT, (6-32)
WASHER, FLAT (NO, 6)
WASHER, LOCK (NO. 6)
FIXED/
· _10%,600 VDCW
-29
267711
267723
990106-105
82278-104
93618-107
-26
-28
2185811-20
2183287-2
82278-106
93618-112
2187533-1
2187534-1
99158-9
RCA STOCK
NUMBER
ATTACHIOO PARTS
SCREW, PAN HD. (1/4-20 x 0.75 LG)
WASHER, LOCK (NO. 1/4)
WASHER, EXT TOOTH (NO. 1/4)
NUT (1/4-20)
NUT (10-32)
WASHER, FLAT (NO. 10)
WASHER, LOCK (NO. 10)
WASHER, EXT TOOTH (NO. 10)
---*--BRACKET, CAPACITOR
ATTACHIOO PARTS
SCREW, PAN HD. (NO. 10-32 x 0.5 LG)
WASHER, EXT TOOTH LOCK (NO. 10)
0.1 UF,
267719
301360
267724
304084
1
1
1
1
57435_104
82278-104
93618-107
1
1
1
2187637-1
1
2187391-4
267730
1
2187391-2
267728
3
990140-113
93610-112
89Q2750-6
2144177-501
3
3
6
1
990139-117
93618-116
93610-116
57435-108
57435-106
82278-106
93618-112
93610-112
1
1
2
2
2144521-1
1
990140-113
93610-112
5
A
B
A
B
1
1
1
1
5
---*---
4 •• 1/107
A63
([3)
(E5)
( (1)
46(W3)
44
50
16
29
29
11
(CRI
THRU
CRI6)
33
41
30
28
(E6)
(W2)
(CII)
40
(E4)
32
29
(E2)
31
34
430 5-117-3
figure 17. Low Voltage Power Supply Assembly (Sheet 3 of 3)
A64
FIG. &
INDEX
NUMBER
17-35
-36
-37
-38
-39
-40
·
RCA STOCK
NUMBER
QTY. NOTES
2187366-8
266891
1
2187366-7
266890
1
2187366-6
266889
1
2187366-4
266887
1
2187366-3
266886
1
·
2187366-1
266884
1
·
·
··
990140-117
93610-112
8902750-6
2187640-2
2187710-403
CAPACITOR, FIXED, ELECTROLYTIC, 1,200 UF,
-10'~ +75%, 150 VDCW
• CAPACITOR, FIXED, ELECTROLYTIC, 1,300 UF,
-10% +75%, 100 VDCW
CAPACITOR, FIXED, ELECTROLYTIC, 23,000 Uj1',
-lO'~, +75%, 50 VDCW
CAPACITOR, FIXED, ELECTROLYTIC, 4,000 UF,
-10'~, +75%, 30 VDCW
CAPACITOR, FIXED, ELECTROLYTIC;:, 25,QOO UF,
-10'~, +75%, 25 VDCW
CAPACITOR, FIXED, ELECTROLYTIC, 7,000 UF
-10'~, +75%, 6 VDCW
ATTACHIN3 PARTS
SCREW, PAN HO. (NO. 10-32 -It 0.75 LG)
WASHER, EXT TOOTH LOCK NO. 10
LUG, RIN3
BEARIN3, SNAP-IN
SPACER
·
·
·
-41
DRAWING OR
PART NUMBER
DESCRIPTION
---*---
CAPACITOR, FI~, ELECTROLYTIO, 25,000,
_lO'~, +75%, 40 VDCW
ATTACHIOO PARTS
SCREW, PAN HO. (NO. 10-32 x 0.5 W)
WASHER, EXT TOoTH LOCK (NO. 10)
WASHER, FLAT (NO. 10)
• BEARIN:;, SNAP-IN
·
·
267964
1
1
2
1
1
266888
1
990140-113
93610-112
82278-106
2187640-1
267963
1
1
1
1
2187366-2
266885
1
2187366-5
---*---
-42
-43
-44
-45
FIXED, ELECTROLYTIC,
· CAPACITOR,
-10',"" +75%, 25 VDCW
· GROMMET
·• GROMMET
CLAMP, LOOP
ATTACHIN3 PARTS
NUT (10-32)
• WASHER, FLAT (NO. 10)
• WASHER, LOCK (NO. 10)
-46
-47
-48
-49
-50
-51
-52
-53
-54
-55
---*---
· CORD, FAN POWER
·· SPRIN3
FUSE, 3AG (3AMP)
FUSE HOLDER
· SCREW, PAN HO. (6-3f x
·· NUT,
(6-32)
5,500 UF,
982437-8
57421-5
8811154-41
1
1
2
57435-106
82278-106
93618-112
2
2
2
FLAT (NO.6)
· WASHER,
WASHER, LOCK (NO. 6)
WASHER, EXT TOOTH (NO. 6)
· GROMMET,
RELlEF
· CORD ASSY,STRAIN
ELECTRICAL
· . CONNECTOR, ELECT PLUG
·
2187509-2
2144122-1
990157-11
99088-2
990106-109
57435-104
82278-104
93618_107
93610-107
2187708-1
2187571_1
PLUG
8811154-30
·
·
990140-113
82278-106
93618-112
57435-106
0.38 W)
• CLAMP, LOOP
ATTACHIN3 PARTS
SCREW, PAN HO. (10-32 X O.!;Q LG)
WASHER, FLAT (NO. 10)
WASHER, LOCK (NO. 10)
NUT (10-32)
·
---*--ELECTROMAGNETIC INTER
· FILTER,
ATTACHIN3 PARTS
SCREW, PAN HO. (6_32
0.31 LG)
·· WASHER,
FLAT (NO.6)
· WASHER, LOCK (NO.6)
X
2187666-1
990106-107
82278-104
93618-107
267673
10907
48894
267694
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
267814
1
2
2
2
. . . ./10'
A65
.'
FIG. &
INDEX
NUMBER
·
17
-56
NUT (6-32)
TERMINAL STRIP
ATTACHING PARTS
·
(4-40)
WASHER, LOCK (NO.
4)
·
·· NUT
-58
·
Ai>b
!?7435-104
2
430764-9
1
57435-103
9'3618-105
4
4
2187750-1
2187509-1
267743
990106-109
93618-107
57435-104
(6:"32)
1
1
4
4
4
---*---
TRANSFORMER, POWER STEP-DOWN, S:j:NGLE
INPUT, 60 HZ
TRANSFORMER, POWER STEP-DOWN, MULTIPLE
INPUT, 50 HZ
ATTACHING PARTS
NUT, (NO. 10-32)
WASHER, FLAT (NO. 10)
WASHER, LOCK (NO. 10)
·
·
---*--CHASSIS, LOW VOLTAGE
· STUD
POWER SUPPLY
.
• 141/101
QTY. NOTES
---*--STRIP, TERMINAL MARKER
FAN, TUBE AXIAL
ATTACHING PARTS
SCREW, PAN HD. (6-32 x 0.38 LG)
WASHER, LOCK (NO. 6)
-57
RCA STOCK
NUMBER
---*--NUT
-59
-60
DRAWING OR
PART NUMBER
DESCRIPTION
2187364-1
266955
1
A
2187364-2
301359
1
B
57,435-106
82278-106
93618-112
4
4
4
2144516-501
8982926-9
1
3
A67
10 (02)
II
(R58)
(03)
10
33
(C 4)
(C2)
8
6
(CRill
10(07)
10(08)
(C5)
12(010)
(019) 14
13(012)
(C8) 7
2 (CR4)
(017) 14
8(C7)
(016)12
(CR3)
(CI0)9
(015)12
(C11)54
4305 - 11' - 1
8
(C9)
Figure 18. Low Voltage Power Supply Regulator Assembly (Sheet J of 2)
A68
FIG. &
INDEX
NUMBER
18-
1
2
3
4
5
- 6
- 7
- 8
- 9
-10
-11
-12
-13
-14
-15
-16
-17
-18
-19
-20
-21
-22
-23
-24
-25
DESCRIPTION
TERMINAL BOARD ASSY, REGULATOR
(SEE FIGURE 17 FOR NEAl
DIODE, IN4748
DIODE, 1N935
DIODE, 1N3255
DIODE,
~ACITOR, FIXED, MICA DIELECTRIC 2400 PF,
-5%, 500 VDCW
CAPACITOR, FIXED, CERAMIC DIELECTRIC,
10,000PF, ±20%, 1000 VDCW
CAPACITOR, FIXED, MICA DIELECTRIC 560 PF,
!-5%, 500 VDCW
CAPACITOR, FIXED, PLASTIC DIELECTRIC, .22 UF
!-20%, 75 VDCW
• CAPACITOR, FIXED, CERAMIC DIELECTRIC, .05 UF
+80%, -20%, 50 VDCW
TRANSISTOR, 2N2102
HEAT SINK (USED ON 01 AND Q2)
• TRANS ISTOR, 2N4036
TRANSISTOR, 2N4074
TRANS ISTOR, MM3906
TRANSISTOR, MM3904
PAD, TRANSISTOR MTG
RESISTOR, FIXED FILM, 1.21< OHMS, 2%, 2W
RESISTOR, FIXED FILM, 120 Omffi, 2%, 1W
RESISTOR, FIXED FILM, 2.2K OHMS, 2%, 1W
RESISTOR, FIXED FILM, 8.2K OHMS, 2"/0 , lW
RESISTOR, FIXED FILM, 11K OHMS, 2%, lW
RESISTOR, FIXED FILM, 56 OHMS, 2"/0, 1/2W
RESISTOR, FIXED FILM, 820 OHMS, 2%, 1/2W
RESISTOR, FIXED FILM, 12.1K OHMS, 1%, 1/2W
RESISTOR, VARIABLE, CARBON, 500 OHMS, 20%
0.25W
RESISTOR, FIXED FILM, 1.5K OHMS, 1%, 1/2W
·
DRAWING OR
PART NUMBER
2112772-501
RCA STOCK
NUMBER
266988/304781
QTY. NOTES
REF
2187384-1
2187381-1
2187537-1
2187539-1
2187356-158
267745
257071
225267
267710
300198
1
2
1
1
2
·
2187362-7
267703
1
·
2187356-143
218467
2
2187361-2
267726
4
2187391-1
261444
1
2187331-1
;2184113
2187341-1
2187335-1
2187343-1
2187342-1
2180896-1
2187363-1051
2187363-627
2187363-657
2187363-671
2187363-674
2187363-19
2187363-47
2187587-230
2187585-5
230214
267768
267770
261589
269508
236089
267689
6
2
8
2
2
1
19
2
1
1
1
2
8
2
1
1
2187587-143
267738
2
·
·
·
·
·
·
·
·
·
·
··
·
·
·
275841
267789
267795
267794
270825
285210
267764
4141/107
A69
(R8)
· 22
(RZ)
(RIO)
21
(R4) 18
(R3)17
(R33) 36
(R57}52
(R28}34
(R54)50
(R47) 46
(R55) 51
21 (R20)
(R30136
22(R21)
(R29135
(R52)34
(R56) 49
(R53127
(R39)
(R51l 49
(R45) 21
(R31l 21
(R41l43
(R48)39
4305-118-2
47
. (R49)
45
( R4 l?)
37
(R32)
45
(R44)
41
(R38)
48
(R50)
33
(R27)
Figure IS. Low Voltage Power Supply Regulator Assembly (Sheet 2 of 2)
A70
FIG. &
INDEX
NUMBER
18-26
-27
-28
-29
-30
-31
-32
-33
-34
-35
-36
-37
-38
-39
-40
-41
-42
-43
-44
-45
-46
-47
-48
-49
DESCRIPTION
·
·
·
·
·
·
·
RESISTOR FIXED FILM, 120 OHMS, 2%, 2W
RESISTOR, FIXED FILM, 470 OHMS, 2%, 1/2W
RESISTOR, . FIXED FILM, 5.6K OHMS, 2%, lW
RESISTOR, FIXED FILM, 51K OHMS, 2%, 1/2W
RESISTOR, FIXED FILM, 10K OHMS, 2%, 1W
RESISTOR, VARIABLE, CARBON, 250 OHMS, 20"10
0.25W
RESISTOR, FIXED FILM, 750 OHM~, 1%, 1/2W
RESISTOR, FIXED FILM, 100 OHMS, 2%, 1/2W
RESISTOR, FIXED FILM, 2.2K OHMS, 2%, 1/2W
RESISTOR, FIXED FILM, 22K OHMS, 2"/0 , 1/2W
RESISTOR, FIXED FILM, 11K OHMS, 2%, 1/2W
RESISTOR, FIXED FILM, 3.6K OHMS, 2%, 1/2W
RESISTOR, FIXED FILM, 7.5K OHMS, 1%, 1/2W
RESISTOR, VARIABLE, CARBON, 2.5K OHMS,
20"/0 , 0.25W
RESISTOR, FIXED FILM, 17.8K OHMS, 1%, 1/2W
RESISTOR, FIXED FILM, 470 OHMS, 2"/0 , 1W
RESISTOR, FIXED FILM, 24K OHMS, 2"/0, 1/2W
RESISTOR, FIXED FILM, -10K OHMS, 2"/0, 1/2W
RESISTOR, FIXED FILM, 12K OHMS, 2%, 1/2W
RESISTOR, FIXED FILM, 13K OHMS, 2"/0, 1/2W
RESISTOR, FIXED FILM, 15K OHMS, 1%. 1/2W
RESISTOR, FIXED FILM, 26.7K OHMS, 1%, 1!2W
RESISTOR, FIXED FILM, 806 OHMS, 1%, 1!2W
RESISTOR, FIXED FILM, 4.7K OHMS, 2"/0, 1!2W
DRAWING OR
PART NUMBER
RCA STOCK
NUMBER
QTY. NOTES
2187363-1027
2187363-41
2187363-667
2187363-90
2187363-673
2187585-2
267779
261119
267767
262044
267769
267686
2
2
1
1
2
1
2187587-114
2187363-25
2187363-57
2187363-81
2187363-74
2187363-62
2187587-210
2187585-4
236059
261529
260609
269514
267756
269895
236084
267688
1
2
3
1
2
1
1
2
2187587-246
2187363-641
2187363-82
2187363-73
2187363-75
2187363-76
2187587-239
2187587-263
2187587-117
2187363-65
236092
267765
262040
261462
269521
2677,,7
267741
237427
239167
230106
1
1
1
1
1
2
1
1
1
2
.141/101
A7l
FIG. &.
INDEX
NUMBER
1 t~- r, l)
-:l l
'ie,
-53
-54
.1.1/101
A72
DESCRIPTION
RI':S ISTOR, FIXED FILM, 110 OHMS, 1%, 1/2W
RES ISTOR, VARIADLE, CARBON, 100 OHMS, 20".4.
RES 1 S'I'O R, FIXED FILM, 51.1 OHMS, 1%, 1!2W
PRINTED CIRCUIT DOARD
CAPACITOR, FIXED ELECTROLYTIC, 20 UFo - 20".4
+150%, 6VDCW
DRAWING OR
PART NUMBER
RCA STOCK
NUMBER
2187587-34
2187585-1
2187587-2
2144574-1
2187355-6
237613
267685
236049
OTY. NOTES
1
1
1
1
1
A73
(RSI
10
(CR31
I
I
(CR21
4305-11'
Figure J9. Dynamic Focus Module Assembly
A74
I
(CRI)
FIG. &
INDEX
NUMBER
19- 1
- 2
- 3
- 4
- 5
- 6
- 7
- 8
- 9
-10
-11
-12
DESCRIPTION
MODULE ASSY, DYNAMIC FOCUS
(SEE FIGURE 4 FOR NHA)
DIODE, IN914
CAPACITOR, FIXED, CERAMIC DIELECTRIC,
10,000 PF, ± 200/., 1000 VDCW
CAPACITOR, FIXED CERAMIC DIELECTRIC, 1 UF,
+80%, -20%, 200 VDCW
CAPACITOR, FIXED, DISC CERAMIC, 5,000 PF,
:!200/., 3,000 VDCW
TRANSISTOR, 2N2102
PAD, T;{ANSISTOR M'ro
RESISTOR, FIXED FILM, 3.31< OHMS, 2%, 1/2W
RESISTOR, FIXED FILM, 910 OHMS, 2%, 1/2W
RESISTOR, FIXED FILM, 2201< OHMS, 2%, 1/2W
RESISTOR, FIXED FILM, 22K OHMS, 2%, 1/2W
RESISTOR, FIXED FILM, 4.3K OHMS, 2%, l/2W
SCREW, (NO. 4-40)
WASHER, EXT TOOTH (NO. 4)
NUT, (NO. 4-40)
PRINTED CIRCUIT BOARD
·
·
·
·
·
DRAWING OR
PART NUMBER
RCA STOCK
NUMBER
QTY. NOTES
2144178-501
267826
REF
2187382-1
2187362-7
229936
267703
5
1
2187391-4
267730
1
2187583-1
232716
1
2187331-1
2180896-1
2187363_61
2187363-48
2187363-105
2187363-81
2187363-64
990384-59
93610-55
57435-53
2144179-1
230214
270825
269517
262025
267761
269514
269518
1
1
1
2
1
1
1
1
l
2
1
.141/101
A7C,
(C21l
2
(R20)
5
(C22)
3
8 (Z2)
(C20) I
4 (RI THRU R19)
(e l THRU C19) 1
43 05 - 120
Figure 20. Keyboard Filter Module Assembly
A76
FIG. &
INDEX
NUMBER
20- 1
- 2
- 3
- 4
- 5
- 6
- 7
- 8
- 9
-10
DESCRIPTION
MODULE ASSY, KEYBOARD FILTER
(SEE FIGURE 4 FOR NHA)
CAPACITOR, FIXED, CERAMIC DIELECTRIC, 1 UF,
+80%, -200", 50 VDCW
CAPACITOR, FIXED, ELECTROLYTIC, 20 UF
-15%, +1500", 6 VDCW
CAPACITOR, FIXED, MICA DIELECTRIC 27 PF,
2%, 500 VDCW
RESISTOR, FIXED FILM, 47 OHMS, 2%, 1/2W
RESISTOR, FIXED FILM, 9.1K OHMS, 2%, 1/2W
RESISTOR, FIXED FILM, 620 OHMS, 2%, 1/2W
INTEGRATED CIRCUIT, BUFFER
INTEGRATED CIRCUIT
TERMINAL
PRINTED CIRCUIT BOARD
·
·
·
·
·
·
·
DRAWING OR
PART NUMBER
RCA STOCK
NUMBER
2165856-501
303455/301053
QTY. NOTES
REF
2187391-2
267728
20
2187355-1
266780
1
2187356-11
224287
1
2187363-17
2187363-72
2187363_44
2187269-1
2187679-1
2187686-1
2165857-1
267753
19
1
1
1
1
25
1
258560
266775
301054
301140
4'.'I 101
A77
(Z7)
14
(Z8)
16
(ZI2)
14
(ZI6)
17
(ZI9)
16
(Z27)
16
(Z23)
18
(Z36)
16
(Z31)
16
5(Z35)
16(Z48)
16(Z39)
19(Z43)
14(Z47)
15(Z34)
16(Z38)
19(Z42)
16(Z46)
16(ZI7)
18(Z21)
16(Z25)
14(Z29)
16(Z33)
16(Z45)
19(Z4/l
14(Z37)
HCRI2)
I(CR6)
I(CRII)
l(eRI3)
HeRI4)
HCR7)
/(eR9)
(eR8)
/(CR5)
12
(R8)
13
(R9)
I(CRIO)
4
(C2)
2
(CR3)
I(CRI5)
3
(el)
Figure 2 J• Station Selection Module Assembly
A78
FIG. &
INDEX
NUMBER
21-
- 1
- 2
- 3
- 4
- 5
- 6
_ 7
- 8
- 9
-10
-11
-12
-13
-14
-15
-16
-17
-18
-19
-20
-21
DESCRIPTION
70/752 STATION SELECTION MODULE SF5707
(SEE FIGURE 1 FOR GENERAL ASSY)
MODULE ASSY, 70/752 STATION SELECTION
DIODE, 1N914
DIODE, 1N958B
FIXED, ELECTROLYTIC, 20 UF
· CAPACITOR,
- 200/0, +1500/0, 6 VDCW
CAPACITOR, FIXED CERAMIC DIELECTRIC,
0.1 UF, -20, +800/0, 50 VDCW
CAPACITOR, FIXED ELECTROLYTIC, 20 UF,
-20, +1500/0, 50 VDCW
TRANSISTOR,
TRANS ISTOR, 2N4074
PAD, TRANSISTOR MIG
RESISTOR, FIXED FILM, 3.6K OHMS, 2%, 1/2W
RESISTOR, FIXED FILM, 180K OHMS, 2"/0, 1/2W
RESISTOR, FIXED FILM, 1.5K OHMS, 2"'{', 1/2W
RESISTOR, FIXED FILM, 620 OHMS, 2%, 2W
RESISTOR, FIXED FILM, 120 OHMS, 2%, 1/2W
RESISTOR, FIXED FILM, 2.4K OHMS, 2%, 1W
INTEGRATED CIRCUIT, QUAD TWO LOGIC GATE
INTEGRATED CIRCUIT, DIODE LOGIC GATE
EXPANDER
INTEGRATED CIRCUIT, DUAL FOUR LOG IC GATE
INTEGRATED CIRCUIT, BUFFER
INTEGRATED CIRCUIT, SINGLE FLIP-FLOP
INTEGRATED CIRCUIT, DUAL FLIP-FLOP
TERMINAL BOARD, STATION SELECT MODULE
• PHOTOMASTER, VT51
RESISTOR, FIXED FILM, 200 OHMS, 2"/0 , 1/2W
DRAWING OR
PART NUMBER
RCA STOCK
NUMBER
QTY; NOTES
REF
MI2100306
2187382-1
229936
·
·
··
2187354-1
2187355-1
267744
266780
1
14
2
1
2187391-2
267728
3
· ·
·
2187355-3
266782
2
2187333-1
2187335-1
2180896-1
2187363-62
2187363-103
2187363-53
2187363-1044
2187363-27
2187363-658
267788
267789
270825
269895
122117
269511
267782
262016
258745
266776
266778
2
2
4
3
2
2
2
2
2
9
3
266773
266775
266777
266774
23
4
4
5
1
1
1
·
·
·
·
·
·
·
·
·
·
·
~187270-1
·
2187272-1
·
2187267-1
2187269-1
2187271-1
2187268-1
2165471-8
2144566
2187363-32
·
·
·
· ·
·· ·
261530
4141/107
A79
(Tei)
14
(Oil
4
(RS) · (R9)
7
.8
(C3)
3
(OZ)
4
(C4)
3
(R!Z)
8
(RII)
7
(RIO)
·6
(R3)
5
(R2)
5
(RS)
5
(U)
5
(RI4)
5
(Rt)
5
(e2)
(Ct)
(RI3)
(R6)
II (ZZ!)
II (ZI7)
(Z45) II
10(ZI3)
(Z41) II
IZ(Z9)
II (Z5)
9 (ZI)
(Z33)
10(ZZ)
(ZZ9) II
IOtz6)
10 (ZIO)
(ZZ6)
(Z46)
II (Z221
If
(Z48)
12
(Z44)
II
(Z40)
9
(Z36)
II
(Z32)
II
II
(Z24)
(Z20)
II
(Z27)
II
(Z23)
10
(ZI9)
figure 22. Marie format Module Asse!""'y
ABO
13
(ZIS)
10
(ZII)
10
(Z7)
t
(Z3)G
FIG. &
INDEX
NUMBER
22-
- 1
- 2
- 3
- 4
- 5
- 6
- 7
- 8
- 9
-10
-11
-12
-13
-14
DESCRIPTION
70/752 MARK FORMAT MODULE SF5710
(SEE FIGURE 1 FOR GENERAL ASSY)
LENS, SWITCH CAP
MODULE ASSY, 70/752 DATA FORMAT
INTEGRATED CIRCUIT, DUAL FLIP-FLOP
CAPACITOR, FIXED ELECTROLYTIC, 20 UF
-20%, +150"/0, 6 VDCW
CAPACITOR, FIXED CERAMIC DIELECTRIC,
0.1 UF -20"/0, +80"/0 50 VDCW
TRANSISTOR, 2N4074
PAD, TRANSISTOR MTG
RESISTOR, FIXED FILM, 200 OHMS 2%, 1/2W
RESISTOR, FIXED FILM, 4.3K OHMS 2%, 1/2W
RESISTOR, FIXED FILM, 1.8K OHMS 2%, 1/2W
• RESISTOR, FIXED FILM, 51 OHMS 2"/0, 1/2W
INTEGRATED CIRCUIT, DUAL FLIP-FLOP
INTEGRATED CIRCUIT, QUOD TWO LOGIC GATE
INTEGRATED CIRCUIT, DUAL FOUR LOGIC GATE
INTEGRATED CIRCUIT, DIODE LOGIC GATE
EXPANDER
INTEGRATED CIRCUIT, BUFFER
TERMINAL BOARD, MARK FORMAT MODULE
PHOTOMASTER, VT41
·
·
·
·
··
··
·
·· ·
·
··
··
·· ·
··
·
·
DRAWING OR
PART NUMBER
RCA STOCK
NUMBER
MI2100309
QTY. NOTES
REF
2187376-3
2112705-501
2187268-2
2187355-1
301555
301660
302085
266780
1
1
1
1
2187391-2
267728
3
2187335-1
2180896-1
2187363-32
2187363-64
2187363-55
2187363-18
2187268-1
2187270-1
2187267-1
2187272-1
267789
270825
261530·
269518
269513
269504
266774
266776
266773
266778
1
2
8
2
2
2
4
19
20
3
2187269-1
2165471-7
2144569
266775
1
1
1
A81
(VI)
(C5)
33·
6
(R2)
21
(C9)
9
(RI2)
29
(R6)
24
(R8)
26
II(Q3) (RI3)
12
29
(C II)
8
13 (Q5)
IS
(RI5)
°IS ·
(RI6)
19
(nl)
40
(CR4)
(CRS)
(RI8)
(CRI)
(ll)
(Q7)
(CIO)
(RW)
(CI2)
(CI4)
(Z34) 37
(Z30) 37
(Z26) 37
39
39
(Z28)
(Z23)
4505-125
figure 23. Printer Adapter Module Assembly
A82
,,
FIG. &
'NDEX
NUMBER
23-
-
1
-
2
- 3
- 4
- 5
- 6
- 7
- 8
- 9
-10
-11
-12
-13
-14
-15
-16
-17
DESCRIPTION
70/752 PRINTER ADAPTER MODULE SF5711
(SEE FIGURE 1 FOR GENERAL ASSr)
PRINTER, TELETYPE (REFERENCE vl~Y, NOT
SUPPLIED ON THIS MASTER ITEH)
PRINTER, TELETYPE (REFERENCE ONLY, NOT
SUPPLIED ON THIS MASTER ITErl)
COUPLER, TELETYPE DATA (REFERENCE ONLY,
NOT SUPPLIED ON THIS MhSTER ITEM)
• CABLE ASSY, PRINTER ADAPTER
• CONNECTOR, ELECT PLUG
• • CONTACT, ELECT PLUG
CONTACT, ELECT PLUG
• CABLE, ELECT (15 FEET)
• LENS, SWITCH CAP (SUPPLIeD WITH LAMP
PiN Tl-3/4)
• MODULE ASSY, PRINTER ADAPTER
• DIODE, 1N914
• • DIODE, 1N958B
• CAPACITOR, FIXED, ELECTROLYTIC, 20 UF
-20"/., +50%, 6 VDCW
CAPACITOR, FIXED, ELEC'I'ROLYTIC, 20 UF
-20"/., +50"/., 50 VDCW
CAPACITOR, FIXED MICA DIELECTRIC, 33 PF,
2%, 500 VDCW
• CAPACITOR, FIXED MICA DIELECTRIC,
2400 PF, 2%, 500 VDCW
• CAPACITOR, FIXED MICA DIELECTRIC, 820 PF,
2%, 500 VDCW
CAPACITOR, FIXED CERAMIC DIELECTRIC,
0.1 UF, -20"/., +80"/., 50 VDCW
• • CAPACITOR, FIXED CERAMIC DIELECTRIC,
0.05 UF, -20"/., +80%, 50 VDCW
• • INDUCTOR, RF, 100 UH
TRANSISTOR
• • PAD, TRANSISTOR Ml'G
• • TRANSISTOR
• • TRANSISTOR, 2N4074
• PAD, TRANSISTOR Ml'G
• RESISTOR, FIXED FILM, 200 OHMS, 2"/., 1/2W
• RESISTOR, FIXED FILM, 1.81< OHMS, 2%,1/2W
DRAWING OR
PART NUMBER
RCA STOCK
NUMBER
oTY. NOTES
MI2100307
REF
MODEL 33
REF
MODEL 35
REF
198420
REF
2112703-502
2187573-1
2187573-2
2187644-1
<.010875-10
B6-1178-1
1
267961
267962
267965"
1
2
2
1
1
2112707-501
2187382-1
2187354-1
2187355-1
301662
229936
267744
266780
1
4
1
2
2187355-3
266782
4
2187356-13
267706
1
2187356-58
230056
1
2187356_47
921435
1
2187391-2
267728
6
2187391-1
261444
1
2187531-30
2187379-1
2180896-21
2187333-1
2187335-1
2180896-1
2187363-32
2187363-55
267715
267797
267722
267788
267789
270825
261530
269513
1
4
4
1
2
3
1
1
.8.1/107
A8)
FIG. &
INDEX
NUMBER
DESCRIPTION
21-18
-19
-20
-21
-22
-23
-24
-25
-26
-27
-28
-29
-30
-31
-32
-33
-34
-35
-36
'. ·
··
· ·
-37
-38
-39
-40
··
·· ··
··
··
A84
RESISTOR, FIXED FILM, 51 OHMS, 2%, 1/2W
RESISTOR, FIXED FILM, 4.3K OHMS, 2%, 1/2W
RESISTOR, FIXED FILM, 1K OHMS, 2"", 1/2W
RESISTOR, FIXED FILM, 620 OHMS, 2%, 1/2W
RESISTOR, FIXED FILM, 160 OHMS, 2%, 1/2W
RESISTOR, FIXED FILM, 510 OHMS, 2%, 1/2W
RESISTOR, FIXED FILM, 680 OHMS, 2%, lW
RESISTOR, FIXED FILM, 2K OHMS, 2%, 1W
RESISTOR, FIXED FILM, 910 OHMS, 2%, 1W
RESISTOR, FIXED FILM, 47 OHMS, 2%, 1/2W
RESISTOR, FIXED FILM, 390 OHMS, 2%, '2W
RESISTOR, FIXED FILM, 390 OHMS, 2%, 1/2W
• RESISTOR, FIXED FILM, 620 OHMS, 2"", 2W
• RESISTOR, FIXED FILM, 120 OHMS, 2%, 1/2W
RESISTOR, FIXED FILM, 2.4K OHMS, 2%, 1W
CRYSTAL, QUARTZ
INTEGRATED CIRCUIT, BUFFER
INTEGRATED CIRCUIT, SIOOLE FLIP-FLOP
INTEX;RATED CIRCUIT, DIODE LOGIC GATE
EXPANDER
INTEGRATED CIRCUIT, DUAL FLIP-FLOP
INTEX;RATED CIRCUIT, DUAL FOUR LOG IC GATE
INTEGRATED CIRCUIT, QUAD TWO LOGIC GATE
TERMINAL BOARD, PRINTER MODULE
• PHOTOMASTER, VT61
· ·
·
·
·
·
·
·
·
·
·
·
·
·
··
·
··
·· ··
··
DRAWING OR
PART NUMBER
RCA STOCK
NUMBER
QTY. NOTES
2187363-18
2187363-64
2187363-49
2187363-44
2187363-30
2187363-42
2187363-645
2187363-656
2187363-48
2187363-17
RL42AD391G
2187363-39
2187363-1044
2187363_27
2187363-658
2187553-1
2187269-1
2187271-1
2187272-1
2695,04
269518
269509
258560
269505
261590
264811
267766
262025
267753
261455
267782
262016
258745
267709
266775
266777
266778
3
2187268-1
2187267-1
2187270-1
2165471-6
2144571
266774
266773
266776
6
1
1
3
1
1
3
1
1
1
1
1
1
1
1
1
2
2
1
14
14
1
1
FIG. &
INDEX
NUMIER
24-
-
1
_ 2
_
5
3
4
5
6
DRAWING OR
PART NUMIER
DESCRIPTION
CABLE ASSY, S FOOT KEYBOARD EXTENSION
(SEE FIGURE 1 FOR GENERAL ASSY)
CABLE ASSY, 10 FOOT KEYBOARD EXTENSION
(SEE FIGURE 1 FO R GE NERAL ASSY)
CABLE ASSY, 15 FOOT KEYBOARD EXTENSION
(SEE FIGURE 1 FOR GENERAL ASSY)
CABLE ASSY, 20 FOOT KEYBOAIID EXTENSION
INSULATOR, ELECT SOCKET
INSULATOR, ELECT PIN
HOOD, ELECT CONNECTOR
GUIDE. PIN
GUIDE, SOCKET
CABLE. KEYBOARD EXTENSION
3
RCA STOCK
NUMBER
QTY. NOTES
2112704_501
REF
2112704-502
REF
2112704-503
REF
2112704_504
2187512-1
2187512-2
2187512-9
2187512-8
21B7512_7
21B7374_1
267690
228243
22B244
REF
1
1
2
2
2
1
6
2
4
70/752 ·0405
figure 24. Key.oard btension Ca.'e Assem.'y SF 5713
A-8S
R-l
10
21
16
•
Figure 25. RCA High Voltage Power Supply, Al3
A86
R-1
FIG. &
INDEX
NUMBER
25-
-1
-2
DESCRIPTION
DRAWING OR
PART NUMBER
QTY. NOTES
HIGH VOLTAGE POWER SUPPLY (RCA)
(ASSEMBLY Al3 OF 70/752 VIDEO DATA TERMINAL)
SCHEMATIC
2166024.503
REF
2166110
REF
• Al MODULE ASSY., HIGH VOLT AGE DRIVER
• A2 MODULE ASSY., -1.8KV REGULATOR
ATTACHING PARTS
CONTACT
2166051.502
2166049.501
1
1
2187548.2
1
2166092.502
2166094.501
1
1
57435-54
93610-57
1
1
2166107.503
1
8982998.12
57435-53
93610-55
3
3
2166102-503
1
---*---3
-4
RCA STOCK
NUMBER
• A3 MODULE ASSY., 12KV REG/SYNC CONVERTER
• A4 MODULE ASSY., HIGH VOLTAGE FOCUS
ATTACHING PARTS
NUT, HEX (NO. 6-32)
WASHER, EXT. TOOTH (NO.6)
---*---5
• AS MODULE ASSY., TRANSFORMER INTERFACE
ATTACHING PARTS
LUG, TERMINAL (NO.4)
NUT, HEX (NO. 4-40)
WASHER, EXT. TOOTH (NO.4)
2
---*---6
-7
-8,-9
• A6 MODULE ASSY" LOW VOLTAGE INTERFACE
ATTACHING PARTS
NUT, HEX (NO. 6-32)
SCREW, THD CUT (NO. 6-32 x .31 La)
STRAP, RETAINING-CABLE
WASHER, EXT TOOTH (NO.6)
A7 MODULE ASSY., HIGH VOLTAGE MULTIPLIER
• C1, C2 CAPACITOR FIXED
.05 uf, 3KV
ATTACHING PARTS
LUG, TERMINAL (NO.8)
NUT, HEX (NO. 8-32)
WASHER, EXT. TOOTH (NO.8)
57435-54
1402672-134
2183004.301
93610-57
2166109-501
2187832-1
8982998-15
57435-55
93610-59
2
2
2
2
1
2
2
4
4
---*---10
• CHASSIS
ATTACHING PARTS
LABEL - DANGER HIGH VOLTAGE
2166057.501
2184092.5
1
218548-1
4
8924639-113
990303-64
8
---*---11 thru • XA1, 2. 3, 4 CONNECTOR, RECEPTACLE
.14
ATTACHING PARTS
SCREW, FL HD (NO. 6-32 x .50 LG)
NUT, SPRING -U TYPE (NO. 6-32)
8
---*---15
-16
• XA6 CONNECTOR RECEPTACLE
• COVER
ATTACHING PARTS
SCREW, THD CUT (NO. 4-40 x .31 LG)
2187548-1
2166064-1
1
1402672-114
4
1
---*---17
• E1 SCREW, THD FORM (NO. 4-40 x .38 LG)
ATTACHING PARTS
WASHER, EXT. TOOTH (NO.4)
2187254-2
93610-55
---*---18
-19
-20
• E3 srRAP, GROUNDING
• KNOB
• Rl RESIsrOR, FIXED
22K OHMS, ± 2%, 2W
ATTACHING PARTS
LUG, TERMINAL (NO.8)
2166081·1
2166076-501
2187363-1081
1
1
1
8982998-15
2
---*---21
• T1 TRANSFORMER -6V
ATTACHING PARTS
CABLE, H.V. AWG NO. 24
DECAL, (WARNING)
NUT, HEX (10-32)
SPACER, HEX (10-32 x 1.00 LG)
TERMINAL
WA>;HF.R
EXT
T()()'l'H (NO
10 I
2166250-2
2010706-206
2166226-1
57435-56
82207-11
2187864-1
93610-62
AR
1
1
1
1
2
4.4'/107
AB7
R-l
18
ASSY RCA
@
Q10~REF
::216E®~~VO
NUT (NO.2)
~~.
~
- -" -I . :
;. -
"...0··. -;;;;;;.~b -
• ," ," , ... ,'. r." ,'. .' .. ',_ , . .
~
THERMAL COMPOUND BOTH
SIDES OF MICA INSULATOR
•
:::
.
WASHER INr. TOOTH (NO.2)
I : ..... '
MICA INSULATOR FURNISHED
WITH TRANSIsrOR
2-56 SCREW
figure 26. AJ Module Assy., Hig' VoI'"ge Driver
ABS
R_
FIG. &
INDEX
NUMBER
26-
DESCRIPTION
MODULE ASSY., HIGH VOLTAGE DRIVER
(ASSEMBLY A1 OF RCA H.V.P.S. 2166024)
·
·
DRAWING OR
PART NUMBER
RCA STOCK
NUMBER
QTY. NOTES
2166051-502
REF
SCHEMATIC
2166110
REF
C1, C4 CAPACITOR, FIXED
1000 pf ± 5%. 500V
c2, C3 CAPACITOR, FIXED
0.47 uf ± 20%, 75V
C5 CAPACITOR, FIXED
15 uf +150 -10%, 50V
C6, C8 CAPACITOR, FIXED
0.1 uf +50 -20%, 100V
C7 CAPACITOR, FIXED
8 uf +100 -10%, 50V
CR1, CR8 DIODE, SEMTECH SCTE-1
CR2 - CR7 DIODE, 1N914
01,03,Q8,010 TRANSISTOR, RCA 40513
ATTACHING PARTS
COMPOUND THERMAL
NUT (NO. 2)
SCREW (2-56 x .250)
WASHER, INT. TOOTH (NO. 2 )
2187356-149
2
2187361-4
2
2187355-6
1
2187841-7
2
2187846-5
1
2187823-1
2187382-1
2187821-1
2
6
4
2188248-1
2188267-l3
990102-55
93611-53
AR
8
8
8
---*--02,04,07,09 TRANSISTOR 2N5189
ATTACHING PARTS
PAD, MOUNTING
2187617-1
4
2160896-1
4
2187343-1
2167363-33
2
4
2187363-49
2
82283-559
4
2187363-670
2
2187363-39
2
2187363-57
2
2187363-25
2
2187363-46
1
2187363-53
2
2166052-1
1
---*---
06 TRANSISTOR 2N3906
· OS,
R1,R5,R17,R21 RESISTOR, FIXED
220 OHMS
±
2%, l.;;w
R20 RESISTOR, FIXED
· R2,
1K OHMS ± 2%, l.;;W
RESISTOR, FIXED
· R3,R4,R18,R19
2.2 OHMS ± 5%, l.;;w
·
R6, R16 RESISTOR, FIXED
7.5K OHMS ± 2%, 1W
R7, R15 RESISTOR, FIXED
390 OHMS ± 2%, l.;;W
R8, R14 RESISTOR, FIXED
2.2K OHMS ± 2%, l.;;W
R9, R13 RESISTOR, FIXED
100 OHMS ± 2%, l.;;w
R10 RESISTOR, FIXED
750 OHMS ± 2%, l.;;w
R11, R12 RESISTOR, FIXED
1. 5K OHMS ± 2%, ~W
PRINTED CIRCUIT BOARD
414a/107
1>.89
R-l
18
, II
.-1
RI
~
..j
R2
f-.
~
R3
~
R4
~
R5
~
~6
~
R7
0
~® ~
r.
r.
~()Ol
~OD~
~
.
f-.
f-.
-
~
02
a3~
~
0=
•
I
WI
_
•
I
figure 27. A2 Modu'e Assy., -l.B Kv Regu'ator
A90
C2
8~~,!~~-~'o,~;~~~ ~~~~
70/752-0210
•
C3
0
-
R 1
FIG. &
INDEX
NUMBER
27-
DESCRIPTION
DRAWING OR
PART NUMBER
RCA STOCK
NUMBER
QTY. NOTES
MODULE ASSY., -1.8KV REGULATOR
(ASSEMBLY A2 OF RCA H.V.P.S. 2166024)
2166049-501
REF
SCHEMATIC
C1 thru C5 CAPACITOR, FIXED
0.1 uf +80 -20%, 100V
COATING, CONFORMAL
CR1 DIODE, 1N937A
CR2, CR3 DIODE, 1N914
01, 02 TRANSISTOR, 2N3906
03 TRANSISTOR, 2N3904
• Rl thru R6 RESISTOR, FIXED
287K OHMS ± 1%, ~W
R7 RESISTOR, FIXED
35.7K OHMS ± 1%, ~W
R8 RESISTOR, VARIABLE
2K OHMS ± 10%, 3/4W
R9 RESISTOR, FIXED
3.16K OHMS ± 1%, ~W
RIO RESISTOR, FIXED
820 OHMS ± 2%, ~W
Rl1, R12 RESISTOR, FIXED
10K OHMS ± 2%, ~W
R13 RESISTOR, FIXED
lOOK OHMS ± 2%, ~W
R14, R15 RESISTOR, FIXED
47 OHMS ± 2%, ~W
R16 RESISTOR, FIXED
lOOK OHMS ± 2%, ~W
R17 RESISTOR, FIXED
1.5K OHMS ± 2%, ~W
R18, R19 RESISTOR, FIXED
2.2K OHMS ± 2%, ~W
R20 RESISTOR, FIXED
2.7K OHMS ± 2%, ~W
R21, R22 RESISTOR, FIXED
47 OHMS ± 2%, ~W
R23 RESISTOR, FIXED
1K OHMS ± 2%, ~W
R24 RESISTOR, FIXED
220 OHMS ± 2%, ~W
R25 RESISTOR, FIXED
100 OHMS ± 2%, ~W
Zl INTEGRATED CIRCUIT, CA3018
PRINTED CIRCUIT BOARD
2166110
2187841-7
REF
5
2188335
2187525-1
2187382-1
2187343-1
2187342-1
990476-545
AR
1
2
2
1
6
990476-454
1
2187835-6
1
990476-349
1
2187363-47
1
2187363-73
2
·
2187363-97
1
·
2187363-17
2
2187363-97
1
2187363-53
1
·
2187363-57
2
·
·
·
2187363-59
1
2187363-17
2
2187363-49
1
2187363-33
1
2187363-25
1
2187808-1
2166050-1
1
1
·
·
·
·
·
·
41.1/101
A91
R-l
18
701752-D201
•
Fi,ure
A92
2..
A3 Module Assy., '21, R.,I S,nc Conve,'"
R_
FIG. &
INDEX
NUMBER
28-
DESCRIPTION
MODULE ASSY., 12KV REGULATOR/SYNC CONVERTER
(ASSEMBLY A3 OF RCA H.V.P.S. 2166024)
SCHEMATIC
• C1. C2 CAPACITOR. FIXED
.05 uf, +80 -20%. 100V
•. C3. C4 CAPACITOR. FIXED
0.1 uf, +80 -20%. 100V
•. C5 CAPACITOR. FIXED
4700 pf ± 5%. SOOV
C6 CAPACITOR. FIXED
100 pf ± 5%. SOOV
CR1 thru CR12 DIODE. 1N914
CR13 DIODE, 1N937A
E1 CIRCUIT JUMPER (TP1)
01. 02 TRANSISTOR 3N128
03. 04 TRANSISTOR 2N3906
06 thru 08 TRANSISTOR 2N3904
R1 RESISTOR, FIXED
511K OHMS ± 1%. ~W
R2. R8 RESISTOR, FIXED
1.SK OHMS ± 2%. ~W
• R3. R9 RESISTOR, FIXED
100 OHMS ± 2%, ~W
• R4 RESISTOR, FIXED
1.2K OHMS ± 2%. ~W
• R6 RESISTOR, VARIABLE
SOK OHMS ± 10%, 3/4W
R7 RESISTOR. FIXED
10K OHMS ± 2%. ~W
R10, RESISTOR, FIXED
1K OHMS ± 2%, ~W
• Rll RESISTOR. FIXED
3.3K OHMS ± 2%. ~W
R12, R14 RESISTOR, FIXED
10 OHMS ± 2%, ~W
• R17.· R20 RESISTOR, FIXED
8.2K OHMS ± 2%, ~W
• R18 RESISTOR, FIXED
lOOK OHMS ± 2%, ~W
R19, R24 RESISTOR, FIXED
200K OHMS ± 2%, ~W
R21, R22 RESISTOR, FIXED
1K OHMS ± 2%, ~W
R23 RESISTOR, FIXED
10K OHMS ± 2%, ~W
• R25 RESISTOR, FIXED
4.7K OHMS ± 2%. ~W
R26 RESISTOR, FIXED
180K OHMS ± 2%, ~W
• PRINTED CIRCUIT BOARD
·
·
·
·
·
·
·
DRAWING OR
PART NUMBER
RCA STOCK
NUMBER
QTY. NOTES
2166092-502
REF
2166110
REF
2187841-2
2
2187841-7
2
2187356-165
1
2187356-125
1
2187382-1
2187525-1
2166251-1
2187825-1
. 2187343-1
2187342-1
990476-569
12
1
1
2
2
3
1
2187363-53
2
2187363-25
2
2187363-51
1
2187835-14
1
·
2187363-73
1
·
2187363-49
1
2187363-61
1
2187363-1
2
2187363-71
2
2187363-97
1
2187363-104
2
2187363-49
2
2187363-73
1
2187363-65
1
2187363-103
1
2166093-1
1
·
·
·
·
·
.'.1/101
A93
R-l
FIG. ,
INDEX
NUM.ER
29-
DRAWING OR
PART NUMBER
DESCRIPTION
MODULE /\Ssy. ,. HIGH VOLTAGE FOCUS
(/\sSEMBLY A4 OF RCA H.V.P.S. 2166024)
SCHEMATIC
• CRl DIODE, 1N3563
• CR2, CR3 DIODE, lN992B
• COATING, CONFORMAL
• E1 SCREW (NO. 6-32 x .375)
• NUT (NO.6)
• R1 RESISTOR, FIXED
12MEG OHMS ± 5" lW
• R2 RESISTOR, VARIABLE
5MEG OHMS ± 20% 2W
• W/\sHER, FLAT
• W/\sHER, LOCX
• NUT, (.375-32)
• R3 RESISTOR, FIXED
8.7MEG OHMS ± 5" 1W
• R4 thru R6 RESISTOR, FIXED
220K OHMS ± 20" 2W
• PRINTED CIRCUIT BOARD
RCA STOCK
NUMBER
2166094-501
REF
2166110
2187822-1
2187881-1
2188335
990106-59
57435-54
2187838-2
REF
1
AIR
1
1
1
2187836-1
1
82278-125
93610-122
59149-106
2187838-1
1
1
1
1
2187363-1105
1
2166095-1
1
2
n,
R2 Rtt.
RI
®
~'"
E-I
o
o
70/752-D201
•
fi,ure 29. A4 Modul, Ass,.,
A94
QTY. NOTES
HI,. Vo'""
focus
R- 1
FIG. &
INDEX
NUMBER
30-
DESCRIPTION
MODULE ASSY.. TRANSFORMER HITERF ACE
(ASSEMBLY A5 OF RCA H.V.P.S. 2166024)
··
·
RCA STOCK
NUMBER
DRAWING OR
PART NUMBER
QTY. NOTES
2166107-503
REF
SCHEMATIC
2166110
REF
CR2 DIODE
El thru E3 SCREW (4-40 x .375)
ATTACHING PARTS
NUT (NO.4)
PRINTED CIRCUIT BOARD
2187824-1
990104-59
1
3
57435-53
2166108-1
3
1
@
£-3
o
@
[-I
@ o
[-2
70/702·D207
fi,ure 30. AS Module Assy., Transformer Interface
A95
•
-
R 1
,.
FIG. &
INDEX
NUMBER
31-
DRAWING OR
PART NUMBER
DESCRIPTION
2166102-503
REF
2166110
REF
• CR1 DIODE, 6.8V ± 5% 1W
• E1, E2 SCREW (NO. 6-32 X .375)
ATTACHING PARTS
NUT (NO.6)
2187873-103
990106-59
1
2
57435_54
2
2166103-1
1
• PRINTED CIRCUIT BOARD
IW1<-·I~
W3
To/nZ'DlI2
figure 31. A6 Module Assy., I.4Jw VoI'ag. ''''erfac.
A96
QTY. NOTES
MODULE ASSY., LOW VOLT AGE INTERFACE
(ASSEMBLY A6 OF RCA H.V.P.S. 2166024)
SCHEMATIC
---*---
•
RCA STOCK
NUMBER
-
R 1
FIG. &
INDEX
NUMBER
32
DRAWING OR
PART NUMBER
DESCRIPTION
MODULE ASSY., HIGH VOLTAGE MULTIPLIER
(ASSEMBLY A7 OF RCA H.V.P.S. 2166024)
SCHEMATIC
·
NOTE:
RCA STOCK
NUMBER
QTY. NOTES
2166109-501
REF
2166110
REF
C1, C2 CAPACITOR, FIXED
.01 uf GMV, 3KV
• C3 thru C9 CAPACITOR, FIXED
.002 uf GMV, 6KV
CR1 thru CR9 DIODE
2187847-1
2
2187847-2
7
·
2187824-1
9
• R1 RESISTOR, FIXED
2.2MEG OHMS ± 5%, 2W
• R2 RESISTOR, FIXED
1000MEG OHMS ± 15%, 6W
ATTACHING PARTS
CABLE, HIGH VOLTAGE
AWG NO. 24
COATING, CONFORMAL
CONTACT
LEAD, ELECT, ANODE
LUG, TERMINAL (NO. 4 MINIATURE)
LUG, TERMINAL
STRAP, RETAINING, CABLE
• COMPONENT BOARD
99126-239
1
2187840-1
1
2010706-206
AR
2188335-1
2'187548-2
2166255-1
8982998-3
8982998-12
2183004-301
2166187-501
AR
3
1
1
1
1
1
REPAIR OF THIS MODULE IS NOT RECOMMENDED,
HOWEVER WHEN REPAIRS ARE MADE THE CONFORMAL
COATING MUST BE REPLACED TO PREVENT ARCING.
R2
fIr
tr --
10/1~Z
-~--':a#
-0206
Figure 32. A7 Module Assy., High Voltage Multiplier
A97
•
APPENDIX B
VENDOR PARTS INFORMATION
ASTRO-METRIXCORP. - PARTS LIST
AMC-M-227 HIGH VOLTAGE POWER SUPPLY
HIGH VOLTAGE POWER SUPPLY - 100425 Rev. D
ITEM QUAN
1
2
3
4
1
1
1
1
5
1
6
7
8
9
1
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
1
1
4
2
17
16
17
5"
PART NO.
600773
600749
600752
600777-301
MS8-140
600774
600777-302
2643
2603
7118
6155
7356
6091
REF
DESIG
Q9
Base
High voltage Rectifier
High Voltage Regulator
Panel Side Left
Marker Strip
Transformer Assy
Panel Side Right
Insulated Stand-Off ~"
Insulated Stand-Off 1"
Screws-Bindi'ng Hd 6-32 x ~ long
Washers-Flat #6 .38 dia. Ige. dia.
Washers-External Lock #6
Screws-Sheet Metal #6 ~" long
Grommet Strip
RTV 108 (Epoxy)
Hex Nuts, #6 (Small Pattern)
Screw Binding Hd 6-32 x 3/8
Screw Binding Hd 6-32 x 1/4
Resistor 3.9Meg ~W l~;'
Capacitor .Oluf 3KV
Wiring Harness
Schematic
Insulator-Mylar
Tinnermin Speed Nuts
Solder Lug
Insulator Regulator Board
Wiring Harness Layout
Insulated Stand Off (Ceramic)3/4"
Nylon Screw 6/32 x 3/8
6/32 Reduced dia. flat washer
#8GA Black Vinyl Sleeving
Spade Bolt 6-32
Heat Dissipator
Rivet for spade bolt 3/32 dia.x~"L
Transistor
Qll
Transistor
Al
A2
MS
Tl
A/R
8
4
2
1
1
1
Ref
1
3
3
1
1
1
1
4
2"
2
2
2
x
6042
7153
7152
RC20GF395J
30GA-SIO
600776
100423
600778
C8094-632-4
1416-6
700046
600990
2602
8573C
600779
MS20470-A3-4
2N5294 or
TIP 14
2N5294 or
TIP 14
DESCRIPTION
Rl
Cl
Ref
VENDOR
OR
SPEC.
AMC
AMC
AMC
AMC
Cinch Jones
AMC
AMC
H. H. Smith
H. H. Smith
C.
C.
C.
C.
G.E.
C.
C.
C.
Mil-R-11
Sprague
AMC
AMC
AMC
Smith
AMC
Smith
Walsco
AMC
RCA or
T.I.
RCA or
T. I.
Bl
ASTRO-METRIX CORP. - PARTS LIST
AMC-M-227 HIGH VOLTAGE POWER SUPPLY
HIGH VOLTAGE REGULATOR - 600752 Rev.D
ITEM
1
2
3
4
OUAN.
X
600754
100423
IN914B
WMF6Pl
WMFID47
C280AE/A220K
WMFIP22
C426AR/Gl
TE1200
C280AE/AI00K
WMFIPI
C280AE/A22K
WMFIS22
C280AE/A22K
WMFIS22
lN823
5110 (10D05 )
5110 (lOD05 )
IN751
5110 (10D05 )
5110 (lOD05 )
IN2071-A
5210 (10D5)
1N2071-A
5210 (10D5)
IN2071-A
5210 (10D5)
IN2071-A
5210 (10D5)
IN2071-A
5210 (10D5)
2N3565
2N3646
2N3565
2N3565
2N3565
2N3567
2N3567
40327
TO-5 PAD
2N3567
X
X
X
X
X
2N3567
2N3646
2N3567
2N3565
2N3565
1
6
1
1
1
1
7
1
8
1
9
2
10
X
11
12
13
14
15
16
17
1
4
X
1
X
X
5
18
X
19
X
20
X
21
X
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
6
2
X
X
X
5
X
1
1
5
B2
PART NO.
REF
DESIG
Ref
CR12
Cl
C2
C3
C3
C4
C4
C5
C5
C6
C6
C7
C7
CRl
CR2
CR3
CR4
CR5
CR6
CR7
CR7
CR8
CR8
CR9
CR9
CRI0
CRI0
CRll
CRll
01
02
03
04
05
06
07
08
010
012
013
014
015
016
DESCRIPTION
Circuit Board
Schematic
Diode, 100ma (Fast Recovery)
Capacitor O.luf 600V
Capacitor .0047uf 100V
Capacitor .22 250V :t 10"10
Capacitor .22 100V :t 10""
Capacitor Imf 40V
Capacitor 1uf 25V
Capacitor Imf 250V :t 10%
Capacitor O.luf 100V :t10%
Capacitor .022 mf 250V ± 10""
Capacitor .022 uf 100V
Capacitor .022 mf 250V ± 10%
Capacitor .022 mf 100V :t 10%
Diode, Zener T.C.
Diode 50V 1 Amp
Diode 50V 1 Amp
Diode, Zener
Diode 50V 1 Amp
Diode 50V 1 Amp
Diode 500V 1 Amp
Diode 500V 1 Amp
Diode 500V 1 Amp
Diode 500V 1 Amp
Diode 500V 1 Amp
Diode 500V 1 Amp
Diode 500V 1 Amp
Diode 500V 1 Amp
Diode 500V 1 Amp
Diode 500V 1 Amp
Transistors
Transistors
Transistors
Transistors
Transistor
Transistor
Transistor
Transistor
TO-5 Transistor Pad (Nylon)
Transistor
Deleted
Transistor
Transistor
Transistor
Transistor
Transistor
VENDOR
OR
SPEC.
AMC
CDE
CDE
Amperex
CDE
Amperex
Sprague
Amperex
CDE
Amperex
CDE
Amperex
CDE
AMC
AMC
AMC
AMC
Mallory
AMC
Mallory
AMC
Mallory
AMC
Mallory
AMC
Mallory
AMC
Fair
Fair
.Fair
Fair
Fair
Fair
Fair
RCA
Fair
Fair
Fair
Fair
Fair
Fair
$" .,._ 11._'
#'1
~#lI_~~~."'!...-
·
~RE~
/\
28
9>------~
'8
~
/I
,'5
\
\
5
~1
//
-®
£
/VOTES:
D
II
5
80NO
~.ACTIO""L
:I:
...... U ......
:l
TI.
0
752/0801
83/4
ASTRO-METRIX CORP. - PARTS LIST
AMC-M-227 HIGH VOLTAGE POWER SUPPLY
HIGH VOLTAGE REGULATOR - 600752 Rev. D (Cont'd.)
ITEM
QUAN.
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
2
71
72
X
X
X
X
X
73
74
75
2
1
1
1
1
1
1
1
1
3
1
1
X
2
X
X
X
1
1
2
2
1
2
X
X
X
X
1
X
3
X
1
PART NO.
RN70C1504F
RC2OGF103J
RN60C4222F
MTC-14L1
3007P-1-502
RN60C1822F
RC2OGF225J
RC2OGF473J
RC208F754J
RL20S122G
RC2OGF474J
RL20S823G
RC2OGF223J
RC2OGF474J
RC2OGF104J
RC2OGF103J
RC2OGF103J
RC2OGFI03J
RC2OGF220J
RC2OGF682J
RC42GF511J
RC2OGF153J
PW5
RC2OGF471J
RC2OGF153J
RC42GF511J
RC2OGF103J
RN70C1504F
RC20GF472J
RC2OGFI03J
RC2OGF222J
RC2OGF471J
RC2OGF272J
RC2OGF222J
RC2OGF222J
RC2OGFI04J
RC2OGF103J
RC2OGF474J
REF
DESIO
R1
R2
R3
R4
R5
R6
R7
R8
R9
RIO
Rll
R12
R13
R14
R15
R16
R17
R18
R19
R20
R21
R22
R23
R24
R25
R26
R27
R28
R29
R30
R31
R32
R33
R34
R35
R36
R37
R38
DESCRIPTION
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
1.5M 1%
10K 1/2W
42.2K 1%
(Pot) 10K
(Pot) 5K
18.2K 1% ~W
2.2M ~W
47K ~W
750K ~W
102K 2% ~W
470K ~W
82K 2% ~W
22K ~W
470K ~W
lOOK ~W
10K ~W
10K ~W
10K ~W
22 Ohm ~W
6.8K ~W
510 Ohm 2W
15K ~W
5 Ohm 5W (Axial)
470 Ohm ~W
15K ~W
510 Ohm 2W
10K ~W
105M 1%
4. 7K ~W
10K ~W 5%
2.2K ~W
470 Ohm ~W
2.7K ~W
2.2K ~W
2.2K ~W
lOOK ~W
10K ~W
470K ~W
VENDOR
OR
SPEC.
Mil-R-10509
Mil":R-ll
Mil-R-10509
Mallory
Bourns
Mil-R-I0509
Mil-R-ll
Mil-R-ll
Mil-R-ll
Mil-R-22684
Mil-R-ll
Mil-R-22684
Mil-R-ll
Mil- R-ll
Mil-R-ll
Mil-R-ll
Mil-R-ll
Mil-R-ll
Mil-R-ll
Mil-R-ll
Mil-R-ll
Mil-R-ll
IRC
Mil-R-ll
Mil-R-ll
Mil-R-ll
Mil-R-ll
Mil-R-10509
Mil-R-ll
Mil-R-ll
Mil-R-ll
Mil-R-ll
Mil-R-ll
Mil-R-ll
Mil-R-ll
Mil-R-ll
Mil-R-ll
Mil-R-ll
B5
~
~ 0
~R-4
";
o
0
a
o
'"
o
0
o
0
o
<>-r;@J--o.-::-::;Q'\....
~
~
'"
o
~
0
0
000
0
::0
I
o
'"
o
o-1L--:--C5 _~
70/752-0200
ASTRO-METRIX H.V. REGULATOR
B6
ASTRO-METRIX CORP. - PARTS LIST
AMC-M-227 HIGH VOLTAGE POWER SUPPLY
CIRCUIT BOARD ASSY HIGH VOLTAGE RECTIFIER - 600749 Rev. D
ITEM
QUAN.
1
2
3
4
5
6
7
B
9
10
11
12
1
1
5
X
X
X
X
1
1
13
4
14
15
16
17
1B
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
3B
39
40
X
X
41
42
1
X
2 In.
3 In.
A/R
42 In.
1
1
4
X
PART NO.
600751
100423
BS-41162SB
DD60-202
DD60-202
DD60-202
DD60-202
DD60-202
DD30-502
C2BOAE/A10K
WMF1S1
US111HFP
US111HFP
US111HFP
5AM6
US111HFP
l/B HT105
1/16 HT105
1
2
5703
X
X
X
X
1
2
X
1
1
1
1
Ref
Cl
C2
C3
C4
C5
C6
C7
CB
C9
CR1
CR2
CR3
CR4
CR5
8637
RC42GF155J
RN70C1504F
RN70C1504F
RN70C1504F
RN70C1504F
RC42GF565J
RC42GF565J
RC42GF565J
RC42GF565J
RC42GF565J
PTA755L
RC42GF435J
RC42GF435J
RC32GFl04J
7153
1416-6
2603
X
5
X
REF
DESIG
R1
R2
R3
R4
R5
R6
R7
RB
R9
R10
Rll
R12
R13
Rl4
Rl5
DESCRIPTION
VENDOR
OR
SPEC.
Circuit Board
AMC
Schematic
AMC
Spade Lug
Hollingsworth
CENT
Capacitor .002uf 6KV
Capacitor .002uf 6KV
CENT
Capacitor .002uf 6KV
CENT
Capacitor .002uf 6KV
CENT
Deleted
Capacitor .002uf 6KV
CENT
Capacitor .005uf 3KV
CENT
Deleted
Capacitor .01 250V
AMPEREX
CDE
Capacitor .01uf 100V
Diode BKV, 1.2MA
INT
Diode BKV, 1.2MA
INT
Diode BKV, 102MA
INT
Diode 6KV, 5MA
ASI
Diode BKV, 1.2MA
INT
Shrink Tubing 3/B" (l/B A/S)
Shrink Tubing 5/32" (1/16 A/S)
HV Paint
HV Insulated Wire Red Rulin
Crt. Anode Connector & Lead
GC
Delete
Resistor 1.5Meg 2W :!:" 10";'
Mil-R-ll
Resistor 105M 1%
Mil-R-ll
Resistor 105M 1%
Mil-R-11
Resistor 105M 1%
Mil-R-ll
Resistor 105M 1%
Mil-R-ll
Resistor 5.6M 2W + 5%
Mil-R-ll
Resistor 5.6M 2W :!:" 5%
Mil-R-ll
Resistor 5.6M 2W :!:" 5%
Mil-R-ll
Resistor 5.6M 2W :!:" 5%
Mil-R-ll
Resistor 5.6M 2W
Mil-R-11
Resistor (Pot) 7.5M 1W
Mallory
Resistor 4.3M 2W .± 5%
Mil-R-ll
Resistor 4.3M 2W .± 5%
Mil-R-ll
Resistor lOOK lW
Mil-R-ll
Screw 6/32 x 3/BII Long S.C.P.
G.C.
Solder Lug #6 Int. Tooth
Smith
Ceramic Standoff 1" Long
Smith
6/32 thd.
Solder Lug #6 Hole
G.C.
Nylon Screw 6/32 x 3/B L.
B7
~
o
"
@
"--6---:l-'~
ASTRO-METRIX H.V. RECTIFIER
BS
PARTS LIST
HVPS - ITT
ITEM REF DESIG PART NO.
1
2
3
4
5
6
7
8
9
-.l.0
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
R2
R3
R4
R5
R6
R7
R8
R9
RIO
Rll
R12
R13
R14
R15
R16
R17
R18
R19
R20
R21
R22
R23
R24
R25
R26
R27
R28
R29
R30
R31
. R32
R33
R34
R35
R36
R37
R38
R39
R41
R42
R43
R44
R45
R46
R47
R48
R49
R50
R51
R52 ,
RN70C4993F
RC20GF105K
RN65C3013F
RN65C1002F
RC20GF101K
RC20GF224K
RC20GF684K
RC20GF102K
RC20GF101K
RC2OGF222K
RC2OGF101K
RC20GF102K
RC20GF223K
RC2OGFl01K
RC2OGF47OK
RC20GF103K
RC2OGF102K
R32GF105K
R20GF152K
RC20GF153K
RC2OGF102K
RC2OGF153K
RC32GF105K
RC32GF105K
RC20GF104K
62PR50K
RC2OGF101K
RC2OGF752K
RC20GF563K
RN65E1823F
RC32GF105K
RC32GF105K
62PR100K
Type RN65
RC20GF104K
RC2OGF101K
RC2OGF223K
RC2OGF473K
RC2OGF102K
RC2OGF102K
RC:i2GF105K
Type HVC
DESCRIPTION
Res. 499K 1W 1%
Res. 1 Meg, ~W 10%
Res. 301K, ~W 1%
Res. 10K, ~W 1%
Res. 100 Ohm ~W 10"/0
Res. 220K, ~W 10%
Res. 680K, ~W 10%
Res. 1K, ~W 10%
Res. 100 Ohm, ~W 10"/0
Res. 2.2K, ~W 10"/0
Res. 100 Ohm, ~W 10"/0
Res. 1K, ~W 10%
Res. 22K, ~W 10%
Res. 100 Ohm, ~W 10%
Res. 47 Ohm ~W 10"/0
Res. 10K ~W 10%
Res. 1 Ohm ~W 10%
Res. 1 Ohm ~W 10%
Res. 1 Ohm ~W 10"/0
Res. 1 Ohm ~W 10"/0
Res. 1K ~W 10"/0
Res. 1 Meg, 1W, 10"/0
Res. lOOK ~W 10"/0
Res. 1. 5K ~W 10"/0
Res. 15K ~W 10"/0
Res. 1K ~W 10%
Res. 15K ~W 10%
Res. 10 Meg, 2W 1%
Res. 10 Meg, 2W 1%
Res • lOOK ~W 10%
Pot 50K-He11itrim·
Res. 100 Ohm ~W 10"/0
Res. 7 .5K ~W 10%
Res. 56K ~W 10%
Res. 182K ~W 1%
Res. 470K ~W 10"/0
Res. 100 Meg, 2W 5%
Res. 100 Meg, 2W 5%
Pot, 100K-He11itrim
Res. lOOK ~W 1%
Res. lOOK ~W 15%
Res. 100 Ohm ~W 10%
Res. 22K ~W 10"/0
Res. 47K ~W 10"/0
Res. 1K ~W 10"/0
Res. 1K ~W 10"/0
Res. 100 Meg, 2W 5%
Pot 20 Meg-30"/o (Focus)
Res. 10 Meg, 2W t 10"/0
Res. 22 Meg, 2W :t 10"/0
. VENDOR
IRC
Ohmite
IRC
IRC
Ohmite
IRC
Ohmite
Ohmite
Ohmite
Ohmite
Ohmite
Ohmite
Ohmite
Ohmite
Ohmite
Ohm it e
Ohmite
Ohmite
Ohmite
Ohmite
Ohmite
Ohmite
Ohmite
Ohmite
Ohmite
Ohmite
Dale
Dale
Ohmite
Bourns
Ohmite
Ohmite
Ohmite
IRC
Ohmite
IRC
IRC
Bourns
IRC
Ohmite
Ohmite
Ohmite
Ohmite
Ohmite
Ohmite
IRC
CTS
B9
PARTS LIST
HVPS - ITT
ITEM REF DESIG PART NO.
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
BIO
R54
R55
R56
C2
C3
C4
C5
C6
C7
C14
C17
C20
C23
C25
CRI
CR2
CR3
CR4
CR5
Ql
Q2
Q3
Q4
Q5
Q6
Q7
Q8
Q9
QIO
Qll
RC2OGF332K
RC2OGFI03K
RC2OGFI03K
WMFISI
WMF6S68
WMF6S68
TE1307
WMF-IS33
WMF6S68
WMFID33
3 OGASI 0
Type C K6R8C35K
TE1211
DMl9-47L
IN936
IN936
IN4004
RCIOO
IN4004
2N3638
2N3638
2N3242A
2N3440
2N3242A
2N3053
2N3053
2N3053
2N3053
2N4074
2N3053
DESCRIPTION
Res. 3. 3K ~W 10%
Res. 10K ~W 10"-"
Res • 10K ~W 10"-"
Cap • 01 Mf 100V
Cap .068 Mf, 600V
Cap .068 Mf, 600V
Cap 50 Mf, 50V
Cap .033 Mf, 100V
Cap .068 Mf, 600V
Cap .0033 Mf, 100V
Cap .01 Mf, 3KV
Cap 6.8 Mf, 35V
Cap 100 Mf, 25V
Cap. 470pf
Diode
Diode
Diode
Diode
Diode
Transistor
Transistor
Transistor
Transistor
Transistor
Transistor
Transistor
Transistor
Transistor
Transistor
Transistor
VENDOR
Ohmite
Ohmite
Ohmite
Cornell-Dubilier
Cornell-Dubilier
Cornell-Dubilier
Sprague
Cornell-Dubilier
Cornell-Dubil ier
Cornell-Dubilier
Sprague
Kernet
Sprague
Elrnenco
Intl. Rect.
Intl. Rect.
Motorola
E.D. I.
Motorola
Fairchild
Fairchild
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
RCA
PARTS LIST
DELAY LINE MEMORY - DIGITAL DEVICES, INC.
ITEM QUAN
REF DESIG
DESCRIPTION
VENDOR PART NO.
1
2
5000-105 S
Schematic
5000-105 L
Layout
5000-105
Circuit Board
1
3
1
Rl,34,42
R2
R3,24
R4
R5,19
R6, 10,21
R7, 31,33
R8
R9
R12
R13, 25,26
R14,17
R15
R16,22
R18,23,28
R27
R29
R30
R32
R35
R36,38,39,43,44,5l
R37
R40,45,46
R41
lK Resistor ~W t 5%
1.8K Resistor ~W ± 5%
1.2K Resistor ~W + 5%
2.2K Resistor ~W + 5%
1.5K Resistor ~W ± 5%
2.7K Resistor ~W t 5%
330 Ohms Resistor ~W±5%
180 Ohms Resistor ~W±5%
560 Ohms Resistor ~W 5%
8.2K Resistor ~W ± 5%
3.3K Resistor ~W ± 5%
200 Ohms Resistor ~W±5%
4.7K Resistor ~W ± 5%
470 Ohms Resistor ~W±5%
6.8K Resistor ~W ± 5%
12K Resistor ~W ± 5%
10K Resistor ~W ± 5%
820 Ohms Resistor ~Wt5%
39 Ohms Resistor ~W ±5%
18K Resistor ~W ± 5%
510 Ohms Resistor ~W±5%
9.1K Resistor ~W ± 5%
27K Resistor ~W ± 5%
3.3K Resistor ~W ± 5%
4
R47,48,49,50
lK Resistor ~W ± 5%
1
1
Rll
R20
Cl,C2,C3
C4-6,10-16,24-28
C7,8,9,17
C18
C19
C20,23
C21,22
5K Potentiometer
470 Ohms Sensitor TM 1/8
15uf Cap. 20V
2.2uf Capacitor 35V
O.luf Capacitor 35V
150pf Capacitor
200pf Capacitor
luf Capacitor 35V
47pf Capacitor
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
5
1
2
1
2
3
3
1
1
1
3
2
1
2
3
1
1
1
1
1
4
18
4
1
1
2
2
Beckman 62 PR 5K
Texas Inst.
Sprague 150D156X0020B2
Sprague 150D225X9035B2
Sprague 150DI04X9035A2
Centralab DD-151
Elmenco DM-15-201J
Sprague 150DI05X9035A2
Centralab DD-470
Bll
PARTS LIST
DELAY LINE MEMORY - DIGITAL DEVICES,
ITEM OUAN
52
53
54
55
56
57
58
59
60
61
62
63
64
65
B12
1
11
1
12
AR
1
REF DESIG
DESCRIPTION
CRl
IN914 Diode
01-6,8-12
07
2N3646 Transistor
2N979 Transistor
Zl
Transistor Pad
Wire, Elect. Insul,#24AWG
SN7400N Microcircuit
INC.
(CONTID.)
VENDOR PART NO.
Milton Ross 10194
Texas Inst.
PARTS LIST
DELAY LINE MEMORY, LFE
ITEM REF DESIG PART NO.
1
2
3
4
5
6
7
B
9
10
2039ACMOI
2100ACM72-1
2039ACM21
2039ACE
2039ACE04
MICRODOT
7076
12
13
14
15
16
17
lB
19
20
21
Rl
R2
R5
R6
R7
RB
R9
RIO
Rll
R12
R13
R14
R15
22
23
24
25
26
27
2B
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
4B
49
50
R16
R17
R1B
R19
R20
R21
R22
R23
R24
R25
R26
R27
R2B
C2
C4
C5
C6
C7
CB
C9
CIO
Cll
Cl2
C13
C14
C15
C16
C17
CIB
11
3067P
30DB05G050BBO
30D256H050CCO
30DB05G050BBO
30DB05G050BBO
30D256G050CCO
30DB05G050BBO
DESCRIPTION
VENDOR
Mag Line Assembly
Spacer
P.C. Board Assembly
Art Work P.C. Board
P. C. Board
Eyelet
Teflon Tubing Extruded #lB
Solid Cu Wire Tinned #22 AWG
Res~ Carbon B20 Ohms 5%l:iW
Res. Carbon 27.0K Ohms 5%l:iW
Res. Carbon 56. OK Ohms 5'Y~W
Res. Carbon 2.2K Ohms 5%\W
Res. Carbon B2 Ohms 5% l:iw
Res. Carbon 3.3K Ohms 5% l:iw
Res. ,Carbon 10.OK Ohms 5%l:iW
Res. Carbon 2.2K Ohms 5% l:iw
Res. Carbon B2 Ohms 5% ~W
Res. Carbon 3.3K Ohms 5% l:iW
ReS. Carbon 10.OK Ohms 5% l:iw
Res. Carbon 2.2K Ohms 5% ~W
Res. Variable 100 Ohms
(Trimpot)
Res. Carbon B2 Ohms 5% l:iw
Res. Carbon 3.3K Ohms 5% ~W
Res. Carbon 100 Ohms 5% l:iw
Res. Carbon 6.BK Ohms 5% l:iw
Res. carbon 100 Ohms 5% !-4W
Res. Carbon lK Ohms 5% l:iw
Res. Carbon 1.5K Ohms
Res. Carbon 47 Ohms 5% l:iw
Res. Carbon 47 Ohms 5% ~W
Res. Carbon 6.BK Ohms 5% ~w
Res. Carbon 12K Ohms 5% ~
Res. Carbon 6.BK Ohms 5% l:iw
Res. Carbon 1.OK Ohms 5% l:iW
Cap. Buf 50V
Cap. ~Oluf 50V (C/D cap)
Cap. .01 uf 50V (C/D cap)
Cap. 25uf 50V
Cap. .Oluf 50V (C/D cap)
Cap. Buf 50V
Cap. .Oluf 50V (C/D Cap)
Cap. .01uf 50V (C/D Cap)
Cap. Buf 50V
Cap. 25uf 50V
Cap. .Oluf 50V (C/D Cap)
Cap. .Oluf 50V (C/D Cap)
Cap. .Oluf 50V (C/D Cap)
Cap. .Oluf 50V (C/D Cap)
Cap • Buf 50V
Cap. • 01 uf 50V (C/D Cap)
Bourns
Sprague
Sprague:
Sprague
Sprague
Sprague
Sprague
813
PARTS LIST
DELAY LINE MEMORY, LFE
ITEM REF DESIG PART NO.
51
52
53
54
C19
CRI
CR2
CR3
55
56
57
58
59
60
61
62
63
64
65
66
CR4
CR5
Ll
Ql
Q2
03
Q4
Q5
Q6
07
08
67
68
69
B14
IN914
IN914
IN3712/TD712/
BD712
IN270
IN914
9340 42
2N3903
2N3903
2N3903
2N3903
2N3903
2N3903
2N706
2N706
2013ACM22
70
71
73
74
2039ACM
2039ACM04
2039ACM03
75
76
2039ACM05
2039ACE23
.
DESCRIPTION
Cap. .Oluf 50V (C/D Cap)
Diode
Diode
Diode
Diode
Diode
Choke 100 uH
Transistor
Transistor
Transistor
Transistor
Transistor
Transistor
Transistor
Transistor
Lockwasher Int Tooth St
Stl #2
Nut Hex St Stl #2-56
Cover
Lockmaster Int TOoth St
Stl #2
Nut Hex St Stl #2-56
Case Outline
Acceptance Test Data Sht
Quality Conformance Test
Procedure
Qualification Test Proc.
Schematic
VENDOR
T. I.
T. I.
G.E.
Transitron
T. I.
Miller
Motorola
Motorola
Motorola
Motorola
Motorola
Motorola
G.E.
G.E.
Americ Al. Co:
UR9
FIG.
&
ITEM
NO.
RCA
STK
NO.
DESCRIPTION
CIRCUIT CARD ASSY., DELAY
LINE, DIGITAL DEVICES
305841
HZ
RCA
DWG NO.
VENDOR
PIN
218731002
MODEL NO.
EXP
50
FIG.
60
1
Capacitor, .02uF, 25V (C1, C2, C3,
C5,C7,C9,C11,C13,C14)
Capacitor, 4.7uF, 10V (C4, C8, C10)
Capacitor, 3.3uF, 15V (C6)
Capacitor, 22uF, 35V (C12)
Capacitor, 680pF (C15)
Diode, Zener 1 N756, 8.2V (CRlI
Diode 1 N270 (CR2)
Integrated Circuit, CA3023 (Z1)
Integrated Circuit, UA710 (Z2, Z4)
Integrated Circuit, SN7401 (Z3)
Potentiometer, 0-5kohms (R10)
Resistor, 470ohms, ±5% 14W (R1,
R1S, R2S)
Resistor, 10kohm, ±S%, 14W (R2, R17)
Resistor, 2.2kohms, ±S%, 14W (R16)
Resistor, 100ohms, ±S%, 14W (R7)
Resistor, 4.3kohms, ±S%, 14W (R9)
Resistor, 2.4kohms, ±S%,14W (Rl1)
Resistor, 100ohms, ±S%, 14W (R12)
Resistor, 30kohms, ±S%; 14W (R13, R14)
Resistor, 10ohms, ±S%, 14W (R19)
Resistor, lkohm, ±5%, 14W (Rl0, R24,
9
Resistor, 360ohms, ±S%, 14W (R22,
R23)
Resistor, 910ohms, ±S%, 14W (R30,
R31)
Resistor, 220ohms, ±5%, 14W (R4)
Resistor, 560ohms, ±S%, 14W (R.8)
Resistor, 681ohms, ±2%, 14W (R26,
Rn
Resistor, 7S0ohms, ±S%, MoW (R3)
Resistor, 270ohms, ±S%, MoW (RS)
Resistor, 300ohms, ±5%, MoW (R6)
Resistor, 820ohms, ±S%, MoW (R29)
Resistor, S60ohms, ±S%, 1W (R18,
R21)
Transistor, 2N3904 (01 02 03 04)
~
3
1
1
1
1
1
1
2
1
1
3
2
1
1
1
1
1
2
1
3
2
1
1
2
1
1
1
1
2
4
o
o
Circuit Card Assy., Delay Line, Digital Devices
BIS
UR9
FIG.
&
ITEM
NO.
DESCRIPTION
CIRCUIT CARD ASSY, DELAY
LINE, DIGITAL DEVICES
Schematic Diagram
Schematic Diagram
Layout
Layout
Circuit Card
Resistor, 15K, ±5%, %w(R2)
Resistor, 1 K, ±5%, %w( R3)
Resistor, 510 ohms, ±5%, %w( R5)
Resistor, 27 ohms, ±S%, %w( R6)
Resistor, 1.2K, ±5%, %w(R7)
Resistor, 560 ohms, ±5%, %w(R8,21)
Resistor, 220 ohms, ±5%, %w( R9)
Resistor, 390K, ±5%, %w(R10)
Resistor, 10 ohms, ±5%, %w(R12)
Resistor, 150 ohms, ±6%, %w(R16)
Resistor, 39K, ±5%, %w(R17)
Resistor, 180 ohms, ±5%, %w(R18)
Resistor, 91K, ±5% %w(R19)
Resistor, 470 ohms, ±5%, %w(R20)
Resistor, 5.6K, ±5%, %w(R22)
ResistOr, 680 ohms, ±5%, Yow( R 1)
Resistor, 1500 ohms, ±5%, 1w(R11,16)
Resistor, 1K-Cermet Trimmer (R4)
Resistor, 200 ohms-Cermet
Trimmer (R14)
Capacitor, 6.8 uF; 35v(C5)
RCA
STK
NO.
313945
I
B16
Capacitor, 180 pF, (C9)
Diode, Zenar, 12v (CR1)
Transistor, NPN,
SE4010 (01)
Transistor (02)
MODEL NO.
VENDOR
PIN
2187310-3
EXP
FIG.
60
1
5000-149 S
5000-149-2 S
5000-149 L
5000-149-2 L
5000-149
422350
Capacitor, 10 uF, 26v(C1,6)
Capacitor,.1 uF, 1 OV(C2,3,4,7,8)
HZ
RCA
DWG NO.
218457
257446
242958
Transistor, NPN, 2N3904 (03,4)
Micrologic, SN15837 (Z1)
237787
Micrologic, UA710C (Z2)
304604
CTS-360T1028
CTS-360T201 B
1
1
1
1
1
2
1
1
1
1
1
1
1
1
1
1
2
1
1
Kemet
T360B685M035AS
1
Kemet
T360B 106M025AS
Centralab
UK10-104
DIP Mica
IN759A
Fairchild
SE4010
Fairchild
2N4250
National
Taxas Inst.
SN15837
Fairchild
U58771 039
1
5
1
1
1
1
2
1
1
>.,
.'
.
RS
FIG. &
INDEX
NUMBER
2I-
1
2
3
4
5
6
7
- 8
- 9
-10
-11
-12
-13
-14
-15
-16
-17
-18
-19
-20
-21
-22
-23
-24
-25
-26
-27
-28
.. ",
4
DESCRIPTION
KEY LEVER HARDWARE AND LEAF SWITCHES
• COMB, KEY LEVER GUIDE
SCREW, GUIDE COMB
STOP, KEY LEVER
SUPPORT, GUIDE COMB
SCREW
• SCREW
• GUIDE, INTERPOSER
• SCREW, INTERPOSER
BRACKET, LEAF SWITCH MTG
WASHER, FLAT (NO. 6)
WASHER, LOCK (NO. 6)
• SCREW (6-32 x 0.38 LG)
• WASHER, FLAT (NO. 8)
WASHER, LOCK (NO. 8)
• SCREW (8-32 x 0.75 LG)
• SWITCH, LEVER 2PDT (S8)
• SWITCH, LEVER 2PST (S10)
• SCREW (4-40 x 0.75 LG)
SPRING, KEY LEVER, LH
• COMB, KEY LEVER, LH
SPRING, KEY LEVER, RH
COMB, KEY LEVER, RH
GUARD, KEY LEVER
• SCREW
• BAIL, REPEAT
BRACKET, SPACE BAR SUPPORT
PLATE, KEY LEVER SPRING
SCREW, SPRING MTG
··
···
···
·· ·· ··
··
·· ··
···
·· ·· ··
·· ··
···
··
·· ··
·· ·· ·
·· ·· ·
·· ·· ··
··
·· ·· ·
···
···
DRAWING OR
PART NUMBER
RCA STOCK
NUMBER
IBM1l23968
IBM1164576
IBM1l33633
IBM1141929
IBM1124411
IBM1l41381
IBM1164579
2144152-1
82278-104
93620-107
990386-109
82278-105
93620-109
990388-117
2187668-2
2187668-1
990384-117
IBM1133654
IBM1133683
·IBM1133647
IBM1l33682
IBM1141226
IBM1164863
IBM1l64467
IBM150735
IBM1133679
IBM1164579
115352
301297
301296
QTY. NOTES
1
2
1
1
2
2
1
4
1
1
1
1
2
2
2
1
1
4
1
1
1
1
1
2
1
1
1
5
07
A8M/ABN
Source Exif Data:
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