82403 03D_Series_1300_Hy TYPE_II_Printers_Maint_Jul80 03D Series 1300 Hy TYPE II Printers Maint Jul80

User Manual: 82403-03D_Series_1300_HyTYPE_II_Printers_Maint_Jul80

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•

THE DIABLO HyTYQe 111355 WP

The Diablo HyTypeilD 111355 WP with the metal print
wheel is designed specifically for OEM word
processing applications.

Mf tal Print Whe~l .
SI nce its introduction, this composite metal-clad
daisy wheel print.element, and the HyType 111355
WP printer designed to use it, have steadily gained
acceptance among users of high quality serial
printers. The metal -clad wheel was developed
specifically in response to the need for very high
quality printing and carbon sets (up to twelve
copies depending on paper weight) by word
processing users. Letter-quality printout is required
to produce everything from legal forms to direct
mail advertising literatu re and masters for offset
printing.
Print Wheel Life
The metal-clad print wheels are also convenient in
high volume printing operations because they do
not have to be c hanged as often as plastic wheels.
The plastic daisy wheel has an expected life of
about 4 million characters. The metal-clad wheel ,
on the other hand, has an expected life of about 16
million characters; field experience indicates up to
30 to 50 million characters are possible.
Proportional Spaced Printing
True proportional spaced printing is available to the
user software when using a metal-clad proportional
space print wheel and controlling carriage advance

•

based on the proportional space unit value of the
prior and current characters.
Character Density
Character density is the blackness 01 the printed
characters, and is dependent upon the force with
which the print hammer strikes the print element on
the daisy wheel, and type of ribbon and paper used.
The metal-clad print wheel is much more durable
than plastic print wheels and can, therefore, withstand higher hammer impact in printers designed
for word processing applications to produce a
denser character impression.
Character Definition
Character definition is how well-formed characters
appear to be printed, and is dependent on the
design and molding of the print wheel element, and
01 the ability of the character to withstand wear
during operation. Characters must not only be
shaped for clear definition and be pleasing to the
eye, but must also be engineered so that they resist
wear and extend the life of the wheel. A too sharp
edge on a particular character, for example, might
wear faster than any other part of the character or
character set and begin to produce blurred impressions. A rounded edge might produce less than
adequate definition. To maintain this definition over
an extended lifetime, metal-clad print wheel
characters are molded in an extremely hard monoplastic that encapsulates the ends of the metal
spokes. The characters are then metal-plated for
durability.

Diablo HyType 111355 WP Printer Specifications
Print Speed : 40 characters

per second .
Character Set: 88, 92 and 96

character print wheels.
Print Line: 132 columns (10 pitc h).
Forms Width : 15 inches (381mm )
maximum.
Carriage Return Time : 300 ms
maximum for 132 columns.
Tabulation : Right and left , direct to

column address.
Tabulation Speed: 300 ms
maximum for 132 col umns.
Column Spacing : 120 posit ions
per inch nominal.
Paper Feed : Bi-direc tional .
Paper Feed Spacing : 48 positions
per inch nominal.
Paper Feed Speed : 4 inches per
second plu s 50 ms settling delay.
Power Requirements
Voltages : +5 Vdc, 4 A; +15 Vdc,
9 A peak ; - 15 Vdc, 9 A peak.
Wattag e: 100 W typi cal average.
Basic Configuration : The standard
configuration includes mec hanisms
and circuitry to produ ce all print,
control and status func tions from
a TIL or DTL compatible controller.

Of

•

•

Interface Options

PhYSical Dimensions
Height: 8 3/ 4 inches.
Width: 23'/4 inches.
Depth : 13 113 inc hes.
Weight: 27 pounds.
Environmental
Operating: 45°F to 105° F.
Storage: -20° F to 135°F.
Functional Elements Inc lude :
Log ic and microprocessor
control c ircuits.
Print carriage pOSitioning
control and drive circuits.
Paper feed drive ci rc uits.
Ribbon feed drive circuits.
Print wheel positioning co ntrol
and drive circuits.
Hammer fire drive circuits.
Ribbon cartridge .
Optional Accessories :
Power supply.
Pin feed and split platens.
Operator interchangeable
character wheel.
Auxiliary tractor form feed.
Multi -strike carbon ribbon
cartridge.
Single-strike carbon ribbon
cartridge.
Two-color ribbon cartridge.
Covers, typewriter or rec eive
only.

Paper Out Status: Indicates that
the paper out sensor has been
activated .
End-of-Ribbon Status: Indicates
that the end-of- ribbon sensor has
been activated.
Covers Open Status: Indicates
that the cove r open sensor has
been activated.
Direct Access To Hammer Energy :
Allows use r selecti on from eight
hammer energy levels for special
application.
Ribbon Advance I: Allows the user
to force single step ribbon
advance.
Ribbon Advance II : All ows the
user to select, by interface
co ntro l, eit her si ngle or double
step ribbon advance.
Direct Access To Print Wheel :
Allows the user to have absolute
addressing of the print wheel.

•

Diablo Systems Incorporated
24500 Industrial Boulevard
Hayward , California 94545
(415) 786-5000
Telex 336494
A Xerox Company

Western Region
2025 Gateway Place
Suite 220
San Jose, California 95110

408 /286-942 4
8939 S. Sepulveda Boulevard
Suite 103
Los Angeles, California 90045

213/641-0862
Centr el Reg ion
South Barrington Road
Post Office Box 267
Barring ton, Illinois 60010

1215 Executive Drive East
Richardson , Texas 75081

214/234-0885
Eastern Region
1605 Trapelo Road
Waltham, Mass. 02154

617/890-6400
1145 Bordentown Allenue
Parlin, New Jer sey 08859

201/727-2357
900 West State Highway 70
Marlton, New Jersey 08053

609/983-3353

Internat ional Off ices
Diablo Systems GmbH
Riesen fe ldstr. 75
8000 Munchen 40
West Germany
Telephone: 089/35 1 7085-87
Telex : 8 41-521 2088
Diablo Systems Ltd.
20 Broadway
Woking GU21 5AP
Surrey, England
Telex : 851/859148
Telephone: 048-62 - 71991

Diablo Systems SARL
28 Place Louvois
78140 Velizy, France
Telephone: (011 946-23-35
Telex: 842-696925
M itsui & Company. Ltd.
2-1 Ohtemachi, 1-Chorne
Chlyoda-ku, Tokyo
Telephone : Tokyo: 03-285-1111

312/381-3661

90017-01 6/78

O'8bIO."

H~TyPl! -

. no XE ROX'

, r, reglS1Qrc"'~I84.15d
7.25 11

8.18"
(207.77)

10"
(254)

2020"
(513.08)

8

1=1

1=
F

- e::

~~

r.J 0

L..o.

~

rr

~

rr

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I

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LI

~

"

\l

J~
23.26 11
(590.8)

NOTES: All dimensions are nominal, dimensions shown in parentheses are in millimeters
* = Adjustable

Figure 2-2
DIABLO UNIDIRECTIONAL FORMS TRACTOR
Rev

A (4/79)

r

2-3

12.54"
(318.52.)*

11.00"
......- - - - (279.4 ) - - - - - 1
2.50"
(63.5 )

2.0;1

(50.8)

1.63"
(41.4)

17.87"
(453.9)

"
14.37"
(365)*

10"
(254)

I

9.37"
. - - - - ( 238)---......

20.28 "
(515.11)

r-~

-

~~

-

I~~

..

-

--~[Q

-Wr11

,I\Y,

:~
l

14.37 "
(365 )*

~

lY

\~
23.26"
(590.8)
NOTES: All dimensions are nominal, dinlensions shown in parentheses are in millinleters
* = Adjustable

Figure 2-3
DIABLO BIDIRECTIONAL FORMS TRACTOR
2-4

Rev

A (4/79)

7.35"
(i86.69)
2.025"

~--

-..
I

....
..
<

56

43
42
41
40

57

39

56

38

)

59
60
61
62
63
64
65
66
67

37
36
35
34

I

·

33

\

32
31

7

68

69

70
71
72
73
74
75
76

77
78
79

80
81
82

83
84
85
86
87

88
89
90

91
92
93
94
95
0

30

29
28
27
28
,25
24
23
22

21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0

I

'

'

I

@

A ..

/
}
I
&
or • •

m
j
V

9
X

d

I
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c
0

r
n

·•
i

t
h

s
f

P
u
q

k
y

z
w

DIABLO MODIFIED
ASCII CODE
DL DL DL DL
5
4
3
2
16
8
4
2

DL
7
64

DL
6
32

LO
HI
LO
LO
LO
HI
LO
LO
HI
HI
LO
HI
HI
LO
LO
LO
HI
HI
LO
HI
HI
HI
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO

LO
LO
HI
LO
HI
LO
HI
LO
LO
LO
LO
LO
LO
HI
HI
HI
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO

LO
LO
LO
LO
LO
HI
LO
HI
LO
HI
LO
HI
HI
HI
LO
LO
LO
HI
LO
HI
HI
HI
HI
HI
LO
HI
LO
HI
HI
HI
HI
HI
LO
HI
HI
HI
HI
LO
HI
LO
HI
LO
LO
LO
HI
LO
LO
LO

LO
LO
LO
LO
LO
HI
LO
HI
LO
LO
LO
LO
LO
HI
LO
LO
LO
LO
LO
HI
HI
HI
LO
LO
HI
HI
LO
HI
LO
HI
HI
LO
HI
LO
HI
Hf
LO
HI
LO
HI
HI
HI
HI
HI
LO
LO
LO
HI

HI
LO
LO LO
LO HI
LO LO
HI
LO
LO LO
LO LO
HI
HI
LO HI
HI
HI
LO HI
HI HI
HI
LO
HI
HI
LO HI
LO LO
LO LO
LO LO
LO HI
HI
HI
LO LO
LO
HI
LO HI
HI
LO
LO LO
LO LO
HI
HI
LO HI
LO HI
HI
LO
HI
LO
LO LO
LO
HI
LO LO
LO 'HI
HI
HI
HI
HI
LO HI
HI
HI
HI
LO
LO LO
HI
HI
LO HI
HI
HI
HI
LO
HI
HI
HI
LO
LO LO

ABSOLUTE P.W.
ADDRESS CODE"""

DL
1
1

DL
7
64

LO
HI
LO
HI
LO
LO
LO
HI
HI
LO
HI
HI
HI
HI
HI
HI
LO
LO
LO
LO
HIHI LO
HI./
HI
LO
HI
H!
HI
HI
LO
LO
HI
HI
LO
LO
LO
HIHI
LO
HI
HI
LO
LO
LO
LO
HI
LO

HI
LO LO
HI
LO LO
HI
LO LO
HI
LO LO
HI
LO LO
HI
LO LO
LO' LO
HI
HI
LO 'LO
HI
LO LO
HI
LO LO
HI
LO LO
HI LO LO
HI
LO LO
HI
LO LO
HI
LO LO
HI
LO HI
LO HI HI
LO HI
HI
LO HI
HI
LO HI .HI
LO HI HI
LO HI
HI
LO HI
HI
LO HI~ HI
La HI HI
LO HI
HI
LO HI
HI
LO HI
HI
LO HI HI
HI
LO HI
LO HI
HI
LO HI
LO
LO,
LO HI
LO HI
LO
LO HI
LO
LO HI
LO
LO HI
!.O
LO' HI
LO
LO HI
LO
LO
LO HI
LO HI
LO
LO HI
LO
LO HI
LO
LO HI
LO
LO HI
LO
LO
LO HI
LO HI
LO
HI Hi',
HI

DL
6
32

DL
5
16

DL
4
8

DL DL
3, 2
4
2

HI
HI
HI
HI
HI
HI
HI
LO
HI
LO
LO
HI
LO
HI
LO HI
LO ,HI
LO HI
LO HI'
LO LO
LO LO
LO LO
LO LO
HI HI
HI
HI
HI HI
HI
HI
HI
LO
lei LO
HI
LO
HI
LO
LO HI
LO HI
LO HI
LO HI
LO i.o
LO LO
LO LO
LO LO
HI HI
HI
HI
HI
HI
HI
HI
HI
LO
HI
LO
HI
LO
HI
LO
LO HI
LO HI
LO HI
LO HI
LO LO
LO LO
LO LO
LO LO
HI
HI

DL
1
1

HI
LO
LO HI
LO LO
HI
HI
HI
LO
LO HI
LO LO
HI
HI
HI
LO
LO HI
LO LO
HI
HI
HI
LO
LO HI
LO LO
HI
HI
HI
LO
LO HI
LO LO
HI
HI
HI
LO
LO HI
LO LO
HI , HI
HI
LO
LO HI
LO LO
HI HI
HI
LO
LO HI
LO LO
HI
HI
HI
LO
LO HI
LO LO
HI
HI
HI
LO
LO Ht
LO LO
HI HI
HI
LO
LO HI
LO LO
HI
HI
HI 'LO
LO In
LO LO
HI HI

I

Figure 3-1
96 CHARACTER PLASTIC
PRINT WHEEL PHYSICAL SPOKE POSITION
TABLE 3-4
HAMMER ENERGY OPTION COMMAND DATA
DL 9
DL10
DL 11
Level

HI
HI
HI
1

LO
HI
HI

HI
LO
HI

LO
LO
HI

HI
HI
LO

LO
HI
LO

HI
LO
LO

LO
LO
LO

2

3

4

5

6

7

8
highest

lowest

2.

Carriage Movement Commands

Models 1345A and 1355HS
When receiving a carriage movement command during a carriage strobe
sequence, the 10 low order data line bits always represent carriage
movement in multiples of 1/60 inch (.423 mm). The printer's internal
logic processes the input data bits in even multiples of 1/120 inch
(.212 mm), and commands actual carriage movement in increments of
1/120 inch (.212 mm). Users wishing to command carriage movement in
terms of 1/120 inch (.212 mm) must do so by first dividing the desired
carriage move increment number by 2 and transmitting the result to the
printer as multiples of 1/60 inch (.423 mm), and second, to transmit
Data Line 12 (bit 2048) = LO whenever the command is for an odd number
of 1/120 inch (.212 mm) increments. DL 12=LO commands the printer
logic to add one 1/2 space, or 1/120 inch (.212 mm) increment, to the
end of the carriage movement. The 11th bit (bit 1024) is used to indicate direction of carriage travel, with a LO directing carriage
movement left, and a HI directing carriage movement ~ight.
The conRev C (3/80)

3-5

troller must maintain carriage position and not exceed a total move
count of 792 increments of 1/60 inch (.423 mm) right from print position O.
3.

Paper Feed Commands

Models l345A and 1355HS
When receiving a paper feed command during a Paper Feed Strobe sequence, the 10 low order data line bits represent paper feed movement
in multiples of 1/48 inch (.529 mm). The 11th bit (bit 1024) is used
to indicate the direction of paper feed movement, with a LO directing
paper feed down (reverse), and a HI directing paper feed ~ (forward).
During a paper feed sequence, the 12th or highest order Data Line (bit
2048) is ignored, and should be maintained in the HI state.
3.2.2.5.2
1.

Model l355WP

Print Wheel, Ribbon Advance, and Hammer Energy Commands

The XEROX metalized Word Processor print wheel differs from the standard Diablo plastic print wheel in design, in petal assignment, in number of characters or petals, and in the characters themselves.

Figure 3-2
XEROX 88 CHARACTER METALIZED
WORD PROCESSOR PRINT WHEEL
Figure 3-2 shows a typical 88 charactermetalized word processor print
wheel.
When representing an ASCII character command for the print wheel, the
7 low order bits (1 thru 64) are used to designate the next character
to be printed according to the Diablo modified 7-bit ASCII code shown

3-6

Rev C (3/80)

I

in Tables 3-5/-6. In this normal mode of operation, the printer's internal logic determines the shortest distance and direction for print
wheel movement to bring the commanded character in front of the print
hammer as fast as possible. Also, the printer's logic will select
hammer energy levels and ribbon advance increments from its ROM table
appropriate for the character being printed.
When the RIB. OPT 1 option is selected, the printer's internal program
is changed to increase the carriage settling time from 3 to 8 msec.
This additional time improves the horizontal print registration at a
small sacrifice in average print speed.
When the RIB. OPT 2 option is selected, all internal programs and
tables associated with Print Wheel Strobe are bypassed • . The controller is provided direct access to control hammer energy, ribbon advance
and print wheel position address. Tables 3-5/-6 include listings of
all the data line codes to be used in this mode.
Since this mode includes interface access to both ribbon advance and hammer energy, it
preempts the HAMMER ENERGY option.
When the HAMMER ENERGY option is selected, in the absence of the RIB.
OPT 2 option, interface access to ribbon advance and hammer energy
only is enabled. Tables 3-5 and 3-6 list the data line codes to be
used in this mode. Note that the print wheel logic will respond to
the normal ASCII code in this mode.
2.

Carriage Movement Commands

The response of Model 1355WP to carriage movement commands is identical to that of Models 1345A and 1355HS, as outlined in Subsection
3.2.2.5.1.
3.

Paper Feed Commands

The response of Model 1355WP to paper feed commands is identical to
that of Models 1345A and 1355HS, as outlined in subsection 3.2.2.5.1.
4.

Proportional Spaced Printing

When proportionally spaced printing is desired, the user must calculate the Proportional Space Pitch Mode Carriage Advance Unit as
follows:

I

The proportional space pitch mode carriage advance unit is defined
as the sum of the PS unit value of the last previously printed
character and the PS value of the next character to be printed.
The 10-pitch is defined as 12 units, and 12-pitch is defined as 10
units. Table 3-7 lists the character PS units.

I

The Carriage Advance Unit is then sent to the printer as a carriage movement command, where a carriage advance unit of 1 equals
a carriage movement of 1/120 inch (.212 mm).
Table 3-8 lists
examples of the data line codes necessary to obtain PS carriage
advance units of various values.

Rev C (3/80)

3-7

'u"

TABLE 3-5
WORD PROCESSOR PRINT WHEEL DATA
(88- & 92-Character Print Wheels)
f----- .. _ __

~T ---1iiI...M ~~ER.i!~it;~;"I=PTI20Pt;on__-

WPP.W.
ELECTRICAL
& PHYSICAL

(CWI SPOKE
POSITION
1**
2**
3*
4*
5

WP P.W.
STANDARD
PRINT

CHARACTER
%
£

o

~2-'-.-.--4-2--'--- ~120481o-24

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DL.
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DL
6

DL
5

DL
4

-. --64-"~32-'-16 --8

DL
3

DL
2

DL
1

4- - 2 -- 1

WWWWWWW
WWWWWW~

LOHILOLOHILOLO
LOHILOLOLOHIHI

W

W

W

W

~

0

I

m W

D

La HI
HI
HI
LO HI
LOHI
La
HI
to HI
La HI
HI
HI
to HI
LOHIHI
HI
LO HI
La HI
HI

V

E
.,
A
T

20
21

I
H

32
33
34
35
36
37
38
39
40
41
42

W

43 (,Iph.b.tl

I

44

y

45
46
47
48

f
K

U
C
1 =(()
M
G

;
m

~

W

W

W

W

HI
HI
HI
La
HI
HI
La
LO
HI

La HI
HI
HI
La HI
La HI
La
La HI
LO
HI
LO LO
HI
HI
La
LOHI
La
La LO HI
La LOLO

~

W

~

W

W

~

~

LO
LO
La
LO
LO
La
La

HI
La
HI
LO
HI
LO
LO

La
HI
La
HI
HI
HI
HI

HI
LO
La
HI
LO
LO
La

La
La
HI
La
HI
HI
La

LO
HI
HI
La
LO
HI
HI

LO
HI

to
HI
LO
LO
LO

W

2HI
LO
4LO La
2HI
LO
4LOLO
1 HI
HI
4LO La
3LO HI
4LOLO
2 HI
La
4LOLO
3LOHI
3 LO HI
3 LO HI
4LOLO
1~
~
4LOLO
3 LO HI
4LOLO
2 HI
LO
4LO LO
2 HI
LO
4 LO La
2~

Ch

rol
~

t

.,.;;
~

...,

W

W

W

~

W

W

~

~

W

4W

W

~

W

W

~

~

3W

LOHI
HI
lO

~

~

LOLOLOLOLOHILO
LOLOLOLOLOHIHI
LO LO La LOHI
LOLOLOLOHI

~

~

4LOLO
4LOLO
3LOHI
4LOLO

~

~

~

I.

17
18

2.
2.

w

:=

~

24

"co

DL
1

LOHILOLOHILOHI
HI
LOHIHI
LOHIHI

22
23



o

R 18 OPT 2 Option

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POSITrON

WPP.W.
STANDARD DL
PRINT
7
CHARACTER 64

,**
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La
La
La
La

4*
5

HI

6

7
8

9

'0

"

v

'2

,.'3
w

,.'5

,
E

La
HI
La
HI
La
HI
LO
LO
LO
HI

I

18

A

LO
HI
LO

\0

,9

T

LO

20

L
J

LO

'7

2'

22
23

2.

N

2.

I
H

25

27
28
29

30

R
lalphabtll

0

I

3'

o

32

33

u

34

35

3.

LO
LO
HI
LO

LO
La
HI
LO
HI
LO
HI
LO

HI
LO
HI
LO

37

HI

38
39
40

M

LO
HI

G

LO

WP P,W. ASCII
CHARACTER CODE
DL Dt Dt OL Dt
6
5
4
3
2
32-- 16'- - --4-- .
HI
LO
HI
La
HI
La
La La
La LO
HI -LO
La HI
HI
HI
La La
HI
La
LO HI
HI
LO
HI
LO
HI
La
LO HI
HI
HI
LO LO
HI HI
HI
LO
HI
HI
HI
HI

HI

HI

La
HI
HI
HI
LO
HI
LO
HI

HI

LO

LO

LO

LO

HI
LO
LO

HI
LO
HI

LO
HI
LO
LO
LO
LO
LO
HI
LO
LO
LO
HI
LO

LO
LO
LO
HI
HI
HI
LO
HI
LO
HI
LO
LO
LO'

LO
LO
LO
LO
LO
LO
LO

HI
LO
HI

LO
LO

LO

LO

LO

HI
LO
HI
LO
HI

LO
LO
HI
HI
LO

LO
HI
LO
HI
LO

LO
HI
LO
LO
LO

HI
LO

LO
LO

LO
4 to

HI
LO
LO
LO

LO

LO

HI
HI
HI
La
LO
La
LO
HI
HI
LO
La
La
LO
LO
HI
LO

LO
HI
HI
HI

HI
LO

LO
HI
HI

HI
LO

LO

HI
LO

HI
HI

LO
LO

LO
lO
LO

LO
LO
HI

LO
LO

HI

LO

LO

LO
LO
HI
LO
LO
LO

lO
HI
LO
HI
HI
LO

HI
HI
LO
LO
HI
HI

HI

LO
HI
LO
HI
HI
HI
HI

I

LO
LO
LO
LO
LO
LO

La
HI
LO
HI
LO

LO

HI
HI
LO

LO
HI
HI
LO

120481'024

LO
HI
LO

HI

HI

48

LO

HI

HI

6

LO

LO
LO
HI

HI

Dt

7
- -64--

LO
LO

~

4
2
4
3
3
3
4
1

HI
LO
HI
LO
HI
HI
LO

to

lO

HI
LO
HI

LO
HI
LO
LO
La

11

4
1
4
2
4
2
4
3

2 HI
4 LO

~

f '512-256 -'28

LO
LO
LO
LO
LO
LO
LO
LO
La
LO

LO

~

:li
~

Ji

HAMMER ENERGY Option

-RI-SBON---t

CHARACTER CODE

DL

LO

HI

LO
HI

8

LO
HI

HI

LO

DL

9

LO

HI

LO
LO

Dl

LO
LO
HI

LO

LO
LO
HI
La
LO
LO
HI

DL

10

2 HI
2 HI
LO

LO
HI
HI
HI
HI
LO
HI
LO
HI
LO

HI

LO

.7

LO
LO
HI
LO
LO
LO
HI
HI
HI
HI
HI

.t:

I

WP P.W. ABSOLUTE

LO
HI
LO

La
HI
LO
HI

HI

V
f

HI

DL

ADV.ANCE

I

2 HI
1 HI
2 HI

HI

HI
HI
LO

(

44

LO
HI
HI
LO
LO

OL

~:;.

________________~~~20Pt~~ _ _ _ _ _ _ _ _ _ _

J - - -- -

La
HI

HI

W

46

LO
HI
HI
LO
LO

LO

LO
HI
La
La
La
HI
La
HI
HI
LO
LO
LO
LO
LO
HI

~.

ENERGV ..

RrBBON

,

to

42

.5

LO

HI
La
HI
La
HI
HI

HI

I

~i

~. 12

HI

4'
lalphabet)

LO
HI
LO
HI
La
HI
LO
HI
HI

La
La
La
HI
La

,

DL

HI
HI
HI
HI
LO
LO
LO
HI
HI

LO
HI
LO

43

La
La
La
La
La
La
HI
HI
La
HI

THAMMER

La
La
LO
LO

to
LO
La
La
LO
LO
La
La

LO
LO
LO

5
32 -'16
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO

LO
LO

HI

LO
LO

HI
HI
HI
HI

LO
LO
LO
LO
La

DL

Dl

3

2

1

LO

LO

LO

to

LO
to

to
HI

LO
HI
HI
HI
HI
LO

HI
LO
LO
HI
HI
LO
LO
HI
HI

LO
HI
LO
HI
LO
HI
La
HI
LO

-'s' LO
LO
LO
LO
LO
LO
HI
HI
HI
HI
HI
HI
HI
HI
La
LO
LO

LO
LO

2'

HI

LO

HI
LO
HI
LO

HI
HI
HI

LO
HI
HI

HI
La
HI

to

to
to
HI

LO
HI

La

LO
LO

LO

LO

LO
LO
LO
LO
HI
HI
HI
HI
HI
HI

HI

HI

HI
LO
LO

LO
La

HI
HI
LO
to

HI

HI

La
HI
LO
HI
LO

HI

LO

~

~

~

LO

LO

~

~

~

~

~

~

LO
LO
LO
LO
LO
LO
LO
LO

LO
LO
LO
LO
LO
LO
LO
LO

LO
LO
LO
LO

LO
LO

LO

LO

HI

LO

LO

HI
HI
HI
HI
ffi

La
La

HI
HI

LO

HI

La
LO
LO

HI

HI

LO

HI
HI
HI
HI
HI
ffi

LO

HI

LO

HI

LO
La
La

*CAUTlON: These positions must nOl be addressed when using standard 8S-character print wheels; to do so will damage the printer.
**CAUTION: These positions must not be addressed when using standard 8S· or 92-character print wheels; to do so will damage the printer.
NOTES·
L The "standard" print characters listed are those found on the Diablo 96·character "Titan 10" Word Processor Print Wheel.
2. Signal polarity: 1 -= TRUE = LO = 0 volt
0'" FALSE = HI '" +5 volts

HI

LO

HI

~

ffi
ffi
ffi

LO
LO
LO
LO

HI
ffi
HI
HI

~

ffi

LO

~

ffi

LO

LO

LO

~

ffi
HI
LO

LO
HI
LO

LO
HI
HI
La
La
HI
HI

HI

LO
HI

LO
HI
LO
HI

x

~

a

~

~

LO
LO
La

LO
HI

LO

HI
LO
LO
La
La
LO

LO
LO
LO
La
La
La
La
La
LO
LO
La
La

~
~
~
~
~
~

00
~

Q
~

M
~

LO

~

~

LO
LO

~

to

~

LO
LO
LO
La
LO
HI
La
HI
HI
HI
HI
HI
LO
HI
HI
HI
HI
HI

~

n

n

m

LO

.

~

W

n

La
HI
HI

La

oJ:

LO
HI

LO
La

to

HI

LO
LO

DL

4

HI
LO
HI

La

LO

DL

HI
HI
HI
HI
HI
HI

LO

LO

LO
LO
La
LO
LO
LO
La
LO
LO
LO
LO
La
La
LO
LO
La
HI
HI

HI
HI

HI
HI
HI

LO

DL

WPP.W.
I-·i-HAMME-R-~I·!f;
WPP.W.ASCII
WP P.W.
CHARACTER CODe
: ENERGY
;; , ADVANCE
ELECTRICAL
OL DL
DL OL OL
& PHVSICAL STANDARD Ol DL OL D. L OL OL DL
PRINT
7
6 5 4 3 2 ,
~'12 11
10
9
8
ICWI SPOKE
CHARACTER
64-32---'-6--8-~-2--'~12048-10i4:e~i2256 128
POSITION

•
I

I
@
(

~
~

n

&

n
n

%

80

8,

..
.
82

Inumber)

1

83
85

86

{number!

87
88

90
9'
92

93*
9.*
95**
O**IHomel

0
5

•
7
8
9
#

}

HI
HI

HI
HI
HI

HI
La
LO
LO

HI

LO

to
LO
LO
LO
LO
LO
LO
LO
LO
LO
LO
La

to
to
La
LO
LO
HI
LO
La
LO
LO

LO
HI
La

LO
LO
to
La
LO
La
LO
La
LO
La
LO
LO
LO
La

HI
LO
LO
LO
La
LO
LO
HI
HI
HI
HI
HI
HI
HI
LO
LO
HI

to
LO
HI
HI
LO

LO
LO
LO
HI
HI

HI
HI

HI
HI
HI
LO
LO
La
La
LO
La

La
La
HI
HI

HI
HI
HI

HI

La
LO
HI
LO
LO
La
HI
LO
HI
HI
LO
LO
LO
HI

HI
HI
LO
LO
HI
HI
HI
La
HI

HI
HI
HI
La
HI

HI
LO
LO
LO
HI
"La

HI

LO
LO

HI
HI
LO
LO
HI
LO
HI
LO

LO

HI

HI
HI
HI
HI
La
HI
LO

LO
LO
HI
HI
LO
La
HI
LO
LO
HI

LO

LO

HI
HI

HI
HI
LO

HI
HI

HI

LO
HI

HI

LO

HI

HI
La

LO
HI
La
HI
HI
HI

LO

LO

HI

HI

HI

LO
HI

HI

HI
HI
HI
HI
HI

La

LO

La

LO

HI

HI

La
La
HI
HI

HI

La
LO
HI
HI
HI
HI
HI

HI
HI
LO
ffi

LO
LO
La

HI
HI
HI

LO
LO
LO

LO
LO

HI

HI

LO
LO
HI

LO
LO
HI

HI
HI
HI
LO
LO

HI

HI

LO
LO

LO
HI
LO
HI
HI

HI
HI

LO
LO
HI
La
La

HI
ffi
ffi

HI

HI
LO
HI
LO
La

HI
LO
HI

m

LO

LO
LO

ffi

HI
HI
LO
HI
LO
HI
HI

HI
LO
LO
LO
HI
HI

LO

HI

.t::

:5

3 LO

4 LO
3 LO
4 La
3 LO
3 La
2 HI
3 LO
3 LO
3 LO

3
3
3
3
3

to
LO

LO

HI
LO
HI
La
HI
HI
LO
HI
HI
HI
HI

HI
HI

La
LO
3 LO
La
La
LO
LO
LO

HI

LO

HI
HI

LO
LO
2 HI

2 HI
4 LO
2 HI
4 LO
1 HI
4 LO
1 HI
2 HI
HI
LO
LO
LO

LO
LO
3 La
3 LO
4 to
3 LO
4 La
2 HI
1 HI
1 HI
3 La

HI
HI
LO
HI
LO

HI

3
7
4
7

5
5

5

5
5
5
5
5
5
5

HI

La
LO
LO

3

LO

8

OL
7

Wp P.W. ABSOLUTE
CHARACTER CODE
DL DL OL OL OL
6
5
4
3
2

LO
LO

HI
HI

HI

LO

HI

~

LO
LO
LO
La
LO
LO
LO
LO
LO
La
LO
LO
LO
HI
HI
HI
HI

HI

HI
HI
HI
HI
HI
HI
HI
HI
HI

LO

HI

La

LO

HI

LO

LO

HI

LO

HI
HI
HI
HI

HI

LO
LO

HI

LO

HI

HI
HI

LO
LO

HI

LO

HI

HI
(HI
(HI

LO

HI
HI
HI
HI

LO

HI

HI

HI

LO

LO

HI

HI

LO

(HI

LO

HI

IH1

LO

HI
HI

HI
HI
HI

La
HI
La
HI
La
HI
LO
HI
LO
HI
LOI
HI)

HI
HI

LOI
HI )

HI

HI

HI

LO
HI
HI
LO

HI
HI
HI

HI
HI

3
5
5
5

HI
HI
HI
HI
La
LO
LO
La
LO
LO

HI
LO
HI
La
HI
LO
HI
LO
HI
LO
HI
La
HI
LO
HI
LO
HI

LO
LO
to

La
HI
HI

..

LO
HI
HI
HI
HI

LO

HI
LO
LO
HI
HI
LO

LO

HI

LO

HI
HI

La
HI
HI
HI
HI
LO
LO
LO
LO
HI
HI
HI
HI
La
LO
La
La
HI

LO
ffi

LO
LO
LO

HI

HI
HI

La
HI
La
LO

LO
LO
La
La

LO
LO
ffi

LO

'~"

HI

5
5
6
5

LO
LO
LO

LO
LO
LO
LO
LO
LO
LO
La
LO
La
La
LO
La

HI

La
HI

HI
LO
HI
HI
HI

HI
HI
HI
HI
HI
HI
HI
HI
HI
HI
HI
LO

LO
LO
LO

HI

HI
HI

~

Ji

HI

~

HI
HI
HI
LO
La
LO
LO
LO
LO
LO
La
HI
HI
HI
HI
HI

HI
HI
HI
HI

La
LO

DL
1

64-32-~-42--1---

LO

LO
La
LO
LO
La
LO
La

to
LO
La

HI

HI
HI

HI
HI
HI
LO
LO
LO
La
HI
HI

HI
HI
LO
LO
HI
HI

LO
LO
HI

LO
LO

HI
HI
HI

HI
LO
La
HI
HI
La
La
HI
HI
LO
LO
HI
HI
La
LO
HI

LO

HI

HI

HI
HI

LO
LO

LO
LO

LO

HI

LO

HI

HI

HI

HI
HI

LO

LO

LO
HI
La
HI
La

HI
LO
HI
LO

HI
LO

HI
to
HI

TABLE 3-7
CHARACTER PROPORTIONAL SPACE UNITS - WP CARRIAGE ADVANCE
PW POSITION

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24

IN

I
I-'

o

CHARACTER

I
(-"I

(J

% (\1
£ I{I
cj:
Z

$
B

=
P

+
V

S

*
E

?
A

T

L
J

.
F

N

01

PS UNIT

(31
(51
6 (51
5 (31
5
6
5
6
5
6
5
6
5
5
5
6
5
7
6
6
5
6
2
7

PW POSITION

25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40

41
42
43
44
45
46
47
48

CHARACTER

I
H

;
R
:

0

I
0

..
U

C
!
M
G

.

W

I
Y

f
K

i

m

PS UNIT

3
7
3
7
3
7
4
7
4
7
4
7
3
8
3
7
3
8
3
7
4
7
3
8

PW POSITION

CHARACTER

PS UNIT

49
50
51
52
53

j

54

w

55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72

r

3
7
4
7
4
7
4
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5

X
5

a
t

0

n

e
a
d
h

c
u

v
9
y

p
b
k

x
z
q

PW POSITION

CHARACTER

73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95

o (HOMEI

PS UNIT

6
3
8
3
7
3
8
3
6
5

%

I
@

(

&

.
%
%

1
2
3
4
0
5
6
7
8
9

5

#
% (} I
% (..... )
(, )
(cj: )

5
5
5
5
5
5
5
5
6
6 (3)
6 (5)
(5)
(5)

I.......

:;0
(!)

<:
(')

IN

"ex>
o

NOTES:
1. Units = 1/120 inch 1.212mml carriage movement.
2. Characters and PS unit values listed in this table represent 88-character "Titan 10", 92-character "Titan lO" (UK), and 96-character "Titan 10" print wheels. Parentheses ( I are used
where characters and/or PS units of the 96-character wheel differ from those of the 88 and 92-character wheelS. PW POSITION utilization is 5 thru 92 for 88-charactet wheels, 3 thru 94
for 92:':haracter wheels, and 1 thru 0 for 96-character wheels (see Tables 3-3 and 3-4\'

Note that a proportional space (PS) print wheel must be used.
If the user wants to minimize the rate at which ribbon is used,
the Proportional Space Pitch Mode Ribbon Advance Unit may be calculated as one-half the carriage advance unit.
TABLE 3-8
PROPORTIONAL SPACE UNITS
CARRIAGE ADVANCE
DL 1
DL 2
DL 3
DL 4
DL 5
DL 6
DL 7
DL 8
DL 9
DL 10
DL12

HI
HI
HI
HI
HI
HI
HI
HI
HI
HI
LO

LO
HI
HI
HI
HI
HI
HI
HI
HI
HI
HI

LO
HI
HI
HI
HI
HI
HI
HI
HI
HI
LO

HI
LO
HI
HI
HI
HI
HI
HI
HI
HI
HI

HI
LO
HI
HI
HI
HI
HI
HI
HI
HI
LO

LO
LO
HI
HI
HI
HI
HI
HI
HI
HI
HI

LO
LO
HI
HI
HI
HI
HI
HI
HI
HI
LO

HI
HI
LO
HI
HI
HI
HI
HI
HI
HI
HI

HI
HI
LO
HI
HI
HI
HI
HI
HI
HI
LO

Units

1

2

3

4

5

6

7

8

9

LO
HI
LO
HI
HI
HI
HI
HI
HI
HI
HI
10

Units = 1/120 inch (.212mm)

TABLE 3-9
PROPORTIONAL SPACE UNITS
RIBBON ADVANCE

I
I

DL 8
DL 9
DL10

HI
HI
HI

LO
HI
HI

HI
LO
HI

LO
LO
HI

HI
HI
LO

LO
HI
LO

HI
LO
LO

Units

2

3

4

5

6

7

8

This ribbon advance unit is then sent to the printer as a ribbon
movement command on Data Lines 8, 9 and 10, as shown in Table 3-9.

3.2.3

Note that the user must have selected either the RIB. OPT 2
or the HAMMER ENERGY options to enable proportionally spaced
ribbon advance.
Output Lines

3.2.3.1

READY Lines

Five lines transmit the status of the several operating parts of the
printer to the controller, when enabled by the SELECT PRINTER=LO signal. These are Printer, Carriage, Paper Feed, Print Wheel and Option
Ready signals. The Printer Ready signal indicates that the printer is
receiving proper power input. The others indicate that their associated circuits are in condition to receive and execute commands.

Rev C (3/80)

3-11

3.2.3.2

CHECK Line

A LO signal on this line indicates that a previously received print
wheel or carriage command was not successfully completed, due to a
malfunction. This condition stops the printer, and disables the carriage, paper feed and print wheel ready lines. Only a restore sequence, initiated by either controller command or by removal and reapplication of power will clear a check condition.
NOTE:
3.2.3.3

The CHECK status line may remain active (LO) for a maximum of 120 nanoseconds after a RESTORE is issued.
Paper Out Line (Option)

A LO signal on this line signals an out of paper condition to the
controller when this option has been installed in the printer.
3.2.3.4

Cover Open Line (Option)

A LO signal on this line signals the controller that the printer's
front access cover is open when this option has been installed in
the printer.
3.2.3.5

End Of Ribbon Line (Option)

A LO signal on this line signals the controller that the ribbon cartridge has been depleted, for multistrike carbon film ribbons only,
when this option has been installed in the printer.
3.3

TIMING CONSIDERATIONS
I

- SELECT PRINTER

~~:~--~~------------------I

-DATA LINES

I .:. . +-----+-......

p . . . . - I_

I

I

-STROBE

!

I

i
I

~ Ipi

.1

I

.. READY

I
I

lTd

I
*

I

I

I

I

--'~~~----~!~----------------------------~I
I

I

I

Td
I ~ 41

I
I
I

I
"'I~
__------*------.....,"'~I
I
I

lTd_I

Tdl,Td2, Td3 ~ 200n••c
Td4 ,200nllc

I -Zl

J!
II
I

I

lTd
I 31

THE TIME THE "READY" SIGNAL IS HI (FALSE) DEPENDS ON THE EXECUTION TIME OF THE
COMMAND. STROBES OCCURRING WHILE THE ASSOCIATED READY IS HI ARE IGNORED.

Figure 3-3

TYPICAL COMMAND SEQUENCE

The HyType II Printer will accept data to select a character, move
the carriage, or feed paper only when the corresponding STROBE pulse
is present on the interface. The timing diagram in Figure 3-3 il-

3-12

Rev A (4/79)

lustrates the typical timing relationship between the DATA input, the
S~ROBE pulse, and the READY signal.
Timing for carriage move commands
afid paper feed commands are exactly the same. The corresponding READY
line must go LO prior to application of the STROBE, or the command
will be lost. Note also that a ribbon command will change the PRINT
WHEEL READY status.
Strobes for selecting a character (print wheel), moving the carriage,
and moving the paper can be received with a minimum separation of 400
nanoseconds between them. Strobes sent to the printer will be executed in the order of receipt. The print wheel, carriage, and paper feed
may be moving simultaneously. However, the print wheel will inhibit
paper and/or carriage movement during the printing (hammer fire) portion of its cycle.
The print wheel cycle is divided into two subcycles:
1.
2.

Motion of the print wheel to the selected character; and
Firing of the print hammer.

The firing of the hammer will be
carriage, and paper feed are all
cycle, any print wheel rotation,
deferred until completion of the

executed ONLY when the print wheel,
at rest. During the hammer fire subcarriage movement, or paper feed is
character print.

A CARRIAGE STROBE followed (400 nsec later) by a PRINT WHEEL STROBE
will cause the carriage and the print wheel to move. Printing will
occur when both the carriage and the print wheel are fully stopped.
This is a space before print sequence.
In this case motion is overlapped.
A PRINT WHEEL STROBE followed (400 nsec later) by a CARRIAGE STROBE
will cause the print wheel to rotate and the character to be printed
prior to the carriage motion.
In this case, motion will not be overlapped. This is a space after print sequence. The time involved is
not the same for both sequences because of the overlapped motion.
The RIBBON LIFT signal can only be changed when the PRINT WHEEL READY
signal is LO. The minimum ribbon lift pulse length is 200 msec, with
a maximum cycle time of 5 position changes per second. Refer to subsection 1.3.8 CAUTION note. Note also that RIBBON LIFT and PRINT
WHEEL strobes must not coincide.
3.4

INPUT GATES
+5V

+3.5V

+5V

INITIAL CIRCUIT
(EARLY MACHINES)

FROM
CONTROLLER 0--.........*---4.-----1---""

TO
INTERNAL
LOGIC

FROM
CONTROLLER

REVISED CIRCUIT
(LATER MACHINES)

o-.......----<~

390Q

8837 TYPE NOR GATE
LOGIC "LOW" INPUT THRESHOLD:
LOGIC "HIGH" INPUT THRESHOLD:

Figure 3-4
Rev A (4/79)

MIN +1.4V; NO CURRENT LOAD
MAX +2.7V; 180 MICROAMP.
MAX CURRENT LOAD (PULLED UP)

STANDARD INPUT CIRCUITS
3-13

TO
INTERNAL
LOGIC

The input of the printer line receiver must be pulled up to the HI
logic state. For this reason it cannot be driven by an open collector
driver without collector resistance. The collector resistance inside
the printer is 150 Ohms. The circuits are configured as shown in
Figure 3-4.
3.5

DRIVE CAPABILITY OF OUTPUT GATES

FROM:'---_ _....,~ CONTROLLER
TO

INTERNAL
LOGIC

~

-

75452 TYPE TTL POWER GATE
LOGIC "LOW" OUTPUT LEVEL:
LOGIC "HIGH" OUTPUT L.EVEL.:

Figure 3-5

MAX -.5V AT 100 MILLIAMP. SINK CURRENT
MIN -4.5V AT NO EXTERNAL LOAD CURRENT

OUTPUT DRIVER CIRCUIT

The open collector circuit shown in Figure 3-5 is used to drive the
output lines to the controller. Collector resistance of 150 Ohms is
recommended within the controller.

3-14

Rev A (4/79)

SECTION 4
PRINCIPLES OF OPERATION

!....!.

RIBBON CONTROL

PRINT WHEEL POSITION

LOGIC I

~
~

t

!'.!!!!i.1_

.!.Q§!£.l.

ERROR,.

IN

~

RIBBON LIFT

~

RIBBON DRIVE MTR

PRINT WHEEL DRIVE MTR

I

COMMANDS
eDATA
SELECT
PRINTER

HAMMER

~

.~.!i~~b.
PCB

IN

~

~

HUNES
INPUT

4 LINES

OUTPUT

PROCESS'

17 LINES

OUT STATUS

PCB

VELOCITY
CONTROLCOMMANDS

------

TACHOMETER

Qa!!!!L~I!.~

I

TRANSDUCER

PCB

CAR.

CONTROL

PCB
CARRIAGE POSITION

PW

a

SEQUENCE
CLOCK

•

ACTIVITY

~

£!!!:

ERROR

~

~

~

PCB

CARRIAGE DRIVE MTR

PAPER FEED DRIVE MT R

PAPER FEED CONTROL
PCB

OPTION CONTROL

r-----,
.Qf!!Q!!

I

I

L.!~.!_...J

Figure 4-1
4.1

,
I
'...'
~~

..... --0{ •

\

OPTION DRIVE

HyTYPE II PRINTER BLOCK DIAGRAM

GENERAL DISCUSSION

Input to the HyType II Printer from the controller consists of 4 individual Strobe lines, 12 common Data lines, a Select Printer line, a
Ribbon Lift line, and a Restore line. Output from the HyType II to
the controller consists of 5 individual Ready lines, a Check line, and
3 option status lines (Paper Out, End Of Ribbon, and Cover Open). All
of these lines channel thru the I/O connector J7 located along the top
edge of Logic #1 PCB in the printer's electronic conpartment, slot A.
The HyType II Printer uses a microprocessor based logic system where
the data portions of the several types of commands are multiplexed together on the 12 common data lines, and share common input and control
circuits. The microprocessor continuously circulates command and situation data for each of the several printer functions. It performs an
arithmetical update operation for each function on every program pass
or cycle, whenever data is present. At the proper time in each program cycle, the processed data is channeled out to the individual
drive circuits to activate the function.
While the HyType II Printer was designed to be used alone as the single output device for a computer system, it includes circuit provision
to allow the use of more than one printer in a system all receiving
commands from a common data bus. This feature-i-~the -SEL PRINTER input. When power is properly applied to the printer, its internal circuits are all reset, and ready to receive commands. Prior to issuing
any commands, the controller must first issue a -SEL PRINTER=LO signal
to select the printer, and must receive from the selected printer a LO
signal on each of the 5 Ready lines to ensure that the printer's systems are ready to receive and execute commands.

Rev A (4/79)

4-1

Movement commands are accepted from the controller by a selected
printer, and stored on Logic #1 PCB, slot A. They are then gated out
at the proper time to the microprocessor storage and processing circuits on Logic #2 PCB, slot B. The microprocessor's program then controls the step-by-step handling of all data throughout the circuit.
Processed print wheel and carriage commands go to the Servo PCB, slot
C, where, in conjunction with position feedback transducers, positional error signals are generated. These error signals are channeled to
the appropriate Power Amplifier PCB's. where they become servo drive
signals for the print wheel and carriage servo motors. Feedback
loops, beginning at the position transducers on each of these motors,
introduce continuously updated true position status to the servo circuits and to the microprocessor on Logic #2 PCB through circuits on
Logic #1 PCB, for an ongoing comparison of present-to-commanded position. The result of these comparisons are the positional error signals mentioned above.
Processed ribbon commands go directly from Logic #2 PCB to the ribbon
drive circuits on the Print Wheel Power Amplifier PCB, slot H. Processed paper feed commands go directly from Logic #2 PCB to the paper
feed drive circuits on the Carriage Power Amplifier PCB, slot D. Both
of these are one-way instructions which do not rely on position status
feedback to the logic circuits for position update.
All printer functions may be in motion except during print hammer fire
time. Since the act of imprinting a character mechanically bridges
all moving functions, they must all be at rest prior to energizing the
print hammer solenoid. A system of firmware interlocks ensures that
these preconditions are all met before firing of the print hammer is
allowed.
The printer's electronic design includes firmware for resetting and
initializing carriage and print wheel servos. This is called RESTORE,
a program activated by conditions within the printer, or by command
from the controller. The RESTORE operation is divided into two parts:
# Carriage initialization, and
# Print Wheel initialization
Carriage initialization is performed first in any RESTORE sequence.
The carriage is commanded to move to the left (reverse) at a low velocity. When Carriage Home is detected (a sensor is located under the
left end of the front carriage rail where a light beam is interrupted
by the arrival of the carriage), the carriage servo is disabled.
After .1 second, the carriage is commanded to move to the right (forward). After the microprocessor detects the absence of Carriage Home,
it allows the carriage to move two more position increments of 1/120
inch (.212 mm) each, or 1/60 inch (.423 mm), and stops the carriage.
This location is designated as the carriage home position.
Print Wheel initialization is performed after the carriage has been
initialized. The print wheel is commanded to rotate clockwise at a
velocity corresponding to a move of 30 counts (15 character petals).
As the print wheel passes the Print Wheel Home position sensor (a vane
mounted on the print wheel motor shaft behind the print wheel induces
4-2

Rev A (4/79)

a voltage pulse in an inductor mounted on the carriage frame each time
it passes) for the third time, the microprocessor resets its Absolute
Counter to zero. The microprocessor then allows the print wheel to
move 30 more counts and then stops it. This position is designated as
the print wheel home position, and is the capital E on the standard
print wheel furnished with each Model l345A printer, the lower case w
on the standard print wheel furnished with each Model l355HS printer~
and is the "flag" position on the metalized print wheel furnished with
each Model l355WP printer. Note also that the print wheel stops "at
the sensor" and does not rotate the additional 15 counts in Models
l355HS and l355WP to reach the print wheel home position.
The following subsections provide detailed operating descriptions of
the printer's logic and drive circuits. See Section 7 for a description of the conventions used in describing the circuits.
NOTE: Schematics for and discussion of earlier versions of each
PCB have been dropped from publication. Users who need
copies of the old schematics may request them by writing
to the address listed in the preface.
(Slot HI

~~~~W~~ - - - - - . .

(Slot GI TRANSDUCER - - " ' "
(Slot FI OPEN ------'-_._-"
(Slot EI OPEN --_. __ ._-_."

TOP PAPER OUT
SWITCH MOUNTING
HOLES

Figure 4-2
4.2
4.2.1

COMPONENT LOCATIONS

MOTHERBOARD PCB CIRCUITS
General Information

The Motherboard PCB for the HyType II Printer is mounted flat laterally across the bottom rear of the printer's main frame.
It supports up
to eight edge mounted circuit boards which plug into its connectors
from above, down through the main frame electronics cavity. The Motherboard PCB also includes a variety of connectors along its edges for
Rev A (4/79)

4-3

TABLE 4-2

TABLE 4-1
STANDARD MOTHERBOARD
CONNECTORS AND ASSIGNMENTS
CONNECTOR
PCB Edge Connector A
PCB Edge Connector B
PCB Edge Connector C
PCB Edge Connector D
PCB Edge Connector E
PCB Edge Connector F
PCB Edge Connector G
PCB Edge Connector H
Jack J1
Jack J2
Jack J3
Jack J4
Terminal T1
Terminal T2
Terminal T3
Terminal T4
Terminal T5
Terminal T6
Terminal T7
Terminal T8
Terminal T9
Terminal T10
Terminal T11
Terminal T12
Terminal T13

8080 MOTHERBOARD

CONNECTORS AND ASSIGNMENTS

ASSIGNMENT
logic # 1 PCB
logic #2 PCB
Servo PCB
Carriage Power Amplifier PCB
Empty Slot, available for
special purpose PCB
Option PCB, Split Platen Drive
Transducer PCB
Print Wheel Power Amplifier
PCB
Power Input
Carriage Home Sensor
Impression Control Switch
Carriage Facilities (PW motor,
print hammer, ribbc.n lift
and drive)
Cover Open SWitch Option
Ground, Cover Open Switch
Chassis Ground (optional)
Right Hand Paper Feed Drive
Right Hand Paper Feed Drive
Right Hand Paper Feed Drive
Right Hand Paper Feed Drive
Ground, Paper Out Switch
Option
Paper Out Switch Option·
Option Drive
Option Drive
Option Drive
Option Drive

PCB
PCB
PCB
PCB
PCB
PCB
PCB
PCB

CONNECTOR
Edge Connector A
Edge Connector B
Edge Connector C
Edge Connector D
Edge Connector E
Edge Connector F
Edge Connector G
Edge Connector H
Jack J1
Jack J2
Jack J3
Jack J4

TerminalT1
Terminal T2
TerminalT3
Terminal T4
Terminal T5
Terminal T6
Terminal T7
Terminal T8
Terminal T9
Terminal T10
Terminal T11
Terminal T12
Terminal T13

ASSIGNMENT
logic#1 PCB
logic #2 PCB
Servo PCB
Carriage Power Amplifier PCB
8080 Processor PCB
Option PCB, Split Platen Drive
Transducer PCB
Print Wheel Power Amplifier PCB
Power Input
Carriage Home Sensor
Impression Control Switch
Carriage Facilities (PW motor,
print hammer, ribbon lift
and drive)
Cover Open Switch Option
Ground, Cover Open Switch
Ground (optional)
Right Hand Paper Feed Drive
Right Hand Paper Feed Drive
Right Hand Paper Feed Drive
Right Hand Paper Feed Drive
Ground, Paper Out Switch
Paper Out SWitch Option
Option Drive
OPtion Drive
Option Drive
Option Drive

NOTE: Earlier machines also included Motherboard
connectors J5 and J6, which were used to interconnect
the carriage (J5) and print wheel (J6) transducers. later
machines use connectors J8A and J8B mounted on the
Transducer PCB.

4-4

Rev A (4/79)

..

interconnecting to remote items such as drive motors and switches. The
board extends to the right, out beyond the side of the main frame, to
receive the printer's input power through either a plug-in connector
(Jl) or several spade lug terminals (TIl - TIS).
Its circuits provide
interconnection between the several PCB's mounted on it, along with
circuits for power distribution.

.I

Current applications for the HyType II Printer require a variety of
motherboard circuits. The following subsections discuss these circuits individually.
4.2.2

Standard Motherboard PCB, #40500-XX

Refer to Figure 7-1a, Schematic Diagram.
This Motherboard circuit is designed to accommodate all models of the
HyType II Printer except the specialized Systems and 8080 type interfaces. It includes circuits to support all currently available options
and has orie empty PCB edge connector location (Slot E) which users may
utilize for mounting special circuit boards of their own design. Slot
F has a connector mounted in place, and carries control interties to
the Logic #2 PCB connector and to Terminals TIO-T13. This Option facility will support the circuit board for the optional Split Platen
Drive system.
Figure 7-1a includes a layout drawing for this circuit board which
locates and identifies its several connectors and terminals. Table
4-1 below lists these and establishes the circuit assignment for each.
4.2.3

8080 Interface Motherboard PCB, #40614-04

Refer to Figure 7-1b, Schematic Diagram.
This Motherboard circuit is designed to accommodate those HyType II
models which make use of the 8080 type interface. The Option drive
assignment of Slot F is retained, while a connector mounted in Slot E
mounts an 8080 Processor PCB.
Figure 7-1b includes a layout drawing for this circuit board which
locates and identifies its several connectors and terminals. Table
4-2 below lists these and establishes the circuit assignment of each.
4.2.4

System Interface Motherboard PCB, #46080-01

Refer to Figure 7-1c, Schematic Diagram.
This Motherboard circuit is designed to accommodate those HyType II
models destined to be incorporated into systems which will not make
use of the Split Platen option.
In this instance, the 8080 Processor
PCB remains in Slot E, while Slot F is vacated and left open. The
PCB circuits connect all Slot E connector pads in parallel with Slot F
pads.
In addition, power input connector Jl is deleted and replaced
with spade lugs, and the right-hand end mounting bracket is redesigned
to eliminate the adapter cable mounting feature.

Rev C (3/80)

4-5

Figure 7-lcincludes a layout drawing for this circuit board which
locates and identifies its several connectors and terminals. Table
4-3 below lists these and establishes the circuit assignment of each.
TABLE 4-3
SYSTEMS MOTHERBOARD
CONNECTORS AND ASSIGNMENTS
CONNECTOR
PCB Edge Connector A
PCB Edge Connector 8
PCB Edge Connector C
PCB Edge Connector D
PCB Edge Connector E
PCB Edge Connector F
PCB Edge Connector G
PCB Edge Connector H
Jack J1
Jack J2
Jack J3
Jack J4

Terminal T1
Terminal T2
Terminal T3
Terminal T4
Terminal T5
Terminal T6
TerminalT7
Terminal T8
TerminalT9
TerminalT10
Terminal T11
Terminal T12
Terminal T13
Terminal T14
Terminal T15

4.3
4.3.1

ASSIGNMENT
Logic # 1 PCB
Logic #2 PCB
Servo PCB
Carriage Power Amplifier PCB
8080 Processor PCB
Empty Slot - Unused
Transducer PCB
Print Wheel Power Amplifier PCB
Unused - No Connector
Carriage Home Sensor
Impression Control Switch
Carriage Facilities (PW motor;
print hammer, ribbon lift
and drive)
Cover Open Switch Option
Ground, Cover Open Switch
Ground (Optional)
Right Hand Paper Feed Drive
Right Hand Paper Feed Drive
Right Hand Paper Feed Drive
Right Hand Paper Feed Drive
Ground, Paper Out Switch
Paper Out Switch Option
Unused - No Connector
Input Power, -15V
Input Power, + 15V
Inpu, Power, Analog Ground
Input Power, Signal Ground and
Driver Return
Input Power, +5V

LOGIC #1 PCB CIRCUITS
General Information

Refer to Figure 4-3 Block Diagram.
Logic #1 PCB is the interface between the printer's microprocessor and
the host controller. It channels commands to the microprocessor and
printer status signals to the controller. It routes print wheel and
carriage servo position feedback to the microprocessor to update these
activities, and it contains the main system clock.

4-6

Rev A (4/79)

OPTIONS
PRINTER
STATUS
READY a OPTION
STATUS

1-

STROBES

INSTRUCTIONS
P W ICAR.
POSITION
STATUS

ClOCK A

CLOCK

DATA

--.....,1>

~k:'STERS 1 - -...........
INSTRUCTIONS

DATA S
INSTRUCTIONS

>-----1

PW ICAR.
POSITION
FEED BACK

INCREM

INSTRUC- 1----1
TIONS

DECREM

Figure 4-3

LOGIC #1 BLOCK DIAGRAM

Logic #1 PCB currently appears in three major forms, each suited to
specific classes of application. In general, the circuits on these
PCB's operate as follows.
4.3.1.1

Initialization and Start-up

When power has been properly applied to the printer, the microprocessor circuits on.Logic #2 PCB initiate a restore sequence. As a part

- SELECT PRINTER

- DATA I.INES

-STROBE

~~:~~~---------------

'--i~:~I

+i
I
I

-READY

___~~-----------------'~

I

II I

: :
:
I

:

I

I

l"'d I :
:"'d4:'

I

I

I

L.U
I

iL

>I~.

LL

...
~ ...
. . - - - - - - * --------..~, 1
:"'dzl
I
I
Tdl,TdZ,Td3 >200_
:IT~II
I

Td4

I

<; 2OOn••c

• THE AMOUNT OF TIME THE "READY" SIGNAL IS HI (FALSE 1 DEPENDS ON THE EXECUTION TIME
OF THE COMMAND. IF A STROBE PULSE IS STARTED WHILE THE APPROPRIATE READY SIGNAL
IS STILL IN THE HI (FALSE 1 STATE (+5 volts I, THE NEW STROBE PULSE WILL BE IGNORED.

Figure 4-4
Rev A (4/79)

TYPICAL COMMAND SEQUENCE
4-7

of its overall effect on printer logic, the restore sequence resets
all the control flip flops on Logic #1 PCB. When this has been done,
the printer is basically ready to accept commands.
Refer to Figure 4-4.
The printer will receive but not accept, store or process commands
until it has been selected by the controller. A -SELECT PRINTER=LO
signal to a powered up and ready printer will enable several gates.
These enabled gates then release several.printer status signals to the
controller, and prepare the activity strobe circuits to process strobe
signals.
4.3.1.2

Command Entry

The controller places LO (true) signals of 1.4 usec m1n1mum duration
on the appropriate datalines, followed .2 usec later by a LO (true)
signal of 1 usec duration on the appropriate strobe line. The data
line signals then pass through line receivers and are presented to the
Data Register Files as unaddressed and unprocessed data.
If the printer is ready, and'is not in a check condition or a restore
cycle, the strobe signal w~ll do three things: One, it will latch the
strobe circuits to prevent further strobes from enteringi TWO, it will
drive its associated ready output HI (false)~ and Three, it will provide an address to the Data Register Files for the data on file.
Later in its program, when the microprocessor circuit on Logic #2 PCB
has removed the data from the register files, it issues a reset signal
back to the control logic reset circuit on Logic #1 PCB. This signal
resets the strobe latch and associated circuits, and the affected
ready line goes LO again. This notifies the controller that the next
command can be received.
4.3.1.3
. 1.

Operating Control Logic
Restore and Check
The restore sequence is used to initialize the printer, where
the carriage and print wheel are moved to their home positions while logic circuits are reset and program counters are
restarted at zero. The restore sequence can be initiated
from within the printer by the power monitoring circuit, or
by command from the controller. During the time the sequence
is in process, the strobe latch circuits are disabled, and
the printer's ready status lines are all driven HI. They return to the LO state, the strobe latches are again enabled,
and the printer is again able to receive and process commands
at the completion of the sequence.
The check sequence originates wholly within the printer, and
indicates a failure condition where the printer was unable to
complete a command. The check signal, like the restore sequence, drives the ready lines HI, disables the strobe latch
circuits, and sends a check status signal to the controller.
The check condition is usually cleared by a controller issued
restore command, but a power off-on cycle may also be used to
4-8

Rev A (4/79)

initiate the restore sequence to clear the check condition.
2.

Ribbon Lift
Ribbon lift commands, issued by the controller serve two
functions.
The command first controls ribbon position, and
second disables the print wheel ready status (drives it HI)
for an appropriate length of time following each ribbon position change to allow for mechanical settling.

3.

Carriage and Print Wheel Feedback
Two types of feedback signals are required by the microprocessor in order to properly control both carriage and print
wheel servo motor movement. One type, servo status, aids in
controlling servo position. The other, position feedback,
aids in controlling servo speed.

4.

Miscellaneous Circuits
During an input read operation, the microprocessor on Logic
#2 PCB addresses the Data Register Files and Line Drivers on
Logic #1 PCB to release stored input data and other types of
instruction information, including;

*
*
*

*
4.3.2

Release of the possible 12-bits of command data in
two parts to accommodate the microprocessor's 8-bit
wide data input bus.
Release of input data address.
Release of operating instructions for printing relative to other commands, such as carriage or paper
movement.
Release of selected operating option commands.

LOGIC #1 PCB Assy, Std., #40505-09

This version of Logic #1 PCB applies to standard Models 1345A and
1355WP HyType II Printers. Refer to Figure 7-2a, Schematic Diagram.
4.3.2:1

Initialization and Start-Up

During the restore sequence following application of power to the
printer, the Logic #2 microprocessor issues a series of binary coded
commands to CONTROL LOGIC RESET Decimal Decoder F37. F37 then issues
clear signals to RESTORE FF G13-5, strobe latch FF's F49-3/F49-5/G49-3
G49-5, RIBBON CHANGE FF's A37-5/A37-13, carriage decrement FF G13-9,
and a preset signal to print wheel increment-decrement FF's A25-5 and
A25-9. These actions ready the circuits for operation.
The printer can accept commands, however, only after it has been selected. This is done by the controller placing a LO signal on the--SELECT PRINTER input line. -SELECT PRINTER=LO inverts to a HI in
passing through its line receiver B61-12/C61-14 to enable gates B37-3,
B49-5, B49-3, C49-5, and C49-3. Enabled gates B49-5/-3 and C49-5/-3
release End Of Ribbon, Printer Ready, Paper Out, and Cover Open status
signals to the interface. Enabled gate B37-3 combines with the
Not In Restore status (RESTORE FF G13-5=LO/-6=HI) to enable gates
D37-8 and B37-6. The Not In Check status (CHECK=LO) input through
enabled gate D37-8 and inverter F13-4 establishes a HI at gate B37-6
Rev C (3/80)

4-9

which is +(-CHECK·_RESTORE·+PRINTER READY·+SELECT PRINTER). The signal D37-8=LO is also supplied to gate B45-5 where the signal -CHECK=
HI is generated and supplied to the interface as a Not in Check, Not
In Restore status signal to the controller.
Gate B37-6=HI enables three READY gates - C45-3 (-CARRIAGE READY) ,
D49-3 (-PAPER FEED READY), B45-3 (-OPTION READY), and gate B37-8.
This gate is enabled anytime after a programmed 160 msec delay for
settling which follows any Ribbon Lift command.
If enabled, B37-8
will pass the B37-6=HI to enabled C45-5 (-PRINT WHEEL READY). These
four ready signals are also supplied to the interface as status of
printer signals to the controller. With the printer selected and the
appropriate READY lines LO (true), the printer can accept commands
from the controller.
4.3.2.2

Command Entry

The controller places La (true) signals of 1.4 usec mlnlmum duration
on the appropriate data lines, followed .2 usec later by a La (true)
signal of 1 usec minimum duration on the appropriate strobe line.
The La data bits pass through their inverting line receivers as HI
signals, and are presented to the Data Register Files E73, F73, and
D73 as unaddressed and unprocessed data.
If the -SELECT PRINTER input is La, and the printer is not in check
or in a restore cycle, the output of gate B37-6 will be HI. B37-6=HI
is presented to gate D37-6.
In the absence of a latched strobe signal, D37-6 will be enabled, and its output will clear FF C13-5.
The output of gate D13-3 is normally La. This La, seen through FF
C13-5 and gates D13-6 and D13-8l maintains a La on the clock inputs of
the STROBE LATCH FF's F49-3/-5 and G49-3/-5. The appearance of a LO
signal on anyone of the four strobe inputs produces a HI at gate D13
-3 and the D input of FF C13-5. This strobe La also propagates thru
gates C37-3/-11 and C37-8, amplifiers F13-l4/-12, to the D input of FF
F6l-l0 as a HI. With the next positive excursion of the +CLOCK A
signal, this HI will pass through FF F61-l0 to clock FF C13-5 to gate
D13-6. With the second positive excursion of the +CLOCK A signal, the
output of D13-6 will go La, to drive the output of gate D13-8 HI. This
HI will clock the STROBE LATCH FF's. The circuit thus acts as a digital filter, effebtively blocking any strobe line signals less than 1
usec in length. At the end of the clock, the STROBE LATCH FF with the
active HI on its J input will see its Q output go HI and its -Q output
go La as the FF is clocked. The -Q outputs of the STROBE LATCH FF's
go to ready gates C45-3/-5, D49-3 and B45-3, where the appropriate
READY line is driven HI as a busy signal to the controller, and to
gates E49-3/-6/-8 and -11. The -Q outputs from the Paper Feed and
Option STROBE LATCH FF's also go through gate D49-5 to clock CYCLE
DATA LATCH FF G37-5. The Q outputs of the STROBE LATCH FF's go
to Line Drivers G6l and E6l as address instructions for the microprocessor. The Q output from the Print Wheel STROBE LATCH FF also
goes to the D inputs of CYCLE DATA LATCH FF's G37-9 and G37-5. The
Carriage STROBE LATCH FF's Q output clocks CYCLE DATA LATCH FF G37-9.
The two CYCLE DATA LATCH FF's then produce the +PBH (print before
horizontal) and +PBV (print before vertical) instructions for trans-

4-10

Rev C (3/80)

I

mittal
strobe
-WR=LO
ing to

to the microprocessor. The LO from gate D13-6 during the
latch time is also directed to the Data Transfer Files as a
write signal to load the data waiting on the data lines accordthe address supplied by the Data Address Decode Network.

The +8TROBE output from the active Strobe Line Receiver is applied to
gates C37-3 and C37-6. The output of these two gates is sent as
+PW/CAR 8TB and/or +PW/OPT 8TB to the Data Register Files to supply
an address for the data being received in conjunction with the strobe,
where inputs from the gates are decoded as an address for data as
follows:
C37-3 = LO
C37-6 = LO
Address = PF
4.3.2.3
1.

HI
HI
PW

HI
LO
LO
HI
CAR. OPT

Operating Control Logic
Restore and Check
A restore command is received either as a -RE8TORE=LO signal
from the controller, or as a command from the Logic #2 microprocessor. The microprocessor command will place a LO clear
pulse on RESTORE FF G13-S, while the -RE8TORE=LO signal will
invert through Line Receiver B61-6/D61-12 to clock the FF.
Either action will cause FF G13-S to switch over, producing
+RESTORE FF=HI from its Q output, and place a LO on pin 2 of
gate B37-3.
If this is a controller command, the +RE8TORE FF=HI signal
will proceed through Line Driver G61 to the microprocessor on
Logic #2 to put the microprocessor into the restore sequence.
In any case, the -Q=LO to gate B37-3 disables the strobe
logic and drives all the ready gates HI. This disables the
printer until the microprocessor has completed the restore
sequence and clears FF G13-S.
A check condition occurs whenever printer systems are unable
to complete a carriage or print wheel command. When this
occurs, the microprocessor is forced into a program hold situation and issues a +CHECK=HI signal. This HI disables gate
D37-8, which in turn disables the strobe logic and drives
all the ready gates HI to disable the printer.
In addition,
a -CHECK=LO signal is sent to the controller to indicate the
presence of the check condition. A check condition requires
a restart of the microprocessor's programmer to clear. As
mentioned before, the restore sequence is the only means of
doing this. Restore is initiated here usually by controller
command, but can be started by cycling printer power input.

2.

Ribbon Lift
Ribbon lift commands enter through a line receiver, and are
applied to Ribbon Lift FF's A37-S and -13. A37-S is triggered for lift, while A37-13 i,s triggered for lower commands.
Either one being clocked produces an B37-11=LO signal which
through gate B37-8 disables the PW READY gate C4S-S. The

Rev C (3/80)

4-11

Ready gate will be disabled for approximately 100 msec, to
allow ample time for mechanical settling, and for the microprocessor to note the desired ribbon position.
The command is also sent, as +RIBBON LIFT=HI, through Line
Driver G61 to the microprocessor on Logic #2 PCB for execution.
3.

Carriage and Print Wheel Feedback
(a) Carriage and Print Wheel Status Synchronizers
Four status signals, CAR EVEN, PW EVEN, CAR HOME, and PW
HOME, are required by the microprocessor to help maintain
its record of carriage and print wheel position. The microprocessor's operation is timed by the main system clock, and
since these four signals are random in nature, they must be
synchronized with the clock to be useful to the microprocessor.
FF's F61-s, -7, -12 and -15 are used to generate the clock
synchronized Q outputs for each of the four input signals.
These are then supplied to the microprocessor through Line
Driver E61.

(b) Carriage Difference Counter Decrement Command Generator
When a carriage movement command is received, the microprocessor establishes a value in its carriage difference counter
. equal to the number of increments the carriage must move to
reach the new command location, and also feeds the position
data to the carriage servo circuit where the newly ~enerated
positional error signal is used to develop the carriage motor
drive power.
As the carriage drive motor moves in response to this error
signal, its shaft position transducer produces a set of phase
modulated RF signals which are fed to the Transducer PCB.
The Transducer's circuits process these inputs and generate a
series of triangular wave position signals which are sent to
the Servo PCB. Three signals called CAR EVEN, CAR POS A and
CAR POS B are derived from these by the Servo circuits and
supplied to Logic #1 PCB as inputs to the Carriage Difference
Counter Decrement Command Generator circuit. This circuit
uses these inputs, as outlined below, to generate a series of
pulses fed back to the microprocessor. One pulse is generated each time the carriage has moved one increment of 1/120
inch (.212 mm), and this pulse decrements the microprocessor's Carriage Difference Software Counter one count.
Refer to Figure 4-5. The CAR. EVEN input originates in the
Carriage Servo Tachometer circuit. It consists of a series
of square-wave pulses where the line level rises to its positive value and remains there as long as a carriage transducer signal called pas SIG #3 is negative. The line level
4-12

Rev C (3/80)

\.

I

> - - -.......----~

CAR. EVEN

+5V

A

CAR. P~S B

j.-1/60'~

~

CAR.EVEN
CAR.

P~S

~

A

I

:----LJL

CAR.POS B

I

825-3

JjLf1JL

H25-6

~1LflJLI
I

825-8
025-5

JjLf1JL
liN IJ 1m! II::j If!! ~~ i I;::~ IIi 18
~ 2 II~
III 0

Figure 4-5

1-.-1
DECREMENT COUNTS
FORWARD MOTION

NO
REVERSE MOTION
MOTION

CARRIAGE DIFFERENCE COUNTER DECREMENT DRIVE

then falls to zero when POS SIG #3 swings positive. This
signal can then be used to mark those points when the carriage position is even. This is the data fed into the FF's
F25-5 and F25-9, where each change in input line level represents that point in time where POS SIG #3 experiences a
transistion through zero. The CAR. POS A and CAR. POS B
inputs to Exclusive OR gate G25-3 also originate in the carriage servo tachometer circuit. Their combined output from
G25-3 alternately clocks the two FF's. When this clocking
occurs following a POS SIG #3 transition, a HI is generated
out of FF G13-9 to decrement the counter in the microprocessor.
The clear input of FF G13-9 is called -RST CAR. X. This is
a signal sent from the microprocessor to acknowledge receipt
of the decrement count and to reset FF G13-9 in preparation
for the next count. This signal is also sent during the
restore sequence.
NOTE:

The reader should also be familiar with the information given in subsection 4.6 SERVO PCB on the operation of the Carriage Position Tachometer circuit, to
more fully understand the inputs to this circuit.

(c) Print Wheel Absolute Counter Increment-Decrement Command
Generator

Rev C (3/80)

4-13

This circuit consists of FF's A25, E25, D25, dual AND-OR
inverter C25, inverters E13-2 and -4, and gates B25-3/-6/-8
and -11. The inputs to this circuit are exactly the same as
the carriage circuit discussed above, being PW EVEN, PW POS
A, PW POS B, and -RST PW X. The inputs perform the same
functions in this circuit as their counterparts in the carriage circuit.
The difference between the two circuits is that where the
carriage circuit's purpose is to decrement its Difference
Counter only, the Print Wheel circuit must increment as well
as decrement its Absolute Counter due to the independent
bidirectional nature of print wheel rotation in executing
commands. This circuit thus appears as a dual inverted
command generator, when compared to the carriage circuit.
The POS A and POS B inputs supply clock, data and clear inputs to the four flip flops. Their inverted forms are also
exclusive OR'd by gate G25-6 to provide clock inputs to FF's
A25-5 and -9.· The Q outputs of FF'sD25 and E25 are compared
with the PW EVEN signal in the C25 dual AND-OR inverter modules. The outputs of these devices, along with the Q outputs of FF's A25, propagate through a gate network of B25-3/
-6/-8 and -11 to be coupled back as the D inputs to FF's A25.
This network acts to prevent extraneous signals from being
entered as print wheel movement counts. The -Q outputs of
FF's A25-5/-9 are sent to the microprocessor's Print Wheel
Software Absolute Counter, where two pulses are equal to one
print wheel petal (position) movement.
The preset input to FF.'s A25 is called -RST PW X. This is a
signal sent from the microprocessor to acknowledge receipt of
the previous count, and to preset the FF's in preparation for
the next count. This signal is also sent during the restore
sequence.
4.

Miscellaneous Circuits
Decimal Decoder modules E37 and F37 provide a means for the
microprocessor to address the Data File Registers E73, F73
and D73, and Line Drivers G73, G61 and E61 by encoding input
lines 15 through 18, -ENABLE INP, and -RST.
Through multiplexed binary coding of these inputs, a LO
signal can be placed on anyone of the several outputs. Examination of the circuits will reveal a capability to selectively clear the control logic flip flops, or address functions in the output modules. The -GR LO and -GR HI lines
allow the microprocessor to read the 12-bit wide data input
word into its 8-bit wide data input bus in two passes. The
first pass sees -GR HI=LO enable the high order 4-bits in
Register F73. The second pass sees -GR LO=LO enable the low
order 8-bits in Registers E73 and 073. The -GATE CMD and
-GATE STATUS lines applied to the Line Drivers G73, G61 and
E61 control the input, storage and transmittal of the command inputs sent to the Drivers. -GATE JUMPER allows the
microprocessor to read the status of the option jumpers. The
significance of these jumpers is outlined in Section 3.
4-14

Rev C (3/80)

4.3.3

Logic #1 PCB Assy, 8080, #40644-05

This version of Logic #1 PCB applies to those standard Model 1345A
HyType II Printers which utilize the 8080 type interface. Refer to
Figure 7-2b, Schematic Diagram.
This circuit is designed to interface with an 8080 Microprocessor Unit
(MPU) instead of a controller. As a result, the manner of data, command and status interchange is different. Inputs to the 8080 Logic #1
PCB are 8 Data Lines (0 through 7),3 Port Lines (5,6 and 7), a System
Clock line, a Read line, a Select Printer line, and a Write line.
Output to the 8080 MPU consists of 3 Busy Status lines.
4.3.3.1

Initialization and Start-Up

During the restore sequence following application of power to the
printer, the Logic #2 microprocessor issues a series of binary coded
commands to CONTROL LOGIC RESET Decimal Decoder E73. E73 then issues
clear signals to RESTORE FF D6l-5, Strobe Latch FF's B73-3/B73-5/C73-3
/C73-5, Carriage Decrement FF E73-6, and a preset signal to the Print
Wheel Increment-Decrement FF's D13-5/-9. These actions ready the circuits for operation.
The printer cannot accept commands, however, until it has been selected. This is done by the host system placing a LO signal on the -SELECT PRINTER input line. -SELECT PRINTER=LO inverts to a HI through
inverter D37-6 and passes to gate C61-l1. If the printer is not in a
restore sequence, the -Q output of RESTORE FF D61-5 will enable gate
C61-ll. If the printer is not in a check condition, the signal from
C6l-11 will pass enabled gate C6l-8 as a LO and on through inverter
B61-8 to gate C6l-6. C61-6, receiving HI's from both B6l-8 and C61-l1
will pass a HI to enable all the Busy gates C49-3/-6/-8 and -11, and
to Multiplexer module B49, pin 3. The cleared condition of all the
S.trobe Latch FF's places HI's on the Busy gates to pass -" " BUSY=HI
signals to the host system signaling all systems are not bUSy. These
HI's, plus the HI from gate C6l-8 are placed in Multiplexer module
B49, where they will be passed to the Logic #2 microprocessor as instructions. with the printer selected and the BUSY lines HI (false),
the printer can accept commands.
4.3.3.2

Command Entry

Ports 5, 6 and 7 are used to transfer data and control/status information between the 8080 MPU and the Logic #2 microprocessor. The 8080
MPU also contains logic that receives and temporarily stores carriage
and print wheel position feedback signals from the SERVO PCB, and supplies this data to the Logic #2 microprocessor when requested. Other
circuits provide option jumper status to the Logic #2 microprocessor,
and develop the CLOCK A signal used by prjnter logic.
When the 8080 MPU performs an output instruction to Port 5, 6 or 7,
the output information is stored on the Logic #1 PCB, where it is
available to the Logic #2 microprocessor. Logic #2 periodically reads
the Logic #1 storage registers to see if there is any information that
it should process. Similarly, as the Logic #2 microprocessor steps
through its program, it provides status information to the BUSY line
Rev A (4/79)

4-15

circuits on Logic #1 PCB. This status is monitored by the 8080 MPU
prior to each command output.

D& -7

r-______~------------------~~~A~:~~-I

Figure 4-6

8080 LOGIC #1 BLOCK DIAGRAM

Refer to Figure 4-6. The transfer of a printer command from the 8080
MPU to the Lo~ic #2 microprocessor involves the following steps:
1.
2.
3.
4.
5.
6.

8080 MPU writes low order 8-bits to Port 6 (stored in RAM)
8080 MPU writes high order bits and direction bit to Port 7
(also stored in RAM)
8080 MPU writes control word containing strobe bit to Port 5
(stored in STROBE LATCHES), and sets BUFFER BUSY FF
Logic #2 microprocessor reads STROBE LATCHES to determine
nature of the command
Logic #2 microprocessor reads high order bits and direction
bit from RAM
Logic #2 microprocessor reads low order 8-bits from RAM, and
resets BUFFER BUSY FF
(a) write to Ports 6 and 7
When a write command is executed to either Port 6 or 7, the
data appears on the bidirectional data bus simultaneously
with the development of the -WRITE signal and the -PORT 6
or the -PORT 7 signal. The FUNCTION DCDR block in Figure 4-6

4-16

Rev A (4/79)

includes the random logic which enables the Multiplexer modules B37 and B49, and addresses the RAM according to the
port selected. Since -READ is HI at this time, the Multiplexers allow data to flow to and be written into the RAM.
(b) write to Port 5
The control word containing the strobe bit appears on the bidirectional bus as the -WRITE and -PORT 5 signals are developed. Data flow through the Multiplexers is clocked into the
appropriate STROBE LATCH, which is set, and the BUFFER BUSY
FF is also set.
(c) Read Strobe Latches
The Logic #2 microprocessor periodically reads the content of
the STROBE LATCHES. It provides the binary coding into Decimal Decoder (Command) E61 on Lines 15 through 18, along with
the -ENABLE INP signal, to gate the contents of the latches
onto the IAI-IA8 bus and on into the microprocessor. The
microprocessor will immediately execute the appropriate control action, which will include reading the data stored in
the RAM, when the action is a carriage, print wheel, or paper
feed movement.
In reading the RAM data, the Logic #2 microprocessor encodes
the 15-18 lines to Decimal Decoder (Command) E61 to enable
the RAM to release the high-order 4-bits on the first read
pass, and then the low-order 8-bits on the second read pass.
Upon completing the sequence, the Logic #2 microprocessor
commands the reset of the BUFFER BUSY flip flop.
4.3.3.3
1.

Operating Control Logic
Restore and Check
This version of the Logic #1 PCB does not include a RESTORE
input line or a CHECK output line. These two functions are
included, however, and operate as follows.
The RESTORE sequence may be initiated by the 8080 MPU issuing
-DA2=HI and -PORT=LO signals. These two signals cycle the
RESTORE FF D61-5 to momentarily deselect the printer and initiate the restore sequence in the Logic #2 microprocessor.

'.

A CHECK condition, generated in the Logic #2 microprocessor
in response to incomplete operating results, disables the
select printer circuits, and sets signals on the bidirectional data lines. The 8080 MPU reads printer status prior to
each command. Upon detecting the check condition, the 8080
MPU notifies the parent system, and waits for an operator
response. When so instructed by operator action, the 8080
MPU issues the RESTORE commands mentioned above.

Rev A (4/79)

4-17

2.

Ribbon Lift
This circuit is one of those mentioned earlier which initiates an immediate Logic #2 microprocessor response. -PORT
5=LO and -WRITE=LO signals clock the RC FF 061-9 through gate
049-6, and also clock the BUFFER BUSY FF. The output of RC
FF D6l-9 then goes to Line Driver G73 from where it is read
into the Logic #2 microprocessor for immediate execution.

3.

Carriage and Print Wheel Feedback
These circuits are nearly identical to those found on the
standard Logic #1 PCB discussed above. The only significant
difference is the appearance of inverters and RC networks in
the even and pos lines which were included to enhance the
noise immunity of the circuits. The following paragraphs are
included as a review of the earlier discussion.
(a) Carriage Difference Counter Decrement Command Generator
When a carriage movement command is received, the Logic #2
microprocessor loads a value into its difference counter
which represents the number of 1/120 inch (.212 mm) increments the carriage is to move. The microprocessor then supplies this value to the carriage servo drive circuits, which
view it as an error signal, and proceed to generate servo
drive which will move the carriage in such a manner as to reduce the error to zero. Signals fed back from the carriage
servo motor's rotary transducer through the Transducer and
Servo PCB's are received here. They are CAR. EVEN, CAR. POS
A, and CAR. pos--a. As shown in Figure 4-5, the timing relationships of these signals are that each makes one full
cycle for each 1/60 inch (.423 mm) of carriage movement.
This, when processed through the flip flops and gates, generates a single pulse out to Line Driver F73, called +CAR.X,
for each half cycle or 1/120 inch (.212 mm) increment of carriage travel. The Logic #2 microprocessor uses this pulse as
a count to decrement the difference counter. When this
counter has been decremented to zero, the carriage is at its
new commanded position, carriage movement is completed, and
the microprocessor terminates the operation.
(b) Print Wheel Absolute Counter Increment-Decrement Command
Generator
The Logic #2 microprocessor maintains a running log of print
wheel position in its Print Wheel Absolute Counter, and thus
always knows the current print wheel position. When it receives a command to print a new character, it calculates the
shortest distance and direction to move the print wheel to
place the commanded character in front of the print hammer in
the shortest time. Once these questions have been answered,
a value is established which is supplied to the print wheel
servo drive circuits to be used as an error signal, along
with a direction signal. The drive circuits then begin to
move the print wheel in the desired direction. As with the
carriage servo, signals fed back from the print wheel servo
motor's rotary transducer through the Transducer and Servo
4-18

Rev A (4/79)

PCB's are received on this PCB. They are PW EVEN, PW POS A,
and PW POS B. Referring again to Figure 4-5, the timing
relationships of these signals are that each makes one full
cycle for each increment of print wheel movement. Depending
upon the sequence in which the signals appear (determined by
the direction of print wheel movement), either a +PW INC
(count up) or a +PW DEC (count down) pulse will be developed
and sent to the Logic #2 Absolute Counter. When the microprocessor has added to or subtracted from the counter enough
to bring the stored value equal to the commanded value, the
print wheel motor is stopped, the movement is completed, the
microprocessor terminates the operation and steps to the hammer fire sequence.
4.

Miscellaneous Circuits
As mentioned earlier, these circuits include Option Jumper
provisions, and a system clock. The Option Jumpers are
discussed in detail in Section 3.
The system clock is a simple L-C feedback oscillator which
provides the CLOCK A signal of 5 mHz +/-10% for llse as the
basic clock for the printer circuits.

4.3.4

Logic #1 PCB Assy, Special D, #40725-05

This version of Logic #1 PCB applies to those standard Model l345A
HyType II Printers configured for Special D use. Refer to Figure
7-2c, Schematic Diagram.
4.3.4.1

Initialization and Start-up

During the restore sequence following application of power to the
printer, the Logic #2 microprocessor issues a series of binary coded
commands to CONTROL LOGIC RESET Decimal Decoder F49. F49 then issues
clear signals to RESTORE FF H6l-5, Strobe Latch FF's F6l-3/-5 and
F73-3/-5, RIBBON LIFT FF H49-5, Carriage Decrement FF D25-5, and a
preset signal to Print Wheel Increment-Decrement FF's A13-3/-9. These
actions ready the circuits for operation.
The printer can accept commands, however, only after it has been
selected. This is done by the controller placing a LO signal on the
-SELECT PRINTER input line. -SEL PTR=LO inverts to a HI in passing
through its line receiver B6l-l3/D49-2 to enable gates G25-3, G45-3/-5
and G49-5. Also this LO, through inverter H25-l2, enables gates D73-2/
-14, C6l-2/-3/-l3 and -14. Enabled gates G45-3 and G49-5 release the
PRINTER READY and PAPER OUT status signals to the interface. Gate
G45-5 enables the END OF RIBBON lamp signal, while the signal through
H25-l2 enables RIBBON LIFT, RESTORE, and STROBE inputs. Enabled gate
G25-3 combines with the Not In Restore status from RESTORE FF H6l-5 to
enable gates G25-6 and -11. The Not In Check status of +CHECK=LO
through enabled gate G25-ll and inverter H25-l0 establishes a HI at
gate G25-6 which is +(-CHECK·-RESTORE·+PRINTER READY.+SELECT PRINTER) •
The signal G25-ll=LO is also supplied to gate G37-5 where the signal
-CHECK=HI is generated and passed to the interface as a Not in Check,
Not in Restore status signal to the controller.
Rev A (4/79)

4-19

Gate G2S-6=HI enables gates El3-S/-ll, G4S-3 and G49-3, and clears FF
H6l-9. The enabling of El3-S and the clearing of FF H6l-9 prepares
the Strobe Latch circuit. Enabled gate El3-ll, in the absence of a
PAUSE command, enables the CAR., PF, and OPT READY gates of G69-S,
G73-3/-S, and gate G2S-S. In the absence of an END OF RIB.=LO signal,
G2S-S will enable the PW READY gate. Then, in the absence of an incoming STROBE, these four READY gates will all pass LO signals to the
interface as status of printer signals to the controller. The printer
can now accept commands.
4.3.4.2

Command Entry

The controller places LO (true) signals of 1.4 usec m1n1mum duration
on the appropriate data lines, followed .2 usec later by a LO (true)
signal of 1 usee minimum duration on the appropriate STROBE line.
The LO data bits pass through their inverting line receivers as HI
signals, and are presented to the Data Register Files B37, C37 and D37
as unaddressed and unprocessed data.
If the -SELECT PRINTER input is LO, and the printer is not in a check
or restore cycle, the output of gate G2S-6 will be HI. G2S-6=HI is
presented to gate E13-S. In the absence of a latched strobe signal,
EI3-S will be disabled and its LO output will clear FF H6l-9.
The output of gate H73-3 is LO in the absence of a STROBE input. This
LO combines with a HI from gate G2S-6 at gate EI3-S, and places a LO
on the clear input to FF H49-9 to keep the FF in its clear state.
This produces a HI on the -0 output to disable gate D49-l4 and maintain a LO on the clock inputs to the STROBE LATCH FF's F6l-3/-S and
F73-3/-S. The appearance of a LO signal on anyone of the four STROBE
inputs produces a HI at gate H73-3. This HI is presented to the D input of FF H49-9, and also enables gate EI3-S which then enables FF
H49-9.
The STROBE=LO signal is also seen as a HI on one of the inputs to
gates E73-3/-8. This HI propagates through these gates and through
gates H73-6/-S to the D input of FF H6l-9. FF H6l-9 is clocked with
the -CLOCK A signal. with its next positive excursion, the -CLOCK A
signal will switch FF H6l-9 and pass the HI on the D input to the 0
output, and on to clock FF H49-9. H49-9's -0 output will go LO, to
enable gate D49-l2, and to send a -WR=LO write signal to the Data Register Files as an instruction to accept the incoming data and data address. Enabled gate D49-l2 will pass +CLOCK A pulses to the clock inputs of the STROBE LATCH FF's. with the next negative excursion of
+CLOCK A, these FF's will latch, excluding other strobe signals and/or
any strobe signal less than 1 usec duration. The -0 outputs of the
latch flip flops go to READY gates G69-3/-S and G73-3/-S, where the
appropriate READY line is driven HI as a busy signal to the controller
and to gates E6l-3/-6/-S and -11. The -0 outputs from the Paper Feed
and Option STROBE LATCH FF's also go through gate G37-3 to clock CYCLE
DATA LATCH FF G6l-S. The 0 outputs of the STROBE LATCH FF's' go to
Line Drivers E37 and F37 as address instructions for the microprocessor. The 0 output from the Print Wheel STROBE LATCH FF also goes to
the D inputs of CYCLE DATA LATCH FF's G6l-5 and -9. The Carriage
STROBE LATCH FF's 0 output clocks CYCLE DATA LATCH FF G6l-9, and the
4-20

Rev A (4/79)

two CYCLE DATA LATCH FF's then produce the +PBH (print before horizontal) and +PBV (print before vertical) instructions for transmittal
to the microprocessor.
The active LO signals from the strobe line receivers are applied to
gates E73-3 and -11. The output of these two gates is sent as
+PW/CAR. STB and/or +PW/OPT STB to the Data Register Files to supply
an address for the data being received in conjunction with the strobe
where the inputs from the gates are decoded as an address for data as
follows:
E73-3
E73-ll
Address
4.3.4.3
1.

=
=

=

LO
LO
PF

HI
HI
PW

HI
LO
CAR

LO
HI
OPT

Operating Control Logic
Restore and Check
A restore command is received either as a -RESTORE=LO signal
from the controller, or as a command from the Logic #2 microprocessor. The microprocessor command will place a LO clear
pulse on RESTORE FF H61-S, while the -RESTORE=LO signal will
invert through Line Receiver B6l-8/D73-14 to clock the FF.
Either action will cause FF H61-S to switch over, producing
+RESTORE FF=HI from its Q output, and place a LO on pin 2 of
gate G2S-3.
If this is a controller command, the +RESTORE FF=HI signal
will proceed through Line Driver E37 to the microprocessor on
Logic #2 PCB to put the microprocessor into the restore sequence.
In any case, the -Q=LO to gate G2S-3 disables the strobe
logic, and drives all the READY gates HI. This disables the
printer until the microprocessor has completed the restore
sequence and clears FF H6l-S.
A check condition occurs whenever printer systems are unable
to complete a carriage or a print wheel command. Whenever
this occurs, the microprocessor is forced into a program hold
situation and issues a +CHECK=HI signal. This HI disables
gate G2S-II, which in turn disables the strobe logic and
drives all the READY gates HI to disable the printer. In addition, a -CHECK=LO signal is sent to the controller to indicate a check condition. A check condition requires a restart
of the microprocessor's programmer to clear. As mentioned
before, the resto~e sequence is the only means of doing this.
Restore is initiated here usually by controller command, but
can be started by cycling printer power input.

2.

Rev A

Ribbon Lift
A ribbon lift command enters as a -RIBBON LIFT=LO signal
thru Line Receiver B61-I/D73-2, and is applied as a HI to
the D input of RIBBON LIFT FF H49-S. H49-S is clocked by a
HI signal from the Print Wheel STROBE line receiver. When
clocked, which occurs only in conjunction with a print wheel
(4/79)

4-21

command, the FF switches over to produce the signal +RIB
LATCH=HI. This HI is sent to Line Driver A37, where it is
read by the Logic #2 microprocessor for execution as a command to lift the ribbon. Having read in the command, the
microprocessor then clears the RIBBON LIFT FF through the
CONTROL LOGIC RESET Decimal Decoder F49.
3.

Carriage and Print Wheel Feedback
(a) Carriage and Print Wheel Status Synchronizers
Four status signals, called CAR. EVEN, PW EVEN, CAR. HOME and
PW HOME are required by the microprocessor to help maintain
its record of carriage and print wheel position. The microprocessor's operation is timed by the main system clock, and
since these four signals are random in nature, they must be
synchronized with the clock to be useful to the microprocessor.
FF's E25-5/-7/-l2 and -15 are used to generate clock synchronized Q outputs for each of the four input signals.
These are then supplied to the microprocessor through Line
Driver F37.
(b) Carriage Difference Counter Decrement Command Generator
When a carriage movement command is received, the microprocessor establishes a value in its carriage difference counter
equal to the number of increments the carriage must move to
reach the new command location, and also· feeds the position
data to the carriage servo circuit where the newly generated
positional error signal is used to develop the carriage motor
drive power.
As the carriage drive motor moves in response to this error
signal, its shaft position transducer produces a set of phase
modulated RF signals which are fed to the Transducer PCB.
The Transducer's circuits process these inputs and generate a
series of triangular wave position signals which are sent to
the Servo PCB. Three signals called CAR. EVEN, CAR. POS A,
and CAR. POS B, are derived from these by the Servo circuits
and supplied to Logic #1 PCB as inputs to the Carriage Difference Counter Decrement Command Generator circuit. This
circuit uses these inputs, as outlined below, to generate a
series of pulses fed back to the microprocessor. One pulse
is generated each time the carriage has moved one increment
of 1/120 inch (.212 mm) and this pulse decrements the microprocessor's Carriage Difference Software Counter one count.
Refer to Figure 4-5. The CAR. EVEN input originates in the
Carriage Servo Tachometer circuit. It consists of a series
of square-wave pulses where the line level rises to its positive value and remains there as long as a carriage transducer signal called POS SIG #3 is negative. The line level
then falls to zero when POS SIG #3 swings positive. This
signal can then be used to mark those points when the car4-22

Rev A (4/79)

riage position is even. This is the data into the FF's
C25-5 and -9, where each change in input line level represents that point where POS SIG #3 experiences a transition
through zero. The CAR. POS A and CAR. POS B inputs to Exclusive OR gate B25-3 also originate in the Carriage Servo
tachometer circuit. Their combined output from B25-3 alternately clocks the two FF's. When this clocking occurs following a POS SIG #3 transition, a HI is generated out of FF
D25-5 to decrement the counter in the microprocessor.
The clear input to FF D25-5 is called -RST CAR. X. This is a
signal sent from the microprocessor to acknowledge receipt of
the decrement count, and to reset FF 025-5 in preparation for
the next count. This signal is also sent during a restore
sequence.
NOTE: The reader should also be familiar with the information
given in subsection 4.6 SERVO PCB on the operation of
the Carriage position Tachometer circuit, to more fully
understand the inputs to this circuit.
(c) Print Wheel Absolute Counter Increment-Decrement Command
Generator
This circuit consists of FF's A13, C13 and D13, dual AND/OR
inverter B13, inverters G13-6 and -8, and gates F13-3/-6/-8
and -11. The inputs to this circuit are exactly the same as
the carriage circuit discussed above, being PW EVEN, PW
POS A, PW POS B, and -RST PW X. The inputs perform the same
functions in this circuit as their counterparts in the carriage circuit.
The difference between the two circuits is that where the
carriage circuit's purpose is to decrement its Difference
Counter only, the Print Wheel circuit must increment as well
as decrement its Absolute Counter due to the independent bidirectional nature of print wheel rotation in executing commands. This circuit thus appears as a dual inverted command
generator, when compared to the carriage circuit. The POS A
and POS B inputs supply clock, data and clear inputs to the
four flip flops. Their inverted forms are also exclusive
OR'd by gate B25-11 to provide clOCK inputs to FF's A13-5 and
-9. The Q outputs of FF's C13 and D13 are compared with the
PW EVEN signal in the B13 Dual AND/OR inverter modules. The
outputs of these devices, along with the Q outputs of FF's
A13, propagate through a gate network of F13-3/-6/-8 and -11
to be coupled back as the D inputs to FF's A13. This network
acts to prevent extraneous signals from being entered as
print wheel movement counts. The -Q outputs of FF's A13-5/
-9 are sent to the microprocessor through Line Driver A37 to
either increment or decrement the microprocessor's Print
Wheel Software Absolute Counter, where two pulses are equal
to one print wheel petal (position) movement.
The preset inputs to FF's A13 is called -RST PW X. This is a
signal sent from the microprocessor to acknowledge receipt of
Rev A (4/79)

4-23

the previous count, and to preset the FF's in preparation
for the next count. This signal is also sent during the
restore sequence.
4.

Miscellaneous Circuits
Decimal Decoder modules E49 and F49 provide a means for the
microprocessor to address the Data File Registers B37, C37
and D37, and Line Drivers A37, E37 and F37 by encoding input
lines 15 through 18, -ENABLE INP, and -RST.
Through multiplexed binary coding of these inputs, a LO signal can be placed on anyone of the several outputs. Examination of the circuits will reveal a capability to selectively clear the control logic flip flops, or address functions in the output modules. The -GR LO and -GR HI lines
allow the microprocessor to read the 12-bit wide data input
word into its 8-bit wide data input bus in two passes. The
first pass sees -GR HI=LO enable the high order 4-bits in
Register C37. The second pass sees -GR LO=LO enable the low
order 8-bits in Registers B37 and D37. The -GATE CMD and
-GATE STATUS lines applied to the Line Drivers A37, E37 and
F37 control the input, storage and transmittal of the command
inputs sent to the drivers. The -GATE JUMPER line is not
used in this version, since the Option Jumpers have been
omitted.
The Special D version of the Model l34SA HyType II Printer
includes several additional features:
In lieu of an End Of Ribbon interface connection, this unit
makes use of a control panel indicator lamp. The -END OF
RIBBON=LO signal disables gate G2S-8 to drive the Print Wheel
READY gate HI, and passes through inverter H2S-4 and select
printer enabled gate G4S-S to turn on the END OF RIBBON lamp.
In addition to the normal -PRINTER READY=LO interface status
signal, this unit includes a PRINTER READY lamp circuit
composed of gate G49-3. G49-3 is enabled by a -PAUSE SW=HI
signal from a control panel PAUSE switch (switch open) discussed below.
This unit also includes a control panel PAUSE switch, which
allows the operator to momentarily halt printer operation,
and then continue without restore. Closing this switch
(-PAUSE SW=LO) extinguishes the PRINTER READY lamp by disabling gate G49-3, drives the Print Wheel READY gate HI to stop
print commands, and places a HI on the D input to PAUSE FF
E2S-2 through gate g2S-6. with the next +CLOCK A=HI pulse,
FF E2S-2 generates the signal +PAUSE=HI which is sent to
Line Driver A37 for use by the Logic #2 microprocessor to
halt the program counter. Releasing the PAUSE switch then
allows the printer to continue.
Finally, instead of a Cover Open status signal to the controller, this machine inverts an incoming -COVER OPEN=LO
signal, through inverter H2S-2, which is then applied to
4-24

Rev A (4/79)

I

4.4.2.5

Model Variations

The printer's #40510-XX Logic #2 microprocessor circuit is applicable
to a wide variety of programs. On this PCB, these variations all use
the same basic circuit with variations seen as component changes only
in the three program storage Programmable Read Only Memories (PROM's).
The several versions, or PROM sets, currently available are described
briefly below in Table 4-4 and are reflected in the PCB assembly by
dash numbers.
4.4.3

Logic #2 PCB Assy, Std/ESD, #301850-XX

Refer to Figure 4-7, and to Figure 7-3b Schematic Diagram
4.4.3.1

Initialization and Start-up

with the application of power to the printer, the power monitor circuit on the Carriage Power Amplifier PCB produces a +POWER ON=LO signal to this circuit. +POWER ON=LO initializes all Logic #2 counters,
registers, and flip flops to their zero and/or reset states. Simultaneously, the main system CLOCK A on Logic #1 PCB starts up, and its
5 mHz output stabilizes.
As soon as the power monitor circuit senses its monitored voltages at
their proper levels, it produces a +POWER ON=HI signal. +POWER ON=HI
releases the initialization process, and the microprocessor Program
Counters C73/D13 begin to run from step zero.
4.4.3.2

Program Control Loop A

Beginning on step zero, PROMs A57/A72 issue program instructions on
lines II thru I16. These instructions flow to all parts of the processor, and to circuits on Logic #1 PCB. Depending on the particular
step being processed and the results obtained, these same lines, being
multiplexed, may in part carry program branch instructions. Such instructions are looped back to the Program Counters C73/D13 as new program addresses Operand A Registers D73/E13.
The multiplexed output of programmed instructions from this loop control and coordinate all the functions and data handling processes
within the printer.
4.4.3.3

Data Processing Loop B

Data input from Logic #1 PCB, along with the data address information,
is multiplexed into Operand A Registers D73/E13. At the proper time
this information is latched onto the RA bus lines and directed to Adders E25/E61, and to the RAMs F49/E49/F37/E37 for storage. Note that
each data address, such as paper feed or carriage motion information,
has its own storage register in the RAM. Again, at some point later
in the program, the stored data is ordered out of RAM and on to the
main data transfer bus for loop circulation thru Operand A and B registers and back thru the arithmetic circuits of Comparators D25/D61,
Adders E25/E61, and their associated decoding network to the RAM.
In
the cycle, Table ROM A17 inserts constant factors for the particular
function being processed, such as hammer energy factors for the particular character being printed.
Rev C (3/80)

4-27

4.4.3.4

Data Output Loop C

During a program cycle, the A Registers may, from time to time, contain operands for the arithmetic units, new addresses for the low
order 8-bits for the program counter, or data to be loaded into the
output latches.
In this instance, when stored data has been fully processed and is
ready for use, it is called from the RAM and latched on to the A Register output lines. From there, the program then moves the data to
the Output Data Latches F25/G13/G25/F13.
The Data Output Loop C is then closed by means of positional feedback to the input and Registers A and B thru Logic #1.
The main purpose of the output latches is to be able to collect serialized bit data and to present it simultaneously, or broadside (parallel) to the servo circuits following.
4.4.3.5

Model Variations

The printer's Logic #2 microprocessor circuit is applicable to a wide
variety of programs. On this PCB, these variations all use the same
basic circuit with variations seen as components changes only in the
three program storage Programmable Read Only Memories (PROMs). The
several versions or PROM sets currently available are described briefly in Table 4-4, and are reflected in the PCB assembly dash number.
4.5
4.5.1

TRANSDUCER PCB Assy, Std., #40515-04
General Information

This PCB contains all the circuits necessary to generate the sine-wave
drive for the carriage and print wheel transducer stator windings, to
demodulate the resultant phase-modulated carrier signal corning from
the two transducer rotor windings, and to produce from each carrier
signal three triangular position signals and one linear mode signal
each for the carriage and print wheel tachometer circuits on the Servo
PCB. Refer to Figure 7-4 Schematic Diagram.
4.5.2

The Sine-wave Drive Generator

Refer to Figure 4-8 for illustration of the waveforms discussed below.
Figure 4-8 shows the waveforms generated by modules H24 and H48.
These two modules are 4-bit parallel access shift registers which are
driven by the 5 mHz -CLOCK A input from Logic #1 PCB, and connect to
form a
16 circuit. The outputs are square waves as shown, where
the output H48-l5=HI is followed one clock cycle later by H48-l4=HI,
and so forth. When H24-l2 goes HI, feedback through H24-ll and thru
gate H30-8 drives the output at H48-l5 LO. This condition then cascades through the registers again until H24-l2 goes LO, when H24-ll
will drive H48-l5 HI to start the cycle again. These square-wave outputs are connected through inverters, pull-up resistors, and load
resistors to four output lines - two for carriage circuit use, and two
for print wheel circuit use. The inverters act as switches, allowing
4-28

Rev C (3/80)

current to flow through the associated load resistors whenever the
inverted output is LO. Seven of the inverter outputs are selected for
summation to form each of the four output signals -CAR 1, CAR 3,
PW 1, and PW 3. The values of the several load resistors plus a capacitor connected from each output line to their common return line
produces a set of two-phased sinusoidal waveforms as shown for both
the carriage and the print wheel circuits. These two signals are fed
to the stator windings on each position transducer.
4.5.3

Servo Position Transducer

Each Servo Position Transducer consists of rotor and stator members
made up as flat disks with windings laminated on adjacent surfaces.
The rotor is mounted on the free end of the servo motor shaft, with
the stator mounted over it,and fastened to the motor casing. Output
signals from the rotor are picked up by means of an axially mounted
rotary transformer.
.
TABLE 4-4
HyTYPE II LOGIC #2 PROCESSOR PCB PROM CHART

NEW
301850-01
-02
-04
-05
-06
-07
-08
-09
-10
-11
-12
-13
-14
-15
-16
-17
-18

OLD
40510-07 (08)
-81
-40 (11)
-48
-56
-67(68)
-78 (79)
-74(75)
-76 (77)
-94(95)
-97 (92)
-85( 15)
-86 (87)
-89 (16)
-90 (91)

Rev C (3/80)

---

-29<30 )

Table PROM LO PROM
A17
A57
A43
A73
13065-01 13066-05
-81
-45
-34
-35
-01
-45
-5'1
-05
-01
-65
-05
-78
-45
-73
-76
-35
-01
-94
-05
-91
-84
-85
-86
-35
-88
-85
-90
-90
-97
-97
-24
-25

4-29

HI PROM MODEL
A72
A58
13067-06 1345 Std (ESD)
-46 1345 Sp A
-36 1355WP Std (ESD)
-46 1345 Systems
-06 1345 Sp S
-66 1345 Sp D (ESD)
-06 1345 Sp K (ESD)
-46 1345 Sp E (ESD)
-36 1345 Sp DTe (ESD)
-94 1345 Sp T (ESD)
-06 1345 Sp DS (ESD)
-85 1355WP 96 OSD Sort (ESD)
-36 1355WP Sp E (ESD)
-85 1355WP 96 Diablo Sort (ESD)
-90 1355WP 96 Financial (ESD)
-97 1355WP Sp AES
-26 1355HS Std (ESD)

H48-15
H48-14
H48-13
H48-12
H24-15
H24-14
H24-13
H24-12

CAR. l/P.W. 1
J8-11 J8-7

CAR. 3/P.W. 3
J8-14 J8-3

Figure 4-8
SINE-WAVE DRIVE GENERATOR WAVEFORMS

4-30

Rev C (3/80)

STATOR

ROTOR
lA REPRESENTATION -WINDING DIMENSIONS EICAGGERATED fOR Ct..AR1TY1

ROTOR SEGIIENTS

STATOR SEGM£NTS

NO- OFFSET STATOR

Figure 4-9

SO' OFFSET STATOR

SERVO POSITION TRANSDUCER

As shown in Figure 4-9, the stator has an eight segment winding, with
alternate segments connected together to form two groups of four segments each. The four segments of one group are displaced laterally
from the other group by a distance equal to one-half a winding width.
This displacement is equal to a 90 0 phase difference.
The rotor has one symmetrical winding.
The two sinusoidal outputs shown in Figure 4-8 are introduced into the
transducer's stator windings. Since all the windings in the device
are nearly 1:1, the only transformation of the inputs is that the
summed output is phase modulated by rotor movement. The phase modulated output from the transducer is coupled back to a 2-stage RF Amplifier and a squaring circuit.
4.5.4

Servo Feedback Amplifier

ROTARY
]
TRANSFORMER
[ON TRANSDUCER)

Figure 4-10

SERVO FEEDBACK AMPLIFIER

Figure 4-10 is a partial schematic showing this circuit as seen in the
carriage channel. Since both carriage and print wheel channels are so
nearly alike, the balance of this discussion will follow the carriage
channel only.
Figure 4-11 shows waveforms taken in this circuit. Waveform A is the
phase modulated servo transducer output, as seen at the input to
the first video amplifier BIO-l/-14. Amplifier BIO has an adjusted
Rev C (3/80)

4-31

A
1st VIDEO AMPL. INPUT
810-1/14 (810-1 INVERTED)

.,

B
1!1 VIDEO AMPL. OUTPUT
B10-7/8 (810-7 INVERTED)

C
2 wi. VIDEO AMPL. OUTPUT
010-7/8 (010-7 INVERTED)

Figure 4-11

SERVO FEEDBACK AMPLIFIER WAVEFORMS
4-32

Rev C (3/80)

gain of approximately 20.
It amplifies and partially filters the input as shown at its output, waveform B, taken at BIO-7/-8. The second video amplifier DIO, also with a gain of approximately 20, further
filters the signal and generates a 10 volt p-p output waveform C
which displays some squaring of saturation limiting. This output,
from DIO-7/-8, is applied to a high speed squaring comparator module
FlO. FlO is overdriven, and produces a square-wave output.

INVERTER
A41

Tapf'

A42 II.IIK

CARRIER FILTER

+I5VF

......~I---'---------{,..

CAR.POS .IG ... I

INPUT - -___~

-lOY>

CAR. cusP --+--t''+L~
REI'

E41

ZT.'

{

+SVF*

G40

lOOK

J .....D~.I.............- - - - - - - - - { 4 7

CAR.POS 51. *3

IOO1\.

+BYF

E46
27pF

C42
lOOK

Figure 4-12

SERVO FEEDBACK DEMODULATOR/INTEGRATOR/AMPLIFIER

Figure 4-12 is a partial schematic showing the Servo Feedback Demodulator/Integrator/Amplifier circuit. Figure 4-13 shows waveforms
taken in this circuit.

A

CAR. POS# I

B

CAR. POS #2

C

Figure 4-13
Rev C (3/80)

SERVO FEEDBACK DEMODULATOR/INTEGRATOR/AMPLIFIER WAVEFORMS
4-33

The square-wave output of comparator FlO is inverted and applied to
Exclusive OR gates F48-3/-11 as the squared and inverted phase modulated signal from the carriage servo transducer, along with reference
square waves from the sine-wave driver generator circuit.
As shown in Figure 4-13, by observing the two inputs to either F48-3
or F48-11 along with the gates' output on a multichannel oscilloscope
which is synchronized to the sine-wave drive generator and slowly
moving the carriage by hand, the square-wave input from comparator
FlO (B) will appear to move with respect to the input on either pin 1
(F48-3) or pin 12 (F48-11) from the sine-wave generator (A). Then,
the output (C) from either F48-3 or F48-11 will be a square wave whose
relative HI-LO status will vary as the HI-LO states of the two inputs
vary with respect to each other.
MOTION

•

::0: "."
.,----,
r---1
r--1
r---1
- + 8V
I
L...-.J
L-.J
L.......J
L.. _
OV

a·
TIME TI

~

UTIJ.Jl..IT.fI.
•••

TIME TZ

~

L..JL...JLIL.J

Ave 2.5V

~

AYIII.7IY

- + ••

~
to·
TlliETa

~

-

~
.'S ••
TIlliE T4

Ave 1.lev

~

nnrJ:DI:IDI:Jr
~
.ao·
TIlliE Te

~

D.TI::.IT.D.JTI

DEMOD

~
IU·
TIMlT,

.JL...IL.....rL

=!=

REF
DEMODULATOR

AMPLIFIER

INTEGRATOR

~
~
170·

T1H'17

~

~
II'·

~
~

Figure 4-14

WAVEFORM ANALYSIS
4-34

Rev A (4/79)

0.

Figure 4-14 illustrates the development of the output waveform (C)
from the two input waveforms (A and B), and further shows the sawtooth waveshape developed in the integrating circuits for amplifiers
A48-10 and C48-12. The output of A48-10 is then supplied to amplifier
A48-12. These three amplifiers produce the waveshapes called CAR POS
SIG #1, CAR POS SIG #2, and CAR POS SIG #3.
In addition, when the
carriage has stopped, the lower circuit shown in Figure 4-12 produces
a signal called CAR LINEAR MODE, which is used to detent the servo.
4.6
4.6.1

SERVO PCB CIRCUITS
General Information

r-----------------------------,
SERVO PCB
ASSEMBLY
•
COMMAND
INPUT

__________________________________~~HAMMER
ENERGY

>-__-:--~

D-A . - . _ - .

• VELOCITY STROBE
I DIRECTION FWD
I
REV

I
I

___......~<

SERVO
ERROR

OUT

OUT

ANALOG
POSITION
SIGNALS

MODE SELECT

I

DET.

IL _______________________________

Figure 4-15

~

SERVO PCB BLOCK DIAGRAM

As shown in Figure 4-15, this circuit follows Logic #1 and Logic #2 in
the command response chain, and has four functions. First, it receives
strobed processed command data from Logic #2, and converts this
digital data input to a voltage level representative of the absolute
value of the desired velocity at which the carriage or print wheel is
to be moved.
Since incoming data are multiplexed, the D-to-A Converter part of the circuit is common, with the print wheel and carriage
functions being steered to nearly identical but separate sample and
hold circuits. The velocity level output from the sample and hold
circuit is then switched in polarity to control direction of movement,
and the resultant polarized voltage is presented to a summing amplifier as the velocity command signal. Second, dual tachometer circuits
convert incoming analog position signals (XX POS SIG #1, #2 and #3) to
a voltage level which represents the actual servo velocity.
In addition, these circuits derive a series of three digital position signals
(XX POS A, POS B and EVEN). These position signals represent distance
moved and are supplied back to Logic #1 PCB where they are used to
generate increment and/or decrement counts for the position memories
in Logic #2. Third, the voltage level of velocity is summed with the
velocity command signal to develop a 0 to 7 volts maximum SERVO ERROR
signal. SERVO ERROR is used on the Power Amplifier PCBs to develop
the actual servo motor drive current. Fourth, the D-to-A Converter

Rev A (4/79)

4-35

output is used to process print hammer energy commands which are then
used to develop the actual print hammer drive current on the Print
Wheel Power Amplifier PCB.
Refer to Figure 7-5a Schematic Diagram.
4.6.2
4.6.2.1

Servo PCB Assy, Std., #40520-04
The D-A Converter
+!lV

F9

TO CARRIAGE CKT

+!lV

--

FlO

x

BIT
BIT
BIT
BIT
BIT
BIT
BIT
BIT

•
I
2
3

FIS

4

GI2

4

!I

HII

TO HAMMER

.....--1> ENERGY CKT

6

-..-7
INPUT

DIO

E6
GI6

De

D9

-15S

F23

-1!lS
TO P W CKT

Figure 4-16

D-A CONVERTER CIRCUIT

This common input stage serves both the carriage and print wheel channels as well as the print hammer circuit.
It consists of 8-bit
digital-to-analog converter module G12, operational amplifier E12-6,
buffer/driver transistor E6, and associated circuit components.
Figure 4-16 is a partial schematic illustrating this circuit. Converter G12 converts the binary input from the microprocessor to a current. The amplitude of this current represents either a speed command
for carr.iage or print wheel, or a hammer energy command for the print
hammer. The circuit's operating parameters are set by the value of
resistors F9 and FlO in the +5V supply line to G12 pin 14, so th~t
when all digital inputs are HI the output current at pin 4 will be
99.6% of the reference current of approximately 1 rnA on pin 14.
When all digital inputs are LO, the output on pin 4 will be 0 rnA.
E12-6 is a current-to-voltage converter, with its instantaneous voltage level stored on capacitor F5 for reference between updating inputs
from the microprocessor.
4.6.2.2

The Sample and Hold Circuit

Figure 4-17 illustrates a typical Sample and Hold circuit for either
the carriage or print wheel channel, and shows the basic timing
involved. The circuit consists of an input switching FET, an operational amplifier A coupled to a buffer/driver transistor Q, and associated components.
4-36

Rev A (4/79)

~

,....-----M----.--I> OUTPUT
D-A CONV. >---'\Mr04t-#.~t-1--iot-:--""'"
INPUT

D-AINPUT

J ......

---tL

1~"'Iz-lJ-SE-C

VELOCITY
STROBE
Q

Figure 4-17

VEL STROBE INP

TYPICAL SAMPLE AND HOLD CIRCUIT

In operation, the output of the D-A Converter is presented to the
switching FET through resistor Rl (D9 in the actual carriage circuit,
F23 in the actual print wheel circuit). Approximately 6 usec after
the arrival of data on the data bus input to the D-A Converter, the
microprocessor on Logic #2 issues a 2 usec Velocity Strobe pulse
through a line receiver network to turn on the FET. When turned on,
the FET couples the D-A output voltage to holding capacitor C in the
feedback circuit of amplifier A. Capacitor C holds this voltage
until the microprocessor again strobes in the D-A output. The microprocessor's cycle rate is so fast that it may update the charge on the
capacitor 100-200 times before it actually modifies the data.
The
microprocessor can modify the D-A input data only when the associated
transducer has experienced a track crossing (generated required count
pulse(s)), which occurs each time the carriage or print wheel has
moved a prescribed distance. Amplifier A follows and inverts the
charge on capacitor C, to produce a O-to-negative going voltage which
represents the velocity command for the associated servo. Transistor
Q buffers the amplifier output, and provides drive current for the
circuits following.
4.6.2.3

Servo Direction Switching

Refer to Figure 7-5 Schematic Diagram. The output of the nearly identical Carriage and Print Wheel Sample and Hold circuits follow identical paths. One path goes through a 10K resistor to a switching FET,
while the other path goes through an inverting operational amplifier
to a second switching FET, with the output of both of the FET's tied
together. This means that the negative going output of the Sample and
Hold circuit is supplied as a negative going voltage to one FET, and
as a positive going voltage to the other FET. The gates of these
FET's are controlled by inputs from the microprocessor labled FWD and
REV through inverters and voltage divider networks. The microprocessor can then select the correct polarity of signal to be presented to
the Summation circuit to control ultimate direction of servo movement.
During those times in printer operation when carriage and/or print
wheel motion has stopped, and before the hammer fire sequence is complete, the associated servo must be detented to hold its position. To
accomplish this, a signal called LINEAR pas SIG is generated in the
Transducer circuit and presented to a third switching FET whose output
is also tied to the Summation circuit. This FET is A12-7 for the carriage circuit, and A32-l5 for the print wheel circuit. The input to
the gates of these FET's comes from the microprocessor through the
normal inverter/divider network, and is labeled LINEAR MODE. The

Rev A (4/79)

4-37

associated servo system is de tented by the microprocessor gating in
the LINEAR POS SIG to the summation point, while at the same time
holding the two associated position switching FET's in their OFF
state.
30 msec after gating in the LINEAR
command strobe, the microprocessor
This turns off the power amplifier
flow through the servo while it is
Mode.

POS SIG following the last position
activates the SERVO DISABLE signal.
and effectively removes current
at rest. This is called the Float

In the Print Wheel circuit, the absolute counter is maintained in synchronization with print wheel position at all times, even if the print
wheel is manually moved or should drift.
In this way, print wheel
movement in response to the next command can start from wherever the
print wheel happens to be when the command is received.
Carriage position information is not maintained within the printer
circuits. Any carriage drift or noncommanded movement would desynchronize the controller's position information. Any carriage movement, therefore, triggers a response to remove the Float Mode and
drive the carriage back to its last commanded position.
4.6.2.4

Servo Tachometer Circuits

~~~~-'i

8191001(

COMMAND

>';;-<~_--1:>1I CAR. SERVO ERROR

067
t K

OIl
10K

:;»-------() 44·CAR. EVEN.
POS
POS
POS

s.. #t>----t--t------t-+-------..:.:.=.J

SIG#2>---+-_----+-+---------_----J
SIG#3>--_------+--+----------_---l
~-------------------------<)
~--------------------------<)

Figure 4-18

•• -.POS.
5!CAR. pas A

CARRIAGE POSITION TACHOMETER CIRCUIT

Figure 4-18 is a partial schematic diagram showing the Carriage Position Tachometer and associated circuits. Again, the Print Wheel
circuits are nearly identical, so only the carriage circuit will be
discussed.

4-38

Rev A (4/79)

A
B

Figure 4-19
CAR. POS TACHOMETER WAVEFORMS

c

o
E

CAR. POS I
CAR. POS 2

CAR. POS 3

F

CAR. POS 3

G
H

I

Figure 4-20
CAR. POS FET INPUT WAVEFORMS

Figure 4-19 shows waveforms taken in these circuits.
The design of the transducer on the carriage servo motor is such that
each complete cycle of the sawtooth waveform inputs represents 1/120
inch (.212 mm) of carriage travel. Thus, while these sawtooth inputs
do not vary in amplitude, they DO vary in frequency.
This variation
(or modulation) follows actual servo speed, with the waveshape itself
tracking carriage position.
Refer to Figure 4-19. Modules E48 and E72 are high speed comparators.
Their inputs are the sawtooth (or triangular) POS SIG waveforms A, B
and C. Their actual outputs are square waves. The duration of these
square waves follows the frequency of the sawtooth inputs. They pass
through inverters, whose outputs are waveforms D and E from comparators E72 and E48 respectively, and are sent to Logic #1 as POS A and
POS B. POS SIG #3 input is also sent through inverting amplifier
C60-10, comparator E72-2, and inverter G60-l0 to develop the CAR EVEN
signal also supplied to Logic #1 PCB.

Rev A (4/79)

4-39

The POS A and B square waves are also channeled through a series of
inverters and gates to supply waveforms F, G, H and I. These signals
are used to control the feedback FET's C72-2, -7, -10 and -15.
The three POS SIG sawtooth waveforms, plus POS SIG #3 inverted, are
supplied to the control FET's through differentiating networks. Figure 4-20 shows the waveforms taken at the capacitor-resistor junction
in each network. The control pulse to each FET will turn the FET on
to pass either the positive or negative part of the differentiated
signal, depending on the direction of servo movement. Since servo
velocity is seen here as frequency, the higher or lower the velocity,
the higher or lower the level of the differentiated square wave. The
voltage level of the outputs of the FET's are applied one at a time
to the input (pin 1) of amplifier C60-12 with the combined result representing servo velocity. Amplifier C60-12 inverts the input and presents it to the velocity summation junction (pin 7) of Servo Summation
Amplifier C24-10 as negative feedback.
4.6.2.5

Servo Summation Amplifier

This amplifier, C24-10 for carriage and C36-12 for print wheel, is the
output of the servo velocity command circuit.
It is an operational
amplifier with a compensating capacitor, and a gain resistor in its
feedback loop. The back-to-back 6.2 volt zener diodes in the output,
plus their normal voltage drop, provide a bidirectional voltage clamp
which limits the amplifier output to +/-7 volts.
Since each volt of
signal output here produces a fixed value of drive current later on in
the servo motor, it is necessary to establish this voltage limit to
safeguard the servo motor.
The input to this amplifier is then either the sum of actual velocity
and velocity command voltages, or the LINEAR POS signal input and velocity signal which is used to detent the servo motor. The output is
a voltage which is directly proportional to the desired amount of
servo drive current. This output is labeled SERVO ERROR, and is sent
to the associated Power Amplifier circuit.
4.6.3

Servo PCB Assy, 1355HS, #46020-02

This circuit is identical to #40520-04 with the exception of the feedback resistors in the Summation Amplifier circuits, and the PW LINEAR
POS SIG input resistor. Refer to Figure 7-5b Schematic Diagram.
4.7

CARRIAGE POWER AMPLIFIER PCB CIRCUITS

4.7.1

General Information

This assembly includes the Carriage Servo Power Amplifier, the Paper
Feed Drivers, and the Power Monitor circuits. It is located in
Printer Electronics Compartment Slot D, and has a finned heat sink
attached to it, to help cool the several drive transistors.
NOTE:

DO NOT stand the HyType II Printer on its rear heat
sinks. These finned heat sinks are mounted on plug-in
circuit boards which can be easily damaged by this practice.
4-40

Rev A (4/79)

I

4.7.2
4.7.2.1

Carriage Power Amplifier PCB Assy, Std., #40S25-10
Carriage Power Amplifier Circuit

I

1

S2

SI
NTR

....._ _ _:-1_ _ _

i

S3

1

}

FEED BACK

S4

J

T

-15V

Figure 4-21

CARRIAGE POWER AMPLIFIER SIMPLIFIED DIAGRAM

This circuit supplies and controls current flow to the carriage servo
drive motor.
It is designed as an H bridge, allowing all current to
flow through the motor from supply to supply instead of through circuit ground to avoid circuit noise problems. Figure 4-21 illustrates
the basic circuit in simplified form, where certain transistors in the
actual circuit are represented as switches.
It may be seen that closing switches Sl and S4 will cause current to flow through the motor
and resistor R right to left, while closing switches S2 and S3 will
cause current flow left to right.
Referring to Figure 7-6a Schematic Diagram and the above will aid in
understanding the operation of the circuit itself. Since the amplifier is composed of several similar circuits, only one path will be
discussed.

....

Assume a CAR. SERVO ERROR signal of +1 volt for a commanded motor
current of 1 ampere. The output from operational amplifier B55-6 will
be low, and this will place a low potential on the base of transistor
GS8 to disable the Pulse Fwd circuit, and on the emitter of transistor
G73. G73 will turn OFF. G73 being OFF turns transistor E70 OFF,
which turns transistor E6S ON to turn ON Pulse Rev switching transistor F63 •
The error signal is also supplied to amplifier A50-6. Amplifier ASO-6
output will be negative with a positive input, which will turn transistor D42 OFF. This will turn transistor D45 OFF and transistor E44
ON to turn ON Drive Rev switching transistor D48.
Referring to Figure 4-21, transistor D48 is shown as switch S2, while
transistor F63 is shown as switch S3. Turning these two transistors
ON establishes a current path from the +lS volt supply through D48,
resistor C53, the drive motor, and F63 to the -15 volt supply.

Rev C (3/80)

4-41

DRIVERS
10K

10K

RI
10K
MOTOR

ERROR

Figure 4-22

E

FEEDBACK INSTRUMENTATION CIRCUIT

Figure 4-22 is a simplified schematic diagram of the feedback circuit.
This circuit includes the .1 Ohm resistor C53 (Rl)located in one of
the lines to the servo motor, across which is connected a precision
balanced 10K Ohm resistor network and difference amplifier B62-10.
The value of resistor C53 (Rl) is such that its voltage drop to current ratio is 1 to 10 (.1 volt drop equals 1 ampere of motor current).
Difference amplifier B62-10 inverts this voltage, and presents the
result to servo error input terminal 2 of amplifier B55-6. The two
signals are summed at a ratio of 10 inputs to 1 feedback.
It may be
seen then that as current through the drive motor approaches the commanded level the output of B55-6 will diminish. When motor current
matches command current, the Pulse Rev switch transistor F63 will be
turned OFF. This removes motor current which removes feedback voltage
and F63 is turned back ON again. The circuit will oscillate in this
manner to maintain motor current at the commanded level.
Should the Power Monitor circuit detect an input voltage error, it
will generate a -CAR. SERVO disable signal. This signal will turn
transistor E77 ON which results in turning OFF Pulse Fwd and Pulse Rev
transistors F47 and F63 to disable carriage servo movement.
4.7.2.2

Power Monitor Circuit

:>-----+ + CAR.

+

5V
+15V
-15V

SERVO ENABLE

>-__-----~ - SERVO

DISABLE
ENABLE

+ P W SERVO
>------~ + POWER ON

>-------~

Figure 4-23

+P F

ENABLE

POWER MONITOR CIRCUIT BLOCK DIAGRAM

The purpose of this circuit is to inhibit paper feed, print wheel and
carriage movement by generating a series of disabling signals anytime
one or more of the three supply voltages drops below a level where

4-42

Rev C (3/80)

I
I

component damage might result. These signals also reset all printer
program and logic circuits to their initial or zero condition (a restore sequence).
+150

CAR. DISABLE
SWITCH

CARRIAGE
SERVO DISABLE

433

-SERVO
DISABLE IN

POWER MONITOR CKT

r

+5V

B2
.1

A30

B5
5V

-::-

+155
AI4
5.6K

+155
07
IIV

A8
823
09
IK
-155

+5V

-ISS

B6

470
PAPER FEED
DISABLE

B8
B7
IIV
-155

BI4
3K

-ISS

Figure 4-24

POWER MONITOR CIRCUIT

Refer to Figure 4-24. This circuit operates as follows.
As power is
applied, transistors B12 and B13 are OFF. Three divider networks
begin to sample the +5, +15, and -15 volt levels being supplied:
zener diode B5 and resistor All sample the +5 volt input; zener diode
A7 and resistor A9 sample the +15 volt input; and zener diode B7 and
resistor B6 sample the -15 volt input. As these voltages approach
their appropriate values, diodes A8, A12, B8 and B9 (operating as an
AND gate) are reverse biased, and transistors B12 and B13 turn ON. Up
to this time transistor B16 had been ON and B22 OFF. When transistors
B12 and B13 turn ON, capacitor A22 begins to charge through resistor
A24 and the emitter base junction of B16, and transistor B22 is biased
OFF. With transistor B22 OFF, transistors A30 and B23 along with two
transistors C34 and C36 in the Paper Feed Drive circuit, are biased ON
and their outputs are all clamped LO. This condition disables all
printer functions as outlined and will continue until capacitor A22
has charged sufficiently to turn transistor B22 ON.
At the end of the delay (approximately 25 msec), transistor B22 is
turned ON discharging capacitor A22 and turning transistor B16 OFF.
It will also turn OFF transistors A30, B23, C34 and C36, allowing
all their outputs to go HI. This removes the circuit disable clamps,
starts the program counter in the microprocessor on Logic #2, and
initiates a restore sequence.

Rev A (4/79)

4-43

Any subsequent interruption in, or depreciation of, any of the three
input voltages monitored will disable the printer by action of this
circuit. Complete restoration of power recycles this circuit, putting
the printer back in operation with a restore sequence.

In

""
IR

Figure 4-25

PAPER FEED DRIVE CIRCUIT

P F B
DIFF B (GI2-GI7)
PF A
DIFF A (F28-F35)

.J...

I
T

Figure 4-26

DRIVE B
CURRENT
DETENT CURRENT
DRIVE A
CURRENT

PAPER DRIVE WAVEFORMS
4-44

Rev A (4/79)

4.7.2.3

Paper Feed Drive Circuit

Figure 4-25 is a partial schematic diagram of the Paper Feed Drive
circuit. Figure 4-26 shows waveforms taken in the circuit. The circuit consists of two identical channels A and B, each feeding a field
winding in the paper feed stepper drive motor. As shown in Figure
4-26, the signals in channel A lead the signals in channel B by 90 0
This relationship produces clockwise rotation of the stepper motor •
shaft (as viewed from its shaft end) for upward (forward) paper movement only. Since the A and B channels are identical, only channel B
will be discussed here.
In operation, the square-wave PF B input on connector 10 is differentiated by a circuit consisting of capacitor G12, resistor G17, and
resistor G20. This network provides a pulse to the input, pin 7, of
operational amplifier FIS-IO with a duration of approximately 4 to 5
msec. FIS-IO squares and amplifies the input, with the result coupled
to current amplifiers D22/24 - E12/21. The output drive current waveform (lower half of Figure 4-26) is applied to the B winding of the
paper feed stepper drive motor (terminals T5 and T6) •
The waveforms shown in Figure 4-26 represent one complete line feed
operation. Examination of the waveforms will disclose four level
changes for each channel, or a total of Bight level changes per line
feed.
The stepper motor shaft moves 7.5 per level change (A or B)
with the A to B 90 0 phase relationship controlling the direction of
movement. Thus each line feed command produces S x 7.5 0 =60 0 of shaft
rotation for a line spacing of six lines per inch.
The paper feed motor is detented electrically at the end of each line
feed operation. Again, discussing channel B only, a circuit consisting of resistors GIS, G16 and GIO (-15 volts to +5 volts) provides
enough output from amplifier FIS-IO (about .4 amp motor current) to
electrically detent the stepper motor.
4

8

A
3~4

r~J,

END VIEW
MOTOR SHAFT

B

Figure 4-27

~

~4r.ml
2
I I B I

TYPICAL STEPPER MOTOR ROTATION

Figure 4-27 illustrates the development of stepper motor rotation from
two inputs 90 0 out of phase with each other. Actually, the paper feed
stepper motor's rotor has a magnetic node each 7.5 0
This would be
difficult to illustrate.
It should be noted, therefore, that for
clarity the illustration depicts a stepper rotor with magnetic nodes
every 90 0 only.
Rev A (4/79)

4-45

4.7.3

Carriage Power Amplifier PCB Assy, ESD, #40525-11

This version of the circuit is designed for use in HyType II Printer
Models 1345A and 1355WP with the ESD Option installed. It is electrically identical to #40525-10 discussed in subsection 4.7.2. This
assembly adds a metal ground plane or shield between the circuit board
and its heat sink.
4.7.4

Carriage Power Amplifier PCB Assy, l355HS, #46025-05

This version of the circuit is designed for use in Model 1355HS HyType
II Printers.
It is identical to #40525-10 discussed in subsection
4.7.2 excep as follows: Fusible resistors G37/G39 in the +/-15D power
input circuits are replaced with jumper wires; Capacitor C15 is deleated in the Power Monitor circuit; and, Resistor C53 in the feedback instrumentation circuit is paralleled by resistor C56 with both
at .2 Ohm 3W. Refer to Figure 7-6b Schematic Diagram.
4.7.5

Carriage Power Amplifier PCB Assy, l355HS ESD, #46025-06

This version of the circuit is designed for use in Model 1355HS, HyType
II Printers with the ESD Option installed.
It is electrically identical to #46025-05 discussed in subsection 4.7.4. This assembly adds
a metal ground plane or shield between the circuit board and its heat
sink.
4.8

PRINT WHEEL POWER AMPLIFIER PCB CIRCUITS

4.8.1

General Information

This assembly includes the Print Wheel Servo Power Amplifier, the Ribbon Lift and Ribbon Feed Drivers, the End Of Ribon sensor amplifier,
and the Hammer Energy Control and Driver circuits. It is located in
Printer Electronics Compartment Slot H, and has a finned heat sink
attached to it, to help cool the several drive transistors.
NOTE: DO NOT stand the HyType II Printer on its rear heat
sinks. These finned heat sinks are mounted on plug-in
circuit boards which can be easily damaged by this practice.
4.8.2
4.8.2.1

Print Wheel Power Amplifier PCB Assy, Std., #40530-10
Print Wheel Power Amplifier Circuit

NOTE: This circuit is nearly identical to the Carriage Power Amp---- lifier circuit descr"ibed in subsection 4.7.
This circuit supplies and controls current flow to the print wheel
servo drive motor.
It is designed as an H bridge, allowing all current to flow through the motor from supply to supply instead of thru
circuit ground to avoid circuit noise problems. Figure 4-21 illustrates the basic circuit in simplified form, where certain transistors
in the actual circuit are represented as switches. It may be seen
that closing switches Sl and S4 will cause current to flow through the
motor and resistor R right to left, while closing switches S2 and S3
will cause current to flow left to right.
4-46

Rev C (3/80)

I

Referring to Figure 7-7a Schematic Diagram and the above will aid in
understanding the operation of the circuit itself. Since the amplifier is composed of several similar circuits, only one path will be
discussed.
Assume a PW SERVO ERROR signal input of +5 volts for a commanded motor
current of 1 ampere. The output of operational amplifier A3l-6 will
be low, and this will place a low potential on the base of transistor
H18 and on the emitter of transistor H35. H35 will turn OFF, turning
transistor F32 OFF, which turns transistor E30 ON to turn ON Pulse Rev
switching transistor G26.
The error signal is also supplied to amplifier A19-6. The output of
amplifier A19-6 will be zero volt with a positive input, which will
turn transistor C4 OFF. This will turn transistor D5 OFF and transistor E6 ON to turn ON Drive Rev switching transistor CIO.
Referring to Figure 4-21, transistor CIa is shown as switch Sl, while
transistor G26 is shown as switch S4. Turning these two transistors
ON establishes a current path from the -15 volt supply thru G26,
resistor H32, the drive motor, and CIO to the +15 volt supply.

DRIVERS

10K

10K

RI

MOTOR

ERROR

Figure 4-28

I

O------------.NY'-.

PRINT WHEEL FEEDBACK INSTRUMENTATION CIRCUIT

Figure 4-28 is a simplified schematic diagram of the feedback circuit. This circuit includes a .1 ohm resistor H23 (Rl) located in one
of the lines to the servo motor, across which is connected a precision
balanced 10K Ohm resistor network and difference amplifier A45-l2.
The value of resistor H23 (Rl) is such that its voltage drop to current ratio is two-to-one (a 2 volt drop equals 1 amp of motor current). Difference amplifier A45-l2 inverts this voltage and presents
the result to the servo error input terminal 2 of amplifier A3l-6.
The two signals are summed at a ratio of 10 inputs to 1.6 feedback,
and it may be seen then that as motor current approaches the commanded
level, the output of A31-6 will diminish. When motor current matches
command current, the Pulse Rev switch transistor G26 will be turned
OFF. This removes motor current, which removes feedback voltage and
G26 is turned back ON again. The circuit will oscillate in this manner to maintain motor current at the commanded level.
Should the Power Monitor circuit detect an input voltage error, it
will generate a -PW SERVO ENABLE signal. This signal will turn tranRev C (3/80)

4-47

sistor E35 ON, turning OFF Pulse Fwd and Pulse Rev transistors GIO and
G26 to disable print wheel movement.
4.8.2.2

Ribbon Lift Drive Circuit

This circuit consists of two subcircuits; one for ribbon lift and one
for ribbon hold. The ribbon lift portion includes transistors G67 and
H59. The RIBBON LIFT signal turns G67 ON to apply a ground potential
to the base of H59. H59 turns ON, applying -15 volts to one side of
~he ribbon lift coil.
The opposite side of the coil is tied to +15
volts. The coil is then energized with a potential of 30 volts, to
provide maximum power to rapidly lift the ribbon. At the end of the
ribbon lift sequence, the programmer removes the RIBBON LIFT signal
and replaces it with the RIBBON HOLD signal. The ribbon hold portion
of the circuit includes transistors H67 and H61. The RIBBON HOLD signal turns ON transistor H67 applying a ground potential to the base of
H61. H61 turns ON, applying a ground potential to one side of the
ribbon lift coil. The coil is then maintained in its energized state
(ribbon lifted) with a potential of 15 volts.
4.8.2.3

Ribbon Feed Drive Circuit

NOTE: This circuit is nearly identical to the Paper Feed circuit
described in subsection 4.7.2.3.
Refer to Figures 4-25, 4-26 and 4-27. The Ribbon Feed Drive circuit
consists of two identical channels A and B. Figure 4-25 shows typical
input and output waveforms for each channel for ribbon feed motor
rotation.
The A and B inputs, 90 0 out of phase, are presented to type 747 operational amplifiers E74-l2/-10 where they are squared and amplified.
The output of these amplifiers is coupled to current amplifiers F48/
D50 - D43/F45 for channel A, and F64/D64 - D58/E58 for channel B,
where the drive for the ribbon feed stepper motor is developed.
The information in Figure 4-27 further illustrates the development of
the stepper motor rotation from the two out-of-phase inputs.
It
should be noted, however, that unlike the paper feed operation, ribbon
feed is in one direction only, with the controller providing the information for ribbon feed.
On the Model 1355WP WOod Processor Printer, ~he ribbon advance stepper
motor increments in 30 steps rather than 90 steps. This aids in
achieving true proportional ribbon advance.
4.8.2.4

Hammer Energy Control and Drive Circuit

Refer to Figures 4-29 and 7-7 Schematic Diagram.
Figure 4-29 is a simplified schematic diagram of the Hammer Energy
Control circuit. The HAMMER ENERGY CONTROL signal from the D-A Converter on the SERVO PCB is the input to this circuit. This is the
signal whose instantaneous level depends on the character to be printed. The normal range of this signal is 0 to +10 volts. Direct Controller access to exercise closer control of this level is discussed
in Section 6.
4-48

Rev C (3/80)

J

IMPRESSION
CONTROL SWITCH

INPUT
C44

OUTPUT

I

Figure 4-29

HAMMER ENERGY CONTROL CIRCUIT

The input is applied to Terminal 50. From this point, it goes through
resistor B40 to pin 7 of amplifier A45-10, and to the wiper arm of the
Operator's Impression Control Switch. The output of the amplifier is
then dependent on the position of this switch, i.e. whether a portion
of the input is added to or subtracted from the input.
The +FIRE HAMMER pulse from the Programmer on Logic #2 PCB turns transistor H50 OFF, to drive the hammer enabling circuits. The hammer fire
pulse from H50 is compared with the hammer energy level in comparator
A64-7, and also enables transistor C65. C65's output switches driver
transistor C73, and also establishes its output level to control the
amount of current flowing to the hammer coil.
4.8.3

Print Wheel Power Amplifier PCB Assy, ESD, #40530-11

This version of the circuit is designed for use in Model 1345A HyType
II Printers with the ESD Option installed.
It is electrically identical to #40530-10 discussed in subsection 4.8.2. This assembly adds
a metal ground plane or shield between the circuit board and its heat
sink.
4.8.4

Print Wheel Power Amplifier PCB Assy, 1355 Std, #40730-10

This version of the circuit is designed for use in HyType II Printer
Models 1355HS and 1355WP.
It is electrically identical to #40530-10
discussed in subsection 4.8.2 with the following exceptions:
.1 Ohm
3W Resistor G23 added in series with Resistor H23 in the feedback instrumentation circuit; R-C network B29/B30 plus capacitor D31 added to
the Pulse circuit; R-C networks and a capacitor added to the Ribbon
Feed Drive circuits; and, Component changes at B39/B40/C41 and C55,
and zener diode F55 deleted in the Hammer Drive circuit. Refer to
Figure 7-7b Schematic Diagram.
4.8.5

Print Wheel Power Amplifier PCB Assy, 1355 ESD, #40730-11

This version of the circuit is designed for use in HyType II Printer
Models 1355HS and 1355WP with the ESD Option installed.
It is electrically identical to #40730-10 discussed in subsection 4.8.4. This
assembly adds a metal ground plane or sheidl between the circuit
board and its heat sink.
Rev C (3/80)

4-49

4.9

INTERNAL POWER SUPPLY OPTIONS

4.9.1

General Information

Several versions of the Internal Power Supply are currently available
for installation in Series 1300 HyType II Printers. These various
supplies are discussed individually in the following subsections.
CAUTION:

A word of CAUTION for those technicians who may not
be familiar with the higher voltage levels found in
switching power supplies.
Experiments have shown that +/-18 volts at .25 Amp
can KILL if the conditions are right!

WARNING:
4.9.2

The Internal Power Supplies discussed herein use voltage
levels which can be LETHAL!

Internal Power Supply Assy, DP, #24250-XX

SWITCHING
TRANSISTOR
II tV220v AC INPUT

PULSE
WIDTH
MOIllLAlOR

CONTROL
lOGIC

t----~+I!lV

+IOVDC REG

POWER

~--+--~HiV

SUPPLY

CUR.
+IBVDC
UNREG

L----iZ2::~SENSE

TOTAL CURRENT SENSE

VOLTAGE SENSE

+lOV

r'>N'-IIiIli'-NVo--o

+!IV

OVERVOLTAGE SENSE

Figure 4-30

OPTIONAL INTERNAL POWER SUPPLY BLOCK DIAGRAM (DP)

Refer to Figure 4-30 above, and to Figure 7-8a Schematic Diagram.
This optional Internal Power Supply is a direct line switching circuit
which operates as follows. The 115/230 volt AC input (domestic version) passes a line fuse, a line filter network, and transient/surge
protection devices. From that point, the filtered AC is applied to a
high voltage (312 volts DC) rectifier and filter circuit, and to a low
voltage (+10 volts regulated and +18 volts unregulated DC) power
supply. The high voltage rectifier and filter circuit also includes
transformer T7 which is used to sense total current flow through the
high voltage network.
The output of the high voltage rectifier and filter is applied to the
emitter of switching transistor QIOl. Current flows through thetransistor and choke LlOl to charge capacitor C4. As C4 charges, the
4-50

Rev C (3/80)

I

voltage level coupled to the DC-AC converter circuit rises.
Power is
also being applied to the inverter circuit from the low voltage supply, and the inverter begins to oscillate at approximately 20 kHz.
The inverter's output is coupled to the DC-AC converter through transformer T2. The converter's output is the level of charge on capacitor
C4 being switched at the inverter frequency and applied to the primary
winding of transformer T3. The several power supply output voltages
are then developed in the T3 secondary windings, rectified, filtered,
and presented to the power supply's output terminals.
Each low voltage output supply includes a current sensing transformer
similar to T7 in the high voltage 'circuit. These are T4 for the +15
volt, T5 for the -15 volt, and T6 for the +5 volt circuits. The secondary winding of each of these current sensing transformers (T4 thru
T7) is connected to a comparator, part of module Z2. The output of
each comparator is diode ORled to the base of overcurrent switching
transistor QIO. The emitter of QIO is tied to +10 volts DC, while the
collector goes to pin 4 of switching regulator Zl. The output of a
voltage divider network (R46, R47 and R48) is also tied to Zl pin 4,
and is used to set the operating conditions for the circuit. The line
to Zl pin 4 is then the voltage sense input to the regulator. Transistor Q8 supplies a reference level to Zl pin 5 of about +3.46 volts
which carries a +/-75 mv sawtooth component obtained from the inverter
through winding 7-8 of transformer T2. The output of Zl at pin 9 is
coupled to transistors Ql and Q3 which, with transformer Tl, forms a
pulse width modulator (PWM) circuit to turn transistor QIOI on and off
at the inverter frequency. The energy output from the supply is drawn
from capacitor C4. Transistor QIOI is turned ON to keep C4 charged.
A higher current demand in one or more of the output circuits works
through the sense circuits, the regulator, and the PWM circuit to keep
QIOI in its ON state longer during each cycle to provide an increased
current supply to capacitor C4. A lower current demand works in reverse of this to keep QIOI ON for a shorter period each cycle providing less energy to C4 in keeping with the need.
A dramatic increase in current demand in one or more of the output
circuits will work to greatly reduce the output of QIOl, keeping the
available current at a safe level.
An overvoltage detection circuit is included in the power supply and
is tied to the +5 volt supply. The major circuit components are zener
diode CR13, transistor Q9, SCR CR12, SCR CR6, and transistors Q7 and
Q2. A rise in the +5 volt level exceeding +5.2 volts will break down
zener diode CR13 turning transistor Q9 ON. This will gate SCR CR12 ON
to short circuit the +5 volt line to ground, and will also gate SCR
CR6, located in the overvoltage clamp circuit. When gated, CR6 turns
transistors Q7 and Q2 ON. This chain action works to turn switching
transistor QIOI OFF. As the voltage level of the +5 volt supply line
falls, Q9 will turn OFF, the circuits will reverse themselves to turn
QIOI ON again. As long as the output circuit problem exists, the power supply control logic will oscillate in this manner, maintaining a
very low charge level on capacitor C4 and a very low output level on
all supply lines.
This type of protection circuitry has two advantages. One, the supply
will recover immediately from a fault condition once the overload has
Rev A (4/79)

4-51

been removed, and two, the low voltage level which is maintained on
all lines during a fault condition aids in locating the problem.
Use ALL CAUTION when working with the higher voltages found in these
power supplies! These voltages are significantly HIGHER than those
normally associated with TTL/MOS devices. Capacitors C2 and C3 (156
volts each!) are discharged SLOWLY through bleeder resistors R2 and
R3. These capacitors should be discharged completely by shorting them
to ground before starting work on the supply.
4.9.3
4.9.3.1

Internal Power Supply Assy, B, #26021-XX
General Information
PRIMARY

R[FERENCED TO COMMON RETURN 0

OUTPUT

CIRCUIT REFEAUCED TO SIGUL GROUND

-$

I - - - - - - t - - + ISVDLT OUTPUT

~--+--- +SVOLT ouTPUT

1 - + - - - -IIVOLT

Figure 4-31

OUtrUT

OPT.IONAL INTERNAL POWER SUPPLY BLOCK DIAGRAM (B)

Refer to Figure 4-31 above, and to Figure 7-8b Schematic Diagram.
This optional Internal Power Supply is also a direct line switching
circuit, and operates as follows. The 115/230 volt 50/60 Hz AC input
(domestic version) passes thru line transient/surge protection and
filtering circuits, and is applied to a full wave bridge rectifier
circuit. The dc output of approximately 100 volts from the rectifier passes fuse Fl and is supplied thru a resistor network to a local
+15 volt regulated power supply circuit, and to the high voltage primary power supply circuit.
4.9.3.2

Input Surge Limit and Filter Circuits

When ac power is initially applied, filter capacitor C23 demands a
high rate of charging current. To protect the diodes in the rectifier, thermistor RTI is inserted in the line. This resistor has a
negative temperature coefficient and initially offers a relatively
high resistance value, which then lowers as its internal temperature
rises due to current flowing thru it. This sequence limits the charge
rate for C23. Eventually, the resistance of RTI drops to a very low
level, where the ac ripple component from the rectifier is sufficient
to keep its temperature up and resistance down.
4-52

Rev C (3/80)

I

Switching power supplies tend to generate sharp transients, which can
be reflected back on to the power line. Line filter capacitors el,
C2 and C4, and RFI filter inductor Ll suppress this tendency. Ll is
a device with two windings on a common magnetic core. This design
develops a higher Q and provides better filtering than two single
RF chokes.
4.9.3.3

Full Wave Bridge Rectifier and Local +15 Volt Supply

The full wave bridge rectifier CRI thru CR4 converts the line ac voltage to dc. Capacitor C23 provides filtering and storage of the rectified dc. The cathode of C23 defines the primary circuit common rereturn. Note that the rectifier is returned to the primary circuit
common return and NOT to signal ground. Fuse Fl protects the bridge
diodes in the event of a component failure in the primary circuit.
The output is applied to both the local +15 volt supply and to power
switch Ql.
The local +15 volt cireuit furnishes power to the primary circuit.
Zener diode VRI and resistors R12, R13 and R14 provide a reference
voltage that is compared to a sampled voltage by transistor Q5. The
error signal developed is used to control transistor Q6, the seriespass element, to produce the desired regulation.
4.9.3.4

Power Switch and Switching Regulator Amplifier

Power transistor Ql, the power switch, is controlled by Type 723
switching regulator amplifier Ul, thru a chain of power-boosting transistors. The switching signal generated within Ul at approximately
20 kHz turns the power switch on and off. Regulation is affected by
modifying the duty cycle of the switch in response to feedback signals
from the +5 volt output. Low output voltage results in increasing
"on" time: with high output voltage causing a reduction in "on" time.
Modifying the duty cycle raises or lowers the average voltage delivered to the inverter.
The output of Ul is boosted by transistor Q7 to drive complementary
Darlington stage Q3. Q3 in turn drives Darlington-connected Q2, the
immediate driver stage for power switch Ql. The 20 kHz chopped dc
output from the switch is applied to an LC filter for smoothing. The
switch output signal is fed back to pin 4 of Ul via inductor L2 and
resistors R27 and R17 to maintain self-oscillation. To overcome the
effect of charge storage, reverse emitter-base bias is injected into
the power switch from a secondary winding on L2. The reverse bias
signal is applied via a network of resistors R2, R3 and R5, capacitor
C5, and diode CR5. The phasing of the secondary of L2 causes a pulse
of turn-off bias to be applied to both Ql and Q2 at the termination of
the switch ~on" period. Turnoff of the switch becomes regenerative,
and is greatly accelerated.
4.9.3.5

LC Smoothing Filter and Spike Catcher

The regulated pulsed dc is applied to a filter network made up of inductor L2 and capacitor ClOG Diode CR6 maintains output current flow
during switch "off" periods by providing a current path to discharge
the energy stored in the magnetic field of the inductor during "on"
Rev C (3/80)

4-53

periods. CR6 is reverse-biased when the power switch is "on" to prevent upsetting dc conditions. The smoothed and regulated dc output of
the filter is applied to the inverter via a "spike catcher" network.
This network consists of diode CRIO, resistors R29 and R4B, and capacitor Cll. The purpose of this circuit is to suppress large current
spikes that can be generated when conduction of the two inverter transistors overlaps. This is not a common occurrence, but can happen
during start-up or during recovery from an overload condition. This
suppression not only reduces RFI radiation, but also protects the
inverter transistors and the power switch transistor. Diode CRIO is
polarized to damp production of counter emf should transients occur in
the inverter.
4.9.3.6

The Inverter

The smoothed dc input is chopped at 20 kHz by the two power transistors QIO and Qll conducting alternately. They feed current to the two
halves of the primary winding 1-2-3 of the nonsaturating output
transformer Tl in opposite directions. Supporting circuitry consists ,
of a saturating transformer T2, diodes CRll thru CRlS, resistors R29
thru R32, and capacitor C12. The transformer is a self-excited type.
4.9.3.7

DC Output Circuits

Each dc output has its own full-wave center-tapped rectifier and low
pass filter.
In addition, high-frequency ripple (mostly 40 kHz) is
filtered out of the +/-IS volt outputs by capacitors C32 and C33. The
rectifier for the +lS volt supply is made up of transformer T6, diodes
CR17 and CR22, and capacitors C3S and C3B.
Inductor L4 and capacitor
CIB provide filtering. The -IS volt supply uses transformer TS, diodes CRIB and CR21, and capacitors C36 and C37. Filtering is provided
by inductor L6 and capacitor C20. The +S volt supply uses transformer
T4, diodes CR19 and CR20, and capacitors C39 and C43. Filtering is
provided by LS and capacitors C19 and C2S. RS4 is the +S volt bleeder
resistor. Filter capacitors C32 and C33 are discharged when required
by bleeder resistor RSI.

4.9.3.B

+S Volt Error Amplifier

The +S volt output is sampled by voltage divider resistors R43 and
R44, and applied to the noninverting input of Type 723 voltage regulator U2 via resistor R41. The adjustable reference voltage is derived from potentiometer R40 and applied to the inverting input of the
voltage regulator via resistors R39 and R3B. The two voltages are
compared within U2 and the difference is applied to the optoisolator
U3. Only the +S volt output is adjustable and regulated. The close
electromagnetic coupling in the transformer secondary of Tl makes it
possible to control all output voltages by controlling anyone.
4.9.3.9

Current Limiting and Overvoltage Protection

The optoisolator U3 consists of a solid-state lamp and a phototransistor. The output of the error amplifier is applied to the lamp, illuminating it in proportion to the error. The optical energy is read
by the phototransistor, which has no electrical connection to its
4-S4

Rev C (3/BO)

base.
The output of the phototransistor is fed back thru resistor
R33 to the switching regulator amplifier Ul where the signal is used
to modify the duty cycle of the power switch, and thereby r~gulating
the voltage. Since there is no direct electrical connection thru this
device, and the phototransistor output is returned to the primary
circuit common return, the output circuit is effectively isolated from
the primary.
Current flow in each output passes thru a toroidal transformer where
it is monitored and fed back to the switching regulator transformer
to modify the switch duty cycle. Resistor R58 is connected across a
winding of transformer T4 in the +5 volt circuit. Current thru the
transformer develops a voltage drop across the resistor. Transistors
Q14 and Ql5 sense and amplify the voltage drop.
In the -15 volt supply, resistor R59 is across the winding of T5, and transistors Q16 and
Q17 are the sense amplifiers.
In the +15 volt output circuit, the
elements are transformer T6, resistor R60, and transistors Q18 and
Q19. The collectors of all the transistors are connected to the base
of transistor Q13 thru resistor R70. Q13 amplifies the error signal,
which can originate in any of the outputs, and applies it to the
switching regulator amplifier along with the voltage regulation feedback signal. As current increases, the duty cycle of the switch regulator, and of the power switch, is modified to reduce switch "on"
time reducing the average voltage applied to the inverter which limits
current thru the inverter transformer. A shorted output will reduce
current to a very low level which can be tolerated indefinitely.
Overvoltage protection is provided primarily to protect the loads in
the event of failure of the regulating circuit. Silicon controlled
rectifier SCRI is connected across the +15 volt output. The gate of
SCRI monitors the +5 volt output thru zener diode VR2 which has a 5.6
volt breakdown rating.
If the +5 volt supply exceeds the zener's
breakdown voltage VR2 conducts, placing a direct short across the +15
volt output.
In effect, this "crowbars" all outputs because of the
close coupling of the inverter transformer secondary. To protect
the power supply, the current limiting circuit takes over, reducing
the power switch output to a safe level. Once fired, the SCR will
continue conducting until power is turned off. When the condition
causing the overvoltage condition is corrected and power applied the
protect circuit is automatically restored to normal.
4.9.4

AC

Internal Power Supply Assy, U, #301155-XX

.......- - - - - . - - +5V

-i-+-....,

.:1
W

2:,
0:

1-+.....--+-- +15V

~I

U>

zl



INVERTINGo-_ _
INPUT

Vee+

Vee+
N.N

INVERTING
'NPUT
NON-

INVERTING
INPUT
OUTPUT

OFFSET
NULL

••

OUTPUT

.--.,_--{

·OFFSET .._-====~~::t_.....- ......-+--<'-.....----4- 'cc-

N'

O~JT~~====~~j-~-+-~~~-~--~~v~N2

0:a~

TO OTHER

HUU/COMP
COM.ON(NI)

COMPONENT VALUES SHOWN ARE NOMINAL

AMPUFIER

DUAL HIGH PERFORMANCE OP-AMPL.

747CI SN72747N

HIGH PERFORMANCE OP-AMPL

10165

7481 SN72748

10166

INPUT

,r______
COMP

V.!P(-I

V.IFe+)

Vee

OUTPUT
RANGE

GND

V,.

OUTPUT

AS

JA~

______~,

A7

A6

AS

'I..A_I____
A2---.

vr_A_3_ _ _AJ4,

IA

Ie

18

28

2A

2C

GND

INPUT

..,.=....J
O-A CONVERTER

QUAD 2-INPUT ~ GATE

1408L-61 MC1408L-6

13060

7400/DM7400N/SN7400N

Vee

4Y

4B

4A

3Y

3B

3A

Vee

+IN
SA

IY

IA

18

2Y

2A

2B

GND

IA
+IN

IY
-OUT

10134

-OUT
6Y

+IN
!5A

-OUT
!5Y

+IN
4A

2A
+IN

2Y
-OUT

3A
+IN

3Y
-OUT

-OUT
4Y

GND

SCHEMATIC (each inverter)

,---.,----1--0 Vee

A

o-_ _J
Y OUTPUT

INPUT

OUTPUT Y

A

L--_ _ _ _.-..__-o aND

'----<1>---0

QUADRUPLE 2-INPUTPOSITIVE NOR .GATES

7402 1 SN7402

GND

HEX INVERTER

10135

74041 DM7404N 1 SN7404N

10136

+IN
6A

-OUT
6Y

+IN
5A

-OUT
5Y

+IN
4A

IY
-OUT

2A
+IN

2Y
-OUT

3A
+IN

3Y
-OUT

Vee

IA
+IN

-OUT
4Y

Vee

49

4A

4Y

39

3A

3Y

GND

IA

IB

IY

2A

2B

2Y

GND

SCHEMATICS(each ga'el

Vee

SCHEMATIC (each inverter)
Vee
OUTPUT

Y

INPUT

A

A

Y

L-----iI----4>--......_e--o GND
NOTE; Component Vllu •• shown ar, nominal.

HEX INVERTER-OPEN COLLECTOR

QUAD 2-INPUT AND GATE

7406/SN7406N

10460

Vee

IA

IY

3C

3B

3A

3Y

IB

IC

2A

29

2C

2Y

GND

74081 DM7408N 1 SN7408N

10119

Vee

GND

, - - -.....-

.....----;P--o

Yo.

OUTPUT

INPUTS {

TRIPLE 3-INPUT POSITIVE AND GATE

TRIPLE 3-INPUT NAND GATE

74101 DM7410 1 SN7410N

0--1--+.....

10133

74111 N7411

10301

+I!5V

NC

Vee

OFFSET
NULL

OUTPUT

OFFSET
NULL

-INPUT +INPUT

VEl
-15V

4B

4A

IA

IB

IY

SCHEMATI.C ' ••ch

20

IA

IB

2B

2C

IC

10

2A

OUTPUT
2E

IE

GNO

OUTPUT

DUAL 4-INPUT NAND GATE

OP-AMP. HIGH SLEW
1741 I MCI741SCPI

Vee

Vee

10167

2A

7420/DM7420N/SN7420N

10125

3B

3A

3Y

Vee

4B

4A

4Y

3B

3A

3Y

2B

2Y

GNO

IA

IB

IV

2A

28

2Y

GNO

9.,.1

SCHEMATIC ( ..ell 1.1.)

v"

,---.,....-----ovcc

INPUTS

..,--~

OUTPUTY

'-----........
COMPONENT VAL.UES 'HaWN AilE NOMINAL

QUAD 2-INPUT

~

L+----_-+--~-~H.

GATE

:t 15V HI- VOLTAGE INTERFACE -OPEN COLLECTOR
74261 SN7426N
10120

QUAD 2-INPUT QB. GATE
74321 SN7432N

10302

INPUTS

9

Vee

.
o

DO NOT

OUTPUTS

CONNECT

,....---JI.----

A

2

4

y

8

7

Vee

6,

GND

IA

IB

2A

28

'C

,y

2Y

GND

OUTPUT

~

10

2C

20

OUTPUT

OUTPUTS
BCD INPUT

D C

o
o
o

DECIMAL. OUTPUT

••
o

0

I

Z

,

I
0

I
I

I
I

•••

I

7

SCHEMATIC (loch 90tl1

••

0
0 0

0
I

0
I

I

0
I

I

I
I

0 I
I 0

I

I

I

I

I

0 0
0 I
I 0
I I

I

I

I

I

I

I

I

I

I

I

0 I
I 0
I I

I

I

I

I

I

0

I

I
I

0

0

0
0

0
0

I
I

0

I

0

I

I

0

I
I
I
I

I

I
I

I
I
I

I
I

I
I

I
I

I
I

I
I

I

I

I

I

I

I

I
I

I

I

I

I

I

I

I

I

0
I
I
I

I

I

I

I

I

I

I

I

o

0 0
0 I

I

I

I

I

I

I

I

I

0
I

0

I

0

I

I

I

I

I

I

I

I

I

I

0

I

I

I

I

I

I

I

I

I

I

I

I

I

o

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

, , ,,

I

I

,

I

I

0
0 I
0
I I

I

I

I

I

DECIMAL DECODER

I

I

I

I

I

I

I

I

,.......---_---_---~-OVcc

'--------<~_o GND

DUAL 2-WIDE, 2-INPUT AND-OR-INVERT GATE

(4-TO-IO/8CD- TO- DECIMAL)

74421 SN7442N
7442A

A

e

10146
10406

0

E

OUTPUT Y

INPUTS {:

Ne

7451 1 SN7451 N

10280

GNO

v"

•

INPUTS

L

H

D

CLOCK:G-----+++,---.

INPUTS

8N7:~54g:L.Y{~
SET

L

6H~N;~~~; +:::~~SE"';:~~DT:; ;::~E ~~T:~i.

•

II

- -

H L

- -

H* H*

-H

I

L

H

H L

I

L

L

H

H

L

-

Q.

Q.

= NON -

o =

GND

TABLE
Q
0

H H
H

THIS DUAL TYPE 0 FUP-FLQP TRIGGERS ON THE
POSITIVE EDGE OF THE CLOCk INPUT. DURING

:INPUTS

L

H H

..J"'::===::::J
LOGIC DIAGRAM
1/2 OF DEVICE SHOWN

STABLE

LEVELS BEFORE INPUTS

ESTABLISHED

DUAL D-C FLIP FLOP

4-WIDE-2-INPUT AND-OR-INVERT GATES

7453/SN745'3N

TRUTH
R
C

H L

E
F

INPUTS~

S

10192

74741 DM7474N 1 SN7474N

10139

CLEAR
Vee

PARALLE~
Th." 4·bit regist." IQture par.II.1 inputs, p.r.II.1 outputs,
a".niding el.... T ..... tgishlrs hue twa moollS of aper.tion:

Joi serl.,

C

PARALLEL LATCH_________
OUTPUTS \
r-______

DATA
INPUT

ENABLE

E

-JA~

D

INPUTS

.•

TRUTH TABLE

•

Shift I In direetla" QA toward 00 I

E

AI

L

OUTPUTS AT ' ..+1

OA
OA.

O.

O.

0••

L

L

0 ••

L

aAn

"

L

L

L

L

L

00

00

0 ••

0 ••

0 ••

0 ••

i Cn
ile.

0 ••

0 ••

0 ••

aCn

0. .

0 ••

0 ••

Ii••

L

0'

. •.
L

00-,

L

L

0 .., 0 ...
0 ..., L
0..-.
0 ...,

"

ell-I
G'I-!

O.

D.

L
L
L
L .

L
L

L

L

L

L

O.

_.

......

0'
L
L
L

......T11UX

.-."

L

H H H
HLHHHH

L

....
..... -----------,1
__

L

L

L

O.
L

"

H
""• "•"
"
" ~ "
"
L

TIitUTH TAILE

O.
L
L

L

Shilti!!!, i, accomplished synch.onausly wh.n the shift/load control input is high. Slll'1.1 dati lor this mode Is .n..... at
ttle J·K inpuII.The. inputs p.rmit the 'im . . . to perform as. J.'K, D·. or T·Wpe flip-flap as Ihown in the truth tabla.

.

PRE89T OUTPUT STATES

Ao Al

P....II.I 1000ding is .ccomplish.d by .pplying the four bits of d.u and taking the shift/load control input low. Th. data
i,loaded into the _od• • flip·flap .nd appe.rs.t the outputs .Itar the pOlilift tr.",itian of m. clock input. Ou.ing
loading, ...ial cQt. flow is inhibi• .

, •
"
" "
"

04

Q5

inputs,. shift/laed contral input•• nd I dir.ct

P....II.II BroIId.idel LOIId

INPUTS AT t ..

06

Q7

~I""

II

1

'-''''"

GN-I H

H - high I_I. L - law I_I
NOTES:· A. In • bit tim. bafare clock pul.
B. tn.'" bit timaafta. dock pul.
C. OAn -Itata of QA.t tn

4 BIT PARALLEL- ACCESS SHIFT REGISTERS

74195 1 SN74195

,

O~UTS

Q.

Vee

Q.

Q.

8-BIT ADDRESSABLE LATCH

10191

Q.

CLOCK

WORD
SELECT

CK

ws

Qo

742591 MSI93341 SN74259N

10339

DATA
INPUT
CI

~----~~--~----";vr----~----~~--~~
DATA INPUTS
AI (5)

FUNCTION TABLE
INPUTS
WORD
SELECT CLOCK

L
H
X

H

., "

G. G. GC

• .,

'.

:~~(W~'[>~____~~

OUTPUTS

02 b2

.2.>:(2"-'--+--LlJD

On

dI
c2 d2

QAOQaOQCoQoo

H_hllh 1• .,..1 ','.od, Ita'.)
L-Iow ,."., (s,.odJ .fat.1
X""NI."anICanJ Inpu'. Incl"dl"l l,a ..,llIaM)
..... "an.ltlon from 11111'1 to law 1.".1
al,02 ••'c.'''"III''IIO'lItlodJ"statltnput
at AI, A2., etc.
QAo. e80••tc. =thl Ilv.1 of Q.... QII' ltc,

=:;t~o:n o~":':::~'i!=.~

81 (41

.

82 (I)

.,

DI ".""---------l~
a»c.l(l~nL_

__________~~~==~~~..J

-+ ~:n:~~ I~:!I

actl,CltId IIJ a tran,1t on 'rom 0 111,1'1 '1ft'

HEX TRI-STATE BUSS DRIVERS

QUAD 2-INPUT MULTIPLEXER WITH STORAGE

742981 SN74298N

10196

743671 SN74367N

10197

IN-4

OUT-4

IN-5

OUT-5

IN-6

OUT-6

DISABLE

GND

8
INPUT
SCHEMATIC

V"

256 BIT BIPOLAR RAM (256XI RAM)(82SI6 TRI-STATE)

8216/82S16

42339

HEX UNIFIED BUS RECIEVER

8837/DM8837N

10198

(SEE 747CIIOl65 FACTORY SELECTED)

TRUTH

CUi CK

J

TABLE
Q
K

~

L

- - -

L

H

H

n

L

L

Q.

Qo

H

n

H

L

H

L

H

n

L

H

L

H

H

n

H

H

TOGGLE

o = LEVELS BEFORE INPUTS
ESTABLISHED

DUAL JK FLIP FLOP

DUAL OP-AMP. LOW OFFSET

72747

13072

74107/DM74107N/SN74107N

10305

__

SELECT
INPUT
A

______

OUTPUTS

------~A~

.

OUTPUTS

~

DATA v INPUTS

OUT;UTS
truth tables (H=high level, L"'"low level, X-Imlevant)

. · ."
•" ·
·
INPUTS

2 LINE TO'" LINE DECOADEA OR 1 LINE TO-4-LINE DEMULTIPLEXER

,.

SELECT STROBE DATA

x
L
L

L

L
L
L
L
X

L

X

OUTPUTS

,YO ,Y, ,.0

··• ·•• ••" ·· •••
· ·• ·• ·· ··
L

L

L

L

L

SELECT STROSE DATA
II
X
L
L
L
L
L
L
L
L
L
L
L
L

x

x

OUTPUTS

,. .,.

·· "
•• ·
·
x

...

· ·· ...
· ·· ·

.
.

INPUTS

'n

,Y,

• •"
"
• "
•
"
• •"
L

L

L

L

DUAL 2-LINE TO 4 LINE DECODER I DEMULTIPLEXER

741551 SN74155N

~

DATA

10

WRITE

~
DATA

..

...
L

••
L

L

L

H

L

H

L

L

H

H

L

x-

X

H

ac!

D I """D I- •
,-D 0,
0,
,_D "
"0,.
" "
" ,-D "
0,
" " .-D

" '. x-'. "

GND

CLEAR
IN

OUTPUTS

L

-.
L

'.

L

H

L

Will

H

L

L

W281

L

01

01

02

02

03

03

eND

....•• _••. .'84""8.••
....""' ........ ....-

READ FUNCTION' TABL.E (In NOTEI
READ INPUTS

-I

10335

20

~

~

WRITE FUNCTION TABLE (SEE NOTES It. 'I

WRITE INPUTS
Ow

10

READ

READ SELECT

74161/9316PC 1 N74161F ISN74161N

OUTPUTS
~

ENABLE

V.e

SYNCHRONOUS 4 - BIT COUNTER

10194

A.. D)

OUTPI.ITI

'0

""'

H

H

L

. .II

x

X

H

H

Wl12

WIIS

H

H

H

NOTES: A. ... high .... ,. L- low "vII,
irrelen"t
B. Ia-DI • TN four SIII,ct«f internal flip-flop Olltputs will -.aJ1M "" stat. applied to tM fOllr lx_I ~ Inputs.
C. Qn • No chantI.
D. WOB1 - TN first bit of ~ 0, Itc.

4X4 REGISTER FILES

74170 1 SN74170

HEX. D FLIP FLOP WITH CLEAR

OPEN COLLECTOR OUTPUT

10195

741741 74174PC 1 SN74174N

10336

A4

0

0

a

I

0

0

0

I

i

0

I

I

0

I

GNO

81

AI

EI

E3

It r! '

I

co

C4

E4

84

Vee

48

4A

4C

38

3A

3C

IA

18

IC

2A

28

2C

GND

It'

o

0 0

I

I

0

I

0

,

I

0

I

I

0

0

0

r

r I

I

01.0101000
I

0

I

0

.&
I
I

0

I

0

.'

I

QUAD 2-INPUT EXCLUSIVE-OR GATES

4 BIT BINARY FULL ADDER

7483/N7483B/DM7483N/SN7483A-N

DATA
INPUT

, SELEC\ INPUT,

Vee

b

BCD

SELECT
INPUT
A

DATA
INPUT

4

4

3

DATA
INPUT

SENSE
OUTPUT

,MEM• • WRITE,

1~1~

ot~~t~

ENABLE

l

I

(ME)

SENSE
OUTPUT

10140

(WE)

2

7486/N7486N/DM7486N/SN7486N

10303

SENSE
OUTPUT

3

GND

2

FUNCTION TABLE
ME

WE

L

L

Write

OPERATION

CONDITION OF OUTPUTS

Complement of Data Inputs

L

H

Read

Complement of Selected Word

H

L

Inhibit Stprage

Complement of Data Inputs

H

H

00 Nothing

High

QUAD P-CHANNEL FET PACKAGE

64 BIT READ/WRITE MEMORY (RAM)

7489/SN7489N

10193

8041/ ITS7478/2170C,J002

10190

Vee

28

2A

2Y

IA

18

IY

GND

10239

lOOOA:!:2% RESISTOR NETWORK

Ne

J:i!.IiQ DRIVER
75452/LM75452/SN754528P

He

DUAL PERIPHERAL POS.

10306

Me

Ne

13010

16 DIODE ARRAY

Ne

Ne

PAIRED CLOSE TOLERANCE (:I: .0015%)
RESISTOR NETWORK .10 KA

13044

AND

NAND

OR

:D-C

::Q-C

:V-

ABC

ABC

ABC

ABC

ABC

A

B

HLL
LHL
LLL
HHH

LHH
HLH
HHL
LLH

HLH
LHH
HHH
LLL

HLL
LHL
HHL
LLH

HL H
LHH
HHL
LLL

H

L
H

ALO-B

APB

1

::[>--c

NOR
C

EXCLUSIVE OR

:~D-C A-{>o--B

:=[>-C

:=D-c :=D-c

L

A~B

ABC

ABC

ABC

A

B

A

B

A

B

HLL
LHL
LLL
HHH

LHH
HLH
HHL
LLH

HLL
LHL
HHL
LLH

H L
L H

H
L

L
H

L
H

H
L

-J

J-K
FLIP FLOP

CK

.

t

L
H

Qt--

--< ~CLK
I(
6t--

-

-

O-C

FLIP FLOP

!
DPQ

K

P

C

C

Q

L H H
H L L
H H H
H H H L
H

H

H

'R-S

FLIP FLOP
B

-

C

Q I--

y
Q

D

C

-- --H I-

L (SET)
H (RES.)
L

H

L

TOGGLE

S

p

C

Q

L

H

L
H

H

H
L

L

L

H
H

H
H

L
H* H*
L
H
L H

B

Q

Q

H L

L

H

L

H
L
L

I

* = NON- STABLE

A

~

i)CLI<

Y

-- -- --t "-H L

lUl

!P

~0
r::><~
- I
-

A

Q
\

Q
1

H

H

L

H

H

H

H
H

,

.'

12

11

7

10

DIAGRAM
ZONE
COORDINATES

COMPONENT
IDENTIFIERandPCB
LOCATION CODE

J

DEVICE
TYPE NO.

SPECIA:)
VOLTAGE
_ _-......C_ONNECTION
COMMON
VOLTAGE
CONNECTIONS

INTERFACE
CONNECTOR

J

TWISTED
PAIR
SHIELDED

J23
TPI

o

H

J3-21~----------+-----~-------;
PI/J '30

SLIP-ON PCB
CONNECTORS

+

1

CIRCUIT
CONTINUED
FROM PAGE
INDICATED

JI
3

~~~~____________________________________________-~X~YZ~~ P~~

Q

-------_~I

,,

:,
PLUG TYPE
PCB
CONNECTOR

I

C20

4

ALTERNATE
PCB EDGE
CONNECTORS

H30

,
i
'. }

J.

CIRCUIT
CONTINUED ON
PAGE INDICATED

.OjJH

+

~
+
.01
6 .•C~~ I.
I*
35V ":"
":-

es l e7,

TEST
POINT

C9, CII,
E20,HI6

IDENTICAL
COMPONENTS
MULTIPLE
PCB LOCATIONS

J~_~*

OUTPUT
IC PIN NO.

OPTIONAL-FOR CLARITY
r W H E N NEEDED

7-16

~~~q

+DATA

STROBE

SH~3-FL2-DL~:::~: :;F:~:'~:R
DESIGNATOR

SPECIAL
CIRCUIT
GROUND

DRAWING ZONE WHERi:

SIGNAL POLARITY
INDICATES ACTIVE
LEVEL

DESTINATION SYMBOL 15

LOCATED (INCLUDED ONLY
IF DRAWING IS ZONED)
SHEET NUMBER

SHI-A6-GIO-5

•

+OATA STROBE

o
FIG. 7-0

DRIVE PCB ASSEMBLY, STO
DIAGRAM
PAGE NO.
WHERE APPL

# 44055-XX Rev A

C2

LTERNATE
DIAGRAM TITLE
SCHEMES

(P031l

Diablo Systems Incorporated

Figure 7-0
Logic Drawin~ Notation

AS;:;Y

DRIVE

POWER DISTRIBUTION CHART
CARD LOCATION
VOLTAGE

A

JI

B

SIGNAL
GROUND

C

1/0 J7
I
o
3

,:7t-_r+__
7 t--_r--lr-+.!!III~B:::B",ON"-,-F.::E",ED::....::X,,,2----------------------_+~~3t_++__

lIE

331-__

1--+--f-..!H~AM~M~E~R'-!:cot~L~X~6~----------------------I4.~0:!l---++--

12

23
10
2B

_ RIBBON LIFT

8
14
38

'Ii'

1

13t---t--+--t-':R:=IB:=B:::ON=-=S:::E::NS":'0II"':'O=R":'V':'E=-------------------+-~6T_++__

22~+--t--_t~EN~O~OF~R~I.~B~ON~S"'ENSO==~ft------------------_;~~8T_++__

L.:-~SE:::IIVO=..!D~ISA=B:=LE=!
4el---<
461--

8 II:
CAitSERVOERROR ZO

~

ii:

HOLD

CAR. FACILITIES

10t--+--I---+..!RI!!!B::!B~0:!!N~F:!E::E::.O.!:X::!:4------------------------I4.r~._--H~ ~ 36t--+__t---+..:.HAM=:.::M=ER.:....::C::0I:::L...:X~5'--_____________________;~!Ji:I"t.--H__

C
a.. I
.t
v..
oJ 0
~
~
III
" r~
III II)
IDO
I I l.:r IMPRESSION CONTROL,... I
:z:
---t-irt4;<;11+"':I"'M=PR:=ES===SI:::0~N"":CO""'NT=R-"0"'L='#':":2-;49..
U

PW MaroR

"---.

C

---t-ir+.rc;!E+--""===-""===-"-~41

4
18
17
8

54J-~~~_r--~P=W~M~aro~~R=-__--------------------o-_+~~~t__r+__
20t-~r__r--~R~IB~BO~N~L~IFT~C~0~IL~--------------------_+~~5f_~+__

~

36

_

::-1
33

PW SERVO ENABLE II

SI;
I ••
DNOr--HlIlu,,:,Ir-+-IDRAY-+"T ,......i.o'
RED
T7

~ --J;
~ ~ ~ ---'

PAPER FEEo,;!> I

~~

~

PAPER FEED#2

~8

32

II::

el

C .,.

34~__-
G:

2B~~----------------------------------+-~~~~~~~~~------.S~IG:~~:~:;~rt~2r:~t~~

ILl

U)

56 h
55

GN~

+ REV/FWD PW MOTOR

_

II

r

16
17

". LW- SE.:.V: N:~. ;O:':~-RO"RI:B=O"N- -,: 5 ~ ~h= =t= =~= =~=~ Et~j;~ ~ ~:;~:'j ~'~ ;~i=C~ I~i=TO=R= = = = = = = = =r =: ~ ~ ~ ~ ~= ~ ~t :
50

I
2

KE~'MPRESSION

0..

CONTROL

I

49

~~

CAR. FACILITIES

r
+ RIBBON FEED X4
1
10 1--+--+---i--=~~~-!:.!~2!...--------------__c>HS>,.:rl-_14-

1--+--+---i--=+~H~AM~ME~R!.COt~L=--~X5;!....--------------__c>H~14:;_\__14-J

::
I3

~~--+-_4....:!+::...!!HA~M~M~E:!:R~C::.:0""L:...,-"'X6~--------------_Ill~*':~::1--4+-

1--4--+-_+.-..::!+!:.!.!R!!!IB!!!B!l!ON!!...:'S~E~N~SOR~~D~R~IV:sE'-------------iII~!>;;6;f--++-

~..!+:!!IM!!.!PRESS~22!IO!!!N~CON~T~R~OL~£2__1_t4B C(~ 2214-+--+---il~_+~..!:E~N~D~0~F:_R~I;B:B~0;N~i""S~E:!;N~S-0~R~-:..-:..-:..~~+:c,c::5c::D----.~==j~~·~a~t=j=t=

\,-____+-H;3....

~

ID
(.)

~§ ::~

J3

L -__________

-I~"I280

0
0..
9

~

0..

., 1...__.::
...:...:.:;P.::W...;S~E:!:R'-!VO~E"NA~B~L=E'____i 18

"..

8

~
/!ix

:~I_T4

~~~RFEED#I

ILl ~

30 ---,
31 ~. T6
32
__

VEL

~)(:e.,'
C) )-

a::l
G: ID

+PFB

J

::

14
+ POWER ON
C( en
~14-''':''''.!-'''='-''''--------i 16

~

=1. TLT-7-H~r:-"':::"'D--I-+-

0..

33

47
48

----.

I

T~

R H (NORMAL)
2 PAPER FEED MOTOR

:~ER
K

FEE

#

D

"'lBI>15--1_a~W~E,

3:~-----..!+~P~F~A~--------------------------------------------------------------------------------____________~+~P=FA=----------;~44 ~~ ~5

~

}

32~~~T~LE~D~RE~T~U~R~NL-------------------.------------------------------------------~~'+-_4~-

>-

U)
U)

7

+

0

RETURN

30~-----..!+~R~I~B~.'~B~------------------------------------------------------------------------~ 12

10
28

M

01

P
R
' - JI
\,IIRE SIDE

+~DDRL,-VE----~L----.l.----~--~L----L----~--~-----L----L----.l.-----L----J~J2

31

TI2
TI3

- RIB. HOLD

49,50

J 0
LON

DRIVE

N

10

Til

23

59-~

21
23-29

-15VD

p:f!..JI(j\

~

37

4,9

G: >,<

~!!O

23,24

4!S.4G

~O
C ,..-:'3 I+MAMMER ENERGY CONTROL

PW LIN Pas SlG

23,24

H,E

+15VD

~(;:'~2: ":o. ~ ~ :~ ~T:~:~: : [:N: ~: :~:SI: '~ ~ ~ : ~l

(
I

R6
.--

~~

25

25~--'+~C~AR~.2H~0~M!!!E'----------------------------------------------------------------------------~26
56
- PW POS A
39
18
+ PW EVEN
45

II

23
31
54
20
22
21

- WRITE
SYSTEM CLOCK
- SELECT PRINTER
- PW BUSY
- PF BUSY
-CAR.BUSY

E
32
~

3
12
5

VOLTAGE

_~

)CAR. MOTOR

RED

Figure 7-1b
Motherboard PCB Assy, 8080

#40614-04

Rev

H

Figure

7-lb

Motherboard PCB Assy, 8080
#40614-04
Rev H

REVISION HISTORY:
REV. ECO#

ETCH

A
B

9853
9877

01
01

C

9911

01

D

Al028

01

E
F
G

A1290
A327l
BlO.5l

01
01
01

Gl Bl147
H B1362

01
01

CONFIGURATION
As released, with B/M.
-xx to -02 configuration. Cut traces and add
twisted pair wires, and add jumper from C8 to D8 to
facilitate noise fixes.
-02 to -03 configuration. Revise assembly and B/M
for lowered Motherboard installation.
-03 to -04 configuration. Delete twisted pair wires
and trace cuts used with #24295-XX PCB.
Delete "FF2Tp l , "FF3Tp l , and IFF4TP" from schematic.
Chg to correct documentation.
Bend connector tabs 45 0 to facilitate installation
and reduce breakage.
Correct documentation error.
Hardware change only.

SOLID STATE COMPONENTS USED:
(No solid state components listed)

Figure

7-lc

Motherboard PCB Assy, Systems
#46080-01
Rev C

REVISION HISTORY:
REV. ECO#
A
B

C

A1759
A1869
A3603

ETCH
01
01
01

CONFIGURATION
Ai:> released.
Correct part number callout on B/M.
To clarify production instructions.

SOLID STATE COMPONENTS USED:
(No solid state

compon~nts

listed)

4

~+5V

L-~TYPI9PLS

r

l°..r--'\_B
. - - - - - - .FF--!'s~9JI
E49

390 ':"

-21;(~(Jr-:~=EI61f--....!..!!.
PW..:::.:..:,:
STR::::<::",OBE---,3'O'~IC6j)A~_--'-+----"i;~15

5r.::::::1 -CAR. STROBE

~ =

J7-19tf».
='

~

STROBE

J

5~6

I

6.----..

C45

~

~

.§.~tc

T7

'7fi>"~~

13~_12
-

2K

E40

READY GATES

±.J.i.IKyQ~ ~

LINE RECEIVERS

J7-17~

~

I

+5V

9_l~~~

~...-!-+--+-R~K

~ro~

2..-----..

~ E49 ~

I~

~

~~~~~K~~~12iJ~====~

~

: STATUS
-GATE CMD

~

...Ji

F FF

.,

G2
GI

113

Figure 7-2a
Logic #1 PCB Assy, Standard
#40505-09
Rev B

Figure

7-2a

Logic #1 PCB Assy, Std ESD
#40505~09
Rev B

SOLID STATE COMPONENTS USED:
IC's

REVISION HISTORY:
REV. ECO#

ETCH

B

9614
9641

01
01

C

9662

01

D
E
F
G

9690
9701
9734
9762

01
01
02
02

H

9882

02

J

9952

02

Jl Al133

02

J2 A1352

03

K

A1216

04

L

A1372

05

M
N
P
R
A

A3704
A3841
B1244
B1321
B1308

05
05
05
05
05

A

B1450

06

B

B1538

06

A

CONFIGURATION
B/M and Assembly as released.
Schematic as released. Change to 2% resistors for
standardization. Revise B/M.
Change from Mylar to ceramic capacitors for standardization. Revise B/M.
Correct error, E2S-14 and E25-15 reversed.
Correct error, H50 and H51 reversed.
Allow use of either -01 or -02 PCB etch. Revise B/M.
Delete capacitor H28 to speed up RESTORE strobe.
Change B/M.
Change to low power Schottky TTL devices to reduce
+5 volt current demand, and lower power dissipation.
Revise B/M.
Change G13 from 74LS04 to 7404 device to avoid
marginal TTL load distr~bution. Revise B/M.
Delete use of low power Schottky devices at B25,
E13, E61, E73 and G25. Change B/M.
Allow use of -03 etch in -05/-06 assembly (new
layout). Added two 470pF capacitors.
-xx to -04 configuration. Revise strobe input
digital filter circuit, ribbon lift logic, increment/
decrement logic, and remove diodes on input circuits.
-04 to -07 configuration. Add noise immunity filter
capacitors to transducer input lines, and increase
time-out for Ribbon Lift FF. Revise B/M.
Documentation change only.
Documentation change only.
Capacitor H28 deleted.
Reverse polarity of capacitors H33 and H37.
Rework -07 to -08 configuration to incorporate ESD
modifications.
Release -09 configuration, -06 Etch. Relayout to
incorporate -08 ESD changes.
Documentation changes ,only.

74LS221
74LS74
74LS367
7451
7486
74LS170
8837
7408
74LS42
7426
74LS174
7432
74LSI07
7404
75452
7400
Resistor Pack

Diodes
Transistors

H49
A13,C13,C25,D13,D25,G61,H61
A37,E37,F37
B13
B25
B37,C37,D37
C49,C61,C73,H25
E13,G25
E49,F49
E61
E25
E73
F61,F73
G13
G37,G45,G49,G69,G73
A25,H73
B49,B61,B73,D49,D73

(No componen~s listed)
(No components listed)

+OA0 3(>--------------------------------------------------------------------------------------------------------_______________________________________________3~~r2~----------------------~~I~S~
+ OA I 12
6 OBI DOII-'S'------------------------+--'-l' 02
QI 10
+OA25

1°082

OOZII

2 03

+ DA 3

13 DB3

D03 14

3 04

II

+ PAPER OUT 30
+ PRINTER READY 42
- END OF RIBBON 10

3 ~~ orgJ
2 A2
as ~ 011 CJ3

O ________-<;jl'.:>.;~:::-.--+-----------------+-------------------------------------------------------------------------------------------------------...:4, BI
,-

~
QD ~
QC

, - - - - - - - - - - - - - - - - . . . . , ' B2

COVEROPEN32C~)_------------~_I_----------------_+------------------------------------------------------------------------------------_1_----------------'---9'01
~
r-------------------------------------------+_----------------~S~C2
7

+5V'

G26 IK

eZl6

RB

~RA

~

.--______'90 WS 74298

002. II
"",14

~

:.:

~

,...
-PORT5 34

(CMO)

I~

~

(LSBYTEf~4

X

~

12

"..

'/'''08

2D~~
~ ~~ li[~~~~'~SS+_-R-ES-ro--RE--F-F---------------------------+_+~----I_~
3
I ir"'
IIF AODR
2 ~1l'
1-

nofc37)B

19~

(MS BYTE) 3V"",,",10

.... k%or

QCI"I3'----~r__+-"19 012

9 01
.--_++_+_+-----:-1

~

~

~

'--- I

~

I

I

I

RB

74LSI70

5 RA

"

eGo

C2

849
,-.! 02 MUX
00 ws 74298
+-+-+_+_
I "9

~

ow

4

DRIVER
8216

r-lH~~f-1_--'7'!DI

9

I WBRAMQ3 1

oor'2~--~~_+~
12 DI3 C25

-----l.2

01 10

:: ViA 825 Q2

7 DII

~ ,--_1_+_1_-------"14.,

84
L--,
I 5 C61 6,.

I D.
•3 03
OA

001

4 DIll
r--------~9tj~~iYI0~:::::::::::::3[fi~)j===~~~===3~~~15'----~r--+~
~.4J9
2 ~7
2 A2
QBI"4'----~r__+.!.j
_,.L.\8i.'ti
+CHECK 38 (}______________________________+ __+_--------------------------------------+_+_----+----------~9~~8.~
12_
10 ~
9
-SELECT PRINTER 20
13 ~ II
037

15r;--

3~2

6 OBI
6(}----------------------------_r--t-----------------------------------~~----------------------------------------_r-----t_r_r--------------------;---~
10 082
IS(}----------------------------_r--t-----------------------------------~~-----------------------------------------t-----t_r_r--------------------1---~
i3
15(}----------------------------_r--t-----------------------------------~~-----------------------------------------t-----t_r_r--------------------1---~ 0B3

-PORTS 28
-PORT7 26
-WRITE 31

~

GR

~

f-'.'------~r_+_I_+------------------_()
'"' 481A·4

C~)_------,;,.-~
r 2"04
I 3 :861
~~4~----------_;==t=============:±QiiE::mll===t=~=====================~==t+=t===:'~a.~K~=:!..----__!--_J_--~
+OATA BIT 2
"404~i404~IO

~R~:~ ~ (}------~1~3~~~,~----------H--+--------------------------------------++------------------------------------------+----H_+_+----------------------+_~

+OA5
+OA6
+OA7

'"'

Q31_'7'---------1"_I_+------------------_() 371A·3

,r_------------------------------------------r_----+_----------~. 02

HI5 IK

SYSTEM CLOCK 54

WA 613
12 WB RAM
4 GW74LSI70

c~~5

.--__________'-1 DI B37
MUX

~

~

::

012 DRIVER
DI3

'"' 41 lA-I

+-------------------~;:v

~
13

I

KC

"::'"

'fa8ut'l'SoV
GNDII2~ 35V .1.
5~
TA -=-

~3

~~
A'MOI..I

L-~------·~H+~------~·1,-----1_'7~~~_r1
2

12=

~;~a2

3

12

~

74L5367

~

+-_____________________________+-----;------+_.++++H+--------~14 LINE ~
.--____-""10 DRIVER 9

1..--.

33/35

~

~~

9

~~JL--

PF

G73

1'" I'

~f--t------+-t-r------------------------------r-=~----i-ri---------------------------r---ri----+-r-~14t+~~~--~----------+_~_+~~~-----------------() 24 -CAR. BUSY

+~~~O

~~

,r___

--~~~---------------------~15~E494

f~----------_t~--------_i----+----~r_----_r----~r__+_+~~~--_r_r_r----,
~

~9J211~9
II clt

1

:.: 22 -PW. BUSY

~~J¥6'------~~--------H-10--10-"H----------------"
~~H9~t5V
m2H 470..11 CLOCK A

BFRBUSY
FF

~---4----~~·l_f++H__+----~----------~+_+_r_rt_t_r------------------_()
'"' 21 -PF

HII

~~.~+----++~~~0~~~B~2~----+------+--~,;,.:m~~~~:~L4~~~===t========~==========~====~~cl~;~8-+~B~F~R~R~E~AD~Y~---2-40~PF~-~.~k~~~I~li3':'~:.~II~~~;E~'~=========!==Jt=jt====tj~~~~~1++~--1J-----t---~9GI3

16 17 '"'
15 19 X
~

17 13 '"'

,...}-________________~+_+_...J1~3 0
1843 C
~

~

I

3~
4

"

I

I

.~.~----+------+--~
E61 .~7_t----t_----_+------+_~

'"'

A

2

t-t_~~------_.--_r--------_.--------------------------------------~---;~6~----~'7~--+_------+_r-f-+-r---r++"l2

GSI r3~--~i
LINE ~
L-+++_--+_f-~'2 DRIVER ~
~--++-r_--H~f-"'I'4 74LS367 1"13'______~

t-~r_------_t--,r---------t--------------.,_----------------------_i:__+-':"~'-----'-iE

12
\I

I
9

7
6
4

~?~
12
\I

10
6
5

BIT5
CAR.
MODE
PW
MODE
P/,"B
RIB.0 B
CAR. CUSP
OPT/OIl CONTROL 3
CHECI(

BIT4
CAR. VEL STROBE
PW VEL STR08E
SERVO DISABLE
PRINTER READY

~ CLR

CIOPER
REGA

r" ~

+5V

~
~H61 H61
IK
3

IK
13

H61
IK
15

H61
IK
4

WORD SELECT
POWER ON

WORD SELECT

'25
'-:: 30
@

~,36
37

~
I~~
13

"-

'I4@
'- 51

POWER ON
15
16
17
Ie
19

7

+5V
H61
IK
10
I
CLR
G49

~E
IA-4
7
WORD 10
01
SEL
IA-3
9
IA-2
4 BI
IA I
AI F49 12
18
6 02
QD 13
~C2
QC 14
5
2 A2 C~: \I

I
J29

15

~~

@

18
18 -.!.6 44
_

_ LOAD DATA

~~~~::::::~~~~~~~~~~c~~~~~~I==t~~~~~~~~~~~~~~~~~~~~~PR~O~GR~A~M~~::::::=:=====I~I~\~~.~Ilr~~=t~~~~~~R/~-~S~TA~~~£~S~"~~:~:~:~7~~~~~---::~:'2:~:!::::==..~11t-rt-1t--------~1--------11 9~B
-i-~TEM SUBCLOCK

~~~~~::

~t>CLK

~

r-! K C Q 2

II K C

Q~6,,-+-,C.;:L~K-_C=+____+---:-i/
/

35;)-.:..P::.OW::;E:;R.:...::.:.:N5-V----------H.-_-_·t~I~13.:~tt:.I:.:~:To~~I-O_-_-_l.~:-,-"1Cl,L-tK-"I)/'"'/,....1
I2\---L

IK

'-=/

9
10 G73

.

49 CLOCK A

L;
\I H7

8

3 H7

CLKA

4

2

G61

L

C61

0

_-

12' ~

~5V
.I

G6

~_:1'

3

(I)

10

e

I...-'~
P

Q

3.

,--!

II
12
QB 13

CLK ENABLE T .'0

I

CLKC
\\
\\

\~

12::1

QA 7
CLR ENABLE P

,

it!

2~

/ 5~H7

CEI
Qe
Q
5 A8
4 :~PROM ~6 fitTg
3 AA45 A38
...

~

AOOR 7 Ts-

A3

H
*

\

69 CD
LOAD
CLK
---l CLR 1013

2

rr~
CLK C

~

ENABLE P
ENABLET,"""

8

~~t++H-'2,
A4
9 \I
A73

QD~I,~':j:=~~:'~1i~2~'
A3
Q
A2

C 13
QB
QA

2

13'®®0

Q5
QQ43

6 A3 C73

--I

4

A21-~~

2 AI

r:-V~
_

G/\/\GI

~2-V;5T,(

G

2

II

CLK C

CL~

LOAD NEW ADDRESS
CLK

lOAD NEW ADDRESS
ClK 8

A

1

13

'-- ~
C49lXl,:..;10+--:..;12~
II

.-===:-1

SEL B
13 SEL A
15

DATAD~I

13 1E73

\I

!.:.I-----

2Y
2YI ~9
2YO .;<.--.

6

F 13

H7

9
10

e
fl3

12

~-4--~1 H7~~2--4--+--~'
2

2

E61
r""'3J......

1

073

p::3~-.:.:R::.ST~{B

CLK A

2Y2rlll'=====::t~~=======::'.--_l_¢~4.
IYOi- 7
1.2.J 073 jlO"6,-o----..;,I~J'"I'9

e C4.~:>9~f_------------_'i'

V

5

PROGRA"iiJi;;;.IIUCTION ~_II ~
DECOOEr-N_E_T~_a_1I_K___+-r~I_3'_UD_7r:-3~.t'r II ~

'-'- DATA CI
'3
WORD SELECT

FI3

~-++--=='----+--=-L~_./

',~

~Y2

2

CLK A

~c

I'

I

G61

.,~'~0!:tI4t:t:~:~::t:=~~~+==·=-----_I.
.. '4 DECOOER
3
:-'-', STROBE G23 ~

STROBE Ie
e
Q
AI
2 7
I-A_O______CQ_E.....

~

5

~3 ~v

G61?

~
4

',::~ r~:: '~

.J

AODR Q8
Irtt-1H-tH:-;:':s;::==~i~~qt=F1f:ffHl~::
15
r::-.
4 A6 PROM Q71.!~,,5+-__+-f-I
~
R~CARRYOUTPUT 7 .~~
A5
Q6 r '4

~5 AB

L~

Q~ '::=~,-;i;::::---+t-'
Y4 ~
Q2~t!t::~~=~=~'4~A~6=n3
Q
9 17
---r:t. Y6~

~

R
Rt.:t
RA-4

6

V'~:>=-+-I-+""

/9

~:1 STR~~t~117!i::I5:fr=:1

I

~

"

'-+--+-;.----9----"1

TEST CONNECTOR

gg

.,Cr
5V t
+
H61
IK

II

E73

I

~

L-t-;.-=C.:L"'K_-.::;B_~'r'1.:3L_G-7-3../

~

~~ I

MEMORY,

E23

9 LOAD

. . .:
. . .'
,
I

D'3'-;i~

~
I

10

/

/',

I.!. 0

t?
0

H61

,-+-++-",R",A'-i-5;-3
7 1A

CIRCUIT-7'
-1~~;:E~~=~~-~;8:ijB
/
'C"RA=e 6 ~

I' ' Q 3
e -:---Q..L
"F73 F-~~s..-"i" F73 ,--CLK

~

~

_/r-

LOAD NEW ADDRESS

EGI)

CLK B

Figure 7-3a
Logic #2 PCB Assy, Standard
Rev AJ
#40510-XX

8-E~~~LE43

Figure

7-3a

Logic #2 PCB Assy, Std
#40510-XX
Rev AJ (#40827-03 PCB Assy, less ROM's)

AA

A3250

06

AB

A3289

06

AC

A3508

06

AD

A39l7

06

AE

A3929

06

AF

Bl059

06

Bl19l
B1308
AH' B1550
AJ B1620

06
06
06
06

REVISION HISTORY:
REV. ECO#

ETCH

A

9445

01

B

9628

01

C

9669

01

D

9743

02

E

9859

02

F

9881

02

G

9951

02

H Al003
J A1029
K Al096

02
02
02

L

Al169

02

M

9988

05

N A1274

06

P

A1247

06

Q

A1444

06

R

A1523

06

S
T

A150l
A1578

06
06

U A1622
V A184l

06
06

W A1879

06

X A1945
Y A1977

06
06

A3093

06

Z

CONFIGURATION
BIM, released as #24290. Later ECO #9541 changed it
to #40510-0l.
Schematic and Assembly as released. BIM changed to
agree.
Cut traces and add jumpers to revise circuits for
standardized PROM usage.
Allow rework of -02 PCB'S for use as -01 PCB's in
#40510-01 Assemblies.
-01 to -02 PROMs with carriage retry and servo
disable.
Change to low power Schottky devices to reduce +5
volt current demand for lower heat dissipation.
Change A73 from type 74LSI07 to type 74107 to avoid
marginal TTL load distribution. Change signal from
"-DIFF .512" to "SERVO DISABLE".
Provide for -31 PROM's, Model 1355WP.
Provide for -42 PROM's, 8080 Interface.
Change from -42 to -43 PROM's, 8080 Interface, for
use with #40644-02 Logic #1 PCB only.
Change all PROM's and PCB configurations, to delete
carriage retries, add PW detent, and resolve carriage
misposition problems.
Rel~yout PCB to improve heat dissipation, revise
RESET logic, and improve fanout.
Revise schematic, layout, and PROM call-out to correct problem of failure to recognize commands.
Allow use of -06 PCB etch. Increase RAM address
hold time to 20 nsec, eliminate PORT 7 decode race
condition, and provide for Table ROM enable only
when ROM is to be read.
Enable servo only when PW or carriage command is
being executed, and provide interfaced access to all
96 PW positions.
Modify ROM print hammer energy table for Model
l355WP.
Provide for Model l355HS.
Provide for Model 1345 Spec. K, and for proportional
ribbon advance for single strike ribbons.
Provide ribbon lift cycle frequency limit of 5 cps.
Provide for Model 1345 Spec. E, and correct
print hammer energy table for European print wheels.
Provide for reduced carriage motor current for Model
l355HS.
Change carriage velocity curves for Model l355HS.
Provide lower maximum carriage velocity for Models
l345A and 1355WP.
Change ribbon advance to 2-step for Model l355HS
"underscore" character only.

AG
AH

Lower hammer energy levels 3 and 4 to improve print
wheel life for Model l355WP.
Change Model l355WP print wheel look up table to
make compatible with Model l345A "Special Applications" installations.
Modify some hammer energy levels, lower peak carriage
velocity, and inhibit hammer fire during retries for
Models l355HS.
Provide for Models l345A Spec. DS, Spec. E, and Spec.
T. Added new hammer energy tables for OCR-B Scandia
print wheels.
-26 configuration to -27 for Model 1355HS. Change
print wheel release time, ribbon advance, and lower
maximum print wheel velocity.
Added -84, -85, and -86 configurations for Model
l355WP - OSD, Spec. E, and Diablo Sort.
Added -90 configuration for 1355WP 96 "Financial".
Rework for ESD modifications.
Documentation change only.
Configuration changes -27 to -29, -28 to -30. PROM
changes to alleviate HS carriage movement problems.

SOLID STATE COMPONENTS USED:
IC's

7400
74LS04
7408
7410
7453
74LS74
74LS83
74S289
74107
74LS155
74161
74LS259
74298
74367
74LS174
Resistor Pack lK

D73,E73,G6l,G73
C37,C49,H73
F13
E61
D13,D25
F6l
C13,C25
A13,A25,B13,B25
F73
D6l
E13,E25
F25,G13,G25,G37
D37,D49,F37,F49
C73
G49
H61

Diodes

(No components listed)

Transistors

(No components listed)

RA-D

MAIN DATA TRANSFOR BUS

::=;
~~~~'0~~.;Il:I1I1Il~!:;··~~~~1i'5~~!l[]JrIl~~~~~~~~~~~~~~~~~~~~~!=:!~!:~~~iII:

50)r~I!:;A-~a!.-----+_H_+++_Hfl/

4

y

u:tI

:::;

4B;)-.!I~A-~7~----~I-I++.wN~-----9ID49~:>2-B---I-'~~~K~C"r~C~>fCCiH~I.~--l-Q
4S;J-""IA;;.....::S~---HI_++_H:)

5 049:9X>!!.S------.j....:75~.J.l::I-<~:c~>~fic>HIf!;~'---HI-9
'-.I

~

'J

30~lIA~-~3L-----~~HrTtirt_r-------9l037
'_lIA~-:.i2L____WHTt_H_t_t..::51D37

0

S

42)...!;IA~I----_:BiH_rTtI_t_r-------'31D37

I RB4

15

HI~3tt=jlfRii2~R~B~2511

OP~R~ND P4

5

REGISTERB

RBI

~ ==J

4~

II

~

(

ESI

H

22

2K
H2S
2K
35 POWER ON

~:~:

~

~~-~:

~!

G52 2K

~

II

ljR~A~5:::JI~~:~ CO

It~:R~BAB~24':::~ItS~~:~

.-'=__---'"lB4

I

~LOCK

I~

0002 4

I

I A26 12
2
3 A26

f-.-l A

II5,CLR

05 10
04 19

~

~

~2

6

"0

4

II

!:

C73 CA 14

S C

OB I3

2

0'1

I6

+~L-----+_I-l-+++~::O
Y G64

r:1,,.......---...yJ
_
9

8

2K

r-2< 01C2501
Fal

C~:'~Atl,.~

12

4- e-J-I---

>- -LA

02

~=:G:2:5=~
"7

3 C

.Lf--

~

29

~

2B
A

~

05

-l

~CLR

~
~)

RIB 0B
CAR. CUSP
OPT, CONTROL 3
CHECK

6

00"I S

'1R:..+:A+5~-+-+.!.:I3:.jO

12

~
~

'iT

BIT 4
CAR. VEL STROBE
PW VEL STROBE

1/

10

~ ~'O ;f

?55J' I'20.F f?~9

:::RAI :

~5~====:B:,T=2:==:::

G4. ~7~---=:B:..:IT....:...'---{'41
"D"FF'
S ~----~~---{'54
10
BrT~
B9

10

13

9

12
I \

L.E.J CI3

C~ ~ ~.

<---

03~

~

e

.,r.-L------J
-

1

5 ~

I~

~
Ie

II

13

12

A44

~

II

~G
-=. GSI

,'~ FSI

".....

'3

~)

+;..V
L4,.. G
\J I 5
PRINTER READY
""
FI3
E50 Y
3K
rrU-.-====--------".

'--'______________-=-=~__+_~a¥~+_---------===--------_4~+_4_+_---------=aaam=~~R~A~4~3~~~-,2
BIT3

II

.......

:!!:

02~S~--------------~S~ER~V~0~DI=S~AB~L=E~--{~J

E37

n

A72

e

04~9~--------------~P~F~B~---------t~
Q3 7

4

I
+5V IK
~
L
______________~--J!--------~::::::::+=:::t=l=::::::::::::::::::::~tt~tt=::::CA:R:R:Y~

~A2

CLR

~G

I, 3~ _12

~:~

~

r--'

BIT5
CAR. LIN MODE
PW LIN MODE

CJ6 II
05 10

3 C

15

14
t...!..
r..).l.

5

"7 12

0

2 B

-!::!- ~

kAOM

>:;'

RIB. LIFT
OPT. CONTROL 2
PVI STATUS

G~

13

R A 6

,3

12

:s:

REV (CCW)
PFA

PW

'9
.3~7~--------------~R~IB~.~.~A~--------(~

G

3.:.
7 __.Jrr-L.__.:.F.:.

10 A44

~:~:~~j±jjtt=lj±tt!9tt:~
II~.
RBI
W
!...

+5V

037

',~

~
~

OPT. CONTROL I

~

-.:..;.

"

I~ 216~3~
~

60
Oc I~
~ A3
04~
OD II
1~~::j:=I=:j:2~A4 ORHJER Q5r.'4~I~9q+~
CLK
CJ
3 AS
06 ~5 110
'-,..L ENAP CARRY~
\)-H-++-H...,4,., A7
A6
C7 H'IS:I~']'::t:t:=:J
I
~.- .
O-HI-+++_H...;,5
08~7 112
"....
ENAT
ClR
!.+t~~::t:t~~G
AS
3 BI
12
CLOCK A
I._~~
1...""':'"'VI-...1
Ie STRB
2 AI
YI~
}·~I~----------------------------~-~E~N~AB~L~E-'~N~P----~43
ICLOCK C
5
LE
0~LRl2r~--1~'iiittlIHt==:T.:"-:-:-:-::
-:
-~
.ott1
,
,
C
"iE",
'
ifCEr,2;,-,,,,,,,
r-------HI-+-++-I-----~6
B2
7
6
II C25
~O~---",.
I~ A2 CSI Y2~--__......J
~____--!'=l3 G61
CLK2
4
A26
/p.:....---1f----....::<:b
-=
-,1<~+5V
B3
,
.
'--______
•
.J
4
~
21 5 6
~
-:-4
- a
Y3..
SYSTEM
I '"--+ He
*
~~
~" A3
.m )~
'~
SUB
CLOCK
~1~58v T"
~~
L-=:L-=lf---::=j!~ A 013 QA~',:.4+HI_+++_H-++_H~2":'-11 A0 AS7 QIr.74jI~'=t~=~W ~1-+------~14:!
Y4
12
B
OB ~~
22 AI
02 ~ 12
SEL STR
~
A26 8
06
5 C
Oc
23 A2
03~ t-1_
11155
STRI4
12
rJSIi
-RST
~
10
+~5V IK
1....===:j:=l.~6 0LOAD
OD II
I A3
04r.IO~~tt~==~:::t:tr
-= DATA 1 5 1 )" pj!,'t:-:-::':
4 G61_;' r+-+----------------------------=~--------_ta
¢
2. A4
LO 05
~4
~'.::s:!:P~_l_----_I_..;1
* A4,A27,A36,A60
L
_
::::>.....:::::_:~ eLK
3 AS ORDER 06 15
~~ 1190 OUT
'-C3,C28,C39,C51,C63.C75
L-~------I_+~~ENAP
~________~4 AS
C7 16
~~--+_~S~E~L~I~NP~A--+_----_1--~I~r3~1~~~
~~~r.~er,~~--t----i~J:>_~
03,015,040,063,075
E3,E16,E27,E40,E51,E63,E75
9
~ ENAT CARRY~
L-__________. .:5'lA7
08tll--t~------~==t:~S:E~L~'N~P:B~:j:===tt...l IV:~ t.i
GGI .~
FS3
>- 10 ~J0:.c--l!----------------I-----1
e
~ L---;V~:"':::
CLR __--, l~~;:;~:;==:tG~A~O~¥.,..."J
'" STRa
$ 5..---.
G73
~
~
. -~
G3,G27,G39,G51,G75
___ _
PROGRAM COUNTER CIRCUIT
PROGRAM
c~~g~it9_____ ::3 F61 ~
::A 2'
J
7 OUT
MEMORY
~ -ViK~+5VI r..!l. -'4'1. . __
.~
13 E73 12 3 E7·~3>o.:.4--1i-!I.!.!' E73 10 5 E73i)c>6..c.------------------------------------------.::~:.....----+-I--------------------------I
4.....----..,\
___
PROGRAM INSTRUCTION DECODE NETWORK
L-+-+-_~~ A35 jK>.6'--------------------f--------------------------------------------------------o-4' E73 2
T
L-__________~+_---~====~--------------------_4------------~----------------~CL~O~C~K~A~----______________~--------~--~9E7·~3>c~a----------------------~-+--------------------~~---l
ClOCK-B
I
V
49 CLOCKA

F73
ClKI
~" ,CLQ~O
K2 02t!- ~f-!
KI Qi 2
-B ~

.)--

~

c-l2

I

7

~

~~

:

~'13

COMPARATORS

WORD SELECT AII
POWER ON RESET
15
16
17
ta
I.
110
III
112

l!~~~tL

F13

:

BI ADDER
CO

WORD SELECT B 12

..J:.

,.

E25

9

F25 •
l __-!~~'~1~5----------------H~A~M~M=ER~F~IR~E----~~
r.R~Af7ij±'i3fD:----~.J7
12
BIT S
~
=~
~6~'~I______________~C=A~R.~R~E~V________ ~~

t5

680PFI

I

E49

10

~3~S~--------------~R~'B~.~HO~L-D--------\~

i!cli

1.~==a=~~~-------=--------t_----------------------------t__f_t--------1d~~::jf:~-£1~4--~::::~~:!:t!:tj~r-~~--l
Ra4
I A4
12
ilL ~
RB3
A3
2
10
:ii.M ~ ~

~:~!tl:l===~~~:~[2±ttt±~;t:tt:l]'~~lfI~:J

C
B

CLR

~

~

~

05
04

A

13

H2.
10C

CLOCK

RAM

BIT 7
r,:;
CAR. FWD
~
PW FWD (CW)
~
SPARE I
~
SPARE2'-'

"6 II

W"~------+_----------------_4----------------------------_+--+_t_------.J~----------+-----------~-~~.~~__----------~__4,llljL~

1>----~~-t1lt111_t1lr-~I5~------~2lL--~~--~r~5t1~~:::::]R~AIIi=t1~~t1t1:y!i@10~~~~~~~:J
EI3
025
W
H73

:

fL

~

1~4

RAI " :~
t__l __Jl____-l~~=========±===:J~[::m!£!:lDrr:===t~d===::{f..tRiRA'~""'2t:-::~7

~

OPERAND
REGISTER A f!!-.

:

~~=~;~~::::'4~6 :~ADOER

---12

G~: +5V

F49

--------JEJRiBa~~~I]AJ4~:'4~lj~~~~~~~~~~:~~'----~~;L~:0~----"1...l
m I~:~
~§

A4S
L'-____.;.;IK.;. . __t-__-O-_'·~.....---\I~
.... B
I
3
10' CI3
2 A35 P'-t-t.

IA-B -= 7 ,.....--------....
J
::~
!
1.~~~~~~I~.:l:t~~t~~~~~~~t::::::~IA~-~7~:::::r9~
!!£
fl!U:=:mIR~a~s±jtttjtj~4tb
I
IA-6
4 OPERAND :~ -C LI-__---1j.:R!.!:B'""5+_+++-+---I!--:~.!H_."
:J.~~±:~~3~lt~~==~==:ltA~-~5===~3~
REGISTER A '12
RAe
.!...
I
13
112
G
f:,~3tl:lj==~~R~A7tjt::i:jj:±=t=:tl~f~:J
I
19
110
I
15
RA6
18
III
5
~1-!1~.t~~==~~tlt~~?dt=1~=1~~=[)
II
I
RA5
IL ___
"'A"-...l16
9
2
D73
".
r~=====D:S:'~
r

____

,......2

3 C
2 B

ro1L-!.

~
flli.2

~

r------------------+------~

f!2. (I!22JIL__
)--iL.___E.~7:......__~f!::..B'
!
r--2-

+5V

19

I

_

R"d"

I--::'

~+5VC(

..---------~4~!.L-..I-

"---!m.LJ

12

6

~

39J-

I--

~~ 1~4

~ ;:~

IV..-_________I_----....:..--~II~2~...l./'

r~;=:------H-'~OPJE:R:AN:D:R:E:GI:ST:E:R:B~ltJII

10
47...,...!I~A::-4!.....----+_I_lf.f.lTTH_t"-''11 037''X,.,.----'2''!

AI7

~~
18

~~~'2 2......--.....

r-------------~12~r_------l~
,~,

'5 lAS
I~; ::;

1

'; l1 ~~=:::Y::~::9:=f.:=:=:'~:=D3:7~:'~2~2~CC:I3I:3::~~3~~~t~~~jt~~~~~~j~~2:~~::::T:~R:B~:~::::~Jl
+~

J~.~ 1012'
~ ,~.:

049

2~

~:=~

3 ~)4!.....-+~S++tt:lKC"f[:·>fC
~iH!!12'----H_t_¢
45 IA-S

I:~ ~

~

Ii'
II;

LATCHED DATA OUTPUT DRIVERS
Q7 12
13 0

~
13 A35 f JC)'' 'I__-o-....;;.9(pCLK2

2

I~

r-I~++-+~·o!LOAD
~

f'o

5V

I

~:1

n

L-

Q

~

.."r-

Figure 7-3b
Logic #2 PCB Assy, Std ESD
#301850-XX
Rev C

Figure 7-3b

Logic #2 PCB Assy, Std ESD
#30l850-XX
Rev C (#40827-05 PCB Assy less PROM's)

REVISION HISTORY:
ETCH

REV. ECO#
A
A'
B
C

A
A
A
A

B1465
B1550
B1574
B1620

CONFIGURATION
As Released
Documentation change only
Release -17 (SpecAES) configuration.
Change -03 to -18 configuration. PROM changes to
alleviate HS carriage movement problems.

SOLID STATE COMPONENTS USED:
IC's

7400
74LS04
7410
7432
7453
74LS74
74LS83
74107
74LS155
74157
74161
74LS174
74LS259
74LS289
74298
Resistor Pack lK

A26,
D37,
F6l
C13,
D25,
C25
E25,
F73
G73
C6l
C73,
G49
F13,
E37,
C37,
G37

A35, A44
D49, E73
G6l
D6l
E6l

D13
F25, G13, G25
E49, F37, F49
C49, D73, E13

Diodes

(No components listed)

Transistors

(No components listed)

r

CARRIAGE FILTER
CARRIAGE
A7

DEMODULATOR

(A6)
(A7)
J8
~lpPF
IK
CAR.5@----1
WAS)AI0

.
"
f.:"

IK

A8
=1=(,89)
s
All
150pF
AI3 ~~) AI2

E:

~I~PF

9fJ F
.11 P

+6VF

14
4
CI2
(812)
IK II

II

10
8

010

~IO

I

.'Ii<

-6VF

E6
IK

~

+,5V

+6VF

3.3K~

~~PF

~

~

3.3K

In 1:144
+5V
+5Vo-..11
f 'v-q------, I 16
~
4"'
70
13
CLR aD!!I.!.,1t--1-----------;-~H4
>-=-

.

-K

3.3K

3.3K

5

V

QD 12
13

III

Q

12

~

J32 2.15K
"' ..1\ 1.07K
J30
..... ~ IK

91~~
V

·-I'o..

0

V

W

GNO(4)

~

=

6.8V

~!h I;~K
r~~ ~ 3~~KTl

DSVF
016
.I,50V
013
~i'024
&?V

II H6 ",,10

+-+-+-1'-13,~

'-

K

, - -_ _=-j5 H6

JIO

~I: ~r;;::~

JI9
3.3K
10

.~
-15VS

'~54

. (5)

10,FUS
G45

GI9
390

G20
82

:,.v,";

~2~4'

'"

845

.

53

-I~VF

J:_

A51
+-'...AW,..4J---___=-=---=-=-------------\55
100
848

INVERTER

2~F

043 040
64K.9 39~2K+15VF

042
....+-'W.,................_
lOOK

lSt

....7,_

052
IK

~
10 F48 8

13 HII2)()!1~2-+-if-+.,,3 HI "",4

.Q

'--1-__1, HI _2

~

13 HI ......12

045
051
100
048
-15VF

G44
lOOK

+5VFir

.--~-I4llf_5-+-..,(;>t-----41-------('l6
.!'
27pF
C42
1001(
E46

f~:~ §:;f~K+'5VF
K

I

12

-15VF

+5VF*

o

~);3::!...--4_"'I~
1 -~-=-:~29:-+
~
T(F29)

W

W· I ,50V

J8

GI,FUSI8LE
10 -.9+ 15V

T..!::,qn
...,.. 6.8

~_15~~~_

QQcD,-,~"..3t-t-_-+_-+"i9HI2:"""::o.::8'-----+-H.,,9

J8.@X@ CAR.2/CAR.4
~ PW21 PW4
J8 7

PWI

J8 3

J25

PW3

2.15K
J21
L37K

I

+~VF*
v

A321

~LJ{' ¥
ft

f

*

.-

"75pF

A31

~15VF5.IIK
I
13

"iT

~+6VF~?PF

(~~)Vi1821
= JB~~O)

14~+6VF91?PF~;~

~: .,,020~~12K3

PRINT WHEEL

Rt.: Fr~8PF

RF AMPLIFIER

~V

~

::b

PW POS SIG# 2

-=-

PW POS SIG#II
PW LINEAR SIG

f

~+I;VF

PW5~IIIOPF

CAR. I

J8
14 CAR.3

J42 J41
E,~I
I 16
'--.!Ir-_1'---~--------~-----~--~~'+~157.V~F1'-~~~II~K~I12 A29
~1.07K
9 H4 ",,8
27pF 032 029
JCLRilolll!".1HH-f--+------+1-+-9
C27
A36 >'~1YY""'------I49
-'I/Ii'\r....,..
1-O+5VF
+15Vot~P-+-"
+5VF
64,9 39~2K
IK
; 2 ~ 330
A27
2.7+g3~d::F28
±C39
*
K
12
J5 ~~:~ 0117
J4
?"I
030
K 7 _
034
+
4
I.O'
,A:
9 15VF
;Jov
E30.T..1
L-t--:.::I°;,pCLK
H6 83;(
IK
~ F30
lOOK
10
027
026
-15VF
50
r
2.7 W50~
4
.-~
1'7 .i'..
JI6
~"=---4~IK"vG'V30Ir-I--<........E'V31r2"-_---16~C364>=~"'2""OO""'"
jt-J\II10"'0~---------------4
I
+5VF
- A
5 HI12.:"';o:'6'-+-H_V-~9JHIR'rl!ax)4--I-II-~~
r----::1)4'"
F~3~6"r6
INVERTER
±827
.l! 8
3~ V
..AJ,~ 1.07K
~
lOOK
511( "bE35
036
.1
§ C Qs 14
13 H ""'
JI2
IOOpF
-15VF
50V
7
~
1?1'o..
2.15K 1.37K
.;. 0 H48
II HI2:""';o.:.1.::;.0.'-4+------"13IH6' 4
-15VF
JI4 ·G"5. L15
I H6 2
~Ai. 00220S/LQAFf------II--f------------t-1
.- J27 O+15V 11.37K
p-:-::
98
.~~
~
4
'------' =
~ 3.3K ~I.~~ J26
=~~22
27pF C32 C29
830
V 2
1.07K
+5VF
64.9 39~.2K .If!' IK
;>
C30
K
I
+l5V,
• 833
~ F32 yI--vVlr.....---<....,.I13
831
829
~ IK G32
lOOK
C36 ~>-12__"'VV'V-t
9
AI7
AI8
CI6
018
EI6 ~----------::::-:--::::-:----------tl.....:.
10"'11 F36 ) 8 1
E34
21+-,,:;(,(
200
100
IK
IK
FI7
+6VF +5V
+5V
lOOK
836
AI9
14
in 017
II ~ FI5 IK
.... IK 4~
G35 G36
9
IIOOpF
'-15VF
IK
A22
4
10
IK
4
10
• IK
II
3.3K IK
• G34
DEMODULATOR
-15VF
>8
021
8
F21
12
12
3.3K
PRINT WHEEL FILTER
ORIVER
'150
It< II
7
s
15QpF
II
7
5L1.:'
1311 F36 )'1
8~~ 023
5
F2
6
~
A23 A20
I
5
(C21) IK 022
I
E,~I IK E24
F23
-6VF
J8
(A22) IK A21
':Il
F
IK
PW6~L
-6VF
91'OPF II<'
- V
9'io pF
IK
910pF
IK

..!
3
~

CAR. LINEAR
POS SIG

13

C48
2.
4

51K J.E39
f'OOPF

E40

=
\>
2.7
L-'W.\r:'1'==~~;:_4-.....

CAR. POS SIG.;',lo3

+15VF

..A

J20

+5V

G7
002~; :=

CAR. POS SIG ...", I

-15VF

r---I"I--....--+y----..,....----~-;;;:-;;::1I'---------------~47

V

CAR.POS SIG# 2

336 d:A39
.01

J23
3.3K
JI8 1K

Jim

-15VF

.1 +d::H2~d::H!~~G39
3W Jl~\&..I~~VF
G47
=

'.i..i.:

J24

+5V{>66~}-.-.JI~~~~~+5V

......,

A42

I J'...... ~;15VF 5.IIK

~d6~~2~.15NK~::~:1~~-L~3~5~V~~~A~----------~-----------------------------------________________________--"
A...

C46

F51 +~tlE27(C49)
(G53) ~v~ .I,50V

E~I W

+~F

F40
IK

.

9
050
G40
C48.-A
L~.JI10"'0"'K,..,..~_'V\E,...4~2._--6,,+ 4 10 200
,J.I
+5VF'"
51K
E37
V
~
F
15VF
>~FI4K4
100p-

t-O+ 15V 1.37~?~9022

,

4

1

,--~~~~------~r_~IIH4~~2-----JI-----4~J~43~~--------------------_t-------------------------------------------------------------------i II

~ Lr.+6

. ~~"
GI7;i,.

I
~

GNO 2

_ fJ GI6
.~ flo 6.8V

6

~F48 3

cr

--=

F48

I

J36

~,------------------?"-t--rIO~CLK c
1"7
10
J29
- CLOCK A 2CJ
.,
,.iV\iir
~A
14
13~ 12 11.011< J28
~ 8 Qa
V
J34 2.15K
~ RF AMPLIFIER POWER SUPPLY
,:,vw
\Y PHANTOM GROUND
.§. C H24
1[';;;,.. 2
11.37K J35
IL 0
QA~I£5~~-~~~~I__------~~9X~---~~~~~
V
+15V 1.37K
S/L
J40~,,~~J4.1.~...
9 8
~6 K ~~[j48' .147
F50
+15VF
lL=~~-~W
V
K K 2.15K 1.07K
(4i)
10,FUS
liD:..
10
J39
+15VS~~-'\f\I\I.-_t__:1'=+=__9--___,
IK
(421
+:t3~)(
C35,C45
GI4
~112
SINEWAVE
G50
6.8.1
390
82
J45
.1 B40 35,. 50V
GI5
.-----3=-tH4 ~
ORIVE
LOt~
GENERATOR
,.. 15V
82
FI4

~3.~.~J.t9
35VT!!I.... 50V
...L
.(3) -= =

39~2K

.9.. ~

IK

A43

.---'-1!!1--'--+--;8'-:4",,--~r---rEQ--;:~+:-;':::5V:::F:-'-~5.~'i~~K-"1I--A'~48~12~AIjI4y0-C4I'-::-:-_ _ _-1:

+5VF
27pF
(842

'r

4~---~---------------------------------------t__r-1I---t_~+t

~3 J

DRIVER

843 (840) +15VF
64.9
"A52
F5
4~
G31
~ H31
~1--'\N'v-+-_K---C1-7'-1_ 9
IK
IK
II
3.3K
F42
A50
F
' 13
IK
lOOK
A48
'"
~ =='I;OPF ~FIO>1;.;;;2_ _ _-3'-1IH;:>"'......4
>.i F48 ~I!".I_-+4I/\flt-f-....,,"'E,...4_4.--....,6:+·;;:i(10 200
5
6
+15V"
12
G42
51K J"E38
V
FI3
FI2
~
•
lOOK
TIOOpF
-15VF
IK EI3
IK
-6VF J31
J33 J37
+(;"VF*
F6
IK

+;V

+5VF*
(

E1,3

~_~

7
5

~11) I~AIO)
CAR.6
CAR.
CUSP

RF AMPLIFIER

A9

A41
II
"75pF

PW POSSIG#3

5I1(~E36 V:_S1 ...
'W

I

Figure 7-4
Transducer PCB Assy, St andard
#40515-04
Rev C

Figure

7-4

Transducer PCB Assy, Std
#40515-04
Rev C

REVISION HISTORY:
REV. ECO#

ETCH

CONFIGURATION

A
B

9742
9830

01
01

As released.
Change resistor Gl from film to composition, and
cut "key" pins on connectors J8A and J8B.

A

A1695

02

-xx

A

A1720

03

B
C

Bl163
B176l

03
03

A
B

B1470
B176l

03
03

C

B2092

04

-02 to -03 configuration. Revise PCB to include
Rev A -02 filter capacitors as components A27 and
A39. No functional changes.
Documentation changes only.
Replace connectors J8A and J8B with a single connector J8. Renumber certain pinouts.
Release -04 ESD version
On -04 Assy's, replace connector J8a and J8B with
a single connector J8. Renumber certain pinouts.
Release -04 etch. New layout to accommodate auto
insertion of components. New locator codes only no circuit or value changes. Old codes are shown
in parentheses.

to -02 configuration. Increase noise immunity
by adding .01 uFd filter capacitors and changing
resistors A29 and A40 from 100 to 330 Ohm.

SOLID STATE COMPONENTS USED:
IC's

7404
7420
7406
74195
7486 (ICEX)
72747
733
LM3l9N

H12
H30
H6,H18,H36,H42
H24,H48
F36,F48
A36,A48,C36,C48
BlO,B2l,DlO,D2l
F10,F21

Diodes

lN4736A Zener 6.8V

G16,G17

Transistors
2N5320
2N5322
2N440l
PN3644

F14
F25
B33,B45,D34,D45
B36,B48,D36,D48

CAIlIIEV 18
CARRIAGE POSITION TACHOMETER

CAR. FWD 37

~

17

f"'l------nI

B9

AI

CAR;6:~ ('~--------------------~~~~~--------------+-------------------------------------------~

,>+-.l.-nr::>I0~------------------____-{) 44

51

eM. EVEN

SE~ 21~~--------------------------------------------t-------------------------------------------------------~--1:~
~~~22~

+5V

+

r

CARRIAGE

V

HOME POSITION
SlGNAL-'IFER

FI2

(F5)

fPiMERUPLy-FiLTiii-mTWQi;;-----~

D-A
CONVERTER

~
I
I
I

-ISS

3

I

~

------------------------------------1
-15S
:
J..
I
eov

+ISS
+5V

fa,

+lIS

I

5V

II

J~,*

31 LED DRIVE
32 LED RET

I

I

GICl~

3Ma
!lClV
L
_
I _______________________
4

f______________

H27

~~

I

,~~==~==~~===*~T'IP=====~~G2~~~~~~~-=Q~~=-~-~-~-~~--=-~-~-~-~-~-~-~-~-~-~;-~--~-=-~-~-=-=-~-=-=-=-=-:_:_~-~-=-=-=J~------_=~~~~~~~~~~~~~~~~~~~~~~~~~~~~::~~-----~Jla ~1~~~
_T'lPCZII,C4O,CNI,ceo,E5O,E3II,ue

PRINT WHEEL VELOCITY COMMAND

I

1136
I62K

AMPUFIER

~TIOH

PRINT WHEEL POSITION TACHOMETER

Fa

11110

SAMPLE
and
HOLD

PW= 27

ZI PW SERVO ERROR

g.----------o

'>=......~",j ....

'15

P:J: 28
SENIOR
,..HOIoIE
RETUIIN

34

~

PRINT WHEEL
HOME POSITION
......----_0W04~ SIGNAL AMPLIFIER

DU
2K

Figure 7-5a
Servo PCB Assy, Standard
#40520-04
Rev P

P'a EVEN

Figure

7-5a

Servo PCB Assy, Std
#40520-04
Rev P

REVISION HISTORY:
REV. ECO#

ETCH

A
B
C
, D
E

9595
9665
9702
9737
9771

01
02
03

F

9804

04

G

9812

04

H

9858

04

J

9873

04

K

9884

04

L
9947
Ml A1337

04
04

M2

9923

05

A1504
B2092

05
06

N
P

03

Transistors
2N440l
PN3644

E6
A18,A28

CONFIGURATION
As released.
update circuit for production.
Update circuit for production.
Allow use of either -02 or -03 PCB etch.
Add jumper wire from G24-6 to I/0-8, change resistor
B36 to 28K Ohm to facilitate servo noise fix.
Revise PCB to include Rev. E changes. Change signal
name from "-DIFF .512" to "SERVO DISABLE". Change
component designator Bl8 to B20.
Delete connection from G12-l to ground to improve
D/A slew rate.
Delete capacitor B39 to improve tachometer channel
phase margin, and eliminate audible PW servo oscillation.
Change servo error clamp zener diodes B2l, B22, B37,
and B38 from lN5234 to lM6.2ZS2.
Change from -01 to -02. Replace resistor D8 with
'jumper wire to improve servo operation.
Revise assembly to change F5 to F6, and FIlA to F5.
MANDATORY CHANGE. -02 to -03 configuration. Change
capacitor B60 to 910 pFd, and capacitors B18, B20,
or B22 (depending on etch level) to 750 pFd, to
relieve main frame casting resonance.
-03 to -04 configuration. Use -05 etch PCB. Improve
circuit design to prevent servo burnout in case of
component failure, and reduce costs.
Engineering documentation change only.
Release -06 etch. New layout to accommodate auto
insertion of components. New locator codes only no circuit or value changes. Old codes are shown in
parentheses.

SOLID STATE COMPONENTS USED:
IC's

7404
7406
7426
1741
747 C
8041
1408L-6
LM319N
747 C (low offset)

E60,G60
G24,G36
G48,G72
E12
C12,C24,C36,C48
Al2,A32,A60,C72
G12
E24,E36,E48,E72
e60

Diodes

lN5234B Zener 6.2V
lN4454

B2l,B22,B37,B38
A2l,A40,A4l,A67,A7l,B6,B9,B26,B33,B4l,
DlO,D12,D16,D25,D72~Fl4,F27,F45,F48,F5l,

F56,H20,H39,H68,H72

,'"

r--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------()o

~2.

;'l~S

CAR.

•

._I"'-------------------~-----Q-------------------------------C~'~~~~AG~E~VE~L~OC~I~TY~C=O~M~~~AN~D~______________________________________________________________________~__~DyroV~~'K~

C:-p,

()

CAR. FWD 37

~S2K

I

i+15S

CAR. VEL

STROBE

9 G24
SERVO 20 ().
DISADLE

CARLINEAR

.:ODS

~~.Mt<

012
6

~'5S
t5V
71
.------------;'''i- " 12 2. 10

•

.J.

~_f".....l_t _____ ..

5 In

]"

_TI'_.QM'QQ.V~

f'.14

t·21~

4 tE6:

9t-:,2h:~ ¥')~-]?'fF'
I~rs; B,.
""'"-·~1.. "0
101(
~ + ':'55
~l'
2 ':1"i{"'W's 89
2~U

."

J

-ISS

-155',

~.r.-6
rf_t

~S~

~

II

9 -E48 7 C
+ =8

?~:

8

A7I

3

12 G72

3k:'x4)-\-<~rI3LJfil

PI

= fl3
~~73

2Kt H72
j+l55

I 'J;io

~_________
~4>-<~--+__--------..!I:::;OLG.:.7~2"./A

7
3

ssa

'="

HTI1

2c$1
C72

6.2ft

E60

f

cnd G

2
I G72

201<

280~

.J

~.
I ... ?

7

M.

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Car. Power Amp PCB Assy, Standard
#40525-10
Rev C

Figure

·

7-6a

Carriage Power Amplifier PCB Assy, Std
#40525-10
Rev C

REVISION HISTORY:
REV. ECO#

ETCH

A
B
C

9536
9647
9658

01
02

D
E

9729
9772

03
03

F

9803

04

G

9816

04

H

9839
9862

04
05

HI 9900
K
9970
L Al088

05
05
05

J

M

N

Al124

A1260

05

05

P

A1260A

05

Q

A1565

05

A

A3l28

07

A

A3278

07

B
C

A3754
A3966

07
07

D

B16l3

07

A
B
A

B1308
B1422
B1325

07
07
08

B
C

B16l5
B2l52

08
09

CONFIGURATION
B/M as released.
Schematic, Assembly, and B/M as released.
Incorporate changes to solve current instrumentation
noise problems.
Allow use of -03 etch PCB.
Incorporate changes to facilitate servo noise fix,
and provide improved paper feed noise immunity.
Allow use of -04 etch PCB incorporating Rev. E
changes.
.Add resistor F54 to eliminate current spike during
power up.
Allow use of #24376-01 Heat Sink.
Revise PCB artwork to include Rev. G and H changes,
and to simplify circuits1 Assembly is -02.
Add connection from A32 to I/O pin 8.
Documentation change only to correct drawing error.
Change component designator B3 to B5. Change resistors G54 and G67 from 300 to 200 Ohm lW, change
resistors G44 and F59 to 5%, and correct documentation errors.
Change resistor D76 from 5.lK to 2K Ohm, to allow
power up sequencing when using power supplies with
a low current foldback. Change -01 Rev. HI to -03
Rev. H2. -02 to -04 configuration~
-04 to -05 configuration. Lab~lG52 and G68 s.lV.
Remove -5.lV line from junction of Gs2 and Gs4.
Change the following resistor values:
B33 from
75K to
15K Ohm
F32 from
82K to
62K Ohm
G16 from
82K to
62K Ohm
G18 from 523K to 392K Ohm
G19 from 523K to 392K Ohm
C56 from
2K to
lK Ohm
Correct documentation error. No schematic or
assembly change.
Correct documentation error. No schematic or
assembly change.
-05 to -06 configuration. Allow use of -07 etch.
PCB re-layout only. Change locator codes as
follows:
C57 to A44
C54 to B46
C55 to B47
C56 to B44
D54 to A45
D56 to A47
-05 to -07 configuration, -06 to -08 configuration.
Reduce sensitivity to power supply variations. Remove
D74. Replace D73 with jumper. Change zeners A7 and
B7 to 11 volt devices. Change D75 to 5.lK, B33 to
30K.
Hardware change only.
(Heats ink mounting screws.)
Documentation change only (-08 only).

!

Replace resistor pack A70 with 2 resistor packs
at A70.
Release -09 configuration as ESD version.
Add ESD insulator.
Release ~08 etch as -10 configuration. Add capacitors A5l and B59 at Op Amps A50 and B55. Replace
resistor pack A70 with 2 resistor packs A74 and A75.
Documentation change only.
Release -09 etch. New layout to accommodate auto
insertion of components. New locator codes only no circuit or value changes. Old codes are shown in
parentheses.

SOLID STATE COMPONENTS USED:
IC's

747 C
748
Resistor Pack 10K

B62,F18
A50,B55
A74, A75

Diodes

lN4733
Zener 5V
100138-01 Zener llV
lN523lB Zener 5.lV
1N4454

B5
A7,B7
G52,G68
A8,A12,A19,A20,A25,A32,A33,A37,A38,
A59,A60,B8,B9,B19,B20,B25,B26,B36,B37,
B46,C67,E75,E76,F72,F73,F74,G72
C13,C19,E13,E20
E48,E63
E53,E67

lN4002
lN5807
lN54l5
Transistors
PN3644
2N440l
2Ns320
2N5322
2N6l03
TIP4lA
TIP42A

C34,D15,D22,D45,D59,E77,G58,G73
A30,B12,B13,B16,B22,B23,C36,D18,D24,
D42,A47,E56,E70
E51,E65
E44,E60
D48,D63,F47,F63
C20,E2l
C12,E12

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847
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A30
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A27
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T6

Figure 7-6b
Car. Power Amp PCB Assy, 13SSHS
Rev C
#4602S-0S

Figure

7-6b

Carriage Power Amplifier PCB Assy, l355HS
#46025-05
Rev C

REVISION HISTORY:
REV. ECO#

ETCH

A A1503
B A1898
A A3l28

05
05
07

A A3278

07

B
C
D
A
B
A

A3696
A3754
A3966
B1308
B1422
B1325

07
07
07
07
07
08

B B16l5
C B2l52

08
09

CONFIGURATION
As released.
Raise resistor C53 off PCB for heat dissipation.
-01 to -02 configuration. Allow use of -07 etch.
Place resistor C53 in parallel with resistor C56,
both .2 Ohm 3W. Change component locator codes as
follows:
C57 to A44
C56 ~o B44
C55 to B47
C54 to B46
D54 toA45
D56 to A47
-02 to -03 configuration. Change zener diodes A7
and B7 to 11 volt devices. Remove D74. Replace D73
with a jumper. Change resistor D75 to 5.lK and B33
to 30K.
Documentation change only.
Hardware change only, heatsink mounting screws.
Documentation change only.
Release -04 configuration as ESD version
Add ESD insulator.
Release -08 etch as -05 configuration. New layout
to incorporate -04 changes, and add capacitor B59
at Op Amp B55.
Documentation change only.
Release -09 etch. New layout to accommodate auto
insertion of components. New locator codes only no circuit or value changes. Old codes are shown
in parentheses.

SOLID STATE COMPONENTS USED:
IC's

747 C
748
Resistor Pack 10K

B62,F18
AsO,B55
A70

Diodes

IN4733
Zener 5V
100138-01 Zener IlV
lN523lB Zener 5.lV
lN4454

Bs
A7,B7
G52,G68
A8,A12,A19,A20,A2s,A32,A33,A37,A38,
A59,A60,B8,B9,B19,B20,B2s,B26,B36,B37,
B46,C67,E75,E76,F72,F73,F74,G72
C13,C19,E13,E20
E48,E63
E53,E67

lN4002
lNs807
lNs4l5

Transistors
PN3644
2N440l
2Ns320
2Ns322
2N6l03
TIP4lA
TIP42A

C34,D15,D22,D45,D59,E77,G58,G73
A30,A47,B12,B13,B16,B22,B23,C36,D18,D24,
D42,E56,E70
E51,E65
E44,E60
D48,D63,F47,F63
C20,E2l
C12,E12

52

PRINT WHEEL POWER AMPLIFIER

PW SERVO ERROR

+ISO

+150

1.5K
+ISD

51

PW +SERVO ENABLE

+15S

A24
10K

034
5.IK

CI6
S.IK

E35

PRINT WHEEL
DISABLE SWITCH
F37
2K

+5V

CI5

CIO "1"150":" 2

G36

H65
IK

C31
100

G41
S.IK

+15D

G57
470

G65

1

-ISO

+5V

-ISO
H64
IK

G63
470

EIO

PULSE FWD

RIBBON HOLD
DRIVE

. Ell

G62
H67

B62
30K

":"

H71
470

H63
IK

":"

":"

END OF RIBBON SENSOR

-150

C40

B59
5.IK

5
A71
.022

RIBBON 0A

HSI
2K

END OF RIBBON
DRIVE

H61

+150

C39

B60
2K

C26
"::"

RIBBON 0B

C38

POWER ON

& __

@rI50

&_-@>+150

C37
6.2V

1.

1

+SV
HSS
.1 FUS
2W
H44
.1 FUS

'"MJ

~+15S

+I5~V 0+150
+

I

C36
470

":"

-ISS

+150
+SV

+15S
+SV

HS3

RIBBON FEED
070 DRIVE

G47
G71
IK

0+15S
J50
22,35V
TA
-15S

+150
+ISO

2.2K
F70
5.IV

B56

F69
S.IV

J61
22,35V
TA

- END OF RIBBON

+ISO

GS3
2K

0-150
(E18)EI7

2W

DRIVE FWD

A5S
100

+5V

:1

VVIw

PRINT WHEEL
DRIVE MOTOR
-150

H59

22

C4B
10
H23

+150

G30
200
IW
H31
S.IV

G32
IOOI S

+5V

RIB. HOLD

~3-,\;""",,,--o.;;.3-,

1,3W

H35
G34
2K

RIBBON LIFT
DRIVE

G59
6BO

8

:-J

;IOK:

E27

G64
470

H70
IK

I

PULSE REV

+5V

14 RIB. LIFT

r--

B47,I00
E26

G37

2

B31
.1

- -..,:
~1..;.1-4_--<~"'"
ASI I IASO
I I
I
10K
10K I : 10K
I
-ISS
L _____ .1 L __ ...J

F36
IK
A25
10K

G70
470

100

1

DRIVE REV
C34
2K

A34

A33

D61

+5V
+5V

+5V

RIBBON FEED A
E61

0-38 +FIRE HAMMER
B39
IMPRESSION
30.IK
49 CONTROL ... I

-ISS
H49
470
B44

E5B
C62
S.IM

560pF

G73

-150

10

5VG75
~
I 3 RIBBON SENSOR DRIVE

G74
10

82

-150

~i }

B57
2K

50 HAM. ENERGY
CONTROL
C41
IMPRESSION 26.IK
48 CONTROL .... 2

C63 '----q----,
470

-150 -ISO

-ISO

C60
10K
B51

C57

5.IIK

C551
1,2WFUSIBLE

RIBBON FEED B

'--~H-A~M~M-~~R~D~/S.~A~B.~~-E~--------------------------------------------------------------~
C73

A67

SWITCH
E55

X6 }
33
HAMMER COIL

-150

HAMMER ENERGY CONTROL/DRIVER

X5

-150

'----------------------------------------------------------------------------------------~----------------------~36

Figure 7-7a
P W Power Amp PCB Assy, Standard

#40530-10

Rev B

Figure

7-7a

Print Wheel Power Amplifier PCB Assy, Std
#40530-10
Rev B

SOLID STATE COMPONENTS USED:
IC's

747 C
748
LM3l9N
Resistor Pack 10K

Diodes

lN4454

REVISION HISTORY:
REV. ECO#

ETCH

A
B
C

9544
9587
9635

01
01
02

D

9648

02

E

9697

02

F

9738

03

G

9773

03

H

9791

03

J

9817

03

K

9829

03

L
9838
Ll Al123

03
03

L2 A1230

06

M Al030
N Al050
P Al123
Q
A1230
R A14l3

06
06
06
06
06

A

A3278

06

B
C
D
A
B
A

A3754
A3966
B16l3
B1308
B1422
B1325

06
06
06
06
06
08

B

B2l52

09

CONFIGURATION
B/M as released.
Schematic and Assembly as released. Revised B/M.
Incorporate new circuits for acoustic noise elimination.
Correct drawing error. Change component designators
A26 to C3l, and A27 to C30.
Change capacitors e68 and C75 from .22 to 1 uFd,
to increase ribbon motor drive.
Allow use of 40531-03 etch PCB for -01 Assembly,
and to change transistor type.
Delete components A9, AlO, A26, and A27, to facilitate servo noise fix.
MANDATORY CHANGE. Change resistor A33 from 2K to
1.5K Ohm to decrease PW motor temperature rise.
Add resistor F17 to eliminate current spike during
power up.
Add a resistor across diode B5~, to eliminate unwanted hammer fire during power down.
Allow use of #24376-02 Heat Sink.
Change resistor C34 from 5.lK to 2K Ohm to allow
power up sequencing when using power supplies with
a low current foldback. Change -01 to -037 -02 to
-04.
Delete components C68, D68, D72, D75, E75, and F66,
and change resistors F67 and F75 from 10K to 27.4K
Ohm to correct ribbon drive problems. Add -05 to
Tab.
Allow use of -06 etch PCB for -02 Assembly.
Change zener diode C37 from 6.8V 1/2W to 6.2V lW.
(see above)
(see above), also -xx to -06 configuration.
-06 to -07 configuration. Delete filter capacitors
B48 and B49 to alleviate retries.
-07 to -08 configuration. Remove diode C33. Replace
D33 with a jumper. Change D34 to 5.lK.
Mechanical change only.
(Heats ink mounting screws.)
Documentation change only.
Replace resistor pack A53 with 2 packs at A53.
-08 to -09 configuration as ESD version.
Add ESD insulator.
Release -08 etch as -10 configuration. New layout
to incorporate -09 changes. Replace resistor packs
at A53 with packs at A50 and A5l. Add capacitor A30
at Op Amp A31.
Release -09 etch. New layout to accommodate auto
insertion of components. New locator codes only no circuit or value changes. Old codes are shown in
parentheses.

A45,E74
A19,A3l
A64
A50, A5l

B17,B42,B50,B52,B56,C15,C39,C40,C50,C5l,
F40,F4l,G36,G37,G38,G39,G65,G66,H47,H53
lN4002
D45,D6l,E45,E55,E6l,G6l,G62
lN523lB Zener 5.lV F69,F70,F72,F73,H16,H3l
lN54l5
ElO,Ell,E26,E27
lM6.2ZS2 Zener 6.2V C37

Transistors
PN3644
2N440l
2N5322
2N5320
2N6l03
TIP125

C44,D5,D2l,D43,D50,D58,D64,E35,G67,H18,
H35,H50,H67
C4,C19,C65,E58,F16,F32,F45,F48,F64,
G47,H6l
E6,E22
E13,E30,H59
ClO,C26,GlO,G26
C73

52

PRINT WHEEL POWER AMPLIFIER

PW SERVO ERROR

A33
+150

PW +SERVO ENABLE

51

+155

A24
10K

034
5.11<

CI6
5.IK

PRINT WHEEL
DISABLE SWITCH
A25
101(

F37
2K

+5V

G70
470

CIO +150= 2

J.

G36

G37

:

I

II

«>-3..AJVV_-_--o:3:..-,
C48
IOH23

G23

.I,3W

.I,3W

E30

H35
G34
2K
B30
.0033

I 10K

B47,I00
E26

PULSE REV

RIBBON LIFT
DRIVE

G26

G32

1

G59
680

0015

H59
+5V

I

;-J

A51 I iA50Q-i;-:-<>---6---=-i
I I
10K
10K I : 10K
I
-155
L: _____ ...I L
.J

CI5

+5V

14 RIB. LIFT

r--

I
I
I

F36
IK

G64
470

2

B31
.1

r---- -;-,
6

E35

100

1

DRIVE REV
C34
21<

A34

715

+150

G41
5.IK

-150
+150

F41 -150

G57
470

PRINT WHEEL
DRIVE MOTOR

-150
+5V

8

RIB. HOLD

-150

H70
IK

ORIVEJ

RIBBON HOLD

H64
II(

G63
470

G62

-::-

H67

B62
30K

H71
470

END OF RIBBON
DRIVE
H63
IK

C40

B59
5.IK

22 END OF RIBBON SENSOR
RI880N 0A

!:

+150

• C39

B60
2K

?

4546}

G61

RIBBON 0B
f36
POWER ON

t.:":'L

J:'::\+150

&-~

~:'! •

H44
.1 FUS

~

+150

J.(~18)EI7

+15S

3
+T 50V

~

20

~----------------------------------------------~+~15~0~---------~-ENOOFRIBBON

-155

c;:..
~-~-150

'-"

~------------------------------------------------------.------------------------------

A55
10

470

6

+5V
H55
.1 FUS

RIBBON LIFT
COIL

+5V

RIBBON FEED
DRIVE

0+150

+150

070

2.2K
39 40 +15S

+15S
F70
5.IV

J50
22,35V
-155

)..-:;:.:;.____+ __-1_".::'A::....o

+5V

+

}.!.:::..:..~~--+---+--o +5V

+5V

RIBBON FEED A

F66
560pF

-155

38 +FIRE HAMMER
B39
IMPRESSION 39.2K
49 CONTROL # I
B40
50 HAM. ENERGY 8.45K
CONTROL
C41
IMPRESSION 39.2K
48 CONTROL#"2

E58+150

F69
5.IV

H49
470

F58
C62

C63 L-_ _....----,

lOOK

470

G73

-150

10

2K

-150

B57
2K
C65

C44
C60
IK
B51
3.32K

C57

A67

SWITCH

NC

HAMMER ENERGY CONTROL/DRIVER

i

. (;FI
lll

5VG75
~
I 3 RIBBON SENSOR DRIVE
B2,I/2W

~

}

RIBBON FEED B

}

HAMMER COIL

~~H~A~M~M~~~~~D~/.7~~A~B~L~E~---------------------------------------------------------------------~

.5
C55
-150

-150

E::5
-150

5.IV

~
X5

~-------------------------------------------------------------------------------------------------------------------~

Figure 7-7b
P W Power Amp PCB Assy, 1355
#40730-10
Rev B

Figure

7-7b

Print Wheel Power Amplifier PCB Assy, 1355
#40730-10
Rev B

2N440l

REVISION HISTORY:
REV. ECO#

ETCH

A
9982
Al Al12S
B
9987
C Al12S

01
01
02
02

D A14l3

02

A A3l28

03

A A3278

03

B
C
D
A
B
A

A37S4
A3966
B16l3
B1308
B1422
B132S

03
03
03
03
03
04

B

B21S2

05

Transistors
PN3644

CONFIGURATION
As released.
Change -01 to -03.
-xx to -02 configuration. Allow use of -02 etch PCB.
-02 to -04 configuration. Change resistor C34 from
S.lK to 2K Ohm, to allow power up sequencing when
. using power supplies with a low current foldback.
-04 to -05 configuration. Remove filter capacitors
B48 and B49 to alleviate retries.
-05 to -06 configuration. Allow use of -03 etch.
Add .0033 uFd capacitor B30 and lK resistor B29 in
series between A3l-3 and A3l-6 parallel to resistor
C30 (resistor B30 to pin 6) •. Change C30 to SlOK.
Change F34 to 510 Ohm.
-05 to -07 configuration, -06 to -08 configuration.
Remove diode C33. Replace resistor D33 with a jumper. Change D34 to S.lK.
Mechanical change only, heats ink mounting screws.
Documentation change only.
Replace resistor pack AS3 with 2 packs at AS3.
-08 to -09 configuration as ESD version.
Add ESD insulator.
Release -04 etch as -10 configuration. New layout
to incorporate -09 changes. Replace resistor packs
at AS3 with packs at ASO and AS1. Add capacitor A30
at Op Amp A3l.
Release -05 etch. New layout to accommodate auto
insertion of components. New locator codes only no circuit or value changes. Old codes are shown in
parentheses.

SOLID STATE COMPONENTS USED:
IC'S

747 C
748
LM3l9N
Resistor Pack 10K

A4S,E74
A19,A3l
A64
ASO, ASl

Diodes

lN44S4

B17,B42,B50,B52,B55,C15,C39,C40,C50,C5l,
F40,F4l,G36,G37,G38,G39,G65,G66,H47,H53
C55,D45,D6l,E45,E55,E6l,G6l,G62
F69,F70,F72,F73,H16,H3l
E10,Ell,E26,E27
C37
F55

lN4002
lNS231B Zener S.lV
lNS41S
lNS234B Zener 6.2V
lNS338A Zener S.lV

2NS322
2NS320
2N6l03
TIP12S

C44,DS,D2l,D43,DSO,D64,E3S,ES8,G67,H18,
H3S,HSO,H67
C4,C19,C6S,F16,F32,F4S,F48,FS8,F64,G47,
H6l
E6,E22
E13,E30,HS9
C10,C26,G10,G26
C73

tlO'l

RM

+10'1

fl36
10K

R37
1.50<

10K

RI2

CRIO

2On.

~~n.

-

CRIG

PI
H +15'1
F

tl5V

PULSE WIDTH
MODULATOR
CIOI
6400pF
60'1

LQ-_I-___~--------_+-----_£-

--------~

it--

4

R30

>-4

1/1I2W
::12
~3

6

13

A-__6-~R~II~6~~RVI6~~RVIIl~II~:~~"
39K

4.7K

IK

I

I

-~

........

II

I
ho

6-0Aj0,R"'17,.-_ _ _ _ _+_...;4"-H1L./

'IK'
RI8
13K

IV
I

R25
6.8M

''''''-

I
I

I

19

lUI

:

I

II

R26
180K
(220K)

R61

22
I
112W rt7

::~

-1~8

R68
100

09

IK~

3

1.211/2W

C42

~O~
IOOV

R70

~T"IC7
.01

R23

.1

~

R60
100

RIS6
100

2W

~~:l

.100

~

C41

~f100V

RS':)
100

10V

T

2 GND

~

i~v

CHASSIS

GND

~

4.7K

I

'r--

I
I

~

~~

I

.......!!.

I

I
I

I
I

:

I

".7 It I

U2

L __

. . . R35
*

R49
100

I

I

all ... . /

R~

R44
470

100V

12V 013

_

-

131

~40

.h~

16
!!-J-----!J,

I

_LCI3
;;;;::.02
100V

HtlS
100

1-_-;:12...."R,...31'141_ .....

'f--~---_J

100
CR28

lit

4~

r-':'-...!l *' SELECT TEST RESISTOR

ii

I

U3 I

SL_A___ J

R57
10K

II

L____________~~IOO--V------------------------------------------~----~------------------------------______________-'\n~3~3------__------~
NOTES:(UNLESS OTHERWISE SPECIFIED)
I. ALL RESISTANCES SPECIFIED IN OHIIIS.
2.ALL RESISTORS ARE 1/4WATT,:i:5%.
3. ALL CAPACITANCE SPEClFI£D IN MICROFARADS.
4. ~ DENOTES PRIMARY CIRCUIT COMMON RETURN.

I

1.311/2\'1

)0"67

02Cl

ISOP
TVIKV

R22
10
(4.7)&

r--

R41

I
12
RI9
IL ________ .JI &.(~6~
7

C~=-~

1~
6---+--+-"2"'2"'K-"-H

R59

R60
1.211/2\'1

R24
08

+5V

R40

1-........

R20
10K

I

7

R3041 ~
221(

IK

- I-9
C

...-----+-----1

I >.
R32s1 ~

R6S

47K

&

1*

-r

'330K

II

T

..1.C22

R43
470
12

C20

:'~Igg~

RII4

11~~~W·'-!:!HT.!-jH-+-+_+-+-I-+---'

R27
220K

r-- - - - --..,

R46 10
47

~\.o.--+--...+-.o-.!kt--+-t-+--l
~...LT'2200

I +.J-~~~o
~ IOV

fr9

~-~~----+-~~&~I

Bt.K

5 -15V

TIs. L.

~I~

~

~

10V

>s

IKV

~.__
>-

III

311V

R45

l..,

••

I~K 2

J)

CIO

:~'IOOO

' A

()-_~rC""RI~ar--' ~}~~CRI

I
I

7

.0047

r-_ _ _

t

+

+

=LS

tA)J!-l~e- . . ,!:. . ~'
I.~iJ
Ib.. TO rl~V
..
!I~E.!;[!!HT!LI-_4-+__+-1!..:.4"Y-1~5v_l.::..s----(l:'>---I I1--:t~. >'-~?:~r ~! .R I ~a .1.)-..,
(

r~

~::~4-------~

.L

.~=
S
a

....

4 +15V

:1
c3~T

35V'T 1000
.... C44
35V
.1
100V

R!!I
II(
IW

-TICIO ::':CII
9
I
200V
200V

3 RED

':;~VRI

RI4
39K

ll0b)To

C~O

+

&.

39K1112\'1""

I50K

&.

• R28
R48
11112111 100/2'#1
[SIS\'/
3%)

.LCS
R29
-.-.0047
I
IKV I RED 112 VI
T2
CRII
>2

- ~
&. :::0

rg~~1

//

83

4

.J\,I1A-4;.,....e-_--4~---------I

-VR9

JI_", PI

--

1"200V(~VIL..Q-2-'-IW-----..+...i,",~o)-+-+-~I-I----( 5

-15V

B .01

3'~ ~r~ r 6

i-

:

+ 15V

;;;~200

89B
.01

013

AI25
AI21

10"H'~~--r--"""-----~-~----..,-I--I-'---I6

= AII7
,000pF + AII6
•F2
=AII5
1000pF

:

AI30
.1

I+
I :: ~

rn

~_ 6000

+4BV

I
3.3KI
__

J

141

Ht-

2 ..

.05

rh

~
20
BB7

20V·1

~~ A67~1~3_~

•

AB6~~

6

15

3

4 I

A65
12
6.....-vr II
V. Vcr.:..-

2 7

; i~ 1

4

~B61

4

CII~ ~ 5i:~~3

•.01

t:

1.0

.....---

3

' : ..C106 + CII5
---'...;; ~
150
C91
.05
2200
O_I __-+____.....--+.;2;,1
8111 1 L-._

10

~

10"H

~~II!I~~~;-+-+-~'~~~---~~-~~~-~~~-1---~~-+-~~"~--'~ 3
4 :
4 I LJ~; 6
A~.2 ,.01

C52

B56

-- I
6

AI35

C122.

~~. ~B94

~

k.-i •

A56
I

1

5

: I~
-_I
_ FI2

I::; .. 6

1

IK

I

~:

B57

"

8'"

~9
F

.. I 010

0

B50
100

:
I

r

C64

~~
V
470pF

.1

B29
.01
B2B

5

10

+

f$t

i E"l

B63
15K

10
B39

C22

B31

~I

2.BmH

CI07
-

C90 •.01
~
___ ,

B70
.. 7

IMEG

~

BI7

-

-

A52

C32

B2
CIB

150K
BI6 82K
B34
30K
91K
B32
B27
V+ Vc .~4!...f-"\,~~_+_ _ _
~
-#!I.,..,.+~5 +
10K
10K
B30
13
BIB
I
3.6K
B22
3
12
300p
6 V.
9
10K
B20
4
_ _+-"I'lY-Ia--4
130
B25
10
B6.6K
B40

B~:

A3B
l·005

C33

33K
C9

"5~..,.,......
IK

T~~=g--

240

.1

B21

r ---l
I :: B361

C21

\.D

33K

:::reI
~

r---"j

(jPI

CIO

C5

W~I
.:r.
'lY

B26

C20
240

22K

A40

BB6

L---4-A-7-3~r-----------------------~-1------------------------------------------------------------+---+-+~~+-~--~------------------------------~

T
.2~ ~ +...~5~---i--1r--,-~!-r-------------------------+--+--------------------------------------------------------------~--~~-~
10K
.~+---4-------------------------------~

B.2K

L-________

_~M"" Or::,
206 220.0033

r------,

~__-4__~~p_F.....__~__~_=_1

9=~~5

~

~77
6

BI2B
7

2
A~I
~68
A76
I
-.;;~ .Ir-~----~I~OO~------------------------------------------~----~~~~

NOTES: UNLESS OTHERWISE SPECIFIED
I.ALL RESISTORS ARE IN OHMS
2.ALL CAPACITORS ARE IN MICROFARADS
CAP, ASSY NOT MOUNTED ON PCB

rn

Figure 7-8c
Internal Pwr Sup Assy Option, U
#30ll55-XX
Rev C

Figure 7-Bc

Internal Power Supply Assy Option, U
#301155-XX
Rev C

REVISION HISTORY:
REV. ECO#
A
B
C

Bl179
B1312
B16B3

ETCH

CONFIGURATION

(NA)
(NA)
(NA)

As released.
New PCB layout and other changes for VDE approval.
Documentation changes only.

SOLID STATE COMPONENTS USED:
A67, B30
B36

IC's

723
TIL-116

Diodes

MR506
B1, B2, B3, B4
MRB22
A110, A121
MRB54
A55, B39
10009B-01 Zener20V A72, C2
100099-01 Zener 5.6V C131
R711XA
A95
R711X
B95
3020T
B92
10329 Zener 6.BV
A60
1N4454
ABO, AB2, AB3, AB4, B21, B54, B55, B59,
B60, B62, BB6, BB7
1N4936
C17

Transistors
MPSA93
100106-01
TIP49
2N630B
2N6401

C21, C22
B12
C5, C9, C30
C35, C52, C64
C135

C668.45K
,- _____ .,2

C64
IK

C67
510n.

t5F

C4B
10K

I

-v REF.

I

I

067
IK

057

+155

3!

056

62.V
055
3K

OP/C2 27 III I

g~~

028

-15F

~'

E27

~-~~--J~~14~I;W~----~--------------------------------__{51

059

K

tV REF
051

tl55 >~---~t> tl55
42

~.;~

-150F

030
510n

~

7

-155 ~+-----t> -155
24

027
1.5K

--.=-----i>

t5V

.....__t>

+ 5F

t5V ~~-....

L-....-

+150F

tJ5S

3

E68 +
6.8~FI
35V
TA "::"

TI2

tl50F

+15F
+5F

E64
lOOn.

034

C32

029

+5F
C38
510n

510n.

1.5K

~-_0--------{52

TIO

C28

tV REF.

-150F

E72I
.22)1F

,..

-150F
-150F

-I!SOF

B64
IK

+SF

-V REF

1'155

A54
3K

OP/C 3 29 1Il2

~--. .--6_~~J--~------------------~53 TI3
+VREF.
FUSIBLE
+ 15 0 ')4::9~_...._ _..:E.o;4;:;0/y.:.::;1A~2::,:W:=-_ _ _ _""_ _""1___--i~ t 150F
50

+

tl50F

-150F

E55
510.0

E36
22J1F

35VT.~~~-_4-----~~_+f
E54
12V
E53

L----I~ +15F

+15F

E46

A34
510n.

A27
1.5K
tl50F

+5F

----I~-15F

E52
510n

+

155
A33360K

A2B
9---

...- -.....- - -.....
E60
5.1 V

-150F
-150F

837
510n.

E57

5104

....-.---------i> -V REF.
E62

-150F

.22~F

-150F

Figure 7-9
Split Platen Opt. PCB Assy, Std
Rev A
#40617-02

Figure

7-9

Split Platen Option PCB Assy, Std
#40617-02
Rev A

REVISION HISTORY:
REV. ECO#

ETCH

A A1244

02

CONFIGURATION
As released, etch -02.

SOLID STATE COMPONENTS USED:
IC's

1741
LM319N
Resistor Pack 10K

B57,B62,C57,C62
A44,B48,D44
C48

Diodes

1N4729A
1N5231B
1M12ZS2
1N5234B
1N5415
IN4454

A49,A50,D50,D51
E60
E53,E54
A55,A56,D56,D57
A28,A29,B28,B29,C28,C29,D28,D29
A57,A58,D58,D59

Transistors
PN3644
2N4401
TIP120
TIP125

Zener 3.6V
Zener 5.1V
Zener 12V
Zener 6.2V

B33,B34,C33,C34,E51,E63
E59
B21,B22,C21,C22
A21,A22,D21,D2'2

P6

BRN

5

2

PRINT WHEEL
TRANSDUCER

RED

YEL

7

5
RED

3
WHT

2

KEY

GRAY

4

6
GRN

6

BRN
YEL

4

7

3

KEY

rl.

WHT

P5

GRN
GRAY

CARRIAGE
MOTOR

,J;:O

a

TRANSDUCER

I

(HARNESS
ASSY#

r-----...,
~.>_-'.;_:B;::LU;:;E:..---"'

24303)

•

P4

~,>_~~R~ED~-----'

\

I PWR
\

AMPL

... PCB

12
10

I

WHT/GRN

III

WHT

HAMMER COIL

+5 VOLTS

6

-RIBBON OUT LAMP

7

...... _--......... .J
P2
4,>-~B~R~N_ _ _ _~
5>-~O~RG:-

- PRINTER READY LAMP

_ _ _ _J
CARRIAGE HOME
POSITION SENSOR

KEY

3

(HARNESS ASSY# 24304)

14

7
13

KEY

rn21S-:..J-I-.!Bw~LHK!I
4

fr.

~lf-___~_________

____

I~

I--!'R::E::.D_ _ _- J

~

'-____________..J

2Q

5

IMPRESSION CONTROL SWITCH
(HAMMER ENERGY SELECT)

4

(HARNESS ASSY#24304)

P3

2

i

r----'>_-_..,...;....:G::.;Rf<:.:;1i'--_ _"'"
/

r\
\

T4~

I

RED

T7~.>_~~~-----J

i T6~.>-_~Y~E=L_ _ _"",
,
!
T5~
• BLK
I, MOTHER
PCB I
j
I

(::1~' .~-----*,
\

Til

;>----l---!'~----­

',MOTHER

I

. -~

>-II--------..J

YEL

o

BLUE
BLK
RED

'-__--._-----...J III
WHT/RED

..

- PAIJSE SWITCH
RIBBON DRIVE MOTOR

N.C: (KEY)

2 >-II----~~
3

GROUND

RIBBON LIFT
SOLENOID

I

BRN I 2
:
I

VIO

: REF. ONLY
I (ENDof RIBBON SENSOR)
I

r-------~'~
; 1

ORG

,
L~

,£;

PRINT WHEEL
HOME SENSOR

:

I

I

PAPER FEED
MOTOR, R,H.
(OPTION -SPLIT PLATEN)

N.C.

--------,

YEL 13
15

8

N.C.

5

WHT/BLK

PAPER FEED
MOTOR. R.H.

6

8

OK GRN
LT GRN

WHT/RED

KEY

N.t.
N.t.

I

I
I
I

_______ J

Figure 7-10
Misc. Wire & Cable Assys
(Including #24471 Rev. F, et all

Figure

7-10

Misc. Wire & Cable Assemblies
(Including #24471 Rev. F, et al)

REVISION HISTORY:
REV. ECO#
A
B

9684
9797

C

9901

D

E

All02
A1244

F

A1582

ETCH

CONFIGURATION

As released
Revise documentation and assembly to remove two wires
from cable spring to improve flexibility.
N/A Revise documentation and assembly to prevent wire
breakage in cable spring.
N/A Add wiring for L.H. (Split Platen) paper feed motor.
N/A Exchange L.H. paper feed motor wires:
Red TIO to T12
Gray T12 to TIO
N/A Exchange plug P2 wires TO
Grn pin 1
Gray pin 2
N/A
N/A

SOLID STATE COMPONENTS USED:
(No components listed)

: Diablo Systems Incorporated

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