83302400F_BR5A5_Diagrams 83302400F BR5A5 Diagrams

83302400F_BR5A5_Diagrams 83302400F_BR5A5_Diagrams

User Manual: 83302400F_BR5A5_Diagrams

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Information for thses sections is included in BH5A5
Disk Storage Unit~ Publication No. 83302300.

SECTION 1
GENERAL DESCRIPTION

SECTION 2
OPERATION

SECTION 4
THEORY OF OPERATION

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SECTION 5
DIAGR,AMS

-----~---------------~~-- .•....

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DIAGRAMS
INTRODUCTION
This section contains diagrams t hat logically describe the DSU in terms of the functions which the unit performs.

Figures 5-1 through 5-13 are flow charts" simplified

circuits" and timing diagrams that describe the First Seek function" the Power Off
sequence" the Direct Seek (forward and reverse) function" the Return to Zero function"
the Read/V/rite operations and Head Advance timing.
are provided on pages 5-14 through 5-37.
located on pages 5-38 through 5-41.
5-42.

The logic diagrams for the unit

The unit power supply schematics are

The operator panel schematic is found on page

Schenlatic diagrams for the logic cards are found at the end of the sect ion.

I:

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:-

83302400

A

5-1

U1

I
N
ENERGIZ E SEQUE NeE ItELAY KI
FOR, UNIT 0

REMOVE SPINDLE
HYSTERESIS
8RAKE POWER

APPLY SPINDLE
AND 8RUSH
MOTOR POWER

SET LOAD FF, FWD LATCH,
SEEK FF,
SET DIFF COUNTER CONTENT TO 495(CMPLM OF 16

ENERGIZE
SPEED RELAY

K5

POWER

RELAY

APPLY +40V
WR I T E

CLEAR LOAD FF
AND FWD LATCH
SET DIFF COUNTER
CONTENT TO 105
(CMPLM OF «If> I

SET FINE LATCH
WHEN ONE
TRACK REMAINS

LOGIC M ON I TORS
AMPLITUDE ' OF FI N E
POSITION ANALOG SIGNAL

A

DELAY

HEADS

LOADED

SWITCH TRANSFERS

READ

IWRITE

HEADS

LOAD

K4

TO

LOG I C

ACCELERATE IN REV
REACHING 50 IPS
IN BO TRACKS

WHEN AMPLITUDE
IS WITHIN 0.5V
OF OV (0.5 MIL
FROM TRACK 00)
INITIATE 1.7510\5 DELAY

INITIATE
400 MS

~

START A 400
DELAY

CONTINUE REV
MOTI ON AT 50 IPS
UN T IL b4 TRACKS
REMAI N (TO TRK 00 I

MS

WHEN AMPLlTUDE
IS OV, STOP REV
MOTION OF CARRIAGE (TRACK 001

BETWEEN TRACK b4
AND 32, DECELE RATE
FROM 30 IPS
TO
25 IPS

ENABLE

ON

CYLINDER

BETWEEN TRACK 32
AND 0.5, DECELERATE
UNDER CONTROL OF DIA
CONV AND DESIRED VEL GEN

SEND SEEK
FINISHED TO
CONTROLLER

SEND SEEK
INCOMPLETE TO
CONTROLLER
8NI2A

ex>

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Figure 5-1.

Power On/First

~eek

Se~uence

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4'-:::"

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"c-'"

?-~,

,-

f'\

1[\

'.,.

/

,F-"\

'""

J

C) 0 0 0 c 0 0

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NOTES;

Ci)

SEQUENCE RELAY,KI

~.

SPINDLE MOTOR

~

BRUSH MOTOR

~ ~ sEC::::1L-_ _ _ _ _---._-...

®
(APPIIOXI

~-

SPINDLE SPEED, K!5 ~ ~ 2000R~M
POSITIONER
POWER, K4

---.J'

i

J

@
@

.i--l:::: 10 SEC (A"PROX)

I

SPEED DELAY, 1501
LOAD FF, K504
FORWARD
LATCH,1511

eo TRACKS ACCELERATING FROM 0 TO 50 IPS.
A. 50 IPS UNTIL 64 TRACKS TO GO.
B. 32 TRACKS DECELERATING FROM 50 TO 25 IPS.
C. 31.5 TRACKS WITH VELOCITY DECREASING UNDER
CONTROL OF D/A CONVERTER A637 AND
DESIRE;D VELOCITY GENERATOR A631.
D. CARRIAGE MOVES LAST HALF TRACK AND IS HELD
STATIONARY BY FINE POSITION ANALOG SIGNAL.
eARRIAGE TURN AROUND AREA .
P,FFERENCE COUNTER IS INCREMENTAL (COUNTS
UPWARD ONLY). CONTENT IS ALWAYS THE COMPLEMENT:
CMPLM OF 16 = 495, CMPLM OF 406 = 105, AND CMPLM
OFO:511.

FIRST SEEK, K5Q3
T= 16
ENABLE, I517

@)

..--.-.......,..........,....--...J

,

SEEK FF, K500

I

INH"IT

COUNT INHIBIT,l~16
FORWARD
CARRIAGE MOTION

HEADS LOAD~D
CYLINDER
(TRACK) PULSES

\

1""'1: - - - - - - - - - - - - - - - - - - - - -

I

I

III

I

,.----,.--.-_~~I. IPS::::::e0¥!..1c;.../%:;..t;~~J~~'-'~'"'---.-------------I

----~---~~i

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lOl

____~~~~

T4Q1I

i

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T4011 T404 T40S T..a2 T40I

FORWARD END OF
TRAVEL" A693
10 #/ SlC

TOI

;.11---

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1

-f I-

------~__~__~----~r1'-r_~---__--~----------------------I
I#/Sf;crrt
T= 406 STROBE, Y50J @
I ~--------~~--r_---------------------Y502

i

I

Y504

________--~---------I~~~~-I~~-S-E-C---~--------------------­
I

@
T=406 ENABLE, K~06
GATED CYLINDER
(TRACK) PULSES TO
DIFF. CTR, 1584

:

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REVERSE
CARRIAGE MOTIQN

I

r-1~________~~-----------------------

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FINE L.ATCH, 1634

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Trn:n:nnr~

I

vaQW.

~-~~---~I

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,~

16

~!--_ __

.

I I
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,~~i-------

~I--~~--~I~·---------~--~~--~---------~~
1.7t! ,.,

ON CYLINDER, I631
REVERSE END OF
TRAVEL, A683
SEEK FINISHED OR
SEEK INCOMPLETE

:
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II

II

II

It'

CONTENT OF 01 FF
COUNTER @)

{

,

I'

r--

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t

I

511

rr-

II

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-----r-l

495

I

105

1106 071

108 TO 510

I 511
8N37

Fi9ure

83302400

c

~-2p

Power On/First Seek Timing

5-3

.................................................

~~~DB~~"""""""""~""""""""""""""""""""""""""""""""""""
l."1

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UN IT II£lIJRMS

OPERABL£

CONTROLLER SENDS
NEW ADOAESS AND
CYLINDER SELECT TAG

NEW ADDRESS
IS SET 1N1O CURRENT
ADDRESS REGISTER

CONTROLLER SENDS
SEEK TAG AND
CONTROL SELECT TAG

LOGIC-DETERMINED
STATUS (SET/cLEAR)
ENTERS ODD (TRACK)
STORAGE f'f'

UN IT GENERA;ES

ANi SEEK PULS::

CARRIAGE BEGINS
ACCELERATING ~S SERVO
CIIHPARES POS I Tl ON
ERROR ANO VELOC IlY

TRACK SERVO
GENERATES POS IT I ON
SIGNALS AS EACH
TRACK IS CROSSED

DETECT ION C lRCU I TS l:S::
POSITION SIGNALS TO
DER IVE TRACK PULSES
(AND FINE POSITION
ANALOG SIGNALS. NOT
USED UNTIL T <: lhl

EACH 7RACK PULSE
INC'lEASES 0 IFFERENCE
COUNTER CONTENT

BY1

STOP CARRIAGE
ACCELERATlO~ .v.D
SERVO.AT 50 IPS

~~=ri°CARRLd 1 ,

•

S~ND

SEEK FINISHEO

70 CONTROLLER

SWITCH SERVO CONTROL
TO fiNE POS ITION
ANALOG WHEN VELOC IlY
INTEGRATOR OUTPUT
- 1.2SV

START A I. 75 MS
DELAY

CA~R

IAGE MOT ION 5 TOP

8NI3A
ALLOW 0/A CONVERTER
OUTPUT TO PROV I DE
POS I TI ON ERROR
SIGNAL

00

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Figure 5-3.

Direct Seek Sequence

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'v

to o o o o o
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NOTES:

o



16 TRACKS AT 50 IPS

@
@

32 TRACKS DECELERATING FROM 50 TO 25 IPS
31.5 TRACKS WITH VELOCITY DECREASING UNDER
CONTROL OF D/A CONVERTER A63? AND DESIRED

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VELOCITY GENERATOR A631

(§)
CAR STROBE

20~~~DiI..~"~________________________________
ITol

CYLINDER
(TRACK) PULSES

~

T40I T402 T401

TOI

r-11"""-----I

'O~SEC~

I--

--------~~------.~~-----------~----------------------I

Y502

I ~IIC___±_n=_

Y= 406 STROBE, Y50fJ

I

------------~--------------------------

I
__________~~______-+I~~
~__I~e~8~EC~____~_________________________

Y504

G)
T=406ENABLE,K506

CONTENT OF DIFF
COUNTER @

~

U Ii U
I

I

-t:w;~m~~~~s2@~~----~d5

r.~
II
II

~--------~------------~--~~----------~I:
1.75"S~

FINE LATCH, 1634

SEEK FINISHED

T405~T404
T403T40ZT401 ;....TO:"":'
T~OO

:

REV CARRIAGE MOTION __________--L________

REV END OF
TRAVEL,A683

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ON CYLI NDER, 1631

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_______~______~~~____________~------------------------I
I
I
.

GATED CYLINDER
(TRACt() PULSES TO
DIFF CTR, 1584

C

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T405

----I..Jrt,

FORWARD END OF
TRAVEL, 1610

II

•
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T4O!J

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__________~--------~------------+_~~------------~I~r--________~------~----------~~~------------'r-­
________~----__~------------+_+_~------------...Jr-511

495

105

II

os!

1071

108 TO 510

I

511

NOTES~


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START SWITCH

0

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HYSTERESIS
IRAKE POWER

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SPINDLE MOTOR
POWER ENAILE

-------i

REVERSE
CARRIAGE MOTION

____~.r_----------------16IPS----------------~~~__________________

~I--------------------------------------------------------

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XI"

G
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XI Y

A

DEMODULA TOR
FUNCTION
GENERATOR

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INTEGRATED

+SV?8

AND GATE OR INVERTER

II

13

:

C

E

D'

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ANALOG TO DIGITAL CONVERTER

11r:>I/Y

ABSOLUTE DIFFERENCE SENSOR
IVOL TAGE VALUE OF DIFFERENCE
INDICATED OUTSIDE OF BOXI
IIIITH DIGITAL CONVERSION

C>/Y

ADJUSTABLE ANALOG TO DIGITAL CONVERTER

SINGLE LINE MULTIPLE SELECT
DETECTOR (EXCESSIVE VOL TAGE
DROP OCCURS AT INPUT IF MORE
THAN ONE SELECTION IS MADEl

IJl.

SINGLE SHOT

Ig{

ADJUSTABLE SINGLE SHOT

X/I'r:>IY

ADJUSTABLE RINGING AMPLIFIER (DESIRED
RESONANT FRED SPECIFIED ADJACENT TO BOX)

Ix

SWITCH

IT Y

ENCODER

RECE IVER

=lliJ · ~:~

c~

0---:--

E~

E~

CIRCUITS INFORMATION EXAMPLES'

Y400

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:5

PIN
PACKAGE PIN

I

LOGIC TERM

2

681"5"" COC ELEMENT NUMBER
'LOCATION
PULSE DURATION

FLIP-fLOP (TYPE 0)
PIN

IO~

12~

~

II

~

13

9~
8~

:5 ~
4

...fL.JL.I':Lr
:: L

~

B ~681"S

LOCATiON

6--UPIN

DUAL DIFFERENTIAL RCVR USED AS SCHMITT TRIGGER

COUNTER APPLICATION

+5V

5.6~

C> I Y

DUAL AND INVERTER
A
A..r---

FUNCTION SYMBOL (SINGLE SHOT)

13 '';:: SET CTR TOZEIIO-L

FREOUENCY SENSOR

B

Jl.JUU1.I1.J1.f
LOGIC TERM

9~

2~

r-i.

12

REGISTER APPLICATION

I~
13 U
I
U8

4

-SET REG TO ZERO

-.J

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5~

<-O.IV

IO~

W
W

9~
~

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tv

2

o*'"
o

~R

nD:
IN:ERTER
AL

THIS TERM LOCATED AT GRID POSITION B2
ON CARD PLUGGED INTO CONNECTOR 28 OF
ROW A (SEE CHASSIS MAP DRAWING AT
END OF LOGIC SETI, SEE DISCRETE COMPONENT
EXAMPLE FOR CARD SIZE INFORMATION,
.

8

A'l...--l

TIMING NETWORK (HOT SHOWN ON
,...,
CIAGRAMS)

OR GA TE OR INVERTER

>Z8 S HZ

X_V

8

----I"
cL-.SL

C

L.-

8~

8

LOCATION .

4-BIT COUNTER/STORAGE ELEIENT

a

00

DELAY - WHEN INPUT CHANGES TO A "1"_ A
200 NSEC OELAY OCCURS BEFORE THE "1"
IS PASSED ON·
.

COC ELEMENT NO FOR
INTEGRATf'D CIRCUIT PACKAGE

RETRIGGERABLE MULTIYIBRATDR (SINGLE SHOT)

LEVEL CONVERSION TRANSMISSION LINE TO
LOGIC LEVEL. SWITCH STATE (GROUND OR OPEN)
TO LOGIC LEVEL. LOGIC LEVEL TO POWER OUTPUT (TO DR)VE LAMP. RELAY SOLENOID. ETC)

~

OSCILLATOR (FRED NOTED
OUTSIDE OF BOX)

Fr:>

A -'

~A-~a~I~IL~~-

OIGITAL TO ANALOG
CONVERSION WITH
ADJUSTABLE
IELECTRICALLY) GAIN

8~
A..r--C~

EXCLUSIVE OR

8~

ANALOG SUMMATION OF DIGITAL INPUTS (REF
VOL TAGE OUTSIDE OF BOX INDICA TES OUTPUT
SIGNAL LEVEL RESUL TING WHEN SPECIFIED
INPUT (S) ARE NEGA TED)

DIGITAL TO ANALOG
CONVERSION

lr:>oC>

> ,

8

SPECIAL
l:X/C>

C

r---I

FUNCTION SYMBOLS:
AMPLIFIER

.

B

o.r---L

D-

OSCILLATOR FRED. DELAY
PERIODS. SUMMATION REF
VOLTAGE. ETC

C>

B~
c~

0

'NVERT:R~

SPECIAL CIRCUIT
CHARACTERISTICS

LOGIC TERM
OR IDENTIFIER

C~

NOR

C

CIRCUIT LOCATED ON CARD PLUGGED INTO
CONNECTOR 27 OF ROW A (SEE CHASSIS MAP
DRAWING AT END OF LOGIC SET). TWO CARD
SIZES USED IN UNIT. FULL SIZE PLUGS INTO
TWO ROWS. HALF SIZE PLUGS INTO ONE ROW.
LOCATIONS OF CIRCUITS ON FULL SIZE CARDS
ALWAYS IDENTIFIED WITH TOP CONNECTOR OF
INSTALLED CARD.

C

8

D~

8

INPUT APPLIED TO TRANSISTOR
09_ "0" SIGNIFIES ORAlIO LEAD
OF FIELD EFFECT TRANSISTOR
(FET)

--r--

cJ.L-

C

F UNC T ION SYMBOL

A---"t8 ~

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LOCATION

KEY TO LOGIC SYMBOLS

II~

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PART I

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2

N

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DUAL RETRIGGERABLE AND
RESETTABLE MULTIVIBRATOR (SINGLE

o

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SHOT)

o

NETWORK (NOT SHOWN ON LOGIC DIAGRAMS)
PIN

~

--r--

FUNCTION
SYMBOL

I

13~

CDC ELEMENT
NUMBER

4~

DUAL JK FLIP - FLOP
LOGIC
TERMS

PACKAGE
PIN

I

5(9)

c

CDC
ELEMENT
NUMBER

I

PIN
J OUTPUT

3~

4

c

-U
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---+---J:"L--i-

LOCATION

5

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A

KEY TO LOGIC
PART 2

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4

3

2

SYMBOLS

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m
GENERAL SIGNAL ANNOTATION, GATING, AND IfIIHIBITIIG .FORlATlOII

IlEllERAl.FORIlATIOI AND SYMBOLOGY'

STANDARD LOGIC LEVEL I =+3V
0 =OV
LOGIC DIAGRAMS DRAWN WITH INPUTS TO LEFT AND OUTPUTS TO RIGHT
EXCEPT WHERE SPACE OR LAYOUT PROHIBITS LOGIC TERM NUMBERS
ASSIGNED IN SEOUENTIAL BLOCKS SO THAT LOWEST NUMBERED
TERMS (TO XX IOXX ETC) APPEAR ON SHEE T 3 AND HIGHEST NUMBERED
TEAMS ARE FOUND AT THE END OF THE LOGIC SET

S*

SlOT iNPUT TO BIST ABLE DEVICE

R*

RESET ,CLEAR, 'NPUT TO BISTABLE
DEVICE

G*

GATE INPUT HAS NO DIRECT ACTION
ON CIRCUIT BUT MUST BE PRESENT
BEFORE INPUTS AND OR OUTPUT(SI
ARE ABLE TO FUNCTION IF MORE THAN
ONE IS USED A NUMERAL SUFFIX IS
ADDED (G' G2. ETC)

0*

IDENTIFIES AN INPUT SIGNAL WHOSE
ACTION IN THE BLOCK REQUIRES THE
PRESENCE OF ANOTHER SIGNAL(S)

C*

STROBE PULSE USUALLY USED TO GATE
INPUTS INTC> .. BIST ABLE DEVICE

T*

TOGGLE INPUT BISTABLE DEVICE
CHANGES STATE EACH TIME T ASSUMES
ITS SPECIFIED STATE

TP

-H-INDICATES
NON-STANDARD
LOGIC LEVELS
I2-STATES)

INDICATES
ANALOG SIGNAL
(3 OR MORE STA TES)

'"-{ ~

INDICATES NEGATIVE
LOGIC LEVELS ( ,
MORE NEGATIVE THAN

0")

-L

-r-

~

INDICATES
A SPECIAL LEVEL
ADJUSTMENT CHARACTERISTIC ON THE
LINE

OR

~

TEST POINT

WIRED OR

THE SIGNAL STA TE REOUIRED FOR THIS SIGNAL
TO PERFORM ITS ASSIGNED FUNCTION IS ADOITIONALL Y
DESCRIBED AT POINT AT WHICH IT ENTERS THE LOGIC
TERM BOX SEE ADJACENT EXAMPLE

-1

l= -t

INDICATES 2 lOR MOREl LINES
ACTING IN EFFECT TO CARRY
THE SAME INFORMATION
(GENERALL Y DIFFERENTIALL Y)

DYNAMIC INPUT FOR
WHICH THE DYNAMIC
1" IS A TRANSITION
FROM A STATIC "0"
TO A STATIC "1"

o

r-

DYNAMIC INPUT FOR
WHICH THE DYNAMIC
"0" IS A TRANSITION
FROttIA STATIC , ..
TO A STATIC "0"

III

ID

- - - ...

12
~

=D-

=0-

A , .. ON LOWER INPUT
PltEVENTS THE BLOCK OUTPUT
fROM STANDING AT THE
DEFINED' 1" STATE NO MATTER
THE VALUE OF THE OTHER INPUT

A 0" ON LOWER INPUT
PREVENTS THE BLOCK OUTPUT
FROM STANDING AT THE
DEFINED , STATE. NO MATTER
THE VALUE OF THE OTHER INPUT

C~

CONTROL BLOCK

ALL 0 INPUTS
(REGISTER APPLICATION)",
UNDER CONTROL
OF C INPUT

/--

~'"~'
TERM

~

TERM

~

INPUT ON PIN 4&

~

LOGIC CHASSIS CARD LOCATIONS IDENTIFIED ACCORDING TO
ALPHA-NUMERIC MATRIX WIREWRAP PINS AT EACH CARD
LOCATION ARRANGED IN TWO COLUMNS IA AND BI
2

~ ~~~~SB;OT~::;EE

LJ20'-~

CONNECTOR J200
\

Ur

,

_
.

BY
ONE (COUNTER APPLICATIONI

I

FOUR·TERM
____

Ir

FROM WIREWRAP PIN SIDE

AT
THEIR RESPECTIVE 0 INPUTS IREGISTER.
APPLICATION) A O' ON PIN 13 PLACES
THE OUTPUTS OF ALL FOUR TEIIMS TO 0

~

N934 ACCESS TESTER

I 504

\

DENOTES CONNECT,ON TO lCCESS(OII
R/W) TESTER CARD. uSE OF THESE
CARDS IS OPTIONAL OURIIliG TESTS.
SE E CHASS I S MAP

A03~ CONNECTION

POSITION IN ROW

k

PIN
COLUMN

PIN

JAOO·7B

A03-15A

~

CONTROL BLOCK

CONNECTOR J20'

~~"LOGIC CHASSIS VIEWED

C~ON

~E:MS~OP~~S:"'~;:S S~~;:=SENT

------<

OUTPUT ON PIN.e

WIRE WRAP

J200-4&

1

I

,

EACH "0" GOING
~
EOGE CAUSES
~
K300 TO CHANGE
STATE (COUNTER
"PPLICATION)

5EIlERAlIiREIRAP AND CONNECTOR INFORMATION:

3

THREE-TERM C~
CONTROL BLOCK EACH
0 -GOING PULSE EOGE
CAUSES THE COUNT

'

I

I

iNOlCATES THAT INPUT($) TO THE C~
CONTROL BLOCK ARE C~ TO EACH
TERM IN THE ARRAY UNC~ LINES GO
DIRECTLY TO THE APPLICABLE TERM

20

1,2

K303'

---+>---

WIREWRAP CONNECTION

/'

_EWRAP BOARD PERIMfTER
COIIIIIIECTOR. SEE 'CHASSIS MAP
DAAWItlG AT END OF LOGIC SET FDA
CONNECTOR LOCATiONS.

00

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KEY TO LOGIC SYMBOLS
PART 3

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TEST SELECT RESISTOR TO BE SELECTED FROM
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SECTION 6
MAINTENANCE
Informat~oIl for this

se ction is included in BR5A5
Disk Storage Unit . Publication No. 83302300.

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SECTION 7
MAINTENANCE AIDS

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MAINTENANCE AIDS
GENERAL
Section 7 contains information on logic circuits, the criteria used in

o
o

determining the further usability of read/write heads and disk packs.

o

The logic used in this device consists of two styles of circuits:

o

individually identifiable resistors, capacitors, transistors, etc.

LOGIC

crete component and ihtegrated circuits.

dis-

Discrete component circuits

o

PHYSICAL DESCRIPTION

o

All components of the logic cards (Figure 7-1) are mounted on one side
of a printed circuit board (PCB).

The PCB card is 6.075 x 4.85 inch.

The female connector of the cards mate with wire wrap pins extending

o
o

through the chassis wire wrap board.

The logic cards functions are dis-

persed from the reverse ends of these pins through wiring installed

using the wire wrap technique.

Cards installed in the logic chassis are

restricted from vertical and horizontal movement by card guide spacers.

o

Numerical designators

(1 through 99) are etched on the non-component side

of the board to identify each transistor.

4:)

designator is etched on the non-component side of the board to identify
the card type.

o

o
o

o
o
o
o

A 4-character alphanumeric

A matrix code (alphanumeric) also appears on this side.

Non-amplifying components such as integrated circuits, resistors, capacitors, diodes, etc., are not marked.

Pin Assignments
The PCB card contains a 62-pin connector.

Connectors are mounted along

the shorter dimension on the component side of the board.

83302400

C

7-1

I

o
o
o

o
o
o
COMPONENT
SIDE
TEST
POINT

o

SIDE

ETCHED MATRIX
TWO LOGIC
CHASS IS ROWS

PIN IA

4

CJ.
00-

o

FOIL

END

•

O~~

o ---

---

DISCRETE
COMPONENTS

3

1

I
2

I

1\,
A

J

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@

,

PIN
178

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___

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PIN~·

Q)

21B

INTEGRATED
CIRCUIT

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•

••

PIN'

o

I

PIN

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NOT ES:



The third line, also

The circuit type is a

subdivision of the function identifier (specifically a high level amplifier).

By using the

circuit type designator, detailed information on that particular circuit can be derived in the
following paragraphs (see Discrete Component Circuit Descriptions).

C

The second line within the symbol is used to differentiate that particular symbol from similar
symbols that appear on the logic diagram.

""i

.,',;/

It is called the logic term and consists of a one-

o
o

letter prefix and an assigned identification number (in this case, A 705).
The numbers on the input lines to the symbol indicate which transistor is driven by that input
line.

For example, the upper input has a number 22 on its line, showing that it drives

transistor number 22 (ie., Q22 on the card schematic diagram).

7_4

c
o
o
83302400

A

o
0;

I

0
0
+20V

0
0

R22F

+20V

OUT

R22C
041

0

022

0
0
0
0

R22A
R22D

-20V

-=

-=
R22B

Q4t
+20V

OUT

0
+20V

tTl

[
0
0

0
0

Figure 7 -3.

Discrete Component Circuit

0
0
0
0
0

0

83302400

A

7-5

o
o
The output lines also have numbers associated with them.
transistor directly feeds the output line.

o

These numbers indicate which

For example, the lower output line has a number

40 above it, indicating that the output from transistor number 40 (Q40 on the card schematic

o

diagram) drives the lower ouptut line.

o

The lines on the interior of the logic block that bracket both inputs and both outputs show
that the input lines and the output lines are differentials.
that the amplifier does not invert the signal.

The relative level indicators show

o
o

Slashes on the inputs and outputs show that the

signal levels are non- standard.
Integrated Circuits
Figure 7 -4 shows the schematic version (as shown on card schematic diagram) and the
logical representation (as shown on logic diagrams) for the same representative integrated
circuit.
The n'lost apparent difference occurs in the outline shapes for the circuit.
use a four sided block to depict all logic circuits.

The logic drawings

o

Two lines of information appear in the

logic version that do not appear on the schematic block.

They are the function symbol which

identifies the block as an OR gate and the logic term which provides specific identification
for the circuit.
element number.

~\

Points of similarity include the package pin numbers and the Control Data
Refer to Table 7 -1 for manufacturers information of the various element

numbers.
The last item of information regarding these two representations involves the location code
which borrows part of the schematic symbols reference designator.

In the reference

designator (U-A4B), the U specifies a non-amplifying integrated circuit, the A4 is the
circuits board matrix location for the package, and the B indicates the section of the package.
(A 140 package is a four section package.

Each section is a separate circuit.

Sections are·

identified A through D.) The location code (on logic drawings) borrows the matrix location
and additionally specifies the location of the card in the logic chassis: position 5 of row B.

~"~··
C

WIRED FUNCTIONS

o

I

The logical representation for wired functions is shown in Figure 7-5.

o

These functions are

used where circuits have the capability of being combined as an AND or an OR function by
having the outputs connected.

..

This is simply a physical connection and no electrical or

electronic components are involved.

The logical interpretation of a wired OR function simply

requires that one of the inputs be a logic 0 before the output can .be a logic O.

The wired AND

output will be a logic 1 only when both inputs are logic l' s.

o
o

7-6

83302400

A

o
o

o
0"'· ·
"

o

o
o
o
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c
c

LOGIC TERM
INPUT
"

FUNCTION
SYMBOL

REF DES

~

/

U-A4B

OUTPUT

/

CDC
ELEMENT

LOGIC TERM

INPUT ~

4

--+--Ld'4~

CDC
ELEMENT NO.

NO.

LOCATION
(IN LOGIC CHASSIS
AND ON CARD)

Figure 7-4.

TABLE 7-1.

CEC Element
Number

c

LOGIC

SCHEMATIC

Integrated Circuit

CDC ELEMENT NUMBER CROSS REFERENCE

Manufacturer, Type

Description

140

Fairchild, 9002

Quad, 2-input NAND

141

Fairchild, 9003

Triple, 3-input NAND

143

Fairchild, 9009

Dual, 4-input buffer

145

Fairchild, 9005

Dual, AND / OR inverter

146

Fairchild, 9016

Hex, inverter

147

Fairchild, 9007

8-input NAND

149H

Motorola, 3021

2 -input exclusive OR

161

Fairchild, 9601

Retriggerable multivibrator

162

Texas Instrument, 75107

Dual differential
receiver

164H

Motorola, 3062

Dual type J -K flip-flop

o

172H

Motorola, 3002

Quad, 2-input NOR

173H

Motorola, 3004

Quad, 2 -input NAND

175H

Motorola, 3060

Dual type-D flip-flop

()

182

Signetics, 8291 or Texas
Instrument, 74197

4 bit presettable
counter

200

Texas Instrument, 7406

Hex, inverter

300

Fairchild, 709

Operational Amplifier

o

o
o
o
o
o

306

Fairchild, 747C

Operational Amplifier

308

Signetics, NE531 T

Operational Amplifier

316

National Semi Conductor,
HOO02CH

Current Amplifier

521

IV[otorola, FC18929L

4-bit binary, full adder

83302400 A

7-7

• _ _ _ _ _ _ _ _ ., . . . ~ ...... ~~." ...................... ~_ ...................... ~".".,.~ ..... ,,~,. _-"'"'" ..... _ ........ _ ............... _ _ . . . . ~ ....... ~.~.~_' .. ~ . , _ •••• _ •••• _ ......... _ ...... _

... _ . _ _ _ ....... _

.. ~ ....... _

.................... ,..

• . " ••• _

._, h • • _ •• , .. ~ ••••• ", •••••••• ,,-'"'." •• ,•• ~"" •• " ......... " •• , . _ ••••• "".,~ •• ~~, .............. " ••••••••• ,., •••••

o
o
OR
INPUT

AND

OUTPUT

INPUT

INPUT

fa

o

OUTPUT

o
o

INPUT

o

.TIO

Figure 7-5.

Wired Functions

STANDARD /NON -ST ANDAR,D LOGIC LEVEL INDICATOR
The input to a logic function at a voltage other than the standard logic level is represented
by a slash across the non- standard level line.

Absence of the slash (or absence of an X,

see below) indicates a standard logic level on that line.
When the input signal to a logic function is an analog signal, the input line will have an X
across it.

The analog designator is used on lines that normally operate at more than two

voltage levels.

INTEGRATED CIRCUIT DESCRIPTIONS
Basic functional information for integrated circuits is provided on the Key to Logic Symbols

r"\

sheet of the logic diagrams.

"~"y/

Detailed functional descriptions and schematic diagrams for integrated circuits is available
in the circuit manufacturers handbook, Table 7 -1.

DISCRETE COMPONENT CIRCUIT DESCRIPTIONS

(
'I-"~)

~.

Figures 7-6 through 7-31 are the schematic diagrams for the discrete component circuits
used in this device.

A verbal description supports each circuit diagram.

The order of

presentation is in accordance with the 3-letter alphabetical circuit type designator.

o
o
7-8

83302400

A

o
o

0
0
0
0
0

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o
o
o
o
o

[
o

Gated Amplifier - FAB
The FAB circuit (Figure 7-6) is a low level amplifier that amplifies the analog read signal
from the head.

Input B is a gate input.

When input B is +20v, diodes CRNA, CRNB, CRNC, CRND, CRNE and CRNF are forward
biased.

The voltage between CRNC and CRNE and between CRND and CRNF is clamped at

approximately +2. Ov.

With all diodes forward biased, the read sigi1.al can pass to the

amplifier.
When input B is ground, diodes CRNG and CRNH clamp the voltage at +0. 6v.
biases the input diodes.

The preamplifier is a three stage amplifier using an emitter follower output stage for low
output impedance.

The integrated preamplifier has discrete component ac and dc feedback.

AC feedback is provided by CNE and RNH in the top half and CNF and RNJ in the lower half
of the circuit.

The signal is brought back to the emitters of the input stage to increase input

impedance.
DC feedback is provided by RNG, RNE and CNC (to ground) in the upper half and RNK, RNF
and CND (to ground) in the lower half of the circuit.

This feedback helps to stabilize the

output.
Capacitors CNG, CNH and CNJ, and CNK filter noise from the +20v and -20v power supplies,
respectively.

The electrolytic capacitors filter low frequency noise.

The paper capacitors

filter high frequency noise.
Open loop gain in the amplifier is approximately 180.

c
o

This reverse

No read signal can enter.

Closed loop gain in the amplifier is

approximately 3 O.
Current Amplifier - FAD
The FAD circuit (Figure 7-7) provides a voltage drop from A to C of either 0.5 or 5.0 volts
which is selected with a "1" or a "0", respectively, at B.
on.

A "1" at B turns transistor QNA

This provides base drive through RNC to QNB which turns on.

The output at C is now

the same as the input at A except for the emitter-collector drop (0. 5v) across QNB.

o
o

With

input B at ground, "0", QNA is off and base drive to QNB is provided through the 4. 7 -volt
Zener diode, CRNC.

The voltage drop from A to C is Vb

e

plus V.
z

Resistor RND improves

circuit operation by increasing the Zener current.

o

o
«)

83302400

A

7-9

- ..'--." ......•.- ••.........•- -•..-.-.-......- .........- ..--..-- ...- ................._.....__........

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+20V

8

...... .. ....................

OV

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A-C

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....----~---~-----.,--- ~120

O-E

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MV

1
CNG
I~JA-F

+CNH

+20V

O.OI~F

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RNH
6.81K

CNC
1000PF

RNE

RNG
10K

CNE
1000PF

r--"""'VV\r---1I-----1 t-----.

10K

A C RNA CRNC

B

CRNE

C NA
1000PF

RNA
2.87K

RNB
2.87K
C
CRNB CR NO

C RNF

RNF
10K

.:r::
-

CNF
1000PF

RNJ
6.81 K

CNB
1000 PF

RNK
10 K

eND
1000PF
RNM
1.2 K

E

CNJ
O.OIJA-F

+

CNK
15JA-F

NOTE'VOLTAGE

AND COMPONENT

VALUES

-

-20V
ARE FOR REFERENCE ONLY.
ITIOO

Figure 7-6.

o

Gated Amplifier - FAB

o
7-10

83302400

A

o
o

o
o
o

o
o
o
o
o

+40V

A

A

+

,

XI t>

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FAD

B

X

OV

B

C

3V

+ 39.5V

+

C

35.0V

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A

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o
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NOTE: VOLTAGE AND COMPONENT VALUES ARE FOR REFERENCE ONLY.
Figure 7 -7.

Current Amplifier - FAD

Gated Intermediate Level Amplifier - GJA
The GJA circuit (Figure 7-8) is an analog gate that is controlled by input B.
is +20v~ both transistors are on.

All analog signals pass through the circuit.

CNA and CNB ensure that only analog signals are passed.
the gating signal.

When input B
Capacitors

CNC filters noise spikes from

Dc power for the transistors is supplied by the circuit in the next stage.

When input B is +0. 2v, both transistors are off.

No signals pass through the circuit .

o

•o

83302400

A

7-11

0
+

B

0
0
0

20V

ov

1

~120MV

A-C

1

()

,
~120

E-O

(-)

*

B

A

MV

C NA
1500PF

1:::

r:'

C NC
1000 PF

-

O~~)~---+--------~~

(~

';7:

RNA
1.96K

QN
RNC
II<

0

()

E

;r'",

RND
IK

C

CNB
1500PF

RNB
1.96K

It)
QP

O~-)~~---~~------~
NOTE:

VOLTAGE AND

Figure 7 - 8.

COMPONENT VALUES

ARE FOR REFERENCE

ONLY.

Gated Intermediate Level Amplifier - GJA

c
High Level Amplifier - HAA
The HAA circuit (Figure 7 - 9) is gated by an analog gate circuit (GJA) and provides the load
and biasing for that circuit.

()

The preamplifier, ac feedback and dc feedback are identical to the FAB circuit.

Capacitor

CND is added to the output of the second stage to decouple high frequency noise.

()

o
o
7-12

83302400

A

o
o

o
o
o
o
o
o

o
o
o
o

C -0

1---~---+---+--.-~3.

CNF

1o:f::
CNA
1000 PF

-

+20V

~.~~
TP

RNC
10 K

RNA
10K RND
6.81 K
CNK
O.OIp.F

A

, C NC
3900P F

C

RNM
2 I 5

+20V

CNM
1000PF
CRNA

I-1
-=

B

o
CNL
O.OIJLF

CNB

C NE
3900 P F

R NE

R N8

1000 P F l O K

6. 8 I K
RNF
10K

r--4~---+--.J\I\I\r-+------+

-L

CNH
15p.F

I

1o~ll~
NOT E: VOL TAG E

TP

RNH
1.2 K

-20V
AND COM P 0 N E NT VA L U E S ARE

FOR

REF ERE N CEO N L '( •
ITI03

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Figure 7 - 9.

o
o

•o

6V

~~--~~~--~--------~
--'-

«)

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I L - - . . . . - \ - - - - J - - - - - l l t - - - - - r - ~ 120M V

f

o
o

o
o

f

A-B

83302400 A

High Level Amplifier - HAA

7-13

_._.._--_._-------_.•... _--,------_._--_ _-----_..... -..------_._----_... _._._-_ ....--...." ... -----....

-.~~~-~-------

o

o
High Level Amplifier - HJA

o

The HJA circuit (Figure 7-10) increases the input signal power to transmit over a coaxial
cable.

The input is a differential signal of approximately 3. 6v peak to peak.

The input signal across A and B is divided between resistors RNA and RNB.
QN and QP are forward biased with a gain of 3.

o

Transistors

The -20v through resistor RNH and diodes

()

CRNA and CRNB and through resistor RNJ and diodes CRNC and CRND forward biases QQ
provide a current gain.

o

Transistors QR and QS are emitter followers that draw very little current from QQ and QT.

(.

and QT, respectively.

Transistors QQ and QT are in a common collector configuration to

-~

l

They provide low impedance for discharging CNC and CND, thus reducing delay time when
crossing the zero volt point.
Output voltage is approximately the same as input voltage.

Output current is 20 rna maximum.

o
o
C~
I

(

)

.-,....

~

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( -"':
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o
o
7-14

83302400

A

o
o

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o
o
o
o
o
o

,
.,

3.6V

A-B

A
B

: ~J [~ :

c

H:A

0

f

C-D

3.6V

VOLTAG E

*
~20

C OR D

MA

PEA K

CURRENT

RNK

270
+20V4--J\A/~-+------

RNF
2.15 K

o

+20V

(J

R NE
1.5 K

o

-20V

-20V

RNM
IK

o
o

RNP

eN D

100

O.OIJ£F

D

"'--~~--ff----6
TP

o

NOTEI VOLTAGE AND

COMPONENT

VALUES

ARE

FOR

RE FERENCE

ONLY.

ITI05

o

o

Figure 7 -10.

High Level Anlplifier - HJA

()

o

o

83302400

A

7-15

o

o
o
o

+4V
A

I

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X/~[

OV

,

+4V

•

+IIV

OV
OV

.we

D

+51V
I

OV

,.

()

o.

+4OV
I

+4OV
D

NRI

f.2K

SW

rf",

\..;/

_._---0,
-fOV4-...- - - - '

C~----4~--~---------~---~
NCR'

NCRI
((~

A o--------i

1Ul:)

c

Io-------r:
MOTE: VOLTAGE AND COMPONINT VAWIS ARE 'OR REFERINCE ONLY.

Figure 7 -11.

7KII

Write Driver - J AH

c'
o

o
7-16

83302400

A

o
o

o
o
o
o
o

o
o
o
o
o

c
o

Write Driver - J AH
The JAH circuit is a symmetrical driver that amplifies the write signal for recording
on the disk.

Points A and B are inputs to the driver.

Point C is the write gate input.

Points F and G are outputs.

Points D and E go to +40 vdc switched through an ex-

ternal resistor.
Transistors

Q(~

QS and QT.

With the input at A high (+4 vdc)

and QR connect to a toggle FF as an interface to the driver transistor
#

QQ is reverse biased, base to emitter.

Current flows from base to collector and turns on QS.
low (ground) which turns QR on.

At the same time, input B is

This puts a ground at the base of QT, holding it off.

Transistors QN and QP are a darlington pair with the drive for QN coming from QP.
When QS is on, QN is off because the base of QP is pulled to ground by QS.

QZ, QX,

and QT work in the same manner.
Diode s NCHA and NCHB speed up the turn off of QN and QZ by removing the baseemitter charge.
Diodes NCHC and NCRD are gating diodes that put a clamp to ground at the base of QP
and QX when a ground is placed at point C.
Diodes NCRE and NCHF are antisaturation diodes that keep transistors QS and QT from
saturation.
Erase Driver - JBB

o
o

The JBB circuit controls the current driving the erase heads.

7-12) is a high voltage, output H provides current to erase heads.

When input E goes to a high voltage, capacitor CPA charges, causing a 10-usec delay
before transistors QR and QP turn on completely.
supply in a fault detect circuit.

C)

o
o
o
o

When input E (Figure

Output G is connected to a +40v

When QR is on, current flows from G through QR to the

erase head connected to output H.

The ramp output protects the information on neighbor-

ing tracks from being destroyed.
When E drops to Ov, CPA discharges through RPA.

After 10 usec, QP and QR are off.

Output H is at Ov.

83302400

A

7-17

-_..__._.__..__._.,_...... .. "._." ... ... ......
"

""

,-,

".--

.. .....
"

-•.

""".--,,...

,,~~.---.-----

_ - - - - - . - . -..-..-".-.--.,..-"..•. .....--."..

..

"

---~.---,-.-".~

o
o
o

31.4V

E

OV

37.4 V
H VOLTAGE
OV

t+-

10"S EC

I

H CURRENT

40 M A
'1

OM A

F

()

... 40'.1

()
RNE
(RPB)

IK
I

+40V

()
TP

G

E

()
TP

CNS

.::r:: (CPA)

H

"::" 2 200PF

-20V
NOTES

I.

I

VOLTAGE

AND

COMPONENT

VALUES

ARE

FOR

f

REFERENCE ONLY.

~

" " ..
,,/J

ITI07

Figure 7-12.

Erase Driver - .lBB

(''j'
Ringing Amplifier - MED

.

C"'-."'\

I

The MED circuit is a tuned amplifier which rings at twice the frequency of the "1 's"
data in the double frequency pattern.

The" l' s" data occurs at 2. 5 MHz, therefore,

the ringing amplifier is tuned to 5 MHz.
each transition of the data pattern.
forced once each cycle.

Energy to ring the amplifier is received at

For a "l's" pattern the ring~ng amplifier if rein-

For a "O'S" pattern every other cycle is reinforced with a

o
o

current pulse through transistor QP.

7-18

83302400

A

o
o

o
o

o
o

ONE'S
PATTERN

ZERO'S
PATTERN

o

o

o

DATA
PATTERN
A

I

t.

~ x/~:/y I

TP
/

7

is

+SV

A

-J
e MHz

o
o
o
o

S

-5 V

k-200 NS

£1 Vpp (REF)

~f4±lfVpp
)

~

,

+5V

+5V

RNC
270

RNE
150

RNA

TP

470

o

A

',
0

RND

LNA

15K

15J.LH

CNA
1-30 PF

CNS
47 PF

S

RNF
IK

NOTE: VOLTAGE AND COMPONENT VALUES
ARE FOR REFERENCE ONL~

-5V
8N9

I,

Figure 7 ... 13.

o
o

Ringing Amplifier - MBD

The tuned circuit consists of LNA, CNA and CNB.

CNA is tuned to 5 MHz.

RND

lowers the Q of the tuned amplifier to make it less susceptible to frequency changes

o
o
o
o

of the data.

The inertia of the tuned circuit does not permit it to respond to small

shifts in the data edges (peak shift), consequently the clock pulses reconstructed from
the output of the ringing amplifier have approximately 1/3 of the peak shift present at
the input.
Transistor QN is an

emitter follower necessary to buffer the tuned circuit.

o
o

83302400 A

7-19

0
0
0
0

>33 Hz

A

~

B

QDF

+5V
+5V
RNB
1.2 K

(,)

+20V
RNC
IK

RNE
15K

"::"
"::"

CRNA

(}

RND
10K

,

.".>J"

()

-20V
B

CRNS

If ''\

;,~y

RNF
12K

.CRND

(.)

"::"
"::"

-20V

/''''.

+5V

A

{~'

RNG
IK

RNA
820

~
CRNC

RNH

3.3K
-20V
NOTE: VOLTAGE AND COMPONENT VALUES
ARE FOR REFERENCE ONLY.

Figure 7-14.

8NI0

Relay Puller - QDF

()

Relay Puller - QDF
/

The QDF circuit energizes the speed relay when voltage and speed conditions are met.
The input at A must be

at ground

l

indicating that the spindle is up to speed.

RNG and RNH bias the base of QP negative to -20v turning QP off.
l

and RNE bias the base of QS positive to +20v.
QR at ground.

and pull the base of QQ positive.

7-20

o

Resistors RND

With QS turned on it holds the base of
l

Transistor QR is then turned off allowing RNB (QN, QP and QR

mon collector resistor) to rise toward +5v.
ground.

Resistors

COln-

CRNA and CRNB are then forward biased

Transistor QQ turns on and pulls its collector to

This ground energizes the speed relay.

83302400 A

o
o
o

o

o

o
o

o
o
o
o
o

®
% DROP FROM

-5V

X

-20V

ANY
INPUT
VOLTAGE

8

A OR B

-36V--X
+5V-X

NOMINAL

QEN

X

+20V

3V
OV

+36V--~

+40V-TP

TP
+5V

-20V

NRI

A

681

-=
NR3 EQQP
I.05K

-

NR4

~NR5

I.02K

-

RRI

-

-

681

RRI4
4.7K

NRI6
2.2K

TP

TP

o
c

B

aM

NOTES:

I. VOLTAGE AND COMPONENT VALUES ARE FOR REFERENCE ONLY.

®

5% DECREASE FROM NOMINAL ± 5V, 10% DECREASE FROM NOMINAL
OR 20%.. DECREASE FROM NOMINAL ±36V.

± 20V

OR +40V,

BN"

Figure 7-15.

o

o
o

+5V

+5V

o
o
o
o
o

TP

+5V

-20V

o

(J

A

83302400

A

Voltage Checker - QEN

7-21

o

o

V oltage Checker - QEN
The QEN circuit (Figure 7-15) detects any decrease in voltage supply greater than a
specified percentage.

o

o

A fault condition will occur at point A for a negative voltage

fault and at pOint B for a positive voltage fault if:

()

1.

-20 supply decreases below -IBv

2.

+20 supply decreases below +IBv

3.

+40v supply decreases below +36v

4.

-36v supply decreases below -2B. Bv

5.

+36v supply decreases below +2 B. Bv

6.

-5v supply decreases below -4. 75v

7.

+5v supply decreases below +4. 75v

If all positive supplies are normal, QRJ QSJ QTJ and QU are off.

Their emitters are

held at +6. 2v by Zener diode RVRI and the value of RR9 (determined by testing to give
a precise collector voltage). ··Current is pu.lled through QZ, causing a voltage drop
acros s resistor RR 13.

This voltage drop turns. QL on.

any of the voltage supplies drop below

t~e

If

specified percentage of their operating

values, the respective transistor turns on.
tor QLturns off.

Transistor QM turns off.

Transistor QZ will then be off.

Transis-

\~-)/

Transistor QM turns on, driving the output to ground.

The negative voltage segment of the circuit is similar to the positive section.
crease in the -20v supply below -IBv will turn QP on.
causing QW to turn off.
which turns QY on.

A de-

Transistor QV turns off,

Transistor QX turns on causing a voltage drop across NR14

;f "'.

~---)

The output drops to ground.

Function Generator - QGD
The QGD circuit (Figure 7-16) is a non linear feedback network used as the gain determining

o

elenlent for an operational amplifier.
With a 10K input resistor, an amplifier with the QGD circuit will exhibit high gain charac~
teristics for amplifier output voltages of less than ±2 volts.

A gain of unity is achieved at

output voltages ±5 volts with this gain persisting at higher voltages.

o
o

7-22

83302400

A

o

0

.'I'i

0

®~-=T>64
r QRl

0

"I

I {'

I \ .. ~II I

Ll-l.J
I
I
R2

r---- ..

0

L.J-y"yA.,..,

I

1

I

I

I

I

0
.-

A
RI
- _J',/\/',,_

0
0
0
0

-

I:

r _ ..
I L

0

..,

4_1-1 I>

I@

301

B

r - --

_-J

=:(, 10 K
--'=
RA
RB

46.4 K

~~CRA
RC

CRB~1l

..

0

CRD ~~

CRE
f!G

CRF ~~

0

CRH ~~

.R.J
v

"

RL

CRK ~~

46.4K

Oi

~~ CRL

Rt1
CRM .j~

R~

56.2K

~IrCRN

56.2K
RR

CRP 4~

~~

909K

~Ir CRR

0

46.4K

46.4K
RN

0

46.4K
RK

46.4K

~, CRJ

46.4K

RH

46.4K

~~CRG

56.2K

RF..

46.4K
~,

46.4K

R~

56.2K

~rCRC
RE

0

+

./
B- -'"

RT

CRS

h

909K

909K

~p
1
1!56 pF

1

0

B

A

NOTES;

0

I

VOLTAGE AND COMPONENT VALUES ARE FOR REFERENCE ONLY.

®.

PART OF GJB CIRCUIT (REF ONLY)' NEG INPUT TURNS QR OFF.

@

SHOWN

FOR

REFERENCE

ONLY.

STI39A

0
Figure 7-16.

0

Function Generator - QGD

0
0

0

83302400

A

7-23

_ _ _ _ _ "' _ _ _ ' __________________

~,

_______ ,__ , ____ , _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ ,_ _ _ _ _ "," __ "'_"_._'_. __ ,·"_" .. "·_.,,·_""_",,.,,.,_.,'."m".' ... '.,,.""••• ,_", _____ •••••• _ _

~

____... __

~,~

_____

.,~

__

~_~

o

o
o
o

"I"
A

"0"

o VOLTS
B

-e

-

-~

( ,i

VOLTS

()

TP

+ev

. , . . - - - - - - ( , JB

A
QR

NRB

6.8K

NOTE: VOLTAGE AND COMPONENT VALUES
ARE FOR REFERENCE ONLY.

-5V
TlCse

Figure 7 -17.

[:;'wd EOT Clamp - SAC

o
Fwd EOT Clamp - SAC
The SAC Circuit (Figure 7-17)

is a TTL level operated current sink.

The circuit sinks

current from the position transducer demodulator circuit to prevent erroneous FWD EOT
signals from appearing.

7-24

83302400 A

(;

o
o
o

o

o

o
o
o
o
o
o
o

o

Multiple Head Select Detector - SCF
The SCF circuit indicates +5 vdc at output B when no more than one head is selected.
If two or more heads are selected" output B is 0 vdc.

Capacitor NCA filters transient voltages preventing a false indication of more than one
head selected.

Diodes NCRA and NCRB provide a voltage bias on the emitter of QN.

Resistors NRA and NRB are a voltage divider network.
Input A is fed by all heads, each through 10K of resistance.

When one head is selected.

only one 10K resistor goes to ground through a head select transistor.

The current

flow through NRA will not cause sufficient voltage drop across NRB to forward bias QN.
When two or rnore heads are selected, two or more 10K resistors are switched to
ground.

This causes increased CUrrent through NRA.

then decreases enough to forward bias QN.
through NRC into the base of QP.

The voltage drop across NRB

QN turns on, passing collector current

QP turns on" bringing output C from +5 vdc to 0 vdc.

c
o

c

c
c
o
o
o
o
o

o

83302400

A

7-25

o
o
ONE HEAD SELECTED

t-----~----,

- -

- - - - - - -

+38.6V

-

A
1..-_ __ _ . _ - - - -

A

/ 4,-_s_:_~_:---

+37.4V

o
(}

TWO HEADS SELECTED

B

+5V
B
'---_

_ . _ _ - L . - - - - OV

()
B

(f ....')
i\..J
NRC
2.2K

QP

NRD

IK

NCA
O.022,.,.F

NRA

348
NCRB

I..-------__

---------~

__

~

+40V

NOTE: VOLTAGE AND COMPONENT VALUES ARE FOR REFERENCE ONLY.

Figure 7-18.

7K30

Multiple Head Select Detector - SCF

c
o
o

7-26

83302400

A

o
o
o

o

o

o
o
o
o

o
o
o

Delay'- UB
The capacitor delay circuits (Fip" "~19) delay a "1" input at A for a specified period of
time before providing a "1" output at B.
Assume a "0", ground, enters at A.

Delay time for a "0" pulse is negligible.

If the capacitor is discharged, it remains discharged

and the output remains "0". If the capacitor is charged when the "0" signal appears, the
capacitor discharges almost instantaneously. and the "0" appears with no noticeable delay.
If a "1 ", +3 volts. enters A while the capacitor is discharged. the capacitor must first charge

to a minimum "1" voltage before a "1" can appear at B.
delay time of the circuit.

The required charge time is the

The charge time is dependent on the capacitor value. the resist-

ance between the source voltage and the capacitor. and the minimum voltage required to
produce a "1" output.
Delay times for capacitive delays used in the DSU are as follows:
Time
200 nsec
O.5ms
0.2 ros

Delay type

UBn
UBE
UBF

c

+3V

o

ov

t2
I

A

B

UB-

+3V

ov

o

®

RNA

c
o

270

NOTEI:

0)

®

o

1:

08

lCD

CNA

VARIES WITH TYPE

NOT USED ON UIF

Figure 7-19.

ITISI

Delay - UB

o
o
o
o

8330240(J A

7-27

o
o
o
+3V

()

A

'-----ov

+3V

""\

( _~;/

8

I

----OV

(-~,
+5V
NRA

®

CD

A

/-~---~----------------------------~~8
I.....
\

---.,....

\ f..., /

I

/"

...

l~jY

'-~
I

~
NOTES:

/y

+O.1V
C

I

VKS

OV

I

+5V
C

o

o

ov
+5V

'AULT

o
o

....- -....oC

NRA
1.2K

o
o
o
c
c
o
o

OV

NRI
1.2K

QN

NRD
810'

1KII

NOTE: VOLTAGE AND COMPONENT VALUE. 1."1 Fa.. "'F'''INCI ONLY.

Figure 7-28.

Gated Level Translator - VKS

Gated Level Translator - VKS
The VKS circuit connects input A to the erase side of the DC Current Detector (VKR).
It converts the non-standard input level to a standard TTL level.

Transistor QN and resistors NRB and NR.c form an inhibit gate.

A fault indication is

passed on when input B is 0 vdc 1 and inhibited when input B is +0. 7 vdc.

o
o

o

\,

83302400

A

7-39

·............-...

-.-..

-~~---.------.-.------

o

o
o

+40V

A

I

l.

t>/y
VKT

OV

•

()
l

+5V
OV

+rsv

c;

...--.. . .n.

o

HRA
11K

A~-------JV~--------~~-----------------+~
NRB

I.IK

NOTE: VOLTAIE AND COMPONENT VALUE I ARE fOR REfERENCE ONLY.

Figure 7-29.

1KM

Erase Cutoff Detector - VKT

Erase Cutoff Detector - VKT

(?~

The VKT circuit converts a non-standard input A to a standard TTL level at output B.
When the erase circuit is on, input A is +40 vdc, QN is on, and output B is 0 vdc.

C

When erase is off, input A is 0 vdc, QN is off and output B is +5 vdc.

7-40

83302400

A

o
c
o
o
o

,

o
o
o
o
..

+'2V
OV

A

8

o
o
o
o
o
0

~ I

t>/y
C

+'2V

I

OV

VKU

+5V

C

OV

+5V

NRA
12K

6-------4D C

A~-----~~~----~
NRI
12K

QN

8~--------~~~--------~------------------~

1

C

Figure 7-30.

\

o
o

7K27

NOTE: VOLTAtE AND COMPONENT VALUES ARE FOR REFERENCE ONLY.

Write Shutoff Detector - VKU

Write Shutoff Detector - VKV
The VKU circuit is an "or" function that outputs Ov under normal write operations.

o
o

Inputs A and B come from the output of the Write Driver.
A or B turns QN on.

A voltage pre sent on either

If only half of the write driver is functioning

If neither side of the write driver is functioning

l

l

output C toggles.

output C is a static "1".

o
o

~

o
o
o

83302400 A

7-41

o
o
, . . - - - - - - - - +IY
A
OV

A-----~~_:_:_:~r~/~/---.

+40Y
I
' - - - - - - - - - - OV

()

.4OV

+5Y

...- - - 0 1

NRA
.10

NCRA
A~----~~--

__ ______ ____ ____ __
NCRI

~~

~

NCRC

~~

~

~

NOTI: VOLTA. AND COM'ONINT YALUI. MI ,Oft "I'I"INCI ONLY.

Figure 7 - 3 1.

.,eea.

Level Translator - VKW

Level Translator - VKW
The VKW circuit converts a logic "0" to a +40v (nominal) level used in the write circuitry.

When a logic" 1" is present at input A, transistor QN saturates and the output

0

goes to Ov.

o
o
o
7-42

83302400 A

o
o

0'/, ':,
'I

o
o

o
o

o
o
o

o

HEAD AND DISK PACK REPLACEMENT CRITERIA

HEAD REPLACEMENT CRITERIA
Heads of the DSU have been designed so that they should not need replacement if given proper
preventive maintenance and care.

If a head requires replacement refer to the Preface of

this manual for the publication containing the Maintenance section.
Head/Arm Replacement procedure.

Refer to that section for

A head is defective and needs replacing if any of the

following conditions exist:
1.

Consistent oxide buildup on head indicating repeated head / disk impact.

2.

Appreciable oxide buildup located primarily on the edge of the ferrite

in~ert,

indicating a warped head.
3.

Oxide or wear over 1/2 of the head face surface.

4.

A head which is scratched over 1/2 of the head face surface.

5.

Concentric scratches on disk surface.

6.

Audible ping indicating that the head is hitting -the disk surface.

Inspect the head for imbedded particles.

DISK PACK REPLACEMENT CRITERIA
The disk pack is designed to last the lifetime of the equipment.

Repla-eement of the disk

pack is required only if excessive runout (see Disk Pack Runout Check) is encountered or

o
o
o

physical damage to the pack results in the loss of recording ability.
. A disk pack is defective and needs replacement if any of the following conditions exist:

1.

Damage to the disk pack resulting in a bent or broken disk.

If a disk is bent

perform Disk Pack Runout Check procedure.
2.

Gouged or scored disk surface causing the loss of stored data.

3.

Imbedded particles in a disk surface that cannot be removed by cleaning and are
causing damage to the heads.

()
-

o
o
o
o

o

83302400

A

7-43

Disk Pack Runout Check
This procedure determines whether a bent disk pack may remain in use.

If the 'disk pack

o
o
o

fails to meet the requirements of the procedure, it should be returned to the manufacturer
for reconditioning.
1.

,

Open cabinet top cover.
"

(, ,l

2.

Install the disk pack to be checked on a DSU spindle.

3.

Grasp the pack cleaning brushes, override the shaft detent mechanism, and rotate

J.

("

the b::-ushes into the disk pack.
4.

",,-,
J'

Place the disk pack runout gage (P IN 84357600) base on the DSU deck base plate
(Figure 7 -32) adjacent to disk cleaner cutout 'in shroud.

5.

Turn the bezel of the dial indicator to indicate zero.

Orient the dial indicator so

that the plastic tip is not only contacting a disk surface but is deflected for an
indication of approximately O. 020 inch.

Tighten dial indicator in this position.

Turn the bezel to set the dial indicator to zero.

8
DISK PACK

DISK PACK RUNOUT GAGE

Figure 7 -32.

Disk Pack Runout Check

o
o
7-44

83302400 A

o
o

o

o

NOTE

o

o
•
o

o
o
o

A mirror is required to observe dial indicator
when some disk surfaces are checked.
6.

Manually and slowly rotate the disk pack one full revolution while carefully
observing the dial indicator.

7.

If a total deflection of O. 012 inch is encountered in step 6, recheck the indication.

The total deflection must occur in a disk circumference of 4 inches or more.

8.

Repeat steps 5 through 7 for the 19 remaining disk surfaces.

9.

Rotate the pack cleaning brushes clear of the disk surfaces.

10.

Remove the disk pack and the disk pack runout gage.

o
o

o
o
o

o
o
o
o

o
o

The sum of the deviations (to either side of zero)

should not exceed O. 012 inch.

83302400

A

-

__

~_u,'

o
o
o
.~"\

(......"'l'

(:

•
J'

c;,
(~;

(

"

...
Or

,;IJ

(~)

C:
C
Ci

o
C

o
o

o
o

0
0

I

Iii

I

-

I0
I0

I

~

I

Ii

I

I

I,

I

I
I

•

0

...

0
0
0
0
0

0
0
0
0

0
0

•
•
•
•
0

. SECTION 8
PAR,TS DATA
Information for this section is included in BR5A5
Disk Storage Unitl Publication No. 83302500.

0

1

01
~

()
.'

:,1

_..,\

(

_i

1

III
I

0

111

(.""'l .

'

'

()

o
o
-I

0;:

Oli

\0

10
10
.
I

o

10
I,

o
o
o

o
o

1°
I

o
o

•
•
•
•
•

SECTION 9
WIRE LISTS·

o
o
o

0 .
....

01:1

0:'
.,

I'

I

,
0_ ,)1

o
o

o
o
~

0

o
o
o

1

:

o

o
o
o
o
o
o
o
o
o

[
o
o
o
o

WIRE LISTS

DESCRIPTION OF WIRE LISTS

LOGIC WIRE LISTS
The following is an example of the logic wire lists with an explanation of the columns.

IIL

TITLE
LOGIC WIRE LIST

VCD-7866

1

SIGNAL NAME
OR NUMBER
IDENTIFICATION

ORIGIN

1

A627

A1231B

A1708B

1

2

A650

A1814B

A2007B

1

3

A66l

Al809B

A2022B

1

4

AlHi4

A1221B

AlllOUB

1

5

A665

A1222A

A1807B

1

LINE
NO.

fR!~·

IDOCUMENT N°'ISHEET NO.

DESTINATION

WIRE
l
COLOR LEVEL

General
Back panels are machine wired according to the following paragraphs.
operation prepares the unit for a number of operational options.

The wiring

A wire is installed

. for each entry in the list even if the unit does not contain the .logic card types
or complement to make full use of these options.
Wire Identification / Comment
If the identifier begins with a letter, the signal on the wire originates at the listed

logic term.
entries.

A multiple output is indicated when a term is repeated on successive line·

An additional digit at the end of the identifier denotes a second p,nd different

(generally a differential of the first) signal being originated by the term.
T023 - signal source is term T023
T0231 - last digit identifies a second and different signal being originated

o

o
o

•
•o

83302400 A

9-1

-"-.~

... "".".".-.' .•."'''.'''''.''.-'.''''''''''''''' ..--''''''.'' ....'''''-'.,.....

~,.-

.....................................~~ ........... ~ ....... ,-,

...

'''~'"''.-.,."

.. .. ..... .. .. . .
,

,~""

, ," "',.,

,

,..",,' ."

........"............. ,-."

.. .........
"~,

~,,

...-"',....... ,,"" ..

o
o
o

If the identifier begins with a numeral, the signal on the wire generally originates at

some point other than a logic term (switch, bus, test point, etc.).
adjacent Comment column provides a clarifying entry.

In this case', the

A multiple output is indicated

when the identifier is repeated on successive line entries.

o

Origin

()

o

This column locates the logic chassi.s wire wrap pin from which the identified wire
originates.
, . . - - - - - - - - - Logic chassis row D (rows identified vertic'ally A through D)

11

Card connector position 01 (positions identified horizontally
01 through 30)
,

()

-Lr-·-------Pin identifier (10 pins down and in the right-hand column)

DOIIOA

o

If this column is preceded by the'letter J, the origin is from one of the conne'ctors
above, below, or to either side of the area where the cards are installed.

The locator

()

(same as first four digits in this column) is etched alongSide each connector.
Destination
This column locates the logic chassis wir,e wrap pin to which the identified wire is
terminated.

The location information provided for the Origin column is also applicable

for this column.

o
c

Z Level
The Z level denotes the vertical separation which an installed wire has relative to the
surface of the wire wrap pin board.

This vertical separation is maintained at both

ends of the installed wire when it is wrapped on the pins.
distances are possible.

A numeral 1 in this column indicates the smallest separation.

A 3 in the column indicates the smallest separation.
largest separation.

o

Three vertical separation

A 3 in the column indicates the

o

A level of 2 is the intermediate separation level.

o
o
o

Wire Color
Not applicable.

o
9-2

83302400

A

a
o

0","',
"

o

o
o
o
o
o
o
o

NON-LOGIC WIRE LISTS
The following is an example of a non-logic wire list with an explanation of the columns.

I

TITLE

IDENTI'IE"

ORIGIN

WI"E COLO" WI"E
LENGT~

SIZE CODE

LOCATION

1

18

2

P5

1

20

0

PD5

:3

18

:3

PD5

20

4

PD5

5

20

2

PD5

6

18

5

PD5

o

[

LOCATION

1

2

TB100

2

:3

TBlOO

:3

6

TB100

4

5

TB100

5

4

SHIELD

DOCU"ENTNO.

l"rY

"E .... "KS

p~~

TBlOO

I

IIHEET NO.

DESTIN"TlON

p~~.

2

1---4

Wl

Conductor Ident.

- Not applicable to field usage

Wire Size

- Size of conductor (A WG)

Color Code

- Color information

Wire Length

- Length of conductor in inches

Origin

- Origin point of conductor

Destination

- De stination point of conductor

Remarks

- Useful comments

Color Code

c

o
o
o
o

Solid colored wires are identified by a one digit number in this column. Multicolored wires
are identified by a number having two or three digits. Each digit of the number identifies
one of the colors.

The code numbers are identified as follows:

o - Black

2 - Red

1 - Brown

3 - Orange

4 - Yellow
'5 - Green

6 - Blue

8 - Gray

7 - Violet

9 - White

S - Shield

In multi-digit color codes, the first digit denotes base color and the remaining digits denote
tracer colors.

o

o
o

•o

83302400 A

9-3

0

SIGNAL NAME
OR NUMBER
IDENTIFICATION

ORIGIN

1

A627

A123lB

A1708B

1

0
0
0

2

A650

A1814B

A2007B

1

(-~

3

A661

A1809B

A2022B

1

TITLE

I
LOGIC WIRE LIST

LINE
NO.

IL IDOCUMENT
N°'ISHEET NO.
VCD-7866
1
DESTINATION

A664

A122lB

A1808B

A665

A1222A

A1807B

1

6

A671

A1827B

A2024B

1

7

A674

A1221A

A1830B

1

8

A675

A1217B

A1826B

1

9

A683

Al123A

A1805B

1

10

A693

A1l29A

A1832B

1

11

A697

A1715B

A2031B

1
1

5

E
:.

WIRE
:2
COLOR LEVEL

1

4

r

_i

,

0

;.

12

IOOO

A0103B

AlOllA

13

I001

A0102B

A1012B

1

14

I002

A0109A

AlO13A

1

15

I003

AOl08A

A102lA

1

16

I004

A02l4A

A1006B

1

17

I005

A0203B

AlO07B

1

18

I006

A0202B

Al008B .

1

19

1007

A0209A

AlO05B

1

20

I008

A0208A

AlO05A

1

21

I009

A0303B

A1333B

1

22

IOlO

A0302B

A0908B

1

23

IOl1

A0309A

A1614B

1

24

IOl1

A16l4B

A1615A

2

25

I012

A03l5A

A1311A

1

26

BOO

A1326A

A1604B

1

27

nOl

A0207A

A1327B

1

28

n02

A1331B

A1707A

2

29

Il02

A1707 A

A2013B

1

30

n02

A1ll3B

A133lB

1

31

1102

Al710B

A2013B

2

32

1103

Al122A

A1315A

2

33

n03

A1122A

A1330A

1

34

n05

Al126A

A1324B

1

9-4

-------c------------------.------

()

C

0
0
r<'----'\

o

o
o
o
o
()

o
83302400

A

e

o

o

o
o
o
o
o
o
o
o
o

I WL IDOCUMENT
N°'ISHEET NO.2
VCD-7866

TiTlE

LOGIC WIRE LIST
SIGNAL NAME
OR NUMBER
IDENTIFICATION

ORIGIN

DESTINATION

1

Il05

A1114A

A1126A

2

2

1105

A1324B

A1617 A

2

3

!l06

A1325B

A1616B

1

'4

1112

A1329B

A1622B

1

5

1115

A0312B

A1321A

1

6

1119

A1024A

A1309A

1

7

I121

A0304B

A1305B

2

8

1121

A0207B

A0307B

1

9

1121

A0207B

A0211B

2

10

1121

A0112A

A0112B

2

11

1121

A1314A

JA8108A

1

12

1121

A0306B

A1314A

2

13

!l21

A01l2A

A0211B

1

14

1121

A0305B

A0306B

1

15

1121

A01l2B

A0304B

1

16

I125

A0210B

A0212B

1

17

!l25

A0309B

A0311B

1

18

1125

A0303A

A0309B

2

19

I125

A0311A

A1308B

1

20

I125

A0210B

A0302A

2

21

1125

A0311A

A0311B

2

22

I125

A0302A

A0303A

1

c

23

1127

A0110B

A01l1B

1

24

1127

A0104B

A0105B

1

o

25

1127

AOI04B

A0204B

2

26

1127

A0204B

A0205B

1

27

I127

AOI05B

AOI06B

2

28

I127

A0206B

A1313B

1

29

I127

A0106B

AOI07B

1

30

I127

A0205B

A0206B

2

31

1127

AOI07B

AOllOB

2

32

1129

A0310B

A1312A

1

33

!l30

A1l31A

A1310B

1

34

I130

A1310B

A1521B~

2

(J
o
o
o

o
o
o
o
o

LINE

NO.

83302400

A

IRE:.

WIRE
2
COLOR LEVEL

r

---p

9-5

o
IlL IDOCUMENT
NO.
VCD-7866

TITLE
LOGIC WIRE LIST
LINE
NO.

SIGNAL NAME
OR NUMBER
IDENTIFICATION

ORIGIN

DESTINATION

0
SHEET NO.
3

I134

A0312A

A1309B

1

2

I145

A0210A

A1313A

1

3

1200

A0909A

AI013B

1

4

1200

A1013B

A1607B

2

5.

1201

A0914A

A10I4B

1

6

1201

A1014B

A1607A

2,

7

1202

A0909B

A1014A

1

8

1202

A0905B

A0909B

2

9

1203

A1015B

A1605A

2

10

1203

A0914B

A1015B

1

11

1204

A0908A

AlOIA

1

12

1204

AlOIA

A1603B

2

13

1205

AI012A

A1610A

1

14

1206

A1009B

A1609A

1

15

1207

A10llB

A1604A

1

16

12ll

A1029B.

Al108B

1

17

1212

A1029A

All07B

1

18

1216

A1023B

A1213B

1

19

1218

A1003A

JA8108B

1

20

1260

A1016B

A1205B

I

21

1261

AI027A

A1207A

I

22

1262

A1023A

A1205A

1

23

1263

A10I5A

A1206B

1

24

1264

A1028A

AI203A

1

25

1265

A10I6A

AI208B

1

26

1266

A1024B

A1203B

1

27

1267

AI03IB

A1208A

I

28

1268

AI022B

A1202B

1

29

1383

A0211A

A0913B

I

30

1417

A0304A

A1632B

1

31

1420

A15I4B

A1613A

1

32

1423

AI5I5B

A1617B

1

33

1462

A0907A

A16I6B

1

A162IA

JA8109B

1

34

9-6

1463

"

'~

0

WIRE
l
COLOR LEVEL

1

L

IRE~.

0
()
#

0
0
0
0
C\
~"

I

I

I

~v

()

0
0

0
0
0
0

.

0
83302400

B

{)

0

o
o

o
o
o

o
o

o
o
o

o

TITLE

I
LOGIC WIRE LIST

IL IDOCUMENT
N°'ISHEET NO.
VCD-7866
4

SIGNAL NAME
OR NUMBER
IDENTIFICATION

ORIGIN

1

1464

A1615B

JA8109A

·1

2

1465

A1308A

A1~09B

1

3

1465

A082BB

4

1466

5

LINE
NO.

DESTINATION

WIRE
Z
COLOR LEVEL

2

A0906B

AdoBA
\
A16'23A

1467

A0906A

AIE~ 08A

1

6

1467

A0906A

A09 15A

2

7

1470

A1030A

AlB llA

1

8

1472

A1126B

A1G 06A

1

1

I

9

1472

A1126B

A1~05A

2

10

1473

A1605B

JA8~06A

1

11

1473

. JA8106A

JA8~06A

2

12

1473

A0306A

A1~05B

2

13

1476

A0910A

A1602A

1

14

1481

A0905A

A1614A

1

15

1507

Al123B

A1310A

2

16

1507

A1102A

A1310A

1

17

1507

A1123B

Ali27B

1

18

1508

A1109A

A1307B

1

,

,

I

19

1508

A1307A

A1S07B

2

20

1509

A1104A

A1226A

1

21

1513

A11.13A

A1721B

1

22

1514

A11'05A

Al716B

1

o

23

1516

A1~16A

A1603A

2

24

1516

A1216A

1

o
o
o
o

25

1516

A1022A

A1j15A

2

26

1518

A1131B

A1hoB

2

27

1518

A1028B

A1~31B

1

28

1526

A1~17B

A1~22B

1

29

1526

A1215B

A1317B

2

30

1526

A1l12A

A1~15B

1

o
o

•o

REV.
A

i

A1115A

;

\

1

A1125A

A13'04A

1

31

1527

32

I528

A1111B

A1128B

1

33

1560

A1231A

Al713B

1

34

1561

A12:30A

Al713A

1

83302400 A

;

9-7

I WL rOCUMENT N°·ISHEET NO.

TiTlE
LOGIC WIRE LIST

VCD-7866

SIGNAL NAME
OR NUMBER
IDENTIFICATION

ORIGIN

1

1562

A1230B

A1712B

1

2

1563

A1229A

A1711B

1

3

1564

A1229B

A1712A

1

4

1565

A1202A

A17P9B

1

5

1566

A1225B

A1710A

1

6

1575

A1110B

A12 i10A

1

7

1576

A1104B

A12i16B

1

8

1626

A1232A

A17b5B

1

LINE
NO.

DESTINATION

5

o
o
o
o
o

IRE~.

WIRE
Z
COLOR LEVEL

o

o
o
o
o

;

9

1631

A1304B

A1616A

1

1631

A1110A

A12,,32B

1

11

1631

A1232B

A1616A

2

12

1631

A0907B

A1110A

2

13

1632

A1121A

A1233B

1

14

1634

A1227B

A1722B

1

10

,,~

\

15

1635

A1228A

A17J7B

1

16

1636

A1228B

A1306A

1

17

1636

A1306A

A1306B

2

18

1637

A0307A

A1233A

1

19

1737

A0212A

A0813B

1

20

1743

A1612B

JA8110A

1

21

1801

A1511B

A1632A

1

22

1801

A1632A

A1633A

2

23

1824

A1516B

A1623B

1

24

K290

A0104A

A1026A

1

25

K290

A1026A

A1226B

2

26

K291

A0105A

A1003B

1

27

K291

A1003B

A1225A

2

28

K292

A0106A

A1017B

1

29

K293

AOI07A

A1021B

1

30

K294

A0110A

A1010B

1

31

K295

A01UA

AI007A

1

32

K296

A0204A

AI008A

1

33

K297

A0205A

A1006A

1

34

K298

A0206A

A1004A

1

9-8

~
~

()

c

o
o
c'
o

o
83302400

A

()

o

o

o
o
o

o
o
o
o

o
o

o
o
o

o
o
o
o
o
o

•

TITLE

WL

LOGIC WIHE LIST
SIGNAL NAME
OR NUMBER
IDENTIFICATION

ORIGIN

1

K400

A0310A

A1314B

1

2

K400

A1322B

A1624A

1

3

K400

A1314B

A1322B

2

4

K401

A1624B

JA8110B

1

5

K401

A1315B

A1624B

2

6

K403

A1517B

A1631A

1

7

K501

A1103A

A1223B

1

8

K507

AI027B

A1121B

1

9

K570

A1224B

A2028B

1

10

K572

A1227A

A2026B

1

11

L400

A1628B

JA8405B

1

12
13

MI05
Y404
Y404

Al114B
A0304A
A1621B

A1324A
A1631B
A1631B

1
1
2

14

Y500

All09B

A1224A

1

15

Y503

A1122B

A1211A

1

16

Y591

A1129B -

A1222B

1

17

Y592

Al124B

A1223A

1

18

10000

A1533A

it-

JA8403A

1

19

10010

A1532B

~

JD9314B

1

20

10020

A1503B

~

JD9313B

1

21

10030

A1727B

A1729B

2

22

10040

Al728B

A1805A

1

23

10050

A1728A·

A1806A

1

24

10060

A1809A

A2009B

1

25

10070

A1810A

A2010B

1

26

10080

A1833A

A1833B

1

27

10090 .

A1802A

A1802B

1

28

10100

A1321B

A1334A

2

29

10110

A0810B

A0834A

1

30

10111

A0807B

A0810B

2

31

10120

A0113B

A0133A

1

32

10130

A0213B

A0233A

1

33

10140

A0128A

A0128B

1

34

10150

A0313B

A0333A

1

LINE
NO.

83302400

B

DESTINATION

+

REV.

rOCUMENT N0'ISHEET NO.
VCD-7866
6

D

WIRE
l
COLOR LEVEL

,

9-9

o
TITLE

I

LOGIC WIRE LIST
LINE
NO.

SIGNAL NAME
OR NUMBER
IDENTIFICATION

ORIGIN

WL IDOCUMENT
N°'ISHEET NO,
VCD-7866
7.
DESTINATION

IREVC

WIRE
2
COLOR LEVEL

1

10160

A0328A

A0328B

1

2

10170

A0330A

A0330B

1

3

10175

A1816B

A2011B

1

4

10180

A0316A

JA8001A

1

5

10190

A0316B

JA8001B

1

6

10200

A0116A

JA8002A

1

7

10210

A0116B

JA8002B

1

8

10220

A0216A

JA8003A

1

9

10230

A0216B

JA8003B

1

10

10240

A0327A

JA8004A

1

11

10250

A0327B

JA8004B

1

12

10260

JA8005A

JA8111A

1

13

10270

JA8005B

JA8111B

1

14

10280

JA8011A

JD9410A

1

15

10290

JA8011B

JD9410B

1

16

10300

JA8012A

JA8401A

1

17

10310

JA8012B

JA8407A

1

18

10320

JA8013A

JD9301B

1

19

10330

JA8013B

JA8413A

1

20

10340

JA8014A

JD9408B

1

21

10350

JA8014B

JA8414B

1

22

10360

JA8011A

JD9411A

2

23

10370

JA8011B

JD9411B

2

24

10380

A0916B

JA8101A

1

25

10390

A0922A

JA8101B

1

26

10400

A0915B

JA8102A

1

27

10410

A0923A

JA8102B

1

28

10420

A0925B

JA8103A

1

29

10430

A0927A

JA8103B

1

30

10440

A0923B

JA8104A

1

31

10450

A0928A

JA8104B

1

32

10460

A0928B

.JA8105A

1

33

10470

A0930B

JA8105B

1

34

10480

A1933B

JA8106B

1

9-10

o
o
o
o

o
o
' . Y\
C

o
o

o
o
o

o
83302400

A

o

o

o
o

o
o

I WL IDOCUMENT
N°'ISHEET NO.8
VCD-7866

TITLE
LOGIC WIRE LIST
LINE
NO.

SIGNAL NAME
OR NUMBER
IDENTIFICATION

ORIGIN

DESTINATION

WIRE
2:
COLOR LEVEL

1

10481

JA8106B

JD9211B

2

2

10482

A1533B

JD9211B

1

3

10490

A1902B

JA8107A

1

o

4

10491

JA8107A

JD9209A

2

5

10492

A1502B

JD9209A

1

o
o
o
o

6

10500

A0901A

JA8107B

1

7

10510

JA8113B

JD9404A

1

8

10511

JA8113B

JD9404B

2

9

10520

JA8114A

JD9401A

1

10

10521

JA8114A

JD9401B

2

11

10530

JA8114B

JA9403B

1

12

10531

JA8114B

JA8403A

2

13

10540

A0929B

JA8201A

1

14

10550

A0929A

JA8201B

1

o

15

10560

A0927B

JA8202A

1

16

10570

A0924B

JA8202B

1

17

10580

A0926B

JA8203A

1

18

10590

A0926A

JA8203B

1

19

10600

A0922B

JA8204A

1

20

10610

A0916A

JA8204B

1

21

10620

A0921B

JA8205A

1

22

10630

A0917A

JA8205B

1

23

10640

A2033B

JA8206B

1

24

10641

JA8206B

JD9211A

2

25

10642

A1633B

JD9211A

1

26

10650

A2002B

JA8207A

1

27

10651

JA8207A

JD9209B

2

28

10652

A1602B

JD9209B

1

29

10660

A1001A

JA8207B

1

30

10670

A0801A

JA8208A

1

31

10680

A0804B

JA8208B

1

32

10600

A0802A

JA8209A

1

33

10700

A0805B

JA8209B

1

10710

A0803A

JA8210A

1

o

o
o
o
o
o

o
o
o

34

83302400

A

IRE:

9-11

,~

0
0
0
0

,',

TITLE

I

LOGIC WIRE LIST

I

WL IDOCUMENT
N°'ISHEET NO.
VCD-7866
9

SIGNAL NAME
OR NUMBER
IDENTIFICATION

ORIGIN

1

10720

A0804A

JA8210B

1

2

10730

A0805A

JA8211B

1

3

10740

A0806A

JA8212B

1

4

10750

A0807A

JA8213A

1

5

10760

A1733B

JA8213B

1

6

10761

A1833A

JA8213B

2

7

10770

A1702B

JA8214A

1

8

10771

A1802A

JA8214A

2

9

10780

A0701A

JA8214B~

1

10

10790

A1334A

JA8301A

1

11

10800

A1317A

JA8302B

1

12

10810

A1316B

JA8303A

1

13

10820

A1328B

JA8303B

1

14

10830

A1326B

JA8304A

1

15

10840

A1328A

JA8304B

1

16

10850

A1329A

JA8305A

1

17

10860

JA8305B

JD9311B

1

18

10870

A1331A

JA8306A

1

19

10880

JA8306B

JA8407B

1

20

10890

JA8307B

JD9301A

1

21

10900

JA8308A

JD9311A

1

22

10910

A1332A

JA8308B

1

23

10920

JA8309A

JA8406A

1

24

10930

JA8301B

JD9310B

1

25

10940

A1323B

JA8310A

1

26

10950

A1312B

JA8310B

1
1

LINE
NO.

!

DESTINATION

IRE~

WIRE
l
COLOR LEVEL

~

(;1

I

#

C;

I

I

27

10960

A1323A

JA8311A

28

10970

A1322A

JA8311B

1

29

10980

JA8313B

JA8411A

1

30

10990

A1301A

JA8314A

1

31

11000

JA8314B

JD9405A

1

32

11010

A1327A

JA8401B

2

33

11020

JA8402B

JD9402A

1

34

11030

JA8404B

JD9304B

1

9-12

()

o

o
o
o
o
o
o

o
83302400

A

o

o

o
o

o

TITLE

I

LOGIC WIR.E LIST
LINE
NO.

SIGNAL NAME
OR NUMBER
IDENTIFICATION

ORIGIN

IL IDOCUMENT
N°'ISHEET NO.
VCD-7866
10
.

DESTINATION

WIRE
Z
COLOR LEVEL

1

11031

JA8404B

JD9213A

2

2

11032

JD9213A

JD9213B

1

3

11033

JD9213B

JD9304B

2

4

11040

JA8408A

JD9408A

1

5

11050

JA8408B

JD9314A

1

6

11060

JA8409A

JD9409A

1

7

11070

A1725B

JA8409B

1

8

11080

JA8410A

JD9303B

1

9

11081

JD9302B

JD9303B

2

10

11090

A1333A

JA8410B

1

11

11100

. JA8412A

JD9313A

1

12

11110

JA8412B

JD9312B

1

13

11120

JA8413B

JD9303.A

1

14

11130

JA8414A

JD9407A

1

15

11140

A1330B

JD9305A

1

16

11150

A1327A

JD9305B

1

17

11160

A1729B

JD9306A

1

18

11170

A1724B

JD9306B

1

19

11180

A1734A

JD9307A

1

20

11190

JD9307B

JD9408A

1

o

21

11200

A1726B

JD9310A

1

22

11210

A1325A

JD9312A

1

o
o

23

o
o
o
o
o
o

c
o

o

rE~.
.

24
25
26
27
28
29
30
31

o
o

•o

32
33
34

83302400 A

9-13

o
IWL I

TITLE

I

ORIGIN

WIRE COLOR WIRE
IDENTIF IER
SIZE

1

24

CODE LENGTH

LOCATION

1

DESTINATION
PIN
NO.

LOCATION

VCD-7958

o

8
PA81

lA

EOl

1A

lB

~~

lB

"l

lB

lC

2A

2A

lD

2B

2B

lE

3A

3A

lF

3B

3B

lG

4A

4A

lH

4B

4B

lJ

5A

5A

tK

5B

58

lL

6A

6A

1M

6B

o..

o

G

o
c
o

6B

iN

7A

~,

lP

7B

EOl

7B

lQ

8A

E02

lA

lR

8B

.4~

lB

lS

9A

iT

9B

2B

lU

lOA

3A

tv

lOB

3B

lW

llA

4A

1X

11B

4B

lY

12A

5A

7A

lZ

12B

5B

lAA

13A

6A

lAB

13B

6B

2A

-

.-

.

-.

-.- .. .

lAC

~,

14A

~,

7A

lAD

PA81

14B

E02

7B

2A

E02

8A

EOl

8A

2A

EOl

8A

F02

8A

2B

E02

8B

EOl

8B

2B

EOl

8B

F02

-8a

2C

E02

9A

EOl

9A

2C

EOl

9A

F02

9A

2D

E02

9B

EOl

9B

24

----_.,-------_..
---_._------_.
.- ---.-.-..
. - - _ ..

_..

o

--.-.~--

_--

c

8

2D

EOl

9B

F02

9B

2E

E02

lOA

EOl

lOA

2E

EOl

lOA

F02

lOA

2F

E02

lOB

EOl

lOB

9-14

o

REMARKS

PIN
NO.

lA

2

IRE:

DOCUMENT NO.

SHEET NO.

READ/WRITE CABLE ASSEMBLY

o

o
o
o
o

o

_..

83302400

A

o

o

o
o
o
o
,o

o
o
o

o
o

SHEET NO.

READ/WRITE CABLE ASSEMBLY

o

o
o
o
o

e
o

•

ORIGIN

WIRE COLOR WIRE
IDENTIF IER
SIZE

CODE LENGTH

LOCATION

DESTINATION
PIN
NO.

LOCATION

PIN
NO.

2F

EOl

lOB

F02

lOB

2G

E02

l1A

EOl

l1A

2G

EOl

l1A

F02

l1A

2H

E02

l1B

EOl

l1B

2H

EOl

11B

F02

llB

2J

E02

l2A

EOl

t2A

2J

EOl

l2A

FOl

t2A

2K

E02

t2B

EOl

l2B

2K

EOt

l2B

FOl

l2B

2L

E02

l3A

EOl

l3A

2L

EOl

l3A

FOl

l3A

2M

E02

t3B

EOl

l3B

2M

EOl

l3B

FOl

l3B

2N

E02

l4A

EOt

l4A

2N

EOl

t4A

FOt

l4A

2P

E02

l4B

EOl

l4B

EOt

l4B

F01

t4B

3A

FOl

9A

F02

12A

3B

j~

9B

~~

·l2B

2P
3

o

IWL I

- TITLE

24

lOA

l3A

3D

lOB

l3B

3E

~,

l1A

l4A

3F

FOl

l1B

l4B

PA82

1A

1A

lB

lB

24

I

DOCUMENT NO.

VCD-7958

jREV A

REMARKS

8

3C

4

2

8

4A
4B

~~

4C

2A

2A

4D·

2B

2B

4E

3A

3A

4F

3B

3B

4G

4A

4A

4H

4B

4B

4J

5A

5A

4K

5B

5B

4L

6A

6A

4M

6B

4N

7A

~r

7A

4p

7B

F02

6B

4Q

~r

8A

FOt

7B
lA

4R

PA82

8B

FOt

lB

83302400 A

9-15

o
,~

TITLE

I

READ !WRITE CABLE ASSEMBLY
WIRE COLOR WIRE
IDENTIF IER

4-5
4-T

SIZE CODE LEI'lGTH

ORIGIN
LOCATION

PA82
.0

DESTINATION
PIN
NO.

9A
9B

LOCATION

FOl
~.

PIN
NO.

3A

4-V

lOB

3B

4-W

11A

4-A

4-X

HB

4-B

4-y

l2A

SA

4-Z

l2B

SB

4-AA

l3A

6A
6B

l3B
l4-A

4-AD

PA82

l4-B

"

FOl

3

I

DOCUMENT NO.

o
o
o

IREV

VCD-7958

A

REMARKS

2B

lOA

~,

I SHEET NO.

2A

4-U

4-AB
4-AC

WL

o

I

o
c'

7A
7B

()
()

v

0
(~
I
;

0
0
0
C;

0

0
9-16

83302400

A

0
0

o
o
o

o
o
o
o

o
o
o

WL

W4 HARNESS ASSEMBLY
WIRE tOLOR WIRE
IDENTIFIER
SIZE

o
,o
o

I I

TITLE

CODE LENGTH

ORIGIN
LOCATION

1

20

6

2

20

2

PD93

3

20

0

P4
PD93

P4

4

20

0

'5

20

0

P4

6

20

2

PD93

7

20

4

p4

8

20

0

PD93

9

20

4

P4

lOB

20

2

P4

10C

20

0

PD93

llA

20

2

P4

llB

20

0

lOA

PD93

llC
12

20

DESTINATION
PIN
NO.

J

14A
V

02B

w
04B
F

09A
E

07A
A
06B

LOCATION

PD93

P4
PD93

P4
PD93
p4
PD93

P4
PD93

P4
PD93

PIN
NO.

S
OBA
H

lOA
C
06A
B

P

.,305

1

P4

N

J)05

2

SHLD

P4

M

FLOATING

0

P4

K

J)06

2

20

0

S301

C

S300A

C

0

SJOOA

C

S300B

C

15

20

0

PD93

5A

5300A

NO

16

20

0

S300B

C

PD93

07B

17

20

6

PD93

llA

5303

NC

18

20

6

s303

C

PD93

llB

19

20

6

PD93

lOB

n06

01

20

20

0

5300B

NC

PD93

01B

21

20

0

PD93

12A

5301

NO

22

20

0

S300A

NC

PD93

OSB

23

20

0

PD93

12B

J322

01

24

20

0

PD93

03B

5301

' NC

25

20
2

nOO

1

PA18

09A

nOo

2

PA18

lOA

PA18

08A

2SB

0

25C

SHLD

()

26A

9

P301

5

PA18

04B

26B

0

P301

6

PAl 8

03B

PA18

04A

7

PA18

llB

8

pA.18

lOB

PA18

llA

24

26c

•e

REMARKS

03A

o
o
o
o

. A

R

20

27

{REV

L

13

26

VCD-7900

02A

P4

FLOATING

I

DOCUMENT NO.

1

01A

14

25A

SHEET NO.

5HLD

FLOATING

24

27A

9

27B

0

27C

SHLD

83302400 A

PJOl
P301
FLOATING

9-17

".

TITLE

1.1 SHEET

V/L

W4 HARNESS ASSEMBLY
WIRE COLOR WIRE

ORIGIN

IDENTIFIER
SIZE

28

CODE LENGTH

LOCATION

DESTINATION
PIN
NO.

LOCATION

PIN
NO.

NO.

/ DOCUMENT NO.

2

/REV

VCD-7900

B

REMARKS

o
o,
c

24

28A

9

P301

9

PA18

25B

28B

0

P301

10

PAl 8

24B

28C

sm.n

PA18

2.5A

FLOATING

29
29A

9

P301

11

PAl 8

29B

29B

0

P301

12

PA18

28B

sm.n

PA18

29A

30

24

6

P301

13

PA18

02A

29C

FLOATING

31

24

0

P301

14

PAl 8

01A

32

24

2

P301

1.5

PA18

33A

33

24

33A

4

J303

1

PA16

2.5B

33B

0

J303

2

PA16

25A

34A

9

J303

03

PA16

26B

J4B

0

n03

04

34c

sm.n

o
o
o

34

FLOATING

9

n04

02

35B

0

n04

01

3.5C

sm.n

36

20

6

37

24

38

24

39

27B
26A'

PAl 8

05A

24

35
3.5A

40

PA16
PA16

I

FLOATING

PA18

06A

PA18

07A

J322

02

S303

NO

6

PD93

13B

2

1'4

T

PD93

14B

20

2

1'4

n

PD93

13A

14

2

P6

3

REG

+v

1'4

y

41

14

0

p6

4

REG

qRD

42

14

6

p6

5

REG

-v

43

14

.5

P6

6

CHASSIS

()

GRD

44

14

2

p6

7

BACK PANEL +20V

45

14

0

P6

8

GRD

46

14

6

P6

9

BACK PANEL -20V

()

01

o
o

o
9-18

83302400 A

o
o

o
o
o
o
,o

o

o
o

o

TITLE

I

W7 CABLE ASSEMBLY
IDENTIFIER

1

SIZE CODE LENGTH

1A
1B
2

c
c

c
o
c

o

2B

•

LOCATIO N

PIN
NO.

4

PA01

26B

J100

40

0

PA01

26A

J100

41

L,

PA01

26B

J101

40

(I

PA01

26A

J101

41

4

PAQ1

2.5B

Jl00

42

3B

0

PA01

2.5A

J100

41

4A

4

PA01

2.5B

J101

42

4B

0

PAOl

2.5A

Jl01

41

4

PA01

23B

J100

43

0

PA01

23A

J100

44

4

.5

4

PA01

23B

J101

43

0

PA01

23A

J101

44

7A

4

PA01

24B

J100

4.5

7B

0

PA01

24A

J100

44

8A

4

PAOl

24B

Jl0l

4.5

8B

0

PAOl

24A

Jl0l

44

9A

4

PAOl

22B

Jl00

46

9B

0

PA01

22A

Jl00

47

4

PA01

22B

Jl01

46

0

PA01

22A

Jl01

47

9

10

24

24

24

24

lOA
lOB
11

24

11A

4

PAOl

21B

Jl00

48

11B

0

PAOl

21A

Jl00

47

12A

4

PAOl

21B

Jl01

48

12B

0

PA01

21A

J101

47

13A

4

PA01

31B

J100

14

13B

0

PA01

31A

J100

13

4

PA01

31B

Jl0l

14

12

14
14A

REMARKS

24

6B

8

A

24

6A

7

IREV

24

.5A

6

VCD-7890.

24

3A

13

o
o

DESTINATION
PIN
NO.

I DOCUMENT NO.

1

24

2A

3

LOCATION

I SHEET NO.

24

.5B

()

ORIGIN

WIRE COLOR WIRE

WL

24

24

24

83302400 A

9-19

I I

TITLE

WL

W7 CABLE ASSEMBLY
WIRE COLOR WIRE

ORIGIN

IDENTIFIER
SIZE

14B

CODE LENGTH

LOCATION

PIN
NO.

DESTINATION
PIN
NO.

PAOl

31A

JI0l

13

15A

4

PAOl

29B

JI00

11

15B

0

PAOl

29A

JI00

10

4

PAOl

29B

JI0l

11

10

16

0

PAOl

29A

17A

4

PAOl

30B

JI00

8

17B

0

PAOl

30A

J100

10

18A

4

PAOl

30B

JI0l

8

18B

0

PAOl

30A

JI0l

10

19A

4

PAOl

32B

JI00

12

19B

0

PA01

32A

JI00

13

20A

4

PAOl

32B

JI01

12

20B

0

PAOl

32A

JI01

13

21A

4

PA02

21B

JI00

60

21B

0

PA02

21A

JI00

59

22A

4

PA02

21B

JI01

60

22B

0

PA02

21A

JI0l

59

4

PA02

22B

JI00

58

0

PA02

22A

JI00

'59

24A

4

PA02

22B

JI0l

58

24B

0

PA02

22A

JI0l

59

25A

4

PA02

23B

JI00

75

25B

0

PA02

23A

JI00

74

26A

4

PA02

23B

JI0l

75

26B

0

PA02

23A

J101

74

27A

4

PA02

24B

J100

24

27B

0

PA02

24A

JI00

23

16B

19

20

21

22

23

26

27

28

9-20

o,
o
c

c

24

24
(~"'-",

i,;ty

24

24

c

24

24

23B

25

REMARKS

24

23A
24

IREV A

24

JI0l

18

VCD-7890

24

16A

17

I

DOCUMENT NO.

2

LOCATION

0

15

SHEET NO.

o
o
o

o

24

o

24

o

24

o

24

24

83302400

A

o
o
o

o

o
o

o
o
o
o

'-,I

o
o

o

co
o
o

o
o

W7 CABLE ASSEMBLY
WIRE COLOR WIRE

•

ORIGIN

IDENTIF IER
SIZE

CODE LENGTH

LOCATION

DESTINATION
PIN
NO.

LOCATION

PIN
NO.

4

PA02

24B

J101

24

0

PA02

24A

J101

23

4

PA02

25B

J100

51

0

PA02

25A

J100

50

4

PA02

2.5B

J101

51

0

PA02

25A

J101

50

31A

4

PA02

26B

J100

49

31B

0

PA02

26A

J100

50

32A

4

PA02

26B

J101

49

32B

0

PA02

26A

J101

50

28A
28B
29

29B
30

30B

32

:33

PA02

28B

J100

07

33B

PA02

28A

J100

05

34A

4

PA02

28B

J101

34B

0

PA02

28A

J101

07
'05

35A

4

PA02

29B

J100

01

35B

0

PA02

29A

J100

02

36A

4

PA02

29B

J101

01

36B

0

PA02

29A

Jl01

02

37A.

4

PA02

30B

Jl00

'70

37B

0

PA02

30A

Jl00

71

4

PA02

30B

Jl01

70

0

PA02

30A

Jl01

71

39A

4

PA02

31B

J100

04

39B

0

PA02

31A

J100

05

40A

4

PA02

31B

J101

04

40B

0

PA02

31A

J101

05

41A

4

PA02

32B

J100

03

41B

0

PA02

32A

J100

02

37

38

A

REMARKS

24

24

24

24

38B

41

!REV

24

38A

39

VCD-7890 .

24

0

36

DOCUMENT NO.

24

4

35

I

24

33A

34

N~.

24

30A

31

H EET

24

29A

40

o
o

IWLis

TITLE

24

24

24

83302400

A

9-21

o
JJ

TITLE

WL

W7 CABLE ASSEMBLY
WIRE COLOR WIRE

ORIGIN

IDENTIF IER
SIZE

42

CODE LENGTH

LOCATION

DESTINATION
PIN
NO.

LOCATION

PIN
NO.

4

PA02

32B

Jl0l

03

42B

0

PA02

32A

Jl0l

02

43A

4

PA03

21B

Jl00

54

43B

0

PA03

21A

Jl00

53

44A

4

PA03

21B

Jl01

54

44B

0

PA03

21A

Jl01

53

45A

4

PA03

22B

Jl00

57

45B

0

PA03

22A

Jl00

56

46A

4

PA03

22B

Jl01

57

46B

0

PA03

22A

Jl01

56

47A

4

PA03

23B

Jl00

64

47B

0

PA03

23A

Jl00

63

4

PA03·

23B

Jl01

64

0

PA03

23A

Jl01

63

4

PA03

24B

Jl00

52

0

PA03

24A

Jl00

53

50A

4

PA03

24B

Jl01

52

50B

0

PA03

24A

Jl01

53

51A

4

PA03

25B

Jl00

55

51B

0

PA03

25A

Jl00

56

4

PA03

25B

Jl0l

55

0

·PA03

25A:

Jl0l

56

4

PAO}

26B

Jl00

62

0

PA03

26A

Jl00

63

44

45

46

47

48

o
(~

24
i

o

24

o

24

24

54A

4

PAO}

26B

Jl0l

62

.54B

0

PAO}

26A

Jl01

6}

4

PA03

29B

Jl00

21

9-22

o

24

53B

55A

.0

24

53A

55

o

24

52B

.54

REMARKS

24

52A

53

A

24

49B

52

VCD-7890.

24

49A

51

o
o

IREV

24

48B

50

DOCUMENT NO.

24

48A

49

4

I

24

42A

43

SHEET NO.

24

83302400

A

o
o
o

o

o
o

o
o
o
o

o
o

o
o

c
o

o
o

I I

TITLE

WL

W7 CABLE ASSEMBLY
WIRE COLOR WIRE
IDENTIF IER

SIZE

CODE LENGTH

ORIGIN
LOCATION

DESTINATION
PIN
NO.

LOCATION

PIN
NO.

0

PA03

29A

Jl00

20

4

PAo3

29B

Jl0l

21

0

PA03

29A

Jl01

20

57A

4

PA03

31B

Jl00

17

57B

0

PA03

31A

Jl00

16

58A

4

PA03

31B

Jl0l

17

58B

0

PA03

31A

J101

16

4

PA03

32B

Jl00

18

0

PA03

32A

Jl00

20

4

PA03

32B

Jl0l

18

0

PA03

32A

Jl0l

20

4

PASO

13A

Jl00

65

0

PABO

14A

J100

66

62A

4

PA80

13A

Jl0l

65

62B

0

PASO

14A

Jl01

66

55B

5

I

DOCUMENT NO.

VCD-7890

IREV

A

REMARKS

24

56
56A
56B

24

57

24

58

24

59
59A
59B
60

24

60A
60B
61

24

61A
61B
62

SHEET NO.

24

63

24

0

PASO

12A

Jl00

76

64

24

0

PASO

12A

Jl01

76

65

20

2

PABO

14B

Jl00

77

66

20

2

PASO

12B

Jl01

77

67

20

2

PA80

13B

J100

78

68

20

2

PASO

UB

J101

'79

69

2Q

2

PA80

llA

Jl0l

79

o
o
-

o

•o
•

83302400

A

9-23

o
TITLE

IISHEET NO.

WL

W8 CABLE ASSEMBLY
IDENTIF IER

1

WIRE COLOR WIRE
SIZE CODE LENGTH

ORIGIN
LOCATION

DESTINATION

PJ~.

LOCATION

PIN
NO.

1

I

DOCUMENT NO.

lREV

A

VCD-7944

REMARKS

24

o
o
o

lA

4

PA80

lB

Jl02

21

lB

0

pABO

11

Jl02

26

o

4

PA80

2B

Jl02

22

C

PASO

2A

Jl02

27

o
o

2

24

2A
2B
3

24

3A

4

PABO

4B

Jl02

2:3

:3B

0

PA80

4A

Jl02

2S

Jl02

12

J102
COND
IDENT 4A
COND
IDENT 4B

12

Jl02

5
5

4
COND
IDENT 5
COND
IDENT 6

4A

COAX

4B

SHLD

5

24

4

2

PA80

:3B

6

24

0

:3

PA80

3A

5B

o
o
c'

7
7A

COAX

7B

SfU.n

8

24

4

2

COND
IDENT 8
COND
IDENT 9
PA80

:3

9

24

0

PA80

5A

Jl02
COND
IDENT 7A
COND
IDENT 7B

10

14

0

GND.

03

Jl02

10

11

14

0

GND

04

J102

11

..

c

o
o
o
C:

o
o
9-24

83302400 A

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o
o
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TITLE

WlS CABLE ASSEMBLY
IDENTIFIER

1

WIRE
SIZE

COLOR
CODE

WIRE
LENGTH

1

1DOCUMENT NO.

VCD-79S6

IREV.

A

DESTINATION

ORIGIN
LOCATION

1SHEET NO.

p~~

LOCATION

,PJ~

REMARKS
".

24

lA

8

PA83
At

lA

IB

IB

lC

2A

PI
4~

lA
IB
2A

ID

2B

2B

IE

3A

3A

IF

3B

3B

IG

4A

4A

IH

4B

4B

IJ

SA

SA

lK

SB

SB

lL

6A

6A

1M

6B

6B

IN

7A

7A

IP

7B

7B

10

8A

8A

lR

8B

8B

IS

9A

9A

IT

9B

9B

lU

IDA

IDA

IV

lOB

lOB

lW

11A

11A

1X

11B

11B

IV

12A

12A

1Z

12B

12B

lAA

13A

13A

13B

13B

lAB
lAC

.r

14A

•

14A

1An

PA83

14B

PI

14B

o
o
o

•

83302400

A

K~R 0512A
9-2S

0
TITLE

POWER SUPPLY
IDENTIFIER

WIRE
SIZE

COLOR
CODE

IW L

77814700 - 60 HZ
77814600 - 50 HZ
WIRE
LENGTH

ORIGIN
LOCATION

HEET
r

rOCUMENT NO.
NO.

1

I

IREV.

VCD-7091

DESTINATION

/p~~

LOCATION

PJ~

REMARKS

1

20

0

START SW

OV

SSWI

3

USED IN 50 HERTZ UNITS ONLY

2

20

6

SSW3

4

SSWI

4

USED IN 50 HERTZ UNITS ONLY

3

20

6

SSW3

4

START SW

-20

USED IN 50 HERTZ UNITS ONLY

4

20

6

START SW

OUT

SSW3

3

USED IN 50 HERTZ UNITS ONLY

12

0

TB2

1

CBIA

LINE

3

LINE

0
"
Oi
..
C
CI

5
6
7

12

3

TB2

8

12

5

TB2

5

CBIB
FILTER
CHASSIS

9

12

5

TB2

5

TBI

3

~o

12

_Q

_CBIA

LOAD

FLl

LINE

11

12

3

CBIB

LOAD

FL2

LINE

12

20

0

FLI

LOAD

J5

1

13

12

0

FLI

LOAD

T6

1

14

14

0

FLI

LOAD

SSW2

1

15

20

3

FL2

LOAD

J5

3

16

12

3

FL2

LOAD

T6

2

17

14

3

FL2

LOAD

SSWI

1

18

20

3

SSW1

2

TB3

4

19

20

0

SSWI

3

SSW2

3

SSW2

4

·0
0

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20

6

SSW1

4

21

20

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2

TB3

3

22

20

0

SSW2

3

TBI

8

USED IN 50 HERTZ UNITS ONLY

22

20

0

SSW2

3

SSW3

3

USED IN 60 HERTZ UNITS ONLY

23

20

6

SSW2

4

SSW4

4

24

20

0

SSW)

3

TBI

8

c

USED IN 60 HERTZ UNITS ONLY

25

20

4

SSW4

1

F3

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26

16

0

J2

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SSW3

1

27

16

4

J2

2

SSW3

2

28

20

6

J2

3

SSW3

4

USED IN 60 HERTZ UNITS ONLY

29

20

6

J2

4

SSWI

4

USED IN 60 HERTZ UNITS ONLY

30

14

0

J2

5

SSW2

2

31

16

5

J2

6

TBI

3

32

14

3

J2

7

SSWI

2

33

20

5

J2

8

TBI

3

34

16

4

J3

1

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36

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37

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38
39
40

16

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TBI

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9-26

KPH 0512A
83302400

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o
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SHEET NO.

POWER SUPPLY
SIZE

o
o
o

20

42

20

43

20

44

20

45

20

46
47

o
o

o

c
o
o

ORIGIN

WIRE COLOR WIRE
IDENTIF IER

41

o

IWl I

TITLE

CODE LENGTH

0

LOCATION

DESTINATION
PIN
NO.

LOCATIO N

PIN
NO.

J4

A

TB1

7

0

J4

B

TBl

6

0

J4

C

TBl

6

2

J4

D

F6

B

6

J4

E

TBl

11

20

2

J4

F

TBl

1

20

I)

J4

H

K4

L2

48

20

6

J4

J

F2

B

49

20

0

J4

K

TBl

8

50

20

2

J4

L

Fl

B

51

20

5

J4

M

TBl

3

52

20

0

J4

N

C13

NEG

53

20

6

J4

P

SSW4

54

20

6

J4

R

ssW4

:3

55

20

2

J4

s

CB5

LOAD

56

20

2

J4

T

CB4A

LOAD

57

20

0

J4

V

K2

L2

58

20

6

J4

W

ssw4

4

59

20

6

J4

Y

CB4B

LOAD

60

20

5

J5

2

TBl

:3

LOAD

I

DOCUMENT NO.

VCD-7091

[REV

A

REMARKS

2

61
62
63

14

2

J6

3

cB6A

64

14

0

J6

4

C17

65

14

6

J6

5

cB6B

LOAD

66

14

5

J6

6

TBl

4

NEG

67

16

2

J6

7

F4

B

o
o

68

14

0

J6

8

C14

NEG

69

16

6

J6

9

F5

B

70·

12

3

Tl

1

T6

1

71

12

3

Tl

2

T6

2

72

18

4

Tl

4

Cl

2

o

73
74

18

4

Tl

7

Cl

1

75

18

4

Tl

7

CR8

ACl

76

18

4

Tl

8

CR8

AC2

77

14

4

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9

CR1B

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78

14

0

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10

C12

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80

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9-27

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1WL 1

TITLE

SHEET NO.

POWER SUPPLY
WIRE COLOR WIRE

ORIGIN

IDENTIFIER
SIZE

CODE LENGTH

LOCATION

DESTINATION
PIN
NO.

LOCATION

P~~

81

20

4

T1

12

F3

T

82

14

4

T1

12

CR3B

AC

83

14

0

Tl

13

C15

POS

84

14

4

Tl

14

CR3A

AC

86

20

:>

T6

1

TB3

1

87

20

T6

2

TB3

2

88

18

:I
4

T6

4

C8

1

89

18

4

T6

5

C8

2

90

14

4

T6

6

CR5

ACl

91

14

0

T6

7

c4

POS

92

14

4

T6

8

CR5

AC2

94

14

4

CRiA

AC

CR2A

AC

95

14

2

CRt

POS

c17

POS

96

14

4

CR1B

AC

CR2B

AC

97

14

6

CR2

NEG

C12

NEG

98

14

4

CR3A

AC

CR4A

AC

99

14

4

CR3B

AC

CR4B

AC

101

14

2

CR3

POS

C13

POS

3

.......

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,

I

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DOCUMENT NO.

VCD-7091

IREV

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REMARKS

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o

85

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o

93

100

102

14

6

CR4

NEG

c15

NEG

103

14

4

CR5

AC1

CR6

AC1

104

14

4

CR5

AC2

CR6

AC2

105

14

2

CR5

DC

C5

POS

106

14

6

CR6

DC

K2

2C

107

14

6

CR7

AC

K2

lC

108

14

2

CR7A

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C5

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109

14

6

CR7B

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c4

NEG

110

18

2

CRB

POS

C2

POS

111

, 20

0

CRB

NEG

C2

NEG

113

18

2

C2

POS

CB5

LINE

114

20

0

C2

NEG

Rl

T

115

12

0

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14

0

c4

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112

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116
117
118

12

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119

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120

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6

c4

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9-28

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83302400

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TITLE

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/'

POWER SUPPLY
IDENTIFIER

WIRE
SIZE

COLOR
CODE

WIRE
LENGTH

ORIGIN
LOCATION

/ SHEET NO.

IDOCUMENT NO.

4

VCD-7091

I

REV.

DESTINATION

)J§

LOCATION

REMARKS

'lJ§

121

20

2

C5

POS

K4

122

14

2

C5

POS

CB4A

123

14

0

C5

NEG

TBI

8

124

12

0

C12

POS

C13

NEG

125

14

6

C12

NEG

CB6B

LINE

3C
LINE

126

14

2

C13

POS

L2

1

127

20

2

C13

POS

Fl

T

128

14

0

C13

NEG

CIS

POS

F4

T

P~S

129

16

2

C14

130

20

2

C14

POS

R9

T

131

14

4

C14

P~S

L2

2

132

20

2

F4

B

TP5

133

14

0

C14

NEG

C16

P~S

134

14

0

CIS

POS

C16

P~S

135

20

6

CIS

NEG

F2

T

136

14

2

CIS

NEG

L3

1

137

14

4

C16

NEG

L3

2

138

16

6

C16

NEG

F5

T

139

20

6

C16

NEG

R9

B

140

20

6

F5

B

TPI

142

14

2

Cl7

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CB6A

143

20

2

C24

POS

K4

Ll

144

20

0

C24

NEG

R29

L

146

20

2

CB4A

LINE

RI8

B

147

20

6

CB4B

LINE

R18

T

148

14

6

CB4B

LINE

K2

lA

149

14

2

CB4A

LOAD

TBI

2

150

20

2

CB4A

LOAD

TP6

I

I

"

141
LINE

145

o
o
o

o

•

151

14

6

CB4B

LOAD

TBI

152

20

6

CB4B

LOAD

TP2

153

20

2

CBS

LINE

Rl

154

20

2

CBS

LOAD

TP8

10

B

155

20

2

CBS

3D

Fl

B

156

20

2

CBS

5B

CB6

3D

157

20

2

CB6A

LINE

R2

T

158

20

6

CB6B

LINE

R2

B

159

20

2

CB6A

LOAD

TP7

83302400

E

K_~0512A
9-29

o
TITLE

r

·0

HEET

WL

11

POWER SUPPLY
IDENTIFIER

WIRE
SIZE

COLOR
CODE

WIRE
LENGTH

ORIGIN
LOCATION

NO.

IDOCUMENT NO.

5

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REV.

DESTINATION

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LOCATION

PJ~_

160

20

6

CB6B

LOAD

161

20

2

CB6

5B

K4

Ll

162

20

0

K4

L2

R29

R

REMARKS

TP3

163

20

0

K4

3B

K2

Ll

164

14

4

K4

4A

TBI

5

165

14

4

K4

4C

K2

IB

166

20

0

TBI

8

TP4

167

20

5

TBI

8

TBI

3

168

20

2

F6

T

C5

POS

169

12

0

CBIA

LOAD

AUTO-TRANS

1

USED IN BR5A5 DIE UNITS ONLY

170

12

3

CBIB

LOAD

AUTO-TRANS

6

USED IN BR5A5 DIE UNITS ONLY

171

12

1

FL2

LINE

AUTO-TRANS

2

USED IN BR5A5 DIE UNITS ONLY

172

12

5

TB2

5

AUTO-TRANS

173

20

5

TB2

SHLD GND

o
o

USED IN BR5A5 DIE UNITS ONLY
USED IN BR5A5 DIE UNITS ONLY

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83302400

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TITLE

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WL 1SHEET

POWER DISTRIBUTION
WIRE COLOR WIRE
IDENTIFIER

SIZE CODE LENGTH

ORIGIN
LOCATION

DESTINATION
PIN
NO.

LOCATION

P~~

1

12

0

Pi

X

TB2

1

2

12

:3

Pi

Y

TB2

2

:3

12

2

Pi

Z

TB2

:3

4-

12

9

Pi

N

TB2

4-

5

12

!,

P1

G

TB2

5

NO.

1

I

DOCUMENT NO .

VCD-7802

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83302400 A

9-31

o
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IWL

TITLE

POWER DISTRIBUTION
ORIGIN

WIRE COLOR WIRE
IDENTIFIER

SIZE CODE LENGTH

LOCATION

DESTINATION

p~~.

LOCATION

PIN
NO.

1

12

5

TB2

5

TB12

5

2

12

0

TE2

1

TB12

1

3

12

9

TB2

3

TB12

3

4

14

3

Jl

A

TB12

3

5

14

:'I

Jl

B

TB12

2

6

14

:I

Jl

C

TB12

1

7

14

3

Jl

D

J2

D

8

14

3

Jl

E

J2

E

9

14

3

Jl

F

J2

F

10

14

:3

Jl

G

TB12

11

14

3

J2

A

TB12

5
1

12

14

:3

J2

B

TB12

3

13

14

3

J2

C

. TB12

2

14

14

3

J2

G

TB12

5

I SHEET NO.

I DOCUMENT NO.

1

VCD-7874.

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SECTION 10

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EQUATION SUMMAR·Y

10
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(Not Applicable)

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COMMENT SHEET
PLEASE COMPLETE ITEMS 1 rt:lRU 11

From
(I) NAME

(2) DEPARTMENT OR ATTENTION OF
(5) STREET ADORESS

(4) CITY AND STATE

Manual
Information

(From Revision Record)

Equipment
In forma t ion

(From Equipment
Nameplate & FCO Log)

(9) ~QUIPMENT NO. AND DESCRIPTION

US) MANUAL TITLE
(6) PUBLICATION NO.

1'7) REVISION

(8) FCO'S INCORPORATED INTO MANUAL

(10) SERIES CODE
(II) FGO'S INCORPORATED INTO EQUIPMENT

Comments

This form is not intended to be used as an order blank. Your evaluation of this manual will be welcomed by Control Data
Corporation. Any errors, suggested additions or deletions, or general comments may be made above. Please include
references to figure number, assembly number and design configuration level.

NO POSTAGE STAMP NECESSARY IF MAILED IN U. S. A.
FOLD ON DOTTED LI..,ES ANO STAPLE

STAPLE

0

STAPLE

0
0
0

0

•

•

0
C
FOLD

c;

FOLD

-------------------------------------------~
FIRST CLASS
PERMIT NO. 8241

J

MINNEAPOLIS, MINN.

BUSINESS REPLY MAIL
NO POSTAGE STAMP NECeSSARY IF MAILED IN U.S.A.

C'
CI
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w

z

:::;

C>
Z

0....I

«
POSTAGE WILL BE PAID BY

I

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~

:::>

CONTROL DATA CORPORATION

Technical Publications Department
7801 Computer Avenue
Minneapolis MN 55435

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