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User Manual: AC-7883F-MC_CCMFAF0-MS11_MF11_MA11-P-Mem_Feb78
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-' - 4i§8II ,..$>001(>' .XEROX COPIES=02,FORMS=NONE,END; TY TEST MACYll 30A(1052) 13-JAN-78 CCMFAF.Pl1 13-JAN-78 12:13 . REM 12:27 PAGE 1 CCMFAFO. MEMORY PARI SEQ 0001 *. IDENTIFICATION PRODUCT CODE: AC-7SB3F-MC PRODUCT NAME: CCMFAFo MS11, MF11, MA11-P MEM DATE RELEASED: FEB 1978 MAINTAINER: DIAGNOSTIC GROUP COPYRIGHT (C) 1973, 1978 DIGITAL EQUIPMENT CORPORATION, MAYNARD, MASS. THIS SOFTWARE IS FURNISHED UNDER A LICENSE FOR USE ONLY ON A SINGLE COMPUTER SYSTEM AND MAY BE CPPIED ONLY WITH THE INCLUSION OF THE ABOVE COPYRIGHT NOTICE. THIS SOFTWARE, OR ANY OTHfR COPIES THEREOF, MAY NOT BE PROVIDED OR OTHERWISE MADE AVAILABLE TO ANY OTHER PERSON EXCEPT FQq USE ON SUCH SYSTEM AND TO ONE WHO AGREES TO THESE LICENSE TERMS. TITLE TO AND OWNERSHIP OF THE SOFTWARE SHALL AT ALL TIMES RfMAIN IN DEC. THE INFORMATION IN THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE AND SHOULD NOT BE CONSTRUED AS A COMMITMENT BY DIGITAL EQUI~MENT CORPORTATION. DEC ASSUMES NO RESPONSIBILITY FOR THE USE OR RELIABILITY OF ITS SOFTWARE ON EQUIPMENT WHICH IS NOT SUPPLIED BY DEC. " . . CCMFAFO, MEMORY PARITY TEST CCMFAF.P11 13-JAN-78 12:13 1.0 MACY11 30A(1052) 13-JAN-78 12:27 PAGE 2 SEQ 0002 ABSTRACT THIS PROGRAM LOCATES THE PARITY MEMORY REGISTERS FOR BOTH THE CORE AND MOS PARITY MEMORIES .AND PREFOR~S A CHECK OF THE BITS IN EACH. IT THEN CREATES A MAP SHOWING THE MEMORY CONTROLLED BY EACH PARITY REGISTER. THE PARITY REGISTERS AND THE MEMORY ARE THEN TESTED USING THE INFORMATION IN THE MAP. 2.0 REQUIREMENTS 2.1 EQUIPMENT PDP-11 WITH MF11-LP OR MA11-P PARITY MEMORY (CORE), MS-11 (MOS) PARITY MEMORY 2.2 STORAGE THE PROGRAM REQUIRES 4K OF MEMORY TO LOAD AND 8K TO RUN. 3.0 LOADING PROCEDURE LOAD PROGRAM INTO MEMORY USING ABS LOADER. OR XXDP. 4.0 STARTING PROCEDURE 4.1 STARTING ADDRESSES 200= 220= 230= 4.2.1 NORMAL (WORST CASE) TESTING ROUTINE TO SCAN FOR BAD PARITY RESTART OF NORMAL TESTING- USES PREVIOUS MAP OF PARITY MEMORY PROGRAM AND/OR OPERATOR ACTION LOAD STARTING ADDRESS. SET DESIRED SWITCH REGISTER SETTINGS (SEE 5.1- ALL DOWN PRESS START. IF SA 200 OR RESTART ADDRESS 230 IS USED, THE BELL WILL COMPLETION OF EACH PASS AND END PASS= XXX WILL BE TYPED IS THE NUMBER OF PASSES COMPLETED SINCE THE PROGRAM WAS 5.0 OPERATING PROCEDURE 5.1 OPERATIONAL SWITCH SETTINGS FOR WORST CASE). RING AT THE (WHERE XXX LAST STARTED). THE DIAGNOSTIC IS DESIGNED TO USE HARDWARE SWR FOR SYSTEMS HAVING THIS REGISTER, HOWEVER FO~ SYSTEMS NOT HAVING HARDWARE SWITCH REGISTER IT WILL USE LOCATION 17b TO GIVE THE FOLLOWING OPTIONS: SW SW SW SW SW 15=1 14=1 13=1 11=1 10=1 .. OR OR OR OR OR UP UP UP UP UP HA LT ON ERROR SCOPE LOOP INHIBIT PRINTOUT INHIBIT ITERATIONS HALT AFTER LOCATING BAD PARITY BEFORE CORRECTING IT (USED IN PARITY SCAN ROUTINE ONLY) SW 09=1 OR UP -- HALT AFTER THE PARITY MEMORY MAP HAS SEEN PRINTE'· (ALLOWS MANUAL CHANGES TO FORCE TESTING OF MEMORY CCMFAFO, MEMORY PARITY TEST CCMFAF.P11 13-JAN-78 12:13 MACY11 30A(1052) 13-JAN~7B 12:27 PAGE 3 SEQ 0003 THAT WAS NOT LOCATED) SW OB=l OR UP -- HALT AT END OF PASS (IF HALTED ELSEWHERE, THE PROGRAM MAY BE RELOCATED TO BANK 1, SAD PARITY MAY EXIST IN MEMORY, AND/OR WRITE WRONG PARITY MAY BE SET) 5.2 SUBROUTINE ABSTRACTS 5.2.1 BEGIN SA 200, RESTART 230 5.2.2 SCOPE THIS SUBROUTINE CALL IS PLACED BETWEEN EACH SUBTEST IN THE INSTRUCTION SECTION. IT RECORDS THE STARTING ADDRESS OF EACH SU3TEST AS IT IS BEING ENTERED. IF A SCOP~ LOOP IS REQUESTED, IT WILL JUMP TO "THE START OF THE SUBTEST THAT THE SCOPE LOOP IS REQUESTED FOR. IF SCOPE LOOP IS NOT REQUESTED, THERE WILL BE 64 ITERATIONS OF THAT SUBTEST BEFORE THE NEXT SUBTEST IS ENTERED (EXCEPT IN THOSE ROUTINES WHERE IMAX IS CHANGED). SWITCH 11 ON A ONE INHIBITS ITERATION OF SUBTESTS. 5.2.3 ERROR HANDLERS (ERRST,ERRP,ERR) THESE ROUTINES ARE CALLED VIA EMTS TO PRINT OUT ERROR INFORMATION. (SEE 6.0 FOR DESCRIPTION OF ERROR INFORMATION) 5.2.4 PSCAN (SCAN MEMORY FJ~ BAD PARITY) THIS ROUTINE READS ALL LOCATIONS IN MEMORY AND PRINTS OUT THE PHYSICAL ADDRESSES (18 BITS) OF THOSE LOCATIGNS CONTAINING BAD PARITY. IT IS UTILIZED WITHIN THE PROGRAM WHILE EXERCISING MEMORY IF A PARITY ERROR OCCURS UNEXPECTEDLY, AND MAY ALSO BE CALLED USING STARTING ADDRESS 220. 5.2.5 $TYPE (ASCII MESSAGE TYPEOUT ROUTINE) THIS IS THE STANDARD TYPEOUT ROUTINE, ALLOWING PATCHING TO UTILIZE OUTPUT DEVICES OTHER THAN THE ASR 33. $~ULL CONTAINS THE VALUE TC BE USED AS A FILLER CiiARACTER, AND $FILLS CONTAINS A NUMBER INDICATING THE NUMBER OF FILLER CHARACTERS REQUIRED. TPS AND TPB CONTAIN THE STATUS AND BUFFER REGISTER ADDRESSES OF THE OUTPUT DEVICE. 5.2.6 TRAPCATCHER THIS IS A SERIES OF INSTRUCTIONS STARTING AT LOCATION 0 DESIGNED TO DETECT AND ISOLATE UNEXPECTED TRAPS AND INTERRUPTS TO THE TRAP AND INTERRUPT VECTOR AREA OF MEMORY. EACH VECTOR ENTRANCE ADDRESS IS LOADED WITH THE ADDRESS OF THE NEXT LOCATION. THE NEXT LOCATION IS LOADED WITH A HALT (000000). THUS AN ILLEGAL TRAP OR INTERRUPT WILL CAUSE A HALT AT THE TRAP LOCATION PLUS TWO. IF A HALT OCCURS IN THE TRAP OR INTERRUPT AREA, EXAMINE REGISTER SIX. IT WILL CONTAIN THE CURRENT STACK ADDRESS. THE CDN"IENTS OF THE CURRENT STACK ADDRESS IS THE VALUE OF THE LOCATIO~ COUNTER WHEN THE TRAP a >10 " # " CCMFAFO, MEMORY PARITY TEST CCMFAF.P11 13-JAN-78 12:13 ",. ;", '" MACY11 30A(1052) 13-JAN-78 12:27 PAGE 4 OR INTERRUPT OCCURRED. 5.3 PROGRAM AND/OR OPERATOR ACTION 5.3.1 ALTERING THE PARITY MEMORY MAP IF THE MAP TYPED AT RUN TIME DOES NOT AGREE WITH THE HARDWARE PRESENT THE MAP CAN MANUALLY BE CHANGED TO ALLOW TESTING OF PARITY MEMORY THAT THE MAPPER DID NOT FIND. SETTING SWITCH a TO A 1 WILL CAUSE THE PROGRAM TO HALT AFTER THE MAP IS TYPED. AFTER THE HALT, MODIFY THE MAP AS DESIRED (SEE THE DESCRIPTION IN THE LISTING- THE MAP BEGINS AT LOCATION 6CO). THEN PRES~ CONTINUE. THE NEW MAP WILL BE PRINTED, AND IF SW9 IS STILL SET THE PROCESS WILL BE REPEATED. IF SW9 IS NOT SET, THE PROGRAM WILL TEST PARITY MEMORY USING THE NEW MAP. 5.3.2 STOPPING THE PROGRAM BECAUSE THE PROGRAM RELOCATES ITSELF TO BANK 1 WHILE TESTING BANK 0, A SWITCH IS PROVIDED TO HALT THE PROGRAM AT THE END OF A PASS. SETTING THIS SWITCH (SWS) WILL CAUSE THE PROGRAM TO HALT IN BANK o AT THE END OF THE CURRENT PASS (AFTER OUTPUTTING THE END OF PASS MESSAGE). 6.0 ERRORS 6.1 ERROR PRINTOUTS THERE ARE THREE TYPES OF ERROR MESSAGES USING COMBINATIONS OF THE FOLLOWING ERROR TYPE ROUTINES. 6.2 PC=zzzzzz PC OF FAILING ERROR CALL. REFER TO THIS ADDRESS IN THE LISTING FOR AN EXPLANATION OF THE ERROR. ICNT=YYYYYY MPR=XXXXXX MPR DATA=VVVVVV TEST LOC=XXXXXX SIB: XXXXXX WAS: XXXXXX CURRENT ITERATION COUNT OF FAILING TEST. ADDRESS OF PARITY REGISTER UNDER TEST. CONTENTS OF PARITY REGISTER UNDER TEST. MEMORY LOCATION UNDER TEST CONTENTS OF MEMORY LOCATION SHOULD BE. CONTENTS OF MEMORY LOCATION WAS. DETERMINING ADDRESS OF TEST LOCATION WHEN KT11 IS PRESENT IN MOST OF THE SUBTESTS, IF A KT11 IS PRESENT IT IS USED. IN ALL CASES IN THIS PROGRAM, WHE~ THE KTll IS ON, KERNEL PAGE 0 IS USED TO REFERENCE BANK 0 AND KERNEL PAGE 7 IS WSED TO REFERENCE THE EXTERNAL BANK. IN MOST CASES, KERNEL PAGE 1 IS ~SED TO REFERENCE THE MEMORY CURRENTLY UNDER TEST. SINCE THE USE OF THE MEMORY MANAGEMENT OPTION IS SIMILAR THROUGHOUT THE PROGRAM, IT IS EASY TO DETERMINE THE ACTUAL (PHYSICAL) MEMORY ADDRESS BEING TESTED. TO CALCULATE A PHYSICAL ADDRESS, ADD THE STARTING ADDRESS OF THE BANK BEING TESTED TO THE OFFSET WHICH GIVES THE ADDRESS WITHIN THE BANK. SINCE IN THIS PROGRAM ALL RELOCATED MEMORY TESTING IS DONE THRU KERNEL PAGE 1. KERNEL PAGE ADDRFSS RFr.rSTFR 1 {~nnO~~~ 77ry~~ry, ,. SEQ 0004 CCMFAFO, MEMORY PARITY TEST CCMFAF.Pl1 13-JAN-78 12:13 MACY11 30A(1052) 13-JAN-78 12:27 PAGE 5 SEQ 0005 WILL ALWAYS CONTAIN THE STARTING ADDRESS OF THE BANK. ACTUALLY, KERNEL PAGE ADDRESS REGISfER 1 (KPAR1) CONTAINS JUST THE TOP 12 BITS OF THE BANK STARTING ADDRESS. ADDING TWO ZEROES (OCTAL) TO THE RIGHT OF THIS VALUE WiLL GIVE YOU THE FULL 18 BIT ADDRESS OF THE BANK. THE VIRTUAL ADDRESS USED TO REFERENCE THIS BANK UNDER TEST WILL ALWAYS START WITH 001 (BINARY, TOP 3 OF 16 BITS). THIS REFERENCES PAGE 1. THE LOWER 13 BITS GIVE THE ADDRESS WITHIN THE BANK~ ADD THEM TO THE STARTING ADDRESS OF THE BANK TO GET THE FULL 18 BIT PHYSICAL ADDRESS. FOR EXAMPLE, AN ERROR COMMENT MAY SAY "Rl CONTAINS THE ADDRESS OF THE TEST LOCATION (VIRTUAL THRU KERNEL PAGE 1 IF KTll PRESENT)." R1 MIGHT CONTAIN 320CO, AND KERNEL PAGE ADDRESS REGISTER 1 (LOCATION 772342) MIGHT CONTAIN 2400. FIRST GET THE STARTING ADDRESS OF THE BANK BY ADDI~G 2 ZEROES TO THE RIGHT OF THE NUMBER IN KPAR1. THUS THE VALUE 2400 INDICATES THAT THE BANK STARTS ~T 240000. SECOND, CALCULATE THE OFFSET WITHIN THE BANK. THE VIRTUAL ADDRESS 32000 BREAKS DOWN INTO I(TOP 3 BITS) WHICH REFERENCES KPAR1, AND 12000 (LOWER 13 BITS) WHICH IS THE OFFSET. ADD THE OFFSET (12000) TO THE BANK ADDRESS (240000) TO GET THE ACTUAL PHYSICAL ADDRESS BEING TESTED (252000). 6.3 ERROR RECOVERY IN GENERAL, TEST FAILURES WILL PRINTOUT AN ERROR MESSAGE AND CONTINUE. IF THE HALT ON ERROR SWITCH IS SET, HITTING CONTINUE WILL RECOVER. IF THE PROGKAM HANGS UP IN A LOOP, THE ERROR IS LIKELY TO BE A SIGNAL WHICH WAS NEVER RECEIVED. IF A HALT OCCURS IN THE TRAP AND VECTOR AREA THE PROGRAM MUST BE RESTARTED. IF THE PROGRAM HALTS IN THE MAIN FLOW, CONSULT THE LISTING IF NO MESSAGE IS TYPED OUT. 6.4 ERRORS WHILE TESTING BANK ZERO (ERROR PC VALUES ABOVE 20000) TEST20 AND TEST21 CHECK BANK 0 IF IT HAS PARITY MEMORY. TO DO THIS, THE CODE IS RELOCATED TO AND EXECUTED FROM BANK 1. THE ERROR PRINTOUTS WILL THUS GIVE THE PC IN BANK 1 OF THE ERROR CALL. SINCE ALL LOCATIONS HAVE BEEN MOVED UP 20000, SUBTRACT 20000 FROM THE ERROR PC TO GET THE ADDRESS IN THE LISTING WHICH CORRESPONDS TO THE PRINTOUT. 7.0 RESTRICTIONS THE PROGRAM REQUIRES A MINIMUM OF 8K MEMORY TO RUN. XXDP CHAINING IS POSSIBLE FOR SYSTEMS GREATER THAN BK. 7.1 STARTING PROCEDURE PROGRAM MUST BE LOADED INTO LOWER 4K OF 7.2 MEMO~Y. OPERATING RESTRICTION- AVOID USING THE "HALT" SWITCH IF THE PROGRAM IS HALTED AT A RANDOM POINT DURING EXECUTION, SEVERAL PROBLEMS MAY ARISE. THE PROGRAM MAY BE RELOCATED TO BANK 1 AT THE TIME IT IS STOPPED, IN WHICH CASE NONE OF THE STANDARD STARTING ADDRESSES WILL WORK. WRITE WRONG PARITY MAY BE SET, IN WHICH CASE ... .. . " $ CCMFAFO, MEMORY PARITY TEST CCMFAF.P11 13-JAN-7B 12:13 MACYll 30A(1052) 13-JAN~7B 12:27 PAGE 6 YOU MAY ENTER BAD PARITY WHILE PATCHING. AND MEMORY MAY CONTAIN BAD PARITY SINCE YOU MAY BE IN THE MIDDLE OF A TEST WHICH UTILIZES WRITE WRONG PARITY. IT IS THEREFORE STRONGLY RECOMMENDED THAT YOU HALT THE PROGRAM VIA THE "HALT AT END OF PASS" SWITCH (SW8) OR THE "HALT ON ERROR" SWITCH (SW15) RATHER THAN VIA THE HALT/ENABLE SWITCH. B.O MISCELLANEOUS B.l EXECUTION TIME EXECUTION TIME DEPENDS ON THE AMOUNT OF PARITY MEMORY UNDER TEST. IT TAKES ABOUT 1 MINUTE TO TEST 24K OF PARITY MEMORY (1 PASS). B.2 STACK POINTERS THE KERNEL STACK POINTER IS INITIALIZED TO 510. 9.0 PROGRAM DESCRIPTION THIS PROGRAM FIRST LOCATES MAll & MF11 CORE PARITY AND MS-ll MOS PARITY CONTROL REGISTERS BY ADDRESSING ;ACH POSSIBLE REGISTER ADDRESS AND CHECKING THOSE WHICH DO NOT TIME OUT. ON DETECTING THE PRESENCE OF A PARITY REGISTER THE PROGRAM CHECKS IF IT IS A CORE PARITY OR A MOS PARITY REGISTER AND ACCORDINGLY STORES THIS INFORMATION IN AN INDICATOR(INDCO-INDC15) THE ADDRESSES OF THE ~EGISTERS ARE RECORDED AND OUTPUT TO THE CONSOLE DEVICE, AND THEN THE REGISTERS ARE CHECKED TO SEE THAT THE CORRECT BITS ARE R/W. RESET IS USED TO TEST THE EFFECT OF INIT. PARITY MEMORY IS THEN LGCATED BY SETTING WRITE WRONG PARITY IN ALL REGISTERS AND WRITING AND READING THE FIRST 4 ADDRESSES IN EACH 4K. EACH TIME A PARITY REGISTER RECORDS A PARITY ERROR, THE MAP IS ALTERRED T~ INDICATE THAT THAT REGISTER CONTROLS THE MEMORY BEING ADDRESSED. THE FINAL MAP IS PRINTED AND THEN THE PARITY CONT~OL LOGIC IS CHECKED USING THE PARITY MEMORY FOUND. SEVERAL PATTERNS ARE WRITTEN INTO EACH PARITY MEMORY LOCATION TO SEE THAT NO PARITY ERRORS A~E CREATED. FINALLY, EACH BYTE OF PARITY MEMORY IS WRITTEN WITH BOTH GOOD AND GAD PARITY TO SHOW THAT THE PARITY BITS CAN BE TOGGLED AND SENSED. SINCE THIS IS A COMBINED DIAGNOSTIC, AS FAR AS POSSI3LE COMMON TESTS ARE USED FOR BOTH CORE AND MOS. ONLY WHERE THE MOS CONTROLLER DEFERS FUNCTIONALLY FROM THE CORE, THE INDICATOR IS CHECKED FOR MOS OR CORE AND THE MEMORY IN QUESTION IS TESTED ACCORDINGLY. A DETAILED EXPLANATION OF THE MAP IS GIVEN IN THE LISTING (PAGE 9-12). THE DISPLAY REGISTER CONTAINS THE NUMBER OF THE TEST BEING EXECUTED. * ~ SEQ 0006 CCMFAFO, MEMORY PARITY TEST CCMFAF. Pll 13-JAN-78 12: 13 MACYll 30A(1052) 13-~AN-78 12:27 PAGE 7 SEQ 0007 MEMORY PARITY TEST MAINDEC-l I -OCMFA-O COPYRIGHT 1973, 1977, DIGITAL EQUIPMENT CORP., MAYNARD, MASS. AUTHOR: .11M KAPADIA 325 326 327 32B 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 34B 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 ; SWITCH ;SRIS ;SRI4 ;SRI3 ;SRII ;SRID ;SR09 - REGISTER SWITCH OPTI('lS (SWITCH SET TO AI) HALT ON ERROR SCOPE INHIBIT PRINTOUT INHIBIT ITERATIONS HALT AFTER LOCATING BAD PARITY BEFORE CORRECTING IT HALT AFTER TYPING PARITy MEMORY MAP (ALLO,;S MANUAL CHANGES TO BE MADE TO THE MAP TO FORCE TESTING OF MEMORY THAT WAS NOT LOCATED) ;SROB - HALT AT END OF PASS (IF HALTED ELSEWHERE. THE PROGRAM MAY BE RELOCATED TO BANK1, WRITE WRONG PARITY MAY BE SET, AND/OR BAD PARITY MAY EXIST IN THE PARITY MEMORY). 000001 000002 000004 000010 000020 000040 000100 000200 000400 001000 002000 004000 010000 020000 040000 100000 000001 000004 077400 100000 177570 177570 177776 000007 000006 000240 000000 000510 000000 000001 000002 CCMFAFO. MEMORY PARITY TEST CCMFAF. Pl1 13-JAN-78 12:13 . 377 37B 379 380 381 382 3B3 3B4 385 3B6 3B7 3B8 3B9 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 41B 419 420 421 422 423 424 425 428 427 428 429 430 431 432 000003 000004 000005 000006 000114 177572 ; SYMBOL DEFINITIONS BITO" ;8IT DEFINITIONS BIT1 =2 BIT2.4 BIT3. I BIT4.20 BIT5·40 BIT6. I 00 8IT7·200 8ITB.400 BIl9·,000 BIT 10.2000 Bll 11 =4000 Bll I 2. I 0000 BIT 13=20000 B1l14.40000 81115=100000 AE=1 WWP=4 ADRS=77400 PERR= 1 00000 DSWR= 177570 001 5f'= 1775'10 PS=177778 PC="7 SP=%6 NOP·240 OPEN=O STKPT.TSTX RO=%O Rl =%1 R2="2 a MACYl1 30A(1052) ACTION ENABLE WRITE WRONG PARITY ADDRESS OF ERROR PARITY ERROR BIT HARDWARE SWITCH REGISTER HARDWARE DISPLAY REGISTER 13-JAN-78 12:27 PAGE 8 SEQ 0008 R3="3 R4=%4 R5·%5 R6="6 PARVEC=114 SRO-177572 ; PARITY ERROR TRAP VECTOR ;ADDRESS OF MEM MGMT REGISTER SRO ;MACRO DEFINITIONS ; TRAPCATCHER (.+2 ,HALT) LOADED INTO LOCATIONS 000-576 ; LOAD EMT V ECTOR 000030 000032 000046 000052 000174 000176 000200 000210 000220 000230 000174 000000 000000 000167 000210 000167 000220 000167 000230 000167 000510 000510 000512 000514 000516 000520 000522 000524 000526 000530 000532 .=30 000030 016032 000340 000046 011702 000052 040000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 EMTINT 340 .=46 SENDAD .*52 BIT14 001232 014204 ;LOAD STARTING ADDRESS AREA •• 174 DISPREG: .WORD 0 SWREG: .WORD 0 ~MP START .-210 ~MP RSTLDR ;THIS IS THE SOFTWARE DISPLAY REGISTER ;THIS IS THE SOFTWARE SWITCH REGISTER ;GO TO START OF PROGRAM ; GO RESTORE THE LOADERS .=220 001132 001042 JMP .-230 JMP SCAN ; SCAN FOR BAD PAR ITY RSTART ; RESTART WITHOUT RETYPING MAP INFORMATION .=510 ;GENERAL DATA AREA TSTX' 0 FTIhE: 0 TEMPX: 0 ADRPT: 0 BITPT: 0 TRFLG: 0 TYFLG: 0 TYCOR: 0 HIADR: 0 TSTLOC: 0 ; TITLE PRINTED. 1 MAPPING- ADDRESS POINTER MAPPING- BIT POINTER INOICATING BANK MAPPING- TRANSISTION FLAG MAPPING- TYPED FLAG MAPPING- K CORE ACCUMULATOR USED TO CHECK WHEN DONE TESTING A BANK LOADED 101· TH ADDRESS OF LOCATION UNDER TEST IN SOME SUBTESTS CCMFAFO, MEMORY PARITY TEST CCMFAF.P11 13-JAN-7812:13 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 45,3. 000534 000536 000540 000542 000544 000546 000550 000552 000554 000556 MACY11 000000 000000 000000 000000 000000 000000 000000 000000 000000 TBANr; : MEf,1UT: NOK1: HIWORD: LO\oJFLG: ODDFLG: 000560 000562 00 0000 000000 TEMP: MTY FG: 000564 000000 nELDC: PRESENT ; I F SET INO:CATES TESTING HIGH 8YTE ; OF MEMORY LOCATION ;SET TO INDICATE MAP OF PARITY MEMORY ; A LREADY TYPED MPRI : : LOW BYTE SHOWS THAT FIRST ADDRESS ;ENDS IN 0 (OCTAL) ;HIGH BYT': CONTAINS A 1 TO INDICATE ; THAT AN ADDRESS WAS FOUND ;8IT 0 IS CLEAR SINCE REGISTER IS PRESENT ; REGISTER CONTROLS 1 ST 16K 172102 17 o ;LOW BYTE INDICATES THAT THE FIRST ;MEMORY ADDRESS ENDS IN 2 (OCTAL) ;HiGH BYTE CONTAINS A 1 TO INDICATE ; THAT AN ADDRESS WAS FOUND ;THE REST OF THE MAP WOULD APPEAR AS IN THE LISTING 402 000566 000570 000572 000574 000576 000600 000602 000604 000606 000610 000612 000614 000616 000620 000622 000624 000626 000630 000632 000634 000636 000640 000642 000644 000646 000650 000652 000654 000656 000660 000662 000664 000666 000670 000672 000674 0006"16 000700 000702 000704 000706 000710 000712 000714 000716 000720 000722 000724 000726 000730 000732 000734 000736 000740 000742 000744 000746 000750 000752 000754 000756 000760 000762 000764 000766 00 0000 172107 000000 000000 000000 172111 COOOOO 000000 o o o MPRI : MPn2 : MACY1t 172104+1 o o 3DA ( 1 052) 13-oAN-76 MPR3: MPR4· MPR5 ; 0 0 172110+1 0 0 0 172112+1 MPR7: ; 0-64K PAi:ITY MEM UNDER THIS CONTROL ; 64-1 24K PARITY MEM UNDER THIS CONTROL ;ADDRESS RESPONSE THIS COIHROL (0,2,4,6) 0 ; Q-641{ PARITY MEM UNDER THIS CONTROL ;64-124K PARITY MEM UNDER THIS CONTROL ;ADDRESS RESPONSE THIS CONTROL (0,2,4,6) a 0 172122+1 a a MPR1 0: MPR11 : 0 172124+1 0 0 0 1'12126+1 0 0 0 MPR12 : 0 MPR13 : 172132+1 0 0 MPR14: 0 17?134+1 0 0 0 MPRI5: ; 0-641': PARI TY MEM UNDER THIS CONTROL ;64-124K PARITY MEM UNDER THIS CONTROL ; ADDRESS RESPONSE THIS CONTROL (0,2,4,6) ; 0-64K PARITY MEM UNDER THIS CONTROL ; 64-124K PARITY MEM UNDER THIS C"':iIJTROL ;ADDRESS RESPONSE THIS CONTROL (0,2,4,6) ,O-64K PARITY MEM UNDER THIS CONTROL ;64-124K PARITY MEM UNDER THIS CONTROL ; ADDRESS RESPONSE THIS CONTROL (0,2,4,6) ; 0-64K PARITY MEM UNDER THIS CONTROL ;64-124K PARITY MEM UNDER THIS CONTROL ; ADDRESS RESPONSE THIS CONTROL (0,2,4,6) ; 0-64K PARITY MEM UNDER THIS CONTROL ;64-124K PARITY MEM UNDER THIS CONTROL ; ADORESS RESPONSE THIS CONTROL (0,2,4,6) ; 0-64K PARITY MEM UNDER THIS CONTROL ;64-124K PARITY MEM UNDER THIS CONTROL ; ADDRESS RESPONSE THIS CONTROL (0,2,4,6) 172136+1 0 0 0 TREG: ; 0-64K PARITY MEM UNOER THIS CONTROL ; 64-124K PARITY MEM UNDER THI S CONTROL ; ADDRESS RESPONSE THIS CONTROL (0,2,4,6) 172130+1 a 000000 000000 000000 172120+1 0 a MPR9 : ;O-64K PARITY MEM UNDER THIS CONTROL : 64-124K PARITY MErYl UNDER THIS CONTROL ; ADDRESS RESPONSE THIS CONTROL (0,2,4,6) 172114+1 0 0 0 172116+1 a MPR8 : ; 0-64K PARITY MEM UNDER THIS CONTROL ;64-124K PARITY MEM UNDER THIS CONTROL ; ADDRESS RESPONSE THIS CONTROL (0,2,4,6) ; D-64K PARI TY MEM UNDER THIS CONTROL ,64-124K PAR I TY MEM UNDER THI S CONT ROL ;ADDRESS RESPONSE THIS CONTROL (0,2 4,6) 0 MPR6 : (0,2,4,6) ° 000000 17,2121 000000 000000 000000 172123 000000 000000 000000 000000 172137 000000 000000 000000 PAGE 10 172106+1 a 0 ooooc'O 172125 12:27 SEQ 0010 oeoooo 000000 000000 000000 172127 000000 000000 000000 172131 000000 000000 000000 172133 000000 000000 000000 172135 ; 0-64K PARITY MEM UNDER THIS CONTROL ; 64-1 24K PAR!TY MEM UNDER THI S CONT ROL ;ADORE5S RESPONSE THIS CONTROL 000000 ceODOO 172117 ;0-64K PARITY MEr~ UNDER THIS CONTROL ; 64-124K PARITY MEM UNDER THIS CuNTRDL ;ADDRESS RESPONSE THIS CONTROL (0,2,4,6) o 000000 000000 172115 000000 172102+1 o o 000000 172113 000000 ; PARITY STATUS REGISTERS ; 0-64K PARITY MEM UNDER THIS CONTROL ;64-124K PARITY MEM UNDER THIS CONTROL ;ADDRESS RESPONSE THIS CONTROL (0,2,4,6) 172100+1 MPRO: 172101 000000 000000 CC'OOOO 17 2103 0000ao 000000 000000 172105 000000 000000 CCMFAFO, MEMORY PAR I TY TES T 13-JAN-78 12: 13 CCMFAF" P11 523 524 525 526 527 528 529 530 S31 532 533 534 535 536 537 53B 539 540 541 542 543 544 ; 5ET TO INDICATE NO KTll o 475 476 522 SEQ 0009 ;VALUE EXPECTED ; ACTUAL VALUE FOUND 400 "77 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 50S 510 511 512 513 514 515 516 517 51 B 519 520 521 PAGE 9 ;MEMORY PARITY CONTROL REGISTER ADDRESSES ;THE LEAST SIGNIFICANT BIT IN THE DEVICE ADDRESS IS SET TO A ONE(1) ; IF THE CONTROL IS FOUhlD NOT TO BE PRESENT. THE tI'lEMORY PRESENT UNDER ;CON1ROl OF EACH CONTROLLER IS REPRESENTED BY 2 OCTAL "lORDS. EACH BIT ;REPRESENTS A 4K BLOCK, I.E. BITO::: Q-4K, Bl11::: 4-8K, 81T15= 60-64K. ;THE LOW BYTE OF THE LAST WORD FOR EACH REGISTER INDICATES THE OFFSET (O,2.4.0R 6) ; FOR THE FIRST ADDRESS THAT ACTUALLY CORRESPONDED TO THE REGISTER. THE HIGH BYTE GETS ;5ET :-0 1 TO INDICATE THAT A MEMORY ADDRESS HAS BEEN FOUND FOR THAT REGISTER. ;FOR EXAMPLE, SAY THAT MPRO AND MPR1 EXIST, CONTROLLING INTERLEAVED MEMORY ;FROM 0 TO 16K, AND THAT MPRO CONTROLS THE ADDRESSES ENDING IN a AND 4. ;THE MAP WOULD THEN LOOI{ AS t"JLLOWS: MPRO: 172100 :BIT 0 IS CLEAR SINCE REGISTER IS PRESENT 17 ;REGISTER CONTROLS 1ST 16K (=4 BANKS) 474 484 485 486 487 468 12:27 MPHOf, : 455 456 457 45B 459 460 461 462 463 464 465 466 467 4G8 469 470 471 472 473 4B3 13-JAN,-78 SHOBE: WAS: TRDATA: 000000 454 478 479 480 481 482 30A(1052) ; 0-64K PARITY MEM UNDER THIS CONTROL ;64-124K PARITY MEM UNDER THIS CONTROL ;ADORESS RESPON5E THIS CONTROL (0,2,4,6) ; PARITY REGISTER UNDER TEST CCMFAFO, MEMORY PARITY TEST CCMFAF.PI1 13-JAN-7812:13 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 5B5 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 30A(1052) 13-JAN-78 12:27 PAGE 11 SEQ 0011 : INDICATORS FOR CORE OR MOS PARITY REGISTER: ;EACH INDICAT.DR REFERS TO A PARTICULAR PARITY REGISTER. IF IT IS ;A CORE PARITY REGISTER THEN A '1' IS STORED IN THE INDICATOR. ;IF IT IS A MOS PARITY REGISTER THEN '-1' GETS STORED, :EX= IF MPRO (172100) IS FOR CORE AND MPRI (172102) IS FOR MOS :THEN THE INDICATOR MAP WILL LOOK AS FOLLOWING: ; INDCO: 000001 ; INDC1: 177777 000770 000772 000774 000776 001000 001002 001004 001006 001010 001012 001014 001016 001020 001022 001024 001026 001030 000000 000000 000000 000000 000000 000000 INDCO: 0 INDCt: 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 000000 ;CORE-MOS ;CORE-MOS ;CORE-MOS ;CORE-MOS ;FOR MPR4 ; FOR MPR5 ; FOR MPR6 0 a a PARITY PARITY PARITY PARITY INDICATOR IDCICATOR INDICATOR INDICATOR FOR FOR FOR FOR M'·l MPRI MPR2 MPR3 INDC2: INDC3: INOC4: INDC5: INDC6: INDC7: INDC8: INDC9: INDC10: INDC 11: INDCI2: INDCI3: INDCI4: INDCI5: RESRVD: a a a a a a a a ; FOR ; FOR ;FOR ;FOR ;FOR RESVC: RESVM: 70032 77772 ;BIT POSITIONS WHICH ARE RESERVED ; FOR FUTURE USE IN PARITY REGISTERS ;CORE PARITY ; MOS PARITY a a a a a ; FOR MPH7 ;FOR MPR8 ; FOR MPR9 ; FOR MPR10 MPRll MPR12 MPR13 MPR14 MPR15 001032 070032 001034 077772 001036 001040 001042 001044 001046 001050 001052 001054 001056 001060 001062 125325 152652 052452 025125 102070 072527 177777 107030 152525 000000 000000 001064 001066 000000 000000 ; THIS IS A MAP OF THE TOTAL MEMORY PRESENT IN THE SYSTEM. MEMl: 0-64K MEM PRESENT IN 4K CONTIGUOUS BLOCKS MEMH: 0 ;64-124 MEM PRESENT IN 4K CONTIGOUS BLOCKS 001070 000000 ;THIS IS A MAP OF THE TOTAL PARITY MEMORY PRESENT IN THE SYSTEM, PMEML: ; 0-64K PARITY MEMORY PRESENT ;PARJTY PATTERNS PARPAT: 125325 152652 052452 025125 102070 072527 177777 107030 152525 ; EVEN, ODD BYTES ; ODD, EVEN ; EVEN ,000 ;000, EVEN ; EVEN, EVEN ;000,000 ; EVEN, EVEN ;OOO,ODO ; ODD, EVEN ; EXTRA PATTERN AREA ;TERMINATOR, DO NOT USE THIS LOC a o a CCMFAFO, MEMORY PARITY TEST CCMFAF.P11 13-JAN-7812:'3 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 61B 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 636 639 640 641 642 643 644 645 646 647 64B 649 650 651 652 653 654 655 656 MACY11 MACY11 30A(1052) ; 13-JAN-78 12:27 PAGE 12 SEQ 0012 001072 000000 PMEMH: 001074 000000 PMEMX: ; (IN 4K CONTIGUOUS BLOCKS) ;64-124K PARITV MEMORV PRESENT ; (IN 4K CONTIGUOUS 8LOCKS) ; TEMP TO HOLD CONTENTS OF EITHER ; LOW OR HIGH MAP ; ROUTINE TO TYPE ASCI I MESSAGES, MESSAGE MUST TERMINATE WITH A 0 BYTE. ;THE ROUTINE WILL INSERT A NUMBER OF NULL CHARACTERS AFTER A LINE FEED. ;NOTE1: $NULL CONTAINS THE CHARACTER TO BE uSED AS THE FILLER CHARACTER. ;NOTE2: $FILLS CONTAINS THE NUMBER OF FILLER CHARACTERS REQUIRED. 001100 001102 001104 001106 001110 001111 001112 001113 001114 001120 001122 001124 001126 001132 001134 001136 001140 001142 001146 001150 001154 001100 177570 177570 177564 177566 000 002 000 000 105767 001401 000000 010046 017600 112046 001005 005726 012600 062716 000002 SWR: DISPLAY: TPS: TPS: $NULL: $FILLS: $TPFLG: $TYPE: 177772 6$: 000002 · =11 00 ,WORD • WORD 177564 177566 , BYTE • BYTE • BYTE ,8YTE TSTB BED HALT MOV MOV 1$: Move 000002 7$ : 122726 000026 000012 25 : 3$: BNE TST MOV ADO RTI JSR CMP8 001160 001162 001364 016746 177722 001166 001172 001174 001200 001202 001206 001210 105366 002770 004767 000772 105777 100375 116677 001216 00 0207 001220 000000 004767 4$: 000001 000002 5$: 177676 000002 177670 DSWR DOISP ;ADORESS OF THE SWITCH REGISTER ; ADDRESS OF THE DISPLAY REGISTER ; PRINTER STATUS REGISTER ADDRESS ; PRINTER BUFFER REGISTER ADDRESS ;CONTAINS NULL CHARACTER FOR FILLS ;CONTAINS H OF FILLER CHARACTERS REQUIRED ; "TERMINAL AVAILABLE" FLAG (O=YES) ; RESERVED $TPFLG 6$ ; IS THERE A TERMINAL? ;8R IF YES ;HALT HERE IF NO TERMINAL ; SAVE RO ;GET ADDRESS OF ASCIZ STRING ; PUSH CHARACTER TO BE TYPED ONTO STACK ;BR IF IT ISN'T THE TERMINATOR ;IF TERMINATOR POP IT OFF THE STACK ; RESTORE RO ; ADJUST RETURN PC ; RETURN ;GO TYPE ,HIS CHARACTER : CHECK I F THE CHARACTER TYPED ;WAS A LINE FEED : GO GET NEXT CHARACTER IF NOT LINE FEED ;GET H OF FI LLER CHARACTERS NEEDED ;AND THE NULL CHARACTER ; DOES A NULL NEED TO BE TYPE07 ;BR IF NO--GO POP THE NULL OF THE STACK ;GO TYPE A NULL ;LOOP ;WAIT UNTIL PRINTER IS READY RO,-(SP) @2(SP),RO (RO)+,-(SP) 2$ (SP)+ (SP)+,RO #2, (SP) PC,5$ #12,(SP).+ 8NE MOV 1$ $NULL,-(SP) PECB BLT JSR BR TSTB BPL MOV8 1 (SP) 3$ PC,5$ 4$ @>TPS 5$ 2(SP) ,@>TPB RTS PC : LOAD CHARACTER TO 8E ; TYPED INTO DATA REGISTER ;GENERAL DATA AREA SCNFlG: 0 :SCNFLG GETS SET IF USING : SCAN ROUT! NE (SA"220) CCMFAFO, MEMORY PARITY TEST CCMFAF. Pll 13-JAN-7812:13 657 658 659 660 66' 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 7'0 711 712 00'222 00' 224 00'226 00' 230 00' 232 001234 001236 001240 00' 242 00, 244 00'246 001250 001252 001254 001256 001260 001262 001264 001266 001270 001272 001274 001276 001302 001310 1i2340 1i2342 1i2344 172356 000000 000000 000000 000000 000000 000000 000000 001346 001352 001356 001362 0' 2706 005767 0005' 0 177124 001366 001006 005267 000167 005067 004767 004767 104000 017603 005767 001002 001340 001370 001374 001400 001404 001410 001414 001416 001420 001424 177124 17"1572 001436 001442 001446 0' 2706 005067 005067 012737 012737 0'3746 013746 0'2737 005777 000407 012767 0'2767 022626 0'2737 012737 052737 052767 000401 022626 012637 012637 005067 005767 0010' 2 005267 023737 001404 104000 0, 7257 104000 017636 0005' 0 177114 010300 0'5732 000340 000004 000006 00'512 177370 001460 001472 001476 001504 001510 001512 001520 001526 001530 001536 001544 001552 001560 001562 001564 001570 001574 001600 001604 001606 001612 00' 620 001622 001624 001626 001630 MACY11 001632 001634 00' 636 001642 001646 001652 001660 001664 001670 001674 , 04000 017026 005067 012702 012703 012737 005037 042712 005062 005062 0 ;CACHE FLAG ;CACHE CSR '77746 ;KERNEL PAGE DESCRIPTOR REGISTER ADDRESSES ; KERNEL PAGE ADDRESS REGISTER ADDRESSES ; REGISTER SAVE LOCATIONS 30A(,C52) 13-JAN-78 12:27 PAGE 14 SEQ 0014 I'HSRO HALT 8R 000024 000026 000004 000176 000174 177360 177354 001562 000340 000014 000200 000004 000006 177746 177442 000006 000004 176710 176706 ,76700 000042 176700 000566 000770 002012 000006 000001 000002 000004 .. ;ROUTINE TO RESTART WITHOUT RETYPING MAP AFTER TEST HAS BEEN RUNNING RSTART: MOV HSTKPT,SP ;SET UP STACK POINTER MOV #1 ,MTYFG ;SET FLAG TO INDICATE MAP HAS BEEN TYPED CLR PASCNT ; INITIALIZE PASS COUNT MOV HPWRDN, ~#24 MDV 11340,@l1I.26 CLR TSTX CLR I'#PS ; CLEAR PROCESSOR STATUS REGISTER MOV H6 ,~H4 @H6 CLR JMP 8EGIN CLR 000046 757 758 759 760 761 762 763 764 765 766 767 768 PAGE 13 ; ROUTINE TO SCAN ALL MEMORY FOR BAD PARITY AND TYPE 18 8IT ADDRESSES OF BAD ; LOCATIONS SCAN: MOV HSTKPT,SP ; SETUP STACK POINTER TST FTITLE ;IF TITLE HAS BEEN PRINTED, REGISTERS ;HAVE ALREADY BEEN LOCATEO- GO ; AND LOCATE I F NOT ALREADY DONE BNE SCANB ; 8RANCH, REGISTERS HAVE ALREADY BEEN LOCATED lNC SCNFLG ; INCREMENT SCNFLG JMP ST ART 1 ;GO TO LOCATE THE REGISTERS SCAN A : CLR SCNFLG ; RETURN HERE AFTER LOCATING THE REGISTERS SCAN8: JSR PC,MAPMEM ; SETUP MEMORY MAP JSR PC, PSCAN ; SCAN FOR BAD PAR I TY TYPE ;TYPE MESSAGE "BAD PARITY SCAN COMPLETE" PSMSG TST NOKT BNE .+6 177614 005037 000000 000750 001466 000004 010346 013100 001426 001432 001434 001452 177252 000024 000026 ,77624 000232 CCMFAFO, MEMORY PARITY TEST CCMFAF.Pl1 13-JAN-7812:13 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 12:27 0 177600 172200 PDREND: 172300 KPDRO: '72300 KPOR, : 172302 KPDR2 : 172304 KPDR7 : 1723'6 KPARO: 172340 KPAR 1 : 172342 KPAR2 : 172344 KPAR7 : 172356 SPSAV: 0 ROSAV: 0 RISAV: 0 R2SAV: 0 R3SAV: 0 R4SAV: 0 R5SAV: 0 000510 000001 010436 015732 000340 177154 177776 000006 000006 000530 001322 00,330 001334 13-JAN-78 SEQ 0013 CACHF L: CACHE: KTST ART: ADRTYP: PORTAB: 000000 177746 000000 000000 '77600 172200 172300 172300 , 72302 172304 1723'6 012706 012767 005067 012737 012737 005067 005037 012737 005037 000167 001314 MACY11 30A( 1052) 000004 ;TURN OFF KT11 IF PRESENT ; ENO OF PARITY SCAN SCAN ;NORMAL STARTUP START: MOV HSTKPT ,SP MTYFG CLR CLR PASCNT MOV #PWRDN,@H24 #340,@#26 MOV I'H4,-(SP) MOV MOV 1'#6,-(SP) H2$ ,@#4 MOV @SWR TST 8R 4$ 2$: MOV #SWREG, SWR #DISPREG, 01 SPLAY MOV CMP (SP)+, (SP.)+ H6$,@#4 4$: MOV H340,@>N6 MOV # 14 ,@#177746 815 8IS #200, CACHFL 5$ BR (SP)+, (SP')+ 6$: CM" 5$: MOV (SP)+,@#6 MOV (SF)+,@H4 CLR TSTX 1$: TST FTITLE BNE STARTI FTITLE INC @>H42,@>H46 CMP 8EQ STARTI TYPE MTIT TYPE MLDRSV ; SET UP STACK POINTER ;CLEAR FLAG WHICH INDICATES MAP TYPED ; INI T IALIZE PASS COUNT ;SETUP POWER FAIL RETURN ; SAVE THE ERROR VECTOR ; SET UP TIME OUT VECTOR ; TRY TO REFERENCE THE SWITCH REGISTER ;8RANCH IF NO TIME OUT ; POINT TO THE SOFTWARE SWITCH REGISTER ; POINT TO THE SOFTWARE DISPLAY REG. ; RESTORE THE STACK POINTER ; DISA8LE CACHE ;SET FLAG FOR CACHE ; RESTORE ERROR VECTOR ; IS TITLE PRINTED YET? ;YES, SKIP OVER ;SET FLAG ;ARE WE IN ACTll AUTOMATIC MODE? ;YES, SKIP TITLE ;TYPE TITLE "MEMORY PARITY TEST i MAINDEC-l1-DCMFA I. ; TYPE "LOADERS SAVED IN BANK 1. ;SEARCH FOR PARITY REGISTERS PRESENT AND TYPE ADDRESSES OF THOSE FOUNO ;FAILURE TO LOCATE A REGISTER INDICATES THAT THE ADDRESS TIMED OUT OR THAT ; BIT': 5-7 IN THE REGISTER DID NOT SET STARll: TYPE ; TYPE "MEMORY PARITY REGISTERS PRESENT ARE:" MMPRS MPROK ; CLEAR MPR FLAG CLR MOV >MPRO, R2 ; SET UP POINTERS MOV ;POINTER TO CORE-MOS II INDCO I R3 >GMPR8,@H4 ; SET UP TIMEOUT TRAP RETURN MOV @#6 CLR GMPRA: BIC H1 • (2) ;CLEAR FLAG BIT IN TABLE 2(R2) ; INITIALIZE LOCATIONS IN THE TABLE CLR 4(R2) CLR CCMFAFO. MEMORY PARITY TEST CCMFAF. Pl1 13-JAN-7B 12:13 . 769 770 771 772 773 774 775 776 777 77B 779 780 781 782 7B3 784 785 786 787 78B 789 790 791 792 793 794 795 796 797 79B 799 800 801 802 803 804 805 606 B07 808 809 Bl0 811 812 B13 814 815 816 B17 81B B19 B2D 821 822 823 824 001700 001704 001710 001716 001724 001726 001732 001736 001740 001742 001744 001746 001750 001754 DO 1756 001762 001766 001770 001772 001774 001776 002000 002004 002010 002012 002020 002024 002026 002032 002034 002042 005062 005772 052772 032772 001414 011267 004567 000514 017670 000006 104000 017670 012713 000413 011267 004567 000514 017731 000006 104000 017731 012713 005267 000403 022626 052712 062i02 005723 020227 002714 012737 00S767 002046 002050 001402 000167 002054 002060 002062 002064 002066 002072 002074 002100 002102 005767 OD 1 012 104000 017212 005737 001402 000161 000000 000167 002106 002114 002120 002122 002130 002134 002142 002150 012767 105767 001403 012777 004767 012767 012737 005067 00~O14 000006 000000 000340 000340 MACY11 000000 000000 000001 1$: 176532 013430 177777 176532 2$: GMPRB: 000001 000010 GMPRC: 000766 000006 177152 000004 177324 GMPRD: 176462 NOREG: 000042 007572 177330 002156 177102 000014 012146 000100 000006 176344 13-JAN-78 12 :27 PAGE 15 SEQ 0015 176562 013460 CCMFAFO, MEMORY PARITY TEST CCMFAF.Pl1 13-JAN-7812:13 014346 BEGIt<: 177074 014314 000004 MACYll 30A(1052) CLR TST BIS BI T BEQ MO': JSR TEMPX MPRCOR 6 TYPE MPRCOR MOV BR MDV JSR TEMPX MPRMOS 6 TYPE MPRMOS MOV INC BR CMP BIS ADO TST CMP BL T MOV TST 6 (R2) @(2) #340,1'(2) #340,@(2) 1$ (2), TEMPX R5,OACNV #-1, (R3) MPROK GMPRC (SP)+, (SP)+ ., ,@R2 #10. R2 ( R3)+ R2.#TREG GMPRA ,116.@#4 SCNFLG BEQ JMP GMPRD SCAN A TST BNE TYPE MTR TST BEQ JMP HALT JMP MPROK BEGIN MOV TSTB SEQ MOV JSR MOV MOV CLR #TEST 1 +2, RETURN CACHFl :DOES THIS MPR EXIS1? (IF NO, TIMES OUT) ;YES- IS IT AN MFll-LP OR MAll-P CORE PARITY REG :NO, IS IT A MOS-11 PARITY REGISTER? :YES- PRINT REGISTER ADDRESS :(GET ASCII) BRANCH : (TYPE ADDRESS) # 1, (R3) 2$ (2), TEMPX R5,OACNV : SET INDICATOR FOR CORE PARITY :IT IS AMOS REGISTER, : (GET ASCII) PRINT ADDRESS : (TYPE ADDRESS) SET INDICATOR FOR MOS PARITy SET MPR REGISTER PRESENT FLAG SKIP NEXT RESTORE STACK POINTER SET FLAG INDICATING REGISTER NOT PRESENT UPDATE POINTER DONE YET? NO, LOOP YES, RESTORE TRAPCATCHER ARE YOU IN THE ROUTINE TO SCAN MEMORY FOR BAD PARITY-(SCAN) NO. BRANCH TO CARRY ON NORMALLY YES, GO [jACK TO THE MEMORY SCAN ROU TINE ANY PARI TY REGISTERS PRESENT? YES- GO TEST CONTROLS PRESENT NO- TYPE "NO PARITY REGISTER FOUND II @l1;l42 ,+6 LOGICAL LOADED BY MONITOR? NO, BRANCH YESEX IT , NO REGISTERS PRESENT NO REGISTERS TO TEST IF CONTINUED, TRY AGAIN 5T ART SETUP SCOPE RETURN CACHE ? BRANCH I F NO DiSABLE CACHE SAVE MONITOR MAXIMUM ITERATION COUNT RESTORE TRAPCATCHER IN TIMEOUT VECTOR . +1 0 1114,@CACHE PC,SAVLDR "'00.IMAX #6.@#4 BITPT 13-JAN-78 12:27 PAGE 16 SEQ 0016 825 826 B27 82B 829 830 831 832 833 834 835 836 837 83B 839 840 841 B42 843 844 845 846 B47 848 B49 85D B51 852 853 B54 B55 856 857 BS8 859 B60 861 B62 863 B64 865 B66 867 868 869 870 871 872 873 874 875 876 877 87B 879 880 30A( 1 052) ;:SHOW ** '" '" '" 'T"AT " '" '" '" '" BITS '" *** .. 0,2,5-11, '" '" '" ** ** '" '" "',..AND *'" '" '15 " *'" OF ** **EACH "'"' '" "' CORE ...... "' .. **PARITY "' .. "'. '" .. ** '" '" *¥ '" '" ** '" *** '" REGISTER PRESENT :CAN BE SET AND CLEARED, BITS 0,2,15 OF EACH MOS PARITY REGISTER ; PRESENT CAN BE SET AND CLEARED ;. '" "'." ""'"'*SCOPE ** '" *** ** '" '" ** '" '" '" *,,* ** ** ** ** *** '" '" '" * '" '" '" '" '" '" '" ** '" *** '" '" ** '" '" "'* '" *** '" TESTl: 002154 002156 002164 002170 002174 002200 002202 104001 012777 012700 012704 032710 001042 002204 002210 002212 002220 002222 002230 022714 001004 016767 000403 016767 012702 002234 002236 002242 002250 002252 005011 011167 046767 001401 104002 002254 002260 030267 001010 002262 002264 002266 002270 010211 011103 005011 046703 002274 002276 002300 020203 001401 104002 002302 002304 006302 103363 002306 002312 062700 005724 000010 002314 002320 002322 020027 002725 005067 000766 000001 000566 000770 000001 176716 1$: 011001 000001 176614 176606 000001 176524 176562 176550 176610 176600 5$: MOV MOV MOV BI T BNE MOV #l,@DISPLAY #MPRO,RO # INDCO, R4 #l,@RO 4$ @>RO,R1 CMP BNE MOV BR # 1, (R4) S$ RESVC, RESRVD MOV RESVM, RESRVD #1, R2 MOV @>Rl @Rl,TREG RESRVD, TREG .+4 BIT BNE R2, RESRVD 3$ MOV MOV CLR BIC R2,@Rl @>Rl ,R3 I'Rl RESRVD, R3 CMP BEQ ERROR R2,R3 ,+4 3$: ASL BCC R2 2$ 4$: ADu TST ., 0, RO CMP RO,HREG 1$ TREG 2$: 176534 BLl 176440 CLR ; ** If: '" '" '" :NO :YES, CORE, STORE RESERVED BITS .+10 CLR MOV BIC BEQ ERROR 176516 :LOAD THE TEST NUMBER INTO THE DISPLAY ; LOAD ADDRESS OF TABLE INTO RO : LOAD ADDRESS OF INDICATOR IN R4 : IS THIS REGISTER PRESENT? : NO- B"ANCH TO GET NEXT ADDRESS :YES- LOAD Rl WITH ADDRESS OF ; PARI TY REGISTER : IS THIS .'EGISTER CORE? :MOS, STORE RESERVED BITS : LOAD R2 'IJITH VALUE OF FIRST BIT ; TO BE TESTED : INITIALIZE PARITY REGISTER ;READ CONTENTS OF PARITY REGISTER ;ClEAR BITS w'HICH ARE RESERVED ;CHECK OTHER BITS- BRANCH IF OK :CLEAR INSTRUCTION DID NOT INITIALIZE :ALL USED BITS IN PARITY REGISTER :TO ZERO (Rl CONTAINS ADDRESS OF :FAILING REGISTER) : IS THIS BIT RESERVED? :YES- DON'T TEST IT SINCE IT :MAY BE ZERO OR ONE ;NO- SET THIS BIT IN THE PARITY REGISTER : READ AND SAvE CONTENTS OF PARITY REGISTER ;CLEAR PARITY REGISTER :CLEAR BIT LOCATIONS THAT ARE :RESERVED : CHECK REST ; BRANCH I F OK :PARITY REGISTER WHOSE ADDRESS IS IN Rl ;WAS INCORRECT AFTER THE VALUE IN R2 ;WAS wRITTEN INTO IT. ACTUAL CONTENTS : (WITH UNUSED BITS CLEARED) IS IN R3 :ROTATE BIT TO 8E TESTED : I F NOT OONE WITH ALL BIT POSITIONS ;GO TEST THIS ONE :MOVE RO TO POINT TO NEXT POSSIBLE ADDRESS ( R4)+ ;OF A PARITY REGISTER ;AT END OF TABLE? ; NO, BRANCH "'**.'" *** ***** ** "''''* "'''' '" *** '" '" ** •• "'''' '" '" '" '" ** '" '" '" '" ** '" ** '" ** '" '" **** "'''' •• :SHOW THAT RESET CLEARS BITS 0,2, AND 15 OF EACH PARITY REGISTER CCMFAFO, MEMORY PARITY TEST 13-JAN-7B 12:13 CCMFAF. Pl1 881 882 883 884 BBS B86 B87 888 8B9 890 891 892 893 894 B95 896 897 B98 B99 900 901 902 903 904 905 906 907 908 909 910 911 912 913 914 915 916 917 91B 919 920 921 922 923 924 925 926 927 928 929 930 931 932 933 934 935 936 MACY1! 002326 002330 002336 002342 002346 002352 002356 002360 002364 002366 002374 002376 002404 0024,0 104001 012777 005067 012700 012703 032710 00101 :2 022713 001404 012710 000403 012770 SEQ 0017 062700 002412 020027 002755 105767 , 05777 100015 000000 107745 000010 000000 002442 012703 002446 105767 002452 002454 001403 012777 002462 002466 002470 002474 032710 002476 017002 005070 042702 000766 176466 176452 4$' 000566 000770 176550 000014 000001 000001 00'012 005702 DO 1401 002520 000411 000000 000000 077772 104002 002522 017002 002526 005070 046702 005702 00 I 401 104002 002544 93B 939 002550 940 941 002554 002556 942 943 944 945 002562 000000 000000 ,76276 7$' .+10 MACY" #10. RO (R3)+ CMP RD. NTREG BLl TSTB BNE TSTB BPL RESET MOV MOv 1$ $TPFLG 4$ I'TPS .-4 NO- CaNT INUE YES- TERMINAL AVAl LABlE? NO- BRANCH YES- WAlT FOR TERMINAl TO FINISH ISSUE IN IT LOAD AODRESS OF THE TABLE POINTER TO INDICATOR II'MPRO, RO 'INDCO,R3 CACHF L 2$ "4,@CACHE ,,1 ,@IRQ 3$ " , (R3) 7$ @(RO),R2 @(RO) #77772, R2 TST BEQ ERROR R2 BR MOV CLR BIC TST BEQ ERROR 3$-4 @(RO) ,R2 @(RO) RESVM, R2 R2 .+4 CACHE ? BRANCH IF NO DISABLE CACHE IS THIS PARITY REGISTER PRESENT? NO- BRANCH IS THIS A CORE PAR REGISTER? NO, BRANCH YES. GET CONTENTS OF rEGISTER MAKE SURE THAT WWP ANO AE ARE CLEAR MASK RESERVED BITS FOR CORE PAR -lTY REGISTER. BITS 5-1 I (ADORS BITS) ARE A LSD MASKED CHECK, I F REST WERE CLEARED .+4 CORE PARITY REGISTER "HOSE ADDRESS IS PO aH ED TO BY RO WAS INCORRECT ACTER A RESET WAS ISSUED- CONTENTS SAVEO IN R2 wITH UNUSED BITS MASKED 13-JAN~78 30A(1052) CORE- SET ALL DEFINED BITS TO MOvE POINTER TO POINT TO NEXT MPR AOORESS INCREMENT POINTER TO INDICATOR OF A PARITY REGISTER AT END OF TABLE? Hl07745,II'(RO) MOS, GET CONTENTS OF REGISTER MAKE SURE THAT ~JWP 8AE ARE CLEAR MASK RESERVED BITS FOR MOS PAR REG CHECK REST RESET DID CLEAR ALL BITS MOS PARITY REGISTER WHOOSE ADDRESS IS POINTED BY RO WAS INCORRECT. AFTER ISSUING RESET CONTENTS OF PAR REG WERE AS ·.HOWN IN R2(UNUSED BITS HAVE BEEN MASKED) 12'27 PAGE lB 13-JAN-?812:13 005070 062700 SEQ 0018 000000 000010 3$' CLR ADD @(RO) TST ( R3)+ RO, .TREG 2$ ,REINITIALIZE PARITY REGISTER :MOVE POINTER TO POINT TO ADDRESS #10,RO ;oe NEXT REGISTER 005723 020027 002737 CMP 000766 BL, : INCREMENT POINTER TO INOICATOR ; DONE? ;NO- LOOP ; '" '" "' .. ,. ", .. * '" '" '" * *'''' '" '" '" *' . . '" "'~. '" '" "'* '" '" '" "'. '" '" ** '" "'.',. .. *' 946 976 977 97B 979 980, 981 982 983 984 985 986 9B7 9B8 989 990 991 992 ., ,lORD 5$ " , (R3) 6$ "0001S,II>(RO) TSl8 2$' LOAD THE TEST NUMBER INTO THE DISPLAY DON'T ITERATE TEST LOAD PO INTER POINTER TO INDICATOR IS THIS PARITY REGISTER PRESENT? NO BRANCH IS THIS CORE OR MOS PARITY REGISTER? ND- 8RANCH MOS-SET ALL DEFINED BITS TO 1 '2,@>DISPLAY IMAX 'MPRO, RO 'INDCO,R3 BEQ MOV BIT BNE CMP BNE MDV CLR BIC 176542 001030 022713 002512 002514 002516 937 6$: 5$' ,00375 000005 012700 002532 002536 00.2540 002542 1$' 000001 001003 002436 002502 002506 MOV CLR MOV MOV BI T ONE CMP BEQ MOV 8R MOV ADO TST 176544 005723 002~ 16 002420 002424 002426 002432 002434 ; "'* "'* '" "'.'"SCOPE "'*'" *** 0/<** ",* ... '" '" ."'** '" ."'* * '" '" "'''II *$* "'* '" *"'''' '" *** ••• * *'" ** .",*>Ie.", "'."' ... "'* TES T2' 000002 014114 000566 000770 000001 CCMFAFO. MEMORY PARITY TEST 975 PAGE 17 12'27 ; PRESENT. CCMFAF.P11 947 94B 949 950 951 952 953 954 955 956 9S7 9S8 959 960 961 962 963 964 965 966 967 968 969 970 97' 972 973 974 13-JAN-78 30A( 1 052) 01 '" *' '" "'* * "'* * * "'* ** "'* ** "'* '" "'''' '" "'* '" '" ;MAP CORRESPONDENCE BETWEEN PARITY REGISTERS AND MEMORY. AND TYPE RESULTS :NOTE THAT IF PARITy MEMOR'y' IS NOT LOCATED CORRECTLY BY THIS SUBTEST :IT IS DuE TO ONE OF THE FOLLOWING FAILURES: -SETTING ~JRITE WRONG PARITY DID NOT CAUSE BAD PARITY TO BE WRITTEN -PARITY GENERATE OR OETECT LOGIC FAILED -PARITY ERROR BIT FAILED TO SET -PARITY BITS IN MEMORY LOCATION FAilED (I.E. BIT STUCK AT GOOD PARITY VALUE) ;NOTE THAT SETTING SWITCH REGISTER S\·'ITCH 9 WILL CAUSE A HALT AFTER THE MAP :IS TYPED. IF YOU WISH TO CHANGE THE MAP TO I50LATE THE CAUSE OF A MAPPING :FAILURE, YOU CAN DO THIS ONCE THE PROCESSOR IS HALTED. SEE THE DESCRIPTION :IN THE LISTING (PRECEDING THE MAP TAG "MPRO" AT LOCATION 600) FOR THE MEANING ;OF THE MAP CONTENTS. AFTER MAKI!\IG THE DESIRED CHANGES. PRESS CONTINUE. THE NEW ;MAP WILL BE TYPED AND IF SWITCH 9 IS LEFT SET THE PROCESS WILL BE REPEATED. : IF SWITCH 9 IS NOT LEFT SET THE PROGRAM WI LL PROCEED TO TEST THE PARITY MEMORY :ANO REGISTERS AS RECORDED IN THE NEW MAP. 002606 1 04001 012777 005767 001044 004767 004767 002612 004767 00256-1 002566 002574 002600 002602 ; "'* ** TEST'" 000003 175762 l\t >Ie", '" * ***"'* .. "'* • SCOPE MOV TST 176306 "'**'" >I< '" '" ** "'* "'*'" *"'** .. '" '" >I< '" ** *. "'* "'*** *'" * '" ** "'* ** ** *'" "'''' : LOAD THE TEST NUMBER INTO THE DISPLAY : IF MAPPING HAS ALREAOY BEEN DONE :SKIP SUBTEST MTYFG TEST4 %7. CLRPAR %7,MAPMEM %7,MAPREG BNE JSR JSR JSR 011204 007 I 44 007466 ""oj< '" 1t3,@lDISPLAY ; MAP MEMORY ; FIND PARITY MEMORY AND CORRESPONDING :REGISTERS USING WRITE WRONG PARITY 002616 002622 002626 002632 002636 002676 002704 002706 005067 005067 012701 032711 001006 056167 056167 062701 020127 103762 004767 005267 032777 001402 000000 002710 000742 002640 002646 002654 002660 002664 002666 002672 176246 176244 000566 000001 000002 000004 0000 10 000766 010126 175664 001000 CONT3' 1$' 176222 176216 2$' 176174 ;W1THOUT ACTION ENABLE SET ; INITIALI.i.E LOCATIONS INDICATING PMEML CLR CLR MOV BIT BNE SIS BIS ADD CMP 6LO JSR INC BI T BEQ HALT PMEMH ItMPRO,Rl #1.@R1 2$ : TOT AL PARITY MEMORY PRESENT 2(Rl),PMEML 4(Rl) ,PMEMH ; FLAG EXISTING PARllY MEMORY (LOW 64K) :FLAG EXISTING PARITY MEMORY (HIGH 64K) #10, R1 Rl,#TREG 1$ %7, TMAP MTYFG BR :TYPE MAP : INDICATE MAPPING DONE #BIT9,@SWR ;5WITCH 9 SET? .+6 : NO- BRANCH :YES- SWITCH 9 SET INDICATING HALT ;AFTER TYPING PARITY MEMORY MAP : GO TYPE NEW MAP TO VERIFY USER'S INTENT CONT3 ; ** * '* "'* '" '" * "'* "' •• "''''* "'* >I< O' .. "'* "'* >I< '" ** ** >I< '" '" '" '" '" *** * ** * * * *"'* ****** ***"''''* "'****** ;SHOW THAT ASSERT P8 WORKS CORRECTLY FOR EACH REGISTER :SHOW THAT NO TRAP OCCURS IF AcTION ENABLE (AE) IS NOT SET CCMFAFO, MEMORY PARITY TEST 13-~AN-7B 12: 13 CCMFAF. PI1 993 994 995 996 997 998 999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010 1011 1012 1013 1014 1015 1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026 1027 1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 104B 12:27 PAGE 19 SEQ 0019 ;SHOW THAT SETTING AE WITH ERROR ALREADY SET DOESN'T CAUSE A TRAP ;NOTE THAT IF A KTll IS PRESENT, IT IS USED DURING THIS SUBTEST ; ..................................................................... TEST4: 002712 002714 002722 002730 002734 002740 002742 002746 104001 012777 012767 004767 005767 001004 004767 004767 002752 002756 002762 002766 002770 002774 002776 003000 003002 012700 012702 032710 001405 062700 005722 103771 000457 004767 000566 000770 000001 1$: 0000.10 LOP4: 011120 TST4: 003006 003012 003014 032701 001403 104002 000001 003016 003022 003030 003036 000167 012737 012770 01111 1 177746 003110 000004 003040 003044 005070 005711 000000 003046 003054 012737 052770 003116 000001 003062 003070 012737 005711 003124 003072 104002 000004 000100 011 056 175610 176160 013526 SCOPE MOV MOV TST BNE uSR uSR N4,.DISPLAY #100,IMAX %7,CLRPAR NOKT 1$ %7,NRALL %7,MAPI MOV MOV BIT BED ADD TST BLO BR uSR NMPRO, RO N1NDCO, R2 Nl,IIRO TST4 Nl0,RO (R2)+ LOOP4 DONE4 %7, LocATM BIT BED ERROR #l,Rl ~SR 010744 01111 0 LOOP4: ; BRANCH WHEN ALL REGISTERS HAVE BEEN TESTED ; LOCATE MEMORY CORRESPONDING TO ;THIS REGISTER- IF NO KTI I, Rl SHOULD ; BE RETURNED CONTAINING THE ADDRESS ;OF THE 1ST LOCATION CONTROLLED BY THIS ;REGISTER (INCLUDING EXTERNAL INTERLEAVE jOFFSET IF NEEDED) ;IF KTI1 IS PRESENT, Rl SHOUl.D BE RETURNED ;POINTING TO THE 1ST LOCATION CONTROLLED ;BY THIS REGISTER, MAPPED THRU KERNEL ; PAGE 1. KERNEL PAGE 1 SHOULD BE ;MAPPED TO THE CORRECT BANK ; IS ERROR RETURN INDICATED? ;NO- BRANCH JMAP INDICATES NO PARITY MEMORY ; IS CONTROLLED BY THIS REGISTER ;RO POINTS TO THE ADDRESS OF THE ; PARITY REGISTER .+10 ~MP LOP4 MOV MOV MOV NTRP4A,ON114 #WWP,II(RO) IIR1,IIRl CLR TST II(RO) IIRI 000114 000000 MO. BIS NTRP4B,IINPARVEC NAE,II(RO) 000114 MOV TST NTRP4C ,II'PARVEC IIRI 000114 000000 003074 003100 003102 003106 00311 0 005070 005511 005070 000730 104002 003112 003114 003116 022626 000767 104002 003120 003122 003124 003130 003132 022626 000764 005770 100401 104002 000000 003134 003136 003140 003146 003152 003154 022626 000756 012737 005767 001002 005037 000116 175376 MACYI1 30A( 1 052) 13-~AN-7B 12:27 ; LOAD THE TEST NUMBER INTO THE DISPLAY ;CLEAR ALL PARITY REGISTERS ;KT11 PRESENT? ;NO-BRANCH ; YES-MAP ALL PAGES NON RESIDENT ; THEN MAP KERNEL 0 TO BANK 0, KERNEL ;7 TO EXTERNAL BANK, SET KERNEL ;0,1, AND 7 RW, AND TURN ON KTll ; SETUP TO FIND REGI STERS PRESENT ; IS THIS REGISTER PRESENT? ; YES-BRANCH TO TEST IT ; NO-CHECK FOR ANOTHER ONE ; INCREMENT PTR9LT ERROR CCMFAFO, MEMORY PARITY TEST CCMFAF. Pl1 13-JAN-78 12:13 1049 1050 1051 1052 1053 1054 1055 1056 1057 1058 1059 1060 1061 1062 1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074 1075 1076 1077 1078 1079 1080 1081 1082 1083 1084 1085 1086 1087 1088 1089 1090 1091 1092 1093 1094 1095 1096 1097 1098 1099 11 00 1101 1102 1103 1104 13-~AN-78 MACYlt 30A( 1052) ;SETUP PArllTY TRAP RETURN ;SET WRITE WRONG PARITY ;WRITE CONTENTS OF LOCATION WITH ; WRONG PARITY ;CLEAR PARITY REGISTER ; READ BAD PARITY WITH ACTION ENABLE ; CLEARED- NO TRAP EXPECTED ; CHANGE PARITY TRAP RETURN ; SET ACTION ENABLE WITH PARITY ERROR ;ALREADY SET- SHOULDN'T TRAP YET ; CHANGE PAR ITY TRAP RETURN ;READ LOCATION AGAIN- SHOULD GET ; A PARITY TRAP DUE TO READING BAD ; PARITY WITH ACTION ENABLE SET ;NO PARITY TRAP AFTER READING LO~ATlON ;WHICH SHOULD CONTAIN DAD PARITY;Rt CONTAINS ADDRESS OF MEMORY LOCATION PAGE 20 SEQ 0020 CONT4 : 000000 II(RO) IIRI II(RO) LOP4 TRP4A: CLR ADC CLR BR ERROR CMP BR ERROR (SP)+,(SP)+ CONT4 TRP4B: CMP BR TST BMI ERROR (SP)+, (SP')+ CONT4 .(RO) .+4 CMP BR MOV TST BNE CLR (SP)+,(SP)+ CONT4 .PARVEC+2,.'PARVEC NOKT .+6 •• SRO 000000 TRP4C: 000114 DONE4: 177572 ; . . . . 4- . . . . . . . . . . . (VIRTUAL, THRU KERNEL PAGE " IF KT 11 PRESENT) • RO POINTS TO THE ADDRESS OF THE PARITY REGISTER IN WHICH AE WAS SET CLEAR PARITY REGISTER CLEAR BAD PARITY CLEAR PARITY ERROR BIT GO TO TEST NEXT REGISTER PARITY TRAP OCCURRED WITH ACTION ENABLE CLEAR- RO POINTS TO THE ADDRESS OF THE PARITY REGISTER UNDER TEST Rl CONTAINS THE ADDRESS OF THE MEMORY UNDER TEST (VIRTUAL IF KTI1 IS "qESENT) RESTORE STACK POINTER ; PARITY TRAP OCCURRED WHEN ACTION ; ENABLE WAS SET WITH PARITY ERROR ; ALREADY SET ; RO POINTS TO THE ADDRESS OF THE ; PARITY REGISTER UNDER TEST ;Rl CONTAiNS THE MEMORY ADDRESS UNDER ; TEST (VIRTUAL IF KT11 IS PRESENT) ;RESTORE STACK POINTER ; ERROR BIT SET AFTER PARITY TRAP? ; YES- BRANCH ; ERROR 81 T NOT SET AFTER PARITY ; TRAP- RO POINTS TO THE ADDRESS ;OF THE PARITY REGISTER UNDER TEST ;RESTORE STACK POINTER ; RESTORE TRAP CATCHER ;TURN OFF KT11 I F PRESENT * •••• *** .... ****** •••••••• "' ••• _._ ••• ** .... ***** ** •••••• *•••• ;SHOW THAT READING GOOD PARITY AFTER BAD PARITY DOESN'T CLEAR PARITY ERROR BIT 003160 003162 003170 003174 003200 003202 003206 104001 012777 004767 005767 001004 004767 004767 003212 003216 003222 003224 003230 003234 003236 003240 012700 03271 0 001406 062700 020027 103770 000431 004767 ;......... "' .... SCOPE '" '" '" "' . . '" "'.* "' .. '" "' ...... "' •• "' ... ** .... '" ••• * .. '" '" ** '" "' .... ** '" '" "' ... '" * '" "'.* ** .... "' .... * ... TEST5: 000005 010616 175350 175712 MOV ~SR TST BNE ~SR ~SR 010504 010650 000566 000001 1$: LOOPS: 000010 000766 LOPS: MOV BIT BEQ ADD CMP BLO BR 010662 TST5: ~SR N5,@DISPLAY PC,CLRPAR NOKT 1$ PC,NRALL PC,MAPI NMPRO, RO #I,i>RO TST5 Nl0,RO RO,NTREG LOOPS DONES PC, LQCATM ; LOAD THE TEST NUMBER INTO THE DISPLAY ;CLEAR ALL PARITY REGISTERS ;KTI1 PRESENT? ;NO, BRANCH ;YES, MAP ALL PAGES NON-RESIDENT ; THEN MAP KERNEL 0 TO BANK O. MAP KERNEL ; 7 TO THE EXTERNAL BANK. SET KERNEL ;0,1, AND 7 RW, AND TURN ON KTI1 ;SETUP TO FIND REGISTERS PRESENT ; IS THIS REGISTER PRESENT? ; YES- BRANCH TO TEST IT ; NO- CHECK FOR ANOTHER ONE ; EXIT WHE,' ALL REGISTERS HAVE BEEN TESTED ; LOCA TE MEMORY CORRESPONDING TO THIS CCMFAFO, MEMORY PARITY TEST CCMFAF .Pl1 13-JAN-#/8 12: 13 11 05 1106 1107 1108 1109 1110 1111 1112 1113 1114 1115 1116 1117 1118 1119 1120 1121 "1122 1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135 1136 1137 003244 003250 003252 032701 001403 104002 000001 003254 003260 003266 000167 012770 011111 177744 000004 003270 003272 003300 003302 003304 003310 003312 00S711 042770 01 1111 005711 005770 100401 104002 003314 003320 003322 003326 003330 005070 000741 005767 001002 005037 000004 MACY" " 57 1158 1159 1160 BIT BE0 ERROR "65 1166 1167 1168 1169 1170 1171 '172 1173 1174 1175 1176 1177 1178 1179 1180 1181 1182 1183 11 B4 1185 1186 1187 1188 1189 1190 000000 000000 175222 DONES: 177572 003350 003354 003356 003362 104001 012777 004767 005767 001 C 04 004767 004767 003366 003372 003376 003400 003404 0034 t a 003412 012700 032710 DC 1406 062700 020027 103770 000523 000566 000001 000010 000766 LOP6 : 003414 004767 010506 TST6 : 003334 003336 003344 TES16 : 000006 010442 175174 003420 003.:124 003426 032701 001403 104002 000001 003430 000167 177744 003444 003446 003450 003454 003456 110211 005711 005770 100006 104002 000000 003460 003464 003466 003470 003472 003474 003476 003502 003504 003510 003512 005070 005011 005002 000402 105:202 001363 110261 005711 005770 100002 104002 003514 003516 003520 000402 105202 001366 1204 003522 1205 1206 1207 120B 003526 003534 003536 0050 11 005002 012770 110211 005070 00.3542 003S44 003550 003552 005711 005770 100402 104002 0035~4 175536 010330 010474 000000 1 $: LOOP6 : MACY11 30A( 1052) REGISTER- R1 WILL BE RETURNED CONTAINING THE ADDRESS OF THE FIRST LOCATION CONTIWLLED BY THIS REGISTER (MAPPEO THRU KER~JEL PAGE 1 IF KT11 IS PRESENT) IS ERROR RETURN INDICATED? NO- BRANCH MAP INDICATES NO PARITY MEMORY IS CONTROLLED BY THIS REGISTER. RO POINTS TO THE ADDRESS OF THE PARITY REGISTER # 1, R1 • +1 a LOPS ItWWP RO 1 ;SET WWP IN THIS REGISTER ;I,o,'RITE CUNTENTS OF LOCATION ~JITH ; It/RONG PA!~I TY ;DETECT \·mm~G PARITY ;CLEAH I>IWP IN PARITY REGISTER ;RESTORF.. GOOD PARITY ; REREAD LOCAT ION :READ CONfENT$ OF PARITY REGISTER ;BRANCH IF PARITY ERROR IS STILL SET ; PARI TV ERROR BI f CLEARED BY READING ;GOOD PARITY (OR POSSIBLY l.>JHILE DOING ;THE BIC fO CLEAR WWP). RO POINTS TO ;THE PARITY REGISTER ADDRESS. ;CLEAR THE PARITY REGISTER @R1 TST BIC MOV TST TST BMI ERROR @R1 ";WP, (O( RO) @lR1 ,@lR1 @R1 @(RO) CLR BR TST BNE CLR @(RD) LOPS NOK r .+6 @#SRO .+4 ; TURN OFF KT11 I F PRESENT "'* *,. 5$: 2$: 00000 1 000000 000000 000000 MOV #6,I§.lOISPLAY %7, CLRPAR NOKT 1$ %7,NRALL %7,MAPl BEQ ADO CMP 8LO BR hMPRO,RO # 1,@lRO TST6 #10. RO RO.I1TREG LOOP6 DONE6 uSR %7,LOCATM BIT 13-JAN-78 12:27 : LOAD THE TEST NUMBER INTO THE DISPLAY ;CLEAR ALL PARITY REGISTERS ; KT 11 PRESENT? ; NO, BRANCH ; YE$- MAP IT (KERNEL 0 TO BANK 0, R'.'J; ; KERI~E L 7 TO EXTERr~AL BANK. RW; KERNEL 1 RW) ; !~ND TURN IT ON ;SETUP TO F I NO REGISTERS PRESENT ; IS THI S REGISTER PRESENT? ;YES- BRANCH TO TEST IT ; NO- CHECK FOR ANOTHER ONE ; BRANCH TO DO:'\JE IF ALL REGI STERS ; HAVE BEEN TESTED ; LOCATE MEMORY CORRESPONDING TO ;THIS REGISTER- R 1 SHOU LD BE RETURNED ;CONTAINING THE ADDRESS OF THE FIRST PAGE 22 SI T BEQ ERROR 111. R1 .+10 JMP LOP6 ;FIRST SHOW THAT I F THE PARITY REGISTER ;PARrTY ERROR DOESN J T SET @R1 CLR CLR @(RDl CLR R2 000000 000004 SCOPE MOV JSR TST BNE uSR uSR SEQ 0022 1$: , 209 , 21 0 1211 1212 1213 1214 , 215 1216 PAGE 21 oj< >I ***"' ... "''' "'. '" *,.**,,'01". *' *"'***** * .. *** **** *' * .. ** "'*i<", ~* * ... ****** *** .. ***"'* ;SHDW THAT PARlTY GENERATE AND DETECT LOGIC \!JORKS CORRECTLY FOR EACH BYTE ;SHOI": TriAT WRITE WKONG PARITY WORKS FOR HIGH AND lOW BYTES ;SHO~: THAT WRITING INTO LOCATION ~JP VJAS NOT SET) ;INCREMENT VALUE TO BE LOADED ; LOOP UNT IL ALL VALUES HAVE BEEN USED ;TEST P,\R I TY GENERATE AND DETECT LOGIC BY SETTING ~JRlTE l.oJRONG PARITY AND ;WRITING EACH POSSIBLE VALUE TO THE LOW BYTE, THEN TO THE HIGH BYTE @R1 6$ : ClR ; INITIALIZE LOCATION UNDER TEST CLR R2 ;INITIALIZE VALUE TO BE WRITTEN MOil #WI,oJP,@(RO) 3$: ;SET l,oJRl TE l.'JRONG PARITY MOVB R2 ,@R1 ;WRITE WRDNG PARITY IN lOW BYTE @(RO) ClR ; CLEAR l,oJRlTE WRONG PARI TY. AND CLEAR ; PARITY ERROR IF SET @R1 TST ; READ BACK l,oJRONG PARITY @(RO) TST ; PARITY f:.RROR SET? BMI .+6 ; YES-BRANCH ERROR :PARITY ERROR DID NOT SET WHEN THE ; LOCATION UNDER TEST WAS WRITTEN : AND READ BACK WITH WR .. TE WRONG PARITY ; SET RD POINTS TO ADDRESS OF PARITY CCMFAFO, MEMORY PARITY TEST CCMFAF.P11 13-JAN-7812:13 1217 1218 1219 1220 1221 1222 1223 1224 1225 1226 1227 1228 1229 1230 1231 1232 1233 1234 , 235 1236 003554 003556 003560 003562 003564 003570 000402 105202 001362 005011 005070 003572 003576 003600 005770 003602 003610 003614 012770 110261 005070 1237 003620 1238 1239 003622 003626 003630 005711 005770 100402 104002 1240 1241 MACY11 30A(1052) 12:27 PAGE 23 SEQ 0023 000000 005711 000000 100(}01 104002 000004 000001 000000 13-JAN-7B 000000 4$: 000000 BR INCB BNE CLR CLR TST .+6 R2 3$ @Rl @(RO) @Rl TST BPL ERROR "( RO) .+4 MOV MOVB CLR #WWP,@>(RO) R2,1(R1) @(RO) TST TST BMI ERROR @Rl @(RO) .+6 BR INCB BNE CLR CLR TST .+6 R2 4$ @Rl @(RO) @Rl TST BPL ERROR @(RO) .+4 BR TST BNE CLR LOPS NOKT .+6 @#SRO REGISTER. Rl CONTAINS ADDRESS OF LOCATION BEING TESTED (VIRTUAL, THRU KERNEL PAGE 1 IF KT11 IS PRESENT). R2 CONTAINS THE VALUE WRITTEN EX IT LOOP AFTER ERROR INCREMENT DATA LOOP TILL DONE WITH ALL VALUES REINITIALIZE lOCATION TO CLEAR BAD PARITY CLEAR ERROR IF SET READ LOCATION, WHICH SHOULD NOW HAVE GOOD PAR ITY PARITY ERROR SET? NO, BRANCH GOOD PARITY WAS NOT RESTORED BY WRITING INTO THE LOCATION WITH WRITE WRONG PARITY CLEARED SET WRITE WRONG PARITY WRITE WRONG PARITY IN HIGH BYTE CLEAR WRITE \IJRONG PARITY AND PARITY ERROR I F SET READ BACK wRONG PARI TV PARI TY ERROR SET? YES-BRANCH PARITY ERROR DID NOT SET WHEN THE LOCATION UNDER TEST WAS WRITTEN AND READ BACK WITH WRITE WRONG PARITY SET. RO POINTS TO THE AODRESS OF THE PARITy REGISTER. THE VALUE IN R2 WAS WRITTEN INTO THE HIGH BYTE OF THE LOCATION WHOSE ADDRESS IS IN R1 I VIRTUAL THRU KERNEL PAGE 1 IF KT11 PRESENT) THEN THE:. PARITY REGISTER WAS CLEARED AND THE ~ I< #7 ,"DISPLAY 13-JAN-7B 12:27 : LOAD THE TEST NUMBER INTO THE DISPLAY PAGE 24 SEQ 0024 000010 000766 000001 100000 SCOPE MOV TRP7: 000000 J5R MOV CLR MOV BI T BEADD CMP BLO BR MOV BIS NOP CLR BR MOV BR ERROR %7.CLRPAR II'TRP7,@lIIPARVEC @IIPARVEC+2 HMPRO. RO #1,@RO TST7 #10, RO RD, ,uTREG LUP7 DONE7 #AE,@(RO) #PERR,@(RO) CMP CLR BR (SP)+, (SP)+ @(RO) LOOP7 @(RO) LOOP7 I;'PARVEC+2.@lIIPARVEC TEST 1 0 : INITIALLY CLEAR ALL PARITY REGISTERS : SETUP PARITY TRAP RETuRN : SETUP TO GET ADDRESS OF REGISTER PRESENT : BRANCH TO TEST REGISTER ; BRANCH IF DONE TESTING ALL REGISTERS ;SET ACTION ENABLE ;SET PARITY ERROR : SHOULD NOT TRAP : CLEAR PARITY REGI5TER ;GO CHECK NEXT REGISTER : TRAP OCCURRED WHEN PARITY ERROR BIT ; WAS SET VI A A BI S INSTRUCT ION ;WITH ACTION ENABLE ALREADY SET. :RD POINTS TO THE ADDRESS OF THE ; PARITY REGISTER :RESTORE STACK POINTER :CLEAR PARITY REGISTER 1300 1301 1302 1303 1304 1305 **'" '" * '" '" '" '" '" '" "'*"'** '" *'" '" * '" "'* "'* '" '" * ** *"'* '" ** '" >t * "' ... "'* '" '" *'" "'' ' "'''' '" '" ** * * '" '" ** * "'** *'" *** SHOW THAT REPEATED PARITY ERRORS WILL CAUSE REPEATED TRAPS IF ACTION ENABLE IS SET AND PARITY ERROR IS LEFT SET. SHO,) THAT niE ERROR ADDRES5 BITS (11-5) TRACK (ONLY FOR CORE PARITY REGISTERS) ** ** * '" ill '" '" "'*"'''''''''' '" "''''*''' "'**"'*'" ** "'** '" * '" "'''''''* '" '" >I< "'* ... '" "'* '" "'' ' ** "'''''''* '" "''''*''''''''''''''''''*''' *** eeMFAFO, MEMORY PARiTy TEST 13-JAN-7812:13 eCMFAF. P11 1306 1307 1308 1309 1310 1311 1312 1313 1314 1315 1316 1317 13'8 1319 1320 1321 1322 1323 1324 1325 1326 1327 132B 1329 1330 1331 1332 1333 1334 1335 1336 1337 1338 1339 1340 1341 1342 1343 1344 1345 1346 1347 134B 1349 ,350 1351 1352 1353 1354 1355 1356 1357 135B 1359 1360 1361 004016 004020 004026 004032 004036 004040 004044 104001 012777 004767 005767 001004 004767 004767 004050 004054 004060 004064 004066 004072 004074 004100 004102 004104 004110 004114 004116 012700 012702 032710 001407 062700 005722 020027 103767 000507 004767 032701 001403 104002 004120 004124 004132 004134 004142 004150 004156 000167 012770 012737 012767 004164 005711 004166 104002 004170 004172 000441 004176 104002 004200 004202 004206 004210 004214 000435 005367 001413 022712 004216 032770 011111 016161 012770 005761 1365 1366 1367 136B 1369 1370 1371 1372 ,373 1374 1375 1376 1377 1378 1379 1380 1381 1382 1383 1384 1385 1386 1387 138B 1389 1390 1391 1392 1393 1394 1395 1396 1397 139B 1399 1400 000010 007760 174512 MOV MOV BIT BEQ LOOP10: ADD TST CMP BLO BR TST1 0: JSR BIT BEQ ERROR LUPI 0: 010016 000001 177742 000004 000000 004000 000001 004202 000010 004000 000000 000114 000152 INST1 : HMPRO, RO HINDeO,R2 H 1 ,@RO TST10 #1 0, RO (R2)+ RO, HTREG LUP10 DONE10 %7. LOCATM N1 ,Rl INST2: 004000 I F PRESENT ; BRANCH IF ALL REGISTERS HAVE BEEN TESTED ; ERROR RETURN INDICATED? ; BRANCH IF NO ;MAP INDICATES THERE IS NO MEMORY ; CORRESPONDING TO THIS REGISTER ; RO POINTS TO THE ADDRESS OF ;THE PARITY REGISTER .+10 JMP MOV MOV MOV MOV MOV MOV LOOP 10 NWWP,@(RO) IilRl,@R1 4000(Rl) ,4000(Rl) hAE,C'(RO) hTRPl O,@lNPARVEC H10,COUNT TST IilRl BR TST LOAD THE TEST NUMBER INTO THE DISPLAY INITIALLY CLEAR ALL PARITY REGISTERS KT 11 PRESENT? NO- BRANCH YES- INITIALLY MAP ALL PAGES NR MAP KERNEL 0 TO BANK 0, RW KERNEL 7 TO THE EXTERNAL BANK, RW MAKE KERNE", PAGE 1 RW AND TURN ON THE KT11 ;BRANC;, TO TEST REGISTER . ;SET WRITE WAONG PAAITY ;WRlTE WHCNG PARITY IN FIRST LOCATION ;WRITE WRONG PARITY IN SECOND LOCATION ; SET ACTION ENABLE AND CLEAR REST .. ;SETUP PARITY TRAP RETURN : SETUP COUNTER TO EXECUTE ; ( 1,,5T 1 ) TEN TIMES INSTRU~TION 1 ;READ WRONG PARITY WITH AE SET- SHOULD ;TRAP TO TRP1Q :NO PARITY TRAP OCCURRED. RO POINTS TO ; ADDRESS OF THE PAR I TV R EGI STER BE I NG :TESTEO. ERROR CONT10 4000( R1) ;REAO WRONG PARITY FROM SECOND ADDRESS :WITH AE 5ET- SHOULD TRAP TO TRP10A ERROR ;NO PARITY TRAP OCCURRED, RO POINTS TO ; THE ADDRESS OF THE PARITY REGISTER : BEING TESTED BR TRP10: 000130 000001 001005 BEQ eMP 6NE eONT 10 COUNT 1$ H1 ,(R2) 2$ BIT #BIT5,@(RO) OEt: ;HAS PARITY TRAP OCCURRED TEN TIMES? ; YES- BRAI'-lCH ; IS THIS /... CORE PAR REG? ; NO, BRANCH (NO ERROR ; ADDRESS 81 T5 FOR MOS PAR 000040 000000 ; IF ERROR ADDRESS BITS ARE TRACKING, ;BlT 5 SHOULD 8E CLEAR 004224 004226 BEQ ERROR 001401 104002 004230 004244 004250 004252 004256 004260 012716 000002 012737 012716 000002 022712 001005 032770 004266 004270 004234 004236 MACY11 30A(1052) (ONLY FOR CORE PARITY) ,+4 ;PARITY ERROR ADDRESS BITS INCORKECT ;RO POINTS TO THE ADDRESS OF THE PARITY ;REGISTER. 13-JAN-78 12:27 AI CONTAINS THE ADDRESS PAGE 26 SEQ 0026 004164 2$: MOV 1$: MOV IIINST1,@lSP ; REFERENCED TO CAUSE A PARITY TRAP ; (VIRTUAL IF KTll IS PRESENT) ;GO EXECUTE INSTRUCTION 1 AGAIN IITRPl OA ,@I#PARVEC IIINST2,@SP :GO EXECUTE RTl 004252 004172 000114 MOV ; CHANGE PARI TV TRAP RETURN INSTRUCTION 2 RTl eMP BNE 8IT N1 ,(R2) 1$ HBlT5,@(RO) 00,001 BNE .+4 104002 ERROR TRP10A: 000001 000040 000000 ; IS THIS A CORE REG? :NO. BRANCH ; PARI TY 'TRAP OCCURRED- CHECK PARITy ;ERROR ACDRESS BITS ;BRANCH IF OK (IF THE PARITY ERR~·~ ;ADDRESS 6ITS TRACKED. BIT 5 WILL BE SET) ;PARITY ERROR ADDRESS BITS INCORRECT ;RO POINTS TO THE ADDRESS OF THE ;PARITY REGISTER, THE ADDRESS REFERENCED ;TO CAUSE THE ERROR WAS THAT IN ;Rl 004272 004274 004302 004306 004310 004314 004320 004322 004326 004330 004334 004336 022626 012737 005070 005511 00 5561 005070 000662 005767 001002 005037 00 040 1 000000 000116 000000 000114 004000 000000 174222 177572 1 $: CMP CONT10: MOV eLR ADC ADC CLR BR 00NE1 0: TST BNt:: CLR 8R COUNT: 0 (SP)+,(SP)+ II PAR'JEC+2.@#PARVEC @(RO) @Rl 4000(Rl ) Iil( RO) LOOP 10 NOKT ,+6 @flSRO TEST11 PLUS 4000 (OCTAL), ; RESTORE T RAPCATCHER ;CLEAR PARITY REGISTER ;CLEAR BAD PARITy ; CLEAR PARITY ERROR BIT I F SET ; TURN OFF KT11 IF PRESENT i * "' ...... '" '" * * '" '" *** '" '" *""* ** ** * '" "'* * * >1< ...... '" ** '" * **,..". ... '" '" >/. *- ** '" ** 'I<,;. "' ... ** *"' . . '" ** ** '" '" "'* **" ;IF MULTIPLE PARITY ERRORS OCCUR DURING ONE INSTRUCTION OJITH f.CTION ENABLE ;NOT SET) THE ERROR ADDRESS BITS WILL RECORD THE LAST ERROR ;REGISTERS) ; "'* ** '" "' .. * '" * '" TEST11: 000566 000770 000001 1413 1414 1415 1416 1417 004416 004422 004424 062700 005723 020027 000010 1409 1410 1411 1412 PAGE 25 #10,@OISPLAY %7,CLRPAR NOKT 1$ %7,NRALL %7,MAPl 1$: 000766 012700 012703 032710 001003 022713 001407 1406' 1407 1406 MOV JSR TST BNE J5R J5R 175054 000010 004372 004376 004402 004406 004410 004414 1405 12: 27 SE~ 0025 000566 000770 000001 004354 004360 004362 004366 1403 1404 13-JAN-78 0: SCOPE 007646 010012 104001 012777 004767 005767 001004 004767 004767 1401 1402 30A( 1 052) TEST1 CCMFAFO. MEMORY PARITY TEST CCMFAF.Pl1 13-JAN-7812:13 1362 1363 1364 MACY11 004340 004342 004350 000011 007436 17 4170 174532 007324 007470 1$: LUP11 : 000001 >I< SCOPE MOV JSR TST BNE JSR JSR MOV MOV BIT BNE CMP SEQ >1<** *'" *** '" '" '1* >1'** ** '" >I< '" "'''' **** '" *- >I< '" ** * "' .. ..to '"'-* '" *-oJ<;. '" '" 000766 ADD TST CMP (ONLY FOR CORE PARITY **"'''' **>1<* ** **'" LOAD THE TEST NUMBER INTO THE DISPLAY INITIALLY CLEAR ALL PARITY REGISTERS H11,@DISPLAY %7,CLRPAR NOKT 1$ %7.NRALL %7,MAP1 KT 11 PHESENT? NO- BRANCH IlMPRO I RO SETUP TO GET ADDRESSES OF REGISTERS PRESENT YES. MAP KERNEL PAGE 0 TO BANK O.RW PAGE ? TO THE EXTERNAL BANK. RW SET KERNEL PAGE' RW AND TURN ON KTll MAP KERNEL hINDCO, R3 #1.@RO LOOP11 Nl , (R3) TST11 IF THIS REG NOT ?RESENT. SKIP IS THIS A CORE PAR REG? THEN TEST IT YES. IF NOT CORE, LOOP'1: '" '" #10, RD ( R3)+ RO,HTREG SKIP THIS REGISTER CCMFAFO, MEMORY PARITY TEST CCMFAF.Pl1 13-JAN-7812:13 1418 1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 ,429 1430 1431 1432 1433 1434 1435 1436 1437 143B 1439 1440 1441 1442 1443 i 444 1445 1446 1447 1448 1449 1450 1451 1452 1453 1454 14~5 1456 1457 004430 004432 004434 103764 000443 004767 004440 004444 004446 032701 001403 104002 004450 0044S4 004456 004462 004470 004472 004474 004500 000167 010102 177742 062702 010000 000004 011212 005070 021112 004502 004506 004510 00S770 100401 104002 000000 004512 032770 000100 004520 004522 001001 104002 004524 004530 004532 004534 004540 004542 004546 004550 005070 005511 005512 005070 000726 005767 001002 00S037 012770 MACY,' 30A('0521 13-JAN-7B ,2:27 PAGE 27 SEO 0027 007466 TST11: 000001 000000 011111 000000 000000 000000 000000 DONEll: 174002 177572 8LO BR JSR LUP11 DONE11 %7,LOCATM BIT BE. ERROR 111 t Rl .+10 JMP LOOPll MOV Rl,R2 ADD MOV MOV MOV CLR CMP #10000,R2 NWWP ,@>(RO) @>Rl ,il>Rl Il'R2,II>R2 @>(RO) @>Rl ,Ii'R2 TST BMI ERROR 1'( RO) .+4 BIT #BIT6,@l(RO) BNE ERROR .+4 CLR ADC ADC CLR 8R TST BNE CLR II>(RO) <1ORl i'R2 @(RO) LOOPll NOKT .+6 i'NSRO BRANCH OUT IF ALL REGISTERS HAVE BEEN TESTED GET THE ADDRESS OF A MEMORY LOCATION CORRESPONDING TO THIS PARITY REGISTER ERROR RETURN INDICATED? BRANCH I F NOT NO MEMORY IN MAP CORRESPONDING TO THIS PARITY REGISTER. RO POINTS TO THE ADDRESS OF THE PARITY REGISTER :SETUP SECOND TEST ADDRESS LOCATION : SET WRITE WRONG PARITY .:WRITE WRONG PARITY IN FIRST TEST LOCATION :WRITE WRONG PARITY IN SECOND TEST LOCATION :CLEAR PARITY REGISTER :READ FIRST TEST LOCATION, AND : THEN READ SECOND TEST LOCATION : MAKE SURE PARITY ERROR SET ;PARITY ERROR NOT SET AFTER : READING TWO LOCATIONS WHICH : SHOULD HAVE BAD PARITY : CHECK ERROR ADDRESS- I F THE LAST :ADDRESS wAS RECORDED. BIT 6 WILL : BE SET : PARITY ERROR ADDRESS BITS INCORRECT : RO POINTS TO ADDRESS OF PARITY REGISTER : R2 CONTAINS ADDRESS OF LAST BAD PARITY : LOCA TlON REFERENCED (I F KT11 PRESENT. :ADDRESS IS VIRTUAL THRU KERNEL PAGE 1) :CLEAR PARITY REGISTER ;CLEAR BAI'> PARITY :CLEAR PARITY ERROR BIT : TURN OFF KT11 I F PRESENT '458 1459 1460 1461 1462 1463 1464 , 465 1466 1467 1468 1469 1470 1471 1472 1473 **,. . . '" '" '" ** *** "' ... ****** "' ... ** *'" ** ** '" "'' 'II: '" ** '" '" "' .. *** '" '" ** ** * '" ** '" *** '" "'**.* .01<",* *** SHOw THAT IF AN INSTRUCTION DOING A DATIP GETS A PARITY ERROR, THE ORIGINAL DATA IS REWRITTEN IF ACTION ENABLE IS SET, AND IS ALTERRED IF ACTION ENABLE IS CLEAR 004554 104001 004556 012777 004564 004570 004767 005767 001004 004767 004767 004574 004576 004602 .>jo ** '" *** *** '" ** "'* '" "''''"" "'''''''>It''''''''' "'.'" ."''''**** ** '" '" ** ** '" * "'* "''''*,.. ** '" '" ** ** **** **** '" EST12: 000012 007222 173754 174316 00711 0 007254 ccrv1FAFO. MEMORY PARITY TEST CCMFAF.Pl1 13-JAN-7B 12:13 MACV11 SCOPE MOV JsR TsT BNE JSR JSR 30A{10S2) #12,"DlsPLAY %7,CLRPAR NOKT 1$ %7,NRALL %7,MAPl 13-JAN-78 12:27 ADD TST CMP BR #1 0, RO ( R2)+ RO,.,REG LUP12 DONE12 JSR %7,LOCATM BIT BEQ ERROR #l,Rl .+10 JMP MOV MOV MOV MOV LODP12. #TRP12,@#PARVEC #WWP,@(RO) #125252.@lRl NAE,@l(RO) 005211 INC @Rl 004720 104002 ERROR 004722 004730 004734 004736 000440 005070 021127 001401 104002 004740 004744 004746 005770 100401 104002 004750 004752 022626 012770 000004 004760 012711 125252 1478 004624 1479 1480 004630 012700 012702 032710 001003 022712 001407 1481 1482 1483 1484 1485 1486 1487 004632 004636 004640 004644 004646 062700 005722 020027 103764 000474 000766 004650 004767 007252 004654 004660 004662 032701 001403 104002 000001 1498 004664 004670 004676 004704 004710 000167 012737 012770 012711 012770 177742 004724 000004 125252 000001 1499 ,500 004716 00--1612 004616 OO.q622 LUP12: 000001 LOOP12: 000010 BLO T5T1:c.: #1.@lRD LOOP 12 #1, (R2) TST12 1488 1489 1490 1491 1492 1493 1494 1495 1496 1497 1501 1502 1503 1504 1505 1506 1507 150B 1509 1510 1511 1512 lS13 1514 1515 1516 1517 1518 1519 1520 ,521 ,522 1523 1524 1525 1526 1527 1528 1529 RW SEQ 0028 hMPRO. RO IIINDCD,R2 004606 : KT 11 PRESENT? : NO- BRANCH : YES, MAP KERNEL 0 TO BANK 0, RW :MAP KERNEL 7 TO THE EXTERNAL BANK, : SET KERNEL 1 RW AND TURN ON KT11 PAGE 28 MOV MOV BIT BNE CMP BEQ 1$: 000566 000770 000001 1474 1475 1476 1477 : LOAO THE TEST NUMBER INTO THE DISPLAY : SETUP TO GET ADDRESSES OF REGISTERS PRESENT SKIP. IF THIS REG NOT PRESENT REG PRESENT, IS IT CORE? YES, DO* THIS TEST SKIP, IF THIS REG IS NOT CORE BRANCH TO DONE I F ALL REGISTERS HAVE BEEN TESTED LOCATE MEMORY CORRESPONDING TO THIS REGISTER ERROR RETURN INDICATED? NO- BRANCH NO MEMORY IN MAP CORRESPONDING TO THIS REGISTER. RO POINTS TO THE ADDRESS OF THE PARITY REGISTER 004724 000114 000000 000000 TRP12: 000000 125252 BR CLR CMP BEQ CONT12 @l(RO) @Rl ,#125252 .+4 SET UP PARITY TRAP RETURN SET WRITE WRONG PARITY WRITE WRONG PARITY IN TEST LOCATION SET ACTION ENABLE AND CLEAR WRITE WRONG PARITY 00 DATIP.DATO WITH ACTION ENABLE SETSHOULD A90RT ON DATIP AND RESTORE ORIGINAL DATA NO ABORT OCCURRED ON READING LOCATION WHICH SHOULD CONTAIN BAD PARITY (WITH AE SET I. RO POINTS TO ADDRESS OF PARITY REGISTER. Rl CONTAINS ADDRESS OF TEST LOCATION (VIRTUAL THRU KERNEL PAGE 1 IF KTll IS PRESENT I PARITY TRAP OCCURRED- CLEAR PARITY REGISTER ORIGINAL DATA RESTORED? YES. BRANCH NO- DATIP WHICH GOT A PARITY ERROR TRAP ALTERRED CONTENTS OF LOCATION READ. ADDRESS OF TEST LOCATION IS IN Rl (I F KTll IS PRESENT, ADDRESS IN Rl ERROR IS VIRTUAL THHU KERNEL PAGE 1) RO POINTS TO ADDRESS OF PARITY REGISTER 000000 000000 TST BMI ERROR @(RO) .+4 CMP MOV (sP)+, (SP)+ #WWP,@>(RO) MOV #125252,«'Rl MAKE SURE PARITY ERROR DATA WAS REREAD IN THE SET WHEN ABOVE CMP DATIP WHICH GOT A PARITY ERROR TRAP ALTERRED THE PARITY OF THE LOCATION READ Rl CONTAINS ADDRESS OF TEST LOCATION (VIRTUAL THRU KERNEL 1 IF KT11 PRESENT) RESTORE STACK POINTER SET WRITE WRONG PARITY AND CLEAR PARI TY ERROR REWRITE DATA WITH WRONG PARITY CCMFAFO, MEMORY PARITY TEST CCMFAF.Pll 13-JAN-7812:13 1530 1531 1532 1533 1534 1535 1536 1537 1538 1539 004764 004770 004776 005070 012737 005211 000000 000116 005000 005D04 005010 005012 005070 022711 000000 125253 005014 005020 005022 005770 100001 104002 000000 005024 005030 005032 005036 005070 0050 11 005070 000675 000000 005040 005046 005052 005054 012737 005767 001002 005037 000116 173476 MACY11 30A(1052) 13-JAN-78 12:21 PAGE 29 SEQ 0029 000114 001401 104002 CLR MoV INC @(RO) # PARVEC+2, "NPARVEC @lRl CLR CMP BEQ ERROR 11'( RO) "25253,@lR1 .+4 TST BPL ERROR "( RO) ;DATIP. DATo TO A LOCATION CONTAINING BAD ; PARITY Io'JITHOUT AE SET LEFT INCORRECT :DATA. RO POINTS TO THE ADDRESS OF ; THE PARITY REGISTER. R1 CONTAINS THE ;ADDRESS OF THE TEST LOCATION (V_~TUAL :THRU KERNEL PAGE 1 IF KTl1 IS PRESENT) ;CHECK PARITY ERROR BIT 1540 1541 1542 1543 1544 1545 1546 1547 154B 1549 .+4 1550 1551 1552 1553 1554 1555 1556 1557 1558 1559 1560 000000 QOO 114 177572 1561 1562 1563 1564 1565 1572 1573 1574 1575 1576 1577 1579 1579 1580 1581 DONE 12: MoV TST BNE CLR IIPARVEC+2,@#PARVEC NOKr .+6 ... SRO ; oj< 005060 005062 005070 005074 005100 005102 005,06 005112 005116 DOS122 005124 005130 1583 1584 1585 005134 005136 005767 001004 0000 13 006716 173450 174012 SCOPE MoV JSR TST BNE JSR JSR 004767 004767 006604 006750 012700 000566 000001 1$: LUP13: MDV BIT BEQ #MPRO,RO II 1 ,@RO 000010 LooP13: ADO CMP BLo BR #1 0, RO RO. #TREG LUP13 DONE13 032710 001406 062700 020027 103770 000470 000766 005140 004767 006762 005144 0051 SO 005152 032701 001403 000001 005154 000167 012737 MACY 11 30A ( 1 052) >1< . . . . 1/13,@DISPLAY %7.CLRPAR NOKT 1$ %7,NRALL %7,MAPl IF PRESENT 13-JAN-7B 12: 27 005160 BI T BEQ EROOR 111. R1 000114 000000 JMP MOV MoV MOV MoV LoOP13 IITRP13,@I#PARVEC /lWWP,@(RD) #125252,@Rl NAE,@(RO) @>R1 005206 005711 TST 005210 104002 ERROR 005212 000434 005070 021127 001401 104002 005214 005220 005224 005226 005230 005234 005770 005236 100401 104002 005240 005242 022626 012770 005250 012711 005070 012737 005711 005254 005260 005266 0052'10 005274 005300 00S302 005070 022711 001401 104002 000000 TRP13: 000000 125252 000000 000004 125252 000000 000116 000000 125252 ;LOAD THE TEST NUMBER INTO THE DISPLAY ; KTll PRESENT? ; NO- SRANCH ;YES, MAP KERNEL a TO BANK O,KERNEL ;7 TO THE EXTERNAL BANK. AND KERNEL ; 0.1 ,AND 7 RW ; SETUP TO GET ADDRESSES OF REGISTERS PRESENT GO ALL REGI5TERS HAVE BEEN PAGE 30 %7, LoCATM 012770 012770 *** ** * *' ........ ~ '* '" * 1< t">/.- "' .. "''' "'" '" >I< '" '" "'* * * '" *** *"'* ; BRANCH I ' : TESTED JSR 005166 005174 005200 012711 * "'''' ** *'** SEQ 0030 TST 13: 104002 177744 005214 000004 125252 000001 * '" ; I f THIS REGISTER IS PRESENT, : TEST IT TST13 .+10 1593 1594 1 S95 1596 1597 159B 1599 1600 1601 1602 1603 1604 1605 1606 1607 1608 1609 1610 1611 1612 1613 1614 1615 1616 1617 161 B 1619 1620 1621 1622 1 b23 1624 1625 1626 1627 1628 1629 1630 1631 1632 1633 1634 1635 ~ 636 1637 163B 1639 1640 1641 ; TURN OFF KT11 ** "'" "'"' "',,- * '" '" * * '" **"' * ** .. ** '" *** '" *"' .. ** * .. ** TEST13: 104001 012777 004767 CCMFAFO, MEMORY PARITY TEST CCMFAF,P11 13-JAN-7812:13 1591 1592 @(RO) @R1 @(RO) LOOP 12 ; . . '" "''' '" "' .. '" '" '" '" ** '" '" '" '" '" *'" * '" '" 1582 1586 1587 1588 1589 t 590 CoNTI2: CLR CLR CLR BR :DATIP, DATO WITH AE CLEAR DID ;NDT CLEAR BAD PARITY IN LOCATION ;ADDRESSED. RO POINTS TO THE ADDRESS ;OF THE PARITY REGISTER. Rl CONTAINS ; THE ADDRESS OF THE TEST LOCATION ; (VIRTUAL THRU KERNEL PAGE 1 IF KT11 : IS PRESENT) ; CLEAR PARITY REGISTER ;ClEAR LOCATION TO RESTORE GOOD PARITY ;CLEAR PARITY ERROR IF SET ;GO CHECK FOR ANOTHER PARITY ; REGISTER ; RESTORE TRAPCATCHER ~ * '" '" "',. '" '" '" '" '" >1-* *' '" '" '" '" '" "' . . *>1< '" '" '" '" "' .. * ;SHOW THAT IF AN INSTRUCTION DOING A DATI (BUT NO DATO TO THE SAME LOCATION) ;GETS A PARITY ERROR, THE ORIGINAL DATA IS UNALTERRED, WHETHER OR NOT ACTION : ENABLE IS SET 1566 1567 1568 1569 1570 1571 ;CLEAR PARITY REGISTER ; RESTORE TRAPCATCHER ;SINCE AE 15 CLEAR, INSTRUCTION 5HOULD ; COMPLETE AND SHOULD CLEAR BAD PARITY ;CLEAR PARITY ERROR BIT ; CHECK DA T A 000000 000114 BR CLR CMP BEQ ERROR CoNT13 @(RO) @>Rl ,#125252 TST BMI ERROR @(RO) CMP MOV MOV CLR MoV TST (SP)+, (5P)+ #WWP, .. (RO·, #125252,@R1 @>(RO) /I PARVEC+2.@#PARVEC @Rl CLR CMP BEQ ERROR @(RO) #125252.I1'Rl .+4 .+4 LOCATE MEMORY CORRESPONDING TO THIS REGISTER. AND IF KT11 IS PRESENT MAP KERNEL 1 TO THAT MEMORY ERROR RETURN INDICATED? NO- BRANCH MAP INDICATES NO MEMORY WAS FOUNO CORRESPONDING TO THIS REGISTER RO POINTS TO THE ADDRESS OF THE PARI TY REGISTER SETUP PARITY TRAP RETURN SET WRITE WRONG PARITY WRITE I,>JRONG PARITY SET ACT ION ENABLE AND CLEAR ~JRITE WReNG PARITY DATI WI TH ACTION ENABLE SET SHOULD ABORT LEAVING DATA UNCHANGED NO ABORT ON READING BAD PARITY wI TH ACTION ENABLE SET. RO POINTS TO THE ADDRESS OF THE PARITY REGISTER. R1 CONTA[NS THE ADDRESS OF THE TEST LOCAT I ON (V I RTUA L THRU KERNE L PAGE 1 IF KTll IS PRESENT). ABORT OCCURRED AS EXPECTED- CLEAR REGI5TER ORIGINAl. DATA RESTORED? YES. BRANCH DATI WHICH GOT A PARITY ERROR ALTERRED THE CONTENTS OF THE LOCATION ADDRESSED. (R1 CONTAINS THE ADDRESS OF MEMORY BEING TESTED- IF KT11 IS PRESENT. ADDRESS IN R1 IS VIRTUAL) RO POINTS TO THE ADDRESS OF THE PARITY R~GISTER CHECK PM-dTY REGISTER BRANCH I F PARITY ERROR SET PARITY ERROR NOT SET AFTER READING DATA WrTH BAD PARITY RO POINTS TO THE ADDRESS OF THE PARITY REGISTER. Rl CONTAINS THE ADor.ESS 0;· THE TEST LOCATION (VIRTUAL THRU KERNEL PAGE 1 IF KT11 PRESENT) RESTORE STACK POINTER SET vJRITE WRONG PARITY, CLEAR PARITY ERROR REWRITE DATA WITH WRONG PARITY CLEAR PARITY REGISTER ;RESTORE TRAPCATCHER DATI TO LOCATION WITH BAD PARITY AE NOT SET-INSTRUCTION SHOULD COMPLETE CLEAR PARITy ERROR BIT CHECK DA TA .+4 DATI TO LOCATION WITH BAD PARITY WITHOUT ACTloN ENABLE SET LEFT INCORRECT OAT A R1 CONTAINS THE ADDRESS OF THE TEST LOCATION (VIRTUAL THRU KERNEL PAGE 1 CCMFAFO, MEMORY PARITY TEST 13-JAN-7812:13 MACYII 30A( 1052) 13-JAH-78 12:27 PAGE 31 CCMFAF. P11 1642 1643 1644 1645 , 646 1647 1648 1649 1650 1651 1652 1653 SEQ 0031 ! F KTtl IS PRESENT), RO POINTS TO THE ADDRESS OF THE PART!Y REGISTER. 005304 005310 005312 005316 005320 005326 005332 005334 005070 005011 000000 005070 000000 CONTI3: 000702 012737 005767 001002 005037 000116 173216 000114 177572 1654 1655 1656 " 1661 1662 1663 1664 1665 1666 1667 1668 1669 1670 1671 1672 1673 1674 1675 1676 1677 1678 1679 1680 16Bl 1682 1683 1684 1685 1686 1687 1688 1689 1690 1691 1692 1693 1694 1695 1696 1697 CLEAR PARITY REGISTER DONEI3: MOV TST BNE CLR HPARVEC+2.o;HPARVEC NOKT ,+6 @HSRO ;;CHECK *'" '" "'* "''''* '" '" '" ** '" "''' '" >I< '" "' ... ,... ..... "' ... '" '" '" 005430 005436 005444 005.';45 005454 005456 005460 005464 005472 C 054 76 005504 104001 012777 005067 004767 012737 022767 103402 004767 032767 001007 012767 012767 000403 0'2767 036767 001021 032767 001001 000402 000167 062767 OC6367 022767 003354 005506 005510 005514 000522 005530 005534 005536 005542 005544 005550 005554 005556 005564 012704 016767 062767 016705 OQ5025 020567 103774 012701 032711 C::J1003 012771 062701 005340 005342 005350 005354 005360 005366 005374 00S376 005402 005410 005412 005420 >I< 005426 ; '" '" '" '" ** '" SCOPE '" *** "' .. '" ** TESTI4: 000114 173474 005742 000002 173110 000004 040000 173100 173070 020000 173056 173060 173424 000002 173044 000776 020000 173022 000200 173014 173024 ~OV 'DV BR 1 $: MOV LOOPI4: BIT BNE LUP14 : BIT BNE BR EX: JMP ADD ASL CMP BGT 000443 001036 172776 020000 172762 TST14: 173006 173000 2$ : 172766 000566 000001 000001 000010 3$: 000000 MACYll >I< "' ...... MOV CLR JSR MOV CMP BLO J5R BIT BNE 173532 000014 011102 006432 005734 000002 CCMFAFO, MEMORY PARITY TEST CCMFAF. Ptl 1 3-J AN-78 12: 1 3 1698 1699 1700 1701 1702 1703 1704 1705 1706 1707 1708 1709 1710 1711 1712 1713 1714 1715 1716 1717 1718 1719 1720 , 721 1722 1723 1724 1725 1726 1727 1728 1729 1730 173 t 1732 1733 1734 1735 1736 1737 1738 1739 1740 1741 1742 1743 1744 1745 1746 1747 1748 17L1.9 1750 1751 1752 1753 I< '" '" "' ... CLEAR LOCATION CLEAR PARITY ERROR I F SET GO CHECK FOR ANOTHER PARITY REGISTER ; RESTORE TRAPCATCHER ; TURN OFF KT11 II< ** >1<"" "''' '" >I< '" "' ... '" I F PRESENT ~ '" ** '" '" ** ..... '" '" ** *** "'** PARITY MEMORY WITH SERIES OF PATTERNS FROM 4K TO 2BK ; ENABLE PARITY TRAP 1657 1658 1659 1660 CLR CLR CLR BR 30A(lCS2) BR MOV MOV ADu MDV CLR CMP BLO MOV BIT BNE MOV ADD 000766 004767 000024 4$: 005602 005604 005606 005610 005514 005616 005624 005724 005714 001373 004767 000714 012737 000473 006176 TST TST BNE J5R BR DONE 14: MOV BR 005626 016705 172664 005632 005634 005640 005644 005646 01'415 011567 021467 001401 104002 005650 005652 005656 005660 005725 020567 103765 005067 005664 005670 005674 005676 005702 005704 005710 005714 005716 005720 005724 012701 032711 001003 005771 100406 062701 020127 103765 000207 011167 104004 000566 000001 005726 004767 006562 005732 000207 005734 005740 005744 005750 005752 005756 005760 005764 005067 012701 032711 001003 005771 100407 062701 020127 172652 173102 000000 000010 000766 173042 173026 000566 000001 000000 000010 000766 oj< ; INIT IP,LIZE BANK INDICATOR TO BANK 2 ;INITIALIZE MEMORY STARTING AODRESS ; INITIALIZE BANK INDICATOR TO BA"K 1 ;DOES THIS 4K HAVE PARI TY? ; YES, TEST IT ; TEST FOR BANK 1 INDICATOR IF SET GO TO TEST 16 ; NO- UPDATE MEMORY ADDRESS ;UPDATE BIT POINTER ; THIS 28K DONE? ; NO, BRANCH TO SEE I F NEXT 4K ;SHOUlD BE TESTED ; YES, EX I T ; INITIALIZE PATTERN POINTER ; SET UPPER LIMIT FOR THIS 4K DONE 14 IIPARPAT, R4 ADRPT ,HIAOR 1t20000,HIADR ADRPT ,R5 (5) tR5, HIADR 2$ IIMPRO, R 1 #l,@R1 .+10 HAE,@(Rl) It 1 O. Rl 12:27 II< ;lOAD THE TEST NUMBER INTO THE DISPLAY ; DON I T I TERATE THE REST OF THE SUBTESTS ;ClEAR All PARITY REGISTERS ;SETUP PARITY TRAP RETURN ;TEST FOR AN 8K SYSTEM ;SYST > 8K ;5YST < OR = 8K ; TEST BANK INDICATOR FOR BANK 1 ; INITIALLY CLEAR CORE BLOCK UNDER TEST ; INITIALIZE TO SET AE IN ALL REGISTERS ;SET ACTION ENABLE IF :'EGISTER IS PRESENT PAGE 32 SEQ 0032 CMP EilO JSR 020127 103765 172676 172672 ** ** ** '" *"'*"'*'" '" '" "',. '" '" '" '" ** ** '" '" '" '" '" '" * '" ** **** *** *>It* 1t14,@DISPLAY IMAX PC, CLRPAR IITRP14,@lhPARVEC #2,PMEML ,+6 PC, SMlSYS 1/2,BITPT 1$ 1t4.BITPT #40000, ADRPT LOOP14 1t20000, ADRPT BI TPT ,PMEMl T5T14 112,BITPT EX ,+6 TEST,6 1t20000, ADRPT BI TPT 11200,81 TPT lOOP14 13-JAN-7B 005570 005574 005576 000116 >I< '" '" '" "'*"''''* 000114 Rl,HTREG 3$ %7, TPCORE (4)+ (4) 4$ PC.CLRPAR LUP14 1/ PARV EC+2.@#PARVEC TESTIS GO TO ROUTINE TO EXERCISE THIS 4K WiTH THE CURRENT PATTERN UPDATE PATTERN LAST PATTERN? NO, lOOP YES, CLEAR ALL PARITY REGISTERS UPDATE AND CHECK NEXT 4K ;RE5TORE TRAP CATCHER ; GO TO NEXT TEST ;ROUTINE TO WRITE AND CHECK EACH LOCATION IN 4K (STARTING AT ADDRESS ; IN ADRPT) WITH VALUE POINTED TO BY R4 ; SETUP R5 TO ADDRESS MEMORY TPCORE: MOV ADRPT, R5 ;lOCATION BEING CHECKED (4), (5) ;vJRITE PATTERN INTO MEMORY 1$: MOV : READ TEST LOCATION (5), WAS MOV (4) ,~IAS ;DATA OK? CMP ,+4 ; YES- BRAt\lCH BEQ ; DATA INCORRECT IN LOCAT ION WH05E ERROR ; ADDRESS IS IN R5, R4 POINTS TO THE ;DATA WRITTEN. ;UPDATE ADDRESS POINTER (5)+ TST R5,HIADR ; THIS 4K DONE? CMP BLn 1$ ;NO, BRANCH TO TEST NEXT LOCATION ; YES, DID ANY PAR ITY ERRORS OCCUR CLH TREG ;WITHOUT TRAPPING? MOV #Mf.RO,R1 H1 ,( 1 ) 2$: BIT BNE .+10 @(Rl ) TST ; YES- BRANCH 3$ BM! ADD #10, Rl Rl,HTREG CMP BLO 2$ RTS ;NO, RETURN %7 @RI,TREG ;STORE ADDRESS OF REGISTER GETTING ERROR 3$: MOV ;PARITY ERROR SET (WITH AE SET) AND ERRORS ;NO TRAP OCCURRED, TREG CONTAINS ;AODRESS OF PARITY REGISTER ,IHICH ;HA5 ERROR BIT SET, ; SCAN FOR PARITY ERRORS AND PRINT JSR %7. PSCAN ; lB BIT ADDRESSES OF THOSE FOUND. ;AFTER REPORTING EACH ERROR CLEAR IT RTS %7 ;PARITY TRAP SERVICE (NO TRAPS TO TRP14 : CLR TREG IIMPRO, R1 MOV HI, (Rl ) 1$: BIT BNE .+10 @(Rl) TST 2$ BMI #10, R1 ADD CMP R1,HTREG 114 SHOULD OCCUR IN THIS 5UBTEST) ; FIND PARITY REGISTER INDICATING PARITY ERROR ; BRANCH I F PARITy ERROR SET CCMFAFO, MEMORY PARITY TEST 13-uAN-7S 12:13 CCMFAF, Pl1 1754 1755 1756 1757 1758 1759 1760 1761 1762 1763 1764 1765 1766 1767 176B 1769 1770 1771 1772 1773 1774 1775 1776 1777 1778 1779 1780 1781 1782 1783 1784 17B5 17B6 1787 1788 1789 1790 '791 1792 1793 1794 1795 1796 1797 '79B 1799 '800 1801 '802 1803 1804 1805 1806 1807 lB08 1809 0115770 005772 005774 103765 104002 000405 005776 006002 011167 104004 172764 006004 004767 006504 006010 006012 022626 000207 PAGE 33 3$: SEQ 0033 1$ BLO ERROR BR 3$ MOV @ORI ,TREG PARITY TRAP TO 114 OCCURRED DURING TEST 14 SUT NO REGISTERS HAVE PARITY ERROR SET STORE ADDRESS OF REGISTER GETTING ERROR PARITY TRAP TO 114 OCCURRED DUE TO PARITY ERROR WHILE EXERCISING MEMORY Rl POINTS TO THE ADDRESS OF THE PARITY REGISTER HAVING PARITY ERROR BI T SET SCAN FOR BAD PARITY AND TYPE 18 BIT ADDRESSES OF LOCATIONS FOUND BAD RESTORE STACK POINTER RETURN (FROM JSR TO TPCORE) TO CHECK NEXT PATTERN ER~ORS uSR %7, PSCAN CMP RTS (SP)+, (SP)+ %7 ; * ... "' .. '" "' .. '" '" "' . . ** .... ** •• '" "' ....... '" "' ........ "' ...... '" >\I""~'''''''''' '" *'" *"',.. '" "',.. '" '" '" '" "' ... ** *. '" "'.*.*. 06< ;CHECK PARITY MEMORY WITH SERIES OF PATTERNS ABOVE 28K ; ENABLE PARITy ERROR TRAPPING ; .11< ................................ "' ........... "' ...... * ... "' ........ '" .... ** ... I/< *"' ... "' ................ "' ...... "' ... ,., .............. "' ...... 006014 006016 006024 006030 006032 006036 006042 006046 006052 006060 006064 006072 006100 006106 006114 006116 00e124 0013130 006132 006136 006,40 006144 006152 006160 006'62 006166 006174 006200 006202 006206 006210 104001 012777 005767 000015 172520 000167 004767 004767 004767 000424 005750 005644 006010 012777 005067 016767 012737 012767 036767 00'022 062777 006367 103366 005767 001051 005267 016767 012767 000752 012704 012767 001600 172470 173000 006402 000200 172406 173002 000114 172412 172760 000200 173126 012705 005025 020527 020000 040000 103774 012701 000566 173172 172370 172416 172410 172722 000001 001036 020000 172722 172340 172322 TESTI5: SCOPE MOV TST 8EQ JMP JSR uSR uSR MOV CLR MOV MOV MOV LOOPls: 8IT 8NE LaPIS: ADD ASL BCC TST 8NE INC MOV MOV SR MOV TST15: MOV 2$: 006214 006220 006222 032711 001003 012771 000001 006230 006234 006240 006242 006246 006250 006252 000010 000766 006260 006262 006266 006274 062701 020127 '03765 004767 005724 005714 00 '1373 004767 000716 005037 012737 000472 006276 006300 000240 012705 006304 006306 006312 006316 006320 011415 011567 021467 001401 104002 006322 006324 006330 006332 005725 020527 103765 005067 006336 006342 006346 006350 006354 006356 006362 006366 006370 006372 006376 0'2701 03271 I 00 I 003 005771 100406 062701 020127 103765 000207 011167 104004 006400 000207 006402 006406 006412 006416 005067 012701 032711 001003 006254 173056 001402 CCMFAFO, MEMORY PARITY TEST CCMFAF,Pl1 13-JAN-7812:13 1810 leI I 1812 1813 1814 1815 1816 1817 1818 1819 1820 1821 1822 1823 1824 '825 1826 1827 1828 1829 1830 IS31 1832 1833 1834 1835 1836 1837 1838 1839 1840 1841 1842 1843 1844 1845 1846 1S47 1848 lB49 1850 1851 1852 1853 1854 1855 1856 1857 1858 1859 1860 1861 1862 1863 1864 1865 2$: 12:27 13-uAN-7S MACY11 30A( 1052) 000001 MACY11 30A(1052) 172224 172220 040000 172430 000566 000001 000000 000010 000766 172370 '72360 000566 000001 HTRP15,@NPARVEC nOO,BIT,PT eITPT t PMEMX TST15 H200,I!'KPARI BITPT LOOP15 LOWFLG DONE 15 LDWFLG PMEMH, PMEMX Hl,BITPT LOOP15 HPARPAT ,R4 H20000, ADRPT #20000,R5 (5)+ R5,#40000 2$ NMPRO, R1 13-uAN-7B 12:27 .. ; LOAD THE TEST NUMBER INTO THE DISPLAY ;KT11 PRESENT? ; YES- BRANCH ;NO, SKIP TEST ;CLEAR ALL PARITY REGISTERS ; MAP KERNEL 0 TO BANK 0, RW ;MAP KERNEL 7 TO THE EXTERNAL BANK ; SET KERNEL I RW AND TURN ON KT11 ;MAP KERNEL PAGE 1 TO BEGINNING OF 2B-32K ;CLEAR FLAG TO INDICATE CHECKING LO\;ER 64K " ; SETUP PA"ITY TRAP RETURN ; INITIALIZE 8IT POINTER ;DOES THIS 4K HAVE PARITY? ;YES. BRANCH TO TEST IT ;NO- MAP TO NEXT 4K ;UPOATE BIT POINTER ; BRANCH I F NOT DONE WITH 64K ; DONE l~ ITH 128K? ;YES, BRANCH ;NO, SET FLAG INDICATING UPPER 64K ;SETUP PARITY MAP WORD ; SETUP 8IT POINTER FOR UPPER 64K ;CONTINUE : INITIALIZE PATTERN POINTER ; INITIALIZE VIRTUAL ADDRESS OF MEMORY ; 8EING TESTED ; INITIALLY CLEAR CORE BLOCK UNOE. TEST ; INITIALIZE TO SET ACTION ENABLE IN ALL ; PARITY REGISTERS PAGE 34 SEQ 0034 000000 00S532 020000 N1600,@KPARI LOWFLG PMEML, PMEMX 8IT BNE MOV #I,(oRI ,+10 NAE ,I!'( RI) ADD eMP 8LO 4$: uSR TST TST BNE uSR 8R OONEls: CLR MOV 8R HI 0, Rl Rl ,NTREG 3$ %7, TPCORX (4)+ 3$: 000030 17'7572 000116 MOV CLR CMP 8LO MOV NI5,(oOISPLAY NOKT ,+6 TEST16 PC ,CLRPAR %7,NRALL %7,MAP' 000114 (4) 4$ PC ,CLRPAR LOP15 i!'HSRO #PARVEC+2,@#PARVEC TESTl6 ;SET ACTION ENABLE IF THIS REGISTER ; I S PRESENT ;EXERCISE THIS 4K ;UPDATE PATTERN ; LAST PATTERN? ;NO, lOOP ;YES, CLEAR All PARITY REGISTERS ; UPDATE AND CHECK NEXT 4K ;TURN OFF KTI 1 ~JHEN DONE ; ,2STORE TRAPCATCHER : GO TO N,EXT TEST ;PARITY MEMORY TEST ROUTINE USING KTll AND TESTING MEMORY ABOVE 28K ;WRITES AND CHECKS EACH LOCATION IN 4K USING KERNEL PAGE I MAPPED TO CURRENT BANK TPCORX: NOP MOV #20000, Rs ; SETUP R5 TO POINT TO THE LOCAlION ;UNDER TEST (VIRTUAL ADDRESS) 1$: (4), (5) ;WRITE PATTERN MOV MOV (5) ,WAS ;REAO TEST lOCATION CMP (4),WAS ;OATA OK? ,+4 8EQ ; YES- BRANCH ERROR ; NO- DATA INCORRECT IN LOCA T! ON WHOSE ; V 1 RTUA L ADDRESS IS IN Rl (GOES THRU ;KERNEl PAGE I>' R4 POINTS TO ;THE VALUE WRITTEN. (5)+ TST ;UPDATE ADDRESS POINTER CMP RS, #40000 ;THIS 4K DONE? 810 1$ ;NO, 8RANCH TO TEST NEXT LOCATION TREG ClR ;YES, CHECK TO SEE IF ANY PARITY ; ERRORS OCCURRED WITHOUT TRAPPING MOV NMPRO,Rl Nl ,( I) 2$: BIT ; IS THIS PARITY REGISTER PRESENT? SNE .+10 ;NO, GET NEXT ONE @(Rl) TST ; YES- DID ERROR SET? 3$ 8MI ; YES- BRANCH ;NO- GET NEXT REGISTER ADO Rl CMP Rl ,NTREG 8LO 2$ RTS ;NO ERRORS- EXIT %7 3$: MOV Ii'Rl • TREG ; STORE ADDRESS OF REGISTER GETTING ERROR ERRORS ; PAR I TY ERROR SET (AE A LREADY SET) ; AND NO TRAP OR TIMEOUT OCCURRED : Rl POINTS TO THE ADDRESS OF THE ; PARITY REGISTER RTS %7 .'0, iPARITV TRAP SERVICE (NO TRAPS TO 114 SHOULD OCCUR IN TlHS SUBTEST) TRPIS: CLR TREG MOV #MPRO,Rl ;LOCATE PARITY REGISTER INDICATING ERROR #1, (Rl) 1$: BIT .+10 BNE CCMFAFO, MEMORY PARITY TEST 13-JAN-78 12:13 CCMFAF. P11 "f, .j / 1866 1 867 1868 1 869 1870 1871 1872 1873 1874 1 B75 1876 1877 1878 1879 1880 1881 1882 1883 1884 1885 lB86 1887 1888 1889 1 890 1891 1892 1893 1894 1895 1896 1897 1898 1899 1900 1901 1902 1903 1904 1905 1906 1907 1908 1909 1910 1911 1912 1913 1914 1915 1916 1917 1918 1919 , 920 1921 '938 1939 1940 1941 1942 1943 1944 1945 1946 1947 1948 1949 1950 1951 1952 1953 1954 1955 1956 1957 1958 1959 1960 1961 1962 1963 1964 1965 1966 1967 1968 1969 1970 1971 1972 1973 1974 1975 1976 1977 13-JAN-78 30A( 1052) 12:27 "(Rl ) 000010 000766 000405 011167 104004 172316 BR MOV ERRORS 3$ II>Rl ,TREG 006452 004767 006036 JSR %7, PSCAN 006456 006460 022626 000207 CMP RTS (SP)+, (SP)+ %7 005771 1 0 0407 062701 020127 103765 104002 006442 006444 006450 PAGE 35 SEQ 0035 TST 8MI ADD CMP 8LO ERROR 006420 005424 006426 006432 006436 006440 000000 2$: 3$: ; BRANCH I F PARITY ERROR IS SET 2$ "O,R' Rl ,NTREG 1$ ;TRAP TO 114 OCCURRED DURING TEST 15 BUT ;NO PARITY REGISTERS HAVE PARITY ERROR SET ;STORE ADDRESS OF REGISTER GETTING ERROR :PARITY TRAP TO 114 OCCURRED DUE TO : PARITY ERROR WHI LE EXERCISING MEMORY : "TREG" CONTAINS ADDRESS OF PARI' Y REGISTER :HAVING PARITY ERROR BIT SET : SCAN MEMORY FOR BAD PAR ITY AND PR I NT 18 : BI T ADDRESSES OF LOCATIONS FOUND : CLEAR BAD PARITY IN EACH AFTER :REPORTING IT : RESTORE STACK POINTER : RETURN (FROM JSR TO TPCDRX) TO :TEST NEXf PATTERN *'" '" '" '" "'.'" >I< "'* *** "'''' ****** *'" *. *. *** * ****** '" "' •• *"'** * *** ****** ** '" .*** ••••• **'" FORCE WRONG PARITY IN EACH BYTE OF PARITY MEMORY FROM 4K TO 2BK WR IT E WRONG PAR ITY AND READ IT BACK WI TH ACTION ENABLE SET, MAKING SURE THAT A TRAP OCCURS. THEN WRITE GOOD PARITY AND MAKE SURE THAT NO TRAP ·OCCURS WHEN IT IS READ. MAKE SURE THAT THE ERROR ADDRESS BITS (PARITY REGISTER !;ITS 5-11) ARE CORRECT. 006462 006464 006472 006500 006506 006510 006516 006524 006526 006534 006542 006544 006552 006554 006556 006562 006570 006574 006602 006604 005606 006614 006622 006626 006632 006634 1 04001 012777 012737 032767 C01007 012767 012767 000403 ** "'* '" '" "'* '" '" >I< ***'" * *'" ** *'" '" ** '" *'" *** ***"""'.,,,,, '" *'" **'" '" '" * '" ***'" *** * **** ** *"'** "'''' "''''* 000016 007076 000002 172410 000114 172012 000004 040000 172002 171772 036767 020000 171760 171762 172326 001021 032767 000002 171746 012767 C0100l 000402 000167 062767 006367 022767 003354 000421 016767 062767 004767 016705 005025 020567 001546 020000 171724 000200 171704 020000 005164 171664 006640 006642 006646 006650 006654 006662 103774 004767 000736 004767 012737 000167 171716 171714 171706 005136 000116 000472 016705 005067 012767 012715 012701 032711 171624 171660 125253 125253 000566 000001 001003 012771 000005 006730 006734 006740 006742 006746 062701 020127 103765 005767 100425 000010 000766 006750 112715 012701 032711 001003 000253 000566 000001 042771 000004 000010 000766 020127 103765 005767 100407 007014 142715 007020 007022 007030 007032 000407 " 2765 000751 142765 007040 012701 000566 007044 007050 007052 007060 007064 007070 007072 032711 001003 042771 062701 020127 103765 104002 000001 000114 171630 000000 000000 171544 000317 000252 000001 000377 000001 000005 000010 000766 #16,@DISPLAY #TRP16,@#PARVEC #2,BITPT LUP16 #4,BITPT #40000, ADRPT .+10 #20000, ADRPT 8 I TPT ,PMEML 3$ #2,81 TPT .+4 .+6 OUT #20000, ADRPT BITPT 11200, BITPT 1$ DONE16 ADRPT, HIADR #20000,HIADR %7,CLRPAR ADRPT, R5 (5)+ R5,HIADR 13-JAN-78 12:27 : LOAD THE TEST NUM8ER INTO THE DISPLAY : SET uP TRAP RETURN : TEST BANK INDICATOR FOR 8ANK 1 : INIT POINTER TO BANK 2 : DOES THIS 4K HAVE PARITY? : YES, 8RANCH TO TEST IT ; TEST FOR BANK 1 INDICATOR IF SET GO OUT :NO. UPDATE MEMORY ADDRESS BY 4K :UPDATE BIT POINTER ; TH I S 28K DONE? :NO, CHECK NEXT 4K : YES, EXIT : SET UPPER LIMIT THIS 4K : CLEAR ALL PARITY REGISTERS ;CLEAR 8A:·.K UNDER TEST PAGE 36 SEQ 0036 171610 006754 006760 006764 006766 006774 007000 007004 007006 007012 EST 16: SCOPE MoV MOV BIT 8NE MOV MOV BR LUP16 : MOV 1$: SIT BNE 2$: BIT BNE 8R JMP ADD ASL CMP 8GT BR MOV 3$: ADO JSR MOV 5$: CLR CMP MACVll 30A(1052) 000020 006656 006672 006676 006704 006710 006714 005720 006722 062701 171726 171670 CCMFAFO. MEMORY PARITY TEST CCMFAF.Pl1 13-JAN-7812:13 1922 1923 1924 , 925 1926 1927 1928 1929 1930 1931 1932 1933 1934 1935 1936 1937 MACY,' 000000 8LO 6$: JSR BR DoNE16: JSR MOV JM" 5$ %7,WWP16 2$ %7, CLRPAR # PARVEC+2,@#PARVEC TEST17 ;GO WRITE WRONG PARITY IN EACH 8YTE : UPDATE AND CHECK NEXT 4K ;CLEAR ALL PARITY REGISTERS IF DONE :RESToRE TRAP CATCHER : GO TO NEXT TE5T :WRITE WRONG PARITY TEST ROUTINE - TESTS EACH BYTE IN 4K :USING SAME DATA VALLE, WRITES AND CHECKS PARITY IN WRONG STATE :ANO THEN IN CORRECT STATE TO PROVE THAT PARITY 8ITS TOGGLE WWP16: MOV ADRPT ,R5 :SET TEST ADDRESS POINTER CLR ODDFLG : INDICATE TESTING LOW BYTE MOV #125253,5HDBE :STORE DATA FOR USE BY ERROR TYPFoUT ROUTiNE WWP16A: MOV #125253,II>R5 :INITIALIZE TEST LOCATION MOV #MPRO,R1 :SETUP TO LOAD PARITY "EGISTERS 1$: 81T #1,(1) BNE .+10 MOV #WWP+AE,@{R1) :SET WRITE WRONG PARITY AND ACTION ; ENABLE I F THIS PARITY REGISTER :15 PRESENT ADD 1110, Rl CMP Rl,lITREG 1$ 8LO ODDFLG TST :WRITING HIGH BYTE7 2$ 8MI : YES, 8RANCH MoVB #253,@R5 :NO. WRITE WRONG PARITY IN LOW 8YTE 5$: MOV IIMPRO. Rl :THIS CODE CLEARS WWP BIT IN ALL # 1, (1 ) BIT : PARITY REGISTERS .+10 BNE #WWP,@{Rl) 81C ADD #10, Rl CMP Rl,#TREG 8LO 5$+4 TST ODDFLG ;TESTING HIGH OR LOW BYTE? 6$ 8MI ;8RANCH, IF HIGH BYTE BICB :DETECT WRONG PARITY WITH DATIP#317 ,@R5. :SHOULD TRAP TO TRP16 BEFORE DOING THE oATOB BR 3$ 2$: MOv8 #252,1(R5) :WRITE WRONG PARITY IN HIGH BYTE 5$ BR 6$: #377,l(R5) ;DETECT WRONG PARITY WITH DATIPBIC8 :SHOULD TRAP TO TRP16 8EFORE DOING THE DAToB 3$: MOV #MPRO,Rl :NO TRAP oCCURREo- SETUP TO CLEAR : AE AND WWP 4$: #l,@Rl BIT BNE .+10 BIC #WWP+AE,"{Rl ) :CLEAR AE AND WWP IN ALL PARITY REGISTERS ADD #10, Rl CMP R1 ,#TREG BLo 4$ ERROR ERROR, NO TRAP AFTER WRITING ANn READING WRONG PARITY IN LaCATIO~ WH05E ADDRESS IS IN R5 (AE AND WWP WERE SET IN ALL PARITY REGISTERS) TESTING LOW BYTE IF ODDFLG IS POSITIVE TESTING HIGH BYTE IF ODDFLG IS NEGATIVE CCMFAFO, MEMORY PARITY TEST CCMFAF. Pll 13-~AN-78 12: 13 1978 1979 1980 1981 1982 1983 1984 1985 1986 1987 1988 1989 1990 1991 1992 1993 1994 1995 1996 1997 1998 1999 2000 2001 2002 2003 2004 2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017 2018 2019 2020 2021 2022 2023 2024 2025 2026 2027 2028 2029 2030 2031 2032 2033 30A( 1052) 13-~AN-7B 12:27 PAGE 37 SEQ 0037 ; NOTE THAT AE AND WWP WERE CLEARED ; BEFORE TYPING THE ERROR PRINTOUT 007074 000517 BR 007076 007102 007106 007110 007116 007122 007126 007130 007134 007140 007144 007150 007152 007156 007160 00716" 007166 012701 032711 001003 042771 062701 020127 103765 012701 012703 005067 032711 001017 005771 100014 005767 001401 104002 007170 036761 007176 007200 001001 104002 007202 007204 007210 007214 007216 007222 010304 011167 062701 005723 020127 103750 007224 007230 007234 007236 011567 022715 001401 104003 171306 125253 007240 007244 007246 005767 001002 104002 171522 000566 000001 000005 000010 000766 000000 000566 000770 171622 000001 000000 171602 171324 000002 171556 000010 000766 CN16 ;WHEN WRONG PARITY DATA IS READ BACK SHOULD ENTER HERE VIA TRAP TO 114 TRPlr-.: MOV HMPRO, Rl ;PARITY TRAP OCCURRED- FIRST CLEAR TRPI6A: 8IT 111,t§lRl ; WWP AND AE IN All REGISTERS 8NE .+10 SIC NAE+WWP,@I(Rl) ADD 110,Rl CMP Rl ,NTREG BlD TRP16A MOV HMPRO,Rl ;FIND THE REGISTER THAT SENSED THE F.RROR MDV HINDeo t R3 ClR TREG 1$: BIT Hl,QIIRI ; DOES TH I 5 CONTRO l EXIST? BNE 2$ ;NO, BRANCH @I(RI ) TST ;YES- IS ERROR SET? 2$ 8Pl ;NO, BRANCH TST TREG ; YES- WAS I T SET IN ANY OTHER REGISTER ALSO? BEQ .+4 ; NO- BRANCH ERROR ; ERROR SET IN MORE THAN ONE PARITY REGISTER ;AFTER WRITING WRONG PARITY IN lOCATION ;WHOSE ADDRESS IS IN R5 BIT BITPT ,2(Rl) ;OOES MAP INDICATE THIS PARITY REGISTER ; CONTROLS THIS MEMORY? BNE .+4 ;YES, 8RANCH ERROR ; PAR I TV REGI STER RESPONDED TO MEMORY ;NOT INCLUDED IN ITS MAP ; PARITY REGISTER' 5 ADDRESS IS POINTED ; TO BY Rl. ADDRESS OF lOCATION CAUSING ; PARITY ERROR IS IN R5 MOV R3,R4 MOV QIIRI ,TREG ; STORE REGISTER ADDRESS 2$: ADO Hl0,Rl TST (R3)+ CMP Rl,HTREG BlO 1$ ; 8RANCH UNTI l All THE PARITY ; REGISTERS HAVE BEEN CHECKED MDV (5)'WAS ;SAVE DATA FROM lOCATION UNDER TEST CMP N 125253 ,Il'R5 ;010 8ICB CHANGE DATA? BEQ .+4 ;NO. CONTINUE ERRORP ;DATA WAS MODIFIED BY THE BICB WHICH ;GOT A PARITY ERROR TRAP- SINCE PARITY ERROR ; TRAP OCCURRED, CONTENTS SHOULD NOT HAVE ; BEEN MODIFIED. R5 CONTAINS ADDRESS ; OF TES T lOCATION. "TREG" CONTAINS ;ADDRESS OF PARITY REGISTER SENSING ; ERROR CCMFAFO, MEMORY PARITY TEST CCMFAF. Pll 13-JAN-78 12:13 2034 2035 2036 2037 2038 2039 2040 2041 2042 2043 2044 2045 2046 2047 2048 2049 2050 2051 2052 2053 2054 2055 2056 2057 2058 2059 2060 2061 2062 2063 2064 2065 2066 2067 2068 2069 2070 2071 2072 2073 2074 2075 2076 2077 2078 2079 2080 2081 2082 2083 2084 2085 2086 2087 2088 2089 MACVl I 007250 007252 007256 007260 007264 007270 007272 007276 007300 007302 007304 007306 007310 000420 022714 001015 017701 042701 010502 042702 000302 006302 006302 020102 001401 104003 007312 007314 007316 007322 007324 007330 007332 022626 011515 005077 005715 005777 100001 104002 TST BNE ERROR MACY11 30A(ICS2) TREG 3$ 13-JAN-7B 12:27 ;WAS PARITY ERROR SET IN ANY REGISTERS? ; YES- BRANCH : PARITY TRAP OCCURRED ON READING ;WRONG PARITY (WITH AE SET) BUT NO ;REGISTERS HAD PARITY ERROR BIT SET. ; R5 CONTA INS THE ADDRE$S OF THE ; TEST lOCATION. PAGE 38 SEQ 0038 3$: 000001 171502 170037 003777 BR CMP BNE MOV BIC MOV BIC SWAB ASl ASl CMP BEQ ERRORP 4$ HI, (R4) 4$ It'TREG,Rl 1/170037,R1 R5,R2 113777, R2 R2 R2 R2 Rl,R2 .+4 CMP MOV ClR TST TST BPl ERROR (SP)+, (SP)+ (5), (5) @lTREG Il'R5 @lTREG .+4 GET PARITY REGISTER CONTENTS MASK OFF All BUT ERROR ADDRESS BITS GET ADDRESS OF lOCATION UNDER TEST POSITION BITS IN R2 ; PARI TY ERROR ADDRESS BITS CORRECT? : ERROR ADDRESS BITS (~ARITY REGISTER ;BITS 11-5) ARE INCORRECT. R5 CONTAINS ;THE ADDRESS OF THE TEST lOCATION. ; "TREG" CONTAINS THE ADDRESS OF THE 4$: CNTI6: 171444 171436 ; PARITY REGISTER DETECTING THE ERROR ;RESTORE STACK POINTER ;RESTORE TEST lOCATION TO FIX BAD PARITY ;ClEAR ER"OR BIT IN PARITY REGISTER ; READ lOCATION TO SEE I F PARITY IS GOOD ; IS PARITY ERROR SET? ;NO- BRANCH ;WRiTING lOCATION WITH WRITE WRONG PARITY iCLEAR DIDN'T CLEAR BAD PARITY 007334 007340 007342 007344 007350 007352 007354 005167 100401 005725 020567 103401 000207 000167 CNI6; 171216 171160 1$: 177324 COM BMI TST CMP BlO RTS JMP ODDFlG .+4 (5)+ RS,HIADR 1$ %7 ;R5 CONTAINS ADDRESS OF THE TEST ;lOCATION. "TREG" CONTAINS THE ADDRESS ;OF THE PARITY REGISTER DETECTING ; THE ERROR ;TOGGlE BYTE INDICATOR ; 8RANCH I F READY TO TEST HIGH 8YTE ;UPDATE ADDRESS POINTER ; THIS 4K DONE? ;NO, TEST NEXT lOCATION ; RETURN TO TEST NEXT B;,NK WWP16A '" "' ...... '" '" ",,,, '" "' .. '" '" '" '" '" '" "',., "' ....... '" '" '" '" '" '" '" "' . . '" "'.* '" '" '" '" '" '" '" '" * '" '" '" '" '" "' .. '" '" '" '" '" "' ... "' ... '" '" '" '" "'* ... '" '" FORCE WRONG PARITY IN EACH BYTE OF PARITY MEMORY ABOVE 28K WRITE WRONG PARITY AND READ IT WITH ACTION ENABLE SET, MAKING SURE THAT A TRAP OCCURS. THEN WRITE AND READ THE SAME lOCATiON WITH GOOD PARITY (USING SAME DATA) TO SHOW THAT THE PARITY BIT TOGGLES. MAKE SURE THAT THE ERROR ADDRESS BITS (PARITY REGISTER BITS 5-11) ARE CORRECT. _*'" 007360 007362 ~07366 007374 007402 007406 007410 007414 007420 007426 104001 004767 012777 012777 005767 001402 000167 004767 012737 012767 005032 000017 000017 171142 000636 004372 007762 000200 171506 171500 "'II< •••••••••••••• '" *** ........ * .......... "''''''' •• '" ••••• ESTI7: SCOPE JSR MOV MOV TST BEQ ~MP ~SR 000114 171064 MOV MOV *.*.*. ** ............ * •• PC, RSTLDR "7,@DISPlAY ',7,II>DISPlAY NOKT .+6 XFRI PC,CLRPAR HRP17,@I'PARVEC '200,BITPT lOAD THE TEST NUMBER INTO THE DISPLAY KT 11 PRESENT? YES, BRANCH NO, SKIP TO NEXT TEST CLEAR All PARITY REGISTERS SETUP FOC_ PARITY TRAP INITIALIZE 4K BIT POINTER q CCMFAFO. MEMORY PARITY TEST 13-JAN-78 1,2:13 MACY11 13-JAN-78 30A( 1 952) 12:27 PAGE 39 CCMFAF. P11 2090 2091 2092 2093 2094 2095 2096 2097 2098 2099 2100 2101 2102 2103 2104 2105 2106 2107 2108 2109 2110 2111 2112 2113 2114 2115 2116 2117 2118 2119 2120 2121 2122 2123 2124 2125 2126 2127 2128 2129 2130 2131 ?132 2133 2134 2135 2136 2137 2138 2139 2140 2141 2142 2143 2144 2145 007434 007440 004767 004767 004252 004416 007444 007452 007456 007464 007472 012777 005067 016767 012767 036767 001025 062777 006367 103366 005767 001025 005267 016767 012767 012767 000747 012705 005025 020527 103774 004767 000742 005037 012737 000167 001600 007500 007502 007510 007514 007516 007522 007524 007530 007536 007544 007552 007554 007560 007562 007566 007570 007574 007576 007602 007510 171076 171406 000002 171022 000200 171004 177572 000116 000436 007656 007662 007666 007670 007674 007676 007702 062701 020127 103765 OC5767 100405 112715 142715 000010 000766 007706 007710 007716 000406 112765 142765 007724 007730 007734 007736 012701 0,,2711 001003 042771 000512 007762 007766 007772 007774 010002 010006 010012 010014 010020 010024 010030 010034 010036 010042 010044 010050 010052 012701 032711 001003 042771 062701 020127 103765 012701 012703 005067 032711 001017 005771 100014 005767 001401 104002 010054 036761 010062 010064 010060 001001 104002 010066 010072 010074 010100 010102 010106 011167 010304 062701 005723 020127 103750 010110 010114 010120 010122 011567 022715 001401 104002 171374 171542 1 $: 2$ : 171336 170754 000306 000005 000114 170702 000000 170662 000253 000377 000252 000377 000001 000001 000566 000001 000005 000000 MACY11 .#1600,@KPAR1 MOV LOWFLG PMEML, PMEMX #2.!NDX17 BITPT I PMEMX 3$ #200,@KPARl 81 TPT 1$ LOWFLG DONE 17 LOWF LG PMEMH , PMEMX #l.BITPT #4.INDX17 1$ 1f20000.R5 (5)+ R5,1I40000 5$ %7,W'I>JP17 2$ @#SRO UPARVEC+2,@ltPARVEC XFRl 000000 000000 170716 30A(1052) 13-JAN-78 12:27 ADD CMP BLO ERROR #10, R 1 Rl.#TREG 4$ ; CLEAR BANK UNDER TEST ;GO WRITE WRONG PARITY AND CHECK IT ; UPDATE AND CHECK NEXT 4K ;TURN OFF KTll WHEN DONE ;RESTORE TRAP CATCHER ;GO TO SETUP FOR NEXT TEST PAGE 40 8R CNT17 ;WHEN WRONG PARITY DATA IS READ BACK. TRP17: MOV #MPRO, Rl II 1 ,@IR1 TRP17A: BIT BNE • +1 0 BIC tlAEHoJloJP.@(Rl) ADD ,# 1 O. R1 CMP R1,HTREG BLO TRP17A MOV #r/lPRO. MOV # I NDCO, R3 CLR TREG 1$: BI T #1,@Rl BNE 2$ @l(Rl ) TST BPL 2$ TST TREG SEQ .+4 ERROR 000002 BIT MOV MOV 170674 170422 125253 ;5ETUP OFFSET TO CHECK UPPER 64K OF MAPS NO TRAP AFTER WRITING AND READING WRONG PARITY WITH AE SET- VIRTUAL ADDRESS OF LOCATION IS IN R5 (MAPPED THRU KERNEL PAGE 1) WROTE LOW BYTE IF ODDFLG IS POSITIVE WROTE HIGH 9YTE I F IT IS NEGATIVE NOTE THAT WwP AND AE WERE CLEARED BEFORE ERROR PRINTOUT BITPT ,2(R1) INDXI7=.-2 BNE • +4 ERROR 000766 ; SETUP OFFSET TO CHECK LOWER 64K OF MAPS ; DOES THIS 4K HAVE PARITY7 ; YES. BRANCH TO TEST IT ;NO. MAP TO NEX r 4K ; UPDATE BIT POINTER ; GO CHECK TO SEE IF THI S 4K HAS OAR ITY ; END OF 128K? ; YES, EXI T ; NO. SET FLAG TO INDICATE SHIFT TO ;HIGH 64K AND CHANGE MAPS ;WRITE WRONG PARITY TEST ROUTINE TO TEST MEMORY ABOVE 28K WWP17: MOV 1t20000,R5 SET TEST ADDRESS POINTER OODF LG CLR CLEAR FLAG TO INDICATE TESTING LOW BYTE MOV II 125253, SHOBE STORE DATA FOR USE BY ERROR TYPEOUT ROUTINE WIJP17A: MOV II 1 25253,@RS INITIALILE LOCAT ION MOV HMPRO, Rl INITIALIZE REGISTER ADDRESS POINTER 1$: BI T #1. (1) DOE5 THIS CONTROL EXI5T? BNE .+10 NO. GET NEXT MOV IIWWP+AE.@(R1) YES- SET WRITE WRONG PARITY AND ACT ION ENABLE IIl0,R1 ADD CMP R1,IITREG ALL REGISTERS SETUP? 1$ tJO- LOOP BLO TST ODDFLG YES- TESTING HIGH BYTE? BMI 2$ YES, BRANCH #253.@R5 MOVa NO. '.>JRI TE ~ It ***** *****"'***'" **>!-***** "'*'" ***."*,,,* **". ~ " l *"',. ~ . . * 1<>'<***1<", ***"*""_****"''''*>!"II< ;IF FIRST 4K IS PARITY MEMORY. CHECK IT t It * '" "' .. >/< 010452 010456 010462 010470 010474 010500 010502 010504 010510 010512 010520 013746 004767 012777 004767 012i04 005005 005025 020527 103774 012737 177776 005674 000020 003316 TEST20: MOV Jsn 1?0412 021036 1$: 020000 012701 030720 020566 032711 000001 000114 MDV JSR MOV CLR CLR CMP BLO MOV MOV >I< >I< 11< @HPS,-(SPI PC,SCOPEC H20.@DISPLAY %7,CLRPAR HPARPAT+20000,R4 R5 (5)+ R5. #20000 1$ #TRP20+20000 ,@#PARVEC HMPRO+20000. R 1 ;THESE 2 LINES DO THE SAME AS A SCOPE WITHOUT ;USING AN EIVIT : LOAD THE TEST NUMBER INTO THE DISPLAY ;CLEAR ALL PARITY REGISTERS ;INlTIALIZE PATTERN POINTER ;1t~ITIALLY CLEAR BANK ; SE rup TRAP RETURN ; SETUP TO SET ACTION ENABLE IN ALL ; PAR1lY REGISTERS PRESENT 010524 2$: BIT CCMFAFO, MEMORY PARITY TEST CCMFAF. P11 , 3-J AN-78 '2:'3 23'4 23' 5 23'6 23'7 23, 8 2319 2320 2321 2322 2323 2324 2325 2326 2327 010530 0'0532 0'0540 010544 010550 00'003 01277' 06270' 020'27 '03765 010552 0' 0556 0,0560 010562 010564 010570 010576 004767 005724 005714 001373 004767 012737 000526 00000' 0000'0 020766 003222 000116 .. 2350 2351 2352 2353 2354 2355 2356 2357 2358 2359 2360 2361 2362 2363 2364 2365 2366 2367 2368 2369 2370 2371 2372 2373 2374 2375 2376 2377 237B 2379 2380 2381 23B2 2383 010600 010602 010604 010606 010610 010614 005005 011415 021415 001404 013746 004767 010620 010622 010626 010630 010634 005725 020527 001002 062705 020527 010640 010642 010646 010652 010656 010660 010664 010666 010672 010676 010700 010702 010706 103760 005067 012701 032711 001003 005771 100406 062701 020127 103765 000207 013746 004767 010712 010714 022626 000167 010720 010724 010730 010734 010736 010742 010744 010750 010754 010756 010762 005067 012701 032711 001003 005771 100412 062701 020127 103765 013746 004767 010766 010770 010774 010776 011002 011004 011010 000430 017102 005003 005071 005713 005771 100413 177776 002742 000114 000004 020000 170120 020566 000001 000000 000010 020766 177776 002650 177644 170042 020566 000001 000000 000010 020766 177776 002574 000000 000000 000000 30A('052) , 3-yAN-78 '2:27 PAGE 43 seQ 0043 BNE MDV ADD CMP BLD 000000 ySR TST TST BNE DDNE20: ySR MDV BR 3$: 000022 CCW,FAFO, MEMORY PARITY TEST CCMFAF.P11 13-JAN-7812:13 2328 2329 2330 2331 2332 2333 2334 2335 2336 2337 2338 2339 2340 2341 2342 2343 2344 2345 2346 2347 234B 2349 MACYl , 000114 MACYll 30A[ 1052) .+10 NAE,I'(R' ) 0 ,R' R' ,NTREG+20000 2$ N' %7,CKBKO (4)+ (4) 3$ PC, CLRPAR # PARVEC+2 ,I'NPARVEC TEST21 13-JAN-7B 12:27 ;SET ACTIDN ENABLE IF REGISTER IS PRESENT ; BRANCH UNTI L ALL REGISTER ADDRESSES ;HAVE BEEN CHECKED ;EXERCISE THIS 4K ;UPDATE PATTERN ; LAST PATTERN? ;ND, LDDP :CLEAR ALL PARITY REGISTERS ; RESTDRE TRAP CATCHER ; GD TO NEXT TEST PAGE 44 SEQ 0044 : PARITY MEMDRY TEST ROUTINE ;WRITES AND CHECKS EACH LDCATION IN SANK 0 [EXCEPT 114 AND 116) ;WITH VALUE POINTED TD BY R4 CKBKO: R5 ClR SET ADDRESS POINTER 1$: (4), [5) MDV WRITE PATTERN (4). [5) CMP DATA OK? BEQ .+12 YES- BRANCH @#PS,-(SP) MDV SETUP TD DD ERROR CALL VIA JSR JSR PC, ERR ERRDR_ DATA INCDRRECT IN LDCATION WHDSE ADDRESS IS IN R5. R4 PDINTS TO THE VALUE WRITTEN. (5)+ TST UPDATE ADDRESS PDINTER CMP R5,N114 DDN'T CHANGE CONTENTS OF 114 AND " 6 BNE .+6 #4,R5 ADD CMP R5, '20000 : HAS THE WHDLE BANK BEEN TESTED WITH j THIS PATTERN? BlO 1$ ;ND, BRANCH TO TEST NEXT LOCATIDN TREG CLR ;YES, 010 ANY PARITY ERROR BITS SET? MDV HMPRO+20000, Rl 2$: # 1, [1) BIT BNE .+10 @(Rl) TST 3$ BMI ; YES- BRANCH #10, Rl ADD CMP R 1 ,#TREG+20000 2$ BLu RTS %7 ; NO- RETURN 3$: @#FS,-(SP) MDV ; SETUP TO 00 ERRDR CALL VIA JSR JSR PC, ERR ; ERROR- PARITY ERROR BIT SET AND ND ; PARITY TRAP DCCURRED ;(AE WAS SET) - Rl PDINTS TO ADDRESS ;OF PARITY REGISTER CMP (SP)+, (SP)+ ;RESTDRE STACK PDINTER JMP DONE20 ;PARITY TRAP SERVICE (ND TRAPS TD 114 SHDULD DCCUR IN THIS SUBTEST) TRP20 : CLR TREG MOV #MPRO+20000, Rl ; FINO THE REGISTER RECDRDING A PARITY ERRDR BIT #1,(R1) '$: BNE .+10 @(R1) TST 2$ BMI ; BRANCH IF ERRDR IS SET ADD #10. Rl CMP R 1 ,#TREG+20000 1$ BlD @#PS,-(SP) MOV SETUP TD 00 ERRDR CALL VIA A JSR ySR PC, ERR ERROR- PARITY TRAP TO 114 DCCURRED DURING TEST 20 BUT NO REGISTERS HAVE PARITY 5$ BR ERROR SET 2$: MDV @(Rl ) ,R2 SAVE CONTENTS DF PARITY REGISTER R3 CLR INITIALIZE ADDRESS POINTER @(Rl ) 3$: CLR CLEAR PARITY REGISTER @R3 TST READ LDCATIDN @(Rl) TST PARITY E ··RDR SET? 8M! 4$ YES- BRANCH CCMFAFQ, MEMORY PARITY TEST CCMFAF.Pl1 13-JAN-7812:13 2384 2385 2386 2387 2388 2389 2390 2391 2392 2393 2394 2395 2396 011012 011'014 011020 011022 011026 011032 00S723 020327 103766 010271 013746 004767 011036 011040 011044 000404 013746 004767 011050 011052 022626 000207 MACY11 13-JAN~78 30A(1052) 12:27 PAGE 45 SE~ 0045 020000 000000 177776 002S24 177776 002512 4$ : TST CMP BLO MOV MOV J5r.! I R3)+ R3, #20000 3$ R2,@(R1) @#PS,-ISP) PC, ERR BR MOV JSR 5$ @#PS,-(SP) PC, ERR eMP RTS %7 :MOVE POINTER ;RESTORE PARITY REGISTER CONTENTS ;SETUP TO CALL ERROR VIA JSR ;PARITY ERROR OCCURRED WHILE TESTING ;BANK 0 BUT NO BAD PARITY WAS FOUND : DURING SCAN OF BANK O. R1 POINTS ; TO THE ADDRESS OF THE PARITY REGISTER ;OETECTING THE ERROR ;SETUP TO DO ERROR CALL VIA JSR ;PARITY ERROR \oJHILE EXERCISING MEMORY : BANK 0- Rl POINTS TO ADDRESS OF PARITY ;REGISTER DETECTING THE ERROR. R3 CONTAINS ; THE ADDRESS OF THE LOCATION HAVING ;BAD PARITY 2397 239B 2399 2400 2401 2402 S$ : ISP)+, (SP)+ ; RETURN TO CHECK USING THE NEXT PATTERN 2403 2404 240S 2406 2412 2413 2414 2415 2416 2417 2418 241 9 2420 2421 2422 ;NOTE THAT 011054 011060 011064 011072 011076 011,00 011102 0111 06 013746 004767 012777 004767 005005 00S02S 020527 103774 177776 00S272 000021 002714 2426 2427 2428 2429 011110 011112 011116 011124 011130 005005 005067 012767 012715 0, 2701 170010 167410 2430 2431 011134 2432 2433 011140 011142 :::!434 2435 2436 2437 2438 2439 011150 a 1115~ 01 t 160 011162 011166 011170 032711 001003 012771 062701 020127 103765 005767 100404 112715 000001 000004 000010 020766 011174 011176 011200 011206 011212 011216 011222 011226 011230 011236 011242 011246 011250 011254 011260 011264 011266 011272 011274 o t 1300 011302 011306 000000 167370 TEST21: MOV JSR MOV JSR CLR 1$: CLR CMP BLO "'* ** >1< ... ** "' .. "' ...... '" ** ... '" ** ** ... IS EXECUTED IN BANK 1 SURE THAT * ... "'* .. '" "'* "'* '" ~ @NPS,-(SP) PC. SCOPEC #21.@DISPLAY PC,CLRPAR RS (R5h R5, #20000 1$ . WRONG PAR! TY "'* '" * '" '" ** *'" '" ':SAME " "''';' "' .. AS '" "'" SCOPE ** '" '" '" *** "'"' '" '" '" '" '" '" **"'''' '" ** wiTHOUT DOING EMT ; LOAD THE TEST NUMBER INTO THE DISPLAY ;CLEAR ALL PARITY REGISTERS ;CLEAR PArdTY ERRORS IN BANK 0 ;WRITE WRONG PARITY TEST ROUTINE ;USING SAME DATA VAlt.:E. WRITES AND CHECKS PARITY IN WRONG STATE ;AND THEN IN CORRECT STATE TO PROVE THAT PARITY BITS TOGGLE WWP21: CLR R5 ;5ET TEST ADDRESS POINTER CLR ODDFLG ;ClEAR FLAG TO INDICATE TESTING lm'll BYTE MOV #125253.SHDBE ;STORE DATA FOR USE BY ERROR TYPEOUT ROUTINE WWP21A: MOV 11125253.@lR5 ;INITIALIZE LOCATION MOV IIMPRO+20000, R 1 ; SE TUP TO SET ~'R I T E WRONG PAR I TV ;IN ALL REGISTERS 1$: BIT # 1 , (1 ) BNE .+10 MOV HWI,oJP .@l(R1 ) ;5ET WRITE WRONG PARITY ADD /,I 1 O. Rl eMP R1 • f;rTREG+20000 BLo 1$ TST OooFLG ;TESTING HIGH BYTE? BMI 2$ ; YES. BRAnCH MOVB #2S3,@>R5 :NO. I'JRITE WRONG PARITY IN LOW BYTE MACY11 30A{ 1 OS2) 00O~05 000252 000001 020566 000770 000001 000001 000004 000010 020766 000000 4$: BLo MOV CLR LOOP21 : BIT BNE TST BPL TST BEQ MOV JSR 167466 177776 0022S0 032761 001004 013746 004767 000001 011332 011336 011342 011344 o 113S0 011167 062701 005723 020127 103743 167430 000010 011352 011356 011360 011364 005767 001005 013746 004767 167410 011370 011372 011376 000423 022713 001020 011400 011404 01'410 011412 011416 011420 011422 017701 042701 010502 042702 000302 006302 006302 000002 '77776 002230 S$: 020766 177776 002172 000001 167362 170037 003777 TST BR MOV8 TST8 MOV MoV BIT BNE BIC ADD CMP 000000 011312 2$: 3$: 020566 167506 000001 011320 011322 011326 13-JAN-7B 12: 27 PAGE 46 SEQ 0046 005715 112765 10S765 012701 012703 032711 001003 042771 062701 020127 103765 012701 005067 032711 001024 005771 100021 005767 001404 013746 004767 MAKE > 000253 CCMFAFO. MEMORY PARITY TEST ccr~lFAF. P11 13-JAN-78 12: 13 2440 2441 2442 2443 2444 2445 2446 2447 2449 2449 2450 2451 2452 2453 24S4 24SS 2456 2457 24S8 24S9 2460 2461 2462 2463 2464 2465 2466 2467 2469 2469 2470 2471 2472 2473 2474 247S 2476 2477 2478 2479 2480 2481 2482 2483 2484 2485 2486 2487 24B8 2489 2490 2491 2492 2493 2494 2495 LISTING). ; '" '" "' .. '" '" '" "'''' "' .. *.jc "' .. '" 020000 167440 125253 125253 020566 THIS SUBTEST '" '" (20000 ABOVE ADDRESSES IN EACH BYTE CAN BE DETECTED. ;AND THAT \tJHEN GOOD PARITY IS WRITTEN AND READ NO PARITY ERROR IS DETECTED. ;CHECK ERROR ADDRESS BITS (PARITY REGISTER BITS 5-11) ; IN . -IE 2423 2424 242S "'* '" '" "' ...... '" >4-'" II< '" '" '" '" *' "' .. "' .. '" '" *"'* '" >Ie .. '" '" ~ '" '" "' .. '" '" "' ... *' '" '" '" >1< ... : FORCE WRONG PARITY IN EACH LOCATION IN BANK 0 : >I< 2407 2408 2409 2410 2411 6$: IRS) 3$ #2S2, 1 (RS) 1( RS) IIMPRO+20000, R1 /lINDCO, R3 #1,@R1 • +1 0 #WWP,@(Rl) #10. Rt R1,IITREG+2DODO 4$ #MPRO+20000, R1 TREG #1,@R1 S$ @IR1 ) S$ TREG .+12 @#PS,-(SP) PC, ERR BIT #1,2(R1) BNE MoV JSR @#PS,-(SP) PC, ERR MOV ADD TST CMP 8LO @lRl ,TREG 1110. Rl IR3)+ Rl.IITREG+20000 LOOP21 TST BNE MOV JSR TREG 6$ @#PS,-ISP) PC, ERR BR CMe BNE 7$ #1, I R3) 7$ MOV 81C MOV 81C SWAB ASL ASL @TREG,Rl #170037, R1 RS, R2 #3777, R2 R2 R2 R2 .+12 ;DETECT WRONG PARITY WITH DATI ;WRITE WRONG PARITY IN HIGH BYTE ;DETECT WRONG PARITY WITH DATI ;SETUP TO CLEAR WWP IN ALL PARITY REGISTERS ; POINTER TO INDICATOR ;CLEAR Wl,oJP IN ALL PARITY REGISTERS ; CHECK TO SEE IF ANY REGISTER DETECTED ; THE PARITY ERROR CHECK PARITY REGISTER BRANCH IF PARITY ERROR IS NOT SET WAS PAR ITY ERROR SET IN ANY OTHER REGISTER? NO- BRANCH SETUP TO DO ERROR CALL VIA A JSR ERROR- PARITY ERROR SET IN MORE THAN ONE REGISTER AFTER \tJRITING WRONG PARITY IN LOCAl ION WHOSE ADDRESS IS IN RS DOES MAP INDICATE THAT THIS REGISTER CONTROLS THIS MEMORY? YES, BRANCH NO- SETuP TO DO ERROR CALL VIA A JSR ERROR- PARITY REGISTER RESPONDED TO MEMORY WHICH IS NOT IN ITS MAP. Rl POINTS TO PARITY REGISTER'S ADDRESS. R5 CONTAINS ADDRESS OF LOCAT ION BE ING TES T ED STORE REGISTER ADDRESS BRANCH UNT I L ALL REGISTERS HAVE 8EEN CHECKED WAS PAR I fy ERROR SET IN ANY REGISTER? YES- BRANCH NO- SETup TO DO ERROR CALL VIA A JSR ERROR- NO REGISTER HAS PARITY ERROR SET AFTER READING WRONG PARITY IN LOCATION WHOSE ADDRESS IS IN RS IS THIS A CORE PAR REG? NO. BRANCH (MaS PAR REG DOES NOT STORE ADDR 81 TS OF PAR ERROR) GET PARITY REGISTER CONTENTS MASK ALL BuT ERROR ADDRESS BITS GET ADDRESS OF LOCATION UNDER TEST POSIT ION BITS IN R2 CCMFAF'.), MEMORY PARITY TEST CCMFAF.P11 13-JAN-7812:13 2496 2497 2498 2499 011424 MACY11 30A( 1052) 011426 001404 013746 004767 12:27 PAGE 47 SEQ 0047 CMP 020102 011430 011434 13-0AN-78 R1 ,R2 7$ @#PS,-(SP) PC, ERR Oi:O MOV oSR 177776 002122 PARI TY ERROR ADDRESS BITS COR"ECT? BRANCH IF YE5 ND- SETUP TO DO ERROR CALL VIA A JSR ERRDR- ADORE55 BITS (PARITY REGISTER 8i T5 5-11) INCORRECT- ADDRE5S OF PARITY 2500 REGISTER IS CONTAINED 2501 2502 2503 2504 011440 011442 2505 011446 t 1450 01' 454 011456 7$ : 0'1515 2506 o 005077 005715 005777 2507 2508 2509 011462 013746 004767 MOV ClR T5T TST BPl MOV oSR 167320 167312 '00004 177776 002074 @TREG @R5 @TREG .+12 "#PS,-(SP) PC, ERR BRANCH IF NOT SET SETUP TO DO ERROR CALL VIA A JSR ERROR- WRITING LOCATION WITH WRITE WRONG PARITY CLEAR DIDN'T CLEAR BAD 2510 PARITY (ADDRESS OF lOCATION IS IN R5) "TREG" +20000 CONTAIN5 THE ADDRESS OF THE PARITY REGISTER 251' 2512 2513 2514 011466 005167 2515 2516 2517 011472 011474 011476 005725 251 B 011502 2519 011504 011510 011514 2520 2521 COM BMI TST CMP 810 JSR MOV J5R 167064 100401 020527 020000 103610 004767 013746 004767 002302 177776 004636 011520 01 t 524 011525 012700 017770 011532 0057.21 005300 001373 162706 162737 162737 162737 162737 1627.37 2522 2523 2524 2525 2526 2527 2528 2532 011534 011536 011540 011544 011552 2533 011560 2529 2530 2531 2534 011566 2535 all :174 011602 011610 011612 2536 2537 2538 005001 016111 020000 020000 020000 020000 020000 020000 O~2737 020000 177570 001403 162737 020000 000167 160000 013632 013634 013644 013646 013656 ODDFlG .+4 ( R5)+ R5, #20000 TOGGLE ByTE INDICATOR BRMKH I j- HIGH BYTE NOT YET TESTED UPDATE ADDRESS POINTER THIS 4K DONE? lOOP TIll All 4K HAS BEEN TESTED CLEAR All PARITY REGISTERS SETUP TO CAll SCOPE VIA JSR 5COPE WWP,,21 A PC I CLRPAR @#P5,-(SP) PC,5COPEC ;COPY SECOND 4K BANK BACK TO FIR5T 4K AND RETURN TO FIR5T 4K BANK XFR2: MOV # 17'770, RQ ; RO IS USED AS A COUNTER ClR Rl ; Rl POINTS TO THE CURRENT lOCATION 1 $: MOV 20000(Rl) ,@>Rl ;COPY BANK 1 TO 8ANK 0 TST (Rl)+ OEC RO BNE 1$ SUB #20000, SP ;RESTORE 5TACK POINTER SUB #20000,@lIlERRA1 SUB 1t20DOO,@l#ERRA2 SUB 1;'20000,@nERRA3 sue #20000,@#ERRA4 SUB 1t20000,@lIlERRAS 001100 CMP #177570,@lItSWR 001100 8EQ 5UB 2$ #20000, JMP DONE-20000 ;DOES THE 011620 2$ : CONSOLE HAVE A REG. ? SWITCH ; I F SO THEN GO TO 2$ ~'SWR ;OTHERWISE RE5TORE THE ADDRESS ; SWITCH REGISTER 2539 2540 LOCATION "TREG II IN ADORES5 OF TEST lOCATION 15 IN R5 RESTORE TEST lOCATION TO FIX BAD PARITY CLEAR ERROR BIT IN PARITY REGISTER READ lOCATION TO SET IF PARITY IS GOOD CHECK PARITY ERROR BIT @R5,@R5 ; RETURN TO BANK OF SOFTWARE a 2541 2542 2543 2544 2545 2546 2547 2548 2549 2550 2551 ; ... >I: '" "' .. '" '" 011624 011532 011636 012737 012706 OC4767 011642 005237 004567 011646 011651 011654 011656 011660 011752 017401 000006 104000 2556 2557 2558 2559 2560 011662 0116G4 017363 2561 2562 011676 011700 COSOOO 005200 001376 o t 3705 001405 000005 2563 011702 004715 011704 000240 000240 000240 2555 2564 2565 2566 2::,G7 2568 2569 2570 2571 2572 2573 2574 2575 2576 2577 2578 000116 000510 011666 011670 011672 011706 011710 011712 011,20 011722 011724 o t 1730 011732 011736 011740 011746 011752 011754 003544 2587 25B8 ;2589 2590 2591 2592 2593 2594 2595 2596 2597 2598 2599 2600 2601 2602 2603 2604 2605 2606 2607 HSTKPT ,SP %7,CLRPAR @#PASCNT R5, OACNV 13-JAN-78 30A(1052) >I< >I< >I< '" "' .. >I< >I< "' .. "' ... 'PI, "' .. >I< >I< 12:27 ;REINITIALIZE STACK POINTER ;CLEAR ALL PARITY REGISTERS ; 'EEP TRACK OF PASSES COMPLETED PAGE 48 SEQ 0048 PA5CNT MPCNT G TYPE ;TYPE BELL, MPGEND CLtl 1$: 000042 $ENDAD: 032777 000400 167162 000167 000000 000000 MACY11 • '" >1<'" J. MOV J$R INC JSR 011752 001401 000000 105767 001006 105777 100375 112777 000' 14 002150 167160 CONT: INC BNE LOGICAL: 8EQ RE5ET 05R NOP NOP NOP BIT 8EQ HA L T T5TB 8NE CONT ;LOADED BY MONITOR'? ; BRANCH I F NO 7,(5) ; GO TO MONITOR #BITB,@5WR • +4 : SWITCH 8 SET? MQV ; HAL T AT END OF PASS SET @lTPS 000000 ,-4 #O,@TPB 8EGIN 1$: PASCNT: MONC·T: @#42,R5 $TPFlG 1$ TST8 167140 AND PASS COUNT ; AllOW TIME FOR END PA55 MESSAGE TO PRINT RO 1$ 8Pl MOV8 JMP 170134 "END PA5S=" RO 167146 2579 2580 2581 2582 2583 2584 2585 2586 >I< '" '" '" '" "'''' >I< "' ...... '" '" ¥ >1<"" '" >I< CCMFAFO, MEMORY P~RITY TEST CCN'IFAF.Pl1 13-JAN-7912:13 2552 2553 2554 >1<'" ** "'* ** '" ** ** ** *'" '" *'" * ** "' ... * ;AT THIS POINT EXECUTION RETURNS TO SANK 0 ;DONE: **,.,.. .. "',. MOV *' ** '" ** '" '" '" ** >1<" '" '" '" '" '" ** '" '" '" '" >1<** '" '" "' .. '" '" '" '" '" '" "'''' '" '" '" '" ** . . ,. '" *' '" ... '" * "',. ...... **'" Ii PARV EC+2 ,@#PARVEC : RES TORE T RAPCA TCHER o o ;IF NO TERMINAL. SKIP ; "AIT FOR TTY TO FINI5H SO THAT RESET :WON'T CLOBBER THE BEll : OUTPUT A NULL ; PA5S COUNT * "' ... * '" '" '" * ** ** *'" '" * "'"' "'''' *'" * '" ***"''''* *** *'" '" '" '" #MAPMB,@1I4 '" "' ...... "'"' '" '" '" "',.. * '" '" ** '" '" ** "'** '" ':" SET '" '" '" "'"'NO'" '" MEM "' ...... MANAGEMENT "'. * '" '" '" '" '" '" '" '" '"TRAP *"' .. "'' ' **'" ; ** *'" '" '" '" '" '" * '" >I< >I< '" >I< '" '" "' .. '" '" '" '" '" >I< >I< >f. '" '" '" >I< '" '" >I' >I< '" '" '" ;CREATE MAP INDICATING WHERE 4K BlOCK5 OF MEMORY ARE PRESENT 011756 012737 011764 005737 011770 011774 012000 012004 012010 012016 012024 012032 012040 012046 012054 012060 012064 012070 012074 012102 012106 012162 177572 005067 004767 004767 166554 001712 002056 005067 012767 012767 012767 012767 012737 016777 005737 166534 177777 077777 000001 001064 012150 166472 021000 025000 031000 035000 000200 166412 005737 005737 005737 062767 006367 103006 000004 i·>t- '" '" "' .. '" * .. '" MAPMEM: MOV T5T 167046 167042 166466 166506 000004 167176 166442 @#SRO ; IS KT PR~SENT? (TIMEOUT IF NO) ;MAP MEMORY U5ING KTll - MAX OF l24K POSSIBLE ; INDICATE KTll PRE5ENT MAPMA: ClR NOKT ; INITIAllY 5ET All PAGE5 NONRESIDENT. BANK JSR %7,NRAll ;MAP KERNEL 0 TO B~NK 0, RW 05R %7,MAPl ; MAP KERNEL 7 TO THE EXTERNAL BANK. RW ;MAP KERNEL 1 RW, AND TURN ON KTll TBANK ClR ;SET UP CORE MAPS ,,77777 ,MEMl MOV 1177777,MEMH MOV ;SET UP 4K POINTER MOV ,l,/1.8ITPT #MEML, MEMUT MOV 5ET UP FOR TIME OUTS 115$ .@#4 MOV MAP KERNEL PAGE 1 TO BANK BEING TESTED TBANK,0lKPAR1 MOV 2$ : 1ST K PRESENT? @f.l21000 T5T 2ND K PRESENT? @#25000 TST 3RD K PRESENT @1f3100Q T5T 4TH K PRESENT? @#35000 TST UPDATE TE5T ADDRESS #200, TBANK 3$: ADO UPDATE BANK POINTER 81 TPT ASl 8RANCH I F NOT DONE WITH 64K SECTION 4$ BCC CCMFAFO, MEMORY PARITY TEST CCMFAF.Pl1 13-JAN-7812"3 260B 2609 2610 2611 2612 2613 2614 2615 2616 2617 261B 2619 2620 2621 2622 2623 2624 2625 2626 2627 262B 2629 2630 2631 2632 2633 2634 2635 2636 2637 263B 2639 2640 2641 2642 2643 2644 2645 2646 2647 2648 2649 2650 2651 2652 2653 2654 2655 2656 2657 2658 2659 2660 2661 2662 2663 012110 012116 012124 012132 012134 012140 012146 012150 012767 012767 022767 003345 005037 012737 000207 046777 012156 012160 022626 000745 012162 012170 012172 012200 012206 012212 012220 012222 012226 012232 012236 012242 012246 012252 012260 012262 012270 012272 012767 022626 012737 012767 005067 012767 005001 005761 005761 005761 005761 062701 006367 022767 003360 012737 000207 046767 012300 012302 022626 000757 2667 266B 2669 2670 2671 2672 26i3 2674 2675 2676 2677 267B 2679 26BO 26Bl 26B2 26B3 26B4 26B5 2686 26B7 26BB 2689 2690 2691 2692 2693 2694 2695 2696 2697 269B 2699 2700 2701 2702 2703 2704 2705 2706 2707 270B 2709 271 0 2711 2712 2713 2714 2715 2716 2717 271B 2719 13-JAN-78 12:27 PAGE 49 SEQ 0049 000001 001066 007600 166402 166422 166412 177572 000006 000004 166344 166370 000001 166360 012272 000177 166654 000001 000004 166656 166300 001000 005000 011000 015000 020000 166246 000200 166240 000006 000004 166222 166564 4$. 5$. MOV MOV CMP BGT CLR MOV RTS ;YES, DO MEMH(64-124K) N1,BITPT alc NMEMH, MEMUT #7600, T BANK 2$ ilHSRO "'6,@1I4 %7 BITPT ,ilMEMUT CMP BR (SP)+, (SP)+ 3$ : EXTERNAL BANK YET? :NO, NOT YET ; YES- DISABLE KTll ; RESTORE TRAPCATCHER ;RETURN : TiMEOUT OCCURRED-CLEAR BIT TO INDICATE ;4K BLOCK NOT PRESENT : ADJUST STACK : CHECK NEXT BLOCK :NO KT PRESENT - MAP MAX OF 28K IN 4K CONTIGUOUS BLOCKS :SET FLAG TO INDICATE KT11 NOT PRESENT #1 t NOKT MAPMB: MOV ;RESTORE _TACK POINTER (SP)+, (SP)+ CMP ; SET UP TIMEOUT RETURN MOV H3$ ,"'#4 ; INITIALIZE MAP MOV #177,MEML MEMH CLR :SETUP 4K POINTER MOV HI, BITPT : INIT IALl ZE BANK ADDRESS CLR Rl :IST K PRESENT 1$: TST 1 OOO( 1) ; 2ND K PRESENT 5000( 1) rST ; 3RD K PRESENT TST 11 000 (1 ) :4TH K PRESENT 15000( 1) TST #20000, Rl ;UPDATE TEST ADDRESS ADD 2$. ; UPDATE POINTER TO NEXT 4K BITPT ASL : 28K CHECKED YET? CMP H200,BITPT ; NO, CHECK NEXT 4K BLOCK 1$ BGT MOV #6,«>#4 RTS %7 : TIMEOUT OCCURRED- CLEAR BIT TO BIC BITPT tMEML 3$: : INDICATE 4K BLOCK NOT PRESENT : ADJUST STACK POINTER (SP)+, (SP)+ CMP SR 2$ ;*. *". ** ***"'*"'**.'" *"''''''' '" '" OJ<** '" >I< ** _••• "'>IE ** "'* "'*"'* ** *>1'''OJ< '" *"'*** "'**. ** *."'*"''''''' ...... ;MAP PARITV CORE AND CORRESPONDENCE TO ASSOCIATED REGISTERS 012304 012312 012320 012326 012332 012336 013767 012767 012767 005067 005067 005067 001064 000001 000001 166232 166206 166210 012342 005067 166662 012346 012352 012356 012360 012702 032712 001003 012772 166234 166200 166700 000004 000000 012434 012440 012444 012446 012452 012456 012462 012464 012470 012472 062702 020227 103765 012702 062702 020227 002031 032712 001370 000010 000766 005772 000000 012476 012500 012504 012506 166006 OOD002 012516 012524 100365 005767 001004 056762 000403 056762 105762 165776 000007 000004 012530 012532 012540 001005 116762 105262 166472 000007 000006 012544 012546 012550 000742 000002 166446 166452 000010 012410 012412 012414 012420 012424 012426 012514 012556 012564 012566 012572 012576 012600 012606 012610 012616 012622 012626 012634 012636 012642 012646 012650 012652 012656 000004 2$: 000000 MAPRC: 1$: 000556 000010 000766 000001 166046 062767 026727 001402 000167 005767 001021 026727 103015 062767 oe6367 005067 036767 001756 000167 005767 001401 000207 005767 001417 2$: 3$: 4$: MAPRD: 011313 177554 165754 1$: 165714 000100 020000 165676 166402 165666 165726 177504 165702 166350 ; LOAD MAP OF MEMORY PRESENT IN LOWER 64K ; INITIALIZE 4K POINTER : INDICATE KTI1 NOT IN USE ; INITIALIZE ADDRESS OF TEST BANK ;CLEAR FLAG TO INDICATE FIRST 64K : BEING CHECKED ADRTYP 13-JAN-7B 165112 MAPRE: 12:27 PAGE 50 SEQ 0050 tM? 166140 166620 000566 000001 "'#MEML ,MEMUT Hl,BITPT Hl,KTSTART RELOC TBANK HIWORD :SET WRITE WRONG PARITY IN ALL REGISTERS PRESENT :THEN WRITE TEST LOCATION VIA DATO AND READ TEST LOCATION VIA DATI :THEN CLEAR WRITE WRONG PARITY IN ALL REGISTERS MAPRB: MOV HMPRO, R2 : LOAO ADDRESS OF TABLE 1$: BIT #1, (2) : IS THIS REGISTER PRESENT? BNE .+10 ;NO, GET NEXT ONE MOV HWWP,iI(2) ;YES, SET WRITE WRONG ~ARITY AND CLEAR REST ADD 062702 020227 103765 016703 066703 011313 005713 012702 032712 001003 042772 012404 MAPREG: MOV MOV MOV CLR CLR CLQ MACYll 30A( 1 052) 000010 000766 012366 012372 012376 012400 ; ** "' •• **. ******* * **** of"'**** *********.*"'** *'" * '" ** ** "'* '" "'* ** .. ,.. ***** ********* CLR 000566 000001 CCMFAFO, MEMORY PARITY TEST 13-JAN-7B 12: 13 CCMFAF. Pl1 2664 2665 2666 MACVll 30A(1052) BLO MOV ADD MOV TST MOV BIT BNE BIC 1I10,R2 R2,hTREG 1$ TBANK, R3 ADRTYP,R3 (3) ,(3) (3) #MPRO, R2 #1, (2) .+10 HWWP,!'(2) ADD CMP BLO MOV ADD CMP BGE BIT BNE TST #10 t R2 R2,#fREG 2$ NMPRO-10,R2 HI 0, R2 R2, HTREG MAPRD HI, (2) 1$ @l(R2) BPL TST BNE Bi> BR BIS TSTB 1$ HIWORD 2$ BITPT ,2(2) 3$ BITn ,4(2) ?(2) BNE MOVS INCB 4$ ADRTYP,6(2) 7(2) BR MOV ADD CMP BEQ JMP TST BNE CMP BHIS ADD ASL CLR BIT BEQ JMP TST BEQ RTS TST BEQ 1$ @R3,!'R3 #2, ADRTYP ADRTYP,Hl0 1$ MAPRB HIWORD MAPRE BITPT ,Hl00 MAPRE 020000, TBANK BI TPT ADRTYP BITPT ,MEMUT 1$ MAPRS NOKT .+4 %7 KTSTART 1$ DONE WITH TABLE? BRANCH I F NOT LOAD ADDRESS OF 4K BANK UNDER TEST ADD ADDRESS OFFSET (EITHER O,2,4,OR 6) WRITE WRONG PARITY READ WRONG PARITY : CLEAR WRITE WRONG PARITY IN ALL ; PARITY REGISTERS ;INIT FOR ERROR CHECKS ;BRANCH IF DONE WITH TABLE ; IS THIS "EGISTER PRESENT? iND, GET NEXT ADDRESS : YES, DID THIS CONTROLLER GET A : PARITV ERROR? :NO. CHECK NEXT ;YES, WHICH 64K IS UNDER TEST? ; BRANCH I F UPPER 64K ;SET BIT IN MAP FOR THIS PARITY REGISTER ; SET BIT IN MAP FOR THIS PARITY REGISTER : IS THIS THE FIRST ADDRESS FOUND FOR ; THIS PARITY REGISTER? ;NO, BRANCH ; YES, RECORD LOW BYTE OF ADDRESS (O,2,4,OR 6) : INDICATE AN ADDRESS HAS BEEN FO"ND FOR ; THIS REGISTER ; CLEAR BAD PARITY ;CHECK FIRST 4 ADDRESSES IN EACH 4K BRANCH IF FIRST 4 ADDRESSES TESTED IF NOT, GO TEST NEXT ONE IS LOWER MEMORY DONE? YES, BRANCH DONE WITH 1 ST 2BK? YES, BRANCH NO- ADD 4K TO ADDRESS SHI FT BIT POINTER START WITH FIRST ADDRESS IN BANK DOES THIS 4K BLOCK EXIST? ND- BRANCH YES, TEST IT KTll PRESENT? YES, BRANCH NO, DONE KTl1 ALR 'ADY ON? YES, BRANCH ,;. CCMFAFO, MEMORY PARITY TEST CCMFAF.Pl1 13-JAN-7812:13 2720 2721 2722 2723 2724 2725 2726 2727 272B 2729 2730 2731 2732 2733 2734 2735 2736 2737 273B 2739 2740 2741 2742 2743 2744 2745 2746 2747 274B 2749 2750 2751 2752 2753 2754 2755 2756 2757 275B 2759 2760 2761 2762 2763 2764 2765 2766 2767 2768 2769 2770 2771 2772 2773 2774 2775 012660 012666 012674 012700 012767 020000 012767001400 004767 001012 004767 001156 012704 012710 012716 012722 012724 012732 012740 012746 012754 012162 012764 012770 012772 013000 013002 013010 013014 005067 012737 006367 103011 012767 013767 012767 062767 022767 003003 005037 000207 036767 001746 016777 005067 000167 2796 2797 279B 2799 2BOO 2BOI 2B02 2B03 2804 2805 2806 2B07 2808 2B09 2Bl0 2811 2812 2813 2814 2815 2816 2B17 2B18 2B19 2B20 2821 2822 2823 2824 2825 2826 2827 2828 2B29 2B30 2831 12:27 PAGE 51 SEQ 0051 165656 165670 MOV MOV JSR ~SR 166316 000001 165576 177572 000001 001066 000001 000200 007600 165566 165606 165604 165610 165602 CLR Mav ASL BCC Mav Mav Mav ADO CMP BGT CLR RTS BIT BEQ MOV CLR JMP 1$: 2$: 177572 165522 165546 165556 166214 177326 166242 3$: ; 'II. *20000, TBANK ',400, RELac "7,NRALL "7,MAPI KTSTART ",iII,SRO BIT?T 2$ N1 ,BITPT .'MEMH, MEMUT ",HIWORO nOO,RElOe 17600, RELac 3$ .,SRO NO, INIT TBANK TO SELECT KERNEL PAGE SET UP FOR ACCESS TO 2BK BANK INITIALLY MAP ALL PAGES NR, BANK 0 MAP KERNEL 0 TO BANK 0, RW MAP KERNEL 7 TO THE EXTERNAL BANK, RW SET KERNEL 1 RW AND TURN ON KT11 INDICATE KTll NOW IN USE ; TURN ON KT11 ;SHIFT BANK INDICATOR ; BRANCH IF FI RST 64K NOT DONE ;IF FIRST 64K DONE, SETUP FOR ;SECOND 64K ; INDICATE NOW TESTING HIGH 64K ;UP TO EXTERNAL BANK YU1 ; NO, CaNT INUE ;YES, TURN OFF KTl1 AND EXIT %7 BITPT ,MEMUT 1$ RELOC ,.KPARI ADRTYP MAPRB ;IS THIS 4K PRESENT? ;NO- BRANCH ;YES, MAP PAGE 1 TO THIS BANK ;GO TEST FOR PARITY MEMORY *'" "' . . **"' •• "'*** ••• 'II'" '" ••••••••••••••• "''II *** >1/ '" '" "'''''''. ** ••••••••• 'II • • • • • • • • • • • ;ROUTINE TO TYPE MAP OF WHERE PARITY MEMORY IS PRESENT ;AND WHICH CONTROL REGISTERS ~ONTROL WHICH MEMORY ; *.* *** ... "' •• * .... *** 000766 TMAP: 000556 000010 000766 TMAPA: 013044 013046 013052 004767 104000 017074 012701 062701 020127 002136 005067 005067 013056 013062 013070 013076 013020 013024 013026 013030 013034 013040 013104 013110 013112 013116 013122 013124 013126 013130 013132 013134 013136 013140 013146 013154 013156 013162 013164 013172 013176 013200 013202 013204 165500 165444 005067 165442 CLR TYFLG INITIALIZE TRANSITION FLAG (USED TO FIGURE MEMORY LIMITS) INITIALIZE TO INDICATE NOTHING TYPED FOR THIS REGISTER YET 012767 016167 012767 032711 001351 011167 004567 000514 017244 000006 104000 017447 104000 017244 177774 000002 000001 000001 MOV MOV MOV BIT BNE MOV JSR TEMPX MPRAD 6 TYPE MXl TYPE MPRAD 11-4, TveDR 2( 1) ,ADRPT Nl,BITPT #1, (1) TMAPA (1), TEMPX R5,OACNV GET LOW 64K MEMORY MAP WORD INITIALIZE 4K POINTER DOES THIS CONTROL EXIST? NO, GET ADDRESS OF NEXT ONE YES, PRINT ITS ADDRESS 013250 013252 013254 013256 013260 013262 013264 013266 013272 013276 013300 013304 013306 013312 013314 001250 104002 013316 013320 013326 013334 013340 013342 000646 016167 012767 005267 000677 000207 013210 013212 013214 013216 013220 013224 013226 013232 013234 013240 013244 013246 165436 165420 165414 165376 002274 000004 165346 13-~AN-7B MACYl1 30A(1052) 12:27 ;CLEAR ALL PARITY REGISTERS PRESENT ;TYPE "THE PARITY REGISTERS CONTROL MEMORY ;AS FOLLOWS:" ;SET UP POINTER ; DONE WI TH MAP? i YES, BRANCH PAGE 52 SEQ 0052 165360 165342 TMAPB: 165340 000001 002326 "7,CLRPAR ** ........... "' ••••••••••••••••• NMPRO-l0,Rl N10,Rl Rl ,#TREG TMAPEX' HIWORD TRFLG 062767 036767 001424 005767 001043 012767 004567 000526 017144 000003 104000 017546 104000 017144 104000 017151 005267 000422 OC5767 001417 005067 004567 000526 017144 000003 104000 017144 104000 017157 1014000 017154 005267 006367 103320 005767 001405 005767 013206 .*. . ***** .*.*"' ••••• *..... ,... JSR TYPE MTMAP MOV ADO CMP BGE CLR CLR CCMFAFO, MEMORY PARITY TEST CCMFAF.PI1 13-JAN-7B 12:13 2776 2777 2778 2779 2780 2781 2782 2783 2784 2785 2786 2787 276B 2789 2790 2791 2792 2793 2794 2795 13-~AN-7B MACY11 30A(1052) 165330 ADD BIT BEQ TST BNE MOV ~SR 04, TYCOR BI TPT ,ADRPT TMAPC TRFLG TMAPD ",TRFLG R5,BOCNV KEEP TRACK OF 0 OF K OF CORE DOES THIS PARITy REGISTER CONTROL THIS 4K1 NO- BRANCH YES, OOES IT CONTROL PREVIOUS 4K1 YES- DON'T TYPE IT NO- SET FLAG INDICATING TRANSITION CONVERT K CORE TO ASCI I TYCOR MTYCOR 3 165300 TMAPC: 165270 165262 002260 TYPE MX2 TYPE MTYCOR TYPE MDASH INC BR TST BEQ CLR JSR TYCOR MTYCOR ; TYPE "CONTROLS", AND ADDRESS OF CORE TYFLG TMAPO TRFLG TMAPD TRFLG R5, BOCNV ;INDICATE TYPED ;010 THIS PARITY REGISTER CONTROL PREVIOUS 4K1 ;NO, SKIP PRINTING ;YES, TRANSITION OCCURRED- CLEAR flAG ;CONVERT K CORE TO ASCII 3 165232 165222 TMAPD: 165246 165212 TYPE MTYCOR TYPE MK TYPE MCR INC ASL BCC TST BEQ TST BNE ERROR 000004 000001 165212 165170 165164 BR MOV MOV INC BR TMAPEX: RTS 15: ; TYPE RIGHT AND RETURN TYFLG BITPT TMAPB HIWORD 1$ TYFLG ; INDICATE TYPED ;UPDATE BIT POINTER TO NEXT 4K ;TEST NEXT 4K IF NOT DONE WITH 1ST 64K : 64-1 24K DONE? ;NO, BRANCH ; YES, WAS ANY PAR ITY MEMORY ; FOUND FOR THIS REGISTER? TMAPA ;NO PARITY MEMORY WAS FOUND FOR THIS ;REGISTER- EITHER WRITE WRONG PARITY ;FAILED, PARITY ERROR GENERATE OR ;DETECT FAILED, OR THE PARITY ERROR ;BIT FAILED TO SET TMAPA 4( 1), ADRPT ",BITPT HI~ORD TMAPB %7 ;UPDATE TO MAP WORD FOR THE UPPER 64K ; RESET 8IT POINTER ; INDICATE LOW 64K DONE ; LOOP ; RETURN WHEN DONE ; ROUTINE TO HANDLE 8K SYSTEMS 013344 012767 000002 165146 SMLSYS: MOV *2,BlTPT ; SET UP POINTER FOR BANK 1 CCMFAFO. MEMORY PARITY TEST CCMFAF.Pi1 13- 1< "'. '" "'* '" >I< >It'" o4o ... >1<" '" '" >1< .. * >I< '" '" *' .. * .. >I< >1< .. ** "' .. * * >I< '" * >I< >1< .. * .... *. *'" It""'" "' .. '" '" '" * * "'''' *,... ** * '" '" "'. '" "' .. '" "'* '" "' .. ** "' .. *'" "' .. * '" *>1- '" '" * '" ERRORS CALL ENTERS HERE 013424 013426 013432 013434 013436 0'3440 2855 'II '" '" ;MAKE EXI T STANDALONE 1'#42 'II 2850 2856 2857 2858 2859 PAGE 53 SEQ 0053 ** .. ,. '" '" 2851 2852 2853 2854 12: 27 ERROR HANDLER 012767 012767 012767 017767 004567 000766 016526 ~849 13-JAN-78 CLR TYPE NOMON RTS 000042 2840 2841 2842 2843 2844 2845 2846 2847 2848 30A ( 1 052) MACY11 013562 013570 013576 013604 013612 013614 013620 013626 0131332 013634 013636 013640 013644 013546 013650 013652 013656 013660 013662 013664 013666 o t 3574 013676 013702 013704 013706 013710 012767 Oi 2767 012767 032777 001025 01 1667 1 ·32767 004567 013710 016472 000006 004567 016460 016510 000006 004567 177777 000.240 000240 020000 000070 000064 000060 ,65266 000070 000002 001564 000062 013712 013716 013722 013730 013736 013740 013742 0·13744 013750 013754 013756 013760 013762 013764 013770 013746 013746 012737 012737 010146 013552 ERRQRP CALL ENTERS HERE TYPES PC, ICNT, M~R ADDRESS, MPR CONTENTS TEST LOCATION ADDRESS, VALUE EXPECTED, VALUE FOUND R5 MUS T CONTAIN ADDRESS OF TEST LOCATION SHOBE MUST CONTAIN EXPECTED VALUE WAS MuST CONTAIN ACTUAL DATA TREG MUST CONTAIN ADDRESS OF PARITY REGISTER RRP: MOV #MSTR,ERRB ; IN AODI TION TO 8ASIC PRINTOUT. TYPE ;MPR ADDRESS AND CONTENTS MDV NMSTRX, ERRBX ;AlSO OUTPUT DATA EXPECTED AND ACTUAL MOV #-1,ERRBX+2 ;NOP LOCATION AFTER MESSAGE MOV R5. TSTLOC ;STORE ADDRESS BEING TESTED MOV "'TREG, TRDATA JSR RS,OACNV TREG MTREG 6 uSR RS ,OACNV TRDA T A MOATA 6 R5,OACNV uSR TSTLOC MSTRXI 6 RS ,OACNV uSR SHOBE MSTRX3 6 13-JAN-78 30A ( 1 052) 12: 27 PAGE 54 R5,OACNV 6 BR 001 S52 001506 016464 000000 000000 177777 023737 001403 005777 100001 000042 000046 ; ERROR CALL ENTERS HERE ; TY PE PC AND ICNT ONLY 11-1 I ERRB ERR: MOV #240. ERRBX MOV 11240. ERRBX+2 MOV #BIT13.@SWR ERRA: BI T ERRC BNE (SP),ERRD MDV #2,ERRD SU8 JSR RS ,OACNV ERRD ERRA 1 : ERRA2 : MPC 6 R5,OACNV JSR ERRA3 : ICNT ERRA4 : MICNT 6 JSR RS, TYPSX ERRAS: MEa ERRS: OPEN ERRSX: OPEN ERRC: 165176 OCOOOO 000002 000000 ERRA ERRD: CMP 8EQ TST BPL HALT RTI OPEN ; SET UP ONE MESSAGE CAll ; INHIBIT ERROR PRINT? ;YES- BRANCH ; NO- DEVELOP CALLING ADDRESS ;GD TO OCTAL TO ASCII CONVERT ; SOURCE ADDRESS ; OEST INAT JON ADDRESS ;#OF DIGITS TO CONVERT ; CONVERT ICNT TO ASCII ;TYPE MESSAGE ; ERROR HEADER ;ADDIT IONAl ERROR MESSAGES IF ANY ARE WE IN ACT11 AUTOMATIC MODE7 YES, HA L T ON ERROR HALT ON ERROR SET'? NO- BRANCH YES- ERRwR OCCURRED SO HALT @N42,@#46 . +1 0 @>SWR .+4 2925 2926 2927 2928 2929 2930 2931' 2932 2933 2934 2935 2936 2937 2938 2939 29·10 2941 2942 2943 000004 000006 000006 000002 010246 0,0346 012701 012703 (\12102 00S022 005303 00137S 020127 003767 >Ii SEQ 0054 001644 013554 013556 013560 *'" *>t<" "''''* *'" '" "''''*.''' '" *"'* **. TYPES PC, ICNT, MPR ADDRESS I AND MPR CONTENTS TREG SHOULD CONTAIN ADDRESS OF PARITY REGISTER ;SETUP TO TYPE MPR ADDRESS AND CONTENTS RRST: MOV NMSTR, ERRB #-1,ERR8X MDV ;NDP LOCATION AFTER MESSAGE MOV #240, ERRBX+2 MOV @TREG. T ROAT A ; SETUP DATA ; CONVERT TO ASCII uSR R5,OACNV TREG MTREG 6 ;CONVERT TO ASCII uSR R5,OACNV TRDATA MDATA 6 8R ERRA JSR LoJAS MS TRX5 004567 000536 016635 000006 000411 013546 0+ .. 001232 000040 001236 000004 000006 ;MAP ALL PAGES NON-RESIDENT. @#4,-(SP) NRALL : MOV @#6,-(SP) MOV MOV #6,@1I'4 #RT I ,t?tlS MOV R1 ,-( SP) MDV R2,-(SP) MOV R3,-(SP) MOV #PDRTAB, Rl MOV 1$: /132 •• R3 MOV MOV (R1 )+, R2 ( R2)+ 2$: CLR R3 DEC 2$ BNE eMP R1,NPDREND ,$ BLE BANK 0 . CCMFAFO, MfMORY PARITY TEST CCMFAF .Pt, 13-JAN-78 12: 13 2944 :2945 013772 013774 2946 013776 2947 29·18 2949 2950 2951 aHDaD 014004 01401 a 012603 012602 012601 012637 012637 000207 MACV11 2955 2~)S6 2957 2958 2959 2960 2961 2962 29G3 2964 2965 29GB . 2967 2968 29[:l9 2970 2971 01-1012 0140 j 4 014016 01..'l020 a 1..'l024 01..J026 01 il032 01.1036 014040 0140-14 014050 014052 014054 01'W56 014060 010146 010246 010701 062701 010702 062702 032711 001002 005071 062701 020102 103767 01 2602 012601 000207 000006 000004 '64546 164740 000001 000000 000010 ~973 2977 2978 ::>979 2980 2981 014062 01.q070 014076 014104 014112 014116 014124 012777 012777 012777 012777 DC 5077 012737 000207 PAGE 55 077406 077406 077406 007600 165132 000001 (SP)+,R3 (SP)+,R2 (SP)+, Rl (SP)+,@#6 (SP)+,~#4 %7 ;ROUTINE TO CLEAR ALL PARITY REGISTERS PRESENT CLRPAR: MOV Rl ,-(SP) MOV R2,-(SP) MOV PC, Rl #MPRO-. ,R, ADO MOV PC. R2 ADO # TREG- •• R2 1 $: BIT #1.@R1 : IS THIS REGISTER PRESENT? 8NE .+6 CLR 1'( Rl ) : CLEAR ALL PARITY REGISTERS ADD # 1 0, Rl CMP Rl ,R2 1$ SLO MOV (SP)+,R2 MOV (SP)+, Rl RTS %7 2972 2975 12:27 seQ 0055 2974 2976 13-JAN-78 MOV MOV MOV MOV MOV RTS 29S2 2953 2954 30A( 1052) 165150 165144 165142 165144 177572 ; ROUT I NE TO MAP KERNE.L 0 TO BANK 0 READ/WR I TE. ;KE.RNEL 1 READ/WRI TE BUT BANK MAPPED BY CALLING ROUTINE, ; AND KERNEL 7 TO EXTERNAL BANK, READ/WRITE MAP1 : MOV #77406,@KPORO MOV #77406,@KPORI #77406.@KPDR7 MOV H7600,@.KPAR7 MOV @KPARO CLR IIl,@\I;ISRO MOV RTS %7 2982 2983 2984 2985 2986 2987 2988 2989 2990 2991 2992 2993 ~9~4 2995 2996 2997 2998 2999 014126 014130 014134 014140 014144 014146 014152 01 0246 012702 012701 005767 001403 022701 ,01420 014154 030160 000200 000002 164404 000200 000002 CCMFAFO, MEMORY PARITY TEST CCMFAF. Pl1 13-JAN-7812:13 3000 3001 3002 3003 3004 3005 3006 3007 3008 3009 3010 301 t 3012 3013 3014 Ii> 3015 3016 3017 3018 3019 3020 3021 3022 3023 3024 3025 3026 3027 3028 3029 3030 3031 3032 3033 3034 3035 3036 3037 3038 3039 3040 3041 3042 3043 3044 3045 3046 3047 3048 3049 3050 3051 3052 3053 3054 3055 014 t 60 014162 014166 014170 014172 014176 014202 014204 014210 014212 014214 014220 01.:;222 014224 014230 014232 014236 014242 014244 014246 014250 014252 014254 014256 014260 014262 014270 014274 014276 014300 014302 014306 01.:1312 014320 01·B26 014330 014332 014336 014340 014342 01'~344 01'1350 014354 014356 014360 014364 014366 014372 014374 014400 014402 001021 052702 0;:'6301 103363 012701 030160 001010 062702 006301 103371 012701 0121.302 0)0207 005767 001005 C'10277 012701 000407 010201 006301 006301 006301 OC 630 1 006301 006301 116067 066701 012602 000207 000000 013746 013746 012737 012737 010146 010246 012701 000261 a05711 103006 162701 020127 101370 000410 012702 012122 020227 103774 005267 012602 012601 MACY11 000001 000004 000200 000001 164320 165014 020000 000004 000006 000006 000002 152234 020000 020000 032234 040000 000016 30A( 1052) 13-JAN-78 12: 27 PAGE 56 SEQ 0056 000200 000006 000004 ;ROUTINE TO LOCA T E THE FIRST PARITY MEr-WRY ADDRESS ( ABOVE BANK 0) ;CORRES?ONDING TO A GIVEN PARITY REGI ST ER-REOU I RES THAT THE ROUTINES ;MAPr.1EM AND MAPREG HAVE ALREADY BEEN RUN :TO USE, PUT THE ADDRESS OF THE ADDRESS OF THE REGI STER IN RO (I. E. POINT TO ; TO MAP TABLE)-THE DESIRED ADDRESS IS RETURNED IN USING KERNEL PAGE 1 IF R" ; KT 11 IS Pr(ESENT LOCA TM: MOV R2 ,-( SP) MOV 1t2C J, R2 MOV #2, Rl ; SKI P USE OF BANK 0 1$: TST NDKT ; KT11 PRESENT? 3$ BEQ ; YES, BRArJCH CMP #200,R1 ;t\iO, CHECK ONLY FOR MEMORY IN FI RST 28K 4$ ;Ir NO MEMORY FOUND IN 1ST 28K, GIVE BLOS : ERROR REiURN 3$; BIT Rl ,2( RO) :DOES THI5 4K CORRESPO"D TO THIS REGISTER? 000010 000004 000006 BNE AuD ASL BCC MOV 2$: BIT BNE ADD A5L BCC 4$ : MOV MOV RTS LOCAT 1: TST BNE MOV MOV BR 1$: MOV ASL ASL ASL ASL ASL ASL 2$: ADU MOV RTS LSAV: 0 Move LOCAT 1 #200,R2 Rl 1$ II 1, Rl Rl ,4( RO) LOCAT 1 #200,R2 Rl 2$ II 1 • R1 (SP)+.R2 %7 NOKT 1$ R2.@KPAR1 #20000,Rl 2$ R2, Rl Rl Rl Rl Rl Rl Rl 6(RO), LSAV LSAV,Rl (SP)+,R2 %7 : SAVE LOADER IN TOP OF FIRST 4K SAVLDR: MOV @#4,-(SP) MOV @#6,-(SP) 116,@1t4 MOV I,IRTI.@116 MOV MOV Rl ,-( SP) R2,-(SP) MOV MOV 11152234,R1 1$: SEC @Rl TST 2$ BCC SUB #20000, R1 CMP Rl,#20000 1$ 8HI BR SAVLDX 2$ : MOV #32234, R2 3$ ; MOV (Rl )+. (R2)+ CMP R2, #40000 3$ BLO INC LDRSVD SAVLDX: MOV MOV (SP)+, R2 (SP)+,Rl ; YES, BRANCH :NO, CHECK TO SEE I F NEXT 4K CORRESPONDS :CHECK HIGH 64K ;NO PARITY MEMORY CQRRESPDNQS TO ; THIS REGISTER- RETURN WITH ERRor· ; INDICATION ; KT 11 PRESENT? ; NO- BRANCH OVER ; YES- SETuP Rl TO REFERENCE 4K ; BANK USING KERNEL PAGE 1 ; SETUP Rl TO REFERENCE 4K BANK ; W1 THOU T I N6 (SP}+,i!>H4 %7 0 (,mERE IT WAS SAVED) TO THE IF TIMEOUT, C 81T WILL BE SET IF NO TIMEOUT, C BIT WI LL BE CLEAR TIMEOUT OCCLIRREO. CHECK FOR NEXT LOwER 8ANI( ; TYPE MESSAGE "LOADER RESTORED" ; LOADER HAS BEEN RESTORED ; TO HIGHEST BANK IN FIRST 28K iSCAN ALL MEMORY FOR 8AO PARITY. TYPE 18 81 T ADDRESSES OF ;LOCATIONS FOUND TO 8E BAD, AND WRITE INTO LOCATIONS WI7H GOOD PARITY ; STORE RE"ISTERS AND LOCATIONS TO BE Rl ,-( SP) MOV ; ALTERREO R2,-(SP). NIOV R3,-(SP) MOV R4,-(SP) MOV @#4,-(SP) MOV @#6,-(SP) MOV @#114,-(SP) MOV @H116,-(SP) MOV ; SETUP TIMEOUT TRAPCATCHER H6,@1/4 MOV @#6 CLR ; SETUP PARITY TRAP TRAPCATCHER It 116,@l1I114 MOV @tti16 CLR ; KT11 PRESENT? NOKT TST ; YES, BRAf~CH PSCAN 1 BEQ ;R2 CONTAINS TEST ADDRESS R2 CLR ;R3 USED AS A BIT POINTER 111. R3 MOV ; CLEAR I'LL PARITY REGISTERS %7, CLRPAR JSR 1$: @lR2 : READ LOCAT ION TO CHECK FOR BAD ':-ARITY TST NOP ; SETUP fa SCAN REGISTERS FOR PARITY #MPRO, Rl MOV ; ERROR SET #l.@Rl 3$ : BIT 000004 000006 000114 000116 000006 000006 000 116 000116 163754 000004 000114 000001 177202 000566 000001 MACY11 30A( 1 052} 13-JAN-78 000000 TST 000010 000766 ADD CMP BLD ADD BIT BNE BMI 4$: 000002 017777 5$ : ASL 000200 CMP 164170 BIT BHI S B1'-JE 020000 6$: 000110 000502 002000 12:27 164144 ADD BR MDV JSR PSAORS MPSERl 6 TYPE MPSER BI T BEQ . +1 0 @>(Rl ) 6$ 1110. R 1 Rl, #TREG 3$ #2. R2 #1T177,R2 1$ R3 R3. #200 PSCANX R3, MEML 1$ #20000, R2 5$ R2, PSADRS R5,OACNV 1/2000,@l5WR .+4 HAL T 000000 000000 17702~ 000114 000006 000004 164222 000001 176646 MOV @R2,@R2 CLR TST TST BPL ERROR @(Rl ) @R2 @(Rl ) • +4 8R PSCANX: JSR MOV MOV MOV MOV MOV MOV MOV MOV RTS PSAORS: 0 PSCANH: 0 000116 001004 PAGE 5B SEQ 0058 BNE 103035 030367 001343 062702 000766 010267 004567 015020 017440 000006 PAGE 57 ;ROUTINE TO RESTORE THE LOADER FROM BANK ;HIGHEST BANK IN THE: FIRST 28K OF MEMORY LDRSVD RSTLDR: TST RSTLDX 8EQ 1/6,@#4 MOV #RTI ,@1I6 MOV 11152234,Rl MOV 1$: SEC @R1 TST 2$ BCC H20000,R1 SUB Rl, #20000 CMP 1$ BHI RSTLOX 8R #32234. R2 2$: MOV (R2)+. (R1)+ 3$: MOV R2, #40000 CMP 3$ BLO TYPE LDRMSG PC RSTLDX: RTS .-2 BR 001003 005771 12: 27 PSCAN: CCMFAF J, MEMORY PARITY TEST 13-JAN-78 12: 13 CCMFAF. Pl1 31 t 2 3113 3114 3115 3116 3117 3118 3119 3120 3121 3122 3123 3124 3125 3; 26 3127 3128 000004 000006 103774 010146 010246 13-JAN-78 30A( 1 052) MOV MOV RTS LDRSVD: 0 000006 000004 000207 014514 014516 014520 014524 014530 014534 01<1540 014544 014552 MACY11 177572 ; PARITY ERROR SET? ; YES- BRANCH ;ND- CHECK NEXT REGISTER ; LOOP UNT IL ALL REGISTERS HAVE BEEN CHECKED ;MOVE ADDRESS POINTER ;om1E vJI TH 4K? ; NO, CONT INUE ; YES. CHECK FOR TESTING NEXT 4K ; EX IT IF DONE \oJITH 28K ; IS THI S MEMORY PRESENT? ;YES, GO TEST IT ;NO, UPDA E ADDRESS ; LOOP ;PARITY ERROR OCCURRED ;GET ASCI I OF ADDRESS CONTAINING BAD PARITY ; TYPE MESSAGE "BAD PAR I TV FOUND IN LOCATION!! ; AND ADDRESS OF FAILING LOCATION ; SI'JITCH 10 SET? i NO- CONT INUE :HALT ON BAD PARITY SET ; ItJR ITE INTO LOCAT ION- SHOULD :CLEAR BAD PAR ITy ; CLEAR CORRESPONDING PARITY REGISTER ; READ LOCATION TO SEE IF BAD PARITY WAS ; CLEARED ;OK- BRANCH DIDN I T CLEAR WHEN LOCATION ;WAS REI'iRITTEN ;GO CHECK NEXT LOCATION ; DONE- CLEAR ALL PARITY REGISTERS ; RESTORE LOCA TlONS ALTERRED ; BAD Pl\RI TV 4$ PC. CLRPAR (SP)+,@#116 (SP)+,@#114 (SP)+.@N6 (SP}+,@#4 (SP)+,R4 (SP)+,R3 (SP)+,RJ (SP)+, Rl %7 ; RETURN ;SCAN ALL MEMORY FOR 6/\0 PARITY USING 101-1 ;TYPE ,B BI T ADDRESSES OF LOCATIONS FOUND BAD. AND WRITE GOOD PARITY 8ACK IN @KPAR1,-(SP) ; SAVE CONTENT5 OF KERNEL PAR1 PSCANl : MOV Ii 1 .@#SRO ; SKI P IF KTll IS ALREADY ON BIT 1$ BNE JSR PC,NRALL ;MAP KERNEL 0 TO BANK O.RW CCMFAFO, MEMORY PARITY TEST CCMFAF. Pll '3-JAN-78 12: 13 .. . 3168 3169 3170 3171 3172 3173 3174 3175 3176 3177 317B 3179 3180 31B, 3182 3183 3184 31B5 31B6 3,87 3188 3189 3190 3191 3192 3193 3194 3195 3196 3197 3198 3199 3200 3201 3202 3203 3204 320S 3206 3207 320B 3209 3210 3211 ~212 3213 3214 3215 3216 3217 321B 3219 3220 3221 3222 3223 13-JAN-78 12:27 PAGE S9 SEQ 0059 PC,MAPl 015044 004767 177012 JSR 015050 015054 015060 015064 015070 015072 015076 015100 015102 015106 015110 015116 015120 015122 015126 015130 005067 005077 012703 005767 001004 030367 001022 000403 030367 001016 062777 006303 103361 005767 001003 005267 177746 164172 000001 177732 1$: CLR CLR PSLOOP: MOV PSLUP: TST BNE BIT BNE BR 2$: BIT BNE PSNXT: ADO ASL Bce TST SNE INC PSCANH .KPARl 1',R3 PSCANH 2$ R3,MEML PSXTST PSNXT R3,MEMH PSXTST 1200,iI>KPARl R3 PSLUP PSCANH PSCXl PSCANH 0'5134 015136 015142 015144 015150 015154 015156 015162 015166 015170 015174 015176 015202 015206 015210 015214 015220 015222 015224 015230 015236 015240 015244 015246 000751 012677 000707 012702 004767 005712 012701 032711 001003 005771 100413 062701 020127 103765 062702 020227 103753 000732 010267 042767 005046 017746 006316 006316 006316 006316 006316 006166 006316 006166 006366 062667 004567 015020 017440 000006 116704 BR MOV BR PSXTST: MOV 1$: JSR TST MOV 2$: BII PNE TST BMI ADD CMP BLO 3$: AOD CMP BLO BR MOV 4$: BIC CLR MOV ASL ASL ASL ASL ASL ROL ASL ROL ASL ADD J5R PSAORS MPSERl 6 MOVB PSLOOP (SP)+,iI>KPJlR' PSCANX #20000, R2 %7,CLRPAR .R2 NMPRO ,Rl 015250 015252 015254 015256 015262 015264 015270 015274 015300 015304 015306 015310 015312 163766 163760 000200 177666 020000 176636 000566 000001 000000 000010 000766 000002 040000 177570 160000 000002 000002 000002 177520 000112 002122 015364 015370 015376 015400 015402 015406 015412 015414 012567 022767 001001 000205 013746 004767 000000 000763 000022 177777 3255 015416 3256 3257 325B 3259 3260 3,61 3262 3263 3264 3265 '266 3267 3268 3269 3270 3271 3272 3273 3274 3275 3276 3277 327B 3279 015422 015426 015432 015440 015444 015450 015454 015460 015464 015472 013567 012567 012567 066767 016746 000074 000072 000070 000064 000052 177770 000060 000040 000034 000007 000020 000014 000010 000010 015502 015506 015512 015514 015516 015520 015522 015524 015526 104005 012700 015416 '77562 164006 062604 110467 104000 017410 032777 001401 000000 011212 005071 005712 005771 100001 104002 000712 062716 005367 112677 042767 006067 006067 006067 005367 001352 000205 000000 000000 000000 PSCXl : 164110 015316 015320 015324 015326 015330 015336 015340 015342 015344 015350 015352 015356 015360 015362 Oti2716 164134 177674 CCMFAFO. MEMORY PARITY TEST CCMFAF.P11 13-JAN-7812:13 3224 3225 3226 3227 322B 3229 3230 3231 3232 3233 3234 3235 3236 3237 323B 3239 3240 3241 3242 3243 3244 3245 3246 3247 324B 3249 3250 3251 3252 3253 3254 MACYI1 30A( 1052) MACY11 30A(1052) ; R2 USED AS ADDRESS POINTER ;CLEAR ALL PARITY REGISTERS ; READ LOCATION ; SETUP TO SCAN REGISTERS FOR PARITY ERROR SET ; PARITY ERROR SET? ; YES, BRANCH ; NO. CHECK NEXT R1 ,MTREG 2$ '2,R2 R2, #40000 1$ PSNXT R2, PSADRS 6160000, PSADRS -(SP) PKPAR1,-(SP) PSP IISP IISP PSP PSP 2(SP) I'SP 2(SP) 2(SP) (SP)+, PSADRS RS,OACNV ; LOOP UNT I L ALL REGISTERS HAVE BEEN CHECKED ;UPDATE TEST ADDRESS POINTER ; DONE WITH BANK? ;NO- LOOP ; YES- GO CHECK FOR ANOTHER BANK ; PARITY ERROR OCCURREO- GET 18 BIT ;OCTAL ADDRESS OF BAD LOCATION ;CONVERT LOW 16 OCTAL BITS TO ASCII MPSER1,R4 ,2:27 PAGE 60 SEQ 0060 ,63542 000000 000000 000014 177776 163502 015702 ; BRANCH I F NOT END OF 64K ; END OF TOP 64K7 ;YES, GET READY TO EXIT ;NO, SET FLAG INDICATING DONE WITH ; LOWER 64K #1,@lR1 .+10 "(") 4$ "0,R' 13-JAN-7B ADD MOVB TYPE MPSER BIT BEC HALT MOV CLR TST TST BPL ERROR BR 002114 002000 MAP KERNEL 7 TO THE EXTERNAL BANK, RW MAP KERNEL 1 RW, AND TURN ON KTll CLEAR FLAG TO INDICATE CHECKING FIRST 64K INITIALIZE TO BANK 0 R3 IS USED AS A BIT POINTER TESTING TOP 64K7 YES, BRANCH NO, IS PARITY MEMORY PRESENT IN THIS 4K? YES- GO TEST IT NO- CHECK FOR NEXT 4K IS PARITY MEMORY PRESENT IN THIS 4K? YES- GO TEST IT NO- MAP TO NEXT 4K (SP)+,R4 R4,MPSER' ;CHANGE TO ASCII FOR lB BITS ; TYPE AODRESS OF LOCATION WITH BAD PARITY 62000,iI>SWR .+4 flR2."R2 1'( R1) I'R2 .(Rl ) .+4 3$ ; SWI TCH 10 SET? ;NO- BRANCH ; HALT ON BAD PARITY SET ; REWRITE LOCATION CONTAINING BAD PARITY ; CLEAR PARITY ERROR BIT ; READ LOCATION TO SEE IF PARITY IS NOW GOOD ;CHECK PARITY ERROR BIT ;REWRITING LOCATION DID NOT CLEAP BAD PARITY ;GO TEST NEXT LOCATION ;PIC ROUTINE TO OUTPLT A SERIES OF ASCII MESSAGES (CALLED VIA JSR R5) MOV (R5)+, TYPSBX TYPSX: ;GET ADDRESS OF MESSAGE CMP #-1, TYPSBX i TERMINATOR? BNE TYPSAX ;NO. BRANCH RTS %5 ;YES, RETURN TYPSAX: MOV "'PS,-(SP) ; SETUP TO CALL TYPE ROUTINE VIA JSR J5R PC,STYPE ;TYPE ASCII MESSAGE TYPS'X: OPEN BR TYPSX ;SUBROUTINE FOR OCTAL TO ASCII CONVERSION MOV "(5)+,OACNVX ;GET OCTAL VALUE MOV (5)+,OACDST ;GET OESTINATION AODRESS (5)+,OACNT MOV ;GET CONVFRT COUNT ADD OACNT ,OACOST ;DEVELOP ADORESS TO STORE 1ST CHAR. OACNVA: MOV OACNV X, -.( SP) BIC N177770,OSP ; ISOLATE LEAST SIGNIFICANT DIGIT #60,@SP ADD ; CONVERT OIGIT TO ASCII OACDST DEC MOVB (SP)+,I'OACOST ; STORE ASCI I CHARACTER BIC N7 ,OACNVX ROR OACNVX ROR OACNVX ROR OACNVX DEC OACNT ;OONE ALL OIGITS? BNE OACNVA ; BRANCH I F NOT DONE RTS R5 ;OONE, EXIT OACNVX: OPEN OACDST: 0 OACNT: 0 OACNV: 000060 000024 ;SUBROUTINE FOR BINARY TO DECIMAL ASCII CONVERSION ;SAVE REGS BDCNV: SAV04 MOV NOECVAL,%Co ;SET UP ADDR TO STORE DECIMAL ASCII CCMFAFO, MEMORY ceMFAF.pll 3280 3281 3282 3283 3284 3285 3286 3287 328B 32B9 3290 3291 3292 3293 3294 3295 3296 3297 3298 3299 3300 3301 3302 3303 3304 3305 3306 3307 3308 3309 3310 3311 3312 3313 3314 3315 3316 3317 015532 015534 015540 o i 5544 015550 015556 015562 ;)15566 015572 015574 o t 5600 015604 0156 I 0 015612 015614 015616 015620 015622 015626 01 !J632 at 5634 015640 015G·~2 015646 015654 015660 015662 015664 015666 o 1 ~;t)70 013501 012567 012567 012702 012767 012267 004767 005367 001371 166700 010067 30A ( 1 052) 13-JAN-78 12: 27 PAGE 61 SEQ 0061 004567 000052 000050 015670 000005 000104 000034 000070 000104 BDeN",~: 000014 000004 000100 BDCNV8: BDCNVC: 000000 oeoooo 104006 000205 005067 166701 000036 000034 103403 005267 000024 000772 056701 OE2767 116720 000207 DC 0000 000000 000020 000060 000004 000010 CNVCTR: DIGIT: TENPwR: ADTENP: 000012 00000 1 040 040 MOV (2)+, TENPwR PC, scBTEN CNVCTR BINARY VALUE TO Rl DE5TINATION ADDR TO BDCNVC CHARACTER COUNT TO BDCNVD flADTENP,R2 115,CNVCTR ADDR OF TEN POWER STRING SET UP FOR 5 POWER CONVERSIONS MOVE POWER OF TEN VALUE PERFORM CONVERSION DONE 5 CONVERSIONS? BRANCH I F NOT YET 5. BDCNVA BDCNVD, %0 %O,8DCNV8 R5, BMOVE OPEN OPEN Move 023420 015676 015700 015702 €'( 5) +, Rl (5)+,8DCNVC (5)+,BDCNVD 8oCNVo: OPEN RST04 RTS SUBTEN: CLR SUBTNA: SU8 BCS INC BR SUBTNB: ADD ADD 000000 001750 000144 MoV MQV MOV MOV MOV JSR DEC BNE SU8 MoV JSR 000000 015672 015674 015705 MACV11 PARITY TEST 13-JAN-7812:13 RTS OPEN OPEN OPEN 10000. 1000. 100. 10. ; RE5TDRE REGS AND EXIT R5 DIG I T TENPWR, Rl ; SUBTRACT TEN SUBTNB DIGIT ;BRANCH IF UNSUCE5SFUL SUBTRACTION POWER FROM BINARY VALUE SU9TNA TENPWR, Rl '60,DIGIT DIGIT,(O)+ PC ; RESTORE SUBTRACTED VALUE. ;CoNVERT IDIGIT) TO A5CII ;MDVE ASCII CHAR TO DECVAL FIELD ; EXIT 1. 040 040 040 040 DECVAL: .BYTE 040,040,040,040,04(·,040 3318 i SUBf;OUT I NE TO MOVE A VARIABLE NUMBER OF BYTES BMOVE: 5AV04 ; SAVE REGS MOV (5)+, Rl ;GET FROM ADDRESS 3319 3320 3321 3322 3323 3324 3325 3326 3327 3328 3329 015710 015712 015714 015716 015720 015722 0'5724 0,5726 015730 104005 012501 MOV MOV 001375 MOVS DEC"; BNe (5)+, R2 (5)+, R3 (1 )+, (2)+ R3 BMOVA 104006 000205 RST04 RTS R5 012502 012503 112122 005303 BMOVA: 3330 3331 3332 3333 3334 3335 ;MOVE BYTE ; DECREMENT COUNT ; BRANCH 1 F NOT DONE ; RESTORE REGS AND EXI T ;UNEXPECTED POWER FAIL SERVICE ; BECAUSE WWP MAY BE SET IN MPR j S AND ALL PROCESSOR REGISTERS ;MAY BE IN USE, CONTINUATION AFTER POWER FAIL IS NOT ATTEMPTED. ; INSTEAD, THE PROGRAM RESTARTS AFTER A POWER FAILURE CCMFAFO. MEMORY PARITY TEST CCMFAF. Pl1 13-JAN-78 12: 13 3336 3337 3338 3339 3340 3341 3342 ; GET TO ADDRESS ;GET CaUNT 015732 015740 015744 015750 015752 015756 015762 012737 012701 032711 001002 005071 062701 020127 015776 000566 000001 000000 000010 000766 MACY11 30A( 1052) 13-JAN-78 12: 27 PAGE 62 SEQ 0062 000024 PWRDN: 1$: MOV MOV BIT BNE CLR ADD CMP flPWRUP,@#24 HMPRO, Rl Hl,@Rt .+6 €'( Rl ) #10, Rl Rl,#TREG ; SET UP FOR POWER UP ;CLEAR PARITV REGISTERS IN CASE ;WWP IS SET CCMFAFO, MEMORY PARITY TEST CCMFAF.p11 13-JAN-78 12: 13 3343 3344 3345 3346 3347 334B 3349 3350 3351 3352 3353 015766 103766 015770 010667 000000 012737 015774 015776 016004 015010 016014 016020 015022 016024 016026 016706 005027 005367 001375 104000 01 7344 000167 MACY11 30A( 1 052) 12:27 PAGE 63 SEQ 0063 163264 015732 163250 000000 177772 13-JAN,78 000024 PWRUP: BLO MDV HALT MOV MOV CL~ DEC BNE TYPE MPWRF JMP 163244 1$ SP, SPSAV ; POWER OOWN HALT : SET UP FOR POWER DOWN #PWRDN ,1>#24 SPSAV,SP #0 .-2 .-4 :STALL 50 OUTPUT WON I T BE GARBLED :TYPE RECOVERY MESSAGE RSTART ;RESTART (SP) ,-(SP) '2, (SP) @(SP),(5P) (SP),EMTLlM EMT A ;GET SAVEO PC ; DECREMENT PC BY 2 ;GET CALL : CHECK IF CALL WITHIN LIMITS 3354 3355 3356 ; EMT HANDLER EMT!NT: MOV SUB MOV CMPB BLOS HAL T BR EMTA: ROL BIC ADD MOV JMP 3357 3358 3359 3360 3361 3362 3363 3354 2365 3366 3367 3368 3369 3370 3371 3372 " 3373 3374 3375 3376 3377 3378 3379 3:380 3381 01603:2 016034 016040 016044 016050 0' 6052 016054 01 G05G 016060 01606-4 016070 016074 162716 0, 7616 121667 101402 000002 000000 000050 000000 000776 oe6116 042716 062716 017616 000 136 177001 016076 000000 016076 016100 016102 016104 3383 016106 3384 3385 016110 104COO 001114 104001 016356 10':;002 013562 104003 013442 104004 013364 104005 016122 lC~OO6 3386 33B7 3388 016112 3389 016114 016116 016120 016122 016126 016132 o t 62 ~ 0 104007 016236 104010 016142 000010 012666 012666 012767 177764 177764 000002 CCMFAFO. MEMORY PARITY TEST 13-JAN-781.2:13 CCMFAF. P11 3399 3400 3401 3402 3403 3404 3405 3406 3407 3408 3409 3410 3411 3412 3413 3414 3415 3416 3417 3418 3419 3420 ; CALL .-2 ( SP) #177001,(SP) #EMTTAS, (5P) @(SP),(SP) @(SP)+ IS NDT WITHIN LIMITS ; EMT ARG X 2 ;REMOVE 7 MSB ; FORM EMT RTN ADDRESS ;GO TO EMT RETURN : EMT DEFINITIONS AND ASSIGNMENTS EMTT AS: TYPE:-EMT+EMTX $TYPE SCOPE=EMT+EMTX 5COPEC ERROR=EMT+EMTX ERR ERRORP=EMT+EMTX ERRP ERRORS:: EMT +EMT X ERR5T SAIJ04=EMT+EMTX 51J04 RST04=E.MT+EMTX R504 RS T05S=EMT+EMT X RS05S SAV05S= EMT +EMT X SV05S EMTLlM: EMTX-t 016076 3382 3390 3391 3392 3393 3394 3395 3396 3397 3398 01 1646 000040 MACY11 ;SUBROUTINE TO SAVE REGS 0-4 SV04 : (SP)+,-12. (SP) MOV (SP)+,-12. (SP) MOV MOV #RT! ,SV05l 13-JAN-78 30A(1052) 000411 016142 016150 012767 000400 000240 016152 016156 016162 01 G 1 64 0161E6 016170 016172 016174 016176 016200 016202 016206 012666 012666 010546 010446 010346 010246 010146 010046 0:24646 000002 016605 000002 177762 177762 016210 022626 012600 012601 012602 012603 012604 016646 0, 6646 OCOO02 000020 PAGE 64 SEQ 0064 BR 016140 12:27 ;MOVE PC+PS uP STACK 000030 SVOSB ; SUBROUTl NE TO SAVE REGS 0-5 + PLACE EMT SVOS', . MOV #NOP,5V05C SV05A BR ; suBROUT I NE TO SAVE REG5 0-5 (SP)+,-14.(SP) SV05A: MOV MOV (SP)+,-14.(SP) MOV RS,-(SP) MOV R4,-(SP) SV058 : MOV R3,-(SP) R2,-(SP) MOV R1 ,-( SP) MOV %O,-(SP) MOV -(5P) ,-(5P) CMP 5V05C: RTl 16. (SP) ,RS MOV RTl PC IN RS ; RTI OR NOP ; EMT PC TO RS 3421 3'122 3423 3424 3425 3426 3427 3Ll28 3429 3430 3431 3432 3433 3434 3435 3436 3437 3438 3439 3440 3441 3442 3443 3444 3445 3446 3447 3448 3449 016212 016214 016216 016220 016222 016224 016230 016234 016236 016242 016244 016246 016250 016252 D162!14 016256 016260 016264 016270 010566 022626 012600 177764 177764 000020 012601 012fi02 012603 012604 012605 016646 016646 000002 177762 177762 i SUBROUT I NE TO RESTORE REGS 0-4 (SP)+, (SP)+ RS04 : CMP MDV (SP)+,%O (SP)+, R1 MOV MOV (SP)+,R2 MOV (SPj+,R3 MOV (SP)+,R4 -12. (5P) ,-(SP) MOV -12.(SP),-(SP) MOV RTl ;SUBROUTINE TO RESTORE REGS 0-5 RS05S: RS,16.(5P) MOV (SP)+, (SP)+ CMP MOV (5P)+,%0 MOV (SP)+, R 1 MOV (SP)+,R2 (SP)+,R3 MOV MOV (SP)+,R4 MOIl (SP)+,RS -14.(SP),-(SP) MOV -14. (SP) ,-(5P) MOV RTI ;MOVE PC+PS DOWN STACK ; SET EMT PC TO RS 3450 3451 3452 3453 3454 ROUTINE TO LOOP THR'J A SINGLE I NSTRUCT I ON TEST LOAD THE STARTING ,~DORESS OF THE TEST YOU wI SH TO RUN (THE ADDRESS OF THE TEST XX TAG) AT THE 1ST HALT. SET SWITCH REGISTER CCMFAFO, MEMORY PARITY TEST 13-JAN-78 12: 13 CCMFAF. P1 1 3455 3456 3457 3458 3459 3460 3461 3462 3463 3464 3465 3466 3467 3468 3469 3470 3471 3472 3473 3474 3475 3476 3477 3478 3479 3480 3481 3482 34B3 3484 3485 3486 3487 3488 3489 3490 3491 3492 3493 3494 016272 016276 016300 016306 a! 6314 016316 016324 016332 016334 016342 016344 016352 005037 000000 017767 062767 000000 MACV11 30A( 10S2) 18-JAN-78 12:27 PAGE 65 SEQ 0065 177776 162574 000002 000154 000146 012767 032777 001404 177777 01 Dono 16::!164 162546 042737 000403 052737 000177 000020 177776 000020 000104 177776 016356 016364 016366 016374 016376 016402 016404 0' G~11 a 032777 040000 162514 032777 001021 004000 162504 005767 173350 001416 005767 162100 016412 016 120 0.26767 100007 000042 016422 000032 016426 016430 016434 0,6440 016444 005267 022606 012677 000177 005067 005067 0161150 016454 000002 ;OPTIONS AT THE ; NOTE THAT 5Wl1 TESTX: CLR HALT MOV ADD HAL T MOV 81 T SEQ BIC BR SIS JMP lNDHALT. MUST BE DOWN AFTER THE 2ND HALT ~NPS WAlT FOR STARTING ADDRESS LOAD START! NG ADDRESS IN RETURN ADD 2 TO POINT TO INSTRUCTION AFTER SET SR OPT IONS SET FLAG CHECK SW12 BRANCH IF NOT SET CLEAR TRACE 81 T SKIP NEXT INSTRUCTION SET TRACE 8IT JUMP TO TEST SWR 8NE SCOPE8 #4000,@lSW'R 8IT BNE SCOPEG TST PASCNT BEQ SCOPEG TST TSTX SCOPEB BN" CMP ICNT,IMAX BPL scoeEG INC ICNT SCOPEB: CMP (6)+,%6 (6)+,@PS MOV @RETURN JMP SCOPEG: CLR TSTX CLR ICNT MOV @%6,RETURN RTI IMAX: 100 ICNT: 0 RETURN: 0 snup 001020 001006 L 011667 o 16~56 000100 016460 016462 000000 000036 161342 000022 162044 000010 000006 000000 T 64 TIMES AND IMAX TEST SR mR SCOPE YES. SCOPE NO-TEST FOR ITERATION INHIBIT ITERAT ION FIRST PASS? YES. INHI8IT ITERATIONS USING SINGLE SUBTEST STARTUP? YES, LOOP COMPARE CURRENT COUNT TO MAX NUMBER EXIT-DONE INCREMENT COUNT REPOSITION STACK RESTORE PREVIOUS PROCESSOR STATUS REPEAT HST IF USING TESTX STARTUP, RETURN ;a NORMAL FLOW C LEAR COUNT SAVE SCOPE RETURN POlilTER RETURN lt~L!NE-NEXT TEST ITERATION COUNT COUNT LOCAT ION FOR ITERATION LOOP ADDRESS OF LAST TEST 3495 3496 3497 3498 3499 3500 3501 3502 3503 3504 3505 3506 3507 3508 3509 3510 016464 015464 016472 015500 016505 016510 016515 016517 016524 016526 016534 CCMFAFa. 041520 020075 020040 020040 020075 020040 020040 052116 020040 000 040 020040 020040 MICNT: .ASCIZ 046440 051120 MSTR: .ASCII 020040 050115 020040 020122 MTREG: .ASCII 020075 020040 020040 PARITY TEST 13-JAN-78 12: 13 3511 3512 0' 6542 3513 016556 3514 3515 3516 3517 3518 35' 9 3520 3521 3522 3523 016561 020040 015 016566 020040 015574 016602 051505 036503 040 3524 3525 3526 3527 3529 3529 3530 3531 3532 3533 3534 3535 3536 3537 3538 3539 3540 3541 3542 3543 3544 3545 3546 3547 3548 3549 3550 3551 3552 3553 355 4 3555 3556 3557 3558 3559 3560 3561 3562 3563 3564 3565 3566 041511 MEMORY CCMFAF.Pll 016550 016605 016612 016613 016020 016621 01 G626 01 G627 0;6634 016635 0'6642 0' 6645 016652 01 G660 016665 016674 016702 016706 016714 016722 016730 016736 015'141 0.6746 01675~1 0'16762 016770 016775 017002 017010 017016 017:"24 017026 017034 017042 017050 017056 017064 017072 017074 017102 017110 017116 017124 017132 017140 0' 71.l4 017151 017'54 017157 ; ASCII MESSAGES MEO: MTNUM: • ASCI! <15><12> I pc= MPC: .ASCII ICNT= 005015 0·10504 020040 040 040 040 040 040 040 040 040 020040 015 051440 044524 020054 020123 052516 005015 042504 040440 051523 051123 015 046440 020131 040524 020040 000 020012 020040 020124 040 020040 MDAT A: • A5CIZ MSTRX: • ASCII 020040 <15><12>1 TEST LOC= MSTRX1: • ASCII 5/B: • ASCII MSTRX3: • ASCII 040527 035123 020040 000 051412 020122 047117 051120 047503 000105 042523 044526 042104 044440 000 051412 046505 020040 MSTRX5 : .ASCIZ 052105 050117 000123 051505 052116 MSETSR: • ASCIZ MCON: .ASCIZ 020124 042503 042522 020116 MMDE, : .ASCIZ <15><12>tSET DEVICE ADDRESS IN SR' 052105 051117 052123 044440 000 052105 MMADR: .ASCll <15><12>! SET l'l1EMORY TEST MMPAT: .ASCIZ <15><12>ISET TEST PATTERN MMPRS: • ASCIZ <15>< 12><12> 1 MEMORY PARITY REGI STERS PRESENT: 1<15><12> MTMAP: .ASCll <15><12>'PARITY REGISTERS CONTROL MEMORY AS: 1<15><12> MTYCOR: MDASH: MeR: • ASCI Z .ASCIZ .AseIZ .ASCIZ 042524 046412 05'[ 117 020131 044522 OS~1524 046505 040520 051040 051511 042524 ()SOO40 042522 006472 052116 040520 051040 042524 047117 046440 0.20131 000012 020040 000040 000 000 WAS: <1S><12>rSET 5R OPTIONS r PRESS CONTNUE I LOC IN SR' IN 5R' 020124 047" 1 .ASCII 051105 051440 020116 113 PAGE 66 052040 000122 005015 i" 12:27 , 047514 0:20040 052124 O·~61 13-JAN .... 78 020040 020040 040520 051117 006472 020040 055 005015 MPR DATA= SEO 0066 035102 041517 051123 051412 051505 0·D505 051522 042523 000012 005015 054S24 051511 041440 30A I 1052) 020075 020040 027523 020116 015 052C40 046040 MACV11 MPR= 044522 043505 051522 051124 046505 051501 000 MK: <15><12> 'K' CCMFAFO, MEMORY PARITY TEST , 3-JAN-78 12: 13 CCMFAF. P11 3567 3568 3569 3570 3571 3572 3573 3574 3575 3576 3577 3578 3579 3580 3581 3582 3583 3584 3585 3586 3587 3588 3589 3590 3591 3592 3593 3594 3595 3596 3597 3598 3599 3600 3601 3602 3603 3604 3605 3606 3607 3608 3609 3610 3611 3612 3613 3614 3615 3616 3617 3618 3619 3620 3621 3622 0'7,61 017166 017174 017202 017210 017212 017220 017226 017234 017242 017244 017252 017257 017264 017272 017300 017306 017314 017322 017330 017336 017344 017352 017360 017363 017364 017372 017400 017401 017406 017410 017416 017424 017432 017440 017446 017447 017454 017462 017~66 017474 017502 017510 017516 017524 017532 017540 017546 017554 017560 017566 017574 017602 017603 017610 017616 116 044522 046505 047506 000012 047516 052111 051507 047506 017624 017632 017636 017644 017652 017660 017666 017670 017676 017704 017712 017720 01,'726 017731 017736 017744 017752 017760 017766 13-uAN-78 12: 27 PAGE 67 SEQ 0067 020117 054524 051117 047125 040520 046440 020131 006504 MT: .ASCIZ 'NO PARITY MEMORY FOUND I <15><12> 050040 020131 042524 047125 051101 042522 020122 006504 MTR: .ASCIZ 'NO PARITY REGSTER FOUND'<1S><12> 020040 005015 005015 04311 5 051515 030501 043115 020120 054524 051117 052123 047520 040506 000 020040 000 005015 043101 030461 026461 030461 040520 046440 020131 000123 042527 046111 047105 051523 020104 036440 000012 020040 020040 177 041503 020060 046454 026120 046055 044522 046505 042524 005015 020122 042105 007 005015 040520 040 040 OC0040 006415 050040 052517 020116 020040 000 015 051511 052101 DO 50 i 5 047524 046114 041040 052 t 23 043040 020116 051531 0·17503 C51514 005015 051105 052123 000 015 050040 020131 041440 052105 005015 051105 042526 041040 000061 020040 020040 042522 052111 044507 005015 040 020040 051517 052111 044507 005015 017772 000001 MPRAD: • ASCIZ MTIT' .ASCIZ <177><15><12><15><12>' CCMFAFO MS1'.MA"-P,MF"-LP PARITY MEMORY TESTS' MPWRF: .A~~IZ <15><12> I POWER FAILED' MPGEND: • BYTE .ASCI I 007 <15><12> I END PASS· 1<15><12> , 020040 020040 MPCNT: .ASCIZ 041012 051101 042116 047514 020040 042101 043040 044440 020103 020040 MPSER: .ASCI I MPSERI : .ASCIZ 051012 042524 000040 047515 020122 047040 020105 051117 051117 045470 042524 052116 000040 047514 020123 051117 043505 020122 MXl : .ASCIZ <15><12>'REGISTER AT .ASCIZ <1S><1.2>'MONITOR WILL NOT BE RESTuRED FOR AN 8K SYSTEM' MX2 : • ASCJ.Z 042101 042522 042105 LDRMSG: .ASCIZ <15>< 1.2> I LOADERS RESTORED' 041012 051101 041523 042101 052111 047101 PSMSG: .ASCIZ <15><12>IBAD PARITY SCAN COMPLETE ' CCMFAFO, MEMORY PARITY TEST CCMFAF. Pl1 1 3-J AN-78 12: 13 3623 3624 3625 3626 3627 3628 3629 3530 3631 3632 3633 3634 3635 3636 3637 3638 3639 3640 3641 3642 3643 30A( 1052) MACY11 044516 0445:27 052117 0425.22 042105 040440 051440 000115 047522 MACY11 NOMON: 30A( 1 05-2) <15><15><1.2> I BAD PAR FOUND IN LOC I , , CONTROLS 13-vAN-7S 12:27 PAGE 68 SEQ 0068 04G517 000105 047514 020123 020104 04710' 046120 042101 040523 047111 020113 MLDRSV: .ASCIZ 020040 020055 050040 020131 052123 000 020040 026440 000040 020131 052123 000 020040 047503 051101 042522 051105 MPRCOR: .ASCIZ - CORE PARITY REGISTER ' <15><12> 020040 046440 0511 01 042522 051105 MPRMOS: .ASCIZ - MOS PARITY REGISTER ' <1S><12> • EVEN .END <15><12> I LOADERS SAVED IN BANK l' CCMFAFO, MEMORY PARITY TEST CCMFAF. Pl1 13-JAN-78 12: 13 ADRPT 000516 ADRS ADRTYP ADT ENP AE 077400 001230 BDCNV BDCNVA 015524 BDCNVB BDCNVC 8DCNVD BEGIN 8ITPT 015670 000001 015556 015610 015612 015614 002106 000520 BITO 000001 BITl OGDO 02 81 T 1 0 BIT 11 002000 004000 010000 BIT 12 6l T 13 425. 1932 364# 660N 3283 362# 2163 2782 3285# 3290* 3281 .. 3282* 692 426# , 901 *' 2606", 2728* 34611 347# 040000 100000 36111 000004 348# 000010 BIT4 8115 BITS DCOO2D 000040 000100 349# 35011 351/1 35211 B I T7 000200 353# 354# BI T8 81 T9 001000 355# B\-1QVA 015720 Br-1OVE 015710 CACHE CACHF l 001224 332411 3291 658# C!\6f\O CLRPAR 001222 010600 014012 II< 1673* 168O. SEQ 0069 1687 16B9 1712 1802* 2763' 2777 2822- 2655~ 2668 2696 2701· 2702 :2711* 2741 '" 12B3 1'?35 1498 1599 1698 1812 1674 1913 3309_ 1040 2315 2797 3288 3292# 3293# 3289 806 822· 1905 2608* 2730* 1902_ 1904* 1911· 1916 1919 1939 1988 1986 2128 2145 1789* 1790 2107* 2692 1793* 2101 .. 2690 2179 2707 1799>1< 2262* 2710* 2597" 3278. 3294. 815# 1668 1907 2615 2738 2575 1670'" 1912* 2626* 1676 2002 2634 1681* 2089* 1682 2098 2633* 2638 2649* 2764* 2777 2808* 28:23'" 2831 1273 2304 1308 2324 1402 2416 1468 2519 1571 2549 1663 2750 1705 2954# 3106 1821 3147 1089* 1143* 1272* 1307* 1401 * 1467* 1570* 1899 2712 >I< 35711 81 T 14 BIT 15 BIT2 81T3 OOO~O0 1611 30A ( 1 052) 13-JAN~78 12:27 PAGE 70 CROSS REFERENCE TABLE USER SYMBOLS 356# 358# 359# 360# 020000 MACY11 657" 2320 966 191 B 2901 402 1356 1441 1371 2567 983 3326 3320# 8' 8* 737* 910* 81S 908 233111 999 1 090 ,,44 1925 2087 2275 1781 3191 OH16 0.117 007314 010206 [N"v'eTR eN16 CONT 015662 00"i334 011712 cmiTIO OO~~274 CON T 1 2 005024 cmn13 CONT3 (ONT 4 COUNT DDlSP DECVAL DIGIT DISPLA 005304 002616 003:)74 004336 177570 015702 015664 001102 205211 2157 2239# 3284", 1980 2561 1344 '510 1609 971# 3287* 2063# 2567# 3306# 1350 1552# 1644# 987 1062 1351* 616 331411 3300* 1381 Ii 1052# 1337* 367# 3279 3297* 616# CCMFAFO. MEMORY PARITY TEST CCMFAF. Pl1 13-JAN-78 12: 13 orSPRE DONE 10 DONE 11 DClNE12 DONE 13 DONE 14 DONE 15 DO~E 16 DO"JE 17 DOI'JE20 DONE4 DCI>.lE5 DONE6 DO"1E7 OS'NR EfliT A Dor~E E~,~TINT E!'r1T LIM EMT T AS EMTX ERR ERRA ERRA 1 ERr~A2 ERRA3 ERRA4 ERRA5 ERRS E.RRBX ERRC ERRD ERROR [RRORP" ERRORS = ERRP ERRST EX F Tl T LE Grl'1PRA Gr\~PRB GMPRC Gr'/lPRQ HI ADR HlltJORD leNT IMAX I NDCO INDC1 INDC10 INOC11 000174 011624 004322 004542 005040 005320 005616 006262 OCG650 007576 010564 003140 003322 003662 003774 177570 016056 016032 016120 016076 000011 013562 013t::04 013632 013634 013644 0' 3646 o t 3656 013560 013662 013666 013710 104002 104003 104004 013442 013364 005460 000512 001564 002D12 002020 002054 000530 0005S2 o 161160 016456 000770 000772 001014 001016 732* MAC V 11 1071 1078 1391# 3303* 832* 3304 884* 330711 963* 30A( 1052) 13-JAN-78 12:27 PAGE 71 CROSS REFERENCE T A8LE -- USER SYM80LS 1661 .. ,777* 1897* :208:2* 2083* 406# 732 2270 1387# 2273 2540 2547# 3376. 2375 2901# 2906# 290711 291011 291111 2914# 2896* 2868* 3378# 2389 2266 1323 1419 1485 1584 1685 1796 191 S 2104 2324# '013 1103 1156 1282 366# 3362 397 3361 3367 3373# 2336 2856 2284* 2285* 2286* 2287* 2289 .. 2844* 2845* 2902 2903* 850 1195 1445 1755 2244 2020 1736 286611 2844# 1677 423# 766# 764 792 802 430ft 440'// 2910 397* 2303* 2415* 3380# 2396 3382# 2461 3384# 2468 SEQ 0070 145511 155711 164911 1707# 1823# 1925# 2116# 2362 1079# 1131 # 1262# 128811 615 3365# 3358# 3392# 3373# 3374 2357 2892 2531 '" 2532* 2533* 2534* 2535* 2866* 2846* 291811 2904* 864 1213 1491 1836 2816 2046 1759 3381 3383 1679# 700 798 793. 795# 80511 1687* 2653'" 3482 820* 885* 556# 557. 566# 567# 763 2906 922 1230 1503 1871 3144 3380# 1855 743 1688* 2688 3484* 998* 834 3386# 2482 3388# 2499 3390# 2509 3392# 2898# 3379 111 1 1359 1613 2176 1125 1375 1622 2183 1165 1424 1638 2199 1991 2168 2445 291511 2869* 2899* 2900* 2916# 2924. 932 1240 1514 1972 3236 1027 1258 1522 1999 3378# 1046 1290 11:)37 2005 1056 1 ~·27 1545 2029 1063 1341 1591 2057 1074 1347 1603 2149 1875 2232 3382# 1 i 22 2732* 3493# 3482 907 1916* 2757* 1917* 2810 1921 2066 2824* 3492# 1007 1316 1409 745* 1691 2705 3489* 1662'" 887 1475 1181 1438 1718 2108 CCMFAFO, MEMORY PARITY TEST CCMFAF. Pl1 1 3-J AN-78 12: 13 I NOCl 2 1 NOC 13 1 NOC14 INDC15 001020 001022 001024 11'JDC2 000774 000776 001000 001002 001004 001006 001010 001012 010060 004164 004172 001250 001252 001026 1NOC3 INOC4 I rJDC5 1 Noe6 INDC7 I NDes INllC9 11~OX17~_ 1 NS T 1 INST2 KI>ARQ KPAR1 KPAR2 KPAR7 !';PDRO KPDRl KPDR2 KPDR? K T 5 T AR LDRMSG LDiiSVD LOCA TM LOCA T 1 LOGICA LOOP10 LOOP11 LOOP 12 LOOP 13 LDDP14 LOOP 15 LOOP21 LOOP4 LOOPS LOOPS LOOP7 lOP15 LO?4 LOPS LOP6 LOWF LG LSAV LUP10 LUP11 LUP12 lUP13 LUP14 LUP16 LGP7 MAPMA MAPMB 001254 001256 001240 001242 00124>-l 001246 001226 017560 014416 014126 014224 011672 004066 004416 004632 005124 005436 006106 011250 002762 003216 003372 003734 006116 002770 003224 003400 000554 014300 004060 004402 004616 005116 005446 006526 003726 01' 770 012162 r.~APRB r,1APRC ;t\,l\.PRD Ml\.PRE M:'.PREG MAPl MeON ;"CR MDASH MDAT A fll!::.f',iH f,1EML r/1EMUT MED MICNT MK MLDRSV MiMDR M.',lOEV Mr.1PAT MI'IIPRS MONCNT MPC MPCNT MPGEND MPRAD MPRCOR MPRMOS MPROK MPRO MPRl MPR10 MPR11 MPR12 MPR13 MPR14 MPR 15 MPR2 MPR3 MPR4 MPR5 MPR6 MPR7 MPR8 MPR9 MPSER MPSER 1 MPloJRF MSETSR MSTR MSTRX MSTRX1 011756 012346 012446 012546 012642 012304 014062 016666 017154 017151 016550 001065 001064 000546 016464 01651 {J 017157 017636 D 16741 016706 016775 017026 011754 016472 017401 017363 017244 017670 017731 000542 000566 000576 000706 000716 000726 000736 000746 000756 000606 000616 000626 000636 000646 000656 000666 000676 017410 017440 017344 016645 0165 t 7 016561 016605 30A(1052) 13-JAN-78 12:27 PAGE 72 CROSS REFERENCE TABLE -- USER SYMBOLS SEQ 0071 568# 56911 57011 57111 558# 559# 560# 561 H 562ft 563# 564# 56511 2097* 1339# 1345.11 668# 669# 3208 670# 671,/1 66411 665# 666# 66711 659# 3082 3052* 1014 3000 81 I 1319# 1411 1477 1581# 1672 179011 2454# 1008# 1098# 1151 # 1279# 179211 1010# 1100# 1153# 441 II 3025* 1317# 141011 1476# ,578# 1676# 1900 127711 2589# 2585 CCMFAFO, MEMORY PARITY TEST CCMFAF. Pl1 13-JAN-7812:13 MAPMEM MACY11 707 2660# 2679# 2682 2706 968 1003 353111 2806 2791 2854 597# 596. 438# 2914 2911 2804 751 3539# 3534# 354411 760 257711 2907 2553 2556 2770 777 786 4361/ 47811 1577 2142 2957 492# 518# 522# 526# 530# 53411 53811 486. 49011 494# 498# 502. 506# 51011 514# 3134 3131 3352 3528# 2844 2868 2882 2109* 1364 1367 2979* 1785* 218111 1792* 2094* 2718 2726* 3065 1158 3013# 1324 2100* 2229 2600* .2740* 1420 1487 1586 2991 # 2095* 2103 2105* 3015>10 3164 3171 * 31 eo. 3188- 2978* 2975'" 2976* 2977* 2650* 3616# 3059# 1104 3006 2560' 1331 1415# 148111 1595 1674# 1794 2477 1012 1102 1155 1287 1822 1031 1115 1169 1786* 3026 1322 1418 1484 1386 1427 1494 1647 1683 180Q 1454 1555 1297 , 055 1130 1261 179~ 1797* 302~# 1583 1706 190411 1281 2621 # MAC'{11 967 2704 2700# 2708 2648# 1094 3565. 3564# 2878 2596,.: 2271 2598* 3500# 3505# 356611 3625# 30A(1052) 13-JAN-78 12:27 PAGE 73 CROSS REFERENCE TABLE -- USER SYMBOLS 2585# 2714 SEQ 0072 2742 271511 1148 1312 1406 1472 1575 1783 2091 3512# 2609 2595* 2609* 2625* 259B 2615* 2731 2624* 2648* 3178 2638* 2712 2648 2731 '" 3124 2738 3175 906 1808 2347 973 1845 2366 1006 1863 2429 1097 1936 2444 1150 1948 2452 2591 2723 2975. 3168 1276 1964 2660 1315 1983 2671 1408 1990 26:'9 1474 2125 2753 3549# 3502# 3595' 3591 H 2775 780 789 761 '" 762 1693 2160 3109 357711 3630# 3636# 791 ,., 833 1726 2167 805 886 1747 3193 2311 3337 3227 3221 3588' 3597. 3223 3225* 2866 3514# 3518# 3507. 36010 CCMFAFO. MEMORY PARITY TEST CCMFAF. Pl1 13-JAN-78 12:,3 MSTRX3 MSTRX5 MT MTIT MTMAP MTNUM MTR MTREG MTYCOR MTYFG MXl MX2 NOKT 016621 016635 017161 017257 017074 016464 0'7212 016526 NOMON NOP NOREG NRALL OACOST OACNT OACNV 017466 000240 002062 013712 015520 015522 015416 OACNVA OACNVX OODFLG OPEN OUT PARPAT PARVEC= 015440 015516 000556 000000 010330 001036 000114 017144 000562 017447 017546 000550 2886 2890 3567# 749 2752 3501# 80B 2850 2784 445_ 2173 2787 439N 1558 2834 371# 807# 1002 016426 016356 016440 000534 013344 001260 177572 START START 1 STKPT = SUBTEN SUBTNA SUBTN8 sv04 SV05A SV058 SV05C SWR 001436 001632 0005 I 0 015622 015626 015642 016122 016152 016164 016200 016142 0011 00 SWREG TBANK TEMP TEMPX TENPWR TESTX TESTI TEST10 TESTll TEST12 000176 000544 000560 000514 015666 016272 002154 004016 004340 004554 SV05~ 1131 2589_ 1145 2621' 1262 2715 1309 2994 1387 3013 1403 3102 1455 1469 1311 1471 1574 1782 2090 2590 2722 2929N 3167 2848 2852 2872 2876 2880 2884 2888 2905 2909 3264. 1945 2916 32651955 2924 32662063' 3249 3267+ 1933- 3271# 2133 3292 22503293 2426. 3271 3294 2437 3306 2514' 3307 3308 1801 2305 1042* 1649* 1079* 1274* 1664_ 1707- 1275' 1788_ 1288' 1824' 13361898- 1366_ 1926- 138,. 208S- 14952117- 1531' 2310- 1557' 2325- 2550- 2552 2576. 3478 1798 1665 1798' 2301 3247 2106 1674 20962335 345732063090N 31e5' 1905 2106_ 2374 3467_ 3220 2096 2268 2388 3486- 2395 2413 2460 2467 2481 CCMFAFO. MEMORY PARITY TEST CCMFAF. P11 13-JAN-78 12: I 3 SCOPE8 SCOPEC SCOPEG SH08E SMLSYS SPSAV SRO 1091 2084 1405 3272# 708 3158N 3123 3103 3184 3172. 3173. 710 3177 3176 686 3336 447# 572N 575' 104001 1147 lOBO 1778 982* 3263* 014514 576N 815* 414 410 3066 3295 3388' 3387 3389 673N 674. 675' 676. 677. 678. 819 3047 3278 3390N 412 70611 703 655, 831 1896 3475 2302 3477 433N 1667 672. 382. 1093 1000 165C 3563. 3273N 2768 3128* 001266 3603' 3614' 711 1572 3606N 3404 2802 964 3262* 015020 00 I 270 001272 001274 014302 014400 104005 104010 001356 001400 001404 00 1220 722* 3268. 2551 3255N PSAORS PSCAN PSCANH PSCANX PSCANI PSCXl PSLOOP PSLUP PSMSG PSNXT PSXTST PWRDN PWRUP RELOC RESRVO RESVC R2SAV 3509. 2799 684* 3258* 685663' 66,. 365N 602. 600N 604N 368' 2498 R3SAV R4SAV R5SAV SAVLOR SA V LOX SAV04 = SAV05S= SCAN SCANA SCAN8 SCNFLG SCOPE = 3572_ 2874 2789 3258 784 3219 3269 3259 01 I 752 001236 001232 100000 001072 001070 001074 177776 001034 016462 001276 014420 014510 104006 ~ST05S= 104007 RS04 016210 RS05S 016236 ROSAV 001262 R I SAV 001264 3579' 355SN 3256* PASCNT POREND PORTAS PERR = PMEMH PMEMl PMEMX PS RESVM RETURN RST ART RS T LOR RSTLOX RST04 = seQ 0073 3522# 3526# 3257. 775 3129 3259N 3255442# 372N 1910 582N 381# 1596* 2547. 015022 014762 015024 015136 015060 015064 017603 015110 015144 015732 015776 000564 001030 001032 13-JAN-78 12:27 PAGE 74 MACYll 30A( 1052) CROSS REFERENce TABLE -- USER SYMBOLS 2915 2274N 1686 103916327232942 2936 1284 972· 971· 1787689' 2508 3130 1740 3170'" 3147# 3164' 31e8' 3187 3182 3620N 3180N 3179 724 3346N 2651' 841* 977. 976* 1790 2274. 2520 3157# 1764 3173 3189 3204 3190. 3336# 2721. 843. 3205· 1879 3183 2122* 1787 2098 2356 3465' 3218. 3346 2733848 2734 854 2740 860 841 MACY11 30A( 1052) 13-uAN-78 12:27 PAGE 75 CROSS REFERENCE TABLE USER SYMBOLS 843 2283683N 20el 3076 3327 929 34593353 3065' 308'3N 3386N SEQ 0074 3460- 3468 3487 3490. 3494. 1088 1142 1271 1306 1400 1466 1569 1660 1776 13890 1457* 1560' 1652* 1823_ 2116- 2586 2612_ 2536 2538' 2567 2901 2920 3135 3228 2709- 2720' 3424' 3437# 3034N 3054. 3320 3384. 699' 803 707# 715 704* 883 2080 3481 2414 3479 706* 962 2258 3485. 2521 3483 800 996 3376N 3377 3488N 3474. 1934* 2123* 2427· 2685 3347 1082. 1133* 1264- 2980* 3165 2831' 3344_ 2727. 713* 2736· 408 70S 373N 3286 3298_ 3299 3385 3405 3399 721# 744 683 3297# 330 I 3302N 3396' 3408N 341 In 813 747 699 3398* 3404* 3417# 3391 615' 3459 407. 437# 444. 424. 3285. 3457# 815 1289 1390 1466. 3404_ 729 3463 731 2594- 774* 3298 831# 130S# 1400# 759_ 721 2548 731 *347 ; 983 3476 2289 2291 * 2600 2605. 2610 2652_ 2667 776 3302 783. 3308. 7G5 2767_ 2769 CCMFAFO, r-t1EMORY PARITY TE.ST CCMFAF,P11 13-LlAN-78 12: 13 HST13 TE5T14 TEST 15 TE5T16 TE,ST17 T ES T2 TE5T20 TE5T21 T E5T3 T[5T4 T[ST5 TES T6 HST7 TMAP TMAPA TMAPB TMAPC TMAPD TMAPEX TNUM t I TPB T PCQRE T PCORX T P5 T RDATA TREG 005060 005340 006014 006462 007360 002326 010452 0'1054 002564 002712 003160 003334 003674 013020 013034 013140 013226 013272 013342 000022 001106 005626 006276 001104 000540 000766 TRFLG TRP10 1 RP lOA 1RP12 TRP13 TRP14 TRP15 TRP16 1RP16A TRP17 TRP17A TRP20 TRP4A 1 RP48 TRP4C TRP7 T5HOC TSTX T5110 IST11 IST12 T5T13 CCMFAFQ, 000522 004202 004252 004724 005214 005734 006402 007076 007102 007762 007766 010720 003110 003116 003124 004004 000532 000510 004104 004434 004650 005140 1660,Jf 1708 1679 1927 883. 2283 2326 177611 1780 TYFLG TYPE TYPSAX TYPSBX TYPSX \'JAS ~'JWP IojliiP16 \I!l'iP16A li)WP17 \-,,'\";P17A \>H~P21 1>J',\lP21 A XF R1 XFR2 $ENDAD $ FILLS $NULL $T PFLG $TYPE 003240 003414 003750 000526 000524 104000 015402 015412 015364 000536 000004 006666 006704 007614 007632 011110 011124 010252 011520 011702 001111 001110 001112 001114 017772 1825 1896# 208011 2293 2413N 2301H 96211 965 10B8# 1142# 1271 # 981 2754. 2776. 2778 2780 2756 824. 1272 177811 618# 1700 1811 617# 435. 543. 1417 427# 1336 1366 1495 1596 1664 1788 1898 1984. 2088 21611'1' 2310 1032 1039 1042 1274 431# 373 1318 1413 1479 1579 MEMORY PARITY TEST 13-JAN-7812:13 005510 006162 003002 SEQ 0075 2263 99611 2750N 2766 2809 2794. 2793 1675 1791 1009 1099 1152 1278 429# 428' 709 2790 3245 3243* 2913 43411 36311 1951 1923 1935# 2114 212411 L425# 2428# 2086 2524' 400 620' 619# 621# 624. 394. 842 1132 1388 1621 1865 2064 2269 2568 3143 2815 2825 2821 2795 280B. 833' 1307 1898. 2514* 884 1308N 2083 90 . 2853 847* 1582 1869 2055 2346* 2506 2572 2871. 848* 1698 2779 2826H 832 1273' 1897 647· 885H 1401 2084' 963 1402# 2303 964. 1467 2304' 997 1468# 2415 998. 1570 2416' 1089 157,. 1090# 1661 1143 1662# 1144# 1777 979 1753 1101 1758* 1997 2193 2458 2871 1154 1815 2011 '" 2206 24732873 1280 1843. 2014 2222 2476 1321 1851 2027 22402479 3116 171211 1829' 645 2847· 797 1483 1862* 2053· 2317 2504* 3342 2758* 1351 II 1369N 1511# 1610# 1746# 1862# 1983' 1989 2160# 2166 2365N 1056' 1063# 1072' 1290" 2870* 422' 1324# 1420' 1487' 1586# MACV11 CCMFAF. Pl1 TS114 T5T15 TST4 TST5 TST6 TST7 TYCOR 30A{ 1052) 13-JAN-78 12 :27 PAGE 76 CROSS REFERENCE TABLE -- USER SYM80LS 1569# 1854* 2037 2242 2489 3199 '1' MACY11 1686# 1801# 1014# 1104# 1158# 1283# 2762* 2760* 748 2801 3247# 3244 3243N 1715* 1033 1968 2877 874 898 941 1724* 173~ 1735. 1746* 1953 2165 2372 2681 1970 2131 2353 2665 1943 2147 23652677 1988 2174 2450 2847 2781 '" 2794 2796* 3462- 3480 1874* 876* 2169* 2435 2755 1992* 2189* 2453* 2849 .29~9 2881 688* 742* 3488< 30A{ 1052) 13-JAN-78 12: 27 PAGE 77 CROSS REFERENCE TABLE -- USER SYMBOLS SEQ 0078 2776* 2792* 750 2803 2783 2807* 759 2805 2798 2812 779 2833 7S(: 3081 807 3133 2555 3226 2751 3351 2772 3374' 2774 2786 2788 3249# 3250 1716 1116 1986 1833* 1120 2128 1834 1206 2145 2017* 1233 2163 2196 ... 1332 2433 2889 1430 2448 : 496 2663 1527 2674 1597 1629 1939 405# 904 1221 1456 1678 1938 2162 2341 2716 3339 40911 921 1229 1490 1695 1950 2175 2349 2919 3349- 411. 931 1239 1513 1717 1 ~a1 2181 2368 2921 3350 413# 984 1249 1521 1728 1985 2182 2432 2957 3364 416# 1026 1257 1536 1749 1998 2198 2447 2959 3464 614# 1073 1263 1544 1779 2004 2231 2459 2961 3466 712 1081 1326 1559 1811 2019 2243 2466 3084 3642# 810 1110 135B 1590 1835 2045 2251 2507 3112 817 1124 1373 1612 1847 2056 2265 2515 3136 193211 2069 2121# 2257 2518 2118 2258. 2563# 639 624 3248 396# 849 1164 1423 1637 1903 2085 2272 2573 3195 901 3375 399' 863 1194 1437 1651 1908 2127 2314 2662 3229 2570 4011/ 893 1212 1444 1666 1909 2144 2334 2673 3235 CCMFAFO. MEMORY PARITY TEST CCMFAF. P11 13-JAN-7B 12: 13 EMTDEF TESTX 3S8' 39011 2083 • A8S. 017772 3373 832 2303 3~76 BB4 2415 MACY11 3378 963 30A(lC52} 13-JAN-78 12:27 PAGE 79 CROSS REFERENCE TABLE MACRO NAMES 3380 997 3382 1089 3384 1143 3386 1272 3388 1307 SEQ 0077 3390 1401 1467 1570 1661 1777 1897 000 ERRORS DETECTED: CCMF AF • CCMF AF • LST fCR F fSOL=CCMFAF. P 11 RUN-TIME: 4 9 1 SECONDS RUN-TIME' RATIO: 247/15=16.3 CORE USED: 9K (17 PAGES) i t
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