B03P 5325 0100A_02B_M244X_Series_Streaming_Tape_Drive_CE_Manual_May89 0100A 02B M244X Series Streaming Tape Drive CE Manual May89

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B03P-5325-0100A_02B_M244X_Series_Streaming_Tape_Drive_CE_Manual_May89 B03P-5325-0100A_02B_M244X_Series_Streaming_Tape_Drive_CE_Manual_May89

User Manual: B03P-5325-0100A_02B_M244X_Series_Streaming_Tape_Drive_CE_Manual_May89

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FUJITSU

M244X
Series
Streaming Tape Drive
CE Manual

B03P-5325-0100A ... 028

REVISION RECORD

01

May, 1985

02

Feb., 1988

All pages revised.

02A

May, 1988

Editorial Changes,

026

May, 1989

Editing

I, tii, vi, 6·2, 6·4, 6-8, 6·9, 6·12, 6-38, 7·6, 1·1

Commen1s-ng lhlsmanual shoc.tld be addressed to oneal1hefol-.g addresseS:
FUJITSU LIMITED
l,,_.tional MadB
TOf911111an 8, 171 54, Sotna, SWEDEN
TEL:
(46) ll-764·7MO
FAX: 8-28-03-45
TI.X:
13411 FNAB S

FUJITSU ITALIA S.p.A.
Via Melchione Gioia, 8, 20124 M4ano, ITALY
TEL:
(39-2) 6572741
FAX:
2-6572257
TLX:
350142FJJTLY I
FUJITSU AUSTRALIA LIMITED
41 Mc1.an!n 51reet. Nor1h s,dney, N.S.W. 2060. AUSTRALIA
TEL:
(61-l!) 959-6555
FAX:
2-922-2653

TI.X:

25233

FUJITSU HONG KONG LIMITED
R.M. 1831, Sun Hung Kai Centre, 30 Hmbaur Road,

HONGKONG
TEL:
FAX:

TI.X:

(652-5) 8915780
5-742917
62667

iii

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B03P-5325-01 OOA •.• 02B

iii

v

CONTENTS

4.3.7

CHAPTER 1
GENERAL DESCRIPTION ••••••••••••••••••••••••••••••••••••••
1.1
General Description • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • •
l. 2
Configuration ••••••••••••••••••••••••••••••••••••••••••••
l. 3
Specifications • • • • • • • • • • • • • • • • • • • • • • • • • • . • • • • • • • • • • • • • • • •
l.3.1 Functional specifications ••••••••••• ..................
l.3.2 Physical specifications • , •••••••••••••••••••••••••••••
1.3.3 Reliability and maintenablity •••••••••••••••••••••••••
1.4
Recording Method .........................................
1.4. l Phase Encoding format .................................
1.4.2 Group Coded Recording format ••••••••••••••••••••••••••

1-1
1-1
1-1
1-1
1-1
1-2
1-2
1-3
1-3
1-3

CHAPTER 2
INSTALLATION • • • • • • • • • • • • • • • • • • • • • • • • • • • • • . • • • • • • • • • • • • • • •
2. 1
Unpacking • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • •
2.1.l M2441/M2443 ••••••••••••••••••••••••••••••••••••••••• ••
2. l. 2 M2442/M2444 • • • • • • • • • • • • • • • • • • • • • • • • • • • . • • • • • • • • • • • • • • •
2.2
Mechanical Installation ..................................
2.2.l M2441/M2443 installation ..............................
2.2.2 M2442/M2444 installation ..............................
2.3
Cable Connection .........................................
2.3.1 Interface cable and power cable •••••••.•••••••••••••••
2.4
Checkout •••••••••••••••••••••••••••••••••••••••••••••••••
2.4. l Input voltage setting .................................
2.4.2 Device address & Write bus parity check setting •••••••
2.4.3 Setting by Operator Panel •••••••••••••••••••••••••••••
2.5
Diagnostics ..............................................

2-1
2-1
2-1
2-2
2-4
2-4
2-5
2-8
2-8
2-9
2-9
2-9
2-11
2-11

CHAPTER 3
OPERATION • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • •
3.1
Power ON/OFF switch •••••••.••••••••••••••••••••••••••••••
3. 2
Operator Panel ...........................................
3.2.1 Start key and indicator .••••••••••••••••••••••••••••••
3.2.2 Unload key and indicator ••••••••••••••••••••••••••••••
3. 2. 3 Test key and indicator ................................
3.2.4 Reset key ••••••••••••••.••••••••••••••••••••••••••••••
3.2.5 Density Select key ••••••••••••••••••••••••••••••••••••
3.2.6 File protect indicator ••••••••••••••••••••••••••••••••
3.2.7 Density indicators (HOST/6250/1600) ••••••••••.••••••••
3.2.8 2-Digit indicator •.•••••••••••••••••••••••••••••••••••

3-1
3-1
3-1
3-1
3-1
3-1
3-1
3-2
3-2
3-2
3-2

CHAPTER 4
THEORY OF OPERATION • • • • • • • • • • • • • • • • • • • • • . • • • • • • • • • • • • • • • •
4. 1
Mechanism • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • . • • • • • • • • • • • • • • . •
4.1.l Tape drive mechaniSm •••••••••••••••••.••••••••••••••••
4 .1. 2 Quick loading •••••••••••••••••••••••••••••••••••••••••
4. 2
Interface ••••••••••••••••••••••••••••••••••••••••••••••••
4. 2.1 Introduction ••••••••••••••••••••••.••.•••••.••••••••••
4.2.2 Controller-to-MTU interface signals ••..•••••••••••••••
4.2.3 MTU-to-Controller interface signals ••.••••••••••••••••
4. 2. 4 Physical interface • • • • • • • • • • • • • • • • • • • • • • . • • • • • • • • • • • • •
4.3
Command Operation and Sense Byte ••••••••.•••••••••••••••.
4.3.l Connnand description •••••••••••••••••••••••••••••••••••
4.3.2 Command operation at BOT (Load Point) ••••••••.•.••••••
4.3.3 Connnand operation in EOT area •••••••••••••••••••••••••
4.3.4 Illegal IBG ...........................................
4. 3. 5 Read (RD) /Backward Read (BRD) .........................
4.3.6 Space (SP)/Backspace (BSP) ••••••••••••••••••••••••••••

4-1
4-1
4-1
4-3
4-4
4-4
4-5
4-7
4-9
4-10
4-10
4-11
4-12
4-12
4-12
4-12

Space File without data (SF)/Backspace
File without data (BSF) •••••••••••••••••••••••••••••••
4.3.8 Space File with data (SFD)/Backspace
File with data (BSFD) •••••••••••••••••••••••••••••••••
4.3.9 Write (WT) ••••••••••••••••••••••••••••••••••••••••••••
4. 3.10 Write Tape Mark (WTM) •••••••••••••••••••••••••••••••••
4. 3.11 Erase •••••••••••••••.••••••• ·•••••••••••••••••••••••.•••
4.3.12 Rewind (REW) ••••••••••••••••••••••••••••••••••••••••••
4.3.13 Unload (UNL) ••••••••••••••••••••••••••••••••••••••••••
4.3.14 Set GCR Mode (S6250) ••••••••••••••••••••••••••••••••••
4.3.15 Set PE Mode (S1600) ••• ; •••••••••••••••••••••••••••••••
4.3.16 Loop Write-To-Read (LWR) ••••••••••••••••••••••••••••••
4.3.17 Sense (SNS) ••••••••••••••••••••••••••••••••••• , •••••••
4. 3.18 Extended Sense (EXSNS) •.•••••••••••••••••••••••••••••••
4.3.19 Sense byte •••••••••••• ·····•••••••••••••••••••••••••••
4.3.20 Description of each sense byte••••••••••••••••••••••••
4.4
Microprogramming •••••••••••••••••••••••••••••••••••••••••
4.4. l General description • ; •••••••••.•••••••••••••••••••••••
4.4.2 Micro instructions •••••••••••••••·••••••••••••••••••••
4.4.3 Interrupt processing •••••••••••••••••·••••••••••••••••
4.4.4 Sequence control••••••••••••••••••••••••••••••••••••••
4.4.5 Servo control •• , ••••••••••••••••••••.•••••••••••••••••
4.4.6 Formatter control •••••••••••••••••••.•••••••••••••••••
4.4.7 Interface control ••••••••••••••••••••••.•.••••••••••••
4.5
Circuit Description ••••••••••••••••••••••••••••••••••••••
4.5.1 PCA 'MPU' --- Microprocessor ••••••••••••••••••••••••••
4. 5. 2 Interface • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • •
4.5.3 Formatter ••••••• ••••••••••••••••••••••••••••••••••••••
4.5.4 PCA 'WTA' --- Write circuit •••••••••••••••••••••••••••
4.5.5 PCA 'RPA' --- Read pre-amplifier circuit •••••••••.••••
4.5.6 PCA 'RDA' --- Read circuit ••••••••••••••••••••••••••••
4.5. 7 Demodulator circuit •••••••••••••••••••••••••••••••••••
4.5.8 PCA 'SVA' --- Tape motion and other circuits ••••••••••
4.6
POWER SUPPLY UNIT ........................................
4.6.1 Outline ...............................................
4.6.2 Configuration ••••••• ••••••••••••••••••••••••••••••••••
4.6.3 Operations •••••••••••••••••••••••••••••••••••••••••••
4. 6. 4 Voltage adjustment ••.•••••••••••••••••••••••••••••••••
4.7
CONVERSION INSTRUCTION (M244XA => M244XAC) •••••••••••••••
4. 7. 1 Interface line terminator • • • • • • • • • • • • • • • • • • • • • • • • • • • • •
4.7.2 Drive address & bus parity check setting ••••••••••••••
4.7.3 PCA location and cable connection •••••••••••••••••••••
4. 7. 4 Buffer parameter setting ••••••••••••••••••••••••••••••
4.8
BUFFER ADAPTER •••••••••••••••••••••••••••••••••••••••••••
4.8. l General description •.•••••••••••••••••••••••••••••••••
4.8.2 Buffer adapter features· •••••••••••••••••••••••••••••••
4.8.3 Interface •••••••••••••••••••••••••••••••••••••••••••••
4.8.4 Command Operation ••••••••••••••••••••.••••••••••••••••
4. 8. 5 Sense Byte ••••••••••••••••••••••••••••••••••••••••••••
4.8.6 Error Recovery ••••••••••••••••••••••••••••••••••••••••
4.8.7 Buffer Parameter and Drive Address Setting ••••••••••••
CHAPTER 5
TROUBLESHOOTING • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • •
Power on Trouble (Figure 5.1.) ••.••••••••••••••••••••••••••••••
Trouble in Operation (Figure 5. 2) ••••••••••••••••••••••••••••••
MAP 1100 Load check code Ll to L4 • • • • • • • • • • • • • • • • • • . • • • • • • • • • •
MAP 1110 Fault Symptom Codes 8010 to 88AO •••••••••••••••••••••

B03P-5325-0IOOA ••• 02

4-12
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v

vi

REP
REP
REP
REP
REP
REP
REP
REP
REP
REP
REP
REP
REP
REP

MAP 1111 Fault Symptom Codes 88Al to 88Bl ••••••••••••••••••••• 5-7
MAP 1112 Fault Symptom Codes 88B2 to 88BB ••••••••••••••••••••• 5-8
MAP 1200
MAP 1210
MAP 1220
MAP 1230
MAP 1240
MAP 1250
MAP 1260
MAP 1270
MAP 1280
MAP 1290
MAP 1300
MAP 1310
MAP 1320
MAP 1330
MAP 1340
MAP 1350
MAP 1360
MAP 1370
MAP 1380
MAP 1390
MAP 1400
MAP 1410
MAP 1420
MAP 1430
MAP 1440
MAP 1450
~.AP 1460
MAP 1470
MAP 1480
MAP 1490
MAP 1500
CHAPTER 6
REP
REP
REP
REP
REP
REP
REP
REP
REP
REP
REP
REP
REP
REP
REP
REP
REP
REP
REP
REP
REP
REP
REP
REP

Fault
Fault
Fault
Fault
Fault
Fault
Fault
Fault
Fault
Fault
Fault
Fault
Fault
Fault
Fault
Fault
Fault
Fault
Fault
Fault
Fault
Fault
Fault
Fault
Fault
Fault
Fault
Fault
Fault
Fault
Fault

Symptom
Symptom
Symptom
Symptom
Symptom
Symptom
Symptom
Symptom
Symptom
Symptom
Symptom
Symptom
Symptom
Symptom
Symptom
Symptom
Symptom
Symptom
Symptom
Symptom
Symptom
Symptom
Symptom
Symptom
Symptom
Symptom
Symptom
Symptom
Symptom
Symptom
Symptom

Codes
Codes
Codes
Codes
Codes
Codes
Codes
Codes
Codes
Codes
Codes
Codes
Codes
Codes
Codes
Codes
Codes
Codes
Codes
Codes
Codes
Codes
Codes
Codes
Codes
Codes
Codes
Codes
Codes
Codes
Codes

AIOO
B!OO
C002
Cl20
C210
C410
C805
C840
C9E7
CA8X
CD30
CE31
CE42
CFO!
DOIO
D024
D222
D480
E002
E205
E208
E210
E220
E244
E284
E318
E'.l20
E380
E420
FOOi
F300

•••••••••••••••••••••••••••••
to B420 •••••••••••••••••••••
to Cll4 •••••••••••••••••••••
to C208 •••••••••••••••••••••
to C400 •••••••••••••••••••••
to C804 •••••••••••••••••••••
to C820 •••••••••••••••••••••
to C9E4 •••••••••••••••••••••
to CA7X •••••••••••••••••••••
to CD20 •••••••••••••••••••••
to CE2D •••••••••••••••••••••
to CE41 •••••••••••••••••••••
to CEE5 •••••••••••••••••••••
to CF73 ••••.••••••••••••••••
to D022 •••••••••••••••••••••
to D220 •••••••••••••••••••••
to D420 •••••••••••••••••••••
to D840 •••••••••••••••••••••
to E204 •••••••••••••••••••••
to E206 •••••••••••••••••••••
to E20C •••••••••••••••••••••
to E21C •••••••••••••••••••••
to E242 •••••••••••••••••••••
to E282 •••••••••••••••••••••
to E310 •••••••••••••••••••••
to E31C •••••••••••••••••••••
to E368 •••••••••••••••••••••
to E41C •••••••••••••••••••••
to E4E9 •••••••••••••••••••••
to F200 •••••••••••••••••••••
to FFOO •••••••••••••••••••••

MAINTENANCE . • • . • • • • • • • • . • • • . • • . • • • • • • • • • • • . .
1000 REPLACEMENT. CHECK AND ADJUSTMENT • • • • • • • . • • • . • • • •
1010 GENERAL PRECAUTIONS • • • • • • • • • • • • • • • • • • • . • • • • •
1050 MAGNETIC TAPE PANEL OPENING/CLOSING • . . • • • . • • . • • . .
1100 PCA REPLACEMENT (GENERAL) • • • • • . • • . . • • • . • • . . • • •
1110 PCA 'RPA' REPLACEMENT • • • • • • • • • • • • • • • • . . • . • • . .
1120 PCA 'WTA' REPLACEMENT • • • • • • • • • • • • • . • . . • • • . • . .
1130 PCA 'IFC' REPLACEMENT • • • • • • • • • • • • • • • • • • • • . . • • .
1135 PCA 'MPU' REPLACEMENT • • • • • • • • • • • • • • • •
. • • .
1140 PCA 'RDA' REPLACEMENT • • • • • • • • • . • • • . • • . . • • . . •
1150 PCA 'SVA' REPLACEMENT • • • • • • • • • • . • • • • • • • • . • . • •
1160 PCA 'BUF' REPLACEMENT • • • • • • . • • • . • • • • • • • • • • • . . 1200 POWER SWITCH REPLACEMENT • • . • • . . • • • • • • • • • • . . • •
1210 DOOR SWITCH REPLACEMENT • • . • • • . • • • • • • • • . • • • • • •
1220 ROLLER CATCH REPLACEMENT • • • • • • • • • . . . • • • • . • • • .
1180 TAPE CLEANER REPLACEMENT • • • • . • • • • • . • • . • • • . • • • •
1240 READ/WRITE HEAD REPLACEMENT • . • • • • • • • • • • • . • • • . .
1300 REELMOTORASSEMBLYREPLACEMENT • • • . • • • • • • • • • • • . .
1310 REEL HUB ASSEMBLY REPLACEMENT/ADJUSTMENT • • . • • . • • • • •
1320 MACHINE REEL REPLACEMENT • • • • • • • • • • • . • • • . . • • • .
1330 REEL TACHO REPLACEMENT • • • • • • • • . • • . . • • • • • • • • • •
1340 RIGHT/LEFT FAN REPLACEMENT • • • • • • • • • . • • • • • • . . • • •
1350 GUIDE REPLACEMENT • • • • . • • • • . • • • • • • • • • • • • . • • .
1370 SHIELD BLOCK REPLACEMENT • • • • . • • • . • • • • • . • • • • • . .
• • • . • • • • • • • . • • • • . • • • .
1380 LOADING FAN REPLACEMENT

5-9
5-10
5-11
5-12
5-13
5-14
5-15
5-16
5-17
5-18
5-19
5-20
5-21
5-22
5-23
5-24
5-25
5-26
5-27
5-28
5-29
5-30
5-31
5-32
5-33
5-34
5-35
5-36
5-37
5-38
5-39
6-1
6-2
6-3
6-4
6-5
6-6
6-7
6-8
6-9
6-10
6-11
6-12
6-13
6-14
6-15
6-16
6-17
6-18
6-19
6-20
6-21
6-22
6-23
6-24
6-25

CHAPTER 7
7.1
7.2

1390
1400
1410
1420
1430
1440
1500
2010
2110
2210
2220
2310
2320
2330

WRITE ENABLE SENSOR REPLACEMENT . • • • • • . • • • • • . • • • •
BOT/EOT SENSOR ASSEMBLY REPLACEMENT • • • . • • . . • . • • • •
TENSION SENSOR ASSEMBLY REPLACEMENT • • • . • • . • • • • . • •
IDLER TACHO ASSEMBLY REPLACEMENT • • • • • • • • . • • • • • . •
OPERATOR PANEL REPLACEMENT • • • . • • • • • • • • • • • • . • • •
FILTER REPLACEMENT • • . • • • . • • • • • . • • • • • • • • • • • •
POWER SUPPLY REPLACEMENT • • • . . • • • • • • • • • • • • . • • • •
OUTPUT VOLTAGE CHECK AND ADJUSTMENT • • • • . • • • . . • • • •
AZIMUTH CHECK AND ADJUSTMENT • • • • • • . • • • . • • . . • • • .
TENSION SENSOR CHECK AND ADJUSTMENT • . • • • • • • • • • • • •
IDLER TACHO CHECK AND ADJUSTMENT • • • • • • • • • • • • • • • •
BOT/EOT GAIN ADJUSTMENT • • • • • • . • • • • • • • • • • • . • • • •
DEVICE TYPE/EC LEVEL/BOT GAIN/EQT GAIN • • • • . • • • • • • • • •
PE READ GAIN SETTING • • • . • • • • • • • • • • . • • • • • • • • • •

ILLUSTRATED PARTS CATALOG ••••••••••••••••••••••••••••• , •• 7-1
M2441/M2443 •••••••••••••••••••••••••••••••••••• , • , ••• , • , • 7-l
M2442/M2444 •••••••••••••••••••••••••••••••••••••••••••••• 7-1

APPENDIX A
FIELD TESTER FUNCTION ••••••••••••••••••••••••••••••••••••
A. I
Introduct:ion •••••••••••••••••••••••••••••••••••••••••••••
A. 2
Top View of Field Tester •••••••••••••••••••••••••••••••••
A.3
Function of LEDs and Switches ••••••••••••••••••••••••••••
A.3.1 OFL/ONL switch (two position toggle switch) •••••••••••
A.3.2 Switch 0-7 (two position toggle switch) •••••••••••••••
A.3.3 CNT switch (two position momentary toggle switch) •••••
A.3.4 SSS switch (two position momentary toggle switch) •••••
A.3.5 LED 0-7 (lamps) .......................................
A. 3 .6 LED 8 (lamp) ••••••••••••••••••••••••••••••••••••••••••
A.3. 7 LED 9 (lamp) ..........................................
A.3.8 LED 10 (lamp) .........................................
A.3.9 LED 11 (lamp) .........................................
A.4
Display of Register ......................................
A. 5
Off line (test) Mode ......................................
A.6
Execution of Offline Commands ••••••••••••••••••••••••••••
A. 6. l Loading of a tape •••••••••••••••••••••••••••••••••••••
A.6.2 Offline command by field tester •••••••••••••••••••••••
A.6.3 Statistical record •••••••••••••••••••••••••••••••••••••
A.6.4 Stop condition of continuous executing command ••••••••
A.6.5 Sense byte at the offline mode ••••••••••••••••••••••••
A. 7
Command Operation ••••••••••••••••••••••••••••••••••••••••
A. 7. l Load (code 80) ••••••••••••••••••••••••••••••••••••••••
A.7.2 Enable/Disable go-down time (code 88/89) ••••••••••••••
A.7.3 Set/Reset lK block mode (code 8C/8D) ••••••••••••••••••
A.7.4 Enable/Disable key to RDAC (code 8E/8F) •••••••••••••••
A. 7 .5 Command 2x (read group) ...............................
A. 7. 6 Command 3x (combination) ••••••••••••••••••••••••••••••
A. 7. 7 Command 4x (write group) ..............................
A. 7 .8 Command 5x (diagnostic aid) ...........................
A. 7. 9 Command 7x (diagnostic aid) •••••••••••••••••••••••••••
A.7.10 Command Ax, Command Bx, Cx (diagnostic aid) •••••••••••
A. 7 .11 Command Ex (control command) ••••••••••••••••••••••••••
A. 7 .12 Command Fx (adjustment) •••••••••••••••••••••••••••••••
A.7.13 Ignore door switch (code 00) ••••••••••••••••••••••••••
APPENDIX B
B.l

B03P-5325-0 lOOA ••• 02A

6-26
6-27
6-28
6-29
6-30
6-31
6-32
6-33
6-34
6-36
6-37
6-38
6-39
6-41

A-1
A-1
A-1
A-1
A-1
A-1
A-1 ·
A-1
A-1
A-1
A-1
A-1
A-I
A-2
A-2
A-2
A-2
A-2
A-4
A-4
A-4
A-5
A-5
A-5
A-5
A-5
A-5
A-6
A-6
A-7
A-8
A-9
A-9
A-9
A-10

OFFLINE DIAGNOSIS BY THE OPERATOR PANEL •••••••••••••••••• B-1
Set to Diagnostic Mode ••••••••••••••••••••••••••••••••••• B-1

vi

vii

B.2
Set Up the Routine Number •••••••••••••••• •.••••••••.•••••
B.3
Start the Diagnostic Operation •••••••.••••••••.••••••...•
B.4
Termination of the Diagnostic Operation •••.••••••••••••••
Error Indication ••••••••••••••••••••.••••••••••••••••••••
B.5
B.6
Interruption of the Diagnostic Operation ••.•..•••••••••••
Error Reset •••••••••••••••••••••••••••••••••••.••••••••••
B. 7
B.8
Operation Time •••••••••••••••••••••••••••••••••••••••••••
ll. 9
Diagnostic Routine ••••••••••••••••••••••••.••••••••.•••.•
B.9.1 Code 00, 07-08, 43-89, 95, 96, and 98: No operation ••
B.9.2 Code 01: Load & run default routines ••.••••••••••••••
B. 9. 3 Code 02: Load • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • •
B.9.4 Code 03: Rewind .••••••••••••••••••••••.•••••••••.••••
B. 9. 5 Code 04: Unload •••••••••••••••••••••••••••••••• , •••••
B.9.6 Code 05: Retension ••••.••••••••••••••••••••••••••••••
B.9.7 Code 06: Run routine 10 to 19 ••••••••••••••••••••••••
B.9.8 Code 09: Ignore door switch .•...••••••.•••••••••.••••
B.9.9 Code 10: Check reset test •••••••••••••..•••••••••••••
B.9.10 Code 11: LSI scan test •••••••••••••••••••••••••••••••
B.9.11 Code 12: Time sensor test ••••••.•••••••••.•••.•••••••
B.9.12 Code 13: Block format test •••••••••••••••••••••••••••
B.9.13 Code 14, 15: Loop write to read test •••••••••••••••••
B.9.14 Code 16-19: Error track test by loop write to read ••.
B. 9.15 Code 20: Tacho counter test •••••••••••••.•••.•••••••.
B.9.16 Code 21: Read level test •••••••••••••••••••••••••••••
B. 9 .17 Code 22: Feed through test ••••••••••••••••••••••••••.
B.9.18 Code 23-25: Identification burst test ••••••••••••••••
B.9.19 Code 26-33: Combination command test •••·•·•••••••••••
B.9.20 Code 34, 35: Error detection/correction test ••••••••.
B.9.21 Code 36: Tape mark detection test •••••••••••••••••••.
B.9.22 Code 37, 38: BOT test ••.•••••••••••••••••••••••••••••
B.9.23 Code 39, 40: Command sequence test •••••••••••••••••••
B.9.24 Code 41: Data security erase test ••••••••••••••••••••
B. 9. 25 Code 42: Unload • • • • • • • • . • • • • • • • . • • • • • • • • • • • • • • • • • • • • .
B.9.26 Code 90: BOT/EOT gain adjustment •••••••••••••••••••••
B.9.27 Code 91: Azimuth adjustment ·······•••••••••••••••••••
B.9.28 Code 92: PE read amplifier gain adjustment •••••••••••
B.9.29 Code 93: EC level/device type setting ••••••••••••••••
B.9.30 Code 94: Device parameter set ••••••••••••••••••••••••
B.9.31 Code 99: Run initial diagnostics and reset
diagnostic mode •••••••••••••.•.•••••••••••••
APPENDIX C

B-1
B-1
B-1
B-1
B-1
B-1
B-1
B-2
B-2
B-2
B-2
B-2
B-2
B-2
B-2
B-3
B-3
B-3
B-3
B-3
B-3
B-3
B-3
B-3
B-3
B-3
B~3

B-3
B-3
B-3
B-3
B-4
B-4
B-4
B-4
B-4
B-4
B-4
B-4

PCA REFERENCE TABLE • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • C-1

B03P-5325-0 I OOA ••• 02

vii

1 - 1

CHAPTER 1 GENERAL DESCRIPTION

1.3

Specifications

1.3.1

Functional specifications
Table 1.1

Models

M2441A/M2442A

100 !PS

Tape Speed
and Mode

1.1

General Description

Recording
Density

M244X series streaming Tape Drive is direct reel to reel servo type tape
drive a_nd consist of tape transport mechanism, tape motion control
electronics, dual density read/write circuit and data formatter electronics
which can read and write ANSI-standard nine track half inch magnetic tape in
6,250 BPI (GCR mode) or 1,600 BPI (PE mode). The M244X AC has a buffer
adapter and the buffer adapter can elimenate the streamer restriction such as
command reinstruct time reposition time.

Model

M2441A/AC

M2442A/AC

M2443A/AC

M2444A/AC

Form

Standalone

rack mount

Standalone

rack mount

12.5*/100 IPS 12. 5*/100 IPS

Rate

25*/75 IPS

25*/75 IPS

Streaming

M2443A/M2444A

12.5 !PS
Start/Stop

1.2

Tape speed marked with asterisk is available only in A type.

6250 BPI

PE

1600 BPI

GCR

625 KB/sec

78 KB/sec

469 KB/sec

156 KB/sec

PE

160 KB/sec

20 KB/sec

120 KB/sec

40 KB/sec

GCR

100 IPS
Streall\ing

Streaming

75 IPS

1000

0.3 Inch

PE

0.6 Inch

GCR

166 ms

21 ms

126 ms

SO ms

PE

170 ms

25 ms

130 ms

63 ms

GCR

792 ms

-

580 ms

176 ms

792 ms

580 ms

PE

794 ms

-

582 ms

196 ms

794 ms

582 ms

Command
Reinstruction

GCR

1.2 ms

-

1. 7 ms

5. 7

1.2 ms

1. 7 ms

Time (Write)

PE

4.2 ms

-

5. 7 ms

17. 7 ms

4.2 ms

5. 7 ms

Repositioning
Time

0.2 - 5.0 (emulated)

Maximum block size

ms

136 sec

Load Time

Buffer size

A maximum of four MTSs can be connected to the host controller with daisy
chain connection as shown in Figure 1.1.

M2443AC/
M2444AC

60 -

Tape Media

Configuration

25 !PS
Streaming

GCR

Rewind Time (2400FT)

Note:

75 IPS
Streaming

M2441A/
M2442AC

IBG

Access
Time (Write)

M244X series has four modes as shown below.

Tape speed

Data Transfer

Functional specifications

10 sec
1/2 Inch Width Standard Tape for Computer 2400/1200/600/300 feet

-

256 lCB
64 lCB

M244X
FMT

Host Controller

FMT

FMT

FMT: Build-in formatter
T
Line Terminator
FMT

Figure 1.1

Maximum configuration
B03P-5325-0100A ••• 02

1 - l

l - 2

1.3.2

Physical specifications
Table 1.2

1.3.3
Physical specifications

Power
requirement

Voltage

100'Vl20V or 200"-240V ±10%

Service life

(2)

MTBF

Frequency

48"'61 Hz

Phase

Single

More than five years or 40,000 hours.

More than 8,000 hours.
(3)

Power consumption
Heat dissipation

0.4 KVA at 100'Vl20V
Max 0.8 KVA
0.5 KVA at 200"-240V
Max 440 Kcal/Hour (1, 750 BTU/Hour)

Circuit breaker ·capacity

20A

Leakage current

Less than l mA

Air flow

4 m3/min

Sound pressure level

max 52 dB

Environment

(1)
Not operating

Operating

Item

Reliability and maintenablity

Temperature

S"'40°c (4l"-l04°F)

0"-50°c (32"-l22°F)

Relative humidity

20"'80% RH

8"-90% RH

Wet bulb

0"-29°c (32"'84 °F)

MTTR

l hour.

Temperature change rate 15°C/Hour (27°F/Hour)
-'-

Dimensions
(Height x
width x
Depth)

RH change rate

30%/24 Hours

Altitude

-609'V3,048 m (-2,000"-10,000 ft)

Vibration

max 0.25G

M2441A/M2443A

1,000 DUD X 500 DUD X 700 DDD
(39.4 inch x 19.7 inch x 27.6 inch)

M2442A/M2444A

575 DDD X 482 DDD X 580 DDD
(22.6 inch x 19.0 inch x 22.8 inch)

M2441A/M2443A

110 kg (242 lb)

M2442A/M2444A

90 kg (198 lb)

max 0.4G

Weight

Service clearances

Front: 1 m, Rear: l m
Side : Not required

B03P-5325-0100A ••• 02

1 - 2

l - 3
l.4

Recording Method

The Formatter provides the capability of recording and
Phase Encoded (PE) format or the Group Coded Recording
recording format is implemented in accordance with the
Assignments and Data Block Format are shown in Figures
1.4.1

retreiving data in the
(GCR) format. Each
ANSI standards. Track
l.2 and 1.3.

Phase Encoding format

In the Phase Encording (PE) format each bit is recorded on tape as flux
transition at mod-cell-time. A "O" is represented by a transition away from
the erase direction; a "l" by a transition made, if necessary, at the
cell-boundary-time in order to allow the correct transition direction at the
subsequent mid-cell-time.

A block of data consists of a preamble, a Mark I subgroup, up to 158 data
groups, an end mark subgroup, a residual group, a CRC go up, a Mark II
subgroup, and a postamble. As in PE, the Mark II subgroup and the postamble
are mirror images of the preamble and Mark I subgroup. The preamble consists
of a beginning subgroup of a alternate "l's" and "O's",. a second subgroup of
one "O" and 4 "l's" followed by 14 subgroups of sync bytes, all "l's". If
the user data creates more than 158 data groups a resync burst consisting of
a Mark II, 2 sync subgroups and a Mark I is inserted every 158 data groups.
The first 6 bytes of the residual group consists of the remainder of the
write data bytes plus any required pad of data "O's". The 7th byte is an
auxiliary CRC byte and the 8th byte is the ECC. The group is recorded in the
same manner as a data group after 4 to 5 bit transformations.

Each track is therefore self-clocking, thus allowing a certain amount of skew
between the bits of a byte. Deskewing is performed during read data
recovery. Data errors caused by failure of a single track are corrected on
the fly during read operations.

The first byte of the CRC group is a data "O" if the number of
groups is even or the CRC character if the number of preceding
odd. The 2nd through 6th byte is the repeated CRC character.
is a residual character which is related to the number of data
8th byte is the ECC. The group is recorded in the same manner
group. Data errors caused by one or two track failures can be
the fly.

A block of data consists of a preamble, the data and a postamble. The
preamble consists of 40 bytes of all "O's" followed by a byte of all "l's",
while the postamble consists of a byte of all "l's" followed by 40 bytes of
all "O's". The preamble and postamble are mirror image of each other,
allowing the block to be read in reverse.

In PE, the tape mark and ID burst at BOT are unique combinations of active
and inactive tracks. The tape mark is the special combination of 250 to 400
flux transitions at 9042 FRPI in Tracks 1, 2, 4, 5 and 8, and DC erasure in
Tracks 3, 6 and 9. The ID is a burst at 3014 FRPI in Track 6 only; the rest
of the tracks are DC erased.

A t~pe mark is special conbination of 64 to 256 flux transitions at 3200 FRPI
in Tracks 1, 2, 4, 5, 7 and 8, and DC erasure in Tracks 3, 6 and 9.

GCR has a GCR ID and an ARA (Automatic Read Amplification) burst followed by
an ARA ID before the first data block. the ARA burst is used to
automatically set the gain of the Read Amplifiers in each track to the
optimum value for best reading. The ARA is recorded at 9042 FRPI in every
track while the ARA is recorded at 9042 FRPI in Tracks 2, 3, 5, 6, 8 and 9
and DC erased in Tracks 1, 4, and 7.

When writing starts at BOT, the PE ID burst is written in the BOT area
followed by a gap before the first data block. The ID burst is a single
active track (Track 4) at 1600 RPI with the rest of the tracks DC erased.
1.4.2

Table 1.3

Group Coded Recording format

In the Group Coded Recording format (GCR), the NRZI recording technique is
used; i.e., each "l" recorded on tape is represented by a flux change and "O"
is represented by no flux change. In order that each track may be
self-clocking and thereby tolerate a considerable amount of skew, the write
data is remapped such that 4 bytes of write data is transformed to 5 bytes of
data written on the tape. This transformation is performed in such a way as
to guarantee that no more than 2 consecutive "O's" will occur without an
intervening "l". The user data is broken up into groups of 7 bytes. An 8th
byte, the Error Correction Character (ECC) is calculated and added to the
group. The data group of 8 bytes is devided into two subgroups of 4 bytes.

preceding data
data groups is
The 7th byte
bytes. The
as a data
corrected on

4 to 5 Bit Transformation

Data
Subgroup

Storage
Subgroup

Data
Subgroup

Storage
Subgroup

0000
0001
0010
0011
0100
0101
0110
0111

11001
11011
10010
10011
11101
10101
10110
10111

1000
1001
1010
1011
1100
1101
1110
1111

11010
01001
01010
01011
llLlO
01101
01110
01111

Each subgroup of 4 bytes is transformed from a 6-bytes subgroup of data
written on tape in the manners at Table 1.3.

B03P-5325-0100A ••• 02

l - 3

1 - 4

(BOT AREA)

!BG

PREAMBLE
00 ... 001
(41 BYTES)

POSTAMBLE
100... 000
(41 BYTES)

DATA

IBG

PREAMBLE

Track
No.

Binary

9
8

2'
2'
2'
2'
2'
p
2'
2'
2'

7

START OF NEXT
DATA BLOCK

FIRST BLOCK OF
158 DATA GROUPS

SECOND BLOCK OF
158 DATA GROUPS

~

~

'L

PREAMBLE
BG

1010101111. . .111

MARK DATA
I
00111

DATA

DATA

MARK

II
GROUP !GROUP

pROUP

11100

slc
., I···

MARK

DATA

I
00111

GROUP

I
RESYNC_j
1-- BURST

c

START OF NEXT
DATA BLOCK
J_

J

DATA

~GROUP

END
RESIDUAL
MARK
DATA
GROUP
11111

CRC MARK
DATA II
paou~ 11100

POST AMBLE
11..
111101010

!BG

6
5
4
3
2
I
Reference Edge
Track
No.

Binary
Value

6
5
4
3
2
I

2'
2'
2'
2'
2'
p
2'
2'
2'

Reference

Edge

9
8
7

c:::==:::i

c=:=:::J
c=:=:::J

1600 frpl
(BOT AREA)
ID

ARA
ID

ARA

c:::J
c:::J

PREAMBLE

x

3014 frpi

*Tracks 1, 4,

X =MAY BE "l"or "O"

Tape Mark

c:::::J
c:::J

9042 frpi

9042 frpi
250 to 400 t

may be either DC erased or recorded as shown.
Figure 1.3

Figure 1.2

3200 frpi
64to 250 I

PE

c:::::::J

T
GCR

Tape Mark

ID

Value

Track Assignments

Data Block Format

B03P-5325-0100A ••• 02

1 - 4

2 - 1

CHAPTER 2

INSTALLATION

©

2. 1 Unpacking

CAUTION
Condensation may occur when the cabinet is transferred from a cold to a warm
environment.
In order to avoid condensation, the cabinet should remsin in an environment
at the ambient temperature for at least 3 hours before unpacking.

Remove the Sleeve

2.1.1 M2441/M2443
Remove the Top protector and

Refer to Figures 2.1 and 2.2 when tape model M2441 or M2443 is unpacked.

four Side protectors.

®

®
Polyethy~ne

cover

Bubbleco'ler

Lock knob

Remove the Polyethylene cover

llemCJ\!e the bubble cover

Sleeve

Remove four lock knobs on Top cover side.

For detaied removing lock knobs,
see figure 2.4.

Reserved
Remove the Top cover

Figure 2.1

M2441/M2443 unpacking (1)

Figure 2.2

B03P-5325-0100A ••• 02

M2441/M2443 unpacking (2)

2 - 1

2 - 2

2.1.2 M2442/M2444
Refer to Figures 2.3 and 2.4 when tape model M2442 or M2444 is unpacked.

(i)

©

Remove six Lock knobs on each side of the Outer cover.
For detailed removing Lock knobs, see Figure 2.4.

Remove the Outer cover.

Remove the Inner cover.

©

Remove AC power cable from top of unit.

®

Polyethylene cover

Remove the Polyethylene cover.

Remove the Bubble cover.

Figure 2.3

M2442/M2444 unpacking

BOJP-5325-0lOOA ••• 02

2 - 2

2 - 3

The Look knob moving method is as follows:
1.
2.
3.

Figure 2.4

Nip the two limbs and release latches (CD) •
Pull down the limb part (@).
Remove the knob from each side of outer cover

C(])).

Lock knob removal

B 03P-5325-0100A ••• 02

2 - 3

2 - 4

2.2 Mechanical Installation
2.2.1 M2441/M2443 installation
This section is applied to the standalone type tape drive.
(1) Front cover/rear cover opening
The opening method of the front cover and the rear cover is the same.
First, open the top cover adequately. Then release the two latches by
pushing down the each plate of latches through the hole using a screwdriver.
Figure 2.5 shows the front cover opening.
Figure 2.6 shows the rear cover opening.
After releasing the cover, disconnect the frame grounding wire from it by
removing the screw. See Figure 2.7.
(2) Front cover/rear cover closing
Connect the frame grounding wire to the cover with the screw.
the cover to the latches by pushing in on it.

Next fit

(3) Adjustment of the leaving feet
Figure 2.5

Top cover opening

To secure the M2441 or M2443 streaming tape unit, adjustment of the level
feet is necessary.
Place the pads under the leveling feet and adjust the level by using a
wrench. Adjust four leveling feet.

Rear Cover

Figure 2.6

B03P-5325-0100A ••• 02

Rear cover opening

2 - 4

2 - 5
2.2.2
(1)

M2442/M2444 installation
Outside view
Figure 2.9 shows the outside view of the drive and Figure 2.10 shows the
outside view of the rack.
482

580

Front door

Frame Grounding Wire
Mounting rail

658

Figure 2.9

Screw

Figure 2.7

Outside view of the drive (rack mount type)

FG wire removing
465 12

<

l
To raise a foot

;

1

Q

To lower a foot

450 min.

Figure 2.10

Outside view of the rack

Pad

Figure 2.8

Leveling foot

B03P-5325-0100A,, .02

2 - 5

2 - 6

(2) Mounting Method
a.

The method of removing the pair mounting rails attached to the unit.
Note:

The Right Rail is shown in Figure 2.9 right side view.
Each rail is fixed to the unit by two screws. The screws are
located on the front and rear sl.des.

{a)

Open the front door.

(b)

Loosen the two screws A indicated in Figure 2.11 and open the
casting panel.
Caution; The center of gravity moves to the front when the
panel is opened. Care should be taken so the drive
does not tip forward.

(c)

Remove the philips type screw B indicated in Figure 2.11.
Remove the left side screw in the same manner.

(d)

Remove the philips type screw C indicated in Figure 2.12.
Remove the left side screw in the same manner.

(e)

Close the casting panel and fix the screw A, and close the
front door to prevent the door from opening unexpectedly when
sliding the unit on the rails.

A

@o

@1
Figure 2.11

A
Magnetic tape panel

A

Mounting rails removal (1)

Figure 2.12

Mounting rails removal (2)

B03P-5325-0100A .•• 02

Figure 2.13

Mounting rails removal (3)

2 - 6

2 - 7
b.

The method of mounting the rails to the rack
(a)

Remove all the A screws. (Refer to Figure 2.14)

(b)

Adjust the rails to the rack. (Refer to Figure 2.17)
As
As

'f

I

D=25": refer to Figure 2.14
D=28" or 30": reassemble the rails indicated Figure
2.15 (for 28") or Figure 2.16 (for 30").

Fix the screw B temporarily.
(c)

Fix the rail to the rack using each 3 holes, one of which is
the lowest hole of the 12th pitch and the rest are the top and
next hole of the 13th pitch, i.e. the highest of these 3 holes
is 520.7 mm from the top hole of the rack. (Refer to Figure
2. 17)

(d)

Figure 2.15

Rail mounting (2)

Figure 2.16

Rail mounting (3)

Fix the screws B which are fixed temporarily.

TfIf
!

. I

I,

I

:

} 1st pitch

;, } 12th pitch
®'

®:}

~j

13th pitch

0

Figure 2.17

B03P-5325-0100A ••• 02

Rail mounting (4)

2 - 7

2 - 8
c.

Mount the unit on the rail from front side

2.3

d.

The method of the fixing the unit to the rail

2.3.l

Cable Connection

Fix the screws in the reverse sequence as the method of removing.
(Refer to Section 3.1)
Caution:

e.
(3)

Interface cable and power cable
Confirm that the Interface cable A and B and AC power cable indicated
in Figure 2.18.

Ff.x the back side screws for the first time.
Never open the casting panel before fixing the back side
screws to prevent the unit ·falling down front side because
of unbalance.

Fix the screws indicated in Figure 2.11.

The method of removing
Carry out in the reverse sequence of mounting.

Connector
(CNIS)

CABLE·A
CABLE·B
AC POWER CABLE

r-----,

I
I

I
I

L_____ JG
I

I

Back view

Figure 2.18

Cable connection

B03P-5325-0100A ••• 02

2 - 8

2 - 9

2.4

Checkout

2.4.2

Note:

(1)

The location and the nickname of PCA is shown in Appendix.
Please refer to the Appendix if necessary.

Device address & Write bus parity check setting.
Device address setting.
The device addr_ess is determined by plugging the switch board located on
PCA 'IFC'. The lo~ation on PCA is AA7. (See Figure 2.20)

2.4.l

Input voltage setting
Note:

(1)

This machine was set to

100~120

The default address is #0. If the address of the device is #1~#3,
change the plugging location. The address and the plugging pin meaning
is shown in Table 2.1.

VAC.

a.

Confirm that the connector (CN15) indicated in Figure 2.19 is
plugged into the upper side of the power supply unit.

b.

In case of 200~240 VAC
Confirm that the connector (CN15) indicated in Figure 2.19 plugs
into the upper side of the power supply unit.

Table 2.1

(2)

MTU
Address

MTU address and switch circuit

Connection of switch circuit
SWAD

SWADl

SWADO

0

10-09

06-05

03-02

l

10-09

06-07

03-02

Input voltage changing method
a.

Remove the connector (CN15).

b.

Remove the two screws.

16

00000000

01

c.

Reverse the plastic cover.

d.

Confirm that the label on to the plastic cover indicates correct
voltage.

e.

Fix the plastic cover by two screws.

f.

Plug the connector in to the jack.

(2)

2

10-09

06-05

03-04

3

10-09

06-07

03-04

09

~oooooooJ
08

PCA: 'IFC'
IC location:
AA7

Write bus parity check setting
This drive provides odd parity checking of write data bus.
If the write data from the host adapter is not odd parity, change the
plug location as follows.
Pin
Pin

Connector

(CNIS)

(3)

12-13 (default: parity check)
14-13 (default: no check)

IC Location:
PCA: 'IFC'

AA7

Line terminators
Every drive has 3 line terminators. These are located on PCA 'IFC'. (IC
location: AE7, AJ7, AN7; See Figure 2.20)
If the drive is not the last one on the stming remove the line
terminators.

r----,

'

'

'
''
'•----'~

(4)

To adjust the trailing edge of the formatter clock between LSI and SSI,
compensation is needed and its circuit is located on PCA 1 IFC'. (IC
Location: AC3; See Figure 2.20) Confirm that pin 7 and pin 3 is
connected.

Back view

Figure 2.19

Clock skew compensation circuit

Input voltage setting
(5)

Microprogram expansion feature
EPROM for the microprogram is MBM27128 (128K Byte).
In the future, i f a larger program is needed, 256K Byte EPROM will be
used. For this purpose, a switch is located on PCA 'IFC'. (IC Location:
AA7; See Figure 2.21) Confirm pins 10 and 11 are connected.

B03P-5325-0JOOA ••• 02B

2 - 9

2 - 10

.--•--,

r--'--i

.--•--. .--.--. .-.--, .--.----. ,--,__,

.--•--. .--•--, .--•--. ,--.--,

""

....

r-'--i

,.--.-.... .--•---,

r

'C
[.
L"

r

3'

'[

r

3[

'E

i
't

..

"" I.
j

[.

1

{

1
1

't

r'

L
L

f

L

-,r

f
fI

,3,... 1

J; '

1

{
J;
L '

r

f

.... ,3'

r

fr

,3-

'!'.
J;;

-:r

L

1

{

...J

L

f

f
f

J;
L

L

r

L

J;

f

[.

.~

'

3-

-1
1

{'

ir

!

'\'.I

i

3'

IL

f.

-!

f

3-

{

3,

{

f

1
1

1

t
f

1

J;

L

3'

'--•--'

.__,__.

'--•----'

.___,____.
!.

Notes:
1.

2.
3.

Clock skew compensation for formatter
Address setting & write bus parity check setting
Three line terminators
Figure 2.20

Notes:
1.

Microprogram expansion feature
Figure 2.21

Overview of PCA 'IFC'

B03P-5325-0100A ••• 02

Overview of PCA 'MPU'

2 - 10

2 - 11

2.4.3

Setting by Operator Panel

2.5

The interface of M244X is the standard Pertee interface. The M244X has three
variations of Pertee. (See, Sections 4.2 and 4.3). The default of the
interface mode is Mode A. If a change to another mode is needed, the setting
can be changed by the Operator Panel.
The density select mode is changable by the Operator Panel. (See, Section
3.2). The default of the density after the power up sequence is 6250 bpi &
Host Select mode. But it is selectable to other mode (i.e. 1600 bpi & not
Host) by the Operator Panel.
The !BG Length Mode is also selectable. The default value of the IB is
normal length, but if the variable !BG length mode is set, the !BG length
will be expanded up to twice of normal !BG.
The method of these three functions is described in chapter 6, REP 2320.

Diagnostics

For checking out the unit after the installation, the M244X has powerful
offline diagnostics. These routines can be executed easily by the operator
panel. The details are described in Appendix B.
Routine 01 should be executed for the purpose of complete check out. During
diagnostics, the routine ID is displayed in the 7 segment LEDs. At the end
of the diagnostics, 'OO' is displayed. But if some error is encountered, the
Fault Symptom Code (FSC) is displayed in 7 segment LEDs and the Fault
Location code (FLC) is displayed by an operation of the panel. (See Section
3.2 and Appendix B)
The detail description of Fault Symptom Code is explained in chapter 5.
During diagnostics, no retry will be executed. So the error as FSC E2xx,
E3xx, DOlO or Dl80 may be encountered because of not good tape media. In
these case, however, the good quality media will fix the problem.

B03P-5325-0100A ••• 02

2 - 11

3 - 1

CHAPTER 3

OPERATION

3.2

Operator Panel

Figure 3.1 shows the operator panel which can be used in either normal
operation or diagnostic mode. The key and indicator function for diagnostics
are described in Appendix B.
3.2.1 Start key and indicator

3.l

When tension is not applied to the tape (Servo off State), this switch
initiates the load sequence. After the load sequence is completed, the unit
becomes ready. Tbe load sequence has two different sequences depending if
tape has already advanced beyond BOT or not.

Power ON/OFF switch

The power switch shown on the right side of Figure 3.l is for the main AC
line of the unit.
Power is supplied as "l" (upperside) is pushed, and cut off as "O" (lower
side) is pushed.
When the power switch is turned on, all indicators of the operator panel are
illumin·ated for one second during the indicator malfunction test. Power on
diagnostics are automatically executed after all DC lines stable, then the
2-Digit indicator indicates normal code "OO". If the firmware detects an
error, it indicates a Fault Symptom Code in the 7 segment L.E.D .•

0
L/

I ''I

oHost

Cl, 0File

~--~--~

Protect

Density
Select

(1)

If this key is pressed after the tape is mounted and wound on the
machine reel, the tape is tensioned and moved forward to the BOT.

(2)

If this key pressed when the tape has already advanced beyond the BOT,
the tape is tensioned and moves forward for 64 revolutions then rewinds
BOT at high speed.

(3)

This key is effective only when the Start Indication is not illuminated.

(4)

This indication is illuminated when the unit is ready and enabled to the
controller.

(5)

If the Reset key is pressed, this indication turns off. Pressing the
Start Key, the unit becomes ready again after the completion of
rewinding to BOT.

06250
01600

3.2.2 Unload key and indicator.

Figure 3.l

(1)

This key is effective only when the unit is in not ready state.
indication is OFF.)

(2)

Pressing this key rewinds the whole tape on ·to the supply reel.

(3)

This indicator is lit during unload operation.

(Start

Operator Panel
3.2.3 Test key and indicator
This key is used for diagnostics.
Refer Appendix B for details.
3.2.4 Reset key
(1)

Pressing this key puts the unit in the offline mode (not ready state)
and reset test mode if you are in diagnostics,

(2)

Pressing this key during the execution of a tape motion command, the
tape motion is terminated.

B03P-5325-0100A ••• 02

3 - 1

3 - 2

3.2.5 Density Select key

3.2.8 2-Digit indicator

This key selects the write density mode (HOST/6250/1600) of the unit.

This indicator indicates the power-ON state or the details of unit errors.

Pressing this key changes the write density mode in a cyclic way shown as
follows.

(1)

[HOST - - - 6250 - - - 1600

Normal Power ON State
"OO" code is indicated.

J
(2)

Error State l (Load Check Code)

This key is ignored when the unit is online or in the diagnostic mode.
When a load failure occurs the two digit indicator on the operator panel
blinks the load check code.

The density for reading depends on the written tape (6250 or 1600). the
reading of tape does not cause any change of density mode indicator.

The code and meanings are:
Ll:
L2:
L3:
L4:
LS:

3.2.6 File protect indicator
(1)

The indicator is illuminated when the Write Enable Ring is not mounted
on the file reel.

(2)

A write operation is inhibited if this indicator is illuminated.
(3)

3.2.7 Density indicators (HOST/6250/1600)

Door opened
Reel latch opened
Tape loosened
BOT marker not found
Tape not in tape path

Error State 2 (Fault Symptom Code)
When a hardware failure occurs the two digit indicator on the operator
panel displays two bytes of FSC (Fault Symptom Code). The FSC shows the
cause of the error and the index is in the maintenance section.

These LEDs indicate the density mode while writing the data to tape.
The LEDs do not indicate the reading density.
( 1)

1- ,1

HOST

/7 I I
!/ LI.

_/ • L

This I.ED indicates that the unit can change the write density by Host
(a)

command.

(2)

6250

(b)

Lower byte

The above indications are changed for one second cyclically.

This LED indicates that the write density mode of the unit is set to
6250 (GCR). When this LED is lit, the density change command from the
Host is ignored.
(3)

Upper byte

1600
This LED indicates that the write density mode of the unit is set to
1600 (PE). When this LED is lit, the density change command from the
Host is ignored.

Figure 3.2
(4)

FSC Indication

Diagnostic routines and error codes
When the unit is in Test (diagnostic) mode, these indicators display
their test routine ID number and the results of test.
Refer to Appendix B for further details.

B03P-5325-0100A ••• 02

3 - 2

4 - 1
CHAPTER 4

THEORY OF OPERATION

Tension Roller

4.1 Mechanism
Reel Hub

4.1.l Tape drive mechanism
Figure 4.1 shows an outline.
All parts that form the tape path, such as reel hub, head unit, and machine
reel, are mounted on the tape deck.
Tape passes over the tension sensor and the tape guides, and is then wound on

the machine reel via an idler.
The reel hub and machine reel are connected directly to a DC motors with a
built-in tachometer.
A tension sensor detects the tape tension, and the idler sensor detects the
tape speed and position by means of built-in tachometers.

Shield Block

Machine Reel

An write enable sensor is attached close to the reel hub to detect whether a
write enable ring is on the tape. This sensor also detects whether the reel
is locked.

Guide

The head unit contains a tape cleaner, erase head, read/write head, and
read/write circuit. A tape guide is attached on both sides of the head unit,
and a shield block is installed facing the head.
Idler Roller/Sensor

A sheet-type operation panel is installed on the front door; it contains push
buttons, LEDs, and an on/off switch.
Figure 4.1

B03P-5325-0100A ••• 02

Tape drive mechanism

4 - 1

4 - 2

(3)

( 1) Reel hub
The reel hub is operated manually. When the knob is pushed by hand, the
cam is pulled to the reel boss by a link mechanisl!l. Then a claw is
pushed out to expand the rubber, and locks the reel in place. When the
cam is pulled, the reel lock detection ring moves inside, which moves
the shield (that covered the sensor) so that light passes through. This
enables the mechanisl!l to recognize that the reel has been locked.

Tension sensor
A roller bearing is attached to an arm and acoil spring is attached to
the arm. Changes in tape tension result in a change in the angle of
arm. A tachometer disk with a slit is connected to the center shaft,
changes in the arm angle will cause a change from the initial location.
A dumpening mass on the shaft protects the arm from resonance that may
be caused when start/stop operations are repeated in certain regular
intervals.

(2) Enable sensor and reel lock sensor
(4)
As shown in the figure, there are spaces for two types of shields:
A shield for enable sense and shield for reel lock sense. These shields
are round springs, which return to the original position by means of
elasticity.

Idler tachometer
A tachometer disk is attached to the other side of the roller guide
detects the tape speed.

The shields for sensor function as shown in the following table:
Reel lock
Locked

Not locked

Attached

A

x

Not attached

0

x

Write enable ring

x:
A:
o:

No sensor output
Sensor output repeats ON and OFF by file reel
rotation.
Sensor output is always on.

The sensor operates in the following sequence:
Tum the reel
motor a·

lit tie

Reel unlocked
Reel motor stop
Error

y

Write~nable

ring attached

B 03P-5325-0100A ••• 02

4 - 2

4 - 3

4.1.2
(1)

Quick loading
Tape loading
Bring the beginning of the tape over the tension roller and thru the
upper tape guide. Place the tape between the R/W head and the head
shield and pull the tape thru the lower tape guide. Wrap the tape
around the idler roller and on to the machine reel.
The tape is pulled to the center of the machine reel by the vacuum of
the machine reel fan.
Refer to the Figure 4.2.
After closing the front door, push the start switch on the operator
panel.
The microprogram controls the load sequence and the tape is positioned
at BOT followed by the start LED lighting.
Note:

(2)

The load fan is kept running for five minutes if any of
following occur;
(a) door opening or closing
(b) idler rotation
(c) file reel rotation
(d) pushing the reset switch on the operator panel

Loading failure recovery
When a tape fails to load, the character "L3" is displayed on the
2-digit indicator. In this case, push the reset switch in order to
reset the error condition.

Perform the tape loading explained in the item (1) again.
Figure 4.2

B03P-5325-0100A ••• 02

Quick loading

4 - 3

4 - 4
4. 2
4.2.1

Interface
Introduction

This section describes the interface connections using two SOP flat cables.
The host controller can be connected to a maximum of 4 MTUs in a daisy chain
configuration. The drive has three types of industrial standard interface
specifications. The interface specifications can be changed by the setting
command on the PCA 'IFC'. As the result of this change, the specifications
of five interface lines are changes as shown in Table 4.1. These differences
of the specifications are explained in chapter 6.
All interface signals are negative logic.
Note:

MODE A:
MODE B:
MODE C:

(True means low level)

CDC 9218S COMPATIBLE MODE
CIPHER F880 COMPATIBLE MODE
PERTEC FSlOOO SERIES COMPATIBLE

Table 4.1
SIGNAL NAME (MNENONIC)

J

Mode A Mode ·BJ Mode
FBSY
LWD
WD4
GO
WDO
WDl
UCK
Not Use
REV
REW
WDP
WD7
WD3
WD6
WD2
WDS
WRT
LGAP
Not Usel HISP
EDIT
ERASE
WFM
Not Use
LGAP
TADO
RD2
RD3

I

I

CN;
(Note)

c

PIN LOCATION

s

G

A 02
04
06
08
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48

01
03
OS
07
09

CN

so

Signal and pin assignment

DIRECTION
Host

MTU

SIGNAL NAME (MNEMONIC)
Mode AT Mode BJ Mode

c

PIN LOCATION

s

G

B 01
02
03
04
06
08
10
12

OS

CN

13
lS

RDP
RDO
RDl
LDP
RD4
RD7
RD6
HER

17

TMD

14

19
21
23
2S
27
29
31
33
3S
37
39
41
43
4S
47
49

ID
FEN
RDS
EOT

16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48

11

Connector, S; Signal Line, G; Ground Line

UNL

GCR
RDY
RWD
FPT
RSTR
WSTR
DBSY
HSPD
CER
ONL
TADl
FAD
HISP

I

HID

so

DIRECTION
Host

I

MTU

07
09
11

13
lS
17
19
21
23
2S
27
29
31
33
3S
37
39
41
43
4S
47
49

----

Three types of the interface modes, i.e Mode A, Mode B and Mode C, can be set by using a Field Tester
or the front panel to keep compatibility with each industrial standard.
Refer to Chapter 6 Replace and Adjustment (2320).

B03P-S32S-0100A ••• 02

4 - 4

4 - 5

4.2.2
(1)

(2)

Controller-to-MTU interface signals

Initiate command (GO)
This signal is used to initiate the command operation specified by the
address lines and the command lines. This signal should be asserted for
500 nanoseconds or more as a pulse signal.

Formatter Address (FAD) & Transport Address 0, l (TAD 0, 1)
These three address lines are used to select one of the MTUs which
should execute the command issued by the controller or should output its
status.

The MTU strobes the command lines at the trailing edge timing of this
signal, .and then FBSY signal is asserted by the MTU within 500
nanoseconds after this time. This signal should not be asserted while
the MTU executes the command operation, i.e. the time duration from the
trailing edge of GO signal_ till the trailing edge of DBSY signal.

The MTU compares the address lines to MTU address set with switch
circuits of the PCA, and if equal, the output signals of the MTU are
presented on the interface lines within 150 nanoseconds after the
address lines are switched.

Rewind (REW)

(3)

In case of command execution, these lines should be stable 90
nanoseconds prior to GO signal assertion and should remain stable till
the trailing edge of DBSY signal. The decoded list of these address
lines is shown in Table 4.2.
Table 4.2
MTlJ

Address

When this pulse signal is issued, the MTU asserts RWD signal within 500
nanoseconds after the trailing edge of this pulse as response to this
initiation and starts rewinding· operation. At this time either FBSY
signal or DBSY signal is not asserted.

Address lines decode

Connection of switch circuit
SWAD

SWADl

SWADO

0

10-09

06-05

03-02

1

10-09

06-07

03-02

2.

2

10-09

06-05

03-04

3

10-09

06-07

03-04

Signal level on the interface
O; False (High level +2.5 - +5.0V)
l; True (Low level 0 - +0.5V)
Switch circuit location
PCA; 'IFC'
IC Location; AA7

Offline & Unload (UNL)

(4)
16

09

ltooooooool

·This signal is used to cause the MTU to go offline and initiate unload
operation.

00000000

01

(Note) I.

This signal is used to initiate a Rewind command to the addressed MTU.
This signal should be asserted for 500 nanoseconds or more as a pulse
signal.

08

This signal should be asserted for 500 nanoseconds or more as a pulse
signal. When this pulse signal is issued, the MTU resets RDY signal and
ONL signal within 500 nanoseconds after the training edge of this pulse.
If a tape is not positioned at BOT at this time, RWD signal is asserted
by the MTU until a tape reaches at BOT. in this case either FBSY signal
or DBSY signal is not asserted.

PCA: 'IFC'
IC location:
AA7

(5)

Long Gap (LGAP)
This signal is used to set the MTU to long IBG (Inter Block Gap) mode
when a write type command is issued.
According to the interface mode, the following line is used as this
signal.
Mode A;
Mode B;
Mode C;

CNA, Signal Pin 36
Not used
CNA, Signal Pin 44

This signal should be stable 90 nanoseconds prior to GO signal assertion
and should remain stable more than 500 nanoseconds after the trailing
edge of GO signal.

B03P-5325-0IOOA ••• 028

4-5

4 - 6

(6)

(9)

High Speed (HISP)

These lines
a tape.

According to the interface mode, the following line is used as this
signal.

These lines are strobed by WSTR signal for each Write Data byte. In the
case of modes A & B, the data to be written should be stable 300
nanoseconds prior to the trailing edge of WSTR signal and should remain
stable till the trailing edge of WSTR.
In case of Mode C, the data should be stable 300 nanoseconds prior to
the leading edge of WSTR and should remain stable till the leading edge
of WSTR. Refer to Figure 4.3.

CNB, Signal Pin 50
CNB, Signal Pin 50
CNB, Signal Pin 36

This signal should also be stable 90 nanoseconds prior to GO signal
assertion and should remain stable more than 500 nanoseconsa after the
100/75 IPS streaming mode, and when false, the MTU is set to 25 !PS
streaming mode, or 12.5 !PS start/stop mode.

used as the Write Data Bus to transfer write data on to

The most significant bit is WDO.
(IO) Last Word (LWD)
This signal is used to inform the MTU of the last data byte to be
transferred during write or Variable Length Erase command operation.

High Density (HID) (Mode C only; CNA signal Pin 50)
This signal is used to set the MTU density mode when any write type
command such as WT, WTM, ERS or VERS is issued at BOT. This is valid in
Mode C, the MTU ignores this signal in Mode A or B.
When this is true, the MTU is set to 6,250 BPI mode.
When this is false, the MTU is set to 1,600 BPI mode.
This should be stable 90 nanoseconds prior to GO signal assertion and
should remain stable more than 500 nanoseconds after the trailing edge
of GO signal.

(8)

ar~

This signal is used to set the MTU Tape speed mode when any command
except density mode set commands and Sense command is issued.

Mode A;
Mode B;
Mode C;

(7)

Write Data 0-7, P (WD0-7, P)

This signal should be strobed by WSTR at the same timing as those of
WD0-7, P.
This signal is valid during the assertion DBSY in Write or Variable
Length Erase command.
(11) Other command lines
There are five signal lines, i.e. Edit (EDIT), Write (WRT), Write File
Mark (WFM), Erase (ERS) and Reverse (REV) lines, to indicate the command
operation with their combination at the time of GO signal assertion.

Formatter Enable (FEN)
This signal is used to reset the command operation except REW, UNL.
This is also used to reset the formatter error status such as HER, CRT
and UCK, when DBSY is false. This signal should be asserted for I
microsecond or more.

These signals should be stable 90 nanoseconds prior to the trailing edge
of GO signal and should remain stable more than 500 nanoseconds after
the trailing edge of GO signal.
The command decode table is shown in Table 4.3.

B03P-5325-0100A ••• 02

4 - 6

4 - 7

Table 4.3

Command decode table

Combinations of command lines

4.2.3
(1)

Command (Mnemonic)

l

EDIT

WRT

WFM

ERASE

REV

HEX

0

0

0

0

0

00

Read (RD)

0

0

0

0

1

01

Backward Read (BRD)

0

0

0

1

0

02

Space (SP)

0

0

0

l

1

03

Backspace (BSP)

0

0

1

0

0

04

Space File with data (SFD)

0

0

1

0

1

05

Backspace File with data (BSFD)

0

0

1

1

0

06

Space File no data (SF)

0

0

1

l

1

07

Backspace File no data (BSF)

0

1

0

0

0

08

0

1

0

1

0

OA

Various Length Erase (VERS)

0

1

1

0

0

oc

Write Tape Mark (WTM)

0

1

1

1

0

OE

Fixed Length Erase (ERS)

1

0

0

1

0

12

1

0

0

1

1

13

1

0

1

1

0

16

Set 1600 BPI (Sl600)

1

0

1

1

1

17

Set 6250 BPI (S5250)

1

1

0

1

1

lB

Mode A

Mode B

I

Mode C

This signal is not asserted during a REW or UNL command.
(2)

initiation is asserted and the MTU starts to execute the actual command

operation, and then the MTU asserts the DBSY signal.
After the MTU completes the actual command operation checks the result
and sets the participant status, the MTU resets this signal.

rl" t' --1SE!!l_

Backspace File
w/ data (BSFD)

Therefore the controller shall issue a next command after this signal is
reset even if FBSY is still asserted.

No Operation
(NOP)

(3)

Ready (RDY)
This signal indicates that tape is loaded and online.
When REW or UNL commands are issued this signal is reset.

---

(4)

Online (ONL)

Sense (SNS)

This signal indicates that the MTU is in online to the host controller.
No Operation
(NOP)

(5)

Rewinding (RWD)

---

This signal indicates that the MTU is rewinding to BOT. This signal is
asserted within 500 nanoseconds after the trailing edge of the REW
command pulse.

Extended Sense (EXSNS)

1

1

1

0

lE

Data Security Erase (DSE)

1

1

1

1

1

lF

Loop Write-To-Read (LWR)

1.
2.

Data Busy (DBSY)
This signal is asserted by the MTU to indicate that the MTU is executing
the actual command operation. After FBSY as a response to the command

Space File no
data (SF)
Backspace File
no data (BSF)
Space File w/

1

(Note)

Formatter Busy (FBSY)
This signal is asserted by the MTU to indicate that the MTU is executing
the command operation including the repositioning operation after a
read/write operation in streaming mode. When the command is initiated
by GO signal, the MTU asserts this signal as a response to the command
initiation within 500 nanoseconds after the trailing edge of GO signal.

Write (WT)

---

MTU-to-Controller interface signals

mark means "Not defined".
Other commands than the above described are "Not defined" and

(6)

File Protect (FPT)
This signal indicates that a write enable ring is off the file reel and
the MTU cannot go in to write status.

(7)

Load Point (LDP)

these are the cause of "Command Reject" in Sense Data.

This signal indicates that a tape is positioned at Load Point (BOT).
When a command is executed at BOT, this signal remains true during
positioning, because streaming operation requires long ramps and

repositions.

B03P-5325-0100A .•. 02

4 - 7

4 - 8

(8)

(16) Write Strobe (WSTR)

End of Tape (EOT)
This signal indicates that a tape is positioned on or past EQT marker.

This signal is used to request the write data byte and to strobe the
write data byte on Write Data Bus.

In EOT area, the length where a read or write operation can be executed
is approximately 3 meters.

(9)

This signal is asserted by the MTU for 1/3 bitcell (GCR) or 1/6 bitcell
(PE) duration.

If any forward command execution exceeds this limit, the tape may come
off the file reel and the MTU goes to offline.

Time relation to WD0-7, P is explained in section (9).

High Speed (HSPD)

Time chart of write data transfer is shown in Figure 4.3.

This signal indicates that the MTU is in high speed mode.
(10) GCR

This signal indicates that the MTU is in GCR mode.

GO

(11) Identification Burst (ID)

~,1----~r-------------11.-------11------11---­

.....j

This signal indicates that the ID burst of PE or GCR is detected at BOT
area of tape during read forward type command operation.
This signal is asserted when the ID burst is detected and is reset when
the MTU starts to read or space the first block.

FBSY

r

less than 500 nsec.

~1=====11==~~~~==1~~===!~~

DBSY

(12) Tape Mark Detected (TMD)

WSTR

This signal indicates that a tape mark block was detected.

(13) Hard Error (HER)
This signal indicates that some error was detected during the command
operation.
The details of this error can be transferred to the host by issuing a
Sense or Extended Sense command.

LWD
In case of Mo:::d:::e~C::.__ _ _ _ _ _ _ _ _-(
WD0-7,P

(14) Unit check (UCK)

LWD

This signal indicates that an equipment check was detected during the
command operation.
Ts1 .. 4:
Tff1 .. 4:

300 nanoseconds (Minimum)
0 nanoseconds (Minimum)

In this case, tape positioning may be lost and care should be taken in
the recovery of this type of error.

Tw(GCR):

i bitcoll duration (370 nsec. at 100 JPS)

The details of this error are in the sense data byte.

Tw(PE):

~ bitcell duration (I 040 nsec. at I 00 JPS)

T:

0.92 bitcell time (Minimum)
1.4 7 microseconds at I 00 JPS GCR
5.75 microseconds at 100 IPS PE

(15) Corrected Error (CER)

This signal indicates the following.
Figure 4.3

(1)

One track error correction was performed
operation or PE read operation.

(2)

One or two track error correction was performed during a GCR read
operation.

dur~ng

a GCR write

Time chart of write data transfer

However HER may be also asserted in spite of the above error correction.

B03P-5325-0100A ••• 02

4 - 8

4 - 9

(17) Read Data 0-7, P (RD 0-7, P)

4.2.4

These lines are used as the Read Data Bus to transfer read data read
from the tape and sense data from the sense register.

(1)

Physical interface
Connector requirements
The specification of two 50-pin connectors for this interface should be
as follows or equivalent.

Since these lines are strobed by RSTR signal, the data byte to be
transferred is stable 150 nanoseconds prior to the leading edge of RSTR
and remains stable 250 nanoseconds after the trailing edge of RSTR.

Connector

Strain Relief

3M No. 3425-6050 or Equivalent
3M No. 3448-3050 or Equivalent

The most significant bit is RDO.
(2)

Cable requirements

(18) Read Strobe (RSTR)
The conditions of the interface cables are as follows.
This signal is a to request to transfer read data or sense data to the

Maximum length ; 20 Ft
50-pin flat Cable for Rack-mount type

Controller and to strobe it on Read Data Bus.
This signal is asserted by the MTU for 1/3 bitcell (GCR) or 1/6 bitcell
(PE).

(3)

Driver, receiver and terminator
Driver, Receiver and Terminator for this interface should be used as
Figure 4.5.

Timing chart of read data transfer is shown in Figure 4.4.

+5

v

2201?
(150 mW)

T,
RDO -7 P

Driver
SN7438 or equivalent
Tg:
TH:

1SO nanoseconds (Minimum)
0 nanoseconds (Minimum)

Tw(GCR): ~ bitcell duration (3 70 nsec. at 100 IPS)

Figure 4.5

Tw(PE):

~ bitcell duration (I 040 nsec. at I 00 IPS)

T(GCR):

0. 75 bitcell time (Minimum)
( !. 2 microseconds at 100 IPS)
0.5 bitcell time (Minimum)

T(PE):

(4)

Receiver
SN 7414 or equivalent

Driver, receiver and terminator

Phisical voltage
All interface signal levels should be as follows.

(3.125 microseconds at 100 IPS)

True; 0 V to +o.5 V
False; +2.5 V to +5.0 V
Figure 4.4

Time chart of read data transfer
(NOTE)

B03P-5325-0100A ••• 02

The assertion of the interface signals means true.

4 - 9

4 - 10

4.3

Table 4.4

Command Operation and Sense Byte

Reinstruction time table
Reinstruction Time (msec)

4.3.1

Model

Command description

Tape Speed

Density Mode

Commands other than REW and UNL commands are initiated with the trailing edge
of GO asserted by the Controller while the MTU is in Online and Ready status
and is not executing any command operation.

IBG Mode
Write

Read

Normal
(0.3")

1. 2

2.7

Long
(0.6")

4.2

5.7

Normal
(0.6")

4.2

5.7

Long
(1.2")

10.2

11. 7

Normal
(0. 3")

1. 7

3.7

Long
(0.6")

5.7

7.7

Normal
(0. 6")

5.7

7.7

Long
(1. 2")

13. 7

15.7

Normal
(0.3")

5.7

11. 7

Long
(0.6")

17.7

23.7

Normal
(0.6")

17.7

23.7

Long
(1.2")

41. 7

47.7

•

GCR
The MTU responds to this initiation with FBSY asserted within 500 nanoseconds
after the trailing edge of GO. The MTU decodes the command and starts to
execute the specific command operation. When the MTU starts to execute the
actual command operation, DBSY signal is asserted by the MTU. After the MTU
completes the command operation and sets the status as a result of the
command operation, FBSY and DBSY are reset. However at this time FBSY may
remain asserted in streaming mode as a result of a repositions.

M2441A
M2442A

100 IPS
PE

Anyway the

Controller can issue the next command after DBSY is reset. The Controller
should issue the next command within the reinstruction time to keep streaming
operation.

GCR

The command reinstruction times are shown in Table 4.4.
If the Controller can not issue the within next limit command, the MTU

75 IPS

executes a repositioning operation automatically and these then executes the
next operation.

PE

If can error occurs during the command operation, the Controller should issue
SNS command to get the detail error information, the Controller should then
issue error recovery routine.

The status lines as a result of the command operation are reset when any new

M2443A
M2444A

command is issued.

GCR

When SNS or EXSNS command is issued, the above status lines are reset but
the actual sense data is not reset.
Sense data is reset by the initiation of commands other than SNS and EXSNS

25 IPS

commands.

REW command is initiated with the trailing edge of REW signal asserted by the
Controller.

PE

The MTU responds to this initiation asserting RWD within 500 nanoseconds
after the trailing edge of REW signal. If a tape is positioned at BOT, the
MTU ignores this command.
UNL command is initiated with the trailing edge of UNL signal asserted by the
Controller.
If a tape is not positioned at BOT, the MTU responds to this initiation by
resetting ONL and RDY and asserting RWD within 500 nanoseconds after the
trailing edge of the UNL signal until a tape reaches BOT.
If a tape is positioned at BOT, the MTU responds by resetting ONL and RDY and
then starts unload operation.

B03P-5325-0100A ••• 02

4 - 10

4 - 11

4.3.2
(1)

(2)

Command operation at BOT (Load Point)
The followings are executed in a write type command (WT, WTM, VERS, ERS
and DSE).
a.

The followings are executed in a forward read type command (RD, SP, SF
and SFD)
a.

After the MTU reads the ID burst, the MTU sets its density mode
according to ID burst.
If a GCR tape is read, setting of read amplitude is performed using
the ARA burst.

b.

If an ID burst is not found in the BOT area, i.e. data written in
NRZI mode, the command operation terminates abnormally with HER
asserted after the assertion of DBSY.

When the above write type commands are issued at BOT, the MTU writes
the ID burst in the density mode according to setting of Density
Select Switch on the operator panel.
Host Select
The MTU writes the ID burst according to the last state of the

In this case, the Not Capable sense bit is set and no data is
transferred to the controller.

density memory.

This density memory is set to GCR mode on power up and is updated by
the mode set command, i.e. S6250 and Sl600.
6250 BPI Select

c.

If the SAGC operation fails in GCR mode, the command operation
terminates abnormally with HER asserted.

The MTU always writes GCR ID burst in spite of contents of the
density memory.

At this time ID burst error sense bit is set and no data is
transferred to the controller.

1600 BPI Select

On a RD command, HER is posted after reading first block.
check of sense data is set.

The MTU always writes PE ID burst in spite of contents of the
density memory.

On other commands the operation terminates normally.
(3)

The above explanation is only applied at BOT.
b.

If a GCR ID burst is written, an ARA burst is written and setting of
the read amplitude (SAGC operation) is automatically performed as a
part of the command operation.

Relations between BOT and backward type command except REW and Unload
command (BRD, BSP, BSF and BSFD)
a.

b.
If the ID burst and ARA burst cannot be correctly written or setting
of read amplitude failed, the command operation termination
terminates abnormally with HER asserted.
ID Burst Error and Unit Check sense bits are set at this time.

When any backward type command is initiated at BOT, the command
operation is rejected and terminates abnormally with HER assertion.
In this case, Command Reject and BOT sense bits are set.

SAGC operations are executed in both low speed mode and high speed
mode sequencially.
c.

Data

During executing these commands, when a tape reaches BOT, the
command operation terminates abnormally at BOT with HER assertion.
In this case, Unit Check and BOT sense bits are set.

In this case, the tape stops on the way to ID burst or ARA burst,
and neither data block nor tape mark block is written.

B03P-5325-0100A ••• 02

4 - 11

4 - 12
4.3.3

4.3.9

Command operation in EOT area

WT command causes the tape to be moved in the forward direction, and after

EOT signal indicates a tape is positioned on or past the EOT marker.

the velocity of tape transportation reaches the specified speed and the IBG
following the previous block is generated, one data block begins to be
written. The data transfered from the controller is encoded and composed in
data block format. The data written on the tape is read back for checking.
After all data and postamble stgnals have been written. The IBG is generated
and the tape stops. The density mode is designated by the setting of Density
Select Switch and the density memory at BOT. (Refer to section 4.3.2(1) a.)

The software handling in this area is critical as described in item 4.2.3
(8).

4.3.4

Write (WT)

Illegal IBG

In a RD, SP, SF or SFD command, with IBG exceeds the specific limit before a
data block or tape mark is detected, the command operation terminates
abnormally with HER asserted.

The first WSTR signal appears 40 microseconds (minimum) of DBSY signal
assertion. The controller must present stable write data by this time.

In this case Unit Check and Data Not Found sense bits are set.
4.3.10 Write Tape Mark (WTM)
4.3.5

WTM command causes the tape to be moved in the forward direction, and a tape

Read (RD)/Backward Read (BRD)

mark block is written after erasing for 3.5 inches.
RD or BRD command causes the tape to be moved in the forward or backward
direction and next block is read.

The tape mark block in GCR mode is composed of 370 flux reversal transitions
at 9042 FRPI in tracks 1, 2, 4, 5, 7 and 8 and DC erasure in tracks 3, 6 and
9. The tape mark block in PE is composed of 250 flux reversal transitions at
3200 FRPI in tracks 1, 2, 4, 5, 7 and 8 and DC erasure in tracks 3, 6 and 9.

Data read from the tape is transferred to the controller byte by byte,
In the case of a tape mark block is detected, no data is transfered to the
controller and TMD signal is asserted for 10 microseconds or prior to the
trailing edge of DBSY signal.

4.3. l l Erase
(l)

4.3.6

ERS command is used to erase the tape in a forward direction for 3.5
inch in GCR mode or 3.8 inch in PE mode.
During erasing, the MTU verifies that erasure is successful. If some
noise is detected in this read-after-erase check, EQC, Unit Check and
Noise of sense data is set. In this case the command terminates
abnormally with HER assertion.

SP or BSP command causes the tape to moved in the forward or backward
direction and next first block is skipped without data transfer. In the case
that a tape mark is detected, TMD signal is asserted for 10 microseconds or
more prior to the trailing edge of DBSY signal.
4.3.7

(2)

Space File without data (SF)/Backspace File without data (BSF)

SF or BSF commands causes the tape to be moved in the forward or backward
direction until the first tape mark block is detected. These commands do not
transfer data to the controller.
After the tape mark is detected, the tape stops. In this case, TMD signal is
asserted for 10 microseconds or more prior to the trailing edge of DBSY
signal.
4.3.8

Fixed Length Erase (ERS)

Space (SP)/Backspace (BSP)

Variable Length Erase (VERS)
VERS command is used to erase the tape in a forward direction for the
length designated by LWD response to WSTR pulses. The MTU performs the
same read-after-erase check as ERS command.

(3)

Space File with data (SFD)/Backspace File with data (BSFD)

Data Security Erase (DSE)
DSE command is used to erase the tape from the current position till
approximately l meter after EOT marker at 200 IPS tape speed.
Read-after-erase check is not performed in this command. This command
terminates in the EOT area.

SFD or BSFD command causes the tape to be moved in the forward or backward
direction. Data is read and transferred to the controller until a tape mark
block is detected. After the cape mark block is detected, the tape stops.
In this case TMD signal is asserted in the same manner as SF/BSF command
operation.

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4 - 13
4.3.12 Rewind (REW)

4.3.18 Extended Sense (EXSNS)

This command is initiated by REW signal assertion and is used to rewind a
tape to BOT. The MTU responds to REW signal assertion asserting RWD signal.
The MTU resets RDY signal and starts the rewind operation. If a tape is
positioned at BOT, the MTU ignores this command initiation.

This command is used to send 27 bytes of detailed error information to the
controller the first 8 bytes of the sense data is the same data sent in SNS
command. The set/reset conditions of the EXSNS data is the same in the SNS

4.3.13 Unload (UNL)

Sense data table is shown in Table 4.6 details are described in subsection
4.3.20.

command.

This command is initiated by UNL signal assertion and is used to unload a
tape until all tape is wound onto the supply reel. The MTU responds to UNL
signal assertion resetting RDY and ONL signals and then starts the unload
operation.

4.3.14 Set GCR Mode (S6250)
This command is used to change the density memory of the MTU to GCR mode.
This command is valid only when the tape is positioned at BOT and Density
Select Switch is set to Host Select mode.
In case that the tape is not positioned at BOT or Density Select Switch is
not set to Host Select mode, no operation is performed in this command.

A write type command issued by the controller at BOT is executed in the
density mode specified by the density memory.
4.3.15 Set PE Mode (S1600)
This command is used to change the density memory of the MTU to PE mode.
This command is valid only when the tape is positioned at BOT and Density
Select Switch is set ot Host Select mode.
4.3.16 Loop Write-To-Read (LWR)
This command is used to verify the data path of the MTU and does not initiate
tape motion. This command sequence is the same as a WT command without tape
motion.
The data transferred from the controller is encoded, formatted, bypassed from
the input of Write Amplifiers to the output of Read Amplifiers, deformatted,
decoded and checked in the current density mode and speed mode of the MTU.
4.3.17 Sense (SNS)
This command is used to send 8 bytes of detail error information to the
controller. These sense data is set when the MTU recognizes an error and is
reset when any command except SNS and EXSNS is issued. Sense data table is
shown in Table 4.5 and the details of the sense data is described in
subsection 4.3.20.

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4 - 14

Table 4.5
Byte BIT
0

0

1

2

(U)

4

3

Intervention Drive
Required
Type
(U)

Command
Reject

Sense Data Table

Data
Check
(U)

5

Equipment
Check
(U)

6

Command

7

Unit
Check

Overrun

Corrected
Error

(U)

Last Command
1

WRT

REV
2

3

EDIT
Rewinding
Status

File Protect
GCR Mode
Status

High
Speed Mode

Tape Mark
Detected

Illegal
Command

Not
Capable

Device
Check

(E)

Write Bus
No Block
Parity Error Detected
(D)
(E)

(D)

Multi-Track
Error
(D)

(E}

l

I

Operator
Failure

(U}
ID Burst
Error

Noise

Data
Not Found
(U)

0

7

LGAP

Online
Status

5

6

-

HISP

ERS

Ready
Status

(C}
4

WFM

(E)
Uncorrect-

able Data
(U)

l

2

Format
Error

(D)

l

Error Tra] Point:r

3

l

Fault Symptom Code (Upper}

5

BOT

EOT

No Track
Pointer

Error Track
Pointer

(D)

l

6

1

7

Fault Symptom Code (Lower)

(U) causes Unit Check, (C) causes Command Reject, (E) causes Equipment Check, (D) causes Data Check.

B03P-5325-0100A ••• 02

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4 - 15
Table 4.6
BYTE

BIT

1

0

2

Extended sense data
3

4

5

6

7

0

7

Same as Sense Data 0-7

8

Sub-Fault Symptom Code (Most Significant Byte)

9

Sub-Fault Symptom Code

10

Sub-Fault Symptom Code

11

Sub-Fault Symptom Code (Least Significant Byte)

12

Servo Error State

13

Device Error State

14

Start Read
Check

End Data Check
(F)

VRC Error

IBG Detected

Crease

(F)

(UCE)

Sker Error/WTM
Error
(NOTE 4)

Miscellaneous
Error
(UCE)

15

Slow Begin/
End Read Back
Check
(F)

SAGC Check

(F)

Early Begin
Read Back
Check
(F)

Write Trigger
VRC
(UCE)

Write Data
Parity Check
(UCE)

Velocity
Change

Envelope
Check

Detected
(F)

CRC Error
(UCE)

Postamble
Error

(F)

16

File Reel diameter

17

Machine reel diameter

18

Device command code

19

Present device microprogram state

20

Tacho counter (high order)

21

Tacho counter (low order)

22

DVREQ register

23

Reserved

24

MECHSNS register

25

DVTYPE register

26

ECLVL register

(NOTE) 1.
2.
3.

4.

5.

(NOTE 3)

(UCE)

(F) means the cause of Format Error in Sense Byte 4.
(UCE) means the cause of Uncorrectable Error in Sense Byte 4.
In Write command
This is the cause of ID burst Error in Sense Byte 4,
In Read command
This is the cause of Data Check or Equipment Check.
In Write Tape Mark command
This indicates WTM Error.
In Write command
This indicates Skew Error and the cause of Uncorrectable Error.
As for the other Extended Sense Data, refer to CE Manual.

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4 - 16

4.3.19

e. Bit 4 Data Check (DCK)

Sense byte

The M244X series has 27 bytes of sense data which indicate the detail error
conditions. These sense bits are set in Sense Byte registers when the MTU
detects an error.

This is set in the following cases.
- When bit 5 Write Bus Parity Error in Sense Byte 3 is set.
- When bit 3 Uncorrectable Data, bit 4 Format Error, bit 5
Multi-track Error or bit 6 No Track Pointer in Sense Byte 4 is set.

Eight bytes of sense data are sent to the controller in SNS connnand and 27
bytes of sense data including the above 8 bytes of sense data are sent in
EXSNS connnand. The sense data are reset when connnands other than SNS and
F.XSNS are initiated and are not reset by the execution of SNS or EXSNS
command.

f. Bit 5 Connnand Overrun (COVR)
This indicates the connnand operation was interrupted by the next
connnand initiation.
In this case the connnand operation may not be completed.

The 8 bytes of sense data sent in SNS command are useful for Field Engineers
to maintain this MTU. The other 19 bytes of sense data is useful for Field
Engineer to investigate a trouble in the MTU.
4.3.20
(!)

g. Bit 6 Unit Check (UCK)
This is always set in the case of HER assertion and indicates the MTU
has sense data.
This is set in the following cases.
- When bit 0 Command Reject, bit I Intervention Required, bit 3 Data
Check, bit 4 Equipment Check or bit 5 Connnand Overrun in Sense Byte
0 is set.
- When bit 2 Not Capable in Sense Byte 3 is set.
- When bit 0 Data Not Found or bit 2 ID Burst Error in Sense Byte 4

Description of each sense byte

Sense byte 0
a. Bit 0 Command Reject (CRJ)

is set.

This is set in the following cases.
- When any write type command is initiated to a
file-protected MTU.
- When any backward type connnand except RWD and UNL is
initiated to the MTU when a tape position is at BOT.
- When a undefined command is issued.

- When BOT is detected in the backward command operation without REW
and LINL.
The details of the above error are indicated in other sense bytes.
Fault Sympton Code in Sense Byte 6 and 7 are useful for analyzing the
cause of the error.

b. Bit I Intervention Required (IRQ)
h. Bit 7 Corrected Error (COR)
This indicates intervention should be required for this recovery, and
is set in the following cases.
- When the MTU is in offline.
- When the MTU goes offline during the connnand operation.

This is set in the following cases.
- One track error correction was performed during GCR write operation
or PE read operation.
- One or two track error correction was performed during GCR read
operation.

c. Bit 2 Device Type

This is not the cause of HER, but HER may be also asserted in spite
of the above correction.

This indicates the MTU has GCR mode capability and is always true in
this MTU.
(2)

d. Bit 3 Equipment Check (EQC)
This indicates the connnand operationis initiated by incomplete
because an error condition. In this case the position sensing may
be lost, i.e. the stop position may be in a data block or in an
incorrect IBG position.

Sense byte
This Sense Byte indicates the last command. (Bit 6 is not yet defined.)

This is set in the following cases.
- When bit 3 Device Check, bit 4 Operator Failure or bit 6
No Block Detected in Sense Byte 3 is set.
- When bit I Noise in Sense Byte 4 is set in an erase operation,
- When the MTU goes offline in the command operation.
- When the MTU goes File Protected in the write type connnand
operation.

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4 - 17

(3)

(4)

Sense byte 2
This Sense Byte indicates the current MTU status, and all bits are the
same signals as interface lines.

Sense byte 3
a. Bit 0 Tape Mark Detected (TMD)
This indicates a tape mark block has been detected.

a. Bit O Ready Status (RDYS)
b. Bit l Illegal Command (ILGC)
This indicates the addressed MTU is in ready and online status.
This is set in the following cases, and in this case, CRJ and UCK in
Sense Byte 0 are also set.
- When a backward type command except REW and UNL is initiated at
BOT.
- When a write type command is initiated to the file protected MTU.

b. Bit l Online Status (ONLS)
This indicates the addressed MTU is in online status.
c. Bit 2 Rewinding Status (RWDS)

c. Bit 2 Not Capable (NCP)
This indicates the addressed MTU is rewinding.
This is set when the tape written in NRZI mode has been read.
this case, UCK is also set.

d. Bit 3 File Protect Status (FPS)
This indicates Write Enable Ring is removed from the back of the file
reel and any write operation cannot be performed.

In

d. Bit 3 Device Check (DVCK)
This indicates the transport controller in the MTU detected an error.
The details are indicated in Fault Symptom Code of Sense Byte 6 and
7. In this case, EQC and UCK are also set.

e. Bit 4 GCR Mode (GCRM)
This indicates the addressed MTU is in GCR mode.

e. Bit 4 Operator Failure (OPF)
f. Bit 5 High Speed Mode (HSPM)
This indicates some manual intervention has been performed in the
command operation or load sequence.

This indicates the addressed MTU is in high speed mode.

In this case, EQC and UCK are also set.
g. Bit 6 BOT (Beginning Of Tape)
f. Bit 5 Write Bus Parity Error (WBPE)
This indicates the tape is positioned at BOT.
This indicates a parity error was detected in the Write data sent
from the controller. In this case DCK and UDK are also set. This
bit will not be set if no parity checking is jumpered.

h. Bit 7 EOT (End Of Tape)
This indicates the tape is positioned on or past EOT marker.

g. Bit 6 No Block Detected (NBLK)
No data block was detected after writing data block in WT command
mode. In this case EQC is also set.
h. Bit 7 Not used

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4 - 18

(5)

(6)

Sense byte 4
a. Bit 0 Data Not Found (DTNF)

Sense byte 5
This sense byte indicates error track pointer 0-7 correspoinding to each
bit.

This indicates neither data block nor tape mark block has been
detected through more than 4.5 mat GCR or more than 7.6 mat PE in a
forward read type command such as RD, SP, SF and SFD.
In this case, UCK is also set.

(7)

Sense bytes 6 and 7
These sense bytes indicate two bytes of Fault Symptom Code.
Fault Symptom Code are shown in Chapter 5.

Details of

b. Bit I Noise (NOIS)
(8)
This indicates some noise was detected in an erase operation.
this case, EQC and UCK are also set.

Sense bytes 8-11

In

These sense bytes indicate four bytes of the Sub-Fault Symptom Code. In
the case that EQC is set and upper four bits of Fault Symptom Code is
'1100', this indicate a Fault Location Code. In another case, these
indicate the contents of the registers corresponding to the error as
error informations.

c. Bit 2 ID Burst Error (!DBE)
This indicates ID burst and ARA burst (GCR) was not correctly written
at BOT in a write type command operation. At this time UCK is also
set. For this error recovery, the same command should be again
issued after REW command is issued and completed.

(9)

Sense byte 12
This sense byte indicates a Servo Error which is in the sequence ID of
the microprogram servo control at the time of the error occured.

d. Bit 3 Uncorrectable Data (UCD)
This indicates the data could not be correctly read and is in a
uncorrectable condition. The details are indicated in Fault Symptom
Code. In this case, DCK and UCK are also set.

(10) Sense byte 13
This sense byte indicates a Device Error which is in the sequence ID of
the microprogram device control at the time of the error occured.

e. Bit 4 Format Error (FMTE)
This indicates preamble, postamble or other format signal of data
block could not be correctly detected. The details are indicated in
Fault Symptom Code and in Sense Byte 14. In this case, DCK and UCK
are also set.
f. Bit 5 Multi-Track Error (MLTE)
This indicates two or more error track pointers were detected during
PE read/write operation or GCR write operation. In this case, DCK
and UCK are set. This also indicates three or more error track
pointers were detected during GCR read operation.
In this case, neither DCK or UCK may be set.
g. Bit 6 No Track Pointer (NPTR)
This indicates a data error was detected but no error track pointer
could be detected at that time.
In this case, UCE, DCK and UCK are also set.
h. Bit 7 Error Track Pointer P (ETP)
This indicates a data error or hardware pointer such as phase error,
drop-out and excessive skew is detected in Parity Track.

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4 - 19

(11) Sense byte 14

(12) Sense byte 15

Each bit of this sense byte indicates main details of the FMTE. When
any of these bits except bit 7 is set, FMTE, DCK and UCK are also set.

Each bit of this sense byte indicates mainly parts of the cause of UCE.
When any of these bits except bit 2 and bit 7 is set, UCE, DCK and UCK
are also set.

a. Bit 0 Start Read Check (SRDC)
a. Bit 0 VRC Error (VRCE)
This indicates the beginning mark of the preamble could not be
correctly detected after detecting the data block in read/write

This indicates parity error of data was detected and could not be
corrected.

operation.

b. Bit 1 End Data Check (EDC)

b. Bit 1 CRC Error (CRCE)

This indicates the IBG could not be detected within the specific
limit after detecting the beginning of postamble.

This indicates error of CRC (Cyclic Redanduncy Check) character
generated with data was detected during read/write operation.

c. Bit 2 Postamble Error (POSE)

c. Bit 2 Skew Error (SKWE)/Write Tape Mark Error (WTME)
This indicates an excessive skew of data was detected in WT command
operation. In this case, UCE, DCK and UCK are also set. This also
indicates WTM command operation failed. In this case, DCK and UCK
are also set.

This indicates abnormal format data was detected in the postamble.
d. Bit 3 Crease Detected (CRSD)
This indicates IBG or drop-outs in five tracks or more were detected
before detecting the postamble in read operation.

d. Bit 3 Miscellaneous Error (MSCE)
This indicates parity error of data through read/write data path was
detected during read/write operation.

e. Bit 4 IBG Detected (IBGD)
This indicates IBG or drop-outs in five tracks or more were detected
when writing data.

e. Bit 4 Write Trigger VRC (WVRC)
This indicates the write triggers have incorrect parity during write

f. Bit 5 Early Begin Read Back Check (EBRC)

operation.

This indicates the beginning of the data block was read back prior to
the specific limit after starting to write data.

f. Bit 5 Write Data Parity Error (WDPE)
This indicates parity an error of input data was detected during
write operation.

g. Bit 6 Slow Begin/End Read Back Check
This indicates the beginning or the end of data block was not read
back within the specific limit after the end of writing data.

g. Bit 6 Velocity Change (VLCG)
This indicates the tape speed tolerance exceeded the specified limit
during write operation.

h. Bit 7 SAGC Check
This indicates the read amplitude setting using ARA burst failed or
ARA burst could not be correctly written. In case of write type
command IDBE and UCK are also set.
In case of read type command DCK and UCK or EQC and UCK are also set.

h. Bit 7 Envelope Check (ENVC)
This indicates drop-out in one track was detected during read/write
operation. This does not cause any error.
(13) Sense bytes 16

~

26

These bytes describe the state of the internal registers.

B03P-5325-0100A ••• 02

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4 - 20

4.4

4.4.3

Microprogramming

4.4.l

The interrupt of each phase is available from hardware and another phase
software.

General description

The microprogramming in this unit consists
They are:
(0000-0FFF,
I. Device control program
2. Formatter control program (1000-IFFF,
(2000-2FFF,
3. Servo control program
4. Interface control program (3000-3FFF,

of four divisions.

1.

phase
phase
phase
phase

Phase A: Device/Formatter control program
Software interrupts are caused from the Interface program as a command
and from the servo program as a fault of servo control.•

2.

Phase B: Servo control program
Hardware interrupts are caused from idler tachometer pluses to measure
duty cycle for tape speed. Software interrupts occur from phase A to
display a fault symptom code.

3.

Phase C: Interface program
Hardware interrupts are caused from interface signals and CE tester
panel.

A)
A)
B)
C)

Each address range is 4K words (12 KB).
They are time shared programs that run the following phase sequence:
cycle time is 500 nanoseconds. A, C, B, C, A, C, B, C, •••••

I

I

A

c

B

c

A

c

B

c

Each

- - -- - End cycle time is 500 nanoseconds

1----1
SOOns

4.4.4

The device control and formatter control program are switched alternatively
by the software themselves.
All program is written in three 128-KB EPROMs.
4.4.2

Interrupt processing

Sequence control

The sequence control program controls the tape motion for read/write control,
receives a device command from the interface program and sends servo commands
to the servo program to move tape.

This program also operates the loading, Rewinding and Unloading sequences.
It switches to the formatter program after the tape position and tape speed
are correct in a read or write type command.

Micro instructions

The instruction of this unit consists of the calculation and conditional jump
type command.
Each of the instructions is 24 bits long.
Load
Sequence

16 15 14

23
REGISTER

II

8 7

Idle

Tape

Formatter

Motion

Control

0
Unload
Sequence

OPERAND

FUNCTION

Servo on

Calculation type command

General flow of the sequence control program
1615 14

23 22
REGISTER

/ o/

0

12 11
BIT

JUMP ADDRESS

Conditional jump type command

B03P-5325-0100A ••• 02

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4 - 21

4.4.5

4.4.6

Servo control

The servo control program receives a servo command from the sequence control
program, then it controls reel motor currents to give correct tape tension,
position, speed, and acceleration.
It also displays error codes to 2 digit-LEDs on the operator panel. General
flow is as follows.
Servo Off

Load/Unload

Idling

Control

Error Code

Display
Mode

(1)

Formatter control
Introduction
The microprogram will jump into the formatter control from the sequence
control after tape speed reaches the specified speed. The sequence
control program decides the routine to jump to by the command. There
are several routines (shown below} in the formatter control program.
BOT routine (Write/Read)
Write block routine
Write tape mark erase routine
Loop write to read routine
Read, space and space file routine
Some diagnostic routines
The formatter control program makes the formatter hardware and VFO
start. During the command execution, the timing of formatter control
signals and the format signals which are generated from the read data
are checked. After the detection of IBG, the errors checked by the
hardware are checked by the program and if any error occur, the Fault
Symptom Code is generated.
After all errors are checked, the microprogram returns to the sequence

Stop Lock
Control

control routine to stop the tape motion.
Acceleration
Deceleration
Control

(2)

BOT routine
(a)

Write type command
When the write type command except loop write to read is issued at
BOT, the density identification burst (ID-burst) is written at the
BOT area. The density is determined by the density select mode of
t_he densitory memory.
If the.density indicates 6250 bpi by command or the panel, the
automatic read amplification burst (ARA-burst) is written after
ID-burst. During writing ARA-burst, the gain for each track is
adjusted by the output level of read head.
Two sets of read amplifier gain counters are provided because of
dual speed. At 6250 bpi mode, the ID and ARA-burst are written
twice. When the speed is low speed, the ID and ARA-burst are
written at high speed and the tape is rewound to BOT. The speed is
set to low and again the ID and ARA-burst are written. After the
operation the ID and ARA-burst, the initial IBG (about 15cm: GCR,
about 45cm: PE) is generated and the data block or tape mark is
written. If the command is data security erase, ID or ARA-burst are
written like a write command.
If the ID-burst length is not enough, HER is asserted and ID-burst
error is set in the sense byte. If the gain control of the read
amplifier at ARA-burst is incomplete, HER and ID-burst error are

Velocity
Control

set.

B03P-5325-0100A ••• 02

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4 - 22

(b)

Forward read type command

(5)

When the forward read type command is issued at BOT, the density
identification burst will be checked to adjust the control signals
of the formatter or VFO to the density of the tape. Even if the
density mode of the operator panel indicates 6250 mode, the tape
written at PE mode can be read.
If no ID-burst is detectd, HER is asserted with UCK and not
capable bits in the sense byte. When the GCR ID-burst is detected,
then ARA-burst is read and SAGC operation is done as in the write
operation. ID and ARA-burst are read in both speed same as in the
write operation. After the operation in the BOT area, the next
data block will be read.
If the gain control of the read amplifier was incomplete, HER is
asserted and EQC and SAGCE are set in the sense byte.
(3)

(a)

(b)

(c)

(b)

Space file
On this command, the microprogram repeats a space operation until
the tape mark is detected.
If the commarrd is space file with data, the microprogram repeats
the read operation in stead of the space operation.
During the space file with data operation, HER or CER is set and
reset by every data block,
When the tape mark is detected, File Mark signal is asserted and
TMDET bit is set in the sense byte,

Erase
When write tape mark or erase fixed length command is issued, the
tape is moved in the forward direction about 10 cm (3.5 inches )
long. Data on the tape is erased by the erase and write heads.
When an erase variable length command is issued, the microprogram
and write formatter hardware will perform the same as in write a
operation. But no data is written on the tape and the erase length
is controlled by the LAST WORD signal.

Space
On this command, the microprogram waits for the beginning of a data
block or tape mark block. Long IBG is checked, if the block is
detected, it is skipped without any data transfer.

Write tape mark and erase routine
(a)

Read
The microprogram makes the read formatter and VFO ready to read and
waits for the beginning of the data block or tape mark block. If
any data or tape mark block is not detected in about 4.5 meter
(GCR) or 7.6 meter (PE) long, HER is asserted and UCK and data not
found bit are set in the sense byte.
When the beginning of a data block is detected, the program waits
for the end of the preamble, the beginning of postamble and the
IBG. At the end of preamble, the slice level of the read amplifier
is set to 0% and at the beginning of postamble it is returned to
the normal read level.
During the process of the data block transfer, the microprogram
checks for format errors. When a !BG is detected, the errors which
were detected by the hardware are checked by the program. If any
error occur, HER is asserted and the FSC sense bits are set in the
sense byte.

Write routine
At the start of this routine, DBSY is asserted. The microprogram
initiates the hardware to start the data transfer. After a few bytes of
data were transfered, the data is written. The microprogram checks many
kinds of timings such as early begin, slow begin or slow end read back
check and also checks format errors that are detected by the hardware.
After the IBG is detected, errors detected by the read after write
hardware are checked and if any errors occur, HER is asserted and a
sense bit is set in the sense byte.
If the command is loop write to read, tape does not move and early
begin, slow begin read back check and tape speed are not checked.

(4)

Read, space, space file routine

(d)

Write tape mark

Backward read type
If the command is the backward read type command, the microprogram
waits for the beginning of the data or tape mark block or BOT or
ARA, ID-burst. Long IBG is not checked.

After a fixed length erase operation, the tape mark pattern is
written on the tape and checked by the read circuit.

B03P-5325-0100A ••• 02

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4 - 23

4.4.7
( 1)

Interface control.

4.5

Introduction

Circuit Description

Note:

The location and the nick name of printed circuit assembly is shown in
Appendix C. Please refer to the Appendix if necessary.

Power On diagnostics

4.5.l

PCA 'MPU' --- Microprocessor

Interface support
Field Tester support
Operator panel diagnosis support

This device contains a microprocessor.
are controlled by firmware.

The interface control microprogram is composed of four parts as below.

(2)

Power on diagnostic routine

(1)

When the power is turned on and the hardware goes active, the power up
diagnostics are initiated.

The microprocessor and some interface control registers are checked.

If

any error is detected, FSC is displayed on the operator panel. At this
time, if the RESET key is pressed, the power on diagnostics is return.
If an error is not detected, the microprogram jumps to the idle loop of
the interface support routine and will mount for a tape to be loaded.
(3)

Interface support routine
In this routine, the program waits for the command initiation. If the
initiate command (GO) pulse is detected, the command is decoded and
checked. If the command is Sense, the interface control program
executes the sense operation. If the command is mode set command such
as set high speed or set 6250 rpi, the control bit in the work register
is set. In the case of the other command, the code is converted to the
other code which is used between the interface and sequence control

program.
If the command is a read, write or motion command, the converted code is
transfered to the sequence control and the interface control waits for

the command completion.
(4)

Field Tester support
When the field tester is connected, the program is trapped in the mode
change from online to offline.
The program looks at the SSS switch and when it is pushed, the code of
switch 0 ~ 7 is converted as the interface support routine.
At the normal command, the statical records are stored in the work
register.

The tape drive and interface devices

Configuration
Figure 4.5.l shows the configuration of the microprocessor. The control
program for the microprocessor is stored in ROMs (Read Only Memory).
The ROM can store 16K words. (One word size is 24 bits.)
The micro instructions are all one word size.

Micro instructions are

read one by one controlled by the address counter, and set in the read
register.
The micro instructions are classified to arithmetic instructions and
branch instructions. Branch instructions change the address counter
contents depending upon the value of the external register. When the
prescribed condition for an external register is met, the address
counter value is changed depending upon the external register value.
When a branch instruction is set in the ROM Read register, the contents
of the specified external register is read (the register is selected by
the external register bus); the value is then set in the first register.
The address control circuit, referencing the contents of the register,
determines whether to branch or not. When branching, the address
control circuit sets a destination address for jumping; when not
branching, it increments the address counter by one.
When executing an arithmetic instruction, an specified register pointed
by the read register is selected from the group of external registers,
and then the content is stored in the first operand register.
Similarly, another specified register pointed by the read register is
selected from the group of external registers, and the content is stored
in the second operand register. The eight-bit arithmetic and logical
unit (ALU) then performs operation on the data in the first and second
operand registers, and stores the operational result in an external

(5)

Operator panel diagnosis routine

register. The type of arithmetic operation (logical sum, addition,
etc.) is selected by the 8 bits of the read register.

Refer to Appendix B.
The output of ALU is stored to the same external register that had been
selected as a first operand.

B03P-5325-0100A ••• 02

4 - 23

4 - 24

(2)

External registers
The external registers occupy 256 bytes of memory and consist of
registers, counters, input ports, and RAM.

Address
bus

The microprocessor can access the external registers byte by byte using
the register selection address.

Data
bus

Jump
Address
Control
program

Address
Counter

Interrupt
signal

(ROM)

Read
Register

Address
control
circuit

The register output are sent to interface circuits and motor drive
circuit as the output port of the microprocessor. The input port are
connected to various sensor signals and switch signals from the operator
panel.

Operation
control
circuit

The field tester allows observation of a specific byte of the external
registers. (Set the register selection address in switches 0 to 7, and
press the CNT key; the content of the specified byte will be displayed
on LEDs 0 to 7.)

Operation type

(a)
External register address

The idler tachometer generates two-phase tachometer pulses. When
the tape is running in the forward direction, tachometer pulse A is
in the leading phase, and when the tape is running in.the reverse
direction, pulse A is in the lagging phase.

First
operand
register
Write bus

Group of external

The idler tachometer circuit, receiving the two-phase tachometer
pulses, generates QTP (quarter tachopulse) and BKROT (backward
rotation) signals. The QTP signal is generated at every transition
of the tachometer pulse; the signal is used to measure the distance
of tape movement.

registers

Second
operand
register

The BKROT signal indicates the direction of tape transport.
Figure 4. 7)

Read bus

Figure 4.6

Idler tachometer circuit

(See

Microprocessor configuration
Idler
tachometer
pulse A
Idler

tachometer _ _ __,

pulse B

QTP

BK ROT

Figure 4.7

B03P-5325-0100A •.. 02

Idler tachometer circuit

4 - 24

4 - 25
(b)

Q counter
The Q counter, a 16-bit reversible binary counter, is used to count
QTP pulses. Since the BKROT signal changes the polarity of the Q
counter from "counting up" to "counting down° and vice versa, the
counter can be used to measure the distance of tape moves. The Q
counter is pressed to X'8000' when the block read operation is
complete.

(c)

Register selection address
00

08

F /M counter

General purpose

register

OB

This counter, a l6-bit reversible binary counter, counts QTP
pulses. The counter changes its polarity from "counting up" to
"counting down" and vice versa on BKROT signal. The F counter is
preset at every transition of the file reel tacho pulse, and the M
counter is reset at every transition of the machine reel tacho
pulse. The F/M counter value immediately before resetting is
sampled by the microprocessor, and used to calculate the diameter
of the tape on both reels.
(d)

Input port

07

oc

Counter
(Q, F, M, A, B)

OF
10

DACoutput/
input port

17

A/B counters

18

The A/B counters, eight-bit binary counters, are used for counting
clock pulses and thus function as a timer. A pair of A/B counters
are allocated for each of IF, DV, and SV phases.

3F

Input/Output
port

40
Common

These counters are preset by the microprocessor to a certain value,
and incremented by one at each clock pulse. When the counter value
becomes X'FF', the overflow flag is set and counting stops.
(e)

RAM

7F

80

Parameter tables
RAM

A 64K-bit ROM and a nonvolatile RAM are referred by the
microprocessor. The 64K-bit ROM is used by the servo program as a
"loop-up table" to calculate the reel motor current. The
nonvolatile RAM is used to store the gain of the read circuit,
the slice level of the BOT/EOT sensor, etc. These parameters are
held when the power is turned off.
(f)

(IF

phase)

RAM

RAM

(DY
phase)

(SY
phase)

RAM

A total of 448 bytes of RAM is used as external registers for the
microprocessor. The register address locations X'40' through X'7F'
are shared by all of the IF, DV and SV phases. Any of these phases
can write into or read from these locations. Address locations
X'80' through X'FF' are provided independently for each phase (IF,
DV, or SV phase); an address location written/read by the IF phase,
for example, cannot be written/read by the DV phase. (See Figure
4.8.)

FF

Figure 4.8

B03P-5325-0100A ••• 02

Configuration of external registers

4 - 25

4 - 26

(3)

Execution cycle

4.5.2

The microprocessor concurrently execute the IF, DV, and SV phases
through time-sharing. The IF phase processes the interface control with
the host system and executes a diagnostic program in offline mode. The
IF phase program is approximately 4K words in size, and 1.0 µsec/word in
execution speed.

(1)

The DV phase
circuit, and
The DV phase
µsec/word in

(2)

receives commands from the IF phase, controls read/write
instructs the SV phase the execution of tape operation.
program is approximately SK words in size, and 2.0
execution speed.

Interface
Introduction
The interface hardware has two functions. One is the control function
for the interface protocol, and another is the data transfer control
function.
Hardware about the protocol
i)

These signals are compared with the value of the switch setting
located PCA 5324810, IC location AA7.
The drive address is determined by these three signals.

The SV phase receives signals from sensors and the operator control
panel, and controls the reel motor via a servo circuit. The SV phase
program is approximately 4K words in size, and 2.0 µsec/word in
execution speed.

ii) Command pulse and status control

Figure 4.9 shows the relationship of the phases and control blocks.

The initiate command, rewind and offline pulses are latched by the
hardware. Formatter busy status is asserted when the initiate
command pulse is received and command code is latched. Rewinding
status is asserted and ready status is reset when the rewind pulse
is received.
When the offline pulse is received, rewinding status is set and
ready status and online status are reset.
The ready status and online status are set and the rewinding or the
formatter busy status are reset by the microprogram.
The corrected error status is generated by the formatter when the 1
or 2 track correction is detected.
The other status are set or reset by the microprogram.

Operator

Field

panel

tester

Microprogram

PCA

'MPU'

(3)
'
'

IF
phase

SY
phase

DY phase

'

''
'·'
''

____ ,'
PCA
'WTA'

Interface

Receiver

to upper

device

Data

Interface
control

ma:: >....>"'

"'

>
....
>

!'.:

)J

ii\

"' ,.>a::

>
....
>

a::
~ "'
-<
z <"l
z >
!'.:

::;

<"l

5

2

,.

~ ((

"'>>....

"'>>....

"'z

,.

,. ,.a::>
(')

"'

"'a::,.> "'
....>
"'
2l
c:

(')

::;

~(!

"' "' ....
z z (')
0"' "'
z a::

~
<"l

"'
"

,.

"'

FC

-

MARK2

CRC
MARK2

,."'....a:: 0"'"'
z
"'

RESYNC BURST

POSA ALL"l"
POSA ALL0 0" x l
POSA ALL"O" x l
POSA ALL"O" x l
POSA ALL"O" x l
POSA ALL 11 011 x l
POSA ALL"O" x 32

I

2

2

~2

4

2

3

----------

---------- 4

7

8 9 10 II 12

-1213

14

6250 Mode

I bit cell

c=J(
f('

0

I

2

-------

1~1
2 3

DATA

.----._, 4 6 7 8

4

POSA ALL"O" x l
POSA ALL"O" x l
POSA ALL"O" x l

1~1

((

(CJ

ALL"O"

9 10

II

12

--..___, 12 13 14 IS

1600 Mode

Figure 4.12

B03P-5325-0100A ••• 02

Data format

4 - 28

4 - 29
(d)

Data bus

Transfer
Buffer

XB IN

Register

The Write data received from the channel is entered into the
transfer buffer when the WTXB signal obtained by delaying DXFP
signal by lT is set ON. First DXFO signal is set by the
microprogram, and after data is stored in the transfer buffer
and the WOK signal is set. Only then the write operation is
started. First preamble is written, and data is read out
from the buffer at C2 timing after format counter becomes 11 411
and RO + IW signal becomes "l". The data read out from the buffer
is entered.into CRC LSI.

XBOUT

Register

WDTAit

RDATx

CRC LSI

In CRC LSI the data passes through Write Bus Multiplexor. Here ECC
characters, padding characters etc. are added and is output from
the LSI on the bi-direction bus. The relationship between Selector
signals WBSLl, 2, 4 on Write Bus Multiplexor and WDATO ~ 8 signals
is shown in Table 4.9.

Write 8111 Multiplex

''O"

MPX
SBOCI

(WDAT8)

When WBSLl, 2, 4 are all 'l', CRC Check circuit status passes
through Write Bus Mu_ltiplexor instead of Write data.

WCRC

Generation
Circuit

"I"

The parity bit of Write data obtained from Write Bus Multiplexor
output is cpmpared with the parity bit from the buffer out
register. If they do not match, the Write Bus Out Check signal
(WTBOC) is set to 'I'.
Table 4.9

~
421

ECC

(To Micro·

Generation
Circuil

~·

Resister)

Write bus selection

Input data

Figure 4.13

WDATX Description

000

"O"

Padding Character

001

XBOx (Transfer Buffer Output)

Data Character

010

ECC Register

ECC Character

011

CRC Register

Aux, CRC Character

100

WCRC Register

CRC Character

101

MD7, MD32 Register

Regidual Character

110

"l"

1600 mode Preamble,
Postamble All 'l'

111

CRC Check Circuit Error

Data Sensed by the
Microprogram, CRCST
Register

Transfer buffer and write bus selection

Transfer Buffer input data is subject to parity check in CRC LSI.
Parity bit is not generated but bit 8 in Bus Out register (BO reg.)
is entered to the transfer buffer.

B03P-5325-0100A ••• 02

4 - 29

4 - 30
(e)

Write modulation circuit

If inhibit preamble or inhibit postamble is specified, the IHAMB
signal is set to 'I' during preamble or postamble
processing and the modulation register output is gated as in Mask
processing.

In 6250 bpi mode, the data output from the Write Bus Multiplexor
is fed to WRT LSI. The first four bits is one subdata group and
are set in the ·sub-group register. The four bit data is converted
into five bits and is sent in parallel in the five-bit shift
register. The data is then read out serially and fed to the
modulation register. The data from the modulation register is
placed in a JK flip flop, the JK flip flop generates NRZI data.

In 1600 bpi mode, MSEL signal is set to 'I' when the format counter
is between 0 ~ 2 or 7 ~ 15. When the counter is 3 or 4, 'I' is set
in the lower two serializer bits. MSEL signal is 'O' when the
format counter is 3, 4; or 6. At this stage the data from Write
Bus Multiplexor is set in the subgroup register, bits 3 ~ 4 are
subjected to PE conversion and are set in the lower two serializer
bits if D4 signal is 'I'.

The MSEL signal is set to 'I' for Writing SYNC, MARKI, MARK2, TERM,
SECOND and END MARK. In this case the FMO ~ 4 signal is preset in
the shift register instead of 4-5 conversion data.
INHGC signal in the data field is set ('I') when DMW mode is
specified. At this stage, subgroup register bits !, 2 (CVRl, 2)
are also set to '1' simultaneously. All 'O' is set in the
serializer to inhibit entry of subdata group. If INVLD signal is
ON under the above conditions, all 'I' is preset and invalid code
of all 'I' is entered in its subdata group.
When a Mask is specified, the modulation register output is gated
and all 'O' is entered.

Sub group
Register

4-5 Conversion

Data Mark

multiplex

Serializer
Conversion
Re~ter

Modulation
Register

WDATx

(From CRC

WMDTx

SFT

LSI)

Diagnostic
Mark
Circuit

!HAMB
MSEL

INVLD

MASKx

FM0-4
Mark Signal

INHGC

Figure 4.14

Write modulation circuit (one track)

B03P-5325-0100A ••. 02

4 - 30

4 - 31
(f)

Write VRC check

(g)

Parity check on Write Modulation Waveform is carried out when the
Write Pulse is '2' (WRPL signal) and ALlWT signal is 'O'.

Read control
The operation of Read and Read Bachward commands, and Read after
write check will be described in this section.
The Bus In Data (RDDTO ~ 8) passes through the analog circuit, and
is converted into Modulated Data (DEMDO ~ 8), Read Clock (SRICO ~
8), Phase Error (PHEO ~ 8) and Peak Pulse (AMPSO ~ 8) signals
respectively.

In 6250 mode, the 9 track parity at the end of NRZI subdata group
(D4 signal= 'l') comforms with predetermined conditions. The
subdata groups of residual data and CRC data have Odd parity.
While the subdata group of the data has even parity. SYNC in the
Mark field is a repeatation of Even and Odd parities. Other Mark
fields may have uniform parity depending how they are entered.

As shown in Figure 4.15, the signals are transfer to Read Circuit
for detection of blocks, format check, modulated data, check data
and error correction.

In 1600 rpi mode, when, the subdata group of the data is
transferred, a check is executed to confirm Odd parity after
inverting the phase. At PE Mode, data is 'l' when Write
Modulation Wave change to 'O' from 'l'. So, data 'l' is checked
to be level 'l'.

The Mark detection circuit, Skew detection circuit and 5-4
conversion circuit correspond to three tracks each for and are made
up of 3 LSis.
Pointer circuits are made of three LSis (3 tracks) while the error
correction and detectio~ circuits consist of one LSI each.

Mark
Detection
Circuit

Data

Deskewing

Data

Synchro-

Read

nize
Circuit

Buffer

Modulation

___

Clock====:::!._

___,

5-4
Convertor

Error Correction
and Error

Detection
Circuit

To Channel
Buffer

Skew

Detection
Circuit

Phase
Error

Correct

Decode

Peak

Pulse

Time Sense

Pointer
Circuit

Block Format
Check Circuit

DNOIS
DBOB

Time Sense

DIBG

DTM

Skew

Phase Error

Micro Processor

Micro Processor

Figure 4.15

Read block diagram

B03P-5325-0100A ••• 02

4 - 31

4 - 32
(h)

Time sense
As soon as the Read OK signal (ROK) is set, the Peak Pulse signal
(PEKPO ~ 8) which is the differential signal from the Bus (DVBIO ~
8) is generated,
In 6250 mode, if the peak pulse is detected for ten bit cells
period, Time Sense signal (TSNSO ~ 8) is set. On the other hand,
if the peak pulse is not detected for 5 bit cells period, the
Time Sense signal is reset. In 1600 bpi mode, the time period for
setting Sense signal is 5 bit cells and for resetting is 2.5 bit
cells.
The time sense values of each tracks are decoded to generate Clock
Detection (DBOB), IBG Detection (DIBG) or Tape Mark Detection
signals (DTM). Signal detection logic is shown below in the form
of a logical equation.
TSNSO
DBOB

~

=

8 shows 0

~

The Read circuit is activated as soon as the PHOK signal is set to
'I'. The PHOK signal is reset and the Read circuit is cleared
when the bit cell count shown in Table 4.10 is completed after
postamble is detected and EPOSA signal is set to 'l'.
Just as the HBLK signals etc, HNIS, HTM, EDDCK, STRDC, NOISC and
SLIPC signals are countered by WOSl ~ WOS16 signals. They are reset
by bit cells shown in Table 4.10.
*CLKA
"!"
"!"
"O"
"O"

PHOK

EPOSA

DBOB

Carry

ROK

(4.l.3+6.2.7+o.8.5).(4+1+3).(6+2+7),(o+8+5)

HBLK

STPHK - - - " L - - . J

"O"

DIBG = o.T.2.3.4.5.6.7.8

Figure 4.16

DTM (For Write) = o.T.2.3.4.5.6.7.8
DTM (For Read in 1600 rpi mode)

IK

WOSI

8.

CLK

T.3.4(2.6.7+o.5.8)

HBLK and PHOK signal
*CLKA

~---4'"--,

co

CNT

WOS!
.. 4

DTM (For Read in 6250 rpi mode) = 1.3.4 {2.6.7.(o+5+8)+
(2+6+7).0.5.8}

8
.. 16

DARA (For Write)= 0.1.2.3.4.5.6.7.8
DARA (For Read)

=

0.5.8 {l.3.4(2+6+7)+(1+3+4).2.6.7}

DNOIS = 0.4.6+1.2.8+3.5.7+(o+4+6)(1+2+8)(3+5+7)
(i)

Unit:
6250 Mode

1600 Mode

800 Mode

co

I

1/2

1/4

WOSI

2

I

1/2

WOS4

4

2

I

WOS8

8

4

2

WOS16

16

8

4

bit cell

Block format check
The following will be described in this section:
a)
b)
c)
d)
e)
f)
g)
h)

HNIS signal for identifying a block in Write mode, and Back
Read type command after Write command.
HBLK signal for detecting a block in Read type command.
HTM signal for detecting a Tape Mark.
EPOSA signal that resets the PHOK signal.
End Data Check Counter.
Start Read Check Counter.
Slip Check Counter.
Noise Check Counter.

Figure 4.17

Check count values of block format

When the DBOB signal is set to 'l' upon decoding the time sense, it
is counted to WOSl signal set to 'I' upon decoding the time 6250
BPI mode and 1 bit cycle in 1600 BPI. As soon as a carry is
generated at 12th clock time HBLK signal is set along with PHOK
signal.

B03P-5325-0100A ••• 02

4 - 32

4 - 33

Table 4.10

(j)

Check values of block format

GCR

Write
Read

46 ± 2
22 ± 2

PE

Write
Read

23 ± 1
11 ± 1

-

25 ± 1
12.5 ± 0.5

GCR

Write
Read

304 ± 8
42 ± 2

PE

Write
Read

84 ± 4
21 ± 1

GCR

Write
Read

34 ± 2
6 ± 2

PE

Write
Read

31 ± 1
21 ± l

GCR

Write
Read

88 ± 8
248 ± 8

PE

Write
Read

20 ± 4
36 ± 4

GCR

Write
Read

120 ± 8
168 ± 8

PE

Write
Read

52 ± 4
63 ± 4

HNIS

Modulation data is set in the deskewing buffer after synchronization with formatter clock. Phase Error Detection signal is
stored at the same time as the data.

Counts DNOIS signal

GCR
HBLK
PE

Data is entered into the buffer trackwise. However, it is read out
simultaneously. The buffer capaicty is equivalent to 32 bit cells.
Counts DBOB signal
The Read In Cycle signal (RICY) will be set after mark 'l' is
detected after a series of 'l's (for 10 bit cells) in 6250 mode, or
if 00001 pattern is detected in 1600 bpi mode.
When data is detected after RICY signal has been set, the Read In
Counter is advanced and the CMP signal of the track is reset. CMP
signal is reset as soon as the Dead Track Pointer is set. Read Out
Counter is activated as soon as the CMP signals of all the tracks

Counts DTM signal

HTM

EPOSA

EDDCK

-

STRDC

GCR
NOISC

PE

-

1084 ± 4
192.5 ± 0.5

are reset.

Set if POSA are detected in
series for the bit cells on
the left.

(k)

SLIPC

PE

-

Skew control
Pointer and skew errors are set in the up.down counter used for
indicating the volume of data in the deskewing buffer.
a.

Set if DIBG signal is not
turned ON upon expiration of
the bit cell period (mentioned
on left) after starting EPOSA
Count.
Set i f PREA signal is not
detected upon expiration of
the bit cell period (Noted on
the left) after detecting
HBLK.

b.

268 ± 0.5

Set if DNOIS signal is not
detected within the bit cell
period (noted on the left)
after WOK signal.

+7% for RW Head Gap

Pointer in 1600 mode Read Mode
Dead Track pointer indicating skew of under 2 bits is set if a
track with skew exceeding 14 bits and more than 7 tracks with
skew exceeding 4 bits are detected. Dead Track Pointer
indicating skew of over 26 bits is set if less than 6 tracks
are involved.

c.

1448 ± 4

Pointer in 6250 mode Read Mode
The Dead Track Pointer for indicating skew of less than 2 bits
is set if a track with skew in excess of 26 bits (STMP signal:
'l') and seven tracks with skew of more than 4 bits (LAG
signal: 'l') are detected. If less than 6 tracks are involved
(LED: 1), the Dead Track Pointer for skew in excess of 26 bits
is sets.

Set i f DBOB is detected with
the bit cell period (noted
on the left) after WOK signal

-20% for RW Head Gap
GCR

Deskewing buffer

Skew error
Skew Error is set in the following cases:
1600 mode
6250 mode
When skew
following

Write: over 2 bits.
Write: over 14 bits.
margin has been specified skew error is set under the
conditions:

1600 mode Read: over 4 bits
1600 mode Write: over 1 bit
Skew margin is invalid in 6250 mode.

B03P-5325-0100A ••• 02

4 - 33

4 - 34
(1)

a.

Error correction

Write command

In 6250 mode, error correction is determined with reference to
Syndrome 1 (Sl), Syndrome 2 (S2) and the number of pointers.

It is not error when Sl and S2 are simultaneously 'O'.
However, if the pointer indicates more than two tracks,
Multi-Track Error is indicated.

As shown in Figure 4.18, Sl indicates parity check status of each
byte. 82 is generated by logic similar to that used to generate
ECC bytes. S2 byte is generated from data byte 7 and ECC byte.

When Sl + 0, S2 + 0 and only the parity track pointer is ON,
only the parity track is corrected.
When Sl +0, 82 +0 and the pointer of only one track (other
than parity track) is ON, S2 is shifted by an amount determined
by reference to the pointer track. Then correction is executed
when Sl = S2. However if Sl + S2, VRC Error is indicated.

Bit Shift
Parity Checker

Register

CVDO

1

SFT

In cases other than the above, data check is executed assuming
it to be a VRC error. In this case the number of pointers is O
or 1, VRC Error is set. If more than 2 pointers are involved,
Multitrack error and VRC error are set.
b.

It is no error if both Sl and S2 are 'O'. If more than 3 track
pointers are set, a Multitrack error is assumed to have
occured. This does not result in data check.

Register

Figure 4.18

Read command

'lVo track error correction is executed if Sl = 0, S2
two pointers are ON.

Sl Generation circuit

+0

and

Parity track correction is carried out in the following cases.
CVDO

CVDS

CV06

CVD2

CVD7

CVD4

CVDI

CVD3

(i)
Sl +0, S2
0, No pointer
(ii) Sl +0, S2 = 0, One pointer
(iii) Sl
0, S2 = 0, 'lVo pointers (including parity '
track).

+

'lVo track error correction is executed if S2 + O, S2
track pointers are set (excluding parity track).
Figure 4.19

S2 Generation circuit

Sl and S2 registers are shifted (SlSFT, S2SFT) in synchronization
with the convention buffers. All the pointers related to the data
group are sampled if the SETPT signal (for pointer set timing) is
'1'. Now, Sl, S2 and pointers are checked when CKCOR signal used
for decision on error correction is '1'. Error correction
conditions are listed next.

+

+

+

+

0 and 2

If Sl
0, S2
0 and pointers are 0 or 1, S2 is shifted till
Sl = S2. Error track is then identified from the number of
shift operations and one track error correction is executed.
If Sl + S2 after 8 shift operations, VRC error is set.
If Sl
O, S2
0 and two pointers are set, error correction is
executed for the pointer track. If the pointer is 0 or 1 in
cases other than the above, VRC error is set. If more than
three track pointers are set, VRC Error and Multi-track Error
are set.

B03P-5325-0100A ••• 02

4 - 34

4 - 35

(m)

Pointer

ECC Group Buffer Pointer

a.

This pointer is set if an phase error is detected in a data
group to be processed. If dead or valid track pointers of more
than three tracks have been set, the ECC group buffer pointer
is not employed as a pointer.

1600 mode
There are two types of pointers in 1600 bpi mode.
Dead Track and Valid Track Ponters.

They are

Dead Track Pointer
Track in which the time sense signal has been reset while
PHOK signal is 1 1 1 •
Track with excessive skew.
Track (read only) subjected to 8 bytes serial correction with
reference to the valid pointer data (this correction is
carried out after the valid pointer has been set).

In Read operation, this pointer is reset upon detection of
resynchronous burst and upon completion of processing of a data
group.
(n)

If any of the above three conditions are set, they will not be
reset during the processing.
Valid Pointer

The data deskewed at the deskewing buffer (PDO ~ 8) is set in the
sub group buff er when the ROC+D signal (which is a step delayed
from ROC+l) is set ('1'). As soon as the five bit data counted by
the group counter is set in the buffer, the group buffer full
signal (GBFUL) is set.
The five bit output from the group buffer is subjected to 5-4
conversion to obtain 4 bit data.

Normally this pointer is set in a track in which a phase error
has been detected and is set unconditionally in Write
operation. It is set during preamble and postamble in Read
operation. It is also set unconditionally if other track
pointers have been set, but it may only be set in data if
parity error has been detected.
Once the valid pointer is set, it may only be reset if 8 bytes
(or more) serial error correction is not executed and the data
is changed from 0 to 1 or 1 to 0 (in read only).
b.

Data flow

6250 mode
There are three types of pointers, Dead Track Pointer, Valid
Pointer and ECC Group Buffer Pointer in 6250 mode.

At this stage, Mark 1, Mark 2 or All 1 mark is detected. The 5-4
conversion data is preset in the conversion buffer at SECTV '1'
timing when GBFUL signal is 'l' and conversion buffer busy signal
(VBBSY) is '0' •
The data from conversion buffer shift signal (VBSFT) is output
serially by the conversion buffer shift signal.
This CVDO ~ 8 output data is stored in the ECC buffer by the SlSFT
signal (Sl register shift timing signal). This buffer is made of 8
bit serial in/serial out register. The ECC register output data is
subjected to error correction and then set in the ECC buffer out
register. The output data (EOO ~ 8) from this register, is set in
the transfer buffer as Read Data when STRIN signal is '1'.
Read system data flow is shown in Figure 4.20.

Dead Track Pointer
The condition for setting this pointer are the same as that in
1600 mode. In Read Operation if the time sense if 1 1 1 when
resynchronous burst is detected, this dead track pointer i~
reset.
Valid Pointer
Track subjected to error correction.
A track in which invalid data pattern and mark is not
detected in the mark field.
This pointer is set if a phase error is detected in a data
group is to be processed. If dead or valid track pointers of
more than three tracks have been set, the ECC group buffer
pointer is not employed as a pointer.

B03P-5325-0100A ••. 02

4 - 35

4 - 36
(o)

CRC check
The following data check circuits are provided: CRCA, CRCB, CRCC,
CRCD and CRC. CRCA is generated from the transfer buffer input
data.
CRCB is generated from the transfer buffer output data.
CRCC is generated from the data and Aux-CRC byte.
CRCD is generated from Aux-CRC byte.
CRC is generated from data, padding characters, Aux CRC byte and
one CRC byte.
Details on checks in each mode are given in Table 4.11.
Table 4.11

CRC check
6250

1600

WT RD BR WT RD BR
SISFT

M

PDx

EOx

SRG4X
" 3X
" 2X

I

CRCA ./ CRCB

CVDx

CRCB ./ CRCC

8 bit

" IX

Transfer Buff er
Input/Output
does not match

0

0

0

Write Data and
Read after write
Data do not match

0

0

0

0

.. ox

Oeskewina
Buffer

CRCB ./ CRCD
Group

S-4

Buffer

Conversion

Figure 4.20

Conversion
Buffer

ECC Buffer

ECC Buffer
Out
Register

Unmatch CRC

Read system data flow

Unmatch CRCC

B03P-5325-0100A ••• 02

R/W.data and the
Aux-CPC Data read
out do not match

0

0

Required pattern
not obtained in
Read data CRC
Check.

0

0

CRCC generated
from Read data
does not have the
required pattern

0

0

4 - 36

4 - 37
4.5.4
(1)

(a)

PCA 'WTA' --- Write circuit

File protect circuit
The file protect circuit protects the magnetic tape from
inadvertent erasure or write-over. Files are protected under the
following condition:

Configuration
The Write circuit consists of a file protect circuit, write voltage
generator circuit, erase circuit, write control circuit, and write

i)

current control circuit. Figure 4.21 shows the configuration of the
Write circuit. As shown in the figure, a write current control circuit
is provided for each of the nine tracks, but the other circuits are
shared by all tracks.

The FILE PROTECT LED lights when the unit is write
protected. This circuit is on PCA 'SVA'.
(b)

+12VFP

File
protect

ff' Erase head

Erase circuit

circuit

'-"

• WRTO N
Write voltage
generator
circuit

* ERSO N

-

PCA SVA

*WTDL~_____,
*ACBO
*STRM r_
WTPL
PEDG
*PEDG
*PEDG 2____,

s____,
_____,
1____,

-

-

The erase circuit supplies current to the erase head at the erase
control signal.

~-1
WHCHK
WLCHK

Voltage check
circuit

- EVCHK

The voltage check circuit checks the write head voltage and erase
head current.

,

I

This circuit is on PCA 'SVA'.

-

(c)
PCA WTA

VH
VB

(d)
WDS

j

control circuit

WD7

J

Write current

J

'

Write current

control circuit

I

·~

l

t---1

t=!L
EB

Write head
IT

2T

Write current control circuit
This circuit controls the current that flows into the write head.
In the PE mode, the waveform of the write current is rectangular.
In the GCR mode, AC bias current is superimposed over the step
waveform. The write current is greater in the PE mode than in the
GCR mode.

I
I

I

I

I

I

I

I

I

I
I

I

I
I

WD4

Write control ·circuit
This circuit is composed of:
- A circuit that changes the GCR/PE mode.
- An AC bias oscillator, and
- A write clock setting circuit for generating a step waveform for
write current.

Write
control

circuit

Write voltage generator, erase, and voltage check circuit
The write voltage generator controls the generation of write
voltage. The write voltage is set to a value suitable for the tape
speed and recording density by microprocessor. After the end of
the write operation, the circuit generates an attenuating voltage
for degaussing the write head.

I

+l2V, _

Write enable ring is not attached to the file reel.

~~~~~~'1,1,___~~~~-:_~~W-r-it_e_c_urr~en-t~~~-~
====I_
l
control circuit

Figure 4.21

I

I
I
I

I
I
I
I
I

I

4:

9T

Write circuit configuration

B03P-5325-0100A ••• 02

4 - 37

4 - 38
(2)

I/O signal lines for the write circuit
The functions of the I/O signals shown in Figure 4.21 are described
below:
(a)

*WRTON

H
L

WD0-8

H
L

WTPLS

H
L

Signal for controlling the write voltage
Signal for controlling the erase current

Input signals --- PCA 'MTA'
*ACBON:
*STRMG:

Signal for controlling the AC bias current in the GCR mode
Signal for changing the AC bias frequency and the step
width of the step waveform.
WTPLS:
Clock signal for synchronizing the write data with the
signal.
PEDG, *PEDGl, *PEDG2:
Signals for setting the current control circuit in the PE
mode
WDO to 8: Write data bits 0 to 8
(c)

H
L

Input signal --- PCA 'SVA'
*WR TON:
*ERSON:

(b)

• ERSON

Output signals --- PCA 'SVA'
WHCHK:
WLCHK:
EVCHK:

Erase current

_/

\'----

Write voltage

During write operations, this signal confirms that the
value of 12VFP is as prescribed.
During read operations, this signal varifies that the write
voltage circuit is not operating.
During erase operation, this signal confirms that the erase
current is as prescribed.
Write current

(3)

(GCR mode)

Write sequence and current waveform
Figure 4.22 shows the write sequence and write current waveform. First,
the *ERSON signal activates the erase circuit, which in turn supplies
current to the erase head. When it is confirmed that the current is
correct EVCHK is issued.
The write operation is initiated by activating the write voltage
generator circuit with *WRTON; the circuit then applies the write
voltage to the write head. If the voltage is correct, WHCHK is issued.

Write current
(PE mode)

Write data bits WDO through WD8 (= 9 bits) are written on the tape,
synchronized with the write clock (WRPLS). As described in the section
for the write control circuit, the waveform of the write current is
rectangular for the PE mode and step waveform superimposed over an AC
bias.
When the write operation is completed and the *WRTON signal goes away,
the write circuit starts a degauss operation: The write voltage
decreases gradually, and the write current control circuit, in response
to the degaussing pulses, reverses the polarities of the current that
flows into the head in regular intervals. The write sequence is
completed when the degaussing is finished.

B03P-5325-0100A ••• 02

+---11 Degaussing

t------Da_t_a_re_c_o_rd_ _ _ _ _ _ _ _

Figure 4.22

Write sequence

4 - 38

4 - 39

4.5.5

4.5.6

PCA 'RPA' --- Read pre-amplifier circuit

PCA 'RPA' is composed of pre-amplifiers, tension sensor, idler tachometer,
and reel tachometer.
(1)

Configuration
The read circuit amplifies the head output, detects peak points which
are information recorded on the tape, converts the read data into
pulses, and sends the resulting pulses to the demodulator circuit.

Pre-amplifier circuit
Each head output signal is amplified by the pre-amplifier. Three
pre-amplifiers are packaged in one integrated circuit: so there are
three integrated circuits on PCA 'RPA'.

(2)

(1)

PCA 'RDA' --- Read circuit

Figure 4.23 shows the configuration of the Read circuit.
consists of:

The circuit

Pre-amplifier, differentiator, gain switching circuit, register
circuit, filtering amplifier, peak point detector circuit,
amplitude check circuit, standard voltage generator, and read
control circuit.

Tension sensor circuit
The tension 8ensor circuit senses the output of the photo sensors with
two hybrid !Cs. Variable resistors adjust the phase and duty between
two sensor outputs.

(3)

The standard voltage generator circuit and the read control circuit are
shared by all of the nine tracks.

Idler tachometer circuit
This circuit senses the two phase outputs of the idler tachometer photo
sensors with two hybrid ICs.
Two variable resistors are used for adjusting the phase and duty of the
output of the tachometer.

(4)

PCA RPA

PCAPDA

Reel tachometer circuit

Differenciator

Each circuit of machine reel tachometer and file reel tachometer is
composed of the same kind of hybrid !Cs.

circuit

Gain
change
circuit

Filtering
amplifier
circuit

Peak
detection
circuit

RDDTi

--~
Control

Register
circuit

signal

Amplitude
check
circuit

CTB

CT4
CT2
CTI
B 1600
• BSP

RDAC
ADAC

Read controlt-------~
circuit

Standard voltage

generator circuit

ZTB

Figure 4.23

B03P-5325-0100A ••• 02

Read circuit configuration

4 - 39

4 - 40

(a)

(h)

Pre-amplifier circuit -- (Only the pre-amplifier circuit is on the
PCA RPA.)

The read control circuit changes the filtering band of the
differentiator and filtering amplifier, and the time constant of
the peak point detector circuit.

The pre-amplifier circuit amplifies the head output to an
adequate leve 1.
(b)

(2)

Differentiator circuit
The differentiator circuit differenciates the pre-amplifier output
into a signal suitable for peak point detection. The band is
changed depending on whether the unit is in the streaming mode or
start/stop mode.

(c)

(b)

Output signals
*AMPSO to 8:

The filtering amplifier consists of two amplifier ICs, and IC for
input switching, and an IC for voltage gain regulation, all mounted
in one package.

*RDDTO to 8:

Peak points detector circuit

Output signal from the amplitude detection circuit.
This signal is output when the amplitude is greater
than the prescribed.
Indicates peak point detection signal.

SAGC operation
The SAGC operation, performed in the GCR mode, automatically adjust the
gain. Details are described below:
With a magnetic tape recorded in the GCR mode, an amplitude standard
signal (ARA) is recorded immediately after the BOT. The read circuit
adjusts the gain according to the ARA value prior to tape read
operation. Figure 4.24 shows the SAGC operation.

Because the differentiated signal indicates peak points at OV, this
circuit detects the zero-crossing points of the signal, and outputs
peak pulses.

(a)

In the GCR mode, the output from this circuit is used in gain
setting in the ARA area through an SAGC operation. Moreover, the
circuit is also used in setting the read gain in the PE mode.

(b)

SAGC operation 2
If any of outputs from the filtering amplifiers does not attain the
prescribed value after reaching the prescribed gain value, the
slice level is lowered. If the TSNS signal is activated at this
point, the SAGC operation is terminated just as in SAGC operation
1. This operation is called "SAGC operation 2".

Standard voltage generator circuit
The standard voltage generator circuit applies voltage to the
amplitude detection circuit. The voltage is controlled by a
microprogram, supplied to the DAC of PCA SVA, and processed
appropriately by the read circuit, which then generates a suitable
voltage.

SAGC operation 1
When SAGC is initiated, the gains of all tracks are decreased to
the minimum (step 0). After a certain period, the read circuit
increases the gains at regular intervals. When the output from the
filtering amplifier becomes the prescribed value, the register
circuit is fixed. When the gains for all tracks become suitable
values, TSNS 0 through 8 become active. The microprogram,
confirming this, finishes the SAGC operation. The process up to
this point is called "SAGC operation l".

Amplitude detection circuit
The amplitude detection circuit detects when the input amplitude is
less than a prescribed value. When the amplitude of the analog
signal from the filtering amplifier is as prescribed or more, the
signal is then sent to the formatter.

(g)

Signal for switching from PE to GCR mode, vice versa
Signal that indicates the unit is in the streaming mode
This signal is set during loop write to read.
Input voltage for the standard voltage generator circuit
Input voltage for the standard voltage generator circuit

Filtering amplifier

(3)

(f)

Input signals (The following lists only the principal signals.)
Bl600:
*HSP:
RDLWR:
RDAC:
ADAC:

Gain switching circuit

The amplifier together with external registers, capacitors and
transistors makes up an active filter, which is used both in the
streaming mode and in the start/stop mode. The characteristic of
this filter is changed depending on the mode (GCR or PE).
Output voltage; 2Vpp (from the ground)
(e)

I/O signal lines of the read section
(a)

The gain switching circuit, with its four-bit signal line, changes
the gain. The gain can be chosen from the 16 steps available.
(d)

Read control circuit

(c)

SAGC operation error
If the SAGC operation is not terminated in SAGC operation 2, an
SAGC operation error occurs.

B03P-5325-0100A ••• 02

4 - 40

4 - 41

(5)

Oscillator circuit
This package contains the following three oscillators:
(a)

Main clock for the microprocessor

(b)

Write clock for PE mode

(c)

Write clock for GCR mode

---,
Amplitude reference signal (ARA Burst)
(9042 fci)

ARAID:

' - - - - - - - - - - - - - - - - - - - ' - - - ...J

ID Burst

V' SAGC Start

Slice level of

SAGC 1

-~-------~----------~

\

Slice level of SAGC 2
~---,-~--'\
II

' '

Slice level VRDAC

TSNS

D

o-8

2 Vpp

Analogue output

Solid line : Normal SAGC operation (SAGC operation 1)
Dased line: Normal SAGC operation (SAGC operation 2)

Figure 4.24

SAGC

operation

B03P-5325-0100A ••• 02

4 - 41

4 - 42

4.5.7
(1)

Demodulator circuit
Principle
The peak signal, which detects the peak of the signal reproduced via the
read head, is sent to the demodulator circuit.
A reference signal is obtained by inputting the peak signal to a
variable frequency oscillator (VFO). The reference signal thus obtained
is compared with the peak signal in terms of phase; data bits are
determined to be either "1" or "O" depending upon whether the phase
between the two signals match or not.

Figure 4.25 shows the block diagram of the demodulator circuit and
Figures 4.26 and 4.27 show the timing chart for the PE mode and GCR
mode, respectively. The numbered signal names on the timing charts
correspond to the numbers on the block diagram.

PCA 'RPA'

Peak signal I
LWR data I

.-- @

0-MPX~
-

PCA 'VFO'

Leading/

Trailing

edge pulse

generator

LWR

Data
discriminate

~---(?) r - t--t- VFO

@

i-=- Demodulated
Data I

r--+- circuit

@

MPXand

Read Clock I

Stop signal
generator

Write clock

circuit

Time sense I

@

i-=+-

VFO control
signal

Phase OK

.---

©

L
J /2
~=------------------------------! Frequ-

ency

@
Reference

'-

Phase error
detection

®

t--=-Phase error I

circuit

~signal

Figure 4.25

Block diagram of GCR and PE demodulator circuit

B03P-5325-0100A ••• 02

4 - 42

4 - 43

Preamble

Recorded data

0

0

0

0

O

0

0

0

0

0

0

0

0

Peak signal

CD

Data Pulse

CD

I I 111111111111111111111111111

0
©

I I I I I

Write clock

Time sense

Stop signal
VFO clock

I

0

II

0

0 I

11

llHlll

I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I

0) I I
@
CD I I

Peak pulse

I

I I I I I I I

I

II I I I I I

I I

I II

I I

I

I I

I I

I

I

I H

I I

II I I I I I I I I

11

©
®

Phase OK
Reference

signal
Phase error

®11111111111111111111111111111111111111111111111111111

De:::i~:ulated

@

---------- ------- -.
000000000

0

Reproduced information

I

0

I

Preamble

Figure 4.26

TI

PE demodulation timing

Preamble

TERM
,------,
Recorded data

Peak signal
Data pulse

SECOND
,------,

I OJO!Ol

ll

SYMC
ll

,.. SYNC

lllll l!

ll

SYNC

MARKI

DATA

r-----i

1111111111

111100 II

0 I 0 I

Q)

@_..____,__,___,_I_.l-'IL.-1...1_._I.....l_.l_IL....J..I.....I _.l_IL.-1...1_._I.....l_,l_,_I_,_I...1.l....11_,_I.J. .I_,_I..1.l....JIL.-1...I~-LI-'-'...1.l....11.:c-!_~_J._

Write clock 01

I I I I I I

I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I I

©~------------..J
Timesense0)1
Ill
II
II

II

I

llH

VFOclock

':'.:::'.::::::::'.:::::=:::::::::::::::::::::::::::'.::::]=t:::=:::==::::::::::~====::::'.::~~
(D1 ~1~~1~I~l__.l~l~~l~l~I_._I_._l_.l_l..__._I~1__.l_....._,_._~l__.l_l....,_l_,_l__.l_._..._I_,_I__..1......1._._I.._I..._l_.l_,_I.._J..._1_.l~IL.-L...I

Reference

@

signal
Phase error®_~ r- -Read clock®

-- ----- - - --- ----- - -- -1 :1: :n ::1

I I I I I I I I I I I I I I I I I I I

@.

I I I I

I I

I I

'

II I I I f I I I I I I I

u-TLJL

Demodulated L ___________ _____ - - - - - ____ ___ J

data

I I I I I I I I I I 0 0 I I I j'; 0 0 I 0
_ _ _ _s_Y_Nc~ ~
DATA
Preamble

Reproduced information

T

Figure 4.27

GCR demodulation timing

B03P-5325-0100A ••• 02

4 - 43

4 - 44
(2)

@

Signals in the demodulator circuit

(!)

Read data
Input signal or the demodulator circuit during read/write
operations.

Peak signal (0 to 8)
The peak signal of the data read from the magnatic tape.
(3)

~

Data pulse (0 to 8)

In the 1600 bpi mode, data is recorded on magnetic tape in the PE mode.

Leading and trailing edges of the peak signal

G)

PE demodulation

(!) .

To allow automatic adjustment of the free-running frequency while data
blocks are not input, the VFO of the demodulator circuit is connected to
the write clock signal

Write clock

G).

Standard clock for holding the VFO in the standard state.
~

CD

When a data block is detected, the signal
is shaped into data pulses
by leading and trailing edge generators. In this way, a time sense
signal ~ is generated at the time sensor. The peak pulse signal (j)
is switched from the write clock signal Ci) to the data pulse signal ~
; the VFO, which has been synchronized with the write clock signal Ci),
outputs a VFO clock signal that is synchronized with the peak pulse
signal (j). This VFO clock signal is frequency-divided to produce a
reference signal~.

Time sense (0 to 8)
This signal changes its state from low to high when the peak pulse
lasts for a specified time period. This signal changes the input
signal to the VFO.

~

VFO clock (0 to 8)
VFO output clock which is synchronized with peak pulse
VFO input.

®

(j)

'l'he value ("l" or "O") of each data bit is determined by comparing the
peak signal (!) and the reference signal @ in terms of phase. Data is
reproduced by sampling the demodulated data thus produced at each read
clock pulse.

as the

Phase OK

The phase error signal (2) is generated when the phases of the peak
signal
and the reference signal ~ differ due to, peak shift or bit
drop,

Demodulated data and phase error become valid after this signal is
issued.

(j)

CD

Peak pulse
(4)
VFO inP,ut pulse signal obtained by multiplexing the differential
pulse~ and the write clock signal Cl).

~

In the 6250 bpi mode, data is GCR converted and recorded on the magnetic
tape through NRZI method. In the NRZI method, "l" is recorded as flux
reversal, and "O" is recorded as no flux reversal.

Reference signal (0 to 8)

Similar to the PE mode, the VFO generates VFO clock pulses ~ which are
synchronized with the peak pulse signal.

Signal obtained by frequency-dividing the VFO clock signal ~·
~

Phase error (0 to 8)
This signal is activated when a peak pulse is not received or when
the phase of a peak pulse remarkably differs from that of the
reference signal ~·

@

GCR democulation

Read clock (0 to 8)
Clock signal for reading demodulated data

@ Democulated

The value ("I" or "O") of each data bit is determined by comparing the
peak signal (!) and the reference signal in terms of phase for the
interval between the center of the bit cell to the center of the next
bit cell. The demodulated data
is sampled at each read clock pulse
@ , reproducing the recorded data.

@

The phase error signal ~ is genera~ when the phases of the peak
signal (!) and the reference signal \!!) differs due to, peak shift.

@.

data (0 to 8)

Collection of data bits ("I" or "O") obtained through demodulation.

@

Stop signal
Signal for temporarily stopping the VFO at the leading edge of the
time sense signal ~·

B 03P-5325-0100A ••• 02

4 - 44

4 - 45

4.5.8

(2)

PCA 'SVA' --- Tape motion and other circuits

Figure 4.29 shows the file reel motor driver circuit.

This package consists of the following cirucits
-

Servo amplifier circuits

DAC circuit
Servo amplifiers for both reel motor
+12V circuit for write amplifier
Sensor circuit
Power supply control circuit

(1)

DAC Circuit
The PCA SVA has eight channels of DACs, which converts 8-bit digital
signal sent from the microprocessor into an analog signal. These DACs
are used as follows:
1)
2)
3)

4)
5)
6)
7)

8)

FDAC
MDAC
BDAC
EDAC
TDAC
SDAC
RDAC
ADAC

For
For
For
For
For
For
For
For

driving
driving
setting
setting
tension
setting
sensing
setting

the file reel motor.
the machine reel motor.
the slice level of the BOT sensor.
the slice level of the EOT sensor.
feedback
the slice level of the sensor.
the amplitude of the read analog signal.
the write head current.

In the actual circuit, one DAC is time-shared, and the DAC outputs are
held by capacitors. In Figure 4.28, one of the switches SWO ~ 7 turns on,
and one byte in the 2-port RAM is selected at a time.
Figure 4.29
Data bus

FDAC

2-port
RAM

Microprocessor

Address bus

(8. 8)

~

SW!·,

Gain adjustment
Write enable

Time-division

control circuit

~MDAC

: : *
'

I

''

SW?'

;;i;;:
Figure

4.28

DAC circuit

:
''

~;

i__;;;~ADAC

'

File reel motor driver circuit

When SVON (the signal for activating the servo circuit) is a low level,
the relay (RL) is off, and contact points rl 1 through rl 3 are open.
In this state, power is not supplied to the power amplifier, and the
file motor is dynamic braked by a diode. When SVON becomes high level,
the power amplifier is activated, and the reel motor is connected to the
power amplifier output. At this stage, the reel motor is controlled by
the values of TDAC and FDAC. The following three operation modes are
available:
- Speed control mode (SWO: off; SWl: off)
Because current feedback via RO and Rl is enabled, tape speed can be
regulated by controlling the motor current with FDAC. when the tape
tension changes, the change is reflected in TDAC, which makes up a
tension feedback loop through a differential filter.
- Position control mode (SWO: on; SWl: off)
The speed control filter is altered for position control. In this
mode, FDAC is controlled so that the tape position may be constant.
- Voltage feedback mode (SWO: off; SWl: on)
Because the power amplifier output voltage is fed back via R2 and R3,
the motor terminal voltage can be controlled with FDAC. This
operation mode is used while loading an.cl unloading.
The machine reel motor driver circuit is the same as Figure 4.29
except that it does not include the tension feedback by TDAC.

B03P-5325-0100A ••• 02

4 - 45

4 - 46

(3)

+12 V circuit

(5)

The +12 V circuit provides the write circuit in write operations, and
checks the +12 V with its internal circuit. Because the +12 V power is
shut off by a relay in the file protect mode, the data on the tape
cannot be written over or erased.
(4)

Power supply control circuit
In the control circuit several signals are transferred between the
microprocessor and the power supply. The microprocessor sends the PWOFF
signal to the power supply to shut it off; this signal is useful to shut
the power off after taking protective measures for the media when an
alarm situation such as 0 fan alarm" occurs.

Sensor circuit
Figure 4.30 shows the schematic diagram of the BOT/EOT sensor circuits.
In the normal mode except the diagnostics, the BDAC for the BOT sensor
supplies about -1.0 V and the SDAC supplies about 0.0 V.
Because the photo-transistor output current is less than the sink
current of the transistor Trl when the BOT marker is not detected, the
Trl become a saturation state. As this result, the voltage of Trl
collector becomes negative and the output of comparator (*BOTMK signal)
becomes high level. When a marker is detected, the output current of
photo-transistor increases over the sink current and *BOTMK signal
becomes low level. In the diagnostics mode, the BDAC (EDAC) and SDAC
are varied for a measure of the sensor current, and are set to the
optimized value which is calculated by the microprocessor.

The PWOK signal indicates that the power supply is ready.
operations are enabled when this signal goes high.

Tape drive

The PWALMO and PWALMI signals informs the power supply of alarm
conditions such as temperature alarm, fan alarm, and motor over-current.
The alarm LEDs are lit depending upon the alarm code. The LED display
remains on even after the power is shut off.

The write enable sensor is the simular to Figure 4.30, but because of
the contrast in the sensor area, the circuit is connected to -6 V
instead of the BDAC output.
The sensor circuit also includes a over-current detection circuit and
saturation detection circuit for the power amplifier. This allows early
detection of a tape drive circuit malfunction, protecting the tape from
damage.
+5.0V

Tri

>-~-- *BOTMK

(*EOTMK)

RI

BDAC
(EDAC)

R3

R2

SDAC

Figure 4.30

BOT/EOT sensor circuit

B03P-5325-0100A ••• 02

4 - 46

4 - 47
(5)

Demodulator interface

Table 4.14

The demodulator circuit is contained partly in the read circuit, and the
rest of the circuit is contained in another PCA. As shown in Figure
4.24, the differential pulse generator, MPX and stop signal generator
are contained in PCA 'RDA', and the VFO, 1/2 frequency divider, bit
value determiner circuit, and phase error detector circuit are contained
in DEIA.

Item
1
2
3

Table 4.12 lists the
the demodulator).
Table 4.13 iists the
'VFO'.
Table 4.14 lists the
Table 4.15 lists the
Table 4.12
Item

input signals to PCA 'RDA' (i.e., signals to
4
signals transferred from PCA 'RDA' to PCA
5
other input signals to PCA 'VFO'.
output signals from PCA 'VFO'.
Input signals to PCA 'RDA'

Signal name

PCA 'VFO' input signals

Signal name

Description
Signal
that
resets and then
VFO start (*VFOS)
starts the VFO
Control signal that indicates
Speed signal (*HSP)
the tqe !l!_eed
Control signal that indicates
1600 signal (Bl600)
the recording density
High gain signal (*HIG) Signal for changing the VFO
_.1.ain
Signal for starting data
Phase OK (PHOK)
demodulation

Table 4.15

Description

Item

PCA 'VFO' output signals

Signal name

Description
Clock
signal
for sampling the
Read clock (*SRICO to 8)
demodulated s!l!!.al
Demodulated data
Data in binary format
(*DEMEO to 8)
(i.e., "l" or "O")
Phase error (PHEO to 8) Phase error detection signal

1

LWR data (WMDTO to 8)

2

Time sense (TSNSO to 8)

3·

VFO start (*VFOS)

4

Write clock (*WTOSC)

Data at LWR time
Signal for detectin the block
of each track
Signal for resetting and then
starting the VFO
Basic frequency clock signal

5

Backward (BWD)

Indicates the tape direction.

(2)

6

Read loop, write read
RDtWR

Indicates the LWR mode.

The following table lists the DC voltage sgenerated by the power supply unit:

Table 4.13
Item
l
2
3

1
2
3

Signals between PCA 'RDA' and 'VFO'

Signal name

Description
Peak pulse (PEKPO to 8) Rising and falling edge pulses
of the_l!eak signal.
Stop signal (STOPO to 8) Signal for stopping the VFO at
TSNS chaqe
Signal that indicates the peak
Peak signal (RDDTO to 8) points of the signal wave read
from the tape.

B03P-5325-0 lOOA, •• 02

DC output

DC
output
(V)

Output voltage
precision (V)

+ 5.0

+4.75 "'+5.25

+ 6.0

-5.58 "' -6.42

+12.0

+11.0 "'+15.0

- 5.2

Load capacity
(A)

Protection circuit
exists (o)
does not exist (x)
over
current

17 "'22

over
low
voltage voltage

0

0

0

1.5

0

x

0

1.0

0

x

0

-4.94 "' -5.46

4.0 "'6.0

0

0

0

+24.0

+22.08 "'+26.40

0.9 "'4.8

0

x

0

-24.0

-22.08 "' -26.4

0.1 "'6.0

0

x

0

1.0

"'
0
"'

4 - 47

4 - 48

4.6
4.6.1

4.6.2

POWER SUPPLY UNIT

(1)

Outline

(2)
(3)

The use of switching control allows stable DC current to be supplied to
the load.
Over-voltage and over-current detector circuits are provided to protect
the load and the power supply.
A control circuit is provided for sequenced operation at the rising and
falling edges of each DC power output and for displaying abnormal
conditions.

Block diagram
The block diagram is shown below:

The power supply unit receives single-phase 100-120 Vac or 200-240 Vac, and
delivers DC power necessary to operate the system. This power supply unit
has the following three features:
(1)

Configuration

Rectifier
circuit
NFB
Input
voltage,
singlephase AC

RL

Rush
current

Rectifier

preven-

tion

circuit

circuit

Switching
circuit

Rectifier
circuit

Rectifier
circuit

The operator panel is shown below:
CNJ74

CNP73

CJ

C::=::J

'ALARM!

Over current

Over voltage

detection

1

circuit

llld voltaae
regulator
circuit

0

0

PNRA PNRB

0

OVE

0

0

-24VE

0
-24VE

0

·o

CNJ7S

CJ

Rectifier

Pulse control

circuit

circuit

-24VE

CNJ72

0

+SV MGN

LOW VOLT
ADJ O

control circuit

Main line

CNJ71

Rectifier
circuit

CNIS

Power supply

+5V MGN
HIGH VOLT ADJ

0

IA

D

+SV VOLT ADJ

Switching
circuit

switch

D

Rectifier
circuit

Rectifier
circuit

6

/\OiX)V-

+SV
MGN

AC240V

Over current
-S.2V

detection

MGN

circuit

Overvoland voltage
rqulator
circuit

-5.2V VOLT ADJ

0
-S.2V MGN
HIGH VOLT ADJ

0
-5.2V MGN
LOW VOLT ADJ

0

Front view
Figure 4.31

INPUT

Pulse control
circuit

0
Figure 4.32

Power supply unit block diagram

Rear view
Power supply unit operator panel

B03P-5325-0100A ••• 02

4 - 48

4 - 49
4.6.3
(1)

Operations

(3)

Turning power on/off

This power supply unit can operate at either 100 to 120 Vac or 200 to
240 Vac, The switching is done by changing the location of connector
CN15. See the operator panel view for the correct location of connector
CN15.

Power is turned on/off by the I/O switch on the front panel:
I position
Power is on.
0 position --- Power is off.
(2)

Changing input voltages

Abnormal conditions

4.6.4

When the power supply or the load becomes abnormal, the power supply is
shut off immediately, and one of the alarm LEDs lights. The alarm LEDs

The +5 V VOLT ADJ knob adjusts the output voltage of the +5 V.
knob clockwise increases the absolute value of the voltage.

are:

(a)
(b)

ALARM PWR A, B:
ALARM 1, 0:

Lighted when the power supply becomes abnormal.
Lighted when locations other than the power supply
become abnormal. The display indicates the alarm
code.

Voltage adjustment
Turning this

The -5.2 V VOLT ADJ knob adjust the output voltage of the -5.2 V.
this knob clockwise increases the absolute value of the voltage.
Note:

Turning

Do not turn the following adjustment knobs; they are already adjusted
before shipment:
(D .f-5 V MGN HIGH VOLT ADJ

(2) +5 V MGN LOW VOLT ADJ
Q) -5. 2 V MGN HIGH VOLT ADJ
@ -5.2 V MGN LOW VOLT ADJ

The following table describes the meanings of the alarms:
Alarm
1

0

Description

PWRA PWRB

x

+5 V over-voltage or over-current
(2) -6 V over-current
(3) +12 V over-current
(4) Abnormal temperature in the +5 V, -6 V, or
+12 v circuit

(1)

x

-5.2 V over-voltage or over-current
(2) +24 V over-current

(1)

(3) -24 V over-current

( 4) Abnormal temperature, the -5.2 V, +24 V,
or -24 V circuit
(5) Abnormall high temperature at the rush current
prevention resistor

x
x
x

Abnormal temperature is detected (THS 1) due to the
stoppage of FANl (further away fromthe power
supply).
Abnormal temperature is detected (THS2) due to the
stoppage of FAN2 (closer to the power supply).

x
Note:

Abnormally high temperature in the power amplifier
of the servo circuit.
"X" indicates that the LED is lighted.

Perform power shut-off procedure before turning the power on again.
sure that the cause of the alarm has been removed.

Be

B03P-5325-0100A ••• 02

4 - 49

4 - 50

4.7
4.7.1

CONVERSION INSTRUCTION (M244XA=>M244XAC)
Interface line terminator

Remove the line terminators on PCA:Cl6B-5327-0060#U (IC location: AE7, AJ7,
AN7), when the buffer adapter is installed.
(refer to section 2.4.2)
Also check the line terminators on PCA:Bl7B-0160-00IO#U, remove if the drive
is not located at the end of the daisy chain. (See. Figure 4.32)
4.7.2

Drive address & bus parity check setting

The setting of the drive address and the write bus parity check mode is
located in PCA:Cl6B-5327-0060#U. It is same as M244XA. (refer to section
2.4.2)
The setting of the write bus parity eheck is for the drive itself and should
be set to check parity because the parity of the write data between the
buffer adapter and the drive should be valid.
The write bus parity check mode for the adapter is described section 4.8.3.
4.7.3

PCA location and cable connection

PCA parts number is Bl7B-0160-00IOA#U and its location in the PCA shelf is
!A05. Remove two dummy board (!A04, !A05) and install the adapter board into
slot !A05. Connect two internal cables between the buffer adapter and the
drive. Figure 4.33 shows the cable connection.
4.7.4

Buffer parameter

s~tting

There are eight parameters for the buffer adapter.
Table shows the parameters.
These settings can be executed by the offline diag. of the operator panel.
This is nearly same as device type setting. (refer to Chapter 6, REP 2320)
(!)
(2)

Set the drive to offline and servo off state.
Do the items as shown in Table 4.8.
Item 28, 29 are for the write opration into non-volatile memory.
If it is not necessary to write into non-volatile, these items can be
passed.

Note:

I. Three Line Terminators. (parts. NO. RM 57)

(on the IC socket)

Figure 4.33 Overview of PCA 'BUF'

B03P-5325-0!00A ••• 02

4 -

so

4 - 51

Interface
without buffer
Cl6B-5327-0060#U

Buffer adapter

4.8

Bl7B-0160-0010A#U

4.8.l

~-l_J ___~
12

II

10

09

08

07

06

05

04

03

02

01

l_T_ _!iG,IJElfllfl
'·
'~ II
I

I

'
I
I'.

I

!

II______
Figure 4.34

I

\._)'-_Ji

HG
iD C1

. __ _j_ __ _;__ ----

'

I

I

:

I'

-~l

Cable connection between buffer and drive

BUFFER ADAPTER
General description

The buffer adapter is placed between host controller and M244XA interface.
The buffer adapter can reduce restrictions on command reinstruct time and
repositioning time.
In write a operation, the data transfer will start without physical tape
motion and can end before the actual tape operation starts, The buffer
adapter will issue write command to the drive after data is stored in the
buffer adapter. During the transferring data to the drive, the buffer adapter
can accept new write commands. If the data transfer of the next command is
completed before the last write coDDDand is transferred to the drive, the
buffer adapter will issue the next write command within a drive reinstruct
time so that the drive can maintain the streaming operation.
If the host system has a low average transfer rate·, repositioning may occur.
The buffer adapter will accept coDDDands during repositioning.
In read ·mode, when the buffer adapter dete.cts the read coDDDand, the adapter
issues the read command to the drive and accepts the data from the drive.
After a complete block of data is stored in the buffer it is then transferred
to the host controller. During the transfer to the host, the adapter will
prefetch data blocks so to fill the data buffer. The data which has been
already stored in the buffer will be transferred to the host when the next
read command is issued.
The buffer adapter can achieve the nearly same performance as the host system
but the maximum performance is limited by the drive specification.
4.8.2

Buffer adapter features

(1)

256 kbytes data buffer

(2)

Partitioning of the data buffer

The 256 kbytes of buffer is used in both read and write.

The data buffer is divided into
kbyte segments (256 lk). The data
block may share several segments.
(3)

Maximum block size and buffer overwrite
The buff er adapter can handle up to 64 kbytes for each data block. If
the block length exceeds 64 kbytes, the buffer adapter will post HER to
the host in read or write mode.
Inside the adapter, there are some limitation to control the data
buffer. Minimum 8 kbytes, maximum 64 kbytes are limitations. This
limitation is used only in the buffer full state. There is a setting
whether new data will start to transfer or not. One of·the setting is
that the data transfer will wait until the buff er has space for one
complete block. The other option is to allow data transfer if there is
Kbyte or more available in the buffer. This setting is named buffer
overwrite mode, (Refer to section 4.8.7)
Internal limitation is automatically expanded up to 64 kbytes, if the
block length exceeds 8 Kbytes.

B03P-5325-0100A, , , 02

4 - 51

4 - 52

(4)

Hardware error recovery

(5)

The adapter will try to recover by itself when the recoverable error is
encountered.

In a write operation, when the adapter detects HER the same from the
drive, the logical and physical head positions may not be the same so
that a software recovery procedure is not practical. So the recovery is
done by the adapter.
When the retry out is encountered, HER is posted to the host controller
when the next command is received.
Variable length erase command is used to erase the error block in a
retry operation. The adapter checks the total IBG length as a result of
the retry and controls the retry limit not to exceed 3.5 m (11.5 feet)
in GCR and 5 m (16 feet) in PE.
Also the adapter checks the retry times which are selectable. (Refer to
section 4.8. 7)
In a read operation, when the retry out is encountered, HER is posted to

the host and software recovery is available because the logical and
physical head position are the same in a read operation.
If the software tries to recover, then the retry times may be equal to
(hardware retry) times (software retry).
There are 4 options (16, 8, 4, 0 times) for the retry modes which are
selectable to fit the user requirements. The number of retries should be
set within the timer timeout of the host controller or the operating
system. During a Write retry sequence, the adapter can accept other
commands.

Note:

Read prefetching and the early warning area
In read type operaion, if the adapter receives two consecutive read
commands, the adapter will try to fill the data buffer with up to 64
blocks.
Early warning area & Logical EOT mode
The early warning area is a caution area near the EOT. It starts about
80 feet before the EOT marker.
When the adapter detects this area during a write operation, the adapter
starts to measure the total length written from the beginning of the
early warning area, The adapter has a setting to support logical EOT
mode. If this mode is set, the adapter will post the EOT signal to the
host controller when it reaches about 50 feet from the beginning of the
early warning area. Before the logical EOT, up to 64 write commands will
be buffered. (Refer to section 4.8.7 for logical EOT setting.)
If the logical EOT mode is not set, the number of blocks which can be
stored in the data buffer is decreased gradually to 16, 8, 4, 2 blocks.
This is done because when the adapter finds the EOT sticker with 256
kbytes in the buffer, it takes about 13 feet (4 m) of tape at 1600 BPI
without any retry.
Table 4.16 shows the number of write commands that can be buffered. Also
the retry number will be reduced to 4 with variable length erase.
In the read type operation, the adapter ignores early warning, the
prefetching of the data is continued until the physical EOT. When the
EOT marker is detected prefetching of the data is stopped,

The Total time of retry is calculated as follows;
Table 4.16 Write command buffering in early warning area
of non logical EOT mode

T = (Repo. time x 1.3 + (data bytes x N) I (density x speed)) x
(number of retry)

Number of commands that
can be buffered
If the retry time is specified to "O", the adapter will not try to
recover. The recovery should be done by the operating system. In this

Maximum block size
6250 BPI

1600 BPI

case, every command is executed in a non-buffered mode.

1 B - 8
8 kB - 16
18 kB - 32
32 kB - 64

EOT area
In the tape early warning area, every command will be executed with
non-buffered mode.

B03P-5325-0100A ••• 02

kB
kB
kB
kB

16
8
4
2

8

4
2
2

4 - 52

4 - 53

(6)

4.8.3

The head position synchronization between buffer and drive

(I)

a. Write operation

For the purpose of the data integrity, whole data blocks which are
stored in the buffer will be written on tape prior to the execution of
that command. In this case, the command which causes the
synchronization of host and drive will not terminate until the complete
data buffer is written to the tape, When Write Synchronize command
(WSYNC) or a backward type command is issued, synchronization is

Interface
Interface signal pin assignment
Interface signals are shown in Table 4.17.

(2)

Difference between M244XAC and M244XA interface signals

a. Signals not to be used in M244XAC model

executed.

There are three signals which are not used in the buffer adapter. The
buffer adapter sets the drive to high speed, so HISP and LGAP signals

There are two selectable conditions about the write tape mark command.

are not used.

a. Consecutive write tape mark command are issued.
b. A write tape mark command is issued.

Not used signals:

connector C, line 36-LGAP
connector D, line 50-HISP

(Refer section 4.8.7 setting of buffer parameter (PS)).
Note:
b. Read operation
During prefetching the data from the tape, if EOT, BOT or HER from the
drive is encountered, synchronization will occur. Also when the adapter

In M244XAC model, hard error signal is asserted when the any error is
encountered, even if it is recoverable.
In M244XAC mode, the buffer will retry by itself if a simple data check
is encountered. HER is asserted only in the cases below.

There are two selectable conditions about tape mark.
- Consecutive tape marks are detected
- A tape mark is detected

Retry out of Data check

(Refer section 4.8.7 setting of buffer parameter (QS)).
Transfer rate
The adapter has the ability to transfer data to or from the host
controller at variable transfer rates that is independent from the drive
rate. The transfer rate should not be set to exceed the maximum average
transfer rate of the host controller.
There are 16 selectable rates from 60 kbytes to I Mbyte. (Refer section
4,8.7 buffer parameter setting (PO)).

(8)

Ramp delay emulation
The purpose of this feature is for the host controller to prepare the
write data in its FIFO or data buffer.
There are 4 selectable setting from 0.2 msec to 5.0 msec. (Refer section
4.8.7 (Pl)).

(9)

b. Hard error (HER)

synchronizaticn will occur. Also a write command issued after a read
type command causes synchronization.

receives a space file command or a command to change the direction,

(7)

If the interface mode is set to mode C (refer to Chapter 5), HISP
signal means density select.

Speed and IBG length control
The high speed select and the long gap select signal is neglected by the
buffer adapter. The adapter sets the drive in high speed and ignores
the LGAP signal.

When a retry for a data check exceeds the limit of setting, the buffer
adapter will post the HER to the host controller.
If this occures in a write operation, recovery by software is not
suitable because the logical and physical records are not the same.
In the case of a read operation, HER is asserted when the retry out is
encountered, software recovery is available because the physical and
logical record is the same.
Write bus parity check
When the buffer adapter detects a parity error on the write data bus,
HER is posted to the host controller. In this case the previous
transferred data was written on tape so software recovery can be
available.
Buff er overwrite
When the buffer is nearly full and if new write data will exceed the
rest of the buffer, HER will be posted to the host controller. In this
case software recovery is also available.
If the buff er parameter is set not to post HER, the buffer adapter stops
the data transfer until free space is available in the buffer and
restart the data transfer.

B03P-5325-0100A ••• 02

4 - 53

4 - 54
(3)

Illegal command, invalid command

Command code

If the cotmnand code is illegal such as a write command in file protect
status or a command code is not identified, HER is posted to the host
controller.

Command codes are indicated by five signal lines, i.e. Edit, Write,
Erase, Write file mark, Reverse.
The command decode table is shown in Table 4.18.
4.8.4

Invalid sequence of interface
If the buffer detects the new go pulse during data busy, HER is posted
.and the last command is terminated. If the rewind or unload command is
issued during data busy, HER is also posted and the last go command is
terminated and then rewind or unload command will be executed.

Command Operation

In this section, the difference from M244XA model is described. Basically
the command operations are the same as the M244XA. (Refer to Chapter 6.)
(1)

Write synchronize (WSYNC)

Drive is of fline when go pulse is issued

This command causes the adapter to synchronize the
position to the logical position. This means that
written in the buffer will be written on the tape,
FBSY and DBSY signal are active until the complete
buffer is written on the tape.

If the go, rewind or unload pulse is detected in the offline state, HER
is posted to the host controller. Only sense command is available if
the drive is in the offline state.

physical head
the data to be
one for one.
data block in the

Equipment malfunction

4.8.5

If the buffer adapter detects a equipment malfunction of the dirve of
buffer itself, HER is asserted to the host controller.

M244XAC has 27 bytes of sense data which indicates the error conditions.
First 8 bytes of Table 4.19 are transferred to the host controller when the
SNS command is received and 27 bytes are transferred for EXSNS command.
SNS or EXSNS command is very helpful for the field engineer to maintain this
MTU. The operating system should issue these command to gather the error
logging data when the buffer adapter posted the HER.
Also it is helpful to issue an EXSNS command at the job end, because data
checks are automatically retried by EXSNS by the buffer and information
regarding media quality can be transferred.

Software will try to write or read over 64 kbytes
If the buffer detects that the length of the data to be written or read
is over 64 kbytes, HER is posted. The buffer adapter can not handle
over 64 kbytes.

Sense Byte

Not capable is detected
(1)

Description of the differrence from M244XA

Long IBG detected
a. Sense byte 3, bit 7-Buffer installed
IBG should be less than 15 feet at CCR mode and less than 25 feet at PE
mode.
Back into Load Point
c. Corrected error (CER)
CER is not asserted usually, but can be posted with HER.

This bit is for the identification flag for M244XAC
b. Sense byte 16, 17, 18-Sequence number of the error block from BOT
These three bytes are the sequence number of the error block from BOT
when the buffer adapter posted HER signal.
c. Sense byte 19-Remaining blocks in buffer

d. Read/write strobe (RSTR/WSTR)
The pulse width is 500 nsec. The interval of the strobe varies from l
µsec no 16.6 µsec, because the transfer rate is available from l Mbyte
to 60 kbytes.
Data setup and hold timing between strobe and bus is the same as the
M244XA models.

This byte shows the remaining data blocks in the data buffer when the
write retry out was encountered.
Data of remaining blocks should be lost.
d. Sense byte 20, 21-Read retry count
These two bytes indicate the number of hardware retries for read errors.

B03P-5325-0100A ••• 02

4 - 54

4 - 55
Table 4.17

e. Sense byte 22, 23-Write retry count

Interface signals
Pin location

These two bytes indicate the number of hardware retries for write error.
Signal name
f. Sense byte 24, 25-Buffer parameter
Formatter busy
Last word
Write data bit 4
Initiate command
Write data bit 0
Write data bit l
Unit check
not used

These two bytes indicate the buffer parameter which are set in non
volatile memory of the drive.
g. Sense byte 26-Device type
This byte is same as sense byte 25 of M244XA.

(FBSY)
(LWD)
(WD4)
(GO)
(WDO)
(WDl)
(UCK)

(REV)
Rewind
(REW)
Write data parity
(WDP)
Write data bit 7
(WD7)
(WD3)
Write data bit 3
Write data bit 6
(WD6)
Write data bit 2
(WD2)
Write data bit 5
(WD5)
Write
(WRT)
not used
(EDIT)
Edit
(ERASE)
Erase
(WFM)
Write file mark
not used
Transport address 0 (TADO)
(RD2)
Read data bit 2
Read data bit 3
(RD3)
Reverse

Read data parity
Read data bit 0
Read data bit l
Load point
Read data bit 4
Read data bit 7
Read data bit 6
Hard error
Tape mark detected
Identification burst
Formatter enable
Read data bit 5
End of tape
Offline & unload
GCR mode
Ready
Rewinding
File protect
Read strobe
Write strobe
Data busy
High speed
Corrected error
Online
Transport address l
Formatter address
High speed select

B03P-5325-0100A ••• 02

(RDP)
(RDO)
(RDl)
(LDP)
(RD4)
(RD7)
(RD6)
(HER)
(TMD)

(ID)
(FEN)
(RDS)
(EOT)
(UNL)
(GCR)
(RDY)
(RWD)
(FPT)
(RSTR)
(WSTR)
(DBSY)
(HSPD)
(CER)
(ONL)
(TADl)
(FAD)
(HISP)

CN

s

G

c
c
c
c
c
c
c
c
c
c
c
c
c
c
c
c
c
c
c
c
c
c
c
c
c

02
04
06
08
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50

01
03
05
07
09
11
13
15
17
19
21
23
25

D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D

01
02
03
04
06
08
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50

05
05
05
05
05
07
09

I)

D
D

Direction
Host

MTU

27

29
31
33
35
37
39
41
43
45
47
49

11

13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49

4 - 55

4 - 56
Table 4.18
Interface signals
EDT WRT WFM ERS REV

Command decode table

Table 4.19

Command (Mnemonic)
Mode A

I

Byte

Mode B

Mode C

0

0

0

0

0

Read (RD)

0

0

0

0

1

Backward read (BRD)

0

0

0

1

0

Space (SP)

0

0

0

1

1

Backspace (BSP)

0

0

1

0

0

Space file with data (SFD)

Space file no
data (SF)

0

0

1

0

1

Backspace file with data (BSF)

Backspace file
no data (BSF)

0

0

0

1

1

0

Space file no data (SF)

Space file with
data (SFD)

0

0

1

1

1

Backspace file no data (BSF)

Backspace file
with data (BSFD)

0

1

0

0

0

0

1

0

0

1

0

1

0

1

0

1

1

0

1

1

0

1
1
1
1
1

Write

Notes:

Interven- Device
tion re- type
quired(U)
(=l)

l

Reverse

Write

2

Ready
status

Online

3

4

bit 4

Data
check
check (U)
(U)

Command
overrun

Edit

Write
Tapemark

Erase

Rewinding

File
protect

GCR mode

status

Tape
mark
detect

Illegal
command
(C)

Not
capable
(U)

Device
check
(E)

Operator
failure
(E)

Write bus No (E)
parity
block
error (D) detect

Buffer
install

Data
not (U)
found

Noise

ID burst
error

Uncorrec table
data (D)

Format

Multi
track

No (D)
track
error (D) pointer

EFT 4
bit p

5

ETP 7
bit 0

ETP 6
bit 1

ETP 3
bit 3

ETP 9
bit 4

ETP l
bit 5

ETP 8
bit 6

ETP 2
bit 7

6

Fault symptom code (upper byte)

Early
begin
(FMTER)

Slow end
/begin
(FMTER)

SAGC
check
(Note 3)

Write
data
parity
check
(UCE)

Velocity
change
(UCE)

Envelop
check

(E)

(U)
ETP 5
bit 2

error
(D)

Sub fault symptom code {most signigicant byte)

0

Variable length erase (VERS)

9

Sub fault symptom code

0

0

Write tape erase (WTM)

10

Sub fault symptom code

1

1

0

Fixed length erase (ERS)

11

Sub fault symptom code (least significant byte)

0

1

0

Write synchronize (WSYNC)

12

Error servo state

1

1

Sense (SNS)

13

Error device state

1

0

14

Start
read
check
(FMTER)

No operation

Set 6250 BPI (S6250)

0

1

1

1

1

0

1

1

Extended sense (EXSNS)

1

1

l

0

Data security erase (DSE)

l

1

l

bit 7

Equip-

8

0

bit 6
Unit
check

Corrected error

High
speed

RTH2

Long
gap

High
speed

BOT

EOT

(U)

(U)

(WT)

1

Set 1600 BPI (Sl600)

bit 5

ment

Fault symptom code (lower byte)

1

2.
3.

bit 3

7

0

1.

bit 2

Set 6250 BPI
(S6250) *4

0

1

bit l

Command
reject
(U)

15
l

bit 0

Sense byte of M244XAC (1/2)

End data
check
(FMTER)

VRC

CRC

error

error

(UCE)

(UCE)

Loop write-to-read (LWR)

Postamb
error

(FMTER)

Crease
detect
(FMTER)

Skew
MISC
error/
error
WTM error (UCE)
(Note 4)

IBG

detect
(FMTER)
Write
trigger
VRC(UCE)

Mode A, B or C is selectable by the offline diag.
Refer to APPENDIX.
- - mark means "Not defined".
Other commands than the above described are "Not defined"
and the cause of "comm.and reject" in sense data.

4.

This command is used to set PE 3200 on other tape drives
This command will set GCR mode in the M244X MTU.

B03P-5325-0100A ••• 02

4 - 56

4 - 57

Table 4.19

Byte

bit 0

l

bit l

l

Sense byte of M244XAC (2/2)
bit 2

J

bit 31 bit 41 bit 5

4.8.6

1

(1)

bit 61 bit 7

Error Recovery
Procedure by using sense bytes
The operating system should check the validity of the operation with HER
signal. If HER signal is asserted, the system program should issue SNS
or EXSNS command to classify the error and to determine the recovery
procedure. Sense bytes should be stored in the error logging file for
the purpose of the maintenance. Error bits of sense bytes should be
checked in the following order.

16

Sequence number of error block from BOT (high order byte)

17

Sequence number of error block from BOT (mid order byte)

18

Sequence number of error block from BOT (low order byte)

19

Remaining blocks in buffer to be written on tape when retry out

20

Read retry count (most significant byte)

21

Read retry count (least significant byte)

22

Write retry count (most significant byte)

23

Write retry count (least significant byte)

1.
2.
3.
4.
5.
6.
7.
8.

24

Buffer parameter byte 0

The recovery procedure is the same for the M244XA's. (Refer to section

25

Buffer parameter byte l

26

Device type

Equipment check
Command overrun
Command reject
Not capable
Data not found
BOT during backward type operation except rewind or unload
Intervention required
Data check

9.4)

(2)

Procedure by using only HER signal
The action of an abnormal condition of the buffer adapter is described
in this section so that the recovery procedure should be known without
using the sense command.

Notes:

1.
2.
3.

4.

(FMTER)means the cause of format error in sense byte 4.
(USE) means the cause of uncorrectable error in sense byte 4.
In write type command, this is the cause of ID burst error in
sense byte 1.
In forward read type command, this is the cause of data check or
equipment check.
In write tape mark command, this indicates write tape mark error.
In write command, this f.ndicates skew error.
Both case, this bit is the cause of uncorrectable error in sense
byte 4.

a. GO pulse except sense command is accepted in intervention required
state.
-- Poat HER, UCK.
--- Load a tape.
·-• Retry the job.
b. Invalid or illegal

~ommand

was issued

-- Poat HER, UCK.
--- Set the write enable ring if needed.
-- Retry the job.
c. Not capable if detected.

No hardware retry.

-- Post HER, UCK when the software will try to read
the error block.
--~ Recoverable by the sof tvare but should
not retry.
-- Exchange a tape to correct one.
After this sequence;
Read or back read, back space c011111Snd is acceptable.
The tape is automatically rewound to BOT and the ID burst will be
written when the write colllllUlnd is accepted.

B03P-5325-0100A ••• 02

4 - 57

4 - 58
d. Data not found (too long IBG).

-- Post HER, UCK.
-- ''BB''++''20''
-- Job abnormal end. Issue REW or UNL
command and retry the job after the
tape is exchanged.
-- Reset the drive and exchange the tape.

No hardware retry.

-- Post HER, UCK when the software will try to read
the error block.
--- Recoverable by the software but should
not retry.
-- Exchange a tape to correct one.

i. REW or UNL command after write retry out

After this sequence;
Read or back read, back space command is acceptable.
The tape is automatically back spaced and spaced and normal IBG will
be generated when the write command is accepted.
e. Back into load point.

When the retry out for write data check is encountered, the buffer
cannot post HER because of REW or UNL command is issued.
-- Reset READY, ONLINE and REWINDING.
REW or UNL command is not executed.
-- ''BB''++''20''
-- Abnormal E.O.J. Retry the job
after the tape is exchanged.
-- Reset the drive and exchange the tape.

No hardware retry.

-- Post HER, UCK and LDP.
-- abnormal E.O.J. if not intended.
-

j. Equipment check detected by drive

f. Write data check
When a write command data check is detected with 0 retry or in the tape
early warning area, no hardware retry is performed. In this case, the
software can recover it.
-- Post HER, UCK.
---Issue back space and erase and
reissue command.
--

-- Post HER, UCK.
-- ''Cx''++''xx'' (FSC of drive) or
''88' '++' '3x''
-- Abnormal E.O.J. If the FSC of
display is ''BB'' or ''3x'', retry the
job after changing a tape.
-- Reset the drive and exchange the tape,
if FSC is ''B83x''. Otherwise
call a field engineer.
k. Buff er overwrite detected
-- Post HER, UCK.
--- Retry the command after reposition a
block.
--

g. Read data check
The data check retry out on read commands is encountered the software
can recover it.
-- Post HER, UCK.
---Issue reposition command such as back
space and reissue command.
--

1. Write data check/buffer

When the write bus parity check or buffer data parity error is detected,
data check or equipment check is set. If the data check is set, the
software can recover it.

h. GO command after write retry out
When the retry out for write data check is encountered, the software can
not recover it because the software can not reposition correctly.
-- Post HER, UCK.
----

-- Post HER, UCK.
-- ''88'' ''51'', if the buffer data parity error
of the write data is detected.
-- Retry the command if FSC is not
indicated at the panel.
Abnormal E.O.J. drive. Retry the job
after changing a tape.
-- Reset the drive and exchange the tape,
if FSC is ''8851''.

After this sequence, new GO pulse is accepted because of the software
retry.

B03P-5325-0100A ••• 02

4 - 58

4 - 59

Table 4.20

rn. Equipment check of the buff er adapter is detected

-- Post HER, UCK.
-- ''88''++''7x''
''88' '+-+''Bx''
t t

88 t

t

.....+ t

f

Ax I

M244XAC Buffer parameter setting

Parameter & meaning

PO:

I

00
01
02
03
04
05
06
07
,08
09
OA
OB

''88' '++''Bx''
-- Abnormal E.O.J.
-- Call a field engineer.

4.8.7
(1)

Buffer Parameter and Drive Address Setting
Drive address and bus parity check setting
The setting of the drive address and write bus parity check mode is
located in PCA:Cl6B-5327-0060#U. It is same as the M244XA. (Refer to
item (1) in subsection 4.2.2.) The setting of write bus parity check is
for the drive itself and should be set to check parity because the
parity of the write data between the buff er adapter and the drive should
be valid. The write bus parity check mode for the adapter is described
in the next section.

(2)

i

OF

Pl:

emulation

~o

&
03

P2:

Buffer parameter setting

Ramp delay

Write retry times
by buffer adapter

00
01
...02
03

There are eight parameters for the buffer adapter.
Table 4.20 shows the parameters.
P3:

This setting can be executed by the offline diag. of the operator panel
through parameter #97.
1.
2.

Set the drive to offline and servo off state (the tape should be
unloaded).

Read retry times
by buffer adapter

00
01

.-at
03
P4:

Contents

Setting

Data transfer
rate

Buffer overwrite
Logical /Physical
EOT mode

Perform the items as shown in Table 4.21.
Item 28, 29 are for the write operation into non-volatile memory.
If PO thru P7 has not been changed it is not necessary to write into
non-volatile memory, in this case items 28 and 29 should be ignored.

l
888
800
727
666
615
571
533
500
470
400
320
250
200
160
60

MB/S
KB/S
KB/S
KB/S
KB/S KB/S
KB/S
KB/S
KB/S
KB/S
KB/S
KB/S
KB/S
KB/S
KB/S
KB/S

0.2 msec.
1.2 msec.
3.0 msec.
5.0 msec.

16 times

: ~~::: ~

0 times (always sync. soft retry OK.)

16
8
4
0

times
times
times-times (soft retry OK.)

"°1i

Stop data transfer & wait for available
buffer space & Logical EQT mode

01

03

Post hard error & expect soft retry
buffer space & Logical EOT mode
Stop data transfer & wait for available
& Physical EOT mode
Post hard error & expect soft retry

06

stop data transfer &: wail tor available

07

butter space & Physical EOT-II mode
Post hard error & expect soft retry
& Physical EOT-11 mode

02

& Physical EOT mode

,

PS:

Buffer
synchronizing

voo

Write:
:
:
Read :
:

:
01

Write:

:
:
:
Read :
:
:

P6:
P7:

B03P-5325-0100A ••• 02

1<(1141<. I

double write tape mark command
or write sync conaand
direction change command-from host
double tape mark. EOT or BOT
or direction change commandfrom host
a write tape mark command
or write sync command
or direction change commandfrom host
single tape turk. EOT or BOT
or direction change coaaandfrom host

Read strobe in
write command

,.-61.

Strobe issued in write mode
No read strobe during write mode.

Write bus parity
check mode

~

Check write bus parity
No check

00

4 - 59

4 - 60
Table 4.21
Item

Buffer parameter setting procedures

Switch to be pressed

7 segment

l

TEST & START

2

UNLOAD till 7 segment
LEDs indicate "97''

3
4

TEST & DENSITY SELECT
RESET
START or UNLOAD
if necessary

PO
Contents
UP/DOWN

6
7
8

TEST
RESET
START or UNLOAD
if necessary

Pl
Contents
UP/DOWN

9
10

TEST
RESET
START or UNLOAD
i f necessary

P2
Contents
UP/DOWN

12
13
14

TEST
RESET
START or UNLOAD
i f necessary

P3
Contents
UP/DOWN

15
16
17

TEST
RESET
START or UNLOAD
if necessary

P4
Contents
UP/DOWN

18
19
20

TEST
RESET
START or UNLOAD
if necessary

PS
Contents
UP/DOWN

21
22
2.3

TEST
RESET
START or UNLOAD
if necessary

P6
Contents
UP/DOWN

24
25
26

TEST
RESET
START or UNLOAD
if necessary

P7
Contents
UP/DOWN

27

TEST

28

UNLOAD till 7 segment
LEDs indicate ''94''

29

TEST & DENSITY SELECT

00

30

RESET

00

5

11

00
00

+

TEST, HOST ON
97

00
00

+

Other LED

6250, 1600 ON

6250, 1600 OFF
94

TEST OFF

B03P-5325-0100A ••• 02

4 - 60

5 - l

CHAPTER 5

TROUBLESHOOTING

The detail of fault symptom code (FSC) is described after the flowcharts.
Note 4:

The symbol used in the table of the FSC has the meanings as shown in
Table 5.2.
Table 5.2
Symbol

Symbol in FSC
Description

@

The most suspicious part of location.

OUTLINE

0

More suspicious part or location.

The trouble procedure is described below. The trouble is classified into two
classes. One is the power on, the other is trouble in an operation.

6.

Suspicious part or location.

After turning on the power switch, the MTU power up diagnostics will take
about three seconds. When there is no error, the 2 digit indicator will
display "OO". If not; pursue the troubleshooting flowchart shown in the
following Figure 5.1.
When an error occurs in the MTU operation, follow the trouble shoting flow as
in Figure 5.2.
Note l:

It is recommended that before any replacement, or adjustment is
performed chapter 6 should be read (Replacement/Adjustment)
carefully and fully understand the details of the procedures and
tools required.

Note 2:

The location and the nichnames of printed circuit assembly (PCA)
are shown in Appendix C. Refer to the Appendix if necessary.

Note 3:

The following symbols shown in Table 5.1 are used throughout flow
charts.
Table 5.1

Symbol of Flowchart

Symbol

Description
Terminals Starting point of the
trouble.

c=)

<>
I

Decision, go ahead according to YES
·or NO.

0

Connector, go ahead same-numbered
symbol in same sheet.

CJ

Connector, go ahead same-numbered
symbol in another sheet.

I

Process

B03P-5325-0l00A ••• 02

s-

l

5 - 2

Notes;

NFB:
MP:

Non fuse breaker
Microprocessor

c
NO

Turnoff
power switch

Fisun: 5.2

Figure 5.1

Power on Trouble (1/2)

A

B03P-5325-0100A ••• 02

5 - 2

5 - 3

Fron Sheet 1

Connect the
cable

NO

Power supply
fliluie.
Replacoit.

A

To Sheet I

Figure 5.1

Power on Trouble (2/2)

B03P-5325-0100A ••• 02

s-

3

5 - 4

START 2

K

NO

ENO

Figure 5.2

Trouble in Operation

B03P-5325-0100A ••• 02

5 - 4

5 - 5

Load check code Ll to L4

MAP No.

© Operation mistake
0 PCA "SVA"
D.

© Operation mistake

0 PCA "SVA"
/::,.

PCA "MPU"

@

Operation mistake

© Tension sensor assembly
@

L4

Door was opened when servo was on, or when
start or unload button was pushed.

-

Reel latch was unlocked.

PCA "RPA"

1110

1130

0 PCA "MPU"

-

© Magnetic tape (no BOT marker)

-

© BOT/EOT Sensors or adjustment
O Tension sensor assembly

1400
1410

0 PCA "RPA"

1110

0 PCA "SVA"
0 Idler tachometer

1420

BOT marker was not found.

1310

D.

PCA "IFC"

1130

D.

PCA "MPU"

@

Operation mistake

-

@

BOT/EOT Sensors or adjustment

0 Magnetic tape
0 PCA "SVA"

Tape was loosened. (could not built up tension)

1410

0 PCA "IFC"

1400

-

PCA "RPA"
PCA "MPU"

1110

/::,.
/::,.

PCA "IFC"

1130

/::,.

TEST No.

-

0 PCA "SVA"

O Reel hub assembly

LS

REP No.

PCA "MPU"

0 Write enable sensor
(Reel hub lock sensor)

L3

Other unit
MAP No.

Explanation

Suspected faulty location

O Door switch

L2

MAP 1100

Go to

Load
check codes
Ll

M2441A/M2442A DLMT

CODE MAP FSC

Tape does not in path.
(BOT and EOT are sensed when start or unload
button was pushed.)

-

M2441A/M2442A DLMT

B03P-5325-0100A ••• 02

MAP 1100

5 - 5

5 - 6

Fault Symptom Codes
Fault
symptom codes

8010 to 88AO

l

Suspected faulty location

1

MAP No.

8010

@

PCA "BUF"

8020

@

PCA "BUF"

8040

@

PCA "BUF"

8840

@

PCA "BUF"

J

CODE MAP FSC

@

I REP

I

PCA "BUF"
I

0 Host adapter

M2441A/2442A DLMT

I

MAP 1110

Go to

0 Host adapter

8841

I

Other unit
MAP No.

Explanation
No.

TEST No.

-

Work RAM error
Timer error
Data buffer write/read compare error
Buffer overwrite encountered. (write)

Buffer overwrite encountered. (read)

@

PCA "BUF"

-

Buffer data parity error at Write command

@

PCA "BUF"

-

Buffer data parity error at Read command

@

PCA "BUF"

-

Unidentified interrupt to microprocessor

@

PCA "BUF"

@

PCA "BUF"

-

8883

@

PCA "BUF"

-

8884

@

PCA "BUF"

-

Buff er not empty when buff er synchronizing.

8885

@

PCA "BUF"

-

Microprogram sequencer error

88AO

@

PCA "BUF"

8851
8852

I

8880
8881
8882

I

0 PCA "IFC"
1------

90xx

I

1130

-

0 PCA "BUF"

-

0 PCA "IFC"

1130

Block counter not 0 when Back into BOT
Command buffer not 0 when head
synchronizing or command pointer unmatch
between host and drive when buff er
synchronizing.
Logical and physical block count
unmatch when buffer synchronizing.

Write bus parity error is detected by
drive and HER is posted from the drive.
Power up sequence error between butter and drive
detected by drive

9000

Timeout of BFRDY or SPCCMD signal

9010

BFRDY & SPCCMD signal are asserted

9020

SPCCMD not reset after BFTST

9030

GO pulse time out of message phase

9040

Command code unmatch during message phase

M2441A/2442A DLMT

B03P-5325-0 I OOA ••. 02B

I

MAP 1110

5 - 6

5 - 7

Fault Symptom Codes
Fault
symptom codes
88Al

llllAl to 811Bl

1

-

@ PCA "BUF"

1130

-

@ PCA "BUF"

1130

-

-

@ PCA "BUF"

1130

-

@ PCA "BUF"

1130
---------··

f-·
@ PCA "BUF"

·--·---------·

~-

t-------·
88AA

88AB

88BO

0 PCA "BUF"

1130

0 PCA "IFC"
~-·-··

@ PCA "BUF"

-

0 PCA "IFC"

1130

0 PCA "BUF"

-

0 PCA "IFC"

1130

0 PCA "BUF"
0 PCA "IFC"

88Bl

1130

0 PCA "IFC"

88A9

MAP 1111

@ Operation error

0 PCA "BUF"
6. PCA "IFC"

1130

-

I

Other unit
MAP No.

TEST No.

1130

0 PCA "IFC"

88A8

REP No.

-

@ PCA "BUF"

0 PCA "IFC"

88A5

I

Explanation
MAP No.

0 PCA "IFC"

88A4

M2441A/2442A DLMT

Go to

0 PCA "IFC"

88A3

I

Suspected faulty location

0 PCA "IFC"

88A2

l

CODE MAP FSC

CRJ (invalid code) is detected by drive
and posted HER from the drive.
CRJ (invalid connnand) is detected by
drive and posted HER from the drive.
HER due to IRQ is posted from the drive
but the adapter cannot recognize IRQ.
HER due to counnand overrun or due to
address change is posted from the drive.
HER is posted from the drive when
density set command is issued to the drive.
Read data parity error from the
drive.
Read/write strobe is detected during
not data transfer sequence.
Data busy of Write connnand is reset
earlier by the drive before LAST WORD is
transferred to the drive.
Density unmatch between drive and
adapter.
FBSY signal from the drive cannot be
detected.
READY signal drops.

1130

H2441A/2442A DLMT

B03P-5325-0100A ••• 02

HAP

1111

5 - 7

5 - 8

Fault Symptom Codes 88B2 to 88BB
Fault
symptom codes
@

PCA "BUF"
11

IFC 0

I---

88B3

@

PCA "BUF"

0 PCA "IFC"

88B4

@

PCA "RUF"

0 PCA "IFC"

8885

@

PCA "BUF"

0 PCA "IFC"
I----

8888

@

PCA "BUF 11

0 PCA "IFC"

8889

@

PCA "BUF"

0 PCA "IFC"

'

@

PCA "BUF"

0 PCA "IFC"
1----

-··--·----·
@

PCA "BUF"

0 PCA "IFC"

I

M2441A/2442A DLMT

I

MAP 1112

Go to
REP No.

TEST No.

1130

1130

-

I

Other unit
MAP No.

Explanation
MAP No.

0 PCA

88BB

J

CODE MAP FSC

Suspected faulty location

88B2

888A

I

FBSY signal from the drive drops before
DBSY signal of the drive is activated.
FBSY signal from the drive reset before
DBSY is reset.
DRSY from the drive is not activated.

1130

-

DBSY from the drive is not deactivated.

1130

1130

1130

1130

1130

HER posted from the drive when Sense
command is issued to the drive.
Drive read bus parity error when Sense
command is issued to the drive.
Invalid read/write strobe is accepted
from the drive when Sense command is
issued to the drive.
Sense data length unmatch from the
drive when Sense command is issued
to the drive.

M2441A/2442A DLMT

B03P-5325-0100A ••• 02

MAP

1112

5 - 8

5 - 9

Fault Symptom Codes AIOO

MAP 1200

Go to

Fault
symptom codes
AIOO

M2441A/2442A DLMT

CODE MAP FSC

Suspected faulty location

©I Host adapter
"BUF"

0 PCA

0 PCA "IFC"

0 PCA "MPU"

Other unit
MAP No.

Explanation
MAP No.

REP No.

TEST No.

-

Command other than sense was accepted in
an intervention required status.

1130

-

M2441A/2442A DI.MT

B03P-5325-0100A ••• 02

KAP

1200

5 - 9

5 - 10

Fault Symptom Codes BlOO to 8420

@

I

Host adapter

0 PCA "IFC"
0 PCA "MPU"
@

Host adapter

0 PCA "BUF"
0 PCA "IFC"
0 PCA
@

0

MPU"

Host adapter

0 PCA "BUF"
0 PCA "IFC"
0 PCA "MPU"
@

Host adapter

0 PCA "BUF"
0 PCA "IFC"
0 PCA "MPU"

8240

@

Host adapter

0 PCA "BUF"
0 PCA "IFC"
0 PCA "MPU"

B310

@

Host adapter

I

-

0 PCA "IFC"
0 PCA "MPU"
@

Host adapter

0 PCA "BUF"
0 PCA "IFC"
0 PCA "MPU"

Command reject
Undefined command was issued.

Interface sequence error

GO pulse was issued in data busy status.

1130

-

Interface sequence error
REW pulse was issued in data busy status.

1130

-

Interface sequence error
OFL pulse was issued in data busy status.

1130

-

Interface sequence error
Undefined pulse was issued in data busy status.

1130

-

1130

Host adapter

Other unit
MAP No.

1130

0 PCA "IFC"

@

I

MAP 1210

TEST No.

-

-

0 PCA "BUF"

B420

REP No.

0 PCA "BUF"
0 PCA "MPU"

8320

M2441A/2442A DLMT

Explanation
MAP No.

0 PCA "BUF"

8230

I

Suspected faulty location

BlOO

B220

]

CODE MAP FSC

Go to

Fault
symptom codes

B210

I

1130

-

Command reject
Backward read type command was issued at load
point.

Command reject
Write type command was issued in file protect
status.

Formatter address or transport address was
changed in data busy was active.

1130

M2441A/2442A DLMT
B 03P-5325-0100A ••• 02

MAP

1210
5 - 10

5 - 11

Fault Symptom Codes C002 to Cll4

l

]

CODE MAP FSC

I

M2441A/2442A DI.MT

I

MAP

Go to

Fault
symptom codes

MAP No.

C002

@

C004

0 Fan cables or cable assy of fan

Fan or fan rotation detect sensor
rotation detect sensor

Other unit
MAP No.

Explanation

Suspected faulty location
REP No.

TEST No.

1340

-

I

1220

C002 Fan alarm 0 was detected.
The fan that is further away from the power
supply unit.
C004 Fan alarm l was detected.
The fan that is close to the power supply
unit.

coos

CllO

©

PCA "SVA"

6

Fan cables or cable assy of fan
rotation detect sensor

@

Idler tachometer

@ PCA "RPA"
6

PCA "MPU"

6

Poor media or soil of Read/Write
head and/or transport.

6

Cables between PCA "RPA" and

1420

Thermal alarm of power amplifiers in UNIDMU
was detected.

Missing pulses of idler tachometer

1110

1110

sensors.

Cll2

0 PCA "MPU11
0 PCA "RP Au'
6
6

Idler tachometer
Cables between PCA "RPA" and

1110

No connection between drive instruction
and expected motor rotating direction.

ll20
1110

sensors.
6

Cll4

Poor media or soil of Read/Write
head and/or transport.

-

0 PCA "RPA"

1110

0 Idler tachometer

1420

6

PCA "MPU"

6

Cables between PCA "RPA" and
sensors.

6

Poor media or soil of Read/Write
head and/or transport.

Intervals of the idler tachometer
pulses incorrect.

-

-

M2441A/2442A DI.MT

B03P-5325-0100A ••• 02

MAP

1220

5 - 11

5 - 12

Fault Symptom Codes Cl20 to C208

REP No.

@ Sensor in the file reel tachometer

1330

0 File reel motor

1300

0 PCA "RPA"

1110

Idler tachometer

I

MAP 1230

1310

6 BOT/EQT sensor

1400

sensors

-

Poor media or soil of Read/Write
head and/or transport.

-

@ Sensor in the file reel tachometer

1330

0 File reel motor

1300

0 PCA RPGMU

1110

6

6

PCA "MPU"

6

Idler tachometer

6 Cables between PCA "RPA" and

sensor
6 Poor media or soil of Read/Write

head and/or transport.

-

1300

0 PCA "RPA"

1110

6

Cables between PCA "RPA" and

6

Poor media or soil of Read/Write

Cl40

Diameter of the machine reel tape
wound that was calculated using the
output pulses of the machine reel
tachometer increased more than prescribed
diameter increment.

1420

Cl42

-

A decrement value of a diameter of tape
wound on the machine reel was greater
than prescribed.

Cl44

Diameter of tape wound on the machine

-

head and/or transport.
@ PCA "SVA"

()Machine reel motor

The measured value of tape volume wound
on the file reel decreased abnormally.
A decrement value of diameter of tape
on file reel was greater than
prescribed.

1330

Idler tachometer

Cl24
Diameter of tape winding or the file reel
that was calculated using the output pulses
of the file reel tachometer was less than
prescribed one.

-

O Machine reel motor

6

Cl20
Diameter of the file reel tape winding
that was calculated using the output pulses
of the file reel tachometer increased more
than prescribed diameter increment.

1420

@ Sensor in the machine reel tachometer

6 PCA "MPU"

Other unit
MAP No.

TEST No.

1420

6 Reel hub

6 Cables between PCA "RPA" and

C208

M2441A/2442A DLMT

Explanation
MAP No.

6

Cl40

I

Suspected faulty location

6 PCA "MPU"

Cl22

J

CODE MAP FSC

Go to

Fault
symptom codes

Cl20
Cl24

r

reel was less than prescribed.

1300

0 Poor media or soil of Read/Write
head and/or transport.

-

6 PCA "MPU"

-

Amplifier saturation of the file reel motor
drive circuit

M2441A/2442A DLMT

B03P-5325-0100A ••• 02

MAP 1230

5 - 12

5 - 13

Fault Symptom Codes C210 to C400

@

f'..

PCA "SVA"

head and/or transport.
PCA "MPU"

I

-

1300
1300

PCA "MPU"

@

Tension sensor assembly

1410

-

0 PCA "RPA"

1110

0 Idler tachometer

1420
1310

f'..

PCA "IFC"

f'..
f'..

PCA "MPU"
Poor media or soil of Read/Write
head and/or transport

-

f'..

Operation mistake

@

PCA "SVA"

-

O Operation mistake
f'.. PCA "IFC"

Amplifier saturation of the machine reel motor
drive circuit

Over current of the reel motor drive circuit

Overflow of servo current calculation

1130

0 PCA "SVA"

0 PCA "MPU"

Other unit
MAP No.

-

0 File reel motor
O Machine reel motor
@

I

MAP 1240

TEST No.

1300

1420

0 Reel hub assembly

C400

REP No.

PCA "SVA"
0 Idler tachometer

@

0 PCA "IFC"

C281

M2441A/2442A DLMT

Explanation
MAP No.

0 Poor media or soil of Read/Write

C240

I

Suspected faulty location

0 File reel motor

C220

J

CODE MAP FSC

Go to

Fault
symptom codes
C210

J

Loss of tape tension during servo on

1130

Stop-failure of servo position

-

1130

M2441A/2442A DLMT

B03P-5325-0100A ••• 02

MAP

1240

5 - 13

5 - 14

Fault Symptom Codes C410 to C804

C802

@

Idler tachometer

REP No.

I

MAP

1300

0 Machine reel motor

1300

0 PCA "RPA"

1110

PCA

6

PCA "SVA"

6

Poor media or soil of Read/Write
head and/or transport

@

Sensor in the file reel tachometer

"MPU"

1330
1420

0 File reel motor

1300

0 PCA "SVA0

-

0 PCA "RPA"

1110

6

PCA "IFC"

1130

6

PCA "MPU"

6

Poor media or soil of Read/Write
head and/or transport

-

6

Operation mistake

-

@

Idler tachometer
PCA "RPAH

1420

Idler tachometer

1300
1090
1110

0 PCA "SVA"

-

0 PCA "MPU"

Machine reel tachometer

1330

0 PCA "RPA"

Idler tachometer

QTP counter did not count at load operation.

Machine reel diameter not detected.

1110

-

0 PCA "MPU"
6

QTP counter count down at load operation.

-

© PCA "RPA"

@

The file reel motor rotated too much in a tape
load operation.

1110

0 PCA "MPU"

@

Incorrect time/motion in starting or stopping

-

0 Idler tachometer

Machine reel motor

Other unit
MAP No.

-

6

6

I

1250

TEST No.

1420

0 File reel motor

0 PCA "SVA"

C804

M2441A/2442A DLMT

Explanation
MAP No.

@

C803

I

Suspected faulty location

0 Cables between PCA "RPA"
sensors

C801

J

CODE MAP FSC

Go to

Fault
symptom codes
C410

I

'

1420
M2441A/2442A DLMT

B03P-5325-0100A ••• 02

MAP

1250

5 - 14

5 - 15

Fault Symptom Codes C805 to C820

@

6.

File reel tachometer

Idler tachometer

I

Reel size error
1330
1110

1420

© File reel tachometer

1330

0 Idler tachometer

1420

0 File reel motor

1300

6.

PCA "MPU 11

-

Idler tachometer

1420

@

Tension sensor

1410

0 PCA "SVA"

-

0 PCA "IFC"

1130

1330

0 Idler tachometer

1420

0 Machine reel motor

1300

6.

PCA "MPU"

Tape velocity check in a tape load operation
"-"

-

© Machine reel tachometer

0 PCA "SVA"

The file reel motor turned too fast in a tape
load operation.

-

@

0 PCA "MPU"

File reel diameter not detected.

1420

0 PCA "RPA"

0 PCA "SVA0

Other unit
MAP No.

1110

0 File reel tachometer

Idler tachometer

I

MAP 1260

TEST No.

1330

1330

6.

C820

REP No.

O Operation mistake
O Machine reel tachometer

0 PCA "MPU"

C810

M2441A/2442A DLMT

Explanation
MAP No.

0 PCA "MPU"

C808

I

Suspected faulty location

0 PCA "RPA"

C807

l

CODE MAP FSC

Go to

Fault
symptom codes
C805

1

The machine reel motor turned too fast in
a tape unload operation.

-

M2441A/2442A DLMT

B03P-5325-0100A ••• 02

MAP

1260

5 - 15

Fault Symptom Codes C840 to C9E4

2

C85F

@

BOT/EOT sensor

REP No.

1110

0 PCA "SVA"

1420

0 PCA "RPA"

1110
1130

@

PCA "IFC"

1130

2

@

PCA "SVA"

-

PCA "IFC"

1130

b

PCA "MPU"

@

Operation mistake

-

/::,

Cable to operator panel

6 PCA "IFC"
C9E2

-

6

O Operator panel

@

Operation mistake

@

Door switch

0 PCA "SVA"
/::,

PCA "MPU"

6

Poor media or soil of Read/Write
head and/or transport.

C9E3

@ Operation mistake

C9E4

© Operation mistake
0 Write enable (or Reel hub lock)

s-

16

Other unit
MAP No.

C84X:

BOT

C85X:

EOT

Tape speed is too slow in a load operation.

-

0 PCA "IFC"

@ Operation mistake

I

MAP 1270

-

© Idler tachometer

0 PCA "MPU"
©Operation mistake

16

Abnormal gain of BOT/EOT sensor

1130

C880

C9El

I

TEST No.

1400

0 PCA "RPA"

0 PCA "SVA"

C89F

M2441A/2442A DLMT

Explanation
MAP No.

6 PCA "MPU"

C884

I

Suspected faulty location

0 PCA "IFCn

C870

J

CODE MAP FSC

Go to

Fault
symptom codes
C840

I

s-

Data of nonvolatile memory error
C880:
C881:
C882:
C883:
Appendix
A

1430

access error

device identification error
not establish data or converted model
check sum error
unexpected EC level is set.

ROM write connnand was issued without issue
of set factory use connnand.

On-line mode was changed forcedly to off-line
mode by pushing reset key.

1130

-

Door was opened at servo on.

1210

-

1390

sensor

Tape load or unload operation was excuted as
door in open.
Load check
Tape load operation was excuted as reel hub
was unlocked.
M2441A/2442A DLMT

B03P-5325-0100A ••• 02

MAP

1270

5 - 17

Fault Symptom Codes C9E7 to CA7X

J

CODE MAP FSC

M2441A/2442A DLMT

I

MAP 1280

Go to

Fault
symptom codes
C9E7

l

MAP No.

REP No.

TEST No.

@ Operation mistake
@ Tension sensor assembly

Tape was not wound on the machine reel or it

PCA "RPA"

1410
1110

O PCA UIDMU
0 PCA "IFC"

1130

@

Other unit
MAP No.

Explanation

Suspected faulty location

was too loose.

0 PCA "MPU"

CAOX
CAlX

@ PCA "MPU"

0 PCA "RPA"
t:;

CA2X
CA3X

@ Poor media or soil of Read/Write

0 Idler tachometer

CA7X

1420
1410
1130

t:;

PCA "IFC"
PCA "MPU"
PCA "SVA"

6

Power supply unit

1500

6

~

Tape was faster or slower than standard speed.
(start end velocity check)

head and/or transport

t:;

Q-counter overflows.

PCA "SVA"

0 Tension sensor assembly

CA4X

Tape ran away.
1130

0 PCA "MPU"

CA4X, CA5X

0 PCA "SVA"

Early stop check

0 PCA "RPA"

1110

0 File reel motor

1300

0 Machine reel motor

1300

0 File reel tachometer

1330
1330

OMachine reel tachometer
0 Operation mistake

CA6X, CA7X
Late start check

0 Poor media or soil of Read/Write

head and/or transport
0 Cable between PCA "SVA" and
PCA "WTA" or between PCA "SVA"
PCA "RPA"
0 Cables between PCA "RPA" and
sensors

M2441A/2442A DLMT

B03P-5325-0100A ••• 02

MAP

1280

5 - 17

5 - 18

Fault Symptom Codes CA8X to CD20

I

J

CODE MAP FSC

MAP No.

REP No.

@ PCA "SVA"

-

i'

0 PCA "WTA"

1120

0 Read/Write head

1240

CC2X
i'

CC7X

I

MAP

@ Operation mistake

-

6

PCA "IFC"

1130

6

PCA "MPU"

-

@ PCA "IFC"

1130

© PCA "MPU"

-

I

1290
Other unit
MAP No.

Explanation

Suspected faulty location

CA8X

ccox

M2441A/2442A DLMT

Go to

Fault
symptom codes

CAFX

I
TEST No.

Incorrect write or erase status.

Appendix
A

Undefined servo command was issued.

CC2X, CC3X
A command was issued to the MTU in a not
ready state.
CC4X, CC5X
A command was issued to the MTU without
BOT status.
CC6X, CC7X
A write command was issued to the MTU while
not write enable.

CC8X
i'

CCFX

@ PCA "IFC"

1130

@ PCA ''MPU"

-

CC8X, CC9X
An undefined command was issued.
CCAX, CCBX
Command was reissued on executing last one.
CCCX, CCDX
Microprogram out of order.
CCEX, CCFX
A write command was issued to the MTU while
being file protected.

CDOO

© PCA "MPU"

-

i'

0 PCA "RDA"

1140

0 PCA "VFO"
0 PCA "RFM"

-

CD02

0 PCA "WFM"

-

0 PCA "IFC"

1130

CD03 "' CDlF

© PCA "MPU"

-

CD20

@ PCA "IFC"

1130

0 PCA "MPU"

-

Microprogram self-diagnostic error

Microprogram self diagnostic error
RAM failure

M2441A/2442A DLMT

B03P-5325-0IOOA •.• 02

MAP

1290

5 - 18

5 - 19

Fault Symptom Codes CD30 to CE2D

1

l

CODE MAP FSC

Fault

MAP No.

REP No.

@ PCA "MPU"

CD33

@ PCA "MPU"

-

0 PCA "IFC"

1130

CD34 "' CDSF

@ PCA "MPU"

-

CD7A

@

PCA "IFC"

-

@ PCA "MPU"

-

0 PCA "RDA"

li40

0 PCA "RFM"
0 PCA "WFM"
0 PCA "IFC"

CE03 "' CE18

@ PCA "MPU"

CElD
CElE

@ PCA "SVA"
0 PCA "MPU"
0 Cable between back panel and

power supply unit
@ PCA "SVA"
0 PCA

"MPU"

@ PCA "MPU"

CE29 " CE2D

@ PCA "IFC"

0 PCA "SVA"

0 PCA "MPU"

Q-counter or register failure

Q-counter or A-counter or B-counter failure
MP

Interrupt circuit failure

Microprogram self diagnostic error

Microprogram self diagnostic error

-

Power supply control failure

1130

CE24
CE25

Q-counter failure

-

1500

0 PCA "MPU"

Other unit
MAP No.

1130

0 Power supply unit or Fuse

@ PCA "RDA"

I

1300

-

@ PCA "IFC"
0 PCA "MPU"

CE21 "' CE23

MAP

TEST No.

1130

0 PCA "MPU"

0 PCA "VFO"

CE20

I

Explanation

Suspected faulty locatfon

CD30 "' CD32

CElF

M2441A/2442A DLMT

Go to

symptom codes

CEOl
CE02

I

Register failure of power supply control

RAM failure

1140

Register failure in read circuit

-

Register failure in write circuit

1130

Register failure in servo circuit

M2441A/2442A DLMT

B03P-5325-0100A ••• 02

MAP

1300

5 - 19

5 - 20

Fault Symptom Codes CE31 to CE41

J

CODE MAP FSC

I

M2441A/2442A DLMT

I

MAP

MAP No.

REP No.

0 PCA "MPU"

-

0 PCA "WRA"

1120

©

PCA

0

SVA"

Other unit
MAP No.

Explanation

Suspected faulty location

6

Cable between PCA "MPU" and PCA "WTA"
or between PCA "MPU" and "RPA"

-

6

Cable between PCA "SVA" and "WRA"
or between PCA "SVA" and PCA

-

I

1310

Go to

Fault
symptom codes
CE31 "' CE33

l

TEST No.
Write circuit or erase circuit failure
CE31:
CE32:
CE33:

EVCllK
WLCllK
WHCllK

"RPA"

CE34

@

PCA "SVA"

©

BOT/EOT sensor

-

0 PCA "MPU"

-

0 PCA "RPA"

1110

6

Cable between PCA "RDA" and
PCA "RPA"

t:. Cable between PCA "MPU" and

PCA "RPA"
CE35

@

-

PCA "SVA"

EOT sensor or sense circuit failure

1400

@ BOT/EOT sensors

0 PCA "MPU"

-

0 PCA "RPA"

1110

t:. Cable between PCA "RDA" and

PCA "RPA"
t:. Cable between PCA "MPU" and

PCA "WTA" or between PCA "MPU"
PCA "RPA"

-

CE38
CE39

@ PCA "SVA"

CE40

@

BOT/EOT sensors

1400

@

Fan alarm cable

@

Cable between PCA
PCA "RPA"

-

@

Cable between PCA "SVA" and
PCA "WRA"

CE41

BOT sensor or sensor circuit failure

1400

0 PCA "MPU"

11

SVA11

and

Servo amplifier failure
CE38:
CE39:

File reel
Machine reel

Cable check from back panel to power supply
unit or from back
Cable check between PCA "SVA" and PCA "RPA"
or between PCA "SVA" and PCA "WTA"

M2441A/2442A DLMT

B 03P-5325-0100A ••• 02

MAP

1310

5 - 20

5 - 21

Fault Symptom Codes CE42 to GEES

CODE

MAP

I

M2441A/2442A DLMT

I

MAP No.
©J Cable between PCA "SVA" and
QJ)

REP No.

Other unit
MAP No.

TEST No.

-

Cable check between PCA "SVA" and PCA "RPA"
Cable check between PCA 11 RPA11 and sensors

-

Cable check between PCA "MPU" and PCA "WTA"

Cable between PCA "RPA" and sensors

(•' Cable between PCA "MPU" and
PCA "WTA"

CE44

~3

Cable between PCA "MPU" and
PCA "RPA"

-

Cable check between PCA "MPU" and PCA "RPA"

CE45

rQ)

Cable between PCA "RDA" and
PCA "RPA"

-

Cable check between PCA "RDA" and PCA "RPA"

CE49

IQ)

Cable between PCA "IFC" and
operator panel

-

Cable check between PCA "IFC" and operator
panel

CESO

''" PCA "IFC"
0 PCA "MPU"

CESl

(Q)

PCA

0

SVA"

0 PCA "IFC"
0 PCA

CE54
2

CESB
CE70

«J:1

I

MAP 1320

Explanation

Suspected faulty location

PCA "RPA"

CE43

J

FSC

Go to

Fault
symptom codes
CE42

I

"MPU"

PCA "IFC"

0 PCA

"MPU"

(i PCA "IFC"

1130

-

Servo table input or output failure

Write current control circuit failure

1130

1130

Servo table read out failure

1130

Tension counter failure

2

CE9F
CEEl

@

PCA "SVAu

-

Unsuitable PCA "SVA", ref er to Appendix

c

CEE2

((jJ

PCA "RDA"

1140

Unsuitable PCA "RDA", refer to Appendix

c

CEE3

:Cj)

PCA "VFO"

Unsuitable PCA "VFO", ref er to Appendix

c

CEE4

©

PCA 11 WTA"

-

Unsuitable PCA "WTA", refer to Appendix

c

CEES

©

PCA "BUF"

-

Unsuitable PCA "BUF", ref er to Appendix

c

M2441A/2442A DLMT

B03P-5325-0100A .•• 02

MAP

1320

5 - 21

5 - 22

Fault Symptom Codes CFOl to CF73

l

CODE MAP FSC

I

MAP No.
@

PCA "MPU"

REP No.

-

@

CF30

@

PCA "IFC"

0 PCA "MPU"

PCA "IFC"

0 PCA "MPU"

@

PCA .. WFM"

0 PCA "IFC"

CF48 "' CF4D

@

PCA "RFM"

0 PCA "IFC"

CF70 "' CF73

1130

1130

-

-

I

1330
Other unit
MAP No,

Power on diagnosis error

CFOl
CF02
CF03
CF04
CF05
CF06
CF07
CFOB
CF09
CFOA
CFOB
CFOC
CFOD
CFOE
CFOF

CF20

CF40 "' CF45

MAP

TEST No.

"

"

I

Explanation

Suspected faulty location

CFOF

CF3A

M2441A/2442A DLMT

Go to

Fault
symptom codes
CFOl

1

Branch test error or ALU test error
Test bit branch error
AND immediate error
EOR
"
OR
"
ADD
"
SUB
"
AND error
OR
"
EOR
"
SUB
"
ADD
"
NAND/LSHIFT error
NOR error
JUMP ON register error

Power on diagnosis error
RAM test error
Power on diagnosis error

Register set or reset test error
CF30
CF31
CF32
CF33
CF34
CF35
CF36
CF37

TEST MODE bit error
DTXFR register error
DTXFR register clear
TPSIG register set error
TPSIG register reset error
BUS IN register set error
BUS IN register reset error
IFSIG register set error

LSI scan test error

1130

-

LSI scan test error

1130

© PCA "MPU"

-

0 PCA "IFC"

1130

Counter test error

M2441A/2442A DLMT

B 03P-5325-0100A •.. 02

MAP

1330

5 - 22

5 - 23

Fault Symptom Codes 0010 to D022

REP No.

I

1240

0 PCA "WTA"

1120

0 PCA "RPA"

1110

0 PCA "SVA"

-

PCA "RDA"

6

PCA "RFM"

-

6

PCA "WFM"

6

Cable between PCA "MPU" and
PCA "WRA" or between PCA "MPU"
PCA "RPA"

-

Shied Block

1240
1120

0 PCA "RPA"

1110

6

PCA "SVA"

l\

Cable between PCA "MPU" and
PCA "WTA" or between PCA "MPU"
and PCA "RPA"

© PCA "IFC"

1130

-

Interface cable

6

Host adapter

© PCA "WFM"

0 PCA "RFM"
0 PCA "IFC"

Noise data detected during erase operation

-

0 PCA "BUF"
6

No block detected in the write command

1370

0 PCA "WTA"
0 Cable between PCA "RDA" and PCA "RPA"

Other unit
MAP No.

1140

6

tP) Read/Write head

I

MAP 1340

TEST No.

-

0 Read/Write head

t~

0022

M2441A/2442A

Explanation
MAP No.

© Poor media or soil of Read/Write

0 Cable between PCA "RDA" and
PCA 11 RPA"

0020

I

Suspected faulty location

head and/or transport

0018

J

CODE MAP FSC

Go to

Fault
s.ymptom codes

0010

I

Write bus parity check at write data transfer.

Parity error of X-buffer BUS IN register

1130

M2441A/2442A DLMT

B03P-5325-0100A ••• 02

MAP

1340

5 - 23

5 - 24

Fault Symptom Codes 0024 to 0220

(i.'.j)

PCA "WFM"

I

-

-

£:,

PCA "RPA"

£:,

Poor media or soil of Read/Write
head and/or transport

© PCA "WFM"

If» PCA "WFM"

0 PCA "VFO"

© PCA "RFM"

-

1130

-

-

© PCA "RDA"

1140

© PCA "VFO"

-

0 PCA "RPA"
6 Cable between PCA "RDA" and

Write trigger VRC error

1140

0 PCA "VFO"

0 PCA "RFM"

Parity error of X-buffer BUS OUT register

1130

1140

head and/or transport

CRCA was not equal to CRCB.

1110

0 PCA "RDA"

© Poor media or soil of Read/Write

Other unit
MAP No.

TEST No.

-

I

MAP 1350

1140

0 PCA "VFO"

0 PCA "IFC"

0180

REP No.

0 PCA "RFM"

0 PCA "RPA"

0110

M2441A/2442A DLMT

Explanation
MAP No.

0 PCA "IFC"

0028

I

Suspected faulty location

0 PCA "RDA"

0026

J

CODE MAP FSC

Go to

Fault
symptom codes
0024

I

Control error of deskewing buffer

VRC error

1110

-

PCA "RPA"
0220

@ Programming mistake or operation

mistake
0 PCA

"MPU"

£:,

PCA "SVA"

£:,

Read/Write head

-

Load point was detected during BWD read type
operation.
BWD read type command was issued on the load
point.

1240

M2441A/2442A DLMT

B03P-5325-0100A ••• 02

MAP

1350

5 - 24

5 - 25

Fauit Symptom Codes D222 to D420

@

BOT/EOT sensor

PCA "RDA11

REP No.

I

1130

BOT/EOT sensor

@

Poor media or soil of Read/Write
head and/or transport

1400
1130

-

0 Read/Write head

1240

0 PCA "RPA"

1110

0 PCA "RDA"

1140

0 PCA "RFM"

-

6

PCA "MPU''

-

6

Cable between PCA "RDA" and
PCA 11 RPA"

-

0 PCA "RPA"

1110

0 PCA "RDA"

1140

0 PCA

11

RFM11

Load point was not detected after ARA-ID
detection during BWD read type operation.

EOT marker was detected during diagnostic
forward command.
!BG (Inter Block Gap) was not detected after
identification burst detection.

!BG (Inter Block Gap) was not detected after
tape mark detection.

-

6

PCA

6

Read/Write head

6

Poor media or soil of Read/Write
head and/of transport

-

6

Cable between PCA "RDA" and
PCA "RPA"

-

"MPU"

Other unit
MAP No.

1140

0 PCA "IFC"
@

I

MAP 1360

TEST No.

1400

0 PCA "RFM"

0 PCA "IFC" operation mistake

D420

M2441A/2442A DLMT

Explanation
MAP No.

c:

D410

I

Suspected faulty location

0 Poor media or soil of Read/Write
head and/or transport

D2FO

J

CODE MAP FSC

Go to

Fault
symptom codes

D222

l

1240

M2441A/2442A DLMT

B03P-5325-0100A •.• 02

MAP

1360

5 - 25

5 - 26

Fault Symptom Codes D480 to D840

J

CODE MAP FSC

M2441A/2442A DLMT

I

MAP 1370

Go to

Fault
symptom codes
D480

l

Other unit
MAP No.

Explanation

Suspected faulty location
MAP No.

REP No.

TEST No.
Data was not found in the prescribed tape
length during FWD read type command operation.

@ Operation mistake

O Poor media or soil of Read/Write
head and/or transport
6

Read/Write head

1240

6

PCA "RPA"

1110

6

PCA "RDA"

1140

t:. PCA "RFM0
t:. PCA "MPU"
t:. Cable between PCA "RDA" and

PCA "RPA"
D810

D820
D880

0 Tape (Media)

0 Idler tachometer

1420

0 File reel motor

1300

O Machine reel motor

1300

t:. Tape cleaner

1230

0 Idler tachometer

1420

O Tension sensor assembly

1410

0 File reel motor

1300

0 Machine reel motor

1300

0 PCA "SVA"

Tape stopped in the shorter distance than the
prescribed one in the crease detection routine
during a read type command operation.

D820
Tape speed out of the tolerance
during identification burst write operation.
D880
Tape speed out of the tolerance
during write operation.

() Cable between PCA "SVA" and
PCA "WTA"
6

D840

Cables between PCA "RPA"

6 Tape cleaner

1230

0 Idler tachometer

1420

0 Tension sensor assembly

1410

0 File reel motor

1300

O Machine reel motor

1300

Start velocity check occured during write
operation

0 PCA "SVA"
0 Cable between PCA "SVA" and ·

PCA "WRA" or between PCA "SVA"
and PCA "RPA"
0 Cables between PCA "RPA" and sensors

6 Tape cleaner

1230
M2441A/2442A DLMT

B03P-5325-0100A ... 02

MAP

1370

5 - 26

5 - 27

Fault Symptom Codes E002 to E204

l

I

M2441A/2442A DLMT

I

MAP

Fault

MAP No.

EOOZ

~l>

Program mistake or operation
mistake

EOBO

O Magnetic tape
0 PCA

11

RDA"

REP No.

Tape mark was detected in read, space, or
backspace command operation.

-

Data Overrun

1140

0 PCA "WFM"
0 PCA "IFC"

1130

0 PCA "RFM"

@

Poor media or soil of Read/Write
head and/or transport

-

0 PCA "RDA"

1140

0 PCA "RFM"
0 PCA "SVA"

-

0 PCA "WTA"

1120

0 PCA "RPA"

1110

0 Read/Write head

1240

0 Shield block

1370

0 PCA "WFM"

TEST No.

-

-

0 PCA "VFO"

Other unit
MAP No.

Explanation

Suspected faulty location

I

1380

Go to

symptom codes

E204

J

CODE MAP FSC

6

Cable between PCA "RDA" and
PCA "RPA"

-

6

Cable between PCA "MPU" and
PCA "WTA" or between PCA "MPU"
and PCA "RPA"

-

Identification burst write error occured.

M2441A/2442A DLMT

B 03P-5325-0100A ••• 02

MAP

1380

5 - 27

5 - 28

Fault Symptom Codes E205 to E206

I

M2441A/2442A DLMT

I

MAP No.
© Poor media or soil of Read/Write
head and/of transport

REP No.

0 PCA "RDA"

1140

0 PCA "RFM"

-

0 PCA "WFM"

-

0 PCA "SVA"

-

0 PCA "WTA"

1120

0 PCA "RPA"

1110

0 Read/Write head

1240

6 Shield block

1370

PCA "RPA"
6 Cable between PCA "MPU" and

PCA "WRA" or between PCA "MPU"
PCA "RPA"
© Poor media or soil of Read/Write

head and/or transport
0 PCA "RFM"
0 PCA "WFM"
6 PCA "RDA0
6 PCA "SVA"

-

1140

-

WTAn

1120

6 PCA

"RPA"

1110

6 Read/Write head

1240

6 Shield block

1370

6 Cable between PCA "MPU" and

PCA "WTA" or between PCA "MPU"
and PCA "RPA"

ARA identification burst write error occured.

-

0

PCA "RPA"

SAGC check occured in write type command.

-

6 PCA

6 Cable between PCA "RDA" and

Other unit
MAP No.

TEST No.

-

I

MAP 1390

Explanation

Suspected faulty location

6 Cable between PCA "RDA" and

E206

l

CODE MAP FSC

Go to

Fault
symptom codes
E205

I

-

M2441A/2442A DLMT

B03P-5325-0100A ••• 02

MAP

1390

5 - 28

5 - 29

Fault Symptom Codes E208 to E20C

M2441A/2442A DLMT

I

0 Adjustment (Azimuth)

head and/or transport
11

WTA11

REP No.

1120

0 PCA "RDA"

1110

0 PCA "VFO"

1140

-

6

Read/Write head

/'\

Cable between PCA "RDA" and
PCA "RPA"

-

6

Cable between PCA "MPU" and
PCA "WTA" or between PCA "MPU"
and PCA "RPA"

-

© Poor media or soil of Read/Write

head and/or transport

1240

-

0 PCA "WTA"

1120

0 PCA "RPA"

1110

0 PCA "RDA"

1140

0 PCA "RFM"

-

0 PCA "WFM''

Skew error occured in a write command.

-

0 PCA "RPA"

0 PCA "RFM"

Other unit
MAP No.

TEST No.

1110

I

MAP 1400

Explanation
MAP No.

0 PCA

E20C

I

Suspected faulty location

0 Poor media or soil of Read/Write

E20A

J

CODE MAP F'SC

Go to

Fault
symptom codes
E208

1

6

Read/Write head

1240

6

Shield block

1370

6

Cable between PCA "RDA" and
PCA "RPA"

-

6

Cable between PCA "MPU" and
PCA "WTA" or between PCA "MPU"
and PCA "RPA"

-

Write Tape Mark Error
E20A
E20C

Tape mark was not written correctly.
IBG after tape mark was not detected.

M2441A/2442A DLMT

B03P-5325-0100A ••• 02

MAP

1400

5 - 29

5 - 30

Fault Symptom Codes E210 to E21C

M2441A/2442A DLMT

I

MAP

MAP No.
@ Poor media or soil of Read/Write

REP No.

0 PCA "RPA"

1110

0 PCA "RDA"

1140

0 PCA "VF0 11

Multi track error in write command operation.

-

6

Read/Write head

1240

6

Shield block

1370

6

PCA "WTA"

1120

6

PCA "SVA"

-

6

PCA "RFM"

-

6

PCA "WFM"

2110

6

Adjustment (Azimuth)

6

Cable between PCA "RDA" and
PCA 11 RPA 11

-

6

Cable between PCA "MPU" and
PCA "WTA" or between PCA "MPU"
and PCA "RPA"

-

@ Poor media or soil of Read/Write

-

head and/or transport

Other unit
MAP No.

TEST No.

-

I

1410

Explanation

Suspected faulty location

head and/or transport

E218
E21A
E21C

I

J

CODE MAP FSC

Go to

Fault
symptom codes
E210

I

0 PCA "RPA"

lllO

0 PCA "RDA"

ll40

E218
IBG was detected at preamble in
write command operation.
E21A
IBG was detected at postamble in
write command operation.

-

6

PCA "RFM''

6

PCA "WRM"

6

Read/write head

1240

6

Shield block

1370

6

PCA "SVA"

-

6

PCA "WTA"

1120
2110

6

Adjustment (Azimuth)

6

Cable between PCA "RDA" and
PCA "RPA"

-

6

Cable between PCA "MPU" and
PCA "WTA" or between PCA "MPU"
and PCA "RPA"

-

E21C
IBG was detected after block format error
occured in write command operation.

M2441A/2442A DLMT

B 03P-5325-0100A

•.• 02

MAP

1410

5 - 30

5 - 31

Fault Symptom Codes E220 to E242

E220

M2441A/2442A DLMT

I

© Poor media or soil of Read/Write
head and/or transport

6

Adjustment (Azimuth)

@

Poor media or soil of Read/Write
head and/or transport

REP No.

operation.

2110

1410
2330

0 PCA "RPA"

1110

0 PCA "RDA"

1140

0 PCA "VFO"

-

6

Read/Write head

1240

6

PCA "IFC"

1130

.">

PCA "SVA"

-

0 Shield block

1370

0 PCA "WTA"

1120

0 PCA "RPA"

1110

0 Adjustment (Read gain)

2330

0 PCA "RDA"

1140

0 PCA "RFM"

-

0 PCA "WFM"
6

Read/Write head

6

PCA "MPU"

6

PCA "SVA"

Start read check occured in write command
operation.

1420

0 Adjustment (Read gain)

0 PCA "WFM"

Drop out was detected in the write command

1140

0 Tension sensor assembly

0 PCA "RFM"

Other unit
MAP No.

TEST No.

-

I

MAP 1420

Explanation
MAP No.

0 Idler tachometer

E241
E242

I

Suspected faulty location

codes

0 PCA "RDA"

E240

J

CODE MAP FSC

Go to

Fault
symptom

J

Early begin read back check was detected in
write command operation

1240

-

M2441A/2442A DLMT

B03P-5325-0100A ••• 02

MAP

1420

5 - 31

5 - 32

Fault Symptom Codes E244 to E282

Suspected faulty location

© Poor media or soil of Read/Write

REP No.

MAP 1430

() Idler tachometer

1420
1330

0 Sensor in the machine reel
tachometer

1330

0 File reel motor

1300

0 Machine reel motor

1300

0 PCA "RPA"

1110

0 PCA "RDA"

1140

0 PCA "WFM"
0 Read/Write bead
6

PCA "IFC"

6

PCA "MPU"

6

Tension sensor assembly

0 Poor media or soil of Read/Write

head and/or transport

Other unit
MAP No.

TEST No.

-

() Sensor in the file reel tachometer

0 PCA "RFM 11

Slow begin read back check
Beginning of data was not detected within
the specified time.

1130

1410

-

E260
CRC error was detected in the write command
operation.

0 PCA "RPA"

1110

0 PCA "RDA"

1140

0 PCA "VFO"

-

E262
CRCB was not equal to CRCD at GCR mode in
a write command operation.

-

E264
CRCB was not equal to CRCC in PE mode in
a write command operation.

0 PCA "RFM11
0 PCA "WRM"

E280
E282

I

Explanation
MAP No.

head and/or transport

E260
E262
E264

M2441A/2442A DLMT

Go to

Fault
symptom codes
E244

J

CODE MAP FSC

-

6

Read/Write head

1240

6

Adjustment Azimuth)

2110

6

Adjustment (Read gain)

0 Poor media or soil of Read/Write

head and/or transport

-

0 PCA "RPA"

1110

0 PCA "RDA"

1140

0 PCA "VFO"
0 PCA "RFM"

0 Adjustment (Read gain)

-

E280
End data check was detected in the write
command operation.
E282
Postample error was detected in the write
command operation.

2330
M2441A/2442A DLMT

B03P-5325-0100A ••• 02

MAP 1430

5 - 32

5 - 33

Fault Symptom Codes E284 to E310

J

CODE MAP FSC

M2441A/2442A DLMT

I

MAP 1440

Go to

Fault
symptom codes
E284

l

Other unit
MAP No.

Explanation

Suspected faulty location
MAP No.

REP No.

TEST No.

0 Poor media or soil of Read/Write

Slow end read back check was detected in the
write command operation.

head and/or transport
0 Idler tachometer

1420

0 Sensor in the file reel motor

1330

0 Sensor in the machine reel motor

1330

0 File reel motor

1300

0 Machine reel motor

1300

0 PCA "RPA"

1110

0 PCA "RDA"

1140

0 PCA "RFM"

E302
E305

b.

BOT/EQT sensor

b.

PCA "MPU"

6

PCA "SVA"

6

Adjustment (Read gain)

1400

2330

© Operation mistake
0 Poor media or soil of Read/Write
head and/or transport
0 PCA "RPA"

1110

0 PCA "RDA"

1140

0 PCA "RFM"

E302
Not capable in read or space command
operation
(The cause is the recorded density
on tape differs from what the host
expected.)
E305
SAGC check was detected in read, space, or
space file command.

0 Read/Write head
0 Cable between PCA "RDA" and

PCA "RPA"
E310

© Poor media or soil of Read/Write
head and/or transport
0 PCA "RPA"

1110

0 PCA "RDA"

1140

Multi-track error was detected in read
command operation.

0 PCA "VFO"
b.Read/Write head.
b.

PCA "RFM"

b.

PCA "WFM"

b.Adjustment (Read gain)
6

1240

2330

Cable between PCA "RDA" and
PCA "RPA"
M2441A/2442A DLMT

B03P-5325-0100A ••• 02

MAP

1440

5 - 33

5 - 34

Fault Symptom Codes E318 to E31C

I

M2441A/2442A DI.MT

Suspected faulty location

I

MAP

REP No.

1110

0 PCA "RDA"

1140

0 PCA "VFO"

-

0 PCA "WFM''
0 PCA "MPU"
/',

PCA "SVA"

/',

Read/Write head

/',

Adjustment (Read Gain)

/',

Idler tachometer

/',

File reel motor

6

Machine reel motor

@ Poor media or soil of Read/Write

head and/or transport

-

1240

lllO

0 PCA "RDA"

ll40

0 PCA "VFO"

-

0 PCA "WFM"

IBG was detected before preamble was
recognized in read connnand operation.

-

0 PCA "RPA"

0 PCA "RFM"

Other unit
MAP No.

TEST No.

-

Poor media or soil of Read/Write
head and/or transport
0 PCA "RPA"

@

I

1450

Explanation
MAP No.

0 PCA "RFM"

E31A
E31C

]

CODE MAP FSC

Go to

Fault
symptom codes
E318

I

E31A
IBG was detected before postamble was
recognized in read connnand operation.
E31C
IBG was detected before the correct
length of postample was detected.

-

6

Adjustment (Read Gain)

2330

6

Read/Write head

1240

t;

Cable between PCA "RDA" and
PCA "RPA"

-

M2441A/2442A DI.MT

B03P-5325-0100A ••• 02

MAP

1450

5 - 34

5 - 35

Fault Symptom Codes E320 to E368

M2441A/2442A DLMT

I

MAP

©! Poor media or soil of Read/Write

REP No.

@

PCA "RDA0

1140

~')

PCA "VFO"

-

0 PCA "RFM"

-

0 PCA "RPA"

1110

0 Adjustment (Azimuth)

2110

Cable between PCA "RDA" and
PCA "RPA"

0 Poor media or soil of Read/Write
head and/or transport
0 PCA

-

RPA"

1110
1140

0 PCA "VFO"

-

0 PCA "RFM"
6

Adjustment (Read gain)

c. PCA "MPU"
6

PCA "SVA"

c. Idler tachometer
c. File reel motor
C.

Machine reel motor

0 Poor media or soil of Read/Write
head and/or transport

-

1420
1300
1300

1110
1140

0 PCA "VFO"

-

0 PCA "WFM"

Start read check occured in read command
operation.

2110

0 PCA "RPA"
0 PCA "RDA"

0 PCA "RFM"

Skew error was detected in read command
operation.

-

0 PCA "RDA"

11

Other unit
MAP No.

TEST No.

-

I

1460

Explanation
MAP No.

6

E360
E362
E368

I

Suspected faulty location

head and/or transport

E340

J

CODE MAP FSC

Go to

Fault
symptom codes
E320

1

E360
CRC error was detected in read command
operation.
E362
CRCB was not equal to CRCD in read.
E368
CRCC was irregular in read.

-

6

Read/Write head

1240

6

Adjustment (Azimuth, Read gs.in)

2110

M2441A/2442A DLMT

B03P-5325-0100A ••• 02

MAP

1460

5 - 35

5 - 36

Fault Symptom Codes E380 to E41C

0 Poor media or soil of Read/Write

REP No.

MAP

0 PCA "RPA"

lllO
l140

0 PCA "VFO"

-

Adjustment (Read gain)

2l10

6

Read/Write head

1240

6

PCA "MPU"

6

PCA "SVA"

-

lllO

0 PCA "RDA"

l140

PCA "VFO"

0 PCA "RFM"
0 PCA "WFM"
t, Adjustment (Read gain)

2110

PCA "RDA"

1140

@

PCA "RFM"
PCA "WFM"

-

0 PCA "VFO"

Postamble error was detected in read command
operation.

-

@

@

End data check was detected in read command
operation.

-

0 PCA "RPA"
0

Other unit
MAP No.

-

6

0 Poor media or soil of Read/Write
head and/or transport

I

1470

TEST No.

-

0 PCA "RDA"

0 PCA "WFM"

E418

I

M2441A/2442A

Explanation
MAP No.

0 PCA "RFM"

E408
E410

I

Suspected faulty location

head and/or transport

E382

J

CODE MAP FSC

Go to

Fault
symptom codes
E380

I

Error in loop-write-to-read
E408
Skew error occured.
E410
Multi-track error occured.
E418
Start read check
(IBG was detected before preamble was
recognized.)

E41A
E41C

PCA "VFO"

-

Error in loop-write-to-read

© PCA "RFM"

-

PCA "WFM"

-

E41A
IBG was detected in data area.

@

@

0 PCA "RDA"

1140

E41C
IBG was detected after block format error
occured.

M2441A/2442A DLMT

B03P-S325-0100A ••• 02

MAP

1470

5 - 36

5 - 37

Fault Symptom Codes E420 to E4E9

E482

E484

@ PCA "RDA"

©> PCA "VFO"
@ PCA ''RFM"
©> PCA "WFM"

REP No.

I

MAP

-

-

-

1140

@ PCA "RDA"

1140

PCA "RFM"
PCA "WFM"

-

0 PCA "VFO"

-

E4EO

@ PCA "RDA"

1140

.?

© PCA "RFM"
©l PCA "VFO"
0 PCA "WFM"

(c~

-

-

0 PCA "IFC"

1130

0 PCA ''MPU"

-

Other unit
MAP No.

Drop out was detected in loop write to read
command operation.

Error in loop-write-to-read
E440 Start read check occured.
E460 CRC error
E463 CRCB was not equal to CRCD in GCR mode.
E464 CRCB was not equal to CRCC in PE mode,
E480 End data check was detected.
E482 Postamble error was detected.
Error in loop-write-to-read
Slow end read back check was detected.

Error in operator panel diagnostics
E4EO: Time sensor error (some track is set.)
E4El: Time sensor error (time sensor is
not set.)
E4E2: DIBG is not set before testing.
E4E3: DBOB is not set.
E4E4: DNOIS is not set.
E4E5: HBLK is not set.
E4E6: HNOIS is not set.
E4E7: DTM is not set.
E4E8: HTM is not set.
E4E9: DARA is not set.

M2441A/2442A DI.MT

B03P-5325-0100A ••• 02

I

1480

TEST No.

1140

0 PCA "RDA"

@

E4E9

M2441A/2442A DLMT

Explanation
MAP No.

©> PCA "WFM"
.?

I

Suspected faulty location

@ PCA "RFM''

E440

J

CODE MAP FSC

Go to

Fault
symptom codes
E420

I

MAP

1480

5 - 37

5 - 38

Fault Symptom Codes FOOl to F200

i!

F003

J

CODE MAP FSC

I

M2441A/2442A DI.MT

MAP No.•
@ PCA "IFC 0
@ PCA "MPU"

REP No.

-

Error in operator panel diagnostics
FOOl:

F003:
@ PCA "RDA"

PCA "RFM"
@ PCA "VFO"

@

0 PCA "WFM"
0 PCA

11

IFC"

0 PCA "MPU"
Fl20
i!

Fl30

@ Magnetic tape
@

Tape path

1120
1110

PCA "WFM"

-

PCA "IFC"

1130

6

PCA "SVA"
Cable between PCA "RDA" and
PCA "RPA"

-

Cable between PCA "MPU" and
PCA "WRA" or PCA "MPU"
and PCA "RPA"

-

0 Idler tachometer assembly

Unmatch error track
One or two correction is not set.
Data check is not set.
Data check is set.
Multi-track error is not set.
WTM error is not set.

-

Tacho counter overflow error

1420

0 PCA "RPA"

-

0 PCA "IFC"

1110

0 Cable PCA "MPU" and PCA "WTA"
or PCA "MPU" and PCA "RPA"

Fl20:
Fl22:
Fl23:
Fl24:
Fl25:
Fl30:

-

6

@ PCA "MPU"

Error detection or correction test

1240

6

6

Unmatch error track at LWR mask test

1110

0 PCA "RFM"
0 PCA ''WTA"

6

Time out trap enable of DVC before
CMISSU
Time out of command acceptance from
IFC to DVC
Time out of reset acceptance of DVC

-

1140

0 Head assembly

F200

1140

0 PCA "RDA"

0 PCA "VFO"

Other unit
MAP No.

TEST No.

1130

I

MAP 1490

Explanation

Suspected faulty location

F002:

FllO

I

Go to

Fault
symptom codes
FOOl

I

-

0 Cable PCA "RPA" and sensors
M2441A/2442A DI.MT

B03P-5325-0100A ••• 02

MAP

1490

5 - 38

5 - 39

Fault Symptom Codes F300 to FFOO

@

Magnetic tape
Wear of tape path

1120

0 PCA "RPA"

1110
1240

Magnetic tape

1140

0 PCA "RPA"
0 Head assembly

1110
1240

@ Tape path (shield block)
@ Head assembly

1370
1240

PCA "RDA"

1140

PCA "WTA"
0 PCA "RDA"

1120
1110

0 PCA "RFM''

0 PCA "WFM"
0 Magnetic tape
O Wear of tape path

@Tape path
@ Wear of tape path

@ Magnetic tape

Head assembly.

-

0 PCA "RPA"

1110

Operation mistake

Other unit
MAP No.

Write SAGC error in Read level test

Read level is not enough.

Feed through test error

-

1240
1140

@

I

1500

-

0 PCA "RDA"

@

FFOO

-

0 PCA "RDA"

@

MAP

TEST No.

1140

@

F340

REP No.

0 PCA "WTA"

0 Wear of tape path

I

to

0 PCA "RDA"

@

M2441A/2442A DI.MT

Explanation
MAP No.

0 Head assembly

F320

I

Suspected faulty location

@

F310

J

CODE MAP FSC
Go

Fault
symptom codes
F300

I

-

A PCA "MPU"

-

A PCA "IFC"

1130

PE read amplifier gain adjustment error
(gain too high)

Already in test mode by field tester

M2441A/2442A DLMT

B03P-5325-0100A ••• 02

MAP

1500

5 - 39

6 - 1

CHAPTER 6 MAINTENANCE

B03P-5325-0100A ••• 02

6 - l

6-2

REP 1000

REPLACEMENT, CHECK AND ADJUSTMENT

General

REP 1010

Check and Adjustment

GENERAL PRECAUTIONS

REP 2010
REP 2110
REP 2210
REP 2220

Replacement
REP 1050

MAGNETIC TAPE PANEL OPENING/CLOSING

REP 1100

PCA REPLACEMENT (GENERAL)

REP 1110

PCA 'RPA' REPLACEMENT

REP 1120

PCA 'WTA' REPLACEMENT

REP 1130

PCA 'IFC' REPLACEMENT

REP 1135

PCA 'MPU' REPLACEMENT

REP 1140

PCA 'RDA' REPLACEMENT

REP 1150

PCA 'SVA' REPLACEMENT

REP 1160

PCA 'BUF' REPLACEMENT

REP 1200

POWER SWITCH REPLACEMENT

REP 1210

DOOR SWITCH REPLACEMENT

REP 1220

ROLLER CATCH REPLACEMENT

REP 1230

TAPE CLEANER REPLACEMENT

REP 1240

READ/WRITE HEAD REPLACEMENT

REP 1300

REEL MOTOR ASSEMBLY REPLACEMENT

REP 1310

REEL HUB ASSEMBLY REPLACEMENT

REP 1320

MACHINE REEL REPLACEMENT

REP 1330

REEL TACHO REPLACEMENT

REP 1340

RIGHT/LEFT FAN REPLACEMENT

REP 1350

GUIDE REPLACEMENT

REP 1360

UPPER/LOWER FLANGE REPLACEMENT

REP 1370

SHIELD BLOCK REPLACEMENT

REP 1380

LOADING FAN REPLACEMENT

REP 1390

WRITE ENABLE SENSOR REPLACEMENT

REP 1400

BOT/EOT SENSOR ASSEMBLY REPLACEMENT

REP 1410

TENSION SENSOR ASSEMBLY REPLACEMENT

REP 1420

IDLER TACHO ASSEMBLY REPLACEMENT

REP 1430

OPERATOR PANEL REPLACEMENT

REP 1440

FILTER REPLACEMENT

REP 1500

POWER SUPPLY REPLACEMENT

REP 2310
REP 2320
REP 2330

B03P-5325-01 ODA ••• 02A

OUTPUT VOLTAGE CHECK AND ADJUSTMENT
AZIMUTH CHECK AND ADJUSTMENT
TENSION SENSOR CHECK AND ADJUSTMENT
IDLER TACHO CHECK AND ADJUSTMENT
BOT/EDT GAIN ADJUSTMENT
DEVICE TYPE/EC LEVEL/BOT GAIN/EDT GAIN
PE READ GAIN SETTING

6-2

6 - 3

REP 1010

GENERAL PRECAUTIONS

General Precautions
l.

The power must be turned off before replacing part.

2.

Correctly calibrated tools must be used.

3.

Be careful not to lose any removed screws, washers and nuts.

4.

Any part that falls into the equipMent must always be removed.

5.

Remember the conditions prior to replacement for the convenience of
checking parts and performance.

6.

When the part listed below table is replaced, it affects the machine
revision, thereby checking the part revision and rewriting the machine
revision. (i.e. EC level; REP2320-l)

B03P-5325-0100A ••• 02

6 - 3

6-4

M2441/M2443

REP 1050

MAGNETIC TAPE PANEL OPENING/CLOSING
Screw A

1.

Top Cover

M2441 /M2443

(A)

Opening the magnetic tape panel
Open the top cover.
Loosen the screw A.

Magnetic Tape Panel

With pushing the pin B on the left side of frame, pull up the
magnetic tape panel until it is held by a latch.
(B)

Closing the magnetic tape panel
While pushing the pin B on the left side of frame, push down the
magnetic tape panel.
Fasten the screw A.
Close the top cover.

2.

M2442/M2444

Screwdriver
PINB

(A)

Opening the magnetic tape panel
Open the front cover.

Frame

Loosen the two screws A.
Pull the magnetic tape panel by the handle.
M2442/M2444

(B)

Closing the magnetic tape panel

Screw A

Push the magnetic tape panel with the handle.

Magnetic Tape Panel

Fasten the screws 'A'.
Close the front door.

Screw A

B03P-5325-0IOOA .•• 02A

6-4

6 - 5

REP 1100
Note l;
Note 2;

I

PCA REPLACEMENT (GENERAL)

This section is applied· to •ach printed circuit assembly (PCA)
located in shelf,
In the case of the standalone, it is necessary to open the rear
cover. The method is shown in the chapter 2, Figure 2.6.

Removal
1.
2.
3.

Loosen screw A and lower card guide plate,
Disconnect all the connectors attached to the PCA.
Extract the PCA using the tool.

Replacement
1.
2.
3.
4.

Insert the PCA by.sliding in the upper and lower grooves,
Insert firmly by using the tool.
Connect all the connectors attached to the PCA.
Raise card guide plate and secure screws A.

Check and Adjustment
Some PCAs require checks/adjustments.
Look at the specified section/instructions.

B03P-5325-0100A.,. 02

6 - 5

6 - 6

REP 1110

1.
2.
3.
4.
5.

I

I

PCA 'RPA' REPLACEMENT

Disconnect all the connectors CNJ41, 42, 43, 47, 48, 51 on PCA 'RPA' and
'WTA'.
Remove four screws 'A' which fasten the head block, then detach the head
assembly including the read/write head, 'RPA', 'WTA' and bracket.
Remove the 'SG' (signal ground) wire which connects between PCA 'RPA' and
read/write head, detaching screw 'B'.
Release the two nylon latches that support 'RPA', and then disconnect the
connector CNJ44 located on PCA 'RPA' from read side head connector.
Remove the 'RPA' from the bracket.

Replacement
1.
2.
3.
4.
5.

Insert the connector CNJ44 into the read side head connector.
Attach the PCA 'RPA' to the bracket and fasten the nylon latches.
Connect the 'SG' wire to the read/write head with the screw 'B'.
Attached the head assembly to the casting panel and fasten the four screws
'A' tightly.
Connect all the connectors CNJ 41, 42, 43, 47, 48, 51 to the PCA 'RPA' and
to the PCA 'WTA'.

Check and adjustment
Head

After this replacement, check and adjustment is required.
Refer to the REP 2110, 2210, 2220, 2330.

Screw'B'

S.G.wire

CNJ 44

PCA 'RPA'

B03P-5325-0100A ••• 02

6 - 6

6 - 7

REP 1120

1.
2.
3.
4.

I

PCA 'WTA' REPLACEMENT

Disconnect all the connectors CNJ41, 42, 43, 47, 48, 51 on PCA 'RPA' and
'WTA'.
Remove four screws 'A' which fasten the head block, then detach the head
assembly including the read/write head, the 'RPA', the 'WTA' and the
bracket.
Release the two nylon latches that support 'WTA', and then disconnect the
connector CNJ45 located on PCA 'WTA' from write side head connector.
Disconnect the connector CNJ46 connected to erase head.
Remove the 'WTA' from the bracket.

Replacement
1.
2.
3.
4.

Connect the write head connector CNJ45 into the write side head connector
and the erase head connector CNJ46.
Attach the PCA 'WTA' to the bracket and fasten the two nylon latches.
Attach the head assembly to the casting panel and tightly fasten the four
screws to mount head block.
Connect all the connectors CNJ41, 42, 43, 47, 48, 51 to the PCA 'RPA' and
the PCA 'WTA'.

Check and Adjustment
After this replacement, check and adjustment is required.
Refer to the REP 2110, 2330.

CNJ 45

PCA 'WTA'

CNP43

CNP48
CNP41
CNP42
CNP47
CNP51

B03P-5325-0100A ••• 02

6 - 7

6-8

REP 1130

1.
2.

I

PCA 'IFC' REPLACEMENT

Separate connectors "A" and "B", and "1C07U" form the PCA 'IFC'.
Remove the PCA 'IFC' from the slot number 1A07.
Refer to the REP 1100.

Replacement

3.

Set device addres·s and write bus parity check function on the new PCA.
Refer to the Figure 2.22.
Insert the new PCA in the slot number 1A07.
Refer to the REP 1100.
Attach the connectors to the PCA.

4.

See REP 2320 and REP 2310.

1.

2.

ViewA

~

;::;

-

- c;

View A
Q

"'

......
Q

Q

Q

"' "'
Q

~

... ...
Q

Q

81

0 ~~
,,....
al

v

00

~
~

h
I'-'

I
PCA 'IFC'
B03P-5325-0 I OOA ••• 02B

6-8

6-9
REP

l.
2.

1135

PCA 'MPU' REP!ACEMENT

Separate connector l C06 from the PCA 'MPU'.
Remove the PCA 'MPU' from slot number IA06.

Replacement
l.
2.

Insert the new PCA in the slot number IA06.
Attach the connector to the PCA position lA06.

ViewA

~

View A

;::;

-

0

0

"'

0

00

0

....

0

0

"' "'

~

..,0 s ~1

0 ~~

~~
~ 0

I"

1v

t

PCA'MPU"

B03P-5325-0IOOA ••• 02A

6-9

6- 10

I

REP 1140

1.
2.

I

PCA • RDA. REPLACEMENT

Separate connector CNJ14 from the PCA 'RDA'.
Remove the PCA 'RDA' from the slot number 1Al2.
Refer to the REP 1100.

Replacement
1.
2.

Insert the new PCA in the slot number 1Al2.
Refer to the REP 1100.
Attach the connector to the PCA.

Check and Adjustment
After this replacement, check and adjustment is required.
Refer to the REP 2330.

ViewA

~

View A

;:;

=0

00

0

"'

0

00

0
....

0
0
"'~

...
0

0

0

"' "'

£1

uu
uu
u 0
r-..

1v

PCA 'RDA'

B03P-5325-0 !ODA ••• 02

6 - IO

6 - 11

I

REP 1150

I

PCA • SVA. REPLACEMENT

Removal
l.
2.

Separate connector CNJ14 from the PCA 'SVA'.
Remove the PCA 'SVA' from the slot number 1A02.
Refer to the REP 1100.

Replacement
l.
2.

Insert the new PCA in the slot number 1A02.
Refer to the REP 1100.
Attach the connector to the PCA.

Check and Adjustment
After this replacement, check and adjustment is required.
Refer to the REP 2310.

ViewA

~

-..., - 0

~

View A

.
'° s
0

0

"' ...
0

~~
~
0
~

0

~

... .... ::!}
0

0

n

..._,,

~t

PCA'SVA'

B03P-5325-0IOOA ••• 02

6 - 11

6- 12

REP

I.
2.
3.

1160

PCA 'BUF' REPLACEMENT

Separate connectors IAOSA and IA05B from PCA 'BUF' in slot 05.
Remove the PCA 'BUF'.
·Remove terminators labelled "RM57 8517 SSM," andsel~ In
case new PCA 'BUF' Is without them.

Replacemenl
I.
2.
3.

Confirm new PCA 'BUF' has terminators or Insert transferred
terminators if necessary.
Insert the new PCA In slot IA05.
Reier to REP 1100.
Attach connectors IAOSA dn IA05B lo the new PCA 'BUF'.
ViewA

~

;;:;

--

0

~

0

"'

~

~

g

~

...
0

0

"'

8}

~ ·~ ~
~~
0
~t 0
PCA'BUF'

B03P-5325-0IOOA ••• 02A

6- 12

6 - 13

REP 1200

I

POWER SWITCH REPLACEMENT

Precaution
Turn off the power supply.

Screw A

Turn off the circuit breaker.

~
l.

2.
3.

4.

0

Open the front door.
Remove the cover with three screws A.
Separate fasten terminals from each tab.
Remove the power switch with two screws B.

Replacement

l.
2.
3.

4.

Attach the power switch with the screws B.
Connect the fasten terminal corresponding to the tab numbers.
Attach the cover with the screws A.
Close the front door.

Screw B

PowerSwich

B03P·5325-0 I OOA ••• 02

6. 13

6- 14

I

REl' 1210

1.
2.
3.
4.

I

DOOR SWITCH REPLACEMENT

Open the front door.
Remove the eover with two screws A.
Separate each fasten teminal from tab.
Remove the door switch with two screws B.

Cover

Replacement
1.
2.
3.
4.

Attach the door switch with the screws B.
Connect the fasten terminals corresponding to the tabs.
Attach the cover with the screws A.
Close the front door.
Door Swich

Plate

B03P-5325-0 IOOA ••• 02

6 - 14

6 - 15

!REP 12201
Note;

ROLLER CATCH REPLACEMENT

When replacing roller catch, position adjustment is necessary.

Removal
1.
2.
3.
4.

Open the magnetic tape panel. Refer to the REP 1050.
Open the front door.
Remove the cover with two screws A.
Remove a plate, a roller catch and a spacer with two screws B.

Roller Catch

Cover

Replacement
1.
2.
3.

4.

Temporarily fasten the plate, the roller catch, and the spacer with the
screws B.
Attach the cover with the screws A.
Clbse the front door and insert the latch into the roller catch.
Adjust the position of the roller catch so that the front cover shuts
completely.
Then fasten the screws B tightly.
Close the magnetic tape panel. Refer to the REP 1050.

B03P-5325-0 IOOA ••• 02

Plate
Spacer

6 - 15

6 - 16

REP 1180

I

TAPE CLEANER REPLACEMENT

Precaution of Replacement
l.

Turn off the power supply.

Removal
1.
2.

Remove the head block in accordance with the procedure of read/write head
replacement. Refer to the REP 1240.
Remove the tape cleaner from the head block with two screws.

Replacement
l.
2.

Mount the cleaner to the head block by the screws.
Mount the head block to the magnetic tape panel in accordance with the
procedure of mounting of read/write head replacement;
Refer to the REP 1240.

Cehck and adjustment
After this replacement, check and adjustment is required.
Refer to the REP 2110.

B03P-5325-01OOA ••• 02

6 - 16

6 - 17

REP 1240

I

READ/WRITE HEAD REPLACEMENT

Before replacing the head, the following tests should be performed for
decision of head replacement.
1.
2.

Backward/Forward head output ratio test: field tester command code "SA".
Look at the Appendix A, Table A.l.
Digital Gain Control (DGC) st~p test: field tester command code "57",
and evalute the DGC step value.
Nominal value of the step is about from 4 to 7.
To execute the code, look at the Appendix A, Table A.l.
To check the step, refer to the REP 2330.
Note:

The above result is reference only, it is not always the
absolute criteria of replacement.

Precaution of Replacement
1.

z.
3.

Wind the tape to the file reel if tape is loaded.
Be careful not to strike the read/write head against other objects.
Use two pins located on the head block for accurate positioning the head.

Removal
1.
2.

Remove PCA 'RPA' and 'WTA' in accordance with procedure of their removal.
Refer to the REP 1110, 1120.
Remove the read/write head from head block with two screws 'B'.

Mounting
1.
2.

Attach the read/write head to the head block by two screws 'B'.
Attach the PCA 'RPA' and the PCA 'WTA' to the bracket.
Then attach the head block to the casting panel.
See REP 1110, 1120.

Adjustment
After this replacement, check and adjustment is required.
Refer to the REP 2110, 2330.

B03P-5325-0 I ODA ••• 02

6 - 17

6 - 18

E

Screws

13001

Ii

Screws

REEL MOTOR ASSEMBLY REPLACEMENT

Precaution of Replacement

'l

The replacement procedure for both file and machine reel motor assembly is
same.
Turn off the power supply.

1.

In the case of the file reel motor assembly replacement, remove the reel
hub first. Refer to the REP 1310.
Or in the case of the machine reel assembly replacement, remove the
machine reel first. Refer to the REP 1320.

Mounting
l.
2.
3.
4.

Attach the motor to the magnetic tape panel with screws.
Connect the reel motor cable, CNJ64 or CNJ65.
Attach the reel tacho sensor. Refer to the REP 1330.
Mount the reel hub in the case of the file reel motor assembly was
replaced. Refer to the REP 1310.
or mount the machine reel in the case of the machine reel motor assembly
was replaced. Refer to the REP 1320.

Machine Reel Motor Assembly

CNJSS
CNI65
File Reel Motor Assembly

Sensor Disk

Reel Tacho Cover
Reel Tacho Cover
Sensor Disk

i

Reel Tacho Sensor

I
B03P-5325-0 I DOA ••• 02B

6 - 18

6 - 19

Knob

REP 1310

REEL HUB ASSEMBLY REPLACEMENT/ADJUSTMENT
Screws'A"

Precaution of Replacement
l.
2.

Wind the tape to the file reel completely.
And remove the file reel.
Turn off the power supply.

Removal
l.
2.

Loosen two screw A and remove latch knob.
Loosen three hexagonal screws and remove hub.
Three Hexagonal Screws

Mounting
l.
2.

Attach new hub by the hexagonal screws.
Attach the knob by the screws A.
Hex ScrewB

Adjustments
If a tape reel is loose on the hub or you cannot secure the hub latch, the
locking spring can be adjusted.
1.

Remove screws 'A' and remove knob.

2.

Turn hex screw 'B' to increase or decrease the locking pressure for the
tape reel.
Replace latch knob and screws 'A'.

3.

B03P-5325-0 I OOA ••• 02

Three hexagonal screwa

6 - 19

6 - 20

I

REP 1320 ].

MACHINE REEL REPLACEMENT

Precaution of Replacement
1.
2.

Screws

Wind the tape to the file reel completely.
Turn off the power supply.

Removal
1.

Loosen three screws and remove the machine reel.
Machine Reel

~

Mounting
1.

Attach the machine reel with the three screws.

B03P-5325-0IOOA ••• 02

6 - 20

6 - 21

REP 1330

I

REEL TACHO REPLACEMENT

Precaution of Replacement
The replacement procedure for both file and machine reel tacho is the same.
Machine Reel Motor Assembly

Turn off the power supply.
Removal
1.
2.

3.

Loosen two screws and remove the reel tacho cover.
Separate the cable, CNJ56 of file reel side or CNJ57 of machine
reel side.
Remove the reel tahco composed of LED and phote transistor unit.

CNJSS
CNJ65
File Reel Motor Assembly

Mounting
1.
2.
3.

Attach the tacho with the two screws.
Connect the cable, CNJ56 or CNJ57.
Attach the reel tacho cover with the screw.

Sensor Disk
Reel Tacho Cover
Reel Tacho Cover

Sensor Disk

i

Reel Tacho Sensor

8

B03P-5325-0 IOOA ••• 02B

6 - 21

6 - 22

REP 1340

I

RIGHT/LEFT FAN REPLACEMENT

Precaution of Replacement
Cooling Fan Fixing Screws

1.

Turn off the power supply.
Finger Guard

Removal
1.
2.

In case standalone type: open a front and rear cover.
Refer to the Chapter 2.
In case rack mount type: open a front panel.
Disconnect the cooling fan connectors, CNJ61 and CNJ62.

3.

Loosen and remove screws 'A'.

4.

Remove the plate and put it on the floor.
Caution should be taken when removing the fan cables.
Loosen the four screws of cooling fan and remove them.
Note: Finger guard is also removed at this time.

5.

Plate

Replacement
l.
2.
3.
4.

Attach
Return
Secure
Attach

the cooling fan with the finger guard by the four screws.
the plate, and thread the connectors into the hole.
screws 'A'.
the connectors, CNJ61 and CNJ62.
Cooling Fan

ViewB

02

Ol

04

OS

06

07

08

09

JO

11

12

·~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~·
w ·~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~·
·U~~~~~~~H
l"NP22

C::=J
CNJ61

0

CNH2

CNJ 61

~
CNJ62

0

CNJ 62

02

CNJJI

CNJ:H

IQ9

~

03

{M

OS

06

07

08

09

10

11

12

+24V

g

DVM

g

-24V

CNJH

g

Screw 'A•

+12V

g

CNP21

c:::J

02

03

04

OS

06

07

Ofl

09

10

II

12

02

03

04

OS

06

07

OR

09

IO

ll

12

+SV

g

ov
g

CNJ9()

IS:CQJ
CNJ91

~

-6V

g

S.2V

g

B03P-5325-0l OOA ••• 02

6 - 22

6 - 23

I REP

1350

I

GUIDE REPLACEMENT

Precaution of Replacement
1.
2.

Wind the tpae to the file reel completely.
Turn off the power supply.

Removal

1.
2.

3.

Open the magnetic tape panel.
Remove the guide assembly with
Remove a guide from the flange
Or remove other guide from the

Refer to the REP 1050.
the screw 'A'.
D with the screw 'B'.
flange E with two screws 'C'.

Replacement

1.
2.

3.

Attach the guide to the flange D with the screw 'B'.
Or attach the guide to the flange E with the screw 'C'.
Attach the guide to the casting panel with the screw 'A'.
Close the magnetic tape panel. Refer to the REP 1050.

Screw 'B'

Screw 'C'

Block

Lower Flan e
{Flange D)
Upper Flange
(Flange E)

B03P-5325-0l OOA ••• 02

6 - 23

6 - 24

I

REP 1370

I

SHIELD BLOCK REPLACEMENT

Precaution of Replacement
Be careful not to strike the read/write head surface with the shield block.
Removal
l.
2.

Open the magnetic tape panel. Refer to the REP 1050.
Loosen two screws and remove the shield block.

Mounting
l.

Attach the shield block correctly by positioning pins and fasten the
screws.

2.

Close the magnetic tape panel.

Refer to the REP 1050.

Screws

B03P-5325-0 l OOA ••. 02

6 - 24

6 - 25

REP 1380

I

LOADING FAN REPLACEMENT
Casting Panel

Precaution of Replacement
1.
2.

Wind the tape to the file reel completely.
Turn off the power supply.

Removal
1.

2.
3.

Open the magnetic tape panel. Refer to the REP 1050.
Separate the connector CNJ66.
Loosen four screws of loading fan and remove them.
Note: Finger guard is also removed at this time.

Replacement
1.
2.
3.

Attach the loading fan with finger guard by the screws.
Attach the connector CNJ66.
Close the magnetic tape panel. Refer to the REP 1050.

Finger Guard

Four Screws

B03P-5325·0 IOOA ... 02

6 - 25

6 - 26

REP 1390

WRITE ENABLE SENSOR REPLACEMENT

Removal
1.
2.
3.

Remove the reel hub. Refer to the REP 1310.
Open the casting panel. Refer to the REP 1050.
Separate the write enable sensor cable CNJ55.

4.

Remove the write enable sensor with a screw.

Magnet Tape Panel

Write Enable Sensor

Mounting
1.
2.
3.
4.

Attach the write enable sensor with the screw.
Connect the sensor cable CNJ55.
Close the casting panel. Refer to the REP 1050.
Mount the reel hub. Refer to the REP 1310.

Connector

[CNJSS]

B03P-5325-0 I OOA. _. 02

6 - 26

6 - 27

REP 1400

BOT/EOT SENSOR ASSEMBLY REPLACEMENT

Precaution of Replacement
1.
2.

Wind the tape to the file reel completely.
Turn off the power supply.

1.
2

Disconnect BOT/EQT sensor assembly
Remove the tape guide fixing screw
Note: Be carefull not to drop the
tape guide and the sensor.
Remove the sensor screw and detach

3.

cable, CNJ54.
then detach the BOT/EOT assembly.
screw because it attaches both the
the sensor.

Replacement
1.

Attach the BOT/EOT sensor to the bracket by using the sensor

2.

Attach the BOT/EQT sensor assembly by the tape guide screw.
Note: Push the sensor plate from side A and align the edge B to the tape
guide when fixing the screw.
Connect the assembly cable.

screw.

3.

Check and Adjustment
After ~his replacement, check and adjustment is required.
Refer to the REP 2310.

B03P-5325-0JOOA .•• 02

6 - 27

6. 28

TENSION SENSOR ASSEMBLY REPLACEMENT

REP 1410

Precaution of replacement
1.
2.
3.

Sensor Cover

Wind the tape to the file reel completely.
Turn off the power supply.
Caution should be taken not to damage the sensor.

Removal
1.
2.
3.

Separate connector CNJ53.
Loosen screw 'A', and remove the cover.
Loosen the two screws 'B', and remove the sensor assembly.
Note: Screw 'A' is also used for the sensor cover.

Mounting
Screws'B'

1.
2.
3.
4.

Attach
Attach
Attach
Attach

the
the
the
the

sensor assembly using the two screws 'B'.
cover using the screw 'A'.
sensor assembly to the casting panel.
connector CNJ53.

Check and Adjustment
After this replacement, check and adjustment is required.
Refer to the REP 2210.

Screw•A*

Connector (CNJ53)

B03P-5325-0 IOOA ••• 02

6. 28

6- 29

REP 1420

IDLER TACHO ASSEMBLY REPLACEMENT

Precaution of Replacement
1.
2.
3.

Wind the tape to the file reel completely.
Turn off the power supply.
Be careful not to strike the roller idler tacho assembly against others
objects.
CN1S2

Removal
1.
2.
3.

Separate connector CNJ52.
Loosen screw 'A', and remove the cover.
Loosen the two screws 'B', and remove the tacho assembly.
Note: Screw 'A' is also used for the tacho cover.

Mount in!!
1.

2.
3.

4.

Attach
Attach
Attach
Attach

the
the
the
the

sensor assembly using the two screws 'B'.
cover using the screw 'A'.
tacho assembly to the casting panel.
connector CNJ52.

Screw A

Check and Adjustment
After this replacement, check and adjustment is required.
Refer to the REP 2220.

TachoCover

B03P-5325-0 lOOA ••• 02

6 - 29

6 - 30

IREP 1430 I

OPERATOR PANEL REPLACEMENT

Removal
Front Door

1.

Open the front door.

2.

Loosen three screws A and remove the cover.

3.
4.

Disconnect the operator panel cable CNJ63.
Remove the operator panel bracket with four fixing screws B.
Remove the operator panel from the front door.

5.

Three Screws A

Mounting

1.
2.
3.

Attach the operator panel to the front door by the screws B.
Connect the operator panel cable CNJ63.
Attach the cover to the front door by the screws A.

Cover

Cable [CNJ63]

B03P-5325-0 lOOA ••• 02

6 - 30

6 - 31

REP 1440
Note l;
Note 2;

I

FILTER REPLACEMENT

There is a label on the side of the air filter. An arrow is printed
on the label to indicate the direction of air flow. Check to see
the label says arrow is up.
In the case of the standalone, it is necessary to open the rear
cover. The method is shown in the chapter 2.

'

Removal
1.
2.
3.

Open the rear cover.
Loosen two screws and pull down the plate.
Remove the filter.

0

Replacement
1.
2.
3.
4.

Check the label of the arrow direction.
Insert the filter.
Slide the plate upward and fasten it with the screws.
Close the rear cover.

Filter

Plate

B03P-5325-01 OOA ••• 02

6 - 31

6 - 32

REP 1500
(1)

I

POWER SUPPLY REPLACEMENT

Power Supply Unit
Be sure to turn the main line switch of the power supply to off. Power
may be supplied even though the unit appears to be off. Remove AC line
cord from wall supply.
Removing the unit
1.
2.

Remove the input cable and the connectors on the front panel
(CNP-71, -72, -73, -74, and -75).
Remove the screws on the four corners of the unit, and remove the
unit.

Installing the unit
1.
2.
3.

Fix the unit with four screws.
Attach the connectors (CNP-71, -72, -73, -74, and -75).
Attach the input cable.

Fuse

Reconnect the AC line cord to the wall supply.
Turn the power supply main line switch on.
(2)

Replacing the Fuse
Removing the fuse
Screws

1.
2.
3.

Open the back door of the unit.
Turn the main line switch to off.
Remove the fuse.

Putting in a fuse

Specification plate

Main line switch

EC control specification
plate

(NFB)

1.
2.
3.

Put in a fuse.
Turn the main line switch on.
Close the back door.

0
Figure:

B03P-5325-0IOOA ..• 02

Power Supply External View (Rear)

6 - 32

6 - 33

REP 2010

OUTPUT VOLTAGE CHECK AND ADJUSTMENT

Procedure
1.

2.

3.

Supply power, and check and adjust the power supply in the servo off
mode (i.e., unload state).
Connect a digital voltmeter to the +5 V and 0 V terminals on the back
panel, and adjust the voltage to +5.00 V. (See the following figure for
the location of the variable resistor.)
The power supply voltages on the back panel (-6 V and +12 V) must be in the
following ranges:
-6 V --- -6.6 to -5.4 V
+12 V --- +12.0 to 14.5 V
Connect a digital voltmeter to the -5.2 V and 0 V terminals. (See the
following figure for the location of the variable resistor.)
The power supply voltages on the back panel (+24 VM and -24 VM) must be
in the following ranges:
+24 VM --- +21.6 to +26.4 V
-24 VM --- -21.6 to -26.4 V
If items (2) and (3) -- above -- are not satisfied, the power supply must
be replaced.

1

I
+SVVOLTADJ

~

0

I

+SVVaria..eresiator
for adjustment

+SVHGN
HIGH VOLT ADJ

0
+SVWGN
LOWVOLTADJ

0

-S.2VVOLT ADJ¢>

0

-S.2VVuiablemiltor

for adjustment

-S.2VMGN
HIGH VOLT ADJ

0
-S.2VMGN
LOW VOLT ADJ

0

Figure:

B03P-5325-0IOOA ••• 02

Power Supply Front View

6 - 33

6 - 34

REP 2110-1
Note:

AZIMUTH CHECK AND ADJUSTMENT

In this section the following tools are used for azimuth check and
adjustment.
a) head eraser
b) standard skew tape
c) small screwdriver

3.

Set the 2 digit indicator to "91" by pressing the 'START' or the
'UNLOAD' switch. The 'START' swtich caused the indicator code to
increase, the 'UNLOAD' to decrease.

The azimuth check can be executed by the operator panel. The azimuth between
two specified tracks is measured by the built-in circuit and displayed as
blinking decimal points of 2 digit indicators.
Operator panel switch performs the alternative of inner two tracks or outer
two tracks.
If necessary, the adjustment is performed by rotating the screwdriver and
watching the indicator.

While pressing the 'TEST' switch, press the 'DENSITY SELECT' switch.
The azimuth check program will start. The tape moves in the forward
direction at low speed.

4.

Procedure
1.

Azimuth check program execution

Switch functions and azimbth display
In this routine, the switches of the operator panel function as mentioned
below, after the azimuth check routine program is executed.
'START' switch:
'UNLOAD' switch:
'TEST' switch:
'DENSITY SELECT' switch:

The skew tape mounting
Turn off the power supply.
Open the front door.

Forward tape movement.
Backward tape movement.
Tape star·t stop movement.
Track select.
At first "I.I." is indicated at the indicator.
The indication in changed alternatively by
pressing this switch from "O.O." to "I;r." or
''1.1. 11 to

Erase the magnetism of the read/write head and erase head using the head
eraser.

Attach standard skew tape to the reel hub.
2.

Tape loading
While pressing the 'TEST' switch, press the 'START' switch. This will
place the MTU in diagnostic mode and the 'TEST' mode indicator will be
lit.
The 'DENSITY SELECT' mode indicator will be in HOST select mode.

"o.o.••.

The "I. I." means the azimuth display of Inner
tracks.
The "O.O." means the azimuth display of Outer
tracks.
The correct azimuth is displayed on the two decimal points. See the
figure on REP 2110-2. One .is skew lead indicator, the other is lag
indicator.
The best adjustment is to realized the equal blinking of the two decimal
point indicators.

Set the 2 digit indicator to "02" code by pressing the 'START' or the
'UNLOAD' switch. The 'START' switch causes the indicator code to
increase, the 'UNLOAD' to decrease.
Press the 'TEST' switch. Then tape will load. After the tape is loaded,
the 2 digit indicator will be "OO" and the start LED will be lit.

B03P-5325-0 IOOA ... 02

6 - 34

6 - 35

AZIMUTH CHECK AND ADJUSTMENT

REP 2110-21
5.

Check and adjustment in the forward direction

6. Check adjustment of backward direction

Check and adjust the azimuth in the forward direction in accordance with
the following procedure.

Check and adjust the reverse direction azimuth in accordance with the
following procedure.

If the tape stops, press the 'START' swtich to move the tape forward.
Adjust the azimuth of the inner two tracks, track 5 and track 6. Observe
the blinking of the decimal points on the operator panel display to make
adjustment shown in Table 1.
Set the screwdriver shown in the figure below.

Move the tape by pressing the 'TEST' switch.
by pressing the 'UNLOAD' switch.

by observing the blinking of
7. Recheck the forward azimuth
Perform item 5 above when backward azimuth adjustment is done, and make
sure that the aximuth value does not differ much from the previous one.

Then stop the tape by pressing the 'TEST' switch.
Table 1.

Azimuth Adjustment

Blinking of the decimal point on the operator
panel's indicator

Item

Make sure that the azimuth value of the inner track is equal.
Change to the outer display by pressing the 'DENSITY SELECT' switch, and
check the azimuth of the outer tracks; if the blinking of the decimal
point differs much from that of the forward direction, perform the
adjustment shown in the Table 1.

When inner work is completed, change the outer track azimuth display
between track 1 and track 9 by pressing the 'DENSITY SELECT' switch.
Perform the adjustment shown in the Table
the decimal point on the operator panel.

Then set backward direction

8. Take up the tape
Skew adjustment
screw direction

When the azimuth check and adjustment is completed, take off the skew tape
by backward tape movement.
Do not us.e the unload switch to rewind the skew tape.

1

Decimal point 'A' and decimal 'B' on for
the same amount of time

No adjustment
required,

Note 1:

2

Decimal point 'A' on more than 'B'

Turn clockwise,

Note 2:

3

Decimal point 'A' on less than 'B'

clockwise,

During the forward movement, if EQT is detected, the direction
of the tape is changed to backward.
During the backward movement, if BOT is detected, the tape will
unload.

Turn counter-

Read gain setting
After the azimuth is adjusted, set the PE read gain.
See REP 2330.

.. --- ... .,
:

,.----,
''
'''
''
r----1
'
'
''
'''
'
'

:
''
'
''

'
'
'

Head Assembly

~-----4

I

Cover

'I'

L .. _.., _ _,

L----..i

'

o•'

o

Decimal

Decimal

point A

point B

Screwdriver

B03P-5325-0100A ••• 02

6 - 35

6 - 36

REP 2210

TENSION SENSOR CHECK AND ADJUSTMENT

When tension sensor assembly or PCA "RPA" is exchanged, check waveform of the
sensor with two channels oscilloscope and adjust variable resistors with a
small screwdriver on the PCA "RPA" as following method.
1.
2.
3.
4.
5.
6.
7.

B.

Turn off the power of the unit.
Open door and open the casting panel with a big screwdriver.
Find the check pins on PCA "RPA" in Figure 2210.2 and connect probes of
the oscilloscope at pin numbers 1 and 2 ground the oscilloscope.
Turn on the power of the unit.
Raise and lower the tension sensor roller by hand and observe waveform on
check pins 1 and 2.
Check the waveform whether it satisfies the requirement shown in Figure
2210.1.
If the waveform does not satisfy that Figure 2210.l turn variable
resistor 3 and 4 on the PCA "RPA" shown in Figure 2210.2 carefully to
satisfy the condition.
If it is impossible to satisfy Figure 2210.1, change tension sensor
assembly or PCA "RPA".

r----- - ---,

Q
Rts§

''

''

:__ --CNJ~--i

0

R3S

T,

T,

T2
T

T•

I
Variable resistor l.

J

Idler Tacho
Adjustment

Variable resistor 2.

!.l.
~ .0. 1 ,T
!z. ..~ 0 "'T
1 !3. .
~ .0. 1 anT<:.
d !.!i.
0 1
T .

Variable resistor 3.
Variable resistor 4.

J

Tension Sensor
Adjustment

0.7 <: T1; Tz <: 0.3, 0.7 <: T2; T3 <: 0.3
RPGM

Figure 2210.l

Check pin

0 DD 0 0 0 0 DJ
4

L

3

2

L

I

Tension Sensor Check
Idler Tacho Check

Figure 2210.2
B03P-5325-0 I OOA •.• 02

6 - 36

6 - 37

I

REP 2220

I

IDLER TACHO CHECK AND ADJUSTMENT

When idler tacho assembly or PCA "RPA" is exchanged, check waveform of the
tacho with an oscilloscope and adjust variable resistors with a small
screwdriver on the PCA "RPA"as following method.
1.
2.
3.

Turn off the power of the unit.
Open the door and open the casting panel with a big screwdriver.
Find the check pins on PCA "RPA" in Figure 2210.2 and connect probes of
the oscilloscope to pin numbers 3 and 4, ground oscilloscope.
4. Turn on the power of the unit.
5. Load a work tape by OPD* (Operator panel Diagnosis) code 02.
6. Run the tape forward by OPD code 41 (Data security erase).
7. Check the waveform whether it sati3fies the requirement shown in Figure
2210.1.
8. Run the tape backward by OPD code 02 (Rewind) and also check the waveform same as item 7.
9. If the waveform does not satisfy Figure 2210.1, turn variable resistor
and 2 on the PCA "RPA" shown in Figure 2210.2 carefully.
10. If it is impossible to satisfy the condition, change idler tacho assembly
or PCA "RPA".
* See Appendix B Offline Diagnosis by the operator panel.

803P-5325-0IOOA ••• 02

6. 37

6- 38

I

REP 2310

I

BOT/EQT GAIN ADJUSTMENT

When BOT/EQT sensor, PCA 'IFC', or PCA 'SVA' is exchanged, the gain adjustment of the sensor is required.
II the abnonnal value is set then tape will not load or an EQT marker can be missed.
The BOT/EQT gain can be .adjusted by using the operator panel diagnostics as
show below.
For more detail information about operator panel diagnostics, see Appendix B.
(A)

Prepare a work tape.
time.

(B)

Mount and load the tape using code '02'.
The detailed method to use code '02' of the diagnostics is described
below.
1. Push 'Start' key while keeping the 'Test' key depressed. 'Test' LED
lights.
2. Set 2 digit indicator to code '02' by pressing 'Start' or 'Unload'.
'Start' key causes 2 digit indicator code to increase, and
'Unload' decrease.
3. Push 'Test' key.
4. Wait until 'Start' LED lights.

(C)

Start the BOT/EQT adjustment using code '90' of the diagnosis.
1. Set 2 digit indicator to code '90' as same manner described (B) 2.
2. Push 'Density select' key-while keeping the test key depressed.
The BOT/EOT adjustment automatically.
3. Wait until tape unloads.
4. The 2 digit display must be 00. (Note)

(D)

Store .new gain into nonvolatile memory using code '94' of the
diagnostics.
If you want to purge new adjusted gain, push 'Reset' key or turn off the
power.
1. Set 2 digit indicator to code '94' as same manner described (B) 2.
2. Push 'Density select' key while keeping the test key depressed.
This operation initiates to rewrite into the nonvolatile memory

Note:

Small size reel is better to reduce adjustment

If you failed to execute the automatic gain adjustment, rewrite the
current BOT/EOT gain by self-diagnostic command described in REP 2320
(Parameter setting procedure). Recommended gain value is BO to CF
hexadecimal.

B03P-5325-0 IOOA ••• 02A

6 - 38

6- 39

REP 2320-1

DEVICE TYPE/EC LEVEL/BOT GAIN/EOT GAIN

M244X stores the four byte parameters called "Device Type", "EC Level", "BOT
Gain", and "EOT Gain", which are written into a nonvolatile memory. The
meanings of these parameters are as follows.
( 1)

(5)

Device Type
Lower two bits of this byte mean the initial density at power on.
The next two bits (bit 2, 3) mean interface mode. The next two bits
(bits 4, 5) is the variable IBG Length mode. Bit 6 means hi-speed, Bit
7 is reserved.

l

Display R/W density
00:
in Host mode
01:
10:
11:

(2)

(A)

Push 'Start' key for keeping 'Test' key depressed. ·•rest' LED
lights and 2 digit indicator displays 'OO'.

(B)

Set 2 digit indicator to '93' code by pressing 'Start' or 'Unload'
key. 'Start' key causes 2 digit indicator to increase, and
'Unload' key decrease the 2 digit indicator.

(C}

Push 'Density select' key for keeping the 'Test' key depressed.
The 2 digit indicator displays 'dt' as shown Figure 2320.l (a).

(D)

Push 'Reset' key. In this state, the current device-type code is
displayed on the 2 digit indicator.

(E)

If you desire to modify the current device-type, push 'Start'
or 'Unload' key and set 2 digit indicator code to value (B).

LSB

MSB

Inter- { 00:
face
01:
mode
10:
11:

Setting of the four byte parameters.
The four parameters can be modified by using the operator panel
diagnostics as shown below.

Fixed IBG
Vari 1.2 max
Vari 2.4
Vari 4.8

1

::: j

CDC Compatible mode
PERTEC FSlOOO Compatible mode
CIPHER F880 Compatible mode
Not assigned

Density at power on
00:
{ 01:
10:
11:

6250
1600
6250
1600

(Host changeable)
{Host changeable)
(Fix)
(Fix)

(F)

(G}

Push 'Reset' key. In this state, the current EC-level code is
displayed on the 2 digit indicator.
If you desire to modify this code, push 'Start' or 'Unload' key as
same as step (B}.

(H}

Push 'Test' key to store the displayed EC-level code into RAM, the
2 digit indicator displays 'BG' as shown Figure 2320.1 (c).

(I)

Push 'Reset' key to display the current BOT-gain code.
This code can also edited to any value by 'Start' and 'Unload' key.

(J}

Push 'Test' key to store the displayed BOT-gain value into RAM,
the 2 digit indicator displays 'EG' as shown Figure 2320.l (d).

(K}

Push 'Reset' key to display the current EQT-gain value, and change
if you need.

LSB

MSB

l

"RKDMU" is not installed
"UIDMU" is not installed

~Future

The displayed device-type code is stored into

(b).

EC Level
This byte is used to know that the newest firmware. The lower two bits
are already used as PCA "RKDMU" and "UIJMU". The other bits to be used
future engineering changes.

1I

Push 'Test' key.

RAM, the 2 digit indicator displays 'EL' as shown Figure 2320.1

Display 'LP' at Load Point
EC

'------- Display "--" during R/W
(3)

(4)

BOT Gain
The value of this byte is BOT gain. Usually the BOT gain is adjusted
automatically to the optimized value by the diagnostic command. But in
the special case, the gain vlaue can manually set to any value by using
the special diagnostic command.
EOT Gain
Same as the BOT Gain.

lI
(a) Device Type

(b) EC Level

(c) BOT Gain

(d) EOT Gain

Figure 2320.l

B03P-5325-0 l OOA ••• 028

6 - 39

6 - 40

REP 2320-2
(L)

DEVICE TYPE/EC LEVEL/BOT GAIN/EOT GAIN

Push 'Test' key to store the displayed EQT-gain value into RAM,
the 2 digit indicator displays 'OO' code.
If you want to store the new parameters into nonvolatile memory,
push 'Start' to set '94' command (Store parameter command) and push
'Density Select' key while holding down the 'Test' key.
This operation initiates to rewrite parameters into the nonvolatile
memory.

B03P-5325-0IOOA ••• 02

6 -40

6 - 41

REP 23301

PE READ GAIN SETTING

There are no variable resistors for read PE gain adjustment. The amplifier
gain is controlled by a digital gain control (DGC) amplifier.
In the phase encoding memory, the gain registor is controlled the
microprocessor.
It is performed as follows, first writing continous flux change of 3200fci on
a tape, second reading the burst followed by the setting automatic gain
control (SAGC) of sixteen times executions, third the averaging of the SAGC
values. Then the value is evaluated whether it is reasonable or not by the
microprocessor.

PROCEDURE
1.

Tape loading
Load a work tape using diagnostic mode '02'.

2.

PE gain adjustment
Set the 2 digit indicator to "92" code by pressing the 'UNLOAD' switch.

The gain value is stored into the nonvolatile memory by another command code
94 issued thru the operator panel.

With pressing the 'TEST' switch, press the 'DENSITY SELECT' switch.
The PE read gain adjustment program starts.

For efficient maintenance, use a good quality work tape which is the same
kind as the customers.

The tape runs forward at streaming speed, writing the 3200fci flux
reversal data. Tape rewinds to BOT, SAGC is performed .in both high and
low speed and the average value of the SAGC value is checked by the
microprocessor. When the value is under the criterion, the operation is
completed and the tape is unloaded, the 2 digit indicator displays "OO".

Note 1:

Before executing this section, clean and check the R/W head and tape
path.

Note 2:

PE gain must be set when a part or PCA listed in Table 1 is
replaced.

3.

PE gain adjustment error
If the gain exceed the criterion, the display will be "F.3" and "40." or
another FSC will be indicated.

Table 1.

If these items are replaced read gain adjustment is required.
In this case, first change the work tape to better one and perform the
item 2 again. If the error occures again, analyze the fault sympton
code. The details are explained in chapter 5.

Item

Part name

1

read/write head

2

PCA 'RPA'

3

PCA' RDA'

4

PCA 'WTA'

Store the new gain into the nonvolatile memory using the diagnostic code
"94" by pressing the 'START' switch.

5

PCA 'MPU'

Note:

Note: Unless the 'RESET'switch is not pressed, the MTU is in the
diagnostic mode
4.

New gain storing

Unless the 'RESET' switch is not pressed, the MTS is in the same
diagnostic mode.

While pressing the 'TEST' switch, press the 'DENSITY SELECT' switch. The
store operation finishes instantaneously and 2 digit indicator displays
"OO".

B03P-5325-01 OOA .•• 02A

6 - 41

7 - 1

CHAPTER 7

7.1

ILLUSTRATED PARTS CATALOG

M2441/M2443
The illustrated parts catalog (IPC) of the model M2441 and M2443 are
shown in the visual index I, Figure 01, Figure 12, Figure 03.

7.2

M2442/M2444
The IPC of the model M2442 and M2444 are shown in the visual index II,
Figure 11, Figure 12, Figure 13.

Note:

The location and the nickname of printed circuit assembly
(PCA) are shown in Appendix c. Refer to the Appendix if
necessary.

Figure 12 is used for M2441/M2443 and M2442/M2444 commonly.

B03P-5325-0100A ••• 02

7 - 1

7 - 2

VISUAL INDEX II STREAMING TAPE DRIVE

VISUAL INDEX

I

II
I

I

FIGURE 11.
.____ _F_IN_A_L_Y~AS~S_EM_B_lY
_ __,]

FIGURE 01.
FINAL ASSEMBLY

~·
£'1 1 .

~~II
~~

FIGURE 13 .
CABINET & PCA RACK SECTION

FIGURE 12.
MECHANICAL SECTION

FIGURE 12.
MECHANICAL SECTION

FIGURE 03.
CABINET 8 PCA RACK
SECTION

M2441 A/M2443A

M2442A/M2444A

B03P-5325-0!00A ••• 02

7 - 2

7 - 3

FIGURE 01.

FIGURE 01. FINAL ASSEMBLY

INDEX NO,

.•
•

FINAL ASSEMBLY (M2441A/M2443A) (1/2)
COMPOSITION
& QUANTITY

SPECIFICATION

DESCRIPTION

I

8038-5325-8101A

M2441A Streaming Tape Drive

I

803B-5325-B201A

M2443A Streaming Tape Drive

I

B03B-5320-D002A

M2441A Mechanical Unit

I

B03B-5320-D003A

M2443A Mechanical Unit

I

I

B03B-5320-TOllA

Magnetic Tape Panel (Fig. 12)

2

I

B250-3570-XIOIA

Fitting Metal

2

F6-SW2NA-4x8S-M-Ni IA

Screw

3

I

B168-9440-00 IOA#U

PCA 'RPA'

4

1

Bl6B-9470-0010A#U

PCA 'NTA 1 (M2441A)

4

1

B168-94 70-0 lOOA#U

PCA 'WTA' (M2443A)

Bl4L-5105-0155A#Al

Power Supply Unit

I

C60L-0020-000 I #MP I 0

Fuse

Bl4L-5105-0l 55A#A2

Power Supply Unit

• 5

I

• 6
• 5

I

Model Revision

M2443A
M244!AC

.."

AO

M2443AC

"

A4

F6-SW2NA-4x8S-M-Ni IA

Screw

I

B660-0280-T221A

AC Power C&ble

8

I

B210-1670-T003A

Cabinet (Fig,03)

9

2

B210-1670-X327A

Spring

10

2

CT-GPJ-030-Kitagava

Spring Cover

II

2

B210-1670-X332A

Fook

12

1

B210-1670-X914A

Detent plate

3

F6-BA-6xl0-M-Zn!A

Bolt

2

CT-BAF1518

Bearing

4

F6.-BA-6xl6-M-Zn IA

Bolt

14

6

B210-1670-X901A

Spring Plate

15

2

JB-WM-14S

Washer

2

JB-C-15

C-Ring

13

16

M2441A/M2443A

on and after C2

4
7

2

M2441A

1

B210-1670-V907A

Block Aasy

2

F6-BA-6xl6-M-Zn1A

Bolt

17

2

B210-1670-X904A

Rod

18

2

B210-1670-X905A

J-Bolt

* Spare
B03P-5325-0100A., .02

Bl

part is marked.

7 - 3

7- 4

FIGURE 01.

FIGURE 01. FINAL ASSEMBLY

FINAL ASSEMBLY (M2241A/M2443A) (2/2)

COMPOSITION
INDEX N0.1 & QUANTIYT

19
20

• 21

22

23

• 24

• 25

~

2

M2441A/M2443A

*l

SPECIFICATION

DESCRIPTION

2

F6-Nl-6S

Nut

l

B210-1670-V901A

Block Assy

l

B210-1670-V902A

Detent Assy

4

F6-SBD-4x8S-M-Ni lA

Screw

l

N860-3629-T00l

Operator Panel

4

F6-SBD-4x6S-M-Ni lA

Screw

l

8038-5320-D021A

PCB Rack Unit (Fig. 03)

5

F6-SW2NA-4x8S

Screw

2

C960-0300-T00l

PCA Extracting Tool

l

C56L-0460-0003

Power Switch

2

F6-SW2NA-3x8S

Screw

1

B038-5320-D024A

Switch

2

F6-SW2NA-2, 3xl0S-M-NilA

Screw

Cable CNJ14 - CNJ43

[

8660-1060-Tl l 7A#Ll80Rl

[

8660-0280-T09!A#L200Rl

Cable IC07U - CNJ63

[

8660-0280-Tl43A#L600RO

Cable CNP71 - CNP33

[

B660-0280-Tl46A#L700RO

Cable CNP72 - CNP31

[

B660-0280-Tl47A#L600RO

Cable CNJ73 - CNJ21

[

8660-0280-T!SJA#L l OOR!

Cable CNP32 - CNJ64/65

l

8660-0280-Tl54A#Ll 90Rl

Cable CNJ!l - CNJ42/48

1

B660-0280-Tl55A#L!80Rl

Cable IC06 - CNJ4!/47

[

8660-0280-T l 95A#L200Rl

Cable CNP74 - Contact

1

8660-0280-T2! 7A#L300RO

Cable CNP75 - CNP34

l

8660-0280-Tl 70A

Cable CNJSI - CNP52/57

3

8660-0720-T201A#L390RO

FG Cable 390 mm

4

8660-0720-T201A#L270RO

FG Cable 270 mm

Spare part is marked.

B03P-5325-0100A ••• 02

7- 4

7 - 5

FIGURE 11. FINAL ASSEMBLY (M2442A/M2444A)

FIGURE 11. FINAL ASSEMBLY

COMPOSITION

iNDEX NO.

*
*

DESCRIPTION

l

B03B-5325-B601A

M2442A Streaming Tape Drive

l

B03B-5325-B701A

K2444A Streaming Tape Drive

l

B03B-5320-D002A

M2442A Mechanical Unit

l

B03B-5320-D003A

M2444A Mechanical Unit

l

l

B030-5320-T011A

Magnetic Tape Panel (Fig, 12)

2

l

BZS0-3570-XlOlA

Fitting Metal

-

2

F6-SW2NA-4x8S-M-ZNJA

Screw

3

l

Bl6B-9440-0010A#U

PCA 'RPA'

4

I

1!16B-9470-0010A#U

PCA 'NTA' (M2442A only)

•

4

l

Bl6B-9470-0100A#U

PCA 'WTA' (M2444A only)

*
*

5

Bl4L-5 l05-0155A#Al

Power Supply

l

C60L-0020-000l#MP10

Fuse

l

6

-

4

F6-SW2NA-4x8S

Screw

7

I

B660-0280-T221A

AC Power Cable

8

l

BZl0-1860-TOOlA

Cabinet

9

l

B03B-5320-D02 IA

PCB Rack Unit (Fig. 13)

-

5

F6-SW2NA-4x8S

Screw

• 10

I

N860-3629-T001

Operator Panel

-

4

F6-SBD-4x6S-M-NI IA

Screw

2

C960-0300-T001

PCA Pulling Tool

l

8660-1060-T 117A#Ll 80RI

Cable CNJ14-CNJ43

B660-0280-T091A#L200Rl

Cable IC07U-CNJ63

-

M2442A/M2444A

SPECIFICATION

& QUANTITY

*l

B03P-5325-0100A, •• 02

(Fig. 13)

I:

B660-0280-Tl43A#L600RO

Cable CNP71-CNP33

l

B660-0280-Tl46A#L 700RO

Cable CNP72-CNP3 l

l

8660-0280-T 14 7A#L600RO

Cable CNJ73-CNJ21

I

B660-0280-T153A#LIOORI

Cable CNP32-CNJ64/65

I

B660-0280-Tl54A#Ll 90Rl

·Cable CNJ11-CNJ42/48

l

B660-0280-Tl55A#Ll80Rl

Cable 1C06-CNJ41/47

I

B660-0280-T 195A#L200RI

Cable

l

B660-0280-T217A#L300RO

Cable CNP75-CNP34
Cable CNJ51-CNP52/57

CNP74~Contact

I

B660-0280-TI 70A

2

B660-0720-T201A#L390RO

FG Cable 390 ....

l

B660-0720-T201A#L270RO

FG Cable 270 ...

Spare part is marked.

7 - 5

7-6

FIGURE 12. MECHANICAL SECTION

FIGURE 12. MECHANICAL SECTION - (1/2)

14

I

COMPOSITION
&QUANTI1Y

INDEX NO.

~II

l1)_c/
w~

10

.
.
.

.i ~

.

19

!

.

B030-5320-TOl lA

l
I

Magnetic Tape Panel

I

B030-5320-X006A

Casting Panel

2

B030-5320-Vl02A

GUide Assembly

2

2

B030-5320-Xl06A

Gulde

3

2

B030-5320-Xl07A

Upper Flange

screw

-

4

F6-SBD-4x6S-M-NilA

4

2

B030-5320-Xl09A

Block

5

2

B030-5320-Xl08A

Lower flange

-

2

F6-SBD-4x6S-M-NllA

screw

-

2

F6-SBD-4xl2S-M-NIIA

screw

l

B030-5320-Vl27A

BOT/EOT Sensor Assembly
Plate

6

l

B030-5320-Yl05A

7

1

B030-5320-Vl23A

BOT/EOT Sensor

8

1

B030-5320-Vl28A

Mirror Block

-

1

F6-SBD-3x20S-M-NJ1A

screw

-

1

F6-Nl-3S

Nut

l

F6-SW2NA-4x25S-M-ZNIA

screw

9

1

B030-5320-Vl09A

Tension Sensor Assembly

-

2

F6-SW2NA-4x20S-M-ZN IA

screw

l

F6-SW2NA-4x30S-M-ZNIA

screw

1

B030-5320-T302A

File Reel Motor Unit
File Reel Motor Assembly

-

IO

1

B030-5320-V302A

11

1

B030-5320-XZ01A

sensor Disk

•

12

1

B030-5320-V205A

Write Enable Sensor

-

l

F6-SSA-3x8S

screw

•

13

l

B030-5320-V203A

File Tacho Sensor
screw

•

.

-

l

F6-SSA-3x8s

14

l

B030-5320-XZ04A

Cover

-

2

F6-SW2NA-3x6S-M-ZNJA

screw

Boll

-

4

F6-BA-6Xl2-M-ZNIA

15

l

B030-5320-V450A

Reel Hub Assembly

16

1

B030-5320-VIOOA

Head Block

.

l

B030-5320-XIOJA

~Plate

l

B030-SIBO-XI03A

Spring

I

B030-51BO-Xl02A

Nut

I

B300-0410-X007A

screw

3

F6-SBD-4x8S

SCrew

I

B030-5320-Vl22A

Tape Cleaner
Cleaner

17

l

B030-5180-Vi09A

18

I

B030-5320-Xl56A

Plate

F6-SSA-3x20S

screw

2

26

DESCRIPTION

SPECIFICATION

• I Spare part Is marked.

25

24

B03P-5325-0 I OOA ••• 02A

7-6

7-7

FIGURE 12. MECHANICAL SECTION - (2/2)

FIGURE 12. MECHANICAL SECTION

INDEX NO.

l

B030-5320-Vl20A

2

F6-SW2NA-3x8S

Screw

1

B030-S320-T303A

Machine Reel Motor Unit

Shield Block

• 20

1

B030-5320-V303A

Machine Reel Motor Assembly

• 22

1

B030-5320-V204A

Machine Tacho sensor

-

1

F6-SSA-3x8S

Screw

23

1

B030-5320-X204A

Cover

2

F6-SW2NA-3x6S-M-ZN1A

Screw

F6-BA-6xl2-M-ZN1A

Bolt

24
25
-

4
1

B030-5320-VS01A

Machine Reel Assembly

3

F6-SW2NA-4x l 6S-M-ZN IA

Screw

1

B030-5320-Vl03A

Idler Tacho Assembly

2

F6-SBD-4x l 6S-M-ZN IA

Screw

1

F6-SBD-4x25S-ll-ZN1A

Screw

26

1

8030-5320-X002A

Plate

-

2

F6-S8D-4x6S

Screw

• 28

1

8030-5320-T350A

Loading Fan

29

1

B030-5320-X007A

Plate

-

4

F6-SW2NA-3x40S

Screw

Magnetic Bead

• 27

4

25

DESCRIPTION

-

•

26

SPECIFICATION

• 19

•

*l

COMPOSITION
& QUANTITY

1

8860-1780-TOOIA

2

F6-SBD-4xlOS-M-NilA

Screw

1

F6-SNA-3x6BS

Screw

F6-Wll-3PB

Washer

1

B960-0110-T016A

Cleaning kit

B030-5320-X20 !A

Sensor Disk

Spare part is marked.

24

B03P-5325-0 I OOA ••• 02A

7-7

INDEX NO.
I

tll

09

07Qe050 .. 0:S

1---l

l

COMPOSITION

l
2

-10

Screw
Front Cover Assy

4

l

[ B2l0-1670-V660A

5

2

6

2

7

2

..
..
.
.••
..

IA

I~
5~'

~

~5

w

/

/

r

j

3

2

M2441A/M2443A

CT-GPJ-030-Kitagawa

Spring Cover
Fook

F6-Nl-45-M-Ni lA

Nut

8

F6-WB-4S-M-Ni IA

Washer

8

F6-WM-4S-M-NilA

Washer

l

B03B-5320-D021A

PCA Rack Unit

5

F6-SW2NA-4x6S-M-NilA

Screw

B03B-5320-E021A

H2441A PCA Package

Cl6B-512!-0860#U

PCA

I

Cl6B-5121-0880#U

PCA 'RFM'

I

C!6B-5327-0050#U

PCA 'MPU'

I

Cl6B-5327-0060#U

PCA 'IFC'

I

B l6B-9890-0020A#U

PCA 'RDA' (M244!)

l

Bl6B-9460-0100A#U

PCA 'SVA'

I

C! 6B-550 l-0840#U

PCA 'VFO' (M2441)

I

Cl6B-5121-0860#U

i PCA 'WFM'

l

Cl6B-5121-0880#U

PCA 'RFM'

l

Cl6B-5327-00SO#U

PCA 'MPU'

l

Cl6B-5327-0060#U

PCA 'IFC'

l

Bl6B-9920-0010A#U

PCA 'RDA' (M2443A)

1

B!6B-9460-00IOA#U

PCA

I

C! 6B-5501-0940#0

PCA 'VFO' (M2443A)
Filter Assy

B03B-5320-E022A

l

M2443A PCA Package

1 SVA'

1

B90L-l 155-0019A

• 12

l

B03B-5320-D022A

Right Fan Unit

*

l

B03B-5320-D023A

Left Fan Unit

2

B90L-1540-000IA

Finger Guard

8

F6-SBD-3x45S-M-NilA

Screw

14

8

'WFM'

• 11

13

7-

Window

l

I

*

0

/

Rear Cover Assy
Spring

l

*

.-n

B210-1670-X9l3A

8

*

~

I

I
I

B2 l0-16 70-X328A
B210-1670-X6l0A

•

7~

I

B210-1670-V655A

10

I

Side Cover Assy

F6-SBD-4xlOS-M-NilA

II

I

Cabinet

B210-1670-V670A

I

8

//

B2l0-l670-T003A

3

4

A REAR VIEW (M2443A)

DESCRIPTION

SPECIFICATION

& QUANTIYT

I

2

A REAR VIEW CM2441A)

8

CABINET & PCA RACK SECTION (M2441A/M2443A} (1/2)

FIGURE 03.

FIGURE 03. CABINET & PCA RACK SECTION

7-

l
*

Spare part is marked.

B03P-5325-0100A ••• 02

7 - 9

FIGURE 13. CABINET & PCA RACK SECTION

FIGURE 13. CABINET & PCA RACK SECTION (M2442A/M2444A)

INDEX NO.

COMPOSITION
& QUANTITY

i

T

1,

3

..

12

Frame Assembly

B210-1860-X012A

Sponge

l

B210-1860-X011A

Sponge

3

B30L-0970-0201A

Roller Catch

12

F6-SW2NA-2. 6xl2S-M-NilA

Screw

5

-

Plate

4

F6-Nl-4S

Nut

4

F6-WM-4S

Washer

4

F6-WB-4S

Washer

4

'F6-Nl-4S

4

F6-WM-4S

Nut
Washer

F6-WB-4S

Washer

l

B21D-1860-Xl09A

Plate

-

4

F6-Nl-4S

Nut

4

F6-WM-4S

Washer

4
l

F6-WB-4S
·B2I0-1670-X822A
B210-1£70-X824A

Washer

Frt Or Han-Rr Piece

-

1

I

B210-1860-V201A

Right Rail Assembly

8

1

B210-1860-V202A

Left Rail Assembly

9

I

8210-1670-WSSIA

Plate

-

6

F6-SV2NA-3x8S

Screw

I

BSSL-0400-000IA

l

B210-1860-V006A

Door Switch
TUv Svttch Interlock

B210-l860-VD39A

·'Mv Door Interlock

B2I0-1670-XB23A

OP Panel Bar

•

.

;:
c:

Front Door Assembly (OLD)

B210-1860-X108A

4

~

m

B210-1860-Vl20A
I

.7

6

::a

I

1

4

A REAR VIEW (M2442A)

Cabinet

12

2

.-

B210-1860-T011A
B210-1860-V001A

1

I

DESCRIPTION

SPECIFICATION

I

Frt Dr Han-Ft Piece

R

D
A

9

A REAR VIEW (M2444A)

*1
M2442A/M2444A

Spare part is marked.
B2 IO-l 860-V600A New Style (Ught weight)

BOJP-5325-0 IOOA ••• 028

7-9

7 - 10

FIGURE 13. CABINET & PCA RACK SECTION (M2442A/M2444A)

FIGURE 13. CABINET & PCA RACK SECTION

COMPOSITION

INDEX NO.

DESCRIPTION

SPECIFICATION

& QUANTITY

10

I

B03B-5320-D021A

PCB Rack Unit

-

5

F6-SW2NA-4x8S

Screw

..
.•
..
..
.•
..
.

B03B-5320-E021A

H2442A PCA Package

t

Cl6B-5121-0860#U

PCA 'WFM'

I

Cl6B-512 l-0880#U

PCA 'RFM'

l

Cl68-5327-00SO#U

PCA 'MPU'

I

Cl6B-5327-0060#U

PCA 'IFC'

I

Bl6B-9890-0020A#U

PCA 'RDA' (M2442A only)

l

Bl 68-9460-0 I OOA#U

PCA 'SVA'

I

Cl 6B-550 l-0840#U

PCA 'VFO' (M2442A only)

B03B-5320-E022A

M2444A PCA Pack.age

I

Cl6B-5121-0860#U

PCA 'WFM'

I

Cl6B-5121-0880#U

PCA 'RFM'

1

Cl6B-5327-00SO#U

PCA 'MPU'

I

Cl6B-5327-0060#U

PCA 'IFC'

I

Bl6B-9920-00IOA#U

PCA 'RDA' (M2444A only)

I

Bl6B-9460-0100A#U

PCA 'SVA'

I

Cl6B-5501-0940#U

PCA 'VFO' (M2444A only)

I

*

t

..
*

BOJB-5325-00IOA

PCA 'BUF' Option

B90L-1155-0019A

Filter Assembly

II
• 12

I
I

B03B-5320-D022A

Right Fan Unit

• 13

I

B03B-5320-D023A

Left Fan Unit

14

2

B90L-1540-0001A

Finger Guard

8

F6-SBD-3x45S-M-NIIA

Screw

• 15

I

C56L-0460-0003

Power Switch

-

2

F6-SW2NA-3x8S

Screw

16

I

B210-1860-X026A

Locking Metal Upper

I

B210-1860-X020A

I.Ocking Metal Lower

2

F6-Sl
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