Service Manual Basic Four 7270 Video Display Terminal 13xx 8 Way Board BFISD8046__7270_Video_Display_Terminal_Service Manual_1980 BFISD8046 1980
BFISD8046__7270_Video_Display_Terminal_ServiceManual_1980 BFISD8046__7270_Video_Display_Terminal_ServiceManual_1980
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SF/SD 8046
Mode/7270
Video Display Terminal
Service Manual
1.. 1. ~ Basic Four
""'~, Information Systems
@
The information contained herein is proprietary to and considered a trade
secret of Manag-ement Assistance Inc. '
All rights reserved. No part of this publication may be reproduced, recorded or
stored in a retrieval system, or transmitted, in any form or by any means,
whether electronic, mechanical, photog-raphical, or otherwise, without prior
written permission of the Basic Four Information Systems Division of
-Management Assistance Inc.
All Rights Reserved.
BFISDB046
Copyright © 1980 by Management Assistance Inc.
All specifications are subject to change wi.thout notice. Basic Four
and MAl are registered trademarks of Management Assistance Inc.
Printed in the United States of America
Basic Four Information Systems Division, Management Assistance Inc.
14101 Myford Road, Tustin, California 92680 (714) 731-5100
TABLE OF CONTENTS
Page
CHAPTER 1
INTRODUCTION
1.1
1.2
1.3
1.4
General Description
.....
Purpose . . . . . . . . . . .
Physical Description . . . . . . . .
Specifications . . . . . .
.
CHAPTER 2
INSTALLATION AND OPERATION
2.1
2.2
2.2.1
2.2.2
2.3
2.4
2.5
2.6
Unpacking/Packing Procedure . . . . .
Pre-Installation Checks . . . . . . .
Model 7270 Pre-Operational Checks .
Model 7280 Pre-Operational Checks .
Input Power Configuration . . . . .
Systems Installation Procedure
Operational Switches and Controls . .
Operating Modes . . . . . . . . . . .
..
· . . 1-1
· 1-1
...
....
...
. . . · . . 1-1
. ....
· . . 1-3
·
. . . . . .
·
. . . . . . . ..
. . .
. . . .
........
. . . . ..
..
.........
. . . . . . ..
.
2-1
2-1
2-3
2-5
2-8
2-8
2-8
2-12
CHAPTER 3
MAINTENANCE
3.1
3.2
Introduction . . . . . . . . . . . .
.........
General Operation . . • . . . . . . . . . . . . . . . .
Functional Description . . . . . . . . . . .
. . .
CRT Display Monitor Assembly . . . . . . . . . .
..
Video Amp 1i fier . . .
...............
Vertical Deflection . . . . .
.......
..
Horizontal Deflection
........
.....
...
...
........
Keyboard Assembly
Control I/O Logic PCB .
...............
Microprocessor . . . . . .
. . . . ..
..
.
Data Input/Output . . . . . . . . . . . . . . . .
Program Flow . . . .
.......
......
Power Supply Assembly . . . . . . . . .
.......
Diagnostic Tests . . . . . . . .
......
.
VDT Diagnostic Test .
...
......
.
General Characteristics . . .
...........
Operating Instructions . . . .
. . . . . . . .
BASS System Level Diagnostic Tests . . . . . .
.
Adj ustment Procedures . . . . . . . . . . . . . . . . . . .
Power Supply Adjustments . . . . . . . . . . . . . . . .
Video Monitor Adjustments .
. . . . . ....
Horizontal Adjustments . . .
.....
....
Vertical Adjustments
. . . . . . . ..
....
. . . . . . . . ..
...
Focus Adjust
Centering Adjust
. . . . . . . . . ~
...
3-1
3-1
3-3
3-4
3-4
3-4
3-5
3-6
3-9
3-9
3-9
3-11
3-13
3-15
3-15
3-15
3-16
3-17
3-18
3-18
3-19
3-20
3-20
3-21
3-21
3.3
3.3.1
3.3.1.1
3.3.1.2
3.3.1.3
3.3.2
3.3.3
3.3.3.1
3.3.3.2
3.3.3.3
3.3.4
3.4
3.4.1
3.4.1.1
3.4.1.2
3.4.2
3.5
3.5.1
. 3.5.2
3.5.2.1
3.5.2.2
3.5.2.3
3.5.2.4
111
TABLE OF CONTENTS (continued)
Page
CHAPTER 4
REMOVAL/REPLACEMENT PROCEDURES/SPARE PARTS LIST
4.1
4.2
4.3
4.3.1
4.3.2
Introduction • . . . . . . . .
Spare Parts List . • . . . . .
Removal/Replacement Procedures
General • . . . . . . ':.' .
CRT Assembly . • . . . . '..
CHAPTER 5
REFERENCE DATA
APPENDIX A
VDT CONTROLLER
lV
.
.
.
.
.
.
.
.
. . . . . .
. . . . . .
. . . . • .
. . • • . .
......
.
.
.
.
.
.
.
•
• .
. . . .
• . . .
. • . .
....
4-1
4-1
4-1
4-2
4-2
LIST OF ILLUSTRATIONS
F.i gure
1-1
2-1
2-2
2-3
2-4
3-1
3-2
3-3
3-4
3-5
3-6
3-7
3-8
3-9
3-10
3-.11
3-12
Page
VDT Assembly/PCB Location . . . . . . .
VDT Power Transformer Input Connections
I/O Control Logic PCB . . . . . . .
Model 7270 Test Patterns . . . . . . .
Mouel 7280 Test Patterns . . . . . . .
.
Character Generation
. . . .
Functional Block Diagram, VOT .
English Keyboard . . . . . .
World Trade Keyboard
. .
World Trade (Belgian/French)
Katakana Keyboard (7280) . . . . . .
. .
Firmware Interface To VOl .
Overview Firmware Flow . . . . . . . . . .
....... .
Block Diagram, Power Supply
Block Diagram Regulator Assembly . . .
VUT Power Supply Adjustments . . . . . . . . .
Monitor Board Adjustments. . . .
. ..... .
... ..
..
....
..
..
.
.
. . . . .
....
..·..
.
.
·..
. . .. .
.
1-2
2-1
2-2
2-4
.
.
.
.
..
2-6
3-2
3-3
3-7
3-7
3-8
3-8
3-11
3-12
3-13
3-14
3-19
3-20
LIST OF TABLES
Page
Table
1- 1
2-1
2-2
2-3
3-1
4-1
5-1
. .
Specifications . . . . . . . . . . . . . . . .
· .
Transformer Primary Connections
........ .
VOT Switches . . . . . .
...
........... .
Keyboard Controls . . . . .
......
. . . . . .
.
Firmware Flags Definition.
. ...... .
Spare Parts List . . . . . . .
.... .
Glossary, Signal List . .
. ............. .
.
1-3
2-1
2-9
2-10
3-10
4-1
5-3
'CHAPTER 1
INTRODUCTION
1.1
GENERAL DESCRIPTION
The Model 7270/7280 Video Display Terminal (VDT) contains an operator controlled
keyboard for entry of data to the CRT display, an I/O port for communication with
a host CPU (BFC Model 200/410 and 610/730 Systems), and a printer port for
communications to a RS-232C compatible serial printer.
The VDT is packaged as a two-piece molded housing unit which can be mounted on top
of a console work surface or stand alone on a table.
It displays up to 24 lines of
80 characters and is intensity modulated by a 5 x 7 dot matrix.
Figure 1-1 shows
the location of the VDT assemblies and PCBs.
1.2
PURPOSE
This manual contains the necessary information to repair and maintain the VDT.
It
contains both physical and functional descriptions, installation/operation and
maintenance procedures, and a spare parts list.
1.3
PHYSICAL DESCRIPTION
The VDT contains a single logic PCB, a power supply, and video monitor assemblies
that are readily accessible for servicing.
port and a printer port.
The logic PCB contains both an I/O
Physically the 7280 differs from the 7270'in that it
contains the Katakana keyboard and the Controller is modified for eight bit data
transmission.
They are functionally similar (refer to Chapter 3 for a more detailed
discussion of VOT function).
1-1
VIDEO MONITOR
POWER
SUPPLY
LOGIC
PCB
KEYBOARD
Figure 1-1.
1-2
vor
Assembly/PCB Location
1.4
SPECIFICATIONS
TABLE 1-1.
SPECIFICATIONS
Parameters
Characteristics
PHYSICAL
Width
18.3 inches (46.4 cm)
Depth
21.5 inches (54.6 cm)
Height
12.5 inches (31.8 cm)
Weight
25 pounds (11.4 kg)
POWER
Line Voltage
115/230 VAC
Frequency
50/60 Hz
Current
1.4A@115 VAC
0.7A@230 VAC
Power
161VA
Phase
Single phase 3 Wlre
Heat Output
549.5 Btu/hr
±
±
10%
0.2%
ENVIRONMENTAL
Temperature
Humidity
40% to 60% non-condensing
GENERAL
Display
CRT Size
12 inch diagonal w/P4 phosphor
Display Field
24 lines of 80 characters
Display Size
7-7/8 inches x 5-1/2 inches ±
0.1 inch
Matrix
5 x 7 dot w/white characters on black
1-3
TABLE 1-1.
SPECIFICATIONS (continued)
Parameters
Characteristics
1---------------------+------.--..--.. --.--.-.-.-.-------------'1
Interface Signals
1-4
Binary One
-3 volts to -9 volts minimum
(receive data/transmit data)
Binary Zero
+3 volts to +9 volts minimUm
(receive data/transmit data)
Receiver termination
4000 ohms
Transmitter termination
300 ohms
Maximum cable length
1,000 feet (cable is ordered in
increments of 25 feet)
CHAPTER 2
INSTALLATION AND OPERATION
2.1
UNPACKING/PACKING PROCEDURE
The VDT is shipped in a specially designed container consisting of a corrugated
cardboard box and a two piece foam pad.
This container must be retained for any
future shipment of the VDT.
Unpacking the VDT is a fairly simple task which can
be performed by one person.
Care must be taken not to drop the VDT as it is
removed from its container.
2.2
PRE-INSTALLATION CHECKS
1.
Loosen the cover retaining screws located on the bottom front two
corners and then open the top cover of VDT.
2.
Carefully inspect the interior of the VDT for shipping damage, loose
connectors, loose hardware, IC's out of their sockets, etc.
3.
Verify the input power configuration is correct (Table 2-1 and Figure 2-1).
TABLE 2-1.
Input
Connect
Taps 1 and 2
Tap 2 to Tap 5 and Tap 1 to Tap 4
Taps 1 and 3
Tap 3 to Tap 6 and Tap 1 to Tap 4
Taps 1 and 5
Tap 2 to Tap 4
Taps 1 and 6
Tap 3 to Tap 4
Voltage
100 VAC
;
115 VAC
200 VAC
230 VAC
I
II
TRANSFOID1ER PRIMARY CONNECTIONS
1
6
lOOV INPUT
Figure 2-1.
115V INPUT
200V INPUT
230V INPUT
VOT Power Transformer Input Connections
2-1
J4
o
-~-Jl
o
S2
J5
o
o
•oo
a
o
51
J8
CONTRAST
J7
LOC ZL
VOl
-----
PtttNTER
Figure 2-2.
2-2
I/O Control Logic PCB
4.
Close top cover of VDT and tighten retaining screws (refer to step 1).
5.
Set DUPLEX switch (Sl) to Batch mode (Figure 2-2).
6.
Set jumper at location 2L to 9600 baud for the VOT and 2400 baud for the
Printer (Fig'ure 2-2).
7.
Check that the ac line includes a third-wire earth ground that meets, or
exceeds the requirements of the National Electrical Code. This can be
checked by the following procedures:
oj
a.
Locate the circuit breaker that is to supply power to the system.
With a digital voltmeter set to measure 20 volts ac, and the circuit
breaker turned on, measure the drop between the green and white wires
at the power source (wall outlet). The measured voltage must be less
than 1.8 volts ac.
b.
Switch the source circuit breaker off. Measure the resistance between
the green and white wires at the power source (wall outlet). The
resistance must be less than the value shown below for the applicable
circuit breaker rating.
CB Rating
Resistance
15 amps
20 amps
30 amps
0.30 ohms
0.25 ohms
0.15 ohms
If either measurement in step a or b above is not less than the value given,
request the customer to provide a power source that meets these requirements.
8.
Connect VOT power plug to proper ac voltage source.
9.
Set VOT MAIN POWER switch to the ON position and verify the following:
a.
An audible tone of approximately one kilohertz is present at the
speaker for one second.
b.
The cursor appears, in approximately 30 seconds, at the home position
(0,0) on the display.
MOOEL 7270 PRE-OPERATIONAL CHECKS
~.1
1.
Verify that the Mode key is not locked in the pressed position.
2.
On the Typewriter section of the keyboard, press and release each Alpha
Numeric and Symbol key, from left to right until all of these keys have
been pressed (44 keys).
3.
On the Adding Machine section of the keyboard, press and release each
Numeric and Symbol key, from left to right until all of these keys have
been pressed (13 keys).
4.
Press and release the Space Bar twenty-three times.
5.
The resulting display will consist of one row of Alpha Numeric characters
and Symbols as indicated on Figure 2-3, line A. The Cursor will appear
at location 0,1.
2-3
6.
Press Mode key until it locks in the pressed position, and release it.
7.
Repeat steps 3 thru 4.
8.
The resulting display will consist of two rows of Alpha Numeric characters
and Symbols as indicated in Figure 2-3, lines A and B. The Cursor will
appear at location 0,2.
9.
While holding the Shift key pressed, repeat steps 2 thru 4.
10.
The resulting display will consist of three rows of Alpha Numeric characters
and Symbols as indicated in Figure 2-3. The Cursor will appear at location
0,3.
11.
Press Mode key until it unlocks and release it.
12.
While holding the Shift key pressed, repeat steps 2 thru 4.
13.
The resulting display will consist of four rows of Alpha Numeric characters
and Symbols as indicated in Figure 2-3. The cursor will now be positioned
in the fourth row at location 0,4.
A
1234567890:-@QWERTYUIOP&ASOFGHJKL-ZXCVBNM,./-,7894561230.
B*
1234567890:-@QWERTYUIOP&ASOFGHJKL-ZXCVBNM,./-,7894561230.
C
!"#$S '()+*=;QWERTYUIOP ASOFGHJKL\ZXCVBNM<>? 7894561230.
D
!"#$% '()+*=;
r\
A]<>? ·7894561230.
• All LEITERS in this row are VIDEO INVERTED (Le .. black letters on a white background).
Figure 2-3.
2-4
Model 7270 Test Patterns
14.
Release the Shift key.
15.
Press and release the Backspace key ten times .
.
16.
The resulting display will consist of four rows of Alpha Numeric characters
and Symbols as indicated in Figure 2-3. The Cursor will now be positioned
in the fourth row at location 70,3.
17.
Press and release the CR/Enter (carriage return) key once.
18.
The resulting display will consist of four rows of Alpha Numeric characters
and Symbols as indicated in Figure 2-3. The Cursor will now be positioned
in the fourth row at location 0,3.
19.
Press the CLR (cl~ar) key. This procedure completely erases the display
and positions the Cursor at the home location 0,0.
20.
Press and release Special Function Key I ten times. The first row of the
display will now contain ten symbols, Video Inverted (black characters
on a white background), with the Cursor at location 11,0.
21.
Press and release Special Fupction Key III one time. The Cursor will move
from location 11,0 to location 0,0. The ten symbols, Video Inverted,
will still be left intact.
22.
Press the release Special Function Key II ten times. The ten symbols,
Video Inverted, will be replaced one at a time with ten equal symbols,
Video Inverted. The Cursor will be at location 11,0.
23.
Press and release Special Function Key IV twenty-three times. The Cursor
will move from location 11,0 to the first character position of line two,
0,1, and to every first character position in succession until it finally
re~ches location 0,23.
24.
While pressing the CTRL (control) key, press and release the following
keys in order and verify the VOT response.
2.2.2
a.
(CTRL/I) - Cursor moves from location 0,23 to location 0,0.
b.
(CTRL/CLR) - All characters are erased with the Cursor remaInIng at
location 0,0.
c.
(CTRL/G) - Audible tone of one kilohertz or two kilohertz IS emitted
from the speaker for approximately one second.
d.
(CTRL/L) - Cursor moves one character position to the right to
location 1, 0 ..
e.
(CTRL/ J) - Cursor moves one character position down to location 1,1.
f.
(CTRL/H) - Cursor moves one .character position to the left to
location 0,1.
g.
(CTRL/K) - Cursor moves one character position up to location 0,0.
MODEL 7280 PRE-OPERATIONAL CHECKS
1.
Press and release the Latin key.
2.
On the Typewriter section of the keyboard, press and release each Alpha
Numeric and Symbol key, from left to right until all of these keys have
been pressed (48 keys).
3.
On the Adding Machine section of the keyboard, press and release each
Numeric and Symbol key from left to right until all of these keys have
been pressed (13 keys).
2-5
4.
Press and release the Space Bar nineteen times.
5.
The resulting display will consist of one row of Latin characters and
Symbols as indicated in Figure 2-4, line A. The Cursor will appear at
location 0,1.
6.
Press and release the Latin SymbOl key.
7.
Repeat steps 2 thru 4.
8.
The resulting display will consist of two rows of Latin characters and
Symbols as indicated in Figure 2-4, lines A and B. The Cursor will
appear at location 0,2.
A
1234567890-A¥ QWERTYUIOP@[ASDFGHJKL;:]ZXCVBNM,./¥-,7894561230.
B
1"1$%"()
=
+*
r
D
-,7894561230.
<>?
J"
,0. -,7894561230.
-
Figure 2-4. Model 7280 Test Patterns
9.
2.:..6
Press and release the Kana key.
10.
Repeat steps 2 thru 4.
11.
The resulting display will consist of two rows of Latin characters and
Symbols as indicated in Figure 2-4, lines A, B, and C. The Cursor will
appear at location 0,3.
12.
Press and release(the Kana Symbol key.
13.
Repeat steps 2 thru 4.
14.
The resulting display will consist of two rows of Latin characters and
Symbols and two rows of Latin/Kana characters and Symbols as indicated
in Figure 2-4. The Cursor will appear at location 0,4.
15.
Press and release the Latin key.
16.
Press and release the Backspace key ten times.
17.
The resulting display will consist of two rows of Latin characters and
Symbols and two rows of Latin/Kana characters and Symbols as indicated
in Figure 2-4. The Cursor will now be positioned in the fourth row at
location 70,3.
18.
Press and release the Carriage Return key once.
19.
The resulting display will consist of two rows of Latin characters and
Symbols and two rows of Latin/Kana characters and Symbols as indicated
in Figure 2-4. The Cursor will now be positioned in the fourth row at
location 0,3.
20.
Press the CLR (clear) key. This procedure completely erases the display
and positions the Cursor at the home location 0,0.
21.
Press and release Special Function Key I ten times. The first row of the
display will now contain ten symbols, Video Inverted, with the Cursor at
location 11,0.
22.
Press and release_Special Function Key III one time. The Cursor will move
from location 11,0 to location 0,0. The ten symbols, Video Inverted,
will still be left intact.
23.
Press and release Special Function Key II ten times. The ten symbols,
Video Inverted, will be replaced one at a time with ten equal symbols,
Video Inverted. The Cursor will be at location 11,0.
24.
Press and release Special Function Key IV twenty-three times. The Cursor
will move from location 11,0 to the first character position of line two,
0,1, and to every first character position in succession until it finally
reaches location 0,23.
25.
While pressing the CTRL (control) key, press and release the following keys
In order and verify the vnT response.
a.
(CTRL/I) - Cursor moves from location 0,23 to location 0,0.
b.
(CTRL/CLR) - All characters are erased with the Cursor remaining at
location 0,0.
c.
(CTRL/G) - Audible tone of one kilohertz or two kilohertz
from the speaker for approximately one second.
d.
(CTRL/L) - Cursor moves one character position to the right to
location I, 0.
e.
(CTRL/J) - Cursor moves one character position down to location 1,1.
f.
(CTRL/H) - Cursor moves one character position to the left to
location 0,1.
g.
(CTRL/K) - Cursor moves one character position up to location 0,0.
IS
emitted
2-7
2.3
INPUT POWER CONFIGURATION
The 7270/7280 VDT is capable of operating with ac line voltages of 100, 115, 200, or
230.
The power transformer (Figure 2-1) has been provided with a tapped pr1mary
to accommodate the four different input voltages.
The ac line should be connected
to the primary taps as shown in Table 2-1 and Figure 2-1.
2.4
SYSTEMS INSTALLATION PROCEDURE
Perform the following steps when installing the VDT in a system environment.
1.
Set DUPLEX switch (Sl) to FULL mode (see Figure 2-2).
2.
Verify jumper at location 2L is in the 9600 position (see Figure 2-2).
3.
Verify that the VDT Controller PCB is configured correctly for proper
Baud Rate (refer to Appendix).
4.
Insert PO of VDT Controller cable into proper jack on the VDT Controller
PCB.
5.
Insert PI of VDT Controller cable into I/O connector on rear of VDT.
6.
Power up the system to which the VDT is connected.
7.
Run the following VDT diagnostic programs (refer to paragraph 3.4):
a.
%VOI - Keyboard Echo Test*
b.
%V02 - Control Interaction Test
*Verify ASCII characters AO (space) thru DF only.
2.5
OPERATIONAL SWITCHES AND CONTROLS
A description of the switches and controls which effect operation of the VOT 15
contained in the following tables.
2-8
TABLE 2-2.
VDT SWITCHES
.-------------------------------~-----------------------------------------------~
Switch
Function
MAIN POWER SWITCH
This is a rocker action switch, on the front
panel, which controls the ac power to the VDT.
BRIGHTNESS CONTROL
This control, located on the front panel,
adjusts the intensity of the display. Normally
it is adjusted until the raster (Horizontal
Scan Lines) is visible then backed off until
the raster just disappears.
CONTRAST CONTROL
The potentiometer (R32), located near 4M on
the Control-I/O PCB, adjusts the difference in
intensity between the background and the
characters in the display. It is normally
adjusted to suit the operator's preference
after the Brightness Control has been adjusted.
RATE SWITCH
This switch, located on the rear of the VDT,
is the Baud Rate selector. When this switch
is in the option position, Baud Rate from
300 Baud to 9,600 Baud may be selected by
moving the jumper at location 2L to the proper
position. When the Rate switch is in the 9600
position the VOT Baud Rate is set for 9600
Baud which is the normal operating position.
When the RATE switch is in the 2400 position
the VDT Baud Rate is set for 2400 Baud.
DUPLEX SWITCH
This switch, located on the rear of the VDT
sets the mode of Data Transmission. The normal
operating position for this switch is F (Full
Duplex Operation). It may be helpful for
troubleshooting to set the Duplex switch to H
(Half-Duplex Operation where characters entered
from the keyboard are displayed twice) or to
B (Batch Mode); in which case the VDT will
operate without being connected to a controller.
2-9
TABLE 2-3.
Key
KEYBOARD CONTROLS
Function
CTRL
The CTRL (control) key is used in conjunction
with several of the Alphanumeric and Symbol
keys to produce transmittable characters used
for function codes.
SHIFT
The Shift key is used in conjunction with those
keys having shifted symbols on their keytops.
This enables one key to produce more than one
type of character.
MODE
The Mode key is an alternate action switch
which causes the lower case symbols for any
alphabetic character to be displayed (if this
option is installed).
.
CR/ENTER
The CR/Enter key is used when the VOT is under
CPU control. Striking this key causes the
Cursor to be moved to the start of the next
lower line on the display, accomplishing a
carriage return and line feed. All characters
entered since the preceding CR/Enter are then
stored in the CPU. In Batch no line feed is
performed.
SPACE BAR
The Space Bar moves the Cursor one position to
the right each time it is pressed. Any
character at the Cursor position is
automatically erased.
ESCAPE
The Escape key is generally used to generate a
program interrupt. The use of the key is
dependent upon system software.
CLR
When the CLR (clear) key is pressed, the display'
is cleared of all unprotected characters and the
Cursor is moved to position 0,0. If the display
contains protected characters, the Cursor is
moved to the first unprotected position on the
screen.
PRINT
The Print key, used in conjunction with VOT
serial printer port option, causes the VOT
display to be reproduced on an optional
printer.
2-10
TABLE 2-3.
Key
KEYBOARD CONTROLS (continued)
Function
SPECIAL FUNCTI0N KEYS
(I thru IV)
Under normal CPU control these four special
functions or "MOTOR BAR" keys are used by the
software for operator responses.
NUMERIC KEY CLUSTER
(0 thru 9)
These keys provide a more convenient way of
making numerical entries than the' same keys on
the typewriter keyboard. The keys in the
numeric key cluster are unaffected by the shift
or CTRL keys.
BACKSPACE
(LEFT POINTING ARROW)
The Backspace key causes the Cursor to move one
position to the left, non-destructively.
TYPEWRITER KEYBOARD
These keys are used to display the Alphanumeric
characters and symbols that the VDT is capable
of producing.
SPECIAL KEYS (7280)
LATIN (KANA KEYBOARD)
Pressing the Latin key forces the keyboard
into the Latin mode and allows upper Latin key
legends to be displayed. Spaces are produced
for missing legends.
KANA (KANA KEYBOARD)
Pressing the Kana key forces the keyboard into
the Kana mode and allows lower Kana key legends
to be displayed. Spaces are produced for
missing legends.
KANA SYMBOL (KANA KEYBOARD)
Pressing the Kana Symbol key forces the
keyboard into the Kana Symbol mode and allows
upper Kana key legends to be displayed.
Spaces are produced for missing legends.
CR/ENTER
The CR/Enter key is used when the VDT is under
CPU control. Striking this key causes the
Cursor to be moved to the start of the next
lower line on the display, accomplishing a
carriage return and line feed. All characters
entered since the preceding CR/Enter are then
stored in the CPU. In Batch no line feed is
performed.
2-11
2.6 OPERATING MODES
The VDT provides three different operating modes for selection by the operator.
They are:
1.
Full Duplex
2.
Half-Duplex
3.
Batch
The Full Duplex mode is the most commonly used of the three.
When the unit is
placed in this mode, ASCII characters from the keyboard are transmitted to the
Controller, stored in the CPU, and then returned to the VDT for display on the
screen.
The Half-Duplex mode causes the characters to be displayed on the screen at the
time they are entered from the keyboard.
The Controller then echoes the
character back causing a double character to be displayed on the screen.
This
mode is often useful during troubleshooting.
The Batch mode enables the unit to display the keyboard characters with or
without being connected to a Controller.
The VDT communicates with the Controller on a standard UART (Transmitter/Receiver).
It accepts standard Asynchronous serial data transmission.
The Microprocessor
sends seven or eight bit words (in parallel) to the UART'that outputs serial
IO-bit (domestic) or II-bit (Katakana) patterns that are transmitted to a printer
or CPU.
Separate lines are used for transmitting and receiving.
The serial printer port allows the VDT to control an RS-232C compatible printer.
Once a print operation has been initiated, the vnT will ignore all other requests
until the printing operation is completed.
either the CPU or'by a Keyboard entry.
2-12
Print commands can be initiated by
CHAPTER 3
MAINTENANCE
3.1
INTRODUCTION
The Video Display Terminal (VDT) provide3 input/output access to a data processing
system.
3.2
The Terminal consists of four principal functional modules.
1.
CRT Display Monitor Assembly
2.
Keyboard Assembly
3.
Control I/O Logic PCB
4.
Power Supply Assembly
They are:
GENERAL OPERATION
The VDT uses a Cathode Ray Tube (CRT) and
~1onitor
and Logic electronics to convert
alphanumeric data from a remote computer or its own keyboard into a screen display
format of 24 rows by 80 characters.
A Microprocessor is used to accomplish all data editing, keyboard control
functions, and communication tasks.
Video timing and control functions are
handled by a Video Timing and Control Chip (VTAC) which provides:
horizontal
and vertical sync information to the Monitor electronics, cursor locations to
video presentation circuits, and display character address information to the
screen RAM.
The Monitor electronics converts horizontal and vertical sync and video dot
information into raster SCAN information for the CRT.
Display characters are represented with a 5 x 7 dot matrix on the screen of the
CRT (Figure 3-1).
Each character row is allocated nine raster lines, seven for
the character and two for vertical interline spacing.
3-1
PHYSICAL EDGE OF CRT
DISPLAY AREA·
TYPICAL CHARACTER CELLS
24 LINES X 80 CHARACTER
CELLS PER DISPLAY
1920 CHARACTER
FRAME
CELLS.
=
INTERCHARACTER SPACING
to
~
DOT COLUMNS
1
234
-1
5
6
f: •••
•• ••
•••••
3
INTERLINE
SPACING
4
5
L:'--1___1. . .
TYPICAL CHARACTER CELL·MAGNIFIED
Figure 3-1.
Horizontal intercharacter
sp~cing
of dots between characters.
Character Generation
is accomplished by providing two blank columns
Reverse image display is used to indicate cursor
position superimposed over data.
Protected fields on the display are distinguished
by reduced intensity (background).
A complete field of characters in the VDT consists of 1920 character patterns
organized as 24 rows of 80 characters each.
Display fields are refreshed at a
rate set by a stable crystal oscillator that is synchronous with input power
(50/60 Hertz).
3-2
Both vertical and horizontal beam deflections are generated directly by sync
signals derived from the VTAC and are input to the CRT Honitor.
The CRT Monitor
IS a solid state unit designed for reliability and high quality video reproduction
in industrial and commercial installations.
3.3
FUNCTIONAL DESCRIPTION
A functional block diagram of the VDT is shown In Figure 3-2 followed by a
description of each functional block.
CRT
MONITOR
u
u
z
z
)0Il)
)0Il)
~::LI(
crt-
]:0
>0
00(
.... POWER ON RESET
....
...
CLEAR
8 LINES OF
KEYBOARD
DATA
-
-
\
/"
CONTROL I/O
LOGIC
-,.... TRANSMIT DATA
I CONTROLLER/CPU "I
I
...
..
KEYBOARD
-
..
_
PRINT
-
wo(
.....
STROBE
,- -
~o(
crt-
I
L ______ .J
RECEIVE DATA
....
r - - -,-...: -.,
,
,
I SERIAL PAINTER ,
I
IL...
Figure 3-2.
I
______
J
Functional Block Diagram, VDT
3-3
3.3.1
CRT DISPLAY MONITOR ASSEMBLY
This assembly is physically divided into two parts; the CRT Display and Wiring
Harness, and the Display Monitor PCB.
The Display Monitor is divided into three parts.
They are: 1) Video Amplifier,
2) Vertical Amplifier, and 3) Horizontal Deflection.
3.3.1.1
Video Amplifier
The Video Amplifier is a class B amplifier that directly drives the CRT's cathode.
It consists of Q101 and circuitry.
The incoming video signal is applied to the
monitor through JI01-pin 8 and RIOI to the base of QI01.
QIOI remains cut off
until a de coupled, positive-going signal arrives at its base and turns it on.
RI03 provides series feedback which makes the terminal to terminal voltage gaIn
relatively independent of transistor parameters and temperature variations.
The
negative going signal at the collector of QlOI is directly coupled to the CRT
cathode.
The class B biasing of QlOl allows a large video outout signal to modulate
the CRT's cathode and results in a maximum available contrast ratio.
The overall brightness at the screen of the CRT is also determined by the negative
potential at its grid, which is varied by the brightness control.
3.3.1.2
Vertical Deflection
The Vertical Deflection circuits consist of a vertical oscillator, an emitter
fOllower, a vertical output amplifier, and the vertical defection coil of the CRT
yoke.
3-4
The vertical oscillator, thyristor Ql02, is used as a programmable unijunction
transistor with its external circuitry to form a relaxation oscillator operating
at a vertical rate.
A sawtooth waveform signal is employed to raise the voltage
at the anode of Ql02 till it reaches its gate voltage at which time QI02 acts as
a closed switch.
gate.
The oscillator is synchronized by a negative pulse coupled to its
The sawtooth at the anode of Ql02 is directly coupled to the base of QI03.
This stage functions as a Darlington pair emitter follower driver for the output
stage Ql04.
The vertical output amplifier Ql04 uses a NPN power transistor
operating as a class AB amplifier.
The output of this stage is capacitively coupled
to the CRT yoke.
3.3.1.3 Horizontal Deflection
The Horizontal Deflection circuits consist of a monostable multivibrator, a
slave/driver, and a horizontal output amplifier to drive the horizontal deflection
coils.
The monostable multivibrator QlOS and Ql06 is synchronized by the
horizontal drive signal from JlOl-6 to provide an input signal to drive the
slave/driver Ql07.
The output signal of Ql07 is transformer coupled to the input
of the horizontal output amplifier Ql08.
functions:
The horizontal output stage has two main
1) to supply the deflection coil with the correct horizontal scanning
currents, and 2) to develop high voltage for the CRT anode and dc voltage for the
CRT bias, focus, and accelerating grids as well as the dc voltage for the video
.output stage.
This amplifier provides linearity control for the horizontal coils of the
deflection yoke.
voltage.
Linearity control is provided by modifying the deflection coil
During retrace, an auxilliary winding on the flyback transformer
supplies a pulse which charges Cl19 through rectifier diode CRl12 and Ll02.
This
voltage is then applied in series with the deflection coil when the damper diode
turns on at the start of trace.
3-5
The voltage is sawtooth shaped and has the effect of decreasing the deflection
coil current as a function of the sawtooth shape.
This compensates for the stretch
normally found on the left side of the screen due to the deflection coil and
system RL time constant.
Linearity is optimized by adjustment of Ll02 which acts
as an impedance to the pulse from T2.
The negative flyback pulse developed during horizontal retrace time is rectified
by CRll0 and filtered by Cl17.
This produces approximately -130 volts dc which is
coupled through the brightness control R1l7 to Gl of the CRT.
This same pulse is transformer coupled to the secondary of T2 where it is
rectified by CR1, CR1l3, and CR1l4 to produce rectified voltage of approximately
)
12 kilovolts, 400 volts and 32 volts respectively.
Twelve kilovolts is the anode
voltage for the CRT, while. 32 volts is used for the video output stage, and the
400 volts source is used for G2 and G4 voltages for the CRT.
3.3.2
KEYBOARD ASSEMBLY
The Keyboard Assembly consists of a keyswitch matrix and PCB.
Each key on the
keyboard represents a keystroke and is encoded by the Keyboard electronics PCB
into a USASCII eight bit code for the Katakana keyboard.
With each character
produced, the keyboard stroke signal goes true indicating data is valid for that
time.
Also produced by the keyboard are the Clear and Print signals.
section recognizes these signals under microprogram control.
configurations are shown in Figures 3-3, 3-4, 3-5, and 3-6.
3-6
The control
Various keycap
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Figure 3-3.
AUSTRIAN IGE RMAN
V AND I CHARACTf R~
ARE IN IERCHANGlD
fOR THIS VERSION
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Figure 3-4.
I
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CD
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L
,-'1
Note 1 SEE SPECIAL Kl VCAP
0
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)
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BY NA r IONAlll v ARlIVl
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3-7
IT]
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(CTRLl 0
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Figure 3-5.
frRL)
rLATit'll
lS(MBJ
(
)0
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)0
GJJ G] [D GJJ 8J Q Q 8 EJ ( - )0
8 8 l0J B ~ B B ~ G] B B GJ EJ 0 0 GJ
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B Ej B B ~ B G3 GJ 8 G GJ [J t)
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(
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( ESCAPE)
r---"'
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~~
World Trade (Belgian/French)
81
93
( ESCAPE)
r-----
(KANA)
SYMB
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Figure 3-6.
3-8
-
0 0 GJ
GJ 0 GJ
8 0 0
)
(
0
(
Katakana Keyboard (7280)
I
J
EJ
G
G
[]
FR~
3.3.3
CONTROL I/O LOGIC PCB
The Control I/O Logic PCB is divided into three functional areas: 1) the
Microprocessor, 2) Data Input/Output, and 3) Control.
3.3.3.1
Microprocessor
The VDT firmware program resides in ROM and uses addresses OOOO-OFFF Hex.
A 256
byte scratch pad Read/Write memory at addresses 4000-40FF Hex is used for the
program stack and buffering of input data to the VDT.
The screen refresh buffer
holds data to be displayed and 1S assigned the highest priority in the system
organization.
It is organized as 24 rows of 80 columns each.
Row addresses from
the Microprocessor-VTAC are mapped (hardware address translation) through a row
map memory to allow high speed scrolling and editing without the necessity of
block data moves in screen memory.
3.3.3.2
Data Input/Output
Data is input to the VDT from the keyboard, and is interfaced V1a a Microprocessor
input port which is serviced by an interrupt after each keystroke.
Serial data
fro'm the mainframe computer is accumulated into a byte by· the UART which then
requests an interrupt for a port input to the Microprocessor.
Data bytes to the
mainframe computer are sent from a Microprocessor output port to this same UART
for serial transmission.
An optional printer is available which communicates with the Microprocessor in
a similar manner, but does not use an interrupt routine.
The printer UART status
is polled by VDT firmware when.data transfers to or from the printer are required.
3-9
The firmware also uses I/O ports to read hardware status bits, i.e., jumpers
installed to specify which hardware options are in effect.
In a similar manner,
the firmware can set and reset flag bits for use by the hardware (Table 3-1).
The VTAC is loaded by the firmware with screen format parameters, and holds the
cursor row and column register.
TABLE 3-1.
Bit Position
3-10
FIRMWARE FLAGS DEFINITION
Meaning When Bit Set (=1)
0
Keyboard Interrupt Software Enabled
1
Communications Interrupt Software Enabled
2
ESCAPE from Keyboard
3
Print Screen Done
4
In Bypass Mode
5
Keyboard CLEAR/PRINT in progress
6
ETX from CPU
7
ESCAPE from CPU
A general firmware program flow
1S
shown in Figure 3-7 j
Upon applying power to
the VDT, the hardware generates a reset condition to the Microprocessor which
then begins executing firmware instructions at row address 0000.
ROW
MAP
ADDRESS
CPU
ROM
MEMORY
SCRATCH
PAD
MEMORY
SCREEN
BUFFER
MEMORY
CHAR.
GEN.
VIDEO
DATA
HARDWARE AND
FIRMWARE
FLAGS
DATA BUS
"I
A-
V
V
COMM.
UART
PRINT
UART
I
KEYBOARD
CRT
CONTROL
CURSOR
REGISTERS
Figure 3-7.
3.3.3.3
~
CONTROL
Firmware Interface To VDT
Program Flow
The first routine initializes the stack pointer, interrupt mode, buffer pointers,
and VTAC data.
Each memory is then tested and initialized or cleared as applicable.
When all tests succeed, the alarm is sounded as an indication to the VDT operator.
If any test fails, the initialization routines 'continue, but the alarm will not
sound, indicating a problem to the operator.
3-11
After initialization, the idle routine is entered, which at this point simply loops
waiting for an interrupt to occur.
The keyboard interrupt routine, in normal mode
of fUll duplex, simply inputs a character from the keyboard and sends it to the
mainframe computer, then returns to the routine in process at the time of the
interrupt.
The conun interrupt (mainframe computer interrupt), gets a character
from the main frame UART, puts it in the next buffer location, then returns to
program execution.
When interrupts are enabled, they can occur during any routine
since the request is generated by hardware control.
After an interrupt from the
mainframe computer, the data buffer will contain at least one character.
A
character is removed from the buffer, then the firmware decodes the character as a
control code or display character and jumps to the appropriate routine.
Many of
the routines exit to the cursor position or jump directly to an entry point in the
cursor position ready for the next character.
~hown
An overview of the firmware flow is
\
in Figure 3-8.
POWER UP RESET
~
INTERRUPT
REQUEST
INITIALIZE
AND TEST
,t
IDLE
~
, I
,
DECODE
~
~
VARIOUS
ROUTINES
~
EXIT
Figure 3-8.
3-12
u
,f
KEYBOARD
COMM.
,
RETURN TO
r1AIN PROG.
Overview Firmware Flow
,~
RETURN TO
MAIN PROG.
3.3.4
POWER SUPPLY ASSEMBLY
The VDT Power Supply generates regulated +5, +15, and -12 volts dc for the varlOUS
VDT subassemblies.
The Power Supply consists of two major field replaceable units;
the transformer and a PCB.
Power for the VDT is provided by one power supply that produces +5, -12 and +15
volts.
IC's.
On the Logic Board is a regulator circuit which supplies +12 volts for MaS
The high voltage (+32, +400, +12000, and -130 volts) required by the CRT
are developed from the +15 volts by the horizontal deflection control circuits.
A
block diagram of the power supply is shown in Figure 3-9.
c:
RFI FILTER AND
ON/OFF SWITCH
-,.
~.
-~
~
...
POWER
TRANSFORMER
500120
C
Figure 3-9.
-
~
~
--,.
REGULATOR
ASSEMBLY
902130
I'
+5V
+15V
...,.. -12V
,.
Block Diagram, Power Supply
The power transformer steps down the ac input voltage to an ac voltage that is the
proper level for the dc regulators.
For primary tap changes, refer to paragraph
2.3.
Figure 3-10 shows a block diagram of the Regulator Assembly.
Three regulated
output voltages are provided, +5, +15, and -12 volts.
3-13
;,.
,.
FROM POWER
TRANSFORMER
1
~
-~
,.
RECTIFIERS
AND FILTER
CAP.
,.
+5V PASS
TRANSISTOR
Ql
CRI, CR2,
C2
...,..
,
+5V
REGULATOR
"
VRI
-
+15V
REGULATOR
I
.,.
FROM POWER
TRANSFORMER
1
...
:,-
--.
...
OVERVOLTAGE
PROTECTION
CR3, CR4. R4
OUTPUT
VOLTAGE
ADJUST
R2
--,
+l5V
PASS
TRANSISTOR
Q3
,..
t
Figure 3-10.
CURRENT
LIMIT
R5, Q4
- +5V
~
~
~
+15V
I
,.
...
3-14
CURRENT
LIMITER
Rl. Q2
~
VR2
FULL WAVE
BRIDGE TO
FILTER
CAP.
BRI
C1, C4
~
-12V
REGULATOR
VR3
Block Diagram Regulator Assembly
OUTPUT
VOLTAGE
ADJUST
R7, R6
• -l2V
3.4
DIAGNOSTIC TESTS
Each VDT contains two types of diagnostic tests.
They are described in the
following paragraphs.
3.4.1
VDT DIAGNOSTIC TEST
The VDT diagnostic test is a part of a stand alone SILVER Diagnostic System.
It
has been released in a disc version with Level 3.7A Operating System on Basic Four
System 200/410 and 3.7D Operating System for System 200/410 and 610/730.
3.4.1.1
General Characteristics
The purpose of the test is to provide the functional analysis of the VDT and its
associated Controller.
The test leads to a conclusion pointing out the
malfunctioning parts or confirming the operability of the unit.
The test is divided into 10 groups.
The option to execute any given group is
provided.
Group 1 - is designed to check extensively the Controller and VDT display
functions.
Groups 2 thru 8 - test extensively the keyboard circuitry (both the Extended
Run Time option and Operator Intervention option must be selected for these
groups to operate). These tests will check all keyboard types supported by
Basic·Four except a Katakana keyboard.
Group 9 - checks the remaining functions of the VDT; namely the CRT display,
CLR key, the speaker assembly, and CRT intensity. It also contains the quick
and simple keyboard test. The Operator Intervention option must be selected
in order to execute this group.
Group 10 - checks the printer port interface of the VDT. It is executed only
on the 7270 VDT with the serial printer actually configured as a "slave"
printer. The printer status is not checked in these tests.
One pass of the VDT Diagnostic Test takes approximately 15 minutes providing no
Operator Intervention or Extended Run Time options are selected.
.3-15
3.4.1.2 Operating Instructions
To execute the VDT Diagnostic Test the following steps should be taken:
To load from the Fixed Media Disc
1.
Set all Sense switches to OFF position.
2.
Load the Operating System using the ALT/LOAD method.
3.
Press any key on the keyboard to override a default.
4.
Key in SILVER, followed by CR when asked to enter the program name.
5.
Follow the screen instructions.
6.
Select 7270 VDT Diagnostic Test when the test Selection Menu is
displayed.
To load from the Silver Diagnostic Tape
1.
Mount the Diagnostic Tape on the Magnetic Tape Transport.
2.
Set Sense switches 1, 2, and 4 to the ON position.
3 to the OFF position.
3.
Turn on all online devices available.
4.
Press the LOAD switch on the CPU.
5.
Follow the screen instructions.
6.
Select 7270 VDT Diagnostic Test when the test Selection Menu
displayed.
Set Sense switch
1S
To load from the disc
3-16
1.
Set Sense switches 2 and 4 to the ON position.
and 3 to the OFF position.
Set Sense switches 1
2.
Load the Operating System using the ALT/LOAD method.
3.
Press any key on the keyboard to override a default.
4.
Key in SILVER, followed by CR when asked to enter the program name.
5.
Follow the screen instructions.
6.
Select 7270 VDT Diagnostic Test when the test Selection Menu is
displayed.
In order to select any special options provided by the system, the CLEAR key of
the CPU must be pressed any time after the display of theOiagnostic Test
Selection
3.4.2
Screen~
BASS SYSTEM LEVEL DIAGNOSTIC TESTS
The five BASS tests which exercise ~he VDT directly are %VOI thru %VOS.
This
series of tests typically take less than 30 minutes to perform and can be
invaluable in quickly locating problems in the VOTe
especially useful in locating intermittent problems.
Tests %V04 and %VOS are
Each of the five tests is
described as follows:
1.
%VOI - Keyboard Echo Test - This test should be run when it appears that
the VOT keyboard is not operating properly.
The program informs the operator that it expects a certain character to
be entered. The entered character is echoed if it is a printable
character. Two more lines are used to show the hexadecimal equivalent
of the input. To indicate a sequence break, a third line displays an
asterisk (*) whenever the entry is not the expected entry.
2•
%V02 - Control Interaction Test
Model 7270/7280 VOT types. The
various function tests, and the
d~vice's reaction to the test.
may select a retry of the test.
3.
%V03 - VOT Exerciser - This test checks that all printable characters
can be displayed. A test line consisting of all printer defined
characters is displayed on every VOT line.
4.
%V04 - VOT Scrolling Test - Checks ability of the 7270/7280 VOT to
scroll characters without alteration. Test should be run in the event
that scrolling appears to malfunction. It should be run whenever the
screen appears to be dropping or inserting characters. A test line
consisting of all printer defined characters is scrolled from the bottom
line to the top line and then read by the VOT under CPU control. Altered
characters are logged. The test line is rotated by one character, and
the test is repeated until each character of the test line has appeared
in the first position.
-" Performs full function test for all
initiating display is run through the
user is queried as to the nature of the
If the individual test fails, the user
3-17
5.
%V05 - VDT Print @ Test (Position Control) - Checks ability of the
7270/7280 VDT to do "@ position" control to any place on screen.
A full screen image is constructed using the "@ position" control for
each byte displayed. The test pattern is then read on a line by line
basis and checked against the target pattern. Altered characters are
jogged. Proper functioning of the scrolling operation is a prerequisite
for this test. Scrolling errors will cause a failure of this test.
3.5 ADJUSTMENT PROCEDURES
I
WARNING
The equipment described in this manual contains voltages
which are hazardous to life. These voltages may be .
exposed to touch when the .equipment is open.
Adjustments made to the VDT can be broken down into two classes:
adjustments, and 2) Video Monitor adjustments.
adjustments.
1) Power Supply
All other adjustments are operator
No adjustments should be made until standard troubleshooting
procedures outlined in this manual have been followed and it has clearly been
determined that the adjustments are necessary.
Failure to follow this suggestion
may cause additional problems.
3.5.1
POWER 'SUPPLY ADJUSTMENTS
The VDT Power Supply produces +5, +15, and -12 volts de.
The Power Supply
adjustments are R2 for the +5 volts dc and R6 for the +15 volts dc.
dc is not adjustable (see Figure 3-11).
3-18
The -12 volts
(HEAT SINK)
Figure 3-11.
VDT Power Supply Adjustments
The procedure for both measuring and adjusting these voltages is as follows:
1.
Set VDT Main Power Switch to the ON position.
2.
Set Digital Multi-meter (DMM) to 20 volts dc range.
3.
Measure the voltage between Jl-l and Jl-IO on the Regulator Assembly.and
verify that it falls in the range from +4.50 volts dc to +5.50 volts dc.
4.
Adjust R2 (+5 volts) on Regulator Assembly to obtain a reading of
5.0 ± 0.5 volts dc on the DMM.
5.
Measure the voltage between Jl-7 and Jl-IO on the Regulator Assembly and
verify that it falls in the range from +14.50 volts dc to +15.50 volts dc.
6.
Adjust R6 (+15 volts) on Regulator Assembly to obtain a reading of
+15.00 ± 0.10 volts dc on the DMM.
7.
Measure the voltage between Jl-5 and Jl-IO on the Regulator Assembly and
verify that it falls in the range from -11.6 volts dc to -12.4 volts dc.
3.5.2 VIDEO MONITOR ADJUSTMENTS
The Video Monitor Adjustments are Horizontal, Vertical, Focus, and Centering.
These adjustments interact with one another and are located on the Monitor Board
(Figure 3-12).
3-19
VERTICAL LIN.
VERTICAl HOLD
VERTICAL HEIGHT
UI02
UIOI
FOCUS
VIDEO CENTERING
HORIZONTAL LIN.
UI03
WIDTH
Figure 3-12.
Monitor Board Adjustments
3.5.2.1 Horizontal Adjustments
After entering a row of 24 H's, adjust video centering control A103 to center the
video within the raster horizontally.
Adjust Ll02 for best horizontal linearity.
Do not adjust L102 core out farther than necessary as this causes excessive power
to be consumed.
Adjust LI03 for desired width.
3.5.2.2 Vertical Adjustments
With the H's signal applied, adjust vertical hold control AIOI to lock in the
picture.
3-20
Adjust vertical linearity control AI02 for best overall linearity.
This
affects the vertical frequency slightly and might require a readjustment of the
vertical hold control.
3.5.2.3
Adjust vertical height control RllO for desired height.
Focus Adjust
Adjust focus control R122 for best overall focus of the picture.
Usually the
center and corners of the screen do not focus at the same setting and a compromise
must be made.
3.5.2.4
Centering Adjust
If the raster is not properly centered, it may be repositioned by rotating the
ring magnets behind the deflection yoke.
The ring magnets should not be used to
offset the raster from its nominal center position as this degrades the focus and
resolution of the display and may cause neck shadow.
3-21
CHAPTER 4
REMOVAL/REPLACEMENT PROCEDURES/SPARE PARTS LIST
4.1
INTRODUCTION
Chapter 4 of this manual lists the spare parts list and explains the procedure
for removal/replacement of these parts.
4.2
SPARE PARTS LIST
Table 4-1 lists the spared parts for the VDT.
TABLE 4-1.
SPARE PARTS LIST
Item No.
BFC MM
Number
Vendor
Part Number
1
741020
903260-001
PCBA, Logic 7270/80
1
2
730020
902130-000
PCBA, PIS Regulator
1
3
733010
400307
Keyboard Assembly Katakana*
1
4
733020
400306
Keyboard Assembly English
1
5
733120
906659-000
CRT/Yoke/Monitor Assembly
1
6
738010
400310-000
Transformer
1
7
738020
902127-000
Speaker Assembly
1
8
733030·
902137-000
Brightness Control Assembly
1
Part Description
Quantity
*Mode1 7280 only
4.3 REMOVAL/REPLACEMENT PROCEDURES
This section explains the procedure to remove the assemblies/PCBs or spared parts
and replace them.
or PCB.
No special tools are needed to remove or replace any assembly
Care must be taken in removal and replacement of the CRT Assembly.
4-1
4.3.1
GENERAL
General instructions for removal and replacement are:
Before removing any Assembly/PCB, primary power to
the VDT shall be removed to prevent electrical
damage to the equipment.
1.
Open cover of the VDT.
2.
Locate Assembly/PCB to be replaced.
3.
Disconnect the Assembly/PCB from the VDT. If any external wires/cables
are present, they must be noted for location and then removed before the
Assembly/PCB is removed.
4.
Install the new Assembly/PCB.
5.
Connect any external wires/cables as noted in Step 3.
6.
Close cover and test unit.
4.3.2
CRT ASSEMBLY
The following procedures must be followed when removing and replacing the CRT
Assembly.
I
WARNING
I
Assure before proceeding that all input power to the
VDT is turned OFF and disconnected. Discharge the yoke
band and center rings of the failed CRT Assembly.
Allow one minute for the lIigh Voltage to bleed off
before removing the CRT. Observe safety rules to
protect against electrical charge.
The CRT can hold an electrical charge which can be
hazardous to the technician. Use care in handling
both the old and new CRT. If broken, they can implode
and are hazardous to the technician.
4-2
1.
Open the cover of the VDT.
2.
Unplug the CRT socket from the end of the tube.
3.
Disconnect the yoke assembly wires from the Monitor PCB.
4.
Disconnect the high voltage lead from the CRT.
5.
Remove all .el ectrical connections from the CRT to the Monitor PCB.
6.
Remove the grounding spring.
7.
Place a cardboard container that is open near by.
8.
Carefully remove the old CRT and place in the cardboard container.
9.
Remove the new CRT from its container (save container) and place it
into the VDT in the correct place.
10.
Connect the new CRT in the reverse order of removal.
11.
When completed, close cover and test the VDT for a proper display.
4-3
CHAPTER 5
REFERENCE DATA
5.1
REFERENCE DATA
Title
Table 5-1.
VDT Logic
Glossary, Signal List
Page Number
3
7
5-1
TABLE 5-1.
Signal
GLOSSARY, SIGNAL LIST
Description
START
Start of initialization routines. The 'INIT MODE FLAG' tells the
firmware that it is executing power on routines rather than
ESCAPE-U tests. See ESCU.
VTACLD
Load VTAC with 50 or 60 Hz data and start VTAC.
PROMTST
Computes LRC of locations OOOO-OFFE Hex and compares to stored
valued at OFFF Hex.
PADTST,
MAPTST,
RAMTST
These three routines write than read a data pattern in each
location of memory as a simple memory diagnostic. The row map
memory is loaded with appropriate initial row addresses for a
12 or 24 line display as indicated by hardware juniper.
CLEAR
Writes an ASCII blank to each location of the screen memory.
If the VDT is in the protect mode, and a location has been
written with the protect bit on, a read of that location sets
a hardware flag which will disable a write to that location.
This allows a 'clear foreground' routine with hardware
assisting by not writing to protected locations as described.
EXIT·
Most routines come here to update the cursor position before
entering the idle loop.
DECODE
Gets a character from buffer. If the Hex value is <20 Hex the
character is a control code and a jump will be made through
Table I of the firmware listing. Hex values greater than or
equal to 20 Hex are display characters and a jump directly to
the Write routine is taken. An exception is the delete
character where a jump to idle is performed.
LF THRU HT2
These routines are all cursor positioning routines.
SCROLL 1
THRU
SCROLL 2
This routine scrolls the display by moving the contents of
each location of the row map memory to the next lower location
of the row map memory. The first location is moved to the last
then the last row is blanked by C1earline.
ESCAPE
ESCAPE gets another character from either the keyboard or the
mainframe buffer depending upon where the ESCAPE code originated,
then jumps through Table 2 of the firmware listing to the
appropria~e ESCAPE routine.
SCROL3
THRU
SCROL5
These routines scroll a portion of the screen for a line insert
and line delete routine by moving appropriate locations of the row
map as described for SCROLL.
5-3
TABLE 5-1.
Signal
GLOSSARY, SIGNAL LIST (continued)
Description
ACKWAIT
AND
PTRIN
These routines are subroutines to input status when expected from
the printer. Since the printer is expected to respond within a
given time after data is transmitted to it and since the printer
baud rate is unknown to the firmware, these two routine's wait for
a character (PTRIN) for a time equal to the time required for the
reception of a single character the slowest baud rate, and waits
up to 30 character times (ACKWAIT) for a response. A seven byte
table is kept in scratch pad memory for the printer status. If
the printer does not respond within the timeout period, the table
will be filled with OO's. If the printer does respond, PTRIN 1
is called, which inputs a b,yte, checks it for transmission errors,
then returns to ACKW3 which saves the byte in the table.
ESCU
These routines share the firmware code used for memory tests
MAPTST - RAMTST. Bit 7 of the E register is used by ESCU and
the memory tests to indicate ESCU or power on initialization.
INTERRUPT
This routine is entered whenever a hardware interrupt request
is given, and when the firmware has interrupts enabled. INTKBDINTKB6 handle a keyboard interrupt and INTART - INTRET are for
for mainframe computer interrupts.
INTKBD
A firmware flag is used to allow a 'soft disable' of the interrupt.
If the flag is false, the keyboard interrupt will simply ignore the
input, unless the character is an ESCAPE character. If the flag is
true, the keyboard interrupt will process the input. The keyboard
status has separate bits for PRINT key and CLEAR key, which cause
an immediate jump to those routines if the firmware detects those
Bits true during an interrupt and the selected function is caused
by any other key. The interrupt follows one of three paths,
depending upon BATCH, HALF-DUPLEX, or FULL DUPLEX mode of the VDT.
Batch mode jumps to decode the character. Full duplex sends the
character to the mainframe computer, then returns to main program
execution.
INART
This routine also has a 'soft disable' flag as described for the
keyboard interrupt. If the interrupt is soft enabled, the routine
simply inputs a character from the mainframe UART and puts it in
the buffer, which is also referred to as a FIFO in the firmware
listing, and then returns to main program execution.
5-4
TABLE 5-1.
Signal
--_.-..-.
ARTIN
GLOSSARY, SIGNAL LIST (continued)
Description
-----_
..
__._---_.__._--------
A subroutine called to wait for a character ready from the mainframe
computer UART.
BUFOUT
A subroutine used to get a character out of the buffer and maintain
buffer pointers. The buffer is a 'wrap around' variety, i.e.,
the pointers are reset to the beginning location if they are
incremented past the end location.
PROM LRC
This is·the last location of firmware ROM and holds the LRC of
all ROM locations. This value is computed and stored when the
firmware ROM is burned and must be updated any time firmware
changes are made.
5-5
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APPENDIX A
VDT CONTROLLER
A-i
TABLE OF CONTENTS
Page
APPENDIX A
VDT CONTROLLER
A1.1
Al.2
A1.3
Introduction . . . . . . . . . .
.
VDT Controller (PIN 901420) . .
VDT Controller (PIN 903242)· . . . . . . .
. . A-I
. A-I
. . . . A-6
.....
LIST OF ILLUSTRATIONS
Page
Figure
A-I
,A-2
A-3
A-4
Functional Block Diagram, Controller
4-, 8-Way Channel VDT Controller PCB
Functional Block Diagram, Controller
4-, 8-Way Channel VnT Controller PCB
(PIN
(PIN
(PIN
(PIN
901420)
901420)
903242)
903242)
..
A-2
A-4
A-7
A-9
LIST OF TABLES
Page
Table
A-I
A-2
A-3
Typical UART Configuration Jumpers . . .
Controller Address Connection . . . • • . .
Channel Capacity (Jumpers) and Etch Cut .
..
..
A-S
A-S
A-S
A-iii
APPENDIX A
VDT CONTROLLER
Al.l
INTRODUCTION
Two types of VDT Controllers may be used to interface the Model 7270 VDT with the
host CPU.
When a Model 7270 VDT is added to a previously installed System 200/410,
the existing Controller is normally PIN 901420 (MM 081020).
~~en
a Model 7270 VDT
is part of a new system installation, the Controller is normally PIN 903242
(MM 821020).
Al.2
Both Controllers function in a similar manner and are described below.
VDT CONTROLLER (P/N 901420)
The VDT Controll,er (located in the host CPU), hereafter referred to as the
Controller, provides an interface between the CPU and as many as eight RS-232C
compatible VDT devices.
Individual lines are provided between the Controller and
the VDTs to transfer the data serially in a synchronous, full duplex mode.
Data
transfer rates ranging from 110 baud to 9600 baud are independently switch selectable
to accommodate the requirements of each VDT.
The Controller is normally used with
an address of lB although it may be field modified to accept addresses of 18, 19,
or lA.
Figure A-I shows the functional logic to accomplish a character transfer.
To
initiate the sequence, the CPU places the Controller address and channel code on
the data bus.
Simultaneously, the CPU places a control code on the control bus,
enabling the Controller to interpret the data bus as an address rather than data.
The Controller is now reauy' to load a data byte into the selected UART channel.
A-I
The CPU now places a character on the data bus and simultaneously places a control
code on the control bus.
This informs the Controller that literal data, to be
transmitted to a VDT, is now present on the data bus.
be a command for the VDT.)
(Note that literal data can
Now that the character has been loaded, the UART
adds appropriate start, stop, and parity bits and transmits the character serially
at the selected baud rate to the VDT.
The Controller now sends an interrupt to
the CPU to complete the character transfer sequence.
J
~
OUTPUT
\
DATA BUS 8 /
BITS WIDE
DATA
ADDRESS
DETECT
.......
-y
~
CONTROL
BUS 3 BITS
WIDE
CLOCK
\
/
~
..
CONTROL
DECODING
..
-.
MASTER
RESET
..•
CONTROL
GATES AND·
FUNCTION
REGISTER
.........
...
....
...-
...
...
..••
•
.....
BAUD RATE
GENERATOR
FUNCTION
DECODING
lot
4
CPU
...
...
..
...
•
~
•
SCAN
CONTROL
AND
INTERRUPT
(SERIAL)
DATA
OUTPUT..
-.
.......
(SERIAL)
RECEIVER!
DATA
TRANSMITIER
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OR EIGHn
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Figure A-1.
A-2
STATUS
DATA
Functional Block Diagram, Controller (PIN 901420)
TERMINALS
(UP TO EIGHT)
Input data operations are initiated by an incoming byte from one of the VDTs.
After the serial byte has been assembled by the UART receiver, the interrupt logic
will send an interrupt to inform the CPU of an impending operation.
When an
interrupt is received by the CPU the current program operations are suspended and
an interrupt acknowledge signal is returned to the Controller.
An interrupt
acknowledge signal will cause the Controller to put its address and channel scan
bits on the input data bus.
The effect of the operation is to inform the CPU
which Controller and channel is interrupting.
The Controller contains a character
to be input as opposed to a completed character transmission to a VDT.
When the
address and channel scan bits have been received by the CPU it will request the
Controller status.
After the status has been received, the CPU will request and then
receive the input character.
If the system is operating in the full duplex mode,
the operating system software will cause the character to be retrieved from memory
and transmitted back to the VDT.
This serves as a validity check on the entire data
path.
There are five different categories of Jumper/Switch selections that are used to
configure the Controller PCB.
The categories are:
1.
Controller Input Address Jumpers (CPU to Controller)
2.
Controller Interrupt Address Jumper (Address sent to CPU)
3.
Controller Channel Capacity Jumper (4- or 8-Way Channel)
4.
UART Format Options Jumpers (Parity, Bits/character, etc.)
s.
Channel Baud Rate Switches (One DIP Switch for each channel)
The standard jumper configuration is shown in Figure A-2.
formed with PC board etch at the time of manufacture.
The jumpers are usually
Configuration changes in the
field will require etch cuts and jumpers as indicated in Tables A-I thru A-3.
A-3
~~~~--------------------~~
BAUD RATE~- ~
8
SWITCHES
I~
CJ CJ
0
CJ 0
D
Jl
UART
CONFIG.
JUMPERS
J2
J4
JS
J6
J1
iii iii i I
08
6N
C13
C14
o
OC32
C31
CONTROLLER
ADDRESS
CHANNEL
CAPACITY
lU9
zu 6
B2~tj
oC56
O~55
C58
00
C57
PI
Figure A-2.
A-4
4-, 8-Way Channel VOT Controller PCB (PIN 901420)
TABLE A-I.
TYPICAL UART CONFIGURATION JUMPERS*
Option
Al TO
A2 TO
A3 TO
A4 TO
AS TO
No parity check
OPEN
X
X
X
X
Even parity check
GND
X
X
X
OPEN
Odd parity check
GND
X
X
X
GND
6 bits/character
X
X
GND
OPEN
X
7 bits/character
X
X
OPEN
GND
X
8 bits/character
X
X
OPEN
OPEN
X
One stop bit
X
GND
X
X
X
Two stop bits
X
OPEN
X
X
X
5 bits/character with
one stop bit
X
GND
GND
GND
X
5 bits/character with
1.5 stop bits
X
OPEN
GND
GND
X
*Typical eight places; A, B, C, D, H, K, H, and N
TABLE A-2.
CONTROLLER ADDRESS CONNECTION
Input
3T TO
3S TO
Address
3E TO
Interrupt
3R TO
3F TO
18
1$
IT
2E
2F
lR
19
2S
IT
IE
2F
lR
lA
15
2T
2E
IF
lR
lB
25
2T
IE
IF
lR
TABLE A-3.
CHANNEL CAPACITY (JUMPERS) AND ETCH CUT
Channel
Jumper
Configuration
Etch
Cut
8-Way Channel
lU To 2U
None
4-Way Channel
lU To 3U
Ql*
-
*At location Ql on non-component side of PCB, cut etch at
emitter and base.
A-S
Al.3
VDT CONTROLLER (P/N903242)
The VDT Controller, hereafter referred 'to as the Controller, is an 8-Way channel
Controller.
It is a single PCB providing- capabilities to interface up to eight
interrupt driven full duplex asychronous data lines.
Each of the 8-Way channels
has both selectable character formats and switch selectable baud rates.
The transfer
of data, control, and status between the Controller and its host CPU is accomplished
by byte-programmed input/output operations.
RS-232C standard.
Signal levels are TTL compatible and
The signal level for a binary state I must be more negative than
-3 volts with respect to ground.
A binary
~
state must be more positive than +3
volts with respect to ground.
A functional block diagram of the Controller is shown 1nFigure A-3.
It is located
in the host CPU and provides an interface between the CPU and up to 32 VDTs.
Data
transfer rates range from 110 baud to 9600 baud and are independently selectable for
each of the 8-Way channels.
The Controller consists of an Address Decoder which decodes the five least significant
bits eLSB) of the host CPU output data bus.
address (hexadecimal 18 thru IF).
use of four Controllers.
This provides the Controller's device
A maximum configuration of 32 VDTs requires the
The function of the Control and Function logic block as
shown in Figure A-3 is to decode the control bus.
COXX, DIXX, DOXX, and lACK.
These signals are:
COXX - Control Signal
DOXX - Data Output Signal
DIXX - Data Input Strobe
lACK - Interrupt Acknowledge
A-'6
This provides the command signals
'T.l
~.
0Cl
~
J 0000OD07
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I
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-
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I
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'"
n
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J
I
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rt
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l
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N
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N
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CH 0-7
,
J
CH 0-7
The control signal strobes the three most significant bits (MSB) of the data bus
into the function bit flip-flops.
The Controller then performs a specific fWlction
determined by these three bits during DIXX or DOXX.
Data is transferred by transfer
logic to/from the host CPU and transmitter/receiver channels.
The device status
bit is generated by status.1ogic after an input interrupt and channel number has
been 'detected.
These instructions are needed to transfer data to the A or B
register and/or memory.
Interrupts are generated by data input ready signals from the asynchronous
transmitter/receiver logic,
These interrupts control both the handling of the
interrupt and the response addresses.
All input and output lines are then scanned
for multiplexing of data status and interrupts.
the clock baud .rate logic.
All baud rates are generated by
The transmitt.er/receiver logic for asynchronous data
communication between the Controller and the VDT is confained in T/RO thru T/R7.
The Controller may be configured for operation as a 4-Way Channel VDT by making
the following adjustments:
1.
Omit the following Ies:
SF, SH, SK, 4M, 6H, 6K, 6M, 6N.
2.
Omit switches:
SW4, SWS, SW6, SW7.
3.
Omit connectors:
J4, JS, J6, J7.
4.
Cut etch between lU and 2U and connect lU to 3U.
Figure A-4 provides the component locations for the Controller PCB (P/N 903242).
A-8
CHANNEL
CAPACITY
CONTROLLER
ADDRESS
+
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0
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A-9
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