Radio Shack Hardware Manual Color Computer 3 Service 19xx Tandy Text
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SECTION V. THEORY OF OPERATION the processor possesses. Another is the size of the internal registers and the size of the mathematical and logical operations supported by the processor. Although the 68B09E has an 8-bit data bus, internally it contains four 16-bit registers and two additional 8-bit registers which may be linked together to form another 16-bit register. The 68B09E also supports some 16-bit mathematical and logical operations. 5.1 MC68B09E/MBL68B09E/HD68B09E (IC1) The heart of any computer system is the Central Processing Unit, CPU. In the Color Computer 3, as well as in most modern microprocessors, the CPU is a single Large Scale Integration Circuit (LSI). The CPU gathers instructions and data from memory, interprets and executes the instructions, and stores the results of the data operations into memory. Additionally, the CPU stores data to and retrieves data from various input/output (I/O) devices. Therefore, although it is technically an 8-bit processor, it has some of the power of the 16-bit machines. Figure 5-1 is a "programming model" of the 68B09E CPU. Additional information may be obtained from the 68B09E data sheet. The 68B09E microprocessor is perhaps the most powerful 8-bit microprocessor available today. There are several ways to determine the "size" of a microprocessor (whether it is 8-bit, 16-bit, 32-bit, or whatever). One way involves the number of data interconnecting lines X- Index Register Y- Index Register US - Pointer Registers User Stack Pointer Hardware Stack Pointer PC I Program Counter Accumulators D Direct Page Register CJ CC - Condition Code Register Carry Overflow Zero Negative IRQ Mask Half Carry F IRQ Mask Entire Flag Figure 5-1 • 68B09E Programming Model -30- Figure 5-2 shows the pinouts of IC1, the 68B09E CPU. Note that there are sixteen address lines (AO through A15). These address lines are output from the CPU and are used to select one of 65,536 different memory locations. The memory and I/O devices must be wired to accept the correct combination of highs and lows on the address lines. The order of the devices and how they respond to the different lines are called the memory The remaining lines on the CPU are used for control functions, both input control and output control. Of course, the Vcc pin is the power input line to the CPU and the GND line is the return reference for both power and signal. The E and Q lines are the clock inputs to the CPU. These clock signals must be present for the CPU to function. In the Color Computer 3, these signals are provided by the advanced color video chip (IC6) and are 50% duty cycle clocks at a frequency of 0.89 MHz or 1.78 MHz. As shown in Figure 5-3, Q is a quadrature clock signal which leads E by 90 degrees. map. The CPU has eight data lines (DO -D7 ). These data lines are bidirectional and are used by the processor to both route data to and retrieve data from memory or I/O devices through Bus Transceiver 74LS 245 (IC3). < x CO o > < co z> CO o Q Lf> 1— Q CM a CO a "3- a LO a CO a r^ Q ^ < ^t T— < CO ^ < [gi^if^if^f^^ifii^i^i^if^faifgir^^ifaif^fai^i^i ) HHHHHHldHHl2j^J^J^JI^Jl^l2j^Jl2jL2JlSJ r)Oco<00'-cMCo^rLf)CDr^ooo)0 co CO > cctxmmO<<<<<<<<<< Figure 5-2. MC68B09E Pin Assignments -31- CM < < < The CPU contains a number of inputs which serve to initiate specific sequences of events. The ones used by the Color Computer 3 are: subroutine address from the Vector Table (see the memory map in Section I, System Description). For the interrupt routines, registers are preserved on the Stack to be restored upon receipt of the RTI (Return-from-Interrupt) instruction. RESET* - Used on power up and to reinitialize the CPU. HALT* - Stops the program flow after the completion of current instruction. Execution will continue after HALT is removed. - Non-Maskable Interrupt NMI* always causes the CPU to "interrupt" its normal program flow and execute a special "interrupt handler" routine. - Interrupt Request. Similar IRQ* to NMI but may be masked (defeated) by setting the I bit in the CC register. FIRQ* - Fast Interrupt Request. Similar to IRQ, but masked by the F bit. It is faster because it doesn't preserve all registers (as do the other interrupts) Other control lines used in the Color Computer 3 are TSC (Three-State Control) and the R/W* (Read/Write*) line. The TSC line is an input intended for use in multiprocessor or DMA environment and will cause the address and data lines to go into a three-state condition if high. Since the Color Computer 3 does not require multiprocessing, this line is permanently grounded. The R/W* line is an output used by the CPU to inform the external memory and devices whether the data transfer is from the CPU (a write) or to the CPU (a read). Standard 68B09E Read/Write timing is shown in Figure 5-3. However, in the Color Computer 3, this timing is modified by the ACVC chip so that the addresses are available to the memory only during the active E time. This presents no problem as long as the memory is sufficiently fast. Upon receipt of the RESET signal, or any of the interrupts (if enabled), the CPU will get the appropriate -32- 1117ns (559ns) 629ns (315ns) 2.4 V~\ 2.4V J 0-5V 2.4V 488ns K Vo.sv (244ns) 279ns (140ns) y„v \ Q- 2.4V R/W* ^- 2.4V ADDR 0.5V DATA- READ DATA TIMING NOT VALID -1117ns(559 ns) 7 2.4V Vo.sv 0.5V L 2.4V 2.4V VO.SV ^/ 7^ 2.4V 2.4V 4\_05V_ R/W* ^^ 0.5V 2.4V ADDR BA,BS s 0-5V 2.4V 2.4V DATA VALID DATA 0.5V 0.5V WRITE DATA TIMING NOT VALID Figure 5-3. MC68B09E Read/Write Timing at 0-89 MHz * Values within parentheses are for 1.78 MHz -33- 5.2 Memory (RAM) strobe). After the DRAM has latched the least significant eight addresses (the row addresses), the column addresses are presented, along with CAS*. If the present cycle is a read cycle, WE* (Write Enable) is held high, and the data is retrieved from the appropriate cell and presented at the output pin some time later. The actual time depends on the access time of the DRAM. During a write cycle, the data and WE* signal are active prior to CAS* and are latched in at CAS* time. Figure 5-5 shows the read and write timing cycles for DRAM. The Color Computer 3 uses Dynamic Random Access Memories (DRAMs - IC16 through IC19). Each memory chip is capable of storing 262,144 bits (64K x 4), any one of which may be accessed at any given time. Since the CPU needs to access eight data bits at a time, two DRAMs are used. Therefore, the memory array is said to be 64K x 8. The dual Write Enable signals (WEO*, WEI*) to the DRAM control 2 banks of 64K x 8 memory (total of 128K x 8). The DRAMs in the Color Computer 3 operate off of a single +5 volt supply. Dynamic memory is called dynamic because it requires refreshing at periodic intervals in order to remember. Refresh is accomplished by providing the DRAMs with RAS* signal and an address count. The address count must toggle through all 256 row address possibilities in 4 milliseconds or less. (If you don t remind the DRAM of what it knew at least once every 4 milliseconds, it will forget. In order to address a 64K location in each chip, 16 address lines are required. However, since the DRAM package has only 18 pins, the addresses are multiplexed into two groups of 8 and 8, called row address and column address. (See Figure 5-4.) The row address is presented first, and the DRAM is informed that this is the row address by the presence of RAS* (row address strobe) and the absence of CAS* (column address ! CLOCK GEN R"A3 NO. WRITE OrJ CAS REF CONTROL CLOCK WE CLOCK I GEN. CLOCK GEN NO. X INTERNAL ADDRESS COUNTER "TtM COLUMN DECODER SENSE AMPS I/O GATING VII DATA IN BUFF. -DQI~DQ4 Ao — — A3 — Al A2 — A5— A6 — A? — A4 • CO CO UJ or O Q < q: uj DATA OUT o o o CO or Ul u. U. Z> GO BUFF. UJ 262,144 BIT STORAGE CELL o Ao-A7 or 1—-0E Figure 5-4. DRAM Block Diagram -34- — — . Vcc - Vss -L*. Read Cycle tRC (280ns)" tRAS "(175ns) -tAR- V HVI L- RAS r~^\ \ ' tRP -tCSH- tCRP -tRSH- ^ -tRCD- VIHVIL- CAS f / tRAH (35 ns) tASR "(105 ns) tCAS (140ns)" +PDM _tCPIM ' tCAH tASC ^— (140ns) (35 nsT A0-A7 VIHVI L- ROW COLUMN ADDRESS ADDRESS 'A „ tRCS tRRH tRCH A i VIL- -tOES- VIH- 7/ VIL- OE 2: 5BEE tOFF tOEZ -tCAC- -tRAC- VOHVOL- 1/01-1/04 HLZ < Write Cycle tRC tRAS RAS V 'H- (280 ns) (175 ns) VIL- CAS V H" VIL- A0-A7 VIHVIL- ' Fig 5-5. DRAM Timing -35- VALID DATA \ - 7 access to the VDG LOGIC during the low time of E (Video portion). During each access, whether by the CPU or the Video, the ACVC must provide appropriately synchronized RAS* and CAS* signals, as well as the corresponding address signals, to the DRAMs. Note that the DRAM access time must be twice as fast as that required by the CPU alone in order to be able to respond to VDG accesses. 5.3 TCC1014 (VC2645QC) 1) System Timing, Address Multiplex, Device Select, MMU By now, it should be apparent that controlling DRAMs is a fairly complex task. In the Color Computer 3, it is done by the TCC1014 (VC2645QC: ACVC). In addition to address multiplexing, RAS* and CAS* generation, WEO*, WEI* timing control, and refresh generation, the ACVC performs other tasks. It contains the Master Oscillator, the frequency of which is controlled by a 28.63636 MHz (PAL: 28.4750 MHz) crystal (XI). The Master Oscillator is divided by eight to give a 3.579545 MHz color reference signal to the Video Display Generator LOGIC and Composite Video Signal (NTSC version only). This reference signal is then divided by 4 (or 2) again to provide the 0.89 MHz (1.78 MHz) E and Q clock signals for the processor. In the PAL version, the Master Oscillator frequency is slightly shifted down than in the NTSC version for fitting with the PAL encoder circuit. In order for the ACVC chip to provide the appropriate addresses to the DRAMs, all 16 CPU address lines are input to the ACVC. It then multiplexes these into low order and high order addresses (Z0 through Z8, refer to MMU) which are sent to the DRAMs along with RAS* and CAS*. Another function of this section is to provide address decoding and device selection for the computer. Figure 5-6 shows how the SO, SI, and S2 lines are connected to IC9, a 74LS138, in order to provide appropriate signals to enable ROM selection, PIA selection, and various cartridge selection signals. Due to the nature of the ROMs and in order to prevent data bus contention, the ROMs are enabled only during the E portion of a read cycle. The ACVC (IC6) also controls access to the memory, granting access to the processor during the high time of E (CPU portion) and +5V R11 SLENB*> SO IC 31 30 S1 29 S2 6 G1 m G2A G2B A B C TCC1014 YO Yl Y2 Y3 Y4 Y5 Y6 Y7 ROM* CTS* PIA* N.C N.C N.C SCS*(CARTRIDGEI/0) N.C (VC2645QC) IC9 74LS138 Fig 5-6. Color Computer 3 Address Decoding -36- inside of the TCC1014, pins FFAO through FFAF, selects A13 - A18 (actually A16 - A18). Figure 5-7 shows the Block Diagram of the MMU. As it is clear from the Memory Map, the memory area of the CoCo3 is from &00000 through &7FFFF (512K bytes). The Memory Management Unit (MMU) D0-D5 AI3-AI5 (CPU Address) and TR (FF9I ) AI3-AI8 AO-A3 {CPU Address) MMUW Figure 5-7. MMU Block Diagram 2) Video system composite video signal, is then provided to the RF Modulator via buffer Q3, and to the video output terminal via Q3 and Q2. Generation Circuit For NTSC Version In Color Computer 2, the composite video signal is created in Modulator IC (MC1372), while the intensity control signal (Y) and the color information signals J0A and 0B are generated in VDG (MC6847). In Color Computer 3, all of these signals are generated in ACVC (IC6), and output from pin 65 as the composite video signal. This signal is provided to the video output terminal through buffer (Q2, Q3) and to the modulator. ACVC also contains analog RGB output and a total of 64 color selections. For the video generation circuit where the control register is designated via software, please refer to the Memory Map in section 1.3. 3) Interrupt IN/OUT In CoCo2, the three interrupt sources CART*, HSYNC* and VSYNC requested an interrupt to the CPU from PIA as IRQ* and FIRQ*. In r Co3, in addition to the above mentioned interrupt sources, an interrupt to the CPU can be requested as IRQ* or FIRQ* from serial I/O, keyboard, and 12-Bit interval timer. It has higher selectivity. Refer to FF90 and FF92 through FF95 in the Memory Map. For PAL Version The ACVC is designed to output both composite video signal and analog RGB signal. Since composite video signal is specially designed for NTSC system, the PAL Encoder circuit is used to encode the RGB signal to the PAL signal. For this purpose, the VSYNC and HSYNC output from pins 55 and 56 of IC6 are provided to the PAL Encoder as a composite sync signal through the inverter IC15 and mixing circuit (Qll, D15 - D17). The output of PAL Encoder, that is the PAL -37- 5.4 PAL ENCODER (PAL Version Only) IC101 is a programmable divider and operates in a divisor o f 71. The output from the divider is connected to the programmable div ider part of IC102 where a divisor o f 4 is used to complete the count-down to 15.611 kHz. IC102 also contain s a phase comparator part, and it compares this divided 15.611 kHz with the HSYNC signal which is counted down to 15.611 kHz from the mas ter oscillator in IC6. The phase compa rator then generates a control vol tage in proportion to the phase and frequency difference between thes e 2 signals of 15.611 kHz and output i t at pin 13. PAL version uses ICI01, IC102 and IC103 to encode the RGB signals to the PAL signal. The majority of the work is performed by IC103, the RGB to PAL ENCODER chip. This chip is designed to generate a composite video signal from baseband red, blue, green and composite sync input from sync mixer Qll and D15 - D17. The chip contains color subcarrier oscillator, voltage controlled 90 degrees phase shifter, two double-sideband suppressed carrier chroma modulators, RGB input matrix, and blanking level c 1 amp s In the PAL version, This control voltage is passed through a simple R-C low pass filter and used to control a varactor diode D101. The capacitance of the varactor is changed to tune the 4.433618 MHz oscillator by varying the control voltage. This tuning allows the two oscillators to be synchronized at any time except during reset or power-on. an extra voltage-controlled crystal oscillator is needed for the PAL color burst frequency of 4.433618 MHz. For this purpose, the internal oscillator circuit of the IC103 is used. If the oscillator does not synchronize with the master oscillator, an apparent motion will exist whenever a color transition occurs. This synchronization problem is solved by slightly shifting of the master oscillator frequency and the addition of a phase-locked-loop circuit. The master crystal oscillator frequency of the PAL version is 28.475 MHz. This allows the two oscillator to be divided down to the horizontal frequency of 15.611 kHz and phase-locked at this frequency. -38» 5.5 PIAs (IC4 and IC5) registers. These direction control registers are set up by the reset routine and normally will not be changed. The Color Computer 3 uses two Peripheral Interface Adapters (PIAs). These devices provide a universal interface to the 68B09E CPU. They support all of the I/O functions in the Color Computer 3. The four control/interrupt lines are controlled by the two control registers. The control registers also handle device selection within the PIA. Two of the four lines function only as interrupt inputs, and the other two lines may be used as interrupt inputs or data outputs. The functional configuration of the PIA is programmed by the CPU during the reset routine. Each of the peripheral data lines may be programmed to act as an input or output, and each of four control/interrupt lines may be programmed for one of several control modes. Figure 5-8 shows a block diagram of a PIA. PIA IC5 is used mainly for the keyboard. Data register B (pins 10-17) is programmed as an output and is used to strobe the keyboard columns. The first seven lines of data register A (pins 2-8) are programmed as inputs and are used to read the keyboard rows. Pins 2 through 5 are also used as fire button inputs for the joysticks. A PIA consists of two 8-bit data registers and 4 control/interrupt lines. The two 8-bit data registers are controlled by two data direction IRQA [38 DO 33 D1 32 \ — — CONTROL I h (CRA) D4 29 DATA BUS BUFFERS (DBB) yl_ CA2 DATA DIRECTION REGISTER A (DDRA) C N OUTPUT BUS D6 27 _K D7 26 r~" y <> OUTPUT _2^ REGISTER A _3 ) PERIPHERAL INTERFACE A > \/ CO vss BUS INPUT REGISTER OUTPUT _L^ PBO PB1 ]2 PB2 PERIPHERAL INTERFACE 22 24 CS2 21 RSO 36 RS1 35 RAW 21 ENABLE 25 RESET 34 7 PA5 PA6 i°_ (ORB) CS1 5 PA3 PA4 9 PA7 REGISTER B CSO PA1 _8 3 Q. z (BIR) HAD 4 PA2 (ORA) CO vcc 20 ^~n 39| I r^ i D5 28 ^ 4^CA1 REGISTER A D2 D3 30 INTERRUPT STATUS CONTROL A B 13 PB3 14 PB4 15 PB5 16 CHIP 17 SELECT PB6 PB7 <\ and ^ R/W CONTROL i U v DATA DIRECTION REGISTER B CONTROL REGISTER B (DDRB) (CRB) i Trqb [37 Figure 5-8. PIA Block Diagram -39- INTERRUPT STATUS J8)CB1 CONTROL I9JCB2 B 5.6 Keyboard Interface (IC5) To read the keyboard, only one column is enabled by writing a zero in the bit that corresponds to that column and by writing ones in all the other bits. If a key is being pressed in that column, one of the input lines will be a zero, and the key location will correspond to the bit that is low. By scanning each column in the keyboard, all of the keys may be checked. Figure 5-9 shows the PIA IC5 is the only active component in the keyboard interface circuit. The B side of this PIA is configured as outputs and connects to the column lines of the keyboard matrix. The A side of IC5 is configured as inputs and connects to the row lines of the keyboard matrix. PIA IC5 is a select device. The use of PIA compensates for a possible increase in key contact resistance due to prolonged use and therefore should result in a highly reliable keyboard interface. keyboard matrix. Figure 5-9. Color Computer 3 Keyboard Array -40- The other pins of PIA IC5 serve various functions. The most significant bit of data register A (pin 9) is programmed as an input for the joystick interface. CA2 and CB2 (pins 19 and 39) are used as outputs. These two lines select one of four joystick or sound inputs. The last two pins of PIA IC5, CA1 (pin 40) and CB1 (pin 18), are used as interrupt inputs. They are both tied to SYNC clock outputs from the ACVC (IC6). If enabled, CA1 provides an interrupt after each SYNC line. CB1, if enabled, provides an interrupt after each screen of data (NTSC: 60Hz/PAL: The control and interrupt pins of PIA IC4 also serve various functions. CA1 (pin 40) is the input for the signal CD (a status interrupt input for the RS-232C interface). CA2 is an output used to control the cassette motor. CB1 is the cartridge interrupt input. Whenever a cartridge is inserted into the computer, this input will interrupt BASIC and jump to the program in the cartridge. Finally, CB2 is used as an output to enable sound from the DAC chip (IC7). 50Hz). ROM stands for Read Only Memory, which is a type of memory that retains its data when power is removed from it. When power is applied to the CPU, it immediately attempts to fetch a vector and begin executing instructions. If there were no ROM, the CPU would read random floating states on the data bus, attempt to execute this, and promptly go haywire. PIA IC4 is used for several different functions. Pins 4-9 of data register A are used for the 6-bit digital to analog converter. Pin 3 of register A is the RS232-C output signal, which is used to drive the printer and other RS-232C-type devices. Pin 2 of register A is the input for data from the cassette. Pin 13 of IC4 is the sense input for the RGB monitor (CM-8). Pin 12 of register B is an input for the memory size. Pin 11 of register B is the single-bit sound output. Pin 10 is the RS-232C signal input pin. 5.7 ROM (IC2) The Color Computer 3 contains 256K (32K BYTE) ROM which contains Extended Color BASIC (Vers. 2.0). This ROM is programmed to provide the user with certain BASIC commands and functions. -41- The DAC performs most of the functions of this chip. Six bits of control are used by the DAC to specify a discrete internal analog level. This level is one of the sound inputs to the sound multiplexer. It is also used as a reference for a comparator, the other input of which is one of the four joystick inputs. Finally, the DAC signal is attenuated and used as the cassette recording signal for data storage. 5.8 DAC Circuitry (IC7) Two special analog integrated circuits are used in the Color Computer 3 to implement a multitude of analog functions, including power supply regulation, cassette operation, the RS-232C serial interface, the joystick interface, and sound production/selection. The DAC chip (IC7) is one of the custom linear integrated circuits used in the Color Computer 3. As its name implies, it contains a Digital to Analog Converter. This chip also contains a sound multiplexer and the circuitry necessary to interface the joystick controllers to the microprocessor. Figure 5-10 shows a block diagram of the DAC chip. ft> There are two select inputs to the DAC chip: Sel A and Sel B. These determine which of the joystick inputs is to be compared against the DAC, as well as which sound source is coupled to the sound output pin according to the table on the next page. WEIGHTED CURRENT SOURCES mnr ~3]d(T 7] di CURRENT SWITCH AND l/V CONVERTER D2 DATA U D3 U D4 INPUT ~5] ID D5 ^ Vcc BUFFER D> t> *rn ANALOG.rin III | SELECT '1151 SWITCH a n n W U SND ENABLE L19| l!S SND SND H I Figure 5-10. DAC Block Diagram (IC7) -42- CASSOUT 1f]COMP. OUT COMPARATOR ANALOG SELECT LOGIC ]j\ T| SOUND-OUT Sel B Sel A 1 1 1 1 Joystick Input Sound Source Joy Joy Joy Joy DAC Cassette Cartridge (no sound) 1 2 3 The Digital to Analog Converter employs a 64-collector transistor as a current source which gives good linearity over the entire voltage range. In order to determine the position of the joystick, the microprocessor uses a technique called "Successive Approximation". The microprocessor first selects the desired joystick input by means of the select pins (which are connected to PIA IC5). The sound multiplexing section is very simple. According to the above table, different sound sources are selected by the Sel A and Sel B inputs, and the selected input is routed to the sound output. If the DAC is used as a sound source, the microprocessor simply feeds a succession of values to the six bits of the DAC in order to produce the desired waveshape. The output of the DAC is then buffered and attenuated to provide approximately 3.9 volts p-p, which is the level required by the modulator to produce maximum volume. If the cassette is the selected input, then sound from the cassette recorder is routed to the sound output. This level follows the input level up to 3.9 volts p-p, at which point it clips the input waveform. Therefore, the volume control on the cassette should not be set higher than the level which provides 3.9 volts p-p to the DAC chip. Similarly, the cartridge may supply the sound source (from AC coupled) since the SND IN (2) input to the DAC chip biases the input at the midpoint of the allowable voltage swing, which is 3.9 volts p-p. Any greater signal amplitude will result in clipping (distortion) of the sound waveform. In addition to the Select inputs, the sound must be enabled by bringing SNDEN to a high level. This input is controlled by PIA IC4. If this pin is at a low level, all sound (except single-bit sound) is disabled. The final function of the DAC chip is to provide the output signal for recording of cassette data. This is, quite simply, a buffered output of the DAC which is attenuated to produce approximately 1 volt p-p into a 2-kohm load. Therefore, it is up to the microprocessor to produce the necessary FSK signals through the DAC and the proper software. -43- 5.9 SALT Circuitry negative voltage is then applied to pin 15 of the SALT chip, where it is internally regulated to -5 VDC and used for the RS-232C output drivers. The negative voltage is not used anywhere else in the computer. The SALT chip IC8 (Supply and Level Translator) is responsible for supply regulation, RS-232C interface level translation, cassette read operations, and driving the cassette relay, as is shown in the block diagram in Figure 5-11. Dl and D2 form a full-wave, center-tapped rectifier with a positive output which is filtered by electrolytic capacitor C29. This positive voltage is applied to the collector of pass transistor Ql and is used to power the SALT chip at pin 16. The SALT chip internally regulates the positive voltage to +5 VDC and provides the base drive current for Ql. The current for the computer is drawn from the emitter of Ql through resistor R19. The voltage at this point is monitored by pin 3 of the SALT chip and the base drive adjusted to keep the voltage at a steady +5 VDC +5%. Figure 5-12 shows the complete power supply circuit. AC voltage is brought into the primary of transformer Tl. The secondary of the power transformer provides 16.2 VAC (18.52 VAC for PAL version), center-tapped, at AC 2.2 amps (AC 1.0 amps for PAL version) to the Color Computer 3 circuit board. If switch SW1 is closed, this AC voltage is applied to the cathodes of D3 and D4, and to the anodes of Dl and D2. D3 and D4 form a full-wave, center- tapped rectifier with a negative output. This is filtered by electrolytic capacitor C31. This UNREGULATED +V INPUT 01 H +5 VOLT REGULATOR T\ PASS TRANSISTOR BASE DRIVE 2] PASS TRANSISTOR CURRENT SENSE DRIVER ~3\ CURRENT LIMIT UNREGULATED -5 VOLT I REG ' TTL INPUT FOR RS-232C [6 OUTPUT REGULATED -5 VOLTS (INTERNAL TO SALT ONLY) *T|] RS232C OUTPUT 3 F> RS-232C INPUTS TTL OUTPUTS m D TTL OUTPUT CASSETTE DATA (ZERO CROSSING INPUT) TTL INPUT ^ Pjj [JO- 3 ^ 9] RELAY DRIVE OUTPUT Figure 5-11. SALT Block Diagram (IC8) -44- The SALT chip senses, at pin 2, the amount of current drawn from the supply through R19- If excessive current is drawn, as in the case of a short or component failure, the SALT will "fold back" the voltage output of the supply by reducing the base drive current, thus protecting the supply. Inductors FBI and FB2, as well as capacitors C32 through C36, serve to decouple and prevent any digital "noise" which might be present on the DC supply from entering the AC line. There are two types of level translators contained in the SALT chip for use with the RS-232C interface. The output level converter takes as its input a standard TTL signal from PIA IC4, inverts it, and uses it to drive the output to approximately +5 VDC for a space and -5 VDC for a mark. This output is coupled through a 270-ohm resistor, R15 to the output connector. R15 serves to limit the amount of current drawn from this output and prevents damage to the SALT chip if the output (at the connector) is inadvertently shorted to an external voltage (such as _+l 2 VDC, which may be present on some RS-232C connectors). The input level converters have the task of converting incoming RS-232C voltage levels to standard TTL signals. These voltages are defined as follows: a "mark" is a negative voltage between -3 and -25 VDC; a "space" is a positive voltage between +3 and +25 VDC. To simplify the task for the SALT chip, the circuit shown in Figure 5-13 is employed. The incoming signals are compared to a reference of 2.0 VDC. If less than that, they are considered to be a mark. If greater than that, they are considered to be a space. The space or mark is then output from the SALT chip at an LS TTL-compatible level and is coupled into PIA ICA. PAL VERSION TO PAL ENCODER ' i I I I ^ c Si - "W+~~± T Wi W . I —T 120V 60Hz Figure 5-12. Color Computer -45- 3 IC40 k IC36 "JF 7812 y"78L08 j ">£< Power Supply * TO MDV-8 The cassette-loading circuitry, internal to the SALT chip, is composed of a zero-crossing detector. Figure 5-13 shows the input from the cassette being loaded by a 220-ohm resistor, R14, then coupled into the SALT chip through a 510-ohm resistor, R18. R14 serves to load the capacitively-coupled output characteristic of most portable cassette recorders, and R18 limits the current of the incoming signal to prevent damage to the SALT chip if an excessively large peak-to-peak voltage is fed into the cassette input Although Tandy s computer cassette recorders do not produce more than 6 volts p-p, the circuitry is protected from voltages as high as 18 volts p-p. The zero-crossing detector internal to the SALT changes state each time the incoming signal passes through zero volt. There is a small amount of hysteresis built in which provides noise immunity and prevents false triggering of the zero-crossing detector. f . The output of the zero-crossing detector is an LS TTL-compatible level and is coupled into PIA IC4. The final function of the SALT chip is to drive the cassette relay. A TTL signal from PIA IC4 enters pin 10 of the SALT chip where it is connected to the base of an internal Darlington transistor, the emitter of which is grounded. The collector exits the SALT chip at pin 9 and is connected to one end of the cassette relay. The other end of the relay connects to +5 VDC. When the incoming signal goes high, the transistor becomes saturated and connects its end of the cassette relay to ground, causing the relay to energize. When the incoming signal is low, the transistor is cut off. There is no ground return for the +5 volts at the other end of the relay, so it is de-energized. Diode D5 protects the transistor in the SALT from the surge current caused by the coil of the relay (when the relay is de-energized). CASSETTE DATA (ZERO CROSSING) TO PIA IC4-2 INPUT "J® ^W TO PIA IC4-10«* TO PIA FROM R14 RS232C CD INPUT IC4-4 PIA RS-232C DATA INPUT RS-232C »> IC4-3 DATA OUT R15 Figure 5-13. I/O Circuitry -46- 5.10 Cassette Tape Format Information The standard Color Computer 3 tape is composed of the following items: 1. A leader consisting of 128 bytes of 55H 2. A Namefile block 3. A blank section of tape equal to approximately 0.5 seconds in length to allow BASIC time to evaluate the Namefile 4. A second leader of 128 bytes of 55H 5. One or more Data blocks 6. An End of File block The block format for Data blocks, Namefile blocks or an End of File block is as follows 1. One leader byte - 55H 2. One sync byte - 3CH 3. One block type byte: 01H = Data block FFH = End of File block 00H - Namefile block 4. One block length byte - 00H to FFH. to 255 bytes 5. Data 6. One checksum byte - the sum of all the data bytes plus block type and block length bytes 7. One trailer byte - 55H The End of File block is a standard block with a length of 0. The Namefile block is standard block with a length of 15 bytes (OFH). The 15 bytes of data provide information to BASIC and are employed as described below: 1. Eight bytes for the program name 2. One file type byte: 00H = BASIC Program 01H = Data File 02H = Machine Code Program 3. One ASCII flag byte - 00H - Binary, FFH = ASCII 4. One Gap flag byte - 01H - continuous, FFH = gaps 5. Two bytes for the start address of a machine language program 6. Two bytes for the load address of a machine language program 5.11 RS-232C Connector (JK3) The RS-232C interface utilizes a 4-pin DIN connector. This interface allows the computer to have serial communications with printers, modems, other computers or any device capable of interfacing with RS-232C signals. The four signals • used by the interface are: - a status line CD RS-232C IN - serial data input - zero voltage reference GROUND RS-232C OUT - serial data out -47- The pinout for the DIN connector is shown in Figure 5-14. RS232C OUT In order to operate, the software must make several assumptions about the printer. These assumptions are: 1. The printer operates at 600 baud. 2. The printer width is 132 columns. 3. The printer generates a BUSY whea it 4. Figure 5-14. RS-232C Connector Pinout The RS-232C interface hardware in the Color Computer 3 is capable of communication with any device which will operate with the minimum three signal interface. It is also possible that devices which use a larger set of RS-232C signals may be used with the Color Computer 3. This would be accomplished by connecting unused device inputs to the correct high or low level. 5. is not ready. The printer will automatically return the carriage at the end of the line. It will also do a line feed at this time. The data format is one start bit, eight data bits, two stop bits, and no parity. Some printers will require that these assumptions be modified. This may be accomplished by changing RAM variables or by a special driver routine. A list of all the printer variables is given in Table 1. Also, Table 2 lists some alternate values for these variables. In software, the only RS-232C device supported by the BASIC ROM is a serial printer. For use with the printer, the pin assignment of the connector differs slightly from the above description: 1. No Connection 2. Connected to the BUSY output (or status line) of the printer 3. Ground 4. Connected to the Serial Data Input of the printer If your printer does not provide a status line, then pin 2 must be connected to a positive voltage of +3 to +12 volts. This tells the computer that the printer is ready all of the time. -48- 5.12 Cartridge Connector (CN1) NMI* - A 40-pin cartridge connector provides the possibility of expanding the TANDY Color Computer 3 in almost any manner. All of the important CPU bus signals are tied to this connector. A complete list and brief description of these signals is provided in Table This is the non-maskable interrupt input to the CPU. RESET*- This is the master system reset and power-up clear signal. E, Q - These are the two clock signals for the MC68B09E CPU. 3. The most common usage of the cartridge connector is with the ROM cartridge. For cartridge detection, the Q clock is connected to the cartridge interrupt pin, which generates an interrupt anytime the cartridge is plugged in and forces the computer to jump to the program in ROM. CART* - This is an interrupt input into PIA IC4. It is used to detect the presence of a cartridge. CTS* - This is the Cartridge Select Signal. It is valid when the processor reads any location from C000 Hex to DFFF Hex, as long as the ACVC is in Map Type 0. Note that it is not active while writing to these locations. SND - This signal is connected directly to the sound input of the DAC chip and allows cartridge-generated sound signals to be fed through the TV sound system. The signal should be AC coupled and should not exceed 3.9 volts CAUTION DO NOT PLUG A CARTRIDGE IN WITH POWER APPLIED TO THE COLOR COMPUTER AS SERIOUS DAMAGE TO THE UNIT AND/OR THE CARTRIDGE MAY RESULT. In addition to the expected data, address and R/W* lines, several control and special purpose signals are available on the cartridge connector. They are as follows: p-p. SCS* - HALT* - This active-low signal places the processor in a HALT state immediately following the execution of the current instruction. While in the HALTed state, the processor address and data lines are in the high impedance mode, making it possible for external devices to access RAM and ROM. The processor may be HALTed indefinitely without any loss of internal data. This is a second chipselect signal from IC9. It is active for both reads from and writes to addresses, FF40H through FF5FH, regardless of the map type. SLENB*- This signal disables the internal device selection. This allows decoded but unused sections of memory to be used by the cartridge hardware. -49- HEXADECIMAL ADDRESS VARIABLE RATE MSB RATE LSB DELAY MSB DELAY LSB COMMA FIELD WIDTH LAST COMMA FIELD LINE PRINTER WIDTH /BAUD VBAUD /LINE \LINE DECIMAL ADDRESS 0095 0096 0097 0098 0099 149 150 151 152 153 154 155 009A 009B Table BAUD RATE: 1. 202 180 87 1 41 18 LINE DELAY: DECIMAL VALUE MSB LSB 288 SECONDS .576 SECONDS 1.15 SECONDS 64 128 255 . WIDTH: 255 DECIMAL VALUE 16 CHARACTERS /LINE 32 CHARACTERS/LINE 64 CHARACTERS /LINE 255 CHARACTERS /LINE Table 00 57 00 87 01 10 70 16 112 132 84 HEXADECIMAL VALUE MSB LSB 01 CA 00 00 00 00 BE 57 29 12 HEXADECIMAL VALUE MSB LSB 40 80 FF 00 00 FF HEXADECIMAL VALUE 16 32 64 10 20 40 FF 255 2. 1 Line Printer Variables DECIMAL VALUE MSB LSB 120 BAUD 300 BAUD 600 BAUD 1200 BAUD 2400 BAUD INITIAL VALUE HEXADECIMAL DECIMAL Alternate Line Printer Variable Values NOTE: LSB = Least Significant Byte MSB = Most Significant Byte -50- PIN 1 2 SIGNAL NAME DESCRIPTION NC NC 5 HALT* NMI* RESET* Halt Input to the CPU Non-Maskable Interrupt to the CPU* Main Reset and Power-up Clear Signal to the System 6 E 7 Q 8 CART* +5V DO Main CPU Clock (0.89 MHz/1. 78MHz) Quadrative Clock Signal which Leads E Interrupt Input for Cartridge Detection +5 Volts (300 MA) CPU Data Bit 3 4 9 10 CPU CPU CPU CPU CPU Data Data Data Data Data Al CPU CPU CPU CPU CPU Data Bit 6 Data Bit 7 Read-Write Signal Address Bit Address Bit 1 22 23 24 25 A2 A3 A4 A5 A6 CPU CPU CPU CPU CPU Address Address Address Address Address Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 26 27 28 29 30 A7 A8 A9 A10 All CPU CPU CPU CPU CPU Address Address Address Address Address Bit Bit Bit Bit Bit 31 32 33 A12 CTS* GND GND SND CPU Address Bit 12 Cartridge Select Signal Signal Ground Signal Ground Sound Input SCS* A13 A14 A15 SLENB* Spare Select Signal CPU Address Bit 13 CPU Address Bit 14 CPU Address Bit 15 Input to Disable Device Selection 12 13 Dl D2 D3 14 15 D4 D5 16 17 18 19 20 D6 D7 11 21 34 35 36 37 38 39 40 R/W* AO Bit 1 Bit 2 Bit 3 Bit 4 Bit 5 7 8 9 10 11 Table 3. Cartridge Connector Signals -51- 5.13 Power Transformer Assembly. It simply consists of a push-button switch for the fire button and the dual potentiometers connected by a mechanical assembly. The Color Computer 3 power transformer accepts 120 VAC, 60 Hz (240 VAC, 50Hz: PAL) input and transforms it to 16.2 VAC (18.52 VAC: PAL) center-tapped for use by the power supply. The current rating of the secondary of the transformer is AC 2.2 amps (AC1.0 amps: PAL). The transformer should only be replaced with genuine Tandy replacement parts. 5.14 The mechanical assembly allows both potentiometers to be changed at the same time. This gives the effect of a two-dimensional control. The potentiometers are connected so that 5 volts are applied to one side of the variable resistor, and ground is connected to the other. This allows the center wiper to vary from to 5 volts as the handle is moved. The push-button switch merely provides a momentary ground contact for an input signal. Joysticks The optional joystick controllers are two identical assemblies which can be plugged into JK1 and JK2. Figure 5-15 shows a schematic of the Joystick WHITE +5V YELLOW GREEN RED SWITCH 1 BLACK Figure 5-15. Joystick Schematic -52- 5.15 TV Switch Box (NTSC Version Only) Figure 5—16 shows a schematic of the antenna switch box. The antenna switch box consists of a switch and a balun, with connectors provided for attachment to the computer, the TV antenna, and the home TV. The switch box is connected to the customer's TV through the 300ohm twin-lead output. The TV antenna is attached directly to the switch box. The computer output is connected through a 75-ohm coaxial cable to the phono plug input on the switch box. From the computer, the signal is connected to a balun in the switch box which matches the modulator's 75ohm output impedance to a TV s 300ohm antenna input impedance. This signal is then connected to the switch. The switch is specially designed to provide the 60 dB of isolation required between the computer and the TV antenna. r f "~l 60 dB o SWITCH T_rwow\. mmi COMPUTER INPUT .J l_. _ r-~0 _L o— -k> BALUN ANTENNA INPUT 300 ohm Figure 5-16. Antenna Switch Box Schematic -53- -< TWIN LEAD OUTPUT TO THE TV COLOR COMPUTER 3 NTSC/PAL VERSION with 51 2K Expansion RAM Card Catalog Number: CUSTOM MANUFACTURED FOR RADIO SHACK, A 26-3334 DIVISION OF TANDY CORPORATION TABLE OF CONTENTS SECTION 1.1 1.2 1 . 3 1.4 1.5 1.6 I. GENERAL Introduction System Description Memory Map I/O Control Registers Chip Control Registers 68B09E Vector Registers 5 5 8 9 11 22 SECTION II. SPECIFICATIONS 2.1 2.2 Technical Physical 23 25 SECTION III. DISASSEMBLY/ASSEMBLY 3. 3.2 3.3 Disassembly Assembly 512K RAM Upgrade Instructions 26 26 27 SECTION IV. BLOCK DIAGRAM 4.1 4.2 NTSC Version PAL Version 28 29 SECTION V. THEORY OF OPERATION 5 . 5.2 5.3 5.4 5.5 5.6 5.7 5.8 5.9 5.10 5.11 5.12 5.13 5.14 5.15 MC68B09E/MBL68B09E/HD68B09E ( IC 1 Memory (RAM) TCC1014 (VC2645QC) PAL Encoder (PAL Version Only) PIAs (IC4 and IC5) Keyboard Interface (IC5) ROM (IC2) DAC Circuitry (IC7) SALT Circuitry Cassette Tape Format Information RS-232C Connector (JK3) Cartridge Connector (CN1) Power Transformer Joysticks TV Switch Box (NTSC Version Only) 30 34 36 38 39 40 41 42 44 47 47 49 52 52 53 SECTION VI. TROUBLESHOOTING 6.1 6.2 Introduction 54 Video Problems 55 No Display/No Sync/Noisy Video 55 Wrong Color 55 No Color 55 Random Character/Clear Screen/No Sign-on ....55 RGB Problem 55 Composite Video Signal Adjustment (PAL Version Only) 56 -2- Keyboard Problems No Keyboard Entry/Wrong Charac ter 6.4 Processing Problem 6.5 Cassette Problems Motor Control Problem Write Problem Read Problem 6.6 RS-232C Problem 6.7 Sound Problem 6.8 Joystick Problem 6.9 Cartridge Problem 6.10 Power Supply Check NTSC Vers ion PAL Ve r s i on 6.11 Major Waveforms NTSC Version PAL Version 6 • 3 SECTION VII. 56 56 56 56 56 56 56 57 57 57 57 58 58 61 64 64 70 512K EXPANSION RAM CARD PCB VIEWS ELECTRICAL PARTS LIST 78 79 SECTION VIII. NTSC VERSION PCB VIEWS ELECTRICAL PARTS LIST EXPLODED VIEW PARTS LIST EXPLODED VIEW SEMICONDUCTOR INFORMATION SCHEMATIC DIAGRAM SECTION IX. 82 84 90 91 93 103 PAL VERSION PCB VIEWS ELECTRICAL PARTS LIST EXPLODED VIEW PARTS LIST EXPLODED VIEW SEMICONDUCTOR INFORMATION SCHEMATIC DIAGRAM -3- 108 Ill 119 121 122 126 LIST OF FIGURES 1-1. 1-2. 1-3. Color Computer 3 Installation Color Computer 3 Memory Map Memory Map for SAM Control Register 21 3-1 3-2. 3-3. 3-4. Removal of Top Cover Removal of Main PCB Main PCB 512K RAM Card 26 26 27 27 4-1 Block Diagram NTSC Version PAL Version 28 28 29 MC68B09E Programming Model MC68B09E Pin Assignments MC68B09E Read/Write Timing at 0.89 MHz DRAM Block Diagram DRAM Timing Color Computer 3 Address Decoding MMU Block Diagram PIA Block Diagram Color Computer 3 Keyboard Array DAC Block Diagram (IC7) SALT Block Diagram (IC8) Color Computer 3 Power Supply I/O Circuitry RS-232C Connector Pinout Joystick Schematic Antenna Switch Box Schematic 30 31 33 34 35 36 37 39 . 5-1 5-2. 5-3. 5-4. 5-5. 5-6. 5-7 . 5-8. 5-9. 5-10. 5-11. 5-12. 5-13. 5-14. 5-15. 5-16. 7 8 40 42 44 45 46 48 52 ....53 LIST OF TABLES 1 2 3 Line Printer Variables Alternate Line Printer Variable Values Cartridge Connector Signals 50 50 51 SECTION 1 • 1 I. GENERAL 1.2 Introduc t ion System Description The primary functions of the Color Computer 3 are performed by four Large Scale Integration (LSI) chips, plus Random Access Memory (RAM) and Read Only Memory (ROM). These four chips are labeled on the block diagram as CPU, ACVC and two PIAs. With only these four chips, plus Random Access Memory (RAM), Read Only Memory (ROM) and a power supply, the Color Computer 3 will operate and provide video output (RF, Composite, Analog RGB). However, to allow communication with the outside world, I/O interfaces must be added. The Color Computer 3 is a refined version of Tandy's popular Color Computer 2. It is designed to provide the same reliable operation as its predecessor, but it incorporates the latest in electronic technology. Figure 1-1 shows a typical installation of the Color Computer 3. The Color Computer 3 contains an internal BASIC program in ROM which is accessed when the unit is powered up. Other program modules/cartridges may be inserted into the receptacle on the right side of the unit. An optional Multi-pak Interface module allows up to four program paks to be installed at the same time, with selection of the specific module active at any one time selected either by software or by a switch on the Multi-pak Interface. Additional peripheral devices, such as an external disk drive, may be added to the Color Computer 3 for additional memory storage and retrieval. The main component of any computer system is the Central Processing Unit (CPU, IC1). It is the function of the CPU to provide or request data and select the proper address for this data. In addition, the CPU is capable of performing a limited set of mathematical and logical operations on the data. ROM (IC2) has the function of providing the CPU with a predefined set of instructions. Without ROM, the CPU would run wild and randomly execute instructions. In normal operation, the CPU jumps to the start address in ROM, after the reset switch has been pressed, and then performs the reset program to set up all of the programmable devices. Following this, the BASIC interpreter residing in ROM is in control of the All input and output ports for the Color Computer 3, with the exception of the program module/cartridge slot and the RGB monitor output (for CM-8), are located on the rear panel of the unit. These include the joystick input ports (right and left), Serial I/O, Cassette I/O, TV output jack (for standard color television set and composite monitor), POWER ON/OFF switch and RESET switch. A recessed channel switch (for selecting either channel on the TV - 3/4 for NTSC and 1/2 for PAL version) is also located on the rear panel of the unit. CPU. Note: Before installing any peripheral device, always remember to unplug the Color Computer's power cord. This will prevent damage to the device or to the Color Computer 3. -5- RAM (IC16 - IC19) provides storage for the programs and/or data currently being executed. In the standard unit, these four ICs are 64K x 4 but may be upgraded to sixteen 256K x 1 ICs as an option. (See Paragraph 3.3 on page 28 for instructions.) In addition, the same RAM is used to generate the video display. Normally, no conflict will be observed because the program will use one portion of RAM and the display will use another. During normal usage, the BASIC interpreter, located in ROM, will control the execution of programs located in RAM. A central component in the Color Computer 3 is the Advanced Color Video Chip (IC6). This chip provides refresh and address multiplexing for the RAM. It also provides all of the system timing and device selection. ACVC comprises the VDG (Video Display Generator) function which supports High-Resolution mode, in addition to all other modes included in the Color Computer 2. During High-Resolution mode, it generates 40 x 24 or 80 x 24 text screen, and 320 x 192 or 640 x 192 graphics screen. It is also designed to output two different video signals - composite video and analog RGB. ACVC can expand memory space up to 512K bytes. Having a built-in MMU (Memory Management Unit), it can support 2 banks of 256K-byte RAM, each with a 9-line address bus, even though the CPU possesses only 16 address lines. The remaining circuitry in the Color Computer 3 is devoted to Input/Output (I/O) communication. The most important part of this circuitry is the keyboard, which allows the operator to enter information. Other I/O circuits are provided to allow joystick input, cassette input and output, and RS-232C input and output. -6- > -7- 1,3 Memory Map Figure 1-2 shows the breakdown of the large blocks of memory in the Color Computer 3The rest of the section itemizes the following registers • I/O Control Register • Chip Control Register • $7FFFF - 68B09E VECTOR, Ji CONTROL $7FF00 - REGISTER, I/O SUPER EXTENDED BASIC $7E000- CARTRIDGE ROM $7C000- 68B09E Vector Register COLOR BASIC S7A000- EXTEND COLOR BASIC $78000- OC65 for PAL ! version , 1 . i Figure 3-3. Main PCB , 4. Snap each stand-off into the corresponding hole on the computer PCB. 5. Connect the computer's AC cord and signal cables to a TV monitor and run the following program to verify proper operation of the new memory chips 6 Figure 3-4. 512K RAM Card Secure the top and bottom cabinets. 10 WIDTH 40: PALETTE 0,0: PALETTE 7,63: 20 POKE&HFFD9,0 30 FOR A=&H00000 TO &H5FFFF STEP 512 CLS8 40 D=RND(255) 50 LP0KE A,D 60 B=LPEEK(A) 70 LOCATE 10,2: PRINT n ADDRESS=";A 80 LOCATE 10,4: PRINT M DATA= M ;D 90 IF BOD THEN 130 100 NEXT A 110 LOCATE 10,10: PRINT"RAM TEST IS GOOD!" 120 POKE&HFFD8,0: END 130 LOCATE 10,6: PRINT"ERR0R! 140 POKE&HFFD8,0: END -27- SECTION IV. BLOCK DIAGRAM NTSC VERSION CN CO 3 CO oc UJ -> GO ^< e? oo ^ -j CD z o rr < < A A yS "X -3S>- o O > Q 2 ? S? 3? *2 K m iVT ~M t£ a cd u CC UJ co u- woa a£ 60 (0 CD s» yaaooaa i ZS-OS to 5 UOm — CN > U O ^/ qc CO o > u CO >' TTTr < 0) H 00 •H PM aaddna Q < CC > I 00 + - o Q < v. dBddna — co *- sna tt-k -D —O ^q :i oo CN CJ o_ jCO — w t— aaddna -0< Q \f > _£ X O CN O «- CD 5 < v yO103NNO0 Nld ot? < -28- CO 3 CO Q < PAL VERSION CM Z u Q DC x< 9 o cc m %z 5i < -29- SECTION VI. TROUBLESHOOTING This section of the manual contains troubleshooting hints, diagnostic routines, and scope waveforms for both NTSC and PAL version for the Color Computer 3. Scope settings are noted on the individual waveform diagrams. Following is a list of virtually all of the problems that might be identified on the Color Computer 3: 6.2 6.3 6.4 6.5 6.6 6.7 6.8 6.9 6.1 Introduction The Color Computer 3 should be serviced only by qualified technicians. Throughout this guide a basic knowledge of computers will be assumed, as well as the ability to use a dual-trace oscilloscope. When servicing any computer, it is important to distinguish a hardware problem from a software problem. Stated another way, just because a particular program does not yield the results desired by the user, the hardware is not necessarily at fault. It is, therefore, recommended that the technician be thoroughly familiar with the operation of the Color Computer 3, as well as the Theory of Operation. Diagnostic aids are available from Radio Shack National Parts to assist the technician in the servicing of the Color Computer 3. Video Keyboard Processing problems Cassette RS-232C Sound Joystick Cartridge problems If a problem exists in more than one area, the first course of action should be to look for a common cause. Although it is possible to have two or more independent problems, it is more likely that a single failure can cause a multitude of symptoms. It is apparent, for example, that all of the above areas will have problems when the power supply is dead. Once a problem has been identified in one of the above areas, it can be localized by observing the specific symptom. For example, if a Cassette problem exists, is it a Read problem, a Write problem, or a Motor Control problem? After the problem is localized, isolating it to a specific component is usually not very difficult. Standard troubleshooting techniques include these steps: identification, localization, and isolation. The first step, identification, consists largely of making sure that a problem exists. In this step it is wise to check the obvious. Doing so can save hours of troubleshooting time only to find out that a cable was bad, or that it was some other relatively minor problem. After identifying that a problem really does exist, localization can usually be accomplished by merely observing the symptoms. Isolating a problem down to the defective component will often involve the use of test equipment, and sometimes, by part substitution. -54- 2) Wrong Color • Check Video Signal 6.2 Video Problems (TP7) and Chroma level (Waveforms 1 and 2) • Adjust TV control Display/No Sync/Noisy Video • Check Cable and Cable Connection • Check Power Supply and Transistor Bias Voltage (Q2, Q3) • NTSC: Check Video Signal at TP6 PAL: Check Video Signal at CVIDEO OUT of CN8 *Before proceeding next check, load Diagnostic Program Pak (Color Bar) or run the program below • Check Video Signal at Emitter of Q3 and check C67 • Check Video Signal at Emitter of Q2 and check C54 • Check Video level at TP7 (Waveform 1) • PAL: Check Sync Signal at Collector of Qll (Waveform 16) • PAL: Check the items in 5) RGB Problem 1) No 10 f 3) No Color • Check Video Signal at TP6 (PAL: CVIDEO OUT of CN8) and Color Burst Signal (Waveform 2) 4) Random Character/Clear Screen/No Sign-on Check RAS* (TP4), CAS* (TP5) Check pin 1 and pin 2 of IC15 Check pin 20 of IC2 • Check IC16 -19 (Dynamic RAM) • Check the items in 6.4 Processing Problem • • • 5) RGB Problem • Check Red, Green, Blue Signal (Waveforms 3 through 5) using Program Pak or Test program below • Check HSYNC, VSYNC (Waveform 6) **COLOR BAR TEST** 30 ON BRK GOTO 1000 40 HSCREEN 2 50 GOSUB 500 100 FOR R=0 TO 7 110 HCOLOR R,8 120 HLINE(R*40,0)-((R+1)*40,192), RGB LEVEL CHECK '*C0L0R-D* 4/3/1986 20 PALETTE RGB 30 ON BRK GOTO 1000 40 HSCREEN 2 50 GOSUB 500 100 FOR R=0 TO 15 110 HCOLOR R,0 120 HLINE(R*20,0)-((R+1)*20,192), PSET,BF 130 NEXT R 140 GOTO 140 *500 DATA 63,54,27,36 *510 DATA 18,9,32,16 *520 DATA 8,4,2,1 *530 DATA 45,40,5,0 535 DIM A(16) 540 FOR X=0 TO 15 550 READ A(X):NEXT X 560 FOR R=0 TO 15 570 PALETTE R,A(R):NEXT R 580 RETURN 1000 PALETTE CMP: END 10 ! 11 PSET,BF 130 NEXT R 140 GOTO 140 *500 DATA 63,36,31,18 *51G DATA 9,7,11,0 520 FOR X=0 TO 7 530 READ A(X):NEXT X 540 FOR R=0 TO 7 550 PALETTE R,A(R):NEXT R 560 RETURN 1000 PALETTE CMP: END * For PAL 500 DATA 63,54,27,18 510 DATA 45,36,9,0 For 500 510 520 530 -55- PAL DATA DATA DATA DATA 63,54,27,18 45,36,9,0 56,48,24,16 40,32,8,7 6) Composite Video Signal Adjustment 6.3 Keyboard Problems (PAL Version Only) A. Horizontal Sync Pulse Width adjustment Connection: connect oscilloscope to JK5 (Composite VIDEO OUT) Procedure: adjust VR2 to get 4.7 iisec. sync pulse width. No Keyboard Entry/Wrong Character • Check Flex Cable and CN2 • Check pin 23 (CS2*) of IC5 • Check D8 - Dll, C18, 19, 22, 23 and IC14 6.4 Processing Problem • • • Burst Signal • 64 pSec • • B. Burst Start Position adjustment Connection: connect oscilloscope to JK5 (Composite VIDEO OUT). 1. Turn VR101 to fully Procedure: counterclockwise 2. Turn VR101 clockwise to obtain 5.6usec. burst start position. 3. If the start position does not become 5.6usec, adjust it for maximum. 4. Check to see the burst appears every 1H (64usec.) • 6.5 Cassette Problems 1) Motor Control Problem • Run the following program and lt vr \i Composite Video Output Level adjustment C. check pin 39 of IC4 (Waveform 14) • Check pin 9 of IC8 (SALT) 10 POKE 65313,60 20 GOSUB 100 30 POKE 65313,52 40 GOSUB 100 50 GOTO 10 100 FOR A=l TO 10: NEXT A 110 RETURN 5.6jjSec M Check OSC Circuit (IC6) Check TP2 and TP3 (ECLK and QCLK) (Waveform 7) Check TP4 and TP5 (RAS*, CAS*) (Waveforms 8 and 9) and pins 10 and 11 of IC6 (WEO*, WEI*) Check Address decode circuit (IC9) Check SO - S2 Check pin 40 of IC5 (HSYNC*), pin 18 of IC5 (VSYNC*) and pins 37, 38 of IC5 (IRQ*) Check pin 40 of IC1 (HALT*), pin 2 of IC1 (NMI*) and pin 4 of ICI (FIRQ*) - these pins are normally High 2) Write Problem • Run the following Program and Check pin 17 of IC7 and Pin 1 of IC7. (Waveform 13) 10 SOUND 200,255 Connection: connect Oscilloscope to JK5 (Composite VIDEO OUT) terminated by 75 ohms. Procedure: adjust VR1 to get output level of l.OVp -P. 20 GOTO 10 3) Read Problem • Connect pin 4 and pin 5 of JK4 Run the above program and check pin 11 of IC8 • Check pin 7 of IC8 • Check R14, C25 • -56- 6.6 RS-232C Problem • Run the following program and check pin 3 of IC4 and pin 12 of IC8 (Refer to Waveform 15) 10 POKE 65312,2 20 POKE 65312,0 30 GOTO 10 6.9 Cartridge Problem Check CTS* signal Check Address/Data Bus (short or open) • Check pin 8 of CN1 (CART* input) and pin 7 of CN1 (QCLK Output) • • • Connect pin 4 and pin 2 of JK3 and run the above program. Check pin 14 of 1C8 and check pin 4 of 1C8 • Check Resistors R15, R16, R17 and R66 and Diodes D6 and D7 6.7 Sound Problem Check TV volume Run the following program and check pin 1 of IC7 (Waveform 13) Check Bias Voltage of Q4, C55 and C56 Check TP11 Check JK5 and pin 7 of CN3 10 SOUND 200,255 20 GOTO 10 6.8 Joystick Problem the following program and check if the numbers vary with joystick position or depressing fire button. • Check D8 - Dll and Components • Run around them (example: C18, C19, C22, C23) 5 10 20 30 40 50 60 70 80 CLS A=JOYSTK(0) B-JOYSTK(l) C=JOYSTK(2) D=J0YSTK(3) E=(PEEK(65280) AND l) F=(PEEK(65280) AND 2)/2 PRINT @0,A,B,C,D,F,E GOTO 10 -57- NTSC 6.10 Power Supply Check NTSC Version Note: Check to Confirm the voltage of AC outlet is 120V, 60Hz. (Power Supply Check START \ *1 Refer to *2 Refer to *3 Refer to *4 Refer to J Waveform 10 Waveform 12B Waveform 12A Waveform 11 Check for +5DC TP1 at \J Check Negative \J Voltage at "INPUT" Voltage at Pin Check Positive of IC36 15 of IC8 Check at AC Voltage Cathode of D13 Check Cathode of D3 & D4 for Check for at +8VDC AC Voltage "INPUT" of IC 36 "Output" of Check Ripple at (120Hz, Negative) IC36 v_y Replace D14 C62orD13 is Dead Replace these Parts Replace IC36 f END J -rv -58- Replace C63 NTSC w With scope Measure Voltage determine at Collector of frequency of Q1 AC Component Check Replace IC8 Replace Q1 at AC Voltage anodes of D1 and D2 A Check Vcc PIN of each IC to determine if IC excessively noisyuse scope. Replace C29 Replace despike capacitor for that chip -59- NTSC Check DC Voltage at Collector of Q1 Check AC Voltage anodes of D1 & D2 at Measure across DCV B19 Overcurrent Locate/Replace Short Component Measure at Replace Check AC Voltage at Secondary these Diodes of T1 DCV PIN1 of IC8 Replace Q1 Replace IC8 J To Recheck Check AC Cord and Replace. YES Replace T1 -60- PAL PAL Version Note: Check to Confirm the voltage of AC outlet is 240V, 50Hz. ower Supply Check C START A J *1 Refer to Waveform 10 3 *2 Refer to Waveform 12B *3 Refer to Waveform 12A *4 Refer to Waveform 11 Check for +5DC at TP1 Check v_y Check Negative "INPUT" Voltage at Pin 15 of W \J Positive Voltage at IC40 of IC8 *3 Check NO at AC Voltage Cathode of D13 Check Cathode of D3 & D4 for Check DC of at AC Voltage +12V "OUTPUT" for Check Ripple at "INPUT" / \ of IC40 About 20Vp-p ^S. ^S ? NO (100Hz) IC40 [YES KJ NO Replace D14 1 \ 1 r C62orD13 is Dead Replace these Parts Check at for Replace C63 +8VDC "Output" of IC36 ' 7.6 mbly Cab inet Bottom RS Part No. Mfr AZ-0107 M-00634 60131 370A 601311380A US , 1 CA Spring, Tors ion Foot Part No. 's ARB-7725 AF-0382 434810040A 608010060A or 608010350A | | I | | | 2 Socket Pin For Power Transformer Crimp 94HB Pin, 1 1 3 4 Keyboard Top Cabinet Assembl Cab inet Top AJ-7566 AXX-0245 AZ-0106 y US , CA Top Plate, Net 5 1 I 1 1 i 6 7 8 9 10 1 11 1 12 1 13 1 14 1 15 1 1 1 16 17 18 Holder Screw, Gromme t Sheet, Heat Sink For Net 3xl0P M Insulat ion For Ql Flange 3FN Shield For PCB Foir Shield AC Hardware Kit Screw Tapt i te Screw, Taptite 4x ZOPT-B/ZnY 4x,Z5PT-B/ZnY -90- | | | | I | 1 AHD-7020 For Power MDV-8 For Reset Foir Key SW s AHD-0088 AHC-0304 Nut, PCB Unit, Ma in Knob Modulator Knob Holder Holder Sheet Rivet Cord, CA CA 19401 1090A 194310070A 187510370A M-00633 60121 1560A 601211570A 711010470A 851310440A 413100810B HMP03010SN 481 10120A 48301 1470A 471010310A HANF300-SY U-32052655000940A 525010240A 659510850A 41 101870A 411103110A 473310990B HARRA003SN 31 1010160A K-5012 AC-4001 AK-5638 AHC-2199 AHC-2447 AHC-0305 AHC-2449 W-1000 1 HWK2603334 HCPB4020SY HCPB4025SY | | ! | | | | | | j | EXPLODED VIE c\J -91- ro NTSC W (NTSC) ^f-m co r- m oo -92- NTSC SEMICONDUCTOR INFORMATION IC1: MC68B09EP do o; 31 7 24] Aj 7] VCC I] V SS INSTRUCTION REGISTER yr\ i_x INTERRUPT CONTROL Z\ 4J reset NM1 fTR0 J] IRQ 3*1 LIC 36i AVMA 32RW D 39j rsc 4$ iD 3] HI HALT \ BUS CONTROL INTERNAL THREE STATE CONTROL -93- BA BS BUSY NTSC IC2: yPD27C256D-20 DATA OUTPUT 1|12|13|15|16|17]18|19| GNl) Vp|) OUTPUI ENABl t CIRCUIT OUTPUT CHIP tNABI BUf-f-t- R t CIRCUIT 262 144 BITS MFMORY CbLL IC3: SN74LS245N t> Al 2 A? 3 " [£>='18 r£^ ^0F= :^g BF:^1 ^r. E- -94- - -F= ^ V Bl JMTSC IC4: IC5: MC68B21P LSC81001P IRQA [38 INTERRUPT STATUS X CONTROL \r> DO (33 CONTROL A ~~— 3§CA, REGISTER A (CRA) D1 DATA DIRECTION D2 D3 30-— D4 29- — DATA BUS BUFFERS (DBB) i> c j£ OUTPUT BUS D5 D6 L D7 REGISTER A (DDRA) -\ 2 PAO 3 PA1 4 PA2 OUTPUT REGISTER A (ORA) ^ PERIPHERAL INTERFACE A iz 5 PA3 6 PA4 7 PA5 8 PA6 BUS INPUT REGISTER vcc 20 vss 9 PA7 (BIR) PBO OUTPUT ^> REGISTER B (ORB) PB1 V PB2 PERIPHERAL INTERFACE PB3 PB4 B cso 22 CS1 24 2i RSO 36 RS1 35 PB5 PB6 CS2 R/W 21 ENABLE 25 RESET n CHIP , » SELECT and R/W , * PB7 DATA DIRECTION CONTROL REGISTER CONTROL REGISTER B B (DDRB) (CRB) r~ INTERRUPT STATUS CONTROL IRQB 37 -95- B J— Ts] cbi I9l CB2 NTSC IC6: TCC1014 AIMIKF S'> S?p9 !H( *l .() :n Pi] ) is UJDRfvJ ""I h w[ b KCJ -??} 10 73) 11 =*] IP - 1 (,f'lf[l/ | l\ / 4 / UATA< BUS 11 (PUDO 1? JUAS ) ? / n : \( 7] (ILL K Hr.n fifi] VHM () fc.J j X 1 A I ^jtXIAl v ) / HRAMUAJA L AtCH CPU IU F OR AH \5i SSL /ACMVL Sf i RAMH MAMI)/ J UATA\ RAMDO VS? ^ \ > a ' 1[* } -96- o? I r I HOKin CTOH R NTSC IC7: 8050526 m_ o WF IGMTf [) UJFIHF Ml SOIJHCt S 3 [){) J l I (KHFNT <,WI 1 (,H T| IV AND VCONVFR1FH 6J HUM I lJ JA1A { H *- w] CASS OU1 > D> UtMf'ARA iL I f ( anai or, SWITCH T HT ~m m SNI) F IC8: lOF* NABl SNI) F I us! SNO [I 8050527 J|L \E~- INPUT '— T -J 1 , H I '' 1 INPUT hw„, QT- 1?|H., [4- Tt 10 '/I Ht) lh "" AI1 v "'"IN \ H H\Al hi SAL (J^ISM ,[Tu E5 -97- - ^' T] Hi I A1 IIHIV i l NTSC IC9: SN74LS138N E l (3) (2) E2 V cc E3 = P,ni6 GND=Pin8 (4) 15) (6) (l v v y i y y \7) (9) MO; ;l l) M2) TT 1|3) U4) U5, 67 66 o5 o4 o3 o2 6, o y 9 9 ? IC10-12: I SN74LS244N 1G V EfeKv 1 1A1 [ 2Y4 [j 1A2 jjj_ J" 20 19 - fer --^J-jU 2Y3 1A3 16 E te:A -^"^ 2Y2 -^ 1A4 fef2Y1 GND -98- 18 10 " <^~ 1Y1 2A4 1Y2 2A3 14 1Y3 T3I 2A2 ; 12 1Y4 11 2A! 1 NTSC IC13: SN74LS374N DO D—O^- i± CP D CD D2 D| nrxr~i CP D CP CD CD D n CP CD D3 D4 D5 D6 D7 (8) (13) (14) (T?) (18) I±'''li''Xi CP CP CP CO D A D D CD CD D CP n ^CD D I MR vCC = Pin20 GND=Pin 10 (2; (5) Qo IC1A: (6j (9) (12) Q2 03 Q4 T 06- (19) 05 Or, 0? SN74LS30N Vcc 14 13 12 [ ] 1 1 9 3 I ! p > 2 ^ J ^t E 6 y GND -99- y f NTSC IC15: SN74LS04N ^ ^" ]4 Vcc c< H II TT fe r<- GND 7 10 s" IC16-19: HM50464P-1 M. M. JZL - 9[ VCC - CAS CI OCK CI GF N Hi 1h| tiN(J OCK GF N I CON HOI ADORF SS COUNT 1 ! F^ —N" COl HE UMN COOt R 1 a. a ( H7 1^ 1 _v- Q7 1 APDRFSS a, nr OATA BUI FF RS OUT BUI A .[7 f- 262.144611 MFMOHY Chi I -ID' A. [u) - -100- 01 0? OS NTSC IC36: MC78L08ACP ^ 1: 2: 3: Ql: KTD880 OUTPUT GND INPUT Q2,Q3,Q5 - Q7: 2SC945 ^ 101- Q4: MPSA13 ^ -102- SCHEMATI 220/?^ t 1 |C36 3| ll I N- ' 1 kn f '0 f i * 1 * 1 • aj iur J ^ ' 5 006 4 t>Q-> (, ' , 1 t ^ H4 =1 u\ z i 0u ' f 15 1' m, 1* 1 26 'G ?c IC ,,'•'. In-t I J '8 i, 8 1)03 "' | J ; ; :::::; 1 "T> 7 ,1 f l I i i 1 ;+ ^ :'i*v f>'- - n ?! 1 .1 1 I I ,1 1 i ! * b f T~T7^F~7T 1 T" .'!• *l r-i. i'-; •103- i 'i 'T T'"i !• ' m ,,ni» "i [-,> T i -i i; ! r,„'J tl |cV:h*.:u*,;i t! i* ti i n NTSO DIAGRAM C Cat. No. J< „..! T"' "-a- , , si .,i lie al Ui Ji i 4, 4j : & r lis ; Tl o] U al lis al -i H-i -i ;< Tl Ta lis b[ life el |* Ui t—i ;.l Ti Tl T I T' , „. ou "- T y I'-, -104- 26-3334 SECTION IX PAL Version PCB VIEWS ELECTRICAL PARTS LIST EXPLODED VIEW PARTS LIST EXPLODED VIEW SEMICONDUCTOR INFORMATION SCHEMATIC DIAGRAM -107- 108 Ill 119 121 122 1 26 PAL PCB VIEWS TOP VIEW -108- PAL BOTTOM VIEW -109- PAL PAL SUB PCB TOP VIEW BOTTOM VIEW -110- ELECTRICAL PARTS LIST CAPACITORS I Ref. No. 1 De script ion | CI 1 I C2 C3 I C4-8 1 CIO/11 CI 2- 14 I M-PLast ic M-Plastic Ceramic Elec t rolyt ic Elec t rolyt ic M-Plast ic M-Plast ic Ceram ic Electrolyt Ceramic SL M-PLast ic M-Plast ic C9 I | 0.1 pF 0. lpF 0. lpF LC Ce ramie Ci I 1 I I ic C16/17 C18/19 Ce ramie C20/2 C22/23 Ce rami Mylar C24 Electro NP/LN C2 Ce ramie Mylar* 1 1 0. lpF Electrolyt 5 lOpF lpF 0. lpF 0. lpF 0. lpF lOpF 39pF 0. lpF 0. lpF lOOpF .022pF 1800pF .022pF 1800pF c RS Part No. | +-5% +-10% 50V+80-20% +-20% 25V +-20% 50V +-5% 50V 63V +-10% 50V+80-20% +-20% 25V +-5% 50V +-5% 50V +-10% 6 3V 50V+80-20% +-20% 16V 50V+80-20% +-10% 50V 50V 3V 6 or or Mfr's Part No. | I | I 1 I I or or | I | I I I I or or | I I I I 1 50V+8()-20% +-10% 50V ! I 1 I I 5 ,022pF M-Plast ic M-Plast ic Ceram c Electrolyt M-Plast ic M-Plast Lc C26 1 0. lpF 0. IpF 0. IpF i C2 i 7 C28 I 1 I Ce rami c E lee t rolyt C29 C30 C31 C32/33 C34 C35/36 I 1 I I 1 1 I C37 C38- 41 C42 C43- 48 I | I C49 C50 NOTE: M-Plast lc M-Plast ic Ceramic Elec t rolyt Cerami c Not Used Ceramic Not Used M-Plastic M-Plastic Ceramic Electrolyt M-Plastic M-Plastic Ceramic Ceramic Elec t rolyt *Mylar is a 10pF i c lOOpF 0. IpF 0. IpF 0. IpF i c 4700pF 0. IpF 0. IpF 0. IpF ic 220pF .022pF +-5% 63V +-10% 50V+80-20% +-20% 16V +-5% 50V 63V +-10% 50V+80-20% +-20% 16V 50V+80-20% 0. IpF +-5% +-10% 63V 50V+80-20% +-20% 16V +-5% 50V 63V +-10% 50V+80-20% 50V+80-20% 25V +-20% lOOpF 0. IpF 0. IpF .022pF lOpF I I I 1 I 1 +-2 0% 50V+80-20% 0. IpF ic 16V 50V .022pF 0. IpF 0. IpF ic +-20% 50V+80-20% +-5% or 50V 63V +-10% or 50V+80-20% 25V 50V registered trademark of -111- E. I or or i I 1 I or or | I I I | I or or | I | 1 I I or or | | | I I I I 1. CFQMK104JL CFSSLA01KQ CJRPK104ZM CEACI106M* CEACK10 5M* CFQMK104JL CFSSLA0 1KQ CJRPK104ZM CEACI106M* CCJVK390J* CFQMK104JL CFSSLA0 1KQ CJRPK104ZM CEACG10 7M* CKKPK223Z* CQQMK18 2K* CQQMK18 2KL CKKPK223Z* CQQMK182K* CQQMK18 2KL CEPCI106M* CKKPK223Z* CFQMK104JL CFSSLA0 1KQ CJRPK104ZM CEACG10 7M* CFQMK104JL CFSSLA0IKQ CJRPK104ZM CEACG4 7 8M* CFQMK104JL CFSSLA01KQ CJRPK104ZM CEACG227M* CKKPK223Z* or or | 1 i | or or | | | | 1 or or | | | | 1 or | 1 1 or | I | 1 or or | | | | or or | | | | or or | | | I CKKPK223Z* CFQMK104JL CFSSLA01KQ CJRPK104ZM CEACG107M* CFQMK104JL CFSSLA01KQ CJRPK104ZM CKKPK223Z* CEACI106M* | 1 or or | | | | or or Du Pont de Nemours and Company, | | | | | I Ref 1 C51 No. . | 1 1 1 I I | 1 | C61 1 C62 C63 C64 C65 C66 C67 1 1 1 1 | 1 | | 1 | | | C68-79 C80 I | I | C81/82 C83 | r ip ion t 0. lpF M-PLast ic M-Plast ic 0.1 pF 0. luF Ceramic 470uF Elec t rolyt ic lOpF Elec t rolyt ic 0.022uF Ceramic Not Used 0. luF M-Plas t ic 0.1 uF M-Plas t ic 0. lpF Ceramic Ceramic SL 39 P F lOOOpF Elec t rolyt ic lOOOpF Elec t rolyt ic Not Used 82pF Ceramic SL 27pF Cerami c 47pF Electro lyt ic Not Used 1500pF Mylar 1 C54 C55/56 C57 C58/59 C60 1 Desc | Not Used My lar I | 0.0 luF 1 1 + -5% or 50V -10% or + 63V 80-20% 50V+ + -20% 16V 25V + -20% 50V+ 80-20% + -5% or 50V 63V + -10% or 50V+ 80-20% + -5% 50V + -20% 16V + -20% 25V CFQMK104JL or CFSSLA01KQ or CJRPK104ZM CEACG477M* CEAC1106M* CKKPK223Z* | I | I | | I | | CFQMK104JL or CFSSLA0 1KQ or CJRPK104ZM CCJVK390J* CECCG108M* CECCI108M* I | I | I I | + -5% 50V 50V 16V + -20% 50V + -5% + -5% | + -5% 50V CCJBK820J* CCJBK270J* CEDCG4 76M* I CQQMK1 I CQQMK152JL C84-89 C90 | (J I CI 02 Ceramic NPO Not Used ElectroLyt c M-Plast ic M-Plas ic 1 1 i 1 1 Not Used I C9 1-100 | 1 | t CI 03 I I CI 03 I CI 06 I CI 07 Mylar M-Plast ! CI 04 | | Ceram ic i My lar !0pF 50V + -5% lOOpF 16V + -20% 0. lpF 50V + -5% 0. IpF 6 3V + -10% CCJBK10IJ* I CECCG10 7M* CFQMK104JL or CFSSLA0 1KQ CQQMK103JL or CFQMK10 3JL CKJPK102Z* CQQMK222JL or CFQMK222JL CCJBK150J* CKJPK102Z* I or | | I O.OIuF O.OlpF lOOOpF 2200pF + -5% or 50V + -5% 50V 50V + 80-20% + -5% 50V 5pF O.OIiiF 0.0 lpF + -5% 50V 50V + 80-20% + ~5% or 50V + -5% 50V 10pF lOOOpF 0. luF 16V 50V 50V + -20% 0. lpF 63V 50V + | | I I I | I | CI 08 | I CI 12 | C I | Ceramic NPO Ceramic ! My la i r CI 17/1 18 M-PLast ic M-Plast ic Ceramic NPO CI 19 My 1 1 3- 1 1 6 I 1 a r | C I C121 M-Plast i.c Cerami c Ceramic NPO C122 Not | I | | 1 C 1 I 20 23-1 C126 C I 27 C128 25 1 lOOOpF My lar M-PLast ic 09-1 M| ElectroLyt CI 52 CQQMK103J* or CQQMK103JL I I I J* or I c lOOpF 0.0 iuF 0.0 \yi? lOOOpF 30pF | | I | I + -5% + -5% CQQMK-10 3JL or | | or 50V -10% + ~5% + -5% or 50 V +--5% | | | I | | I 50V +-80-20% + -5% 50V I I CFQMK103JL CEDCG106M* CQQMK102J* CFQMK104JL or CFSSLA01KQ CCJBK101J* CQQMK103JL or CFQMK103JL CKJPK102Z* CCJBK300J* Usi-d M-Plast ic M-Plast ic Not Used My lar M-Plast M-PLast -5% or 0. lpF 50V 0. lpF 6 3V + -10% 1800pF 50 V -5% -5% or + -10% ic 0. MF 50V ic 0. \\i¥ 6 3V 1 + | | | + + 112- | I | CFQMK104JL or CFSSLA0 1KQ CQQMK18 2J* CFQMK104JL or CFSSLA0 1KQ Rff. Desc N< C129 CI 30 1 1 cm ci i n i Ceramic Ceramic Ceramic NPO El e c I r o 1 y t i r ip t 5p c lOOOpF 39pF 47uF RS ion 50V+-0.25pF 50V+80-20% +-5% 50V +-20% 16V | 1 | | Part No. Mfr's Part No, CCJBK5R0C* CKJPK102Z CCJBK390J* CEDCG476M* COIL Indue tor Indue tor LI 01 LI 02 lOOuH K 22uH K 14201 1510A 14201 1430A CONNECTORS CNI I i CN2 i i CN'i CN4-6 CN7 CN8 I I i 1 I CN9 I I PCB PCB Wire Wire P i 40Pin Car tr idge 16Pin Keyboard or lOPin RGB 12Pin 3Pin 3Pin n Pin Pin Pin Pin Pin Pin 0060A or 0140A 0680A 1090A 1941 2500A 19401 0510A 1941 1250A 19421 19421 19391 19391 1 1 120A 2550A 19401 I130A 1941 2560A 19401 1941 7Pin 1 1 1 CORES FBI/2 for FB3/4 FB5-10 Not Used for No se No se 588010060A or 588010070A or 588010130A i 588010060A or 588010070A or 588010130A i CRYSTALS XI X101 28.475MHz Clock OSC 4.433618MHz HC-18/U 391012290A 391 01 0251A DIODES Dt/2 D3/4 S i 1 S i 1 icon icon GP20B 1N4002 SR1K-2 Rectifier or or or 10E1 D5 Si 1 icon 1N4002 1S953 1N4148 Switching -113- or SDSI00140SDSI00036SDSI00026SDSI00003SDSI00007SDSI00015SDSI00057SDSI00064- or or or or or PAL Re i t . No. 1)6// 1 Descr pt ion i | Zener ! D8-11 D12 I I German Si D13/14 1 S 1 i L i urn icon icon RD3.9E--B RD3.9E-L RD3.9E--N 1KF20-04 1S953 1N4148 Swi tch ing DI5-17 S il D101 I icon Var icap | I SDVC00005- I I Switching or | | or or or 10E1 I SZRD3.9EBSZRD3.9ELSZRD3.9ENSDGE00012SDSI00015SDSI00057SDSI00064SDSI00036SDSI00026SDSI00003SDSI00007SDSI00015SDSI00057SDSI00064- I | Swi tch ing 1N4002 SR1K-2 1N4002 1S953 1N4148 or or Mfr's Part No. RS Part No.| | | | | | | I | Swi tch ihg or ] | | ITT310 or or or or or or or or or FUSE | 250V 0.4A Fl 1 (S504) I | | 251201420A i ICs MC68B09EP N-MOS MPU MBL68B09E-P-G HD68B09EP MBM27C256-25CZG N--M0S EP-ROM TC57256D-20 MBM27C256A--25CZG BUS SN74LS245N TTL MB74LS245M M74LS245P HD74LS245P N-MOS MC68B21P PIA MB8874HM-G HD68B21P PIA Select LSC81001P N-MOS C-MOS TCC1014 ACVC 68Pin IC Socket IC1 I IC2 I IC3 i IC4 1 IC5 IC6 I I or or I I or or I 1 | or or or | | | | | or or | | I | | 1 I I IC7 IC8 IC9 ICIO-12 IC13 I I 8050526 8050527 SN74LS138N MB74LS138M M74LS138P HD74LS138P SN74LS244N MB74LS244M M74LS244P HD74LS244P SN74LS374N MB74LS374M M74LS374P HD74LS374P Bipola Bipola TTL DA Convertor Regulat or Decoder I I | or or or | | | | | TTL Buffer or or or | | | | | TTL D-TYPE or or or | | | I | I I -114- or or or or or or or or SICC1014— I I | SIMC68B09E SIBL68B09E SIHD68B09E SIBM256-25 SITC#0003SIBM256A25 SIRNS245NSIMBS245MSIM-S245PSIHDS245PSIMC68B21SIMB74HM-G SIHD68B21SILS8100IP 1951 10470A or 1951 10480A SISC50526SISC50527SIRNS138NSIMBS138MSIM-SI 38PSIHDS138PSIRNS244NSIMBS244MSIM-S244PSIFDS244PSIRNS374NSIMBS374MSIM-S374PSIHDS374P- or or or or or or or or or Ref I . IC14 I IC15 I 1CI6-19 1 Desc No. r ipt ion SN74LS30N TTL MB74LS30M M74LS30P HD74LS30P SN74LS04N TTL MB74LS04M M74LS04P HD74LS04P MB81464-15E>-G N-MOS HM50464P-15 M5M4464P-1 pPD41464C-l 5 uPD41464C-l 5 TMS4464-15NL IC RS Part No. I 8 IN NAND or | SIRNS30N— | or | | Inverter DRAM or or or or or or or or | | | | I | | | | | I | I 1 IC36 MC78L08ACP Bipola NJM78L08(A; Regulator or | > I I 1 1 1 IC37-39 IC40 IC10I rc 102 IC103 | JK1/2 JK3 Regulator Bipola or I I MC14569BCP C-MOS MC14568BCP C-MOS MCI 377P Bipola Counter Counter RGB I I | DIN Joys t ick I DIN Serial I/O I Cassette I/O DIN I I 1 JK5 I VRI VR2 2P Video/Sound RCA I VRI 01 Sem -F xed 500B Sem ~F xed lOkB i i i i V-Level Adjust HSYNC Pulse Wi dth I | 1 Sem -F xed 20kB ii i Burst Position I I I RY1 I | 1 or or or or or or 1951101 50A or 195110290A SIMCL08A— or SINM78L08A SIMC#0006- or SIPC7812HSIMD4569BSIMD4568BSIMC1377P- 193410040A or 193410070A 193410020A or 193410050A 193410030A or 193410060A 192010400A 1771 10470A 177310220A or 177310080A 177310230A or 177310070A RELAY I | I I | | j I | | | | I | I | j I | I | | | | I 1 I I | 1 or or or POTENTIOMETERS 1 | 1 I JK4 | Not I 1 or or or JACKS i 1 Used MC78 12CT uPC78 12H SIMBS30M-SIM-S30P-SIHDS30P-SIRNS04N-SIMBS04M-SIM-S04P SIHDS04P-SIMB464-15 SIHM464-15 SIM-464-15 SIPD464-15 SIPD464-12 SITS464-15 1951 10410A — i 18Pin Socket Mfr's Part No. | I I | I | | Remote Con rol ON/OFF for Cassette | | 1 I 1 I 1 1 581010140A or 58101 01 60A or 5810107 0A 1 -115- | | | 1 PAL RESISTORS ! Re 1 . t No. 1 Descr | ip t ion Mfr's Part No RS Part No.l | . 1 R] i | R2-8 R9/10 ! 1 Rl i 1 1 1 1 1 1 1 I R21 1 1 R27 R28 R29 R30 1 1 1 1 R3 1 | | 1 | 1 | | | 1 R22-25 R26 I | 1 R12 R13 RI4 R15 R16/17 R18 R19 R20 1 | 1 | | | : I : R32 R33 R34 R35 R36 R37 R38 R39 R40 I 1 ! 1 I I 1 1 1 R4I 1 I 1 I I I I I I I I I | | | I I I I R42 R43 R44 R45 R46 R47 R49 R50 R51 R52 R53 R54 R56 R57 R58 R59 R60 R61/62 I R63 R64 I R6 I R66 I 5 | | | | | | | Carbon Carbon Carbon Carbon Carbon Carbon Carbon Carbon Carbon Carbon M-Film Carbon Carbon Not Used Carbon Carbon Carbon Carbon Carbon Carbon Carbon Carbon Carbon Carbon Carbon Not Used Carbon Carbon Carbon Not Used Carbon Carbon Carbon Carbon Carbon Carbon Carbon Carbon Carbon Carbon Carbon Carbon Carbon Carbon Carbon Carbon Carbon Carbon Not Used Carbon Not Used Carbon lOOkohm 4.7kohm 47 ohm 4 7kohm Okohm 100 ohm 220 ohm 270 ohm 1. Okohm 510 ohm 10 ohm ohm 5 4.7kohm 1 ] 1 . 1 1 1 1 1 1 1 1 1 7kohm ohm .Okohm 4. 10 1 3.9kohm 43 ohm 82 ohm 4. 7kohm 10 ohm .Okohm 3.9kohm 43 ohm 82 ohm 4. 7kohm 10 ohm .Okohm 3.9kohm 43 ohm 82 ohm 4 7kohm 100 ohm 4. 7kohm + -5% /4W + -5% MW MW /2W /2W /2W + -5% + -5% | MW MW + -5% I | | | 1W +-5% + -5% + -5% + -5% 1 I I I I I | I + -5% | I | | I I + ~5% + -5% I I 1W + -5% I I Mw Mw Mw Mw + -5% | | /4W + -5% Mw + -5% /4W + -5£ Mw + -5% Mw + -5% 1W + -5% Mw + -5% Mw + -5% 1/4W I/4W 1/4W + -5% 1 1 1 1 1 1 1 1 | I + -5% 5kohm 1/4W +-5% 1/4W 1/4W 1/4W 1/4W 1/4W 1W -116- RCSQP222J* RCSQP124J* RCSQP100J* RCSQP823J* RCSQP101J* RCSQP393J* RCSQP203J* RCSQP224J* RCSQP101J* RCSQP224J* RCSQP102J* I + -5% + -5% 1W | + -5% 1/4W . I Mw Mw 47 ohm . i + -5% + -5% RCSQP104J* RCSQP472J* RCSQP470J* RCSQP472J* RCSQP103J* RCSHP101J* RCSHP221J* RCSHP2 71J* RCSQP102J* RCSQP5I1J* RM0IHR10J* RCSQP510J* RCSQP472J* I | | 1/4W 1/4W 1/4W 1/4W 1/4W 1/4W 1/4W 1 | | +-5% +-5% + -5% + -5% + -5% + -5% + -5% + -5% + ~5% + -5% + -5% + -5% +-5% +-5% +-5% +-5% 1 7 + -5% MW Mw Mw 1 2.2kohm 120kohm 10 ohm 82kohm 100 ohm 39kohm 20kohm 220kohm 100 ohm 220kohm .Okohm /4W | | | | | I | | | I I | | | | | | 1 I RCSQP472J* RCSQP100J* RCSQP102J* | I | I | | | | I I I I 1 I I I I I 1 I I I | I | I I I | I | | | | | I I I RCSQP392J* RCSQP430J* RCSQP820J* RCSQP472J* RCSQP100J* RCSQP102J* RCSQP392J* RCSQP430J* RCSQP820J* RCSQP472J* RCSQP100J* RCSQP102J* RCSQP392J* RCSQP430J* RCSQP820J* RCSQP472J* RCSQP101J* RCSQP472J* RCSQP470J* RCSQP752J* 1 1 1 1 1 1 1 1 1 I 1 1 1 1 1 1 1 1 I 1 1 1 1 1 1 1 1 1 1 1 I 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 PAL Ret". No. Desc r ip t ion Rl 12 Carbon Carbon Carbon Not Used Carbon Carbon Not Used Carbon Carbon Not Used Carbon Not Used Cement Not Used Carbon Carbon Not Used Carbon Carbon Carbon Carbon Carbon Carbon Carbon Not Used Carbon Not Used Carbon Rl 13/1 14 Ca R6 7 R68 R69 R70 R71 R72 R73-79 R80 R81 R82 R83 R84/85 R86 R87-89 R90 R91 R92-100 R101 R102 R103 R104 R105 R106 Rl 07 R108 Rl Rl 09/ 1 1 10 1 16/117 4 . 7kohm 1/4W 1/4W 1/4W + -5% | + -5% | RS Pa rt No. | I I + -5% | I 10 ohm + -5% 1W 1 470 ohm 2 I RCSQP471J* I RT05Y2R0KT | + -5% 1 | + -5% | 2kohm 27kohm 680 ohm lOOkohm .Okohm /4W /4W /4W /4W 1/4W 1/4W 1/4W + -5% 1 .Okohm 1/4W + -5% 47kohm Okohm 2.2kohm 1/4W 1/4W 1/4W + -5% 22 ohm 680 ohm .Okohm 470 ohm .Okohm /4W 1/4W 1/4W 1/4W 1/4W 10 ohm 820 ohm 3 3 ohm 2 . 1 1 1 | + -5% 1 | I I I RCSQP102J* I + -5% | 1 + -5% | I | + -5% | I + -5% | I + -5% | | + -5% | | 1 + -57o | i | | | | | | RCSQP111J* RCSQP820J* RCSQP821J* RCSQP330J* RCSQP222J* RCSQP273J* RCSQP681J* RCSQP104J* RCSQP102J* I 1 RCSQP102J* RCSQP201J* RCSQP472J* RCSQP821J* RCSQP182J* | 5W +-10% ohm 82 ohm Used Carbon Carbon + -5% 1/4W Part No. I | + -5% 1/4W /4W 1 bon + -5% s I | 1/4W 1/4W ' RCSQP100J* RCSQP620J* | 62 ohm 820 ohm ,8kohm Mfr | | | | RCSQP473J* RCSQP103J* RCSQP222J* | | Not Rl 18 Rl 19 R120 Rl 2 1 Carbon Rl 15 Rl r .Okohm 200 ohm 1 Ca rbon 1 Carbon Carbon 1 RI22 1 1 + -5% | + -5% | I I + -5% | I + -5% | I + -5% | I RCSQP220J* RCSQP681J* RCSQP102J* RCSQP471J* RCSQP102J* | | | | | RESISTOR BLOCKS MP 1 RGLD8X472J / 2 i 1 1 l 522110520A | 1 i SWITCHES | Push Key Slide SW1 SW2 SW3 for Power for Reset for Channel Selec 1 1 t i I 1 1 1 1 182110240A 187010040A 1831 1400A 1 | | | 1 1 TRANSFORMER | Tl | Power El 54 240V 1 I 10102861SA | 1 1 -117- 1 TRANSISTORS i 1 Rof 1 . No. Descr ipt on i RS Part No. | Mfr's Part No | . 1 Q1 : i Q2/3 i KTD880(Y) NPN KTD880(GR) 2SC1730(L) NPN Regtllator or Amp Q4 ! ! 1 1 1 I I Q5-7 Q8-10 QH Q101 Q102 Q103 2SC1730(L) NPN Not Used 2SC536(H) NPN Amp 2SC536(H) NPN 2SC167A(L) NPN 2SC2786(LF)NPN Amp | STKD880— Y STKD880— G I ST2C1730-L | | | I | STMS-A13— | ST2C1730-L I ST2C536— H | I Amp -118- I ST2C536— H ST2C1674-L ST2C2786LF or | 1 | 1 I I I 1 | PAL EXPLODED VIEW PARTS LIST Descr ipt ion Ref. No. RS Part No. | Bottom Cabinet Ass'y Keyboard Top Cab inet Ass y Cab inet Top Plate, Top Plate, Control Screw, 3xl2P/Ni-3 for Ql Gromme t M for Ql Sheet, Insulation for Ql Heat Sink, for Ql Nut, Flange 3FN for Ql and IC40 PCB Unit, Main Knob for Power Modulator, MDV-9 Knob, for Reset Holder Holder Sheet, Shield PAL IN Rivet, PAL IN AC Cord Ass 'y Cord, AC KP-560 7F Socket, Pin Crimp, Pin Holder Clip, Fuse Heat Sink, for IC40 Screw, 3xlOP/Ni-3 for IC40 Holder PCB Ass'y, Encoder M-00726 60131 1370A 603610370A 43481 0040A 608010060A or 608010350A M-00762 194011090A 194310070A 187510370A M-00725 60121 560A 71 1010470A 71 1310430A HMP03012SN 481 110120A 48301 1470A 471010780A HANF300-SY U-32055-1 655000940A 525010250A 659510850A 41 101870A 411103110A 47331 1060A HARRA003SN M-00765 311010430A 19401 1670A 194310190A 411103650A 197303320C 471010770A HMP03010SN 413101410A U-25596 Hardware Kit Screw, Taptite 4x20PT-B/ZNY Top/Bottom Screw, Taptite 4x25PT-B/ZNY Top/Bottom HWK263334P HCPB4020SY HCPB4025SY Cab inet Bot torn Door Spr ing Tors ion Foot , , Pin Socket Ass'y with Lead Wire Socket, Pin for Power Transformer Pin, Crimp 5167TL ' 1 , 6 , 7 8 9 10 1 , 1 12 13 14 15 16 17 18 19 20 21 22 23 24 Mfr's Part No. 1 MISCELLANEOUS Ref. No. Description I I RS Part No. Cord, Patch RCA-PAL L3 7M 2.5C2 Connector, Pin for Power Transformer I . -119- I I Mfr's Part No. 313510120A 1941 01 351A 120- EXPLODED VIEW -121- in n oo -122- SEMICONDUCTOR INFORMATION This section contains ICs and Transistors which differ from the NTSC version, IC40: MC7812CT INPUT LI V i Y $ V ^ z H ASC : COMPEN s i SAT ION REFE RENCE VOLTAGE STARTER t- 55 O N 7\ ERROR AMP ^ DC ^] OUTPUT THERMAL OVERLOAD PROTECTION I li GND Input GND Output IC101: MC14569BCP DPA1 DpA2 DPA3 Dpa4 CTLa CTLb Dpbi D PB 2 DpB3 DpB4 TTTl o] v dd BINARY to JOHNSON ENCODER ]U vss tttttttt T BCD/BINARY HIGHSPEED CLOCK JOHNSON COUNTER PE co [T- 1L cf |y — -123- 4 BIT BCD/BINARY SYNCHRONOUS T5] Sl PRESET ENABLE (INCLUDING EARLY ZERO DETECTION) T] p EOUT IC102: MC14568BCP PC|n[J4 T3JPCOUT PHASE COMPARATOR I2]PCP0UT in COUNTER ci I]l- D1 jOJ F CTl_[l5 "0»[3 4 BIT PROGRAMMABLE COUNTER D2 n- Wl I Vss I I LAJ LiJ LgJ LiJ DP4 DP3 DP2 T]Q1/C2 IC103: MC1377P R N N F dsc[77 PAl Y^lCHHUMA SWITCH ISO" osu[Ti CHROMA 90 "f crw | 771 B Y BURST PU1SL DRIVER GN0 [lI Hi CI AMP COLOR ERENCE LATCHING DUAL RAMP COMPARA AND GFN TOR LUMINANCE MATRIX DITf OUT PUT AMPt "TT RAMP w OFN -124- H P IN B Q IN a B IN "7TICOMP -Lloui IFIFR CLAMP TIT 3 Q2,Q3,Q5-Q7: 2SC1730 Q102: ^ 2SC1674 Q11,Q101: 2SC536 Q103: ^ -125- 2SC2786 ^ ?6-3334 Cat. No. SCHEMATIC DIAGRAM PAL ENCODER o z t> Ml ) icf 9L -VW- "*fl^ i MOt ft la -AAAr LDIX o AW- — 0LfJJ_I om 101a dS 6^L^ to :*: o o r- o -AMto at b oo obto a. - ucl .< 889Qtn:w to to > »r 111 v-r cdT" in[" «*t \- < ( H 4 O — M z -" n z lU ft Ml rr 4 < (/) i/j 111 LU > i 1 LU in < / < < lh(/) — < i/) ft tu or o > < < 1 i 1 i < O z _ O l/) OQ X V CO r- Q Z f CJ IN -126- 4 SCHEMATIC DIAGRAM <_2 } - ~ HALT - kmT <3 RESET ~> CAR? t-5V <9> C2&J 100/16 lTIC diagram Cat. No. 26-3334 GN3 RGB OUT 1 23456789 \ 10 AAA NOTES (1JALL RESISTANCE VALUES ARE INDICATED I N "CHM" 6 tK-IO^O-fA M-T0 OHM). U) ALL CAPACITANCE VALUES ARE INDICATED -128- IN %iF" [P-1 1 ah) RADIO SHACK A Division of Tandy Corporation Fort Worth, Texas 76102 10A6 Printed 81 1 1 1 in Korea 1870A
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File Type : PDF File Type Extension : pdf MIME Type : application/pdf PDF Version : 1.5 Linearized : Yes Page Layout : TwoPageRight Page Count : 127 XMP Toolkit : XMP Core 4.1.1 Metadata Date : 2013:05:22 08:22:38Z Create Date : 2013:05:22 08:06:36Z Modify Date : 2013:05:22 08:22:38Z Creator Tool : Digitized by the Internet Archive Producer : Recoded by LuraDocument PDF v2.53 Part : 2 Conformance : B Document ID : uuid:uuid:8f813f42-72b8-d71b-57d6-d243a3b4d756 Version ID : 2 Title : Radio Shack Hardware Manual: Color Computer 3 Service Manual (19xx)(Tandy) Creator : Digitized by the Internet Archive Keywords : http://archive.org/details/Color_Computer_3_Service_Manual_19xx_TandyEXIF Metadata provided by EXIF.tools