EK VK100 TM 001 Technical Manual

EK-VK100-TM-001 VK100 Technical Manual EK-VK100-TM-001 VK100 Technical Manual

User Manual: EK-VK100-TM-001 VK100 Technical Manual

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\JK100
TECHNICAL MANUAL

- - -

-~-

----

~D~DDmD

EK·VK100·TM·OOl

\JK100
TECHNICAL MANUAL

mDmDD~D

1st Edition, April 1982

Copyright

e

1982 by Digital Equipment Corporation
All Rights Reserved

This document includes material from Microsoft
Basic-80. Copyright e 1979 by Microsoft. All
rights reserved.
eBarco Model GD33 monitor
is a
trademark of the Barco Corporation.

registered

The reproduction of this material, in part or
whole,
is
strictly
prohibited.
For
copy
information, contact the Educational Services
Department,
Digital
Equipment
Corporation,
Maynard, Massachusetts 01754.
The information in this document is subject to
change
without
notice.
Digital
Equipment
Corporation assumes no responsibility for any
errors that may appear in this document.
Printed in U.S.A.

The following are trademarks of Digital Equipment
Corporation, Maynard, Massachusetts.
DEC
DECUS
DIGITAL
Digital Logo
PDP
UNIBUS
VAX

DECnet
DECsystem-10
DECSYSTEM-20
DECwriter
DIBOL
EduSystem
lAS
MASSBUS

4/82-14

OMNIBUS
OS/8
PDT
RSTS
RSX
VMS
VT

CONTENTS

CHAPTER 1
1.1
1.2
1.3
1. 3.1
1. 3.2
1. 3.3
1.4
1. 4.1
1. 4.2
CHAPTER 2
2.1
2.2
2.3
2.4
2.5
2.5.1
2.5.2
2.5.3
2.5.3.1
2.5.3.2

INTRODUCTION
Introduction

.. .. . . . . . . ....... . . . . . . . .. . . . . . . . . .. .

G e n era 1 De s c rip t ion

............................. .
Accessories and Supplies .•..•..•••..••.••.•.•••••
VK100 Carrying Cases ..•..•••••••.•••.•.•..•..
Keyboard Overlays

INSTALLATION
Introduction
Site Considerations ••••••••••••••••••••••••••••••
Unpacking and Inspection ••...•.•.•.•••••••.......
Repacking . . . . . . . . . . . . . I' • • • • • • • • • • • • • • • • • • • • • • • • • •
Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Connecting to the Barco Model GD33 Monitor •••
Connecting to a Typical Black and
White Monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Connecting to the LA34VA Graphics Printer •..•
Connecting Directly to the LA34VA
Graphics Printer •••.•••.••••••....•.•..•.
Adding a Terminal from a Multiterminal
String

2.5.3.3

••••••.••.••.•.........•••••

VK100 Cables and Connectors .•....•..•.•••••..
Ordering Accessories and Supplies .•.•••••••......
Toll-Free Telephone Orders ••.•.•••.•....•.••.
D ire c t Ma i lOr d e r s ••.•.•••..•.•.•••.•••......

1-1
1-1
1-5
1-5
1-5
1-5
1-6
1-6
1-6

2-1
2-1
2-2
2-4
2-5
2-11
2-13
2-13

2-15

. . . . . . . . . . . . . . . . . . . . . . . . . . . . ,. . . . . . . 2-16

Removing a Terminal from a Multiterminal
String . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-18

2.6
2.6.1
2.6.1.1
2.6.1.2
2.6.2
2.6.2.1
2.6.2.2
2.6.2.3
2.6.3
2.6.3.1
2.6.3.2

Hardware Interface Information .•..•.•••••••••••••
General Communications Interface Information •
Baud Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Character Format .•.•••.•.•.•.••••••••••••
EIA Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Physical Interface •••••••.•••.•.•••••.•.•
Electrical Characteristics ••••••••••••.••
EIA Interface Cables ••••••••••.••••••••••
20 rnA Current Loop Interface •••••.••••••••••.
Electrical Characteristics ••.••••.•......
20 rnA Interface Cables •••••••••.•....••••

iii

2-19
2-19
2-19
2-19
2-19
2-19
2-21
2-22
2-22
2-23
2-23

2.6.4
2.6.5
2.6.5.1
2.6.5.2
2.6.5.3
2.6.5.4
2.6.5.5
2.6.6
2.6.6.1
2.6.6.2
2.6.6.3
2.6.6.4
CHAPTER 3
3.1
3.2
3.3
3.3.1
3.3.2
3.3.3
3.3.4
3.4
3.4.1
3.4.2
3.5
3.5.1
3.5.2
3.5.3
3.6
3.6.1
3.6.2
3.6.3
3.6.4
3.6.5
3.6.6
3.6.7
3.6.8
3.6.9
3.6.10
3.6.11
3.6.12
3.6.13
3.6.14
3.6.15
3.6.16
3.6.17
3.6.18
3.6.19
3.6.20
3.6.21
3.6.22
3.6.23

B uf

fer Over flo w ••••••••••••••••••••••••••••••
Display Interface ••••••..•.•••••••••.••••••.•
Composite Video Port .•••••••••••.••••••••
Color Monitor Port ......•.••••..•...•••.•
Composite Sync Waveform Timing ••.••.•••••
Monitor Selection •.....•••••••.••••.•••••
Video Interface Cables ••••••••....•.•••••
Hardcopy Interface ••.•.•.••..••••••••••••••••
Physical Interface .•••••..••.•..•...•.•.•
Electrical Interface ••..•••.•.••.••••••••
Hardcopy Interface Cables •.•.••••.•••••••
Hardcopy Device Sharing ••.••••..••••.••••

2- 2 3

2-26
2-26
2-27
2-27
2-28
2-28
2-29
2-29
2-30
2-30
2-30

OPERATING INFORMATION
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Terminal Controls

. . . . . .. . . . . .. . . . . . . . . . . . . . . . . . . .

Keyboard Controls . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Standard Keys

•••••••.••.••.•••••••.••••••••••

Special Function Keys •....•..•••••••••••.....
SET-UP Mode Keys •••••••••••••••••••••••••••••
Locator Mode Keys •••.••••••••••••••..••..••••

Visual and Audible Indicators ••••••••••••••••••••
Visual Indicators . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Audible Indicators . . . . . . . . . . . . . . . . . . . . . . . . . . .

SET-UP Mode Description •..••••••.•••••••••..••.••
Set-Up Parameter Summary •••••••••••••••••••••
Changing a SET-UP Parameter (Operator) .•.••.•
Changing a SET-UP Parameter (Host Computer) ••
SET-UP Parameter Descriptions ••••••.••.••••..••••
Transmit Speed (TS) ••••••••••••••••••••••••••
Receive Speed (RS) .•••••••.•.••••••••••••••.•
Line/Local (LL) •.•••••.••••••••••••••••.••.••
Bas i c

(BA)

•••••••••••••••••••••••••••••••••••

Parity Enable (PE) ••••••••••.••••••••••••.•••
XON/XOFF (XO) •....•.....•.••.••.•••..•••.•.••
Scroll Mode

(SM)

•••.•••••••••••.•••••••••••••

Reverse Video (RV) •••••.••.••.••••••••.•••••.
Horizontal Margins (HM) ••••••••.•••..••.••.••
Vertical Margins (VM) •••••••.•.•..•.•.•••••••
Expansion Mode (EM) ••••••••••••.•••.•••••.•••
Horizontal position (HP) ••••..•••••...•••••••
Overstrike (OS) ••••••••••••..••..••••••••••••
Visual Cursor (Ve) ••.••.••••••.••••••••••..•.
Text Display (TD) •••••••••..••.•••••••••••••.
Graphics Display (CD) ••••••••••••••••••.•••••
Graphics Prefix (GP) •••••••••••..•••••••...••
Single Character (SC) .••.••••••••••••••••••••
Local Echo (LE) ••••••••••••••••.•.•••.•..••••
New Line

(NL)

••••••••••••••••••••••••••••••••

Auto Hardcopy (AH) ••••••••.•..••••••••••••.•.
Auto Wraparound (AW) •••.•••••••••••••.••••••.
Key Repeat (KR) •••••••••••••.••..••••••••••••

iv

3-1
3-1
3-2
3-2
3-2
3-7
3-9
3-10
3-10
3-12
3-12
3-12
3-19
3-20
3-20
3-21
3-21
3-21
3-21
3-22
3-22
3-23
3-24
3-24
3-24
3-24
3-25
3-25
3-25
3-25
3-26
3-26
3-27
3-27
3-27
3-27
3-27
3-28

3.6.24
3.6.25
3.6.26
3.6.27
3.6.28
3.6.29
3.6.30
3.6.31
3.6.32
3.6.33
3.6.34
3.6.35
3.6.36
CHAPTER 4
4.1
4.2
4.2.1
4.2.2
4.2.3
4.2.4
4.3
4.4
4.4.1
4.4.1.1
4.4.1.2
4.4.1.3
4.4.1.4
4.4.1.5
4.4.1.6
4.4.1.7
4.4.1.8
4.4.1.9
4.4.1.10
4.4.1.11
4.4.1.12
4.4.2
4.4.3
4.4.4
4.4.4.1
4.4.4.2
CHAPTER 5
5.1
5.2
5.2.1
5.2.1.1
5.2.1.2
5.2.1.3
5.2.1.4
5.2.1.5

.. . ..... . . ....... ............. . .

Keyclick (KC)
Margin Bell (MB)
Terminal Mode (TM)
Keypad Mode (KP) ••••••
Cursor Key Mode (CK)
Programmed Keypad Mode (PK)
Tablet Locator Mode (TL)
United Kingdom Character Set (UK)
Communications Interface (CI)
Hardcopy Speed (HS)
Power Frequency (PF)
Interlace (IL) •••••
Self-Test (ST)

. . . ........ . . . ..
. . . . . .. . . . . .

3-28
3-28
3-28
3-28
3-28
3-29
3-29
3-29
3-29
3-29
3-30
3-30
3-30

PROGRAMMING SUMMARY
Introduction ••••••••••
Keyboard Codes
Standard Key Codes
Cursor Control Key Codes
Auxiliary Keypad Codes
Control Characters ••••••••••
Character Sets ••••••••••••••••••
Control Functions •••••••••••••••
ANSI Control Functions Summary
Cursor Movement Commands
Character Attributes
Erasing Commands •••••
Programmable LEDs
Select Character Sets (SCS) •••••
Enter Graphics Mode
Modes
•••••
Reports
••••••••••

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . .
.. . . . . . . . . . . . . . . . . . . . . . . . . .
.. . . . . . . . . . . . .. . .. .. .
. .. . . . .. . .

Re set

•••••••••••••••••••••

• ••••
• ••••

Print Commands
•••••••••••
Confidence Tests •••••••••••
• ••••••••••
Device Control Strings
••••••••
VT52 Control Functions Summary ••••••
ReGIS Summary •••••••••••
Basic Summary ••••••••••••••••••••••••••••••••

Commands/Statements
•••••••••••••••••••
Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4-1
4-1
4-1
4-1
4-3
4-4
4-6
4-8
4-9
4-9
4-10
4-10
4-10
4-11
4-11
4-11
4-12
4-12
4-12
4-12
4-13
4-13
4-13
4-19
4-19
4-19

THEORY OF OPERATION

.. . . . . . . . . .. .. . . . .. . . . .. . . .....
....... .. . . . . .....
. . . ... . ..... . ....
......
. . . .. . .
· . . . . . . .. .....
..... · . . .. . .
· ...... ... .. . . . . . . . . . .

Introduction
Terminal Controller Module
Central Processing Unit (CPU)
Address
ROMs
RAMs
Data Bus
Control Functions

v

5-1
5-2
5-2
5-7
5-10
5-10
5-12
5-12

5.2.1.6
5.2.1.7
5.2.1.8
5.2.2
5.2.2.1
5.2.2.2
5.2.2.3
5.2.2.4
5.2.2.5
5.2.2.6
5.2.2.7
5.2.3
5.2.3.1
5.2.3.2
5.2.3.3
5.2.3.4
5.2.3.5
5.2.4
5.2.5
CHAPTER 6
6.1
6.1.1
6.1. 2
6.1. 3
6.1. 4
6.1.4.1
6.1.4.2
6.2
6.2.1
6.2.2
6.2.3
6.2.4
6.2.5
6.2.6
6.2.7
6.2.8
6.3
6.3.1
6.3.2
6.3.3
6.3.4
6.3.5
6.4
6.5
6.6
6.7
6.7.1
6.7.2
6.7.3
6.7.4
6.7.5
6.7.6

Memory Refresh Cycle •••••••••••••••••••••
Interrupts ............................................. ..
CRT Sweep Overview •••••••••••••••••••••••
Vector Generation Overview •••••••••••••••••••
Addressing the Screen RAM ••••••••••••••••
Modification of Data in the Screen RAM •••
Refresh the CRT ••••••••••••••••••••••••••
Modify Screen ROM and CRT Refresh Timing •
Generation of Vectors ••••••••••••••••••••
Writing a Character on the Screen ••••••••
Arbitrary Vectors ••••••••••••••••••••••••
I/O Port Overview ••••••.•••••••••••••••••••••
Communication Interface (8251A)
Baud Rate Generator ••••••••••••••••••••••
Selection of I/O Port ••••••••••••••.•••••
Transferring Data Through the I/O Port •••
Hardcopy Overview ••••••••••••••••••••••••

5-16
5-16
5-17
5-18
5-22
5-26
5-29
5-31
5-33
5-35
5-37
5-42
5-43
5-51
5-52
5-52
5-58
Keyboard ........................................................................ .. 5-65
Power Supply ••••••••••••••••••••••••••••••••• 5-68

TESTING AND TROUBLESHOOTING
Introduction ........................................................................ ..
Automatic Tests (PUPTST) •••••••••••••••••••••
Escape Sequences (CSITST) ••••••••••••••••••••
SET-UP Mode (SETST) ••••••••••••••••••••••••••
Error Reporting .......................................................... ..
Fatal Errors (TST ERROR) •••••••••••••••••
Non-Fatal Errors •••.•••••••••••••••••••••
Power-Up Self-Test .....•.................•......•
8085 CPU Test (CPUTST) •••••••••••••••••••••••
Visual and Audible Indicators ••••••••••••••••
ROM Test (ROM Test) ••••••••••••••••••••••••••
Program RAM Test (RAMTST) ••••••••••••••••••••
Video Bit Map RAM Test (VBMTST) ••••.•••••••••
Vector Generator Test (VGNTST) •••••••••••••••
CRT Controller Test (CRTST) ••••••••••••••••••
CRT Timing

.................................................................... ..

Diagnostic Tests •.•••••••••••••••••••••••••••••••
External Communications Test •••••••••••••••••
Hardcopy Communications Test •••••••••••••••••
Di splay Test ................................................................ ..
Color Bar Test ............................................................ ..
Screen Alignment Pattern •••••••••••••••••••••
Error Codes .......................................................................... ..

Troubleshooting .................................................................. ..
Adj ustments .................................................... .

Removal and Replacement •••.••••••••••••••••••••••
Top Cover Removal ••••••••••••••••••••••••••••
Keyboard Assembly Removal •••••.••••••••••••••
Power Supply Assembly Removal ••••••••••••••••
Power Supply Regulator Board Removal •••••••••
Power Supply Fan Assembly Removal ••••••••••••
Terminal Logic Board Removal •••••••••••••••••
vi

6-1
6-1
6-1
6-2
6-2
6-2
6-3
6-3
6-4
6-4
6-4
6-5
6-5
6-6
6-8
6-8
6-8
6-8
6-9
6-10
6-10
6-11
6-11
6-16
6-24
6-24
6-25
6-26
6-27
6-28
6-29
6-30

APPENDIX A

VK100 TERMINAL SPECIFICATIONS

APPENDIX B

CALCULATION

FIGURES
1-1
1-2
1-3
2-1
2-2
2-3
2-4
2-5
2-6
2-7
2-8
2-9
2-10
2-11
2-12
3-1
3-2
3-3
3-4
3-5
3-6
4-1
4-2
5-1
5-2
5-3
5-4
5-5
5-6
5-7
5-8
5-9
5-10
5-11
5-12
5-13
5-14
5-15
5-16
5-17
5-18
5-19
5-20
5-21
5-22
5-23

Text Mode Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Graphics Mode Operation •••••••••••••••••••••••.•
BASIC Mode Operation •••••••••••••••.•••••••••••.
VK100 (GIGI) Terminal Dimensions ••••••••••••••••
VK100 (GIGI) Terminal Shipping Container ••..••.•
VK100 (GIGI) Terminal Switch and Cable
Locations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Default SET-UP Switch Pack Location •••••••••••••
Default SET-UP Switch Pack Setting ••.•.•..••••••
EIA Communications Cable Connector ••••••••••••••
BARCO Model GD33 Monitor Connections .•.••••••.••
Mu1titerminal String with Terminal Turned Off •••
Single VK100 (GIGI) Terminal to LA34VA
Graphics Printer Selection ••••••.••.•.••.•••••••
LA34VA Graphics Printer (Rear View) •.•.•••••.•..
Adding a Terminal to a Multiterminal String ••.••
Removing a Terminal from a Multiterminal String •
Terminal Controls •.•••••••..•••.••••••••••••.•..
Standa rd Keys

••••.••••.•••••••••••••••••••••••.•

Special Function Keys .••.••.•..•••••••••••.•••••
SET-UP Mode Keys ••••••••••••••••••••••••••••••••
Loea to r Keys ••••••••••••••••••••••••••••••••••••

Keyboard Indicators . . . . . . • . . . . . . . . . . . . . . . . . . . . . .
Keyboard-Generated ASCII Codes ••••••.•.•.••••.••
Keyboard-Generated Control Codes ••••••••..••..•.
VK100 (GIGI) Block Diagram ..•.....•••••••••••.••
System Overview Block Diagram .••.••••..•.•••••••
CPU Functional Block Diagram •••••••.......••••..
Basic CPU Block Diagram ••••••.••••.•••••.•••.•••
Instruction Cycle to Store Accumulator Direct •..
Opcode Fetch Machine Cycle •..•.•.......••••.••••
CPU to RAM Memory Block Diagram ••.•••••••..•••.•
8202 Block Diagram and Pin Description •.•....•••
DATA BUS

•••••••••••••

il

••••••••••••••••••••••••••

Interrupt Block Diagram •.•...••.••.••••.••.•.•..
Vector Generator Block Diagram ••••••.•...••.••••
System Timing . . . . . . . . '. . . . . . . . . . . . . . . . . . . . . . . . . . .
Basic Overview of Address and Data Path •••••••••
Screen Update Screen RAM Address Breakdown .•••••
Modify Data, Screen RAM Address Breakdown ••••.•.
Addressing the Screen RAM •••••••.•.•.••••••••..•
Translation of X Bits ..•..••.•.......•••.•.•••..
Modify Data Bi t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Color Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Screen RAM Data Timing ••••.•.•..••.•.•••••••....
Time State Generator •••......••.••••••••••••••..
Basic Vectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Arbitrary Vector Timing

vii

1-2
1-3
1-4
2-1
2-3
2-4
2-5
2-6
2-9
2-12
2-14

2-15
2-15
2-16
2-18
3-1
3-3
3-4
3-7
3-9
3-11
4-2
4-4
5-1
5-3
5-4
5-5
5-6
5-7
5-11
5-13
5-14
5-16
5-20
5-21
5-23
5-23
5-24
5-25
5-27
5-28
5-30
5-32
5-32
5-32
5-38

5-24
5-25
5-26
5-27
5-28
5-29
5-30
5-31
5-32
5-33
5-34
5-35
5-36
5-37
5-38
5-39
5-40
5-41
5-42
5-43
5-44
5-45
6-1
6-2
6-3
6-4
6-5
6-6
6-7
6-8
B-1

Carry Control . . . . . . . . . . . . . . . . . . . . . . . . . . • . . . . . . . .
Direction Control •••••••••••••••••••••••••••••••
Basic I/O Port Block Diagram ••••••••••••••••••••
8251-A Block Diagram •••••••••••••••.••••••••••••
Mode Register

•••••••••••••••••••••••••••••••••••

Transmit/Receive Format Asychronous Mode ••••••••
Command Instruction Format ••••••••••••••••••••••
Status Register •••••••••••••••••••••••••••••••••
Baud Rate Generator •••••••••••••••••••••••••••••
Port Selection Block Diagram •••••••••••••••.••••
20 rnA Transmit Loop .•.•.•••••••••••..•••....•.••
20 rnA Receive Loop ••••••••••••••••••••••••••••••
EIA Transmit . . . . . . . . . . . . . . . . • . . . . . . . . . . . . . • . . . . .
EIA Receive . • . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . • .
Line Printer Connected to Single Terminal .••••••
Printer Connection to Multiple Terminals
and Connector Names •••.•.••••••.••••••••....••..
Logic for Hardcopy Bus Control ••••••••••••••••••
Hardcopy Data Transfer •••••••••••••.••••••••••••
Keyboard Matrix •••••••••••••••••••••••••••••••••
Keyboard Read with "A" Switch Pressed •••••••••••
LED (Indicator) Keyclicks and Bleeper Block
Diagram . . . . . . . . • . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Supply Schematic ••••••••••••••••••••••••••
Vector Generator Test Sequence ••••••••••••••••••
Module Removal Sequence ••••••••••••••••••••.••••
VK100 Terminal (Bottom View) ••••••••••••••••••••
Keyboard Assembly Removal •••••••••••.•••••••••••
VK100 Terminal (Rear View) ••••..•••••••..••.••••
Power Supply Assembly Removal •••••••••••••••••••
Power Supply Fan Assembly Removal •••••••••••••••
Terminal Logic Board Removal ••••••••••••••••••••
Calculations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

viii

5-39
5-41
5-42
5-44
5-44
5-45
5-47
5-47
5-51
5-53
5-55
5-55
5-56
5-57
5-59
5-60
5-61
5-64
5-66
5-67
5-68
5-70
6-1
6-24
6-25
6-26
6-27
6-27
6-29
6-30
B-1

TABLES
1-1
1-2
2-1
2-2
2-3
2-4
2-5
2-6
2-7
2-8
2-9
3-1
4-1
4-2
4-3
4-4
4-5
5-1
5-2
5-3
5-4
5-5
5-6
5-7
5-8
5-9
5-10
5-11
6-1
6-2

6-3
6-4
6-5
6-6
6-7
6-8

VK100 Cables and Connectors •••••••••••••••••••••
Related DIGITAL Documentation •••••••••••••••••••
EIA Connector Signals •••••••••••••••••••••••••••
EIA Interface Cables ••••••••••••••••••••••••••••
20 rnA Current Loop Specifications •••••••••••••••
20 rnA Interface Cables ••••••••••••••••••••••••••
Terminal Receive Speed Limits •••••••••••••••••••
Fill Character Requirements •••••••••••••••••••••
Video Interface Cables ••••••••••••••••••••••••••
Hardcopy Interface Pin Assignments ••••••••••••••
Hardcopy Interface Cables •••••••••••••••••••••••
SET-UP Parameter Summary ••••••••••••••••••••••••
Cursor Control Key Codes ••••••••••••••••••••••••
Auxiliary Keypad Numeric Key Codes ••••••••••••••
Auxiliary Keypad PF Key Codes •••••••••••••••••••
Terminal-Supported Control Character Function •••
Select Character Set Sequence •••••••••••••••••••
Machine Cycle Status and Control ••••••••••••••••
8202 Pin Description ••••••••••••••••••••••••••••
I/O Register Addresses ••••••••••••••••••••••••••
Program RAM Addresses •••••••••••••••••••••••••••
I/O RAM Microcode Address •••••••••••••••••••••••
Interrupt Priority, Restart Address, and
Sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Screen RAM Write'Control ••••••••••••••••••••••••
Addressing the 8251A ••••••••••••••••••••••••••••
Baud Rate Selection •••••••••••••••••••••••••••••
I/O Port Selection ••••••••••••••••••••••••••••••
Interface Specifications ••••••••••••••••••••••••
Possible Error Codes ••••••••••••••••••••••••••••
Possible Fatal Error Codes ••••••••••••••••••••••
Possible Nonfatal Error Codes •••••••••••••••••••
Fatal Error Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . • .
Nonfatal Error Codes ••••••••••••••••••••••••••••
VK100 Troubleshooting •••••••••••••••••••••••••••
On-Site Recommended Spares ••••••••••••••••••••••
DIGITAL Servicenter Recommended Spares •• ~ •••••••

ix

1-6
1-8
2-20
2-22
2-22
2-23
2-25
2-25
2-29
2-29
2-31
3-14
4-2
4-3
4-3
4-5
4-6
5-5
5-8
5-14
5-15
5-15
5-17
5-29
5-50
5-52
5-53
5-56
6-2
6-12

6-13
6-16
6-17
6-18
6-22
6-23

CHAPTER 1
INTRODUCTION

1.1
INTRODUCTION
The VK100 terminal is an interactive graphics terminal designed
for use with a user supplied monitor. The terminal can operate in
either an on-line or off-line mode and can execute programs
written in GIGI BASIC.
This chapter prov ides a general overview of the VK100 terminal.
The followi ng chapter s desc r i be and summa r i ze i nsta lla t i on,
operation, programming character istics, theory of operation, and
maintenance procedures for the VK100 terminal.
1.2
GENERAL DESCRIPTION
The VK100 or GIGI (General Imaging Generator and Interpreter) is
designed as a terminal subsystem that connects to a host computer.
The VK100 provides local (in terminal) processing using a
microprocessor. The microprocessor supports two interpreters; a
ReGIS
graphics
interpreter
and
the GIGI
BASIC
language
interpreter. ReGIS (Remote Graphics Instruction Set) is a graphics
language; GIGI BASIC is a BASIC language that uses VK100 unique
graphics capabilities.
The VK100 is a separate keyboard which requires a user-supplied
monitor for displaying screen images. Either black and white or
color (RGB) moni tors can be used. Also, the VK100 can display
images on an optional LA34VA Graphics Printer which attaches
directly to the terminal.
The VK100 can be used as a text terminal and as a graphics
terminal. The VK100 terminal's basic mode of operation is as a
text terminal. In this mode the terminal acts as a translator
between the operator and the host computer. When the operator
types a message or command on the keyboard, the terminal sends it
immediately to the host computer. The host computer receives the
message or command and executes it. Then the host computer sends
an acknowledgement to the terminal, indicating the message or
command was received and executed. The terminal receives the
acknowledgement and displays it on the monitor screen. Figure 1-1
shows a simple diagram of the VK100 terminal operating in text
mode.

1-1

USER SUPPLIED
MONITOR

BLACK & WHITE
OR
COLOR VIDEO OUTPUT

/'

~~
I

TERMINAL
PROCESSOR

--

RECEIVER

HOST
COMPUTER

TRANSMITTER
COMMUNI CATIONS
LINE (20 rnA OR EIA)

GIGI TERMINAL

MA·6768

Figure 1-1 Text Mode Operation

The VKHH3
reset.

terminal

always

enters

text

mode

when

powered

on

or

The VK100
(GIGI) terminal's primary operating mode is as a
graphics terminal. The name GIGI derives from this capability as a
General Imaging Generator and Interpreter.
Generally, the host computer places the terminal in graphics mode.
In this mode the terminal interprets all data received from the
host computer or the terminal keyboard as graphics commands and
data. The interpreter and image generator translates the commands
and data into the images displayed on the monitor screen. Figure
1-2 shows a simple diagram of the VKHJ0 terminal operating in
graphics mode.
The commands to the interpreter come from a new graphics command
set called ReGIS (Remote Graphics Instruction Set). ReGIS command
set consists of a few simple instructions and options.
Within the graphics mode is a locator mode. This mode helps the
operator locate a point on the screen and report that point to the
host computer. The VK100 terminal enters locator mode through the
keyboard or a command from the host computer. When the terminal
enters locator mode, a large cross-hair cursor appears ont he
screen. The point where the two lines cross is the point reported
to the host computer.

1-2

USER SUPPLI ED
MONITOR

BLACK & WHITE
OR
,COLOR VIDEO OUTPUT

~
I

r--

GRAPHIC
INTERPRETER
& GENERATOR

I---

RECEIVER

r-

TRANSMITTER

HOST
COMPUTER
COMMUN ICATIONS
LINE (20 rnA OR EIA)

GIGI TERMINAL

Figure 1-2 Graphics Mode Operation

The operator can return the terminal to the text mode at any time.
When in text mode, the terminal interprets all graphics data and
commands as text characters only and not as graphics.
The VKHJI2J terminal also contains a BASIC language interpreter.
This interpreter allows the terminal to run BASIC language
programs. The terminal enters BASIC mode through the SET-UP mode
(described in Chapter 3) or a command from the host computer.
The BASIC program comes from one of two places, the keyboard or
the host computer. The operator selects the program source with a
SET-UP parameter. If the keyboard is the program source, the
operator types the BASIC program directly into the terminal
memory. When the program runs, the output normally goes to the
monitor screen. If the host computer is the program source, the
program loads into the terminal memory from the host computer.
When the program runs, the output normally returns to the host
computer. Figure 1-3 shows a simple diagram of the VKII2JI2J terminal
operating in both cases.
When the terminal enters the BASIC mode, the BASIC indicator above
the keyboard lights. The operator can return the terminal to text
mode at any time, either through the keyboard or the SET-UP mode.
When the terminal is in text mode, it interprets all data as text
only and not as BASIC language commands.

1-3

USER SUPPLIED
MONITOR

BLACK & WHITE
OR
COLOR VIDEO OUTPUT

/- -

I

BASIC
INTERPRETER
& MEMORY

RECEIVER

HOST
COMPUTER

TRANSMITTER
COMMUNI CATIONS
LINES
(20 mA OR EIA)

GIGI TERMINAL

KEYBOARD AS THE BASIC PROGRAM SOURCE

USER SUPPLIED
MONITOR

BASIC
INTERPRETER
& MEMORY

RECEIVER
TRANSMITTER

I-i----; 1----1

HOST
COMPUTER

COMMUNICATIONS
TERMINAL
LINES
L-_ _ _ _ _ _ _ _ _GIGI
__
_ _ _ _ _ _ _ _ _....J (20
mA OR EIA)
HOST COMPUTER AS THE BASIC PROGRAM SOURCE
MA-6769

Figure 1-3 BASIC Mode Operation

1-4

The VK100 terminal hardware is contained in a light weight plastic
case. The terminal contains three major assemblies; the keyboard,
the processor board, and the power supply, a color or monochrome
(black and white) monitor is supplied by the customer.
1.3
ACCESSORIES AND SUPPLIES
DIGITAL offers the following accessories
VKl00 terminal.

and

supplies

for

the

1.3.1
VK100 (GIGI) Carrying Cases (VK10K-CA)
These cases are specially designed to hold the VK100 terminal and
all associated cables. They are constructed of high-density,
charcoal brown, textured plastic and include two chrome-plated
latches with locks.
1.3.2
VKl00 Keyboard Overlays
Two types of overlays are available with the VK100 terminal:
preprinted keypad and keypad overlays. These overlays are
easy-to-install, plastic key covers representing the VK100
terminal's special function keys or user-defined character sets.
Keypad overlays cover VK100's auxiliary keypad and are used with
the following software packages.
CAl Primer (VK10K-AA)
Graphics Editor (VK10K-AB)
ReGIS Illustrated Text Editor (VKI0K-AC)
Character Set Editor (VK10K-AD)
Keyboard overlays cover the VKl00 terminal's entire keyboard,
including the auxiliary keypad, and include the following.
Prepr inted APL character set overlays (VK10K-BB) Blank, full
keyboard overlays for user-defined character sets (VKI0K-BA)
1.3.3
VKl00 Cables and Connectors
Table 1-1 describes the cables and connectors used by the VK100
terminal.
In the future, additional options will be available.
nearest DIGITAL Sales Office for further information.

1-5

Contact the

Table 1-1 VK100 Cables and Connectors
Cable

Description

BC26M-05

RGB cable with BNC connectors for user-supplied
monitor

BC26B-01

Y-cable for daisy-chaining the LA34VA graphics
printer to multiple VK100 terminals

PIN 7015503-00

20 rnA loopback connector

PIN 1215336-00

EIA loopback connector

BC22B-25

EIA extension to second VK100 terminal from
Y-cable (BC26B-01)

BC05F-15
or
BC05F-50,A0

20 rnA cable with Mate-N-Lok connectors for
connecting VK100 terminal (with 20 rnA option)
directly, to a line unit

BC22A-10
or
BC22A-25

EIA null modem; connects VK100 terminal
directly to a line unit (6 conductor
cable)

BC22B-10
or
BC22B-25

EIA extension to modem (14 conductor cable)

RELATED DOCUMENTATION
Table 1-2 lists the related documentation that is available from
DIGITAL's Accessory and Supplies Group. For specific ordering
information, see the end of this chapter.
1.4
ORDERING ACCESSORIES AND SUPPLIES
You can order accessories and supplies (including documentation)
either by mail or phone.
1.4.1
Toll-Free Telephone Orders
Call DIGITAL Direct Catalog Sales from 8:30 a.m.
one of the following numbers.
Continental United States
1-800-258-1710
New Hampshire, Alaska, and Hawaii
1-603-884-6660

1-6

to 5:00 p.m. at

/'

Canada
1-81313-267-6146
Northern California
1-4138-984-1321313
Chicago
1-312-6413-5612
Outside North America
contact your local A & SG business
DIGITAL sales office.

representative or

local

The following information applies to all telephone orders.
Minimum order is $35 unless charged to Master Card, Visa, or
American Express.
Maximum order is $5,131313.
Phone orders are accepted at current list price only.
Phone orders are
conditions only.

accepted

1.4.2
Direct Mail Orders
Mail all purchase orders
addresses.

per

directly

DIGITAL

to

one

standard

of

the

terms

and

following

For U.S. Customers
Digital Equipment Corporation
ATT: A&SG
P.O. Box CS213138
Nashua, New Hampshire 1331361
For International Customers
Digital Equipment Customers
A&SG Business Manager
c/o DIGITAL's local subsidiary
The following information applies to all direct mail orders.
Minimum order is $35 unless paid by check, money order, or
credit card (Visa, Master Card, or American Express accepted).
No maximum order value.

1-7

Table 1-2 Related DIGITAL Documentation
Title

Document No.

Description

GIGI Terminal
Installation and
Owner's Manual

EK-VK100-IN

This manual describes the
VKl00 (GIGI) terminal. It
provides information on
installing the terminal and
connecting the optional
peripheral devices,
performing terminal SET-UP,
proper terminal operating
specifications, and repair
procedures. It also
provides full
specifications for all
terminal outputs. A copy of
this manual is shipped with
each VK100 terminal.

GIGI Programming
Reference Card

EK-0GIGI-RC

This pocket size reference
card summarizes the
programmable features of
the VKl00 (GIGI) terminal.
It includes a summary of
both the ReGIS and BASIC
command sets. A copy is
shipped with each VK100
terminal.

GIGI Terminal
SET-UP Reference
Card

EK-VK100-RC

This pocket size reference
card summarizes the VK100
(GIGI) terminal SET-UP
parameters. The card also
contains the default SET-UP
switch pack settings. A
copy is shipped with each
terminal.

VK100 Pocket
Service Guide

EK-VK100-PS

This manual is a
module-level repair manual.
It provides troubleshooting
information, testing
information, and removal
and replacement information
for the VK100 terminal.

1-8

Table 1-2 Related DIGITAL Documentation (Cont)
Title

Document No.

Description

VK100 Technical
Manual

EK-VK100-TM

This manual provides a
detailed block-diagramlevel discussion of the
VK100 terminal. It also
provides information on
troubleshooting the
terminal. The manual does
not contain a set of
schematic drawings. These
drawings are a part of the
VK100 print set, which must
be ordered separately.

VK100 Illustrated
Parts Breakdown
(I PB)

EK-VK100-IP

This manual provides a
detailed parts breakdown of
the terminal. It does not
provide part numbers for
printed circuit board
components. That
information is contained in
the VK100 print set, which
must be ordered separately.

VK100 Print Set

MP-00893-00

This document provides a
complete set of electrical
and mechanical schematic
diagrams for the VK100
terminal.

GIGI/ReGIS
Handbook

AA-K336A-TK

This book provides user
information to program the
VK100 (GIGI) terminal,
including system-dependent
information. It provides
comprehensive descriptions
of ReGIS commands,
organized alphabetically
for easy reference.
Extensive examples of the
VK100 graphics
capabilities are used
throughout. A copy of this
book is shipped with each
VK100 terminal.

1-9

Table 1-2 Related DIGITAL Documentation (Cont)
Title

Document No.

Description

GIGI BASIC
Manual

AA-K335A-TK

This is a BASIC language
manual for the VK100
terminal. It provides
comprehensive descriptions
of the GIGI BASIC commands
and functions, organized
alphabetically for easy
reference. A copy of this
manual is shipped with each
VK100 terminal.

GIGI Graphics
Editor Manual

AA-J942A-TK

This manual describes the
Graphics Editor software
package within the entire
VK100 package. The manual
also includes descriptions
of each Graphics Editor
command. A copy of this
manual is shipped with the
GIGI Graphics Editor
software package.

GIGI Data Plotting
Package Manual

AA-J956A-TK

This manual describes the
GIGI Data Plotting software
package: the functional
modes, the steps to create
a table, defining and
displaying plots from that
table, and performing
statistical analysis. It
also describes each of the
plot commands and file
structures for the table
data and statistical
results. A copy of this
manual is shipped with the
GIGI Data Plotting software
package.

GIGI Slide
Projector Manual

AA-J943A-TK

This manual describes the
GIGI Slide Projector
software package. It
describes the file formats
and the use of the
automatic and manual modes.
It also describes each
command and provides syntax
and usage information. A

1-10

Table 1-2 Related DIGITAL Documentation (Cont)
Title

Document No.

Description
copy of this manual is
shipped with the GIGI Slide
Projector software package.

GIGI Character Set
Editor User Guide

AA-K337A-TK

This manual describes the
GIGI Character Set Editor.
It describes each command
and provides syntax and
usage information. A copy
of this manual is shipped
with the GIGI Character Set
Editor software package.

GIGI ReGIS
Illustrated
Technical
Manual

AA-J944A-TK

This manual describes the
GIGI ReGIS Illustrated
Technical Manual software
package. It describes the
ReGIS Illustrated Technical
Manual its editing and
graphics capabilities, and
the use of picture files.
It also describes the
keypad commands. A copy of
this manual is shipped with
the GIGI ReGIS Illustrated
Technical Manual software
package.

GIGI/ReGIS CAl
Primers Student
Guide

SDC AA-K329A-TE

This manual is used with
any of the GIGI/ReGIS CAl
Primers. It provides an
overall introduction to the
primers, including their
objectives and recommended
course of study. It also
tells new users how to
start the course.

VAX/VMS GIGI/ReGIS
CAl Primers

SDC BE-K39lA-BC
(TU58)
SDC AS-K327A-BE
(Floppy)

This computer-assisted
instruction (CAl) course
runs on VAX/VMS. It helps
new VK100 users to begin
using the terminal and
ReGIS.

1-11

Table 1-2 Related DIGITAL Documentation (Cont)
Title

Document No.

Description

VAX/VMS GIGI/ReGIS SDC AA-K328A-TE
CAl Primers Course
Administrator Guide

This manual provides an
overview of the course
administrator's role and
describes how to install
and maintain the CAl
software on VAX/VMS.

RSTS/E GIGI/ReGIS
CAl Primers

This computer-assisted
instruction (CAl) course
runs on RSTS/E. It helps
new VK100 users to begin
using the terminal and
ReGIS.

SDC BC-K346A-BC
(RL02)
SDC AP-K392A-BC
(Magtape
9-track 800
bits/in)
SDC BB-K393A-BC
(Magtape 9-track
1600 bits/in)

RSTS/E GIGI/ReGIS
CAl Primers Course
Administrator
Guide

SDC AA-K347A-TC

1-12

This manual provides an
overview of the course
administrator's role and
describes how to install
and maintain the CAl
software on RSTS/E.

CHAPTER 2
INSTALLATION

2.1
INTRODUCTION
This chapter contains the following information.
Site considerations
Unpacking and inspection
Repacking
Installation
Interface information
Included in the interface information are special programming
considerations to observe for effective use of the interface.
2.2
SITE CONSIDERATIONS
The VK100 terminal is a lightweight, single-piece unit that fits
on a desk or tabletop. Figure 2-1 shows the dimensions of the
terminal.

MA·6726

Figure 2-1 VK100 (GIGI) Terminal Dimensions

2-1

The VKl00 terminal usually connects to a user-supplied monitor
(display) device. The monitor always operates with the terminal
and should be located close to the terminal. Be sure to consider
the monitor's size and weight when planning the terminal's
location.
The VK100 terminal places few limits on the operating environment.
Avoid areas that have extremes in temperature and humidity or are
subject to high levels of industrial contaminates. Appendix A
describes the guaranteed operating conditions and terminal
specifications.
A small fan in the VKl00 terminal cools the terminal's electronic
components. Keep all ventilation slots and an area of about six
inches around the terminal clear. Do not place papers or similar
materials on top of or under the terminal.
The terminal controls and cable connections are on the rear of the
terminal. When installing the terminal, allow an adequate area to
access the rear of the terminal.
NOTE
When installing the terminal, keep all
power and signal cables free
from
obstructions, sharp bends, and stress.
2.3
UNPACKING AND INSPECTION
The VK100 terminal is packed in a reinforced shipping carton. The
carton contains the following items.
VK100 terminal
VK100 terminal power cord
VK100 terminal video cable
GIGI Terminal Installation and Owner's Manual
GIGI/ReGIS Handbook
GIGI BASIC Manual
GIGI Terminal SET-UP Reference Card
GIGI Programming Reference Card
GIGI Installation Card
Figure 2-2 shows the packag ing used wi th the VKl00 terminal. Use
the following procedure to unpack the terminal from the shipping
carton.

2-2

MA·6723

Figure 2-2 VKl00

(GIGI) Terminal Shipping Container

1.

Carefully cut the shipping tape and open the shipping
carton by pulling out the front flap and lifting the top
of carton.

2.

Remove the power cord, video
from the packing material.

3.

Lift out the top piece of packing material and remove the
terminal from the shipping carton. Save the packing
material and shipping carton. They are needed to ship the
terminal back to the repair center if the terminal ever
fails.

4.

Visually inspect the terminal for physical damage. If the
terminal is damaged, notify your local DIGITAL Sales
Office.

5.

Install the terminal as
section of this chapter.

2-3

cable,

described

in

and

the

documentation

Installation

2.4
REPACKING
Use the following procedure when repacking the VK100 terminal for
shipment. Figure 2-3 shows all of the switch and cable locations.
1.

Turn the ac power switch off.

2.

Disconnect all cables from the rear of the terminal.

3.

Locate the original packing material. If the original
materials are not available, they can be ordered from
DIGITAL. Refer to Chapter 1 for ordering information.

4.

Repack the terminal in the shipping carton (Figure 2-2).
Include the power cord and video cable in the shipping
carton.

5.

Seal the shipping carton with reinforced tape.

AC FUSE

MONOCHROME
(BLACK & WHITE)
VIDEO OUTPUT
CONNECTOR

HARDCOPY
RED, GREEN
AND BLUE
CONNECTOR
VIDEO OUTPUT
CONNECTORS

EIA
CONNECTOR

AC POWER
SWITCH

20 rnA
CONNECTOR

AC POWER
RECEPTACLE

Figure 2-3 VK100 (GIGI) Terminal Switch and Cable Locations

2-4

2.5
INSTALLATION
The VK100 terminal is very easy to install. The only tool required
is a flat blade screwdriver. Use the following procedure to
install the terminal.
1.

Remove the terminal from the shipping carton or optional
carrying case and place in the desired work area.

2.

Locate the access opening on the rear of the terminal
(Figure 2-4). The eight-posi tion defaul t SET-UP swi tch
pack will be visible in the opening.

MA-6718

Figure 2-4 Default SET-UP Switch Pack Location

2-5

3.

Note the switch positions and determine if the switch
settings are correct for the host computer system. Figure
2-5 shows all the switch settings and what they mean to
the host computer. Chapter 3 provides more detailed
information on the SET-UP parameters.

SET-UP FEATURE DEFAULT SETTINGS FOR BOTH TRANSMIT AND RECEIVE
SPEEDS (TS AND RS) CONT.
(SWITCHES 6, 7, & B)

TRANSMIT AND RECEIVE SPEED
FEATURES DEFAULT SET FOR
600 (RS2 AND TS2)

TRANSMIT AND RECEIVE SPEED
FEATURES DEFAULT SET FOR
1200 (RS3 AND TS3)

TRANSMIT AND RECEIVE SPEED
FEATURES DEFAULT SET FOR
4BOO (RSS AND TS5)

TRANSMIT AND RECEIVE SPEED
FEATURES DEFAULT SET FOR
2400 (RS4 AND TS4)

TRANSMIT AND RECEIVE SPEED
FEATURES DEFAULT SET FOR
19,200 (RS7 AND TS7)

TRANSMIT AND RECEIVE SPEED
FEATURES DEFAULT SET FOR
9600 (RS6 AND TS6)

MA-6722

Figure 2-5 Default SET-UP Switch Pack
Settings (Sheet 1 of 3)

2-6

SET-UP FEATURE DEFAULT SETTINGS FOR PARITY ENABLE (PE)
(SWITCHES 4 & 5)

PARITY ENABLE FEATURE
DEFAULT SET FOR OFF (PEO)

PARITY ENABLE FEATURE
DEFAULT SET FOR EVEN (PEl)

PARITY ENABLE FEATURE
DEFAULT SET FOR ODD (PE2)
SET-UP FEATURE DEFAULT SETTINGS FOR BOTH TRANSMIT AND RECEIVE
SPEEDS (TS AND RS)
(SWITCHES 6, 7, & B)

TRANSMIT AND RECEIVE SPEED
FEATURES DEFAULT SET FOR
110 (RSO AND TSO)

TRANSMIT AND RECEIVE SPEED
FEATURES DEFAULT SET FOR
300 (RSl AND TS1)
MA·6721

Figure 2-5 Default SET-UP Switch Pack
Settings (Sheet 2 of 3)

2-7

SET-UP FEATURE DEFAULT SETTINGS FOR POWER FREQUENCY (PFI
(SWITCH 11

POWER FREQUENCY FEATURE
DEFAULT SET FOR 60 Hz
(PFOI

POWER FREQUENCY FEATURE
DEFAULT SET FOR 50Hz
(PFll

SET-UP FEATURE DEFAULT SETTINGS FOR COMMUNICATIONS INTERFACE (CII
(SWITCH 21

COMMUNICATIONS INTERFACE
FEATURE DEFAULT SET FOR
EIA (CIOI

COMMUNICATIONS INTERFACE
FEATURE DEFAULT SET FOR
20mA (Clll

SET-UP FEATURE DEFAULT SETTINGS FOR UK CHARACTER SET (UKI
(SWITCH 31

UK CHARACTER SET FEATURE
DEFAULT SET FOR US (UKOI

UK CHARACTER SET FEATURE
DEFAULT SET FOR UK (UKll
MA-6720

Figure 2-5 Default SET-UP Switch Pack
Settings (Sheet 3 of 3)

2-8

4.

If the default SET-UP switch pack settings are incorrect
for the host computer, carefully change the switch
settings with a pencil or a similar object. Once the
switches are set, verify the new settings. If the
settings are wrong, the terminal may not be able to
communicate with the host computer.

5.

Remove the user-supplied monitor from its shipping carton
and place
in the desired work area.
Perform the
installation instructions packed with the monitor.

6.

Connect the VKl00 terminal to the user-supplied monitor.
(The next section of this chapter provides specific
instructions for connecting to the Barco Model GD33
monitor.)

7.

Connect the communications cable to the appropriate
communications
connector.
If
you
select
EIA
communications, connect the ground wire to the terminal
communications connector. Figure 2-6 shows the cable
connector with the ground wire connected.

GREEN GROUND
WIRE

SCREW

MA·67~IO

Figure 2-6 EIA Communications Cable Connector

2-9

8.

Connect the VK100 terminal to the optional LA34VA
graphics printer. There are two methods for this. Section
2.5.3 provides detailed instructions.

9.

Connect the power cord to the power cord receptacle on
the rear of the terminal. Plug the other end of the power
cord into a nearby wall outlet.

10.

Turn the monitor power switch on. Allow the monitor one
or two minutes to warm up before performing the next
step.

11.

Turn the terminal power switch on.
The
terminal
automatically performs the power-up self-test. Once the
power-up self-test is successfully completed, the ON LINE
indicator above the keyboard lights and the cursor
appears in the upper left corner of the monitor screen.
If any other indications are present, the terminal
self-test may have found a fault in the terminal. Chapter
6 outlines the procedures to follow if this occurs.
NOTE
On some moni tors the cursor does not
appear immediately because of a monitor
condition called overscan. To eliminate
the overscan, set the HP or HM SET-UP
parameters. Chapter 3 describes these
parameters.

12.

Select the terminal SET-UP parameters. Chapter
3
describes the SET-UP parameters and how to select them.

13.

After selecting the SET-UP parameters, record their
settings and keep them with the terminal for future
reference.

14.

Fi 11 out the GIGI Installa ti on Ca rd and return it to
DIGITAL. Postage is prepaid if mailed within the United
States.

2-10

~

2.5.1
Connecting to the Barco Model GD33 Monitor
This section provides specific instructions for connecting the
VK100 terminal to the Barco Model GD33 monitor. This monitor is
not supplied by DIGITAL. The monitor must be purchased separately
from a local Barco distributor. Monitor operating instructions are
packaged with the monitor.
1.

Locate the VK100 video cable.
three connectors on each end.

2.

Connect the color-keyed red, green, and blue cable
connectors to the RED, GREEN, and BLUE output connectors
on the rear of the VKl00 terminal.

3.

Connect the color-keyed red, green, and blue cable
connectors to the RED, GREEN, and BLUE input connectors
on the rear of the Barco Model GD33 monitor (Figure 2-7).

4.

Locate the white switches on the rear of the monitor
above the input connectors.
Slide the white switches to
the 75 position. This switches in a 75-ohm cable
impedance and provides the best possible monitor display.

5.

Loca te the G/X swi tch on the rear 0 f the mon i to r. Sl ide
the G/X switch to the G position. This sets the monitor
synchronization for green signal sync.

6.

Connect the monitor power cord.

2-11

It is a single cable with

000
c

=

=

=

0
c::II

ACPOWER
CONNECTOR

000

NOT USED

BLUE INPUT
LOAD SWITCH

GREEN INPUT
LOAD SWITCH

RED INPUT
LOAD SWITCH

~

SYNC INPUT

CO.o

0

""T,"~

1-751 1-751 1-751 1-751
SYNC SOURCE
SELECT
SWITCH

~

_75

VID

®

@

®

G X

EXTERNAL SYNC
INPUTS
(NOT USED)

BLUE INPUTS

GREEN INPUTS

RED INPUTS

MA6770

Figure 2-7 Barco Model GD33 Monitor Connections

2-12

2.5.2
Connecting to a Typical Black and White Monitor
The VK100 terminal can connect to a black and white (monochrome)
moni tor. DIGITAL does not supply a black and whi te moni tor. Any
black and white monitor must be obtained from local suppliers.
Use
the
following
general
instructions
to
perform
the
interconnection. Specific operating instructions for the monitor
are packaged with the monitor.
1.

Locate the VK100 video cable.
three connectors on each end.

It is a single cable with

2.

Connect one of the three cable connectors to the MONO
output connector on the rear of the VK100 terminal. Note
the cable connector color key (red, green, or blue).

3.

Locate the video input connector on the black and white
moni tor. This connector should be a BNC-type connector.
If not, put a BNC adaptor on the connector.

4.

Connect the video cable to the video input connector on
the moni tor. Be sure to use the same color-keyed cable
connector that was used on the terminal end of the cable.

2.5.3
Connecting to the LA34VA Graphics Printer
The VK100 terminal connects to the LA34VA graphics printer in one
of two ways.
1.

The terminal connects directly to the printer.

2.

The terminal
string.

is

added

to

the

end

of

a

multiterminal

If the terminal connects directly to the printer, the printer is
dedicated to that terminal. This means the printer is always
available to the terminal.
In a multiterminal string, two or more VK100 terminals connect to
one printer. Each terminal contains a hardcopy protocol. This
protocol prevents problems when more than one terminal tries to
use the printer. To request using the printer, press the SHIFT and
PF1/HARDCOPY keys together. The terminal looks to see if the
printer is busy. If the printer is not busy the terminal
immediately sends its data to the printer.
If the printer is currently printing the terminal generates a
print request and waits until the printer is available. The print
request tells all other VK100 terminals that a terminal is waiting
to use the printer. When the printer completes the copy the
waiting terminal then sends its data to the printer.

2-13

When more than one terminal is waiting to use the printer an
internal sequence system takes effect. The sequence system
determines which terminal uses the printer next. The sequence
system continues in effect until all of the waiting terminals have
used the printer.
When using a multiterminal string, all terminals in the string
must be powered on. If any terminal in the string is turned off,
that terminal and all terminals after it in the string cannot use
the printer. Figure 2-8 shows this point. Terminal 3 is turned
off, so terminal 4 cannot use the printer. Disconnect any terminal
that is turned off in a multiterminal string from the string.
Paragraph 2.5.3.2 provides a disconnection procedure.
The following paragraphs provide the two procedures for connecting
the VKl00 terminal to the LA34VA graphics printer.

GIGI TERMINAL
#1

GIGI TERMINAL

#4. CANNOT
USE LA34VA

GIGI TERMINAL

GIGI TERMINAL
#J..POWER OFF

#2
MA-6725

Figure 2-8 Multiterminal String with Terminal Turned Off

2-14

2.5.3.1 Connecting Directly to the LA34VA Graphics Printer -- Use
the following procedure for connecting a single VK1~~ terminal to
the LA34VA graphics printer. Maximum cable length is S~ feet.
Figure 2-9 shows a simple block diagram of this configuration.
To perform the procedure use a flat blade screwdriver, a BC22A-xx
interface cable, and one 8-32 X 5/8 inch screw.
1.

Locate and connect the BC22A cable to the HARDCOPY
connector on the rear of the VKl~~ terminal. The
connector can only plug in one way. Connect the ground
wi re to the HARDCOPY connector. Figure 2-6 shows the
cable connector with the ground wire connected.

2.

Plug the other cable connector into the the EIA connector
on the rear of the LA34VA graphics printer. This
connector can only plug in one way (Figure 2-l~).

GIGI
TERMINAL

-,

r

BC22A-XX

L
EIA
CONNECTOR

.J HARDCOPY
CONNECTOR

LA34VA
GRAPHICS
PRINTER

MA-6719

Figure 2-9 Single

VK1~~

(GIGI) Terminal to LA34VA Graphics Printer

Connection

EIA
CONNECTOR

GROUND
POINT

ACPOWERCORD7
RECEPTACLE
PAPER LOW
JACK

Figure

2-1~

,ow,~
ON/OFF
SWITCH

MA-2633A

LA34VA Graphics Printer (Rear View)

2-15

3.

Push the 8-32 X 5/8 inch screw through the ring terminal
on the end of the ground wi re coming out of the cable
connector. Locate the grounding screw hole on the LA34VA
graphics printer (about 3 inches to the right of the EIA
connector). Attach the cable ground wire to the LA34VA
graphics printer grounding point.

4.

Perform the installation and SET-UP procedures outlined
in
the
DECwriter IV Graphics Printer User Guide
(EK-L34RO-UG) •

5.

Apply power to both terminals.

6.

To verify the LA34VA graphics printer connection, place
the screen alignment video pattern on the monitor screen.
Do this by pressing the following keys in order: SET-UP,
5, T, 4, and SET-UP again.

7.

Pr in t the sc reen al ignmen t v ideo pattern on the LA34VA
graphics printer. Do this by pressing the SHIFT and
PFI/HARDCOPY keys together.

2.5.3.2 Adding a Terminal to a Multitermimal String -- Use the
following procedure if one or more VK100 terminals are connected
to the LA34VA graphics printer. Figure 2-11 shows a simple diagram
of this configuration.

BC22B-XX

EIA
CONN.

HARDCOPY
CONN.

OLD
STRING

GIGI
TERMINAL

GIGI
TERMINAL

LA34VA
GRAPHICS
PRINTER

BC22B-XX(NEW)

EIA
CONN.

HARDCOPY
CONN.

NEW
STRING

NEW GIGI
TERMINAL

GIGI
TERMINAL

GIGI
TERMINAL

LA34VA
GRAPHICS
PRINTER
MA-6729

Figure 2-11 Adding a Terminal to a Multiterminal String

2-16

To perform the procedure use a flat blade screwdriver, a BC22B-xx
interface cable, and a BC26B-0l Y-type cable.
1.

Locate the last VK100 terminal in the string attached to
the LA34VA graphic printer. Disconnect the cable
connected to the HARDCOPY connector on the rear of this
terminal.

2.

Locate and connect the BC26B-0l Y-type cable to the
HARDCOPY connector on the last VKl00 terminal. The
connector can only plug in one way. Connect the ground
wi re to the HARDCOPY connecto r. Figure 2-6 shows the
cable connector with the ground wire connected.

3.

Connect the cable disconnected from the terminal in step
2 to the female connector of the BC26B-0l Y type cable.

4.

Locate the new BC22B cable. Plug one BC22B cable
connector into the male BC26B-0l cable connector. The
connector can only plug in one way. Connect the ground
wi re between the two connectors. Figure 2-6 shows the
cable connector with the ground wire connected.

5.

Plug the other BC22B cable connector into the HARDCOPY
connector on the VKl00 terminal being added to the
string. The connector can only plug in one way. Connect
the g round wi re to the HARDCOPY connecto r. Figure 2-6
shows the cable connector with the ground wire connected.

6.

Apply power to both terminals.

7.

To verify the LA34VA graphics printer connection, place
the screen alignment video pattern on the monitor screen.
Do this by pressing the following keys in order: SET-UP,
5, T, 4, and SET-UP again.

8.

Print the screen alignment video pattern on the LA34VA
graphics printer. Do this by pressing the SHIFT and
PFl/HARDCOPY keys together.

2-17

2.5.3.3 Removing a Terminal from a Multiterminal String -- Use
the following procedure if two or more VK100 terminals are
connected to the LA34VA graphics printer. Figure 2-12 shows a
simple diagram of the procedure.
1.

Locate the VK100 terminal you want to disconnect.

2.

Locate the BC26B-01 Y-type cable connected to the
HARDCOPY connector on the rear of this terminal.
Disconnect the two cables connected to the BC26B-01
Y-type cable.

3.

Connect the two cables that were removed from the
BC26B-01 Y-type cable. Be sure to connect the cable
ground wires between the two connectors. Figure 2-6 shows
the cable connectors with the ground wire connected.

The terminal is now disconnected from the multi terminal string.

BC22B-XX

BC22B-XX

BC22A-XX

HARDCOPY
CONN.

HARDCOPY
CONN.
GIGI
TERMINAL

DISCONNECTED
GIGI TERMINAL

GIGI
TERMINAL

EIA
CONN.
LA34VA
GRAPHICS
PRINTER

MA-6716

Figure 2-12 Removing a Terminal from a Multiterminal String

2-18

2.6

HARDWARE INTERFACE INFORMATION

2.6.1
General Communications Interface Information
The terminal operates on full-duplex, asynchronous communications
lines. The physical interfaces are implemented using a 25-pin EIA
connector and a 20 mA loop connector.
2.6.1.1 Baud Rate
Transmit and receive baud rates are
programmed through the keyboard using the SET-UP commands. Both
transmit and receive baud rates can be set independently to: 110,
300, 600, 1,200, 2,400, 4,800, 9,600, or 19,200 baud.
The terminal (set up for jump scroll) supports text writing speeds
up to 300 baud without using the XON/XOFF characters for
synchronization.
2.6.1.2 Character Format -- The format of the asynchronous
character is bit serial, consisting of a start bit (always SPACE),
seven data bits (MARK equals binary 1, SPACE equals binary 0) an
optional parity bit, and one or two stop bits (always MARK). The
data bits are ASCII coded, and the least significant bit is
transmitted or received first.
The parity bit can be programmed for odd or even parity. If parity
is disabled, the eighth bit is set to SPACE and no parity checking
occurs on input. If parity is enabled and parity errors are
detected, the error character is displayed.
All baud rates have one stop bit per transmitted character, except
110 baud which has two stop bits per character.
The communication data
SET-UP commands.
2.6.2

format

outlined

here

is programmed

using

EIA Interface

2.6.2.1 Physical Interface -- The basic VK100 terminal operates
on full-duplex, asynchronous communication lines. The terminal
interfaces to the line with a 25-pin connector mounted on the back
of the terminal. This connector meets the requirements of EIA Std
RS-232-C. Table 2-1 summarizes the EIA connector signals. The
following paragraphs explain how the basic VK100 terminal uses
each signal.
Protective Ground
Pin 1
This conductor connects to the
terminal system ground via a jumper. The conductor cannot be used
for reference potential purposes.
Transmitted Data (from VK100 terminal) -- Pin 2
The VK100
terminal transmits serially encoded characters and break signals
on this circuit. The circuit is held in the mark state when the
terminal is not transmitting characters or break signals.

2-19

Table 2-1

EIA Connector Signals

Pin

Description

EIA/CCITT
Circuit

1
2
3
4
5

Protective ground
Transmitted data
Received data
Request to send
(not used)

AA/101
BA/103
BB/104
CA/105

6
7
8
9
10

Data set ready
Signal ground*
(not used)
(not used)
(not used)

CC/107
AB/102

11
12
13
14
15

(not
(not
(not
(not
(not

used)
used)
used)
used)
used)

16
17
18
19
20

(not
(not
(not
(not
Data

used)
used)
used)
used)
terminal ready

21
22
23
24
25

(not
(not
(not
(not
(not

used)
used)
used)
used)
used)

CD/108.2

* Common return

2-20

Received Data (to VK100 terminal) -- Pin 3 -- The VK100 terminal
receives serially encoded characters generated by the user's
equipment on this circuit. The terminal is always ready to accept
and interpret data after power-up, except in local mode.
Request To Send (from VK100 terminal) -- Pin 4
This signal is
always asserted (SPACE state) when the terminal is powered up and
in the on-line mode.
Clear To Send (from VK100 terminal) -- Pin 5 -- A circuit exists
for this signal, but the signal is ignored at all times.
Data Set Ready (to VK100 terminal) -- Pin 6 -- A receiver exists
for this signal, but the signal is ignored at all times.
Signal Ground -- Pin 7 -- This conductor establ ishes the common
ground reference potential for all voltages on the interface. It
connects to the VK100 terminal system ground.
Data Terminal Ready (fr-om VK100 terminal) -- Pin 20 -- The data
terminal ready (DTR) signal is always asserted, except under the
following conditions.
1.

When the terminal is not powered up

2.

When the terminal is in local mode

3.

During the 3.5 second interval following the pressing of
SHIFT and BREAK.
NOTE
This use of data terminal ready (DTR)
signal disconnects local and remote data
sets when you press SHIFT and BREAK. It
also prevents automatic answering when
the terminal is in local mode or powered
off. This use of DTR also causes the
line to disconnect when the VK100
terminal switches from on-line to local
mode.

2.6.2.2 Electrical Characteristics -- The EIA interface has the
following characteristics. On all signals generated by VK100
terminal, the mark or unasserted state is -6 V to -12 V; the space
or asserted state is +6 V to +12 V. On signals received by VK100
terminal, -25 V to +0.75 V or an open circuit is interpreted as a
mark or unasserted state; and +25 V to +2.25 V is interpreted as a
space or asserted state. Voltages greater than +25 V are not
allowed. These levels are compatible with EIA Std RS-232-C and
CCITT Recommendation V.28.

2-21

2.6.2.3 EIA Interface Cables -- Table 2-2 lists the recommended
communication cables for use with the EIA interface.

Table 2-2 EIA Interface Cables
Cable
Part Number

Cable Function

BC22A-10

EIA null modem; connects VK100 terminal
directly to a line unit (6 conductor
cable)

BC22A-25

EIA null modem; connects VK100 terminal
directly to a line unit (6 conductor
cable)

BC22B-10

EIA extension to modem (14 conductor
cable)

BC22B-25

EIA extension to modem (14 conductor
cable)

2.6.3
20 mA Current Loop Interface
The VK100 terminal
current loop interface is a passive
configuration, that is, current must be supplied to the VK100
terminal.
The transmi tter and receiver are both passive and
optically isolated; the transmitter goes to the mark state when
power is turned off. Table 2-3 lists the recommended 20 rnA current
loop characteristics.

Table 2-3 20mA Current Loop Characteristics
Condition
Open circuit voltage
Voltage drop marking
Spacing current
Marking current

Transmitter
Min Max

Receiver
Min Max

5V
0V

N/A

50V
4V
2mA
20mA 50mA

2-22

N/A
2.3V
3mA
15mA 50mA

2.6.3.1 Electrical Characteristics
The 20 rnA current
interface has the following electrical characteristics.

loop

2.6.3.2 20 rnA Interface Cables -- Table 2-4 lists the recommended
communication cables for use with the 20 rnA interface.
2.6.4
Buffer Overflow Prevention
The VK100 terminal can operate at transmission speeds up to 19,200
baud. However, the terminal may not be able to keep up wi th
incoming data. The terminal stores incoming characters in a
253-character buffer and processes them on a first-in, first-out
basis. When the contents of the buffer reaches 100 characters, the
terminal transmits XOFF (023
or DC3). On this signal the host
computer should stop transmi~ting to the terminal. If the host
stops transmi tting, the terminal eventually depletes the buffer.
When 50 characters remain in the buffer, the terminal transmi ts
XON (021 8 or DCl) to signal the host that it may resume
transmi SSlon. I f the host fa i I s to respond promptly to the XOFF
signal, the buffer continues to fill. When the buffer exceeds its
253-character capacity, a buffer overflow occurs. When the buffer
overflows, the VK100 terminal ignores any incoming characters.

Table 2-4 20mA Interface Cables
Cable
Part Number

Function

BC0SF-1S

20 rnA cable with Mate-N-Lok connectors
for connecting VK100 terminal directly to
a line unit.

BC05F-50

20 rnA cable with Mate-N-Lok connectors
for connecting VK100 terminal directly to
a line unit.

BC05F-A0

20 rnA cable with Mate-N-Lok connectors
for connecting VK100 terminal directly to
a line unit.

2-23

The only indication of a buffer overflow is the loss of data on
the monitor screen. The terminal does not display special
characters on the screen to indicate this condition. Use the
following formula to determine a possible buffer.
Response time = 153 X Hl /
speed)

rec speed -- 3 X (trans bi ts /

trans

where:
Rec speed

=

Trans bits
Trans speed

VK100 terminal receive speed in bits/second (baud).

=

10, except at 110 baud where it is 11.

=

VK100 terminal transmit speed in bits/second (baud).

NOTE
The response time is less than 0 only
when the receive speed is 19,200 baud
and the transmit speed is 110 baud.
Never use this combination of receive
and transmit speeds.
Example 1
The VK100 terminal is transmitting at 1200 baud and receiving at
1200 baud. The terminal sends an XOFF signal which the host must
respond to within 1.25 seconds to avoid the buffer overflow.
Response time

=

153

X

(10/1200) -- 3

X

(10/1200)

=

1.25 seconds

Example 2
The VK100 terminal is transmitting at 300 baud and receiving at
1200 baud. The terminal sends an XOFF signal which the host must
respond to within 1.175 seconds to avoid a buffer overflow.
Response time

=

153

X

(10/1200) -- 3

X

(10/300)

=

1.175 second

The XON/XOFF synchronization scheme has an advantage over
requiring the host to insert delays or filler characters in its
data stream. Requiring a minimum of software support, XON/XOFF
makes sure that every character or command sent to the VK100
terminal is processed in correct order. This scheme frees
interface programs from all timing considerations and produces
more reliable operation.
Software that does not support XON/XOFF signals from the VK100
terminal can still use the terminal in text or interactive mode.
To do so limit the terminal receive speed to 300 baud in jump
scroll mode, or 4800 baud in wrap scroll or scroll off modes. Set
the receive higher only if the average line length of the data is
known. Table 2-5 shows the maximum speeds (baud rates) for each
scroll mode selection at different line lengths.

2-24

r

Table 2-5 Terminal Receive Speed Limits (No XON/XOFF Support)
Scroll
Mode

0

Average Line Length in Characters
10
20
40
50
60
30

Smooth
Jump
Wrap/Off

0
300
4800

600
1200
4800

1200
2400
4800

1200
2400
4800

1200
2400
4800

1200
2400
4800

2400
2400
4800

70

80

2400
2400
4800

2400
2400
4800

Speeds are expressed as baud rates.
If XON/XOFF cannot be used, use fill characters after certain
characters or character strings are sent to the VK100 terminal.
Table 2-6 shows the number of fill characters required for these
functions. Use either the NUL (000 8 ) or the DEL (177 8 ) as fill
characters.
XON/XOFF support
following modes.

is

required

whenever

the

terminal

is

in

the

Auto Hardcopy (AHl)
Graphics mode
BASIC mode (BA1 or BA2)
If
the
host computer
synchronization, data will
pauses after transmission
varying sequence execution

does
not
support XON/XOFF buffer
probably be lost. Fill characters and
do not prevent data loss due to the
times.

Table 2-6 Fill Character Requirements
Character
or Sequence
Received
TAB
Text
ED (char)
CAN
EL
FF
DECALN
ED (full)

Receive Speed
110

1

300

2
3
9

600

4
9
20

1200 2400

9
21
42

2-25

2
19
45
86

4800

1
6
39
93
175

9600
1
1
3
2
15
79
189
353

19200
2
3
9
4
32
159
381
709

Two terminal functions, reset and self-test, reinitialize the
terminal and erase the buffer. This means characters received
after the commands to perform these two functions are lost without
being processed.
To compensate for this, the host computer may act in one of the
two following ways.
1.

Immediately after sending the terminal one of these
commands the host may act as if it had rece ived XOFF.
Thus the host will not send additional characters until
it receives XON. The terminal transmits XON only after it
completes the specified operation and the XON/XOFF
feature is enabled.

2.

When the first method cannot be implemented, the host may
use a delay 0 f no less than 10 seconds to allow the
terminal time to complete the invoked function. If the
invoked function detects an error, there is no guarantee
against loss of data. This delay is currently adequate,
however, future options may require a change in the delay
period.

The VK100 terminal always recognizes received XOFF and XON
signals. Receipt of XOFF inhibits the VK100 terminal from
transmitting any codes except XOFF and XON. Up to 253 keystrokes
are stored in a keyboard buffer (some keys transmit two or three
codes, e.g., cursor controls). If the keyboard buffer overflows,
keyclicks stop. Transmission resumes upon receipt of XON.
Entering and exiting SET-UP clears all stored keyboard characters
and the keyboard locked condition.
2.6.5
Display Interface
The display interface provides the circuitry needed to drive one
black and wh i te mon ito r and one red, green, and blue (RGB) colo r
monitor at the same time. Four separate BNC connectors are located
on the rear of the terminal and are labeled as follows.
MONO
RED
GREEN
BLUE
These connectors provide the signals needed to drive both black
and white and color monitors.
2.6.5.1 Composite Video Port (MONO) -- This interface connector
drives an external black and white monitor. The output conforms
to EIA RS-330 and has the following nominal characteristics.
Output impedance
Sync level
Black level
White level

75 ohms, dc coupled
0.0 V to 0.1 V
0.3 V +/- 10% when terminated with 75 ohms
1.0 V +/- 10% when terminated with 75 ohms
2-26

,-

2.6.5.2 Color Monitor Port (RED, GREEN, BLUE) -- These interface
connectors drive an external RGB color monitor. The RED, GREEN,
and BLUE outputs have the following nominal characteristics.
Output impedance

75 ohms, dc coupled

Red and blue signal outputs
Signal level

1. 0 V +/- 10%

Green signal outputs
Signal level
Sync level
Black level

1. 0 V +/- 10%

0.0 V to 0.1 V
0.3 V +/- 10%

2.6.5.3 Composite Sync Waveform Timing -- The compos i te sync
waveform conforms to EIA RS-330 and has the following nominal
characteristics.
Horizontal period

63.131 -s

(15.840 KHz)

Horizontal sync width

4.735 -s

Front porch

0.789 to 7.891 -s. The exact
timing depends upon the HP
SET-UP feature setting. When
set to HP5 the front porch is
3.945 -So

Back porch

7.891 -s minus front porch time

Active video time

50.505 -s

Frame rate
Noninterlaced (IL0)

60.00
(PFl)

Hz

(PF0)

or

49.97

Hz

Interlaced (ILl)

29.94
(PFl)

Hz

(PF0)

or

24.95

Hz

Vertical sync width

189.394 -s

Serration during vertical
sync

none

Vertical blank

1. 262 ms minimum (PF0)

4.609 ms minimum (PFl)
Horizontal scans per frame

264
317
529
635
2-27

(PF0
(PFI
(PF0
(PFl

and
and
and
and

IL0)
IL0)
ILl)
ILl)

2.6.5.4 Monitor Selection -- The display interfaces to drive a
number of commercially standard monitors. Monitors connected to
the VKl00 terminal should have the following capabilities.
video bandwidth

8 MHz minimum

Horizontal flyback time

12 -s maximum

Vertical flyback time

1.0
ms
maximum
(525-line
monitor)
4.3
ms
maximum
(625-line monitor)

Line rate

15.840 KHz

Frame rate

60 Hz or 50 Hz

Aspect ratio

adjustable to 1:1.6

DC restoration
To present the best possible display, the VK100 terminal contains
a number of SET-UP selectable features to tailor the video output
of the terminal to the monitor. These features are as follows.
Feature

Function

PF0

For 60 Hz, 525-line monitors

PFI

For 50 Hz, 625-line monitors

HP0 to HP9

For horizontal centering

HM0 to HM9

To horizontally limit the
for monitors with overscan

VM0 to VM9

To vertically limit the text display area for
monitors with overscan

EMI

For 40 characters per line display text on low
resolution monitors

IL0

For a noninterlaced display to reduce flicker

ILl

For an interlaced display on a monitor with a
slow phospher, or for taking moni tor screen
photographs

text

display

area

2.6.5.5 Video Interface Cables -- Table 2-7 lists the recommended
communication cables for use with the video interfaces.

2-28

Table 2-7 Video Interface Cables
Cable
Part Number

Function

BC26M-f2J5

RGB cable with BNC connectors for
user-supplied monitor

2.6.6
Hardcopy Interface
The terminal has a serial interface port for interfacing to a
LA34VA graphics printer;
this allows dumping of bit map
information to obtain a hardcopy. A series-chaining scheme allows
more than one VKlf2Jf2J terminal to share a single graphics printer.
2.6.6.1 Physical Interface
The interface to an external
hardcopy device uses a standard 25-pin female EIA connector.
Table 2-8 lists the pin assignments.

Table 2-8 Hardcopy Interface Pin Assignments
Pin

Signal Name

1
2

Protective Ground
Downstream Transmitted Data (DTXD)
Downstream Received Data (DRXD)
Downstream Request To Send (DRTS)
Downstream Clear to Send (DCTS)
Signal Ground
Upstream Clear To Send (UCTS)
Upstream Transmitted Data (DTXD)
Upstream Received Data (DRXD)
Upstream Request To Send (URTS)

3
4
5
7

13
14
16
19

2-29

2.6.6.2 Electrical Interface -- The electrical characteristics of
the hardcopy interface are as follows. On signals generated by the
VK100 terminal, the mark or unasserted state is -6 V to -12 Vi the
space or asserted state is +6 V to +12 V. These levels are
compatible with EIA Std RS-232-C and CCITT Recommendation V.28.
On signals received by the VK100 terminal, -25 V to +0.75 V or an
open circuit is interpreted as a mark or unasserted state, and +25
V to +2.25 V is interpreted as a space or asserted state.
Vol tages greater than +25 V are not allowed. These levels are
compatible with EIA StdRS-232-C and CCITT Recommendation V.28.
2.6.6.3 Hardcopy Interface Cables
recommended communication cables for
interface.

Table 2-9 lists the
use wi th the hardcopy

2.6.6.4 Hardcopy Device Sharing -- The VK100 terminal contains
the necessary logic for series-chaining to another VK100 terminal
to time share a single hardcopy device. For every series-chained
VK100 terminal, a Y-cable (BC26B-01) and a modem cable (BC22B-x)
are needed. Chapter 5 provides instructions on how to connect the
terminal in a series chain.
There is no limitation on the
number of VK100 terminals chained
to the hardcopy device as long as the maximum cable length between
adjacent terminals is 50 ft. The 50 ft maximum cable length
conforms to RS-232-C/CCITT V.28 interface specifications. In
practice the number of VK100 terminals served by a single printer
is limited by the maximum response time users will accept.
When a VK100 terminal is powered off, all upstream terminals
(those farther away from the hardcopy device) are broken off the
chain. The cabl ing system allows downstream terminals to bypass
the Y-cable on the powered-off terminal and remain in the chain.
As a general practice disconnect all powered-off terminals from
the chain. This eliminates the possibility of inducing noise
pulses in the chain, which may cause an erroneous printout.

2-30

Table 2-9 Hardcopy Interface Cables
Cable
Part Number

Function
Y-cable for daisy-chaining the LA34VA graphics
printer to multiple VK100 terminals

BC22B-25

EIA extension to second VK100 terminal from Y-cable
(BC26B-01)

BC22A-10

EIA null modem; connects VK100 terminal directly to
a line unit(6 conductor cable)

BC22A-25

EIA null modem; connects VK100 terminal directly to
a line unit (6 conductor cable)

2-31

3.3
KEYBOARD CONTROLS
The VK100 terminal has two keypads. The main keypad has a key
arrangement and sculpturing styled like a standard office
typewriter. The auxiliary or numeric keypad allows you to enter
numeric data in a calculator-like fashion.
The following paragraphs describe the different
keyboard control groups and their functions.

VK100

terminal

Standard keys
Special function keys
SET-UP mode keys
Special mode keys
3.3.1
Standard Keys
Figure 3-2 identifies the VK100 terminal keyboard keys that
usually operate like standard typewriter and calculator keys.
These keys generate ASCII codes which the terminal transmi ts to
the host computer. The minus, comma, period, and numeric keys of
the auxi 1 iary keypad normally generate the same codes as the
corresponding unshifted keys of the main keypad. The SHIFT key on
the main keypad does not affect the codes generated by the keys on
the auxiliary keypad.
The auxiliary keypad has two alternate modes of operation: keypad
appl ication mode and programmed keypad mode. The terminal can
enter either mode through the SET-UP parameters or a command from
the host computer. In both modes the auxiliary keypad generates
control functions.

3-2

Figure 3-2 Standard Keys

CAPS
LOCK

CAPS LOCK
This key enables the uppercase function of alphabetic keys only.
All numeric and special symbol keys remain in lowercase.
SHIFT

SHIFT
This key enables the uppercase function of all keys. If a key does
not have an uppercase function, the SHIFT key has no effect.

3-3

Figure 3-3 Special Function Keys

3.3.2
Special Function Keys
Figure 3-3 identifies the special function keys on
terminal keyboard. The following paragraphs provide
description.

the VK100
a general

SET-UP
Pressing this key causes the VK100 terminal to enter SET-UP mode.
Terminal parameters such as scrolling can be changed in this mode.

11111111

Arrows
Each of these keys causes the VK100 terminal to transmit a control
function code to the host computer. Usually the control functions
are interpreted as commands to move the cursor in the direction of
the arrow.

BREAK
This key transmits a break signal. Pressing BREAK with either of
the SHIFT keys transmits the long break signal.

PF1/HARDCOPY
Pressing this key by itself causes the VK100 terminal to transmit
a control function code.
Pressing this key with either of the SHIFT keys causes the
optional printer to copy the current contents of the monitor
screen. During the copying process the screen is frozen. Once the

3-4

printer finishes the copy, the screen resumes normal operation. If
a printer is not connected to the terminal, pressing this key
freezes the screen for a short time just as if a printer was
copying the screen.
Pressing the SHIFT and PFI/HARDCOPY keys a second time stops the
printing of the screen contents. When this occurs the terminal
returns to the previous operating mode.

PF2/LOCATOR
Pressing this key by itself causes the VKl00 terminal to transmit
a control function code.
Pressing this key with either of the SHIFT keys causes the
terminal to enter locator mode and display the locator cursor
( + ) on the screen. Section 3.3.4 provides more information on
the locator mode.

PF3/TEXT
Pressing this key by itself causes the VK100 terminal to transmit
a control function code.
Pressing this key with either of the SHIFT keys causes the
terminal to enter text mode and disable graphics mode. When it
enters text mode, the terminal cancels any special graphics
display parameters that were selected. If the terminal was already
in text mode, pressing this key resets any special text features.

PF4/RESET
Pressing this key by itself causes the VK100 terminal to transmit
a control function code.
Pressing this key with either of the SHIFT keys resets the
terminal. This action is almost the same as turning the power
switch off and on. All of the contents of memory are lost except
the SET-UP parameter settings, soft character sets, BASIC program,
graphics mode macrographs, and any special key definitions. This
reset function does not change the SET-UP parameter settings.

DELETE
This key causes the VK100 terminal to transmit a delete character
code to the host system. The deleted character mayor may not be
erased from the screen.

3-5

RETURN
This key transmits either a carriage return (CR) code or a
carriage return (CR) and 1 ine feed (LF) code. Select the des ired
function through the New Line (NL) SET-UP parameter.

LINE FEED
This key transmits a line feed

(LF) code.

NO SCROLL
This key is controlled by the XO SET-UP parameter. If the XO
parameter is on, pressing this key the first time stops data
transmission from the host computer to the VK100 terminal. This
also lights the NO SCROLL indicator above the keyboard, to show
that the terminal is not sending or receiving data. Pressing the
key a second time resumes transmission from where it stopped. This
also turns off the NO SCROLL indicator. If the XO parameter is
off, this key is inactive and has no effect on the terminal.

CONTROL
Pressing this key in combination with another key causes the VK100
terminal to transmit a control code.

ESCAPE
This key transmits an escape code.

3-6

ONLINE

lQCAlNOSCROll BASIC HARDCoPV

000

II

000

l2

0

Figure 3-4 SET-UP Mode Keys

3.3.3
SET-UP Mode Keys
Figure 3-4 identifies the keys available in SET-UP mode.
3.5 provides a detailed description of the SET-UP mode.

Section

II

SPACE BAR or UP ARROW
Either key steps to the next higher setting for a SET-UP
parameter. When the highest value is reached, the setting returns
to 0 and starts the cycle over again. Each key performs the same
function.

II

DOWN ARROW
This key steps to the next lower setting for a SET-UP parameter.
When 0 is reached the setting returns to the highest value and
starts the cycle over again.

II

RETURN or RIGHT ARROW
Either key steps the terminal to the next SET-UP parameter. When
the
last parameter appears on the screen,
the terminal
automatically returns to the first SET-UP parameter. Each key
performs the same function.

3-7

II

LEFT ARROW
This key steps the terminal backwards to the previous SET-UP
parameter. When the first parameter appears on the screen, the
terminal automatically returns to the last SET-UP parameter.

Alphabetic Keys -- These keys enter the two-letter code for each
SET-UP parameter. This displays any SET-UP parameter without
stepping through all the parameters. If the operator types an
incorrect code, the terminal sounds the bell tone and displays the
last correct parameter.
Numeric Keys -- These keys enter the numeric parameter setting of
a SET-UP parameter. This sets a parameter without stepping through
all the parameter settings. If the operator types an incorrect
setting, the terminal sounds the bell tone and displays the last
correct parameter setting.

PF4/RESET
Pressing this key with either of the SHIFT keys resets the
terminal to the power-up state. All the contents of memory,
including the SET-UP parameter settings, are lost. Pressing these
keys in SET-UP mode is the same as turning the terminal power
switch off and on.
When the operator presses this key by itself, the terminal sounds
the bell tone.

3-8

Figure 3-5 Locator Mode Keys

3.3.4
Locator Mode Keys
Figure 3-5 identifies the keys that have a special meaning to the
terminal in locator mode. The following paragraphs briefly
describe the function of the locator keys in locator mode. If the
operator presses any keys other than those described, the terminal
ex i ts loca to r mode, sends the code 0 f the key pressed, and then
sends the screen location of the locator cursor. If the terminal
enters locator mode through the host computer, the terminal sends
a carriage return (CR) code followed immediately by the key code.

PF2/LOCATOR
Pressing this key with either
terminal to enter locator mode
( + ) on the screen.

of the SHIFT keys causes the
and display the locator cursor

lIalili

ARROWS
These keys move the locator cursor (+ ) around the screen. Each
time the operator presses the key, the locator cursor moves one
dot in the direction shown by the arrow on the key. Pressing SHIFT
with one of the arrow keys moves the locator cursor ( + ) ten dots
in the direction shown by the arrow on the key.

3-9

ENTER or RETURN
Either of these keys end the locator mode. The terminal sends the
screen position of the locator cursor to the host computer.

DELETE
This key ends the locator mode; however, the terminal does not
send the screen position of the locator cursor to the host
computer. If the terminal enters locator mode through the host
computer, the terminal sends a carriage return (CR) code.

3.4
VISUAL AND AUDIBLE INDICATORS
The VK100 terminal has two types of indicators: visual indicators
above the keyboard, and audible alarms.
3.4.1
Visual Indicators
Figure 3-6 shows the location of the keyboard indicators.
following paragraphs describe the function of each indicator.

The

ON LINE
This indicator lights to show that the VK100 terminal is on-line
and ready to transmit or receive messages from the host computer.
The ON LINE indicator can also show self-test errors.
LOCAL
This indicator lights to show that the terminal is off-line and
cannot communicate wi th the host computer. In local mode the
keyboard remains active and all typed characters appear on the
screen. The LOCAL indicator can also show self-test errors.

3-10

i ~F1!@J@JB
H RD

PF2
LOCTR

C~PY

PF3
TEXT

PF4
AESET

0000

000D
~000

1 100
0

Figure 3-6 Keyboard Indicators

NO SCROLL
This indicator lights to show that the NO SCROLL key was pressed
and the terminal is no longer receiving or sending data to the
host computer. The codes for any keys pressed while the NO SCROLL
indicator is on are stored in the terminal and sent after the
indicator turns off. To continue sending or receiving data, press
NO SCROLL a second time. The NO SCROLL indicator is inactive if
the XO SET-UP parameter is off (X00).
BASIC
This indicator lights to
program mode. In this
entered on the keyboard
BASIC language commands.
errors.

show that the terminal is in the BASIC
mode the terminal interprets all data
or received from the host computer as
The BASIC indicator also shows self-test

HARDCOPY
This indicator lights to show that the optional hardcopy printer
is copying the screen. When the operation is complete, the
terminal turns the indicator off. The HARDCOPY indicator also
shows self-test errors.
LI and L2
These indicators are turned on and off by the host computer.
LI and L2 indicators also show self-test errors.

3-11

The

3.4.2
Audible Indicators
The VKHHJ terminal has two audible alarms:
and a long tone (beep).

a

short tone

(click)

Short Tone (click) -- The terminal sounds the short tone whenever
the operator presses a key, with the following exceptions.
1.

SHIFT and CTRL keys do not generate a keyclick, because
these keys do not transmit codes. These keys only modify
the codes transmitted by other keys.

2.

No key generates a keyclick if the keyclick parameter is
turned off in SET-UP mode.

Long Tone (beep) -- The terminal sounds the long tone when one of
the following conditions occurs.
1.

The terminal enters SET-UP mode.

2.

The terminal receives a bell code from the computer.

3.

The cursor is eight characters away from the
margin, and the margin bell parameter is enabled.

4.

The operator enters an incorrect
parameter setting in SET-UP mode.

parameter

right

code

or

3.5
SET-UP MODE DESCRIPTION
The VKl~~ terminal contains many features. Some of these features
help the operator in the daily use of the terminal. Other features
allow the terminal to talk to many different types of computers
and computer programs. To change these features to the required
settings the terminal contains a special mode of operation called
SET-UP mode.
In SET-UP mode, the terminal displays the status of each parameter
stored in the terminal memory individually on the monitor screen.
Once the parameter code appears, the operator can change the
parameter setting. Changing the parameter setting causes the
terminal to operate according to the new setting. The effect is
the same as turning a switch on or off.
Enter SET-UP mode by pressing SET-UP. The following events occur.
1.

The monitor screen scrolls down six character lines.

2.

The long tone sounds.

3.

The monitor enters the expanded mode.

4.

A message similar to
center of the screen.

the

SET-UP TS4

3-12

following
24~~

appears

at

the

top

The word SET-UP indicates the terminal is in SET-UP mode.
The next two characters are the SET-UP parameter code. This code
represents the SET-UP parameter the operator can change. In this
case the code is TS and stands for Transmit Speed.
Immediately following the SET-UP parameter code is its current
setting (4 in this case). This parameter setting code changes when
the parameter setting changes.
The last four characters in the message are an abbreviation of the
current parameter setting. The abbreviation in this case is 2400,
to show that the terminal transmi t speed is set for 2400 baud
(bits per second). The parameter setting abbreviation varies from
setting to setting.
The parameter settings entered in SET-UP mode are not permanent.
Every time the operator turns terminal power off, the parameter
settings return to a condi tion known as defaul t. The defaul t
conditions reside in two different physical locations in the
terminal, the default SET-UP switch pack and the read only memory
(ROM) •
The default SET-UP switch pack controls the following parameters.
Transmit (TS) and receive (RS) speed together
Parity (PE)
Default character (UK) sets
Communications interface (CI)
Power frequency (PF)
The operator can change the default values for these SET-UP
parameters while installing the terminal. Refer to section 2.5 for
the procedure to follow. This chapter discusses the specific
function and possible settings for each SET-UP parameter.
All other default SET-UP parameter settings are controlled by the
read only memory (ROM) in the VKl00 terminal. These default
parameter settings are permanent. For a parameter setting
different from the default setting, change the setting each time
terminal power is turned on.
3.5.1
SET-UP Parameter Summary
The VK100 terminal contains all the SET-UP parameters I isted in
Table 3-1. The first column in the table lists the SET-UP
parameters in the order they appear on the moni tor screen. The
second column lists the parameter codes, and the third column
lists the possible setting codes for each parameter. The next
column lists the exact message that appears on the screen, and the
last column briefly describes what the parameter does for that
setting_

3-13

This table serves only as a brief summary of the SET-UP parameters
and how they affect the VK100 terminal. See the SET-UP Parameter
Descriptions section of this chapter for a more complete
description of each parameter.

Table 3-1

SET-UP Parameter Summary

SET-UP
Parameter

Para Set Displayed
Code Code Message

Transmit

TS

0

TS0

110*+

Speed

TS

1

TS1

300

TS

2

TS2

600

TS

3

TS3 1200

TS

4

TS4 2400

TS

5

TS5 4800

TS

6

TS6 9600

TS

7

TS7 19.2

RS

0

RS0 110*+

RS

1

RS1

300

RS

2

RS2

600

RS

3

RS3 1200

RS

4

RS4 2400

RS

5

RS5 4800

RS

6

RS6 9600

RS

7

RS7 19.2

LL
LL

0
1

LL0 LocI
LL1 OnLn*

Receive
Speed

Loca1/
Line

3-14

Function
Set transmit
baud.
Set transmit
baud.
Set transmit
baud.
Set transmit
baud.
Set transmit
baud.
Set transmit
baud.
Set transmit
baud.
Set transmit
19,200 baud.
Set receive
baud.
Set receive
baud.
Set receive
baud.
Set receive
baud.
Set receive
baud.
Set receive
baud.
Set receive
baud.
Set receive
baud.

speed to 110
speed to 300
speed to 600
speed to 1,200
speed to 2,400
speed to 4,800
speed to 9,600
speed to
speed to 110
speed to 300
speed to 600
speed to 1,200
speed to 2,400
speed to 4,800
speed to 9,600
speed to 19,200

Local mode.
On-line mode.

Table 3-1

SET-UP Parameter Summary (cont)

SET-UP
Parameter

Para Set Displayed
Code Code Message

BASIC

BA
BA

o
1

BA0 Off*
BAI LocI

BA

2

BA2 Host

Parity
Enable

XON/XOFF

PE

PE0 Off*+

PE

1

PEl Even

PE

2

PE2 Odd
X00 Off

XO

Function
BASIC disabled.
BASIC enabled in local
mode.
BASIC enabled in host mode.
Parity off, bit 8 set to
SPACE.
Even parity on, bit 8 set
to even parity and checked.
Odd parity on, bit 8 set to
odd parity and checked.
XON/XOFF not sent
automatically.
XON/XOFF sent
automatically.

XO

1

XOI On*

SM
SM
SM
SM

o
1
2
3

SM0
SMI
SM2
SM3

Reverse
Video

RV
RV

1

Horizontal
Margins

HM
HM

o
HM0*
1--9 HM(1--9)

No horizontal margins.
Horizontal margins one to
nine characters from left
and right.

Vertical
Margins

VM
VM

o
VM0*
1--9 VM (1--9)

No vertical margins.
Vertical margins one to
nine characters from top
and bottom.

Expansion
Mode

EM
EM

o
1

Normal display.
Expanded mode (double-width
text characters).

Horizontal

HP

0--9 HP(0--9)

Position

HP

5

Scroll

o

Off
Jump
Smth*
Wrap

RV0 Off*
RVI On

EM0 Ndrm*
EMI Expn

HP5*

No scrolling.
Jump scroll.
Smooth scroll.
Wrap scroll.
Normal video.
Reverse video.

Horizontal display
position.
Normal horizontal display
position.

* Indicates the default value of the parameter.
+ This default value is determined by the settings of the default
SET-UP swi tch pack. Refer to Chapter 2 section 2.5 for the
procedure to change these settings.
3-15

Table 3-1

SET-UP Parameter Summary (cont)

SET-UP
Parameter

Para Set Displayed
Code Code Message

Overstrike

OS
OS

o

VC
VC
VC

o

VC

Visual
Cursor

Text Display

Graphics
Display

Graphics
Prefix

Single
Character
Local Echo

New Line

Function

OS0 Off*
aSIan

Normal text replacement.
Overlay text writing.

1
2

VC0 Off
VCl Text
VC2 Grph

3

VC3 Both*

Disable visual cursor.
Enable text visual cursor.
Enable graphics visual
cursor.
Enable both cursors.

1

TD

TD0 Norm*

TD

1

TDI Text

TD

2

TD2 Ctrl

GD

GD0 Norm*

GD

1

GDI Text

GD

2

GD2 Top

GD

3

GD3 Bot

GP

o

GP0 Off*

GP

1

GPl= "!"

SC

Normal processing of text
display.
Display all characters as
text (transparency mode);
all characters are
displayed as text and not
processed, except LF which
is displayed as next line.
Process all characters
normally, display all
unrecognized characters as
text.
Normal processing of
graphics.
Display graphics commands
as text.
Display last line of ReGIS
at top of screen.
Display last line of ReGIS
at bottom of screen.
Disable graphics prefix
mode.
Enable graphics prefix
mode; character shown in
quotes is prefix character.

SC0 Off*

Normal communications
operation.
Single character operation.

SC

1

SCIOn

LE
LE

o

LE0 Off*
LEI On

No local echo.
Local echo every key
stroke.

NL
NL

o

NL0 Off*
NLI On

New line mode disabled.
New line mode enabled.

1

1

3-16

Table 3-1

SET-UP Parameter Summary (cont)

SET-UP
Parameter

Para Set Displayed
Code Code Message

Function

Auto Hardcopy

AH
AH

0
I

AH0 Off*
AHI On

Disable auto hardcopy mode.
Enable auto hardcopy mode.

Auto Wraparound

AW
AW

0
I

AW0 Off
AWl On*

Disable auto wraparound.
Enable auto wraparound.

Key Repeat

KR

0

KR0 Off

KR

I

KRI On*

Disable key repeat
parameter.
Enable key repeat
parameter.

KC
KC

0

KC0 Off
KCI On*

Disable keyclick.
Enable keyclick.

Keyclick
Margin Bell

I

MB
MB

I

0

MB0 Off
MBI On*

Disable right margin bell.
Enable right margin bell.

Terminal
Mode

TM
TM

0
I

TM0 VT52
TMI ANSI*

VT52 mode.
ANSI mode.

Keypad
Mode

KP
KP

0
I

KP0 Norm*
KPI Appl

Numeric keypad mode.
Application keypad mode.

Cursor Key
Mode

CK
CK

0
I

CK0 Norm*
CKI Appl

Cursor key mode.
Cursor key application
mode.

Programmed
Keypad Mode

PK
PK

0
I

PK0 Off*
PKI On

Programmed keypad disabled.
Programmed keypad enabled.

Tablet
Locator Mode

TL

0

TL0 Off*

TL

I

TLI On

Only four cursor keys
control locator mode.
Tablet or cursor keys
control locator mode.

UK Character
Set

UK
UK

0
I

UK0 U.S.* +
UKI U.K.

US character set.
UK character set.

Comm.
Interface

CI

0

CI0 EIA*+

CI

I

CII 20 mA

EIA comm. interface
selected.
20 mA comm. interface
selected.

* Indicates the default value of the parameter.
+ This default value is determined by the settings of the default
SET-UP swi tch pack. Refer to Chapter 2 section 2.5 for the
procedure to change these settings.

3-17

Table 3-1

SET-UP Parameter Summary (cont)

SET-UP
Parameter

Para Set Displayed
Code Code Message

Hardcopy
Speed

HS

HS0

110

Function
Set hardcopy
baud.
Set hardcopy
baud.
Set hardcopy
baud.
Set hardcopy
baud.
Set hardcopy
baud.
Set hardcopy
baud.
Set hardcopy
baud.
Set hardcopy
19,200 baud.

speed to 110

HS

1

HS1

300

HS

2

HS2

600

HS

3

HS3 1200

HS

4

HS4 2400

HS

5

HS5 4800

HS

6

HS6 9600*

HS

7

HS7 19.2

Power
Frequency

PF
PF

o
1

PF0 60 Hz*+
PF1 50 Hz

60 Hz power frequency.
50 Hz power frequency.

Interlace

IL
IL

1

IL0 Off*
ILIOn

Interlace turned off.
Interlace turned on.
Select power-up self-test.
Select external comm. test.
Select hardcopy comm. test.
Select display pattern
test.
Select color bar test
pattern.
Repeat selected testes)
until failure.
Clear all selected test (s) •

Self-Test

o

ST
ST
ST
ST

1
2
3
4

ST1
ST2
ST3
ST4

ST

5

ST5 CBar

ST

9

ST9 Rept

ST

PWUp
ExCm
HcCm
Dspl

ST0 Clr

speed to 300
speed to 600
speed to 1,200
speed to 2,400
speed to 4,800
speed to 9,600
speed to

* Indicates the default value of the parameter.
+ This default value is determined by the settings of the default
SET-UP swi tch pack. Refer to Chapter 2 section 2.5 for the
procedure to change these settings.

3-18

3.5.2
Changing a SET-UP Parameter (Operator)
To change any or all of the SET-UP parameters
following simple procedure.

perform

1.

Enter SET-UP mode by pressing SET-UP.

2.

Select the SET-UP parameter you want to change.
of the four following methods.

3.

Use one

a.

Type the two-character
keyboard.

b.

Press RETURN until the SET-UP parameter code appears
on the screen. This key is pressed, the code advances
by one.

c.

Press the ~ key until the SET-UP parameter code
appears on the screen. Each time this key is pressed,
the code advances by one.

d.

Press the ~ key until the SET-UP parameter appears on
the screen. Each time this key is pressed, the code
advances by one.

Change the parameter
following methods.

SET-UP parameter

the

setting.

Use

one

code on

of

the

the

four

a.

Type the single-digit parameter setting. This changes
the parameter setting to the typed-in value wi thout
stepping through all the possible parameter settings.

b.

Press the SPACE BAR.
pressed the parameter
possible value.

c.

Press the 1 key. Each time this key is pressed, the
parameter setting advances to the next possible
value.

d.

Press t h e ' key. Each time this key is pressed, the
parameter setting goes back to the previous setting.

Each time the SPACE BAR is
setting advances to the next

To change more than one SET-UP parameter, just repeat steps 2 and
3 as often as needed. Pressing either the RETURN or ~ key advances
the terminal to the next parameter and displays the new parameter
and its current setting. Pressing the ~ key steps the terminal
back to the previous parameter and displays that parameter and its
setting. The terminal always returns to the first parameter (TS)
after stepping through all the parameters.

3-19

If the operator presses any keys other than SPACE, RETURN, ~, ~,
a parameter code letter, or a parameter value, the terminal
bell sounds and the last correct parameter or parameter setting
appears on the screen.

T, , ,

When all the SET-UP parameters are set, exi t the SET-UP mode by
pressing SET-UP once. The screen then scrolls back to its original
position and the normal viewing area appears again.
3.5.3
Changing a SET-UP Parameter (Host Computer)
The host computer can change all VK100 terminal SET-UP parameters.
It has this capability because the SET-UP parameters directly
affect how the terminal acts with specific programs. To change the
SET-UP parameters, the host computer sends escape sequences to the
terminal. The terminal then changes the SET-UP parameters and acts
according to the new settings.
The Device Control Strings (DCS) section in Chapter 4 describes
the specific escape sequences and message formats that change the
terminal SET-UP parameters.
3.6
SET-UP PARAMETER DESCRIPTIONS
This section describes each SET-UP parameter in detail and
explains how each parameter affects the terminal. The SET-UP
parameters are listed in the order they appear on the screen.
NOTE
Unless otherwise stated, entering SET-UP
mode and changing parameters does not
result in the loss of data on the
screen.
3.6.1
Transmit Speed (TS)
Set the transmi t speed to match the computer recei ve speed. The
VK100 terminal can transmit at anyone of the following
preselected speeds: 110, 300, 600, 1,200, 2,400, 4,800, 9,600, and
19,200 baud.
Transmit speed is independent of receive speed; the terminal can
transmit data at one speed and receive data at a different speed.
Select the defaul t value of both this parameter and the receive
speed (RS) parameter wi th the same defaul t SET-UP swi tch pack
settings.
NOTE
Setting this parameter to 110 baud (TS0)
selects
two
stop
bits;
all
other
settings select one stop bit.

3-20

3.6.2
Receive Speed (RS)
Set the receive speed to match the computer transmi t speed. The
VK100 terminal can receive at anyone of the following preselected
speeds:
110, 300, 600, 1,200, 2,400, 4,800, 9,600 and 19,200
baud.
Receive speed is independent of transmit speed; the terminal can
receive data at one speed and transmit data at a different speed.
Select the default value of both this parameter and the transmit
speed (TS) parameter wi th the same defaul t SET-UP swi tch pack
settings.
3.6.3
Line/Local (LL)
The line/local parameter allows the operator to enter the terminal
into either an on-line or a local (off-line) mode. When the
terminal is on-line (the ON-LINE indicator lights), all characters
typed on the keyboard are sent directly to the computer and
messages from the computer appear on the screen. In local mode
(the LOCAL indicator lights), the terminal is disconnected from
the computer; messages are not sent to or received from the
computer. Characters typed on the keyboard are echoed directly to
the screen.
NOTE
When the terminal is on-line (LLl), the
data terminal ready (DTR) signal on the
EIA communications line is asserted.
When the terminal enters local mode
(LL0), DTR is deasserted and the LOCAL
indicator lights.
3.6.4
BASIC (BA)
The BASIC mode parameter allows the operator to select the BASIC
programming capability of the VKl00 terminal. If the BASIC mode is
off (BA0), the terminal operates normally. The line/local
parameter (LL) determines if the terminal is on-line or local to
the host computer.
When the operator selects BASIC local (BAI), the standard BASIC
programming capability of the terminal turns on and the terminal
keyboard acts as the input device to BASIC. In this mode, to enter
a BASIC program into the terminal type it on the keyboard. The
BASIC indicator lights when the parameter is set to BAl.
When the operator selects BASIC host (BA2), the BASIC programming
capability of the terminal turns on and the host computer acts as
the input device to BASIC. In this mode the host computer normally
loads a BASIC program in the VKl00 terminal through the
communications line. The BASIC indicator lights when the parameter
is set to BA2.

3-21

3.6.5
Parity Enable (PE)
The parity enable parameter defines the type of parity bit that
the VKl~~ terminal generates for transmitted characters and checks
for received characters. All characters contain eight bits
seven data bits and one parity bit. Select the parity bit from one
of the three following options.
1.

Space parity, which ignores
received characters (PE~)

2.

Even parity, with even parity checking for all
characters (PEl)

received

3.

Odd parity, with
characters (PE2)

received

odd

parity

the

parity

checking

for

bit

all

for

all

Select the default value of this parameter with the default SET-UP
switch pack settings. Section 2.5 provides information on how to
set these switches.
3.6.6
XON/XOFF (XO)
The VKl~~ terminal can automatically generate the synchronizing
codes XON (DCl) and XOFF (DC3). The synchronizing codes prevent
data loss when the host computer sends characters to the terminal
faster than the terminal can process them. The XOFF control code
stops data transmission from the host computer to the terminal;
the XON code signals the host computer to resume transmission.
When the parameter is on, and the receive buffer contains 100
unprocessed characters, the VK10~ terminal automatically generates
the XOFF code. The receive buffer fills to that point when one of
the following events occur.
1.

The operator presses NO SCROLL.

2.

The operator enters the SET-UP mode.

3.

The terminal
process them.

receives

characters

faster

than

it

can

The buffer empties only after the operator presses NO SCROLL again
or takes the terminal out of SET-UP mode. The terminal then takes
characters out of the buffer and processes them one at a time.
When 50 characters remain in the buffer, the terminal transmi ts
the XON code to resume transmission from the computer to the
terminal.
If the XON/XOFF parameter is off, NO SCROLL is disabled.
If the host computer software does not support the XON/XOFF codes,
data sent during buffer-full conditions may be lost.

3-22

NOTE
The
VKH"~
terminal
always
stops
transmission when it receives an XOFF
(DC3) code and resumes transmission when
it
receives
an
XON
(DCI)
code,
regardless
of
the
auto
XON/XOFF
parameter setting.
3.6.7
Scroll Mode (SM)
Scrolling describes the movement of existing lines on the monitor
screen to make room for new lines on the screen. The scroll mode
function has four possible settings: scroll off, jump scroll,
smooth scroll, or wrap scroll.
In scroll off mode (SM0), the text cursor always remains on the
top or bottom line of the display. The display does not move up or
down. The terminal adds new I ines to the screen by wr i t ing over
the top or bottom line.
In jump scroll mode (5Ml), the text cursor immediately moves to
the next line. In this mode the existing lines on the screen move
up or down to make room for new lines. The new lines appear on the
screen as fast as the computer sends them to the terminal. At the
higher baud rates, the data is very difficult to read
due to the
rapid movement of the lines.
NOTE
Jump scroll mode allows the terminal to
add a maximum of thirty lines per second
at the top or bottom of the screen. The
XON/XOFF parameter must be enabled and
supported by the host computer to make
sure that data is not lost when jump
scroll mode is enabled.
In smooth scroll mode (5M2), the terminal receives new lines of
data at a limited speed. The movement of lines occurs at the
smooth, steady rate of eight lines per second, allowing the
operator to read the data as it appears on the screen.
NOTE
Smooth scroll mode allows the terminal
to add a maximum of eight lines per
second at the top or bottom of the
screen. The XON/XOFF parameter must be
enabled and supported by the host
computer to make sure that data is not
lost when smooth scroll mode is enabled.
In wrap scroll mode (5M3), the terminal adds new lines to the
screen by wr i ting over the old lines. When the operator reaches
the end of the screen, (bottom or top) the cursor automatically
moves to the beginning of the screen, and the terminal writes new
lines over the old lines on the screen. Existing data on the
screen does not move.
3-23

3.6.8
Reverse Video (RV)
The reverse video parameter allows the operator to select the
background of the screen. In normal screen mode (RV0), the screen
contains light (or colored) characters on a dark background. In
reverse screen mode (RVI), the screen contains dark characters on
a light (or colored) background.
3.6.9
Horizontal Margins (HM)
This parameter allows the operator to tailor the video output of
the VRl00 terminal to the monitor. If the monitor cannot display
84 characters per line, insert marg ins on both sides of the
screen. The width of each margin is in characters.
If the horizontal margin parameter
display 84 characters on a line
mode parameter is set for EMI).
one-character margin (HMI), both
one character wide. This setting
line (40 characters in EMI).

is set for HM0, the monitor can
(42 characters if the expansion
If the parameter is set for a
the left and right margins are
allows only 82 characters per

The maximum margin width is nine characters for both the left and
right margins. This setting provides space for 66 characters per
line (24 characters in EMI).
3.6.19
Vertical Margins (VM)
This parameter allows the operator to tailor the video output of
the VKl00 terminal to the monitor. If the monitor cannot display
24 lines of data, insert vertical margins at the top and bottom of
the screen. The height of each margin is in lines.
If the vertical margin parameter is set for VM0, the terminal
sends 24 lines of data to the monitor before scrolling the screen.
If the parameter is set for VM1, both the top and bottom margins
are set for one line. This setting allows the terminal to send 22
lines of data to the monitor before scrolling the screen.
The maximum margin height is nine lines for both the top and
bottom margins. This setting allows the terminal to send six lines
of data to the monitor before scrolling the screen.
3.6.11
Expansion Mode (EM)
This parameter allows the operator to expand characters on the
screen to twice their normal width. In normal mode (EM0),
characters are seven pixels wide and are spaced two pixels apart.
In expanded mode (EMI), characters are 14 pixels wide and are
spaced 4 pixels apart.
The EMl setting allows a maximum of 42 characters per line.
3.6.12
Horizontal Position (HP)
This parameter allows the operator to tailor the video output of
the VKl00 terminal to the monitor. The horizontal position
parameter lets the operator center the entire display on the

3-24

screen. The normal setting for this parameter is HP5. If the
display is left of center, increase the value of the parameter
setting. This moves the entire display to the right. If the
display is right of center, decrease the parameter setting value.
This moves the entire display to the left.
Overstrike (OS)
3.6.13
This parameter allows the operator to create special graphics on
the screen by typing over characters. If the overstrike parameter
is off (OS0), typing over a character replaces the old character
with the new character. If the parameter is on (OSl), typing over
a character places the new character over the old character
without destroying the old character. For example, this parameter
allows you to create the "not equal to" sign (~) by pressing the =
key, BACKSPACE key, and / key.
3.6.14
Visual Cursor (VC)
This parameter allows the operator to change the visual cursor
displayed. The cursor is the visual indicator that shows the
active position, where the next character will appear on the
screen. The text cursor is a solid block character ( . ) ; it only
appears when the terminal is in text mode. The graphics cursor is
a diamond cross hair (0) at the current drawing position; it only
appears when the terminal is in graphics mode. Only one cursor
appears on the screen at anyone time.
The visual cursor parameter has four settings.
In VC0, neither the text cursor nor the graphics cursor appears on
the screen.
In VCl, the text cursor
appears in graphics mode.

appears

In VC2, no cursor appears
appears in graphics mode.

in text mode,

In VC3, both the
respective modes.

text

and

in

text

graphics

3.6.15
Text Display (TD)
This parameter controls how characters
processed by the terminal.

but

mode,

no

cursor

the graphics cursor

cursors

sent

and

to

appear

the

in

their

display

are

In TD0, normal processing of both text and ReGIS graphics occurs.
In TDl, all characters appear as graphics text, including all
control and escape sequences.
No normal processing of these
characters occurs, except for line feed (LF) which causes a
next-line function.
The XON/XOFF codes are still interpreted for
synchronization, but also appear as graphics text.
Control codes
appear as the proposed ANSI standard two-character mnemonics.

3-25

In TD2, normal processing occurs; those control codes which are
not normally processed appear as graphics text.
Unrecogni zed
escape and control sequences do not appear.
3.6.16
Graphics Display (GD)
This parameter controls how characters
ReGIS interpreter are processed.

sent

to

the

terminal's

In GD0, normal ReGIS processing occurs.
In GDl, ReGIS commands appear as text, and no graphics display
occurs.
When the operator enters ReGIS mode while in GDl, the
message "GON" appears on the screen, and "GOFF" appears when the
ReGIS string is done.
In GD2 and GD3, normal processing of ReGIS graphics commands
occurs. The last line of the ReGIS commands appears as text on the
top display line (GD2) or bottom display line (GD3).
This line
appears only when there are no more ReGIS commands to process, or
when you freeze the display by pressing NO SCROLL.
3.6.17
Graphics Prefix (GP)
This parameter allows the terminal to enter graphics mode by
receiving a single unique character from the host computer. When
the graphics prefix character parameter is off (GP0), no graphics
prefix character operations can occur. When the parameter is on
(GPl), the line feed (LF) character followed by the graphics
prefix character enters the terminal into graphics mode. The
terminal interprets any characters received after the prefix
character as graphics data. The next LF character received returns
the terminal to normal text mode. If the graphics prefix character
follows the second LF character, the terminal remains in graphics
mode for the next line. The terminal does not perform a line feed
function when it receives the second LF character.
Use the following procedure to set the graphics prefix character.
1.

Enter SET-UP mode and place the graphics prefix character
parameter on the screen. If the parameter has not been
set, the defaul t character (!) appears as the prefix
character.

2.

Press the = key.

3.

Press the key for the prefix character. The prefix
character may be anyone of 95 graphic text characters
(space thru -).

The graphics prefix character is now set in the terminal.

3-26

3.6.18
Single Character (SC)
When this parameter is on (SCI), the terminal sends a carriage
return (CR) character after each code or set of codes generated by
a single keystroke. The CR character is also sent after a terminal
report.
3.6.19
Local Echo (LE)
When this parameter is on (LEI), every character sent to the host
computer is automatically echoed on the screen. The host computer
does not have to transmit the character back to the terminal.
If double characters appear on the screen, turn the local echo
parameter off, since the host computer is echoing characters back
to the terminal.
3.6.2e
New Line (NL)
This parameter enables the RETURN key on the terminal to function
like the RETURN key on an electric typewriter. When the new line
parameter is on (NLl), pressing RETURN generates the carriage
return (CR) and line feed (LF) codes. When the terminal receives a
LF code, it interprets the code as a carr iage return and line
feed.
When the parameter is off (NLe), pressing RETURN generates only
the CR code; a LF code causes the terminal to perform a line feed
only.
If double line feeds occur consistently, turn this parameter off
since the computer is performing this function.
3.6.21
Auto Hardcopy (AH)
This parameter allows the operator to make a continuous hardcopy
record of all text that appears on the screen. When the auto
hardcopy parameter is on (AHI), the printer copies the screen:
1.

Just before the screen is cleared

2.

Each time an entire display of new lines scrolls onto the
screen.

3.6.22
Auto Wraparound (AW)
This parameter determines where the next character will appear on
the screen after reaching the end of the current line. When the
auto wraparound parameter is off (AWe), all characters received
after reaching the end of the line appear in the last character
position of that line. For example, take an 84-character line.
With the parameter off, the eighty-fifth text character received
appears at the end of the current line and replaces the character
already located there. This continues until the terminal receives
a carriage return character.
When the parameter is on (AWl), the eighty-fifth text character
received appears in the first character position on the next line.

3-27

3.6.23
Key Repeat (KR)
This parameter allows a key to automatically repeat when you hold
the key down for more than 0.5 seconds. The repeat rate speeds up
to about 30 characters per second when you hold the key down for
more than 1.5 seconds. The key repeat parameter affects all but
the following keyboard keys.
BREAK
ESC
NO SCROLL
SET-UP
RETURN
CTRL and any other key
PFI to PF4
SHIFT
3.6.24
Keyclick
The keyclick is a
key. The keyclick
needs. However,
operator is more
the keyboard.

(KC)
tone generated
may be turned
research and
accurate when

every time the operator presses a
on or off to suit the operator's
experience have shown that an
there is an audible feedback from

The keyclick volume is not adjustable.
3.6.25
Margin Bell (MB)
This parameter acts like the bell in a typewriter.
When the
margin bell parameter is on (MS1), the VK100 terminal sounds a
tone to alert the operator that the cursor is nine characters from
the end of the cuirent line.
3.6.26
Terminal Mode (TM)
The VK100 terminal follows two different programming standards -Amer ican National Standards Insti tute (ANSI) and VT52. In ANSI
mode (TM1), the VK100 terminal generates and responds to coded
sequences per ANS I standa rds X3. 41-1974 and X3. 64-1977 • In VT52
mode (TM0), the VK100 terminal is compatible with previous DIGITAL
software used on the VT52 video terminal. Chapter 4 summari zes
both ANSI and VT52 modes.
3.6.27
Keypad Mode (KP)
In normal (numeric) mode (KP0), the auxiliary keypad keys transmit
the ASCI I codes for the characters engraved on the keycaps, (for
example 0 to 9). The ENTER key acts like the RETURN key on the
main keyboard. In appl ication mode (KP1), these keys transmi t
unique escape sequences. Chapter 4 provides the exact escape
sequences.
3.6.28
Cursor Key Mode (CK)
In normal (cursor) mode (CK0), the four cursor keys send the ANSI
cursor movement escape sequences. In appl ication mode (CKl) , the
cursor keys transmit unique control sequences. Chapter 4 provides
the exact escape sequences. In VT52 mode (TM0), this parameter has
no effect; the four cursor keys send the codes listed in Table
4-1.
3-28

3.6.29
Programmed Keypad Mode (PK)
The VK100 terminal can be programmed to send special sequences for
any or all of the auxiliary keypad keys. When the programmable
keypad parameter is on (PKl), keys that are programmed to send
special code sequences send those sequences. Keys not programmed
are not affected. If the parameter is off (PK0), all cursor and
auxiliary keypad keys transmit their normal sequences as selected
by the TM, KP, and CK parameters.
Tablet Locator Mode (TL)
3.6.30
This parameter defines how to move the locator mode cross-hair
cursor. When the parameter is off (TL0), move the cross-hair
cursor by pressing one of the four arrow keys on the keyboard. The
cross-hair cursor moves in the direction of the arrow on the key.
When this parameter is on (TLl), an optional tablet pen or cursor
positions the cross-hair cursor.
The optional tablet connects to the VK100 terminal at the Hardcopy
connector. When the tablet is connected, the terminal cannot be
connected to a printer.
3.6.31
United Kingdom Character Set (UK)
The VK100 terminal contains two different character sets: the
United States ASCII character set and the UK (United Kingdom)
character set. The difference between the two sets is one
character, the # or b sign. When this parameter is on (UKl), the
UK pound sign b appears instead of the # sign.
Setting this parameter does not immediately change the character
that appears on the screen. To obtain the desired character set
reset the terminal.
The defaul t SET-UP swi tch pack settings determine the defaul t
value of this parameter. Section 2.5 of Chapter 2 provides
information on how to set these switches.
3.6.32
Communications Interface (CI)
This parameter selects the communications interface (EIA or 20 rnA
current loop) used to connect the terminal to the host computer. A
parameter setting of CI0 selects EIA communications. CII selects
the 20 rnA communications. This parameter must be set correctly for
the VK100 terminal to communicate with the host computer.
The defaul t SET-UP swi tch pack settings determine the defaul t
value of this parameter. Section 2.5 of Chapter 2 provides
information on how to set these switches.
3.6.33
Hardcopy Speed (HS)
Set the hardcopy speed to match the hardcopy pr inter's transmi t
and receive speed. The VK100 terminal can transmit data to the
hardcopy printer at anyone of the following preselected speeds:
110, 300, 600, 1,200, 2,400, 4,800, 9,600 and 19,200 baud.

3-29

3.6.34
Power Frequency (PF)
This parameter matches the terminal's video output signals to the
monitor characteristics affected by the power line frequency.
During the terminal installation, set this parameter for the power
line frequency, 50 or 60 Hertz. In the US, the correct setting is
60 Hertz (PFr2l).
The defaul t SET-UP swi tch pack settings determine the defaul t
value of this parameter. Section 2.5 of Chapter 2 provides
information on how to set these switches.
Interlace (IL)
3.6.35
Interlace describes a method of displaying characters on the
screen. When the interlace parameter is on, every other scan line
(row of horizontal dots) appears on the screen. After a complete
scan of the screen, the terminal returns to start and scans the
lines that were skipped. When the parameter is off, every scan
line appears on the screen in order.
Using the interlace parameter with a monitor that does not need an
interlaced video input causes the screen to flicker. When using
the Barco Model GD33 moni tor wi th the VK100 terminal, turn the
interlace parameter off (IL0).
3.6.36
Self-Test (ST)
This parameter selects the internal test programs
performs. The following programs are available.
Clear all selected testes) (0)
Power-up test (1)
External communications test (2)
Hardcopy communications test (3)
Display pattern test (4)
Color bar test pattern (5)
Repeat the selected testes} until failure

the

terminal

(9)

The self-test parameter allows the operator to select more than
one test program. To do this type the number of each test program
to be run. The terminal performs the testes) after exiting SET-UP
mode by pressing SET-UP.

3-30

CHAPTER 4
PROGRAMMING SUMMARY

4.1
INTRODUCTION
This chapter summarizes the programming characteristics
VK100 terminal. The summary covers the following topics.

of

the

Codes generated by the keyboard
Character sets
Terminal actions to control sequences
modes

in both ANSI and VT52

ReGIS command structure
BASIC command structure
4.2
KEYBOARD CODES
The following paragraphs describe the codes generated by the VKl00
terminal keyboard.
4.2.1
Standard Key Codes
The VK100 terminal keyboard
resembles a standard office
typewriter. In addition to the standard typewriter keys, the
terminal has keys to generate control functions and cursor control
commands. Figure 4-1 shows the VK100 terminal keyboard layout and
the ASCII codes generated by each key.
4.2.2
Cursor Control Key Codes
The VK100 terminal's main keyboard contains four cursor control
keys. Table 4-1 lists all the possible codes generated by these
keys. The operator selects the ANSI/VT52 mode wi th the terminal
mode (TM) SET-UP feature, and the cursor key application mode with
the set mode (SM) and reset mode (RM) control functions.

4-1

D

DDDD

OCTAL CODES GENERATED BY KEYBOARD
(SHIFTED CODES SHOWN ABOVE LEGENDS;
UNSHIFTED CODES SHOWN BELOW LEGENDS)

0:0

D

033 41 ~OO [lZ]43 D!J44 [t1J45 GZJ36 (}!]46 D:J52 [Z050 rnJ51 ~37 Q!]53
[I:D76
\ 033 061 062 063 064 065 066 067 070 071 060 055 075+ 140
010
011 D I1~71~11~2111~41~~rrl~r¥1r;rlf1?Tl
167 Ulli 162 164 LillJLillJL...illJLillJ~LELJLillJ
llrTlI1~3111~ 111~6111g71~~f1J3l~f072ll ~4? I R~~~N
D L----.JLWJ
163 144 146 147 ~L.!,gJLillJl.!hJL.QziJ 047 ~~0..:.15::......... . . .~
ESC

1!

3 /I

2@

4$

5%

6

1\

7&

8 •

9(

0 )

•-

B CK
StAcE

=

DI.~~1f1flf1¥lITg3lr¥1~~~~~~D
.LillJlii2JURJ~Uill~~~~Li£J
I
:~
I

MA3388

Figure 4-1 Keyboard-Generated ASCII Codes

Table 4-1 Cursor Control Key Codes
Cursor Key
(Arrow)

VTS2
Mode

Up
Down
Right
Left

ESC
ESC
ESC
ESC

A
B
C
D

ANSI Mode/Cursor
Key Mode Reset

ANSI Mode/Cursor
Key Mode Set
(Application)

ESC
ESB
ESC
ESC

ESC
ESC
ESC
ESC

[
[
[
[

A
B
C
D

4-2

0
0
0
0

A
B
C
D

4.2.3
Auxiliary Keypad Codes
The VK100 terminal contains an auxiliary or numeric keypad to the
right of the main keyboard. Table 4-2 shows all the possible codes
generated by the numer ic keys. Table 4-3 shows all the possible
codes generated by the program function (PF) keys. The operator
selects the ANSI/VT52 mode wi th the terminal mode (TM) SET-UP
feature, and the keypad applications mode with the set mode (SM)
and reset mode (RM) control functions.

Table 4-2

Auxiliary Keypad Numeric Key Codes

Key

Keypad Numeric
Mode

Keypad Application Mode
ANSI
VT52

0
1
2
3
4
5

0
1
2
3
4
5

6
7
8
9

6
7
8
9

ESC
ESC
ESC
ESC
ESC
ESC
ESC
ESC
ESC
ESC
ESC
ESC
ESC
ESC

,
ENTER

Table 4-3

Same as RETURN

0 P
0 q

o

r
0 s
0 t
o u

o

v

0
0
0
0
0
0
0

w
x
Y

m
1
n
M

Auxiliary Keypad PF Key Codes

Key

Keypad Numeric Mode/
Keypad Application Mode
ANSI
VT52

PFI/HARDCOPY
PF2/LOCTR
PF3/TEXT
PF4/RESET

ESC
ESC
ESC
ESC

0
0
0
0

P
Q

R
S

ESC
ESC
ESC
ESC

4-3

?
?
?
?

P
Q

R
S

ESC
ESC
ESC
ESC
ESC
ESC
ESC
ESC
ESC
ESC
ESC
ESC
ESC
ESC

?
?
?
?
?
?
?
?
?
?
?
?
?
?

P
q
r
s
t
u
v

w
x
Y

m
1
n
M

4.2.4
Control Characters
The VKl"" terminal generates and supports certain control
characters. Figure 4-2 shows the control characters generated by
the terminal keyboard. Table 4-4 lists the control characters
supported by the VKl"" terminal, and the action the terminal takes
when it receives each control character. The terminal ignores
control characters that it does not support.

OCTAL REPRESENTATION OF CODES
GENERATED BY KEYBOARD WITH CTRL
KEY HELD DOWN (MNEMONICS SHOWN

D

DDDD

ABOVE LEGENDS; OCTAL CODES SHOWN
BELOW LEGENDS.)

!!~ DDDDDDDDDDDD~ s~'\~ D

I T~TB I X~N I I E~Q I D~211 D~ I E~ I N~K I~ml D~E I Ir

(154 8 ) •

1*
1*
1*
1*

4.4.1.8 Reports
There are three types
control sequences.

of

reports wi th

the

following

escape

and

Cursor Position Report
Invoked by: ESC [ 6 n
Response is: ESC [ PI ; Pc R
PI equals the line number; Pc equals the column number.
Status Report
Invoked by: ESC [ 5 n
Response is: ESC [ ~ n

(terminal ok)

What Are You
Invoked by: ESC [ c or ESC [ ~ c
Response is: ESC [ ? 5 ; ~ c or
ESC [ ? 5 c
(Meaning:
I am GIGI terminal.)
Al ternately invoked by ESC Z
same.
4.4.1. 9

(not recommended).

Response

is the

Reset

ESC c
Reset executes the reset routine. The SET-UP parameters, BASIC
program, and soft character sets are not destroyed. This is the
same as pressing SHIFT and PF4.
4.4.l.l~

Print Commands

Sequence
ESC t 7
ESC

Pn; Pn !q

Function
Print display image (same as pressing
SHIFT and PF1.)
Print partial image

Pn is a numeric parameter; these parameters specify start and stop
line numbers inclusive.
4.4.1.11 Confidence Tests
Sequence
ESC t 8
ESC [ 3 ; Pn ; ••• y

Function
Generate crosshatch pattern on display
Perform self-tests

4-12

Pn selects the test to be performed as follows.
Pn
1
2
3
4
5
9

Test Selected
All power-up tests
External communications test
Hardcopy communications test
Display pattern test
Color bar test
Repeat selected tests until failure

4.4.1.12 Device Control Strings
Sequence

Function

ESC P
ESC P
ESC P
(host
ESC P
ESC \

ReGIS data to follow
SET-UP data to follow
Auxiliary keypad data to follow

P (host to terminal)
r (host to terminal)
key ID code s
to terminal)
q (terminal to printer)

Hardcopy data to follow*
String terminator

* This string is generated by the VK100 terminal and sent to the
LA34VA graphics printer. The VK100 terminal does not process the
string.
All device control strings
terminator. For example:
ESC P r
4.4.2

must

be

terminated

with

a

string

SET-UP data ••• ESC \
VT52 Control Functions Summary

Sequence

Function

ESC
ESC
ESC
ESC
ESC
ESC
ESC
ESC
ESC
ESC
ESC

Cursor up
Cursor down
Cursor right
Cursor left
Select soft character set 1
Select ASCII character set
Cursor to home
Reverse line feed
Erase to end of screen
Erase to end of line
Direct cursor address

A
B

C
D
F
G
H
I
J

K
Ylc*

* 1 equals line number, c equals column number. Line and columr
numbers for direct cursor address are single character codes
whose values equal the desired number plus 37 • Line and column
numbers start at 1.
8

4-13

Sequence

Function

ESC
ESC
ESC
ESC
ESC
ESC
ESC

Identify
Enter alternate keypad mode
Exit alternate keypad mode
Enter ANSI mode
Dump hardcopy
Enter graphics mode (ReGIS)
Exit graphics mode

Z+

=
>

<

]
Pp
\

+ Response

to ESC Z is ESC / Z. This is not recommended; use What
Are You report in ANSI mode.

4.4.3
ReGIS Summary
The following summary of ReGIS commands serves as a quick
reference guide.
Refer to the software documentation for more
information on any command or command argument. Chapter I provides
a complete list of all the documentation available along with
ordering information.
ReGIS Commands (graphics mode only)
Function

Command
Screen

d

[x, y]

[dx ,dy]
(W )
(E rase)
(A ddressing [xl,yl]

[x2,y2])

(A ddressing)
(N egate 1)
(N egate 0)
(T ime nnn)
(H

ardcopy [,Yl]

[,Y2])

(I ntensity

o

to 7)
(D» dark
(8 lue»
(R ed»
(M agenta»
(G reen»
(C yan»

Screen scroll offset,
quantified to [12,8].
Move this address to
upper left corner.
Scoll screen by this
amount.
Writing controls.
Clear data and set
foreground color.
Compatibility with
other ReGIS devices.
Restore native
addressing.
Reverse video.
Restore video to normal
mode.
In 60ths (PF0) or 50ths
(PFI) of a second.
Print hardcopy between
Y coordinates.
Screen background
intensity/color.
Dark to bright.

Red + blue.
Green + blue.

4-14

Function

Command

Red + green.
Red + green + blue.

(Y ellow»
(W hite»
(n ue
~ to 36~»
(L ightness
~ to l~~»
(S aturation
~ to l~~»
Write

Angle on color wheel.
Percentage.
Percentage.
Writing intensity/color
null; change colors.
Dark to bright.

(I ntensity
to 7)
dark
(B lue»
(R ed»
(M agenta»
(G reen»
(C yan»
(Yellow»
(W hite»
(n ue
~ to l~~»
(L ightness
~ to l~~»
(S aturation
~ to l~~»
(A lternate
1)
~

(0»

Red + blue.
Green + blue.
Red + green.
Red + green + blue.
Angle on color wheel.
Percentage.
Percentage.
Flashing on.
Flashing off.
Set shading axis.
Set shading character.

~)

(S hade from [ , Y] )
(S hade with "c")
(S hade

1)

Shade on, line pattern
shading.
Shade off.
Pixels per offset
vector.

~)

(M

ultiplier nnn)

(N

egate
1)

Negative writing (invert
pattern bits).
Positive writing.
Exclusive OR pattern
with bit map.
Logical OR pattern
with bit map.
Write "negate" setting.
Replace, ignore bit map
data.

~)

(C omplement)
(oVerlay)
(E rase)
(R eplace)

4-15

Function

Command
(P attern
bbbbbb)

Binary bit pattern,
fills to 8 places.
Multiply each bit
pattern.
Solid line.
Digits 2--9 specify
standard patterns.

(Md) )

1)
p)
Position

[X,Y]
[dx,dy]

Absolute position.
Relative position,
d is offset vector,
0--7.
Temporary write
controls.
Begin position
sequence -- save
position
(up to 7 levels).
End and restore
starting position.

d

(W
(B eg in)

(E nd)

Vector

[ ]

Write point at
current cursor position.
Absolute position.
Relative position,
d is offset vector,
0--7.
Temporary write
controls.
Begin closed polygon
sequence.
Draw to starting
position.

[X,Y]
[dx,dy]
d
(W ••• )
(B eg in)
(E nd)

Curve

Absolute coordinates
Relative coordinates
Offset vectors, 0--7.
Begin closed curve.
Start open curve.
End curve.
Temporary writing
controls.

[X,Y]
[dx,dy)
d

(B egin)
(S tart)
(E nd)
(W. ••

Circle

)

Absolute coordinates.
Relative coordinates,
offset vectors, 0--7.
Position is on the
circumference.
d = degrees resolution,
signed.
Temporary writing
controls.

[X,Y]
[dx,dy]
d

(C ircumference)
(A ngle d)
(W. ••

)

4-16

Function

Command
Text

Display 'string'
(includes BS, CR, LF,
TAB) •
Display "string"
(includes BS, CR, LF,
TAB).
Offset text line by
1/2 character, d =

'string'
"string"
d

0--7.

Set spacing between
characters.

[dx ,dy]
(A lphabet
o to 3)
(B

Select character set 0
to 3.
Begin temporary text
attributes
(saves 1 level).
d = 45 degrees
resolution, signed.
Restore permanent text
attributes.

eg in)

(D irection d)
(E

nd)

(H eight
o to 16)
(1

Height times base
character size
(affects S[r,e]).

talic
+ degrees)

Right slant, no. of
degrees.
Left slant, no. of
degrees.
No slant.
No. of times to repeat
bits in character.
([1,2] used for standard
si ze.)
Dimensions of character
area. [9,20] is standard
si ze. )

- degrees)
(M

0)
ultiplier [r,c])

(S ize [r,c])
(S i

ze

o

to 16)

Select one of 17
predefined character
sizes.
Temporary writing
controls.

(w. •• )
Load

(A lphabet
1 to 3)

Select character set 1
to 3.
I to 10 character name
for character set;
see R(L).
Load specific letter
with pattern.

'name')
"c· <10 hex pairs >
4-17

Command

Function
'c' 

@

letter
:1 etter

Report

Load specific letter
with pattern.
Invoke macrograph
"letter".

••• @;

Load macrograph
"letter".
Clear all macrographs.

(L oaded)
(M

acrographs
(letter ,

Currently loaded
character set name.

...

Report contents of
macrograph "letter".
Report macrograph
space usage.

))

(=) )

(P osition)

Current position.
(I interactive»
(M

Enter locator mode.
Arrow increments.

[+dx,+dy]»
acrographs
(letter) )

Report contents of
macrograph 1.
Report macrograph space
usage.

(=) )

Resynchronization
character.

;

Offset vectors are:

3

2

4

*

5

To initialize ReGIS:

6

1

e
7

;S (I e N e A) W (V I 7A e S e MIN e P 1
M 2) T (I e A e DeS 1) p[e,e]

4-18

4.4.4
BASIC SUMMARY
The following summary of the BASIC commands serves as a quick
reference guide.
Refer to the software documentation for more
information on any command or command argument. Chapter 1 provides
a complete list of all the documentation available along with
ordering information.
4.4.4.1

Commands/Statements

AUTO
CTRLO
DIM
ERASE
FOR ••• NEXT
IF ••• THEN[ ••• ELSE]
LINPUT
NEXT
ON ••• GOSUB
PRINT
READ
RUN
TRON/TROFF
4.4.4.2
ABS
COS
GON$
INSTR
LOG
RIGHT$
SPACES
STRING$

CLEAR
DATA
ECHO
ERL
GOSUB ••• RETURN
IF ••• GOTO
LIST
NO ECHO
ON ••• GOTO
RANDOMIZE
REM
SAVE
WAIT

CONT
DEF FN
EDIT
ERR
GOTO
INPUT
MID
OLD
OPTION BASE
RCTRLC
RESTORE
STOP
WHILE ••• WEND

CTRLC
DELETE
END
ERROR
HOST
LET
NEW
ON ERROR GO TO
OUT
RCTRL
RESUME
SWAP
WIDTH

Functions
ASC
EXP
HEX$
INT
MID$
RND
SPC
TAB

ATN
FRE
INKEY$
LEFT$
OCT$
SGN
SQR
TAN

4-19

CHR$
GOFF$
INP
LEN
POS
SIN
STR$

CHAPTER 5
THEORY OF OPERATION

5.1
INTRODUCTION
The VK100 terminal is a graphics terminal which displays
information from the keyboard
in local mode or displays
information from the host computer in on-line mode. The system
prints the display data on the Graphic Line Printer (LA34VA). A
writing tablet can also be connected to the hardcopy port. Only
one type of device may be connected to the hardcopy port, graphics
line pr inter or the wr i ting tablet. Figure 5-1 shows the block
diagram of the VK100 system.

CPU

120/240

AC

POWER
SUPPLY
+5,+12
-12

TO
REGULATED

Ir-----...,

20MA
~~
HOST
~ COMPUTER
EIA

-5V

L . . _- - - - - '

HARD
COpy

KEYBOARD
MA-8150

Figure 5-1 VK100

(GIGI) Block Diagram

5-1

5.2
TERMINAL CONTROLLER MODULE
This chapter describes the functional theory of the VK100 (GIGI)
Terminal. The terminal controller module is divided into five
sections (Figure 5-2):
1.

2.
3.
4.
5.

CPU
Vector Generator
I/O Ports
Keyboard
Power Supply

5.2.1
Central Processing Unit (CPU)
The CPU is an 8085 ch i P i 8-bi t gene ral purpose mi c roprocesso r
capable of accessing up to 64K bytes of memory. Figure 5-3 shows a
functional block diagram of the CPU.
The microprocessor

(8085A) performs the following functions.

Clock generation
Interrupt priority selection
System bus control
Executing the instruction
The CPU transfers data on an 8-bit bidirectional Tri-State Bus
(AD0--AD7) tha t i s time mul t i pI exed to transmi t the e igh t low
ordered address bits. Address bits A8--A15 expand the address
capability to 16 bits, allowing the CPU to directly access 64K
bytes of memory.
The CPU generates signals telling peripheral devices what type of
info rma tion is on the mul t i pI exed add ress/data bus. Figure 5-4
shows the basic CPU blocks. The CPU is a single chip that performs
the following machine cycles.
Memory write
Memory read
I/O write
I/O read
Opcode fetch
INT ACK (interrupt acknowledge)
Bus idle
Table 5-1 shows the machine cycle status and control signals.
The execution of any CPU program is a sequence of read and write
operations. Each operation transfers a byte of data between the
CPU and a specific memory or I/O address.
Each read or write operation is referred to as a machine cycle.
The execution of each instruction by the CPU includes
a sequence
of from one to five machine cycles. Each machine cycle contains a
minimum of from three to six clock cycles (also referred to as T
states). Figure 5-5 shows an instruction cycle for Store
Accumulator Direct (STA).

5-2

DATA BUS 00-07

------.,

,....,VECTORGENERATOR-

ri

CPU

l!

ADR/DATA
A8-A15

I

IAO-A7

1/0 RD.
I/O WRT.
AO-AS

ADDRESS
MUX

AO-A12

Al-AO

111

I

rI/OPORT

W

- -

- -

- -

COMMUNICATION
INTERFACE
8251-A

rI KEYBOARD -,I

f'KEYBOARD - - -,

MATRIX

DETECTS
SWITCH

LD EXECUTE

"",. LV""

- ---

i

OR
SWITCHES
DEPRESSED

I
I
I

..... ....,"....... 11

r-o;,.;::;;:;o; ~A~- ]

LED

•
PORT
L
___
I_ _ _ _

I _I CONTROL &1

BDO-BD7

CLICKER

L __ _
BITO-BIT 3

---~

---------

-LCLICKER
I

-l

"-

I

I
L

I

_-=-::'J
MA-Bl48

Figure 5-2 System Overview Block Diagram

RST 6.5

I

INTERRUPT CONTROL

I

I

SERIAL I/O CONTROL

11

,fJ

'7

8·81T INTERNAL DATA BUS

A

A

11

,J

'7

'7

ACCUMULATOR
(A REG.)

FLAG (5)
FLlP·FLOPS

TEMP. REG.
(8)

(8)

"\.7
INSTRUCTION
REFISTER

U1

~

I
01:>0

ARITHMETIC
LOGIC
UNIT
(ALU)

D

B
REG
D
REG
H
REG

(8)

(8)

(B)
(8)

C
REG
E
REG
L
REG

INSTRUCTION
DECODER
AND
MACHINE
CYCLE
ENCODING

(8)

TIMING AND CONTROL

CLKtUT

CONTROL

r
READY

tJ

t

:,

J/M

(8)
(8)
~ REGISTER

ARRAY
(16)

PROGRAM COUNTER

(16)

INCREMENTER/DECREMENTER
(16)
ADDRESS LATCH

~
(8)

ADDRESS BUFFER

I

~) ~,)
DATA/ADDRESS BUFFER

(8)1

~

RESET

~

STATUS

A!E

(8)

STACK POINTER

POWER { _ +5V
SUPPLY
_GND

CLK
GEN

A

fI--

v

X,_
X,-

1

r
HOLD

HLtA

r
RESET IN

~

RESEJ OUT

Ag

IS

ADDRESS/DATA BUS

7
ADQ.7
ADDRESS/DATA BUS
MA-8149

Figure 5-3 CPU Functional Block Diagram

XTAL

~

~
INTR

CPU

8085

INTA
RESET IN
RESET OUT

/

...

.A

"

V

ADDRESS BUS
ALE
MULTIPLEXED
ADDRESS/DATA BUS

AD
WR

110M

II

so
S1
MA·8147

Figure 5-4 Basic CPU Block Diagram

Table 5-1

Machine Cycle Status and Control
Status
I/O M Sl

Machine Cycle
Op Fetch
Memory Read
Memory Write
I/O Read
I/O Write
INTR Acknowledge
Bus Idle*

0

=

Logic "0", 1

(OF)
(MR)
(MW)
(lOR)
(lOW)
(INA)
(BI) :DAD
INA (RSTS/TRAP)
HALT

=

Logic "1", TS

=

0
0
0
1

1
1
0

1
TS

SO

Control
RD WRT INTA
1

1

1

1
0

1
1

0

0

1

1

0

1

1
1

1
1
0

0
1
0

1
1

1
1
1
TS

1
1
0

1
1

1
0

0
0

0
1
0

1

1
TS

1
1
1

High Impedance

* Bus idle (BI) only occurs in response to:
1. DAD instructions
2. During an acknowledge of RSTS, TRAP, or HALT instructions.

5-5

IMACHINE
CYCLE
TSTATE

-I

INSTRUCTION CYCLE

,_

Ml

Tl

T2

-,T3

T4

M2

Tl

T2

-,T3

M3

Tl

T2

_I_
T3

M4

Tl

T2

-,
T3

CLK
TYPE OF
MACHINE CYCLE

MEMORY READ

ADDRESS BUS

THE ADDRESS (CONTENTS OF THE
PROGRAM COUNTER) POINTS TO
THE FIRST BYTE (OPCODE) OF THE
INSTRUCTION

DATA BUS

INSTRUCTION OPCODE (STA)

MEMORY READ

MEMORY WRITE

THE ADDRESS (PC + 1) POINTS
TO THE SECOND BYTE OF THE
INSTRUCTION

MEMORY READ

THE ADDRESS (PC + 2) POINTS
TO THE THIRD BYTE OF THE
INSTRUCTION

THE ADDRESS IS THE DIRECT
ADDRESS ACCESSED IN M2
AND M3

LOW ORDER BYTE OF THE
DIRECT ADDRESS

HIGH ORDER BYTE OF THE
DIRECT ADDRESS

CONTENTS OF THE
ACCUMULATOR

U1

I

m

MA-8192

Figure 5-5 Instruction Cycle for Store Accumulator Direct

The CPU can address up to 256 different I/O addresses. These
add resses have the same numer i cal val ues (13 13 through FF Hex) as
the first 256 memory addresses. The 256 I/O locations are selected
by the I/O M output.
The status signals, I/O M, 81, and 813, define what type of machine
cycle is about to occur. The I/O M signal identifies the machine
cycle as either a memory reference or input/output operation. The
81 status signal identifies whether the cycle is a read or write
operation. 813 and 81 can be used together (see Table 5-1) to
identify read, write, opcode fetch, or halt machine cycles. Figure
5-6 shows the timing and control for an opcode fetch.
5.2.1.1 Address -- When the CPU generates a 16 bit address, the
lower byte is latched and the upper byte is held active by the
CPU. Bits Af3--AI5 address the following:
RAM Memory
Af3--A7 -- Row address bits
A8--AI5 -- Column address bits
ROM Memory
Address bits A13,
l,and ENA ROM 2.
ROM.

A14, and A15 generate ENA ROM 13, ENA ROM
Address bits Af3--AI2 address the selected

Register Control
Address bits Af3--A6 address and generate register load pulses.
Table 5-2 shows an address map.

SIGNAL

ClK
10/;1,

S1, SO
UNSPECIFIED

I
I
----1---1---ALE

MA·8193

Figure 5-6 Opcode Fetch Machine Cycle

5-7

Table 5-2 8292 Pin Description
Pin Name

No.

I/O

Pin Description

6

I
I
I
I
I
I
I

Low-Order Address. These Address
inputs generate the ROW
Address for the Multiplexer. If
AL 6 /OP is pulled to +12V
througX a 5KX resistor, the 8202
configures itself for 4K RAMs. If
AL h /OP 3 is driven with TTL levels,
th~ 8202 configures itself for 16K
RAMs.

39
38

I
I
I
I
I
I
I

High-Order Address. These Address inputs generate the
Column Address for the Multiplexer.
If the 8202 is configured for 4K
RAMs, use AH as an active high
chip select ¥or memory controlled
by 8202. For 16K RAM operation, AH
becomes the most significant cOlumR
address bit.

7
9
11
13
15
17
19

o
o
o
o
o
o
o

Output of the Multiplexer. These
outputs drive the addresses
of the Dynamic RAM array.
For 4K RAM operation, OUT 6
drives the 2104A CS input.
(Note that the OUT 0 _ 6 pins do not
require inverters or drivers for
proper operation.

WE

28

o

Write Enable. This output drives
the Write Enable inputs of the
Dynamic RAM array.

CAS

27

o

Column Address Strobe. This output latches the Column
Address into the Dynamic RAM
array.

21

o
o
o
o

Row Address Strobe. These outputs
latch the ROW Address
into the bank of dynamic RAMs
selected by the 8202 Bank Address
pins (B 0 , B 1 /OP1).

8
10
12
14
16
18

5
4

3
2
1

22

23
26

5-8

Table 5-2 82e2 Pin Description (Cont)
Pin Name

No.

I/O

Pin Description
Bank Address.
These inputs
select one of four banks of
dynamic RAM via the RAS
outputs. If the B1/OP 1 inp~t3is pulled
to +12V througfi a SKI resistor, the
8202 configures itself to the Advanced Read mode.
This mode
changes the function of the 8202
RD/S.1 and REFRQ/ALE inputs and
disaoles the RAS 0 and RAS l outputs.

RD/S l

32

I

Read/S l input. This input requests
a read cycle. In normal operation,
a low on this input informs the
arbiter that a read cycle is
requested.
In the Advanced Read
Mode, this input accepts the S
status signal from the 8085A (fully
decoded for a read). The trailing
edge of ALE informs the arbiter that a
read cycle is requested by latching Sl'

WR

31

I

Write Input. This input requests a write
cycle. A low on this input informs the
arbiter that a write cycle is desired.

PCS

33

I

Protect ed Chip Select. A low on this
input enables the WR and RD/S inputs. PCS is protected against terminating a cycle in progress.

REFRQ/
ALE

34

I

Refresh Request/Address Latch Enable.
During normal operation, a
high on this input indicates to the
arbiter that a refresh cycle is being
requested. In the Advanced Read
Mode, this input latches the
state of the 8085 Sl signal into the
RD/S l input.
If Sl is high at this
time, a Read Cycle is requested.
In
this mode, transparent refresh is not
possible.

XACK

29

0

Transfer Acknowledge.
This output
is a strobe indicating valid data
during a read cycle or data written
during a write cycle.
XACK can
latch valid data from the RAM array.

5-9

Table 5-2 8292 Pin Description (Cont)
Pin Name

No.

I/O

Pin Description

SACK

30

o

System Acknowledge.
This output
indicates the beginning of a memory
access cycle. It is also an
advanced transfer acknowledge to
eliminate wait states.
(Note: If a
memory access request is made
during a refresh cycle, SACK is delayed until XACK occurs in the memory
access cycle).

36
37

I
I

Crystal Inputs. These inputs are designed for a quartz crystal to control
the frequency of the oscillator. If
X~/OP? is pulled to +12V through a
lKl resistor, XI/CLK becomes a
TTL input for an external clock.

TNK

35

Tank.
This pin provides a tank
circuit connection.

vcc

40

+5V + 10%

vss

20

Ground

5.2.1.2

ROMs -- Four ROMs hold the firmware to run the system:

Three 8K by 8 ROMs
One 4K by 8 ROMs
This means there are
uses only 26K.

28K of

firmware

space,

however,

the

system

When the CPU reads the ROMs, it sends out an address (A12--A0) to
the ROM. Address bits A13 and A14 select one of the four ROMs. A15
is high for all memory addresses. The ROM addresses follow:
0000--lFFF
2000--3FFF
4000--5FFF
6000--63FF

(ROM
(ROM
(ROM
(ROM

0)
1)
2)
3)

The CPU sends out the control
signals are active low.

E53
E52
E51
E50
signals RD and

I/O M.

Both these

The data from the selected ROM is placed on the data bus and sent
to the CPU.

5-10

5.2.1.3

RAMs -- There are two RAMs in the system:

System RAM
Contains the CPU stacks, work areas and User's programs
Screen RAM
Stores the CPU data and attributes to be displayed on the CRT.
The System RAM and the Screen RAM both are 16K by 1 RAMs.
Screen RAM is described in the Vector Generator section.
following paragraphs describe the system RAM.

The
The

For any memory operation to occur, the CPU generates the following
actions.
Address
Control
Data
Figure 5-7 shows how the CPU controls the System RAM.

Address -- The address range of the memory is 8000--BFFF. The
address bi ts, A0--AI5 go to the Dynamic RAM Controller (8202).
The address bits contain the following information:
1.
2.
3.

Row Address (A0--A6)
Column Address (A7--A15)
Row Address Selection (RAS0--3)

(A14, A15).

B1-DIRECTIONAl
LATCH

I

B202

(AO-A6 ROW)
(A7-AI3 COLUMN)
OUT 6-0UT 0

ADR-RANGE
8000-BFFF

MEMORY
RAsO-RAS3

CPU

--- - -+-----,/
PCAS

16K X 1RAMS
(8)

CONTROL
WRITE
110M, RD AND WR
ClK
22mHZ
MA8146

Figure 5-7 CPU to RAM Memory Block Diagram

5-11

Memory addresses wi thin the 8000--BFFF range
This combination selects RAS2.

have A15=1,

A14=0.

Control -- The control signals are I/O M, RD and WRT. When low the
I/O M signal enables the 8202 to receive RD or WRT commands. If
high the I/O M signal prevents the 8202 from starting a memory
cycle. The address at this time an I/O address.
Data -- The data path to and from
5-6.

the memory is shown

in Figure

Figure 5-8 shows the block diagram of the 8202 and its pin
configuration. Refer to Table 5-2 for the 8202 pin description.
5.2.1.4 Data Bus -- The data bus is a Tri-State bus that connects
the CPU to the following.
RAM (memory)
ROM
I/O Port
Keyboard
Figure 5-9 shows the data bus.
The CPU time multiplexes the low byte of the Data/Address Buffer.
When the CPU reads a val id add ress, the data is gated onto the
Tri-State Data Bus. When active, the direction signal RD allows
the data in the data latch. The CPU then loads the data into the
Data/Address buffer. When the CPU wr i tes a val id address, WRT
determines the data flow direction. This implies RD is high and
the data is gated on the Tri-State Data Bus.
5.2.1.5 Control Functions
divided into two groups.
1.
2.

The

CPU

control

functions

are

Memory control
Register control

Memory control generates memory reads, writes and opcode fetches.
Table 5-1 shows the memory control for these operations.
The reg isters that the system uses as control
addresses.

reg isters are

I/O

This means the CPU generates the following sequence.
1.
2.
3.

Address (of register)
Data
Control
a)
I/O M H (The address is an I/O Address)
b)
RD
c)
WRT

Address bits A0--A6 generate the
signals (Tables 5-3, 5-4 and 5-5).
5-12

appropriate

register

control

J

:~~RESSES

VCC
AH5

TYPICALLY

AH6

FROM
PROCESSOR

X1/CLK

Ao-AI3

i

AL05
AL.IOP, - - - - -......
AH

MULTIPLEXED
TO DYNAMIC RAM
ADDRESS PINS

'"

-----0-6 _ _ _ _ _ _; /

OUTO_6

XO/OP 2
TNK
REFROIALE

U1

I
I-'
W

"1

OUT2

11

~r
30

SACK

AL3

12

29

XACK

OUT3

13

28

WE

OUT 1

9

AL2

10

32

RD/S1

31

WR

AL4

READ AND WRITE{
AD
REQUESTS
PROTECTED CHIP SELECT{
~
EXTERNAL REFR
REFRO
REQUEST

24

BO

L..._ _ _ _

RAS2

A Ls/OP3
OUT6

RAS 1
21

CRYSTAL

?NRp~;

CLOCK

J

l

RAsO

TIMING
AND
CONTROL

mr

B1/0P 1

AL5

VSS

WE
CAS

Bo
B,

RAS3

OUT4
OUT 5

ENCODED RAS ENABLES
TYPICALLY A, • .A, s FROM {
PROCESSOR

..r-

RAS
RAS 1
_ _2
RAS3
XACK
SACK

II-

WRITE ENABLE FOR DYNAMIC RAM
COLUMN ADDRESS STROBE

t

ROW ADDRESS STROBES
SELECTS ONE OF FOUR
BANKS

t- DATA TRANSFER COMPLETE
t- REQUESTS WAIT STATE WHEN
INTERNAL REFRESH OCCURS

XO/OP2

j

X 1/CLK - - -...... OSCILLATOR

I

RASO
MA-8144

Figure 5-8 8202 Block Diagram and Pin Description

G1G1-(VK100)
+5V
CPU
DATA
LATCH

r-CPU

TR1-STATE
BUS

DATA BUS 00-07

I--

DIR
EN

RD

-=

nn

I

I DATA
RAM

I DRIVER I

J

110
PORTS

ROMS

LATCH

(4)

AF
SHIFT
CAPS LOCK

RAM 16K
MEMORY

rv 5V

KEYBOARD
MA-8143

Figure 5-9 DATA Bus

Table 5-3 I/O Register Addresses
Address Bits
15 14 13 12

'"

0
0

'"
'"
0'"
0
0

'"
0'"
'0"
0
0

""

"'0"
)

'"

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

'"
'"
'"
'"

"0
'"

'"

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

11

Hl

9

'0"
'"
'"
'"
'"

'0"

"

'" '1" '0"
1'"
0
1 '1"
'"
'" '1" 00
1'"

0

0

'"
'"

'"
0'"
'"
'"
'"

0
0'"
0'"

'"
'"

'"
'"
0'"

0

0

'"

1'"
1
1
1
0

'"
'"
1'"
1
1
1

1
1
1
0

'1"

1
1
1
1
1

'"

0
1
1

1
0
0
1

'"

1

1

0

7

'1" '0"

"'" "

"'" " " "
'"
'"
1
1
0

8

1
0
1
0
1

0

'"
'"
'"
'"

"
0

'1"
0'"
'"

'"

0
1
0

"
"'"

0

'"
'" '"
0'"
'" '"
0

6

5

4

3

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

'"

0

'" '0" 0
1
0'"
'" 1
0'"
1'"
0
0
1
0 1
'" 1 1
'" 1 1 '1"
'" 0 0
'1"
'"
'" '" 1'" 0

'" 0'"

0

0'"
0

0
0
0

2

0

'" '"
'"
1'"
1 '"
1
0'"
'" '0"
1
'" '" 1
1
'0" 1
1 '0"
1
1
1
1
1
1
1
1
1

0
0
0

'"

1
1
1
1
1

1

'"

'"

1
1

"
0
0
1
1

1
1
0
1
0

1
0

'"

1
1

"

'"
'1"
'1"

1

'1"
'1"
'"

'" 0'"
'" 1
'1" '"
"'" 0"'"
1'"

"

Signals
I/OM RD WT
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

'0"
0
0
0
0

'"

1
0

'"
0'"

0

"
0
0

"0'0"
0
0

'"

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

Address Hex

Function

40
41
42
43
44
45
46
47
60
61
62
63
64
65
66
67
68
6C
70
71
74
78
7C

LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
EX
EX
EX
EX

40
48
50
51
58
60
68
70
78-7F

SYSTAT A
SYSTAT B
UART 0
UAR

X LO
X HI
Y LO
Y HI
ERR
SOPS
PAT
PMUL
DU
DVM
DIR
WOPS
MOV
DOT
VEC
ER

LD BAUD
LD COMD
LD COM
KYBDW

I/O WRT
0

"
""
"
0

0
0

"

1
1
1
1
1
1
1
1
1

0

'0"
'"

'"

1
1
1
1

0

'1"
1
1

'"

0
1
1

'"

1

"'"

0
0
0

" " "
'"

0

0

0
1
0
0
0
0
0

1

'"

'"

'1"

0
0
0

0
0
0

"

'"

0
1

'"

'"

0
0
0
0
0
0
0

"

1
1
1
1
1
1
1
1
1

0
0
0

'"
1'"
1
1
1

0

"
1
1
1
0
0
1
1

" "
"'" "'" '"
'"
'"
"
'" " "
0

'"
'" '"
0'"

1

1
0
0
0
1

0
1
0

0
0
1
0

5-14

0
0

0
0

1
1
1
1
1
1
1
1
1

1
1
1
1
1
1
1
1
1

I/O RD

0

"'"
'"

"'"
0
0

"

NOT USED

Table 5-4

Program RAM Addresses

CPU Address
Bits
15
1

1
1

14

'"

'1"

1

13

12

11

HI

'"

Iil

'"

'"

1

'"

1

9

8

6

7

4

5

2

3

1

'"
'" '" '" '" '" '" '" '" '" '"

1

1

1

1

1

1

8"''''''' Hex

T

1

1

1

1

1

1

'"

Iil

Iil

'" '" '" '" '" '" '" '" '" '"

1

1

1

1

1

1

1

1

1

1

1

1

16K of Address
Space
'f
B FFF Hex
Hex
C

1

T
"'''''''

16K of Address
Space
'f
F F F F Hex

1

NOTE
CPU Address Bits 15 and 14 are inputs to
the M82"'2 and are used to generate RAS'"
through RAS3
RAS
-- Enables refresh flip-flop
'" '"
to be'" cleared
RAS 1 '" 1 -- Not Used
RAS 2 1
-- Used with address range
'" BFFF Hex
8"''''''' Hex to
RAS 3 1 1 -- Used with address range
C"''''''' Hex to FFFF Hex

Table 5-5 I/O ROM Microcode Address
Address Bits
15 14

'"

'"

'"
'" '" '" '" '" '" '" '" '" '" '"

1

1

1

'"

'"

'" '" '" '" '" '" '" '" '" '" '"

1

1

1

1

'"

'"

'"

'" '" '" '" '" '" '" '" '" '" '"

1

1

1

'"

'"

'" '" '" '" '" '" '" '" '" '" '"

'1"

'"
'"
'"

'"
'" '" '" '" '" '" '" '1" '1" '1" '1"
'" '" '" '" '" '" '"

'"

'"

'"

'"

'1"

ROM 1

'"
'"

'1"

ROM 2

'"
'"
'"

1'"

ROM 3

'"

1
1

*

'"
'"
'"

1
1
1

1
1
1

'"

1

1

1

1

1

1

1

1

1

1

1

1

1

6

1

1

1

1

5

1

1

1

1

1

1

1

1

3

1

11

ROM '"

7

2

12

1'" 9

8

4

13

1

1

1

1

1

1

1

1

1

1

1

1

* ROM 3 and Bit 12 equal to a 1 implies Keyboard address

5-15

Address
Space

Hex
Address Range

8K of Address
Space

"'''''''''' HEX

1
8K of Address
Space

1
8K of Address
Space

1
2K of Address
Space

"'IFF HEX
2"''''''' HEX
3FFF HEX
4"''''''' HEX
5 FFF HEX
6"''''''' HEX
63 FF HEX
7"'''' HEX

1

16 Addresses

5.2.1.6 Memory Refresh Cycle -- A read cycle causes a refresh to
occur. The memory refresh is controlled internally by the dynamic
RAM Controller (8202). Figure 5-8 shows the components used for
the refresh cycle. 128 memory refresh occurs every 2 ms. The
refresh logic has 2 sections.
1.

Internal Counter -- contains the RAS address used during
the refresh. The counter is incremented after each
refresh resetting to zero after all RAS addresses have
been refreshed.

2.

Arbitration -- timing and control logic allows either a
read, write or refresh cycle to occur. After any read or
write cycle request" SACK (System Acknowledge) goes
active if the cycle was not requested during a refresh
cycle. If it was requested SACK is delayed until XACK
(Transfer Acknowledge)
thereby requesting wait states
from the cycle requestor.

5.2.1.7 Interrupts -- Hardware interrupts are generated from two
sources: (the vector generator and I/O port (Figure 5-10).

CPU
INTERRUPT LOGIC
RST 5.5
RST 6.5
RST 7.5

TX RDY (CPU SEND ME ANOTHER CHARACTER)
RX RDY (CPU I HAVE A CHARACTER COME AND GET IT)
(CPU ITS TIME TO SCAN THE KEYBOARD)

I

VSYNC

\ VECTOR
:\
GENERATOR

\1/0 PORT

\

NAME

PRIORITY

ADDRESS BRANCHED
TO WHEN
INTERRUP OCCURS

RST 7.5

1

3CH

RISING EDGE LATCH

RST 6.5

2

34H

HIGH LEVEL UNTIL SAMPLED

RST 5.5

3

2CH

HIGH LEVEL UNTIL SAMPLED

TYPE TRIGGER

Figure 5-10 Interrupt Block Diagram

5-16

These interrupts
control) •

change

the

flow of

the

executing

program

(ROM

The interrupts are sampled on the descending edge of the clock,
one cycle before the end of the instruction in which the interrupt
input is activated. The CPU saves the contents of the program
counter before it branches to the subroutine.
Refer to Table 5-6 for the interrupt priority structure.
The vector generator and I/O port sections describe how the system
generates the interrupts. The software controls the interrupt
logic by using the RIM (Read Interrupt Masks) and SIM (Set
Interrupt Mask) instructions.
5.2.1.8 CRT Sweep Overview
The CPU sets the horizontal and vertical timing registers in the
CRT controller to control the horizontal and vertical sweep
circuits. The horizontal timing registers are R0--R3 and the
vertical timing registers are R4--R9. The register functions are
as follows.
This 8-bit write-only
Horizontal Total
Register (R0)
frequency of the
register determines the horizontal
horizontal sweep.
Horizontal Displayed Register (Rl) -- This 8-bit write-only
register determines the number of displayed characters per
horizontal line.
Horizontal Sync Position Register
(R2)
This 8-bit
write-only register determines the horizontal sync position
on the horizontal line.
Horizontal Sync Width Register (R3) -- This 4-bit write-only
register determines the width of the horizontal sync pulse.
The horizontal registers are programmed in "character times"
units with respect to the reference.

Table 5-6 Interrupt Priority, Restart Address, and Sensitivity
Name

priority

Address Branched To
When Interrupt Occurs

RST 7.5
RST 6.5

1
2

3CH
34H

RST 5.5

3

2CH

Type Trigger
Rising edge latch
High level until
sampled
High level until
sampled

5-17

Vertical Total Register (R4) and Vertical Total Adjust
Register (R5) -- These two registers determine the vertical
frequency of vertical sync. The calculated number of
character line times is usually an integer plus a fraction to
get exactl y 50 or 60 Hz verti cal refresh rate. The integer
number of character line times minus one is programmed in the
7-bit write-only vertical total register; the fraction is
programmed in the 5-bit write only vertical scan adjust
register as a number of scan lines.
Vertical Displayed Register (R6)
This 7-bit write-only
register determines the number of displayed character rows on
the CRT screen and is programmed in character row times.
Vertical Sync Position (R7) -- This 7-bit write-only register
determines the vertical sync posi tion wi th respect to the
reference. It is programmed in character row times.
Interlace Mode Register (R8)
This 2-bit write-only
register controls the raster scan mode. These bits are zeros
which means non-interlace raster scan mode is selected.
For 60 Hz the CPU initializes the registers in the CRT controller
(CRR) as follows.
R0
Rl
R2
R3

(horizontal
(horizontal
(horizontal
(horizontal

R4
R5
R6
R7
R8

(vertical total)
(vertical total adjust)
(vertical displayed)
(vertical sync position)
(interlace mode)

total)
displayed)
sync posi tion)
sync width)

=
=
=
=

4F
40
44
41

=
=
=
=
=

41
0
3D
3E
0

80-1=79
64
68
65 (value can be 60--69
ticks depending on HP)
66-1=65
0
61
62
0

5.2.1.8.1 Horizontal Sweep -- The horizontal sweep time is 63.131
-so This is the time needed for the beam to move from the left
side of the screen to the right side of the screen (display time)
and return to the left side (retrace time).
The display time is 50.505 -s and the retrace time is 12.626 -So
These times are converted into tick values for the CRTC registers.
One tick value is the time needed for the horizontal sweep to pass
twelve pixels. One tick occurs every 0.789144 ns.
The horizontal sync pulse triggers the horizontal
horizontal sync pulse has three components.
1.
2.
3.

HS pulse width
HF horizontal front porch
HB horizontal back porch

5-18

sweep.

The

The HS pulse width is constant. The HF can be changed by the HP
command. If the HF is inc rea sed by one tick then the HB is
decreased by one tick. This action controls the horizontal sweep
start time, which allows for positioning of the display area in
the horizontal direction on the face of the CRT.
5.2.1.8.2 Vertical Sweep -- The vertical sweep is 513 or 613 Hz.
The total vertical sweep is 16.666 ms. A horizontal sweep rate of
63.131 -s provides 264 available scan lines of which 244 scan
lines are used. The remaining 213 scan lines include retrace time
from the last active scan line.
The vertical registers used are
R4
R5
R6
R7
R8

(vertical total)
(vertical total adjust)
(vertical displayed)
(vertical sync positive)
(interlace mode)

=
=
=
=
=

41
0

3D
3E
13

66-1=65
13
61
62
13

Character row
Scan line
Character row
Character row

The CPU loads the vertical registers with scan line and character
row values.
The total sweep time is 66 characters. A character row by
defini tion is four scan lines, which means there are 264 scan
lines in a vertical sweep.
The display time is 61 character rows (13--613). The screen remains
blank during display time. The screen blank time is five character
rows. These rows are divided into:
Vertical sync front porch -- one character row
Vertical sync pulse width -- four character rows
Vertical sync back porch -- zero
5.2.2
Vector Generator Overview
The vector generator interfaces the VKll313 to the CRT di splay
(Figure 5-11). The vector generator performs four functions.
1.
2.
3.
4.

Generates
Generates
Generates
Generates

a timing chain
display refresh sequence
the hardcopy output
status

The vector generator, under ROM control, places characters and
vectors on the CRT display. The system, using a crystal control
clock (45.692 Hz), synchronizes the display sequence and generates
the timing for the vector generator and the CRT moni tor (Figure
5-12). Time states control the vector generator, sync ROM and the
vector ROM.
The system uses a crystal control clock (45.692 Hz) to synchronize
the display sequence and generate the timing for the vector
generator and the CRT monitor (Figure 5-12).

5-19

.---DATA BUS
00-07

VECTOR
GENERATOR

~

1

I I
H

CRT CONTROLLER

BDO- BD7

I

TIME STATE
GENERATOR

I

I

SYNC
ROM

H

I

I

II

1

VECTOR
ROM

I

12 BITS

I
~

LD EX:CUTE

---- -

I

MUX

12 BITS

1

YREGISTER
HIGH 1 LOW

I

- - - MODIFY
- -SECTION
-l

I

S BITS

J

IENABLEI
DISABLE
VECTOR
GEN_GO

ADDRESS

I

X REGISTER
HIGH 1 LOW

1

I

PATTERN
REGISTER

l

r

PATTERN
MULTIPLIER

16 (16KX11)
SCREEN RAM
12 BITS OF : 4 ATTR
DATA
I BITS

I

I
I

1

S SITS

H

1 BIT

l

(2) 4X4 FILE REGS
DU

12 BITS

I
I

DVM

12 BIT SHFR

I

DIRECTION

f---- WOPS
_ _ _ _ _ _ _ ---1I

DATA _ _

S BITS

--

SCREEN
OPTIONS (SOPHS)

l

COT OU","T

1

CONTROL

1--)

.~

I
SCREEN COLOR

f
DATA COLOR
MA-8157

Figure 5-11 vector Generator Block Diagram

5-20

I~8'~~TZ H

8202

I~~:RTZ ~---,-~--

-

8085
L-.5016T 8AUD GENERATOR

I------.--i~

DOT CLOCK
15.2064 M HERTZ (65.762n5)

t-.:-=-..:.....---.--i~ CHAR CLOCK

TO 6845'S

16.666m5

20.0111m5

4.7351'5

HORIZONTAL SYNC

HORIZONTAL BACK PORCH

1---'-. HORIZONT,A.L DISPLAY FOR
768 DOTS

HORIZONTAL FRONT PORCH

Figure 5-12 System Timing

5-21

60.00Hz

49.97 Hz

The vector generator performs two separate time shared operations.
1.
2.

Modify screen RAM data
CRT display

A read modify write operation modifies the screen
RAM is addressed and 16 bi ts are read (12 bi ts
attribute bits). Only one of the twelve data bits
at a time. Then the modified data bit is written
RAM.

RAM. The screen
of data and 4
can be modified
into the screen

The CRT refresh holds the display for a limited amount of time. If
the CRT is not refreshed the contents of the screen RAM fade and
then disappear.
The CRT refresh is a continuous action. The screen RAM is
addressed sequentially. For each address twelve bits of data are
loaded into the shift register. Then the data is shifted one bit
at a time to the CRT display. The data that appears on the CRT is
an image of the data in the screen RAM.
5.2.2.1 Addressing the Screen RAM -- The screen RAM is addressed
through a two to one multiplexer (Figure 5-16). When the modify
screen RAM function is taking place, the address comes from the
X and Y register. The WRT/RD signal when high allows the contents
of the X and Y register to pass through the multiplexer to address
the screen RAM.
When the CRT refresh function is
comes from the sequential counter
low WRT/RD signal when low allows
to pass through the multiplexer to

taking place, the address used
(MA) of the CRT controller. The
the contents of the MA register
address the screen RAM.

The address bit breakdown is shown in Figures 5-13 and 5-14. The
outputs of the address multiplexer are divided into two groups,
the RAS and CAS bits.
The RAS, CAS bits used when modifying the screen RAM are
5-15) :
RAS
CAS

(Figure

Yl, X9--X4
Y8--Y2

The RAS, CAS bits used when doing a CRT refresh are:
RAS
CAS

RA0, MA5--MA0
MAII--MA6, RA1

The address bits X9--X2 go through a translator, which makes sure
that the output bits X3 and X2 are never equal to a binary three.
Bank three in the screen RAM does not exist (Figure 5-16).

5-22

DATA TO CRT

SHIFT REGISTER

LD/SHFR

12 BITS

RAS
CAS

WRT/AD

ROW

COLUMN

MODIFY
DATA

VECTOR

CRT CONTROLLER

STROBE

COUNTER
MA-8156

Figure 5-13 Basic Overview of Address and Data Path

SEQUENTIAL
COUNTER

r-r==

T
CHARACTER ROW

I
o

1

T
59

~----'yr----~

SELECTS GROUP
0 THRU 63

I r ,..----~A~.\
~l
j '"'"'''
0

CHARACTER
ROW

'----v---'

SCAN {
LINES

1

I{

SCAN
LINES

GROUP 0

GROUP 1

GROUP 2

12 PIXELS

12 PIXELS

12 PIXELS

GROUP 63

GROUP 62

12 PIXELS

1

2

3

-

I; 1

1

1

-

-

11
MA-8155

Figure 5-14 Screen Update, Screen RAM Address Breakdown

5-23

SELECTS WHICH OF
FOUR SCREEN SITS
ARE TO SE MODIFIED
SANK
SELECT

r
I

COLUMN

.,

1'_

ROW-

YS! Y7! Y6! Y5! Y4! Y3! Y21

I..

J

WHAT GROUP
OF 64 PIXELS
A

CHARACTER
ROW

I

CHARACTER
ROW 0

1
r

CHARACTER
ROW 59

GROUP 0

GROUP 1

GROUP 2

GROUP 0

GROUP 1

GROUP 2

0

1

SCAN {

LlI

2

S

1

3

0

1

SCAN {
LINES

2
3

YO= 0: EVEN ADDRESS
= 1: ODD ADDRESS

~I
~

GROUP 62

GROUP 63

GROUP 62

GROUP 63

XI MEANS ADDRESS SITS X9-X2
MA-8154

Figure 5-15

Modify Data, Screen RAM Address Breakdown

5-24

"

)

X3

X2

~7

~

16K Xl
SCREEN
RAMS

16K Xl
SCREEN
RAMS

16K Xl
SCREEN
RAMS

16K Xl
SCREEN
RAMS

BANK 3

BANK 2

BANK 1

ATTRIBUTE
BITS

v_
CRT
CaNT.

MAO-MA 11

.J\,.

RAO, RA 1

RAO, MA5-MAO

V

+ Yl, X9-X4
ADR

\J\

"Y"
REGISTER
12 BITS

--

I
N
\J\
"X"
REGISTER
12 BITS

~
~

(Yl-Y8)

X (9-2)

:)

TRANS
ROM

RAS

)0.

~

--MUX

DATA BITS

MA11-MA06. RAl

Yl

+ Y8-Y2
CAS

, "
(X9-X2) )

"'-

,/

11 10 9 8

7 6 5 4

3 2 1 0

3 2 1 0

V

I...--

~(X3,X2)
(Xl,XO)

'--WR/RD

,,

r'

I

3 2 1 0

3 2 1 0

,t

15
B
L
I
K

14
G
R
E
E
N

13
B
L
U
E

12
R
E
D

I

I
BIT
SELECTION

Xl

XO
MA-8153

Figure 5-16 Addressing the Screen RAM

5.2.2.2 Modification of Data in the Screen RAM -- The system sets
up registers in the vector generator to place a character or
vector on the screen. These registers control how the data is
written into the screen RAM. The registers are as follows.
Pattern register
Pattern multiplier register
Write options (WOPS) register
These registers, and the bit selected for update, control how the
data is modified.
The CPU decodes the following wri te commands and then loads the
commands into the pattern, pattern multiplier and the WOPS
register.
Write
Write
Write
Write
Write

Pattern
Multiplier
Negate
Complement
Intensity

The CPU loads the pattern register with the pattern to be written
into the screen RAM.
The contents of the pattern multiplier register (2's complement of
the value) indicates how many times the pattern register output is
used before allowing the pattern register to be shifted. The
default value of the pattern multiplier is one. If the default
value is loaded into the pattern multiplier, the pattern register
output is used once before shifting. If the pattern multiplier is
two the pattern register output is used twice before shifting.
The CPU loads the Write Negate, Complement and Intensity commands
into the WOPS register.
The CPU loads the x and y registers with an address to modify data
in the screen RAM. This address accesses a location in the screen
RAM. The twelve bits of data are read and bits X3 and X2 select
four of the twelve bits. This is called bank selection. Bits Xl
and X0 select which of the four bits is to be modified (bit
selection) (Figure 5-17). At this time the contents of the pattern
register and WOPS determine how the selected data bit will be
modified (Figure 5-18).
The following example shows how the selected bit is modified for a
complement function.
GIVEN:
The output of screen RAM -- selected bank = 0010 binary
The output of WOPS register - bits 2--0 = 100 binary
The output of the pattern register = output bit = 1 binary

5-26

TRANSLATOR
INPUT (9-2)

TRANSLATOR
OUTPUT BITS

I I I
11 10

9876543210

(000)
(001)
(002)
(003)

TA200
TA200
TA200
TA200

1000000000
1000000011
1000000100
1000000111

(004)
(005)
(006)
(007)

TA201
TA201
TA201
TA201

1000001000
1000001011
1000001100
1000001111

(010)
(011)
(012)
(013)

TA202
TA202
TA202
TA202

1000001000
1000001001
1000001010
1000001011

(014)
(015)
(016)
(017)

TA203
TA203
TA203
TA203

1000001100
1000001101
1000001110
1000001111

1110 9B76543210

"X"

TRASLATOR
ROM
INPUT
X9·X2

OUTPUT

AA
AA
AA
AA

1 0101010
1010101 0
10101010
1 010101 0

A.C
AC
AC

10101
1 0 1 01
10101
1 0101

1 00 00
100 01
100 10
1 00 11

AD
AD
AD
AD

10101
1 01 01
10 10 1
10 10 1

101
101
101
1 01

00
01
10
11

AE
AE
AE
AE

1 0101
101 01
10101
101 01

1
1
1
1

00
01
10
11

r..C

10
10
10
10

00
01
10
11

SELECTS 1 OF 3 BANKS

COLUMN

I

YB I Y71 Y61 Y51 Y41 Y3\ Y2!

I

ROW

~

'-___---..~---~I~''-----y-----'
CHARACTER ROW
NUMBER

T

Yl : X9' : XB' : X7' : X6' : X5' : X4'I X3' : X2'I Xl : XO

EQUIVALENT
OF WHAT
CHARACTER.
ROW SCAN
(1 OF 4)

T

WHAT GROUP
OF 64 PIXILS

YO-ODD
EVEN

I

SELECTS WHICH
OF 4 SCREEN
RAM BITS ARE
TO BE MODIFIED.

(Xl000)=TRANSLATION ADR(TA)200
X' MEANS ADDRESS BITS X9-X2 ARE TRANSLATED
MA·S197

Figure 5-17 Translation of X Bits

5-27

WOPS

REGISTER

BLINK

ENA
ATTR
CHANGE = 1
DATA INPUT (8 BITS)

rU

PATTERN
REG

R0
DU

DVM

I
I

SHIFTS OUT 9 BITS
TEN TIMES FOR CHARACTERS

I

3

F2
(O)l--

Fl
FO

(1)~

BIT
{ Xl
SELECTION
~
(10F4)
.~

SELECTION
DIRECTIONl-(2)

WOPS

lKX4
ROM
BIT
SELECT

3rBIT 3

'---

.....
ADDRESS)
V

WR DAT 2
WR DAT 1
WR DAT 0

,...-"X"
REG.
"Y"
REG

WR DAT 3

SCREEN
RAM

.....
12 BITS

)
Y

BIT 2
BANK
SELECTION

BIT 1
BIT

a

X3~

X2
STROBE

MODIFY DATA INPUT (ONE OF FOUR BITS)

Figure 5-18 Modify Data Bits

5-28

The output of the WOPS register equals 4 binary, a complement with
no negate function. Refer to the complement equation in Table 5-7.
Complement
Complement
Complement
Complement

M
=
=
=

= A + (P + N)
0010 + (1 + 0)
1 + 1
0

(0010 is selected bank)
(1 is selected bit)

The complement bit zero is written into the selected bank of the
screen RAM. Initially, the value of the selected bank was 0010
binary. After modification the value changes to 0000 binary.
5.2.2.3 Refresh the CRT -- The display area of the video monitor
contains 240 scan lines (horizontal sweeps) with each sweep having
768 picture elements called pixels. A pixel is the smallest
picture element that can display data. The display area contains a
total of 184,320 pixels. The colo r of the character s 0 r vector s
represents foreground information. The color of the screen
represents background information.
The characters, vectors and screen can be different shades of
black and white or color. Two separate control circuits are used
for CRT color control.
1.
2.

Foreground control
Background control

Table 5-7 Screen RAM Write Control
WOPS BITS
2 1 0
F2 Fl F0
0
0

0

I
I

0

I
I

N
N
N
N

Function

Equation

Overlay
Replace
Complement
Erase

M=A+(P+N)
M=P+N
M=A+(P+N)
M=N

Legend for Equations
M = Data to be written into memory
A = Data now in memory
P = Output of pattern register
N = Negate bit
T = OR
+ = XOR

5-29

Foreground Control -- The CPU loads the WOPS register with a value
that defines the color of the character or vector. The output of
the WOPS register bits F7 (blink), F6 (green), F5 (red), and F4
(bl ue) are inputs to the sc reen RAM at tr ibute sect ion. Every time
the screen RAM is modified, the contents of bits F7--F4 if enabled
are written into the screen RAM attribute section.
When the screen RAM is addressed, sixteen bi ts are read from
memory. Twelve bits of data are loaded into the shift register and
the four attribute bits are loaded into the S163 latch (Figure
5-19). The data output of the shift register is exclusively ORed
with bit 0 of the screen option register (SOPS).
The exclusive OR selects the foreground or background colors. When
the video control bit is zero (normal video) and the shifted data
bit is a one, the attribute bits from the latch determine the
video data color (foreground).

(DATA TO BE WRITTEN SHIFT DATA)

EXCLUSIVE
OR'

WHAT

r-~~::~~::--~R~E~AD~~--~COLOR

IS THE
I-'D:.;..A:.:.:TA~t-I

F"::..::.:.:.tooj S163

VIDEO
DATA

r==--~ LATCH

WR/RD

BIT 0=0 NORMAL VIDEO
1 REVERSE VIDEO
WHAT COLOR IS THE SCREEN
BD 0-7

SOPS

HORIZONTAL SYNC

CRT
MONITOR

VERTICAL
SYNC

LOAD SOPHS
DATA

Figure 5-19 Color Control

5-30

When the output of the shi ft reg ister is zero and the video
control bi t i s zero (no rmal v ideo), the at tr ibute bi ts from the
SOPS register determine the video data color (background).
When the SOPS register bit is a one (reverse video), the SOPS
register attribute bits are used for the foreground color and the
latch attribute bits are used for the background color.
Background Control -- The ReGIS screen command, through the CPU,
loads the SOPS register with a value that determines the
background color. The SOPS register holds the background attribute
bits. The SOPS register attribute bits are; bit 6 (green), bit 5
(blue), and bit 4 (red). These bits are inputs to the multiplexer
that in a normal video condition furnishes the background color.
The background color is displayed when the output of the shift
register is zero and bit 0 of the SOPS register is 0.

5.2.2.4 Modify Screen RAM and CRT Refresh Timing -- The sync ROM
in the vector generator runs continuously. Figure 5-20 shows the
sync ROM addresses which are a function of the Time State
Generator (Figure 5-21) and other bits. Twelve addresses are used
before repeating the sequence again. The WRT/RD signal controls
the screen RAM address multiplexer. If the WRT/RD signal is low,
the address from the mA sequential counter passes through the
screen RAM address multiplexer.
If the WRT/RD signal is high, the address from the x
register passes through the screen RAM address multiplexer.

and

y

The WRT/RD signal changes levels every third sync ROM address. For
every WRT/RD time frame a RAS and CAS signal are generated.
Depending on the sync ROM address, a load shift register or strobe
pulse occurs (Figure 5-19). Strobe pulse loads the four-bit
holding register with data from memory (X3, X2). The following
sequence of events occur.
1.

Data is loaded into the shift register.

2.

While the data is shifted is out, the x,y address reads
the data to be modified. In another read cycle, X3 and X2
selects the data to be modified and strobes the fours
bits into the holding register. Only one bit is modified.

3.

While the data is shifted to the CRT, another RAS, CAS,
LOAD function is performed. At the proper time another
twelve bits are loaded in the shift register and shifted
to the CRT.

4.

During the continuous shifting of data from the shift
register to the CRT, the modified data is written into
the screen RAM. The screen RAM data is modified by the
execute point, erace and the execute vector commands.
During sync ROM address 32, the execute vector command
turns on the vector ROM. This activates the write signal.

5-31

.'

SYNC ROM ADR

13213113013513412312212112*****11301351341231221211201251241331321
1
23
45
67
B

WRT/RD

MA

X,Y

MA

X,Y

MA

X,Y

MA

1 X,Y

L

RAS
CAS

~

LD SHFR

~

~

~

STROBE
WRITE

~

~

t

-1

1R C lDI R C SiR C lDIR C Wi R C LDI R C SiR C LDI R C Wi
DATA
SHIFTED

MA-8196

Figure 5-20 Screen RAM Data Timing

TIME
STATES

_ _ _ _ _D_O_W_N....,OOT
CHAR ClK

~
5
4

+5V

JK

o

C B A

o
o

0

1 0

1

1 0 0
0 1 1

A

0
13 1 0

B

12 1 0

0

C

11

0
10 1 0

0

15 1 0
14 1 0

1

0

1

1

0

0

03 0

0 1

1

o

1

0

1

0

0
0 0

0

1

02 0 0 0 1 0
o1 0 o 0 0 1

+5V

JK

5

00

o

0

0

0 0

5

0

0

1

0

1

MA-8151

Figure 5-21 Time State Generator

5-32

r

5.2.2.5 Generation of Vectors
The VK100 system can draw
both characters and vectors. Section 5.2.2.5 describes characters.
The following paragraphs describe vectors. There are two kinds of
vectors.
1.
2.

Basic vectors
Arbitrary vectors

Basic vectors fall under the following conditions:
1.
2.

If coordinates X=0 and/or Y=0
If the absolute value of x = absolute value of y [X]=[Y]

There are eight basic directions for vectors
other conditions are arbitrary vectors.

(Figure 5-22).

All

The terminal operator can type a character and rotate it in any of
the basic directions (Figure 5-22). For example the operator types
in:
"FORMAT" TEXT (DIRECTION) "Character to Print"
"EXAMPLE" T(D45) "A"
NOTE
The above must be in ReGIS command mode
to work.
The T (D45) command displays the A character along the one basic
direction, or 45' direction. This character is a basic vector.

3 (135°)

4 (180°)

2 (90°)

1 (45°)

-----"""*-----

5 (225°)

6 (270°)

a (0°)

7 (315°)
MA·81ge

Figure 5-22 Basic Vectors

5-33

The CPU has to set up registers in the vector generator to display
characters or vectors on the CRT. The following are the registers
that are loaded.
X and Y
DO-Length of major axis
DVM-Length of minor axis
Pattern
Pattern multiplier
Direction
Write options (WOPS)
Screen options (SOPS)
Execute vector
Error register (only used with arbitrary vectors)
The function of these registers follows.
X and Y -- These registers are loaded with the starting address of
the character or vector. The X and Y register contents address the
screen RAM when modifying data. The address control increments or
decrements the x and Y individually or both at the same time.
The X coordinate is X0 through X767. If the direction of the
character or vector is ROM coordinate X0 through X767, X is
positive. If the direction is from X767 to X0, X is negative.
The Y coordinate is Y0 through Y240. If the direction of the
character or vector is from coordinate Y0 to Y240, Y is positive.
If the direction is Y240 to Y0, Y is negative.
If both X and Y = 0 during a screen RAM modify, the CRT displays
the data in the top left corner of the screen. This corner is the
first pixel of the CRT during display time.
DU -- The length of the major axis is loaded into this register.
For character displays, the width of a character is loaded into
the DU.
For vectors, the firmware knows the vector starting point and how
far the vector moves in the X and Y position. The larger of the
two values is placed in the DU register.
DVM -- The length of the minor axis is loaded into this register.
For character displays, the width of a character is loaded into
the DVM.
For vectors, the DVM receives the smaller of the X and Y values.
Pattern -- The pattern register is an eight-bit shift register
that is parallel loaded and shifted out one bit at a time to a lK
by 4 PROM. This register controls the pattern of the data written
into the screen RAM.

5-34

If the pattern = 1, a modify function is performed. If the pattern
= 121, the pass data is modified. This does not apply in replace
mode.
Pattern Multiplier -- The contents of this four bit register can
increase the width of a character or vector by a factor of one to
sixteen. If the pattern multiplier register is loaded with all
binary ones, the pattern register shifts every write time. If the
pattern multiplier is loaded with 111121 binary, the pattern
register shifts every two write times.
Direction -- The direction register is an eight bit register. Only
four bits are used. Bits 121--2 tell the vector direction and bit 3
tells if the vector is a basic or arbitrary vector. If bit 3
equals zero, the vector is a basic vector. If bit 3 equals one,
the vector is an arbitrary vector.
Write Options (WOPS) -WOPS is an eight-bit register. Bit 7 is
blink control. Bits 6--4 tells the color of data (12 pixels) when
in normal video mode. Bit 3 (equal to a one) enables attributes.
Enable attributes is an address bit to the WRT ROM. This allows
the contents of WOPS register bits 7--4 to be written into the
screen RAM.
Bits 1
If it
negate
equals

and 2 describe how the data being modified is controlled;
is overlayed, replaced, complemented or erased. Bit 121, the
bit, controls the output of the pattern register. If bit 121
a one, the pattern register output is complemented.

Screen Options (SOPS)
The SOPS register is an
register which controls the following three functions.
1.

2.
3.

Blink
Background color
I/O port control

eight-bit

(EIA, 2121 rnA, hardcopy and self-test)

LD Execute -- The execute instructions set the Go flip flop (GOFF)
which enables the vector ROM to run. This is necessary for writing
the modified data in the screen RAM and reading the file register
contents (DU, DVM, DIR, and WOPS).
5.2.2.6 Writing a Character on the Screen -- Writing a character
on the CRT is the same as writing a vector. The main difference is
that a character is a series of parallel vectors. When you press a
key the following events occur:
1.

At the next occurrence of VSYNC the CPU
keyboard interrupt.

2.

In response to the interrupt, the CPU enters the keyboard
scan routine, reads the keyboard and determines which key
was pressed. The processor then translates the key
location code into an ASCI I code and stores it in the
keyboard line.

5-35

recogni zes

the

3.

The processor reads the ASCII character in the keyboard
line to determine what character to place on the CRT.

4.

The processor translates the ASCII character code into a
dot pattern. To do this, the processor reads a character
look-up table located in RAM. The look-up table consists
of a series of character cells, one cell for each ASCII
code. Each character cell contains 10 patterns to be
written as vectors on the screen. These pattern vectors
compose the character on the CRT screen.
NOTE
The look-up table is filled with the dot
patterns for each displayable character
during the ROM power-up sequence. The
look-up table can also be filled from
the
host computer
using
the
Load
Character Cell command in the graphics
mode.

There are 10 pattern vectors for each character. To write a
character into the screen RAM, the DU, DVM, WOPS, and direction
registers are initially loaded. The following sequence of events
must occur 10 times.
1.

The X and
character
register.

Y reg isters are loaded. The
is loaded into the a-bit

pattern of the
pattern shift

2.

The CPU issues the Execute Vector command. The Execute
Vector command sets the GO bit enabling the vector ROM to
output. The address for Execute vector is 66. This means
address bits Al and A0 are equal to a binary two. These
address bi ts, Al and A0, are part of the vector ROM
address bits which allows the vector ROM sequence for the
Execute Vector command.

3.

It takes three cycles (or nine time states) to modify the
data in the screen RAM.
a.

Read cycle -- The X and Y reg ister contents read a
location of the screen RAM. The twelve bits of data
that are read from the screen RAM go to the bank
select logic. Bits X3 and X2 select which four bits
will be strobed into the holding register.

b.

Modify cycle -- The logic uses the pattern output
WOPS, X and holding reg ister to determine which bi t
will be modified by addressing a lK by 4 ROM. The
address of the lK by 4 ROM is determined by the
following.

5-36

Pattern register output bit -- (A9)
WOPS register output bits (F2,Fl,F~) -- (A8--A6)
X register output bit (Xl,X~) -- (A5--A4)
Holding register output bits (3,2,1,~) -- (A3--A~)

c.

Write cycle -- When the write pulse occurs the output
of the bit select ROM (WR OAT 3--WR OAT ~) is written
into the same bank in the screen RAM.

4.

The down counter whose value is initially nine bits gets
decremented every time a wr i te takes place. The log ic
checks to see if the down counter equals zero. Thi s
indicates a pattern or vector has been stored in the
screen RAM.

5.

The X register is incremented or decremented according to
the contents of the direction register.

6.

If the down counter is not
through five are repeated.

equal

to

zero,

steps

three

If the down counter is equal to zero a pattern (vector)
with nine bits is stored in the screen RAM. This resets
the Go flip-flop and disables the vector ROM outputs.
Steps one through six are performed for each pattern. The
character appears on the CRT after the ten patterns are wr i tten
into the screen RAM and those locations addressed by the CRT
Controller (CRR).
5.2 .• 2.7 Arbitrary Vectors -- The vector generator produces basic
and arbitrary vectors in the VKl~~ system. The basic vectors ar~
shown in Figure 5-23. There are eight basic vector directions 45
apart. Vectors drawn in between the eight basic vectors are called
arbitrary vectors.
The Breshinham algorithm is a series of calculations (Appendix B)
that allows an arbi trary vector to light a pixel close to the
ideal vector path. A staircase effect takes place when arbitrary
vectors are drawn. This staircase effect can be seen by looking
closely at the screen when it is displaying arbitrary vectors.
A calculation requires twelve time states (Figure 5-24). These
twelve time states are divided into four groups. The four groups
are repeated until the vector is drawn. The four sequential groups
are:
1.
2.
3.
4.

DVM time (length of minor access)
DU time (length of major access)
WOPS time
Direction time

5-37

104

~ ..

TWELVE TIME STATES

~I

TWELVE TIME STATES

VECTOR ROM ADDRESS

OUTPUT
OF
FilE REGISTER

DVM

DU

DIRECTION

DVM

DIRECTION

DU

CO (VECTOR ROM)

CALCULATION
ER+DVM--(ER)

LD ERROR

,

U1

W
CO

STROBE l

u

n

CALCULATION
BR+DU-ER

EFFECTXARRAY
MAJOR & MINOR AXIS

I

CALCULATION
ER + DVM + l-ER

u

I

CALCULATION
ER+DU- ER

EFFECT X ARRAY
MAJOR AXIS

U

nL..-_____

------,
CARRY (1) H

I
I

WRT l

VClK

L

U

PIXEL WRT

-u

u
~

ClKS X & Y REGISTER
ClKS DOWNCOUNTER

LJ::

ClK MAJOR AXIS
MA·8331

Figure 5-23 Arbitrary Vector Timing

I

"r---RE-G-IS-T-ER~III
7<
X

I

DIRECTION
ROM

+5V

I

As'"'i58

I
I
I
______________ ...1I

CARRY-ClK MAJOR AXIS

V ClK

A7

07

YO
CARRY

A6

06

A5

05

F3

A4

04

F2

A3

03

F1

A2

02

FO

A1

01

CARRY-ClK BOTH
MAJOR AXIS
MINOR AXIS

ENA ERROR l

PIXEL WRITE
X DIRECTION CONTROL
Y DIRECTION CONTROL

~

ENA Y (2)
ENA X (2)

o COUNT 0

U'1

I
W
\0
SYNC ROM OUTPUT
BITS RB, RA
READ 2nd i FilE
1 DVM (MINOR AXIS)

ClK

2 DIRECTION
3 WRITE OPTIONS (WOPS)

READ 1st • REGISTER
R~"'D

3rd

READ 4th

ADDRESS
CONTROL

FilE REGISTER

{on

VECTOR ROM
GENERATES 2
ClK ERROR PULSES
(CARRY IS AN ADDRESS BIT)

025

VECTOR ROM GENERATES {022
1 ClK ERROR PULSE
125

VECTOR
ROM

ClK ERROR

lD ERROR

MA-8172

Figure 5-24 Carry Control

When writing a vector, the firmware loads the following registers:
DVM -- with the length of the minor access. For an example use
the value of 3 (Appendix B).
DU -- with the length of the major access. For an example use
the value of 5 (Appendix B).
Error Rec
is loaded with a value that the firmware obtains
by dividing 2 into the largest value. For an example the value
5 divided by 2 equals 2 with a remainder of I (Appendix B).
The following are the functions that occur in each group.
DVM Time -- The error register is added to the DVM register plus
carry in. The error clock loads the sum into the error. The carry
output of the add is strobed into the carry flip-flop.
DU Time -- The contents of the error register are added to the DU
register. If the carry flip-flop is reset, the vector ROM allows
an error clock pulse which loads the result of the add into the
error register. If the carry flip-flop is set, the vector ROM does
not allow an error clock pulse to occur. The contents of the error
register remain unchanged.
WOPS Time -- The modified data bits are selected and written into
the screen RAM location specified by the X and Y registers.
Di rection Time -- The outputs of the direction reg ister, bi ts
F3--F0, are inputs to the direction ROM (Figure 5-25). An
arbitrary vector is drawn in direction three when the input bits
of the direction ROM equal "B" hex. The carry bit equal to a one
indicates that the major axis register is only affected. The
direction affected is determined by the direction ROM input bits
F0--F2. Direction three is a negative direction. Therefore, the
major access register decrements.
If the carry bit equals zero, the major and minor axis registers
are effected. The direction effected is determined by the ROM
input bits F0--F2. Direction three is a negative direction. Both
the major and minor axis registers are decremented.
The vector sequence terminates when the V clock signal clocks the
downcounter to zero. This resets the Go flip-flop.
The direction ROM produces the signal pixel write. The pixel write
must be active to write data into the screen RAM. There are three
conditions that prevent a write operation from occurring.

5-40

1.

Do not write in direction: 2 from an odd line.
6 from an even line.

2.

Do not write if the direction is 5 or 7. The scan line is
even (Y0) and the last direction was 6.

3.

Do not write if the direction is 1 or 3. The scan line is
odd and the last direction was 2.

CONTROL "Y"
• ENABLE Y
• DIRECTION CONTROL
l-COUNT UP
H-COUNT DOWN

CONTROL "X"
• ENABLE X
• DIRECTION CONTROl.
L-COUNT UP
H-COUNT DOWN

V ClK

DIRECTION ROM

PIXEL WRITE

.-----------------~CARRY

CARRY CONTROL

STROBE---1

lD ERROR

ADDRESS
VECTOR
ROM
MA-8174

Figure 5-25 Direction Control

5-41

5.2.3
I/O Port Overview
The VK100 interfaces to the host system through a serial data
port. An 8251 programmable universal synchronous or asynchronous
receiver-transmitter drives the port. This device translates
between parallel and serial character formats. The 8251 adds or
removes start and stops bi ts as needed. The data used are ASCII
characters. Character parity may be enabled or disabled. The
parity bit, if selected, takes the most significant bit position.
The VK100 I/O system can connect the three CPU ports.
EIA
20 rnA
Hardcopy
Figure 5-26 shows the Basic I/O Port block diagram.
The communication interface (8251A) is the main control of the I/O
section. The baud rate generator allows firmware control of the
baud rates to transfer data through the 8251A module.
The I/O port selection logic is controlled by the SLI and SL0 bits
of the screen option register (SOPS). Different combinations of
SL1 and SL0 select the desired port or the self-test feature.
The self-test diagnostic feature is firmware controlled. A known
val ue is sent to the I/O inter face. The val ue goes through the
8251A chip as serial transmit data, to the I/O port selection
(self-test). Then the data is serially routed to the RXD input of
the 8251A chip. The chip assembles a data byte and sends the byte
in parallel form to the CPU. The CPU compares the transmitted
value to the received value.

SERIAL
DATA

SERIAL
DATA

I/O
PORT
SELECTION

MA-B191

Figure 5-26 Basic I/O Port Block Diagram

5-42

5.2.3.1 Communication Interface (8251A) -- This interface (Figure
5-27) performs the following three functions.
Modem Control
Data Control
Error Reporting
Mode Instruction Reg ister -- After an internal reset, the CPU
loads the mode instruction register. Then any control register
writes will load the data into the command instruction register.
To return the 8251A from command to mode instruction, the CPU sets
the internal reset bit of the command register.
The mode instruction register defines the general
characteristics of the 8251A (Figure 5-28). The
paragraphs describe these characteristics.

operating
following

Baud rate factor
Character length
Number of stop bits
Parity control
The Baud Rate Factor (XI6) -- The baud rate selected is times 16
(XI6) because the TCLK and RCLK frequencies are 16 times the
selected baud rates. To obtain the selected baud rate, divide the
TCLK and RCLK frequencies by 16.
Character Length -- The length of a character transmission may be
5, 6, 7 or 8 bits. The unused bits are zeros (Figure 5-29).
Number of Stop Bits (1, 1-1/2, 2) -- If the baud rate is 310 or
above, the CPU selects one stop bi t. If the baud rate is under
310, the CPU selects two stop bits.
Parity Enable -- When set this bit enables parity generation and
parity detection.
Parity Generation Bit -- When set this bit generates even parity
for data transmission. Even parity means the character bits plus
the parity bit have an even number of one bits. After receiving a
data character the 8251A parity check logic counts the number of
one bits in the character plus the parity bit. An odd number of
one bits raises the parity error flag.
When clear this bit generates odd parity for data transmission.
Odd par i ty means the character bi ts plus the par i ty bi t have an
odd number of one bits. After recelvlng a data character, the
8251A par i ty check log ic counts the number of one bi ts in the
c h a rae t e r pI us the par i t Y bit. An 0 d d n um b e r 0 f 0 neb its r a i s e s
the parity error flag.

5-43

DATA
BUS
BUFFER

D7-D•

RESET
CLK

TRANSMIT
BUFFER
(P-S)

TxD

TRANSMIT
CONTROL

TxE

TxRDY

c/D
1m
WI!

~

~

m
DTR

RECEIVE
BUFFER
(S-P)

MODEM
CONTROL

rn

m

RxD

RxRDY
RECEIVE
CONTROL

~

INTERNAL
DATA BUS

MA-8188

Figure 5-27 8251-A Block Diagram

D7
MODE
INSTRUCTION FORMAT
ASYNCHRONOUS MODE

D.

Ds

D.

D,

D,

I s, I s, I I I I I I
EP

PEN

L,

L,

B,

B,

L

BAUD RATE FACTOR

0

1

0

1

0

0

1

1

SYNC
MODE

(lX)

(16X)

(64X)

CHARACTER LENGTH
1

0

1

0

0

0

1

1

5
BITS

6
BITS

7
BITS

B
BITS

PARITY ENABLE
l=ENABLE
O=DISABLE
EVEN PARITY GENERATION
O=ODD
l=EVEN
NUMBER OF STOP BITS

0

1

1

0

0

0

1

INVALID

1
BIT

lY:.
BITS

1

2
BITS
MA-8187

Figure 5-28 Mode Register

5-44

r

TRANSMITTER OUTPUT
TRANSMIT/RECEIVE
FORMAT
ASYNCHRONOUS MODE

TxD

MARKING
1 - - -......._ - - '

STO~
BITS

RECEIVER INPUT
RxD

I~~;RT~~B-IT-S--~----'-~~~~~
TRANSMISSION FORMAT
CPU BYTE (5-B BITS/CHAR)

I

DATA

~H:ARACTER I

ASSEMBLED SERIAL DATA OUTPUT (TxD)
DATA CHARACTER

L--_--'-_ _~

STOID
BITS

~---.r......_---'....f

RECEIVE FORMAT
SERIAL DATA INPUT (RxD)
,...--"T""----t
DATA CHARACTER

STOTI
BITS
I-------IL...--...L..t

CPU BYTE (5-B BITS/CHAR) 1

I

DATA

~~ARACTER I

NOTE1: IF CHARACTER LENGTH IS DEFINED AS 5,6, OR 7
BITS; THE UNUSED BITS ARE SET TO "ZERO"_
MA-8178

Figure 5-29 Transmit/Receive Format
Asynchronous Mode

5-45

Command Instruction Register (Figure 5-30)
The command
instruction register defines the controls used in the operation of
the 8251A. The following are the signals that control this
operation.
Transmit Enable
Receive Enable
Data Terminal Ready
Request to Send
Error Reset
Internal Reset
Send Break Character
Enter Hunt Mode
Transmit Enable
When the CPU sets this bit the 825lA
transmit data. Resetting this bit inhibits data transmission.

can

Receive Enable -- When the CPU sets this bit the 825lA can receive
data. Resetting this bit prevents data reception.
The Transmit Enable and Receive Enable are both set in the VKl00
system. This allows the 825lA to operate in full duplex mode.
Data Terminal Ready
test.

(DTR)

-- The CPU sets this bit for

loopback

Request to Send -- The request to send signal is normally used for
modem control.
Error Reset -- When the CPU sets this bit all error flags are
res e t • Par i t Y Err 0 r ( PE), Over run Err 0 r ( 0 E), and F ram i n g Err 0 r
(FE) are reset in the status register.
Internal Reset -- When set this bit returns the 825lA from Command
instruction to Mode instruction.
Send Break Character -- When set this bit forces TxD to a low.
Enter Hunt Mode -- This bit is a zero. The VK100 system does not
use the Hunt mode.

5-46

COMMAND INSTRUCTION
FORMAT

I

D,

D.

EH I

IR

D,

D.

I RTS I ER

D3

D,

I SBRKI RxE I DTR I TxEN

4"""'' ' ' '
1=ENABLE
O=DISABLE

DATA TERMINAL
READY
"HIGH" WILL FORCE [jjfj
OUTPUT TO ZERO
RECEIVE ENABLE
1=ENABLE
O=DISABLE
SEND BREAK
CHARACTER
1=FORCES TxD "LOW"
O=NORMAL OPERATION

ERROR RESET
1=RESET ALL ERROR FLAGS
PE,OE, FE

REQUEST TO SEND
"HIGH" WI LL FORCE
OUTPUT TO ZERO

R'i'S

INTERNAL RESET
"HIGH" RETURNS 8251 TO
MODE INSTRUCTION FORMAT

ENTER HUNT MODE
1=ENABLE SEARCH FOR SYNC
CHARACTERS
MA-8180

Figure 5-30 Command Instruction Format

5-47

Status Register -- Data Communication Systems require the status
of the active device. To obtain the status, the CPU reads the
status register. The following are the status register bits
(Figure 5-31).
Transmitter Ready (TxRDY)
Receiver Ready (RxRDY)
Transmitter Empty (TxE)
Parity Error (PE)
Overrun Error (OE)
Framing Error (FE)
SYNDET
DSR
TxRDY -- This bit signals the CPU that the transmitter is ready to
accept a data character. The CPU can use TxRDY for interrupt or
polled operations. In polled operations the CPU checks TxRDY using
a status read operation. TxRDY automatically resets when the CPU
loads a character.
RxRDY -- This bit indicates that the 8251A contains a character
ready to input to the CPU. RxRDY connects to the interrupt
structure of the CPU or for polled operation. The CPU can check
the condition of RxRDY using a status read operation. RxRDY is
automatically reset when the CPU reads the character.
TxE -- When the 8251 has no characters to transmit, the TxE output
goes high. TxE automatically resets after receiving a character.
The error conditions
(PE, OE and
asynchronous data transfer section.

FE)

are

covered

in

the

DSR -- The CPU uses thi s bi t to moni tor the hardcopy port. The
usage of this bit is covered in the Hardcopy section (Paragraph
5.2.3.3).
Asynchronous Data Transfers -- In the VK100 system there are two
modes of data transfers:
1.
2.

Data transmissions (TxD)
Data receptions (RxD)

Asynchronous Mode Transmissions
Whenever
character the 8251 does the following.

the

Adds a start bit (low level)
Adds the required number of stop bits
Adds the correct parity bit if parity is enabled

5-48

CPU

sends

a

D7

STATUS READ
FORMAT

I I
DSR

SYN-l
~~T

D,

D4

D,

FE \ OE

PE

I I

D,

J

TXE\

=~Y 1~~Y J
L.l

I I

SAME DEFINITIONS AS I/O PINS
PARITY ERROR
THE PE FLAG IS SET WHEN A PARITY
ERROR IS DETECTED_ IT IS RESET BY
THE ER BIT OF THE COMMAND
INSTRUCTION_ PE DOES NOT INHIBIT
OPERATION OF THE 8251A_

4

OVERRUN ERROR
THE OE FLAG IS SET WHEN THE CPU
DOES NOT READ A CHARACTER BEFORE
THE NEXT ONE BECOMES AVAILABLE_
IT IS RESET BY THE ER BIT OF THE
COMMAND INSTRUCTION. OE DOES
NOT INHIBIT OPERATION OF THE 8251A;
HOWEVER, THE PREVIOUSLY OVERRUN
CHARACTER IS LOST:

FRAMING ERROR (ASYNC ONLY)
THE FE FLAG IS SET WHEN A VALID
STOP BIT IS NOT DETECTED AT THE
END OF EVERY CHARACTER. IT IS RESET
BY THE ER BIT OF THE COMMAND
INSTRUCTION. FE DOES NOT INHIBIT
THE OPERATION OF THE jtPD8251 AND
jtPD8251A.
NOTE: 1 TxRDY STATUS BIT IS NOT TOTALLY
EQUIVALENT TO THE TxRDY OUTPUT
PIN, THE RELATIONSHIP IS AS FOLLOWS:
TxRDY STATUS BIT
BUFFER EMPTY
TxRDY (PIN 15) BUFFER EMPTY .CTS • TxEn
MA-I1179

Figure 5-31 Status Register

5-49

The character is then transmitted as a serial data stream on the
TxD output (Figure 5-28). The serial data is shifted out on the
trailing edge of TxC at a rate equal to 1/16 of the TxC as defined
by the Mode Instruction. Break characters can be continuously sent
to TxD if commanded to do so. If no data characters are loaded
into the 8251A the TxD output remains high (marking) unless a
break (continuously low) has been programmed.
Asynchronous Mode Reception -- The RxD line is normally high. When
the line goes low this triggers the beginning of the start bit.
The validity of the start bit is checked by strobing at the start
bits nominal center. If a low is detected at the nominal center a
valid start bit has been found. The bit counter then starts
counting. The bit counter locates the center of the received bits,
parity bits (if it exists) and the stop bits. The stop bits signal
the end of a received character. The character is then loaded into
the I/O buffer of the 8251A and the logic (RxRDY) signals the CPU
that data is available. The 8251A checks each character for
errors. There are three types of errors.
1.

2.
3•

Parity Error
Framing Error
Over run Err 0 r

Parity Error -- The rising edge of RxC samples the receive inputs
data and parity. If a parity error occurs, the parity error flag
is set.
Framing Error -- Occurs if a low level
bit.

is detected at the stop

Overrun Error -- If a previous character has not been fetched by
the CPU, the present character replaces it in the I/O buffer and
the overrun flag is raised (the previous character is lost).
The occurrence of any of these errors will not stop the operation
of the 8251A.
Table 5-8 shows the addressing of the 8251A.

Table 5-8 Addressing the 8251-A
Address Bits
CD
RD

Selection and Directive
WR

CS

0
0

0

1

1

0

1
1

0

1

X
X

1

0

0
0
0
0

X

X

1

1

1

0

8251A ~ Data Bus
Data Bus ~ 8251A
Status ~ Data Bus
Data Bus ~ Control
Data Bus

5-50

~

3 State

5.2.3.2 Baud Rate Generator -- The baud rate for a VK100 system
is controlled by:
Default set up switch pack (switches 86--88)
8ET-UP mode (Refer to Chapter 4)
ReGI8 command (Refer to Chapter 4).
On power up, or reset, the firmware uses defaul t set-up swi tch
pack (86--88) to load the baud rate generator with a byte value.
This value selects the Tx clock and Rx clock frequency. The low
four bits of the byte value select the baud rate for the Rx clock
pulses and the high four bi ts select the baud rate of the Tx
clock. Both the Tx clock and Rx clock frequencies are 16 times the
selected baud rate. If the selected baud rate is 300 bi ts per
second the clock frequencies are 4.8 kHz.
The baud rate generator sends the Tx clock or Rx clock frequency
to the 8251A chip which divides the frequency by 16. The result is
the device baud rate. Figure 5-32 shows the baud rate generator
block diagram.
Table 5-9 shows how the CPU selects one of the eight possible baud
rates used for the receive and transmit frequencies.

t---.j

(1)

XTALlEXT1

S.68MHz

FREQUENCY t - -.....
DECODE AND
CONTROL
t---,

a:

o

~

...J

U

IJl

o

R CLK

BD
SD
BD
BD

0
1

2
3

FREQUENCY t - -.....
DECODE AND
CONTROL
t--...,
MA-8173

Figure 5-32 Baud Rate Generator

5-51

Table 5-9 Baud Rate Selection Crystal Frequency
Transmit/Receive
Address
D C B A
~

~
~
~

1
1
1
1

~ 1 ~
1 ~ 1
1 1 ~
1 1 1
~ 1 0
1 0 0
1 1 0
1 1 1

5.2.3.3

Baud
Rate
11~

3~~

6~"
12~~

2400
4800
9600
19,200

Theoretical
Frequency
16 X CLOCK
1.76 Hz
4.8
9.6
19.2
38.4
76.8
153.6
307.2

Selection of I/O Port

=

5.~688

Actual
Frequency
16 X CLOCK
1. 76 K Hz

4.8
9.6
19.2
38.4
76.8
153.6
316.8

M Hertz

Divisor
288~
1~56

528
264
132
66
33
16

The I/O ports are selected by:

Default SET-UP switch pack
SET-UP mode (Refer to Chapter 4)
ReGIS commands (Refer to Chapter 4).
When a power up or reset operation is performed, the CPU reads the
default SET-UP switch pack.
The condition of switch two (S2)
determines if the CPU is connected to the 20 mA or EIA port. If S2
is open, the 20 mA port is used. If S2 is closed, the EIA port is
used.
When an I/O port is selected the CPU modifies bits SLl and SL0 of
the screen option register (SOPS). The condition of these two bits
connect the CPU to the selected port (5-33). Table 5-10 also shows
this condition.
5.2.3.4 Transferring Data Through the I/O Port
The VK100
system uses the following three ports to connect the CPU to other
devices.
20 mA
EIA
Hardcopy
20 mA Port
The VK100 system has full-duplex capabilities. This
includes a transmit and receiver channel (Jl).

5-52

DATA BUS

r----STATUS A REG.

COLO

ROW A·ROW F
SHIFT
CAPS LOCK

COL 15

MA-B190

Figure 5-33 Port Selection Block Diagram

Table 5-lf(J I/O Port Selection
MUX

Inputs

SLI

SLf(J

A
B

f(J
0

1

C

1
1

1

D
Note

0
1

f(J
0

Port
Selection
EIA
20 rnA
Hardcopy
Self-test

Level = L
Level = H

5-53

Transmit Channel -- The CPU sends the data to the 8251A. This is
where the transmission format is put together according to the
mode instruction register. The data stream is shifted out of the
825lA serially on the TxD line. The data goes through the I/O port
selected log ic. The SOPS reg ister bi ts SLI and SL0 (L, H) selects
the 20 rnA drive circuitry to transmit the data to host computer
(Figure 5-34).

The data that is transferred out to the 20 rnA line goes through a
photo transistor. When the photo transistor circuit receives the
mark bit, the photo cell transistor is cut off. This allows Q7 to
conduct which in turn causes Q8 to conduct. When Q7 and Q8
transistors are turned on the source current (18--50 rnA) flows
from pin 2, through Q7 and Q8, out to pin 5.
Wh e nth e ph 0 t o t ran sis tor c i r cui t r e c e i v e s asp ace ( s tar t bit),
the photo transistor
turns on. This action cuts off Q7, which
then cuts off Q8. The current that flows from pin 2 goes through
the constant current diode. This keeps a constant current of 2 rnA
that goes through the photo transistor out to pin 5.
Receiver Channel
The receiver channel monitors the current
loop. If a mark is detected, the receiver channel changes the mark
to a binary one. I f a space is detected, the rece i ve r channe 1
changes the space to a binary zero.
The receiver channel detects a mark and space in the following
manner (Figure 5-35). The marking state is the initial condition.
The marking current causes the photo diode to conduct. When the
photo diode passes 18 to 50 rnA of current, the photo transistor
turns on. The conduction of the photo transistor causes a positive
voltage drop that turns on Q6. When Q6 conducts, a mark condition
exists. The output of Q6 is inverted. The mark bit goes through
the receiver multiplexer to the RxD input of the 8251A.
When a start bi t i s detected (space) the rece i ved cur ren t drops
from (18 to 50 rnA) to (0 to 2 rnA). The space condition cuts off
the photo transistor which cuts off Q6. The output of Q6 is
inverted (0). The space signal goes through the receiver
multiplexer to the RxD input of the 8251A.
Table 5-11 shows
specifications.

the

transmitter

and

receives

interface

EIA Port -- The data transfer is the same as the 20 rnA port except
the EIA drivers or receivers are selected. Figures 5-36 and 5-37
show the block diagrams.

5-54

+5V

CUT OFF FOR
AMARK
CONDUCTING
FOR A SPACE

J1
5

SERIAL
DATA
INPUT

HOST
COMPUTER

os

2

~~~~2~m~A~---C~O~N-ST-A-N-T~----~+----iSOURCE
-

CURRENT
DIODE

= MARK CONDITION

CURRENT
0-2mA = OFF = 0
10mA
18-50mA = ON = MARK = 1

•=

H: MARK
L: SPACE
MA-B175

Figure 5-34 20 mA Transmit Loop

J1
~---r---------'r

+5V

7

_--..,..----..,.........-+--4 R+

HOST
COMPUTER

05

3
......Jy.,.,.--"'-+--+-I

R-

8

=

MA-8195

Figure 5-35 20 mA Receive Loop

5-55

Table 5-11 Interface Specifications
Transmitter

Min

Max

Units

Open circuit voltage

5.121

5121

Volts

Voltage drop marking

121.121

2.121

Volts

2.121

MA

Spacing current
Marking current

2121

5121

MA

Receiver

Min

Max

Units

Vol tage drop marking

2.3

Volts

Spacing current

3.121

MA

5121

MA

Marking current

15

CONTROL

CP~

GET DATA

CPU

FIRMWARE I-~\'_-I
ROM

RAM
MEMORY

DATA
ADR, CONTROL, DATA

A12-A8

1

Al-AO

12 LINES

I

3 L1NESIL-_---.

I/OM,WRT,Fill----z.-

ADDRESS
LATCH

8 LINES

DATA
BUFFER

CONTROL

DECODER

00-07

BAUD RATE

~

GENERATOR ~

COMMUNICATION INTERFACE
8251A
START 81T

I

,.:!!!..

STOP
BITS

PARITY

BIT. /

TxD MARKINGLI_--.JILD_AT_A_BI_T..JslL-__1

5~l

SL1~L

Tx
I/O PORT
SELECTOR

1----0

EIA
DRIVER

TO

~ 2J-. HOST
COMPUTOR

1SLO~L
SOPS
REGISTER
'--

Figure 5-36 EIA Transmit

5-56

MA-8201

FIRMWARE
ROM

A12-A8

r--------------,HERE IS DATA
CONTROL CPU I CPU
I
IADR ,CONTROL I DATA I
DATA

8LINES

12 LINES

1

RAM
MEMORY

A7-AO

ADDRESS
LATCH

I

r ilO wii'f
I

AS-AO
AO

I

DECODER

I

•

I

UART

I..--WRT

~

__ ...1
110 RD

11 1
I

BAUD RATE
GENERATOR ~

DATA
BUFFER

CONTROL

DO-D7

~RD

COMMUNICATION
INTERFACE
8251A
START
BIT

RxD

PARITY /,STOP
BIT
/ ' BITS

RxDJ I DATA BITS I I (L

J8

RX

' - - - - - - - - - - - - - - - - - - - - - - - - - - 1 1 / 0 PORT

-

RxD

3

-.----1

HOST
COMPUTER

SELECTOR

r i

SL1 =L
SLO=L
,--L--....&....,
SOPS
REGISTER

'--

MA-8171

Figure 5-37 EIA Receive

5-57

5.2.3.5
Hardcopy Overview -- The hardcopy mode outputs screen
image information to a hardcopy device (LA34-VA or another future
compatible device) to obtain a permanent record on paper. Only the
information in the bit map memory is sent to the device. The video
attribute information is ignored. The four ways of entering
hardcopy mode are:
1.
2.
3.
4.

Normal Screen Dump
Auto-Hardcopy
Partial-Hardcopy
Hardcopy Dump in Graphics Mode.

Normal Screen Dump -- Once initiated the screen is frozen and the
entire image prints. Use SHIFT/PFI keys or DECHP escape sequence
(ESC '7) to enter this mode.
Auto Hardcopy -- This is similar to the normal screen dump but it
is initiated automatically before the screen clears or scrolls an
entire display of new text lines onto the display.
Auto Hardcopy is enabled using Set-Up (AHl) or SM escape sequence
(ESC [ ? 24 h ] ), and disabled by AH9 or ESC [ ? 24 1 ]. To abort
hardcopy before completion, use the SHIFT/PFI keys.

*

The last letter of the sequence is a lowercase 1 (154 8 ).

Partial Hardcopy -- This prints the number of lines specified by
the parameters in the following DEC PDH escape sequence
ESC [ Pn; Pn 1 8]
This escape sequence freezes the display and prints from the text
line specified by the first parameter to the line specified by the
second parameter.
Hardcopy Dump in Graphics Mode -- Hardcopy can be initiated using
ReGIS screen command with hardcopy option:
S (H [, Yl]

[, Y2])

If only one Y parameter is specified, the other Y parameter
defaults to the current graphics cursor Y position. If neither Y
parameter is specified, the whole screen is copied.
Graphics Data Stream Format -- The LA34-VA graphic printer accepts
the hardcopy data from the VK199 in the following format:
CR SP SP SP SP
DCS Pn F • • • SD • • • ST PLO
DCS Pn F • • • SD
• ST PLO

5-58

Where:
CR
SP

Des
Pn

Carriage Return
SPACE (ASCII 2/e)
Device Control String: ESC P
Parameter value for horizontal resolution selection:

=
=
=

=
Pn
F

=
=

SD
ST

=

PLO

=

=

1 for horizontal resolution
q This final character donates the subsequent
characters are encoded raster data to be
printed.
String Data
String Terminator: ESC\. Character processing
returns to the method prior to the DCS.
Partial Line Down: ESC K moves to next line of
graphic data.

The line printer connects to VKlee terminals in two ways.
1.

Line printer connected only to a single terminal
5-38)
(Line printer dedicated to one terminal)

2.

Line printer connected to multi-terminals (Figure 5-39)
(Line printer is shared by many terminals)

Figure 5-38 shows the cables used with both systems.

UK100

~
'i
'2 V \

!

13
TERMINAL

MALEPLUG

FEMALE
CONNECTION

14

RxD
CTS

15 I

-

TxD

RTS

\ A )
~

•

,-v",

!

! !

:

LINE PRINTER
LA34-VA

' ... )'_J

BC22A-XX
MA.&186

Figure 5-38 Line Printer Connected to Single
Terminal

5-59

(Figure

>

(

BC22A-XX OR EQUIVALENT CABLE

>

)

BC22B-XX OR EQUIVALENT CABLE

y

BC22B-01 (Y-CABLE)

---?)

MALE EIA CONNECTOR

----«

FEMALE EIA CONNECTOR
MA-8203

Figure 5-39 Printer Connection to Multiple
Terminals and Connector Names

Line Printer -- Connected to Mul ti-terminals
The VK100 has
the ability to organize multi-terminal demands for the hardcopy
device. When the terminal outputs to the hardcopy device, all
other terminals in the chain are locked out. The next terminal to
be served depends on: the position of the currently printing
terminal, its relation to other terminals in the chain, and the
entering order of the hardcopy requests.
In general, the terminal farthest away from the printer has the
higher priority and prints next. There is no limitation on the
number of VK100 terminals that can connect to the line printer as
long as the maximum distance between terminals is 50 feet. The
number of VKl00s serviced is limited by the users response time.
When a VK100 is powered off, all upstream terminals (farthest away
f rom the ha rdcopy dev ice) are broken of f the cha in. The upstream
terminals are reconnected to the printer by bypassing the Y cable
on the powered off terminal.
5.2.3.5.1 VKHJ0 Daisy Chain Bus Control -- The daisy-chain bus
connecting the VKl00s to the LA34-VA Graphic Line Printer is
divided into data and control lines.
Data Lines
1.
Transmit (TxD)
2.
Receive (RxD)
Control Lines
1.
Request to Send (RTS)
2.
Clear to Send (CTS)
Figure 5-40 shows how each terminal interactively controls which
terminal uses the VK100 daisy-chain bus.

5-60

14
UTxD
RTS

TxD FROM 8251A

XMIT
DATA

RTS L

DTxD

HARD COpy

3
DRxD
TO STATUS "8"
ACTS

16
URxD
RCV
DATA

RxD TO 8251A

7

.:
5
DCTS

13

4

10-__ DRTS
19

~------~----------------------URTS

TO 8251A DSR INPUT

_--------l
MA·8183

Figure

5-4~

Logic for Hardcopy Bus Control

The signals that use the hardcopy daisy chain are:
Upstream transmit data (UTxD)
Downstream transmit data (DTxD)
Upstream receive data (UPxD)
Downstream receive data (DRxD)
Upstream clear to send (UCTS)
Downstream clear to send (DCTS)
Upstream request to send (URTS)
Downstream request to send (DRTS)
Terminals in the daisy-chain bus use an interconnecting dialogue
that allows only one terminal at a time to use the bus. The
following paragraphs describe this dialogue.
BUS NOT BUSY
When the bus is not busy each VKI~~ has as inputs, DCTS low and
URTS high. The logic in each VKI~~ passes on the output signals,
UCTS low and DRTS high. All VKI~~ are enabled to transfer data.

5-61

CPU WANTS TO USE BUS
A CPU that wants to transfer data reads two status registers.
1.
2.

Status Register B (checks ACTS bit)
Status Register 8251A (checks DSR bit)
The ACTS bi t reflects the inverted condi tion of DCTS
low (ACTS bit=I). The DSR bit reflects the condition of
URTS high (DSR bit=0). The only time a VK100 can use the
bus is when ACTS bit=l and DSR bit=0.

When the CPU finds the ACTS bit=l and DSR bit=0, it then clears
the RTS bit in the command register in the 8251A. RTS switches the
following signals.
1.

UCTS goes high -- in the upstream terminal this signal
name becomes DCTS high and is inverted changing the ACTS
from a one to a zero. The upstream terminals have ACTS
bi ts equal to zero to prevent the terminals from using
the bus.

2.

DRTS goes low -- in the downstream terminal this signal
name becomes URTS low and is inverted changing the DSR
bit from a zero to a one. The downstream terminals have
DSR bits equal to one to prevent the terminals from using
the bus.

CPU USING BUS
The terminal after galnlng control of the bus transfers the data
to the line printer (TxD).
BUS NOT BUSY
When the CPU finishes the data transfer the CPU sets RTS.
switches the UCTS and DRTS and the bus is no longer busy.

RTS

5.2.3.5.2 Hardcopy Data Transfer -- To transfer data to the line
printer the following sequence takes place.
1.
2.
3.
4.
5.

6.

SET-UP
The DVM register is loaded. Direction equals 2.
The direction register is loaded. Direction equals 6.
The X and Y register is loaded.
The Baud Rate Generator is loaded.
The instruction format register is loaded.

For the following sequence of events refer to Figure 5-41.
SYSTAT A (X0, Y0) -- Firmware reads 4 bits from the
screen RAM, (bits 0, 1, 2 and 3 of scan line zero) by
issuing the instruction SYSTAT A. When the CPU receiv 7s
the 4 bi ts it masks out bi ts 1, 2 and 3 and saves bl t
zero in a register X LSB in the CPU.

5-62

SYSTAT A (XeI, Y2) -- Fi rmware reads 4 bi ts from the
screen RAM, (bits eI, 1, 2 and 3 of scan line two) by
issuing the instruction SYSTAT A. When the CPU receives
the four bits it masks out bits 1, 2, and 3 and saves bit
zero in a register X LSB + 1 position.
The above sequence continues until six reads are done
(XeI, Y12). At this time six-bit position zeros are stored
in a register in the CPU.
The firmware makes an ASCII character by adding el77 octal
to the contents of register X and sends the new value to
the 8251A transmit buffer.
The 8251A assembles the data into the correct format, and
transfers the data to the line printer.
The line printer receives and assembles the transmission,
subtracts el77 octal from it and stores the resul t in a
256 byte buffer.
When its buffer is filled, the line printer transmits
XOFF to the Receive Data buffer in the 8251A. This
interrupts the CPU, signalling it to stop sending
characters. When the buffer is able to receive more data
it transmits XON to the CPU.
Starting at bit zero position the data is transferred as
follows.
SCAN LINE eI--12 six bit zeros, six bit ones •
six bit 767
SCAN LINE 12--26 six bit zeros, six bit ones • • • • • •
six bit 767
SCAN LINE 226--24e1 six bit zeros, six bit ones • • • • •
six bit 767

5-63

ADDRESS
MUX

x = 0,
X = 0,
X=O
X = 0:

Y =0 }
Y =2
Y=4
Y =6

DOES 6 READS

X = 0, Y = 10
X = 0, Y = 12

REGISTER IN CPU
X = 1, Y = 0
X=l,Y=2

U'1

I

m
01=0

}

X = 1, Y = 4
X = 1, Y = 6
X=l,Y=10
X = 1, Y = 12

DOES 6 READS

ETC

SERIAL DATA STREAM
LINE PRINTER

MA·817Q

Figure 5-41 Hardcopy Data Transfer

5.2.4
Keyboard
The keyboard is the user's input device to
keyboard logic is divided into two sections.

the

terminal.

The

1.

Keyboard Matric
The keyboard switches are arranged like a typewriter with
a numerical keypad. The keyboard matrix also provides
light indicators.

2.

Keyboard Interface
The keyboard interface is on the terminal controller
module and determines which keys have been pressed.

The keyboard is a firmware scanned key array, mapped into memory
space (RAM). The CPU reads the keyboard array 16 times every 60th
of a second to find out if any keys have been pressed. The
keyboard logic consists of:
Keyboard array
Array column selector
Indicators
Audible section
The keyboard array consists of switches arranged in a column, row
matrix. There are 15 columns (1--15) and 6 rows (A--F). Each
switch has its own column and row position (Figure 5-42).
The CPU selects the column to read by using address bits A0--A3.
When column one is selected, a ground (low) is present on one side
of the following switches: SET-UP, ESC, TAB, ENTER and PFI. If one
or more of the switches is pressed, the lows will be felt on the
corresponding row bits. Then the CPU does a keyboard read (KBRD).
Figure 5-43 shows column two addressed with the A switch pressed.
The A switch pressed means the row C output is low and when the
KBRD is active D2 goes low. All other bits are high. The code sent
to RAM memory for an A is 11111011.
The keyboard write register controls the audible and indicator
log ic. Bi ts 1--6 control the indicators. Bi t six output has two
destinations:
1.
2.

ON-LINE LGD
Inverted bit six - LOCAL indicator

The following are the indicators.
L2
Ll
HARDCOPY
BASIC
NO SCROLL
ON-LINE
LOCAL
Bit six controls the ON-LINE/LOCAL signal.
5-65

r-

1 COL 0

2

COL 1

3

COL 2

4

COL 3

5

COL 4

6

COL 5

7

COL 6

B

COL 7

10 COL 8
11 COL 9
12 COL 10
13 COL 11
14 COL 12
15 COL 13
16 COL 14

SET UP

-0:-

ESC

V1

I
0'\
0'\

.ot-."

~

I

@

1

2

~

~

~
~
NO

~
~

~-r-

-ol<>-t

SCROLL

~~ER r<'1"1
1

PF1

PF2

Lot."

-0:"1

Z

2

..,t"1
PF3

1.0-:0,

#

$

%

A

~ ~~ ~ h>-h
~
~
X

-ot<>-t
3

-ot"1

~

fa;'
C

fot<>-t
4

ro:o,

PF4

t

LOt"1

-ot"1

~
~
V

..,t<>-t
5

..,t"1
t

..,t."

y

~

~."
B

f.ot<>-t

&
7

.

(

)

8

9

0

fo"t<>-t

fo"to-!

fl

"'1."

M

...,t<>-t
9

4."

17 COL 15

-

+

'v

~

L.1<>-t

k,~

ro:o,

f.,-\o,

-oTo,

fot."

~
>

?

foto,

-0:"1

-ofa,

-01"1

D3

-@}- ~6

-<>1'"

-<>t."

D4

-rg;

t"L
P
:

<
0

'01.".

)

1

"

~
I
~~ ~~AK
I

~

21 ROW A (LSD)

01

~URN
,
D2
I

L.F.

-

-ot."

~

C.2.NTROL
D5

-oT."

4."
CAPS LOCK

......

1':

"'"' 'r.

L SHIFT":" ......

D6

D7

~ 3123

4
~

~4

LED 1
ROW B
LED 2

25 ROWC
LED 3

27 ROW D

feB LED 4
29 ROW E

}.O

LED 5

31 ROW F (MSD)

~ }.21
~ ~~

LED 6

33 CAPS LOCK
LED 7

35 SHIFT

L rl~7

6

+5V

~B

~ p!I

MA-8204

Figure 5-42 Keyboard Matrix

LOGIC BOARD KEYBOARD SECTION
KEYBOARD ,.....
MATRIX

COLUMN 0

,.,

f":"'\

~

0

DB

COLUMN 2
0
0

,.

0

,.,

0

,.,

r- -

COLUMN 7
COLUMN 8

w

...J

SO

-"

SO

S1

DB

0

c

0

,.

0

,.,

0

-"

0

,.,
,.,

COLUMN 15

"-- I-

S1

l'

r-

0

II)

DA

LED 2

t-:-

0

0

0

0

0

0

§}.

AO

I-A2

r-'

DA

Y

A3

ADDRESS BITS A3, A2, A1, AO
ARE EQUAL TO (2) 0 0 1 0
TO SELECT COLUMN 2

LED 6
LED 8
LED 7

+5V

ROW A

11

A

t-o....L

DO

t

ROW B

01

ROWC

02

ROW 0

03

ROW E
CA PS
LO CK

n

LS HI~

04

ROW F

05
06

~

07

'-'

9.,!i

R SHIFT

KBD R
MA-8182

Figure 5-43 Keyboard Road with

5-67

nAn

Switch Pressed

Write register bits 77 and 8 control the
emitted from the loudspeaker: the keyc lick
5-44) •

audible sounds
beeper (Figure

two
and

A one-shot multivibrator determines the keyclick
output is high for 1.5 ms and low for 30.2 ms.

signal.

the

The beeper signal is high for 17.2 ms and low for 16.5 ms.
5.2.5
Power Supply
The VK100 is driven by a free running, flyback mode, off-line
switching power supply. It accepts either 115 or 230 Vac input and
delivers three regulated dc outputs: +5 V, +12 V -5 V.

o

o so 0
1 so 1
o so 2
1 so 3

0

1 0

1

000

+5V

o SD4
o so 5

~ f.-l.5mS
jl
30.2mS

o so 6
1

1

KEY CLICKER

so 7

SLEEPER

n.

~ASI
I

I

I

-I7.2mSIKSDW

t

(ADR=68)
MA-8299

Figure 5-44 LED (Indicator) Keyclicks and
Bleeper Block Diagram

5-68

The power supply has the following protection.
Overcurrent Protection -- No damage to the power supply
result from a short circuit of any duration across the
output terminals. Normal operation resumes upon removal
of the short circuit.
Overvoltage protection -- A crowbar circuit is provided
to protect the load from damage. The crowbar activates if
the +12 V output voltage range is between 13.0 V and 15.0
Vdc.
No damage to the power supply results from
activation of the crowbar for any duration and at any
ambient temperature within specification limits.
Tolerance Band

=

+12 V: 11.4 to 12.6 dc
-12 V: -11.4 to -12.6 dc

Output Current

=

+12 V: 0.2 to 0.9A dc
-12 V: 0.2 to 0.075A dc

Voltage adjustments
Figure 5-45
follows.

shows

the

=

power

none.
supply

schematic.

The

explanation

The mains are brought in through an EMI filter, (Tl, Cl, C2, and
C3) rectified by BDI and deliver approximately 300 Vdc across
capacitive input filter C6, C7, C8, and C9. Current surge is
limited by Rl and R2 and transient voltages are suppressed by VDl
and VD2. By turning on power transistor Q2, this voltage is
applied across the primary of T2, charging its inductance with a
linear current ramp. When Q2 is turned off, the energy stored in
T2 is delivered from the secondary windings through rectifiers,
capacitive input filters and smoothing filters to the outputs.
Initial turn-on Q2 is done by Rl. Thereafter this task is
performed by the feedback winding on T2 driving through R4 and
C10. This winding initiates turn-on during the ring down following
flyback. The operating frequency varies with line and load.
IC3 compares the output voltage level at the base of Q3. When the
voltage created by L4 and R15 combination is sufficient to turn on
Q3, T3 terminates Q2's drive ••
Q2 can also be turned off when sufficient
across R12 causing Ql to turn on.
SCRI is used
overvoltage.

as

a

crowbar

designed

5-69

to

voltage

protect

is

developed

against

output

3CCT 350429-1
PCB HEADERS AMP 6CCT 350431-1
j

"S1
S2
220- 240V 120V

!lUI

L

~

T1

*}V01 -f1
V02
N

r--r. +
.--

*

,\

R2

C2

L1

-

R1

'--

H:

~ I

I ~ I
I

lJ1

I

-...J

R29

*

C3

03

I

-71+

+ C7

+?
I'

T;~

R4
R6.4

L2

-=-

r

IMATINGPLUG-FAN
fN0120/220V LI:JK
CONNECTION

--

H~

~

t-,
\

I

~C~

~t-Z2

I

L5
+1 C20+ C21
I--

C16

..

C17

;;:1'

~ rSCR1

;: I'

1~~Z1123124
;;r:;~

R22 R23

R28

;:08

f---o
012

C15
-::
09 ;- I'

::..0
,...

R11

R10

r

;::1"

I

•

•

I

Q1~ \

C14

!·-r~ +,L J

R8

,:? '\
\

•

•

Q~

R5

r=,-

T2

~C11

R3

C~O

C4

t t
R9

C6~ CB
'1" ,i'

,--1

I

-

013
S3

;::!':: C22

.j

+

+~,

1C2

R12

\
\

\

\
\

\

o

\

\
\

A~ 04

\

R14 R15\ L4

R16

\

C13

,Ir 010

~ r 05

\';;:1'
\

R18

;r-.

R24

.-

t---

\

R19

\

Q3
\
R'13

R20

\
\

'-----1

t-T3

;;:1"

R25 R26

*

C18

\

R27

C26
R21

R17'
MA-82.1

Figure 5-45 Power Supply Schematic

CHAPTER 6
TESTING AND TROUBLESHOOTING

6.1
INTRODUCTION
The VK100 terminal contains a complete set of hardware self-test
programs that check all of the major terminal functions. The
self-test indicates that a problem exists and where the problem
is.
Self-test mode has two tests power-up and diagnostic. Power-up
tests automatically check the condition of the terminal every time
terminal power is turned on. Diagnostic tests check the terminal
outputs. Diagnostic tests require optional test connectors.
The self-test functions of the VK100 are invoked in one of three
ways:
1.
2.
3.

Automatic Tests (PUPTST)
Escape Sequences (CSITST)
SET-UP Mode (SETST)

6.1.1
Automatic Tests (PUPTST) -- The user has no control of
the automatic confidence tests invoked when the terminal is
powered on. The same tests may be invoked by doing a terminal
reset (using SHIFT "-" key). These tests may also be called as a
group through the various methods listed below.
6.1.2
Escape Sequences (CSITST) -- All tests are invoked by the
escape sequence: ESC [3;Pn;Pn; ••• y] where Pn selects the test to
be performed as follows:
Pn

Test Selected

1
2.
3
4.
5.
6.

All power-up tests
External communication test
Hardcopy communication test
Display pattern test
Color bar test
Repeat selected tests until failure

Any set of these tests may be selected in any order; however, they
are always executed in numerical order.

6-1

The test select data is stored in a single byte (TSTSEL), with one
bit for each test/option selected. While the CPU, ROM and RAM
tests are running, these select bi ts are stored in register E,
preserving this register.
6.1.3
SET-UP Mode (SETST) -- When the terminal is in SET-UP
mode, setting the ST mode to any number has exactly the same
effect as specifying the same parameter in the above escape
sequence. The selected tests are executed when ST" is set. Thus
typing STI9" selects all the power-up tests and repeats these
tests until failure. Every time the ST parameter set routine
(STPPST) is called, it accumulates the test select data (TSTSEL).
6.1.4
Error Reporting -- Errors occurring during any test are
reported in one of two ways:
1.
2.

Fatal errors
Non-fatal errors

6.1.4.1 Fatal Errors (TSTERROR) -- A fatal error (which c,auses
the terminal to be useless) displays an error code in the
indicators with the LOCAL indicator, alternating with a possible
data i tern wi th the Line indicator, each for about 1/2 second.
Table 6-1 shows the possible error codes.

Table 6-1 Possible Error Codes
Error Codes
Basic

"
"
"
"
"

Hard
Copy

Data
Ll

L2

"
"
"
"

" "
" 1
1
"

CPU Register Error

Data=1111

ROM Error

1

" "

Vector Generator
Error

Data=Bits 14,13,12 of
ROM Address in Error
Data=Bit Number of RAM
Error
Data=Bit Number of
Screen RAM Error
Data=1111

1

1

1

1

RAM Error
Video Bit Map Error

CRT Controller
Register Error

6-2

Data=1111

6.1.4.2 Non-Fatal Errors -- Errors which allow some portion of
the terminal to be useful display an error code in the center of
the screen. The following are the possible error codes.

1.
2.
3.
4.

KB
IC
EC
HC

ERR
ERR
ERR
ERR

Keyboard
Internal
External
Hardcopy

error
communication test error
communication test error
test error

The two-byte mnemonic for the error is stored (TSTERM) and upon
completion of terminal initialization is displayed in the center
of the screen. The terminal always comes up in the local mode if
any non-fatal errors are detected (only LOCAL indicator is lit).
6.2
POWER-UP SELF-TEST
Power-up self-tests check the following terminal circuits.
Microprocessor
Visual and audible indicators
Read only memory (ROM)
Random access memory (RAM)
CRT controller
CRT timing
Vector timing
Video bit map
Vector generator
Keyboard
Communications (internal)
The power-up self-test can be started in four different ways.
1.

Turn the terminal power switch to the on position.

2.

Reset the terminal by pressing the shift
keypad PF4 keys together in SET-UP mode.

3.

Select the set-up self-test feature

4.

Receive a command from the host computer.

and

auxiliary

(STl).

The power-up self-test takes about 15 seconds. While the test is
running, the moni tor displays various patterns that do not make
sense. This is normal. Once the test is complete the cursor
appears in the upper left corner of the monitor and only the
ON-LINE indicator is turned on. If the self-test finds an error,
it shows on either the keyboard or the monitor.

6-3

6.2.1
8985 CPU Test (CPUTST)
The microprocessor test checks the following registers: A, B, C,
0, E, H, L, and SP by writing two patterns in the registers. The
two patterns are:
~ 1 ~ 1 ~ 1 ~ 1
1 0 1 ~ 1 0 1 ~

1.
2.

The test is as follows:
PATTERN

~

A

~

B

~

~

C

~

0

~

E

H

~

L

~

SP

The pattern is loaded in the accumulator (A register)
shifted to the B register ••• shifted to the SP.

which is

Firmware clears H L and then does a double add with the SP. The H
L registers end up with the following.

H
~

L
1

~

1

~

1 0 1

~

1

~

1

~

1

~

1

The firmware compares the contents of the Hand L register with
the contents of the A register. If either test finds a difference,
an error code is generated.
The error code = ~~~~
The data code = 1111
After the first pattern is checked, the second pattern is loaded
and tested in the same manner.
6.2.2
Visual and Audible Indicators
The firmware when testing the indicators and bleeper circuits
loads the accumulator with a value (~1~10UJ). This turns on the
ON-LINE, NO SCROLL, HARDCOPY and L2 indicators and the bleeper for
approximately 1/4 second (Figure 5-4).
6.2.3
The ROM
the ROMs
are used
there is

ROM Test (ROM TST)
test ver i f i es the add ressabi 1 i ty, order and data of all
present in the VKI0~. Only the CPU (8085A) and the ROMs
in this test. There are four ROMs that are tested. If
an error, the indicators blink.
Basic

with code equal to
with data equal to

~

Hard
copy

o

Ll

o

6-4

L2
1

= ROM failure
= address of ROM in error

To start the ROM test the following steps.
1.

Each ROM has a check byte stored somewhere in each ROM
and is a function of the ROM address.

2.

Set initial value to high byte of ROM address + 1.

3.

Rotate current check value left one bit.

4.

Exclusive-OR current value with this ROM byte.

5.

If value is zero,
indicates an error.

ROM

is

correct.

Any

other

value

6.2.4
Program RAM Test (RAM TST)
The program RAM checks to see if every bit can be written with
ones and zeros and that every address is correct. This test uses
only the 8085 CPU and the RAMs. The following patterns are written
into the RAMs.
11111111
010HH01
10101010
00000000
The ROM firmware writes the all ones pattern into the RAM memory.
To start the RAM test perform the following steps for each RAM
byte.
1.

Read the first byte and compare with the old pattern (all
ones). If the pattern is different, an error occurs.

2.

If no error is found, write new pattern into the first
byte location and continue this sequence until done.

3.

If the error indicators blink with code
the bit number of RAM bits in error.

=

=

0010, the data

6.2.5
Video Bit Map RAM Test (VBMTST)
This test checks the entire video bit map for read/write of 0 and
1. A simple vector pattern is written throughout the entire memory
(including the attribute memory) and then read back. The test uses
CPU, ROM, Program RAM and the vector generator. To start the video
bit map RAM test perform the following algorithm:
1.

Set pattern =
blue.

01010101 (2)'

2.

Set vertical position to zero.

6-5

blink = off,

color

=

green

3.

4.

Do 256 times:
a.

Set horizontal position to zero.

b.

Write 128 dot vector horizontal to the right. Repeat
six times.

c.

Increment vertical position by 2.

For pattern = UJl"l"l" ( ),
pattern = """"""""(2)' blfnk
the following.

blink

= off,

a.

Set vertical position to zero.

b.

Do 256 times:

= on, color = red;
color = dark; perform

1.

Set horizontal position to zero.

2.

Do 64 times:
a.

Do 3 times
Read 4 horizontal at current position
Advance horizontal position by 4.
Compare 4 bits just read with last pattern
written. If pattern is different, an error is
indicated.

c.

3.

Read 4 attribute bits
at current position.

(blink,

green,

red,

blue)

4.

Compare 4 bits just read with last pattern.
pattern is different an error is indicated.

5.

Decrement horizontal position by 12.

6.

Write a 12 dot vector to the right.

If

Increment vertical position by 2.

If error indicators blink with code = ""11, then the data = the
bit number of data in error (bits "--11 are bit map bits, 13--16
are attribute bits).
6.2.6
Vector Generator Test (VGNTST)
The vector generator test writes a series of vectors from a single
point and comparises a small portion of the resultant bit map with
an expected result. This test uses the 8"85, ROM, Program RAM, and
video bit map RAM.

6-6

To start the vector generator test perform the following steps:
1.

Clear video bit map

2.

Write the following
starting at (-I,fi'l)

3.

Read and compare the 8 by 8 dot sample from
to (fi'l,7),(7,7) with the following pattern:

sequence

of

vectors

(Figure 6-1)

(fi'l,fi'l),(7,fi'l)

(fi'l,fi'l) fi'lfi'lIfi'lfi'lfi'lfi'lfi'l (7 , fi'l)
fi'lfi'lIfi'lfi'lfi'lfi'lfi'l
fi'lfi'l1 fi'lfi'lfi'lfi'l 1
lfi'llfi'lfi'lfi'lfi'lfi'l
fi'lfi'lIfi'lfi'lfi'lfi'lfi'l
fi'lfi'llfi'lfi'lfi'lfi'lfi'l
fi'lfi'lIfi'lfi'lfi'lfi'lfi'l
(fi'l,7) fi'lfi'lfi'lIfi'lfi'lfi'lfi'l (7,7)
If pattern is not identical an error occurs.
4.

If an error occurs
following patterns.

the

indicators

will

blink

Code=fi'llfi'l1
Data=llll

SeQuence of Vector Te.t (8)

7 6 5 4 3 2 1 0

DU

765 4 3 2 1 0

DV"

765 4 321 0

DIR

P"UL

321 0

765 4 321 0

PAT

YOPS

o

0 0 0 1 000

111 1 1 0 1 0

0 0 0 0 1 1 1 1

1 1 1 1

100 1 1 100

0 1 1 1 1 000

o

0 0 0 1 001

1 1 1 1 101 1

0 0 0 0 1 101

1 1 1 0

1 0 1 0 1 000

011 1 100 1

o

0 0 001 1 1

1 1 1 1 1 100

0 0 0 0 1 0 1 0

110 1

1 1 1 000 0 0

011 1 1 0 1 0

o

0 000 1 0 1

1 1 1 1 101 0

000 0 1 000

1 100

1 1 0 0 0 0 0 0

011 1 101 1

7 6 5 4 3 2 1 0

o 0 0 0 1 001

1 1 1 1 1 101

0 0 0 0 1 1 1 0

101 1

1 1 0 0 0 0 0 0

011 1 1 100

o

0 000 1 0 0

111 1 1 101

000 0 1 100

1 0 1 0

1 1 0 0 0 0 0 0

0 1 1 1 1 101

o

0 0 0 0 0 0 1

1 1 1 1 1 1 1 0

0 0 0 0 1 0 1 1

100 1

100 0 0 0 0 0

011 1 1 110

o

0 001 100

111 1 1 111

0 0 0 0 1 001

100 0

0 0 0 0 0 000

0 1 1 1 1 1 1 1

Figure 6-1

Vector Generator Sequence

6-7

the

6.2.7
CRT Controller Test (CRTST)
This test makes sure that the CRT controller registers can be read
and written. Only one register of the CRT controller, the cursor
reg i ster, is read/wr i te. Thi s test uses the CPU and ROM. Two
patterns are used in this test.
01010101(2)' 10101010(2)
1.

Write the cursor low register
it with the pattern.

2.

Read the cursor low register and compare with pattern. If
the pattern is different or an error occurs.

3.

If an error occurs
following patterns.

the

(register 15)

indicators

will

and compare

blink

the

Code=0101
Data=llll
6.2.8
CRT Timing
Firmware routine checks for the V SYNC signal from the CRT
controller. If V SYNC is not received within 20 ms, a CRT timing
error is generated.
Code 0100100 (Local and Hardcopy)
Data 1001111 (On-Line, Basic, Hardcopy, Ll, L2)
6.3
DIAGNOSTIC TESTS
These tests are not normally executed by the terminal. They can be
initiated via setup or escape sequences. They exist for diagnostic
purposes and for error isolation in repair operations. The VK100
terminal contains five diagnostic tests.
External communications test
Hardcopy communications test
Display test
Color bar test
Screen alignment pattern
The following paragraphs describe Each test.
6.3.1
External Communications Test
This test is an extension of the internal communications test in
the power-up test. In the external communications test the
transmit and receive lines are connected through a special
loopback connector. A predefined set of characters are then
transmi tted. The terminal receives the characters and compares
them to the characters transmitted. If the characters do not match
an error
is
indicated.
This
test is performed for all
communications speeds.
This test requires an optional loopback connector.

6-8

To start
steps:

the

external

communications test perform the

following

1.

Turn terminal power off.

2.

Disconnect the communications cable from the rear of the
terminal.

3.

Install the optional
communications output
number 12-13336-00 is
70-13503-00 is for 20

4.

Turn terminal power on.

5.

Place the terminal in SET-UP mode.

6.

Verify CI SET-UP feature

7.

Set the self-test SET-UP feature for selection 2 (ST2).

8.

Exit SET-UP mode by pressing the SET-UP key.
the test.

loopback connector on the terminal
connector. Loopback connector part
for EIA communications; part number
rnA current loop communications.

(CI0=EIA; CIl=20 rnA).

This starts

If no error is found by the test the cursor is displayed on the
monitor. Paragraph 6.4 lists the displayed error codes and their
meanings.
6.3.2
Hardcopy Communications Test
This test is similar to the external communications test described
above. In the hardcopy communications test, the transmit and
receive hardcopy output lines are connected through an EIA
loopback connector. A predefined set of characters is then
transmi tted. The terminal receives the characters and compares
them to the characters transmitted. If the characters do not match
an error is indicated.
This test requires an optional loopback connector.
To start
steps:

the

hardcopy

communications test perform the

following

1.

Turn terminal power off.

2.

Disconnect the
the terminal.

3.

Install the optional loopback connector on the terminal
hardcopy connector. The loopback connector is part number
12-13336-00.

4.

Turn terminal power on.

5.

Place the terminal in SET-UP mode.

hardcopy printer

6-9

cable

from

the

rear

of

6.

Set the self-test set-up feature for selection 3 (ST3).

7.

Exit SET-UP mode by pressing the SET-UP key.
the test.

This starts

If no error is found by the test the cursor is displayed on the
monitor. Paragraph 6.4 lists the displayed error codes and their
meanings.
6.3.3
Display Test
Th i s t est dis pIa y s a full s c r e en 0 f b I u e , red, g r e en , whit e ,
black, and a c rossha tch pattern. Each display sc reen lasts fo r
approximately one-half second and the crosshatch pattern remains
on the screen at the end of the test. On a black and white monitor
the test displays full screens of increasing intensity.
To start the display test perform the following steps.
1.

Place the terminal in SET-UP mode.

2.

Set the self-test set-up feature for selection 4 (ST4).

3.

Exit SET-UP mode by pressing the SET-UP key.
the test.

This starts

An error in this test occurs if one of the display screens is not
shown. If this happens the monitor attached to the VK100 terminal
may have failed. Proceed with the color bar test.
To clear the moni tor screen reset
SHIFT and PF4/RESET keys together.
6.3.4
Color Bar
This test displays
The color bar/grey
vertical bars. On
order from left to
Black
Blue
Red
Magenta

the

terminal

by pressing

the

Test
a color bar/grey scale pattern on the monitor.
scale pattern consists of eight equally spaced
a color monitor the bars are in the following
right:

Green
Cyan
Yellow
White

On a monochrome (black and white) monitor the bars show as
different shades of grey. The bars start as black on the left and
increase in intensity to a white bar on the right of the display.
To start the color bar test perform the following steps:
1.

Place the terminal in SET-UP mode.

2.

Set the self-test set-up feature for selection 5 (ST5).

3.

Exit SET-UP mode by pressing the SET-UP key.
the test.
6-10

This starts

F

An error in this test occurs if the color bar/grey scale pattern
is not displayed or a portion of the pattern is missing. Either
error condition indicates that the attached monitor has failed,
the video cable is not connected properly, or the VK100 terminal
has failed. If you suspect that the terminal has failed, connect
it to a different monitor and perform both the display and color
bar/grey scale tests. If the same symptoms are present the second
time the terminal has probably failed.
To clear the moni tor screen reset
SHIFT and PF4/RESET keys together.

the

terminal

by pressing

the

6.3.5
Screen Alignment Pattern
Th is t est fill s the s c r e e n wit h a crosshatch pattern. The
crosshatch pattern adjusts the display moni tor connected to the
VK100 terminal.
To place the screen alignment
perform the following steps:

pattern

on

the

monitor

screen

1.

Place the terminal in SET-UP mode.

2.

Set the self-test set-up feature for selection 4 (ST4).

3.

Exit SET-UP mode by pressing the SET-UP key. This starts
the di splay test. At the end 0 f the display test the
screen alignment pattern remains on the screen.

To clear the moni tor screen reset
SHIFT and PF4/RESET keys together.

the

terminal

by pressing the

6.4
ERROR CODES
There are two categories of errors: fatal and nonfatal. Fatal
errors cause the terminal to immediately stop all operations. The
monitor screen displays random patterns that do not make sense. In
addition to the random pattern an error code is displayed on the
keyboard indicators. Table 6-2 shows the possible error codes.
The fatal error code displayed on the keyboard light indicators
contains two different messages: an error code and a data code.
The error code lights the LOCAL indicator and displays a code in
the BASIC, HARDCOPY, Ll, and L2 indicators. The data code lights
the ON-LINE indicator and is displayed in the BASIC, HARDCOPY, Ll,
and L2 indicators. The VK100 terminal alternates between each
message about everyone-quarter second.

6-11

Table 6-2

possible Fatal Error Codes

Error Code Displayed
Local

No
Scroll

Basic

Hard
Copy

L
1

L
2

X

0

0

0

0

0

0

Microprocessor
error

0

X

0

X

X

X

X

Data code

X

0

0

0

0

0

X

ROM error

0

X

0

0

?

?

?

Data code

X

0

0

0

QJ

X

0

RAM error

0

X

0

0

?

?

?

Data code

X

0

0

0

"

X

X

CRT controller
error

0

X

0

X

X

X

X

Data code

X

0

0

0

X

0

0

CRT controller
timeout

0

X

0

X

X

X

X

Data code

X

"

0

0

X

0

X

Vector timeout
error

0

X

X

X

X

X

Data code

On
Line

X
0
?

=
=
=

ON
OFF
variable condition

6-12

Meaning

Nonfatal errors do not hal t the terminal processor. Instead, the
terminal displays an error code on the keyboard indicators and in
the center of the monitor screen. The terminal may still be used
if a nonfatal error occurs. In this case, the terminal remains in
on-line or local mode with the appropriate indicator lit. The
error is indicated by any of the BASIC, HARDCOPY, LI or L2
indicators blinking. An example of this type of occurrence is a
keyboard error. If the self-test detects a keyboard error, the L2
indicator blinks, and the message KB ERR is shown on the monitor
screen.
Table 6-3 lists all of the nonfatal error
displays and what they mean to the terminal.

Table 6-3

codes

the

terminal

Possible Nonfatal Error Codes

Indicator Error Code
No
Scroll

Hard
Copy

L

L

Basic

1

2

f2J

f2J

B

B

"

B

B

B

B

B

B

0
B

=
=

Screen
Code

Meaning

ID Err

Vector generator and
internal
communications data
loopback error

IT Err

Vector generator and
internal
communications timeout
error

B

KC Err

Vector generator,
keyboard and
communications control
signal error

B

B

KD Err

Vector generator,
keyboard and internal
communications data
loopback error

B

B

KT Err

Vector generator,
keyboard and internal
communications timeout
error

Indicator FF
Indicator blinking

6-13

Table 6-3

Possible Nonfatal Error Codes (Cont)

Indicator Error Code
No
Scroll

Hard
Copy

L

L

Basic

1

2

Screen
Code

Meaning

(2)

B

(2)

(2)

(2)

None

Video RAM error

(2)

B

(2)

(2)

B

KB Err

Video RAM and keyboard
error

B

B

IC Err

Video RAM and internal
communications control
signal error

B

B

ID Err

Video RAM and internal
communications data
loopback error

B

B

IT Err

Video RAM and internal
communications timeout
error

B

B

B

KC Err

Video RAM, keyboard
and internal
communications control
signal error

B

B

B

KD Err

Video RAM, keyboard
and internal
communications data
loopback error

B

B

B

KT Err

Video RAM, keyboard
and internal
communications timeout
error

None

Video RAM and vector
generator error

KB Err

Video RAM, vector
generator and keyboard
error

B

B

B

B

B

6-14

Table 6-3

Possible Nonfatal Error Codes (Cont)

Indicator Error Code
No
Scroll

"

"
B

=
=

L

L

Basic

Hard
Copy

1

2

B

B

B

B

B

B

Screen
Code

Meaning

IC Err

Video RAM, vector
generator and internal
communications control
signal error

B

ID Err

Video RAM, vector
generator and internal
communications data
loopback error

B

B

IT Err

Video RAM, vector
generator and internal
communications timeout
error

B

B

B

B

KC Err

Video RAM, vector
generator, keyboard
and communications
control signal error

B

B

B

B

KD Err

Video RAM, vector
generator, keyboard
and internal
communications
data loopback error

B

B

B

B

KT Err

Video RAM, vector
generator, keyboard
and internal
communications timeout
error

"

Indicator FF
Indicator blinking

6-15

6.S
TROUBLESHOOTING
The troubleshooting section consists of Tables 6-4 through 6-6.
These tables show the indicators error code, screen code and the
module to replace.
Table 6-7
numbers.

the

on-si te

recommended

spares

Table 6-8 lists the
their part numbers.

DIGITAL

Servicenter

Recommended

Table 6-4

shows

and

the i r
Spares

part
and

Fatal Error Codes

Indicator Error Code
On
Line

Local

X

"

"
"
"

X

X

X

X

"
"
"
X

X

"

X

X

"

"

X

X

"

"
"?

X

No
Scroll

"
"
"
"
""
"
"
"
"
"

Module
to
Replace

Basic

Hard
Copy

L
1

"

"

" "

X

X

X

X

Data code

""
""
"

"?
"?
"

"?

X

ROM error
Data code

Logic

?

X

"?

RAM Error
Data code

Logic

?
X

X

CRT controller
error

Logic

X

X

X

X

Data code

"

X

" "

X

X

X

X

Data code

"

X

"

X

Vector timeout
error

X

X

X

X

Data code

X = ON
= OFF
= Variable condition

6-16

L
2

Meaning
Microprocessor
error

CRT controller
timeout

Logic

Logic

Logic

Table 6-5

Nonfatal Error Codes

Indicator Error Code
No
Scroll

Basic

"
"
""
""
"
""
"
""
""
""
""
""
""
""
""
""
""
"
""
"
""
"
"
""
"
"
""
"
B
B
"
B
B
"
B
""
B
B
B
""
B
B
""
B
B
""
B
B
""
B
B
" Indicator
" == Indicator
B
0

0

Hard
Copy

"
"""
""
""
""
""
""
B
B
B
B
B
B
B
B

""
"
"
"""
B
0

B
B
B
B
B
B

B

L

L

1

2

"B

B

B
B
B
B
B
B
B
B
B
B
B
B

"""
""
""
""
"B
B
B

"B" B"
B
""
B
"
B
B
B
B

B
B

"" "B
"
B
"
B
B
B

0

B

B
B

B
B

"" B"
""
"B

B
B
B
B
B
B

B
B

off
blinking

6-17

Screen
Code

Module to
Replace

KB Err
IC Err
10 Err
IT Err
EC Err
EO Err
ET Err
EM Err
HC Err
HO Err
HT Err
KC Err
KO Err
KT Err
None
KB Err
IC Err
10 Err
IT Err
KC Err
KO Err
KT Err
None
KB Err
IC Err
10 Err
IT Err
KC Err
KO Err
KT Err
None
KB Err
IC Err
10 Err
IT Err
KC Err
KO Err
KT Err

Keyboard
Logic
Logic
Logic
Logic
Logic
Logic
Logic
Logic
Logic
Logic
Keyboard
Keyboard
Keyboard
Logic
Keyboard
Logic
Logic
Logic
Keyboard
Keyboard
Keyboard
Logic
Keyboard
Logic
Logic
Logic
Keyboard
Keyboard
Keyboard
Logic
Keyboard
Logic
Logic
Logic
Keyboard
Keyboard
Keyboard

and Logic
and Logic
and Logic
and Logic

and Logic
and Logic
and Logic
and Logic

and Logic
and Logic
and Logic
and Logic

and Logic
and Logic
and Logic

Table 6-6
Type of
Problem
Power

VK100 Troubleshooting
Symptom

Check

No indicators,
no video on
monitor, no
SET-UP key
response, no fan

Line fuse
Power cord

Corrective
Action
Replace if
open.
Reconnect
at both ends.
Replace power
cord if open.

Power supply
connections
J2 and J3

Reconnect
power supply.
Replace power
supply.

No indicators,
no video on
monitor, no
SET-UP key
response. Fan
is on.

Check power
supply
voltages:
+12, +5, -12,
(Fig. 6-1)

If voltages
are wrong
replace power
supply.
If voltages
are ok:
Replace
keyboard.
Replace logic
board.
Replace
keyboard.
Replace logic
module.

No indicators,
no SET-UP key
response. Fan is
on and video
present on
monitor.
No fan, SET-UP
key responds,
Indicators are
on and video
is present on
monitor.

Fan is
obstructed.

Clear
obstruction.

Fan cable.

Replace
power supply.

Error code
displayed in
indicator
(self-test error).

See Tables
6-4 and 6-5.

6-18

Table 6-6
Type of
Problem
Video with
a color
monitor.

VK100 Troubleshooting (Cont)
Symptom

Check

Corrective
Action

No cursor
displayed.

HP, HM, or VM
SET-UP features
are set wrong.

Change SET-UP
feature
settings.

Monitor
brightness

Increase
monitor
brightness.

Monitor power
on

Turn monitor
power on.

Have customer
check monitor
fuse.

Have customer
replace
monitor fuse.

Run color bar
and screen
alignment
self-tests.

Replace
logic board.

Have customer
swap monitor
with another
monitor.

If problem
is solved
the monitor
is bad.
Monitor
repair is the
customer's
responsibility.

Check video
connections.

Reconnect
video cable.

Wrong color
displayed.

Replace
video cable.

Replace video
cable.
Have customer
adjust monitor.
Incorrect data
displayed or
sync is lost.

Replace video
cable.
Replace logic
module.

6-19

Table 6-6

VK100 Troubleshooting (Cont)

Type of
Problem

Symptom

Check
Monitor is bad.

No cursor
displayed.

Monitor repair
is the
customer's
responsibility.
Replace logic
module.

No color is
displayed. The
monitor display
is always white.
Video with
black and
white
(monochrome)
monitor.

Corrective
Action

HP, HM or VM
SET-UP features
are set wrong.

Change SET-UP
feature
settings.

Monitor
brightness.

Increase
monitor
brightness.

Monitor power
on.

Turn monitor
power on.

Have customer
check monitor
fuse.

Have customer
replace
monitor fuse.

Run color bar
and screen
alignment
self-test.

Replace
video cable.

Have customer
swap monitor
with another.

If problem
is solved,
the monitor
is bad.

Replace logic
module.

Monitor repair
is the customer'E
responsibility.
Replace
video cable.

Incorrect data
is displayed or
sync is lost.

Replace logic
module.

6-20

Table 6-6
Type of
Problem

VKl00 Troubleshooting (Cont)
Symptom

Check
Monitor is bad.

Hardcopy

No hardcopy
output (lor
more terminals)

Corrective
Action
Monitor repair
is the
customer's
responsibility.

Make sure all
VKl00 and LA34VA
terminals are
turned on.
Make sure
correct I/O
cables are used
and connected.
Perform the
hardcopy selftest on all
VKl00 terminals
in the string.

Wrong data is
printed.

Replace logic
module on
failing unit.
Replace
hardcopy cable.

Perform the
LA34VA
self-test.

The problem is
in the LA34VA.

Check the
SET-UP
parameters at
VKl00 and LA34VA
terminals.

Change the
SET-UP
parameters.

Perform the
hardcopy
self-test.

Replace logic
module.
The problem is
in the LA34VA.

6-21

Table 6-6
Type of
Problem
Communication

VK100 Troubleshooting (Cont)
Corrective
Action

Symptom

Check

VK100 does not
communicate
with the
host system.

Check the
SET-UP
parameter
settings in the
terminal and
make sure that
they agree with
the host system.

Change the
SET-UP
parameters.

Perform the
external communications
self-tests.

Replace logic
module.
Replace
communications
cable.
The problem is
in either the
modem (if one
is used) or the
system.

Table 6-7
Qty
1
1
1
1
1
1
1

1
1
1

10
10
4
1
4
1

On-Site Recommended Spares

Description

Part Number

Logic module
Power supply assembly
Keyboard assembly
y type cable
Video cable, coaxial
Loopback connector (EIA)
Loopback connector (20 rnA)
Power cord (115 V)
Power cord (230 V)
Power cable (dc)
Plunger, 5/16 dia.
Grommet, snap-in, 5/16 dia.
Screw, sems, slotted head, 4-40 X 3/8
Fuse, 2 A, 250 V box of 5
Screw, sems, slotted head, 10-32 X 3/8
Keycap removal tool

54-14230-00
70-17387-00
70-17397-FS
17-00197-00
17-00223-00
12-15336-00
70-15503-00
17-00083-09
17-00083-10
70-17389-00
90-09964-00
90-09966-01
90-09702-00
90-07215-00
90-06444-00
74-16355

6-22

Table 6-8
Qty
1
1
1

1
1
1
1
1
1
1
1
1

10
10
10
20
20
1
1
2

10
10
10
10
10
10
10
10
10
2
2
1
1
1
1
2
2
2
2
2

DIGITAL Servicenter Recommended Spares

Description

Part Number

Log ic module
Power supply assembly
Power supply module (PCB only)
Power cable (dc)
Receptacle assembly (ac)
Power cord (115 V)
Power cord (230 V)
Power switch, 2-pole, 16 A
Fan assembly
Fuseholder
Keyboard assembly
Keyboard distribution cable
Indicator, ANCD @ 10 rnA
Keyboard plunger
Keyboard spring
Keyboard contact, quadfurcated
Keyboard contact
Switch, array cap. solid adapter
Fuse, reg. blow, 2 A 250 V (box of 5)
Screw, Sems, slotted head, 10-32 X 3/8
Support, C Bd. standoffs
Screw, Sems, slotted head, 4-40 X 3/8
Plunger, 5/16 dia.
Grommet, snap-in, 5/16 dia.
Screw, captive, hex slotted
Bumper, round
Bumper, square
Fastener, pinch-on
Screw, hex head, slotted, 6-32 X 5/16
Case, bottom
Case, top
Y type cable
Video cable, coax
Loopback connector (EIA)
Loopback connector (20 rnA)
Foam insert, top
Foam insert, bottom
Carton, die-cut
Polybag
Tape

54-14230-00
70-17387-00
12-16987-00
70-17389-00
70-17411-00
17-00083-09
17-00083-10
12-17051-00
12-16488-00
12-16931-00
70-17397-FS
70-17390-00
11-10864-00
12-11862-00
12-11863-00
12-11865-00
12-11866-00
12-14332-00
90-07215-00
90-06444-00
90-09313-00
90-06444-00
90-09964-00
90-09966-01
12-16682-00
90-09538-00
90-09624-00
90-09601-00
90-09967-00
70-17394-00
70-17395-00
17-00197-00
17-00223-00
12-15336-00
70-15503-00
99-06742-00
99-06742-01
99-06793-00
99-05128-17
99-06486-00

6-23

6.6
ADJUSTMENTS
The VK100 is not adjustable. All power supply and video outputs
are constant. The appropriate module must be replaced if an output
is low or not present.
The video monitor is adjustable. The monitor is provided by the
customer and is the-responsibility of the customer. Adjustments to
the monitor must be made by the customer or a service technician
who has been qualified by the monitor manufacturer. DIGITAL does
not supply any monitor for use with the VK100 terminal.
The best way to determine if the monitor requires adjustment is to
swap the suspected bad monitor with one that is working correctly.
If the problem d i sappea rs the moni to r is bad. I f the problem
remains the VK100 terminal contains a problem. Use the procedures
in Chapters 2 and 3 to test the terminal and locate the problem.
6.7
REMOVAL AND REPLACEMENT
To remove or replace a subassembly, the only tools necessary are:
Common blade screwdriver or
1/4 inch nutdriver
Figure 6-2 lists all removal procedures in this chapter and the
sequence in which they are performed. As an example, Figure 6-2
shows that to remove the terminal logic board the top cover,
keyboard assembly, and power supply assembly removal procedures
must be performed first.

TOP COVER
(PARA 5.2)

KEYBOARD ASSY.
(PARA 5.3)

POWER SUPPLY
ASSY
(pARA 5.4)

1

1
POWER SUPPLY
REGULATOR BD
(PARA 5.5)

POWER SUPPLY
FAN ASSY
(PARA 5.6)

TERMINAL
LOGIC BOARD
(PARA 5.7)
MA-6709

Figure 6-2

Module Removal Sequence

6-24

/

6.7.1
Top Cover Removal
To remove the top cover perform the following steps.
1.

Remove
plug.

power

from

the

terminal by disconnecting

2.

Turn the terminal over so that the bottom of the terminal
is access-ible.

3.

Loosen the four (4) captive screws at the corners of the
terminal (Figure 6-3). The screws may be loosened wi th
either a nutdriver or a blade-type screwdriver.

4.

Grasp the top and bottom halves of the terminal and turn
the terminal over so that the keyboard is face up.

5.

Grasp the top cover by its s ides and lift the cove r
and off the terminal.

6.

Install the top cover by performing steps 1 through 5 in
reverse.

CAPTIVE SCREWS

o

@]

MA·6710

Figure 6-3

VKlOO Terminal (Bottom View)

6-25

the ac

up

6.7.2
Keyboard Assembly Removal
To remove the keyboard assembly perform the following steps.

1.

Remove the terminal top cover (Paragraph 6.7.1).

2.

Release the four (4) pop fasteners securing the keyboard
assembly to the terminal (Figure 6-4). To release the pop
fasteners pull up on the plungers.

3.

Gently remove the keyboard assembly from the terminal and
place it in front of the terminal.

4.

Disconnect
board.

the

keyboard

ribbon

cable

from

the

logic

CAUTION
Do not disconnect the keyboard ribbon
cable from the keyboard. Any attempts to
do so will damage the connector and
force replacement of the entire keyboard
assembly.
5.

Remove the keyboard assembly.

6.

Install the keyboard
through 5 in reverse.

assembly

by

performing

KEYBOARD
ASSY

DO NOT
REMOVE THIS
CONNECTOR

Figure 6-4

POP FASTENERS
(4)

LOGIC BOARD
KEYBOARD CABLE
CONNECTOR

MA-6711

Keyboard Assembly Removal

6-26

steps

1

6.7.3
Power Supply Assembly Removal
To remove the power supply assembly perform the following steps.
1.

Remove the terminal top cover (Paragraph 6.7.1).

2.

Remove the keyboard assembly (Paragraph 6.7.2).

3.

From the rear of the terminal, remove the grounding screw
securing the connector bracket to the power supply
chassis
(Figure 6-5). The screw may be removed with
either a nutdriver or a blade-type screwdriver.

4.

Release the four (4) pop fasteners securing the power
supply assembly to the terminal (Figure 6-6). To release
the pop fasteners pull up on the plungers.

GROUND SCREW

@l)Oc:::::lO 0

MA-671S

Figure 6-5

POP FASTENERS (4)

VK100 Terminal (Rear View)

POWER SUPPLY
ASSY

J9
(NOT SHOWN)

Figure 6-6

Power Supply Assembly Removal

6-27

5.

Gently remove the power supply assembly from the terminal
and place it next to the rear edge of the terminal.

6.

Disconnect the 6-wire power output cable from J9 on the
terminal logic board.

7.

Remove the power supply assembly.
NOTE
P14 connects to J14 for 115 V operation,
or P14 connects to J13 for 230 V
operation.

8.

Install the power supply assembly by performing steps 1
through 6 in reverse.

6.7.4
Power Supply Regulator Board Removal
To remove the power supply regulator perform the following steps.
1.

Remove the terminal top cover (Paragraph 6.7.1).

2.

Remove the keyboard assembly (Paragraph 6.7.2).

3.

Remove the power supply assembly (Paragraph 6.7.3).

4.

Disconnect the 3-wire connector from J11 on the regulator
board.

5.

Disconnect the 6-wire connector from J14
(230 V) on the regulator board.

6.

Remove the power output cable from J10 on the regulator
board.

7.

Remove the four (4) screws secur ing the regulator board
to the power supply chassis. Remove the regulator board.
The screws may be removed with either a nutdriver or a
blade-type screwdriver.

8.

Install the power supply assembly by performing steps 1
through 6 in reverse.

6-28

(115 V)

or J13

6.7.5
Power Supply Fan Assembly Removal
To remove the power supply assembly perform the following steps.
l.

Remove the terminal top cover (Paragraph 6.7.1) .

2.

Remove the keyboard assembly (Paragraph 6.7.2).

3.

Remove the power supply assembly (Paragraph 6.7.3).

4.

Disconnect the 6-wire connector from J14 ( 115 V)
(230 V) on the power supply regulator board.

5.

Remove the two (2) screws securing the fan assembly to
the power supply chassis (Figure 6-7). The screws may be
removed with either a nutdriver or a blade-type
screwdriver.

6.

Install the power supply assembly by performing steps 1
through 4 in reverse.

or J13

MOUNTING
SCREWS

POWER SUPPLY CHASSIS
(REGULATOR BOARD REMOVED)

MA-6714

Figure 6-7

Power Supply Fan Assembly Removal

6-29

6.7.6
Terminal Logic Board Removal
Perform the following steps to remove the terminal logic board.
1.

Remove the terminal top cover (Paragraph 6.7.1).

2.

Remove the keyboard assembly (Paragraph 6.7.2).

3.

Remove the power supply assembly (Paragraph 6.7.3).

4.

Release the four (4) pop fasteners secur ing the log i c
board to the bottom cover (Figure 6-8). To release the
pop fasteners pull up on the plungers.

5.

Remove the terminal logic board.

6.

Install the terminal
through 5 in reverse.

7.

Be sure to set the
customer settings.

logic

board by performing steps 1

default

SET-UP

switches

TERMINAL
LOGIC
BOARD
MA-6712

Figure 6-8

Terminal Logic Board Removal

6-30

to

the

APPENDIX A
VK100 TERMINAL SPECIFICATIONS

VK100 TERMINAL SPECIFICATIONS
Dimensions
Height
Width
Depth

9.88 cm (3.89 in)
49. 30 cm ( 19 .40 in)
31. 10 cm (12. 25 in)

Shipping weight

5.7 kg

Weight
(12.5 Ibs)

Environment
Operating
Temperature
Relative humidity
Max wet bulb
Min dew point
Altitude

10' to 40' C (50'
10% to 90%

to 104' F)

28' (82' F)
2' C (36' F)

2.4 km (8,000 ft)

Nonoperating
-40' to 66' C (-40'
5% to 95%
9.1 km (30,000 ft)

Temperature
Relative humidity
Altitude

to 151' F)

Power
Line voltage

90--128 V RMS single phase,
2 wire with ground wire
180--256 V RMS single phase,
2 wire with ground wire
(internally selectable)

Line frequency

46 Hz to 61 Hz

Current

1.3 Arms max at 115 Vrms
0.7 Arms max at 230 V

A-I

Power
Input power

120 VA apparent, 60 W max

Current limiting

2 A/250 V normal blow fuse

Power cord

2.0 m (6.5 ft),

3 prong

Product Safety

UL: Listing per UL 478
CSA: certification per CSA
C22.2. No. 154
IEC 435 and VDE 0804
compliance

Program Memory

13K bytes available to the user
and down-line loadable:
7.8K for BASIC programs
2+K for ReGIS macrographs and
keypad key definitions
three soft character sets each
95 X 10 X 8 bytes

Display Outputs

Text mode

24 lines X 84 characters max
or 24 lines X 42 double-width
characters

Character

8 X 10 dot matrix with
descenders

Character set

95-character displayable ASCII
subset (upper and lowercase,
numeric and punctuation)

Text cursor type

Blinking block character; can be
disabled in SET-UP

Graphics mode

768 pixels horizontal
240 pixels vertical

Graphic cursor type

Diamond shape with cross hair in
the center; can be disabled in
SET-UP

Locator cursor type

Large cross hair

A-2

Permanent UK/US ASCII character
set: 128 characters, 8 X 10 dot
matrix

Graphic pattern memories

Three user programmable and
down-line loadable soft alphabet
character sets: 95 characters
each, 8 X 10 dot matrix
Four bits per segment of 12
horizontal pixels
Eight levels of grey for black
and white monitors
Eight colors for color monitor:
black, blue, red, magenta,
green, cyan, yellow, and white
Blink

Visual attributes

Video outputs

Output to drive one black and
white (composite video) and one
color (RGB) monitor (with
composite green video)
simultaneously
Adjustable horizontal and
vertical margins to accommodate
monitor overscan
Adjustable horizontal centering
50/60 Hz refresh, noninterlaced
or interlaced

Keyboard
General

83-key unit

Key layout

65-key arrangement and
sculpturing similar to standard
typewriter keyboard, with an
18-key auxiliary keypad

Auxiliary keyboard

18-key numeric pad with period,
comma, minus, ENTER, and four
function keys

Visual indicators

Seven indicators: five
indicators dedicated to ON-LINE,
LOCAL, NO SCROLL, BASIC and
HARD COPY; two indicators userprogrammable

A-3

Keyboard

Audible signals

Keyclock: sound simulates
typewriter
Bell: sounds upon receipt of
BEL code, or
sounds nine characters from
right margin (keyboard
selectable)

Communication
Type

EIA RS-232-C/CCITT V 24 or 20
rnA passive current loop
(keyboard selectable)

Speeds

Full-duplex: 110 (two stop
bits), 300, 600, 1,200, 2,400
4,800, 9,600 and 19,200 baud;
transmit and receive speeds are
independent of each other

Code

ASCII

Character format

Asynchronous serial

Character size

Eight bits including parity bit

parity

Even, odd, or none (keyboard
selectable)

Synchronization

Keyboard selectable via
automatic generation of XON/XOFF
control codes

Modes

Normal line, single character,
local echo (keyboard selectable)

Hardcopy Interface

Drive an LA34VA graphics printer
with daisy-chaining capability
Auto hardcopy

A-4

APPENDIX B
CALCULATIONS

CALCULATION #1
Error Register =
2
DVM Register
= 374 (l's complement of 3)
Carry In
=
1
Error Register = 377
No ca~ry Decrement
Strobe
Major and Minor Axis
Error Register
DU Register
Error Register

=
=
=

3778
005 8
004
Carry

Strobe
Direction -- Decrement X and Y
Do a Pixel Write
Decrement Down Counter
5 - 1 = 4
Downcounter = 4
RULES AND DRAW VECTOR
1.

2.

3.

Do not write in direction if
2 from an odd line or
6 from an even line.
Do not write if the direction is
5 or 7, the scan line is even
(Y0) and the last direction was 6.
Do not write if the direction is
1 or 3, the scan line is odd and
the last direction was 2.

B-1

I

- ~ ~IRdcTlIONI3

., 1"
r-

IDEAL'"....,
VECTOR

I

[\,
~
MA-9756

CALCULATION 12
Error Register = 0048
DVM Register
= 3748
Carry In
= 1
Error Register = 001
Carry
Strobe

~

Decrement
Major Axis

Set carrY FF

Error Register = 0018
DU Register
= 005 8
006 8
Error Register

=

0018

(No Error CLK)

Strobe
Direction -- Decrement X
Do a Pixel Write
Decrement Down Counter
4 - 1 = 3
DRAW VECTOR

B-2

r

CALCULATION 13
Error Register
DVM Register
Carry In
Error Register

=
1
= 374
=

1

= 376
No Carry

Strobe

Decrement
Major and Minor Axis

Error Register = 376
DU Register
= 005
Error Register = 003
Carry
Strobe
Direction -- Decrement X and Y.
Do a Pixel Write
Decrement Down Counter
3 - 1 = 2
DRAW VECTOR

EV EN ~0:---+-+-+-+-+--1

ODD
EV EN

H---+--'k-+-+-+---1

ODD
EVEN

ODD
EVE N L-.JL....L----'-----'---'--'-MA·9758

B-3

CALCULATION 14
Error Register = 003
DVM Register
= 374
Carry In
=
1
Error Register = 000
Carry
Strobe
Error Register
DU Register

= 000
= 005

Error Register

= 000

Decrement
Major Axis

005

Strobe
Direction -- Decrement X
Do a Pixel Write
Decrement Down Counter
2 - 1 = 1
DRAW VECTOR

ODD

Y=1

EVEN

Y=Q

ODD

Y=1

EVEN

Y=Q

ODD

Y=1

EVEN

Y=Q
MA-9759

B-4

CALCULATION is
Error Register = 000
DVM Register
= 374
Carry In
= 001
Error Register = 375
No Carry
Strobe

=
=
=

Error Register
DU Register
Error Register

Decrement
Major and Minor Axis

375
005
002
Carry

Strobe
Direction -- Decrement X and Y
Do a Pixel Write
Decrement Down Counter
1 - 1 = 0
DRAW VECTOR
VECTOR COMPLETE

ODD

ODD

I

__ _

EVEN __ _
__ _

r- ~ ~IR~CTIIOJ 3

1"'-

EVEN __ _
ODD - - EVEN __ _

-

IDEAL'
VECTOR

I

l\.

F\
MA-9760

B-S

EK-VKIOO-IP-OOI

ILLUSTRATED
PARTS
BREAKDOWN

VK100
GIGI TERMINAL

HOW TO USE THE IPB
GENERAL
This IPB is compiled following the organization and nomenclature
of the engineering drawing structure.
MAJOR ASSEMBL Y LOCATOR
The Major Assembly Locator (first illustration) is an index that
provides a description and a figure reference for all illustrations used
in this manual.
INDENTED PARTS LIST
This manual identifies each assembly being broken down (figure
reference callout), and all parts of that assembly. Further
breakdown of an assembly is shown by an asterisk (.) preceding the
item callouts in the Description Column. The number of asterisks
preceding an item is used to denote the subordination of that item
with respect to the Major Assembly. A single asterisk preceding an
item description indicates that the item is part of the major
assembly being illustrated. Items that are subordinate to single
asterisks items, are denoted by two asterisks ( •• ) and immediately
follow the related single asterisk item. Additional asterisks are used,
as required, to denote further subordination. This system of part
identification, provides a means for the user to identify the nex t
higher assembly item and make alternate selections for parts when
the required replacement part or assembly is not immediately
available.
COLUMN CALLOUT DESCRIPTION
Figure & Item - I ndicates the figure number and item number of
each part.

ECO Cut-In - The notation at the top of this column indicates the
ECO level of the system (option), at which the IPB was initially
prepared. Subsequent ECO level designations, that modify existing
parts or add new parts to the device, are inserted in the ECO Cut-I n
column next to the part that is added or modified. A bracket (II
preceding the item description is used to indicate the parts affected
by ECO's.
Vendor Code/Part No. - Indicates vendor parts that are not stocked
by DEC. Refer to the Field Service Spares Catalog (vendor part
number to DEC part number) for the vendor code cross-reference.
Used On Code - Letters in this column correspond to the variation
codes assigned in Figure 1. Parts with an Alpha notation(s) are used
only in those option variations. A blank indicates that the part is
used on all option variations.
Ref Fig No. - A cross reference between illustrations. For each
Major Assembly, the number in this column denotes the figure of
the next higher assembly. For all subassemblies, the number in this
column denotes the figure showing additional detailed breakdown.
SYMBOL USAGE
Hardware Designators - Alpha designators for screws (S), washers
(W), nuts (N), and retaining rings (R) are inserted after the item
number callouts on the illustration when stacked item numbers are
used.
Attaching Hardware - The @ symbol is inserted before any part
that is used as attaching hardware. Attaching hardware is denoted as
those parts that are not an integral part of the referenced assembly.

Description Lists the name of the part and pertinent
specifications (when required). Asterisks preceding the description
denote the subordination of the part to the nex t higher assembly.

(NFRI Not Field Repairable - The (NFR) symbol is inserted after
any assembly that is not to be field dismantled.

DEC Part No. - Lists the DEC part ordering number. A blank in
this column indicates a DEC part number was not assigned at the
time of publication.

Other Symbols - Any other symbols that are required for kits,
accessories, etc., will be explained and appear as part of the item
description.

REVISION HISTORY
PRINTING
1 st Printing

ECO LEVEL
VK100
70-17387
70-17397
70-17484
54-14228
70-17388
70-17389
70-17411

00000-00000
00000-00000
00000-00000
00000-00000
00000-00000
00000-00000
00000-00000
00000-00000

DATE

PAGES AFFECTED

9-29-81

Copyright " 1981 by Digital Equipment Corporation. AII'rights reserved.
DEC r",'aves the right. without notice. to make suhstitutions and
modIfications in the specifications of products documented in this
manual and further reserves the right to withdraw any of these
prodUdS from the market without notice.

N/A

OTHER IPB MANUALS REQUIRED
TO SUPPORT THIS OPTION, ...... .
N/A

DEC is not responsihle for errors which may appear in the technical
description (including illustrations and photographs) of the products
covered hy this manual.
None of the descriptions contained in this manual imply the
granting of any license whatsoever to make, use or sell equipment
constructed in accordance therewith.
Printed In U.S A

~D~DD~D\
Lls~1
PARTS

/
/

/

/

"'1

2

i

3

/tS)
VK100-01

Figure 1.

VK100 GIGI Terminal

IPB-VK100

A

FIG.
&

ITEM
NO.
1-

1
2
3
4
5
6
7
8
9
10
11

IPB·VK100

DEC
PART NO.

DESCRIPTION
VK100 GIGI TERMINAL
Code A - Used on Model VK100-AA 115V
Code B - Used on Model VK100-AB 230V

VK100·AA
VK100-AB

*KEYBOARD BASE ASSEMBLY
**Enclosure, Bottom Keyboard
**Bumper, Square (Adhesive Backed)
**Bumper, Self Stick
**Screw, Slotted Hex Hd No. 6·32 x 3/4
*VK100 Logic Board
*KEYBOARD/KEYCAP ASSEMBLY
*POWER SUPPLY ASSEMBLY 115V
*POWER SUPPLY ASSEMBLY 230V
*Screw, Slotted Hex Hd No. 6-32 x 5/16
* Keyboard Top Assembly
* Power Cord 115V
*Power Cord 230V

70·17394·00
74·23626-00
90-09624·00
90·09538-00
12·16682·00
54·14230·00
70·17397·00
70·17387·00
70·17387·01
90·09967·00
70-17409·00
17·00083·09
17·00083·10

Labels (Not Shown)
*Label, "Electrical Data" Rear Panel
* Label, "Electrical Data"
*Label, "FCC Class A Processor"

36·1 7318-00
36·13209-00
36·17880-02

2

ECO
CUT·IN
VK100
00000

REF
USED ON
CODE

FIG

NO.

A
B

A
B

A
B

A

3
2
2

~D~DD~D\
LlS~1

PARTS

2
11

~.

VK100-02

Figure 2_

Power Supply Assembly

3

IPB-VK100

FIG.

A

&

ITEM
NO.
~-

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17

DEC
PART NO.

DESCRIPTION
POWER SUPPLY ASSEMBLY 115V
POWER SUPPLY ASSEMBLY 230V

70-17387-00
70-17387-01

*Power Supply Chassis Assembly
*Power Supply, Switching
*Fan Assembly 115/230V 50-60 HZ
*Screw, Slotted Hex Hd No. 10-32 x 3/8
*Fuseholder, (F1) 12A 250V
*Tubing, Shrink
*Fuse, 2A 250V
*A.C. RECEPTACLE ASSEMBLY
*Screw, Slotted Pan Hd No. 4-40 x 3/8
*Switch Rocker (2 Position)
*A.C. WIRING HARNESS ASSEMBLY
*Screw, Slotted Hex Hd No. 6-32 x 5/16
*Plunger
*Grommet, Snap-In
*Cable Tie (Bundle)
*Nut, Kep No. 10-32
*D.C. POWER CABLE ASSEMBLY

70-17483-00
12-16987-00
12-16488-01
90-06444-00
12-16391-00
91-07685-00
90-07215-00
70-17411-00
90-09702-00
12-17051-00
70-17388-00
90-09967-00
90-09964-00
90-09966-01
90-07031-00
90-06565-01
70-17389-0J

*Label,
*Label,
* Label,
*Decal,

Decals/Labels (Not Shown)
"Danger Stored High Voltage"
"2 A 250V"
"Power Supply"
"Ground"

36-16930-00
36-17165-00
90-09255-00
36-1 2680-00

.

IPB-VK100

4

ECO
CUT-IN
70-17387
00000

USED ON
CODE
A
B

REF
FIG
NO.
1
1

8

6

7

A

FIG.
&
f

ITEM
NO.
31
2
3
4

5
6

DEC
PART NO.

DESCRIPTION

ECO
CUT-IN
70-17397
00000

USED ON
CODE

REF
FIG
NO.

KEYBOARD/KEYCAP ASSEMBLY

70-17397-00

1

*VK100 KEYBOARD!KEYCAP ASSEMBLY
*Bracket, Key Array Support (R.H.)
*Bracket, Key Array Support (L.H.)
*Plunger
*Grommet, Snap-In
*Screw, Slotted Hex Hd No. 6-32 x 5/16

70-17484-00
74-23702-00
74-23702-01
90-09964-00
90-09966-01
90-09967-00

4

6

VK100-03

Figure 3.

Keyboard/Keycap Assembly

5/6

IPB-VK100

A

FIG.
&

ITEM
NO.
41
2
3
4
5
6
7
8
9
10

DEC
PART NO.

DESCRIPTION

ECO
CUT-IN
70-17484
00000

USED ON
CODE

REF
FIG
NO.

VK100 KEYBOARD/KEYCAP ASSEMBLY

70-17484-00

3

*VK100 KEYBOARD MODULE ASSEMBLY
* Adapter, Keycap
* Keycap Set (Basic Set)
* Keycap Set (Basic Nu meric Pad)
*SPACE BAR ASSEMBLY
**Bar, Space
* * Bracket, Space Bar
**Bar, Equalizer
**Switch, Keyboard Cap Tilted
*Clip, Space Bar Equalizer

54-14228-00
12-14332-00
12-14333- 72
12-14333- LA
70-15050-00
12-11857-02
74-24159-00
12-11858-00
12-11860-00
74-24160-00

5

1

VK100-04

Figure 4.

VK100 Keyboard/Keycap Assembly

7/8

IPB-VK100

A

FIG.
&

ITEM
NO.
&1
2
3
4
5
6

DEC
PART NO.

DESCRIPTION
VK100 KEYBOARD MODULE ASSEMBLY

54-14228-00

*Board, Etch (Rev. C)
* Keyboard Array Assembly
* 18 Key Numeric Pad Assembly
*Screw, Phi Pan Hd No. 4-24 x 3/8
*LED 2MCD 10MA
* Keyboard Distribution Cable Assembly

50-14227-00
70-13910-00
70-14561-00
90-1 0033-00
11-10864-00
70-17390-0J

ECO
CUT-IN
54-14228
00000

USED ON
CODE

REF
FIG
NO.
4

3
4

VK100-05

Figure 5.

VK100 Keyboard Module Assembly

9/10

IPB-VK100

A

FIG.
&

ITEM
NO.
61
2
3
4
5
6
7

DEC
PART NO.

DESCRIPTION
A.C. WIRING HARNESS ASSEMBLY

70-1 7388-00

*Connector (P111. Universal (Socket Housing) 3-Pin
Mate-N-Lok
*Terminal (P11), Universal Socket Contact
*Terminal (P11), Universal Ground Socket Contact
*Terminal, Quick Connect
*Terminal, Ring
*Cable Tie (Bundle)
*Label, "Cable Identification"

12-12167-00
12-12169-01
12-17519-00
12-17000-00
90-07930-00
90-07031-00
90-09532·00

*Wire, Strand, 18 AWG (Brown)
*Wire, Strand, 18 AWG (Blue)
*Wire, Strand, 18 AWG (Green/Yellow)

91-07786-11
91-07786-66
91-07410-54

ECO
CUT·IN
70·17388
00000

USED ON
CODE

REF
FIG
NO.
2

VK100-06

Figure 6. A.C. Wiring Harness Assembly

11/12

IPB-VK100

A

FIG.
&
(

ITEM
NO.
71
2
3
4

DEC
PART NO.

DESCRIPTION
D.C. POWER CABLE ASSEMBLY

70-17389-00

*Connector (P9, P10), Socket Housing 6 Pin Mate-N-Lok
*Terminal (P9, P101. Socket Contact
*Cable Tie (Bundle)
* Label, "Cable Identification"

12-10821-06
12-09379-00
90-07031-00
90-09532-00

*Wire,
*Wire,
*Wire,
*Wire,

91-07786-22
91-07786-33
91-07786-66
91-07786-00

Strand,
Strand,
Strand,
Strand,

18 AWG
18 AWG
18 AWG
18 AWG

(Red)
(Orange)
(Blue)
(Black)

ECO
CUT-IN
70-17389
00000

USED ON
CODE

REF
FIG
NO.
2

3

1
2

1
2

VK10()"07

Figure 7. D.C. Power Cable Assembly

13/14

IPB-VK100

A

FIG.
&

ITEM
NO.

DEC
PART NO.

DESCRIPTION

81
2
3
4
5
6

A.C. RECEPTACLE ASSEMBLY

70-17411-00

"Connector (J12), 3 Pin Power Plug
"Terminal, Ring
"Terminal, Quick Connect
"Terminal, Spade
"Cable Tie (Bundle)
"Label, "Cable Identification"

12-1 7046-00
90-07930-00
12- 17000-00
12-17045-00
90-07031-00
90-09532-00

"Wire, Strand 18 AWG (Green/Yellow)
*Wire, Strand 18 AWG (Blue)
*Wire, Strand 18 AWG (Brown)

91-07410-54
91-07786-66
91-07786-11

ECQ
CUT-IN
70-17411
00000

USED ON
CODE

REF
FIG
NO.

2

DEC

.. -

3

I

\

3

VK100-08

Figure 8. A. C. Receptacle Assembly

15/1 6

IPB-VK100

ILLUSTRATED PARTS BREAKDOWN
COMMENT SHEET
Any and all comments and suggestions for correcting errors and/or additional information to improve this manual
will be reviewed and researched for possible use when this manual is revised and/or reprinted. Enter your comments
and suggestions in the form provided below and return to Technical Documentation.

MODEL

VK100 GIGI TERMINAL

FIGURE NO.

ITEM NO.

PUBLICATION NO.

FIGURE NO.

CHANGE FROM

CHANGE FROM

CHANGE TO

CHANGE TO

FIGURE NO.

ITEM NO.

FIGURE NO.

CHANGE FROM

CHANGE FROM

CHANGE TO

CHANGE TO

FIGURE NO.

ITEM NO.

FIGURE NO.

CHANGE FROM

CHANGE FROM

CHANGE TO

CHANGE TO

EK-VK100-IP-OOl

ITEM NO.

ITEM NO.

ITEM NO.

ADDITIONAL COMMENT(S)

Please describe your position .. _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ __
Name _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ Organization _ _ _ _ _ _ _ _ _ _ _ _ _ __
Street _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ Department _ _ _ _ _ _ _ _ _ _ _ _ _ __
City _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ State _ _ _ _ _ _ Zip or Country _ _ _ _ __

----------

- ------

- - -

.Fold Here- -

- - - - -

- -

-

- - -

- -_ -_ - --

_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ 00 Not Tear - Fold Here and Staple

mamaama

111111

BUSINESS REPLY MAIL
FIRST CLASS

PERMIT NO.33

MAYNARD. MA

POSTAGE WILL BE PAID BY ADDRESSEE

Digital Equipment Corporation
Educational Services Development and Publishing
129 Parker Street, PK3-1/T12
Maynard, MA 01754

No Postage
Necessary
if Mailed in the
United States

I



---

Source Exif Data:

File Type                       : PDF
File Type Extension             : pdf
MIME Type                       : application/pdf
PDF Version                     : 1.6
Linearized                      : Yes
XMP Toolkit                     : Adobe XMP Core 4.2.1-c041 52.342996, 2008/05/07-21:37:19
Modify Date                     : 2017:08:05 06:13:53-07:00
Create Date                     : 2006:10:05 13:54:13+10:00
Metadata Date                   : 2017:08:05 06:13:53-07:00
Creator Tool                    : Adobe Acrobat 7.08
Format                          : application/pdf
Document ID                     : uuid:9ede69ee-9246-4e4f-b93d-23a9cbfc10cd
Instance ID                     : uuid:72b0a24d-b555-1249-baa2-a973047c963a
Producer                        : Adobe Acrobat 9.0 Paper Capture Plug-in
Page Layout                     : SinglePage
Page Count                      : 236
Creator                         : Adobe Acrobat 7.08

EXIF Metadata provided by EXIF.tools