La4902p_r10_20091207_mv Elite Book 8840P 8840W
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A B C D E 1 1 Compal Confidential Schematics Document 2 2 INTEL AUBURNDALE with IBEX core logic Cartier UMA 3 3 LA-4902P 2009-12-07 REV:1.0 4 4 Compal Secret Data Security Classification 2008/09/15 Issued Date http://laptop-motherboard-schematic.blogspot.com/ A B 2009/12/31 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C D Title Compal Electronics, Inc. Cover Sheet Size Document Number Custom LA-4902P Date: Rev 0.3 Sheet Monday, December 14, 2009 E 1 of 47 A B C Compal Confidential D E Cartier UMA Accelerometer XDP Conn. Page 4 LIS302DLTR File Name : LA-4902P Fan Control Thermal Sensor EMC2113 1 Mobile Page 4 Page 26 1 Page 4 DDR3 1066/1333MHz 1.5V CPU Dual Core DDR3-SO-DIMM X 2 BANK 0, 1, 2, 3 eDP DP Panel Socket-rPGA989 Page 20 VGA Page 9,10 Dual Channel 37.5mm*37.5mm Page 4,5,6,7,8 Page 18 CK505 FDI DP-D Display Port DMI X4 Clock Generator ICS9LPRS397 Page 19 DP X 2(Docking) Page USB2.0 28 Page 11 DP-C ; DP-B 2 Express Card 54 PCIE X1 + USB X1 USB x2(Docking)Page WWAN Card 2 PCIE X1 Audio Board Intel Ibex Peak M Page 24 Azalia 25mm*27mm PCI-E BUS SATA0 USB x1(Camara) WLAN Card Page 20 Rico R5C835 WLAN + PCIE X1 PCI BUS SATA1 Page 12,13,14,15,16,17 Controller Page 21 daughter board USB conn x 3(For I/O) BT Conn USB x 1Page 26 1071pins 10/100/1000 LAN Intel Hansville GbE PHY 28 FingerPrinter VFM451 USBx1 Page 31 USB2.0 MDC V1.5 Page 23 ONFI Interface RJ11 Page 25 Page 25 Page 27 IDT 92HD75 1394Page port 27 Page 22 Smart Card SD/MMC Slot 3 Audio Board SATA ODD Connector Page 12 NAND Flash Card Page 24 2.5" SATA HDD Connector LPC BUS RTC CKT. Page 12 LED Page 32 TPM1.2 SLB9635TT Power On/Off CKT. SMSC Super I/O SMCS47N217N Page 30 SMSC KBC 1098 Page 31 4 Page 12 Audio Board Power OK CKT. Touch Pad CONN. page 29 Int.KBD C OM1 ( Docking ) LPT ( Docking ) Page 25 Page 30 Page 30 Page 25 Page 25 TrackPoint CONN. Page 25 DC/DC Interface CKT. Page 33 A Audio Board AMP & Audio Jack Audio Board Page 24 RJ45 CONN 3 TPA6047A Audio CKT Braidwood 2008/09/15 Issued Date SPI ROM Page 31 8 MB http://laptop-motherboard-schematic.blogspot.com/ B 2009/12/31 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C D (2) (2) (2) (2) (1) (1) (1) (1) (1) (1) (1) (1) (1) Docking CONN. PS/2 Interfaces USB 2.channels SATA Channels Display Port Channels Serial Port Parallel Port Line In Line Out RJ45 (10/100/1000) VGA 2 LAN indicator LED's Power Button I2C interface 4 Compal Secret Data Security Classification Page 36 Title Compal Electronics, Inc. Block Diagram Size Document Number Custom LA-4902P Date: Rev 0.3 Wednesday, December 09, 2009 E Sheet 2 of 47 A Voltage Rails ( O MEANS ON X MEANS OFF ) Symbol Note : +RTCVCC +B +5VALW +3VM +1.5V +3VL +3VALW +1.05VM +0.75V +5VS +3VS : means Digital Ground +1.5VS +VCCP power plane +CPU_CORE : means Analog Ground +1.05VS +1.8VS State @ : means just reserve , no build CONN@ : means ME part. S0 O O O O O O S1 O O O O O O S3 O O O O O X O O O O X X S5 S4/ Battery only O O X X X X S5 S4/AC & Battery don't exist O X X X X X S5 S4/AC 1 Install below 45 level BOM structure for ver. 0.1 45@ : means just put it in the BOM of 45 level. Install below 43 level BOM structure for ver. 0.1 DEBUG@ : means just build when PCIE port 80 CARD function enable. Remove before MP 1 N10M@ : Install for N10M Graphic controller 1098@ : Install for 1098 KBC controller Reserve below BOM structure for ver. 0.1 SMBUS Control Table SOURCE SMB_EC_CK1 SMB_EC_DA1 SMSC1098 SMBCLK SMBDATA Calpella SML0CLK SML0DATA Calpella SML1CLK SML1DATA Calpella BATT XDP V X X X X V X X SODIMM X V X X CLK CHIP X V X X MINI CARD X V X X 1091@ : Install for 1091 KBC controller DOCK NIC THERMAL SENSOR G-SENSOR X V X X X X V X X X X V X V X V Compal Secret Data Security Classification 2008/09/15 Issued Date http://laptop-motherboard-schematic.blogspot.com/ Deciphered Date 2009/12/31 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. A Title Compal Electronics, Inc. Notes List Size Document Number Custom LA-4902P Date: Wednesday, December 09, 2009 Rev 0.3 Sheet 3 of 47 1 2 3 4 PM_EXTTS#0 1 R1 1 R3 JCPU1B SKTOCC# A 1 R16 CATERR# 2 H_PECI_ISO 0_0402_5% AT15 PECI 1 R22 H_PM_SYNC_R 2 0_0402_5% AL15 RESET_OBS# PM_SYNC 2 SYS_AGENT_PWROK AN14 0_0402_5% 1 R24 15 H_CPUPW RGD AP26 VCCPWRGOOD_1 2 VCCPW RGOOD_0 AN27 0_0402_5% VCCPWRGOOD_0 1 R26 2 VDDPW RGOOD_R AK13 0_0402_5% 14 PM_DRAM_PWRGD SM_DRAMPWROK from power AM15 VTTPWRGOOD 2 H_PW RGD_XDP_R AM26 0_0402_5% TAPPWRGOOD 32 VTTPWRGOOD H_PWRGD_XDP 1 R30 1 R31 2 PLT_RST#_R 1.5K_0402_5% AL14 2 750_0402_1% A +1.5V SM_DRAMRST# F6 SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2] AL1 AM1 AN1 SM_RCOMP0 SM_RCOMP1 SM_RCOMP2 PM_EXT_TS#[0] PM_EXT_TS#[1] AN15 AP15 PM_EXTTS#0 PM_EXTTS#1 Q88 SSM3K7002F_SC59-3 3 T2 1 R18 TPC12 2 0_0402_5% PM_EXTTS#1_R 9,10 AT28 AP27 XDP_PRDY# XDP_PREQ# TCK TMS TRST# AN28 AP28 AT27 XDP_TCK XDP_TMS XDP_TRST# TDI TDO TDI_M TDO_M AT29 AR27 AR29 AP29 XDP_TDI XDP_TDO XDP_TDI_M XDP_TDO_M DBR# AN25 BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7] AJ22 AK22 AK24 AJ24 AJ25 AH22 AK23 AH23 +VCCP PCH_DDR_RST 15 GPIO50 from PCH C1035 0.1U_0402_16V4Z 1 S3 CPU R846 @ 1K_0402_5% CPU XDP Connector PM_PWRBTN#_R JP1 XDP_PREQ# XDP_PRDY# 2 0_0402_5% @ 2 0_0402_5% 2 0_0402_5% 2@ 0_0402_5% 2 0_0402_5% 2@ 0_0402_5% 2 0_0402_5% 2@ 0_0402_5% 5 XDP_BPM#0 R1013 R1010 XDP_BPM#1 R1014 R1009 XDP_BPM#2 R1015 R1011 XDP_BPM#3 R1016 R1012 CFG12 5 CFG13 5 CFG14 5 CFG15 5 5 1 1 1 1 1 1 1 1 CFG17 CFG16 XDP_BPM#0_R XDP_BPM#1_R XDP_BPM#2_R XDP_BPM#3_R XDP_BPM#4 XDP_BPM#5 RSTIN# 1 C1 0.1U_0402_16V4Z 2 @ 2 CONN@ XDP_BPM#6 XDP_BPM#7 R25 1K_0402_5% H_CPUPW RGD 1 2 H_CPUPW RGD_R PM_PWRBTN#_R 12,14 PM_PWRBTN#_R H_PWRGD_XDP 1 R27 JTAG MAPPING TPC12 TPC12 09/2/5 HP Power Rail Change 09/07/02 HP XDP_DBRESET# IC,AUB_CFD_rPGA,R1P0 DRAMRST# 9,10 10/09 HP 09/2/5 HP XDP_BPM#0 XDP_BPM#1 XDP_BPM#2 XDP_BPM#3 XDP_BPM#4 XDP_BPM#5 XDP_BPM#6 XDP_BPM#7 1 R1989 100K_0402_5% 2 @ PRDY# PREQ# R1133 1K_0402_5% from DDR +VCCP R33 750_0402_1% R15 09/07/02 HP CLK_DP 13 CLK_DP# 13 1 15 BUF_PLT_RST# 1 XDP_TDO 1 2 R10 51_0402_5% This shall place near XDP 2 0_0402_5% T110 T111 XDP_TCK Processor Pullups +VCCP 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 GND0 OBSFN_A0 OBSFN_A1 GND2 OBSDATA_A0 OBSDATA_A1 GND4 OBSDATA_A2 OBSDATA_A3 GND6 OBSFN_B0 OBSFN_B1 GND8 OBSDATA_B0 OBSDATA_B1 GND10 OBSDATA_B2 OBSDATA_B3 GND12 PWRGOOD/HOOK0 HOOK1 VCC_OBS_AB HOOK2 HOOK3 GND14 SDA SCL TCK1 TCK0 GND16 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 GND1 OBSFN_C0 OBSFN_C1 GND3 OBSDATA_C0 OBSDATA_C1 GND5 OBSDATA_C2 OBSDATA_C3 GND7 OBSFN_D0 OBSFN_D1 GND9 OBSDATA_D0 OBSDATA_D1 GND11 OBSDATA_D2 OBSDATA_D3 GND13 ITPCLK/HOOK4 ITPCLK#/HOOK5 VCC_OBS_CD RESET#/HOOK6 DBR#/HOOK7 GND15 TD0 TRST# TDI TMS GND17 SAMTE_BSH-030-01-L-D-A H_PROCHOT#_D 1 R42 1 R45 C 2 2 @ 68_0402_5% CFG4 CFG5 CLK_CPU_XDP CLK_CPU_XDP# SM_RCOMP2 R23 1K_0402_5% 5 5 +VCCP XDP_RST#_R R28 XDP_DBRESET#_R R29 XDP_TDO XDP_TRST# XDP_TDI XDP_TMS 1 1 1K_0402_5% H_CPURST# 2 XDP_DBRESET# 2 0_0402_5% 2 1 XDP_DBRESET# 12,14 @ C1047 0.1U_0402_16V4Z CONN@ 2 PLT_RST# 0_0402_5% @ 2 2 2 FAN_PWM-R U54 H_THERMDC 1 1 C2 2 H_THERMDA 2200P_0402_50V7K +3VS_THER 1 R52 1 R53 1 R54 HP 10/21 +3VS SI1 NO3 09/3/9 HP PLT_RST# 12,15,21,23,25,31 1 R910 2 0_0402_5% C FAN_PWM 29 2 DDR3 Compensation Signals SM_RCOMP1 B 5 5 CFG6 CFG7 Thermal Sensor EMC2113 with CPU PWM FAN +3VS R35 68_0402_5% SM_RCOMP0 5 5 68_0402_5% 2 H_CPURST#_R 5 5 CFG2 CFG3 2 49.9_0402_1% C3 0.1U_0402_16V4Z 1 100_0402_1% 24.9_0402_1% FAN_PWM-R SI1 NO15 09/2/5 HP Close to XDP 130_0402_1% XDP_TRST# 1 R55 2 2 51_0402_5% 1 R1082 2 ADDR_SEL 10K_0402_5% 15 THERM_SCI# Layout Note:Please these resistors near Processor +3VS R48 1 @ 2 10K_0402_5% DN 2 DP 1 H_THERMTRIP# 1 R51 2 0_0402_5% Add DP2/DN3 16 REMOTE2+ DN2/DP3 15 REMOTE2- TRIP_SET 14 R38 SHDN_SEL 13 3 VDD 4 PWM_IN 5 ADDR_SEL GND 12 6 ALERT# PWM 11 7 SYS_SHDN# TACH 10 8 SMDATA 17 9,10,11,13,26 SMB_DATA_S3 1 GND R39 1 5 5 CFG0 CFG1 CFG10 5 CFG11 5 XDP_RST#_R 1 R32 H_CATERR# CFG8 CFG9 SMCLK C884 0.1U_0402_16V4Z @ 10/16 HP Add +5VS 2 H_CPUPW RGD H_CPURST#_R 2 0_0402_5% THERMTRIP# PWR MANAGEMENT 1 R21 14 H_PM_SYNC B 1 R20 2 H_THERMTRIP#_R AK15 0_0402_5% CLK_EXP 13 CLK_EXP# 13 G H_CPURST# PROCHOT# CLK_EXP CLK_EXP# VCCP_1.5VSPW RGD 32 D 1 R19 15 H_THERMTRIP# AN26 DPLL_REF_SSCLK DPLL_REF_SSCLK# A18 A17 S to power; PU to VCCP at power side also 1 R17 2 H_PROCHOT#_D 41 H_PROCHOT# 0_0402_5% E16 D16 2 1.5K_0402_1% 2.05K_0402_1% 09/2/5 HP R997 10K_0402_5% 09/2/5 HP R43 10K_0402_5% +3VS R44 FAN_PWM_OUT TACH 9 10K_0402_5% @ 0_0402_5% R998 1 2 R47 10K_0402_5% +3VS CONN@ 1 H_PECI AK14 THERMAL 15 H_CATERR# PEG_CLK PEG_CLK# +VCCP R14 VDDPW RGOOD_R 1 2 COMP0 AH24 10K_0402_5% SI1 NO30 1 TP_SKTOCC# TPC12 T1 CLK_CPU_XDP CLK_CPU_XDP# 2 2COMP0 AT26 AR30 AT30 10K_0402_5% 1 49.9_0402_1% 1 R9 BCLK_ITP BCLK_ITP# 2 2 COMP1 G16 2 1 2COMP1 CLK_CPU_BCLK 15 CLK_CPU_BCLK# 15 2 49.9_0402_1% 1 R7 CLK_CPU_BCLK CLK_CPU_BCLK# 2 COMP2 A16 B16 1 2COMP2 AT24 BCLK BCLK# CLOCKS 1 R5 PM_EXTTS#1 COMP3 MISC 20_0402_1% 2COMP3 AT23 DDR3 MISC 1 R2 JTAG & BPM 20_0402_1% 5 +VCCP Layout ruleΚ10mil width trace length < 0.5", spacing 20mil 1 2 3 4 5 6 SMB_CLK_S3 9,10,11,13,26 JP2 1 2 3 4 G5 G6 ACES_85205-04001 EMC2113-2-AX_QFN16_4X4 0ohm and 0.1u DB1 No82 SI1 NO25 09/2/5 HP REMOTE thermal sensor SI1 NO39 R997: install R44: uninstall 1 D C REMOTE2+ D 09/4/10 HP Q1 MMBT3904WH_SOT323-3 2 B 3 E C4 2200P_0402_50V7K 2 Layout Note: 1 place near the hottest spot area for NB & top SODIMM. Issued Date REMOTE2- 1 Compal Secret Data Security Classification 2008/09/15 Deciphered Date 2009/12/31 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 2 http://laptop-motherboard-schematic.blogspot.com/ 3 4 Title Compal Electronics, Inc. Auburndale(1/5)-Thermal/XDP Size Document Number Custom LA-4902P Date: R ev 0.3 W ednesday, December 09, 2009 5 Sheet 4 of 47 1 2 3 4 5 Layout ruleΚtrace length < 0.5" JCPU1A DMI_TX#[0] DMI_TX#[1] DMI_TX#[2] DMI_TX#[3] 14 14 14 14 DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3 D25 F24 E23 G23 DMI_TX[0] DMI_TX[1] DMI_TX[2] DMI_TX[3] 14 14 14 14 14 14 14 14 FDI_CTX_PRX_N0 FDI_CTX_PRX_N1 FDI_CTX_PRX_N2 FDI_CTX_PRX_N3 FDI_CTX_PRX_N4 FDI_CTX_PRX_N5 FDI_CTX_PRX_N6 FDI_CTX_PRX_N7 14 14 14 14 14 14 14 14 FDI_CTX_PRX_P0 FDI_CTX_PRX_P1 FDI_CTX_PRX_P2 FDI_CTX_PRX_P3 FDI_CTX_PRX_P4 FDI_CTX_PRX_P5 FDI_CTX_PRX_P6 FDI_CTX_PRX_P7 FDI_CTX_PRX_N0 FDI_CTX_PRX_N1 FDI_CTX_PRX_N2 FDI_CTX_PRX_N3 FDI_CTX_PRX_N4 FDI_CTX_PRX_N5 FDI_CTX_PRX_N6 FDI_CTX_PRX_N7 E22 D21 D19 D18 G21 E19 F21 G18 FDI_TX#[0] FDI_TX#[1] FDI_TX#[2] FDI_TX#[3] FDI_TX#[4] FDI_TX#[5] FDI_TX#[6] FDI_TX#[7] FDI_CTX_PRX_P0 FDI_CTX_PRX_P1 FDI_CTX_PRX_P2 FDI_CTX_PRX_P3 FDI_CTX_PRX_P4 FDI_CTX_PRX_P5 FDI_CTX_PRX_P6 FDI_CTX_PRX_P7 D22 C21 D20 C18 G22 E20 F20 G19 FDI_TX[0] FDI_TX[1] FDI_TX[2] FDI_TX[3] FDI_TX[4] FDI_TX[5] FDI_TX[6] FDI_TX[7] 14 FDI_FSYNC0 14 FDI_FSYNC1 FDI_FSY NC0 FDI_FSY NC1 F17 E17 FDI_FSYNC[0] FDI_FSYNC[1] 14 FDI_INT FDI_INT C17 FDI_INT 14 FDI_LSYNC0 14 FDI_LSYNC1 FDI_ LSYNC0 FDI_ LSYNC1 F18 D17 FDI_LSYNC[0] FDI_LSYNC[1] PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8] PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15] J35 H34 H33 F35 G33 E34 F32 D34 F33 B33 D31 A32 C30 A28 B29 A30 PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9] PEG_TX#[10] PEG_TX#[11] PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15] L33 M35 M33 M30 L31 K32 M29 J31 K29 H30 H29 F29 E28 D29 D27 C26 PEG_TX[0] PEG_TX[1] PEG_TX[2] PEG_TX[3] PEG_TX[4] PEG_TX[5] PEG_TX[6] PEG_TX[7] PEG_TX[8] PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15] L34 M34 M32 L30 M31 K31 M28 H31 K28 G30 G29 F28 E27 D28 C27 C25 1 R57 2 750_0402_1% AP25 AL25 AL24 AL22 AJ33 AG9 M27 L28 J17 H17 G25 G17 E31 E30 +V_DDR_CPU_REF0 +V_DDR_CPU_REF1 C903 1 0.1U_0402_10V7K 2 RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 RSVD6 RSVD7 RSVD8 SA_DIMM_VREF SB_DIMM_VREF RSVD11 RSVD12 RSVD13 RSVD14 RSVD32 RSVD33 AJ13 AJ12 RSVD34 RSVD35 AH25 AK26 RSVD36 RSVD_NCTF_37 AL26 AR2 RSVD38 RSVD39 AJ26 AJ27 RSVD_NCTF_40 RSVD_NCTF_41 AP1 AT2 RSVD_NCTF_42 RSVD_NCTF_43 AT3 AR1 RSVD45 RSVD46 RSVD47 RSVD48 RSVD49 RSVD50 RSVD51 RSVD52 RSVD53 RSVD_NCTF_54 RSVD_NCTF_55 RSVD_NCTF_56 RSVD_NCTF_57 RSVD58 AL28 AL29 AP30 AP32 AL27 AT31 AT32 AP33 AR33 AT33 AT34 AP35 AR35 AR32 RSVD_TP_59 RSVD_TP_60 KEY RSVD62 RSVD63 RSVD64 RSVD65 E15 F15 A2 D15 C15 AJ15 AH15 RSVD_TP_66 RSVD_TP_67 RSVD_TP_68 RSVD_TP_69 RSVD_TP_70 RSVD_TP_71 RSVD_TP_72 RSVD_TP_73 RSVD_TP_74 RSVD_TP_75 AA5 AA4 R8 AD3 AD2 AA2 AA1 R9 AG7 AE3 RSVD_TP_76 RSVD_TP_77 RSVD_TP_78 RSVD_TP_79 RSVD_TP_80 RSVD_TP_81 RSVD_TP_82 RSVD_TP_83 RSVD_TP_84 RSVD_TP_85 V4 V5 N2 AD5 AD7 W3 W2 N3 AE5 AD9 MB_DP_AUXN 20 A +VCCP 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 R801 7.5K_0402_1% C904 1 0.1U_0402_10V7K 2 MB_DP_AUXP 20 D 2 G Q65 MB_DP_HPD 20 S SSM3K7002F_SC59-3 R800 100K_0402_5% DB2: No. 69 MB_C_DP_DATA0_N CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 T21 TPC12 CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 CFG18 AM30 AM28 AP31 AL32 AL30 AM31 AN29 AM32 AK32 AK31 AK28 AJ28 AN30 AN32 AJ32 AJ29 AJ30 AK30 H16 C905 1 2 0.1U_0402_10V7K R65 @ 0_0402_5% 1 2 1 2 @ 0_0402_5% R66 MB_DP_DATA0_N 20 B19 A19 RSVD15 RSVD16 A20 B20 RSVD17 RSVD18 U9 T9 RSVD19 RSVD20 AC9 AB9 RSVD21 RSVD22 C1 A3 MB_C_DP_DATA0_P CFG[0] CFG[1] CFG[2] CFG[3] CFG[4] CFG[5] CFG[6] CFG[7] CFG[8] CFG[9] CFG[10] CFG[11] CFG[12] CFG[13] CFG[14] CFG[15] CFG[16] CFG[17] RSVD_TP_86 RESERVED DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3 K35 J34 J33 G35 G32 F34 F31 D35 E33 C33 D32 B32 C31 B28 B30 A31 EXP_RBIAS 1 14 14 14 14 D24 G24 F23 H23 PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8] PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15] 2 49.9_0402_1% 2 DMI_RX[0] DMI_RX[1] DMI_RX[2] DMI_RX[3] 1 R56 1 B24 D23 B23 A22 EXP_ICOMPI 3 DMI_CRX_PTX_P0 DMI_CRX_PTX_P1 DMI_CRX_PTX_P2 DMI_CRX_PTX_P3 B26 A26 B27 A25 1 14 14 14 14 JCPU1E PEG_ICOMPI PEG_ICOMPO PEG_RCOMPO PEG_RBIAS 2 DMI_RX#[0] DMI_RX#[1] DMI_RX#[2] DMI_RX#[3] PCI EXPRESS -- GRAPHICS A24 C23 B22 A21 Intel(R) FDI B DMI_CRX_PTX_N0 DMI_CRX_PTX_N1 DMI_CRX_PTX_N2 DMI_CRX_PTX_N3 DMI A 14 14 14 14 C858 1 2 0.1U_0402_10V7K MB_DP_DATA0_P 20 C IC,AUB_CFD_rPGA,R1P0 09/2/16 HP RSVD_NCTF_23 RSVD_NCTF_24 J29 J28 RSVD26 RSVD27 A34 A33 RSVD_NCTF_28 RSVD_NCTF_29 C35 B35 RSVD_NCTF_30 RSVD_NCTF_31 CONN@ CFG0 R67 1 @ T128 TPC12 C T129 TPC12 6/30 HP VSS CFG Straps for PROCESSOR B R60 @ 0_0402_5% 1 2 1 2 0_0402_5% R61 @ AP34 IC,AUB_CFD_rPGA,R1P0 2 3.01K_0402_1% CFG7 R68 1 CONN@ 2 3.01K_0402_1% @ Only temporary for early CFD samples (rPGA/BGA) PCI-Express Configuration Select 1: Single PEG CFG0 0: Bifurcation enabled Not applicable for Clarksfield Processor @ CFG3 R69 1 CFG3-PCI Express 1: CFG3 0: 15 2 3.01K_0402_1% Static Lane Reversal Normal Operation Lane Numbers Reversed -> 0, 14 ->1, ..... -240mV for Pre-ES1 CFG4 R70 D 1 2 3.01K_0402_1% D CFG4-Display Port Presence 1: Disabled; No Physical Display Port attached to Embedded Display Port CFG4 0: Enabled; An external Display Port device is connected to the Embedded Display Port Compal Secret Data Security Classification Issued Date 2008/09/15 Deciphered Date 2009/12/31 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 1 2 http://laptop-motherboard-schematic.blogspot.com/ 3 4 Title Compal Electronics, Inc. Auburndale(2/5)-DMI/PEG/FDI Size Document Number Custom LA-4902P Date: R ev 0.3 W ednesday, December 09, 2009 5 Sheet 5 of 47 1 2 3 4 5 JCPU1D JCPU1C DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63 B C A10 C10 C7 A7 B10 D10 E10 A8 D8 F10 E6 F7 E9 B7 E7 C6 H10 G8 K7 J8 G7 G10 J7 J10 L7 M6 M8 L9 L6 K8 N8 P9 AH5 AF5 AK6 AK7 AF6 AG5 AJ7 AJ6 AJ10 AJ9 AL10 AK12 AK8 AL7 AK11 AL8 AN8 AM10 AR11 AL11 AM9 AN9 AT11 AP12 AM12 AN12 AM13 AT14 AT12 AL13 AR14 AP14 SA_DQ[0] SA_DQ[1] SA_DQ[2] SA_DQ[3] SA_DQ[4] SA_DQ[5] SA_DQ[6] SA_DQ[7] SA_DQ[8] SA_DQ[9] SA_DQ[10] SA_DQ[11] SA_DQ[12] SA_DQ[13] SA_DQ[14] SA_DQ[15] SA_DQ[16] SA_DQ[17] SA_DQ[18] SA_DQ[19] SA_DQ[20] SA_DQ[21] SA_DQ[22] SA_DQ[23] SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63] 9 DDR_A_BS0 9 DDR_A_BS1 9 DDR_A_BS2 AC3 AB2 U7 SA_BS[0] SA_BS[1] SA_BS[2] 9 DDR_A_CAS# 9 DDR_A_RAS# 9 DDR_A_W E# AE1 AB3 AE9 SA_CAS# SA_RAS# SA_WE# DDR SYSTEM MEMORY A 9 DDR_A_D[0..63] 10 DDR_B_D[0..63] SA_CK[0] SA_CK#[0] SA_CKE[0] AA6 AA7 P7 M_CLK_DDR0 9 M_CLK_DDR#0 9 DDR_CKE0_DIMMA 9 SA_CK[1] SA_CK#[1] SA_CKE[1] Y6 Y5 P6 M_CLK_DDR1 9 M_CLK_DDR#1 9 DDR_CKE1_DIMMA 9 SA_CS#[0] SA_CS#[1] AE2 AE8 DDR_CS0_DIMMA# 9 DDR_CS1_DIMMA# 9 SA_ODT[0] SA_ODT[1] AD8 AF9 M_ODT0 9 M_ODT1 9 SA_DM[0] SA_DM[1] SA_DM[2] SA_DM[3] SA_DM[4] SA_DM[5] SA_DM[6] SA_DM[7] B9 D7 H7 M7 AG6 AM7 AN10 AN13 DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7 SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7] C9 F8 J9 N9 AH7 AK9 AP11 AT13 DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7 SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7] C8 F9 H9 M9 AH8 AK10 AN11 AR13 DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7 SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8] SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15] Y3 W1 AA8 AA3 V1 AA9 V8 T1 Y9 U6 AD4 T2 U3 AG8 T3 V9 DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15 DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63 DDR_A_DM[0..7] 9 DDR_A_DQS#[0..7] 9 DDR_A_DQS[0..7] 9 DDR_A_MA[0..15] 9 B5 A5 C3 B3 E4 A6 A4 C4 D1 D2 F2 F1 C2 F5 F3 G4 H6 G2 J6 J3 G1 G5 J2 J1 J5 K2 L3 M1 K5 K4 M4 N5 AF3 AG1 AJ3 AK1 AG4 AG3 AJ4 AH4 AK3 AK4 AM6 AN2 AK5 AK2 AM4 AM3 AP3 AN5 AT4 AN6 AN4 AN3 AT5 AT6 AN7 AP6 AP8 AT9 AT7 AP9 AR10 AT10 SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63] 10 DDR_B_BS0 10 DDR_B_BS1 10 DDR_B_BS2 AB1 W5 R7 SB_BS[0] SB_BS[1] SB_BS[2] 10 DDR_B_CAS# 10 DDR_B_RAS# 10 DDR_B_W E# AC5 Y7 AC6 SB_CAS# SB_RAS# SB_WE# SB_CK[0] SB_CK#[0] SB_CKE[0] W8 W9 M3 M_CLK_DDR2 10 M_CLK_DDR#2 10 DDR_CKE2_DIMMB 10 SB_CK[1] SB_CK#[1] SB_CKE[1] V7 V6 M2 M_CLK_DDR3 10 M_CLK_DDR#3 10 DDR_CKE3_DIMMB 10 SB_CS#[0] SB_CS#[1] AB8 AD6 DDR_CS2_DIMMB# 10 DDR_CS3_DIMMB# 10 SB_ODT[0] SB_ODT[1] AC7 AD1 M_ODT2 10 M_ODT3 10 SB_DM[0] SB_DM[1] SB_DM[2] SB_DM[3] SB_DM[4] SB_DM[5] SB_DM[6] SB_DM[7] D4 E1 H3 K1 AH1 AL2 AR4 AT8 A DDR_B_DM[0..7] 10 DDR_B_DM0 DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7 B DDR SYSTEM MEMORY - B A SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7] D5 F4 J4 L4 AH2 AL4 AR5 AR8 DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7 SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7] C5 E3 H4 M5 AG2 AL5 AP5 AR7 DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7 SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8] SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15] U5 V2 T5 V3 R1 T8 R2 R6 R4 R5 AB5 P3 R3 AF7 P5 N1 DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15 DDR_B_DQS#[0..7] 10 DDR_B_DQS[0..7] 10 DDR_B_MA[0..15] 10 C IC,AUB_CFD_rPGA,R1P0 CONN@ IC,AUB_CFD_rPGA,R1P0 CONN@ D D Compal Secret Data Security Classification Issued Date 2008/09/15 Deciphered Date 2009/12/31 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 1 2 http://laptop-motherboard-schematic.blogspot.com/ 3 4 Title Compal Electronics, Inc. Auburndale(3/5)-DDR3 Size Document Number Custom LA-4902P Date: R ev 0.3 W ednesday, December 09, 2009 5 Sheet 6 of 47 1 2 3 4 5 +CPU_CORE +GFX_CORE 2 +CPU_CORE P10 N10 L10 K10 VTT1_63 VTT1_64 VTT1_65 VTT1_66 VTT1_67 VTT1_68 J22 J20 J18 H21 H20 H19 2 @ 1 + 2 1 2 1 2 1 2 1 2 2 B SENSE LINES 1.1V 2 L26 L27 M26 1 2 C77 22U_0805_6.3V6M 2 +1.8VS 2 1 2 1 2 C82 4.7U_0603_6.3V6K 2 CONN@ 1 C81 10U_0805_6.3V6M 2 1 C80 2.2U_0603_6.3V4Z 1.8V 1 C76 22U_0805_6.3V6M +1.5V to +1.5V_CPU_VDDQ Transfer H_VTTVID1 = Low, 1.1V C1020 +1.5V 1 +1.5V_CPU_VDDQ +1.5V_CPU_VDDQ 2 VCCSENSE 41 VSSSENSE 41 VTT_SENSE 38 VSS_SENSE_VTT 38 1 2 R1984 1 2 0_0402_5% 4 SENSE LINES B15 A15 1 2 R1135 220_0402_1% 2 0.1U_0402_10V6K +1.5V_CPU_VDDQ 1 VCCSENSE VSSSENSE 1 +1.5V C1024 2 0_0402_5% 2 0_0402_5% C1021 C1022 0.1U_0402_10V6K 1 R75 1 R76 C1023 VTT_SENSE VSS_SENSE_VTT AJ34 AJ35 IMVP_IMON 41 0.1U_0402_10V6K VCC_SENSE VSS_SENSE AN35 2 0.1U_0402_10V6K SI7326DN-T1-E3_PAK1212-8 Q89 1 2 5 3 1 2 0.1U_0402_10V6K 33 D S SLP_S3 2 G SLP_S3 C1025 1 1 H_VTTVID1 = High, 1.05V ISENSE C 3 CPU VIDS 2 +VCCP 1 IC,AUB_CFD_rPGA,R1P0 H_VTTVID1 38 2 1 C71 10U_0805_6.3V6M 1 1 PROC_DPRSLPVR 41 1 C70 22U_0805_6.3V6M G15 VCCPLL1 VCCPLL2 VCCPLL3 0.6A H_VID[0..6] 41 2 0_0402_5% 06/30HP +VCCP C79 1U_0603_10V4Z VTT_SELECT H_VID0 H_VID1 H_VID2 H_VID3 H_VID4 H_VID5 H_VID6 PM_DPRSLPVR_R 1 R74 11/6 add to follow design guide. GFXVR_EN C54 1U_0603_10V4Z VTT0_59 VTT0_60 VTT0_61 VTT0_62 1 C78 1U_0603_10V4Z AK35 AK33 AK34 AL35 AL33 AM33 AM35 AM34 41 VTT1_48 VTT1_49 VTT1_50 VTT1_51 VTT1_52 VTT1_53 VTT1_54 VTT1_55 VTT1_56 VTT1_57 VTT1_58 PEG & DMI VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6] PROC_DPRSLPVR PSI# C73 22U_0805_6.3V6M AN33 2 CPU PSI# C72 10U_0805_6.3V6M 2 1 R967 4.7K_0402_5% C53 1U_0603_10V4Z AJ1 AF1 AE7 AE4 AC1 AB7 AB4 Y1 W7 W4 U1 T7 T4 P1 N7 N4 L1 H1 2 K26 J27 J26 J25 H27 G28 G27 G26 F26 E26 E25 43 43 43 43 43 43 43 C65 10U_0805_6.3V6M VTT1_45 VTT1_46 VTT1_47 3A VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18 +VCCP 1 POWER GFXVR_EN 43 GFXVR_DPRSLPVR 43 GFXVR_IMON 43 C64 10U_0805_6.3V6M 2 AR25 AT25 AM24 C63 330U_D2_2VY_R7M 1 J24 J23 H25 FDI 2 C75 10U_0805_6.3V6M 2 1 C67 22U_0805_6.3V6M 1 C66 10U_0805_6.3V6M AF10 AE10 AC10 AB10 Y10 W10 U10 T10 J12 J11 J16 J15 GFX_VR_EN GFX_DPRSLPVR GFX_IMON 11/10 for Auburndale pre-ES1 +1.5V_CPU_VDDQ +VCCP VTT0_33 VTT0_34 VTT0_35 VTT0_36 VTT0_37 VTT0_38 VTT0_39 VTT0_40 VTT0_41 VTT0_42 VTT0_43 VTT0_44 GFXVR_VID_0 GFXVR_VID_1 GFXVR_VID_2 GFXVR_VID_3 GFXVR_VID_4 GFXVR_VID_5 GFXVR_VID_6 C52 1U_0603_10V4Z 2 AM22 AP22 AN22 AP23 AM23 AP24 AN24 C51 1U_0603_10V4Z @ GFX_VID[0] GFX_VID[1] GFX_VID[2] GFX_VID[3] GFX_VID[4] GFX_VID[5] GFX_VID[6] C50 1U_0603_10V4Z 2 C62 @ 1 47P_0402_50V8J C61 2 1 47P_0402_50V8J C60 @ 1 47P_0402_50V8J C59 2 47P_0402_50V8J @ 1 VCC_AXG_SENSE 43 VSS_AXG_SENSE 43 1 C972 AR22 AT22 A GRAPHICS VIDs 2 + VAXG_SENSE VSSAXG_SENSE - 1.5V RAILS C974 1 330U_X_2VM_R6M 2 + 15A DDR3 2 + 1 VAXG1 VAXG2 VAXG3 VAXG4 VAXG5 VAXG6 VAXG7 VAXG8 VAXG9 VAXG10 VAXG11 VAXG12 VAXG13 VAXG14 VAXG15 VAXG16 VAXG17 VAXG18 VAXG19 VAXG20 VAXG21 VAXG22 VAXG23 VAXG24 VAXG25 VAXG26 VAXG27 VAXG28 VAXG29 VAXG30 VAXG31 VAXG32 VAXG33 VAXG34 VAXG35 VAXG36 GRAPHICS 2 1 C49 22U_0805_6.3V6M 2 1 2 SI1 NO36 1 C973 1 2 330U_X_2VM_R6M 2 330U_X_2VM_R6M 1 C57 10U_0805_6.3V6M 1.1V RAIL POWER 2 2 1 C881 10U_0805_6.3V6M 1 2 1 C880 10U_0805_6.3V6M 2 C40 10U_0805_6.3V6M 1 C39 10U_0805_6.3V6M AH14 AH12 AH11 AH10 J14 J13 H14 H12 G14 G13 G12 G11 F14 F13 F12 F11 E14 E12 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11 C45 22U_0805_6.3V6M D VTT0_1 VTT0_2 VTT0_3 VTT0_4 VTT0_5 VTT0_6 VTT0_7 VTT0_8 VTT0_9 VTT0_10 VTT0_11 VTT0_12 VTT0_13 VTT0_14 VTT0_15 VTT0_16 VTT0_17 VTT0_18 VTT0_19 VTT0_20 VTT0_21 VTT0_22 VTT0_23 VTT0_24 VTT0_25 VTT0_26 VTT0_27 VTT0_28 VTT0_29 VTT0_30 VTT0_31 VTT0_32 1 +VCCP CPU CORE SUPPLY C VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 VCC50 VCC51 VCC52 VCC53 VCC54 VCC55 VCC56 VCC57 VCC58 VCC59 VCC60 VCC61 VCC62 VCC63 VCC64 VCC65 VCC66 VCC67 VCC68 VCC69 VCC70 VCC71 VCC72 VCC73 VCC74 VCC75 VCC76 VCC77 VCC78 VCC79 VCC80 VCC81 VCC82 VCC83 VCC84 VCC85 VCC86 VCC87 VCC88 VCC89 VCC90 VCC91 VCC92 VCC93 VCC94 VCC95 VCC96 VCC97 VCC98 VCC99 VCC100 C58 10U_0805_6.3V6M B AG35 AG34 AG33 AG32 AG31 AG30 AG29 AG28 AG27 AG26 AF35 AF34 AF33 AF32 AF31 AF30 AF29 AF28 AF27 AF26 AD35 AD34 AD33 AD32 AD31 AD30 AD29 AD28 AD27 AD26 AC35 AC34 AC33 AC32 AC31 AC30 AC29 AC28 AC27 AC26 AA35 AA34 AA33 AA32 AA31 AA30 AA29 AA28 AA27 AA26 Y35 Y34 Y33 Y32 Y31 Y30 Y29 Y28 Y27 Y26 V35 V34 V33 V32 V31 V30 V29 V28 V27 V26 U35 U34 U33 U32 U31 U30 U29 U28 U27 U26 R35 R34 R33 R32 R31 R30 R29 R28 R27 R26 P35 P34 P33 P32 P31 P30 P29 P28 P27 P26 1 C879 10U_0805_6.3V6M A +VCCP 18A C878 10U_0805_6.3V6M 48A JCPU1G AT21 AT19 AT18 AT16 AR21 AR19 AR18 AR16 AP21 AP19 AP18 AP16 AN21 AN19 AN18 AN16 AM21 AM19 AM18 AM16 AL21 AL19 AL18 AL16 AK21 AK19 AK18 AK16 AJ21 AJ19 AJ18 AJ16 AH21 AH19 AH18 AH16 POWER JCPU1F Q90 SSM3K7002F_SC59-3 2 D 0.1U_0402_10V6K RUNON Close to CPU VCCSENSE VSSSENSE 1 R77 1 R78 33 Stich CAP between 1.5V and 1.5V-CPU_VDDQ 7/2/2009 HP +CPU_CORE Compal Secret Data Security Classification 2 100_0402_1% 2 100_0402_1% Issued Date 2008/09/15 Deciphered Date 2009/12/31 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. IC,AUB_CFD_rPGA,R1P0 CONN@ 1 RUNON 2 http://laptop-motherboard-schematic.blogspot.com/ 3 4 Title Compal Electronics, Inc. Auburndale(4/5)-PWR Size Document Number Custom LA-4902P Date: R ev 0.3 W ednesday, December 09, 2009 5 Sheet 7 of 47 1 2 3 4 +CPU_CORE 2 C94 22U_0805_6.3V6M 2 1 C988 10U_0805_6.3V6M 1 C92 22U_0805_6.3V6M C91 22U_0805_6.3V6M 2 1 2 Inside cavity 05/20 change MLCC part references for power team request 10uF: C103 Ε C993 BC994 Ε C988 Ε C92 C94 Ε C97 Ε C116 Ε C11 3 Ε C90 C89 Ε C98 Ε C99 Ε C100 Ε C101 C102 Ε C91 Ε C84 Ε C96 BC83 C111 Ε C88 22uF: the others 1 2 2 1 + 2 1 @ + 2 @ Under cavity VSS 2 @ 1 2 1 2 1 2 1 2 @ 05/20 change C105 ~ C108 to SGA00001Q80 SI1 NO30 2 @ B +3VS @ 1 T98 TPC12 T99 TPC12 T100 TPC12 2 @ 1 C990 22U_0805_6.3V6M 2 1 C989 22U_0805_6.3V6M 2 @ 2 2 R79 CRACK_BGA 17,29 100K_0402_5% 6 1 VSS_NCTF2_R Q2A 2N7002DWH_SOT363-6 2 1 2 1 C104 10U_0805_6.3V6M 2 1 C95 10U_0805_6.3V6M 1 C992 10U_0805_6.3V6M 1 +3VS R80 CRACK_BGA 2 3 100K_0402_5% VSS_NCTF1_R Q2B 2N7002DWH_SOT363-6 5 C 4 +3VS 1 VSS_NCTF1_R VSS_NCTF2_R VSS_NCTF3_R VSS_NCTF4_R VSS_NCTF5_R VSS_NCTF6_R VSS_NCTF7_R 1 C93 22U_0805_6.3V6M AT35 AT1 AR34 B34 B2 B1 A35 C991 10U_0805_6.3V6M VSS_NCTF1 VSS_NCTF2 VSS_NCTF3 VSS_NCTF4 VSS_NCTF5 VSS_NCTF6 VSS_NCTF7 C987 22U_0805_6.3V6M 1 NCTF 1 @ + C120 10U_0805_6.3V6M + C119 22U_0805_6.3V6M 2 1 C118 22U_0805_6.3V6M + C117 22U_0805_6.3V6M 2 1 A between Inductor and socket C110 470U_D2_2VM_R4.5M + 2 C109 470U_D2_2VM_R4.5M 1 1 C108 330U_X_2VM_R6M 2 2 C107 330U_X_2VM_R6M 1 1 C106 330U_X_2VM_R6M 2 @ 2 C105 330U_X_2VM_R6M 1 1 C994 22U_0805_6.3V6M 1 C103 10U_0805_6.3V6M 2 2 C102 22U_0805_6.3V6M 1 C90 10U_0805_6.3V6M 2 1 C87 10U_0805_6.3V6M 2 2 C101 22U_0805_6.3V6M 1 1 C115 22U_0805_6.3V6M 2 2 C114 10U_0805_6.3V6M 1 1 C86 10U_0805_6.3V6M 2 2 C112 22U_0805_6.3V6M 1 1 C100 22U_0805_6.3V6M 2 2 1 @ C99 22U_0805_6.3V6M 1 2 1 @ C98 22U_0805_6.3V6M 2 @ C97 22U_0805_6.3V6M 1 2 1 C89 22U_0805_6.3V6M @ 2 1 C88 22U_0805_6.3V6M 2 1 C116 10U_0805_6.3V6M 2 1 C113 22U_0805_6.3V6M 2 1 C85 10U_0805_6.3V6M VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191 VSS192 VSS193 VSS194 VSS195 VSS196 VSS197 VSS198 VSS199 VSS200 VSS201 VSS202 VSS203 VSS204 VSS205 VSS206 VSS207 VSS208 VSS209 VSS210 VSS211 VSS212 VSS213 VSS214 VSS215 VSS216 VSS217 VSS218 VSS219 VSS220 VSS221 VSS222 VSS223 VSS224 VSS225 VSS226 VSS227 VSS228 VSS229 VSS230 VSS231 VSS232 VSS233 C111 10U_0805_6.3V6M 1 K27 K9 K6 K3 J32 J30 J21 J19 H35 H32 H28 H26 H24 H22 H18 H15 H13 H11 H8 H5 H2 G34 G31 G20 G9 G6 G3 F30 F27 F25 F22 F19 F16 E35 E32 E29 E24 E21 E18 E13 E11 E8 E5 E2 D33 D30 D26 D9 D6 D3 C34 C32 C29 C28 C24 C22 C20 C19 C16 B31 B25 B21 B18 B17 B13 B11 B8 B6 B4 A29 A27 A23 A9 C96 22U_0805_6.3V6M CRACK_BGA R81 6 AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE6 AD10 AC8 AC4 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 AB6 AA10 Y8 Y4 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 W6 V10 U8 U4 U2 T35 T34 T33 T32 T31 T30 T29 T28 T27 T26 T6 R10 P8 P4 P2 N35 N34 N33 N32 N31 N30 N29 N28 N27 N26 N6 M10 L35 L32 L29 L8 L5 L2 K34 K33 K30 C84 22U_0805_6.3V6M C VSS VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 C993 10U_0805_6.3V6M B VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 C83 10U_0805_6.3V6M A AT20 AT17 AR31 AR28 AR26 AR24 AR23 AR20 AR17 AR15 AR12 AR9 AR6 AR3 AP20 AP17 AP13 AP10 AP7 AP4 AP2 AN34 AN31 AN23 AN20 AN17 AM29 AM27 AM25 AM20 AM17 AM14 AM11 AM8 AM5 AM2 AL34 AL31 AL23 AL20 AL17 AL12 AL9 AL6 AL3 AK29 AK27 AK25 AK20 AK17 AJ31 AJ23 AJ20 AJ17 AJ14 AJ11 AJ8 AJ5 AJ2 AH35 AH34 AH33 AH32 AH31 AH30 AH29 AH28 AH27 AH26 AH20 AH17 AH13 AH9 AH6 AH3 AG10 AF8 AF4 AF2 AE35 CPU CORE JCPU1I 2 JCPU1H 5 2 100K_0402_5% IC,AUB_CFD_rPGA,R1P0 CONN@ CONN@ VSS_NCTF6_R 2 C1048 0.1U_0402_16V4Z Q3A 2N7002DWH_SOT363-6 2 1 IC,AUB_CFD_rPGA,R1P0 1 1 +3VS CRACK_BGA 3 R82 2 100K_0402_5% Q3B 2N7002DWH_SOT363-6 5 4 VSS_NCTF7_R D D BGA Ball Cracking Prevention and Detection Compal Secret Data Security Classification Issued Date 2008/09/15 Deciphered Date 2009/12/31 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 1 2 http://laptop-motherboard-schematic.blogspot.com/ 3 4 Title Compal Electronics, Inc. Auburndale(5/5)-GND/Bypass Size Document Number Custom LA-4902P Date: R ev 0.3 W ednesday, December 09, 2009 5 Sheet 8 of 47 1 2 3 4 5 SI1: No44 DDR3 SO-DIMM A 6 DDR_A_D[0..63] 4B A2/6W 2 DDR_A_D8 DDR_A_D9 DDR_A_DQS#1 DDR_A_DQS1 DDR_A_D10 DDR_A_D11 DDR_A_D16 DDR_A_D17 DDR_A_DQS#2 DDR_A_DQS2 DDR_A_D18 DDR_A_D19 DDR_A_D24 DDR_A_D25 DDR_A_DM3 DDR_A_D26 DDR_A_D27 B 6 DDR_CKE0_DIMMA DDR_CKE0_DIMMA 6 DDR_A_BS2 DDR_A_BS2 DDR_A_MA12 DDR_A_MA9 DDR_A_MA8 DDR_A_MA5 DDR_A_MA3 DDR_A_MA1 6 M_CLK_DDR0 6 M_CLK_DDR#0 M_CLK_DDR0 M_CLK_DDR#0 6 DDR_A_BS0 DDR_A_MA10 DDR_A_BS0 6 DDR_A_W E# 6 DDR_A_CAS# DDR_A_W E# DDR_A_CAS# 6 DDR_CS1_DIMMA# DDR_A_MA13 DDR_CS1_DIMMA# C DDR_A_D34 DDR_A_D35 DDR_A_D40 DDR_A_D41 DDR_A_DM5 DDR_A_D42 DDR_A_D43 DDR_A_D48 DDR_A_D49 DDR_A_DQS#6 DDR_A_DQS6 DDR_A_D50 DDR_A_D51 DDR_A_D56 DDR_A_D57 2 2 DDR_A_D14 DDR_A_D15 DDR_A_D20 DDR_A_D21 DDR_A_DM2 DDR_A_D22 DDR_A_D23 DDR_A_D28 DDR_A_D29 DDR_A_DQS#3 DDR_A_DQS3 DDR_A_D30 DDR_A_D31 DDR_CKE1_DIMMA DDR_CKE1_DIMMA 6 B DDR_A_MA15 DDR_A_MA14 DDR_A_MA11 DDR_A_MA7 DDR_A_MA6 DDR_A_MA4 DDR_A_MA2 DDR_A_MA0 M_CLK_DDR1 M_CLK_DDR#1 M_CLK_DDR1 6 M_CLK_DDR#1 6 DDR_A_BS1 DDR_A_RAS# DDR_A_BS1 6 DDR_A_RAS# 6 DDR_CS0_DIMMA# M_ODT0 M_ODT1 DDR_CS0_DIMMA# 6 M_ODT0 6 DDR_A_D36 DDR_A_D37 1 DDR_A_DM4 DDR_A_D38 DDR_A_D39 2 SI1: No44 +V_DDR_REF_DIMMA_CA M_ODT1 6 1 2 Layout Note: Shared between the two SO-DIMMs. Place two capacitors close to the VR and one between the two SODIMMs DDR_A_D44 DDR_A_D45 C DDR_A_DQS#5 DDR_A_DQS5 DDR_A_D46 DDR_A_D47 Layout Note: Place near DIMMA JP20 DDR_A_D52 DDR_A_D53 SMB_DATA_S3 SMB_CLK_S3 DDR_A_DM6 3 2 1 3 2 1 G2 G1 Layout Note: Place near DIMMA 5 4 ACES_85204-03001 CONN@ DDR_A_D54 DDR_A_D55 SI1: No48 For ME/AMT debug DDR_A_D60 DDR_A_D61 09/4/28 HP SI2 NO9 +1.5V DDR_A_DQS#7 DDR_A_DQS7 2 2 1 2 1 2 1 2 1 2 10U_0603_6.3V6M 2 1 C125 2 1 10U_0603_6.3V6M 2 1 C124 2 + 10U_0603_6.3V6M 2 @ 1 C140 2 @ 1 1U_0402_6.3V6K 2 @ 1 1U_0402_6.3V6K 2 @ 1 C139 2 1 C138 2 1 1U_0402_6.3V6K 2 1 C137 2 1 1U_0402_6.3V6K PM_EXTTS#1_R 4,10 SMB_DATA_S3 4,10,11,13,26 SMB_CLK_S3 4,10,11,13,26 +0.75VS 1 +0.75VS C136 PM_EXTTS#1_R SMB_DATA_S3 SMB_CLK_S3 1 C135 0.1U_0402_16V4Z 1 C134 0.1U_0402_16V4Z DDR_A_D62 DDR_A_D63 D 1/76BA1 /86W +0.75V Reserved TOP 1 SI1: No44 09/4/27 HP C133 0.1U_0402_16V4Z 1 SI1: No21 SI1: No27 09/4/10 HP DRAMRST# 4,10 C132 0.1U_0402_16V4Z 2 DDR_A_DM1 DRAMRST# A C131 10U_0603_6.3V6M FOX_AS0A626-U2RN-7F R1101 1K_0402_1% C130 10U_0603_6.3V6M 206 R84 1K_0402_1% DDR_A_D12 DDR_A_D13 C129 10U_0603_6.3V6M G2 6 DDR_A_MA[0..15] DDR_A_D6 DDR_A_D7 C128 10U_0603_6.3V6M G1 DDR_A_DQS#0 DDR_A_DQS0 C127 10U_0603_6.3V6M 2 205 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204 +V_DDR_REF_DIMMA_CA 6 DDR_A_DQS#[0..7] C126 10U_0603_6.3V6M 2 1 R88 10K_0402_5% 1 C144 0.1U_0402_16V4Z 09/2/16 HP C143 2.2U_0402_6.3V6M +3VS D CKE1 VDD2 A15 A14 VDD4 A11 A7 VDD6 A6 A4 VDD8 A2 A0 VDD10 CK1 CK1# VDD12 BA1 RAS# VDD14 S0# ODT0 VDD16 ODT1 NC2 VDD18 VREF_CA VSS28 DQ36 DQ37 VSS30 DM4 VSS31 DQ38 DQ39 VSS33 DQ44 DQ45 VSS35 DQS#5 DQS5 VSS38 DQ46 DQ47 VSS40 DQ52 DQ53 VSS42 DM6 VSS43 DQ54 DQ55 VSS45 DQ60 DQ61 VSS47 DQS#7 DQS7 VSS50 DQ62 DQ63 VSS52 EVENT# SDA SCL VTT2 R1100 1K_0402_1% +V_DDR_REF_DIMMA_DQ C123 330U_D2_2VY_R7M DDR_A_DM7 DDR_A_D58 DDR_A_D59 1 R87 2 10K_0402_5% R83 1K_0402_1% 6 DDR_A_DQS[0..7] DDR_A_D4 DDR_A_D5 C142 2.2U_0805_16V4Z DDR_A_DQS#4 DDR_A_DQS4 CKE0 VDD1 NC1 BA2 VDD3 A12/BC# A9 VDD5 A8 A5 VDD7 A3 A1 VDD9 CK0 CK0# VDD11 A10/AP BA0 VDD13 WE# CAS# VDD15 A13 S1# VDD17 NCTEST VSS27 DQ32 DQ33 VSS29 DQS#4 DQS4 VSS32 DQ34 DQ35 VSS34 DQ40 DQ41 VSS36 DM5 VSS37 DQ42 DQ43 VSS39 DQ48 DQ49 VSS41 DQS#6 DQS6 VSS44 DQ50 DQ51 VSS46 DQ56 DQ57 VSS48 DM7 VSS49 DQ58 DQ59 VSS51 SA0 VDDSPD SA1 VTT1 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 C141 0.1U_0402_16V4Z DDR_A_D32 DDR_A_D33 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203 VSS1 DQ4 DQ5 VSS3 DQS#0 DQS0 VSS6 DQ6 DQ7 VSS8 DQ12 DQ13 VSS10 DM1 RESET# VSS12 DQ14 DQ15 VSS14 DQ20 DQ21 VSS16 DM2 VSS17 DQ22 DQ23 VSS19 DQ28 DQ29 VSS21 DQS#3 DQS3 VSS24 DQ30 DQ31 VSS26 1 DDR_A_DM0 DDR_A_D2 DDR_A_D3 VREF_DQ VSS2 DQ0 DQ1 VSS4 DM0 VSS5 DQ2 DQ3 VSS7 DQ8 DQ9 VSS9 DQS#1 DQS1 VSS11 DQ10 DQ11 VSS13 DQ16 DQ17 VSS15 DQS#2 DQS2 VSS18 DQ18 DQ19 VSS20 DQ24 DQ25 VSS22 DM3 VSS23 DQ26 DQ27 VSS25 2 A 1 C122 2.2U_0805_16V4Z 2 C121 0.1U_0402_16V4Z 1 DDR_A_D0 DDR_A_D1 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 6 DDR_A_DM[0..7] CONN@ 2 JDIMA1 +1.5V 1 +1.5V +1.5V 1 +1.5V 1 +V_DDR_REF_DIMMA_DQ Compal Secret Data Security Classification Issued Date 2008/09/15 Deciphered Date 2009/12/31 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 2 http://laptop-motherboard-schematic.blogspot.com/ 3 4 Title Compal Electronics, Inc. DDRIII-SODIMM SLOT1 Size Document Number Custom LA-4902P Date: R ev 0.3 W ednesday, December 09, 2009 5 Sheet 9 of 47 1 2 3 4 5 SI1: No44 DDR_B_DM0 DDR_B_D2 DDR_B_D3 DDR_B_D8 DDR_B_D9 DDR_B_DQS#1 DDR_B_DQS1 DDR_B_D10 DDR_B_D11 DDR_B_D16 DDR_B_D17 DDR_B_DQS#2 DDR_B_DQS2 DDR_B_D18 DDR_B_D19 DDR_B_D24 DDR_B_D25 DDR_B_DM3 DDR_B_D26 DDR_B_D27 CKE0 VDD1 NC1 BA2 VDD3 A12/BC# A9 VDD5 A8 A5 VDD7 A3 A1 VDD9 CK0 CK0# VDD11 A10/AP BA0 VDD13 WE# CAS# VDD15 A13 S1# VDD17 NCTEST VSS27 DQ32 DQ33 VSS29 DQS#4 DQS4 VSS32 DQ34 DQ35 VSS34 DQ40 DQ41 VSS36 DM5 VSS37 DQ42 DQ43 VSS39 DQ48 DQ49 VSS41 DQS#6 DQS6 VSS44 DQ50 DQ51 VSS46 DQ56 DQ57 VSS48 DM7 VSS49 DQ58 DQ59 VSS51 SA0 VDDSPD SA1 VTT1 205 G1 2 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203 R1104 1K_0402_1% +V_DDR_REF_DIMMB_DQ 6 DDR_B_DQS[0..7] DDR_B_D4 DDR_B_D5 +V_DDR_REF_DIMMB_CA 6 DDR_B_MA[0..15] DDR_B_DQS#0 DDR_B_DQS0 A DDR_B_D6 DDR_B_D7 R1103 1K_0402_1% R1105 1K_0402_1% DDR_B_D12 DDR_B_D13 2 2 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 1 DDR_B_D0 DDR_B_D1 1 C146 C145 2 0.1U_0402_16V4Z 2.2U_0805_16V4Z A 1 VSS1 DQ4 DQ5 VSS3 DQS#0 DQS0 VSS6 DQ6 DQ7 VSS8 DQ12 DQ13 VSS10 DM1 RESET# VSS12 DQ14 DQ15 VSS14 DQ20 DQ21 VSS16 DM2 VSS17 DQ22 DQ23 VSS19 DQ28 DQ29 VSS21 DQS#3 DQS3 VSS24 DQ30 DQ31 VSS26 R1102 1K_0402_1% 6 DDR_B_DM[0..7] CONN@ VREF_DQ VSS2 DQ0 DQ1 VSS4 DM0 VSS5 DQ2 DQ3 VSS7 DQ8 DQ9 VSS9 DQS#1 DQS1 VSS11 DQ10 DQ11 VSS13 DQ16 DQ17 VSS15 DQS#2 DQS2 VSS18 DQ18 DQ19 VSS20 DQ24 DQ25 VSS22 DM3 VSS23 DQ26 DQ27 VSS25 2 JDIMB1 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 +1.5V 1 6 DDR_B_D[0..63] 4B A2/6W +VREF_DQ_DIMMB +1.5V 6 DDR_B_DQS#[0..7] 2 +1.5V DDR3 SO-DIMM B 1 +1.5V 1 +V_DDR_REF_DIMMB_DQ SI1: No44 DDR_B_DM1 DRAMRST# 09/4/27 HP DRAMRST# 4,9 DDR_B_D14 DDR_B_D15 DDR_B_D20 DDR_B_D21 DDR_B_DM2 DDR_B_D22 DDR_B_D23 DDR_B_D28 DDR_B_D29 DDR_B_DQS#3 DDR_B_DQS3 DDR_B_D30 DDR_B_D31 B B DDR_CKE2_DIMMB 6 DDR_CKE2_DIMMB DDR_B_BS2 6 DDR_B_BS2 DDR_B_MA12 DDR_B_MA9 DDR_B_MA8 DDR_B_MA5 DDR_B_MA3 DDR_B_MA1 6 M_CLK_DDR2 6 M_CLK_DDR#2 M_CLK_DDR2 M_CLK_DDR#2 6 DDR_B_BS0 DDR_B_MA10 DDR_B_BS0 6 DDR_B_W E# 6 DDR_B_CAS# DDR_B_W E# DDR_B_CAS# 6 DDR_CS3_DIMMB# DDR_B_MA13 DDR_CS3_DIMMB# DDR_B_DQS#4 DDR_B_DQS4 DDR_B_D34 DDR_B_D35 DDR_B_D40 DDR_B_D41 DDR_B_DM5 DDR_B_D42 DDR_B_D43 DDR_B_D48 DDR_B_D49 DDR_B_DQS#6 DDR_B_DQS6 DDR_B_D50 DDR_B_D51 M_ODT3 SI1: No44 DDR_CS2_DIMMB# 6 M_ODT2 6 +V_DDR_REF_DIMMB_CA M_ODT3 6 +VREF_CA DDR_B_D36 DDR_B_D37 1 DDR_B_DM4 2 DDR_B_D38 DDR_B_D39 1 2 C DDR_B_D44 DDR_B_D45 DDR_B_DQS#5 DDR_B_DQS5 DDR_B_D46 DDR_B_D47 Layout Note: Place near DIMMB SI1: No48 09/4/28 HP DDR_B_DM6 +0.75VS DDR_B_D54 DDR_B_D55 +1.5V 2 2 2 1 2 1 2 1 2 @ 1 2 @ 1 2 @ 1 2 @ 1 + 2 1 2 1 2 1 2 1 2 C164 1U_0402_6.3V6K 2 PM_EXTTS#1_R 4,9 SMB_DATA_S3 4,9,11,13,26 SMB_CLK_S3 4,9,11,13,26 +0.75VS 1 C163 1U_0402_6.3V6K PM_EXTTS#1_R SMB_DATA_S3 SMB_CLK_S3 1 C162 1U_0402_6.3V6K DDR_B_D62 DDR_B_D63 1 C161 1U_0402_6.3V6K 1 C158 0.1U_0402_16V4Z DDR_B_DQS#7 DDR_B_DQS7 C977 330U_D2_2VY_R7M DDR_B_D60 DDR_B_D61 D 1/76BA1 /86W +0.75V Compal Secret Data Security Classification Issued Date BOT 1 Layout Note: Place near DIMM DDR_B_D52 DDR_B_D53 C157 0.1U_0402_16V4Z 206 DDR_B_BS1 6 DDR_B_RAS# 6 DDR_CS2_DIMMB# M_ODT2 C156 0.1U_0402_16V4Z G2 M_CLK_DDR3 6 M_CLK_DDR#3 6 DDR_B_BS1 DDR_B_RAS# C155 0.1U_0402_16V4Z 2 10K_0402_5% M_CLK_DDR3 M_CLK_DDR#3 C154 10U_0603_6.3V6M 2 1 R92 DDR_B_MA2 DDR_B_MA0 C153 10U_0603_6.3V6M 2 1 C166 0.1U_0402_16V4Z 1 C165 2.2U_0402_6.3V6M +3VS 09/2/16 HP DDR_B_MA6 DDR_B_MA4 C152 10U_0603_6.3V6M D DDR_B_MA11 DDR_B_MA7 C151 10U_0603_6.3V6M DDR_B_D58 DDR_B_D59 1 R91 2 10K_0402_5% DDR_B_MA15 DDR_B_MA14 C150 10U_0603_6.3V6M DDR_B_DM7 DDR_CKE3_DIMMB 6 C149 10U_0603_6.3V6M DDR_B_D56 DDR_B_D57 DDR_CKE3_DIMMB C160 2.2U_0805_16V4Z C 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204 C159 0.1U_0402_16V4Z DDR_B_D32 DDR_B_D33 CKE1 VDD2 A15 A14 VDD4 A11 A7 VDD6 A6 A4 VDD8 A2 A0 VDD10 CK1 CK1# VDD12 BA1 RAS# VDD14 S0# ODT0 VDD16 ODT1 NC2 VDD18 VREF_CA VSS28 DQ36 DQ37 VSS30 DM4 VSS31 DQ38 DQ39 VSS33 DQ44 DQ45 VSS35 DQS#5 DQS5 VSS38 DQ46 DQ47 VSS40 DQ52 DQ53 VSS42 DM6 VSS43 DQ54 DQ55 VSS45 DQ60 DQ61 VSS47 DQS#7 DQS7 VSS50 DQ62 DQ63 VSS52 EVENT# SDA SCL VTT2 2008/09/15 Deciphered Date 2009/12/31 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 2 http://laptop-motherboard-schematic.blogspot.com/ 3 4 Title Compal Electronics, Inc. DDRIII-SODIMM SLOT2 Size Document Number R ev 0.3 LA-4902P Date: W ednesday, December 09, 2009 5 Sheet 10 of 47 1 2 3 4 5 A A 3VS_1.5VS +3VS_CK505 CLK_BUF_DOT96 CLK_BUF_DOT96# 13 CLK_BUF_DOT96 13 CLK_BUF_DOT96# R93 R95 CLK_BUF_CKSSCD R98 CLK_BUF_CKSSCD# R99 13 CLK_BUF_CKSSCD 13 CLK_BUF_CKSSCD# CLK_DMI CLK_DMI# 13 CLK_DMI 13 CLK_DMI# 2 0_0402_5% 2 0_0402_5% 1 1 +1.05VS_CK505 U2 1 2 3 4 5 6 7 8 L_CLK_BUF_DOT96 L_CLK_BUF_DOT96# 1 1 2 0_0402_5% 2 0_0402_5% L_CLK_BUF_CKSSCD L_CLK_BUF_CKSSCD# R100 1 R102 1 2 0_0402_5% 2 0_0402_5% L_CLK_DMI L_CLK_DMI# VDD_DOT VSS_DOT DOT_96 DOT_96# VDD_27 27MHZ 27MHZ_SS VSS_27 9 10 11 12 13 14 15 16 CPU_STOP# +3VS_CK505 +1.05VS_CK505 SCL SDA REF_0/CPU_SEL VDD_REF XTAL_IN XTAL_OUT VSS_REF CKPWRGD/PD# 32 31 30 29 28 27 26 25 VDD_CPU CPU_0T CPU_0C VSS_CPU CPU_1T CPU_1C VDD_CPU_IO VDD_SRC 24 23 22 21 20 19 18 17 TGND 33 VSS_SRC SRC_1T SRC_1C VSS_SRC SRC_2T SRC_2C VDD_SRC_IO CPU_STOP# B SMB_CLK_S3 SMB_DATA_S3 REF_0/CPU_SEL R94 1 CLK_XTAL_IN CLK_XTAL_OUT 2 33_0402_5% SMB_CLK_S3 4,9,10,13,26 SMB_DATA_S3 4,9,10,13,26 CLK_14M_PCH 13 CLK_14M_PCH 1 CK_PW RGD 2 R_CLK_BUF_BCLK R_CLK_BUF_BCLK# R101 1 R103 1 C885 @ 10P_0402_50V8J 2 0_0402_5% 2 0_0402_5% CLK_BUF_BCLK CLK_BUF_BCLK# CLK_BUF_BCLK 13 CLK_BUF_BCLK# 13 B RTM890N-632-GRT_QFN32_5X5 CLK Gen feature 1.5V support 6/29 +1.05VS_CK505 Close to U2 Close to U2 CPU_STOP# R126 1 2 10K_0402_5% 2 1 2 1 2 C167 33P_0402_50V8J CK_PW RGD 1 R97 2 10K_0402_5% CLK_XTAL_IN Q4 2 G Y1 2 +3VS_CK505 D S SSM3K7002F_SC59-3 1 CLK_EN# 41 2 2 1 1 1 2 C168 33P_0402_50V8J C1049 0.1U_0402_16V4Z 2 1 C177 47P_0402_50V8J 2 1 C176 0.1U_0402_16V4Z 2 1 C175 0.1U_0402_16V4Z 2 1 C174 0.1U_0402_16V4Z 2 1 C173 0.1U_0402_16V4Z 2 1 2 0_0603_5% 3VS_1.5VS 2 0_0603_5% C183 47P_0402_50V8J 2 1 C182 0.1U_0402_16V4Z 2 1 C181 0.1U_0402_16V4Z 2 1 C180 0.1U_0402_16V4Z 1 C179 10U_0805_10V4Z 2 C C178 10U_0805_10V4Z 1 1 R108 C172 0.1U_0402_16V4Z 2 0_0603_5% C171 10U_0805_10V4Z 1 R127 1 R1130 CLK_XTAL_OUT 1 +1.05VS @ +3VS_CK505 +3VS 14.31818MHZ_20P_1BX14318BE1A +3VS_CK505 +1.5VS 2 0_0603_5% 3 +3VS 1 R1129 C Close to U2 within 500mil 09/2/5 HP @ C184 1 +1.05VS PIN 30 CPU_0 CPU_1 1 R141 0 (Default) 133MHz 100MHz 2 REF_0/CPU_SEL 10P_0402_50V8J EMI Capacitor 133MHz 1 R143 1 @ 2 10K_0402_5% REF_0/CPU_SEL 2 10K_0402_5% 100MHz D D Compal Secret Data Security Classification Issued Date 2008/09/15 Deciphered Date 2009/12/31 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 1 2 http://laptop-motherboard-schematic.blogspot.com/ 3 4 Title Compal Electronics, Inc. CLOCK GENERATOR Size Document Number R ev 0.3 LA-4902P Date: W ednesday, December 09, 2009 5 Sheet 11 of 47 1 2 3 +RTCVCC PCH_RTCX1 SM_INTRUDER# 1 2 1M_0402_5% PCH_INTVRMEN 1 2 R161 330K_0402_5% High = Internal VR Enabled(Default) 1 R160 R162 2 R159 PCH_RTCX2 LOW=Default SI1 NO41 09/4/27 HP 2 R165 R166 R167 R168 HDA_BIT_CLK_MDC HDA_BIT_CLK_CODEC HDA_SYNC_MDC HDA_SYNC_CODEC HDA_SPKR 1 1 1 1 2 2 2 2 33_0402_5% 33_0402_5% 33_0402_5% 33_0402_5% D17 SM_INTRUDER# A16 INTRUDER# PCH_INTVRMEN A14 INTVRMEN HDA_BIT_CLK A30 HDA_BCLK HDA_S YNC D29 HDA_SPKR P1 HDA_RST# C30 HDA_RST# 25 HDA_SDIN0 HDA_SDIN0 G30 HDA_SDIN0 25 HDA_SDIN1 HDA_SDIN1 R169 1 R170 1 2 33_0402_5% 2 33_0402_5% @ B +3VS 1 R173 LID_SW# 2 10K_0402_5% 1 R1999 GPIO13 2 10K_0402_5% 1 R181 @ R171 1 R172 1 25 HDA_SDOUT_MDC 25 HDA_SDOUT_CODEC AQUAWHITE_BATLED iTPM ENABLE/DISABLE Enable=Stuff SRTCRST# 2 33_0402_5% 2 33_0402_5% AQUAWHITE_BATLED_R 2 1K_0402_5% GPIO13 1 R847 09/2/5 HP HDA_SDOUT F30 HDA_SDIN1 E32 HDA_SDIN2 F32 HDA_SDIN3 B29 HDA_SDO H32 HDA_DOCK_EN# / GPIO33 J30 HDA_DOCK_RST# / GPIO13 PCH_JTAG_TCK M3 JTAG_TCK PCH_JTAG_TMS K3 JTAG_TMS PCH_JTAG_TDI K1 JTAG_TDI PCH_JTAG_TDO J2 JTAG_TDO PCH_JTAG_RST# J4 JTAG_RST# R939 1 1 R176 1 R180 29 KBC_SPI_CS1#_R 2 15_0402_5% 2 0_0402_5% 2 0_0402_5% AB9 2 SATA0RXN SATA0RXP SATA0TXN SATA0TXP AK7 AK6 AK11 AK9 SATA_PRX_DTX_N0 SATA_PRX_DTX_P0 SATA_PTX_DRX_N0 SATA_PTX_DRX_P0 1 SATA1RXN SATA1RXP SATA1TXN SATA1TXP AH6 AH5 AH9 AH8 SATA_PRX_DTX_N1 SATA_PRX_DTX_P1 SATA_PTX_DRX_N1 SATA_PTX_DRX_P1 SATA2RXN SATA2RXP SATA2TXN SATA2TXP AF11 AF9 AF7 AF6 SATA_PRX_DTX_N2 SATA_PRX_DTX_P2 SATA_PTX_DRX_N2 SATA_PTX_DRX_P2 SATA3RXN SATA3RXP SATA3TXN SATA3TXP AH3 AH1 AF3 AF1 SATA4RXN SATA4RXP SATA4TXN SATA4TXP AD9 AD8 AD6 AD5 SATA_PRX_DTX_N4 SATA_PRX_DTX_P4 SATA_PTX_DRX_N4 SATA_PTX_DRX_P4 SATA5RXN SATA5RXP SATA5TXN SATA5TXP AD3 AD1 AB3 AB1 SATA_PRX_DTX_N5 SATA_PRX_DTX_P5 SATA_PTX_DRX_N5 SATA_PTX_DRX_P5 23 23 23 23 SATA_PRX_DTX_N1 SATA_PRX_DTX_P1 SATA_PTX_DRX_N1 SATA_PTX_DRX_P1 23 23 23 23 2 W=20mils 1K_0402_5% C211 1U_0603_10V4Z SI1 NO60 09/5/4 HP SATA_PRX_DTX_N0 SATA_PRX_DTX_P0 SATA_PTX_DRX_N0 SATA_PTX_DRX_P0 1 W=20mils BAV70W_SOT323-3 NAND_DET# 24 27,29,30,31 A R193 3 W=20mils SI1 NO2 09/3/9 HP LPC_LDRQ#0 30 SIRQ CONN@ JBAT1 ACES_85205-0200 BATT1.1 D1 1 LPC_LFRAME# 23,29,30,31 SIRQ +VREG3_51125 23,29,30,31 23,29,30,31 23,29,30,31 23,29,30,31 1 2 SERIRQ LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3 2 SATA_PRX_DTX_N2 SATA_PRX_DTX_P2 SATA_PTX_DRX_N2 SATA_PTX_DRX_P2 28 28 28 28 SATA_PRX_DTX_N4 SATA_PRX_DTX_P4 SATA_PTX_DRX_N4 SATA_PTX_DRX_P4 26 26 26 26 SATA_PRX_DTX_N5 SATA_PRX_DTX_P5 SATA_PTX_DRX_N5 SATA_PTX_DRX_P5 28 28 28 28 Place near IBEX-M B 09/2/5 HP SATAICOMPO AF16 SATAICOMPI AF15 +3VS SATAICOMPI 1 R175 2 37.4_0402_1% +1.05VS 2 09/2/5 HP 29 KBC_SPI_CS0#_R LDRQ0# LDRQ1# / GPIO23 A34 F34 SPKR Disable=No Stuff 29 KBC_SPI_CLK_R FWH4 / LFRAME# C34 HDA_SYNC KBC_SPI_SI_R 2 1K_0402_5% for SMSC EC LPC 1 25 HDA_RST#_MDC 25 HDA_RST#_CODEC +3VALW RTCRST# D33 B33 C32 A32 SPI_CLK_PCH BA2 SPI_CLK SPI_CS0#_PCH AV3 SPI_CS0# SPI_CS1#_PCH AY3 SPI_CS1# SATALED# T3 SPI_MOSI_PCH AY1 SPI_MOSI SATA0GP / GPIO21 Y9 SATA_DET#0 AV1 SPI_MISO SATA1GP / GPIO19 V1 HDD_HALTLED_R 1 R177 2 10K_0402_1% 2 25 25 25 25 25 RTC Conn. HIGH=No Reboot FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3 SATA 2 HDA_BIT_CLK_MDC C833 47P_0402_50V8J 1 @ 2 HDA_BIT_CLK_CODEC C834 47P_0402_50V8J 1 @ 2 HDA_SDOUT_MDC C835 47P_0402_50V8J 1 2 HDA_SDOUT_CODEC C836 47P_0402_50V8J C14 PCH_SRTCRST# C192 1U_0603_10V4Z 1 PCH_RTCRST# RTC 2 RTCX1 RTCX2 IHDA 2 20K_0402_1% 1 2 R164 20K_0402_1% B13 D13 CLRP1 SHORT PADS 2 1 PCH_RTCX1 PCH_RTCX2 JTAG 1 C191 C190 18P_0402_50V8J SIRQ HDA_SPKR +RTCVCC 1 +RTCVCC 1 2 10K_0402_5% 10K_0402_5% 1 U4A R163 2 4 OSC OSC 2 Y3 NC 2 NC C189 3 1 32.768KHZ_12.5PF_Q13MC14610002 18P_0402_50V8J 1 1U_0603_10V4Z A @ R178 10K_0402_5% @ +3VS SATA_LED# 25,28 R179 10K_0402_5% 1 2 10M_0402_5% 5 1 1 R158 4 +3VS notice KBC state 29 2 15_0402_5% KBC_SPI_SO SPI HDD_HALTLED R940 1 29 KBC_SPI_SI_R SATA_DET#0 R1071 2 1 0_0402_5% HDD_HALTLED 25 SI1 NO22 IBEXPEAK-M_FCBGA1071 SI2 NO7 PCH XDP Conn. C C +1.05VS JP15 1 2 @ 2 51_0402_5% 1 @ 2 51_0402_5% PCH_JTAG_TDI 1 @ 2 51_0402_5% 1 @ 2 51_0402_5% R1069 PCH_JTAG_RST# +3VS 2 R192 10K_0402_5% @ R964 R965 330K_0402_5% @ @ 1 1 1 R191 100_0402_1% 2 @ 1 PCH_JTAG_TMS R1068 1 PCH_JTAG_TDI PCH_JTAG_TDO R1067 PCH_JTAG_RST# R1070 R186 20K_0402_5% @ 2 R190 100_0402_1% +3VALW R185 200_0402_5% 2 @ 2 R189 100_0402_1% @ 2 2 PCH_JTAG_TDO 1 09/2/5 HP R184 200_0402_5% 1 PCH_JTAG_TMS 2 @ @ +3VALW 1 R183 200_0402_5% 1 2 @ 1 1 +3VALW PCH_JTAG_TCK 2 51_0402_5% 25,29 PCH Pin D PCH_JTAG_TDO PCH_JTAG_TMS PCH_JTAG_TDI PCH_JTAG_TCK PCH_JTAG_RST# RefDes R184 R190 R1067 R183 R189 R1068 R185 R191 R1069 R194 R186 R192 R1070 PCH JTAG Pre-Production ES2 ES1 No Install 200ohm No Install 100ohm No Install No Install 200ohm 200ohm 100ohm 100ohm No Install No Install 200ohm 200ohm 100ohm 100ohm No Install No Install 51ohm 51ohm 20Kohm 20Kohm 10Kohm 10Kohm No Install No Install 1 AQUAWHITE_BATLED# 15 USB_OC#0 15 USB_OC#1 @ 33_0402_5% 1 @ 33_0402_5% 1 2 R850 2 R852 XDP_FN0 XDP_FN1 15 USB_OC#2 15 USB_OC#3 @ 33_0402_5% 1 @ 33_0402_5% 1 2 R854 2 R856 XDP_FN2 XDP_FN3 15 USB_OC#4 15 USB_OC#5 @ 33_0402_5% 1 @ 33_0402_5% 1 2 R1072 XDP_FN4 2 R860 XDP_FN5 @ 33_0402_5% 1 @ 33_0402_5% 1 2 R862 2 R864 DB1 NO 77 15 USB_OC#6 15 USB_OC#7 AQUAWHITE_BATLED 29,32 PW R_GD 4,14 PM_PWRBTN#_R +3VS D Q66 SSM3K7002F_SC59-3 2 G 3 1 R194 10K_0402_5% SI1 NO7 09/3/9 HP +3VALW Hi R8660_0402_5% 09/2/5 HP 2 R871PCH_JTAG_TCK_R Disable 2 http://laptop-motherboard-schematic.blogspot.com/ GND1 OBSFN_C0 OBSFN_C1 GND3 OBSDATA_C0 OBSDATA_C1 GND5 OBSDATA_C2 OBSDATA_C3 GND7 OBSFN_D0 OBSFN_D1 GND9 OBSDATA_D0 OBSDATA_D1 GND11 OBSDATA_D2 OBSDATA_D3 GND13 ITPCLK/HOOK4 ITPCLK#/HOOK5 VCC_OBS_CD RESET#/HOOK6 DBR#/HOOK7 GND15 TD0 TRST# TDI TMS GND17 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 GPIO_28 R8482 R8492 1 33_0402_5% @ 1 33_0402_5% @ XDP_FN8 XDP_FN9 R8512 R8532 1 33_0402_5% @ 1 33_0402_5% @ XDP_FN10 XDP_FN11 R8552 R8572 1 33_0402_5% @ 1 33_0402_5% @ XDP_FN12 XDP_FN13 R8592 R8612 1 33_0402_5% @ 1 33_0402_5% @ XDP_FN14 XDP_FN15 R8632 R8652 1 33_0402_5% @ 1 33_0402_5% @ 2008/09/15 Deciphered Date 4 PCH_XDP_GPIO28 15 PCH_XDP_GPIO0 GPIO_0 15 PCH_XDP_GPIO20 13 PCH_XDP_GPIO18 13 SATA_DET#0 HDD_HALTLED_R 09/2/16 HP PCH_XDP_GPIO36 15 PCH_XDP_GPIO37 15,20GPIO_36 PCH_XDP_GPIO16 15 PCH_XDP_GPIO49 15 GPIO_37 GPIO_16 GPIO_49 +3VS 1K_0402_5% R8671 2 PLT_RST# 4,15,21,23,25,31 XDP_DBRESET# 4,14 PCH_JTAG_TDO#_RR8682 PCH_JTAG_RST#_RR8692 PCH_JTAG_TDI_R R8702 PCH_JTAG_TMS_R R8722 @ 1 1 1 1 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% PCH_JTAG_TDO PCH_JTAG_RST# PCH_JTAG_TDI PCH_JTAG_TMS D SI1 NO22 CONN@ 2009/12/31 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 3 XDP_FN16 XDP_FN17 Compal Secret Data Security Classification Default GND0 OBSFN_A0 OBSFN_A1 GND2 OBSDATA_A0 OBSDATA_A1 GND4 OBSDATA_A2 OBSDATA_A3 GND6 OBSFN_B0 OBSFN_B1 GND8 OBSDATA_B0 OBSDATA_B1 GND10 OBSDATA_B2 OBSDATA_B3 GND12 PWRGOOD/HOOK0 HOOK1 VCC_OBS_AB HOOK2 HOOK3 GND14 SDA SCL TCK1 TCK0 GND16 SAMTE_BSH-030-01-L-D-A SI1 NO22 iAMT Enable /Disable Enable T122 T123 1 Issued Date Lo 1 TPC12 TPC12 PCH_JTAG_TCK 0_0402_5% GPIO33 PW R_GD 2XDP_PWRBTN#_R S PCH JTAG Production No Install No Install 51ohm No Install No Install 51ohm No Install No Install 51ohm 51ohm No Install No Install 51ohm XDP_FN6 XDP_FN7 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 Title Compal Electronics, Inc. IBEX-M(1/6)-HDA/JTAG/SATA Size Document Number Custom LA-4902P Date: R ev 0.3 W ednesday, December 09, 2009 5 Sheet 12 of 47 1 2 3 4 SMB_CLK_S3 SMB_DATA_S3 5 1 R195 1 R197 2 10K_0402_5% 2 10K_0402_5% SMBCLK +3VS 1 R196 1 R198 1 R200 1 R202 1 R203 1 R205 1 R206 1 R935 1 R936 SMBDATA SML0CLK SML0DATA 8/31/2009 HP SML1CLK PEG_CLKREQ# U4B 1 R204 SML1DATA 2 10K_0402_5% SML0ALERT# PCIE_PRX_DTX_N6 PCIE_PRX_DTX_P6 PCIE_PTX_C_DRX_N6 PCIE_PTX_C_DRX_P6 2 2 C218 1 C219 1 2 2 PCIE_PRX_DTX_N4 BA32 PCIE_PRX_DTX_P4 BB32 0.1U_0402_10V7K PCIE_PTX_DRX_N4 BD32 0.1U_0402_10V7K PCIE_PTX_DRX_P4 BE32 PERN4 PERP4 PETN4 PETP4 BF33 BH33 BG32 BJ32 PERN5 PERP5 PETN5 PETP5 PCIE_PRX_DTX_N6 BA34 PCIE_PRX_DTX_P6 AW34 0.1U_0402_10V7K PCIE_PTX_DRX_N6 BC34 0.1U_0402_10V7K PCIE_PTX_DRX_P6 BD34 PERN6 PERP6 PETN6 PETP6 B +3VALW R875 1 2 10K_0402_5% 12 PCH_XDP_GPIO18 +3VS PERN7 PERP7 PETN7 PETP7 BG34 BJ34 BG36 BJ36 PERN8 PERP8 PETN8 PETP8 AK48 AK47 CLKOUT_PCIE0N CLKOUT_PCIE0P P9 AM43 AM45 21 CLK_PCIE_LAN_REQ1# SI, No61 09/5/4 HP AT34 AU34 AU36 AV36 R207 1 2 10K_0402_5% R1119 1 2 0_0402_5% U4 PCIECLKRQ0# / GPIO73 CLKOUT_PCIE1N CLKOUT_PCIE1P PCIECLKRQ1# / GPIO18 09/3/9 HP SI1 NO5 EXP R208 1 R209 1 25 CLK_PCIE_EXP# 25 CLK_PCIE_EXP 2 0_0402_5% 2 0_0402_5% CLK_PCIE_EXP#_R CLK_PCIE_EXP_R AM47 AM48 N4 12 PCH_XDP_GPIO20 +3VS 25 CLKREQ_EXP# +3VALW R941 1 2 10K_0402_5% R972 1 2 0_0402_5% R942 1 2 10K_0402_5% AH42 AH41 A8 CLKOUT_PCIE2N CLKOUT_PCIE2P C8 SMBDATA SMBALERT# J14 SML0ALERT# C6 SML0CLK SML0DATA G8 SML0DATA SML1ALERT# / GPIO74 M14 SML1ALERT# SML1CLK / GPIO58 E10 SML1CLK SML1DATA / GPIO75 G12 DDR SML0CLK 21 SML1ALERT# SMBCLK 6 Q5A 2N7002DWH_SOT363-6 SMB_CLK_S3 1 SMBDATA 3 Q5B 2N7002DWH_SOT363-6 SMB_DATA_S3 4 SMB_CLK_S3 4,9,10,11,26 intel LAN SML0DATA 21 EC_THERMAL SML1DATA SMB_DATA_S3 4,9,10,11,26 +3VS CL_CLK1 T13 CL_CLK1 23 CL_DATA1 T11 CL_DATA1 23 CL_RST1# T9 CL_RST1# 23 PEG_A_CLKRQ# / GPIO47 H1 CLKOUT_PEG_A_N CLKOUT_PEG_A_P PCIECLKRQ3# / GPIO25 SML1DATA 4 CAP_CLK 25,29 3 09/3/9 HP SI1 NO5 CLK_EXP#_R CLK_EXP_R R41 R59 1 1 2 0_0402_5% 2 0_0402_5% CLK_EXP# 4 CLK_EXP 4 CLKOUT_DP_N / CLKOUT_BCLK1_N CLKOUT_DP_P / CLKOUT_BCLK1_P AT1 AT3 CLK_DP#_R CLK_DP_R R11 R13 1 1 2 0_0402_5% 2 0_0402_5% CLK_DP# 4 CLK_DP 4 AW24 BA24 CLK_DMI# 11 CLK_DMI 11 CLKIN_BCLK_N CLKIN_BCLK_P AP3 AP1 CLK_BUF_BCLK# 11 CLK_BUF_BCLK 11 CLKIN_DOT_96N CLKIN_DOT_96P F18 E18 CLK_BUF_DOT96# 11 CLK_BUF_DOT96 11 AH13 AH12 CLK_BUF_CKSSCD# 11 CLK_BUF_CKSSCD 11 REFCLK14IN P41 CLK_14M_PCH 11 CLKIN_PCILOOPBACK J42 CLKOUT_PCIE3N CLKOUT_PCIE3P 6 Q77B 2N7002DWH_SOT363-6 AD43 AD45 AN4 AN2 CLKIN_DMI_N CLKIN_DMI_P 1 PEG_CLKREQ# CLKOUT_DMI_N CLKOUT_DMI_P CLKIN_SATA_N / CKSSCD_N CLKIN_SATA_P / CKSSCD_P PCIECLKRQ2# / GPIO20 Q77A 2N7002DWH_SOT363-6 SML1CLK CAP_DAT 25,29 WLAN 09/2/16 HP SI1 NO32 09/4/10 HP CLK_PCI_FB 15 This circuit will add/delete CLK_PCIE_MCARD#_R CLK_PCIE_MCARD_R AM51 AM53 M9 23 CLKREQ_WLAN# 2 10K_0402_5% +3VALW R944 1 2 10K_0402_5% AJ50 AJ52 H6 AK53 AK51 NIC +3VALW R1057 1 2 10K_0402_5% P13 CLKOUT_PCIE5N CLKOUT_PCIE5P PCIECLKRQ5# / GPIO44 CLKOUT_PEG_B_N CLKOUT_PEG_B_P PEG_B_CLKRQ# / GPIO56 XCLK_RCOMP AF38 CLKOUTFLEX0 / GPIO64 T45 CLKOUTFLEX1 / GPIO65 P43 CLKOUTFLEX2 / GPIO66 T42 CLKOUTFLEX3 / GPIO67 N50 IBEXPEAK-M_FCBGA1071 XTAL25_IN XTAL25_OUT C XTAL25_OUT R213 1 2 90.9_0402_1% T102 T103 R215 1 2 22_0402_5% SI1 NO88 in INTEL ES2 sample to test. XTAL25_IN +1.05VS 1 TPC12 2 1M_0402_5% Y4 2 25MHZ_20P_1BG25000CK1A TPC12 CLK_14M_SIO 30 1 C887 @ 2 1 R210 1 C222 2 18P_0402_50V8J R943 1 PCIECLKRQ4# / GPIO26 XTAL25_IN XTAL25_OUT AH51 AH53 18P_0402_50V8J +3VALW CLKOUT_PCIE4N CLKOUT_PCIE4P Clock Flex C 2 0_0402_5% 2 0_0402_5% B +3VALW 09/3/9 HP SI1 NO5 R211 1 R212 1 23 CLK_PCIE_MCARD# 23 CLK_PCIE_MCARD A 2 PERN3 PERP3 PETN3 PETP3 SMBCLK SML0CLK SML0ALERT# / GPIO60 SMBus AU30 AT30 AU32 AV32 H14 5 C214 1 C215 1 PERN2 PERP2 PETN2 PETP2 SMBALERT# 2 PCIE_PRX_DTX_N4 PCIE_PRX_DTX_P4 PCIE_PTX_C_DRX_N4 PCIE_PTX_C_DRX_P4 2 2 Link 21 21 21 21 C212 1 C213 1 SMBDATA B9 +3VALW 5 NIC 23 23 23 23 PCIE_PRX_DTX_N2 PCIE_PRX_DTX_P2 PCIE_PTX_C_DRX_N2 PCIE_PTX_C_DRX_P2 SMBCLK Controller WLAN 25 25 25 25 SMBALERT# / GPIO11 PEG EXP PCIE_PRX_DTX_N2 AW30 PCIE_PRX_DTX_P2 BA30 0.1U_0402_10V7K PCIE_PTX_DRX_N2 BC30 0.1U_0402_10V7K PCIE_PTX_DRX_P2 BD30 PERN1 PERP1 PETN1 PETP1 PCI-E* A From CLK BUFFER BG30 BJ30 BF29 BH29 2 2.2K_0402_5% 2 2.2K_0402_5% 2 2.2K_0402_5% 2 2.2K_0402_5% 2 4.7K_0402_5% 2 4.7K_0402_5% 2 10K_0402_5% 2 10K_0402_5% 2 10K_0402_5% 1 C1034 2 10P_0402_50V8J D D Compal Secret Data Security Classification Issued Date 2008/09/15 Deciphered Date 2009/12/31 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 1 2 http://laptop-motherboard-schematic.blogspot.com/ 3 4 Title Compal Electronics, Inc. IBEX-M(2/6)-PCI-E/SMBUS/CLK Size Document Number Custom LA-4902P Date: R ev 0.3 W ednesday, December 09, 2009 5 Sheet 13 of 47 5 4 3 2 5 5 5 5 DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3 DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI_CTX_PRX_P2 DMI_CTX_PRX_P3 BD24 BG22 BA20 BG20 DMI0RXP DMI1RXP DMI2RXP DMI3RXP 5 5 5 5 DMI_CRX_PTX_N0 DMI_CRX_PTX_N1 DMI_CRX_PTX_N2 DMI_CRX_PTX_N3 DMI_CRX_PTX_N0 DMI_CRX_PTX_N1 DMI_CRX_PTX_N2 DMI_CRX_PTX_N3 BE22 BF21 BD20 BE18 DMI0TXN DMI1TXN DMI2TXN DMI3TXN 5 5 5 5 DMI_CRX_PTX_P0 DMI_CRX_PTX_P1 DMI_CRX_PTX_P2 DMI_CRX_PTX_P3 DMI_CRX_PTX_P0 DMI_CRX_PTX_P1 DMI_CRX_PTX_P2 DMI_CRX_PTX_P3 BD22 BH21 BC20 BD18 DMI0TXP DMI1TXP DMI2TXP DMI3TXP BH25 DMI_ZCOMP BF25 DMI_IRCOMP 1 R222 1 R223 4,12 XDP_DBRESET# 2 SYS_RST# 0_0402_5% VGATE 41 VGATE 29 DMI_IRCOMP 2 49.9_0402_1% M6 1 R1124 2 1K_0402_5% PGD_IN T6 B17 09/5/18 HP SI, No82 32 M_PWROK C 4 PM_DRAM_PWRGD 37 RPGOOD 29 PM_RSMRST# +3VALW 29 SUS_PW R_ACK 4,12 PM_PWRBTN#_R 25,28,29 PWRBTN_OUT# PWROK 2 0_0402_5% K5 MEPWROK 1 R226 2 AUXPWROK A10 0_0402_5% LAN_RST# PM_DRAM_PWRGD D9 DRAMPWROK 09/2/5 HP 1 R229 2 0_0402_5% 2 C16 10K_0402_5% 2 10K_0402_5% M1 2 0_0402_5% 29 AC_PRESENT FDI BA18 BH17 BD16 BJ16 BA16 BE14 BA14 BC12 FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6 FDI_RXP7 BB18 BF17 BC16 BG16 AW16 BD14 BB14 BD12 FDI_CTX_PRX_P0 FDI_CTX_PRX_P1 FDI_CTX_PRX_P2 FDI_CTX_PRX_P3 FDI_CTX_PRX_P4 FDI_CTX_PRX_P5 FDI_CTX_PRX_P6 FDI_CTX_PRX_P7 FDI_INT BJ14 FDI_INT FDI_FSYNC0 BF13 FDI_FSY NC0 FDI_FSYNC1 BH13 FDI_FSY NC1 FDI_LSYNC0 BJ12 FDI_ LSYNC0 FDI_LSYNC1 BG14 FDI_ LSYNC1 WAKE# SYS_PWROK RSMRST# SUS_PWR_ACK / GPIO30 P5 PWRBTN# P7 ACPRESENT / GPIO31 FDI_CTX_PRX_N0 FDI_CTX_PRX_N1 FDI_CTX_PRX_N2 FDI_CTX_PRX_N3 FDI_CTX_PRX_N4 FDI_CTX_PRX_N5 FDI_CTX_PRX_N6 FDI_CTX_PRX_N7 FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7 SYS_RESET# 1 R225 R227 1 1 R228 R958 1 DMI +1.05VS DMI0RXN DMI1RXN DMI2RXN DMI3RXN CLKRUN# / GPIO32 J12 Y1 PCIE_WAKE# PM_CLKRUN# FDI_CTX_PRX_N0 FDI_CTX_PRX_N1 FDI_CTX_PRX_N2 FDI_CTX_PRX_N3 FDI_CTX_PRX_N4 FDI_CTX_PRX_N5 FDI_CTX_PRX_N6 FDI_CTX_PRX_N7 FDI_CTX_PRX_P0 FDI_CTX_PRX_P1 FDI_CTX_PRX_P2 FDI_CTX_PRX_P3 FDI_CTX_PRX_P4 FDI_CTX_PRX_P5 FDI_CTX_PRX_P6 FDI_CTX_PRX_P7 5 5 5 5 5 5 5 5 20 20 ENABLT ENAVDD 20 INV_PWM DB2: No. 66 P8 SUSCLK / GPIO62 F3 SLP_S5# / GPIO63 E4 Y48 L_BKLTCTL AB48 Y45 L_DDC_CLK L_DDC_DATA 09/3/9 HP T125 T126 PAD PAD AB46 V48 L_CTRL_CLK L_CTRL_DATA T127 T97 PAD PAD AP39 AP41 LVD_IBG LVD_VBG AT43 AT42 LVD_VREFH LVD_VREFL AV53 AV51 LVDSA_CLK# LVDSA_CLK BB47 BA52 AY48 AV47 LVDSA_DATA#0 LVDSA_DATA#1 LVDSA_DATA#2 LVDSA_DATA#3 BB48 BA50 AY49 AV48 LVDSA_DATA0 LVDSA_DATA1 LVDSA_DATA2 LVDSA_DATA3 AP48 AP47 LVDSB_CLK# LVDSB_CLK AY53 AT49 AU52 AT53 LVDSB_DATA#0 LVDSB_DATA#1 LVDSB_DATA#2 LVDSB_DATA#3 AY51 AT48 AU50 AT51 LVDSB_DATA0 LVDSB_DATA1 LVDSB_DATA2 LVDSB_DATA3 AA52 AB53 AD53 CRT_BLUE CRT_GREEN CRT_RED SI1 NO33 FDI_INT 5 09/3/9 HP FDI_FSYNC1 5 FDI_LSYNC0 5 FDI_LSYNC1 5 PCIE_WAKE# 23,25 PM_CLKRUN# 27,29,30,31 8/31 HP SUS_STAT# / GPIO61 L_BKLTEN L_VDD_EN SI1 NO6 5 5 5 5 5 5 5 5 FDI_FSYNC0 5 T48 T47 DAC_BLU DAC_GRN DAC_RED T26 TPC12 BJ46 BG46 SDVO_STALLN SDVO_STALLP BJ48 BG48 SDVO_INTN SDVO_INTP BF45 BH45 SDVO_CTRLCLK SDVO_CTRLDATA H7 SLP_S4# 33,40 SLP_S3# P12 SLP_S3# 25,29,32,33,35,38,39 SLP_M# K8 PM_SLP_M# 29,32,33 TP23 N2 D DDPC_CTRLCLK DDPC_CTRLDATA Y49 AB49 R1017 R1018 DDPC_AUXN DDPC_AUXP DDPC_HPD BE44 BD44 AV40 DPC_AUX# DPC_AUX D PC_R DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P BE40 BD40 BF41 BH41 BD38 BC38 BB36 BA36 DPC_TXN0 DPC_TXP0 DPC_TXN1 DPC_TXP1 DPC_TXN2 DPC_TXP2 DPC_TXN3 DPC_TXP3 DPB_AUX# 28 DPB_AUX 28 DPB_HPD 28 DPB_TXN0 DPB_TXP0 DPB_TXN1 DPB_TXP1 DPB_TXN2 DPB_TXP2 DPB_TXN3 DPB_TXP3 DPC_CTRLCLK 28 +3VS 28 28 28 28 28 28 28 28 2.2K_0402_5% 2.2K_0402_5% DPC_CTRLDATA 28 DPC_AUX# 28 DPC_AUX 28 DPC_HPD 28 DPC_TXN0 DPC_TXP0 DPC_TXN1 DPC_TXP1 DPC_TXN2 DPC_TXP2 DPC_TXN3 DPC_TXP3 DPD_CTRLCLK 19 +3VS R1019 R1020 U50 U52 28 28 28 28 28 28 28 28 C 2.2K_0402_5% 2.2K_0402_5% DPD_CTRLDATA 19 V51 V53 CRT_DDC_CLK CRT_DDC_DATA 18 CRT_HSYNC 18 CRT_VSYNC Y53 Y51 CRT_HSYNC CRT_VSYNC DAC_IREF CRT_IRTN R819 2.2K_0402_5% DPB_CTRLCLK 28 DPB_CTRLDATA 28 BD42 BC42 BJ42 BG42 BB40 BA40 AW38 BA38 DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P R818 T51 T53 DPB_TXN0 DPB_TXP0 DPB_TXN1 DPB_TXP1 DPB_TXN2 DPB_TXP2 DPB_TXN3 DPB_TXP3 DDPD_CTRLCLK DDPD_CTRLDATA 18 CRT_DDC_CLK 18 CRT_DDC_DATA AD48 AB51 2.2K_0402_5% DPB_AUX# DPB_AUX DPB_R SLP_S5# 28 SLP_S4# +3VS BG44 BJ44 AU38 DDPB_AUXN DDPB_AUXP DDPB_HPD T130TPC12 SUS_CLK SDVO_TVCLKINN SDVO_TVCLKINP LVDS DMI_CTX_PRX_N0 BC24 DMI_CTX_PRX_N1 BJ22 DMI_CTX_PRX_N2 AW20 DMI_CTX_PRX_N3 BJ20 DDPD_AUXN DDPD_AUXP DDPD_HPD BC46 BD46 AT38 DPD_C_AUX# DPD_C_AUX DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P BJ40 BG40 BJ38 BG38 BF37 BH37 BE36 BD36 DPD_C_TXN0 DPD_C_TXP0 DPD_C_TXN1 DPD_C_TXP1 DPD_C_TXN2 DPD_C_TXP2 DPD_C_TXN3 DPD_C_TXP3 CRT DMI_CTX_PRX_N0 DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 DMI_CTX_PRX_N3 System Power Management D U4D 5 5 5 5 Digital Display Interface U4C 1 R230 C920 1 C921 1 2 2 0.1U_0402_10V7K 0.1U_0402_10V7K C922 C923 C924 C925 C926 C927 C928 C929 2 2 2 2 2 2 2 2 0.1U_0402_10V7K 0.1U_0402_10V7K 0.1U_0402_10V7K 0.1U_0402_10V7K 0.1U_0402_10V7K 0.1U_0402_10V7K 0.1U_0402_10V7K 0.1U_0402_10V7K 1 1 1 1 1 1 1 1 DPD_AUX# 19 DPD_AUX 19 DPD_HPD 19 D PD_R DPD_TXN0 DPD_TXP0 DPD_TXN1 DPD_TXP1 DPD_TXN2 DPD_TXP2 DPD_TXN3 DPD_TXP3 19 19 19 19 19 19 19 19 IBEXPEAK-M_FCBGA1071 LOW_BAT_R IBEX_R# A6 F14 BATLOW# / GPIO72 PMSYNCH BJ10 RI# SLP_LAN# F6 1K_0402_0.5% H_PM_SYNC 4 PM_SLP_LAN# PM_SLP_LAN# 29,33,40 IBEXPEAK-M_FCBGA1071 DPB_R 1 R822 1 R823 1 R824 D PC_R D PD_R +3VS PM_CLKRUN# B VGATE 1 R224 2 10K_0402_5% 2 100K_0402_5% 2 100K_0402_5% 2 100K_0402_5% 1 1 R232 2 10K_0402_5% 2 C1050 0.1U_0402_16V4Z B SI, No58 09/5/4 HP +3VALW L7,L9,L11 are 39uH DAC_GRN DAC_BLU 1 2 2 @ 2 @ 1 2 C282 10P_0402_50V8J @ 1 C281 10P_0402_50V8J 1 C280 10P_0402_50V8J @ 150_0402_1% PV R303 @ 150_0402_1% R302 @ 150_0402_1% R301 09/5/18 HP SI, No82 1 2 DAC_RED_R DAC_GRN_R DAC_BLU_R 1 2 1 2 L8 0805CS-680XJLC_0805 1 2 L10 0805CS-680XJLC_0805 1 2 L12 0805CS-680XJLC_0805 1 2 RED_R 28 GREEN_R 28 BLUE_R 27P_0402_50V8J C285 DAC_RED Place cloce to U5 L7 0805CS-680XJLC_0805 1 2 L9 0805CS-680XJLC_0805 1 2 L11 0805CS-680XJLC_0805 1 2 27P_0402_50V8J C284 AC_PRESENT SLP_S5# L 10/17 HP remove to P14 (close U5 1 2 R876 @ 10K_0402_5% 1 2 R877 @ 10K_0402_5% 1 2 R878 @ 10K_0402_5% 27P_0402_50V8J C283 PCIE_WAKE# SLP_S4# 1 IBEX_R# SLP_S3# 1 PM_SLP_LAN# 1 2 R234 @ 10K_0402_5% 1 2 R235 10K_0402_5% 1 2 R236 10K_0402_5% 1 2 R909 10K_0402_5% 1 2 R238 10K_0402_5% @ 1 2 R237 10K_0402_5% 2 LOW_BAT_R 2 SYS_RST# 28 A A Compal Secret Data Security Classification Issued Date 5 http://laptop-motherboard-schematic.blogspot.com/ 4 2008/09/15 Deciphered Date 2009/12/31 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 3 2 Title Compal Electronics, Inc. IBEX-M(3/6)-DMI/GPIO/LVDS Size Document Number Custom LA-4902P Date: R ev 0.3 W ednesday, December 09, 2009 1 Sheet 14 of 47 5 PCI_GNT0# F48 MODEM_DISABLE# K45 PCI_GNT2# F36 PCI_GNT3# H53 GNT0# GNT1# / GPIO51 GNT2# / GPIO53 GNT3# / GPIO55 B41 K53 A36 A48 K6 27,29,31 PCI_SERR# 27 PCI_PERR# PCI_IRDY# PCI_PAR PCI_DEVSEL# PCI_FRAME# 27 PCI_STOP# 27 PCI_TRDY# B PCI_IR DY# PCI_DEVSEL# PCI_FRAME# A42 H44 F46 C46 IRDY# PAR DEVSEL# FRAME# PCI_LOCK# D49 PLOCK# PCI_STOP# PCI_TRDY# D41 C48 STOP# TRDY# M7 PME# D5 PLTRST# 21,22 LAN_DIS# GPIO15 12 PCH_XDP_GPIO16 20 ALS_EN# NV_WR#0_RE# NV_WR#1_RE# AY8 AY5 12,20 PCH_XDP_GPIO37 USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N USBP9P USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P CLKOUT_PCI0 CLKOUT_PCI1 CLKOUT_PCI2 CLKOUT_PCI3 CLKOUT_PCI4 AV11 BF5 +3VALW B25 USBRBIAS D25 USB20_N0 USB20_P0 USB20_N1 USB20_P1 USB20_N2 USB20_P2 USB20_N3 USB20_P3 USB20_N4 USB20_P4 USB20_N8 USB20_P8 USB20_N9 USB20_P9 USB20_N10 USB20_P10 USB20_N11 USB20_P11 USB20_N12 USB20_P12 USB20_N13 USB20_P13 USB20_N8 26 USB20_P8 26 USB20_N9 24 USB20_P9 24 USB20_N10 31 USB20_P10 31 USB20_N11 28 USB20_P11 28 USB20_N12 20 USB20_P12 20 USB20_N13 28 USB20_P13 28 USBRBIAS 1 R247 T30 TPC12 T31 TPC12 SLOAD / GPIO38 TP3 DOCK_ID1 P3 SDATAOUT0 / GPIO39 TP4 AY45 T32 TPC12 CLK_PCIE_LAN_REQ# H3 PCIECLKRQ6# / GPIO45 TP5 AY46 T33 TPC12 PCIECLKRQ7# / GPIO46 TP6 AV43 T34 TPC12 TPC12 M18 T37 TPC12 TP10 N18 T38 TPC12 TP11 AJ24 T39 TPC12 TP12 AK41 T40 TPC12 TP13 AK42 T41 TP14 M32 T42 TP15 N32 T43 TPC12 SI1 TP16 M30 T44 TPC12 TP17 N30 T45 TPC12 TP18 H12 T46 TPC12 EXPRESS 17 17 PCH_NCTF6 PCH_NCTF7 WWAN Fingerprint DOCK USB Camera DOCK 17 PCH_NCTF19 17 PCH_NCTF26 2 0_0402_5% 2 0_0402_5% 2 0_0402_5% 2 0_0402_5% 2 0_0402_5% 2 0_0402_5% BT_OFF 26 FPR_OFF 31 NPCI_RST# 29,30 ISO_PREP# 28 LED_LINK_LAN#_R 21,22 EXPRESS_CD# 25 PCI_GNT0# SI1 NO45 09/4/27 HP 1 @ 2 1 @ 2 1 @ 2 1 @ 2 2 10K_0402_5% TPC12 SATA_CLKREQ# R255 1 2 10K_0402_5% TPC12 PCH_XDP_GPIO49 R259 1 2 10K_0402_5% R261 1 2 100K_0402_5% ALS_EN# R263 1 2 10K_0402_5% RUNSCI_EC# R266 1 2 10K_0402_5% NO24 W WAN_DET# 09/4/10 HP SI1 NO45 09/4/27 HP MODEM_DISABLE# R254 1 @ 2 1 R843 2 delete R268 TP19 AA23 T47 TPC12 PCH_XDP_GPIO16 R271 1 2 10K_0402_5% AB45 T48 TPC12 DOCK_ID0 R273 1 2 10K_0402_5% NC_2 AB38 T49 TPC12 DOCK_ID1 R275 1 2 10K_0402_5% NC_3 AB42 T50 TPC12 GPIO48 R277 1 2 10K_0402_5% NC_4 AB41 T51 TPC12 STP_PCI# R962 1 2 10K_0402_5% NC_5 T39 T52 TPC12 P6 T53 TPC12 R252 1 2 10K_0402_5% C10 T54 TPC12 W W AN_TRANSMIT_OFF# R257 1 2 10K_0402_5% GPIO24 R260 1 2 10K_0402_5% GPIO15 R262 1 2 1K_0402_5% ISO_PREP# R264 1 2 10K_0402_5% CLK_PCIE_LAN_REQ# R267 1 2 10K_0402_5% USB_OC#0 R270 1 2 10K_0402_5% SI1 NO59 09/5/4 HP USB_OC#2 R1117 1 2 10K_0402_5% USB_OC#4 R959 1 2 10K_0402_5% EXPRESS_CD# R960 1 2 10K_0402_5% PCH_XDP_GPIO28 R1075 1 2 10K_0402_5% LED_LINK_LAN#_R R1083 1 2 10K_0402_5% R961 1 2 10K_0402_5% R844 1 @ 2 0_0402_5% B +3VALW INIT3_3V# W LAN_TRANSMIT_OFF# 2 1K_0402_5% 2 1K_0402_5% Boot BIOS Strap MODEM_DISABLE# Boot BIOS Location LPC* 0 1 Reserved(NAND) 0 PCI 1 SPI 1 @ 09/2/5 HP 2 0_0402_5% 47P_0402_50V8J 47P_0402_50V8J +3VS +3VM_LAN SI1 NO29 LAN_DIS# U6 4 4 BUF_PLT_RST# 09/2/5 HP IN1 1 IN2 2 PLT_RST# GPIO8 @ SN74AHC1G08DCKR_SC70-5 Security Classification Issued Date Compal Secret Data 2008/09/15 Deciphered Date 2009/12/31 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 8.2K_0804_8P4R_5% 4 http://laptop-motherboard-schematic.blogspot.com/ A 09/4/10 HP SI1 NO31 O 3 8 7 6 5 R250 1 C962 1 @ +3VS NPCI_RST# NC_1 TP24 @ PCI_GNT0# 0 0 1 1 C IBEXPEAK-M_FCBGA1071 R249 1 H_THERMTRIP# 4 +VCCP BB22 TP9 2 22_0402_5% CLK_PCI_1394_R 47P_0402_50V8J 5 1 2 3 4 AW22 GPIO57 R256 1 2 ACCEL_INT# PCI_LOCK# TP2 23 W LAN_TRANSMIT_OFF# RP9 A16 swap overide Strap/Top-Block Swap Override jumper Low=A16 swap PCI_GNT3# override/Top-Block Swap Override enabled High=Default SATA3GP / GPIO37 V3 CONN 27 CLK_PCI_1394 8.2K_0804_8P4R_5% AB13 delete R969 +3VS 2 1K_0402_5% PCH_XDP_GPIO37 TPC12 12 12 12 12 USB_OC#1 1 12 R968 12 USB_OC#3 1 12 PCH_XDP_GPIO36 R970 1 12 R971 USB_OC#5 1 USB_OC#6R1073 1 USB_OC#7R1074 1 R1990 SI1 NO67 C961 1 R282 @ TPC12 T36 2 22_0402_5% CLK_PCI_DB_P 2 22_0402_5% CLK_PCI_FB_R 2 22_0402_5% CLK_PCI_TPM_R 47P_0402_50V8J PCI_GNT3# T29 AF13 R251 1 R253 1 R258 1 8 7 6 5 BA22 TP8 Bluetooth 2 R244 R245 56_0402_5% SATACLKREQ# / GPIO35 VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8 VSS_NCTF_9 VSS_NCTF_10 VSS_NCTF_11 VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14 VSS_NCTF_15 VSS_NCTF_16 VSS_NCTF_17 VSS_NCTF_18 VSS_NCTF_19 VSS_NCTF_20 VSS_NCTF_21 VSS_NCTF_22 VSS_NCTF_23 VSS_NCTF_24 VSS_NCTF_25 VSS_NCTF_26 VSS_NCTF_27 VSS_NCTF_28 VSS_NCTF_29 VSS_NCTF_30 VSS_NCTF_31 H_PECI 4 H_CPUPW RGD 4 H_THERMTRIP#_L 1 54.9_0402_1% SATA5GP / GPIO49 31 CLK_PCI_DB 13 CLK_PCI_FB 31 CLK_PCI_TPM 1 2 3 4 BD10 AA4 USB_OC#0 USB_OC#1 USB_OC#2 USB_OC#3 USB_OC#4 USB_OC#5 USB_OC#6 USB_OC#7 C960 8.2K_0804_8P4R_5% THRMTRIP# TP1 A4 A49 A5 A50 A52 A53 B2 B4 B52 B53 BE1 BE53 BF1 BF53 BH1 BH2 BH52 BH53 BJ1 BJ2 BJ4 BJ49 BJ5 BJ50 BJ52 BJ53 D1 D2 D53 E1 E53 GATEA20 29 KB_RST# 29 12 PCH_XDP_GPIO49 2 22_0402_5% RP7 BE10 CONN R880 1 1 @ PCI_PIRQA# THERM_SCI# PCI_PIRQC# PCI_PIRQG# PROCPWRGD SATA2GP / GPIO36 W LAN_TRANSMIT_OFF# F8 +3VS 2 R243 1 0_0402_5% T35 23 CLK_PCI_DEBUG 47P_0402_50V8J A T1 KB_RST# AV45 2 22_0402_5% CLK_PCI_KBC_R C959 8.2K_0804_8P4R_5% RP8 8 7 6 5 STP_PCI# / GPIO34 PCH_PECI_R TP7 R248 1 47P_0402_50V8J 1 2 3 4 RCIN# GPIO27 M11 F1 CLK_PCIE_LAN 21 CLK_CPU_BCLK 4 BG10 SDATAOUT1 / GPIO48 29 CLK_PCI_KBC C958 PCI_REQ0# PCI_PIRQB# ODD_DET# PCI_REQ3# PECI AB6 2 47_0402_5% 47P_0402_50V8J 1 2 3 4 CLKOUT_BCLK0_P / CLKOUT_PCIE8P AB7 2 10K_0402_5% 2 R242 CLK_PCIE_LAN# 21 CLK_CPU_BCLK# 4 PCH_XDP_GPIO49 R1026 1 C957 PCI_IR DY# PCI_PERR# PCI_DEVSEL# PCI_SERR# 8.2K_0804_8P4R_5% RP6 8 7 6 5 PCI_REQ2# PCI_REQ1# PCI_FRAME# PCI_TRDY# MEM_LED / GPIO24 AM3 AM1 CONN 30 CLK_PCI_SIO C956 1 2 3 4 8.2K_0804_8P4R_5% RP5 8 7 6 5 SCLOCK / GPIO22 CLKOUT_BCLK0_N / CLKOUT_PCIE8N GPIO48 2 22.6_0402_1% USB_OC#0 USB_OC#1 USB_OC#2 USB_OC#3 USB_OC#4 USB_OC#5 USB_OC#6 USB_OC#7 N16 J16 F16 L16 E14 G16 F12 T15 1 10K_0402_5% U2 PCH_XDP_GPIO36 Within 500 mils IBEXPEAK-M_FCBGA1071 8 7 6 5 CONN TACH0 / GPIO17 GPIO28 V6 CLK_PCIE_LAN#_R CLK_PCIE_LAN_R D SATA4GP / GPIO16 V13 09/2/5 HP 28 DOCK_ID1 R485 1 G 1 2 3 4 26 26 26 26 26 26 26 26 25 25 H10 DOCK_ID0 21 CLK_PCIE_LAN_REQ# USB20_N0 USB20_P0 USB20_N1 USB20_P1 USB20_N2 USB20_P2 USB20_N3 USB20_P3 USB20_N4 USB20_P4 H18 J18 A18 C18 N20 P20 J20 L20 F20 G20 A20 C20 M22 N22 B21 D21 H22 J22 E22 F22 A22 C22 G24 H24 L24 M24 A24 C24 USBRBIAS# OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43 OC5# / GPIO9 OC6# / GPIO10 OC7# / GPIO14 SATA_CLKREQ# 28 DOCK_ID0 GPIO15 Y7 SATA_CLKREQ# 12 PCH_XDP_GPIO36 NV_WE#_CK0 NV_WE#_CK1 SERR# PERR# @ 1 2 R246 32.4_0402_1% AU2 AV7 A20GATE GPIO8 F38 STP_PCI# STP_PCI# NV_RB# LAN_PHY_PWR_CTRL / GPIO12 T7 TACH3 / GPIO7 AA2 PCH_XDP_GPIO28 12 PCH_XDP_GPIO28 AF48 AF47 K9 J32 F10 W W AN_TRANSMIT_OFF# AB12 24,25 W W AN_TRANSMIT_OFF# AH45 AH46 CLKOUT_PCIE7N CLKOUT_PCIE7P ALS_EN# GPIO24 NV_RCOMP TACH2 / GPIO6 PCH_XDP_GPIO16 W WAN_DET# SI1 NO2424 WWAN_DET# 09/4/10 HP D37 CLKOUT_PCIE6N CLKOUT_PCIE6P 1 BD3 AY6 GPIO8 4 PCH_DDR_RST TACH1 / GPIO1 33_0402_5% 33_0402_5% 2 1 2 1 R218 R220 2 NV_ALE NV_CLE THERM_SCI# 4 THERM_SCI# 7/2/2009 HP RP28 PCI_PIRQE# PCI_STOP# PCI_PIRQD# 1 MISC AP7 AP6 AT6 AT9 BB1 AV6 BB3 BA4 BE4 BB6 BD6 BB7 BC8 BJ8 BJ6 BG6 RUNSCI_EC# 29 RUNSCI_EC# BMBUSY# / GPIO0 CPU NV_DQ0 / NV_IO0 NV_DQ1 / NV_IO1 NV_DQ2 / NV_IO2 NV_DQ3 / NV_IO3 NV_DQ4 / NV_IO4 NV_DQ5 / NV_IO5 NV_DQ6 / NV_IO6 NV_DQ7 / NV_IO7 NV_DQ8 / NV_IO8 NV_DQ9 / NV_IO9 NV_DQ10 / NV_IO10 NV_DQ11 / NV_IO11 NV_DQ12 / NV_IO12 NV_DQ13 / NV_IO13 NV_DQ14 / NV_IO14 NV_DQ15 / NV_IO15 Y3 C38 GPIO AV9 BG8 R239 1 2 10K_0402_5% PCH_XDP_GPIO0 12 PCH_XDP_GPIO0 42 OCP# +3VS 8/31 HP PCIRST# E44 E50 CLK_PCI_KBC_RN52 CLK_PCI_FB_R P53 CLK_PCI_TPM_R P46 CLK_PCI_1394_RP51 CLK_PCI_DB_P P48 +3VS NV_DQS0 NV_DQS1 PIRQE# / GPIO2 PIRQF# / GPIO3 PIRQG# / GPIO4 PIRQH# / GPIO5 PCI_SERR# PCI_PERR# 4,12,21,23,25,31 PLT_RST# AY9 BD1 AP15 BD8 NCTF PIRQA# PIRQB# PIRQC# PIRQD# NVRAM G38 H51 B37 A44 REQ0# REQ1# / GPIO50 REQ2# / GPIO52 REQ3# / GPIO54 23,27 PCI_RST# 27 27 27 27 C/BE0# C/BE1# C/BE2# C/BE3# F51 A46 B45 M53 PCI_PIRQE# ODD_DET# PCI_PIRQG# ACCEL_INT# PCI_PIRQE# ODD_DET# PCI_PIRQG# ACCEL_INT# J50 G42 H47 G34 NV_CE#0 NV_CE#1 NV_CE#2 NV_CE#3 RSVD TPC12 T112 TPC12 T113 27 PCI_GNT2# 27 23 27 26 2 5 27 PCI_REQ2# AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 P PCI_REQ0# PCI_REQ1# PCI_REQ2# PCI_REQ3# H40 N34 C44 A38 C36 J34 A40 D45 E36 H48 E40 C40 M48 M45 F53 M40 M43 J36 K48 F40 C42 K46 M51 J52 K51 L34 F42 J40 G46 F44 M47 H36 USB PCI_CBE0# PCI_CBE1# PCI_CBE2# PCI_CBE3# PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD# C 3 U4F PCI PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31 D 27 27 27 27 4 U4E 27 PCI_AD[0..31] 3 2 Title Compal Electronics, Inc. IBEX-M(4/6)-PCI/USB/RSVD Size Document Number Custom LA-4902P Date: R ev 0.3 W ednesday, December 09, 2009 1 Sheet 15 of 47 1 2 DCPSUS 3.208A VCC3_3[14] 0.032A VCCSATAPLL[1] VCCSATAPLL[2] U19 VCCSUS3_3[30] VCCSUS3_3[31] U22 VCCSUS3_3[32] V15 VCC3_3[5] V16 VCC3_3[6] Y16 VCC3_3[7] 2 3 nBA4/4W VCCIO[9] AH22 VCCVRM[4] AT20 VCCIO[10] AH19 VCCIO[11] AD20 VCCIO[12] AF22 VCCIO[13] VCCIO[14] VCCIO[15] VCCIO[16] AD19 AF20 AF19 AH20 VCCIO[17] VCCIO[18] VCCIO[19] VCCIO[20] AB19 AB20 AB22 AD22 C273 2 AU18 V_CPU_IO[2] A12 >1mA VCCME[13] VCCME[14] VCCME[15] VCCME[16] AA34 Y34 Y35 AA35 VCCRTC 2mA IBEXPEAK-M_FCBGA1071 6mA VCCSUSHDA 2 1 2 C254 0.1U_0402_16V4Z TPC12 TPC12 VCC CORE CRT VCC3_3[2] AB34 VCC3_3[3] AB35 VCC3_3[4] AD35 VCCVRM[2] AT24 VCCDMI[1] AT16 VCCDMI[2] AU16 VCCPNAND[1] VCCPNAND[2] VCCPNAND[3] VCCPNAND[4] VCCPNAND[5] VCCPNAND[6] VCCPNAND[7] VCCPNAND[8] VCCPNAND[9] AM16 AK16 AK20 AK19 AK15 AK13 AM12 AM13 AM15 2 1 R881 +1.8VS T117 T118 C932 2 2 0_0402_5% T119 TPC12 VCCIO[54] VCCIO[55] AN35 VCC3_3[1] AT22 VCCVRM[1] 0.035A BJ18 VCCFDIPLL 6mA VCCME3_3[1] VCCME3_3[2] VCCME3_3[3] VCCME3_3[4] AM8 AM9 AP11 AP9 AM23 LVDS HVCMOS AN30 AN31 +3VS 1 C238 DMI B 0.061A 1 C245 2 1U_0603_10V4Z +V_NVRAM_VCCQ 0.156A VCCIO[1] +VCCP 1 2 +3VM 0.085A 1 2 +1.8VS C +1.05VS 1 2 SI2 NO9 +1.05VS L5 1 2 10UH_LB2012T100MR_20%_0805 1 C264 1U_0402_6.3V6K 2 +V1.05S_VCCA_A_DPL 1 C263 + 47U_B2_6.3V-M SI1: No49 09/4/28 HP 2 +1.05VM +PCH_VCC1_1_20 +PCH_VCC1_1_21 +PCH_VCC1_1_22 +PCH_VCC1_1_23 1 1 1 1 R290 R291 R292 R293 R296 1 L30 2 2 2 2 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% 2 0_0402_5% 2 +5VALW +3VALW L6 1 +3VALW +5VS +3VS +V1.05S_VCCA_B_DPL 2 10UH_LB2012T100MR_20%_0805 1 C270 1U_0402_6.3V6K 1 2 2 + C269 47U_B2_6.3V-M R294 100_0402_1% 09/2/5 HP D2 R295 100_0402_1% D3 CH751H-40PT_SOD323-2 CH751H-40PT_SOD323-2 ICH_V5REF_SUS C271 1U_0402_6.3V6K ICH_V5REF_RUN 20 mils 1 20 mils 1 C274 1U_0402_6.3V6K 2 Issued Date 2008/09/15 Deciphered Date 2009/12/31 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 2 http://laptop-motherboard-schematic.blogspot.com/ 3 4 D C275 1U_0402_6.3V6K 2 Compal Secret Data Security Classification 1 2 0.1U_0402_16V4Z +1.8VS PCI E* 1 +3VS 0.1U_0402_16V4Z 1 1 0.1U_0402_16V4Z C272 1U_0402_6.3V6K 1 V_CPU_IO[1] HDA 1 0.1U_0402_16V4Z 2 C268 0.1U_0402_16V4Z C266 C267 4.7U_0603_6.3V6K 1 AT18 RTC 1/2BA2/ 2W CPU +VCCP 2 1 +3VS C261 1/5BA4/ 4W 2 0.1U_0402_16V4Z C262 1 1 2 1U_0402_6.3V6K U20 +3VS D 1 VCCIO[25] VCCIO[26] VCCIO[27] VCCIO[28] VCCIO[29] VCCIO[30] VCCIO[31] VCCIO[32] VCCIO[33] VCCIO[34] VCCIO[35] VCCIO[36] VCCIO[37] VCCIO[38] VCCIO[39] VCCIO[40] VCCIO[41] VCCIO[42] VCCIO[43] VCCIO[44] VCCIO[45] VCCIO[46] VCCIO[47] VCCIO[48] VCCIO[49] VCCIO[50] VCCIO[51] VCCIO[52] VCCIO[53] 1 1/3BA4/ 4W 2 0.1U_0402_16V4Z C260 1 2 C246 0.1U_0402_16V4Z 2 AK3 AK1 VCCAPLLEXP0.042A 2 VCCSUS3_3[29] SATA P18 +RTCVCC 2 +3VS AD13 BJ24 AN20 AN22 AN23 AN24 AN26 AN28 BJ26 BJ28 AT26 AT28 AU26 AU28 AV26 AV28 AW26 AW28 BA26 BA28 BB26 BB28 BC26 BC28 BD26 BD28 BE26 BE28 BG26 BG28 BH27 09/2/16 HP IBEXPEAK-M_FCBGA1071 +3VALW 1 1 +1.05VS 1 C U35 ICH_V5REF_RUN 1 VCCIO[24] 2 Y22 VCC3_3[13] AP43 AP45 AT46 AT45 1 +V1.1A_INT_VCCSUS 2 0.1U_0402_16V4Z C256 VCC3_3[12] P36 AH39 VCCTX_LVDS[1] 0.059AVCCTX_LVDS[2] VCCTX_LVDS[3] VCCTX_LVDS[4] 1 DCPSST N36 Item 145(Jason_20081126) 2 V12 2 0.1U_0402_16V4Z C255 VCC3_3[11] VSSA_LVDS 2 +VCCSST 1 VCC3_3[10] 2 1 VCCIO[4] L38 M36 0.030A NAND / SPI AF32 2 VCC3_3[9] 2 C257 VCCIO[3] 2 K49 J38 VCCALVDS AH38 2 1 2 10UH_LB2012T100MR_20%_0805 1 0.1U_0402_16V4Z VCCIO[2] AH34 2 0.357A V5REF VCC3_3[8] VSSA_DAC[2] AF51 C250 VCCIO[21] VCCIO[22] VCCIO[23] AF34 2 >1mA AF53 1 0.1U_0402_16V4Z VCCADPLLB[1] VCCADPLLB[2] 1 C249 0.073A ICH_V5REF_SUS C248 VCCADPLLA[1] VCCADPLLA[2] F24 10U_0603_6.3V6M 0.072A V5REF_SUS >1mA +1.05VS +1.05VS 1U_0402_6.3V6K 1U_0402_6.3V6K C253 1U_0402_6.3V6K C251 C252 1U_0402_6.3V6K 1 AH23 AJ35 AH35 0.035A VCCVRM[3] V23 TPC12 C247 BD51 BD53 +1.05VS DCPRTC U23 VCCIO[56] AK24 T116 C244 V9 VCCSUS3_3[28] 2 1U_0402_6.3V6K +V1.05S_VCCA_B_DPL USB VCCME[12] 2 1 1U_0402_6.3V6K VCCME[11] Y42 BB51 BB53 +V1.05S_VCCA_A_DPL 1 VCCME[10] Y41 AU24 +1.8VS 1 VCCME[9] Y39 1 C243 B VCCME[8] V42 VSSA_DAC[1] 1 A +1.05VS 1U_0402_6.3V6K C242 +VCCRTCEXT 1 2 0.1U_0402_16V4Z VCCME[7] V41 AE52 +3VALW FDI V39 1.998A Clock and Miscellaneous VCCME[6] PCI/GPIO/LPC C240 C239 C975 C976 AF42 AE50 VCCADAC[2] C230 VCCME[5] VCCADAC[1] 0.1U_0402_16V4Z VCCME[4] AF41 0.069A C229 AF43 POWER VCCCORE[1] VCCCORE[2] VCCCORE[3] VCCCORE[4]1.524A VCCCORE[5] VCCCORE[6] VCCCORE[7] VCCCORE[8] VCCCORE[9] VCCCORE[10] VCCCORE[11] VCCCORE[12] VCCCORE[13] VCCCORE[14] VCCCORE[15] 10U_0805_6.3V6M VCCME[3] 2 AB24 AB26 AB28 AD26 AD28 AF26 AF28 AF30 AF31 AH26 AH28 AH30 AH31 AJ30 AJ31 C228 2 AD41 2 C235 1 VCCME[2] 2 0.1U_0402_16V4Z 2 C241 2 1 AD39 1U_0402_6.3V6K 1 22U_0805_6.3V6M 22U_0805_6.3V6M 2 22U_0805_6.3V6M 22U_0805_6.3V6M 1 VCCME[1] V28 U28 U26 U24 P28 P26 N28 N26 M28 M26 L28 L26 J28 J26 H28 H26 G28 G26 F28 F26 E28 E26 C28 C26 B27 A28 A26 C234 SI1 NO37 DCPSUSBYP AD38 VCCSUS3_3[1] VCCSUS3_3[2] VCCSUS3_3[3] VCCSUS3_3[4] VCCSUS3_3[5] VCCSUS3_3[6] VCCSUS3_3[7] VCCSUS3_3[8] VCCSUS3_3[9] VCCSUS3_3[10] VCCSUS3_3[11] VCCSUS3_3[12] VCCSUS3_3[13] VCCSUS3_3[14] VCCSUS3_3[15] VCCSUS3_3[16] 0.163AVCCSUS3_3[17] VCCSUS3_3[18] VCCSUS3_3[19] VCCSUS3_3[20] VCCSUS3_3[21] VCCSUS3_3[22] VCCSUS3_3[23] VCCSUS3_3[24] VCCSUS3_3[25] VCCSUS3_3[26] VCCSUS3_3[27] C232 1U_0402_6.3V6K 0.1U_0402_16V4Z C236 2 1U_0402_6.3V6K 1 0.344A 1 1 L43 0.01U_0603_16V7K VCCLAN[2] 0.052A 1 C227 VCCLAN[1] AF24 V24 V26 Y24 Y26 10U_0805_6.3V6M AF23 2 Y20 0.1U_0402_16V4Z +1.05VM 2 VCCACLK[2] T55 1 C233 1 AP53 VCCIO[5] VCCIO[6] VCCIO[7] VCCIO[8] C226 PAD VCCACLK[1] 1U_0603_10V4Z 2 +1.05A? AP51 U4G +1.05VS POWER U4J 1U_0402_6.3V6K C231 A 5 +3VS +1.05VS +1.05VM 1 4 TPC12 T115 PCI/GPIO/LPC TPC12 T114 3 Title Compal Electronics, Inc. IBEX-M(5/6)-PWR Size Document Number Custom LA-4902P Date: R ev 0.3 W ednesday, December 09, 2009 5 Sheet 16 of 47 1 2 3 AK30 AK31 AK32 AK34 AK35 AK38 AK43 AK46 AK49 AK5 AK8 AL2 AL52 AM11 BB44 AD24 AM20 AM22 AM24 AM26 AM28 BA42 AM30 AM31 AM32 AM34 AM35 AM38 AM39 AM42 AU20 AM46 AV22 AM49 AM7 AA50 BB10 AN32 AN50 AN52 AP12 AP42 AP46 AP49 AP5 AP8 AR2 AR52 AT11 BA12 AH48 AT32 AT36 AT41 AT47 AT7 AV12 AV16 AV20 AV24 AV30 AV34 AV38 AV42 AV46 AV49 AV5 AV8 AW14 AW18 AW2 BF9 AW32 AW36 AW40 AW52 AY11 AY43 AY47 A +3VS 1 B R297 6 CRACK_BGA 8,29 100K_0402_5% 2 Q7A 2N7002DWH_SOT363-6 2 PCH_NCTF6 1 15 +3VS CRACK_BGA 3 R298 100K_0402_5% Q7B 2N7002DWH_SOT363-6 5 PCH_NCTF7 4 15 +3VS CRACK_BGA C 6 R299 100K_0402_5% Q8A 2N7002DWH_SOT363-6 2 15 PCH_NCTF19 1 VSS[80] VSS[81] VSS[82] VSS[83] VSS[84] VSS[85] VSS[86] VSS[87] VSS[88] VSS[89] VSS[90] VSS[91] VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97] VSS[98] VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] 1 VSS[1] VSS[2] VSS[3] VSS[4] VSS[5] VSS[6] VSS[7] VSS[8] VSS[9] VSS[10] VSS[11] VSS[12] VSS[13] VSS[14] VSS[15] VSS[16] VSS[17] VSS[18] VSS[19] VSS[20] VSS[21] VSS[22] VSS[23] VSS[24] VSS[25] VSS[26] VSS[27] VSS[28] VSS[29] VSS[30] VSS[31] VSS[32] VSS[33] VSS[34] VSS[35] VSS[36] VSS[37] VSS[38] VSS[39] VSS[40] VSS[41] VSS[42] VSS[43] VSS[44] VSS[45] VSS[46] VSS[47] VSS[48] VSS[49] VSS[50] VSS[51] VSS[52] VSS[53] VSS[54] VSS[55] VSS[56] VSS[57] VSS[58] VSS[59] VSS[60] VSS[61] VSS[62] VSS[63] VSS[64] VSS[65] VSS[66] VSS[67] VSS[68] VSS[69] VSS[70] VSS[71] VSS[72] VSS[73] VSS[74] VSS[75] VSS[76] VSS[77] VSS[78] VSS[79] 2 VSS[0] AA19 AA20 AA22 AM19 AA24 AA26 AA28 AA30 AA31 AA32 AB11 AB15 AB23 AB30 AB31 AB32 AB39 AB43 AB47 AB5 AB8 AC2 AC52 AD11 AD12 AD16 AD23 AD30 AD31 AD32 AD34 AU22 AD42 AD46 AD49 AD7 AE2 AE4 AF12 Y13 AH49 AU4 AF35 AP13 AN34 AF45 AF46 AF49 AF5 AF8 AG2 AG52 AH11 AH15 AH16 AH24 AH32 AV18 AH43 AH47 AH7 AJ19 AJ2 AJ20 AJ22 AJ23 AJ26 AJ28 AJ32 AJ34 AT5 AJ4 AK12 AM41 AN19 AK26 AK22 AK23 AK28 1 AB16 +3VS IBEXPEAK-M_FCBGA1071 CRACK_BGA 3 R300 100K_0402_5% Q8B 2N7002DWH_SOT363-6 5 15 PCH_NCTF26 4 C H49 H5 J24 K11 K43 K47 K7 L14 L18 L2 L22 L32 L36 L40 L52 M12 M16 M20 N38 M34 M38 M42 M46 M49 M5 M8 N24 P11 AD15 P22 P30 P32 P34 P42 P45 P47 R2 R52 T12 T41 T46 T49 T5 T8 U30 U31 U32 U34 P38 V11 P16 V19 V20 V22 V30 V31 V32 V34 V35 V38 V43 V45 V46 V47 V49 V5 V7 V8 W2 W52 Y11 Y12 Y15 Y19 Y23 Y28 Y30 Y31 Y32 Y38 Y43 Y46 P49 Y5 Y6 Y8 P24 T43 AD51 AT8 AD47 Y47 AT12 AM6 AT13 AM5 AK45 AK39 AV14 1 B U4H VSS[259] VSS[260] VSS[261] VSS[262] VSS[263] VSS[264] VSS[265] VSS[266] VSS[267] VSS[268] VSS[269] VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301] VSS[302] VSS[303] VSS[304] VSS[305] VSS[306] VSS[307] VSS[308] VSS[309] VSS[310] VSS[311] VSS[312] VSS[313] VSS[314] VSS[315] VSS[316] VSS[317] VSS[318] VSS[319] VSS[320] VSS[321] VSS[322] VSS[323] VSS[324] VSS[325] VSS[326] VSS[327] VSS[328] VSS[329] VSS[330] VSS[331] VSS[332] VSS[333] VSS[334] VSS[335] VSS[336] VSS[337] VSS[338] VSS[339] VSS[340] VSS[341] VSS[342] VSS[343] VSS[344] VSS[345] VSS[346] VSS[347] VSS[348] VSS[349] VSS[350] VSS[351] VSS[352] VSS[353] VSS[354] VSS[355] VSS[356] VSS[366] 2 A VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180] VSS[181] VSS[182] VSS[183] VSS[184] VSS[185] VSS[186] VSS[187] VSS[188] VSS[189] VSS[190] VSS[191] VSS[192] VSS[193] VSS[194] VSS[195] VSS[196] VSS[197] VSS[198] VSS[199] VSS[200] VSS[201] VSS[202] VSS[203] VSS[204] VSS[205] VSS[206] VSS[207] VSS[208] VSS[209] VSS[210] VSS[211] VSS[212] VSS[213] VSS[214] VSS[215] VSS[216] VSS[217] VSS[218] VSS[219] VSS[220] VSS[221] VSS[222] VSS[223] VSS[224] VSS[225] VSS[226] VSS[227] VSS[228] VSS[229] VSS[230] VSS[231] VSS[232] VSS[233] VSS[234] VSS[235] VSS[236] VSS[237] VSS[238] VSS[239] VSS[240] VSS[241] VSS[242] VSS[243] VSS[244] VSS[245] VSS[246] VSS[247] VSS[248] VSS[249] VSS[250] VSS[251] VSS[252] VSS[253] VSS[254] VSS[255] VSS[256] VSS[257] VSS[258] 5 2 U4I AY7 B11 B15 B19 B23 B31 B35 B39 B43 B47 B7 BG12 BB12 BB16 BB20 BB24 BB30 BB34 BB38 BB42 BB49 BB5 BC10 BC14 BC18 BC2 BC22 BC32 BC36 BC40 BC44 BC52 BH9 BD48 BD49 BD5 BE12 BE16 BE20 BE24 BE30 BE34 BE38 BE42 BE46 BE48 BE50 BE6 BE8 BF3 BF49 BF51 BG18 BG24 BG4 BG50 BH11 BH15 BH19 BH23 BH31 BH35 BH39 BH43 BH47 BH7 C12 C50 D51 E12 E16 E20 E24 E30 E34 E38 E42 E46 E48 E6 E8 F49 F5 G10 G14 G18 G2 G22 G32 G36 G40 G44 G52 AF39 H16 H20 H30 H34 H38 H42 4 BGA Ball Cracking Prevention and Detection IBEXPEAK-M_FCBGA1071 D D Compal Secret Data Security Classification Issued Date 2008/09/15 Deciphered Date 2009/12/31 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 1 2 http://laptop-motherboard-schematic.blogspot.com/ 3 4 Title Compal Electronics, Inc. IBEX-M(6/6)-GND Size Document Number Custom LA-4902P Date: R ev 0.3 W ednesday, December 09, 2009 5 Sheet 17 of 47 1 2 3 4 5 CRT Connector A A +5VS +RCRT_VCC D4 CH491D_SC59 2 1 F1 1 2 +CRTVDD W=40mils 1.1A_8V_SMD1812P110TF(HF) Near to JP4 C276 0.1U_0402_16V4Z VGA_BLUE_R VGA_GRN_R VGA_RED_R D _HSYNC D_VS YNC JP4 VGA_BLU L53 1 KC FBMA-L10-160808-600LMT 0603 2 2 2 2 2 PV D_HSYNC H SYNC B SUYIN_070912FR015S229ZR CONN@ C289 5P_0402_50V8C 28 D_DDCDATA C 1 Q11A 2N7002KDWH_SOT363-6 layout note: D_HSYNC & D_VSYNC should be routed to docking connector then to VGA connector 1 1 6 2 2 2 2 3 28 D_DDCCLK CRT_DDC_DATA 14 5 1 2 1 3 Place cloce to VGA 1 1 D_VS YNC 1 2 0_0603_5% 2 R312 1 2 5 P OE# VS YNC C288 5P_0402_50V8C L +3VS R316 2.2K_0402_5% 4 74AHCT1G125GW_SOT353-5 C just change part number because no footprint +CRTVDD D_VSYNC 28 R315 2.2K_0402_5% G U8 Y 28 D _HSYNC 2 0_0603_5% R314 2.2K_0402_5% 3 R311 1 R313 2.2K_0402_5% A 1 4 2 14 CRT_VSYNC 16 17 C287 0.1U_0402_16V4Z 1 2 U7 Y G A OE# 5 P 74AHCT1G125GW_SOT353-5 2 G G +5VS C286 0.1U_0402_16V4Z 1 2 14 CRT_HSYNC D_DDCCLK R2002 0_0402_5% VGA_GND +5VS 2 1 R309 1 R308 1 1 1 1 2 R307 1 Close to JP4 9/11 2 75_0402_1% 2 1 1 VGA_BLUE_R 1 +CRTVDD 2 75_0402_1% @ 2 75_0402_1% 1 3 DAN217GT146_SC59-3 2 3 28 6 11 1 7 12 2 8 13 3 9 14 4 10 15 5 D_DDCDATA 10P_0402_50V8J DAN217GT146_SC59-3 2 3 VGA_GRN_R C277 DAN217GT146_SC59-3 2 3 VGA_GRN KC FBMA-L10-160808-600LMT 0603 2 C279 10P_0402_50V8J @ 28 L52 1 C278 10P_0402_50V8J @ VGA_RED 28 D67 C963 DAN217GT146_SC59-3 2 D66 VGA_RED_R 10P_0402_50V8J @ D65 KC FBMA-L10-160808-600LMT 0603 2 C965 10P_0402_50V8J @ 1 1 1 1 3 D64 L51 1 C964 10P_0402_50V8J DAN217GT146_SC59-3 2 2 VGA_GND D63 B 1 4 CRT_DDC_CLK 14 Q11B 2N7002KDWH_SOT363-6 L Place cloce to VGA D D Compal Secret Data Security Classification Issued Date 2008/09/15 Deciphered Date 2009/12/31 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 1 2 http://laptop-motherboard-schematic.blogspot.com/ 3 4 Title Compal Electronics, Inc. CRT Connector Size Document Number R ev 0.3 LA-4902P Date: W ednesday, December 09, 2009 5 Sheet 18 of 47 5 4 3 2 D 1 D SI2 NO8 1 F2 D75 NANOSMDC050F 0.5A 13.2V POLY-FUSE SDM10U45-7_SOD523-2 2 1 1 2 +3VS R825 0_1206_5% 1 2 10U_0805_10V4Z 2 C898 1 0.1U_0402_16V4Z JDP1 DPD_HPD_R DPD_C_AUX_L# DPD_C_AUX_L DPD_CTRLDATA 14 DPD_CTRLCLK 14 Add Pericom PI2EQXDP101 to DP port 6/30 R937 5.1M_0402_5% +3VS_DP DPD_TXP2 DPD_TXN2 14 DPD_TXP3 14 DPD_TXN3 DPD_TXP3 DPD_TXN3 11 12 13 14 15 16 17 18 B D0+ D0D1+ D1VDD15 D2+ D2GND D3+ D3- D0+A D0-A D1+A D1-A GND D2+A D2-A VDD15 D3+A D3-A 28 27 26 25 24 23 22 21 20 19 DP_C_DATA0_P DP_C_DATA0_N DP_C_DATA1_P DP_C_DATA1_N DP_DATA1_P DP_DATA0_N R1988 100K_0402_5% 1 U335 1 37 36 35 34 33 32 31 30 29 14 DPD_TXP2 14 DPD_TXN2 1 2 3 4 5 6 7 8 9 10 GND VCC33 DDCSDA DDCSCL AUXSRC+ AUXSRCAUX_SINK+ AUX_SINKVDD15 DPD_TXP0 DPD_TXN0 DPD_TXP1 DPD_TXN1 VDD15 CAD HPDSRC CAD_SINK HPD_SINK NC VDD15 GND DPD_TXP0 DPD_TXN0 DPD_TXP1 DPD_TXN1 DP_DATA2_P DP_DATA1_N 2 DPD_AUX R1987 100K_0402_5% 14 14 14 14 DP_DATA3_P DP_DATA2_N +3VS DPD_C_AUX_L DPD_C_AUX_L# 2 +1.5VS R938 1M_0402_5% 2 DPD_AUX 14 DPD_AUX# 14 DCAD DP_DATA3_N 1 1 2 +3VS_DP +3VS_DP C897 C1019 2 1 1U_0402_6.3V6K C1017 2 1 0.1U_0402_16V4Z C1018 2 1 1U_0402_6.3V6K C1016 2 1 0.1U_0402_16V4Z C1015 C 1 0.01U_0402_16V7K C1014 2 0.01U_0402_16V7K 1 +3VS_DP +DPA_3V 2 +1.5VS 2 @ DP_DATA0_P 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 CONN@ DP_PWR RTN HP_DET AUX_CHGND AUX_CH+ GND CA_DET GND LANE3GND LANE3_shield GND LANE3+ GND LANE2LANE2_shield LANE2+ LANE1LANE1_shield LANE1+ LANE0LANE0_shield LANE0+ C 24 23 22 21 MOLEX_105020-0001 DPD_AUX# Change connecting eDP to PCH DP 11/24 DP_DATA0_P DP_DATA0_N DP_DATA1_P DP_DATA1_N C1026 1 C1027 1 C1028 1 C1029 1 2 2 2 2 0.1U_0402_10V7K 0.1U_0402_10V7K 0.1U_0402_10V7K 0.1U_0402_10V7K DP_C_DATA2_PC1030 1 DP_C_DATA2_NC1031 1 2 2 0.1U_0402_10V7K DP_DATA2_P 0.1U_0402_10V7K DP_DATA2_N DP_C_DATA3_PC1032 1 DP_C_DATA3_NC1033 1 2 2 0.1U_0402_10V7K DP_DATA3_P 0.1U_0402_10V7K DP_DATA3_N B PI2EQXDP101ZFEX_TQFN36 DPD_HPD_R DCAD DPD_HPD 14 A A Compal Secret Data Security Classification Issued Date 2008/09/15 Deciphered Date 2009/12/31 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 4 http://laptop-motherboard-schematic.blogspot.com/ 3 2 Title Compal Electronics, Inc. Display Port Connector Size Document Number R ev 0.3 LA-4902P Date: W ednesday, December 09, 2009 1 Sheet 19 of 47 1 2 3 +3VS 1 1 2 @ R1090 IO2 GND 1 1 2 SI1 NO45 09/4/27 HP Modify from HP 10/16 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 G2 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 2 R3250_0402_5% 1 W EBCAM_ON 2 0_0402_5% 2 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 G1 +5VS 1 R329 12,15 PCH_XDP_GPIO37 MB_DP_AUXP 5 MB_DP_AUXN 5 USB20_P12_R USB20_N12_R 1 L41 1 4 4 1 MB_DP_HPD 5 +5VS INVPW R_B+ @ 2 2 USB20_P12 15 3 3 USB20_N12 15 WCM-2012-900T_4P R330 100K_0402_5% @ 1 2 1 2 1 2 C301 C303 2 Key_Board_Light power Control 1 1 HP request 9/16 1 2 4.7U_0805_10V4Z 680P_0402_50V7K 8/31 HP P/N change to SC300000P00, CM1293A-02SR C300 W EBCAM_ON +3VS LID_SW # 25,29 @ 0.1U_0402_16V4Z DISP_OFF# LID_SW# 1 CH751H-40PT_SOD323-2 C299 ALS_EN# +5VKBL Q79 SSM3K7002F_SC59-3 0.01U_0402_16V7K INV_PWM 15 3 A D13 2 C298 2 14 LID_SW# 47P_0402_50V8J 1 1 PRTR5V0U2X_SOT143-4 ENABLT 14 R324 100K_0402_1% 2 G 3 1 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 3 ENABLT 2 2K_0402_5% S 2 R1077 IO1 10K_0402_5% VIN 2 USB20_N12_R JEDP1 5 MB_DP_DATA0_P 5 MB_DP_DATA0_N S 1 D 4 USB20_P12_R D @ 2 SI2301CDS-T1-GE3_SOT23-3 @ D14 C1053 1U_0805_25V6K 1 SI1 NO9 09/3/9 HP 2 G @ +5VALW 2 2 1 1 Q96 LCD/PANEL BD. CONN. B DISP_OFF# +5VS +5VS Q78 C1054 0.22U_0603_25V7K 2 1 1 +5VKBL 1 @ C294 47P_0402_50V8J 2 SI1 NO8 09/3/9 HP INVPW R_B+ G R2008 2 D S 3 100K_0402_5% 2 1 2 0_0805_5% SI2303CDS-T1-E3_SOT23-3 @ R2007 220K_0402_5% 5 C293 680P_0402_50V7K 1 R2014 B+ A C292 47P_0402_50V8J C296 680P_0402_50V7K 4 +LCDVDD B 2 R3260_0402_5% +LCDVDD R912 1 2 0_0805_5% ACES_50238-03071-002 LCD POWER CIRCUIT Change eDP LCD connector to 30pin for Coxial cable 9/13 C C +LCDVDD +3VS 1 +LCDVDD 2 Q9 2 G R335 1 2 47K_0402_5% C306 0.1U_0402_16V4Z 2 1 R58 100K_0402_5% 2 0.1U_0402_16V4Z 2 2 1 C308 @ 4.7U_0805_10V4Z 2 Q16 DTC124EKAT146_SC59-3 D R50 100K_0402_5% Compal Secret Data Security Classification +3VS +3VS Issued Date 2008/09/15 Deciphered Date 2009/12/31 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 1 C305 1 C307 4.7U_0805_10V4Z 2 2 2 2 R1028 100K_0402_5% @ 1 1 1 1 1 D R1027 100K_0402_5% @ IN 1 2 MB_DP_AUXP 2 1M_0402_5% 3 R336 100K_0402_1% GND OUT 1 3 S ENAVDD MB_DP_AUXN R334 1 D SSM3K7002F_SC59-3 14 S 2 G 1 1 SI1 NO45 09/4/27 HP Q15 3 AP2301GN 1P_SOT23 D R333 100_0402_1% 2 http://laptop-motherboard-schematic.blogspot.com/ 3 4 Title Compal Electronics, Inc. LCD CONN & Q-Switch & GPIO Ext. Size Document Number R ev 0.3 LA-4902P Date: W ednesday, December 09, 2009 5 Sheet 20 of 47 1 2 3 4 R2013 0_0603_5% 1 2 R429 0_0603_5% 1 2 +1.0VM_LAN +3VM +3VM_LAN R433 0_0603_5% 1 2 A 2 1 09/2/5 HP 2 1 2 C489 22U_0805_6.3V6M 1 C488 0.1U_0402_16V4Z C493 10U_0805_10V4Z 2 C492 0.1U_0402_16V4Z 1 5 From Power +1.05VM_LAN A SI1 NO85 SI, No61 09/5/4 HP R437 1 15 CLK_PCIE_LAN 15 CLK_PCIE_LAN# SI, No78 13 PCIE_PRX_DTX_P6 13 PCIE_PRX_DTX_N6 C495 1 C497 1 2 0.1U_0402_10V6K 2 0.1U_0402_10V6K PCIE_PRX_DTX_P6_C PCIE_PRX_DTX_N6_C 13 PCIE_PTX_C_DRX_P6 13 PCIE_PTX_C_DRX_N6 13 SML0CLK 13 SML0DATA 15,22 LAN_DIS# R438 1 R439 1 LAN_SM_CLK LAN_SM_DAT 2 0_0402_5% 2 0_0402_5% R442 1 LAN_PHYPC_R 2 0_0402_5% LANLINK_STATUS# 22 LED_LINK_LAN# 15,22 LED_LINK_LAN#_R R1078 1 2 @ 0_0402_5% CLK_REQ_N PE_RST_N MDI_PLUS0 MDI_MINUS0 13 14 LAN_MDI0P 22 LAN_MDI0N 22 44 45 PE_CLKP PE_CLKN MDI_PLUS1 MDI_MINUS1 17 18 LAN_MDI1P 22 LAN_MDI1N 22 38 39 PETp PETn MDI_PLUS2 MDI_MINUS2 20 21 LAN_MDI2P 22 LAN_MDI2N 22 41 42 PERp PERn MDI_PLUS3 MDI_MINUS3 23 24 LAN_MDI3P 22 LAN_MDI3N 22 28 31 SMB_CLK SMB_DATA 3 LED0 LED1 LED2 32 34 33 35 JTAG_TDI JTAG_TDO JTAG_TMS JTAG_TCK LAN_ACT# 22,28 LAN_ACT# 09/2/5 HP +3VM_LAN R445 1 R447 1 @ @ TPC12 T61 TPC12 T62 LAN_JTAG_TMS LAN_JTAG_TCK 2 10K_0402_5% 2 10K_0402_5% XTAL2 XTAL1 9 10 XTAL_OUT XTAL_IN 30 TEST_EN C 1 R450 1 R451 2 1K_0402_5% 2 3.01K_0402_1% 12 VCT 6 RSVD_VCC3P3_1 RSVD_VCC3P3_2 VDD3P3_IN 1 2 5 VDD3P3_OUT LAN_DISABLE_N 26 27 25 JTAG B U18 48 36 MDI 15 CLK_PCIE_LAN_REQ# 4,12,15,23,25,31 PLT_RST# PCIE @ 2 0_0402_5% PLT_RST#_LAN SMBUS 2 0_0402_5% R928 1 2 0_0402_5% LED R1118 1 13 CLK_PCIE_LAN_REQ1# RBIAS TRM_CT 22 R440 1 R441 1 2 3.01K_0402_1% 2 3.01K_0402_1% 4 +3.3VM_LAN_OUT VDD3P3_15 VDD3P3_19 VDD3P3_29 15 19 29 +3.3VM_LAN_OUT_R VDD1P0_47 VDD1P0_46 VDD1P0_37 47 46 37 +1.0VM_LAN4 1 R444 2 0_0603_5% VDD1P0_43 43 +1.0VM_LAN3 VDD1P0_11 11 +1.0VM_LAN2 1 R446 1 R448 2 0_0603_5% 2 0_0603_5% VDD1P0_40 VDD1P0_22 VDD1P0_16 VDD1P0_8 40 22 16 8 1 R449 2 0_0603_5% CTRL_1P0 7 VSS_EPAD 49 B +3VM_LAN 1 1 R443 2 0_0603_5% 2 LAN_CTRL_18 C503 1U_0603_10V4Z +1.0VM_LAN C T124 TPC12 W G82577LM_QFN48P DB2: No. 70 Add 10P for 200uW overdrive 2/2 C6 1 2 10P_0402_50V8J 25MHZ_18PF_X5H025000DI1H-H Y5 1 2 2 C508 33P_0402_50V8J 1 XTAL2 XTAL1 2 C509 33P_0402_50V8J 1 D D Compal Secret Data Security Classification Issued Date 2008/09/15 Deciphered Date 2009/12/31 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 1 2 http://laptop-motherboard-schematic.blogspot.com/ 3 4 Title Compal Electronics, Inc. Intel 82566 Nineveh Size Document Number R ev 0.3 LA-4902P Date: W ednesday, December 09, 2009 5 Sheet 21 of 47 1 2 3 4 5 2 21,28 LAN_ACT# A R946 10K_0402_5% 1 +3VM_LAN LAN_ACT# 1 @ 680P_0402_50V7K DB1 No76 JP6 +3VM_LAN_LED R454 1 2 C514 Add on 11/11. 2 300_0603_5% 13 Yellow LED+ 14 Yellow LED- 8 MDO3+ 7 PR4+ MDO1- 6 PR2- MDO2- 5 PR3- MDO2+ 4 PR3+ MDO1+ 3 PR2+ MDO0- 2 PR1- MDO0+ 1 PR1+ SI1 NO19 3 LED_LINK_LAN# 21 LED_LINK_LAN# LED_LINK_LAN# R457 1 2 300_0603_5% 11 Green LED+ 12 Green LED- 2 G 28 LED_LINK_LAN_DOCK# +3VM_LAN_LED 16 DETECT PIN1 9 DETCET PIN2 10 SHLD1 15 A FOX_JM36113-P1123-7F CONN@ LAN_DIS# 15,21 1 @ 680P_0402_50V7K 2 C517 09/2/5 HP 3 SI1 NO17 PR4- 09/3/27 HP 2 1 2 2 0_0402_5% D R1080 1 15,21 LED_LINK_LAN#_R S Q80 SSM3K7002F_SC59-3 Add on 11/14. R455 10K_0402_5% 1 +3VM_LAN SHLD1 MDO3- 1 D57 PJSOT05C_SOT23-3 @ B B Item 141(Jason_20081126) +3VM_LAN SI1 NO63 C 10 TCT4 9 TD3- LAN_MDI1N +3VM_LAN +3VM_LAN_LED 14 MDO0- MCT4 15 MCT0 MX3- 16 MDO1+ MX4+ MDO0- 28 C516 1 2 0.01U_0402_50V7K R456 75_0402_1% 1 2 20 mil 3 1 MDO1+ 28 MDO1- 28 R460 100K_0402_5% Q22 AP2301GN 1P_SOT23 21 LAN_MDI2P 21 LAN_MDI2N 21 LAN_MDI3N 21 LAN_MDI3P 8 TD3+ 7 TCT3 LAN_MDI2P 6 TD2- MX3+ 17 MDO1- MCT3 18 MCT1 MX2- 19 MDO2+ LAN_MDI2N 5 TD21+ MX2+ 20 MDO2- TRM_CTR 4 TCT2 MCT2 21 MCT2 LAN_MDI3N 3 TD1- MX1- 22 MDO3- LAN_MDI3P 2 TD1+ MX1+ 23 MDO3+ TRM_CTR 1 TCT1 MCT1 24 MCT3 C519 1 2 0.01U_0402_50V7K MDO2+ 28 MDO2- 28 C521 1 MDO3- 28 MDO3+ 28 C523 1 R458 75_0402_1% 1 2 28 1 LAN_MDI1N TRM_CTR D 3 2 21 28 2 TRM_CTR 2 1U_0402_6.3V6K LAN_MDI1P 1:1 SI1 NO26 09/4/10 HP MDO0+ 20 mil TD4+ LAN_MDI1P MDO0+ G 1 C515 13 LAN_MDI0N 11 21 MX4- 1:1 1 2 0_0402_5% TD4- 1:1 1 TRM_CT LAN_MDI0N 12 D 21 21 LAN_MDI0P S @ R929 LAN_MDI0P 1 2 T63 21 1:1 R1004 @ 0_0402_5% S Q23 SSM3K7002F_SC59-3 2 G DOCK_ID C 2 0.01U_0402_50V7K R459 75_0402_1% 1 2 2 0.01U_0402_50V7K R461 75_0402_1% 1 2 C524 1 2 1000P_1808_3KV7K 350uH_NS892402P SI1 NO50 09/4/28 HP 2 1 2 C981 0.1U_0402_16V4Z 1 C980 0.1U_0402_16V4Z 2 C979 0.1U_0402_16V4Z D C978 0.1U_0402_16V4Z TRM_CTR 1 1 2 D place 1 capacitor at each pin (1,4,7,10) Compal Secret Data Security Classification Issued Date 2008/09/15 Deciphered Date 2009/12/31 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 1 2 http://laptop-motherboard-schematic.blogspot.com/ 3 4 Title Compal Electronics, Inc. Magnetic & RJ45 Size Document Number R ev 0.3 LA-4902P Date: W ednesday, December 09, 2009 5 Sheet 22 of 47 1 2 3 4 5 WLAN (Half mini Card) Reserve for port80 card use for FCS in factory side. 10/17 +3V_WLAN 2 C530 1 1 2 4.7U_0805_10V4Z 2 C529 1 0.1U_0402_16V4Z C528 2 0.01U_0402_16V7K 1 4.7U_0805_10V4Z 2 C883 C526 2 1 0.1U_0402_16V4Z C525 1 0.01U_0402_16V7K A +1.5VS DEG_FRAME# DEBUG_AD3 DEBUG_AD2 DEBUG_AD1 DEBUG_AD0 R464 R465 R466 R467 R468 1 1 1 1 1 2 2 2 2 2 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% PCI_RST#_R R469 1 2 0_0402_5% A +3V_WLAN 14,25 PCIE_WAKE# PCIE_WAKE# R471 1 13 CLK_PCIE_MCARD# 13 CLK_PCIE_MCARD @ 2 10K_0402_5% CLK_PCIE_MCARD# CLK_PCIE_MCARD PCI_RST#_R +3VALW C939 15 CLK_PCI_DEBUG CLK_PCI_DEBUG 13 PCIE_PRX_DTX_N4 13 PCIE_PRX_DTX_P4 R472 1 R473 1 2 0_0402_5% PCIE_C_RXN4 2 0_0402_5% PCIE_C_RXP4 13 PCIE_PTX_C_DRX_N4 13 PCIE_PTX_C_DRX_P4 @ +3V_WLAN 2 3 G 2 Q24 SI2305ADS-T1-GE3_SOT23-3 13 13 13 1 +3V_WLAN D @ 1 R475 2 220K_0402_1% 29 MC2_DISABLE 1 S 2 R474 10K_0402_5% 1 0.1U_0402_10V6K SI, No76 CL_CLK1 CL_DATA1 CL_RST1# CL_CLK1 CL_DATA1 CL_RST#1 0_0402_5% 2 1 CL_CLK1-R 2 1 CL_DATA1-R 2 1 CL_RST1#-R T64 TPC12 R924 R925 R926 0_0402_5% 0_0402_5% B XMIT_D_OFF# D15 2 1 CH751H-40PT_SOD323-2 PCI_RST# 15,27 JP7 13 CLKREQ_WLAN# SI, No54 09/5/4 HP LPC_LFRAME# 12,29,30,31 LPC_LAD3 12,29,30,31 LPC_LAD2 12,29,30,31 LPC_LAD1 12,29,30,31 LPC_LAD0 12,29,30,31 LPC_LAD3 LPC_LAD2 LPC_LAD1 LPC_LAD0 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 GND1 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 GND2 54 +1.5VS DEG_FRAME# DEBUG_AD3 DEBUG_AD2 DEBUG_AD1 DEBUG_AD0 XMIT_D_OFF# PLT_RST# 4,12,15,21,25,31 W L_LED# W L_LED# 25 B FOXCONN AS0B226-S40N-7F 52P CONN@ W LAN_TRANSMIT_OFF# 15 Add to prevent leakage issue. SATA HDD CONN. SATA ODD CONN. SI, No62 09/5/4 HP JODD1 Place caps. near HDD CONN. C JHDD1 23 24 PTH PTH 25 26 NPTH NPTH CONN@ GND A+ AGND BB+ GND 0.01U_0402_16V7K 1 0.01U_0402_16V7K 1 2 C185 2 C186 SATA_PTX_DRX_P0 SATA_PTX_DRX_N0 SATA_PRX_C_DTX_N0 SATA_PRX_C_DTX_P0 0.01U_0402_16V7K 1 0.01U_0402_16V7K 1 2 C187 2 C188 SATA_PRX_DTX_N0 SATA_PRX_DTX_P0 +5VS SATA_PTX_DRX_P0 12 SATA_PTX_DRX_N0 12 SATA_PRX_DTX_N0 12 SATA_PRX_DTX_P0 12 17 16 NPTH NPTH 15 14 PTH PTH GND TX+ TXGND RX+ RXGND 1 2 3 4 5 6 7 DP V5 V5 MD GND GND 8 9 10 11 12 13 0.01U_0402_16V7K 1 0.01U_0402_16V7K 1 2 C198 2 C199 SATA_PTX_DRX_P1 SATA_PTX_DRX_N1 SATA_PRX_C_DTX_N1 SATA_PRX_C_DTX_P1 0.01U_0402_16V7K 1 0.01U_0402_16V7K 1 2 C200 2 C202 SATA_PRX_DTX_N1 SATA_PRX_DTX_P1 R174 1 @ C206 @ 0.1U_0402_16V4Z 2 Placea caps. near HDD CONN. 1 2 1 2 1 2 C210 10U_0805_10V4Z 1 Near CONN side. C209 10U_0805_10V4Z 2 D Placea caps. near ODD CONN. Compal Secret Data Security Classification Issued Date 2008/09/15 Deciphered Date 2009/12/31 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 1 SATA_PRX_DTX_N1 12 SATA_PRX_DTX_P1 12 ODD_DET# 15 1 C208 1U_0603_10V4Z 2 1 SATA_PTX_DRX_P1 12 SATA_PTX_DRX_N1 12 2 C207 0.1U_0402_16V4Z 2 1 C196 0.1U_0402_16V4Z 2 1 C195 0.1U_0402_16V4Z 1 2 0_0402_5% +5VS +5VS +5VS SANTA_192601-1_NR D C SATA_PTX_C_DRX_P1 SATA_PTX_C_DRX_N1 TYCO_1735491-3 Near CONN side. C194 0.1U_0402_16V4Z 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 SATA_PTX_C_DRX_P0 SATA_PTX_C_DRX_N0 C193 10U_0805_10V4Z 3.3V 3.3V 3.3V GND GND GND V5 V5 V5 GND RSVD GND V12 V12 V12 1 2 3 4 5 6 7 Place caps. near ODD CONN. CONN@ 2 http://laptop-motherboard-schematic.blogspot.com/ 3 4 Title Compal Electronics, Inc. WLAN/ODD/HDD Size Document Number R ev 0.3 LA-4902P Date: W ednesday, December 09, 2009 5 Sheet 23 of 47 2 3 4 SI1 NO77 09/5/14 HP 2 C544 1 1 2 4.7U_0805_10V4Z 2 C543 A 09/4/10 HP SI1 NO24 W WAN_DET# WWAN_DET# 15 U21 SI1 NO10 09/3/9 HP 09/4/27 HP +3VALW W W _LED# W W _LED# 25 2 USB20_N9 15 USB20_P9 15 @ 1 CH1 CH4 6 2 Vn Vp 5 3 CH2 CH3 4 +3V_WWAN +3V_WWAN S DIO(BR) NUP4301MR6T1 TSOP-6 R1091 10K_0402_5% D16 1 3 S G 29 MC1_DISABLE R1106 1 2 220K_0402_1% 2 Q70 SI2305ADS-T1-GE3_SOT23-3 1 1 D +3VALW B 2 1 @ 8 9 @ R491 47K_0402_5% 0_0805_5% 1 2 1 2 DAN217GT146_SC59-3 1 2 C550 7W 2 GND GND 3 UIM_PWR UIM_RST UIM_CLK @ +3VS R1092 1 2 3 1 2 0.1U_0402_16V4Z @ VCC RST CLK C549 +3V_WWAN 1 GND VPP I/O DET 4.7U_0805_10V4Z CH751H-40PT_SOD323-2 C969 0.1U_0402_10V6K 4 5 6 7 UIM_VPP UIM_DATA 18P_0402_50V8J M_WXMIT_OFF# @ JP10 CONN@ change part number @ C548 2 1 0.1U_0402_16V4Z 54 2 C542 GND2 2 1 39P_0402_50V8J 15,25 W W AN_TRANSMIT_OFF# GND1 2 1 M_WXMIT_OFF# FOXCONN AS0B226-S40N-7F 52P D17 1 53 UIM_PWR UIM_DATA UIM_CLK UIM_RST UIM_VPP 1 C547 T67 TPC12 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 39P_0402_50V8J +3V_WWAN 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 C546 T65 TPC12 T66 TPC12 CONN@ 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 39P_0402_50V8J A JP9 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 +3V_WWAN 0.01U_0402_16V7K +3V_WWAN C545 Close to JP14 WWAN (Full mini Card) 5 +3V_WWAN 2 1 B TAITW_PMPAT6-06GLBS7N14N0 UIM_PWR NAND C C +V_NVRAM_VCCQ R495 1 2 0_0603_5% +1.8VS +3VS R1089 1 10K_0402_5% 12 2 NAND_DET# Move these parts near PCH 8/31 HP D D Compal Secret Data Security Classification Issued Date 2008/09/15 Deciphered Date 2009/12/31 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 1 2 http://laptop-motherboard-schematic.blogspot.com/ 3 4 Title Compal Electronics, Inc. WWAN/NAND Size Document Number R ev 0.3 LA-4902P Date: W ednesday, December 09, 2009 5 Sheet 24 of 47 1 2 3 +3VS 1 WL_LED# WL_LED# 1 14,23 13 13 13 13 13 13 13 14,29,32,33,35,38,39 4,12,15,21,23,31 2 2009/04/24 SI-1 2009/08/30 HP PV R1111 2 0_0402_5% WL/BT_LED# 3 A Q63B 2N7002DWH_SOT363-6 5 WW_LED# 26 BT_LED 2 100K_0402_5% 2 100K_0402_5% +5VS 2 0_0402_5% 1 09/5/4 Q63A 2N7002DWH_SOT363-6 2 1 24 +1.5VS 29 A_SD# 27 SDDATA1_MSDATA0 HP 27 SDDATA1_MSDATA1 27 SDDATA2_MSDATA2 27 SDDATA3_MSDATA3 27 MMC_D4 27 MMC_D5 27 MMC_D6 27 MMC_D7 27 SDCLK_MMCCLK 27 SD_MMC_CMD 27 SD_WP 27 SDPWR0_MSPWR_XDPWR 27 SD_CARD_DET# 6 R1112 WW_LED# BT_LED R933 1 WL_LED# R934 1 PCIE_WAKE# CLKREQ_EXP# CLK_PCIE_EXP# CLK_PCIE_EXP PCIE_PRX_DTX_N2 PCIE_PRX_DTX_P2 PCIE_PTX_C_DRX_N2 PCIE_PTX_C_DRX_P2 SLP_S3# PLT_RST# PCIE_WAKE# CLKREQ_EXP# CLK_PCIE_EXP# CLK_PCIE_EXP PCIE_PRX_DTX_N2 PCIE_PRX_DTX_P2 PCIE_PTX_C_DRX_N2 PCIE_PTX_C_DRX_P2 SLP_S3# PLT_RST# SI, No53 4 15,24 WWAN_TRANSMIT_OFF# @ 5 INT_KBD CONN. JP5 USB20_N4 USB20_P4 EXPRESS_CD# 15 USB20_N4 15 USB20_P4 15 EXPRESS_CD# R932 47K_0402_5% 23 4 AUDIO BOARD CONNECTOR (MALE) +5VALW 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 Change schematic for Gobi2 WWAN off of LED issue 9/13 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 GND 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 GND 70 +3VS LINE_IN_SENSE 28 DOCK_HPS# 28 DOCK_LINE_IN_L 28 DOCK_LINE_IN_R 28 DLINE_OUT_L 28 DLINE_OUT_R 28 JP36 KSO11 KSO0 KSO2 KSO5 KSI_D_14 KSI_D_8 KSI_D_12 KSI_D_10 KSI_D_0 KSI_D_4 KSI_D_2 KSI_D_1 KSI_D_3 KSO3 KSO8 KSO4 KSO7 KSO6 KSO10 KSO1 KSI_D_5 KSI_D_6 KSI7 KSI_D_13 KSI_D_11 KSI_D_9 KSO9 KSO12 KSO13 SI, No53 +3VALW MUTE_LED_CNTL 2909/5/4 HP 0211 EMI HDD_HALTLED 12 SATA_LED# 12,28 AMBER_BATLED# 29 AQUAWHITE_BATLED# 12,29 STB_LED# 28 +3VL IEEE1394_TPBN0 27 IEEE1394_TPBP0 27 IEEE1394_TPAN0 27 IEEE1394_TPAP0 27 1 R1084 E&T_1000-F68E-04R KSI[0..7] 29 KSI[0..7] HDA_BIT_CLK_CODEC 12 HDA_SDOUT_CODEC 12 HDA_SDIN0 12 HDA_SYNC_CODEC 12 HDA_RST#_CODEC 12 HDA_SPKR 12 HDD_HALTLED SATA_LED# AMBER_BATLED# AQUAWHITE_BATLED# WL/BT_LED# STB_LED# KSO[0..13] 29 KSO[0..13] 2 0_0402_5% CONN@ 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 62 GND1 GND2 CONN@ 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 GND3 GND4 63 64 KSO11 KSO0 KSO2 KSO5 KSI_D_14 KSI_D_8 KSI_D_12 KSI_D_10 KSI_D_0 KSI_D_4 KSI_D_2 KSI_D_1 KSI_D_3 KSO3 KSO8 KSO4 KSO7 KSO6 KSO10 KSO1 KSI_D_5 KSI_D_6 KSI7 KSI_D_13 KSI_D_11 KSI_D_9 KSO9 KSO12 KSO13 CP2 CP1 KSO11 KSO0 KSO2 KSO5 KSI_D_14 KSI_D_8 KSI_D_12 KSI_D_10 @ 1 2 3 4 8 7 6 5 @ 1 2 3 4 8 7 6 5 A 100P_1206_8P4C_50V8K 100P_1206_8P4C_50V8K CP3 KSI_D_0 KSI_D_4 KSI_D_2 KSI_D_1 @ 1 2 3 4 CP4 KSI_D_3 KSO3 KSO8 KSO4 8 7 6 5 100P_1206_8P4C_50V8K CP5 KSO7 KSO6 KSO10 KSO1 8 7 6 5 100P_1206_8P4C_50V8K @ 1 2 3 4 @ 1 2 3 4 CP6 KSI_D_5 KSI_D_6 KSI7 KSI_D_13 8 7 6 5 100P_1206_8P4C_50V8K @ 1 2 3 4 8 7 6 5 100P_1206_8P4C_50V8K CP7 KSI_D_11 KSI_D_9 KSO9 KSO12 @ 1 2 3 4 8 7 6 5 100P_1206_8P4C_50V8K HIROSE FH12HP-30S-1SV 55 30P B B +3VS MDC 1.5 Conn. D23 D24 HDA_SDOUT_MDC 12 HDA_SDOUT_MDC 12 HDA_SYNC_MDC 12 HDA_SDIN1 12 HDA_RST#_MDC HDA_SYNC_MDC 2 HDA_SDIN1_MDC 33_0402_5% KSI0 1 DB2: No. 80 SI2 No 5 +5VS R594 2 0_0402_5% 1 1 2 C685 @ 10P_0402_50V8J KSI1 1 HDA_BIT_CLK_MDC 12 DB2: No. 70 29 29 8 6 4 2 TP_DATA TP_CLK 8 6 4 2 7 5 3 1 KSI_D_0 3 KSI_D_8 7 5 3 1 KSI2 1 DAP202UGT106_SC70-3 D28 2 KSI_D_2 CAP SWITCH BOARD. 1 2 2 3 KSI_D_11 KSI5 1 3 KSI6 1 KSI_D_12 DAP202UGT106_SC70-3 D27 2 KSI_D_5 KSI_D_13 DAP202UGT106_SC70-3 D29 2 KSI_D_6 3 KSI_D_14 DAP202UGT106_SC70-3 D32 PACDN042Y3R_SOT23-3 @ 2 1 @ 4.7U_0805_10V4Z 2 C684 1 0.1U_0402_16V4Z C C683 2 1000P_0402_50V7K C682 1 KSI_D_3 3 3 DAP202UGT106_SC70-3 D23~D29 change HF P/N did not link database C689 0.1U_0402_16V4Z KSI4 1 2 DAP202UGT106_SC70-3 D25 2 KSI_D_4 KSI_D_10 3 +5VS 1 KSI3 1 KSI_D_9 3 ACES_85203-04021 CONN@ +3VS 2 DAP202UGT106_SC70-3 D26 2 KSI_D_1 JP25 13 14 15 16 17 18 GND GND GND GND GND GND 1 R593 T/P BOARD. JP21 CONN@ ACES_88020-12101_12P 1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8 9 9 10 10 11 11 12 12 C Power Button SI No. 23 TrackPoint CONN. +VREG3_51125 +VREG3_51125 C888 JP37 WL/BT_LED# STB_LED# 20,29 LID_SW# ON/OFF# LID_SW# 1 C688 0.1U_0402_16V4Z 2 +5VS DB2: No. 80 JP24 1 3 5 7 9 11 2 3 CAP_RST_EC WL/BT_LED# 1 4 CAP_CLK CAP_DAT CAP_INT ON/OFF# 1 2 R597 47_0402_5% 2 ON/OFFBTN_KBC# 29 2 29 SP_CLK +3VALW 1 C690 1U_0603_10V4Z STB_LED# ON/OFF# LID_SW# 1 R598 @ 1 3 5 7 9 11 2 4 6 8 10 12 2 4 6 8 10 12 SP_DATA 29 ACES_87153-08011 CONN@ 2 100K_0402_5% D31 @ 1 2 PWRBTN_OUT# 14,28,29 CH751H-40PT_SOD323-2 ACES 85203-12021 12P P1.0 CONN@ ON/OFF# 28 D 7/20 HP Please Put this switch at TOP side & will remove after DB2 +3VL SW1 just change P/N to SN100000W10 for HF part +3VL Compal Secret Data Security Classification 1 DAN217GT146_SC59-3 1 D73 @ 3 2 DAN217GT146_SC59-3 D74 @ 3 1 SI1 NO66 2 1 28 1 3 5 7 9 11 13 15 17 19 21 23 1 3 5 7 9 11 13 15 17 19 21 23 5 6 29 CAP_RST_EC 2 4 6 8 10 12 14 16 18 20 22 24 R596 100K_0402_5% SW1 @ TJG-533-V-T/R_6P DB2: No. 71 R592 10K_0402_5% 2 1 C889 13,29 CAP_CLK 13,29 CAP_DAT 29 CAP_INT D 1 0.1U_0603_50V4Z 2 2 4 6 8 10 12 14 16 18 20 22 24 +5VS +3VS 8/31 HP 1 R1986 100K_0402_1% 2 1 2 2 +3VS 1000P_0402_50V7K 2 1 R591 5.1K_0402_5% R590 5.1K_0402_5% 1 +3VL +3VL Issued Date http://laptop-motherboard-schematic.blogspot.com/ Deciphered Date 2009/12/31 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 6/30 HP 2 2008/09/15 3 4 Title Compal Electronics, Inc. MDC/KBD/ON_OFF/LID Size Document Number Rev 0.3 LA-4902P Date: Wednesday, December 09, 2009 5 Sheet 25 of 47 1 2 +5VALW 3 4 5 USB_VCCA 1 +5VALW R601 10K_0402_5% @ D33 4 +5VALW USB_VCCB USB20R_N0 3 IO1 2 IO2 GND 1 VIN +3VALW USB20R_P0 1 3 2 1 1 R2003 2 R603 1 2 220K_0402_5% BT_OFF Q94 2 G SSM3K7002FU_SC70-3 CONN@ SUYIN 020133MR004S536ZL 4P 1 15 D 3 2 470_0402_5% 2 S R607 2 VDD_IO VDD 8 9 INT 1 INT 2 1 10K_0402_5% 7 2 2 GND GND GND GND 2 4 5 10 SDO SDA / SDI / SDO SCL / SPC RSVD CS RSVD 3 11 +3VS_ACL HP302DLTR8_LGA14_3X5 10U_0805_10V4Z 2 1 2 3 4 GND GND GND GND 0.1U_0402_16V4Z 1 +3VS_ACL 1 6 12 13 14 4,9,10,11,13 SMB_DATA_S3 4,9,10,11,13 SMB_CLK_S3 1 1 C697 2 C696 AP2301GN 1P_SOT23 G 2 C701 2 1 1000P_0402_50V7K + C699 1 2 3 4 5 6 7 8 USB20R_N1 USB20R_P1 C700 1 UP7534BRA8-15 MSOP 8P (2A,100mils ,Via NO.=4) 2 15 ACCEL_INT# JP28 W=100mils 8 7 6 5 0.1U_0402_16V4Z 1 C698 4.7U_0805_10V4Z OUT OUT OUT OC# D S SLP_S4 GND IN IN EN# +3VS_ACL_IO +3VS_ACL 1 R602 10K_0402_5% 1 LIS302DL +3VAUX_BT 3 P/N change to SC300000P00, CM1293A-02SR 150U_B2_6.3VM_R35M 1 2 3 4 1 U32 Q33 SI2 NO9 @ +3VS_ACL_IO 2 PJDLC05H_SOT23-3 R604 10K_0402_5% U31 +3VS_ACL SI1 NO75 PRTR5V0U2X_SOT143-4 +3VS_ACL A +3VS D58 2 PAD-SHORT 2x2m USB20_P8 15 USB20_N8 15 BT_LED 25 USB20_P8 USB_VCCA J1 +5VALW USB20_N8 0_0402_5% 0_0402_5% 2 2 ACES_87212-05G0 CONN@ USB_VCCB 1 R599 1 R600 1 C703 CONN@ SUYIN 020133MR004S536ZL 4P Make sure the parts ODM number isHP302DLTR8-MBD 10/17 +3VAUX_BT USB20_P8_R USB20_N8_R 10U_0805_6.3V6M USB_VCCA 2 1 2 3 4 5 6 7 1 2 3 4 5 GND GND C702 DB1 NO74 2 JP26 0.1U_0402_16V4Z 2 1 1 2 3 4 GND GND GND GND 2 C693 1000P_0402_50V7K (2A,100mils ,Via NO.=4) 2 1 C695 + 0.1U_0402_16V4Z A 1 UP7534BRA8-15 MSOP 8P C694 1 C692 4.7U_0805_10V4Z 1 2 3 4 5 6 7 8 USB20R_N0 USB20R_P0 ACCELEROMETER BT Connector JP27 W=100mils 8 7 6 5 OUT OUT OUT OC# 1 SLP_S4 SLP_S4 GND IN IN EN# 150U_B2_6.3VM_R35M 33 2 U30 1 2 3 4 Must be placed in the center of the system. L Change U30 part description from LIS302DLTR LGA to HP302DLTR8 as HP change list. 12/03 @ B B USB_VCCB @ D34 4 USB20R_N1 +5VALW +5VALW 15 IO1 2 IO2 GND 1 VIN 3 USB_VCCD 1 USB20_P0 2 R1991 0_0402_5% USB20R_P1 1 L331 1 @ 2 USB20R_P0 2 PRTR5V0U2X_SOT143-4 4 4 3 WCM-2012-900T_4P 1 P/N change to SC300000P00, CM1293A-02SR 3 R1008 10K_0402_5% 4.7U_0805_10V4Z (2A,100mils ,Via NO.=4) 2 C942 2 1 2 C944 + 1 2 1 2 3 4 5 6 7 8 USB20R_N3 USB20R_P3 1000P_0402_50V7K 1 UP7534BRA8-15 MSOP 8P USB20_N0 1 2 R1992 0_0402_5% 15 USB20_P1 1 2 R1993 0_0402_5% USB20R_N0 JP39 W=100mils 8 7 6 5 C943 1 OUT OUT OUT OC# 0.1U_0402_16V4Z C941 GND IN IN EN# 150U_B2_6.3VM_R35M 1 2 3 4 SLP_S4 2 U62 15 1 2 3 4 GND GND GND GND 1 4 15 L332 1 @ 2 USB20R_P1 2 4 3 3 WCM-2012-900T_4P USB20_N1 1 2 R1994 0_0402_5% USB20_P3 1 2 R1995 0_0402_5% USB20R_N1 CONN@ SUYIN 020133MR004S536ZL 4P 15 USB_VCCD @ D62 4 USB20R_N3 C 3 1 IO1 2 IO2 GND 1 VIN L333 1 @ 2 USB20R_P3 2 USB20R_P3 4 PRTR5V0U2X_SOT143-4 15 P/N change to SC300000P00, CM1293A-02SR 4 3 3 WCM-2012-900T_4P 1 USB20_N3 C 2 R1996 0_0402_5% USB20R_N3 EMI 7/22 Change TI to Pericom PI3EQX4951ST_PEND And add 1.5 power rail option 6/30 ESATA function +3VS_1.5VS SATA Redriver USB_VCCC 09/5/14 HP @ D36 4 USB20R_N2 3 IO1 2 IO2 GND 1 VIN USB20R_P2 15 1 USB20_P2 PRTR5V0U2X_SOT143-4 L334 2 1 4 4WCM-2012-900T_4P 3 3 2 GND GND GND GND Boss Boss +3VS_1.5VS 1 USB20_N2 1 2 R1998 0_0402_5% 2 4.7K_0402_5% 7 17 16 17 16 10 6 VDD18 VDD18 20 2 0.01U_0402_16V7KSATA_PTX_C_DRX_N4 BI+ BO+ SATA_PRX_DTX_P4_R C1005 2 1 0.01U_0402_16V7K SATA_PRX_DTX_P4 12 BI- BO- 4 SATA_PRX_DTX_N4_R C1006 2 1 0.01U_0402_16V7K SATA_PRX_DTX_N4 12 EN +3VS_1.5VS MODE +3VS 1 R1121 2 4.7K_0402_5% 8 B_EM / B_EQ 1 R1120 2 4.7K_0402_5% 9 A_EM / B_EM 1 R2010 @ 1 R2011 @ 2 4.7K_0402_5% 2 4.7K_0402_5% VDD18 2 0.01U_0402_16V7KSATA_PTX_C_DRX_P4 SATA_PTX_C_DRX_N4_RC1008 1 +3VS_1.5VS +1.5VS @ 1 R1131 1 2 0_0603_5% 1 R1132 2 0_0603_5% TI & Pericom select PI2EQX4951SLZDEX_TQFN20_4X4 2 1 2 1 2 Near U68 VCC pin D USB20R_P2 P/N change to SC300000P00, CM1293A-02SR 15 1 R1123 SATA_PTX_C_DRX_P4_RC1007 1 14 5 HEATGND 12 13 14 15 1 C1009 SATA_PRX_C_DTX_N4_R 12 SATA_PRX_C_DTX_N4 0.01U_0402_16V7K 2 15 AO- AO+ TAIWI_EU016-117CRL-TW 2 R1997 0_0402_5% @ 1 GND A+ ESATA AGND BB+ GND AI- C1013 0.01U_0402_16V7K USB_VCCC 5 6 7 8 9 10 11 AI+ 1 C1010 SATA_PRX_C_DTX_P4_R 11 C1012 0.1U_0402_16V4Z SATA_PRX_C_DTX_N4 SATA_PRX_C_DTX_P4 1 2 C1004 SATA_PTX_DRX_N4_R 2 GND / A_EM SATA_PTX_C_DRX_P4 SATA_PTX_C_DRX_N4 2 C1003 SATA_PTX_DRX_P4_R 0.01U_0402_16V7K 1 21 2 0.01U_0402_16V7K 1 0.01U_0402_16V7K 2 GND / A_EQ 2 SATA_PRX_C_DTX_P4 19 2 12 SATA_PTX_DRX_N4 18 C705 CONN@ USB VDD18 2 (2A,100mils ,Via NO.=4) VBUS DD+ GND C1011 1U_0603_10V4Z D 2 1 1 2 3 4 3 4.7U_0805_10V4Z 1 C707 + USB20R_N2 USB20R_P2 1000P_0402_50V7K 1 UP7534BRA8-15 MSOP 8P C706 1 JP29 W=100mils 8 7 6 5 0.1U_0402_16V4Z C704 OUT OUT OUT OC# 150U_B2_6.3VM_R35M SLP_S4 GND IN IN EN# GND / B_EN# 1 U68 12 SATA_PTX_DRX_P4 U33 1 2 3 4 C1007, C1008 near JP29 C1005, C1006 near U4 E-SATA CONN. R606 10K_0402_5% GND / A_EN# SI1 No72 +5VALW 13 +5VALW Compal Secret Data Security Classification Issued Date USB20R_N2 2 http://laptop-motherboard-schematic.blogspot.com/ 2008/09/15 Deciphered Date 2009/12/31 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 3 4 Title Compal Electronics, Inc. USB & BT Connector & Acclerometer Size Document Number R ev 0.3 LA-4902P Date: Wednesday, December 09, 2009 5 Sheet 26 of 47 1 2 3 4 5 +3VS SMART Card Connector GND SC_CLK SC_DATA GND GND SC_CD# 1 C906 0.1U_0402_16V4Z SDLED# MMCLED# MSLED# XDPWR XDWP# XDLED# MSEXTCK MDIO08 SDCCMD MMCCMD MSBS MDIO09 SDCCLK MMCCLK MSCCLK XDRE# MDIO10 SDCDAT0 MMCDAT0 MSCDAT0 XDCDAT0 MDIO11 SDCDAT1 MMCDAT1 MSCDAT1 XDCDAT1 MDIO12 SDCDAT2 MMCDAT2 MSCDAT2 XDCDAT2 MDIO13 SDCDAT3 MMCDAT3 MSCDAT3 XDCDAT3 XDWE# MDIO14 MMCDAT4 XDCDAT4 MDIO15 MMCDAT5 XDCDAT5 MDIO16 MMCDAT6 XDCDAT6 MDIO17 MMCDAT7 XDCDAT7 2 EEPROM@ 1 2 C818 0.1U_0402_16V4Z U49 EEPROM@ A0 VCC 8 A1 WP 7 A2 SCL 6 GND SDA 5 AT24C02BN-SH-T_SO8 1 2 XDCLE XDALE S 2 G +3VS 1 R1088 2 100K_0402_5% AP2309AGN-HF 1P SOT23-3 AP2301GN-HF_SOT23-3 Q57 Q84 1 3 3 1 2 2 R1110 1K_0402_5% @ 2 2 1 2 2 1 1 1 2 1 D 3 1 B SCVCC3EN# SCVCC3EN# SCVCC5EN# 0 0 1 1 1 2 +3VS 1 @ 2 http://laptop-motherboard-schematic.blogspot.com/ C +SC_PWR 0 1 0 1 +3VS +5VS +3VS +5VS NULL SCVCC5EN# SCL SDA Function set pin define SCVCC3EN# UDIO3 EEPROM@ R803 510_0402_5% UDIO4 Pull-down Pull-down UDIO5 Function Pull-up Disable MS,xD Card,serial ROM Pull-up Pull-up Pull-down Enable serial EEPROM Pull-up Pull-up Ensable MS,xD Card,disable serial ROM Pull-up U DIO5 U DIO3 U DIO4 R785 1 R786 1 R787 1 R791 1 R792 1 R793 1 @ @ 2 100K_0402_5% 2 10K_0402_5% 2 10K_0402_5% D 2 100K_0402_5% 2 10K_0402_5% 2 10K_0402_5% IEEE1394_TPBIAS0 2 Layout Note: Add GND shield 1 1 1 GND E-T_6900-Q10N-00R CONN@ 1 +SC_PWR +SC_PWR SC_RST 2 20 18 16 14 12 10 8 6 4 2 1 2 3 4 2 1 2 C948 0.33U_0603_16V4Z 20 18 16 14 12 10 8 6 4 2 MDIO06 R1033 56.2_0402_1% 19 17 15 13 11 9 7 5 3 1 SDPWR1 MSPWR +3VS C947 0.01U_0402_16V7K 19 17 15 13 11 9 7 5 3 1 1 +3VS 1 R1032 56.2_0402_1% D MDIO05 XDR/B# MMCPWR IEEE1394_TPBN0 IEEE1394_TPBP0 IEEE1394_TPAN0 IEEE1394_TPAP0 GND JP38 SDPWR0 AP2301GN-HF_SOT23-3 Q58 3 1 2 SCVCC3EN# 2 GND MDIO04 +5VS C966 0.1U_0402_16V4Z 1 2 12P_0402_50V8J XDCD1# +SC_PWR 2 C8231 SC_CLK DB2 NO74 SI1 NO47 SI2 NO2 Layout Note: Please them close to U14. 1 2 12P_0402_50V8J MSCD# 0.1U_0402_16V4Z C967 2 12P_0402_50V8J C8221 2 1 2 SCL R796 0_0402_5% EEPROM@ 1 2 SDA R797 0_0402_5% EEPROM@ R1031 56.2_0402_1% C8191 XD Card PIN Name XDCD0# 100K_0402_5% R1086 8 20 35 47 61 80 93 94 115 128 1 SIRQ 12,29,30,31 TPC12 T95 TPC12 T96 2 SIRQ TP_UDIO1 TP_UDIO2 U DIO3 U DIO4 U DIO5 76 75 74 73 72 71 A MS Card PIN Name MDIO19 2 SC_RST GND Layout Note: Add GND shield for SDCLK_MMCCLK. 100 99 R5C835-TQFP128P_TQFP128_14X14 SC_DATA MMC Card PIN Name MMCCD# MDIO18 R1030 56.2_0402_1% 1 2 R804 15K_0402_5% 1 2 R1093 15K_0402_5% 1 2 R1094 15K_0402_5% +SC_PWR AGND AGND AGND AGND SDWP# C968 1 HWSPND# TEST 2 XDCE# MDIO03 0.1U_0402_16V4Z D72 GND GND GND GND GND GND GND GND GND GND 2 MDIO07 Layout Note: Shield GND for SDPWR0_MSPWR_XDPWR SDCLK_MMCCLK 25 R1029 5.1K_0402_1% just change part number, waiting for database 1 77 81 98 101 105 109 1N4148WS-7-F_SOD323-2 2 1N4148WS-7-F_SOD323-2 2 1N4148WS-7-F_SOD323-2 2 1 INTA# INTB# 2 R5C832XI R5C832XO C946 270P_0402_50V7K D71 2 10K_0402_5% 2 100K_0402_5% UDIO0/SRIRQ# UDIO1 UDIO2 UDIO3 UDIO4 UDIO5 SD Card PIN Name SDCD# SSM3K7002F_SC59-3 Q82 D70 SI1 NO11 09/3/9 HP SCRST SCCLK SCIO SCCD# SCSENSE 2 MDIO02 GND 25 25 25 25 1 MDIO01 Layout Note: Add GND shield for 1394.and Same length as TPA+/-,TPB+/- 1 R1085 C R798 1 1 R799 89 88 87 86 85 MDIO PIN Name MDIO00 10K_0402_5% +3VS REXT VREF 112 113 15 PCI_PIRQE# 15 PCI_PIRQG# 95 96 2 GND SD_CARD_DET# 25 TPC12 T89 TPC12 T90 SD_WP 25 SDPWR0_MSPWR_XDPWR 25 TPC12 T91 TPC12 T92 SD_MMC_CMD 25 2 0_0402_5% SDDATA1_MSDATA0 SDDATA1_MSDATA1 SDDATA2_MSDATA2 SDDATA3_MSDATA3 MMC_D4 25 MMC_D5 25 MMC_D6 25 MMC_D7 25 PAD T93 PAD T94 1 Layout Note: Place these cap close to U21 15P_0603_50V8J Layout Note: Shield GND for CBS_CCLK_INTERNAL and CBS_CCLK 1 2 10K_0402_5% XI XO 1 GND IEEE1394_TPBP0 25 IEEE1394_TPBN0 25 XD_CE# SD_WP SDPWR0_MSPWR_XDPWR XDWP# 3IN1_LED# TP_MSEXTCK SD_MMC_CMD SDCLK_MMCCLK_R R930 1 SDDATA0_MSDATA0 SDDATA1_MSDATA1 SDDATA2_MSDATA2 SDDATA3_MSDATA3 MMC_D4 MMC_D5 MMC_D6 MMC_D7 XDCLE XDALE 2 1 SD,MMC,MS,XD muti-function pin define GND IEEE1394_TPAP0 25 IEEE1394_TPAN0 25 2 2 1 R795 +SC_PWR SCVCC5EN# SCVCC3EN# 2 R5C832XO +SC_PWR IEEE1394_TPBIAS0 2 1 2 1 2 1 2 47_0402_5% 83 84 2 C801 1 2 R794 10K_0603_1% R931 1 SCVCC5EN# SCVCC3EN# 2 C815 0.01U_0402_16V7K SC_CLK SC_RST SC_CLK_R SC_DATA SC_CD# SCSENSE SD_CARD_DET# 2 1 @ +3VS MDIO00 MDIO01 MDIO02 MDIO03 MDIO04 MDIO05 MDIO06 MDIO07 MDIO08 MDIO09 MDIO10 MDIO11 MDIO12 MDIO13 MDIO14 MDIO15 MDIO16 MDIO17 MDIO18 MDIO19 70 69 63 68 67 66 65 64 62 60 58 57 56 55 53 52 51 50 49 48 2 1 R5C832XI need 50PPM or better X1 24.576MHz_16P_3XG-24576-43E1 1000P_0402_25V8J C814 14,29,30,31 PM_CLKRUN# 2 10K_0402_5% 2 0_0402_5% 2 10K_0402_5% PCICLK PCIRST# GBRST# CLKRUN# PME# IEEE1394_TPBP0 IEEE1394_TPBN0 2 1 +3V_PHY 0.01U_0402_16V7K C813 15,23 PCI_RST# @ REQ# GNT# CLK_PCI_1394 117 116 CBS_GRST# 82 114 78 PME# 15 CLK_PCI_1394 R788 1 R789 1 R790 1 120 119 103 102 L35 MBK2012601YZF_2P 1 2 10U_0805_6.3V6M C812 PCI_REQ2# PCI_GNT2# 15 PCI_REQ2# 15 PCI_GNT2# Layout Note: Add GND shield. TPBP0 TPBN0 2 1 10U_0805_10V4Z C811 15 PCI_PERR# 15,29,31 PCI_SERR# IEEE1394_TPAP0 IEEE1394_TPAN0 1 0.01U_0402_16V7K C810 2 IEEE1394_TPBIAS0 107 106 1 10U_0805_10V4Z C800 1 470_0402_5% PAR FRAME# TRDY# IRDY# STOP# DEVSEL# IDSEL PERR# SERR# 110 TPAP0 TPAN0 1 0.01U_0402_16V7K C799 PCI_AD22 25 16 18 17 21 19 3 22 24 TPBIAS0 2 1 0.1U_0402_16V4Z C798 R784 PCI_PAR PCI_FRAME# PCI_TRDY# PCI_IRDY# PCI_STOP# PCI_DEVSEL# 90 1 2 15P_0603_50V8J 0.01U_0402_16V7K C797 15 15 15 15 15 15 2 VCC_SC 1 C796 1 2 +3VS 0.47U_0603_16V4Z C805 @ B PCI_PAR PCI_FRAME# PCI_TRDY# PCI_IR DY# PCI_STOP# PCI_DEVSEL# CBS_IDSEL PCI_PERR# PCI_SERR# +3V_PHY Layout Note: Place close to R5C835 and Shield GND for SD_CLK +3VS 0.47U_0603_16V4Z C804 1 54 97 104 108 Layout Note: Place close to R5C835 and Shield GND for SDCLK_MSCLK 0.01U_0402_16V7K C803 C/BE3# C/BE2# C/BE1# C/BE0# 79 2 0.01U_0402_16V7K C802 2 15 26 37 +3VS C795 PCI_CBE#3 PCI_CBE#2 PCI_CBE#1 PCI_CBE#0 PCI_CBE3# PCI_CBE2# PCI_CBE1# PCI_CBE0# 2 1 10U_0805_10V4Z 15 15 15 15 1 10U_0805_10V4Z C807 4.7P_0402_50V8C 10_0402_5% C907 R947 @ VCC_MD3V AVCC_PHY3V AVCC_PHY3V AVCC_PHY3V 2 C794 SDCLK_MMCCLK VCC_3V 11 33 59 91 111 2 1 0.01U_0402_16V7K 2 VCC_ROUT VCC_ROUT VCC_ROUT VCC_ROUT VCC_ROUT 2 92 1 0.01U_0402_16V7K @ 2 VCC_RIN 1 0.01U_0402_16V7K C806 1 C808 1U_0603_10V6K R5C835 6 23 38 118 C793 4.7P_0402_50V8C 10_0402_5% C809 R783 R782 100K_0402_1% 1 @ CBS_GRST# VCC_PCI3V VCC_PCI3V VCC_PCI3V VCC_PCI3V 0.01U_0402_16V7K CLK_PCI_1394 AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 C792 +3VS A 121 122 123 124 125 126 127 1 4 5 7 9 10 12 13 14 27 28 29 30 31 32 34 36 39 40 41 42 43 44 45 46 C791 PCI_AD31 PCI_AD30 PCI_AD29 PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 PCI_AD22 PCI_AD21 PCI_AD20 PCI_AD19 PCI_AD18 PCI_AD17 PCI_AD16 PCI_AD15 PCI_AD14 PCI_AD13 PCI_AD12 PCI_AD11 PCI_AD10 PCI_AD9 PCI_AD8 PCI_AD7 PCI_AD6 PCI_AD5 PCI_AD4 PCI_AD3 PCI_AD2 PCI_AD1 PCI_AD0 0.01U_0402_16V7K U48 15 PCI_AD[0..31] Compal Secret Data Security Classification Issued Date 2008/03/13 Deciphered Date 2009/05/11 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 3 4 Title Compal Electronics, Inc. 1394+2 in 1 Card Size Document Number Custom LA-4902P Date: R ev 0.3 W ednesday, December 09, 2009 5 Sheet 27 of 47 4 5 6 @ PJSOT24C_SOT23-3 D68 Add one more bead for 8A requirement 7/1 0.1U_0402_16V4Z C724 1 1 1 1 2 2 2 2 25 DOCK_ID S 22 22 MDO3+ MDO3- 22 22 MDO2+ MDO2- MDO3+ MDO3MDO2+ MDO2- DETECT +5VS 09/2/5 HP B 14 DPB_TXP0 14 DPB_TXN0 DPB_TXP0 DPB_TXN0 14 DPB_TXP1 14 DPB_TXN1 DPB_TXP1 DPB_TXN1 14 DPB_TXP2 14 DPB_TXN2 DPB_TXP2 DPB_TXN2 14 DPB_TXP3 14 DPB_TXN3 DPB_TXP3 DPB_TXN3 DPB_AUX DPB_AUX# 14 DPB_AUX 14 DPB_AUX# C 188 187 186 185 184 183 182 188 187 186 185 184 183 182 1 2 3 4 5 6 7 1 2 3 4 5 6 7 181 180 179 178 177 176 175 174 173 172 171 170 169 168 167 166 165 164 163 162 161 160 159 158 157 156 155 154 153 152 151 150 149 148 147 146 145 144 181 180 179 178 177 176 175 174 173 172 171 170 169 168 167 166 165 164 163 162 161 160 159 158 157 156 155 154 153 152 151 150 149 148 147 146 145 144 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 G1 189 MDO1+ MDO1MDO0+ MDO0- MDO1+ MDO1- 22 22 MDO0+ MDO0- 22 22 LED_LINK_LAN_DOCK# 22 LAN_ACT# 21,22 +5VS 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 SI1 NO19 09/2/5 HP USB20_N11 15 USB20_P11 15 D CAD1 DP_CEC T105 R634 1 ADP_SIGNAL 2 1K_0402_5% LPTSTB# LPTAFD# LPTERR# LPTACK# LPTBUSY LPTPE LPTSLCT LPD7 LPD6 LPD5 LPD4 LPD3 LPD2 LPD1 LPD0 LPTSLCTIN# LPTINIT# STB_LED#_R LPTSTB# LPTAFD# LPTERR# LPTACK# LPTBUSY LPTPE LPTSLCT LPD7 LPD6 LPD5 LPD4 LPD3 LPD2 LPD1 LPD0 LPTSLCTIN# LPTINIT# 12,25 SATA_LED# 22 DOCK_ID 15 ISO_PREP# DOCK_ID ISO_PREP# 12 SATA_PTX_DRX_P5 12 SATA_PTX_DRX_N5 12 SATA_PRX_DTX_P5 12 SATA_PRX_DTX_N5 DPC_TXP0 DPC_TXN0 12 SATA_PRX_DTX_P2 12 SATA_PRX_DTX_N2 DPC_TXP2 14 DPC_TXN2 14 DPC_TXP3 DPC_TXN3 SATA_PTX_DRX_P2 SATA_PTX_DRX_N2 12 SATA_PTX_DRX_P2 12 SATA_PTX_DRX_N2 DPC_TXP1 14 DPC_TXN1 14 DPC_TXP2 DPC_TXN2 09/2/5 HP 15 USB20_N13 15 USB20_P13 DPC_TXP0 14 DPC_TXN0 14 DPC_TXP1 DPC_TXN1 C718 0.1U_0402_16V4Z A DP_CEC 14 DPB_HPD 14 SLP_S5# ADP_SIGNAL 14 DPB_CTRLCLK 14 DPB_CTRLDATA 12A P1 2 JP32B JP32A 190 1 R632 1K_0402_5% 2 10K_0402_5% Q85 SSM3K7002F_SC59-3 TPC12 VA 1 R633 2 D 2 G STB_LED# +3VALW STB_LED#_R 1 0.1U_0603_50V4Z L330 HCB2012KF-121T50_0805 1 2 0.1U_0402_16V4Z C723 0.1U_0603_50V4Z L33 HCB2012KF-121T50_0805 1 2 VA_ON# R1095 10K_0402_5% VA 0.1U_0402_16V4Z C722 2 09/4/27 HP +5VS VIN 10U_0805_10V4Z C721 2 DOCKING CONNECT 1 1 3 1 2 C720 PCI Express x1 channels PS/2 Interfaces USB 2.channels SATA Channels Display Port Channels Serial Port Parallel Port Line In Line Out RJ45 (10/100/1000) VGA 2 LAN indicator LED's Power Button I2C interface C719 A (1) (2) (2) (2) (2) (1) (1) (1) (1) (1) (1) (1) (1) (1) DOCK CONN. 184PIN 8 2 VA 7 +5VALW SI1 NO18 1 3 1 2 3 1 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100 99 98 97 96 95 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100 99 98 97 96 95 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 192 194 196 198 200 G2 G4 G6 G8 G10 G1 G3 G5 G7 G9 191 193 195 197 199 09/2/5 HP D CAD2 DP_CEC2 T106 TPC12 DP_CEC2 DPC_HPD 14 ON/OFF#_DOCK VA_ON# DPC_CTRLCLK 14 DPC_CTRLDATA 14 D_DDCDATA D_DDCCLK D_DDCDATA 18 D_DDCCLK 18 D_VSYNC 18 D_HSYNC 18 R_DOCK_RED 1 R883 2 0_0402_5% DOCK_RED R_DOCK_GRN R_DOCK_BLU 1 R884 1 R885 2 0_0402_5% 2 0_0402_5% DOCK_GRN DOCK_BLU D CD#1 RI#1 DTR#1 CTS#1 RTS#1 DSR#1 TXD1 RXD1 SER_SHD DCD#1 30 RI#1 30 DTR#1 30 CTS#1 30 RTS#1 30 DSR#1 30 TXD1 30 RXD1 30 SER_SHD 30 DOCK_ID0 15 DOCK_ID1 15 KBD_DATA KBD_CLK PS2_DATA PS2_CLK B 09/2/5 HP KBD_DATA 29 KBD_CLK 29 PS2_DATA 29 PS2_CLK 29 LINE_IN_SENSE 25 DOCK_HPS# 25 DOCK_HPS# DLINE_IN_L DLINE_IN_R DOCK_LINE_IN_L 25 DOCK_LINE_IN_R 25 DLINE_OUT_L DLINE_OUT_R DLINE_OUT_L 25 DLINE_OUT_R 25 DETECT DPC_TXP3 14 DPC_TXN3 14 DPC_AUX DPC_AUX# DPC_AUX 14 DPC_AUX# 14 FOX_QL0094L-D26601-5H C FOX_QL0094L-D26601-5H 2009/09/03 reserve for auto power on/off when dock +3VALW 1 3 2 U36 R2005 R2006 1 2 150_0402_1% 10/04 HP DOCK_RED DOCK_GRN DOCK_BLU C745 1 C746 1 C747 1 2 @ 0.1U_0402_16V4Z 2 @ 0.1U_0402_16V4Z 2 @ 0.1U_0402_16V4Z 1 VGA_RED U37 NO IN DOCK_ID 6 18 +3VS 1 VGA_GRN NO U38 IN 6 C748 DOCK_ID +3VS 18 1 VGA_BLU NO IN 6 VCC 5 COM 4 DOCK_ID C749 2 1 2 GND VCC 5 COM 4 2 0.1U_0402_16V4Z 6 @ COM 4 GND 2 DOCK_RED 3 NC RED_R 14 1 2 GND +3VS C750 2 0.1U_0402_16V4Z DOCK_GRN TS5A3157_SC70-6 2 0_0402_5% 1 VCC 5 3 NC 1 0.1U_0402_16V4Z DOCK_BLU GREEN_R 14 TS5A3157_SC70-6 3 NC BLUE_R 14 TS5A3157_SC70-6 D 1 2 1 R921 1 4 18 2009/09/03 Compal ON/OFF#_DOCK 2 150_0402_1% DOCK_BLU @ ON/OFF#_DOCK ISO_PREP# 2 @ Q95A DMN66D0LDW-7_SOT363-6 D 2 150_0402_1% R920 1 ADD by HP 10/17 Q95B DMN66D0LDW-7_SOT363-6 5 @ C1046 0.1U_0402_10V6K R919 1 DOCK_GRN ON/OFF# @ R2004 10K_0402_5% 1 DOCK_RED 2 0_0402_5% IN NC<-->COM NO<-->COM L ON OFF H OFF ON Compal Secret Data Security Classification ON/OFF# ON/OFF# 25 PWRBTN_OUT# 2008/09/15 Issued Date Deciphered Date 2009/12/31 Title THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 2 3 http://laptop-motherboard-schematic.blogspot.com/ 4 5 6 Compal Electronics, Inc. DOCK CONN PWRBTN_OUT# 14,25,29 Size Document Number Custom LA-4902P Date: 7 W ednesday, December 09, 2009 R ev 0.3 28 Sheet 8 of 47 1 2 3 4 RP26 TP_CLK TP_DATA KBD_CLK KBD_DATA 8 7 6 5 R950 1 2 SPI_SO_KBC 22_0402_5% 25 KSO[0..13] SI2 NO7 10K_8P4R_5% RP27 SP_CLK SP_DATA PS2_DATA PS2_CLK 8 7 6 5 10K_8P4R_5% T131 TPC12 KSI0 T132 TPC12 KSI1 SI1 NO66 25 KSI[0..7] KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 TP_CLK 2 10P_0402_50V8J TP_DATA 2 SP_CLK 10P_0402_50V8J 2 10P_0402_50V8J SP_DATA 2 10P_0402_50V8J PS2_CLK 2 PS2_DATA 10P_0402_50V8J 2 10P_0402_50V8J KBD_CLK 2 KBD_DATA 10P_0402_50V8J 2 10P_0402_50V8J 25 25 25 25 28 28 TP_CLK TP_DATA SP_CLK SP_DATA PS2_CLK PS2_DATA TP_CLK TP_DATA SP_CLK SP_DATA PS2_CLK PS2_DATA 35 36 61 62 66 67 KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 IMCLK IMDAT KCLK KDAT EMCLK EMDAT +VCC0 4 1 2 C761 G 2 36 BAT_ALARM 12 KBC_SPI_CLK_R 1 2 22P_0402_50V8J G C760 22P_0402_50V8J 1 32.768KHZ_12.5PF_QTFM28-32768K1 3 Y7 31 SPI_CLK 23 MC2_DISABLE 12 KBC_SPI_CS1#_R 31 SPI_CS1# 24 MC1_DISABLE 14,33,40 PM_SLP_LAN# 35 PMC 42 OCP_A_IN 1 R953 1 1 R1113 R1114 SPI_CS1#_KBC 2 0_0402_5% 2 2 300_0603_5% 300_0603_5% LAD[3] LAD[2] LAD[1] LAD[0] 52 53 LFRAME# LRESET# XTAL1 XTAL2 68 VCC0 1 2 3 30 31 32 33 34 43 44 Alarm [CKT#2]/GPIO36 HSTCLK/GPIO41 FLCLK GPIO39 HSTCS1#/GPIO42 FLCS1# GPIO38 GPIO37 ADC1/GPIO46 ADC_TO_PWM_IN KBC1098-NU_TQFP128_14X14 119 GPIO01 GPIO02 GPIO03 GPIO04/KSO14 GPIO05/KSO15 107 79 80 81 83 THM_TRAVEL# 85 86 87 PM_RSMRST# CRACK_BGA GPIO9 GPIO11/AB2A_DATA GPIO12/AB2A_CLK GPIO13/AB2B_DATA GPIO14/AB2B_CLK GPIO15/FAN_TACH1 GPIO16/FAN_TACH2 GPIO17/A20M 88 89 90 91 92 101 102 AB2A_DATA R670 1 AB2A_CLK R671 1 R672 1 R673 1 GPIO20/PS2CLK GPIO21/PS2DAT GPIO24/KSO16 ADP_PRES[CKT#2]/GPIO27/WK_SE05 103 105 4 74 AB1A_DATA AB1A_CLK 111 112 AB1B_DATA AB1B_CLK 109 110 GPIO07/PWM3 GPIO08/RXD GPIO09/TXD D40 2 CH751H-40PT_SOD323-2 1 Q10B @ R1022 1 KB_RST# 15 FAN_PWM 4 BAT_PWM_OUT 35 CHGCTRL 35 09/2/5 HP 2 0_0402_5% BATSELB_A# Build Phase R661 2 0_0402_5% FET_A DB1 X DB2 X DBx X THM_TRAVEL# 34 ON/OFFBTN_KBC# 25 TPC12 T120 SLP_S3# SLP_S3# 14,25,32,33,35,38,39 8051_RECOVER# 31 PM_RSMRST# 14 CRACK_BGA 8,17 TPC12 T121 2 2 2 2 R658 R657 X X SI1 X SI2 X SIx X X X X PVx 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% CAP_DAT 13,25 CAP_CLK 13,25 CELLS 35 A_SD# 25 ADP_DET# 42 THM_MAIN# 34 GATEA20 15 X B to Power SI, No53 09/5/4 HP to Power KBD_CLK 28 KBD_DATA 28 PWRBTN_OUT# 14,25,28 ADP_PRES 33,35,42 X --> means installed +3VS 08/11/17 HP 09/2/5 HP KB_RST# R62 2 10K_0402_5% 1 to Power AB1A_DATA AB1A_CLK AB1B_DATA AB1B_CLK GPIO26/KSO17 NC_CLOCKI 32KHZ_OUT/GPIO22/WK_SE01 RESET_OUT#/GPIO06 PWRGD VCC1_RST# ADC_TO_PWM_OUT/GPIO19 TEST PIN 108 59 75 60 78 77 38 EA# R676 1 32K_CLK PGD_IN PW R_GD R679 1 R680 1 69 TEST CFETB/GPIO10 BAT_LED# PWR_LED#/8051TX FDD_LED#/8051RX 116 113 115 114 AC[CKT#2]/GPIO23 ADC2/GPIO40 Q/GPIO33 GPIO34 GPIO35 AVCC 41 42 65 64 63 40 2 0_0402_5% @ 2 1K_0402_5% KBRST# CAP_INT 25 +3VL R893 1 @ 2 10K_0402_5% VCC1_PW RGD R894 1 2 10K_0402_5% CRACK_BGA R895 1 2 100K_0402_5% GPIO9 R1081 1 2 10K_0402_5% KBC_PW R_ON R896 1 2 10K_0402_5% LATCH R897 1 2 10K_0402_5% FET_A R898 1 2 10K_0402_5% FET_B R899 1 2 10K_0402_5% DB1 No79 2 0_0402_5% 2 220_0402_1% R1023 1 ADP_EN 42 PM_PWROK 41 PW R_GD 12,32 VCC1_PW RGD 37,42 OCP 42 2 0_0402_5% R686 1 09/2/10 HP to Power 2 1K_0402_5% R1024 1 C 2 0_0402_5% R690 1 1 to Power 2 100K_0402_5% R1115 R694 1 2 FET_B 36 AMBER_BATLED# 25 8051TX 31 8051RX 31 +3VL SI, No68 09/05/8 HP AC_ADP_PRES 35 ADP_A_ID 42 LATCH 36 LID_SW# 20,25 CAP_RST_EC 25 300_0603_5% 2 0_0402_5% 09/02/10 HP SI, No70 09/5/8 HP 4.7K_0804_8P4R_5% AB1A_CLK 1 8 AB1A_DATA 2 7 AB1B_CLK 3 6 AB1B_DATA 4 5 09/2/10 HP PGD_IN PGD_IN R699 1 @ 2 10K_0402_5% 2 100K_0402_5% SI, No56 09/5/4 HP Removed Install Install Install Install PM_PWROK (main battery selection) (OCP function) (travel battery selection) (SMSC CBB will required it) PW R_GD 1 2 @ D 1 2 1 C1055 2 1 0.1U_0402_16V4Z R1021 R1022 R1023 R1024 R694 +3VL RP20 SI, No82 09/5/18 HP +3VL PM_RSMRST# R700 1 1 2 C984 2200P_0402_50V7K +3VL SI, No55 09/5/4 HP AB1B_DATA 34 AB1B_CLK 34 R675 1 73 to Power to Power AB1A_DATA 34 AB1A_CLK 34 @ 2 Q10A R660 PV R1116 0_0402_5% Issued Date add R1113~R1116 and C982~C984, these should be placed at pins nearby (except R1116) 2 http://laptop-motherboard-schematic.blogspot.com/ Compal Secret Data Security Classification SI, No57 09/5/4 HP 1 36 Main Battery selection to Power to Power C1052 1 GREEN_BATLED# KBRST# SI, No53 09/5/4 HP DB1 No82 to Power KBC_PW R_ON 37 AQUAWHITE_BATLED# 12,25 R1021 1 10/03 HP AVSS 08/11/09 remove all options of 1091 Q87B AQUAWHITE_BATLED# 5 4 123 122 121 120 118 2 0_0402_5% 0.1U_0402_16V4Z 2 6 49 CFETA/OUT7/nSMI OUT8/KBRST OUT9/PWM2 OUT10/PWM0 PWM_CHRGCTL R665 1 @ 1 124 125 2 +VCC0 Q87A 2N7002DWH_SOT363-6 @ 2N7002DWH_SOT363-6 C1051 2 OUT0/(SCI) OUT1/IRQ8# 1 2 C982 2200P_0402_50V7K 1 2 C983 2200P_0402_50V7K 0.1U_0402_16V4Z C764 2 1U_0603_10V4Z C763 R717 @ 0_0402_5% 1 A SI, No35 SI2 NO7 10K_0402_5% @ 4 ADP_EN 2 PM_SLP_M# 14,32,33 SUS_PW R_ACK 14 AC_PRESENT 14 MUTE_LED_CNTL 25 PCI_SERR# 15,27,31 14 R710 0_0402_5% 1 3 @ 0.1U_0402_16V4Z D R1122 Q10B 2N7002DWH_SOT363-6 @ 09/2/5 HP +RTCVCC 2 0_0402_5% 2 0_0402_5% DB2 NO72 09/2/20 HP +3VL 1 @ 2 4.7U_0805_10V4Z 93 98 99 100 126 GPIO25 LPC Bus C758 1 15 GPIO28 GPIO29 GPIO30 GPIO31 GPIO32 Power Mgmt/SIRQ 70 71 @ @ 6 SI1 NO42 8/31 HP CAP Miscellaneous C R Y1 C R Y2 51 50 48 46 R660 1 R661 1 AVSS C CLKRUN# SER_IRQ PCI_CLK EC_SCI# +3VS 45 C908 @ LPC_LAD3 LPC_LAD2 LPC_LAD1 LPC_LAD0 55 57 54 76 AGND 2 12,23,30,31 LPC_LFRAME# 15,30 NPCI_RST# 2 1 12,23,30,31 12,23,30,31 12,23,30,31 12,23,30,31 CLK_PCI_KBC RUNSCI_EC# 72 @ PM_CLKRUN# SIRQ CLK_PCI_KBC RUNSCI_EC# 2 0_0402_5% KSO3 KSO2 KSO1 KSO0 Access Bus Interface 14,27,30,31 12,27,30,31 15 15 4.7P_0402_50V8C 10_0402_5% R951 1 CLK_PCI_KBC VSS VSS VSS VSS VSS VSS VSS 1 C995 1 C996 1 C997 1 C998 1 C999 1 C1000 1 C1001 1 C1002 29 28 27 26 25 24 23 22 1 R659 VCC2 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12/GPIO00/KBRST KSO13/GPIO18 VCC1 39 58 84 106 14 21 20 19 18 17 16 13 12 10 9 8 7 6 5 11 37 47 56 104 82 117 1 2 3 4 FLDATAOUT HSTDATAOUT/GPIO45 FLCS0# HSTCS0#/GPIO44 FLDATAIN HSTDATAIN/GPIO43 Keyboard/Mouse Interface KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 128 127 97 96 95 94 VCC1 VCC1 VCC1 VCC1 VCC1 1 R949 SPI_CS0#_KBC 2 0_0402_5% General Purpose I/O Interface +5VS SPI_SI KBC_SPI_SI_R SPI_CS0# KBC_SPI_CS0#_R SPI_SO KBC_SPI_SO SMSC_1098-NU_TQFP-128P 31 12 31 12 31 12 2 0_0402_5% 2 0_0402_5% 3 2 U40 1 2 3 4 1 09/2/5 HP 10K_8P4R_5% @ @ 1 2 R657 1 R658 1 5 2 C757 0.1U_0402_16V4Z 2 1 C756 4.7U_0805_10V4Z 2 1 C755 0.1U_0402_16V4Z 2 KSI7 KSI6 KSI5 KSI4 8 7 6 5 1 C754 0.1U_0402_16V4Z RP18 1 2 3 4 1 C753 0.1U_0402_16V4Z 1 10K_8P4R_5% C752 0.1U_0402_16V4Z KSI3 KSI2 KSI1 KSI0 8 7 6 5 2 +3VL 1 2 3 4 B Q10A 2N7002DWH_SOT363-6 System Board ID Detect RP16 A 5 SI1 NO74 +3VL 2008/09/15 Deciphered Date 2009/12/31 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 3 4 Title Compal Electronics, Inc. KBC1098 Size Document Number R ev 0.3 LA-4902P Date: W ednesday, December 09, 2009 5 Sheet 29 of 47 1 2 3 4 5 +3VS RP29 A DCD#1 RI #1 CTS#1 DSR#1 1 2 3 4 A 8 7 6 5 +5VS +5VS_PRN 4.7K_0804_8P4R_5% D69 2 U65 1 2 3 4 SIO_GPIO46 SIO_GPIO45 SIO_GPIO44 SIO_GPIO43 12,23,29,31 LPC_LFRAME# 12 LPC_LDRQ#0 15,29 NPCI_RST# LPCPD# 9 11 12 13 LAD0 LAD1 LAD2 LAD3 14 15 LFRAME# LDRQ# 16 17 PCI_RESET# LPCPD# 18 19 20 6 CLKRUN# PCI_CLK SER_IRQ IO_PME# 10K_8P4R_5% RP33 8 7 6 5 1 2 3 4 SIO_IRQ SIO_GPIO12 SIO_GPIO10 +3VS 1 R1059 PM_CLKRUN# CLK_PCI_SIO S IRQ SIO_PME# 14,27,29,31 PM_CLKRUN# 15 CLK_PCI_SIO 12,27,29,31 SIRQ 2 10K_0402_5% CLK_14M_SIO 13 CLK_14M_SIO 8 CLK14 SERIAL I/F 8 7 6 5 LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3 LPC I/F 12,23,29,31 12,23,29,31 12,23,29,31 12,23,29,31 RP31 RXD1 CLOCK +3VS SER_SHD 2 2 R1060 1 SIO_GPIO23 R1099 10K_0402_5% 10K_0402_5% 1 1 1 1 1 2 2 2 2 4.7U_0805_10V4Z 7 10 23 38 46 0.1U_0402_16V4Z VTR VCC VCC VCC VCC SIO_GPIO42 10K_0402_5% * R1064 1 2 3 4 8 7 6 5 RP34 LPTPE LPTSLCT LPD7 LPD6 +3VS 1 2 3 4 8 7 6 5 4.7K_0804_8P4R_5% RP35 LPTSTB# LPTAFD# LPTACK# LPTBUSY 1 2 3 4 8 7 6 5 B 4.7K_0804_8P4R_5% R1061 1 2 4.7K_0402_5% SYSOPT Base I/O Address 0 = 02Eh 1 = 04Eh LPCPD# 2 4.7K_0402_5% 1 CLK_PCI_SIO 8/31 HP CLK_14M_SIO 1 2 10K_0402_5% 1 R2000 RP32 LPTERR# 6/30 HP C953 POWER LPTINIT# 28 LPTSLCTIN# 28 LPD0 28 LPD1 28 LPD2 28 LPD3 28 LPD4 28 LPD5 28 LPD6 28 LPD7 28 LPTSLCT 28 LPTPE 28 LPTBUSY 28 LPTACK# 28 LPTERR# 28 LPTAFD# 28 LPTSTB# 28 C952 2 1 4.7K_0804_8P4R_5% LPD5 LPD4 LPD3 LPD2 LPC47N217N-ABZJ_QFN56_8X8 R1063 1 EPAD LPTINIT# LPTSLCTIN# LPD0 LPD1 LPD2 LPD3 LPD4 LPD5 LPD6 LPD7 LPTSLCT LPTPE LPTBUSY LPTACK# LPTERR# LPTAFD# LPTSTB# 0.1U_0402_16V4Z 57 10K_0402_5% 35 36 37 39 40 41 42 43 44 45 47 48 49 50 51 52 53 C951 2 INIT# SLCTIN# PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 SLCT PE BUSY ACK# ERROR# ALF# STROBE# R1058 1K_0402_5% 1 2 TXD1 28 DSR#1 28 RTS#1 28 CTS#1 28 DTR#1 28 RI#1 28 DCD#1 28 0.1U_0402_16V4Z 1 SIO_GPIO41 RXD1 TXD1 DSR#1 RTS#1 CTS#1 DTR#1 RI #1 DCD#1 C950 R1062 SIO_GPIO23 GPIO41 GPIO42 GPIO43 GPIO44 GPIO45 GPIO46 GPIO47 GPIO10 GPIO11/SYSOPT GPIO12/IO_SMI# GPIO13/IRQIN1 GPIO14/IRQIN2 GPIO23 PARALLEL I/F 28 21 22 24 25 26 27 28 29 30 31 32 33 34 GPIO R1098 1 2 0_0402_5% @ B SIO_GPIO41 SIO_GPIO42 SIO_GPIO43 SIO_GPIO44 SIO_GPIO45 SIO_GPIO46 SER_SHD_GPIO47 SIO_GPIO10 SYSOPT SIO_GPIO12 SIO_IRQ 54 55 56 1 2 3 4 5 CH751H-40PT_SOD323-2 RP30 1 8 2 7 3 6 4 5 LPD1 LPD0 LPTSLCTIN# LPTINIT# 4.7K_0804_8P4R_5% 10K_8P4R_5% SI1 NO43 09/4/27 HP RXD1 TXD1 DSR1# RTS1# CTS1# DTR1# RI1# DCD1# 28 1 R1066 @ 10_0402_5% 2 2 R1065 @ 10_0402_5% 1 C @ C954 18P_0402_50V8J C955 10P_0402_50V8J 2 @ C D D Compal Secret Data Security Classification Issued Date 2 Deciphered Date 2009/09/09 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. http://laptop-motherboard-schematic.blogspot.com/ 1 2008/09/09 3 4 Title Compal Electronics, Inc. LPC47N217N-ABZJ_QFN Size Document Number Rev 0.3 LA-4902P Date: Wednesday, December 09, 2009 5 Sheet 30 of 47 3 4 TPM1.2 on board 1 +3VS R2001 1 8/31 HP ACES_85203-04021 CONN@ 2 +3VS U34 LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3 LPC_LFRAME# 2 4.7K_0402_5% 12,27,29,30 SIRQ 15 CLK_PCI_TPM 1 10P_0402_50V8K 2 @ C716 R617 0_0402_5% 1 IO2 GND GPIO GPIO2 6 2 ˦ ˟ ˕ ʳ ˌ ˉ ˆ ˈ ʳ ˧ ˧ ʳ ˄˄ˁˁ ˅ 7 CLKRUN# TEST1 TESTB1/BADD TPM_GPIO TPM_GPIO2 Base I/O Address 0 = 02Eh 1 =* 04Eh 8 9 R613 0_0402_5% 1 2 +3VS TPC12 T86 TPC12 T87 R610 4.7K_0402_5% 1 2 R614 @ 4.7K_0402_5% PP NC NC NC TPM_XTALO 14 XTALO TPM_XTALI 13 XTALI/32K IN 3 12 1 @ 2 PRTR5V0U2X_SOT143-4 GND GND GND GND 3 B USB20_P10 2 IO1 15 14,27,29,30 PM_CLKRUN# 2 VIN 2 10_0402_5% LAD0 LAD1 LAD2 LAD3 LFRAME# LRESET# LPCPD# SERIRQ LCLK 1 D37 4 USB20_N10 26 23 20 17 22 16 28 27 21 @ 1 R612 R615 @ 4.7K_0402_5% +5VALW LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3 LPC_LFRAME# PLT_RST# LPC_PD# SIRQ CLK_PCI_TPM 1 12,23,29,30 12,23,29,30 12,23,29,30 12,23,29,30 12,23,29,30 1 1 FPR_OFF R616 220K_0402_1% 1 2 2 10U_0805_10V4Z 0.1U_0402_16V4Z R611 10K_0402_5% 1 3 5 7 TPM_XTALO 2 22P_0402_50V8J 25 18 11 4 2 1 USB20_N10 USB20_P10 2 C715 C714 1 15 15 1 3 5 7 A 2 1 G JP30 2 2 4 4 6 6 8 8 USB20_N1_PWR D S 3 15 1 C713 24 19 10 SI, No14 SI2, No5 AP2301GN 1P_SOT23 2 2 +3VALW Q34 1 0.1U_0402_16V4Z 2 C712 1 0.1U_0402_16V4Z 3 G 2 C711 2 G 2 R608 10M_0402_5% 1 0.1U_0402_16V4Z 32.768KHZ_12.5PF_QTFM28-32768K1 Y6 1 4 A 1 C710 TPM_XTALI 2 22P_0402_50V8J 0.1U_0402_16V4Z C709 1 C708 +3VS +3VALW VDD VDD VDD Finger Printer 5 5 2 VSB 1 SLB 9635 TT 1.2_TSSOP28 B 6/30 HP P/N change to SC300000P00, CM1293A-02SR DB2: No. 67 BIOS ROM(8MB) 8MB SPI ROM SI1: No28 HP +3VL09/4/10 SPI_CLK +3VL 1 C 1 C949 0.1U_0402_16V4Z 20mils 25mA 2 SPI_WP# R1034 1 20mils +3VL 2 3.3K_0402_5%SPI_HOLD#_1 SPI_CS0# 29 SPI_CS0# 29 SPI_CLK R2009 1 2 15_0402_5% 29 SPI_SI R2012 1 2 15_0402_5% U63 8 VCC 3 W 7 HOLD 1 S 6 C 5 D CONN@ 4 @ VSS DB2: No. 73 1 @ 2 SPI_SO_R 64M MX25L6405DZNI-12G WSON 8P 1 2 R1035 24.9_0402_1% R620 1 2 100K_0402_5% B+_DEBUG C No connect anything JP31 1 SI2 NO7 Q 8051_RECOVER# 2 R1096 100K_0402_5% @ SI1: No20 4.7P_0402_50V8C 10_0402_5% C909 2 +3VL SPI ROM SCKET R954 8MB SPI ROM LPC Debug Port 15 CLK_PCI_DB 12,23,29,30 12,27,29,30 4,12,15,21,23,25 15,27,29 12,23,29,30 12,23,29,30 12,23,29,30 12,23,29,30 2 SPI_SO 29 16 PIN Close SPI ROM 29 29 29 37 8 PIN SI1: No40 8 PIN ,16 PIN Co-layout LPC_LFRAME# SIRQ PLT_RST# PCI_SERR# LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3 8051TX 8051RX 8051_RECOVER# DEBUG_KBCRST CLK_PCI_DB SIRQ 8051_RECOVER# SPI_CLK_JP SPI_CS0#_JP SPI_SI_JP SPI_SO_JP SPI_HOLD#_0 29 SPI_CS1# DB2: No. 81 &U2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Ground LPC_PCI_CLK Ground LPC_FRAME# +V3S LPC_RESET# +V3S LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 VCC_3VA PWR_LED# CAPS_LED# NUM_LED# VCC1_PWRGD SPI_CLK SPI_CS# SPI_SI SPI_SO SPI_HOLD# Reserved Reserved Reserved ACES_87216-2404 CONN@ D D +3VL SPI_HOLD#_0 1 R625 SPI_CLK_JP R626 1 SPI_SI_JP R627 1 SPI_CS0#_JP 1 R628 SPI_SO_JP 1 R629 20mils R623 1 2 45@ S IC FL 64M W25Q64BVSSIG SOIC 8P SPI ROM SPI_WP# 3.3K_0402_5% 1 R624 2 @ 0_0402_5% SPI ROM SPI_HOLD#_1 2 0_0402_5% SPI_CLK 2 15_0402_5% SPI_CS0# 2 0_0402_5% SPI_SO 2 22_0402_5% 1 Compal Secret Data Security Classification SPI_SI 2 15_0402_5% Issued Date http://laptop-motherboard-schematic.blogspot.com/ Deciphered Date 2009/12/31 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Apply part number of 64Mb SPI ROM 2 2008/09/15 3 4 Title Compal Electronics, Inc. TCG/BIOS ROM/PS2/SW LPC DEBUG Size Document Number R ev 0.3 LA-4902P Date: W ednesday, December 09, 2009 5 Sheet 31 of 47 1 2 3 4 5 6 7 8 +3VS 1 R732 1 2 1M_0402_5% R734 10K_0402_5% 8 U42A 38 2 2 49.9K_0402_1% 5 P 4 A G VCCP_1.5VSPW RGD 4 2 IN2 U43 4 O PW R_GD 12,29 P ESD request 9/16 2 1 2 @ VTTPWRGOOD 4 R748 2.49K_0402_1% LM393DR_SO8 2 4 7 R743 4.99K_0402_1% R981 1 2 1M_0402_5% +5VALW C913 B 8 2 R777 2 IN1 U42B O 1R982 2 10K_0402_5% 2VREF_393 3 + P B - 2 - G +1.5VS C774 6 + 2VREF_393 U57A O 4 1 56.2K_0402_1% 5 G 8 R744 1 2 1M_0402_5% +5VALW 2 R747 10K_0402_5% 2VREF_393 2VREF_393 +1.8VS VCCP_POK 1 MC74AHC1G08DFT2G SC70 5P 3300P_0402_25V7K R751 O 1 C773 1 2 16.2K_0402_1% 1 1 R750 +1.05VS IN2 U336 7/7/2009 HP 3300P_0402_25V7K 27.4K_0402_1% 1 2 R763 23.2K_0402_1% 1 2 R776 1 IN1 2 3 C772 1000P_0402_50V7K 1 3300P_0402_25V7K 2 49.9K_0402_1% SLP_S3# 1 MC74AHC1G08DFT2G SC70 5P C1056 1 R749 VCCP_EN 38 0.1U_0402_16V4Z +3VS 2 3.3K_0402_5% +3VALW 2 SHORT PADS 2 2 @ 1 R745 1 LM393DR_SO8 4 - J2 +3VALW 1 1 43 GFXVR_PWRGD 1 O 1 2 49.9K_0402_1% + 2 5 1 R740 3 P 2 10K_0402_5% 2 2VREF_393 34.8K_0402_1% G 1 R742 2 11.5K_0402_1% D44 2 1 2 3.3K_0402_5% CH751H-40PT_SOD323-2 D45 2 1 2 3.3K_0402_5% CH751H-40PT_SOD323-2 1 3 14,25,29,33,35,38,39 SLP_S3# 1 R741 1 R738 R737 2VREF_51125 1 R739 +0.75VS A M_PWROK 2 76.8K_0402_1% P 1 R736 +5VS 14 2 3.3K_0402_5% G 1 R735 1.5V_POK 2 +5VALW 40 1 LM393DR_SO8 MDC STANDOFF 1 1M_0402_5% 1 R562 2 H12 HOLEA H13 HOLEA 1 H5 HOLEA 1 H4 HOLEA DB1 NO78 1 R568 41.2K_0402_1% 2 1 2VREF_51125 1 2VREF_51125 H3 HOLEA 1 H2 HOLEA 1 H1 HOLEA H7 HOLEA 1 H6 HOLEA +3VALW +5VALW C910 1000P_0402_25V8J R565 2 M_PWROK 1 1 1 M_PWROK 14 H8 HOLEA H9 HOLEA H10 HOLEA H11 HOLEA D61 1 2 1 1 CH751H-40PT_SOD323-2 7/15/2009 Johnson R571 1 2 1M_0402_5% C527 H17 HOLEA 2 C816 0.068U 16V K X7R 0402 2 1 1 3300P_0402_50V7K 1 2 2 C R570 1K_0402_5% 1N4148WS-7-F_SOD323-2 just change part R567 number, waiting 86.6K_0402_1% for database 1 1 4 INLMV331IDCKRG4_SC70-5 1 1 H22 H23 HOLEAHOLEA 2 2 3.3K_0402_5% H21 HOLEA 1 5 OUT D60 R386 1 H15 HOLEA H18 HOLEA H19 HOLEA H20 HOLEA 1 2 14.7K_0402_1% VCC+ 1 +1.05VM R509 1 GND 3 1 2 46.4K_0402_1% IN+ 2 1 R566 1 1 10K_0402_5% 1 +3VM 14,29,33 PM_SLP_M# 09/2/7 HP 2 3.3K_0402_5% 1 R564 1 40 1.05VM_LAN_POK 1 H14 HOLEA R563 3.3K_0402_5% U338 1 2 1 2 C 1 2 R569 71.5K_0402_1% ZZZ1 FM1 1 D FM2 1 1 FM3 1 FM4 D PCB-MB Compal Secret Data Security Classification 2008/09/15 Issued Date Deciphered Date 2009/12/31 Title 1 2 3 http://laptop-motherboard-schematic.blogspot.com/ 4 5 6 Compal Electronics, Inc. POK CKT THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Size Document Number R ev 0.3 LA-4902P Date: 7 W ednesday, December 09, 2009 32 Sheet 8 of 47 1 2 Q40 +3VALW 3 1 D 1 S 2 Q42 SSM3K7002F_SC59-3 2 G Q41 SSM3K7002F_SC59-3 S 1 2 1 2 1 2 @ 1 2 A @ Q43 SSM3K7002F_SC59-3 2 G 3 14,29,40 PM_SLP_LAN# 1 2 LAN_EN 2 G 3 2 1 1 2 1 2 PM_SLP_M 1 D 0.1U_0402_10V6K LAN_EN D C1040 0.1U_0402_10V6K 1 2 4.7K_0402_5% R760 470_0402_5% R759 470_0402_5% C1039 0.1U_0402_10V6K R762 C778 10U_0805_10V4Z 2 C1038 0.1U_0402_10V6K 2 1 C1036 4 1 C1037 0.1U_0402_10V6K R761 47K_0402_5% 0.1U_0402_16V4Z C777 2 +3VS +3VM +1.05VM 1 G 2 RUNON 1 0.1U_0402_16V4Z C779 1 10U_0805_10V4Z 2 SI1 NO64 R983 1 2 0_0402_5% Discharge circuit-2 for V-M +3VM D S 3 C783 1 0.1U_0402_16V4Z C781 2 10U_0805_10V4Z C780 1 5 AP2301GN 1P_SOT23 +1.05VS SI7326DN-T1-E3_PAK1212-8 U45 1 2 5 3 A 4 +3VALW to +3VM Transfer +1.05VM_LAN to +1.05VS Transfer +1.05VM_LAN 3 S +1.05VS +3VALW to +3VS Transfer 4 1 2 4 S D 2 G 1 4 1 1 2 3 2 1 3 3 1 2 1 SI1 NO46 +VCCP +GFX_CORE 1 R1109 470_0402_5% R1108 470_0402_5% Q49 14,29,32 PM_SLP_M# SSM3K7002F_SC59-3 2 G S 3 3 D PM_SLP_M# D SLP_S3 Q60 SSM3K7002F_SC59-3 2 G S 3 Q86A 2N7002DWH_SOT363-6 2 SLP_S4 Q86B 2N7002DWH_SOT363-6 5 4 Q48 14,25,29,32,35,38,39 SLP_S3# SSM3K7002F_SC59-3 RUNON C SLP_S3 1 SLP_S3 D 2 G SLP_S4# 6 PM_SLP_M 7 14,40 2 SLP_S4 1 SLP_S4 1 26 2 3 C789 10U_0805_10V4Z 2 2 R915 100K_0402_5% 2 1 1 R768 100K_0402_5% 1 +3VL 1 +3VL 2 1 1 4 2 2 0.1U_0402_10V6K C788 1 1 EMI requet 8/22 R767 100K_0402_5% 0.1U_0402_16V4Z 2 C790 10U_0805_10V4Z 0.1U_0402_10V6K C1044 +5VS 1 1 7 Q71 SSM3K7002F_SC59-3 +3VL C 2 B 10/17 HP correct it SI7326DN-T1-E3_PAK1212-8 U47 1 2 5 3 1 2VREF_51125 PM_SLP_M +5VALW to +5VS Transfer +5VALW 2 C1045 0.1U_0402_10V6K S RUNON 2 10U_0805_10V4K 29,35,42 ADP_PRES RUNON 1 2 R1025 1 2 820K_0402_5% 2 G 2 C902 D 1 1 0.1U_0402_10V6K Q46 SSM3K7002F_SC59-3 SSM3K7002F_SC59-3 3 2 R984 1 2 0_0402_5% C901 R974 330K_0402_5% 1 2 2 1 0.1U_0402_10V6K Q68 B+ @ 1 C900 2 C986 10U_0805_10V4K S 2 G 29,35,42 ADP_PRES + C899 C787 0.01U_0402_16V7K 2 D 2 1 330U_B2_2VM_R15M 1 2 1 +1.5VS SI1 NO80 1 SI7326DN-T1-E3_PAK1212-8 Q61 1 2 5 3 SI1 NO64 10U_0805_10V4Z Q45 SSM3K7002F_SC59-3 +1.5V C895 2 1 0.1U_0402_16V4Z SLP_S3 2 G R766 470_0402_5% C893 S R765 820K_0402_5% 1 10U_0805_10V4Z D 2 +1.05VM SI7326DN-T1-E3_PAK1212-8 U55 1 2 5 3 C892 B 1 C1043 0.1U_0402_10V6K RUNON J3 SHORT PADS C1041 2 C786 2 10U_0805_10V4Z +1.5V to +1.5VS Transfer 2 +1.05VM_LAN 1 10U_0805_10V4Z C785 R764 330K_0402_5% +1.05VM_LAN to +1.05VM Transfer 0.1U_0402_16V4Z +3VALW +3VS SI7326DN-T1-E3_PAK1212-8 U46 1 2 5 3 1 1 C784 C1042 0.1U_0402_10V6K B+ S Discharge circuit-1 +1.05VS +1.5VS +3VS +1.8VS +5VS +1.5V +0.75VS S Q54 SSM3K7002F_SC59-3 SLP_S4 1 D S Q55 SSM3K7002F_SC59-3 2 G SLP_S3 1 2 D 2 G D S Q56 SSM3K7002F_SC59-3 2 G 2008/09/15 Deciphered Date 2009/12/31 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 1 2 http://laptop-motherboard-schematic.blogspot.com/ 3 D Compal Secret Data Security Classification Issued Date R775 22_0402_5% 3 SLP_S3 1 Q53 SSM3K7002F_SC59-3 3 S 2 1 1 R774 470_0402_5% 2 D SLP_S3 2 G 1 Q52 SSM3K7002F_SC59-3 3 S 1 D SLP_S3 2 G 3 Q51 SSM3K7002F_SC59-3 R773 470_0402_5% 2 R772 470_0402_5% 2 S 1 D SLP_S3 2 G 3 1 Q50 SSM3K7002F_SC59-3 3 S 2 G D R771 470_0402_5% 1 R770 220_0402_1% 2 1 D 3 SLP_S3 1 1 2 1 09/6/30 HP R769 470_0402_5% 4 Title Compal Electronics, Inc. DC/DC Circuits Size Document Number R ev 0.3 LA-4902P Date: W ednesday, December 09, 2009 5 Sheet 33 of 47 1 2 3 4 ADP_SIGNAL PJP1 GND1 4 GND2 6 GND_1 SINGAL 5 PWR1 1 ADPIN PC2 1000P_0402_50V7K 1 PR1 @15K_0402_5% 2 2 1 PD1 @PJSOT24CH 3P C/A SOT-23 PC3 100P_0402_50V8J PC4 1000P_0402_50V7K 2 1 2 2 PWR2 @FOX_JPD113E-LB103-7F 1 GND_4 1 9 A 1 ADPIN 2 GND_3 PC1 100P_0402_50V8J GND_2 8 VIN PL1 SMB3025500YA_2P 1 2 3 7 2 A 3 VMB_A 1 2 PR2 1 1M_0402_1% PC6 .01U_0402_50V4Z 2 PC5 1000P_0402_50V7K 2 1 2 3 4 5 6 7 8 BATT_A PL2 SMB3025500YA_2P 1 2 1 2 3 4 5 6 7 8 1 PJP2 2 1 PR6 100_0402_5% 2 1 1 PR89 100K_0402_1% AB1A_DATA 29 B 1 PD17 BAV99WT1G_SC70-3 3 1 1 1 C 2 G S PQ30 SSM3K7002FU_SC70-3 1 AB1A_CLK 29 1 1 2 D +3VL 3 2 3 2 3 2 PR90 150K_0402_1% PD15 BAV99WT1G_SC70-3 PR92 294K_0402_1% 1 2 OCP_ADJ VL PH1 under CPU botten side : CPU thermal protection at 90 +-3 degree C (Need to be checked) 2 PR91 220K_0402_5% 2 42 B PC9 100P_0402_50V8J 2 2 THM_MAIN# E PQ29 MMBT3906H PNP SOT23-3 3 PR4 100K_0402_5% 29 PC8 100P_0402_50V8J 2 1 PR88 69.8K_0402_1% 1 2 PR5 100_0402_5% 2 1 PR3 1K_0402_5% 2 1 VL 1 +3VL PC7 100P_0402_50V8J 2 1 @SUYIN_200046GR008G102ZR_8P-T B PD16 BAV99WT1G_SC70-3 C C 29 THM_TRAVEL# 1 2 PR13 75K_0402_1% 1 S G PQ1 SSM3K7002FU_SC70-3 2 2 G PU15B LM393DR SO 8P PC13 1000P_0402_50V7K 2 PR17 150K_0402_1% 2 1 2VREF_51125 7 1 4 PR16 19.1K +-1% 0402 - D 3 O 1 6 2 PC12 0.1U 25V K X7R 0603 2 1 PC1103 @0.1U_0402_10V6K 2 1 2 8 + P 1 1 2 PR14 100_0402_5% 2 1 5 37 1 D 3 2 3 2 3 2 EN0 PR12 53.6K +-1% 0603 1 2 AB1B_CLK 29 0.1 Compal Secret Data Security Classification +3VL Issued Date http://laptop-motherboard-schematic.blogspot.com/ 1 1 PR10 100K_0402_5% PD19 BAV99WT1G_SC70-3 PD20 BAV99WT1G_SC70-3 PD18 BAV99WT1G_SC70-3 PH1 100K_0603_1%_TSM1A104F4361RZ PC10 .01U_0402_50V4Z PC29 100P_0402_50V8J VL PR8 470K_0402_1% 1 2 AB1B_DATA 29 1 D 2 1 PC11 1000P_0402_50V7K 2 1 PR9 210K_0402_1% Close to CPU 1 2 +3VL 1 PD3 PJSOT24CH 3P C/A SOT-23 1 PR11 1K_0402_5% 1 PD2 PJSOT24CH 3P C/A SOT-23 2 PC27 100P_0402_50V8J 2 1 @SUYIN_20163S-06G1-K PR15 100_0402_5% 2 1 PC28 100P_0402_50V8J 2 1 6 2VREF_51125 3 GND PR7 1K_0402_5% 1 2 2 2 3 4 5 3 1 SMD SMC B/I TS 2 BATT+ BATT_B PL3 SMB3025500YA_2P 1 2 1 VMB_B PCN1 2 2008/09/15 Deciphered Date 2009/09/15 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 3 Title Compal Electronics, Inc. DC-IN/ BATTERY CONN Size Document Number Custom LA-4902P Date: Rev Wednesday, December 09, 2009 4 Sheet 34 of 44 A B C D B+ P4 PR102 0.01_2512_1% 1 4 PH 25 VADJ REGN 24 REGN 2 4 2 1 PR141 4.7_1206_5% 1 PQ107 AO4468L 1N SO8 1 1 PR122 210K_0402_1% 1 42 CHGCTRL 29 PC120 0.1U_0603_50V7K PC121 @0.1U_0603_25V7K PC122 1U_0603_6.3V6M 3 2 2 2 3 1 1 2 PC117 0.1U_0402_10V7K 1 PR124 147K_0402_1% 2 3 2 1 CELLS 29 2 2 20 18 2 DPMDET CELLS SRP SRN BAT 17 16 SRSET ADP_PRES 29,36,42 PC126 680P_0603_50V8J PR117 100K_0402_5% BATT 15 PC119 100P_0402_50V8J AC Detector High 11.85 Low 10.55 SRSET 1 IADAPT IADAPT PC118 1U_0603_10V6K 2 1 1 4 PC128 4.7U_0805_25V6-K 22 PC115 4.7U_0805_25V6-K PGND 2 1 ISYNSET DL_CHG 2 LODRV 14 BATT PR112 0.01_1206_1% 1 2 PC114 4.7U_0805_25V6-K EXTPWR 23 PU103B LMV393DR2G SO 8P OP COMPARATOR 4 PC104 4.7U_0805_25V6-K 1 2 1 PR123 41.2K_0402_1% PL102 10UH +-20% #919AQ-H-100M=P3 5.3A 1 2 1 13 2 7 O 4 RLS4148_LL34-2 1 P - 5 6 7 8 VDAC 12 1 + 6 PC103 4.7U_0805_25V6-K 2 1 PC102 4.7U_0805_25V6-K 2 1 PC125 47U 25V M D ESR0.36 FK 2 1 ACN 1 2 2 ACN 1 1 PC108 0.1U_0603_50V7K 2 3 ACP 26 2 8 5 G 2 HIDRV PQ106 AO4466L 1N SO8 2 1 1 PR120 22K_0402_5% 27 11 PR116 43.2K_0402_1% 42 +3VL PR119 200K_0402_1% BTST VREF PU101 BQ24740RHDR_QFN28_5X5 1 PR118 255K_0402_1% 2 1 28 10 2 P2 PVCC PR110 10_0805_1% 1 2 1 PR115 1M_0402_1% 2 PC116 1U_0603_6.3V6M 29 2 VADJ 2 PR137 24.3K +-1% 0603 1 1 2 PR114 422K_0402_1% 29 BAT_PWM_OUT TP PD102 PR113 453K_0402_1% 2 P2 PC113 4.7U_0805_25V6-K 1 2 PC111 1U_0603_6.3V6M +3VL PU10A LMV393DR2G SO 8P OP COMPARATOR PR106 0_0402_5% CHG_B+ 2 AGND 1 PC112 4.7U_0805_25V6-K 2 1 9 PC106 @0.1U_0603_25V7K CHGEN# 1 2 PC110 PC109 0.1U_0402_10V7K 1U_0805_25V6K BST_CHG 1 2 1 2 PR121 0_0402_5% DH_CHG 1 2 PR145 0_0402_5% LX_CHG BQ24740VREF PR139 1M_0402_5% O 1 2 3 2 1 IADSLP PL103 1 1.2UH +-30% 1231AS-H-1R2N=P3 2.9A + 5 6 7 8 8 2 1 P - 14,15,25,29,32,33,37,38,39 LPREF 7 SLP_S3# 2 2 2 1 + 2 G 8 1 PR136 100K_0402_1% 3 4 2 PR140 23.7K_0402_1% 1 2 PR138 100K_0402_5% 1 2 PR135 100K_0402_1% 1 2 PR109 0_0402_5% 1 2 IADAPT 3 1 P2 2 G PQ104 SSM3K7002FU_SC70-3 5 1 2 2 S VL ADP_EN# +3VL ACDET 1 D PR111 150K_0402_5% BATT PC107 0.01U_0402_16V7K LPMD PR104 56K_0402_1% PR105 15K_0402_5% 1 PC105 1U_0603_6.3V6M 1 2 4 2 6 1 ACSET PR103 47K_0402_5% CHG_B+ 3 PQ103 AO4407AL 1P SO8 8 7 6 5 1 2 3 2 PC101 0.1U_0603_25V7K 1 2 PR101 200K_0402_5% ACDET +3VL 2 1 1 2 2 ACP 2 CHGEN 1 2 3 1 1 PL101 @HCB2012KF-121T50_0805 1 2 21 8 7 6 5 4 8 7 6 5 4 1 2 3 1 P4 PQ102 AO4407AL 1P SO8 1 P2 PQ101 AO4407L 1P SO8 19 VIN 2VREF_51125 3 2 V- 3 -IN 1 +IN PR132 300K_0402_5% 5 OUTPUT 4 PMC 29 PU104 LMV321AS5X_G SOT23 5P OP S 1 1 PR134 470K_0402_5% 2 PR143 39.2K_0402_1% PR144 49.9K_0402_1% Note: X7R type 2 2VREF_51125 V+ 2 1 PC127 1U_0603_10V6K ACDET D 1 2 1 1 2 PR150 47K_0402_5% PQ109 BSS138LT1G 1N SOT23 W/D 3 PC123 0.047U_0402_16V7K +5VALW 1 1 2 2 29,36,42 PR142 11K_0402_5% 1 2 1 PU103A LMV393DR2G SO 8P OP COMPARATOR CHGEN# 2 G AC_ADP_PRES 1 G AC_AND_CHG 2 PR131 10K_0603_0.1% - 4 2 1 PR130 1SS355_SOD323-2 1K_0402_5% CHGCTRL 1 2 2 1 2 O 2 1 1 2 8 + PR129 22K_0402_5% P 3 1 PR127 @76.8K_0402_1% 1 2 PR128 76.8K_0402_1% 2 1 PR133 220K_0402_5% PD103 PQ108 MMBT3906H PNP SOT23-3 2 +3VL PC124 0.1U_0402_10V7K IADAPT B VL P2 +3VL C VIN Charge Detector High 17.588 Low 17.292 E PR125 604K_0402_1% 1 2 1 PR126 100K_0402_5% +3VL 4 2 4 Compal Secret Data Security Classification Issued Date http://laptop-motherboard-schematic.blogspot.com/ A B 2008/09/15 Deciphered Date 2009/09/15 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C Title Compal Electronics, Inc. Charger Size Document Number Rev 0.1 LA-4902P Date: Wednesday, December 09, 2009 D Sheet 35 of 44 A B C D B++ 2 VL PD1101 1SS355_SOD323-2 1 2 1 7 BAT_ALARM 29 PU10B LMV393DR2G SO 8P OP COMPARATOR B+_DEBUG 1 G 4 1 1 3 O PC1102 0.1U_0603_50V4Z 1 1 2 PR1109 20K_0402_1% PR1106 100_0805_5% 1 2 2 2 - PD1110 RLZ27V PD1100 CH715FPT SC70 BATT_B P + 6 2 5 PR1104 100K_0402_5% 2 8 2 PC1100 0.1U_0603_50V4Z 51125_PWR 2 1 BATT_A 1 PR1103 10K_0402_5% 1 1 1SS355_SOD323-2 PR1105 93.1K_0603_1% 1 PD1102 2 +3VL 1 BATT Vin PR1100 1M_0402_5% 2VREF_51125 2 1 1 PR1101 0_0402_5% 1 2 S 3 2 D PR1110 8.06K_0402_1% 2 CFET_B G PQ1100 SSM3K7002FU_SC70-3 PQ1102 3 LATCH PR1112 0_0402_5% 1 2 D S 32 1 BATT_IN BSS84LT1G_SOT23-3 2 G BATT 2 3 1 2 1 2 BATT_IN5 3 1 1 4 PR1115 470K_0402_5% PQ1105 PMBT2222A_SOT23-3 2 PQ1113A 2N7002KDWH 2N SOT363-6 PANJIT 1 6 PR1117 10K_0402_5% 2 BATT 4 PQ1107 AO4407AL 1P SO8 29 BATT_A BATT_B 3 PQ1110 AO4407AL 1P SO8 1 2 3 2 PR1121 470K_0402_5% 1 4 1 8 7 6 5 2 8 7 6 5 PR1125 4.7K_0402_5% PD1108 SX34H SMA 2 2 1 3 PD1109 1SS355_SOD323-2 3 2 29PR1126 10K_0402_5% 1 2 PR1124 470K_0402_5% 3 1 PQ1111 PMBT2222A_SOT23-3 1 1 2 1 2 3 BATT_B_P 2 PR1122 470K_0402_5% PQ1114B 2N7002KDWH 2N SOT363-6 PANJIT PQ1112B 2N7002KDWH 2N SOT363-6 PANJIT 5 5 4 4 1 2 PR1127 10K_0402_5% PR1120 470K_0402_5% 3 2 1 PQ1108 AO4407AL 1P SO8 PQ1109 AO4407AL 1P SO8 FET_B 2 1 5 6 7 8 4 FET_A 5 6 7 8 3 2 1 2 PQ1106B 2N7002KDWH 2N SOT363-6 PANJIT BATT_IN 5 4 1 3 PQ1106A 2N7002KDWH 2N SOT363-6 PANJIT PR1118 4.7K_0402_5% 2 BATT_A_P 2 PD1107 SX34H SMA 2 1 1 1 PD1106 1SS355_SOD323-2 4 CFET_A PR1119 10K_0402_5% 1 2 1 6 2 CFET_A 3 PQ1113B 2N7002KDWH 2N SOT363-6 PANJIT 2 PR1114 470K_0402_5% CFET_B 6 6 CFET_B 4 PQ1112A 2N7002KDWH 2N SOT363-6 PANJIT PQ1114A 2N7002KDWH 2N SOT363-6 PANJIT BATT_IN2 4 2 1 1 BATT_IN Compal Secret Data Security Classification Issued Date 2008/09/15 Deciphered Date 2009/09/15 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. http://laptop-motherboard-schematic.blogspot.com/ A B C Title Compal Electronics, Inc. Battery selector Size Document Number Custom LA-4902P Date: Rev Wednesday, December 09, 2009 D Sheet 36 of 44 A B C D E PC302 1U_0603_16V6K 2 1 2VREF_51125 1 1 21 UG_5V LL1 20 LX_5V 12 DRVL2 DRVL1 19 LG_5V VCLK 5 PC306 4.7U_0805_25V6-K PC305 4.7U_0805_25V6-K 2 1 PR312 4.7_1206_5% PU301 TPS51125RGER_QFN24_4X4 PC311 2 150U 6.3V M B2 LESR45M 1 2 3 2 1 PR314 @100K_0402_5% 1 2 3 + PQ303 AON7702L 1N DFN 4 2 +5VLP +5VALWP 1 2 +3VL 1 18 VREG5 VIN 16 17 GND EN0 13 15 LG_3V PL303 4.7UH_PCMC063T-4R7MN_5.5A_20% 1 2 1 DRVH1 LL2 2 3 2 1 DRVH2 11 LX_3V PR308 PC309 2.2_0402_5% 0.1U_0402_10V7K PR310 1 2 1 2 0_0402_5% 1 2 5 10 UG_3V PC304 0.1U_0402_25V6 2 1 2 1 PC318 1000P_0402_50V7K 2 1 ENTRIP1 BST_5V SKIPSEL 1 2 3 2 1 2 PC312 1000P_0603_50V8J 1 22 PR313 @1M_0402_1% 1 2 B++ ENTRIP1 VBST1 PQ304 AON7406L 1N DFN 2 VFB1 PGOOD VBST2 9 + 4 VREF VREG3 BST_3V 5 1 PR311 4.7_1206_5% 1 PC310 150U 6.3V M B2 LESR45M TONSEL 24 23 VO2 PQ302 SIS412DN-T1-GE3 1N POWERPAK1212-8 UG1_5V 4 VO1 8 14 7 PR307 PR309 1 2 1 2 0_0402_5% PC308 2.2_0402_5% 1 2 0.1U_0402_10V7K PL302 4.7UH +-20% MSCDRI-74D-4R7M-E 4A 2 1 3 6 P PAD VFB2 ENTRIP2 4UG1_3V 2 +3VALWP B++ 1 25 2 PC307 2.2U_0805_10V6K +5VALWP PR306 75K_0402_1% 1 2 2 PR305 107K_0402_1% 1 2 PQ301 SIS412DN-T1-GE3 1N POWERPAK1212-8 5 1 2 PR304 20K_0402_1% 1 2 +3VLP PC303 4.7U_0805_25V6-K 2 1 PC317 1000P_0402_50V7K 2 PC301 0.1U_0402_25V6 2 1 1 PR303 20K_0402_1% 1 2 4 PL301 HCB2012KF-121T50_0805 ENTRIP2 B++ B+ PR302 30.9K_0402_1% 1 2 5 +3VALWP PR301 13.7K_0402_1% 1 2 PC313 1000P_0603_50V8J RPGOOD 14 VL 2 +3VALW 1 +5VLP PU302 LMV321AS5X_G SOT23 5P OP PJP302 +5VLP 1U_0603_10V6K 3 2 1 PD305 1SS355_SOD323-2 DEBUG_KBCRST 29,31,42 2 1 PD301 1SS355_SOD323-2 VCC1_PWRGD 29,31,42 1 34 -IN B 4 1 1 2 2 1 PR323 20K_0402_1% APL5317 PR326 470K_0402_5% PR324 16.5K_0402_1% +3VL 1 2 PR327 680K_0402_5% 2 1 PD304 1SS355_SOD323-2 4 Compal Secret Data Security Classification 2008/09/15 Deciphered Date 2009/09/15 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. http://laptop-motherboard-schematic.blogspot.com/ A OUT 4 2.2U_0603_10V6K 2 V- 3 5 FB PR322 64.9K_0402_1% PAD-OPEN 2x2m Issued Date EN0 2 V+ 5 1 PJP305 2 +3VEXTLP EN +IN 2 VL 1 PC321 1 PAD-OPEN 2x2m S PQ307 SSM3K7002FU_SC70-3 2 1 11.5K_0402_1% 2 PJP304 PR328 100K_0402_5% 1 1 2 G 4 +VREG3_51125 PAD-OPEN 2x2m KBC_PWR_ON 29 D 1 PR321 2 +3VLP 2 2 PR317 330K_0402_5% 2 1 PR320 255K_0402_1% 3 1 (3A,120mils ,Via NO.= 6) PAD-OPEN 4x4m GND VOUT 2 1 +3VALWP 29 DEBUG_KBCRST P2 VIN 2 PC320 1 1 1 (4.5A,180mils ,Via NO.= 9) 1 PC319 10U_0805_10V6K PAD-OPEN 4x4m PJP303 PR316 100K_0402_5% 1 2 3 PU303 1 2 +5VALW +3VEXTLP +5VLP 4 1 2 B++ 2 1 +5VALWP 2 PR319 @0_0402_5% PR325 220K_0402_5% 2 1 PJP301 5 @10U_0805_10V6K PC322 2 PQ305B 2N7002KDWH 2N SOT363-6 PANJIT 2 PC315 2 22U_0805_6.3V6M 2 PQ305A 2N7002KDWH 2N SOT363-6 PANJIT 2VREF_51125 PC314 0.1U_0603_25V7K 2 1 PR315 @620K_0402_5% 3 ENTRIP2 3 6 ENTRIP1 1 51125_PWR 1 C D Title Compal Electronics, Inc. 3.3VALWP/5VALWP Size Document Number Custom LA-4902P Date: Wednesday, December 09, 2009 Rev 0.1 Sheet E 37 of 44 A B C D 1 1 PL401 HCB2012KF-121T50_0805 1 2 VCCP_B+ 1 +VCCP 1 2 BOOT UG 5 6 7 8 BST_VCCP 13 15 14 16 FCCM +6269_VCC PQ401 AO4474L 1N SO8 4 PVCC 12 LG 11 PGND 10 1 2 PC406 2.2U_0603_6.3V6K DL_VCCP PL402 0.47U 20% FDVE0630-H-R47M=P3 17.7A 1 2 SE_VCCP 1 2 PR407 7.87K +-1% 0402 2 VO 4 3 2 1 8 7 2 1 PC413 0.01U_0402_16V7K PR410 49.9K_0402_1% 2 1 FB_VCCP PC412 1000P_0603_50V7K 1 + 2 2 1 + 2 (18A,720mils ,Via NO.= 36) 3 1 2 PR411 1.58K_0402_1% PR412 1.96K_0402_1% 2 H_VTTVID1= Low, 1.1V H_VTTVID1= High, 1.05V 1 2 PR413 10_0402_5% 1 2 PR414 0_0402_5% 2 PR415 0_0402_5% 1 2 PR416 75K +-1% 0402 PQ402 AON6718L 1N DFN +VCCP PC419 @0.1U_0402_25V6 1 1 3 2 PC415 6800P_0603_50V7K 1 2 PC414 22P_0402_50V8J 7 H_VTTVID1 ISL6269ACRZ-T_QFN16 1 2 PC411 @10K_0402_5% 6 5 2 PR428 0_0402_5% PR409 25.5K +-1% 0402 1 2 1 1 2 32 VCCP_EN 2 COMP PR406 @0_0402_5% 9 ISEN + 2 EN FSET 4 2 FB 1 1 PR408 4.7_1206_5% 1 14,15,25,29,32,33,35,37,39 SLP_S3# +VCCP PC410 330U 2V Y D2 LESR9M EEFSX H1.9 3 PR404 2.2_0603_5% 1 2 PC409 330U 2V Y D2 LESR9M EEFSX H1.9 VCC PR403 0_0402_5% PC408 330U 2V Y D2 LESR9M EEFSX H1.9 2 PC405 0.22U_0603_16V7K 5 2 PR405 0_0402_5% 1 2 1 2 PR417 2 0_0603_5% 1 1 PC407 2.2U_0603_6.3V6K 2 +5VALW 1 1 VIN 2 PR402 2.2_0603_5% 3 2 1 1 +6269_VCC PHASE GND PU401 DH_VCCP 2 VCCP_POK 17 32 1 LX_VCCP 2 PR427 PR401 10K_0402_5% @10K_0402_5% DH_VCCP1 1 2 1 PC404 4.7U_0805_25V6-K 2 1 PC403 4.7U_0805_25V6-K 2 1 PC402 4.7U_0805_25V6-K PC401 0.1U_0402_25V6 1 2 PC416 1000P_0402_50V7K 2 1 PC417 @680P_0603_50V7K 2 1 PC418 @680P_0603_50V7K 1 2 +3VS PGOOD B+ +VCCP VTT_SENSE 7 VSS_SENSE_VTT 7 4 4 Compal Secret Data Security Classification Issued Date http://laptop-motherboard-schematic.blogspot.com/ A B 2008/09/15 Deciphered Date 2009/09/15 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C Title Compal Electronics, Inc. 1.05V_VCCP Size Document Number Rev 0.1 LA-4902P Date: Wednesday, December 09, 2009 D Sheet 38 of 44 A B C D 1 1 +1.5V 4 1 VREF NC 7 4 VOUT NC 8 TP 9 1 3 +5VALW PC603 1U_0603_10V6K 2 PC605 10U_0805_6.3V6M 2 PQ601B 2N7002KDWH 2N SOT363-6 PANJIT 1 PQ601A 2N7002KDWH 2N SOT363-6 PANJIT 5 PC606 0.1U_0402_16V7K 5 +0.75VSP 2 2 1 PC604 0.1U_0402_10V7K 1 PR603 1K_0402_1% 2 1 PD601 1SS355_SOD323-2 6 NC 6 2 2 VCNTL GND G2992F1U_SO8 PR602 10K_0402_5% 3 1 PR601 1K_0402_1% VIN 2 2 @10U_0805_10V4Z PC602 2 1 1 1 PR604 47K_0402_5% 1 2 14,15,25,29,32,33,35,37,38 SLP_S3# 2 +5VALW 10U_0805_6.3V6M PC601 2 1 PU601 1 2 2 PJP601 1 +0.75VSP 2 +0.75VS (2A,80mils ,Via NO.= 4) PAD-OPEN 3x3m 11 MP2121DQ-LF-Z_QFN10_3X3 @ PC612680P_0603_50V7K 1 PR606 4.7_1206_5% 2 6 TP 3 +1.8VSP PC614 22UF 6.3V M X5R 0805 H1.25 7 1 IN POK PL602 1.2UH +-30% 1231AS-H-1R2N=P3 2.9A 1 2 PC613 22UF 6.3V M X5R 0805 H1.25 BS 8 2 IN 5 SW 1 4 9 2 SW 10 GND 1 3 EN/SYNC 2 PR609 0_0402_5% GND B340A_SMA2 2 FB 2 1 1 1 2 1 PD602 PC610 10U 10V K X5R 0805 H1.25 1 2 2 1 HCB1608KF-121T30_0603 1 2 PC611 0.1U_0402_25V6 2 1 +5VALW @PC607 0.1U_0402_16V7K 2 PL601 39,41,45 PU602 PC608 0.1U_0402_16V7K 1 3 PC609 10U 10V K X5R 0805 H1.25 +1.8VSP 2 316K_0402_1% PR607 PR608 402K_0402_1% 2 1 SLP_S3# 1 2 PR605 0_0402_5% 1 2 PJP602 +1.8VSP 4 1 2 +1.8VS (1.5A,60mils ,Via NO.= 3) 4 PAD-OPEN 3x3m Compal Secret Data Security Classification Issued Date http://laptop-motherboard-schematic.blogspot.com/ A B 2008/09/15 Deciphered Date 2009/09/15 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C Title Compal Electronics, Inc. 0.75VSP/1.8VSP Size Document Number Rev 0.1 LA-4902P Date: Wednesday, December 09, 2009 D Sheet 39 of 44 A B C D PR516 2 1 PC507 4.7U_0805_25V6M 1 2 1 2 2 B+ 1 14 5 HCB1608KF-121T30_0603 1 2 3 2 1 2 15.4K +-1% 0402 PR513 4.7_1206_5% 1 1 PC521 4.7U_0805_10V6K 4 TPS51117RGYR_QFN14_3.5x3.5 PQ504 AO4712L 1N SO8 + PC515 2 220U_B2_2.5VM_R25M PC517 1000P_0603_50V8J 2 3 2 1 PR504 10K_0402_1% PC514 4.7U_0805_6.3V6K 2 LG_1.05V PR517 1 9 DRVL 1 2 +5VALW 1 V5DRV 10 +1.05VMP_LAN PL503 2.2UH_PCMC063T-2R2MN_8A_20% 1 2 5 6 7 8 12 11 PQ502 SIS412DN-T1-GE3 1N POWERPAK1212-8 2 1 PC505 1000P_0402_50V7K 1 PGOOD VBST TP 1 EN_PSV VFB 6 LX_1.05V LL TRIP 4 UG1_1.05V 1 1 5 1 2 PC526 @10P_0402_50V8J 2 PC520 1U_0603_10V6K V5FILT 13 PR509 0_0402_5% 1 2 2 PR503 1 2 4.12K_0402_1% +1.05VMP_LAN VOUT 4 7 PR518 316_0402_1% 3 PGND 2 0_0402_5% 2 DRVH UG_1.05V 8 1 PR519 +1.05VMP_LAN +5VALW 1 TON GND PU501 PR524 255K_0402_1% 1 2 2 15 PR511 PC511 2.2_0402_5% 0.1U_0402_10V7K BST_1.05V 1 2 1 2 PC504 0.1U_0402_25V6 2 1 PC519 @1000P_0402_50V7K 1 +5VALW PL501 +1.05VM_LAN_B+ 1 0_0402_5% PC506 4.7U_0805_25V6M 2 14,29,32,33 PM_SLP_LAN# 2 2 1.05VM_LAN_POK 32 PJP501 1 +1.05VMP_LAN 2 +1.05VM_LAN (8A,320mils ,Via NO.= 16) PAD-OPEN 4x4m PR521 1 2 PC509 4.7U_0805_25V6M 1 2 PC508 4.7U_0805_25V6M 1 2 2 14 15 1 9 LG_1.5V DRVL 1 PR515 2 15.4K +-1% 0402 PR512 4.7_1206_5% 1 1 +5VALW PC523 4.7U_0805_10V6K TPS51117RGYR_QFN14_3.5x3.5 3 2 1 PR502 10K_0603_0.1% + PC513 4.7U_0805_6.3V6K 4 PC512 2 220U_B2_2.5VM_R25M 2 V5DRV 10 +1.5VP 1 11 2 TRIP UG1_1.5V 3 2 1 LX_1.5V 1 PGOOD VBST TP EN_PSV VFB 6 UG_1.5V 12 5 6 7 8 V5FILT 5 13 LL 2 1 1 2 PC525 @10P_0402_50V8J 4 DRVH PQ501 SIS412DN-T1-GE3 1N POWERPAK1212-8 PL502 2.2UH_PCMC063T-2R2MN_8A_20% 1 2 1 1 +1.5VP 2 PC522 1U_0603_10V6K PR501 1 2 10.2K_0603_0.1% VOUT 2 2 PR522 316_0402_1% TON 3 PGND +5VALW 1 2 0_0402_5% B+ 4 PR508 0_0402_5% 1 2 8 +5VALW 1 PR520 HCB1608KF-121T30_0603 1 2 3 GND PR523 255K_0402_1% 1 2 2 7 PU502 3 PC502 1000P_0402_50V7K 5 1 2 1 PC524 @1000P_0402_50V7K PR510 PC510 2.2_0402_5% 0.1U_0402_10V7K BST_1.5V 1 2 1 2 +1.5VP PL504 1.5V_B+ 1 0_0402_5% PC501 0.1U_0402_25V6 2 14,33 SLP_S4# PC516 1000P_0603_50V8J 2 PQ503 AO4712L 1N SO8 1.5V_POK 32 PJP502 +1.5VP 1 2 +1.5V (8A,320mils ,Via NO.= 16) 4 4 PAD-OPEN 4x4m Compal Secret Data Security Classification Issued Date http://laptop-motherboard-schematic.blogspot.com/ A B 2008/09/15 Deciphered Date 2009/09/15 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. C Title Compal Electronics, Inc. 1.5VP/1.05VMP Size Document Number Rev 0.1 LA-4902P Date: Wednesday, December 09, 2009 D Sheet 40 of 44 8 7 6 5 4 3 2 1 +VCCP 1 PR269 @1K_0402_5% H _VID3 2 1 PR275 1K_0402_5% H _VID4 2 1 PR270 @1K_0402_5% H _VID4 2 1 PR276 1K_0402_5% 7 H_VID0 H _VID0 H _VID5 2 1 PR271 1K_0402_5% H _VID5 2 1 PR277 @1K_0402_5% 7 H_VID1 H _VID1 H _VID6 2 1 PR272 @1K_0402_5% H _VID6 2 1 PR278 1K_0402_5% 7 H_VID2 H _VID2 PROC_DPRSLPVR 2 1 PR273 1K_0402_5% PROC_DPRSLPVR 2 7 H_VID3 H _VID3 7 H_VID4 H _VID4 7 H_VID5 H _VID5 7 H_VID6 H _VID6 2 PR209 1 13,15,30 PM_PWROK 0_0402_5% 5 6 7 8 PQ201 AO4474L 1N SO8 L F2 1 PC210 1000P_0603_50V7K 2 1 3 2 1 @1K_0402_5% 3 1 PR216 1_0402_5% ISEN2 VSUM+ F 1 PR283 1K_0402_5% 2 PR223 147K_0402_1% 2 PR224 68_0402_5% 2 PR225 0_0402_5% @56P_0402_50V8 2 PR227 @4.02K_0402_1% 1 2 1 2 PH202 @470K_0402_5%_TSM0B474J4702RE 2 PGOOD PSI# RBIAS VR_TT# NTC VW COMP FB ISEN3 ISEN2 41 AGND 30 29 28 27 26 25 24 23 22 21 BOOT2 UGATE2 PHASE2 VSSP2 LGATE2 VCCP PWM3 LGATE1 VSSP1 PHASE1 +5VALW E PR228 0_0402_5% 1 2 1 ISL62883HRZ-T_QFN40_5X5 11 12 13 14 15 16 17 18 19 20 390P_0402_50V7K 2 1 2 PR239 1 2 PR248 2.2_0603_5% 2 1 C 1 2 PC239 4.7U_0805_25V6-K 2 1 PC238 4.7U_0805_25V6-K 1 2 C PQ205 AO4474L 1N SO8 PL204 0.36UH 20% PCMC104T-R36MN1R105 30A 1 4 1 PQ206 TPCA8036-H 1N SOP-ADV PH201 +CPU_CORE V 1N 1 1 3 2 PR257 1_0402_5% VSUMB ISEN1 VSUM+ 2 10KB_0603_5%_ERTJ1VR103J 2 PR256 10K_0402_1% 4 2 5 LGATE_CPU1 L F1 PC250 0.1U_0402_16V7K 2 1 VSUM- A A 6 Compal Secret Data Security Classification 2008/10/31 Issued Date Deciphered Date 2009/10/31 Title 5 4 3 Compal Electronics, Inc. CPU_CORE THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. http://laptop-motherboard-schematic.blogspot.com/ 7 4 3 2 1 PR260 1.3K_0402_1% 1 2 8 UGATE1_CPU1 PC240 0.22U_0603_10V7K 1 2 PHASE_CPU1 PR252 2.61K_0402_1% 2 1 1 0.047U_0603_16V7K 0.22U_0603_10V7K PC243 2 1 PC242 2 1 1 2 PR262 11K_0402_1% 2 1 7 VSSSENSE 0_0402_5% 2 2 PC247 1000P_0402_50V7K PR263 1 1 B PC248 330P_0402_50V7K 2 PC244 330P_0402_50V7K PC245 0_0402_5% 1 PR251 2 7 VCCSENSE 2 PR250 82.5_0402_1% 0.01U_0402_25V7K VSUM+ 1 PR274 0_0603_5% 2 1 UGATE_CPU1 PC234 4.7U_0805_25V6-K 2 1 2 VSSSENSE PR255 3.65K +-1% 0603 2 1 PR246 11K_0402_1% PC233 4.7U_0805_25V6-K PC229 0.22U_0603_25V7K 1 2 PC237 0.22U_0603_10V7K 2 1 CPU_B+ BOOST_CPU1 VSUM- PC236 0.22U_0603_10V7K 2 1 ISEN1 PC228 1U_0603_10V6K 2 1 1 ISEN2 D PC252 0.1U_0402_25V6 2 1 1_0402_5% 2 +5VALW IMVP_IMON 7 PR240 @442K_0402_1% 1 2 +1.05VS PR253 4.7_1206_5% 2 1 PR244 1 0_0402_5% 2 PC232 2200P_0402_50V7K 2 1 0_0402_5% 2 CPU_B+ PC231 1000P_0402_50V7K 2 1 PR242 5 6 7 8 PR238 3.16K +-1% 0402 3 2 1 1 1 1 2 PC225 10P_0402_25V8J 1 2 1 2 PC227 PR241 150P_0402_50V8J 412K_0402_1% PC223 1U_0603_10V6K PC224 1 PR236 562_0402_1% PC230 0.047U_0603_16V7K 1 2 1 2 2 PC222 1000P_0402_50V7K 1 PC221 22P_0402_50V8J 1 2 3 4 5 6 7 8 9 10 2 PC220 1 PC211 1U_0603_10V6K 1 2 CLK_EN# DPRSLPVR VR_ON VID6 VID5 VID4 VID3 VID2 VID1 VID0 1 4 H_PROCHOT# PU201 40 39 38 37 36 35 34 33 32 31 1 +VCCP ISEN1 VSEN RTN ISUMISUM+ VDD VIN IMON BOOT1 UGATE1 1 PR235 8.06K_0402_1% 1 PQ202 TPCA8036-H 1N SOP-ADV PSI# 2 D 4 2 G +CPU_CORE V 2N VSUM- 2 PR221 1 7 PSI# E CLK_EN# PR219 0_0402_5% 1 2 +VCCP F + 2 PR214 10K_0402_1% PR211 4.7_1206_5% 2 1 +3VALW LGATE_CPU2 PR213 3.65K +-1% 0603 2 1 5 12 CLK_EN# 15 VGATE 1 PL202 0.36UH 20% PCMC104T-R36MN1R105 30A 1 4 PHASE_CPU2 PR215 47K_0402_1% 1 2 B+ UGATE1_CPU24 2 PROC_DPRSLPVR 7 PROC_DPRSLPVR PC209 0.22U_0603_10V7K PR249 1 2 0_0603_5% 2 1 UGATE_CPU2 PL201 SMB3025500YA_2P 2 1 H 1 PR279 @1K_0402_5% PR208 2.2_0603_5% 2 1 BOOST_CPU2 CPU_B+ 2 2 PC206 100U 25V M D8 (6.3X7.7) FK 1 PR282 @1K_0402_5% H _VID3 PC213 @680P_0603_50V7K 2 1 2 PC212 @680P_0603_50V7K 2 1 H _VID2 PC241 0.1U_0402_25V6 2 1 1 PR268 1K_0402_5% PC204 4.7U_0805_25V6-K 2 1 2 PC208 4.7U_0805_25V6-K 2 1 1 PR281 1K_0402_5% H _VID2 PC203 4.7U_0805_25V6-K 2 1 1 PR280 1K_0402_5% 2 PC207 4.7U_0805_25V6-K 2 1 2 H _VID1 PC202 2200P_0402_50V7K 2 1 H _VID0 1 PR267 @1K_0402_5% PC201 1000P_0402_50V7K 2 1 1 PR266 @1K_0402_5% 2 PC246 1000P_0603_50V7K 2 1 G 2 H _VID1 3 2 1 H H _VID0 Size Document Number Rev 0.1 LA-3942P Date: 2 Wednesday, December 09, 2009 Sheet 41 1 of 44 5 4 3 2 1 1 BQ24740VREF +3VS 2 PR1000 165K_0402_1% 2 PC1000 0.22U_0603_10V7K 1 PR1019 10K_0402_5% 2 3 -IN 5 1 V+ 4 1 2 OUTPUT PQ1001 BSS138LT1G 1N SOT23 W/D PU1000 OCP 2 PD1001 1SS355_SOD323-2 S 15 D PQ1004 SSM3K7002FU_SC70-3 PC1002 0.01U_0402_16V7K 35 1 2 2 B PR1028 100K_0402_5% 1 1 IN+ 2 GND 1 VCC+ 5 OUT 4 C INLMV331IDCKRG4_SC70-5 E 2OCP_A_IN PR1032 100_0402_5% PR1030 68K_0402_5% PQ1005 MMBT3904WH NPN SOT323-3 1 3 +3VS 1 OCP_A_IN 29 1 VIN 2 2 SRSET C PR1012 10K_0402_5% +5VS PU1 1 2 PR1021 100K_0402_1% 1 2 1 1 2 2 2 G C 1 1 PR1010 27.4K_0402_1% 1 1 2 1 1 PR1011 200K_0402_1% 1 2 3 D S 3 PQ1003 BSS84LT1G 1P SOT23-3 +3VS PC1003 3900P_0402_50V7K ADP_SIGNAL 3.9K_0402_5% PR1025 PD1000 1SS355_SOD323-2 1 2 PR1022 100_0402_5% D OCP# 2 G PR1017 2K_0402_5% LMV321AS5X_G SOT23 5P OP PR1018 100K +-1% 0402 OCP_ADJ 34 29 2 PR1020 0_0402_5% 2 1 1 PR1023 @0_0402_5% 1 2 1 V- 3 +IN 2 PC1001 0.01U_0402_16V7K 1 2 D 1 3 3 D S PQ1002 SSM3K7002FU_SC70-3 3 S D 2 G 5,36 ADP_PRES G PQ1000 BSS138LT1G 1N SOT23 W/D 1 1 CFET_A 2 2 PR1013 10K_0402_1% 1 2 PR1014 150K_0402_5% 2 G 36 1 IADAPT D S 35 1 +5VS 2 PR1016 100K_0402_1% PD1003 GLZ4.7B_LL34-2 2 1 2 2 PR1015 100K_0402_1% 2 1 PR1040 33K_0402_5% PR1042 8.06K_0402_1% 2 1 PR1045 4.7K_0402_5% 3 PQ1007B 2N7002KDWH 2N SOT363-6 PANJIT PQ1006 MMBT3906H PNP SOT23-3 5 ADP_A_ID 1 VCC1_PWRGD 29,31,37 4 1 2 3 2 C 2 B E PR1046 8.66K_0402_1% 2 1 +3VL B B ADP_EN# 35 1 PD1004 1SS355_SOD323-2 @1091 2VREF_51125 1 PQ1007A 2N7002KDWH 2N SOT363-6 PANJIT +3VL 2 ADP_EN 29 1 VL PR1064 22K_0402_5% + P 2 - O 1 4 PR1065 10K_0402_1% 2 3 1 ADP_DET# 29 A PU15A LM393DR SO 8P 2 A G 2 8 PR1063 130K_0402_1% 1 1 2 PR1062 1M_0402_5% 6 2 PR1059 45.3K_0402_1% 2ADP_A_ID 1 Compal Secret Data Security Classification ADP_A_ID 29 2008/09/15 Issued Date PR1066 10K_0402_5% Deciphered Date 2009/09/15 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. http://laptop-motherboard-schematic.blogspot.com/ 5 4 3 2 Title Compal Electronics, Inc. ADP_OCP Size Document Number Custom LA-4902P Date: Wednesday, December 09, 2009 Rev Sheet 1 42 of 44 5 4 PL701 SMB3025500YA_2P 1 2 2 PR715 @442K_0402_1% 2 1 2 2 2 1 PC708 0.22U_0402_6.3V6K 2 1 PR703 22.6K_0402_1% 2 2 PC706 1U_0603_6.3V6M PR734 0_0402_5% D GFXVR_IMON7 VSS_AXG_SENSE 7 5 6 7 8 ISUM+ ISUM- 1 2 PR1009 17.8K_0402_1% 2 1 PR1008 8.06K_0402_1% 14 20 21 1 1 1 2 PR708 3.65K_0805_1% PR709 0_0402_5% PH701 PC718 2.2U_0603_6.3V6K 2 VID0 C PR707 2.2_1206_5% PR713 1 2 +5VALW 4 0_0603_5% 2 19 VID1 3 2 1 5 VCCP 3 2 1 13 IMON 11 10 8 9 12 VIN VDD ISUM+ BOOT 17 18 DL_GFX 1 PC721 22P_0402_50V8J 1 2 CLK_EN# +GFX_CORE PL702 .56UH +-20% ETQP4LR56 WFC 21A 1 2 1 2 1 2 PR714 PC719 10KB_0603_5%_ERTJ1VR103J 2.61K_0402_1% 680P_0603_50V7K PQ702 AON6718L 1N DFN PR717 1 2 11K_0402_1% PC722 .1U_0402_16V7K 1 2 GFXVR_VID_0 7 GFXVR_VID_1 7 GFXVR_VID_2 7 GFXVR_VID_3 7 GFXVR_VID_4 7 GFXVR_VID_5 7 GFXVR_VID_6 7 GFXVR_EN 7 GFXVR_DPRSLPVR 7 1 2 PC724 0.068U 16V K X7R 0402 PR723 3.01K_0402_1% PR729 82.5_0402_1% 1 2 1 2 PC725 0.01U_0402_16V7K PR725 @100_0402_1% ISUM+ B 1 PR721 PR722 PR724 PR726 PR727 PR728 PR730 PR731 PR732 2 1 1 1 1 1 1 1 1 1 1 B 2 2 2 2 2 2 2 2 2 1 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% 0_0402_5% 2 GFXVR_PWRGD 2 2 PC720 150P_0402_50V8J 1 1 PR720 @10K_0402_1% 2 +GFX_CORE PGOOD 2 DH_GFX1 16 LX_GFX 2 1 PC716 100P_0402_50V8J 15 DH_GFX 1 VID2 1 VID3 2 4 22 2 23 2 1 VID4 1 28 1 RBIAS 24 2 2 PQ701 AO4474L 1N SO8 2 PC710 0.22U_0603_16V7K 1 1 3 VID5 2 VSSP LGATE VID6 PR712 47K_0402_1% VW 25 PC717 1000P_0402_50V7K COMP 4 UGATE 26 PR711 825K_0402_1% FB 5 1 PR733 0_0603_5% PU701 ISL62881HRZ-T_QFN28_4X4 PHASE VR_ON PR710 10K +-1% 0402 VSEN 6 DPRSLPVR C RTN AGND 7 ISUM PC711 330P_0402_50V7K PC712 330P_0402_50V7K 27 2 2 PR705 2.2_0603_5% 29 1 PR706 10_0402_5% 1 2 +GFX_CORE 2 7 VCC_AXG_SENSE BST_GFX 1 1 1 2 PC709 1000P_0402_50V7K 2 PR704 10_0402_5% 1 2 +1.05VS 1 PC707 0.22U_0603_25V7K PR701 1 +5VALW 2 1_0603_5% 1 1 PR702 0_0603_5% 1 1 2 PC727 @0.1U_0402_25V6 2 1 PC705 4.7U_0805_25V6-K 2 1 PC704 4.7U_0805_25V6-K 2 1 PC703 4.7U_0805_25V6-K 2 1 PC702 4.7U_0805_25V6-K 1 2 D 7 VSS_AXG_SENSE 1 GFX_B+ PC701 2200P_0402_50V7K B+ 3 PC726 @1200P 50V K X7R 0402 ISUM- A A Compal Secret Data Security Classification 2008/10/31 Issued Date Deciphered Date 2009/10/31 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. http://laptop-motherboard-schematic.blogspot.com/ 5 4 3 2 Title Compal Electronics, Inc. VCCGFX Size Document Number Custom LA-3942P Date: Wednesday, December 09, 2009 Rev Sheet 1 43 of 44 5 4 Version change list (P.I.R. List) Item 3 2 Power section Reason for change 1 Page 1 of 1 PG# Modify List Phase Date 1 D D 2 3 4 5 6 7 C C B B A A Compal Secret Data Security Classification Issued Date 2008/09/15 2009/09/15 Deciphered Date THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5 http://laptop-motherboard-schematic.blogspot.com/ 4 3 2 Title Compal Electronics, Inc. Changed-List History Size Document Number Rev 0.1 LA-4902P Date: Wednesday, December 09, 2009 1 Sheet 44 of 44 5 4 3 2 1 2/2 No1. P21, LED0 and LED1 nets reversed No2. P16, for HP item 84, R294,R295,C274 value change No3. P20, due to JEDP1 42pin to 30 pin, redefining the signals, please remember to change footprint, symbol, part number. No4. P20, JEDP1 change footprint and value No5. P14,15, delete PCH LVDS signals and USB_5 for LVDS_CAMERA No6. P21, LED0 and LED1 change back. No7. P23, HDD/ODD footprint modified. No8. P20, add 2 pins on JEDP1 by myself, different from database part No9. P20, use real JEDP1 from database No10. No11. No12. No13. No14. D No15. No16. No17. No18. No65. separate GND signals (1) P28 and P25, add GNDA and resistors, No66. P20, change JEDP1 to 24 pin connector, delete LANE[1:3] and EDID, as well as U4 relative signals. No67. P31, change SPI ROM back to DB1 design, but mount 8pin, unmount 16pin No68. P19, change misunderstand name:DPD_C_AUX/DPD_C_AUX# to DPD_C_AUX_L/DPD_C_AUX_L# 2/19 P12, for HP item 69, delete SMB_DATA_S3, SMB_CLK_S3 and add 2 test points P14, for HP item 78, install R227 P29, for HP item 82, KB_RST# pull high to +3VS P4, for HP item 85, unistall R997 and del R40 P4, for HP item 97, delete R34,R36,R37,R46,R49 and change name of XDP_TDI & XDP_TDO, and short XDP_TDI_M to XDP_TDO_M P4, for HP item 98, add a series R between pin3 and 5 on U54 P21, for HP item 99, delete C484-C487, C945, R427, R428, R963, Q18 P22, for HP item 100, delete Q80A P22, for HP item 101, Source and Drain of Q80B are swapped and change to a single 2N7002 No20. P12&P29, for HP item 103, change R948, R949, R952, R953, R939, R176, R180, R940 to 0ohm and R950 to 33ohm No21. P28, for HP item 104, Connect +5VS to JP32 pins 11, 178, 179. No22. P11, for HP item 105, R141 is connected to +1.05VS No23. P24, for HP item 106, Del R1006 and and Q70A. Replace Q70B with a single 7002 No24. P28, for HP item 107, Delete R635-R638 and short the signals No25. P12, for HP item 108, Delete C201, C203-C205 and short the signals No26. P21, for HP item 110, LED0 and LED1 nets reversed again No27. P22, for HP item 111, Control signal for Q80B.GATE should be LAN_DIS# No28. P7, for HP item 112, NO INSTALL R967 for ES1 silicon No29. P12, for HP item 113, INSTALL R847 and change to 1Kohm. Connect R847.1 to Q66.1 and remove the GND connection at R847.1. No30. P12, for HP item 80, install R184 and R190 No31. P15 & P28, for HP item 79, GPIO38 and GPIO39 on U4 connect DOCK_ID0 and DOCK_ID1 to the docking connector pins 77 and 78 No32. P15, for HP item 60, delete R283 No33. P29, for HP item 66, chenge KSO4 to KSO3, change 10K to 0 Ohm, change the Table, add a NOR gate No34. for No 18, change Q80 Source and Drain pin back. No35. P32, for HP item 115, change PM_SLP_LAN# to PM_SLP_M# at R386-1 No36. P24, for HP item 116, circuits recuperation because of canceling item 106 No37. P19, for HP item 117, swap DPD_CTRLDATA and DPD_CTRLCLK, AUX connects to CLK and AUX# connects to DATA, add isolation nFET in series with Q74A and Q74B. No38. P15, add 7 47P_0402 but “@” at every clock of PCI No39. P12, change RTCVCC source from +VREG3_51125 instead of +3VL No69. P5, delete MB_DP_DATA[1:3]_N/P for JEDP pin cutting No70. C6 and C685 change to SE071100J80 because of Jason's request( vendor doesn't have the original 25V part) No71. P25, install C888,C889 2/20 No72. for HP item 66, P29, U66.5 should be connected to 3VL so that KBC can read board before boot and apply necessary fixes. No73. for HP item 103, P31, R1035 should be 0ohm No74. P27, change SC_PWR circuits for unsurely current D 2/23 No74. P26, uninstall U31 and add J1 for cost down No75. change some test point footprint to TPC12: T61,T62,T1,T55,T97,T22, and P14 lots of points 2/24 No76. P22, JP6 symbol error, modified! No77. P12, add a net name XDP_FN4 2/25 No78. P32, change U44.8 to +5VALW for HP request No79. P29, change R680=220 ohms combine power schematics No80. P25, (1) JP24: redefine the singals of the pins, (2) JP25: reverse pin definition No81. (1)U4 change PN to SA00002KV30 for ES2 (2)P31, &U1, &U2 change to SA000037A00 3/6 No82. C No40. ESD change: (1) @: D63~D67, D14, D57, D32, D68, D33, D34, D36, D62, No41. ESD change: (2) change P/N: D14, D57, D32, D68, D33, D34, D36, D62, D37 No42. ESD change: (3) affact layout: D14, D33, D34, D36, D62, D37 No43. modify C962 GND disconnection and R70 to GND No44. modify HF part number, please search"change HF P/N" to know which parts changed. No45. for Load BOM problems, change some parts as below: (1) add CONN@: JCPU1, JP5 (2) add P/N for dual 2N7002: Q2,Q3,Q7,Q8,Q81 (3) change P/N: R570, C6, C829, R43, R44, R47 No46. for DRC check, (1) P23, delete dummy net of JODD1 pin16, 17 (2) P28, add intersheet symbol at SMB_CLK_S3 and SMB_DATA_S3 (3) P21, add a TP at U18.7: LAN_CTRL_18 (4) P14, delete a dummy net N19910781 (5) P28, change JP32 pin DCAD net name to DCAD1 (1)P29, Firmwave said unmount R1021 and mount R1022 (2)P4, delete R998 , otherwise BOM will be error C No47. for parts forbidden: (1) C829 change to SE026104KN0 (2) R800 change to SD028100380 (3) D68 change to SCA00000E00 (4) C818 change to 0402 SE070104Z80 No48. EMI concern: (1) install C833, C836, C956 (2) P25, JP25 pin difinition changes. (3) R931 to 47 ohm (4) P18, modify CRT circuits: add L and C, change R places, install C B No49. No50. No51. No52. No53. P29, for HP item 123, Change R680 to 100 ohms, and uninstall R699 P29, delete R886, R887 and relative circuits P28, delete R892 for BATCON P23, change JODD1 pin16, 17 type to avoid from useless net names HF parts link database: D1 B No54. HF parts link database: (1) Q78 link SB00000H500 (2) D16, D63~D67 link SC2AN217020 (3) D1 link SC2N202U000 (4) D23~D29 did not link SC2P202U000, just revise manually (5) Q57 & Q58 link SB000007H10 (6) C263 & C269 link SGA202211D0 (7) lots of 2N7002(Q4, Q23, Q32,Q41,Q42,Q43,Q45,Q46,48,49,50,51, 52,53,54,55,56,60,65,66,68,71,76,79,80) link SB000009080 (8) T63 link SP050002I10 (7) U42A, U42B, U44A, U57A link SA003930080 No55. combine power schematics 0212 No56. P29, for HP item 122, Connect D42-2 to VCORE_GP (not PM_PWROK) TEST. change U42,U44,U57 value and footprint LM393DG_SO8 before netin No57. change U42,U44,U57 link another SA003930080 2/16 A No58. No59. No60. No61. No62. No63. P5, for HP item 126, R60 and R61 should be NO INSTALL. P12, for HP item 127, Connect R857.1 to HDD_HALTLED_R instead of HDD_HALTLED P9,10, for HP item 128, Connect JDIMA1.199 and JDIMB1.199 to 3VS as Intel reference board P16, for HP item 131, Based on spec, VccTX_LVDS and VCCA_LVD to GND. P19, for HP item 136, Install Q76 and no install R1055 as there must be isolation P13, for HP item 138, Change Gate of Q77 to +3VALW A No64. change Pb-free (1)R1058 to SD028100180, (2)R1059,1060,1062,1063,1064 to SD028100280 (3)R615, 1061 to SD028470180 (4)RP31, RP33 to SD309100280 (5)RP29, 30, 32,34,35 to SD309470180 --> footprint should keep original (5)C953 to SE053475Z80 (6)C950, 951, 952 to SE070104Z80 change HF (1) SW1 to SN100000W10 Issued Date 4 2008/03/13 Deciphered Date 2009/05/11 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. http://laptop-motherboard-schematic.blogspot.com/ 5 Compal Secret Data Security Classification 3 2 Title Compal Electronics, Inc. Hardware revision -DB2 Size C Date: Document Number Rev 0.3 LA-4902P Wednesday, December 09, 2009 1 Sheet 45 of 47 5 4 3 2 3/9 No1. for HP item 5, P32, change U44A to U57B and delete U44 No2. for HP item 6, P12&24, connect JP12.17 to U4A.F34 and add 10K pull-up to +3VS for Braidwood detection. No3. for HP item 7, P4, changed PCH debug ports to CFG4 - pin 28, CFG5 - pin 30, CFG10 - pin 22, and CFG11 pin 24 No4. for HP item 11, P20, reverse Q9A No5. for HP item 12, P13, Change all express clock series terminations from 33ohm to 0ohm, R208, R209, R211, R212, R41 and R59 should be 0ohm No6. for HP item 13, P14, no install R337, R820, R821 to disable LVDS (DG1.0 did not say this) No7. for HP item 14, P12, unmount R186 and R192 because latest PCH EDS shows that PCH XDP JTAG_RST# is now NO CONNECT on PCH No8. for HP item 16, P20, Change D12 to 2Kohm resistor and remove R322 No9. for HP item 17, P20, Change Q79.2 to LID_SW# No10. for HP item 18, P24, change WWAN power circuits to pFET circuits. No11. for HP item 22, P27, add ESD Diodes and pullups for the SCCLK, SCIO, SCRST lines on the SC socket 3/16 No12. P14, add RGB name:DAC_RED_R,DAC_GRN_R,DAC_BLU_R D 5/12 No72. P26, add eSATA connector and redriver curcuits No73. P19, correct Q75B's direction 5/13 No74. P29, cost down, change NOR to dual 2N7002 No75. P26, cost down, delete R605, and short the circuits No76. P23, from Johnson, we should keep the pull high resistor because EC will not program the internal pull-high afterwards. power schematics updated: CARTIER_UMA_PWR_20090513.DSN 3/19 No13. P29, R593 part number: "space" delete 3/27 No14. No15. No16. No17. No18. No19. 5/14 No72. power No77. No78. P31, reverse JP30 pin definition P4, change R1082 from 0 ohm to 10K P14, P18, change R307,R308,R309,R301,R302,R303 from 75ohm to 150ohm for HP item 4, P22, Source and Drain on Q80B should be swapped P28, add a reversing circuit for STB_LED# to fix the LED bug P21,P28, delete redundant net LAN_ACT#_DOCK and change it to LAN_ACT# 4/3 No23. P25, modify Power button curcuits for HP item, P15 and 24, GPIO -->WWAN_DET# and pull high 100K for HP item, P4, Stuff R51 for SYS_SHDN# for SI-1 final. for HP item, P22, VCT pin U18.6 hould be NO CONNECT. R929 uninstall for HP item, P9&10, Remove M1@ for UMA and make it always installed. UMA will only use M1 for HP item, P31, reserve 100Kohm pull up to 3VL on U63.1 for HP item, P15, LAN_DIS# should pull up to +3VM_LAN instead of 3VALW for HP item, P4, Change R14/R15 to 1.1K1%/3K1% per DG1.52 for HP item, P15, Add NO INSTALL 0ohm to GND on GPIO8 on PCH and remove PULL UP to 3VLAW because PCH has an integrated pull up. for HP item, P13, For UMA: NO INSTALL: R210, Y4, C222 INSTALL 0ohm resistor in C223 4/14 No33. P14, revise for HP item 13 not mentioned, delete LVD_VREFH and LVD_VREFL to GND No34. for HP item, P19, Reserve 0.1uF on DDC_EN and DP_EN for concern about noise. C 4/21 No35. R1021 R1022 R1023 R1024 R694 P29, Removed Install Install Install Install (main battery selection) (OCP function) (travel battery selection) (SMSC CBB will required it) 4/22 power schematics updated: CARTIER_UMA_PWR_20090421.DSN No36. P7, power team delete PC713~PC715, and add these 3 to my schematics as C972~974 No37. for HP item, P16, Add 2x22uF for VCCME (on PCH) 4/22 No38. revise the footprints of T113, 122, 123, 124 from TPC to TPC12 No6. for HP item 13, P14, delete R337, R820 and R821, and add 3 test points. No39. for HP item, P4, install R997 and uninstall R44 to change FAN power 4/27 No18. No40. No10. No41. No42. No43. No44. No45. No46. B revised for HP item, P28, change name STB_LED#_R P31, delete U64 and &U1 for HP item 18 and 57, P24, modify WWAN circuits for HP item 50, P12, delete CLRP2 for HP item 51, P29, change system ID by installing R660 and uninstalling the others for HP item 55, P30, add uninstalled 0ohm and 10K pull down at SER_SHD for HP item 46, P9,10, Install a new voltage divider for VREF_CA that is different from VREF_DQ divider for HP item 61, P15,20, delete R969, R330 R328, C297 R327 R329 Q14 C304 and Q9A, R268, delete WEBCAM_OFF circuits and add WEBCAM_ON circuits. P33, add +VCCP and +GFX_CORE discharge circuits 4/28 No47. P27, change Smart Card circuits No48. for HP item 48, P9,10, (1) add 1 uninstalled 300uF on DIMMB +1.5V, (2) add 2 10uF on +0.75VS, (3) delete 4 uninstalled 10uF on +1.5V (4) unistall 8 0.1uF on +1.5V No49. No50. No51. No52. No45. for for for for for HP HP HP HP HP item item item item item 49, 52, 56, 60, 61, P16, P22, P24, P25, P20, 5/18 No81. for HP item 22, P27, install D70~72 No82. for HP item 76, P14, 29, 41 (1) add R=1k between PGD_IN and VGATE, and uninstall R237. (2) remove D42. (3) remove PR217 and PR230 No83. for HP item 77, P19, uninstall R1076 No84. for HP item 78, P19, Remove R1051 and R1048 and make the following changes: Install R1046 (100K) but change R1046.2 to GND Install R1047 (100K) but change R1047.1 to 3VS power schematics updated: CARTIER_UMA_PWR_20090518.DSN No85. P21, change 10uF to 22uF to stablize voltage 5/19 No86. change HF part: (1) SA411250130 S IC 74AHCT1G125GW SOT353 5P BUS BUFFER -> SA00000RY00: U7, U8, (PN change only) (2) SB000008E00 S TR MMBT3904W NPN SOT323-3 ->SB000008E10: Q1, (3) SB00000AR00 S TR 2N7002DW T/R7 2N SOT-363-6 -> SB00000AR10: Q2, Q3, Q5, Q7, Q8, Q10, Q63, Q77, Q86, Q87 (4) SB570025280 S TR 2N7002DW-7-F 2N SOT-363 -> SB00000EO10: Q11, Q72, Q73, Q74, Q75, Q81 (5) SC2N202U000 S DIO ROW DAN202UGT106 3P C/C SC-70 -> SC600000B00: D1 (6) SCA00000A00 S ZEN ROW PJDLC05 3P C/A SOT23 -> SCA00000A10: D58 (7) SJ100001V00 S CRYSTAL 32.768KHZ 1TJS125DJ4A420P -> SJ100004N00: Y6, Y7 (8) SP04301P120 S FUSE SMD1812P110TF 1.1A 6V UL/CSA/TUV -> SP04301P140: F1 (9) SC1N4148180 S DIO 1N4148WS-7-F SOD-323 -> SC100004P00: D60, D70, D71, D72 (PN change only) B delete R289 TRM_CRT: add 4 0.1uF change caps to 150uF and 22uF, delete the others. simplify WLAN/WWAN/BT LED circuits. uninstall Q62 and Q64 modify WEBCAM again No88. according to Monji, P13, check R215 to 22 ohm 5/20 No89. U67: Change SA00002ZR0L to SA00002ZR00 for DELL prohibition part 5/4 No53. for HP item 62, P25 & 29, Change A_SD to A_SD# on U40.91U (GPIO14 of KBC). Change A_SD to A_SD# on JP5.35 (Audio board connector). Change EAPD to MUTE_LED_CNTL on U40.100U (GPIO31 of KBC). Change EAPD to MUTE_LED_CNTL on JP5.36 (Audio board connector). No90. P08, change MLCC part references for power team request for HP item for HP item for HP item for HP item for HP item for HP item for HP item for HP item P23, change C No87. after Gerber out: BOM (1) change Q70 to SB923050020 (2) link database: JP31(enter myself), C888, R782, R202, R200, R791, R785, R800, R796, R797, C184, C885, C887, C231, C232, C236, C241, C243, C244, C247, C248, C251, C252, C253, C261, C264, C270, C271, C272, C274, C275, C515, RP16, RP18, RP26, RP27, R787 4/30 power schematics updated: CARTIER_UMA_PWR_20090429.DSN No54. No55. No56. No57. No58. No59. No60. No61. No62. D P26, change USB and E-SATA connector and revise this circuit schematics updated: CARTIER_UMA_PWR_20090514.DSN for HP item 75, P24, install C545~C547 39pF P21, c495, c497 CHANGE TO X5R SE095104K80 5/15 No79. P7, delete uninstalled VCCP 47pF * 4 and 10uF * 1(C41~C44, C46) power schematics updated: CARTIER_UMA_PWR_20090515.DSN No80. P33, Q61 change part 4/2 No20. P31, revise BIOS connector to CONN@ and unmount &U1 No21. P9, reivse " M1@" to "M1@" No22. P12, revise 0ohm(R868,R869,R870,R871,R872,R1071) from SD034000080 to SD028000080 4/10 No24. No25. No26. No27. No28. No29. No30. No31. No32. 1 power schematics updated: CARTIER_UMA_PWR_20090508.DSN No71. P20, JEDP.20 change to +5VS (1) 10uF: C103ΕC993ΕC994ΕC988ΕC92 C94ΕC97ΕC116ΕC113ΕC90 C89ΕC98ΕC99ΕC100ΕC101 C102ΕC91ΕC84ΕC96ΕC83 C111ΕC88 (2) 22uF: the others (3) change C105 ~ C108 to SGA00001Q80 64, P23, uninstall R474. The concern is leakage when system is off. 65, P29, Uninstall pull-up on KBRST# (R893) as it is not needed. 66, P29, Change R700 on PM_RSMRST# from 10K to 100K to reduce current. 67, P29, for ADC small input filters. add R1113~R1116 and C982~C984 69, P14, uninstall R234 for wrong power rail 70, P15, add 10K pull-up to USB_OC#2 as we are not using it. 71, P12&24, change net name from BRAID_DET to NAND_DET# 72, P13&21, add CLK_PCIE_LAN_REQ1# connected U18.48 to U4B.U4 JODD1, link database 5/5 No62. P23, JODD1 pin 16,17 change passive A 5/6 No63. No64. No63. No64. P22, swap T63 MDI +/- signals for HP item 15, P33, add 330uF to each of +1.05VS and +1.05VM P22, swap again for HP item 15, P33, change 330uF to smaller package because of lack of space, and delete C782, C894 SI1 to SI2 A 5/20 No1. change schematics parts of Q24 and Q70, the same P/N SB923050020 5/7 power schematics updated: CARTIER_UMA_PWR_20090507.DSN No65. P8, power team requests 10uF*22 and 22uF*18 No66. P29, according to SMSC AN 18 1 rev 0 12: (1) add capacitors on PS2 signals (2) reserve ESD diodes on cap_clk and cap_data 5/25 No2. P27, change R1086 to 100K, R1085 to 10K, delete R1110 like DIS No3. PCH PN: SA00002KV60; LAN PN: SA00002MO40 No67. P15, EMI concern: change R1026 to 47 ohm Issued Date http://laptop-motherboard-schematic.blogspot.com/ 4 2008/03/13 Deciphered Date 2009/05/11 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 5/8 No69. for HP item 74, P33, uninstall R775 and Q56 No70. for HP item 73, P29, uninstall D42 5 Compal Secret Data Security Classification 5/7 No68. for HP item 68, P29, change net name :AC_AND CHG --> AC_ADP_PRES 3 2 Title Compal Electronics, Inc. Hardware revision -SI Size C Date: Document Number Rev 0.3 LA-4902P Wednesday, December 09, 2009 1 Sheet 46 of 47 5 4 3 2 1 5/20 No1. change schematics parts of Q24 and Q70, the same P/N SB923050020 5/25 No2. P27, change R1086 to 100K, R1085 to 10K, delete R1110 like DIS No3. PCH PN: SA00002KV60; LAN PN: SA00002MO40 6/2 No4. P12, change reference name: JBATT1 --> JBAT1 No5. P25 & P31, JP25 and JP30 are reversed(H and V) because of footprint silkscreen problem, remember not to change routing, just change ME pin1 No6. P12, P29, P31, add net names of SPI signals No7. P12,29,31, change 24.9ohm for SMSC request:R939,R940,R950,R948,R952,R1035 6/18 No8. P19, add 1 fuse on DP power D D 6/22 No9. P19, as per Johnson's request, for cost down (1) uninstall C123, C699 (2) change C552 from 150uF to 100uF +0.1uF*2 (not ok) (3) change C263 and C269 to 100uF (not ok) C C B B A A Compal Secret Data Security Classification Issued Date 4 Deciphered Date 2009/05/11 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. http://laptop-motherboard-schematic.blogspot.com/ 5 2008/03/13 3 2 Title Compal Electronics, Inc. Hardware revision -SI2 Size C Date: Document Number Rev 0.3 LA-4902P Wednesday, December 09, 2009 1 Sheet 47 of 47
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