GC26 3602 5_360_20_Card_Programming_Support_Basic_Assembler_Language_Jan71 5 360 20 Card Programming Support Basic Assembler Language Jan71
GC26-3602-5_360_20_Card_Programming_Support_Basic_Assembler_Language_Jan71 GC26-3602-5_360_20_Card_Programming_Support_Basic_Assembler_Language_Jan71
User Manual: GC26-3602-5_360_20_Card_Programming_Support_Basic_Assembler_Language_Jan71
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,Ji:rile'~o.S360
·Ofi~(~:..tIOft
(Mo,d. 20) -21
GC26 'J602.-:5
Systems Reference Library
IBM System/360 Model 20
Card Programming Support
Basic Assembler Language
This reference publication provides programmers with
the information required to write programs in the Basic
Assembler language of the IBM System/360 Model 20.
The Basic Assembler language provides the user with
a convenient means of making full use of the operational capabilities of the Model 20. Programs written in
the Basic Assembler language (source programs) are
translated into machine-language by means of the Basic
Assembler program.
The description of th~ language includes rules for
writing source programs and explanations of the
instructions for controlling the Basic Assembler program. In addition, this publication includes a number
of tables for convenient reference and conversion.
Time and storage requirements are listed in a separate
section. An extensive sample program is given to
illustrate Basic Assembler language programming.
The description of the card and tape versions of the
Basic Assembler program is confined to the aspects that
affect the planning and writing of source programs.
Readers of this publication should be thoroughly
familiar with the contents of the SRL publication IBM
System/360 Model 20, Functional Characteristics, Order
No. GA26-5847. Titles and abstracts of other Model 20
SRL publications are contained in the publication IBM
System/360 Model 20, Bibliography, Order No.
GA26-3565 .
•
"
',.
CPS
o
I
Seventh Edition (May, 1969; reprinted January, 1971)
This is a reprint of GC26-3602-5 incorporating changes issued
in Technical Newsletter GN33-8612, dated April 6, 1970.
o
This edition applies to the following program version and
modification levels of IBM System/360 Model 20, Card Programming Support, Basic Assembler, and to all subsequent versions
and modifications until otherwise indicated in new editions
and Technical Newsletters.
Program Number
Version/Modification
360T-AS-OOl
3/7
360T-AS-110
2/0
360U-AS-130
2/2
360U-AS-153
2/0
Changes are continually made to the information herein;
before using this pUblication in connection with the operation of IBM systems, consult the latest SRL Newsletter, Order
No. GN20-0361, for the editions that are app~icable and
current.
Requests for copies of IBM publications should be made to
your IBM representative or to the IBM branch office serving
your locality.
A form for reader's comments is provided at the back of this
pUblication.
If the form has been removed, comments may be
addressed to IBM Laboratory, Publications Department, P.O.
Box 24, Uithoorn, Netherlands.
© Copyright International Business Machines Corporation 1965,1966,1967,1969
o
PREFACE
o
Prerequisite to using this publication is a
thorough knowledge of IBM System/360 Model
20 machine operations, particularly storage
addressing, data formats, and machine
instruction formats and functions.
It is
assumed that the reader has experience with
programming concepts and techniques or has
completed basic courses of instruction in
these areas.
~~~Q~rog££~~ing_~Y£EQrt'~2ic_A2§gm=
~lef_JTapgLL~Eg£at~~Q£gQurg§, Form
C24-9011.
l~Q!LOutEy!_Con!ro~_sys!g~_fQf_!hg_~Qm~
~un1cation§_!daE!g~,
Publications closely related to this one
are:
Form C26-3606.
ing
InEQ!LQ~!EQ!_~Qn!~Ql_~~~!em_ior
~ina£Y~~n£h£QnQQ§_fommun!£~!iQn§_AQ£E1=
g£, Form C33-4001.
fard_grog££mming_~~£EQ£iL~£~!£_YiiliiY
grog£g~L_XQn£!1Qn§_~ng_Q~££!ing_~£Q£~
Functional Characteristics, Form
A26=5847~-----------------
gure§, Form C26-3604.
Titles and abstracts of other Model 20 SRL
publications are contained in the 1~~
~Y~iemL36~~~Qgi_20_liiblio~aphy, Form
A26-3565.
o
o
.
CONTENTS
0
INTRODUCTION • • • • • • •
Definitions • • • • • • • • • • • • •
Basic Assembler Language Statements
BASIC ASSEMBLER LANGUAGE FEATURES
Minimum System Configuration •
Maximum System Configuration • • • • •
Language Compatihility • • • • • •
CHARACTERISTICS OF THE BASIC ASSEMBLER
LANGUAGE • • . • •
• • ••
Coding Conventions
Statement Formats and Components.
The Language Structure •
The Character Set • • • • •
Self-Defining Terms
Symbols • • • • • • • • • •
Expressions
Location Counter.
Assigned Addresses • • • • • • • • •
FUNCTIONS OF THE ASSEMBLER LANGUAGE
Storage Addresses • • • • • • • • •
Effective Addressing • • • • • •
Symbolic (Implie~) Addressing
Explicit Addressing • • • •
Absolute (Di rect) Addressing • •
General and Pseudo-Registers • • •
Base Registers • • • • • • • • • • •
Using -- Use Base Register • •
BASR -- BRANCH and STORE Register
DROP -- RELEASE Pase Register
5
5
5
6
6
7
8
9
9
11
• 14
• 14
• 14
15
16
17
• 19
• •
•
•
•
•
•
• •
•
• •
• •
20
20
20
20
21
22
22
23
23
23
25
ABSOLUTE AND RELOCATABLE PROGRAMMING •• 26
PROGRAM LINKING
S,:mple Program
DEFINITION INSTRUCTIONS
EQU -- Equate Symbol •
DC
Define Constant
DS -- Define Storage •
• 27
• • 28
29
• 29
29
• 32
BASIC ASSEMBLER CONTROL INSTRUCTIONS • • 34
START -- Start Program • • • • •
• 34
END -- End of Program •• • • •
• 34
ORG -- Reset Location Counter
• 35
INPUT/OUTPUT INSTR~CTIONS
•
XIO -- Execute Input/Output • • • • •
CIO -- Control Input/Output • • • • •
TIOB -- Test Input/Output and Branch •
Sequence of I/O Instructions • • • ••
Input/Output Macro Instructions
•
I/O Routines -- Including Interrupts ••
37
37
37
39
40
40
41
MACHINE-INSTRUCTION STATEMENTS • •
Machine-Instruction Mnemonic Codes
Instruction Formats
RR Format
HX Format • • • •
43
45
45
45
45
•
•
• •
• •
• •
51 Format
••••••
SS Format
••••••
Types of Machine Operations
Binary Arithm Etic • • • •
Instructions for Binary Arithmetic •
Decimal Arithmetic • • • • • • • • •
Instructions for Decimal Arithmetic
Non-Arithmetic Operations
Instructions for Non-Arithmetic
Operations •
• • • •••••
Bran~hing
• • • • • • • •
Instructions for Branch Operations.
·
·
47
48
49
49
51
···
· 53
·· 6155
· 62
· 69
· 70
I
· 72
· 72
· 73
THE BASIC ASSEMBLER PROGRAM
Basic Assembler (Card Versions)
Basic Assembler (Tape Version~
DIAGNOSTIC MESSAGES
Loading Object Programs
74
74
·
· 75
75
· 75
PERFORMANCE DATA • • • • ••
Main storage Requirements
Time Requirements -- Card Version
Time Requirements -- Tape Version
75
WRITING A PROGRAM IN BASIC ASSEMBLER
LANGUAGE • • • • • • • • • •
Stating theP ro blem • • • •
Writing the Source Program •
The Flowchart' • • • • • •
Initializing the Program
(STMT1-STMT3)
•••••
Data Constants and Work Areas
(STMT4-STMT15) • • • • • • • • •
Program Routine (STMT16-STMT24)
Ou tp u t (STMT 25-STMT 3 5) • • .
Program End (STMT 36) • • • •
Assembling the Source Program
Control Card.
••••
Diagnostic Ru IJ • • •
·· 7676
· 7676
·
· 76
77
· 78
·· 79
80
· 80
· 80
·
· 80
OJ
APPENDIX A. SUM~ARY OF BASIC ASSEMBLER
INSTRUCTIONS • • • • •
• • • • • • 82
APPENDIX B. SUMMARY OF
MACHINE-INSTRUCTIONS.
• • 83
APPENDIX C. SUMMARY OF INPUT/OUTPUT
INSTRUCTIONS • • • • • • • • • • • • • • 84
APPENDIX D. SUMMARY OF DIAGNOSTIC
MESS AGES
.... ...
APPENDIX E. CONDITION CODES
APPENDIX F. CHAR ACTER CODES
APPENDIX G. HEXADECIMAL-DECIMAL NUMBER
CONVERSION TABLE
...
APPENDIX H. GLOSSARY
INDEX
·
·
·
86
·
93
88
89
• 99
104
o
o
Computer programs may be expressed either
in machine languag~, in other words, language directly interpreted by the computer,
or in a symbolic language, which is more
meaningful to the programmer. The symbolic
language, however, must be translated into
machine language before the computer can
execute the program. This function is
accomplished by an associated processing
program.
Of the various symbolic programming languages, Assembler languages are closest to
machine language in form and content.
The Basic Assembler language discussed
in this manual is a symbolic programming
language for the I~M System/360 Model 20.
It enables the programmer to use all .Model
20 machine functions, as if he were coding
in Model 20 machine language.
o
The Basic Assembler program translates
or processes programs written in Basic
Assembler language into machine language
for execution by the computer. The program
written in the Basic Assembler language
used as input to the Basic Assembler program is called the §Q~£~~_E£Qg£E~; the
machine-language program produced as output
from the Basic Assembler program is called
the Q£j~f~_££Q~m. The translation or
processing procedure performed by the Basic
Assembler program to produce the object
program is called as§emblillg or assemblY.
Four versions of the Basic Assembler
program are availahle:
a.
b.
o
Two card versions.
These are two-pass
programs for a Model 20 system that
includes only card input/output
devices. One of the versions permits
the assembly o~ the macro instructions
associated with the Input/Output Control System for the Binary Synchronous
Communications Adapter (BSCA IOCS).
Two tape versions. These versions
differ from the card versions by being
one-pass programs and by using magnetic
tape as an intermediate storage medium,
thus reducing card-handling and assembly time.
The CPS Input/Output Control System
(IOCS) routines can be assembled by means
of either version.
~Q!g:
DEFINITIONS
Terms used in this publication are defined
in the glossary provided in !E£gndi!_B.
BASIC ASSEr.BLER LANGUAGE STATEMENTS
Program statements (source statements)
written in Basic Assembler language may
consist of: a name to identify the statement; a symbolic operatiop coae JmnemonicJ.
to identify the function the statement
represents; one or more items called
operands, to designate the data or storage
locations used in the operation; and
comments.
I
Programs written in Basic Assembler language may consist of up to five types of
instructions: definition instructions,
trogram linkingipi?tructiori~t: Basic· AssemleI' control instru~t~Q~~1 in£UEtOU~put
instruct10U&
(1ncluding IBM-supp 1e I/O
J 1
..,
macro 1nstructions) , a nd rna chine j p str \lCtions. There are predeflned mnemonic codes
tor n l 5.nstructions in the Basic Assembler
language.
Definition instructions are used to
reserve sto(aae, to define constantsJ and
to equate symbols to the attr1butes of an
expression.
Program linking instructions are used to
link prOqraUL.~g~.tj 9ij§~ f.Q,h.j,,!il~t., ~~.~~~tion ._
Basic Assembler control instructions are
used to begin assembly, end assembly. anAL
set the location counter.
Input/output instructions designate the
units use
devices and con
t.,.?~.~r 02~,qtjQP,
The use of IOCS macro
instructions saves programming time because
it relieves the user of having to code,
test, and pr~vide linkages to his own I/O
routines.
Machine instructions direct the computer
to execute certain opera lions. The Basic
Assembler pr~duces an equivalent internal
machine instruction in the object program
from each machine instruction in the source
prog ram.
Introduction
5
BASIC ASSEMBLER LANGUAGE FEATURES
Decimal, hexadecimal, or character representation of machine-language binary values
may be employed by the programmer in writing source statements.
The programmer
~elects the represp.ntation best suited to
his purpose.
The Model 20 Basic Assembler language provides for two methods of addressiny:
1.
The address may be specified as a displacement plus a base register the contents of which are added to the displacement.
The base register may be one
of the general registers 8 through 15
or one of the pseudo base registers 0
through 3.
(If a Submodel 5 is used,
pseudo registers 0-7 are available.
However, 0-3 are the only pseudo registers recognized in CPS programs.)
a.
b.
2.
When using a general register, the
register contents can be controlled
by the programmer.
When using a pseudo base register,
the register contents are assumed
to be fixed (i.e., 0, 4096, 8192,
and 12288).
This corresponds to
what is termed direct addressing in
the Model ?O SRt pubIl.catl.on !t!U~.f:=
tiQnal_~haI~f!~Ii§tif§, Form
A26-5847.
The address may be specified symbolically without the use of a base register.
In this case, the Basic Assembler
assumes the clerical burden of computing storage locations in terms of a
base address and a displacement.
The object programs produced by the Basic
Assembler may be in a format enabling relocation from the originally assigned storage
area to any other suitable area.
The linking facilities of the Basic Assembler language and program allow symbols to
be defined in one assembly and referred to
Ln another, thus e~fecting a link between
separately assembled programs.
This permits reference to ~ata and/or transfer of
control between programs.
A discussion of
linking is contained under Program Linking.
6
A listing of the source-program statements
and the resulting object-program statements
is produced by the Basic Assembler for each
source program i t assembles.
The programmer can partly control the form and contents of the listing.
o
I
As a source program is assembled, it is
analyzed for actual or potential errors in
the use of the Basic Assembler language.
Detected err:>rs are indicated in the program listing.
MINIMUM SYSTEM CONFIGURATION
The minimum system configuration for
assembling and executing Basic Assembler
programs is as follows.
The configuration
applies to all versions of the program
except where indicated.
•
An IBM 2020 Central Processing Unit,
Model B2 for the normal version, or C2
for the BSCA version (4096 or 8192 bytes
of main storage);
•
one of the f:>llowing card units:
IBM 2560 Multi-Function Card Machine,
Model A1,
IBM 2520 Card Read-Punch, Model A1,
IBM 2501 Card Reader, Model A1 or A2
wi th either an IB l': 2520 Card Pu nch,
Model A2 or A3, or an IBM 1442 Card
Punch, Model 5;
•
an IBM 2415 Magnetic Tape Unit, Model
or 4 (for the tape versions only);
•
one of the following printers:
IBM 1403 Printer, Model N1, 2, or 1,
IBM 2203 Printer, Model A1;
•
an IBM 2020 Central Processing Unit,
Model B3 (4096 bytes of main storage);
•
an IBM 2560 Multi-Function Card Machine,
Model A2;
•
an IBM 2203 Printer, Model A2.
•
an IBM 2020 Central Processing Unit,
Model B4 (4096 bytes of main storage)
•
an IBM 2560 Multi-Function Card Machine,
Model A2;
0'<
II.'
System/360 Model 20 Basic Assembler Language
o
o
•
an IBM 2203 Printer, Model A2.
•
an IBM 2020 Central Processing Unit,
Model C5 (8192 hytes of main storage)
•
one of the following card units:
IBM 2560 Multi-~unction Card Machine,
Model A1,
IBM 2520 Card Read Punch, Model A1,
IBM 2501 Card Reader, Model A1 or A2
with either an TBM 2520 Card Punch,
Model A2 or A3, or an IBM 1442 Card
Punch, Model 5;
•
an IBM 2415 Magnetic Tape Unit, Model
or 4 (for the tape versions only)
•
one of the following printers:
IBM 1403 Printer, Model N1, 2, or 7,
IBM 2203 Printer, Model A1.
CPS does not support main storage
sizes of 24K and 32K, but CPS programs will
run on Models DC5 and E5 although only 16K
bytes are used.
(The maximum value of the
location counter i~ X'3FFF'. Therefore,
the Basic Assembler will not permit
references to addresses greater than this.)
•
one of the f~llowing magnetic character
readers:
IBM 1419 Magnetic Character Reader,
Model 1 or 31,
IBM 1259 Magnetic Character Reader,
Model 1, 31, or 32;
•
an IBM 2152 Printer-Keyboard.
•
an IBM ~020 Central Processing Unit,
Model D3 (16,384 bytes of main storage);
•
an IBM 2560 Multi-Function Card Machine,
Model A2;
•
an IBM 2203 Printer, Model A2.
•
an IBM 2020 Central Processing Unit,
Model D4 (16,384 bytes of main storage)
with or with~ut IBM Binary Synchronous
Communications Adapter, Feature
No. 2074;
•
two IBM 2311 Disk Storage Drives, Model
12;
•
an IBM 2560 Multi-Function Card Machine,
Model A2;
•
an IBM 2203 Pr{nter, Model A2;
•
an IBM 2152 Printer-Keyboard.
•
an IBM 2020 Central Processing Unit,
Model D5 (16,384 bytes of main storage);
with or without IBM Binary Synchronous
Communications Adapter, Feature
No. 2074;
•
four IBM 2311 Disk Storage Drives, Model
11 or 12;
!~~:
If 7-track tapes are used, the
data-conversion feature is required.
]Q1g_~:
o
MAXIMUM SYSTEM CONFIGURATION
Basic Assembler obiect programs may be produced for the following maximum system
configurations.
•
'0
An IBM 2020 Central Processing Unit,
Model D2 (16,38 U bytes of main storage);
with or without IBM Binary Synchronous
Communications Adapter, Feature No.
2074;
•
two IBM 2311 Disk Storage Drives, Model
11 or 12 (both must be the same model);
•
an IBM 2415 Magnetic Tape Unit, Model 1
through 6;
•
an IBM 2415 Magnetic Tape Unit, Model 1
through 6;
•
an IBM 2501 Card Reader, Model A1 or A2;
•
an IBM 1442 Card Punch, Model 5;
•
an IBM 2501 Card Reader, Model A1 or A2;
•
•
an IBM 1442 Card Punch, Model 5;
•
one of the following card units:
IBM 2520 Card Read-Punch, Model A1,
IBM 2520 Card Punch, Model A2 or A3,
IBM 2560 Multi-Function Card Machine,
Model A1;
one of the following card units:
IBM 2520 Card Read-Punch, Model A1,
IBM 2520 Card Punch, Model A2 or A3,
IBM 2560 Multi-Function Card Machine,
Model A1;
•
one of the following printers:
IBM 1403 Printer, Model N1, 2, or 7,
IBM 2203 Printer, Model A1;
•
one of the following magnetic character
readers:
•
one of the following printers:
IBM 1403 Printer, Model N1, 2, or 7,
IBM 2203 Printer, Model A1;
Introduction
7
BAS
BASR
CIa
HPR
SPSW
TIOB
XIO
IBM 1419 Magnetic Character Reader,
Model 1 or 31,
IBM 1259 Magnetic Character Reader,
Model 1, 31, or 32;
•
an IBM 2152 Printer-Keyboard.
CPS does not support main storage
of 24K and 32K, but CPS programs will
run on Models DCS and E5 although only 16K
bytes are used.
o
Rote:
s~zes
The use of the CIa, SPSW, TIOB, and XIO
instructions in Model 20 programs can be
avoided by using laCS macro instructions to
satisfy input/output requirements.
I
LANGUAGE COMPATIBILITY
The IBM System/360 Model 20 Basic Assembler
language is compatible with the Basic
Assembler language for the other models of
the IBM System/360, except where differences in machine design make it necessary to include some instructions in the
Model 20 Basic Ass~mbler language that are
not contained in the System/360 Basic
Assembler language.
The mnemonics of these
Model 20 instructions are:
Programs that are written in the Model
20 Basic Assembler language and contain
statements with blank operands cannot be
assembled by other System/360 Assembler
programs.
In addition, the use and the functions
of registers 0 through 3 in Model 20 programming differ from the corresponding
registers on other models of the IBM
System/360.
()
o
8
System/360
~odel
20 Basic Assembler Language
o
Statements in Basic Assembler language can
be written in free format; in other words,
the statement components need not begin in
a specified column of the coding sheet.
(The name of a statement, which must begin
in column 25, is an exception to this
rule.)
However, the statement components
must be separated from each other by at
least one blank column.
For the purpose of clarity, most programmers do not use the free format but
prefer to begin each type of statement component in a specific column of the coding
sheet.
The coding form shown in Figure 1 is
designed to satisfy this preference.
This
form -- the IBM systemj360 Assembler Short
Coding Form (No. X28-6506-2) -- contains a
statement field which extends from column
25 to column 71 and is broken down into
three sub-fields:
the name field (eols.
25-30), the operation field (cols. 32-36),
and the operand field (cols. 38-71).
The column numbers on the coding form
refer to the column numbers on the cards
into which the source program is to be
punched.
For the purpose of alignment, each entry
in one of the sub-fields should begin in
the leftmost column of the sub-field.
Thus, the operation entry should begin in
column 32 and the operand entry should
begin in column 38.
(Note that the name
entry .!!!.Y.§1 begin in column 25.)
Figure 2
shows a coding form with a number of typical statements in the Basic Assembler
language.
o
o
Characteristics of the Basic Assembler Language
9
IBM
IBM System 360 Assembler
Short Coding Form
PROGRAM
X28-6506
U. S.A.
PTll1h'J 10
PAGE
PUNCHING INSTRUCTIONS
I
PROGRAMMER
DATE
OF
CARD FORM H
GRAPHIC
o
I
PUNCH
STATEMENT
Name
Operation
30
25
32
Operand
36
IdentificationSequence
Comments
38
45
50
65
60
55
71
73
80
!
--r-f-
f-- f - -
~-
f-+-
f-t-
-
~- f -
:
t--
-~-
-+
t
-1-- - - - t
I
I
I
--
-- -
---
- +-.
r
-
t-.
--- +--
--
. - f - - "-f--
.-~--
o
-
--
I
1
Figure 1. The IBM
~ystem/360
Assembler £hort Coding Form
STATEMENT
Name
25
Operation
30
32
Operand
36
38
45
50
55
S TA Rr
IBGN
IR TI
Figure 2.
10
BASR
USING
M vic
LH
M VC
11) P
IdentificationSequence
Comments
60
65
71
73
80
t 3 .. I~
r*. i 3
o vlT + If (
3 ) •Ct
WOI< K+ 2 (17 ) f cl4
WORKI(19) • (21( 2)
Typical Statements on a Short Coding Form
System/360 Model 20 Basic Assembler Language
o
o
STATEMENT FORMATS AND COMPONENTS
Examples of invalid names:
A source program that is written in the
Basic Assembler language is composed of a
sequence of statements. These statements
have the following format:
3NBR
START
RL+8
(the first character is not
alphabetic)
(the symbol contains more than 4
ch ar act ers)
(the symbol contains a special
char act er)
r------,-----------.-----------~i----------~
1<---------Instruction
~
~
~
1
Name 1_____________
Operation 1 _____________
Operand (s) 1 __
Comments
L ______
__
---->1
Each source statement is punched into a
separate card. The deck of cards that contains all the statements of one source program is referred to as the source program
deck.
A statement may consist of (1) an
instruction only, or (2) an instruction and
a comments portion. Instruction entries
and comments entries are described in two
separate sections below.
o
The instruction entry must contain an
operation entry, and may contain a name and
an operand entry. These three types of
entry are described in the subsequent
sections.
Ih~~~~~ntry:
The name entry consists of
a symbol that is placed in the name field
of the coding form to identify the associated statement. The use of such names is
optional.
In the Basic Assembler language, names
must conform to thp. following rules.
1.
The first character of the name must be
alphabetic.
2.
The name must not be longer than four
characters.
3.
The name must not contain special characters or embedded blanks.
4.
The name must hegin in column 25 of the
coding form an~ in column 25 of the
source card.
A programming example that demonstrates
the use of the name entry is shown in
Figure 3.
Note-1: For all jg1n! assemblies (i.e.,
whenever the programmer uses the IOCS and
wishes to assemble the generated IOCS routines with his source program) user programs must n3t contain a name that begins
with the letter I followed by three numerical characters (0-9). In addition to
this, the name assigned to a file must not
appear in the name field of any statement
in the source pLogram.
Note_~:
UseL pLogLams for joi~i assemblies
with the BSCA Basic AssembleL must not cgp1ain a name that begins with hhe letters ID
followed by bWO numerical characters. aser
programs for both jQin.t andgE.~'£I!!~ assemblies of the BSCA Basic Assembler must not
include the type codes of the BSCA macro
instructions in a name field.
Th~_Operation_~n.t±Y:
T~e operation entry
consists of a mn eman ic opel" ation code t~aJ;
~presen ts. amacihl:
filco:IJJSii, a Bas1c
Assembler instruction, or an laCS macro
instruction.
'
ne::XMf
A mnemonic operation code consists of up
to five alphabetic characters. It must be
separated fLom the name entry and the
operand entry by at least one blank column
each.
To understand the terms used in this
publication, a cleaL distinction must be
made between (1) a machine instruction
written in Basic Assembler language and (2)
a Basic Assembler instruction.
. tten in
Bas1
a e is an 1ns ruction
to the computer. GeneLa
escr1p 10ns 0
these Instructions are contained in the
sect~io.l1 Machi'TIe I nst'ruc tion Sta temen ts.
Detail~d-descriptions-of-machln;-rnstruc
tions aLe contained in the SRL publication
5.
The name must he separated from the
operation entry by at least one blank.
Examples of valid names:
o
RNT1
C345
A
BGN
I~!1_~Y2i§t!!lLJ2Q_!1.odel_£Q.L_.El!.~£ti2nal_~h~£~£.::
i~ri2ii£21 FOLm A26-5847.
Assembler instruction is an
inst c
sic Assembler PI~gII!ID.
e functions of Basic Ass m er 1n
tions are summaLized in Appendix .A.
D~J;, a i led de sc rip t ion sal' e con ta i n~.g in t,h e
p~Ltift~nt sections 6f t~is ~ublicatiori.
ChaLacteristics of the Basic Assembler Language
11
The IOCS macro instructions are summarized in the section lnE~lLQQ1EQ1_~~~XQ
In§l£~fiiQn§.
Det~iled descriptions of
these macro instructions are contained in
the SRL publication 1~~_~Y§!~illLl~~_~Qg~1_1~
~~£~~£Qg£~mming_~QEEQ~lL_lnE~lLQ~!EQ!_~Qn=
i£QI_~Y§igill,
symbolic address VALX. These two operands
must be separated from each other by a
comma.
Operand entries that consist of two
operands must conform to the format
NQ!~:
o
Form r26-3603.
operand1,operand2
The following are examples of valid
operation codes:
LH
AH
MVC
ORG
TIOB
load halfword
add halfword
move characters
reset location 'counter
test I/O and branch
The operand entry provides the Basic Assembler program or the
computer with the information required to
carry out the instruction specified in the
ope ra tion f iel d.
lhg_QEg£~nQ~l£Y:
An operand may consist of a symbol
..1p.aIDe), a constant, or a CQlDPopn2 exW-es-:sion. Two examples of compound expressions
are shown below.
X'BF'
defines the hexadecimal constant ~F, which is equal to
decimal 191.
GAMA-150 -- designates the storage address
of GAM~ minus 150 bytes.
Each operand entry must be separated
from the associaten operation entry by at
least one blank column. In addition, each
operana entry must be delimited by at least
one blank column; i.e., any associated comments entry must be separatec from the
operand entry by at least one blank column.
For example, the AH instruction requests
the computer to ad~ a halfword to the contents of a register. The operand, therefore, must specify (1) the number of the
register and (2) the storage address of
this halfword, as shown in the sample
statement
AH
8, VALX
The above statement specifies that the
value (halfword) stored at the location
whose address is VALX be added to the contents of register R.
I
The attributes and functions of symbols
and expressions that may appear in the
operand field of a statement are described
in a later section.
The comments entry in a statement provides
for the insertion of explanatory information into a program listing. Comments do
not affect the assembly or the execution of
a Frogram, but they facilitate the reading
and understanding of a program listing by
explaining the purpose or function of a
particular statement.
Any valid character, including blanks,
can be used in a comment. Comments entries
are punched into a statement card to the
right of the operand entry and separated
from it by at least one blank column. Comments entries must not extend beyond column
71.
If the desired comments entry cannot be
in the spac~ avail~ble on the
right of t,he. op.erand-e.ntry, or if comments
consi~t Qf geperal information that pertains.to a seq-uence. of statements, the
"comments card" can be used.
accommodat~d
Comments Cards must contain an asterisk
25 ; co 1 umns 1-~ ~a-26=-~1'-a't"e'~'"
e'OO! r 0 r
menEs! ca\'ds,M'may be' inserted anywhere in a
source~program deck.
System/360
~odel
C"O!i:i mn
ava'1!a~!
in
~.~ ~A";y-~ll'ilnimrr'YSo~~~
The identification-sequence field (columns
73-80 Qt the coding form) can be used to
~pecify identifying tnformation and/or to
provide the statemeritS of a program with
seqJ-1ence numbers'.
So~e lypical
identificatIon-sequence entries are shown
in 1he example below.
Example 1:
The operand entry of the AH instruction
in the above example consists of two
operands:
the register number 8 and the
12
o
20 Basic Assembler Language
SALE0001
SAL E0002
SALE0813
o
o
Example 2:
MAIN001
MAINOf'2
If the contents of register 9 are greater than zero (p::>sitive), the BC instruction
causes the physically next statement (SH
instruction) to be executed.
(Refer to
Note 4.)
MAINO6
Ex ample 3:
This STH instruction causes the contents
of register 9 to be transferred to an (output) area named OUTA.
When this transfer
has been completed, the physically next
statement of the program (not shown in this
example) is executed.
MILLE"
MILLE~
MILLE~
Any identification-sequence
printed in the program listing
read.
Identification-sequence
not affect the assp.mbly or the
the program.
o
entry is
as it is
entries do
execution of
Note 4:
~~~l~_~gg~~nc~Q1-~tatem~ni~
The instruction SH 9,CON2 is executed only
if the contents of register 9 were found to
be greater than zero (refer to Note 2) .
Figure 3 shows a sample sequence of statements in the Basic Assembler language.
This example illustrates the writing and
the general function of the statements and
their components as discussed in the preceding sec tions.
This SH instruction causes the value
stored at the symbolic address CON2 to be
subtracted from the current contents of
register 9.
When this subtraction has been
completed, the physically next statement is
executed.
(Refer to Note 5.)
The comments entries in Figure 3 refer
to the subsequent notes.
Note 5:
Note 1:
The instruction CALC SR 9,10 caus.es the
contents of register 10 to be subtracted
from the contents of register 9.
When this
subtraction has been completed, control is
transferred to the physically next statement.
(Refer to Note 2.)
The instruction BC 2,CALC causes a conditional branch to the symbolic address CALC,
which is the address of the SR instruction
referred to in Note 1.
Note that this BC instruction is
executed only if the contents of register 9
were found t::> be greater than zero in the
test caused by the instruction BC 12,RES1.
Note 2:
Note 6:
The instruction BC 12,RES1 causes a test to
determine if the contents of register 9 -the register whose contents were changed by
means of the preceding instruction -- are
equal to or less than zero.
The program "lo::>ps" through the statement
sequence beginning with the instruction
CALC SR 9,1D and ending with the instruction BC 2,CALC until the contents of register 9 are found to be less than or equal to
zero.
When this is the case, the instruction BC 12,RES1 causes an exit from the
loop to the instruction RES1 STH 9,OUTA
(refer to Note 3).
If they are, this BC instruction causes
a branch to the symbolic address RES1.
(Refer to Note 3.)
o
Characteristics of the Basic Assembler Language
13
PAGE
PUNCHING INSTRUCTIONS
PROGRAM
CARD FORM #
GRAPHIC
I
PROGRAMMER
DATE
o
OF
PUNCH
STATEMENT
Name
Operation
30
25
32
Operand
36
38
IdentificationSequence
Comments
45
50
60
55
65
71
73
80
5T A R T
CA LC
'R.E 51
I.
SJI
q .. i QJ
1.2- ~ R. f.S1..
q" CO N2.
ST H
Iq
SR..
BC
Be
2. .. CA LG
" 0 UT A
NO
T£
I
i
NO IE. 2
NO T~ q.
NO TE 5
NO IES .3
AN 1>
6
I"
EN l)
Figure 3.
Sample Sequence of Statements
THE CHARACTER SET
The following 44 characters can be used in
statements written in the Basic Assembler
language.
26 alphabetic characters: A through Z
0 through 9
10 numerical characters:
*+- ,) (' bla nk
8 special charact~rs:
The punch combinations that represent
these characters are shown in !££~ngi!_X.
However, constants and character selfdefining terms may contain any of the 256
punch combinations listed in !E£gndi~_X.
Self-defining terms must not be confused
with data constants, which are described in
the secti on Defini tion Instruct ions. There
is a clear dIstInction-in-the-use-of each:
the Basic Assembler program assembles the
valQ~ of a self-defining term, but it
assembles the ~ddres2 of a data constant.
()i
A self-defining term is considered absolute because its value is not changed on
prog ram relocation.
A decimal self-defining term is an unsigned
decimal number with a maximum of five
digits, e.g., 007, 11900, or 3. Its value
must not exceed 16383. A decimal selfdefining term is assembled as its binary
equi val en t.
SELF-DEFINING TERMS
A self-defining term is a term whose value
is not assigned by the Basic Assembler program, but is inherent in the term itself.
Thus, the decimal digit 3, representing the
value 3, is a self-defining term.
.The three types of self-defining terms
are decimal, hexadecimal, and character
terms. They can b~ used to specify immediate data, masks, rpgisters or addresses,
and constants.
14
A hexadecimal self-defining term is a
sequence of up to four hexadecimal digits
enclosed in apostrophes and preceded by the
prefix X (e.g., X'9',X'A4',X'20B3'). The
highest hexadecimal self-defining term is
3FFF. This value corresponds to the maximum decimal self-defining term 16383. Each
hexadecimal digit is assembled as its 4-bit
binary equivalent, as shown in Figure 4.
System/360 Model 20 Basic Assembler Language
o
o
r----------------------,----------------------,
Hex adecima I
Binary
I
I
Digit
Equivalent
o
0000
0001
0010
0011.
0100
0101
0110
011.1
1000
1001
1010
1011
1100
1101
1110
1111
J
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
Figure 4.
in the operand of an EXTRN statement
within the same program.
A prerequisite for defining a symbol by
method (b) is that the same symbol appear
in the operand entry of an ENTRY statement
~nd in the name field of some statement in.
another progr am section.
(R efer to the
section irog£~~_Lin~ing for further information about the use of EXTRN and ENTRY
statemen ts.)
The Basic Assembler program maintains an
internal table -- the symbol table -- where
it stores all symbols that are used as
names within a program.
Each symbol in the
table is ass~ciated with
storage address,
which is the setting of the location counter at the time the symbol is read.
A
program-generated length attribute and a
name identification are added.
The length
attribute depends on the basic instruction
format.
The name identification indicates
whether the symbol is relocatable or absolute, and whether it is external (defined
in a separately assembled program section).
Thus, a symbol entered in the name field of
a statement is considered to be defined.
a
Table o~ Hexadecimal SelfDefining Terms
A hexadecimal-to-decimal conversion
table is shown in ]EE~ngi!_g.
o
(b)
A character self-defining term consists of
a single character, enclosed in apostrophes
and preceded by the prefix C (e.g., C'A',
C'I', C1 5', c' '). Any of the 256 EBCDIC
punch combinations shown in Appendix F can
be used for character specification.
However, ampersands and apostrophes that
are to be specifien as self-defining characters must be doubled within the enclosing
apostrophes.
Thus, a single apostrophe
must be written as C""
and a single
ampersand as C'SS'.
All symbols that are used as expressions, i.e., as operands of a statement,
must be defined.
Normally, this can be
done at the most convenient position in the
program.
The 0 RG and the EQU instructions,
however, require the symbols in their
operands to be previously defined.
Otherwise, the Basic Assembler identifies these
statements in the program listing by the
diagnostic message U (undefined).
Each character self-defining term is
assembled as its 8-bit EBCDIC code equivalent (see Appendix F).
In general, a symbol is considered to be
relocatable because relocatability is its
inherent purpose.
(Refer to the section
!Q~~lu!~~~~~~l~catable pro~mming.)
SYMBOLS
Symbols are used to refer to locations in
main storage by name rather than by the
ac t ual add ress.
A symbol may be placed in the name field
of one statement and in the operand entry
of another statement.
However, if a symbol
is to be placed in the operand entry of a
statement, it must be "defined" elsewhere
in the program.
o
A symbol is considered "defined" when it
appears
(a)
in the name field of some statement
within the samp. program, or
However, for the convenience of relating
the meaning of the stored information to
its symbolic address, a symbol can be
equated to an absolute address by means of
the Basic Assembler instruction EQU, which
is described in the section ~Q-Eg~~!~
~Y~.Qol.
The Ba~ic Assembler program generates
the relocatable or absolute attribute of a
symbol as part of the name identification.
This attribute is then stored with the symbol in the symbol table.
Limited main storage availability may
require a pr~gram to be divided into a
number of sections, each of which can be
assembled separately.
Characteristics of the Basic Assembler Language
15
In one program section, the operand
entry of a statement may contain a symbol
that is defined in a different program section.
This symbol must be introduced by an
EXTRN statement into the section in which
it is not defined.
In the program section
where the symbol is defined, it must be
specified in an EN~RY statement.
The Basic
Assembler instructions, ENTRY and EXTRN,
are described in the section E£Qg£E~
1in~ing·
and, if required, boundary alignment has
taken place.
The use of relative addressing is illustrated in the example below.
In this
example, statement sequence A uses different symbols to refer to five different
storage locations:
BGN, SYM, AUG, ADD, and
SUM.
In statement sequence B, these five
storage locations are referred to by only
two different symbols (BGN and AUG) and by
three relative addresses:
AUG+2 (for ADD),
*+6 (for SYM), and AUG+4 (for SUM) •
o
I
I
Each symbol can represent one specific
storage address only.
Therefore, it must
not be defined twice.
The number of symbols that can be specified in a program
depends on the available storage capacity,
as shown in Figure 5.
r
I Storage
I capacity
Num ber of Sym boIs Allowed
in the Source Program
,
SYM
I
I
AUG
ADD
SUM
~
~
165
847
1530
2213
805*
1487*
2170*
I
I
I
I
~~9J! en .f.!L!!
BGN
~
4096
I
8192
I
12288
I
16384
IL-_______
*
BGN
for the BSCA version
Figure 5.
Number of Symbols versus Storage
Capacity
AUG
If the number o~ symbols exceeds the applicable maximum, a symbol-table overflow
occurs.
The card versions of the Basic
Assembler program require an additional assembly run to compensate for the overflow;
the tape versions (after an informative
halt) deal with the situation automatically.
Detailed explanations are supplied in
the sectio n !ll.~L~asi£_A sse mbler PrQ.9.ram..
To avoid a symbol-table overflow, the number of symbols can he reduced by means of
relative addressing.
The term relative addressing refers to
the method of specifying storage locations
by means of a defined symbol plus or minus
a displacement, or by means of the setting
of the location counter plus or minus a
displacement.
The following examples show
some relative addresses.
FLDA-200
*+12
FLDB+X' F'
(symbol min us displacement)
(location counter plus
displacement)
(symbol plus hexadecimal
displacement)
Note:
The asterisk (*) represents the
value of the location counter after the
preceding instruction has been read in,
16
BASR
USING
LH
AH
BC
SR
STH
BASR
DS
DS
DS
BASR
USING
LH
AH
BC
SR
'STH
BASR
DS
DS
DS
13,0
*, 13
12,AUG
12, ADD
2,SYM
12,12
12,SU£'1
14,15
H
H
H
13,0
*, 13
12, AUG
12, AUG+2
2,* +6
12,12
12,AUG+4
14,15
H
H
H
0
The relative address AUG+2 can be used
to replace the symbol ADD because the
storage area referred to by ADD (see statement ADD DS H) begins directly behind the
storage area AUG , which is two bytes-long
(see statement KUG DS H).
The same applies
to the replacement of the symbol SUM by the
relative address AUG+4.
The branch address SYM is replaced by
the relative address *+6 (current setting
of the location counter plus 6 bytes).
This relative address causes a branch to
the location six bytes beyond the BC
instruction; in other words, to the first
byte of the instruction STH 12,AUG+4.
EXPRESSIONS
An expression is any symbol or selfdefining term, relocatable or absolute,
used in the ~perand entry of a statement.
An expression that consists of more than
one symbol or self-defining term and connected by plus or minus signs is referred
to as a compound expression.
System/360 Model 20 Basic Assembler Language
o
o
Examples:
BETA-10+200
FLD+X'2D'
*-GAMA+200
program relocation, in other words, the
relocation factor is applied to its numerical equivalent to compute the new storage
address.
Rgstf!£tiQll2. The ~asic Assembler program
considers an expression to be terminated by
a blank or a comma, depending on the type
of expression. An expression must noi
•
begin with a plus or minus sign,
•
comprise more than three symbols and/or
self-defining terms,
•
have a negative value at object time (if
it is absolute),
•
contain another relocatable symbol if an
external symbol is part of the
expression,
•
contain any self-defining term with a
value >4095 if used as operand of a
machine instruction, and
•
exceed 16383 (decimal).
Relocatable expressions must conform to
the following rules:
•
A relocatable expression must contain
either one or three relocatable symbols.
•
If a relocatable expression contains
three relocatable symbols, one and only
one of these symbols must be preceded by
a minus sign.
•
If a relocatable expression contains
only one relocatable symbol, this symbol
must not be negative.
Some examples of valid relocatable expressions are shown below.
(R stands for
"reloca table sym bol".)
R+1, R-8, R-R+R, *-X'DO'
The following examples show some invalig
relocatable expressions.
o
The Basic Assembler replaces symbolic expressions with their numerical equivalents
by evaluating compound expressions, executing arithmetic calculations, and inserting
the results into the instruction.
R+R
R+R+R (one of the relocatable symbols
should be negative)
16-R
An expression is considered absolute if it
con tains
(contains two relocatable symbols)
(the relocatable symbol must not be
negative)
R-R-R (two negative relocatable symbols)
(1) only self-defining terms and/or absolute symbols, or
LOCATION COUNTER
(2)
one positive
able symbol.
an~
one negative relocat-
Some examples of absolute expressions are
shown below.
(The symbols PHS 1 an d PHS2
are considered relocatable.)
2510
PHS2+2510-PHS1
PHS2-PHS1
2510-PHS2+PHS1
The value of a relocatable expression is
changed by the Basic Assembler program on
The Basic Assembler program uses a counter
to record the address assigned to each statement read into main storage. This counter is referred to as ~he location counter.
At assembly time, as soon as an instruction statement has been read into main
storage, and, if required, boundary alignment has taken place, the location counter
is incremented by the number of bytes occupied by that statement.
The location coun'ter then indicates the next available
storage location.
o
Characteristics of the Basic Assembler Language
17
/
/
LOC.:
CTR I
I
0154
:OBJ.
SOURCE STATEMENTS
ICRD
I
onl
SIMTOI
srARr 340
INOA
SIMI02
002
LOAD BASE REG.
BASR 13.0
SIMT03
002
ASSIGN BASE RE.
USING ~. 13
SIMT04
OOZ
CIRCLE THE CONS T
15.CALe
Be
ST:oH05
002
eQU
10.....
RIO
ST~T06
007.
CLl7
PRT
OS
STMT07
003
Xt,9:'O'
WORK
DC
STMT08
003
XL7'0'
ACCU-i DC
STMT09
003
DC
X'Z4000C'
CPH
ST~TlO
003
RATE
DC
X'025C'
003
STI-ITll
X'0000000000005C'
ROUN
DC
003
S T"'TlZ
H'338'
DC
CNT
SIMTl3
003
H'l'
DC
DEeR
SI"1Tl4
003
X'40206B202020bR?020206B'
MASK
DC
STMTl5
003
X'2020214R2020'
DC
SIMTl6
003
LOAD COUNT
RIO,CNT
LH
CALC
STMTl7
003
ACCU+4(31,CPTL LOAD ACCU
",,~y.,C.)
STMTl8
004
WORK+l( 71, ACCU LOAD \~ORK:::,.
lOOP
MVC.
ST 'H 19
004
WORK,RATE
COMPUTE IMTEREST
OP
ST'H20
004
INCREMENT CAPITAL
AeeU,WORK( H
AP
ROUND DEC I flAl
004
STMT21
AeCU,ROUN
AP
004
RESTORE LAST DIGIT ST,H22
ACCU+6,X'OC'
104 V I
DECRFASE:
COU~T
STiH23
004
Rlo,DEeR
SH
TEST FOR CO~PlETION S T:-1T24
004
2,lOOP
Be
004
MASK TO PRINT AREA STAT25
PRT,MASK
MVC
EDIT RESULT
STMT26
004
PRT,Aceu
ED
STMT27
004
PRTlX '40' 1,17 PRINT RESULT
FINE
XIO
TfST PRINTE~ NOT OK ST'-1T28
005
1,PERR
BC
TEST PRINTER WORKNG S TiH 29
4,FINE
005
Be
TEST ENU OF 1/0
STMT30
005
TIOB ~,X'40'
TEST PRINTER ERROR ST~T31
005
TIOB PERR,X'41'
DISPLAY 999
X'999',0
STMT32
HPR
005
HALT
lOCK RESTART
S T;H33
l5,HAlT
005
Be
DISPLAY III
STMT34
005
PERR
HPR
X'lll',O
REPEAT PRINT
l5,FINE
STMT35
005
Be
STMT36
006
END
INOA
OBJECT CODE
0000
01~4
01-56
0156
OOOA
015A
016B
0174
0178
017E
0180
018B
018A
018C
0197
019E
01"'2
OlA8
OlAe
0184
018A
OlCO
01C4
0le8
Olee
0102
0108
OlOE
01E2
0lE6
OlEA
OlEE
OlF2
01f6
OlFA
0154
47FO 0048
0000
0000
2400
025e
0000
0152
0001
4020
0000 0000 0000 00
0000 0000 00
DC
0000 0000 5C
bB20 2020 bA20 2020 bB
2020 2148
48AO 0032
0022
~2
06 01)17
FD81 0015
FAb6 ODIE
FA66 DOlE
noc 0024
48AO 0034
4720 0052
0210 0004
DElO 0004
0040 0004
4710 OOAO
4740 DOB2
9A40 0090
9A4l OOAO
9900 0999
47fO 0098
9900 0111
47fO 0082
Figure 6A.
, Location
,i-------T
In Hex
2020
0025
DOlE
0028
0015
002A
0036
DOlE
0011
~
I
0154
0154
0156
0156
01SA
015A
016B
0174
,,
V
019E
01A2
01A8
01AE
01B4
Figure 6B.
18
I
o
--,-------------T
,
----.,
,
,
Counter Setting
In Decimal
34n
340
342
342
346
346
361
37?
,
,
V
414
418
42U
430
43~
Instruction, Length
I
START
BASR
USING
BC
EQU
DS
DC
,
I
I
V
LH
MVC
MVC
DP
,
I
L-_____- - L
(
Assignment of Storage Addresses
r
J
a
V
etc.
,I
none
I 2 bytes
none
4 bytes
I none
I 17 bytes
9 bytes
I
I
I
,
,
,
,
Statement
01
02
03
04
05
06
07
, ,
I V
I 4 bytes
I 6 bytes
6 bytes
I 6 bytes
I
I
I
I
,
16
17
18
19
-.J
Assignment of storage Addresses
System/360 Model 20 Basic Assembler Language
0
o
ASSIGNED ADDRESSES
If a printer is attached to the Model 20
during the assembly of a source program, a
program listing is produced, as shown in
Figure 6A.
The listing includes all statements translated into machine language. To
the left of the machine-language statements, the listing contains the address
assigned to each statement; i.e., the current setting of the location counter at the
time the statement is read into main
storage.
In the example in Figure 6B, the location counter is initially set to 340, which
is the address of t.he 'next sequential
storage location.
The next program statement, the BASR instruction, is stored
beginning at location 340.
Since two bytes
are required for the BASR instruction, the
location counter is incremented to 342.
Then follows the U~ING statement, which
does not require any storage space.
Therefore, the address 142 is assigned to the BC
instruction that follows the USING statement.
After storing the BC statement,
which requires 4 bytes, the location counter points to stor~ge address 346.
This
procedure is contin~ed until the entire
program is assembled.
o
of the location counter by using an
asterisk in the operand entry.
The example
in Figure 7 illustrates a print routine,
which includes a method of stopping the
processing flow until the execution of a
previously initiated output operation has
been completed.
The instruction TIOB *,X'40' tests to
determine if the attached 1403 printer is
still busy with the execution of the last
print command.
The second operand (X'40')
specifies the unit and the function.
The
first operand specifies the address to
which the pr~gram is to branch if the
printer is busy_
During the assembly of this instruction,
the Basic Assembler program replaces the
asterisk by the actual branch address,
which is the current setting of the location counter, 1078. During execution, the
program repeatedly branches to the same
instruction until the printer is no longer
busy and sequential processing of the subsequent instructions can continue.
No1~:
The same effect can be obtained by
the insertion of a symbol in the operand
entry that is also inserted in the name
fiel d:
TEST
TIOB
TEST,X'40'
The location-counter setting is limited to
the storage capacity specified in the control card.
The control card is described
in the SRL publications 1]~_~Y~1~IDLl~Q
The symbol TEST, as a branch address;
also repeatedly refers the program to the
same statement until the busy condition no
longer exists.
~Qg~1_l~£~£~Proqramming_Su£EoriL~~2ic
!E§~IDQ1~£~_QEerating Procedures, Forms C26-
r
3802 and C24-9011 ~or the card or tape versions, respectively.
If, for example, the specification in
the control card is 4096 bytes and the program to be assemblp.d exceeds this capacity,
the location counter is reset to 0 at the
point Where the specified storage capacity
is exceeded -- even if the storage capacity
that is actually available is greater than
4K.
The respective statement is identified
by an error message (L).
I
I
,
I
ILocationlNamelOperationlOperand
I Cou nt er I
I
I
I
I
1060
IHALTIHPR
IX'99',0
1064
IPRT(X'40'),17
IFIN IXIO
1070
11,HALT
I
I BC
1074 I
\4,FIN
I BC
1078
I
IT IOB
1*, X '40 '
1082
IHALT,X'41'
I
ITIOB
I
I
~
I
I
I
I
I
I
'------"---
Fiyure 7.
J
Use of an Asterisk in the
Operand Entry of a statement
The largest numner the location counter
can accommodate is 2 14 -1 or, in hexadecimal
notation, 3FFF.
The leftmost digits of any
value greater than 3FFF are truncated.
At any point in the source program, the
programmer may refer to the current setting
The Basic Assembler instruction ORG can be
used to reset the location counter to any
desired value.
This is described in the
section QR~_==_R~§g1!ing_lh~-1Q£~liQn
~Q.unl~£·
o
Characteristics of the Basic Assembler Language
19
o
SYMBOLIC (IMPLIED)
A storage address is the address of the
leftmost byte of the area referred to.
The
length of an addressed area is either
explicitly stated in the operand entry, or
is implied in the constant by which the
addressed area has been defined.
Registers
are fixed length areas and are, therefore,
exempt from this rule.
The two ways of specifying storage
addresses in a program written in Basic
Assembler language are:
1.
effective addressing, allowing for symbolic (or implied) addressing and
explicit addressing; and
2.
absolute (or direct)
addressing.
An address is generated as a storage
field of 16 bits.
The four high-order bits
(the B-field) indicate the base register.
The twelve low-order bits (the D-field)
indicate the displacement, which is the
difference (in bytes) between the contents
of the ~ase register (or the address represen ted by a sym bol) an d the referenced
s tor age lo cat ion.
D 1 (B 1) and D 2 (B 2) des i g nate addresses that are part of the first
and the second operand, respectively.
Addition of the contents of the base
register to the displacement gives the
actual address of a location in main
storage.
(Refer to the section ~~se
Reg:i~j;&£§· )
EFFECTIVE ADDRESSING
Effective addresses are identified by a
1-bit in the leftmost position of the Bfield, which signals that at least one of
the general registers 8 through 15 must be
used as a base register.
At assembly time,
the address of a location in main storage
is split into two narts,
a)
a fixed value contained in the base
register, and
b)
a displacement, which is the difference
between the actual storage address and
the contents of the base register.
At object time, the contents of the general register specified by the B-field of
an address are added to the contents of the
D-field to form the actual address in main
storage.
20
ADDRE551 NG
5y mbolic (or implied) addressing is used
when a symbol is given in the operand entry
of a statement, rather than the explicit
specification of a base register and a displacement. The equivalent value of the
symbol is assigned by the location counter.
The symbol must be defined elsewhere in the
program.
(Refer to the section ~~.QoI2.)
I
When the Basic Assembler program encounters a symbol during assembly, it scans the
symbol table, finds the associated address,
and assembles this address into the
instruction.
If the operand consists of a
compound expression, such as ALFA-BETA+
GAMA, the address equivalents of all symbols are looked up, the arithmetic operations are executed, and the result is
assembled into the instruction.
The computed address integer is not
stored as it is, but is first split into a
base register and a displacement.
This is
explained in the following example.
If the address equivalent of the abovementioned compound expression (ALFA-BETA+
GAMA) were 6319, the Basic Assembler would
split this address by selecting a base
register containing the closest value to
6319. For example, if the three base
registers 9, 10, and 11 wer e used and contained the values 4000, 5000, and 7000,
respectively, the Basic Assembler would
select register 10, because this register
would cause the smallest displa cement,
which is the difference between the actual
storage address and the contents of the
base register selected by the Basic Assembler for address generation. Thus, the
displacement resulting from the splitting
of 6319 is 1319.
The address 6319,
assembled into the instruction, therefore,
has the following format:
1319 (10); or
A527 in hexadecimal notation, as i t is
printed on the program listing produced
during the assembly.
"A" represents the
base register and "527" represents the displacement, 1319.
A displacement calculated by the Basic
Assembler cannot be greater than 4095.
For
the calculation of addresses higher than
4095, additional base registers must be
used.
The rules followed by the Basic AssembIer in the selection of a suit able base
register are as follows:
System/360 Model 20 Basic Assembler Language
(~)
"
0
'
o
1.
If more than one register would produce
d valid displar.ement
(not exceeding
4095), the Basic Assembler uses the
register that produces the smallest
displacement.
2.
If two or more registers produce the
same displacement, the Basic Assembler
uses the highest-numbered register.
3.
If none of the specified registers produces a valid oisplacement, the address
field in the instruction that contains
the invalid opprand is set to zero.
An
appropriate error message appears in
the program listing.
The advantages of symbolic addressing
are the simplicity of the method itself and
the resulting relocatability of the
program.
EXPLICIT ADDRESSING
Explicit addressing requires the specification of a base register and a displacement
in the operand entry of a statement.
~~~llig.!.
o
MVI
800 (8) , XI A'
The above statement causes the immediate
data (X'A') to be stored in the location
identified by D1=8no and B1=8.
Explicit addressing provides a special
technique of address modification, called
ing~~ing.
Using the indexing method, the
programmer can conveniently deal with a
storage area step hy step.
Assume that a table of 100 integers,
each of which is 5 bytes long, is contained
in main storage.
~hese integers are to be
transferred one-by-one to the output area
OUTA.
TLIM
TLEN
INCR
TADR
TAB
OUTA
DS
DC
DC
DC
DS
DS
END
Ii
H'495'
H'5'
Y (T AB)
100CL5
100CL5
BGN
In the above routine, register 9 is used
as a base register.
The maximum table
address (TAB+495) is computed in register.
10 and then stored at location TLIM.
Register 8 is loaded with the address of
the first table entry (see the section,
Addres~_~on~ta~ts).
The expression 0(8)
thus designates the first table entry
(TAB), which is moved to OUTA.
The data stored in OUTA is printed.
(For simplicity, the necessary edit and
test routines are omitted.)
The subsequent
instruction is used to increase by five the
contents of register 8, causing the address
0(8) to point to the posi ti on of the second
table entry (TAB+5).
The contents of
register 8 are then compared with the maximum table address at location TLIM.
If the
value in register 8 is lower than, or equal
to, the compared value in TLIM, the program
branches to LOOP to fetch another table
argument.
Otherwise the program halts.
Normally, if base re.gisters are used for
address generation, a symbol in the operand
entry of a statement should not be accompanied by an explicit base register designation.
It is possible, however, to specify a symbolic address accompanied by an
explicit base rEgister designation, instead
of using the exp ression 0 (8) in the previous example.
If TAB(8) is given as the
second operand:> f the MVC instruction, the
address is computed by adding the (normal)
displacement value of TAB to the contents
of register 8.
The sta temen t is flagged
with a warning message.
In the previ:>us example the instructions
BGN
START
BASR
USING
350
9,0
*,9
LH
MVC
LOOP
8,TADR
OUTA(5) ,0(8)
may be replaced by
SR
LH
AH
STH
LH
LOOP
o
MVC
XIO
AH
CH
BC
HPR
10,TADR
10,TLEN
10,TLIM
8, TADR
OUTA (5) ,0 (8)
OUTA(X'40'),5
8,INCR
8,TLIM
12,LOOP
X'99',0
AR
LOOP
MVC
8,8
8,9
OUTA (5) ,TAB (8)
!ot~:
In the statements following this MVC
statement, the program again uses the base
register that was originally designated.
This program can be simplified further
if absolute addressing is used.
In the
Functions of the Assembler Language
21
following example pseudo register 0 is used
as a base register.
BGN
LOOP
TLIM
INCR
TAB
OUTA
START
USING
350
*,0
SR
MVC
XIa
AH
CH
BC
HPR
8,8
OUTA(5) ,TAB(8)
OUTA (X'40'),5
8,INCR
8,TLIM
12,LOOP
X'99',0
DC
DC
DS
DS
END
H'495'
The Model 20 uses eight auxiliary storage
units which are referred to as general
registers. Each of these general registers
has a length pf one halfword (two bytes).
The general registers are numbered from 8
to 15 and are used for temporary atorag~of
information during execution of indexing,
fixed-point arithmetic~ address generation,
and logical Jperations.
H' 5'
100CLS
100CtI,
BGN
(~
from register to main storage, or
(3)
from main storage to register.
When general registers are used for
addressing, they are referred to as Qsse
registe~§.
Base registers are assigned by
a USING statement, as explained in the section Ba2~_Regi§t~rs_
r----.--------~
An advantage of using general registers
for fixed-point arithmetic is that data
need not be packed prior to computation.
All calculat ions ar e ex ecut ed in binary
form.
AR
9,10
LH
12,AREA The first 2 bytes of the field
AREA are loaded into register
12.
(Note that in this case
the field)AREA must be aligned
at a halfword boundary.)
~
I
~
--.-J
Absolute addresses are also split into
base register and ~isplacement by the Basic
Assembler program, as Idescribed in the section ~ffe£tive-hgg~g§§ing.
This addressing
method, however, requires the specification
of pseudo-registers to be used as base
registers.
A program that contains absolute addresses is not relocatable.
(}
Examples of the use of general
registers:
I
The above statement causes the contents
of register 13 to be stored in position
2440 of main storaqe.
22
from register to registe r,
The direction of the information flow is
implied in the machine-instruction format.
(Refer to the section Ma£hine Instru£iion
'§i~iemen t§.)
Absolute addresses are identified by a zero
in the leftmost bit position of the
B-field. In absolute addressing, the 14
low-order bits of the combined Band
D-field represent the complete address
value and refer directly to byte locations
in main storage. Absolute addresses are
specified by decimal ~ntegers or absolute
symbols in the operand entry of a
sta tement.
~
(1)
(DIRECT) ADDRESSING
INamelOperationlOpprand
•
I
I
I
I S_______
TH
I 1 3, 24 4 0
L-___
I
Information that requires the use of
registers can be transferred
Register 8 is initially set to zero.
Thus, TAB (8) refers to the first table
entry.
When the last MVC instruction has
been executed, register 8 contains the
value 500 and the program halts.
ABSOLUTE
o
The contents of register 10 are
added to the contents of register 9.
The result is contained
in register 9.
STH 13,aUTA The contents of register 13 are
stored in the field OUTA.
(Note that in this case the
field OUTA must be aligned at a
halfword boundary.)
When using the IOCS, the following restrictions on general registers apply_
•
System/360 Model 20 Basic Assembler Language
Register 15 must not be used by the programmer at any time.
o
o
•
Register 14 is available only for
restricted use, since its contents are
changed each time a macro instruction is
executed.
Registers 11-15 are used by the 1419
IOCS.
In addition to the eight general registers
there are four pseudo-registers numbered 0
to 3.
(If a Submodel 5 is used, pseudo
registers 0-7 are available.
However, 0-3
are the only pseudo registers recognized in
CPS programs.)
The pseudo-registers are
assumed to have the following permanent
con ten ts:
o
o
1
4096
8192
12288
2
3
The pseudo-registers may be used only
for storage addressing, i.e., as base
registers.
The advantage, in comparison to
the use of general registers, is that
pseudo-registers need not be loaded with a
base address.
Thus, program execution is
faster and the general registers are available for other purposes. However, pseudoregisters can be used only for the specification of absolute addresses.
Additional
information is given in the section !E§Q=
IJ!i~L!gg£gssing •
Base registers are general registers that
are used for addressing main storage locations.
The contents of a base register are
subtracted from each storage address during
program assembly; the remainder is referred
to as the displacement.
The base-register
number, together with the displacement, is
assembled into the instruction.
At least one general register must be
assigned as a base register at the beginning of a relocatable program.
In addition, this register must be loaned with the
desired base address, which is normally the
start address of the program.
USING -- USE BASE
o
i
i
1
I NamelOperationl Operand
I
I~---+I--------+I------------~-------~
•
o
i
~EGISTER
The USING statement is used to assign base
registers.
It also informs the Basi~
Assembler program of the anticipated contents of the respective base registers.
IL - - - LI._
US _
ING
__
I * , 11
I
-J
The above statement designates register
11 as a base register and informs the Basic
Assembler pngram that it may expect register 11 to contain the current value of the
location counter.
!ote: A name entry is not used.
If a symbol appears in the name field of the USING
statement, it is disregarded by the Basic
Assembler program -- if it conforms to symbol specifications.
Otherwise, it is identified by a dia gnostic message in the program listing.
All registers that are assigned by means
of USING statements must be loaded. This
can be achieved by means of BASR
instructions.
BASR -- BRANCH AND STORE REGISTER
For example, the statement BA~R 12,12
causes register 12 to be loaded with the
current value of the location counter.
This is followed by a branch to the address
ErevioJ!21y contained in register 12.
Thus, in the above USING-statement
example, register 11 can be loaded as
follows:
r-,
i
--,
INamelOperationlOperand
I
~-+-----+----------------------~
I
I BASR
L _ _. L - ,
I 11,0
____________.___________ ----JI
.1..
Register 11 now contains the address of
the next storage location; that is, the
current value of the location counter at
assembly time.
The second operand, which
normally specifies the register that contains the branch address, prevents branching because it refers to register O.
Accordingly, the first instructions of a
progrdm may be the following:
Functions of the Assembler Language
23
START
BASR
USING
o ( 12)
356
11,0
*, 11
= 0
t
5098 = 5098
Base register 11 is loaded w hen the BA SR
instruction is executed.
Note that 1002 is
the address ~f the first machine instruction after· the BASR sta temen t.
BGN
The largest displacement that can be
calculated by the Basic Assembler is 4095.
Therefore, an additional base register
mustbe assigned for each additional 4096
bytes of main storage required.
Additional base registers may be specified also for other programming purposes,
such as creating d~fined areas (dummy sections) in main storage where c~rtain program subroutines can be executed or where
intermediate data is stored.
However, if
several base registers are specified by
subsequent USING statements, an adequate
method of loading these base registers must
be found.
To load registers 12 to 14, the desired
addresses are supplied to the Basic Assembler by means of address constants, which
are then loaded into the respective register by subsequen t LH instructions.
Since
the location counter is being referred to,
the addresses specified by address constants are incremented first by the start
address of the program (1000), and then by
the length of each instruction.
Therefore,
the accumulated instruction lengths must be
subtracted when the address constants are
set up.
The expressions contained within
the parentheses of the address constants
can also be used in the first operand of
the respective USING statement.
o
I
Figure 8 illustrates one such method.
r-------T
---,I Location- I
I
I
ICounter
INamelOperationlOperand
IReferencel
I
I
~
-+----+-
I
1000
1000
1002
1002
1006
1006
1008
1008
1010
1010
ALFA
BETA
GAMA
PRGM
1016
1020
START
BASR
USING
BC
USING
DC
USING
DC
USING
DC
LH
LH
LH
I 1000
111,0
I * , 11
115,PRGM
I * + 4098-' 6 , 1 2
I Y (*+4098-6)
1*+6192-8,13
I Y (*+6192-8)
I * + 4 5 0 0- 1 0, 1 4
I Y (*+4500-10)
112,ALFA
I 13, BETA
114,GAMA
,
I
I
I
Example of Loading Base
Registers
~KRlan~tiQn:
The ~ollowing base registers
are assigned by USING statements:
11,12,
13, and 14.
In this example, the base
registers are loaded with the following
base addresses.
Register
Register
Register
Register
11
12
13
14
ALFA
BETA
GAMA
1
~---------~
Figure 8.
Accordingly, the address constants have tha
following values:
1002
5098
7192
5500
Base register 12 is assigned and loaded
to deal with addresses higher than the
maximum address th~ Basic Assembler can
generate by using ~ase register 11, which
is
4095(11) = 409C; + 1002 = 5097.
The contents of a base register can be
altered whenever required; but the Basic
Assembler program must be informed of the
change by means of a USING statement.
o
r--~---------T-----------------------'
INamelOperationlOperand
I
I
IUSING
IALFA,9
I
I
I
I
I
I
I
I
I
I
I
I
I
I
V
I
I
IUSING
IALFA+1000,9
L
- -_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
r--+-
I
1
I
I
I
I
I
I
~
To use absol~t~ addressing, a pseudoregister must be specified in the second
operand of the USING statement.
In addition, the first operand must be an
asterisk; otherwise,' the USING statement
will be identified by a diagnostic message
in the progr am listing.
The pseudo-registers need not be loaded.
They are assumed to contain at any time the
values described in the section
Pseudo::.Registef:~
The statements:
The next higher address is generated as
24
1006 + 4098 - 6 = 5098
1008 + 6192 - 8 = 7192
1010 + 4500 - 10= 5500
System/360 Model 20 Basic Assembler Language
START
USING
USING
USING
USING
ORG
0
*,0
*+4096,1
*+8192,2
*+12288,3
* +316
o
inform the Basic Assembler program that
pseudo-registers 0 through 3, the contents
of which are 0, 4096, 8192 and 12288 are to
be used as base reqisters.
For example, in this case storage
address 3091 is split into displacement
C13(hexadecimal equivalent for 3091) and
base register 0, and assembled as OC13.
In
like manner, storage address 6000 is
assembled as 1770, address 10000 as 2710,
and address 16000 as 3E80.
A program cannot be relocated if pseudoregisters are used as base registers.
This
disadvantage, however, may be outweighed by
having all the general registers available
for other purposes.
DROP -- RELEASE BASE REGISTER
If a general register has been assigned the
functions of a base register, it cannot be
used for other proqramming purposes unless
the programmer cancels the assignment.
This can be done by means of a DROP
statement.
ri----Ti--------~lr-------------------------__,
INamelOperationlOperand
I
IUSING
I
I
I
I
I
I
/
/
'V
~
__-4',DROP
________
+--
IADDR,11
I·
I
I
/
,
I
--J
I
I
I
,
/
,
/11_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ - - - - J,
~I~
After the DROP statement in the above
example, register 11 can be used as an
index register, an accumulator for arithmetic operations, etc.
A name entry is not
used in the DROP statement.
If a name is
specified, it is disregarded by the Basic
Assembler program -- if it conforms to symbol specifications.
Otherwise, the statement is identified by a diagnostic message
in the program listing.
o
o
Functions of the Assembler.Language
25
o
A program is relocatable if it fulfills the
following conditions:--1.
It must contain all of the loader
information produced by the Basic
Assembler program (i.e., the punching
of ESD and RLD cards must not be suppressed during the assembly of such
programs).
2.
At least one of the general registers 8
to 15 must be used for address
generation.
3.
It must not contain absolute expressions to refer to areas that are to be
relocated.
A program is ~~§Q!utg if at least one of
pseudo-registers 0 to 3 is specified and
used for address generation throughout the
program.
Absolute pro g:amming has the advantage
of saving general registers for programming
purposes other than address generation.
In
addi tio n, t he Basic Assembler p rog ram is
not required to split the specified absolute addresses if pseudo-register 0 is specified in an appropriate USING statement.
Absolute programming does not restrict the
application of symbolic addressing.
I
Absolute programming must not be used
under the following conditions:
1.
If (1) the Ioes is used, and (2) the
source program and the symbolic Ioes
routines are to be assembled
separately.
2.
If subsequent parts of a program are
loaded and executed together.
In this
case, only the program loaded first may
be absolu tee
o
o
26
System/360 Model 20 Basic Assembler Language
PROGRAM LI NKING
o
Extensive programs that exceed the available main storage capacity must be subdivided into sections that are assembled
separately.
3.
The maximum number of EXTRN statements
to be used within one program sequence is
14~
Symbols contained in statements in
excess of this number are indicated as
undefined in the program listing.
Since the Basic Assembler program is no
longer required during object program
execution, storage availability is
increased, which may allow the loading and
simultaneous execution of more than one
object program.
Two jointly executed program sections
may contain the same symbols, provided
these symbols are ~efined in only one of
the two programs. In addition, these two
program sections must be linked together by
means of EXTRN and ENTRY statements. These
statements are described below.
o
For the
and B),
program
used in
joint execution of two programs (A
EXTRN statements must be used in
B to introduce symbols that are
program B hut defined in program A.
An EXT RN stat ement must immediately folIowa START statement, an ENTRY statement,
or another EXTRN statement.
If an EXTRN
statement is incorrectly placed, it is
identified by a warning message.
If it
contains an incorrect operand, it is identified by an error message.
In either
case, the statement is not used.
An EXTRN statement in program B requires an
ENTRY statement with the same operand in
program A, where the appropriate symbol is
defined.
r---~--------~-------------------------'
r
i
INamelOperationlOperand
i
INamelOperationlOperand
~
I
I
1
I EXTRN
1F 1
L____ ..L-
1
~
I
J
The EXTRN statement in the above example
introduces F1 as a symbol that is defined
in another program section.
A name entry is not used in the EXTRN
statement. If a symbol is entered in the
name field, it is ~isregarded by the Basic
Assembler program -- provided it conforms
to symbol specifications.
otherwise, it is
identified by a diagnostic message in the
program listing.
Only one operand -- a relocatable symbol
-- may be specifie~ in an EXTRN statement.
Each additional external symbol must be
introduced by an anditional EXTRN
sta tement.
If an external symbol is to be used, the
following action is required:
o
The external symbol must be referred to
in the program by means of the above
general register.
1.
An address constant must be created for
the external symbol.
2.
The address constant must be loaded
into a general register.
1
~-+---------1--------------------------~
IPRGAISTART
IENTRY
I
I
I
I
I
I
I
I
I
I
I V
IF1
I
I
I
I
I
I
I
I
I
I
I F1
I XL2' F 0 F 0 '
I
1
IDe
12000
IL - - - - LlEND
IPRGA
-________ ..L-_________________________
JI
The above ENTRY statement permits program D, which has been loaded and stored
behind program A, to use the contents of
the field Fl.
The Basic Assembler ENTRY statement follows the same syntax rules as the EXTRN
statement. The START statement of a program can also be used instead of an ENTRY
statement; that is, program names need not
be introduced as linkage symbols by ENTRY
statements.
The order in which independently
assembled programs are loaded determines
the extent of their linkability by means of
the relocatable program loader.
Programs
containing the entry points must be loaded
ahead of the programs containing the corresponding external links.
Program Linking
27
---,
r------------------------------------------~
!1!I~_R.ftQ~R!!i
I
I
I
~Q1H!QQTl1!]
I
I
I
I
---,---------.--T------------------------~
I Name I Operation I Operand
I
l-------T---------~ .
I Name I Operation I Operand
,.---.....:t---------+----.~--------------~--_+_
CRDT
ST ART
ENTRY
EXTRN
I3ASR
USING
LH
XIO
I
I
I
GET
r-----+->CVB
F1
C VB
8, a
*,8
12,YCVB
INPT(X'12'),80
v
~
ST ART
EXTRN
. BASR
US I NG
MVC
LH
MVN
I
I
I
o
~
1000
F1
11,'0
*, 11
WAN,KOO
10,YFl
WAN+l(1),O(10)
I
V
MVC
'BASR
SR
Fl,INPT+l0
9,12
<--------~
13,14<
AH
r j-+---~--+-B
J
.1
CR
WAN
KOO
DS
DC
YFl
DC
END
13,WAN
15,9
H
H'
0'
I
I
I v
I Be
F ,I DC
YCVB I DC
I· END
L-_____ _ _ _ _ _ _ _ _
~
Figure 9.
15,GET
C'OO'
Y (C VB)
CRDT
~
____
~---------
Y (F 1)
CVB
~----------------------
Sample of Program Linkage
However, a, program may refer to the names
of programs loaded subsequently, by means
of .the Include Segment (ICS) card of the
Relocatable-Program Loader. This is
described in the SPL publication 1]~
~y~!~mL1QQ_!1QQgl-1~_~~~Q_Erog~amming_~~E=
EQ£iL_~asi£~~!ili!y_R.~Qg~~m~L E~n£tiQn~_~nQ
Q.E e r ~.ti.!l.9:_R..£Q£gQQ~g~,
F0
r.m
C 26- 360 4.
SAMPLE PROGRAM
A sample' program that illustrates program
linking is shown in Figure 9.
program to allow branching to cva, which
the EXTRN statement declares to be an
externally defined symbol.
An ENTRY statement in the subroutine'is
not required for eVB because the START statement I in this ca'se, serves the s arne purpose. During execution of the main program, the data that is read from cards (XIO
instruction) is stored in the field INPT.
For conversion into binary f6rm, the applicable data section is moved into Fl. Then
the program branches into the subroutine
(BASR instruction).
The main program in Figure 9 is assumed
to deal with data in binary form.
Since
the data obtained by means of the XIO statement is in u~packed decimal form, the
subroutine is used to convert the data into.
binary. To achieve this, the main program
must be loaded first l using the Relocatable
Program Loader, including an IeS card to
allow reference to the subroutine which is
loaded after the'main program.
(The two
programs in thi~ example are corisidered to
be separately assembled.)
The contents ~f F1 are available to the
subroutine because Fl is declared to be an
external symbol by the EXTRN statement, and
an entry is provided by an appropriate statement. in the main program.
In addition,
the address of Fl is loaded ~nto register
10 during execution of the subroutine.
Explicit addressing with base register 10
and a displacement of a (MVN instruction)
enables the subroutine to make use of the
reguired data.
'Program linkage is achieved as fo+lows.
Through the rcs card, the loader reserves a
storage area for the subsequent program
while loading the main program. The
address of the reserved area is loaded into
register 12 during execution of the main
The contents of Fl are processed until
the final step (AH instru6tio~ results in
a binary value contained in register 13.
Then, a branch back to the main program is
performed (BCR 15,9) and the binary value
in register 13 is at the disposal of the
main program.
28
(-)1
System/360 Model 20 Basic Assembler Language
o
o
EQU -- EQUATE SYMBOL
The Basic Assembler instruction EQU is used
to equate a symbol to the attributes of an
expression.
The EQU statement consists of (1) the
name entry, (2) the operation code EQU, and
(3) an expression as a n operand.
All symbols appearing in the operand of the EQU
statement must have been E£~viouslL
defined.
r
i
1
i
IName I Operation IOperand
r----+
IREGSIEQU
___
L. _ _
I
----~I------------------------~,
15
I
~
J
The symbol REG5 is equated to the absolute value 5 and thus becomes absolute. To
the Basic Assembler program, it is of no
further significance whether REGS or the
value 5 ~s specified in the operand of a
statement elsewher~ in the program.
o
To reduce programming time, symbols can
be equated to frequently used compound expressions, as shown in the following
example:
r
i
j
~---+
ICALCIEQU
L____
~
I
-+I----------------------~,
IA-R+C
_________
I
J
~___
Type
The four types of constants are shown in
Figure 10.
The length of a constant must not exceed
16 bytes including the bytes skipped for
boundary alignment. Constants exceeding
these lengths must be defined by subsequent
DC statements.
For example, the character
constant C'THIS PARAMETER COMBINATION IS
INVALID' should be defined as
The symbol PRT1 in the statement below
still refers to the complete sentence;
i.e., it causes the complete sentence to be
transferred to position FLDA.
i
I Co del ~ a chi n e Fo r mat
I
I
~----------+----+---
0
f the Con s tan t IAlignment at
ICharacter
I C 18-bit code for each character
I
I
I
IHexadecimall X 14-bit code for each hexadecimal
I
I
Idigit
I
I
I
IHalfword
I H 116-bit binary equivalent of the
I
I
Ispecified value (signed)
I
I
I
I y 116-bit binary equivalent of
I Address
I
I
Isymbolic or absolute storage
IL ___________ LI ____LI~ddress
Figure 10.
FLDA(37),PRTl
Character constants may consist of any of
the 256 EBCDIC characters. Each character
r---------~-~
o
C'THIS PARAMETER C'
C'OMBINATION IS IN'
C'VALID'
CONST~NT
Constants are data supplied to the program
by the Basic Assembler stateme~t DC (define
constant) •
I Type 0 f
I Constant
Constan t
The type is written as a single letter,
C, X, H, or Y. The length modifier is
written as a decimal integer, preceded by
the letter L.
It must not be specified for
Hand Y-type constants.
MVC
DC -- DEFINE
Length
Modifier
PRT 1 DC
DC
DC
,
INamelOperationlOperand
The object program refers to these constants by their symbolic addresses,i.~.,
each DC statement is normally identified by
a symbol that point~ towards the storage
location of the constant. A DC statement
may have only one operand which has the
following components:
Types of
I
I
by te bounda ry
I
I
-1
byte boundary
halfword boundary
halfword boundary
Con~;tants
Definition Instructions
29
in these constants occupies one byte of
main storage.
DC statements that define character constants may comprise all of the three
operand components:
type, length modifier,
and the constant.
~lf~!!!E1~:
r---,--
-,--
l.ameIOperationIOp~rand
l----f-------+
ICON11DC
L __
,
r----r
,I
~-+------+------""'--------"'-----~
ICL4'ABCD'
I
i
I Namel Operation IOperand
IMASKIDC
__
I.
..,.----,
.I
IXL3'A345BF'
_________________________ - - - - JI
~
J
~_
The length modifier (L4) coincides with
the number of characters in the constant.
Therefore, it has no effect because the
Ba~ic Assembler program assumes the length
of the constant to be implied if the length
modifier is omi tten.
However, if the
length modifier disagrees with the number
of chatacters in the constant, the constant
is modified as follows.
In the ab~ve example, the name entry ~nd
length modifier are nptional and may be
6mitted.
This stat~ment causes the constantA345BF to be generated in main
storage.
Each pair of digits is translated
into one byte.
ThUS, the length modifier,
L3, coincides with the length of the constant and has no effect because the implied
length is half the number of hexadecimal
digits specified if the length modifier is
omitted.
However, if the length modifier
is not equal to half the number of hexadecimal digits i the constant is modified as
follows:
1.
rf the length modifier is smaller than
the number of .characters in the constant, rightmost digits of the constant
are dropped to achieve.agreement with
the modifier.
·1.
If the length modifier is greater than
the number of characters in the constant, the excess rightmost bytes are
fille~ with blanks until ·the length of
the constant agrees with the len~th
modifier.
2.
In the above example, the name entry,and
length modifier are optional and may be
omitted. 'This statement causes the constant ABCD to be generated in main storage.
2.
o
Hexadecimal constants are used to introduce
data characters each of which occupies half
a byte of main storage.
DC statements that
define hexadecimal constapts may comprise
all of the three operand components:
type,
length modifier, and the constant.
The constant must be enclosed by apostrophes.
The length of the constant must
not exceed 16 bytes.
Apostrop hes and
ampersands that aie to appear within constants must be written twice but are counted only once.
If the length modifier is smaller than
the number of pairs of hexadecimal
digits the leftmost digits of the constant are dropped to achieve agreement
with the modifier.
0
~
I
,.:.
If the length modifier is·greater than
the number of pairs of hexadecimal·
di gits, t he ex cess leftmost by tes are
filled with zeros until the length of
the constant agrees with the length
modifier.
The constant may consist of any number
of valid hexadecimal charaqters, 0 to 9 and
A to F, but must not exceed 32 digits.
If
an odd number of digits is specifie~, a
hexadecimal zer~ is added to the leftmost
position.
~gmple§.:
Ex~llig:
statement:
CON2
DC
Generated as: ' TOTAL 1 0'
C" 'TOTAL 1 0' , ,
(implied lengt h
10 bytes)
Sta tement:
Generated as:
CL l ' YY'
(explici t
length one
byte)
CON2
Y
DC
In the last example, the specification
of the length modifier (L1) causes the last
character y to be truncated.
This statement will be identified by a warning mesiage in the program listing.
30
TRIX
Statement:
genera ted as: 03AF
DC
X' 3 AF"
Statement:
INCR
generated as: 0000BA05
DC
XL4' BAOS'
statement:
TRNC
generated as: E696
DC
XL2' AFE696'
In the last example, th~ specification
'of the length modifier (L2) causes truncation of the digits AF.
The truncation
causes the statement to be identified by a
warning message in the program listing.
System/360 Model 20 Basic Assembler Language
o
o
A hexadecimal constant can be used to
set the binary bits of a halfword.
The
constant in the following example sets the
eight leftmost bits of a halfword to 1's.
Since a hexadecimal constant is not boundary aligned, the preceding DS statement is
applied to force this condition.
(For a
discussion of DS statements refer to the
section Q~-==-]efin~_StQ£~g~.)
r
i
I
I
I DS
ITESTIDC
I
-+I--------------------~~,
10H
I
I
IX'FFOO'
L--...L-
A half word constant is a signed integer,
aligned at a halfword boundary.
The
operand must not contain a length code.
~
I
IWORKIDC
L-___ __.______
~
o.
-+--
IH'-24'
~
The statement named LOOP stores the
value of register 10 in the location designated by register 8, ~hich is the table
address ADTA loaded into r~gister 8 by the
statement named RTN.
Thus, the first calCUlation result is stored in the first
table position.
The AH statement then increments the
contents of register 8 (i.e., the table
address) by four, the implied length of
each position.
The contents of register 8
now point to the second table position.
r----~-------~----------------------____.
INamelOperationlOp~rand
The routine PRGM in Figure 14 calculates
certain values, which are then stored in
the 480-byte table defined by TABL. The
program loads the fir?t value to be stored
into register 10 (sta tement 034 A) and
branches to LOOP (statement 0330).
,
INamelOperationlOp~rand
~---+-
This is demonstrated in Figure 14 and in
the section IDg~iDg.
I
~
I
----J
The name entry is optional and can be
omitted.
The abov~ statement causes the
generation of one halfword in main storage,
containing the value -24.
The highest allowable value for a halfword constant is 32767, the lowes~, -~2768.
If a specified number exceeds either value,
the constant is set to zero and the statement is identified by a warning message in
the program listing.
Unsigned numbers are
considered to be positive.
An address constant is a relocatable or
absolute expression, enclosed in parentheses with the prpfix Y.
It is used for
indexing {i.e. , generating and incrementing
address values to scan main storage) and
for program linkin0.
The operand must not
contain a length modifier.
Successive repetitions of the procedure
continue until the table is filled or the
program is terminated by the TM
instruction.
The use of the address constant to link
two or more simultaneously executed program
parts is discussed in the section PrQgra~
LinKing.
An absolute expression is specified in
the operand of an address constant if a
branch to an absolute address is performed
during the C3urse of a program.
But the
program must be relocatable.
Obviously,
the absolute address should be updated upon
program relocation to avoid branching to
the wrong statement.
This updating is
guaranteed by the address constant.
One
method of accomplishing this updating is
demonstrated by the following example.
BC
ORG
DC
15,0
*-2
Y(3215)
In the normal branch instruction BC 15,
3215, the address 3215 would not be altered
upon program relocation.
Therefore, the
second operand is set to zero as the branch
instruction is assembled.
r----.--------~--------------------------,
INamelOpetationlOpprdnd
I
~
I
-+----------------------~
IADTAtDC
L___ ________ IY(TABL)
__________________________ JI
~
o
~
In the above example, the address of
TABL is stored at position ADTA.
If ADTA
is now loaded into a register, ari AH
instruction can be used to update or increment this dddress by any desired value.
On its own, this imperativ3 branch
instruction would be invalid because it
instructs the computer to branch and, at
the same time, prevents the brilnch by setting the branch address to zero.
However,
the Basic Assembler program does not consider this statement incorr~ct since all
syntax requirements are satisfied.
The
second operand of the BC instruction can be
omitted, provided the comma is written.
Definition Instructions
31
Bytes
10.
Figure 11.
2
3
4
11
12
13
5
6
9
8
7
o
Uneconomical Storing of a Sequence of Constants
The ORG statement reduces the value of
the location counter by two bytes so that
it points to the location of the second
operand of the BC instruction, which is
updated if the proqram is relocated.
DC
DC
X (hexadecimal type)
C (character type)
I
resulting in the storage allocation shown
in Figure 12.
DS -- DEFINE STORAGE
Halfword and address constants are automatically aligned at halfword boundaries by
advancing the location counter to the proper value (multiple of 2) when either type
of constant is encountered in the source
program.
For economical use of main storage, the
sequence in which constants are defined 1S
important.
The following example shows the
definition of a sequence of ~onstants.
It
is assumed that the first storage position
of these constants is not boundary aligned.
CandX-type constants have an implied
length of one byte.
DC
DC
DC
DC
. DC
DC
DC
C
X
H
X
(character type)
(hexadecimal type)
(halfword type)
(hexadecimal type)
y (address type)
C (character type)
y (address type)
They are stored as shown in Figure 11.
As shown in Figure 11 three bytes are'
not used.
A more economical specification
sequence is
DC
DC
DC
DC
D~
C (character type)
H (halfwordtype)
y (address type)
y (address type)
X (hexadecim~ltype)
Figfire 12.
The DS (Define Storage) statement is used"
to reserv~ storage for work areas, I/O
areas, tables, etc.
These storage areas
are not set to zeros or blanks.
The location counter is incremented during assembly
by the number of bytes implied in the
operand .of the DS statement, leaving the
respective storage positions unused when
the object pcogcam is loaded.
The program
later refeLS to this area by the symbolic
address of the DS statement.
The DS statement can also be used to effect boundary
alignment of the subsequent program sections.
The DS statement has only one
operand.
It has the following format:
Duplication'
Factor
Type
L engt h
Modifier
The duplication factor is written as a
decimal integer; the type is written as a
single letter, C or H.
The length modifier
is wri t ten as a deci mal int eger, precede:i
by the letter L.
It may only be ~pecified
for C-typeconstants.
The maximum value is
256.
The storage area that can be reserved
by a DS stat~ment is limited only by the
~apacity of the location counter.
The H-type o~erand is employed to reserve a
storage area the subfields of which have an
implied length of two bytes.
Economical Storing of a Sequence of Constants
o
32
System/360 Model 20 Basic Assembler Language
o
.------,-
---------------,
i
INamelOperationlOpprand
I
t
I
I
-f
IINA11DS
120H
I
____
______________•____________
L---_~
~I~
~
This statement causes 20 halfwords (40
bytes) of main storage to be reserved,
beginning at a hal~word boundary.
The
leftmost byte of this area carries the symbolic address INA1.
Each storage field
referred to by this address has the implied
length of two bytes.
The knowledge of the
implied length is important if INA1 is specified as an operand of a machine instruction that requires the inclusion of a
length factor.
If the data is defined as character or
hexadecimal constants, i.e., data is not
automatically boundary aligned, it may be
difficult to verify this alignment, especially in a complex program. In such a
case, it is better to force boundary alignment, as a precaution, thus removing the
need to verify.
In the following example, a storage area
named AREA is defined, with an implied
length of 128 bytes.
The preceding DS statement with a duplication factor of zero
sets the location counter to a halfword
boundary.
I
I
,--------------------------,
INamelOperationlOperand
/----_+_
I
IDS
For reservation of storage areas with subfields of different implied lengths, the
C-type operand is used.
r
--r
I
I
-+I-------------------------~
r----t
IINA21DS
110nCL3
I
J
L
This statement reserves 100 fields of
main storage with a length of 3 bytes each,
a total of 300 bytes, addressable through
the symbol INA2.
This reserved area is not
boundary aligned.
The length modifier of a DS C-type statement may have any value from 1 through
256.
Additional examples of DS statements
are shown below.
AREA
DS
CL100
FLD1
DS
80C
~
10H
ICL128
I
I
~--~----------~------------------------~
,
INamelOperationlOperand
o
IAREAIDS
defines one field of
1no bytes.
defines 80 fields of
one byte each.
A duplication factor of zero is also
used to assign a name and a length attribute to a st:>rage area without actually
reserving it.
Subseguent DS or DC statements then establish subfields within the
larger area by aSSigning addresses to these
subfields and generating data.
In the example in Figure 13, the name
PAYR is assigned to an area of 50 bytes.
No space is actually reserved at this
point, but subseguent DS statements subdivide and reserve the storage within the
area PAYR.
The symbols PYNO, REGH, etc.,
which are specified in the name fields of
the DS statements, allow reference to subsections of the area PAYR.
The address
PAYR still implies the length of 50 bytes
and refers to the area as a whole.
r----r-
~I-------------------------
INamelOperationlOperand
While the Basic Assembler is processing
a DS statement, it discontinues the punching of the current TXT and RLD cards.
Punching is resumed with a new TXT card for
the location following the reserved area(or
areas}.
Therefore, all DS statements of a
program should be qrouped together to
reduce the number of TXT cards punched.
o
Data fields frequently contain values that
will be loaded into a register in the
course of a program.
These data fields
must be aligned at a halfword boundary.
I
I
J---+-------+
IPAYRIDS
I
IDS
IPYNOIDS
ILNAMIDS
IFNAMIDS
IREGHIDS
IOVTMIDS
I STRTI DS
IOVRTIDS
ISLRYIDS
I
IDS
,
I
~
OCL50
2H
CL6
CL10
CL10
H
H
CL4
CL4
CL~
H
L--l...
Figure 13.
Reservation of Main storage
Definition Instructions
33
o
Basic Assembler control instructions are
used to begin assembly (START), end assembly (END), and set the location counter to
a value at a halfword boundary (ORG).
into columns 73 to 76 of each object progr am car d.
For the purpose of boundary alignment, the start address should be an even
number.
If it is an odd number, the Basic
Assembler program advances the location
counter to the next higher even value above
the specified start address.
]~i~:
START -- START PROGRAM
When a program is loaded, a start address
normally specifies the point where the
first byte of information is to be stored.
Bytes 0 to 155 of main storage lie within
an area that contains information required
for the execution of a program. This
information must not be overwritten.
Therefore, the lowpst usable start address
is 156 (hexadecimal 009C).
nefore a source
program or the Basic Assembler program can
be loaded, a program to execute the loading
functions is required.
such a program (the
Absolute-Program Loader or the RelocatableProgram Loader) is stored from location 156
upward. The Absolute-Program Loader, for
example, requires '60 bytes of main
storage, which increases the possible start
address for the source program to 316
(hexadecimal 013C).
A start address of 156
can be used in this case, provided the subsequent 160 bytes are reserved for the
Absolute-Program Loader by means of an
appro~riate DS or nRG statement.
I
END -- END OF PROGRAM
A program written in Basic Assembler language must be terminated by an END statement, which supplies the branch address
required for program execution after the
program is loaded.
The operand :::>f the END statement contains the address of the point to which
control is t:::> be transferred on completion
of the loading process.
This is normally
the address ~f the first machine instruction in the problem program.
o
r---~---------T--------------------------'
The start address is specified in a
START statement. The operand of the START
statement specifies the tentative loading
point in the form of an absolute address.
The value of the location counter is incremented to represent this address as soon as
the START statement is read by the Basic
Assembler program. If the START statement
is omitted, the location counter is automatically set to 340.
(A START statement
without an operand should not be used and
is flagged with a C.)
START 1000
This statement causes the location counter to be advanced to 1000. Since the
START statement does not consume any
storage space itself, the specified start
address is assigned to the instruction that
follows the START statement. If a symbol
is entered in the name field of a START
statement, it is considered to be the program name and is entered in the symbol
table, together with the start address of
the program. In addition, the Basic Assembler program causes the name to be punched
34
INamelOperationlOperand
1
I
I
I
~
IPBL11START
1340
I
IBGN IBASR
110,0
I
I
I I
I
1
I
I I
I
1
I
I V
I
I
I __ lEND
___________ IBGN
_________________________ - - - - JI
~
~
~
In the ab:::>ve example, the start address
for program execution is BGN. When the END
card is read, the address contained in the
operand of the END statement is loaded into
register 12 by the Absolute-Program Loader,
followed by a branch to the address in
register 12, which initiates program
execution.
If it is desired to load more than one
program for simUltaneous execution, the
Relocatable-Program Loader must be used and
a load terminate (LDT) card must be supplied. In this case, the loader program
disregards the END card. For further
details refer to the SRL publication l]~
~y§!emLl§~od~l_~CaXQ_Progx~~~ing_~gE=
EQ~!~~asi~!ility_Pro~ams~_E~n£1iQn§_anQ
Q£§~atln~R~Q~~Q~~~§, Form C26-3604.
System/360 Model 20 Basic Assembler Language
o
o
ORG -- RESET LOCATION COUNTER
The ORG statement is used to reset the
location counter to any desired value.
The statement ORG *+500 causes the present
value of the location counter to be incremented by 500.
The operand of an ORG statement is invalid if it is not a relocatable expression, if the expression consists
of or includes a symbol that has not been
E£gviously_defingg, or if the name field of
the statement contains an invalid symbol.
A valid symbol in the name field is disregarded by the Basic Assembler program.
Invalid operands are identified by error
messages in the program listing.
The location counter should not be reset to a value
lower than the start address of the program
unless it is to be loaded by the AbsoluteProgram Loader.
The ORG statement can be
used when source and object programs exceed
the available main storage capacity and
must, therefore, be assembled and executed
in separate phases.
o
The program shown in Figure 14 executes
certain scientific-mathematical calculations and stores the results in a 480-byte
table, which is printed out later.
The
calculations are assumed to consist of two
phases, each of which requires 3200 bytes.
This means that (with an available storage
capacity of 4096 bytes) each calculation
rou ti ne must be as~em bled sep ar at ely.
The
resulting object programs are executed one
after the other.
For this reason, the table area where
the results of the calculations are stored,
was reserved at the first available positions of main storage, followed immediately
by the constants and program routines
required for all successive calculation
phases.
This information occupies storage
locations 013C to "340 (the 'addresses are
given in hexadecimal notation to facilitate
reference to Figure 14), and will not be
overwritten when subsequent program phases
for execution of the assembly are loaded.
The statement PPGM MVC X(5) ,Y, which is
stored at position 0344, is the firststatement of the calculation routine.
All
other statements o~ this procedure have
been omitted, excent those that demonstrate
the chaining of the various program
routines.
When the first result has been calculated, i t is loaded into register 10 (statement 034A).
The program then branches to
LOOP (statement 0330).
The following program segment stores the result in the first
position of the table area (a detailed
explanation is given in the section ~~_==
~efilJ~L£onst~nt) , and tests a switch to
determine if the program must go through
the calculation routine again to compute
another result.
If this is the case, the program
branches to PRGM.
Otherwise, the calculation phase has been completed and the program branches to the loader area (statement
033C) to read calculation phase 2 into main
storage.
Calculation phase 2, as a separately
assembled program, also begins with a START
instruction.
H~wever, since the loader
does not use it, register 14 has the same
contents as during the previous assembly.
Therefore, the BASR instruction can be
omitted and the START address becomes 318.
However, the USING instruction is required.
Now the previous program part must be
linked to the subsequent one.
The ORG statement is used to reset the location counter to position 0344.
This is the start
address of the calculation routine phase 1,
which is no longer required and can be
overwritten by phase 2.
Since the operand of the ORG statement
must be relocatable and hexadecimal 0344 is
an absolute address, the location counter
is set to 0 (*-318) and the desired address
0344, which is e gua I to PH2, is added.
The
operand *-318+PH2 thus obtained is relocatable.
The address 0344 can be determined
only from the program listing, after the
assembly of phase 1.
It must then be
inserted int~ a previously prepared statement card.
The location counter setting of 0344
causes the subsequent program (a) to be
10dded, starting at this position, and (b)
to overwrite phase 1.
By following this procedure, any number
of programs can be assembled separately and
then be linked for successive execution.
o
Definition Instructions
35
onc
onc
013E
OnE
0142
0322
0324
0326
0008
0009
OOOA
0328
032C
0330
0334
0338
aBC
0340
U
U
0344
034A
034E
ODC
41FO EIEA
0142
0004
FO
4880
47FO
40AO
4A80
9101
4710
47EO
EIE4
E206
8000
EIE6
EIE8
009C
E206
0204 0000 O(li)O
48AO onoo
47FO ElF2
Figure 14 (Part 1).
TABl
ADTA
FOUR
SWIT
R8
R9
RIO
RTN
lOOP
••
·START
•
•PRGM
•
•
.THIS
•
0348
034C
0344
92FI 0326
48AO 0000
47FO 0330
Figure 14 (Part 2).
36
DEFINE RESULT TABLE
LOAD TABLE ADDRESS
BRING RES INTO TABL
I NeRM TABLE ADDR
TEST FOR PROGRAM END
lOAD PHASE 2
REEXEeUTE PHASE 1
001
002
002
002
002
003
003
003
003
003
003
003
003
003
003
003
003
003
Mve
I
003
X(5I,Y
CA. 3200 BYTES
PROGRAM PHASE REOUIRES
lH
BC
END
R10,RES
15,LOOP
BGN
LOAD RESULT INTO RIO
INITIATE TABLE ENTRY
003
003
005
o
Programmed Routine for Table Look-up and Program Linking
••
PBl2
••
.THIS
•
•
0
CALCULATION PHASE
•
••
•
U
316
14,(l
·,14
15,RTN
120Cl4
Y(TABU
H'4'
el1'O'
8
9
10
R8,ADTA
15,PRGM
R10,0(O,R81
R8,FOUR
SW IT, 1
1,156
14,PRGM
·START CALCULATION PHASE 7.
START 318
USING .,14
EQU
RIO
10
EQU
SWIT
X'0326'
SYMBOL LINKING
EQU
SWIT+10
lOOP
SYMBOL LINK ING
EQU
PH2
X'0344' ADD OPERND AFT ASS3LY PHI
.-318+PH2 JUMP TO FIRST AVAI L LOC
ORG
013E
OBE
ODOA
0326
0330
0344
0344
0344
START
BASR
USING
BC
OS
De
De
DC
EQU
EQU
EQU
LH
BC
5TH
AH
TM
Be
BC
PBli
BGN
ODEO
MVI
SWIT,C'l'
BEGINNING OF CALC PH2
PROGRAM PHASE REQUIRES
lH
BC
END
R10,RES
IS,lOOP
PBl2
002
CA. 3200 BYTES
lOAD RESULT INTO RIO
INITIATE TABLE ENTRY
Programmed Routine for Table Look-up and Program Linking
System/360 Model 20 Basic Assembler Language
001
002
002
002
002
002
002
002
002
003
o
o
Input/output
two ways:
ope~~tions
can be caused in
1.
by means of thp Input/Output
System (laCS), or
2.
by w~iting I/O ~outines using the Basic
Assembler I/O inst~uctions.
The use of laCS
Cont~ol
the writing of
as explained in a subsequent section. ~he second mathod, the
writing of individual I/O ~outines, is
explained in the following parag~aphs.
mac~o
dllow~
inst~uctions,
Depending on the specification in the UF
field of the XIO instruction, the second
symbol designates the amount of data to be
handled du~ing the I/O ope~ation; i.e., the
number of ca~d columns to be read or
punched, or the number of characte~s to be
printed. Samples of XIO instructions are
shown in Figure 15.
If the XIO statement refers to a
card unit, the value in the second operand
must not exceed 80.
If it refers to a
p~inte~, the maximum value is 144 for a
2 2 0.1 P r i n t e ~ ; 1 3 2 for a 1 40 3 Mo del 2 0 r N1 ;
and 120 for a 1403 Model 7.
~Q1g:
Three types of T/O inst~uctions a~e
available in the Basic Assembler language:
INotelName
1•
XIO instructions (execute input and
output) .
2.
CIa instructions (control input and
output) •
3.
TIOB instructions (test input and outrut and b~anch' •
T---------------------,
Ope~ationlOperand
I
I
1
ICARD EQU
180
I
I
ILINE EQU
I 100
I
I
IFLDA(X'40') ,LINE
lOUT XIO
11.
I
I OUTB (X' 40' ) ,20
lOUT XIO
12.
I
IOUTA(X'36') ,CARD
IPNCH XIO
13.
I
IINPT XIO
I IN 1 (X' 23') ,16
I 4.
I
IINPT XIO
I EXAR
(X' 24') ,CARD
15.___L_---L-________
____________________ JI
t--+
~
o
~
The XIO statement has an SS format, and
CIa and TIOB statements have 51 formats, as
explained in the spction ~achi!!.~.-lns1.£uc=
Figu~e
liQ.!l_IQI!!l~1~·
1.
Prints 100 characters on the attached
1403 or 2203 printer.
2.
Prints 20 characte~s on the attached
1403 or 2203 printer.
3.
Punches 80 columns on the attached 1442
Card Punch, Model 5.
All three instructions include the unit
and function (UF) specification field.
Data in this field must be specified in
hexadecimal notation.
XIO -- EXECUTE INpnT/OUTPUT
4.
15.
Sample of XIO Instructions
Reads the first 16 columns of a card
the se CDnda~y hopper of the
attached 2560 MFCM.
f~om
The operand entry of an XIO instruction is
w~itten
5.
Dl (UF,El) ,D2(B2)
o~
Punches 80 columns of a card from the
primary hopper of the attached 2560
MFCM or 2520.
when using symbolic addressing,
CIa -- CONTROL INPUT/OUTPUT
Symbol 1 (UF), Sym bol 2.
U designates the Qnit used as the I/O
device and F designates the assigned function, i.e., the oppration to be executed.
o
For example, a 2501 reader is attached
and X'12' is specif"ied in the UF field of
the XIO instruction. The hexadecimal digit
1 tells the Basic ~ssembler program that
the 2501 is used and the hexadecimal digit
2 indicates that the unit must read a card.
A complete list of all UF codes is provided
in Appendix C.
CIa instructions are used to control the
operation of attached I/O devices.
With
card I/O devices, the CIa instruction is
used for stacker or print-head selection;
with a printe~, the CIa instruction is used
to cause spacing or Skipping.
The instruction is written in the following format:
D 1 (B 1) ,
C 10
UF
or
CIa
51, UF (S=sy mbol)
Input/Output Instructions
37
the primary hopper and stacker 5 for cards
from the secondary hopper.
Therefore, CIa
statements that assign these functions are
not required.
For stacker selection of card I/O devices,
the unit specifications in the UF field is
always a 2.
The function specification can
be a 0, 1, or 2, depending on the attached
I/O device and the function desired.
The
stacker is specified by the first operand
of the CIa statement.
A summary of I/O
instructions, including the associated unit
and function speci~ication codes, is given
in Appendix C.
1•
2.
3.
1.
2.
3.
In addition, if 6, 7, 14, or 15 is specified in the first operand of a CIa
instruction that refers to a 2560 MFCM, the
selected cards are ejected into stacker 1.
I
In the pr~gramming sequence, the CIa
statement for a 2560 MFCM should follow a
read instruction, if possible.
In addition, it must precede the next read, punch,
or punch-and-feed instruction for the same
hopper.
For punch-card stacker selection,
the relevant CIa instruction must be placed
before the next read, punch, or punch-feed
instruction, regardless of the referenced
hopper.
CIO 4, X' 21 '
CIa 3,X' 22'
CIa 2, X'20'
It is assumed that a preceding read
instruction caused the feeding of a
card from the secondary hopper of the
attached MFCM.
The sample statement
causes this card to be ejected into
stacker 4.
The punch-card stacker select function
(X'22') is specified for stacker assignment, if the respective card is in the
punch unit or in the pre-print station of
the MFCl'!.
The card presently in the punch or preprint station of the attached MFCM is
ejected into stacker 3.
For a 2520, the CIa statement is
required only to assign stacker 2.
In the
programming sequence, this statement should
precede the read, punch, or punch-and-feed
instruction.
If the attache~ unit is a 2520 and a
preceding read or punch instruction
caused the feeding of a card, this card
is ejected into stacker 2.
If the
attached unit is a 2560 MFCM and a preceding read instcuction caused the
feeding of a card from the primary
hopper, this card is ejected into
stacker 2.
_-'·,
0
,
?
Print heads are selected by using bits 26
to 31 of the machine-instruction format as
a mask.
The mask is specified as a decimal
integer in the first operand of the pertinent CIa statement and sets the bits
assigned to the individual print heads to
one.
This is illustrated, in Figure 16 •
If the I/O uni t is a 2560 MFCr. and
stacker selection is not specified, stacker
1 is automatically selected for cards from
,
.-r----,
Number of print
h~ad:
I 2 I
3
Assigned bit numbf>rs:
26
27
Decimal equivalent of
the binary bi t positions:
0
!
1
!
!
1
!
L-----.J
L-----.J
I
I
I
I
24
I
I
V
5
6
30
31
0
0
21
20
r--,
0
V
25
29
28
r----,
f!~d~.!..
r---,
I 4 I
L-__ J
L-_J
V
23
22
I
I
V
Decimal e(]ui valent of
r---,
I the mask:
16
+
4
I
IL _20
__ J
LI _ _ _ _ _ _ _ _ _ _ _ _
___________________________________________
~
Figur-e 16.
o
Sample of a Mask for Print-Head Selection
~
o
o
In the above ex~mple, print heads 2 and
4 are selected bec~use the bits assigned to
these are set to 1 by the ma~k. The decimal equivalent of the mask is specified in
the first operand of the CIa statement as
follows:
CIa 20,X'2.3'
The operand X'23' refers to ·a card I/O
device and specifies the print-head-select
function.
The highest decimal number that can be
used as a mask for print head selection is
63, which activates all available print
heads. The mask can also be expressed in
hexadecimal notation or in the format
D1(B1).
l~~_~Y~ig~Ll~Q_~~Qgl_~QL_~l~_~~gngiif
~h~£9.fig£_Rg~Qg£, For· m A 2 4-1499.
A CIa statement that refers to the Model 20
Communications Adapter or the Binary Synchronous Communications Adapter must contain
the unit address hexadecimal 5.
For the
appropriate function srecification, refer
to Append ix C.
The first operand, D1 (B1), of a CIa statement that refers to one of the communications adapters is ignored.
However, it
must be contained in the statement, and
must resemble a valid address.
TIOB -- TEST INPUT/OUTPUT AND BRANCH
A CIa statement that refers to a printer
must contain the unit address (U) hexadecimal 4.
If a spacing function is requested,
the first operand ~pecifies the number of
space to be performed.
This can be expressed in decimal or hexadecimal form, or
as D1 (B1).
The maximum number of spaces
allowed is 3.
o
The appropriate function codes are shown
in the summary of I/O instructions in
Appendix C.
TIOB statements are used to test the operation al co ndit ions of the a ttached I/O
devices or the proper execution of an I/O
function; e.g., print error, last card,
feed error, device busy.
If a busy condition exists, a branch is
performed to the address specified in the
first operand of the pertinent statement.
Otherwise, the subse1uent program statement
is processed.
The operands of a TIOB statement are
written in the following form:
D1(B1),UF
CIa 2,X'4C'
or
This statement causes the immediate
spacing of 2 lines on both carriages of an
attached 2203 Printer.
S 1 , UF
If a skipping function is requested, the
first operand specifies the channel number
of the carriage control tape that identifies the line at which the skipping is
te rmina ted.
1.
2.
3.
o
All CIa statements that refer to the serial
I/O channel must contain the unit address
hexadecimal 6.
For the appropriate function specification refer to Appenaix C.
The use of the first oper and D1 (B 1) is
described in the following SRL publication:
AREA,X'24'
*,X'40'
HALT,X'33'
1.
This instruction causes a branch to
position AREA after the last card has
been read on the attached I/O device
wi th the device addr ess 2.
2.
This statement causes the program to
loop until the attached printer has
completed the current print cycle.
3.
This instruction causes a branch to the
procedure named HALT if a punch error
has occurred on the attached 1442 Card
Pun ch.
CIa 6,X'45'
This statement causes the skipping of a
page on the attached 1403 Printer, up to
the line identifie~ by a punch in channel 6
of the carriage control tape.
TIOB
TIOB
TIOB
A summary of the Basic Assembler I/O
instructions, t~gether with the associated
function specification codes, is provided
in Appendix c.
Input/Output Instructions
39
SEQUENCE OF I/O
o
IN~TRUCTIONS
The proper sequence of the input-output instructions for different cases is shown in the
following examples:
CARRIAGE CONTROL:
TIOB
TIOB
CIa
CIa
*,X'46'
*,X'40'
1,X'45'
3,X'44'
PRINTER CONTROL:
TIOB
TIOB
XIO
BC
BC
TEST CARRIAGE BUSY
*,X'46'
TEST PRINTER BUSY
*,X'40'
PR T (X' 41 ' ) , 120 (0) PRINT AND SPACE SUPPRESS
BRANCH IF PRINTER WORKING
4,*-6
1,HLT
BRANCH IF PRINTER NOT OPERATIVE
CARD READER CONTROL:
TIOB
XIO
BC
BC
TIOB
TIOB
*,X'20'
CR D (X' 22') , 80 ( O)
4, *-6
1,HLT
END,X'24'
HLT,X'25'
TEST READER BUSY
READ THE CARD
BRANCH IF READZR WORKING
BRANCH IF READER NOT OPERATIVE
BRANCH IF LAST CARD
BRANCH IF FEED ERROR
PUNCH CONTROL:
TIOB
C 10
XIO
BC
TIOB
TIOB
TIOB
*,X'20'
2,X'22'
PC H(X ' 25 ') , 80 ( O)
5,HLT
HLT,X'21'
END,X'24'
HLT,X'25'
TEST READER/PUNCH BUSY
SELECT STACKER TWO
PUNCH SECONDARY CARD
BRANCH IF PUNCH NOT OPERAT IVE
TEST READER/PUNCH ERROR
TEST LAST CARD
TEST FEED ERROR
OR
A major part of most programs written in
Basic Assembler language consists of the
routines required to read data into the
system and to produce the output of the
TEST CARRIAGE BUSY
TEST PRINTER BUSY
SKIP TO CHANNEL ONE IMMEDIATELY
SPACE THREE TIMES IMMEDIATELY
I
0
"
processing perf3rmed on the input data.
IBM provides the user of the Model 20 Basic
Assembler language with a library of tested
I/O routines, which is part of the IBM
System/360 Model 20 Card Programming Support, Input/Output Control System (CPS
IOeS) .
o
o
r
1
1
t--------_+_--------------------~
IGET
1
I
IMakes the next record avail- 1
lable in the area specified bYI
Ithe user.
I
r------.---.-._t_
-i
1PUT
IMakes a record (in an area
I
IS{Jecified by the user) avail-I
I
I
lable ~or an I/O operation.
I
1
I10pens the file, i.e., ensuresl~
Ithat all information necesI
Isary to handle a file has
I
Ibeen provided.
I
•
I
•10PEN
I
I
·1 CLOSE
I
I
I
•ICRDPR
I
I
I
o
~----------------------------,
IMacro
1
IInstructionlFunction
I
I
I
_+_
I Moves the information to be -II
Iprinted on a card from the
I
Iwork area into the specified I
Iprint area.
Used only in
1
Iconnection with a 2560 MFCM. I
~
ICNTRL
I
1
1
1
I
I
I
ICauses the performance of
Icertain I/O functions, e.g.,
Iskipping, spacing, stacker
Iselection.
t---------_+_
1
~
IStarts processing of files inl
Inon-overlap mode.
I
1IStarts processing of files inl~
I
loverlap mode, in case of a
I
I
Iprecening LOM macro
I
I i i nstruction.
I
•IEOM
~I
•IPRTOV
1
IIChecks for printer overflow
I cond i tions.
•IWAITC
1
1
1
1
IICauses the problem program tol~
Iwait for the completion of
1
lall pending card I/O operaI
Itions before processing the
I
Inext sequential instruction. I
1
L-
Figure 17.
Summary of IOCS Macro
Instructions
In the source program, the IOCS routines
are called by statements referred to as
macro instructions. The use of IOCS macro
instructions saves programming time because
it relieves the user of coding, testing,
and providing linkages to his own I/O routines. In addition, the IOCS routines take
advantage of the time-sharing capability of
the Model 20, thereby optimizing
throughput.
o
Additional macro instructions, and the
associated I/O routines, are available to
users of the Communications Adapter and the
1419 Magnetic Character Reader.
For
detailed information refer to the following
SRL publications:
~I
I Closes the file, i. e.,
lensures proper handling of
Ithe file after all records
I ha ve hee n processed.
1
~-------+-
ILOM
Figure 17 contains a summary of the IOCS
macro instructions and their functions.
For detailed information on the Model 20
IOCS, refer to the SRL publication IBM
lrrE~lLOui£~l_f~lll£~l_System_for_ihg
~in~£Y_~ll£h~~no~~_f~mmuni£~iion§_&Q~E1~
~£,
Form C33-4001;
lrrEQt-Oul~~l_font£~1_System
for_lhg-1 BM
Form
j~1_~~~li£_fh~ra£1~£_Rea~~£,
C26-3607.
A user program which enables the interrupt
mode with an SPSW statement that changes
the channel mask bit of the current program
status word from 1 to 0 must ensure that
the pending interrupts caused by the loader
do not interfere with the execution of the
object program.
Both the Absolute-Program Loader and the
Relocatable-Program Loader cause two pending interrupts.
Interrupt 1 is caused when
the program is read on a 2501, 2520, or
2560; interrupts 1 and 2 are caused when
the program is read on a 2520 or a 2560.
llli~£ru~l-1:
Associated with the l~st_£eag
instru£ti~rr of the loader, interrupt 1 is
pending when the execution of the object
program begins. This interrupt becomes
effective after the first SPSW instruction
in the user program has been processed.
The program in this case branches to the
programmed interrupt routine, although the
condition on which the interrupt routine is
based has not occurred.
An example of the programming sequence
that enables thf interrupt mode through an
SPSW statement js shown in Figure 18. For
this purpose, the first two TIOB statements
in the figure may be disregarded.
lni~~ruE!-1:
This interrupt is issued at
the end of program loading.
After the END
card of the object program has been read,
an XIO instruction in the loader program
causes a dummY_~Qrrfh_fY~l~ that moves the
Input/Output Instructions
41
END card from the pre-punch station to the
punch unit of the punching device, prior to
execution of the object program.
The dummy
cycle is effected by specifying X'40'
(blank) to be punched into column 1, which
results in nothing being punched.
loader area is overwritten before execution
of the dummy punch instruction has been
completed, a character other than blank may
be punched into column 1 of the END card,
which makes the END card invalid.
Interrupt 2 also occurs after the first
SPSW instruction in the user program after
the dummy punch instruction has been
executed.
Mispunching of the END card can be
avoided by using a TIOB instruction as the
first statement in the user's program, as
shown in Figure 18.
The XIO dummy instruction may cause a
mispunching of the END card during the initial phase of the object program.
While
the XIO instruction is being executed, the
loader transfers control to the object program and, thereby, initiates processing.
If the I/O device used for loading is a
2560 MFCM or a 252~ card read-punch and the
The mispunching of the END card can also
be avoided if the loader area is not overwritten during the initial processing
phase.
(The initial processing phase is
terminated after execution of the first XIO
statement in the user program that refers
to the 2560 that is used for program
loading) •
o
I
,
r----,--·~1--------------~--------------------------IName OperationlOperand
1
~
I
---------------~
WAIT, when loading from a 2520
IBEG TIOB
1*,X'22'
WAIT, when loading from a 2560
1
TIOB
1*,X'20'
GET AUXILIARY NEW PSW
IMVNP MVC
1148 (4) ,AXPW
ENABLE INTERRUPT MODE
1
SPSW
J AX?W
THIS PSW BRANCHES TO
IAXPW DC
IX'0100'
MAIN PROGRAM
1
DC
1Y (SNPS)
defining the address of
ISNPS MVC
1148 (4) ,SYMB
user's PSW.
1
r->
1
1
1
L ____
~MAIN
__
1
~
Figure 18.
I
PROGRAM
()
Sample Routine for compensation of Pending Interrupts Caused by the Loader
o
42
Sy~tem/360
Modpl .20 Basic Assembler Language
o
This section describes the coding of the
machine instructions written in Basic
Assembler language and translated into
machine language.
The machine-language
format and the functions of each machine
instruction are described and the use of
each instruction is illustrated by an
ex ample.
A machine instruction is a direction
given to the computer to cause the execution of a certain operation.
In Basic
Assembler language, these instructions are
written in the form of mnemonic codes,
which are translated by the Basic Assembler
program into System/360 internal or machine
code, respectively.
The codes are printed
in the leftmost part of the program listing, next to the location counter
reference.
Machine instructions are divided into
four groups, according to basic operand
format:
o
1.
RR instructions (register to register),
length:
2 bytes.
2.
RX instructions (register to storage or
storage to register), length:
4 bytes.
3.
51 instruction~ (storage length:
4 bytes.
4.
55 instructions (storage to storage) ,
length:
6 bytes.
immediate),
A summary of th~se formats, together
with their associated operation codes, is
shown in Figure 19.
branch address in operand(s)
sta temen t (s) •
1.
R1 and R2 are absolute expressions
that specify general registers.
The
general register numbers are 8 through
15.
2.
D1 and D2 are absolute expressions
that specify displacements.
A value
of 0 through 4095 may be specified.
3.
B 1 and B2 are absol ute exp ressions
that specify base registers.
Register
numbers are 0-3 and 8-15.
4.
M1 is an absolute expression representing a condition code.
5.
L, L1, and L2 are absolute expressions
that specify field lengths.
An L
expr essio n can sp eci fy a v alu e of 1 256. L1 and L2 expressions can speci~
fy a value of 1 - 16.
In all cases,
the assembled value will be one less
than the specified value.
6.
12 is an absolute expression that provides immediate data.
The value of
the expression may be 0 - 255.
7.
51 and S2 are absolute or relocatable
expressions that specify an address.
8.
5I instruction fields that are crossed
out in the machine formats are not
examined during instruction execution.
The fields are not written in the symbolic operand, but are assembled as
binary zer:>s.
9.
UF is an absolute expression representing an input/output unit address
and a function.
All machine-instruction statements are
automatically aligned at halfword boundaries. All bytes skipped are filled with
hexadecimal zeros.
Any machine instruction can be identified by a symbOl, which can be used as a
of other
o
Machine-Instruction statements
43
r--T
I
I
•
I
I
I !2~§i£_1:1~s::hi!!.g2Q.!:!!!.~i
I Assembler: Ope r: and
I Pi eIQ_Por: m~i
T---------------------------,
I App I i ca ble
Ill! st.f~~.!iQll§
I
I
8
14 14 I
I
IOper:ationl
I
I
IR1,R2
I
I
I
Code
IR11R21
I (See note 1)
IRRl---------t-+--+
I
I
I
8
14 14 I
I
I
I Oper:a tion I
I
I
I Ml ,R2
I
I
Code
I M11 R21
I
I
I
I
I
1
I (See notes
and 4)
r--+---------t--+--+--.--.---+__
I
I
8
1414141121
I
IOper:ationl
I
I
I
I
IR1,D2(0,B2)
I
I
I
Code
IR11X21B21D21
IR1,S2
I
I
I
I
I
I
I
I (See notes 1,2,3,and 7)
I R X l--------t-+--+--+_+_
I
I
I
8
1414141121
I
I
IOper:ationl
I
I
I
I
IMl ,D2 (0,B2)
I
I
Code
IM11X21B21D21
IM1,S2
I
I
I
I
I
I
I
I (See notes 2,3,4,and 7)
I
I
ISTH,LP.,CH,AH,SH, BAS
I
I
I
I
I
+-- ~-------- ---------~
I
I
IBC
I
I
I
I
I
l--+--------t~_+_+__t--_+__
t--~--------------------~
I
8
18
141121
I
IOper:ationl
I
I
I
ID1(Bl),I2
I
Code
112
IB11Dli
IS1,I2
I
I
I
I
I
I (See notes 2,3,6,and 7)
SIl---------t-----t--+__t
I
I
8
18
141121
I
IOper:ationl
I
I
I
ID1(Bl)
I
Code
1-IB11D11
ISl
I
I
I
I
I
I (See notes 2,3,7,ana 8)
l---------t----+--+__t--_+__
I
8
18
141121
I
IOper:ationl
J
I
1
1 Dl (Bl) ,UF
I
Code
IUF
IB11Dli
IS1,UF
I
1
1
I
1
1 (See notes 2,3,and 7-9)
l--+---------t
I
I
+__+
I
I
I
8
141414112141121
IOper:ationl
I
I
I
I
1
ID1 (Ll ,Bl) ,D2 (L2,B2)
I
Cod e l L 1 I L 2 I B 1 I D 1 I B2 I D2 I S 1 (L 1) , S 2 ( L 2)
I
1
I
I
I
I
I
I (See notes 2,3,S,and 7)
S S f---------t~+-I
I
1
I
I
8
18
1411214112
IOper:ationl
I
I
I
I
D1 (L,B1) ,D2 (B2)
I
Code
IL
IB11D11B21D2 S1(L) ,S2
I
I
I
1
I
I
(See notes 2,3,S,and 7)
l--------t
I
I
I
I
I
8
18
14 I 12 I 4 I 12
IOper:ationl
1
I
1
1
Dl(UF,B1),D2(B2)
I
Code
!UF
!Bl!Dl!B2!D2 Sl(UF):,S2
1
I
I
1
1
1
(See notes 2,3,7,and 9)
I
ICLI,MVI,NI,OI,TM,HPR
I
I
L-_..L- ______ --J...
Fig ure
19.
I
I
~
I
o
1
~~--T---------+-----------------_'_t_
I
IAR
I
I
I
~ASR,SR
I
I
I
+-------------~------------~
I
IBCR
I
I
I
I
I
I
I
t-------~------------~---~
I
I
I
1
t------------------------~
I
ISPSW
I
I
I
1
I
I
+------~------------------1
I
ITIOB
ICIO (Dl (Bl) detailed
1
specification)'
1
1
I
1
o
+-----------------------'--~
I
IPACK,UNPK,MVO,AP,
I C P , DP , MP , S P , ZA P
1
I
I
1
I
+------------------------~
I
ICLC,MVC,MVN,
IMVZ,TR,ED
I
I
I
I
I
+----------------------~
I
IXIO
!
(D2(B2) detailed
specification)
I
I
.L.-_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ J
Machi ne Instru ction For:mats
o
44
System/360
Mod~l
20 Basic Assembler: Language
o
the C2 1 eng t h cod e ( 2) is con ta i ne din the
L2 field in the assembled instr-uction.
(Each assembled leng~h code is one less
than the length of the statement in Basic
Assembler- language because the length code
1 is assembled as 0, thus per-mitting a
length of 16 within the 4-bit L1 and L2
fields.)
Theoper-and addr-esses ar-e split
in a base register- and a displacement,
which are contained in lhe Band D-fields
re$pectively (see the section ~iQ~~gg
! dd!:es.§~.§) •
The mnemonic oper-ation codes (shown in
Ap pen d i x Ban d Fig u r- e 19) a r- e des i 9 ned to
be easily-remember-ed codes that indicate
the functions of the instr-uctions. The
nor-mal for-mat of the code is shown below;
the items in br-ackets ar-e not necessar-ily
pr-esent in all codps:
Ver-b [Modifier-] [Data Type] [Machine
For-mat]
The ver-b, which is usually Dne or- two
char-acter-s, specifies the function.
Forexample, A r-epresents Add, and MV r-epr-esents Move. The function may be fur-the~
defined by a modifier- and the data type.
For example, the modifier L indicates a
logical function and the C indicates a
character- as data type, as in CLC for Compar-e Logical Character-.
RR FORMAT
This is the shor-test of the four instr-uction formats and r-equires the least pr-ocessing time. It is used to specifyregister-to-r-egister operation; i.e., data is transferr-ed fr-om one register- to another-.
In
Basic Assembler language, such a statement
is wr-itten as
The letters R and I ar-e added to the
codes to indicate, respectively, RR and SI
machine instruction for-mats. Thus, AR
indica tes Add in the RR form at.
Funct ions
involving character and decimal data types
imply the SS format.
Op-Code
or
Op - Co d e
AR 9,10
o
A distinction must be made between the
instruction format in Basic Assembler language and the instruction for-mat in machine
language, as translated by the Basic AssembIer- program.
r---
--~i-l--------------------------'
I Instruction in
IBasic
I Assembler
ILanguage
11
"
I,Instruction in
I,Machine Language
I
I
I
I
~-~------------t4--T--T--~--r---~ -.----~
I Op I
I Cd lOp e r- and s
I- I
IDPIWORK(9) ,C2(2)
I
I
I 1 Op I
I I
I
I
I
I
I 1Cd I~ L 1 , L2 I B 1 I D1 , B 21 D21
++ I I I I I -+--~
I,FDI 81 11 DIODCI
DIOEFI
I
I
"
I
I I I
I
In the above example, the DP instruction
causes the dividend that is contained in
the field WORK, with an explicit length of
9 bytes, to be divided by the divisor, contained in the field C2, with an explicit
length of 2 bytes.
o
Assuming register 13 has been assigned
as base register by an approFr-iate USING
statement, the Basic Assembler program
translates this instruction into the format
FD81 DODC DOEF, as shown. The mnemonic
operation code becomes FD; the WORK length
code (9) is contained in the L 1 field; and
R1, R2
(R=r-egister)
M1 , R 2
( M= mas k )
The contents of register- 10 are
added to the contents of register
9.
The oper-and for-mat r-:.1,R2 is used together with the Br-anch-on-Condition-Register
(BCR) operation code.
It is applied if the'
program reaches a decision point where,
under a certain condition, a branch must be
performed. In this case, the branch
address is contained in the register- srecified (R2)
BCR 8,15
The binary e:juivalent of 8 (1000) is used
as a mask to test the condition code in the
Program Status Word. The branch is
executed if the condition code is 00.
(Refer to the section !hg_~~nditio~~QQg)
RX FORMAT
This format is used to cause data flow
between a register and main storage. The
direction of the flow is determined by the
operation code. The Store Halfword (STH)
instruction transfers data from a register
to storage; the AH instruction causes
information in main st6rage to be added to
the contents of a register.
The address
specified in the second operand of an RX
instruction can be in explicit or implied
form.
Machine-Instruction statements
45
In Basic Assembler language, the
is written as:
ins~ruction
Op-Code
R1,D2(X2#B2)
when using explicit
addressing,
R1,S2
when using implied
addressing.
(S = sym boll
formed, whatever the condition code setting
is. Such a branch is called unconditional.
Masks can also be specified in-hexadecimal
notation.
Figure 20 contains examples of
branches testing the condition code.
0
or
Exam.12les:
Op-Code
i
When specifying an explicit address, the
X2 sub-field of the operand D2 (X2, B2) must
be set to O.
STH
'---I
9,AREA+4 (0, 12)
The contents of register 9 are stored at
the location (AREA+4) + (contents of register
12). However, this statement is valid only
if AREA is defined as an absolute symbol
with an address value not exceeding 4095.
M1 , D2 (0, B 2)
when u;;,; i n g ex pI i cit
addr essin g,
i!!..£lEJ1~ t
M1,S2
when using implied
addressing.
The field M1 is used as a mask to test
the condition code. The subsequent section
describes how this mask is .set up.
The condition code in the Program Status
Word occupies 2 bits.
Therefore, it can be
used to represent ~our conditions: 00, 01,
10, or 11.
3.
Variable-length arithmetic instructions
also set the condition code to reflect
the status of the result (see paragraph
1). The subsequent branch instruction
is unconditional, i.e., the program
branches under any condition to the
location repr~sented by TABL+(contents
of register 8).
o
4
2
1
Thus, the maximum value of a mask is
spe~ifying a branch on condition 15 means that the branch must be per-
46
ion:
The eLI instruction causes the value
stored at the location FLDA to be compared with the hexadecimal selfdefining term DO. The branch is performed if the contents of FLDA are
greater than D9.· Otherwise,· the next
sequential instruction in the program
is processed.
8
This meuns, for example, that a branch
inst~uction to be pe~formed on condition 8
is executed if the condition code setting'
is 00.
Accordingly,· a· br:anch can be
requested in a proqr~m if the condition
code setting is either 01 or 11. The
corresponding mask, in this case, would be
4+1:5.
.
8+4~2+1=15.
Branches Testing the Condition
Code
2.
The corresponding masks reflecting these
are:
I
----.J
Fixed-point arithmetic instructions,
like the ab~ve SR instruction, set the
condition c~de to reflect the status of
the result whether or not the result is
equal to, less than, or greater than O.
The branch to the location OUT is
executed if the result of the preceding
mathematical operation is o. Otherwise, the next sequential instruction
in the program is processed.
s~ttings
00
01
10
11
--,
1.
or
Op-Code
I
J
Figure 20.
Branch instructions in the RX format
(operation code BC) are written as:
o p- Cod e
i
INamelOperation Code lOpe rand
I
I
I
I
-i
ICALCISR
\ 9,10
I
18,OUT
IBC
I
I
ICMPRICLI
I FLDA ,X' DO'
I
12,BGN
IBC
\
I
I
I FLDA (1 0) , FLDB (5) I
I 3. ISUM lAP
I 15 , TAB L (0,8)
I
I
I
,IBC
I
I
I 1.
I
\2.
Thus~ the interpretation of the condition code setting depends on the type of
operation caused by the preceding instruction.
A summary of the relation of the
situation to the condition code setting is
given in Appendix E.
The index field X2 of the instruction formatOp - Co de R1 , D2 (X 2 , B2) mus t a l way s be set
to O. The base register B2 in an RX
in~truction, however, can be used as index
reqister, if (1) explicit addressing is
Systpm/J60 Modpl 20 Basic Assembler Language
o
o
applied and
a Lsolu teo
NULL represents the value of 0 to avoid
altering the address of TABL, assigned by
the Basic Assembler program, when TABL is
being defined.
In addition, to make *-NULL
an absolute expression, NULL must represent
a I~lo£~!~~lg O. This can be done as
follows:
(2) the D2 displacement is
In Figur~ 14, the method of indexing
with address constants has been demonstrated by a table look-up procedure. The
table address was loaded into a register
and successively undated, thus pointing to
the subsequent table positions. The same
effect is achieved when TABL is used as
displacement D2 in an RX instruction and
register R8 is used as B2 to increment
TABL.
NULL
o
TABL
EQU
340
*-340
Here, the expression in the operand of
the EQU statement becomes relocatable
because it contains an odd number of relocatable expressions.
For example, thp table area of 480 bytes
is set up in storage with the address TABL,
as in· Figure 14. l:'ach entry in this area
is also considered to have an implied
length of four bytes.
It is assumed that
this table will be filled with successive
entries of results computed during
processing.
To use TABL as a displacement in an RX
instruction, it must be made absolute to
retain the relocat~bility of the program.
TABL must be eguatpd with an ER~olut~
expression that re~erences the location
counter.
ST ART
EQU
Adopting the above procedures, the program routine could be as shown in Figure
21.
SI FORMAT
This format is used to load immediate data
that are specified in the instruction into
storage.
In Basic Assembler language, such
instructions are written as:
Op-Code
D1(B1),I2
in case of explicit
addressing, and
Op-Code
S1,I2
in case of implied
addressing.
*-NULL
._----_.,
r----T-------,
INamelOperationlOperand
jI
I
PBL1 START
34 n
NULL EQU
*-140
BGN BASR
14,0
USING
*,'4
SR
8, R
PRG M MVC
X (Cj) , y
I
I
IComments
I
I
,
I
10=RELOCATABLE
ILOAD BASE REGISTER
IASSIGN BASE REGISTER
IINITIALIZE INDEX REGISTER
ISTART COMPUTATION
I
I
V
o
STH
AH
CH
BC
lED
I I
I I
I V
TABLI EQU
IDS
PRTAIDS
X
IDS
Y
I DC
INCRIDC
LIMTI DC
lEND
Figure 21.
10 , T ABL ( 0 , 8) RESULT INTO TABLE
8,INCR
INCREMENT INDEX REGISTER
8,LIr-!T
TEST FOR TABLE END
4,PRGM
COMPUTE ANOTHER RESULT
PRTA, MASK
INITIATE PRINTOUT
TABL=ABSOLUTE
DEFINE TABLE AREA
DEFINE PRINT AREA
10Q
DEFINE AREA X
DEFINE AREA Y
H'00000175'
DEFINE INCREMENT VALUE
H' 4'
IDEFINE TABLE LIMIT
H'480'
PBL1
I
*-~TULL
120CL 4
120CL4
Sample Program Using TABL as Displacement
Machine-Instruction Statements
47
The field 12 represents the immediate
data, which can be any single self-defining
term with a maximum length of 8 bits.
CLI
TM
MVI
JACK, C' 6'
MIND,X'40'
PARA,X'AF'
D 1 (B 1) , UF
or
In Basic Assembler language, this
instruction is written as follows:
r
D 1 (B 1 )
i
0
r S1
I
i
,
I
1----+-------+
~
I
ISPSW
INPSWIDC
I
IDC
INP~W
IX'n100'
IY(PEGN)
L-.L
SS FORMAT
This format is used to cause da ta flow from
one area of storage to another.
It
requires specification of the field lengths
for the data to be acted upon.
with one exception, which is explained
later, the SS instructions form two major
groups.
The first group includes instructions that require specification of length
codes for both operands.
The second group
reluires a length specification for the
first operand only.
o
I n Basic Ass emble r la nguage, the fi rs t
group of instructions is written as
follows.
INamelOperationlOpprand
Op-Code
D1(L1,B1) ,D2(L2,B2)
when explicit
a ddressi ng is
used, or
Op-Code
S1(L1),S2(L2)
when implied
addressing is
used.
I
I
I
J
In this example, the new PSW contained
in the field NPSW is transferred to the
internal location of the current PSW.
The
constant X'0100' replaces the leftmost 16
bits and the address constant replaces the
rightmost 16 bits of the 4-byte PSW.
Then
the program branchps to the address specified by bit positions 16 to 31 of the new
PSW storage position BEGN.
The termination of object program execution is achieved by a Halt-and-Proceeo
(lIFR) instruction.
This instruction also
belongs to the SI-type formats and is written as shown in the following example:
4A
o
S 1 , UF
The Set Program Status Word (SPSW)
instruction causes the current program status word to be replaced by a new PSW stored
at the position referenced in the operand
of the SPSW instruction.
Since the current
PSW contains the address of the next
sequential instruction to be processed, the
SPSW instruction is equal to a branch
instruction.
o p- Cod e
The operation code APR is translated
into the machine code 99 which is displayed
in the UL xegister panels of the cpu.
This
code also appears in the UL.register panels
in case of a pr~grammed halt during execution of an assembly.
The second operand of the HPR instruction is ignored and, though assembled, has
no influence on the program.
Normally,
zero is specified as the second operand of
the HPR instruction.
It can be omitted,
however, if the comma is written to satisfy
syntax requirements.
Accordingly, these instructions are
written as follows:
Op-Code
X' 999' ,0
TO indicate that the program has reached
the HPR instruction (completion of object
program execution), the add ress X' 999' specified in the first operand of this
instruction is displayed in the STR register panels of the cpu.
Some of the input/output instructions
the programmer uses to write his own I/O
routines are also in the SI format.
The
field 12 in this case is designated UF and
is used to specify the I/O unit and its
function.
o p- Cod e
HPR
L1 and L2 in the above format designate
the length fields.
The operation codes
belonging to this group are summarized in
Figure 19.
PACK
MVO
AREA (9) ,INPT+5 (9)
400 (10,8) , RES 1 (1:J)
The length c~de of an expression can be
omitted if the length of a field is implied
in its name.
System/360 Moopl 20 Basic Assembler Ldnguage
o
o
r
~--------------------------,
i
INamelOperationlOperand
I
...----+---------+--------------~
I
ICP
IFLDA,FLDD
I
IFLDAIDC
IC'OOOO'
I
IFLDBIDC
IXLtl'O'
I
L_---L _______ - L
________________________ J
Field A and B each have the implied
length of four bytps. An explicit length
specification, therefore, is redundant.
If
a symbol with an implied field length is
dccompdnied by an pxplicit length code, the
implied length is ~isregarded.
The eXFression 5 in the first operand is
evaluated as a length code and the expression 8 in the second operand is considered
to be a base register, even though the two
operands appear to specify the same items •
The Execute Input/Output
tion is written as follows.
Op-Code
Dl(UF,Bl),D2(B2)
wh9n using exp lici t addressing, or
Op-Code
S 1 (U F) , S 2
when using i mplied addressing.
XIO
-,
INamelOperationlOpprand
I
~---+-----+
~
I
ICP
IAREAIDC
I
I
IFLDA(2),AREA(,8)
ICL2'0'
J
L
o
The fields enclosed in parentheses are
referred to as sub-fields.
In the above
example, the first sub-field of the second
operand was omitteo because the displacement AREA implies the length of two bytes.
Note that the comma separating the subfields must be specified in spite of the
first sub-field having been omitted.
Otherwise, the expression in parentheses is
assumed to be a length code and the displacement AREA is considered an implied
address.
The second groun of SS instructions
requires the length specification in the
first operand only. The operation codes
for this group are summarized in Figure 19.
In Basic Assembler language, these
instructions are written as follows:
Op-Code
Dl (L,B1) ,D2 (B2)
when using explicit add£essing,
S1(L),S2
when using implied
addressing.
or
Op-Code
The length may be explicit or implied,
but the comma separating the sub-fields in
the first operand must be entered, even if
the length code in an explicit address is
omitted.
o
M VC
F LD A (5)
, W0 RK (8 )
instruc-
The length code in the first operand is
replaced by the unit and functions
specification.
In explicit addressing, the length code
becomes redundant if the length is implied
in the symbol specified as the
displacemen t.
r----T--------~
(XIO)
AREA(X'22') ,50
This instruction causes 50 card columns
to be read on the assigned card-reading
device. The data is read into the storage
location named AREA.
For detailed explanations, refer to the section In£B!LQ~iEut
l!l~iru£tion§..
There are 3 types of operations:
1.
Binary arithmetic operations.
2.
Decimal arithmetic operations.
3.
Non-arithmetic operations.
These operations differ not only in
their internal logic but also in the format
of data, use of registers, and format of
instructions.
Some operations set a condition code in
bits two and three of the Program status
Word (PSW). This condition code indicates
the relationship (less than/greater than,
zero, negative, positive etc.)
between the
·two operands as a result of the last operation effecting the condition code setting.
For details ab~~t the PSW see the SRL publica tion 112I.:L~1 st~.!!!L..}§Q_ Model_~.Q_K~n£iiQn al
~Baracteristi£§, Form A26-5847.
BINARY ARITHMETIC
Binary arithmetic is used by binary
instructions for operands like addresses,
indexes, counters, and binary data. The
length of each operand is one halfword
including the sign.
Negative numbers are,
given in the twos-complement form.
The
first operand must be in one of the general
Machine-Instruction Statements
49
registers.
The other operand may be either
in a register or in main storage. For
detailed information refer to the SRL publication IBM SystemL360 Model 20 Functional
fh~±actg£istic§# Form A26-5847.
Binary numbers have a fixed length of one
halfword=16 bits. The first (leftmost) bit
contains the sign, the other 15 bits the
binary value. Binary numbers may be stored
in one of the general registers or in main
storage. In main storage, the address of
the left byte must be even.
Binary halfword
r
i
,
ISignlBinary Value
I
o
15
Binary numbers are represented as signed
integers.
Positive numbers are represented
in true form with a O-bit as sign.
Negative numbers are in the twos-complement
form with a 1-bit as sign. The twoscomplement form is found by reversing each
bit (0 to 1 and 1 to 0) and adding a 1 to
the rightmost bit.
Rl indicates a general register containing the first binary number and R2 a general register containing the second binary
number.
R1 and R2 may refer to the same
register. The result of an instruction in
the RR-Format replaces the first operand.
I
I
I
I
lOp-code
IRl
10000182
_____ - - i -___ ____ i - -__
~
~
o
7
11
15
D2
~
___________ J
19 20
R1 indicates a general register contain~
ing the first operand.
The address of the
second operand. is indicated by the fields
82 and D2 in one of two ways.
Either they
give the address directly (05 B2 5 3) or
an effective address is formed by adding
the contents of the register named in the
B2-field (8 ~ B2 5 15) to the relative
address given in the D2-field.
The result of an
Format replaces the
tion: After "Store
replaces the second
operation in the RXfirst operand.
ExcepHalfword" the result
operand.
Highest possible positive number:
r
*first operand compared to second.
,
I
31
r
,
r--------I
I
I
I
I
I
I Condi tion c:> de
100
101
110
\11\
I
I
I
I
~
I
IAdd register
Izero Izerol- I
Isubtract register Izero Izerol - I
ICompare halfword* lequall low I highl- I
IAdd halfword
Izero Izerol- I
Isubtract halfword Izero Izerol- I
L---_______________ L -____L -____ L - - ___ L __ J
A zero is always positive by definition.
The absolute value of the lowest possible
negative number is higher by one than the
highest possible positive nu~ber.
o
o
101111111111111111=2 15 -1=+32767
L-_______________ J
o
15
Lowest possible negative number:
r----------------,
110000000000000001=(2 15 ) =-32768
L ________________ J
o
15
Error conditions that may occur during the
execution of binary operations are:
1.
Operation c:>de invalid.
2.
Addressing error:
a.
~~£hi!l~_IQ£.!!!~l~Q.LI!l~.t.I.l!£1.iQ.ll~_fQL~i!l~.u
Q.Eg!:~!iQ!l§
Binary operations
RX- Forma t.
~re
in the RR or
b.
c.
r--------T----,----,
lOp-code
IRl
IR2
L _____ - - - L____ L-___ J
o
50
7
11
1 r:;
System/360 Modpl 20 Basic Assembler Language
<.1.
An instruction address or an
ope ran dad d r es s ref er s tot h E-~ protected first 144 bytes of main
storage (addresses 0 to 143).
An instruction address or dn
operand address is outside available storage.
The last (high(~st) main-storage
position contains any part of an
instruction that i~:; to be executed.
The R1:>r R2 fi(~ld,; of a binary
instruction contain binary values 0
through 7.
o
3.
0
Specification error:
a.
b.
c.
Assume register 8 con tains hexadecimal 0123 and register 9 con tains hexadecimal 0532.
~~£lg:
The low-oraer bit of an instruction
address is one, i.e., no halfword
boundary.
The halfword second operand is not
located on a half word boundary.
Bi ts 12 through 15 of an RX format
instruction are not all zero.
4.
Binary overflow check.
5.
CPU parity error.
Source statement:
Op-code
R1 R2
AR
8,9
From this sourc e sta tement the Basic Assembler creates th E following object code:
T
Op-code
INSTRUCTIONS FOR BINARY ARITHMETIC
Forma t:
RR
Op-code
Machine instruction:
1A
AR
R1,R2
Function: The contents of the first
operana-field are added to the contents of
the second operand field. The result is
stored in the register specified by the
first operand. Thp second operand remains
unchanged.
The sign is determined by the rules of
algebra. A zero rpsult is always positive.
A sum consisting of more than 15 numeric
bits plus the sign caus~s an overflow. In
detail, this is what haprens: First all 16
bits of both operands are added. The
result is correct if the addition results
in a carry out of both the sign-bit position and the high order numeric-bit position or in no carry at all. However, if
the addition causes a carry out of only one
of the two positions a binary overflow will
take rlace.
~ot~:
An overflow will change the sign of
the result.
o
00
01
10
R2
I
I
1A
8
_____
9
~
I
_ _J
,
I
1
I
I
I
IName
10p-codelFormatlMnemonicl
i-1
I
I
,
I Add Register
,1A
I RR
I AR
I
I Subtract Register 1 1 B I R R I SR
I
I Store Halfword
1 40
I RX
I STH
I
ILoad Halfword
1 48
I RX I LH
I
I RX I CH
I
I Compare Halfword ,49
I Add Ha I f w0 r d
1 Ig
I RX I AH
I
I RX I SH
I
I Subtract Halfwordt 413
o
R1
~------------+I-------+----~
~
r
~------,
I
Result=zero
Resultzero
After execut ion register 8 contains hexadecimal 0655. The condition code is 10.
Format:
RR
o p-code
Machine instruction:
1B
SR
R 1, R 2
Fun~tion:
The contents of the second
operand field are subtracted from the contents of the first operand field. The
result will be in the register specified by
R1.
Both operands and the result consist
of 15 numeric bits plus the sign. The
second operand remains unchanged.
The subtraction is performed by adding
the twos-complement of the second operand
to the first operand.
All 16 bits of both
operands are added. If this results in a
carry out of both the sign-bit position and
the high order numeric-bit position or in
no carry at all, then the result is
correct. If there is, however, a carry out
of only one of the two positions a binary
overflow will occur.
A register may be cleared to zero by
subtraction from itself.
There is no twos-complement for the
highest negative number. This number
remains unchanged when a complementation is
performed. Nonetheless, the subtraction is
still executed correctly.
00
01
10
Result==zer:>
Resul t zero
Assume register 0 contains hexadecimal 047F and register q contains hexadecimal 0007.
]~~~El~:
r.achine-Instruction statements
51
Source statement:
specified by Rl.
The second operand
remains unchanged.
Op-code R 1 R'2
8, 1.1
SR
From this source statement the Basic Assembler credtes the following object code:
.---------,--~,
1 0 p- co del R 1 I R 2 I
~---. -+--+-~
I 1B
o
~~amElg:
Assume register 9 contains hexadecimal AAAA, register 12 contains 0032,
the displacement in the second operand is
lF4 (decimal 500) , and the field starting
at storage l:>cation hexadecimal 226 (decimal 550) contains 80AF.
I
18 I D I
'--_ _ _ _ _.J.. __ L - - J
Sour ce st atem ent :
After execution register 8 contains hexadecimal 03A8.
The condition code is 10.
Op-code R1 D2 X2=0 B2
9,500(0,12)
L.H
From this source statement the Basic Assembler creates the following object code:
Forma t:
RX
40
Op-code
Machine instruction:
STH
I
R 1 ,D 2 (0 , B 2)
.--.----,--T---'
IOp-cod e IR1IX2=0IB2ID2 I
~---+
Function:
The contents of the register
specified by Rl are stored in the half word
at the main-storage location addressed by
B2 and D2.
The first operand remains
unchanged.
I 48
~
I
19 I 0
-t--+----i
_ _ _ - - L - - L -___
IC 11F41
~_~
__ J
After execution register 9 contains hexadecimal 80AF.
~~~~£1~:
Assume register 9 contains hexadecimal 68AF, register 11 contains hexadecimal 001E, and the displacement in the
second operand is hexadecimal 29E (decimal
670) •
Source statement:
Op-code R1
STH
D2 X2=0 B2
9,670(0,1')
From this source statement the Basic Assembler creates the following object code:
r
•
~
•
I
RX
Op -code
Machine instruction:
(~)
49
CH
R1 ,D2 {O, B2}
Iun£tiQ.!l:
The 16 bits 0 f the register specified by R1 are compared with the halfword
at the main storage location addressed by
B2 and D2.
The comparison is algebraic,
i.e., the signs must be taken into consideration.
B:>th operands remain unchanged.
A condition code is set.
,
IOp-codeIRlIX2~0IB2ID2
00
01
10
I
I
I -t
19 l O I S 129EI
l-------+-_+_
I 40
Format:
First operand=second operand
First operand(second operand
First operand>second operand
L
Exam£1e:
After execution the field starting at
storage location hexadecimal 2BC (decimal
700) contains 68AF.
Assume register 9 contains hexa-
decimal 0001, the displacement in the
second operand is hexadecimal 690 {decimal
1680}, and register 13 contains hexadecimal
0026, and the halfword at storage location
hexadecimal 6B6 is AF99.
Source statement:
Format:
RX
48
Op-code
Op- code R 1 D2
Machine instruction:
I.H
CH
I]n£ii2n:
The hal~word at the main storage
location addressed by B2 and D2 is placed
into the 16 bit positions of the register
52
X2=0 B2
R1,D2(0,B2)
9,1680{0,13)
From this source statement the Basic Assembl er cr eat es t he following object code:
System/360 Model 20 Basic Assembler Language
o
o
Machine instruction:
r-----~-~~___r___,
IOp-codeIRlIX2=0182ID2 I
..
I
I
I +--~
IL-_____
49
I~ I 0
ID 1 690 1
__ i - - - - i - - i -__ J
~
After comparison the resulting condition
code setting will he:
10.
RX
Op-code
R 1 , D 2 (0 , D2)
Function: This instruction is identical to
the-Ada-Halfword instruction with the following exce~tion:
The twos-complement of
the second operand, addressed by B2 and D2,
is added in place of the true value.
00
01
10
Format:
SH
Resu It =z ero
Resultze ro
4A
~~amplg:
Machine instruction:
AH
R1,D2(0,82)
K~nc!iQn:
The hal~word in main storage,
addressed by B2 ann D2, is added to the 16
bits of the register specified by Rl.
The
sign is determined by the rules of algebra.
A zero result is positive by definition.
Assume register 9 contains hexadecimal 047F, register 11 contains hexadecimal 0050, the displacement in the second
operand is hexadecimal 320 (decimal 800),
and the field starting at storage location
hexadecimal 370 (decimal 880) contains hexadecim al 00 D7 •
Source statement:
If the resultinq sum is larger than 15
bits plus the sign, an overflow occurs.
All 16 bits of both operands are added.
If
there is a carry out of both the sign-bit
position and the high-order numeric bit
position or if there is no carry at all,
the result is correct.
A binary overflow
will occur if there is a carry out of only
one position.
A condition code is set.
o
Op-code Rl D2
SH
X2=0 B2
9,800 (0, 11)
From this source statement the Basic Assembler creates the following object code:
I i i
I
i
IOp-codeIRlIX2=0IB2I TI 2 1
~----+--+----+--+---~
I 4B
I9 I 0
I B I 3201
00
01
10
Resul t=zero
Resul tzero
L-
After execution register 9 contains hexadecimal 03A8 and the condition code is 10.
~~~m~l~:
Assume register 9 contains hexadecimal 047F, register 11 contains hexadecimal 0028, the displacement in the second
operand is lEA (decimal 490), and the field
at storage location hexadecimal 212 (530)
contains hexadecimal 1F29.
Source statement:
Op-code Rl D2
Decimal arithmetic can be performed only
with data in packed format.
Packed format
means that there are two digits in one byte
except for the low order byte.
It contains
one digit and the sign.
X2=O 82
After execution register 9 contains hexadecimal 23A8 and the condition code is 10.
Data is transferred to and from the
external I/O devices in zoned format.
Thus, the data has to be packed and
unpacked bef3re and after processing respectively. In zoned format, each byte
contains a zone in the left halfbyte and a
digit in the right halfbyte except the last
one which contains the sign and a digit.
The add re ss in an instru ction always s pecifies the left-most byte of the operand.
The length field in an assembled instruction indicates how many bytes are part of
the operand in addition to the addressed
(left) byte.
Format:
Decimal operations are performed in main
storage.
The operands have a length from
AH
9,490(0,11}
From this source statement the Basic Assembler creates the following object code:
i
r-----~__,__
1__'
IOp-codeIRlIX2=0IB2ID2 I
..
1
14A
19 10
L-_ _ _ _
o
DECIMAL ARITHMETIC
1
-L-~
RX
I
__
I
1
IB IlEAl
~~_~
Op-code
4B
Machine-Instruction Statements
53
1-16 bytes. A field may start at any
address including an odd one. In zoned
format there may be a maximum of 16 digits,
in the packed format a maximum of 31 digits
plus the sign in a field. The two operands
may be of different length. Multiplicand
and divisor are restricted to a maximum of
15 digits plus the sign.
Machine Formats of Instructions for Decimal
Arithmetic
Decimal operations have the SS format:
•
i i i
-.-~------,
IOp-codelL1 IL2 IB1
The values in the operand fields are
assumed to be right aligned, with leading
zeros where required. The operands are
processed as integers from right to left.
If a result extends beyond the field indicated by the address and the length field,
the extending (high order) part is ignored
and the condition code is set to 11.
Fields specifien in a decimal-arithmetic
instruction may overlap only if the rightmost bytes coincide.
Exception: with the
ZAP instruction an overlap to the right is
permissable.
R~E£esentation
7
11
15
19
31
D2
I
47
35
I
The fields B1 and D1 give the mainstorage address of the left byt e of the
first operand field; L1 gives its length.
In the Basic Assembler created object code,
the number of bytes in a field is equal to
the length c~de minus one.
The instruction fields B2, D2, and L2
give the respective information for the
second operand.
The address ~f the leftmost byte is
found by adding the contents of the register specified in the B-field and the contents of the D-field.
of Numbers
Decimal numbers consist of binary coded
digits and a sign. The decimal digits 0-9
are represented in the four bit code by the
bit combinations 0000-1001. The combinations 1010-1111 are reserved for representations of a sign (+,-). 1011 and 1101
represent a minus, the other four combinations a plus. The representations 1100,
1101, 1010, and 1011 are created during
calculations in main storage. Negative
numbers are represpnted in true form. The
two decimal formats are:
Packed decimal numher
r----------~----------~----------~
I
Byte
I
Byte
Byte
I
I
I
I
I
I
IDigitlDigitlDigitlDigitlDigitlSign
~
L
o
I B2 I
D1
o
The result of a decimal operation
replaces the first operand. It cannot
occupy more storage area than indicated in
the B,D, and L fields. The second operand
remains unchanged.
Exception: overlapping
fields.
The general registers are not affected
by decimal operations.
The results af the decimal operations
listed in the table below set a condition
code.
rI
00
I
01
I
10
I
11
,
I
r-----+-------+-------+-------+----------~
I ZAP
I cp*
lAP
,SP
Zoned decimal number
I
I zero
I equal
I zero
'zero
I zero I
I
I low I high I
I
,zero , overflow I
I _zero
overflow,
_____
_
_____ , __
_ _ _ _ _ _ _ _J
~
~
~
r---------~----------r----------~
Rvh:~
-.I --
Byte
!
Byte
1
I
I
I
,
I
I
I
IZone
IDigitlZone
,DigitlSign
IDigitl
L ______
____
____- A _
J
!
~
~
,.A.-_ _ _ _ ...L.._ _ _ _ _
All other decimal operations leave the
condition code unchanged.
o
54
system/360 Modpl 20 Dasic Assembler Langudge
o
INSTRUCTIONS FOR DECIMAL ARITHMETIC
The following error condition& may occur
during the execution of decimal arithmetic
operations:
1.
Operation code invalid.
2.
Addressing error:
a.
b.
c.
3.
Specification error:
a.
b.
o
c.
4.
An instruction address or an
operand address refers to the protected first 144 bytes of main
storage.
An instruction address or an
operand address is outside available storaqe.
An instruction occupies the last
two (highest) main-storage
positions.
The low-order bit of an instruction
address is one, i.e., no halfword
boundary.
For Zero and Add, Compare Decimal,
Add Decimal, and Subtract Decimal
instructions the length code L2 is
greater than the length code L1.
For Multiply Decimal and Divide
Decimal instructions, the length
code L2 is greater than 7 or greater than or equal to the length code
L1.
Data error:
a.
b.
A sign or digit code of an operand
in the Zero and Add, Compare Decimal, Add Decim aI, su btr act Decimal,
Multiply Decimal, or Divide Decimal
instruction is incorrect, or the
operand fields in these instructions overlap incorrectly.
The first operand in a Multiply
Decimal instruction has insufficient high-order zeros.
r
---T-------T----~--------,
lOp-code FormatlMnemonicl
IName
-+
---+--------~
I
I Move with Offs Et I F1
ss I £'II VO
I
I F2
SS I P A CK
I
IPack
ss I UNPK I
I F3
I Unpack
IZero and Add
SS
I ZAP
I
I F8
I Compare Decim al
SS I CP
I
I F9
1 Add Decimal
SS
I AP
1
I FA
ISubtract Decimal 1 FB
SS I SP
I
IMultiply Decimal I FC
SS
I MP
I
IDivide
Decimal
SS I _________
DP
I
I FD
________________
______
______
J
~
~~
Form at:
SS
Op -co de
~
~
F1
Machine instruction:
MVO
D1 (L1,B1) ,D2(L2,B2)
The contents of the second
operand field are moved to the location
specified by the first operand. The move
is executed with an offset of half a byte
(one digi~ to the left. The right halfbyte of the first operand remains
unchanged. There is no check for validity.
The fields need not have e~ual lengths.
Leading zeros are inserted if the first
operand is longer than the second.
If the
second operand is longer than the first,
the high-order digits ·of the second operand
are ignored.
fQnctio~:
The move proceeds from right to left one
byte at a time. The second operand may
overlap the first excluding the rightmost
byte of the first operand.
~~~~~:
Assume register 12 contains hexadecimal 0250, register 15 contains hexadecimal 040F, the displacement given in both
operands is zero, storage location hexadecimdl 40F contains hexadecimal 123456, and
storage location hexadecimal 250 contains
hexadecimal 77 88 99 OC.
Source statement:
Op-code D1 L1 B1D2 L2 B2
5.
Decimal divide check:
The resultant quotient in a Divide Decimal instruction exceeds the specified
data field instruction (including division by zero) or the dividend has no
leading zero.
M VO
o
CPU parity error.
a (3 , 15)
From this source statement the Basic Assembler produces the following object code:
r-
6.
0 ( 4 , 1 2) ,
i i i
T---T--"---'
IOp-codeIL 1 IL2I B1 ID1 IB21D2 I
1--------+--+ 1 I
I I
,
I F1
13 12 Ie 1000lF 10001
...l.-_...l.- __ ...l.-_.L-__ J
Machine-Instruction Statements
55
After execution the field at location
hexadecimal 250-253 contains hexadecimal 01
23 45 6C.
Format:
SS
Op-code
F2
Machine instruction:
PACK
D1 (L 1, B 1) , D2 (L 2, B2)
Function:
The unpacked content of the
second-operand field is packed and placed
into the first operand field.
The second
operand field must contain an unpacked decimal number.
It may have a maximum size of
16 bytes. There is no check for validity
of digits and sign.
The lengths of the fields need not be
equal. Leading zeros are inserted if the
first operand fieln is too long for the
result. The high-order digits of the
second operand are ignored if the first
operand field is too short for the result.
The fields are processed from right to left
one byte at a time.
field.
The second operand field must contain a packed decimal number. Sign and
digits are n~t checked for validity.
After processing, the zoned decimal
number in the first operand contains the
sign (high-order four bit~ and one digit
in the rightmost byte. Each of the other
bytes contains a zone and a digit.
The fields are processed from right to
left. If the first operand field is'~too
long it is filled with leading zeros. If
the first operand field is too short to
contain all the digits of the second
operand, the leading digits are ignored.
The operands may overlap but you must exercise caution.
o
I
Assume register 10 contains hexadecimal OFAO, the displacement in the first
operand is hexadecimal FB4, that in the
second operand is hexadecimal 65, and location hexadecimal 1004-1007 contains hexadecimal 01 23 45 6D.
]~~~~:
Source statement:
Assume register 11 contains hexadecimal 044A, register 9 contains hexadecimal 02CO, the displacement in the first
operand is hexadecimal 244, in the second
operand it is hexanecimal 180, and that
storage location hexadecimal 440-444 contains hexadecimal ~1 F2 F3 F4 C5.
~KamEl~:
Op-code 01
UNPK
Op-code 01 Ll Bl
PACK
D2 L2 B2
4020(5,10) ,100(4,10)
--'-~-T-_'_---T--T--'
IOp-code1L11L21B1101 IB21021
I
I I I I
I t----1
I F3
14 13 IA IFB41A 1651
L_ _ _ _ _
~~_~
__
~
__
~_~_J
580 (4, 11) ,184 (5,9)
From this source statement the Basic Assembler produces the ~ollowing object code:
r-----~_,_-~
i
After execution the field at storage location hexadecimal 6RE contains 00 12 34 5C.
Format:
SS
Op-code
F3
Machine instruction:
UNPK
D1{L1,B1) ,D:'.(L2,B:?)
1~n£1iQn:
After execution location hexa~ecimal 1FS41F58 contains F2 F3 F4 F5 06.
i-'-----'
IOp-codeILlIL2IBllT11 IB2102 I
J----_+_ I I I
+-+---{
I F2
1314 IB 12441911801
The packed contents of the
second operand fieJd are changed to zoned
format and stored in the first operand
56
D2 L2 B2
From this source statement the Basic Assembler produces the following object code:
I
Source statement:
L1 Bl
Format:
S5
Op-code
F8
Machine instruction:
ZAP
D1 (Ll,Bl) ,D2(L2,B2)
functign: The first operand field is
zeroed out and the contents of the second
operand field are placed into the first
operand field.
This operation is (~quiva
lent to an addit ion into d zero-field.
The
second operand must be in packed format.
A zp.ro result is po~)itiv(~ by (lefinition.
The sp.cond operand may b(~ short(~r th,ln th~~
first operand.
If th(~ second oI)(~ri1nd is
long(~r,
then il machine stop occurs and th(~
ins t rue t ion i!:; not (~ x e cut e (1.
System/360 Modpl 20 Basic Assembler Language
o
o
Processing proceeds from right to left.
All digits and the sign of the second
operand are checked for validity.
High
order zeros are supplied if needed.
The
fields may overlap if the rightmost byte of
the first operand is coincident with, or to
the right of, the rightmost byte of the
second operand.
00
01
10
Note the difference between "Compare
Decimal Packed" and "Compare Logical Characters" (CLC).
CP:
comparison proceeds from right t6
left, t.he sign, zero, and invalid characters are considered, and fields of unequal
length are extended.
Result=zero
Resul tzero
~x~~l~:
Assume register 10 contains hexadecimal 01F4, the displacement in the first
operand is hexadecimal 294, that in the
second operand is hexadecimal 37A, and
storage location h~xadecimal 56E cohtains
01 23 4D.
CLC:
Comparison proceeds from left to
right, the sign and invalid characters are
not co n sid er e d .
00
01
10
Source statement:
o p- cod e
The contents of both operand fields do
not change.
An overflow cannot occur.
The
two fields may overlap if the rightmost
bytes coincide.
Therefore, it is possible
to compare a number to itself.
D1 L 1 B 1
First operand=second operand
First operandzero
'0 v e r flo w
00
01
10
11
];.!~l!u?lg:
Assume register 8 contai.ns hexadecimal 00 14 storage location 329 (hex adecimal) cont~ins 00 '2 2D, storage location
500 (hexadecimal) contains 01 00 OC, the
displacement in the first operand i5·315
(hexadecimal)1 and that in the second
operand is 4EC (hexadecimal).
Source statement:
Op-code D1 L1 B1
,AP
'D2 L2· B2
Assume register 9 contains (hexadecimal) 00t8,register8 contains (hexadecimal) 012C, storage location 898 (hexadecimal) contains 012C, storage loea'tion
CE4 (hexadecimal) contains 008C, the dis'~lacement in the first operand is7DO (hexadecimal) , and tha t in the second operand
is BB8 (hexadecimal).
£;.xam£l~:
Source statement:
789 (3,8) ,1')60 (3,8)
Op-code
From this source statement the Basic Assembler produces the ~ollowing object code:
,--------T--,- I,
I
I
SP
r
o
2000(2,9) ,3000(2,8)
I
1--'--'--
IOr-codeIL1IL2IB1ID1
.L_-.L _ _ ..J
1
1 FB
After executio'n storage location 329
decimal), contains no 77 ,8C.
D1 L" B 1 D2 L2 B2
From this soutce statement the Basic Assembler produces the following object code:
---r--,
IOp-code1L11L21B11Dl IB21D2 I
~--,--4-- I
I
I
+--+---~ ,
I FA
12 I 2 18 111 5 I 8 14 EC I.
L-_ _ ,-__ J.._-..l..
Result=zer~
Result(zerb
Result>zero
Overflow
(hexa-
1-'
IB21D2 I
-+-+-~+--+---+-+~--~
111119 17DOl8 IRn81
L ___ - - . L _ L - - L - - L - - . L _ L - - _ . . J
After execution storage locatioh 898 (hexadecimal) contains OOAO.
Th(~ condition code
is 10.
Format:
S5
Or-code
FB
Machine instruction:
SP
D1(L1,B1) ,D2(L2,B2)
Fo rm d t :
funct!.Q..!!:
The contents of the second
operand field are subtracted from the contents of the first operand field.
The
result is placed into the first operand
field.
The sign is determined by the rules
of algebra.
A zero result is positive by
definition. Exception:
A zero result
remaining in case of an over·flow may, possibly have a minus sign.
58
System/J60 Modpl 20 Basic Assembler
(~(~
Op-code
FC
Machine instruction:
MP
Dl(Ll,B1) ,D2(L2,B2)
I!!.!l~i'!'Q.!l:
The multiplicand in th(~ first
field is multiplied by t.he multiplier in the second operand fi('~ld. The IJroduct is placed into ,thf~ first ()IH~rancl
fif~lrl.
The second oper'dnd may havc~ cl mdximum of 1c) c1i{jits (L2=7) plu!. t.h(~!.:;i:gn 7 or L2 ~ Ll a program error halt
occurs and the instruction is not executed.
from the address value of the implicit
address).
Source statement:
The length of the product is equal to
the sum of the lenaths of multiplier and
mUltiplicand. Therefore the multiplicand
must be expanded with leading zeros by the
number of bytes of the multiplier. Otherwise a hal t occurs.
An overflow is not
possible. The product may have a maximum
length of 30 digits plus the sign.
It contains at least one leading zero.
The factors and the result are considered to be signed integers. The sign is
determined by the rules of algebra. The
operand fields may overlap if their rightmost bytes coincide. Thus, it is possible
to square a number.
Op-code D1 L 1 81 D2 L2 B2
PROD, HAND
ZAP
Basic Assembler produced object code:
I
I
I
T--r
I
I
i
I 0 p- co del L1 I L2 I B 1 I D1 I B2 I D2 I
II
I +--+----+-+--~
I F8
14 11 IC IB031C IBOll
'---
and
Op-code Dl L1 B1 D2 L2 B2
You can save computing time by using
the larger of the two factors as the second
operand.
MP
EQ1~:
PROD,MOR
I
I
I
~-T---T--'---'
IOp-codelL1lL2lBllDl IB21D2 1
I
-+ I 1 I I 1 •
1 FC
14 12 IC IB031C IAFEI
,
0
= produ ct
= PROD
Mul tiplicand x multiplier
MAND
x
MOR
2.
Length MAND
3.
The MAND must be right-aligned and have
leading zeros ~efore the multiplication
is executed.
MOR
MAND
PROD
L--.L-_.L-_J
.
DS
DS
DS
1
MAND
I
I
I
14215CI
~
I
I
I
PROD,MAND
I
PROD,~OR
I
I
I
I
CL3
I
CL2
I
CL5
I
I
I
__________________ J I
~
o
I I l
I
13712119DI
MOR
-,
r------T
ZAP
r-!P
,
length MOR = length PROD
I Name I Operation I Operand
lI
+-
1
2
I
The result of the two instructions is shown
in Figure 22.
1•
+
.L-_.L-__.L-
I
Assume the Basic Assembler has allocated
storage location (hexadecimal) lC92 to sta-.
tement MOR. Then, HAND has location lC95
amd PROD has location lC97.
Further assume
that the storage locations implicitly
addressed by MOR and HAND contain 37219D
and 425C respectivply and register 12 cont a ins (h e x a dec i I". a I ) 1 1 9 4 •
(T h e Bas i c
Assembler. automatically calculates the displacement shown in the object coding by
subtracting the contents of register 12
PROD before multiplication
I I
I .1
I I
10010010014215CI
L__
~~
__
~~
__
~
PROD after multiplication
I
I
I 1 I I
10115811810715DI
L--L-~
__~~__~
!Q.!.~"!'
Maximum length of
product is 16 bytes; maximum
Ilength of MOR is 8 bytes.
L
Figure 22.
Format:
SS
Decimal Multiplication
Op-code
FD
Machine instruction:
DP
D1 (L 1, B1) , D2 (L2, B2)
Machine-Instruction Statements
59
.
.
Function:
The dividend in .the .firs·t
operand-field is divided by the divisor in
the second operand field.
The quotient and
the remainder are placed into the first
operand field.
The quotient occupies the left part of
the first operand, .L.e. the address of the
quotient is the same as the address of the
dividend.
The remainder occupies the right
part of the first operand and has a l~ngth
equal to that of the divisor!
Th~ quotient an~ the remainder togethei
occupy the entire ~ividend field (first
operand).
This means the dividend field
must be large enouqh to accomodate a divisor of maxi~um lenoth an~ a quotient of
maximum length. 'In the extreme case the
diyiden~ field has to be expanded wit'h
zeros to the left by the number of bytes of
the di visor.
The length of the quotient field (in
bytes) is Ll-L2. The div.isor, field may
have a maximum of 15 digits plus the sign
and must be smaller than the dividend
field.
If L2 > 7 or L2 ~ Ll a halt occurs and
the operation is not execu~~d. The dividend must have at least one leading zero or
a hal~ o6curs and the operation is not
. executed.
3.
The dividend must be right-aligried with
at least one leading zero before the
division is performed.
r---
-.---~---~------------~-~,
I
IName IOperationlOperand
I
I
I
r,---t
~
1
1
I
I
I
I.
·1
1 DEND
IDOR
- 1 PROFE
I
ZAP
DP
PROFE,DEND
PRO FE, DaR.
DS
DS
DS
CL4
CL2
CL5
1
I
L _____L--________
.~
______________________
~
Assume the Basic Assembler has allocated
storage locations as tollows: DEND hexadecimal A09, PROFE hexadecimal F40, and DOH
hexadeci~al CAC.
Register 9 contaihs hexadecimal 0400. The Basic Assembler automatically calculat~s the displacements for the
two operands by subtracting the contents of
register 9 from the respective storage
address values. The source and object codings for the ZAP and DP are:
Source statement:
Dividend, divisor, quotient, and
remainder are signed integers. The sign is
determined according to the rules of ~lge
bra from the ~igns of dividend and divisor.
The sign of the remainder is always identical to the sign o~ the dividend. This
also holds true if the quotient or the
re~ainder are zero.
o
Op-code Dl Ll B1 D2 L2 82
ZAP
o
PROFE ,DEND
Basic Assembler produced object code:
r
--r--r--T--T'
I
-,
10 p- cod elL 1 1L2 I B 1 I DliB 2 I D2 I
If the quotient contains more than 29
digits plus the sign, or if the dividend
has no leading zero, then' a halt occurs and
the operation is not executed~ The divisor
and the dividend r~main unchang~d and there
is no overflow. The two operands may overlap if their rightmost bytes coincide.
~~--+~-+--+---+--~-~~
I F8
14 13 19 175819 16091
.,L-L--
I
~.
and
Source statement:
Op-code Dl Ll Bl n2 L2 82
DP
1.
2.
Di vidend
DEND
Divisor
DO~
Basic Assembler produced object code:.
=
Quotient
QUOT
Length of procpssing field
QUOT + length nOR
length
r
maximum length of proce$sing field
(PROFE) = length DEN D +- len gt h DOR
(packed bytes).
System/360 Model 20
Basi~
-'--'-~T--T-~-T--'---'
lOp-code 1 L llL 21 B11 Dl I 821 D2 I
1-----+-+ I I
1 +--1
1 FD
14 11 19 175819 ISACI
L
60
PROFE ,DaR
-L-_-L-_L- __ -L-_...l....-__ J
The results of the two instructions dre
shown in Figure 23.
Assembler Language
o
o
--------------,
r---
I
I
I
I
I
I
I
I
12719513 4 13CI
DEND
Variable Length
I
i
I
i
Icharacterlcharacterl
L----'-_-'-__..L.---1
I
o
I
I
I
I
I
I
I
I
I
I
DOR
12113CI
L_~~
Quotien t:
I I I I
I I
PROFE 11311213CI1414CI
~-L
The EDIT operation only handles data of
packed format.
The other instructions
ha nd Ie all bi t com bi n a tio ns •
_ _ ~ _ _~-J
Quotient and remaindet each
have their own siqn.
MQ!~~
Maximum length of
quotient is 16 bytes; maximum length of DOR is 8
bytes.
L-
-1
Figure 23.
15
7 8
In storage-to-storage (S5) operations,
the fields may start at any address with
exception of the first 144 bytes, which are
reserved. The maximum lenr;th of a field is
256 byte s. I mme d i ate d a t a is 1 i mit edt 0 a
length of one byte.
I0012719~13413CI
~~__~_.I_-i-_J
PROFE
-,
Icharacter I
_ _..L-_ _ _ _ _ _ _ J
Decimal Division
Storage-t~-storage instructions may have
overlapping operands. The result of overlapping depends on the particular operation.
Overlapping does not influence the
operation if the operands remain unchanged
(e.g. in a comparison). If one or both
change, however, execution of the operation
may be influenced by the overlapping and by
the manner in w tich the data are rounded
off and stored.
NON-ARITHMETIC OPEPATIONS
o
There are special instructions for the nonarithmetic processing of data.
The
operands are processed one byte at a tim~.
In some cases the left four bits and the
right four bits of a byte are treated
separately.
Processing of data fields in main
storage proceeds from left to right.
A
field may start at any address excluding
the reserved areas.
In non-arithmetic operations the operand
fields are c6nsidered t6 contain alphameric
data. An ex~eption is the Edit-instruction
which requires packed decimal numbers in
the second operand field.
The data are either in main storage or in
the instruction itself. 'They may be a
single character or an entire field.
If
two operands are used they must be of equal
length. Exception:
the Edit-instruction.
The two formats for non-arithmetic data
are:
Fixed Length
o
r---------,
lsingle
I
Icharacter I
L _________ J
a
7
Non-arithmetic instructions are either in
the SI- or the SS-format.
r------,-----T---T--------,
IOp-codel
12
IB1 I
D1
L ___ - - - - L _ _ _
' _ - - L - - - L -__
, ____ -1
a
15
7
31
19
The address of the first operand field
is the sum of the contents of the B1-and
D1-fields. The operand has a length of one
byte. The second operand also has a length
of one byte but it is contained directly in
the instruction. The result is placed into
the first operand field.
The general
registe['s are not affected by an
51-instruction.
r-------,-----T---T--------.--~--------,
I ai) - co ue l L
I B1 I
L______ - L - - -_ _ - L ___L -
a
7
15
19
D1
IB 2 I
31
D2
35
I
J,
47
The address of the each operand field is
the sum of the contents the respective Band D-fields. The first and second operand
fields must have the same length.
The ['esult of an operation in the S~
Format is placed into the first operand
Machine-Instruction
stdtement~
61
INSTRUCTIONS FOR NON-ARITHMETIC OPERAT IONS
field.
The contents of the general registers remain unchanqed.
i
1
1
I Opera tion I
Code
I Format I
I
I--I
I
~
SI
92
I Move Immedia te (MVI)
1
J
Move Characters (MVC)
SS
D2
I
I
SS
Move Numerics (MVN)
D1
1
I
SS
Move Zones (MVZ)
D3
I
I
Compare Logical (CL I)
SI
95
I
I
5S
D5
Co mp ar e Lo 9 i cal (CLC)
I
·1
. DE
SS
Edi t (ED)
1
1
51
94
And (N I)
1
1
96
Or (OI)
SI
1
I
Test under Mask (TM)
51
91
I
I
SI
99
Hal t & Proceed (HPR)
I
J
SS
Translate (TR)
DC
1
I
______ L--_______
I
1Name·
Condition Code After Non-Arithmetic
Q£eratIon~-------------------------
.
The results of the operations determine the
condition code.
Move-operations do not set
a code. In case of the EDIT-instruction
the condition code indicates the' status of
the field to be transferred into the mask.
Table of condition codes:
~
,---
i
i
i
,
~l
~~
~
·1
I
1.0 ()
I a1
I 10
I f1 I
.-------------;I-----rl-------rl--- ~-~~
1Test under Mask I zero I mixed
1-lone I
lAnd
Izero Inot zerol-I-~ I
ICompare Logicalleguaillow
Ihigh
1-- I
lOr
Izero Inot zerol-1-- I
IEdit
Izeio
Izero 1-- I
______________
____
L
~J
Format:
Op-code
SI
92
Machine Instruction:
MVI
D1(B1),I2
o
Error conditions which may occur during the
execution of non-ar~thmetic operations are:
1.
Operation code invalid
2.
Addressing error
a. An instruction address or an
operand ad~ress refers to the prote~ted first 144 bytes of main
storage (addresses a to 143).
b. An instruction address or an
operand adnress is outside available ~torage.
.
c. The last (highest) main-storage
position ~ontains ariy part of an
instruetion that is to be executed.
]xa.!!!.E1,g: Assume reg,ister 10 contains (hexadecimal) 082E,storage location A22 (hexadecimal) contains A, the displacement in
th~ first operand is 1F4, and the immediate
data is the $.
Source statement:
Op-code D1 B1
MVI
12
500(10),C'$'
From this source statement the Basic Assembler produces the following object code:
r
i
T---·'I
i
Inn_~n~~IT~IQ1In1
I '-'1:'
3.
Specific~tion error
The low-order bit of an irtstruction
address is one, i.e., no halfword
boundary.
I
192
....... ....,
\..ol ~
I ...
L"
I
j.J
,
I
LJ
I
I
I I 1--1
.15BIA 11F4J
.L-__ J
After execution storage location A22 contains $.
Data error
An invalid digit code is contained
within the second operand field of an
Edit operation.
Format :SS
5.
CPU parity error.
Machine instruction:
MVC
D1(L,B1),D2(B2)
62
System/360 Modei 20 Basic Assembler Lan~uage
4.
0
Op-code·
D2
o
o
Function:
The contents of the second
operana-field are placed into the first
operand field.
Processing is performed
from left to right one byte at a time.
(hexadecimal) , and that in the second
operand is 66 (hexadecimal).
The two operand fields may overlap.
If
the first operand field is to the left of
the second operand field, then transfer
will proceed correctly.
If the first
operand field is exactly one byte to the
right of the secon~ operand field, then
this byte will be propagated throughout the
first operand fiel~.
Op-code
Source statement:
D1 L B1
MVZ
D2 B2
100(1,10) ,102(10)
From this source statement the Basic Assembler "produces the following object code:
I i i
i i i
IOp-codelL IBllDl
£~ndition
Code:
No change.
I
I
I
lOlA 10641A 106 6 1
I D3
~.!amplg:
Assume register 11 contains (hexadecimal) 0258, register 15 contains (hexadecimal) 04BO, storage location 3E8 (hexadecimal) contains optional data, storage
location 7DO (hexa~ecimal) contains C9 C2
D4, the displacement in the first operand
is 190 (hexadecimal), and that in the
second operand is 120 (hexadecimal).
,
j
ss
Op-code
Form at:
Op-code
Machine instruction:
MVN
D1 (L,B1) ,D2 (B2)
D1 L B1 D2 B2
D1
400(3,11) ,POO(15)
From this source statement the Basic Assembler Froduces the ~ollowing object code:
I
I
J
After execution storage location 8F4-8F7
contains F4 F3 F2 F1.
Source statement:
MVC
o
IB21D2 1
+--+--+---1
-.-
j
IOp-codelL
I
r---+--+-I
I D2
i
j
IB11D1 ,B21D2
'1
I
~
12 IB 1190,F 13201
After execution storage location 3E8 contains C9 C2 D4.
Format:
SS
Op-code
D3
Machine instruction:
MVZ
D1(L,Bl) ,D2(~2)
Function:
The low order four bits (the
numerics) of each byte in the second
operand field are placed, from left to
right, into the corresponding low order
four bits of the first operand field.
The
high order four bits (the zones) of each
operand remain unchanged.
The digits are
not checked f or v alidi ty •
The ope rand
fields may overlap.
£.Qnditi.2j! Code:
No change.
Example:
Assume reg"ister 15 contains (hexadecimal) 7DA, storage location 8A4-8A 7
(hexadecimal) contains F4 F3 F2 C1, stor.:-age
loca tion 96 A (h exadecimal) contain s F9 F 8
F7 D6, the displacement in the first
operand is C8 (hexadecimal), and that in
the second operand is 190 (hexadecimal).
Source statement:
XQnc!iQQ:
The high-order four bits (the
zones) of each byte in the second operand
field are placed into the high-order four
bits of the first operand field.
The low
order four bits (the numerics) of each byte
remain unchanged.
Movement is from left to
right one byte at a time.
The digits are
not checked for validity.
The operand
fields may overlap.
Op-code
MVN
D1 L B1
From this source statement the Basic Assembler produces the following object code:
I i i
r-I D1
o
Assume register 10 contains (hexadecimal) 0890, storage location 8F4-8F7
(hexadecimal) contains F4 F3 F2 C1, the
displacement in thp. first operand is 64
B2
200(4,15),400(15)
T
I
lOp-cadelL IB11D1
~.!~mElg:
D2
L________
I
i
-,
IB21D2 I
+--+--+--~
I
13 IF IOC81F 11901
L-~
__
~
__
~J_-L--~
Aft er ex ecu t ion storage
contains F9 F8 F7 C6.
IOCd
tion 8 A4 -8 A7
Machine-Instruction Statements
63
Format:
S.I
Op-code
95
Machine instruction:
CLI
D1(Bl),I2
Special characters, lower case letters,
upper case letters, digits (System/360
collating sequence).
All 256 bit combinations are valid.
first operand=second operand
first operand~second operand
first operand>second operand
Assume register 15 contains (hexadecimal) 01F4, sto.rage location 5DC (hexadecimal) contains ~9, the displacement in
the first operand is 3E8 (hexadecimal), and
the immediate data is the letter A.
~~~~Elg:
Comparison proceeds from left to right.
All 256 bit combinations are valid.
00:
01:
10;
first operand=second operand
first operand(second operand
first operand)second operand
Assume register 11 contains (hexadecimal) 0320 storage location AFO-AF3
(hexadecimal) contains Dl D6 C8 D5., storage
location 708-70B (hexadecimal) contains D1
D6 C5 E8, the displacement in the first
operand is 7DO (hexadecimal), and that in
the second operand is 3E8 (hexadecimal).
~Kam~:
Source statement:
Op-code
Ctc
D1
D1
B1
L B1
B2
From this source statement the Basic Assembler produces the following object code:
I
-,
10 f- cod elL I B 1 I D 1 I B 21 D 2 I
~------+--+--+---+--+---~
I2
I D5
o
13 IB 17DOIB 13E81
-L~L
C LI
D2
2000(4,11),1000(11)
r------,---,-
Source statement:
Op-code
0
Special characters, lower case letters,
upper case letters, digits.
Function:
The eight-bit symbol of the
immediate-data operand (the second operand)
is compared to the contents of the first
operand field.
The result sets the condition code. The two bytes are treated as
eight-bit unsigned binary values. This
results in the following order of
comparison:
00:
01:
10:
All bits are treated alike as part of an
unsigned binary quantity. The order of
comparison is the System/360 collating
sequence:
__~~~__~
100 0 ( 15) , C' A'
From this source statement the Basic Assembler produces the following object code:
After having compared the third character
the condition code setting will be 10.
r-----,----.--~
I Op- code I I2 I B 1 I D1 ,
For-mat:
~------+--+--+-~
I 95
L_ _ _ _ --L_-L--L---J
Op-code
DE
Machine instruction:
ED
Dl(L,B1),D2(B2)
After execution the condition code setting
is 10.
Format:
SS
Op-code
D5
Machine instruction:
CLC
D1(L,B1) ,D2(~2)
Function:
The contents of the first
~~e~i~d-field are compared with those of
the second operand field.
The fields may
have a maximum length of 256 bytes. The
comparison is terminated as soon as inequality is encountere n •
64
SS
ICllF 13E81
Fu nction:
The forma t of the so urce fi eld
(the-second ~perand) is changed from packed
to zoned and is edited under con~rol of the
pattern field (t he first operand).
The
edited result replaces the pattern. The
two fields must not overlap.
Editing
in cl u des s i g nan d pu nc t u a t ion con t r 0 I and
the suppressing and protecting of leading
zeros.
It also facilitates programmed
blanking of all-zero fields.
Several numbers may be edited in one operation, and
numeric information may be combined with
alphabetic information. The length field
d p P lies tot her a t t ern
(t h (~ fir s top era n d) •
It may h d V e a max i mu m 0 f 256 by t es • The
pattern has unpacked format and may contain
any character. The source (the second
System/360 Modpl 20 Basic Assembler Language
0
o
operand} has packed format and must contain
valid decimal digit-and sign-codes.
Its
left half-byte must always contain one of
the digits 0-9.
The right half-byte may be
a digit or a sign.
Both operands are processed left to
right one character at a time.
Overlapping
pattern- and sourcp.-fields give unpredictable results.
A so-called s-trigger controls the Editoperation.
Depending on various conditions
during the operation the trigger is set
either to ON or OFF.
This setting determines whether a sonrce digit or a fill
character is inserted into the result
field.
As mentioned be~ore, the pattern may
contain any unpac:kp.d character.
However,
three Bit-combinations have special
significance:
(hexadecimal 20) = digit-select
character
0010 0010 (hexadecimal 22) = fieldseparator character
00100001 (hexadecimal 21) = significancestart character.
3.
o
The field-separator character is used if
several source fields are to be inserted
into one pattern.
By settin,] the S-trigger
to OFF it causes every source field to be
treated separately.
The field-separator
character is always replaced by the fill
character.
The significancp-start character sets
the S-trigger to ON.
Now every character
in the pattern is replaced by the respective digit of the source field or the fill
character.
The S-trigger is set to OFF (0):
1.
At the beginning of an Edit-operation.
2.
By the field-spparator character in the
pattern.
3.
By a positive sign
1111).
(lOll, 1101).
During the processing of the left halfbyte the sign of the right half-byte is
checked and set accordingly.
If a sign
coincides with a valid digit or with a
significance-start character in one position of the result field, tIle the sign
takes precedence and the S-trigger is set
to OFF (0).
The new S-trigger setting always takes
effect with the subsequent position.
The fill character, which under certain
conditions, is placed into the result
field, is always the first (left) character
of a pattern; it is retained in the pattern
(exception:
the digit-select character and
the significance-start character).
The S-trigger in OFF position causes:
1.
The digit-select character (hexadecimal
20) and/or the significance-start
character (hexadecimal 21) to be
replaced by a valid digit (1-9) from
the source field.
2.
The fill character to be stored in
rlace of a zero in the source field.
3.
The fill character to be stored in
place of any character in the pattern
(exception:
the digit select and the
significance start characters).
0010 0000
The digit-select character indicates a
position in the result field into which the
corresponding digit of the source field or
a fill character is to be inserted.
By a negative sign
The S-trigger in ON position causes:
1.
The digit-select and/or the
significance-start character to be
replaced by every digit (0- 9) from the
source field.
2.
A character in the pattern to remain
unchanged (exception:
the digitselect, field-separator, and
significance-start characters).
All digits in the result field receive
the zone 1111.
Condition Code:
Th~-condition-code is set to:
1.
(1010,
The s- trigger is set to ON
o
(1-9)
1100, 1110,
(1):
1.
By a valid digit
field.
2.
By the significance-start character in
the pattern.
QQ if the source field contains only
zeros.
The setting of the S-trigger
has no e ffeet •
2.
Ql if the source field is not zero and
the S-trigger is set to ON
tive result) •
of the source
3.
(1)
(Nega-
10 if the source field is not zero and
the S-trigger is set to OFF (0).
( Po sit i v ere suI t) .
Machine-Instruction statements
6S
If several fields are edited with one
pattern, then the condition code refers to
t he field being processed.
If th e p at tern
has a field-separator in the last place,
then the oondition code is set to zero.
Source statement:
Op-code D1 L
ED
The following symbols are used in the
example:
t!~ani!l51
b (hexadecimal 40)
( (hexadecimal 21 )
blank character
significance-start
character
field-separator
character
digi t-select character
,
,--,
Processing proceeds left to right one
character at a time as shown in Figure 24.
Condition code=10; result greater than
zero.
After execution location
3F4) contains bb2,574.26bbb.
100~-'012
(3E8-
If the contents of location 1200-1203
are 00 00 02 6D, the following results are
obtained:
~xamEl~:
(The numbers are given in decimal
notation with the hexadecimal equivalent in
parentheses.)
(before) Loc 1000-1012 (3E8-3F4)
bdd,dd(.ddbCR
(after) Loc 1000-1012 (3E8-3F4)
bbbbbb.26bCR
Assume that register 12 contains 1000
(03E8),
D1 is 0 (00),
D2 is 200 (C8),
storage location 1000-1012 (3E8-3F4) contains bdd, dd ( • ddbCR (unpacked) I
storage location 1200-1203 (4BO-4B3) contained 0257426C (packed).
Condition code=1; result less than zero.
0
1
In this case the significance-start
character in the pattern causes the decimal
point to be left unchanged.
The minus sign
,
I
T
I 0 p- co del LIB 1 I D1 I B2 I D2 I
I
t
I +---+-+--f
I DE
IC IC 1000lC IOC81
If the number to be edited is a negative
number, then the CR (hexadecimal C 3D9) is
commonly used in the last two bytes of the
pattern. Since the minus sign does not
reset the s-trigger, the CR will be left
unchanged in the pattern. The CR stems
from business application. It stands for
credit and indicates payments due.
r
o
B2
0(13,12) ,200(12)
I i i
d (hexadecimal 20)
D2
From this source statement the Basic Assembler produces the following object code:
~..Y.!!lbOl
(he xadeci mal 22)
B1
,
I Pa ttern I Digi t S-trigger Rule I Location 1000-10121
lI
I
b
0
leave 1 Ibdd,dd (.ddbCR
I
d
0
0
fill
I bbd, dd (. ddbCR
I
d
1
digit Ibb2,dd (.ddbCR2
2
I
,
1
leave Isame
I
d
digit I bb2, 5d (. ddbCR
5
1
I
d
7
1
digit Ibb2,57 (.ddbCR
I
~;,..,.;.a..
4
I
I
I
I
I
I
d
d
b
C
R
L
2
6+
1
1
0
0
0
0
I l-.l-."'I
a::~11
.::a.::a~
.... ..,
u. ... ~ .....
11J1.JL.,JI"'.U.U..uI...4\
lea ve
digit
digit
fill
fill
fill
I same
Ibb2,574.2dbCR
Ibb2,574.26bCR3
Isame
Ibb2,574.26bbR
Ibb2,574.26bbb
-L--
Figure 24.
Processing of Edit-Instruction
!!Ql~2:
1.
2.
3.
This character is saved as the fill character.
First non-zero digit sets S-trigger to one.
The plus sign in this byte sets the S-trigger to zero.
66
System/360 Model 20 Basic Assembler Language
o
o
does not reset the S-trigger so that the CR
symbol is also preserved.
Machine instruction:
OI
Dl(B1),I2
Format:
Function: The immediate data in the second
operand field and the contents of the
storage location addressed in the first
operand field are connected by the inclusive OR.
The result (logical sum) is
placed into the first operand field.
SI
Op- code
94
Machine instruction:
NI
Dl (Bl) ,I2
Function:
The immediate data in the second
operand-field and the contents of the
storage location a~dressed in the first
operand field are connected by the logical
AND.
The result (logical product) is
placed into the first operand field.
The connective AND is applied bit by
bit.
If there is a 1-bit Ln both operands,
then the 1-bit in the first operand remains
unchanged.
Otherwise the 1-bit in the
first operand will be changed to a O-bit.
Condition Code:
If all eight bits in the
result fiela-are zero, the condition code
is set to 00. Otherwise it is set to 01.
]~.2:.!!l.El~:
o
(The numbers are given in decimal
notation with the hexadecimal equivalent in
par ent heses) .
Assume tha t
reg is t e r S con t a ins 4 0 9 6 ( 1 00 0) ,
D1 is 1000 (3ES) ,
I2 is 2720 (AA), in binary nota tion:
1010 1010,
lo cat ion 5 0 96 (1 06 0, con t a ins 240 ( F 0), in
binary notation:
1111 0000.
The inclusive OR is applied
A O-bit in b~th operand fields
bit in the resul t field (first
zero.
Otherwise the resulting
always be one.
Condition Code:
If all bits are zero, then
the condition c~de is 00.
Otherwise the
code is set to 01.
]~.2:~ple:
(The numbers are given in decimal
notation with the hexadecimal equivalent in
parentheses) •
Assume that
register S contains 4096(1000),
Dl is 1000(3ES),
I2 is 2720 (AA), in binary nota tion :
1010 1010,
storage location 5096(1060) contains 240(
FO), in binary notation:
1111 1010.
Source statement:
Op-code
OI
Op-code
D1
Bl
B1 I2
1000(S),X'AA'
I
I
,----,
IOp-code1I21B11D1
I
I2
I
IJ~
I 96
______ IAAI8
____ 13E81
___ J
~
NI
D1
From thi s so urce st atem ent the Bas ic A ssembIer produces the following object code:
I
Source statement:
bit by bit.
will set the
operand) to
bit will
~
~
1000(S),X'J\A'
From this source statement the Basic Assembler produces the ~ollowing object code:
After execution storage location 5096(1060)
contains 250 (FA) or in binary notation:
1111 1010.
r--
Condition code is 01.
I
I
~
IOp-codelI2lB 1 lDl 1
~
I
I
I
~
IL-_____
94
IAAIS
13ESt
- L __
i--L---~
Form at:
After execution storage location 5096 (1060)
contains 160(AO) or in binary notation 1010
0000.
Condition code setting is 01.
o
Format:
SI
Op-code
96
SI
Op-code
91
Machine instruction:
TM
D1 (Bl) ,I2
Function:
The bit combination in the first
operana-field is compared with the mask in
the I2-field.
The result of the comparison
sets the condition code.
The eight bits of the ma~k correspond
bit by bit to the eight bits defined by the
Machine-Instruction Statements
67
first operand.
A comparison with a bit in
the first operand is performed ohly if the
corresponding bit in the mask contains a
"1". If the bit in the mask is "0", the
corresponding bit in the first operand
field will not be tested.
00:
all bits tested were zero (also, if
all bits in the mask were zero, i.e.,
no test) •
01:
some (not all) of the bits tested were
one.
11: all bits tested were one.
fQnaitiQB_Cod~:
No change.
~!.ample:
(The numbers are given in decimal
notation with the hexadecimal equivalent in
parentheses).
0
Assume that
register 10 cont ains 450 (01 C2) ,
Dl is 140 (080) ,
The halt number 590 (24E) is shown on the
E-S-T-R registers on the console as 024E.
Source statement:
Example:
(The numbers are given in decimal
notation with the hexadecimal equivalent in
pa ren these s) •
Op-code
HPR
Assume tha t
register 8 contains 2000 (07DO) ,
Dl is 650 (28A) ,
I2 is 217(D9) or in binary notation:
1101 1001,
storage location 2650(A5A) contains 204(CC)
or in binary notation:
1100 1100.
op -
co de
TM
D1 B1
140 (10) ,0
From this source statement the Basic Assembler produces the following object code:
r
.--'--T---'
lOp - co del I2 I B 1 I D1 I
I
•
I
I
I
I 99
100lA I08CI
L---____
Source statement:
Dl Bl I2
~_i_
_ _J
I 2
650 (8) ,X'D9'
From this source statement the Basic Assembler produces the +ollowing object code:
r
i
j
For mat:
ss
Op-code
DC
Machine instruction:
TR
Dl(L,Bl),D2(B2)
•
o
IOp-codelI2l B llDl 1
l-------+--+-+_~
L______
Iy'nctiQ.!l:
This operation allows you to
replace the values of one operand field by
the corresponding values of a table.
Every
byte in the first operand field is used to
look up a value in a table.
The binary
value of a byte is added to the starting
address (given by the B2/D2 field) of the
table.
The 3um is the place of the tablevalue wanted.
This table-value replaces
the byte in the first operand used to locate the table-value.
I D9 I 8 I 28 A,
I 91
~~~
__
~
J
Condition code is 01.
Format:
SI
Op-code
99
Machine instruction:
HPR
D1(B1);'0
Function:
This instruction is used to hal t
All input/output operations are
continued to complption.
th;;-CPU:-
Execution of the program may be resumed
with the next sequpntial instruction by
pressing the start key on the cpu.
This instruction uses the SI-Format in
which the I2 field is ignored.
The direct
or effective address derived from the 81-Dl
fields may be used to identify the Halt and
Proceed instruction.
68
Processing proceeds from left to right
until the end of the first operand is
rea c he d •
The max i mU in 1 eng t h may be 25 6 •
The table must contain as many bytes as
indicated by the highest binary value used
for !iearching.
~xam£lg:
(The numbers are given in decimal
notation with the hexadecimal equivalent in
parentheses) •
Assume that
register 10 contains 0 (0000) ,
register 12 cont ains 0(0000),
Dl is 1000 (3ES),
System/360 Model 20 Basic Assembler Language
o
o
D2 is 2000(7DO),
storage location 1000-1012(3Z8-3F4) contains the EBCDIC characters 542156037835
and location 2000-2009 (7DO-7D9) contains
the EBCDIC charactprs 6MBOIb3-2 where
b=blank.
llach,ine_E orma!§_.Q.b_l.n.§t r uc!i 0]}2_ fo ~_£!!;:~.nc h
Q.E era t l.Q.!L§
Branching instructions can be in the RR or
the RX format.
Source statement:
Op-code D1
L B1
D2
B2
,
i
i
I 0 p- co del R 1
TR
1000(12,10},2000(12)
From this source statement the Basic Assembler produces the following object code:
r
i i i
i
-r--,
IOp-codelL IB1JD1 IB21D2 I
1----+ I I
,
l---t
I DC
10BIA 13E81C 17DOI
After execution storage location 1000-1012
(3E8-3F4) contains the EBCDIC characters
bIBMb360-20b where b=blank.
BRANCHING
o
Normally the CPU processes instructions in
the order of their location in main
storage.
Branching operations allow a
departure from this sequence.
The machine
can make logical d~cisions on the basis of
certain conditions.
For example:
•
The program continues in its normal
sequence.
•
The program branches to a subroutine.
•
Part of the progra m is repe ate d (loop).
The branch addr~ss may be obtained from
one of the general registers or it may be
specified in an instruction.
The branch
address is indepen~ent of the updated
instruction addres~.
Branching is determined either by the
condition code in the Program status Word
(PSW) or by the cont~nts of the general
registers used in the operations.
During a branching operation the rightmost half of the P~W, the updated instruction address, may be stored before the
instruction addres~ is replaced by the
branch address.
The stored information may
be used to link thp new instruction
sequence with the preceding sequence.
o
The condition code set by certain
instructions and the branch instruction are
used to make logical decisions within a
program.
The branch operation itself does
not change the condition code.
i
'
IR 2
.l.--_J
I
o
7
11
15
The Rl field may specify a general register
into which the updated instruction address
is to be stored as link information, or may
contain a mask which is employed to identify the bit values of the condition code.
In the latter case it is referred to as the
M1 field.
The R2 field specifies the general
register that contains the branch address.
i
i i i
lOp-code
I R1 100001
B2
D2
L -_ _ _ ----L--__
_ _ ..l.------1..-_ _ _ _ _ _ _ _ _ J
~
o
7
11
15
19 20
31
The R1 field may specify a general register
into which the updated instruction address
is to be stored as link information, or may
contain a mask (then called M1 field) that
is employed to identify the bit values of
the condition code.
The direct or effective address derived
from the B2-D2 fields is the branch
addr ess.
Error conditions which may occur during a
branch operation are:
1.
Operation code invalid.
2.
Addressing error.
a.
b.
c.
d•
An instruction address or a branch
address refers to the protected
first 144 bytes of main storage.
An instruction addr ess or a branch
address is outside available
storage.
The R1 field of a Branch and store
instruction contains binary values
zero through seven, or the R2 field
of an RR format branch instruction
contains binary values one through
seven.
An instruction, pa r t i s located in
the last (highest) two main storage
positions.
Machine-Instruclion statements
69
3.
Specification
a.
b.
4.
Source statement:
Op-code M1 R2
~rror.
The low-order bit of an instru ction
address is one, i. e. , no half word
boundary.
Bits 12 through 15 of an RX format
instruction are not all zero.
BCR
o
X'6',9
Basic Assembler produced object code:
I
"
IOp-codel' l'11
IR21
I
I
I ~
107
1011019 I
CPU pari ty error.
INSTRUCTIONS FOR BPANCH OPERATIONS
J
The branch instructions, their operation
codes, formats, ann mnemonics are shown the
following table:
A branch to the main storage location 22B
will take place.
,
r
I
I Name
lI
IBranch on Condition (BCR)
IBranch on Condition (BC)
IBranch ~ Store (BlI,SR)
IBranch ~ Store (BAS)
Op- I
I Format I Code I
+----+---~
I
I
I
I
I
RR
RX
RR
RX
I
I
I
I
I
07
47
aD
4D
I
I
I
I
I
- - ' - - -_ _ _. L -
L
Format:
RR
Op-code
07
Machine instruction:
BCR
M1,R2
Format RX
47
Op-code
Machine instruction:
BC
M1,D2(0,B2)
Function: The condition code is tested
a g aI ns t- the mas k M1 ( f 0 u r bits).
If the
condition is met, a branch occurs to the
address in main storage specified by B2/D2.
Otherwise the next sequential instruction
is executed.
For each ~f the four condition code settings there is a corresponding bit of the
mask as shown below:
Function:
The condition code is tested
agains~the four bits in the mask M1.
If
the con d i t ion i ? met ,g ,l,u;; a Q hll:l. Q hi k Il .. ~ to-:'"
the address i-wllll1r~~J~~tQ~Q&1.~ ~"'Ji6iL'j.~~ ~,
it~.
of her wise, the next sequential
!'nstruction is executed.
There is a corresponding bit in the mask
for each of the four possible condition
code settings as shown below:
07
1
1
L
M1
R2
-,-,----r--+------J
1001011101'11
The condition for a branch is met if the
mask bit correspon~ing to the current condition code settin~ is a 1-bit. It is
possible to connect several conditions by
specifying a 1-bit in the corresponding
mask-bit positions.
An unconditional
branch occurs if all four bits in the mask
are 1-bits. The branch instruction is
ignored if all four bits in the mask are
a-bits or if R2 is zero.
47
L--
I"
M1
I
0000
IB2
--,-- +1_ _ _ _ _--1._ _" ' - - _
o
D2
I 00 101 1 101 11 I
The condition for a branch is met if the
corresponding condition code exists for at
least one defined bit in the mask.
It is possible to connect several cdnditions by defining several bits in the mask
accordingly. An unconditional branch
occurs if all four bits in t he mask are
one. The branch instruction is ignored if
all four bits in the mask are zero.
]~A~~~:
Assume that
D2 is 875 decimal (36B hexadecimal),
Register 11 contains 0000,
Co n d it ion co d e i nth e P S W: a a •
Source statement:
Op-code
Assume r~gister 9 contains decimal 555 (hexadecimal 22B), the condition
code in the PSW is 01, and the mask is
given as hexadecimal 6.
M1
D2
a
B2
~~dm~:
70
BC
X'O',875(0,11)
Basi c Ass embler pr oduced ob ject code:
system/360 Model 20 Dasic Assembler Language
o
o
i
r----~
After execution register 10 contains 026D
and a branch is taken to storage location
362 (hexadecimal).
i~--'
I Op- co de 1M 1 10 1B21 D2 I
r
I -+--+--+---~
I 47
18 10 IB 116BI
L - -_ _ _ _.1._-L-
I
J
A branch to main storage location 36B (hexadecimal nota tion) ta kes place (branch on
egual) .
Form at:
Format:
RR
Op-code
OD
Machine instructions:
BASR
R1,R2
Function:
A branch is taken to the address
specified by the contents of the register
in the R2-field. Next, the rightmost 16
bits of the PSW (t~e address of the next
seguential instruction before the branch is
taken) are loaded into the general register
specified in the R1 field.
This is to link
the new instruction seguence with the preceding seguence. Tf R2 contains all zeros,
then only the next seguential instruction
is loaded into the register specified by
the R1 field and no branching takes places.
o
Ex~l~:
The contents of the register 10 are
arbi trary.
Assume that register 12 contains hexadecimal 0362 (decimal ,:)66),
PSW 16-31 contains hexadecimal 026D {decimal 621}.
BA SR
10, 12
i
I
4D
Functign: The rightmost 16 bits of the
PSW, the updated instruction address, are
stored as link information in the general
register specified by R1.
Next, the
address specified by B2/D2 is stored as an
instruction address in the PSW.
This
amounts to a branch to the address specified by B2/D2.
~x a.m.2.1.g:
The contents of register 10 are arbitrary.
Assume that register 11 contains hexadecimal 044C,
psw 16-31 contains 036C,
D2 is hexadecimal 12C (decimal 300).
Source statement:
Op-code R1
BAS
D2 0 B2
10,300(0,11}
Basic Assembler produced object code:
j
Basic Assembler produced object code
r
Op-code
Machine instruction:
BAS
R1,D2{0,B2}
Source statement:
Op- code R1 R2
RX
,
I~---T--T---'
IOp-codeIR1IX=0 IB21D2 I
I
I I
I
I
~
I 4D
IA I 0
I B I 12C I
L______
~I_-.l..--
__
~_~
__ J
IOp-codelR 11R21
1-------+-_+_~
I OD
L
I A IC I
After execution register 10 contains
hexadecimal 036C and a branch to storage
location hexadecimal 578 is taken.
o
Machine-Instruction Statements
71
o
The Basic Assembler program is available in
both card and tape versions.
The card versions are used if only card
I/O devices are included in the system configuration.
The tape versions can be used
if an IBM 2415 Magnetic Tape Unit Model 1
or 4 is available. in addition to the card
I/O units.
The card versions require two passes. During the first pass the Basic Assembler program (phase 1) produces pass information
required during pass 2.
This information
is punched into columns 1-24 of the source
cards or into the corres[onding columns of
duplicated source cards. In addition, a
listing of all source statements is supplied if a printer is attached to the system and if an appropriate entry has been
made in the control card.
During the second pas3, the source cards
containing the pass information are processed by the Basic Assembler program
(phases 2 and 3). Then the symbol table
generated in storage is punched into cards,
if desired. At thp end of the assembly the
followin] output is obtained:
•
a Clear-storage card and an AbsoluteProgram Loader card for loading of the
object program.
•
TXT cards containing the source statements, translated into machine language.
•
ESD and RLD cards containing information
for program lin~ing and relocation.
•
the punching of all cards is suppressed.
The only output produced is a listing of
all statements in Basic Assembler language.
Most of the erroneous statements are identified by diagnostic messages.
For the card versions of the Basic Assembler program, a reassembly feature is pro~
vided that permits the reassembly of a partially or completely assembled program in
less time than would be required by the
repetition of the total assembly.
For a
reassembly, at least pass 1, phase 1, and
pass 2, phase 2 of the Basic Assembler program (i.e., the punching and/or printing of
the symbol table) must be completed.
A reassembly can be executed to correct
erroneous statements and/or to compensate
for a symbol-table overflow, which occurs
if the number of symbols specified in the
source program exceeds the limit in regard
to the storage capacity used. Refer also
to the sections ~Y~QQl~ and ~!es2iQn§.
When a reassembly is to be performed,
the same amount of main storage must be
specified to the Basic Assembler program as
for the original assembly.
The symbol-table overflow can be eliminated by:
•
making use of relative addressing,
described in the section referenced
above, thereby reducing the number of
symbols in the ~rogram;
•
performing an additional assembly run,
as described in a subsequent section; or
•
subdividing the program into segments
and performing a separate assembly for
each segm en t.
A program listing, as shown in Figure
34.
The first three items above are
referred to as the object deck.
liQ1~:
In order to asspmble a source program
written in Basic Assembler language, the
source deck must be supplemented by a control (CTL) card, specifying the system configuration used for the assembly and the
desired output.
The CTL card as well as
the card handling required during an assembly is described in the SRL publication 1]~
A program that is to be reassembled can
be changed in any manner:. New symbols can
be added, existing symbols can be redefined
(i f the rei s r a :> min the' s y mbo I tab Ie) ,
existing symbols can be deleted except from
the symbol table, and new statements can be
added to the program.
A statement that is
to be changed must be repunched, leaving
columns 1 through 24 blank.
~Y2iemL36Q_tlQQel_lQL_~~!Q_E~Qg!~~~ing_~~£=
£QrtL_Qasi~_!§2~~~1~!_J~~!g_yg!~iQn~LL
Q£~!£iing_~!Q~edy!~§,
Form C26-3802.
The control car~ can also be used to
specify a diagnostic run.
In this case,
72
.AQQiiiQ.!!.~1_!~§'~!!!'Q1Y_.R~D..
This increasps
the number of symhols permitted in regard
to the storage capacity used during an
assembly.
System/360 Modpl 20 Basic Assembler Language
o
o
During pass 2 o~ the original assembly,
the portion of the object deck already
assembled is completed.
On completion of
pass 2, a programmed halt occurs to enable
the user to remove this rortion of the
object deck.
it can be used for the assembly of any
number of source programs during the same
run. Each source program is read in after
the object deck for the preceding program
has been punched.
The subsequent source
decks must be separated by blank cards.
When the system is restarted after an
overflow, the Basic Assembler generates a
new control card that contains the USING
table and the valu~ of the location counter
at the time the overflow occurred.
After
generation of this control card, the
remaining portion of the source deck is
d up lica ted.
For the assembly of a source program
with the tape version of the Basic Assembler program, a control card similar to the
control card of the card version, must be
crea ted.
The con trol ca rd a nd the card
handling requir Ed during an assembly run
are described in the SRL publication l~~
The duplicated source cards contain the
following:
~~1~~Ll~Q~Qdel_1QL_Ca£Q~£Qg££mming~Q£=
~or~~_]asi~_As~~ill~le£_J1~~~_l~£§iQn§lL
.Q£gL~.!:i}}SLProc~Q~£~~, FOL"m C24-9011.
~~~~_lnfQ£~~tiQB_J£Q1~mB~_j~1~1:
For
example, a diagnostic message or the punch
12-11-0-7-8, the operation code, and one or
more pointers desi0nating the location of
storage addresses of related symbols.
~Q~£~~_~1~1~ill~nt_~Ql~mn~_I2~1l1:
identification sequence fielc1
to 80) is not duplicated.
o
The
(columns 73
The new control card and the duplicated
source cards are the input for the first
(or only) additioni'll assembly run.
If
another symbol-table overflow occurs, this
first additional assembly run is considered
to be the original assembly run and another
additional assembly run can be performed.
This again increases, at the rate pera new assembly, the number of
symbols that can bp used in the program.
The input decks of the tape versions of
the Basic Assembler consist of (1) the
Basic Assembler pre-phase and (2) the five
Basic Assembler phase decks. The pre-phase
is used to read and evaluate the control
card and to write the Basic Assembler program onto tape.
The first four Basic
Assembler phases are used to read the cards
containing the source program, to check the
statement formats, to translate the program
into machine language, to print the program
listings, and to punch the object program
deck.
The fifth Basic Assembler phase is used
to deal with a possible symbol-table overflow.
at herw is e it is not used.
mitte~"for
The tape versions of the Basic Assembler
program use tape as an intermediate storage
medium, which reduces card handling time.
The Ba~jc Assembler program and the first
source pro'Jram (both contained in punched
cards) are read into the system during the
initial run.
Intermediate information is
not punched in to ca rds (a s wi th the pa ss
informdtion of the card version) but is
written on tape, from which it can be
ret r i eve d b Y the pro g ram whell r (~(l u ire d •
Once the appropriate tdpe version of the
Basic Assembler is written on a work tape,
In case of a symbol-table overflow, the
tape versions of the Basic Assembler program automatically initiate a routine to
compensate f~r the overflow. The punching
of the object program is discontinued at
t he po int where the overflow occurs.
Phase
5 0 f the pro g ram c au s es the g en era t ion 0 f
ddditional intermediate information, which
is required by the Basic Assembler program
to initiate another assembly run.
The assembly is then repeated, from the beginning, to process the subsequent part of the
source program and punch the remaining
ob ject ca rds.
The printed output
versions of the Bdsic
d s the p r i n t f~c1 0 u t put
versions of the Basic
produced by the tape
Assembler is the same
r ron u c (~d b Y ttl f~ car d
Assembler.
o
Thp
Ba~ic
A~i!;(~mblp[
Program
73
o
Errors in the syntax of source statements
and other violations of programming conventions are marked by diagnostic messages in
the program listina to the left of the statements involved.
These diagnostic messages, produced by both versions of the
'Basic Assembler program, are subdivided
into two groups:
1.
Warning messages.
2.
Error messages.
Warning messages indicate violations of
programming rules that do not affect execution of the assembly.
The pertinent message codes are D, L, R, T, and W.
Error messages identify incorrect statements that prevent the Basic Assembler program from completing an assembly.
The pertinent message codes are C, M, N, 0, S, and
U.
A summary of all diagnostic messages is
provided in Appendix D.
Two routines for the loading of object programs are available:
(1) the AbsoluteProgram Loader and (2) the RelocatableProgram Loader.
The Absolute-program Loade~ is punched
into a single card by the Basic Assembler
program when the object deck is punched.
Any loader control cards that may have been
produced by the Basic Assembler (ESD and
RLD) are ignored by the Absolute-Program
Loader.
If the program is to be relocated on
loading, the operator must replace the
Absolute-Program Loader card with the deck
containing the Relocatable-Program Loader.
The loading routines are described in
detail in the SRL publication, IBM_~Y2i~illL
360 Mo~~l-1Q_~~£Q_R£Qg£~~mi~g_~~ortL
~asi£_gtility_g£Qg£~ill2L_Funfti2n~anQ
Q£erati~g Pr~£~~~res, Form C26-3604.
o
o
74
System/360 Modpl 20 Basic Assembler Language
o
This section lists the storage and time
requirements for the assembly of source
programs and the execution of object
programs.
If an IBM Model 20 Submodel 3 or 4 is
used, the time requirements shown in Figure
26 will increase by approximately 50lf,.
For
an IBM Model 20 Submodel 5 the time
requirements will decrease by approximately
10r,.
MAIN STORAGE REQUIREMENTS
!ssemblLQ!. Source R!:Q.9..£~1!l'§.: Figure 25
shows the main storage requirements for the
assembly of source programs containing the
maximum number of symbols.
r-
------~----------------------,
I
I Storage Capacity
lI
4096
I
I
I
8192
12288
16384
Number of Symbols
in Sour ce Program
I
,
1
165
847
1530
2213
The time requirements depend on the distribution of symbols and on the type of
cards (i.e., original or duplicated source
card~
into which the fass information is
punched.
The total times shown in Figure 26 do
not include card handling time or the time
required for loading the two Basic Assembler decks (approximately 10 to 15
seconds) .
I
I
1
11/0 ConfigurationlTime (in Minutes)
o
Figure 25.
Main Storage Requirements for
Assembly
Execution_Qf Object_Rf.Q~l£~ms: The
Absolute-Program Loader re1uires 160 bytes
of main storage (including the load/read
area). The Relocatable-Program Loader
requires approximately 500 bytes. The
remaining portion of main storage is available for object program execution.
liQ!g:
If the source program contains
external symbols, additional storage is
required for the External Symbol Identification table.
1
~
I
12560 MFCM
IPass 1:
4
to
7
and
IPass 2:
_i--1Q ___ 2
I
12203 Printer
ITOTAL:
8 to 12
I
I
12501 Card Reader IPass 1:
4 to
6
12520 Card Punch
I Pass 2:
2 to
3
11403 Printer
ITOTAL:
-6-to---g
L---______________
____________________
~
Figure 26.
~
I
1
I
~
1
1
1
~
Summary of Time Requirements
for Assembly, Card Version
Execution of_Q~~~t_~£QE£Em.§: The time
required for the execution of an object
program depends on the length of the program and on the typ es 0 f op erat ions
employed.
TIME REQUIREMENTS -- CARD VERSION
TIME REQUIREMENTS -- TAPE VERSION
!~~g1)lQ1Y_Qf-1QQf.£g_R£Qgf.~m~:
Figure 26
shows the times required to assemble a
source program consisting of 600 cards,
including 165 symbols, on two basic input/
output configurations. The available main
storage is 4096 bytes. The times given
apply to IBM Model 20, Submodel 2.
o
The time required for the assembly of
source programs depends on the distribution
of symbols and on the model of the 2415
used during the assembly.
The average time
requirement for a source program comprising
600 cards and 165 symbols is from 6.2 to 8
minutes, when using a storage capacity of
4096 bytes.
Performance Data
75
o
This section illustrates the writing of a
program in Basic Assembler language, from
the first approach to th~ specified problem, through the subsequent steps of writing the statements and executing the assembly and the object program, and concludes
with the result rrinted as final output.
INITIALIZING
ACTION
CALC
SET UP
COUNT
The sample problem used is as follows.
In
1627, an Indian sold Manhattan Island for
twenty-four dollars.
Determine the resulting capital in 196~ if this money had been
immediately transfp.rred to a bank at an
interest of 4~ per annum. The interest
earned each year should be rounded to the
nea rest cen t.
INITIAL
CAPITALACCU AREA
LOOP
ACCUWORK
INTEREST =
CAPITAL
: RATE/H)O
THE FLOWCHART
To establish a gui~e line that defines the
steps to be taken towards a solution, a
flowchart can be dpveloped, as shown in
Figure 27.
()
ACCU =
WORK + OUT
IN I TIA LI ZI NG THE pnOG RAM (ST MT 1-STMT 3)
COUNT =
COUNT - 1
According to the flowchart, initializing
the program is the first ste~.
This means
(1) incrementing the loca tion co un ter to a
tentative loading point and (2) loading and
assigning a base register.
NO
These first instructions can now be
entered on an In~ codiny form, as shown in
Figure 28. The opprand of the START
instruction (STMT1) causes the location
counter setting to be incremQnte~ to 340
(hexadecimal 154). The next statement
causes the address 342 (hexadecimal 156) to
be loaded i n t 0 register 1 3 (S T MT 2 ) and the
USING statement assigns to register 13 the
attributes of a base register (STMT3).
Figure 27.
76
5ystem/360 Modp.1 20 Basic Assembler Language
Sample Program Flowchart
o
o
IBM System 360 Assembler
Short Coding Form
IBM
INDl~N
PROGRAM
PROSLE.M
X28-bSOo
Pnnl,,·c.I an U.I\. A.
PAGE
PUNCHING INSTRUCTIONS
CARD FORM /I
GRAPHIC
I10/10/65
PROGRAMMER
DATE
G. f"lSH E.R
OF
PUNCH
STATEMENT
Operation
Name
25
II
32
30
NOA
ST ART
--
- f-f--
--- ---
-
Operand
36
61\ S R
US I N'G
- f--
.34- ~
1 3
..
IdentificationSequence
Comments
45
38
50
60
55
I~
71
65
LO AD SA S£ RE G •
AS S1 GN SA SE. RE G.
""I" 1 3
80
-
--
-'-"-
_c---
Figure 28.
o
,
73
S T MT
S T Hi 2ST MT3
-
"-
--,--v
-
.....
-
....... ...... 1..--"
---
Initialization Routine
DATA CONSTANTS AND WORK AREAS
(STMT4-STMT15)
7.
A print (PRT; 17 bytes) large enough to
accommodate the mask (STMT6).
Next, we must introduce the data and set up
the required work areas.
knowing that the
program must execute arithmetic calculations, including spveral division operations, it appears to be the most convenient
approach to define our data in packed decimal form, as required for decimal arithmetic.
In addi tion, we know that DP instru ctions require the nividend to have a certain number of leaning zeros.
Therefore,
we define the work areas as a string of
hexadecimal zeros.
8.
An area (ACCU; 7 by t es) to accumul ate
the computed interest and the resulting
new capital (STMT8).
9.
A work area for execution of the division and r~unding (STMT7), with a
length of 9 bytes, which is equal to
the length ~f the divisor plus the
length of the dividend.
Figure 29 sh~ws how these constants and
areas are defined.
The following data constants and work
areas are required:
1.
o
The capital (24.000) allowing for an
additional decimal position, which can
be used for rounding to the nearest
cent (STMT9).
2.
The divisor
4% interest
(2") for calculation of the
(S'rMT10).
3.
The parameter (S) for rounding the last
decimal position (STMT11).
4.
The count (33~ to control the number
of calculations executed (STMT12) •
S.
The parameter (1)
co u n t ( S TM T 1 3) •
6.
The mask required when transforming the
result into unpacked format for printing and for insertion of the necessary
commas and the decimal point (STMT14;
STMT1S).
to decrement the
The BC statement (STMT4), in Figure 26 is
rejuired during execution of the object
program so that it can branch around the
constants.
Register 10 is specified by R10 in the
operand of a pr~gram statement (STMTS)
which facilitates the reading of the statements.
The constant ROUN is used to round.
The constant MASK provides a basis for
the ED (Edi~ instruction that transforms
data to be printed into unpacked format and
inserts the necessary decimal signs.
Information to be printed is edited into a
field that contains the mask.
The mask
causes leading zeros to be suppressed by
its first character (hexadecimal 40).
Each
decimal digit printed must be represented
by the select character, 20, 21, or 22 in
the mask -- whichever is applicable.
Commas and decimal points ar~ specified by the
characters 6B and 4B, respectively, placed
in the position where they should appear in
the printed data.
Writing a Program in Basic Assembler Language
77
o
STATEMENT
Name
25
Operation
30
32
Operand
36
45
15
18 C-
I:QU
11~
DS
AC
DC.
DC.
DC
CL 17
XL rq '0
XL 7 I o 'I
X I 2.11f 0¢
DC
CP TL
RA
Tf
X' 10
1<0 UN
elN T
DC
IX
DC
1-1
J)E C,R
DIC
1)C
MA SK
25 C
J)C
Sr "'T Is
oC I
73
•
Sr It\rtf
Sr JIlTS
Sr It1r6
sir /11117
$T MTS
80
SIT If1Tlq
15-(1-1
f
1
'I'
.......
_o.-t.,...-
1.iiJ
ST Mr 1.i
Sr MT 1..1
I
I
......
71
~r MT
I
.sIr AfT i3
2.: I~ 2. 10~ 18'1
'-- .....
'"
Sr AfT 1.4
$r "T i5
-I.-
"'- ..... [.....-
Introduction of Data and Work Areas
Before a mask c~n be set up, the maximum
size of the expect~d result must be determin e d • In 0 u r pro q ram ex a,m pIe, we h a v e
analyzed the result and decided to reserve
twelve decimal positions. This means, that
the latgest result expected is of the
format:
X,XXX,XXX,XXX.XX
If the result should be shorter, zeros
are replaced by blanks (hexadecimal 40 in,
t he first posi tion of the mask) .
The mask may then be determined as follows:
x , X X X
I I I I I
PA 5S
181'1
¢~ ¢I¢ I¢¢ I¢ ¢
33 g
65
60
"
"'- .......
Figure 29.
I
55
t I
X I II-Ias 210 16 8l 1-0 2. 1-(62 10~6 18z las
Ix I 21~ tl'~ 21 '/fe 2 I~ 2. 1<6 f".
H
:DC
V~
I
50
• c ALc'
R jim
PP.. T
"10 I<.K
cu
IdentificationSequence
Comments
38
,
X X X , X X X . X X
I II I I I I I I I
40 20 68 20 20 20 68 20 20 20 68 20 20 21 48 20 20
I
The digit prece~ing the decimal point is
specified as 21. ~his code is the initial
start character an~ causes zero suppression
to be disregarded ~rom here on. This
allows printing of the decimal point, in
case the result is !ess than 1.
o C
ACCU -, 4
ACCU
Figure 30.
Contents of ACCU After Execution of STMT17
The next step is to br:ing the conte nts
of ACCU (accumu ~ated capital) into-the work
area for computation of the interest
(STMT18). This is the first of the
instructions to be executed 338 times and,
therefore, becomes the entry point for the
program loop (see flow-chart).
The contents of the area WORK are then divided by
25 (STMT19). On execution of the division,
the quotient, including leading zeros, is
placed into the leftmost portion of the
dividend field and the remainder into the
r:ightmost portion of the dividend field.
Thus, the first calculation is executed as
shown in Figure 31.
0
PROGRAM ROUTINE (STMT16-STMT24)
Now we can concentrate on the program routine itself. According to the flow-chart,
we first set up thp count.
~s shown in
Figure 32 (STMT16), this is done by loading
reg i s t e r 1 0 wit h the co n s tan t 3 3 B ( 1 9 6 5 1627). This statement must be nam(~d CALC
to link it with thp branch instruction preceding the DC statpments. The initial
capital of 24.000 is moved into the ACCU
area used to accumuldt~ the intermediate
interest amounts and incremented capital
(STMT17). Thus, Arcu now has the conb.~nts
shown in Figure 30.
78
L
O 0 1 0 0
to
ORK
loaded from ACCU
0 I 0 0 I 0
0 1 0 0
r
2 4
WORK ofter execution of the division:
quotient
,~
o
0
1
0
C
I
ORK+2
remainder
_ _ _ _ _ _ _ _ _ _ _ _~A~_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _~,~
1001001000010019610CI0010CI
Figur:e 31.
System/360 Modpl 20 Basic; Assembler Ldnguage
Execution of the
tion St.ep
Fi~st
Calcula-
o
o
-
r--..-
CA \..C
LH
LO o P
IMVC
IMVC
AC CU -t,+ ( 3 )
Wo RI< +2. 'C 7 I)
DP
.V'JO
AC
AC
A.C
R1 10 I., CNT
RK , RATE
CU ,W OR KI( 17 )
CU • R OU N
CU + 6 , X I IfJ C'
R1 I~ I, 1>E CR
IA P
IAlp
IMVI
Is H
[Bc
2. , LO OP
,-"_v-'---
Figure 32.
CP TL
'J. A C' CU
I'J
LO AD
LO AD
LO AD
c.u
RK
IN TE RiE ST
,I NCR ElM ENT CA PI TAL
DIE: C[ MAt..
L IA ST
IR 0 UNO
RE: IS T ORE:
I)) E clR EIA 51E
rrE ST FOR
DI GI.T
CO U NT
ST MT 23
CO MP LE TI. ON 15 TM T2 4
-
result is greater than or equal to zero.
If the result is greater than zero, the
program branches to LOOP and re-executes
the program segment through the condition
code test (STMT24).
Otherwise, the print
routine (Figure 33) is initiated.
OUTPUT
(STMT25-STMT35)
STMT25 causes the mask to be moved into the
pr in t area.
(The Ie ng th of eac h operand
need not be explicitly stated, because it
is implied).
The ED instruction (STMT26)
causes the editing of the calculated result
by moving it into the print area, on top of
the mask already contained in this field.
The first 4-bit hexadecimal digit of ACCU
is placed into the leftmost byte containinJ
a digit select character 20.
Although the
addressed byte is PRT, the first byte used
to store the result is PRT+1.
The counter is then decreased by 1
(STMT23) •
This instruction also sets the
condition code, which indicates whether the
~I
NE
IMVIc.
ED
XIO
Be
IBC
T1
OB
lrI O'B
H ALl'
PE
o
Rf\
IHP R
Is c.
HPR
~C
I~N :1)
Ip Ri .. 1M A.IS K
Ip RT , A Ie c u
P R T ( Ix ' 'I; , ) ,1117
11, PE RR
It I, FJ. N£.
*1 .. X • ,+1'
PiE
RR • Ix
I
'It l '
x' Is 9 1.9 ' .. IJ
115 I, H ALT
X • 11 l ' I. CI
115 1'1 F IN£.
IN i» A
~-,...
--,
PR INT IA RE. IA
UL T
Ip R lINT
RE Is IJLT
PR IrlN TIE R NO T OK
TE Is T
PR I.N TE. IR WO RK NG
TIE: Is T
OF I/O
ENl>
ITE ST
ER RO R
PR IN rE.
T£ Is T
~Ir 5 P LAY 19 ~ 9
L 0 elK IR Eis IT ".RT
DI. Is P LI\'( 1 1 1
RE PE. ".T Ip R .rlN IT
is TM T 215
S~ MT 2.6
S TM T2 17
S TM IT 12.IS
ST NT 2.19
M,I\ IslK
E])
T
iI
T0
RE IS
:p.
-
Figure 33.
--.
Calculation Routine
Fractions of cents that are equal to or
greater than one-half are rounded to the
next highest value by adding the constant
0.005 to the contents of ACCU (STMT21).
Since the third decimal position contains a
zero, the result is not changed.
(On the
next iteration, however, the computed interest and capital equals 25.958, which
results in a rounded total of 25.963.)
The
original contents of the last byte of ACCO
(Oe) are then restored in preparation for
the next i tera tion (STMT22).
,
ST MT 119
l~ TM T 2 JI.
15 TM T21
S TM T 2 2
---
,-
16
SrI" MT 17
IS TM T 1 8
CO MIP UTE
The contents of the leftmost seven bytes
of the area WORK (0.960, after the first
iteration) are added to the co-ntents of
ACCU (ST~T20).
Accordingly, ACCU now contains 24.960, the capital available after
one year of deposit.
o
S:r MT
C 0 UNT
AC
WO
'--
-
S ITN TI3 IJ1
ITM IT 13 1.
5 ITM T32.
'S
S TM T 3 3
_5 trM TL3
I ....
s T.N TI3 Is
sir 'MT 136
-
Print Routine
W~iting
d
Program in Basic Assembler Language
79
Finally, the XIO instruction (STMT27)
causes the printing of the result. The
first operand specifies the area (PRT) in
which the data to be printed is stored.
The code in parentheses refers to a 1403
printer (U=4), and specifies printing as
the function to be performed (F=O). The
second operand gives the number of characters (bytes) to be printed.
At this stage,
the program could be terminated. However,
we would risk a disregard of our print
instruction if, for instance, the printer
were out of servic p , or busy with a rreviously issued I/O instruction. In addition, we should delay processing of the HPR
instruction until the previous I/O operation is completed to ensure that no Frint
errors have been d~tected.
All of these conditions are taken care
of by appropriate test and branch instructions, represented by STMT28 through
STMT31. STMT28 branches to the instruction
that stops the processing of the program if
the printer is not operational. STMT29
tests to see if the printer is working
("Working" means that the Model 20 is in
the process of setting up mechanical delays
and circuitry or still executing a previous
XIO instruction, n01 that it is executing
the present XIO instruction.)
and causes
the re-execution o~ the XIO instruction
until the printer has completed the last
I/O operation.
ST~T30 tests to see if the
printer is busy ("Pusy" means that the XIO
instruction is actually being executed.)
and causes the pronram to loop around the
same instruction until the last print
operation has been terminated.
STMT31
causes a halt, if a print error occurs, and
display of code 111 in the STR register
panels on the CPU (STMT34).
In the latter
case, pressing the start key of the CPU
causes the print instruction to be reexecuted because o~ the branch address in
STMT35.
will read the Basic Assembler program and
the source program.
In addition, the pass information will
be punched into duplicated source cards on
the attached 2560, and the first run will
scan the program statements for possible
errors.
Thus, t he control card will be
supplied with the following entries:
Columns 1-5://CTL
Column 6: a or blank (Indicates a diagnostic run; all
punch operations are
bypassed; only the
program listing is
prin ted.)
Column 8: a or blank (Indicates that 4096
bytes of main
storage are used for
the a sse mb1 j • )
All other columns are left blank.
DIAGNOSTIC RUN
The statement listing printed during the
diagnostic run is shown in Figure 34. To
demonstrate the identification of incorrect
statements by diagnostic messages, two
errors have been deliberately included in
the source deck (see STMT 19 and STMT29).
I ",r'A
I'l"
PI,l
'.,IIPI<
AceU
( PH
IlA 11
'" \l1'~'
(lin
flffl<
PROGRAM END (STMT3f)
If no print error occurs, the program halts
on reaching thl~ HPR instruction (STMT12).
If the start key of the CPU is pressed,
STMT33 causes the nrogram to re-execute the
previous HPR instrnction and to return to
the same halt.
MA S~
CAt (
M
LOPP
LOPP
~TAPT
lui'll)
AS~
I:\C
!-CU
PS
DC
15,CALC
1'1
CLl7
Xl9'n'
XL 1'0'
X'?4000C'
X'025C'
CI RCLf
nc
nc
DC
DC
DC
DC
DC
DC
LH
MVC
MVC
OP
AP
AP
"'VI
SH
IIC
I ~If
'IAI T
XIII
IIC
IIC
TIOB
T1110
HPfl
PHI<
tIP/(
CONTIWL CARD
1'(
lit
~
/IIU
F i'JU re 14.
x'oonooooorLOO5C~
H'3~8'
o
~T"'H:l
eA')t
13,()
.,11
MVC
f
'i4(
~:ASR
UQNr;
10
When the program h~s been punched into
cards, the source program can be assembled
by either version of the Basic A~sembler
program.
In our case, it is assumed that the card
version is used an~ that the available system configuration includes a 2S60 MFCM dnd
a 2S01 Card Reader. Therefore, the 2S01
o
,.'\-(,.
It;N BAl'".C"
'H~
Ql"f;·2
p~G.
~T~r,);
CCJNST.
STMT'i4
';Polloe;
~HH06
STMT01
STMTG8
~HIT
OQ
S,"',) 0
<;T"'Il1
qMTll
,LO(lP
TEST FeR COMPLET IO~ <:fMT?4
PRT,MASK
MASK TO PRINT AREA S'MT7"
H",T'It.
PflT,ACCU
EDIT RfSULT
STMT;l1
PRTC X' 40' 1,17 PRINT RESULT
TEST PrllHfR NOT ClK <;''''T71l
I,PERR
TEST PPI/IITf P WLRK INC.5T"'T;(9·
4,fINF
.,X'ltO'
TEST £ONO Of lIlt
,)T"'T'lO
TEST PP INTI II IRICOR ST",nl
PERR,X'ltl'
., T",T '~?
DISPLAY qq')
X'99Q',O
LOCK fll~lA~l
15,HALT
Q"'T 1i
DI<;PLAY I I I
',HIT '4
X'll1',O
H!-prAI PI>IINT
l".,f I Nr
<, I",T "
~,T "'I '.f,
INPA
Saml'lp. S td tP. mp.n t Li sti ng Produced OU r in iJ
0000
0000
2400
025C
0000
0152
0001
4020
2020
48AO
0202
0206
F081
FA66
FA66
noc
4BAO
4720
0210
DE10
0040
4710
4740
9A40
9A41
9900
47FO
9900
47FO
Figure 35.
10
10
10
00
Result Computed by the Problem
Program
01138
01F.E
01F6
OOOA
01
03
03
00
CPH
INOA
PRT
WORK
1;)
lD
11>
Ii>
017B
0154
015A
016B
02
00
10
08
Image of the Symbol Table
,) 154
015:.
10
10
10
10
13,721,788.77
OilOO 0000 0000 00
0000 0000 00
OC
0000 0000 5C
6i320
2148
0032
0022
01)17
0015
DOLE
DOLE
0024
0034
0052
0004
0004
0004
OOAO
0082
0090
OOAO
0999
0098
0111
0082
2020 6R20 2020 68
2020
RIO
PRT
WORK
ACeu
ePH
RATE
ROUN
eNT
OECR
MASK
CALC
0025
DOLE
0028
0015
D02A
0036
DOLE
0011
lOOP
FINE
HALT
PERR
SIARI
8ASR
USING
BC
EQU
OS
DC
DC
DC
DC
DC
De
DC
DC
DC
lH
MVC
MVC
DP
AP
AP
MVI
SH
BC
MVC
ED
XIO
BC
BC
TIOB
Tl08
HPR
Be
HPR
Be
END
340
13,0
LOAD F3ASE REG.
ASSIGN BASE RE.
CIRCLE THE CONS T
~~ , 13
15,CAlC
10
CLl7
XL9'O'
XL7'0'
X' 24000C'
X'025C'
X'OOOOOOOOOOOO5C'
H'33S'
H' l'
X'40206B20207.06R?07.0206B'
X'2020214R707.0'
RIO, CNT
LOAD COUIIIT
ACCU+4( 31 ,CPH LOAD ACCU
WORK+2(71,ACCU LOAD WORK
WORK,RATE
(Ol-'PUTF Ir,TEREST
INCREMENT (APITAL
'.CCU,I-/ORK( 7 1
ROUND DEC I i/AL
ACCU,ROUN
RESTO~E LAST DIGIT
ACCU+6,X'OC'
RIO,OECR
DECRFASf: COU~T
2,lOOP
TEST FO~ CO~PLETION
PRT,MASK
MASK TO PRINT AREA
PRT,ACCU
EDIT RESULT
PRTCX'40'I.l7 PRINT RESULT
1,PERR
T~ST PRINTE~ NOT OK
TEST PRINTER WORKNG
4,FINE
TEST ENU OF 110
*,X'40'
PERR,X'41'
TEST PRINTER ERROR
DISPLAY 999
X'999',0
LOCK RESTART
15,HAlT
DISPLAY 11 1
X'lll',o
REPEAT PRINT
15,FINE
INOA
STMT01
STrH02
SHH03
STMT04
ST~H05
S PIT06
ST~T01
5T"1T08
ST:H09
S T~Tl 0
STrH 11
STMT12
S TMTl3
SPH14
STMT15
STMTl6
STMTl7
STMT18
SHT19
SHT20
ST~T21
ST.-1T22
ST;H 23
S T:01T 24
STH25
ST1'o1T26
ST"1T27
ST'n 28
STiH29
STMT30
ST~T31
S l1-lT32
ST:H33
STMT34
STMT35
STMT36
Q01
002
002
002
007.
007.
003
GG3
()O3
0')3
003
003
003
003
003
003
003
004
004
004
004
()04
004
004
004
004
004
005
005
005
005
005
005
005
005
006
Assem bIer Pro du c(~cl Pro gr am Listing
Writing a Program in Basic A!:isembler Language
81
APPENDIX A.
SUMMARY OF BASIC
r
I Description and Function
II
ASSEMBL~R
---.
I]~§g_]ggi§lg~_±nstr~~ii~~~
I
I
I
lI
Use Base Address Register
Drop Base Address Register
IRIQgI~~_1inking_Insi£Q£ii~ll~
I
I Identify Entry Point
I Identify External Symbol
II
l.Qgfi!!i.tiQll_Instruclion~
I
I
I
I
•
I
Equate Symbol
Define Constan t
Define Storage
INSTRUCTIONS
I
o
~----------------------~
I Name I Operation I Operand
I
I
I
-+--------------~
I
I
I
I
I
I
I
I
I
I
I
I
Inot usejlUSING
IReloc. exp.,abs. exp. I
Inot usedlDROP
ISimple abs. exp.
1
I
I
-+-------------~
I
I
I
1
I
I
I
I
I
I
I
I
Inot usedlENTRY
IRelocatable symbol
I
I not used I EXTRN
I Relocatable symbol
I
-+------+-----+------------------~
'I
I
I
I
I
I
10ptionallEQU
I optiona 11 DC
10ptionaliDS
I
I
I
IExpression
I TLCI
IDYL?
I
I
I
I
I
I
I
I
I
-+-----+-----+---.
I
I !§.~g~.hlef._~Q!!1IQ1_1!!~.tI.!!£liQ!!§ I
I
I
I
I
I
I
I
I
I Start Program
10ptionaliSTART
ISelf-defining value
I
Inot usedlORG
IRelocatable expressionl
I Reset Location Counter
I End of Program
Inot usedlEND
I Relocatable expressionl
l-----------------------+-----L
~
IIT--Type (C, X, H or Y)
12 D--Duplication Factor
I
I L--Length Modifipr
I F--Field (C or H)
I
IL_C--Constant
I L--Length
I
_ _ _ _ _ _ _ _ _ _ _ _ _J
________________________
o
~
o
82
System/360 Model 20 Rasic Assembler Language
APPENDIX B.
SUMMARY OF MACHINE-INSTRUCTIONS
0
-.-
r------~
0
I
I
I Mnemonic I
Code
I
I
I
• AH
AR
AP
BAS
BASR
BC
BCR
CH
CIa
CLC
CLI
CP
DP
ED
HPR
LH
MP
MVC
MVI
MVN
MVO
MVZ
NI
01
PACK
SH
SP
SPSW
SR
STH
TIOB
TM
TR
UNPK
XIO
ZAP
L - - -_ _ _ _ _ ..L.-
1
Name of
Instruction
Opera tion
Code 1
Add Halfword
Add
Add Decimal
Branch ann Store
Branch an'! Store
Branch on Condition
Branch on Condition
Compare Halfword
Control 1/0
Compare Logical
Compare Logical Immediate
Compare Decimal
Di vide Decim al
Edit
Halt and Proceed
Load Halfword
Multiply Decimal
Move Characters
Move Immeoiate
Move Numerics
Move with Offset
Move Zones
And Logical Immediate
Or Logical Immediate
Pack
subtract Halfword
Subtract necimal
set PSW
Subtract
store Halfword
Test I/O and Branch
Test under Mask
Translate
Unpack
Execute 1/0
Zero and Add Decimal
4A
1A
FA
4D
OD
47
07
49
9B
D5
95
F9
FD
DE
99
48
FC
D2
92
D1
F1
D3
94
96
F2
4B
FB
81
1B
40
9A
91
DC
F3
DO
F8
Basic
Machine
Format
Operand Field
Format
R1, D2 (X2, B2)
R1,R2
D1 (L1 ,B1) ,D2 (L2 ,B2)
R1,D2(X2,B2)
R 1, R2
M1, D2 (X2, B2)
M1,R2
R1, D2 (X2,B2)
D1 (B 1) , UF
D1 (L, B1) , D2 (B 2)
D1 (B1) ,I2
D1 (L1,B1) ,D2(L2,B2)
D1 ( L1 , B1) , D2 (L2 , B2 )
D1 (L, B1), D2 (B2)
D1 (B1) ,12
R1,D2(X2,B2)
D1 (L 1 , B 1) , D2 (L 2, B2)
D1 (L,B1) ,D2 (B2)
D1(B1),I2
D1 (L,B1) ,D2 (B2)
D1 (L1,B1) ,D2(L2,B2)
D1 (L,B1) ,D2 (B2)
D1(B1),I2
D1 (B1) ,12
D1 (L 1 , B1) , D2 (L 2 , B2 )
R1 , D2 (X2 , B2)
D1 (L1,B1) ,D2 (L2,B2)
D1 (B1)
R1,R2
R1,D2(X2,B2)
D1 (B 1) , UF
D1(B1),I2
D1 (L,B1) ,D2 (B2)
D1 (L1,B1) ,D2(L2,B2)
n 1 ( UF , B1) , D2 (B 2)
D1 (L 1 , B 1) , D2 (L 2, B2)
RX
RR
SS
RX
RR
RX
RR
RX
SI
SS
SI
SS
SS
SS
SI
RX
SS
SS
SI
SS
SS
SS
SI
SI
SS
RX
SS
SI
RR
RX
SI
SI
SS
SS
SS
SS
---L-
--'---
I
I Page I
I Number I
+-53
51
57
71
71
70
70
52
37
64
64
57
59
64
68
52
58
62
62
63
55
63
67
67
56
53
58
48
51
52
39
67
68
56
37
56
. . L - -_ _-A
He xadecimal Equivalent. of actual Machine Operation Code.
o
Appendix B. Summary of Machine-Instructions
,
83
r
--,-
---.---------------------------------------~i
Operand I
U
F I
I
1
2 I
1
A I
1
0 I
1
1 I
1
4 I
I
2
2 I
2
A I
""nemonic
I
I
I
Machine
I Operation Code
•
I
XIO
I
I
XIO
I 2501
I
TIOB
I
I Card Reader
TIOB
I Model A1 or A2 I
TIOB
I
I
1------------+
XIO
XIO
XIO
XIO
XIO
XIO
XIO
XIO
XIO
TIOB
T IOB
TIOB
TIOB
TIOB
CIO
CIO
CIa
CIO
2560
Multi-Function
Card Machine
2
2
3 I
B I
2
2
2
4 I
5 I
6
2
2
7
0
2
2
0
1
2
2
2
2
4
5
2
2
0
1
2
2
2
3
2
2
2
2
2
Fun ct ion
Read Card
*Read Card, Column Binary
Test Reader Busy
Test Reader Error
Test Last Card
Read Primary Card
* Read Primary Card, Column Binary
Read Secondary Card
* Read Secondary Card, Column Binary
Punch Primary Card
Punch Secondary Card
Punch and Feed Primary Card
Punch and Feed Secondary Card
* write Card
Test Reader/Punch Busy
Test Reader/Punch Error
Test Card Printer Busy
Test Last Card
Test Feed Error
Primary Card Stacker Select
Secondary Card Stacker Select
Punch Card Stacker Select
* Print Head Select
1-----------+
I
I
I
I
I
I
I
I
I
I
I
XIO
XIO
XIO
XIO
TIOB
TIOB
TIOB
TIOB
TIOB
TIOB
CIO
I
I
I 2520
I
I
I Card Punch
I Model A2 or A3 I
I
I
XIO
T lOB
TIOB
TIOB
CIO
I
I 1442
! Card Punch
I Model 5
XIO
TIOB
TIOB
TIOB
I
I
I
I
I 2520
I Card Read
I Punch
I
I
I
I
2
2
2
2
2
2
I 2
Read Card
* Read Card, Column Bin ary
Punch Card
Punch and Feed
Test Reader Busy
Test Reader Error
Test Punch Busy
Test Punch Error
Test Last Card
Test Feed Error
Stacker Select
A
4
6
0
1
2
3
4
5
0
.----------+----------+--------+
I
I
I
I
I
2
2
2
2
2
6 I
2 I
3 I
5 I
0 I
I
I 3
I 3
I
I
'l
J
I 3
2203 or 1403
Printer:
~
_______________
~
~'
,);1
I
I
i
I
\....11
----1
Print
I
Prin t and Space Suppress
I
Test Printer Busy
I
Test Printer Err:'>r
I
Test Channel 9
I
Test Channel 12
I
I
* Test Chann(~l 9 (u ppe r)
Channel 12 (upper)
* Test
I
______________
_ _ _ _ _ _ _ _ _ _ __ _ _
~
*Optional Feature
84
(-~
-1
Punch
Busy
2 I Test n,,
__ l...
Error
3 II Test
u."
5 I Test Feed Error
4
0
4
1
XIO
4
T lOB
0
4
TIOB
1
4
TIOB
2
4
TIOB
.3
4
4
TIOB
4
5
TIOD
_ _ _ _ _ _ _ _ _ _ _ _ _ _L _ _ _ _ _ _ _ _
~IO
-f
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
t
6 t Punch Card
1---------------+----------+------+
I
I
,
I
I
I
I
I
-f
~
Punch Card
Test Punch Busy
Test Punch Error
Test Feed Error
Stacker Select
I---------------+-----------+------+_
I
I
o
System/360 Model 20 Basic Assembler Ldnguage
~
~
o
~---------------.-------
o
I
I
Machine
j
2203 or 1403
Printer
I
~nemonic
I Operation Code
--+-----
TIOS
CIO
CIO
CIO
CIO
CIO
CIO
CIO
CIO
CIO
CIO
CIO
CIO
l--------------+
I
I
I
I
I
I
I
I
Communications
Adapter
(C. A.)
I
I
I
I
I
I
I
I
XIO
XIO
TIOB
TIOB
TIOB
CIa
CIa
CIO
I
I
I
XIO
XIO
XIO
XIO
XIO
XIO
TIOS
TIOS
CIa
CIO
CIO
CIO
CIa
CIO
CIa
l----------------+-----------Sinary
Synchronous
Communications
Adapter (BSCA)
o
-,-Operand I
U
4
4
4
4
6
4
5
6
4
4
7
8
4
9
4
4
A
B
4
4
C
D
4
E
4
F
5
2
5
5
4
5
5
1
5
5
o
2
5
3
5
5
5
5
3
5
5
XIO
XIO
XIO
XIO
TIOB
TIOS
TIOB
TIOB
TIOB
TIOB
TIOB
TIOB
TIOB
CIa
CIa
h
6
6
6
6
6
6
6
6
6
6
6
6
6
6
l----------------t-------------t--
I 2415
I
XIO
I 7
Function
Test Carriage Busy
Imm ediat e Sp ace
Immediate Skip
Delayed Space
Delayed Skip
* Immediate Space (upper)
* Immediate Skip (upper)
Delayed Space (upper)
* Delayed Skip (upp~)
* Immediate Space (both)
* Immediate Skip (both)
* Delayed Space (both)
* Delayed Skip (bot h)
*
Receive Record
Transmit Record
Test C.A. Busy
Test C.A Error
Test Received EOT
Set Receive Mode
Send EOT
Inhibit Audible Alarm
-+
o
1
2
5
5
5
5
5
5
5
5
5
+
o
5
~--------+
Serial
Input/
Output
Channel
F I
4
8
o
8
o
1
2
3
6
7
8
--+
2
4
10
12
1
2
3
4
5
6
7
8
9
0
1
t
Transmit and Receive
Receive Initial
Address Prepare
Auto Call
Receive
Transmit
Test Any Indicator Set
Test Busy
Disable ITB
Enable ITB
Enable BSCA
Disa ble BS CA
Store Current Address
Store Sense Information
store ITB Address
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
~
Read I/O Device (Time sharing)
write I/O Device (Time sharing)
Read I/O Device (Burst)
Write I/O Device (Burst)
Test I/O Transfer 1
Test I/O transfe~ 2
Test I/O Transfer 1
Test I/O Transfer 4
Test I/O Transfer 5
Test I/O Transfer 6
Test I/O Transfer 7
Test I/O Transfer 8
Test Read Transfer Error
Unit Control
I/O Select
0 I Perform Tape Operation
--i
I
~----. --+----------+--------+--------------------------------~
I 2 31 1
I ______________
XI a
8
0_ _ LI _ Pe r for m Di ~i k Ope rat i () n
I
L-______________
LI _______
~L
*
Optional Feature
o
Appendix C. Summary of Input/Output Instructions
85
-r
I
--,
IMESSAGEI
~
I
I
I
C
~
I
1
~
1
I
I
I
Dl
1
1
I
I
1
Ll
11.)
12.)
I
r-------+
~
1
M
I
ERROo CONDITION
I
11.)
I
I
12.)
I
I
I
Assembly executed using the Basic
(a) columns 1-24 and/or column 72
(b) operation code and/or operand
Assembly executed using the Basic
(a) col umn 72 not blank, or
(b) operation code and/or operand
Assembler (Card):
not blank, or
missing.
Assembler (Tape)
I
I
I
I
I
1
missing.
~
This EQU statement is unnamed.
This START, ENTRY, or EXTRN statement is misplaced.
ignored) •
I
I
1
(The statement is
1 The value of the location counter has exceeded the storage size for program
lexecution as specified in the Basic Assembler Control card (card column 9).
An instruction byte may not occupy the last (highest order) available
1 Notes:
Imain storage address.
I A constant or dat a byt e may be located at this posi ti on.
I
IThe name of this statement is defined more than once.
1------+
1
N
I
I
1
0
~
I
I
I
I
1
1
I
Rl
IThe name of this statement does not conform to the rules as follows:
Ie
It has more than four characters, or
Ie
its first character is not alphabetic, or
Ie
it contains an illegal character.
I
1
I
I
I
~
I
I
I
I
1
~
IThis mnemonic operation code is invalid.
I
I
~
lIn this statement
I
11.)
a relocatable expression has been used in an absolute field, or
I
12.)
an absolute expression has been used in a relocatable field, or
I
13.)
the X-Register field in an RX-instruction is not zero, or
I
14.)
a relocatable expression could not be split into a valid base address and I
a displacement.
(A USING statement is either missing, or wrong, or
1
I
misplaced.)
I
I
1-----+
S
~
---f
r-------+
I
o
o
--i
One of th~ operands in this statement is invalid.
This diagnostic message is
printed when one or more of the follo~ing conditions occur:
1.)
An invalid character is used as a delimiter.
2.)
The -f'irst character of a symbol in the operand entry is not alphabetic.
3.)
A delimiter is incorrectly used.
4.)
The operand of a START, ORG, or EQU statement is invalid.
5.)
A symbol or self-defining value in the operand entry contains an invalid
character.
6.)
A self-defining value or a symbol in the operand entry contains too many
characters.
7.)
A symbol or a self-defining value in the operand entry is followed by an
invalid character.
8.)
A self-defining value exceeds storage capacity.
9.)
An ampersand or an apostrophe used within a character constant is incorrectly specified.
10.) A DS duplication factor is too high.
11.) A DS statement contains an invalid operand.
12.) A DC statement is incorrectly specified.
-L-
lWarning messages that do not suppress the punching of the object deck.
o
86
System/360
Mod~l
20 Basic Assembler Language
r-------,------------IMESSAGEI
CONDITION
--,
ERRO~
o
I
~----+
I
I
Tl' IThe symbol table was filled by the name of the last
Iname of this statement cannot be accommodated.
~---+
1
I
I
t
U2
11.)
I 2.)
I
I
----------------------~
~eceding statement.
The I
I
~
The operand entry contains an undefined symbJl.
I
The operand entry of an EQU, ORG, or END statement contains a symbol that I
is not previously defined.
I
~
I
W1
IThe length of a constant defined by a DC statement exceeds the explicit length. I
'---_ _ _ _ .L
J
lWarning messages that do not suppress the punching of the object deck.
2U-messages of type (1) do not suppress the punching of the object deck, those of type
(2) do suppress punching.
o
o
Appendi x
D.
!:ummilry
()f
Di,lgn()~;t
ic
Mns~iiHJ(~!;
87
T------------,------------,
r
1
1
ICode setting:
1
1
1
1
I
I
~
+------------+------------~
I
I
I
I
,Mask Used to Test the Code:
I
l-
01
8
4
,
--+-
'Ii~~Q_Poig~£ithm~ii£_JRR_[Q£m~1l
IAdd Register' CAR)
ISubtract Register (SR)
2
1
11
I
1
I
I
I
1
1
1
1
-+--------+------------+----------~
1
IResult=O
1 Result=O
--+
~
I
10
I
I
,
I
,
1
00
1
IResultO
IResult>O
1
.1 -1 --
1
1
1
I
+------------+----------~
,
IResultO
lOp 1>Op2
IResult>O
IKi~~Q_fQint_!£ilh~~1i£_JR~_IQ£~~1l
,Add Half-word (AR)
1Compare Half-word (CH)
1 Subtract Half-worn (SH)
1
IResult=O
IOpl=Op2
IResult;.=O
I-
+----------+
1
IAdd Packed CAP)
ICompare Packed (CP)
ISubtract Packed (SP)
1 Zero Add Packed (ZAP)
1
Iqesult=O
IOp1=Op2
IResult=O
IResult=O
1
IResult>O
IOp1>0l-.2
IResult>O
IResult>O
I-
+----------+------+------t-------~
( ~ I)
ICompare Logical (r'LC,CLI)
1Edi t and Mark (ED)
lOR Logical Immediate (OI)
ITest Under Mask ('T'M)
,
I
1
I
I
1
IRes u 1 t= 0
IRe suI t i 0
I - I
I
IOpl=Op2
IOp1Op2
1
I
I source field I source field 1source fie ld I
I
IResult=O
IResultiO
1
I
,
I Result:::O
I Result mixed I -IResult all
I
' I '
lones,
1~~£im~1_!£i1hmetic
11Qgi££1_2£~ratiQns
I lI. N D Lo g i cal I mme d i ate
o
1
I Result
26
27
28
2g
4S
46
4fl
21"
'10
In
11
() ,3
49
'>0
'i 1
(), 4
'>2
() ,
'd
f)4
4
i')
16
'),2
r)
9, ()
() , 7
' ) r)
J)
11
l7
J\ppl'lItlix
,-
"-
2A
7.B
7.C
2D
2E
43
44
\
F.
Chtl[,lct
(~I
Cocip:;
fI'l
00111000
00111001
00111010
00111011
00111100
00111101
00111110
00111111
01000000
01000001
01000010
01000011
01000100
01000101
01000110
01000111
01001000
01001001
01001010
01001011
01001100
01001101
01001110
01001111
01010000
01010001
01010010
01010011
01010100
01010101
01010110
01010111
01011000
01011001
01011010
01011011
01011100
01011101
01011110
010 11111
01100000
01100001
01100010
01100011
01100100
01100101
01100110
01100111
01101000
01101001
01101010
01101011
01101100
01101101
01101110
01101111
01110000
01110001
01110010
01110011
01110100
01110101
01110110
01110111
01111000
01111001
01111010
01111011
01111100
01111101
90
9,8
9, 8, 1
9;8,2
9,8,3
9,8,4
9,8,5
9,8,6
9,8,7
blank
12,0,9,1
12,0,9,2
12,0,9,3
12,0,9,4
12,0,9,5
12,0,9,6
12,0,9,7
12,0,9,8
12,8,1
12,8,2
12,8,3
12,8,4
12,8,5
12,8,6
12,8,7
12
12,11,9,1
12,11,Q,2
12,11,9,3
12,11,Q,4
12,11,°,5
12,11,9,6
12,11,0,7
12,11,0,8
11,8,1
11,8,2
11,8,3
11,8,4
11,8,5
11,8,6
11,8,7
11
0, 1
11,0,9,2
11,0,9,3
11,0,9,4
11,0,9,5
11,0,9,6
11,0,9,7
11,0,9,8
0, 8, 1
12,11
0,8,3
0,8,4
0,8,5
0,8,6
0,8,7
12,11,0
12,11,",9,1
12,11,",9,2
12,11,0,9,3
12,11,n,9,4
12,11,0,9,5
12,11,0,9,6
12,11,0,9,7
1 2 , 11 ,
9. , 8
8, 1
8,2
8, 1
£3,4
8,5
~
<
(
+
I
&
$
*
,
/
,
%
>
?
°,
#
ii)
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
121
124
125
System/360 Model 20 Basic Assembler Language
38
39
3A
3B
3C
3D
3E
3F
40
41
42
43
44
45
46
47
48
49
4A
4B
4C
4D
4E
4F
50
51
52
53
54
55
56
57
58
59
SA
5B
5C
5D
52
SF
60
61
62
63
64
65
66
67
68
69
6A
.6B
6C
6D
6E
6F
70
71
72
73
74
0
0
7~
76
77
78
79
7A
7B
7C
7D
0
0
0
0
01111110
01111111
10000000
10000001
10000010
10000011
10000100
10000101
10000110
10000111
10001000
10001001
10001010
10001011
10001100
10001101
10001110
10001111
10010000
10010001
10010010
10010011
10010100
10010101
10010110
10010111
10011000
10011001
10011010
10011011
10011100
10011101
10011110
10011111
10100000
10100001
10100010
10100011
10100100
10100101
10100110
10100111
10101000
10101001
10101010
10101011
10101100
10101101
10101110
10101111
10110000
10110001
10110010
10110011
10110100
10110101
10110110
10110111
10111000
10 11100'1
10111010
10111011
10111100
10111101
10111110
1 0 1 1 1 1 11
110000'00
11000001
11000010
11000011
8,6
8, 7
12,0,8,1
12,0,1
12,0,2
12,0,3
12,0,4
12,0,5
12,0,6
12,0,7
12,0,8
12,0,9
12,0,8,2
12,0,8,3
12,0,8,4
12,0,8,5
12,0,8,6
12,0,8,7
12,11,P,1
12,11,1
12,11,2
12,11,1
12,11,U
12,11,C;
12,11,fi
12,11,'"
12,11,0
12,11, 0
12,11, p ,2
12,11, p ,3
12,11,°,4
12,11, Q , 5
12,11, 0 ,6
12,11,Q,7
11,0,8,1
11,0,1
11,0,2
11,0,3
11,0,4
11,0,5
11,0,6
11,0,7
11,0,8
11,0,9
11,0,8,2
11,0,8,3
11,0,8,4
11,0,8,5
11,0,8,6
11,0,8,7
12,11,O,8,1
12,11,O,1
12,11,O,2
12,11,O,3
12,11,O,4
12,11,O,5
12,11,0,6
12,11,",7
12,11,n,8
12,11,",9
12,11,0,8,2
12,11,0,8,l
12,11,0,8,4
12,11,0,8,r)
12,11,0,8,6
12,11,O,S,7
12,0
12, 1
12,2
1 2 ,-~
"
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
151
l 'S4
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
171
174
175
176
177
178
179
180
"81
lB2
181
184
1BS
186
187
188
lBfJ
1 ()
191
192
1<) 1
l'l4
19 S
°
A
11
C
7E
7F
80
81
82
83
84
85
86
87
88
[9
8A
8B
8C
8D
8E
8F
90
91
92
93
94
95
96
97
98
99
9A
98
9C
9D
9E
9F
AO
A1
A2
1\3
1\4
A5
A6
A7
A8
A9
AA
AB
AC
AD
hE
I\F
130
I31
R2
131
B4
BS
Bo
137
An
[39
Bl\
1313
BC
I3D
BE
I3F
co
Cl
C2
C~
A P pp nd i x F.
c: h ,1 r, 1 C t.
(>
I
c: () d (~ ! ;
() 1
11000100
11000101
11000110
11000111
11001000
11001001
11001010
11001011
11001100
11001101
11001110
11001111
11010000
11010001
11010010
11010011
11010100
11010101
11010110
11010111
11011000
11011001
11011010
11011011
11011100
11011101
11011110
11011111
11100000
11100001
11100010
11100011
11100100
11100101
11100110
11100111
11101000
11101001
11101010
11101011
11101100
11101101
11101110
11101111
11110000
11110001
11110010
11110011
11110100
11110101
11110110
11110111
11111000
11111001
11111010
11111011
11111100
11111101
11111110
11111111
12,4
12,5
12,6
12,7
12,8
12,9
12,0,9,8,2
12,0,9,8,3
12,0,9,8,4
12,0,9,8,5
12,0,9,8,6
12,0,9,8,7
11 , 0
11 , 1
11 , 2
11 ,3
11 , 4
11 ,5
11 ,6
11 ,7
11 , 8
11 ,9
12,11,9,8,2
12,11,Q,8,3
12,11,°,8,4
12,11, Q ,8,5
12,11,9,8,6
12,11, Q ,8,7
0,8,2
11,0,9,1
0,2
0,3
0,4
0,5
0,6
0,7
0,8
0,9
11,0,9,8,2
11,0,9,8,3
11,0,9,8,4
11,0,9,8,5
11,0,9,8,6
11,0,9,8,7
0
1
2
3
4
5
6
7
8
9
12,11,n,9,8,2
12,11,n,9,8,3
12,11,",9,8,4
12,11,n,9,8,5
12,11,n,9,8,6
12,11,"',9,8,7
D
E
F
G
H
I
J
K
L
M
N
0
p
Q
R
S
T
U
V
w
X
y
Z
0
1
2
3
4
5
6
7
8
9
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
214
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
2 r) 1
2 r )2
253
254
2')5
C4
C5
C6
C7
C8
C9
CA
CB
CC
CD
CE
CF
DO
D1
D2
D3
D4
D5
D6
D7
D8
D9
DA
DB
DC
DD
DE
DF
EO
E1
E2
E3
E4
E5
E6
E7
E8
E9
EA
EB
EC
ED
EE
EF
FO
F1
F2
F3
F4
F5
"0
()
F6
F7
F8
F9
FA
FB
FC
FD
FE
PI-'
o
92
System/J60 Modpl 20 8dSic Assembler Langudge
o
The table in this appendix provides for direct conversion
bers between 0000 and 4095 (hexadecimal 000 and FFF) •
~f
decimal and hexadecimal num-
For numbers outside the range of the table, add the following values to the table
figures:
li~.!~g~£iJ1l.~l
1000
2000
3000
4000
5000
6000
7000
8000
0
2
De.£i!!!~l
9000
AOOO
BOOO
COOO
DOOO
EOOO
FOOO
8192
12288
16384
20480
24576
28672
327fi8
0
0
!!.~l£~Q.§.£imal
Decimal
-4096-
4
7
36864
40960
45056
49152
53248
57344
61440
8
C
D
E
F
0012
0019 0020 0021 0022 0023 0024 0025 0026 0027 0028
0035 0036 0037 0038 0039 0040 0041 0042 0043 0044
0051 0052 0053 0054 0055 0056 0057 0058 0059 0060
0013
0029
0045
0061
0014
0030
0046
0062
0015
0031
00 It 7
0063
3
5
6
9
A
B
00
01
02
03
0000
0016
0032
0048
0001
0017
0033
0049
0002
on18
on34
on50
0003 0004 0005 0006 0007 0008 0009 0010 0011
04
05
06
07
0064
0080
0096
0112
0065
0081
0097
0113
0066
on82
00.98
0114
0067
0083
0099
0115
0068
0084
0100
0116
0069
0085
0101
0117
0070
0086
0102
0118
0071
0087
0103
0119
0072
0088
0104
0120
0073
0089
0105
0121
0074
0090
0106
0122
0075
0091
0107
0123
0076
0092
0108
0124
0077
0093
0109
0125
0078
0094
0110
0126
0079
0095
0111
0127
08
09
OA
OB
0128
0144
0160
0176
0129
0145
0161
0177
0130
0146
0162
0178
0131
0147
0163
0179
0132
0148
0164
0180
0133
0149
0165
0181
0134
0150
0166
0182
0135
0151
0167
0183
0136
0152
0168
0184
0137
0153
0169
0185
0138
0154
0170
0186
0139
0155
0171
0187
0140
0156
0172
0188
0141
0157
0173
0189
0142
0158
0174
0190
0143
0159
0175
0191
oc
OD
OE
OF
0192
0208
0224
0240
0193
0209
0225
0241
0194
0210
07.26
0242
0195
0211
0227
0243
0196
0212
0228
0244
0197
0213
0229
0245
0198
0214
0230
0246
0199
0215
0231
0247
0200
0216
0232
0248
0201
0217
0233
0249
0202
0218
0234
0250
0203
0219
0235
0251
0204
0220
0236
0252
0205
0221
0237
0253
0206
0222
0238
0254
0207
0223
0239
0255
10
11
12
13
0256
0272
0288
0304
0257
0273
0289
0305
0258
0274
0290
0106
0259
0275
0291
0307
0260
0276
0292
0308
0261
0277
0293
0309
0262
0278
0294
0310
0263
0279
0295
0311
0264
0280
0296
0312
0265
0281
0297
0313
0266
0282
0298
0314
0267
0283
0299
0315
0268
0284
0300
0316
0269
0285
o JO 1
0317
0270
0286
0302
0318
0271
02fl7
0303
0319
14
15
16
17
0320
0336
0352
0368
0321
0337
0353
0369
0122
0138
0.154
0370
0323
0339
0355
0371
0324
0340
0356
0372
0325
0341
0357
0373
0326
0342
0358
0374
0327
0343
0359
0375
0328
0344
0360
0376
0329
0345
0361
0377
0330
0346
0362
0178
0311
0347
0363
0379
0332
0348
0164
0380
0333
0349
0365
0381
0334
0350
0366
OJA 2
0135
0351
0367
03B3
18
19
11\
lB
0384
0400
0416
0432
0385
0401
0417
0433
0186
0402
0418
0434
0.187
0403
0419
04.15
0.388
0404
0420
0436
0389
0405
0421
04.17
0390
0406
0422
0438
0391
0407
0423
0439
O]C} 2
0408
0424
0440
0393
0409
0425
0441
0394
0410
0426
04,42
039'1
0411
0427
0443
0396
0412
0428
0444
01')7
0413
0429
0445
019 A
0414
04.10
0446
0399
0415
04 -31
0447
lC
lD
1E
1F
0448
0464
0480
0496
0449
0465
0481
0497
0450
0466
0482
0498
0451
0467
0483
0499
0452
0468
0484
0500
0453
0469
0485
0501
0454
0470
0486
0502
045'1
0471
0487
0503
0456
0472
0488
0504
0457 04 SA
0473 0474
0409 01~90
0505 0506
0459
0475
o l~ ') 1
0'107
0460
0476
0492
or) 08
0461
0477
0491
050<)
0462
0478
0494
or>10
0461
0479
049 r)
0511
l\PFendix G. Hexddecim,11-DHcimal
Numb(~l"
ConvPl-slon Tablp
93
o
5
6
7
8
9
A
B
c
D
23
0512
0528
0544
0560
0513 OS14 0515 0516 0517
0529 0~30 0531 0532 0533
0545 0~46 0547 0548 0549
0561 0~62 0563 0564 0565
0518
0534
0550
0566
0519
0535
0551
0567
0520
0536
05S2
0568
0521
0537
0553
0569
0522
0538
0554
0570
0523
0539
0555
0571
0524
0540
0556
0572
0525
0541
0557
0573
0526
0542
0558
0574
0527
0543
0559
0575
24
25
26
27
0576
0592
0608
0624
0577 OS78 0579 0580 0581
0593 0~94 0595 0596 0597
0609 0~10 0611 0612 0613
0625 0~26 0627 0628 0629
0582
0598
0614
0630
0583
0599
0615
0631
0584
0600
0616
0632
0585
0601
0617
0633
0586
0602
0618
0634
0587
0603
0619
0635
0588
0604
0620
0636
0589
0605
0621
0637
0590
0606
0622
0638
0591
0607
0623
0639
28
29
2A
28
0640
0656
0672
0688
0641 0~42
0657 0~58
0673 0~74
0689 On90
0643
0659
0675
0691
0644
0660
0676
0692
0645
0661
0677
0693
0646
0662
0678
0694
0647
0663
0679
0695
0648
0664
0680
0696
0649
0665
0681
0697
0650
0666
0682
0698
0651
0667
0683
0699
0652
0668
0684
0700
0653
0669
0685
0701
0654
0670
0686
0702
0655
0671
0687
0703
2C
2D
23
2f
0704
0720
0736
0752
0705
0721
0737
0753
0~06
0707
0723
0739
0755
0708
0724
0740
0756
0709
0725
0741
0757
0710
0726
0742
0758
0711
0727
0743
0759
0712
0728
0744
0760
0713
0729
0745
0761
0714
0730
0746
0762
0715
0731
0747
0763
0716
0732
0748
0764
0717
0733
0749
0765
0718
0734
0750
0766
0719
0735
0751
0767
30
31
32
33
0768
0784
0800
0816
0769 0~70 0771
0785 0~86 0787
0801 OP02 0803
0817 0 0 18 0819
0772
0788
0804
0820
0773
0789
0805
0821
0774
0790
0806
0822
0775
0791
0807
0823
0776
0792
0808
0824
0777
0793
0809
0825
0778
0794
0810
0826
0779
0795
0811
0827
0780
0796
0812
0828
0781
0797
C813
0829
0782
0798
0814
0830
0783
0799
0815
0831
34
35
36
37
0832
0848
0864
0880
0833
0849
0865
0881
OP34
OP50
OR66
OP82
0835
0851
0867
0883
0836
0852
0868
0884
0837
0853
0869
0885
0838
0854
0870
0886
0839
0855
0871
0887
0840
08S6
0872
0888
0841
0857
0873
0889
0842
0858
0874
0890
0843
0859
0875
0891
0844
0860
0876
0892
0845
0861
0877
0893
0846
0862
0878
0894
0847
0863
0879
0895
38
39
3A
38
0896
0912
0928
0944
0897
0913
0929
0945
OR98
0 0 14
OQ30
OQ46
0899
0915
0931
0947
0900
0916
0932
0948
0901
0917
0933
0949
0902
0918
0934
0950
0903
0919
0935
0951
0904
0920
0936
0952
0905
0921
0937
0953
0906
0922
0938
0954
0907
0923
0939
0955
0908
0924
0940
0956
0909
0925
0941
0957
0910
0926
0942
0958
0911
0927
0943
0959
3C
3D
3E
3F
0960
0976
0992
1008
0961
0977
0993
1009
0 0 62
OQ78
OQ94
1010
0963
0979
0995
1011
0964
0980
0996
1012
0965
0981
0997
1013
0966
0982
0998
1014
0967
0983
0999
1015
0968
0984
1000
1016
0969
0985
1001
1017
0970
0986
1002
1018
0971
0987
1003
1019
0972
0988
1004
1020
0973
0989
1005
1021
0974
0990
1006
1022
0975
0991
1007
1023
40
41
42
43
1024
1040
1056
1072
1025
1041
1057
1073
l n 26
,ri42
1058
1074
1027
1043
1059
1075
1028
1044
1060
1076
1029
1045
1061
1077
1030
1046
1062
1078
1031
1047
1063
1079
1032
1048
1064
1080
10331034
1049 1050
106S 1066
1081 1082
1035
1051
1067
1083
1036
1052
1068
1084
1017
1053
1069
1085
1038
1054
1070
1086
1071
1087
44
45
46
47
1088
1104
1120
1136
1089
1105
1121
1137
1090
1106
1122
1138
10<)1
1107
1121
1139
10921093
1108 1109
1124 1125
1140 1141
1094
1110
1126
1142
1095
1111
1127
1143
1096
1112
1128
1144
1097
1113
1129
1145
1098
1114
1130
1146
1099
1115
1131
1147
1100
1116
1132
1148
1101
1117
1111
1149
1102
1110
1134
1150
1101
1119
1135
11S1
1152 1153 1154 1155 1156 1157 1158 1159 1160 1161
1168 1169 1170 1171 1172 1173 1174 1175 1176 1177
1184118511861187119811891190119111921193
.1200 1201 1702 1203 1204 1205 1206 1207 1208 120<)
1162
1178
11CJ4
1210
1161
1179
1195
1211
1164
1180
11<)6
1212
1165
1181
11()7
1211
1166 11h7
1182 1181
119B 11<)()
1214 121S
1226
12 4 2
125fl
1274
1227
1 2 4·3
12')<)
127'>
17.2B
1 2 4 I!
1260
1276
1229
1 7. 4
1261
1277
12]0
1 24 (,
1262
127B
20
21
22
48
49
4A
4B
4C
4D
4E
4F
94
1216
12 3 2
1248
1264
3
2
0~22
0~38
0~54
1217 1218
1 2 3 31 7 ) 4
1249 1750
1265 1766
System/360 Modf'l
121<)
1 2 .1 ')
12')1
1267
20
4
1220
1 2 .1 6
1252
1260
1221
1 2 17
1253
1269
1222
12 3 8
1254
1270
Bd!;ic As!:;pmbl(~[
1223
1 2 .1 <)
1255
1271
1224
1 /. 4 0
1256
1272
Ldngud
Syst~m/360
2~62
2~78
2~94
2~10
2~90
2~06
2~22
2~]8
Modpl
2563
2579
2595
2611
2564
2580
2596
2612
20 Busic
A!:;s(~mblp.l
Ldl1(Jllllent<.ltion, such clS chdract{~r
quantities, to which meaning might be
assigned..
Data Conversion
The process of changing datcl from one
form of representation to dnother.
100
System/J60
Mo~el
20 I3.1sic A!;semblpr:
Data Processing
A systematic sequence of operat ions performed on data.
Data Processing System
A network of machine components capable
of accepting information, processing it
according to a plan, and producing the
desired results.
Decimal
1.
A characteristic or property involving a selection, choice or condition
in which there are ten
possibili ties.
2.
The number representation system
with a base of ten.
Decimal-to-Binary Conversion
The conversion of a decimal number to
the equivalent binary number, i.e., a
base-ten number to a base-two~umber.
Decision
A determination of future action.
Decision Block
A flowchart symbol whose interior contains the criterion for decision or
branching.
Decision Instruction
An instruction that selects a branch of
a program, e.g., a conditional branch
instruction.
Deck
A collection of punched cards.
Decrement
The quantity by which a variable is
decreased.
Diagnostic
The detection and isolation of a malfunction or a mistake.
Diagram
A schematic representation of a sequence
of operations or routines.
D it] it
1.
Any of the arabic numerals 1 to 9
~nd the symbol O.
2•
0 n e 0 f the e 1 em en t s t hat co mbin e to
form numbers in d system other than
the decimal system.
Displacement
The difference (in bytes) betwe(~n the
contents of a base register (or the
add res s rep res e n ted by a s y mbo 1 ) and a
referenced storage location.
Dumm y
The characteristic of having the
appearance of d specified thing but not
hLiving the caracity to function as such.
EBCDIC
(Extended Binary Coded Decimal Interchanc]e Code).
A sp<'cific set of B-bit
codes standdrd throughout System/360.
Edit
Tom 0 <1 i f Y the f () r m 0 I' form d t () f (1. 1 t a ;
e . 9 ., t () i n s(~ r tor del e t P C h d r' d etc r' s
sllch as pa(J(~ numhpl:S or decim.ll poi nt:;.
Eftective Addu~!.;!;
Thp ab!;olutf~ m thdt of
thp in!;tructic)n in !.tor.l(jP.
Lln(Jucl.nce of in!;tructi()n~; th,lt i!.
[' e p edt p dun til d t (~r- min 11 1 con (1i t i () n
occllrs.
Md
chi n (~
~)dm(!
Add r e ~-' :-;
d~;
rage.
2.
The generation of overflow as in
o
( 1) •
Pack
To combine two or more units of information into a single physical unit to conserve stora ge •
Padding
A technique used to fill a block of
information with dummy records, words or
characters.
Printer
A device which expresses coded characters as hard copy.
Program
1.
The plan for the solution of a problem including data gathering, processing and reporting.
2.
A group of related routines which
solve a given problem.
Programming Language
A language used to prepare computer
programs.
Pseudo-Register
A register with fixed contents used in
conjunction with an IBM System/360 Model
20.
Punched Card
1•
A car d pun c h e d wit h a pa t t ern 0 f
holes to represent data.
2.
A card as in 1. before being
punched.
Read
To transfer information from an input
device to internal or auxiliary storage.
Reader
A device which converts information in
one form of storage to information in
another f::>rm of storage.
Register
A device capable of storing a specified
amount of data such as one halfword.
Rela ti ve AddL ess
An address expressed by a previously
defined symh::>l and a displacement.
( e • g ., F LD + 1 0) •
Relocate
In programming, to move d routine fLom
one portion ::>f internal storage to
another and to automatically adjust the
necessary address refer(!nces so that the
routine, in its new location, can be
executed.
Reset
To restore a stoLage device to pre-
20 Basic Assembler Language
o
o
o
scribed initial state, not necessarily
that denoting zeros.
Restart
To return to a previous point in a program and resume operation from that
point.
RLD card
RLD cards identify portions of the text
that require m00ification owing to relocation (such as address constants).
Self-Defining Term
A term with an implied value (e.g., 300,
X' 2A'
o
,
C' F ' )
Source Lang uage
A language that is an input to a given
translation process.
Source Program
A program written in a source language.
Special Character
In a character set, a character that is
neither a numeral nor a letter, e.g., -*
$ = and blank.
Statement
In computer programming, a meaningful
expression or g~neralized instruction in
a source language.
Step
1.
One instruction in a computer
routine.
2.
To cause d computer to execute one
instruction.
storage
1.
Pertaining to a device into which
data can be entered and from which
it can be retrieved at a later time.
2.
Loosely, any device that can store
data.
storage Capacity
The amount of data (in bytes) that can
be contained in a storage device.
Store
1.
To enter data into a storage device.
2.
To retain data in a storage device.
Subroutine
A routine that can be part of another
routine.
Switch
1.
A symbol used to indicate a branching point, or a set of instructions
to condition a branch.
2.
A physical device which can alter
flow.
Symbol Table
A mapping for a set of symbols to another set of symbols or numbers.
Sym boli c Addr ess
An address expressed in symbols convenient to the programmer.
Symbolic Language
An artificial language used in logical
expressions, that avoids all ambiguities
and inadequacies of natural languages.
System
1. A collection of consecutive operations and procedures required to
accomplish a specific objective.
2.
An assembly of objects united to
form a functional unit.
Table
A collection of data, each item being
uniquely identified either by some label
or by its relative position.
Table Look-Up
A procedure for obtaining the function
value corresponding to an argument from
a table of function values.
Truncate
To cut off at a specified spot (as contrasted with round or pad).
TXT card
TXT cards contain the user program in
machine language.
Unpack
To recover the original data from packed
data.
Zero Suppression
The elimination of non-significant zeros
in a number.
Zone
The 12, 11, or 0 punches in IBM card
code.
o
Appendix II. Glossary
101
o
Absol u te ad dressin g • • • • • • • • • • • • • • • • •• 22
Absolute expressions................. 17
Absolute program loader ••••••••••• 41,74
Absolute programming ••••••••••••••••• 26
Absolute symbols ••••••••••••••••••••• 15
Add decimal (AP) ••••••••••••••••••••• 57
Add halfword (AR) •••••••••••••••••••• 53
Add register (A1) •••••••••••••••••••• 51
Additional assembly run •••••••••••••• 72
Address calculation ••••••••••••••••••• 6
Address constants.................... 31
Addressing,
absolute ••••••••••••••••••••••••••• 22
effective •••••••••••••••••••••••••• 20
explicit ••••••••••••••••••••••••••• 21
implied •••••••••••••••••••••••••••• 20
relative ••••••••••••••••••••• ·•••••• 16
symbolic ••••••••••••••••••••••••••• 20
And (NI) ••••••••••••••••••••••••••••• 67
Assembly, error elimination •••••••••• 72
Assignment of storage addr.-esses •••••• 18
Base register.- aodr.-ess calculation ••••• 6
Base register.-s •••••••••••••••••••• 20,23
Base r.-egister.-s, loading of ••••••••••• 23
Basic Assembler Contr.-ol Instr.-uctions,
END •••••••••••••••••••••••••••••••• 34
ORG •••••••••••••••••••••••••••••••• 35
START •••••••••••••••••••••••••••••• 34
Basic Assembler.- Instr.-uctions ••••••• 5,29
DC. • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • •• 29
DROP ••••••••••••••••••••••••••••••• 25
D S • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • ••
32
ENTRy •••••••••••••••••••••••••••••• 27
EXTRN •••••••••••••••••••••••••••••.• 27
EQU •••••••••••••••••••••••••••••••• 2'9
summar.-y of ••••••••••••••••••••••••• 82
USING •••••••••••••••••••••••••••••• 23
Basic Assembler progr.-am,
car.-d ver.-sions ••••••••.••••••••••••• 72
tape versions •••••••••••••••••••••• 74
BASR instr.-uction ••••••••••••••••••••• 23
Binar.-y arithmetic oper.-ations •••••••.• 49
Binary Synchronous Communications
Adapter ••••••••••••••••••••••••• 11,39
Branches, conditional •••.••••.•.•• 46,70
Branch and storp (BAS) ••••••••••••••• 71
Branch and stor.-p register (BASR) ••••• 71
Br.-anch on condition (BC) ••••••••••••• 70
Branch on condition r.-egister (BCR) .•• 70
Branching •••••••••••••••••••••••••••• 69
BSCA ••••••••••••••••••.••••••••••• 11,39
Card Ver.-sions Basic Assembler.- program
Character.- codes, summdr.-y
Character constants •••..•••.•••••••••
Chdracter self-Clefininq b~rms ••••••••
Char.-acter set ••••••••••••••••••••••••
CIa instr.-uction ••••••••••.•••.•••••••
CIa instruction,
Communications Addpters .•••.•••••••
print-head sel(~Gtion •••••••••••••••
ot ..........
10 4
S Y s t e m/ 160M 0 del
2 0 B
serial I/O channeL •••••••••••••••• 39
skipping ••••••••••••••••••••••••••• 39
spacing •••••••••••••••••••••••••••• 39
stacker selection •••••••••••••••••• 38
Coding conventions •••••••••••••••••••• 9
Coding form •••••••••••••••••••••••• 9,10
Comments cards ••••••••••••••••••••••• 12
Comments entries ••••••••••••••••••••• 12
Communications adapters •••••••••••••• 39
Com par e d ec i mal ( CP) • • • • • • • • • • • • • • • •• 5 7
Compare halfword (CH) •••••••••••••••• 52
Compare logical (CLC) •••••••••••••••• 64
Compare logical (CLI) •••••••••••••••• 64
Compatibility ••••••••••••••••••••••••• 7
Compound expressions ••••••••••••••••• 16
Condition code ••••••••••••••••••••••• 46
Condition codes, summar.-y of •••••••••• 88
Condi tional branches •••• ~ • • • • • • • •• 46, 70
Constants •••••••••••••••••••••••••••• 29
Control input/output ••••••••••••••••• 37
Control instructions ••••••••••••••••• 34
Conversion table,
hexadecimal-decimal •••••••••••••••• 93
C-type oper.-and of DS instr.-uction ••••• 33
DC instr.-uction ••••••••••••••••••••••• 29
DC instructions, gr.-ouping of ••••••••• 32
Decimal arithmetic oper.-ations •• ~ ••••• 53
Decimal self-defining terms •••••••••• 14
Define constant ••••••••.••••••••••••. 29
Define stor.-age ••••••••••••••••••••••• 32
Defining symbols ••••••••••••••••••••• 1')
Definition instructions •••••••••••• 5,2)
Definition of constants, sequence •••• 32
Diagnostic messages •••••••••••••••••• 74
Diagnostic messages, summary of •••••• 86
Directaddr.-essing •••••••••••••••••••• 22
Displacement ••••••••••••••••••••••••• 20
Divide decimal (DP) •••••••••••••••••• ')9
DROP instr.-uction •••••••.••••••••..••• 2S
DS instruction ••••••••••••••••••••••• 32
DS instruction,
C-type operand of DS instruction ••• 33
duplication factor- •••••••••.••••••• 31
II-type :>perand •••••••...•••.••.••••• 32
Dummy punch cycle •••••••••.•••••••••• 41
Duplication fdctor •.••••.•••••••••••• 13
Edit (ED) ••••••••••••••.••••••••••••.
Effective addn~ssinq ••••••••••••••••.
END instruction ••••••••••••••••••••••
ENTRY instruction ••.•••••••••••••••••
EQlJ instruction .••••••••.••••••••••••
Error elimination ••••••••••••.•••••••
Error messages •••••••••••••••••••••••
EVdluation of expressions •.••.•••••••
Execut~~ input/outpul. ••••••••••••••••
Explicit dddressing .•••.•••••.•••••••
EXI'rf~!.;si()ns ••••••••••••••.•••••••••••
Expre!.isions,
ahsolute •••••••••••••••••••••.•••••
compound •••••.••••••••.••••••••.•••
o
64
20
14
27
29
72
74
17
17
21
16
17
1b
o
o
evaluation of •••••••••••••••••••••• 17
relocatable •••••••••••••••••••••••• 17
External sy mbols.. • ••• • • • • • • •• • • •• • •• 15
EXTRN instruction •••••••••••••••••••• 27
Formats of instructions •••••••••••••• 44
Functions of the assembler language •• 20
General registers •••••••••••••••••••• 22
General registers, restrictions on ••• 22
GroupinJ DC instructions ••••••••••••• 32
Half-word constants •••••••••••••••••• 31
Hexadecimal constants •••••••••••••••• 30
Hal t and proceen (HPR) •••••••••••• 48,68
Hexadecimal-decimal conversion table. 93
Hexadecimal sel~-defining terms •••••• 14
HPR ••••••••••••••••••••••••••••••• 48,68
H-type operand of DS instruction ••••• 32
o
Identification-sequence entries •••••• 12
Implied addressing ••••••••••••••••••• 20
Incompatible instructions ••••••••••••• 7
Indexing ••••••••••••••••••••••••••••• 21
Indexing with RY-format instructions. 46
Input/Output instructions •••••••••• 5,37
Input/Output macro instructions •••••• 40
Instruction entries •••••••••••••••••• 11
Instruction formats •••••••••••••••••• 45
Interrupts ••••••••••••••••••••••••••• 41
Introduction •••••••••••••••••••••••••• 5
Invalid names, pxamples.............. 11
laCS macro instructions •••••••••••••• 40
laCS macro instructions, summary of • 41
I/O instructions, sequence of •••••••• 40
I/O instructions, summary of ••••••••• 85
I/O interrupts ••••••••••••••••••••••• 41
I/O routines ••••••••••••••••••••••••• 41
Joint assembly ••••••••••••••••••••••• 11
Joint execution •••••••••••••••••••••• 27
Language compatibility •••••••••••••••• 8
Language structure ••••••••••••••••••• 14
Linking ••••••••••••••••••••••••• 6,27,36
Listing ••••••••••••••••••••••••••••••• 6
Load halfword (LH) ••••••••••••••••••• 52
Loading object programs •••••••••••••• 74
Loading of base registers •••••••••••• 23
Location counter ••••••••••••••••••••• 17
Location counter,
reference to •••••••••••••.•.••••••• 19
resetting of •••••••••••••••••••• 19,35
Location-counter overflow •••••••••••• 19
o
Ma chi n ere qui rem e n t s. • • • • • • • • • • • • • • • •• 6
Machine-instruction formats ••.••••••• 45
Machine-instruction formats,
summary of ••••••••••••••••••••••••• 44
Machine-instruction statements ••••• 5,43
Machine instructions, summary of ••••• 83
Machine operations, Types of ••••••••• 49
Bin a r y a r it h mf> tic. • • • • • • • • • • • • • • • •• 49
Decimal arithmetic ••••••••••••••••• 53
Non-arithmetic ••••••••••••••••••••• 61
Main storage requirements,
assembly ••••••••••••••••••••••••••• 75
execution •••••••••••••••••••••••••• 75
Maximum system configuration •••••••••• 7
Minimum system configuration •••••••••• 6
Mnemonic •••••••••••••••••••••••••••.•• 5
Mnemonic cod.es •••••••••••••••••••• 45,83
Move characters (MVC) •••••••••••••••• 62
Move immediate (MVI) ••••••••••••••••• 62
Move numerics (MVN) •••••••••••••••••• 63
Move with offset (MVO) ••••••••••••••• 55
Move zones (MVZ) ••••••••••••••••••••• 63
Multiply decimal (MP) •••••••••••••••• 58
Name e n t r y . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Name specifications •••••••••••••••••• 11
NI-instruction ••••••••••••••••••••••• 67
Non-arithmetic operations •••••••••••• 61
Object program ••••••••••.••.••••.••••• 5
aI-instruction ••••••••••••••••••••••• 67
Operand entry •••••••••••••••••••••••• 12
Ope ran d for ma t s. . . . . . . . . . . . . . . . . . . • .. 1 2
Ope rat ion cod es. • • • • • • • • • • • • • • • • • • • •• 8 3
Operation entry •••••••••••••••••••••• 11
Or (01) •••••••••••••••••••••••••••••• 67
ORG instruction •••••••••••••••••••••• 35
Pack (PACK) •••••••••••••••••••••••••• 56
Performance data ••••••••••••••••••••• 75
Print-head selection ••••••••••••••••• 38
Program linking ••••••••••••••••• 6,27,36
Program linking, sample of ••••••••••• 28
Program listing ••••••••••••..••••••••••• 6
Pseudo-registers ••••••••••••••••••••• 23
PSW •••••••••••••••••••••••••••••••••• 48
Reference to the location counter •••• 19
Register usage ••••••••••••••••••••••• 22
R ela ti ve addressi ng. • • • • • • • • • • • • • • • •• 16
Release base register •••••••••••••••• 25
Relocatability •••••••••••••••••••••••• 6
Relocatable expressions •••••••••••••• 17
Relocatable program loader •••••••• 41,74
Relocatable programming •••••••••••••• 26
Relocatable symbols •••••••••••••••••• 15
Resetting the location counter •••• 19,35
Restriction on
general registers .••••••••••••••••• 22
symbols •••••••••••••••••••••••••••• 16
RR format •••••••••••••••••••••••••••• 45
RX format •••••••••••••••••••••••••••• 45
Sample of pr~gram linking ••••••••••••
Sample of XIO instructions •••••••••••
Sample prJ gram in Basic Assembler
language ••••••••••••••••••••••••••••
Sample seluence of statements ••••••••
Self-defining terms ••••••••••••••••••
Self-defining terms,
character .•••••••••••••••••••.••••.
decimal ••••••••••••••••••••••••••••
hexadecimal ••••••• w • • • • • • • • • • • • • • • •
Sequence Jf definition of constdnts ••
Sequence of I/O instructions ••••.••••
S er i a 1 I/O c han n e 1. . . . • . . . . . . . . . . . . ..
Set program status wor-d .•••••••••••••
Short coding form ••••••••••••••••••••
51 format ••••••••••••••••••••••••••••
Source program •••••••••.••••••.•••.•••
5 pac i n 9 and 5 kip pin g • • • • • • • • • • • • • • • •.
28
37
76
13
14
15
14
14
32
40
J ')
4B
10
47
~
.3')
SPSW ••••••••••••••••••••••••••••••••• 48
SS format •••••••• ~ ••• ~ ••••••••••••••• 48
Stacker selection.................... 38
Statement components ••••••••••••••••• 11
Statement formats •••••••••••••••••••• 11
Statements, sample sequence of ••••••• 13
START instruction •••••••••••••••••••• 34
Storage addresses ••••••••••••••••• 18,20
Store halfword {STH) ••••••••••••••••• 52
Subtract decimal (SP) •••••••••••••••• 58
Subtract halfword (SH} ••••••••••••••• 53
Subtract registp.r (SR) ••••••••••••••• 51
Summary of Basic Assembler
instructions ••••••••••••••••••••••• 82
Summary of character codes ••••••••••• 89
Summary of condition codes ••••••••••• 88
Summary of diagnostic messages ••••••• 86
Summary of laCS macro instructions ••• 41
Summary of I/O instructions •••••••••• 84
Summary of machine
instruction forma ts •••••••••••••••• 44
Summary of machine instructions •••••• 83
Summary of UF codes •••••••••••••••••• 84
Symbolic addressing •••••••••••••••••• 20
Symbols •••••••••••••••••••••••••••••• 15
Symbols,
absolute ••••••••••••.•••••••••••••• 15
defining ••••••••••••••••••••••••••• 15
external •••••••••••••••..••••••.••• 15
relocatable •••••••••••••••••••••••• 15
restrictions on •••• ; .•••••••••••••• 16
System/360 Assembler
short coding form •••••••••••••••••• 10
Sy stern config ura tion. • • • • • • • • •• • • ••• 6,7
0
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Table look -up. • • • • • • • • • • • • • • • • • • • • • ••
Tape Versions Basic Assembler
program ••••••••••••••••••••••••••••
Test input/output and branch •••••••••
Test under mask (TM) •••••••••••••••••
Time requirements,
card version •••••••••••••••••••••••
ta pe ver si on. • • • • • • • • • • • • • • • • • • • • ••
TIOB instru ct ion. • • • • • • • • • • • • •• • • •• ••
Translate (TR) •••••••••••••••••••••••
Types of constants •••••••••••••••••••
75
75
39
68
29
UF code ••••••••••••••••••••••••••••••
UF codes, summary of •••••••••••••••••
Unit and function code •••••••••••••••
Unpack (UNPK) ••••••••••••••••••••••••
USING instruction ••••••••••••••••••••
37
84
37
56
23
Valid names, examples ••••••••••••••••
Valid oper.-ation codes, examples ••••••
11
12
73
39
67
Warning messages ••••••••••••••••••••• 74
Writing a program in Basic Assembler
language •••••••..••••••••••••••••••• 76
XIO instruction •••••••••••••••••••••• 37
Zero and add (ZAP) ••••••••••••••••••• 56
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Source Exif Data:
File Type : PDF File Type Extension : pdf MIME Type : application/pdf PDF Version : 1.3 Linearized : No XMP Toolkit : Adobe XMP Core 4.2.1-c043 52.372728, 2009/01/18-15:56:37 Create Date : 2012:05:26 09:53-08:00 Modify Date : 2012:05:26 14:28:08-07:00 Metadata Date : 2012:05:26 14:28:08-07:00 Producer : Adobe Acrobat 9.51 Paper Capture Plug-in Format : application/pdf Document ID : uuid:031bbc3f-f042-4bc5-9649-4d09dd039d34 Instance ID : uuid:ba0e0675-3750-45b2-b573-5b7bb02d850c Page Layout : SinglePage Page Mode : UseNone Page Count : 112EXIF Metadata provided by EXIF.tools