Graham_Magnetic_Recording_Circuits_1980 Graham Magnetic Recording Circuits 1980
Graham_Magnetic_Recording_Circuits_1980 Graham_Magnetic_Recording_Circuits_1980
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(
MAGNETIC RECORDING CIRCUITS
Ian H. Graham
'-
Mr. Graham is presently the Senior Staff Scientist to the Recording
Technology Center of the MEMOREX CORPORATION, Santa Clara, CA. 95052
(
TABLE OF CONTENTS
PAGES
I NTRODUCTI ON
1.1 - 1.10
THE HEAD STRUCTURE (General)
2.1 - 2.9
DISC - TAPE STRUCTURE (General
3.1-;LS
HEAD CIRCUIT
4.1 - 4.6
HEAD PERFORMANCE
5.1 - 5.16B
WRITE CIRCUnS
6.1 - 6.25
READ PREAMPLIFIERS
7.1 - 7.27
MATRIX CIRCUITS
8.1-8.11
SAFETY CIRCUITS
9.1 - 9.25
DATA DETECTORS
10.1 - 10.34
LINEAR AMPLIFIERS
11.1 - 11. 44
DATA CLOCKING, PHASE LOCKED LOOPS
12.1 - 12.46
DATA RECORDING CODES
13.1 - 13.30
RECORDING CHANNEL TESTING
14.1-14.15
.
HIGH DENSITY DrSK DRIVE
(
ltroductior.
TEC~OLOGY
P.otating storage devices have traditionally occupied a
nic.~e
to
themselves by providing low cost storage of large amounts of data.
Slow access times always characterize this area of storage.
This
is in contrast to the core and semiconductor memories which feature
fast access but at high cost.
With disk or drum memories, large
amounts of data can be made readily available to the computer as
"on line" storage.
History
During the past twenty years of disk drive developme;nt, the
cost per stored bit has gone down cOnsiderably while the amount of
stored information per machine has greatly increased.
The earliest
disk drives used 24 inch fixed disk arrays with hydraulic accessir.g
mechanisms.
These were usually for large size computers. Their
physical size usually precluded their use with small office
computers·.
With the invention of the removable 14 inch disk and disk
asse~~lies,
a new market was opened up providing disk drives to the small
computer user.
These disk packs could be removed and stored at will.
Programs were written to call for a certain pack or packs to be
installed to complete the job at hand.
The concept of a resident
computer program further increased the use of disk files.
The capacity of disk files increased with each new technology step.
In order to permit these technology steps, improvments needed to be
made to the disk surface finish, the magnetic coating materials,
the air bearing pr air lubricated head construction, the read/write
head positioning !rechanism and associated electronics, includi:ng
the logic family, used to control each machine function and many
1.,
_ . 'other areas.
)
Each new i~rovement: required =ine:- tolerancing
of most: parts 'associat:ed with t:he disk drive mechanisms.
Higher storage densities are usual.ly achieved by increasing the
radial track densi t:y and the circumferential bit density.
Increasing the track density has been a problem largely contrclled
by the tolerance build up of the mechanical parts associated
with the disk drive spindle bearing syst:em and the access mechanism.
With the invention and successful. implementation of a track
following servo system, further increases in track density were
possible until the tolerance build up associated with pack interchange forced the designers back to the concept of fixed disk
st:orage again.
By now, t:he ar.xJunt of storage per disk drive and
)
the present requirement to have all dat:a on· line to the computer
at all times has reduced
~,e
need for pack interdlange thus ma'dng
possible still further incre.ases
in track density.
Track densities
have been increased from about 20 tracks per centimeter to a present
}7~
value of 189 tracks per centimeter.
Developments presently underway
in track following teclnliques involve the individual addressed
head with staggered serVo data and read-write data.
This may
eliminate these last barriers and permit removable padcs on very
high density machines.
o
Circumferential bit densit:y increases usually require reductions in
magnetic head to disk surface spacings.
These changes have not come
.i
easily as the finish or flatness of the disk surface must be
improved with each decrease.
The magnetic oxide coating materials
must ehange a.long with the size and shape of each magnetic oxide
l · 2.
(
--
a~d
the disk sur=ace
---------_._--,
the magnetic head
...
was controlled by forcing
'£o!!i>~ssed ail' _betwe_en.~~_!Wo __sw::'fo!:ces~
An inVentive application
of air lubrication princi~es ~rovided the' present self lubricated
--------- ..
-~.-----
head air bearing.
•• , - - - - - , . - • •
-
#-
..
-----
------------------ .,--._--_.-. - ---
---
Typical spacings started out at around 12 microns •
-~ ------~.-."-----......---~--
--
••
Today the head to disk
-
--.
spaci~g
is
aro~d
....._ - - - - - - - - _ .
a half micron.
----------.-...-,--,. -
-.~--.,.... ....
....
.....
--
'--
-
The gap
.~
between the magnetic pole pieces of the head have also been reduced
to permit closer bit spacing.
---,.~.---
used_~~oun~'
Values presently
" - - _.•, - - - - _ . _ . _ - - " ' .• ' .--- .-."..-:!'_.- ---
1 micron.
The mater:.i~~:~t-~_.~e_ t~~_ .~ead pole pieces have
changed from permalloy to ferrites because of the increaseq
------------------
frequencies involved in record and read back fu-,ctions.
-----.---.----~--.
-- ----- _----------,.
..
..
------
Requirements for increased logic speed have brought their own
family
of improvements.
These range from the vacuum tube or valve,
through transistors to the. present specialized integrated circuits.
h~ve
Typical data speeds
gone from 1 bit per 100 microseconds to a
present 1 bit in one tenth of a microsecond.
Storage capacities
have changed from one million bytes per machine to over 300 million.
These rapid improvements and increases in capacity will continue
for at least another decade.
There are designs on 'the drawing
boards of several manufacturers that will permit a four to eight
fold increase in capacity within the next two years with no real
end in sight.
For each limiting factor new technologies have been
invented.. For example, as track densities increase, the width of
The head materials presently used have a grain
a track decreases.
' il
size equal to the track width of the next generation disk
Already "many firms are working on thin film beads.
9::'~~s..
These heads
are made by depositing thin filIns of magnetic metals or alloys to
, . 3.
.
dimensions far smaller than the grain size of the Dest
ferri-:~s.
The disk coating materials, which presently consist of
~ir.y
particles
of ferric oxide bonded in an epoxy resin layer of about
one micron thickness, will be replaced with thin films vacuum
deposited on the disk at thicknesses approaching 50
a micron or
thousand~~s
of
5 X 10- 8 meters.
Tremendous improvements have been made in the codes used to tra,"lsmi ~
the data.
Error detection and error correction codes permi t
accura~;
data even with disk defects encompassing more than a whole byte of
data in a record.
Concepts have now been developed which per:r.i t a
disk surface defect to be skipped during the write process.
:urther
improvements in addressing will permit many such defects to De
transparent to the user.
Competition
The extension of disk drives as low cost, high density storage
devicer is ,expected to continue for many years to come.
Magnetic
recording requires low en,ergy per bit to write and takes a short
time to write.
a bit.
There is a lower
limit
to the time needed to
-----'--.
;;-------------_._-----,
It is controlled by the domain switching time of the disk
coating material.
~econds
~ite
--~------~-~
For ferric o~de films th~~~:'~_ou~-50 ~~'"'lo
or about half the present bit spacing time.
Transmission
speed is therefore limited to 20 million bits per second.
The
actual density of the recording for both track density and
circumferential density is limited only by the magnetic domain
size. This limit will not be reached for many years.
\
Competing technologies are electron beam, holographic, semiconductor RAM, charge coupled devices, and bubble memories.
Of
these, holographic and thermal electron beam memories are slow
writers.
Certain dyes permit write, read and r:ewrite capability
/. 4.
'-
for holographic memories but most are read only devices.
The
same limitation to read only after an initial write is true of
thermal electron beam memories.
Their usefulness isUmi'ted
. 'to large library storage such as legal cases or court histories
where the data does not need to change over many years.
Bubble
memories t charge coupled dee/ices t semiconductor-electron
~ear.:
.
"
and semiconductor MOS and bipolar RAM will cotDpete and replace
core meIlDries or fixed head per
tra~
,
machines within the next
few years but they cannot replace the large capacity disk drive
without a more than tenfold decrease in cost and a more than
doubling of the world's semiconductor capacity.
Such is not
likely within ten years.
Fu'tUI'e
I suppose this is the hardest part to summarize.
Since there is
easily an eight to tenfold increase in capacity presently
l
available wi'thin the cUrrent technology t one ~ght suppose further
technological changes might produce another decade increase in
capacity.
The amount of data ,available in a single disk drive
could well become 30 thousand million bytes by 1990.
Thru put is
limited to 2.0 million bi ~J~~_*:_~~d~~__2.~ 5 million bytes per
second because of the magnetic domain switching time limitation.
This may well equal the best channel acceptance times of the next
generation of computers.
Byte size may be increased which will
reduce the cycle time per byte.
Interleaved by by.te records can
double circumferential density without increasing channel speeds.
Staging devices may be employed to buffer the 'disk data and the
channel.
Presently a storage control unit is required for a group of drives.
I • 5.
';"
,
,
.'
,
;.'.:; Ct.. -': .. ',
This storage control unit has its
tha~
perfortlS all
large number of drives.
microprocessor.
microprocessor constructed
It is controlled by a resident
of discrete logic blocks.
microprograr.:
0Irn
~he
housekeeping functions for a
Future drives may each have their own
Each drive may then be tailored to a specific
storage function by means of its a ..-n r.rl. cro?rogram.
.~,
.
Many
presently per=orned"by the controller or even the main
can now be delegated to an integrated drive.
for storage is an easy task for such a drive.
~asj(s
co~put:er
Processing of data
Processing the
data prior to transmi ~tal to the main computer is an easy step "
particularly if we have individualized disk drives that are
tailored by a
par~icular
nicroprograrn.
Combinations of disk
and mass tape systems are currently available.
dri~'e
Their future
usage may well place a company or government in real time control
)
of its re'sources or. records.
Conclusions
Disk drives offer large, non voli tile data .storage that is
accessible in miliseconds.
It has an advantage of not requiring
periodic replacement such as tapes.
Destructi.on of data due to
catastrophic malfunctions such as head crashes have been
,
minimized by the use of low mass, light load magnetic heads in
sealed environments.
Data storage and retrieval 'has made possible the present growth
in computer technology.
As the storage capacity of a computer
installation is incre ased so is its capacity to handle complex
programs.
Presently there are a few programs developed or being
developed that require very large data bases.
These are mainly
iIi the field of simulation, IOCldeling, and patterz{ analysis. As
these fields progress in their complexity and capability larger
/. 6.
~.
data storage devices will be required.
Co _
---
, i
.'..,
,,'.
?~se~tly
The technolObJ
available can provide storage capacities that challenge
C~
ability to manage them.
ea~a
Considerable work is needed in
management and programming to provide the type of environment
needed to handle large data base systems for tomorrows research
and develo?rnent.
As
our data base exp.:nds, so do the
:,is~s
-;0
the freedom of individuals caught U? in such a ner..rcrk of data
storage.
Responsible governments will, therefore, need to
guard against such encroachments.
c
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..
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......
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200
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1960
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1965
1970
1975
1980
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I
- 11
.Summary
High Density Disk Drive Technology
The developoent of the digital cor.Iputer has required. a
parallel development of storage devices.
Of the many available
'technologies for data storage. magnetic disk drives lend them.selves to the best solution by providing lew cost, easily
accessible, non volitile storage.
The history of their develcF-
ment extends over 20 years first with the drU!n memories and then
disk memories.
During this period storage capacities have
increased over a hundredfold while costs have tumbled making
todays cost per bit the lowest in history.
The paper presents
some of the history of the development of the disk drive by
outlining the major improvements in tec.tmology tha't have tcken
place.
A comparison· is provided that cOUlpares the various other'
technologies used for data storage and lists some of their
advantages and disadvantages.
The trend towards larger data based systems and the storage
devices needed to handle the storage ,requirements of the future
is
discussed.
Some concepts of future usage couple the now
popular micro processor with the disk drive which can provide
a compact intelligent storage ·dence.
This power is only hinte~
at in the drive and controller combination which is presently
in use.
The controller portion can be expanded to process much
of the data before it is passed on to the computer instead of just
doing housekeeping and sequencing.
I ~ 9.
•
.
\or..~
iker
1
I ....
He was educated
of Ar:-,erica in
an aviation
in·Austra~a
~951.
and
retu.~ed
He served in "::he U.S.
e~ectronic
technician.
~avy
for
Batche~or
degree in Electrical Engineering in ~960.
.....
l~;
~930.
to the lnited States
4 yea.::'s
Upon discharge he
The University of Uta.'1 and received his
\Jl~''''
..',
__ )
l~
Ian Graham was born in Rexburg, Idaho U.S.A. in February,
t ~.
as
at~ended
of Science
Fo~owing graduation
he worked for IBM Corporation for 9 years working on the
deve.loprr.ent of ::;agnetic disk drives.
Corporation.
In 1969 he joinec Memorex
He is presently the oc::mager of ~eco·rding Tec!'... olcgy
and has the responsibility of
superv~sing
the development of
al~
disk read/write functions within Memorex.
/. 10.
-
--
---
-_.
PUBLICATION
ALL klGHTS
INll~JLJ
RESERVED
.-
RECORDING ELECTRONICS
THE HEAD STRUCTURE \
The magnetic head is a modified tOII..oid of magnetica-Hy penneable
material.
It is provided with an air gap and a suitably dimensioned window
around which a coil is wound.
The shape may vary with ,intended use but
every attempt is made to keep the structure magnetically efficient.
The terminology is illustrated in Fig. 1.1. The core has some thickness
and width.
The width defines the track width recorded on some media.
The
throat height is the thickness of the core at-the air gap, and the length
of the gap is referred to as the gap length.
(
The c05l i s usually referred to by the number of turns and whether it is
centertapped or not.
The ring structure is the one most used in the literature, particularly
in writing the equations describing its action or interaction.
No attempt
will be made here to go into this aspect, but it is well described in the
literature, Hoagland and Karlquist being the earliest authors.
For our purposes we will be satisfied by looking at the field lines
and their behavior, as affected by the various mechanical dimensions.
The
magnetic fields produced by current in the windings is mostly developed
across the higher reluctance of the air gap.
The field lines leave the
higher permeability core surface normal to that surface and seek the
opposite side, tenninating normal to that surface. _
2.1
- -
--- " - - - -
-----
PUBLICATION INTENDED. ALL RIGHTS
TA.tc,4".
~
FIG
~
t· I
fiG
GIfP UNGTtI
RING
I' 2
Ift""-'
- -.,..-- -
-
kLjtKILU.
1"\
HeAP
rIEL])S
2.2
PUSLICA110N Ih1ENDlD. ALL
RIGhl~ kt~lkWi0.
THE HEAD STRUCTURE
f
The field intensity is greatest within the gap and.diminishes with
increa'sing distance following the inverse square law.
Fig. 1.2, the field expands out from the gap.
As can be seen in
It is this portion of the
field that is used for writing, the remainder is wasted.
Obviously, the
_c_l_o_se_r_t_o_t_h_e___
9i!P_t_he__ ~di a_is_k_e_pt_,__~he more effi.c ; ~nt.. _~h~ .. ~T_~ ~~P.!"Q£~.s~ .
This separation then becomes a fundamental parameter in the recording and
I
reproduction process.
In hard disc drives it is referred to as flying height and in tape drives
as separation.
In tape applications where the tape is expected to be kept
in contact, any separation of the head and media is deterimental.
drives it is deliberate and is part of the design.
In disc
This is necessary in
order to minimize head-media wear expected at the higher velocities used.
Other structures that have been used to date include those shown in
Fig. 1.3.
The windings may be either around the core itself or around the
back bar.
This structure has been implemented in ferrite in the IBM 2314,
------------
and 3330 machines.
----'---~~
......
-
~.,---
There are two back gaps that are shorter and larger
in area than the main gap.
efficiency.
~--
Here the reluctance is minimized to increase
The CI structure was used in all the earlier disc machines
from the IBM Ramac 350 to the 2311.
The pole pieces were made of laminated
Permalloy in order to reduce both core and hysteresis losses.
poor back gap contact in Fig. 1.4.
Notice the
This was due to the slight angle neces-
sary to produce the front gap using lapped parts.
This head structure was
later abandoned due to the poor frequency response of the thick laminations
of the Permalloy.
Ferrite afforded improved penmeability at higher frequencies
2.3
...,
r
ff~"".4L1';
LAMINA TI&1Nr
C I
fIG
5
rl?vc- T vI?. £.
.:
-",
.
'/"
A'/.., 6.41'
r(Yl Cli';~' Re I.~ (. lJ~',{-c
f/~
I·
3
PUBLICATION INTENDED. ALL RIGHTS RESERVED.
2.4
PUBLICATION INTENDED. ALL RIGHTS
THE HEAD STRUCTURE
'"
-"t .... '"
\
RE~£RVED.
{"'"
-
~~'
-
\'
and was therefore used extensively for the next twenty years until grain size
---------~------------------------ ----,-."
became 'comparable to trackwidths.
#_....--...?_
__ •
-"1111.
~
..... _ " " ' - _ . _
----------~
.......
IBM announced the Winchester head in its 3340 product in 1974.
Its
--c=-----
structure pennnted19wer flying heights with less mass and therefore
a lower
.
----
----------------------------------------------.
loading force with less energy content on contact. Its structure
,;
...............
is shown
in Fig. 1.5. A small C structure is bonded to the face to provide the gap
and the co 11 wi nd i ng wi ndow . The two outs ide ra 11 s, A, B,' cons t i tute the air
. bearing surface, replacing the large ceramic or barium titanate sliders used
in the earlier high mass heads.
The center rail carries the head C core and
is machined to the width of the track.
There are variations of this slider .
form usi'ng only two rails that carry two head C cores or two thin film heads.
Sometimes this structure has a machined cavity that produces a low pressure
~
area.
This low pre$sure area is balanced against the high pressure area
under the rails to make a self loading slider that does not require an
external load
force~
The ,earliest heads required an air supply to 'establish
the air bearing required to'maintain head-disc separation.' The,development
of a self lubricated slider removed the requirement for a pressurized air
supply.
These heads were loaded onto a. spinning disc through a cam arrange-
ment with a load of 350 grams.
was stopped.
The heads required removal before the disc
With the introduction of the Winchester head, the head load and
mass were low enough to permit contact start and stop, thus permitting a
sealed environment.
A comparison of the two types of air bearing is shown in
.-....:: ...
Fig. 1.6.
The dimensions are exaggerated in order to show the principle.
--_ _-_...
2.5
'.
PUBLICATION INTENDED. ALL RIGHTS RESERVED.
c)
)
3'fO} ...
LOM?
I
~
/
(j /~ P
'- Q CArrlN'.)
2.6
PUBLICATION INTENDED. ALL RIGHTS RESERVED.
THE HEAD STRUCTURE
The next head type used is the thin film head, so named because it is
manufactured using thin film techniques.
Here the various parts of a head
are deposited as films of magnetically permeable materials such as Permalloy,
conductors such as copper or aluminum, and various insulators.
The precision
of photomasking techniques permit precise trackwidth control to dimensions
down to the sub micron level.
in Fig. 1.7 A and B.
The structure of the thin film head is shown
The actual shape of the vaiious etched deposits varies
with design.
The return to a Permalloy core structure is pennitted because the core
losses are greatly reduced.
The very thin films permissible by the technique
reduce these losses significantly.
In tap,e drives the core material remained Permalloy for a long time.
This was due to the relatively low tape velocity compared to discs.
they have moved to ferrite to improve frequency
respon~e
Recently
and head wear.
Their
structure is not uhlike that previously given, except that multiple heads are
sandwiched together to provide the required number of parallel tracks simultaneously used.
guides.
The tape is held in' contact by the use of pressure pads and
Some heads have two cores per track:
One specifically for writing
which has a wide trackwidth and a wide gap length; The second head follows the
the Write head in tape direction and is constructed with a narrower trackwidth
and a narrower gap length.
This is done to reduce off track positioning errors
and to improve the Read frequency
response~
Disc heads must, of neces'sity, be a compromise in gap length, as they are
used for both reading and writing. Fig. 1.9 shows why only one head is used.
2.7
PUBLICATION INTENDED. ALL RIGHTS RESERVED .
.
....
,
ti,.\
"/
,'flI41'U.#
,).
c,x'
FIG.
fI61'7~
I· 7 AT(~"'I
fll..('1
/-ItfAj)
TRPe
HeAp
2.8'
r-- R,4r;;,,4(
"'\
,
[We j
1/
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.10
PI] K
(-{ tAP
PUBLICATION INTENDED. ALL RIGHTS RESERVED.
2.9
PUBLICATION INTENDED. ALL RIGHTS RESERVED.
RECORD ING ELECTRON I CS
()
DISC/TAPE STRUCTURE
Magnetic tapes have long been manufactured using a backing material
usually of plastic, but earlier tapes used paper.
used, as it stretches or deforms less.
-
Today Mylar is extensively
The magnetic material is gamma ferric
oxide imbedded in a binder and coated onto the surface of the backing uniformly.
Calendaring, a Memorex invention, was later used to reduce the surface
roughness and hence head wear.
Discs are made from an aluminum alloy blank stamped from sheet stock of
high purity.
The blank is then polished such that its flatnes's is controlled
A mirror finish to within a light bQnd is the result.
within microinches.
This disc is coated with a slurry of gamma ferric oxide and a
s~itable bi~der.
Down through the years this ,coating has become thinner and thinner, going
from about 1 mil to
35~"
in twenjy
~eg;s.
Chang~s
in formulation have occurred
to improve coating hardness, uniformity, coercivity, particle size, particle
dispersion, and adhesion.
-----
Gamma ferric oxide has been used extensively due to its fairly
hysteresis
'"-
-
curve~
.
--------
squa~e
-----~~--
This curve relates the Band H fields as functions of the
intensity (see Fig. 2.1).
It is noted that the permeability of the oxide
changes both from field intensity and from past history.
What makes the
particle so useful is the ease of saturation and the retained B field, Br.
This·is the chacteristic that permits recording.
In saturation recording
the coating is saturated first in one direction and then in the other as a
3.1
(
-------------+----+---~--------------~
Ii
\
--"'-'=-+- ....,
--
f
fl6- 2· ;
(
N
':
5
--
",
,
- - -'" :' _ .-::' ,.'-~' : :' , ~.c_. -. ~ .~ ",;
oS
".
,. ~':
___ - .. - _ . _.
~ ... "
/
.
~-·-~'-~-7·- ~'~- ,~(~ ·~-'~ -·-\~;-(;~ -~ -r~.:~.~ J-J~.~.- ~ ~.'~-~ ~:~ ~p:~ ~ ~:~;'~.~/~.~ ~~7:-~-;~;~~=:~~-;~=~;~~~~~~~~~~~~' ~.:~
f /6-
2-2
7 A P-.: -
.P/J(
PUBLICATION INTENDED. ALL RIGHTS RESERVED.
3.2
PUBLICATION INTENDED. ALL RIGHTS RESERVED.
DISC/TAPE STRUCTURE
function of the data to be recorded.
determines linear data density.
,)
The spacing between flux reversals
The linear distance is divided into cells
to which is assigned a bit of known value, thus on play-back (read) each bit
is reproduced in its correct cell and the data is recovered.
or tape magnetization pattern is illustrated in Fig. 2.2.
is taken longitudinally along the track.
A typical disc
The cross section
The location of the N,-N juxtaposi-
tion or S,-S juxtaposition is referred to as a transition, the center line
being the exact location of
t~e
transition.
Since this is the moment at which
a moving head sees a maximum time rate of change in flux, a voltage is
developed in the coils surrounding the core as the core gathers the flux, due
to its higher permeability than the surrounding air.
tion will suffice for here.
This simplistic explana-
More precise development of the theory is given
in the literature.
The surface of discs is polished to the desired flatness in order to
minimize the head-disc spacing variations.
Any variation in flatness is seen
by the head as an up and down motion as the disc rotates, which excites the
mass-spring mechanics of the head, causing further head-disc separation and·
possible contact on the negative excursion.
Contact has been a problem with
the high load, high mass head, as the disc is damaged extensively due to the
energy of contact.
Particles are removed which further contaminates the
air stream under the head, which causes further disturbances and further contact.
The final effect is called a crash.
with the Winchester style slider.
Crashes have essentially been eliminated
Some disc manufacturers deliberately add
. alu~a particles to the coating slurry in orde.r to force a contacting head
)
3.3
PUBLICATION INTENDED, ALL RIGHTS RESERVED.
(
---- - - - - - - - - -..........--,-.......,...----,-:--1. - - - - - - .'-7----:---:---:---,...--------(("fl'.
,/"11
I I I -I l \ \ ' - - - ' ',' . , ,
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(
3.4
PUBLICATION INTENDED. ALL RIGHTS RESERVED.
DISC/TAPE STRUCTURE
to rebound from the hard particle. A problem with the alumina is that it is
non-magnetic and therefore represents a magnetic discontinuity which is read
by the head as a noise voltage.
Size control is required in order to keep
the top of the particle below the expected position of the head.
the Winchester head is deliberate durlng start-stop operations.
coating is given a
.. )
t ..
!~_l~·n~c__
o.:..-at.:..-l...:.·n-=g~o.:...f~a:-.f_l..:.;.uo.::...r:....;o:..;;c;..;;:a;.;..r-.bo=n~in
Contact of
The disc
order to improve its
wearability without causing stiction.
The coating, thickness influences the spacing between transitions.
Hence
as the data density has increased, so the coating thickness has reduced. This
effect is easily seen when one considers that the field required for saturation must emanate from the head gap which reduces as the inverse square of
the distance from the gap.
The further the field must penetrate, the larger
the initial field; therefore the wider the field lines.
If point 0 on Fig. 2.3
is 300 De or saturation value, then the particle at A is not saturated.
But
)
if A is.300 De, then 0 is much higher and i,ts influence extends to E and F,
thus widening the field or reducing the obtainable density.
the head is above the 'media
~
The height of
has the same effect of reducing the potential
transition density.
')
3.5
PUBLICATION INTENDED. ALL RIGHTS RESERVED.
RECORDING ELECTRONICS
(
HEAD CIRCUIT
In order to write a transition, current must be passed through the coils
of the head windings first in one direction and then in the other in time
with the imaginary cells assigned to each bit recorded on the moving disc or
tape.
To see the effects of such current reversal, we need to develop an
equivalent circuit for the head.
We expect it to include resistance due to
the conductivity of the wire used.
and the core structure materials.
wiring capacitance.
(
we would also expect interwinding and
See Fig. 3.1.
as illustrated in Fig. 3.2A.
It must have inductance due to the turns
This then becomes a simple RLC circuit,
The equations for a step current in LaPlace
form concern the voltage developed across the head windings as well as the
current through the head windings.
(3·1)
=
NS
= I(s)
(
(
1
CS (LS+~)
1
CS + LS+R
)
S+R
L
SC(S2~S +.1..)
L LC
(3·2)
)
(3·3)
This can be rewritten as (3·4) which is the standard form:
I(s)
(
2~W.
)
SC(S2+2l;.W nS + Wn2)
S +
(3·4)
4.1
.
.
~
.7
\
..
L
>.
c
rl'
1'1.
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IpMtJf.
)
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C,
N,
r(G.
'z
~z.
,3·ic
)
PUBLICATION INTENDED.
ALL RIGHTS RESERVED.
HEAD CIRCUIT
The current through the head winding which produces the flux is simply the
voltage divided by the Rand L of the head.
This is not exactly true, since
the interwinding capacitance plays a role in the true current, but it is
sufficiently accurate for our purposes.
= ~ =
I(s}Head
R+LS
.\
(.
R+ 1
+ LS
IT
which reduces to Equation 3.11:
V
_ _I~(s~)__~_____
(s) -
C(S2 +
Rf
+
&: >
(3.11)
when written in the standard form it becomes Equation 3.12:
(3.12)
)
Similarly we develop the current equations as before:
_
I(s)= ~(s) = I(s)
2
LS
LCS(S2 + 2~Wn +.Wn )
(3.13)
= I (s) W2.n
(3.14)
S(S2 + 2~WnS + Wn2)
We neEd both equations 3.12 and 3.14 as they describe the voltage swing across
the head during a a write and the current wave form.
make
~
With R properly chosen to
= 1.0 for no overshoot we obtain the case of no 'ringing in either
voltage or current.
Practice shows that a
-_.+----- ----..
-~'-.->~-.-
~.
of .95 is best as it improves
.. --""--'------.-~-.-
-----_.
---.-
-
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PUBLICATION INTENDED. ALL RIGHTS RESERVED.
HEAD CI RCU IT
_-------
the rise time
with minimum
ringing.
-... _--, ..
-_.----_
1s acceptable.
The actual overshoot is about 3-5% which
When the current 1s measured using a current probe, the ideal
waveform is not seen.
We see a
cap~citor
equatiory
~an
To see why, we must relook at the equivalent circuit.
and a resistor on both sides of the current probe.
f"
3'lc
The
be modified and does reflect the true waveform.
Where Rp' Wnp ' and
'~p
are the parallel equivalents and the terms
with the subscrl Pt 1 are those on the lead side of the probe.
For reading the damping must be adjusted for a
z:; =
0.7.
The reason for this
is that for current we are talking about a time domain response and for reading
we are talking about frequency domain response.
See Figures 3.3 and .3.4 •
. Refering to the current's time domain response and the hysterisis curv.es
for the media as shown in Figures 3.6 and 3.5 respectively, we can see the
ma~netic
effect of ringing of the write current.
The overshoot A, causes
the media to be pushed further into saturation while the undershoot B, brings
the media back out of saturation.
This'is undesirable.
Since the write current cannot change instantaneously, there is a period
of time during which the media sees less than a saturating field.
If the rise
time of the write current is short compared to the time a media particle travels
from one edge of the head gap to the other, then that particle is assured of
leaving the influence of the gap saturated in the new direction.
From this
we can see that the trailing edge of the head gap exerts the final influence
on the media.
4.4
)
.~.
.
,~
,
~
~~
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L
I
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\,..
_ _ _ _ _ --f.... --:-4 -:--.-"..-
,
_.
~I"-' tJ.
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CI •
-i"'"
(t., ......
J
\~
/J
'·0
(
-I·"
fl6
(
J. 6·
II
PUBLICATION INTENDED. ALL RIGHTS RESERVED.
HEAD CIRCUIT
Figure 3.7 shows the positional relationship of a particle of oxide as it
travels within the gap and the field strength it sees at each position.
Clearly current curve 1 takes the particle from -M to +M within the distance
of the gap travel; whereas, with current curve 2 the particle is well outside
the gap before +M level is reached at the trailing edge.
This indicates that
..
the particle will not be saturated and will therefore retain old information.
The saturation is not quite this bad as the write current is usually greater than
required for saturation.
Similarly a particle at the gap center at the start
of the transaction remains saturated at -M as the field when crossing the
trailing edge is nearly zero.
Magnetically the head circuit can be described by a reluctance diagram.
(Fig. 3.8).
sidered.
In the construction of the head these reluctances must be con-
The core leg and back gap 'reluctances total
must be small. compared)
to the front or working gap.
When writing the front gap should be wide in order to assure complete
saturation during current rise time.' Its reluctance will therefore be greatest
as desired.
However, in its construction the core area is corisiderably yeduced
at the throat in order to maximize the external field as shown in cross section
in Fig. 3.9.
The reluctance which is a function of cross section will be
increased, hence the field strength in the area is increased thereby creating
the possibility of pole tip saturation. 'Pole tip saturation effectively widens
the gap as that portion saturated has a 110f 1 like air.
4.5
)
'(
\i:!,::.
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"3,
+ ...
-'-
(
'-L
~
<
,
A>
""\
r
r--.
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,r-
Q
)~
<
-
~
<-!:'
"
~-
~
r
...
o
•
•
1.::.:1.0
••
)0
¥O
~
r-
It'
>
+
1
t:.
77
,- I
c...:::::
,-
r'
--:..
,
,. "' ,.
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-'"
n
n"
-r
j-
I
......
~
,<,
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fl G '3·7
+
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(I' '
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PUBLICA1ION
l~Tl~DED.
ALL RlGHTS
kE~lRVED.
HEAD CIRCUIT
(
In summary, the field strength seen by the media depends on the current
~-------------------------------------------------
value, the ratio of reluctances, the flying
height--or
spacing, and
the coating
---p--,--- - -.--thickness.
The
d~sign
of the head must therefore accommodate all these when
attempting to maximise the lineal transition density.
Also the head inductance
increases with the square of the turns, whereas the output voltage only increases
as a di rect functi on of turns.
Tryi ng to compromi se output a.nd ri se time becomes
difficult because of the inductance.
4.6
"
PUBLICATION INTENDED. ALL RIGHTS RESERVED .
.RECORDING ELECTRONlCS
HEAD PERFORMANCE
In inductive heads which are the only ones considered so far, the read
back
perform~nce
of the head is directly
releated
to the
. - .-...._-_.
veloc~ty o~
the
",.~-
------.
recorded
transition, the
--- number
------ of turns on the_.. _core,
..
- and the. -efficiency of
--'.
.-
the flux gathering paths. The instantaneous read back voltage is then pro-
----- ---.. -.--- '" d'- '.. -"or' The flux resulting from a transition is complex having
portional to KN
field lines changing in slope from some positive value to some negative value
or visa versa over some distance. The work of Karlquist and Hoagland's studies
have provided the basis for these interactions with considerable work done
by others following.
It is not the purpose here to detail the derivations,
but we will use their results.
. KARLQUIST
~J,-
"'\ ~.(y\-f'~
'.J"
(4.1)
Hx (x ,y)
K
J
I
These two equations show that there is
as well as a y component of flux.
Where g is the gap length, x and yare the
component vectors.
Most authors have neglected the y component for simplification by assuming
a thin media;. however, there are features of the read back pulse that can only
be predicted by using the y component.
\\,ri-/r fly..)
_ //~
(
.~
I
,,-.
.'--.....
__
l,--__
)
-.~~
1 (.
.~
",<-c-'-
v'"
9-'-'1)
5.1
PUBLICATION IN/ENDED. AlL RIGHTS RESLI\VED
HEAD PERFORMANCE
K~M1X(X
The idealized thin media pulse is given by:
.
e (x) ;
-,
- i) Hx(x)dx
= (M 1X*Hx)
x
where * is the convolution.
,There are several other derivations that should be looked at besides the
.
'
.
arctangent equations.
Lorentzian versions.
Others have used the Gausian, Lorentzian and modified
We will use the results of their work here, but will
not go into the magnetics nor derive the equations.
Our purposes will be
filled as we understand the effect of the various parameters of the head on
the read back and writing process.
As expected the center of the transition is the point of the maximum
time rate of change of the recorded flux; therefore, the read back voltage
will be a maximum trailing off on either side. We will use the . Gausian or
(-
bell shaped
c~urve
for understanding as shown in Figure 4.'"
pulse as an isolated pulse.
Hoagland and others have shown
posit10n holds for this pulse.
We refer to this
tha~
linear super-
Therefore as we record'positive and negative
transitions alternately on the disc the resulting waveform will be a train
of positive and negative pulses of the general shape shown in Fig'Jre 4.1.
As these pulses are crowded together we 'can use superposition in order to
predict the resulting waveform or interaction.
In Figure 4.2A the peaks of the two pulses do not interface, but there is
interferen~e.
between them.
The resultant waveform remains nearly the same in
peak-to-peak amplitude, but does not return to the base line between them.
Figure 4.28 the spacing is closer.
both amplitude and peak position.
H~re
In
the pulses interact strongly, influencing
Note the reduction in amplitude of the resultant
peaks and also the shift in position of the peaks compared to the original.
Sinc~
a train of data is time dependent as to its value in a data stream, this
shift becomes significant.
We refer to the shift as bit shift or peak shift
5.2
T
c)
)0.,
1
i
('\
to)
fOJ
~ fl.Js~--?>'
J
fIe.
if -/
Ij",,...Uy
IP~I'1('
)
(It;'
4 -2 A
5 uP!! tfl'Oll /,0 fJ
.;.~
fJP
1'1/ LJ e po.J1 Tt o,v .
L IA./ tAft
A
f&ll..1 (;
'N7€A4c r,.::>A!
I JJ
i/o 1'1'(
,,'"
Ue
/-I,...,A,rtJi:>6
)
PUSLIC~TION
INTENDED. ALL RIGHTS RESERVED.
HEAD PERFORMANCE
(C."
and it results strictly from pulse interaction.
If we were to test the peak amplitude of the read back waveform as a
function of transition spacing or transition density, then we get what is
called a transition or bit density curve.
This is shown in Figure 4.3.
Each head and disc combination has its own curve depending on their
many parameters.
Bit shift
OT
on the same graph coordinates.
transition shift can also be similarly plotted
The extension of the amplitude curve relates
to the wavelength of the transition spacing and the gap length.
If the gap
field includes two transitions the net flux is zero, hence a maximum at B
in Figure 4.3.
The head disc parameters are gap length, throat height, flying
height or spacing, media coating thickness, media coercitivity and remenance,
(
and head core reluctance.
Amplitude is affected by throat height, head
spacing, coating thickness and remenance particularly in the flat or noninteracting portion of "the curve.
The point at which the roll off occurs is
affected by gap length, flying height, coating thickness and media coercitivity.
From the above it can be seen that some parameters affect both amplitude
and roll off.
Generally speaking, if we want to increase transition density
we need to fly closer, use thinner media of higher coercive force and use a
narrow gap head.
All this shows up in the equations for PwSO or the
~
voltage
pulse width of the isolated pulse as shown back in Figure 4.1.
There is an equation that has been derived to express the PW50 in terms
of distance.
S.3
~
·7f
III
~
;,
(.I, ~ q S .....
~'
d. 'i ~ tt
-f(~)
~46Y\e..q-
...
"
...
-
i
~.,
t
4t.
(~)
.....
"(lZ.~
'K."'
-
~
.
."'.
FC~--b>
)
____ 6
FIG-
PUBLICATION INTENDED. ALL RIGHTS RESERVED
HEAD PERFORMANCE
6\\r..
,S"-
y~
~'.
PWSO
=
Alg2+ 4 (d + a + 15)(d + a)
'V
Where g = gap 1ength 1M 1'''
d = head media separation I4/' /""
t = media thickness.'N' /"" (1.,1.51\a = trans.ition length IN,IA-
(4.3)
----,1-++---
--
"f1..AcK ... en
The transition length hus been expressed as 'a' for NIZn ferrite heads.
a =
cS
"2
(
Br
(4.4)
Hc- Kd
No mention is made of the field spreading effects of finite rise time
nor of the core reluctance and permetivity. Kd is an empirical number equal to
0.75 for particulate media and about 0.9 for thin metal films.
does not hold too well for MnZn ferrite heads.
The equation
A possible explanation is that
NIZn heads usually have a magnetic dead layer therefore flying height is
incorrect as is possibly the gap length.
If it were perfectly annealed, the
equation for 'a' might be in error due to Kd not counting the effect of finite
rise time.
If we observed an isolated pulse on.an oscilloscope, we would see a slight
asymmetry and a trailing undershoot.
Going back to the earlier Karlquist
equation, we can see that there is predicted a y component.
It is this y
component that causes the asymmetry as illustrated in Figure 4.4.
This distortion must be considered when predicting bit shift and amplitude
using superposition.
It is presently done by entering points on the curve into a
computer and having the computer do the work to generate the transition density
curve.
Br
A general density curve can be drawn relating amplitude to Transition
Spacing/PWSO.
5.4
,
t
:'
PUBLICATION INTENDED.
ALL RIGHTS RESERVED.
HEAD PERFORMANCE
SATURATION CURVE
If the amplitude of the read back signal were plotted as a function
of the write current amplitude or given transition density, we get a new
curve called a saturation curve.
As the value of current is increased,
~e
would expect the read back amplitude to increase as it would in a linear
system.
However, as we approach saturation in the media the amplitude levels
off and remains steady for increasing amplitude.
If the media is thick, the
saturation curve rolls off instead of remaining flat with increasing current.
To understand why this is so, consider Hoagland's
field and far field.
te~inology
of near
The near field is defined as the field within one gap
length from the gap center as shown as point A in Figure 4.5.
Point B is in
what is called the far field.
It can be shown that for a head disc. interface where the combination of
flying height and coating thickness is equal to or
le~s
than the gap length
the saturation curve remains essentially flat for increasing current provided
the pole tip is not saturated.
If the furthest particle of the media
is further away from the gap than one gap length then the total effect is to
broaden the transition width which reduces the amplitude the same as if the
PW50 were increased which is exactly what happens.
Figure 2.3.
This was explained in
The resultant saturation curve looks like that of Figure 4.6.
As expected from the transition density curve earlier discussed, the
amplitude for higher transition densities is reduced by superposition.
A saturation curve may be drawn for each density; therefore a typical
saturation curve is a multiple curve showing at least the minimum aad maximum
density curves for the prepared recording system.
Note that as in Figure 4.7
5.5
)
·- - .- -.-.1
-
-------------------------~~--~~~----~---~-------------------It 1 " --- - ---... :-,"'.'
\ I\ \
'J
' \'
*-'4 \it'"
\.
II
,,'. _',' I
"
....
_.,.
,
I
','
,
.-
-'"
..... -
~
~
.)
~
(
-
,
~
~
I
~
-
f.A
--.;:---
,
_'--
~
---
I
I
- - -, " ,
\,J; . . . . _- :",,'1
\
1\
,
, I
I
I
1
-
I
,,~
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FIM FiliP
""fA(f FletJ)
- -. .....
.....
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..... "9'f'
.......
<.D
\tt
"L)
.J'"
rt° . - - - - - - - - - - - - F,
f1fJ
F/~
4-7
'~c":
PUBLICATION INTENDED.
ALL RIGHTS RESERVED.
HEAD PERFORMANCE
the current of saturation for each density is different indicating that
saturation is also a function of transition density.
The usual transition
density curve can be taken at a single current value or it can be plotted
using the minimum saturation current level for each transition density.
To
optimize a system it is profitable to choose the current value that best
overwrites old information.
It should also be noted that if the recording
involves the far field, the slope of roll off increases with increasing
density.
This is shown in Figure ,4.8.
This roll off can be expected from
the field spreading effect of the particle in the far field vs. the recorded
wavelength.
The correct write current must always be chosen to the right of
the maximum for the lowest density to be recorded.
Since we noted that the so called saturation peaks occur at lower write
current values for increasing transition density, we might expect the a b i l i t y )
of writing higher transitions to erase a lower transition signal previously
recorded to be diminished •. Such is the case and results in a new curve called
the write over curve.
curve, Figure 4.9.
It is usually drawn on the same graph as the saturation
The curve data is taken by first writing the lower density
signal and measuring its amplitude.
the reference.
The higher density is then written over the lower density using
the same value of write current.
measured.
This amplitude is called O.db and becomes
The residual low density signal amplitude is
This is done by using a high Q filter turned totne low density
frequency in both cases.
measurement.
The high density signal is thus eliminated from the
The ratio is taken as a -db level and is plotted on the graph.
The resulting curve then indicates the degree of erasure and the quality of
the recorded signal.
As could be expected, any degradation of a signal affects
the ability to read a transition and then assign it to its correct time slot.
5.6
)
-------
({
--
~
,
'::)
~
..............
.. .
(
'"
"
\.
>"
~
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HEAD PERFORMANCE
().
A second valuable measurement is the ratio of the amplitudes of the
q£
highest to lowest densities recorded.
:1
percent.
.
This is usually expressed as a
The lower the percentage the further the two points are apart on
the bit density curve, or if the two points are a fixed density ratio apart
then it indicates the points are further to the right on the bit density
curve.
This is particularly true if the recording involves the far field.
Figure 4.10 illustrates this effect.
Vfr./VII
In the near field case, the ratio of ..etEi is about 0.9, whereas the .
far field ratio is .4/.75 or .53.
Back to the near field case, to get the
same .53 ratio the transition density separation is F1 to F3.
Because of the write over requirements the write current must be kept
high, but if the far field effect are involved, both the amplitude and
resolution, hence bit shift, suffer.
the two.
A compromise must then be made between
It is then obvious that far field recording is undesirable.
over values above -26 db are unacceptable.
Write
Usually we require at least -30 db
. to keep from degradi ng the ampl itude and resoluti on or bitshi ft.
The current
value is always to the right of the saturation point regardless of the write
over value.
This is necessary to ensure erasure of old information.
The last important measurement is the signal to noise ratio.
consists of five general components.
Noise
First is the electronic noise assoicated
with the amplifier first stage, the amplifier input current noise times the
head impedance plus the amplifier voltage noise referred to the input.
These
two add as the square root 'of the sum of the squares. Barkhausennoise in the
head core is also similarly added.
The second noise is the media noise
)
associated with the particle size, particle distribution and dispersion.
5.7
PUBLICATION INTENDED.
ALL RIGHTS RESERVED.
HEAD PERFORMANCE
0"
.;
For particulate media this noise is considerable particularly as the track
width diminishes.
width.
This noise increases as an inverse power function of track
The third major noise source is the write over noise already discussed.
The fourth nojse is side fringing noise as read by the"head from
track.
The fifth noise source is the minor bit noise.
noise will be considered in a later chapter.
~he
adjacent'
These
and electronic
r
The media noise will be worse
for particulate media and best for thin film media such as metal films.
This
can be seen by considering the particles as separate magnets, each surrounded.
by a non-magnetic binder.
Thus each particle contributes to the overall field,
but as the view of the head decreases either in gap length or in track width,
then the individual fields dominate which thus modulate the head signal.
If we record a single frequency signal (single density) and we were to
read it back noiselessly the resultant spectrum would be a single line equal to
the "bandwidth o,f the measuring equipment.
As we allow noise to enter the system
the spectrum broadens into the typical bell shaped di.stribution for white noise,
or if colored, as by media noise, a different shape.
~e
could plot the peaks
of all pulses in the presence of this noise and we would get a similar curve.
'Since we are most interested in these peaks as they represent the true position
of the reproduced bit, we need to concern ourselves with the amount and sources
of the noise.
Similarly, as we move further to the right on the bit density
curve, we must add the time shift caused by pulse superposition or interaction
when we write bits of at least two different spacings randomly.
The result is
three curves or more each centered on th~ predicted peak shift'd'for the
indicated bit spacing and each containing the probability of peak position due
to noise.
"
This is illustrated in Figures 4.11 a,'b, and c.
The work was
first described by D. E. Katz and .is the subject of a paper by him and
Dr. Campbell published later.
5.8
rUi:L1 CATION HI TEUJED.
ALL RIGHTS RESlRVED.
HEAD PERFORMANCE
. The ordinate may be changed to that of the time deviation from the
expected time position of a recorded transition in a data stream.
When
this is done, Figure 4.11C becomes a plot of the probability of a transition
being detected as a function of the expected transition of a noiseless non
interacting system.
If the time window allowed for each transition to be
assjgned to its correct time slot in a data stream. were to be drawn on the
curves of Figure 4.11C, we would notice that a portion of the transitions on
either side of'w'would be misplaced or be in error.
We will discuss this
further at a later time as there are many other effects that contribute to
the number of transitions detected outside of its assigned window.
SIDE FRINGING
As mentioned earlier a significant noise source is side fringing.
signal has two components.
This
Consider the head gap. Itis three dimensional.
)
So far we have only considered the field directly under the head core but the
field emanates from the side of the gap just as much as below it.
The field
intensity limits for saturation are just as far as the depth of recording
and worse as the field of non saturatipn extends even further.
can read this field every bit as well as that under the head.
if the media were infinitely thick (to the side).
The head
Also it is as
Thus we would expect the
field to behave as if it were a thick media or "far field" recording.
This
results in low density signals to be read at a higher amplitude than high
density signals.
Now we measure write over as a ratio of two low density
amplitudes before and after a high density overwrite.
It can be easily seen
that the write over value is degraded by the side fri.nging signal since non
saturated information is available to influence the head.
signal pick up is greater for low density signals.
The side fringing
If two tracks were
5.9
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HEAD PERFORMANCE
inmediately adjacent, the adjacent track recorded with a low density signal
()
and the true track recorded with a high density signal then when reading
the true track the read back signal would contain the low density signal
as read to.the side.
If we were to plot the value of the fringing signal
as a function of the low density frequency, we would observe an increasing
'\'
fringing pickup with decreasing low density or decreasing frequency.
.'
All
this means that the signal to noise ratio is further degraded from both on
track low density signals previously recorded as well as adjacent track low
density signals Figure 4.13 and 4.14.
MINOR BIT
Another noise source is the effect of the edges of the core away from
the gap.
These al so represent a di sconti nuity in permeabi 1i ty and thus wi 11
appear as a partial gap.
The gap l.ength being infinity.
On closer inspection,·)
infinity is not correct as some field lines prefer to travel around the core
and exit the side of the core thus generating a voltage in the coils.
This is illustrated in Figure 4.15 A, B.
The resultant pulse is very
broad and of low amplitude but contains Significant energy. .An experiment
can be set up in which a low density signal is recorded and read .back as
isolated pulses.
The amplitude and position of both the isolated pulse and
the minor pulse are plotted as a function of the low density bit spacing.
At a certain spacing which coincides with an exact multiple of bit spacings
equal to the core length the isolated pulse is dramatically affected by the
minor bit as it adds, Figure 4.16, or subtracts its energy to the isolated
pulse height by the few percent amplitude of the minor bit, but such is not
5.10
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HEAD PERFORMANCE
the case. Arriplitude increases of -100% have been observed indicating that
energy is involved, Figure 4.16.
The reason this is not observed more often
is that normal recording is of higher density which masks some of the effect.
As this noise does affect the recording performance the head is modified to
reduce the pick up.
Head manufactures usually degrade the leading and trailing core edges
either by increasing the flying height at these edges or by machining the
edges so that it is not parallel to the recorded transition or by crumbling
the corner so that it does not present a uniform edge equal to the track
width.
This phenomenon is only a reading phenomena.
The write field
'strength at the trailing core edge is not sufficient to move the media remenant
field, Sr, enough to, influence th,e read back process.
t)
This can best be' seen when recording on a disc on the inner diamete'rs
where the pole edges'S' are not over the track A'made by the regular gap.
Then moving the head to ha~e the gap over the'S/track.
No evidence is seen
,of the, signal recorded while writing'A' even when using a spectrum analyzer
,
as the measuring device.
The thin film heads have significantly shorter
core pieces, 'therefore the minor bit is substantial.
undershoot on both sides of the isolated pulse.
It shows itself as an
A second effect in disc
recording, is an amplitude modulation as a function of radius for constant
frequency recprd. These two effects are shown in Figures 4.17 and 4.18
respe~tively.
5.11
)
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HEAD PERFORMANCE
The number of undulations being determined by the ratio of the pole
"/~ 11.11
thickness and the diameter change from 10 to the 00." Similarly,. we would
expect.a modulation if we wrote·varying bit density signals on a constant
track as shown in Figure 4.19 which is the standard density curve. At very
low densities the transition spacing exceeds the pole tip length, therefore,
no modulation occurs.
The above assumes equal pole tip lengths.
The isolated pulse shape is the same for all low density signals below
the pole tip length.
When the transition spacing nears the pole tip length,
the shape of the isolated pulse changes until it affects the amplitude.
Thereafter the density curve is modulated for all higher density signals •.
During·this chapter we have focJe~ on three fundamental curves that
describe the performance of the
head~
and discs together.
We can summarize:>
by drawing several curves that relate the various mechanical dimensions of
the head and disc.
The unlabeled dimensions are considered unchanging.
The five mechanical parameters that affect head-media performance
significantly are the head gap 1ength,.head spacing, head coil turns,
media thickness and media coercitivity.
The actual shapes of the above
curves are only to show trends not actual ratios.
Of these curves the head
gap length, head spacing and media coercitivity control the transition
density performance as long as the signal to noise ratio remains the same.
Generally we can say that as head gap length decreases, as long as the
combination of
~lying
height and media thickness is kept within the near
field definition, transition density can increase.
5.12
.)
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HEAD PERFORMANCE
OFF TRACK CONSIDERATIONS
Both tape and disc machines exhibit problems with registration of the
written track and the reading head.
areas.
In.tape machines this occurs in two
First the skew of the head centerline from the centerline passing
thru the center of all parallel transitions.
The angle
produces two problems.
The angle produces a cosine error in the track width which lowers the 'signal
amplitude and a cosine function that broadens the transition as seen by
the head gap thus lowering the amplitude and effectively increasing the Pw50
which reduces frequency response.
The other is tape registration which is a
problem relating to the guides and the slitting process of the tape itself.
In disc drives part comes in the form of disc runout which is similar
to the tape guide-slit edge problem wherein"the disc does not always rotate
around the same point.
have
~
Thi-sis due to bearing problems.
Earlier disc drives
cantilever bearing system which 'accentuates the problem.
mounting repeatability is a problem.
Also pack
These together cause the disc line
of rotation to precess which moves the track from its expected position as
a,cosine error.
With a' disc stack of more than one disc this makes ,the
error subject to vertical location.
Another area of concern is the carriage and ways.
These are the moving
parts that hold the head arms and allows movement into and out of the pack,
a radial change in position.
Any tilt of this assembly either due to machining
or due to debris on the.bearing surfaces will again cause a cosine error
which worsens the further the head position is from the bearing surface.
The manufacturing repeatability of the head arm and its alignment introduce
either direct off track position error due to misalignment or cosine and
cosine error from gap skew as' previously discussed.
The latter group of
5.13
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differential.
The circuit also depends on the time between transitions.
In the single ended version the write current required for saturation is
alternately reversed in the windings producing the alternating flux
reversals required for writing.
Figure S.2A.
This can be accomplished by the circuit of
Here the complimentary emitter follower drives is driven bya ..
square wave that is carried above and below ground.
The current flow is
then determined by the voltage level out of the driver and the value of
resistance in series.
With large input voltage swings the value of the
series resistor can be made large which minimizes the L/R time constant and
thus reduces the time of the recorded transition.
Power dissipation is large
both in the Driver transistors, the input driving circuit and the series
resistor.
)
The current is determihed from EQ5.1 and 5.2
DC 1-
=
Vin+ - Vbe 1
R + Rh
(5.1)
=
Vin- - Vbe 2
R + Rh
(5.2)
If the circuit is balanced to ground then these two currents are equal
except for the slight differences in Vbe and the input voltage swings.
The
circuit is worse cased by considering input swing variations, the Vbe variations
and the two resistors variations, one a fixed and the other the winding
resistance.
6.2
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C.
Power dissipation for the transistors is simply calculated, again
worse case conditions must be assumed.
(Vsupply max -Vsig min+
=
R min +
• "4-
Rh min
It will be noted that the current is a function of time; therefore, the
actual transistor power dissipation is less than EQ 5.3 would indicate during
the time of the transition.
but at some other value.
Also the true maximum may not occur at Vsig min
At the time after switching,the current thru the
inductor cannot reverse instantaneously. therefore, the transistor power
dissipation is increased in the same transistor until the current falls off
to zero on its way to the opposite maximum.
The base voltage changes to the
opposite polarity but the current remains the same.
The power peak is given
)
by EQ 5.4.
PT
Peak
=
(Vsupply max
(-Vsig min) + Vbe max) I Max
(EQ 5.4),
Where I max is the current determined by equation 5.1 (or 5.2).
This transient power dissipation must be considered, particularly when
secondary breakdown can occur.
The choice of transistor then not only
depends on the voltage and current, but unfortunately both at the same time.
Figure 5.3 shows the relationships.
6.3
)
PUBLICATION INTENDED.
ALL RIGHTS RESERVED
RjW BLOCK DIAGRAM
The head circuit cannot really neglect the capacitance; therefore, the
actual head current is determined by EQ 5.4, for a step function, using the
circuit of Figure 5.2B.
1
LS + Rh)
ts '
( .
V 5ig (s)
1
LS + Rh + CS
(5.4)t.
=
S
This breaks down to a third order step:
V si9
(5.5)
(5)
'/"13~
All this slows down the rise time/ widens
the transition widthI which in turn
widens the PW50.
Another circuit that could be used ;s shown in Figure 5.4.
He~the
write currentJ,is determined by the series combination of R, the head circuit,
and the saturation resistance of the transistor.
I
vh(DC)
=
Vsat
(EQ 5.6)
6.4
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The transient behav'ior is the same as EQ 5.5 only V sig is replaced
by +V.
It should be noted that the rise...time is affected by the· storage time
of the transistor.
If the storage time is very small compared to the
transition time then it might be a
u~eful
circuit.
+ 'V
Vsat
Note that the transistor
current is nearly double being
=
V - Vsat
R + Rh
~
(EQ 5.7)
R
The power dissipation' in the resistors are very nearly constant.
The
voltage breakdown requirements for the transistor include the voltage developed
aCrOSS the head at turn off time due to ·the inductance.
This can be nearly
the same as +V meaning the transistor will see 2V during the transient.
The damping of the head for a zeta of .95 can be accomplished by the
collector resistors.or by the addition
~f
a third resistor in parallel with
the head.
Tolerances on the Resistor, the Vsat, the supply, and the head winding
resistance determine the range of write current expected in a manufacturing
run.
A third circuit is shown in Figure 5.6.
Here the transistor storage
time is eliminated, but the current source must supply nearly twice the head
(
6.5
PUBLICATION INTENDED.
ALL RIGHTS RESERVED.
R/W BLOCK DIAGRAM
current as is also required in Figure 5.4. The commutating diodes are
eliminated by making +V equal to twice that required which leaves a bias of
+V on the collectors. This accommodates the negative V swing of the head
without saturating the transistor. A penalty is that the transistor power
dissipation is high.
Pw are
The average Pw being for the transistor,
=
{+V -
1 R + Vbe - Vb)l s
. sy
(EQ 5.S)
The time domain transient equation is the same as equation 5.9 and 5.10
I{s)
1(s)
1
IT
CEQ 5.9)
Wn2
(EQ 5.10)
5(5 2 + 2r;;Wn S~+:--T"lW-nz.,-,}r-The transistor voltage breakdown requirement is
,. ri se resul ti ng from i nducti ve current.
1.0 V due to the voltage
Aga i n the dampi ng is achi eved . vi a.
2R or a third resistor in parallel with" the head.
It,will be noted that the
current thru a resistor at switching time goes from 1/2 to
~I
transient and back to 1/2 again for one half of the cycle.
On the second
during the
half cycle it goes from +1/2 to -1/2 and then back thru zero to + 1/2 again.
The degree of achieying these excursions is controlled by both zeta and the
head capacitance.
6.6
)
PUBLICATION INTENDED.
ALL RIGHTS RESERVED.
R/W DIAGRAM
The peak power dissipation for the resistor is threfore approximately
PR Peak
~ (3i)
(V)
(EQ 5.11)
occurring at time A on Figure 5.7.
A fourth circuit and its variations can be used which reduces the power
dissipation by requiring a current source of only I instead of the 21 as used
in the previous two circuits.
bridge.
The basic circuit is that of a current controlled
In this circuit the current path is controlled by a pair of emitter
followers in the upper half of the bridge.
The base voltage swing Vb1 - Vb2
must be large. The negative going portion must be greater than the voltage
developed across the head during switching.
f"
5,!
The average power dissipation of the upper transistors is half the DC value
if the signal on Vb1 - Vb2 exceed the transient head voltage.
, PT( 1 or2) =
(v
-
Vb 1 + + Vbe) I
(EQ 5.'12)
2
The head current equation is the same as in EQ 5.10.
If the input Vb1
and Vb2 is less than the transient voltage then current must flow thru T1 or
T2 during a portion of the transient; therefore, the power dissipation is
. increased by that current flowing times the V-Vb difference.
(EQ 5.13)
Where It is that portion of Ih supplied thru the transistor.
6.7
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The modification of the head current is due to a portion of I source
being supplied thru the non off upper bridge transistors.
One disadvantage
of ,this bridge circuit is the circuits that are required to drive the bridge.
These circuits also have power dissipation particularly the circuits driving
the upper half of the bridge due to the large swings required, and if fast
speed is required, low impedance, high current.
There are several circuits that may be used.
Note the phasing required.
Because of the various propagation delays and turn on - turn off times, the
t: IfJ'AJr/l i,IfT
bridge may exhibit current spiking where both
t~~!iti~ls
may be on momentarily
at the same time providing a path directly from +v to the current source.
Fortunately, the current source prevents the larger currents that occur in
saturated bridges.
With these drivers the current sources determine the swing available.
The tolerance of the various resistors and the tolerances on the current source
must ensure adequate swings on Vbl and Vb2 to maintain an unalte'red current
waveform.
Care should also be exercised to minimize this margin as the power
dissipation of the bridge, depends on these voltages and the current.
If too
large a margin is provided, A in Figure 5.9, then the lower half of the bridge
has a higher than necessary dissipation.
If not enough margin is provided,
then the bridge saturates and rise time is degraded.
Further if the swing on
Vbl - Vb2 is small then the upper half of the bridge experiences a higher
dissipation.
Normally, the upper half of the bridge only sees the difference
+V and Vbl or Vb2 times the current source value.
Figure 5.118 this is minimized.
By using the circuit of
One nice thing about the combination of
I
"
6.8
+,v
-t~. (V
V.l.
Vb.
V. ,
v. :.
V. )
VO/f
V,,,,
V•.,
."
(,
VI.
VI.>
+f!D''''
A
r)
2L
14-/1
loc.
c
...
fIG 6".
I)
Cf"'TtJfTAIIr:;
EtlVtV,/"EIJr
11
H~Af)
CutCeJl,
o Nt
J.lt4LF Or:- THe
CeAJrftC r,qt'f'Ef)
ClttCl..HT
HSAD
PUBLICATION INTENDED.
ALL RIGHTS RESERVED.
R/W BLOCK DIAGRAM
r
(
,
Figure 5.8 and 5.11B is that it is easily integrated.
Integrated circuits
cannot tolerate PNP switches at either high currents or high speeds, therefore,
th~are
avoided.
This last combination is very effective for two terminal
thin film heads where the voltage transient is below the base - emitter
voltage.
z ~/VE/t.
~
Those heads that have large voltage transients must necessarily
use a different circuit such as Figure 5.6.
heads is proportional to NI.
The head field for all two terminal
The read back voltage is also proportional to
N d"-lfI- fl
r
-.J
ViAl
- - -
\J,
- +-\1
(
--- 0
,. l'i
FIG.
v~
~
)r<"lIl ,
) t-', te.
~ -
"-.
+1
l~
Ih
r
..J
VIN
-
V(I?
5~~
~
K.~
fI
+~
fIG.
S-. IS B
)-.- Vp
0
)
PUBLICA110N INTENDED.
ALL RIGHTS RESERVED.
R/W BLOCK DIAGRAM
lA-B +. MB- C (EQ 5.15) where MB-C is the mutual inductance of the section
B - C reflected into A-B.
The capacitance for the half equivalent is twice
the value of the differential capacitance.
The damping resistor is half.
All this is shown in Figure 5.13 A and B.
, (EQ 5~16)
l Total = LA - C = LA_B + MB_C + LB- C + MA_B
'1-.(A-O
Either circuit will yield the correct results when used in equation 5.10.
The circuits that are used are discussed below.
The first circuit is the saturated switch version as shown in Figure 5.14A
and B.
In Figure 5.14A the DC current is established from EQ 5.17.
=
v - Vsat Rh
'R +
(EQ 5.17)
2
Worse case values can be assigned that give the range of currents over
production runs.
Note that the current I is only passing thru half of the
head windings when calculating the current for the field required.
This
circuit is only useful where the storage time is acceptable.
The damping resistor RD is not affected by the series current determining
resistor R in contrast to that'of the two terminal head circuits of Figure 5.4.
The voltage excursions on the collector are the same due to twice the
current.
No commutating diodes are required'as the voltage on the collectors
never go below ground.
6.10
PUBLICATION IN1ENDED.
ALL RIGHTS RESERVED.
R/W BLOCK DIAGRAM
For this circuit, though, the collector - emitter voltage breakdown
must be greater than twice the +V supply.
The circuit of Figure 5.14B is different.
It also suffers from storage
time in the switching transistors, but the voltage waveform is different even
though the DC value is identical to EQ 5.17.
It will be noticed that the collector voltage goes below ground, while
the second one goes to ground.
look at the equivalent circuit.
This requires commutating diodes, also a second
The commutating diode places both ends of
the head at near ground forcing a head equivalent circuit of just a series Rh
and the inductance LT for the duration of the conduction of the diodes.
The
time for rise ,during this period is essentially LA-C/Rh which can be very long.
When the
~ransient
voltage reduces as the change in current drops, then the
circuit reverts to the standard parallel RLC of Figure 5.l3A or B.Obviously
this is not a desirable circuit.
The most popular circuit is shown in Figure 5.16.
Here the full speed
can be achieved but at the cost of transistor power dissipation.
The voltage
V is chosen to keep the negative transient voltage at the collectors above the
input Vin +.
The damping resistor is chosen to satisfy EQ 5.17 for a zeta of
0.95.
1
(EQ 5.17)
The waveforms are shown in Figure 5.17.
Notice the collector voltage relationship
to the base voltage marked as 'margin' also the peak voltage to the VW level
~
that must be within the VCEO breakdown voltage, (collector to emitter).
6.11
+v
V,""
.-Jr - - - - -
-.J'r -
o..-;...._ _
\,I,,,,
1"
I~o-..lI.'r
..... ----~/
-I. -
dD"'/J f~ 1M('l.vt.
-rW (
-0
"Pot." r
\, ("'.0\
fiG
(
~ b 4(; M~~
-
,~ '~'f0·''''W -
in:
M(('"
;,
.J-
h'
J
-----! bVciJ'j
5\:,:-4-1
" :1".-iL
) i-tP
<{)
f-<"
G. ~~)t{)
{
I> L . -::::.
\/1..-(...
Oh"-
1>-1<
/..'/'t - J.,.d
(".r(
f ,,""'1,}.-;-..
PUBLICATION INTENDED.
ALL RIGHTS RESERVED.
R/W BLOCK DIAGRAM
For a P maximum we use EQ 5.18.
=
(Vcc MAX'- Vb, Min. + Vbe MAX) I source MAX
(EQ 5.18)
We may divide power by two only if the switching signal has no dc component.
If the DC average of the input waveform is not zero, then some other factor
must be used.
Its value will lie between 1 and 2 depending on the asymmetry.
Another consideration is the length of time one transistor is conducting.
is due to the thermal lag of the transistor structure.
This
For slow waveforms
the power dissipation must be considered as the full value even if there is no
dc component of the input signal.
Localized heating of the junction may exceed
the allowable junction temperature •
. The junction temp.erature for all circuits can be calculated using the
transistor thermal resistivity value published, for that .device.
Tj =, (R JC + RCA)(OC/W)(Pw Max){Watts) + TA Max
. (EQ 5.19)
Where RJC is the thermal resistance in °C/Watt from junctiontb case,
,
RCA is the thermal resistance in °C/watt from case
~o
ambient air
PWMax is the power dissipation in watts, and TA is. the ambient maximum
temperature in °c.
For best reliability the junction temperature, TJ' should not exceed
100 0 C even though a device may be rated to 125 0 C or even 1500 C.
rise is the first ,half of the equation.
sink
~hich
alters the parameter RCA'
The temperature
It may be modified by adding a heat
Nothing can be done for RJC though.
6.12
~
PUBLIcr~TION
INTENDED.
ALL RIGHTS RESERVED.
R/W BLOCK DIAGRAM
Air flow also enters into RCA value and is usually published as a family of
curves.
For writing circuits the power dissipation is fairly high 1n
comparison -to standard circuits particularly as large currents are required
in high inductance circuits .. - The requirement to keep the collectors out of
saturation forces higner collector voltages.
=
(EQ 5.20)
)
1+-(3
BASE DRIVE
A further
consid~ration
is the base drive.
The impedance of the base
driving circuit needs to be kept low in order to reduce the Miller effect
(
feedback.
If the input impedance is high the head voltage transient will be
capacitively coupled to the base circuit possibly forcing the transistor back
out of conduction and the opposite transistor back into conduction.
Figure 5.18
illustrates this effect where the dotted line represents the feedback thru.
Miller capacitance.
The transistor C also requires consideration when
designing the base driver circuits.
and the current source.
It_also
affec~the
current thru the head
All the circuits previously mentioned that
from current sources will have these limitations.
~re
driven
Those that are saturated
switches will have only the Miller effect to contend with.
Equations 5.21 and
5.22 descri be these effects.
I
h
V base
-
= I source
= Vin -
th
-
CS
Ie
B
=.
I fOVMf (
TranSi~nt )
Rin
I -
-I t-~
I )
(EQ 5.21)
(EQ 5.22)
+ Rln
6.13
:>~
t
, _ - - -
L
00.
[!1As"t.
5/J~1J1"'4
A MET/-J,:),;}
oro"
Iq \
70
U"H
-e"
1f"1/,'(ove
"J)V(7';N'f!
b'"~
~fr~
(IMe.
'J
Qfu-~ .M.
I-Ic t4
'Y'- C"
CI)jl W) ~ ~ h \1\. VI" "e.N-\~
0
fv ~,,"'C &{~~
J(IS~- ~AL(...
FINAl..
VNlYA16Tj/
Sf~~""'7
~rt:~(r,r
TIME DOMAIN SOLUTION
The time domain solution for the head voltage and the head current as
described in EQ 3.11 and EQ 3.14 are given in EQ 5.23 and 5.24 respectively.
IL Wn
~1 _ 1;2
e
-~Wnt
r;--:2
t
Sin(-y1 -~ Wn~ (EQ 5.23)
=1-1 __
I(_s_}__w_n_2________
S(S2 + 2~WnS + Wn 2)
i
=
~
I
L1 -
1
_ r;Wnt
{f-:t;' e
sin(Wn~l
- "2t
tan- 1
Ji -1;2J
-1;
).
.
(EQ 5.24)
(
It may be noticed
that most write driver circuits bases are driven differentially.
This type of input is forgiving of any s'ight unsymmetry in the input waveform
as long as the unsymmetry is repeated on each input.
Figure 5.19 where the
slope
times.
unsymm~try.
crosso~ers
This is illustrated in
are not occurring at the centerline due to
Such unsymmetrymay be caused by variations in rise and fall'
A typical switching input swing requirement for differential unsaturated
switches is about 1.0V.
transistor.
This value guarantees total cut off of the opposite
We assume that 0.4 volts Vbe are required to bring a transistor
into a slightly conductive condition and by 0.7 to 1.0 volts the transistor
is completely on.
When using transistors with larger Vbe sat voltages, they need
to be provided larger input swings in order to correctly switch them.
6.14
PUClICATION INTENDED.
ALL RIGHTS RESERVED.
,. WRITE VOLTAGE CONSIDERATIONS
$ince the write voltage transient forces the collector voltage to be
high to accommodate the swing, we might profitably look at what we can do
to limit the total swing.
Restating EQ 5.23 again, we can ignore the time
varying terms and just look at the magnitude portion as shown ·'n EQ 5.25.
I L Wn
Ali -
.(EQ 5.25)
r;2
by substituting KNt = L and ignoring the damping term in the denominator
as
~
is a constant for all write system
V
~
=
=
0.95, we get:
NI
rK
(EQ 5.26)
iC
we can do so without saturating the core pole tip ·or increasing the capacitance.
This latter will lower Wn which increases the rise time which may be excessively
detrimental.
WRITE PULSE SHAPING
One way to improve the rise time 'in a head that requires a large number of
turns, such that the Wn is lower than desired, is to pulse the current source
in time with each switching edge.
The effect is to force the head current to
6.15
)
PUBLICATION INTENDED.
«...
ALL RIGHTS RESERVED.
WRITE PULSE SHAPING
rise towards the higher value and then just before the required current value
is reached to drop the current source value to its nonnal value.
for doing this
i~
A penalty
that there is a voltage across the head capacitance remaining
that needs to be removed before the head current can settle to its final value.
The width of the pulse will require careful control in order: to orchestrate
the desired result.
A circuit for doing this is shown in Figure 5.20, along
with the wavefonns in Figure 5.21.
As can be seen the voltage transient is very large.
The rise is fast
during the pulse then it reverts to a negative slope until the transient is
over.
The equation takes the fonn of two parts where the
-.!IL)
1m
( SA-B - SB_C
(EQ 5.27).
notation is for two step functions at differing times and 1m = I + 10 (EQ 5.28).
B.
PRE DRIVER CIRCUITS
The circuits used to drive the Write Drivers can range all the way from a
direct connection to the Flip-Flop to a intermediate amplifier or switch that
is used to establish the bias levels required and/or the base current requirements.
For the saturated versions the driving circuit need only provide the base
current required and a voltage output swing
transistors on and off.
Standard.T~L
cap~ble
of turning the driver
logic blocks are usually sufficient.
·If higher base current is required an open collector output device can be used
efficiently. An example of both is shown in Figures 5.22 A, B, and C.
6.16
,
,
/"
\
_ ,v
:"'%'''''''
. I.t r
~"
-:, "
f·f.
;, "
•
4~
'i"
\. lI"
~"' I
________________________
":" 1-".
. __
+V'
)
-v
PN f
5ATo,/IZATEi>
6!l<;vAJ(JEy
j)~tv€~r
FMI7rE.e.r
-1/
+v
F{ 6- $". 2 ~ !J
NOw
S ATtJ~ ATGJ)
LvITH~vr
t>lJp,; ~S
P~I VrE/lS
fN jP
)
II
B.
PRE DRIVER CIRCUITS
}'I'\(
pu~:L.lC.t;TlO:i
INTtr,DE.D.
(("~_
lf~
-'/0
Ir () 'r- .tX ~
:
1}lM"';'~ Y-
'tv'O;
ALL RIGHiS
kl~~~V[D.
S~ ~t~-t
For the non saturating switches either a T2l, ECl or a voltage translating
..
"
switch can be used.
If T2l logic blocks are to be used, care must be taken to
-impedances or by using pull up resistors as required in the saturated version.
minimize the Miller feedback transients during the up level by maintaining low
ECl logic has the advantage of low impedance and a voltage swing sufficient to
switch the driver transistors.
If the write drivers are PNP and the head is tied to a negative voltage,
then the type requires no base translation as shown in Figure 5.22C but may
be connected directly if sufficient base drive is supplied.
If the head
centertap is grounded, then the bases of the write drivers need to be driven
from a potential sufficient to keep the driver transistors out of saturation.
This function is best performed by a current switch unless the storage time of
saturated switches and their voltage swing can be tolerated.
With the current switch Pre Driver both theswing requirements can be designed in.
a PNP Pre Driver.
i~pedance
and the voltage
Figure 5.24 shows an NPN driver with
The -V ref is chosen to keep the Write Driver collectors
(3,4) out of saturation during the head"transient.
The bases of the Pre
Driver can be driven directly from either T2 t or Eel logic blocks.
This
kind of circuit lends itself to large separations between the Pre Driver
and the Write Driver wherein the impedance can be that of an interconnecting
cable for termination purposes.
The current in the Pre Driver needs to be
large enough to produce the Write Driver base drive voltage swing required.
When this circuit is worse cased both the Write Driver turn on and turn off
requirements must be met but also the Miller feedback from the head transient
must be allowed for.
_ ,\ \ itJC(
v~)
\l)(
lastly, the Write Driver base breakdown voltage Vber
j \ ~\.h'~ -A)rJ,.
); Ctn r.. t1
6.17
~'
.
V'II
-v
/I/o",
L"'T""'~AT"£'"
~·;fTvIfA7~t:J
p~,v~~
'Itt! P~/vclC
-"
'v,rl-f
fIIolIJ
JWITcloI
)
V1tJ
+V
~----
)
PUBLICATION INTENDED.
ALL RIGHTS RESERVED.
.
•
B. PRE DRIVER CIRCUITS
must not be exceeded.
These equations are complicated by the base current
.
requirements of the Write Driver. A set of equations follows.
A VbW. D. ~
mln
A VbW . DIt
max
=
=
rSour~e
mlnl (1 -131min+
')1 tsource
max
1
~-
I
J3 1 lTIax
+- ~
)-
~ VbWD It max
', ,j<
.,
Isource 2
.
J3..mi n+'
Isource
I
. max 2 .PIt.max + I
]
J
V
Rmin
f\nax
(EQ 5.29)
"
(EQ 5.30)
(EQ 5.32)
Vber
If more than one Write Driver is desired to be connected to a common Pre Driver,
then due consideration needs to be paid ·to capacitance as associated with the
RC of the Pre Driver load.
One problem when driving long cables' between the
Pre Driver and the Write Driver is that both ends must be terminated in the
characteristic impedance of the cable in order to absorb the transients associated
with both the Pre Driver output and the Miller feedback of the Write Drive.
This will ensure quiet operation with no reflections.
designed to drive multiple cables with their
ends.
A network can be
charact~ristic
impedance at both
A circuit for doing this is shown in Figure 5.25
6.18
fo.:
f·
"
PJdLICATION INTENDED.
B.
ALL RIGHTS RESERVED.
PRE DRIVER CIRCUITS
Symrnetryshows that half the impedance of a twinaxial cable or the
impedance of a coaxial cable must be used for Zoo
Zo-
R1 (R 2 +..10 )
=
(EQ 5.33)
2
The voltage swing at the bases of the Write Driver will be a function of the
two current sources as before (EQ 5.29, -30) but now R needs to be modified
to include the effects of the network.
This is best illustrated by considering
Figure 5.26 when only one Write Driver is activated and the second is idle.
VA
!::.V 3-4
=
A
Isourcel ( -6,-
I +8
=
vf;)
Rl + R2 +~
2
R~
R'lRj
+ +
+ R3 + 2R
2-
-)
(EQ 5.34)
1_
(EQ 5.35)
This is the base 3to. base 4 voltage with no base current effects from the
Write Driver.
6.19
)
----
C.
~
.
-------------
------
CURRENT SOURCES. /)
The current sources considered are those used to generate the write
current.'
§;v~ral
design
requireme~ts
must
b~~~1 ~irst
must be stable with temperature and supply voltages.
tolerances must be minimized.
the current source
Second the manufacturing
Two circuits are considered here.
The first is
the zener controlled emitter degenerative circuit of Figure 5.27. This is
shown as a neqati ve .9J.[rent source.
r-.r""~
~
For this circuit to function correctly the voltage on the collector of
Q1 must always be more positive than its base.
This prevents saturation.
When the collector is connected to the Write Driver this means that the most
positive base of the Write Driver must be at least two Vbe drops above the
base of Q1.
Notice that the Diode 01 is added to compensate for theVbe of
Q1 over temperature.
This is only true if the diode characteristics of both
Q1 and 01 are the same and the currents are the same.
Doing this is rather
wasteful so a compromise is made allowing a degree of temperature compensation.
The zener 02 is chosen for a sharp knee or at least.a fairly flat zener potential
around the maximum and minimum currents expected thru R1.
If the diode drop
VOl is the same as the Vbe at the operating current then the current source
is essentially:
(EQ 5.36)
Since this is fairly ideal we need to consider the whole circuit.
includes the
T~L
The circuit
interface and Q2.
6.20
PU9LICATION
C.
INTE~DED.
ALL RIGHTS RESERVED.
CURREN,SOURCES
First we will saturate Q2 for a maximum of 25 rna.
This will ensure that the
zener will be operating well past its knee.
2S.ma
)
B"
+Vmin - Vbe"2 max - Vsat
I ::;
b2
R3max
ll
Vbe 2 max
(EQ 5.37)
R.. min
""'"
With Q2 saturated we can proceed to the input of Q1.
Iz . =
mln
(+Vmin - {-V min} - VOl Max - Vz Max-\k,,>.rr-1Q (
~
1
R1 Max
) (EQ. 5.36)
,
B1 Min
The voltage at the base of QI will be, realtive to. the minus supply, as follows
if we ignore the fact that the first termVzminis contrary to VZ max used to
calculate Iz min as given in
vb =
1
EO
5.38.
Vz mln
.
()
(EQ 5.3S)
Therefore the current source will be:
Isource
min
(EQ 5.40)
If this current source were to feed the Write Driver of Figure 5.16, then the
actual head current would be reduced by the base current drawn by the Write
Driver as indicated in EQ 5.20.
)
6.21
-\I
i,
(
-\I
f (c;
J-1"
1
.,-. l 7
•
I
C.
CURRENT SOURCES
The maximum write current can be found as follows:
)
=
vb
1max
I source
(EQ 5.4/)
=
=
max
Vb 1max
-
Vbe l max
R2 min
~'M"
(
1+
Bl
max
)
(fa 5" .«n)
The manufacturing tolerance {more than worse case} is then:
~I
)
source = I source max - Isource min.
{EQ 5.,44-}-
It should be noted that several factors can be controlled by choosing both
the zener voltage large compared to Vbel and VDI and using a temperature
compensated zener with 1% or better resistors for R2 •
Also closer tolerances
on the zener voltage Vz and the zener impedance Rz.
Going back to the saturation curves of Figure 4.8, we can see reasons for
a small delta I source when we are forced to use thick media where the
saturation curve rolls off.
If we are using
tho,
media where the saturation
curve is flat above saturation then we can use cheaper wider tolerance parts
for the current source.
)
6.22
C.
(
CURRENT SOURCES
We can go thru a similar procedure if we choose a positive current
source.
The second type of current source is the current mirror. This circuit
finds favor if the whole is to be integrated on single chip.
Figure 5.28 is a simple Wilson' current mirror.
The circuit of
The requirements for stable
current are the value of R3 and the matching of Rl, R2, Ql and Q2.
Often the
current thru Ql is multiplied by the junction area ratios of Ql and Q3 with
The function of Q2 is
due consideration for the periphery of the emitters.
to supply base current to Q1 and Q3 bases at the cost of the error Ib2 •
=
(
(EQ 5.4)
I Error .:.
. Current multiplication can also be achieved by varying the relative value
of R, and R1 •
Since the resistors in' integrated circuits typically have a
tolerance of 25%, this means that some other resistor type must be used for
R3 or it can be laser trimmed as one manufacturer has done.
Power dissJpation for both types need to be calculated to ensure the
junction temperature is not exceeded nor the devise forced into second breakdown.
The output voltage is simply the conducting base voltage of the write .driver
less one Vbe or Vc max.
I! Vbe min
Psource,..,,7-
=p(Vc max - Vel rhin)Is max +
f!; + ,
"' . ~
/3 +
"'~I'
I
(EQ 5.46)
6.23
PUBLICATION INTENDED.
D.
All RIGHTS RESERVED
DATA
In most recording applications the Write Data is received on multiple
lines which must be converted to serial form before writing on the media.
,
This
.
is easily handled by a parallel to serial converter under the control of the
write clock.
The output of
t~e
shift register, or serial data is then changed
to pulses if the data is true, or no pulses if the data is false.
These
operations are shown in Figure 5.29 which includes a means of providing
alternations of the input lines to the Write Pre Driver if used and/or the
Write Driver.
The alternations in input level provide the current switching
which in turn provides the flux changes of the recording.
The function of the land l block A can be modified to suit the code used
for recordi ng by the use of an encoder.
when we discuss codes.
These ci rcuits wi 11 be covered 1ater
There is one other function that can be included in the
Bbck A and that has to do with Pre Compensation.
:>
Consider for a moment the
transition density curve Figure 4.3 and the interaction between transitions.
that cause the reduction'in amplitude and pulse shift.
When writing a data
pattern there ,is not a constant density but discreet changes in density depending
on the data content and the code used.
The plot for bit shift or
puls~
shift
included in the density curve was achieved by measuring the peak spacing between
two adjacent transitions separated by long areas of no transitions.
pattern can also occur in a data stream for some codes.
This type
If we were to write
the transition in such a way that a pulse that is shifted early in time compared
to its true position could be compensated for by writing the transition late.
Similarly a pulse that is shifted late can be corrected by writing it early.
Thus when this signal iJ read back the pulses are very nearly back to their
true position.
This is know as Pre Compensation.
When a head - media choice
6.24
)
R2
Sf,(IA ,.
N ~ ~ 'A~A
L
0
PA.,A ClD'1(
DA~•.q
..
'iii
BJ
1'4"'1""£1 TA4y
N,,2.:X
.
OA'f'A
(If(~
I
P
t.414.P;JHI-
,I , ,
$~It'At..
IN
OATA Ct«1( _
(
U,(IAI...
N((''2-/)A"TA
"'t<
ctpel{
.J
I·
n n n n· n
rL
"'~z I
p;.,7A
FI'
PA 7/.1
). zr
wAvf.Fo~""'F
c.
Nit Z.
7~
wte 2.
z
/)A.,,"
N I( 2
FDIl'-.
D.
is
DATA
ma~e
for a particular machine design, compromises can be made that can increase
the density beyond that safety obtainable by using Pre Compensation. Generally
speaking for the FM codes Pre Compensation is advisable below a resolution of
0.7 and definitely required below 0.6.
The subject of codes 1s discussed later.
The circuits chosen to implement Pre Compensation must consider any parallel
delays in the logic paths as any
unsymmet~y
there:wi11 write bit shift.
This
can best be achieved by using logic gates from the same clip for all parallel
functions.
As we begin the design we need to determine the number of discreet
shifts required.
chosen.
These depend on the code used and the transition density
For example, one code might exhibit two levels of bit shift, ! 5 and
! 9ns. These are sufficiently far apart that it would be expedient to design
a system that implemented the shifts.
A truth table then needs to be generated
that- describes the pattern and the expected shifts.
We will leave this function
()
. to the chapter on codes as the implementation of the code is done simultaneously.
This will Suffice for the present.
We have now completed the blocks used for writing with a single head.
were many blocks described for each function.
There
How they are put together and
which block is chosen depends on the power supply, biasing, bit timing vs.
circuit delays such as saturated transistors, intended cost goal, and the
head - media interface magnetically and electronically.
)
6.25
'L
~IGH1S K[~Lhw~D.
READ CIRCUITS
Referring to the block diagram Figure 5.1, locate the Read Pre Amplifier.
This particular block determines the basic signal to noise ratio of the
It also provides the functions of signal amplification and impedance
machine.
change.
When. reading
a head
d
signal which is the result of the crf of the
recorded transitions the winpings of the head are connected to the Pre Amplifier.
The amplifier
~lso ha~ ~ome
input capacitance and some input resistance, Zin.
Since we are concerned with a maximum voltage at the Pre Amplifier input for
voltage amplifiers, the concept of impedance matching is incorrect.
We must,
however, properly damp the RLC network as previously discussed such that we
have a zeta of 0.7 for a maximally flat bandpass.
Now Rand C of the head
adds appropriately to the Zin and Cin of the amplifier and must be included
in the calculations.
Single ended amplifiers, which most engineers are familiar with, have poor
common mode rejection meaning that for any ground shift voltage, power supply
voltage noise, or magnetic and electric field noise coupled into the signal
leads the amplifier wi.ll treat them as if they were signal.
disastrous for high speed magnetic recording.
This is
For this reason all wide
bandwidth read amplifiers use the differential connection as illustrated in
Figure 6.1.
Differential amplifiers have excellent common mode signal· rejection
and common mode power supply noise rejection.
The differential connection itself needs some basic understanding.
Head
signals are usually referred to in volts, peak to peak, Differential. This
means that the voltage across the two inputs or outputs is measured between
the two inputs or outputs as a Peak to Peak value.
usual measuring instrument.
An oscilloscope is the
The usual oscilloscope set up is A - B for the
two inputs.
7.1
A,
I
A
-
1-
-y- -
- -
if'
:v- ----~
0.5" VGflU
_J.._ _,_---:;--~/\
V
I -0. PP Sf
A
(
Lr=
L,+M.+Lz.+M'L.
1:,·2 A
)
PCSLICATIJN INTENDED.
ALL
RIGH1~ hlS[R~~D.
READ CIRCUITS
,
If we measured 2 mV PP differential signal between points A and B. we
would then expect to measure 1.0 mV PPfllI(between point A and ground also from
point Band g.r:-ound.
This is referred. to as 1.0 mV PP single ended. (S.E.)
The term "differential" means the difference in voltage between terminals
A and B.
In Figure 6.2A we can see that the voltage difference between
termi'nal A and B at point C is +O.SmV - (-O.SmV)
=
+1.Omv (EQ 6.1).
Similarly, at point D we measure -O.SmV - (+O.5mV)=-I.OmV
(EQ 6.2).
The resultant waveform would be a voltage with an amplitude of
1.OmV - (-I.OmV
= 2.OmVpp
differential
(EQ 6.3).
We could look at the
following relationships.
2mV PP diff
where
S.E~
= lmV
PP SE
= O.SmV BP
(EQ 6.4)
SE
is single ended, and B.P. is base to peak.
We could add to the complexity and say that this signal is O.707mV RMS
Differential or we could say it is 0.3535mV RMS single ended.
With the above background we can now talk about the amplifier itself.
The parameters we are most concerned with are high gain, wide bandwidth, low
noise, low output impedance, and high input impedance with a differential
connection and high common mode signal and power supply rejection.
The input signals are typically in the low millivolt to microvolt range.
This immediately requires that the amplifier noise referred to the input
must be considerably lower than these levels.
For example, we require an
amplifier that has a Signal to Noise ratio of +30 db, meaning
S
20 log N
=
30 db
(EQ 6.5)
7.2
I
rJ3LICA710~ l~IL~J[D.
ALL R1GH1S
RESE~VlD.
READ CIRCUITS
(.):
.....
\:--
For an expected 1.0 rrNPP signal, S, we need to first convert this to
.3535 mV RMS differential.
Antilog 30
=
The noise limit can then be calculated from
20
N
. O~ 3535mV RMS
S
31. 622 = -
=
.3535 mV RMS
31.622
,(£Q 6.6)
N
N
=
11.17 micro volts RMS Diff.
(EQ 6.7)
If the amplifier gain were 100 then we would expect to measure 1.117 mV RMS of
noise at the amplifier output.
The amplifier input impedance and the source
impedance playa dominant role.
There are two sources of noise to consider,
first the voltage and shot noise, meaning with the inputs shorted together we
would measure an output noise equal to this internal noise voltage source times
the amplifier gain.
The second noise source is a noise current.
To develope a
voltage we simply multiply thisTrlOise' times the input circuit impedance.
')
In our
case thi,s is an RLC circuit; therefore, we would expect it to vary with
frequency.
There is a third noise source called
F1
noise, but as this is below
a few cycles and most magnetic recording occurs at much higher frequencies, we
can effectively ignore this noise.
If the head were purely resistive then we could add the two noise sources
as the root mean square:
K fVn"'+
InR1--
K~ffective nOise)
(EQ 6.8)
where K is the gain of the amplifier and R is the resistive head.
7.3
)
(
((Go ,.""
VII" = &-1 r AfJ
1t'1
XIN)
t?r~AI./C,
READ CIRCUITS
,This becomes complicated as we use the true head impedance.
no longer white noise, but is coloured by the reactive
h~ad/Figure
The noise is
6.4.
()
Generally
we connect the head and measure the noise as a total noise instead of trying to
separate the various types of noise.
We may choose a commercially available Pre Amplifier or we may design our
own.
The Fairchild l1cx733 is one that has d'esirable characteristics.
Flexible
gain, reasonable input impedance, fairly low output impedance, very good
Common Mode Rejection Ratio and about 12pv of noise measured in 10MHZ bandwidth.
The amplifier bandwidth is around 70.MHZ. A variation of the
the Signetics SE592.
~cx733
design is
The basic difference is in the use of a pair of current
sources instead of a single source supplying the first stage.
The basic
connection is a common emitter differential pair driving a common emitter
second stage with shunt feedback.
)
The output stage is common collector.
These two commerci a1 devi ces wi 11 suffi ce as long as the head signal is
several mV minimum, and the head impedance is low. ,When lower level head
signals are involved, then a better amplifier is needed.
There is another
connection that might be better and that is the cascode stage.
Here the
input impedance is about the same, but Miller feedback is considerably reduced.
The shunt feedback connection does reduce the Miller feedback from that of
a straight gain stage using a common emitter circuit.
Compare these circuits
in Figure 6.5thru 6.7.
The low noise is achieved by the use of transistors that have very low
base resistance/rib.
and Ft.
A selection can be made based on rib, breakdown voltage
If desired, the amplifier could be designed and integrated as
7.4
)
.y.
_t
(
""""" t
....
CIU71IVf t
CIU71IVf •
IIUTOUT •
...
-
L---~----+-------~----------~--~-o-w
fl(" ,,)
.
)'<-A 733
JOHMA TIL
(FAII?CHIf,f))
to---~
v.
AjV?'-' t~f '
)
"
\
(,/
'
9-{
.
.
-;
I
I (J (5 f"h
It
,.;
~I
r /
~ -~ ,,"' r~ ~ P'" I "r
-;
(v.....
((L-
----Kc
'-
y
\) 11(
ye
Y,- -~, -'--
Je
-\/
.
,
""
~0BlICATIO~
INTENDED.
ALL RIGHTS RESlRVED.
READ CIRCUITS
an IC using the design rules for the pertinent parameters.
We will design several Pre Amplifiers here in order to show the method,
considerations and procedures.
The basic amplifier will be done first; see Figure 6.8.
input impedance differentially is equal to 2(fe + Rm) BCE
Simply. the
(EQ
6.9)~
There are other considerations involving the collector. but we will ignore
The output impedance differently is 2(:l + re + Rm)
J..lEFl
2
The gain differentially is 2· Rl · ·
or· _-_R......
l __
2(rel + Rmd
Tel + Rml
those.
(EQ 6.10)
(EQ 6.11)
where re is the emitter resistance. Rm is the bonding resistance internal to
the trans.i s tor.
These Simple equations suffice as they will give us the true value within
a few percent.
)
If we have chosen a transistor with sufficient Ft. then the
bandwidth will be determined by the Miller effect and
any·~tray
capacitance.
The Miller effect is worse if the input source resistance is large and
f;roM
less if it is low.
Vin +
v
o
=
Rs +
.1
'I
(EQ 6.12)
n
( - RL
) (Rs
VI T e + Rm
Rl
((6 , .
ts ~ \
+
+ Rs +
(EQ 6.13)
)
CS
7.5
)
v.
(\!.:
~-~
1.---<'
-v
V..
-v
,.
F(6
(
' - - - - - - + - - _ ' -__.4-_ _ _ ___+_
fIG-
(
"-
b·(1J
-
v
FU5LICATION INTENDED.
ALL RIGHTS RESERVED.
READ CIRCUITS
substituting and rearranging we get:
Vo
A
If we allow Rs
=
+
Vin
=
(EQ 6.14)
(re + Rm)(R L + Rs +.-&> + RL
0 then we have the case of zero input resistance which is
close to the case of being driven by an emitter follower ..
.. 1
RL (ES)·
.
.
(EQ 6.15)
1
(re + Rm}(R L + CS) + RL
. If the frequency is raised so that
IC~ , = RL in magnitude,
then the equation
.r)
reduces to:
A =
=
2(re + Rm) + 1
(EQ 6.16)
which indicates that the true -3db point for the zero Rs case is slightly
lower than where \X~
1=
RL•
The whole object is to show that as long as we use the circuit of Figure 6.8,
we will not get good bandwidth even if we drive the inputs with emitter followers
in order to reduce Rs (Figure 6.10).
Notice also that the bandwidth reduces quickly if RL is large.
be acceptable, though, so we wi 11 fi ni sh the des i gn.
the dynamic range needs to be considered next.
This
m~y
The current sourc'e and
The power supply +V can be
7.6
,
.'
•
...
"- '
,
I
~
"
..,
'
.... ! , ~.
~.
.....
•
•
_
l-
READ CIRCUITS
(-
determined from the current source
(EQ 6.17)
In order to get sufficient reverse bias on the collector junction, we can refer
to the transistor plots of constant bandwidth as a function of VCE and IC'
Choosing the VCE for the best bandwidth, we only need to assure ourselves that
the negative output signal swing which is the input signal times the gain cannot
saturate the collector junction.
V,t
Vin max PP SE «/(I::urce)
and
~«
1 + B
RL
B
(Isource){
1-:;s}
RL
(EQ 6.18)
CEQ 6.19}
It,
If these three equations are satisfied in the worse case, we have established
the +V level.
For example, using the parameters below determine the values
required using the circuit of Figure 6.10.
:: 70 Min
Ft @ 2.ma = 400 MHZ
B
Cob
=
S.PF
Vin max
=
10. MV,f
F sig max
=
S.MHZ
91f~
7.7
READ CIRCUITS
.
~ \
~
'\ \ ~Ilfl
~.J\'
~ \
~ c.,~'v\
Fi rst we will design for a bandwidth of at least 50 MHZ so that we have
control of the phase over a manufacturing run.
With an emitter fo/lower input we can assure that Miller effect is small
therefore the roll off is approximately when
=
Notice that we have
several cap~citors in parallel, Cob of the amplifier. Cob of the emmiter follower
and some Cbe of the emitter follower·plus stray capacitance.
'Xci R.
(EQ 6.20)
assume 20pf
Xc
Therefore
1
=
R[
1
=
2TrFC
=
1.59x102 n
(EQ 6.21)
cannot be greater than 150 n
At a current of 2.0 ma per transistor we need a current source of 4.0 mao
The gain of the 2nd stage is aRproximately
RL
150
= _26
A2 ~. re + Rm
+
5
=
8.333
2ma
The V swing across the RL is
Vinpp
=
2
lOmv
A"L
=
2
8.333
= 41.665 mv pp se
{EQ 6.23}
The max DC capability of the output V swing is
(Is}(RL )
which is well
= (4.ma}{150 ) = 600.mv pp se
AbOV~
the
41.665~V
. (EQ 6.24)
expected.
7.B
-~--------
..------
)
... ,'I, •
h.
"
_.;.
_
READ CI RCU ITS
We need about 5 volts reverse bias on the collector junction as'the Vcc
needs to be greater than
-Vb
, 1 - VRL ~ 5V
(EQ 6.25)
Vcc -(-0.75V) - (2.Oma)(150n)
:. Vcc
~
~
5.V
+ 4. 55V
to allow for worse case conditons let us choose 6.0V forVcc.
( <, I I f { t,·y r,' I ~ '.'~
The output quiescent voltage is then (nominal)
VC2
=
Vbc 3
-
6.0 v - (2.Oma){150n) - 0.75v
= 4.95v
(EQ 6.26)
If we choose the negative supply as -6.0v then the current source if a
/
resistor should be (nominal)
(,
6.ovf
12V be
= h.5v
-6.0vl
4.0 ina
'
=
1.125Kn
{EQ6.27} ,
Similarly we can calculate the input emitter follower resistor for a
2.Oma current as (nominal)
R2 =
/Vbe - 6.ovf
2.0ma
\-I'{'\~' jl
c'Y
b
= 10.75 - 6.01, =
2.0ma
(EQ 6.28)
2.625Kn
The output emitter follower can only be calculated if we know the impedance
we will be driving.
is 41.66 mVpp'
Let us assume we will drive a
300~
load.
Our output swing
This requires that we be able to pull down the emitter voltage
such that it can follow.
J:-E ~y,Y1 por:: ,Ce tJ .J-: .
1'1
-...
\
~''''''' t...ir- ~~.if
l
'\.'v-'-'
l
,
7.9
READ CIRCUITS
-
41.66 mvpp
= 300 n
(EQ 6.29)
0.1388 rna required.
Output capacitance will increase this
value~
We can provide this current easily with our 2.0 rna sources
Vo _. (':'6V)
=
2.0 rna
4~9v·+·6~Ov
=
2.0 rna
=
S.45K, nominal
(EQ 6.30)
The true gain is not the 8.33 of EQ 6.22, but is modified by the two emitter
followers.
The gain is approximately
(
Ro R6
Ro + R6
2.625K
26 + 2.625
{8.333}
2
(.995}(8.333}{.972)
=
(5.45K) (0.5K)
5.45K + 0.5K
26 + (5.45K){0.5K)
5.45K + 0.5K
2
= 8.059
)
(EQ 6.31)
=
tEQ 6.32)
. The above was done to show the attenuation of the other stages and in practice
"
you will measure very close to this.
7.10
.:.
(
Cv /{tC€Al7fDvltCt!
P €.Fe'(f Tc
(".:J1'1
-v
':" v ,Il
c (!
IIoJ TE.~ 6.tr,4l"lf f)
V£;tJlCN
1.
Pot
LJ '/S 61'\.
( (~c ./({",) 2
I
( L-..I'VV ,L___/ -
-'.
5o . . .~.
'-
fIGBop!.
or-
(,. IV
ftor of A"1 pc.. I ,ct Ete
FtG {, '/ >
WIf..So/J
INTclC(j.Ift4-r~p
L.1.
),
'1
STA6Al..l~~f)
flbe.
,
~L
'·12 C.
Ft'
P
b· ,~
PESC It,; re,
wITH
of(
polfcep
INTEre
(j
teA-r~P
C .... trJtIfIVT' -
VbC
~M/'c.,,c,,i/C
6,af."'uvc,,;,
READ CIRCUITS
~'\
~
"" . . Let us look at the effect of the current source resistor.
f.)~
.
1
.
C.'
If there is a
~~~ 1.0 Voltpp noise signal on the input, then we would expect the output
quiescent voltage to vary.
,
..
It would be
=
~~I
=
1.0V
1. 125KQ
(I500)
=
0.1333 volts
(EQ 6.33)
Depending on the balance of the circuit we would expect some of this change
to appear in the output as a differential signal.
Assume the balance was 2%
off then the output would contain 2% (O.1333v) or 2.666 mV noise.
If our minimum input signal were 1.0 mV then the output would be
(8.059){1.0 my)
= 8.059
my with a 2.666 my noise for a SIN of
~:~~~ = 3.02:1
(EQ 6.,;")
which is disastrous.
Well, what can be done? There are several.
One is to provide the best
balance in both transistor parameters and resistor values, and .second to make
Rl a current source.
balance is optimized.
Now the current will not vary with noi se and the current
A current source is shown in Figure 6.12.
The current source is calculated as follows:
I V,
=
Ra
R+ R
2
3
-
Vbe
(EQ 6.35)
.
7.11
)
"1
READ CIRCUITS
Notice the placement of the capacitor C. This is positioned in order
to reduce noise across R. which determines the actual current.
It~
value
is high enough so that the lowest frequency component of noise is sufficiently
attenuated.
The second current source type is shown in Figure 6.12B.
It is basically
a Wilson source.
Now we have got a very good idea of what the nominal case should be.
We have no idea of what will happen worse case.
very important consideration.
Let us pursue this as it is a
Worse case is always figured to use the various
parameters in the direction that emphasizes the calculation in the direction
desired.
(
The minimum value of stage current (non current source version) is obtained
by modifying EQ 6.27.
(use 5% values)
1-2 Vbemax ~·V ~ 'rilinl
J~(2)(0.80v) - (~5.7v)1
1181 n
=
R max
1
-
= 3.471
ma
(EQ 6.36)
instead of our desired 4.ma
This includes the temperature effects on Vbe •
Similarly, we can calculate the maximum current
1-2 Vbe
=
min - V_ maxi
Rl min
=
~(2){0.7v) - (-6.34v)1
1068 n
= 4.588
ma
(EQ 6.37)
\.
7.12
P~6LICA110N l~~~NCED.
ALL klbHTS
Kt~L~~iD.
READ CIRCUITS
)
(.
. The output voltage variations are complex.
We will take the straight
''<,,'
forward case first.
-l
15 max
1 + 300J I571l
0.8V
(EQ 6.38)
Notice that 13 max really depends on Vo min, therefore, the current is not the
true maximum at all but less.
We can best calculate a usable value by assuming
a straight 2 ma for 13 and ignoring the fact that it is worse than worse case,
but this is acceptable.
Vo min
= 5.70V - (2.286 ma
=
Simvilarl
Y
o max
cc max
=
6.30v
=
6.30y
=
5.36y
(EQ 6.39)
4.460 V
we cavn obtain'V
=
.006 ma)157 n - 0.8V
-
Q~~:X min) (S2
2
min
~ 13 min'~
~-
1+S2min
~ 3.4~1~)( ~7~ 70)
{1.711 ma
1+S3 max
2.0 m~1
J
1 + 7
143 n - 0.70v
.028)143 - 0.70y
(EQ 6.40)
There is a 0.9y difference between the two worse cases meaning that in
manufacturing we will, see thi s spread.
7.13
,)
j
1....' ...
'.w
1 \,...,"
I ... v' \
.A
I'
•
~,
,
... ' •• __
•
I
_....
I
~
...
_
.,_
READ CIRCUITS
In
actu~lity
it is worse than this because we cannot buy discreet transistors
with Vbe's so well matched.
let us look at the Ic current again.
For this we need to refer to the Vbe vs. Ic curves as well as the
spread between devices.
these currents.
The unbalance then becomes.
O.lv
III
=
This spread can be as great as a tenth of a volt at
2(26)
Ima
2
= 4.41 ma
{EQ 6.41}
This means that one transistor is drawing almost all the current and the second
is nearly cut off - drawing only
4.588 - 4.41 = 0.178 ma
The amplifier is useless to us if built out of discreet transistors.
you see the advantage of doing a worse case analysis.
Now do
We can modify the circuit
to force current balance by employing two current sources of half the value and
adding a capacitor of a suitable value between the emitter as shown in
Figure 6.13.
Now balance is restored, but at the cost of a zero and Pole in
the gain equation (6.42) for low frequencies.
A
=
Rr
r@ + Rm
+ Jl
cs
(EQ 6.42)
=
Cere + Rm} S + 1
7.14
READ CIRCUITS
,."t>
The gain curves
~
shown in Figure 6.14.
Usually for a low voltage low current stage we do not need to worry about
the power dissipation of the transistors, but we will .calculate those values
anyway.
This combination cannot occur but it will assure us that we are safe.
Pw max
=
(2.286 x 10- 3 }{6.3 + 1.6 - 3.26 x 10- 1 )
=
17.314 mW
(EQ 6.44)
)
For a transistor that has a derating factor of 1.7 rrrw/oC this amounts to a
17.314 mw
1. 7 .mw/ DC
,
=
.
(EQ 6.45)
10.18 0 Crise
The two worst resistors'are Rl and R6 •
These are respectively
(I - 2 ~
Vbe~_L.L_.u.
min _ V umax1.l.:m I
....
_...L
___
__
2
___
-
Rl min
=
22.48 mw
(EQ 6.46)
and
= (Vo max
+ Ve max)2
=
R6 min
{5.36V + 6.3V)2
5.177K
= 26.26 mw
(EQ 6.47)
)
7 .15
,
J, : , J
,
~
,
,
L., \ ;.,.. ....../ •
READ CIRCUITS
G
'This completes the design except for the noise.
for several reasons.
This circuit is quite noisy
First the effective noise voltage source resistance rib is
twice due to the emitter follower input rib used to increase the bandwidth and
the regular gain transistor input source resistance rib.
Second, the gain is
only 8.03 which is not enough to ensure adequate Signal to Noise ratio into the
Third, the common mode power supply rejection and common mode
following stages.
input signal rejection is very poor.
All this adds up to a poor choice.
Some
degree of irrrnunity can be achieved by using transistors that have. lower Cob and
using current sources and an emitter capacitor.
These 3 changes improve the
design and permit higher gain. The capacitor could be eliminated if the circuit
w\?1'eintegrated where Vbe matching is typically better than 5.mv.
(
A much better circuit is the cascode amplifier.
next.
We will discuss this
It is easily integrated.
Transistors 5 and 6 are the current scources.
R2 and R3 with RI
•
The current is fixed by
Transistors 3 and 4 is the first stage.
Its emitter
feedback is thru C and its load is re of transistors 1 and 2: Then transistors
1 and 2 provide the gain where their load is.R4 and Rs.
The output stage is
transistor7and 8.
The advantage of this circuit is that the gain of the first stage is one,
therefore, Miller capacitance is only 2(Cob).
This devise can be made large
in order to ensure rib is small therefore low noise.
Bandwidth is determined
by R4 and Cob of transistors 1 or 2 and these can be made small in order to
reduce Cob.
Let us proceed as we did before and start with the value of R4 and Rs .
From 2N918 transistor data,
7.16
II-
'\
-Vo
\,)
v•. -·
,/
v(IJrCOf)f
1',(4 AnPt./~/£j(
flV7c/t C~,47cJ?
o~
i)
1?£.fCJ(r!'T4-
V, .
.2 (o~
Z.
I"" fur, A 7 retvuATlol'J
f.fEtC1jJ
/
Art~ll'/C.e
PvE
(O
/MI'EPANCc-f
)
READ CIRCUITS
(.
"
T1 ,2 Cob
Ft
=
1•9pf @ 5 . v
=
1.2 GHZ
(EQ 6.48)
1
1
50.MHZ(2n)(1.9 + 1.9 + 3}pf
use 450
Gai n Al
1
(5xl0 7 ){27T)(6.8xlO""l2) = 4.68x102n
RL nominal.
=
RL
re 1 +R,n1
=
re1+Rml
re2 + Rm2
(.
=
=
450
". 26 + 5 n
2ma
=
25 nominal
(EQ 6.49)
=
1.000
(EQ
26
Gai n A3
=
2"" + 5
26 +"5
2
6~50)
Therefore the total gain is (25)(1) for the same bandwidth.
Next we will calculate the current sources for 2.0 ma each using our ± 6V
power supplies letting R2 and R3= 500n each.
Vs R3
---
"R2 + R3
Rl
z..(2ma)
e+ 1
=
=
=
R2 R3
R2+ R3
- Vbe .
(EQ 6.51)
2.0 ma
(6.0}(500)
1000
_
(4~~~_3 ) (' 250n) -
0.75V
2xlo- 3
3
-
_3
6.622xlO - 0.75
2xlO- 3
= 1.12Kn
1.17
READ CIRCUITS
Notice the effect of the R2 R3network'as a result of base current; it
reduces the effective base voltage.
This is why we used 500neach.
If we
chose a value to save current then the loss could be substantial in the worse
case ana lysi s. '
The output voltage, Tx becomes an interesting function of all the series
7/
bases and the output base.
= Vcc - R4 (I R1 )(1 -
Vo
(3~
1) - Vbe7
B+ 1
= 6V - 450(2.0ma)(1 - __2__ - O.75v = 4.362 Volts
151
(EQ 6.52)
The value of R7 _ e for the same 2 rna of current simply is,
V()
R7 =
+ V_
)
4.36 + 6. Ov
2.ma
5.1aK n
=
2.Oma
(EQ 6.53)
And lastly, the value of R6 should be such that the variations in base current
of Tx i and 2 do not disturb the voltage.
Choose Id of 6 rna then
R6
=
Vcc - 2 Vd
6.ma
6.0v - 1. 6v
=
6.ma
= 733[2
Now we could look at the bandwidth of the first stage collector.
(EQ 6.54)
Since
A3 = 1 the C effective is =
(1 + A)Cob
BW
=
1
21TRC
= (1
=
+ I)Cob
= 2 Cob
1
26
2 , 2ma
lOpf)
=
=
2(5 pf )
= 10. pf
(EQ 6.55)
).
1. 22 GH
7
.18:
READ CIRCUITS
or not
~orth
bothering about except for the effect on the fmput impedance Z••
For a S MHZ
signal into our head circuit, we get the following due to the
differential connection.
If we choose a typical head with Lh
= 10
~h,
Ch
= 10' pf
and Cob
= Spf'
we can calculate R.
1
ttlf =
2 {Wn
=
R
1
Ct 2 ~Wn
1
= -V(10-SH)(1.Sxl0'lF)
Wn
=
vL Ct
(EQ 6.56)
8.16S x 10 7 rad
1
=
R
=
and Wn
1
(1. Sxl0- U) (2) (. 707) (8.16Sxl0 7)
=
S77. n
(EQ 6.S7)
At-S.O MHZ-this then -becomes an attenuator a of the input circuit.
(R)( -.iXc}
a
R - jXc
-
X
L+
where Xc
=
R( -jKc)
R-jKc
=
-(577H-j2.122K)
577 -- j2~122K
314 + (577)(~j2.122K)
577 _- j 2.122K
I
=
=0.644 -~o
(EQ 6.58)
~""7J 14-~'r-
2.122Kn
This value of attenuation is better than the case where Miller effect
is large which in turn both lowers the resistor value to keep { the same, but
also increases the capacitance which worsens the attenuation.
7
.19
~~~LI~A110N
-
-
~--,-----
INiL~0~U.
hLL
-~-""-----.-----
..~.--
READ CIRCUITS ..
We could complete the design by doing a worse case analysis for gain, VO ,
Power dissipation, and dynamic range, but we have already done that. The use.
f}
"...
of the cascode stage only adds a slight complication yet permits a low noise
design.
The amplifier noise contribution can be calculated ftom the following
equation:
Vn~ diff
(EQ 6.59) .
where K is Boltzman's constant, T is the temperature in °Kelvin, Bw is the
Bandwidth of interest, ribis the base resistanc.e (base thermal noise),
1
gm
.
= re is the collector transconductance
Zs is the Head impedance,
current,
noise.
~
1.
(2gm is the collector shot noise),
is the charge on the electron, Ic the
1 .
colle~tor
· 1 ·
S-o the Base current shot noise,
and
.
~
)
the collector current
The function of frequency is that obtained from the. usual noise -
frequency curves.
If the amplifier bandwidth is much higher than the frequency
of interest, we can use the value of B2 unmodified.
We will address this again •.
, Lastly, we should consider the two commercially available amplifiers.
In
~sing
these amplifiers great care should be exercised in adhering to the
specifications.
For example, to rely on the typical specifications is to
invite trouble during a manufacturing run.
As is done in worse case analysis
we use the parameter in the direction that accentuates the result.
the
~~733C,
When using
the gain at the 400 setting can be anywhere between 250 and 600.
To calculate the worse case for a minimum input signal we would use the gain
of 250 and when doing the maximum input case we use the maximum gain of 600.
Now we know what our true output variations will be.
These then should be
7
.20
~
___":'" ..
"
,t
_
...
READ CIRCUITS
considered against SIN ratios for the low gain low input case and against the
linearity specifications for the high gain high input case.
Assume our minimum
input signal is 0.5 mVpp diff t and our maximum signal is
mVpp ~!lj:
SIN ratio is calculated from the input noise data.
a typical value.
e
The
But the manual onl
We could guess that this value might vary t 6db and use that in
our equations.
First we must c~ert the 0.5 mVpp diff to RMS diff by dividing by
to give/-1"7 x10- CfV RMS diff
the SIN =
1-7' 7 x lO-"'V nns d1 ff
(2)(1.2x10- s Vrms diff)
fl.l vJ(~
in db it is 20 log 7·HS
7.
=
,/'s)'
c
>
o
{V"
0
J't'-.p;..<.·~11~?l-(j( r
~- (EQ 6.60)
~:("(( ?
T'
~.~~
=11. J~(fdb
j)
-
j.
--
.\
In Figure 6.17A we need to provide a 920 coaxial cable with a maximum
of 1.SV pp SE signal.
(EQ 6.68)
(Use S% tolerances) ,
I
V,fldc min - Vbe max + v-Imin
2.0V - O.BOV+ 6.7V
\
l.SV
=
1.? Vpp ($E max
87.4A.
Zo min
=
....,
)
4020 max
tc allow some margin for linearity we need about 10% less or about 360.Q max.
The value of C needs to be large enough to handle the lowest frequency FL of
interest without attenuation
Ie)
(EQ 6.69)
7 .24
~
,
".
V.""
'1'1
I'lt_'"
lI,,.,
1..0 V tI, "'1/
.,•
I
v-
'" If,
"1
.
I
{/"tITrE fOt..LOWE/l.
(J,fIV€~
CAfXe
{fALl" JND4 )
69.2° C rise at the junc"tion.
The second circuit, Figure 6.178 is
desi~ned
as follows:
The single current source required needs to supply, (tflis inclYdes lQ%
mOI~n
fal 1 idea, lEY).
1. 1 ( Vi n pp max)
Z 0 n mi n
=
(1.87 5V.. 41\ 1. 1
:0
(EQ 6.74)
1B.8 rna min
If this current source were a resistor to + 6v and Vin were +3.0 Vmax then
that resistor would be
Rsmax
=
V+ min - Vin max + Vbe max
=
18.8 rna
=
186.1 n
5.7v - 3.0v + 0.8v
18.8ma
(EQ 6.75)
)
The true resistor will be 5% less or 176.8 n
7
--------
-~---~--~--
.25
FJ3LICATION
I~lENDED.
ALL
Rl~H1S ktSL~\Eu.
READ CIRCUITS
.
,.
,.
We ,had best use a current seurce and we would get better results for
CMR performance.
'We next need te calculate the resistor
~.
If we design for a gain for
the stage .of INOM then
Rm +
r e + RE =.Z 0
'\:
nom
=
92n -
26
20.ma
5n = 85.7n
(EQ 6.76)
~
Notice that we ceuld ignore
r~~_Rm
as they are small cempared te RE •
If we
did we would .only be .off a few percent.
The same stage could be designed with two current sources .of half value
with a single resister .of 2 '\: between them and still get the same DC and AC
results.
But if the current were supplied by resistors, then the gain equatien
. is modified and the CMRR would be considerably degraded .
. We next need te verify that the transistors will 'not be saturated.
If
we had a 3.0V min input DC and a 1.5V max AC pp signal SE then the base will
be
VAC SE max
2
=
3.0V
L5V
2
=
2.25V min
(EQ 6.77)
The collector swing is the maximum current times the Zo max or
(20.0 ma)(96.6n) = 1.93V
(EQ 6.78)
this leaves us 2.25V - 1.93V = O.32V of margin worse case.
7 _.26
,
READ CIRCUITS
If we were to use the
~a
733 or SE 592 the VinDC would range from 2.4
to 3.4 volts so some restrictions would need to be placed on the maximum
output V swing to avoid collector saturation worse case.
If we used
accordingly.
son
~tJo
coax cable all the currents would'need to be increased
I~ ""~
INT,,,,P
,.,#,".11
T"/t~'NATN.l6
~.:J.~JC'~Tn:>""
A better cable is a twinaxial cable.
twisted pair with good control of ZOo
differential.
rill,;
(Ji.
rAd'~
Fit (,,'71J
AT
lS_r" I","
Ifl
1/''''11)
It consists of a shielded
The impedance is listed as ohms
For our 92n coax case, they could be replaced with a 184n
twinax cable with all the equations for current .,e remaining the same as 184n
differential equals 92n single ended.
Normal twisted pair is around 125n
requiring increased driving currents for the same signal swing. The Zo of
the calculations is ~ the Zo of twinax cable.
l
fIt.
'.1811-
13)
)
We will leave th.is exerCise up'to the student to worse case the design.
The main benefit of twinaxial cable is its inherent balance.
This is required
for phase balance as well as amplitude balance which maintains the Corranon
Mode Rejection of the system while reducing noise pick up.
)
6.27
ADDENDUM FOR CHAPTER 6
- A separate series of preamplifiers are used in the tape drive industry.
None are presently used in the disc drive industry. although some thought has
been given to their use.
The preamplifiers considered are the common base type.
This type can be'inade true differential by driving the centertap with a single
current source or by
interpos~tion
~apac1tive
coupling and a pair of current sources. The
of the diode matrix forces this type of coupling due to the large
offset voltages.
Figure 6.18 A thru C show variations of the same basic type.
The gain of
these stages is not much different from the gain equations previously given.
We will develop this equation.
XRD is the total number of series diodes that would be used if a matrix
were required.
It -is for this reason that this type of Preamplifier is not
used in the disc drive industry.
Also the noise contribution of each diode
should be taken into account •. The gain is a function of the head impedance.
Whereas the attenuation of the head circuit was previously considered, it now
.' shows up in the total gain of the amplifier.
Deriving the gain equation as EQ 6.79, we can see the total effect.
We
wiJl not include a damping resistor as we do not need it because the amplifier
load is high (2re ).
From Figure 6.19 we get:
(EQ 6.79)
(EQ 6.80)
Ll"'~) =
7.la
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c'"
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).
ADDENDUM FOR CHAPTER 6
which becomes in the standard form:
I
(EQ 6.81)
{EQ 6.82}
1<., ( S &'1f<.t:'
1w" 5 + 1../,.1.)
2.
:z.x Rp
+ 2 re. =
2.
{EQ 6.83}
(x ~ + r~)
We could cancel out the two's then to get
(EQ 6.84)
A(fJ =
which would be the single ended gain which is the same as the differential gain.
Since 21wn
=
.~
we can see the effect of the series diodes and the
input resistance 2re of the amplifier on the gain.
The gain is inversely
proportional to the matrix diodes added.
If we were to damp the circuit for a zeta of .707 for maximqlly flat
current input and/or gain as a function of frequency we would need
(EQ 6.85)
t<.J(AltJ
.:::.
ToTAL..
If we had a lOlil head with 25.PF capacitive load, we would require
.Ai
Y-
'v
.
/
- 7-2.B
rl (.,
01A- S
7· 2
A
PI" CIfAM F.:> t't
CllfCcJlr
Or
FIt; 7-119
)
fIG- 7·2 C
C Ut(/UNT
rt.~av
$f.vi TCf./ING
Pu/ffA'6
ritA tV., 7(,()1IJ
)
MATRIX CIRCUITS
as expected as a function of the capacitance of the reversed biased diodes
and any parallel capacitance.
This is shown in Figure 7.3.
Looking at only one
side for convenience, we see that the 2 (head capacitance) becomes.
( Cp
X{. .
2.
l'
2 CI,
X(...
((, t (&oJ L + 2
(Cp )(CW,1(~
t
r... "
¥
i" (
7'jI , )
(EQ. 7.1)
C.)
------
+2(,,)
+ Z ("
~
("'" 4-
CT'I,
As we look at the matrix and lump together some of the wiring capacitances
CWl_4then we can write a new equation.
(EQ. 7.2)
This is handy because we can now address the case where there are more than
two heads that are separated by the matrix circuits.
It is obvious that
just adding more and more heads in parallel will just increase the capacitance
and thus lower Wn which slows down the rise time.
If we can
mak~
the matrix
two level, meaning that we group the heads into subgroups and then connect
them to the write driver thru a second diode, we can take 'advantage of this
series parallel network to reduce the capacitance.
The general equation
becomes EQ 7.3 if there are B branches of X sub branches making a total
of X·B
=
N heads.
:: 2.(~ +
ex -IX 2 ("XC»)
Z (1.+ Cp ,
+
(EQ. 7.3)
X (2(,,)((9) + Cp
2
(J. ....
Cp
It is easy to see that this equation can bp minimized as a function of X
\
and B if we substitute CE as the equivalent of 2 Ch and Co in series.
8.2
,,-
±c
..:.
f/'
W't
+ C'r.
7· 3
'~
I:
"
,.
/
/
\
)
1,\
.I
,"
r
::::J \ ,
-2U
/
'I
.
[I)
+-_ _ _ _.L - - - -
I - - - : - -_ _ _ _
O"'E
- - --' ~
HALF
E~T£A.I PEJ)
()f A
7C>
A
Two
'5
l3 - Z
ORAN'HfU
LfvEL
LEVEL
,...,Ar,{l(~
,-J-1A't"A"fK
D~
)
MATRIX CIRCUITS
2(T =
2(.. +
.
,',..
(X-IX~) +
(EQ 7.4)
c ,
For example let X • B = N heads
Z (, - lC.
=
•
N
X=B
(i -,Jet
(EQ 7.5)
This equation can then be solved for the desi.red number of heads as a function
of the two groups'which will minimize the head capacitance.
Each head's
centertap has its own transistor and reverse biasing resistor.
These transistors
can then be controlled by a decoder operating from a register.
The input base
level must be corrected for the transistor emitter voltage chosen.
example this voltage is
ground~
In the
therefore, the bases will need to be driven
negative.
Figure 7.SA shows one method of
i~terfacing
T2 l logic blocks.
Ground is
the best level to return the head to because of the noise usually on the supply
voltages.
Other configurations are possible that use some reference voltage
as long as that reference is .quiet electrically. The extra series diodes,
are considered when making up the bias diagram for the total circuit. ,This
includes the select transistor, all series diodes, any head resistance, the maximum voltage transient (in one direction), any required reverse bias of the
Write Drivers, and lastly the variation in base voltage from the Pre Driver
Circuit.
The type of diode chosen depends on the write current.
conductance diode with as low a CD as possible is best.
Usually a high
Also, the leakage
current when reversed biased is very_essential as it affects noise in the
8.3
MATRIX CIRCUITS
network during a read which will b* discussed next.
A IN4448 diode serves
well in this position if the reverse leakage is specified.
The second function of the Matrix is to connect the selected head to the
Pre Amplifier as well as block the large voltage swings of the write function
from damaging or disturbing thE-Pre Amplifier.
This function is not so
straight forward as was the circuit for isolation during write.
Consider the circuit of Figure 7.6A.
main nodes.
The nodes A and B can be called the
Branching off from the main node is the Write Driver circuit
i.solated with a pair of diodes, Dl and D2.
includes the Write Damping network.
The Write Driver circuit also
It should be noted that current flow from
the reverse bias source Rl thru the centertapped write damping resistor subtracts from the write current
a~
seen by the head.
This reverse.bias is
necessary in order to isolate both the Write Driver capacitance and the Write
.
.
Damping resistors from affecting the read function.
It can now be seen that
any leakage in any revetse biased diode will affect the read signal.
problem with reading is that the read signal is
A.C.~
(:>
The-
therefore, using diodes
not only would form a half wave rectifier but silicon diodes would not even
conduct.
One way this can be accomplished is to force a small current thru
the head and diodes such that they form a conducting path to the Pre Amplifier.
The currents for both halfs of the head cancel their flux therefore the data is
not disturbed magnetically.
About 2.0 ma is necessary in order to adequately
forward bias the diodes to a sufficiently low series resistance.
The Head
.AC signal now modulates this current which passes the signal to the Pre Amplifier.
Resistors R2 and R3 are tied to a negative voltage in this example to supply
8.4
)
c·
-v
#-IMp Jt,ur
CllgClAll>t,P
~ fIll
.
\\ ,r
Cl.(cCllr~
fAl'
w/t4Te
llEAp J"t'ucr C'''C-Vlr FD~ ,..
Fo" "
T~ANJISTD~
IV 1'""
(;&4JAlQl'tJ
(fN I'
IUlvlll)
rol'tAIV.ttl
"./t
""~tr4 P;('(tlk~)
+v
.- !
r: _'
I
.I.~.--.~
(
./:_.1
!., .
-"v
~v/··t. .
+v
•J I I
~"
'j
SIN'Lf
LeVel
'''''14 Oll.tTy
Vf
,
~ ",'1
(/
f(h\~l'
t
~-......
/
y"'
----4"
p.~ '.J.(
-::
MATRIX CIRCUITS
the desired current.
Vet
SAT
The DC voltage at this node e.D is equal to
+ ~~IMX ~) + l.. ~
IJ,IA, =
..f.
V -
= V'- ~
Vet
SAT I
-
Vp
(EQ 7.6)
V,
(EQ 7.7)
~ ....
When writing the head voltage transient as given in EQ 5.23 needs to be
blocked by Diodes 03 and
bias.
O~ ~
therefore.
R~
is included to provide the reverse
This then means that when writing the Pre Amplifier sees -Von its input·.
This may not be desirable particularly for some commercial types.
The circuit
is modified as shown in Figure 7.68 to add another pair of Diodes 05 and 06
to block the large write transient blocking voltage.
Another pair of resistors
now need to be added to supply current thru 05 and 06 when reading to forward
bias them.
)
Also yet another pair of diodes need to be added to clamp this
voltage when writing toa value tolerated by the Pre Amplifier.
The current flows are now much more complicated.
and 06 needs to be supplied thru R2 and
05 and 03 as also
O~
R3~
The extra current 05
This current splits between
and 06.
We can come close to the real currents as we assume that the diode drops
are referenced to the head centertap voltage as shown in EQ 7.8 to the
Pre Amplifier input.
(EQ 7.8)
\;
( f fAT
+
(lblAlX~)
+V _
+ V,
V,PMTI -
(VUjAr
..f.
(l.uHl~
2
~L
)
recognizing that we want the current to split at this point.
8.5
MATRIX CIRCUITS
Now we
~an
make the Resistor Rs equal to
(EQ 7.10)
ar~
All this assumes that .the VD drops
equal which is of course not true.
:
.
These errors will show up as a small unbalance in current in the head as well
as an imbalance in voltage at the Pre Amplifier inputs.
This latter is disastrous
as these voltages are usually several tenths of a volt which the Pre Amp cannot
handle without saturating.
Going back to the Pre Amplifier circuit of Figure 6.13
and Figure 6.15 or Figure 6.6, we can see a solution.
The coupling capacitor
in the emitter feedback path effectively isolates the two input mismatches.
All we are left with is a small differential unbalance due to the unequal
attentuation thru the diodes.
This affects the Corrmon Mode Rejection Ratio
o.f the amplifier which needs to be high.
The function of Read Damping is
. accomplished either thru the network or by the· addition of another resistor
across .the output terminals.
This is necessary due to the different value of
. Zeta between Read and Write.
A better position would be across the main node.
This way the attenuation is lessened.
,
The resistor value for Read Damping is
higher than for write damping: therefore, we can leave the Read Damping across
the main node for both Read and Write and make the Write Damping resistor for
the parallel function to get the lower value required (See Figure 7.8).
The·attenuation of the head ·signal is calculated from three simultaneous
equations.
C,
(tf~
'"
+ Lf + Rp +-
f{
IA"" f tfll)
(EQ 7.11)
8.6
MATRIX CIRCUITS
O.
~
V
-C,
:p, '
c:
&
(f?,..~,.)
+ i .. (~,,."""
+ If,)
to If,
+,(~
t
(('of) - {} (Ill ,~)
p
0 V
,0(
::
0-
~
,<..(0) - tl ( ~1 t'
'If""
I
I
............
,u~
I
-
- - -
-
i'....
I
PI4TA, "' "At,7'ON"C.
- -
.:~
v-
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-...........
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-
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MATRIX CIRCUITS
",
When designing such an ,IC, great care should be exercised in considering internal
biases and power dissipation.
used for centertapped heads.
Figure 7.11 shows a typical circuit presently
By proper consideration many IC's can be paralled
to address many heads by using parallel d rcuitry and address lfn'es.
We might profitably consider the serial time required by these multiflexed
circuits when handling data.
Before the first transition can be recorded, the
write current source must be turned on and the current built up to final value
in the head.
This is typically about 100 ns or more.
Worse./when going from
writing to reading we must turn off the write 'current source, turn on the Read
bias circuits, recover the Pre Amplifier from the select transient back to the
base line and include any following AC coupling in later circuits. Then times
can be as great as 5 - 30llS depending on circuit bandwidths.
8.11
SAFETY CIRCUITS
This chapter is included at this point in the presentation because we now
have completed all the basic circuits that interface with the head.
The subject
of safety has to do with the recorded data that resides on the disc or tape.
Since this data represents the accumulated efforts of some programmer or computer
operator then every means must be taken to assure the user that their data is
not
di~turbed
due to any malfunction of the circuits themselves.
Of course,
no amount of checking can protect any data if the machine receives a valid
command to write even if it was intended or not.
We will confine ourselves
to only those malfunctions that are invalid or a result of component failure.
There are several checks that will indicate a possible endangering of data.
They are:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
(
Write Current and no Write Command
Write Command and no Write Current
Write Command and no Write Data
Write Current during a protected data field
Write Current and not directly'over the assigned track
Write Command and a Read Command simultaneous1y
More than one head selected at once (serial machines)
Open heads
Shorted heads
Centertap Current Sense
We will discuss each of these and propose circuits that can be used to sense
the fa 11 ure.
1.
Write Current and No Write Command
If a circuit is provided that senses the presence of write current
the output can be landed l with a signal indicating no command is present.
The sensing circuit depends on the type of head that is used and also the type
9.1
P~8lICATION
INTENDED.
ALL RIGHTS
R[~EkV£D.
SAFETY CIRCUITS
of write driver chosen.
For two terminal heads driven by saturated switches
similar to that shown in Figure 5.4, we have several choices.
We could monitor
the current drawn from the +V· supply by providing a single series resistor .•
.
.
.
Then thru the use of a suitably biased comparator any current ·exceeding an
acceptable value could be indicated.
The problem of se~sitivity could be
overcome by using a high valued resistor in parallel with a diode as shown in
Figure B.lA.
With this circuit the V+ line previously used to calculate the Write
Currents must be modified to subtract one Vbe drop during operation.
Sensi-
tivity can now be made as high as needed within the bias and.common mode
requi rements of the comparator.
If no appropriately hi gher vol tage is avail able
to operate the comparator a current mirror could be used that makes use of the
.di ode as a reference as shown in Fi gure B. lB..
.
Here the current mi rror is not
.
a true mirror due to the differences in VD and Vbe of the two descrete devices,
but sUfficient current can be guaranteed to operate the following logic block.
These circuits could be used with almost all of the write drivers shown in
'Chapter 7.
The complimentary pair driver of Figure 5.1 would need two, one
for each source or the emitter voltage itself could be monitored.
With Current Source driven Write Drivers, the Write Driver emitter
circuit could be monitored if a small modification is included.
type is shown in Figure 8.2.
This circuit
Diode 01 is added to isolate the emitters from the
+V voltage expected on the collectors of the Current Source.
Again, a comparator
is made to sense if this voltage ever goes negative by 2 diode drops or less
below the Write Driver bases.
Note that the current thru Rl and R2 must be
appropriately subtracted from the current source current value.
The reference
9.2
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SAFETY CIRCUITS "
could
b~
the voltage between the two bases itself which will reduce ,the worse
case calculations.
The fact that the base voltages will move up and down with
data normally is cancelled out by the 'difference' connection shown dotted
R3.
t)
R~
Feedback could be applied aroun,d the comparator (operational amplifier) R,.
if desired.
The logic signal resulting from sensing the current can now be
landed' with the Not-Write command to indicate the unsafe condition.
problem now exists that needs addressing.
A timing
The response time of the current
source to the .Write Command will be slow on both edges as also the response of
the sense curcuit.
We are interested,in this safety circuit/if there is write
current without a Write Command.
When the Write goes off the combined delays
of the Write Current Source and the sense circuit will indicate write current
well past the trailing edge of the Write Command.
be blocked while maintaining the
b~sic
function.
This false response needs to
A simple circuit using a
T2 l or DTl 1ogi c AND or NAND, Fi gure 8'.3, can cover most delays encountered.. The
sensitivity of T2 l circuits to slow· edges· is of no concern due to the use of
latches following that hold the fault information.
Similar circuits can be devised using other logic families.
In this
,
circ·uit we take advantage of the construction of a T2 l gate, or a DTl gate.
If either input A or B of Figure 8.3B are low all current is removed from the
input circuit with none left for the following transistor.
When both go high,
the the capacitor receives the current until the voltage rises such that the
transistor turns on thus initiating a delay in the response of the AND/NAND
function.
When either A orB go low in response to the eveiltual fall of the
write sense line the capacitor discharges thru RI.
When designing for a certain
delay the tolerances of Rb and the diode drops and transistor base turn on
voltages must be considered.
Th~ resistor
R6 typically has ,tolerances of
~
25%.
The delay time becomes close to the following equations when solved for T.
9.3
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L
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thru the design.
attenuation of 3.5max making,
;
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(EQ 8.10)
9.7
.
SAFETY CIRCUITS
Depending on the speed of operation we try keeping Isource to around
2 to 5 ma, and use a transistor with a reasonable Ft.
Gain Bandwidth curves for the transistor.
This is dictated by the
The next part of the circuit considers
the value of the quiescent voltage at the base of Q3.
This voltage should be
such that during no signal the base must be conducting worse case.
Assume Vbe
= O.75V as the conducting maximum Vbe required, then
CEQ 8.11)
When operating, the most positive collector voltage will be when Q, or Q2 are
cut off.
We designed the amplifier to do this deliberately to ensure limiting
in the positive direction.
When this occurs the voltage at the cathode of
Diode 1 or2 is about ·O.6V below+V.
If the value of R3 is kept high so that --
?- v:~
,.,A]l -
O''f
V
CEQ 8.12)
--then transistor Q3 is cut off during the peak of the transient.
The following two stages are designed considering the current of Q3, the current
loss thru R6, and keeping Q4 out of saturation.
.
The gain is made high only to
accommodate the current loss in R6 until the voltage rlses to turn on the base
of Q4.
If we make R6 2Kn then our maximum loss of current will be
CEQ 8.13)
2.' if_ ,..,;.,
.if/' fl..,..,.,
9.8
;"
,I
SAFETY CIRCUITS
The value of RS is chosen as we consider the current required to turn
on Q4 and the minimum signal on the base of Q3.
Because the diodes 01, or
02 and D3 are always conducting then we should see almost the full limited
signal at the base of Q3.
Assume we only receive half or 1.0V, then the
collector current of Q3 is approximately
{EQ 8.14}
Once this is accomplished then we know that worse case we can turn on Q4 until
the transistor Q3 is cut off when 04 will then cut off.
R6 should conduct any
charge on the base of Q4 away before the next transient pulse.
We keep Q4 out
of saturation (only needed for speed) by using a Schottky diode between base
and collector circuit.
This circuit works well and is called a Schottky clamp.
The base voltage vs. base current curve has some positive slope, so does
the Vsat as a function of
Ic~
As the base voltage
~s
usually much greater than
Vsat then the about 0.4 volt drop of the Schottky diode (which also has a positive slope with increasing current) is sufficient to keep the transistor out of
saturation.
For example, if Vbe is 0.7V at some value of base current and Vce
sat were 0.2 volts for some value of collector current, then 0.7V - 0.4V = 0.3 Volts
or about 0.1 volt difference which we can use to reduce the base voltage to
around 0.6V or out of saturation.
This is a very rudimentary explanation as
the solution can only be obtained graphically since all 3 junctions voltages are
changing to obtain final balance.
EQ 8.14 is correct.
{EQ 8.15} )
9.9
PUELICATION INTENDED.
ALL RIGHTS RESERVED.
SAFETY CIRCUITS
c··~
The above circuit will then output a positive pulse for each transistor (plus
or minus) in the worse case since we chose all our design criteria to ensure
an output pulse for a minimum transient and we designed the amplifier to limit
above this va.lue in order to reduce the current of Q3 for larger transient
v0ltages.
We will next consider the most used Write Driver and generate several
circuits that will function as transition detectors for them.
One of the
problems we should consider is that of the polarity of the sensed transient.
If we sense the negative transient at the collectors of the Write Driver Ql
and Q2, then if the head were open on one side, we would still get a negative
transient as the current flow will be thru the damping resistor. The affected
transistor will saturate but the negative transient will still be present even
(
though of a different amplitude.
Remember that we minimized the Collector-Base
. voltage in order to reduce power dissipation; therefore, there will .not be much
difference in voltage between the saturated ·case and the normal case.
A better.
way is to use the transformer action of the head to get the positive transient
,
occurring at the off transistor (for NPN Write Drivers)." This then assures
;
us that the whole head is working for if
~ne
side were open transformer action
could not occur.
The circuit of Figure 8.7 shows a typical connection.
The attenuation of
Rl and R2 is provided to help keep Q3 out of saturation yet guarantee it does.
conduct on the positive transient.
a Schottky Clamp.
Again the Schottky diode is provided to make
The circuit includes the Matrix diodes just to show that
9.10
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'b
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PUBLICATION INTENDED.
ALL RIGHTS RESERVEO
SAFETY CIRCUITS
it makes no basic difference except in bias levels.
The diodes that pass the
head current correctly to the Write Drivers also pass the positive transient
"..
(.
therefore the transient will be available at the Write Driver collectors.
If the head transient were 7.0V.BP SE then the attenuation max becomes
If the head were shorted then there would be no V TRANS.
If we design using this equation, then we ensure operation as long as the
R.C. loading Q3 s base is small compared to the discharge times required
1
between transients.
Note also that because of the loading effect of Rl and
R2 in parallel with Hib of Q3 the damping Resistor Rotota1 needs to be raised
in ,value accordingly.
This particular configuration lends itself to driving
ground referenced logic and is by far the better way to go than circuits that
put in emitter degeneration in the emitter of Q3.
In these cases level trans-
lation is required such as we did in Fig':lre 8.6.
Another circuit provides a capacitor charging and discharging current
such that the end result is a combination including the effects of the Resettable
Single Shot.
This circuit has been used in head interfacing integrated circuits
designed first by IBM.
The capacitor is charged thru the diodes on each transi-
tion .. This reverse biases Q31S base.
A negative current source steadily
discharges the ca'pacitor such that if the time between transitions exceeds the
time for discharge to the Reference level Q3 turns on activating the Darlington
Qs and Q6.
Thus as long as transitions occur regularly within the time allotted
then the output remains high.
If they cease or the spacing exceeds the discharge
9.11
SAFETY CIRCUITS
time then the output goes low.
The circuit can be used for a current indication
by using the output at the top of R3 instead of the collector as is usual.
permits other functions to be performed in parallel.
This
We will not go into this
design in detail except to note several considerations.
First, the diode
rcharging current does affect the damping depending on the state of charge of
the capacitor.
It also is affected time wise by the negative current source
variations and the value of C as well as the B of the PNP transistors as they
start to conduct or any leakage if cut off.
When this circuit is integrated,
these variations can be extensive.
We might consider a circuit that could be used with the Bridge driver.
This two terminal head driver's head transient negative voltage is not much
different between an open head case and the normal head case.
With the upper
:>
emitter followers generally controlling the voltage the only Peak difference is
the margin provided between the normal transient voltage and the negative swing
of the supposed cut off emitter follower. 'Th,is is not sufficient for an indication.
However the positive level of the emitter follower is significant in that it can
be measured against a reference.
It is the difference between the Vbe lightly
conducting and the Vbe heavily conducting.
volt against a solid reference.
This is usually a few tenths of a
A circuit can be devised that can utilize this
difference.
If the head were open then the normal path for current is blocked; therefore,
the lower half of the bridge will draw current directly from the upper bridge
immediately above it, such as from Q2 thru Q4 in Figure 8.9.
9.12
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SAFETY CIRCUITS
The transistor QI0 is provided a slight current of only a few hundred
microamperes, 14 , such that the base voltage of Q9 is at a voltage of say
0.6 Volts.
If the Write Current 11 were say 50 rna and the head were open
with Vin high then Q3 is conducting from Q1 even though
t~e
base of Q1 is low.
The base of Q4 is low so Q4 is cut off, but the base of Q2 is high since Q6
is cut off.
Since the current thru Q2 is very low, being only "leakage, then
the Vbe of Q2 is around 0.4 Volts.
This makes the" difference between the bases
of Q7 and Q9 about 0.2 Volts or sufficient to switch.
13 to reduce base current effects, we have a
cl~cuit
Using low currents for
that will respond to
open heads but it will not respond to normal and shorted heads.
The voltage
on the emitters of Q1 and Q2 will not change in the case of a shorted head
except due to rise - fall time crossing effects which are very narrow.
A circuit
that will totally detect true transitions at the Write Driver requires two
detectors, one for open heads and one for normal heads since the shorted head
case produces only
~
small transient voltage.
The second
ci~cuit
simply needs
to verify that the head terminal voltages appropriately follow the upper half
of the Bridge's base voltages.
This can be done using a low gain differential
amplifier and full wave rectifier similar to Figure 8.6 and shown in Figure 8.10
for inductive heads.
capacitance.
The amplifier isolates the head to reduce the extra
The output pulse width can be pulse width discriminated in order
to isolate the shorted head narrow pulse, resulting from poor rise times, from
the normal head wide pulse.
This is only necessary if the rise and fall times
of the pre driver are not very fast such that there is a glitch at the head
terminals at the intended transition edge.
Figure
8~11
illustrates the phenomenon.
9.13
~
--.- ....
UITS
,.
voltage change in the shorted head case is about half that of a
I case as long the swing on the upper half of the bridge bases is
~
exceeds slightly the regular transient.
Getting back to Figure 8.10.
signals are really not differential but are negat1-ve pulses referenced
vel for each oppositely occurring transition which alternates between
e can use this to generate our full wave rectifed pulses if we limit
a level between the half level expected from shorted heads and the
.Irmal level.
If the base swing were 5.0V, then we need a cut off
lround (.75)(5.V)
= 3.75V.
Choosing the +V supply sufficiently high
(EQ 8.17)
roceed as before.
CEQ 8.18)
tinder of the design follows from EQ 8.11 thru 8.14.
:re is a variation of the above circuit if the head is essentially
ve, such as the case of a thin
head is almost a squarewave.
fi1~
head.
Here the voltage waveform
Again, if power dissipation is minimized
design, the down level applied,to the ,upper bases of the bridge is
Iy below that of the IR drop in the resistive head.
One circuit that
5criminate the normal head from the shorted head or partially shorted
9.14
PUBLICATION INTENDED.
ALL RIGHTS RESERVED.
SAFETY CI RCUITS
head is to diode couple the low level signal on each head terminal and
compare that to a reference.
However this circuit cannot distinguish the
case of no data applied meaning an open data cable or circuit somewhere earlier
in the circuit chain.
We must really use the dV/dt of each transition.
This
can be done using a frequency level detector such as is shown in Figure 8.12
or a + pulse rectifier and amplifier as shown in Figure 8.13.
The circuit of Figure 8.12 should be. driven from an intermediate amplifier
to isolate the circuit capacitance from the head circuit.
The level at Point B
is a function of the voltage change at the inputs. the ratio of the two capacitors.
and the time constant of C2 and the two resistors.
For large capacitor ratios
the level at 8 is fairly smooth. but if we choose a smaller ratio with-a short
RC time constant, then the circuit will perform as a full wave rectifier with
controlled output pulse widths.
The circuit .of Figure 8.13 may not require an intermediate amplifier if
the coupling capacitor's value is small/and as the RC ttme constant should be
large compared to the transition rate/ it requires large resistors which in
turn affect the base bias due to base currents.
a full wave biased rectifier.
The circuit is ,basically
The difference from the base line to the clipping
level is determined by the resistor network R1, R2 and R3.
The upper portion
of the transient is 'dot ored' and is available as a series of squared positive
pulses· at the output.
A better circuit would result if an intermediate amplifier is used to
permit lowered resistances.
Lastly, if we consider the transition detectors
9.15
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PUBLICATION INTENDED.
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SAFETY CIRCUITS
,
they realJy indicate the correct functioning of the entire Write chain.
\
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f
Without write current there would be no transitions neither without a
continuous data path and a functioning head.
The only thing it does not
tell us is if the head is in contact with or in proximity to, .the media.
4.
Write Current thru a Protected Data Field
There are several variations of this circuit family.
involves the Memorex invention of the Write Protect feature.
The first
A simple circuit
operated from a switch blocks the Write'Corrrnand from ,the Write Current circuits.
The circuit usually indicates back to the control function that the Data is
protected.
One consideration is to design the logic circuits such that
operation of the switch during a Write operation will not disturb the write
in progress until the operation is over.
A simple gated latch will accomplish.
this.
A second variation is used ,in embedded servo type disc ddves.; These disc
files have servo information pre written on the data discs in sectors or
interleaved with the data.
to maintain correct servo
The same information must be protected in order
Counting circuits that are indexed to
oper~tion.
the disc position are usually used.
Decoding the count determines the areas
where the prewritten servo information is recorded.
Circuits are also used
that verify correct operation of the counters, such as, frequency sensitive
discriminators and phase locked loops.
Protection of the servo data is of
such inportance that redundant counters are sometimes used with phase detectors
to monitor their differences.
9.16
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SAFETY CIRCUITS
5.
Write Current and Not Directly over the Assigned Track
Again there are two checks performed to verify the head position
in Disc Drives before a Write 1s allowed.
The first requires the successful
comparison of the desired address contained in a register and the written
address recorded on the disc usually before each record.
The second requires
circuits for monitoring the heads position with respect to some reference.
In track following servo systems there are signals available that are sensitive
to the percentage variation from the tracks centerline.
As the head deviates
from the centerline by an amount exceeding the off track capability of a
Read - Write - Read sequence at the track extremes, we require a signal that
will terminate a Write function immediately. This is because any data thereafter written will be difficult to read due to the off track, adjacent track
and fringing crosstalk or interference.
As the head mechanism cannot move
instantaneously, some earlier or narrower range is sensed with a time limitation
imposed for the system to restore the head to be within these normal limits.
Such circuit timing must consider the mass and forces of the moving mechanism.
Figure 8.17 illu.strates the phenomenon by showing the head centerline movement
compared to the track centerline as a function of time.· The two limits are
shown 'dotted with the appropriate sense levels and timing.
This figure shows the head returning within limits within the allotted
time.
If it did not then a signal would be generated that shuts off any Write
in progress and notifies the control circuits.
6.
Write Command and Read Command Simultaneously
This circuit is strictly a monitor of the control circuits, but it
also checks for logic failures in that if a logic gate failed the opposing
9.17
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SAFETY CIRCUITS
~
Commands could be issued.
A simple 'And' gate at the last logic position
of the two commands will suffice.
This way the error can be caught up to and
including the input to the Analog Read and Write Circuits.
7. More than One Head Selected
Depending on the Matrix configuration, there could be several circuits
required.
If the number of heads built into
a machine
is great enough. some
designers choose to use two separate Write Circuits, two separate Read Pre
Amplifiers and two separate Head Centertap drivers.
When this occurs there
must be circuits that monitor circuits to verify that one and only one is
operating at anyone time in serial machines or in parallel machines to see
that all such circuits are operating simultaneously.
(
First let us pursue the Centertap Monitoring Circuits.
The engineer has
a choice of an 'Exclusive Or' tree or an operational amplifier.
The latter is
least expensive even in the earlier machines when such a
had to be
~ircuit
built of discreet components.
Consider Figure 8.18.
of being grounded. with
NPN
We have shown two
h~ads
Write Drivers and
fNf
bias for the centertap is aneiative voltage.
with the centertaps capable
centertap drivers.
Reverse
The ratio of the resistors R2
to Rc2 and R1 to Rc1 is large such that the correct amount of reverse bias is
maintained to block the head transients.
RF is chosen to provide a certain
worse case guaranteed voltage output from the operational
amplifier~RB
is
provided to cancel the affect of all but one 6f the reverse biased centertaps.
For example, if Figure 8.18 showed 5 heads with 5 centertap drivers then RB
(
would compensate for 3 head ceritertaps leaving one to provide a ,,!e~ative signal
and, of course, the other being at ground if selected.
The circuit will respond
)
9.18
SAFETY CIRCUITS
with a negative output if more than one head centertap is grounded and with
a positive output if only one or none are grounded.
The design is worse
case~
as follows where N is the total number of head centertap drivers.
(EQ 8.18)
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SAFETY CIRCUITS
.,
Equations 8.18, 8.19, 8.22, and 8.23 require the worse Case bias set into
the comparator to be centered between the values of Vo min normal and
Vo min Z ON'
By properly specifying the value of RB this range could be
centered around the Vbe of 2 transistors and the circuit of Figure 18.9 used
instead of the comparator as long as the Vo difference is greater than one volt.
~In
the above equations, we neglected the voltage and current offsets and gain
effects of the operational amplifiers.
These should be included if the difference
is less than one volt which would jeopardize the correct biasing of the transistor.
the resistance seen on the negative
Resistor REa should be chosen to equal
input in order to correct for balanced base or input currents.
For the other
two offsets the total resistance can be kept as low as possible within the
current limitations of the centertap and bias resistor currents and the voltage
attenuation due to the action of RC2 and R2 as it relates to the head transient
voltage.
Usually the voltage change due to one centertap circuit changing state
is large so the main offsets are swamp .ed.
The other monitoring circuits become just. 'And' and 'OR' combinations of
the previous circuits outputs in multiples.
The block di.agrams of Figure 8.20
thru 8.22 show typical examples of some multiple arrangements.
Notice that in
,
Figure 8.20 we need both the indication for write current from either current
source as well as the indication of more than one source on at a time for serial
data machines.
For parallel data machines the dotted addition is required to
indicate a failure.
There are variations
~f
Figure 8.21.
As it is shown
the outputs of the Resettable Single Shots are combined to indicate the function.
This then would be 'Anded' with the delay gate of Figure 8.3A to capture the
failure.
However, if one of the Resettable Single Shots failed true then we
would never sense any failure of transitions.
The 'Exclusive OR' gate will
) 9.20
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10.
Centertap Current Sense
In the cases where the centertapped head or a group of centertapped
heads are driven or connected directly to an Integrated circuit collector,
there is a distinct possibility of a short between the collector junction
and the substrate.
This situation exists- due to the usual practice of tying
the centertaps together to a common voltage or ground.
The favored method of
sensing this failure is to monitor the current in the centertap line. A
simple series resistor and a comparator suffices.
The bias on the comparator
allows up to normal write current and any combined leakages to flow without
changing the output state of the comparator.
There are many other circuits or conditions that could be monitored.
These will evidence themselves to designers as they consider all the possible
(
(
paths erasing current can take thru the bead from whatever source or all the
'combinations that can prevent data from being correctly written such as any
data encoding circuits or clocking circuits.
They all need to be monitored
and latched for the protection of stored data.
One side-light to the half open centertapped head case not previously
.
.
discussed is the condition during selection by the centertap driver.
Consider
for a moment what we discussed back in Capter 7 on Matrices •. We were very
careful to balance the Read biasing currents so that the flux generated cancels.
When a head coil opens on one side the bias current now is unbalanced and hence
can partially erase the media.
However, the flux is very small and is not
usually of sufficient magnitudes if properly designed, to bring the media particle
back into the open portion of the hysterisis loop.
There is one other circuit
parameter that we have neglected and that is the single ended matrix capacitance.
(
See Figure 8.24.
When a head is reverse biased, the cable, heads and diode
capacitance is charged with some number of coulombs.
If the centertap selection
j
9.22
,
"
SAFETY CIRCUITS
transistor is turned on quickly, this permits a discharge current to flow
thru the head half winding that normally is balanced out that now is of
sufficient magnitude to cause the media to be brought out of saturation
thus actually writing a disturbance on the media.
Because of this effect
it is doubly important to minimize head capacitance, and maximize the
discharge rate while maintaining sufficient drive to saturate the centertap
driving transistor during writing.
This then refers back to the circuit
used to drive the bases of the centertap drivers which we did not discuss
at that time.
Once we have sensed a safety related failure we must now" determine what we
can do to minimize the damage to the recorded data from either timing or
circuit related failures.
The best thing we can do is to prevent the flow of
head current either by blocking the current path at any point or several points
or by sinking the current off to ground before it can reach the head.
The
first type usually are limited to shutting off the current sources and the
centertap drivers logically.
These precautions work well for command related
failures or timing failures, but they do. not work if either the current source
transistors shorted or the centertap transistors shorted or some other current
path became established.
Again, shutting off all current paths can block the
current thru the head either at its source or at its sink despite a failure of
one of the sources or sinks (centertap circuit).
We can provide a circuit
that clamps the current source to a potential that reverse biases the Write
Driver emitters.
Part of the precautions already exist when we added a series
diode to protect the Write Driver emitter from the Current Sensing circuit during
the off condition.
Refer back to Figure 8.2, Rl and 01.
If we connect a large
9.23
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SAFETY
CIRCUITS~·
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transistor. to the collector of the Current Source Transistor and tie its
,~ :
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emitter to a potential more positive (in this case) than the bases of the
.
Write Drivers. we can turn this transistor on immediately upon sensing any
f'
failure.
~
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This 'is achieved by anlORI tree driven from each of the safety
cir-cuit storage latches.
~<'
Some engineers like to turn iton every time we
are not writing in order to quickly discharge the curr'ent source lines.
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The
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transistor and its base current drive must be capable of handling any current
resulting from shorting the current source transistor which means the current
would be that obtained thru the emitter resistor in'series with the difference
in potential between the source supply and the clamp transistor emitter reference.
_Uow
This must be worse cased as failure to do this mightAforward bias one of the
Write Drivers.
A circuit is shown in Figure 8.25 for the NPNWrite,Driver with
the centertap referenced to
grou~d.
Other configurations are left to the reader.'
A typical design would ensure the following equations are·met.
-
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If all these. 5 equations are met simultaneously then the clamp will operate
:.correctly even in the event of a shorted current source.
Notice we are' worse
than worse case, but totally safe as we used V- min and V- max as simultaneous
conditions in EQ 8.24 and 8.25 respectively.
This concludes the current related safety considerations.
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This chapter
with the detectors or the circuitry used to sense the
d~als
transitions recorded on the media.
We will discuss the intervening amplifiers
in the next chapter as the type of amplifier depends on the type detector
chosen.
T~~
detector in turn
region of operation.
depe~ds
entirely on the head signal and the
Let us refer to Figure 9.1. This figure is our old
friend the bit density curve with some added segments.
Historically, all
magnetic recording was done using the left hand side or the 'good' resolution
portion, Region 1.
Here the various frequency or density components result in
very similar amplitudes.
Therefore a string of transitions produces signals
.
of fairly equal amplitudes with little interaction.
'
The process of detection
, is to sense the peak which results from the instant of maximum time rate of
change of flux of the transition and output a pulse, the leading edge
~'
of which, corresponds to the center of the transition.
Circuitry for doing
this consists of some amplitude reference and a peak sensing circuit.
The
amplitude reference serves to eHminate noise associated with the signal base
line, Figure 9.2.
As the signal is bipolar there needs to, be two references
or some means of changing the signal to unipolar. A Full Wave rectifier fills
Jhis latter function quite well.
be very accurate.
The pea'k sensing circuits are required- to
For this reason, amplitude sensing circuits fail.
the peak of sine wave.
Consider,
The change of the amplitude as a. function of time is
very poor, changing only a few percent over a considerable number of degrees.
Amplitude sensitive circuits then will have poor time resolution of the peak.
They are also sensitive to the variations in amplitude of each transition in
a chain for no pulse is of the same amplitude as its neighbor due to variations
in media and
head~media
mechanics.
(
10.1
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Two other signal processing circuits resolve the
dilemma~
.They are the
•
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differentiator and the intergrater. Here the slowly changing peak value becomes
•
a fast changing base line crossing as the slope of the peak changes from one
j
polarity thru zero to the other.
This result is ideal as we can build base
l'tne crossing sensing circuits very easily. The question now becomes which
,
~
.of the
two is better.
First the differentiator.
has a zero at the origin.
The circuit or amplifier
The gain then increases from zero at zero frequency
to infinity at infi·nite frequency.
Our head signal is complex in that it can
be described as a fundamental sine wave with many harmonics.
Noise also enters
the picture. As we pass the bandwidth of interest, the gain continues to
increase, therefore, all the noise of higher frequencies will be amplified
accordingly while the signal of interest remains at its lower gain. The result
is a decrease in signal-to-noise ratio.
Practical circuits have finite band-
wi dth as they roll off due to stray capacitances introduci ng a pol e.
We, see
bu~
then that practical differentiators havesignal-to-noise ratio problems
are limited to the bandwidths of the circui·try.
The intergrater on first look is
id~al
as its output results from a
pole at the origin, or zero frequency, which produces decreasing gain for
increasing frequency.
If we were only dealing with a sine wave, the resulting
waveform would always be symmetrical; however, we are dealing with a complex
waveform containing many harmonics and noise which also vary in amplitude from
pulse to pulse.
Ideally, then we would have a base line crossing for each
transition as the area under the curve alternates.
But the signal's non-
uniformity will result in variations in the time of the base line crossing
from the actual peak time of the input signal.
10.2
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DETECTORS
When'compared to the noise shifted differentiated signal base line crossing
and the quiet but time shifted base line crossing of the integrated signal, we
are forced to choose the lesser of two evils.
The differentiator has dominated
the application mainly due to the way the higher frequency noise is rolled off
by judicious choice of the pole location of practical circuits.
The operation
of the intergrator in the presence of defects accentuates the inaccuracies.
Compromises can be worked out using carefully placed zeroes to minimize its
sensitivity to defects and amplitude variations, but no practical recording
channel has succeeded in mass production using the approach.
We will now develop a circuit that will perform the detection function
previously described.
Figure 9.3.
The block diagram for such a detector is shown in
The full wave rectifier can be built from the differential
(
signal with a pair of diodes.
See Figure
9.~.
Because the differential signal
contains two positive, peaks for each pair of pulses, thediodes will pass two
positive peaks each one torresponding to a transition.
Depending on the biasing,
the output dt potential will be one diode drop below the input base line or
dc potential. The driving circuit must ensure the two dc levels to be equal
or unsymmetry will result.
Whenethe input and output are referenced to ground
the diodes will subtract one diode drop from the signal before passing it on.
Figure 9.S illustrates this function.
We could take advantage of this phenomenon
by making the diode drop equal to the amount of signal around the base line
(clipping level) that we want to remove to reduce sensitivity to base line noise.
Under these circumstances the signal itself must be amplified to an amplitude
such that V diode equals the percentage of the signal we want to remove.
For
example, if we want to remove ± 10% of the signal around the base line, the
input signal must be amplified to 2( l~g~
) (Vo)in Vpp diff.
(EQ 9.1)
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Such a circuit will function but is not easily changed if we want to change
the clipping level percentage except by changing the amplitude of the input
signal or the references.
example:
2(10)(.7V)
The signal swings are very large, as in our
= 14~Vpp
(EQ 9.1)
diff. is required.
When the full Wave Rectifier is DC coupled with an appropriately negative
return voltage as shown in Figure 9.6, then the output amplitude is equal to
the input amplitude but is one diode drop below the input signal voltage.
We need not get confused if we reverse the diodes to pass the negative peaks
instead.
Input DC balance is required for correct symmetrical operation.
We could perform this function with active circuits such as is shown in
Figures 9.7 or 9.8.
The advantage of the emitter follower connection is the
lowered impedance proviqed by the transistor.
It has one disadvantage and
that is the reverse base-emitter breakdown voltage, BVber' restricts the input
signal peak-peak value for one.emitter is conducting while the other is cut
off.
Again, input balance is
r~quired.
The addition of the third
follower permits any percentage of clipping.
e~itter
It is similarly restricfed to low
amplitudes of around 7.Vpp SE max due to lV ber .
Another cQnsideration is that
of the transfer curves at around 0.1 volts difference where there is partial
conduction of the transistors.
The operation is very similar to a positive
'OR' circuit meaning only the transistor with the most positive base will
conduct.
It is this characteristic that permits Full Wave Rectification
or Biased Rectification.
The input amplitude must be such that the O.1V
uncertainty is small compared to the signal of interest but within the
restrictions imposed by the emitter-base breakdown voltage.
.. I
10.4
(
DETECTORS
We will now turn our attention to the Gate Limiter.
Its purpose is
to provide a gate to operate the land l circuit at the appropriate time to
allow the pulse resulting from the differentiated signal peak to pass while
blocking all noise related signals.
The output of the Full Wave Rectifier·
is limited either thru direct amplification or that resulting from positive
feedback such as in a Schmidt Trigger.
The latter circuit has the advantage
of reducing the effect of noise around the threshold of the Schmidt, whereas
the former will be noisy around the bias point.
The gate threshold level
results from either the Schmidt threshold or the amplifier bias point.
Figure 9.9 illustrates the waveform relationships we want to design into
the total circuit.
If we design a limiting amplifier that limits around the clipping level
(
we desire, then we have performed the function we need.
From Figure 9.9
the clipping level value is determined as a percentage of the input signal
magnitude.
Let us use 15%'of 1O.Vpp diff.
This becomes 5.Vpp SE or 2.5VSp
out of the Full Wave Rectifier and 15% is' 375.mV.
We next need to guarantee
the reference of the input signal to the Full Wave Rectifier such that we
have control over the percentage.
We also need to include the tolerances
of the diodes or transistors used to build the Full Wave Rectifier.
We can
do this with the circuit shown in Figure 9.10.
Transistors 1 and 2 perform the Full Wave Rectification.
and 4 are a high gain differential amplifier.
Transistors 3
The input reference is ground.
The bias reference is 375.mV with transistor 5 providing the same or similar
Vbe drop as transistors 1 and 2 if current sources 1 and 3 are equal.
t
r
This
function is harder to perform with discreet components, but is very easy today
10.5
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when we. can use the inherent matching in integrated circuits.
The uncertainty
of the bias point depended heavily on the variations in Vbe from transistor
to transistor or diode to diode.
output gate.
The output of the amplifier becomes the
If the signal swing is insufficient then further amplification
is necessary especial'1y if the slope of the gate edges is poor.
For our 2.5V BP
amplifier input, we know that the output will be a squarewave, Figure 9.11,
centered around the 325 mV to 425 mV, but modified by the .bandwidth of the
amplifier.
The more precise we want the gate edges defined, the higher the
gain we require.
With limiting it is not the output amplitude swing that
defines the slope, but the gain divided into the input signal slope for the
specified output swing.
For example, if our gain were 100 and the output
swing was limited to 2 volts then the input equivalent change would be
2.V =
100
.02 volts for a full swing of the output. This then would indicate
that the output gate edge would be similar to the time it took for the input
to change from·365 to 385 mV if the amplifier bandwidth is adequate.
With
proper biasing the output gate levels could be made compatible with some logic
family which would make the following 'and' gate simple to construct.
The considerations then are the bias point stability, the,gate edge slope
and logic compatibility.
There is a propagation delay consideration particularly
when using multiple gain stages in series to obtain the required gain.
The Schmidt version is not too much different.
Positive feedback is
provided to the bias point in order to interfere least with the Full Wave
Rectified signal fig.q.IZ.The feedback resistor RF is connected between the outof-phase output and the bias reference network.
The percentage feedback is
determined by the signal swing on the collector and the resistor divider
..
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network to the input signal.
f
This circuit is easier and cheaper since it
IJ..
provides a large gain, fast slopes and a more stable bias reference than a
multiple amplifier chain required to get the same slope.
Also a second
advantage is the shorter propagation delay and freedom from noise while
traversing the bias point.
The differentiator may take several forms ranging from passive differentiator to active.
Operational amplifiers are usually not suitable due to
their restricted bandwidth.
fairly easily.
We can build discreet active differentiators
Consider a differential amplifier with a capacitor in the
series feedback path or a resistor and capacitor.
The gain equation simply becomes from Fig
of
I
C S
When rearranged, we can
Q'''3/1
=
se~
(EQ 9.2)
both the zero at the origin, which we desire, and
a pole which would be helpful to restrict the bandwidth related noise.
There
are other p.oles resulting from the internal transistor and stray capacitances.
The circuit is inherently AC balanced in the emitter but does ,require DC
current sotlrcE' balance and load resistor balance if output DC levels are
important.
The same circuit can be built using an inductive load with similar results.
Here a single current source could be used if we wanted to.
A
2L 5
Notice the absence of the pole.
See Fig. 9.14.
(EQ 9.3)
We do not escape as easily since all inductors
have stray capacitance and series resistance.
The Bode plot will show a roll
10.7
DETECTORS
due to this capacitance and it will. be second order with a zero close to the
..
origin, but not at the origin.
fHA'.) ~
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(EQ 9.4)
,
.
'
Some have tried to make the AC unbalance due to the separate
lnductors
tolerances
more balanced by winding the two inductors on a single core using bifilar
circuits.
If we were to use a simple RC coupling network as a differentiator
we would have to contend with the attenuation.
With the above amplifiers
we can adjust the gain for a net gain instead of a loss.
Of the two active
differentiators considered, the first has a serious difficulty with DC stability
if it is to drive a sensitive threshold circuit.
The inductor' version has a
very low IR drop therefore is insensitive to variations in the current source·
or load resistor and current source balance.
One way to retain the advantages
of the first cirtuit is to add a balancing circuit to the current source and
make the following stage differential with a large cOrTlllon mode input range.
Balance is simply obtained by the use of a potentiometer in series with the two
sources in one of several configurations.
Some are shown in Figure 9.15.
Regardless we can use a differential following stage to provide the
limiting function.
The emitter followers are required to minimize Miller Effect.
The circuit shown in Figure 9.16 consists of a differentiator followed by a
differential amplifier.
Here we choose not to use a Schmidt trigger as we
10.8
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8
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q."
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P(fr~ItFI.rrArDP- .
DETECTORS
want our oU,tput edges to correspond exactly to the center of the differentiated
pulse peak which is the base line crossing out of the differenthtor.
amount of gain required depends on the accuracy we require.
The
If we were dealing
with a sine wave i.nput we could easny calculate' the required gain. Assume
the input signal were a
(2~5 - .375)VSp sine wave, 0-1800 , of l.MHz timing
O.5~ s
. or 180 for 2.77 ns/d~gree. If our logic land' gate had a minimum rise time
of 5.0 volts in 5.55 ns then we should provide sufficient gain to make 2.0
degrees of input signal at the base line equal to 5.0V logic level.
Therefore,
the minimum gain of the limiter and differentiator should be:
,
..
5·0 V
A == Ii. ~- o. }7S'J( "e,;.... 2., " )
.l'
.
.Tr . . rl\~ .\j~t t\
t..~~ 1A"""'.\~.
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.
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= t 7- 'I-
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.' (EQ 9.5) :.
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s.·~f.:-... .L 1~ ) ' {
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Going back over our bandwfdth restrictions for the collector load resistor,
we should provide this 'gain in several stages instead of one.
To get our gain we would probably require
three stages.
The gain per stage is f67:4
or 4.06 per stage.
this fairly easily with basic emitter coupled amplifiers.similar to
in Figure 9.17.
shown
If the differentiator is designed for a gain of 2
then we' need 3 other limitors with a gain of 4.06 min each.
~olve
th~t
Because the input to the differentiator is single ended, we
need another gain of 2.
we need to
We can do
The next problem
is the cascading bias required with DC coupled amplifiers.
With discreet amplifier construction we could alternate NPN - PNP amplifiers
and thus maintain a reasonable power supply voltage.
This is probably the best
way to proceed as AC c01Jpling requires a knowledge of the low frequency bandpass requirements and hence the data code's spectrum.
10.~
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DETECTORS
Notice the timing requirement to center the propagation delayeddifferentiated pulse in the Gate square wave.
If the Gate generator used an
equal number of stages of limiting gain then the delays should be about equal.
This becomes more important when we consider that the input signal actually
varies in amplitude as a function of disc diameter(in disc machin~)or media ..
coating variations.
This variation must be considered when calculating the
total gain required for both limiters.
The total gain must be calculated
based on the absolute minimum signal from the head as modified by any
intervening gain stages using their minimum gain.
let us go thrua design using the ECl logic family as our output. This
is chosen due to the levels and speed but particularly the non requirement for
r
..
cascading bias .
Going back to our circuit of Figure 9.12, we can make a small change to
make it compatible with the ECl family.
See Figure 9.19.
The change required
is in the base bias network for transistors 1 and 2 with regard to the bias
required on the base of transistor 8 and the improvement required to reduce
the effect of power supply variations on'the clipping level by using the diode
D as a partial regulator.
Notice also that the Differentiator does not care
about the use of the clipping bias as it is AC coupled and will not be
affected by the difference in DC potential as does the Gate Generator.
We will
choose the bias values such that the input signal swing will not permit
saturation of the Differentiator and Gate Generator collector stages.
If the input signal maximum is lO.Vpp differential, the nominal is 7.0Vpp
(
differential and the
mi~imum
Full Wave Rectified signal is
is S.Vpp differential we then know that the
2,5 iJ
BpSE max and '·2'> VBP - SE min.
We will
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retain our 15% clipping level. The bias for Transistors 1 and 2 should
be:
(EQ 9.6)
Choose
-~·3V
to allow for tolerances of 5%.
The bias for Transistor 8 should
be:
(EQ 9.7)
If we do this then we have bunt 1n a one diode drop margin for the
collectors 3 and 4.
If we choose the resistor divider network to operate
off -10 volts and have current of 10.ma to maintain some stability due to
base currents then:
vtwo,..-Vy
IS-.
(
No,..
";'
~,-t/:'f
ID.-'
-
4- ·3
R.
:
::-
(.:).-
If 30
= ,.y J K
(EQ 9.8)
(~ ~Jl. ~ / ) )
~
,.OK
,
(EQ
9~9)
(EQ 9.10)
If we allow 5 rna for the diode, a IN4448,we should have approximately 0.7V
drop.
This leaves 5.ma for R2 and R3 to develop 0.375 volts.
O.~l:.?.
f? 2. :-
(
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V
52
::=
~
5".---.....
..
0-7 - O~Z'l
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•
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if'" -
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(EQ 9.11)
II)
(EQ 9.12)
10.11
)
DETECTORS
.
,
In order to minimize the disturbance to the bias due to base current variations
in the operation of the Full Wave Rectifier, we should replace Rl with a
4.3V 5% zener.
This way all margins are met while maintaining a low
impedance at the bases of transistors 1, 2 and 8. We now need to lower R4 to
allow 20.ma zener current as well as allowing a higher current thru the
diode (lO.m'a).
We can also add a zener at the bottom to control the current
sources (see figure 9.20A).
~
=
zJ'a o4o
11),
2.:;). '--
(EQ 9.13)
The value of Resistors R2 and R3 should be halved to accommodate 10.ma
instead of 5.ma.
Let R2
~
24.9Q and R3
=
43.2Q
If we choose the CA 3045 transistor array we will obtain an added bonus of
Vbe matching to 5.mv which will help.
The 20.V breakdown between substrate
and collector junction is adequate, as is the 15V collector to emitter,
breakdown.
The base emitter breakdown needs examining for transistors 1 and
2 as they will see the full swing of the input during rectification.
The
maximum input difference is 5.0 Vpp SE or just equal to the minimum specified
BVbe for the devise.
This is close but is acceptable.
If the max input swing
were larger we wou ld either have to find a transistor with a higher BVbe or
use series diodes for rectification preceded by normal emitter followers
in order to minimize distortion.
on the Gate Generator.
We would also have to refigure the bias
Either way we are faced with a matching problem in
order to minimize the unbalance of the rectifier halves.
See Figure 9.20B
for the variation.
10.12
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(EQ9.20)
The design of the differentiator is next.
Going back to Equation 9.1we·wou1d
like to place the pole at an order of magnitude above the highest frequency of
operation FH• (We, may modify this later when we consider noise degradation.
(The Rule of Thumb usually makes the phase angle ~qual to 700 at FH).
We would also like the gain at FH to be such that the collector signal
is linear and centered around -1.2V in order to drive the following amplifier.
With a 2.5V peak rectified input signal we would, require a gain loss to
guarantee a linear swing.
'.
r,.
The current source resistor should be:
=
,.
We can solve the dilerrma by providing clipping at
the collectors to reduce the amplitude swing while retaining the slope around
the base line. A pair of back-to-back Schotky diodes (IN 5711) will function
10... 14
I.
DETECTORS
well as they have no storage time constraints.
(Figure 9.20C)
Linearity
in the emitter circuit is maintained by making the impedance and current
!.
such that neither transistor is cut off.
two 6.0
rna
For our
200~collector
resistors,
current sources will give us a -1.2V collector voltage on each.
The emitter circuit must have an impedance at 5.0 MHz of greater than
2.5'V
__- - : : - : ;
::t
6.of,.t3
if 3 J.... "'""
(EQ 9.21)
If Xc is greater than 4330 then that will satisfy the'requirement.
I
_
I
-II
C =
1.11' F" X',
(l"";(r'r.,,,,·X't."~:)-:J::: 7·"''Io,a FtIJ
£~ ,.z.l.
If we chose 62 PF then we should cover the worse case capacitor value
since we calculated the minimum current source current at 6.ma.
The gain at .5.0 MHz becomes.
z. n f~
=
/f00
>I'!>.'!f /-87-,-
=
if RE
Co
=
=0
.z. (
1
z.. (0)
(T +~.
-
j (?71X ~,,,,'){,.l/(,';I()
0']75'/87"·
(EQ 9.24)
The pole is located at
2. Tl
1fT
C.
(EQ 9.23)
=
We could calculate the degradation 1n phase due to the real transistor
parameters using the hybrid 1T model, but the frequencies are higher than we
will be interested in (above 50 MHz).
We can add current balance by using the potentiometer as part of the
emitter source resistors.
calculated.
The remaining gain for both limiters needs to be
For a minimum input signal of S.Vpp Diff we have 1.2SV BP-SE
out of the rectifier to make this signal be a 1.V square wave with rise
10.15
\
'
DETECTORS
~, ,
and fall times equal to the logic families characteristics of 1.1 ns then
at 5.0 MHz 1.1 ns represents
(S"1.t~
A
=
iffflp
'''20 H (.1 .,.,~-1 u,
)( 360 0 )
=
1. 98 0
1.0V
(EQ 9.25)
(1.25V)(sin 1.980)
This indicates that the gain already pr.ovided with transistors 3 and 4 is not
sufficient.
Since we also need to match the propagation delay of both
channels and the gain of the differentiator is only .778, then we need to have
the differentiator channel gain equal to
(EQ 9.26)
::: 2 'I- 76
We need a gain of greater than 29.76 to achieve the same accuracy..
gain cannot be achieved in one
st~ge
Since this
using a MC10116 line receiver'as an
amplifier-limiter then two will be used.
This is because /29.76
< AQOl1o/""'1II
The final design needs only two series MC 10116 line receivers for each
channel.
The output land l gate can be a Me 10105 positive lor-norl gate.
Notice that this design is based entirely on a percentage of the nominal
signal therefore amplitude plays a dominant role in the detection process.
If signal amplitude is lost then data is lost.
The waveforms should be reviewed and are shown in Figure 9.21.
The
output pulse width is not controlled and may be equal to any value between
10.16
DETECTORS
1.1 ns and 50.ns depending on the input signal amplitude.
If the differentiated
pulse is not centered in the gate then noise can occur at the edges of the gate
due to the noise of the differentiated signal.
The clipping level may be
adjusted to a different percentage of·the nominal signal to change the width
of the nominal gate.
To properly characterize the circuit a plot of pulse
centering as a function of amplitude should be made, also as a function of
frequency at certain fixed amplitudes.
This completes the design of a detector that can. handle signals in the
left hand portion, Region 1, of the bit density curve.
There are a large number of circuits that could perform this function
depending on the availability of components and integrated circuits.
In
putting together the circuits for each block, all we need to consider are the
various interfaces, their voltage, current and timing requirements.
Now what of the other areas of the bit density curve? We can evaluate
them by looking at the waveforms in each area for a string of random data.
In Region 2 the signal is modified due to the pulse interaction at the
higher densities.
Resolutions can go down to around 70%, meaning that for
three transitions in a row, but isolated on either side, the center pulse
barely crosses the base line.
This is illustrated in Figure 9.22.
we show the triple pulse waveform for each of the four Regions.
Similarly,
If we were to
use the detector we have just designed for Region 2 signals, the clipping level
would have to be lowered to such an extent that the base line noise would pass
thru.
Or in other words, the minimum amplitude of the center pulse is less
than the noise.
In terms of clipping level percentages in Region I we could.
10.17
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have a c1jpping level range of from 50 to 15% or .35% where 50% represents
the value where we just lose a pulse and 15% of the level where we just pick
up the noise.
In Region 2 this range becomes negative; in other words. the
clipping level value for loosing the center pulse is below the value to pick
up noise.
Since we must operate some detectors in these other regions. we will
discuss methods for accomplishing this.
The first clue comes from the way
we visually determine the position of a transition pulse.
Each pulse has
some leading slope, some zero slope peak, a trailing slope of
polarity, and some peak-to-peak amplitude difference.
t~opposite
In Region I the amplitude
is always in reference to the base 1ine therefore some fixed or moving reference
around the base line will suffice.
Here in Region 2, or worse, the base line
becomes a moving target depending on the transition pattern.
We can take two
approaches." The first is where each signal peak is clamped to a reference and
the amplitude is measured opening a gate if the signal exceeds some delta.
Clamping is achieved by a diode as shown in Figure 9.23.
As the input signal
approaches its positive peak, the capacitive current is shunted to ground thru
.'"""
the diode then as we pass the peak this current reverses, the diode reverse
biases and the RC time constant is restored.
This allows the negative slope
of the signal to be measured by the comparator.
represent some percentage of the signal.
This voltage is chosen to
As can be seen there will be a time
delay before the gate is opened following the true peak or transition center.
This must be allowed for in the design.
Further problems are the forward bias
of the diode and the capacitance on 'that node.
non-uniformity of the pulse amplitudes.
The main problem though is the
If the second p.ositive pulse were of
a lessor amplitude than the first then the circuit will not clamp to the second
peak.
All of these problems are addresssed in the design that follows.
10.18
.TECTORS
The choice of the coupling capacitor is dictated by the stray capacitance
F the following network.
If C is very large compared to the stray capacitance
len we have control of the signal transfer.
Secondly, if the diode drop is
.
"
mall compared to the signal
peak~peak
amplitude, we retain control.
Also,
f the diode has very short minority carrier life time, this also helps
educe the switching time between the forward conducting clamp and the peak
:ollowing long RC time constant.
Another problem is the variation in amplitude.
r
I
Chis can be solved by taking advantage of the alternating nature of all read
;ignals polarities.
If we provide a deliberate positi.ve current during the
periods of time immediately following the comparator sensing level, we can
ensure that when the waveform again changes to a positive slope there will
always be sufficient charge to clamp during the positive sloped portion of
the signal.
This is illustrated in Figure 9.24 where the point B represents
the point where the second half comparator operates and point A the first
sensing point.
All this clearly shows that two such circuits are necessary
to cover both positive and negative (positive on the opposite half of a
•
differential signal).
Consider our 5.MHz HF signal we used earlier.
The diode should be a hot
carrier type to eliminate the minority carrier lifetime and thus speed up the
reverse recovery of the diode.
If the forward drop is 0.4 volts then our
signal should be 10 to 20 times this value or 4-8 Vpp min.
10.Vpp diff as an amplitude requirement nominal.
Let us choose
If the stray capacitance
is around 10 PF then the coupling capacitor should be large or 20 - 100 times
that value or lets use 1000.PF.
large compared to
Xc
The value of R should be such that it is
at the lowest sinusoidal frequence (F L) of interest.
If
that were 2.5 MHz then let
10.19.
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10
(EQ 9.27)
:;:
::
let us choose 681Q as a standard value.
This forces the driving impedance
to be less than 60Awhich we can obtain by an emitter follower.
Because the signal at the comparator input is less than a few volts,
it is well within the capability of an ECl line receiver.
is shown in Figure 9.24.
The basic design
If we choose a comparator reference of 15% of the
5.0V pp -SE signal nominal then the comparator should be set to
Vf..J = -l~~ +Vjl~ -(o.fsX:;·OV)=--I'ClI;.
+
O·cJV -
P'7)"J/
:::
-/·7rv
(EQ 9.28)
v
(
In order to try to keep this value close to the 2 diode reference, which we
provided in order to ·keep the comparator signal within the range of the line
receiver, we should make them part of the comparator reference.
If we used
a simple resistive divider as part of the negative supply to. the diodes, then
we maintain control and the comparator reference becomes relatively insensitive
to the diode drop variations.
The PNP switch should supply a current to the
clamp equal to that expected from the signal.
I
=
let us choose 10 rna.
7· Jy. ,......
=
(EQ 9.29)
The bases of the PNP switch must be driven from a level
such that the collectors do not saturate.
( - 0 . 8 1 mnx HI and -1.85 min low.
The standard ECl levels are
Two diode drops will guarantee a voltage
more negative than the collectors.
The IN4448 diode shows a minimum drop
Ip.20
DETECTORS
of 0.62 Volts at S.ma; therefore. the two extremes will be
positive)
Vu ::: - 0·81 v ./
V6
L
=
Z(o.{,z v} =.
_/./>" _
2 (0.'2"):;
-2·();'
-
(wc~~case
L'.
most
(EQ 9.30)
V
(EQ 9.31)
3'01'"
Now all we need to do is guarantee a minimum of S.ma thru the diode.
Using
a -S.2V ± 5% power supply, the resistor is calculated from
=
(EQ 9.32)
If we used 30an , we have plenty without exceeding the current from the logic.
Now we know the current supplied from the PNP switch was chosen at 10.ma.
The emitter resistor can be calculated as a nominal or we can ensure worse
case that we ,have our 7.34 ma -- let us do the latter.
(EQ 9.33)
=
r\r
We can now calculate the current
.
,..
..
~equired
to maintain the two diode -1.4V
reference as the PNP'swftch current subtracts.
Using a -S.2V supply and a
10.ma residual current for the diodes we get
/').7fv
10....... +-
+-),S!" V - {J.,s-v
2...(21""'0'
(EQ 9.34)
Therefore the resistor total required from -S.2Vis
V
-
too, ••• '
differentiator only here the transistors are either conducting or
'f which makes it an overdriven differentiator.
, 'I
It functions by forcing
Ilitter current source to flow oNTO the capacitor until its charge
2S
such that the transitor bias changes to a forward bias.
the waveforms.
Figure 9.26
The collector 7 current changes from the source value
ero on cut off while the capacitor is changing its charge.
When the
, i
ter 7 voltage falls to the value necessary to turn. the transitor 7 back
ncreasing the collector 7 current back to the source value.
When the
:site edge occurs the current which normally flowed thru the transistor
)w flows thru transistor 7 as well as its own source current, thus doubling
collector 7 current until transistor 8 s bias allows it to turn back on.
1
ause of the double collector current, a pair of clamp transistors 9 and 10
. I
added in order to keep the collector 7, 8 out of saturation.
The design follows the ideas presented in the waveforms.
Let us choose
current source of 10.rna in' order to maiQtain circuit speed.
=
=.
--------------~----------io·~ ~
} /I ~
(~301
__
=
(if)
f we want a minimum pulse width of 50.ns, then the capacitor should be larger
~han
c
3X'
==
=
I'i~/.:;J"
-
/.'>v -
-8
'\
)1- t .::>k'7
".tj'ill/'
::
(EQ 9.38)
10.23
)
-~
i ...., . . . "- .:. ...
r ,
.
>..', \
.... \ •
0-
.:.."._.
•
DETECTORS
We should choose 75 to 82 PF since the pulse time is slightly altered by
the transistor current as the off transistor starts to conduct.
The collector
load resistor is chosen to give greater than an ECl logic level change max of
1.85-0.81 volts or 1.04Vi let us choose 1.2 Volts at 10 rna.
The two resistors
associated with the clamp are set to develop 0.6V across the emitter-base
resistor and 0.6 volts across the base-collector resistor at 10 rna; therefore,
theshould be 60n each (choose 60.4n).
The remainder of the circuit is built using Eel 'blocks.
The circuit for
ignoring subsequent same polarity pulses is simply anRS latch followed by a Bidirectional Single Shot.
The only difference to the design
from the Split
Bidirectional Single Shot we just designed is when we tie the two emitter
followers together thus performing the positive 'dot or'function.
We will use
300Jlresistors for the emitter return resistors as we calculated before.
The
delay line ,should be inserted in the )imited differentiated signal path
preferably between the two amplifiers in order to preserve as much syrrmetry
as possible.
N~w
A differential delay line is preferable.
that was a lot of circuitry but we had to perform the functions -required.
To summarize. we needed a Gate Generator capable of operating on
differences instead of a base line related reference.
peak~to-peak
The circuit chosen
introduced an amplitude dependent delay and a bidrectional gate equal to the
timing between transitions plus or minus some error.
This forced the pulses
resulting from the limited differentiated signal to require a delay and to
have separated positive and negative peak sensed pulses. ,We solved both these
problel1l1with a differential delay line which maintained most of the syrnnetry.,
(If a single ended delay line is used then the symmetry can be recovered by
careful adjustment of the bias of the following differential amplifier.
Note
)
10.24
"
,..
1
of 2 is lost by going single ended and back to differential.)
ted pulses was obtained with a unique circuit called a Split
l" • • •
~,:.
nal Single Shot.
thru an
~ND'
We gated these two polarity. determined-pulses
circuit.
The noise related pulses that might follow
mate 'peak' pulse were ignored by setting and resetting an R.S.
1
the first pulse thru the gate.
(Subsequent pulses do nothing.)
fA(H
is now in square wave form, an edge for/\transition, just like the.
rent was which was used to write the data.
I
This was converted back
to Zero Pulses by the use of another Bidirectional Single shot
. time with a positive dot 'or' output.
When testing this circuit
{ must be adjusted to permit all acceptable signal amplitudes to
hout altering the time of the peak sensed pulse.
eak sensed pulse split the edge of the gate.
Alteration may occur
The comparator sense
ty be lowered if the noise related to a base line is absent.
This may
F the low frequency signal is high enough to keep the entire bit
within the poor resolution arelof the Bit Density Curve.
The above
ctly a function of the code used and will be discussed in a later
second Region 2 detector can be built using a simpler Gate Generator
code guarantees that the signal will not return to the base line.
st of the circuitry essentially does not change.
We could say that a
2 detector is the most complex of all the possible detectors.
The
:ion is simply to alter the signal by passing it thru a lead network,
full differentiator.
The reason is that there exists in Region 2 a
al shoulder on the lowest frequency signal which/if differentiafed/
ces a droop.
It is this droop that is noise'sensitive.
If noise enters
..:
.. " W , _
•
'_~""
. . .;. -">;,,,.,
,
Vb
trl/'/\/J
7
ll!!
1'7
,-
~:.. .
L
~.
~v~
Vf7
~:--_ _ _ _ _--'~
L _.1
-
-'
\- -
flNfl€.
-
JHOI
•
1
-
-
-:
'\- -
C''''''''
'-'/.
c~
'LA~"
l
y'
{,'
r
r
DETECTORS'
- ... -... """
the signal, and it does, the slope of the shoulder is changed either to zero
"
,
or oppositely such that a zero crossing is obtained which results,in an erroneous
output pulse.
.
It is this shoulder caused droop (Figure 9.27) that forces
:'.
code related bandwidth limited Region 2 signals to still require a Gate
Generator.
,
Such is the case with the industry wide MFM code when used in
this region.
,
"
St.{"oIP filL'
If we use a lead network instead of a)\differentiator then the
[';
f•. '.
droop is reduced 'and the output can be limited to create a polarity related
gate.
We still require
of the true peak.
flp.JT
the~differentiator
because we need the precise time
A lead network would distort. the pulse timing.
The circuit
-I
I'· '
I
i
is shown in Figure 9.28.
The shoulder can be shown to contain considerable 3rd Harmonic.
The lead network need only attenuate the third harmonic to achieve the desired
result.
Let us design for a fL of 2.5 MHz.
3rd harmonic by 6 db more than the FL signal.
We want to reduce the differentiated
This. of course, depends on the
amount of shouldering we have on the lowest density signal.
The pole associated
with the network can be established from
. rfe -
lx,-
:: Z voL..!!:..
(EQ 9.39)
-I
CEQ 9.40)
The 3rd'harmonic gain of the differentiator is 3 times the gain at the
fundamental; therefore, we want half of that to get our 6 db loss at the
. I
3rd harmonic.
10.f6
~
,{
T
-ft----I
_ 'A7E
lei
r",..,e
CHAN/II6~'
d .. T11IJ/J
f {(,
l-€AP
dv
rJf
NErc".)O~".
J
CA 7e.
'1"2.
(itA./IE/CA70/'l-
~---i ~.I>.
.5,5.
"
'. I
DETECTORS
e
=
:~
£.-a-
-j
. ,I
~-/~
/(£
~~"''-'l
~.
~
(EQ 9.41, 2)
x,
= '),,00
1ft
-
~~
::.
. (t4--' 1fi
, 1
>, .. :
t·· ,',
;
~!
)f .. )
4t:'0..e,.,..
"
.
CEQ 9.43)
••
:' , I
,
.:;
}<,
~ tP 0
.::
t;..1i'
.At......
1
( a..,.-'
Xc )
.
-;:;e
CEQ 9.44)
~
C:.-
:
.1
:'.1
~ ~
.
..:
f' ~.J
t1 E
)<,
::
/3 }.)} ,e~
::
6:... ...
r
(64....-I i-:ie
Xc. )
CEQ 9.45}
•
CEQ 9.46)
-
1
)(,
1-
(rc.:' f~)
=
3
(1J}.)~/t4..
. (~I ::) :
.~
. I ~ ~, 1ft
X .. )
-
-
-I
Xc.
)(,
.t/!"'.... ~L.a...
.1
(ea....- ' ~)
,
4..
; I
0 0
.. (t/-
L"';'"
c.a,..- I - Xc. )
;tt...- .
"'f;
-.
CEQ 9.48)
'trt!'
(f;:. -I , ~.r.~~).
CEQ 9.49}
.,
CEQ 9.50}
substituting the identity of
A
tan- I A = sin-Iv I + A"2.
(EQ 9.51)
we can get
-
I
A \
sin (s in -1I{'l"7A1.,) = 2 (s i n (s,;"
.A.
3.-;r; + ~
2. })
(EQ 9.52)
1
-/I
1
(EQ 9.53)
1
1
1
10.27
1
)
":1
J
1
.....
C-~
l.~o-e..:-.
OS'
;
1
1
DETECTORS
or
=
..
Xc
e
tan-I" = 52.238756° =
tan-l !A
=
(EQ 9.55) .
23.283731° = a
200 sin 52.238756°
158.11
tan 52.238756
RE =
. (EQ 9.54)
1.2909944
158.11 n
=
=
(EQ 9.56)
122.47
(EQ 9.57)
n
{EQ 9.58)
Xc produces 133.33.f\.at 23.383 0
for proof we will verify that 3·
= 3
158.11
sin 23.283731
=
133.33 n QED
(EQ 9.59)
Our capacitor is
c
(EQ 6.60)
Choose
390 PF •
. The resistor becomes, using our 6.0 rna current source,
All other circuit values are as we calculated them before.
The limiting gain required for a 5.0 Vpp diff input signal is from EQ 9.25
Amin
=
1.0V
(1.25V BP SE)(sin 1.98°)
=
23.4 as before
10.28
~
(
DETECTORS
23.4
Therefore we need
~
= 11.7
in the following stages.
The MC 10116 has a minimum gain of around 8; therefore, we need two series
stages as before.
This circuit is less noisy due to the clamping operation of
the first c,r,u't for Region 2 butl as stated before/can only be used with
signals that do not return to the base line between transitions but have
a reasonably small shoulder.
The circuits of Region 3 are are far simpler, in fact, they are the
cheapest of all.
The drawback is, of course, the much poorer resolution
and the attendent bit shift.
We did discuss ways of reducing the bit shift
by using Write Precompensation, but in this region that method has diminishing
(
I
returns due to amplitude loss.
Littrell
We will discussAother methods of compensating,
but they are .restricted . to certain codes.·
The block diagram is simply a differentiator followed by a series of
limiters and a Bidirectional Single Shot.
up pulses in the gate.
No gating and no need to line
See Figure 9.29.
Again we will consider our 5.0 MHz, 10 Vpp max diff linear input signal
only we will drop down to 1.0V pp diff for the minimum.
with practice in this region.
This is consistent
The differentiator is the same as before --
we do not need to change a thing (except remove the delay line from the Region 2
version).
All design criteria is the same since we want to use ECl logic.
The
only thing we need to do is to refigure the total minimum gain required.
(
(EQ 9.61)
10.29
)
~2
OfJ71"vT
~~-_ PATA
-----JI
,'----_
---'nL-------In'--_
Ft 6-
?
)0 P
rECTORS
owing the gain of the differentiator is .778G1B9.9° from EQ 9.23, we
quire
115.77
.778
=
148.8
in the limiters
(EQ 9.62)
lis is too much for two limiters with a gain of 8 each therefore we need 3.
Ie spare gain the~J 512
11148.8
=
3.4 more than we need, but it does not hurt at
11 since the signal is limited.
In Region 4 the detector is the same as in Region 3 only the bit shift
r peak shift is so bad that other methods must be used to determine the presence
r absence of a peak in a particular time slot o·r bit cell.
This will be dis-
ussed when we talk about clocking circuits.
There is- no reason to assume that the preceding circuits could not be
iesigned' to int~rface with T2l logic or any other logic family and most
'Jere prior to 1965 ..
Another type of detector is used in Region 2, particul.arly the right hand
side of Region 2.
As can be seen the sh6uldering which is due to 3rd harmonic
content is worse to the left and better to the right which is opposite for
bit shift.
We can take advantage of the less'er shouldering by introducing
a circuit that is tolerent of some shouldering.
Refer back to Figure 9.27.
As can be seen, the worry is when the noise content carries the differentialed
signal back across the base line thus generating a false bit.
In the circuit
of Figure 9.30Aa delay line has been added in series with a Bidirectional
Single Shot and applied to the clock of a IDI flip flop.
This then provides
a clock for each zero crossing regardless of its legitimacy.
The operation
can be deduced with the aid of Figure 9.308
10.30·
DETECTORS
As can be seen if the delay is established to be greater than the noisy··
droop area A and less than area B or the certainty area then the 10 1 flip
flop will reproduce the limited signal, delayed, without the noisy area for
a noise generated clock will just clock in the same polarity.
A
<
Delay
<
(EQ 9.63)
B
The engineer must be able to guarantee the above equation for all head - disk
variations over the proposed production.
The remainder of the circuit follows
as before, with the use of a Bidirectional Single Shot to generate RZ data.
There is another form of differentiator that can be designed that provides
a poorer response to the third harmonic than the more traditional differentiator.
Usually high frequency roll off is provided at the expense of true differentiation
by placing the unavoidable pole such that the phase angle at the highest frequency
is 70 0 .
For example, in a system where
FH = 2 FL we choose Xc of the differentiator as
lOon at FH
therefore
Z,,,,,,/TrctC. FH
--
f? frt,
=
Tl£tf
IOO~
4~7o
::-
0
/00 ....
4- 70
, '2.00..-
.,
::-
(I!J'.C(
""-
J',3r--
(EQ 9.64)
(EQ 9.65)
(EQ 9.66)
"
(EQ 9.67)
10.31
c
DETECTORS
IFL
for a gain.
(EQ 9.68)
Then we can see the worsened effect of the shoulder.
The new differentiator
produces a fixed phase angle of +90 0 with a sine function in magnitude that
can be judiciously placed to our advantage.
This circuit was invented by a student named TSAI HWA CHEN* in response
to an engineer's complaint of the foregoing effects.
Mr. Sordello provides
the following derivation from figure 9.31 :
From the identities
e
j~
-e
-jf:1
~J
(EQ 9.69)
V
_ jwT
e
v-- (
\/'N'
(>
e+1'fT
/-
-)r...IT
e~
+j .... T
e~
TjwT
e""'i:"
-
p-jwr)
L
I
CEQ 9.70)
f
CEQ 9.71)
~(
., .
-.)
CEQ 9.72)
= 2. j (
'tjl..)
e~
T
-,'
_
""... ""-,
r
\'j t
:Lj
.'
/'
2:j
f
*"Use of delay ""f1.j
Computers, Vol. C17
A
'"' r
,'-
.' l r
/
'
in Reading Manchester Codes," IEEE Trans. on
= #9, Sept. '68, Pages 827-845.
10.32
.
,
~
\
\
\
'
l'
T ----,
L-.--
frG-
q.31
,
~-----<:.-
Z + ___
.
."
/"" .... 17.:1
l. 'II)'
~#~
,
,,, .....
~,....,..._---'i-I
,-
\
I
\
1M}
\
I
,
I
\
I
\
wiTH
PfLAr
37T
A~P
I\f,MQ't'Ej)
v...
v-
2"
-=- -V
'.-
.
(
i-
•.1
fiG.
q.32.
(5
\
\
,
\
l1T
MA 'N'TVp~
"
I
Pu5LICA110N IN1ENDED.
ALL RIGHTS RESERVED.
DETECTORS
(
which is a gain with a sinusoidal response at a phase angle of 90 0 and delayed
T
by 2".
If for a Region 2 system where FH
1 then
FH at
/
(f'f.
WH 7
z...
Where WH
=
21f FH
&f.)2.
2 FL we can choose to place
=
A)
7r
=- -
(EQ 9.73)
then we can calculate the delay required.
T=
<.. FH
(EQ 9.74)
This says that at 3F L and at FL the magnitude response is 0.707 or
(
---~
= --
(EQ 9.75)
Using this circuit the gain at 3F L becomes the same as at FL for a
1
2.676
improvement over the older method.
Because the accuracy of the peak itself in the presence of the 3rd
harmonic is enhanced the limiter stage gain needs to be raised by 2.676 or
more when using this differentiator due to the reduction in the 3rd harmonic
,
content.
A second filter is required in order to suppress the higher lobes
of the magnitude response.
This filter precedes the differentiator.
The differentiator circuit is shown in Figure 9.3).8
The delay line is placed across the collectors thus producing the
function of'subtraction differentially.
The collector resistor load
)
10.33
DETECTORS
is fixed at
Zo
of the delay line thus absorbing reflected energy either
way.
This concludes the chapter on detectors.
10.34
_C'-~---_-
- - : - : _ ._ _ ._
- -. -_.
-'---'--"~-,",'~~---""".--
PUBLICATION
(, ·O.
I~TENDED.
ALL RIGHTS RESEkVED.
LINEAR AMPLIFIER
The linear amplifiers are used to provide the linear gain between the
preamplifier and the detector.
phase
correctio~AGC
They include stages of gain, selection, filtering,
gain control, and signal shaping.
This chapter will deal
with all these circuit functions.
Reviewing the block diagram, Figure 5.1, we can see the placement of thesr
amplifiers.
Figure 10.1 shows a typical functional block diagram.
We can now discuss the type of amplifier
about the detector requirements.
require~
based on what we know
All detectors that include a fixed amplitude
reference as a criteria for opening a gate require Automatic Gain Control (AGC)
such that the input to the Detectors remains within some bounds.
Those that
do not have a fixed reference for the gate and those with no gate do not require
AGC.
There are some circuits that use a amplitude determined reference for the
clipping level instead of a fixed
~alue ~uch
as we used in Figure 9.19.
This
could just as easily be derived from the input amplitude by adding a filter to
the diode isolated Full Wave RectiFied signal such as is shown in Figure 10.2.
, The dynamic range of the Detector input would be wider due to the variations
in head signal and amplifier tolerances.
The AGC restricts the dynamic range
of the detector input to a more reasonable value which reduces the amplifier
power dissipation associated with very large signal swings.
Detectors in Region 3 do not require AGC.
They do, however, require a
very large gain but most of this can be in limiting stages as previously
discussed.
The Bandwidth of the Linear amplifiers req'uires careful control in
order to properly pass the head signal while eliminating extraneous noise.- They
are also called upon to correct for non linear phase delays and to provide some
}
,
11.1
,
f/6-
/0-/
HAJ/'-
i.INMIf.
11VC'c'V,jNAJC.
19/'tI'UF;£'.<
"
OLDC/C
Pdltf~A"""
14.~.~.
tclS/JifN'f.. ,
ToJ""TID,J
To
8,"111, Z.
-v
fl'-
10. '2-
,
THe
c.1. I I'I'IN6
FtJ'" T7f£ f{fJ7 OF
-'1/
LtVe-t-.
THe
-v
(ree
CIIt{~lr)
rl6.
1" 'I
PUBLICATION INTENDED.
ALL RIGHTS RESERVED •
. LINEAR AMPLIFIER
spectral shaping in some cases.
The code used determines the width of the
Bandwidth while the data transfer rate or transition rate determine the upper
fundamental frequency of interest. Most codes have a DC content thus any AC
coupling after the differentiator is
detrimental to the bit timing. This
occurs as the base line moves tQ make the area above and below the base line
equal.
When this happens the zero crossings are lost resulting in time
shifted crossings.
You will notice that all the designs of the differentiator
that we discussed in Chapter 9 are DC coupled with
ba~ancing
circuits, to elimi-
nate offsets, following actual differentiation.
AC COUPLING
The linear amplifier, however, can be AC coupled as long as the low
(
frequency cut off, is below the frequency at which there is significant energy.
. This raises, a problem as
the~of.such
coupling circuits is large making
recovery from a DC transient or shift very
long~
We have this problem any
time we change heads or when swi.tching from a Write to a Read.
10
llS
then for the base line to be fully recovered we require
If 1""were
SO.llS
or 5'1.
We can take advantage of the cOnlnon mode rejection of a differential amplifier
for common mode shifts in DC level, but unfortunately almost all transient
shifts are non symmetrical therefore differential.
We must reduce this
recovery time substantially as it forces an increase in the formatting time
lost between records.
There are two circuits that can be used that reduce
1" for the duration of a switching transient yet allows the full T for data
,
handling.
(
These are shown in Figure 10.3A and B.
11.2
)
PUBLICATION INTENDED.
ALL RIGHTS RESERVED.
LINEAR AMPLIFIER
In Figure 10.3A a chopper transistor is used in the inverted connection
to short the coupling resistor for the duration of the transient.
on the coupling capacitor
~hen
~
The charge
can quickly reach the level required.
,.
After
just a few microseconds the base drive is removed restoring the 1" of the
coupl ing circuit.
The emi tter follower pull down current must be grealt.
enough to charge the capacitor to the niOst negative transient value within the
allotted time.
Care must
~lso
be given to thp emitter current - base current
curves of the chopper transistor as there is still an offset. but this should
now be common mode therefore the recovery from the chopper offset appears
much shorter and less noticeable.
The second circuit shown in Figure 10.3B uses a Fet as a voltage controlled
resistor.
There are two considerations associated with its use.
First the
drain voltage of the .transient may force the Fet into the current source mode
which is past the knee of the
Vo
-10 curves which 'increases the recovery time,
and second, the capacitive. coupling of the gate switching transient to the drain
can leave an undesirable transient, butthis is also common mode or nearly so.
The'i of the couplfng ci rcuit .
must.
be at least ten times that for the
~
lowest fundamental frequency.
This must include the effect of all the series
coupling capacitors, base and emitter, up to the bases of the differentiator.
I
For example, if we had 5 such coupling circuits each with
then a single one would have a -3db frequency
would be down 15 db at 15.91 KHz.
~
r:: Zi17"
a~of 10.~sec
of 15.91 KHz, but 5 in series
The real -3db frequency would be
..
The upper 3db roll off is controlled by the upper transition rate.
11.3
LINEAR AMPLIFIERS
UPPER FREQUENCY ROLL OFF (Continued)
Generally. the -3db point/occurs near 1.5 times half the transition rate.
,-
This is necessary as we need to include the hanmonics associated with the
shoulders.
The degree of roll off should be a, function of the noise spectrum
and usually is between 18-24 db per octave.
A primary consideration.is the
effect on phase linearity which we will discuss shortly.
The type of filter
depends on the amount of roll off required, the amount of phase correction
required and the degree of signal shaping required., Most amplifiers use
either the Butterworth type filter because of its marimally flat magnitude
response, or the Butterworth Thompson filter which is a compromise between a
,.N'P If1"1(.NlfV{)£
maximally flat time
delay~response.
The Bessel filter is also used because
of its maximally flat time delay characteristics, however, it has poor roll
off characteristics.
A newer approach is to use cosine filters to shape the
signal before detection in order to improve thePW50.
concerned with
discussed.
re~ucing
noise while retaining the
The amplifier must not contribute to
Generally
~ignal
th~
filt~rs
are
except as last
roll off significantly
as this type of roll off is uncontrolled dueto stray capacitances, transistor
junction capacitances, and Miller
capacit~nce.
For this reason, we follow the
general rule ·of 10 times the required filter bandwidth for the complete amplifier.
This means that each stage should have a bandwidth greater than
10~
times'
the upper 3db point where N is the number of stages in series.
GAINS
The amount of gain required in the linear portion can be calculated from
the minimum head signal expected out of the Pre Amplifier and the minimum
11.4
LINEAR AMPLIFIERS
GAINS
signal required at the input to the Detector.
v'o/ ,..,,., 1'1'_ Offl ~ ()HUr~.'(
(~/A91't'''''P_''ll XA"",..,
fKt
(EQ 10.2)
/I,.r)
We must then determine the maximum signal that will appear at the Detector
input resulting from a maximum head signal times the maximum Pre Amplifier
gain times the maximum Linear Amplifier gain.
(EQ 10.3)
If we compare the results of EQ 10.3 to the restrictions to the upper input
voltage to the Detector, we will see if we need AGC or not, or if we need to
. increase the linear range of the Detector, input.
it is
preferenti~l
For Region l' and 2 circuits
to use AGC which allows' us to reduce
of the last linear stages.
t~e
power dissipation
It is also preferred that the signal level at the
Detector inputs be established at at least -6db below the tolerable distortion
limit of the Detector's first input stage.
This allows a ±6 db margin to
handle sudden amplitude changes without detrimental distortion.
For Region 1
and Region 2, fixed reference Detectors AGC is required unless the delta signal
amplitude worse case is less than the Detector limits.
Such is highly unlikely.
As we discussed pefore it is also preferable to break the gain requirements
up into several stages of low gain rather than one or two of high gain because
of Bandwidth requirements.
Commerr.ia1 differential video amplifiers can serve
well in these positions except'for the last stage or stages due to the signal
output swing requirements for accuracy vs. the IC's specification.
We designed
for 5.0 Ypp nominal into the Detector because of the O.IV linear region of a
11.5
..
i·
t
....~ . :..
~R
~
.AMPLIFIERS
(Continued)
ent switch vs. the percentage reference.
As long as the signal remains
:ar where we require the peak this will always be true.
~CTlON
Often the head signal originates from several sources, such as,
. groupings of widely separated heads, fixed heads and moving heads, or
d-Verify heads.
Such arrangements can be suitably handled by providing
,
iarate loading and separate ampl ification at the first stage.
The
Jividua1 first stages can have different gains to accommodate differing
,el signals.
Selection is usually accomplished by a collector dot of
h individual amplifiers with a
switc~JCurrent
source.
Such a circuit is
own in Figure 10.4. THere is a' corrmercial' device available, MC1445, that
rforms the same function though the 'input dynamic range is 1 imited to a
w hundred millivolts including offsets.
As can'be seen this circuit can be
!signed for any signal amplitude gain, Bandwidth, or bias levels.
lcludes the usual considerations of linearity etc.
The design
let us assume that the
1put signal is referenced to ground at 200n differential with a -0.7V DC
ornponent across 402n toground each phase.
P DIFF with a 50 mV maximum DC offset.
O.MHz.
let us have a gain of 2.
.inear Amplifier.
~2
= 402n
This signal maximum can be 150,mV
Bandwidth requirements are DC to
This will allow us to connect the Preamplifier
First 'we can calculate R3 from the known value of Rl and
to obtain the desired termination.
(402. ~
:::
(,1.&,2.-,( 2,C'C')
,",02... t ,+.')z, -
zoo
(EQ 10.4)
::: 2.'(,.l ~
( fU.<.-
2. ,,,,...
If,)
1116
._------
-.
f "" ... _ .. \... \
i .. ~, ,\
.... "
0-"
. .,
......
LINEAR AMPLIFIERS
SELECTION {Continued}
~"
.
~,
'I,"
.
("',:"
i
Now that we have fixed the collector resistors we need to detenmine the
emitter current as that in series with the total emitter resistance RE + re + Rm
determines the linearity of the stage.
We calculated a 200 mv pp input maximum; therefore we need greater than
().2.0"
V
(EQ 10.B)
100.,..
This then means that we need twice that current to reduce the variables
associated with re at this current level.
Choose 4.0 rna.
The main resistor RE can now be determined.
-
:::
{EQ 10.9}
z..,
A
-
<00
Therefore
f{e
-
{EQ 10.1O}
z
Just to see the effect of the emitter resistance, let us tabulate the
gain change as a function of current I, using
A1"
:::
JA~· tt
(EQ 10.11)
11.B
.. ----~-.-~~--------"-
---....."".....,......=~---..,...----..~~-.
-
~ ~~ ~--
_~
u. _ _
~
____•
__________
~
_______
~
PUBLICATION lNTENDED.
ALL RIGHTS RESERVED.
LINEAR AMPLIFIERS
SELECTION (Continued)
W,th a 150 mVpp DIFF input signal + 50 mV offset we can have a 200 mVpp
differential input maximum.
The collector resistor is based on the 50 MHz Bandwidth and the stray
capacitance.
Notice that this is the stage Bandwidth not the Amplifier Bandwidth.
We will calculate the capacitive load as CT.
(r:
(..
I
-=
(
(r+fI)
4-
(Ob~ + (w
= (),~8 (I+~) + ",." ..
(.:>. fF
(EQ 10.5)
12· 32 Pr
Miller capacitance must be included as our source impedance is
200
(2){2)
= 50n
. which represents the termination and the input cable in parallel single ended.
Choose RL
=
200 = 2 RE T and
~in=
.
20
=
(EQ 10.6)
Which means 'that the stray capacitance dominates with a pole at 64.6 MHz which
satisfies our requested Bandwidth.
11. 7
)
LINEAR AMPLIFIERS
,,'
,I
SELECTION (Continued)
interested in the peak input into the differentiator as that determines the
slope at the zero crossing.
for a higher ZE.
We might have improved our chances by settling
This should have been calculated with 2 ZE instead of ZE.
Although the ratio of re to ZE is much smaller than our present one thereby
maintaining linearity over a wider input swing and thereby making the loss in
gain unnecessary.
The linearity is determined solely in the emitter circuit (if linear
resistors are used in the collector).
The rest of the circuit can be designed with the tools we have already
estab 1i shed and therefore we will not take the space to repeat them.
We cou1 d
emphasize the bias of the current switch used to select the amplifier input
to the collector dot.
The most positive base must never cause the negative
swing of the amplifier emitters above it to- saturate due to Vbe and IRE drops.
TOTAL AMPLIFICATION
With all the previous background we will now design an amplifier to
connect between the Preamplifier and the Detector.
If the range of the Preamplifier output was 100 Vmin PP DIFF to
150 mVpp MAX' including offset, and we wanted a nominal of 7.5 Vpp DIFF into
our Detector (5.0M1N - 10.0 MAXVPP DIFF) then we can establish the gain required
and the number of stages.
From Equation 10.2 we calculate we need a gain of
50 MIN and 66.66 MAX or 60.0 nominal.
This is obviously too great for presently
available video amplifiers for the output swing requiredJtherefore we need to
break it up.
V60 =
7.74 but
Wo = 3.914 which is mucimore e~silY manag~able.
11.10
PUBLICATION
INllN~ED
.
. AMPLIFIERS
rION (Continued)
",' ..
1
I
4.0
, 3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.25
0.125
A+
2.000 '
1.9815
1. 9575
1.9249
1.8779
1.8045
1. 6736
1. 3745
1. 0126
.66334
A-
ATOTAL
2.000
2.0145
2.0263
2.0361
2.0442
2.0512
2.0573
2.0625
2.0649
2.0660
2.000
1.9979
1. 9916
1.9797
1.9592
1.9238
1.8555
1.6837]
1.4460
1.17066
DIFF
DISTORTION
,
~'
i
I, .
this means' is that the distortion at the peak input signal amounts to an
antaneous gain change of about 2.04% differentially and about 6.1% sir:'gle
:d on one collector, the positive peak, and 2.21% on the other collector,
ltive peak.
~
Now we see the reason for increasing the current.
The factor
is not sacred but strictly depends on the ratio of re to RE & Rm.
If we
se S.ma then the distortion would be much less differentially and particularly
the positive peak.
Now the designer has to choose between the power dissi-
:ion resulting from the higher currents and the amount of distortion that can
tolerated.
This will be increasingly more important when we consider the
"
Jher level stages and the differentiator.
Notice back when we calculated the gain impedance for the differentiator
, 9.23 and for the Gate Generator where no RE was used we were not concerned
th collector peak distortion since we threw away'the peaks with limiterss but
~
were interested in the linear portion around the base line.
,
I'
0
0.105%
0.42%
1.01%
2.04%
3.81%
7,22%
15.81%
27.70%
41.46%
But we are
j
11.9,
,
;;.
~
",'"
,
;
f/~
lo·~
,
,.
f'" -
.... v
+V
1/,
-tv
Vo
~
~
v,..,
VM
/{t
I,
f{ (f3.A51(
/lE
~1,
{O'c:'
AM/'LIFftftZ
r
PUBLICATION
l~TENDED.
ALL RIGHTS
R£SER~tD.
LINEAR AMPLIFIERS
,.
,
If'
I
.<
L I
TOTAL AMPLIFICATION
Or we could use a
~a
733 for the first stage with a gain of 10 followed by
a high level amplifier with a gain.of 6 either would be acceptable but as we
would like to add some other function, we will go with the 3 stage circuit.
The amplitude MIN and MAX is shown for each stage in Figure 10.5.
The bandwidth of the amplifier is to be 50 MHz; therefore we need
if) )50
LT :'
= 86.6 MHz at each stage.
G&,(' +f\)
+
!J.. ~ ~ .. (7 °J.Jd-f"':'·'(t.,,-: ~ )J )~ r3·,..·.
Cb + C... = O· )K'F (I + ). fl.f) +
L
:=
(J'S!N of
4 ·.:J~F
(EQ 10.12)
n "Ol'.e
(EQ 10.13)
(
2.. q. C;>._
(EQ 10.14)
..... ~
,3, 'IN
This requires some thought for if we calculate the currents required to maintain
a maximum of 5% distortion we must have only
or 1.7% each.
The
disto.~
~r=hl
~:S%
.
distortion
in each stage
tion is worst for the positive half cycle; therefore,
we will use that value as our 1.7% MAX.
(
(EQ 10.15)
11.11
LINEAR AMPLIFIERS
{
TOTAL AMPLIFICATION (Continued)
-
=
4-f tl
2.
I
2·JJTJO
(EQ 10.23)
(1.0'" L)
The correct root is 13.58 rna which gives
(EQ 10.24)
-Jq,)'I. ~
J(i'l,)J)L:_
't(I.O~2X-q'J"9(,)
(EQ 1O.25)
L(I,O'(1-)
~/'I°~/±
IffoOCf
2(1 004
=
'1..)
-3Z·t:.t,.
,
{
-
/
+
/Y..,Q .......
. The correct root is 3Z. 92 rna whi ch gi ves Are
I
(EQ 10.26)
1. 042 A.
=
As can be easily seen the small built-in error in the equation is when we used
26
2(61.32) as Rr when we know the real resistance is I INsr + 5 + RE to
determine 12,
The value of RE for each of the 3 stages is:
Stage 1:
Rt,
= ",J7..
IA'
-t; -
.1 ~-
-
~,
Stage 2:
REz.
Stage 3:
Re) -=
~
t{·Jt-5"- I
~1.}2.- ~-
-
nO ....
-=-
tl."$l.-,-
I
A &
I,_
:::
z'
r:t7
='i2·/A.
= 'I.}l. -')' t.1,>'l.-
5""-
-13·~";B
-
2 "
12·rz..
=. 0I''f~
CEQ 10.27)
(EQ 10.28)
•
--
'i~.)/'-
(EQ 10.29)
11.13
,
PUBLlCATlON INTENDED.
ALL RIGH1S
r.L.:>::.I\.i.. ....'.
t,
LINEAR AMPLIFIERS
,!:.
.,
"
f
TOTAL AMPLIFICATION
fr
. ,,!
"..
"
(EQ 10.16)
=
~.
.
·7
t1
:.'
1'0'12.
t
(EQ 10.17)
L-
o =
;'
IZ2..(,,1I --
I,
~
(EQ 10.18)
-,-1.17'1
.:!
J{27¥)'a. .l..
(EQ 10.19)
("C"~X:-'.'I""Of)
(I.e 4Z.)
/., S!XIt~'
:f
'_. '. 27 4
Cf
(EQ 10.20) .
2. . .:4¥
The correct root is 6.17.ma which gives
Stage 2 is
~
~.t7~21, . . . . -
'."'y-z.l,\........ _
-4'f~3
roots
+
( >87. I ...
',0'1'2.
4·1(93
I, . . . . -
/."..,1-)
= 1.042 n
(>
2' 2("'">1."))=-0
87· I .. v
_ '\
1..(". 32 ..) /
J(t-t'f(Si}L- 2. (
oJ
~re
-
\
(EQ 10 .. 21)
,.24 ... ,,'ol..."";'
'f(,.O"l...)fI'Z.'-I~~U'~)
(EQ 10.22)
11.12
f
f
.
, .
,
1"\
....
oJ
-
H
}-*
~
I.,c;..--
11\ ___.~
:t
(
1 _ _ _--;-
'0
I
\t.o
::>
~
l/
~
...
.....
II
~
"IU
~
....
~~
...
• "'..:." .:.~
"'''
~
...
..,...
""
":::.
H'"
r.r..
-::>
. -.
4.
1
u
>
...
~
~
,
.a
~
I
~
I
~I
""
t-=*
~
...
-
;
....
PUBLlCA110N INTENOr.D.
ALL
ti.l.l:Jlil,)
I'.L ..)j,.. '\~"'U.
",
LINEAR AMPLIFIERS
'.
<'
TOTAL AMPLIFICATION (Continued)
If we used the two current source version as planned then the total value
of RE will be double or
104.21, 108.81, and 111.06 n respectively for RE
Now that we know the values of the nominal gain and'minimum current as for
Fig 10.6 we can now calculate current sources, supply voltages etc.
this we first need to make a bias diagram.
To do
We should also use a PNP stage in
the middle in order to minimize the power supply requirements.
The Bias
Diagram is shown in Figure 10.7.
If we DC couple the bases but ACcouple in the emitters we can reduce the
number of decouplfng circuits.
We make the bias diagram by establishing all the voltages including AC'
and DC associated with the collector, base and emitter circuit, starting with the
base.
We will allow 6.db margin for the signal, swings in every case in order
to reduce the possibility of clipping.
This is thesame as using the differential
swing as if it were the single ended swing.
between the base and the collector.
We will also allow 1 volt margin
'"
.
Judging by the Bi.as Diagram, we can easily build the amplifier using ±15V
'supplies with ± 6.2 zener references for the current sources as no collector will
be forward bi ased.
Stage 1'and stage 2 will require a series resistor to develop the'correct
bias for stage 2 and 3.
11.14
'.
j"\
LL
t\ ...
-
v: i..;;
j
I \ .... __
.... I \,
I
__
---
iJ •
~-
--
TOTAL AMPLIFICATION (Continued)
We can 'now draw the schematic for the amplifier and it is
~~~
.
in
,
Figure 10.8.
>v-
Ilt. 2
,.!7"IV -O·I'() V
.
. . : . . . . : . . - - - - - - - - ~ S"I( ~
13·~8
~
$"/1
-
_
t-) I
/II-' Z 'i' V -
S 2. • 71- -.. ,.. ,:v
.......
~X· ~
A
(EQ 10.31)
-0.
l3·ylJ-
I .... :v
V
9 == 207.7 ....
(EQ 10.32)
J2·fz --
~
.2..DD .. "..
11. #r'
JJ'J'( - .
r
,...~
The maximum currents are calculated as:
1 s ::::
'''~1-
t'Ij' !), V-t ~
/'J - "'2
(,' - f 7.) - L~ t -, ~
_:....:/S_._7)_-\r~-_~_'J'...!7~v_-_(J_·7_D_1I
I.:
:::
/ '- )
,y
3~v.(~
(,c3?1('
( /-/If
(
EQ 10.33 )
..... ,)<
To find R3 max we need to use the following:
.r·~9tJ-~·~;-v
- 180'
2 (8''''''' 1'-&) )
J
It
(~ 173S'.39t1-~ .~2.. v
=
)$"".27.....
°-0
(t..w..e- ">~·3 ....
.2 (13. 0
(EQ 10.36)
7 -.,.. 4 y
"'''')1
(EQ 10.37)
I~)
11.15
<
~
,
":.t
-"'"
~
-
+-
1-
~
...
~
t
~
\tl
~
~
~
~
:>
n
+
~
'....
'"+
0
"
~
':)
,
....,
'1
c-
...a
.
~
.
S
V'\
.
C)
-
>I
..,J:,
\L
....
~
.~
....::>
~
...
~
-%l
+
+
rA
.>-
~
w
:S
,.
......
~
~
(
':3:
....,
~
~
.)
t
~
"l
....,..
~
..s
~
':'
LINEAR AMPLIFIERS
TOTAL AMPLIFICATION (Continued)
We must eliminate R6 to lower the base voltage of stage three.
This is
mostly because of the large tolerance on 153.
_
~l
V
-+>;,) . .
_ (. it II ..,.
ls;L. ,.u:" ( 1(0-
..,,"V)
(n,",! -XlI.{ 0.)" ....)
= -
(EQ 10.43)
3·277 C/
Vel ~""~
(EQ 10.44)
The signal swing at the collector is 2.297V PP DIFF and following our 6.db
margin rule this makes the minimum emitter peak voltage at stage 3.
(EQ 10.45)
-.
- 4 "I
7V
f7~.
which solves the emitter problem but we still have a collector problem in
Stage 3.
The base of stage 3 is +0.4BV MAX peak, but the collector is
3.033V - B.~9V or -1.4'3V
or an overlap of 0.4BV + 1.4b;V
(EQ 10.46)
= 1.'tV
We need to raise the collector supply to 17V to handle the collector
bias problem.
That;s hard to obtain in most cases as ± 15Volts are standard
supplies.
11.17
LINEAR AMPLIFIERS
TOTAL AMPLIFICATION (Continued)
By using the maximum value we guarantee the collectors will not saturate.
There will. be a difference in Vc for each stage as the worse case is calculated.
Let's do that.
Ve
I
"'~f = ~'l v+f
=
1-
(.<;'-/11-
(Is, ~'·XIf, -,~) - .!.s, (If'.. ~,~) =
2 ("l'l-X ,7/,.Z.) - '·.?9_ (ZiI.:>.f-0 =
2.
= ,. r /- Z· 2.1' -
2· 7J'y
/,5"1.:
V
-(t.l V~ ri.) + z (I.
lOt) -+ £l.~,:" ( If(. ~,.;.)
-to ';)/v
)+
h . ,..,:; ,f,
t
2 (/3."1.1_)(3'1.% ....
(
=
.f'.
"1 v
8".f/_)(/7.'1'7?~)
- '2 (
- 3·.,z. v -
+-
2..
-~'~9V ;- z.{
- \·3fj'
13'41(/",--, (2VO.:>-.....)
(EO 10.40)
L
_@.LU-b;)
~
(EO 10.39)
2.( ISI ....4~XIf; ... ~J-7J'''''''''' ( If ,.,..,.><)
(f.211-}'1.) -
r'''7 V
(EO 10.38)
v -+
I' 'Z <:.
1. ••.H.
v
-
-
(b"Y./~ZI.Js-."'J;')
(;). $, V
(:zs~ ~~;(If', ,.,"',.) + Ioh '"
IJ'.O
-..)(1)-.,S".... ) +
v +
Cf' '¥ Iv
=- - 0
I
4".
(:<1.
fr1A
J
(EO 10.41)
I!'()_(Z'IJ,.,.).J
Z. '2
c/
With the last result we see we need a couple more volts or so to keep
the last stage out of saturation which might be accomplished by using'
+15V for Vee.
Vel ~'"
==
~,- 'i 1.) -
-
3·D3.3 LI
6,
3
-A'-Xife ...)
='
III -z5 "
-i.::" 7-)(H~-Yl_)
(EO 10.42)
which ;s too low.
}1.16
t(f~
~7
-'.1V
;01
, ,
ir''''
;.'-
- ,. Z.V
f\1 001 FIEP
S7A
6£
2 - 3
rOI.lt'uNC
..
PVBLICATION INTENDED.
,.
ALL RIGHTS RESERVED.
LINEAR AMPLIFIERS
TOTAL AMPLIFICATION (Continued)
Perhaps we can reduce the tolerance on current IS3 from
33.86 ma ~ 45.7 ma
= ~11.84
(EQ 10.47)
ma
The best s.olutionis to AC couple the bases of stage 3 to remove the
almost 4 volt tolerance.
We can return the base resistors to a nominal
-3.1V by dividing the -6.2V supply.
1inear.
This will permit all stages to be totally
The 'r of the coupl ing stage must take into account the base current
associated with the 33- 45 mao
Now we have designed a three-stage, high-level amplifier.
Before we add
filters and phase compensate it let us turn cur attenticn to an AGC stage.
11.18
)
P~BLICATIC~
INTENDED.
ALL RIGHTS
kL~Lk\LD.
LINEAR AMPLIFIERS
obvious if we consider that any common mode voltage influences the
coupling circuits and depending on the common mode rejection ratio of the
following amplifier we end up with a differential voltage change that
d{sturbes the signal base line.
As there is almost always a non-linearity
somewhere we should avoid circuits that control the gain by controlling
emitter current.
In Figures lO.9A thru lO.9F, the gain control is achieved by a contolled resistance by either current or voltage.
In each case the range
of resistance is large but the input swing is limited due to the characteristics of the devices.
curves.
In the case of diodes, we can examine the VD-I D
Here we see that the signal voltage will be superposed on the
curve which does affect the resistance instantaneously; therefore, the
actual diode resistance is a function of the signal voltage as well as
the control current thru R2.
Fortunately,
o~r
signal is differential.
When one diode is conducting more due to a positive going signal, the
opposite diode is conducting less for the same reason which if we keep
the
swing~mall
the total resistance/differential
. ' remains almost constant.
~
The input swing then should be kept :below lOO.mv MAX PP DIFF'
.
The circuit
of Fig. 10.9A is driven by a voltage source therefore the attenuation
is simply
oZ... -
(EQ 10.51)
(EQ 10.52)
...
l1.eO
PU3LlCKT10~l
INTDWED.
ALL RIGHTS
Ri:~LK.i..J.
LINEAR AMPLIFIERS
AGe STAGES
We approach this design problem by first calculating the total gainMAX
requi"red for a minimum signal at the head, minimum pre amplifier gain, minimum
linear
ampJ~fier
gain to provide the maximum input to the Detector.
(V"APM") ( Af.A. ,...:y:A L. ~'M) = \/'N '" MA'
(EQ 10.48)
A.
This gain assures us of linearity margin and
detector.
correc~
operatioi1 of the
The next number we need is the maximum signal output assuming
the amplifier does not limit and using the maximum gain.
(EQ 1O.49)
(
The amount of controllable attenuation required then is simply
"',11/
(EQ 10.50)
If thi s number is ,tei.tir than l'·5"then we really do not need AGe as the Detector
dynamic range will handle it if the gain is lowered to make .EQ 10.48·=
VIN DET MIN instead.
Assume
at least a 10:1 range.
~
= .10
then we need an attentuator with
The type of attenuator depends on the signal
amplitude and on the signal bandwidth.
that have been used.
.must not introduce a
l
Figure 10.9 shows several types
Contrary to the radio business, our AGe circuits
common~ode
voltage change.
The reason for this is
11.19
(
I-
F I (;.
fer
'I c..
10·
(1fJIJTANC
V.:>
e
~
(ONTAOL.Ley
0·/0 V II' Pdf
v. .
v.,..
v~
v. .
f{G- 10-
f~T
A.,.r~A/vAr::>~
qp
({eSt> rANee
Vo
•
Cc
-,-
.
((..
----i
If&.
.
v~
...Vc
/(L
(c
--1
F( (;..
10·
'1 '"
(",:] IV T'/f 0 LLfp
0·/0 1/ fP
v.
T",
O,l-rEIlENTiIi LA ""I"'f'~'<'
v.
\I....
f
!}tOPE
l~
(:/-.
r ()
ltesUT.4/1/CI!!
Vo
€-
{'OAlrIt'Ou~.P
(J.t ()
6f-1/f11
V I'/'
)
.
'
-(' i
-
~':':
r·
,
.
V.,w
ft Gf€ T
LO.
GA,,,,
'I 6
co,.,-,R.:;JL.
ltv
e/"'f(7?"~~.r
v.
v.
~fF-""'-
1--------~----~
v~
f/6- to·ge'
6A 0./
CONT..eoL
~'.
.. --
LINEAR AMPLIFIERS
In figure 10.9B the attenuation circuit is driven by a current source.
Here the gain of the stage is a function of the parallel combination of
Rl • R2 and RO
A=
(EQ 10.53)
In both cases there is a common mode output voltage change that affects
the output base line.
Both circuits must be followed by a very good
common mode rejection amplifier.
The diode capacitance must also be considered
as it affects bandwidth which will change as a function of the control
current 'T" changes.
In Figure 10.9C and 0 a Fet is used as the controlling resistor.
The equations are the same as for the diode versions. however. the controlled
resistor is a function of voltage.
find a signal swing restriction.
If we examine the Fet curves we again
As long as the drain to source voltage
remains below about·100 mV PP OIFF then we remain in the resistive portion
. of the curve.
Beyond that the resistance is pinched and we go into a
current source mode where the resistance is very high thus distorting the
,
signal waveform.
We still have a common mode problem due to the gate signal
being capacitively coupled into the source and drain that may not be common
mode.
Also the gate capacitance affects the bandwidth which is changed by
the changing resi stance ('f':
:: . R,s(v) cp~
)
In Figure 10.9E a different type of attenuator is shown.
are
multiplie~s
used.
With
These circuits
and care must be used in predetermining which quadrants are
caref~l
balancing these circuits can be made to exhibit no change
11.21
..... ""'"
LINEAR AMPLIFIERS
./
in output DC or common mode voltage as a function of the control voltage.
As this circuit is basically a 4 quadrant multiplier by biasing VCl to be
always equal to or more positive than VC2 only two quadrants are used.
The circuit functions by mixing the two 1800 out of phase signals such that
one subtracts from the other resulting in reduced amplitude.
The reason we
must confine ourselves to only two quadrants is that the gain slope changes
with the control voltage polarity as shown in Figure 10.10.
The reversal
would cause a malfunction of the AGC closed loop operation.
Because of the
signal subtraction process very careful balancing and phase control must
be used in the signal path.
The DC collector voltage level is maintained by causing the current
lost on one side to be made up by current from the opposite side as the
control voltage is varied.
The gain of the'circuit is a function of the control voltage and
the balance within the circuit
A :=
(EQ 10.54)
Where K is a constant depending on the matching of the diode, the
transistors emitter-base diode, and resistor R4.
This circuit has a constant bandwidth only if it is correctly balanced.
Any unbalance will cause unequal phase delays, therefore, altering the
bandwidth as a function of control voltage.
Of the three different types given here, lets choose the FET version.
11.22
-------
-----
. ...
~
"t
l . . -.'
-~
Fl6-
't
10·
H
v~
=
If"
Vt;... ) v
V&
Vcr
v()
(
I·
I
FET
-J(.QI't!
I",I.IJ TAiS'-~
-Ve
/
/
(
"
"
/
/
/
/
"
= z..v
= , v'
('.A/'"
.
rUBLICATIO~;
n;TD-iDED.
ALL RIGH1S ktS[RVED.
LINEAR AMPLIFIERS
(
If ROSON MAX were 100~then the maximum attenuation achievable is,from
EQ 10,55
100.....
(EQ 10.59)
To get an attenuation of 10 we need two in isolated series.
We
could~ower
the
Rl to keep the same attenuation while maintaining above 50 MHz bandwidth.
(EQ 10.60)
P., Itt,,,,
(Od~'(
1-
().3/I,2..)
O.l'~2.-
=
2
I
~. 2 ..... ,..'-v
(EQ 10.61)
(EQ 10.62)
As the stage bandwidth calls for ~ (50 MHz) then choose 300
A
for better
dynamic range.
The isolation can be obtained with an emitter follower or an intervening
gain of 3.162, thus maintaining the signal-to-noise ratio as much as
The circuit is shown in Figure 10.11.
possibl~.
Transient coupling recovery can be
added immediately following the first coupling capacitors as shown in
(lAllf,.r "f'
Figure 10.3A or B or it can be added following both
couPlin~capacitors
if
needed.
11. 24,
~EAR
AMPLIFIERS
,.
ere are several other considerations.
If a junction FET is used, care
r' '. '- . .',' ,~.
c
!st be used to see that the gate circuit is not forward biased.
!sponsible for the capacitive coupling in the two examples shown.
This is
We could
liminate the capacitors of Figure 10.90 and use a MaS FET as long as the
: difference is zero.
If not then currents will flow altering the OC
uiescent point causing a differential shift in the output.
A series
apacitor in either the drain or source lead will eliminate the problem.
To use the circuit we must first determine the amount of attenuation
If the attenuation required results in a large resistor Rl then
'equired.
~he
bandwidth degradation must be calculated at both extremes.
If this is intolerable then the attenuator must be broken up into two
stages with some gain in between if necessary to keep the signal to noise.
ratio high.
Fr(h-.
F')
In any event isolation prevents interaction.
10.
'I
C
(EQ 10.55)
""'III .
K',
=
f1- -
(EQ 10.56)
(EQ 10.57)
T
27T
If in our example we want a 50 MHz bandwidth and Cp.-sis 4.PF then we want
R,
<
f
2. 1T
f1.
(' C,
S
)
+ (t.J
= (2.
l{.
1 S'XI.::;;'X
7f
>4-
3 )(';-'&'. 't- XIO
It.)
(EQ 1O.58)
.ra-
11.23
rI' .' '.
•
t;... . . .'L.J.l.,.I . . I~\,..,
J,.,\~4...;\.; ....
u.
LINEAR AMPLIFIERS
. :.
r;~
We.could have made the second stage of attenuation like that shown
~l.>
y
,
.
t,~
'
in Figure 10.90 with similar results but we would need to calculate the
Tllr 'I-T co"''''' OiN _.J "IJ. toe ttIr"-_T
attenuation again as it now invol ves R4 a,s well" One of the advantages
of the series type of attenuator c.ircuits is that the voltage across the
FET can be maintained below the 100 mv pp max while the input can exceed
it.
lets look at the maximum signal levels as we maintain the 100 mv limit:
::
loo",v
f!,.'/s
".01
R. )rlfIU + ~,
(f!)O .....
(0;41'11'
.'01
v
of ...L:: 4- II~.J)
100. "'11'
=
=
,OO~
300 +(00 ...
'I
111" ... v
"'''''''
A'~I}.v
VCotTA'"
0\
""'AI z.
CEQ 10.63)
Cl-OO.... II'
,,.,£
r,-err rtfr, t.J.u 1
"'" .-:1/ t,
e
(EQ 10.64)
=-
(EQ 10.65)
which maintains the output FET voltage. t
its maximum.
The minimum
input signal occurs when the FET's are just off while maintaining the 100 mv
output FET voltage.
100. ~ ...
A
::
(Oo.~t.I
=
. 2.S"..
.... v .
Therefore the input range under AGe control woul d be
Z>-
(EQ 10.66)
to 400 mv or
I b -: 1 which satisfies both bandwidth and our required attenuation.
....
11.25
..
{
~pp
STI'4C~
I
(;14111/
JI :: J./'Z.
-v~
150(, t47ep
. 0(,
0(
L
--~.,~~
v...
I
V,,,, '
f
~fflA"EJ '~J
Fete
~A,oJ
r--...J\~--
L~N'
IN
S"NAC.
V..
v-
11 L 7ttr /11-4
f(6.
to · ,'Z-
v_
71£
f/IJ((-IAte6e
Fo~
Eav~L
C""qK'~ - Pf.ffl,IM'~
I'INV ':.:;;(
P"I'Y'fi fiA'pJ
LINEAR AMPLIFIERS
(
/I
'IMl~fc
(
-
Z
+ Zy
+~.. )
/{J
C
{EQ lO.69}
\:
And the decay 1" is
~-
1"OECAY
,"
if the input current to the Amplifier is very small and the diode leakage
current is small also.
The diode minority carry
lif~time
does affect the
decay'T'.
The actual gain required is
(Vp,." ...
A
=
H-
(EQ IO.70)
,..A.,) (
~ V I'~
~ 21'
20
"fz.
-+-
i!..p
+
+ /('. )
(f{c.
+~)
If)
We should now turn our attention to the temperature affects since our
following gain A is so high.· Notice that we used a pair of PNP emitter
followers to drive our Full Wave Rectifier.
The base emitter dioCle nearly
compensates for the rectifier diodes, but not completely due to the large
difference in currents caused temperature.
Also the current thru R1 must
be large compared to the current thru R2 in order to maintain PNP emitter
follower linearity.
This means that the temperature of the PNP transistors
is higher than the surrounding components therefore its Vbe will be less
and the voltage into the operational amplifier will be more negative.
This requires a divider in the return ground lead from R6 shown dotted
in Figure 10.12.
Or we
c~n
change the PNP emitter followers to NPN and use
a Vbe multiplier to compensate, as shown in Figure 10.13, for both the two
11. 27 .
.
>.
LINEAR AMPLIFIERS
CLOSED LOOP'AGC
Before we close the control loop for the AGC circuits, we must
develop a DC voltage that is a function of the output of the linear
amplifier.
This can be obtained from a filtered full wave rectifier
such as 'shown in Figure 10.12. There are several features of this circuit
that need to be discussed since there are many other ways this could be
implemented.
The gain control desi red isa function of the gain
iJ"~
the loop.
If
we desire a 1% output voltage variation then the peak-to-peak single ended
signal will vary O.S% Vpp Diff and the
vary 0.2S% Vpp Diff.
Bal~
to Peak rectified signal will
For our 7.S Vpp Differential output signal nominal
this' means that we need to have
~v.,cr
= fV. ff ""IX J.
10"
(~'lrrQLj
(If)
(7.>v,r
=
to control the full range of attenuation.
is -S.OV
AIta''''
MA){
l f, )
If our
,I
..
/ '''0
F~Ts
( ... )
r/
,
= 1'7II' ~ -v (EQ 10.67) ,
pinch off voltage
then we need a gain of
=
If.7f
, (EQ 10.68)
'-1/
This would be the case if resistor R2 were zero but there is an attenuator
formed by R2 and R3 which causes us to raise this gain.
Now R2 is there
in order to slow down the the attack of the AGC to a sudden increase in
signal amplitude.
This is very desirable for two reasons.
First we do
not want to respond to noise caused amplitude variations and recond/'
it
pe'rmits us to achieve stability of the closed loop circuit using the Nyquist
cri teri a.
The attacJor ~ is
:
.J
.
I
LINEAR AMPLIFIERS
junctions as well as the temperature difference.
For example if we need
to compensate two diode junctions at a difference of 100e, we need to
provide an additional
(100)(~
mv/oC}
= 20.mv
correction.
This is interesting
as it is nearly the same as the control signal range of 18.74 mvwhich
;
emphasizes the point.
We still have V supply variations to contend with
or if we stabilize it with a zener we need to concern ourselves with the
zener temperature behavior as well as its zener impedance.
The last output diode is inserted to protect the junction FET (Fig. 10-11)
from positive excursions which would forward bias its Gate junction.
would not need the diode.
reverse the polarity.
AMOS
FET
If we used enhancement mode FETs we would need to
The potentiometer or a fixed resistive divider is
added to the negative input to adjust for the charged capacitor signal
amplitude.
That value can be calculated from the following for a PNP emitter
follower.
~tf
(EQ 1O.71)
-
Note that this will be very broad due to tolerances of the two junctions which
justifies the potentiometer.
The squelch transistor is added to discharge
the AGe capacitor at the beginning of a read function following the selection
transient, thus reducing the time to discharge from the transient using the
di scharge T.
The amplifier phasing allows for an N type J
FET.
If we put an
attenuator stage ahead of our linear amplifier then we can close the loop.
11.28
....
I
•
. ..
-.
~:
1".;
.....
;
·r-
V,,,
J6E FIG.
,,,.~
r-----------'-,~---------~
lfo/(,,,,r
- - - t n!-JII t - - - I
0< I
FIt..T
AGe
AMILfFrEJ{
(3[0 (/C
+
PIA
,
Z,>J
F(GE,JU/V1L.cfJT
to.Il.f B
ell:.. (viT
r:::>tC
A 6- C.
fw~
6. t?A"""
v.
I
· ..
~-,
~
-
t·1.·~~.1L!
-
.. i4\"'·.\
"'1'4_'\""'_'-'"'"
,- __ L
j
••
.t. ...... , : ,
.. ,.
"'_'"
LINEAR AMPLIFIERS
{
r
FILTERS
Since our ability to determine the peak of the pulse resulting from a
magnetic transition depends on differentiation then we need to concern
ourselves with noise.
of this noise.
The input stage including the head is the main source
Some of the noise is white, while the remainder is pink as
it results from both the head
~pedance
times the amplifier noise current
plus any diode currents and the media noise.
Particulate media is the
main culprit., The frequencies of this latter noise, falls in the bandpass
of interest and beyond.
We can improve the signal-to-noise ratio by
filtering out that noise above the bandwidth of interest.
We also know
that the head signal contains harmonics which are required in order to
maintain the signal PW SO and therefore resolution.
For example, if we
lost the 3ni harmonic then the PWSO would be widened, and the resolution
would drop, and the voltage time rate of change at the peak
lessened giving poorer peak detection.
then are important to us.
wo~ld
be
The filter roll off characteristics
There are several different filter types
that we could choose from besides the constant K and M derived types.
The
best candidates are the Butterworth, Butterworth Thompson, and the Bessel.
The Chelbyshev has ripple in both phase and gain, therefore, is useless
to us unless we want to use the ripple as some kind of correction for
existing anomalies.
The Butterworth has very desirable amplitude character-
istics which are maximally flat in the pass band and roll off with a welldefined corner depending on the number of elements.
The Bessel filter has
a very long drawn out roll off which does affect the amplitude of frequencies
somewhat removed from the poor corner.
The Butterworth Thompson is a
11.30
PUBLICATION INTENDED.
ALL RIGHTS RESERVED.
LINEAR AMPLIFIERS
(EQ 10.72)
CEQ 10.73)
v-> :: v,.v( Vc".A""~'
lit(;"nA'.:lL
Ve.yy =
V4J -
.
V~ (
:X' X 'J
~ X /+ yz ".6)
60
J ·/'
CEQ 10.75)
I
IlC
CEQ 10.76)
(7'S- V ,/" "n)
If
(I
::
CEQ 10.74)
+
(;"v
(-;-1ii/:;;-,X2('6'~/z.'.,rX f)"loXJ·,I,l)
(EQ 10.79)
]0
'1')(:~;.1 I )
Vo -- VI", (V4\lX -4)&';1- J(Z66.tj IL'!~*X(~{)"'V
:::
V'M ( VC-NX if ~ ,.~'i'X IU: t)
t+
V,...,
(' '19'
-4-
01
lIo -
(V~)(lr9.9tRj Vt~
/~(S
=
VI...,
:> 0
Va..rr
-
+- I
[H- 0(Jf~'
;I
(EQ 10.78)
LI,..;
'111'.1
( / . f '1'8x
IV'-)
(I' Pf ?/JIf.'.;J ~
t:?CJ
.
IC(~+-I
)
0[I'
I-
97 11
CEQ 10.81)
CEQ 10.82)
I
"°]
R'S'" J
l/i.:..
(/,.1/
CEQ 10.80)
----:.'".:-.
CEQ 10 .'83)
CEQ 10.84)
({( j +- J +- VI"" (1'1'1' 'I"')
which is unconditionally stable
v" -
>. f
ICes
'I 7j'"7{'~ )
+
2o .. Pfll
(EQ 10.85)
11.29
v. .
(
-
v,..,~
-\I
v.
-v
-v
-v
- CIRCUIT ~_TIC
........ A
I.Ok
e
FIr,.
TLVO
CHANNEL
Me
ItflfS-
SEC. {C TO/{
I.Ok
1;\ i
L i \ V L....; .
; ·~_L
.........., ' , , .~,
LINEAR AMPLIFIERS
compromi se between the Butterworth and the Bessel fi 1ter •. In regards
to Phase and Group Delay the three filters are rated differently.
Bessel filter has maximally flat
doesn't.
The
Butt~rworth
The
group delay and the Butterworth
Thompson is again a compromise.
Now it is
obvious that flat magnitude characteristics are desirable due to the
relationship among the pertinent harmonics.
The Maximally flat phase
and group delay characteristics are not so obvious.
If we were to
take a fundamental cosine wave and add to it a third harmonic such
that the peak of both start together as in Fig. 10.27,
(EQ 10.86)
then we wnl obtain a waveform very similar to our head signal in Region 2
containing shoulders.
Now if we were to repeat bur graphical analysis
with the third harmonic shifted by a constant angle
~
then we can
(EQ 10.87)
see there is peak and shoulder distortion.
both amplitude and peak position Fig. 10.16.
The peak distortion includes
Now our main concern is
the peak as it defines the center of the bit or transition; therefore, if
we cause unequal phase delay, then we lose peak timing information accuracy.
As can be seen from Figure 10.15, if our filter introduces amplitude
reduct'ion of the third harmonit, then the signal PWSO widens and if our
filter introduces unequal group delay then we have peak shift.
11.31
JvJ
il-4,ttf)
~(.)f';p~ M~J.J
'"
f
1../14([.1"-10#/ C
rr: t err 0'"
(5YM~r;(I('~' n-lo,-,lPF/c.r)
TA L
,.,..,.
\
I
o
30
Z
FtGm,~p
HAtr,MlOJ/{C
10./b
PUBLICATIO\ INTENDED.
ALL RIGHTS RcSLRVED.
LINEAR AMPLIFIERS
,..
It is obvious that the Butterworth filter preserves the amplitude but
distorts the group delay.
The Bessel filter will widen the PW50 a little
but maintains the peak in position.
Most filters designed for disc drives
use the Butterworth filter with a phase correcting filter in series.
Some use the Bessel but wonder why the shoulders climb up the waveform as
shown in Fig. 10.16.
in the head.
The answer lies not so much in the amplifier but
If we go back to Chapter 3 where we discussed the head
circuit and Chapter 6 where we discussed the Read Circuit we can see that
the head is a two pole filter as shown again in Figure 10.17.
The output voltage is determined from the series paralleled network.
v. =
'"
V,,,,
L;
( -Iic: ~ )
+(ir
cI ~
V~
--
(EQ 10.88)
+~
RLJ
R
)
+
+ !::..s
cs
.3
CoS
R.
(EQ 10.89)
VI'" ( .f:c-)
) ~ + -LS+1((
-LC
I
The phase characteristics of this circuit are not
1inea~or
maximally flat
group delay, therefore, phase distortion is added to the head signal.
When
we design filters to provide the characteristics we need,the head circuit
forces a different compromise.
The use of phase correcting filters allows
use of the Butterworth filter without degradation of the PW50 or the peak
position.
There are other approaches that are presently being pursued
which involve spectral shaping which narrow the PW50 while maintaining the
the peak position.
These approaches permit higher transition densities by
11.32
LINEAR AMPLIFIERS
eliminating or greatly reducing the peak shift due to pulse crowding at a
small cost of increased noise.
Curves can be generated relating the
improvements and degradation as a function of the degree of slimming.
We
. will not pursue this form of filter here but it might be a worthwhile
study as it has definite advantages. (Mr. D. Huber is very familiar with
this approach.)
The deSign of these filters has been made easy by
several authors of Filter Synthesis books.
In chapter 13 of louis Weinberg's Network Analysis and Synthesis
published by McGraw Hill in 1962 and republished by Kreger Publishing Co.
in 1975,
he gives extensive tables for these and other filters as either
conventional filters and as equal dissipation filters.
An analysis of the
various filter characteristics by Eggen and McAllister is published in
Electro Technology, August
196~.
The Phase correction filters or
several texts.
Pha~e
equalizers are the subject of
Chapter 17 of Electronic Designers Handbook by landee Davis
and Albrecht published by McGraw-Hill, 1957, is a good source.
Because the head circuit is part of the total gain and phase response,
the determination of the amount of phase correction required must be obtained
from the signal itself rather than as input sine wave to the amplifier.
There are two sources.
The first is the position of the shoulders on the.
head signal.
If they are symmetrical around the base line then the phase
is correct.
If the shoulders are not symmetrical but are above and below
the baseline. then correction is required.
The amount can be determined
by the position of the shoulder compared to a graph, but this is rather
sloppy as it neglects the phase distortion of the differentiator.
eQvA," (I£AI{"r'" .
I"ff!AIVJ
(':>~ICE(
r
f't-IAU
PlffF~£J./r;~£p
.."rH
/"'0..,.. !C".('£tXV''''''r
.IH(;}vIP~IC"
JI6NAr..
11:33
rUBLICATION INTENDED.
ALL RIGHTS RESERVED.
LINEAR AMPLIFIERS
The best method requires the use of a current passing near the gap of
the head which generates a voltage according to the relationship
KND~
.
dt
The flux generated by the current in the wire is loosely coupled to the
head core which causes a voltage to be developed in the head coil that
can be amplified.
The phase measurements at various frequencies can then
be plotted if we remember to subtract the 90 0 associated with the flux
to voltage conversion.
very low distortion.
cannot be used.
The oscillator must be a true sine wave type with
Function generators have substantial harmoni(s and
The series resistor is equal to the Zo of the generator
therefore I wire is
Ilvl"t:
(EQ 10.90)
=
==
olL
= K, N K,-" ( V .f'AI W t
U
6-.--
)
(EQ 10.91)
K I K1. V L.n r?:o
Care must be taken to keep track of the phase expected thru the amplifier
t,.v N
(v
stage by stage including the linear differentiator of the Detector.
For
constant group delay, the phase must be a direct function of frequency.
-
(EQ 10.92)
I
11.34
---~--
---.~-~--
(
---+-.., +-------
(/.
r-
, 1
.I '
I1+-___
!
_
----t--J
10.
f(&-
'7
. FI6-
{::of{
CI~CvIT
THe.
F::>'<
To TAL
{3 13
(o'(i't'I
F{6TeJ'7
(,9.
HEAp
J Ifc.sJl?DN~E
~M;:'t(,c/~~. "'NP
I"fIV.,P
PHAS~
t.IIVFAJf"I?
raTE,£
1/\;
r(GLvITH
B
A
____I" '---. -- --- I.---=-----"r
..
:
.-'
' ~
'
S'::)L.IP - (IVP"T
fIG IIdH
po7rEp - OuT/'" 7
('''-- .
L
F( 6t.vITI-I
fODI<.
( 0, :;.. 0
f?esOLUTtDIV
.f" ~,4 L
/UTtf/t
lfA/ V If C. 0
AGe
f?t3.
tC/C7t'OA./
S/!NA(
FJSLIC!..110N
LINEAR AMPLIFIERS
r
.:
"
t~
The design of the phase correction circuits must force compliance
to EQ. 10.92 for all the frequencies possible with the code used, including
Notice that the voltage output is an increasing function of frequency
i
f
,"
a~
shown in EQ. 10.91; therefore, care must be taken to maintain linearity.
To plot the magnitude one must divide by F first.
This will result in a
very good check on the Read damping factor if the Bandwidth of the Pre
Amplifier is wider than 10 times the self resonance of the head.
In this
case the plot must be taken at the output of the Pre Amplifier so as to
not include the effects of the filters.
Any series coupling capacitors must
be taken into consideration.
The above measuring technique is very valuable, and has been used
for many years.
If the amplifier bandwidth is less than 10 times FRES
"
HEAD
then a graphical solution can be obtained if the gain and phase characteristics
of the Pre Amplifier are known.
One last problem that can be discussed is the affect on the'AGC
circuits of a signal in Region 2.
Here the various head signals have
amplitudes as a function of frequency.
If a signal was composed of a series
'I
string of groupings of frequencies that are wider than the tI
of the AGC
filter then we have introduced an amplitude modulation not present in the
original signal.
Consider the case of two frequencies, one at the 90%
point on the BPI curve/Fig. 4.3,and the second at the 70% point as shown
in Fig. 10.19, for a 20% amplitude difference.
The AGC circuit on encountering
the 90% amplitude signal will reduce the gain then on entering the area of
the 70% signal will lt1cff0.>;
-
v..
V,~
10. Z I
F(6{c!)/"1
~I A/~ P
r;,q 111/
tt1771ce
f,..,o
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"ASS
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or
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PU8LICAiION U;1ENDE:O.
A!..L
hlGhl::>-r,L~ ... , .• ~.:.
LINEAR AMPLIFIERS
Figures 10.21 shows a typical filter amplifier block.
It can be used to replace
.
,
one of the three blocks we designed back in Fig. 10.8.' The filter design is
for a current input which we have with a corrmon emitter amplifier using emitter
feedback.
If we chose a voltage input filter then we must use either an emitter
follower driver as shown in Figure 10.22 or by loading the collectors of an
amplifier with a load resistor equal to the filter impedance then we can convert
a current to a voltage.
Note that the voltage input filter must be terminated
on both ends, therefore, the gain is h&lf unless the impedance is doubled
(see Figure 10.24).
Figure 10.23 shows the four basic types of filters.
Each must be
terminated with its characteristic impedance Zo.. The type is determined by
the input and the number of poles.
Figure 10.23A shows a current input and
four (even) poles, tnerefore, the output wi 11 be a current feedi ng Zo.
Figure JO.238 is again a current input with five (odd)
output is a voltaQe feeding Zoo
The next figure
lei
poles~
therefore the
is of a voltage input
filter with four (even) poles, therefore, it has a voltage output to Zoo
Similarly, Figure 10.230 is a voltage input with 3 poles (odd), therefore,
a current output feeding Z00
Any filter may be used depending on the design.
The current input
type is handy as it can be used directly in the collector of our standard
linear amplifiers thus minimizing the number of transitors required.
The
function of the Phase correction filter can also be made a part of the low
. pass filter by making its Zo equal to two times the Zo of the low pass filter.
This is shown in Figures 10.21, 10.22, and 10.24.
Although there are several
forms of the All Pass filter, the most deisrable is that shown in Fig. 10.26A
and B.
Z00
Two types are shown.
Each of these can be matched to the low pass
The first, A, provides a shift of 1800 as a function of frequency
;
11.39
','
l
v..
"
r"
'"
(
~
,
~
..
..
VI~
v.... .,
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:.
v.
...
PUBLICATION INTENDED.
(
ALL RIGHTS RESERVED.
LINEAR AMPLIFIERS
The second provides a 3600 change as a function of frequency and can be
altered as to the rate of change depending on the ratio of its elements.
This is discussed in the reference.
The number of poles of the low pass
filter depends on the slope of the roll off required.
But it also affects
the phase error rate of change which forces either a 3600 All Pass Lattice
or less poles in the Low Pass.
Such is the case in many designs where the
low pass uses only three poles.
Sometimes some degree of phase correction
can be performed by using either or both lead and lag circuits in the
emitter feedback path.
(
11.40
)
RIG~iTS
ALL
RESERVED.
PUBLICATION IilT£j'llED.
One of the variations is the use of separate or different filters for the
I
gate and peak sensing channel, as shown in Fig. 10.27A and B.
One last type of filter that has some usage is one derived from the delay
line differentiator discussed in Chapter 9; only this
added directly.
tim~
the two are
The derivation is obtained from the block diagram of
Fig. 10.28
c~
-- I'w T
+e.
-
I+- e
-
:a..
2
-J~
• c.JT
_JwT
'4V T
-j-
•
(
e
~
-
2..
)I.JT
-;:
.
e!-;:
'wr
(;.1-;:
iWT)
IO.IOy
+
e.
"-
e"¥
t=Q
e"""i:""
. -; ::!.I
+
. z.. .
e'-
.
and from Cos Q =
Eq.10.l07
_jwT
we get
e Z
which is a filter with no phase shift except
Eq.l0.108
a fixed
delay.
It is used
particularly in spectral shaping or in circuits that require no phase shift.
An implementation of the filter is shown in Fig. 10.30.
Ie:;.
lOS"
.
~
"
clv
--;it
fj".TII
- - -
F(~
to.
,
• f"..
Ct#t4 AI/II'"
27A
TIM/!
-
f)tlAr
T
-
-
, HA/II/II~'
1..
,.
V.,
Fib ({)·28
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~
FIG
t,p. 2
MA6wtT..,IP~
V-+
r
ot&
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2.
(c111#
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11.44
)
~I
y:
"
I
DATA CLOCKING - PHASE LOCKED LOOPS
In early disc drives and tape drives all data clocking was handled by a
separate clock track, as shown in Fig. 11.1.
As the data density increased
the tape skew in tape machines and separate head vibration in disc machines
forced a move towards self clocking data codes.
Some relief was obtained
by breaking up the clock signal into four phases in quadrature and selecting
the phase closest to the data on a per record basis.
contained long strings of no transitions.
use for generating their own clock.
These early data streams
Therefore they were difficult-to
Attempts were made, using HiQ ringing
amplifiers, to fill in the spaces and gaps; but these.all suffered from
frequency pulling if the tuned circuits were not exactly tuned to the incoming
data frequency.
For example, if the data transitions were continuous t then
the output phase was a function of the difference between the LC tuned frequency
(
and the data frequency.
During periods of no transitions, the clock was
equal to the LC tuned frequency.
Therefore the phase error'would accumulate
until the transitions recurred.
Variati6ns in disc tape speed prevents exact
tuning of these circuits.
Fig. 11.2 shows a typical circuit.
The self clocking data codes restricted the maximum spacing between transitions which permitted the use of either single shot controlled data recovery
and clocking or, better yet, phase locked loop controlled clocking and recovery.
An example of the single shot type is shown in Fig. 11.3A, where the incoming
transition pulses include alternate clock and data.
The regularly occurring
clock transitions establish a gate for the following data transition if it is
present.
Correct phasing is always established following any cell not containing
a data transition such as at D2 in Fig. 11.3B.
(
12.1
9ATJ4
SUII//H..
/
P
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G
FCG-
11-'
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1 - - - - - - 1 J)
P4TA
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cl.~''''-
F{~
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51-10(
/I.:>
I)
CLOCKING-
oF-
If M. Y,-.1rA
. L
rUBLICATION INTENDED.
ALL RIGHTS RESERVED.
By far the better clock generating circuits are the phase locked loops.
There are four basic types.
The type number for the closed loop is obtained
from the characteristic equation.
This equation is derived from the basic
block diagram shown in Fig. 11.4.
The type number is equal to the number of
poles at -the origin of b~)
The equation for the Basic Phase Locked Loop is given in EQ 11.1.
-
rPv
~
::I
~
~
C
::I
0
0
N
:.
~
::;
UI
N
0,
:;
c
a:
!
Z
-c
---r--------
I .•
III
:I
0
O~
..
Z
:=
.;
•
0."
0 .•
0.3
0.2
0.1
o
o
----~.-I---..
r
,
<
-. - - - . - - - I;!
1.0 2.030 •. 05.0
FIGURE
FIGURE
- TYIN 1 SKond O,de, Step R _
--_._--... - -
e.o
7.0 •. 0 •. 0'0 "
- Type 2 s-or..t 0 ....,
'2 13
I.
s .... " - _
II'~
(
\
I"IA.NI.T~£
JI,
K
S(S7+1)
::\~
.~
I
~>
F/6.
".g
I'
-18i) ,
.
-0
..
7';------
- -Ifr
_ I,r "
~
1_.......::::.-._ _ _ _- - - - - - - - -1)0
(I," 1/·/0
(
)
The type number is determined by the number of poles at the origin of G(s) for
unity feedback and H(s)G(s) for non unity feedback.
Thus. the single "s" in
the denomi nator of EQ 11.2 indicates a Type 1 loop.
&;1)
= -
5( 7"'5+1)
(EQ 11.2)
(7;5 + I)
S ~ ( Ii' 5 + , )
(EQ 11.3)
and a Type 2 for EQ 11.3.
The order of the loop is determined from the highest'order of the characteristic
equation, which is the denominator of EQ 11.1, as 1 + G(s)
=
0
(C.E.)
~
Picking up the equation G(s) ofAl1.2 in EQ 11.4,
(t.,:: J
,+
S
(EQ 11.4)
(TJ+')
S ( T J +.) +- I' = T 5
we get
L
+.5
+ J
(EQ 11. 5) ,
which states the circuit to be second order as S is squared.
Similarly, EQ 11.3 wouid be a third order when evaluated.
We can now evaluate the error conditions for various inputs.
QJ~
--
(j)'N -
cP,N - (/J" . . r
'(j)~
--
(j)EW" ( &(S))
(EQ 11. 6)
2..ER.o
For a Type 2 loop where G(s} is
,
_ ' k (1;.)-4-1)
G.(l)
-
52.(TpJ+I)
L[
ho .;
(
which is O.
'stA)
(I . .
K('T;J-4-lJ
St-(T,J+I)
-- L
5
((l)
S( 11+t)
r;}+ s'a.+ff(7;f+~( Q 11.10)
Simil arly, for a Type 3 loop where G(s) is
~ t)( Tj 5+-1)
Jl(rf+l)
'-OJ =
K ( Tl. 5
"
.-
r
which is, again, O.
For a ramp change in input phase
. Starting with a Type 0,
~~
Jf
: L[
rp~
5 Z-( 4-
J ... o
5
I
J-
~)
CEQ 11.12)
-
1""S+I.
which is continually increasing towards infinity.
For a Type 1
(EQ 11.13)
whi ch is a
Constq'l
t
-(j)"K
12.5
.
For Type 2
which is
~ero
And for a Type 3
L!
5(jJ.<, S'(TJ#-f)
5....,:;, 5 S"(n f-~ -f ~ 5 'I.(r;'$1- ,X1jJt-/
( tQ
""l-),
which is zero.
We can also evaluate the various types for an accelerated phase
changin'g input
where
(EQ 11.16)
wherein we' find that the various errors are for a Type 0 and Type 1 in'finite,
Type 2 constant, and Type 3 zero, which can be determined by the reader from
(EQ 11.17)
12.6
We can make a table for the various conditions and types
Type 0
Step
f/{tQ
Ramp
fu~
Type 1
Ty~
'2
Type 3
I~
Accel.
f(e~
Step
iPs
~
0
0
0
Ramp
471(
oP
---
alA
0
0
~
K
0
'"
Accel. /PI!
K
-P
c;6
if we remember that to conveTt from phase to frequency we multiply by S, as
shown in EQ 11.18
al\4t
wt!
h.tlL
f"lv~"'7
t .. bloL.
I And, frD""
ct.'r s-a. ... c
L [
5 ... 0
5
To. FIt4S#
~J
LS (5 ( I -/.
5
5(
,l
r: tJ»j
(EQ 11.18)
+
for a Type 1 step change in frequency.
When we choose between the various types" then, it is desirable to have a'll
input variations result in zero phase error.
This only occurs for a Type 3, but
in practice the 'accelerated phase ' cond'ition, if it occurs, is only for a short
time.
Therefore, as the Type 2 is easier to build, it is preferred.
This is
borne out in testing, comparing the two in disc drives.
As we developed the equations for G(s) for the various types the reader may
have noticed the addition of zeros for Types 2 and Types 3.
This needs explanation.
The Nyquist criteria requires the phase shift to be more positive than -180 0 at
the point of the zero db gain crossing of the open loop G{s)H(s).
For Type 0
12.7
and Type 1 the maximum phase shift is -90 0 and -180 0 respectively, at infinity.
~
For Type 2 the phase shift starts out at -1800 and heads towards -2700 following
To make it stable, a zero has to be added before the pole.
For
Type 3 the starting phase is -270 0 heading towards -360 0 due to the pole.
The
th~
pole.
addition of two zeros before the pole brings the phase above the _180 0 required
for stability.
In all cases the pole is not required but is usually p'resent
due to stray effects.
The addition of these poles and zeros introduces another parameter called
lorder. I The order of the circuit is determined from the order of Characteristic
Equation, or the denominator of EQ 11.1, .
I +
&(J)
1-1,,)
(C. F .)
(EQ 11.19)
:= .::;
K
For example, if H(s) for unity feedback and G(s) were S (r.r-;,)
(
5 (7)t-1) + K
o
;:: Tf"l..
-I-
then
5 +- K.
(EQ 11.20)
which is a second order equation, .hence the term IType 1 second order.' when
referring to that circuit (see also EQ 11.5).
First order and second order
circuits are well described in the literature and there exist many curves
and equations relating their behavior.
Third order and above are more
difficult to predict, except as the entire equation is evaluated on a computer.
The tradeoffs are not easily seen, as with the second order circuits.
For example, second order circuits can be described in terms of {and
and are easily changed to obtain the required responses.
t.v..
Figs. 11.5 and 11.6
show the step response of Type 1 second order and Type 2 second order, respectively.
(
12.8
The open loop Bode plots for several configurations are shown in Figs. 11.7
through 11.12.
These are not the only ones posslble but are representative.
In each case notice the stability criteria constraints.
In Figs. 11.7, 8, 9,
10, and 11 the circuits would be unconditionally stable and in Fig. 11.It. it
is stable only if the gain goes to zero well before the phase reaches -180~
In Fig.11.11 stability is only achieved if the gain goes to zero between the
zero and pole.
Due to stray capacitances the stability of Figs. 11.10 and
11.12 are questionable but predictable.
The circuit used to obtain Fig. 11.10
is quite popular and is often used in the trade publications.
The -3db bandwidth in radians/sec is given for a Type 1 second order system as
(EQ 11.21)
and for a Type 2 second order circuit as
(EQ '11.22)
The set6ing time for a step response (within 5%) for a Type 1 second order
system is approximately
(EQ 11.23)
The curves of Figs. 11.5 and 11.6 correctly predict this behavior.
12.9
The Bode plot of Fig. 11.11 requires some further treatment as the presence
of the added pole makes it a Type 2 thi.rd order, which is not so easily
discussed.
The Characteristic Equation is
C, f..
I +
K(rzS+ I)
S'-(1;5+ ' )
=0
(EQ 11.24)
(EQ 11.25)
We will return to this later, after we have demonstrated the difficulty.
Our best approach is to provide circuits to fill the blo,ks and then design
several loops as examples.
4> Detectors
The phase detector takes two fonns, either the non-hannonic type or the hannonic
type.
The fi rs tis the ki nd usually used infrequency synthes i zers for conti nuous
waveforms.
There are several fonns.
We will restrict ourselves to only the
digital forms, as they fit the circuit b.locks we might use.
The second are
insensitive to missing cycles or pulses such as occur in a data stream.
first kind develop false errors if a cycle is missed.
we will develop several of each.
The
Since we need both kinds,
The test of a phase detector's function is the
phase transfer curve, which relates the detector's response to various phase
errors.
(
12.10
1\ (J7j+JX 5 T, +-1)
$ )
~----~
K(J1;tIL
;..
?(~T,+I)
- "".
__
~
__
~~
_________________________ -27p
t{.l(
FIG.
L
B
l
vf'
vI"
vP
FIC- fl. t) A
FI6 " ' 0 0
-7T
-7T
1I"
IV- ,q
(H
'Tee ro;z
(j; ()£TC.
f/6-
({.11f C>
'D' NON H yfj 1\ 1'1 0 /J Cc.. ~ PErC.
)
w rive
PD~'"1.J
.
t
(
li...~.i\..-J,.·"\I .·~·i'
l:·\,t.:i ........ ~. ,. __ L
i ..........
ii_r
....... __
~_ ....
Non Harmonic
There
ar~
errors'.
two forms of these.
The first always produces both UP and DOWN
The average of these two errors becomes the error signal.
The
phase reference is 1T/2 radians; therefore they are called quadrature phase
detectors.
Examples of these are the exclusive "OR" circuit or the mu1ti-
plier configuration which is a current
I
e~clusive
In Fig. 11.138 we can see the operation.
•
or output device.
Any phase shift to the left (early)
or to the right (late) causes a shift in the area of the UP or the DOWN error
which, when filtered, produces the desi'Jed error.
The circuit has no dead band
as a result of the two errors always being present (see Fig. 11.13C).
The second form are the "in phase" versions.
to the. edge of the waveforms.
(
They produce an error referenceci
The circuit of Fig. 11.14A is one' of these.
This circuit is useful but suffers from some dead band due to setup and
propagation times.
Also, the filter must be able to handle very narrow pulses
when the phase errors are near the phase reference.
chosen must be able to handle the pulse widths
{F~g.
As also the logic family
11.14C).
The circuit
'of Fig.11.15A does not exhibit dead band and is therefore preferred.
There
..
are commercial versions of these availabJe;
being typical.
the Motorola MC4044 and 12040
These have similar waveforms to those discussed.
Again, dead band
and logic speed need consideration, particularly when the logic response times
are an appreciable part of the duty cycle as this increases the tolerances
or phase jitter/which can be referred to as spurious sidebands, in the closed
loop operation.
(
12.11
)
)}
n
c
PI'('fA
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I
n
n
r
O~(J
vI'
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PitTA
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OJe,
I
/I. If A
f)IAO
LNI4V~r,:>~""1
~,("""NA".:>M
(JAAI))
cP
Vr:~SIO,\/
r.:>.<
1/;.;>/./
PEAO t.>-f'f/J)
JlFT(!c. rD~.
-'IT
fl6. 1I.lsc..
fHAft
Fo If.
Cu~v€
T'tfAtV$ f'E/l.
No ~
peAt?
6AttI"J?
I
osc.
"JIc Tc.
&...-1
O.T·
O,q7/-t"
C!
--~I--...----I
L
_----I
E IIlfly
i""_CJ_-r_~nL.
_______--In.J..___________--Jn,-____
r-1~_________~r-l'-______________-Jr-lL__--
~ PE',4r~
P~'A1EP ~A7A
---In
I
vf
f/"«
- - - - - - ' - - -_ _
Vv
~€_·~____~--~--------------~----------------InL.------Ff6.
F(f:,. II·'(.C.
I
~'7T
PH-A
re:
-r;(,ANfff.lZ Cvte(/I=-
iarmonic Phase Detectors
These detectors are required for data synchronization due to the nature of the
-
·0
da ta • A stream of ones and zeros requi re ins ens it i vi ty
to the missing data.
The detectors already discussed fail in that they produce
false DOWN error at
~he
II
II
missing data time.
The design of this class of
phase detector includes circuits that allow the phase detector to work for one
cycle following an input pulse.
One version of this is shown in Figs. 11.16A, B, and C.
The circuit is similar
to the non dead band version just discussed except that a gate has been added
to condition the lower "0" F.F. clocked by the oscillator.
equal
tO/o~
The delay must be
slightly less than, one-half period of the oscillator plus 1 logic
delay "C-QII and 1 "0" setup time.
The difficulty of this approach is that
the input frequency has some tolerance due to tape speed or rotating discs.
Therefore the phase transfer curve has a truncAtion at the leading edge'A:
If the total delay were greater t.han a half period plus the other two delays
then there could occur a false down error of
location of the
,Nf'.,r
foll~wingA!'ulse.
or greater, depending on the
The circuit of Figs. ll.17A, B, C, .is no
better off as it also requires a deJay.
UP and the DOWN error simultaneously.
Here the incoming data sets both the
The UP is reset by the fixed delay
and the DOWN is reset by the oscillator.
in area of the two wafeforms.
11
The resultant error is
The reference
~
t~e
difference
is the output of the delay line.
The delay required to reset the UP FF must be equal to or less than one half
an oscjllator period.
If it is
greate~
then the phase transfer.curve is
distorted in that the DOWN error is shortened at the previous oscillator edge
instead of the correct edge for a late pulse.
Fig. 11.18.
For delays shorter
12.12
)
..
.. D
P G.
Go 1 - - - -
v!'
c..
----tt
PH"Y
. '/J(~UI4I1'r
)1
I
..
OSc:.
f)
(i
1----
----I,
p",
-7T
PI' 1/. I 1 C.
fHAf~
O,H~
EA-f''t
RA7.Q
n
PN EAA~
V,f',
Q.~
V~SIO/'J
n·
n
f
L
L"'7~
n
n
DEt,QyE.J)
c",ec/.r
I
or
1197A
r,,("AN,f~~A!
II
I
alf the oscillator period the phase transfer curve is
trvnc&~td
As
•
; seen. the need for a conditioning circuit causes the phase transfer curve
less than ideal due to the fixed delays versus the varia'ble oscillator
d and/or the input frequency.
:tor Interface
)utput of all the phase detectors illustrated so far are voltage pulses.
interface to the filter sometimes calls for a current.
If
thi~
is the
irement then the voltage output must be converted to a current.
Where
"
.
1
-
'ow pulse widths are expected. as will occur in tbe circuits of Figs. 11.14,
~5.
and 11.16, the current conversion circuit must have very wide bandwidth.
rent switches, of both polarities are often used, such as in,Fig. 11.19, or
mall capacitor can be added to a resistive convertor to "store" some of the
rgy of narrow pulses before integration, such as in Fig. 11.20. This will
;ome more obvious as we discuss filter circuits.
.~
V Logi c Swi n9
7T
,.,.11, . ,
for the voltage circuits and
The gain of these, detectors'
%,
7r r~'
-
for the current
1
itch fonns.
1
other type phase detector is the sample and hold.
It requires a time v'arying
Iltage driven by 'the oscillator/which is always of the same s1ope,.,and a sample
;rcuit.
These are inherently Harmonic detectors in that the sample is always
l;tiated by the incoming data.
The pulse width of the sample gate must be
mall compared to the oscillator half period.
round some reference.
·1
Also the ramp must be symmetrical
Some phase locked loops a re bun t a round a ramp osci 1-
ator which automatically provides the time varying ramp. 'One problem with
Jnislope ramps is that a very fast return edge, is required.
This could be a
very fast capacitor discharge (Fig. 11.22) or it could be a 1800 phase reversal
12.13
j
1
of a symmetrical triangular wave (Fig. 11.23). The latter type are easily
. obtained from the oscillator by using an amplifier similar to that which we
I.
developed to handle two separate inputs as in Fig. 10.4.
f
The sample gate must be able to handle the full swing of the ramp and pass the
charging or discharging currents into the hold capacitor within the period of
the sample.
TherE are two kinds.
The first is illustrated in Fig. 11.24 and
is a. transfonner driven diode bridge.
It can handle both the positive and
the negative portions of a ground referenced symmetrical ramp, as well as the
discharge and charge currents of the holding capacitor for bidirectional
samples.
Another fonn that is currently popular is the analog switch shown in Fig. 11.25.
This circuit has series resistance and therefore requires careful consideratiun
of the RC time constants of the hold capacitor and
~so~of
the Fet.
The
phase transfer characteristics of these circuits is shown in Fig. 11.26.
The.
limitations are the sample period and the bandwidthreltrICtlot'ls to the fast
return slope.
There are no cOrTlTlercial versions of hannonic phase detectors available.
However,
the non hannonic types already referred to can be made hannonic by the addition
of the en able gate structure shown in Fig. 11.16A that is made to block the·
oscillator input in the absence of data via an AND gate or the reset input
to the lower "0" FF.
12.14
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Oscillators
These are all either voltage or current. controlled oscillators.
Their purpose
.,
is to prdduce an output frequency that is a function of some control input.
They can take the form of controlled multivibrators, controlled LC oscillators,
or controlled sawtooth oscillators.
There are a large number of commercial
types available and many other circuits using discreet components that can be
built.
Except for the linear LC type oscillator, their frequency period is
subject to the noise around a threshhold amplitude where the level of charge
on a capacitor is used as one extreme of the oscillator output swing.
Some
commercial types require very careful .power supply filtering or isolation in
order to reduce their susceptibility to injection locking, even though separate
pins are provided for
~he
oscillator power and the output driver powers inputs.
Very careful layout and component placement is required for best stability or
minimum phase jitter.
This is particularly true for the control input which
is the error voltage or current.
A voltage controlled multivibrator may be constructed ·from a bidirectional SS
circuit with positive feedback.
The circuit is shown
i~
Fig. 11.27 and can be
designed for either Eel outputs or T2L output, depending on the positive supply
and the resistor ratios"
,
by changing the
~atio
~.
'
tiL used for the clamp.
Sensitivity can be altered
.
between R3 , R4 , and R5• As the value of R3 is lowered,
the change in frequency as a function of the control voltage is smaller.
The frequency is determined by the clamp voltage, the current source values,
and the capacitor value.
12.15
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Above this, the flyback
time takes an appreciable portion of the cycle thereby altering the phase transfer
curve of the phase detector.
f
.,
,~tU.
..,It.,~ IIrnLATp'(r
Some of the commercial version7\include the M{4024;
1648, 1658, 74S]24, and 74LS124).
Of these the MC1648 is
_n
LC version oscillator
that requires a voltage variab1 e capacitor to control the frequency.
Data for
these are contained in their respective data sheets and will not be discussed here.
The gain of the oscillators is expressed' in radians per second per volt,
"
depending on the type
filter.
or radians per second per amp.
f1L7e~J The purpose of the filter is primarily to provide some bandwidth limitations
~hile
providing the desired poles and zeros for stability.
If we look at G{s)'
it contains a single S term in the denominator from the frequency to phase
conversion.
This by itself provides a pole at the origin making a type 1 loop
without'adding any other components.
The response time of the loop to a step
change in phase is shown for second order systems back in Figs. U.5 and 11.6.
Knowing the overshoot permitted and the repsonse time for settling, the bandwidth
can be obtained from the graphs.
The filters take three basic forms.
The first filter, Fig. 11.3IA, interfaces the logic blocks producing the
up and down errors as voltage pulses.
Its transfer function is stated below.
The effect of Cl is to capture the narrow error pulses that the OP amp cannot
respond to.
Vvr
=
ov
=
I (~ ~
1,5) - 1 (.i-J)
- I, ( ;S)+- . I
;'-5 ~ 4:)
I
L
(EQ 11.29)
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(EQ 11.32)
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(EQ 11.33)
C;s
(EQ 11.~4)
=
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(EQ 11.35)
(EQ 11. 36)
12.19
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ALL REIGHTS RESERVED.
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PUBLICATION INTENEDED.
1
1
1
Notice ,that this filter has a zero at R2C2, a pole at R1C1 , and a gain of R1C2 .
The filters of Fig. 11.31B can be analyzed by considering the voltage out is
V. =
, (-1(
1_ c::
I...,. 1::F
C',5
c,s + t=;5
f{ Ct.)
+~))
+-
=
(EQ 11. 37) .
+/(
I
(EQ 11. 38)
f? (z.. S +
(EQ 11.39)
(
1
RC 1C2
Which is a pure, integrator, a zero at RC 2 ' a pole at C +C ,and a gain of
1
1
Cl +C 2 .
change a type 1 to a type·2
The
2
As can be imagined, the added S in the denominator can be used to
~ilter
loop~
of Fig. 11.31C can be similarly analyzed.
Here the imput is a voltage
such as might be stored on a holding capacitor C1
Vo
-
ttl
-
C,
t
C,J
f
- 5
• C1.
4- ~
.....
(EQ 11.40)
-'
cL 5
(EQ 11.41)
(
12.20
ALL R1GHTS kESERVED.
PUBLICATION
IN1E~J[D.
1
RC1C2
Again there is a single pole at C1+C 2
,
and a gain of
.,...1...-,.,_
~ +C 2
,
This would be fine
:"
.
(
for a type 1 system as it does not introduce a pole at the origin.
The filter of
Fig. 11.310 is for use with a current input
{EQ ll.42}
C z. S
1
which is a single zero at
Ret
ANI' If Gt411V
.. ,
.-L
C7.
and a pole at the origin. \/This particular filter
is not reliable at high frequencies due to stray capacitance, which makes it
look 1 ike EQ 11.39 where C2 is Cl of EQ 11.42 and C1 is the stray capacitance
in pa ra 11 e1 •
There are many other variations that could be desired depending on our
requirements.
For our examples we will use the filters of Fig. 11.31A and B.
The filters can be used if the pole
far removed from the zero.
assoc1~ted
with the stray capacitance is
The last remaining block is the sample rate block.
Usually with a data stream there are oat least two {a maximum and a minimurri}
pulse rate that are subharmonics of the oscillator frequency,
is a maximum gain and a minimum gain to be specified.
calculated.
Therefore, there
Both cases should be
The loop performance usually requires the maximum peak overshoot
response to occur at the maximum gain therefore this value must be used to
establish the loop conditions.
The sample rate gain is
(EQ 11.43)
for the filters we will be using or if we used the zero order hold circuits
I
12.21
I
1
~.
,"Of
.
.1h.L;'L_ .... ~~.
(.
,
,
.
",
such as sample and hold the gain is
(EQ 11.44)
where W is the radians per second of interest and WS is the radians per second
of the sample rate.
The design of a Type 2 phase locked loop is shown in Fig. 11.3'2.
first specify the loop.
The input shall be Fn :2.5 MHz.
peak overshoot of no more than 5% and a response
tim~
We will
It shall have a maximum
of 2.0
~s
to within
~
5%.
The oscillator shall run at 5.0 MHz and shall be able to capture within! 20%
of 5.0 MHz and be able' to follow frequency excursions of
(
! 5%.
If we look at the graph of Fig. 11.6, we see that a { of 2 meets the
criteria of 5% maximum overshoot.
W
.. t=0.5.
The error comes within -5% at around a
Since we want to settle within + 5% in 2
0,;;-
-t
~s,
=
then
(EQ 11.45)
, The gain of the oscillator is determined from the curve, Fig. 11.,33, for the Me
1658.
950.
If we choose a nominal control voltage of -0.7 volts, the F.C. product
For a frequency of 5.0 MHz, the capacitor must be
(EQ 11.46)
which can be made up of 180 pf + 10 pf or 180 plus a variable capacitor to
(
fine tune it in.
To obtain + 20% range, the error voltage excursions,must
12.22
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include
f{'i
O'.= (9)01. ~ = 9S0 +
on the curve.
'fO
(EQll.47)
These control voltages represent at 1140. up to -0.45 volts and
down to 760 at -0.95 volts.
The gain Ko of the oscillator is in radians per
.'
,r,'.
second per volt
2. 1[ (Ill)
( 1,/0.11'
0
-7/0)
Mff~ -I'F
2-71.107 ,..4~ _v,u-
J( /-0 -0- 'I-)v
{EQ 11.48}
!.
The gain of the phase detector is
The gain of the K sample is
(EQ 11.50)
. The gain of the filter is Kf
~I
(I.
5 ( ~~(I 5 +-
t)
To get ~ and Wn specified, we need to write the entire equation.
We will include
an attenuator Kat as we may need it.
(EQ 11. 51)
12.23
)
1+
)""1.1"'0 10)
1('".,(" (
5
I{ .. (1..
S
4- ,
AlC,.,j( ~lr4-
J)
)
If we look at the characteristic equation ot the denominator, we can determine the
response
(EQ 11. 52)
(,E. -
which is a third order equation which was forced on us by the inclusion of C1.used
to improve the repsonse to very narrow phase errors.
If we ignored this C1 and
_ ..-
rewrote the equation making sure in our design that the pole RIC l is more than a
decade above the zero, we can proceed with a
({L
,
G
+"
1"\
I
{12. (lo
5 +-
~I["S
J~cond
order solution.
(EQ 11. 54)
now rewriteing equation 11.52
C. f. -
f+
(EQ 11.55)
~
12.24
l
- ---
---
----
--_._---- -----
ALL RIG~TS R£S~R~ED.
FUBLICATION l~lL~JCD.
(.
=-0
(EQ 1'1.56)
p.,~~.C),
1<.J(/{l.iL J
({, [
J · " L ~#.:> It k;...
..
---
=0
I\'IC'1..
(EQ 11. 57)
Therefore,
(EQ 11. 58)
(
(J.-
......
and
"Z"-'D
"K.c.JtL ~)
K't ~
(EQ 11. 59)
>."'l.Y-lo'kD<,
-
Therefore,
gOing back to
(
K-. ll-
- R,
IfL
(EQ 1-1.60)
(0
-
W,,'"1.- =
). "2 ,
10
'f-IO
,
'} . , 'z..
tuo
f{,
{i..
-
0·l71
}(~
=
(2' >1<'!)
(EQ 11.61)
1-
(EQ 11. 62)
12.25
~
--" =
(EQ 11.63)
-
Now we know that
(EQ 11.64)
~l
. If we choose C2= 1.0 x 10- 8 farads, then
which also. means that
so if
K~were
~.
1, then Rl would be
I
-
{EQ l1.67}
AS
"i 's r.o
t.4J('E.
Therefore we may need an attenuator for interface purposesj\. Now we have all
the parameters we need for des ign.
We shou1 d revi ew the change in voltage out
c
of the OP amp to see if it can drive the attenuator for the frequency range
since we need some interface to the IC.
KoI... :::
-f
S"
1<.. - 1171..-
(EQ 11.67A)
12.26
ALL
RIG~TS
RESERVED.
PUBLICA1ION INTENDED.
(.
=
(EQ 11.68)
Now we know Rl , R2 , and C2 , we can designate the locations of the zero.
(EQ 11.69)
err
,.2)" ~(O¥
1-Tr
-
-
Q
I'
f
If
.,.
,.I~
)
oJ
.
"~
We can now draw the Bode diagram knowing all the information we have.
We now
need an equation to describe the zero gain crossing Wcn of the -40 db/decade
(-12 db/oct) slope determined by the 52 in the denominator.
{K; - JK~ k", KF k~
k..
(EQ 11.70)
- I~Xo.z7/>}( K,'Cz-X+X 2 ' 7 T't
(
which checks with EQ 11.45.
07
]
The zero is located at 6.25 x 104 rad, the phase
margin at the 0 db crossing of the open loop is 86.4 as obtained from Fig. 11.33J5
and
1--'( 10 'y.
-r)
A ,., x,v.l
f..A.-
(EQ 11.72)
= G-.- 1 1&
We should investigate the phase error that results from using the OP amp.
· h f requency galn
.
h19
0f
t he OP amp
1's
3
&
60 xro10 31 • 36
Rl = 1.
1.172
(
12.27
The
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The manual for a l1a 741 shows a phase shift/ closed loop" at a gain of 1.36 of
around 450 ,at 0.7 MHz or 4.4 M rad
above~rOdb crossing which dictates
a
loss of about 12.8°phase margin and some increase in overshoot and settling
time.
The same goes for any pole we might add by placing a Cl in position.
-
-T"
4-
I
r{( (,
7
10.;:; ...
- (0
(EQ 11.73)
which is the
586 J\.. to 586.A junction without subtacting more than 50 from the phase margin.
This would place the spread between the zero and pole of ~ = ~~~5 x 104= 160
which is adequate.
~ error of
Now the phase jitter is described by the equation for a step
11
-
cPo"\j)
S
~.
_ ·(o(I.:''l,,;r-J + 1)
t.o "'0
S~
1+
(EQ 11. 75)
--5
_~_.
S-_s_+-_'_J-J
1:::>_'4_:)(_1_''_X_t.::>
_1)_'1._
__
l
S .... t- t· 01(10 S -I- ,. u-~.::>
,0
(€~
(f,
7J
12.28
J
f
1T
Lv..
---5
..... (
. -
'2
~ Lv..
w..a." S + I
)
The solution is
CEQ 11. 77)
CEQ 11.78)
.,
1
.
~ob)
As can be seen as
lo~g
as we keep the bandwidth up to improve the response
to a step change in. phase, we introduce
0 errors in the oscillator
always occur when reading written transitions due to both noise and
. ferences as discussed before.
""It,d..
pvLse.
iriter-
The ideal solution would be a system that would
lock up fa.st and then revert to a low bandpass loop while reading transistions
,
associated with the customers data.
prior to the data
a~ato
This is accomplished by having a preab1e
be used for locking the phase locKed loop then changing
the location of the zero"perferablY.lto lower the bandpaS"SI and hence the jitter.
Now
i~
the example just cited, the zero is the result of R2 and C2 around
the CP amp .. We could change the location of the zero without changing the gain.
If we examine 6(5)' the gain of the filters is R1~2 which means we could lower the
zero by only changing R2• We could do this with a Fet if we could accept the
12.29
,
r.ll RIGHTS RESERVED.
(
transient associated w.1th the Ciss of the Fet.
from the resulting Bode
p/~t
PUbLICATlON lldt.i,JLD.
If we did this, we could see
that we really need to lower the gain at the same
time, 1n other words we need to lower Wcn the same amount that we lower Wz, but
Wcn
=
~ th~refore, we need to look elsewhere to do the job or allow greater
time for lockup or allow' a compromize.
There is a better filter that can easily be used that allows both gain
and Tz to be changed by only changing one component.
If we use the filter of
Fig. 11.31B in conjunction with current convertors for the phase detectors, we
get interesting results.
(EQ 11.79)
(
A""f'~
Now the gain of K0 is in radlan or.I
source/~radians.
The gain of the filter is
.given in EQ 11.39.
Therefore, the characteristic equation is'
(EQ 11.82)
(
12.30
,
}
W~
which isa third order equation again.
can take two approaches.
The first is
the same as before where the pole is widely separated from the .zero by at least 100 .
7; -
!f~
100
-
I( C1..
-T,-'h.
~
T,t,=
a-(
-
f( {I-
((, +(,)
'" (, {&..
(1.- '00 -
I
='I?
.~ C,
(l..
C, + ('L-
=
(EQ 11.84)
C, -I ( ..
C,
(EQ 11.85)
If we take the same parameters as before, the filter would be that of Fig. 11.310
which has an impedance as given in EQ 11.42.
(EQ 11.86)
C. f.
=I +
5
(EQ 11.87)
.....
+
(EQ 11.88)
Lv.~
-
(2.';](
1091..
=
~
12.31
1
ALL
tf·2"7~o
:
RIG~TS
4-
I
Ca,.
RESERVED.
PUBLICATION
l~TENDED.
/(11(
(EQ 11.89)
c"- (2. .S-'l.IOs-)"
I I< 0<.
'" '2,(
'1l4/lP '
2) w.. =
(EQ 11. 90)
"
to =
(EQ 11.91)
(
If we 1et C2
= 10- 8
f&.rL4$
as before t then
-'f
I
~o
(EQ 11.92)
(EQ 11.93)
Go
I/'
•
10
(EQ 11. 94)
(
12.32
;
ALL RIGHTS RESERVED.
PUBLICATION INTENDED.
I
I
!
;.
I
which looks familiar.
as part of the gain.
We could raise the current by changing C2 and C, as C2
The current source could be
'45~
pa without an attenuator
a 1.45mi. with a 10:1 attenuator which should be better unless we run into
linearity and range problems.
,
,
Cl would be
C...
-
. := 10 1. ~r
Now we can cal cul ate Wcn =
(EQ 11. 95)
r -
JK; as
(EQ 11.96)
(EQ 11. 97)
which all gives the exact same Bode diagram ai fig.ll.338with a loss of 50 phase
margin at the zero db crossing except we do not need an OP amp.
Bandpass for 1ess jitter,
l~ts
change Tz to .1.6 x 10-4 .
To get our lower
To lower the Wz and the
gain,we simply raise the resistor R of the filters by 10 and change the current
of the current sources bY(10/1 from 1.45"'3 to 14.5 lla.
as the pole associated with Cl does
is less.
This would work very well
change therefore, the loss of phase margin
There is no disturbance to the error voltage by changing R unless the R
switch introduces an error due to stray coupl ing.
The whole Bode pJo t moves down
by 1 decade meaning that the settling time is now 20 llS insted of 2 llS which is
ideal after syncrJnization.
The second version is to make the separation of the pole and the zero 16
in order to get as good a
pha~margin
as possible.
Unfortunatly, we cannot obtain
12.33
~
.
•
~
__ -t
--
== .::
,. .::?~:i .::: '.
, :el
-j
-
-
,
1-'
....l' I
LI
I
,./
11/
::z
....l
!
11
!
I
I
I
j
!
I
I
1
I
I
i
i
iii
I I
1~J.J I I I
.Q
~I
I
i I
I
1
I
I I
I I
I I
I
I
I
'
i
i
I I I I
I
i
I
I
i I
I I
I
I
iT!
Iii i
I III
,
i
I
i
I
I
!
;
I
j!
I
I
Ii :
I
I
I I I ,.
I I I
I
, . I
I
!
t
I
I
I
i
I I
I i
i
ALL
RIG~TS
RESERVED.
Therefore, at the centroid we have a maximum phase margin.
PUBLICATION INTENDED.
If the data recorded
has several frequencies such as iF, 2F. and 1-1/3F, then the lF and
2~
in radians/
should be placed on either side of the zero crossing equally spaced on log paper
Fig. 11~34.
This will prpvide the best possible phase margin for all frequencies
of interest.
If the spread between frequencies is large,' then a Wider spacing is
required between the pole and zero.
by the data {sample} rate.
Notice that
th~
gain K of the loop is changed
Therefore, all frequencies of interest should be given
the best poss ib 1e phase margin.
Such will be the case if, in our exampl e, starting
at EQ 11.86 the sample rate were used that corresponds, to the lowest sample rate,
then for all higher sample frequencies the system should be stable unless the
pole is exceeded (associated with RC 1 ).
It should be
~,t~J
that the phase margin/
hencel is a function of the spacing of the pole and zero.
I
'
Since the solution of a third order equation is not so straight foward
we' ,will try another approach.
&r.S)
=
1;
'I!.
J ~ I
J) +
sz.
-+
"'-I
..
K
4-
.;.....-
~
K.
1-
(from G Winner and R. Spencer)
"-z .s
...
I
/ £uT..
+
j'"
(~ - t.J~rro)
-( (1_ -'VK'\..)' 1. +- , cv' I- ( ~ ,- 7;- LJ;)
Kj
'L) t
'12.35
j~~== g-=~- ('
~'
~-
"=.=====';=C:C:"
=c::;
,.
.~-:-~ -~::~ ::: ~ ~
~~_:-:-,--:::::1- -~.
-,
=
L __
-...,.
'"_.
:-
F=
"--
=.
----
:--
:-~
=3: ~-~~
=--
--? -
=
=
-~-
-==1--:.--- - .~- l
&;---
.~
--
___ 7
_J __ . _
_
--
0
'"
"d"
tn
U)
'
,-.
o
1
1
12
8_ ~ -.-
7.
6_
=
-
=.:=
~..:....
--
==
.
1----
--
1----'
5
--
-
I
:1
- =-
~
=
4_
·1
:-::-c ---
:=
=
..:=
--~:.~-:--1
=:.: -:.~ -:-~ -:::: :
=]
.--i
.--
-
. -j ~
-
:-
':7'7
2_
"7
7'
.
-' 17
./
, '
./
I
J' / :'./---
IZ/ ./
,.~~./
./
I
C)
::l"
-+
II
I
i
'
!
I
I
!
1
I
i
I
. I !
!,
I
L
I
'i
I
i
I!
I
0
"..,
or
II
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I
II
I I :
: I
i
I
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:!
I
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j
,
1
I I
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,
I
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--
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,
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o
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Q
7
~
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ie.;
9 __
.,.
C:::'-"_,-,_",.=.
;~-=
--
.,,= :e:
=..' ._... ,
. ,-c
-'j
8--- F---"-::±..7. __
6 __ _
-c':-j -'"
:'C:.- _-'
.7'=
.
.:;."
".-:cot:
C-=;.
.:C
"
:::-~ ,
.•
c:'''''
-::;:.::-=
:
,.... §
5 __ _
f
\.
~
=:::
--
3 __
-±=-.-
-,
,>'4
-.-f-:
'~';j
--
.--'
~-=--:;'~~ :/~~.
-:t:'-~'~? ~
.
Ii
r-----'~~,·~~---·-t-·---------i+-~-~-----~~----~----_t----_+~===~·~-'~!
~/------i~~/----.~----=~~'~~~--.~--.~~J
.
I---'.~.-._
-1-_-_-._-+_-_-=--_-_-i_---+---4-.-_-l-~-.~-.!A.~.Il:f!~~--- _ _ _ .J
J , :
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/
____
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~-
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.
j./ ~
---//
.
i
l~-=~~I~i~~-~O~~-~,~~~'~'~'~'~-~~I~i~'~'~~.i~!~'~~'~I~!~~~.~~"~'~~,~"~:.~C~-~~.~~~~~'~!~·~'~~-~~~~~~~~~~~~~~:~.-~-.~J~:~:~.::..~~
:...=:..=.,~.
7 __
-.= ..::
-. .:..c=.:;..:'-
--
j
'. :.J
::-·~·-::7
===:;":1=-::=7
6. _
:
.-
5 __
4
::--"
.-=
--
=
3.
'-
--+- ~.J __
I
2.
'':;
.",
...
.~
'-
--
~~
"¢r:;
.;'/7
' /
I
,
,
I
~-r~_r~~~~~~'~~y~~-r,-~--~~~~~~.--~~~--~~~~~+-~,.~+J-+\\--~~--~------4---.--, I .
~~~~+I~!~'~'~V---'~:~t_~:ti~:i~~~i_~I~!_r'~1i_~--~-r~_T1-~-r~-r'4'~'~-~II~~,\~I~~~~~--i
: 1"'l7'
iii
I I i ' ! ,
i ! I!
.: I I
:! I \ 1
lQ'1-' ,!
i Y
i I I
! I
I I I I
II!
I I I!
I I I n
:1
'!'
t
'.
/l.LL RIGHTS RESERVED.
PUaLICATION IN! EJWt:.D.
a phase margin sufficient for a { of 2, so lets see what we get if we keep the
zero at the same location.
c,
~
(L.
-
=
=
(EQ ' 11. 98)
'" -I
i _
substituting in EQ 11.81
C. f. = I +-
(EQ 11.99)
Cl.l)
(EQ 11. 100)
=f >0f( (/ (.:.), + ~[, ~ f ...'),S \. +
,- K.<.. IUs
../.,
(r}fl~~o'-r~~J.,. ~
1-
(EQ 11. 101)
The usual method of making the Bode plot is to locate the centroid between
the zero and the pole on the Waxis on semi log
, of -20 db per decade passing thru zero db.
p~p~and
Then on this line locate the zero and
pole and draw lines -40 db/decade passing thru each,
~ine
thru the zero extend to the 0 db axis.
o db
axis is equal to~.
draw a line with a slope
the pole and zero making'/ the
The intersection of this line with the
The phase bulge extends from -180 0 on the left upwards
peaking at the centroid and trailing back to -180 0 to the right according to the
equation.
f)=
(EQ 11. 102)
12.34
ALL F-IGHiS
~
IGGw) C..t,..t
-
u-
)
W
4-
.... '&.
Lv&!;
~ . .)Z- +
FJbLh~AilON :d'jLiI~!ED.
(,.V
w"'"
........ %..
(I
R[~lRVED.
;"
"'"z
Lv
~~t
-"L
~(I
WI.
X
.:
.:
~
,
'-Ie
7K
C
',.
!t,
i'
WI'
""'Ie
There are three tenns that cause peaking in the frequency domain
.
r •.
/+
~1- - ~Z-)"X
/
I
,,2 2
Note that the (l - ~) term would cause peaking at a much higher frequency than
the other two terms.
Hence, for
of the other two terms.
... '/111 ....... '-
ntnl1iliAl
peaking, we need to balance ,the affects
For closed loop bandwidth
whe~
and was solved numerically and shown in Fig. 11.35.
~
d
I ~(j..,) /1. -
0
_ ..,
W::
(..J I'le
Closed loop peaking
.
dt-J
Thi solution is shown in Fig. 11.36, 37, and 38.
For various values of x we can
tabulate the peakfng resulting from ignoring the S3 term and app1y'ing the above
derived corrections.
These are tabulated in Table 11.1.
Tab 1 e 11.1
X
4
10
16
20
25
Ignoring S3
Corrected for S3
4.5 db .
2.12 db
. Improvement
4.44 db
.06 db
.39 db
.78 db
.51' db
.51 db
1. 74 db
1.08 db
1. 56 db
1. 37 db
1. 21 db
.86 db
.70 db
12.36
)
--~
----- -
-----~-=~--.
- --
~"
j
~-
/.
I
--i--.
.1 - I
. . -.
';-~
__ w_
-
~-~
•
i·:==:2· i------
.-+ ... -
(
.:.
(
,--o
~
o
"
..
'-
--,
o
\,
~
I
,
I
(.
5
I
,
---,:
1-"-'
!-:-:
".:~/
I
----~
~ - -"-
.--
r'
-.,---
!
-"-~-.-
,
:;/- ~-,-,
f'
I
r
.
:
4
... '
Ln
~
X"
{
•
:r
o
o
•
.0
:----
----._-
-.'~
. _~~-..:.::.::..-- - :-:::':-:...-==r=---
.
.,..-- ..
()
C\J
"
x
--+---
,-_...... _- .
--;--,,--
---'
. ----t-
._ .___'-'-__ ------i
--I . ._-.
_____ 1-. ,----+--- - - &-
~(
:..
5.
L'
L
(
2
(';/'
,
\,
. ------t
~j
o
.it:
j ---
..
-
--- --
--'----
-
-~---~-
-
--..
_- . ._-----
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. ... 1
---I
. -::::::::=:::-
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.-l
§'
._ . . . -
_
;-.==-~::jj-=-
. ____ :::l ...
_ ... _ _ _
~I:--'i·
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___ . _ 4 _ _
, __
--I
----------1--
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~-
I
---~-.'
.... --- ,
.. :---=::::::-1
11
_..1..-_ _ _ _ _ . _ _ _ _
"l" -.--.--_~-'-·_..._--L~.~
.-i-'--'--- C
i ; ! i :tL
:-:::::'==.=~-.
•..1
I
.
II
i
.
f
~--~--~--~------~----.-~~~==---,-----------~.-.---~
,,,.
.
---- ---,-
,.
. _._.
-~---I--__
._____ 1-__ _
~--:-~ T
-'
i.
:.
1
.-- 1
"-10
1-
.--1
---.--------- -,~-:::
-.
··O::"~
- --,=::-::-.=::::-r-- ...
>-.
-.~-:~
~-N
.:...-:..c..
..:D
tI
-==x
"_1- "'-.-
--:-:- X
~
~. U
ibN
~
X
,
----;-
.
_.L--'-_' •...l
-,-;
-
2.;
w ...
. -~
,
I
:
.
--;I
;-
As can be seen, the further apart the pole and zero (X
~
) the more the amount
of error decreases which is what we did when we made the W pole 100 times the
Wzero.
The improvement is noted in the right hand column.
To obtain minimum peaking in the frequency domain, either K should be
increased or Wz should be lowered from the'values that would occur if we
ignored the cubic.
These are listed in Table 11.2
Table 11.2
X
4
10
16
20
25
Wz nonnal
Wmin peaking
.707
.562
.500
.473
.447
.648
.425
.340
.310
.280
The results of these tables are plotted in Fig. 11.39.
They show the correction
as well as the centroid approach values as a function of X and X·lA./2:,
...
12.37
}
ALL RIGHTS
(
~ESERVED.
PUBLICAT10N INTENDED.
As can be seen, the gain required for best operation is higher than one would
expect using the graphical design approach.
It also makes the Odb crossing further
towards the pole which would reduce the phase margin.
Using the classical approach,
this would spell trouble and would, therefore, be avoided.
The real problem is in
predicting the behavior of the loop when it is third order or above.
It also
presents an easy solution to knoWbprob1ems such as can be achieved with second
order circuits.
To complete the design the Wo ={K was located at 1.23 x 10 5 , therefore,
K = 1.513
X
10 10 for the first solution, Fig. 11.346, then when we modify it for
~
wz = X = 16, we get the new value of K from Fig. 11.39.
(EQl1.110)
(
k
(EQ
-
ks /(~ k~ Kd- Ir.
S
11. 111)
(EQ 11. 112)
_ ), (l1J)1'( -5-:(~(-l
~(l..S ++--r.-L~V7.~f{-('-(-L-5- , \+Jk V
s
I
2..
~: ~ EQ 11. 113)
2-71\.(0"7
.
'\
C,-f..{r.
~
';
~
-
~7'
12.38
ALL RIGHTS RE:SERVED.
PUBLICATION INTENDED.
(EQ 11.114)
•
(EQ 11.115)
• •
-
For a reasonable current, we could 'use an attenuator of say 10:1 so the current
can be raised to 793
we lower the zero and
1i:by~}.
~a
for the higher gain.
h~nce
This we should do anyway because when
the gain, we will require only 7.93
~a
..
{from Wz changes
.
10
We do need to concern ourselves with the bandwidth of the current'
switches at these current levels.
The last item is the voltage swing on the capacitor
for the frequency lock range requirements.
This we cannot do with the ECl interface from the pnase detectors, Fig. 11.40A,
therefore, further voltage translation is required before applying the error pulse,s.
to the current switches.
We require the modification on both phase locked loops
as Fig. 11.40A only allows ± 0.5 v error range and the first circuit required ±
1.25 v, EQ 11.68, and the second required±2.5 v, EQ 11.116.
let us address the
1
problem of the low current.
If we look at the terms for gain, we see C1 +C 2 ·•
we raise C2 to 10- 7 farads instelQof 10- s , we can raise the current.
If
We would'
also need to change the value of R, to relocate the zero back to 6.,25 x 10"
radians, and the pole by changing Cl accordingly to .0066
~F.
12.39'
,1"
\,
v-
t----tVc
(
v-
(9
f!t
I
I
I.
1
.
fl r;. II.
~ciJ.
lI·fJ'-f~z
tfa. 1/.110 -
III
I.fO B
+1
s
7f3...... ··-
6
uP
Q~----~-;-----
osc
tP
v.
fJirt'CT'r:>/(
~~~Vl ~~p
IN1.£~F/u~ ""~PIFtCl4r/oN
'7
P~Ah4""(,
,rANGI!!.
°I I
+
r
fArr
P
I
/·771(
...
-=-
fAIr
T
ftC>- 1I·q.oj)
6T-1'N
::: FAST
v--~-.~---
PIh4JE
JIf~p
LOCK
FII.. T£'~
VP
:"'TT~te
L
CHAN~E
/1f1/f)
PuRiN6
~D~
/((PV(t=P
-CJI'9T'"t9
r
~~ 1111V1.MVJV!
HAfl/Pt../~~
(
-::--1---
,.
'.:I..
~
1::t
...J
"",'
~
~
":)
....~
~
Q
.~
,
Ii:)
~
~
-
...
~
.:t:
\...
~
~
\.L
<;)
~
-
'4
I..r\
~
.....J
\.l
\U
~
IJ>
-+
~
"";-
~
\-...
.
....l
....
~
~
~
:to
...:.
-'
~
....
\t
-.
""
~
~'!I
0:.
t)
v..
j
...
..)
~
't
>
\:I
~
~
~
~
't
~
~
...
10--
..,
:/
'<)
-.J
,
~
The gain
K~I
.
c.
CEQ 11.117)
becomes
kX
~l (. ("
(-"
-z.."""
'1-,,; 'I
-+ 10' 7
.p.:Yz.
7IVO
7)
-
7' f.3
(EQ 11. 118)
Now if KG( were 110 as before, the currents are 7.93ma for the nigh gain, fast
lock up cas£, and
79~3
ua for the low gain, loor which is easier to handle.
have now gone thru a series of comprrimizes in order to
design for a phase locked loop.
and a possible solution.
~ome
We
up with a viable
With each compromize, we pointed out the difficulty
The final design is shown in Fig. ll.40tand were numbered
this way in order to emphasize the development of the design.
We have now discussed three type 2 phase locked loops.
The first using the
filter of Fig. 11.31A, EQ 11.79 as shown in Fig. 11.32 .. The second phase locked
100p'using the filter of Fig. 11.310, EQ 11.42 as detailed in Fig. 11.40A and C.
We then discussed the third order effects and their adjustments if we built a phase
locked loop using the filter of Fig. 11.31B, EQ 11.39 as developed in Fig. 11.40B,
C, and O.
,
(
We might profitably discuss a type 1 loop although its use is limited
due to its phase error due to the difference between the free running frequency and
the input frequency.
This error is easily visualized when we think that with a type
1 there is no intergration of the error.
TJ\f:
error that is stored on the filter
capacitors leaks away, therefore, it must be constantly replenished which requires
a constant phase error to maintain the oscillator on frequency.
12.40
;
.
(
~
'Q
~
~
'-I
"
HI'
~
,
';)
c;)
~
+
i
~.
:S
~
~
-
~
...::>
':>
'"+
':>
(
'",
.......
~
HI'
.
....
~
-
~
\;Ie
~J'
~
(
I
':>
~....
..J
~
~
..J
~
'-I
~
~
~
~
\J
~
'=t
t:)
~
ILl
....
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';" JI.c~~ b~tft" t~""I'tIl:WJ. 'u~ r •. str",}S #1 #Nl!r b~I"4_.1 ~,rI• • tr."c,r••.v
Tlmse codes lila lilly 6e ilI9 PI 0111 Lite I a 111 Gas illJasli 5 snd a pulse Ftli a tel W
..,.tlo l. c-r~"6'~'-'" "",t-I, "ptl"~ '''' ,"C ~_I~.... •
'
1,111 I111 I ]
f
E
Be. This was a1ternatly inverted for each one bit for
. . " en.,..,
our industry and became known as NRZI.
All of the data for drum memories, tape, and disc files used NRZI codes
for many years.
The data was assigned its position value by using clock tracks
recorded on the tape or dlsc as a separate channel.
When the tape skew or
disc-head arm circumferential vibration increased such that it was no longer
possible to correctly clock the data, it became necessary to clock witn self
clocking codes.
In Fig. 12.1 we 'illustrate the RZ code
I~I=m~-j:e::==t!!:e:m:::£:Em:!='ela!:i!a3';t!3'ie's·1~'E:5E5:E!!:jmmt=eeli~S) •
i1i
for the same data pattern.
(.:i;tm!D:p~JEsI!E!!!:I:e~13'!!2!ee'3:I~"=-
In Fig. 12 •2 we show NRZ I
Also included is a typical read linear waveform.
A variation of the NRZI is the inclusion of a ninth bit for byte identity
which was subsequently used in the 2305 drum file to make the code "self
clocking." This is shown in Fig. 12.3.
The self clocking codes were essentially Frequency Modulation codes.
More correctly Pulse Position Modulation that used only two pOSitions.
four codes were subdivided into several types.
(
of always
~/riting
The
The first, F.M., consisted
a clock transition at the bit cell boundary then if the data
13. I
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requires it I a transition at the cell center for a one bit.
Thus, there were
twice as many transitions for an all one pattern as there were for NRZI, but
it was 'self clocking.
Because of this density increase, the early machine
that used this code operated in Region 3 of the B.P.I. curve.
a typical pattern.
Fig. 12.4 shows
In Fig. 12.5, we show the PM or Phase Modulation code.
It
..,
also required the same density as FM, but it differed in that they recorded
the zero bits as well.
The direction of the read
rlt-4I11!,T,-",
~ac~pulse
O~
was always of
the same polarity for a one bit and the opposite for a zero bit.
In the
event two bits of the same value followed together, the code required that a
middle transition be recorded to return the flux phase such that the second
bit could be recorded in its proper direction.
It is easily seen that now
we have clock bits added that can have either polarity.
These extra
transitions occur at the cell boundary and therefore, require the same clock
(
decoding as FM codes and. hence, the same r'ecording dens.ity increase.
It was
then determined that there were other self clocking codes that could be
develoRed that only required the standa·rd one ·for (lne density.
these were the.Modified FM codes.
The first of
These were first invented by Mr. W. Pouliart
et al in 1954 and subsequently reinvented in a slightly different form by
Mr. A. Miller, Mr. W. Woo, and aga·in by Mr. Jacoby.
The basic code is shown in Fig. 12.6 wherein a set of rules were
established for writing.
The·first rule was:
All data bit ones are recorded.
The second was that a clock transition will be written at the cell boundary
only if there was a data zero in the preceding and following data cell.
This latter requirement is mixed up in .some subsequent literature.
variation of the MFM code is the M2FM and there are several of them.
the following set of rules.
Write all data ones.
A
One has
Second--.write a clock
transition at the cell boundary only if there are two cells containing zeros
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benefit to this that is not as
Back-with the FM code it can be seen that for a data stream containing
ones and zeros when encoded, the 'one' bits are always bounded by clock bits
and will, therefore, have some symmetrical interference which results in small
peak position shift.
The clock transitions on the other hand have no such
syrrmetry and will therefore exhibit severe bit shift especialy in Region 3.
This fact was taken advantage of in early machines by using an unsymmetrical
window, 40% for the data ones, which are shifted least, and 60% tor clocks,
which are shifted most, Fig. 12.8.
Now with M2FM, a similar condition occurs.
The data, which is always written, has the' highest derysity, therefore, will be
shifted most.
two
The clock
transitions~
however, are always spaced a mimimum of
cell timefaway from its neigh-bor, therefore, suffers the least shift.
Therefore, a window of 60% or thereabouts, Fig. 12.9, is assigned to the data
(
ones and a 40% window assigned to the clock.
This is a real advantage and
similar codes are presently used in the floppy disc "market.
The next codes are the group codes or substitution codes so named
because a group of input is encoded into a differing group for recording.
During Read, the process is reversed.
There is a huge variety of these codes.
The first assembly of order into the growing literature on these codes came
with an article by A.' Patel in the IBM Journal, July 1975, page 366, and
quoted in Computer Design, August 1976, page 85.
Here Mr. Patel introduced
a symbology that can be used to describe all codes, although not uniquely.
The input data may be introduced as either one bit at a time or may, depending
on the code, be in groups.
The number of input bits in the group is m, and
may range from one to m bits.
which the
(
n~mber
The second part is the number of cells in
of input bits may be assigned values.
designated as n, and may range from one to n.
This number is
These two numbers are expressed
ALL
RIG~lS ~~S~RVED.
PJBlICA110N INi[NJLO.
as a fraction, thus, two input bits may be assigned into four cell positions
and will, therefore, be designated
(EQ 12.
V
The remaining code designations refer to the minimum and maximum run length of
zeros.
The minimum number of zeros is designated as d, and the maximum number
of zeros is k, thus any code can be described
(EQ 12.~
To see how we use this designation, let us try it on several of the codes we
have previously introduced.
Our NRZI code can be written
where m=l, n=l meaning that for every input bit there is a unique cell assigned.
d is zero meaning that each cell can have a one bit, and
. all zero record can be written ,without any
tUfIJlt'DI'IS.
k=~ indicate~
that an
The code similar
to NRZI where a ninth sync bit is added for every eight bits Can be written
~ (d,k)
= f-(O,8)
(EQ 12.4)
which would be easier to handle thru the amplifiers.
The FM code would be
~ (d,k) = ~ (0,1)
(EQ 12.5)
meaning that there are two cell' positions for every input data.
Each cell can
be filled and only one cell in a row may be left zero.
The PM code is designated the same.
For this reason we still need
further description to identify, any particular code.
nm (d,k)
l (1,3)
'
=.2
The MFM code is written
(
EQ 12.6 )
where any bit is associated with two cell positions,' one of which must be left
...
~~L
RIG~T5
zero with no more than three cells in a row left zero.
~
PUBLICATION INTENDED.
~ESEoVED.
The version of M2FM
described earlier can be written
~ {d,k} =
t (1,7)
EQ 12.7
The ~ and d are the same as in EQ 12.6, but the k=7 comes from the sequence
lcOcO,Oc}
There are
designed to
sev~ral
~inimize
advantages for using codes.
Some, as was Mr. A. Patel's,
the dc content of the code in order to write thTu a
transformer of a rotating head system.
Others are designed to maximize the
amount of data stored for a given transition density or to ensure readabil ity
such as self clocking codes.
Another distinct difference in codes may be the rule by which they were
written although observing the recorded waveform it would be impossible to
tell them apart.
For example, the FM code can be designated as the following.
Write all input ones at the cell boundary and write all clocks mid cell.
(
The second may be
written~
Write all input ones at the cell center and
write all clocks at the cell boundary.
Unless the observer knew the phase of
the writing circuits, he could not tell them apart, yet they are ·distinct and
different.
For MFM there are eight separate enc{)ding rul es that produce the same
recorded result.
It is interesting to note that three of them have been
patented and a fourth cannot as it is now in the public domain.
1)
They· are:
Write all one bits at the cell center, write a clock bit at the leading
boundary of the cell if preceded and: followed by a zero.
2)
Write all one
.bits at the cell center, suppress all clock bits at the leading boundary
of a cell except those preceded and followed by a zero.
3)
Write all one
bits at the leading boundary of a cell, write a clock bit at the cell center
(
if preceded and followed by a zero.
4)
Write all one bits at the leading
I;· S-
ALL RIGH1S
~ESERVrD.
PUbLICATIO~
INTENDED.
boundary of a cell, suppress all clock bits at the cell center eycept those
preceded and followed by a zero, and so on as the boundary is changed to the'
trailing boundary instead of the leading boundary.
The group codes differ in that they are substitution codes with sometimes
verye1abor'aterules as to run length.
The most familiar of these is the GCR
code, or Group Coded Recording, used in the tape industry
~ (d,k) =
t (0,2)
EQ 12.8
The code conversion is listed in Table 12.1 below
TABLE 12.1 GCR CODE
Data Value
Recorded
0000
11001
0001
11011
0010
1001 0
0011
10011
0100
11101
CJ10l .
10101
0110
10110
0111
10111
1000
11010
1001 '
. Ol 001
1010 .
01010
1011
Ol 011
1100
11110
1101
01101
1110
01110
1111
O1lll
should introduce a third'measure for a code.
This is the Density Ratio
.-'
where,
"."
_ Data Density
_'T min
Dr - Maxtransition Density - T,
= m (d
n
+ 1)
EQ 12.9
r the codes we have introduced. we can tabulate the various parameters for
'mparison.
\BLE
::.2
(see table 12.2)
Code
m
n
d
k
Dr
NRZI
1
1
0
co
1
FM
1
2
0
1
0.5
,
m
n
-wIN,,_
1
.5
,
PM
1
2
0
1
0.5
.5
MFM
1
2
1
3
1
.5
GCR
4
5
0
2
0.8
.8
3PM
3
6
2
11
1.5
.5
2/3(1,7)
2
3
1
7
1.333
.6666
1/2(2,7)
2
4
2
7
1.5
.5
Now one of the purposes of using codes is to inc,rease the information content
for the same number of transitions. ' As can be seen in Table
12.~,
Dr, the
density ratio is one or less for the first five codes listed. 'Mr. G. Jacoby
,
'
published a code in 1977 that allows an increase of 50% or a Dr of 1.5.
called it 3PM.
It limited the minimum number of zeros to two in order to
reduce the transition density.
for a three bit data input.
zer~,
He
With this code, he substituted a 6 cell "word"
Keeping the restriction
a.
of"mAI"rfU.~
number of
created a number of inconsistencies that occur as data are preceded or
followed by certain patterns that would violate the rule of a two zero
These he solved with alternate
patterns~
mA~I~U~
The listing is given in Table 12.3
1)·7
)
i '
: .... '. ~, 1
as taken from his paper.
TABLE 12.3
Input
3PM CODE
Adjacent Word Influence
Preceding
Following
pi
Output
PI P2 P3 P4 Ps P6
•
000
X
0
0
·0 0 0 0 1 0
000
X
t
O·
0 0 0 0 0 1
001
X
X
0
0 0 0 1 0 0
010
X
X
0
0 1 0 0 0 0
OJ 1
X
0
0
0 1 0 O· 1 0
011
X
:;
0
0 1 0 0 0 1
100
X
X
0
0 0 1 0 0 0
101
0
X
0
1 0 0 0 0 0
101
1-
X
1
0 0 0 0 0 0
110
0
0
O'
1 0 0 0 1 0
110 .
f.
0
1
·0 0 0 0 1 0
0
1 0 0 0 0 1
. 11 0
0
,.
110
-t
1-
1
0 0 0 0 0 1
111
0
X
0
1
111
+
X
1
0 0 0 1 0 0
0 0
~
0 0
where t=inf1uence, O=no influence, X=don't care, and P~ is the previous
~ord's
P6 as altered for this word.
For a further explanation, see the
paper entitled "A New Look Ahead Code for Increased Data Density" GV Jacoby.
IEEE Sept Proceedings on Magnetics 1977, vol 13, No 5, P 1202.
Another
code that is useful is designated as (Newman, Fisher)
~ (d,K)
=
f (1,7)
EQ 12.10
'a.
which allows an increase of one-third in density, Dr
substitution code with
would alter the minimum
chang~depending
rMn
length.
=
1.3333.
Again it is a
on adjacent word interference that
The changes are implemented by accepting
four input bits at a time instead of the usual two bits and encoding them
uniquely
TABLE 12.4
I
I,
CODE
DATA
NOW
FUTURE
NOW
FUTURE
,
00
00
001
XXX
00
01
001
XXX
00
10
001
000
double group
00
11
010
000
double group
01
00
010
XXX
01
01
010
XXX
·01
10
010
XXX
01
11
010
XXX
10
00
100
XXX
10
01
100
XXX
10
10
100
XXX
10
11
100
XXX
11
00
101
XXX
11
01
101
XXX
11
10
000
100
double group
11
11
101
000
double group
2/3 (1,7) code
(X = don't care)
)
.'
ALL
PUBLICATION INTENDED.
~lG4TS RESE~VED.
The first IBM disc drive to use a group code was the 3370.
This code is
designated as
~ (d.k) = } (2.7)
The code compression Dr = ~
EQ 12.11
= 1.5.fo
utilize the code. input data may be
accepted 2. 3. or 4 bits at a time depending on the content.
All possible
combinations can be made up from those listed in Table 12.5.
This code is
attributed to Mr. Franazek of IBM.
TABLE 12.5
DATA
CODE
AB
AS
10
01
00
010
10
01
00
0010 .
00
10
.01
11
10
00
011
00
10
00
0011
00
00
10
000
00
01
00
AB
AB
00
00
1/2 (2,7) code
As there are so many codes possible of both the block and the merging types,
we will not cover the remainder, but will simply give some equations that when
solved will describe some of them.
These equations were described by Dr.
T. Campbell.
The number of code words, Cw (n ,d), is given by
= Rmch, (n-di)!
Cw (n,d)
L i! (n-(d+l)i)!
i=l
EQ 12.12
n
where Rmax S d+l
f3,
·/0
also
m ~ 10g 2 {cw(n,d)
EQ 12.13
for conventional Block codes.
When merging is allowed, as with the 3PMcodes, the
following is given for cases where d > 2
(n-d-dj) !
Cw' (n ,d) = rR'
j! (n-d-(d+l)j)!
j=O
EQ 12. 14
n-d
where R' <- -d+l
'
PRECOMPENSATION
We first introduced this subject block in Chapter 5.
Basicly it consists
of deliberatly writing a transition such that the resultant movement of the
peak due to superposition or pulse interference will move the peak back to its
lon time/position.
trdnsition is
Thus, if pulse interference makes a pulse peak late that
deli~eratly
written early such that the resultant peak shift
p'lces the peak at its true unshifted position.
It has been shown that the
worst peak shift occurs for two adjacent transitions with no transitions on
either side.
If we wrotetwCl transitionsT seconds apart and we measured the
time between the two resultant peaks as 1·2 T, then the peak shift of each
transition is O.lT.
In order to correctly write the two transitions, the first
has to be written late by greater than O'lT and the second has to be written
early by greater than O·lT.
This is because 'when the early and late transitions
are written at .8333T, the pulses are closer together and their pulse interference
produces a peak timing of greater than T.
The process is an itterative one and
is best calculated using about 10% greater shift than predicted for the plus
and minus Precompensation, then recalculate the predicted peak seperation.
left this subject to this chapter
becau~e
We
we now have an understanding of the
clocking effects of the window allowed and the need to minimi2e the movement of
a pulse so as to keeD it in its assigned window." Further, the implementation
}
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~
PATA
,(..4),"
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-- -
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PUBLlCATION INTENDED .
.
"
.
is best incorporated in the encoder circuit11j • See Fig. 12.10 and 12.11.
Sometimes, a particular code cannot be optimized. for peak shift with only a
single value of plus and minus Precompensation.
Certain patterns may produce
a lessor amount of peak shift that would be overcompensated if the single
value were used.
th~
It is therefore. necessary to install a multi level Pre-
compensation derending on the signal degradation and the degree of window
margin allowed.
se
This is calculated the same way as before using the new peak
paration values.
CIRCUITS
We might profitably consider a few encoding circuits recognizing that the
decode is just the opposite.
NRZI
The NRZI encoders are trivial being only single 'and ' gate as shown in .
Fig. 12.12.
bit, hence
Driving the reguired FF to produce the current reversals for each
then~ed
to arid the write clock to produce RZ code'first.
I
I
The
decode is shown in Fig. 11.45B of the previous chapter.
FREQUENCY MODULATION
To encode NRZ data into FM for writing requfres the use of a phase switch
as well as the write clock to produce the write current reversals.
write all clocks, C:and write all,li.
The rule is.
The decoder is the same as Fig. 11.44.
To add Precompensation requires a memory shift register in order to look ahead
and behind the data being written.
We can write a truth table to indicate the
shift direction, but as the previous transition and the following transition
will always be a clock bit; the data will be bounded and will not shift.
The
clocks, however, will shift, therefore, our table is simple.
l
I")·/t)
- - - - -- - - - - - - .
r--f) Q
r--
r--
p
c..B
t"'-
I}
,R
a
---
0 fL.--
(,
--
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~
I
c. c._
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,
G
~(.T } -
c.
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PILAy
t
(.or
:::J
,...
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.,
LPQ
RY.T
-
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F,1'1
: c"
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IC.~
•
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c:.
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Q
)-
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f. M.
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t
f
c
C W(OO£.Il
'VITH
0
c
0
t
f
t
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r
ALL RIGHTS RESERVED.
PUBLICATION INTENDED.
TASLE 12.6
FUTURE
NOW
A
Early
B
C
1
1
Late
Clock on Time
-->
<
1
C
0
Clock Early
0
C
1
Clock Late
0
C
0
Clock on Time
Clock Early
= A·S
= A·S
Clock Late
=
Clock on time
This is implemented in Fig. 12.14.
+ A·S
EQ 12. 15
A·S
Note that the and gates must have the same
propogation delay or unwanted shift will alter the data timing.
The data
bit A is written first on time followed by the clock bit, then the
re~Jister
shifts
and repeats.
PHASE MODULATION
Implementing straight Phase Modulation requires truth tables in order to
anticipate the
polarity.
table 12.7.
p~d,ereversals
required for the clock bit which can have either
This can be implemented with a J.K.-F.F.
Refer to Fig. 12.15 'and
The sequence is shift-data-c1ock-shift.
Q,
EQ 12,. 16
If
EQ 12.17
TABLE 12.7
,
t"
,
I'"
L",:",J
NOW
PAST
1D1
1D2
0
0
0
0
,
IF
J
K
O·
1
0
1
0
1
...,.
""'-.~
\.A!
r
'. ·1
..
-
0
1
0
0
0
0
1
1
0
1
1
0
0
0
0
1
0
1
1
0
1
1
0
0
1
1
1
1
1
0
no
change
It'"
change
= Q1 IF + Q1Q21F
K = Q1Q
21F + Q
1 IF
J
All this can be implemented as shown in Fig. 12.16 .. The decode of phase
VJIlS
modulation
a
/' sl ightly different detector than we have used in the past.
\
.
Depending on the resolution;where we do not need a gate generator, the circuit
used for a split Bi Directional Single Sho.t will suffice directly out of the
differentiated and limited signal.
If a gate generator is used, then the split
Bi Directional Single Shot is the last block.
(+
The phasing must be compatable
= 1) because the zeros are realy superfluous; we could ignore them and just
use the ones or we could use them and repeat the circuitry.
Lets do the
later as an exercise.· To provide Precompensation for P.M., v.e again need a truth
table only this time we need to look at four levels to anticipate the peak
shift.· The sequence is shift-data-clock-shift.
I 'oly.
-- ------------------
ALL RIGHTS RESERVED.
PUBLICATION INTENDED.
fA8lE 12.8
PAST
NOW
A
.8
0
0
0
0
0
0
0
0
0
1
0
CLOCK
.
FUTURE
C
1F
0
0
+ Cot, J
0
1
Zot K
1
0
no change
1
1
Z early K
0
0
no change
1
0
1
Dot J
0
1
1
0
-Cot K
0
1
1
1
D late J
1
0
0
0
+Cot J
1
0
0
1
Z late K
1
0
1
0
no change
1
0
1
1
Z ot K
1
1
0
0
no change
1
1
0
1
Dearly J
1
1
1'
0
-C ot K
1
1
1.
1
D ot J
'+"
.-
< .•
J
0
0
+
o .
0
- - IF + ABC
- IF
= ABC IF + ABC
---
+
+ ABC IF + ABC IF + A 8 C IF
K = ABC IF + ABC IF + ABC IF +
- IF + ABC IF
+ A B'C IF + ABC
;
. EQ 12.18
EQ 12.19
..
+'",
~ ,,'
((6 IZ"7A
(..'1'1. P.tTA
ft6 12 '178
(
... 0111£]
+ «.Dua=---.-"':-~-------------t
c~u
...
+
h4TA
fP
~ ~147A
IN/Nfl.
2~S
{;1(7t.
- _.I
,
(
(( ...."-r
... ((.<7(1(
Ff6- I l '
/3
t_
P
"
Q
P
..;:
NIC2.
(....
Q
- - --.
pArA
CI
PE~O/)f,~
~
)
1
ALL RIGHTS RESERVED.
O.T.
PUBLICATION INTENDED.
ABC 1F + ABC IF + ABC IF +
=
+ ABC IF + ABC IF + ABC IF +
r.
EQ 12.20
+ ABC IF + ABC IF
E
= ABC IF
+ ABC IF
EQ 12.21
l
- IF
= ABC
+ ABC IF
EQ 12.22
A
A
~
&
J
=
1
1 1 1
1
IF
1 1
K=
1 1
~
OT=
IF
1
1 1 1 1
1
1
1
~
J
1
1
f-
E=
1
f
1
L=
1
1
1
c
The decode of these Veich diagrams is as follows·
J : B·1F + B C 1F
-
K = B'lF + Be 1F
B C IF + A C 1F + A e 1F + B e 1F
Dn Time
=
Early
ABe IF + ABe 1F
Late
=
=
-
ABe 1F + ABC 1F
The implementation is shown in Fig. 12.19.
EQ 12.23
EQ 12.24
EO 12.25
EQ 12.26
EQ 12.27
Great care should be used to
control the logic delays in the clock paths to prevent timing problems.
1,)"1(,
)
IF
.
,
i
~
f
UTt CtDcI{
PP.1I/1IC 1
r-+---iK
iF
-~_",
JI
C
IF --,..,_ _
i---r-:--.....
(---I
Q-
I
,
tit
ALL RIGHTS RESERVED.
PUBLICATION INTENDED.
F.M.
With this code we need to know the past and future data, therefore, we
~ed
. I
.,,:t· .
a three level truth table.
~
Il,BLE 12.9
'. I
PAST rCLOCK
A V B
NOW
o
o
o
o
-
o
o
o
clock
= ABC
1
clock
i::
1
o
data
= ABC
1
data
1
o
o
1
o
1
1
1
o
1
1
1
SERE
CLOCK =
.
•
,
The decode is clocks
FUTURE
C
'A
.
C
1
= A B,
-
ABC
= ABC
data = ABC
data
A
.
.
,
CiIiliIiJ
DATA=~
1
1
I
"
C
data·: B.
Therefore, we can delete the CFF
()r "future" and deal only with the past and present.
clock, data, shift.
.=
ABC
The sequence is shift,
The implementation 1JS given in Fig. 12.20.
Note that
the set up and timing paths prevent unequal logic delays from hurting bit
timing.
To add precompensation, we require a four level truth table (Table
12.10).
We will shift-data-clock-shift.
I
FI6-
IZ 'ZO
M. F.1'1
C-NCOPE/(,
"~---f
Q..
w~,r(
C£ocl(
-~---t(. tF
J
c
0.
I
a1 4 - - 1/
C
:;
,
p
-
c
6
if
FIG
{2 • 21
ALL RIGHTS RESERVED.
PUBLICATION INTENDED.
TABLE 12.10
PAST
A
...
l
NOW
B
FUTURE
r'C~~C~
D
0
a
clock aT
0
1
1
clock early
0
1
0
2
0
0
1
1
3
-
0
1
0
0
4
data aT
0
1
0
1
5 '
data aT
0
1
1
0
6
data late
0
1
1
1
7
data late
1
0
•
0
a
8
clock late
1
0
•
0
1
9
clock aT
1
a
1
0
10
1
0
1
1
11
1
1
0
a
12
data early
1
1
0
1
13
data early
1
1
1
0
14
data aT
1
1
1
1
15
data' aT
0
•
0
•
0
O· '.•
0
•
0
•
•
•
•
-
-- - - -
clock OT = ABC D + ABC D = 0 +9
EQ 12.28
clock early = ABC D = 1
EQ 12.29
clock late
data OT
=
=
ABC D + ABC D + ABC D + ABC D = 4+5+14+15
data early
data late
ABC D = 8
=
=
ABC- -D + ABC- D = 12 +13
ABC
D + ABC D = 6 + 7
EQ 12.30
EQ 12.31
EQ 12.32
EQ 12.33
ALL RIGH7S
PUBLICATION INTENDED.
~ESERVED.
I
;,/'.
that is a lot of logic. therefore. we 'could do an intermediate step that
addresses only on time. early. and 'late with a gate for data or clocks.
becomes B and clocks
= ABC 5 +,A
On time is
- - - D.. + ABC
= ABC
Early
Late
BC.
therefore. the enable is B-,f + [j.fF
BCD + ABC D +
ABC
D + ABC 0 + ABC D
D + ABC D
EQ 12.34
EQ 12.35
-
= ABC
Data
0 + ABC 0 + ABC D
EQ 12.36
1/
, ,
I
B
OT
=
,
I
$
Early =
f
,
I
Late
ID
I
c
c
.
(}.
I
,
Enable
I
I
,
r
'I
I
I
,
C
z' 2"
0
1
0
0
0
p
1
1
I
I
I
=
I
A
,
J
Late
Early
On Time
1
TABLE 12.11
c
This is still a lot of decode.
such as 1
2°
2'
= late
= early
= late,
2
= early,
We could assign a two level state to each
and 3
= on
+ on time
+ on time
II
I
,
time.
(
t
t I
I
j
p
I
2' = l
I
t
I
c..
,
,
t
I
I
I
,
,
ALL -RIGHTS RESERVED.
2°
= BC
-
+ AB + ABC + ACD
PUBLICATION INTENDED.
EQ 12.37
f.
21
= AB
-
+ CD + AC
which is much easier.
,
EQ 12.38
This can be implemented with a four line multiplexer.
13-20
We might profitably study
As can be imagined,
five level Precompensation.
the decode is a little more difficult.
We will base the decode on two levels
t!. 'E'~ and a
of early and late.
A 0110 pattern gives the greatest peak shift
01110 lessor L, E.
We will again follow the shift-data-c10ck-shift sequence.
TABLE 12 .12
ctpc~
Future
Now
early Past
CLc:t"
E
A B C 0
t
A B 'c 0 E
t!-
0
0
0
0
C
OT 7
1 0 0 0 0
0
0
0
C
1
C'
E 1
1 0 0 0 1
0
0
0
1
[1
-
1 0 0 1 0
-
0
0
0
1
1
-
1
1 1
-
0
0
1
0
0
0
OT 7
1 0 1 0 0
0
0
1
0
1
0
OT 7
1 0 1 0 1
0 OT
0
0
1
'J
0
0
L2 6
1 0 1 1 0
0
L2 6
0
0
1
1
1
0
L
2
1
0 1 1 1
0
L
0
1
0
0
0
C
L
2
1
1
0
1
0
0
1
C, OT 7
0
1
0
1
0
-
0
1
0
1
1
-
0
1
1
0
0
0
0
1-
1
0
1
0
1
1
1
0
1
1 l' 1
, '
,
C ·OT 7
C E2 3
O
clock
0
0
0 0 0'
OT 7
,0
7
2
C l
2
1 1 0 0 1
C OT
7
1 1 0 1 0
-
,1
.-
1 0 1 1
1 1 1 0 0
0
E
1
D
E2 3
E2 3
1 1 1 0 l
0
E
1
0
D
OT 7
1
1 1 0
0
OT 7
1
n
OT 7
1 1 1 J 1
0
OT 7
1
l'
t"tDt.1(
The number conversion idea will help reduce the 10gic~ therefore," we will make
a new table. 12.13.
-----,
ALL RIGHTS
~.
RESERV~D.
PUELIChTION IN1lhDED.
13
.
.'.-.".,
"
.
Early
Late
.I
.1
Early2
I
On Time
,
n write the boolian equation for each condition
~BCDE +
ABCDE
+
ASCDE
+ AB~OE +
~SCOt +
ABCDE
~
ABCDE
+
ABCOE
+
ABCOt
+
ABCOE
ABCOE = 11~
ABCOE + ABCOE = 110
+ AS~Ot +
,I
EQ 12.38
EQ12.39',
1
.
ABCD£ + ABCDE + ABE5E = 011
ASCOE
+
ABCOt
+
ASCOE
= ASCOE + ABCOt + ABCDE
+
ABCOt = 010
= 001
EQ 12.41
EQ 12.42
,w we can write the equations for the bits as a function of powers of 2.
:l
I
2
=7
=7
=7
+ 3 +1
+ 6 + 3 + 2
+ 6
EQ 12.43
'1~·z2.
,
1
1
ALL RIGHTS
RESE~VEr.
PUBLICATION INTENDED.
The Veich Diagrams are as follows:
A
2
0
= E·
A
1
1
1
1
1 . 1
...
r
1.
1
D
+
E·
1
B
21
1
1
1
1
c
1
1
1
1
1
1
B
1
D
1 .
1
+ E·
1
1
1
1
1
1
=
B
E·
1
1
1
1
D
A
B
2
1
C
A
-
o
1
1
C
2
(
1
A
1
= E.
1
1 . 1 ..
1
A
1
+ E·
1
1
1
1
1
1
1
1
1
D
1
1
C
C
The boolian reduction of these are given below
20 = r(BC + ~6) +E{6 + BC) = BC + ~~6 + E6
21
22
= E(CD + BC + AC + CD) + E(CD + AC + As6 + BCD)
-= ECD + -EBC + AC + CD + EABD + EBCD
= E(BO + CD) + E(SCD + BCD
=
BCD)
EBD + ECD + ESCD + EBCD + EBCn
+
Enabl e =/FC + BDlf
EQ 12.44
EQ 12.45
EQ 12.46
EQ 12.47
These three inputs can be fed into a multiplexer together with the appropriate
delayed 2F clock pulses as shown in Fig. 12.22.
1'3 . l 3
~----~p
,p
g
Q~----~P
c.c
a~----~~
~
~
<.A
[
,.
&
c
E
i
§
P
0
f
L
I
C
)
.,..
P
s-
I
"
D
7
(.
A"z'"
i'
, ~l'
c. -z L
'c.
e
P
f
J
~
i
f
i
J
if
•
P
c
c
~=c>
If
i
,c
e
c.
i
;
12- Z-z..'
M.r: M
e N(c9[)E,R.
.P
1
~ 1-4--.,.~ ""If'~
'~IV~.(S
ALL RIGHTS RESERVED.
PUBLICATION INTENDED.
Timing considerations may require the four input gates to be clocked into a
register before application to the multiplexer.
As the enable conditions are
;
unique or in other words require separate clock and date pulses. the phasing
i
r
must be considered and is shown included.
We will next discuss the implementation of .one of the group codes.
As
there are several ways of doing this. we will discuss the full logic approach
.
as it is the most complex.
micro processors.
The other approaches use memory look-up tables and
These will be left to the designers as they are much easier
to implement. We will choose a 2/3 (1,7) code as one example.
The nature of
this code requires two input data bits to be encoded into three cells.
the
.conditions are satisfied by developing a table of assigned values.
TABLE 12.13
·00 = 001
(
.01 = 010
10
=
100
11
= 101
Now we can easily see that if we had a sequence 0010 we would write 001100
which violates the requirement of one zero between transitions, 2/3 (i,7),
therefore, we must make a new table that assigns an alternate 000 symbol to
be substituted where necessary.
if the
ne~t
two bits require it.
This alternate symbol can be called into use
When making the table, the time sequence
of the bits and the code must be kept in mind as the following implementation
requires correct sequencing.
I
~.2y
ALL RIGHTS RESERVED.
PUBLICATION INTENDED.
TABLE 12.14
.
..
"
WRITTEN
time -iI-
ENCODED TRANSITIONS
INPUT DATA
time~
time~
SUBSTITUTI ONS
NOW
NEXT
NOW
NEXT
00
00
001
001
001
00
01
001
010
001
00
-10
001
100
001000
001 000
00
11
001
101
010000
01 0000
01
00
010
001
010
01
01
010
010
010
01
10
010
100
010
01
11
010
101
010
10
00
100
001
100
10
01
100
010
100
10
10
100
100
100
10
11
100
101
11
00
101
001
11
01
101
010
11
10
101
100
000100
000100
11
11
101
101
101000
101000
' .
100
101
101
,
Now if we examin the substituted code, we see that the widest spacing between
transitions is for the data sequence 0011,1110 which is written as 010000000100
which gives 7 zeros in a row maximum, hence, 7 in the code description 2/3 (1,7).
When the code is implemented, the upcomming data is examined to see if a
substitution is required.
If so, then all four input bits are taken and written
I) ·Z'>
All RIGHTS RESERVED.
Cell 1 =
A~ +
PUBLICATION INTENDED.
AD + AS
.
,
Cell 2 = .AB + ACD
--Cell 3 = ABC + ABD + ABD + ABC
~
EQ 12.52
~
Cell 4 = BD
Cell 5= Cell 6 = 0
..
The conditions for taking four input bits instead of twq are given in
EQ 12.53.
Four
= ABCD
-
+ ABCD + ABCD + ABCD
EQ 12.53
A
1
B
Four
1
=
D
= ABC
+
ABC
EQ 12.54
1
1
C
This can be fed into a down counter set lines to generate an overflow pulse
that occurs every 2 or 4 bits (Set 1 or Set 3).
The overflow pulse can
load a six bit shift register for the output cell infonnation.' The NRZ to
RZ encoder is added at the output of the 6 bit shift register followed by
the write current reversal FF.
The entire implementation is shown in Fig.
12.23. The Read Decoder is implemented following the NRZ output of the Read
Detector.
If we refer to Table 12.15,
the data.
We will write it in Octal to save space.
A = 1 + 5 + 1.0
~~
can write the equations for decoding
EQ 12.55
-
...
ALL RIGHTS RESERVED.
Cell 1
= ABeD
+
PUBLIChTION INTENDED.
ABeD + ABCD + ABCD + ABeD + ABeD + ABCD
EQ 12.48
Cell 2 = ABCD + A8~D + ABCD + ABCD + ABCD
-- -
EQ 12.49
-
Cell 3 = ABCD + ABCD + ABCD + ABCD + ABCD + ABCD
EQ 12.50
Cell 4 = ABCD + (ABCD + ABCD + ABCD + ABCD + ABCD + ABCD + ABCD + lIt;lp +
+
EQ 12.51
ABCD + ABCD + ABGD + ABED)
of which the bracketed tenns are redundant since that part is written separately
as transition 1 of the next pair of input bits.
A
B
.1
=
1
1
1
1
A
1 1
1 1
1
B
o
1
1
1
2 =.
,
C
,
3
=
o
C
A
1
1
B
1
4
1
1
1
=
X
1
X
X
X
X
X
C
X
X
X
X p
X
X
from which \'Ie can reduce the conditions to the following
f.,LL RIGhi$ RESERVED.
PUBLICATION INTHIDED.
as 'siX cells, if not, then only two bits are taken and the three cells written.
Since the implementation
will be done with shift registers, it might be
profitable to rewrite the table in shift register form.
(
•
This is given in Table
12. 15.
i (1,7)
TABLE 12.15
Code in Shift Reg. Form
BINARY
OCTAL
INPUT DATA
WRITTEN CODE
oC
BA
654
321
o0
XXX
100
o0
4
XXX
100
2 0
4
000
100
1 0
1 1
o0
o0
o0
o0
000
010
3 0
o4
o2
o0
1 0
XXX
010
o2
2
1 0
1 0
XXX
010
2 2
2
o1
1 0
XXX
010
1 2
2
11
10
XXX
010
3.2
2
o0
XXX
001
o1
1
XXX
001
2 1
1
XXX
001
1 1
1
1 1
o1
o1
o1
o1
XXX
001
3 1
1
o0
1 1
XXX
101
o3
5
1 0
11
XXX
101
2 3
5
o1
1 1
001
000
1 3
1 0
1 1
1 1
000
101
3 3
o5
1 0
o1
1 0
o1
INPUT DATA
WRITTEN CODE
~.
. J
l
NP.'Z-
PAT'/1
(,
PQ
p Q
c..P
c. C
a
a
~
Z CL ."c
~I----f--"
Q~I---
Til> ",/tIft
Pt"';~
A
&
'A"
"f,I""
'T,(
tic.
Q,
i
(
~
r(6-
Mw ~tAj PATA
t24
Q/J
I
N'V~.
12· 2 J
P
----Ie.
,
1
PECV,PEIl-
o. z.,
l
o. "t t--+-t
(). )"
1.0
REAP
ALL RIGHTS RESERVED.
PUBLICATION INTENDED.
B = 2 + 5 + 1.0 with (0.2 suppression)
EQ 12.56
i
(
C = 0.4 + 0.2 + 2 + 1 + 1.0 + 0.5
EO 12.57
D =4 +
EQ ,12.58
0~2
+ 2 + 1 + 5 + 0.5
')
'"
but since C and D are replaced in all except the double combinations, then
we are free to ignor them or as redundant bits to reduce the logic.
C = 0.4 + 0.2 + 1.0 + 0.5
EQ 12.59
D = 0.2 + 0.5
EQ 12.60
Again, the 2 or 4 bit grouping is controlled by C or D which can activate the
"B" bit of a down counter as before as we can keep irack of
th~
output decode.
See Fig. 12.24. The (Iecode its.e1f is easily implemented by using two 3 line
decoders as in Fig. 12.25.
The preceding logic .imp1ementation shows one way of generating the
encoding or decoding logic.
The method
~s
straight" forward and should be
applicable for the run length limited codes regardless of the number of
substitutions or conditions.
In
this code we had 2 levels meaning we had our
information in either two or four bit byte.
Therefore, Wwas either ~ or : .
As a contrast, the ~ (2,7) code presently used in the IBM 3370 is a three
. m 123
level code meanlng = 2' 4' or 6 .
n
The nert consideration is the format or the preamble to the data.
Notice
that the decode on Read Back depends on the phase of the clocking circuits.
it is imperitive that only one of the 3 phases be used.
This can be controlled
12.73
n- 2 f
A
l
A
c
1
J
J
'-
z.
A.. ,
~ "P/,,,,, T;(
B
(
)
If
A
s-
"
?
JHIFr
B
Q'f
A
(I
Q S"
&
t
b
(,
)
Q
To
PUT'..,r
IlE'lJrEIt
(
(.
Of
S"
•7
F(6-
12-"/,:;-
f)~(OPe
U;I/Vfi.
z.. -
3 tiNe
PeC&Jp~/fJ
I
)
ALL RIGHTS
hf~E~;ED.
PUBLICATION INTENDED.
by recording say all zero's meaning the transition will be 001001001 as a
time sequence for VFO sync. then we can follow up with a double character
such as 001000. which is line 3 of Table 12.15. When this pattern is recognized.
the count of the UP/ON counter can be set to five, thus, starting the decode
in the correct phase.
ERROR CORRECTING CODES
I,
)'"'
Ever since the IBM 3330, Disc Drive error correcting codes have been used
to detect errors and correct certain kinds of errors.
These have become
. necessary due to the media coating thickness reductions which allow pinholes
or small oxide conglomerates which cause missing or extra bits to disturb the
data.
These codes usually are designed to detect error spreads greater than
the correctable spreads.
For example, a code maybe designed to correct 5
bits in length, but only detect 6 or greater.
As might be expected, the ability
of the code to detect certain sequences of errors is limited. thus, it is
possible that certain sequences may be undetected.
These are predictable
and a probability is assigned to this occurrance.
It is not the intention
here to develop these codes, or go into the math behind them.
There is
considerable literature on this subject and the reader is refered to those
listed to start. The Fire, Hall1Tling, Goppa, and Read Solomon codes have been
used for some time.
.
Jr. .•
These only correct single burst errors or errors occurring
over a short span; There are other codes that can correct multi-burst errors
meaning that groups of errors can occur in a single record separated by a
considerable number of bits.
These are the interleaved BCH and RS codes.
The
reader is refered to an invited paper presehted by Dr. E.R. Ber1ekamp
published in the IEEE Proceedings, Vol 68, May 1980, p. 564-593.
12.7b
13-)0
'
(
,-
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)
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.---------.,,-
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"
PUBLICATION INTENDED.
I :,.
ALL RIGHTS RESERVED.
RECORDING CHANNEL TESTING
.
i
,
f·
i
Following the design and implementation of a particular recording channel
i . '
and head combination, the designer must prove his design can meet the machine
specifications for error performance.
Typically, a channel has been specified
as contributing one error in y x IO} bits transferred.
;
Meaning that over a
•
r:
period of time the total number of bits in error divided by the total number
of bits transferred during the Read mode becomes a measure of the channels
performance.
This may be designated for all heads and tracks (for disc files),
using a random number generator for the head and track addresses, or it may
just be the total sequential file.
Usually the random access method is used
as it affords the greatest sensitivity of the test, including both inner and
outer tracks for all heads.
In the past this number was obtained using brute
force methods; in other words, actually transferr.ing, sayan order of magni:..
tu~e
greater number of bits and counting the errors.
Games have been played
by testers wherein they automatically add two bits of error to the total
saying that statistically an error could have been made just before the test
started and another just after the test finished.
are counted.
The hard errors are ignor.ed.
errors is the subject of some controversy.
Also, only soft errors
The definition of soft and hard
Usually soft errors are designated
as those errors which do not repeat at the same physical location either
following a single write or allowing multiple write updates.
must be specified.
Hard errors are the repeaters.
The one used
These can be attributed to
disc or media defects at a location designated by head number, track number,
and bit count. The two types of errors are specified separately.
14.1
;
.'
PUBLICATION INTENDED.
r
ALL RIGHTS RESERVED.
With the introduction of error correcting codes, the definition changed.
for the two types of errors.
Soft errors are defined as correctable errors, or
those that are within the error correcting codes capability to correct.
Hard
errors are designated as those that cannot be corrected, or that fall outside
the codes correction capability.
A third category then contains the media
defects which are still not counted in the error performance but may be
specified for the total machine.
For example, a machine may have a speci-
fication that places a maximum on the number of defects allowed either by
total machine, by surface, or by track, or some combination.
Read errors are
caused by the failure of the recorded transition, if it exists, to generate
the correct output bit in the correct sequential time slot of a data stream.
There are several mechanisms for this,
l·
the dominant ones being noise and
interpulse interference or bit shift.
Both of these were discussed in Chapter 4,
particularly as shown in Figs. 4.11 a,
~,
and c.
This, of course, is true
onlY if the correct channel design has been made, ipcluding heads, amplifiers,
filters, detector type, and the clocking circuit.
Following work done by Dr. E. Katz and later including Dr. T. Campbell,
at Memorex, a method was disclosed that· greatly reduced the time required to
characterize a channel's error performance.
This method permitted the
separa~
tion of the two dominant error mechanisms for the first time, which permitted
optimization of the various channel characteristics. for best performance ..
Obviously, brute force design and testing costs money, particularly if
over design is used in one area in order to compensate for poor design in
This is now unnecessary.
another.
a curve
Using a circuit designed by Mr. M. Monett,
an~
~
generated that totally describes the error performance of a machine.
14.2
PUBLICATION INTENDED.
ALL RIGHTS RESERVED.
The curve has been designated as a Marginalized Variable Frequency Oscillator
(MVFO) curve.
This is an unfortunate choice, as the name really describes a
totally different device. both devices will be discussed in this chapter.
For want of a better name, we will designate the curve in question as a
Quanti fi ed .Phase Error Curve (QPEC).
plotting the
tota~
Bas i ca lly, the curve is genera ted by
number of bits whose phase shift exceeds a set value,
usually expressed in seconds, for a series
s.c:
of~values.
The reference phase
is obtained from a phase locked loop with a low bandwidth.
The logic output
"f
of the phase detector is compared to a chosen time delay.
Any
,-f.'·
~
phase
shift, either up shift or down shift, that exceeds the chosen time delay, is
counted on a counter for a given number of
transferred~.
a single revolution or a single record is used.
For short settings,
For long settings, hundreds or
thousands of revolutions of the disc are used, depending on the accuracy and
sensitivity of the test.
Fig. 13.1 illustrates a typical setup.
of the counter is a factor in the choice of total transferred
~s
The capacity
for any
given setting.
Gf---.....J
PA~1
I
of f.L./..../
I"VN:::::"'"
---~.
(l'UI-'T£t{
'------1
,---
--~
___
J
I
I
Fig 13.1
14.3
PUBLICATION INTENDED.
Notice that the early part of a record is blocked
(
ALL RIGHTS RESERVED.
using~oata
Valid." lhis is
to ignore the excessive phase errors during lock up time at the beginning of
the record format.
Also the type of phase detector used determines the block
designated as an Dor" following the phase detectors.
", ... ~,.'
.
~-t , ..... ::
t.·.···~
t.f
P! ,"(,.- ;":.;
For simple phase
I4J A
r",t:t '-"'"
=',.
detectors, or non-harmonic phase detectorsy\as shown in Fig. 11.14A, the
circuit shown is adequate.
in the output block.
Care must be taken in allowing for "0" setup time
For harmonic phase detectors, where the up and down
errors are turned on simultaneously, an "exclusive orlJ must replace the "or."
Then the difference between the two is fed to the delay line and "0" fli.p flop.
~.
The operation of the two versions is illustrated in Fig. 13.2a and 13.2b.
L __ J
-11
\.If
-1
,
J--,
;''''
_-1
11.
! l. .
r
• I.
T
'"
; 'r"
..
-. fL_ . ___
,..
c (:- (
r;;
_n ____
!
¥.,
f<
~ ~
.....
~
f
r-:--I
.J,
n
---
n
;;;
~
I~,.
L--.---
r
:~:,..
r-~-
"-»ELA..,
__--In._____
,
__ -
s--L __
. fl____
I
.(.;",,- "t, ...
(
Fig. 13.2b
Typical Harmonic 0 Error
oiscriminator'Waveforms
Fig.13.2a
Typical Non-Harmonic 0 Error
Discriminator Waveforms
. A typi ca 1 plot can be made as a functi on of the total number of pul ses out .
divided by the total number of transitions recorded vs. the delay line setting .
• I
Obviously at the 0ns setting, almost
Ie·
all transitions recorded exceed the
fo/OfU
(~v'f f)
.r
10
(JLDf!)
-"
I;'
-3
of this curve that depend on the bit
noise.
Ie
.,0
There are several features
pattern, the resolution, and the system
-7
liJ
10
setting.
13'1' f"""7
I
+
It is usual to use the bit pattern
that provides the greatest amount of
\
I \
IL...-----;r---t--+----i-+---t-----t-I
-t-.
",'
Fig. 13.3
2
Typical QPEC for Repetitive Doublets
14.4
PULSE INTERFERENCE OR BIT SHIFT.
This is the repetitive doublpt pattern where
two transitions follow at the minimum spacing with at least one zero between
the doublets.
Usually a single zero or non-transition suffices, depending on
the pulse interaction.
When counting the number of bits transferred, one must
only count the transitions and relate those through the code used.
example, the MFM code is designated as
~(1,3).
For
The maximum doublet pattern
would give transitions for every 3 bits transferred:
123 123
011 011 O.
The actual
cell content on the disc would be c Oclclc Oc, or 2 transitions for 6 cells.
Since there are 2 cells per bit transferred, the 6 is divided by 2 to give the
3 for 2/3 track capacity;
or for 105 bits track capacity, we will have
6.66 x 10 4 transitions recorded.
For a different code, such as the 2/3 (1,7)
code, we take two data bits and occupy 3 cells.
There must be one vacant
cell between transitions, therefore, to get the minimum doublet patterns we
must have four data bits transferred per two transitions:
for ~ track capacity.
101000 101000
For example, if the track held 105 bits of data; there
would only be 5 x 104 transitions recorded.
If we look at Fig. 13.3 again we
see that the line for the single frequency is a sing1e .slope, whereas in the
doublet case it is forced over but the slope is the same.
is the predicted bit shift of the doublet.
What we see here
The corner of the curve is located
at the superposition caused bit shift value.
The slope is a direct function of
the channel signal to noise ratio, meaning the head, electronics, and disc
noise plus signal to the head, electronics, and disc noise.
Notice that such a
plot is totally representative of the entire recording channel and, hence,
becomes a measure of the error performance of that head disc combination.
The
intersection of the curve at the time value equal to the one half of the cell
window width, W
k , gives the error performance.
In the figure, that is 10- 10
2
for the maximum doublet, or worse case pattern.
~
In order to save time,
14.~
1
PUBLICATION
10 10 bits need not be transferred.
I~TENDED.
ALL RIGHTS RESERVED.
The slope of the curve can just be
extended from some lesser value to the 10- 10 level as the curve in this
region is a straight line.
Now we have a tool for measuring the performance of a channel we' need
only find the worst head and the worst media acceptable under the specifications t plot their QPEC curve to obtain the minimum machine performance
for on track conditions.
SimilarlYt we could do the same for the off track
conditions at the normalS psycometric corners of temperature and humidity
and power supply variations to predict the worst machine performance.
Obviously, if the results are unsatisfactory, then the specifications need to be
tightened for some parameter or component until the performance specification is
met.
(
This is much simpler than in the past.
While we are discussing specifications, we need to discuss the head and disci
media.
Of the many head parameters that can be measured several stand out as
being meaningful.
These were al,l discussed in Chapter 4.
Of- the electrical
pa rameters, ampn tudes of the frequency extremes, reso 1 uti on, and write over
are the most significant.
It is intersting to note that as amplitude increases,
poor resolution can be accepted for the same error performance.
predicted from the relationships of the QPEC curve.
This is
The better amplitude
results in a better SIN ratio which means a steeper slope, while a poorer
resolution results in a further shift of the corner to the right.
With the
intercept point fixed at 10-10 and W/2, then various combinations' of amplitude
and resolution can be accepted.
This is taken advantage of in the head speci-
fication to allow an increase in head electrical test yield t knowing that these
combinations will function well.
An example of a head specification curve
relating amplitude and resolution is shown in Fig. 13.4.
14.6
PUBLICAT!0~
INTENDED.
All RIGHTS RESERVED .
• •fS
.p
~ -7'-'
()
.I
V~ ~ ·"1("
\.t. ~ .... r-
-
A{(If'T
I.-O:
.~
, -
~,
• 55
1-~--1-------_~
___-_"'--_--O',y
---1
--,
A MfllTuP!
Fig. 13.4 Acceptable Amplitude and Resolution Combinations
It is desirable to have the recording channel cost effective.
The
design then becomes a compromise between bit shift or resolution controlling
parameters and total SIN ratios.
Obviously bit shift is controlled by head
and disc parameters and SIN is controlled by head-electronics and disc parameters.Therefore a successful and cost effective design hinges on balancing
the cost increases necessary to reduce bit shift and those necessary to
reduce noise.
Since heads and discs are in both camps, then it 'is probable
that equal window spacing be giv,en to bit shift and noise.
If the design
is based on one third bit shift, one third_noise, and one ·third allowed for
manufacturing variables and degradation during machine life, then a satisfactory arrangement has been reached.
See Fig. 13.5
,s
\j
~
\:.;
~\!"
~.
~
>.
,, ,-
....;;z ,--:.... "
-I'" r..: :: :
\.:
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'"
-
10..'
~
\,.
~
......
\.!l
::. <
;: ::"
......
\L
~ '....
\1 Ii:: '"
'"
-
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~
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\.
'0
.!>
'0
...
'0
...
-
'0
....
'D
,
':).
\.0
14.7 ;
.
L
PUBLICATION
I~TENDED.
ALL RIGHTS RESERVED.
There are several variations in the QPECcurve that should be discussed.
("
relate to defects and/or anomalies of the disc/media surface.
These
In Fig. 13.6
a QPEC curve is shown that illustrates the effect of a small agglomerate
~
10
•
'O~
\
I
,-.5
\
\
\
~
I,
S
10
\
\
'\
~
Fig. 13.6
~
QPEC Curve Showing a
Media Anomaly ,
(
in the media.
Fig. 13.7
QPEC Curve Showing a
Media Defect
This causes a bit or a few bits to have a different local bit
shift than the remainder of the track, but the SIN ratio remains the same,
h~nce
the curve continues down at the same slope.
The feature of Fig. 13.7
is caused by a scratch in the media in proximity to a recorded transition.
The scratch causes a
d~/dt
signal, called an extra bit or drop in.
The pulse
j
adds to an existingitransition and phase shifts the transition beyond the W/2
limit, thus causing the curve to extend to the right at one count per revolution or more.
The variation shown in Fig. 13.6 could also be caused by this
mechanism if the shift is small.
During manufacturing testing of a large number of machines, the QPEC
curve is not cost or time effective.
definitive testing.
There are other techniques that permit
It has been customary to do several things, parameter
or circuit wise, to the channel to remove some of the margin built into t.he
l
)
14.8
PUBLICATION INTENDED.
channel.
ALL RIGHTS RESERVED.
This is done by altering a circuit or circuits that are not normally
part of the machine, but are a later part of the recording channel or it may
be accomplished by altering a'part of the machine that can be independently
tested.
C~ndidates
arily, the detector.
for these are primarily the clocking circuit and, secondThe clocking circuit is best altered by only changing
the width of the window used for gating transitions.
or MFM codes the clocking window is a squarewave.
other half for redundant clocks.
For example, for FM. PM,
One half for data and the
By using a delay line and an 'and' gate
D'P
(Fig. 13.8),
....
~,'i?jIa
C~NrU'N&
r-----I~-...,
Jlll7 '"
I,A,"
,..
I
"''p~..,...J
Jlll"'y! ~ p"rll
.....",tvPO'-ol
"'AIi''',''t 12'''-
p,qrA
",."A-PO.......,
I
I.Jt....., p~T'"
Cr "'rfl~ INC
Fig .. 13.. 8b
Figure 13.8a
pl'liA
and then realigning the window to center it to an on time transition,
dow can be marginalized.
the~in-
Hence, when operating, transitions with less than a
given amount of + shlft are passed and those exceeding that value are lost and
cause an error.
The error checking is done on the record itself.
source of the name Marginalized VFO as MVFO.
The reader can now see the dif-
ference between the two circuits and functions hence Our
.counts all
renal~ing
The two functions are different.
curve,
~
r<,,,-tvJ.J·Crt;
ftmcti~
This is the
the QPEC
The QPEC circuit
that have phase shifts greater than many settings to gen-
erate a curve while the MVFO circuit blocks all transitions with phase shifts
,
I
14.9'
PUBLICATION INTENDED.
ALL RIGHTS RESERVED.
. . -. I
:ater than a single setting thus causing an error in a data channel_
) different functions for two different results.
Of course, the QPEC cir-
it could be used at a single setting to get an error indication, but as the
,annel also provides record position as byte count infonnation of the error
t
:.0.-,.,..,_'-.1./
would require extra circuitry if the QPEC circuit were used for defect
ogging as well as just a channel functionality test.
. .
At this point it might be well to point out a method devised by Mr. F.
Sordello that graphically predicts the perfonnance of a recording channel if
an isolated pulse can be measured for PW50 and the channel SIN ratio is known.
The method uses an Arc Tangent pulse drawn on a sheet of paper with a nonnalized
amplitude and time scale.A. Drawn on the same sheet and centered is the differentiated pulse shown to scale f1and again at 10 X horizontal scalecsimilarly
A
A
centered ..
Fig. 13.9
Using this sheet and a table of noise amplitude probabilities, both intersymbol
interference caused bit shift and noise caused bit shift can be predicted.
first is done by algeb'aitly adding the contribution of a second inverted Arc
Tangent pulse
(Fig. 13.10),
14.10
The
I
/.
-
o
'..:J
..J
_.... ---
...
..
......
,
-
~
~
\,{)
~
;:l
J
-.
H-
~
v
o
.. _._,--- ~
-r
r:
l.l.· J+
.-
;).-.
-:
'2
.,
>
.2'..!l
..
('!~-'-II
«;I
. !.-~-- -'-~ ..-I~ ~;-.I : ~.f"':
r·
I' -
.~II~;- ., .:- _.- .
!
:
. . . -.-1--..-.. _.
~ "~II'-- '--. -1"-~
•
__ .__
" . _ .. : _ _
~..
___ . . '
.• __
I
~'''_;-
i.
!
I_J
__! _ __
. -.----- ... --- .
.......
I
--.1 ____ .___
.
I
~-;--:
--I
--~-.:--
P-
!
J
J!; ;.
• :. -
. '---.
;
;
-i----·-f:
I
N
~.'f
I
-+I
.-
r-
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'of!
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'r
~
'14 9 i '1
.-
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1
.
i
;
T.
t~ ~
'? '0
J T
i:1------: --~-·1'
j
-.---,--- -;--r'-----·--···--- t,
-----:.-~.---.--
!
r":
. "l
:
tt
-.
I
i
I-----,~\i\~ ~ .-.,. , ~--·!---·,:.~·-i-.---I' .- -i--~I~-~---;.---.-·--,r . . .;. .~.:-.- -,'-'I~
-~--' 1.J _d. --~ _ .
-~---
~. . 1~t.aF .- :. -.... :-'.
I
..
,~
I
I
~
I
I, - :.--
-- .. _-- -------
I
-11-'''''1- ;
'0
-.
-ott..
..
-'-.
~.
_.
/' . ; .
;
~~ ~v· -~--------.
I,
~
,-'.
j---H ._.-
i~
--.. ------
o.:r().
~.: ;. ~ ;::r':~
--+---1----;---.'0-..... =-N f4 -c-{'N
r r"'2
~
;,- '--=l-,
+:
I
---:-
-
I
;v,.
'
0
-::
u c'')
t - - - - - . - . . ; . !- - - ,--....;.I-~O-O'
I
I':>:~;'
g.- ('o;l -:
~~
() <..;
~--~'S:: -T;7-1-~' ~l-~~--(--T; )
.. - -_.--.
--- . - - . -.
(r-
.
')0:.-, r-.
! .. -- ..
'-.9
-
~.. ~.
.I
T
r{)
-i....:----!
...
,----~
0
..,,'
I
\J
~I'~
-o"d
;
!
-
~
I
-- •. '--- ------ ------
. ~
\rI
q
(,)
0
"3 r-!
0
f))
.:)
0
0
0
.
':\...1
0
tJ '-"
...,.
v- B
f"\J
~
-v
0
~
.;l-
~
<.> U
~n J\~~ ~ ~ ;. ::i
f ......--- .. -- I .. _-t ... I ," , C'Jt .
(1
n
...9
:r"',
{
.')
,,~
~
~
J1
00
JJ.
'0
0 -0
y) .,9
- --1
.
N
:>
0
(.)
.:;)
'ffCI
~
"
I
PUBLICATION INTENDED.
ALL RIGHTS RESERVED.
(
Fig. 13.10
Fig. 13.11
t,
placed at the correct spacing
ofP..,,,, then
doing the same to the differentiated
-t""
Arc Tangent pulse. ' The peak amplitude. reduction is shown on the first curve.
~
The intersymbol interference caused bit shift is shown as the difference in
time between the original differentiated pulse zero base line crossing and
that of the second
or
modified differentiated
2t(o
b,uc. h ... e' c.yo>~ln~.
The contribution of bit shift from noise can be determined using a curve
relating RMS noise amplitude to a gausi.n distribution.
The gausian distribution is p(X)
=
1
V2
21TCT"'e--=-2-cr-~-
EQ 13.1
From this equation we can generate a table of noise amplitude as a function of probability of occurance.
(See MISCHA - SCHWARTZ - McGRAW HILL, 1959, Page 373-390)
14.11
AI
-,.
"
•
-'-
"t . . . .
.....
'
..
\
....... ..., L .•..rIV,Vi....
• ,.
1.
'.!
f
~
...
PUBLICATION INTENDED.
RMS NOISE
=
ALL RIGHTS RESERVED.
Probability of Occurance
a
1
1
1/0.32
2
1/21.74
3
1/370.4
4
1/15625
5
1/1724137.9
6
1/500 000 000
6.36 1/10 000 000 000
7
1/400 000 000 000
8
1/80 000 000 000 000
Table 13.1
For 10-10 probability of occurance, the noise pulse amplitude
is
EQ 13.2
6.36 X RMS Noise,
The method of measuring the signal to noise ratio is important.
~(~
.
measurement'i\taken after the differentiator in order to
t~
relat~
The
it directly
the differentiated pulse for peak shift measurement purposes.
dS
dN
=
d Vsig RMS
dt
d Vn RMS
Cit
EQ 13.3
where d V sig RMS is the RMS value of a differentiated signal resulting from
.
dt
evenly spaced transitions at the minimum spacing allowed by the code.
disc drives this also means at the inside track.
d Vn RMS
dt
In
is the RMS value
14.12 )
~ \
PUBLICATION INTENDED.
ALL RIGHTS RESERVED.
(
of the differentiated noise including electronic and disc/media noise at the
same location.
The peak value of noise voltage becomes
EQ 13.4
(6.36 )(Vn RMS)
or in tenns of the ds ratio and converting the RMS sig voltage to base to
dn
peak at the same time we get
Vn
6.36
Peak -(i. ds
dn
= 4.497
EQ 13.5
ds
dn
which is the peak noise expressed as a fraction of the signal peak.
When we used the d(RMSsignal) value to get ollrd(S/N) ratio, we are
really in error when we use this value with a differentiated isolated pulse
as the amplitude of the isolated pulse is greater.
All that occurs is an
error in favor of poorer perfonnance which is acceptable.
Going back to our graph we now locate this amplitude fraction on the
. expanded scale
(flJ 1'$./1)
Fig. 13.12
differentiated pulse.
The value of the peak shift can be read off on the
horizQntal scale and multiplied by PW50 which converts it into bit shift
2
(n$er(),.rJ~
14.13
\
...
r,
..
,
.~
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,.
to'· '" •
.... ••
PUBLICATION INTENDED.
~
ALL RIGHTS RESERVED.
...
Now to get the total bit shift due to intersymbol interference and noise,
we just add the two values.
According to our earlier. rule of thumb each of
these two values should be about one third of the half window width each which
predicts performance at the required error rate.~nclUding~margin of one third
half window.)
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SSE A
STU D Y -0 Feu •.• F ~
t: E R
to.
J. Angelelo, H. Lilienthal, and
during the course of this ..!Oork.
the above model. Our conclusions arc that the compositi.m Cul+uFeS+:.~04 can exist as a stable compound
"hen quenched from lemperatun:s between 1210° and
1350°C in accordance with the published phaSt: dia-
l(Hi
J.
Jacobs for their help
'.'
If'. Bcftaut ;and C. Ddorm~. Compt. Rcnd. 236. i~ (195,;-;.
.1.\. Bt'fJ:Mcin, Int. Symp. R~acti\"ity Solids, 6th, Schenectady,
1%8 (in prcprinU).
I K. Ohbayashi ;and S. IUb, J. Phys. Soc. Jap3n 23. ii6 (196i).
• E. Kordt'5 ar•.! J-:. Rutl~, Z. :\norg. :\llg~m. Chern. 264, 3~
~am.'
ACKNOWLEDGMENTS
It is a pleasure to thank Dr.
! .
J
•
~
f
(19.m.
'J. Ther), and R.
Collon~s. c.ompt. Rrnd. 254.685 (1%21.
• S. )liy;ahara ;and Y. Kino. Jap. J. .\ppJ. J'hys. 4. 310 (196':;).
7 C. F. Jefferson. J. App!. r'hr~. 36. 1165 1196$1.
• E. W. Gortl'r ..\d\":IO. Phy~. 6 •.~36 (1I,/5i).
• R. I.. Coll"n, P. G. ){c)lullin, ;and G. K. \\"~rtheim, R('\".
Sci. Jn~trum. 3-«. 67 1196.;-1.
10 J. K. Lre~. Ph.D. tht"Sis, C;arnc;ri.: Jnstitut~ of Tcchnolo;:y,
Pittsbur;::h, 111601.
II B. J. E\'an~ and S. S. Hafner, J. J'hys. Ch~m. Solids 29, 15i3
(1968) .
n.
A. Calhoun for
suggesting this problem and for his continued intcrc~t
in the work. We thank Dr. E. L_ Boyu for many
helpful discussions. Our special thanks are to Profe~50r
F. D. Barros, Physics Department of Carnegie :\h·lIon
Cniversity. Pittsburgh, for making the helium mns.
We also expn:5s our appreciation to )Itssrs. T. R. Klein,
VOLUllE n,
JOURX.'L OF APPLIED PHYSICS
Xu"~IBER
oj
•
I
I
15 )lARCH 19.0
4
Analysis of Saturation Magnetic Recording Based on Arctangent
Magnetization Transitions
ROD£RT
I.
POTTER
]',/ernaJiOflal Bllsj,rtss .lI acltints C(lTporalitJ7l, San Jllse, Cal('-,>rnu 951 U '
{Ret:~h'cd
13 August 1969; in final (arm 13 October 1969)
, Th~ minimum transition J~ngth for the arctangent magnetization transition ~ C11cul;at~d. Readback
voltage for th~ arctangent transition, where the ma~netization contains compone'll<5 both in and normal
to the coating plane, is ca1cul;at('d \'ia the reciprocity th~rem and Karlquist's fringe f.Md equ;ations. Se\-eral
misconceptions currently ~xisting in the literature arc discussed.
I. INTRODUCTION
A theoretical upper limit to the longitudinal data
density attainable in conyentionaJ saturation magnetic
recording exists, since current magnetic coatings are
incapable of supporting abrupt transitions, and since
the read process introduces an additional apparent
broadening of thc transition region. The term "saturation" is used here to describe the case where peak
magnetization in the coating remains approximately
equal to the remanent magnetization of the major
hysteresis loop. The limitation on transition length
arises in conn.'ntional coatings primarily' because the
magnetiz:ltion M I r) in the coating produce;; a dema~
netizing field
H(r) = - ][(r- r1 ,\·M (r')/I r- r' 13Jh-',
to be estimated without perfomung this self-com-istent
calculation. It is as;:umed that the h\'steresis loops are
square, and that the tinal state of m~gnetization M: r)
after the external' wrire field has vanished can be
adequately described by an asslimed functional form
with adjustable paramelffs. These parameters are then
chosen,. after Chapman.!: such that the demagnetizing
field 'resulting from M, f ' newr exceeds the coercivity
He of the major hystereSS loop. Two possible choices for
M Ie) are the ra,?p trarNtion.
(-:c 6 '2,
where 0 is the coating thickness. Bonyhard et 0/.,6 give
an aS~'mplOtic expression for the transition length,
valid for 6/0«1 and based on the arctangent model.
Treatments based on single ilnd multiple ramp transitions have been gi\'cn by Speliotis and :\Iorrison" and
Aharoni,' respecth·c1y.
\\"t:.point out that :\Jiyata and Hartel's l'xpression for
the field inll'nsity (l'ven as modilil'o by Chapman) is
not valid insidt: the coating, and henn' Chapman's
ctlcula tion of the minimum transition Il'ngt h is incorrect. The dillil'Ulty with ::'.liyata and Hartel's exprt'ssion
inside the (oating ()o I, this estimation of lmin may be
more appropriate to thin metallic coatings.
Several oLser\"ations can bc nude concerning the
microscopic details -of the magnetic transition. First,
Eq. (3) [and Eq. (9) belowJ results in .1)) three components of M \'anishin~ at .\'= O. This docs not contradict the Stoner-Wohlfarth coh.:ren t rotation moLlcl ll or
the more appropriate'~,'3 sin~le domain incoherent
rotation modcls,u.,:. since the magnetization in reality'
is free to form a : component. \Yc consider only two
dimensions of the three-dimensional problem, a jU5tilinhle simplili.·alioll sin,·c tht· rt·:tcl tran!'riuCl'r i~ ill"l'Il"iti\'l· to .II ,. ~lon:O\'l·r. thl' 11l:l:!lll·lil.atioll Ill:!." \'t·
COlIsiul'Tl·u in thc macroscopic ur ,1\·l:r,l;..:t·11 St'IlSC whl'never pa-niclc dimensions arc nt·gligiLIc comparet! to
,
UHf)
I
dilllCIIsions of interest, thus remo\·ill~ the rest fictIOn
that at each point I M I == _tl.( n. When dimen!';iolls
in the .r-y plane (i.e., cO:ltin~ thick,ness, transducer ~"P
width, and transducer·media spacing) :lrc not brge
compared to domain or particle dimensions, a macroscopic M may still be appropriate in the statistical
sense, in that it reprc..-sents an 3verage of ,\1, and .\!,
O\'er the track width or .: axis. Second, the relative
importance of exchange in limiting the transition length
has been iO\·estig:ltcd~by Aharoni7 and found to be in-·
significant for current values of coatfng thickness.
ff
,
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~
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J
f
J
t
,,,•,
UI. THE READB",CK VOLTAGE
l.
Readback voltage e(i), where fEd and v is the
relative coating-transducer velocity, may be obtained
either directly by calculating the flux through the
transducer core, or indirectly by use of the reciprocity
theorem. The direct calculation of SpcJiotis and :\Iorrison;; first assumes that the read transducer may be
replaced by one continuous semi-infinite slab of pCrlneability II, spaced a distance d abo,·e the coating. The
method of images is then used to obtain the magnetic
indl,lction B inside .this slab,
•
"
lit•
It
•
i
I
•
II
(i)
(5)
Upon inver'ting this equation and setting Hz (max) = H ct
the minimum transition length (as determined b,'
considering demagnetization o~ly) is iound to be
lanin=1I'Dmi"= (".0/1) [esc H./8'\[,-IJ,
ll.\ G X E TIC
where H, given by the equivalent (for y>6 '2) of ECJ.
(-4) for an arctangent transition with M in the plane of
the coating, is the field intensity that would exist
,if the slab were absent. Totall1ux cI> per unit track width
through one pole face of a transducer with tinite gap
length g is· then assumed to be
.
~'12
1
4> (f) ==~.
-1-.
l
.
(
~
B II (x,o/2-1-d)d.t:
I
rlfli2
[(i-/-g/2-.l·)/g]B,(.l',o/2+t1)d.r,
(8)
i
1
~J2
·
where the second integral apportions the flux enterin~
the gap' region between the two pole pieces according to
the linear weighting factor [(f+g'2-.l"I/g]. The lower
. limit of intcgration may be changed from minus infinity
to zero without atTecting e(fJ, which is proportional to
I
J4>(i)/t!i.
In the indirect method employed here, the readback
voltage is calculated for the transition
M(.T,,) = (-2/ ... )(Ufz -j'M,,) tan-l(x/.a),
. using the reciprocity
X [
./
I,
theoreml~
e(i) =4l1'X..JraX 10-'
+'
I
(9)
1--... d.~
i
I
aM (x-x, y)
tly
_
·H,(x, y).
,1J'
I
(to)
where .\" i:; Ihe r,lIlllhl'T of turns, t· is thl" \'dOLil \., II' is
the track width, and H, is thc sap frin<;e Jidd r~sulting
~
1
r
r
1650
ROBERT 1.
POTTER
where
(
!!.! • LO
a.
1"
f(i} .. rg
- _. 0%
II
!.
L2~
II
[~'
4
0)'
tan- I [(g/2+.r)/YJ
( x-X )2+ a2
_ o+a+~
_I (g/2+£) _ d+a
g tan
d+a+~
g
I
... ~
I
.................
I
I
g/2+£)
X tan- I ( d+a
2
+ 2g1 (g/2+£)
-.2
X In ((K/2+iP+ (d+a+~)2)
_.<4
' .... _"
(g/2+iF+ (d+a)2
FIG. 2. ReadLack pul~t di~loTlion cau!'t'd b,· a nonuTO \,
compon!.'nl of ma::netization. The ~ep:lTatt contnbutions of each
magnetization component are indicated.
'
(13b)
where
-)
a
1.(
Ixa-
271'g
llrd
%
('oln[(g/2+.r)2+Y'J
)'
4
-c
(X-i}2+ a'
= [(d+a+~)/2gJ In[(g/2+i)'+ (d+a+~)2J
from unit total current flo\\'ing around the transducer
core. The head efficiency factor Q is given by
-[(d+a)/2g] In[(g/2+x)2+ (d+a)2J
- (1/g) (g/2+x)
(11)
(
where CR" and CR r are tbe reluctances of the transducer
gap and core,respectiwly. This approach relegates the
major approximations to the fringe field calculation.
The fringe field, due to Karlquist,' is given by
, )') = rg
1 [ tan'(g/2+X)
1 ---;:H,Ax,
+
tan- 1(g/2-J.')]
--)'-
,
(12a)
(12b)
assuming that the transducer permeability is infinite,
the medium permeability is unity, the pole pieces
extend to infinity, and the mJgnetic scalar potential
varies linearly across the gap at y= O. This last assumption is eguinlent to the linear \\'eighting factor em·
played by Speliolis and :'.1 orrison. Thus, that portion
of the read hack signal due to the :r component of
magnetization will be identical to their expression,
except for a factor of III (Il+ 1), which does not appear
here. However, Spcliotis -nnd :'.Iorrison assume that
the tlux linking the read coil is Q times the flux through
one pole piece at y= 0 '2+d. and this is yalid only if
1l»1. lipan inserting Eqs. (9) and (12) into Eg. (10),
the readback \'oltage c(i) in volts is determinrd lO to be
rei) =8.y.,lraX lQ-sPf.. [f(i)+fC -i)]
+'\!jI[h(i)-lz(-x)]I,
(13a)
X
[tan-
I(
g/2+X) -tan-I (g/2+i)] , (13c)
d+a+o
d+a
and wbere nlocit), t' is measured in em/sec, track width
n- in em, and .Mz , AljI in emu/cc. The coating thickness
is ~ and the transducer-coating spacing is d.
The justification for considering AlII but not tnr in
the readback voltage calculation, where JIll is due to
H IJI and '1nw is due to the demagnetizing field, is
{ol1o\\'s: AIjI contributes to pulse asymmetry, wbereas
11111 produces onl)' ,a synunetric first-order correction to
the dominant and symmetrical pulse resulting from
.\fz. A comparison of ez (x) and ell (i) , the contributions
to e(x) due to the parallel and normal magnetization·
as
Curve
d~O
8
9
No
-0; '\
2
3
1.0
0.5
0.5
0.5
1.0
1.0
1.0
'\
L25
L25
0.25
0.05
eli)
.(0)
M
-2: .0.2
Ma
FIG ..~. Rl':l,lhad, \'o!ta:.!l' for sc-n'ral \'alue', of 11+11, 15, ancl t;
an, I fur .11.,' .lIz = 0.2 ..\1\ diml'nsions are normalized to an arLi.
trary sap length gQ.
.
.
I
I
.: i lJ 1'1 a1l<1 1"':1 The IOUII:lili~ I)f th(' S ('lIn (' flC'"r lh,
ti:r,.. !;""!' illdi'·:lte-. that ,,:n"~ IC'uk'- tbr fO:t· ·'d:·!l;:·b
!'cll"ilin'" \rith;1 (,Olrc"pUllllill~ d('('j(,;!-(, :ll/'1 1 :lliJ iller(':!,,,
ill trl-,. Th",;c l·ticct~ nrc illll"tl all'l: ill Fi~". -1 :md .j for
C'ompo,-:itiOil :!j. which is morc "tl'("'''' !"(.'1I"it i\'c th:1II tl.
I:, :
l'
tL,' -qu:lr(:-::,tlj, l'U-:'\!'1
Th" i'l""'!~"J;,tJOll u[ ~I "Jll:dl :tnldlllit nl LII i'l till"I'
1\"0 Li-;\lll ferrilt· Ct.:rIlH),ilioli' (:?li ;\IIJ 2:) I iU('It',I'I'" Ih('i:'
output signal" withuut al\~' appreciable delctC'li():J~ (·llt'ct.011 thcir r l'llrrl':, switchillg l"J)l'C'tl. temperature, 01' "tn'"''
trU!l :lrf'
(,(;r('-
}."jfufs of SIl~slif/lfiOI/S
We haye
•
tC:'~I'i';:lLlll' n: .'.
~Il"itivjty .
~ub,titutcd ~m:11l
nmollllt,. of Zn for ~In ill
ACK.... OWLEDG)Ir.Cl.7
:l::Ompo~itioll" S
alld 9 (sec Tnble II I. Pu\,;c tc4 d:\tn sho\\'
Til£' uuthor w(}uld like to thank Dr. D. A. C:.llIsUUIl for
thnt the fubstitutioll of 0.1 atom Zn in 8 (2G) gi"cioptimum rC~lIll,.:. It incren:\'i,('I! ;-:('l'tcmt.cl' IS.
J'lli'l. 1';'1 ... ·1' :!.Ii. 1'1'£'-"11(".1 at tl.p I!II;~' IST!::!:.\!:\(; ('ol,f,'re,lI'c,
AIII-lt'rol"J1J. '1'1.,. :'I:,·II ... r111I1i'. :\,'1 iI I;i-IS.
1'1.(·lIlIi"'>I' lire "'it" ('&JIll})II!f'!" 1:.·",,,1'(''' :IJ1lI ..\d,,:IIIl·CU lk"dnp'
Inf'l1t I )j\'i-i,'a, 11l1l'Tlwlio!Jal CUllIl'll"':''; l.ttl., :-'tC\'cll!lf;C, IIcrl""
J~:~l!blld.
:,p('(,d" a di"k !':tol'e caa offc:r bit tran"fe\' rate,.; of th.: oj'urr
"C(,IJIHI to;rdllf'r \\'ith :H:(:f~"';'; timeo;; of bctlrl' th:lII
.10" po'
].(J() Ill".
111 ol'lleJ' to :tclli('\-c a hi;.dl p:',cki!Jg' c\.:lI.:ity tlie
m.,~;,(,tie !"tor:l~(' medium m~l,t he of Lig~l e()c;'ci\·:ty [I}
\\'riti:lg: "'itlt ('OIl\·elltir.'I1:11 ril1~:-tYJi(' head·: require,: tl!C.'l'e-
ful'P t1l:\t 3 high curn'nt be ,:witell(,.l illto nil imluctin
luad ,,·itlt only a fillii': voltage a\·:tibb!e. TU" I1lIH Cull:-:titutc :1 finite I()wl'r limit to tllc flux l-i"'e tim('. Al"o. a
further limitatit)l, 1I1:1Y be illtroduc('(l by rclax:ltioll pi,enomcn!! in tbe head (:orc m:11f'ri:11 it-eli. During th~' linil':'
pl'riorl t:tkt'll fol' the flux to I'i"c t\:<: r"c')rdil!~ n;ed;'lm i-;
1l1t'\'illg pa .. t the wriv· /!ap at hi~h "pr·r'd. Thi-; cUllld (';Iu~e
tl/(, "'I'itt('l\ trall."ilioll tl) bccolne b:ll:lu<:r th:lll \\'I.1l11t! L•.' expected ullder ideal, i.c'., zero ri,.:(·.. tillle c()llliitioll" [:!} [3}
. Thc purpo"c oi thl' "n',cnt work lI:l'; bl't'n to ill\·I,,.:tig:t:c
in 11101'(' t\C't:lil till.' dTt'ct of finite flux ri,c time :iIld to cumJlllrl: it..; clTc{'t 011 the packillg cICII"it." lilllit:tti,ll\"; with
tLa! (Ii "cJ(-d('n::s;!lJeli;~;tti(Jn ,,·!tielt t:lkt·,; plaCl' ill til!'
r~'C:'_'I'Jill~ ntc·Jill!ll :Iflt'r the write 1>1'(\('(.... " 11:1.-: bt'L'lI COIllpit-ted, l\u"ty,.:\tyu [.Jj nnu other,.: h:1\'(' :\Il;llyz('d tlte
.:,~
,1:::1' P:-,)C'('"'' in f'lJ:l·jdpLtOlC' rld.lil :OLO n ~lli:li.IY·
;';c;\c:l; (,1,\1>"1 kIn' b"t'll \,'rd. Huw{'w'r, (!;,hOT.1tc- (',,1-
h,i·,)lI" :lit' lIot n:qlli,.,'] ill ordrT to c/rn1or. .. tr:ltr the
Olr:lratin jimilatioll~ illljJo"ed by finilc flux ri,;{' time
d dcmnglll'tiz.atioll. Thcn'forc, n Je",~ rigorous npproncla
~ bN'u :adopted.
:\IoDEL FOR WJUTE PnocJ:S!)
~(o)'c :\IIy ntt('mpt c:in be mnde to det('rmille n written
Ul~ltioll length, thrrc bn~ic :l~~umption,; m\l~t be mnue.
le:<(' n~,;\lIllJltioIlS nrc cOII('cl'llcd with J) thc propel·tiC's
the mf'diu III , 2) thC' "pnti:IJ di:-:tributioll o( thc hend,knge (h'ld, mal 3) th(' 1I:,tUI'(, of the fiux J'i~e time.
J.... ,.i:,,·C' to IIq:~;,ti\'c. lIo'.·, ('\'C')', ill tId,. LIt1l'r C;I;'C the final
n:'m::nC'nrc 1ll:1~' h<- dC't('rmilll·J L.\ botl. the po.:itiYe, and
the J\('gati,'c field;;., hellce the calculation Illay be more
complicated.
.
From (J) the longitudinal field ",('en at time t by n particle positiollC'd nt :r, with re~Jlect to the Ill'ad g:lP Cl'lIter
line as origin is given by.
H.(:c"y,t) - (11,1.,;)J(I)
·[t..'\n-I (g
",IrCI'C
+ :c,)/y + tnn- I (g -
:c.)/y]
--
(2)
I{t) rC'pre;;ent:i the form of the head currcnt rise
time. Simpli(~'ing the J~nrlqui,.;t cxprei'!;ioll
'Ol'crti('R oj tI,C .1/ c(liwlI
l/"(x,,y,t) .... (lI,I.,;)!(t) tmc l [2gY/(!I' - g' +·x.2)] (3)
The' foJro\\'ing nnnly,.:i,;; will be conee'rJII::d only wi1 h th;t'I
?t:tllic film,;, :lIld t.hc mar:},('lic Lcha"ior will be; ' •. ~ nnd pl"O,·idC'd (y' - g' + x.') » '2Y!J, (3) r.lny be ~impli!icd
. ;·,jrt.her to give
'"1 the .1I r - IJ chnr:wteri .. tic. Xo aHc'ln»t willi .:.~., ....
take- illto :lC'('otlllt eithc), 11)(! mir.ro~e()pi(' Jlatm(' of thl'
t)
.... .,;(y~21I_ .YUI(
.
(4)
\'er::nl pl'OC~C'''i' or thc dC'taiJcd ('trc'ct,.: (If ,.;clf-dC'IIHlglIl'tizagf + x,')
m [5]. The ren1nll(,llt mn~l!C'tiz;Itioll of (':1('11 particle in
l' medium will be :1~i:'Unlc:l to dell('lId l'Qlely Oil the
Li1lear R,se 7·imcs
,lximulH JUllgit ud:nal {kId it ('xperiellc('s a" it :I»pro:lclle;:,
For linear rise times,/(t) is given by
.~;:Cii, nml ka\,(';; thE' wrilc-I'I!ad ~ap Ti,e elTect of til('
'rti('nl til'ld ('I)lllPOllCilt [OJ will lIot be cOII;.itlercu.
1(/) .... I/T, 0 < 1ST
Thc mv"'t :lcC'urnt(' d('ie'rmin:1tioll" of the !'p;iti:ll fidel
.. triblltioJl Ilan- l>~'en n!a(l·~ by Fa:\' [iJ u,illl! eouformal
...l,!":fU·i.lj!:~\.::J;.: .. ;;..1 Ii.)' j) ... :;.:~_.)' ~.:.~ ~~ .. ~",,_) L;l " .. liJ,dy.':; ..
:lrlqiJi;.:t ':0:. <''..pJ'I.':,,.:ion for th(' ;ull~it udill:ll lielJ II z LX•. !!.'
n lC'~,.: (':\:ICt J"C'J))·C""ellt:lti'JI1 oi thl' di":lrilJlltioll but hIlS
c nd\'.::nt:i~t' of brillg tlll;:!~ tic Ac('()rding to Karlqlli .. t
.(;.·•. 11) = (J/.;.... 'ii:)[tall~·l (g+J.)/Y
(5)
where l' is the time t:lkcn for tI,e current to ri--c from zero
to its maximum vnlue nlld :-:hall hitherto be' rc:.'it'ITed to
:t:.; iLc Lil,·£ .. ;.~ 1;:.'-; !;jHC. 1"'l.\':i" fur{'. ::;ul;.. . ~~tl~t::16 i::to (·1 j
fo), J(I), the field :seen nt tinw t by n pnrticlc p().~iti<.lnl'd nt.
x. becomes
+ ta!l-I (g -.- ~.)/!I].
(1)
where·
x~
4~~\ti(J1l
(1) b ... co111c.o: :t better fit thc grenter tli(' y ('0<1in:lto, :lIJd C"E'n when, Y = g,'4 the error is b"s thnn
) pc·rcent.
In the foJlo"'il:g :lIlnl~'"is the longit uc1ill:,1 field will be
:termillCli u,:iu;! (1). Tile fi,:!u di,.:tributiull "'iil bl' :1":Im('d to be ilJ(ll'p('Il<.~I~lit of the p)'C',.ellce o{ tht' m('(iium
HI Y wHl uc taken :I" th~ ~'C'Jlnr:ltiun "illee the medium i,;
thill film, i.t'., D « y.
i!l.T
t> T
J(t) .... J,
~(ld-Ficlcl Di~-!ribldic1t
o = x.' -
:nz
Tlu:om:TJc.\L
,,-c !-'l,all :\'''''::\111)(' that the' IlH'tlium j,; illitially reJnallcnt
t -.1/. :Hltl that tIll' I.:,ap fit'ld i'witdl(·... fWIll 1I('!!ati\'(~ to
'oritin~. Tt.i,; J1W;Jil,; that ollly the po.,itivc !ic-ltl,; d('h'rnim' the fillnl I"C'Jll:IJICllt !-tat<.' of lh(' nH'Uilllll. Similar
(7)
2/;[X,
+ y2 -
(8)
g!
for it gi\'en scpaT:ltion' y, gap ",iuth 2g, aud veJocii)' Z:.
Sub~titutillg for x. ill (O) yields
IJ,Y{J
t
}1elmmtioll I'h(·1I0nlC'll:l. within the hC!H.I corp materinl
igtlfITf'l1 :u:d tllc f1\1x ri..:(' tin';(~ will be tal..:(,11 ~l': the
JrrC'lIt ri:-;c time, "ill(,l' {'xpC'rimcnt,; ,n·n· c:m'it'll out u,.:illg
Jrrt'nt ri!'il' timC',: glcatl'l t11:1n the rC'laxatioll tilll(' ('on:ant. For l"implici:y we ,,11:111 dl':ll ouly with "::Ituratioll
recordillg. i.e, 1J~(O.y) > lie for nil y.
x .., + l:i.
DiIT('rentinting II z (J"y,t) with J'c;:pect to t alld equating
to zero for a ~t;Ationary ....alue yil.'ldo;
li'iu Tillie
ill hl'
=
=
2H-z1l' 1"L·-~ +
(y~ -
-
g2)H.1rT
"II
_ ,yg
(0)
- g2).,;H.l·7~
211 .YU
(IO)
\\'llic11 togcther with (7) gives
x
..
='
H"yg
.
211' HzI' 7'
-
(y~
wh~re I reprc~cnts
:r",
the time take'll (or th£- p:lI't iclc bbe!k-d
to sec a maximulJI field HI' miu hCIIN' to acquir~ its
rem:Ul('nt mnbllctuntioll.
. .
DElo!] Timc
Whcn X is cho~cn fucf, t1l:lt H~ = lie, that p:lI'ticlc
will 1(::I'·c the write hC'nd with zero rem:l.nC'B(,(, :l.lId :r.. wilJ
M
)
G7
J
Y INCRIUING
(
For corn-CllilllCC J/, m::y be cho'rn ~uch th:1t t11e fie!J
grndicllt iJlJz(X.,y)!JI. i" a m!1Ximlllll nt llz(I •. !/)&: 1/.,
where JJ. (x"y) i" tile fidtl di:,tril.Hlliun roullJ the llc:1d
. whell t > T llnd glycn by
H .. (x.,y)
0::
This condition can be
2gll,y/..-(y' - g~
~hown Lo occur
. z.' -
+ x.').
(1-1)
nt
V' - g'
(15)
where
(l0)
that is,
H./I/,
= gy! ... (y' - g').
Therefore, from (12)
'rc = (y' (b)
g') I"/V.
CalcuhtiolH; ha\'c !!hown that this yalue of
to within 10 percent for y ~ 1.2g.
(18)
1'.
i~
nCCllr:-.te
Transit iOll Lellgth
Fig. 1.
(11) Dday tinl(' "eNIS ri,,1' tim!' (,.("hc·mati(·). Ill) Trall"itiol1
Jellbl
h
YCI:;U';
ri,c lime
(,cb(:Jn~lic),
TC'pn>,pnt 1hr C::'ilt.T of the tran ..;itio:1 r<>gion. The
~pol!dillg tin.e' = til ginlJ by
Altllough .11. {.l'.. ) mny be determinetl u"illg :.10),
together "'ilb the JI ,(11) charactC'ri;:l.ic, the procc'Jul'e i~
n ]enp:thy one. Therefore, the tran~ition length \\":15 defined aud dC't('!'mil1 ('cl ll.oin~ a proC'C'nure simi!.!!' to that
tluC' to J);,\"i('s [~]. .·\cconlil1g to D;lyi('':', :;inc0
COITe-
\"-
Tl !';'
= -- -.--
I)
(
211.1iT•.2
\..
I.';' ., ~=. J! ;~r
+ ------.
:1lf .L:9
(lJ)
j;; the dpl:ly tinlC' :Hld }"epr(·...ellt:' t11<' filllC tnkcll, mC·:1,::uf(·d
from the ilJl'i:lnl \\'''('11 the writc eill')"nt j;: Z('/"o, lu write
thr tl'ntl'r of thc tr;lll ... :tioll 0:1 tllC Inc-·dium. Tlic form of
thi ... rcl:ttiol1;:hip i" :o1l0wI1 in Fig 1 (::t) wlJ(.'H! delay time
has bCC'll plotlt·d YCI'W;; ri~e tinlc jor :.lToitr;u,Y kl~O\\'n
vnluC'5 of 1l~/lIc. g !/, alld t·. SillC'e (11) hohh only ill the
Tt.'f;ioll fD ~ T there will be a di'C'olltilluily in the curve,
ns !!hOWIl. TIJi" will occur ~t !:,OJ":]C critical ri ... e tilJlc Tc obtaillcd [fom (J 1) by sub:-:tit uting I" = T .. = 7'<, j C. J
.
7' 1
_
e
-
-"
..
'~
II .yg/'211 cT."l·2
1 - [(y~ - (f;II.1i/2JJ~ygJ·
When
o=
1 - [(y' - g')lI c1r/'21l.!J9]
(13)
the CI ilira) ri~e tim£' appcal's to be infinite. This 11(','cr
JI:lpprn;;; ill pnlC'1 icc, IIO\\"C\'Cf, !'illCC cIJm p:l.fi":'JIl of (13)
alld (0) fho,,":s that fhi ..; eo!l(lition corrc>'pollds to
l
""l';.1
f Uri~:';'\··'i".:'_\'Jd!;j,
.-,"
.\\..•1-'J('l.",~'jh·l,:':.'J''''·.1
.:' . . . : • . .. , .. "y1 . ·· .'J' ';
.,/(. J.,4...(."
the peal; amplitUl!e of the Ol:tput pul"e on re:Jd
corr,:::,pol!d~
to th~ r('g;ioll whC'rl' d.l/,/(111 lias it!:: m:Jxin.ulli ":\Iu~,
i.e., at th<' {'Pliter o)f thC' trflu"irioll \Y!lcrc .V, = 0,11 = II.,
T))(·refore. the tr:lI •..;Hion "'"gtlt m:1~' be (,(lIln'l,if'lltl~'
urfillcd will: I'c"j)C'ct tv tllf' fidel" 1I 1 [did)j~ \\"}l(>l'e tTJ/,'clll
ha:s it;: half-p<'nk Y:llu,' and thc output pu)"e hali it.: I'l';1k
amplituJe. L:;ing tlli" dd1nition the tran,.:ition lellgt!1 2b
will be J!:in'l\ by
:;?b
=
(c7J:"JdHI\H:_Il.(lI~
that i;;, by differelltiating
(12)
1n thi" rcgion, i C., 7' < T., t.h· nppropriate p:1rticJr'''; ~ee
R pl'~lk (tllough 1I0t statioll:lry) field equal to tlle co('rci\'ity lie nfter a time ( = T nHer whidl time tlley ~C'e
('\'C'l" drcrC'l\"ing fid()~ :Ie: they mo\'c ~urthcr from {he hcad
~ap.
.1
- 1I1 )
(H)a)
(I~;
(Hlb:
The form of thi", 1"C'!:ltioll"hip i ... "hO\\1l in Fig J (bl WJIl'I"C
'2b 1i:15 bren plottl'd ver.~lh ri,..:e timl' for [lrbitr~1ry kllO\\'I:
\'[lI\le,;: of 11,. II •• (Ill - lid. g. y. nnd 1'. ,-\g:lill. ! the rj"c timC' nIHl i" the timc taken for the
C,lfJ'C'lIt to ri",e hom zcro to W~ !,e>rc('lIt of it" JJ1:lximllnl
value. SuL"titutillg thi,: illto (:.?; gi\'(~,;
JlAr"y,O = (lI,/1f)
(1 -
c':' rtT ,
g
r,]
+ .r, + tmc l 9 --
• [ tilll-- 1 - - - -
Y
JI
:\IId tlll' Olllnly,"''',,: f;;r c;t!tuLtillg
(:!3}
t!I('
d('lay til11(, alill
tl';I .. -
~itj(lll
1(,lIgth Jl()\'," follow ill :I /l~:t:lIIer ... imilar tfj th:1t foJ'
Jin(':!r ri,'(' time, df''''(,1 ill('d in t i,r' prc'\-;"!\" ,"(Ort i ,):>.
EX!'I:l(J :\Il:XJ'..\L
.-\lJ cxp('r;l!1c'lIbl \\'0rk Wu" (,:llTi('d Ollt witl, rdNCJlC'C to
C,c !lIIaly,.:j.: .J>!·(·"(·II1{·d a1>o\-(' /,f'L i il,g: tu lillt'ar rj...:c tinw;;,
u-nl j.; ,,110\\-11 jll Fi~. ::! (:l) alld
u,.:jllg n circuit \'hi.ch pru\-idcd ri~e tilll(,~
1'2 (J'()JJ) 10 Il" to J 0 1))",
The dpj;IY timc tv \\,:1'; dt'tcrlllillc·d by mf'a~uring tIle time
uterY:l1 11 bel W{'en the CI'O"';(,I\'CI' poinl:, of the curn'nt
Y3\,l'form :lIId tl)(' tim!' inter\':11 t~ bet wc(,1l thc pe;lb of
he output )lul"(',,: rig, 2 f b). Frulll Fig. 2 (b I,
.
Thc
ClIlTC'llt
For thc prc,,:cllt work a is l'C'piaccd b.y b, n~ dcfil1(·d
(Ub), lIud with J'C'fl'J'ellce to Fig, 2(b), '(:!-:l) becomes
In
(25)
Tlte p:lnlml'i('r,.: u,:('o ill thc;:c ('x/k'l'imc>uts werc
I
t· = 7,j or 3i ..1 in·s- '
y = 100-:)00 pin
'2g = :jSO pill
JJ 1/ = 3300 Oc
Il < = G30 0('
D = I:.? pin
JI r =' GOO g;HI"<;
n
The. hcad fiC'll! Idtllin the g:q, JJ u ([ >
wac; dC'tcrmilled by. writillg :,:tatic tr:lIJ"jtioll" [oJ (ie., at zero tape
.y(·locity) ami rnea':lIIillg the llj,.:t:tIIcC bt'f we('11 thc I't':\k-;
of the Olllput dil'u),.;c,
\\;lnf01'l1l
\\-.~" P:(,IIl'lO!il'd
=
ID
t~ -
(11
+ I.
.lId by :ur;tllgjllt~ for the l'i,..c tim('" 1'1 :lnd 1'~ to be sueh
lint
-),(' tr.~II..:itiolll(,ligth :21, \\,;t.; dl'f'.'J'llIi:lrJ by /1lc-a,.lJ)'ill~ tll(,
o PC'T(Tllt l'ul,.:('\\'i'!liJ, .\C'(,()l'llilJ~ to BOl:yll:1J'(1 rf oi. [l~.
110 a","Ufl1(, llU writ(· IO""l''';, tlte :,C-prrc(,llt ptll,'C'\\'iJth i,.:
(2·} ,
1I('rt' :]0 Ill'lill~," tltc Jl)illillltlfH ILIII,.,ilifllJ ll'iI~tlt ill terlll':;
. tl,(' lI"y-i('a) jllllp"nil''': uf tIl(' 1l1l't1iUIll alld is gi\'CII by
Q
= '2.lI,/>,'/1"
Ex pcrilltc,'ltal
The rc"ult,: for delay time nre> ~IIOWII ill Fig, 3. The ;;olio .
calculated Y!lhl(,:5 ~lI1d the point,: ex-
lill(,,~' "~'prl"C'lIt OIC
perimeutal ynluc;:, '-\Ithou~h ;:oIHe illeoll,.:i"tellt )'(',~ult"
orcllrn:o 3:5 a re":lIlt of tlte spC'cd in,.:t:lbility ill the tapt
trall<:port u,..eo, the> agrC('n1ent bl'hn'C'n theory lind ~x
pcrimcnt "-:)" fair.
Thc I1gJ'L'cmelit b('t \\('('11 theol'Y and cxpL'rimC'nt f'JI' the
trall;.;itilJII lellglhs, !Jo-.\·cycr, \\,;1" pOf)!' ('xcc-pt at le,Jlg ri",e
timc,; ",)wl'e it \\':\,; good . .-\ po,.:"iblt· rc..."'ol1 fur tId" j,: th:lt
ill ('oll(ra...:1 to 'th(; JI'J.:y tinl<.' Jl)(';t":Ull'I1lL'!lt,.: the tr:ill..;iti'J/1
It'llgth,: \I'('f(' detcnni!lrd illdin·ctly from tilt.' pul":I·"idth,
u,..;ing (:~.-,'). The "nlidity of thi..: cquatiflll dl'p(,lId...: Oil the
n""urnptiull mad(' ill ,
60
.0
\
I
.10
'0
~o
.c
10
!
)0
0
10
20
)0
40
~
lI
toO
10
eo
100
'10
ItlS( til'll 'T.~
Fig. 4.
10 20,
ng.3.
)0
, .,n
40 :.c
100
-
I~O
tI!!'!~CuSl
Dcln~' tilllt' (lh('ort'li('nl) vel'';II'' ri~e time for "nrioll" vclocitie;8I1d,.cp:tl"a';nll" II, 0= ~liilUe,Jl. - .'"tWUt: .
ri~c
•• of. R:H
10
bOO
2
40
)0
)
lR"''''SliIO'~
U~::;lH tli)
<
~o
~
10
t..
(',UlJIp:I.i".1I\ IIi (;Xjl:'rilacllt!11 wilh tl,cu,·(.lic:ll I't"mh" ior
delltY timc ,'C1,'""
,,.
I
I ....
too
eoc
tI~:
()"POt.;Er.. i.IoL
LlNIAP
lOO
800
;:,
L~
limc.
brr.orne:: the ":U!1e n;:; the tr:lIl;:;jtion width :md Ie;.:;.: deJ}()lld(,llt on 111(' detail" oj t!,e J"l'pby I"'ON'''''''' 'fhi" m:lk('."
the n,,~ullljlt ion;.: maul' jll'('\'joll"ly more Ile'ady COfr<'Ct.
:\luItiplyillg (11) by /' well:1\'e
.
lIg), + (y' -
, yp (
--'
210' JJ ,"T
r.olD = -
U'.)
'lUg,
(lIeI'1)
-- .
2
1
4
20}-------------------7'----~~--
Thnt i~, fol' II given he'ad g:lp 'lg nnd l"eparatioll y then
pfo\'idC'~ II;; '!f.rT be !lI'lu (,Oll,t:lilt thC'lll"llJ ;,:Iwuld fC'm:lin
con;;t:lIlt. Silllibrly, fwm (1 tJh) the tran"it k'lI ]C'ngth
,;hould T(,Jl1:1in <.'OU,.:t:lllt for :l gi\"('lI H ~/II./"T. Thi,: \\"HS
jll\"(,~tigat('u experiment :dly by varyill~ 1J~. Hr. /', :l!ld T.
The ngrel'llJ{"lIt IICl'l' W:l~ bette'r than fl)1' the pre\ iou ..
rc:,ult~. Thi~ i,: to he expl'etC'cl if the tllt'ory i,: ('orrect, ",iuce
the experiment" Wl'l'e de"i:rllt'u, tn dC'llllJlI,:trate :l dependellt'c ratll('r than to u('lcrmille ab...ollltl' ,·:due,.;.
c!
.
0
,
,
20
)0
,
.,S(
40
lIH[
~o
,
bO
10
ZO
'10
•.:::>
'T. S
1'f:lI1~iti,," If"'!!.'" (thr.o)fl.'lic·:II, vel""'I' ri~(' tim!:' r"1" \'lIrillll~
v('Jocil ic.,- "ltd ~t·pal:;'il.llt, II: = ~I;O Ue, JI. = :>40 Oc. Thl.' t.lvtt~·d
Fij!. 5.
lille is
Til cortlica 1
~
II II
t: II" JOClI' 01 1',.
Figs . .J :lIId .i "how deby time and trall;.:itioll 1l'Il~th time,.; tli('}"C' i~ 110 di"<.'ulltilluit~· ill the cun'C''':, i.e., there i~
ri"e tillH' fol' JI:lmnll'tc'r": t.'"pi<.'al of :1 .It ig-h dl'lI"i ty 110 criti<.':ll ri..;(' t imc.
J'rom Fig ;"1 tbl' puJ,·l'lI"idth ali(I IIel\ ('(' tIle output \·(,1',.u;:;
di,:k rC'('oruill~ l'~·"t(·1l1 u,.:illg thin mC't:tllie film". 1/, \\":1:'
cllo:'"(,11 ill c:lcll <.'a,:C' "'Uell tJI:l~. for Ze'l"O ri,.:(' timC', the tfall- Jladdn~ dl'lI"ity (,~ln'e may bl' obtaillC't! u,:illl!; (:?;, i. For
lilll'ar l"i~e timl·...: tlll'rl' i" lin ch:IlI~C' ill I) :111(1 hCIl(,(, IHI dlall!!;('
~itiCJJl": \WI'C' writ tl'lI ill tIll' m:txillllllll 11l":Scl li!'ld ~1':ldi(·IIt.
The gl":ldil'ut" (If t hl' (,lIfn'~ oi ri~. :; Tr • .:\1:--0 for expol1C'l1ti:ll I'i,,('
'·(·r~1.1!;
':-~r-:7,-~,~;
t IJ (lIt 1'-':1\"1:1_ t11\' '·:7;t~' 1\' .. lll· 1 :'L~',
I~~L ::-;:1:";,::.::, t!~~ll7:~,[ til(' \\-rittnUI;lllllgtL n.I:----::tS-l,c ,.\lell tll;\t the jllti-('\\-idtil i ..
!:~2 + 9~Y' :lIIJ i~_!l('11C(' indl'i1{'lI{lrlll of ri~c tlrn~
-irk r;\!I"~ T11~-:ibo\'{>--':l)()\\::..: th-nta ri;;;e time equal
I"iug :>. tr:lrkition kng1h :2b npproximntely twice
ilue of the medium would be' nn optimum_
Fig. -1 the delay time i~ ollly z('ro ",I\(.'u the rise
zero. Since in n rc:>.l sy:4cm. timing diRicultics
y decide tIl(' mnximulll usable pncking dcn!=ity.
:ty-time cOIl"iocr;\tioll': mn." OftCll mean th:>.t a
ri:Il~th :lnd dl'lay time on
1~e to be' cktC'rmilJ('d ill alli\I~·tie form :l.Ilrl fin cx-·
'11 for cl'iti(':t1 ri,,' till1(, to be derin:d which is acCYCIl fur low "c'p:1I":1tioll':.
:1110101''': han· ,,).u'.\"n that the re.~lllt" J!;i"(,11 may hC'
o COIl.jl~ll"e tl.l' erf('('t:-; of ,.di-d.!ma~lI('tization "'ith
f iillite flux ri.;c time.
t
tin)c
\
ri"e t.ime
I.
delay time
;
Itl
1\
T, crit i~al ri,.e time
H, longitudillnl componellt of hC:1d field
Hz maximum longitudill:ll field seen by p:1rticle
/I. head field within gap (I > T) ! .
He coereivity of medium
olio retentivity of medium
.11. remaneut magnetization.
T
ACKXOWLEDG~[EXT
The author...: ,,;,:h to thmtk :'II. Al'plalld for writing' the
computt>r prog,'ams nnd the director:" of Iut.l'l'II:ltiOIl:l1
('omputer", Limit,·d for tilcir permi~itHl,tl) pubJi~h.
-,'
,
I
.
REFEnEXCF.S
Dn\'i('~, ailUll. K :\licldll'tOIl, "A thf:nry
of digital map.eti(' rel"oruinc: 011 Ilwlallir Iih'l~," J1::1::£ Trall.s.
J/o!1I1llirs. vol. ~L\C;-2. pp. 1-.5. \I:m·h 1%';.
.
(2) 1. Steill. "Gl'Il(,l":Jlizcd plIl.(' r('conlill!!;:' Il.TE TrailS. Elefiruni!:
COlli Jlldrr.. , " .. I. EC-IZ. I'p. 7i-!':!. AIJI'il JDli:).
[3} J. 1l. Herbert, "A cOIllJluter >iillllll:otioll r,j tlt~ lIl'ISII~ti(' fl·(,on!-
(1) P.I. BOllyhard, A. Y.
ing pro('('~~." Prot'. J!Jr}.j ]STI::Il.1/J.G
D.C, J, P/>' ].~1-1-15-1-S.
(."III/-
(Wu~hillgtOIl.
n.
]\O~ty~ltYIi. ".-\ th"o!'eli"al 1I10<1r\ for ;1 fl'l:lIItitali\'(' C\'~dll:l
lion of 11l:1j!Il<'li.' rc('orr.illl! .~-;(,II1-'-' I f.'!;';;" Tral/.~ . .lJ(l9"rtlc~,
....01. :\/.-\(i-:!.l'p. 2;~1;"'2-t:? :'-=('!>ll'llIl,pr J\I.;li.
Ii)} J. J. :'IliY:lI:1 :lIld 1:. Jl. 1I:1nc1. "Tlte- l"('l',,"lillS Ilad rep!(.dllr·
tion of ~iI;IIfll .. Oli ma~Jl('lir lIlediulIl 1I"ill~ ~:Ii IIr:olif):,-tyP('
rc('ordi"i!." JltI-: TrailS. EI,·.lrVllir ('oIll/J"I..,., yol. EC-S, pp.
(4)
15~ Ilj~l, JIl;t(' l!'l:)~),
E. Lt·p flnfi X, X. TnJnl"ll. "'1'10" f'f1'C'''. f,r ' ..... : ,~Lc;I.i r··:.:
011 iiI(' ,.;,\itt·hi:,!! "j thill fl:c'lall:c iil;;l-:' I /;'J~'E
Tron.~ . .l/U!mr!lr,;, VIt\. :\1.\(,;--1. PI'· :?7i-~'IJ. ;-:"l'tl.'l1iiJ"r 1 }t....
17} L. E. FI\~·. "Twit dillll'll~i(lllal I hpe.r." of tI, .., n·,'ordilll! ill':l'\,"
.
Ill/efl/ail. COl//. 011 .1[";I,,,lic 1:~"'):"di'!fI, JIll. il-ii, .1111\, l:j"~J.
(S] S. Ullill:"!'f. "U" the rl".·oh·illg pOWl'r ill tI,e PI,W!'''':; II;' "l~!:,lf'tie
f(·('nnlillg." Tij·/,J.r ..\'(·d. I,'v·liuy('n .• V{lJ. :!~, PI', :?fJ-~~, J,L.llary
]9.")i.
I!lJ A. Y: Jlavi\'~, '·Elre!:l. I'f thc wrilillt:; pr".:f:-.- n',,1 ,)'1)--1:11;'; O!I
the tilllilll! uc'cllrnt:.\· of p\ll.('~ ill
dil!i;:l! r(·.·.)).lil1l;.·· / J:.'f.T
Trall.Y. J1otJ",lirs. '·O\. ~J..\(;-;~, pp. :!Ii-·:?:?:!, ;':(·jJtC:ur..l·!' 1!H;7.
(to] A. l;. lIoagl:lI,d. 1)'"9/111/ J/"!/fIIlic i:uunlill'.l. bL cu. X('\\'
York: \Yilcy, PI). l:?lH:?:?
(6)
J.
nJIll)"'I,,·I ..
~ O~I~:SCL:\1Tl:E
ollgitl1dilli11 coor,lill:\1c' {iwtl ill nH'Jium
OI;git'Jclin:ll c()('J'(iin:ltc·{jxl'd re\:1tin· to gap center
Ic'ad to In('di:'lI1i "'('p:ll"atioll
~;:Ip with!1
Jl'IH:1gnC'til:ltion t,ran;.:itioll k~lgth
f:rall..:it !(JJi kl'gth
xnz
i
I
i
I
i
~
)
I
r
I"
PREPARED BY • CHARLES C. LU
75
70
.
~-&~l··· IT
60
4--
'
t
.I-
7'
--3
:::I
:=
O.
E
~
t1 ---~-I
. .
,
& EVALUATION
--+--]-
,I
I ___ ~ __ 1 ____ , _
I
I
LAB
~
~t--1F
_
21'
____ .: __
1
J--L
I
...
,
1
_
I
- I
10
w 0 ••••••••.•••••
r
'-t-7'
--ii-i-f-
--
L
I ~ ~ - T'----'--'+-+-----;
~-
-----4-...f--30
j
15
iO
i
I
45
TEST
1
--- -- -'---l
__ ,___
j--::-Lj::-t ;' I r- 1--
55
~ 50
E
---- ---
-l. -.' 'j ,.·r-·--r---- J-
".
65
0:
J
I
.--i333MB HD BUP"l 04. 238 IN R (10)
.
I DlIllI Arm Ser. N°'333MB HD BUP"l
--~ Helld No.
3.
"
D,~c 5 .... Nt>.
433-1984-137
.
• • • • • • ~;1le:
JULY 11. 1980
'. t
& MEDIA
HEAD
95
sa
~
.-_
'.
l-t_~~J~_ .~ ····<.r:- ._- . !---~
=LJ_1~_
~_+
-1- --
-
In
-+1-1
'0
'}';
...!...
'":..
o
1;;
40
---
.~
L
~
~ 35
a:
-~', -:~- . --.
1- --
.
---·f ~-
~
I
-f
. ---- ,.:.-1"-::-~_-__
•
~
1f)
3a
25
20
----,r:
- .-----.. -.[. "'. . .
--0.-
L . _ _ _ J__
15
-- .... J ..
,::,~L
I
I
~--t!
I I
- . ....
r.
"ok
L---- T·t-··~.··
1
JS
1 1"
40
'--l
45
10
5
.... -~-. 1-.-------L- .' - - ·--·---1-- ._--
'--""""1"
I
'
I
o
2a
22
24
26
28
30
i'
I,
32,
34
..... ....
'.:
I--~I
:
LL'
;_L_
38
38
40
42
44' 48
Write Current (ma)
48
i
---....j--:.•. ~ "
50
.•,
52
54
----....
i
1
,_
56
58
60
62
. 64
:;:..
...~
J . .,--"--"
.
,
f
"
Fig. 6-0sei:rogram 01 an isolated read pl.:l.1:c.
•
'.'~
;:=:-- ~-.""'-.
10 1 - - - - ' - - - - 1 ·
;.
0
~-
~
-
. ,I
.--.----
-. ·1
.'
--_.-
~
III
..•- ......
;
•
.. '
t··
~
r ....
; ..•.. :,
.
.
~- ...
f.
'r~::
.
Ij' -.
I
...
I
(
1
).·1.
~f !
I
Tlleor.tic:ol
...
i
'it,hiI' '. ___ _
. -.---.-=-~
j /~..:ri_~..'. ~~_.__ .;_-'-__
-
-.-L.
•
--------~"
c,~--------------
'j
f
: . •.•.
.1 .. --
6Or---------~
c
.
.~~
., .
•
~:=-'-'
-:
I
___
. ___ J __
~
~~ •• :.~ :i'~"'~
. :...... :.:,:
"
e. e~Th~e'ie:OI
-:I
,...tlil ompli'"de
o
.
.
..
..
'
,---,
'1'
..:. . _. 1_. L -. 1.....;,....
.. ...' ....
'
.:;;-'---
- - . - - .--.--- -
I ,.,
...,,?'
......:: .:.--
~
--.:----- -'
.': .n... : '
.
------.-
~
•
.'
:
I
100
r'
.
/0
201------~-----'--..
II
,;
i
I':
;
. -.-! . . ~-
,~
._---"'-
.
..Jol-------
. ·y~--1--....,.-'300
7
I
°o·~~--~----L----~-----~~~~-~~-----L-----~----~-~--~--
200
,-
t"
400
600
1;.
800 ~,. 1000 . 1200 ';"1400
R.e:!),din; Clen'it)' .bils/in..
I~"
1600
1800·
2000
Fig. 7-Comparison 01 experimental and thcClretical results for bit shi'" and amplitude. The dots
represent experimental data tak.en with a di~ital.readout osciIioseope.
..
-
1200 in./sec, and write current was 100 mao A conwherc:n - O. *1. =.:2. :3 ••••• Att- 0 there is a
.. 'tin~ous sequence of l's was used to test for bit
_ .. maximumor
amplitude. , To test (or bit shift. the format
0000000)
) 0000000 Wd agreement between predicted values and test results. 0
8A (-Wcxp[-(n:ll- I} )( 100 (8)
Acknowred:menls
Equation (8) has also been programmed on the
The :luthor ·".. ishes to acknowledge the: assist~nce or Donald J.
7090. The resulting plot of hi: amplitude versus
Kaslella. who wrote: the: prot' rams refc:rred to in the t.:xt. :md
T/7 is given in Fig. 4.
l:Ihn D. BZlrlleu. who usi.sted durin, the labor:ltor) CV:llu3tJol1.
~:-/(or; ·?t.~(~ij·~~pi~(nT)%jQ
{~i:
.-0
Experimental VcrHication
The thcordiC;Jl results described above were
verified by. runnin£. laborator~ tests on an actual
read he:< 10 _ 1 X 1.25'
",nlll..·\"
"rial' •. :
,wnL in
- 1.01 hll,
1.25' - 1
C. - 0.100 X 10 _ I ~ 1.25'
'Viii
-
- O.02~:! .. 1
IOODHMS
,
10 - 1
1
. C. - 0.100 X v'lo X 1.251 _ I
- 1.01 .. I
BI - 200(10 - 1) - 1.800 ohma
1
B. - 200 X 10 _ 1 - 22.2 ohma
Fro. 17.17. Bridced-T equaliaer lor Eumpie 17.'-
(BeIer to Fip. 17.17 IUId Ii."
FUJ
,.
10
-..... J
~
~
l ,
'lor
Ihu
out
,
I
:
:
12
5
~
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(
r
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'K
6xl'
phn
.
..
I
I
4
I
o
•
00
tOOO
:
~
~
10.000
•00.000
n£OUEIfCY '" CYCLES PER SECOND
Fro. 17;18. InaertioD-Ioea characteristic. of Detwork .hown in Fia. 17.17.
17.1. Ph.se Equalizers. The typcs of plw!e equ&lizens treated are thoS(' ,,'
theoretically introduce either'zcro or a fixed amount of attenuation at all frcll ll '· ...
They can therefore be added to existing circuit. for phaae correction withoul
torting the gain characteristics.
The lhape of electrical impulses \\'hich contain many frequency component! r.o:,
cliatorted in pnssing through an electrical cireuit even thougb the circuit has Ih.· •
pin for the different frequency component.. Ir such is the caBe, the distor l "
due to unequal transmission debys for the different frequency components, .
type of distortion is called pluue dialortion and can be corrected by adding a 111'1'
which will cause the total tranSmission period for all frequencies to be identicll!' •
added network must, therefore, be a network in which the phaae cham""'"
can be con trolled.
Equal trnnsmill!lion periods for different frequency componcnt.a throu~h at"
Itipulatea that tltl' circuit must introdueceither: no pllA8C shift or an amount of I
.hilt which is dil;ectly proportional to frequency. This is idcnt.icill to .tati"~
tbe-tranamission period must be either zero or a conataDt amount at all frequo'
"""- ..
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1.16 X!!.=-! X
v'iO
7.18 X
v'iO
10 - 1
).lo9
X·
Four differeDt configurationa of pbue equaiiHnl l ale MOwn in Fip. 17.19 to 17.21.
be noted that thc lour-terminal network. can be uacd in only those applicalions in which the input and output circuita are either both balanced or are in DO way
connected to each other.
.
The cin:uit in Fig.·17.1!! introduces an iDIICrtioD loa 016 db and does not have con,\alit input and output impedances .. a functioD or frequency. In addition, the
~".:--
1.251 -
I~ pould
I
X 1.251 1.251
- 4O.2111b
1
,
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X 1.251 - 1
10 - I
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Viii
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i.I09 X 10.- 1 X
v'iO
- 1.01,.,
+--_
IIIICIIC f" IS THC FliCqUCNCT lIT IIHICH
TIlE /lHASC Sltl" , IS CtWAJ. 1O-W
"HltH NETIIOIIIf PHASC SHirr
IS-~
1M ' • . , • (-( . :
. :
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umeE "
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I'HlIIC f" IS TN!' FII!'~NCr
. , AT "lfl'If TIf!' N£TIIOIIK
r t '
1\70 '"'f.i
'0
0
II. III.DGED·T fOU ....AU.T 10
too,poo
t
';
a,
!
·twork ahOWJI in Fia. 17.17.
:1
•
0
:lECOIIID
of
I'
I
e,
-:y componenta through a cirl'uil
>IUl.9C shift or an amount of Jlh:\.This is identiclll to Btatin~ tb:
I'
1-.'
Flo. 17.20. Phi.e..hilt network with
MI'O attenuation.
Refer to Fia.
17.22 for phaae characteristics.
Flo. 17.19. Phase equalizer with a
bed iIl.,rtion lou or 6 db. The
phaae characteristic! are exactly
the .ame as for the lattice network
ahown. ill Fia. 17.20, provided the
output ia not loaded.
I
'Illy frequency components can hr
though the circuit has the ISnt·'
IUch is the c:aac, the distortion ~
nt frequency components. Tit"
be corrected by adding a net",""rk
lrequenci~ to be identical. Thw~ich the phue characteriafi."
..!"
C • .1.-
T
I 'I
}ualiu!rs treated arc thoae whirll
/, of attenuation at all lrequl'nril'J
ior. phase conection without dis·
"
"
!.
'.-If •.
,/1"
IIIIC"C f., IS TNC FII£IJVCNCY lIT
~·mc
(Refer to Fip. 17.17 doIId 17.18.)
).000
,i
c
II
1
1.25 1 - 1
00(10 - 1) - 1,800 ohma
1
~ X:iii"-=-i - 22.2 ohma
V
17-15
A'l'TEN'O'ATORS AND EQUALlZEns
i' HANDBOOK
(rF
17.21. Phue-4hift netwDrk with ;erlt·.ttenuation.
diaraeteriatics.
FlO.
Refer to Fia. 17.23 lor ph...
pb'ue-ehift curve for the eircuit, Fig. 17.22, is bued on there being DO terminAting
ilnpeda.nce.
A center-tapped transformer accondary winding could be IIUbstituted for the
reaiatorin Fig. 17.19, provided the IUIlplitude and phue characteriatic:a of the t.ran&former were acceptable.
The networks shown in Figa. 17.20 and 17.21 have constant input. and output charteteriatic impedances .. a function· of frequency and provide phue shilt without.
attenuation. Figures 17.22 and 17.23 indicate the phase characteristics which can
be obtained.
•
The phue equ&lizera shown in Figs. 17.19 to 17.21 introduce a lagging phase ahift.
I
Zlatant amount at all lrequrnl'i.",
Th_ networb are aho referred to .. all-pa.u fitt.e ....
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FlO. 17.22. I'h:\1!e ,IiUt In an all.palllI filter of, tho type .hown In Fil. 17.20.
_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ . _ .. ~' .1 • • • . _ . .
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17.23: Phase ehift In
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all-plIss filter of the type IIhown In Flc. 17.:!I.
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17"';18
ELECTRONIC DESIG~Ens' HANDBOOK
&sampl. IT.I
,..
A-ume that intelliltt'nre must he tranamittod in the 10- t.o 2O-kc frequency band anI!
that the circuit pmplo)'ed introdu"e!I phue .hilt in IlCcordancp with the (DUO_in, tabulation,
P44M S4i/t
-~
-43,S·
-63"
F rfJtl1lrrtCfl
10 kc
IS kc
20 kc
Deeian a phaae equali&er 01 the lattice type with a chacaderiat.lc impedance of 1.000 ohms
- for uae with tbis circuit.
Pri:
Bolwitm
1. Determine the required phILlIe characterilltiCl or the phue equ".\izer.
The departure from linear phn..~e shift &8 a function or frequency for the f'rutin, circuit
must first be determined. Since the phue shift at 20 kc is -63°, the phase shift at 10 kc
ahould be H X -r.a. or -31.5°, and the pha'le ahilt at 15 kc abould he ~~ X -113, or
-47.25°. The exiatinc network therefuro inLruUuceto; a ph&ae error of +4.5° at 10 kc and
+3.75° at 16 kc.
PAlueErrtn'
FrfJtl1lrrtCJl
10 kc
+4,5°
15 kc
+3.75°
0'"
20kc
18.1.
18.2.
18.3.
18.t.
18.G. 1
n. phue equaliJler mWlt therefore exhibit the mverae eharacteriatiCll, i.e..
P44M Errur
Fr~
-t.5°
10 kc
15 kc
20kc
-1.76·
0'"
, I
'I
j
I
I
2. Determine from Filr~. 17.22 and 17.2:l il the required conditions tabulated in atep I
can be aatisfied with either of the network.! shm,·n in Jo'icI. 17.20 or 17.21.
Since the net..-ork ahown in Fic. 17.20 is aim!>ler, the curve &boWD in Fic. 17.22 abould
tint be examined.
The procedure is to determine if the phase ,bift in the equali&er at any three values of
III.. which are related in th .. ~'lme proportion. as are· 10. 15. and 20 kc • ..-m depart from
linear phase ,hift as a functil)n of r~uenC')' by t.he desired amount. A 1.. _ experimental
SJ'Oups of values of III. reveal that. the phlLlSe ,hilts for III. equal to 0.4, 0.6. and 0.8 are
equal to -43, -61.5. and _77°, respectively. and &ati"f), the .pecified requirements, This
is true since a phase shift of _77° at /1/. - 0.8 .requu- that the p" __ ahift ~ -38.5 and
-57.75° at III. equal to 0.4 and 0.6. ~peoC'tively, for linear. phase chararter~tics. The
phase equalizer therefore introdUCe!< phL~ erro", of -4.5 and-3.7lio "·hen /1/. ~ equal
t.o 0.4 and 0.6. repectively. It should be apparent that the three values of /1/.. that is.
0.4.0.6, and 0.8, corr."pond to/ beina: equal to 10.15. and 20 kc, respectively,
3. Determine /. and the values lor the lAttice clemente.
f. -
0.8 (at/ - 20 kc)
I. -
25 kc
From
~
17.22
a __1_ _ .. X 10-1
26,000
From Fie. 17.20
L _ of X 10-' X 10'
2 X 3.14
- 6.37 X 10-' henry, or 6.37 roh
11.37 X 10-'
C 10'
- 8.,370 X 10- 1• farad, or 6,370 I'"r
The lattice network ia .hown in FiC. 17.24.
4 a:;m w
I,
l
--
\--./ C. P. lGGi..h,
.,.,. ...... ,<
--
Lo.:.'n(:-t,.;~ r'\l',i;;,.StiCS ~;~. .: ~:t-·..,
.. e
L:..;
.'to.~
;
t
•
"a
."
...
-.
..'
"
'.
.
Side·by·side comparison of filter characteristics can help the"designer to choose wisely
between the available types of networks.
This article displays phase and group delay
as well as magnitude characteristics.
with'the restriction that the characteristic be monotonic.
Lumped-Parameter Low-Pass Filters
The filters discussed here are all low-pass all-pole
networks. The transfer function for such a network
is of the form:
"
A
"UMBER or different types of networks are used to
implement low-p:Jss filters. and designers often need
to compare the various types for possible use in a
M agn itude-versus-frequency
given application.
characterist:ci are usually well known. but less information h3s 'been published on phase response
and group delay; yet the latter characteristics are
often equally important. This article describes-the
phase and dela)' characteristics of a number of important modern filter types so that they can be easily
evaluated and compared.
.
. The network types considered here include Butterworth or maximally flat filters and Chebyshev or
equi.ripple filters [1-5J; Bessel. Thompson. or maximally fbt delay fi!ters (6-8J; transitional Butterworth-Thompson filters [9J; and Legendre. optimum
monotonic. or L-type filters [10-12).
The firstthrec: types are widely known. (13] The
transitional Buttef\\orth-Thompson filLer attempts
to combine tht: best features of the Butterworth and
Bessel filters. The design is b:lsed on a map that
smoothly transforms the filter poles from the Butlerworth loc~tions to thl! normalized Bessel locaiions
as a paraml:ler III ch:lnges from 0 to I. The transitional Bulterv.orth-Thompson poles are in various
compromise locations defined by values of m between 0 and L
The Legendre characteristic attempts to combine
the best characieristics of the Butterworth and
Chebyshev characteristics.
Here. the stopbandmagnitude characteristic is made as steep as possible
" 6bl"~
-f
Filter designers fac'e m'any d;fflcult choices
in matching available deSign techniques to
speCific apphcat~ons" Graphical compari~s of lecnniq~esemphasize their limita·
bons and potentialitIes"
~~!C'ti
-
K
H(s) - Q(s)
K
- (s - s,)(s -
S2~:"(S .-
(1)
s,,)
where Q(s) is a polynomial in s of order n (n is also
the order of the filter). and $, are the poles. whose
locations determine the characteristics of the filter.
When subjected to sinusoidal input. the magnitude.
phase. and group delay of the net\\ ork are found by
selling s - jw. Then
o
~f~~~~----~--·--·~·"~'~'~·~~~---
,
f
L
----...lai---~_J:c..-t------e:f
-.
,
<
I
'I
lu'
! .
r .o, .;..
..' ' •.••.
J i
t _______
,;,
. ..
-
"
.
~
• •••• "
.. ....
• to-
,
•
."
'
__
~~
__ ______ __ __
~
~
~
~
}
""----_._--------..
0
".
14
14
..
.'--------------.--~
--~---
~
.
Cntbt'.".'v •
O.I·db rip;lle
12
12
..
..,...-
.
uK)
..,()
...
~
!2
A
i
c'5
4
Z
2r
0
o
01
-
I
I
6
5
4
A
8
0<
-Wt
~
nl 7
. ~ 6
"'6
I
lIl).
i--"
.
I
I
3
2
I
I
1
I!
I....
! I.
I
1~
li~1
0.1
If
I •
I). 'K
...·s
~s
II
i
.
•
J
I
I
a
I
r
.
6
,,.7
2
.... rod/sec
.6
.
,5.,413 ;2 ;
-.
t
.. -
I
~
I .
I
~
"'"
","-.
-
:---....
..........
I......!...I
I
, ... rad/sec
..
12
.. '0
•...
Transit'ior.al
ButterworthT"ompson
I
I
4
.'5
/~ 2
I,
z
o
01
",,
,
~I I
W-'I;~!-- !
I
I
I,
I
;
I
!
I
~--L-....l.-I~I ~~.,.........:.---l:;
: : : : : : : :'"'= L-~.i
0:;-;-1
QI
'.
I
I
Bessel
·1
5
• S
... rad/s,:
14
I
;
I
I
5
",roCl/sec
)
L--{·l;(~\..~_________________
_
:::t;c.:.f4~t. '._-' t~\~~~
_ _ _ _ _ _ _~.......~_ _ __ . . . _ _ _ _ _ ~'_e_ ' - -_ _ _ _
~..:_._
_
. . .'
.
"0
C~by~h~v.
O.I·db ,ippl,
,..
CO~----;-~~~~~~~~~
t200~----~~;-~-1~~~~~~
....
..
r -........- - i
..... 300~-----+--_1--~~~~~\~--~~
i
g
~
~400'~----~--_r_1~~~~Hr~~~--~~~
~400~-----i--~r--t-+-+-t~~~~~~~==~·-;
6OO10~-.1----~--~-L~-L~~1~----~--~~~
COOI~----~--L-~~~-LU-----~~~~-:5
ai,
0.1
rod/sec:
I
.,rod/slle
0
.... leo
.
~2CO
"D
....
i:
,~.~----~~~~1_~;_~~~~--+-
..
o
Co
~3.nc~-----4~--~_+_i_1_f~~~----+_~~~~
=300
c
.c
--~----
15~~----1-___~r+~rri~--~
-,.-----
~
400
500
soc0.1
5
0
I
_~
00
I
'Tron$ilionol
,ThomrOn,
i
I
I
......,.
~
~I......
COO
500
600
01
.
,
.. , rod/sec
LtQer:dre
Butf~rworlh-
r~~;:r:j
~NJ'
......
200
I
_, rod/see
.......
~200~----4----~~-+-T~~~~~~~.-;--i-;
"D
-n'"
r-,.., :,-r':-:
4.t(!.(~.::
'C'(~l t~.;.I·~·,
-_.
~:t
. e.
~
J'
--~-----~----.-----"--'-------'-'"
I
o
-
'flebyshtv.
, O,I-@ ripple
I
li~ I
1'\\\1 I
, ~ \1,\;21
If
-5
I
'20
-30
oi---
I II
Chebyshev.
I
!
,A,
17:~~\r' 1.1
I
... rad/se:
!
2-db r,pple ;
/:;.~
I
-~
0.1
r
l\\4~
-25
"I
,~
j
II '\\ \\
I ,\\\ \ 1\ I
i 'l 1\ \ \ I "{n' !
/;- l\\5\4l3 ,~ I
I
II
I
I
I
2:
'.
-30
0.1
I
·25,1----+--+-+-~~~~--
~~~.I--~~~.,-,~)--~~.~.~-~~~;~'~~W'I----~~--~5
... rod/sec
•... rod/sec
,
o
r- r-r--I--
I
'I
.1
,
c
~"
-5
.
,
•
6
I\\~
~~3
01
:0
'~"5
o
:Ii
·20
7
01
I,
,
I
l\\\1 :~'2 I
I
1\\ I
6\ V~
3
1,5
-:30
.
\\\ \"
I
·25
4
-30
'Q
r
LA:9l! n dre
I;1~
,\
'Q
.;·!O
I
IIII
I i'f1\ I
.D
\\n'2
-25
I
Bessel
I
.,. rod ISfe
)
,
1
i
... ... ",.. _"..
~~
-
'
.......
......."'.
r---'-'-
• • ,
,
iJ .. , ..... (.: •. :'.·.;,J ... l.Cl< "';uhS
• ~i'
.. ,
.'2
..
.
8"III,worlh
I
..
.. ...
......
·.
"'~
11.4
.
, ••• 'o(l.101" ;0.707'
.
.-
.'3
..
.~
....
. ' ••• ' •.0.9239' ;0.3821
.. a.' • • 0.3827 ,,0.9239
" .. \.0000' /0
'&.I,-O.~OO ,,0.8660
.
..
..
" ....0000·'0
'1,1'-0.0090' ;0.5818
.a•• ··O' 3090.,0.9~1I
' •.' ·\.0000,,0
· ' •• 1' ·O.gG!,\'l· ;0.2~B8
' •• 1"0.9010' iO.4339
'.,5 .·0.r.23~· iO. 7810
".' '-0.7011 , iO.7071
·-O.2~00'10. 9(;59
'D .•
'.,,'·0.222~' iO
•
:
CfI.llf,hew,
O. I • dll rippl.
..
.
\
Chtll"I1.",
2- db rippll
.
"
-.
..
'.
.""'~0.3741'/O.7572
'a•• '-0.2117' ;0.9254'
.
,
.'
'.,1 ·-0.5251' ;0.3833
'. "0.697'9,,0
... '1,1,-0.3489'-.,.jO.8603
""'. ,-0.6104 "0.7106
..
. " ,-0.4749-;0
' ••1"0.3842' iO.5884
••••• -0.1467' ;0.952'
.
.'
' •• '0.2157' /0
'I,s' ·0.174~· jO.~946
,
'4" •• 0.0666 6 ;0.9621
. ".1 '-0.240Ci' ;0.3096
'. '-0.3572';0
'.,s' - 0.1786,,0.8938
'S.4' '0.1029 6 iO.94OO
l,o",lIiollol
fl ""r' wo,III·
I" • •
-0.8615 - 10.6977
TI\~"".
'. '-1.1249,,0
'u'·0.694Z' ;0.9368
.
' •• & ',1.0858'
'I.'
;0.3987
"0.5843*,1.0605 .
•
't.'
,,0.1738 ~ 'O·Zr.09
fl.4 ~ ·0.IZ72' 10.71Z8
· 1,.• '·O.046~-iP·9737
.
· .
•
'4,1'-0.5103,,1.1442
:
" .·1.50Z3.,0
'.,S' -1.3008 ,,0.7179
.4 •••• 0.9576. jl,~nll
~"a
-
..
,
"
'.,.'·1,1016. JO,£36~
eu .. 1
;
t
. ".1 1'-1.:5100· 10.410Z
'". ,. 0.99~2 * i 1.2571
.
.·I,:m6.*jO,3209
•
~l'" '1.3019' /0.9715
!5:. ' -0.9307' i
I . 6620
I,
.·I.G827 * 10
'1".·,.6104 -;05886
".",-1.3715 *' 1.1904
\S,.
,
,
..
." '-0.6200 • jO
'. lz,s··0.3450*,O.9010
..
l-----.._
-
1
,
',.,'·0.9089 - j 1.8346
"
'.
r
~
' ••r' • 0.Ol43' iO. 9001
.•
.'1 "-1.3226 6 ,0
',.s· -1.0474 */0.9992
J
'.'. '-0.15014 '/0
'.,,'-0.1391 ';0.4364
'4,$' -0.0962· ;0.7065
. fl,z
'. '-1.1771 '/0
'z.s "1.0059' ;0.6428
:1.
• ·0.3~27' fO
'I.S' -0.3178 • jO'I:\41
'4,$'-0.2199 ~j07022
. ., ..,' - O.07S~ ~ iO.97~4
"
'-0.3916' iO.259O
'1." '0.28(,7 "0.7076
'·0.1049'jO.96(;6
••• t
,
..
Lt 9. n
9749
p
;
. .
,
I
....
,.'1
11'6
".1 •-0.'5'500 * j0.3590
's" • '0.2320 *,0.9460
_.
.-
". '-0.4680*,0
' •• 1
'-0.4390· ;0.2400
'0.3080' ;0.5890
. ",.' -0.3090" jO.6900
'.,,"0.1540,,0.9680
15.. ··0'1I~Z *,0.9180
'ZtS '
-
..
.'
U{jo.)) -
-_._-_. . _ .•-" ... _-_ ...
(j"l - IdUo.) - J~)' ··U"" - J.)
~'1.bHtU;J, ,;~ ... r~..::ctl'\i;';$., tl.~~t ch~r.!I.~~~i":l;.. :\,
-----------------------
,roup dd:.l) s. :lnd norm:.!Jzcd pole locations for
various filter t) pes arc: shown in the 3ccomp:.lnj inf
panels. Information has been pcbl!shed else\\ here'
on the transient responses of the Butterworth.
Chebyshe\', and Bessel filters [14] and of the transi:·
tional Butterworth-Thompson filler. [9] H"wever,
these sources use different frequency normalizations
from the one used in this :lfticle.
The actual time delay of any filter may be found
easily by dividing the normalized group delay by the
cutoff rrequency. Thus. if the delay of a normalized
filter is I, seconds at a particular frequency, the
delay of the filter with a cutoff or I~ cps is
K
(M"~I
XMlf¢>l ) .. ·(M./4>.)
---;.;;;....--.
•
'!.
•
K
M(w)/~(wf
where k is a constant and
M(w) - M,Ml ..• M.
+
.(fII) - ~I
•
MJ~, - 'fil -
~l
+ ... +
" - 'fil - (.,
- -'1 + J(fII 10 that
~.
+ JfII,)
fII,)
./
. • i,/fllc -
"jtll + (w - fII;)l
.M,(fII) -
and
The relationship bet"cen M,. tT" s;. andt/); is shown
in the figure. The magnitude and phase ofthe transfer function H(jw) are:
I H()w) I
K
K
-M(fII) - -:.:-----.;;..;---
IT
../
I-I
..
tI/
+
(fil - w;)l
•
'.1
tan-I (
w -
101.)
(II.
(4)
- tI;
The group d.elay is de.fined as
d,.
" - fw I-arg (H(jw)JI - dw.
(5)
The figure and Eq (2) show that the total phase at
frequency w is
.
(
w -
w,)
- tI;
Differentiating~
(6)
~
',(w) - .£-
./
'!" til + (w I
.;
w;)l"
(1)
Thus. when the pole locations are known. the group
delay can be found by a simple summation.
Normaliution
characteristics given in this article have common norma.Jizations in both magnitude and frequency so that the results are comparable for the
various filter types. The magni!ude is normalized so
that its maximum v:1lue is I for all valu'es of w. This
maximum usually occurs at w ;,. 0 so that H(O) - I:
in fact, the .one exception to this rule is the Chebyshev filter for n odd~ The characteristics are riormalized in frequency so that the 3-dh toss point
occurs at '" - I. It should bl! noted that. althuugh
t~is norm~lization is usual for Butterworth arid
L~gendrc fil,ers, it is not the one cU~lom:.tril)' used
r.9L~t:!Fb)'hc\', Bessel, or transitional Butterworthf_hp_~ps~>n filters.
•
•
S"n,hrsis of Plluil-r Nr,,,·od.;s, E. A. Quillemin. John Wile)"'
" Sons. Inc.• t-:e ...... or" (1957).
(2). Nr,lfowJ.; Synl/;t"sis. N. Balabaman. Prentice· Hall. Inc .•
Engle"'ood Cliffs. K J. (\9~S).
[31. N~'Ifo·ork S,·nthrsis. D. F. Tun!e. Jr.• Vol I. John Wile)' &;
Son$. Inc.• Ne,", Yorl.. (1958).
(41. N~, ....orJ.; ,fna/pis ar.t! Synlhtsis. L. Weinberg. McGra ...·•
Hill Book Co .• Inc .• Se'4 York (1962).
[SI. "The Phase and En\·el"p.: Del .. )' of Bulter\loorth and
Tcheb)"~heff Filters:· H. J. Orch:srd. IRE Trllfn. on CirevilS Th~orJ·. Vol CT·7. June 1960. PI'I If-O. 181.
(6). "Delay t-:etworb Hon'ing Ma!\imlilly FI:st Frcquenc}
Characteristics:· W. E. Thompson. Proc. lEE. Vol 96.
,PI.. c. 19~9. pp 48i -490.
.,
(7j. ··Net,,·urks with M:s'{im:slly FI:st Delay:' W. E. Thompson. Wjrrltss Engillrtr. Vol 29. October 195:!. PI" 2~6-:!6~.
(II. "S)'nthesis of Constant-Time·Dc:JilY Ladder !'ct... orks.
Using Bessel Polynomials:· L. Storch. Proc. IRE. Vol "'2.
November 19S~. pp 1666-1675:
"Analysis and Synthesis of Transitional Butterv.orth·
Thompson Filters and Bandpass Amplifiers:· Y. Pebs :snd
T. Murakami. RC,f Rt.·it ..·. Vol IS. March 1957. pp 60-94.
(10). "Optimum Filters .... ith Monotonic Response:' A.
Papoulis. Proe. IRI::. Vol 46. March 19S5. pp 606,'609; also.
Vol 47. February 1959. pp 332. 333.
(IJ). "Optimum Filters of Even Orders witH Monotonic Re·
sponse:· M. Fukada. IRE TraIlS. 011 Ci,cuit Thtory. Vol
CT-6. No.3. September 1959. pp 277-281.
(121. Nr'MlorJ.; AlWlms and SYlllhesis. F. F. Ku". John Wiley
.
•
. "Sons. In!:.• New York (1962).
(131. "Introduction to Filters:' A. l. Zverev. ELEcno-TECH,,_,. NOLOc,,·.Junc 19~.pp61-70.
,(141.' ··Transient Re~ponscs of Con\c
\.
\.
\
\
,.
\f-
\
\
\
\
~\X
.\ \
I
.
,
\
.
\
\ ..
\
\
~
\
\
\'
\
\
"'I\
\
'\
\
\
'\
4'
8
0
12
16
WINDOW eNS)
,
\
,20
24
~
)
1
-
,
,
,
- - - - - - - -
---
,
,
,
0
o
C\I
P
. I
1j1~·6.12±.05
-
.
.
1.5
o
•
5
10
15
·DlSPLACEMENT rt 1>f!-/uJt!~n
eufI·a.cUl,c.
tnzns;'NDnS
le,,~
m
tf1~
/'ma:/ ac."a.
nUn?6~r D~ «~,Ic ~rrJlS
il m
eJ:F
/BnJ~
A7
nlJmber ~I eoJ.e words ~.J 1~':JtI, n l1li;4
~$/NcI,Dh... e:L
.CW (n)ci)
..
RtNl)(
-
4Jorett
!!!
n
l d+ I)
~
n
d+ t
n= \0
CIl=
20
0
0
0
0
0
D
0
0
0
0
00
0
0
0
0
0
0
0
0
0
0
4
4
S~
I
D
D
D
0
0
I
0
0
~S
00 I
-'4
cO
olG
00 001
0 0 0 0 ,0
.,
-,-,
00000
I
0
00 0
0000 0
I
0
0
0
000 00 0
0
I
0
0
41,*
0
0
I
0
I
0
0
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,
Cede Performance and
He<;.;d/rll~cdia
Interfnce
R.D. FISHER, Member IEEE, and J.J. NEWMAN, Member IEEE
'T _
TII,',m,r.llOn.
of
"I., '.0 'U"/."glf, lim".a coo.. ,.,.
III. EXPERIMENTAL
Ii .., 10
,e.' ,."ol"ing ",nslly If g ... n .rrof ,.:, • • r. ,JtJm/flOa .,:11 •
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11m". "0.".
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tI'.
~i.llSys,.m
III',,"c,.
I. INTRODUCTION
opPrational performance of digital disc recording
:s may be optimized by implementing the p,oper oncedcoding scheme. Disc storage systems ~onorally utilizo
,coding by peak detection within a phase locked. loop
led timing window. Data pulse paUerns are shilted in
dative to the detection window due to pattern Induced
hilt. media noise. fltC .. which may result in errors [1], [21.
th9 IinE"ar density or data transfer rala increases (9i..,(:n
;,'). the available window for peak detection decreases.
for a given recording system. the reduced window
15 increaso the error susceptibility. In high density
:ling. it is desirable to minimize pulse crowding effects by
9 the !pacin~ between consecutive magnetic transitions.
The operational performance of digital recording system:! Is
directly related to the tranSition error rate COER for MFM). For
peak detnction systems utilizing a phaso-Iocked loop genorated IImlnn window as In disc data system:!. Ihe transition error
rate is do fined as the number of transitions In a data stream
which occur outside of the system dotection window per transition. These errors are dependent on the signal to noise ratio.
pattern inducl'd peak Shift. Signal processing and detection
window width. Thorefore. in order to determine the system trana/tlon error rate. a marginalized VFO (MVFO) which Is deSigned
to count allllux transitions In a data stream occurring ou~~ide a
preset but variable dotectlon window was utilized. The results
of this measurement for a system with the characteristics given
. In Table /I are plotted as errol rate vorsus de:ectlon window In
Fig. 1. The MVFO plots were obtain~d usin~ ~ worst case flux
reversal pattern (t 1011().. --)fOt four disc radii. The minimum
detection window reQuired to assure error rates to 10-' was
determined directly. Error rales less than 10-' can be obtained
by extrapolation of the exponential portion of the MVFO plots
on semilog papor as shown.
vever. the error rate prObability depends on both pulse
rn induced peak shift and sigr:al to noise ratio. This paper
'ibas a method for ctlarectarizing a given hEad/disci
:1Tt'interface relativo to 'error rate and provides a method
,electing a code for tho maximum linear density with
num error rates without altermg .the system.
10-'
~
CO
a:
W
£\.
1O'"C
C/)
II. CODE CHARACTERISTICS
Icn;Jth limited codes convert N data bits into C code bits
the constraint that consecutive cede bil~ or magnetic tranns are separated by at le3st d. but not more then K, empty
tlon intervals or detents. Codes of this type can reduce or
~mize peak shift by separating consecutive transitions.
:3n the data period is T, the minimum and maximum time
rvals between consecutive tranSitIons are T min - (N/C)
'1)T and T max -(N/CHk+1lT which can be related to a
3n system through the data transfer rate (DTR-meoia
Jcily x data bit density-V x 8-11T). Then we may write
I max -(ClNlB/Cd+1) and FCl m in-(ClNlB/(k+11. The
lection window. T w. and the clock rate are defined by
.-NT/C and clock rate-1IT w -CINT-(CINI x OTR. Code
iciency or density ratio can be defined as the ratio of the
lximum number of data bits to the maximum number of trant/ons or fitted de tents. i.e .. E - S/FCl max - (Nt
(d+1)-TminlT. A summary of parameters for selected run
ngth limited codes are shown in Table I (4). [51. 161.
a:
0
a:
a:
w
tn'
1O-C
1O-C
\
\
1O-M~______~______~______~~~_'\~'-J
o
5
1S
10
20
DETECTION WINDOW
(Tw nsec)
Fig. 1
MVFO Curves 01 Errors per Bit vs. 1/2 Detection Window al Four RadII
TABLE"
TEST SYSTEM CHARACTERISTICS
TABLE I
CODE P·.AR.AMETERS
N
C
d
k
Tmln
Tmax
T.,
E
T
2T
6T
0.5T
O.ST
1
1.5
1
2
1
3
6
2
3
3
11
7
1.5T
1
2
2
1.5T
4T
0.5T
1.5
1
6
4T/3
14T/3
;(T/3
413
2
Clock
Rate
2/T
2fT
2fT
3/2T
(til' .IIItlors "It with Ihe fj~CC";I"r; Tecnnolo;y C."ltlf. Ale more" CarpOI".
110". S.MA Clar •. e;/ldornl. 95052
.
P w 50 - "2 nsec
Bandwidth - 2.4 MHz to 8.2 MHz
Vel. - , SOB ips
@ 4 inch radius
SNR .. 23 dB Peak/rms
(afler differentiation)
0'
The FCI content varies as a function
radII (6400 x 4/Rl.
Since the MVFO plots are on an error/track basis. the window
for a given error rate can be read directly from the MVFO plots
and replotted versus their relative FCI. (Fig. 2.1. The half
window required as a function of FCIIor error rates Irom 10,:' to
t·
"1'\'0 ~~"'W'" ;I"e 1..411<'0 p:,,!S used to form th& enor r:::e
;;es in rig. 1 line F'Q. 2 wcr& obta.med by l!I·,.'~r2;'''';; thE.'
vidual tJVFO plots Irem t 5 head/5LJrlaeocomb,n.1ltions an a
leal HDA module. These plOIS were obtained on InSlce
:lI.s (R- ~.OOO Inches and 5.397 inChes) and outside tracks
.5.17 Inches and 6.568 inches) for both JO an1 00 head
s. The two hoad .ets allhe two radial po~itions provided 11'10
rdata poinls.
TADLe III
SllI'ms
TheorcUc,r1
EJ':>~r1mgnt.t1
Value
Tn (n.ec)
, n (nsoc)
13.56
15.50
13.5
15.2
17.28
17.2
. 5.61
8.36
7.03
The window reQuired for an error rate at a given linear density
can be considered to consist of two parts due to pattern
induced peak Shift. T p. and noise. Tn. Consequenliy. at a given
error raID and linear denSity. the minimum deteclion window
musl meet thc condition:
It
a.
12
,.
:z
, (I)
,:- "
,.
..
Therefore. the l)9ak shilt can be obt~ined by subtr:lcting Tn
from the minimum deteclion .window in Fig. 2 as
,~
10-00
11'pl- liz T Vlmln -11'nl
1 !I-"
"...
'O,~--·~a----·.----I----~'----~7--~'~--~'--~'~O--~"
FLUX CHANGESIINCH (10 3)
fig. 2
(3)
1',Twmin -l1'p/+lTn/
0'''
"W
Co~o
(4)
The experimontal p6ak shilt (worst case pattern) mey then be
plotted as a function of linear density as shown in Fig. 3. Peak
shift values from Fig. 3 compare within::: 1 nsec up to 7500 FCI
with values calculated for linear superposition c.f Lorentzian
pulses.
Wir.dow ,nd Error WlnCo,., .. a FU:'IcUon Lineer Oens.ty
t
IV. EXPERIMENT AL RESULTS AND DISCUSSION
1
-
217F.
.'n-
U
GJ
III
C
SIN
C
tLA.
:enx:
~
·ct
(2)
where Tn Is the noise induced peakshllt. Fs Is the maximum
signal freQuency and SIN is tha $Ignal to nOise ratio of the
system (peak signal to RMS nOisel. USing this equation with the
appropriate sigma value (Gaus~uan approximation), the
theoretical and experimental values can be compared as
shown in Table III.
['
-~
LIJ
Co
,
<....
L
.
5
.
7
FLUX CHANGES/INCH
a
•
Fig. 3 .' Peak SlIift ea • Funclion of Linear Density for 1111 Experimental
SYlam
The expression for the code half detection window value can
be derived as
,
'hT w - 2V (d+ 1) FCI
(5)
The code detection window curves are shown plotted on Fig. 2.
The maximum linear transition densities defined by the intersection of the code window curves at each error rate may then
'be converted to data bit density through the code parameters
using the relation
1
I
5
(1)
At a given error rate, A. M. and b are constants. These cons;Ants for the experimental system were found to be 0.158. 0.512
ind 15.2 respectively (error rate-10·,ol with a correlation
:oefficient of 0.99. Values of b can be obtained to fit the curves
it each error rate (10'1 to 10-U) and provide II means of
:l!xtrl!.polaling around the measured pOints. The value of A+ b.
which is a constant for each error rate. Is equivalent to the
extrapolation of the detection window to zero FCI. This value
may be attributed to the< system noise induced peak shift IT n)
which includes media nOise. electronics noise. VFO jitter. ete .•
but obvIously exludes paltern induced peakshift. The accuracy
of the extrapolation to zero FCI can be verified by utilizing the
expression by Tamura. et.aI.(7)
Tn
-- ,
7
The behavior of Ihe required detection window versus FCI
'Jrves indicate that at low linear densities. the window is
sSffnlially constant for each error rate. i.e .• Independent of
CI. Thi$ constant window at each error rate can be attributed
) the subsystem SNR (media, heed. electronic noise. etc.). At
igh linear densiti!,s. the wincow versus Fel at various error
ltes rzpidly increases from the additional aflee!s of pattern
lduced peak shift (adjacent pulso interaction!. An analysis of
ile exp"rimental detection window as a function of flux
,ansltion density ;Shows that the resultant curves may. be fit
dth II series of exponential functions. Over the limited range of
ransltlon densities and error rates investigated. the
;xperimontaf data can be wellapproximaled by an eQuation of
he form:
Tw-Aexp (M-FCI x 10· ' ) + b
•
,
B -
~.
(d+1) FCI
(6)
and plotted as shown In Fig. 4:
The following comparisons are made assuming no change in
system characteristics or detection scheme. Examination of
Fig. <4 inOI::ates the MFM code. 0.2.1). exhibits a limiting density 01 7<450 bpi: the (3.6.21 and (1.2.21 codes exhibil a limiting
\~..
to a.
,
I
1.1.1
•
,
•
Based lIimply on 1M code ef!lciency. the (3.6.2l/C1.2.Zl
codes Should exhibil a 50',;, Increase In lincar oensity: and Ine
(2,3. H coda a 33% Increase in linear denSity re:ativa to MFM.
However. It can be seen 'rom tho experimental 'results that.
although the (2.3.1) code doe: exhibit a 33"" Increase In denally as suggested by the emeiency; the (3.6.2U(1.2.2) code$
only increase the linear density by 22 to 26.... This may be
attributed to thft fact that the experlmontal system was noise
dominated, I.e .• Tn > T p at the maximum operatinl] FCI: and
therefore. relative window width has a more significant effect
on maximum linear donslty then efficiency .
II
VI. ACKNOWLEDGEMENT
DATA BITSIINCH
. Rale VI.
L1nnr O.la OlnsitY I"r S,ltCled cocs..
) bpi: end the (2.3;1) code exhibits a value of
arror rate of 10- 1 An Increaso In linear density
, MFM of 33% is obtained with the (2.3.1) coda
, obtained with 11'10 (3.6.2)/(1.2.2) codes. At error
nd 10-e. 11'10 linear density improvements for the
codes increase to 24% and 26%. The groater
)bserved with the (3.6.2) code in Ref. (4) was
lproved analog signal spectral shaping.
°.
V. CONCLUSIONS
for determining code performance based on
.hc detection window versus tran'siUon density at
~ales has been presented. The experimental data
relical calculations of system noise induced peak
,u!ations of pattern induced ;leak shift by simple
Jsllion. The method aliows for determination as to
recording performance is limited by the system
t shift characleristics.
The authors wish to thank W.O. Buber 'or many helpful dl$cusslons and F.J. Sordello and S. Puthuff for support.
VII. Rel.rence.
(11
E.R. 1<&1% and T.G. Campbell. IEEE TI.nl. IIAG. MAG-15. No.3. pp. '050-
53. M.y. 1979.
(2)
J.J. Newman and R.D. Fisher. IEEE Trans.",AG. MAG-t&. No. 1. liP. 2325. J.nuary.
1;ao.
131
G.F. Hughes and RJ<. SChmldllEEE TI8ft&; MAG. MAG-12. No. II.
pp. 752-54. November. 197&.
141
G.V. J.coby. IEEE TI./Ii. MAG. MAG-13. No.5. pp. 1202-04. September
tl77.
e.. pp. 740-
151
T. Horig:lI;hi and K. Morit.. IEEl: Tr./I,. IIAG. MAG-t2. No.
42. November. i976.
161
P.A. Franuzek. IBM Journ.' of RUlltfCII & D ••·.,opm./lt. Vol. 14.
pp. 3767-83. July. 1;70.
(71
T. T.mur•• M. Tsutsumi. H. AOi. H. Malsui.hi. K. Nakageshl, S. 1I..... no.
.nd M. Makila. "A COding M~lhOd ill Oloilai MeoneliC Recording," IEEE
Trans. MAG. MAG-B. No.3.• pp 812-14.Seplember 1972.
)
C(
HI;" p!:Jt1vr/n$i;nce In m'gnfrtlc medl. drrmllnda much from
eotw."Uonal encoding m.thod., but .ach. m.rhod ha. It. own
dlaadrantage'i
a .Imp/e .ncoding technique 'or ma.. aforag.
• number of attractire charac'.rl.,ie. dlatlnct/, It. own
,.t
/1
hal
New Method for Magnetic Encoding
Combines Advantages
of Older Techniques
Arvind M. Patel
General Products Division
IBM Corporation
San Jose, California
A unique method of malZnetic recording combines two
ad,'antages not both found in previous methods--absenee of a de component in the aignal read from tape,
and maintenance of a high recording efficiency OD the
tape itself. In addition, the method retains principal
ad,'antages of previous methods in that it ia self-clockinlZ for any pattern of recorded data and ia not seriously affected by baseline or peak ahift in the readback ligna!.
Callt-d zero modulation or ZM, the method ia used
in the IBM 3850 Mass Storage System (!lee box at right).
Thil' machine reads and writes on a magnetic aurface with
a rotating read/write head. Rotation requires traniformer coupling, which cannot handle a dc component;
therefore an encoding method that imposes neither a
de component nor the disadvantages of other techniques
is required. ZM ill a aignificant improvement over earlier
encoding methods, lOme of which merely assigned tranllitions of malZnetie polarity to bits in lOme more or
IeSII .traightforward way and often achieved a new
advantage at the expense of an old one. These
methods included non·return-to·:r.ero inverted (NRZI) ,
phase eneod ing (PE), group-coded recording (GCR),
frequency modulation (FM), and modified frequency
r.,odula~ion {MFM). e.ometimes called delay modulation. Zero morlull!tion Use!! IOphislicated cooing of data
the magnetic recording channel with waveform properties of the recorded ligna!.
. Importance of efficiency and the absent dc component u brought out when ZM ia compared with some
earlier codes. NRZI, for example, is the limpleat ento match idiosynciaciea of
Honeycomb Sforage
The IBM 3850 ia • rna.. atorage ays!em that .ervea
as a virtual atorage medium aupportlng magnetic dlac
flln, In much the .. me w.y .. the diaca .. rve .a
virtual atorage supporting main memory. It conalsts
of an array of data cartridges about 2 In. In diameter
and 4 In. long with a capacity o' 50 million characta,..
each. Although the cartridge contalna a length of
magnetic tape, ato~ data are organized In cylinder.
analogoul to thole o' a disc file, and can be tran.ferredto the disc file a cytlnder at a time-that la,
without moving the dlsc read/write heads during the
transfer. Up to 4120 cartridoos are stored in hexagonal
compartments in a honeycomb..Jlke apparatus that includes a mechanlam tor Ntchlng cartridoca from the
compartments, , ..ding or writing data on them, and
,.~'placlng them,
85
~",c.,,~
DATA
I0 I, I
0
o
.-II
PM
~
(
(
__f'
coding method, used on lh-in. wide magnetic tape at
data recording densities up to 800 bits/in_ l Presence
or absence of a transition in the NRZI magnetic waveform corresponds to 1 or 0 respectively in the binary
data stream (Fig. 1); successive magnetic transitions,
which alternate in polarity, produce alternately positive and negative electric pulses in the readback signal, nominally symmetric about a base line.• Principal
drawback of NRZI is that long strings of Os are reo
corded as correspondingly long periods with no mag·
netic transitions, and hence no pulses in the readhack
.ignal; the read clock can lose synchronization during
those periods. Furthermore, wideband circuits with dc
response are required for .ignal processing and data
detection.
NRZI is also subject to a more subtle difficulty: baseline and peak mift. alluded to previously_ At high,
densities, the readback pulses produced by a string
of consecutive Is tend to interfere wiih one another.
When such a string of Is is preceded or followed by
a Itring of consecutive Os, this interference is asymmetrical, causing the first or last few pulses to have
larger amplitudes; thuB the base line appears to drift.
A similar shift can arise from a string of consecutive
Os if the dc response of the electronic circuitry
is llightly off specification. Interference also causes
the pulses to seem to slide into the signal-free zone
occupied by the Os, creating a displacement in time
of the pulse peaks. This peak shift can be a significant
fraction of the nominal tiMe between bits_
Phase encoding (PE)2 was devised to alleviate these
problems, and is used on lh·in. tapes recorded at 1600
bits/in. In PE a 1 corresponds to an up-going transi·
tion and a 0 to a down-going transition at the center
of the bit cell. Where two or more Is or Os occur in
suct:eSl!ion, extra transitions are inserted at the bit-cell
boundaries. Resulting waveform is eelf-clocking and
hllll no de component, since the waveform in each bit
86
I
0
I
I
I
0
I
0
Fig. 1 Conventional waveforms. NRZI is the limplest
waveform, but requires a
wide band amplifier for processing, since it has a subItantial de component. This
and other difficulties are
overcome with PE and FM
encoding, at the cost of
high transition density-up
to two transitions per bit.
Variations on FM reduce
number of transitions, but
reintroduce the de component
cell has up (positive) and down (negative) sign~il
levels of equal duration. However, PE requires twice
the transition density of the NRZI method for a random
data pattern. Thus recording efficiency is poor.
Frequency modulation has transitions at every bitcell boundary. However, although FM is similar to PE
in all' waveform propertiCl!, the 1 and, 0 correspond
to a presence or absence, respectively, of any transition
'at the center of the corrCl!ponding bit cell, rather
than to_ an up or down transition. In the IBM 3330 disc
file FM has been supplanted by MFM, or delay modulation, which provides enough clocking transitions
without doubling the transition density}' In MFM indicating a "don't care" value when
P(B) = 0_ The only aequence& of Is aHecting the
mapping, then, are those between two Os in the same
section of f + 1 digits. The longest such sequence is
f - 1 digits long. Thu's, the memory required to compute P(A) ia f - 1 bila.
Thus, to limit the amount of memory, the ZM algorithm ill given two important modjfications: First,
an extra P.bit with the value of P(B) at position
f is inserted at the end of every section of f data
Oato
01001111010111111011100110
'(A)
0 10 0 0 10 10 10 0 10 10 10 10 10 0 0 10
PCB)
1 10 1 I 1 , 10 0 1 11 1 1 110 0 0 0 10 0 0 1
1M pot_"
ax>~1000lXl000l00lXX)lOOO()oolJO()101OO100IOIOO
·3--~-----------------------------rL..-
0~:AA.
~-.3-
A.. A..
A.. ~..... ....../
~
Fig.2 Basic zero modulation. Substituting two encoded bits for each data bit on the basis of infor·
mation in preceding and following bits, and recording the encoded bits in NRZI form, eliminates the
dc component without other waveforms' disadvan·
tages. However, since it places no constraints on
the data pat1ern, it can require an infiniteiy large
memory for implementation
)
COJ..fF'U1U\ D2SIGN / AUGUST
1976
,.
...
l>ita. ~(HH!. c.ecmr"_l1l1ti{.n or PIA I AI IIlny daUl bit u·
tends only to the follo¥oin~ f - 1 daLl 1:.:">, U &
binary &o.ic function of the dal..1 .tored in f bils of
lDemory:
peA)
Ie 4.i. + d.d.ci: + d.d.d.d. + •••
+ d.d.d•••• d. __ d .... + cL.d.d. •••
d ....d'_1
where t - f if f i. even and t ... f - 1 if f ia odd.
Look.back parity ia merely a count of Os as in the case
for IIftlimited 1DeII10ry.
Encoding proceu ia ..delayed by f bit period. in a
eootUtuoua IItream of data, while the memory ia loaded
1M oomputing P (A), but the deCoding proceaa ia delayed by only one bit ·period. Thul decoding erron
in ZM do not propagate.
In the di-.ram, a value of f == 8 ia auumed for
illuatrative purposel; but in fact, the value of f hal
DO theoretical limits. AI described later, a &hilt register delaya each bit while look-ahead parity it generated. Small values of f require ahort &hift regilters
and encode data quickly; however they add a larger
proportion of redundancy in the form of the extra
. P.bit than do large values. Nevertheless, they may
he convenient in lOme applications. For efficient utiliza.
tion of &he m-.netic recording medium, large values
of f-eg, 100 or more-are mandated. Although they
impose aubstantialencoding delaYI, these are atill negli.
gible ~mpared to the access time of a mass Itorage
..,.tem. which it mealured in IeCOnds. Large values of
1 do not neceasarily imply complex encoding logic;
the look.ahead parity generator merely counts the bits
.. they PUI. and a monolithic ahih register it relatively
mexpensive.
'b~
I 00 1 1 1 1
, ..,
~ 0 1 0 1 1 1 IIi
When readin~, a ZM "a\eform is d~oded into a data
aequence with the help of a dock, which ia usually
derived from the waveform. A eynchronaing aigna! of
aufficient length and recogniubJe ending ia useful in
marking the beginning of data. A eimilar reaynchroniz.
ing aignal may also be inserted at predetermined in&erval, in the waveform, web .. at ZM memory bound·
aries, for protection ill cue 01 temporary 10.. of
aynchronization in magnetic defect&.
Several characteristics are required of the Iynchroniaation lignaJ:
(1) It must be diatinctiv·e enough not to he confused
with the normal data waveform in ita original or
&hifted politi on.
(2) It must satisfy the ZM constraint. of maximum
and minimum pulse width I.
(3) It must have no net dc component over its length,
although unlike the encoded data, the integrated total
may exceed three units within ibelf. The accumula .
tion may be four, five, or aix units (or even more if
the synchronization lignal il abort and infrequent).
(4) Basic Iynchroniution lignal pould he reasonably
&hort and the endings compatible with the ZM algorithm for. insertion at the memory boundary without
modification .
These lpecificationl could he ealily eatillfied if some
binary sequence were known to be inadmissible al data.
However. no auch aequence it poasible for serial datL
Alternatively, a eynchronizing aignal can he chosen from
ilIadmiasible sequences in ZM-coded patterns. These se·
quences must aatillfy the ZM pulse.width conltraint but
may exceed the maximum charge constraint.
Among the sequences that Ntisfy the ZM run-length
constraints, 0 0 1 0 1 0 0 0 1 0 1 0 0 0, either forward or backward, is· the &horteat that does not occur
in any ZM pattern. Any pattern containing one of these
sequences CAn be used. as a aynchronizing pattern.
Two examples are:
1 0 1 1 1 --
e 01
""I
I I .00 I 0 I • I 1 • • • • • • •
1'(81
I 1 0 1 1 1 1 1 0 I 1 00 0 0 0 0 0 0 1 1 1 1 - -
01 - -
ZM ........
Fig. 3
Synchronization Signal
Practical uro modulation. Adding an extra bit
to the datI atream at regular Intervala In accordance
with a pteacr~d pattern permits the two-for-one lubstltullon of ZM to be made with a memory of realizable
capacity. In the waveform, de component
ltill 0,
tranaitlon density lalow, yet added redundancy Is minor
'I
WI
. W.
=0 1 000100101000101000'1000101001
=0 l' 000101000101000'1
The second of these does not IItilfy lpecification 3.
Both examples begin and end with 01. and can he
padded by any number of 01 digit pairs if desired
for clocking. These endings also allow the aynchronization lignal to be placed at the ZM memory boundary
without modi6cation.
. In actual application, the Iynchronaation pattern
it placed at predetermined intervala at ZM memory
boundaries. In case of .ynchroniz.ation loss, the clock
is regenerated by the read waveform as IIOOn 81 the
defect or other cause has pau.ed. With the clock running, the .ignal detector can produce the binary ZM
pattern, but the pattern cannot be decodeJ until the
aynchronization . pattern re-estabJiabea the ZM pair relation with respect to the dock. If the dock it found
to be out of tynchrouization, ie, one ZM digit out of
step with the read ligna!, ita complement may be used
for decoding.
)69
------'-- _. _._-------------_._---
P(AI
I.oeic
.........
Nan
f __
To Wlit•
~-
Ort.. ,
Fig." ZM encoder. Principal feature Is a ahlft register from which data bits are fed to encoding
logic, which is straightforward Implementation of equations In text
Error Check in ZM Patterns
Patterns of digits generated by the ZM algorithm
utisfy various constraints, including parity in the cue
of ZM with. limited memory. These coJUItrainta provide a powerful check capability for bit-detection errors
and synchronization erron at the receiver.
Because error·free ZM patterns possess run lengths
of one, two, or three Os between two Is, two consecutive 11 indicate a pick.up, or a 0 incorrectly read as
I, while four or more consecutive Os signal a drop-out
error. Acquisition of excessive de charge can be de·
tected with an up·down counter that increments for
every code bit position recorded with a positive level,
decrements likewise when the level is negative, and
signals an error if the total exceeds ±3 at any time.
An alternative method of .implementing th~ check
hal! been worked out,f' Finally, value of PCB) and
charge value must hoth be 0 at the memory houndarya aimple hut effective check .on both synchronization
and random errors. These .two checks at the memory
boundary are equivalent in the sen~ that neither de·
tects any. error missed hy the other as long as the
checking circuits are working properly. Error check·
ing of ZM patterns at the receiver, an additional benefit derived from the atringent ZM' constraints, need
k implemented only to enhance reliability even further.
Implementation of ZM
Algorithm
In a ZM encoder (Fig. 4), the fint step is to modify
the binary data sequence by inserting the P-hit at
fixed intervals of f hita. The P·hit is the value of
PCB) at count f, computed by a simple latch triggered
by each 0 in the data stream. At count f + I, the
P·hit is inserted in the data stream, and the P(B)latch and counter are reset to O. The modified data
stream passes through a shift register f hits long, which
IItores the previous and current data hits and the fol·
lowing f - 2 data hits. From these stored hits the
look.ahead parity function P(A) is generated in accordance with the hinary logic function given previously. From these values of P(A) and P(B), the current
and next previous hits, and the just-computed ZM hits,
the ZM code sequence is lenerated .. Two feedhack
latches .tore each pair of hiu of the ZM pattern as
they are computed, for ILIe in the lIext. hit cycle. These
latches are updated continually .. the data hits are
&equentially encoded into ZM patterna.
Initially, look.hack parity it set to 0 and feedback
latches are set to 01. Encoding atarta after a delay of
f - 1 clocl perioperlies can be described hy
special algebraic system which essentially requires
t arithmetic operations on polynomials whose coeffi.
nts are elements of a field containing q element!. be
:formed modulo q. For hinary polynomials this reo
ires addition and subtraction to he carried out
,dulo 2 (ie, the exclusive OR function).
efinitions
veral pertinent definitions and properties of poly.
;mial operations are: (1) The degree of a polynomi.al
the greatest power of x in which the coefficient is
mzero. For example, n hi nary digits is represented hy
In - 1 degree polynomial. (2) The degree of the poly·
Jmial reEulting from the product of two polynomials is
ie sum of their degrees. (3) If R(x), S(x), and T(x)
re polynomials such that T(x) = R(x) S(x),then T(x)
. said to he diyisible hy R(x), or R(x) di\'ides T(x).
~(x) and Sex) are also termed factors of T(x).
With these concepts' in mind, the division of poly:
;omials can be defined according to the Euclidean di·
ision algorithm. Given any two polynomials H (x) and
)(x), there is a unique pair of polynomials Q(x), R(x)
uch that H(x) = Q(x)P(x) + R(x), where Q(x) is
ermed the quotient and R(x) the remainder. Q(x) and
R(x) can be obtained from the diyision H (x) jP(x)
Jnder the corre!fponding algehraic system. The degree
of R(x) is less than the degree of H(x) and P(x). R(x)
may be interpreted as the remains after H (x) has heen
e\'enly dh'ided by P{x) ; and since diyision is essentially
a subtraction operation, R (x) is the remainder 'after
P(x) has been subtracted from H(x) an in.tegral num·
ber of times. The special case when R (x) = 0 is pre·
ci!-ely the case when H (x) i~ dh'i sible by P (x), as de·
fined previously ~
Data Encoding
The polynomial division process provides some insight
into the encoding of k bits of information for transmis.
sion. If H (x) represents the message and P(x) defines a
polynomial the previously defined division will pro·
duce aremaiooer, R(x), which is unique to a small
subset of messages including H (x). P (x) is called a gen.
erator polynomial since its functIon is that of generat.
ing unique check hits R(x), given any message H(x).
If errors occurred during transmission, they can be de·
tected by dividing the received message hits hy P(x)
and comparing that remainder with the received check'
bits. If the comparison results in an equality condition,
the assumption is that both the message, H (x), and the
check, R (x), were transmitted correctly.
Mathematically, H(x) = Q(x)P(x) +R(x), where
H (x) is a k - 1 degree polynomial representation of k
message bits; P(x) is a generator polynomial of de·
gree m - 1 where m - 1 < k - 1. H(x) - R(x)
Q(x) P(x), since addition and subtraction are de.
H(x) + R(x) =
fined modulo 2, ie, H(x) - R(x)
Q(x)P(x).
_
The addition of R(x) modulo 2 essentially modifies
the message H (x) in the last m - 1 hits, since.R(x), by
=
=
54
c; f~ni!i~ln~ is (of ..::~ c' ~
bit,,:. !'l.\ :;;;;1\ it i~
J{~'
~.I,",,:, l~,
...
\ ' ' ' , ' ' '-.. l ' ,
comenienl 10 fend R~x) 8~
tIle }aq m - 1 hit... of the encodd rne~!',.:l2e. This is e35ily
accompli~hed by comiJeIin~ Htx) to be k + (m - II
hits in length with m - 1 low order 0 coefficients. Multi·
plication hy xm - 1 performs the transformation.
xm-1H(x)
+
R(x)
mel/"
= F(x)
where F{x) is termed the code polynomial and repre.
sents the encoded message of k + (m - 1) bits to be
transmitted. Example: Encode the message 1010010001,
corresponding to the polynomial H (x) = 1 + x 2 + xn +
xII, using the generator P(x)
1 + x 2 + x' + x~. Mul·
tiplying H(x) hy x~ and dividing by P(x) results in:
=
SO
H (x) = 00000 1010010001
R(s) = 11000
F (x) - 11000 1010010001
'-.-' '---.r--'
ch~ck
rn~s5ag~
bits
bits
The encoded message, F (x), consists of ten' higher.order
message hits, H (x), and fin lower·order check hits,
R(x).
The encoded message received after transmi!sion over
a data link can he represented by B(x)
F(x) + E(x),
where F(x) is the correct message and E{x) is the error
message. Since arithmetic has heen defined modulo 2,
E(x) will contain nonzero coefficients in each erroneous
bit position. If B(x) is not divisible by P(x), an error
has occurred. If the re!;ulting division generates no reo .
mainder, B(x) is accepted as the true encoded message.
It is possible, however, that enough errors in appropriate
hit positions have heen generated so that E(x) is divis.
ible hy P(x) . and B(x) will he decoded as the true
message. To ensure effective error detection, the generator,
P(x), must he chosen such that no error pattern, E(x),
is dh·isible by P(x). It can be shown that P(x) must
have certain properties to enable this error detecting
scheme to function. It can 31so be shown that the ab~lity
of a specific code to detect the erroneous data is related
to its error correction capabilities.
A more rigorous mathematical treatment of error cor·
recting codes and their. properties is given in Ref. L A
few basic results are given without proof to illustrate
typical properties of generator polynomials: (1) A code
generated by any polynomial P(x) ,,·Hh more than one
term detects all single errors (ie. an error in exactly
one position). (2) Any polynomial of the form 1 + x~
(c an integer) will detect any odd number of errors (ie,
typical odd or even parity error detecting)' (3) A polynomial P (x) of length n detects all single and double
errors if n < e, where e is the least integer such that
P(x) divides x P - 1 (= xP + lmocl2)' (4) A polynomial
P(x) of length n detects any burst·error of length n or
less. A hurst.error of length n is defined as the number
of errors occurring between the first and last errors, in·
clusive..
:x
v
=
Physical Realization
The theory {If how to encode a.nd decode messages fOI
error detection has been shown, hut the important operation to accomplish this is the di'yision, under addi·
tion modulo 2, of messages hy a fixed polynomial, P (x).
Consider a lonf!.hand calculation of the dh·ision of 1 +
CO:\IPlTTER DESIC!'\/sEPTE:\rBER
1971
8
r
a
I
------------_._----- - "--' .-- -----,
I
I
OMXTMCS:
I 101C
iTn 1
1101001
-J
mQ!JQ
SIGNIHCANl OA1.4 &I!
001
11010..11
---O!!!!!Q9
STH 2
1101001
STIP 3
I
ril
L_
9!2!Q!!
I
1 0
GlNllATOR PI.)
0 0 1
CA)
Fig_ 1 Manual calculation
of 1 + x· +X' + x'" divided
by 1 + x· + x' + X'
r'l
l.._
I
1
I
0
~O
NlXT 061.& BIT
!
------------ --
--- .-.--
- --
.[~I
I
1
0
0 0 I
( B)
£. + X8 + XlII by 1 + Xli
+ x:, + XII. Since addition mod·
ulo 2 is simply an Exclusiye OR funchon, drop the vari·
able x and manipulate the binary coefficients of the poly.
x" + x 3 + x
nomials (see Fig. 1). The quotient is Q (x)
and the remainder is R(x) = x;j + x!l + 1.
Referring to the manual didsion example (Fig. 1).
the division algorithm is: (1) Align high-order coefficients of PIx) and the partial remainder_ The first iteration aligns the didsor PIx) with the dividend. (The
dotted underline references the partial remainder for
each stepl. (2) Subtract (modulo 21 PIX) from the
partial remainder. (3 I Go hack to step (1) if the degree of the partial remainder is greater than or equal to
the degree of divisor P I x) ; otherwise the partial remain.
der is the remainder R, xL Notice that in step (3 J the
alignment of high.order coefficients required the partial
remainder to be shifted left Dy one bit and the entry of
the next two dividend bits into the low-order position. In
general, at ellch step the next dividend bit is "brought
down" or shifted into the low position of the partial remainder until the most significant bit is 1. This becomes clearer if the addition is thought of as being performed in a 6-bit regi'ster in which the most significant
bit of the generator and partial remainder are ignored.
These bits will ahraysresult in I + 1 = o.
Consider a 6-bit register and step (2) of the pre·
vious di\'isioTl, with reference to Fig. 2 I A). Shifting the
partial remainder left by one bit will align the higher.
order coe-fficients as shown in Fj~. 2 (B I. Since the sub·
traction is performed after the coefiicients are aligned,
the most significant bit shifted out of the ref!'ister is u~ed
to enable the subtract lo~dr: Ih.: r~,;u}t after subtraction
is sho\\n in Fig. 2(CI. Each ~tep may he implemented
in a similar manner, excepl that the di,,-isioll i" termi·
nated after all data bits haye heen :.;hi fled into the
ret!ister.
The hardware required to implement this :llgorithm
(ie, shift and subtract modulo 2 I is simply a feedback
shift register with Exclusi\e on gating. Subtraction and
addition modulo 2 is implemented by the Exclusivc OR
function. The number of shift Tc;::i;;;lcr bil positions is
equal to the de2ree of the diYisor P I x I. The ;;hift reg·
ister shown in Fif!' . .31 A I is oriellled ,,-jlh the 10\\. to
G ~JfXT OA!A In
=
ce)
Fig_ 2
Shift register alignment sequence
~,J-o-{}-(}-L{}-{}--LoJ
CAl SHIfT REGISTER TO DiViDE By
DATA---
'-n,
nu r-!11
n ~.;.'--[}-In
r--~
L.: ~-'
U --
-I
L..-;
(8) Stilfl
.1GI\H~
P(,.) .. I ..
:
LJ
TO DIVIDE 8Y
~3 .",,5.
J(f
~ • £XClUS:.1 OP
Fig 3
Shift register divide implementation
.).)
--------LOAD 2
CHI CK • Y1(\
11,_ 8-1n[ b\le "l!~ cho"en as the ba~ic data !>lru;ture
hec:au!>(" mo.,! ~h3racl("r code se-ts u~ed in d3ta comn::uni·
cation nrt' easily 5peciEed with 8-level coding. It al;,{.
r-r~r7__.,..___r_>...._y__,._.,..."...,.
.......'--'.-"-'-"-'-.L-.I.:......<........
POt. YNOMIAl
~ppears that most small and medium size computer ~
have integral.number byte word sizes. In ~ssence, there
appears to be an evolving byte-oriented standardization
of most .large computer systems using communication fa,
cilities.
.
COOl GfNIUIOR
Operating Characteristics
Fig. 4
Functional block diagram
high-order positIOn from left to right. The most significant data bit enters the left most shift register bit
position. A delay of 6-bit-shift times is associated with
this shift register since six extra O's must be shifted in
after the data bits to complete the encoding process.
This delay can be avoided by treating the ·data as if it
were shifted out of the high-order end. The register can
be ea~iJ) modified for this more efficient scheme:! as
shown in Fig. 31 B). Since encoding and decoding of
messal!es are precisely equh'alent, this circuit can be
used for both functions. This and the simple logic implementation are the attractive, features of polynomial
error detection. Error correction implementation is much
more complex.],
A more detailed block diagram of the polynomial code
device is shown in Fig. 5. The device consists of an 8bit buffer register (through which all data bytes pass
for encoding). a 16-bit polynomial register with associated feedback gating for a specific generator polynomial, and the control logic.
The polynomial code dedce performs four functions
as specified by the four command bits. These bits, strobed
into the control logic by a pulse from the computer, are:
LOAD LEFT .
The left byte of the polynomial register is loaded with data from the
I/O bus. The LOAD and EORjLEFT
bits are high for this command, and
the device is lIet for EOR mode.
LOAD RIGHT
. The right byte of the polynomial
register. is loaded with data from the
i/o bus. The LOAD and CRC16/
RIGHT bits are high for this com·
mand, and the device is set to CRC16
mode.
RESET
This command overrides all other
command bits and clears the buffer
and polynomial registers to all O's.
The RESET bit is high for this command.
GO
The buffer register is loaded with a
data byte from .the I/O bus. The data
b)1e is then encoded with polynomial
register contents as specified by EOR
and CRC16 bits.
Hardware. Description
Design Philosophy
The initial design objecth'e was to develop polynomial
code generation electronic logic that could easily interface with a small 8-, 12-, or 16-bit computer_ The specific application was to implement an I/O device for
error detection at remote job entry stations and at communications concentrator stations. Both of these stations
were to be provided with a small general-purpose computer to be used as a data communications controller.
To allow for expansion and upgrading of the remote
terminal system, the polynomial code deyice design ob·
jecth'es were incorporated with enough flexibility to allow interfacing to most commercial minicomputers.
llsing the black box concept, the polynomial code
generator accepts 0-bit data byte~ and produces two 8bit check b)tes. The!'e two check bytes may be read
from the black box and subsequently loaded into a computer. Conversely, 1\,'0 check bytes can be loaded into
the black box from the computer I/O bus, allowing previous data·error-code generation/detection to continue
from a preyiously int"rrupted. state. (See Fig. 4.) This
facility is very convenient for time-multiplexing errorcode generation/detection between several communication lines and eliminates unnecessary replication of errordetection hardware at 'a dnln concentration statioll.
56
EOR -
High
CRCl6 = High
Exc1ush'c OR of
data byte with'
right byte of
polynomial regis.
ter.
Generate polynomial check code
of data byte and
polynomial regis.
ter contents.
If both EOR/LEFT and CRCI6/RIGHT bits are low, the
encoding mode is determined by the last mode command
~vm.
.
The polynomial register contents may be strobed onto
the I/O bus by pro\'iding the gating appropriate to the
desired computer. A separate I/O signal must be u~ed
for this function since no command bits ha\e been as·
signed for this purpose. This provides more flexibility in
interfacing the polynomial code dedce to computers with
different word sizes.
CO~IPUTER DESIGX/SEPTE:-'1BER
197]
,
........
!
I
I
ENCODING INITIAn"
DAYA
I/O I'ULSf
' : 1-1_ _ _ _
~
I., ... - - - - i
...---:-,--If.~:<~:02:m:::lL___
CON.~~~~~~~rl~r--,
~YNO~~----------~~~~~~
UGISnR
Polynomial
cod~
device block diagram
. __ .
-
Fig. 6
Timing diagram
--_._--
ice and Time Constraints
I/O timing constraints are shown in Fig. 6.
and bits must be stable at the leading edge
c· I/O pulse. Encoding of a data byte is initio
.e trailing edge of the I/O pulse and require~
: completion. A minimum I/O pulsewidth of
dts the deyice to a 1.8-1'5 repetition rate, which
m the required I/O im·truction execution time
;maIJ computers. Consequently, thi~ assures the
of a data byte in one I/O in~truction time,
time consuming I/O deyice skip loop program.
1e contents of the polynomial register may he
onto the 1/0 bus 1 I's after the trailing edge of
pulse.
DEVICE ADORES,
--
-
OPERATION
(1/0 PULSES)
OPERATION
CODE
Fig. 7
lOT instruction format
uter Implementation
)lynomia1 code device has been interfaced and
'ith a Digital Equipment Corp PDP.8/L computer
functions in a remote terminal environment and
;ontro1 several remote devices and a data communi.
, line. Briefly, the. computer's characteristics are
word, 1.6.l's memory cycle, and one programmable
.er (ie, the AC register I. The instruction set is very
ed and contains one r/o instruction (ie, the lOT
uction J. All prograr.1med 1/0 data must pass through
AC, which provides 12 buffered data output lines
12 data input lines. The lOT Instruction format con·
s a 3·bit operation code, a 6·bit de\'ice address. and
·bit operation spccification as shown in Fig. 7.
~ach execution of the JOT instruction places 6·bil
-ice address on the de\'ice address lines monitored by
:h I/O dedce. When a de\ice recof!nizcs its aS5igned
dce address, it gates the Is;;.t three bit" of the lOT
struction into the de\'ice cont rnJ logie. Each operation
,t specifies an action associated \\ itl! the de\·ice. The
ITee operation bits correspond to three ('olltrnl pulses
;hicn occur in sequence and mil\' be com hi ned in the
OT instruction to affect one, two, or three ~eguential
le\'ice operations.
Since
I/O data must pass throuf£J, the AC, the con·
trol and data bits must he loade,) into tht> AC prior to
all
1/0 PULSE
FRO"; AC {
POlYNOMIAL
12 illS
CODE DEVICE
I/O PULSE
21
TOAC
: LEFT 8 BITS
I
I
: RIGHI 8 BITS
I
1/0 PULSE 4
1/0 BUS GATING
Fig. 8
PDP·8/l interface to device
an lOT instruction. The general interfacing of the puh.
nomial code dnice to the computer is shown in Fi~. ::.
l':otice that onh' either the ri!!ht or left byte from tIlt'
polynomial ref'ist~r can be read at one ti~le sillce Ill!'
pop·alL Data Encode Program
Inltrucllons
Comment
CLA
TAD K14¢¢
Clear AC
TAD RIGHT
Get old right check byte
Load right byte of polynominal register
lOT 1
TAD K24¢ct>
TAD LEFT
Get old left check byte
lOT 1
Load left byte of polynominal register. Sets device to CRC16
TAD DATA
Get data byte
lOT 5
lOT 2
Generate check bytes. clear AC, load AC with new right
check byte
Deposit new right check byte. clear AC
Load AC with new left check byte .
DCA LEFT
Deposit new left check byte, clear AC
DCA RIGHT
.
--.-.-----
SET DEVICE MODE
,-.--------1
r---G-ET-;L~-TA--'
i
i
!
EX I'!
Fig. 9
Device data encode flowchart
data to tht" AC i~ only 12 bit~ wide. Thi~ is accompli~hed
by assilming ]/0 pul!'-es 2 and 4 to read left and right.
respecti\ely. For a computer \dth a 16·bit I/O data bus.
only one control pulse. would be needed to ~"ad both
bytes of the polynomial regi~ler.
Software Considerations
Device Programming
The polynomial code de,·ice i~ easil) prugrammed on any
gennal·purpM-e minicomputn. A flowchart lor f!enerat.
ing check b~ te!"> given· one data byte is sho\"n in Fig. 9.
The corresponding program can be implemented with
six to ten instructions on most small computers. I'iotice
that no decision branches are required and that no device
flag test loop is required per data byte. This results from
the assurance that data byte encoding is completed within
one instruction time. The dotted line branches in Fig. C)
are included to illustrate the additional flowcharting reo
quired to generate ·check bytes for a block of data bytes.
A correS'ponding error detection program can similarly
be implemented with this flowchart with the additional
test·for.zero instructions on the check bytes as the last
step. A specific programming example for a I.byte en·
code operation is shown in the table. The execution time
on a PDP.8/L computer is 39.4 ps/data byte and in·
cludes seven memory references.
Hardware vs Software
The justification of the effort and expense. of de\'eloping
special.purpo~e hardware for a computer system is in·
herently influenced by the equiyalent software required
to perform the same task. Hard\\'are/software tradeoff:;
con~equently hecome central to the decision bet "een
hardware and· software implementation. In remote com·
puting applications "here a small computer is used to
control such items. as peripherals, format communication~ data. and tran,;late code sets, gross amounts of
time call he consumt"d in communication line error·
ch~cking routines. This effectively lowers the data trans·
mis:;ion rate \\hich the computer can 'maintain \\ hile
satid~ in~ its other commitments. Cost and performance
criteria rna ~ force the designer 'to accept 10\\ er communi.
cation line band"idth and/or slo\\ e; remote peripheral
devices. Thi~ in turn enhances the I/O throuchout limitatiolls of the central computer facilities, particularly for
a lar~e number of remote !'lations.
)
CO:'.IPl"TER DESIG;\; 'SEPTDIBER
1971
I
(
(NTEK
j
con5uminc: on a PDP-8/L, \\hich probabl) r~pr~,elll,
the wont-case programming eHort for implementatioll
of polynomial code generation. A PDP-GlL program
that I \qote requires 432 instruction executions ,and ] .1·
ms execution time per data byte in the worst ca:;t'. A~·
suming 20~~ of the total computer time is alloHt'l1 {HI
error checking, about 5 ms/data byte of computill;:
would be required. In this case. the PDP-8/L could sup·
port a 200·baud communication line, which hardly sati~.
fie~ remote joh entry requirements. t"sing the PDP·H, L
execution times with and without the polynomial code
device, a performance increase ratio is obtained (If
,1.1 ms/39.4 JLS = 20. The larger factor for the PDP-SlL
results from the lack of an Exclusive·OR instruction. Tilt'
equivalent of an Exclu!ive OR requires 10 PDP-3L
instructions and 80 extra instructions per data byte in
the worst case.
The p~lynbmial code generator /detector de!lcrihed
earlier has been built. The required logic was assembled
on three 2% x 5", 36.pin PC cards; 32 TTL IC packages were u!'ed. The PC cards were compatible with DEC
!vI·series logic cards and could conveniently be plact'd
within a PDP-8/L extended memory cabinet. In addition.
two unique logic cards were required to satisfy PDP-8/L
I/O bus conventions I ie, ·deYice lIelection card and, an
open col\ect?r bus dri"er card).
Conclusion
(
Fig. 10
.
l
Programmed data encode flowchart
,:
Software implementation of polynomial code generation and detection is possible on any machine with shift
and basic logical instructions. The algorithm consists of
three basic operations: (}) shift data byte and reo
mainder, (21 compare most signifIcant bits, and (3)
Exclush·e OR remainder and genet'ator polynomial (dependent on compare test) .
A flowchart for encodillt. one data byte is shown in
Fig. 10. l\otice that eight iterations of the shift loop are
required for en'r) data Lyte. \''(T orst-case data encoding
requires eight iterations with 'an Exclush'e OR for each
iteration. A typical 16·bit computer with an Exclusive
OR instruction :lnn Iwo or more p~'ogrammable registers
would require flO to 120 instruction executions per data
byle. Assumint! a' polrn6mial code I/O dedce connected
to the same computer could be programmed "'ilh six to
eight instructions, a performance increase factor of 10
to 20 is obtained.
The performance increa~e factor for a PDP-8/L is
much higher. Jue to its 12-bit "ord size. For an integral
number of byte generator polynomials, an integral
number of 12-bi( memory location;; must be used for
check.byte storage. In thi,;. case, onl) n of the 12 bits are
used since pacLin:;- and unpackin2 [l-bit bytes is time
The attempt has been made· here to prodde the reader
with an understanding of polynomial error code genera.
tion and detection with minimal mathematical rie0r.
Practi~al aspects and application of this error-coding
technique ha\'e been considered in a real·world situation
involving remote job entry computing terminals. It has
been shown that significant performance impro\'ements
can be realized by "hardwired software" capable of illl.
pleme~ting a specific generator polynomial for error
detection. The significant advantages of the polynomial
code device described are: III inexpensh'e 15200 for
materials, parts, card assembly), (2) generalized 1/0
interfacing to small computers, (31 elimination of co,.tl~ •
error encoding/detecting software, (4) time·shared capability behleen several communication .lines, with minimum software, and (51 decreased number of undetected
errors passed through remote joh entry and concentrator
subsystems.
The development of more general.purpose 10ric for
implementin A large value of Tminr is equivalent to a low flux
The code rate (m/n) is a Jneasure of the relative windensity resulting in reduced pulse crowding. Tminr is
dow (Wr), i.e., the detection window related to the
effecti ve 1n both writi ng and readi ng. whil e the re 1adata bit period: Wr • WIT • m/n.
tive window is effective only in reading.
Many run-l ength-limi tydgC!)des have been reported and
The old codes without exception have density ratios less
analyzed in the past. - The write data wavefonns and
than. or at best, equal to one. The 3PM code accomplishes
major code parameters of some codes are shown in Figure S~ greater DR than HFM, whiie maintaining the same win1 and Figure 2 for the same data density.
dow and the same clock rate. This is due to USing three
-1)
~
l
;;,::s1!10"1S (c ...n in the T.in ctistance. wI'Iil! ~M LISts
only two pcsltioni (Figure 1). Thls basic feature of
the code originated its nuw; Three-position IICdulation
(3PM). In a general sense, there is a direct evolution
froll double frequency to "no. and then to JPM. The
nl.ll'ber of code bit poSitions in the Tarin distance increased frQIII one to two and then to three, while the
window remained the sane.· The densi~ ratio increased
in proportion to lllin. It is Sftn that if the lIinhUII
transition interval of an existing "no. recording system is lIIIinUined but the code is changed to JPM. the
potential exists of increasing tht data density by 50%.
The maximum transition interval (Tlllx) in the lPM code
is considerably. longer than in MFM. This requires a
more tightly controlled phase-locked oscillator that
is capable of lIIintaining accurate clocking over a max1IUII of 12 clock periods. This problem has bet!! solved
successfully in the window detection of the 3PM code.
The 3PM code write data wavefol"lll has considerable DCcontent and digital sum variation, IS IDOst run-lengthlimited c:odes do. This is of no concern in writing
since the write head is DC-coupled. In the read IDOde
the question of digital sum variations enters into c:onsideration only if ~ want to restore the write data
waveform. 10 However. if we reconstruct the read pulses
by proper spectral shaping to the point that they do
not interfere. the location of the pulse peaks contain
the data accurately and conventional peak detection
can be used. In thi s process, there 1s no need to consider DC-content or OSV of the original write data
wayeform. The optimum spectral shaping is treated in a
companion paper, submitted by W.D. Huber. Based on
his work the following general equation has been derived for the code parameters, when optimum spectral
shaping. Dr optimum equalization is applied to the
ana10gwaveshape. The relative importance of the code
and analog waveshape parameters in the read /IIOde can
be observed from this relationship:
or COo.-ciex 10;;1c. Variab1e ler;;th c!)d!s are lruch m:lrt
efficient and can b! 1mpl~nte~ with l~5S memory. However. the 10gicl1 operations in drcoding, due to the
nature of variable length groups that IllUst be handled.
c:ould be quite complex. Furthermore. spechl precaution
must be used against error propagation. which can be
li.ited in general to tht number of bits in the longest
word.
Tht unique novel al gorithll of tht 3PM code is Similar to
fixed ltngth block encoding and decoding with one .ddition.l rule. The algorithm convtrts three bit data ~roups
into six bit c:ode 9roupS. The encoding fs explained by
looking at Figure 1 and Ff9ure l. The space allowed for
I word of three data bits is divided into six equidistant
positions: '1 to P6' The basic encoding table for one
word is shown in Figure 3.
DATA
WOIIO
0
0
0
0
,,
,,
v·Tnnn n
· .d(SNRi)q
v· '50
~ (SNRi)q(!!!.}(d+l)l-q •
V'ISO
. n
.
(OR)l-q Wrq
Where: K • 0.4. q. 0.37 for (d+l) • 2
q • 0.4 for (d+l) • 3
v is the head to medium speed, TSO is PWSO' measured
in time. of the isolated pulse. SNRi is the input signal to noise ratio at the head. expressed as peak single pulse amplitude to RMS noise. The above relationship has been .orked out for an error rate (without
error correction) of one bit in 10 billion and with a
generous 331 window margin to cover fixed bit shift.
jitter and circuit tolerances. It is valid for a range
of SNRi between 30 and 34 dB. The second part of the
equation focuses attention on the analog properties of
the waveshape. It is seen that density ratio or minimum transition distance is more efficient in increasing
the data density than the relative window. The 3PM code
increases the density ratio by 50% over MFM. while
leaving the relatiVe window the same. An actual data
density increase of 1.S6-times was achieved by using
this code. combined with optimum spectral shaping
equalization at 31 dB SN~. Thus. 3PM combines the advantages in both write and read through its Tmin • 1.ST
feature and appears to 'be the best code to increase
data density without changing the head/l1I!:dium interface.
3PM Code Aloorithm
A code with properties described above can be implemented with a number of different algorithms. The most
str~ightforward method is fixed length bioclc coding.
This. however. is' not effiCient; requiring large memory
-2-
0
•,
,
,,
0
0
"
,
,
•, ,
,
, ,
0
0
0
0
0
0
0
0
n
I'OSTTIONS
••,
,
0
0
0
0
'" • ...,
•• •,
•, , •
•, ,
N
N
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
FIGURE 3. lN1iel Encoding TI!bI.
INnU!NC! M
O'N.lIIIY
DATA
WOI'll)
Max. data density • (.flux rev. density)' DR •
• _1_._. (!!!)(d+l) •
TRAHIITION
IlNA"Y
0
0
0
0
0
0
0
0
0
0
0
,
,,
,,a
,,
,, ,
,, ,
, , aa
,, ,,
,, ,, ,
,
0
0
0
0
0
0
ntANSITION
POSITIONS
ADJACENT WOIIIDS
/
"'feEDING.
~LLOW'NG
x
x
0
X
X
x
x
x
x
,
,
x
0
x
x
,
,
0
x
0
0
,,
a
,
0
,
x
a
x
.... ",
0
0
0
0
0
0
0
0
0
0
0
n
0
0
0
'"
0
0
0
0
0
0
N
0
0
,
...
,
0
0
0
N
,
0
,,,
, ,
a' a
a a ,
, ,,
a a
a a a , a
, o· a , ,
a ,
, , a aa a aa ,
, aa a , a
o·
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
,: YES
0: NO
X : DON"T CARE
FI GURE 4. FlM Encocins witt! Merving
Minimum two zeros are maintained between adjacent ones.
The boundary position CP6) is occupied by zeros in all
code words. In a sequence of words. where a one occurs
at Ps of the present word and also at Pl of the following word the d-2 condition ~uld be violated. The special rule of the 3PM code provides that in this case
the Ps transition of the present word and the Pl transition of the following word will not be written in
their original locations but will be replaced by a single transition at P6' The two original transitions. Ps
and Pl. will be merged into one transition at P6. The
P6 pOSition in the initial encoding table is reserved
for this merging operation.
....
",-
.
The results of the f1nel .ncoding. Ifur the -"9in9
rul. hIS been CArried out. 11 shown in Figure 4. Here
III cQlli)inetions of biNry data II'Ords of three bits elch
Ire shown together .with the influence of Idjacent dltl
II'Ords. If the preceding II'Ord ends 'in PS. I '1 transition
of the pres.nt word will be shffted to the sixth position of the previous word denoud by '6'. Sflril.rly. if
the followingll'Ord starts with
a
tr.nsition of
the present word will b. shifted to
The resul t of
thts .. rging rul. is that .ny n\lN)er of octal data words
Cln b. CAunaud. while Simultaneously maintaining the
d-Z condition .verywhere in the sequenc•• Th. encoding
logic that i~lements this rule is very si~l •• It has
to look back to the Ps position of the previous word
and look ahead to the Pl posit10n of the follOWing word.
thus dealing with II positions Simultaneously. This wlY.
the words are chai ned to one Ino ther ina N wral way.
preserv1ng the fbed block l.ngth property of the code.
Decoding is done in a si.ilar manner. The 7 trlnsition
positions Ire observed simultaneously. They uniquely
ident1fy the binary data word, IS shown in Figure 4.
FIOURE I. Equaliaed ANIot W........
Decoding. therefore. is stau independent. maintaining
the advantage of fixed length blocks. that greatly simplifies the logic. The decoded data II'Ords are identified
Acknowledgment by a word clock. derived from a general clock system .
The
luthor
wishes
to
express his thanks to Dr. H. Cohn
that runs synchronously with the transitions. Error propagation is limiud to a maximum of three data bits (one of the Sperry Research Center for his advice in the
field of code theory and to C.A. Bates, A.P. Geffon Ind
word). This may resul t from the drop-out or drop-in of
W.D.
Huber of ISS for the implementation of this code.
I single transition. or from one transition shifting by
one position in detection. This is better than the
. References
limit of error propagation in variable length codes with
the same parameters.
1. Patel.·A.H •• "Zero-Hodulltion Encoding in Magnetic
It is interesting to co~are the code with the smallest
Recording." IBM Journal of Res. & Dev •• Yolo 19.
fixed-length block code that achieves the run lengths
July 1975. pp. 366-378.
of 3PH. To make the comparison as stringent as possible
2. Tang. D.T •• "Run-Length Limited Codes.· IEEE Interconsider state-dependent codes where past IS well IS
national Symposium on Information Theory. 1969.
present information may be used in forming each code
3. Franaszek. P.A •• ·Sequence-state Methods for Runword. By means of a program devised at the Sperry ReLength-limited Coding.~ IBM Journal of Res. &Dev ••
search Center. it was found that the shortest block
Yol. 14. July 1970. pp. 376-383.
code with minimum spaCing of 1.5 data-bit tillll!s and
4. Cullum. C.D •• "Encoding and Signal Processing."
rau 0.5 converts each 8 bits of data into 16 bits of
Annals of the New York Academy of Sciences. Vol.la9.
code. l1 Thus, this code requires 12.Z88 bits of storage
January 3. 1972. pp. 5Z-62.
'
for its encode/decode tables. or logic suffic:ientfor a
S. Tamurl. T. et 11.. "A Coding Me.thod in Digital
rather cOlllll ex 8-input. 16-output swi tehing circui t.
Magnetic Recording,· IEEE Transactions on Magnetics.
With this comparison the simplicity of the 3PH logic
September 1972. pp. 612-614.
can be properly appreciated.
6. Kiwimagi. R.G. et 11 •• ·Channel Coding for Digital
Recording." IEEE Transactions on Hagnetics. September
This sysum has been implemented ·in a recently released
1974.
pp. 515-518.
.
ISS/Univac high density disk f11e. featuring 2500 bitsl
7. Spitzer. C.F •• "Digitll Magnetic; Recording of Widec:m (6300 BPI) data density. 10 Hbits/seedata rate and
band Analog Signals."Computer Design. September
338 MByte capacity on conventional Mod-ll type head disk
1973. pp •. 83-90.
interface. In I companion piper. A. Geffo~ discusses
8. Mallinson. J.C. and Miller. J.W •• "On Optimal Codes
the cemplete system implementation. Figure 5 shows the
for Digital Magnetic Recording." Proceedings of the
Inalog Wlveshape of I plttern sequence after equaliza1976 Birnringham Conference on Video and Digital Ret10n. It is seen that the pulses are completely sepacording, pp. 161-169.
rated. the interaction is co~letely removed by optimum
spectral shaping. As I result. the pulse peak locations 9. Horiguchi. T. and Morita. K., "On Optimization of
Modulation Codes in Digital Recording." IEEE Transare restored to great accurlcy. A number of dffferent
.ctions on Magnetics, November 1976. pp. 740-742.
·time intervals between adjacent pulse peaks can be ob10. Jacoby, G.Y •• "Signal .Equalization in Digital
served which is characteristic of this code.
Magnetic Recording." IEEE Transactions on Magnetics.
Concl uS ion
Sepuntler 1968. pp. 302-305.
11. Lempel. A. and Cohn. H•• "Run-Bounding Binary Block
A new code has been descri bed that uses the same code
Codes for Magnetic Recording." Internal Sperry Rand
rate as the HFH code, but increases the minimum distance
Research Report. RM-71-19. April 1971.
by 50S. thereby achieving I density ratio of 1.5 data
bits per minimum transition distance. The actual achievIble dlta bit density is related to the code paraareters
and signal to noise ratio in general terms. The new code
has been i~lemented in I comnercial digital recording
disk f11e and reliably accomplished 56S increlse 1n bit
density with the same head/disk interface. used by In
earlier model with HFM code.
'1. '6.'5
-3-
To:
From:
Subject:
Dave Gordon
Date:
Bob Beckenhauer
Copy 10:
2,7 Encoder/Decoder Circuits
. May 30, 1980
E. Asato
D. P.bynahan
,~
L. Raney
. Oleney
S. Dinsmore
D. Huber
H. K"..ok
R. Singleton
T. Ytmg
The pUl~ose of this memo is to summarize the results obtained from an
experimental breadboard of a 2,7 encoder/decoder circuit, for possible
application to future Memdrex disk files.
Schematics l for the breaJboard were provided to Tony Yung and Hoover
Kwok at three stages in the development process - original design level,
original breadboard build level, and functional breadboard level (after
debug) . The ftmctional breadboard schematics were provided on f\tay 28,
1980, after the results described in this memo were obtained.
JEST CIRaJIT
The test circuit consisted of essentially those functions described in the
block diagram on the following page.
The on-board test oscillator provided a 2F frequency of approximately
25~1HZ.
\\'hile this frequency is slightly lo....er than the IBt\l 3370 rate,
it should be close enough f0r the purposes of this demonstration. Also,
using the MECL 10K logic family, ,nruch higher switching rates shou] d be .
attain.able ldthout major problems.
0-
Oa-,-,(1)
--,
(Futhermore, it is expected that timing 'changes ",-ould be necessary anyway
to integrate the circuits into a disk controller. This tends to reduce
the value of detailed timing analyses on an isolated board.) .'
(1)0
en
....
"C::t!
on
The main purposes, therefore, of the breadboard were to establish:
c.
,1)
A working f\~CL 10K prototype ~hich would en~ode and decode all
words in the Franaszek 2,7 code dictionary.~'3
.
2)
A simple, reliable decoder phasing technique for read-back.
3)
A potential scheme for generating system timing pulses.for the
associated disk controller.
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t-1ay 30, 1980
u=mJ
Page 2
~
RESULTS
©
The following chart describes the 2,7 code dictionary:
CODE WORD
DATA \\DRD
1 0.
010
001 0
1 1
011
o OIl
000
o1
0 0 1 0 0 I 0 0
I 000
001 0 0 0
Lo Rep ~ 0 0 0 0 I 0 0 0
Rate
DETENT ASSlcnlENf . ~
0 0
H. Rep ~ I 0 0 I 0 0
Rate
:~l ~RDOBY
0 0 0 1 0 0
To 0
o
To
o
o
o
0 TI 0
0 To 0 0
0 0 0
0 To 0 o
0 0 0 To
0
0
Tl 0 0
0
0
0 Tl o 0
0 0
A "1" in the code word represents a flux transition recorded on, or read
back from, the disk surface. Since it is a 1/2 rate code, there are t\~
possible detent assignments, which are arbitrarily labelled To and T1 •
I~ the photographs of figures 5 and 6, an encoded data pulse which aligns
Wlth Clock B represents a 1, or transition, in the To detent. An encoded
data pulse which is in the space between Clock B pulses represents a 1,
or transition, in the TI detent.
Since the breadboard circuits were capable of repeatedly serializing a
byte of data (applied by manual switches), the test patterns selected
were combinations of either two or three 2,7 words which had their
word botmdaries at the data bytebotmdary. The results are shown in
figures 1 through 4. (Note that this by no means exhausts all the
possible permutations of 2,7 words, but is a reliable indication that
the hardware's encode/decode algorithm works. It may still be possible
to have da ta- dependent timing problems.)
Figure 5 shows the generation of the highest rep rate pattern of 2,7
encoded data in relation to the B Clock. This is obtained during the
time that the word 010 is being repeatedly encoded.
Figure 6 shows the lowest possible rep rate, obtainable by encoding the
word 0011 repeatedly.
Figures 7 through 10 illustrate the results of the decoder phasing
technique. The test sequence was as follows:
1)
Circuits are repeatedly encoding and decoding a byte of l's.
(fig. 7)
2)
A one-detent (1/2 bit time) delay is introduced into
undecoded data stream. Note new timing relationship
- BIT TIME 0 (scope trace 1) and - DECODER A*O GATE
in fig. 8, as compared to figure 7. This results in
the
between
our (trace 3),
erroneously
Dave Gordon
May 30, 1980
. Page 3
~'"
decoding a stream of ones as alternate ones and zeroes. This is in
accord~ce with the 2,7 dictionary:
DATA WORD
1 0
1 1
CODE WORD
o1
0 0
100 0
To Detent.J' 1""
T1 Detent
3)
In figure 9, the decoder phasing has been momentarily enabled, and
then disabled, which causes the decoder to decode a stream of one's
again (even though the lDldecoded data stream is now arriving at the
decoder one detent time later) •
.'
4)
In figure 10, the one detent delay has been removed, and the decoder
again erroneously decodes alternate ones and zeroes, (since the
decoder phasing was disabled), even though the lmdecoded data stream
now arrives at the time it originally did.
This decoder phasing technique is the subj ect of a ~morex invention
disclosure ""hlch is now being written. I recommend it as being simpler,
and more reliable then the method used in the IBM 3370 4 , since it
requires no adjustment to the system clocks.
Figures 11 through 15 illustrate the timing relationships of the breadboard clocking system. Note that for 2F = 29 to 30 ~IIZ, the ABCD Clock
pulses derived will only be about 17 nanoseconds in width. At -higher
data rates, to obtain. greater margin for setting latches, the signals
± IF and ± 1FD could be used instead of the ABCD Clocks. The IF and
lFD pulses will be twice as wide.
.
CCt+1EJ'lfS RELATED TO SOIEMATICS (PAGE TS301
In figure 14, timing margins can be improved by inserting ,more delay
between the 2F input and the clock input to the IF and lFD - generating
flip flops. This, of course, will affect all the downstream system
timing.
In figure 15, note that the equivalent of Clock D (pin 8D-13, page TS30)
is used to drive the bit cotmter. The bit times are generated by means
of a 3-bit Gray code counter and a 3-to-8 bit decoder.
The 3-to-8 decoder is disabled by the same pulse which triggers the cotmter.
The "dead time" between bits may be eliminated by keeping the 3:8 decoder
enabled at all time s • Since it is a Gray code counter, the decoder output
bits shoul0 be glitch-free.
IBve Gordon
May 30, 1980
Page 4
ADDITIONAL C(M.fENTS
...
The 10141 shift, register module type used in the breadboard is not
a standard Merrnrex part. The 10141 seeJred nruch more noise-prone than
the other 10K modules. The worst noise was present on pin 1,
.
particularly at the 2F shifting frequency. This \\-as resolved DY ensuring that the VCC pins (pins 1 and 16) were tied directly to the ground
plane by a via-hole, or with heavy guage wire, rather than' just connecting pins 1 and 16 together with light gauge ~ire.
The breadboard also contained hardware for generating the high-rep-rate
2,7 encoded pattern by means of a 3 bit shift register. This circuit
\\-'as not tested, but should be very easy to implement. This method (or
some equally trivial technique) is recommended instead of the six bit
data loop used in the IBM 3370 5 , since it would be simpler, more reliable,
and avoid patent infringement.
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1. Sr..hematics of 2,7 Breadboard Circuits, pages TS10, TS20, TS30, and
~S40 (BerJeenhaueT)
2.
U.S. Patent 13,689,899 (Franaszek)
3.
U.S. Patent 14,155,760 (Eggenberger
4.
IBM Technical Disclosure Bulletin, Vol. 21, No.1, Jt.me 1978,
Pages 326-327. ''Phase Aligmnent of 1F and 2F Gocks"
(Beckenhauer &Schauble)
5.
U.S. Patent 14,146,909 (Beckenhauer
&Hodges)
&SchaUble)
.
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