Kennedy__9100_192 9100 003_75ips_Operation_and_Maintenance Kennedy 192 003 75ips Operation And Maintenance
Kennedy__9100_192-9100-003_75ips_Operation_and_Maintenance Kennedy__9100_192-9100-003_75ips_Operation_and_Maintenance
User Manual: Kennedy__9100_192-9100-003_75ips_Operation_and_Maintenance
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Operation and lVIaintenance lVIanual
lVIodel 9100
KENNEDV
-MODEL
9100
SPEED
75 IPS
j
;
I
I
Digital Tape Transport
. -+-- -------_ .. _,
INTERFACE
PART NO.
\
STD
192-9100-003
i
DENSITY
ITRACKS
\
9
I 800/1600 CPI
MOD I FI CATl ONS
I'!
006-9100-300B
CONTENTS
SECTION 1- APPLICATION DATA
In troduction ............................. 1-1
Electrical and Mechanical Specifications .. 1-1
Controls and Indicators .................. 1-5
Interface Connections ................... 1-7
Interface Signal Characteristics .......... 1-7
Input Signal Description ................. 1-7
Output Signal Description ..............•. 1-7
Tape Motion Commands .............•... 1-7
Interface Input Signals •................. 1-7
1. 9.1 Setup Commands ................. 1-7
1.9.2 Tape Motion Commands •......... 1-10
1.9.3 Write Commands ................ 1-10
1.9.4 Read Commands ................ 1-11
1.9.5 Shutdown Commands ............. 1-11
1.10 Interface Output Commands ............ 1-11
1.10.1 Status Outputs ...............• 1-11
1.10.2 Read Outputs ...•.........•... 1-12
1.11 Station Select Switch ..........•....... 1-12
1.12 Summary of Characteristics .•.......... 1-12
1 .1
1. 2
1. 3
1. 4
1.5
1. 6
1.7
1. 8
1.9
3.9
SECTION IV - MAINTENANCE INSTRUCTIONS
General .......•........................ 4-1
Preven ti ve Main tenance ................. 4-1
4. 2 . 1 Daily Check ..........•.......... 4-1
4.2.2 Cleaning .......................... 4-1
4.2.3 Visual Check ..•......•........... 4-2
4.3 Routine Adjustment ..................... 4-2
4.4 Lubrication ............•..............• 4-2
4. 5 Wear .........•........•............... 4 - 2
4.5.1 Head Wear ....................... 4-2
4.5.2 Guide Wear .......•.............. 4-2
4.5.3 Reel Hub Wear .....•..•.......... 4-2
4.6 Periodic Inspection ..................... 4-2
4.7 Test Panel Use ........................ 4-2
4.7.1 Test Panel Use ................... 4-2
4.7.2 .Operation ........................ 4-5
4.8 Hub O-Ring Adjustment ................. 4-5
4.9 Tape Path Mechanical Alignment. ........ 4-6
4.9.1 Reel Clearance Adjustment!
Hub Replacement .••............•• 4-6
4.9.2 Capstan Parallelism ................ 4-6
4.10 Checking Supply Voltages ..........•...• 4-7
4.11 Reel Servo Adjustment ................. 4-7
4.11.1 Centering Adjustment ....•...•.. 4-7
4.11.2 Gain Adjustments ......••...... 4-7
4.12 Vacuum Switch .......................... 4-7
4.13 Vacuum Column Adjustment ............. 4-8
4.14' Capstan Zero Adjustment ............... 4-8
4.15 EOT/BOT Sensor Adjustment ............ 4-9
4.16 Tape Speed Adjustment .......••........ 4-9
4.17 Start/Stop Ramp Time Adjustment ....... 4-9
4.18 Rewind Speed ........................ .4-10
4.19 Read Level Adjustment ................ 4-10
4.20 Skew Adjustment ...................... 4-10
4.20.1 Read Skew Adjustment ......... 4-10
4.20.2 Write Skew Adjustment ....... .4-11
4.21 Head Face Shield Adjustment ......... .4-11
4.22 Blower Motor Belt Tension Adjustment . .4-11
4 . 23 Troubleshoo ting ........................ 4 -12
4.23.1 High Error Rate ............... 4-12
4.23.2 Compatibility .................. 4-12
4.23.3 Other Malfunctions ............ 4-12
4.24 Parts Replacement .................... 4-15
4.24.1 Hub Replacement ..•........... 4-15
4.24.2 O-Ring Replacement ........... 4-15
4.24.3 Reel Motor Replacement ....... 4-15
4.24.4 Capstan Motor Replacement .... 4-15
4.24.5 Magnetic Head Replacement .... 4-15
4.24.6 EOT/BOT Sensor Replacement .. 4-15
4.24.7 Tape Cleaner Replacement ..... 4-15
4.25 Module Repair ........................ 4-16
4.26 Maintenance Tools ..................... 4-16
4.1
4. 2
SECTION II - INSTALLATION AND OPERATION
2.1
2.2
Installation ..................•.......... 2-1
2.1.1 Inspection ..........•......•...... 2-1
2.1.2 Mounting ......•.........•.•..... 2-1
2.1.3 Service Access .........•......... 2-1
2.1.4 Supplied Items/Required Items ..... 2-1
2.1. 5 Intercabling ...................... 2-2
2.1. 6 Power Connections ............... 2-2
Operation ....................•......... 2-2 '
2.2.1 Interface ..............•.......... 2-2
2.2.2 Controls and Indicators ............ 2-2
2.2.3 Preliminary Procedures ...•........ 2-2
2.2.4 Tape Threading ............•...... 2-2
2.2.5 Tape Loading ..................... 2-3
2.2.6 Placing Tape Unit On Line ........ 2-3
2.2.7 Tape Unloading and Rewind ....... 2-3
2.2.8 Power Shutdown .................. 2-3
SECTION III - THEORY OF OPERATION
3.1
3. 2
3.3
3.4
3.5
3.6
3.7
Jt.8
3.8.2 Write Electronics ..•.............. 3-6
3.8.3 Read Electronics .......•......... 3-7
Data Section Adjustments ....•.......... 3-9
Introduction ............................ 3-1
Tape Transport Con trol ................. 3-1
3.2.1 Sequence Control ................. 3-1
Write Operation ..................•..... 3-4
Read Operation .....................•.. 3-4
Test Panel ............................. 3-4
Tape Transport Control Adjustments ...... 3-5
Servo System ........................... 3-5
3.7.1 Introduction ...................... 3-5
3.7.2 Vacuum Sensors and Reel Servos ... 3-5
3.7.3 Capstan Servo Amplifier .......... 3-6
3.7.4 Servo System Adjustments ......... 3-6
Data Section ........................... 3-6
3.8.1 Introduction ...................... 3-6
iii
006-9100-400B
SECTION VII - GENERAL INFORMATION AND
APPENDIX
SECTION V - PARTS IDENTIFICATION
5.1
5.2
5.3
5.4
5.5
Spare Parts Ordering Information ..••.... 5-1
In-Warranty Repair Parts Ordering
Information ..•......•...•........•...•. 5-1
Export Orders ..........•............... 5-1
Illustrated Parts List. ..................• 5-1
Field Kits .......•...................... 5-1
Digital Recording on Magnetic Tape Using
NRZI Conventions and Format ..•••.•••• A-I
Phase Encoded Recording ....•...•.•.•••.•••. B -1
Summary of Safety Precautions .•..••.•...••• C-l
Recommended Tools/Test Equipment. •..••.•.. C-1
SECTION VI - WIRING AND SCHEMATIC
DIAGRAMS
ILLUSTRATIONS
1-1
1-2
1-3
1-4
1-5
1-6
1-7
1-8
2-1
2-2
2-3
3-1
3-2
3.... 3
3-4
3-5
4-1
4-2
4-3
4-4
4-5
4-6
4-7
4-8
4-9
5-1
5-2
5-3
5-4
5-5
5-6
5-7
Outline and Installation .••••........•... 1-3
Control Panel Controls and Indicators .... 1-5
Typical Receiver Circuit .......•.......• 1-7
Typical Interface Configuration .......... 1-8
Write Timing .......••..•..•.•....•..... 1-8
Read Forward Timing ..••....•........•. 1-9
Read Reverse Timing .....•....•.•...... 1-9
Sum mary of Interface Characteristics.... 1-13
Slide Identification ...................... 2-1
Captive Screw Location .....•.•......... 2-1
Tape Threading Diagram .........•..•...• 2-2
Control Logic Block Diagram ..•••....... 3-2
Vacuum Sensor Assembly ...........••... 3-5
Vacuum Sensor Operation ....••....... ~ .. 3-6
Write Data Section •.............•..•... 3-7
Read Data Section .......... , ........•. 3-8
Opening of Head Shield .......... ~ ...... 4-1
Test Panel Controls and Indicators ....•.. 4-4
5-8
5-9
Hub O-Ring Adjustment •..•.•.•...•••... 4-5
Reel Hub Assembly ..•••.....••.•.•••.•. 4-6
Capstan Parallelism Adjustment •.••.•..•• 4-6
Vacuum Switch Adjustment ..•.•..••.... .4-8
Vacuum Column Adjustment ....•••.•.•.• 4-8
Head Skew Adjustment .•••...•..••••.•. 4-10
Blower Motor Belt Adjustment .......••• 4-11
Model 9100 Tape Transport: Front View•.. 5-2
Parts Identification •........•...•..•••.• 5-4
Rear View: With Panel •..•.•....••.•.... 5-5
Rear View: Without Panel .•.•••..•....•• 5-6
Vacuum Blower Assembly: Bottom View .•• 5-8
Vacuum Blower Assembly: Top View .....• 5-9
Modei 9100 Tape transport:
Bottom View ... ~ . ~ •••.•••....••• 5-10
Model 9100 Tape Transport: Left Side .•. 5-11
Model 9100 Tape Transport: Right Side .. ~-12
1A8LES
1-1
4-1
Electrical and Mechanical Specifications .. I-I·
Adjustment Sequence .............•...... 4-3
4-2' Troubleshooting ... ~ ....•.•.•.•••••.•••• 4-13
4-3 Troubleshooting (control malfunctions) ••• 4-15
iv
\
\
006-0001-001
PCC NONCERTIFIED EQUIPMENT
Warning: This equipment generates, uses, and can radiate radio frequency
energy and if not installed and used in accordance with the instructions
mahual, may cause interference to radio communications. As temporarily
permitted by regulation, it has not been tested for compliance with the limits
for Class A computing devices pursuant to SUbpart J of Part 15 of FCC Rules,
which are designed to provide reasonable protection against such interference.
Operation of this equipment in a residential areA is likely to ~ause ihterference
in which case the user at his own expense will be required' to take whatever
measures ,may be required to corN~ct the iHterfer~nce.
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SECTION I
APPLICATION DATA
106-9100-100J
S.ECTION
APPLICATION DATA
1.1 INTRODUCTION
in order to generate properly formatted IBM compatible tapes.
The Kennedy Model 9100 is a synchronous digital
magnetic tape unit that with proper external formatting control is capable of reading and writing IBM
compatible tapes, and is used in applications requiring high reliability at moderate tape speeds.
Typical applications include operation with mini computers as peripherals and high speed data collection
systems.
The standard Model 9100 is available in 7 or 9 track
NRZI recording configurations, as well as the 9
track phase encoded configuration. Standard data
recording densities are: 200/556 cpi or 556/800 cpi
7 track NRZI, 800 cpi 9 track NRZI, 1600 cpi 9 track
phase encoded, 800/1600 cpi 9 track NRZI/ phase
encoded, or 800/1600 cpi NRZI. A tape unit select
switch is standard on 7 and 9 track models. A dual
density switch is standard on 9 track dual density
units.
The Model 9100 is equipped with the electronics
necessary for reading and writing tapes and for
controlling the tape motion. The head specifications
and the mechanical and electrical tole!'ances of the
Model 9100 meet the requirements for IBM compatibility However, the formatting electronics, parity
generator, cyclic redundancy check character(CHCC)
generator, gap control, etc., are not included and
must be provided by the tape control and formatter
The standard tape speed is 75 ips; however, tape
speeds from 25-75 ips are available. The data
transfer rate at 75 ips, 800 cpi is 60 kHz, or 120
kHz at 75 ips, 1600 cpi. Other options include power
supply modification to accommodate foreign or de
line voltages, auto power restart, etc.
0
1.2 ELECTRICAL AND MECHANiCAL SPECIFICATIONS
Tape (computer grade)
Width •••••• iI • • • • • •
0.5 inch (1.27 cm)
Thickness •••••••••• 1. 5 mil (0 038 mm)
Tension • • • • • • • • • ••
8.0 ounces (227 gfu)
Reel cUametet • • • •• to 1b.5 ihches (26.6 cm)
Capacity •••.•••• 2400 feet (731. 5 meters)
Ue('l hub ••• ~ • •• 3.69 inches (9.37 clh) dia
per IBM standards
Erase head
Full width
Load point and end of tape reflect,ve strip
detection ••••.•••••.•••••••••• Infrared
(IBM compatible)
0
Broken tape detection
•.••••• ••••• Infrared
Dimensions (see Figure 1-1)
TranspOrt mountihg (horizontal) •••••••••
• •• Stahdard 19-inch (48.26 cm) RETMA rack
Height .... ~ • • • • •• 24.47 inches (62.15 cm)
Width ••.••••••• 19.00 inches (48.26 em)
Depth (from mountihg surface) 10 • • • • • • • • • •
o • • • • • • • • • • • • •
19.0 inches ,<48.26 cm)
Depth (overall) •••
21. 62 inches (54.91 cm)
Weight. • • • • • • • •• 150 pounds (67.95 kgm)
Shipping weight • • •• 200 pounds (75.43 kgm)
Reel braking •.• ~ • • •• • • • • • • • •• Dynamic
Recording triode (113M compatible) •• ,NRZ1/PE
Tape drive ••••••••••• II • •
Single capstan
Tape speed ••••• 45-75 ips (114-190 cm/sec)
Instantaneous speed variation •••••••• ± 1%
Long term speed variation . . . . . . . . . . . ± 1%
Start/ stop displacement.. 0.19 inch (0.476 em)
Start/stop time @ 75 ips •••••••••• 5.0 ms
Rewind speed •••••• 200 ips (508 crn) nominal
Operating ehvironment
0
0
A mIen
b ' t t empera t ure •• • • • • • +2 "-0
t +50 C
Relative humidity (noncondensing). 15% to 95%
Magnetic head assembly
(Write to read gap displacement)
Dual gap 7 track read after write ••••••••
• • • • • • • • • • • • • • • ••
0 30 inch (0.76 cm)
Dual gap 9 track read after write ••••••••
• • • • • • • • • • • • • • • ••
0.15 inch (0.38 cln)
Interchannel displacement error ••• (measured
with IBM master skew tape PN 432362)
Write (maximum)
100 Ilinches (2.5 /Jm)
Read (maximum)
100 Ilinches (2.5 Ilm)
0
Table 1-1.
Power requirements
•••••.• 115 vac, 60 Hz
220/240 vac, 50 Hz
single phase
Volt amps nominal •••
400
Volt amps maximum •••••••••••••
800
0
Electrical and Mechanical Specifications
1-1
•
•
•
•
•
•
•
•
••
lU6-9100-30( B
410-4018
1
DUST COVER OPENS TO APPROX 120 DEGREES
FOR ACCESS TO TAPE REELS
I
DECK ASSEMBLY EXTENDS ON SLIDES
FOR ACCESS TO TRANSPORT & ELECTRONiCS
19.00
(48.26 )
MOUNTI NG
SURFACE
3.00
(76.20)
t
.....i-------------..,/
-,-- ---------.--
FiRST DIMENSIONS ARE SHOWN IN INCHES
D;MENS IONS IN PARENTHESES ARE ;N CENTIMETERS
r
\
---
..-----
\_------
I: :
15 []
(J
(5
~O.SO
,
(1:27)
\:~IT~-n~==================~==~+
I
24.47
(62.15 )
-------
--------
CENTERLINE OF SLIDE
-
I-
12.25
(31. 12)
L..l..U=======:======:=:::::::::-JJ
I
~
19.00
I
(1. 27)
(48.26)-----1
Figure 1-1.
Model 9100 Outline and Installation Drawing
l06-9100-500B
1.3 CONTROLS AND INDICATORS
• •
• •
WRITE
SELECT
READ
WRITE
ENABLE
WRITE INDICATOR.
status is selected.
•
ON LINE
•
•
•
LOAD
REWIND
POWER
Illuminated when write
LOAD. The momentary pushbutton activates the
reel servos (tensions tape) and starts the load
sequence. The indicator is illuminated when the
reel servos are activated and tape is tensioned.
READ INDICATOR. Illuminated when read status
is selected.
REWIND. The momentary pushbutton activates a
rewind operation. This control is enabled only
when tape is tensioned and unit is off line. The
indicator is illuminated during either a local or
remote rewind operation. PreSSing the REWIND
pushbutton at load point initiates the unload sequence.
SELECT INDICATOR. Illuminated when tape unit
is on line and selected.
WRITE ENABLE INDICATOR. Illuminated whenever a reel with a write enable ring is mounted
on the supply hub.
ON LINE. A momentary pushbutton, which functions as alternate action. When first activated
the tape unit is placed in an on-line condition;
When the tape 1.lhit is on line it can be remotely
selected and will be ready if tape is loaded to or'
past the load point. When activated again it takes
the tape unit off line. The indicator is illuminated
in the on-line condition.
Figure 1-2.
NOTE
LOAD and REWIND pushbuttons are disabled when
the tape unit is ort line.
'I
POWER. The ON/OFF switch applies power to
the tape transport.
Control Panel Controls and Indicators
1-5
l06-9100-600A
l
@
TEST
SKEW
HOS
EOT
LOAD
POINT
WRITE
TEST
TEST
MODE
------CYCLE
FAST
FWO
REV
RUN
FWO
RUN
STOP
NOTE
Tape transport must be off line and STOP pushbutton
depressed before test panel can become functional.
TEST point and SKEW indicator. Indicator lights if tape skew exceeds the appropriate skew
(read or write) gate setting. An oscilloscope test point is available for monitoring skew gate
timing.
HDS indicator. Indicates that high density mode has been selected.
EOT in.dicator. Indicates When tape has reached or passed end of tape.
LOAD POiNT indicator.
Indicates when tape is at load point.
CYCLE pushbutton. An interlbcked pushbutton which runs tape in alternating forward and
reverse modes. Useful for making ramp or vacuum sensor adjustments. Depressing STOP
pushbutton terminates this operation.
FAST FORWARD pushbutton. An interlocked pushbutton switch that allows tape unit to run
forward at fast speed. Depressing STOP pushbutton or EOT marker terminates this operation.
titEVERSE RUN pushbutton. An interlocked pushbutton switch that allows tape unit to run in
reverse at normal speed. Depressin.g stop pushbutton or load point marker terminates this
operation.
F'ORWARD RUN pushbutton. An interlocked pushbutton switch that allows tape unit to proceed
forward at normal speed. Depressing STOP pushbutton or EOT marker terminates this operation.
STOP pushbutton. An interlocked pushbutton switch that terminates all tape motion.
WRITE TEST pushbutton EUld indicator. A momentary pushbutton which programs l's to be
written on all channels to facilitate write skew adjustment. WRITE TEST remains active in
FORWARD RUN mode only. (STOP pushbutton must be depressed and TEST MODE selected
to actuate this feature.) The indicator remains illuminated while unit is in this mode.
TEST MODE pushbutton and indicator. A momentary pushbutton selects test mode and activates test panel. When indicator is illuminated, test panel is active. (Tape unit must be off
line and STOP pushbutton depressed before test panel will function.)
Test Panel Controls and Indicators
1-6
I06-9100-700B
1.4 INTERFACE CONNECTIONS
1.7 OUTPUT SIGNAL DESCRIPTION
The interface connectors on the Model 9100 are designed for twisted pair inputs and outputs. For each
active pin there is a ground pin. The mating interface connectors, three 36-pin edge connectors (PN
121-0096) are supplied with the tape unit.
Each output line is driven with an open collector
current sinking logic driver which is capable of sinking lip to 40 ma in the true state. All outputs are
disabled (false) when the tape unit is not on line or
not seleeted.
1.8 TAPE MOTION COMMANDS
1.5 INTERFACE SIGNAL CHARACTERISTICS
For maximum interface convenience, Model 9100 is
configured to control tape motion and direction using
the SYNCHHONOCS FORWAHD command and SYNCHHONOCS H EVERSE command. The tape transport
capstan servo accelerates the tape to the required
speed with a linear ramp. The tape is also decelerated to a stop with a linear ramp. Start and stop
occurs within the interrecord gaps. The ramp time
is 5 ms for 75 ips and varies inversely with tapE'
speed. The amount of tape travel during the ramp
up or ramp down is alway'S 0.19 inch.·
The tape unit responds to zero true inputs and provides zero true outputs. Each signal input is terminated in such a manner as to provide matching for
twisted pair cables. See Figure 1-3. Each output
line is driven with an open collector driver. For
best results the typical interfacing circuit configurations shown in Figure 1-4 should be used. The
recommended twisted pair cable will reduce the
magnitude of intercable crosstalk. Unless otherwise
specified all wires should be 24 AWG minimum, with
a minimum insulation thickness of 0.01 inch. Each
pair should have not less than one twist per inch and
the input-output cables should not exceed 20 feet in
length.
These two factors are to be taken into consideration
when writing and gapping. A delay is required before writing to insure that tape is up to speed and to
allow read after write. Timing diagrams for pertinent commands to provide properly formatted tapes
are shown in Figures 1-5 through 1-7.
1.6 INPUT SIGNAL DESCRIPTION
Figure 1-5 shows the timing requirements for writing
a block ih a read after write system (dual gap head)
in the write mode with read occurring immediately
after writing~ Figure 1-6 shows the timing requirements for reading a block in the forward direction.
Figure 1-7 shows the timihg requiremehts for readlng a block on a read after write system in the re....
verse direction.
The input t'eceiver circuits, due to zero true current
sinking logic design, will interpret a discolinected
wire or removal of poWer at the transmitter as a
logic 0 or false condition. The logic 1 or true state
requires 25 rna current sinkwith less tlian 0.4v.
The logic 0 or false state will be 3v due to the input
matching resistors (see Figure 1-3). The reCdm,;..
mended input pulse width is 2 microseconds. The
rise and fall times for pulses and levels must be
less than 0.5 microsecond. Each input is enabled
when the tape transport is on line and selected.
,...- - - - - 75V -
-
I
II
-!
I
-+ ,.
-I---r
~
220 •
330 >
Figure 1-3.
All commands from and td the input/out~ut connector
are preconditioned by loading tape and placing the
tape unit on line using the front panel controls. The
next commands set up the recorder.
1. 9 .. 1 SETe P COMMANDS
"""- ..,
TRANSPORT SELECT
TAPE TRANSPORT
RECEIVER
TTL 7400,
OTL 836
*_ ~
lJo-ool6L _ .._ _ _
1.9 INTERr:ACE INPUT SIGNALS
SLT
Level
P1-J
A level that when true enables all the interface dri vers and receivers in the transport, thus connecting
the transport to the controller. Transport must also
be on line, and SL T must be true for entire sequence
(until tape motion stopS)a The SLT level may be removed to disconnect the machine from the system.
The read or write status will remain in the last established condition.
I
EQUIV_J
Typical Receiver Circuit
1-7
lO6-9100-800B
+5V
TTL7~
OR EQUIV.
TTL 7400
OR EQUIV .
TAPE TRANSPORT
.. I
20 FT MAX
+5V
TAPE CONTROL UNIT
I
I
:>---4----
TTL 7400
OR EQUIV.
TTL 7438
EQUIV.
I~
I
Figure 7-4.
OR
-::-
Typical Interface Configuration
STOP
RUN
-
t
TAPE
VELOCITY
WAR,-S
WRI1E
DATA
STROBE
-
-
-
-
-
-
---111--1- - - - 0 ._ _1
_ I _ _--:...,
WRITE START---.j
DELAY
I
tWSD-tR+tGD
:
t4-WRlTE
GAP DELAy
t
_~
l--
i
;r /t I
--..,v : i
. ' 450
GO
!l
W_S_D_ _
S
,'-
N .:.
I
I
FIRST DATA BYTE
t=TIME-SECONOS
S=SPEED-IPS
110-0012
Figure 7-5.
I,
RAMP
!.- tR-----lli
_...0.-
I
I
~ I
READ
DATA
STROBE
I
I
~
Write Timing
1-8
--s-
l06-9100-900B
STOP
RUN
------- -1~-----JHj~-----41
/1
lc
~
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1
1
TAPE
VELOCITY
I
------~--~I
1-
14- RAMP
---.j
_.375
t RREAD DATA
STROBE
---------------------FIRST D.AT,l\
BYTE
---l:"'- RAMP
t
.375
S
R"'-S
CHARACTER(S)
LAST DATA BYTE
Ill! UOI!
t=TIME-SECONDS
S=SPEED-IPS
Figure
STOP
RUN
Read Forward Timing
------- -IL---------~H~_ _..'I
:
--Vr
1
TAPE
VELOCITY
1-6.
1
~
-..j
t------ RAM P
l,-----...nl-------.~',I
1
I
I
RAMP
1
t
I
•. 375
~ R
S
READ DATA
STROBE
t .. ~
' IRS
_1_ _
I
I
FIRST DATA BYTE
I
t4-READ STOP DElAY
CHECK
.05
tRSDX-S- (9 TRACK)
LAST DATA BYTE
tRSD"~
110-0014
t=TIME-SECONDS
S=SPEED-IPS
Figure 1-7.
Read Reverse Timing
1-9
(7 TRACK)
106-9100-000E
·
.
edge of the SFC (or RUN and FWD), toggling the
read / write flip-flop to the appropriate state. Internal interlocks in the ta~e unit will p~vent writing
in the reverse direction, when the write enable ring
is missing, when the tape unit is off line, when loading to load point, and during a rewind.
J)~TA DENSITY SELECT
I
(Dual Density only)
DDS
Level
PI-D
Used when the TRANSPORT DENSITY SELECT switch
is in the remote position. When true, this level
selects the high read density (dual density).
WRITE DATA INPUTS
Nine Track
WDP
WOO
WDI
WD2
WD3
WD4
WD5
WD6
WD7
1.9.2 TAPE MOTION COMMANDS
OVERWRITE (OPTIONAL)
-OVW
Level
PI-B
A level that when true conditions appropriate circuitry
in the transport to allow updating (rewriting) of a
selected record. The transport must be in the write
mode of operation to utilize the OVW feature.
SYNCHRONOUS FORWARD COMMAND
SFC
Level
PI-E
The LRCC is written using the WARS Signal. The
LRCC can also be written by prOviding the correct
data character together with a WDS. If the LRCC is
written (DATA-WDS) in this manner a WARS should
be given one character time after the LRCC to insure
proper rnG erasure in case of data input error.
A level that when true, and the transport is ready
and on line, causes tape to move in a reverse direction at the specified speed. When the level goes false,
tape motion ramps down and ceases. If the load point
marker is detected during a SRC, the SRC will be
terminated. If a SRC is given when the tape is at
load point, it will be ignored.
REWIND COMMAND
RWC
WRITE DATA STROBE
WDS
Pulse
PI-H.
A pulse input will rewind the tape past the load point
and stop. The transport will then initiate a load forward sequence and return the tape to the load point
marker. This input will be accepted only if the load
point output is false. The transport may be taken
off line while rewind is still in process. Rewind will
continue normally.
, I
I
Pulse
P2-A
A pulee of 1 IJsec nominal width for each character
to be written. Writing occurs on the trailing edge of
the WDS. WDS may be a 1 IJsec minimum,!. 5 IJsec
maximum pulse. Data inputs must have settled for
at least O.I,."sec before the leading edge of WDS and
remain quiescent for at least 0.1 ,."sec beyond the
trailing edge.
WRITE AMPLIFIER RESET
WARS
Pulse
1. ge 3 WRITE COMMANDS
SET WRITE STATUS
SWS
Level
WDB
WDA
WOO
WD4
WD2
WDI
P2-L
P2-M
P2-N
P2-P
P2-R
P2-S
P2-T
P2-U
P2-V
Nine lines for nine-track operation, seven lines for
seven-track operation. These are levels that if true
atWDS time will result in a flux transition being recorded on tape (transport is in the write mode). In-'
puts must remain quiescent o. I IJsec beyond the
trailing edge of the WDS pulse. The CRCC is written
by providing the correct data character together with
a WDS four character times after the last data character of the record.
PI-C
A level that when true, and the transport is ready
and on line, causes tape to move forward at the specified speed. When the level goes false, tape motion
ramps down and ceases.
SYNCHRONOUS REVERSE COMMAND
SRC
Level
Seven Track
WDC
P2-C
A pulse of 1 ,."sec nominal width that, when true, resets the write amplifier circuits on the leading edge
which is delayed internally by the write deskewing
network. The purpose of this line is to enable writing of the longitudinal redundancy check character
(LRCC) at the end of a record. This insures that all
tracks are properly erased in an interrecord gap
PI-K
A level that must be true at the leading edge of a
SFC (or RUN an~ FWD) when the write mode of operation is required, and must remain true for a minimum of 10 IJsec after the leading edge of the SFC
(or RUN and FWD). SWS is sampled at the leading
(IRG).
1-10
l06-9101-100B
In a seven-track system, til(' leading edge of the WAHS
pulse should be four eharacter times after the leading edge of the wns associated with the last datn
character in the block. In a nine-track system, the
leading edge of the WAHS pulse should be eight character times after the leading edge of the WDS associated with the last data character in the block (four
character times after the cnee is written).
1. 9. --1 HEAD COl\Il\IANDS
When true this level overrides the nutomatic dipping
level electronics and holds the read electronico in
the normal clipping leveL The switC'hlQg' between
read and write clipping levels is not afffet'Ett
1. 9. G SHrTDOWN eOl\I:\IANDS
The use of a given magnetic tape unit ma~' be terminated by an OFF LINE command. Once this command
is given the tape lmit may be returned to an interface
coinmand only by operating the front panel ON LINE
switch.
OFF LINE COMMAND
PI-I.,
A level th~t is true wlwn tlH' tap(' tt'ansport is on tape;
that is, wh('n the initial load sequence is complete
and th(' transport is not rewinding. When true, the
trnnsport is reacl,'" to rl,('d\'(' n remot{' command.
HIGH DENSITY INDICATOR
(Dual Density only)
Pl- F
A len.'l thnt is true onl,'" when the high-densit" mode
ofoper~tion
is s('leckd.
FILE PROTECT
FPT
PI- P
WRITE ENABLE
WEN
Pl-S
A level that is true when a reel of tape with ~ writeenable ring is mounted on the tr~U1sport supph" (or
file) hub. Opposit(l of file protect.
LOAD POINT
LI)P
Level
PI-H
A level that is trlll' when We load point marker is
under the photosensol' and the transport is not l'ewinding~
After rec(lipt of a SFC the signal will r('~
main true until the load point marker leaves the
photosense area.
TAPE RUNNING
A level or'))ulse (minimum width 1 psec) that resets
the on-line flip-flop to the zero state, placing the
transport under manual control. It is gated only by
SELECT in the transport logic, allOWing an OFI';('
to be given while a rewind is in progress. An OFFC
should be separated fr0111 a rewind command by at
least 2 IJsec.
HNG
PI- \'
This is a level that is true when tape is being moved
under capstan ('ontrol and remains true Llntil tape
motion has c('ased. (Includes f6rward, reverse, and
rewind tape motion. )
END OF TAPE
l.10 INTERFACE OUTPUT SIGNALS
EOT
All output signals are enabled only when the tape
transport is ON LINE and SELECTED.
1>1--l'
A level that is true when the i':OT marker is detected
in the fOl'ward di rection. Goes false when th(' VO'!'
lnarker is detected in reverse (SHe or HEWINDI.
1.10.1 STATUS Ol'TPl'TS
ON LINE
ONL
PI-T
('
A le\'d that is true when a reel of tape without a
\yrite-enable ring is mounted on the trnnsport supph'
(oIl file) hub.
AUTOMATIC CLIPPING LEVEL DISABLE
ACLD
Level
Pulse
Le\'e!
IIDI
The tape unit will always have read oelected. When
write is seleCted (SWS) the data just written will be
read back using a high threshold leveLon the read
amplifiers. When SWS is false the normal threshold
is applied to the read amplifiers.
OFFC
TRANSPORT READY
HDY
REWINDING
Level
HWD
Pl-l\I
A level that is true when the on-line flip-flop is set.
When true, the transport is under remote control.
When false, the transport is under local control.
Level
PI-1\'
A level that is true when the transport is engaged in
a rewind operation or returning to the load point at
the end of the reWind operation.
1-11
106-9101-200D
1.10.2 READ OUTPUTS
Read outputs are present at all times.
The high
threshold level is selected internally when SWS is
selected.
READ DATA STROBE
Pulse
RDS
(Not used in phase encoded operation)
READ DATA LEVEL (NRZl MODE)
P3-2
A pulse for each data character read from tape in
NRZl. The average time (1' 1) between two read data
strobes is
T
1
1 (sec)
s • d
Read clock pulse width (tw ) is
t
Nine Track
RDP
ROO
RDI
RD2
RD3
RD4
RD5
RD6
RD7
Seven Track
RDC
RDB
RDA·
RD8
RD4
RD2
RDI
P3-1
P3-3
P3-4
P3-8
P3-9
P3-14
P3-15
P3-17
P3-18
Nine lines, nine track; seven lines, seven track.
These lines may be strobed by either edge of the read
clock and remain true for 1/64 of a character time
following the trailing edge of the read clock. Note:
A eRC character may be all zeros, which will not
cause a read clock.
1
w
A level that is true approximately 20 character spacings after the last data byte (16 dharacter spacings
on seven-channel), and remains true until the first
data byte of the subsequent data block. Note: This
level will be true whenever tape motion is at rest.
s • d • 32
where
s = tape speed in inches per second
d = density characters per inch
The minimum time between consecutive read data
strobes is less than this figure owing to skew and bit
crowding effects. A guaranteed safe value for the
minimum time is 1/2 T 1 •
1.11 STATION SELECT SWITCH
The station select unit on the front panel of the
Model 9100 is wired as shown in Figure 1-8. When
using the station select switch, disconnect the
SELECT line connected to J1-J of the Model 9100.
1.12 SUMMARY OF CHARACTERISTICS
READ GAP DETECT
RGAP
Level
(Not used for phase encoded operation)
Figure 1-8 shows the location of connectors and pin
numbers with signal names.
P3·-12
1-12
106-9101-300C
A
o
A Jl CONTROL V
C
o
o
B
0
E
0
o
o
H
o
b
F
H
J
K
L
M
N
P
R
S
T
U
V
l3
o
R
o
J4
WRITE CONNECTOR J2
B
C
D
E
0
o
o
~OUTPUT
ACT! VE
--A-
J
M
p
..-- INPUT
F
K
GROUND
SIGNAL
DATA STROBE
2.........--N.C.
3
WRITE AMPLIFIER RESET
4
NOT USED
5
NOT USED
6
NOT USED
7
NOT USED
8
NOT USED
9
NOT USED
10 ____ WRITE DATA CHANNEL P
11 ~ WRI TE DATA CHANNEL 0
12 ........__WRITE DATA CHANNEL 1
13 ___-WRITE DATA CHANNEL 2
14 _____ WRITE DATA CHANNEL 3
15 ~WRITE DATA CHANNEL 4
16 _.___WRITE DATA CHANNEL 5
17 _.__WRITE DATA CHANNEL 6
18 _____ WRITE DATA CHANNEL 7
----y_____ WRITE
MNEMONIC
WDS
WARS
WDP
WDO
WDI
WD2
WD3
WD4
WD5
WD6
WD7
CONTROL CONNECTOR Jl
ACTIVE
--AB
C
D
E
F
H
J
K
L
M
N
P
R
S
T
U
V
GROUND
SIGNAL
MNEMONIC
1..
LOAD ON iTNE\OPTI ONAL) - T I f [ 2 _....__OVERWRITE
OVW
3"
SYNCHRONOUS FORWARD
SFC
4 .......__HIGH DENSITY SELECT
HDS
5 _....__SYNCHRONOUS REVERSE
SRC
6---'HIGH DENSITY INDICATOR
HDI
7 _____ REWIND COMMAND
RWC
8"
SELECT
SLT
9 _____ SET WRITE STATUS
SWS
10 ~OFF LINE COMMAND
OFFC
11 ____ ON LINE
ONL
12 ---.-REWINDING
RWD
13 _____ FILE PROTECT
FPT
14 _____ LOAD PO I NT
LP
15 _______ WRITE ENABLE
WEN
16 ______ TRANSPORT READY
RDY
17 _______ END OF TAPE
EOT
18
. . TAPE RUNNING
TRNG
READ CONNECTOR J3
ACTIVE
--12
3
4
5
6
7
8
9
16
11
12
13
14
15
16
17
18
GROUND
SIGNAL
DATACHi'i:NN EL
_____ READ DATA STROBE
_____._READ DATA CHANNEL
____.._READ DATA CHANNEL
NOT USED
-----.-AUTO DISABLE
NOT USED
------ READ DATA CHANN EL
_____ READ DATA CHANNEL
NOT USED
NOT USED
-----GAP DETECT
NOT USED
____ READ DATA CHANNEL
_____ READ DATA CHANNEL
NOT USED
_____ READ DATA CHANNEL
_____._READ DATA CHANNEL
--p;_____ REA D
B
C
D
E
F
H
J
K
L
M
N
P
R
S
T
U
V
0
1
MNEMONIC
RDP
RDS
RDO
RDI
2
3
RD2
RD3
4
5
RD4
RD5
6
7
RD6
,.RD7
STATION SELECT CONNECTOR J4
ACTIVE
---p;-;r
D,F
H,K
P,R
GROUND
SIGNAL
-B--"
SELECTS STATION
E ____ SELECTS STATION
J ~SELECTS STATION
M ____ SELECTS STATION
1
2
3
4
MNEMONIC
SL T1
SLT2
SLT3
SLT4
Figure 1-8. Summary of Interface Characteristics
1-13
-z
SECTION II
INSTALLATION AND OPERATION
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20e-9100-100D
SECTION II
INSTALLATION AND OPERATION
2.1 INSTAI.,LATION
CAUTION
2.1..1 INSPECTION
Prior to installation, inspect thoroueh1y for fo:oeign
material that may have become lodged in the vacuum
columns, reel hubs, Rnd other movine parts.
To a void personal injury and/or transport
damaffe due to dropping of unit, secure
transport in place by alie-ning captive
screws on eaeh slide with the respeetive
threaded holes in the oiseonnect strips Rno
tighten, as shown in Figure 2-2.
2.1.2 MOUNTING
PhysicHI dimensions And outline of the tape transport
are shown in Figure 1-1. The transport reqllires 24.5
inches vertical mounting spaee on the standard 19
inch rack. The transport is mounted on a pHir of
slides which are' Httaehed to the raC'k. The slides are
equipped with a lockout mechanism, shown in Fie-ure
2-1, that prevents their overextension. The lockout
mechanism is gravity activated, requiring each slide
to be mounteri on the sicle of the cabinet for which it
was designed, as indicated on the slide. To ascertain
that the slides are m0unteri correctly, open one slide
(of the pair) and look for the lettprs RH (right hand)
or LH Oeft hand) stamped rlirectly above the lockout
lever on the forward portion of the intermediate
channel, as sh0'.,vn in Figure 2-1. The slide designateri
RH should be mounted on the right hand side of the
cabinet when facing the unit. With the right and left
hand slides securely fastened to the cabinet and in
extended position, align the quick disconnect strips
a ttached to the sides of the transport with the center
track of the slides, as shown in Figure 2-2. Push
transport to\l\.Tards cabinet until fully engaged.
T~ANSPORT
PRESS IN
AND TURN
Figure 2-2. Captive Screw Location
2.1.3 SE,RVICE ACCESS
~INTERMEDIATf.
Access to the plug-in cards and control electronics is
,available with the unit extended on slides from the
sides. The voltage regulator and the servo power
assembly are mounted on the inside of the heatsink on
the side of the transport.
The fuses, power
connector, and interface connectors are also
accessible from the rear of the unit. For servicing
electronics, test points are provided by standoff pins
on circuit boards and are identified by upper case
letters near each test point.
CHANNEL
./
./
T Ii; CK
I
2.1.4
SIDE IJESIGNATOP
~UPPLIED
ITEMS/REQUIRED ITEMS
All required items except the twisted pair interface
cables are supplied with the unit. These required
items and their part numbers include:
Empty 10.5 inch reel (113-0008-001)
Three 36 pin interface connectors (order three
Figure 2-1. Slide Identification
121-0082-002)
2-1
206-9100-200D
Winchester Address Select Connector w/pin (1210108-001; 121-0082-002)
2.2.3 PRELIMINARY PROCEDURES
Before placing the unit in operation, proceed as
follows:
Power Cord (121-9000-003)
Shipping Brace (291-4768-001)
(Shipping brace should be removerl before use and
saved in case the machine is to be shipped in the
future.)
a. Check the tape transport read/write head,
erase head, capstan and idlers for any foreign
material.
Set of I'HCk mount slides (128-0151-003)
b. Check for correct line voltage and make sure
tha t correct fuses are installed (paragraph
2.1.5).
2.1.5 INTERCA RUNG
c. Push primarv power switch on control panel to
ON position: .
.
Installation of the tape transport requires fahrication
of interconnection cahles bet ween the tape controller
Rno the tape trA.nsport.
The three 36 pin cable
CO_lnectol'S that rna te with the connectors on the
units are surrliecf with the system.
2.2.4 TAPE THREADING
To thread the tape on the transport, proceed as
follows:
The connector pin assignments are shown in Figure
1-8. Twisted pair cabling should be used to t'educe
intercable crosstalk. All wires should be 24 A we
minimllm insulation thickness of 0.01 inch. Each rair
should have no less than one twist per inch, anci
maximum cahle length should not exceed 20 feet.
a.
Raise the latch of the quick-release hub and
place the tape file reel to be used on the
supply hub (Figure 2-3) with the write enable
ring sicie next to the transport deck.
b. Hold the reel flush against the hub flan~e Hnd
secure it by pressing the hub latch down.
2.1.6 POWER CONNECTIONS
c. Thread the tape along the path as shown on the
threading diagram (Figure 2-3).
CAUTION
d. Holding the end of the tape, wrap a few
clockwise turns around the takeup reel hub.
Before connecting the unit to the power
source, make certain the line voltage is
correct (115 or 230 vac) and that proper
fuses have been installed.
A detachable power cord is supplied with the tape
unit. The power cord is 7.5 feet long and has a NEMA
three-prong (two power, one chassis ground) plug for
connection to the power source.
2.2 OPERATION
2.2.1 INTERFACE
Before placing the unit in operation, make certain
that the interface connection procedures outlined in
Section I have been performed.
2.2.2 CONTROLS AND INDICATORS
Paragraph 1.3 lists the controls and indicators for the
tape transport and describes the functions of each.
The test panel controls are described in Section IV.
Figure 2-3. Tape Threading Diagram
2-2
206-9100-3000
2.2.5 TAPE LOADING
b. Press the REWIND pushbutton. The tape will
now rewind to the load point marker.
Pressing the LOAD pushbutton energizes the reel
servos and initiates a load sequence. Tape advances
to the load point marker and stops. If for some
reason the load point marker is already past the
sensor as, for example, when restoring power after a
shutdown, tape continues to move for approximately
6 seconds and then initiates rewind automatically.
c. After the tape has been positioned at the load
point under remote or local control, press the
REWIND pushbutton to rewind the tape past
load point to the physical beginning of the
tape.
Once pressed, the LOAD switch is illuminated and
remains ilIum ina ted until power has been turned off
or tape is removed from the machine.
NOTE
The rewind sequence cannot be stopped
until the tape has rewound either to -load
point or until tape is rewound onto the
supply reel after an unload sequence.
2.2.6 PLACING TAPE UNIT ON LINE
2.2.8 POWER SHUTDOWN
After the tape is properly threaded and has been
loaded anc;] brought to the load point, press the ON
LINE pushbutton and make certain the ON LINE
indicator illuminates. (The REWIND pushbutton is
disabled when the tape unit is on line.) On-line sta tus
enables the tape unit to be remotely selected and to
perform all normal operations under remote control.
A tape transport should not be turned off when tape
is loaded and is past the load point marker. Kennedv
9000 series transports are designed to prevent
physical damage to the tape in the event of power
failure, and to minimize operator error which could
destroy recorded da tao In the event of power failure
during tape unit operation, manually wind the tape
forward several feet before restoring power. When
power has been restored, press the LOAD pushbutton.
If load point is not reached within 36 feet, the tape
will rewind, searching for load point. If desired, the
tape can then be advanced to the data block nearest
the point at which the power failure occurred by
i\Hiating the appropriate control commands.
2.2.7 TAPE UNLOADING AND REWIND
Provision
rewinding
However,
manually.
is made in the 9000 series transports for
a tape to load point under remote control.
this operation may also be performed
Proceed as follows:
Although it is possible to develop procedures which
would allow power shutdown between tape files and
tape records this is not recomm~nded. Where data
files are'short, it is preferable t,o use smaller tape
reels.
'
\""
a. If the ON LINE indicator is illuminatec1, press
the ON LINE pushbutton.
The ON LINE
indicator should extinguish when pressure is
removed.
2-3
SECTION III
THEORY OF OPERATION
...:z:
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306-9l00-010A
SECTION
III
THEORY OF OPERATION
The Type 5719 Sensor Amplifier / Driver receives
input from the file protect switch, load point sensor,
and end of tape sensor. These signals are amplified
and gated, then supplied to the Pushbutton Control
and Sequence Control as tape transport status signals
for controlling their interlocks.
3.1 INTRODUCTION
This section describes the Model 9100 tape transport
at the functional block level. The description applies
to the standard dual density 800/1600 cpi, nine track,
75 ips version. Detailed circuit descriptions are
included in the schematic section of the manual.
The Type 3844 Sensor Amplifier/Driver module also
contains the drivers for the WRITE, READ, and
SELECT indicators on the main control panel.
3.2 TAPE TRANSPORT CONTROL
The circuit boards in the control section of the card
cage control the tape transport by generating internal
tape transport commands which are based upon com- .
mands from the interface, as well as status Signals
from the tape transport.
In the Model 9100, the following circuit boards control
the tape transport:
Type
Type
Type
Type
3841 Line Terminator
3842 Interface Control
3843 Pushbutton Control
5719 Sensor Amplifier/Driver
Type 6667 Sequence Control
Type 5733 Ramp Generator
Type 6666 Servo Control
Figure 3-1 is a block diagram of the Model 9100.
Tape commands from the interface connector are
supplied to the interface control board which will
generate internal tape transport commands if certain
interlocks are satisfied. These tape transport eommands are then supplied to the Pushbutton Control
board. The Sequence Control and the Pushbutton
Control also contain several interlocks which must
be satisfied before the Pushbutton Control can encode
the tape motion commands onto one of three command
lines: RUN NORMAL (RNNl), RUN FAST (RNF1),
and REVERSE SELECT (RVSl). These three command lines are supplied to the Ramp Generator,
which provides linear ramp-up to speed and linear
ramp-down to standstill in order to minimize tape
stress and maintain accurate tape speeds. The output of the Ramp Generator is supplied to the capstan
servo preamplifier on the Type 5666 Servo Preamplifier board. The capstan servo uses the Ramp
Generator output to control capstan motor current,
while the capstan tachometer supplies a stabilizing
feedback voltage to the capstan servo based on capstan motor speed.
3.2.1 SEQUENCE CONTROL
Due to certain special sequencing requirements involved in controlling the tape transport, a speCial
Sequence Control module has been developed for the
Model 9100. Transport control pushbuttons on the
maIn control panel connect directly to this board.
In addition, broken tape, vacuum switch, and load
point status Signals are input to the Sequence Control
board. Thus, when tape breaks or vacuum pressure
drops, "the Sequence Control will initiate the appropriate tape transport command to stop reel movement.
Also, the sequencer will condition the actions caused
by pressing the REWIND pushbutton dependent upon
whether tape is in front of or past the load point
marker.
Four sequences are discussed: the POWER ON sequence, which occurs after the POWER pushbutton
is pressed, the LOAD sequence, which follows the
POWER ON sequence after the LOAD pushbutton is
pressed, the UNLOAD sequence, which occurs when
REWIND command is given and the tape is on the
load point marker, and the POWER OFF sequence,
when unit is loaded and power is turned off from the
front panel.
3.2.1.1 POWER ON Sequence
When the POWER pushbutton is pressed, the low
power transformer and various regulated voltages
are generated. The vacuum blower and high power
transformer are enabled through main relay K4.
I
3.2.1.2 LOAD Sequence
During this sequence, the vacuum blower motor is
turned on, +24 vdc and -24 vdc is supplied to the
electronics, servo relay Kl is actuated to enable
reel motors and power latch, tape is tensioned and
3-1
306-9100-200A
r---
-- - -
I
I
I
I
I
I
-- - - - - - - -----------,
CONTROL SECTION
+ lOV + lOV
I
-----....,
MAIN CONTROL PANEL
: '
IPOWER liON LINd ~ IREII' INQJ:,
I
I
,---------:
END OF TAPE
SENSOR
LOAD
:
PO I NT ,
SEN S 0 R ,
FPT SWITCH../o
~
I
I
..r:::;:L
. . . . . . . . ._ _ _ _
•
,
!____ .:_~---.:..j\\--...J
~_-~~]-t + ,
L- ..
~----__~L~P--~'--~~.
FILE PROTECT
WRDY
(FROM PUSHBUTTON
CONTROL)
-9- -Q-
-Q-
I
L ___ .: _____
BKN TAPE~
SENSOR
AMPLI FI ER
I
• .....- - - - TACH OUTPUT
I - - - - - - -....... HI PWR RELAY
SEQUENCE
HI PWR SW
CONTROL
(SS2,PWR SUPPLY)
.......- - -..... SERVO DISABLE
ERASE HD ..J:VACOSW
~
4---DRIVE
W.HEAD I'::' MONITORS
DRIVE 1
TAPE
(TO WRITE I
COLUMN ..."'""""...........
. - . _ - _.. AMPLIFIER)I
VACUUM)
i-
BKN SENSOR
1-----""""'....
-...t-----..... SENSORDISABLE
~~ ___ ~-1k;---nJ _ ~EWIND L~A~'--:'=========(S:S:1~m~~:~8m
~i -INTERFACE
CONTROL
r
EOT I
I
I
,
,'.
BKN TAPEI
mm
m
I.
SFC
SRC
I...
I
RWC
,'.
OFFC
MOTION
CONTROL
LOGIC
'-
,
.
'-
RWCl
OFFCl
I
I
I
4~
I
I
I
I
I
I
I
SWS
1
WRITE SELECT
WRITE
SEL ECT
1
I
RWDGI
FPT
I
I
LP
I
WEN
ROY
4--
ON LINE
DRIVE
CONTROL
LOGIC
41
.... ,
I
I
I
ONL 1
.. ,'
I
I
,
I
I:
,
1
-,
41
...
I
I (TAPE TRANSPORT
ST ATUS TO
INTERFACE)
I
I
,
FWD RUN
STOP
I
IjWRITE TESTI 1
IITEST MODEll
I
,
,
1 TEST PANE L ,
I
I
I
II
I'
I REV RUN
I
I
I
I
,,I CYCLE IIII
, FAST FWD I
4,
... 1
I
I
I
RVS 1
r,:----:;,
I
I
I
I
I
I
TO RAMP
GENERATOR
BUSY
I-
I
,'"
,'"
Ao
,I
I
SLT
RNNJ
RNFI
,1.,.
I
INTERFACE
CONNECTOR
PUSHBUTTON
CONTROL CARD
SWITCH
L _ _ _ ....J
WRITE
CONTROL
LOGIC
---
EaT I
,
,
TNG ,
I
I
(TO SENSOR AMP DRIVER)I
I
I
I
=-l
L- - -
;':AD
;A~A
OUTPUT TO
~N;i;;:A-;:-E
(RDO.RDl ETC.)
-
t
'-
-~
L _2l0-2047A
_________________ -
Figure 3-1.
I
I
..
RE~D
DATA
OUTPUT
_________ J,
Control Logic Block Diagram
3-2
WRITE READY
306-9100-300A
r--------------------------~
I
SERVO CONTROL; REEL & CAPSTAN MOTORS SECTION
I
I
I
SERVO
I
I
I
SUPPLY
r--------, SERVO
SERVO PREAMP , AMP
I
I
I
I
...._
I
I
I
I
SERVO ENABLE----'........----'
RELAY
I
VACUUM
SENSORS
I
I
I
I
RNNI •
I
RAMP GEN
OUTPUT
FROM DRIVE RNFI
CONTROL
•
l.OGIC
120VAC
~
<
...._ -.. 1
I
SUPPLY
SERVO
PREAMP
TAKEUP
SERVO
PREAMP
!
-8V
ENABLE
RELAY Kl
+18
V
~RATEiO
IBOARD:
'2~7JLJ
I
SUPPL Y:
MOTOR SERVO
ENABLE
RELAY 0
I
I~--o
I
Kl
I
---,
• BRAKE.
: BOARD I
~----.. I
....- - - -.. lCAPSTAN
SERVO
I AMP
I
I
IK2
L5~ Z.O_J
TACHOMETER
0---
0
v AC UUM -Tt-;;=::::........
~ MOTOR
FROM
SEQUENCE,
CONTROL
HI
POWER
FROM WRI TE
CONTROL LOGIC
I
WRITE READY
(WRDY)
I
I
RDP TO
INTERFACE
DUAL
PCB!
CLIPPING
I
I
I
RDP
RDP,RDO,RD1,etc
'READ
TO READ DAT~A~~______________----------~I--~~_<
~
PREAMP ~ READ
OUTPUT
I
HD
I ___________________ J
210-2047B
L
Figure 3-1.'
Control Logic Block Diagram
3-3
306-9100-400A
and the machine goes through the load sequence described above. Pressing the front panel ON LINE
pushbutton now places the transport on line, preparing the transport to respond to interface commands
as soon as they are available. When the transport
is selected by a SLT true command from the interface, the Interface Control board's gates are enabled,
allowing the transport to accept interface commands
and return transport status signals to the interface.
drawn into the vacuum columns, and the reel servo
loop is closed. At the completion of this sequence,
the tape is properly tensioned. The capstan servo
now receives the command to advance at normal
speed to load point and then stops. If load point is
not reached within 6 seconds after pressing the LOAD
pushbutton, the sequencer will command the transport to rewind the tape, searching for load point.
All operation is interrupted in case of broken tape
or loss of vacuum as determined by the vacuum switch.
In this instance BROKEN TAPE true signal will be
supplied from the Sequence Control and all servos
will be disabled immediately. An END OF TAPE
true signal from the END OF TAPE sensor will not
terminate a write operation. Instead, an EOT status
is given to the interface, which should be used to
generate a proper sequence to terminate writing.,
Interlocks ensure that the transport writes data on
tape only when the tape is properly loaded, the reel
has a write enable ring, and the tape is moving forward at normal running speed. When SET WRITE
STA TUS from the interface goes true under these
conditions, WRITE READY true is supplied to the
Sensor Amplifier/Driver module. Here it turns on
the write and erase head current drivers and illuminates the WRITE indicator on the front panel. WRITE
READY and SELECT1 (combining ON LINE true and
SELECT true) are also supplied to the data electronics
card cage where they enable the write and read amplifier stages. With WRITE READY true, the interface supplies the properly formatted data to be written
on tape.
3.2.1.3 UNLOAD Sequence
During an unload operation, the tape is slowly and
completely rewound onto the supply reel after it
stops at load point during a normal rewind sequence.
To initiate the unload operation, the transport must
be taken off line, either through an OFF LINE interface command or by pressing the ON LINE pushbutton. Next the REWIND pushbutton is pressed.
This sets the unload flip-flop on the Sequence Control board, causing UNLOAD true to be output.
3.4 READ OPERATION
When the tape is properly loaded, not rewinding, and
WRITE READY is false, a read operation is selected
and the Sensor Amplifier/Driver module illuminates
the front panel READ indicator. The read preamplifier and amplifier are now enabled to generate
read signals back to the interfaceo
This connects the supply reel motor to -8 vdc instead of +24 vdc, opening the tape position servo
loop. The takeup and supply reels now slowly rotate
in reverse until the tape is completely rewound.
When the physical end of tape is reached, BKN tape
goes true and the unload sequence is terminated.
Note that the POWER pushbutton is disabled during
the entire unload operation.
3.5 TEST PANEL
The test panel is standard equipment in the Model
9100. Located next to the control panel, it is used
to perform tests and adjustments on the tape transport while it is off line. This eliminates the need
for many external test fixtures as well as saving
valuable computer time.
3.2.1.4 POWER OFF Sequence
When the POWER switch is shut off, the vacuum motor
turns off immediately. The sequence is: vacuum
switch off, sensor disable true (enabling the reels to
remove tape from the vacuum chamber), servo disable true (applying braking signals to reels), all
power then turned off.
3.3 WRITE OPERATION
The panel becomes operational only when the transport is off line, and the test panel STOP pushbutton
is pressed. If these conditions are satisfied the test /
panel pushbuttons are enabled when the TEST MODE
pushbutton is pressed. (The function of each test
panel control and indicator is provided in Figure 4-2
of the maintenance section.)
(Occurs after LOAD sequence is completed)
The main pushbutton panel on the front of the tape
deck is used to prepare the transport for operation.
After power is turned on and the tape is properly
threaded, the front panel LOAD pushbutton is pressed
Basically, the test panel is used for making skew,
speed, ramp time, and servo system adjustments.
Besides providing complete control over tape speed
and direction, it can initiate a write test by generating
a crystal controlled all-1 test pattern on the tape.
3-4
306-9100-500
The test panel also contains indicator lamps which
illuminate when there is excessive skew, high density
is selected, end of tape or load point is reached, or
a write test is being performed. (The skew test indicates proper alignment of the read/write head.)
motion. These sensors are variable capacitors.
Each capacitor consists of a plated PC board covered
with flexible, metallized mylar. The edges of the
board are 5/1000 inch thicker than the copper center,
forming a long groove (see Figure 3-2). Several
holes are drilled through the board. The grooved
area is covered with metallized plastic, mylar Side
down to form a dielectric. Wires are connected to
the metallized covering and the copper plate to form
a capacitor. The sensor is then mounted to a hollow
metal chamber to form the base of the column.
The test panel also contains a CYCLE pushbutton,
which runs the tape forward and reverse continuously
for making ramp time and reel servo adjustments.
The logic Circuitry required to translate test panel
commands into tape transport commands is located
on the Pushbutton Control card. The skew detect
network for making skew tests is located on the Dual
Density Control contained in the data section of the
card cage.
When the Model 9100 is turned on and forward mode
is selected, the vacuum pump attached to the back of
the vacuum chamber draws the tape upward into the
tape chamber (see Figure 3-3). A high vacuum exists
above the tape in the enclosed portion of the chamber.
No vacuum exists at the open end of the tape chamber. A partial vacuum is present in the vacuum
chamber behind the tape sensor.
3.6 TAPE TRANSPORT CONTROL ADJUSTMENTS
The Kennedy tape transport requires few adjustments.
These are preset at the factory and should not be
changed unless there is strong reason to believe adjustment is required. The following adjustments
are made on the control logic modules:
Adjustment
Normal running speed
Ramp-up time
Ramp-down time
End of tape/beginning
of tape
Since there are holes drilled in the sensor, the difference in pressure thus created presses the metallized mylar covering against the copper plate over
the area below the tape loop. Thus the capacitance
of the sensor changes as the tape loop moves in the
column.
Location
R14, Ramp Generator
R3, Ramp Generator
R4, Ramp Generator
R16, Sensor/Amplifier
Driver
The adjustment procedures are outlined in the maintenance section of the manual and in the circuit descriptions of the individual schematics.
~LLlZED MYLAR DIAPHRAGM
3.7 SERVO SYSTEM
3.7.1 INTRODUCTION
The transport servo system advances the tape past
the tape heads at a precisely controlled speed while
maintaining a constant tape tension. The servo section is composed of three basic blocks: the takeup
and supply vacuum sensors, takeup and supply reel
servos, and the capstan motor servo.
P.C. BOARD
3.7.2 VACUUM SENSORS AND REEL SERVOS
When the machine is running forward normally, tape
loops form approximately half way up the takeup· and
supply vacuum columns. (This position will vary
depending on tape direction and speed. However,
tape loop positiort should not fluctuate once established in any given mode.) Two specially designed
tape sensors are positioned behind the tape loops to
maintain the tape loop position while the tape is in
110-0110
Figure 3-2.
3-5
Vacuum Sensor Assembly
306-9100-600
~--------------------'---------------------VACUUM
COLUMN~
These adjustments are preset in the factory and should
not be changed unless there is strong reason to believe
adjustment is required. Adjustment procedures are
outlined in the maintenance section of the manual
and in the circuit description of the servo system
schematic.
,..........-METALLIZED MYLAR
~.-----DIAGRAM
~
y----
MAXIMUM __
VACUUM
~
TAPE LOOP-___
3.7.4 SERVO SYSTEM ADJUSTMENTS
~
,~ I~PARTIAL
I
..
VACUUM
II
,
".1 :
Adjustment: R4, R54 Frequency Controls
Function: varies basic frequency of oscillators to
control speed of reel motors
Location: Type 6666 Servo Preamplifier
~;~~~_-RIPPLE POSITION
-~
~~'!1
'!
Adjustment: R17, R65 Gain Potentiometers
Function: eliminates tape loop overshoot when tape
direction is changed
Location: Type 6666 Servo Preamplifiers
I(
YI.
ATMOSPHEruC
l.
I
PRESSURE
:;}5
210- 2 a5 2 \
I 1-'-
Adjustment: Rl15 Capstan Servo Zero
Function: eliminates capstan creep when tape is
stopped
Location: Type 6666 Servo Preamplifier
1--:--]--PARTIAL VACUUM
..'
'~."·iif:'<~':"'. ~~/
""1,,.
:~J
~'
l
3.8 DATA SECTION
3.8.1 INTRODUCTION
VACUUM SENSOR
The data section includes read/write amplifiers and
interface cards containing output drivers and timing
controls. Block diagrams are shown in Figures 3-4
and 3-5.
Figure 3-3. Vacuum Sensor Operation:
Cross Section View
The tape loop sensors are connected to an oscillator
as the frequency control element. Any capacitance
increase caused by the tape loop moving up the column
decreases the output frequency of the oscillator and
vice versa. This output frequency is integrated and
filtered, and dc zeroed in to develop a dc motor control voltage. Thus the torque of the reel motors is
controlled to centralize the tape loops within the vacuum columns during operation.
The data section consists of seven circuit cards that
plug into the data masterboardo These include a Dual
Density Control, a Dual P Channel/Clipping Control,
a pair of Quad Read Amplifier modules, a Four Channel Write Amplifier card, a Five Channel Write Amplifier card, and a Data Terminator card.
3.8.2 WRITE ELECTRONICS (Figure 3-4)
3.7.3 CAPSTAN SERVO AMPLIFIER
A write amplifier channel is provided for each tape
channel. Four of these channels and the circuitry
typical of all write amplifiers are contained on Type
4366 Write Amplifier. The five remaining write amplifier stages are located on Type 4368 Write Amplifier. These cards plug into the masterboard, from
which the necessary head connections are made.
(Two of the channels on the Type 4366 Write Amplifier are not used in seven-track operation.)
A RUN NORMAL, RUN FAST, or REVERSE signal
from the Ramp Generator is decoded and then supplied to the Capstan Servo Amplifier on the Type
6666 Servo board. This capstan servo can be disabled by SERVO DISABLE true from the Sequence
Control. Motor speed is kept constant by feedback
from a tachometer ~ounted to the capstan motor.
This feedback is compared to the Ramp Generator
input. Any difference voltage caused by motor speed
deviation is amplified to develop a corrective voltage
for returning the motor to proper speed. A sampling
of tachometer output is also directed to the Sequence
Control.
Each write amplifier channel consists of an input
buffer, a digitally adjustable deskewing circuit, a
clocked flip-flop, and a write head driver. The skew
characteristics of each read/write head are tested '
at the factory and the write amplifier switches are
3-6
306-9100-700
WRITE
CONTROL
(FROM REAO
BUFFER)
r-
WDS~
WARS
FROM
TAPE
CONTROL
UN IT
PLUG-IN MODULE
i [ :1 ~~:i~ 1
I
I
I
I
I
---...
I
I
WOP
WOO
WDl
WD2
WRi TEAMPLr mRlCOmO-L- ,
.....
I
....
I
I
I
WR I TE
"GATiNG
(ALL CHANNELS)
WRITE LRCC
(ALL CHANNELS)
WRITE AMPLIFIERS
(PARITY, 0, l. 2 )
I
IL _ _
GATING
WRITE
_____
_LRCC I
~
r 5-CHANNEL WRIn AMPLI FiER-1
PLUG-IN MODULE
I
WD3
WD4
WD5
WD6
WD7
IIOMOOU
....
..•
I
I
"
I
I
I
WRITE
AMPLIFIERS
(3 THRU 7)
•
I
IL
I
I
WRITE
LRCC-...l
_GATING
______
__
Figure 3-4.
Write Data Section
set to compensate for the skew, using channel P as
the fixed reference channel. (Normally the write
deskew switch settings should never be changed.
When a new head is installed the factory furnishes a
label displaying the new deskew switch settings required to compensate for the characteristics of the
new head.)
detect the interrecord gap and excessive skew. The
components comprising the read section include the
magnetic read head, the Read Preamplifier module,
Read Amplifier/Clipping Control module, and a pair
of Quad Read Amplifier modules o Figure 3-5 is a
functional block diagram of the read section, showing
the general signal flow between the cards. A detailed
circuit description of each circuit card accompanies
the schematic of the card.
The write e1ectronics section also includes the write
data strobe buffer which clocks the write amplifier
flip-flops, and a write amplifier reset circuit to clear
all write amplifier flip-flops. The write amplifier
reset is used to write the longitudinal redundancy
check character. During a write test mode, initiated
by the test panel with the recorder off line, the write
electronics generates an all-l test pattern on tape
derived from a crystal controlled reference frequency
F R' supplied from the module in the read electronics.
The test pattern can be used to test write deskewing
as well as other functions of the data electronics.
Low level analog signals on the order of tens of millivolts are supplied from the read head to the Read
Preamplifier module. They are linearly amplified to
an output voltage (adjusted by a potentiometer for
each read preamplifier stage) of approximately 8
volts peak to peak during 800 cpi NRZI read operation. The amplified analog Signals are then supplied
to the nine read amplifier stages, eight of which are
located on the Quad Read Amplifiers. (Channel Pis
directed to the Read Amplifier/Clipping Control module.) Each read amplifier stage includes a peak detection cirCUit, a filtering network, an output data
register, and a pulse generator.
3.8.3 READ ELECTRONICS (Figure 3-5)
The function of the read electronics is to convert the
data recovered from the tape into digitized wave
forms, deskew, and supply it to the interface with
its respective read clock. The read electronics also
The analog signals from the preamplifier are detected
only when they exceed the positive or negative clipping levels provided by the Dual P Channell Clipping
3-7
306-9100-800
~--,-----------------------------------------------------------------------------------------------~
DUAL P CHANNEL/CLIPPING CONTROL
:w:
~
U
HI DENS lTV
SEL EC T
SELECT 1
TE ST MO DE
DATAlN
REG
1-'
-
-S
0::
...J
U
_ _ _oc
DUAL DENS ITY
CON.TROL
.~
I
U
0
Q..LoJ
CC~
\.!)LoJ
I
LoJ
LoJ
Q..
---
---
~
~HDI
HI DENSITY
SELECT
NETWORK
I
I
I
IHDENS
-
READ GAP r---DETECT
(FROM READ AMPS)I
I
I
CRYSTAL
OSCILLATOR/
DIVIDING
NETWORK
I
SKEW DETECT
READ CLOCK
NETWORK
GENERATION ~
r--
I
I
I
I
BUSY
I
LOAD
POINT
L
~
REGISTER
RESET
~------
-----
I
~
LOW DENSITY
SELECT
NETWORK
~
--
RESET R
TO WRITE AMP
-RESET
TO
INTERFACE
W
SKEW LAMP
(TO PUSHBUTTON CONTROL CARD
RESET R
NRZI
CHANNE L
o
l
CHAN 0
CHAN 1
CHAN 2
CHAN 3
-
'@
@--
-
......
~
RESET R
NRZI
4
5
~
6
~
7
;;::
-
~
..-.-.
READ
PREAMP
CHAN 4
CHAN 5
.s.HAN 6
~_HAN
..
.....
....
QUAD READ
AMPLIFIER
NO.1
i~"---
I. . :.....
QUAD READ
AMPLIFIER
NO.2
......
7
~
READ
READ
READ
READ
...
~+
READ
READ
READ
READ
1
2
3
CLIP
CLIP
CHAN
CHAN
CHAN
CHAN
4
5
6
7
I
DUAL
jPE-PVSI: - - I
FROM
READ CHAN P
PE
CHANNEL P
DENSITY CONTROL
~
AMPLIFIER
f-4- ~.
STAGE
CHAN P
~
~t
I CLIPPING
DUAL P
I
210 -2051
0
~t
I~t
-- - <:e--
CHAN
CHAN
CHAN
CHAN
~
FROM DUAL
DENS ITY CONTROL (
CHI
CONTRO~
GAP DET
.
I ~Bn
DATA IN REG
I RESET R ...
AUTO
CLIPP I NG
LEVEL
CONTROL
L
Read Data Section
3-8
....
I
I RVS'
I SEL
IBSY
I WRDY
IRNN
IRTH
_!J
----------------------,._._---_._--_._---figure 3 -5 .
...
...
...
.
...
FROM
CONTROL
SECTION
\
FROM
INTERFACE
306-9100-900A
Control module. They are then rectified and peak
detected, with the resulting digitized wave forms
containing negative-going transitions corresponding
to the peaks of the input analog signals, e. g., one
bits in the NRZ 1 code. The digitized wave forms
are supplied to a filtering network which eliminates
spurious pulses between transitions. The data of
each channel is then stored in a register which generates DATA IN REGISTER to the Dual Density Control.
The Dual Density Control card supplies a HEAD
CLOCK output to clock the data registers of all nine
channels simultaneously, supplying the data character to the interface.
When an error is detected, and the transport is commanded by the interface to reread a block, the read
amplifier clipping levels are switched automatically
by the Dual P Channel/Clipping Control module to
maximize the recoverability of marginally recorded
data. First the clipping levels are lowered to recover
possible partial dropouts. If the block is still in
error, the clipping levels are switched to higher
levels to eliminate possible baseline spikes.
The Dual Density Control module contains circuitry
common to all nine channels. It generates the read
clock and detects excessive skew, as well as detecting the interrecord gap and providing the interlocks
necessary for 800 or 1600 cpi density selection. The
Dual Density Control also supplies reference frequencies to the Write Amplifier modules in order to
generate the write test pattern.
In the phase encoded mode, the analog signal with
its two main frequency components is amplified,
peak detected, and digitized. Threshold detection
for PE mode is identical to NRZI threshold detection, except for the absence of RCLK and RGAP outputs to the interface. The output of each ch~nel
represents its respective flux change.
3.9 DATA SECTION ADJUSTMENTS
The follOWing adjustments are made in the data electronics section:
Adjustment
Read preamplifier amplitude
Skew alignment
Location
Type 5728 Read
Preamplifier
Read/write head,
write amplifi er s
The adjustments are preset at the factory and should
not be changed unless there is strong reason to believe
that readjustment is required. The adjustment procedures are described in the circuit description of the
Read Preamplifier and Write Amplifier schematics.
SECTION IV
MAINTENANCE INSTRUCTIONS
••i
......
z
•Zn ...n
...
ell
1ft
z
ell
0
Z
.... <
"c:...n
0
Z
ell
406-9100-1008
SECTION
IV
MAINTENANCE INSTRUCTIONS
4.1 GENERAL
as isopropyl Hlcohol will do. DO NOT USE: Hcetone
or' lacquer thinner, aerosol SPl'Hy cans, or rubbing
alcohol.
Kennedy Company tape trHnsports aT'e highly T'eliHble
precision instrur,nents which will provide yeHr's of
trouble-free performance when properly maintained.
A planned program of ,'outine inspect ion and
maintenance is essential for' optimum performance
and reliability.
The units r'equit'e very few
adjustments and these should not be per'formed unless
there is strong reason· to believe they are required.
All electl'ical Hdjustments are preset at the factor'y
and should not require reHdjustment except Hfter long
periods of time.
Do not use an excess of any solvent, and be extremely
cfH'ei'lIl not to allow solvent to penetrate ball beHrings
of idler rollers, capstl:ln motol', etc., since it will
destr'oy their lubricH tion.
CAUTION
Do not Httempt to clean the mylar sensors in columns
or allow solvent to contact the element. Dirt and
oxide will not impede the sensor operHtion.
4.2 PREVENTIVE MAINTENANCE
To assure continuing trouble-fr'ee operation a
preventive maintenance schedule should be kept. The
items involved are few and simple but very important
to proper tape transport operation. The frequency of
performHnce
will
vary
somewhat
with
the
environment and degree of use of the transport so a
rigid schedule applying to all machines is difficult to
define. The recom mended periods below apply to
units in constant operA. tion in ordinary environments.
They should be modified if experience shows other
periods arc more SuiUlble.
4.2.1
Other' items in the tape path should be cleaned at the
same time as the mHgnetic heHd.
These include
columns, idler roliers, tape guides, capstfln, and tape
cleaner slIrface.
The techniques Hre similar to those outlined Hbove for
head cleaning.
DAILY CHECK
Visually check the machine for cleanliness and
obvious misadjustmcnt.
If items in the tape path
show evidence of dirt or oxide accumulation, cleHn
thoroughly.
4.2.2
CLEANING
AU items in the tape pHth must be kept scrupulollsly
clean.
This is par'ticulHrly true of the head and
guides. The inside of the dust cover m list not be
Hllowed to accumUlate dirt since tmnsfer to the tape
wiJl ('Huse nllll function.
In ('Ieuning it is imporUmt to be thol'ough yet gentle
flnd to Hvoid eer'tain dangerolls pmctices.
4.2.2.1
HeHd Cleaning
?lO-200oA
Oxide or dirt Hccumulations on the heHd surfaces are
removed using a mild organic solvent Hnd H swab. Q
tips flre convenient for this usc but must be used with
caution. Be sure the wooden portion docs not contact
head surfaces.
HEAD COVER REMOVED FOR CLARITY
An ideal solvent is 1.1.1 trichlorothane contained in
Kennedy K21 maintenance kit. However', others sllch
Figure 4-7. Opening of Head Shield
4-f
406-9100-200C
4.2.2.3
4.5.3
Other Cleaning
A vacuum cleaner is recommended for removing
accumulations of dust inside the dust cover or
elsewhere in the unit. Compressed air may be used if
caution is exercised to avoid blowing dirt into
bearings.
Antistatic cleaners are available for
cleaning the plexiglass dust cover window.
4.2.3
REEL HUB WEAR
Quick release hubs are adjustable to assure a firm
clamping action.
They are designed to make it
impossible to mount a reel in a wrong or cocked
position. If the locking action should become weak,
the hub may be adjusted as described in paragraph
4.8. a-ring clamps used in the hub may tend to hang
up after long periods of use. This can be corrected as
follows:
VISUAL CHECK
a. Remove a-ring from hub.
Check visually to determine if all appears to be right
with the machine. It is helpful to run tape forwl?rd
and reverse observing smooth tape motion, pr'oper
vacuum operation, etc.
b. Clean thoroughly with mild solvent.
c. Lubricate ring with silicone grease. Wipe off
as thoroughly as possible, leaving a light
lubricating film.
4.3 ROUTINE ADJUSTMENT '
d. Snap a-ring back in place.
There are no routine adjustments.
Need for
adjustment will be manifest if malfunction occurs.
Under normal circumstances adjustment will be more
likely to cause trouble than prevent it.
4.6 PERIODIC INSPECTION
At regular intervals, approximately every two
months, it is advisable to make a more thorough
check of machine operating parameters. This will
ensure that no progressive degradation will go
I..nnoticed. The test panel facilitates making these
ehecks, allowing control of tape motion off line for
test purposes as well as providing useful indicators
and test signals. The test panel connector plugs into
a connector on the control electronics. It does not
require that interface cables be disconnected. Using
the test panel or other appropriate means, the
following should be checked periodically.
4.4 LUBRICATION
No bearing lubrication is required. All bearings are
lubricated for life and introduction of oil may destroy
their lubrica tion.
4.5 WEAR
Tape speed
Ramp times
Read level
Skew
Photosensor adjustment
Capstan and reel servo adjustment
Magnetic tape is an abrasive and in time wear will be
noted on items over which the oxide surface slides.
4.5.1
HEAD WEAR
Procedures for checking these and other items are
given in this section and a suggested sequence of
adjustments is shown in Table 4-1.
Head wear is generally signaled by an increase in
error rate. Confirmation is a sizable increase in
output voltage at the read head as measured at the
read preamplifier. When the head becomes worn it
must be replaced. Head replacement procedure is
described in paragraph 4.24.5.
4.7 TEST PANEL USE
4.7.1
Worn heads usually can be resurfaced at least once if
returned to the factory. This is more economical
than replacement with a new head. Consult Section V
for details of head return.
4.5.2
TEST PANEL USE
The test panel is standard equipment in the Model
9100. Located next to the control panel, it is used to
perform tests and adjustments on the tape transport
while it is off line. This eliminates the need for many
external test fixtures as well as saving valuable
computer time.
GUIDE WEAR
Guides wear principally at the point of contact with
the front guide surface.
Although guides are
ceramic, in time grooves will appear. Since guides
are symmetc'ical it is only necessary to loosen the
guide mounting screw, rotate the guide, and tighten
to present an unworn surface to the tape.
The function of each test panel control and indicator
is provided in Figure 4-2.
Basically, the test panel is used for making skew,
ramp time and servo adjustments. Besides providing
4-2
406-9100-300
t
TAPE SPEED
ADJUSTMENT
Paragraph 4. 16
UNKNOWN MACHINE
(parts assumed good)
+
+
HUB 0 RING
ADJUSTMENT
Paragraph 4. 8
RAMP TIME
ADJUSTMENT
Paragraph 4. 17
+
+
REWIND SPEED
ADJUSTMENT
Paragraph 4.18
TAPE PATH
MECHANICAL ALIGNMENT
Paragraphs 4.9.1, 4.9.2
+
+
POWER ON
CHECK SUPPLY VOLTAGES
Paragraph 4. 10
READ LEVEL
ADJUSTMENT
Paragraph 4. 19
t
+
REEL SERVO
ADJUSTMENT
Paragraph 4. 11
SKEW ADJUSTMENTS
Paragraph 4.20
t
t
VACUUM SWITCH/
VACUUM COLUMN
ADJUSTMENTS
Paragraphs 4. 12, 4. 13
READ SKEW
ADJUSTMENT
Paragraph 4.20.1
t
t
WRITE SKEW
ADJUSTMENT
Paragraph 4.20.2
CAPSTAN SERVO
ZERO ADJUSTMENT
Paragraph 4.14
t
t
PHOTOSENSOR
ADJUSTMENT
Paragraph 4.15
HEAD FACE SHIELD
ADJUSTMENTS
Paragraph 4. 21
I
Table 4-1.
Adjustment Sequence
4-3
406-9100-400A
@
TEST
SKEW
•
HOS
EOT
LOAD
POINT
•
WRITE
TEST
TEST
MODE
------CYCLE
FAST
FWO
REV
RUN
FWO
RUN
STOP
NOTE
Tape transport must be off line and STOP pushbutton
depressed before test panel can become functional.
TEST point and SKEW indicator. Indicator lights if tape skew exceeds the appropriate skew
(read or write) gate setting. An oscilloscope test point is available for monitoring skew gate
timing.
HDS indicator. Indicates that high density mode has been selected.
EOT indicator.
Indicates when tape has reached or passed end of tape.
LOAD POINT indicator.
Indicates when tape is at load point.
CYCLE pushbutton. An interlocked pushbutton which runs tape in alternating forward and
reverse modes. Useful for making ramp or vacuum sensor adjustments. Depressing STOP
pushbutton terminates this operation.
FAST FORWARD pushbutton. An interlocked pushbutton switch that allows tape unit to run
forward at fast speed. Depressing STOP pushbutton or EOT marker terminates this operation.
REVERSE RUN pushbutton. An interlocked pushbutton switch that allows tape unit to run in
reverse at normal speed. Depressing STOP pu~hbutton or load point marker terminates this
operation.
FORWARD RUN pushbutton. An interlocked pushbutton switch that allows tape unit to proceed
forward at normal speed. Depressing STOP pushbutton or EOT marker terminates this operation.
STOP pushbutton. An interlocked pushbutton switch that terminates all tape motion ..
WRITE TEST pushbutton and indicator. A momentary pushbutton which programs l's to be
written on all channels to facilitate write skew adjustment. WRITE TEST remains active in
FOHWARD RUN mode only. (STOP pushbutton must be depressed and TEST MODE selected
to actuate this feature.) The indicator remains illuminated while unit is in this mode.
TEST MODE pushbutton and indicator. A momentary pushbutton selects test mode and activates test panel. When indicator is illuminated, test panel is active. (Tape unit must be off
line and STOP pushbutton depressed before test panel will function.)
Figure 4-2.
Test Panel Controls and Indicators
4-4
406-9100-500 A
4.8.1
complete control over tape speed and direction, it
can initiate a write test by generating a crystal
controlled a11-1 test pattern on the tape. The test
panel also contains indicator lamps which illuminate
when there is excessive skew, high density is
selected, end of tape or load point is reached, or a
write test is being performed.
(The skew test
indicates proper l:11ignment of the read/write head.)
a. Loosen hub setscrew until the inner hub turns
freely.
b. With hub latch up, rotate inner hub clockwise
while restraining the outer hub.
This will
exert more pressure on the a-ring when the
la tch is depressed.
The test panel contains a CYCLE pushbutton. When
pressed, it runs the tape forward and reverse
continusously to facilitate ramp time and reel servo
adjllstments.
4.7.2
If the a-ring is not worn, but the reel won't
seat firmly:
c. Place reel on hub and lock latch to determine
whether' more or less tightening is required.
NOTE
OPERATION
There are several holes in the bot tom of the
outer hub to accommodate the hub setscrew.
Therefore, after adjustent is correct, the hub
must be turned slightly until the setscrew fits
into one of these holes.
Pressing the TEST MODE pushbutton activates the
test panel if the Model 9100 is off line witli the STOP
pushbutton on the control panel depressed. The test
panel is turned off by either pressing the TEST MODE
pushbutton to release it or by pressing the ON LIN E
pushbutton on the control panel.
d. After the correct set ting is found, retighten
the hub setscrew.
4.8 HUB 0 RING ADJUSTMENT (FIG. 4-3.)
4.8.2
Object: to lock tape reel firm ly to the hub.
If the tape reel is loose wi th hub locked, check the
condition of the neoprene a-ring.
This a-ring
expands when the locking latch is depressed to secure
reel to hub.
Figure 4-3.
If a-ring requires replacement:
a. I.loosen setscrew until inner hub turns freely.
b. Unscrew inner hub from hub assembly.
Hub a-Ring Adjustment
4-5
406-9100-600A
c. Replace
worn a-ring
with
new a-ring
(Kennedy PN
125-0030-006).
Prior to
installation
the
new
a-ring
should
be
lubricated with silicone grease and wiped,
leaving a light lubricating film.
4.9.2
CAPSTAN PARALLELISM
The tape should not travellateraUy (ride in or out) on
the capstan in the forward or reverse mode.
To
check, observe the tape on the capstan while the
machine is in CYCLE mode.
d. Replace inner hub and readjust a-ring pressure
according to paragraph 4.8.1.
Adjustment Procedure
4.9 TAPE PATH MECHANICAL ALIGNMENT
4.9.1
Object: to eliminate any lateral tape movement on
the capstan during operation.
REEL CLEARANCE ADJUSTMENT/
HUB REPLACEM ENT (Figures 4-3, 4-4)
Object: To maintain the proper tape path across the
top of the hub reel mounting flange and the unpainted
area on the deck plate (see Figure 4-3).
This
measurement should be made with a vernier caliper.
A special shim kit, Kennedy PN 198-0100-001) is
available for spacing the hub assembly properly.
Loosen hub setscrew and unscrew inner hub.
Add or remove shims as required to obtain
0.328 inch distance from reel flange to the
unpainted portion of the deck plate.
Back off both capstan adjustment setscrews
until they no longer touch the capstan motor
mounting plate.
Place machine in CYCLE test mode. Observe
tape position on the capstan. If tape moves
OUTW A RD, tighten both adjustment screws
equally until OUTW ARD lateral movement
ceases. If tape moves INW ARD, loosen both
adjustment screws equally until inward lateral
movement ceases.
e. Retighten capstan setscrews and recheck. If
lateral tape movement has been eliminated,
adjustment is complete.
Otherwise, repeat
adjustment procedure.
d. Reassemble hub assembly. Tighten nut to
20 +/-5 in./lb torque.
SHIMS
b.
d.
b. Insert special spanner wrench (Kennedy PN
154-0042-001) into setscrew holes to stabiliz"e
hub. Then remove the hub mounting nut with a
socket wr·ench. Slide remaining portion of the
hub assembly off the motor shaft.
c.
With tape stopped, loosen capstan screws (see
Figure 4-5).
c. Retighten both capstan adjustment setscrews
until· they press lightly against the capstan
motor mounting plate.
Procedure:
a.
a.
REEL MOTOR
I/'l---[)ECK PLATE
110-0105
*
. 28
(MEASURED ON UNPAINTED AREAl
CAPSTAN ADJUSTMENT SCREW
'------_._------------------.....
Figure 4-4.
Figure 4-5.
Reel Hub Assembly
4-6
110-0106
Capstan Parallelism
Adjustment
406-9100-700C
4.11.2 GAIN ADJUSTMENTS
(R24, Supply; R83, Takeup)
4.10 CHECKING SUPPLY VOLTAGES
Here is a lUst of supply voltages and their test points
in the Model 9100.
+24v - case of Q27. Q28. Q31, Q32, Q35 (MJ802),
heatsink (+26v under light load)
Procedure:
-24v - case of Q29, Q30, Q33, Q34, Q36 (MJ4502),
heatsink (..:26v under light load)
a. Connect a zero-centered voltmeter to test
point A on the Servo Preamplifier board. Use
chassis ground.
+10v (+0.5,-·0.2v) Sensor Amplifier/Driver,
test point A
b. Turn power on; advance tape to load point.
-lOv (+/-0.8) Sensor Amplifier/Driver,
test point B
c. Rotate supply reel to permit tape to rise to
top of the supply vacuum column. Voltage at
test point A should be approximately +2 vdc.
+5v (+/-0.25) Sensor Amplifier/Driver,
test point C
d. Rotate supply reel to pull tape almost out of
the supply vacuum column. Voltage at test
point A should be nominally -2 vdc.
NOTE
(1) Use
chassis ground
measurements.
when
making
Object: to eliminate any overshoot of the tape loop
in the vacuum column when tape changes direction.
voltage
(2) Make certain power is switched OFF when
removing or replacing circuit boards;
If the voltages are not correct, the trouble is either
in the power supply or due to an overload on the
power supply. Removing each circuit board while
monitoring supply voltage can help isolate the cause
of any overload.; Also, be sure to check the power
supply for burned, open, or shorted components. The
power supply is protected against short circuits in its
regulated voltage circuitry.
4.11 REEL SERVO ADJUSTMENT
4.11.1 CENTERING ADJUSTMENT
(RIO, Supply Servo; R69, Takeup Servo)
Object: to center tape in both vacuum columns when
tape is stopped.
e. Press TEST MODE and CYCLE pushbuttons on
test panel. Tape will continuously alternate
between forward and reverse.
Check for
overshoot when the tape loop changes position
as the tape changes direction. If overshoot
occurs, adjust R24 until it is eliminated.
f.
Repeat steps b, c, and d to check and adjust
R83, the takeup reel servo gain control.
4.12 VACUUM SWITCH
The vacuum switch is located in the rear of the deck
assembly in the upper right hand corner on the
column plenum cover. This switch is a safety device
to prevent possible tape breakage. It will operate to
shut off the tape transport whenever the' vaeuum
pressure within either vacuum column drops below a
predetermined level. The objective of adjustment is
to determine and set the pressure level at which the
vacuum switch will actuate.
Equipment required:
Kennedy Vacuum Test Box,
Kennedy Part No. 154-0041-001 or equivalent.
NOTE
a. Connect vacuum gauge and ohmmeter to the
vacuum switch as shown in Figure 4-6. To do
this, one end of the vacuum switch hose must
be detached and connected to the vacuum test
box "T" fitting. Then the hose on the opposite
end of the "T" fitting is attached to the
vacated hose fitting on the vacuum switch.
Also, detach the green/white (+) wire from its
terminal on the vacuum switch. Connect it to
chassis ground prior to attaching the
ohmmeter to the positive terminal on the
vacuum switch.
Tape loops must be in both vacuum columns during
adjustment.
Procedure:
a. Load tape and advance it to load point.
b. Adjust RIO on the servo preamp until tape loop
is center in the supply vacuum column. (Note:
While adjusting, make certain tape loops
remain within both vacuum columns.)
b. With machine on and a tape at load point,
cover the bleed hole (see Figure 4-6). This
gives maximum vacuum pressure, which should
measure between 17 and 21 inches of water at
sea level, or 15 to 19 inches of water at 4000
feet altitude.
c. Repeat steps a and b to adjust R69, the takeup
servo zero adjustment; When completed, both
reels should be stationary, with the tape
centered in both vacuum columns.
4-7
406-9100-800B
----'------------FROMT SIDE
VACUUM TEST BOX
~
<0
"'-SW
'1
"
:' SWITCH
:i
TERMINAL
MONITOR SCREW
I'
I'
II
__ u_~------------
~Bl.EED ADJUSTMENT·""--_·· . . .
SETSCREW
19
-~
..--
.... L-
"
~
VACUUM SWITCH &
MANIFOLD (BEHIND)
VACUUM TEST BOX
o
110-0109
110-0108
Figure 4-7. Vacuum Column Adjustment
Figure 4-6. Vacuum Switch Adjustment
c.
Uncover bleed hole. Adjust bleed adjustment
screw until switch closes.
(Ohmmeter will
indicate 0 ohm). Pressure should be between
10 inches and 14 inches of water.
adjustment.
(At sea level? pressure should
measure between 10 inches and 14 inches of
water. At 4000 feet, pressure should measure
between 9 inches and 12.5 inches of water.)
d. Tighten bleed adjustment screw to obtain
pressure reading which is 4 inches higher than
pressure obtained in step c.
Adjustment is
complete.
c. If a correct vacuum reading is not obtained,
adjust
the
appropriate
vacuum
column
adjustment screw shown in Figure 4-7 as
required.
d. Detach the vacuum test box and replace the
monitor screw. Repeat adjustment procedure
on the takeup vacuum column.
4.13 VACUUM COLUMN ADJUSTMENT
Equipment required:
Kennedy Vacuum Test Box,
Kennedy Part No. 154-0041-001 or equivalent.
4.14 CAPSTAN ZERO ADJUSTMENT
Objective:
to develop one-half to two-thirds of
vacuum present at the vacuum sensor.
This
adjustment should follow, not precede, the vacuum
switch adjustment. - - -
The capstan should not move when the tape is
stopped. A zero adjustment is provided on the servo
preamplifier to remove the effects of component
tolerances.
Using an Allen wrench, unscrew the 6/32 Allen
screw from the left hand side of the supply
vacuum column. Install the threaded vacuum
hose fitting and vacuum guage in the monitor
screw hole (see Figure 4-7).
Procedure:
a.
b. With the machine turned on and a tape at load
point, measure the vacuum. (Tape loops must
be present in both vacuum columns to obtain
accurate readings). Vacuum should be one-half
to two-thirds of the final measurement
obtained in step b of the vacuum switch
4-8
If capstan rotates slowly when tape is stopped,
grasp capstan with tape loaded and turn first
clockwise, then counterclockwise.
Capstan
will show a reluctance to turn.
If turned
gently a small dead zone can be detected.
This dead zone should be approximately the
same for either direction of motion.
If
adjustment is required, connect a voltmeter or
scope probe to test point D of the servo
module.
406-9100-900D
b. Advance tape to load point.
c. Rotate zero adjust pot R139 to bring measured
voltage to zero.
4.15 EOT180T SENSOR ADJUSTMENT
Infrared emitting diodes and sensor transistors are
used to detect the EOT and BOT markers. These
semiconductor elements display long term stability
and high resistance to ambient Ught conditions. The
sensor amplifier bias has to be initially adjusted to
balance the input to the amplifier stages. Once this
adjustment. is performed in the factory there is
usually no need for readjustment unless the amplifier
module or the sensing elements are replaced. When
readjustment is required, follow the procedure
outlined below.
by adjusting R14. Note that the waveform will
not be entirely stationary on the scope owing
to small rapid speed variations. These should
be visually averaged.
d. If speed adjustment was made check read
preamp gain settings (paragraph 4.19).
4.17 START ISTOP RAMP TIME ADJUSTMENT
To assure accurate tape gap generation, tape must
linearly accelerate to normal running speed and
linearly decelerate to stop. The start and stop ramp
voltages required for this linear movement are
controlled by ramp generator potentiometers R3 and
R4, respectively. Ramp timing is the same for both
. forward and reverse modes.
a. Place blank tape over the sensors.
To adjust start and stop ramp timing:
b. Connect a dc voltmeter between test points E
and F on the Sensor Amplifier/Driver module.
Procedure
NOTE
These test points are both off ground. If an
oscilloscope is used to measure the voltage
instead of a voltmeter, it must be isolated
from ground, or the two inputs should be added
with one channel inverted.
c. Adjust potentiometer R16 for Ov between test
points E and F.
4.16 TAPE SPEED ADJUSTMENT
Normal tape speed is controlled by R14 on the ramp
generator. This control is set at the factory and
normally will not require adjustment. There are two
methods for checking speed.
a. Connect channel 1 of oscilloscope to output of
the Ramp Generator board at test point A.
b. Connect oscilloscope's external trigger input
to pin C (SFC/) of the Interface PC board,
using an extender board.
c. From computer or tape transport exerciser
issue a series of Synchronous Forward
Commands (SFC/) to the transport. Each SFC/
transition should last approximately two ramp
times. (Compute ramp time Tr formula below,
then multiply results by two.) Tr is measured
in milliseconds and its tolerance equals +0%,
·-5%, where:
Tr (-5% +0%) =
Strobe disk method
375
tape speed
a. Mount strobe disk on the capstan (Kennedy PN
291-5572-001, -69 Hz type; 291-5572-002, -50
Hz type). Position a fluorescent light a few
feet from the capstan.
b. With tape running at normal speed, adjust R14
on ramp generator for a steady strobe disk
pattern if necessary. If R14 must be adjusted,
settings
check read preamplifier gain
(paragraph 4.19).
t
Td-UVo
- l.-t
gate. T.l.' s complete part number
is SN7400r\. In multifunetional units in closp
proximity to l'nch other the type designation may
be omittcd. Th(' tYJ>(, deSignation may app('ar
Olltsilk the symbol if the symbol is too small.
Normally, IC power connections arc on pins 14
(+5v) and 7 (ground) for 14 pin packages, and If)
(+5v) and 8 (ground) for 16 pin packages. Somc
ICs - 7476, 7492, 7493 for example - have power
c01U1ections on pin 5 (+5v) and pin 10 (ground).
Operational amplifiers in the tl pin package have
power connections on pin 4 (- Vcc) and pin 7
(+Vcc). Power connections arc not shown unless
they are nonstandard.
4.
Where multiple inputs are tied together only one
pin may be designated on the schematic.
5.
Unused inputs that are tied high are not normally
indicated unless the connection has logic significance.
6.
From and to deSignations are intended to describe
inputs and outputs only. The same signal may
be connected to several other points not shown
on a particular drawing.
7.
9. Integrated eireuit symbols ('ontain a
1\lilitary Standard HOGe is the base for logic
symbols. Additional conventiohs arc shown Jjclow.
PR
Abbreviations used in from and to deSignations
are as follows:
CI
PBC
HG
SA
DT
HA/CL
HA
WAI
WA2
Triangle ineJicates respons('
to edg'e (in this
case positive)
Control Interface
Pushbutton Control
Hamp Generator
Sensor Amplifier/ Driver
Delay Timing
Read Amplifier/Clipping Level
Quad Head Amplifier
Four Channel Write Amplifi'er
Five Channel Write Amplifier
10. Semiconductor types on schematics may be replaced by their functional equivalents. If not
indicated, diodes are 1N91-l, NPN transistors
are 2 N271-l, and PN P transistors are 1\1 PS()S17.
11. l'nless otherwise specified, light emitting diodes
are FLVI02 or equivalent.
6-3
606-0001-400
12. Module connector pins are shown as
circuit function. In this case all the connections
to the element may not be shown in the interest
of clarity.
--~)E
15.
where no further connection is shown on the
schematic, and as
22
-0---
designates a test point provided on the
module. Letters proceed from top to
bottom of card with the ground test
point, if present, as the bottommost
terminal.
16. Socket terminals are designated with numbers
for component side connections and letters for
circuit side connections when a double sided
socket .is used. These are the designations on
the socket. When a single sided socket is provided, all connections are designated by letters
regardless of which side of the board they lie on
the etch. Letters follow the 22 pin alphabet,
ABCDEFHJKLl\INPRSTl·VWXYZ; numbers are
1 through 22.
when there is a connection shown.
13. Where an input is represented by an arrow instead of 11 complete line, the input source is
designated. Where outputs are so shown their
destinations may not be shown.
14. Some schematics of modules include certain external elements which aid in understanding the
G-4
606-9100-004 B
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P4-2 ,'TBl-:.,8
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TAKEUP MTR
TAKE. UP FEEDBACK
L_
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13
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PC CONTROL PANEL
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5655 TEST PANEL SWITCH
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SUPPLY REEl MOTOR
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--------------l
H
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5728 READ PREAMPLIFIER
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SENSOR
11
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PS-13 FPT'SOL.DR_
12
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J3
J5
J4
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TO DECK
TO WRITE HEAD
- 10
NO CONNECTION
+10
WRITE HEAD CT
GRD
}WRITE CHAN 7
+5
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}WRITE CHAN 6
+18
WEN LAM P
)WRITE CHAN 2
ERASE HD DR
READ LAMP
}WRITE CHAN 1
RAMP
RWD
)WRITE CHAN 0
WRl INDICATOR
FPT SOL
)WRITE CHAN P
LP
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)WRITE CHAN 5
FPT
LOAD
SLT LAMP
)WRlTE CHAN 4
BKN TAPE
}WR 1TE CHAN 3
LP
EOT
NO CONNECTION
ON L(N. C. )
NO CONNECTION
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410-4019
:1\:IClITF<;
AS IIEWED
'~t:K;
F~O~
SIDE :F CIRCul' BOARD
RE~R OF TRANSPORT
:NDIClITES FAR SIDE OF CIRCUIT BOARD
AS VIEWED FROM REAR OF TRANSPORT
Masterboard Assembly,
Type 5664,
806-9100-100A
MODEL 9100 POWER SUPPLY
CIRCUIT DESCRIPTION
Besides providing the regulated and unregulated
voltages required to operate the tape transport electronics, the power supply contains several switches
and relays required for controlling the sequence of
operation. Separate low voltage and high voltage
power transformers are used. All regulated voltages are derived from the low power transformer.
Output from the high voltage transformer is supplied
to the reel servos and capstan servos.
SEQUENCE OF OPERATION
When the power switch pushbutton on the front panel
is pressed, plus and minus 18 vdc from transformer
TI's full wave bridge actuates relay K4, switching
ac to solid state switches SSI and SS2. However, no
ac can reach the vacuum blower motor until relays
K5 and K6 are actuated to make the switch Triacs
conductive. This happens when the LOAD pushbutton
is pressed. SSI will now provide power to the vacuum blower motor, while SS2 supplies ac to the High
voltage transformer, T2.
HIGH SPEED RELA Y K8
During fast forward or rewind modes, plus and minus'
32 vdc is required to run the reel motors for 200 ips
high speed operation. To develop this voltage, high
speed relay K8 is closed by amplified output from
the capstan tachometer whenever motor speed exceeds 130 ips" (See high speed relay output signal
on the Servo System schematic.)
Plus 8 vdc and minus 8 vdc is now applied to the secondary center taps of the high voltage transformer.
This transformer's output voltage now increases
from plus and minus 24 vdc to plus and minus 32 vdc
for high speed operation.
SERVO ENABLE RELAY K1
Connected in parallel with power switch SW1, this
relay remains closed for some time after power is
shut off. This permits the sequence control to finish
the command sequence required for shutting down
the tape transport.
TYPE 4352 POWER SUPPLY REGULATOR
This circuit develops +10 vdc, -10 vdc, and +5 vdc
regulated voltage from the +18 vdc, -18 vdc, and +8
vdc unregulated voltages developed by transformer
TI's two full wave bridges.
+10 VOLT REGULATOR
Pass transistorQ3 is fed from +I8v and its base is
driven by a monolithic regulator IC2. Voltage output
is determined by R8 and R9. Q7 and Q8 control power
supply tracking when powering down. As +18v drops
owing to discharge of CI, Q8 cuts off at approximately
13 volts on the +18v line. When this happens Q7 is
turned on shorting out R9 and dropping the regulator
reference voltage to zero. The +IOv output is cut off
and drops to zero. Since +IOv is the reference for
-lOv, -lOv also drops to zero. This action occurs
be"ore the +5v supply has dropped sufficiently to
cause indeterQlinate logic states; turn-off transient
D)otions are preverlted.
-10 VOLT REGULATOR
The -IOv supply is regulated by pass transistor Q4
driven by Q6. Its reference is +10v as determined
by R13, R14. In this way the two regulated voltages
are made to track each other.
+5 VOLT REGULATOR
An integrated circuit regulator ICI controls +5v out-
put in conjunction with pass transistor Ql and driver
Q2. Output voltage is set by R4, R5. The internal
circuitry of ICI, IC2 consists of a differential amplifier with built-in zener reference, together with
facilities for short circuit protection. Q2 assures
that sufficient base drive i"s available for Q1.
SHORT CIRCUIT PROTECTION
Drop-through series resistors, for example RIO in
the -IOv supply, provide short circuit protection. If
the drop across RIO exceeds approximately O. 6v,
Q5 is turned on, connecting Q4 bas e to emitter and
cutting off Q4. This corresponds to approximately
1.5 amperes under short circuit conditions. Similar
circuits are provided in ICI and IC2.
I
:1L_
r----+---+---.-......
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15A
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RECTIFIER BOARD,
_ _ _ _ _ _ _ _ _ _ _ _ _TYPE
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POWER SUPPLY REGULATOR
TYPE 4352
"R19 SELECTED IN TEST
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... R20 SELECTED iN TEST M'N=39K
_________________ ~I
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TB3 TO
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SEE NOTES TO SCHEMATIC SECTION.
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=TB3-3 TO T2 BLK/RED
=TB3-4 TO T2 WHITE
-T&3-o Iu ,-2
J
K8
HIGH SPEED
RELAY
__________________________________________
AS SHOwN
BLK/ORA~GE
T83 TO T2: =TB3-5 TO T2 BLK AND VIOLET
-T83-3 TO T2 BLK/RED; BLK/WHT
Power Supply,
Model 9100,
Schematic Diagram
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__________________
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1_ 4700
220V
P3 TO T!
=P3-1 TO Tl VIOLET
MODIFIED 4 PINS CONNECTOR: =P3-2 TO Tl BLK/BLUE
AS LABEL
=P3-3 TO Tl ORANGE
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TYPE~897
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LOW POWER
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0.39,2 W
t-=-2 _ _
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MOC3010 I 150
SOLID STATE SWITCH
TYP E 5707
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HIGH SPEED RELAY
(SERVO PREAMP,PB4-13)
866
11
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SERVO ENABLE
FROM SEQUENCE
CONTROL - 19
START
7
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SEQUENCE
CONTROL
- 8
401-9100-001 N
~I fIll-_________
-:'RU;.;;N-t( MOTOR
----..;;~~r-or ~'V'- ~
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J 2 ,... P? , ,
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1
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K7
i
rsOUOSTATE SWITCH, TYPE 5707
806-3842-100 C
TYPE 3842 IN-':ER.ACE CONTROL
CIRCUIT DESCRIPTION
This module contains a set of receivers for the interface control commands:
SYNCHRONOUS FORWARD SFC
SYNCHRONOUS REVERSE SRC
OVERWRITE OVW
REWINDRWC
SELECT SLT
SET WRITE STATUS SWS
OFF LINE OFFC
It also contains drivers that return the recorder
status outputs to the interface:
ON LINE ONL
REWINDING RWDG
FILE PROTECT FPT
LOAD POINT LP
WRITE ENABLE WEN
READY RDY
END OF TAPE EOT
TAPE RUNNING TNG
Certain controls and delays are also provided to ensure proper tape motion and transport operation.
TAPE MOTION CONTROLS
The motion control commands from the interface,
SFC and SRC, are translated on this card into the
internal motion commands of the transport - RUN
NORMAL RNN, FORWARD FWD, and REVERSE
RVS. These internal motion commands are supplied
to the Pushbutton Control module, where they are
combined with commands supplied from the transport pushbuttons and internal interlocks to generate
the commands that initiate actual tape motion on the'
Ramp Generator module.
On this module SFC and SRC are supplied to an interlocking network that ensures that the tape comes to
a stop before its direction of motion is reversed.
The interlocking network includes flip-flop ICl-3,
edge circuits IC2-6 and IC2-8, NAND gate IC3-6 J and
interlocking flip-flop IC3-I0. Whenever flip-flop
ICl changes states due to a change in the direction
of motion, for example from a reverse command
SRC to a forward command SFC, its output generates
a pulse through the edge circuits consisting of inverters IC2 and the associated capacitors. The pulse is
gated through IC3-6 to the set input of interlocking
flip-flop IC3-l0. The flip-flop can be set only if
TAPE RUNNING TNG is true, indicatingthat the tape
is still moving. In .this case TNG low at input pin W
is inverted by IClS-l2 and supplies a high input to
the clear of IC3. The flip-flopcah then be set by
the pulse on its set input, its 0 output going low. The
o output of IC3 then inhibits the RUN NORMAL gate
ICl5: at pin 2, setting RUN NORMAL RNN false.
After the tape has ramped down to a stop, TAPE
Rl,J;;NNING TNG goes false, clearing interlocking
flip-flop IC3, whose output then enables the RUN
NOrtMAL gate. R UN NORMAL RNN then goes true
if the following conditions are satisfied: SELECT
SLTl is true, indicating that the transport is on line
and selected by the interface; BUSY BSY is false,
indicating the. transport is not rewinding or searching
for load point; and SRC command is not given at load
point. (This would activate NAND gate ICl5-S and
Nould disable the RUN NORMAL gate at IC15-1.) If
the above conditions are satisfied, RUN NORMAL
RNN goes ttue at output pin V, and is supplied to
the Pushbutton Control module where it initiates
tape motion at the normal rurtning speed. The direction of motion is determined by the state of flip-flop
leI. If a forward command SFC has been given, the
nip-flop is set and its l-outpu.t enables NAND gate
ICl4-S, provided that SLTl is true and BSY is false.
This generates FORWARD FWD true at output pin U•
. If a reverl3e command SRC has been given, flip-flop
ICl is cleared and enables NAND gate ICl4-6, generating REVERSE RVS true,providing SLTI is true,
,BSY is false, and LOAD POINT LP is false. No
interface reverse command is acknowledged by the
, , transport when the load point is detected.
WHITE SELECT
During a write operation the interface supplies SET
WRITE STATUS SWS true at pin K; SWS is inverted
by IC9-4 and is supplied to the D input of flip-flop
IC7. The flip-flop is toggled provided that the transport is selected and on line, after NOR gate ICl-ll
is activated by a synchronous motion command. This
would activate NAND gate ICl-S and trigger one-shot
IC4-l, generating a 2 J.Lsec pulse. On the trailing
edge of. the pulse the ~ output of the one- shot toggles
rC7-3,:the Q output of the flip-flop going high and
activating NAND gate rClO-ll, generating WRITE
SELECT WSEL true at output pin H. During an overwrite operation OVERWRITE OVW true is inverted
by ICl8-S and sets the D input of flip-flop IC7-l2
806-3842-200C
high. On the trailing edge of the pulse generated by
one-shot IC4-4 the flip-flop is set and enables NAND
gate IC8-12. One-shot IC4-4 also direct-sets flipflop ICll, whose Q output enables the overwrite gate
at IC8-9 o If write status is true, the gate is enabled
at IC8-l3 and it is kept activated as long as a synchronous motion command is activating NAND gate
ICl-8. IC8-8 then goes low and supplies W"S'Ei:" for
the duration of the motion command only. When a
WRITE AMPLIFIER RESET pulse is given at pin P,
it toggles flip-flop ICll to the cleared state and disables the overwrite gate.
REWIND FLIP-FLOP
When a REWIND COMMAND RWC is given by the
interface, it sets the rewind flip-flop IC5-3, provided
that the transport is selected, on line, and not at
load point~ The l-output of the flip-flop then goes
high, generating REWINDING RWDG true to the interface, and a rewind command RWCl through an
edge circuit consisting of inverter le6-6, NAND
gate IC6-8, and capacitor C5. Rwci is suppli:ed to
the Pushbutton Control module. The flip-flop is
cleared when the tape returns to and stops at load
point, or when BROKEN TAPE BKN is detected.
END OF TAPE
An end of tape indication is set when the EDT mark.er
is encountered in forward direction and remains set
until the marker is passed in the reverse direction.
A true EDT signal at pin Z if machine status is
(IC10-5,8) and RVS (IC14-6) causes ICll to
be preset by IC19-8. An EOT status is then signaled
at the interface by IC16-3.
RWOO
Upon passing the EDT marker in the reverse direction IC13-3 is high and the EDT Signal clocks ICll
clear on the trailing edge of the EDT Signal dropping
the EDT signal at the interface. ICll is preset to
the clear state by BKN Signal at pin X.
OUTPUT STATUS
Most status gates on this module are preconditioned
by SELECT and ON LINE being true; consequently,
the transport returns status indications only when it
is selected and on line. The READY status is generated when BUSY BSY supplied from the Pushbutton
Control modtile is false and the transport is not rewinding. The' LOAD POINT output is also preconditioned by the rewinding status being false. The
only status gate not preconditioned is the rewind
via the REWIND pushbutton. If the pushbutton is
used to rewind, that status is made available to the
interface without being selected and on line.
CONTROL TERMINATOR CARD, 3841
I
II
I
1
I
('
CONTROL INTERFACE
CONNECTORH
OVW
B
WAR~;
I
I;
I
~
~
t
BACKWARD
.
8\6
8
IT
I
iNG
(FROM RAMP
GENERATOR-Z)
RNN
(TO PUSHBUTTON
CONTROL-18)
FwD
(NOT USED)
T
RVS
(TO PUSHBUTTON
CONTROL-16)
N
BSY
,"-
S
H9~__~~---------~----------~--~----------~~_+--------------------------------f--t--~--~--------------t_-----7/
.ROY (FROM PUSH8UT-:-ON
CONTROL-J)
F
SL Tl (TO
J
"" (n '->2'
100
~3
I
17 ,
.--___________________________~16~2
......
~
C2
3 6
100
4
9
(~6~ i T
31
~
00
·
H
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i
i
I
I
IT
I
I
22
/
~
10
13
: J~lT
-
12
I
I I
_Ql1 9
::J1 J1 jJ
10
TN G
04
RS
13
(PIN W)
19
-
330
11
00
12
~
10
~~
'\C
9
-
I
~,,/____I-{"!>--__
k03____--Ul
I
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5.8
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I
C5
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,
I
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11
Cl
12
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5
F1.;;;3"D-_
6
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ill
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9
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I
I
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3
p?<---=-1-0-_..,..1--0__---+-°'"
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.....
10
11
858
-
~
~ 8~0
PR Q\.i9:....f--+_---------------rrJ--'*l
,
~~
/4
~
LP
(PIN Y)
18
17
I I 20
3
U~
<-....:.I--I~--....,o----I--a
4
844
•
16
858
1
00
-
'-.
-
Qi
CONTROL TERMINATOR CARD HAS
TERMINATORS (T)
OHM
AND PULL-UPS (p) 4.7K AS SHOWN
..
TNG
(PIN \>I)
DO IH
NO
C~'T
005
CUT
R:;Cl
(TO PUSHBUTTON
CONT ROL- M)
M
OFFCl (TO PUSHBUTTON
CONTROL-12)
R
ONl
(FROM PUSHBUTTON
CONTROL-14 )
-1--~7
X
BKN
(FROM SENSOR
AMP fORI VE R-18)
6
10
13
8
9
19
8
10
~
4
~19
3
5
6
19
13
""3'--_ _~-___'_tl
_~4"
L..-
QQ
QQ
~J
PR
Qtll-
-= 6
VLj
00 +V
-
7
b
11
CK
1
76 -10
K Qf--
~
J
, z
J
____________________________________________________-----~--~~ E
EDT!
(FROM SENSOR
AMPIORI VER-X)
FPT
(FROM SENSOR
AMPfORIVER-9'
EOT2
(TO PUSHBUTTON
CONTROL-22 )
Interface Control,
004
006A
l
ONL~
L---------------------------------------------------------------------------------------------------~--~_7;
I
I
220-330
15
q-
II 2
1
1~ll-----~!.----------------------------------------------------------------------------------------
21
~16~6--...,j
~ V ~(-------CK
I
13
PR
-:fjJ
li~
(FROM SENSOR
AMP/DR!VER-19)
\oISEL (TO PUSHBUTTON
CONTROL-7)
""3-------------+-----...
~13
QQ
QQ n---------.
4
2
L.:6~+_-+_-----_e
LP
8
...u~ ~
.-
REWIND (FROM PUSHBUTTON
LAMP
CONTROL-L)
H
846
--Ir-~-I___+---_a2. 10 ~8:...----_i~....:1:..::0~-,;-
C'~~~ 8 )----t--=-1~2 0
12
1
(AlOJ4-W CONTROL MB;
SE'fSO~ "MPL DRIVER-I)
I
~
(I
(FROM PUSHBUTTON
CONTROL -13)
CLR
l-._ _ _ _ _-4___
5
12
I
L
6
,
I
P 4.7K 4
~
/---~-_<,...,~~--+--a
·
EOT
R3
9
~I'-CK
Q
I
(PIN R}
I ....
h ____-+____k01,13
l7L
1"54______
1
:
ROY T
1
LP~
+-_____l~31 ~ ~-------------------+----~---~"
QQ
I
i
L -____________
ONL
~;~ TABLE
12 112
I ! II
I
I
.-""
I
I
~
.......1.. ~5
0
Q~5+~-_--_-------....--=1'"'i31
14
121
"15
4
10
;
....----+--_+_-+-+---___- - -..--___=_!9 84 6
SEE TABLE
858
I
I
,
.§12..
SEE TABLJ ST6
I
P I
_
_
~~~"--------------~---+--+_~----------~--~ii------------~-4.-7~K~----~-----------------------------------------t---.--7;
~ )
!
Qi
14
~
I
I
I
9 >-2--+-------+-1---=-1
dl
.....
1
I p i
1
II
I I
-=
(PI~Py)~
~OtllT
~<------(!J-:-----<~>-2-------o3 9 ~4-J.---------------------+-------------_+----+--1):.-+-------------t_--+------------!_:_+;:-5'I
I I
Qi
I
· I'" I
1
T
STRAP
R2
L
I
12
12Q
~:0~IC~6)~ ~ ~~~6~Jll--~-+-~!!------+-+11!-----------------~-~56~~
I
i
TOP
6
n--------~._---_1-""
,BSY ----,
7; K
~--------------------+--~-----------+---!~----------------------------------------t__+--------------------;-------t----.-I
~
I I
LP __--..---+----_~06< 18 1->5~----------.....-------+--------7't Y
1
{.<-----1-<=)-1----<,..,)---+-5--~ 9 ~
J""
FPT
~81__----------------------.----7_1 U
~
I
)..
I STI
16
858
~/-----<,...,:>_:I~---<~)-1--...._
K
8
WRITE
STATUS -.l 10
~
I I
RWDG
V
LO ~ ~L..13-+------+------------+--_+--1....Z
I'-
~1~1-------~~-4---------4_--_+------~----------t_---------~
12
TNG-
830/
SL T
OFFC
3
.---......- - -.....---2..l-5:o"1 15 r-0I__-----------------?_1
r-----+---------__+-__I-LJJ~~
3
0.
QQ
I-=F~04
CR2
1 N2 70
1~.------~~------------------~~-+---------------i--~--+------------------------------t---------------t----~~----------t_--t-~~ 14
SI
5 846
*
18~1~3----------~~------------~--?}
~ ~r-:l.:.2-+-----------0-+~R.I~-----_L---~O-4
__-,
I
lZr-~_.----+-----_+_"O"S
[l!hll
830.§.
2 [[-
5
l~r
I
I
l~O~L----+-----------------~~~----------~--~~--------+_------------~----------~--------~----~--t_~2
!
T
..
5J 14
I
I
I
~
I~'
~!"'"--+~---4;-tll
E~
(-.....;'I-_o--.;-I--<)--~>---------...J
r-------L..--l-.-----------------'
C'-
02L,L
GRD
.--_ _
-=-
RIrlC
~5~8330
5
+5 V
5
C
12
Qi
I l
SRc
13
STATUS..! 11
.~,,/--.,..I_--~
SLT
NSEL
+5
11
J
~__-
('
WARS
1.
p
14
B
RlS
lK
__
----_--~1~2~,1~3(] 12~1~1--~__- - - - -__~-----------_+--~~
'I
I
21
... _'
l!
9
RNN
1
C4
FROM PBC-14 ONt
R(
FROM PBC-I3 BSY
N
RIB
4.7K
+V
SEE TABLE
V ifriN
TO PBC-I8
U
RiiF
TO PBC-17
T
m TO
+5
FAST
FROM PBC-J WROY
S +-----~t
(
WRDY
FROM PBC-L RWOGI
K ~----~
(
RNOGI
FROM SA-19 LP
Y
PBC-I6
SRC
FROM SA- X EOT
Z
FROM SA-IS BKN
X
LP
L rut
ST5
12
13
~ ~--~-----o-.-0
) 7
F
om
FROM RG-C TNG
FROM SA-9
m
W(~----"""'l ill
EOTl
DASH
J (
+5
+5V
4,D
~
1
10
GRD
3, C t-(--1~----'!
TO PBC-N
IIOTE, FOR CIRCUIT CONYENTIONS lISED.
SEE NOTES TO SCHEHATl~ SECTIOn,
STl
ST2
ST3
ST4
-OOlH
OMIT
OMIT
OMIT
STRAP
~002B
OMIT
OMlT
OMIT
STRAP
OMIT
-003~
OMIT
STRAP
OMIT
_004'"
1lfIITT
~TP.P
MITT
-013H
OMIT
-014F
OMIT STRAP
OMIT STRAP
-023C
OMIT
-024B
OMIT
REMARKS
STD
NO BACK ST AT
STS
ST5
ST7
C4
R3
R4
ST8
OMIT
OMIT
OMIT
OMIT
220
330
OMIT
OMIT
OMIT
OMIT
OMIT
OMIT
220
330
OMIT
OMIT
OMIT
330
OMIT
330
!JlII;
330
OMIT
OMIT
l)fI!r T
UNLOAD FOR 90/9700
'J1Ift ~11" ~ 01 fO!1J1J
n~A"
IJ~!""
O~!'T
mi!!;
220
220
OM'IT
UNL,RN, OFFL-9l00
STRAP
STRAP
.001
220
UNL, RW, OFFL-9000
OMIT
STRAP
STRAP
STRAP JOMIT
OMIT
OMIT
STRAP
STRAP
OFFL-UNL, RN-9l00
STRAP
STRAP
STRAP
OMIT
220
330
OMIT OMIT STRAP
STRAP
STRAP
OMIT
OFFL-UNL, RW-9000
OMIT
STRAP
STRAP OMIT
OMIT OMIT STRAP
QtllT
.001
EBOIS
UNLOAD
SLTl TO OT-V
• iiFFci
) E Eon
TO PBC-IZ
TO PBC-22
) H
IiSE'lTO PBC-7
) 18
EBoiS
TO SA-16
Interface Control Type 4842 ,
C§eneral with Edii)
Schematic Diagram
806-5665-l00A
MODEL 9100 TAPI MOTION CONTROLS
CIRCUIT DESCRIPTION
This schematic shows the Type 5665 Main Control ,
Panel and the Type 3843 Pushbutton Control card, as
well as blocks of the Sequence Control, Interface
Control and T,est Panel Switch to illustrate the Interconnections between these modules'and the other tape
motion control circuitry.
'
.
The Pushbutton Control card and the Sequence Control contain the circuitry required to perform the
motion commands issued from the Interface Connector or by the Main Control Panel pushbuttons. The',
Pushbutton Control card generates RUN NORMAL
RNNl, RUN FAST, RNFl, and REVERSE (RVSI)
which are supplied to the Ramp Generator. Here
the tape motion signal from the Pushbutton Control
card is converted to an analog voltage for controlling
the capstan servo on the Type 5666 Servo Preamplifier module.
The ON LINE pushbutton on the Main Control Panel
is connected to the O:N LINE flip-flop on the Pushbutton Control card. The LOAD and REWIND pushbuttons are processed by the Sequence Control prior
to being applied to their respective flip-flops on the
Pushbutton Control board as negative true sighals~
LOADING
When LOAD true is output from the Sequence Control,
it grounds the input to inverter ICI2-l, setting the
LOAD flip-flop consisting of NOR gate IC13-6 and ,
inverter IC12-1. Once the LOAD flip-flop is set
IC13-6 goes low. This signal is inverted at Ic12 .... 4
to remove the direct-clear from ON LINE flip-flop
ICIO-3. Thus the ON LINE flip-flop can be set only
after the transport has been loaded. When the ON
LINE pushbutton is activated the first time, it toggles
ICIO-I to the set, or ON LINE, pOSition. The ON
LINE flip-flop can be cleared by pressing the front
panel pushbutton a second time, or by an interface
OFF LINE COMMAND (OFFCI) supplied from the
interface control module.
The REWIND pushbutton can be activated only when
the transport is off line. When activated, the REWIND pushbutton sets the flip-flop consisting of gates
IC8-8 andIC8-6. provided that the transport is loaded
at the time and test mode is not selected. Consequently the transport cannot be rewound by the pushbutton during test mode, or when on line, or when
LOAD is false.
When the transport is on line the REWIND flip-flop
can be set by interface REWIND COMMAND (RWCI)
true, supplied from the interface control module.
The output of the REWIND flip-flop, REWINDING
(RWOOI), activates NOR gates IC15-8 and ICI4-6,
generating RNFI and RVSI true to the ramp generator module to initiate a fast reverse motion to load
point. When load point is detected the photosensor
amp driver module supplies LPPULSE true to input
pin H of the Pushbutton Control module, clearing the
REWIND flip-flop.
ADVANCING TAPE TO LOAD POINT
The oN TAPE flip-flop, rCIO, locates tape position.
Before the tape is loaded, the flip-flop is cleared
by LOAD false, which is inverted low by IC12-2 at
ICIO-S. When. the transport is loaded the directdear is removed and NAND gate IC14-11 goes high.
Since the ON TAPE flip-flop is still cleared, its 'Q
output high activates NAND gate ICI4-8, generating
R UN NORMAL (RNN1) at output pin Y to advance tape
to load poiht. When the load point marker is detected,
LPtrue from the photosensor tnoduleis gated through
Ic16-3 and direct"'sets flip-flop ICIO-7 to the ON
TAPE state, terminating the tape motion. Similarly,
when load point is detected during reverse tape motion, the ON TAPE flip-flop is toggled by NAND gate
lC16-11 to ,the clear state, initiating forward tape
, motion back to load point.
BUSY
this module generates a BUSY output when the tape
is not loaded, when it is advancing to load point, or
when the transport is off line and not in test mode.
In any of these cases NOR gate IC4-8 is activated and
supplies BSY true through IC5-2 to the Interface
Control module.
WRITE READY
WRITE READY true is generated in two different
cases: when the interface supplies WRITE SELECT
true and the transport is not in test mode (TM false),
or when the transport is in the write test mode and
flip-flop IC6-14 is set. In either case NOR gate
ICl-8 is activated, enabling NAND gate IC4-5. The
gate is activated provided that BUSY (BBV) is false,
FILE PROTECT (FPT) is false, and the transport is
not in reverse motion (RVSI is false). IC4-6 then
806-5665-200A
goes low, is inverted by IC5-l2 and generates WRDY
true at output pin J to the Write Amplifier module.
TEST PANEL CONTROL
In order to activate the test panel the transport must
be off line, and the test panel STOP pushbutton must
be depressed. In that case the TEST MODE pushbutton on the test panel can be activated, setting the
flip-flop consisting of inverters ICll-8 and ICll-lO,
which in turn toggles the test mode flip-flop IC6-6
to the test mode state, generating TM and TM true.
The test mode flip-flop is direct-cleared when the
transport is placed on line, or when the TEST MODE
pushbutton is activated a seco~d time. After the test
mode flip-flop has been set the other test panel pushbuttons are enabled. The WRITE TEST pushbutton
may then be activated, setting the protective flip-flop
consisting of inverters ICll-4 and ICll-6. This toggles the write test flip-flop IC6-l to the write test
mode, provided that forward motion is selected. The
"Q output of the write test flip-flop then activates
NOR gate rCl-8, which in turn activates write ready
gate IC4-5, provided that FILE PROTECT (FPT),
REVERSE (RVSl), and BUSY (BSY) are all false.
WH.ITE READY (WRDY) true is then generated. at
output pin J to the Write Amplifier module, where
it enatiles the write data strobe circuitry. During
the write test the write amplifiers generate consecutive all-l char~cters which may be used to adjust
the skew.
Additional test panel pushbuttons are FWD RUN (a
forward run normal button), FAST FWb (a high speed
forward button) , REVRUN, and CYCLE .. Thereverse
run but~oncan be activated only if ON TAPE flip-flop
IClO is set and the tape is not at load point. NAND
gate IC3-3 is activated, which in turn activates NAND
gate IC7-6 (when the TEST MODE flip-flop is set)
and sets the common of the reverse buttons low. The
forward motion commands are terminated when either
the STOP pushbutton is activated, clearing the TEST
MODE flip-flop, or end of tape is detected, in which
case EOTl true is inverted by ICl7 -4, disabling
NAND gate IC7-3 and setting the common of both
forward motion buttons high. Sittlilarly reverse motion can be terminated by activating the STOP pushbutton, which terminates all test mode operations,
or when load point is detected, in which case LP
true is inverted by ICl7-3 and disables NAND gates
IC3-3 and IC7-6. This sets the common of the reverse buttons high. The Pushbutton Control module
also driyes the test panel indicators, lighting the
data lamp when any data is being processed by the
write/read electronics, illuminating the skew indicator when the skew is out of adjustment, illuminating the EOT indicator when the transport is at end
of tape, and illuminating the LOAD POINT indicator
when the. transpdrt is at the beginning of tape.
The CYCLE function is fully discussed in the Type
5655 Test Panel Switch circuit description.
806-4843-100
TYPE 4843 AUTO POWER RESTART PC BOARD
CIRCUIT DESCRIPTION
(OPTIONAL PC BOARD)
In troduction
When incorporated in any of the Kennedy Model 9000,
9100, 9300, 9700, 9800, or 9832 recorders, the type
4843 Pushbutton Control module allows use of several
factory optional features.
These functions are
determined by optional straps and the use of
components in the APR field.
Not all functions
and/or combInations of such are available with every,'
9000 series recorder. Refer to schematic 401-4843-'
001 and the da,sh number of your particular 4843
module for features that have been incorporated and
tested at the time your unit was built. Due to the
interaction of several of these options the user is
advised to consult the factory in writing if he desires
to incorporate any additional optional features
through field modification. Failure to do so invites
the possibility of voiding the warranty of the
particular recorder involved.
The major optional features along with suggested
usage are outlined below. (Reference is made to
schematic 401-4843-001.)
ON TAPE (OT)
Determined by the placement of option strap 1. If
this option is specified at the time of factory order,
the operator cannot place the tape unit oh line until a
reel of tape is loaded and positioned at or past the
BOT tab.
command will cause tape to advance at the normal
synchronous forward speed). Note: This feature
should be used only for purposes of high speed search,
as writing cannot be done at high speeds.
AUTO POWER RESTART (APR)
Determined by the configuration of components in
the APR field and external assemblies (in some
mode1s) driven by this module. When specified at the
time of factory order, this option will protect the
tape unit against "brownout" and will automatically
power up, load, and set the deck on line under certain
conditions.
With the standard APR option this
circuitry continually monitors the line voltage and
whether the tape unit is on line or off line. If the
external line voltage falls below a minimum value
required by the tape deck, this option will force the
deck into an off-line state along with issuing a
BROKEN TAPE command (i.e., the reel and capstan
servos will be disabled and any write current is
inhibited). When the input power level returns to an
acceptable v'alue, the APR circuitry will do one of
two things, depending on whether the deck was on
line before the power fell: (1) nothing, if the deck
was in an off-line state, or (2) load, advance tape
several inches and place the deck on line if it was
previously in an on':'1ine state .. Additionally, if APR
circuitry is used in the MOdel 9832 buffer, it will
issue an INITIALIZE signal (i.e., clear the buffer
memory) when power is returned.
ONLINE LOCK (ONLL)
OPTIONAL LOAD ON LINE FEATURE
Determined by the placement of option strap 2.
When specified at the time of factory order, this
feature prevents the operator from manually taking
the tape unit off line via the frQnt panel switch,
unless the tape controller has allowed him to do so.
This signal is not normally gated with select and is an
input signal line on interface connect?r J1-A.
FAST (FST)
Determined by diode CR2 and a special control
interface module. When specified at the time of
factory order, this feature allows interface control of
high speed forward and high speed reverse motion of
tape. It is used in conjunction with the Synchronous
Forward, Synchronous Reverse, and the optional Fast
line at the control interface connector of the deck.
High speed forward and reverse com mands will be
accepted when the tape is on line and selected. The
high speed reverse command will be implemented at
any time when tape is positioned past the BOT tab
and the high speed forward command will be carried
out only when tape is positioned ,.at or between the
BOT and EOT tabs (past EOT, a fast forward
A factory variation (to be specified at time of order)
of the standard APR option is the LOAD ON LINE
(LOL) feature. If specified, this allows the user,
through a control interface Signal, to load and place
the tape deck on line.
The LOL signal is
acknowledged only after external power has dropped
and returned to an acceptable level and the deck is in
an unloaded state. If the LOL feature is used, it is
the user's responsibility to provide a TTL logic lowgoing pulse (minimal pulse duration 500 milliseconds)
after power is returned to an acceptable level. The
LOL signal is not gated with SELECT and appears as
an input signal on interface connector JIA.
SUGGESTED USAGE OF APR FEATURE
The standard APR circuitry is activated only when
the deck is placed on line and is deactivated when the
deck is placed off line. (In the case of the LOL
Variation, circuitry is activated only when power has
failed and then returned when the deck is in' an
unloaded state.) Thus, when manually loading a reel
of tape on the deck, the APR feature is transparent
to the operator and only comes into play when
806-484J-200A
external power has failed with the tape deck in an online state. The tape deck must be mounted in a
vertical positon to avoid spilling of tape in the case
of power failure. Proper positioning of com mands
after the APR circuitry has repowered the deck
depends on the particular mode of operation and
should be determined by the application. If a rewind
was in process at the time of power failure, the tape
may stop and become repositioned up to 5 feet before
load point. For proper operation in this case, tape
should be spaced forward 6 feet and then rewound.
For any other mode of operation, it is suggested that
a REWIND command be issued immediately after an
APR power-up. The LOL signal is not gated with
SELECT and appears as an input signal on interface
connector .J1A.
The APR circuitry is designed to operate under
conditions of power failure externai to the tape deck.
Power failure simulations made via the front panel
power switch do not come under the above category
since this power switch is located between an input
power RFI filter and the power transformer.
AUTO POWER RESTART ADJUSTMENT
preregulated + 5 vdc and will appear on the scope
as illustrated below:
voltage T P- A
Vmln
Ov
3. Adjust the input power voltage to the machine so
that the value of V . (as shown above) equals
the value stated on~Hhematic 401-4843-001 of
the APR PC board.
4. Turn R18 CCW until the voltage appearing at
TP-B goes low.
APR OPERATION IN MODELS 9100/9300
APR operation iri these vacuum column tape
transports is :identical to the above description with
the following 'exceptions:
a)
Manual and power failure initiated load
sequences take approximately twice as long
due to the increased tape tensioning time
required to prevent oversized tape loops
from forming in the vacuum columns during
a power failure.
b)
Th~ manual and APR load sequences are now
as follows: Tension Tape; Load Columns,
Search forward to load point; if load point is
not found after a given time out period,
,rewind to load point; then place unit online.
Normal field adjustment of the Auto Power Restart
board is not required unless a new APR board is
placed in a machine or an existing board has been
refurbished. If this is the case, the following field
procedure is recommended:
1. Power up machine and adjust R18 fully CW.
2. Monitor TP-A and TP-B with a scope. TP-B is a
logic level and will be high.
TP-A is the
time
40 1-4843-001 VI
MASTER BOARD-CONTROL
ONL
----{ONL
+5
1~ ~
j
R14
1K
MASTER BOARD·CONTROL
).:6'---_ _ _ _........
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Y
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"
9.!!.-
+5
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l~ :~
(NOT USED
MODEL 9000)
CR3
1N270
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LAMP
SW
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Y
0
V
TMRN
PULSES/
220
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TEST
1'' 1 1'' I 1 11
6
DATA
LAMP
K
TM FOREN
5
9
8
SKEW
LAMP
+5V
SKEW
8
L
TMRV TMREVEN
TEST
TEST CONNECTOR ----=F--::M..----aA-.J-IL~ISr
R
H
)
1,2 11 QQ
"l.;Cn;::}'-----1f----+----Ir---'
EOTI22~<--~----------------_t--------~
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TM START
TO DATA SECTION
3
4
8
5
lQ
6
5
I
I
I
~~~~ 1 ?------------------.,-,
~~~~ F ~---------------+---------------------"
~:~~E ?----------------+---------------------.
ti
J uELVi5 (
STEST
APR Pushbutton Control,
Type 4843,
PULSES
Schematic Diagram
Sheet' of 2
r---------------·
ro 1
)
)
'-0 7
401-4B43-001
VI
TO SUPPLY
REEL MOTOR
L!.o4
! 02
)
t !
TO TAKE UP
'-10:08_ _ _ _ _-+) REEL MOTOR
LL,5
+24"
!
~"
B I
1N2069
'" 1('\ I L-
rIlN~TTON
,'-'1'-'1 ....
BKN SET
0
1
BKN SET
NEXT
(JUMP)
2
3
3
4
L_~TO!12.A!ODE~9000!NLYJ
MASCIR
MAs CLR
,-----------------------------------,
4
F (7)
5
6
I
6
7
UNREG I
+12V15
7
8
LOSET
9
A
ilSIT
OTSIT
B
OTSIT
A
A
:
IDITSTI
D
0NIm
E
E
ENABLE
ENABL E
E (0)
F (0)
CR6
X TABLE
SPEED(IPS
-
R25
OMIT
I
Y TABLE
-OYZ
R17
1. 2 K
R15
220
-2Yl
-3YZ
-4YZ
-SYZ
-6YZ
-7YZ
-SYZ
Q2
2 N440 1
+5
IN270
10
12.5
15
18.75
25
37.5
45
75+
15QK
lOOK
82 K
68K
47K
39K
2.21'1
-X2Z
-X3Z
'-X4Z
l80K '
DASH NO.
- XOZ
-x lZ
FIRST USED ON
9000
9100/9300
FUNCTI ON
STD,
LOL
LOL
AUTO
LOL
AUTO
•
•
•
•
•
••
•
•
•
•
•
•
APR CIRCUIT
ST3, RELAY Kl
•
SH
ST5
ST6
ST7
:;T8
5T9
•
•
DiODE CRIO
Z TABLE
•
•
•
•
•
•
•
•
DASH NO.
-XVi
-XY2
-XY3
STD
OT
ONLL
OT /ONLL
•
•
•
ST2 (ONLL)
CRZ (FAST)
•
i
•
"I-
-X6Z
-xn
9700/9800
9100/9300
AUTO RW
AUTO
•
•
••
•
•
1N270
FUNCTION
STl (aT)
-X5Z
9832
9000/9700/9800
-XY4
-XYS
FAST
-XV6
aT/FAST
•
IN270
IN270
-XV7
•
•
•
RESET
IN914
5
1K
~qBLE
R21
IK
CR7
~----~CR5
47
R22
I
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I
I
I
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3
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I ~f!L ~
SET
C
+5
CR4
IN914
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RI6
330
-9 y 2
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+5
-1 yz
I
I
+
LOL 20~--+_--~--------------_.
DASH NO.
I
+5
il1<"ff"'STI
1N749A
MAS CLR
BKN
I
+5
B
C
C
F
ill
8
9
0
MODEL 9700/
9800 ONLY
K1
r---------------~
JUMP
CONDITION
1 (0)
2 (0)
150 R
3W
tV
3.3M
-X8Z
+
6.aI
C9
910019300
r---~~--~==~~S~~OTSET
AUTO / OT
SEE
•
•
•
TABLE
+5
~~------~ONL
SET
R24
39K
R23
390
R25
SEE
TABLE
•
R26
39K
1.
C6
01
•
-XY8
ONU/ FAST OT 10NLLI FAST
•
1N270
•
1.2
•
IN270
.-USEO
*ADJUST RIa SUCH THAT SIGNAL
AT TEST POINT B GOES LOW
WHEN VOLTAGE FALLS BELOW 5.25
±.15V MIN AT TEST POINT A (NOTE
SCHMITT ACTION OF IC5-3)
**FACTORY SELECT
NOTE: FOR CIRCUIT CONVENTIONS USED.
SEE HOTES TO SCHEMATIC SECTION.
I
I __________________________________
APR CIRCUIT ISEE TlIlE FOR USE)
L
~
APR Pushbutton Control,
Type 4843,
Schematic Dial/ram
SltHt 2 of 2
+5
301-3841-001,0
R1
220
R2
330
R3
4.7K
+5
0
P~
E~
F~
~
S~
T~
U~
V
J~
~
~
X~
Y~
Z~
T CONVENTIONS
USED,
HOTE: SEE
FOR HOTE,S
CIRCUl ro
SCHEMATIC SECTION.
Control Terminator,
Type 3841~001C,
Schematic Diagram
806-6667-100C
TYPE 6667 SEQUENCE CONTROL
CIRCUIT DEsca'IPTION
This module contains circuitry for implementing the
following sequences: LOAD, when tape is loaded into
the column after the LOAD pushbutton is pressed;
UNLOAD, when tape is rewound onto the supply reel
after the REWIND pushbutton is pressed at load
point, and POWER OFF, when tape is removed from
the column and tensioned after power is turned off
from the front panel POWER pushbutton. In addition,
the broken tape sensor detector circuitry (Q2 and
related components), the rewind pushbutton control
circuitry (IC13, IC7 and related components), the
automatic load point search circuitry (IC3 pin 12, C6,
R24) are all located on this board.
Sequences atoe controlled through the use of a low
frequency clock (lCI5) with a period of approximately
0.5 second, and an eight-stage shift register (JCI6,
ICI7). When power is first turned on, a power preset
pulse (IC6 pin 4, QI and related components) prese'ts
the shift register to all zeros, resets the load flip--flop
(lC9 pin 6), and the unload flip-flop (le9 pin 8). By
the same token the load point search flip-flop (ICI
pin 6) is being set.
At stage 7, sensor disable goes false. During the time
from stage 2 through stage 6, the reels motors were
operating on an open loop mode, tensioning the tape
on its threading path and allowing the vacuum to
reach its nominal level. When the servo disable goes
false, the tape is fed into each column through a
measured "kick" (this circuit is implemented in the
Type 6666 Servo Preamplifier) and the position servo
mechanism of each column is closed through its
respective sensor. The tape is now loaded.
At stage 8, a load signal (with a false broken sensor
signal) is fed to the control electronics, which in turn
enables the capstan to run forward. If load point is
not found within 6 seconds (60 feeO, the load point
search flip-flop is still set and IC 16 will force a
rewind to load point. At the same time, the vacuum
switch is enabled.
POWER ,OFF SEQUENCE
When power is turned off from the front panel, switch
81 will close and reset the load flip-flop, enabling the
Note that a broken tape sensor output or a loss of
vacuum detected after loading will generate the same ,
preset status mentioned above.
Under these
conditions no power is applied to the vacuum blower
motor and the high power transformer (for the
servos). In addition, a broken tape signal and an
unload command are sent to the control logic, and a
sensor dsable and servo disable true signal are sent to
the servo preamplifier.
shift register to shift 0 to the left 1 turning off the
vacuum blower and immediately setting SENSOR
bISABLE true. The sequence is now opposite to the
load sequence. Up to stage 2 the tape is being pulled
out of the colurnn and tensioned properly. At the end
of the sequence all power is turned off (load relay
false).
UNLOAD SEQUENCE
LOAD SEQUENCE
When the LOAD pushbutton is pressed after a low
frequency clock time, the load flip-flop is set,
enabling the shift register to shift 1 to the right.
(The low frequency clock is also the clock to the shift
register.) The load flip-flop also starts the vacuum
motor through a command from SSl (capacitive
start). At stage 1 the LOAD light on the front panel
is turned on and so is the high power transformer,
generating +24v rectified (SS2). This delay avoids a
high surge of ac input current which could overload
the line.
At stage 2, the servo disable to the servo
preamplifier is set false, allowing the power
amplifiers of the reel and capstan servo to operate.
At the same time, the load relay is energized,
connecting the reel motors to their respective
amplifier and latching the ac power pushbutton.
(Prior to this, the motors were being braked.)
When the REWIND pushbutton is pressed at load point
and the tape is standing still as detected by IC13,
CR5, CR6, R20, R22 and R21, the unload flip-flop is
set and the power off sequence is initiated (IC5, pin
12). However, the power remains on at the end of the
power off sequence and after tape has been pulled out
of the column, an UNLOAD/ true signal is sent to the
6666 Servo Preamplifier, disabling the takeup servo
and applying voltage to the supply reel to unload the
tape. The unload sequence is terminated when end of
tape is detected by the broken tape sensor, which
results in BK N true at the sequence control.
REMOTE UNLOAD
Certain APR modified units permit remote unloading
from the interface. UNLOAD/ true at pin 18 sets the
UNLOAD flip-flop (IC9-8,12) resulting in UNLOAD/
true at output pin 11.
J.
+5
1~(---...,
GRI>..
1
('
5
-10
+10
3
+10
~(--------....-
1::=:J
~--+-+-I"""-c-F--,.-.
1
C1
.68
~ R2
+".;t-
I
11
~470
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11
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.......
tl
---"1
J.~:01 10~2'
9
C2
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002 H
003C
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Rl
R9
9300STD
1M
150.314
9100STO
6801(
56. 3W
9300APR
9100APR
3M
2. 2M
150.3W
56. 3W
•12 13
~
I
1
~
IR
11
10
•
-
1 S
LOAD.
10
9
4
1s 16
15
~2 13
7
0
L
R
9
-.14 -.15
A
B
lltl. CK
~
LI
17
~R
~
SOl-'9:..------,
~ OS-.JLr.~. .cD
~
SOt'""--
....i
131I..l1_2_ _-+--t_
t--'
0.....-'-
,
(~
1
POWER
Q,!;'
6,2
10
5
~
1
5
813
tQ
3,4,5
12
9,
10 >6_ _ _ _
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6
~
----1
,
J.:j------....
---------------~....,, 13
9 .6, .~...,)-----""""'>4,
.8
9 3.
,8
6
Q1
+5
3
4
L-__________________~~I
10
~
+5
Q.Q
R15
'-------t-+-----r--------r~9J
R13
,
4.7K
.JY
2.2 K
4
:r
--4d".rI~
~
12 13
~3~_____
~
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,
-10
12
4llll '""',n..-__
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4
1,2
R15
l
:~9
2 >6_ _ _ _
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t
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1"
lj
21~f:.....----------------------+5
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CR5
,
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131r----"110.1l
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CR7
13
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2
1+ 13 ..............~5!...----.:.;:.fII--+---_t--.......---=:JJl
STANDARD TACH 20""~
..---------rL_ _+l----.--r--:::2 J~/"'"
(cRDM SERVe PR EAMP J
C~6
-=
J
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R21
r
i1
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:FR8M _"""
I
I
18<~-------------------------------------------------------,
12
3
6
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7
R32
100
~
~
Q.Q
~""'\-~I----.....-VVV'-ut..-~724
H~I~~RD
R29
13
22
11
QQ
+10
SEf"ile"
51
1
~
'00
R25
C7
~
R3
6.2K
CRI
+5
4 R4
P---
D.OJ
1_
+r:
L2.qR 1 Qr-
1
+5
• e
4JK
+10
r-
r----"1 34
IN270
2 _ 'SS
12
.llL
eRa
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J
~
~+123
Ji.2
10
+5
R24
4 7 OK
_ _ _..........._ _ _ _ _ CR 10
n
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C3
39
+I~
3.3K
3 6
~DQ1
x 41--_ __
PRESET
R5
2.2 K
2N4990
~
__
Sequence Control,
12,13 2 "Y"\-......
..-......
"'.,;u S -Q~~~2-------------n
11
5_
r_-'---!E.1l..
23~~------------------------------------------------------~~--~---
~AGE
~3,q
8
NOTE: FOR CIRCUIT
CONVENTION\~~i~ON
SEE NOTES TO SCHEMATIC
.
J
PREAMP)
R28
CRll
9
12
______1113 --:l.-c21-_ _ _
10 K
LOAD POINT
e,"
E~ill l---J-------~-------+---------------t-T--7
+5
BROKEN TAPE
(TO CARD CAGE)
+5
+5
R31
4.7K
CAGE)
~
8~23-------~1I------------~711
~~&O~~RVO
R14
330
+5
TOAD
(TO CARD
R26
6
2 . ~_ _ _ _ _ _ _ _ _ _ _ _ _ _ _.;.22"'0o/'_------""'7~ 17
=
.:c. 'n-----~---""I-.J\
n~ .;
+5
5 5 ?6____--,16.....~2~-l----+----------------------------__~r_~~----~r1-_y
R27
j+5
L----I--+-------t--------4.7K
IL-_
-----rJ "'SET
, 7.
..n
,
2N44gir::;
CR4
""
_-......:c2:52:.-....___~22"'0V'___:....,'"""":"::_4"""1,5
47K
IN270______.....~~----------"
~ 15
'r8L_________________..:;.;.:.:
~
CR9
~
•
·~~------~-~RV1~2--~--~
L-~========~~::~----------1r----------------------~~.
1,,la
Qi
Rll
r/..J ~
SENSOR
DISABLE
(TO SERVO
PREAMP)
Q£
11
+5
~
'-----+-.....
7.
10K
ENABLE
~~ f~~53A
Qi
BKN
FROM
CONNECTOR BD.
SERVO
RIO
4.7K
.....
-
~
19
LI3JLI2______+--i___1--i_t-________ s:J
'IS
.,.6
9
R8
2K
r
OFF
(TO SERVO PREAMP)
SERVO DISABLE
+5
+5
;
IN753A
R9
~4~ 11
.,i1,10
STl
S~Cr
SS2 HI
POWER
(TB2-3.POWER SUPPLY)
6.7~~5__--S-E-E~~~BL~E-------------------_cor------~t-~
1..-------lL<:':
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IN2069
ill
I
....I! J.:
___
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r
ill
QQ.
+5
'------~~14
+24
Q.Q
5
11
4.7 HH
3
~_ _ _ _ _ _ _ _ _ _ _ _ _ _ _1_'-,2 111;W~>3--'--'114~-~-'--CR-2--------
~r--<~~~~~_-~~1.~.~:~4~~~-1----~----~1----t----_1-------_i--J~-_1--_t-II--------~------~
4_-----~---~------r_----1I-------
5
1 ?
132
11.
....
ABC
L..-_--I_~--J15J14
r---
10
.------'"'o--~ l!
L1
OMIT
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11
. R7 '
INSTALL
5 :>6.....~6~_ _ _ _ _ _ _~_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _--"
""::"12
Q§.
2K
lel2
1~----------~----------------t11r------~
10
+5
~1l
~
~ ~12
CK
194
r----------------------r----r---;riO~I(JcJ~
oC=1JJL
rl
L3
11
USED ON
R6
lK
+5
i~f~'~~~ __
~
15
1.2
401-6667-001 K
DASH NO
8
..
3 11
O______~_______~
~~ I~~________~
LOAD
~+
L1J--2""1L- m
.....---4...
2 ..( - - - - - - - -....-
TO 5S
f
SEE
TABLE
-10
::
_-----""""1~~<:2~,~n
Rl
13
10
Type 6667,
Schematic Diagram
CAGE)
S06-5733-100A
TYPE 5133 RAMP GENERATOR
CIRCUIT DESCRIPTION
The ramp generator produces the proper analog signal inputs to the capstan servo system to control the
direction and velocity of tape motion. The outputs
are voltages that rise and fall linearly at Qontrolled
rates to highly stable levels. These analog signals
are controlled by digital logic outputs from the control section.
Two similar ramp generator circuits are provided:
one for normal speed op'eration and one for high ~peed
operation. rC4 is an operational amplifier in the
RUN NORMAL SPEED circuit. The amplifier output
is normally saturated in the negative direction. When':,
its positive input at pin 3 is high, the output saturates
at +10 volts. This occurs when the RUN NORMAL
input sets flip-flop rC7. rC4 feeds FETs Ql, Q2 which
are connected in a constant-current circuit. The
magnitude of current flow in the circuit is controlled
by R3 and R4. R3 controls current in the positi vegoing direction, or start ramp, while R4 controls
the negative-going stop ramp.
Since Cl is charged by a constant current, its voltage rises linearly until clamped by CRI to a value
one diode drop below +5 volts. The emitter of Qll
is connected to R UN FAST voltage through diode CR 9.
Since Qll is controlled by unregulated power supply
voltage at pin W; it pulls down the +5 volt RUN FAST
signal whenever the li?e voltage drops below its
rated level.. Q3 is an emitter follower whose output
rises to a value of +5 volts, since the emitter can
rise one diode drop higher than the base. When the
input from rC7 to rC4 drops, the voltage fed to Ql,
Q2 goes to -10 volts and Cl is discharged linearly
Wltil clamped by the base-collector diode of Q3.
Since Q3 base goes one diode drop negative, and the
emitter is at zero, a pOSitive-going ramp has been
generated.
The ramp voltage output from Q3 is fed to the FET
switches Q4 and Q5. If forward direction has been
selected, Q4 is on and Q5 is off. The ramp is then
amplified by unity gain opc1'ational amplifier IC3,
without inversion, and appears as a pOSitive-going
ramp at test point A. If reverse is selected, Q5 is
on and Q4 is off. The ramp is then fed to the inverting input of IC3 and appears as a negative-going ramp
at test point A. Forward/reverse selection is controlled by flip-flop re6 and Q9, QIO.
Ramp amplitude and, therefore, tape speed are controlled by normal speed control R14 and output summing resistor R15. The fast forward and reverse
ramps are produced by a similar circuit involving
amplifiers rCl and rC2. However, since rewind
speed and ramp time need not be precisely controlled, resistors are used instead of FETs to charge
and discharge C4 and produce an approximate 0.5
sec rise/fall time. CR9 and CRIO isolate the ramp
output from any small offsets that may be present
in rC2. ReWind speed is controlled by summing resistor R16. Operational amplifier rC5 at zero ramp
output has a slight bias produced by R37 and H3S,
keeping its output negative. When the ramp rises
above the bias, rC5 switches to positive output, indicating that the tape is running. This output is used
to gate off the input circuits thr.ough rCIO and re9.
Flip-flops rC7 and rcs may be reset by run normal
or run fast inputs going false, but cannot be set again
untll the tape comes to a stop. This prevents damage
from illegal commands and reduces timing requirements.
Resistor R44, capacitor CIO, emitter follower Qll,
and diode CRS comprise a voltage tracking circuit
for RUN FAST signal. The +lS vdc unregulated reference voltage is derived from power supply transformer Tl.
Type 5733 Ramp Generator includes an additional
flip-flop, rCll ... S, whose function is to enable consecutive RUN NORMAL commands to be received
without requiring the tape to ramp down to a stop
following each normal speed operation. Following a
RUN FAST command, however, flip-flop rCll is set
by rcs, inhibiting any RUN NORMAL commands until
the tape comes to a stop, at which point rC9-6 clears
rCll-9, and the 0 output at ICll-S enables rC7-2.
ADJUSTMENT PROCEDURE
Start/ stop time adjustment:
a. Arrange input signals to the tape transport
to start and stop machine. Rate must be
such as to allow full ramp time~
b. Adjust start ramp (R3) for required time,
observing with oscilloscope at test point A.
c. Adjust stop ramp (R4) for required time.
Time is measured from maximum volts to
zero volt.
Speed adjustment:
a. Using a master skew tape, drive the transport in a forward direction at normal speed.
b. Observe data rate at read amplifiers and
adjust R14. for correct timing.
806-5719-100B
TYPE 5719 SENSOR AMPLIFIER DRIVER
CIRCUIT DESCRIPTION
This module responds to signals from infrared
detecting transistors which sense load point and end
of tape reflective strips, and broken tape.
In
addition, this module contains the file protect
circuitry, the write drives, and the erase head drives.
EOT, BOT, AND BKN SENSOR AMPLIFffiRS
The load point sensor amplifier and the end of tape
sensor amplifier operate interdependently to detect
the load point and the end of tape markers. The
active components in detecting EOT and load point
are two operational amplifiers, IC6 and IC8, and two
transistors, Q1 and Q2, in conjunction with associated
components. Transistors Q1 and Q2 act as current
sources; potentiometer RI6 is used to adjust the
transistor base currents to equalize the voltage at the
inputs of IC8, the load point sensor amplifier, and
IC6, the end of tape sensor amplifier. Resistors R18,
R19, R20, and R21 are used to bias the amplifiers'
inputs when plain tape is in front of the sensors.
When either load point marker or the end of tape
marker is detected, the infrared detecting transistor
of the particular sensor is turned off, and a high level
is supplied from Connector Board Type 5303 at either
pin Y or Z, switching the output of the respective
operational amplifier. Resistors R17 ahd R22 serve
as feedback loops for noise protection. Thus when
load point is detected, the load point sensor supplied
at input pin Y of this module saturates IC8, causing
its output to go high, and is inverted twice by Ie7 to
generate LOAD POINT (LP) true at output pin 19 to
the Pushbutton Control module.
The output of
inverter IC7-8 is also supplied to an edge circuit
which produces a 1 microsecond pulse on the trailingedge of LP. This pulse is output at pin 8 to the
Pushbutton Control module.
The EOT sensor
amplifier operates in the same manner, generating a
high output when the EOT marker is detected, and
supplying EOT true at output pin X to the Pushbutton
Control and Control Interface modules.
BROKEN TAPE signal from the Sequence Control
enters the board at pin W. When BROKEN TAPE goes
true, positive voltage turns on transistor Q3. The
collector of the transistor goes to ground, generating
BKN true at output pin 18. When power is initially
turned on capacitor C9 will cause the BKN output to
be high which presets the LOAD flip-flop on the
Interface Control module.
FILE PROTECT CIRCUITS
The file protect switch output is supplied to this
module at pin T from Connector Board Type 5303.
When a reel is loaded without a write enable ring, the
switch contact remains grounded. During the load
sequence, BKN is held true by the sequence control to
facilitate certain operations and the tape must he
reloaded to change the state of the file protect flipflop (IC4--5). When BKN is made false, the circuit
looks at the state of the file protect contacts. FPT
true at pin K of the pushbutton control makes WRITE
READY (WRDY) false.
WRITE, ERASE DRIVES
When the file protect switch is grounded, it also turns
off transistor Q7, in turn shutting off the current at
the base ofQ8. This cuts off the write head and
erase head drive currents supplied by transistor Q8.
In order for the write and erase drives to be turned
on, the file protect switch must be opened and WRITE
READY must be true at input pin 2. This will
activate NAND ,gate IC2-3, causing op amp IC3 to
turn off transistor Q9, in turn enabling transistor Q8
to turn on and supply the write and erase head drives
at pins 22 and J.!
The zener diode into the base of Q7 detects when
power is being dropped. This turns off Q7 early
enough in the power down sequence to turn on Q9 and
remove the head voltage supplied by Q8. This avoids
putting unwanted flux changes on tape during a power
failure.
401-5719-001 J 1
+ 10
+5 V
Rl
442n
+24
+24 V
+ 10
R8
470
R3
1.8K
3W
U
R4
750.n.
U
CR2
1N914
CRI
R9
1K
TL431
.-----~----~------~--------------------~22
R2
2K
U
+
1
CRIS
IN749A
4.3 V
+10
Cl
R25
100
OMIT
W
7
SPARE
16
Ril
lN75lA
5.1 V
0.068
R7
3.3K
-=-
T
1~~--~~----------------~10~--------------~
R27
10
m
13
N
WRITE INDICATOR
K
READ INDICATOR
(TO CONTROL PANEL)
R28
+24
CR4
1N914
(FROM CI- F)
SLT 1
1 ~131 - - - - - - - - - - -.. .N10....
12 ~(------~~*,
--------+7~ V
r-----------------------------~w
CR13
1N2069
SELECT I NOI CATOR
BKN
+5
FPT
(TO PBC-K)
>=-=-------~18
R3l
10
6 2
__----------~S
ERASE HEAD DRIVE
(TO DECK)
(FROM PBC-131
9
FI LE PROT.
CONTACT
WRDY
(PIN 7)
Q9
2N2714
i
R6
1. 5K
I-= +
J
C2
WROY
( FROM
PBC-J)
2,2
(C4 ON 5664
MASH RBOARD)
R26
W.HEAD DRIVE
(TO DATA SECTION)
H
TO WRITE ENABLE
INDICATOR
(TO CONTROL PANEL)
p
FlU PROT. SOL.
(TO DECK)
Q5
148"-0094-001
(SEE NOTES)
RIO
10K
BKN (TO PBC-U)
CR5
IN914
-10
'ro
(IC7-13)
+5
+10
8
Rll
LP PULSE
(TO PB C- H)
NOTES: UNLESS OTHERWISE SPECIFIED
1. EQUIVALENT TRANSISTORS
148-0094-001 EQUALS MJE4922. MJE2523.
SJE5052K. TIP31A.
1M
-lOV A
+10
Rl8
200K
y
R23
2.7K
LP
FROM
CONN ECTO R BO
SEE TABLE
z
R15
10K
LP (TO PBC-21)
+10V
TABLE
B
,';H NO.
GRO
CR9
IN914
100
R21
lOOK
R14
10 K
R16
lK
- 10
19
C7
1000
R12
SEE TABL E
R33
lK
-10
GRD
C
ZERO ADJUST
lCR'
R19
lOOK
+5
+10
IN914
CR7
IN914
+5V
D ~
R20
200K
Y
Ii'
+5
r
1
1. 5K
USED ON
9100
NOTE: FOR CIRCUIT CONVENTIONS USED.
SEE NOTES TO SCHEMATIC SECTION,
+24
C8
-10
1000
EOT
FROM
CONNECTOR BO
00 IF
R12.R13
+24V
X
F (
1
EDT (TO PBC-Z)
R22
1M
Sensor Amp Driver,
Type 5719,
Schematic Diagram
806-5655-01A-00
TYPE 5655 TEST PANEL SWITCH
CIRCUIT DESCRIPTION
Located on the front of the tape transport, this
module contains the Type 4865 Test Panel, Type 4568
Cycler, and the Type 3864 LED Display Panel. The
test panel switch is connected to the Pushbutton
Control card, which contains mo~t of the logic
circuitry required to deliver appropriate commands to
the ramp generator when the machine is off line and
one· of the test modes has been selected. (Refer to
Model 9100 Tape Motion Control circuit description
for a detailed explanation of this process.) Continuous forward and reverse tape motion circuitry for
adjusting skew and aligning the tape path is contained
in the Type 4568 Cycler circuit board.
CYCLER OPERATION
When thE~ CYCLE pushbutton is pressed with the
machine in test mode and at load point, the cycler
generates alternating negative true TRVS and TRNN
com mands to the Pushbutton Control module. The
tape will move forward and reverse continuously until
the STOP pushbutton is pressed or END OF TAPE is
reached (Note: Tape will not move in reverse when
positioned at LOAD POINT.)
The basic operation of the cycler is as follows: If
the cycle switch is not activated, the low true RVS
and RNN signals from IC3 are "gated out" of the
Pushbutton Control board via the SI cycle switch.
When the cycle switch is activated, the low freguency
. oscillator IC2-5 is enabled and RVS and RNN are
switched into the Pushbutton Control board. Forward
tape motion is produced by the application of a RNN
andRVS command, whereas reverse tape motion
takes place when RNN and RVS commands are
applied. The duty cycle of IC2-5 is approximately
60% and is gated at IC3 so that 40% of the time RVS
is enabled, contributing to a net forward motion of
tape in the cycle mode. ICl, R4 and C3 a("t as a
bidirectional edge detection circuit. ICI-8 triggers
LlOnostable IC2-9, which disables any RNN command
during the ramp as required for proper operation.
A22J 1
401-9100-003BI
PUSHBUTTON CONTROL CARD
TYPE 3843
CONTRO~
r---------------------,
I
.
R7
4.7K
p
AI0J2
Y +10 ~~----------------~~)_------------~~--------~
iimi
:1
MAIN CONTROL
PANEL
I ..',"
(
M.B.
+10
X~----l'"
(PIN12 )
(PI N7)
WROV---....I
(lC2-1)
3843
STl
LINE
5T2
C6
Io=--~ OIiL (IC7-12)
ON LINE
ST3
ST4
L-~~~o_--~~~~021
STD
OOIF
STRAP
OMIT
TMI
002C
OMIT
STRAP
OMIT
220
OMIT
OMIT
OMIT
OMIT
9
OFFC1
STD TACHl
--020
(P11l12 )
_--------oH
i:Pi
(I C14- 8)
-m
(PIN 18) - - - -....~~
10
+5
I
WROV
(PIN K)
W SEE TABLE
I STl
~ST33-O--_:_-__;==t_:_--+_--__d SEE TABLE
S
\ ST2
T
J
TPT
'l~
R
5665
BSY
(lC5-2 )
W. SEl
ONL! (1e6-8)
REWIND . - - -....-+---0
(I C8- 8)
!!57
TO RAMP
GENERATOR
9,8
I
F
LOAD (Iel0-8,
IC14-11)
LOAD!
I
+5
LOA!)
C5
~9I
.
047
RVSl
1
m
LOAD
(PIN U)
~ ~7
BKN TAPEI
N SENSOR
OT (lCJO-It)
I
22
REWIND
24
I
REWIND
I
I BKN
VAC SW(N0)J
K
L--+--------+-~-_O~
~PE
I
1
Lr-V'0~10
~ ;'
17!
L23
__
J
LP
Rl,220
SELECT
I
u
E
10
(~
L-........._~N)_......- -.....J-..::.(
-18
r--
I
I
I
I
I
~
AMPI
T
20
i~ i - - - o - -....~
H
LP PU LSBE 1-1__-<)-____.-____________-+.....J
WRITE
9
L--+~+_--~~------~-----r--~,N
w
1.-0--------0"'- +5
L
:
Y lOT F£.T___ ":
LP
r----t---------....--....
r---~
Eon
22
OPTIONAL
I
r---!:.P
+5
EOT
R
1
0
(
(I
•
F
TM
TEST MODE
(i C6- 11)
~SKEW
\
5
HOS Jl-0
.' (
r-E=:>-+-l_·_'"~;
tV"O'"1
1
1
L. ___ J
~OI
J:-F
3842
J
K
n---_ m
1-1- -. . . . . . . . . . . . .
I
I
I
L
Kl
0
I
I
•
1-1
1
I
16
I--------(0)-----4......
:
r----}----- l
I
I
:
I
I
II
:
I
A
DUAL DENSITY
CONTROL
4365
I
I
I
I
I
~----------~~~~-~~---:~~~---~
I LED PANEL I
3864
(I C4 -1 )
'----------~
(IC10-14)
~~~1~3______~TM
REWIND (IC8-8)
If.SEL (TO IC1-1,2)
RNN (TO IC15-2j
RVS
RwCi
(TO IC14-5)
(TO IC8-2)
220
RS
R6
220
220
flo
No
TEST PULSE
(PI N 5)
CR2
IN270
CR3
1N270
+5
10
s
---,
A
rf-,
,
SkEW
TEST
I
I
I
FLVI02
~-----r-----~-~-~-~-~-~-~-~-~-~-~--------
I
I
I
I
I
:
OFFCI (TO IC10-3.IC13-12)
7
----010)-..--....,.....
:
lS
VI
O~----.......
Ii
f
J
A23J 1
1
13
N~--------o-~
I
I"
TEST MOD!
I
WRITE TEST
I
o
o
LOAD POINT
I
E
1
I
EaT
I
F
5
I
I
SKEW
I
I
H
H
HDS
1 1v
:
8
I
C'
U 2
TEST P
I
LED
,11
I
S"KtW
I
LED PANEL
A
9
Wi 4
m
I
, - -3864-001A
I
SKEw TEST POINT
)>-,-._---oooo(O>-----------+---------+-l=-----ch:::! _
I
(iiis)
4
--.-.
_ ......____
>
!
5I
.5
CYCL~
7
~6K
~
~
I
RI .5
1M
7
14
I
R2
2.2M
2
M
nmr c
I
FWD
p
R4
470
(FOR ENABLE)
I
+5
R
I
R5
~ A '>---.-------<~
Su
RUN
10
1 All!. [
+5
TM.OI
arid NOT [p
stf! RESET H
5~6
I
I
5
5
I
~oJ II
I
»--.. . .__-----c~)-------""'"'I
t-I•
fM
S5
I
o
10
>--------o---t++----~
SET /:~SET
E
> ••
~-mRffiT
F
)>--.......... - - - - -
GRD
Wf
I
I
S6
WRITE TEST
I
I
TEST MODE
I
0
+
!(REV
C4
0.47
12
8 THR
TR
I-=
ENABLE)
OUT 9
I
11
I
CV
3
C2
OMIT~
I
13
I
6
I
L-
NOTE: FOR CIRCUIT CONVENTIONS USED,
SEE NOTES TO SCHEMATIC SECTION.
I
I
I
I
6
I
12
STOP
(SHOWN DEPRESSED)
S7
RESET TM
13 DIS RS
s
L
I
DASH NO.
OOi
002A
OOJA
~S-P-EE-D-4~-l?-.~--If-'o--~/"·~[~"S~·r4-5'~
RS
12 K
6.8K
I
I
I
5568
CYCLER
Test Panel Switch-Model 9100,
Type 3864, 4568, 4865,
Schematic Diagram
I
ERASE HEAD
fJRrYE
PU2
ERASE HEAD
(REF)
I
TO
A6PS-16
FILE PROTECT
SNITCH (FPT)
t
)2
(
I
I
TO
AIPl-7
BROKEN TAPE
SENSOR
) 1
-!
.
I
I
I
1
I
I
I
I
"'lOV
I
I
I
I
TO
A6P5-20
I
LOAD POINT
SENSOR
7
I
I
R6
l20K
TO
A6PS-21
END OF TAPE
SENSOR
I
A7J3
I
10
2
I
I
I
I
I
I
NOT USED
+24V
1
R3
8
SEE TABLE
I
I
I
HOV
FILE PROTECT
SWITCH
.I
) 3
J
I
4(
•
+ lOV
+lOV
•
R8
W
3901l
J,W
)4
WH
12~(-----------1It
.... +24V
I
I
I
I
GND
11)~--------------
l
I
I
I
I
IL ___________________________________________ J
001
I -- R2
STRAP
002
if:
DASH NO.
i
!
3W
~-T··-·STRAP
R3
2.2 K
2.2K
OMIT
NOTE: FOR CIRCUIT CONVENTIONS USED
SEE NOTES TO SCHEMATIC SECTION.
Connector Board Type 5303
Schematic Diagram
806-6666-100C
MODEL 9100/9300 SERVO SYSTEM
CIRCUIT DESCRIPTION
The Servo System consists of the servo preamplifier
circuits, the servo amplifier circuits and the braking
circuits. There are separate servo preamp circuits
for the reels and the capstan.
Each reel servo
preamplifier circuit is connected to its own servo
amplifier circuit. The composite schematic of the
servo system should be used along with the circuit
description.
amplified and conditioned by IC4, 3, and 2 so that (a)
there is no output when tape is standing still (b) there
is an output proportional to speed and direction
during ramp-up and ramp-down, and (c) there is a
fixed voltage while running (IC4 saturated).
BRAKING CIRCUIT BOARD
For safety reasons (broken tape) it is desirable to
place braking tension on the tape after it has been
threaded and secured to both reels. To accomplish
this, two thyristors on the Braking Circuit board are
connected to the motor windings when SERVO
DISABLE is true. When the reels turn rapidly enough
for the motor windings to generate more than 3 vac,
the voltage at the gates of both thyristors will exceed
0.5 vac. The thyristors now short out, producing a
counter EMF voltage through the motor windings and
a 1 ohm resistor, for braking.
TAKEUP AND SUPPLY REEL SERVOS
Both circuits are identical; therefore we will
concentrate on the supply reel servo, discussing
control signals common to both reel servos as
applicable.
Each reel servo contains a sensor
detector circuit, which converts the position of the
tape loop into dc voltage, an operational amplifier for
position servo control (IC18, Q6, Q7, Q8, Q9), and the
amplifier stages (four transistors each).
Resistor RIO and the supply vacuum column
control the nominal output frequency of the
detector, IC21. (Refer to paragraph 4.11
maintenance section if adjustment of resistor
required.)
sensor
sensor
of the
RIO is
After the servo signal oscillation is rectified and
integrated, it is fed to operational amplifier IC19.
Gain adjustment pot R24 is set to adjust proper
position of the tape loop in the column when speed is
125 ips forward and reverse. (Refer to paragraph
4.11 of the maintenance section.) N type FET Q2 is
the sensor disable control. SENSOR DISABLE true
(high) signal from the Sequence Control will turn off
the FET, preventing the sensor signal from actuating
the motors. Thus, when tape is not in the column or
vacuum is lost, SENSOR DISABLE goes true to turn
off the signal from the column sensor. During the
POWER ON sequence, the Sequence Control
generates SENSOR DISABLE true, opening the
position servo loop and positioning the reels until the
tape is properly tensioned in the vacuum columns.
SERVO DISABLE true from the sequencer will disable
motor current by reverse biasing reel servo control
FET Q5. FET Q15 and Q32 are also reverse biased,
opening the takeup reel and capstan servo loops.
Capacitors C2 and C15 on the reel servos perform a
special function. During discharging, the capacitors
will produce a forced sensor output equivalenf to the
tape sitting at the open end of the column.
A signal from the capstan tachometer is fed into the
reel servo system to bias the null position of the tap~
loop as conditioned by the speed and direction of tape
movement. This has the effect of optimizing the
position of the tape in the column. The signal is
When they are turning slowly the reels will spin freely
because the voltage produced by the motor windings
is insufficient to turn on the thyristors. This removes
all braking effect when the reels are loaded manually.
CAPSTAN SERVO/CAPSTAN TACHOMETER
I
During a RUN. NORMAL operation, a RAMP INPUT
signal from the ramp generator is combined with de
feedback signal from the capstan tachometer to
produce an extremely stable capstan speed. The
ramp input to the Capstan Servo Amplifier is summed
with the tachometer output at the source of Q32.
(The STANDARD TACH output at P4-9 becomes
TACH input on the Sequence Control.) R159 is the
tachometer summing resistor, while the ramp
summing resistor is located on the ramp generator.
Any error voltage -- the difference voltage produced
by summing ramp generator and tachometer input
signals -- is fed to operational amplifier ICl. Output
from IC1 is applied to complementary drivers Q27,
Q28, Q29 and Q30. These transistors drive the output
am·plifiers stage to develop a dc voltage across the
capstan motor. The motor then increases or reduces
speed to produce a tachometer output voltage equal
to that produced by the ramp generator.
Capstan amplifier gain is determined by the negative
feedback loop around operational amplifier ICI. This
consists of R143, R144, C31 and ZERO adjustment
potentiometer R139. If the capstan turns when the
tape is stopped, R139 requires adjustment. This
procedure is <;!overed in paragraph 4.14 of the
maintenance section.
FET Q32 controls passage of the servo control output
to the capstan op amps, drivers and amplifiers. This
806-6666-200C
FET is controlled by SERVO DISABLE input from
Sequence Control.
When the tape is tensioned
normally (i.e., with all sensors false), SERVO
DISABLE false (low) is applied to pnp transistor Q1 in
the upper left hand corner of the schematic. It
conducts, grounding the -10v supply connected to its
collector. The gate of FET Q32 is enabled and it
passes any available error voltage to the capstan
servo drivers and amplifiers.
When SERVO DISABLE true is generated by the
Sequence Control, the -10 volt supply connected to
the collector· of Q1 passes through diode CR1,
disabling FET Q32 to disable the capstan servo signal
as well as capstan motor current.
HIGH SPEED RELA Y OUTPUT SIGNAL (P4-13)
A sampling of capstan tachometer output is amplified
by operational amplifiers IC8 and 7. When tape speed
exceeds 150 ips in the fast forward or rewind mode;
the output produced by these op amps becomes
sufficient to make Q31 conductive. This grounds and
closes high speed relay K8 in the power supply which
is connected to P4-13 through the wire harness. The
relay will change the reference voltage of the center!
taps of the high voltage transformer, allowing the
reel motors to smoothly accelerate the tape to 300
ips in either fast wind mode.
SUPPLY VOLTAGE SWITCHING
In order to decrease transistor power consumption
and to lower their operating range, the supply voltage
of the power transistors for the reel servos is
switched on and off, depending on the voltage
required to operate the servos. Comparator IC's 22
through 25 are connected as a Schmidtt trigger to
detect the motor voltage and switch on and off
transistors Q33, 34, 35 and 36. This, in turn, switches
the supply path Darlington transistors on and off.
These transistors are mounted on the heat sink. For
exatnple, the positive supply voltage for each servo is
turned off when the motor voltage for the
corresponding servo reaches -6v. The positive supply
voltage is turned on when motor voltage reaches -3v.
A diode mounted in the heat sink assembly references
the supply to ground when the supply path Darlington
transistor is turned off.
+24V
+10
J4
Rl
I
SER YO
oI SABLE
J6
CR3 3
+5
+10 +10
+ 10
47K
7 ~--.'IN--+~~
R6
10K
13
CR34
R2 01
2
1N400~2________'-~__~VV~~"'+24V
R35
R34
OMIT
R42
150 K
270K
R32
10M
R3
lOOK
C7
-10
R43
lOOK
a
R 13
200K
R49
470
Sm
R45
C9
10K
.022
...------------7 18 su PPLY
FOLLOWER
75K
S6.2K
1%
CRa
R51
470
R22
90.9K,l%
R25
3.3K
R39
1M
-5
Q9
MJE 243
R55
R52
470
lK
R16
R66
15 K, 1%
R6S
lOOK,
240K
+
7.5K
C2
CR6
12 ~----------......
~
. Cl-;r
10 ..1..
+10
-24
CRl?
r-____________--717
~_ _ _ _ _~~10~0~~_______
R31
2DK
+24V
SU PPL Y
CURRENT
FEEDBACK
.1. lew
1%
CR5
+10
CR35
iN4002
R60
10K
R62
R63
lK
R59
10K
f----4~__."..;v---__I-;....:_,
R58
R61
10K
1. 2 K
C21
.068
R68
lK
SENS OR 5
DISABLE
2
R57
180 K
90.9K,
L5
4.7UH
R67
R64
~1.0
R202
L--------4~---~N_--~-24V
1%
+lovI4~+lO
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EMITTER
R15
R20
lOOK
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+24
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1000
R14
200K
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R48
+5
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CR3
r----4It--., ·R 17
SUPPLY
470
-24 V
nOK
10
401-6666-101,R
I
IN4002
C8
.068
IN4002
4.7K
CR12
R101
150K
CR13
iN753,
6.2V
t-~~~-'-~-~~--t--'_24V
R96
1M
CR 15
) - -_ _ _ _ _ _ _ _ _ _ _ _ _.,
+24 v
+24
R106
470
RI02
270 K
R107
470
+10
-10
TU MOTOR
5
R203
2
CR36
Q13
2 N3 7...7......;......;_oK..
TUm
R97
+5
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150K
200K
R78
R79
200K
GRI0
012
2N6609r - - - - - - - - ,
I
Q20
MJE243
R85
R74
75K
I
R204
2
120K
-24
L - - - -......- - - . l W - - _ -24V
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150K
7.5K
4
CRl9
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FEEDBACK
C18
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3.3K
4.7
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470
GRD
R89
20K
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2,3,4~
R133
+24
180K
R130
9 f-<....--............-AN-....-Q
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R143
470K
FOLLOWER
Q6
R146
4.99K
a
+ 10
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220
R131
Sm
R16S
C37
.047
.033
R206
2
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4.7K
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C30
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R184
470K
C34 T18 .1...+
t
TUIII
RELAY
TACHOME TE R
GENERATOR
t~:;~~~ ~-----------------------------------_,
TACHOMETER
OUTPUT (±S%)
~:~ ::::
, > 14
-24V
~15
-24V
21
- 10 v
s. 13 ~--.:...~-...:~-----~----N\------'
-24
-24
2.7K
R16 7
6.8K
CAP STAN MO TO R
+24
!
R179
- 24 V
L---------------r--------------? 2
R164
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CAPST AN
MOTOR
MJE243
R141
+10
6.8K
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C35
R166
1K
H.
CAP STAN H. S. ~----------......
EMI TTER
....--------------..., 3
R144
8~----------------+_------------------------------------------------CR22
n~5
R140
R139~.;..1~MH~----------v'VV'__t--------_,
10K
CR20
-5
RAMP
Q5
2N3773
-10
R129
3.9M
CR21
INPUT
Q29
MJE253
+10
10K
R90
STAN DAR 0
TACH
I
.1. lOW
R205
2
R125
I
I 47
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R86
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470
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15
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EMITTER
R94
*
+
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240K
6
R93
470K
CR16
R72
....- - _ , . . . .... -5
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CRll
R73
R 180 "'~N--+----.,
220
R174
15K
r~~--------------O
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lK
22
19
R17l
R16S
RIB7
2. 2K, 3W
20
DENOTES FACTORY SELECTED VALUE.
-10
-10
Servo Preamp - Model 9100
Type 6666,
Schematic Diagram
806-5728-100
TYPE 5728 READ PREAMPLIFIER
CIRCUIT DESCRIPTION
This module contains nine identical high gain amplifiers which amplify the input signal from the read
head and supply it to the read amplifier cards. Each
amplifier stage consists of two operational amplifiers
with negative feedback loops. Overall gain of each
amplifier stage is controlled by its variable potentiqmeter, R7. It should be adjusted for 8 vdc (p-p)
at the output.
301-5728-0018
C1
3
C5
10
C3
.047
l!
R1
lOOK
9
R2
C2
220
100
R5
220
C6
15
+,..... C4
...L
< :C,___
2
23
10
CHAN 3
---I
9_I_D_EN_:_:_:'_',_5_'(·_:_:_NE_L_S_ _ _ _ _
<:4 ~
<2;:C
< :~
< :~
1
IY
'"AN. 6(2)
I
,. . ,(.)
Y
) 7
) 6
TO RE AD
Af.1PLI FIERS
) 5
l----.iIy~4)
4
---Il--y
.....
-4) 3
_ _ _•_ _ _ _C_HA_N_._P(_C_)_ _ _ _ _ _ _
< :~L___
<:
) 8
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,""'(8)
<:: ~L
y
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C_HAN._1- _ - - - - . . J
_ _
:c,_CHAN.O_-------J1
y
2
) 1
GRD ~(-----------------------~----------~l~------------~) 15
+10
~(----------.----------------------------------~) 13
-?
--------~.,-
14
...~'~.---
NOTE: FOR CIRCUIT CONVENTIONS USED,
SEE NOTES TO SCHEHA'TIC SECTION.
DASH NO.
HEAD
-001
-002
STANDARD FERRITE
-003
7 TRK
Rl
.lOOK
1. 5K
lOOK
R6
3.3K
3.3K
L 8K
Read Preamp-Model 9700,
TYPE 5728,
Schematic Diagram
806-6385-1008
TYPE 6385 QUAD READ AMPLIFIER
CIRCUIT DESCRIPTION
This module contains four identical read amplifiers
which detect, filter and digitize both 800 cpi NRZI
and 1600 cpi PE read data. Two of the boards are
employed in dual density transports to process the
eight read data channels. The read amplifier for
channel P is located on the Dual Density P Channel
Clipping PC board. The operation of read amplifier
C'hannel A is explained below; the other read
amplifiers operate identically.
N RZI Operation
Analog read data from the read preamplifier is input
at pin E as SIG. Part of the signal is differentiated
by resistor R2 and capacitor CI, then applied to the
NRZI peak detectors IClO-9 and ICIO-5. Part of the
SIG input remains undifferentiated and is applied to
the positive and negative clipper comparators at IC59 and IC5-5.
Note that the output of all these
comparators will be positive, since negative signal
excursions are inverted at the comparator inputs.
The peak of the differentiated signal waveform
exhibits a 90 degree phase advance with respect to
the peak of the undifferentiated signal waveform at
the clipper comparator outputs.
This phase
difference defines the length of the negative-going
clock pulse applied to the NRZI read register, J-K
flip-flop JC6.
During positive signal excursions, IClO-7 and IC10-12
go high, causing IC15-8 to g'o low. To eliminate
spurious noise pulses, capacitor C6 delays the read
signal.
When the differentiated signal at IClO-9
passes the Ov reference point, IC15-8 goes high to
eliminate spurious noise pulses. Capacitor C6 delays
the signal slightly. Since this delay is a function of
tape speed, the value of C6 varies accordingly. (See
table on schematic.)
The low output pulse f['om inverter IC 19-2 clocks
NRZJ Read Register IC6. The Q output at IC6-3
goes high, enabling NAND gate Je1 at pin 4. (NRZJ
signal at IC 1-5 input remains true as long as the
transpor't is selected, the tape is past load point and
BUSY is false.)
The low tr'lIe digitized NRZI read
data is output to the interface fr'om pin Z.
When the N RZI read register is set, its Q/ output goes
low, causing a low true DATA IN REGISTER/ pulse to
be output to the Dual Density Control board. After
an appropriate interval, a Reset Read Register
(R ESETR/) pulse will be clear the NRZI Read
Register, making DATA IN REG/ fHlse until the next
NRZI read data bit is applied to the Read Register's
clock input.
RESETR also pulses true to clear the NRZI Read
Register when: LOAD POINT goes true, BUSY goes
true, high density recording (PE mode) is selected, or
the tape transport is deselected.
Incidentally, positive or negative NRZI excursions
must exceed their respective clipping thresholds Ht
ICIO-IO and ICIO-4. The purpose of the clipping
levels' is to eliminate spurious baseline noise pulses,
requiring the analog signal supplied from the read
preamplifier to exceed a certain amplitude before it
is detected by the read amplifier stages. Different
clipping levels are used during different modes of
operation. The clipping level during a read only NRZI
mod~ is 20 percent of the maximum peHk-to-peak
signal.
During a read-after-write operation the
clipping levels are raised to 33 percent of the
maximum signal.
During the interrecord gap the
clipping levels are raised 7 percent higher than their
values during the data block to reduce the probability
of detecting random noise. When an error is detected
in a read only mode and the transport is commanded
to backspace over the erroneous block and reread it,
the clipping levels are switched automHticHlly to
maximize the recoverability of marginally recorded
data.
First, the clipping levels are lowered to
recover possible partial dropouts, and if the err'or is
still detected the clipping levels are raised to
eliminate possible high baseline noise spikes.
PE Oper'ation
When High Density Status (lIDS) true is output fr'om
the controller, PE true is generated on the Dual
Density Control board and input on the Quad RCHd
Amplifier at pin L. NRZI signal goes false, disabling
the Q output of NRZI reHd register IC6 at NAND gate
ICl-5.
To conform to the PE format, only positive PE r'ead
data excursions will be peak and threshold detected
during H PE read forwar'd operation. To aceomplish
this, AND gates IC15-9 is disabled by low signal ('r'om
NOR gate IC21-t to disable negative signal
processing. Si multaneously, IC 15-2 is enabled to pass
any positive-going PE ['('ad daUt.
During a read
rever'se PE operHtion, PE RVS goes tr'ue, erHlbling' the
negative t['ansition processing gates and disabling tile
posi ti ve ones.
Note that the PE signal path to the DATA output now
passes through NAND gate lCl-3.
This gate is
enabled at pin 1 because inverter IC 19-2 goes high
during each PE read data transition.
401 - fi 385 ·001 1 H
+5
I
NRZI
U <:
- - - -
- - -
-
.
s!:;
E
TIl
SEE TABU'
<
T~~tE
•
R3
~
+5
-~~I~__+-__~----~~~
J ~7Tt-lf~=:::::;:::t~~gl~5::::)~=-I=-=~=1~8=~-------:...,~
_
I
10
C2'....____...:I:.....j.:.l.:(O-j ......."
/I
~ k 4~ 6
4
-------------------------------------------------,
•
f-______~--_e~c'll~~__-.~~__~r-.-~9~:-,
(CHAN A)
•
R4
JK
-:-10- -
1
+5
I
I
1
"'"'""
I
I
h!:!.D1
5
l
+5
+5
R7
lK
R6
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10
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9
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L...----:L:........;_~...
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15
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:J +_+-___
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20 6
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l5
R ~/--"'4"'70......~:.-.....+_----------+_--....:4!......j.......
TAB~~
I
L..
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F(
R15
TAB L E
CQ::: I'
470 SE'E
R15
TABLE
4.7K ~
9;:: -
470
R18
R19
I
9
4
L-
+5
I
k!:1l.!2..
I
R20
I
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R21
1K
.~-:-+-
14
7
14
S64
9_
SEE
TABLE .L..
C10J_
(CHAN C)
SIG
1 3 _ 11
T+
.J...C12
R26
20 K
12111
---
I
-------1
(CHANNELS C&D IDENTICAL TO
CHANNELS A&B.
COMPONENTS
COMMON TO CHANNELS A&B HAVE
SERIES lXX DESIGNATORS.)
I
1-1------------4) X
I
1ell
--
Ie 12
_
-- -
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CHAN C)
-- -
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---I
I
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ICll
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I C17
- - - - - 4 ) W D'ATi ~CH AN
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8
~,----------------------------------------------~~~------~~-~-...:~;--i22-11':x>
10
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5
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GRD C ~(--...
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....-....,:~
C16~ _ ~
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--
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B~(--T+_--_+5 D (
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DATA
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1
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__
10
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3 _19 4
-------- 1------------I C13
I
PE RVS
L2
-10
H~(----I
PEL
SEE TAB L E
~
r---------- -- - --
SIG
I
13_
I~-'
~
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(CHAN D)
I
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R25
R24
3.3K
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TABLE
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470
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a-.. . --
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6
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p~~--~~V~~6~----~~--------_4---I~I~oJa""S
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------
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--
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-- -
-004F
12.5
8200
8200
220
470
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68
-005F
18.75
5600
5600
220
330
.033
68
-OOlF
25.0
3900
3900
220
220
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68
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37.5
2700
2700
220
150
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68
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45.0
2200
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120
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68
i. 0I0
68
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75.0
1500
1500
220
75
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125.0
820
820
100
47
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-
-
-
-
-- -- -
Cl,C101 C6,CI06 (2,C102 C5, :105 C7,Cl07 R11,R25,
C8,:08 Cll,Cll C9,)109 C10. C110 C12,C112 R1l1R125
-Q1.
.0056
68
-----
-
- -
-
--- -
~
'----------------------------------------------------4; V "iITSffi
1..---------------------------------------------------------4-;
LAST USED
k
JA TAl NREG
NOT USED
R26
15.0
6800
6800
220
360
75
1500
1500
220
75
I
-471
~;-;;-r~~~-;-r·~~-0--Fll00T..
SEE NOTES TO SCHEMATIC SECTION.
-
IPS
---~ I
-ui 21 13
NOTE: FOR CIRCUIT CONVENTIONS USED,
-
DASH
NO.
12
I - ... _"
-
.039
68
.010
470
.0056
470
1 e2l
L3
Quad Read Amp,
Type 6385,
Schematic Diagram
D)
806-4:365-100
TYPE 4365 DUAL DENSITY CONTROL
CIRCUll DESCRIPTION
This module performs the following control functions:
a.
Generates the read clock, supplies the READ
REGISTER RESET signal to the NRZ1 data
registers, and detects excessive skew
b.
Detects the interrecord gap
c.
Provides the interlocks required for the density selection
d.
Supplies the reference frequencies for the
write test
These operations are described below.
READ CLOCK, REGISTER RESET, AND SKEW
DETECT NETWORK
The read clock and its related functions are performed as a function of a crystal generated master
clock. The clock is produced by a master oscillator
conSisting of crystal Y1, transistors Q1 and Q2, and
capacitor C4, connected in a feedback loop. The
output clock of the oscillator is a square wave with
a frequency equivalent to 64 times the 800 cpi data
rate. (The master frequency is divided by two in
transports with running speeds slower than 25 ips,
by connecting flip-flop IC16 in the network.) The
master clock is supplied to a skew counter consisting of two divide-by-16 counters, IC14 and IC17, ,in
tandem. The counter is preset to one of three counts,
depending on the mode of operation, and then counts
up to its maximum count. During a read mode the
skew count is 29, or approximately 45 percent of the
character time. During a read-after-write mode
the skew count is reduced to 21 (by WRITE READY
activating NAND gate IC5-6), or approximately 33
percent of the character, and during the read test
mode the count is reduced to 8, or approximately 13
percent of the character space. The skew gate is
shortened during the read test mode to enable accurate alignment of the read head with respect to the
tape path using an 800 cpi skewmaster tape.
When the leading channel detects data it supplies
DATA IN REGISTER true at input pin H, setting the
D input of flip-flop IC16 high. The succeeding master
clock pulse clocks IC16 to the set state, the Q output
going high to enable the skew counter to count. When
the counter reaches its maximum count, the CARRY
output of IC14 goes high and sets the D input of the
first IC9 flip-flop high. The next master clock pulse
clocks the flip-flop to the set state, and its q output
goes high to generate the read clock pulse through
NAND gate IC5-3 (Since the 'Q output of the third Ie9
flip-flop is still high). The duration of the read clock
is equivalent to two master clock intervals; the third
master clock toggles rC9-l5 to the set state, its Q
output going low to terminate the output READ CLOCK
pulse. The fourth clock pulse following the completion of the skew count toggles IC9-7 to the set state,
its Q output going high to supply a RESET R FAD
REGISTER RESETR pulse. RESETR clears the NRZ1
data register portions of the read amplifier stages,
setting the DATA IN REGISTER signals of all nine
read amplifier stages false. RESETR is also generated when Signal C goes low. This occurs when
anyone of the following conditions is true: the transport is deselected (SLT1 going false), BUSY goes
true, LOAD POINT goes true, or HIGH DENSITY is
selec,ted. Any of these conditions would clear the
NRZl read teg~sters.
The fourth clockpulse following the skew count completion also sets the input of D type flip-flop ICll
high. On the fifth pulse that flip-flop is toggled to
the set state, tts"Q output going low to enable oneshot IC12 at pin 9. If one of the channels detects an
additional character at this time its DATA IN REG
goes true again, is inverted by ICl-6 and triggers
the skew one-shot IC12 at pin 10. The Q output of
the one-shot supplies a pulse through inverter IC2-6
that is used to illuminate the test panel skew indicator.
GAP DETECTION NETWORK
A l2-character delay is provided between the last
character of the block and the GAP DETECT indication. The gap detection is performed by a network
including flip ... flop ICll, divide-by-16 counter ICI3,
and NAND gate IC7-3. During the data block DATA
IN REGISTEH (a wire-OR'd signal supplied from the
nine read amplifier stages) remains true; it is inverted twice by ICl-6, IC7-6 and keeps counter IC13
cleared until the end of the data block. Following
the last character in the block DATA IN REG goes
high and the direct-clear is removed from ICI3. At
this time the Q ~utput of flip-flop ICII is high, the
flip-flop having been clocked to the clear state when
DATA IN REG first went true at the beginning of the
block. Counter IC13 is then clocked by Ct, an 800
806-4365-200
cpi data rate clock supplied from the clock dividing
network including ICl5 and ICI8. Twelve clock counts
into the gap IC13 activates NAND gate IC7-3 j the
output of the gate goes low and direct-sets flip-flop,
ICil, the Q output ofIC11 going low to lock the cpUnter while the Q output goes high and supplies GAP
DETECT true nt output pin K. GAP DETECT remaihs
true until either the beginning of the next block or
until the transport is deselected (SEL A going false).
at pin Y and HDI true at pin B. If in addition to the
above conditions the 13'OS'Y and the LOAD POINT
lStatus lines are both false, ANb gate lC19-$ is activated, supplying PHASE ENCODED PE true at output
pin J to enable the phase encode,d portions of the data
electronics.
!
WHITE TEST FHEQUENCIES,
,
DENSITY SELECT CIRCUITS
The NRZl 800 cpi mode is selected either when the
transport is selected and on line (SL Tl true, activating OR gate ICI9-3) or when the transport is in
the test mode (TM true at input pin U), provided that
LOAD POINT is false and that HIGH DENSITY SELECTED is also false. If these conditions are satisfied then NAND gate IC3-8 is activated, supplying
NRZI true at output pin M to enable the NRZI portions of the data electronics.
The high density is selected whenever the interface
supplies HIGH DENSITY SELECT HDS true at input
pin A of this card, the transport is selected and on
line (SLTI true), and not in the test mode (TM false).
When these conditions are satisfied NAND gate IC6-3
is activated, supplying HIGH DENSITY true HDENS
.
The reference frequenCies TMX1~nd "TMX2 are 800
cpi data rate square waves, 180 degrees Qutofphase,
used to alternately set and reset the write amplifier
flip-flops to generate the NHZI write test mode all-l
pattern.
These frequencies are generated by the divider network including ICI5 and IC18 counters, which divides
the master oscillator frequency into the data rate
clock Ct. Ct is then gated through two IC5 NAND
gates, with the Qc output of ICI5 used to invert the
phase ,of one frequency with respect to the other.
The two'test frequencies are then gated through the
I C4 NAND gates when the write test mode iss elected,
indicated by both TM and WRITE HEADY being true.
The two frequencies are then output at pins F and E
as TMXI and TMX2 and are supplied to the write
amplifier cards.
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- NPN TR""SISTORS ARE 2N2714
- PHP TRANSISTORS ARE MPSfi5l7
- DIODES AAE lII9l4
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NUMBER II LOGIC SYMBOL IS AEFU(NCE
DESHiHATOR. UNDERLIHED HUM8ER IS IC
TYPE. (IF 7400 SERIES. 74 IS OMITTED)
II: PIli 7 IS CON"ECTED TO GIIOUIO
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Schematic Diagram
401-6771-001A
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0
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Dual P Chan/Clipping,
Type 6367,
Schematic Diagram
H06-4366-100A
DUAL DENSITY WRITI SECTION
CIRCUIT DESCRIPTION
This is a composite schematic of the Type 4366A
Four Channel Write Amplifier and the Type 4368A
Five Channel Write Amplifier. Write channels P,
0, 1, and 2 are processed by the Type 4366A Write
Amplifier, while write channels 3-7 are processed
by the Type 4368A Write Amplifier.
WRITE AMPLIFIEH OPERATION
Each write ampUfi er stage consists of two OR gates,
an input buffer flip-flop, a delay counter, and a pair
of drivers. The operation of the write channel P
amplifier stage is explained; the other stages operate
similarly.
Write data channel P signal from the transport interface is inverted and supplied to the J input of input
buffer flip-flop IC8, as well as one input of OR gate
IC7. Write data is processed differently,' depending
on whether the tape transport is operating in the PE
mode or the NRZI mode.
In the NRZI mode, NRZI high from the Dual Density
Control module is inverted and supplied to one input
of OR gate IC7. During NRZlhigh, this gate Will
pass the NRZ 1 data without invertihg it. Each time
the input NRZI data goes low, both the J and K inp~tt:;
of the input buffer flip-flop are set high. The WRITE
DATA STROBE (WDS) from the interface now toggles
the input buffer flip-flop to the opposite state. Thus
for each 1 input, a polarity transition is recorded On
tape. When the input data is high, containing a logic
0, the J and K inputs of the buffer flip-flop are set
low. Thus the flip-flop does not change states when
clocked by the WRITE DATA STROBE.
In the PE mode, NRZI false is inverted, causihg
OR gate IC7 to become an inverter. Now the input
buffer flip-flop stores the input logic states whenever
clocked by the phase encoded 3200 fci WRITE DATA
STROBE. In the PE mode the data lines are already
encoded in the formatter.
The input buffer flip-flop will store the data until
the delay counter of the respective stage reaches its
maximum count. The delay counter of each stage
digitally deskews the write data, using channel P as
a fixed reference. Although the delay counter of
; channel P is permanently preset to the cOWlt of 8,
the counters of write data channels 0-7 can be preset
to any count, using switches to either ground or open
their parallel inputs. Thes~ delay counters are
clocked by a reference frequency (Cx) at approximately 80 times the 800 cpi data rate, 40 times the
1600 cpi data rate, or 20 times the fei rate. Generated by ,an oscillator circuit, this clock advances
each delay, 'counter from the preset cOWlt until it
reaches the maximum count of 16. At this point the
Qd output of the delay cOWlter will clock the respective
output register flip-flop. This transfers data from
the input buffer to the output of the amplifier stage,
where a pair of drivers energizes the respective
head winding.
Write data deskewing is performed by manually adjusting the switches of one channel at a time until
the output of that channel, as displayed on an oscilloscope connected to the Read Preamplifier module,
coincides with channel P. The write deskewing compensates for the physical displacement of the channels
with respect to each other on the write head. The
write deskewing procedure does not correct for the
misalignment of the head with respect to the tape
path. The delay cbuhter switches are preset in the
factory and normally their positions should not be
changed unless the write head has to be replaced. In
that case the new factory supplied head is provided
wi th a tag showing the new delay counter switch positions, as required to compensate for the new head's
characteristics. Should readjustment become nec'essary, follow the write deskeWing procedure outlined
in the mai~tenance section of this manual.
WRITE TEST MODE
When'the transport is in the write test mode, input
trequenci~s;, TMXl and TMX2 from the Dual Density
Control module alternately set and reset the input
data buffer flip-flops of each write amplifier stage,
generating the required NRZI all-l test pattern on
the tape. TMX2 true pulse also fires one-shot IC5.
This disables WRITE AMPLIFIER RESET (WARS)
from the interface, permitting the tape to be written
on during the test mode without disconnecting the
Model 9100 from the interface.
TYPE 4368A AMPLIFIER OPERA TION
The operation of these write amplifiers is identical
to that of the Type 4366A Four Channel Write Amplifier module described above.
806-9100-1-00
DUAL DENSITY WRITE SECTION
CIRCUIT DESCRIPTION
This is a composite schematic of the Type 5366
Four Channel Write Amplifier and the Type 5368
Five ChalUlel Write Amplifier. Write channels P,
0, 1, and 2 are processed by the Type 5366 Write
Amplifier, while write channels 3-7 are processed
by the Type 5368 Write Amplifier.
WRITE AMPLIFIER OPERATION
Each write amplifier stage consists of two OR gates,
an input buffer flip-flop, a delay counter, and a pair
of drivers. The operation of the write channel P
amplifier stage is explained; the other stages operate
similarly.
Write data channel P signal from the transport interface is inverted and supplied to the J input of input
buffer flip-flop IC8, as well as one input of OR gate
IC7. Write data is processed differently, depending
on whether the tape transport is operating in the PE
mode or the NRZ1 mode.
Ih the NRZ1 mode, NRZ1 high from the Dual Dertsity
Control module is inverted and supplied to one input
of OR gate IC7. During NRZ1 high, this gate will
pass the NRZ 1 data without inverting it. Each time
the input NRZ1 data goes low, both the J and K'inputs
of the input buffer flip-flop are set high. The WRItE
DATA STROBE (WDS) from the interface now toggles.
the input buffer flip-flop to the opposite state. Thus
for each 1 input, a polarity transition is tecorded on
tape. When the irtput data is high, containing a logic
0, the J and K inputs of the buffer flip-flop ar:e Bet
lowo· Thus the flip-flop does not change states when
clocked by the WRITE DATA STROBE.
In the PE mode, NHZ1 false" is inverted, causing
OR gate IC7 to become an inverter. Now the input
buffer flip-flop stores the input logic states whenever
clocked by the phase encoded 3200 fci WRITE DATA
STROBE. In the PE mode the data lines are already
encoded in the formatter.
The input buffer flip-flop will store the data until
the delay counter of the respective stage reaches its
maximum count. The delay counter of each stage
digitally deskews the write data, using channel P as
a fixed reference. Although the delay counter of
channel P is permanently preset to the count of· 8,
the counters of write data channels 0-7 can be preset
to any count, using switches to either ground or open
their parallel inputs. These delay counters are
clocked by a reference frequency (Cx) at approximately 80 times the 800 cpi data rate, 40 times the
1600 cpi data rate, or 20 times the fci rate. Generated by an oscillator circuit, this clock advances
each delay counter from the preset count until it
reaches the maximum count of 16. At this point the
Qd output of the delay counter will clock the respective
output register flip-flop. This transfers data from
the input buffer to the output of the amplifier stage,
where a pair of drivers energizes the respective
head winding.
Write data deskewing is performed by manually adjusting the switches of one channel at a time until
the output of that channel, as displayed on an oscilloscope connected to the Read Preamplifier module,
coincides with channel P. The write deskewing compensates for the physical displacement of the channels
with respec,t to each other on the write head. The
write deskewing procedure cibes hot correct for the
misalignment of the head, with respect to the tape
path. The delay counter switches are preset in the
factqry and normally their positions should not be
changed unless the write head has to be replaced. In
that case the neW factory supplied head is provided
with a tag showing the new delay counter switch position~. as required to compensate for the new head's
characteristics. Should readjustment become necessary; follow the write deskewing procedure out! ined
in the maintenance section of this manual.
BEAD CURRENT REFERENCE
In the NRZ1 mode, both pairs of drivers are actuated
to paSs full write current to the head. Ih the PE
mode, IC17 and IC19 are disabled by NRZ2 false.
Only IC18 and IC20 are enabled, which decreases
write current to the proper level for PE operation.
WRITE TEST MODE
When the transport is in the write test mode, input
frequencies TMX1 and TMX2 from the Dual Density
Control module alternately set and reset the input
data buffer flip-flops of each write amplifier stage,
generating the required NRZ1 all-1 test pattern on
806-9100-2-00
the tape. TMX2 true pulse alsb fires one-shot Ie5.
This disables WRITE AMPLIFIER HESET (WARS)
from the interface, permitting the tape to be written
on during the test mode without disconnecting the
Model 9300 from the interface.
TYPE 5368 AMPLIFIER OPERATION
The operation of these write amplifiers is identical
to that of the Type 5366 FOllt' Channel Write Amplifier module described above •..
r----------
r-------------4-CHANNEL WRITE AMPLIFIER - - - - - - - - - - - - . . ,
5366
5-CHANNEL WRITE AMPLIFIER-----------,
5368
401-9300-002 H
HEAD DR.
FROM
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GENERAL INFORMATION AND APPENDIX
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DIGITAL RECORDING ON MAGNETIC TAPE USING NRZ1 CONVENTIONS AND FORMAT
bad area of tape found on re-read and allows thehead
current to be turned on again in a known direction
without causing unwanted spikes.
1.1 INTRODUCTION
There are many recording techniques that may be
employed to record digital information onto magnetic
tape. Some of these are: non-return-to-zero (NRZ),
return-to-zero, phase-encoded, Manchester coding,
and NRZ1. Of these methods the NRZ1, non-returnto-zero change at logic 1, has been most widely accepted for recording' parallel data onto multitrack
recorders. This method has been used by IBM and
other computer manufacturers for many years, and
packing denSities, formats, and mechanical dimensions have been fairly well standardized by usage
throughout the industry.
Another advantage of the NRZ1 system is that the
electronics for writing and reading are simpler than
those required for other recording techniques, such
as phase encoding.
A disadvantage of the NRZ1 system is that it is not
self-clocking and is useful only where multiple track
recording is employed. A further restriction is that
in order to derive a clock from the multiple tracks,
at least one of the tracks must have a one in it for
each byte or character recorded. This last factor
is ensured when a parity check is employed and the
parity is odd. If even parity is used, then of course
the all-zero character must be declared invalid and
not used during the block.
1. 1. 1 IBM COMPATIBLE
The term IBM compatible, or more specifically IBM
compatible 2400 series, is found frequently in specifications of tape units manufactured by companies
other than IBM. This means that a tape written on a
machine that is IBM compatible can be successfully
entered into an IBM computer utilizing the IBM 2400
series of magnetic tape units. The converse, of
course, is also true. Tapes written on an IBM 2400
can be read on IBM compatible tape units equipped
with the read function.
1.2 WRITING NRZ1 TAPES
To record digital data on magnetic tape, it is necessary to magnetize the tape discretely to indicate binary ones and zeros. In the NRZ1 method, current
is flowing in the head at all times the magnetic tape
unit is in the write mode. As long as the head current does not change, the data will be written such
that it will be interpreted as zeros. When a transition occurs between saturation magnetism (plus and
minus) on the tape, this will be interpreted as a one.
Figure 1-,1 shows typical waveforms for data recorded
on tape in the pattern 011010. The data is entered
together with write clocks as shown, with a write
clock for each bit recorded. With tape in continuous
motion, a flux pattern corresponding to the tape magnetization will appear on the tape as shown.
This common denominator between systems is important, for often it is the only common point between
computer systems and data acquisition systems. The
parameters that ensure this compatibility relate to
track width, number of tracks, position of the tracks
on the width of the tape, form of check characters,
spacing of check characters from data, length of
interblock gaps, length of file gaps, and the character used to identify a file gap, as well as the mechanical dimensions of reels and hubs. This note describes these factors for the IBM compatible NRZ1
method of recording.
NRZI recording is implemented by driving current
through the head winding in a direction determined
by a flip-flop that toggles for each one, gated in by
coincidence between data and a write clock.
1.1.2 ADVANTAGES OF NRZ1 RECORDING
METHOD
In the NRZ1 method of recording, current is flowing
in one direction in the magnetic head at all times it
is writing. This factor makes it possible to record
over old data, erasing the old data as the recording
is taking place. Head current also flows in a uniform
direction during the interrecord gap. This is useful
when it is necessary to rewrite a record or skip a
1.3 READING NRZ1 RECORDINGS
To recover the data written in NRZ1 format, the
tape is moved at a constant velocity past the gap in
the head. Refer to Figure 1-2. If the same pattern
shown above is present on the tape, the head voltage
A-I
706-9000-2-00
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210-2012
Figure 7-1
NRZ7 Waveforms - Writing
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210-2011
Figure 7-2.
NRZ7 Waveforms - Reading
A-2
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706-9000-3-00
assure compatibility with other magnetic tape units.
These adjustments take the following form.
will look like the playback signal since the voltage
induced in the head is the differential of the flux pattern on the tape. The characteristic half sine wave
results from the fact that the gap on the head has a
finite width.
1. 3.1.1 Read Head Alignment
The read head is adjusted so that its gaps are perpendicular to the direction of tape motion using an
IBM skewmaster tape. A mechanical adjustment is
provided consisting of a spring loaded mounting plate
working against a fine pitch adjusting screw. (On
incremental and some low density machines this adjustment is either not required or is made by shimming tape guides. )
The pattern shown is typical of what would be seen
with 200 bits per inch (bpi) recording. As the recording density increases, the mechanical dimensions of the head remain the same, resulting in the
same waveform but with the individual waves crowded
close together. This ultimately presents a limit beyond which this type of recording is useful with stateof-the-art tapes and magnetic heads. Recording of
800 bpi seems to be a practical limit and is the maximum density utilized in present-day systems.
1.3. 1.2 Read Electronic Deskew Register
All Kennedy read amplifiers are provided with a deskewing register. This register allows a total skew
of 50 percent for all reasons including write head gap
scatter, dynamic read skew, read head misalignments
and speed variation in writing or reading.
The playback Signal is then rectified and, as can be
seen from the figures, a pulse is present for every
one recorded and the base line remains stationary
for all zeros recorded. Note, however, that it is not
practical to derive an accurate clock from the signal
on the basis of a Single-track recording. However,
since this is a multiple track system and employs a
parity generator, a data bit will be found on one of
the multiple tracks for each character written, assuming that an all-zeros character is not employed
in conjunction with even parity.
1. 3.1. 3 Write Electronic Deskewing (continuous tape
units only)
The mechanical relationship between the read gap and
the write gap is fixed in any given read after write
head. Since the read head is adjusted perpendicular
to tape motion (paragraph 1. 3.1. 1), the write time
for each channel may be delayed selectively so that a
character is written on the tape perpendicular to tape
motion. In Kennedy continuous tape units a fixed delay is inserted for one channel and individual delays
are provided for the remaining channels. This arrangement allows each channel to be adjusted in exact
relationship to the fixed channel and allows adjustment for skew and gap scatter as well.
Considering the above factors, a typical read amplifier consists of an analog amplifier, a rectifier, a
peak detector, suitable logic to create a clock, and
an output buffer stage to enable interfaCing to the
customer's unit.
1. 3.1 SKEW AND GAP SCATTER
Another major factor that limits the design of an
NRZ 1 multiple track system is that heads are not
perfect because of gap scatter and head mounting to
decks is not perfect causing skew. Both these factors have the same effect in that the signals from all
the tracks do not occur perfectly in unison. The
problem is minimal if the same head and deck are
used for reading and writing a given tape, but since
interchangeability of tapes between machines is mandatory provisions must be made to cancel out these
effects. The allowable tolerances in head manufacture have practical limits and are typically in the
±50 microinch region for high quality heads. Fixed
heads without adjustment are practical with 200 bpi
and 556 bpi recording, but 800 bpi recording requires
adjustments.
1.4 TAPE FORMATS
There are other factors that affect compatibility in
addition to density and recording method:
a. Tape markers
b. Gaps
c. Check characters
d. Codes
1. 4.1 TAPE MARKERS
When recording on magnetic tape, care must be taken
to avoid phYSical handling and damage to the recorded
surface. Aportion of tape- at leastl0feet- at each
end is reserved for threading and loading and is not
used for storing data. To define the recorded area,
pressure sensitive reflective markers are applied to
the nonoxide side of the tape as shown in Figure 1-3.
All Kennedy recorders are equipped with the necessary deskewing adjustment to enable operation and
A-3
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ON UNDERSIDE OR OXIDE SIDE OF MAGNETIC TAPE.
Figure 1-3.
Tape Markers
1. 4. 2. 1 Beginning of Tape Gap
These markers are sensed optically and define the
recorded area in a standardized manner.
An erased section of tape is required surrounding
the BOT marker. This serves as a defined area
within which data recording or reading can start. To
comply with IBM speCifications this section extends
a minimum of 1. 7 inches ahead of the trailing edge
of the BOT marker and extends a minimum of 0.5
inch past the trailing edge of the BOT marker. In
nearly all systems (including IBM) this erased section totals about 3. 5 inches (Figure 1- 3).
The BOT marker signal is used internally to define
the load point or starting of recording. The EOT
marker Signal is not used internally but is available
to the interface as an end of tape warning signal and
should be used by the unit interfaced to the magnetic
units to terminate recording within the next 4 feet of
tape.
1.4.2 GAPS
1. 4. 2. 2 Interrecord Gaps
Tape reading can only take place reliably when tape
is moving at a known speed across the head. To allow tape to start and stopwhile the computer manipulates data, a section of tape with no data is provided
between records or blocks of data and at the beginning and end of tape. This section is recorded with
the head current turned on in the direction defined
as erased and results in a constant flux in a predetermined direction which is independent of tape
speed or motion. The direction of current in the
heads defining the erased condition is also controlled
to be uniform in all recorders. On readback this
flux is constant as the tape accelerates and decelerates. Since a change in flux is required for the read
head to sense data, no Signal occurs and orderly
starts and stops may be made.
Interrecord gaps are areas, without data, placed between data blocks or records as shown in Figure 1-4.
The length of the gap is O. 75 inch minimum for seventrack sy stems and O. 60 inch minimum for nine- track
DATA
RECORD
LRCC
CRCC
.....----- ONE
Mechanical limitations preclude instantaneous starts
and stops, and a distance of tape must be reserved,
conditioned by the requirements of the "worst case"
machines, to use the standards. While high speed
units (IBM 2400 series) set the length of the gaps,
Kennedy recorders utilize the full gap length to advantage by providing controlled acceleration and deceleration, resulting in minimum stresses to the tape.
,10- 5002
Figure 1-4.
A-4
Interrecord Gaps
1'?
706-9000-5-00
systems. The maximum length is not critical. The
USA Standard Institute specifies the maximum length
at 25 feet.
The check characters define to a very high level of
confidence that a block that is read is accurate.
1. 4.3.1 Vertical Parity
If records are short it can be seen that a large portion of the tape is used for interrecord gaps. In many
cases computers are programmed to handle records
in batches as shown in Figure 1-4. In this case the
IRG and check characters are inserted on a block
basis.
Seven-track and nine-track systems use six and eight
tracks respectively for recording data. The remaining track is redundant and carries the parity information. When the data is written on tape, a parity
generator senses the input data and determines if the
number of bits in the byte is odd or even. It outputs
a "1" or a "0" to the redundant track to make the
count odd if odd parity is selected, or even if even
parity is selected.
Figure 1·-5 shows the format of the file mark for sevenand nine-track tapes. The distinguishing feature of
the block is the fact that it is a single specific character record with a check character. The erased
gap itself is nearly always used but IBM standards
state that it is optional.
On readback a similar circuit can be used to count
the number of bits in each byte and determine if the
count is odd or even. Depending on which is defined
as correct, it signals the error line if the count is
wrong. Thus each byte is checked. However, if an
even number of bits is dropped the test will not result in an error signal, so an additional check called
longitudinal parity is employed.
1. 4. 3 CHECK CHARACTERS
The NRZ 1 format provides for both vertical and horizontal parity checks. In the nine-track system an
additional check called the cyclic redundancy check
character is used. Refer to Figures 1-6 and 1-7 for
the location of the check characters.
Odd or even parity may be selected on seven-track
recorders. Nine-track recorders are always odd
parity.
SEVEN-TRACK NRZI FILE MARK
NINE-TRACK NRZI FILE MARK
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I
I
I
I
I
I
I
~I
(
)
I
I~FOUR BYTE SPACES
CHECK CHARACTER(S)
/
EOF GAP
IRG
~
(
I
8
4
2
c
)
\--- EIGHT BYTE SPACES
I II
\
)
FILE MARK
BLOCK
C
B
A
4
6
3.75 IN.
(NINE-TRACK)
3.90 IN
(SEVEN-TRACK)
I
BLOCK
1--
TAPE MOTION
TAPE VIEWED FROM TOP. RECORDING IS DONE
ON UNDERSIDE OR OXIDE SIDE OF MAGNETIC
TAPE. ONE OR MORE FILE MARKS MAY OCCUR
ON ONE REEL OF TAPE.
110·0001
Figure 1-5.
NRZ7 File Marks
A-5
I
IRG
t
1
706-9000-6-00
~
RECORD
~
INTERREC____ ORO GAP
~
+0.156
0.750_0.063
(NOTE 2) -fI-. DATA BYTES ...-
I
III
III
III
III
III
I
I
I
I
I
I
III
III
III C
III
B
III A
III
III
III
III
III
PARITY
(ODD OR
EVEN)
}
}
8
III 4
III 2
I
l't --i
B~e~Ee
I CE
1..-
LRC
NOTES:
a
~I
III 1
REFERENCE EDGE
-
I
III
III
t
TAPE MOTION
I
",...I
)
IN IT IAL GAP
0.5 IN. MIN
(NOTE 2)
1. TAPE IS SHOWN WITH OXIDE SIDE DOWN. NRZ1 RECORDING.
BIT PRODUCED BY REVERSAL OF FLUX POLARITY.
2. TAPE TO BE FULLY SATURATED IN THE ERASED DIRECTION
IN THE INITIAL GAP AND THE INTERRECORD GAP. ERASURE
SUCH THAT A NORTH SEEKING END OF COMPASS WILL POINT
TO START OF TAPE.
3. LRC (LONGITUDINAL REDUNDANCY CHECK CHARACTER) ODD OR
EVEN-SPACED FOUR BITS FROM DATA CHARACTER.
4. PARITY BIT (A VERTICAL PARITY BIT IS WRITTEN FOR
EACH BYTE).
110-0017
Figure 1-6.
Data Format - Seven Track
INTERRECORD ~
GAP
+0.15
0.6 -O.lOIN.
--'-
III
III
I
I
I
I
III
III
III
FIRST~I--~~--I'"
BIT
I :
I :
I
~
I
I III
I III
I III
I III
I I III
III
III
~rl-I-I__ ~~!.!.
7---'"
__ - - - -
...........+-i--_""'!'I..6- -
...
...
DATA
BYTES
I I III
I I III
I I III
III
I
110-0011
~
~--~----~~---
LAS T --tf----1'"
BIT
NOTE:
.... RECORD ....
--
ACTUAL SKEW
.. WRITE SKEW
.. CHARACTER GATE
REFERENCE EDGE
LRC
TAPE MOTION
-III-
III
III
III
III
PARITY
III ............. (ODD)
III
(NOTE 3)
III
III
III
I LP MARKER'
CRC
t
_III__
INITIAL GAP
0.5 IN. MIN
1. eRC (CYCLIC REDUNDANCY CHECK CHARACTER). PARITY OF CRC CHARACTER IS
DETERMINED BY THE NUMBER OF DATA CHARACTERS IN RECORD. ODD NUMBER OF
DATA CHARACTERS-EVEN CRC CHARACTER. ETC. CRC USED ONLY IN IBM SYSTEM
SYSTEM/360 800BPI. CRC CHARACTER SPACED FOUR BITS FROM DATA CHARACTERS.
2. LRC (LONGITUDINAL REDUNDANCY CHARACTER) ALWAYS ODD PARITY. SPACED FOUR
BITS FROM CRC.
3. PARITY BIT (A VERTICAL PARITY BIT IS WRITTEN FOR EACH CHARACTER CONTAINING
AN EVEN NUMBER OF BITS).
Figure 1-7.
Data Format - Nine Track
A-6
706-9000-7-00
1.4.3.2 Longitudinal Parity
"BCD 0 to 10" option which is available for most
Kennedy recorders. This senses the 000000 character on the data lines in conjunction with a write clock
and converts it internally to record the IBM character
for the number 0 (001010).
A longitudinal redundancy check character is written
at the end of each block. It is separated from the
end of each block as shown in Figure 1-8. This character is made up on a per-track basis. The number
of l' s recorded in a given track of a block is counted
and a "I" is written in the track as the LRCC if the
count was odd, and, therefore, the number of l' s recorded in each track becomes even for any given
block. On readback this is checked and an error is
detected if the count is odd in any track. The possibHity of not detecting an erroneous block still exists
if an even number of bits in a given track of a block
is dropped. However, when this test is combined
with the vertical parity test the probability of not detecting an error is reduced.
1. 4.4 SUMMARY OF FORMAT
A summary of the above factors is shown in Figure
1-6 for seven-track data format and Figure 1-7 for
nine-track data format Record blocks and tape
markers are shown in Figure 1-10.
1. 4.5 REFERENCES
Additional inf0rmation may be found in the following
publications:
1. 4. 3. 3 Cyclic Redundancy Check Character (CRCC)
a. IBM 2400- Series Magnetic Tape Units Original Equipment Manufacturers' Information, IBM
Form 226862-4
In the nine-track system another check character
must be written. This character is derived with relatively complex logiC, the result of which, in combination with the LRCC and vertical parity information,
enables a computer to determinE: in which track a
dropout occurred. If the dropout occurred in only
one track in the' given block, the computer can then
nullify that track and generate the information in that
track from the data in the remaining tracks, which
includes the parity track.
b. USA Standard Recorded Magnetic Tape for
Information Interchange (800 cpi, NRZ1), United
States of America Standards Institute, 10 East 40th
Street, New York 10016
CRCC
BYTE
LRCC
BYTE
This check character follows the last data byte by
four cell positions, as shown in Figure 1-8.
1. 4. 3. 4 !Codes
DATA
) BLOCK
)
The recorder will accept and read back any code set
applied (six-bit for seven-track, eight-bit for ninetrack). The only restriction is that the 000000 character in a seven-track system using even parity must
not be used. This is a blank position or missing
character, and most IBM systems will register an
error condition if it is found in a block.
I
\,
c
IRG
:
0 . 15
o. 60+-0.10
:
l
:,
,,
I
:
EIGHT BYTE ___ Ill 3
POSITIONS
LRCC
BYTE
,
III
3
r-
,,
SEVEN-TRACK
DATA BLOCK
I
I
I
I
I
FOUR BYTE-+lll 3
POSITIONS
I.-
510- 5003
In the seven-track system the 000000 character may
be converted to the 001010 character by use of the
Figure 1-8.
A-7
~
~
\
TAPE MOTION ~
.,
"
IRG
DATA
0 . 156
\BLOCK o. 750+- 0.063
Two code sets are shown in Figure 1-9. These are
the graphic symbols portion of the codes used by IBM
for nine-track and seven-track systems. They are
shown for reference only. Systems may use different code structures when they are programmed for
them.
NINE-TRACK
DATA BLOCK
,
Check Characters
\
706-9000-8-00
GRAPHICS
OLLATING
EQUENCE
00
....-
--~----.---
BCD
0
1
2
3
4
5
6
7
B
A
8
4
2
1
blank
--
blank
1
1
0
0
0
0
1
1
1
0
1
0
1
0
1
0
0
0
1
S
0
0
1
1
0
1
0
0
1
1
1
0
1
1
0
1
0
0
1
1
0
1
0
0
1
1
0
0
1
0
0
1
1
0
1
0
0
1
1
1
0
0
1
S
*
0
0
0
0
0
0
1
1
0
0
GM
8-+
0
0
0
0
0
0
0
0
0
0
0
0
1
0
GM
8-
0
0
0
0
0
0
0
0
0
0
0
0
-.- .-
~~=-02--~~~-=- __L __
.__ Ql __._. .____
__ __ ._____ _._---+
It)
_ _ _ _ .u·"
J2.~
-_. 05
___. 06 _ _.__
07
.
-·~ 9?_==~
[
<
*
._.!!L_ . ._ _ ____ L ..
-'--rr _._~
]
,
,
--
.... ...........
-"Me-
. ___ ·__ ,_" __ ··_H..··
--.
--~-""----
0')
~ .f ., ______ ._ ·_u ..
_ ._. ____
~_
MC
f---7·.---- -]-
0
1
1
1
I
1
1
I
1
1
1
1
1
1
1
0
-- _._~~--_.- --- - ....
1
0
14
,
-- . -- ~ ----.l.? __________
I
% -- - :~r_
1
0
__0__
1
16
w.~
- ---'-.. ---~---.- __ 0 --1.
I
I
.Il
___. __ ._ ~-=-[~:~.- -_.\._-1
1
SM
0
SM
18_._ ...._------ --.---.
----0.._._._--_." ... ......
f,
1
1
~
0
19
20
--.----- ...
--,--;
1
1
0
'21----.----.. 1
1
~.~-:@ .
-=-~-='-- 0
.- ..
,--.-....
1
1
___
._L
__
:
0
22
---.1
1
0
23
>
-T"M-- - TM
0
1
1
~ _~~14-- .~===:_
1
1
0
_.2?_ ...... ______. =:~.Q_- ~~ _6
1
A
1
0
- lp __._.___ __ A
1
1
B .......
B
0
_.. 27
-- .
-1
c
0
}~
~_~I
-.--D
_1._ ..J_ _0_
... 29
1
E
E
I
~30
0
----- - . .----F----·1
1
31
0
_. __ ..-F ...... 1--1
1
0
32
G_--'-- -"'G--.... _.....__._.- .. _._._ ...
"T-- 1
____li. _.__ -_.
H
0
...- -.'--"'- .. - -._,,-1
1
I
I
0
34
.. _._-- .._- '----:=---- i - - - = - 1
0
____ J..?_____ ....
0
-- r---Q...-- I- 1
1
1
0
J
J
36
-- ---- . -- -.-.--1-K
K
1
1
0
37 .._--- --- _.._._._.l
1
1
L
38 - _._-_ .. 0
.--......
M----r-- M
1
1
0
--_.-39_ .. _----I
N
N
1
0
_. 40............. ._----41 .. - -_._-....- :=--b~_= ~=Q~~~-~ ~=-T=_ 1
0
._._----_._
p
1
P
1
42
0
_.._--_. -0-'--0
1
1
43
0
·-·-44------- R
--R"----' -.
1
0
-_._-- -- 11
.-----...---..--.- -RM"---'RM
1
1
45
· - .. ---..............--- .__._--- - - - - ---1
1
1
46
-----_._--_
..- _._--- --.~-47
T
T
1
1
1
· ------.-.----1
1
1
48
U
U
-----.------'---y-- V
49
1
1
1
--- . ---------.-----... w
1
W
1
1
........_:?..Q_...... _......_-_ .. _..'1
X
X
1
1
-- .. -~]- _.- -----_.
y
y
I
1
1
52
-_ _-_._.-._--._'-2--- Z
1
1
1
· -_ ....53
_.._....__._------_.. .... -- ...--.---..
--__.0
1
1
1
0
- _...54
,-_..__._- •.----.
--T----__~i__. ______ ___ . --2--'''1
1
1
-. 1
1
1
1
--.~~__ ... - --_._--_.-..•..- ____. . .2
__2 -________
I
1
1
__5.?__. . . _____ ' - - - .
1
1
1
1
1
--?~--.-- ---- __5___ ~ 1
1
1
1
--_.§.Q- - .- . .----__~J__.__ . ______
1
1
1
8 __
8
____E..?_____.__
1
1
1
1
1
1
63
9
i
9
-~ .~-~~--
.-~-~.--.
,"
---,---
rt···...
r
--'~'-'.
-=-
--.-~
.-.~---"-.---,.~.--.
..
.
,-,
-.-~
~'--
.
1<~~-~-·=.
-""-
_._
"
...
.--
,~
•••
>
.~--~
"
.-~.-
__
-~.-.----
--s--·-
.....
-~,-
_.---.
"'_.
BINARY CODED DECIMAL
INTERCHANGE CODE (BCD)
8 Bit
-.---~.-...
10
-
EXTENDED BINARY CODED DECIMAL
INTERCHANGE CODE (EBCDIC)
,
._
·=~~i-~=- ~_~ i~.~ .
.Figure 1-9.
1
1
1
1
1
0
1
1
1
1
1
0
0
1
I
1
1
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
I
1
I __
1
1
1
1
-'
1
1
1
1
0
0
1
1
1
0
0
1
1
1
1
0
I
1
1
1
1
1
1
1
1
0
0
0
0
0
1
0
0
0
1
0
0
- 0
0
1
I
I
1
0
0
1
1
1
1
0
0
_ ..0
..- ----~0
0
-L- .. _.J?_~. 1
0
0
1
1
0
0
1
0
0
1 __ --_9.,
0
1
0
0
1 --I-. 0
0
1
0
0
1
0
0
1
0
0
1
1
0
1
1
0
1
_1
Q1
0
1
1
1
0
1
1
O.
0
0
0
0
0
0
0
0
0
1
0
0
1
0
0
0
1
0
1
0
0
0
1
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
1
I
1
0
1
0
1
I
1
0
I
1
0
I
1
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
I
i0
0
0
0
1
1
0
0
1
1
0
0
0
1
1
0
0
1
1
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
,
0
0
1
0
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Typical IBM Codes
A-8
1
1
1
6-'
0
0
0
0
0
0
0
1
1
1
1
1
-----1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
-.- 11
1
1
1
.•
1
1
I
0
0
0
0
0
0
0
1
1
1 ..
1
1
0
0
1
1
1
1
0
0
0
i 0
--1 .... ---.
--" ... ~I
-
1
1
I
1
1
0
0
0
0
0
1
1
1
1
1
1
,
1
1
1
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
1
1
1
1
1
1
0
0
0
0
0
0
0
1
1
1
0
0
0
0
0
1
.-1
1
1
-
0
0
-'-1
_.
1
1
1
0
0
0
-0
1
T
1
1
0
0
0
0
0
0
1
1
1--
_--L -10
f-
1
1
0
0
0
0
0
0
1
1
1
0
0
0
0
0
0
0
1
1
0
"---,
1
1
0
1
0
1
0 ....
1
-0
1
0
-1
01
1
0
I
0
1
0
1
-0-
--"10
1
0
1
--~
I
0
0
1
0
1
0
1
1
...0__
1
0
1
0
0
0
1
0
1
1
0
0
1-
-~
1
--c- ----0-
1
0
0
1
0
---'-'-
'1
0
0-- --1 --00
0
1
1
1
1
0
0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
0
1
1
0
0
1
1
0
0
.~
1
oi-
t--
0
1_
0
-~
0
1
6-
j-
0
-~
L
_J.....
0
1
706-9000-9-00
SEVEN-TRACK NRZI TAPE MARK
NINE-TRACK NRZI TAPE MARK
TAPE
TRACKS
TAPE
TRACKS
4
6
C
o
B
A
1
2
8
P
4
2
1
3
7
5
FOUR
BIT SPACES
EIGHT
BIT SPACES
A NINE-TRACK NRZI TAPE MARK IS
A SEVEN-TRACK NRZI TAPE MARK
A SPECIAL CONTROL BLOCK THAT
IS A SPECIAL CONTROL BLOCK
CONSISTS OF A CHARACTER WITH
THAT CONSISTS OF A CHARACTER
I-BITS IN DATA TRACKS 3. 6.
WITH I-BITS IN A DATA TRACKS 8,
AND 7. AND AN IDENTICAL LRC
4. 2, AND 1. AND AN IDENTICAL
CHARACTER EIGHT BIT SPACES FROM
LRC CHARACTER FOUR BIT SPACES
IT.
FROM IT.
NO CRC CHARACTER IS WRITTEN.
ALTHOUGH THE TAPE
ALTHOUGH THE TAPE MARK IS PRE-
MARK IS PRECEDED BY APPROXI-
CEDED BY APPROXIMATELY 3.75
MATELY 3.90 INCHES OF ERASED
INCHES OF ERASED TAPE. THIS GAP
TAPE. THIS GAP IS NOT A RE-
IS NOT A REQUIREMENT.
QUIREMENT.
RECORD
BLOCK
PHOTOSENSING
DEVICE
WRITE
GAP
~
"
TAPE
MOTION .,
~~~~~~-----P----LlI
~ 0.5 IN. MIN
I
BOT
I
LD
RECORDING SURFACE
TAPE MARK GAP
(EOF GAP)
/..",.,r..---
3.75 IN. - -......../
210- 20 13
Figure 1-10.
Record Blocks and Tape Marks
A-9
READ
GAP
706-9000-11-00
PHASE ENCODED RECORDING
higher densities were to be achieved, a new recording method was required.
Introduction
For many years, NRZ1 recording has been used in
most computer tape systems. Density has increased
from 200 cpi to 556 cpi and 800 cpi in the quest to
increase data storage capability of tape and to achieve
h~gher data rates.
Phase encoding was chosen. Its advantages were well
known from use of similar systems on dnuns and
specialized tape drives. In computer use, tape density of 1600 cpi was selected, and a tap.e format was
established first by IBM and later adopted by ANSI
as a proposed American national standard.
With higher densities mechanical tolerances become
more and more critical, however, and 800 cpi is
probably the practical limit for NRZ 1 recording. If
r-
Figure 1 shows graphically the effect of density on
tape storage capacity as a function of block length.
CHARACTERS PER REEL
50x106r---~~--~----~-----r--'---r----~----~--~~--~----~____~____~
---- 10
20
40
80
160
320
640
1280
2560
5120 ·10240 20480
40960
BLOCK LENGTH
Figure t.
Comparison of Packinli Density, Phase Encoded and NRZt Formats
B-1
706-9000-12-00
Phase Encoded Recording
Tape Format
Each of the nine tracks on a PE tape is recorded in
such a manner as to allow recovery of a track clock
plus the data. This removes the requirement for
close skew alignment as in NRZI recording, since
clocked data can be assembled in a register to remove the effects of skew.
For IBM compatibility, tapes must be written in the
proper format. This includes conventions on gaplengths and special marks on tape. These have been
chosen to ensure compatibility with nine-track 800
cpi NRZI on the same transport but with diff,erent
electronics.
Saturation recording is used. Tape is dc erased with
a polarity such that the rim end of the tape becomes
a north seeking pole. A one bit is defined as a flux
reversal to the reference polarity. A zero bit is defined as a flux reversal toward the opposite polarity.
A "phase flux reversal" is written at the nominal
m.idpoint between successive ones or successive
zeros to establish proper polarity.
PE Format Requirement
a.
Identification burst. A burst of recording
in track 4 (P channel) only starting a minimum of 1. 7 inches before the load point
marker and extending past load point, but
ending at least 0.5 inch before the first data
block. Used to identify PE tapes.
Figure 2 shows the resulting pattern of reversals on
tape. It will be seen that the recording results in
two bit densities being recorded, 1600 flux reversals
per inch (frpi) and 3200 frpi. Phase shift of these
two frequency components is of the utmost importance
for decoding after playback.
b.
Initial gap. A gap of at least 3 inches between the load point marker and the beginning of the first data block.
c.
Preamble. A burst of 40 zero characters
in each track followed by a character containing ones in each track.
Figure 3 is a logic diagram of a write amplifier that
generates the required waveforms.
d.
Data. Nine tracks, channel aSSignments
same as 800 cpi.
o
o
o
o
o
o
o
o
o
o
o "--DATA
DATA OT ~_ _ __
INTERNAL
WRITE
CLOCK
HEAD
CURRENT
(FLUX)
REF.
READ
SIGNAL
PEAK
DETECTED
SIGNAL
(INVERTED)
DATA
TRANSITION
TIME - _.....
110-0112
o
NOTE: IF TAPE IS READ IN REVERSE DIRECTION, ONES AND
ZEROS ARE INTERCHANGED. POLARITY REVERSAL IS REQUIRED.
Figure 2.
Phase Encoded Waveforms
B-2
706-9000-13-00
Amplified head Signal waveforms are shown in Figure 4 for a typical data block. Preamble and postamble are easily identified at the beginning and end
of the block. Purpose of the preamble is to allow
synchronization with the Signal by a phase-locked
oscillator before data begins. It is written at 3200
frpi (all zeros).
Because of tape and head response limitations, the
high frequency components are of lower amplitude
than the low frequency components.
JL
WCLK
---4----------~
EXCLUSIVE
OR
Differentiation of the amplified Signal is performed
in read electronics. Signal is then crossover detected, and digitized. A new signal envelope detector
is used to detect "dropouts" in order to precisely
determine defective parts of tape. Up to three characters may be lost at the beginning of the block and
some noise can be seen at the end of the block (after
the last zero) for up to two characters time.
110-0058
Figure 3.
e.
Write Amplifier Logic
Postamble. An all ones character followed
by 40 all zero characters.
f.
Interrecord gap. A gap 0.6 inch long nominal (0.5 inch minimum, 25 feet maximum)
erased in the reference direction.
g.
Tape marks. Tape marks are special control blocks used to identify portions of the
tape. As opposed to NRZ 1 format which
has only one tape mark, there are eight
possible marks in PE format. Tape mark
blocks may be from 64 to 256 characters
in length and are recorded in the format
shown tn Table 1.
Two conditions should be met before signals are
recognized as valid data: (a) Signals must be present
in all tracks; (b) a number of zeros (approximately
25) must be followed by an all ones character preamble detected).
Once detected, the preamble combination of all ones
must be treated as a valid character. All zeros is
not a valid character unless the single track dropout
line is active.
One phase-locked oscillator and associated electronics is recommended for better tolerance to tape deck
Reflective Strips
Load point and end-of-tape reflective strips are
attached to the tape in the same positions and with
the same meaning as in NRZ1 recording.
Check Characters
All PE tapes are written with odd vertical parity.
There are no LRC or CRC characters in the PE system. They are not needed since the location of the
track in error can be easily detected through the
coding system.
Reading Phase Encoded Tapes
Reading methods for PE tapes differ, naturally, from
NRZ1 methods. Following is a general discussion
of means employed to extract recorded information.
More specific circuit descriptions will be found in
instruction manuals for Kennedy Company PE units.
B-3
706-9000-14-00
shift register controlled by an up-down counter.
Upon entering the shift register, the 1 or 0 bit is
shifted to the right to occupy the last open shift register cell. As data characters are read out, the
shift register contents are shifted to the right. This
allows up to four characters of skew. An error is
posted if the skew register overflows.
Since single track dropouts are detected on a per bit
basis and since the track in error is known, the
character in the SR output stage can be corrected.
This is done by reconstructing the misSing bit by
placing the remaining bits in a parity generator and
adjusting the missing bit so that odd parity is achieved.
If more than one track drops out, a multiple track
error condition is flagged. In this case correction
is not possible.
110·0059
Figure 4.
Read Signal
speed variation and write data timing. Two detectors, a one detector and a zero detector, are used
to develop data. If, in the required time, neither
detector has an output, a single track dropout is
signaled and data correction ensues.
It can be seen from the preceding discussion that
some complexity is required in the PE read electronics. If possible, it is desirable to share read
electronics among several tape units as in Kennedy
System 9000. If a customer wishes to build his own
PE electronics, licenses are available to use Kennedy Company designs, thereby saving a considerable
amount of engineering time.
Each read channel has three output lines: one, zero,
clock. These three lines are fed to a four-stage
B-4
706-9100-15-01
Vacuum test box, Kennedy PN 154-0041-001
Spanner wrench, Kennedy PN 154-0042-001
Set of nut drivers or open end wrenches, Phillips and
standard screwdrivers
Capstan puller, Kennedy PN 154-0043-001
Skew master tape, Kennedy PN 154-0036-001
Card extender, Kennedy PN 190-2224-001
Maintenance kit, Kennedy PN 190-2324-001,
containing:
SUMMARY OF SAFETY PRECAUTIONS
Power Connections:
CAUTION
Before connecting the unit to the power source, make
certain the line voltage is correct (either 115 vac or
230 vac) and that the . proper fuses have been
installed. Proper fuse ratings are indicated on the
rear of the unit.
Head cleaner
Hex socket keys - 7/64, 5/32, 1/8, 3/32
Lint-free swabs
Reflecti ve marker strips
Magnasee visualizing solution
Loctite grade H
Troubleshooting:
CAUTION
Turn power -off before removing or ihstalling PC
boards.
RECOMMENDED TOOLStrEST EQUIPMENT
In addition to normal electronic tools and test gear
, (an oscilloscope, voltohmmeter, etc.), the following
items should be available for service and repair.
Optional maintenance tools:
Extehsion hose set, Kennedy PN 154-0044-001
Blower extension cord, Kennedy PN 154-0045-001
C-l
Warranty
The Company warrants its devices against faulty workmanship or
the use of defective materials (except in those cases where the
materials are supplied by OEM) for a period of one year from the
date of shipment to OEM, with the exception of i" cartridge
products which are warranted for a period of ninety (90) days.
The liability of the Company under this warranty is limited to
replacing, repairing, or issuing credit (at the Company's discretion)
for any devices which are returned by OEM during such period
provided that (a) the Company is promptly notified in writing upon
discovery of such defects by OEM; (b) the defective unit is returned
to the Company, transportation charges prepaid by OEM; and (c)
the Company's examination of such unit shall disclose to its
satisfaction that such defects have not been caused by misuse,
neglect, improper installation, repair alteration or accident.
Kennedy Company is continually striving to provide improved
performance, value and reliability in its products and reserves the
right to make these changes without being obligated to retrofit
delivered equipment.
KENNEDV
Sul)SIdiBry Magnel1cs & flee/fomes Inc
KENNEDV
Subsidiary, Magnetics & Electronics, Inc.
1600 Shamrock Avenue / Monrovia, California 91016
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