Kennedy__9400_Tri Density_Tape_System_Jan85 Kennedy 9400 Tri Density Tape System Jan85
Kennedy__9400_Tri-Density_Tape_System_Jan85 Kennedy__9400_Tri-Density_Tape_System_Jan85
User Manual: Kennedy__9400_Tri-Density_Tape_System_Jan85
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Opera;tic1n and iVlain~enCi:.~'i,M-a~;ual
.~.
-..,
KENNEDV
ALLEGHENY
INTERNATIONAL
~reliminar"Y
Mad el-,BIQ.OC
Tri-den_~_~ty T~pt;! . . System;
,~-~.
,
.~.,
KENNECY
006-9400-001 D
CONTENTS
SECTION I - APPLICATION OF DATA
1.1
1.2
1.3
1. 4
1. 5
1. 6
1. 7
1.8
1. 9
1. 10
1.11
Introduction. . . . . . . . . . . . . . . . . . . . . . . . .
1. 1 . 1
General. . . . . . . . . . . . . . . . . . . . .
1.1. 2
Tape Format Modes..........
1.1.3
Available Host Interface......
Operational Specifications............
1.2.1
General .................•...
1. 2.2
Mechanical Configuration.....
Front Panel Controls and Indica tors. . .
Interface Description .... . . . . . . . . . . ..
Pertec Interface Signal Characteristics
Input Signals .. . . . . . . . . . . . . . . . . . .. ...
Output Signals .•..•..................
Tape Motion' ........................
Basic Signal Definitions .. . . . . . . . . . . ..
1.9.1
Read Forward ...............
1 .9.2
Read Reverse .... . . . . . . . . . ..
1.9.3
Write ...................•...
1 . 9. 4
Edit . . . . . . . . . . . . . . . . . . . . . . ..
1.9.5
Write File Mark .......•.....
1. 9.6
Erase Variable Length........
1. 9.7
Space Forward •.............
1.9.8
Space Reverse ..............
1.9.9
Rewind ..•................. ,
1.9.10 File Mark Search
Forward/Reverse. . . . . • . . . . . ..
1. 9.11 Off Line (Rewind and Unload)
Controller to Transport
Interface Signals.....................
1.10.1 Formatter Address ...........
1.10.2 Transport Address ...••....•.
1.10.3 Initiate Command ......•....
1.10.4 Reverse/Forward ..•...•..•..
1.10.5 Write/Read ........' ...........
1.10.6 Write File Mark •..•.•....••.
1 . 10 . 7 Edi t . . . . . . . . . . . . . . . • . . . • . • •.
1.10.8 Erase .................••....
1.10.9 Density Select. ••....•...•...
1.10.10 Rewind .............•....•..
1.10.11 Off Line .................••.
1.10.12 Last Word ..............•••.
1.10.13 Formatter Enable ....•.......
1.10.14 Write Data Inputs ...•.....•.
Transport to Controller
Interface Signals ....................
1.11.1 Formatter Busy ..............
1.11.2 Data Busy ..................
1.11.3 Check Character Gate,
Identification. . . . . . . . . . . . . . ..
1.11.4 Hard Error ..................
1.11.5 Corrected Error.............
1.11.6 File Mark...................
1 . 11 . 7 Reaay. . . . . . . . . . . . . . . . . . . . . ..
1.11.8 On Line ................•...
1.11.9 Rewinding. . . . . . . . . . . . . . • . ..
1.11.10 File Protect ...•............
1.11.11 Beginning' of Tape ...........
1.11.12 End of Tape ................
1-1
1-1
1-1
1-1
1-1
1-1
1-1
1-1
1-10
1-10
1-16
1-16
1-16
1-19
1-19
1-19
1-19
1-19
1-19
1-19
1-21
1-21
1-21
1.12
1.11.13 Tape Speed .................
1.11.14 Write Strobe ................
1.11.15 Read Strobe ................
1.11.16 Read Data Lines ............
Optional Controller
Remote Conditions ..................
SECTION
2.1
2.2
1-21
1-21
1-21
1-21
1-21
1-21
1-21
1-21
1-21
1- 23
1-23
1-23
1-23
1-23
1-23
1-23
1-23
·1-24
1-24
1-24
3.3
1-24
1-24
1-25
1-25
1 - 25
1-25
1-25
1-25
1-25
1-25
3.4
iii
m-
1-26
iNSTALLATION AND OPERATION
Installa tion . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.1
Shipping Container...........
2.1.2
Inspection. . . . . . . . . . . . . . . • . . .
2.1.3
Mounting....................
2.1 .4
Service Access •.... . . . . . . . . .
2".1.5
Supplied/Required Items......
2.1.6
Intercabling Description......
2.1.7
Power Up Connections . . . . • . .
Operation. . . . . . . . . . . . . . • . . • • • • • • . . • •
2.2.1
Interface .............•......
2.2.2
Controls and Indicators.......
2.2.3
Tape Threading..............
2.2.4
Tape Loading................
2.2.5
Placing Tape Unit On Line...
2.2.6
Unit Off Line...............
2.2.7
Tape Unloading
and Rewinding ...•..........
2.2.8
Power Shutdown.............
SECTION
3.0
3.1
3.2
n-
1-25
1-25
1-25
1-26
2-1
2-1
2-2
2-2
2-2
2-2
2-3
2-3
2-3
2-3
2-3
2-3
2-3
2-3
2-3
2-5
2-5
THEORY OF OPERATION
Theory of Operation ....•...•........
General Introduction .........•...•.•.
System Configuration ........•.......
3.2.1
I/O Host Interface ...•..•.••.
3.2.2
System Processor •..•.••••.•.
3.2.3
Wr'i te Data Handler •..•......
3.2.4
Front Panel ....•..••........
3.2.5
Analog Read/Write Amps ..•..
3.2. 6
Read Decoders 1 and II .•••••
3.2.7
Read Data Handler .•........
3.2.8
Servo/Tape Transport System
3.2.9
Power Supply ............... .
Data Formats (NRZI, PE, GCR) .... .
3.3.1
NRZI Format. .............. .
3.3.2
Data ...................•...
3. 3. 3
Da ta Record .•..............
3.3.4
Cyclic Redundancy Check
Character .................. .
3.3.5
Longitudinal Redundancy
Check Character ........... .
3.3.6
File Mark .......••...•......
3.3.7
Error Detection ............ .
Phase Encoded (PE) Format. ........ .
3.4.1
PE Mode Data Block Format
3.4.2
PE Mode Tape Mark Format
3-1
3-1
3-1
3-2
3-2
3-5
3-5
3-5
3-9
3-12
2-15
3-15
3-15
3-15
3-18
3-18
3-18
3-20
3-20
3-20
3-21
3-21
3-21
006-9400-002 D
3.5
3.6
3.7
3.8
3.9
3.10
Group Coded Recording (GCR) Format 3-21
3.5.1
GCR Overall Tape Format. ... 3-21
3.5.2
OCR Mode Tape Mark Format 3-24
3. fi. 3
GCR Data Block Format ..... 3-24
System Processor Detailed Description 3-31
3.6.1
ROM/RAM. , .. 0 ..•......•... 3-31
Timing Control •............. 3-32
3.6.2
3.6.3
Interrupts ..................• 3-32
3.6.4
Subsystem Memory Map and
System Control ....••...••... 3-34
3.6.5
Serial-Interface ........•.... 3-39
3.6.6
Subsystem Interfacing .•..•... 3-40
3.6.7
Write Data Handler .....• 0••. 3-40
Front Panel Keyboard ..•..•......•... 3-42
Analog Read/Write Amplifiers ..•..... 3-43
3.8. 1
Port Description ...•......... 3-43
3.8.2
Write Drive Circuitry .......• 3-45
3.8.3
Read Amplifier and Detector
Circuitry •...•.......•....... 3-46
3.8.4
Filter Circuitry ............. . 3-46
3.8.5
Peak Detector Circuitry ..... . 3-46
Window Detector Circuitry .. . 3-47
3.8.6
3.8.7
Peak Follower Circuit ....... . 3-47
Automatic Gain Control
3.8.8
Circuit .................... . 3-48
3.8.9
Direction Control Circuit ... . 3-48
3.8.10 NRZI Equalizer Circuit ..... . 3-48
3.8. 11 Envelope Detector ..•.•..•... 3-48
Read Decoders I and II •••••••••••••• 3-:-49
3.9. 1
Decoder Density and
Diagnostic Control ..••••.•••• 3-50
3.9.2
Diagnostic Data and
Synchronization Status ..•.•.. 3-51
3.9.3
Majority /Special Block
Recognition Byte ...••..•.... 3-51
Clock Generator ......•..... 3-52
3.9.4
3.9.5
Data Transition Detector ..... 3-52
3.9.5
Envelope Detection .........• 3-52
3.9.7
Density Identification
and Majority Detection .•.... 3-53
3.9.8
Loop Synchronization ........ 3-54
3.9.9
Phase Lock Loop .....•••..•. 3-54
3.9.10 PLL Monitor ................ 3-56
3.9.11 Phase Lock Oscillator ......•• 3--58
3.9.12 NRZI Data Clock Generator .. , 3-59
3.9.13 Data Clock FIFO Strobe ..•.. 3-59
Servo Tape/Transport .....••....•••.. 3-59
3.10.1 Data Buffer ........•.••.•••. 3-60
3.10.2 Deadman Timer Reset .•..•.. 3-61
3.10.3 Servo Command Latch ....••. 3-62
3.10.4 Servo Logic ........•..•..... 3-62
3.10~5
48V Sense ..•..........•.•.. 3-64
3.10.6 Write Protect Solenoid ....••. 3-64
3.10.7 Reference Ramp Generator... 3-64
3.10.8 Velocity Error Amplifier ..•.. 3-65
3.10.9 Current Error Amplifier ••..•. 3-65
3.10.10 Anticreep Circuit •.•......... 3-65
3.10.11 Motion Detection ...•........ 3-66
3.10.12 Reel Servos................. 3-66
3.10.13 Position Sensors .......•...•. 3-66
3.10.14 Position Error Amplifier •...•. 3-66
3.10.15 Current Amplifier ........... 3-67
3.10.16 Fast Forward ............... 3-67
3.10.17 Back EMP Amplifier (BEMF) 3-67
3.10.18 Brake ...................... 3-67
3. 11
3.12
Read Da ta Handler ................. .
3.11.1 Status and Command
Registers .................. .
3.11.2 Deskew Processor and
Architecture ............... .
3.11.3 Input FIFO ................. .
3.11. 4 Deskew Sequencer .......... .
301-1.5 Deskew Control Store ....... .
3.11.6 Deskew Processing Unit ..... .
3.11.7 Tie Pointer Logic Block ..... .
3.11. 8 ECR Sequencer ............. .
3.11 .9 ECP Control Store ......... .
3.11.10 Error Correction Processor
(ECP) Unit ......•..........
3.11. 11 Error Correction Processor
Operation .................. .
3.11.12 Power Supply Control •.......
Power Supply Control ....•......•....
3.12.1 Vacuum Blower Enable ...... .
3.12.2 System Power Enable ....... .
3.12.3 Enable 48V Processor ....... .
3.12.4 24V Fail. .................. .
3.12.5 12V Fail. .................. .
3.12.6 AC Fail ................... .
3-68
3-68
3-70
3-71
3-71
3-71
3-72
3-72
3-72
3-73
3-73
3-75
3-76
3-76
3-76
3-77
3-77
3-77
3-77
3-78
SECTION IV - MAINTENANCE AND
TROUBLESHOOTING
4.0
4.1
4.'2
4.3
4.4
, 4.5
4.6
4.7
4.8
4.9
4.10
4.11
4.12
4.13
4.14
4.15
4.16
4.17
4.18
4.19
4.20
4.21
iv
General .•..•..•.....................
Preventive Ma.intenance ......••......
4.1.1
Daily Check .............•..
Cleaning •..•.....••.................
4.2.1
Head Cleaning ........... 0.. .
4.2.2
Tape Path Cleaning ......... .
4.2.3
Other Cleaning •......•..•...
Lubrication ...•.....................
Wear .............................. .
4.4.1
Head Wear ................. .
4.4.2
Guide Wear ................ .
4.4.3
Reel Hub Wear ............. .
Periodic Inspection ................. .
Speed Adjustment. .................. .
Ramp Time Adjustment ............. .
Servo Adjust ments .................. .
Read/Write Adjustments ............. .
Head Face Shield Adjustments .•......
Skew Adjustment ................... .
Capstan Adjustment. ................ .
Blower Motor Belt Tension Adjustment
Vacuum Column Adjustment ......... .
Reel Hub Adjustment ............... .
Reel Clearance Adjust ment .......... .
Head Replacement .................. .
Tape Cleaner' Replacement .......... .
Diagnostics ......................... .
Front Panel Keyboard Diagnostics .... .
4.20.1 Diagnostic Execution ........ .
4.20.2 RS-232 Terminal Diagnostics ..
Printed Circuit Board Removal
Procedure .......................... .
4.21.1 Analog Read/Write Board ... .
4.21.2 Read Decoders I and II •••••.
4.21.3 Read Data Handler ......... .
4.21.4 System Proce~sor ..... ,...... .
4.21.5 Servo Board .... , ........... .
4-1
4-1
4-1
4-1
4-1
4-1
4-1
4-1
4-1
4-1
4-1
4-3
4-3
4-3
4-5
4-5
4-5
4-6
4-6
4-6
4-8
4-8
4-9
4-9
4-10
4-10
4-11
4-11
4-11
4-13
4-17
4-17
4-17
4-17
4-17
4-18
006-9400-003E
SECTION V - SPARE PARTS LISTS
SECTION VI - WIRING AND SCHEMATIC
6.0
6.1
6.2
6.3
6.4
6.5
Notes to Schematic..................
Introduction. • . . . . . • • • . . . . . . . . • . • . . • .
6.1.1
Components. . . • • . . . . . . . . • • • .
6.1.2
Resistors. • . . • . . • . . . . • • • • • . .
6.1.3
Capacitors. . . . • . • . • . • • • . . • . .
Logic Conventions and Symbology.....
6. 2. 1 TTL Logic • • . . • • . . • • • • . . • . • •
5.2.2
EeL Logic..................
6.2.3
Logic Symbology.............
Schem~tic Flow .••..•••.•.•.••.•.•••
Test Points .••....•.•..•....••.•...•
Terminals ..•••.••.••••••
e •
• •
• • •
•
•
•
• •
3-11
3-12
3-13
3-14
3-15
3-16
3-17
3-18
3-19
3-20
6-1
6-1
6-1
6-1
6-1
6-1
6-1
6-2
6-2
6-2
6-2
6-2
4-0
4-1
4-2
4-3
4-4
4-5
4-6
4-7
4-8
4-9
ILLUSTRA'nONS
1-1
1-2
1-3
1-,4A
1-·4B
1-4
1-5
1-6
1-7
1-8
1-9
1-10
1-11
1-12
Outline and Installation Drawing......
Front Panel Controls and Indicators...
Driver/Receiver Interface Configuration
General Write Timing .....••.•..•••..
General Read Timing ..•.....•..•.•..
GCR Write Timing •••..........•.••..
GCR Read Timing...................
NRZI Write File Mark •.•.•.•.•....••.
NRZI Read Timing ..•....••.•.•....•.
NRZI Write Timing ... . . . . • . . • . • • . • •.
PE Read Timing.....................
PE Write Timing •.••.•••....••..•.••
Interiace Cable Connection ••••••••••
Pertect Interface
Dip Switch Configuration...........
2-1
Shipping Container • .-.................
Rack Slide Identification ..•.•.....•..
2-2
2-3
Rail/Transport Mounting Assembly •••.
Tape Threading .•...••••.••••..•.•.•.
2-4
Block Diagram of System •.•.•.•..••.
3-1
3-2
System Processor Block Diagram......
3-3
Write Data Handler Block Diagram....
3-4
Analog Read/Write Block Diagram .••.
3-5
Read Decoders I and II Block Diagram
Read Data Handler Block Diagram •.••
3-6
Servo/Tape Transport Block Diagram •.
3-7
Vacuum Sensor Assembly .•••.•.•.•.•.
3-8
3-9
NRZI and PE Comparison ..•.•.
3-10 NRZI Format •...•..........•........
0
••
0
••
1-7
1-8
1-10
1-11
1-12
1-13
1-13
1-14
1-14
1-15
1-15
1-16
1-17
4-10
4-11
4-12
4-13
4-14
4-15
4-16
4-17
4-18
4-19
4-20
1-22
2-1
2-2
2-2
2-4
3-3
3-6
3-7
3-8
3-10
3-13
3-16
3-17
3-19
3-19
NRZI File Mark ..••...........•....•
PE Tape Format .......•......••....
PE Data Block Format ...•....•.....
PE Tape Mark Format ......•..•....
GCR Overall tape Format ......•..•..
GCR Tape Mark Format .•..•........
GCR Data Block Format ...•...••.••.
GCR Code Word •••....••••..•••...•
4-to-5 Translation ........•........•.
Data Subgroup to Storage Subgroup
Conversion ......................•.
9400 Cleaning Path ....•..•...•......
Reel Hub and Motor Assembly .•......
Servo Board Adjustment •.....•...••..
Ramp Adjustments ....••...•....•..•.
Tape Ripple Calibration •....•...••...
Gain/Current Adjustment .•........••.
Analog Data Wave Form ....••...•...
Head Face Shield .............•......
Skew Wave Forms ..••....•...•...••.
Skew Adjustments ..•..•.......•.....
Capstan Adjustment. ...•......•..•...
Vacuum Belt Adjustment ...........•.
Vacuum Column Adjustment ...•...•..
Reel Clearance Adjustment ..•......•.
Tape Cleaner/Head Adjustment ....... .
Processor Layou t ••..•.•.••.•..•...•.
9400 Back View •.•••.........•.••...
Seven Segment Display •...••...•...•.
Read Decoder I Connectors .••.••••••
Read Decoder II Connectors ..•.•...•.
Read Data Handler Connectors ....•..
3-22
3-22
3-23
3-23
3-25
3-25
3-26
3-28
3-28
3-29
4-2
4-3
4-4
4-5
4-5
4-6
4-7
4-7
4-7
4-7
4-8
4-9
4-9
4-10
4-11
4-12
4-12
4-16
4-18
4-19
4-19
TABLES
1-1
Electrical and Mechanical
Specifica tions ..................••.
l-1A 9400 Options .••••..•.......•....•••.
1-2
Pin/Signal Characteristics ..••..••.•••
1-3
Transport Commands .....•...........
1-4
Track Identity ...•.•..•.•••••..••..•.
2-1
Supplied/Required Items .•........•...
4-1
Diagnostic Code List ................•
v
1-2
1-5
1-17
1-20
1-24
2-3
4-14
~
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~
n
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n
-I
o 0
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~
SECTION I
APPLICATION DATA
106-9400-001D
SECTION I
APPLICATION OF DATA
1.1
INTRODUCTION
PICO
PERTEC
1.1.1 GENERAL
STC
The Kennedy Model 9400 is a Tri-Density Tape
System (TTS) designed to provide high speed, low cost
mass storage, well suited for medium and high end
micro/minicomputer systems.
TELEX
All interfaces generate full IBM and ANSI compatible
tapes insuring full interchangeability on any other
compatible device.
The internal 'intelligence' of the system allows
sophisticated error correction and system checks that
heighten user confidence in system reliabili ty.
Note
This technical manual is written to accommodate the
PERTEC TAB. Information pertaining to PICO, STC
and Telex Interface boards can be obtained in future
Model 9400 Operation and Maintenance manuals.
1.1.2 TAPE FORMAT MODES
The following are the three modes of operation which
make up the 9400 Tri-Density System:
1.2 OPERATIONAL SPECIFICATIONS
1. GROUP CODED RECORDING (GCR): The 6250
BPI GCR (45 ips) MODE provides high density
storage with very high data reliability.
The
nominal data rate transfer is 280-312 kilobytes
per second! depending on the controller
performance capability.
1.2.1 GENERAL
Table 1-1 illustrates the complete electrical and
mechanical specifications for' the Model 9400 TriDensity Tape System (TTS).
2. PHASE ENCODING (PE): The 1600 BPI PE (75
ips) MODE provides a medium density storage
capability
suitable
for
micro/minicomputer
systems. The nominal data rate transfer is 120
kilobytes per second.
The 9400 utilizes convection cooling as one of the
means of heat dissipation, and heat sinks are oriented
for vertical transpor't mounting. Fans are provided
for heat dissipation.
Note
The 800 BPI
3. NONRETURN-TO-ZERO (NRZI):
NRZI (75 ips) MODE is provided for Industry
Standard interchangeability. The nominal data
ra te is 60 kilobytes per second.
Care must be taken when enclosing the unit to
provide adequate air flo~-, and assure that operating
temperature limits (see Table 1-1) will not be
exceeded.
The 9400 TTS has a nine - (9) track recording
configuration, and is extremely cost efficient,
providing the system integrator with the ability to
store up to 180 MBytes of data in a GCR Format
while maintaining compatability with PE and NRZI
recorded tapes.
1.2.2 MECHANICAL CONFIG URATION
Refer to Figure 1-1 for outline and installation view
of the Model 9400 Tri-Density unit.
All assemblies are readily accessible from side or
rear and may be removed by releasing jack screws
and connectors (see Section II for Installa tion and
Operation).
1.1.3 AVAILABLE HOST INTERF ACE
The 9400 has the optional capabilities to use four
different host interfaces with just a simple
replacement of the Transfer Adapter board (TAB).
The host can be changed to the type of interface
needed to interface with outside controllers. The
available standard host interfaces for the 9400 are as
follows:
1.3 FRONT PANEL CONTROLS
AND INDICATORS
Figure 1-2 illustrates the 9400 front panel controls
and indicators, which include diagnostic controls and
indicators, not seen when the front door is closed.
1-1
<
106-9400-002E
PERFORMANCE SPECIFICATION
Data Density
BPI
800
1600 BPI
6250 BPI
Format
NRZI
ANSI and IBM
compatible
PE
GCR
Tape Speed
45
75
Rewind Time
500 ips max.
350 ips nominal
1 min 10 sec for
ips
ips
GCR
NRZI/PE
2400'(typical)
Gap Length
GCR 0.3" (RD AND WRT) Nominal
NRZI/PE 0.6" (RD and WRT) Nominal
Access Time
GCR 2.7 ms @ 45ips Nominal
NRZI/PE 3 . 7 ms @ 75 ips Nominal
Instantaneous Speed Variation
Long Term Speed Variation
Data Transfer Rate
(Nominal)
(GCR rates switch
selectable)
GCR
PE
NRZI
Density selection
+/- 3%
+/- 1% (GCR) ,
+/-2% (PE,NRZl)
312.5 KB/sec burst
281 KB/sec avg.
205 KB/sec
125 KB/sec
120 KB/sec
60 KB/sec
Automatic (Read mode)
Manual, from front panel
or software selectable under host
control.
TAPE
Width
Thickness
Tension
Reel size
0.498 (+/-.002) inch
1 . 5 mi I ' s
8.0 +/- 2.0 ounces
up to 10.5"
Tape capacity
1 . 5 mi I tape
600,1200 or 2400 feet
TABLE 1-1
ELECTRICAL AND MECHANICAL SPECIFICATIONS
1-2
106-9400-003E
Magnetic Head Assembly
Surface
Number of Tracks
Write to read gap
Erase head
Wrap angle
Write skew
Read skew
Tape cieaner
Chrome or Triballoy
9 Track
BOT/EOT detection
Broken tape detection
Infrared
Infrared
Motion control
Formatter
Tape .buffer
Interface
Diagnostic
Microprocessor controlled servo
Integral, all densities
Vacuum column
Pico, Pertec, STC, Telex
Internal self-test front panel
External RS-232 port
(for remote testing)
Signature analysis
Seismic operation
Supports
Acoustic noise
60 db(typical,operating,door closed)
015"
Full Width
7~5 +/- 5 degrees
Less than 75 microinches
Less than 75 microinches
Sapphire blade, vacuum-assisted
seismic option
MAINTENANCE STATISTICS
MTBF (Design Goal)
MTTR (Design Goal)
6000 hours
30 minutes
ENVIRONMENTAL SPECS
Temperature operating
2-45
degrees
Celcius
(excluding
med i a) •
Temperature non-operating -2/-70 degrees Celcius
Humidity operating
15%-95% (non-condensing)
Humidity non-operating
5%-95% (non-condensing)
Altitude operating
0-4000'
(high
altitude
options
available
to 12,000')
Altitude non-operating
0-50,000'
TABLE 1-1
ELECTRICAL AND MECHANICAL SPECIFICATIONS
1-3
106-9400-004D
PHYSICAL SPECS
(See Figure 1-1)
Dimensions
Height 24.5"
Width 19"
depth 22 3/4"
Mounting
Std. ErA Retma R::lck,
weight
170 Ibs.
(slides)
POWER SPECS
Power
60 HZ
Input
Power
50 HZ
Input
Power
Requirements
voltage
current nominal
nominal
voltage
current nominal
nominal
115VAC
9 AMPS
1000W +/-10%
220/240VAC
4.5 AMPS
1000W
OPTIONS
Special Paint
FiFo Buffers
4K (STD)
8K
12K
16K
See Table l-lA for more information on
9400 options.
Agency recognition
UL/CSA/FCC
TABLE 1-1
ELECTRICAL AND MECHANICAL SPECIFICATIONS
1-4
106-9400-005D
GENERAL OPTIONS
PICO
PERTEC
STC
TELEX
Interface:
Voltage:
l15V
220V
240V
Frequency:
50 HZ
60 HZ
Parity:
Internal
External
High Altitude Kit:
40'00/8000 ft.
8000/12,000 ft.
Special Paint
(10' or more units)
FIFO Buffer:
4K (STD)
8K
12K
16K
(STD)
NOTE
Larger than 4K FIFO's are needed if the lower GCR transfer
rates are going to be used and the block size is greater
than 4K. The following is a FIFO size vs record size chart
to help determine the FIFO size needed:
LOW SPEED GCR (WRITE)
FIFO SIZE
1.
2.
3.
4.
4096
8,192
12,288
16,384
125 KB/SEC
PREFILL DELAY
MAX RECORD (IN BYTES)
30.7 ms
6,656
14,080
17,920
28,0'16
63.0' ms
80.13 ms
126.0' ms
NOTE
Delay cancelled if 'LAST WORD' received. ( See above
PREFILL DELAY column) PREFILL includes ramp.
TABLE l-lA
9400 OPTIONS
1-5
106-9400-0060
MEDIUM SPEED GCR (WRITE)
5.
6.
7•
8•
FIFO SIZE
PREFILL DELAY
4,096
8,192
12,228
16,338
18.4
38.0
51.0
72.0
ms
ms
ms
ms
208 KB/SEC
MAX RECORD (IN BYTES)
14,336
30,464
40,r92
60,784
NOTE
Delay cancelled if 'LAST WORD' received. ( See above
. PREFILL DELAY column) PREFILL includes ramp.
Software programs before version 1.9
3.
TABLE l-lA
9400 OPTIONS
1-6
will only support item
106-94 0O-O07D
I
1
TOP
NS TO APPROX 120 DEGREES
ST COVER OPE
TAPE REELS
TO
DU FOR ACCESS
SLiDES
ASSEMBLY EXToE~~Sa O~LECTRONICS
FORDECK
ACCESS TO TRANSP
MOUNTING
SURFACE
SHOWN IN
FIRST DIMENSIO~~::~THESES
AREINCHES
IN CE NTIMETERS
DIMENSIONS IN
i
-- --
HOST INTERFACE BOARD
BACK
SIDE
FRONT
o·
24.50
(62,23)
•
Figure 1-1
19 00
148,26)
"I
Outline and .
·
DrawIng
IllustratIon
410-4047
106-9400-008£
CYCLE
FFWD
. REV
FWD
o
BBBBa
LOOP EXECUTEPAEVIOUS NEXT
(;CR
OPE
STOP
DENSITY
SELECT
O~;RI~
OSElECT
LOAD
o POINT
o EOT
n. oO
I
~~
SHIFT
~ .. ·
. r_T
0
a
0
ON LINE LOAD
~
1f===r1
WRITE
lbd
ENBL UNn SELECT EXIT
0
n
RE'tIIND
o
I
!
rr=-9
lbd
P r=
ON
~
I
II
E
R
LJ
OFF
210-2083 A
Note
Tape transport must be off line (on line indicator extinguished) and
at load point before test panel can be functional.
ON LINE CONTROLS
The following controls are used to operate the unit on line with the
host controller:
Note
Tape must be at BOT when selecting density.
GCR Indicator: Indicates Group Coded Recording (GCR) density
mode has been selected.
PE Indicator: Indicates Phase Encoding (PE) density mode has been
selected.
NRZI Indicator: Indicates nonreturn-to-zero (NRZI) density mode
has been selected.
Remote Indicator: Indicates that the host may select the operating
density.
Density Select: A toggle line switch, which selects density modes
(GCR, PE, NRZI, and Remote).
Select Indicator:
selected.
Illuminated when tape unit is ON LINE and
Digital Read-Out Indicator: This will indicate the tape unit,
number and a fault status code number for service information.
Note
By holding down the stop button, and depressing ON LINE SELECT
pushbutton, you can change the unit select number (1, 2, 3, 4... ).
This feature will not be available on initial wire wrap Pertec
adapters.
Load Point Indicator: Illuminated when tape is at load point.
EOT Indicator: Illuminated when tape has reached or passed End of
Tape.
Figure 1-2
Front Panel Controls and Indicators
1-8
106-9400-009 D
Fault Indicator:
9400 circuitry.
Will illuminate when a problem exists w,ithin the
Write Enable (ENBL) Indicator: Illuminated whenever a reel with a
write enable ring is mounted on the supply hub.
On Line Unit Select: A momentary pushbutton, which functions as
alternate action. When first activated, the tape unit is placed in an
On Line condition, when the tape unit is On Line it can be remotely
selected. When activated again it takes the tape unit Off Line.
The indicator is illuminated in the On Line condition.
Note
LOAD, REWIND and all off line controls are disabled when the tape
unit is On Line.
LOAD: The momentary pushbutton activates the reel servos,
The load point
tensions tape and starts the load sequence.
indicator will illuminate when the reel servos are activated, tape is
tensioned and at BOT.
REWIND: The momentary pushbutton activates a rewind operation.
This control is enabled only when tape is tensioned and unit is off
line. The indicator is illuminated during either a local or remote
rewind opera tion.
POWER: The ON/OFF switch applies power to the tape transport.
OFF LINE CONTROLS
These controls are used in testing and adjusting the unit.
Cycle Control Pushbutton: An interlock pushbutton which runs
tape in alternating forward and reverse modes. Helpful in making
ramp or vacuum sensor adjustments. Depressing STOP terminates
this opera tion.
Fast Forward (FFWD) Pushbutton: An interlock pushbutton switch
that allows tape unit to run forward at fast speeds. Depressing
STOP button terminates this operation.
Reverse Pushbutton: An interlock pushbutton switch that allows
tape unit to run in reverse at normal speed. Depressing STOP
pushbutton will terminate this operation.
Forward (FWD) Pushbutton: An interlock pushbutton switch that
allows the tape unit to proceed forward at normal speeds.
Depressing STOP button will terminate this opera tion.
STOP Pushbutton: An interlock pushbutton that terminates all tape
:notion.
L__
Figure 1-2 (con't.)
Front Panel Controls and Indicators
1-9
.
106-9400-010D
1.4 INTERFACE DESCRIPTION
1.5 PERTEC INTERFACE
SIGNAL CHARACTERISTICS
The interface connectors on the 9400 are designed for
flat ribbon cables. Each live pin has a ground pin. An
8251A Asynchronous Serial Interface provides a
means of communication with an ex.ternal pocket
terminal, standard CRT terminal or modern for test
box operations. The port is selected by the memory
decoders. An MC1488 and MC1489 provide RS232
level translation. A jumper' block allows the port to
appear as Data Terminal Equipment (DTE) or Data
Communications Equipment (DeE).
The unit responds to zero true inputs and provides
zero true outputs. When interfacing a controller to
the Pertec Transfer Adapter board, two 50 lead flat
cables (3M 3365-50 or equivalent) are required.
Figure
1-3
illustrates the Pertec Interface
Driver/Receiver configuration for the Model 9400.
Figure 1-4A and 1-4B show the general read and write
timing diagrams for the PERTEC Interface. Figures
1-4 through 1-10 provide the sequences of events tha t
occur during writing and reading for the Tri-Density
System.
I
I
CUSTOMER CONTROLLER
KENNEDY TRANSPORT
r- --L
SN7416 OR
EQUIVALENT
SN74lS14 OR
EQUIVALENT
3300
+5V
J
2200
SN74LS14
OR EQUIVALENT
~
3
300
.....,
l-
i.
~
L
OR
EQUIVALENT
SN7438
------,
---------------
110-0213
Figure 1-3
Driver/Receiver Interface Configuration
1-10
iTII
IOBY ---.
l06-9400-011D
I
J
IWO-ltP
L~~
IWSTR
,,--+-_1Z3OQ?
Il W0
T4-----.
T5_--__~
T6 - . - .
110.0221
NRZ I
PE
GCR NORMAL GCR LO SPEED
T1
DBY TO FIRST WRITE ST RO BE
~ 2 51ls
> 251ls
> 251ls
T2
WIDTH OF IWSTR{25% OF CELL TIME)
41ls
21ls
800ns
T3
HOLD TIME FOR THE WRITE DATA
LINES AFTER TRAILING EDGE OF
WRITE STROBE (IWSTR).
'::0
.::.0
~O
T4
WRITE DATA SET UP TIME. DATA
SHOULD BE SET UP WITHIN HALF
A DATA BYTE PERIOD AFTER THE
TRAILING EDGE OF EACH WRITE
STROBE (IWSTR+)
2:500n5
>-500ns
2. 500 n5
2:500ns
T5
PERIOD PER BYTE(@KILOBYTES/SEC)
161ls
(62.5KB/5)
81ls
(125KB/s)
3.2115
(312KB/s)
81ls
(125KB/s)
2:.500ns
2:,500ns
T6
LAST WORD(ILWD) SET UP TIME.
THIS SIGNAL SHOULD COINCIDE WITH
THE LAST DATA BYTE.
~O
~500ns
~251ls
21ls
Figure 1-4A
General Write Timing
~500ns
_l-
IDBY
r--
l06-9400-012D
T1
IRO-7sP
I RSTR
IF
u
ERRO~ I CER. IHER -----Il
IGO ------J{
I
I
T2~~_
T3---~
I~
T4~1
T5
----t
110.0222
--
NRZI
PE
GCR NORMAL
GCR LO SPEED
T1
DBY TO FIRST READ STROBE
>5011s
>32011s
>2 aOils
>32011s
T2
LEAD TIME OF READ DATA LINES
TO LEADING EDGE OF IRSTR
>500ns
>500ns
'::'500ns
>500ns
WIDTH OF READ STROBE{IRSTR)
>1.0J,J.s
I
I
>1.0I1s
>1.0J,J.s
'::1.0(1s
HOLD TIME OF READ DATA LINES
AFTER TRAILING EDGE OF IRSTR
NOMINAL DATA BYTE PERIOD
(KILOBYTES/SEC)
>2 J,J.S
I
>l(1s
~5
T3
T4
T5
t
>51ls
I
I
16.6(1s
(60KB/s)
DOn s
8.331ls
(120KB/s)
3.2~3.5Ils
(281KB/s)
(Burst@312KB/s)
81ls
(125KB/s)
Figure 1-48
General Read Timing
106-9400-013D
___---'n----- --
IREV
IWRT
U ________ _
u
lCO
IFBY
IOBY
lWSTR
LrlJU-u"""uu
I\rfP, IWO-7
u--l
I
lLWD
U
110-0214
Figure 1-4
GCR Write Timing
IREV
____
___
~n
lWRT
lCO
---- - ---- - -------------- - - - - - - - - - - - -- ------ ---- --
~n-
u
!FBY
lOSY
IRP, IRO-7
U
IRSTR
U
Ul.nrU1J
._--
Figure 1-5
GCR Read Timing
1-13
i
11 0-0215
I,
--------~
106-9400-014D
r------ .--.
I
IREV _ _ _ _....Jn~------:-----------
- - ---" -.
U _______________ _
IWRT
IWFM-----
U
IGO-----U
I FBY - - - - - - - - ,
IOBY _ _ _ _ _ _ _ _ _ _---,
110-0216
Figure 1-6
NRZI Write File Mark
__ _
~
IREV
IWRT
IGO
IFBY
. 1i
--- - - - - - n--------------------------
__'n-------------~---
--------~
u
I
IDBY
IRP, IRO-7
I
IRSTR
I
ICCG
I
I
I
I
I
LJI
rtSlJ
lflIlMJ1J
U U
i
110-0217
I
I
Figure 1-7
NRZI Read Timing
1-14
106-9400-015 D
n---------------- ----- --/
IREV'________
IWRT
U ___________ .... ______________ _
lGO------.
U
.,
IFBy-----_
ID8Y-------.....,
iwsn-----------lJlflf11lJ
-----u-L.J
I W P , I W O - 1 - - - - -......
ILWD
U
110-0218
Figure 1-8
NRZI Write Timing
IREV
IWRT
:~o
___-"'n- ---- ----- - ---------------
___---'n-- - - -------- --------------u
IFBY
IDBY
IRP, IRO-7
IRSTR
u-L.J
lfl1l.Jl1lJ
Figure 1-9
PE Read Timing
1-15
110-0219
106-9400-016D
lREV
lWRT
___--..In ---- - ----- - ----- -- --- - - u ___ ___________ _
~
u
lGO
IFBY
lDBY
IWSTR
lflJ1.nJlJ
IWP, lWO 7
LrL..J
ILWD
U
i
I
110-0220
I
I
Figure 1-10
PE Writ. Timing
All interface designs should be based on the following
criteria:
=
TRUE
FALSE
PULSES:
Minimum pulsewidth is 1 usec
=
HIGH
The input lines from the tape transport ere
terminated with a 220 ohm (5%) resistor to plus five
volts, and a 330 ohm (5%) resistor to ground (see
Figure 1-3). All input circuits have low level input
voltage of 0.8v maximum and a high level input
voltage of 2.0v minimum. The input receivers are all
74LS type circuits.
=
LEVELS:
LOW
1.6 INPUT SIGNALS
Ov (approx)
= +3v
The circuits are designed so that a disconnected wire
or removal of power at the driver results in a false
signal being interpreted at the receiver.
1.7 OUTPUT SIGNALS
The two interface cables connect. directly to JIOO and
J200 on the Pertec TAB as shown in Figure 1-11.
All output lines must be terminated at the far end of
the daisychained cable with a 220 ohm (5%) resistor
to plus five volts and a 330 ohm (5%) resistor to
ground. Output circuits are 7406 or 7438 TTL open
collector drivers as shown in Figure 1-3.
To connect the interface, the following must be
considered:
1. When connecting the TAB host I/O interface
cable, the length of the cable should be limited to
20 feet (6.1 m).
1.8 TAPE MOTION
2. Unless otherwise specified all host wires should be
28 AWG minimum, with a minimum insulation
thickness of 0.01 inch.
The tape transport capstan SERVO accelera tes the
tape to the required speed with a linear ramp. The
tape is also decelerated to stop with a linear ramp.
Start and Stop occurs within the interrecord gaps.
The ramp UP/DOWN time for GCR is 2.7 ms and for
PE/N RZI 4.5 ms.
Table 1-2 shows the Pertec Transfer Adapter board
pin layout and signal nomenclatures.
1-16
106-9400-017D
P!OO
--J
I
t-----4~
i
I
JIOO
PERTEC INTERFACE
BOARD
P200
.
n
J200
--
Figure 1-11
Interface Cable Connection
Interface
I/O Connection
PIOO/P200
Live
Pin
Controller to Interface
I
Ground
Pin
Signal Name
Mnemonic
FORMATTER BUSY
LAST WORD
WRITE DATA 4
INITIATE COMMAND
WRITE DATA.0
WRITE DATA 1
SPARE·
LOAD ON LINE
REVERSE/FORWARD
REWIND
WRITE DATA PARITY
WRITE DATA 7
WRITE DATA 3
WRITE DATA 6
WRITE DATA 2
WRITE DATA 5
WRITE/READ
NOT USED
EDIT
IFBY
IL\VD
PlOD-
I
L
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
- --
----- "-
---
Table 1-2
Pin/ Signal Charac te,.;stics
1-17
IW4
IGO
IWt}
IWI
ILOL
IREV
IREW
IWP
IW7
IW3
IW6
IW2
IW5
IWRT
IEDIT
.1
i
106-9400-018D
I
Interface
I/O Connection
PIOO/P200
I
Controller to Interface
i·
Live
Ground
Pin
Pin
Signal Name
Mnemonic
40
42
44
46
48
50
39
41
43
45
47
49
ERASE
WRITE FILE MARK
READ THRESHOLD 1
TRANSPORT ADDRESS
READ DATA 2
READ DATA 3
IERS
IWFM
ITHRI
ITADO
IRD2
IRD3
5
5
5
READ DATA PARITY
READ DATA t)
READ DATA 1
BEGINNING OF TAPE
READ DATA 4
READ DATA 7
READ DATA 6
HARD ERROR
FILE MARK
CHECK CHARACTER GATE/IDENTIFICATION
FORMATTER ENABLE
READ DATA 5
END OF TAPE
OFF LINE
NRZI
READY
REWINDING
FILE PROTECT
READ STROBE
WRITE STROBE
DATA BUSY
SPEED
CORRECT ERROR
ON LINE
TRANSPORT ADDRESS
FORMATTER ADDRESS
DENSITY SELECT
IRP
IRDO
IRDI
lBOT
IRD4
IRD7
IRD6
IHER
IfMK
ICCGID
IFEN
IRD5
IEOT
IOFL
JNRZI
lRDY
iRWD
IPROT
IRSTR
IW8TH
TDBY
ISPEED
leER
IONL
IT AD·1
IFAD
IDEN
P20o1
2
*3
4
6
8
10
12
14
**16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
5
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
* All odd pin numbers are ground except pins 1 and 3.
** ICCG and IOCNT line (I6) shared by NRZI and PE.
NOTE: REMOTE Tri-Density Selection is optional, in the present configuration
only Dual Remote Density is available per controller capability. See
dip-switch configuration flow diagram (Figure 1-12) for avail~ble
remote options.
_ _ _ _ _ _. _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ .. _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _.......I.
Table 1-2 (con't.)
Pin/Signal Characteristics
1-18
106-9400-019D
1.9 BASIC SIGNAL DEFINITIONS
The 9400 Tape Drive Unit is capable of executing the
com mands necessary to enable the modes of
operation described in the following paragraphs.
1.9.5 WRITE FILE MARK
The write file mark commrmd caus-es a file mark to
be written on tape.
Note
All commands except REWIND (IREW), and OFF LINE
(I0FL) are executed by sampling the logic states of
the REVERSE/FORWARD. (IREV), WRITE/READ
(IWRT), WRITE FILE MARK (IWFM), EDIT (IEDIT),
and ERASE (IERASE) interface lines, as given in
Table 1-3.
1.9.5.1
PE File Mark
When a write file mark is executed, the transport unit
generates a file mark consisting of 256 flux reversals
at 3200 frpi in channels P, 0, 2. 5, 6 and 7. Channels
1, 3, and 4 are dc-erased.
Note
REWIND and OFF LINE commands are executed
directly from the interface.
When reading, the unit will recognize a file mark if
there are at least 64 flux reversals in channels 2, 6,
and 7 with channels 1, 3, and 4 dc-erased. Channels
P, 0, and 5 are ignored for this test.
1.9.1 READ FORWARD
This command causes tape on' the selected transport
to be accelerated to the normal transport operating
speed. The transport genera tes the delays necessary
for proper positioning of transport read head in the
interblock gap (IBG), this is after it reads the first
record of data encountered and has decelerated the
tape to a stop.
The next block can be read by
supplying a new read forward com mand to the
transport prior to the completion of the tape
deceleration which improves access time to the next
block by as much as one ramp time.
1.9.5.2
N RZI File Mark
A NRZI write file mark command is generated by (]
unique one-character record.
This single data
character consists of a 1 bit in channels 3, 6, and 7
and a 0 bit in all other channels. The CRCC contains
all Os. The LRCC is equivalent to the single da ta
character.
The 9400 tape unit tests for the presence of the file
mark pattern during every read operation. When this
is detected, the. file mark (IFMK) interface line,
P200-14, is pulsed and the file mark character is
transmitted to the controller. ICCG asserts and the
LRCe is transmitted.
1.9.2 READ REVERSE
This command is similar to a read forward command
except that tape motion is in the reverse direction.
During the reverse· operation, the unit always resets
to the quiescent state when the BOT signal is present.
In this operation the head can be repositioned further
back in the gap after reading a record. The change in
position of the head is to facilitate the editing of a
record, and is done by the transport in response to an
EDIT command.
See paragraph 1.9.4 for EDIT
command.
1.9.5.3
GCR File Mark
Note
The flux reversal rate of 9042 frpi (356 frmm) is
equal to the number of bit cells per inch.
This
accommodates data, encoding, error checking, and
other overhead requirements. The data density is
6250 cpi (246 c/mm).
1.9.3 WRITE
In this operation the unit accelerates tape, and after
the appropriate prerecord delay time, begins to
transfer data from the controller to the transport.
This process continues until a LAST WORD (ILW D) is
received from the controller.
The file mark is specified as 250 to 400 flux
reversals, allIs, at 9042 frpi in channels 7,2,6,5, P,
and .0, and dc-erased in channels 3, 1, and 4.
1.9.6 ERASE VARIABLE LENGTH
The tape will continue to move forward until the
record has been read by the read head, then the tape
will be decelerated to a stop with the write head
properly located in the center of IBG.
The erase variable length com m,qnd causes tape to be
moved in the forward direction with erase current on.
A LAST WORD (ILWD), PIOO-4 signal from the
controller terminates the erase operation.
1.9.4 EDIT
Note
In this operation the write current is switched OFF
slowly at the end of an edit sequence, to minimize
the possibility of recording a glitch on tape.
In PE/GCR format, the 10 burst will not be erased
when an erase comm;md is given from BOT.
1-19
106-9400-020D
IREV
IWRT
IWPM
IEDIT
IERASE
Read Forward
H
H
H
H
H
Read Reverse (Normal)
L
H
H
H
H
Read Reverse (Edit)
L
H
H
L
H
Write
H
L
H
H
H
Edit
H
L
H
L
H
Write File Mark
H
L
L
H
H
Erase (Variable Length)
H
L
H
H
L
Erase (Fixed Length)
H
L
L
H
L
Space Forward
H
H
H
H.
L
Space Reverse
L
H
H
H
L
File Mark Search Forward
H
H
L
H
H
File Mark Search Reverse
L
H
L
H
H
File Mark Search Forward
(Ignore Da ta)
H
H
L
H
L
File Mark Search Reverse
(Ignore Da ta)
L
H
L
H
L
Security Erase
H
L
L
L
L
Command
L = Low = True
H = High = False
.
----"
-------
--- "_.------- - --
Table 1-3
Transport Commands
1-20
106-9400-021D
1.9.6.1
Erase Fixed Length
1 = 10 CONTROLLER TO TRANSPORT
.... "'P~ft~A"~
This command causes a 4.0 inch (10.16 cm) length of
tape to be erased.
..... __ nr "''' __
~I""'A'
f!!t>
';;;»'\OI'''''''''~
1.10.1 FORMATTER ADDRESS (IF AD)
LEVEL
1.9.6.2
Security Erase
The security erase command causes tape to be erased
from its present position to a point 3 to 5 feet after
EOT. Tape is then rewound to BOT.
P200-48
=
This is a le·vel (ex: high address 0, low ~ address 1)
which selects the formatter transport unit, in which
it will address.
Note
1.9.7 SPACE FORWARD
This command is similar to a read forward command
except that no Read Strobe (IRSTR) signals are
supplied to the controller.
Error checking is not
performed, but a test is made to determine if the
record spaced over was a file mark.
1.9.8 SPACE REVERSE
This is similar to a read reverse command except that
no (IRSTR) signals are supplied to the controller.
Here error checking is not performed. A test is made
to determine if the record spaced over was a file
mark.
The transport addresses are predetermined by
switches on the Pertec Interface board. This is also
true for the formatter addresses, density select, and
variable speed GCR. See dip switch configuration
flow diagram (Figure 1-12), for the options available
on the I/O lines of the interface. These options are
only made available with wire wrapped interface
boards.
1.10.2 TRANSPORT ADDRESS (ITADO/ ITAD1)
LEVEL
P100/200-46
This level selects -the transports
daisychained to each other.
which
may be
1.9.9 REWIND
The rewind command causes the transport to rewind
to BOT. In systems where more than on~ transport is
daisychained, it is possible to rewind several
transports while transferring data to or from another
transport in the chain.
1.9.10 FILE MARK SEARCH FORWARD/REVERSE
A file mark search foward command causes the
transport to execute a series of read forward
commands, while the reverse command causes the
transport to execute a series of read reverse
commands.
Both series are terminated by the
recognition of either a file mark character or the
EOT tab. Tape is stopped following the reading of a
file mark in a manner similar to terminating a normal
read operation.
If the BOT tab is encountered during a file mark
search operation, the operation is terminated. The
file mark sea,rch forward com mand may be combined
with a space forward command, thereby preventing
IRSTR, ICER, and IHER signals from being presented
at the transport unit to controller interface. The file
mark search reverse command may be combined with
a space reverse command, thereby preventing IRSTR,
leER, and IHER signals from being presented at the
transport unit to controller interface.
1.10.3 INITIATE COMMAND (IGO)
PULSE
P100-8
This pulse initiates the comm.9.nds given in Table 1-3.
On the trailing edge of IGO, the com mand lines
described in paragraphs 1.10.4 through 1.10.8 are
copied into the transport formatter and the formatter
busy signal (IFBY) is set low. IFBY is described in
section 1.11.1.
1.10.4 REVERSE/FORWARD (IREV)
LEVEL
P100-l8
This sig-nal speci fies forward or reverse tape motion.
When the signal goes low a reverse is executed; when
it goes high a forward com mand is executed.
1.10.5 WRITE/READ (IWRT)
LEVEL
P100-34
This signal specifies the operation mode of the
system. When the signal is Iowa write command is
executed; when the signal goes high a read command
is executed.
1.10.6 WRITE FILE MARK (IWFM)
1.9.11 OFF LINE (REWIND AND UNLOAD)
PULSE
This command places the unit under local control.
This also causes the tape transport to perform a
rewind/unload operation.
P100-42
This pulse causes a write file mark to be wI'itten on
the tape, if IW RT is also low during this time.
1-21
106-9400-022D
UNIT SELECT
LINES
FAD
TADO
TADl
REMOTE
DENSITY
r
4
ON/OFF
INTERPRET
IDEN
VARI-SPEED
GCR
~ REMOTE WILL LOOK AT (DUAL DENSITY) Z OF THE 3 DENSITIES ONLY.
~WHICH DENSITY IT LOOKS AT DEPENDS ON THE SETTING or SWITCHES
5 AND 6.
IOPTDF:;-';
:1>1-::-'
DENS:1 Y
C;CR
~RE"OTE HAS TRIDENSITY AVAILABLE, BASED ON OPTOEN LINE AND IDEN.
NOTE:
'IOPTDEN'IS A HARDWARE LINE WHICH MAY OR MAY ;-';01 I\/:; l 1 :l.:LEIJ.
IF IOPTDEN IS tiSED, THEN TABLE I IS Al-'l-'LICAULE. iF IUl-'l PI-::" :S
NOT USED THEN 'lDEN TOGETHER WITH SWITcHES" AND, SF LFtl
THE DENSITY.AS AN EXAMPLE ,:~WITCHES :;AND I. !IOTH OF,' ..\:-.U t\
HIGH 'lDEN' WILL SELECT GCR DENSITY.
Figure 1-12
PERTEC Interface Dip Switch Configuration
1-22
:-':/UI
I'E
:-':R/I
106-9400-023D
1.10.7 EDIT (IEDIT)
Note
Pluu-38
LEVEL
This com mana Will be executed only If the transport
is ready and on line. This com mana does not cause
the unit to become busy.
The edit signal is used in the following two ways:
1.10.11
1. Read Reverse:
Modifies the read reverse stop
delay to optimize head positioning when editing
tapes •
OFF LINE (IOFL)
PULSE
. 2. Write: The transport write current is turned off
gradually at the end of the record, thus preventing
an adjacent data record from being erased.
P200-24
When this line is pulsed the unit will go off line and
initiate a rewind command. After reaching BOT it
will unload tape. If the unit is already rewinding at
the time an off line com mand is given, the unit will
wait for BOT and perform an unload sequence.
1.10.8 ERASE (IERASE)
LEVEL
1.10.12
PIOO-40
PULSE
When IERASE and IWRT signals are low, the unit will
perform a dummy write command. The transport unit
will go through all the functions of a normal write
operation, but no data is recorded. The length of
tape erase is equ,ivaJent to the length of the dum my
record as defined by LAST WORD (ILWD) Paragraph
1.10.12.
1.10.13
P200-18
When true (low) this line enables the transport. When
false (high) it causes the unit to be reset to the
quiescent state.
1.10.14
1.10.9 DENSITY SELECT (IDEN)
(DUAL OR TRI-DENSITY)
PIOO-50
Note
Consult the dip switch flow diagram (Figure 1-12) for
available options in density select.
The switch
position will determine dual or tri-density operation.
WRITE DATA INPUTS OW
J
Track
Pin Loca tion
IWP
IWO
IW1
IW2
IW3
IW4
IW5
IW6
IW7
P100-22
PIOO-10
P100-12
P100-30
P100-26
P100-6
P100-32
P100-28
PIOO-24
These nine lines transmit write data from the
controller to the transport unit, to be written on
corresponding channels on tape. IW7 corresponds to
the least significant bit of the character.
This signal (dual density only) is used when the
transport density select switch is in remote position.
When true this signal selects the high write density.
Density will initially default to that of the mounted
tape (in read mode), then it can be manually or
remotely selected.
The first character of the data record should be
available on these lines within one character period
after IDBY goes true and should remain true until the
trailing edge of the first IWSTR pulse issued by the
microformatter. The next character must then be set
up in less than a half-character period. Subsequent
characters will be processed in this way until ILWD is
set low, indicating that the last character is being
transferred.
Table 1-4 identifies these lines with
regard to interface identification, track number and
IBM/PERTEC channel.
REWIND (IREW)
PULSE
FORMATTER ENABLE (IFEN)
LEVEL
The IERASE signal is also used to inhibit Read Strobe
(IRSTR) during a space operation (space forward or
space reverse NSPC) or file mark search opera tion.
1.10.10
P100-4
During a wri te or an erase com m 9nd, this pulse is
used to indicate that the next character to be strobed
into the transport unit is the last character of the
record.
Alternatively, if the IERASE, IWRT, and IWFM
signals are low, the unit will perform a dummy write
file mark operation. A fixed length of tape is erased,
approximately 4.0 inches (10.16 cm).
SIGNAL
LAST WORD (ILWO)
P100-20
IREW causes the selected transport to rewind to load
point (BOT mark).
1-23
106-9400-0240
.
USE WHEN HOST
~INARY
WEIGHT OF CHANNE L IS KNO IVN.
:;
(2)
4
(2)
WI
w2
W3
b
5
3
! {Z ~
2
(2 )
1
\2 )
0
(2)
w,
w6
W7
I
Ij
2
Y6
Y-:;
Y1
P
1
(2)
6
(2)
P
WO
4
1
WSEQ
YI:!
Y1
YI
Y4
DESKEW
Y2
Y3
YI
YO
Y4
Y7
YM
ECP
Y8
YO
Yb
Y3
Y7
Y:;
YI
HOST
(BINARY)
IBM/PERTE€:
CHANNEL NO
ANALOG
READ/WRITE
TRACK NO.
I
W4·
9
YO
Y2
Yi)
YO;
Y2
Y4
USE WHEN TRACK NO ON TAPE IS KNOWN.
TRACK
3
2
I
0
2
4
-:;
b
5
4
(2)
(2)
(2)
P
(2)
b
(2)
WSEQ
Y6
Y3
YO
YI:!
Y4
YI
DESKEW
YI:!
Yo
Y4
ECP
YI
Y4
Y7
HOST
(BINARY)
Y2
'(I:!
YO
Y3
Yl
YI,
1
'.
K
1
7
i
{21
(2)
(2)
Y7
n
YZ
Y1
YO
y::;
' ..
.,
Y7
Y"
Table 1-4
Track Identity
1 • 11 TRANSPORT CONTROLLER
INTERFACE SIGNALS
1.11.1 FORMATTER BUSY (IFBY)
LEVEL
1.11.3 CHECK CHAR ACTER GATE OCCG)
IDENTIFICATION (0)
PIOO-2
LEVEL
P200-16
NOTE
This interface line is shared bv N RZI. PE. and G C R
format. In the N RZI format, the signal is [CCG and
is set low by the transport unit when the read
information currently being transmitted to the
controller is either a CRCC or an LRCC. The signal
is high when data characters are being transmitted.
Data and check information can be distimruished bv
gating READ STROBE (IRSTR) with ICCG or it~
inverse.
This signal may be used by the controller to inhibi t
further commands.
When this status is issued, the IFBY goes low at the
trailing edge of IGO and remains low until tape unit
motion stops after execution of com mand.
1.11.2 DATA BUSY (lOBY)
LEVEL
P200-38
1.11.4 HARD ERROR (IHEF)
The IOBY signal goes low when the transport has
reached operating speed, traversed the IRG, and the
transport is about to read or write data.
IOBY
remains low until the data transfer is finished and the
appropriate post record delay is completed. 10BY
goes high at the same time that the capstan starts to
decelerate the tape. A new command may be given
when IDBY goes high for an on-the-fly operation.
On-the-fly comm!inds
must be of the same
Read/Write mode and the same tape direction.
PULSE
P200-12
This signal is set low if an uncorrectable read error is
detected by the transport uni t.
NOTE
All error information is reported to the controller
before DATA BUSY (IDBY) g'oes false.
1-24
106-9400-025D
1.11.12
1.11.5 CORRECTED ERROR (lCER)
PULSE
LEVEL
P200-42
The leER is used only in the PE mode. The signal is
set low by a single track dropout during a read or
reaa-after-write operation. ICER in a read-afterwrite operation indicates that the record should be
rewritten.
END OF TAPE (lEOT)
P200-22
When true this signal indicates EOT tab is at infrared
sensor.
1.11.13
TAPE SPEED (ISPEED)
LEVEL
P200-40
1.11.6 FILE MARK (IFMK)
When true this signal indicates that GCR mode is
PULSE
P200-14
File mark is pulsed when a file mark is detected
during read or read-after-write operations.
Error
conditions should be ignored when a file mark is
detected.
1.11. 7 READY (IRDY)
LEVEL
P200-28
This is a level which is true only when the transpor·t is
ready to receive external com mands; the following
condi tions must exist:
1.
2.
3.
4.
All interlocks made
Initial load or rewind sequence is complete
Transport is on line
Transport is not rewinding
1.11.14
P200-44
This level is true when the on line flip-flop is set,
indicating the transport is under remote control.
When false the transport is under local control.
PULSE
The first character must be available before the first
IWSTR is issued, and succeeding characters must be
set up within half a character period after the
trailing edge of each IWSTR pulse.
For a Write File Mark or Erase (Fixed Length)
com mand, the required
pattern
is generated
internally by the unit and IWSTR is pot used.
1.11.15
P200-30
FILE PROTECT (IFPT)
LEVEL
P200-32
The following will make this level true:
1. Power ON
2. Tape loaded and under tension
3. Supply ['eel has write enable ring removed
1.11.11
READ STROBE (IRSTR)
PULSE
This level is true when the transport is rewinding.
1.11.10
P200-36
The IWSTR line is pulsed for each data. character to
be written on tape.
The pulsewidth of IWSTR is
approximately 25 percent of a character time.
IWSTR samples the WRITE DATA lines OWP. IW&-7)
from the controller and copies this information,
character by character, into the transport unit write
logic.
1.11.9 REWINDING (IRWD)
LEVEL
WRITE STROBE (IWSTR)
This line is also active during Erase (Variable Length)
com mands; however, the data being co~ed into the
unit will not be written on tape.
.• 11.8 ON LINE (101)
LEVEL
seiected.
The READ STROBE line (IRSTR) is pulsed (1 usec
minimum pulsewidth) for each character of read
information (data, CRCe, and LRCC) to be
transmitted to the controller.
IRSTR is used to
sample the READ DATA lines ORP, IRO-7).
The transmission of check characters (CRCe and
LRCC) is flagged by the CHECK CHARACTER GATE
line (ICCG) and in the event of an all zeros character,
an IRSTR pulse is provided.
Note that although the average time between
adjacent IRSTR pulses (for PE and N RZI) is l/BV
where:
BEGINNING OF TAPE (lBOT)
B
=
packing density
LEVEL
v
=
tape veloci ty
P200-4
When true, this signal indicates that tape is at rest
lith the BOT tab at the infrar'ed sensor. Level goes
lalse after BOT tab leaves sensor.
P200-34
this time may vary considerably due to the combined
effects of bit crowding and skew. The minimum time
between adjacent pul~es is one half character period.
106-9400-0260
In GCR read strobe separation does not vary. Refer
to read timing diagrams (figures 1-4A through 1-10)
for additional timing information.
The dip switch flow diagram (Figure 1-12) is an
example of the various options available to the
controller (remotely) on the Pertec Interface.
1.11.16 READ DATA LINES
The flow diagram gives all possible switch positions
available.
Track
Pin Location
IRP
IRO
IRI
IR2
IR3
IR4
IR5
IR6
IR7
P200-1
P200-2
P200-3
PI00-48
PlOO-50
P200-6
P200-20
P200-l0
P200-8
Switches 1, 2, and 3 are for controlling the
formatter/transport address lines to the unit desired.
Switches 4, 5, and 6 are the switches that can control
dual or tri-densi ty selection (remotely).
NOTE
If switch 4 is on the ON position, the controller must
be capable of handling tri-density (GCR, NRZI, PE).
If the controller cannot handle tri-densi tv mode and
the switch is at the ON position, it will only be able
to write in a NRZI mode.
These nine lines transmit read data from the
transport unit to the controller. Each character read
from the tape is available by sampling IRP, IRO-7 in
parallel at IRSTR time.
Switches 7 and 8 are to vary the GCR speed.
Depending on the switch position, the ~peeds
available are:
Data remains set on IRP 9 IRO-7 for a full character
period. The corresponding ·IRSTR pulse is placed
centrally during the time that data is available.
1. 12 OPTIONAL CONTROLLER
REMOTE CONDITIONS
312 ({B/sec, average 281 in read mode equivalent
to 45 ips
NOTE
208 KB/sec, approximate to PE at 125 ips
The following optional remote conditions are only for
the units with a wire wrapped Pertec Interface board~
125 KB/sec, approximate to PE at 75 ips
1-26
SECTION II
INSTALLATION AND OPERATION
~
za
o
."
In
;l1li
...
~
o
z
0
Z
=
206-9400-001A
SECTION II
INSTALLATION AND OPERATION
Note
2. 1 INSTALLATION
2.1.1 SHIPPING CONTAINER
After removing the 9400 tape drive unit out of the
shipping container, save the carton, shipping
container, and shipping braces, for possible future
use.
With another person's help, lift the 9400 tape drive
out of the shipping container. When removing the
unit from the shipping container, be careful that the
dust cover (door) of the unit is secure to the body of
the tape drive by the shipping tape attached.
Perform the following steps after removing unit from
shipping container. See Figure 2-1 for shipping
container configuration.
i. Place the 9400 unit in its upright position.
2. Remove the shipping braces.
3. Remove attached shipping tape.
4. Prepare for inspection per paragraph 2.1.2.
- LID
- ....TITION
~
~ ~"
~,
././/
',~
'V.
",,,,""
Figure 2-1
Shipping Container
2-1
206-9400-002B
With the right- and left- hand slides securely fastened
to the rack (cabinet) and in the extended pOSition,
align the. quick disconnect strips (attached to the
sides of the unit) with the center tracks of the slides,
as shown in Figure 2-3.
2.1.2 INSPECTION
Prior to installation perform the following steps:
Visually inspect the entire 9400 unit for the following
shipping damage:
a. Misaligned parts
CAUTION
b. Cosmetic scratches or dents
To avoid personal injury and/or transport damage due
to dropping of uni t, secure transport in place by
aligning captive screws on each side with respective
threaded holes in the disconnect strips and tighten, as
shown in Figure 2:"3.
c. Foreign material that may have become lodged
in drive mechanism (vacuum columns, reel
hubs, ete.)
d. If any of the above mentioned (a, b, or c) is
found to be true, you should contact your
marketing representative.
After securing the transport to the tracks on the
cabinet, push unit towards cabinet until fully
engaged. It may now be locked by turning a lock
screw in front of the lower left-hand side of transport
fully clockwise.
2.1.3 MOUNTING
The transport unit requires 24.5 inches vertical
mounting space on a standard 19 inch rack. The
transport is mounted on a pair of slides which are
provided in the shipping container. The rack slides
must be mounted on customer's rack before unit can
be mounted.
To service/test transport's. electronics, turn lock
screw counterclockwise to unlock unit and extend
outward to service position.
2.1.4 SERVICE ACCESS
WARNING
To obtain access to the plug-in cards and control
electronics the unit must be extended forward on its
slides.
The voltage regula tor and servo power
assembly are mounted on the inside of the heat sink,
on the right-hand side of the transport.
9400 tape drive unit may cause personal injury when
in the extended service position if the mounting rack
is not properly secure to the ground and/or other
adjacen tracks.
The slides are equipped with a lockout mechanism,
shown in Figure 2-2, which prevents slide
overextension.
Each slide has a slide design a tor
which identifies the slide for right-hand or left-hand
mounting.
Circuit breakers and power connector are accessible
from the rear of the unit. Control electronics are
accessible in the left-hand side of the uni t.
For servicing, electronics test points are provided by
standoff pins on the circui t boards~ which are
identified by upper case letters near each test point.
Note
To ascertain that the slides are mounted correctly,
open one slide (of the pair) and look for the letters
RH (right-hand) or LH (left-hand) stamped directly
above the lockout lever, as shown in Figure 2-2.
2.1.5 SUPPLIED/REQUIRED ITEMS
Table 2-1 shows supplied and required items for the
9400 tape drive unit.
_ •• "'~ /
,"".~, rif
_"UIIII
/','
/
SlD£ DESIGNATO"
_I
CAPTIve - - '
'/...
f '
,...DmHOU--' '--.....;
,
/
"il'lO"~
IIO.IOIS
LOCKOUT i.!Vt,,-
Figure 2-2
Figure 2-3
Rack Slide Identification
Rail/Transport Mounting Assembly
2-2
206-9400-003A
Nomenclature·
Part Number
Qty I
b. Hold the reel flush against the hub flange and
~---------------------------------------I
1 !
O&M Manual
9400
113-0008-001
121-0198-003 (115v)
121-0198-104 (240v)
190-5507-001
291-4768-001
Empty 10.5" Reel
Power Cord
Optional
Slide & Rail Assy
Shipping Brace
secure it by t'ressing the hub latch
down~
1
1
c. Thread the tape along the path shown on the tape
threading diagram (Figure 2-4).
1
1
d. Holding the end of the tape, wrap a few clockwise
turns around the take-up reel.
Table 2-1
Supplied/Required Items
2.2.4 TAPE LOADING
After the tape is fully threaded, the unit is in position
to loa.d the tape.
Depressing the LOAD switch
energizes the reel servos and ini tia tes a load
sequence including vacuum column power up. The
tape advances to load point marker (BOT) and stops.
2.1.6 INTERCABLING DESCRIPTION (PERTEC)
Two 50-lead flat cables are used for transport-tocontroller interface. Interface lines to and from the
transport
are TTL compatible, single-ended.
Pulsewidtts are 200 nanoseconds or greater, unless
otherwise noted.
See Section I for interface
configura tion.
Note
If for some reason BOT is already past the sensor, for
example, when restoring power after shutdown or
from over-threading, tape will continue to move
forward for a few seconds and initiate rewind
command automatically until BOT is found.
2.1.6.1 50-Lead Flat Cable
The 50-lead flat cable should be 28 AWG and not
exceed a maximum limit of 20 feet (6.1 meters) in
length.
Once pressed, the LOAD switch is illuminated and
remains illuminated until power is turned off or tape
is unloaded from the unit.
2.1. 7 POWER-UP CONNECTIONS
CAUTION
If power is turned off the LOAD switch must be
depressed to load the tape again.
Make certain that line voltage is correct before
connecting unit to power source. See specification
table for correct power source usage.
2.2.5 PLACING TAPE UNIT ON LINE
A detachable power cord is supplied with the tape
unit. The power cord is 6.6 feet (115v) or 9.8 feet
(240v), and has a NEMA three prong (two power, one
chassis ground) ~\lug for connection to power source.
After unit is loaded and brought to the load point
(BOT), press the ON LINE pushbutton and make
certain the ON LINE indicator illuminates.
Note
Connect the power cord to the proper line source and
push primary power switch on control panel to ON
position.
All the front panel controls are disabled when the
tape unit is ON LINE, except for the density select
switch. The density select must be in the remote
position, in order to control the density remotely.
2.2 OPERATION
2.2.1 INTERFACE
ON LINE status enables the tape unit to be remotely
selected and to perform all norma.l operations under
the con.troller direction.
Interface operation and characteristics are outlined
and performed in Section I.
2.2.2 CONTROLS AND INDICATORS
2.2.6 UNIT OFF LINE
Figure 1-2 in Section I shows the controls and
indicators for the tape transport.
To take the unit OFF LINE, the· ON LINE switch must
manually be depressed again and the ON LINE LED
should go off. With the ON LINE mode off, the unit
can now be controlled by the control panel.
2.2.3 TAPE THREADING
To thread the tape on the transport, proceed as
follows (see Figure 2-4):
Note
a. Raise the latch of the quick-release hub and place
the tape reel to be used on the supply hub with the
write ellable ring side facing the transport deck.
When selecting density modes from the front panel,
the tape must be at BOT in order to operate the
DENSITY SELECT switch.
2-3
206-9400-004 B
VACUUM COLUMM
000
/
~ b~ ~
ElBEJ8b
o
=
0 0EJ
3gB
SUPPLY REEL
TAPE PATH
'-- HUB LATCH
TAKE - UP REEL
310·3056
Flgure.2-4
Tape Threading Diagram
2-4
206-9400-005B
2.2.7 TAPE UNLOADING AND REWINDING
2. Depress load switch, (LED will illuminate when
on). At this time the tape unit will power up
arid restore tape to BOT.
•
The 9400 can reiTiotely tew ina a iape io BOT however
this operation can also be performed manually as
follows:
d. Now that the tape is at BOT, depress the LOAD
button so that the LED will go OFF.
a. If the ON LINE indicator is illuminated, press the
ON LINE pushbutton. The ON LINE indicator
should turn off.
After step d, the vacuum column will shut down and
the tape will slowly un thread itself onto the master
reel in its unload sequence.
b. Press the REWIND pushbutton. The tape will now
rewind to BOT.
To load another tape onto the unit proceed to
paragraphs 2.2.3;"2.2.5 and follow exact sequence
given.
c. Press load switch, LED should turn off. The unit
will now go through an unload sequence,' turning
off the vacuum columns and rewinding tape
entirely on to the master reel.
2.2.8 POWER SHUTDOWN
2.2.8.1 Panel Power Switch
In the event the power switch is turned off during
rewind or forward mode, the unit will immediately
shut down; it will not take up the tension on the tape.
In the event the power source line fails while writing
or reading on tape, the unit will immediately shut
down. In this shutdown the tape will not rewind or
take up tension. On power up tape must be reloaded.
After the tape is loaded the controller can now
search for the ,data block on which it was on and
continue.
Note
If power source is completely lost when rewinding,
the unit will shut down and not rewind or tension
tape. If this happens proceed as follows:
1. Reset circuit breaker (change fuses if your
unit contains fuses), and restore power source.
2-5
SECTION III
THEORY OF OPERATION
~
%
III
0
:l1li:'
-<
CIt
III
0
n
.,.
0
Z
~
0
III
:l1li:'
~
~
0
z
::!
-
THEORY OF OPERATION
3.0
sections
3.1 through 3.5.3.8 of this portion of the manual gives a
brief description and general overview of the 94~~ Tri-density Tape
System. The remalnlng sections of chapter three gives a detailed
description of the system and references the schematics in section VI.
GENERAL INTRODUCTION
3.1
The 94~~ Tri-density Tape System (TTS) provides high speed,
mass storage by providing three modes of operation, the:
low cost
1) 8~~ bpi NRZI (75 ips) mode is provided for Industry Standard
interchangeability at a nominal data rate of 6~ kilobytes per second.
2) 16~~ bpi PE (75 ips) mode provides a medium density storage
capability at a nominal data rate of 12~ kilobytes per second.
3) 6250 bpi GCR (45 ips) mode provides high density storage and high
data reliability at a nominal data rate of 280 kilobytes per second.
The formatter for. the three modes is embedded in the 9400 system
electronics which allows for interfacing through a Host I/O interface.
The system utilizes the proven technology of the 9100 mechanical tape
path and servo design and combines this technology wi th the latest
state-of-the-art electronic advancements.
This includes bi t
sl ice
micr~processor
technology, an 8088 microprocessor, and a RS-232-C
diagnostic port.
SYSTEM CONFIGURATION
3.2
The 94~~ TTS can be divided into several
following:
1
I/O Host Interface
2
System Processor
3
Write Data Handler
4
Front Panel (Keyboard)
5
Analog Read/Write Amps
3-1
subsyste~s
consisting of the
306-9400-002A
6
Read Decoders I and II
7
Read Data Handler
8
Servo/Tape Transport/Vacuum System
9
Power Supplies
The various subsystems are
illustrat~d
3.2.1
I/O HOST INTERFACE
in figure
3~1.
Because of the modular design of the system a number of Host
interfaces
can be interchanged with only the replacement· of an
interface card.
The
four customized interface cards consist of the
following:
1)
Pertec
2)
pico
3)
STC
4) Telex
All interfaces are field interchangeable, single PC boards. Specific
data on each interface will be found in Section I of this manual.
PERTECINTERFACE
3.2.1.1
The Pertec interface is an Industry Standard which is configured with
two 50 pin flat ribbon cable connectors.
The interface has 16 Data
Lines, 19 Status Lines and 15 Command lines.
Pica INTERFACE
3.2.1.2
The
pico
interface
is
configured
3-2
with
a
34
pin
flat
cable
UYlOARO
VAC SYSTEM
POWER SUPPLY
I}
L -_________________________________________________________- - ,
I
HOST
K
lI
I
SYSTEM PROCESSOR
WRITE HANDLER
I
I
I
RS232 DIAGNOSTIC PORT -,
w
I
w
G---·
REEl
WRITE
DRIVERS
SE RVO
READ
HANDLER
READ
DECODERS
AG C
READ AMPS I - __ _ ....
_...--.-.}
D.":.DRS
~
~
P"-AMPS
--
READ/WRITE
--:-
HEADS
CAP STAN 1-------4
A
I
fr
1.-._ _-1
D
L _ _ _ _ _ _ _ _ _ _ _.....I
,---.
1.___.________
...J
1--___________________________________________ _
31 0- 3059
FIgure 3-1
94'00 System Block DIagram
306-9400-004A
connector
which
capabilities:
.includes
17
single
1) 8
bi-directional bus lines
2)
uni-directional parity lines
2
3) 6
uni-directional control lines
4)
Cable Monitor
1
lines
with
the
following
The interface supports transfer rates up to 312 kilobytes per second,
and provides Error status and Configuration information.
3.2.1.3
STCINTERFACE
The STC interface is configured with a 30 conductor twisted
(input signals) and a 60 conductor flat cable (output signals).
host
configuration will control up to 4 tape drives.
pair
The
TELEX INTERFACE
3.2.1.4
The Telex interface is
configured wi th three 25 pin connectors.
The interface has 61 signal lines providing digital information which
includes:
1) 3 Addressing lines
2)
2 Density lines
3 ) 6 Command and Command clock lines
4) 22 Status lines from the formatter
Error Status bytes
5)
4
6)
19 Data Operation lines
The Telex controller may be able to interface. wi th
9400's, depending ·Qn the controller and host.
3.2.2
SYSTEM PROCESSOR'
3-4
up
to
8
model
306-9400-00SA
The 9400 utilizes an Intel 8088 16 bit CPU with an 8 oit data bus.
The System Processor has contl=ol over the Keyboard, Read/Write Data
Handlers,
Servo/Tape
transport
System,
Read
Decoders,
Analog
Read/Write amplifiers, the Power Supplies and Vacuum System.
The
System Processor circuitry supplies a SMHz System clock as well as a
2.SMHz peripheral clock, Reset and Ready lines. The major portion of
the operating" software is accessed by 15 prioritized interrupts. The
System Processor block diagram, is shown in figure 3.2.
3.2.3
WRITE DATA HANDLER
The Write Data Handler (fig. 3.3) encodes data received from the Host
Interface or the System Processor FIFO, into GCR, PE, or NRZI for~at
and outputs a real-time encoded data stream to the write amplifiers. "
The write handler
also writes tape
and ID marks depending on the
chosen formats
3.2.4
FRONT PANEL
The front panel is an Intel 8279-5 programmable Keyboard/Display I/O
Interface configured with a vacuum switch (internal to the system), a
Power switch, 9 panel switches, "13 LED indicators, and two LED
displays. The Front Panel Keyboard operates in a decoded scan sensor
matrix mode with an ISWITCH interrupt generated whenever a switch is
pressed or released.
Key status (open or closed) is stored in RAM
addressable by the CPU.
The" keyboard allows operator control of the
system and diagnostic test routines.
3.2.5
ANALOG READIWRITE AMPS
The Analog Read/Write circuitry comprises the input Data section of
the system.
Figure 3.4,
a block diagram of the Analog Read/Write
board, illustrates the following:
1 ) WRITE HEAD DRIVERS:
Nine wr i te head dr i vers force a constant
current through each track of the wr i te head. A si:nple square-wave
drive is used.
3-5
CPU ..
CLK GEN
SYSTEM
CONTROL
SToRE ROM
AND RAM
DO BUS
ATA BUS
DATA RATE
GEN
IIOST
IFACE
AI"D
c!':TRL
-
t
"--r
......
INTERRUPT
CONTROLLER
.-..J
r-
,-
r
1
II
ADDRE:SS DECODE
f-t-
,
Repl'
EST Bl'S
I
"
[-
"
,
TIMERS
~
B
-----
I
1
-~
(NOT ON SYSTEM
PROC ESSORI
I
DlAGNOSTJC - - INTERFACE
~
-.
\' AC&'SNS
I'FACE
I
I
DHGNOSTlC
SWITCHES"
DISPLAY
I
~
~I'~'-
~
I
K'BRD ..
AMPS '
I'FACE
I
I
I
,I
I
I--
FIFO
RAM MEMORY
'-f;::;:
... ..
SYS DEC~~p ADDRESS BL'S
FIFO
DATA
PATH
eNTRL
-f
EOT
BOT
SNSR
I
-,
FIFO ADDRESS
&.
eNTRL
VAC
SNSR
I
I
I
---------
wR TE OAT 1', FRO~ HOST
READ 0 ATA TO HOST
I
,__ - -- -,
I
i
DEVICE SELECT
---'r',.
~
f
SERIAL
1 ,--- ---
~
w
0'\
BAUD
RATE
GEN
f.--e-.
SYS DATA Bl'S
, c~
~
SRVO,
\"PCKR
&.
RD DCDR
I'FACE
-----
rr
I
SYSTF.M PROCESSOR
Figure 3-2
System Processo! Block Diagram
SYS
BlIS
I
I
L..--
1-
-- -
-
----....
I
WRT
I'FACE
----.-.
---
--,--
-
r--
,
WRT IIDLRl
I'FACE
i
I
KBRD
AND
AMPS
CBLS
READ
I'FACE
I
CLK
(FROM SYSTEM
CONDITION
CODE MUX t - - - - - - -__~
CNTRL _ _ _ _ _ _ __
PROCESSOR)
CNTRL
STORE
PIPE
'--1-1-------------....
w
DONE
(TO SYSTEM
PROCESSOR)
I
-J
OPFRAND
LERO
SF l.ECT __- , - - - LOGIC
A ill'S
1:\ I'l"[
DATA
PARITY
ALt'
RESIDCAL
CHARACTER
SWAP
•
eRe
RF.G
"------~,---
~
AIX
Y nl'S
l~
+t
--~---
Ol'T
LTCH
____ Ot'TPl'T
DATA
no
II Bl'S
A~~ALo(;
-~-------~
WRITE SF<.jl'ENCEH
FIgure 3-3
WrIte Data Handler Block DIagram
WRITE)
__----_AGC E~N_~-A__~
PREAMP
'-i=8--~""-~-f.
~~
kit
L
WRiTr.
I
(j-
I
~
~
AGC
FIL TER
'
TIIRESH
ALL
I,
ANAI-O(i Rill WRT lIlTS
Ol'TPl'T~-_-RD DATA
PEAK
...-
.....--1 DF:TECT.--~~-I
LATCH
SLP£': c!,\TRL
ii,
lWRT
I l~
TO S':STEM
I
FXD
HIILO
GArN SEL
'
~r~1
..
PEAK
FOLLOWER
ATTENCATION
WRITE
--J-.Plli ER
00
I
DIAGNOSTIC MODE
SELECT - - - _ - - , .
-_j
CArN~
ADJ
I
..
_--~TlIRES
IIEADS
w
AGC
"EN SEI
WRT EN
F.RASE
~
WRT nAT:\
,---------------PROCES:;OR
A[\;AI.OC;
RDI WRT
CONTROl.
CNTRL
READI WRITE A"'ALOC
L _ _ _ _ _ _ _ _ _ _. .~
.
Figure 3-4
Analog Read/Write Block Diagram
AGe EN
OtT
306-9400-009A
2 ) READ AMPLIFIERS": Nine equalized read amplifiers filter the data
pulses from the read head/preamp assembly to minimize ~peak-shift~ and
noise.
·
3 ) THRESHOLDING:
Each
read channel
incorporates
a
programmable
threshold detector.
The threshold can be set using the onboard DAC,
or a variable threshold which is a fixed percentage of the signal.'
The threshold establishes the minimum signal amplitude that can be
detected as a valid signal.
4 ) PEAK FOLLOWER: Each read channel incorporates circuitry that produces a variable DC voltage roughly equal to the peak-to-peak
ampl i tude
of the readback signal. The pr imary function of thi s
signal is to establish the automatic threshold during read-only
operation.
5 ) AUTOMATIC GAIN CONTROL: The peak follower signal is sampled, filtered and fedback to the preamp board assembly as a form of gain
control in the read-only mode.
6 ) HIGH/LOW GAIN: The gain is a selectable function in which a known
degree of attentuation can be introduced ahead of the read amplifiers
to normal ize all read channels to the same output signal level. The
degree of attenuation
can be independently adj usted by' separate
potentiometers for each channel (potentiometers are effective only
when low gain is selected).
7 ) PEAK DETECTOR: The peaks of the analog read waveform are detected
and outputted as log ie-level transi tions after being gated by. the
thresholding circuitry.
S)
DIAGNOSTICS:
Three
levels
of
programmable
diagnostics
axe
available:
direct coupling of the write input to the read output;
injection of a filtered portion of the write signal into the read amp
input; and
crossfeed coupling of the write signal into the read
preamp through the head itself.
9 ) WRITE DIAGNOSTICS: The total write head current can be monitored
and
compared
wi th
the
expected
normal
range
for
the
densi ty
selected.
Any deviation from this range generates an error signal
which can be noted by the System Processor.
This test is carried on
off line under operator control. The erase head can also be monitored
by a status line.
10) SYSTEM INTERFACE: The status and functions of the Read/Write board
are
interfaced
to
the
System
Processor
board
by
an "S255A-5
programmable peripheral Interface (PPI) chip.
3.2.6
READ DECODERS I AND II
.~
The
Read
Decoders
(fig. 3.5)
track
3-9
the
tape .speed
and
generate
i
......
z
0(
c-t
<
al
~
~
til
Zz z
~o
;JX
Q Q
.:l 0
al
~
lS
z
Z
>
z
....
N
SYN EN
0
U
>
t.l
\&,
i::
Er-:V CLK
LOGIC
f:r-:V
S 32
I
r-'
CLK
I'RZ EN
JAM/
W
CSl
S YI'CtlRONIZAT ION
(lAP CLK
PLL
IUF'l
0(
;,::
0(
~ t-t
0(
0(
0
<
0(
til
~ 0
0(
o
III
:.:: :.::
~
~
U U
:-.,; U
0::
Z
""Z
1.0 DEN
....
'"
DI<\\;-
RD GATE
0_
U +
>z
NOSTIC
INTERFACE
TRK EN
CTRCO
~
N
N
....;
(j
'"
0
0
>
:>
.J
0
U
U
:>
-
VCOlZ FOR TRACKS 4. S, bAND
VC03Z FOR TRACKS l,lS. ~ ARE
WIRED GP SIMILARLY •
:il
til
t..l
I-<
0::
0
0(
00::
:Jl:Jl
o(W
:Jl:::
t.l~
0::
0
Z
0<
1-<:1;
Figure 3-6
Read Decoder I " II Block Diagram
(Sheet 1 of 2)
t.l
N
:.::
Z
t.l
<
0
W
~
Q
~
t.l
Z
Z
t.l
~
0..
;..::J
READ DECODERS
0(
u
0
II.. Z
~
~
0
~
II..
CTRCO ______________,______
PLOT RK EN
RD GAl'E E N - La W DEN - - - - - - - - - 1 1 - -_ _ __
EN V N
!
~
---ttr------4·-----
LOOP CNTRL BUS
:
I
.~ <
YI-_--~
DATA
J
---I
\'CO.31
eLK N
w
I
~
I
SYNC
STRIl
DlGI.
TAL
DON'" StlOT
I--'
I--'
~ X
- L -____
RE:n:RANCE
-
~A...1 :~
A
~ __ '~ ~~""> D
-
~
...1
~
U
A(J~ISITION
~
---I----~...
-
rl
_I
I
DEN
.....,~!TY-
Ntl
-
~~
G
~ ~ ~
DATA IN--QQ
SLIVER
SA JMPR
GEN
I
~
~
-.
PH(\SE
o~
a:
DETECTOR
'
,-+______
-
ADJACENT TRACK
REFERENCE
COUNTER
b
,--JI
NRZCLK
.~
NRZ EN
SEL"
A
I
~
N
v.
0
II----DDAT N
DC K N
DATA
ISEL
-.~
DIGl- - I TAL
tj
S12CLK----IDELAV
J J
NFCCLK
PER TRACK PHASE LOCK· LOOPS
Figure 3-6
Read Decoder I • II Block Diagram
(Sheet 2 of 2)
ROL-1ll1~ .. _ e---
11----"'-=6;"-~-+-~L DECODER .I------DSTB N
..r -~Lf----~---+----------------DATA STRB N
VCO]21-
~::. ~
3
SA DATA
ENVELOPE
ENV C L K - - - - - - - - - - - - I COt.:NTER
L
ENV HLD
TIME SEL
,~
y___
_________---=..__..+-_L:::t0=Op :&,ONT
L-t-_~~---------~----~R~E~·A~D~P~A~TnA~S~·T~AR~R______ _____
ENVELOPE N
~:~C
VCO
~__~VC012~L-~~
L -_ _ _ _ _ _ _ _
l'rl_
REF CNTR..UPDATE INHJIIlT
~?~"
,---.... v;..;:C;;.;O:.-:P~H.:.:A~S:::E=.!S::-......
_
~~~!----~~~~-----~---~~----~.
A~CK REF 5J'RIl
TOR
~
~
~ ~
~
,U
L--__-.,..~_-+-+-__I........l~,~ t-----------~.--+_-_.5f__j>
><::S
~
OVER
XOVER
""DETEC ~~LPSLT _ _ _~__~
1
LOOP AMP AND
} f L>
TEF
R
I[
____
L-----,.-
_
....
g; A
SELECTOR
SEL
~ELOPE
SELECTOR
I
'---1
f~t~6T
SEL
U
I
T RACK EN
CTRCO
T RACK1NG MOOE
DETECTOR
r-
"I
---F:SKF: W PROCESSOR
Figure 3-6
Read Data Handler Block Diagram
(Sheet 1 of 2)
POINTER
PRIOIUTY
LOGIC
...
Bl·FWUT
~I>ATA 01·1' '--_ _ _---'
E MASK
DESKEW
DESKEW HA:"JDSHAKE
_ _ _ REAL TIME STATUS
END OF RECORD STATl'S
----------~>+-t.
~o-.rl---(L.O--t RAMP
~------------~~~~-
J~a
GEN
CYT>-~
CAPSTAN
CURRENT
STATUS
4!1VS
VACI
DIAG.
NOSTJ
VOLT.
METE ......._ -
nus
ACTIVITY
MON
--n
TACH
,~~====~------------~
r----------------~-~--------~~
D:i
~
Sl:PPLY
...
COLl:MN I _+_~~~~
POSITION tSENSOR
~ ~~ Ie;;~
Z Z
Z
FEED
FORWARD
,a-.
~
I
SUPPLY
MOTOR
~----~------~----~
SUPPLY
MOTOR
~"RRENT
TAKE UP
COLUMN
POSITION t-----:II:-----tl~
-,~
SENSOR
.::>01
...
FEED
FORWARD
VOLTAGE MODE
TAKE UP
TAKE UP
MOTOR
~------------~----1
,
TAKE UP
MOTOR
Cl'RRENT
SERVO
Figure 3-7
Servo/Tape TranSDort Block Diagram
ot CAPSTAN
~
MOTOR
306-9400-0017A
METALLIZED MYLAR DIAPHRAGM
~P.C. BOARD
110-0110
Figure 3-8
Vacuum Sensor Assembly
3-17
306-9400-0018A
data. NRZ1 data is 9-track, 800 cpi (32 c/mm), compared to Phase
Encoded (PE), which is 9~track, 1600 cpi (63 c/mm). A comparison of PE
and NRZ1 formats is shown in figure 3.9.
In 9-track NRZ1 format (fig. 3.10) a Cyclic Redundancy Check Character
(CRCC) is used within the block structure to provide error information
for subsequent error correction. vertical parity (excluding CRee) in
the 9-track format is always odd.
3.3.2
DATA
NRZ1 data is characterized as follows:
1) A 'I' bit corresponds to a flux transition, of either polarity~ in
the center of the bit -cellon tape.
This corresponds to a logic true
'I' on the WRITE DATA interface line to the transport during a Write
operation.
2) A '0' bit corresponds to the lack of a flux transition at the
center of the bit cellon tape. This corresponds to a logic false '0'
on the WRITE DATA interface line to the transport during a Write
operation.
3.3.3
DATA RECORD
A record of NRZI data may contain between 18 and 2048 characters. This
is in accordance with the ANSI Specification for 800 cpi NRZI
recording. The 9400 is capable of reading or writing data records
containing a minimum of one character (single character blocks are not
recommended since a dropout may cause a single character block to be
mistaken for a filemark). The firmware limitation to the maximum
number of data characters that may be included in a record is 64K.
Channel P on tape is written to provide odd parity for all data
characters. Nominal spacing between characters is 1250 uinches (3175
um) •
3.3.4
CYCLIC REDUNDANCY CHECK CHARACTER
The Cyclic Redundancy Check Character (CRCe) is written on tape after
a four character delay "from the last data character. The CRCC is
3-18
3~6-940~-~~19A
BIT CEllS
,
lIT PATTERN
(DATAl
I
NlZl
I
I.
G
l'--_______
f
•
J
I
I
PE
1 FLUX POlAIITY OF INTEIl810CK GAP
PHASE SIT SHIFT TlMf
J DATA BIT SHIFT TIME
Figure 3-9
NRZ 1 " PE Comparison
- - - - - - "URWARD MOTION IHEAD RELATIVE TO
DATA
REFEREMCE
EDGE
(3.0 inch)
....
• CHARACTER
18 CHARACTER MINIMUM
2018 CHARACTER MAXIMUM
PERIODS
TA~I
I. eHA~AeTER. ..
I
PE RIOOS
NOTES:
YA~
SHOWN WItH OXIDE SIDE uP
CHANNELS 0-7 CONTAIN DATA SITS IN DESCENDING ORDER OF SIGNIFICANCE
CHANIIfl P (PARITY) AlWAYS CONTAINS ODD DATA PAIITY (EXCEPT CReC1
• EACH lilt OF THE lRCC IS SUCH THAT THE TOTAL NUMBER OF 1 BITS IN THAT TRACK
(INClUDING THE CReC AND THE LReCI IS MN IN THE 9.TRACK FORMAT. THE lRCC
Will NEVEl. AN AlL-Oi CHAIACnl
IT IS POSSIBlE FOI THIS CReC CHAIlACltI TO BE All 01. IN WHICH CASf A lEAD
OATA STIOtIf WIU NOT BE GENEIATED
6 A FilE MAIIt IS A SINGU CHAIACltR RECORD HAVING I BITS IN CHANNELS 3 6
ANO 7 FOIIOTH THE DATA CHAIACTER AND THE lReC THE CReC CONTAINS All 01
THIS IfCORD IS SEPAIATED 8Y U 9".,,,, 13 5 ,,,,clole-s' FIlOM THE pv(\lIOUS IlECOILO AND
SY A NORMAl IIG (15 2. ",,,,/0 6 ....c h I FROM THE FOlLOWING RfCOIlO
7 OATA PACkiNG OENSITY IS FIXED AT 32
C"''''
/BOO co'l
Figure 3-10
9-Track NRZ1 Format
3-19
r
~--
,-
CRCC
I
----4...
I
INTEIl810CK GAP
LRce
(06,"'ctl!
152. ".,,,.,
lllEXT
DATA RECORD
306-9400-0020A
generated in accordance with the ANSI Specification for 800 cpi NRZl
magnetic tape recording.
3.3.5
LONGITUDINAL REDUNDANCY CHECK CHARACTER
The Longitudinal Redundancy Check Character (LRCC) is written on tape
after a four character delay from the CRCC. The data in this character
is such that the total number of '1' bi ts in a track (including the
CRCC and LRCC) is even. The LRCC will never be an all '0's character.
The LRCC is generated by the reset of the write register in the tape
transport. The LRCC also serves to set the tape magnetization in the
proper direction for the Inter Record Gap (IRG).
3.3.6
FILE MARK
When ex~cuting a Write File Mark command, the formatter generates a
unique one-character record. This single data character consists of a
'1' bit in Channels 3, 6, and 7 and a '0' bit in all other channels.
The CRCC contains all '0's. The LRCC is equivalent to the single data
character. Figure 3.11 illustrates the NRZI formats.
3.3.1
ERROR DETECTION
In the NRZI format, all deskewing functions during a read operation
are per formed in the tape transport. The 9400 recei ves a 9-bi t word
from the transport and relays this word to the customer's controller.
A HARD ERROR (HER) is generated by the 9400 unit if any of the
following read errors occur:
1) A data character is read from tape containing even parity.
2) A CRC error is detected. (The 9400 performs complete CRC checking;
the received CRC must be exactly correct in all 9 bits).
3) Longitudinal parity on any track is odd.
4) A track dropout occurs in such a way as to cause more than two
check characters, i.e., CRCC and LRCC, to be detected when the 9400
unit interprets the dropout as an end-of-record condition.
3-20
306-9400-0021A
All of the foregoing errors except (4) are checked during both Read
Forward and Read Reverse operations. The error described in (4) is
checked only during Read Forward operations.
PHASE ENCODED (PE) FORMAT
3.4
The FE overall tape format is illustrated in figure 3.12. portions of
this format are discussed in paragraphs 3.4:1 and 3.4.2.
PE MODE DATA BLOCK FORMAT
3.4.1
Figure 3.13 details the format for the data block. The preamble
consists of 40 characters of '0 t s followed by a '1' character. A
character is defined as nine bi ts' in parallel, one bi t per track
(channel) .. The postamble consists of a '1' character followed by 40
characters of '0's.
3.4.2
PE MODE TAPE MARK FORMAT
Figure 3.14 detai ls the tape mark format used in PE mode. The tape
mark is a special control block consisting of 64 to 256 flux reversals
at 3200 flu x rever sal s pe r inc h (f r pi) ( 126 f r /mm) inc ha nne 1 s 2, 6,
and 7. Channels 1, 3, and 4 are dc-erased. Channels 5, P, and 0, in
any combination, may be dc-erased or recorded in the manner stated for
channels 2, 6, and 7. The 9400 TTS system uses 80 flux reversals in a
tape mark.
3.5
GROUP-CODED RECORDING (GCR) FORMAT
The recording format for GCR, operating at a character density of 6250
bpi, is described in the following text.
3.5.1
The
GCR OVERALL TAPE FORMAT
Density
Identification
Area
in
3-21
the
GCR
recording
format
is
306-9400-0022A
80 FLUX CHANGES
AT 3.200 frpi (4() PHASE
ENCODED O-lITSI
TAPE
TRACKS
TAPE
TRACKS
l
4
..
I
6
11111111111
: 1111111111
0
I
I
I
0
I
2
2
11111111111
11111111111
PI
11111111111
.,3
11111111111
S
l
6
>
I
EIGHT liT
SP.o\CES ---..
"
.... .,
I
3
5
11M NiNE-TI.o\CIC
IllINE TIfACK 1II1f11 F'lE MAlhi
PHASE (NCOD£D Fill MAlhi:·
• .o\NSI SItECIFICATI()NS DEFINE 4 FilE M.o\RK AS .0\ SPECIAl CONTROL
IlOCIC CONSISTING Of 64 TO 156 FLUX REVERSALS '.o\T 3200 Irpil IN
CHANNELS 2. 6 AND 7. CHANNELS 1.3 AND 4 AI£ DC (lASED.
CHANNElS p. 0 AND 5 ',N .o\NY COMIIN.o\TlONI MAY IE DC ERASED
OII(COIDEO IN THE MANNEI STAreD FOI CHANNElS 2. 6 AND".
Figure 3-11
NRZ 1 File Mark
LEGEND:
F
•
INtTlAt.r-IlOCK
G»
43.18_(1
.7 incJ,)
76.2_
(3.0 inchftl
1-12.7
1 (0.5 incJ,1
PltEAMIlE
"
41
CHARACTERS
I
INTU-IlOCIC GA#
15.24 .....
(0.6 incJ,)
I -DATA
POSTAMllE
.1 CHARACTUS
0.029 inc+. = 0.7366 .....
O.OIM inch = 2.1336 .....
l
0.139 inch .. 3.5306 .....
0.194 inch = •• 9267 """
0.2.9 inch = 6.32<&6 """
O.~ inch = 7.7216 .....
0.359 inch - 9.1186 1M!
0 •• 1. inch = 10.5156"""
0.<&69 inch' 11.0126"""
0 •• 98 inch = 12.6492 """ 1 0 .0508 """
1
MOST
8
~
111111111"""1111"11"1111
IDENTIFICATION
iUln
.--LEAST
I
r----~
L...!~ !..AI_~
_
_
FORWARD TAPE MOTION
RESULTANT RECORDING DIRECTION
NOTES:
1•
1,092(0.Got3 incJ,)
~
o
o
TAPE IS SHOWN WITH 0 XlDE S IDE UP.
2.
TAPE TO IE fUllY SATURATED IN THE ERASED DIRECTION
IN THE INT£I-II OCK GAP AND THE INITIAL GAP.
3.
THE IDENTIFICATION IURST MUST EXTEND PAST THE END
OF THE lOT MARKER.
4.
THERE IS A TUCK PLACEMENT TOLERANCE OF
( • 0.003 inch) FOR EACH TRACK.
Figure 3-12
PE Tape Format
3-22
t
0.0762"""
3'06 - 9400 - 0 0 23 A
a.-25I FLUX CHANGES
AT 121 fr/mm (3200 frpil
(
rvo
,C<
~( I """"'
&
Ie,
Ie.
rvo
~( I
[L,
lei!
""
letS
rv-;
ICI!
n.n
Ica.
11
Figure 5-7
5-11
Read Handler
506-9400-012 A
(2)
(3)
~
! ~:-:'-'--@-::--.:---'J~m~~,~~~~1~~:;;
n'Y)o :@L: . : : .: @'.
'i
'~~~~~~~~~~~.~~~@
tE'
...
..;
~SOrlrl~OOffiO
.:'2~. I :lD :.,,,.M .n ......
~ ~8!D~~ ~y ~~~.~ ~.~.~ f}~!rI'~ ~~[)q.~Y.: ~::;::::::
~
m~&" R:.~L;:R:·.~h,;
1
56
2
.. ..
...
: :;";;':::'::"::"::.:::.:: :-.;:.{ :.
:..; :.. ::: :..:.::.: :.,;.':::.:.-:-:::
.. ..
.:::
....r--:J..
'-;1~::~~!:~ :;~R!
7
9
.
Figure 5-8
5-12
Analog Write Board
506-9400-013A
KENNEDY
6098
Figure 5-9
Read Pre-Amp
5-13
506-9400-014A
Figure 5-10
5-14
Servo Board
506-9400-015A
ASSEMBL Y, POWER SUPPLY CONTROL BOARD (See FIG URE 5-11)
Item
Part
No.
No.
1
2
3
4
5
6
148-0131-006
121-0252-009
121-0001-001
121-0252-005
128-5006-006
7
8
9
10
Description
Transistor, Triac, MACI0-6
Header, 9 Position
Terminal, TP
Connector 9 5 Position
Screw, 6-32, Pari Head 4 Places
Terminal, Male 10 Places
Terminal, Female 7 Places
Connector, 10 Pin
Screw, J 0-32 Pan Head 4 Places
Assembly, Triac
121-0079-001
121-0079-002
121-0165-510
128-5010-004
190-4702-001
ASSEMBLY, PROCESSOR/WRITE (See FIGURE 5-12)
Item
Noo
Part
1
2
3
4
5
6
7
8
121-0206-225
121-0213-108
121-0234-050
121-0211-101
121-0165-026
121-0212-001
121-0213-106
121-0200-001
121-0165-122
121-0?U-I02
190-4901-009
121-0111-102
121-1156-002
121-1156-004
121-0165-004
121-0165-002
121-0253-005
121-0165-510
121-()213-118
9
10
11
12
13
14
15
16
17
18
19
No.
Description
Connector, 25 Position
Berg, 8 Pin 2 Places
Connector, 50 Position 2 Places
Berg, 1 Pin 3 Places
Connector 1 40 Pin
Jumper, 1 Position 24 Places
Berg, 6 Pin, 9 Places
Terminal 22 Places
Connector, 20 Pin
Header, 2 Pin
Transistor, Mtg Kit
Header, 2 Pin
Header, 2 Pin
Header, 4 Position
Connector, 26 Pin
Connector, 50 Pin
HDR 5 Position
HDR 10 Position
HDR Double Row 18 Pin
Table 5-3
9400 PC Board Assemblies (continued)
I
506-9400-016A
J1!E;
00'
J1!9
00'
_.....j..-_ _--,8
.a9
JIS
1
'0
o •
• 0
.0
• 0
Figure 5-11
Power Supply Control Board
5·16
506-9400-017 A
/
KENNEDY
@
6579
@
JD
I
"n"1 :
I
I
r - -_ _ _----,E )
I
~
.U
J I
~
l
~ [
S! !i
()§
0+
~"'7
~ [
~m
l
)3~,
1~lll
IC2~
S[ )~
~ [
~ [I;
I
5[
~U [
n+
IC2S
)1 lr~
IU
~~::
5[
5:1"0
a
s
IC27
)~'M~
~ I J~ L-...------l
14 I • I
.rli,;~\
"""
r
l
4
l~l:;;l:~ll·L;;J
~. ~~
~
~7
S[
~
I
J
r
) I J:: l
.~ c:==] () [
011- r
I
let
r
'---------::-:---c=r=-----'III; ·WeL
I
~
I
lca
!o
• T I[
[
5()~
[
IC47
S[ I~
S[
[
5
[
S[ I~
[
( )~
I
s(I~
. jII~ 1;-----'~ [I:
J
) [Hil
S
L~
~
q:
Figure 6-12
5-17
Processor Board
506-9400-018A
READ DECODER! ft...58EMBLY (See FIGURE 5-13)
Item
No.,
1
2
3
4
5
6
7
8
Part
No.
Description
149-0337-220
121-0211-102
121-0165-102
121-0212-001
121-0165-002
121-0211-10'1
121-0253-005
121-0165-028
IC, Regulator-I, LM337
Berg Stik, 2 Pin 6 Places
Connector, 20 Pin
Jumper, 7 Places
Connector 50 Pin
Berg, 5 Position
Header, 5 Position
Connector, 26 Pin
READ DECODER II ASSEMBLY (See FIGURE 5-14)
No.
Part
No.
1
2
3
4
5
6
7
8
121-0211-102
149-0337-220
121-0212-001
121-0211-101
121-0165-028
121-0253-005
121-0165-002
121-0165-102
Item
Descriptiop
Berg, Stik, 2 Pin
IC, Regulator, 37v
Jumper, 14 Places
Berg, Stik, 1 Pin
Connector 26 Pin
Connector 5 Position
Connector 50 Pin
Connector 20 Pin
KEYBOARD PC BOARD ASSEMBLY (See FIGURE 5-15)
Item
No.
1
2
3
4
5
Part
No.
Description
151-0084-001
121-0237-026
128-0217-002
148-0181-001
148-0182-001
148-0183-001
139-0031-001
Switch, Button 9 Places
Connector
Spacer, 13 Places
LED, Red, DS7,8,9,10,11
LED, Green, DS2,3,12,13
LED, Yellow, DS1,4,5,6
Display, LED, MAN-72A
KEYBOARD DECODER ASSEMBLY (See FIGURE 5-16)
Item
No.
1
2
3
4
Part
No.
Description
121-0265-202
121-0234-026
121-1155-002
121-1158-002
Connector, 40 Pin
Connector, Skt 26 Position
HDR, Connector, 2 Pin
HDR, Connector, 2 Position
Table 5-3
9400 PC Board Assemblies (continued)
5-18
PJIIOB
I JSpO:JSa
eI. -9
6L-9
sJn6':1
ED
a:
I
lIZ
:; .. !ilS:) .. "alL)
5
..
;c )(0 OlC )Ol()~
W[
S[
°nZ~jr~'''''''''''1
~
,."
~,.nI
~[
5.[
8~S:JI C)5
mOl
[
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,• . "
8101
( )f:
llr:~
Il
I
•
SIC:I!
8[2:11
·C ~
~
[lJ
se~n
{)u
11£:1:1
H2:11
Sla:!l
9Ia:)[
.trll~lI
•[
)
5rJ [
U
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se~n
5[
til [
rs
~
l Ju
' - ' i:::i
dI)().~E
-
J~g
."
s[
00'
-
~
!I
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-
U
SIZJI
5~[
S.[
IH'JI
l..l
J~~~
III
~
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581JI
S[
1::11
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r-.
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a., •
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J~.~ ~ lJ\../-
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5(I c5~
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tffl.mOOOJ\j . -7\ r11'i..~;
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u
u
u
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nc
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Slll:)I
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Id
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J~~n
s[
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stl.[
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~ [
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5~~5 ..." 5[~~ ..." S~~~
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~(
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[mOl
, , ~'
50()~[
8~I
Ill!
SJ
tiflJI
1=
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STn
s[
0=
un
fi
~[
,1:)1
S[
5[
'.Ill
~(){)[
IiJI
U
NI;U
S[
C""'J
S[
9tC:::Il
U
s
lOO'
;
.n:)!
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s[
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s~~; ,.." s[) [ 'm, s~~; '"' S~?E[
mOl
a.. ,
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~(i
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S[
fJE-"'''3.E
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2
sJ
.~( )
1C!'31
S[
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i)~[
~()C·m'J~1(5E
V
S[
D
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;U
s:t:;JI
201
s[
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~ 9;aa;u ()~
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5[
~~
mOl
[
)
=
Y
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lZ$::JI
m
sL.J[
~
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22:JI
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~
5~; .. ~)I .. 50()~[
,..0,
.M
()E
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'd"
~ ~
sin U U
8111
[
( )
'2lI
U:JI
~()[J~ ~1[
IIf'lyJ
;DIl; [
_O[om S.[·." S [8m
~
~
ad
'(
~)
5
1M
~
9LS9
AC!lNN!I>f
506-9400-020A
KENNEDY
6577
J2
L---~
_ _ _ _- - '
'-------,-------',
",-----I_ _ _ _ _ _- - - '
'-----_-,--_------.J
Figure 5-14
5-20
Decoder II
506-9400-021 A
CIIa
~.
D DOD
q
'7
iG
<
$S
Figure 5-15
Keyboard PCB Assembly
5-21
506-9400-022A
KENNEDY •
IC 5
€:::3C4
IC 7
"r-:::'"
... "
\.
"
"
.----.
~'
,
"
~'
,- ,\
og
c.III
Q
~
.~
IC 6
P24
Figure 5-16
Keyboard Decoder
5-22
506-9400-023A
RECOMMENDED SPARE PARTS LIST
Part
No ..
135-0056-001
135-0056-002
121-0198-003
121-0198-004
121-0198-004
291-5845-101
291-5845-103
190-5675-001
190-5720-002
~90-5906-003
190-5674-002
190-5720-001
J.51-006~::!lOJ
190-6811-001
190-6640-001
291-6590-001
190-6812-001
145-0017-001
145-0017-002
190-4702-001
190-6719-001
190-6719-002
,113-0008-001
198-0100-002
198-0021-001
128-0156-001
115-0018-001
115-0018-002
190-4721-001
190-4778-002
190-5232-001
190-5698-003
-.1190-5906-003
...-. 190-5909-003
190-5669-001
190-6260-001
190-6711-001
190-6640-001
190-6645-001
190-6657-001
190-6730-001
190-6701-001
190-6571-001
190-6570-001
190-6718-001
Unit
Description
Endless Belt 0.5 w x 20.0 19
Endless Belt 0.5 w x 21.0 19
Power Cord 115 VAC 60 Hz
Power Cord 240 VAC, 50 Hz
Power Cord 220 VAC, 50 Hz
Pully, Vacuum Blower Drive Alt 0-4K, 3.20
Pully, Vacuum Blower Drive Alt 0-4K, 3.630
Assembly, Takeup Vacuum Column
Supply, Cover Frame Assembly
Assembly, Sensor (~()"fiB"::, t)
Assembly, Supply Vacuum Column
Takeup Cover Frame Assembly
Vacuum Switch
Assembly, Tape Guide
Assembly, File Protect
Capstan Wheel'
Tape Cleaner
Relay, AC Starter MTR 115 VAE 60 Hz
Relay, AC Starter MTR 220/240 VAC 50 Hz
Triac Assembly
Fan Kit 115v 60Hz
Fan Kit 220/240v 50 Hz
Reel, Empty 10.5"
Hub Repair Kit
Brush Replacement Kit
(Capstan Motor, 2 Brushes)
Catch, Vacuum Column
Capacitor, Motor Start
Capacitor, Motor Start
Capstan Motor
Latch Assembly
Capsta'n Motor Cable Assembly
Reel Motor Assembly
EOT /BOT Sensor
EOT/BOT Wire Preparation
Sensor Assembly
Column Sensor Wire Preparation
Vacuum Plenum Assembly
File Protect Assembly
Servo Harness
Column Cable
Mag Head Cover Assembly
Dust Cover Assembly
Keyboard Decoder
Keyboard PC Board Assembly
Mag Head Assembly
5-23
Qty
Dash Ho.
1
1
1
001,4,7,10
002,3,5,6,8,9,11,12
001,4,7,10
003,6,9,12
002,5,8,11
001,4,7,10
002,3,5,6,8,9,11,12
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
001
002,3
001,4,7,10
002,3,5,6,8,9,11,12
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
001
002,3
506-9400-024A
RECOMMENDED SPARE PARTS LIST
(Continued)
190-6098-001 Preamplifier PC Board Assembly
Part
No.
118-0003-002
121-0213-134
121-0213-226
149-3467-001
Qty
Description
Unit
Dash No.
10
1
1
10
Chocke
HDR Double Row
HDR Right Angle
IC, Preamplifier 3467
190-6569-001 Assembly, Analog Read/Write
Part
No.
118-0006-104
118-0006-153
148-0171-001
148-0258-001
149-0317-220
149-0337-220
149-2408-001
149-8255-005
Description
Qty
Inductor, 1 mh
Inductor, 150 mh
JFET, J112
Transistor 2N 4258
Regulator +37v
Regulator -37v
DAC 8 Bit, DAC 08
Peripheral Inter 8255A-5
Unit
Dash No.
5
5
10
10
10
10
10
10
190-6572-001 Assembly, Read Data Handler
Part
No.
149-0181-002
149-0060-003
149-0121-001
149-0176-002
149-0191:"002
149-0194-002
149-0200-001
149-0225-002
149-0238-002
149-0377-001
149-0378-001
149-0640-001
149-2125-001
149-2140-001
149-2520-001
149-2705-001
149-2901-001
149-2902-001
149-2903-001
149-2925-001
Description
Qty
FIFO, S3341
74S85 Comparator
748133 13 Input Nand
748280 Parity Gen/Checker
748244 Line Driver
748299 8R Bidirectional
XTL Osc 34 5600 MHz
JK F-F 7418109
2 Input NAND 74S38
7418377 Flip-Flop
7418378 HEX-DECI F-F
7418640 XCVR
741S125 Buffer
748140 NAND
AM29520 Register
AM29705 Dual Port RAM
AM2901 Bit Slice Proc
AM2902A Look Ahead Carry Gen
AM2903 Bit 8lice Proc
AM2925 Clock Generator
Unit
Dash No.
10
10
10
10
10
10
5
10
10
10
10
10
10
10
10
10
10
10
10
190-&576-001 Read Decoder I, 3 Channel
Part
No.
128-0219-001
149-0135-002
149-0200-002
149-7404-001
Description
Qty
Heat Sink
741S191 Counter
XTL Osc 26.04096
Hex Inv CM08 74HC04
Unit
Dash No.
5
10
5
10
190-&577-001 Read Decoder n, 6 Channel
Part
No.
149-8253-005
Description
Qty
8253-5 Counter/Timer
10
5-24
Unit
Dash No.
506-9400-025A
RECOMMENDED SPARE PARTS LIST
iF
(Continued)
190-6579-001 Processor/Write PC Board
Part
Noo
139-0030-001
148-0177-001
149:-0196-001
149-0255-001
149-1488-001
149-1489-001
149-2008-020
149-2008-120
149-8088-001
149-8"251-001
149-8254-001
149-8254-001
Qty
Description
LED Array
JFET P Channel
Counter 74S569
Decoder- 741S255
RS232 Driver 1488
RS232 Rec 1489
SRAM 4016
SCRAM 4016
5 MHz 8088 Mu P
USART 8251
Counter/Timer 8254-2
Clock Gen 8284
Unit
Dash Noo
10
10
10
10
10
10
10
10
10
10
10
10
198-6604-001 Power Supply Control Board
Part
No.
148-0131-006
149-1156-001
149-1157-001
190-5674-002
190-5675-001
190-5698-003
190-5906-003
Description
Qty
Triac Mac 10-6
Triac M'oc 3010
Darlington Opto 4N 32
Supply Vacuum Column Assembly
Takeup Vacuum Column
Reel Motor
EOT /BOT Assembly
Unit
Dash No.
10
10
10
1
1
1
1
198-6079-001 Servo Assembly
Part
No.
145-0005-024
147-0040-103
147-0040-503
148-0172-024
148-0175-001
148-0176-001
148-0178-200
148-0181-001
148-0182-001
148-0410-001
149-0179-051
149-0183-101
149-0206-101
149-'0335-001
149-4001-001
149-4047-001
149-4538-001
Qty
Description
Relay lOa, 24v
Pot 18 Turn 10K
Pot 18 Turn 50K
Suppressor IN6289
XSTR NPN 13004
XSTR PNP 6476
SCR MCR 72-4
LED Red
LED Green
XSTR 2N4410
CD 4051 MUX
Octal Latch 741S373
Analog Switch HI-201
'Femp Sensor +10 mv/c 1m 335 az
Quad NOR CD 4001b
CD 4047
Oneshot
5-25
2
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
Unit
Dash No.
506-9400-026A
RECOMMENDED SPARE PARTS LIST
(Continued)
198-6570-001 Keyboard PC Board
Part
No.
Unit
Qty
Description
139-0031-001
148-0183-001
151-0084-001
190-6571-001
149-8279-005
Display MAN72A
LED Yellow
PB Switch SPDT
Keyboard Decoder
Keyboard/Display
135-0043-001
113-0094-001
190-5725-001
190-6712-001
190-6603-001
190-6791-001
190-6792-001
190-6793-001
Motor, Permanent Magnet
Mag Head, R/W, 9 Track, GCR/PE/NRZI
Assembly, Transformer
Heat Sink, Servo
I/O Pico Bus Assembly
I/O Pertec Bus Assembly
I/O STC Bus Assembly
I/O Telex Bus Assembly
5
10
10
1
5
5-26
1
1
1
1
1
1
1
1
Dash No.
~
;ICII
Z
SECTION VI
WIRING AND SCHEMATIC DIAGRAMS
Q
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NOTES TO SCHEMATICS
6.0 GENERAL
6.1 INTRODUCTION
This section contains standards which have been used
in preparing schematics for this manual. Electronic
symbols ·used in the schematic diagrams conform to
ANSI Y32.2. Abbreviations conform to ivlil-Std-12
unless otherwise specified. Logic symbols conform to
Mil-Std-806C (ANSI Y32.14).
This section also
includes TTL and'ECL Integrated Circuits.
The input/output logic of TTL are defined as follows:
a) TTL MEDIUM SPEED IC
(Input)
(Output)
6.1.1 COMPONENTS
6.1.2
RESISTORS
Resistors are given in ohms, +/-5% 1/4 w unless
otherwise specified.
6.1.3 CAPACITORS
Capacitor values are given in microfarads unless
otherwise specified.
Electrolytic capacitors are
always shown with their proper polarization and
voltages.
h) TTL SUPER HIGH SPEED Ie LEVEL
6.2 LOGIC CONVENTIONS AND
SYMBOLOGY
(Input)
60201 TTL LOGIC
Standard IC power connections on 14 pin packages are
on pins 14 (5v) and 7 (ground). For 16 pin packages,
power connections are on pins 16 (5v) and 8 (ground).
All nonstandard power connections are shown on the
first sheet of a schematic, in the reference block.
This unit uses +5v Transistor Transistor Logic (TTL).
TTL logic is defined in terms of standard POSITIVE
LOGIC using the following definition.
High
Low
Voltage
Voltage
= Logical
= Logical
'I'
'0'
c) TTL MEDIUM SPEED LOW POWER CONSUMPTION Ie
6-1
(Output)
606 - 0001- 002A
6.2.2 ECL LOGIC
6.3 SCHEMATIC FLOW
The
unit also uses -5.2v Emitter Coupled Logic
(ECL). The high impedance of the logic (input to
differential amplifier) coupled with the low impedance of the driving source (Emitter Follower Output)
allows high DC fanout.
The schematic diagram shall use a layout v.'hich
follows the cil'cuit, signal or transmission path, either
from input to output, source to load, or in the order
of functional sequence.
6.4 TEST POINTS (TP)
ECL logic is defined in terms of standard POSITIVE
LOGIC using the following definitions:
High
Low
Voltage
Voltage
=
=
Logical
Logical
'TP' designates TEST POINTS provided on the circuit
board for troubleshooting purposes.
'1'
'0'
6.5 TERMINALS
Socket terminals are designated with numbers for
component side connections and letters for circuit
side connections when a double sided socket is used.
When a single sided socket is provided, all connections are designated by letters regardless of which
side of the board they lie on. Letters follow the 22
pin alphabet, ABCDEFHJKLMNPRSTUVWXYZ; numbers are 1 through 22.
The input/output logic levels of ECL are defined as
follows:
OUTPUT
INPUT
-O.B1v
~ .1.~-O.B1V
,/
/ L-O.9Sv
-1.105v
-lo475V~ ~""'"
·0·
-lo63v
" "-
-loS5v
-loS5v
6.2.3 LOGIC SYMBOLOGY
The following conventions are provided to aid in
understanding the symbology used in this manual:
1) TTL
~D-Y
This indicates AND gate.
~D-Y
This indicates OR gate.
Y = A+B
o
Y
=(A) (B)
A circle on any input line or on
the output line indicates that
logical '0' is the significant state.
The absence of a circle '1' is the
significant state.
2) ECL
A~Y
B--L-»-z
A~Y
B~Z
o
This indicates AND/N AND gate.
Y
=(A) (B)= Z
This indicates OR/NOR gate.
Y = A+B;;Z
This is equal to TTL LOGIC.
6-2
606-0001-003
6~6
IC DESCRIPTIONS
This section gives a brief description of the integrated circuit
devices used throughout the 9400 system. A major portion of this
section consists of small scale to large scale TTL integration ,
followed by
Advanced Micro-devices' 2900 family of bit sfices and
related chips. This is followed by
Intel i s 8088 microprocessor and
related chips. The last section in the end covers any other chips
which did not fall under any of the above categories.
6-3
1
4
3
2
5
6
7
These drawings and specifications are the property of Kennedy
Company and shal! reo! be reproduced, or copied. or used as the
basis- for the manufacture or sale of aooaratus: without oermission.
4-0 i - "'0 79- OOi- 2
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JUMPERS USED ON THE-OOI
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3. ALI... DiODes ARE IN914.
2. ALL CAPAC I.,.OR VALues ARe IN MIC~OFAF.ADS, 50 V,
I. ALL RE.SISTOR VAL-Ut=S ARe IN OHMS:: s% 1/4 W,
!-JOTE.S; UNLESS OTI-IE.RWISE. SPE.CIFIEO.
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Schematic Diagram
1
2
3
4
5
6
7
8
1
2
4
3
5
6
7
+se~vo
These drawings and specifications are the property of Kennedy
I
Company and shall not be reprodureo~/2~-----------~9~
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Type 6079-001-11
0/.
Schematic Diagram
1
2
3
4
+
5
6
7
8
1
These drawings and
2
4
3
5
6
7
.. . ns a.., the property of Kennedv
S~Clflc~t~~oduced.
0' copied. 0' "sed as the
40 1- ''0 7,?
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Type 6079-001-11
Schematic D!agram
1
2
3
4
+
5
6
7
8
4
3
2
1
5
6
7
Th_ drawings and specifications are the property of Kennedy
Company and shall not be reproduoed, Or copied, or used a$ the
Oasis ior tOe manuiaciuur u( sail! oi itppotlrdlU:i Wi~iaUUL ..lItnHli~iulI.
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Schematic Diagram
PROCESSOR.
6
7
8
1
4
3
2
7
6
5
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ADDRESS
(108+) Wi(ji=E
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Schematic Diagram
CORRE CTION PR.OC.e.SSOR
5
6
7
8
1
5
4
3
2
6
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A
Th_ dr.wlngs ond specificatIon••re the property of Kennedy
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Schematic Diagram
3
4
5
6
7
8
1
1"'- chwing& IIICi
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the
~
4
3
2
5
7
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CRCP (2A7)
Pertec Interface
Type 6791-001B
DATE: 7 January 1985
UtaJM'C'T\V 'C'{"'M hl{).
... a._.L".L"~~ ~
~'-".L'
.... ..,.
1 AC)An
~"':E"'"':EV
CODE NO: 18, PCN NO: 18001
PAGE: 3
Schematic Change: Drawing No. 401-6572-001
Sheet 10, WAS:
IS:
'f
,
.
f:"'
_t
. ........... ;.....-::
~
..", ~~___
. ~...
" _'...
j _ _ _.J
'.~" -,:':': ~
_ • _ _....,-.,~,""!">".,._,
_ _.-I
..
~2~
~;
.~~., .... , ...• :
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,,,.,:\::- ,,'
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e
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; -f
KENNEDY
Product
Information
-~
~- ~-
An Allegheny International Company
-
Bulletin
DATE
CODE
PRODUCT
qki 0 l \ cgS'-
9400 MANUAL
1-11-85
REMARKS
I
a;;J;1;tC:IJ: f~~
CORRECTION TO 9400 MANUAL
SECTION 4.9 READ/WRITE ADJUSTMENTS
APPROVAL: Marketinll
'~
""
IS
.
SIB
WRITE CURRENT
WRITE CURRENT
TRACK
POT
TRACK
9
R53
9
R5
8
R47
8
R11
7
R41
7
R17
6
R35
6
R23
5
R29
5
R29
4
R23
4
R35
3
R17
3
R41
2
R11
2
R47
1
R5
1
R53
-
POT
-
KENNEOY
co.
DA TE: 25 July 1984
PRODUCT CHANGE NOTICE
OEM SERVlCE DATA FILE
•
CHANGE CLASSIFICATION: For Information Only
KENNEDY ECN NO: 13521
MODELS AFFECTED: 9400
CODE NO:
18
PCN NO:
180001 -
PC BOARD AFFECTED: Pertec Interface, Type 6791
REASON FOR CHANGE/CHANGE DETAILS:
A System Processor Pertec software release kit is presently available for customers
experiencing difficulty in reading interchange tapes in PE mode (1600 Bpi) on tapes
written on non-Kennedy drives.
The software release kit is provisioned with the latest firmware and includes
installation instructions. The kit can be ordered from Kennedy Company under PN 1907400-001.
ACTION ON UNITS IN SERVICE:
EFFECT ON SPARES:
None.
SERVICE/PARTS TO BE FURNISHED UNDER ASSEMBLIES WARRANTY:
Not applicable.
IDENTIFICATION OF CHANGED ASSEMBLIES:
Assembly 190-6791-001 was raised to revision D. Firmware 190-7400-001 was raised to
version 1.D.
DOCUMENTATION CHANGES:
Not
appliCabl{f~ ~/"'C ~
a·
APPROVAL:'
iNt::C\
Jt.f1U, MARKETING
'".•
~~~--~~------------
CUSTOMER ENGINEERING
INITIATING ENGINEER
PRODUCT MANAGER
(
DATE: 14 October 1984
KENNEDY CO.
PRODUCT CHANGE NOTICE
CHANGE CLASSIFICATION: For Information Only
.KENNEDY ECN NO: 13585-1
MODELS AFFECTED: 9400
CODE NO:
18
peN NO:
180002
PC BOARD AFFECTED: Power Supply, Type 6636"
REASON FOR CHANGE/CHANGE DETAILS:
The Terminal Block on the Power Supply assembly was modified to meet UL
requirements.
ACTION ON UNITS IN SERVICE:
None.
EFFECT ON SPARES:
None.
SERVICE/PARTS TO BE FURNISHED UNDER ASSEMBLIES WARRANTY:
Not applicable.
IDENTIFICATION OF CHANGED ASSEMBLIES:
Assembly #
Revision
190-6636-001
190-6636-002
4
2
DOCUMENTATION CHANGES:
Drawing #
Revision
404-6636-001
APPROVAL:
MARKETING
CUSTOMER ENGINEERING
INITIATING ENGINEER
PRODUCT MANAGER
l07508A
KENNEDY CO.
DATE: 14 October 1984
PRODUCT CHANGE NOTICE
OEM SERVICE DATA FILE
CHANGE CLASSIFICATION: For Information Only
KENNEDY EeN NO: 13879
MODELS AFFECTED: 9400
CODE NO:
18
PCN NO:
180003
PC BOARD AFFECTED: System Processor, Type 6579
REASON FOR CHANGE/CHANGE DETAILS:
The multiwire System Processor Board was upgraded to a printed circuit board,
implementing Kennedy Co. latest manufacturing techniques.
ACTION ON UNITS IN SERVICE:
None.
EFFECT ON SPARES:
None.
SERVICE/PARTS TO BE FURNISHED UNDER ASSEMBLIES WARRANTY:
Not applicable.
IDENTIFICA TION OF CHANGED ASSEMBLIES:
The multiwire version, 190-6579-001 was changed to 190-7579-001. The top assemblies
were revised as follows:
.
Assembly #
Revision
Assembly #
Revision
Assembly #
Revision
192-9400-001
192-9400-002
192-9400-003
192-9400-004
192-9400-005
192-9400-00&
6
6
7
C
C
D
192-9400-007
192-9400-008
192-9400-009
192-9400-013
192-9400-014
6
6
7
3
4
192-9400-016
192-9400-020
192-9400-021
192-9400-501
192-9400-502
B
4
B
4
2
DOCUMENTATION CHANGES:
Not applicable.
--I
APPROVAL:
-
','
-~
'1"/~
o'~u>4!f
I
• -.'
,MARKETING
CUSTOMER ENGINEERING
/
0--'..~
l07508A
_
-------~~?---.-------~----
INmATING ENGINEER
PRODUCT MANAGER
KENNEDY CO.
DATE: 14 October 1984
PRODUCT CHANGE
NOT~CE
OEM SERVICE DATA FILE
CHANGE CLASSIFICATION: For Information Only
MODELS AFFECTED: 9400
PC BOARD AFFECTED: Power Supply, Types 6636 & 6638
CpasSis Assembly, Type 6715
KENNEDY ECN NO: 13525
13580
'13581
CODE NO:
PCN NO:
18
180004
REASON FOR CHANGE/CHANGE DETAILS:
1) Power Supplies, Type 6636 and 6638 were removed from the Deck and Chassis assembly
drawings and added to the 9400 (Top Assembly) drawings. This allows the standard Deck and
Chassis to be used with all 9400 Models.
2) The assembly drawings for the Deck and Chassis were upgraded to meet UL requirem-ents on
the Rear Fan Assembly.
ACTION ON UNITS IN SERVICE:
None.
EFFECT ON SPARES:
None.
SERVICE/PARTS TO BE FURNISHED UNDER ASSEMBLIES WARRANTY:Not applicable.
IDENTIFICATION OF CHANGED ASSEMBLIES:
The following assemblies were upgra.ded to the revision levels as indicated:
Assembly
Revision
Assembly
Revision
190-6715-001
190-6715-002
192-9400-001
192-9400-002
192-9400-003
192-9400-004
192-9400-005
B1
3
5B
5B
6B
B3
B3
C2
5B
5B
192-9400-009
192-9400-010
192-9400-011
192-9400-012
192-9400-013
192-9400-014
192-9400-016
192-9400-020
192-9400-501
192-9400-502
6B
3A
3A
3A
2B
3B
Al
3C
3B
IB
192-940.0-006
192-9400-007
192-9400-008
DOCUMENTATION CHANGES:
The following documents were upgraded to the revision levels as indicated:
Drawing
Revision
C
APPROVAL:
1()7C;nAA
Warranty
The Company warrants its devices against faulty workmanship or
the use of defective materials (except in those cases where the
materials are supplied by OEM) for a period of one year from the
date of shipment to OEM, with the exception of til cartridge
products which are warranted for a period of ninety (90) days.
The liability of the Company under this warranty is limited to
replacing, repairing, or issuing credit (at the Company's discretion)
for any devices which are returned by OEM during such period
provided that (a) the Company is promptly notified in writing upon
discovery of such defects by OEM; (b) the defective unit is returned
to the Company, transportation charges prepaid by OEM; and (c)
the Company's examination of such unit shall disclose to its
satisfaction that such defects have not been caused by misuse,
neglect, improper installation, repair alteration or accident.
Kennedy Company is continually striving to provide improved
performance, value and reliability in its products and reserves the
right to make these changes without being obligated to retrofit
delivered equipment.
KENNEDY
ALLEGHENY
INTERNATIONAL
KENNEDY
1600 Shamrock Ave., Monrovia CA 91016
(818) 357-8831 • RCA TELEX 247019 KNDY-UR
•
• I.
ALLEGHENY
INTERNATIONAL
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