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If 1/'5
SERIAL NO. _ _ _ __
RW-300 DIGITAL CONTROL COMPUTER
PROGRAMMING MANUAL
March, 1961
This manual is the property of the TRW Computers Company.
It is made available to customers, prospective customets,
and others, with the understanding that the contents of the
manual shall not ~e released to any third party.
TRW Computers Company
8" 3 3 FA L L B ROO K A V EN U E • CAN 0 G A
PA R K. CAL IF 0 R N I A
The R W -300 Digital Control Computer
The RW ... 300 Digital Control Computer is used for closed-loop control of
industrial' proces se s, for autom.atic testing, for on-line
data interpretation, and for simulations.
In
real~time
control and test applications, the RW-300 communicates
directly with instruments which measure or sense operating
variable s. Under the direction of the program stored in
memory, the RW-300 uses information from these instruments, performs calculations, reduces data, and generates
the control signals re quired to fulfill proce s s or te st
objectives. Fail-safe features incorporated in the system
equipment and program, coupled with the inherent reliability
of the R W -300, ensure dependable operation.
The computer operator is generally advised of operating conditions by
typed records -- printed out either periodically or on
demartd. Further, the operator is able to supply the RW -300
with special data whenever the process or test must be
operated under unusual conditions.
IN THIS PROGRAMMING MANUAL.
Section I . . .
contains a general de scription of the R W -300 and
peripheral equipment.
Section II .
describes the operation codes used in preparing
instructions for the computer.
Section III.
tells how the instructions are assembled into programs.
Section IV.
introduces a programming technique which make s
maximum use of 'computer time.,
Section V. . .
contains detailed information relating to the digital
input and output equipment used with the RW -300.
Section VI
tells how programs are loaded into the computer under
the direction of a program stored permanently in
computer memory.
Section VII . . details the functions of R W -300 controls and indicators.
Section VIII. .
c'ontains reference material pertaining to number
systems and scaling.
A Glossary of computer terminology is included at the end of the manual.
\
'
The ,last pages of the manual contain reference tables that are useful in
preparing programs for the R W -300.
OTHER PUBLICATIONS ARE AVAILABLE.
A list of programming aids and mathematical subroutine s contained in
the RW -300 Program Library can be obtained by writing to TR W Computel\s
Company.
\,
A manual describing Optimum Programming Using Symbols (OPUS)
in~ludes instructions for preparing programs in symbolic form.
An interpretive routine is available for applying the,R W -300 to generalpurpose and scientific calculations.
TABLE OF CONTENTS
PAGE
SECTION ,I - - GENERAL DESCRIPTION
I,~'
1-1
CHARACTERISTICS
~t
EXTERNAL FEATURES
1-2
Il':lSTRUCTION SYSTEM
1-3
WORD LENGTH
1-4
MEMORY . . . .
1-4
Basic Memory . .
1-4
Expanded Memory
1-5
1-6
ARITHMETIC UNIT . •
A Register.
B Register.
. ..
C Register.
...
Adder
. . . ...
CONTROL UNIT
1-6
1-6
1-7
1-7
1-7
Y Register.
1-8
1-8
N Register.
Track Register
1-8
1-9
Instruction Register.
DIGITAL INPUT AND OUTPUT
ANALOG INPUT AND OUTPUT
1-9
"
.
1-11
Conver sion Capabilitie s . .
1-11
Input Conver sion Range and Numbe r Repre sentation •
1-14
Input Storage Locations • ',' . . . . . . . . . . . . . . .
1-16
, Output Conver sion Range and Number Representation •.
1-16
1-18
Output Storage Locations
MAGNETIC TAPE UNIT
1-18
1-18
Introduction
.De scription
Operation
"~,I
. .
••
Specifications
... . . .
1-19
• • • • • •
1-21
1 ... 23
·TABLE OF CONTENTS -- Continued
SECTION II -- INSTRUCTIONS
INTH.ODUCTION.
LOAD A
•
•
•
•
e,
•
.. .. . . . . . . . .. . . .. . . .. . . . . . . .. . . . . .
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
· .. . . . . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . .. . .
LOAD A NEGATIVE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
STORE A · . . . . . . . . . . . . . . . . . .'. . . . . '. . . . . . . . . . . . . . .
STORE B · . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LOAD B
ADD
SUBTRACT
SHIFT
• • • • • • • • • • • '0 • • • '0' • • • • • • • • • • • • • • • • • • • • •
· . . . . . . . .. . . . . . . . . .. . . . . . . . . . . . . .. . . . .
· . . . . . . . . . . . . . . . . . . . . . . . . . . . ... . . . . . . . .
. . . '.' . . . . . . . . . . . . . . . . . . . . .
TRANSFER ON ZERO ••••• . . . ". . . . . . . . . . . . . . . . . . . . . . .
TRANSFER ON OVERFLOW . . . . . . . . . .' . . . . . . . . . . . . . . . .
COMPARE MAGNITUDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
EXTRACT · . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
MERGE. · . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . .
SWITCH · . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TRANSFER ON NEGATIVE
~
· . . . . ... .. . . .. . . . . . ... . ... ... . . . . ... .. . .
DIGITAL · . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NO OPERATION . . . . . .. . . . . . . . . . . . . . . . . . . ..... .
..
STOP .•
TAPE
•
•
•
e·
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
· .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DIVIDE · . . . . . . . . . . . . . . . ". . . '. . . . . . . . . . . . . . . . . . . . .
EFFECTS ON REGISTERS . . . . . . . . . . . . . . . . . . . . . . . . . . .
MULTIPLY
ii
PAGE
2-1
2-2
2-2
2-3
2 .. 3
2-4
2-4
2-5
2-6
2-7
2-8
2-8
2-9
2-10
2-11
2-12
2-13
2-13
2-15
2-16
2-17
2-21
2-25
TABLE OF CONTENTS -- Continued
PAGE
SECTION IU r BASIC PROGRAMMING
INTRODUC TION ••••••••••••••••••••••••
•• • •• • • •
• •
3-1
INSTRUCTION WORDS •••••••••••••••••••
•••••• ••••
3-~
FORMAT FOR LISTING INSTRUCTIONS •••••••• • • • • • • • • • •
3-a
DATA WORDS, OR CONSTANTS ••••••••••••••
3-5
· ............
\t
FORMA T FOR LISTING CONSTANTS ••••••••••• • • • • • • • • • •
3-5
USE OF MEMORY •••
3-7
.. • • • • • • • • • • • • • • • • • • • • • • • • • •
General • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • •
3-7
Memo~y
3-8
Reading Information from
••••••••• • • • • • • • •
Storing Information in Memory •••••••••••• • •
•
• • •
••
3-8
Organization of Li'stings •••••••••••••••• • •••••••
3-10
Record Keeping
3-10
••••••••••••••••••••• • • • • • • • •
SAMP LE PROGRAMS ••••••••••••••••••••••• • • • • • •
Example I
,'. ,
•••• ••
Example U • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • •
Example m
•• •• ••
............... ...... .
. . . . . . . . . . . . . . . . . ....... .
'
••
3,-IZ
••
3-1Z
• •
3-14
• •
3-16
iii
TABLE OF CONTENTS -- Continued
PAGE
SECTION IV -- OPTIMUM PROGRAMMING
INTRODUCTION
0
•
•
••
4-1
•
. MEMOR Y ORGANIZATION. • ..
4-3
Tracks 00 through 07 • .
4-3
Tracks 08 through 15' ...
4-3
Tracks 08 through 61 . .
4-5
Track 62
4~6·
Track 63
4-7
.EXPANDED MEMORY
4-7
. SELECTING OPTIMUM MEMORY LOCATIONS. .
4.-9
Load, Merge, and Extract
Add and Subtract.
00
Multiply and Divide .
o
•
4~13
•
e,
••
0
.,
•
0
4-14
••
.. .
4-1.4
Compare .Magnitude .
4.-15
Transfer
4-15
. ,. .
Switch
4-16
I
...
Shift
4-17
~
.'{
No Operation
4-17
_0
:
. Store
4-17
"
Digital.
o
0
•
.,
4-18
. COMPARISON OF OPTIMUM AND SEQUENTIAL PROGRAMMING
REVOLVER
.
0
.,
4-19
4-!9
EXPANDED MEMORY . .
4-21
OPTIMUM PROGRAMMING USING SYMBOLS
4-21
iv
I.
'TABLE OF CONTENTS ... - Continued
SECTION V
PAGE
DIGIT AL INPUT AND OUTPUT
. . . . . . . . . . . . ·. ·. . . . . . . . . . . . . . .
DIGIT AL COMMAND. . . . . . . . . . . . . • • · . . . . . . . . . . . . . . .
BASIC INPUT -'OUTPUT CAPABILITIES
· . . . . . . . ... . . . . . .
Inputs ••••
. . .. . .. • • · .. ... . .. . .
Inputs from Toggle Switches
. . . . . .. . . . . .. .. . . .
.
INTRODUCTION .....
• • • • o' • • •
5-1
5-2
5-3
5-3
5-4
Inputs from Flexowriter • • • • • • • • • • • • • • • • • • • • • • • •
5-5
Output to Flexowrite r • • • • • • • • • • • • • • • • • • • • • • •
5-6
Sample Printout Listing
5-7
.. .. .. ...... . .
EXPANDED INPUT-OUTPUT CAPABILITIES. . . . . . . . . . . . . . .
Inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Outputs .. . . . .
••••••••••
~
•
•
•
•
•
•
•
•
•
•
•
•
One - Bit Outputs •••••••••••••••
Multi-Bit Outputs
•
0
•
•
•
•
•
•
•
•
•
•
•
•
ct
•
• • • • • • • • • • • • • • •
. . . . . . ... .. . . . . . . . . . . . . . .
INPUT -OUTPUT EQUIPMENT • • • • • • • • • • • • • • • • • • • • • • • • •
. . . . . . . . . . . . . .. .. . . ... .
Twenty-Four -Hour Clock . . . . . . . . . . . . . . . . . . . . . . .
Manua 1 Inputs
· . . . . . . . . . .. . . . . . . . . . . . .
Watchdog Timer · . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Ferranti Reader · . . . . . . . .' . . . . . . . . . . . . . . . . . . . .
Teletype Punch
. . . . . . . . .. . . . . . . . . . .. . .
FLEXOWRITER •••••
. . . . . . . .. . .. . . . . .. . . . . . .. .
Mode s of Flexowrite r Ope ration · . . . . . . . . . . . . . . . . . .
Digital Indicator s .•••••
.5-10
5-10
5-10
5-12.
5-13
5-13
5-13
5-14
5-15
5-17
5-17
5-18
5-19
5-19
Gene ral Flexowrite r Characteristics . • • • • • • • • • • • • • • •
5-23
Paper Tape. . • • • • • • • •
5-25
• ••••••••••••••••••••
.. .. . . .... .. . . . . . . . . . . . . . .
Flexowrite r Code s . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Flexowrite r Timing Conside rations . . . . . . . . . . . . . . . .
Parity Checking
5-27
5-30
5-30
v
TABLE OF CONTENTS -- Continued
SECTION VI -- PROGRAM LOADING
PAGE
, INTRODUCTION. .
6-1
LOAD PROGRAM
6-1
'STANDARD PUNCHED TAPE FORMAT
6-4
DECIMAL PUNCHED TAPE FORMAT
6-6
OPERATING 00NDITIONS
6-7
MEMORY SUMS . .
6-9
BINAR Y LOADING
6-10
JUMP INSTRUCTION
vi
. . . . . .'.
6-11
'TABLE OF CONTENTS -- Continued
SECTION VII
OPERATING CONTROLS AND INDICI,\.TORS
· • ·• · ·• • • • • • • • • • • • • • • • • • • •
Power Controls
• ·• . • • • • ·• • • • • • • • • • · • • • •
·
·
·
Operating Controls •
• ··· ·· • · • · • · • • • • · •
·
OPERATOR'S PANEL. • •
PAQE
'.
7-1
~
,/
TEST AND MAINTENANCE PANEL • • • • • • • • • • • • • • • • • • • • •
7-2
7-3
• • • • • •••
7-4
• • • • • • • • •• •• • • • • • • • • • • •• • •
7-4
Ope ration • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • •
7-4
Program Loading.
Maintenance
· . ..
PROGRAM CHECK-OUT
• • • • • • • •• •
·..
•• • • • •• •
Fetch and Exe cute Buttons
• • • •
Run Button
• • •
• •
•• ••
State Indicators
•
•• • • •
••••••••
• • • • • • • •• • • • • • •••
7-6
•••••
7-7
• • • • • • • • • • •
. ·. ·
·· • • ·• • • • • • • • • • • • •
• • • • • • • • • • • • • • ·•
···
·
Oscilloscope . • • • • • • • • • • • • • • • • • • • • • • • • •
· · ·
·
·
·
Tables for Interpreting Indicators.
··
•
•••••••••••• ••
l-7
7-7
7-8
7-10
vii
TABLE OF CONTENTS -- Continued
SECTION VIII -- NUMBER SYSTEMS AND SCALING
READING COMPUTER NUMBERS • . • . • • • • • • • • • • • • • • • • • • •
. . . . . . . . . '. . . . . . . . . . . . . . . . . . . . . . .
. ... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PAGE
8-1
NUMBER SYSTEMS
CONVERSIONS
Binary to Decimal •.••••••••••••••••••••••••••
· . . . . .. . .. .. . . . . . . . . . . . . .. . ..
Binary to Octal to Binary . . . . . . . . . . . . . . . . . . . . . . .
Decimal to Binary. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Octa 1 to De cimal · . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Decimal to Octal
8-4
8-4
8-6
8-6
8-7
8-7
BINARY ARITHMETIC• • • • • • • • • • • • • • • • • . • • • • • • • • • • • • •
8~S
OCTAL ARITHMETIC •••••••••••••••••••••••••••••••
8-9
SCALING
. . . . . . . . .. . ... . . . . . . . .. . . . . . . . .. . . . . . . .
Introduction ••••••••••••• ", •••••••••••••• '•••••
8-10
Fixed-Point Notation and Scale, Factor •••••••••••••••
8-11
· . . . . . . . . . . . . . . . . . . . . .. . . . . . . .
Multiply Command . . . . . . . '. . . . . . . . . . . . . . . . . . . .
Divide Command · . . . . . . . . . . . . . . . . . . . . . . . . . ...
Shift Commands
viii
8-10
8-13
8-14
8-1S
LIST OF ILLUSTRATIONS
PAGE
,Figure 1-1
R W -300 and Peripheral Equipment
0
•
0
•
1-12
0
1-20
Figure 1-2
R W -300 and Magnetic Tape Unit
Figure 2-1
Commands and Registers
Figure 3-1
Flow Chart of Program Exa,mpleIII
3-17
Figure 4-1
RW-300Memory
4-4
Figure 5-1
Segment of Punched Tape •
Figure 5-2
Table of Flexowriter Codes
Figure 7 -1
Te st and Maintenance Panel
Figure 7-2
Oscilloscope Display
...
0
....
••
,0
•
2-27
5-26
. . . . . .. .
•
•
•
0
•
•
0
5-31
7-3
7,-9
REFERENCE TABLES (last 3 pages in manual)
Table of Powers of 2
Table of Non-Parity Flexowriter Codes
Table of Powers of 8
Table of-Equivalent Revolver Locations
Table of R W -300 Instructions
ix
SECTION I
GENERAL DESCRIPTION
CHARACTERISTICS
The RW -300 Digital Control Computer is a stored-program, aerial
computer employing a magnetic drum memory with a total capacity of
8,080 wor.ds.' .~.~ -300 .compliters' with an· expand~d memory have a total
memory capacity of 15, 776 words.
The R W-300 word is composed of
18 binary digits.
A word may represent either numerical data (17 bits, with a sign bit),
or one half of a computer instr,uction.
Two words form a complete instruc-
tion; one half of the instruction specifie s the memory location of the operand,
and the other half of the instruction specifies the memor y location of the next
instruction.
The half-instruction containing the next-instruction addre ss
includes one of 21 basic operation codes, and the half-instruction containing
the operand addre B s include 8 an execution code.
The
b~sic
instr uction codes
are modified by the execution code and the operand address to provide a
flexible command structure.
Continuously variable voltages from measuring instruments and
transducers are automatically converted to digital for.m and stored in the
RW -300'.s memory .. -without programmed instructions.
Up to 1,024 of these
continuously variable "analog" input· signals can be accommodated.
Com-
putational results representing control information are automatically converted from digital form to voltages which can be applied to conventional
1-,1
Characteristics - - Oontinued
controllers or other:control devices.
s~gnals
Up to 12'8 of these "al1alog" output
can be provided.
Up to 511 on-off signals from diffe rent source s can be accepted by
tp.e computer, permitting input from digital clocks, switches, paper-tape
readers, etc.
A like number of digital output signals can be provided fO,r
the control of motors, indicators, alarms, logging typewriters, paper-tape
punche s, etc.
In addition to possessing the input-output capabilities necessary for
real-time control, the RW-300 has been designed to provide the reliability'
required for continuous service.
Subroutines and interpretive routines are available to extend the application of the RW -300 to scientific and general-purpose computation.
EXTERNAL FEATURES
The console model of theRW -300 (see frontispiece) is desk size and
weighs approximately 600 pounds.
It operates from 120-volt, 60-cps power,
and requires no special air conditioning.
mately 500 watts.
Power consumption is approxi-
Usually supplied in the console cabinet 36 inches high, 56
inches long, and 29 inches deep, the same basic computer can also, be furnished in an upright, air -purged cabinet that is 84 inches high, 48 inches
long, and 24 inches deep.
Operating controls for the console model are mounted on the sloping
front edge of the cabinet and are accessible when the computer cover is
closed.
1-2
The oper ating controls are pushbuttons for turning the R W -300 on
External Features - - Continued
,
f~r
and off,
\
starting, stopping, and resuming the progr{im stored in memorx',
and for loading new programs into the memory.
Beneath the cover, a test
and maintenance pane 1 contains controls, indicators, and displays which
facilitate program check-out and computer maintenance.
The operating con-
trols and indicators are described in Section VII of this manual.
INSTRU:CTION SYSTEM
or commands, many of which can be modified to permit a large number of
distinct operations.
The operation codes control arithmetic operations,
logical operations. and peripheral equipment.
Section II contains a brief
description of the instruction format, followed by a complete description of
, the operation codes.
The time required to perform arithmetic and logical operations
depends upon the relative locations in memory of the instruction and the
operand.
Using the optimum programming techniques describeq: in Section
.
"
IV, the time s (in millise conds) required to complete typical instructions are
as follows:
Add or Subtract
0.78
Multiply, full length
2.99 ms
Divide, fu 11 length
3.12ma,
Transfer
0.65 rna
Load Register
0.65 ms
Store
O. 78 ma
mB
l-l
Word Length
WORD LENGTH
In the RW-300, the basic unit of information is a worq!
sists of 18 binary digits, or bits:
A \vord con-
a sign bit and 17 bits of abso lute magnitude.
The sign bit is zero for positive and one for negative.
(See
S~ction
VIII for
an explanation of the binary number system.)
[ I. 11. r LL 1.:1 I I .L J
18 17 16 15 14 13
Sign Bitl
l~
11 10
'Most-Significant Bit
A word may represent:
9
8
J
JJ
7654:3
a
I.: I
1
Least-Significant Bit!
a numerical value, one half of an instruction,
typewriter or punch symbols, or a bit pattern that can be used for control
purposes.
Section III describes the form of instruction words and data words.
MEMORY
The memor y of the R W -300 is a magnetic drum, nine inches in dialnet(~ r
and nine inche slang, which rotate s at a speed of 3600 rpm.
The mag-
nr-tic drum may contain a basic 8,080 word memory or an expanded melnory
of IS', 776 words .
.~~sic Mer:nory
There are 7,936 words of general storage on 62, tracks of 128 words
each, 32 words of fast-access storage in a circulating register, and 128
words in one track for a permanently stored load program.
A word titne
(the time required for one word on the drum to pass a given point) is O. 13
ntilliseconds.
1-4
The "average" access time (time required to find a word) in
Memory -- Continued
general storage is 863 milliseconds.
The 32-word circulating register, or
f'lrev.olver" p has an average access time of approxim,ately 2 milliseconds.
Any of the 7,936 word locations can be written into during program loaqing by using control facilities on the RW-300 test and maintenance panel.
the ,basic' computer, the 32-word revolver and
l~
In
024 word locations in eight
128-word tracks can be written into under pr'ogram control.
addi~
Up to eight
tional tracks of program-writable storage can be provided by adding a module
to the basic computer.
However
$
this additional
program~writable
storage is
r.educed by the number of tracks re served for the storage of analog input datao
The number of tracks re served for analog input data does not affect the 32·word revolver nor the 1 ~ 024 words of
program~writable
memory available in
the basic computero
Expanded Memory
RW~300computers
storage on 123 tracks o
with an expanded memory have 15$ 776 words of
Notmally~ 'e~panded
memory ma,chines have 1 / 536.
words of program-writable storage, although up to 16 additional tracks (2,048
words) of
program~writable
storage can be provided by the addition of an
extra module to the basic computer.
The 16 additio'nal tracks will be reduced
by the number of tracks reserved for the storage of analog input data ..
The method of identifying memory focations on the drum is de scribed in
connect~on
with a desc::ription of basic programming in Section III.
More
de~
tailed drum characteristics are presented in connection with the optimum programming tec,hniq.ues described in Section IV.
Through the use of optimum
1-5
lYle mor y - - Continue d
programming techniques, access time in general storage can ,be greatly
reduced below the "average" access time of 8.3 milliseconds.
ARITHMETIC UNIT
The arithmetic unit is that part of the RW -300 which actually performs
arithmetic and logical operations under control of the program stored in
memory.
The unit includes three circulating one-word registers (A, B, and
C) on the drum.
In addition, it contains a serial adder and flip -flops used
for storage, time delay, and logical manipulations.
A Register
The A register, or accumulator. is located on the drum, and has a
capacity of 1 7 bits plus sign (one word).
It is the principal arithmetic
register and holds the result of most operations.
The A register can be
loaded from me mory, and the contents 'o[ the A register can be stored in the
memory.
word time.
It has the capability of shifting left or right one binary place per
In the operations of addition, subtraction, left shifting, and
division, overflow from the A register is possible (i. e ..
attempt to put a one to the left of the 17th bit).
J
the computer may
When overflow occurs, the
overflow indicator is tu:t:'ned on.
B Register
The B register, located on the drum, has a capacity of 17 bits plus
sign.
It holds, at various times, the multiplier, remainder, or least-
significant half of the double -length product.
As in the case of the 'A register J
the B register can be loaded from me mory, and the contents of the B register
1-6
Arithmetic Unit -- Continued
can be stored in the memory.
per word time.
It has the ability to shift left one binary place
When shifting left, it is coupled to the A register so that the
bit in position 17 of the B register is shifted into position 1 of the, A register,
C Register
The C register, located on the drum, also has a capacity of 17 bits
plus sign.
Its operation is not under the control of the computer's program,
and therefore the programmer is se ldom concerned with, it. ,At various times.
the C register holds the multiplicand, divisor, subtrar.t.end, addend, or
execution code.
Adder
The adder forms; in one digit time, the sum of one bit from the
augend, one bit from the addend, and the carry bit from the p:revious addition.
It outputs the sum bit and the carry bit.
Since the sum is formed serially,
bit by bit, the adder requires one word time to generate the sum of two 17 - '
bit numbers.
(This should not be confused with the length of time required
to carry out an Add instruction. )
CONTROL UNIT
The control unit processes the instructions in the sequence dictated
by the program stored in memory.
In processing an instruction, the control
unit pe rforms the following functions:
a.
Obtains instructions from memory.
b.
Decodes and interprets the instructions.
Control Unit -- Continued
c.
Connects and activates other units by sending out i-q.dividual commands to the other units in the prope rsequence to perform. the
desired function.
d.
Initiates the transfer of information between units.
e.
Stops the execution of the program.
f.
Keeps track of time so that the various parts .of an instruction are
executed in the appropriate sequence.
pome of the components of the control unit are described below.
Y Register
The Y register is a one -word circulating register on the drum which
holds the operand address.
N Register
The N register is a one -word circulating register on the drum which
holds the address of the next instruction.
Track Register
The track register is a six-bit flip -flop register which holds the track
address when a program instruction refers to a memory location.
The flip-
flops in this register also serve other purposes; for some instructions, the
track register supplements the instruction register.
For digital input and
output instructions, the track register addre sses groups of input or output
line s.
1-8
Control Unit - - Continued
Instruction Register
The instructi,')n register isa five-bit flip-flop register which holds
the instruction code, but temporarily holds the executi0tl code when an instruction is being read from memory.
DIGIT AL INPUT AND OUTPUT
All digital input and output functions are accomplished by a single
operation code which controls the transfer of information between the A
register and external equipment.
Digital outputs are in the form of relay ...
contact closures, and digital inputs are accomplished by sensing voltage
change s on input line s •
The RW -300 digital input-output facilities are extremely flexible.
The paragraphs which follow contain a description of the basic facilities and
a description of options available to customers.
A more complete descrip-
tion, along with programming instructions, is included in Section V.
The basic digital input-output unit provided with the RW -300 is a
Flexowriter, which consists of an electric typewriter, a paper -tape and
edge -·punched card reader, and a paper -tape and edge -card punch.
The
Flexowriter can read, punch, or print at the rate of 8 characters per second'.
In the basic computer, seven digital input line s are re se rved for accepting
information from the Flexowriter reader {or from some other input device},
. and 18 digital input lines are available for accepting information from digital
input switches or other devices dictated by the requirements of the installation.
1-9
Digital Input and OutPllt - - Continued
Relays within the basic computer convert Flt,xowriter signal levels
to levels compatible with the digital input circuits.
A negative five volts
applied tc:;> one or more of the other 18 digital input lines causes the computer to read a one on that line when a digital input instruction is executed,
anp an open or positive voltage L?2. 5 volts) causes a zero to be read.
Although a group of 18 digital-output control line s is available for
system expansion, the basic computer contains only eight relays for providing digital outputs to the Flexowriter printing or punching circuits.
Au~iliary
control relays are provided within the basic computer for turn-
ing the Flexowriter motor on and off; for initiating printing when a logging·
typewriter is used; for initiating punching when a high-speed paper-tape
punch is used; and for accepting "ready" 'signals from these output devices.
A variety of optional digital input-output equipment is available.
Addit~onal
typewriters, including line printers, can be supplied to log out
raw data and finished computations.
A Ferranti high-speed paper-tape
reader (60 characters/ sec) and a Teletype paper-tape punch (60 characters/
sec) can
alternat~
with or be substituted for the Flexowriter reader and punch.
When used in control applications, the computer's basic digital input
capabilities can be expanded to accept 29 additional groups of digital inpu.t
lines (with 18 lines in each group) for a maximum of 540 digital input lines.
In an expanded digital input system, a zero is read into the computer when
an input line is grounded; a one is read when an input line is open.
Basic digital output capabilities can be expanded to provide 29 additional groups of output lines (with 18 lines in each group) for a maximum of
540 digital output line s.
1-10
Digital Input aq.p. Output - - Continued
The, additional equipment required for expansion of digital input and
,output facilitie s is accommodated in an operator I s de sk-type console shown
in figure 1-1. ' The operator is shown with the Flexowriter, and a logging
typewriter is shown on top of the console control panel.,
Section V include s
a functional de scription of console operating controls.
ANALOG INPUT AND OUTPUT
Conver sion Capabilities,
The analog input-output equipment contained in the
basi~
computer
converts voltages from measuring instruments into digital ,form, and converts digital information from computer memory into voltage or current at
rates up to 3,840 conver sions per second~
Throughout this manual, the in-
puts from measuring instruments and transducers are called" analog inputs"
and the outputs to controllers, recording instruments, etc., are called "ana-log' outputs".
The basic computer accommodates the circuits required to accept
up to 32 analog inputs and provide up to 36 analog outputs.
By installing re-
lays and associated circuits in an upright cabinet similaor to that shown in
figure 1-1, the nuomber of analog inputs can be expanded to 1,0024; 'installing
additional analog output modules in an output cabinet enable s the number of
analog outputs to be expanded to 128.
In most control installations, the auxiliary analog input cabinet
contains an oven for maintaining at a constant temperature the junctions be ...
tween the thermocouple leads and the system wiring.
The auxiliary analog
1-11
· Analog Input and Output
Continued
!
Figure 1-1
RW -300 and Peripheral Equipment
cabinet also accommodates amplifiers for raising the amplitude of lowlevel instrument signals (e. g., thermocouple voltages) to a level compatible with the computer's analog-to-digital conversion circuits.
The
cabinet also contains filter s for removing hum and noise from incoming
instrument lines.
Equipment in the computer (and in the auxiliary analog cabinet)
operates as an independent subsystem, so that information from
1-12
Analog Input and Output - - Continued
measuring instruments is constantly convert.ed to digital iprn1, and the latp.st
digital representation is stored in memory without programmed instructions.
Similarly, when new operating parameter s have been conlputed and stored
in memory by the progranl, these latest values are converted to analog form
and transmitted to control instrumentation.
The digital-to-analog conver-
sions are also performed automatically, and do not have to be programmed.
The analog converter is time- shared among inputs and outputs.
A nalog outputs are updated (adjusted to correspond to a number stored
in memory under program control) automatically at least once every 1/30
second.
The frequency at which analog inputs are updated (input voltages con-
verted to digital form and stored in memory) depends upon the particular insta,llation.
For a basic system (32 voltage gates, 0 relays). the inputs can
be updated every 1/30 second; for a system employing 1, 024 inputs, the input information stored in memory can be updated every second, but under
severe noise conditions,' where filters are employed. the inputs may be up--:dated every two seconds, four seconds, or eight seconds to allow a stabilization period for the noise filter s.
Actually, ,the analog input-output system is
flexible and is furnished to meet the needs of each application.
Analo'g input
information can be converted and stored at the maximum rate' of 3,840 sam ...
pIes 'per second.
Longer delays between input samplings are also possible
to provide a stabilization period for transducer s.
Systems can be changed or expanded by means of field modi.fications.
Thus, a system can be installed initially as a computing data logger and
1-13
Analog Input and Output -- Continued
later, I?Y connecting' the analog outputs of the computer to controller s, can
pe expanded to an
a~tomatic
control system.
Analog signals other than d-c voltages, such as pressures, a-c voltages, etc., are converted to d-c voltages by the use of transducers or special converter s.
Amplifier s and filter s are provided for low-level signals
from thermocouples and strain gages.
~nalog
conversions are accurate to
± 0.,05
Two
percent oi full scaleo
'
,
Input Conve'rsion
Analog-to-digital and digital-to-
Rang~
and Number Representation
typ~\9.,of analo~
input capabilities are available: (1) a unipolar
converter which convert,s' to digital form voltages in the range from 0 to
+
10. 23 volts d-c, and (2) a bi-polar 'converter whi~h converts to digital
form voltages in the range from -10 23 volts to't'lO. 23 volts.
0
When
conver~~d
by 10 binar y digits,.;
to :~igital form" the
~nalog
Be~aus,e. the leas.t.~ significant
'signals are represented
digit repre sents a con-
version resolution of 10 millivoltEi, the' conversions are accurate to t 5
millivolts, or ± O~ 05 percent ~f full scale.
In a unipolar system, the digital equivalent of the analog output signal is contained in bit-positions 8 through 17 of a
most ... sigp.ificant bit in position 17.
comput~r
wor"d, with the
Using a bi-polar system, the magni-
tude, bits are in bit-positions 8 through 17" and the sign bit, is, ~n bit"'position 18 .
. As an
example~
assum,e that one of. the variables to be measurfJd is
temperature~ and assume that the' range of values for the temperature read-
ing is 200 to 700 degree s Fahrenheit. ,A continuous analog repre sentation
1-14
A nalog Input and 0 utput ..,., Continued
of this variable can be developed by a thermocouple and art amplifier to take
the form of a
volta~e
Th~
with a rang'e O'fO to 10. 23 volts.
analog subsystem
will sample this voitage s develop a 10 .. digit binary representation of the
voltage, and store it in a specified location on the magnetic
d~um.
The most
significant of these lO bits will be. in bit-position 17 of a compute,r word, the
least significant in bit-position 8.
In a unipolar systems the sign bit and
bit positions 7 through 1 are set to zero for analog inputs and ignored for
analog outp.uts..
Since the exact memory location for eac'h input wHich is
conve,rted to digital for.m will be, krtown to th;e' progra:mmer, i.t will be neces ...
sar y for ,.the
nut:rtbe·r
.p~ogr.a.m
tp
~e.fer
on,ly to that locati.on .and interpret the binar y
storecl~
.A ssumlng a linear relationship between degrees F:ahrenheit and
voltage t a table of values for thes:e representations could be as follows:
Degrees Fahte,nheit
Volts
200 1i 0
0' •.00'
00 00 00 00 0.0
2'00.5
0.0..1
00 00
0
0,10
00 00 00 . 10 10
.Z50 q, 0
l,O.o
00 01 I.O .01 0.0
325.0
2... 50
00 11 1 1 10 10
450~0
5,00
01' 11 "11 01 0,0
575. 0,
7. :50:
lQ· 11
.to 5~
700;, 0
10:'. .0.0
B i.na~ yRe pre sentation
.11
O~
00 01
10 11 10
11 10 10 00
Analog Input and Output .. - Continued
Input Stor age LocatiQns
Analog inputs are stored in tracks OB through 15 of the drum.
iq.puts are required, only track OB would be used, but for
OB through 15 would be required.
inputs.
1~
If 128.
024 inputs, tracks
Not all sectors of a track need be used for
The exact number of sectors and tracks used depends upon the num-
ber and type of inputs required for a particular system, and assignments are
made to minimize equipment requirements, cost, and memory space for the
partic ular applicationo
In a track reserved for analog input
data~
unassigned sectors cannot
be used for general program storageo
Output Conver sion Range and Number Repre s~ntation
Each analog output is capable of controlling the voltage or current in
its load to an accuracy of
±0
0
05 percent, and is capable of supplying a cur-
rent of 5 milliamperes to a transducer or' controller o
A maximum analog output current of 20 milliamperes can be supplied
at the customer i s option.
A binary number to be converted to analog form is written into a
cific memory location by the program.
occu.,pies
bit~positions
nificant digit in
The binary number for analog outputs
B through 17 of the computer word i with the
bit'~position
spe~
17, and the least-significant digit in
most-sig~
bit~position
B.
For "voltage" type analog outputs, the voltage applied to a controller.
or trans.ducer may be from 0 to 10 23 volts.
0
To apply 10. 23 volts to the load,
bit-p'ositions B through 11 of the correeponding memory sector are filled with
ones under program control.
1-16
The relationship between a number in memory
Analog Input and Output ..,- Continued
and an analog output voltage is line·ar, so that the output voltage is equal
to the decilVal equivalent of the number in mem'ory (taking bit-posi,tion 8 as
the least-significant bit) times 0.01 volt.
Three of the 1,023 possible values
are tabulated below.,
Binary Number in Analog
'(Output Sector of Memo.x:·~
~
,
Voltage Across Load
(max. current = 5 rna)
"*=!
011111111110000000
10 .. 23 volts d···c
010000000000000,000
5. 12 volts d-c
.0000000011000'0000'0
0.06 volts d ... c
In some applications the voltage applied to the load (controller) is
not as important as the current through the load
o
For these applications
a precision resistor is placed in series with the load, and the analog out ...
put is connected to control the voltage acros s the precisi.on re sistor s thereby
./
controlling the current through the load.
Although the relationship between
linear~
the load current and the number in memory is
the number in mem-
ory must be scaled an amount determined by the ratio of the load/'Inetering
resistance.
If the load and metering re sistance s are
analog output voltage appears across the
across the metering resistance.
load~
eq~al.
one half of the
and the other half appears
In this case i maximum curr'ent :tibrough
the lTc'ad and metering resistances is obtained when the program writes:
18
1
010000000000000000
/
in.the appropriate analog output sector.
Writing a larger nl,lmber into the
analog output sector could ca·use a nonlinear relationship between the output'
1-17
Analog Input and Output"" - Continued
and the number in rpemory, and in some extreme cases might'damage that
specific analog output circuit.
The exact configuration of the analog output circuits (voltage output
or current output) i!? determined by the type of controller; transducer»
strumentj/ etc.
g
that forms the load for the analog output.
in~'
During the plan-:-
ning stage of an installation, the programmer is advis,ed of the limits»
linearity~
re sponse time, and other factor s that affect the program.
The
sector numbers that will control analog outputs are also determined during
the planning stageo
Output Storage Locations
Analog outputs are taken fro·m track 07 by the analog co'nverter.
Track 07 is program writable; any portion not used for writing analog out,,·
puts may be used by the program for other storage purposes.
MAGNETIC TAPE UNIT
Introduction
The R W ~300 Magnetic Tape Unit provides practically unlimited mem,·
ory capacity for data reduction and control applications requiring more stor-
The computer and mag.netic tape
age than the basic drum memory provides.
unit ferm a system that is used for
on~Hne
data acquisition and processing J
for recording historical data, for table 100k. up, and for preparing tape s for
1
analysis ... by an IBM 700-series data processing system.
Data is then trans·,
ferred from the drum to the tape for temporary or permanent storage.
For
interpretation, analysis, and presentation with the R W ~,300 computers raw
1-18
Magnetic Tape Uni~ -- Continue'd
data is transfert'ed back to the compute,r.
AUxiliary programs and
~re also transferr.ed from 'tape' to the dru:rn.
subroutine~
Transfer of digital data between
the tape 'unit and the computer is accomplished'through a magnetic core buffer.
Two models of the R W -300 Magnetic Tape Unit are available.
If the
"standard" unit is employed, data stored on the tapes must be transferred
back to the R W - 300 for reduction and pre sentation.
A nother model of the
R W -300 Magnetic Tape Unit, called the" compatible" tape unit, prepare s
magnetic tapes in a format that is acceptable to some models of IBM magnetic tape units.
Thus, data stored by allcompatihle" R W -300' Magnetic Tape
Unit can be processed either by an IBM system; or by the R W -300.
De scription
The magnetic tape unit consists of one magnetic core buffer and from
one to eight magnetic tape transports.
one element of a magnetic tape unit.
Figure 1- 2 shows the R W - 300 and
In the figure; the six-foot rack contains
the buffer, buffer controls, and one tape transport with associated writing
and power supply circuits.
Similar cabinets are used to accommodate
ad~
ditional tape transports and associated writing and power supply circuits.
The buffer has a capacity of 128 computer words of 18 bits each.
This amount of information is commonly called a "block" in the standard
tape unit and a "record" in a compatible tape unit.
, In the
~:',ptandard"
magnetic tape unit, a tape calibrator is used to
establish specific writable blocks (no defects) on the tape, and these blocks
may 1;>,e written into individually, without disturbing the contents of other
'1-19
Magnetic Tape
Un~t
- - Continued
Figure 1-2
R W -300 and Magnetic Tape Unit
blocks on the'tape.
The tape calibrator automatically rejects any areas
of tape that are of low quality.
Format characteristics of a
II
compatible" magnetic tape unit
require that the entire length of the tape be used for sequential storage
1-20
Magnetic
of all records.
T~:pe
Unit - - Continued
Therefore p when a record is rewritten on a tape fnth.e ;1I.com-
patible" system,. all succeeding records within a
\I
file" must also be rewrit-.
ten.
Each transport holds one reel of tape with a capacity of approximately 730, 000 c@mput.er words for the
words for the" compatible" unit.
II
standard" unit and 1,
OOO~
000 computer
The magnetic tape unit transfer s data at
the maximum usabl~ rate of 1,9 536 words per secondo' An eight ... transport
. s,ystem can record data a.lltomatically at th.e maximum rate for nearly 70
minutes.
Since the
~ape
reels are easily replaced 'the dataurecording perp
iod may be eXtended indefinitely.
The transports are modified Ampex FR-400 digital tape handlers
operating at 75 inches per second in the write) search, and read modes and
rewinding at 160 inches per second.
Each transport accommodates 2400
feet of standard 1 / 2~inch magnetic tape wound on a 10 1 / 2~inch reel.
,
,
The buffer is a specially designed assembly» which in additio.n to
the core storage includes control» parity generation and
se:nsing~
timing$ and power circuits.
Parity
chec~ing»
checking~ncierror
error
s\:l:rveillanc'e
are provided to prevent los·$ and inaccuracy of data during transfers to and·
from magnetic tape.
Operation
The c.omputer program controls the norrnaill,9 automatic operation of
th~ magrietic tape unit.
signals
~o
auto\ro.atic
The 'magnetic tape unit fU'rnishe s error -condition
aid this controL» and has manual controls and indicator s for nonope,rations~\'
1 ... 21
Magnetic Tape Unit - . . Continued
A single
co~nputer
command with a number of variations dete1 mines
4
the mode of operation of the magnetic tape unit.
unit to
'~ransfer
This command causes the
data$ search. rewind, or back spaceo
Data is transferred
as follows:
a.
from computer to buffer
b.
from buffer to tape
c.
from tape to buffer
d.
from buffer to computer
To locate data recorded on tape
g
the computer searches the tape
while it is traveling either forward or in reverse until a ·specified record
address (first word of the record) is foundo
The tape unit provides the computer with indications of six conditions
that interfere with the transfer of data.
The se conditions are:
a.
buffer power supplies inoperative
b.
buffer in use
c.
tape error (parity violation)
d.
transport inoperative
. e.
f4
end of reel
write amplifiers disabled
During the last three conditions, the unit cause s the computer to st'op if it
attempts to
transfe~
data.
Computer commands related to the magnetic tape unit are described
b:cie£ly in Section
rI f
and more complete operating information is contained
in a separate manuaL.
Magnetic
Tape' Unit _ .. Continued
Specifications
Number of' buffers:
one.
Number of transports:
Power:
one to eight.
120 volts l 60 cps.
Type of buffer: magnetic care.
Physical characteristics of buffer: mounted in one tape transport.
Capacity of buffer:
128 words of 18 bits each (one block), or 64 words
of 36 bits each' (one
II
record" in a "compatible"
system).
Type of tape transport:
Dimensions of transport:
modified Ampex FR-400 Digital Tape Handler.
72 in. highll 23 in. wide, and 24 in. deep.
II
Recordirig De'nsity
Standard" Tape Unit
150 lines per inch,
8 bits per line
"Compatible" Tape Unit
200 lines per inch,
7 bits per Litle
Number of data bits
6'
6
Number of timing bits
I
o
Number of parity bits
1
1
Tape width
1 / 2 in.
1 / 2 in.
Tape length
2400 feet
2400 feet
Tape
10 1/2 in.
10 1/2 in.
Tape speed forward
or reverse
75 i'n..,Iset:,., within
10/0
75 iri. / sec.
Tape rewind speed
160 in. / sec.
160 in. / sec.
Maximum bit rate
11. 25 kps
15 kps
Minimum bit time
89 J.ts.
66 J.ts.
reel
$
within
, 10/0
.1-23
Magnetic Tape Unit - -
Contif1u~d
Recording Density
"Standard" Tape Unit·
150 line $ per inch,
8 bits pet. line
"C'ornpatible lt Tape Unit
200':Unes,' per i~ch,
7 bits per line
Record length (128 words)
2. 58 in.
1.9Zin.
Inter-record spacing
2. 72 ih.
0.75in •.
Records per 2400-foof tape
5440
10.800
Allowable record 'number s
. 21~
Record time
34. 4
.Maximum us.able data
transfer rate:'
1, ~36 wordsJ s,e,c.
Number of heads
8 read;
8 write
l-Z4
Z18
ms.
.25. 6 ms •
7 read;
7 write
SECTION II
INSTRUCTIONS
INTRODUCTION
An instruction in the RW -300 is composed of two computer words.
The first word contains an execution code. 'and an operand address.
The sec-
ond word contains an operation code and the address 01 the next instruction
to be performed.
An instruction is written by the programmer in the follow-
ing form:
execution
code
operand
address
operation
code
next -instruction
address,
The exact form taken by the instruction in the memory and the format for
listing instructions are described in Section III.
There are 21 basic operation codes in the instruction repertoire of
the RW -300.
However, many more than 21 commands are available, because
computer response to certain operation codes is modified by the execution
code and the operand address.
In the paragraphs which follow, each of the operation codes is described in conjunction with the variations made possible by execution codes
from 00 through 31 and by operand track addresses from 00 through 63. The
sector number associated with an operand address does not modify th:e operation codes, nor are the operatiori codes modified by the track and sector
numbers of the next-instruction address.
In describing the operations, the
following notation is us ed:
2-1
Introduction - - Continued
us~d
a.
"A" is
to designate the A register.
b.
"B" is used to designate the B register.
C.
"Mil is used to designate the memory location specified by the
ope rand addre s s.
d.
Pare nthe se s are us ed to de signate "contents of"; (A) means the
contents of the A register.
e.
Arrows are used to
d~signate
"replaces "; (A) ...... (B) means the
contents of the A register replace the contents of the B register.
Figure 2-1, located at the end of this section of the
manual~
contains
examples which show how different operation codes affect the contents of
arithmetic _-registers and memory.
LOAD· A
(M)"':""'-(A)
Decimal Code:
29
Mnemonic Code:
LA
Operand Address:
specifies the location of the numher (M) which will replace the
contents of the A register.
() c:)
Execution Code:
doe s not affect operation- -use a,.ny
The contents of M replace the contents of the A re'gister.
register is unchanged.
LOAD B
2-2
(M) ---- (B)
Decimal Code:
07
Mnemonic Code:
LB
The·B
Load B - - Continued
Operand Address:
specifies the' location of the number (M)
whi~h
will replace the
contents of the B reglster.
C'JC)
Execution Code:
doe s not affect operation- -use
The contents of M rel?lace the contents of the B registe r.
aBy
The A
register is unchanged.
LOAD A NEGATIVE
- (M) ---- (A)
Decimal Code:
21
Mnemonic Code:
LN
Operand Addres s:
,specifies the location of the
number (M) which, with sign
changed, will replace the contents of the A register.
does not affect operation--use
Exe cut ion Code:
The contents of M, with sign changed, replace the contents of the A
register.
STORE A
The B register is unchanged.
(A) ----(M)
Decimal Code:
30
Mnemonic Code:
SA
Operand Address:
spe cifie s the location M in which
the number in the A register will
be stored
2-3
(){J
Store A - - Continued
00
Execution Code:
The contents of the A register
doe s not affect operation- -use aay.
replac~
the contents of M.
The A
register and, the B registe r are unchanged.
STORE B
(B)~(M)
Decimal Code:
20
Mnemonic Code:
SB
Operand Address:
spe cifies the location M in which
the number in the B register will
be sto red.
OC_')
Execution Code:
does not affect operation- -use afty.
The contents of the B register replace the contents of M.
The A
register and theB register are unchanged.
ADD
(A)
+
(M) ---(A)
Decimal Code:
25
Mnemonic Code:
A
Ope rand Addre s s:
specifies location of addend, (M).
Execution Code:
doe s not affect operation- -use
DC:>
a&y
The contents of M are added algebraically to the contents of the A
register; the signed sum rep lace s the previous contents of the A register.
If the sum is zero, the sign of the A register is unchanged.
is unchanged.
2-4
The B register
Add - - Continuecl
If the number of significant A-register. bits and/or the ~u~ber of
significant M bits is 17, an addi,tion command can re sult in a car ry bit that
cannot be accommodated in the
most~significant
A
register.
The carry bit, repre senting the
bit of the sum, "overflows" the· A register ,and is lost.
Overflow does not halt the computer, but turns on the overflow indicator •
. Overflow can be detected by use of the transfer command: Transfer on
Overflow.
To obtain meaningful results from an Add instruction, it" is necessary
that the augend (A) and the' addend (M) have the same scale factor. ' Scaling
considerations are described in Section VIII.
(A) - (M) ~ (A).
Decimal Code:
24 .
Mnemonic Code:
s
Operand Address:
specifies location of subtrahend,
(M).
t.,)C)
Execution Code:
does not affect operation- -use &A¥
The contentis- of M are subtracted
algeb.raically from
the contents of
.
,
,
the A register; the signed
A
regist~r.
differenc~
.
replaces the previous. contents of the
If the difference is zero, the sign of the A·registe·r is unchanged.
The B register is unchanged •.
Z-.S
Subtract - - Continued
Ove rflow can occur under the same conditions as specified, above for
the Add command.
The minuend and subtrahend should have the same scale
factor, as 'discussed in Section VIII •.
5H1~T
Decimal Code:
01
Mnemonic Code:
SH
Ope rand. Addr e s s :
specifies the type of shift.
Execution Code:
specifies number of places to be
shifted.
The track number in the operand address specifies the type of shift'
as follows:
Operand Track Address
Type of Shift
Track 00 through 15
shift (A) right; (B) unchanged.
Track 16 through 31 .
shift (A) left; (B) unchanged.
Track.48 through 63
shift (A) left; (B) left into A. ·
The execution code specifies the number of places to be ,shifted.
Any
number from 00 through 31 can be used to obtain an instruction for shifting
from 00 through 31 places.
The sign bits of th.e A and B registers are un-
changed by the Shift command.
The two types of shifts involving only the A register are open-ended,
so that bits shifted off either the right or the left end of the A 'register are
lost.
When A is shifted right, the bit positions vacated at the Left end of the
A register are filled with zeros., When A is shifted left, the bit positions
vacated at the right end of the A register a're filled with zeros; any non-zero
2-6
Shift - - Continued
bits shifted off the left end of the A register tur,n on the overflow indicator.
(Overflow can be detected by
usi~g
the Transfer on Overflow command.)
When both the A register and B: register are shifted left, the two
registers are "coupled together so that the most-significant (I,7th) bit of the B
register
mov~ s
to the least-significant (1 st) bit position of the A register.
Bit positions vacated at the right end of ,the B register are fiUed with zeros.
Bits shifted off the left end of the A register are lO,st, but non-zero bits turn
'on the overflow indicator.
",.-..~--,,-~---. .--..-"
' .
I
,\The Sh~ft c~mmand m~y\also be usedto mtil~iply ~~." divide by/~owers
,
/'
\
' ',"'/
,,/7,
of two.
Hting regi\r content8\~~ftone ,PJa:~e,i,~ eqUiVale~~ultiP1Ying
by two, and
iftin g . . ~igh~ one place "0.'-tvide s by
~
,
'\,
,/
\
.:"""
/'" ·~e~~UA~,tJj£~\'!E!: ~,~. ,~,a.~!.~ ~
I,I'~'
,/
•
,"
tw~~\,,1 'F4te·~ u~~~;'~e.x-e'~~en,.:.,,/
. '
'--
\,"
,,\.
~
A~", d~. a c ri,b,e'6" 'in 'C onjUtl'~t6h"Wl£n"'"'s'ca:ling
' ( '
in
,
...,.-
S~ctto~t~
. . . .-" ...,..:,
TRANSFER ON NEGATIVE
Decimal Code:
09
Mnemonic Code:
TN
Oper~nd
Address:
·,becomes the nextinstructio:p. address if
t~
A register holds a
negative number. ,
...
, Execution Code:
do e s not affe ct
(2:)CJ
operation--us'e
~.
~)'
Trapsfer on Negative - - Continued
If the sign of the .A. register is negative, the operand address becomes
the next-instruction address.
Otherwise, the next-instruction address re-
mains as specified in the program listing.
are
4-nchan~ed.
The A register and the B register
A zero with a negative sign causes transfer to occur.
TRANSFER ON ZERO
Decimal Code:
11
Mnemonic Code:
TZ
Operand Address:
becomes the next-instruction
addr e s s if the numbe r in the
.A
Execution Code:
regi~ter
is zero.
does not affect operation- ;"use
atry:?Immbe:r~£.r.:Ort.F(l0,,~tthr,o·lT'gh
If the contents of the A register are zero (plus or minus), the operand
address becomes the next-instruction address.
Otherwise, the next-
instruction address remains as ·s.pecified in the program listing.
The A
regIster and the B register. are unchanged.
TRANSFER;'ON OVE1~.FLdw·
Decimal Code:
10
Mnemonic Code:
TF
Operand Address:
becomes the nextinstruction addres s if
the ove rflow indi'cato r
is on.
2.-8
~o
Transfer on Overflow -- Continued
Execution Code:
doe s not a££e ct
o c.:J
~!lPe·r ation.-
-la.s··e: azssrf
If the overflow indicator has been turned on since the last Transfer on
Overflow command, the operand address becomes the next-instruction address, and the overflow indicator is turned off.
Otherwi~e,
the next-
instruction address remains as specified in the program listing.
The A
register and the B.regi·ster are unchanged.
COMP'ARE MAGNITU"1)E
Decimal Code:
Mnemonic Code:
Operand Addres.s:
15
.CM
specifies the location of
the number (M) to be com - ,
pared' with the number in
. the A register.
Execution Code:
if the comparison of absolute values indicates
that.tp.e number in the A
register is smaller than
...
the .number in memory,
the next -instruction address if formed by ad'ding
the execution code to the
2-9
COmpc.Lre Magnitude - - Continued
next -ins truction addre s s
(A). , , 1---- (B)
.
lllltla
I(A)I '
specifiecl in the program
I
I
(M)a~
(A)£,
l't'·l'
n -l l
ln
a1
listing.
The magnitude of (A) is compare d with the magnitude of (M) by subtrfl,cting the absolute value of the number in the specified memory location
from the absolute value of the number in the A· re'gister.
At the conclusion of
the instruction. the B register holds the number originally in the A register,
and the A register holds the (signed) difference between the absolute values
of (A) and (M).
If
Ove rflow cannot occur.
I(A) I
is equal to or greater than l(M)
I ' the final contents of the
A register will be positive, and the! computer will read the next instruction
from the location specified 'as the next-instruction address i~ the program
listing.
{{ Ifl(A)
I is less than
I(M)I, the final contents of the A register will
be negative, and the computer will read the next instruction from an address
formed by adding the execution code to the next-instruction
in the progr·am listing.
~ddress
The addition performed to form a new
specified
next-instr~uction
address is modulo 128. meaning that the track number of thei\ext-instruction
address will be unchanged. and only the sector number will be modified.
(Example: if an execution code of 20 is added to sector 120, the new sector·
number will be 20
. EXTRACT
2-10
+ 120 - 128. or sector 12 of the track originally specified.)
(A)
®
(M)·----(A)
Decimal Code:
05
Mnemonic Code:
EX
Extract - - Continued
specifies the location of the num-
Operand Address:
be r (M) to be used for logical
multiplication" of the contents of
theA register.
t){)
does not affect operation- -use a:ny,
Execution Code:
The logical product of the contents of the A register and M replaces
the contents of the A register.
AU
f8
bits are used.
Each bit (including the,
sign bit) of A is matched with the corresponding bit of M.
When the corre ~
sponding bits of both A and M are ones, a one remains in that position of A.
When the co"rresponding bit of either A or M'is zero, a zero replaces the
contents of that position in A.
(The Extract operation is described in Sec-
tion V.) The B registe r is unchanged.
MERGE
(A) Ef) (M) ---- (A)
31
Decimal Code:
Mnemonic Code:
"MG
Operand Address:
specifie s the location of the number (M) to b~ logically added to the
contents of the A register.
" . "
Execution Code:
"C)C)
does not affect operation- -use
aft)'
The logical sum of the contents of the A register and M replaces the
contents of the A register,
18 bits are used.
Logical addition is performed bit-by-bit, and all
Each bit of A is matched
wi~h
the corresponding bit of M.
2-11
Merge - - Continued
\V)len the cor'responding bit of eithe r A or M, or both, is a one, a one rep1a.ces the contents of that position in A.
When the corresponding bits of both
.A'·~l.nd M are zeros, a zero replaces the contents of that position in A.
The
Brcgister is unchanged.
SWITCH
Decimal Code:
02
Mnemonic Code:
SW
Operand Address:
spe cifie s the type of switch
Execution Code: .
00
does not affect operation--use aB¥
Operand Track Address
T-xpe of Switch
Track 00 through 15
(A) ____ ( B) ; (A) unchanged
Track 16 through 31
(B)~(A);
Track 32 through 47
(A) ........ (B)
Track 48 through 63
o ----- (A),
(B) unchanged
(B)
Four types of switches are possible, depending upon the track number'
specified in the operand address.
For any track address from 00 through 15, the contents of the A register replace the contents of the B register, and the A register remains
unchanged.
For any track addres s from 16 through 31, the contents of the B register replace the contents of the A register, and the B register is unc;hanged.
For any track addres s from 32 through 47, the contents of the A and
B registers are intercha!lged.
2-12
Switch - - Continued
For any track addres's from 48 through' 63, the contents of the A and
B register s are cleared.
(A) unchanged, (B) unchanged
STOP
Decimal Code:
00
:Mnemonic Code':
SP
Operand Address: '
doe s not affe ct
oo-txJ
operation--use
~--,
doe s not affect
Execution Code:
OiJ
ope ration - -us e any
The Stop command halts the pr.ogram.
If. the RESUME button on the
operator's control panel is pressed, the computer reads the next instruction'
from the location specified as the next-instruction addr1ss in the program
listing.
DIGITAL
TheA andB registers are unchanged.
Decimal Code:
06
Mnemonic Code:
DG
Operand Address:
specifies the input or output device.
Execution Code:
for digital input, specifies number
of bits taken in and their position
2-13
Digital - - Continued
in the A register; for "one -bit"
digital outputs, spe cifie s on or
off control.
Operand Track Address
Type of Digital Command
00 through 31
Digital output from the A register
32 through 63
Digital input to the A register
e~~jjJ~ replace the' contents of the A register •
. Eighteen input lines form an "input group" that is assigned a specific
track address.
An execution code of 18 results in all 18 lines being read into
the A register, replacing the previous contents of the A register.
d. e v'c
.._-1_''''m·
.....·~''·t''s·.. ''·'''''P·l'e·'''''·o.·
·t··er ,
Outp u ts to d 1'g'tal
1
1 e s "'L',,..,...'h-4-,..,.,,,,,,
\ 11~.......,.....~;.A...'
.. .''''::.''.''·,..x,.."t
'0'", ....
.£'- . "......... •. •·..........
.&."l·
"",,,,,,1.;1..
legg-ing.,"'"tY"p'e:W"rite.r~;,..~etG.~
,L..,u.
"',.....
'\N..
are controlled by the A register.
The contents of
the A regis ter are unchanged by a Digital output command.
Eighteen output
lines form an "output group" that is assigned a specific track address,. and
each line in the addres sed group has a corresponding bit position in the A
register.
In the case of "multi-bit" outputs, all 18 lines in an addressed group
are set on-or -off to correspond to the one -or -zero bit. pattern in the' A
register.
In the case of "one -bit" outputs, one or more lines in an addressed
group can be controlled without disturbing the other lines in the group.
A
one is .placed in the A register hit position(s) of the line(s) to be affected by a
2-14
Digital - - Continued
specific Digital output instruction.
An odd-numbered execution code turns
the affected Hne(s) c.'n; an even-numbered execution cqde turns the affected
line (s) off.
address assigned to specific equipment has
computer memory.
~
relationship to drum tracks in
The track number in the operand address of a Digital
instruction doe s not refe r to me mory at all, and only has significance in the
se lection of 'the input or output device.
(A) unchanged, (B) unchanged
Decimal Code:
03
Mnemonic Code:
NO
Operand Address:
doe s not affe ct
oO--oD
operation--use
. Execution Code:
Cfft)T
. doe s not affe c't
operation--use
~
2-15
No Operation - - Continued
This comll1and causes the computer to transfer unconditionaUy to the
next-instruction address in the program listing.
,ister and the B register are not affected.
The contents of the A reg-
The No Operation code is useful in
cqnjunction with exit instructions in arithmetic subroutine s.
T,ApE
Decimal Code:
22
Mnemonic Code:
TA
Operand Address:
specifies the tr,ack of the computer
memory that is to be transfer red
to magnetic tape;. specifies
th~
mode of operation.
Execution Code:
spe cifie s whethe r
informa~ion
from the tape is to be placed in
track 14 or track 15 of the computer memory; add'resses a specific tape transport.'
1!.he-c,fta~r--a:"ct·e·r·i·stic s,.and.applicatiQn,a""of.,,the "magne-t.ie,'tap·e·,,'u'l1it·· are
o
de,.s.G.;ibe.Q,,,·erie'fty~ihS·e etlan
L'
Information is transferred between the .computer drum and magnetic
tape through the magnetic tape unit's buffer.
blocks of 128 words
each~
Information is transferred in
. An identifying word, recorded as the first word
in a block of information on the magnetic tape, permits the tapes' to ,be
searched for specific blocks of information.
Detail-e d pr~ming...an.d.-ope'l!.a:tifl.g·"i~£er.m-a-tiOA.o/f.Q.r~t~·"·R""W·'a''3"O'O'
M.a.gne,ti·e'·'"T·a:pe-Unit'·is:,,·£.Qnt-a4:ne,Cil-.in~"fl;"""S"epctra1:e-·m-afi~~h
2-16
Multiply
, MULTIPLY
(A) X (M) - - - (A, B)
Decimal Code:
16
Mnemonic Code:
M
Operand Address:
spe cifie s the location of the
multiplier (M).
Execution Code:
specifies the number of multiplier bits'used to derive the
product, and specifies the number of product bits in the B
register.
The contents of the A register are mq.ltiplied by the contents of M.
The original contents of the A and B register s are rep laced by the product.
The signs of the A and B register's agree , and are the algebraic sign of the'
product~
To obtain a meaningful product, the execution code liE" must be
equal to, or
gr~ater
than, the number of significant multiplier bits in M.
Overflow cannot occur.
The number of product bits generated by a Multiply instruction is
equal to the total number of significant bits in the mUltiplicand (A) and multiplier (M).
(Depending upon the magnitude of the multiplier and multiplicand,
the number of significant product bits may be one less than the sum of multiplicand and multiplier bits.) To accommodate all product bits, the B register
serves as an extension of the A register.
There will always be "E tr low-order
product bits in the B register; the high-order product bits will be in the A
2-17
Multiply - - Continued
register.
Thus, the execution code can be used to control the apportionment
of product bits betwe,en
~he
A and B registers.
Section VIII of this manual tells how the execution code
sfale factor' of ,the prc)duct.
a~fects
the
The paragraphs below contain examples which
show how different execution codes affect the 'results of a 'Multiply instruc~ion.
!
In the examples, ·'0000 •••• " indicates leading zeros; "xxxx •••• "
indicates significant bits I which may be some combination of ones and zeros.
Sign bit s are not shown.
In the following example, the number of multiplicand (A) bits is 17,
and the number of multiplier (M) bits is 13. :
{\
....
A Bits = 17
....
,I
•
•
•
......Mbits= 13
:..
i
I
I
Ix x x x x x x x.x x x x x x x x xltirheslO 0 0 O!x x x x x x x x x x
,
(A)
xxxl
/'~----~I--------------------~
(Mt
To obtain a meaningful product, the execution code
to or greater than the number of multiplier bits.
"E"
must always be equal
In the example, there are a
total of 30 bits in the multiplier and multiplicand, so the number of product
bits will, be either 29 or 30.
With a "minimum" execution code of 13, the B
register will contain 13 of the low -order product bits.
For E = 13, the product is:
I ........~---------- A!+ !M·' Bit~ ::i:! 30 ------~-----~;a.. . . :
I
I
Ixxxxxxxxxxxxxxxxxi
----
~
16 or 17 bits
.--
"
(A)
I x x x x x x x x x x x x x:O 0 0 01
/--...---.........
13 bits
(B)
---
Depending upon the magnitude of the multiplier and the multiplicand in the
example, either 17 or 16 bits will be in the A register.
2-18
For execution codes
Multiply - - Continued
greater than minimum, the product bits are shifted right; fewer product bits
are obtained in the A register, and more product bits are obtained in the B ,
re,gister.
,An execution code of 17 always results i~ complete multiplication,
using all 17 multiplier bits.
For E
= 17,
the product is:
I
I
A
..
•
o:x x x x x x x x x x x x x
I
...............
I
M Bits = 30
I
.... "
12 or 13 bits
+
.. I
Ixxxxxxxxxxxxxxxxxi
-----..",,---.........,...
1 7 bits
/
"',
(A)
(B)
---
In the above example, it was shown that a minimum execution code (an
execution code equal to the number of multiplier bits) results in a maximum
number of product bit,s it). the A register.
In the example, there were 17
, multiplicand bits in the A register before multiplication, and either 16 or 17
product bits in the A register after multiplication.
tion applies to any 'Multiply instruction:
r
The following generaliza .. ,
After multiplication, the number of,
significant bits in the A register remains the same, or is reduced by
one~
if
Also, IIE",
the execution code doe s not exceed the number of multiplier bits.
\
low-order product bits are always' shifted into the B register.
In the general case, the maximum execution code is 17.
However, ,
higher execution c:odes can be used to shift insignificant product' bits (zeros) ,
off the right end of the B register.
example:
.
I
'
""""-Abits
This is illustrated by the following
.
= 12--....
.-.-·t·
.......
M bits
,
,
10 0 0 0 O:x x x x x x xx xl 0 0 0 !time s 10 0 0 00 0 0 O:x x x x
, /
(A) .(M)
.
=
Xl{
9---.:
.•
x 0 0
I
I
•
2-19
rv1ultiply -- Continued
There are a total of 21 bits in the multiplier and multiplicand, so the nUlnber
Also, there are a total of 6 zero bits
of product bits will be either 20 or 21.
in the least-significant bit positions of the multiplier and multiplicand; there
will 'be at l~ast 6 zeros in the least-significant bit positions of the product~
The 6 ze ro bits can be shifted off the right end of the B register by using an
e~ecution
code E == 17 + 6 = 23.· For E
= 23,
•, (
1 0 0 "0 0 0 0 0 0 0 0 0 0 0 0 0 0 01
the product is:
A
+M
Bits =
2l----~;):-1
I
10 0 Ix x x x x xx x x x x x x x x 10 0 0 0 0 0:
(A)
I (B)
\
---_~~~---~_-- t
1 7 ...............
bits
I- - - -..........-- ........
.....
:+ 6 zero bits
:
E = 23
Caution must be used in assigning an execution code greater than 17.
If any ..
significant product bits (one s) are shifted off the right end of the B register,
the product is not simply truncated -- the bits that remain in the A andB
registers will be meaningless.
An execution code of 17 always results in a meaningful product.
For
E :: 17, the product is:
l--....- - - - A + M Bits == 21
r--------------------~I-------_
"-,O_o_o_o_o_0_o_o_o_o_o_o_o-;:_x_x_x_x.....1
Ix x x x x x x x x x x
I ~"
(/B) --17~bl'ts
4 bits (A)
..... :
°°°°°
0
,
----
An execution code equal to the number of significant bits in the multiplier
alwa.ys results in a rncaningful product.
:-.'l
For E :: 9, the product is:
A + M Bits = 21
I0 0 0 oo! x x x x x x x x x x x x 1\
1 2 bits
)11
~""x-x-x-o-o-o-o-o-o-'l-o-o-o-o-o-o-o-o""'"J
(A) (B)
9 bits
Divide
(A) + (M) ____ (A); remainder ___ (B)
DIVIDE
Decimal Code:
26
Mnemonic Code:
D
Ope rand Addre s s:
spe cifie s the location of the.
divisor (M).
Execution Code:
specifies the number of
quotient bits.
The contents of the A register are divided by the contents of M.
The
original contents of the A register are replaced by the quotient, and the
original contents of the B register are replaced by the remainder.
The sign
of the A register is the algebraic sign of the quotient; the B register takes'
the sign of the dividend.
If the ratio of dividend to divisor is one or greater,
the overflow indicator is turned on.
Basically, a Divide command yields one integer quotient bit, followed
by a serie s of fractional quotient bits.
Thus, the maximum
~inary
quotient
is 1. llll1. ..•• , and the ratio of the dividend (A) to divisor (M) must be less
If (A) + (M)
than two.
~
2, the quotient will not be meaningful.
The number of ;quotient bits generated is always equal to'the execution code
"E".
The execution code can be chosen to obtain a quotient with a
specific scale factor, as discussed in ~ection VIII.
The effe~ct of different
execution codes on the quotient is illustrated by the examples which follow.
In the examples, "00000 •••• " is used to de signate leading zero bits, 'and
"xxxxx..•.
II
is used to de signate some combination of one s and zer~s that
repre sent significant bits.
Sign bits are not shown.
Consider dividend (A) with 8 significant bits, and divisor (M) with
1 2 significant bits.,
2-21
Divide - - Continued
:~Ab't
I
I
= 8-)-:
1 S
•
o 0 0 0 0 0 0 0 0 :x x x x x x x
1 ....( _ -
divided
by
,.
xl
:
I
M
.
bits
= 12
x
) :
•
I
xx
0 0 0 0 O:x x x
x x x
x x x
/' '-----:-.-~------.....
(A) + (M)
I
Using an executionco9.e of 1cause·s only one quotient bit to be generated.
The first quotient bit· generated is the integer bit.
In this· example, the di-
visor is much larger" than the dividend, and the integer bit is zero.
For E
= 1,
th~
quotient and remainder are:
E = 1 qu otient bit
10
3
00 000 0 0 0 0 0 0 0 0 0 001
Integer ---.!'(A)
Using an execution code of 7 causes seven quotient
b~ts
to be generated: an
integer quotient bit, and six fractional quotient bits.
For E = 7, the quotient is:
;p.-a
t~
•:~ 17
:"E = 7 quotient:
,
bits ,
.1 0 0 0 0 0 0 0 0 0 0: 0 0 0 0 x x x
Integ~r -.J
Fractlon
--r-
I
'fA)
I
remainder bits
)at
XXXXXXXXXXXXXXXXXI
/
(B)
In the above example, the first four quotient bits are zeros because
the divisor has four more significant bits than the dividend.
In general, the
minimum number of leading quotient bits that will be zero can be predicted
by subtracting the number of dividend (A) bits from the number of divisor
(M) bits.
The execution code can then be chosen to eliminate M - A quotient
zeros by adding M - A to 17 to form the execution code.
2-22
•
Divide - - Continued
+
In the example: E = 17
I.......- E
I
=. 21
quotien:t bits
M - A = 21.
•t
,
---17 remainder
--~}IIri:""',
:'~I xxxxxxxxxxxxxxxxx
Integer
bit and
3 leading
zero bits of
fractional
quotient
For: E = 21, the quotient is:
<::::::::==::::;:
;;>
1 7 fractional
quotient bits
,
•
bits~'
•
•
I,
xxxxxxxxxxxxxxxxx
(A)
(B)
When an execution code greater than 17 is used, quotient bits are
lost o"£f the left end of the A register.
In the example, E - 17, or 4 quotient
bits were shifted off the left end of the A register.
An execution code as high
as 31 can be use d, with the result that 31 - 17, or 14 quotient bits will be
lost.
For ,execution codes greater than 17, E - 17 quotient bits are always
lost off the left end of the A register.
The overflow indicator is never turned on when zero or non-z.ero
quotient bits are shifted off the left end of the A register during a divide instruction.
or greater.
The overflow indicator is only turned on when the quotient is one
A quotient greater than one always turns on the overflow indica-
tor, even if quotient bits are not shifted off the left end ·0£ the A register.
In the following example, the quotient will be less th.an two, but may
be
>"
1 because there are as many bits in the dividend (A) as in the divisor
(M).
I
I ~Ab'
I
10
1 ts
,
>
~
0 0 0 0 0 0 0 o:x x x x x x x x
I
.~M
~
b't
•
I
I
1 S
>
~
1
divided by ..
1_o_o_o_o_o_o_o_o_o..;!_X_X_X_x_x_x_.x_x
.....
" . /
(A)
{M}
2-23
Divide - - Continued
Exampl.es of quotients obtained using execution codes 1, 17, and 18 are tabu'"
lated below.
If the quotient is equal to, or greater "than one, the ove rflow indicator is
turned on.
for E = 1, the quotient is:
E
. , .~17 remainder bits ____ .:
=1
quotient bit --:t
ro 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 x I.; ilemainder is Ixxxxx xxxxxx xxxxxx 1
J",
Integer:: 1 if (A} >" 1---"
(M)
= 17 ,the
For E
bits
•
I;
Ix x x x x x x x x x x x x x x x x
~
(A)
1 7 remainder bits
• '
)I1IJio- . ,
r4.l(
--
Integer
1 if
(M)
.:>
=
/
(BJ
quotient is:
= 1 7 quotient
E
(A)
,"""",
•
•
)III- •
'I11III(
remainder is Ixxxxxxxxxxxxxxxxx I
----''(A)
16 fractional
quotient bits
I
'(B(
,
"
'
1
For E = 18, the quotient is:
I
E
I
= 18 ,quotient bits
,,-c(
jXlx x x x x x x x x x x x x x x x
~----
Integer
,bit lost
if (A) '.> 1
(M)
...............
'
.---
I
)lila
xI;
...... ,
I
B)
If there are mor e bits in the dividend than the divisor I the quotient may be
greater than two.
If (A) + (M) < 2, the quotient will always be meaningful;
if (A) + (M);- 2, the quotient will be meaningless.
2-24
•I
remainder is Ixxxxx'xxxxxxxxxxxxi
---'-,
(A)
17 fractional
quotient bits
1 7 re mainder. bits
Divide - - . Continued
Special Cases:
If the dividend and the divisor are both zero, the "E" quotient bits will
be all ones (with the appropriate ·sign), and the remainder will be all zeros.
If th.e dividend :ts non-zero and the divisor is zero, the quotient (with
:g; = 18) will be all ones (with the appropriate sign) minus the dividend. The
remainder will be all zeros.
A .dividend and divisor having a quotient equal to or greater than two
can be used to obtain a valid remainder in the B register if the execution
code "E" is limited to 18 - A, where
the dividend.
"A"
is the number of significant bits in
Under these conditions, there will be liE" quotient bits in the
A register; the bits will all be ones.
EFFECTS ON REGISTERS
The table in figure 2 -1 shows how the different operation codes affect
the contents of memory, the A register, and the B register.
Because it is
cumbersome to write 18 binary digits to show the contents of M, A, and B,
the numbers are expressed in octal form.
(Each octal digit represents 3
binary digits, as discussed in Section VIII.) Note that these .octal numbers
include the 18th or sign bit.
Therefore, any octal number of 400000 or
greater has a one (-) in the sign bit.
S
o·
For example:
17
16
15
14
13
12
11'
10
9
8
'7
6
5
4
3
2
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
O·
will be written as 360000 and
2-25
Effects
Registers ... Continued
011
S
17.
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
l~
1
1
0
'0
1
0
1
0
0
0
0
0
0
0
0
0
0
0
will be written as
624000.
The fir st co luron in the table indicate s the oper ation that is to be .
performed.
The next four columns list the execution code (EX), the operand
address (OPRND), the operation code (OP), and the next .. instruction address
(NI).
Although these codes and addresses are shown in the' sequence that
they would appear in a program listing, the series of instructions does not
represent a program.
The remaining columns of the table indicate the contents of memory,
the A register, and the
:a
register.
The first line of each instruction repre-
sents the contents before the instruction is execu,ted; the second line represents the contents after the instruction is completed.
The following symbols
are used:
a.
XX means that the contents of the register or the memory location are destroyed in the process of executing the
instructio~.
b.
SS means any sector number.
c.
-- means that the register contents, operand address, and/or
execution code is of no importance in the instruction.
The table lists only operations that affect memory, registers, or
next-instruction addresses.
and Tape.
2-26
Not included are: Stop, Digital, No Operation,
Figure 2-1.
oIperatlon
EX OPRNDOP
Load A
--
Load B
- - ----- - -- ---
Load A Neg
-- -- ...
-----
--
.. --_ ..
Add
--
-----
Add
--
.... -_.-
25
Subtract
--
.. ----
24
Subtract
- .. -----
24
Shift
05
15-5S
01
07
31-55
01
17
63-55
01
--
-----
09
--
46-73
09
-- .... _--
11
Store B
___ (A)
Shift
(A) ....
Shift
(A),(B)---
Transfer on
Negative
Transfer on
Negative
Transfer on
Zero
(M)
29 .. ---- 042500
042500
07 - ---- 042500
042500
21 - ---- 042500
042500
30 - ---- XX
042500
20 - ---- XX
042500
25 .... --- 230000
230000
--
Store A
NI
Commands and Registers
NOTES
(A)
(B)
XX
042500
------
------ XX
------ 042500
XX
442500
042500
042500
(M)~(A)
(M)~(:B)
------
-(M) ..... (A)
------
------ i042500
042500
(A) ..... (M)
-(B)
~(M)
------
(M)+(A)---(A); note
that original (A) is
negative.
.. ---- 230000 270000 ------ (M)+(A ).... (A T;ove rflow occurs; turns
230000 120000
on overflow indicator.
.. -.--- 270000 230000 ------ (A)-(M) .... (A); since
(M»(A), answer is
270000 440000
negative.
----.- 670000 230000 ------ -(A)-(M)~(A); since
M is -, overflow
670000 120000
'0£ c ur s; t ur n son
overflow indicator.
Track
no • specifies
042500
- -- .. ---- ..
right -shift of A; EX
001052
specifies 5 place s.
----- ------ 042500 ------ Track no. specifie s
left shift of A; EX
120000
specifies 7 places;
turns on overflow
indicator.
- ---- ------ 042500 406700 Track no. specifies
006700 400000 left shift of A, B; EX
specifies 1.1 places;
turns on overflow.
indicator.
...
....
..
Sign of A is +; NI
042500
45-75
remains as pro'042500
45-75
grammed.
45-75 ------ 442500 ------ Sign of A is - j
OPRND becomes NI.
442500
46-73
(A) not zero; NI stays
45-75 ------- 042500 -- ..
042500
as programmed.
534000
074000
--
-----
-_
-_
----
2- 27
Figure 2~1.
COlnmands and Registers (continued)
Operation
EX OPR1'tD OP NI
Transfer on -- 46-73 11 45-75
46-73
Zero
--_..
(M)
------
(A)
400000
400000
--
....
--
46~73
Compare
,Magnitude
29
_... --- 15 TI-75 034200 042500
Compare
Magnitude
29
-- ---
Extract
-- --- 05
Merge
---
Switch
..
Switch
- ..
31-S8 02 -
Switch
.- -
47-S8 02
Switch,
.. -
63-SS 02 ....... --
Multiply
17
......
Transfer on
Overflow
Transfer on
Overflow,
-
(B)
-~--
.. -
10 45-75
45-75
------ ------ ------ ...
10 45-75
46-73
------ ------ ------
XX
Tr-75 034200 006300 042500
--
15 IT-I03 442500 034200
XX
'IT-04 442500 406300 034200
-,..
- .... - 021415
31
--- --
15-55 02
-- ... --
-- -
234277 -----021415 020015 "
021415 234277 -----021415 235677 '
------ 042500 XX
042500 042500
NOTES
(A) are (-) zero; ,
OPRND.becorpes
NI.
Ove rflow indicator
off; NI remains as
1?rogrammed.
Overflow indicator
on; OPRND becomes
NI.
(A)-..{B); since '(M)
< (A), NI is unchanged.
(A)~{B); since (M)
> (A) se ctor of NI
becomes 103 + 29
-128 or 4.
(M)
®
(A)~
(M)
G:>
(A)--- (A)
Oprnd. track nos.
00 -,15 specify (A)
~(B).
-_ ..
---- ------
XX 400277
400277 .tlO0277
----- - .. _---
042500 400277
400277 042500
------
042500 400277
000000 000000
16 - ......... 000012 000002
XX
000012 000000 000024
14
---- -
16
- - ---
Multiply
17
-----
16
- ----
012000 000200
XX
012000 000005 000000
Multiply
15
....
----
012000 000200
XX
012000 000024 000000
_.. --
16 -
Oprnd. track nos.
16-31 specify (B)
~(A).
Multiply.
400012 000002
XX
400012 400000 400240
Oprnd. tra'ck nos.
32 .. 47 specify (B)
:=;t:(A) •
Oprnd. track nos •
48",,63 specify
O~A) B.
(M) X (A)-'-{A), (B)
10 10 X 210' = 20 10
-10
X 2
= -20 10
10
10
Shiite d left 1 7 - :E :=
3 place s.
(M) X (A)-ll-(A), (B)
10
X 2
= 20 10
10
10
10 10 X 2 10 = 20 10
Shifte d left 1 7 - E
places.
.= 2
2- 28
(A)
Figure 2-1.
Commands and Registers (continued)
(A)
(B)
EX OPRND OP NI
(M)
XX
12 -- - _.. 16 .. -- -- 012000 000200
012000 000040 000001
Operation
Multiply
Divide
18
Divide
18
-------_ ..
Divide
17
-_ ......
Divide
10
......
Divide
26
-- ---
26 .-- -- 300000
300000
.......
26
200000
200000
-_
XX
230000
312525 200000
300000
XX
200000 000000
26 ....... -- 200000 300000
XX
200000 300000 000000
i
i
_-
26 ...
26
_- .... - 200000
--- --
002500
XX
200000 000012 100000
200000 002500
XX
200000 100000 000000
NOTES
X 2
=?
10
10
Execution code less
than number sig.
bits in M -- invalid
product.
(A) + (M)---A;
remainder -'-(B)
(A)+(M)> 1 turns
on overflow indicator; overflow
occurs, but fractional quotient in
A register is valid.
(A)+(M)> 1 turns
on overflow indica~
tor; however integer and fractional
quotient in A
register is valid.
(A) + (M)--- A;
remainder ~(B);
quotient shifted
right 18- E =8
places.
(A) + (M) ...... A;
remainder ~(B);
quotient shifted
left E - 18
7
places; significant
bits are lost from
A register; does
not turn on overflow
indicator.
10
=
2.- 2.9
SECTION III
BASIC PROGRAMMING
INTRODUCTION
This, section tells how numbers and
in~tructions
are represented in the,
RW-30Q computer. The operations defined in the preceding section are used to
illustrate the, instruction format, and simple program listings are presented.
On the magnetic drum which serves as the computer's in.ternal memory,
,words are recorded' 'on tracks as variations in magnetic flux., There are 64 tracks
of interest 'to the programmer, and these track$ are numbered
00
through 63.
'Each track accommodates 128 words' in sectors that are numbered 00 through
127. ' A particular location in memory is specified by the track number and
'seC?tor number.
For, example, 17-07 specifies sector 07 of track 17.
RW-300 computers with the expanded memory hav:e.'lZ3 tracks, or
15, 776 words, available to the programmer. Refer to Section IV forprogr,amming'information for computers having this optional feature.
Data words (number s) and instruction words are represented in ,the computer as binary number s.
A word is 18 binary digits in length. Although there
are two space bits separating words on the drum, the space bits are of no con, cern to the programmer.
A word may represent numerical itlformatioft, half of au instruction,
or any pattern of 18 bits desired by theprOiramme1" (e. g., for program modification).
Since the, comp~ter is a binary machine" the programmer
3-1
Introduction - - Continued
must have a working knowledge of the binary number system.
(See Section
VIII. )
INSTRUCT10N WORDS
An instruction is two computer words, or 36 bits, in length.
Two
addresses are included in each instruction: the addres s of the operand and
the addres s of the next instruction.
This arrangement p·rovide s what is com-
monly called a lIone -plus-one" instruction form, which permits optimum
(i. e.
t
minimum-time) programming.
The operation to be performed, OP,
is one of 21 different arithmetic or logical commands.
The execution code,
EX, determines the number of bits in a product or quotient, the number of
place s shifted, or othe r special functions as de scribed in Section II.
WORD ONE
,
Operand Address
Execution'
Code •
EX
WORD TWO
Operation: Next Instruction Address
Code
I
I
OP
I
Track
:
Sector
I
I
Track
Sector
( Bit Positions)
(Bit Positions)
FORMAT FOR LISTING INSTRUCTIONS
The series of instructions comprising a program are'\ usually listed
on a form similar to the one shown below.
CI
EX OPERAND
OP
iA
I
I
IA
I
I
IA
I
I
--I •
••
I
'I"
NI
REMARKS
II
1'1
"
I
I
The columns of the listing have the following significance:
3-2
Format for Listing Instructions - - Continued
A is an "indicator" which, when read by the computer during loading,
announces that the number which follows is an address.
CI,is the location where the instruction is to be stored.
CI stands
for "cur rent instruction".
!.. is
an indicator which announces that the numbers whi,ch follow are
to be stored in the location previously specified.
EX is the execution code contained in the first word of the instruction.
OPERAND is the address of the operand that will be used in the instruction.
(The operand address may specify a number in memory that will
be us ed in a computation, or may modify the instruction - - the exact significance of the operand address is explained in relation to each of the operation
codes. )
I is an indicator which announces that the numbers which follow are
to be stored in a sector whose number is one greater than that specified in '
the eI column.
Thus, the entire instruction 'appears in two successive word
(sector) locations on the, drum, and the fir st word is located in the sector,
spe cifie d in the CI column.
OP is the operation code contained in the second word of the instruction.
NI is the address of the next
inst~uction,
i. e., the address of the in-
struction which will be read by the computer after the current instruction has
been comp leted.
(In some case s, the next instruction will be read from the
address specified as the operand a'ddress, or will be formed by adding the
execution code to the address specified in the Nt column.)
3-3
Format for Listing Instructions - - Continued
The REMARKS column may be used by the programmer to make notes
that can be referred to when the program is being checked out or modified.
The program is punched on pape r tape using an off -line Flexowriter.
The typing (punching) format must be compatible with the RW -300 load program contained in track 63 of memory.
After the tape is prepared, it is
threaded through the Flexowriter tape reader.
The operator presses the
LOAD button on the R W -300 contro 1 pane 1 to initiate loading.
The load pro-
gram, tape -punching format, and related operating procedures are described
in Section VI.
Sector 00 of track 00 is called the "origin" because the RW -300 reads
. the instruction in sectors 00 and 01 whenever the START button is pressed.
If the following listing were punched on tape, loaded into the RW -300, and the
START button pre ssed,
th~
first word of the instruction (execution code and
operand address) would be read from sector 00 of track 00, and the second
word of the instruction (operation code and next-instruction address) would
be read from sector 01 of track 00.
C I E X OPERAND
R 00-00 11 100 1
OP
NI
REMARKS
52-17
The instruction commands the computer to load the A register with
the ope rand located in sector 17 of track 52, and proceed to the next instruction in sector 06 of track 17.
As noted in the remarks column, this instruc-
tion loads the .A register with the binary equivalent of the decimal number
460.
3-4
Data Words, or Constants
DATA W.ORDS, OR CONSTANTS
mag~
A data word, having numerical significance, is composed of 17
nitude bits, plus a sign bit.
The sign bit is zero for positive numbers and
one for negative numbers.
Consider the decimal number
+0.9375
in binary.
If
~ollowing
form:
0
1
f
'Bit ~
18 17 16
Positions
+ o. 9375,
which i$ equivalent to
+ 0 .•
1111
were stored in the computer, it would appear in the
0
0
0
0
0
0
0
0
0
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
1
1
0
0
0
0
If the number were negative, the binary digit in bit-position 18 would be a
one.
The bit pattern shown above might also represent the decimal number
3. 75 if the programmer chose to think of the binary point as being between
bits 15 and 16 (3.75 in decimal
= 11.11
in binary).
Location of the binary.
point is a scaling consideration which is discussed in Section VIII.
FORMAT FOR LISTING.CONSTANTS
Constants must be placed in computer memory during the loading
operation.
Constants are usually listed on a form similar to the one shown
below.
ADDR.
CONST.
A
C
A
C
A
C
REMARKS
,
I
3- 5
.
Format for Listing Constants - - Continued
The columns of the, listing form have the following significance,:
!:
is an indicator which, when read by the computer during loading,
announces that the number which follows is an address.
ADDR. is the location where the number is to be stored.
CONST .is the number, or constant.
,The REMARKS column may be used by the programmer to ,make notes
that can be referred to when the program is being checked out or modified. '
Constants are punched on paper tape along with the instructions of the program, and the punching format must be compatible with the load program
described in Section VI.
If the decimal constant 460 were to be listed for storage in memory,
the number would first be converted to its six-digit octal equivalent, 000714.
See Section VIII for information on decimal-to -octal conversion., For storage
in sector 17 of track 52, the listing of the constant would take the following
form:
bl
ADDR.
CONST.
s2 17
-
C000714
REMARKS
460 10
The six-digit octal number representing a constant includes 17 magnitude bits and one sign bit.
In the listing of constants, the sign bit must be
included in the most-significan,t octal digit.
Therefore, the most-significant
octal digit of a constant contains two magnltude bits and one sign bit.
3-6
Format for Listing Constants - - Continued
The octal equivalent of
+ 98304
is 300000, which would appear in
computer memory as follows:
~
- most-significant octal digit
7
1011111010101- - - - + sign,/'
The octal equivalent of -98304 is -300000.
Since the most-significant octal
digit must include a one to form the negative sign bit, the number would
have to be specified on the program listing as 700000.
The number would
appear in computer memory as follows:
~most-significant
~
"
octal digit
.
USE OF MEMORY
General
In listing the instructions and constants, the programmer must choose
memory locations that are accessible to the computer when the program is
being loaded onto the drum and when the program is running.
The choice of
these memory locations is governed by the characteristics of memory, the
characteristics of the load program, the configuration of the system, and
by conventions that have been established o"n the basis of operating experience.
The paragraphs which follow describe the constraints imposed upon
reading and storing information in memory, and describe how listings should
be organized so that punched tapes can be loaded easily.
Suggestions for
keeping track of storage locations are also presented.
3-7
U;.:\_~
of
Merno~'y
-- Continued
The choice of memory locations determines the time required fo:!'
the computer to complete calculations.
These timing considerations relate
to "optimum programming" de scribed in Section IV.
Reading Information from Memory
A ny sector in tracks 00 through 63 can be j,"ead by the computer under
program control.
Tracks 08 through 15 mayor may not contain the digital equivalent
gf an analog input, depending upon the number of analog inputs accommodated
by the sy:stem.
Also, tracks 14 and 15 may contain data being' transferred.
from the magnetic tape system.
Track 63 contains the load program which starts when the LOAD
button is pressed.
Storing Information in Memory
By mating the "tr.ack group selection plug" with an ··appropriate "track
group" jack, information can be stored in any sector of tracks 00 through 61.
The plug and jack, located on the test and maintenance panel, are described
in Se'ction VII.
Each track group (except track groups 56 through 61) includes
eight tra"cks, as follows:
00 through 07
08 through 15
16 through 23
24 through 31
32 through 39
40 through 47
3-8
· Use ~f Memory '-- Continued
48 through 55
56, through 61
When the program is running, the track group selection plug on, the
R W -300 test and maintenance panel is usually connected to the jack -marked
0-7, because these tracks can b'e written into under program control.
track group is sometime s referred to ,as
II
This
scratch pad" memory, because it
is most frequently used to hold the intermediate results of calculations.
If
the program instructs the computer to store information in some track group
other than 00 through 07 , the computer
ha1t~
and turns on the ERROR light.
The program will resume if the track group selection plug is moved to the
correct jack and the RESUME button is pressed.
However,subsequent at-
tempts of the program to store in some other track group will be foiled by
another ERROR indication.
Therefore, instructions and,constants are
usually loaded into track groups 08 through 61, and tracks 00 through 07 are
reserved for intermediate results of calculations.
Specific sectors of track 07 are reserved for analog outputs,
~.·J.d
only
control information relating to specific output line s should be written into
the se sectors.
Specific tracks in track group 08-15 are reserved
for,an~log
inputs.
Instructions or constants cannot be loaded into' any sectors of these reserved
tracks.
Except during program loading, information can always be stored in
the 32-word recirculating register of track 62.
The 32-word register is
3-9
U ~e of Memo ry - - Continued
deacribed in conjunction with optimum programming (Section IV).
Informa-
tion can be stored in track 62 without reference to the track group selection
plug.
However l the information must be ,vritten under program control, and
not'during loading, because certain sectors of track 62 are written int.o by
the load program, and any attempt to store in these' sectors during loading
will be fruitless because the load program will write other information there.
Information cannot be stored in track 63; any attempt to store in
track 63. causes the ERROR light to glow and halts the program.
Organization of Listings
The lists of instructions and constants should be organized so that instructions to be stored in specific track groups appear together.
When a program of instructions and constants is being loaded l the
compute r stores instructions and constants in the tracks specified in the CI
column ,of the instruction listing (and in the
listing).
ADD~
column of the constant
If the listing calls for storage in different track groups I the com-
puter signals ERROR 1 and the track group selection plug must be moved to
the appropriate track group before the instruction or constant can be stored.,
Therefore l to speed up the loading process, the programmer should organize
his listings so that all of the instructions to be loaded into ..a track group appear together on the pape r tape punched from the listings.
Record Keeping
Only one wo rd can be stored in any sector of memory.
When a punched
tape of a pro gram listing is being loaded into the computer, new information
will be stored in the locations specified, thus destroying anything stored
3-10
Use of Memory -- Continued
earlier.
Therefore. if two separate instructions are assigned the same
memory location, the instruction read last will be the instruction stored in
the memory location.
To avoid assigning the same memory location to separate information,
the programmer must keep a record of sectors in which instructions and constants are to be stored.
The form shown be low is convenient for record-
keeping purposes.
Channel
0
32
64
96
2
34
66
98
4
36
68
100
6
38
70
102
8
40
72
104
10
42
74
106
12
76
108
14
44
46'
78
110
16
48
80
112
18
50
82
114
20
84
116
22
52
,54
86
118
24
56
88
120
26
58
90
122
28
60
92
124 '"
30
62
94
126
....\
Note that only even-numbered sectors are listed on the form.
Since
an instruction occupies two sectors, it is common practice when programming
the R W -300 to specify an even-nulubered sector location for instructions; in
3-11
Use of Memory -- Continued
this way, the first word of the instruction is stored in the even-numbered
sector, and the second word is stored in the following odd-numbered sector.
There is no restriction to preyent the programmer from as signing an
odd-numbered sector to the first word of an instruction--in which case the
second word will be stored in the following even-numbered sector.
If sector-
location 127 is assigned to the first word of an instruction, the program listing must specify that the second word of that instruction is to be stored in
sector 00 of the same track.
In this special case, the complete instruction
is listed as two " half-instructions" :
EX OPERAND
CI
IA
01-127 I 00
IA
01-00 I 00
52-17
OP
REMARKS
NI
(Ex and Operand)
I
LOAD A
17-06
(Op and NI)
I
SAMPLE PROGRAMS
The following examples show how to construct computer programs
using the listing formats des cribed in the preceding paragraphs, and using
the commands described in Section II.
Example I
a.lJ.f 1.'
The following is a program to add two numbers, ~
the result in the memory location 01-02.
CI
EX OPERAND
OP
Let ~
NI
= +1273 8
and'y
REMARKS
~ 00-00 I 00
01-00
I 29 00-02
~ 00-02 I 00
01-01
I 25 00-04 x
k\ 00-04 I 00
01-02
I 30 00-06 Store result in 01-02
k\ 00-06 IOO
00-00
I 00 38-124 Stop
3-12
..
x
~
+y
A Register
-~
A Register
and store
= -243 8 •
Sample Programs - - Continued
1:1
ADDR.
CONST.
REMARKS
01-00
C001273
x
01-01
C400243
y
To prepare 'this program for loading into the computer, a pape r tape is
punched by typing the above listing on an off-line Flexowriter, using the
typing format de scribed in Section VI.
To load the program, the programmer first thre'ads the punched tape
through an on-line Flexowriter tape reader, and then presses the LOAD button on the computer's control panel.
The tape is read under control of the
load program in track 63 of the computer, and under control of the load program, the instructions and constants are stored in the locations specified in
the CI and ADDR. c.olumns of the program listing.
After the last symbol of the punched tape has been read, the computer.
will continue t'o read the blank trailing tape unle s s the last symbol punched on
, the tape is an "s".
will stop.
If an "s" is punched at the end of the tape, the computer
If the re is no "s" punched at the end of the tape, the loa?ing opera-
tion may be h.llted by pressing the STOP button.
Pushing the START button causes the computer to begin the
progra~
by reading the first instruction contained in sectors 00 and 01 of track 00 •
.When the computer completes the sample program, it will halt.
The
results of the addition (0010308) will be in the A register, as well as in
memory location 01-02.
The contents of the A register may be observed on
the ,oscilloscope of the test and maintenance panel, as described in
Se ction VII.
3-13
Sample Programs - - Continued
When the computer halts in response to a Stop instruction (operation
code 00), it may be directed to proceed to the next-instruction address by
pr es sing the RESUME button.
In the example J pres sing the RESUME button
(after the computer halts) causes the computer to proceed to the instruction
located in se ctor 124 of
tr~ck
38.
The functions of the R W -300 control buttons are summarized in
Se ction VII.
Example II
This program calculates the average of the squares of
be rs:
L.!.
n
x.2, i
1
=
1, ••• , n.
memory location 01-50.
In this .example,
The numbers xl' ••• , x
~ = 4,
4
~
small num-
and.!: is stored in
are stored in locations
01-00- through 01 -03 , respectively.
When the Stop instruction is executed, the average of the squares will
be in the A register and in memory location 02-00. (See page 3-150 )
Note 1: Multiplication results in a double-length product.
Since this
example involves small numbers l the significant digits of the product are assumed. to be in the B register, in which case the A register will contain zero·s.
This is not a general assumption, and it is the responsibility of the programmer to predetermine how significant product bits will be
di~tributed.
between
the A and B registers by adjusting the "scale factor" and execution code.
These considerations are discussed in conjunction with number systems and
scaling in Se ction VIII.
Note 2: The significant product bits in the B register are switched
into the A register and then stored.
3-14
The two instructions that accomplish
Sample Programs - - Continued
CI
EX OPERAND· OP
NI
REMARKS
lA
00-00 I 00
01-00
I 29 00-02 Load A
X ---{A)
1
Note 1
lA
00-02 I 17
01-00
I 16 00-04 Multiply
X1~{A),
Note 2
!A
00-04 I 00
32-00
I 02 00-06 Switch
(A)
lA
00-06 I 00
02-00
I 30 00-08 Store A
X12~Location 02-00
!A
00-08 I 00
01-01
I 29 00-10 Load A
X2~(A)
k\ 00-10 I 17
01-01
I 16 00-12 Multiply
X22~{A),
lA
00-12 I 00
32-00
I 02 00-14 Switch
(A)
!A
00-14 I 00
02-00
I 25 00-16 A.dd
Xl
!A
00-16 I 00
02-00
I 30
00-18 Store A
X
lA
00-18 I 00
01-02
I 29
00-20 Load A
lA
00-20 I 17
01-02
I 16 00-22 Multiply
X ........ {A)
3
2
X3 --- (A), (B)
lA
00-22 I 00
32-00
I 02 00-24 Switch
(A) •..
lA
00-24 I 00
02-00
I 25 00-26 Add
Xl
~ 00 ... 26 I 00
02-00
I 30
00-28 Store A
~ 00-28 I 00
01-03
I 29
00-30 Load A
~
00-30 I 17
01-03
I 16 00-32 Multiply
~ 00-32 I 00
32-00
I 02 00-34 Switch
(A) ..
'A
00-34 I 00
02-00
I 25 00-36 Add
2'
2
2
2
Xl +X2 +X3 +X4 ___ (A)
Note 3 ~ 00-36 I 18
01-50
I 26 00-38 Divide
222
2
(Xl +X2 +X3 +X4 )-+. 4 ....... (A)
I 00
02-00
I 30 00-40 Store A
Average---location 02-00
~ 00-40 I 00
-- --
I 00 ... -
k\ 00-38
- ..
III
!lIE
2
1
2
(B)
(B)
.. (B)
lIE
2
(B)
2
+X2 ~(A)
+ X
2
2
....... 1ocation 02-00
.. (B)
·22
+X2 +X3 ~(A)
X12+X22+x3~lo~ation02-00
X ---(A)
4
2
X ~(A), (B)
4
.. (B)
Stop
~
3-15
Sample Programs - - Continued
this (00 -04 and 00-06) could be replaced by a Store B instruction.
Howeve r,
subsequent instructions use the switch-and-store sequence to form a running
sum.
In tp,is
exampl(~,
all instructions are listed in the same pattern; in the
next exampie, the pattern is made a part of a repetitive routine.
Note 3: Division by 4, to obtain the average of the' sum of the squares,
could be accomplished in less time by using a Shift-right instruction (shift
right two places), which is equivalent to. dividing by 4.
Example III
The following program solves the same problem as the program in
Example II.
However, it illustrates a "loopll, a repetitive routine that re-
duce s the num be r of ins tructions •
The instructions fo r taking an x., squaring
1
it, adding this to a running sum, and storing the result, are written out only
once, as opposed to four times in the example above.
Howeve,r, the program
r,eturns to this sequence of steps as many times as necessary.
A loop can
handle virtually any numBer of x. 's without being lengthened. in proportion.
1
Locations 01 -00 through 01-03 again contain xl • . • x •
4
Locations
01-50 through 01-52 contain the constants 000004, 000003, and 000001,
re-
'\
spectively.
Location 01-54 is a "counter" which keeps track of the number
of times the computer has gone through the loop.
Location 0'2.-00 contains
the running sum and, at the end, the final answer.
The flow chart in figure 3-1 shows how the program is to operate.
3-16
Sample Programs - - Continued
Clear A and B registers.
Set running sum to zero.
Load address of first x.
1
into loop.
Load loop counter constant into A.
Store counter.
Compute x. and add to
•
1
runnlng sum.
Reset addresses in loop
to thos e of next x ..
1
Load counte r into A and
subtract one.
NO
'--------11
Test for negative.
Con1.pute average.
Figure 3 -1.
Flow Chart of Progr am in Example III
3-17
Sample Programs - - Continued
EX OPERAND
Cl
OP
Nl
REMARKS
.
I 02 00-02 Switcn
OHa-{A)~ (B)
021-0b
I 30 00-04 Store A
O~02-00
Note 2 IA 00-04 I 00
01'- 53
I 29 00-06 Load A
17
IA 00-06 I 00
00-14
I 30 OO-OB Store A
17 0 1-00
IA OO-OB I 00
00-16
I 30 00-10 Store A
17 01-00 ...... 00-16
:A 00-10 I 00
01-51
I 29 00-12 Load A
000003~(A)
Note 3 :A 00-12 I 00
01-54
I 30 00-14 Store A
000003~01-54
Note 4 :A 00-14 lAX
xx-xx
xx-xx
I 29 00-16 Load A
X.~(A)
1
I 16 00-lB Multiply
2
X. ->-(A), (B):
I 00
32-00
I 02 00- 20 Switch
(A) ...... (B)
~ 00-20 I 00
02-00
I 25 00-22 Add
X. 2 + (02- 00) -JII-(A)
IA 00-00 I 00
50-00
Note 1 IA 00-02 I 00
r-
IA 00-16 l~X
iA 00-lB
0,1-00~(A)
.
~00-14
,
.;
1
1
/
'
A 00-22 I 00
02-00
I 30 00-24 Store A
2
X. + (02 -00) ...... (02- 00)
Note 5 A 00-24 I 00
00-14
I 29 00-26 Load A
(00-14) ~ (A)
A 00-26 I 00
01-52
I 24 00- 2B Subtract
(00-14) +
1~(A)
lA 00 ... 28 I 00
00-14
I 30 00-30 Store A
(00-14) +
1~(00-14)
~ 00-30 I 00
00-16
I 30 00-32 Store A
(00-14) + 1---(00-16)
Note 6 lA 00-32 I 00
01-54
II 29
A 00.;.34 I 24
01-52
I 15 00-12
A 00-36 I 00
02-00
I 29 00-3B Load A
I, x. 2____ (A)
1B
01-50
I 26 00-40 Divide
I, x.
A 00-40 I 00
02-00
I 30 00-42 Store A
I,x.
~ 00-42 I --
-----
I 00
~
01-00
A 00-38 I
01-53 I 17
3-1B
, 1
/'1.
I
00-34 Load A
-----
counter~(A)
Compare counter - l~(A)
Magnitude if -, go to ~·00-36
1
2
1
1
2
+4~{A)
+ 4---02-00
Stop
Ha1f00.;.14 and 00-16
instruction
Sample Programs - - Continued
REMARKS
ADDR.
CONST.
A
01- 50
COOOO04
-n=4
A
01-51
COOOO03
counter
A
01-52
COOOO01
decrement
Note 1: The Switch command clears the A and B registers (fills the
registers with zeros), and the Store A command sets the running sum to
zero.
Clearing the A and B registers and storing the result is equivalent to
loading the A register with zeros and storing the zeros.
However, the clear-
and-store operations save drum space and computation time.
Setting the running sum to ze ro is an "initializing \I step which is necessary to prepare the computer for entering the loop.
Other initializing
steps include the storing of the first x. address in the loop (covered by Note
1
2) and setting the loop counter to 3 (covered by Note 3).
The initializing steps are necessary if the program is to be repeated
for different value s of x.
Without the initializing steps, the progrq,m could
be run only once; the punched paper tape of the program would have to be
reloaded before the calculation could be repeated.
/\
Note 2: This and the next two steps set the operand addresses of the
instructions in 00-14 and 00-16 to the address of the first x .•
1
The half-
instruction "17 01-00" (execution code and the operand address) are stored
in both 00-14 and 00 -16.
and "17 01-00" in 00-16.
Actually, what is required is "DO 01-00" in 00-14
However, instruction 00-14 is a Load A instruc-
tion, and the execution code is ignored.
into locations
00~14
To load different half-instructions
and 00-16 would require several additional memory sectors.
3-19
Sample Programs - - Continued
Note 3: This initializing step establishes the counter in sector 01-54.
Each time through the loop, one will be subtracted from the counter. and a
test will be performed.
When the counter becomes negative, the program
will have been through the loop four tim,es and
th~
squaring-and-summing
calculations will be complete.
Note 4: XX
XX-XX represents the execution code and operand ad-
dres s, of Xl •• x 4' which will be re set each time through the loop by adding
one to the operand address contained in 00-14 and 00-16.
See Note 5.
Note 5: In this and the next three steps, the operand address of instructions 00-14 and 00-16 are increased by one, to form the operand address
of the next x..
1
The Subtract command is used because the half-instruction
"17 01-00" appears in memory as 420200 ' a negative number.
S
ing the constant 000001 ' the half.-instruction becomes "17
S
O~
By subtract-
-01" the second
'time through the loop, "17 01-02" the third time through the loop, etc.
Note 6: The number in the counter is brought into the A register for
comparison with the stored constant 000001.
The flow chart indicates that
one is subtracted from the counter J and if the result is negative, ,computation
is complete; if the result is not
counter location.
,ne~ative, the new number is"stored in the
Although this operation could be performed by
tw~
opera-
tions (Subtract and Transfer on Negative), the subtraction,,:,and-testing operation is performed in one operation by the Compare Magnitude instruction.
The Compare. Magnitude instruction subtracts one from the counter,
and the difference replaces the contents of the A register.
The first three
times through the loop, the contents of the A register after the Compare
3- 20
Sample Programs - - Continued
Magnitude instruction are positive orzero t and the computer reads the next
instruction from location 00-12.
The instruction at location 00-12
the new -counter in preparation for the next pass through the loop.
stor~s
After the
loop has been repeated four times, the contents of the A register are negative
after the Compare Magnitude instruction, and the computer reads the next
instruction from the address forlned by adding the execution code (24) to the
next-instruction address (00-12).
Thus t after passing through the loop the
fourth time J the program proceeds to divide the sum of the squares by four
(00-36).
3- 21
TIlE RW-300 HAS HAD THE FOLLOWING TRACK ASSIGNMENTS MADE:
11 digital input tracks:
9
33"
36,
37"
39,
40,
42,
43,
44,
45,
46.
7,
. 41,
digital output tracks:
0,
2,
4,
6,
8,
9,
10,
I.\."
Flexowriter, high speed teletype punch,
0"
trac~s:
2.
Ferranti reader track:
32.
Magnetic tape units track:
39.
When reading the programming manual and the operations manual, the
various commands apparently have different
n~~bers.
This apparent
inconsistency results from showing the commands in the
progr~mming
,
manual in the digital form and the operating manual in the octal
and binary forms.
SECTION IV
OPTIMUM PROGRAMMING
INTRODUCTION
The programming examples in Section III employ "sequential program"
listings; i. e., successive instructions are assigned consecutive locations in
memory.
A sequential program causes the computer to spend an excessive
amount of time searching for instructions and operands.
"Optimum program-
ming" is a technique for selecting storage locations so that a minimum amount
of computer time is lost in waiting.
To understand how optimum programming saves machine time, it is
necessary to consider the physical characteristics of the computer memory.
The magnetic drum used as memory is shown schematically in figure 4-1.
Zeros and ones ,representing instruction and data words, are recorded on
the drum as variations in magnetic flux.
The program can be loaded into tracks 00 through 61, and each of
these tracks has one head for reading information stored on the drum.
The
track address determines which of the 61 heads is used when information is
taken from these "general storage" tracks.
Information is read from the drum serially (bit by bit) so that it
requires "one word time" to read one computer word from memory.
One'
word time is the time required for one word, or sector, to pas sunde r a
read head.
Since there are 128 sectors in ea'ch track, and the drum makes a
4-1
Introduction - - Continued
complete revolution in one sixtieth of a second, one word time is approximately 130 microseconds.
inst~uctions,
In performing a series of
the cOITlputer reads the
f~rst
two -word instruction in two word times, but additional time is required to
carry out the instruction.
word time s
J
For example, to load the A register requires five
and if the Load A ins truction is in sector 00 of some tr ack, the
computer will not be ready to read the next instruction until sector 05 is
passing under the read heads.
If, using sequential programming, the next
instruction is located in sector 02, the drum must complete its revolution
before sector 02 again passes under the read heads. Thus, sequential programming causes a delay of nearly one drum revolution (1/60 second) between
the readi'ng of each instruction.
With optimum prograIl1Il1ing, Il10re than 20
instructions can be accoIl1plished in one drum revolution.
The above example describes the penalty paid for listing. instructions
in consecutive memory locations.
The same type of time los's is incurred if
the operand is not in an optimum location.
In the cas e of instru'ctions involv-
ing operands, about two drum revolutions could be required to complete a
single instruction.
A
But if operands and next instructions are assigned opti-
m.um locations, more than 40 instructions can be carried out in those two
drum revolutions.
The paragraphs which follow des cribethe organization of the R W -300
internal memory and techniques for optimum programming.
4-2
Memory Organization
MEMORY ORGANIZATION
For gene,ral storage needs; the 7~ 936 words of tracks 00 through 61
are available.
Each of these tracks is equipped with a read head$ thus per-
mitting data to be read from any sector of general storage.
heads are all align.e,d with respect totimingji. e.
~
These read
at any given time the read
heads are all at the same sector of their respective tracks.
Therefore, the
time at which informat.ion is read from a sector is indepe ndent of the track
number.
Tracks 00 through 07
Tracks 00 through 07 provide program-writable memory for temporary storage of data.
Each of these tracks has a single head which functions
as both a read and a write head.
Track 07 is fitted with an additiqnal head
,which reads data for conve r sion to analog output.
If mor ethan 64 analog
outputs are'required, track 07 is fitted with two additional heads.
However,
the program rea.d/write head of this track performs the same function as
other program read/writ.e heads.
Tracks 08
throug~~!:..~
Tracks 08 through 15 have read/write heads similar to those on tracks
00 through 07.
These tracks may also be fitted with an extra analog write
head which is not under computer program control.
However~
the computer
can be modified to make all or part of these tracks writable under program
control.'
4-3
Memor y Organization - - Continued
Track 62 Revolver
Track 63
Load Program
Tracks 08 through 61
Tracks 00 through 07
(Program Writable Group)
I~
I
I
I
I
I
I
I
,,
I
I
I
,,
I
ONE SECTOR OF
THE RW-300 DRUM
t"''''
--,/
y
Least Significant Bit
/
/
I
/
I
/
I
/
/
1\
\
\
,,
1
1
/
ONE TRACK OF
THE RW-300 DRUM
/
Most SignHicant Bit
Sign Bit
Space Bits
/
1
1
TRACK 63 READ
TRACKS 16 through 61
TRACK 62
Program Read/ Write
Revol ver Read
Revolver
TRACKS 00 through 06
A
TRACK 07
A
Program Read/Write
,:,;,J,
Program Read/Write
TRACKS 08 through 15
Program Read
- the operand should begin passing
under the appropriate read head the moment the computer's arithmetic circuits are ready to receive that
,
..
'
operand~
'"
. .'.
A reference table of R ... W 300 instructions, the last page of this programming
manual~
contains a column labeled.
II
Execution Time'1.This
4-9
Selecting Optimum Memory Locations - - Continued·
column tells how long it takes the computer to get ready for the operand and
how long before the computer is ready to read the next instruction.
The time
is specified in word times, which is directly equivalent to numbers of sectors.
Note the Add command in the table of RW -300 instructions.
From the
table, "CI~Oprnd Add." is 3 word times; "Total CI~NI" is either 6
or 7 word times.
,
This means that the computer requires 3 word times to
prepare for receiving the operand, and either 6 or 7 word times to complete
the addition and be ready for the next instruction.
Thus, if the first word of
an Add instruction is as signed the memory location 00 -00 (CI column in the
program listing), the operand should be stored in 00-00
+ 3, or 00-03. The
first word of the next instruction should be assigned the location 00";00
or 00-00
+6
+ 7.
In the case of the Add and Subtract instructions, the next-instruction
address location depends upon the signs and magnitudes of the two numbers
to be added or subtracted.
If the sign of the A register is' unchanged by the
operation, only 6 word times are required.
If the sign of A changes, 7 word
times are required.
When determining optilllUITl s ector number s, the nutnber of word titne s
and current-instruction address are added "modulo 128." This llleans that
if the surn exceeds 128, then 128 is subtracted from the sum to obtain the
optimurn sector number:
114
+ 17 - 128
= 03.
In the case of the three transfer commands, the computer will be
ready to read the next instruction in either 4 or 5 word times
(table of
R W -300 instructions), depending upon whether or not transfer conditions
4-10
Selecting Optimum Memory Locations - - Continued
are met.
If transfer conditions are not satisfied (not negative, no overflow, .'
not zero), the first word of the next instruction should be assigned a location
that is 4 word times greater than the current-instruction address'.
If transfer
conditions are satisfied, the first word of the next instruction should be assigned a location that is 5 word times greater than the current-instruction
address.
Note that when transfer conditions are satisfied, the operand ad-
dress becomes the next-instruction address (Section II).
In the case of a transfer command, it would not be possible to assign
absolutely optimum addresses to both operand and next-instruction addresses
within the same track.
tive sector
numbers~
Absolutely optimum addresses would have consecu-
and this is not possible, because each address repr.e-
sents a two-word instruction.
However, optimum addresses can be assigned
by locating the two branches of the transfer instruction in different tracks.
No computer time is lost in switching from track to· track.
A Transfer on
Negative instruction with optimum operand and next-instruction addres'ses
might be:
CI
EX OPERAND
OP
NI
In the case of the Compare Magnitude command, the computer is
ready for the next instruction in 5 word times if
I(M) I > I(A) I,
.1 (M) I<
7 word times must elapse before the
read the first word of the next instruction.
I{A)
co~puter
I,
but if
is ready to
Thus, an execution code of 02
should be used to form an absolutely optimum next-instruction address.
An
'4-11
Selecting Optimum Memory Locations - - Continued
execution code of 01 or 00 would result in the los s of one drum revolution,
or 1/60 second of computing time.
The table of R W -300 instructions indicates that optimum next-instruc .
tion addres$es for some operations depend upon the execution code ("nn" in
the table).
For these operations, the execution code is added (along with the
required number of word times) to the s ector number of the current-instruction address to form the optimum address of the next i.nstruction.
A Multiply
instruction with an optimum operand and next-instruction address might be:
CI
EX OPERAND
OP
NI
If the number of words in the program approaches the number of
words available" in general storage, it will not be possible for the programmer
to assign absolutely optimum memory locations to every instruction, because
the desired memory location may have been previously assigned.
In this
event, more than the specified number of word times should be added to the
current -instruction addre s s .
Becaus e it is impos sible to optimize completely a prograITl which
uses all sectors in a given area of ITlemory, priority should be given to program segments that are repeated many times.
Frequently repeated program
loops sh~uld be more highly optimized than program segments that do not
contain loops.
Therefore, frequently used loops should be programmed first
so that optimum storage locations can be chos en from a relatively empty
storage area.
As the program:t:ning work progresses, the storage area will
begin to fill, and absolutely optimum meITlory locations will not be available.
4-12
Selecting Optimum Memory Locations - - Continued
Les s computing time is lost if the les s -than-optimum locations are as signed
to noniterative operations.
The general requirements for keeping a record of as signed memory
locations are discussed in conjunction with memory usage in Section III.
The
procedure of assigning only even-numbered addresses to instructions will
aid in the record-keeping task.
When only even-numbered addresses are
used for the first word of instructions, the optimum sector number is determined by adding more than the specified number of word times to the currentinstruction address.
For example, the Switch instruction requires 5 word
times; with the first word of the Switch instruction in 00-00, the address of
the first word of the next instruction should be 00-06.
The preceding paragraphs describe the general procedures and philos ophy for selecting optimum memory locations.
In the paragraphs which
follow, similar commands are grouped together, and specific requirements
for each command are presented.
Load, Merge, and Extract
The load instructions (LA, LN, and LB) and the Merge and Extract
instructions all have identical timing requirements; only the LA instruction
will be discussed.
Example 1:
Load (M) into A.
CI
EX OPERAND
OP
NI
4-13
Selecting Optirnurn lvlem.ory LocatioJ'ls - - Continued
Since the COlnputer t.akes three v/ord tirnes to go frorn the current-instruction
a.ddl"e~;t:; tCl
the
fir~t
a.ccessible storage cell, the optimurrl sector location of
M is the sector number of the current-instruction address plus three.
T~e
computer requires tw'O word times to read the operand and load it into the
A
register;
therefore, the optirnum sector location for the next-instruction
address is the sector number of the operand plus two.
Add and Subtract
The Add and Subtract instructions have identical tirrling requirements i
only the Add instruction will be discussed.
Example 2:
Add (M) to (A).
CI
EX OPERAND OF
NI
The optimum sector location for the operand is determined by adding three
to the current-instruction address sector number.
The addition operation
requires three word times if the sign of A does not change as a result of the
operation, four word times if the sign of A changes.
Therefore, unless the
program.m.er knows that the sign of A will not change, he should allow four
words between the operand addres s and the next-instruction address.
penalty for not doing this could be the los s of a
compl~te
The
drum revolution.
Multiply and Divide
The Multiply and Divide instructions have identical timing requirements; only the Multiply instruction will be discussed.
4-14
Selecting Optimum Memory Locations - - Continued
Example 3: Multiply (A) by (M).
CI
EX OPERAND
OP
NI
The optimum sector location for the operand is determined by adding three
to the current -instruction s ector number.
The optimum sector location of
the next-instruction address is determined by adding"E" (execution code) plus
three to the sector number of the operand address.
Compar~
Magnitude
Example 4:
Compare.
I(M) I with I(A) I·
CI
EX QFERANI2
o~
NI
The optimum sector location for the operand is determined by adding three
to the current-instruction sector number.
The optimum next-instruction
address is determined by adding two to the operand address.
However, if
the results of the comparison are negative, (M) > (A), the actual next~instruction address will be the listed next-instruction address plus the execution
code liE".
Since seven word times are required before the computer is ready
to read from the modified next-instruction address, the minimum execution
code should be two.·
Transfer
The transfer instructions (TN, TZ, and TF) all have identical timing
requirements; only the TF instruction will be discussed.
4-15
Selecting Optimum Memory Locations
Continued
Example 5: Take the operand address as the next-instruction address if the
overflow indicator is on; if the overflow indicator is off, read
the next instruction from the address specified in the NI column
of the lis ting .
CI
EX OPERAND
OP
NI
Since the computer takes five word times to test the overflow indicator and
substitute the operand address for the next-instruction address, the optimum
sector location for the first word of the next instruction is the .sector number
of the current-instruction address plus five.
The computer requires only
four word times to be ready for the next-instruction address if the overflow
indicator is off; therefore, the optim.um sector location of the next-instruction address is the sector number of the current-instruction address plus
four.
Switch
Example 6: Switch the contents of the A register into the B register.
CI
EX OPERAND
15-00
OP
NI
II \02138 -491
The Switch command uses the track number of the operand address to specify
~he
type of switch, and the sector number has no significance.
Therefore.
any sector number can be assigned as the sector number of the operand address.
Since the computer requires five word times to complete the switch
instruction. the optimum sector location for the next-instruction address is
the sector number of the current-instruction address plus five.
4-16
Selecting Optimum Memory Locations - - Continued
Shift
Example 7: Shift the contents of the B and A registers left 3 places.
CI
EX OPERAND
OP
NI
48-00
The Shift command uses the track number of the operand address to specify
the type of shift, and the sector number has no significance.
Therefore, any
sector number can be assigned as the sector number of the operand a,ddress.
Since the execution code "E" specifies the number of places shifted, and since
one word time is required for each place shifted, the optimum sector location for the next-instruction address is determined by adding "E" plus four
to the sector number of the current-instruction address.
No Operation
Example 8:
Transfer unconditionally to the next-instruction address.
CI
EX OPERAND
OP
NI
Since the operand address has no significance in the No Operation command,
any track and sector number can be assigned.
The
op~imum
sector location
of the next-instruction address is determined by adding 4 to the sector num",
ber of the current-instruction address.
Store
The store instructions (SA and SB) have identical timing requirements;
only the SA instruction will be discussed:
4-17
Selecting Optimum Memor y Locations - ~ Continued
Example 9:
Store (A) in
CI
{M~,
EX OPERAND
OP
. NY
The optimum operand address (storage sector M) for store
tions is determined by adding four to the sector number of the
instruction addresso
instrut~
current~
The optimum location of the next instruction is deter.
u
mined by adding six to the sector number of the current-instruction addre s.s.
Digital
The timing requirements of digital commands depend upon whether the
command is a digital input or a digital output$ and upon the type of input or out"",
put device addres sed by the commando
Digital inputs and outputs as sociated .
with the Flexowriter ·(track address 00 or 32) require 110
other digital outputs require at least 10 milliseconds.
milliseconds.~
All
Digital inputs from
switches re quire 6 word time s.
Example 10: Input to A register from toggle switches.
eI
EX OPERAND
OP
NI
The Digital command uses the track number of the operand address to specify a
particular device; and the sector number has no significance. Therefore. any
sector number can be assigned as the sector number of the operand address.
For clearing the A register ~ for digital inputs from the toggle ,switches i and for
some other digital input
instructions~
the .optimum sector location for the
next~
instruction address is the sector number of the current",instruction address plus
sixo Section V de scribe s. timing considerations for digital output commandso
4-18
Comparison of Optimum and Sequential Programming
COMP,ARISON OF OPTIMUM AND SEQUENTIAL PROGRAMMING
The next=instruction address in each of the preceding examples
specifies the current-instruction address of the next exampleo
examples were as sembled to form a
Load A1
Add~
Multiply~
program~
If the ten
the commands would be:
Compare Magnitude, Transfer on
Shift, No Operations Store A9 and Digital Input.
Overflow~
Switch,
This optimum program
would be completed in approximately one=half of a drurn revolution ( 1/120
second~.
However» if the instructions and constants used in the program
were assigne d sequential locations in memor y, approximate ly 15 dr urn
revolutions (1/4 second) would be required to com.plete the same programo
Although the optimum program formed by the ten examples could be
completed by the computer in about 1/30 the time required for a sequential
program, no general statement can be made concerning the amount of computer time conserved by optimum programmingo
It is difficult to program
a problem so that all memory locations are absolutely optimum because
instructions and constants in optimum locations for one segment of a prqgram may interfere with the selection of optimum locations for other segments of the same program.
REVOLVER
Track 629 the "revolver"9 provides fast~access storage for 32 computer wordso
Any word written into the revolver passes under the revolver
read head every 32 word times 1 thus making that word accessible four times
during each dr um re volutiono
4-19
Revolver -- Continued
A number used repeatedly in a calculation can be stored in the revolver so that it will be readily available.
Also, frequently repeated in-
structions can be placed in the revolver.
When instructions are placed in
the revolver, the two words that make up the instruction are stored in
sequential revolver locations so that the two half-instructions will be read
as a single instruction.
Each sector of the revolver has a separate address.
Thus, if a num-
ber is stored in 62-00, it can be read next from sector 62-32, then 62-64,
etc.
It is convenient to think of revolver locations as RO, Rl, ... R30, R31
and use the following table.
Table of Equivalent Revolver Locations
·,KO-
Rl
R2
R3
R4
1f5
R6
R7
R8
R9
RIO
Rl1
R12
R13
R14
R15
I
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
96 R16
97 R17
98 R18
R19
99
100 R20
101
R21
102 . R22
103 R23
104 R24
105 R25
106 R26
107 R27
108 R28
109 R29
110 R30
III R31
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
112
113
114
115
116
117
118
119
120
1~ 1
122
123
124
125
126
127
If the optimum sector number for a Store A instruction were 53, the
programmer would use 62-53 as the operand address, and would note in the
REMARKS column of the program listing
"(A)~R21".
When the stored
number is to be read from the revolver, the sector number of the operand
address can be any sector number on the "R21" line in the table of revolver
locations.
4-20
Expanded 1v1.emory
EXPANDED MEMORY
The rules for optilTIUm merDcry locatlons apply to those R W 300
computer s having the optional expanded memory.
Howeve:c. special consid~,
era,dons dictate that optirnllrn prog~lamming is also a function of the over-alL
p.rogram arl·ange.ment
Frequent and unnecessary switching back and forth
fro·m one track set to the othe.,: can be tirne-consuming and wasteful o.f pro-
gr.am space.
O,nce the basic requirements of a specific process or problem have
been established. the programmer should plan track and track set locationp
ih such a manne!:' as ::0 keep track set 'switching at a minimum
OPTIMUM PROGRAMMING USING SYMBOLS
The R vV 300
accepts
p~tog~'ams
Prog~'am
Lib':'aty inc lude s an assenl.bly :,:-outine wh:ich
coded in symboiic form
Optimum Programnling USil"lg Symbols
The routine is called ··OPUS., "
Copie s of the OPUS lnstruction
'manual are available from TR Vv' Cornpute:!:' s C'JITlpany
OPUS reduce s 'Che work. of the programITler by requiring chat only
m'ne·monic operation codes and some other information be listed
In most
cases . next instruction addresses need not oe SPecified; OPUS assigns an
optimum next· instruction addres s
V/hen it is nece s sal' y to refer to an
address seve1. al tiITles within the pi 0gram
4
OE
4
the programITler assigns letter
letter -number combinations as sYITlbolic addresses
a.dd:r:e-sses
l
chosen arbit:carily by the programrne.t
These symbolic
serve as
mnemonic
4 21
Optimum Programm.ing Using Symbols --Ccntin,ued
device s for the P'l'" ogr ammer - - OPUS automaticallY' assigns ab. optimum
addres's toeach symbolically identified operand or
Mnemon~c operation corles a;re used:
ne.x.t-instruc~ion
address.
LA for. Loa4.A.> A· for Add» SW for
Switch, etc ..
The Op·US package inchide.s· an instructionmar;lualand .a punched
paper tape .containing the piog:r·a·m..:
loaded into the R W -300$
After the
th~.computer readsth~
bolically coded progranl,. optimizes ·the
which is a
lirie~·'for ~line $
q.P·P.5:l:t o U:tine, lq.q;S: bee'n
tape' containing
p:rogram~and
punches
th~ sy'm~
arie~
tape
·machine..;lan·g uage:t~~Q.sl9-tion of the symbolically
coded program.
In additioq. to
Routine provi.de s the
9ptimizit:lg~he. syinbolic.al~Y·G?de.d program~:
progr~rrl1f1,er
with- two
,pr·iritou:'t.~·:-an
the OPUS
"A va,ilapility Table
Map" of storage sectors occup.iedb,y the opti.mi:ze'4ptpgr-an1~ and a "Sy-mbol
Table· Map"
of memory sector'$assigned by OPl!S:.t:o:
e'~·ch:
0.£ the symbolic
addre?ses.
Although OPUS simplifies program listing9.':qpt~rn,izi.ng» an'd rec.ord
keeping$ the programmerml.lst. have a
cO!Xlplet~
kn:9wle.dge
ofmachine·~lan
guage instru'ctions in order to correct orl modifyany"rogramhe prepares in
s ym bolic fOTm.
4-22
SECTION V
DIGITAL INPUT AND OUTPUT
INTRODUCTION
The extremely flexible digital input and output capabilities of the R W300 are described briefly in Section 1.
In the paragraphs which follow, the
input and output facilities of the RW -300 are described in detail, and sample
program listings are presented.
The bas,ic RVl-300 is provided with a Flexowriter, which consists of
three devices combined:
paper -tape reader.
an electric typewrite r, a paper -tape punch, and a
The Flexowriter is used to prepare punched tapes of
programs, and the tape reader on the Flexowriter is used to load the program into computer ll1ernory.
The Flexowriter is also used to obtain infor-
mation printouts or punched tape under program control.
Flexowriter codes
and characteristics are des cribed in detail at the end of this section.
Six switches on the test and maintenance panel of the basic computer
can be used for "break-point" control of an operating program, or for inserting information under program control.
Ferranti paper -tape readers (60 characters per second) and Teletype
paper-tape punches (60 characters per second) are optional equipment used
with the R W -300 to obtain higher input-output speeds.
Other paper -tape
equipment and punched-card readers and card punches can also be used with
the R VI-300.
5-1
Introduction - - Continued
The flexibility and expandability of the R W -300 digital input and output
system permit a wide variety of digital input and output devices to be speci- .
fied.
In addition, to the high-speed readers and punches t special input
switches and indicators are available to aid the communication between the
operator and the comJ:luter.
This section of the manual containl1:) a description
of some 6f the input-output equipment, and includes information needed by"
the pr ogr amme r whTDBY
At the end of a 2.
5~>nl.inute
waiting period, the POvVER ON button :must be pressed again to place the
computer in ope ratiorlo
Pressing the POV1ER OFF button disconnects the line voltage supply
fron'l the R W,300,
'Operator1s Panel -- Continued
Pressing the STANDBY button turns on the STANDBY light, turns off
the POWER ON light, and removes operating voltages from the computer ..
vVhen the STAN°DBY button is pressed, line voltage is not disconnected from
the compute r, and ope ration can be restored immediate l-y (no 2. 5 -minute
:delay) by pressing the POWER ON button ..
The prograrDrner is not normally concerned with the power controls,
but only with the operating controls ~
Operating Controts
Use of the operating
controls~
described in conjunction with program
loading in Section VI, are summarized in the paragraphs which follow.
To load a prograril into the drum from. the paper-tape reader, the
track 63 load program °must be placed in operation"
By pressing the LOAD
button, the next-instruction (N) re gis ter is set to all one s, the compute r is
placed in automatic operation, and the first instruction of the load program
(Section VI) is read from memory location 63 ~ 127"
When the START button is pressed, the next-instruction (N) register
is set to zero, the conlputer is placed in automatic operation, and the instruction located at the origin (address 00-00) is read..
Thus, the first
instruction in the prograrn must be located in 00-00 if the START button is used.
Pressing the STOP button causes the computer to cease execution of
the program after completion of the current instruction; the computer idles,
,and the STOP light is lit..
The STOP light is also turned on when a STOP
instruction is executed by the computer or when a record error occurs
°
7 -2
Operator's Panel -- Continued
(Section VI).
The computer may be returned to continuous operation by
pre ssing the RESUME button.
If the computer has stopped as a result of a manual stop, program
stop, or record-error stop, it may be returned to continuous operation by
pre s sing the RESUME button (if the re cord-err or has been cleare d). This
action will cause the c?mputer to proceed to the location indicated by the
next-instruction address of the last instruction performed.
When the pro-
gram resumes, the STOP and ERROR lights will be turned off.
TEST AND MAINTENANCE PANEL
The test and maintenance panel shown in Figure 7-1 is located under the
hinged lid of the R W -300 console cabinet.
The panel contains controls and in-
dicators used during program loading, program check-out, and maintenance.
Figure 7-1.
Note:
Test and Maintenance Panel
Computers with an expanded memory have a three-way track set toggle
switch above the Track 0-7 socket on the te st and maintenance panel.
7-3
Test and Ma:nten2.nce Panel·.. ", Continl::.cd
The controls a rd. ir::dicator s used during program loading include;
aJ
Track selectien plug and jacks
bo
ERROR in.dicator light
Co
Track set selection switch (expa_nded memory
only:~
The use of thE·se in ccnjux).ction with p·togranl loading is described irlS6c'"
tion VI, In
addition~
Section VI refer s to obtaini,:,g traCktrrilenlory sums from
the o13cilloscope on th.e test and mainten.ar::.ce panel,
The interpretation of
the oscilloscope display is described in the paragraphs of this section
~
Mai :::.te nance
T he control s and indicator s provided for maintenance purpose s
include:
ao
LINE VOLTAGE meter
bo
\lOLTAGE rneter
c,
METER S.ELECTOR sw:.tch
d,
Sbc controls for adJust::.ng voltages and clock amplitu.des
eo
PHASE MARC.:N
Thes(:: controls are uSE.d to adjl.i..s:t
opE-l.~at.lng
vcltages and to perform tes:s.
They are pot norm.::dJ.y adju.st.i:::d b'/ prcgrar:'lY"!11r:.g o:r
C'perati~g
pE':r sor\'.:eL
Th.e CO''ltrols of intc.ce s\:. to the p:cograITlmer and operator llnder normal
operating conditions
ao
i~c
llkde ~
TRACK 0 &: 7 WRITE, ON/OFF toggle switch
Test and Maintenance Panel --
b.
'DIGITAL INPUT selector switch
,c.L26$
d.
ConU.nL~ed.
L25~
L24~
L23~
L22, L21 toggle switches
ERROR indicator light
The TRACK 0 &'7 WRITE
switch~
located near. the track selection
vides control over information written into tracks 00 and 07.
plug~
pro-
Track 07 is
the analog output track (Sections I and III).
Momentary pO'wer dips can cause the write heads of tracks 00 through
07 to store spurious information in these tracks o
If the power dips should
de stroy the contents of the origin (sector 00 of track OOL the program could
not be re started; or if spurious information should be introduced into the
analog output
. in proces
track~
s control
turned OFF.
fa.;). lty control signals would be gener atedo
Therefore J
applicatio~lS, the TRACK 0 & 7 WRITE switch is normally
To write in tracks 00 or 07 when the TRACK 0 &. 7 WRITE
switch is :in the OFF position,) any store instr uction involving the se tracks
must be preceded by a one -bitd~igital output instruction which bypas ses
the protection circuito
The store instruction must then be followed by
another one=bit digital
utput instruction to
Although power dips might
destro~r
re~tore
the protection circuit.
in:Corr..'1ation in tracks 01 through
06, the loss of this inforn1.ation does not affect the control system because
the control calculation is restarted whenever a se'rious power=line~.transient
occurs.
Te st and lviaintenance Pane 1 - - Continued
The DIGITAL INPUT selector switch is normally set to EXT (external)
when the computer is controlling a process ..
When set to INT (internal), in-
fOl'mation from the six toggle switches (L26 through L21) is read under
program controlo
The progran1.ming requirements for obtaining inputs from
the toggle switches are given in 5e ction V.
The toggle switches are used in conjunction with certain programming
aids.
The "Utility Package" referred to in Section VI is composed of several
subroutines which can be selected by means of the toggle switches on the test
and maintenance panel.
The ERROR light is turned on when a program or the load program
attempts to write (carry out a store instruction) into an address in track 63
or in a track not cu "rently connected through the track selector plug and
jack~
Program writing or loading into track 63 is impossible, regardless
of which group of tracks is connected..
Normal operation may be resumed
either by changing the programmed storage location, or by connecting the
track se lector plug to the appropriate jack.
PROGRAM CHECK-OUT
The controls and indicators of the
used during program
7-6
ch(:~ck-out
a.
FETCH button
b.
EXECUTE button
c.
RUN button
d.
ST ATE indicators
e.
as ci 110s cope
include:
tes~
and maintenance panel that are
Program Che ck -0 ut - - Continued
Fetch and Execute Buttons
These controls are used to suspend instruction processing for the
purpose of inspecting the contents of registers.
Depressing the FETCH
button suspends operations at the mOITlent the next operand is selected, and
the coml)uter idles in this state
operat~. :::;::1S
,=:~pres
sing the EXECUTE button suspends
at the n10ment the next instruction is selected, and the computer
idles in this state.
Hence, the effect of pressing either button during con-
tinuous operation is to stop program execution, and the effect when operating
in the FETCH-EXECUTE mode is to advance the program by "half" steps.
In either case, the appropriate light is turned on.
Run Button
Depressing the RUN button causes the corn.puter to resume automatic
high-speed execution after the computer has been in the FETCH or EXECUTE
mode Se
State Indicators
This portion of the test and maintenance panel may be u~ed both in
code checking and trouble-shooting.
The STATE INDICATORS consists of
a bank of six neon lights, a three-position rotary switch called the STATE
SELECTOR and a REFERENCE toggle switch.
The neon lights display the
status of specific flip-flops, as determined by the setting of the STATE
SELECTOR switch:
M
Flip-flops Ml to M6 inclusive (track address)
7 -7
Progranl. Check-Out - - Continued
PE Flip-flops PI to P5 inclusive (operation code);
El (equality flip-flop)
5Z
Flip-flops 51, 52, S3 (state counter); Z2 (overflow); Z4 (carry);
A3 (input s e,le ction)
When the f;uEFERENCE toggle is set to ONE, only flip-flops having
a current statue of one will light the neons.
is true.
When set to ZERO the converse
Failure of a neon to light on either setting of the Reference Switch
indicates that the corresponding flip-flop or neon indicator circuit is faulty.
The information displayed on the neon indicators is dependent upon
the setting of the STATE SELECTOR switch and is dependent upon whether
the computer is in the FETCH or EXECUTE mode.
The interpretation of
displays is covered in the last paragraph of this section.
The six jacks located above the neon lights are used for troubleshooting in connection with the jack located under the oscilloscope.
Os ciUos cope
A smcill os cillos cope is provided to aid in code checking and maintaining the computer.
In code checking, its function is to display the con-
tents of various registers when operating in the FETCH-EXECUTE mode.
When register contents are displayed, the word is divided into two levels
on the 'oscilloscope face, 10 digits to a level, as shown in figure 7-2.
A dot in a low position is a one, and a dot in a high position is a
zero.
The sweep is triggered so that the least-significant bit appears at
the bottom right of the display.
are always zero.
7-8
The bits in position 19 and 20 (upper left)
Program Check-Out -- Continued
UPPER LEVEL
LOWER LEVEL
Figure 7-2.
Oscilloscope Display
The octal number 123456 is displ.ayed infigure 7-2.
Interpretation
is as follows:
Bit Position:
Binary Representation:
18 17 16 15 14 13 12 11
0
0
1
0
1
1....--.-----..------"
v
1
2
Octal Equivalent:
0
0
1
10 9 8
1
7 6 5 4
3 2 1
1 0 0 1 0 1 1 1 0
,~
3
4
5
6
When the oscilloscope is used to observe instruction words, partitioning line s between 13 and 14 (on the
0
s ci Ho s cope mask) serve as an aid
in recognizing the operation code or execution code normally contained in
bit-positions 14 through 18.
Partitioning lines between 7 and 8 aid in recog-
nizing track address (bit-positions 8 through 13) and sector number (bitpositions 1 through 7).
Near the face of the oscilloscope are operating controls for horizontal.
positioning (H), vertical positioning (V), FOCUS, and brilliance control
(BEAM).
Below the face of the oscilloscope are INPUT and WORD selector
switches which can be used for displaying the contents of specific registers
on the oscilloscope.
The information displayed on the oscilloscope is
7-9
Program Check-Out -- Continued
dependent upon the setting of the INPUT and WORD selector switches, and
is dependent upon whether the computer is in the FETCH or EXECUTE mode.
The interpretation of displays is covered in the last paragraph of this
section.
Also ·;)elow the face of the
osci~l.oscope
is an input JACK which can
be used by rnaintenance personnel to feed signals from the state-indicator
jacks to the oscilloscope.
The CA INT. MOD. toggle switch provides the
beam intensification ne ce s sary to produce the dot pattern when a register is
viewed on the oscilloscope.
The toggle switch is normally left in the ON
position.
Tables for Interpreting Indicators
When using the FETCH and EXECUTE buttons to observe the stepby-step execution of a program, it is usually necessary to refer to the
original program listing.
For the purpose of correlating the indicator dis-
plays with the program listing, as sume the following:
The current instruc-
tion (CI column of the listing) has been acquired by the computer whenever
the computer is in the FETCH: m.ode.
The tabulations which follow describe
the significance of the indicator displays when the computer is in the FETCh.
and EXECUTE modes.
7-10
Progran1 C:tieck-OuL -- Continue.J
FETCH MODE
--_......
SELECTOR POSITIONS
Os',:illoscope
OsciHoscope
INPUT
vvoa.D
Se lector
Se le ctor
I
-----
-
0'-
Neon
Sarne as previous EXECUTE
(Result of previous instructions)
Eve 14y
Same as p:e vious .EXECUTE
( Res u 1t 0 f p l' e vi 0 us instructions)
'....;
Evet·y
Execution code of CU·,'J."ent insttuction in .)its 1-5
N
Every
Next-instruction address
in bits 1-13"
Y
Every
Current operand add:tess
in bits 1-,1 3
R1
1st Word
Current operand
B
~
Oscill"lscope
Display
Every
P.
~
ST.A TE
SELECTOR
:1
>-,-.
I
M
In M _ , tr ack numbe r of
l 6
current operand
FE
In PI-51
code
SZ
In Z2, ove r flow s ta tus of
previous operations
!
t
Ii
,
1
(
curr~'nt
operation
7 -J 1
.
Prograrn Check-Out - - Continued
EXECUTE MODE
SELECTOR POSITIONS
Oscilloscope
WORD
Se lector
Os cilloscope
INPUT
Se lector
Os cillos cope or Neon
Display
STATE
SELE~TOR
A
Every
(A) afte r completion of cur rent
instruction
B
Every
(B) afte r completion of current
instruction
;
C
--
N
Every
y
--
I
N ext -ins truction addre s s
Zero
Rl
1st Word
First word of next instruction
Rl
2nd Word
Second word of next instruction
M
In Ml
I
"
7-12
Zero
I'
-0
track number of next
ins truction
PE
In PI-5' operation code of
executed instruction
SZ
In Z2, current overflow status
SECTION VIII
NUMBER SYSTEMS AND SI
LING
READING COMPUTER NUMBERS
A familiarity with binary and octal number systems will simplify ,communication with the R W -300 for the programITler, because the cOITlputer uses
the binary number system in its i,nternal operations.
The binary nUITlber sys-
tern, which perITlits only the sylnbols 0 and 1, is particularly compatible with
the on-off type of circuits used in digital computers.
Since each computer word consists of 17 binary digits (bits), plus
sign, writing or working arithmetic with these numbers is cumbersome.
Therefore, program instructions are listed as decimal numbers; numerical
quantities, or constants, are entered in octal form.
If a computer instruction is
EX
OPRND
OP
NI
00
62-110
29
00-112
then the two instruction words will appear in the computer in binary as
EX
first word
00000
OPERAND
track
111110
OP
second word
11101
sector
1101110
NI
track
000000
sector
1110000
8-1
Reading Conl.puter Nurnbers - - Continued
To use the oscilloscope (figure 7-2) or indicator lights to verify an ir.l.struction
in the cOlnputer, the programmer must be able to convert binary numbers to
their decimal equivalents.
A computer word may be a numerical quantity, rather than an operation or execution code and track address.
These quantities must be converted
from decimal to octal form for listing in the program; the octal number is
stored in the computer in binary form.
For example, C000325 would appear
in the computer as the binary nurnber 00000000011010101,
To check this, the
programmer must be able to convert binary numbers to octal.
So that a maximum number of significant digits will be carried
through programmed calculations, the programmer will sometimes find it
neces s ary to perform preliminary calculations to determine what shifting instructions should be included in the program.
Although these calculations
can be perforrned in decirnal, and the results converted to octal, programming time is saved if the arithmetic operations can be performed using the
octal numbers that will be used by the' computer.
In the paragraphs which
follow, binary and octal arithmetic are des cribed, along with numbering
systems and methods of converting from one nurnbering system to another.
NUMBER SYSTEMS
In the decimal number 213.75, the symbols 2, 1, 3, 7, and 5
sent the SUln of
or
200
8-2
+
10
+
3
+
7/10
+
5/100
repr~
Number Systems -- Continued
Thus, in the decimal system each position in a number has the value of some
powe r of 10, and each digit is the coefficient of the power of ten repre s ented
by that pas ition.
The place immediately to the left of the de cimal point is the
o·
1
power of 10 , the next is 10 , etc.
decimal point is the powe
of 10
-1
The place immediately to the right of the
,etc.
Consequently, every time the deci-
mal point with.in a number is moved a place to the
lef~,
the number is divided
by 10; if the point is moved to the right it is multiplied by 10.
Because there
are 10 symbols (0 through 9) permitted in the system, it operates with powers
of 10, and the base or radix of the system is 10.
The decimal number system is a "place" or positional notation system; a similar system can be devised using any base or radix.
Both the
binary and octal systems are parallel to the decimal system, but binary uses
only 2 symbols (0 and 1) and has a base of 2, while the octal system uses 8
symbols (0 through 7) and has a base of 8.
by a subscript, as 11010101
2
The base of a number is indicated
(binary) or 325
8
(octal) or 213
10
(decimal).
Each place in a binary number represents a power of two.
The binary
number 11010101.11 is the sum of
7
6
5
4
3
2
1
0
-1
2
1(2 )+1(2 }+0(2 )+1(2 )+0(2 )+1(2 )+0(2 )+1(2 )+1(2 )+1(2-)
or 128 +
64 +
o
+
o
+
16
+
4
+
o
+
2
+
1/2
+
1/4
or 213 3/4.
Each place in an octal number is a power of 8.
The octal number
325.6 is the sum of
or
192
+
16
+
5
+
6/8
or
213 3/4.
8-3
NUlnber Systems - - Continued
Note that the zero power of any number is always 1 and the first power of
any number is the nUIJ.'?ber itself.
As in the decimal system, every time the
point is shifted to the right, the numbe r is multiplied by the bas e for every
place moved.
If the point is shifted to the left, the number is divided by the
base for every place moved.
The programmer uses this principle in scaling
binary numbers.
CONVERSIONS
Binary to Decimal
In the above example, the binary number 11010101.11 was converted
to its decimal equivalent by adding the products of each digit times the power
of 2 as s ociated with its position.
This method can be employed using the
table "powers of 2" at the end of this rnanual.
The conversion can be tnade
more quickly by using the fact that every shift of the binary point one place
to the right ITlultiplies by two.
Convert binary numbers to decitnal by rnultiplying the tnost-significant
binary digit by two and adding the- next binary digit.
Multiply this sum. by two,
add the next, and continue to the least-significant digit.
A sitnilar procedure
follows for digits to the right of the point except that they are divided by two
instead of multiplied.
8-4
Conversions - - Continued
Example:
1
1
~
tlx2=2
+1
o
1
t
o
o
1
i
1 • 1
1
I
+0
3x2= 6
+1
6x2= 12
+0
l3x2= 26
+1
26x2= 52
+0
53x2= 106
+1
+1
106 x 2 = 212
213 + 1-:-2= 1/2
3/2~2=3/4
111010101.11 = 213 3/410
2
For an even faster conversion method, memorize the binary numbers
from 1 through 15.
They are
1
=1
3
2
= 10
6 = 110
4
= 100
12 = 1100
8 = 1000
13 = 1101
9
= 11
5
= 101
7 = III
10 = 1010
14= 1110
= 1011
15 ::: 1111
11
= 1001
When converting a binary number to d.ecimal, begin with the decimal equivalent of the first three or four digits and multiply it by two for every succeeding place to the point.
Then add this num.ber to the decim.al equivalent of the
rest of the binary digits.
Exam.ple:
Convert 11010101 to decim.aL
1101'
l
13
0101
t
x 2 x 2 x 2 x 2 = 208 + 5
=
213
8-5
Conversions -- Continued
Decinlal'to Octal
The quickest way to convert a decimal number to octal is to divide the
decilnal nl.lluber successively by 8 and note the remainders.
in reverse order, forn1 the octal equivalent.
The remainders,
If all or part of the number is a
fraction, repeatedly multiply the fraction by 8) noting the integers resulting
fron1 each multiplication.
The process is' continued until the fractional prod-
uct is zero, or until the desired accuracy has been obtained.
The integers,
in the order obtained, form the octal equivalent.
Exanlple:
Convert 213.75 to an octal number .
213 · 8
26 . 8
213.75
= 26 +
=
10
3
. 75x8= 6.00
5
+2
= 325.6 8
Binary to Octal to Binary
The octal nUITlber s ysteITl is us ed for notation and for pe rforITling
arithITletic because it is easier to convert between binary and octal than it is
to convert between binary and decimal.
equivalent of three binary digits.
Since 8
= 2 3,
each octal digit is the
To convert an octal number to binary,
write the binary equivalent of each octal digit.
ExaITlple:
=
3
2
5
. 6
in octal
011
010
101
.110
or 11010101.11 in binary
~
To convert a binary nUITlber to octal) begin at the binary point and
divide the nUITlber into triads (groups of three digits each).
octal equivalent of each group.
8-6
Then write the
Conversions - - Continued
•
1 1
Example:
6
Decimal to Binary
in binary
=
in octal
Decimal to binary conversion is like decimal to octal conversion except that the decimal number is successively divided by 2, rather than 8.
The
remainders from the divisions, in reverse order, form the binary number.
:Fractions are multiplied by 2 until a fractional product of zero is reached, or
until the required accuracy has been obtained.
The integers resulting from
the multiplication, in the order obtained, form the binary equivalent.
Example:
213.75 in decimal
=
213
· 2 = 106 + 1
106
2
=
53
+
0
53
·2 =
26
+
1
26
2
=
13
+
0
13
·2=
=
6
2
3
·2 =
1
2
.75 x 2
= 1. 50
.50 x 2
= 1.00
6 + 1
3
+
0
1 + 1
= o+
1
= 11010101.11 in binary
Octal to Decimal
Octal to decimal conversion is most convenie(ntly performed by adding
the products of each octal digit times the powe r of
tion.
For.example:
8 as s ociated
with its pos i-
325.6 in octal =
8-7
Conversions -- Continued
2
3 (8 )
= 192
1
2 (8 )
=
16
0
5 (8 )
=
5
1
6 (8- ) =
6/8 or 3/4
= 2133/4 in decim.al
Powers of 8 are listed in a table at the end of this manual.
BINARY ARITHMETIC
The rules for binary arithmetic are:
Addition
Subtr ac tio'n
o+ 0 =0
o-
0
=0
ox
0
=0
o+
0
= undefined
o+ 1 =1
1 - 1
=0
ox
1
=0
o+
1
=0
1 - 0
=1
1 x 1
=1
1 + 1
=1
o-
= 1 (with
1
+
1 = 0 (with 1
to carry)
Examples:
augend:
1
addend:
1 0 0
Subtr ac tion
1
borrow:
1 101
lTIinuend:
carry: 11
- - - - 1- -
sum: 1 0
8-8
1 +·0 = undefined
1
borrowed)
Addition
1
0
1
Division
Multi plication
1 0
0
1 1 10
1 0 0
1
subtrahend:
difference:
0
1
1
1
Binary Arithmetic - - Continued
1 0
1
1 0
0 0 0
1 0 0 1
1 0 0 1 1
1 1
1 1 1 1 0
Multiplicand:
Multiplie r:
Carry:
Product:
Division
Multiplication
Examples:
0
1
0
0
1
1 1
0 1
1 1
0
1
1 1
1.
Ill.
"101
10
10
101
1
1
1
1
OCTAL ARITHMETIC
Octal arithmetic is like decimal arithmetic.
To perform the arith-
metic operations quickly, octal addition and multiplication tables can be used,
or memorized.
An alternative to this is to perform the operations mentally
in decirnal and convert the sum or product to octal before writing it.
Below
I
are tables showing octal multiplication and addition.
OCTAL MULTIPLICATION TABLE
OCTAL ADDITION TABLE
o
1
2
0
0
0
"0
0
1
0
1
2
11
J~ :---
2
0
2
o
1
2
3
4
5
6
7
o
0
1
2
3
4
J
16
7
1
1
2
3
4
5~2-
10
5
345
6
7
0
0
0
0
3
4
5
6
7
4
6
10
12
14 16
14
17
22 25
!--
2
2
3
4
5
6
7
3
3
4
5
6
7
10
11
12
3
0
3
6
11
4
4
5
6
7
10
11
12
13
4
0
4
10
14 20 24 30 34
5
5
6
7
10
11
12
13
14
5
0
5
12
17
6
6
7
10
11
12
13
14
15
6
0
6
7
7
10
11
12
13
14
15
16
7
0
7
In decimal addition, 7
o
+
7
= 14.
24 31
36 43
14 22
30
36
44
52
16 25
34 43
52
61
The octal equivalent of 14 is 16 ( 1 x 8
6 x 8 ); thus, in the octal addition table above 7 + 7
'
= ~ 6.
1
+
In working an
addition problem, the 6 is written and the 1 is carried to the next column.
8-9
GLOSSARY
Specific examples used in these definitions usually refer to the RW-300 only.
Absolute
Va~ue
- the magnitude of a number without regard to the algebraic
sign of the number.
Acce s s Time - the time inte rval betwe en the ins tant at which inform ation is:
(a) called for from storage and the instant at which delivery
is completed, i. e. , the read time; or (b) ready for storage
and the instant at which storage is completed, i. e., the write
time.
Accumulator (A Register) - the register in the arithmetic unit in which sums
and other arithmetic and logical results are formed.
Adder - a device capable of forming the sum of two quantities plus a carry'
digit from a previous addition.
Address - a label (usually a set of numbers) which identifies a register or
location in which information is stored.
Analog - representing numerical quantities by means of continuous, physical
variables, e. g., translation, rotation, voltage, resistance;
contrasted with "digital".
Analog Conversion - the ope ratio~ of changing analog information to its
digital (numerical) equivalent, or vice-versa.
Glossary -1
Analog Input - the acceptance 'of analog voltages from transducers and the
conversion 6f this data to equivalent digital form for processing by the computer.
Analog Output - the conversion of digital information generated by the
computer into equivalent voltages or currents to operate controls or indicato'rs.
Arithmetic Unit - that portion of an automatic digital compute r in which
arithmetic and 199ical operations are performed.
Base (Radix) - the fundamental number of a system of numbers.
Thus, 10
is the base of the decimal number system, 2 of the binary,
8 of the octal.
Binary - involving the integer 2, as in a binary number system (base 2),
a binary choice (between two alternatives), or a binary operation (combining two q uantitie s).
Binary Number - a numerical value expressed·in binary notation.
Bi-Polar - in the R W -300, having to do with both negative and positive
analog input voltages; the bi-polar analog-digital converter.
Bit - a binary digit.
Bit Time - the length of time required for one bit to pass a given point on the
magnetic drum (approximately 6.5 microseconds in the RW":300).
Glossary - 2
Block - a group' of information recorded on magnetic tape corresponding to
one track of inform'ation recorded on the magnetic drum.
Branch - see Transfer.
Break-Point - a point in a routine at which the computer samples a manually
set switch to determine the subsequent course of the program.
Carry,w: (l) the digit to be added to the next higher column when the sum
of the digits in one column equals or exceeds the number base;
(2) the process of forwarding the carry digit.
Check - a means of verifying information during or after an operation.
Marginal Checking - a system or method of determining
computer circuit weaknesses by varying the
oper ating conditions of the circuits.
Circulating Register - see Register.
Code (noun) - a system of symbols and rule sfor use in computer
ope ration s.
Execution Code - a binary code used to modify certain operations in the RW -300 such as shifts, multiplication,
division, etc.
More specifically, the five bits
contained in bit-positions 14 through 18 of the
first word of a two-word instruction.
Glossary - 3
Instru ction Code - the· symbo Is, names, and definitions of
instructions which are dire ctly inte lligihle to a
given computer.
Mnemonic Code - a code, usually alphabetic, chosen so that it
can be remembered easily.
Example: MG for
Merge, LA for Load A, etc.
Code (verb) - to prepare problems in computer code for a specific computer.
Command - often used as' a synonym for Instruction or Operation.
See
Instruction Code.
Computer - any device capable of accepting information, performing
sequences of arithmetic and logical operations, and supplying
the results of these operations.
Control Unit - that portion of an automatic digital computer whic:h directs
the sequence of operations, interprets coded instructions, and
initiates the proper commands to the computer circuits to
execute the instructions.
Convert - (I) change numerical information from one number base to another
(e. g., decimal to binary) and/or from some form of fixed-point
to some form of floating -point representation, or vice -versa;
(2) change analog information (e. g., dis,tances, rotations,
voltages, etc.) into digital information {numerical} or vice versa.
Glossary - 4
Core - a toroid of ferromagnetic material capable of being magnetized in
either of two directions, and therefore a binary device which
I
,
can store one bit for indefinite periods.
Core Storage - an array or matrix of cores capable of storing large numbers
of bits.
Core Buffer - a core storage and associated equipment to permit communication between the RW -300 and the magnetic tape transports.
Data- any information (usually numbers) take'n in, operated on, or obtained
from a computer.
Raw Data - unappraised information entered into the computer.
Data Word - a word containing or reserved for numerical information, as
opposed to an instruction word.
Digit - one of the- n symbols of integral values ranging from 0 to n - 1
inclusive in a scale of numbering-of base n, especially one of
the ten decimal digits 0, 1, 2, 3, 4, 5, 6, 7, 8, 9.
Digit Time - See Bit Time.
Digital - using discrete numbers in a given scale of notation to represent
all the quantitie s that occur in a problem or a calculation, as
opposed to analog.
Glossary - 5
Digital Input - the transfer of information from a digital source
(paper -tape reade r, digital switches, digital
clock, etc.) to the computer.
Digital Output - the transfer of information in digital form from
the computer to some external device such as a
typewriter, paper -tape punch, re lays, etc.
Double - Length Product - see Product.
Drum - cylinder with coating of ferromagnetic material used as a storage
device in digital computers; elementary lengths of a drum
track are magnetized to represent ones or zeros.
Exe cution Code - see Code.
Extract - an operation whereby some portion of the A register is retained
while the remaining portions are cleared by a logical multiplication of the contents of a specified storage location.
Fixed Point - see Point.
Flip-Flop - an electronic circuit having two stable states.
A flip-flop can
store one binary digit of information.
Flow Chart (Flow Diagram) - a graphical representation of a sequence of
op~rations
which is usually drawn up before a program is
written to show how the program is to operate.
Glos sary - 6
Frame - on a pape r tape, one row of 6 or 8 binary digits.
General Storage - see Stor age.
Indicator - (1) on a panel, a light, oscilloscope, flag, or other device which
displays information visually.
(2) in the format requirements
of a punched paper tape, a symbol which tells the RW -300
load program what kind of information is to follow.
Input - information accepted by the compute r from cards, punched tape,
magnetic tape, instruments, etc.
Input Group - digital input lines, normally 18, addressed by a specific
track number.
Input Line - a wire capable of assuming two discrete voltage levels for
representation of either a one or a zero.
Instruction - see Code.
Leader - that portion of a punched paper tape that precedes the input data.
It is usually left blank.
Load (verb) - (1) to enter data into the computer, as "to load a tape".
(2) to cause data to enter a register from a memory location,
as "Load A" •
. Load Program - a permanently .stored program on track 63 which controls
the loading of programs and data into the memory.
Glossary - 7
Logging T"ypewriter - an output device for keeping a runnin'g log of process
conditions.
Logical Operation - see Operation.
Logical Addition - by definition, 0
+
0
= Oi
1
+
0
= 1,0 +
Logical addition is performed bit by bit.
1
= 1,
1
+
1
= 1.
Thus, if correspond-
ing bit positions of two registers are both zero, the result is
zero in that position.
Otherwise, the result is a
on~
in that
position.
Logical Product - by definition, 0 · 0 = 0, 0 • 1
= 0,
1 • 0
= 0,
1 • 1 = 1.
The logical product is formed bit by bit and has ones only in
those bit positions which had ones in the corresponding positions of both registers.
Loop - a portion of a program that is repeated until some predetermined
condition has been satisfied.
Magnetic Core - see Core.
Magnetic Tape - flexible tape coated with ferromagnetic material.
In digital
computer applications, elementary lengths of the tape are
magnetized to represent ones or zeros.
, Magnetic Tape Handler (Transport) -
device for moving tape so
that information can be magnetically recorded or
read.
Glossary - 8
Magnetic Tape Buffer - see Core Buffer.
Memory - any device into which units of information can be stored and from
which the information can be obtained at a later time; in the'
RW-300, the magnetic drum is the internal memory.
Memory Sum - a word consisting of the algebraic sum (modulo 217) of all
binary digits in a specified portion of a paper tape.
The
memory sum is used to determine whether or not all the information on a tape has been stored in the computer correctly.
Merge - an operation whe reby any portion of the contents of a specified
storage location may be inserted into the corresponding
portion .of the A register by logical addition.
Microsecond - a millionth of a second.
Millisecond - a thousandth of a second.
Module ... in the RW-300, individual circuits are assembled and wired on
insert cards.
Interconnections between circuits and physical
mounting for cards are provided by module s.
Modulo - an operator which denote s division by a base number; e. g., if
a
=b
modulo p, a is the remainder obtained after b is divided
by the base number p.
132 modulo 128 is 4.
Glossary -9
Multi ... Bit Output - a digital 'output circuit arrangement which, causes a group
of output lines to be' set to a one -and-zero pattern corresponding to the contents of the A register when the Digital output
command is executed.
Octal - involving the integer 8, as in the octal number system (base 8).
On~
-Bit Output - a digital output circuit arrangement which pe rmits one or
more output lines to be controlled without disturbing other
lines in the group.
Operand - a number used in an operation.
Operation - (1) a defined action; (2) the action specified by a single complete
instruction.
Arithmetic Operations - operations in which numerical quantities forln the elements of the calculation (e.g.,
addition, subtraction, multiplication, division).
Logical Operations - the operations of comparing, selecting,
matching, sorting, merging, etc.
Optimum Programming - see Program.
OPUS - Optimum Programming Using Symbols.
An assembly routine for the
R W -300 which reads a symbolically coded program and assigns optimum 'memory locations and numerical operation and
exe cu tion co de s •
Glos sary - 10
Origin - RW -300 memory location from which the first program instruction
is read when the computer IS START button is pressed, location
00-00
Output - information sent from the computer to typewriters,
punches~
mag-
netic tape, indicators, controllers, etc'.
Output Group - digital output lines, normally 18, addressed,bya specific
track number.
Output Line - a wire, or pairs of wires capable of assuming two discrete
'voltage levels for representing either a one or a zero.
Parallel - handled simultaneously, as opposed to serial.
Parity - in the R W -300, the condition- of a binary code in which the total
number of ones is always odd.
;Parity Che ck - a te st for data validity by examining the
bin~ry
code to determine whether or not the total number
of one s is odd.
Peripheral Equipment - accessory and
a~xiliary
equipment used with. a
computer to form a complete system.
Glos sary - 11
Point - in positional notation, the location or symbo 1 separ ating the integral
part of a numbe r from its fractional part.
the point is called the decimal point.
In decimal notation
In binary notation it is
called the binary point.
Fixed-Point Repre sentation - a notation or system of arithmetic in which all numerical quantities are
expressed by a predetermined number of digits
with the point implicitly located at some predete rmined position.
Product, Double -Length - the result of a multiplication in which twice as
many digits are retained as the computer normally holds in
one register; e. g., a computer whose basic word consists of
17 binary digits will have, as the result of a multiplication, a
34 -digit pr oduct.
Program (noun) - a list of instructions for the solution of a problem.
See
Routine.
Program (verb) - to plan a computation or process from the initial problem
to the delivery of the results, including the integration of the
operation into an existing system.
Thus, programming con-
sists of analyzing the problem, drawing a flow chart, and
coding the probleru.
Glossary - 12
Also, it may include numerical analysis,
Program (verb) continued - systems analysis, specification ,of print formats
and any other functions necessary to the use of a computer in
a system.
Optimum Programming - arrangement of data and instructions
in such a way that minimum waiting time is required to obtain information from the memory.
Program-Writable - in the basic RW -300, those areas of
memory that can be written into unde r program
control without moving the track group selector
plug from, the jack marked 0 -7.
Radix - see Base.
Read - to copy, usually from memory, or from one form. of memory to
another
I
particularly from external or secondary storage
(paper tape or magnetic tape) to intern"al storage.
Read Head - an electronic device which is capable of sensing and tra:ns'mitting information recorded on a magnetic drum or on magnetic tape.
Register - device for storing one or more computer words, or parts thereof'
in the arithmetic and control units.
In the RW -300 the A
register and the B register are circulating arithmetic registers.
The C, Y, and N registers are circulating control registers.
Glossary - 13
Register (continued) - The T, S, P, and M registers ,are non-circl,llating control registers.
Circulating Register - a register whose contents 'are continuall y read and re -written on the magnetic drum
surface.
Revolver - a register providing 32 words of fast-access storage; track 62.
of the RW -300.
Routine - a set of coded instructions arranged in prope r sequence to direct
the computer to perform a desired operation or series of
operations.
See Program.
Scale - to change the units in which a variable is expressed (e. g., moving
the decimal point, or its binary equivalent) so as to bring it
within the capacity of the machine or
routin~
at. hand.
Scale Factor - a magnitude indicating the number of places the
true point is to the left or right of an
arbi~rary
fixed position in a data word.
S.ector - 1/128 of.a track, providing storage for one computer word.
Sector Number - an integer ranging from 00 through 127, any
one of which denotes a particular word on a track.
Serial - handled on by one in time, as opposed to paralle 1.
Glossary - 14
"Shift - to move' the contents of a register to the right or left.
Sign Bit (Sign Digit) - a one or a zero used to designate the algebraic sign
of
a:
quantity; a zero represents a plus and a one represents a
minus in the RW -300.
State - a name applied to each of several timing and control sequences the
computer must enter while performing instructions.
There
are eight possible states in the RW-300.
Storage - information storage facilities that are controlled by the computer.
Also see Memory.
General Storage - R W -300 drum tracks 00 through 61.
Store - to transfer information to a storage location from which the information can be obtained at a later time.
Track - in the RW -300, a band around the magnetic drum. capable of storing
128 words.
Track Address - number designation specifying the track
number of a storage location.
Trailer - blank tape behind the last punched frame on paper tape.
See
leader.
Glossary - 15
Transfer. - (1) to move data from one location to another; to copy, exchange,
read,
re~ord,
store, transmit, or write data; (2) to' transfer
control; to jump from one part of a program to another.
Utility Package - collection of routines which aid the programmer in loading
and checking programs.
Unipolar - in the RW -300, having to do with positive analog input voltages.
Word - a set of characters which occupies one storage location.
RW-300, a word consists of 18 bits.
In the
The control unit treats
two words or 36 bits as an instruction and the arithmetic unit
treats one word, or 17 bits plus sign, as a quantity.'
Word Time - the length of time required for a sector on the drum to pass
a given point.
Approximately 0.13 milliseconds in the RW-300.
Write - to rec:ord information on any internal or external storage medium.
Write Head - an electronic device which records information on a magnetic
drum or on magnetic tape.
Glossary - 16
INDEX
A register, 1-6
qccess time, 1-3
accumulator, 1-6
~dd, 2-4, 4-10, 4~14
adder, 1-7
analog input- output, 1-11
arithmetic unit, 1- 6
B reg i s te r , 1 - 6
bi-polar converter, 1-14
binary arithmetic, 8-8
binary dump, 6-10
binary loading, 6-10
binary to de cimal conver sions, 8-4
binar y to octal con ve r sion, 8- 6
bit po sitions, 3 .. 2
C register, 1-7
CI (current instructions), 3~3
circulating .registers, 1-4, 1-6
compare magnitude, 2-9, 4-15
constant, 3- 5
control panel, 7-1
control unit, 1-7
conti'ols
mainteniince, 7-4
operation, 7-4
prog.l.'am, 7-6
data words, 3-5
decimal to binary conversion, 8-7
decimal to octal conver sion, 8-6
digital command, 2-13, 4-18, 5- 2
digital indicator s, 5:-- 13
digital input, 5- 3
expanded capabilities, 5-10
from Flexowriter, 5-5
from toggle switches, 5-4
manual inputs, 5-15
digital input lines, 1;..9, 5-3, 5-10
digital input-output, 1-9, 5-1
ba sic input-output, 5- 3
equipment, 5.-13
e xp and e d cap a b i li ti e s , 5 - I 0
sample printout, 5-7
digital input selector switch, 7-5,
7-6
digital output, 5-10
multi-bit outputs, 5-13
one -bit outputs, 5-12
to Flexowriter, 5-6
digital output lines, 1-9, 5-10
Digitran switch, 5-16
divide, 2-21,4-14
scaling, 8-18
drum, memory, 1-4,3-7,4-1
error light, 3-10, 6-6, 7-4, 7-5,7-6
execute (program control), 7-7, '7-10
execute matrix switch, 5-16
e Kec ution code, 2-1, 3-:-3
expanded digital input-output, 5-10
expanded memory, 1-5, 4-7
extract, 2-10, 4-13
Ferranti high- speed reader, 5-17
fe tch (pr ogr am control), 7 -1, 7 -1
fixed point, scaling, 8 -11
Flexowriter, 5- 5, 5-19
Flexowriter codes, 5-19, 5-31
°
general description, RW -300, 1-1
in di cat 0 r J 3 .. 3, 6 - 2 J 6 - 3
input conversion range, 1-14
input selector switch, 7-9
input storage locations, 1-16
instruction list, 2-27, 2-28, 2-29,
reference table :1
instruction register, 1-9
instruction words, 2-1, 3-2
jump instruction, 6-11
Index - 1
load A~ 2- 2, 4-13
load A". negatives 2-3, 4-13
load B, 2-2, 4-13
load button~ 3-4~~ 3-8~ 3-13, 6-8,
7-2
load instruction~ 4.,.13
load program, 3-8, 3 .... 13, 4-8, 6-1
loading tape, 6-7
loop: 3-16
magnetic tape unit, 1-18
core buffer, 1-19
tape transport, 1-21
manual digital input, 5-15
matrix indicator, 5~ 16
memory, 1-4, 3~7
me;:por y organization ll 4-3
memory sums~ 6-9
merge, 2-11, 4-13
multi-bit digital output, 5-13
multiply, 2~ 18, 4-14, 8 -14
N register, 1-7
next instruction, 2-1
no operation, 2-15, 4-17
number systems, 8-1, 8-2
octal addition table, 8-9
octal arithmetic, 8-9
octal mul tiplication table, 8-9
octal to decimal conversion, 8-7
octal to binary conversion, 8-9
one -bit digital output, 5-12
operand, 3- 3,
operand address, 2 ... 1, 3-3
operating controls, 7 -1, 7-4
operation code s, 1 ~3, 2-1
optimum progr'amming, 4-1.
OPUS, 4-21
origin, 3-4, 7-2
oscilloscope, 7 =8
output conversion range, 1-16
output storage, 1-18
paper tape (c;ligital output), 5- 25
parity checking, 5-27
power controls, 7-1
power off button, 7-1
power on hutton, 7-1
power s of 2, reference table 1
powers of 8, reference table 2
Index'- 2
printout sample listing, 5-7
program check-out, 7-6
programming, basic, 3~1;
optimum, 4-1
punched tape format p 6-4
.... ·,·.r.e..cifrd keeping, 3-10
re sume button, 3-9 ~ 6-8, 7 - 3
revolver p 1-5, 4-6, 4-19
revolver locations, reference
table 2
r un button, 7-7
sample programs, 3-12
scaling, 8 -10
scratch pad, 3-9
s hif t, 2 ... 6, 4 ... 17, 8 - 13
shifting (scaling)ll 8-12
. sign bit, 1-4, 3- 6
standby button, 7-1
start button, 3~4, 3-13, 7-1
state indicator Sll 7-7
state selector switch, 7-7
stop, 2-13
stop button, 3-13, 6-8» 7-2
store A, 2-3 11 4-1:7
. store B, 2-411 4-17
subtract, 2-5, 4-14
switch, 2-12, 4-16
tape command, 1- 22, 2-16
Teletype punch, 5-18
te st and maintenance panel, 7 - 3
track. register, 1-8
track set transfer switch, 4--.8
transfer, 4-8, 4-15
transfer on negative, 2-7
. transfer on overflow, 2-8
transfer on zero, 2-8
twenty-four -hour clock, 5-14
\
unipolar convert~r, 1-14
Utility Package, 6-10
watchdog timer, 5-1 7
word, 1-4, 2-1,. 3-1
word selector switch, 7-9
write switch (track 00-07), 7-5
y register, 1-8
TABLE OF POWERS OF 2
2
1
2
4
8
16
32
64
128
256
512
1 024
2 048
n
n
2- n
0
1
2
"3
1.0
O. 5
O. 25
O. 125
4"
O. 062
5 " O. 031
o. 015
6
0.007
7
5
25
625
812 5
8"
9
10
11
0.003
O. 001
0.000
0.000
906
953
976
488
25
125
562 5
281 25
4
8
16
32
096
192
334
768
12
13
14
1/5
O.
O.
O.
O.
000
000
000
000
244
122
061
030
140
070
035
517
625
312 5
"156 25
578 125
65
131
262
524
536
072
144
288
16
17
18
19
O. 000
O. 000
0.000
0.000
015
007
003
001
258
629
814
907
789
394
697
348
062
531
265
632
5
25
625
812 5
1
2
4
8
048
097
194
388
576
152
304
608
20
21
22
23
0.000
0.000
0.000
0.000
000
000
000
000
953
476
238
119
674
837
418
209
316
158
579
289
406
203
101
550
16
33
67
134
777
554
108
217
216
432
864
728
24
25
26
27
0.000
0.000
0.000
O. 000
000
000
000
000
059
029
014
007
604
802
901
450
644
322
161
580
775
387
193
596
847 656 25
923 828 125
268
536
1 073
2 147
435
870
741
483
456
912
824
648
28
29
30
31
0.000
0.000
O. 000
0.000
000
000
000
000
003
001
000
000
725
862
931
465
290
645
322
661
298
149
574
287
461
230
615
307
914
957
478
739
062
031
515
257
5
25
625
812 5
294 967
589 934
179869
359 738
296
592
184
368
32
33
34
35
0.000
O. 000
O. 000
0.000
000
000
000
000
000
000
000
000
232
1116
058
029
830
415
207
103
643
321
660
830
653
826
913
456
869
934
467
733
628
814
407
703
906
453
226
613
4
8
17
34
25
125
562 5
781 25
390 625
695 312 5
25
125
562 5
281 25
Reference Tables - 1
Table of Non-Parity
'• Flexowriter Codes
C~ARACTER
OCTAL CODE
UPPER
LOWER
IN
ON
CASE
CASE
COMPUTER
TAPE
"
A
B
c
0
E'
F
G
H
I
J
K
L
M
N
0
p
Q
R
s
T
u
A
B
C
0
E
F
G
H.
I
J
K
L
M
N
0
P
Q
R
S
T
U
v
w
x
V
y
Y
z
..
.)
'#
$
%
,
&
*
(
W
X
Z
0
1
2
3
4
5
6
7
8
9·
0
10
?
11
I
12
_.
!
=
,
.
+
LOWER CASE
UPPER CASE
TAB
SPACE
BLACK
RED
C!RETURN
PUNCH ON
PUNCH OFF
NON PRINT
PRINT RESTORE
STOP CODE
TAPE FEED
61
62
63
64
65
66
67
70
71
41
42
43
44
45
46
47
50
51
22
23
24
25
26
27
30
31
20
1
141
142
143
144
145
146
147
150
151
101
102
103
104
105
106
107
2
2
3
4
5
6
7
10
11
52
53
34
3
4
5
6
7
10
33
73
21
40
72
74
36
00
12
54
56
250
244
230
224
13
77
Reference Table s - 2
Table of Powers of 8
8n
1
8
64
512
4 096
32 768
n
8- n
0
1
2
3
4
5
1.0
O. 125
0.015
0.001
O. 000
0.000
625
953 125
244 140 625
030 517 578 125
110
111
42
43
44
45
46
47
50
51
40
1
11
112
113
54
53
153
41
100
152
1.54
56
00
12
114
116
·
·
·
·
13
157
!
Table of Equivalent Revolver Locations
KU
U
jl.
~4
9b
RIb
Ib
_4~_
tsU
J.ll.
Rl
1
33
65
81
11~_
l
_b~
18
ts~
ll~
3
4
5
35_
35
36
37
49
5U
R3
R4
R5
R6
R7
RS
R9
RIO
Rll
R12
Rl3
R14
R15
19
51
ts..:s
ll~
lU
7U
~~
IH
11
. 11 ts
7
39
4u
. .~7
~
J~
9
' 1U
41
4t.
71
7t.
7..:s
74
52
53
54
55
84
85
j~
R17
R18
R19
R20
R21
R22
R23
R24
17
Rl
97
98
99
11
12
..!3
J5
6
13
14
'15
44,
45
46
,47
67
68
_69
J~
77
78
79
100
101
102
103
104
105
lOb
21
22
(23
24
Rl5
Rlb
l5
:>b
57
GO
5~
107
108
R2
R28
_':7.
109
1 ro
III
Rl9
28
·l.9
R30
..:su
1\3,1
31
' 59
DU
b1
b2
03
~~
1 ;GU
ts'l
,l!
IV
Il
It.
,('..$
~3
l('!)
~4
~~
(,~
(,4
12b
_l~J
TABLE OF R W -300 INSTRUCTIONS
Standard Inst. Format
Instruction Time
Operation
Code
Description of Operation
(A)+(M) .... A
ADD:
(A) - (M) .... A
SUBTRACT:
(A) X (M) .... (A,B)
MUL TIPLY:
(A) / (M) .... (A), remainder B
DIVIDE
(M) .... A
LOAD A:
(M) .... B
LOAD B:
LOAD A NEGATIVE: - (M) .... A
(A) .... (M)
STORE A:
(B) .... (M)
STORE B:
TRANSFER NEG: If (A) <0, Oprnd Add ..... I'll
TRANSFER OVERFLOW: If O.F., Oprnd Add ..... I'll
TRANSFER ZERO: If (A)= 0, Opmd Add ..... I'll
COMPARE MAGNITUDE: If I(A) I - I (M)
< 0; Add nn to NI Sector Address
(A)@(M) .... A
EXTRACT:
(A)e (M) .... A
MERGE:
STOP: Stop; CI .... NI on RESUME
NO OPERATION: CI .... I'll
SHIFT: (A) .... , (A) +- , (A,B) +Operand Track
Variations
Address
I
00·15
16·31
48·63
SWITCH:
Operand Track
Address
00·15
16.31
32·47
48·63
DIGITAL
Operand Track
Address
Alpha
Dec.
A
S
M
D
LA
LB
LN
SA
SB
TN
TF
TZ
25
24
16
26
29
07
21
30
20
09
10
CM
11
15
EX
MG
SP
NO
SH
05
31
00
03
01
CI ..
Oprnd
{word times}
. Total Time
CI .. HI
{word times}
3
3
3
3
3
3
3
4
4
6 or 7
6 or 7
6+ nn
6+ nn
5
5
5
6
6
4 or 5
4 or 5
4 or 5
5 or 7
00
00
nn
nn
00
00
00
00
00
00
I 00
I 00
Inn
5
5
4
4
I
I
I
I
4+ nn
4+ nn
4+ nn
Inn 00·00
I nn 16·00
Inn 48·00
101 TT-SS
I 01 TJ·SS
I 01 TT·SS
5
5
5
5
I 0000·00
i 00 16·00
i 00 32·00
10048·00
i 02
102
I 02
I 02
TT·SS
TT.SS
TT·SS
TT.SS
I
I
i
I
I
I
i
I
TT·SS
TT·SS
TT·SS
TT·SS
·
··
3
3
3
·
·
·
(A) right nn plac811
(A) left nn places
(A, B) left nn places
SW
·
02
·
·DG
TT·02
*
OP NIA
TT·SS
TT·SS
TT·SS
TT.SS
TT·SS
TT-SS
TT·SS
TT·SS
TT.SS
TT·SS
TT.SS
TT·SS
TT·SS
00 TT·SS
00 TT.SS
0000.00
00 TT~SS
I
I
I
I
I
25
24
16
26
29
i 07
I 21
I 30
I 20
109
I 10
111
I 15
TT·SS
TT-SS
TT.SS
TT·SS
TT·SS
TT·SS
TT·SS
TT·SS
TT·SS
TT·SS
TT.SS
TT.SS
TT·SS
I
I
I
I
TT·SS
TT·SS
TT·SS
TT·SS
05
31
00
03
06
5
5
TA
.
6
·
6
0000·00
0004·00
07 32-00
1836.00
06
06
06
06
22
.
n:ro-
TT.03
EXOPA
Variations
Output to FLex
1 bit Outputs
Input from Flex
1 bit Input.
MAGNETIC TAPE ADDRESS *
Operand
Address
Variations
Read ComEuter: (TK TT) .... Buffer
TT.07
TT·OS
TT·Ol
TT.06
2nd word
Variations
(A) .... (B)
(B) .... (A)
(A)-(B)
0 .... (A,B)
00
04·31
32
36·63
TT·04
1st word
Write Computer: (Buffer) .... TK t;
t = 0 selects TK 14
t= 1 selects TK 15
Read Tape: (1 tape Block) .... Buffer
Write Tape: (Buffer) .... (1 tape Block)
Rewind: Rewind tape unit u to start
Backspace: Backspace tape unit u
1 block
Search Forward: Search forward for
key block
Search Reverse: Search reverse far
key block
134 min •
262 max.
5
I tu TT·10
I 22 TT·SS
I tu TT·04
I 22 TT·SS
5
5
5
i tu TT·07
I tu TT·05
i tu TT·01
i 22 TT·SS
I 22 TT·SS
5
I tu TT·06
i 22 TT·SS
5
I tu TT·03
I 22 TT·SS
5
I tu TT.02
I 22 TT·SS
I 22 TT·SS
NOTE: Mag tape Instruction times
assume tape unit I s ready
LEGEND:
CI Current Instruction
Of! Operation
Rn Revolver location n
NI Next Instruction
EX Execution Code
Magnetic Tape Unit u
u
,Add.
A
B
Address
A.regl~ter
B.regllter
Oprnd.
( )
OPA
NIA
Operand
Contents of
Operand Address
Next Inst. Address
. Reference Table s - 3
10.4 states 1, 2, 3, and 4
DIGIT·
STATE
INSTR.
TDfES
1
All
1 - 1
8 - 13
19
1 - 18
1.9
2
All
1 - 13
14 - 18
1 - 18
19
3
All
1 - 13
G
1 - 5 "'
14 - 18
1 - 18
1 - 18
l~OI
6 - 18
19
19
14 - 15
11 - 1 3 \
19
19
11- 19 9,10
4
1 - 8,15,16 1 - 1
9,10 1 - 7
1 - 8,15,16 19
9,10 19
11 - 13
11 - 19
All
14 (00)
All Instructions
DESCRIPTION
Search for equality between Nr and 'Sector No.
Sect. No.
El = o. If N = Sect. No. E1 = 1
Shift N(TRK) - 4 M register M, -M6 • .N
tl3
goes to Ml and N8 to ~
If E1 = 0
stay in State 1
If' ~ = 1
Go to State 2
A, and B registers recirculat1mg (20 bits)
Y, C do not recirculate.
Set El = 1, Set ZIt = 1
Put operand address (OSR) into Y regist~r
Kl'
Shift EX. Ttme----. P flip-flops (~l - P5)(El8 - E14 )
A and B registers recirculating ,(20;bits)
Nand C do not recirculate
Go to St. 3
GSR ---+ Nw (Next lnstr.)
Shift P Register----&> 0
(Ex. Time -.-.0)
.
w
~
P Reg. (PI - P )
5
A and ~ 20 bits recirculate
Y Recirculate
C Recirculate
Go to Bt 4, j f FT = 1
Go to st. lJ
GSR (Instr. Code)
Go to St. 5, if FT
=0
o ........ El
Search for equality between Y and Sect. No. (R66)
Search for equality between Y and store Sect. No. (J9)
If ~ = 0 Stay in st. 4
It
= 1 Go to st. 5
I
It E' FT' (Record Error) I = 1 Go to st. 5
Go to St. 8
If Rm = 1
Go to St. 5
19
1 - 18
d17
A,B,Y,C,and N Recirculate.
o -II
-7-
El if all delays expired
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