SPI Block Guide

• Revision History
• Table of Contents
• List of Figures
• List of Tables
• Preface
• Section 1 Introduction
  • 1.1 Overview
  • 1.2 Features
  • 1.3 Modes of Operation
• Section 2 External Signal Description
  • 2.1 Overview
  • 2.2 Detailed Signal Description
    • 2.2.1 MOSI
    • 2.2.2 MISO
    • 2.2.3 SS
    • 2.2.4 SCK
• Section 3 Memory Map/Register Definition
  • 3.1 Register Descriptions
    • 3.1.1 SPI Control Register 1
    • 3.1.2 SPI Control Register 2
    • 3.1.3 SPI Baud Rate Register
    • 3.1.4 SPI Status Register
    • 3.1.5 SPI Data Register
• Section 4 Functional Description
  • 4.1 General
  • 4.2 Master Mode
  • 4.3 Slave Mode
  • 4.4 Transmission Formats
    • 4.4.1 Clock Phase and Polarity Controls
    • 4.4.2 CPHA = 0 Transfer Format
    • 4.4.3 CPHA = 1 Transfer Format
  • 4.5 SPI Baud Rate Generation
  • 4.6 Special Features
    • 4.6.1 SS Output
    • 4.6.2 Bidirectional Mode (MOMI or SISO)
  • 4.7 Error Conditions
    • 4.7.1 Mode Fault Error
  • 4.8 Low Power Mode Options
    • 4.8.1 SPI in Run Mode
    • 4.8.2 SPI in Wait Mode
    • 4.8.3 SPI in Stop Mode
    • 4.8.4 Reset
    • 4.8.5 Interrupts
• Section 5 Initialization/Application Information
• Index
• Block Guide End Sheet