TREX C1 TRDB D5M User Guide

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Terasic TRDB_D5M Digital Camera Package

TRDB_D5M
5 Mega Pixel Digital Camera Development Kit

Document Version 1.2

AUG. 10, 2010 by Terasic

Terasic TRDB_D5M

Page Index
CHAPTER 1

ABOUT THE KIT................................................................................................................................. 1

1.1

KIT CONTENTS ..................................................................................................................................................... 1

1.2

ASSEMBLE THE CAMERA ...................................................................................................................................... 2

1.3

GETTING HELP ..................................................................................................................................................... 4

CHAPTER 2

TRDB_D5M.......................................................................................................................................... 5

2.1

FEATURES............................................................................................................................................................. 5

2.2

PIN-OUT OF THE 40-PIN CONNECTOR ON TRDB-D5M ....................................................................................... 7

2.3

PIN DESCRIPTION OF THE 40-PIN INTERFACE OF TRDB_D5M .......................................................................... 8

CHAPTER 3

DIGITAL CAMERA DESIGN DEMONSTRATION ......................................................................... 9

3.1

DEMONSTRATION SETUP...................................................................................................................................... 9

3.2

CAMERA DEMONSTRATION SETUP ON DE4 BOARD ......................................................................................... 10

3.3

CAMERA DEMONSTRATION SETUP ON DE2-115 BOARD.................................................................................. 12

3.4

CONFIGURING THE CAMERA AND LOAD THE IMAGE CAPTURED TO YOUR PC (DE2-70 BOARD USERS)........ 13

3.5

CONFIGURING THE CAMERA (DE2 BOARD USERS) .......................................................................................... 17

3.6

CONFIGURING THE CAMERA (DE1 BOARD USERS) .......................................................................................... 19

3.7

BLOCK DIAGRAM OF THE REFERENCE DESIGN ................................................................................................. 21

CHAPTER 4

APPENDIX ......................................................................................................................................... 22

4.1

REVISION HISTORY............................................................................................................................................. 22

4.2

ALWAYS VISIT TRDB_D5M WEBPAGE FOR NEW APPLICATIONS ..................................................................... 22

Digital Camera Design Demonstration

1
Chapter

Chapter 1

About the Kit
The TRDB_D5M Kit provides everything you need to develop a 5 Mega Pixel
Digital Camera on the Altera DE4 / DE2_115 / DE2-70 / DE2 / DE1 boards. The kit
contains hardware design (in Verilog) and software to load the picture taken into a
PC and save it as a BMP or JPG file (DE2-70 only). The Getting Started User
Guide enables users to exercise the digital camera functions. This chapter
provides users key information about the kit.

1.1

Kit Contents

Figure 1.1 shows the photo of the TRDB_D5M package. The package includes:
1.

The TRDB_D5M (D5M) board with one CMOS sensor.

A reference design CD.

Figure 1.1. The TRDB_D5M (D5M) Package Content (CD not including)

Digital Camera Design Demonstration

1.2

Assemble the Camera

Please follow the step below to assemble your camera:
1.

Connect the D5M to your DE4 board as shown in Figure 1.2.

Figure 1.2 Connect the D5M to DE4 board’s expansion port (outermost port).
2.

Connect the D5M to your DE2-115 board as shown in Figure 1.3.

Figure 1.3 Connect the D5M to DE2-115 board’s expansion port
3.

Connect the D5M to your DE2-70 board as shown in Figure 1.4.

Figure 1.4 Connect the D5M to DE2-70 board’s expansion port (outermost port).
2

Digital Camera Design Demonstration

Connect the D5M to your DE2 board as shown in Figure 1.5.

Figure 1.5 Connect the D5M to DE2 board’s expansion port (outermost port).
5.

Connect the D5M to your DE1 board as shown in Figure 1.6.

Figure 1.6 Connect the D5M to DE1 board’s expansion port (outermost port).

Digital Camera Design Demonstration

1.3

Getting Help

Here are some places to get help if you encounter any problem:
9

Email to support@terasic.com

Taiwan & China: +886-3-550-8800

Korea : +82-2-512-7661

Japan: +81-428-77-7000

English Support Line: +1-408-512-1336

Digital Camera Design Demonstration

2
Chapter

Chapter 2

TRDB_D5M
This chapter will illustrate the technical details users need to know to modify the
reference design for their own purpose.

2.1

Features

The D5M kit is designed to use the same strict design and layout practices used
in high-end consumer products. The feature set is listed below:
1.

High frame rate

Superior low-light performance

Low dark current

Global reset release, which starts the exposure of all rows simultaneously

Bulb exposure mode, for arbitrary exposure times

Snapshot mode to take frames on demand

Horizontal and vertical mirror image

Column and row skip modes to reduce image size without reducing
field-of-view

Column and row binning modes to improve image quality when resizing

10.

Simple two-wire serial interface

11.

Programmable controls: gain, frame rate, frame size, exposure

12.

Automatic black level calibration

13.

On-chip PLL

Digital Camera Design Demonstration

Key Performance Parameters
Parameter

Value

Active pixels

2,592H x 1,944V

Pixel size

2.2μ m x 2.2μ m

Color filter array

RGB Bayer pattern

Shutter type
Maximum data rate/master clock
Full resolution
Frame rate
VGA (640 x 480)
ADC resolution
Responsivity

Programmable up to 15 fps
Programmable up to 70 fps
12-bit
1.4 V/lux-sec (550nm)

Pixel dynamic range

70.1dB

SNRMAX
Supply
Voltage

Global reset release (GRR),
96 Mp/s at 96 MHz

38.1dB
Power
I/O

3.3V
1.7V～3.1V

Note. For detail specification of D5M, please refer to TRDB-D5M_Hardware specification.PDF

Digital Camera Design Demonstration

2.2

Pin-out of the 40-pin connector on TRDB-D5M

PIXCLK

D11

D10

GND

XCLKIN

RESETn

TRIGGER

STROBE

LVAL

FVAL

SDATA

SCLK

VCC33

GND

Figure 2.1. The pin-out of the 40-pin connector on TRDB_D5M

Digital Camera Design Demonstration

2.3

Pin Description of the 40-pin Interface of TRDB_D5M
The TRDB_D5M has a 40-pin connector on the board. The pin description of the
40-pin connector follows:
Pin Numbers

Name

Direction

PIXCLK

Output

Pixel clock.

D[11]

Output

Pixel data Bit 11

N/A

D[10]

Output

Pixel data Bit 10

D[9]

Output

Pixel data Bit 9

D[8]

Output

Pixel data Bit 8

D[7]

Output

Pixel data Bit 7

D[6]

Output

Pixel data Bit 6

D[5]

Output

Pixel data Bit 5

D[4]

Output

Pixel data Bit 4

N/A

Not Connect

GND

N/A

Ground

D[3]

Output

Pixel data Bit 3

D[2]

Output

Pixel data Bit 2

D[1]

Output

Pixel data Bit 1

D[0]

Output

Pixel data Bit 0

N/A

Not Connect

N/A

Not Connect

XCLKIN

Input

External input clock

RESETn

Input

D5M reset

21
22

N/A

Not Connect

TRIGGER

Input

Snapshot trigger

STROBE

Output

Snapshot strobe

LVAL

Output

Line valid

FVAL

Output

Frame valid

SDATA

I/O

Serial data

SCLK

Input

Serial clock

N/A

Not Connect

VCC33

N/A

Power 3.3V

GND

N/A

Ground

N/A

Not Connect

N/A

Not Connect

N/A

Not Connect

N/A

Not Connect

N/A

Not Connect

N/A

Not Connect

N/A

Not Connect

N/A

Not Connect

N/A

Not Connect

N/A

Not Connect

Description

Not Connect

Digital Camera Design Demonstration

3
Chapter

Chapter 3

Digital Camera Design
Demonstration
This chapter illustrates how to exercise the digital camera reference design
provided with the kit. Users can follow the instructions in this chapter to build a 5
Mega Pixel camera using their DE4 / DE2_115 / DE2-70 / DE2 / DE1 in minutes.

3.1

Demonstration Setup

The image raw data is sent from D5M to the DE4 / DE2_115 /DE2-70 / DE2 / DE1
board. The FPGA on the DE4 / DE2_115 /DE2-70 / DE2 / DE1 board is handling
image processing part and converts the data to RGB format to display on the DVI
/ VGA monitor. For DE2-70, the image captured at SDRAM can be taken at
anytime (snapshot) and uploaded to a PC as a BMP/JPG file.

Digital Camera Design Demonstration

3.2

Camera Demonstration Setup On DE4 Board
Locate the project directory from the CD-ROM included and follow the steps
below:
Directory: Demonstration / DE4_230/530_D5M_DVI
FPGA Bitstream Used: DE4_230/530_ D5M_DVI.sof
1.

Ensure the connection is made correctly as shown in Figure 3.2. Make sure
the D5M is connected to JP4 (GPIO 1) and DVI daughter card is connected
to J20 (HSMC PORT A) of the DE4 board with two THCB-HMF2 interface
cards which are bundled in the DE4 kit.

Insert the DDR2 memory card into J9 (DDR2 SO-DIMM-1).

Connect the DVI TX output of the DVI daughter card to a DVI monitor.

Copy the directory DE4_230/530_D5M_VGA from D5M System CD-ROM to
the host computer.

Download the bitstream (DE4_230/530_D5M_DVI.sof) to the DE4 board.

The system enters the FREE RUN mode automatically. Press BUTTON [0]
on the DE4 board to reset the circuit.

User can use the SW[0] to set the DVI display mode. When SW [0] is set to
Off, the DVI will display whatever the camera captures. when On, the DVI will
display color pattern.

Press BUTTON [2] to take a shot of the photo; you can press BUTTON [3]
again to switch back to FREE RUN mode and you should be able to see
whatever the camera captures on the VGA display..

User can use the SLIDE_SW [0] with BUTTON [1] to set the exposure time
for brightness adjustment of the image captured. When SLIDE_SW [0] is set
to Off, the brightness of image will be increased as BUTTON [1] is pressed
longer. If SLIDE_SW [0] is set to On, the brightness of image will be
decreased as BUTTON [1] is pressed shorter.

10.

Set the SLIDE_SW [1] to On (upper position), the captured image will be
enlarged with BUTTON [0] and BUTTON [3] pressed in order.

11.

Table 3.1 summarizes the functional keys of the digital camera.

Digital Camera Design Demonstration

Figure 3.2. The Connection Setup for DE4 users

Table 3.1 The functional keys of the digital camera demonstration
Component
BUTTON [0]
BUTTON [1]
BUTTON [2]
BUTTON [3]

Function Description
Reset circuit
Set the new exposure time (use with SW[0] )
Trigger the Image Capture (take a shot)
Switch to Free Run mode
Off: Extend the exposure time

SLIDE_SW [0]

On: Shorten the exposure time

SLIDE_SW [16]

Off: Normal display
On: Color pattern display
Off: Normal display

SW [0]
HEX[1:0]

12.

On: ZOOM in

Frame counter (Display the low 8 bits ONLY)

User can revise the header file "vpg.h" in the project to select the system
resolution between SXGA@1280*1024 and VGA@640*480 (note*).

13.

After revision, regenerate the project and repeat above steps.

Note: users should revise the parameter ‘PORT_SIZE_BYTES’
of the DDR2_ODIMM_Read/Write_Port modules in SOPC Builder
under each resolution (640*480*4, 1280*1024*4 respectively) .

Digital Camera Design Demonstration

3.3

Camera Demonstration Setup On DE2-115 Board
Locate the project directory from the CD-ROM included and follow the steps
below:
Directory: Demonstration / DE2_115_CAMERA
FPGA Bitstream Used: DE2_115_ CAMERA.sof
1.

Ensure the GPIO voltage level is set to 3.3V via JP6 (GPIO_VCCIO) of the
DE2-115 board.

Ensure the connection is made correctly as shown in Figure 3.3. Make sure
the D5M is connected to JP5 (GPIO) of the DE2-115 board.

Connect the VGA output of the DE2-115 board to a VGA monitor.

Copy the directory DE2_115_D5M_VGA from D5M System CD-ROM to the
host computer.

Download the bitstream (DE2_115_D5M_VGA.sof/pof) to the DE2_115
board.

The system enters the FREE RUN mode automatically. Press KEY[0] on the
DE2-115 board to reset the circuit.

Press KEY[2] to take a shot of the photo; you can press KEY[3] again to
switch back to FREE RUN mode and you should be able to see whatever the
camera captures on the VGA display..

User can use the SW[0] with KEY[1] to set the exposure time for brightness
adjustment of the image captured. When SW[0] is set to Off, the brightness
of image will be increased as KEY[1] is pressed longer. If SW[0] is set to On,
the brightness of image will be decreased as KEY[1] is pressed shorter.

Set the SW[16] to On (upper position), the captured image will be enlarged
with KEY[0] and KEY[3] pressed in order.

10.

Table 3.2 summarizes the functional keys of the digital camera.

Figure 3.3. The Connection Setup for DE2-115 users
Table 3.2 The functional keys of the digital camera demonstration
12

Digital Camera Design Demonstration

Component
KEY[0]
KEY[1]
KEY[2]
KEY[3]

Function Description
Reset circuit
Set the new exposure time (use with SW[0] )
Trigger the Image Capture (take a shot)
Switch to Free Run mode
Off: Extend the exposure time

SW[0]

On: Shorten the exposure time
On: ZOOM in

SW[16]

Off: Normal display

HEX[7:0]

11.

Frame counter (Display ONLY)

User can revise the header file "VGA_Param.h" in the project to select the
system resolution between SVGA@800*600 and VGA@640*480.

12.

3.4

After revision, regenerate the project and repeat above steps.

Configuring the Camera and Load the Image Captured to
13

Digital Camera Design Demonstration

Your PC (DE2-70 Board Users)
Locate the project directory from the CD-ROM included and follow the steps
below:
Directory: Demonstration / DE2_70_CAMERA / SW
FPGA Bitstream Used: DE2_70_ CAMERA.sof
1.

Ensure the connection is made correctly as shown in Figure 3.4. Make sure
the D5M is connected to J5 (GPIO 1) of the DE2-70 board.

Copy the directory DE2_70_CAMERA from D5M System CD-ROM to the
host computer.

Execute the DE2_70_CAMERA.exe form the directory DE2_70_CAMERA /
SW.

Click the ‘Download Code’ button. (Error message will pop up for warning
since the DE2-70 is loaded with factory default image, which cannot be
transmitted. Click ‘OK’ button to skip the error message and click ‘Download
Code’ to proceed.

Connect the VGA output of the DE2-70 board to a VGA monitor.

Press KEY0 on the DE2-70 board to reset the circuit.

You can press KEY3 to switch to the FREE RUN mode and you should be
able to see whatever the camera captures on the VGA display.

Press KEY2 to take a shot of the photo; you can press KEY3 again to switch
back to FREE RUN mode.

Users can use the SW[0] with KEY1 to set the exposure time for brightness
adjustment of the image captured. When SW[0] is set to Off, the brightness
of image will be increased as KEY1 is pressed longer. If SW[0] is set to On,
the brightness of image will be decreased as KEY1 is pressed shorter.

10.

Set the SW[16] to On (upper position), the captured image will be enlarged
with KEY0 and KEY3 pressed in order.

11.

Table 3.3 summarizes the functional keys of the digital camera.

Digital Camera Design Demonstration

Figure 3.4. The Connection Setup for DE2-70 users

Table 3.3 The functional keys of the digital camera demonstration
Component
KEY[0]
KEY[1]
KEY[2]
KEY[3]

Function Description
Reset circuit
Set the new exposure time (use with SW[0] )
Trigger the Image Capture (take a shot)
Switch to Free Run mode
Off: Extend the exposure time

SW[0]

On: Shorten the exposure time
On: ZOOM in

SW[16]

Off: Normal display

HEX[7:0]

12.

Frame counter (Display ONLY)

Users can upload the captured image to PC by clicking the ‘Capture’ button
of the ‘DE2_70_CAMERA.exe’ as shown in Figure 3.5. Meanwhile, the digital
camera is set to photo-taking mode. Press KEY3 to switch back to FREE
RUN mode.

13.

Click ‘Save’ button to save the captured image as a JPG or BMP file.

Digital Camera Design Demonstration

Figure 3.5. The DE2_70_camera tool

Digital Camera Design Demonstration

3.5

Configuring the Camera (DE2 Board Users)
Locate the project directory from the CD-ROM included and follow the steps
below:
Directory: Demonstration / DE2_CAMERA
FPGA Bitstream Used: DE2_D5M.sof or DE2_D5M.pof
1.

Ensure the connection is set correctly as shown in Figure 3.6. Make sure
the D5M is connected to JP2 (GPIO 1) of the DE2 board.

Connect the VGA output of the DE2 board to a VGA monitor.

Download the bitstream (DE2_D5M.sof/pof) to the DE2 board.

Press KEY0 on the DE2 board to reset the circuit.

You can press KEY3 to switch to the FREE RUN mode and you should be
able to see whatever the camera sees on the VGA display.

Press KEY2 to take a shot of the photo; you can press KEY3 again to switch
back to FREE RUN mode.

Set the SW[16] to On (upper position), the captured image will be enlarged
with KEY0 and KEY3 pressed in order.

Table 3.4 summarizes the functional keys of the digital camera.

Figure 3.6. The Connection Setup for DE2 users

Digital Camera Design Demonstration

Table 3.4 The functional keys of the digital camera demonstration
Component
KEY[0]
KEY[1]
KEY[2]
KEY[3]

Function Description
Reset circuit
Set the new exposure time (use with SW[0] )
Trigger the Image Capture (take a shot)
Switch to Free Run mode
Off: Extend the exposure time

SW[0]

On: Shorten the exposure time
On: ZOOM in

SW[16]

Off: Normal display

HEX[7:0]

Frame counter (Display ONLY)

Digital Camera Design Demonstration

3.6

Configuring the Camera (DE1 Board Users)
Locate the project directory from the CD-ROM included and follow the steps
below:
Directory: Demonstration / DE1_CAMERA
FPGA Bitstream Used: DE1_D5M.sof or DE1_D5M.pof
1.

Ensure the connection is set correctly as shown in Figure 3.7. Make sure
the D5M is connected to JP2 (GPIO 1) of the DE1 board.

Download the bitstream (DE1_D5M.sof/pof) to the DE1 board.

Connect the VGA output of the DE1 board to a VGA monitor.

Press KEY0 on the DE1 board to reset the circuit.

You can press KEY3 to switch to the FREE RUN mode and you should be
able to see whatever the camera sees on the VGA display.

Press KEY2 to take a shot of the photo; you can press KEY3 again to switch
back to FREE RUN mode.

Set the SW[8] to On (upper position), the captured image will be enlarged
with KEY0 and KEY3 pressed in order.

Table 3.5 summarizes the functional keys of the digital camera.

Figure 3.7. The Connection Setup for DE1 users

Digital Camera Design Demonstration

Table 3.5 The functional keys of the digital camera demonstration
Component
KEY[0]
KEY[1]
KEY[2]
KEY[3]

Function Description
Reset circuit
Set the new exposure time (use with SW[0] )
Trigger the Image Capture (take a shot)
Switch to Free Run mode
Off: Extend the exposure time

SW[0]

On: Shorten the exposure time
On: ZOOM in

SW[8]

Off: Normal display

HEX[3:0]

Frame counter (Display ONLY)

Digital Camera Design Demonstration

3.7

Block Diagram of the Reference Design
The complete reference design is also located in the CD-ROM attached. Please
refer to the following diagram to help you in reading the code provided.

DATA
FVAL
LVAL

PCLK
MCLK

CMOS
Image
Sensor

SDAT
SCLK

CMOS
Sensor Data
Capture

I2C Sensor
Configuration

Bayer Color
Pattern Data
To
30-Bit RGB

VGA
Controller
And
Data Request

Multi-Port SDRAM
Controller

DATA
HS
VS

VGA
DAC

CLK

DATA
ADDR
CTRL

SDRAM

Core
Module

Board

Figure 3.8. The block diagram of the digital camera design
The below figure for DE4 only.

DATA
FVAL
LVAL

CMOS
Image
Sensor

DATA

CMOS
Sensor Data
Capture

PCLK
MCLK

SDAT

I2C Sensor

SCLK

Configuration

Bayer Color
Pattern Data
To
30-Bit RGB

DVI
Controller
And
Data Request

Multi-Port DDR2
Read & Write Controller

DVI

CLK

DATA
ADDR
CTRL

DDR2

Core
Board

Module

Figure 3.9. The block diagram of the digital camera design for DE4

Digital Camera Design Demonstration

4
Chapter

Chapter 4

Appendix

4.1

4.2

Revision History

Date
MAR, 24, 2008
AUG, 03, 2009

Change Log
Initial Version (Preliminary)

AUG, 10, 2010

D5M on DE4 and DE2-115 Board Added

revised

Always Visit TRDB_D5M Webpage for New Applications
We will be continuing providing interesting examples and labs on our TRDB_D5M
webpage. Please visit www.altera.com or d5m.terasic.com for more information.

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