DW40_CALPELLA_X 0118 1030 VOSTRO 3700

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5

4

3

2

1

D

D

Winery CALPELLA N11M-GE Schematics
Mobile Arrandale
Intel Ibex Peak-M
C

C

2010-01-18
REV : X-build
B

B

DY : Nopop Component
UMA : Pop when schematic is UMA
DIS : Pop when schematic is DIS

A

A



Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
Document Number
Custom

Cover Page

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet
1

1

of

91

5

4

D

2

1

CPU DC/DC

Winery CALPELLA Block Diagram

PCB LAYER
L1:
L2:
L3:
L4:
L5:
L6:

3

Top
VCC
Signal
Signal
GND
Bottom

Clock Generator
SLG8SP585

Project code
Part Number
PCB P/N
Revision

VRAM

91.4ES01.001
48.4ES11.0SB
09297
SA

Nvidia
N11M-GE(40nm)

DDRIII
1066

100MHz/
2.5Gbps

800/1066MHz
DDR III 1066 Channel B

PCIe x 16

800/1066MHz

Arrandale

LVDS
57

HDMI
RGB CRT

55

LCD

LVDS

54

TPS2231R

Slot 1

New Card

35

RTL8111DL

RGB CRT

Switchable74

LVDS

DMIx4
2.5 GT/s

CardReader

USB 2.0 x 1

480Mbps

Free fall sensor

SM Bus

OUTPUTS

+DC_IN
+PBATT

+PWR_SRC

40

CAMERA

USB 2.0 x 1

49

TPS51218

B

63

OUTPUTS

+PWR_SRC

VTT_CORE

73

TPM
(only for 15") 76

LPC Bus

33MHz

Digital Mic Array

USB 2.0 x 1

Bluetooth

73

Biometric

78

LDO

(On daughter board)
USB 2.0 x 1

24MHz

51

APL5930

20,21,22,23,24,25,26,27,28

INPUTS

OUTPUTS

+3.3V_ALW

+1.8V_RUN

KBC
SPI

30

SM Bus

NUVOTON
NPCE781BA0DX

SPI

SATA
3Gbps

SATA,USB

OP AMP

LDO

37

Flash ROM
256kB 62
USB,ESATA
Multi-Port x1

2CH SPEAKER

63

60

ODD
HDD59

Touch
PAD

68

Int.
KB

Thermal
& Fan
68

EMC2102

Flash ROM

4MB

INPUTS

OUTPUTS

+3.3V_ALW

+1.8V_RUN_GPU
A



Wistron Corporation

39,58

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

62

Capacity Board

http://laptop-motherboard-schematic.blogspot.com/

(On daughter board)

4

87

RT9025

A

5

INPUTS

INPUTS

400KHz

ACPI 1.1

IDT
92HD81

BQ24745

SYSTEM DC/DC
Right Side:
USB x 1

USB 2.0 x 1

LPC I/F

Azalia
CODEC

+VCC_GFX_CORE

76

PCI/PCI BRIDGE

(On daughter board)

Left Side:
USB x 2

USB 2.0 x 2

PCIE ports (8)

AZALIA

OUTPUTS

+PWR_SRC
64

Touch Panel
(only for 15")76

USB 2.0 x 1

USB 2.0

SATA ports (6)

(On daughter board)

INPUTS

CHARGER

High Definition Audio

480Mbps

HP OUT

Mini-Card

PCIE x 1

86

TPS51218

ETHERNET (10/100/1000Mb)
USB 2.0

C

65

WWAN/ WiMAX

14 USB 2.0/1.1 ports

MIC IN

Mini-Card

PCIE x 1

100MHz
2.5Gbps

Intel
PCH

+CPU_GFXCORE

61

802.11a/b/g/n

PCIE

OUTPUTS

+PWR_SRC

SYSTEM DC/DC

USB 2.0 x 1

FDI(UMA)
2.7 GT/s

53

ADP3211

(On daughter board)

LVDS

B

SYSTEM DC/DC
INPUTS

Switchable74

Realtek
RTS5138

+1.5V_SUS
+0.75V_DDR_VTT
+V_DDR_MCH_REF

+PWR_SRC

RJ45
CONN

50

OUTPUTS

19

10/100/1000LOM

PCIE x 1

RGB CRT

(8 in 1)SD/MMC
MS/MS Pro/xD

+15V_ALW
+3.3V_RTC_LDO
+5V_ALW
+3.3V_ALW

INPUTS

RGB CRT
8,9,10,11,12,13,14

D

OUTPUTS

TPS51116

Power SW

(On daughter board)

75

CRT

INPUTS

SYSTEM DC/DC

PCIE x 1 & USB 2.0 x 1

HDMI

46

TPS51125

18

80,81,82,83

HDMI

+VCC_CORE

SYSTEM DC/DC

Slot 0

DDRIII
1066

Bandwidth
:8GB

C

OUTPUTS

+PWR_SRC

7

Intel CPU

47,48

INPUTS

+PWR_SRC

DDRIII 1066 Channel A

VRAM(gDDR3)
64Mbx16x4 (512MB)484,85

:
:
:
:

ISL62883

3

2

Size
Document Number
Custom

Block Diagram

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet
1

2

of

91

5

4

3

2

1

D

D

TPS51116PWPRG4

+PWR_SRC

Adapter

50

ISL62883

ADP3211

TPS51218

47Ε48

AO4407A
45

TPS51218DSCR

53

86

49

+V_DDR_MCH_REF

+1.5V_SUS

+0.75V_DDR_VTT

Charger
BQ24745
+PBATT

Battery

+VCC_CORE

+CPU_GFXCORE

+VCC_GFX_CORE

For Intel GPU

For NVIDIA GPU

+1.05V_VTT

FDS8880
87

45

Arrandale

: 1.05V

FDS8880

+1.5V_RUN_GPU

87

TPS51125
46

+1.05V_GFX_PCIE

P2703

C

C

52

+5V_ALW

+5V_ALW2

AO4468

+3.3V_RTC_LDO

42

+5V_ALW

+1.5V_CPU

+3.3V_ALW

+15V_ALW

+1.5V_RUN

TPS2062AD
Daughter BD

+5V_USB0

For USB Port1

B

AO4468

TPS2062AD

42

+5V_RUN

TPS2062AD

63

+5V_USB1

For USB Port2,3

AO3403

63

+5V_USB2

TPS2231R
35

AO4468

+3.3V_LAN

+3.3V_CARDAUX

APL5930
42

Daughter BD

+3.3V_RUN

RT9025
51

+1.8V_RUN

FDS8880
87

TPS2231R
87

Daughter BD

+1.8V_RUN_GPU

+3.3V_RUN_GPU

+1.5V_CARD

For ESATA

B

RTL8111DL

G5285T11U
54

DVDD12

+LCDVDD

TPS2231R
Daughter BD

+3.3V_CARD

Power Shape
Regulator

LDO

Switch

A

A



Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Power Block Diagram

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
Document Number
Custom

Rev

Vostro Calpella

Date: Monday, January 18, 2010

Sheet
1

X01
3

of

91

5

4

3

+3.3V_RUN

Θ

Θ

+3.3V_RUN+3.3V_RUN

PCH

Θ

+3.3V_RUN
SRN2K2J-1-GP

SRN2K2J-1-GP

Θ

PCH
D

SMBCLK

SMB_CLK

SMBDATA

SMB_DATA

Θ
SRN2K2J-1-GP

SRN2K2J-1-GP

+3.3V_RUN

DIMM 1

Θ
Θ

Θ
Θ PCH_SMBDATA
PCH_SMBCLK

+3.3V_RUN
D

SCL

18

SDA

SMBus Address:A0

22
2N7002SPT

ΘPCH_SMBCLK
Θ PCH_SMBDATA

L_DDC_CLK
LDDC_CLK

L_DDC_CLK

Θ

B1

Θ

L_DDC_DATA

DIMM 2

VCC

B0

A

GND

S

Θ

NC7SB3157P6X-1GP

SCL
SDA

SRN2K2J-1-GP

19
LDDC_CLK_CON

SMBus Address:A2

Clock
Generator

Θ
Θ

PCH_SMBCLK
SMBCLK
PCH_SMBDATA SMBDATA

SMB_CLK

Θ PCH_SMBCLK
Θ PCH_SMBDATA

SMB_DATA

PCH_SMBCLK

Θ
Θ PCH_SMBDATA
C

PCH_SMBCLK
PCH_SMBDATA

Θ
Θ

LCD Conn.

54

07

SMB_CLK
SMB_DATA

64

L_DDC_DATA
LDDC_DATA

Θ

SMB_CLK
SMB_DATA

Θ

B1

VCC

B0

A

GND

S

NC7SB3157P6X-1GP

CRT_DDC_CLK
CRT_DDC_DATA

Minicard
WWAN

76

Θ
Θ

+3.3V_RUN

Minicard
WLAN

SMB_CLK

SMB_DATA

LDDC_DATA_CON

SMBus address:D2

Express
Card

1

Switchable Graphic SMBus Block Diagram

PCH SMBus Block Diagram
+3.3V_ALW

2

+3.3V_RUN

+3.3V_RUN

Θ

+3.3V_RUN

Θ

Θ

65

SRN2K2J-1-GP
SRN2K2J-1-GP

Free fall
sensor
SCL/SPC
SDA/SDI/SDO

+3.3V_RUN

DY

+5V_CRT_RUN
C

GMCH_DDCCLK
CRT_CLK_DDC

40

Θ

B1

Θ

Θ

VCC

B0

A

GND

S

DDC_CLK_CON2

Θ

+3.3V_RUN_GPU
SRN2K2J-1-GP

NC7SB3157P6X-1GP

Θ

SDVO_CTRLCLK
SDVO_CTRLDATA

DDC_CLK_CON

Θ
Θ

CRT CONN
55

KBC SMBus Block Diagram

N11M-GE

+5V_RUN

2N7002DW-1-GP
+3.3V_RUN

I2CC_SCL
I2CC_SDA

GMCH_DDCDATA
CRT_DAT_DDC

Θ

Θ

Θ

B1

VCC

B0

A

GND

S

DDC_DATA_CON2

DDC_DATA_CON

Θ

NC7SB3157P6X-1GP

TouchPad Conn.

SRN10KJ-5-GP

PSDAT1
B

PSCLK1

Θ
Θ

TPDATA
TPCLK

TPDATA
TPCLK

+3.3V_RUN

TPDATA

Θ

68

TPCLK

I2CA_SCL
I2CA_SDA

+3.3V_RTC_LDO

+3.3V_RUN

+3.3V_RUN

Θ

Θ
SRN2K2J-1-GP

SRN2K2J-1-GP

B

SRN2K2J-1-GP
+3.3V_RUN

DY

+5V_RUN

BQ24745

Θ

SCL
SDA

SDVO_CLK
HDMI_SCLK_DDC

45

Θ

SMBus address:12
SRN4K7J-8-GP

B1

Θ B0
GND

VCC
A

HDMI_SCLK_CON_L

Θ

+3.3V_RUN

S

SRN2K2J-1-GP
NC7SB3157P6X-1GP

Battery Conn.
SCL1

BAT_SCL

SDA1

BAT_SDA

Θ
Θ

Θ
Θ

PBAT_SMBCLK1
PBAT_SMBDAT1

Θ

CLK_SMB

HDMI_SCLK_CON

Θ
Θ

44

DAT_SMB

SMBus address:16

SRN100J-3-GP

HDMI
55

2N7002DW-1-GP

KBC

+3.3V_RUN

Θ

NPCE781

+3.3V_RTC_LDO

Θ

Θ

SDVO_DAT

SRN4K7J-8-GP
+3.3V_RUN

SRN4K7J-8-GP

Θ
Θ
KBC_SCL1

GPIO74/SDA2

KBC_SDA1

Θ
Θ

Θ
Θ

HDMI_SDATA_DDC

IFPC_AUX_I2CW_SDA#

Thermal

B1

Θ

VCC

B0

A

GND

S

HDMI_SDATA_CON_L

Θ

NC7SB3157P6X-1GP

A

GPIO73/SCL2

HDMI_SDATA_CON

IFPC_AUX_I2CW_SCL

+3.3V_RUN

THERM_SCL

SMCLK

THERM_SDA

SMDATA

39

A

SMBus address:7A


2N7002DW-1-GP

Capacity
Board

THERM_SCL
THERM_SDA

SCL
SDA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

(On daughter board)

Title

SMBus address:0A

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
C
Date:

SMBUS Block Diagram

Document Number

Rev

X01

Vostro Calpella
Sheet

Monday, January 18, 2010
1

4

of

91

A

B

C

Thermal Block Diagram

D

E

Audio Block Diagram

1

1

0R3-0-U-GP

DP1

SPKR_PORT_D_L+

AUD_SPK_L1

AUD_SPK_L1_R

SPKR_PORT_D_L-

AUD_SPK_L2

AUD_SPK_L2_R

SPKR_PORT_D_R-

AUD_SPK_R2

AUD_SPK_R2_R

SPKR_PORT_D_R+

AUD_SPK_R1

SPEAKER

AUD_SPK_R1_R
0R3-0-U-V-GP

EMC2102_DN1

44

MMBT3904-3-GP
SC470P50V3JN-2GP
2

DN1

2

EMC2102_DP1

WWAN

Thermal
EMC2102
DP2

VGA_THERMDA

DPLUS

VGA_THERMDC

AUD_HP1_JACK_L

HP1_PORT_B_R

AUD_HP1_JACK_R

HP
OUT

Codec
92HD81

50

GPU

SC470P50V3JN-2GP
DN2

HP1_PORT_B_L

DMINUS

54
HP0_PORT_A_L

AUD_EXT_MIC_L

HP0_PORT_A_R

AUD_EXT_MIC_R

VREFOUT_A_OR_F

AUD_VREFOUT_B

MIC
IN

MMBT3904-3-GP
SC470P50V3JN-2GP

50
3

3

HW T8 sensor
DP3

CPU_THERMDA

33R2J-2-GP
DMIC_CLK/GPIO1

AUD_DMIC_CLK

AUD_DMIC_CLK_G_R

MMBT3904-3-GP
DMIC0/GPIO2

SC470P50V3JN-2GP
DN3

CPU_THERMDC

AUD_DMIC_IN0
33R2J-2-GP

AUD_DMIC_IN0_R

HW T8 sensor
( CPU )

28

Digital
MIC
Array
47

22

4

4



Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Thermal/Audio Block Diagram

A

http://laptop-motherboard-schematic.blogspot.com/
B

C

D

Size
Document Number
Custom

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet
E

5

of

91

A

B

E
Calpella Schematic Checklist Rev.0_7

Calpella Schematic Checklist Rev.0_7
Schematics Notes

Pin Name

Strap Description

Configuration (Default value for each bit is
1 unless specified otherwise)

Default
Value

1: Disabled - No Physical Display Port attached to
Embedded DisplayPort.
0: Enabled - An external Display Port device is
connected to the Embedded Display Port.
1: Normal Operation.
0: Lane Numbers Reversed 15 -> 0, 14 -> 1, ...

1

SPKR

Reboot option at power-up
Default Mode: Internal weak Pull-down.
No Reboot Mode with TCO Disabled: Connect to Vcc3_3 with 8.2-kȍ
- 10-kȍ weak pull-up resistor.

CFG[4]

Embedded
DisplayPort
Presence

INIT3_3V#

Weak internal pull-down. Do not pull high.

CFG[3]

GNT3#/
GPIO55

Default Mode: Internal pull-up.
Low (0) = Top Block Swap ModeNote: Connect to ground with 4.7-k?
weak pull-down resistor. CRB uses a 1 k
do not stuff resistor.

PCI-Express Static
Lane Reversal

CFG[0]

1

High (1) = Integrated VRM is enabled
Low (0) = Integrated VRM is disabled
Default (SPI): Left both GNT0# and GNT1# floating. No pull up
required.
Boot from PCI: Connect GNT1# to ground with 1-kȍ pull-down
resistor. Leave GNT0# Floating.
Boot from LPC: Connect both GNT0# and GNT1# to ground with 1-kȍ
pull-down resistor.
Default - Internal pull-up.
Low (0)= Configures DMI for ESI compatible operation (for servers
only. Not for mobile/desktops).

PCI-Express
Configuration
Select

1: Single PCI-Express Graphics
0: Bifurcation enabled

INTVRMEN

CFG[7]

Reserved Temporarily used
for early
Clarksfield
samples.

Clarksfield (only for early samples pre-ES1) Connect to GND with 3.01K Ohm/5% resistor
Note: Only temporary for early CFD samples
(rPGA/BGA) [For details please refer to the WW33
MoW and sighting report].
For a common motherboard design (for AUB and CFD),
the pull-down resistor should be used. Does not
impact AUB functionality.

0

4

GNT0#,
GNT1#/GPIO51

GNT2#/
GPIO53

3

D

Processor Strapping

PCH Strapping
Name

C

GPIO33

Default: Do not pull low.
Disable ME in Manufacturing Mode: Connect to ground with 1-kȍ
pull-down resistor.

SPI_MOSI

Enable iTPM: Connect to Vcc3_3 with 8.2-kȍ weak pull-up resistor.
Disable iTPM: Left floating, no pull-down required.
Enable Danbury: Connect to Vcc3_3 with 8.2-kȍ weak pull-up
resistor.
Disable Danbury: Connect to ground with 4.7-kȍ weak pull-down
resistor.

NV_ALE

NC_CLE

Weak internal pull-up. Do not pull low.

HAD_DOCK_EN#
/GPIO[33]
HDA_SDO

Low (0): Flash Descriptor Security will be overridden.
High (1) : Flash Descriptor Security will be in effect.
Weak internal pull-down. Do not pull high.

HDA_SYNC

Weak internal pull-down. Do not pull high.

GPIO15

Weak internal pull-down. Do not pull high.

GPIO8

Weak internal pull-up. Do not pull low.

GPIO27

Default = Do not connect (floating)
High(1) = Enables the internal VccVRM to have a clean supply for
analog rails. No need to use on-board filter circuit.
Low (0) = Disables the VccVRM. Need to use on-board filter
circuits for analog rails.

4
1

3

2

2

PCIE Routing
LANE1

Card reader

LANE2

MiniCard WLAN

LANE3

LAN

LANE4

MiniCard WWAN

LANE5

New Card

1

1



Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

http://laptop-motherboard-schematic.blogspot.com/

Size
Document Number
Custom

Table of Content

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet

6

of

91

5

4

3

2

1

D

D

DW

DW

12/08 Item 5

12/08 Item 5

+1.05V_RUN_SL585_IO

1

1
2

2

CPU_0#
CPU_0

XTAL_IN
XTAL_OUT

28
27

TP_CPU_1#
TP_CPU_1

19
20

CPU_1#
CPU_1

SDA
SCL

31
32

VSS_SATA

D

S

Q701
2N7002A-7-GP

CLK_XTAL_IN

B

X701

1

X-14D31818M-37GP
C714
SC12P50V2JN-3GP

2

1st Silego 71.08585.003
2nd ICS
71.93197.003

CLK_XTAL_OUT

2
1

1

2

VSS_27

CK_PWRGD

EC701
SC4D7P50V2CN-1GP

PCH_SMBDATA [18,19,23,40,64,65]
PCH_SMBCLK [18,19,23,40,64,65]

9

8

VSS_DOT
2

VSS_SRC
12

VSS_REF

GND

VSS_CPU
21

26

DY

CLK_XTAL_IN
CLK_XTAL_OUT

R705
10KR2J-3-GP

CLK_PCH_14M [23]

1

22
23

CLK_VGA_27M [81]

2

CLK_CPU_BCLK#
CLK_CPU_BCLK

1 33R2J-2-GP
1 33R2J-2-GP

G

1 33R2J-2-GP

[23] CLK_CPU_BCLK#
[23] CLK_CPU_BCLK

VR_CLKEN# [47]

2

R703 2

DY
DY

1

18

1

5

15
VDD_SRC_IO

VDD_CPU_IO

+3.3V_RUN
1 2K2R2J-2-GP

SRC_1/SATA#
SRC_1/SATA

33

+3.3V_RUN_SL585

R701 2

11
10

SLG8SP585VTR-GP

Mount

Mount DY

CPU_STOP#
CK_PWRGD
FSC

CLK_PCIE_SATA#
CLK_PCIE_SATA

B

DY

NON-SS

16
25
30

[23] CLK_PCIE_SATA#
[23] CLK_PCIE_SATA

1
1

SS

R706 2
R710 2

SRC_2#
SRC_2

CPU_STOP#
CKPWRGD/PD#
REF_0/CPU_SEL

R710

CLK_27M
CLK_27M_SS

14
13

27MHZ
27MHZ_SS

R706

6
7

CLKIN_DMI#
CLKIN_DMI

TP701
TP702

C712
SCD1U10V2KX-4GP

C

DOT_96#
DOT_96

TPAD14-GP
TPAD14-GP

C711
SCD1U10V2KX-4GP

VGA 27M

4
3

[23] CLKIN_DMI#
[23] CLKIN_DMI

C710

DY SC10U6D3V3MX-GP

2

C709

DYSC1U10V2KX-1GP

+1.05V_RUN_SL585_IO

VDD_27

29
VDD_REF

VDD_DOT

VDD_CPU

U701

DREFCLK#
DREFCLK

1

1

1
+3.3V_RUN_SL585

VDD_SRC

C705
SCD1U10V2KX-4GP

C

DREFCLK#
DREFCLK

2

C707
SCD1U10V2KX-4GP

17

C703
SCD1U10V2KX-4GP

2

1
2

1

C704
SCD1U10V2KX-4GP

C708
SCD1U10V2KX-4GP

24

C702
SC10U10V5ZY-1GP

2

1
2

2

C701
SC1U10V2KX-1GP

1

1

1

DY

2

DY

[23]
[23]

+1.05V_VTT

2

1

1

R709
0R0603-PAD-1-GP

+3.3V_RUN_SL585

2

R708
0R0603-PAD-1-GP

2

+3.3V_RUN

C715
SC15P50V2JN-2-GP

2

+1.05V_VTT

FSC

0

1

DY
2 1

R704
4K7R2J-2-GP

133MHz

FSC

SPEED

100MHz
(Default)

1

R707
10KR2J-3-GP



A

A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Clock Generator SLG8SP585

Document Number

Rev

Vostro Calpella
Date: Monday, January 18, 2010

Sheet
1

7

X01
of

91

5

4

3

2

1

D

D
1 OF 9

A24
C23
B22
A21

DMI_RX#0
DMI_RX#1
DMI_RX#2
DMI_RX#3

[22]
[22]
[22]
[22]

DMI_PTX_CRXP0
DMI_PTX_CRXP1
DMI_PTX_CRXP2
DMI_PTX_CRXP3

B24
D23
B23
A22

DMI_RX0
DMI_RX1
DMI_RX2
DMI_RX3

[22]
[22]
[22]
[22]

DMI_CTX_PRXN0
DMI_CTX_PRXN1
DMI_CTX_PRXN2
DMI_CTX_PRXN3

D24
G24
F23
H23

DMI_TX#0
DMI_TX#1
DMI_TX#2
DMI_TX#3

[22]
[22]
[22]
[22]

DMI_CTX_PRXP0
DMI_CTX_PRXP1
DMI_CTX_PRXP2
DMI_CTX_PRXP3

D25
F24
E23
G23

DMI_TX0
DMI_TX1
DMI_TX2
DMI_TX3

FDI_TXN0
FDI_TXN1
FDI_TXN2
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXN7

FDI_TXN0
FDI_TXN1
FDI_TXN2
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXN7

E22
D21
D19
D18
G21
E19
F21
G18

FDI_TX#0
FDI_TX#1
FDI_TX#2
FDI_TX#3
FDI_TX#4
FDI_TX#5
FDI_TX#6
FDI_TX#7

[22]
[22]
[22]
[22]
[22]
[22]
[22]
[22]

FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP3
FDI_TXP4
FDI_TXP5
FDI_TXP6
FDI_TXP7

FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP3
FDI_TXP4
FDI_TXP5
FDI_TXP6
FDI_TXP7

D22
C21
D20
C18
G22
E20
F20
G19

FDI_TX0
FDI_TX1
FDI_TX2
FDI_TX3
FDI_TX4
FDI_TX5
FDI_TX6
FDI_TX7

[22]
[22]

FDI_FSYNC0
FDI_FSYNC1

F17
E17

FDI_FSYNC0
FDI_FSYNC1

[22]

FDI_INT

C17

FDI_INT

[22]
[22]

FDI_LSYNC0
FDI_LSYNC1

F18
D17

FDI_LSYNC0
FDI_LSYNC1

B

Page 89

Calpella Platform Design Guide
Revision 1.6

CLARKUNF

2.4 Arrandale Graphics Disable Guideline
It applies to Arrandale and Clarksfield discrete graphic designs.

A

FDI_TX[7:0] and FDI_TX#[7:0] can be left floating on the Arrandale. The GFX_IMON,
FDI_FSYNC[0], FDI_FSYNC[1], FDI_LSYNC[0], FDI_LSYNC[1], and FDI_INT signals on
the Arrandale side should be tied to GND (through 1-kȍ ±5% resistors).

B26
A26
B27
A25

PEG_IRCOMP_R

PEG_RX#0
PEG_RX#1
PEG_RX#2
PEG_RX#3
PEG_RX#4
PEG_RX#5
PEG_RX#6
PEG_RX#7
PEG_RX#8
PEG_RX#9
PEG_RX#10
PEG_RX#11
PEG_RX#12
PEG_RX#13
PEG_RX#14
PEG_RX#15

K35
J34
J33
G35
G32
F34
F31
D35
E33
C33
D32
B32
C31
B28
B30
A31

PCIE_MRX_GTX_N15
PCIE_MRX_GTX_N14
PCIE_MRX_GTX_N13
PCIE_MRX_GTX_N12
PCIE_MRX_GTX_N11
PCIE_MRX_GTX_N10
PCIE_MRX_GTX_N9
PCIE_MRX_GTX_N8
PCIE_MRX_GTX_N7
PCIE_MRX_GTX_N6
PCIE_MRX_GTX_N5
PCIE_MRX_GTX_N4
PCIE_MRX_GTX_N3
PCIE_MRX_GTX_N2
PCIE_MRX_GTX_N1
PCIE_MRX_GTX_N0

PEG_RX0
PEG_RX1
PEG_RX2
PEG_RX3
PEG_RX4
PEG_RX5
PEG_RX6
PEG_RX7
PEG_RX8
PEG_RX9
PEG_RX10
PEG_RX11
PEG_RX12
PEG_RX13
PEG_RX14
PEG_RX15

J35
H34
H33
F35
G33
E34
F32
D34
F33
B33
D31
A32
C30
A28
B29
A30

PCIE_MRX_GTX_P15
PCIE_MRX_GTX_P14
PCIE_MRX_GTX_P13
PCIE_MRX_GTX_P12
PCIE_MRX_GTX_P11
PCIE_MRX_GTX_P10
PCIE_MRX_GTX_P9
PCIE_MRX_GTX_P8
PCIE_MRX_GTX_P7
PCIE_MRX_GTX_P6
PCIE_MRX_GTX_P5
PCIE_MRX_GTX_P4
PCIE_MRX_GTX_P3
PCIE_MRX_GTX_P2
PCIE_MRX_GTX_P1
PCIE_MRX_GTX_P0

PEG_TX#0
PEG_TX#1
PEG_TX#2
PEG_TX#3
PEG_TX#4
PEG_TX#5
PEG_TX#6
PEG_TX#7
PEG_TX#8
PEG_TX#9
PEG_TX#10
PEG_TX#11
PEG_TX#12
PEG_TX#13
PEG_TX#14
PEG_TX#15

L33
M35
M33
M30
L31
K32
M29
J31
K29
H30
H29
F29
E28
D29
D27
C26

PCIE_MTX_GRX_C_N15
PCIE_MTX_GRX_C_N14
PCIE_MTX_GRX_C_N13
PCIE_MTX_GRX_C_N12
PCIE_MTX_GRX_C_N11
PCIE_MTX_GRX_C_N10
PCIE_MTX_GRX_C_N9
PCIE_MTX_GRX_C_N8
PCIE_MTX_GRX_C_N7
PCIE_MTX_GRX_C_N6
PCIE_MTX_GRX_C_N5
PCIE_MTX_GRX_C_N4
PCIE_MTX_GRX_C_N3
PCIE_MTX_GRX_C_N2
PCIE_MTX_GRX_C_N1
PCIE_MTX_GRX_C_N0

C829
C827
C832
C812
C803
C811
C828
C810
C823
C804
C831
C825
C821
C813
C806
C816

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

DIS2
DIS2
DIS2
DIS2
DIS2
DIS2
DIS2
DIS2
DIS2
DIS2
DIS2
DIS2
DIS2
DIS2
DIS2
DIS2

SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP

PCIE_MTX_GRX_N15
PCIE_MTX_GRX_N14
PCIE_MTX_GRX_N13
PCIE_MTX_GRX_N12
PCIE_MTX_GRX_N11
PCIE_MTX_GRX_N10
PCIE_MTX_GRX_N9
PCIE_MTX_GRX_N8
PCIE_MTX_GRX_N7
PCIE_MTX_GRX_N6
PCIE_MTX_GRX_N5
PCIE_MTX_GRX_N4
PCIE_MTX_GRX_N3
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_N0

PEG_TX0
PEG_TX1
PEG_TX2
PEG_TX3
PEG_TX4
PEG_TX5
PEG_TX6
PEG_TX7
PEG_TX8
PEG_TX9
PEG_TX10
PEG_TX11
PEG_TX12
PEG_TX13
PEG_TX14
PEG_TX15

L34
M34
M32
L30
M31
K31
M28
H31
K28
G30
G29
F28
E27
D28
C27
C25

PCIE_MTX_GRX_C_P15
PCIE_MTX_GRX_C_P14
PCIE_MTX_GRX_C_P13
PCIE_MTX_GRX_C_P12
PCIE_MTX_GRX_C_P11
PCIE_MTX_GRX_C_P10
PCIE_MTX_GRX_C_P9
PCIE_MTX_GRX_C_P8
PCIE_MTX_GRX_C_P7
PCIE_MTX_GRX_C_P6
PCIE_MTX_GRX_C_P5
PCIE_MTX_GRX_C_P4
PCIE_MTX_GRX_C_P3
PCIE_MTX_GRX_C_P2
PCIE_MTX_GRX_C_P1
PCIE_MTX_GRX_C_P0

C826
C822
C818
C815
C808
C802
C820
C805
C817
C801
C814
C824
C830
C809
C807
C819

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

DIS2
DIS2
DIS2
DIS2
DIS2
DIS2
DIS2
DIS2
DIS2
DIS2
DIS2
DIS2
DIS2
DIS2
DIS2
DIS2

SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP

PCIE_MTX_GRX_P15
PCIE_MTX_GRX_P14
PCIE_MTX_GRX_P13
PCIE_MTX_GRX_P12
PCIE_MTX_GRX_P11
PCIE_MTX_GRX_P10
PCIE_MTX_GRX_P9
PCIE_MTX_GRX_P8
PCIE_MTX_GRX_P7
PCIE_MTX_GRX_P6
PCIE_MTX_GRX_P5
PCIE_MTX_GRX_P4
PCIE_MTX_GRX_P3
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_P0

Intel(R) FDI

[22]
[22]
[22]
[22]
[22]
[22]
[22]
[22]

PCI EXPRESS -- GRAPHICS

DMI_PTX_CRXN0
DMI_PTX_CRXN1
DMI_PTX_CRXN2
DMI_PTX_CRXN3

PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RBIAS

DMI

C

[22]
[22]
[22]
[22]

CLARKSFIELD

CPU1A

R801 1
R802 1

2 49D9R2F-GP
2 750R2F-GP

EXP_RBIAS
PCIE_MRX_GTX_N[0..15]

PCIE_MRX_GTX_P[0..15]

PCIE_MRX_GTX_N[0..15] [80]

PCIE_MRX_GTX_P[0..15] [80]

C

PCIE_MTX_GRX_N[0..15]

PCIE_MTX_GRX_N[0..15] [80]

B
PCIE_MTX_GRX_P[0..15]

PCIE_MTX_GRX_P[0..15] [80]

Reversal
1.PCI-Express Static Lane Reversal
(15 -> 0, 14 -> 1, ...)


A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

http://laptop-motherboard-schematic.blogspot.com/

Size

CPU (PCIE/DMI/FDI)

Document Number

Rev

Vostro Calpella
Date: Monday, January 18, 2010

Sheet

8

X01
of

91

4

3

2
DPLL_REF_SSCLK#_R1
DPLL_REF_SSCLK_R 2

Processor Compensation Signals

R905
R906

R904 1

DY 2

68R2-GP

1

2

1

2

COMP2

H_COMP1

G16

COMP1

H_COMP0

AT26

COMP0

20R2F-GP
49D9R2F-GP
49D9R2F-GP

H_CPURST#
TPAD14-GP

TP901

SKTOCC#_R

1

AH24

H_CATERR#

R936
0R2J-2-GP
1

DY

[47] H_PROCHOT#

H_PROCHOT_R#

2

DY

PLT_RST#

H_CPURST#

2

[22] H_PM_SYNC

DW
12/08 Item 5

R908
0R0402-PAD

C

AT15

PECI

AN26

VCCPWRGOOD

AP26

PROCHOT#

THERMTRIP#

RESET_OBS#

AL15

PM_SYNC

AN14

VCCPWRGOOD_1

AN27

VCCPWRGOOD_0

[22] PM_DRAM_PWRGD

PM_DRAM_PWRGD AK13

SM_DRAMPWROK

[49] H_VTTPWRGD

AM15

VTTPWRGOOD

AM26

TAPPWRGOOD

1

[25,42] H_PWRGOOD

R913
1K6R2F-GP
1
2

PLT_RST#

PLT_RST#_R

AL14

A16
B16

BCLK_ITP
BCLK_ITP#

AR30
AT30

PEG_CLK
PEG_CLK#

E16
D16

DPLL_REF_SSCLK
DPLL_REF_SSCLK#

A18
A17

BCLK_CPU_P [25]
BCLK_CPU_N [25]

R915
750R2F-GP

+1.5V_RUN
1

S3 circuit

S
SM_DRAMRST#
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2

F6
AL1
AM1
AN1

+1.05V_VTT

SM_DRAMRST#
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2

4
3

PRDY#
PREQ#

AT28
AP27

TCK
TMS
TRST#

AN28
AP28
AT27

XDP_TRST#

TDI
TDO
TDI_M
TDO_M

AT29
AR27
AR29
AP29

XDP_TDO_R
XDP_TDI_M
XDP_TDO_M

DBR#

AN25

XDP_DBRESET#

BPM#0
BPM#1
BPM#2
BPM#3
BPM#4
BPM#5
BPM#6
BPM#7

AJ22
AK22
AK24
AJ24
AJ25
AH22
AK23
AH23

Normal

DDR3_DRAMRST# [18,19]

Q901
BSS138-7-F-GP

1
2
SRN10KJ-5-GP

AN15
AP15

D

Vgs(th)<=1.5V

RN905

PM_EXT_TS#0
PM_EXT_TS#1

D

DY

1
2
R935
0R2J-2-GP

PM_EXTTS#0 [18]
PM_EXTTS#1 [19]

SM_DRAMRST#

1

0611

2

R988
100KR2J-1-GP

DDR3 Compensation Signals
SM_RCOMP_0

R907 1

2 100R2F-L1-GP-U

SM_RCOMP_1

R910 1

2 24D9R2F-L-GP

SM_RCOMP_2

R911 1

2 130R2F-1-GP

DW
10/26 Item 31

C

Calpella Platform S3 Power Reduction Platform
S3 Power Reduction CRB Implementation
Design Details
Revision 0.1

XDP_DBRESET# [22,25]

+3.3V_ALW

R2114 1

2 10KR2J-3-GP

U927

RSTIN#
[25,37,49,50]

CLARKUNF

VTT_PWRGD

U927_B 1

B

2

A

VCC

5

Y

4

VTT_PWRGD_R3 2

R977
1K6R2F-GP
1

PM_DRAM_PWRGD

2

GND
74LVC1G08GW-1-GP

1.1k
0.75k
No Stuff
1.27k
3k

2

DY

R919
1K1R2F-GP

R920

+1.5V_SUS

R934
1KR2J-1-GP

DPLL_REF_SSCLK_R
DPLL_REF_SSCLK#_R

3

R919

C915
SCD047U16V2ZY-1GP

CLK_EXP_P [23]
CLK_EXP_N [23]

1

[21,37,64,65,70,76,77,80]

2

PWR MANAGEMENT

[21,37,64,65,70,76,77,80]

CATERR#

AK15

[25,37,42] H_THRMTRIP#

R931
1KR2J-1-GP
1

AK14

THERMAL

[25] H_PECI

SKTOCC#

DDR_RST_GATE [25]

SRN1KJ-7-GP
BCLK
BCLK#

1

R903

AT24

2

H_PROCHOT_R#

H_COMP2

1

2 68R2-GP

2

COMP3

4
3

2

R933 1

1

AT23

CLOCKS

H_CATERR#

H_COMP3
20R2F-GP

DDR3
MISC

2 49D9R2F-GP

2

JTAG & BPM

R902 1

1

MISC

R901

D

2 OF 9

CPU1B

Processor Pullups

CLARKSFIELD

+1.05V_VTT

1

RN907

G

5

+1.05V_VTT

XDP_TRST#
1

2

XDP_TDI_M

B

R923
51R2J-2-GP

R928
51R2J-2-GP
2

R924
0R0402-PAD
2

R920
750R2F-GP

1

1

XDP_TDO_M

2

B

1

PM_DRAM_PWRGD

DW
12/08 Item 5

XDP_TDO_R

Scan Chain
(Default)



A

A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Size

CPU (THERMAL/CLOCK/PM )

Document Number

Rev

Vostro Calpella
Date: Monday, January 18, 2010

5

4

3

2

http://laptop-motherboard-schematic.blogspot.com/

Sheet

1

9

of

X01
91

5

4

3

2

1

4 OF 9

CPU1D
3 OF 9

C

B

[18]
[18]
[18]

[18]
[18]
[18]

M_A_BS0
M_A_BS1
M_A_BS2

AC3
AB2
U7

M_A_CAS#
M_A_RAS#
M_A_WE#

AE1
AB3
AE9

SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63

SA_CK1
SA_CK#1
SA_CKE1

M_CLK_DDR1 [18]
M_CLK_DDR#1 [18]
M_CKE1 [18]

SA_CS#0
SA_CS#1

AE2
AE8

M_CS0# [18]
M_CS1# [18]

SA_ODT0
SA_ODT1

AD8
AF9

M_ODT0 [18]
M_ODT1 [18]

B9
D7
H7
M7
AG6
AM7
AN10
AN13

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

M_CLK_DDR0 [18]
M_CLK_DDR#0 [18]
M_CKE0 [18]

Y6
Y5
P6

SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7

M_B_DQ[63..0]

[19] M_B_DQ[63..0]

AA6
AA7
P7

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

M_A_DM[7..0] [18]
M_A_DQS#[7..0] [18]
M_A_DQS[7..0] [18]

SA_BS0
SA_BS1
SA_BS2

SA_CAS#
SA_RAS#
SA_WE#

SA_DQS#0
SA_DQS#1
SA_DQS#2
SA_DQS#3
SA_DQS#4
SA_DQS#5
SA_DQS#6
SA_DQS#7

C9
F8
J9
N9
AH7
AK9
AP11
AT13

M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7

C8
F9
H9
M9
AH8
AK10
AN11
AR13

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7

SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
SA_MA14
SA_MA15

Y3
W1
AA8
AA3
V1
AA9
V8
T1
Y9
U6
AD4
T2
U3
AG8
T3
V9

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

M_A_A[15..0] [18]

B5
A5
C3
B3
E4
A6
A4
C4
D1
D2
F2
F1
C2
F5
F3
G4
H6
G2
J6
J3
G1
G5
J2
J1
J5
K2
L3
M1
K5
K4
M4
N5
AF3
AG1
AJ3
AK1
AG4
AG3
AJ4
AH4
AK3
AK4
AM6
AN2
AK5
AK2
AM4
AM3
AP3
AN5
AT4
AN6
AN4
AN3
AT5
AT6
AN7
AP6
AP8
AT9
AT7
AP9
AR10
AT10

CLARKSFIELD

A10
C10
C7
A7
B10
D10
E10
A8
D8
F10
E6
F7
E9
B7
E7
C6
H10
G8
K7
J8
G7
G10
J7
J10
L7
M6
M8
L9
L6
K8
N8
P9
AH5
AF5
AK6
AK7
AF6
AG5
AJ7
AJ6
AJ10
AJ9
AL10
AK12
AK8
AL7
AK11
AL8
AN8
AM10
AR11
AL11
AM9
AN9
AT11
AP12
AM12
AN12
AM13
AT14
AT12
AL13
AR14
AP14

CLARKSFIELD

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

DDR SYSTEM MEMORY A

M_A_DQ[63..0]

[18] M_A_DQ[63..0]
D

SA_CK0
SA_CK#0
SA_CKE0

SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63

[19]
[19]
[19]

M_B_BS0
M_B_BS1
M_B_BS2

AB1
W5
R7

SB_BS0
SB_BS1
SB_BS2

[19]
[19]
[19]

M_B_CAS#
M_B_RAS#
M_B_WE#

AC5
Y7
AC6

SB_CAS#
SB_RAS#
SB_WE#

SB_CK0
SB_CK#0
SB_CKE0

W8
W9
M3

M_CLK_DDR2 [19]
M_CLK_DDR#2 [19]
M_CKE2 [19]

SB_CK1
SB_CK#1
SB_CKE1

V7
V6
M2

M_CLK_DDR3 [19]
M_CLK_DDR#3 [19]
M_CKE3 [19]

SB_CS#0
SB_CS#1

AB8
AD6

M_CS2# [19]
M_CS3# [19]

SB_ODT0
SB_ODT1

AC7
AD1

M_ODT2 [19]
M_ODT3 [19]

SB_DM0
SB_DM1
SB_DM2
SB_DM3
SB_DM4
SB_DM5
SB_DM6
SB_DM7

D4
E1
H3
K1
AH1
AL2
AR4
AT8

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

SB_DQS#0
SB_DQS#1
SB_DQS#2
SB_DQS#3
SB_DQS#4
SB_DQS#5
SB_DQS#6
SB_DQS#7

D5
F4
J4
L4
AH2
AL4
AR5
AR8

M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7

C5
E3
H4
M5
AG2
AL5
AP5
AR7

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7

SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
SB_MA14
SB_MA15

U5
V2
T5
V3
R1
T8
R2
R6
R4
R5
AB5
P3
R3
AF7
P5
N1

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

D

M_B_DM[7..0] [19]
M_B_DQS#[7..0] [19]
M_B_DQS[7..0] [19]

DDR SYSTEM MEMORY - B

CPU1C

M_B_A[15..0] [19]

C

B

CLARKUNF
CLARKUNF

A



A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Document Number

CPU (DDR)

Rev

Vostro Calpella
Date: Monday, January 18, 2010

Sheet
1

10

X01
of

91

5

4

3

2

1

5 OF 9

CPU1E

1

CFG0

1
1

SA_DIMM_VREF#
SB_DIMM_VREF#

1:Single PEG
0:Bifurcation enabled

2

DY

TP1116
TP1117

PCI-Express Configuration Select
R1101
3KR2F-GP

CFG0

DIS‫ޏ‬
‫ޏ‬5%
CFG3
CFG4

CFG3

1

CFG3 - PCI-Express Static Lane Reversal
CFG7

R1102
3KR2F-GP

CFG3
2

C

1 :Normal Operation
0 :Lane Numbers Reversed
15 -> 0, 14 -> 1, ...

RSVD#AP25
RSVD#AL25
RSVD#AL24
RSVD#AL22
RSVD#AJ33
RSVD#AG9
RSVD#M27
RSVD#L28
SA_DIMM_VREF
SB_DIMM_VREF
RSVD#G25
RSVD#G17
RSVD#E31
RSVD#E30

AM30
AM28
AP31
AL32
AL30
AM31
AN29
AM32
AK32
AK31
AK28
AJ28
AN30
AN32
AJ32
AJ29
AJ30
AK30
H16

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
RSVD_TP_86

CFG4

1

CFG4 - Display Port Presence
CFG4

2

DY

R1103
3KR2F-GP

1:Disabled; No Physical Display Port
attached to Embedded Display Port
0:Enabled; An external Display Port
device is connected to the Embedded
Display Port

B19
A19

RSVD#B19
RSVD#A19

A20
B20

RSVD#A20
RSVD#B20

U9
T9

RSVD#U9
RSVD#T9

AC9
AB9

RESERVED

CFG0

AP25
AL25
AL24
AL22
AJ33
AG9
M27
L28
J17
H17
G25
G17
E31
E30

CLARKSFIELD

D

RSVD#AJ13
RSVD#AJ12

AJ13
AJ12

RSVD#AH25
RSVD#AK26

AH25
AK26

RSVD#AL26
RSVD_NCTF_37

AL26
AR2

RSVD#AJ26
RSVD#AJ27

AJ26
AJ27

RSVD#AL28
RSVD#AL29
RSVD#AP30
RSVD#AP32
RSVD#AL27
RSVD#AT31
RSVD#AT32
RSVD#AP33
RSVD#AR33

AL28
AL29
AP30
AP32
AL27
AT31
AT32
AP33
AR33

RSVD#AR32

AR32

RSVD_TP#E15
RSVD_TP#F15
KEY
RSVD#D15
RSVD#C15
RSVD#AJ15
RSVD#AH15

E15
F15
A2
D15
C15
AJ15
AH15

C

RSVD#AC9
RSVD#AB9

Calpella Platform Design Guide
Revision 1.6
4.8.3.1

LVDS Switching

J29
J28

B

Switchable GFX, just like integrated GFX only, to enable LVDS it is required that the
OEM set the LDVS (L_DDC_DATA) strap to present (pulled up) and the eDP strap
(CFG[4]) to disabled (not pulled down).
4.8.3.2

D

RSVD#J29
RSVD#J28

eDP Switching

eDP for Switchable GFX can only be driven out of Port D of PCH. To configure Port D for
embedded DP it is required to set the DDPD_CTRLDATA strap high to 3.3V Core rail
through 2.2 kȍ ±5% resistor, LVDS (L_DDC_DATA) strap as no connect and the eDP
strap CFG[4] as no connect.
Page 482,486

SA_CK2
SA_CK#2
SA_CKE2
SA_CS#2
SA_ODT2
SA_CK3
SA_CK#3
SA_CKE3
SA_CS#3
SA_ODT3

AA5
AA4
R8
AD3
AD2
AA2
AA1
R9
AG7
AE3

SB_CK2
SB_CK#2
SB_CKE2
SB_CS#2
SB_ODT2
SB_CK3
SB_CK#3
SB_CKE3
SB_CS#3
SB_ODT3

V4
V5
N2
AD5
AD7
W3
W2
N3
AE5
AD9

VSS

VSS (AP34) can be left NC is
CRB implementation; EDS/DG
recommendation to GND.

B

AP34

CLARKUNF
CFG7

CFG7(Reserved) - Temporarily used for early
Clarksfield samples.
TP1118
TPAD14-GP

1

CFG7

Clarksfield (only for early samples pre-ES1) Connect to GND with 3.01K Ohm/5% resistor.
Note: Only temporary for early CFD sample
(rPGA/BGA) [For details please refer to the
WW33 MoW and sighting report].
For a common M/B design (for AUB and CFD),
the pull-down resistor shouble be used. Does
not impact AUB functionality.

A

A



Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

CPU (RESERVED)

Document Number

Rev

X01

Vostro Calpella
Date: Monday, January 18, 2010

Sheet
1

11

of

91

4

3

CLARKSFIELD

1
2

2

2

2

1

1

1

1
2

1
2

1

1

C1221

2

1
2

1
2

1.1V RAIL POWER

TP_H_VTTVID1

D

The decoupling capacitors, filter
recommendations and sense resistors on the
CPU/PCH Rails are specific to the CRB
Implementation. Customers need to follow the
recommendations in the Calpella Platform
Design Guide.

C1222

CPU VIDS

VTT_SELECT

2
PSI#

1

C1233

DY

C1234

2

1

+1.05V_VTT

C

[47]

CPU_VID[6..0]

[47]

PM_DPRSLPVR [47]
B

1

TP1203

TPAD14-GP

1

+VCC_CORE

VCC_SENSE
VSS_SENSE

AJ34
AJ35

R1201
100R2F-L1-GP-U

IMVP_IMON [47]

2

AN35

VCC_SENSE
VSS_SENSE

VCC_SENSE [47]
VSS_SENSE [47]

1

ISENSE

VTT_SENSE
VSS_SENSE_VTT

B15
A15

TP_VSS_SENSE_VTT 1

R1204
100R2F-L1-GP-U

VTT_SENSE [49]
TP1202
TPAD14-GP

2

POWER

1
2
1
2

1
2
1
2

1
2
1
2
1
2
1
2

1
2
1
2
1
2
1
2

1
2
1
2
1
2
1
2

1
2
1
2
1
2
1
2

1
2
1
2
1
2
1
2

1
2
1
2
1
2
1
2
1

G15

C1211

SC10U6D3V5KX-1GP

2

CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6

DY

SC10U6D3V5KX-1GP

AK35
AK33
AK34
AL35
AL33
AM33
AM35
AM34

C1205

DY

SC10U6D3V5KX-1GP

AN33

VID
VID
VID
VID
VID
VID
VID
PROC_DPRSLPVR

C1204
SC22U6D3V5MX-2GP

SC10U6D3V5MX-3GP

B

PSI#

C1203

DY

SC10U6D3V5KX-1GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC10U6D3V5KX-1GP

SC22U6D3V5MX-2GP

C1243

DY

AF10
AE10
AC10
AB10
Y10
W10
U10
T10
J12
J11
J16
J15

C1218

DY

+1.05V_VTT

SC10U6D3V5KX-1GP

C1242

VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0

CPU CORE SUPPLY

C1241

C1232
SC10U6D3V5KX-1GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP
C1240

C1231

C1217

SC10U6D3V5KX-1GP

C1230

C1201

SC10U6D3V5KX-1GP

C1224

C1216

SC10U6D3V5KX-1GP

DY

SC22U6D3V5MX-2GP

C1239

DY

C1210
SC10U6D3V5KX-1GP

C1229
SC22U6D3V5MX-2GP

C1238

C1223
SC22U6D3V5MX-2GP

C1228

C1220
SC22U6D3V5MX-2GP

C1215

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP
C1237

DY

SC22U6D3V5MX-2GP

C1227

C1209
SC10U6D3V5KX-1GP

C1214
SC22U6D3V5MX-2GP

C1236

C1208
SC22U6D3V5MX-2GP

C1235

DY

C1226
SC10U6D3V5KX-1GP

SC22U6D3V5MX-2GP

C

C1213
SC22U6D3V5MX-2GP

SC10U6D3V5KX-1GP

C1225

SC22U6D3V5MX-2GP

SC10U6D3V5KX-1GP
C1212

DY

C1207

AH14
AH12
AH11
AH10
J14
J13
H14
H12
G14
G13
G12
G11
F14
F13
F12
F11
E14
E12
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11

SC22U6D3V5MX-2GP

C1206

+1.05V_VTT

VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0

SC10U6D3V5KX-1GP

D

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

SC10U6D3V5KX-1GP

48A

+VCC_CORE

AG35
AG34
AG33
AG32
AG31
AG30
AG29
AG28
AG27
AG26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26
Y35
Y34
Y33
Y32
Y31
Y30
Y29
Y28
Y27
Y26
V35
V34
V33
V32
V31
V30
V29
V28
V27
V26
U35
U34
U33
U32
U31
U30
U29
U28
U27
U26
R35
R34
R33
R32
R31
R30
R29
R28
R27
R26
P35
P34
P33
P32
P31
P30
P29
P28
P27
P26

SENSE LINES

+VCC_CORE

1

6 OF 9

CPU1F

PROCESSOR CORE POWER

2

2

5

A

A


CLARKUNF

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

http://laptop-motherboard-schematic.blogspot.com/
Date:

5

CPU (VCC_CORE)

Document Number

4

3

2

Monday, January 18, 2010

Rev

X01

Vostro Calpella
Sheet
1

12

of

91

2

1

1
2

2

2

2
AR25
AT25
AM24

+1.5V_SUS

SCD1U10V2KX-4GP

+1.5V_SUS

425302_425302_Calpella_S3PowerReduction_WhitePape

C1307

1

C1306

2

2

C1305

TC1301
SE330U2VDM-L-GP

2

C1304

2

C1303

1

1

1

1

C1302

2

1

C1301

2

1

VCCPLL
VCCPLL
VCCPLL

L26
L27
M26

+1.5V_RUN

3A
2

VTT1
VTT1
VTT1
VTT1
VTT1
VTT1

J22
J20
J18
H21
H20
H19

GFX_IMON [53]

C

1

C1310
SC10U6D3V5MX-3GP

1

+1.05V_VTT

C1311
SC10U6D3V5KX-1GP

2

DY
2

2

VTT0
VTT0
VTT0
VTT0

P10
N10
L10
K10

GFX_VR_EN [53]
TP1303TPAD14-GP

TP_GFX_DPRSLPVR1

SC10U6D3V5KX-1GP

AJ1
AF1
AE7
AE4
AC1
AB7
AB4
Y1
W7
W4
U1
T7
T4
P1
N7
N4
L1
H1

[53]
[53]
[53]
[53]
[53]
[53]
[53]

SC22U6D3V5MX-2GP

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

GFX_VID0
GFX_VID1
GFX_VID2
GFX_VID3
GFX_VID4
GFX_VID5
GFX_VID6

SC1U6D3V2KX-GP

- 1.5V RAILS

Revision 0.7

DDR3

SENSE
LINES

GFX_VR_EN
GFX_DPRSLPVR
GFX_IMON

DYC1379

SCD1U10V2KX-4GP

D

VCC_AXG_SENSE [53]
VSS_AXG_SENSE [53]

SC1U6D3V2KX-GP

1

GFX_VID
GFX_VID
GFX_VID
GFX_VID
GFX_VID
GFX_VID
GFX_VID

AM22
AP22
AN22
AP23
AM23
AP24
AN24

+1.5V_RUN

DYC1378

SCD1U10V2KX-4GP

+1.5V_SUS

SC1U6D3V2KX-GP

VTT1
VTT1
VTT1

FDI

C1309
SC10U6D3V5KX-1GP

J24
J23
H25

AR22
AT22

SC1U6D3V2KX-GP

+1.05V_VTT

VAXG_SENSE
VSSAXG_SENSE

DYC1377

C1376
SC56P25V2JN-GP

+1.5V_SUS

SC1U6D3V2KX-GP

C

VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG

GRAPHICS

Please note that the VTT Rail
Values are
Arrandale VTT=1.05V;
Clarksfield VTT=1.1V

AT21
AT19
AT18
AT16
AR21
AR19
AR18
AR16
AP21
AP19
AP18
AP16
AN21
AN19
AN18
AN16
AM21
AM19
AM18
AM16
AL21
AL19
AL18
AL16
AK21
AK19
AK18
AK16
AJ21
AJ19
AJ18
AJ16
AH21
AH19
AH18
AH16

GRAPHICS VIDs

1
2

1
2

1
2

1

C1328
SC10U6D3V5MX-3GP

2

C1326
SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SE330U2VDM-L-GP

DY

C1327

CLARKSFIELD

22A

D

TC1303

7 OF 9

CPU1G

POWER

+CPU_GFXCORE

+1.5V_RUN

1

+1.5V_RUN

1

+1.5V_RUN

1

3

1

4

2

5

1
2

DY
B

+1.8V_RUN

1

C1321
SC2D2U10V3KX-1GP

C1322
SC10U6D3V5MX-3GP

2

C1320
SC4D7U6D3V5KX-3GP

SC1U25V5KX-1GP

2

1

C1319

2

C1318

DY DY

2

1

1

1

1.35A
SC1U25V5KX-1GP

CLARKUNF

C1316
SC10U6D3V5MX-3GP

2

VTT1
VTT1
VTT1
VTT1
VTT1
VTT1
VTT1
VTT1
VTT1
VTT1
VTT1

1.8V

1
2

1

C1315
SC22U6D3V5MX-2GP

2

C1314
SC10U6D3V5KX-1GP

2

C1312
SC10U6D3V5KX-1GP

B

K26
J27
J26
J25
H27
G28
G27
G26
F26
E26
E25

PEG & DMI

1

18A

1.1V

+1.05V_VTT
+1.05V_VTT



A

A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

CPU (VCC_GFXCORE)

Document Number

Rev

Vostro Calpella
Date: Monday, January 18, 2010

Sheet
1

13

X01
of

91

4

B

VSS

K27
K9
K6
K3
J32
J30
J21
J19
H35
H32
H28
H26
H24
H22
H18
H15
H13
H11
H8
H5
H2
G34
G31
G20
G9
G6
G3
F30
F27
F25
F22
F19
F16
E35
E32
E29
E24
E21
E18
E13
E11
E8
E5
E2
D33
D30
D26
D9
D6
D3
C34
C32
C29
C28
C24
C22
C20
C19
C16
B31
B25
B21
B18
B17
B13
B11
B8
B6
B4
A29
A27
A23
A9

CLARKUNF

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

CLARKSFIELD

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

1

9 OF 9

CPU1I

AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE6
AD10
AC8
AC4
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
AB6
AA10
Y8
Y4
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
W6
V10
U8
U4
U2
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
T6
R10
P8
P4
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
N6
M10
L35
L32
L29
L8
L5
L2
K34
K33
K30

D

C

VSS

NCTF

C

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

CLARKSFIELD

D

2

8 OF 9

CPU1H

AT20
AT17
AR31
AR28
AR26
AR24
AR23
AR20
AR17
AR15
AR12
AR9
AR6
AR3
AP20
AP17
AP13
AP10
AP7
AP4
AP2
AN34
AN31
AN23
AN20
AN17
AM29
AM27
AM25
AM20
AM17
AM14
AM11
AM8
AM5
AM2
AL34
AL31
AL23
AL20
AL17
AL12
AL9
AL6
AL3
AK29
AK27
AK25
AK20
AK17
AJ31
AJ23
AJ20
AJ17
AJ14
AJ11
AJ8
AJ5
AJ2
AH35
AH34
AH33
AH32
AH31
AH30
AH29
AH28
AH27
AH26
AH20
AH17
AH13
AH9
AH6
AH3
AG10
AF8
AF4
AF2
AE35

3

NCYF TEST PIN:
A35,AT1,AT35,B1,A3,A33,A34,
AP1,AP35,AR1,AR35,AT2,AT3,
AT33,AT34,C1,C35,B35

5

VSS_NCTF
VSS_NCTF
VSS_NCTF

AR34
B34
B2

VSS_NCTF#A35
VSS_NCTF#AT1
VSS_NCTF#AT35
VSS_NCTF#B1
RSVD_NCTF#A3
RSVD_NCTF#A33
RSVD_NCTF#A34
RSVD_NCTF#AP1
RSVD_NCTF#AP35
RSVD_NCTF#AR1
RSVD_NCTF#AR35
RSVD_NCTF#AT2
RSVD_NCTF#AT3
RSVD_NCTF#AT33
RSVD_NCTF#AT34
RSVD_NCTF#C1
RSVD_NCTF#C35
RSVD_NCTF#B35

A35
AT1
AT35
B1
A3
A33
A34
AP1
AP35
AR1
AR35
AT2
AT3
AT33
AT34
C1
C35
B35

TP_MCP_VSS_NCTF2
TP_MCP_VSS_NCTF3
TP_MCP_VSS_NCTF4
TP_MCP_VSS_NCTF1

1
1
1
1

TP1402
TP1406
TP1405
TP1401

B

CLARKUNF



A

A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

CPU (VSS)
Size

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Document Number

Rev

Vostro Calpella
Date: Monday, January 18, 2010

Sheet
1

14

of

X01
91

5

4

3

2

1

D

D

C

C

(Blanking)

B

B



A

A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
A3

Document Number

Date: Monday, January 18, 2010

Reserved

Rev

Vostro Calpella
Sheet
1

15

X01
of

91

5

4

3

2

1

D

D

C

C

(Blanking)

B

B



A

A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
A3

Document Number

Date: Monday, January 18, 2010

Reserved

Rev

Vostro Calpella
Sheet
1

16

X01
of

91

5

4

3

2

1

D

D

C

C

(Blank)

B

B

A

A



Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
Document Number
Custom

(Reserve)

http://laptop-motherboard-schematic.blogspot.com/

Rev

X01

Vostro Calpella

Date:

5

4

3

2

Monday, January 18, 2010

Sheet
1

17

of

91

5

4

3

2

1

DM1

[10] M_A_A[15..0]

M_A_BS0
M_A_BS1

1

1

1

1

1

1

M_A_BS2

[10]
[10]

Layout Note:
Place near DM1

+1.5V_SUS

1

DY
2

2

2

2

2

2

DY
2

[10]

TC1803
ST330U2D5VBM-1-GP

C

C1803
SC10U6D3V5MX-3GP

C1812
SC10U6D3V5MX-3GP

C1804
SC10U6D3V5MX-3GP

C1811
SC10U6D3V5MX-3GP

C1802
SC10U6D3V5MX-3GP

C1816
SC10U6D3V5MX-3GP

C1814
SC1U10V2KX-1GP

B

1
2

1
2

1
2

1
2

1
2

C1813
SC1U10V2KX-1GP

C1823
SC10U6D3V5MX-3GP

C1801
SC1U10V2KX-1GP

C1815
SC1U10V2KX-1GP

1

2

DY C1873
DY C1874
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP

2

1

1
C1872
SCD1U10V2KX-4GP

2

2

1

+1.5V_SUS

C1875
SCD1U10V2KX-4GP

425302_425302_Calpella_S3PowerReduction_WhitePape
Revision 0.7

1

DY
2

C1810
SCD1U16V2KX-3GP

2

1

+V_DDR_REF

C1809
SC2D2U10V3KX-1GP

A

[10]
[10]

M_ODT0
M_ODT1

BA0
BA1

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

10
27
45
62
135
152
169
186

DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7

12
29
47
64
137
154
171
188

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7

M_ODT0
M_ODT1

116
120

ODT0
ODT1

126
1

VREF_CA
VREF_DQ

+V_DDR_REF

30
203
204

C1805
SC2D2U10V3KX-1GP

110
113
115

CS0#
CS1#

114
121

CKE0
CKE1

73
74

CK1
CK1#

102
104

M_CLK_DDR1
M_CLK_DDR#1

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

11
28
46
63
136
153
170
187

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

SDA
SCL

200
202

PCH_SMBDATA
PCH_SMBCLK

199

SA0
SA1

197
201

NC#1
NC#2
NC#/TEST

77
122
125

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18

75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
205
206

M_CLK_DDR0 [10]
M_CLK_DDR#0 [10]
M_CLK_DDR1 [10]
M_CLK_DDR#1 [10]

RN1802
SRN10KJ-5-GP

PCH_SMBDATA [7,19,23,40,64,65]
PCH_SMBCLK [7,19,23,40,64,65]
PM_EXTTS#0 [9]

+3.3V_RUN

SA0_DM1
SA1_DM1

3

DY

+1.5V_SUS

C1806
SCD1U16V2KX-3GP

C

C1807
SC2D2U10V3KX-1GP

B

A



Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

62.10017.P31

http://laptop-motherboard-schematic.blogspot.com/
4

D

SMBUS address:A0

DDR3-204P-47-GP

5

SA0_DM1
SA1_DM1

[10]
[10]

M_CKE0 [10]
M_CKE1 [10]

101
103

198

VTT1
VTT2

M_CS0#
M_CS1#

CK0
CK0#

EVENT#

RESET#

M_A_RAS# [10]
M_A_WE# [10]
M_A_CAS# [10]

M_CLK_DDR0
M_CLK_DDR#0

VDDSPD

1

DY
2

C1817
SCD1U16V2KX-3GP

2

1

+0.75V_DDR_VTT [9,19] DDR3_DRAMRST#

RAS#
WE#
CAS#

4
3

109
108

Height 5.2mm

Layout Note:
Put close to VTT1,VTT2.
+0.75V_DDR_VTT

M_A_BS0
M_A_BS1

NP1
NP2

1
2

[10] M_A_DQS[7..0]

NP1
NP2

1

[10] M_A_DM[7..0]

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16/BA2

2

[10] M_A_DQ[63..0]
D

98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78
79

1

[10] M_A_DQS#[7..0]

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_BS2

2

SSID = MEMORY

2

DDRIII-SODIMM SLOT1

Size
Document Number
Custom

Date: Monday, January 18, 2010

Sheet
1

Rev

X01

Vostro Calpella
18

of

91

5

4

3

2

1

DM2

[10] M_B_DQS[7..0]
[10]

M_B_BS2

[10]
[10]

M_B_BS0
M_B_BS1

[10] M_B_A[15..0]

1

1

2

1

2

DY

TC1903
ST330U2D5VBM-1-GP

C1913
SC10U6D3V5MX-3GP

C1916
SC10U6D3V5MX-3GP

C1920
SC10U6D3V5MX-3GP

1
2

1
2

1
2

C1908
SC1U10V2KX-1GP

C1909
SC1U10V2KX-1GP

C1917
SC1U10V2KX-1GP

C1918
SC1U10V2KX-1GP

1
C1978
SCD1U10V2KX-4GP

2

1

DY C1977
SCD1U10V2KX-4GP

2

1
C1976
SCD1U10V2KX-4GP

2

2

1

+1.5V_SUS

C1979
SCD1U10V2KX-4GP

425302_425302_Calpella_S3PowerReduction_WhitePape
Revision 0.7

2

C1907
SCD1U16V2KX-3GP

1

DY
2

1

+V_DDR_REF

C1914
SC2D2U10V3KX-1GP

A

[10]
[10]

M_ODT2
M_ODT3

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

10
27
45
62
135
152
169
186

DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7

12
29
47
64
137
154
171
188

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7

M_ODT2
M_ODT3

116
120

ODT0
ODT1

126
1

VREF_CA
VREF_DQ

+V_DDR_REF

30

[9,18] DDR3_DRAMRST#

C1912
SC2D2U10V3KX-1GP

114
121

M_CS2#
M_CS3#

CKE0
CKE1

73
74

M_CKE2 [10]
M_CKE3 [10]

CK0
CK0#

101
103

M_CLK_DDR2
M_CLK_DDR#2

CK1
CK1#

102
104

M_CLK_DDR3
M_CLK_DDR#3

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

11
28
46
63
136
153
170
187

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

SDA
SCL

200
202

PCH_SMBDATA
PCH_SMBCLK

198
199

SA0
SA1

197
201

NC#1
NC#2
NC#/TEST

77
122
125

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18

75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
205
206

RESET#
VTT1
VTT2

[10]
[10]

D

3

SA0_DM2
SA1_DM2

M_CLK_DDR3 [10]
M_CLK_DDR#3 [10]

SMBUS address:A4

PCH_SMBDATA [7,18,23,40,64,65]
PCH_SMBCLK [7,18,23,40,64,65]
+3.3V_RUN

PM_EXTTS#1 [9]

SA0_DM2
SA1_DM2

DY

+1.5V_SUS

C

C1906
C1921
SCD1U16V2KX-3GP SC2D2U10V3KX-1GP
Note:
If SA0_DIM0 = 0, SA1_DIM0 = 0
SO-DIMMA SPD Address is 0xA0
If SA0_DIM0 = 1, SA1_DIM0 = 0
SO-DIMMA SPD Address is 0xA2
If SA0_DIM0 = 0, SA1_DIM0 = 1
SO-DIMMA SPD Address is 0xA4

B

A



Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

62.10017.Q31
Title

DDRIII-SODIMM SLOT2

http://laptop-motherboard-schematic.blogspot.com/
4

RN1903
SRN10KJ-5-GP

M_CLK_DDR2 [10]
M_CLK_DDR#2 [10]

DDR3-204P-55-GP

5

+3.3V_RUN

M_B_RAS# [10]
M_B_WE# [10]
M_B_CAS# [10]

CS0#
CS1#

EVENT#

1
2

1
2

C1910
SCD1U16V2KX-3GP

203
204

110
113
115

VDDSPD

+0.75V_DDR_VTT

DY

RAS#
WE#
CAS#

3
4

BA0
BA1

NP1
NP2

2
1

109
108

Height 9.2mm

Layout Note:
Put close to VTT1,VTT2.

+0.75V_DDR_VTT

1

2

C1911
SC10U6D3V5MX-3GP

C1905
SC10U6D3V5MX-3GP

2

DY

2

2

2

2

DY

C1919
SC10U6D3V5MX-3GP

B

1

1

1

DY

C

1

Layout Note:
Place near DM2

+1.5V_SUS

M_B_BS0
M_B_BS1

NP1
NP2

1

[10] M_B_DM[7..0]

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16/BA2

2

[10] M_B_DQ[63..0]
D

98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78
79

1

[10] M_B_DQS#[7..0]

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_BS2

2

SSID = MEMORY

2

Size
Document Number
Custom

Sheet
1

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

19

of

91

5

4

3

2

LCDVDD_EN_PCH 1

DW

DY

2

R2003
100KR2J-1-GP

10/26 Item 31

4 OF 10

U2001D

T48
T47

L_BKLTEN
L_VDD_EN

Y48

L_BKLTCTL

D

[54] LBKLT_CTL_PCH
[54] L_DDC_CLK
[54] L_DDC_DATA

1
2

+3.3V_RUN

4
3

RN2001
SRN10KJ-5-GP
TP2001
TPAD14-GP

Place near PCH

LCTLA_CLK
LCTLB_DATA

L_DDC_CLK
L_DDC_DATA

AB46
V48

L_CTRL_CLK
L_CTRL_DATA

LIBG
AP39
TP_LVDS_VBG AP41

1

LVD_IBG
LVD_VBG

AV53
AV51

LVDSA_CLK#
LVDSA_CLK

[74] MCH_LVDSA_DAT0#
[74] MCH_LVDSA_DAT1#
[74] MCH_LVDSA_DAT2#

BB47
BA52
AY48
AV47

LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3

[74] MCH_LVDSA_DAT0
[74] MCH_LVDSA_DAT1
[74] MCH_LVDSA_DAT2

BB48
BA50
AY49
AV48

LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3

AP48
AP47

LVDSB_CLK#
LVDSB_CLK

AY53
AT49
AU52
AT53

LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3

AY51
AT48
AU50
AT51

LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3

AA52
AB53
AD53

CRT_BLUE
CRT_GREEN
CRT_RED

LVDS

[74] MCH_LVDSA_CLK#
[74] MCH_LVDSA_CLK

1

LVD_VREFH
LVD_VREFL

C

50 ohm trace to filter
37.5 ohm trace to 150R resistor

2
1

Place near PCH

[74] GMCH_HSYNC
[74] GMCH_VSYNC

1

2
R2004
1KR2D-1-GP

CRT_IREF

V51
V53

CRT_DDC_CLK
CRT_DDC_DATA

Y53
Y51

CRT_HSYNC
CRT_VSYNC

AD48
AB51

DAC_IREF
CRT_IRTN

BJ46
BG46

SDVO_STALLN
SDVO_STALLP

BJ48
BG48

SDVO_INTN
SDVO_INTP

BF45
BH45

D

T51
T53

DDPB_AUXN
DDPB_AUXP
DDPB_HPD

BG44
BJ44
AU38

DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P

BD42
BC42
BJ42
BG42
BB40
BA40
AW38
BA38

DDPC_CTRLCLK
DDPC_CTRLDATA

Y49
AB49

DDPC_AUXN
DDPC_AUXP
DDPC_HPD

BE44
BD44
AV40

DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P

BE40
BD40
BF41
BH41
BD38
BC38
BB36
BA36

DDPD_CTRLCLK
DDPD_CTRLDATA

CRT

B

[55] GMCH_DDCCLK
[55] GMCH_DDCDATA

R2005
150R2F-1-GP

1

R2006
150R2F-1-GP

1

R2007
150R2F-1-GP

2

MCH_BLUE
MCH_GREEN
MCH_RED

2

[74] MCH_BLUE
[74] MCH_GREEN
[74] MCH_RED

SDVO_TVCLKINN
SDVO_TVCLKINP

SDVO_CTRLCLK
SDVO_CTRLDATA

AT43
AT42

R2002
2K37R2F-GP

2

AB48
Y45

Digital Display Interface

PANEL_BKEN_PCH
LCDVDD_EN_PCH

[37] PANEL_BKEN_PCH
[54] LCDVDD_EN_PCH

1

SDVO_CLK [57]
SDVO_DAT [57]

HDMI_HP_DET [21,57]
HDMI_DATA2-_C
HDMI_DATA2+_C
HDMI_DATA1-_C
HDMI_DATA1+_C
HDMI_DATA0-_C
HDMI_DATA0+_C
HDMI_CLK-_C
HDMI_CLK+_C

HDMI_DATA2-_C [57]
HDMI_DATA2+_C [57]
HDMI_DATA1-_C [57]
HDMI_DATA1+_C [57]
HDMI_DATA0-_C [57]
HDMI_DATA0+_C [57]
HDMI_CLK-_C [57]
HDMI_CLK+_C [57]

C

U50
U52

DDPD_AUXN
DDPD_AUXP
DDPD_HPD

BC46
BD46
AT38

DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P

BJ40
BG40
BJ38
BG38
BF37
BH37
BE36
BD36

B

IBEXPEAK-M-GP-NF



A

A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

PCH (LVDS/CRT/DDI)
Size

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Document Number

Rev

Vostro Calpella
Date: Monday, January 18, 2010

Sheet
1

20

X01
of

91

5

4

3

2

1

RN2101
+3.3V_RUN

+3.3V_RUN

SRN8K2J-2-GP-U

RN2102
PCI_REQ3#
INT_PIRQB#
PCI_REQ0#
PCI_PERR#

D

+3.3V_RUN

DY

U2101

2

C2101
SCD1U10V2KX-4GP

1
2
3
4
5

10
9
8
7
6

+3.3V_RUN

PCI_SERR#
PCI_DEVSEL#
PCI_PLOCK#
PCI_TRDY#

[9,37,64,65,70,76,77,80]

PLT_RST#

1

B

5

VCC

4

Y

A

2

GND

3

DY

PLTRST#_PCH

74LVC1G08GW-1-GP

SRN8K2J-2-GP-U

1 R2104 2
33R2J-2-GP

+3.3V_RUN
+3.3V_RUN
R2113

2 10KR2J-3-GP

1

DGPU_PWM_SELECT#
U2102

+3.3V_RUN
PCH_GPIO4
EDID_SELECT_R#
ECSCI#
INT_PIRQE#

5
6
7
8

2

GND

3

Y

EDID_SELECT_R#

74LVC1G08GW-1-GP
ECSCI#

1
R2105

[25,37]

1

4
3
2
1

1

A

VCC

4

[54,55,57] EDID_SELECT#

B

DIS

5

DY
2

RN2110
SRN10KJ-7GP

DY

2
0R2J-2-GP

C2112
SC220P50V2KX-3GP
INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#

DW

C

10/19 Changed
1.Changed EDID_SELECT# pin from PCH_GPIO66 to PCH_GPIO5 for fixed gitch

PCI_REQ0#
PCI_REQ1#
DGPU_SELECT#
PCI_REQ3#

[37,54,74] DGPU_SELECT#

U2001E

5 OF 10

H40
N34
C44
A38
C36
J34
A40
D45
E36
H48
E40
C40
M48
M45
F53
M40
M43
J36
K48
F40
C42
K46
M51
J52
K51
L34
F42
J40
G46
F44
M47
H36

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

NV_CE#0
NV_CE#1
NV_CE#2
NV_CE#3

AY9
BD1
AP15
BD8

NV_DQS0
NV_DQS1

AV9
BG8

NV_DQ0/NV_IO0
NV_DQ1/NV_IO1
NV_DQ2/NV_IO2
NV_DQ3/NV_IO3
NV_DQ4/NV_IO4
NV_DQ5/NV_IO5
NV_DQ6/NV_IO6
NV_DQ7/NV_IO7
NV_DQ8/NV_IO8
NV_DQ9/NV_IO9
NV_DQ10/NV_IO10
NV_DQ11/NV_IO11
NV_DQ12/NV_IO12
NV_DQ13/NV_IO13
NV_DQ14/NV_IO14
NV_DQ15/NV_IO15

AP7
AP6
AT6
AT9
BB1
AV6
BB3
BA4
BE4
BB6
BD6
BB7
BC8
BJ8
BJ6
BG6

NV_ALE
NV_CLE

BD3
AY6

TP_NV_ALE
TP_NV_CLE

NV_RCOMP

AU2

TP_NV_RCOMP

NV_RB#

AV7

J50
G42
H47
G34

C/BE0#
C/BE1#
C/BE2#
C/BE3#

NV_WR#0_RE#
NV_WR#1_RE#

AY8
AY5

G38
H51
B37
A44

PIRQA#
PIRQB#
PIRQC#
PIRQD#

F51
A46
B45
M53

TPAD14-GP TP2116
TPAD14-GPTP2116

PCI_GNT#1

0

0

0

Reserved

0

1

PCI

1

1

GNT0#
GNT1#/GPIO51
GNT2#/GPIO53
GNT3#/GPIO55

[54] DGPU_PWM_SELECT#

LPC

1

1

PCI_GNT0#
F48
K45
DGPU_PWM_SELECT#
F36
R2121
PCI_GNT3#
H53
0R0402-PAD
INT_PIRQE#
B41
1
2
[40] HDD_FALL_INT1
WWAN_RF_EN
K53
[65] WWAN_RF_EN
PCH_GPIO4
A36
1
2
[20,57] HDMI_HP_DET
R2122
EDID_SELECT_R#A48
0R2J-2-GP
K6
1 PCIRST#
TPAD14-GP
TP2108
PCI_SERR#
E44
PCI_PERR#
E50

BOOT BIOS Location

PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5

DY

SPI(Default)

PCI_IRDY#
PCI_DEVSEL#
PCI_FRAME#
B

TPAD14-GP TP2115
TPAD14-GPTP2115

[70]
[23]
[37]
[76]

R2110 1
R2108 1
R2111 1
R2112 1

PCLK_FWH
CLK_PCI_FB
PCLK_KBC
PCLK_TPM

DY

DY

2
2
2
2

22R2J-2-GP
22R2J-2-GP
22R2J-2-GP
22R2J-2-GP

1

PCIRST#
SERR#
PERR#

A42
H44
F46
C46

IRDY#
PAR
DEVSEL#
FRAME#

PCI_PLOCK#

D49

PCI_STOP#
PCI_TRDY#

D41
C48

STOP#
TRDY#

PCH_PME#

M7

PME#

PLTRST#_PCH

D5

PCLK_FWH_R
CLK_PCI_FB_R
PCLK_KBC_R
PCLK_TPM_R

N52
P53
P46
P51
P48

NV_WE#_CK0
NV_WE#_CK1

REQ0#
REQ1#/GPIO50
REQ2#/GPIO52
REQ3#/GPIO54

BOOT BIOS Strap
PCI_GNT#0

NVRAM

PCI_IRDY#
INT_PIRQD#
INT_PIRQC#
DGPU_SELECT#

USB

10
9
8
7
6

PCI

+3.3V_RUN

1
2
3
4
5

1

PCI_REQ1#
PCI_FRAME#
PCI_STOP#
INT_PIRQA#

PLTRST#
CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4

TP2122
TP2123
TP2124

AV11
BF5

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P

H18
J18
A18
C18
N20
P20
J20
L20
F20
G20
A20
C20
M22
N22
B21
D21
H22
J22
E22
F22
A22
C22
G24
H24
L24
M24
A24
C24

USBRBIAS#

B25

USBRBIAS

D25

OC0#/GPIO59
OC1#/GPIO40
OC2#/GPIO41
OC3#/GPIO42
OC4#/GPIO43
OC5#/GPIO9
OC6#/GPIO10
OC7#/GPIO14

N16
J16
F16
L16
E14
G16
F12
T15

PLOCK#

D

TP_USB_PN6
TP_USB_PP6

TP_USB_PN10
TP_USB_PP10

C

USB_PN0 [76]
USB_PP0 [76]
USB_PN1 [64]
USB_PP1 [64]
USB_PN2 [63]
USB_PP2 [63]
USB_PN3 [63]
USB_PP3 [63]
USB_PN4 [63]
USB_PP4 [63]
USB_PN5 [65]
USB_PP5 [65]
TP2118
TP2119
USB_PN7 [73]
USB_PP7 [73]
USB_PN8 [77]
USB_PP8 [77]
USB_PN9 [76]
USB_PP9 [76]
TP2120
TP2121
USB_PN11 [78]
USB_PP11 [78]
USB_PN12 [77]
USB_PP12 [77]
USB_PN13 [77]
USB_PP13 [77]

USB_RBIAS_PN

1

USB
Pair

USB1

1

WLAN

2

USB2

3

USB3

4

USB for ESATA

5

WWAN
RESERVED

6

(Not available for HM55)

RESERVED

7

DW
01/18 Item 1

2

R2106
22D6R2F-L1-GP
USB_OC#0_1
USB_OC#2_3
USB_OC#4_5
USB_OC#6_7
USB_OC#8_9
USB_OC#10_11
USB_OC#12_13
PCH_OC7#

Device

0

(Not available for HM55)

8

BlUETOOTH

9

Touch Panel

10

CAMERA

11

Biometric

12

New Card

13

CardReader

B

USB_OC#0_1 [76]
USB_OC#2_3 [63]
USB_OC#4_5 [63]

IBEXPEAK-M-GP-NF

Calpella Platform Design Guide
Revision 1.6

A16 swap override Strap/Top-Block
Swap Override jumper

Reserve by pass cap near the U2001,For EMI
2

A

Table 111.

DY

RP2101
USB_OC#10_11
USB_OC#4_5
USB_OC#8_9
USB_OC#12_13

1

1

4K7R2J-2-GP

+3.3V_ALW
PCLK_KBC

Page 233

CLK_PCI_FB

2
2

1
2
3
4
5

10
9
8
7
6


USB_OC#2_3
PCH_OC7#
USB_OC#6_7
USB_OC#0_1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

SRN10KJ-L3-GP

PCLK_TPM

Title

1

DY EC2136
DY EC2137
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
5

PCH (PCI/USB/NVRAM)
Size

http://laptop-motherboard-schematic.blogspot.com/
4

A

+3.3V_ALW

1

1

Overcurrent Pin Example Configuration

These OC7# pins are not used for USB overcurrent protection and should be configured as GPIOs.
The unused USB ports can be left as no connect.

DY EC2134
DY EC2135
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP

R2109
PCI_GNT3#

PCLK_FWH

2

Low = A16 swap
override/Top-Block
Swap Override enabled
High = Default

2

PCI_GNT#3

3

2

Document Number

Rev

Vostro Calpella
Date: Monday, January 18, 2010

Sheet
1

21

X01
of

91

5

4

3

DMI0RXN
DMI1RXN
DMI2RXN
DMI3RXN

[8]
[8]
[8]
[8]

DMI_CTX_PRXP0
DMI_CTX_PRXP1
DMI_CTX_PRXP2
DMI_CTX_PRXP3

BD24
BG22
BA20
BG20

DMI0RXP
DMI1RXP
DMI2RXP
DMI3RXP

[8]
[8]
[8]
[8]

DMI_PTX_CRXN0
DMI_PTX_CRXN1
DMI_PTX_CRXN2
DMI_PTX_CRXN3

BE22
BF21
BD20
BE18

[8]
[8]
[8]
[8]

DMI_PTX_CRXP0
DMI_PTX_CRXP1
DMI_PTX_CRXP2
DMI_PTX_CRXP3

BD22
BH21
BC20
BD18

+1.05V_VTT
R2204

1

DMI_IRCOMP_R

2

DMI0TXN
DMI1TXN
DMI2TXN
DMI3TXN
DMI0TXP
DMI1TXP
DMI2TXP
DMI3TXP

BH25

DMI_ZCOMP

BF25

DMI_IRCOMP

49D9R2F-GP

XDP_DBRESET#

[9,25] XDP_DBRESET#

T6

SYS_RESET#

FDI

BC24
BJ22
AW20
BJ20

DMI

D

DMI_CTX_PRXN0
DMI_CTX_PRXN1
DMI_CTX_PRXN2
DMI_CTX_PRXN3

1

3 OF 10

U2001C
[8]
[8]
[8]
[8]

2

FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7

BA18
BH17
BD16
BJ16
BA16
BE14
BA14
BC12

FDI_TXN0
FDI_TXN1
FDI_TXN2
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXN7

FDI_TXN0
FDI_TXN1
FDI_TXN2
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXN7

[8]
[8]
[8]
[8]
[8]
[8]
[8]
[8]

FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7

BB18
BF17
BC16
BG16
AW16
BD14
BB14
BD12

FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP3
FDI_TXP4
FDI_TXP5
FDI_TXP6
FDI_TXP7

FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP3
FDI_TXP4
FDI_TXP5
FDI_TXP6
FDI_TXP7

[8]
[8]
[8]
[8]
[8]
[8]
[8]
[8]

+3.3V_ALW
RN2201

4
3

PM_BATLOW#_R

1

2

1

2

1

2

1
2
SRN10KJ-5-GP

R2201
PCIE_WAKE#
R2202
AC_PRESENT_EC
R2217

FDI_INT

BJ14

FDI_INT

FDI_FSYNC0

BF13

FDI_FSYNC0

[8]

FDI_FSYNC1

BH13

FDI_FSYNC1

[8]

FDI_LSYNC0

BJ12

FDI_LSYNC0

[8]

FDI_LSYNC1

BG14

FDI_LSYNC1

[8]

D

10KR2J-3-GP
1KR2J-1-GP

10KR2J-3-GP

[8]
RN2203

J12

WAKE#

PM_RI#
SUS_PWR_DN_ACK

PM_RSMRST#_R
PM_PWROK

1
2

4
3
SRN10KJ-5-GP

PCIE_WAKE# [76,77]

C

C

DW

1

TPAD14-GP

M6

SYS_PWROK

10/15 Item 4

[37]

PM_PWROK

PM_PWROK
TP2207
R2209 1

2 10KR2J-3-GP

DW

LAN_RST#1

[37] RSMRST#_KBC

PWROK

K5

MEPWROK

A10

LAN_RST#

D9

DRAMPWROK

R2210

12/08 Item 5

1 0R0402-PAD
2

PM_RSMRST#_R

C16

RSMRST#

TPAD14-GP

1

[37] SUS_PWR_DN_ACK

SUS_PWR_DN_ACK

M1

SUS_PWR_DN_ACK/GPIO30

PM_PWRBTN#

P5

PWRBTN#

DW
10/15 Item 4

[37] PM_PWRBTN#

DW
10/15 Item 4

R2206

[37] AC_PRESENT_EC

B

TPAD14-GP

PM_DRAM_PWRGD

[9] PM_DRAM_PWRGD

TP2206

1

B17

AC_PRESENT_EC

PM_BATLOW#_R

DW

System Power Management

TP2210

P7

ACPRESENT/GPIO31

A6

BATLOW#/GPIO72

CLKRUN#/GPIO32

Y1

PM_CLKRUN#

SUS_STAT#/GPIO61

P8

TP_SUS_STAT# 1

SUSCLK/GPIO62

F3

PCH_SUSCLK

SLP_S5#/GPIO63

E4

PCH_SLP_S5#

SLP_S4#

H7

PM_SLP_S4#_R

SLP_S3#

P12

PM_SLP_S3#_R

SLP_M#

K8

SIO_SLP_M#_R

N2

PM_SLP_DSW#

BJ10

H_PM_SYNC

PM_CLKRUN# [37]

DW
12/08 Item 5

TP2205

1

1
1

R2219
0R0402-PAD
1
2
R2220
0R2J-2-GP
1
2

TP2202TPAD14-GP
R2211

1

TPAD14-GP

1

2

0R0402-PAD

TP2208TPAD14-GP
R2212 1
2 0R0402-PAD

PCH_SUSCLK_2102 [39]
PCH_SUSCLK_KBC

[37]

PM_SLP_S4# [37,50,77]
PM_SLP_S3# [37,42,50,51,77,86]

TP2209TPAD14-GP
TP2203TPAD14-GP

DW
12/08 Item 5

TP23
PMSYNCH

1

TP2204TPAD14-GP
H_PM_SYNC [9]

B

10/15 Item 4

PM_RI#

F14

RI#

F6

SLP_LAN#/GPIO29

KBC_PWR

2

IBEXPEAK-M-GP-NF
R2221

1

DY10KR2J-3-GP
U2213_56

U2213

4

3

5

2

6

DY

PM_RSMRST#_R
3V_5V_POK [37,46]

1
DMN66D0LDW-7-GP
+3.3V_RUN
R2214

1

PM_CLKRUN# 1

Option to " Disable " clkrun.
Pulling it down will keep the clks running.

R2215
10KR2J-3-GP

10KR2J-3-GP

DY



A

Wistron Corporation

2

A

2

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

PCH (DM I/FDI/PM)
Size

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Document Number

Rev

Vostro Calpella
Date: Monday, January 18, 2010

Sheet
1

22

X01
of

91

5

4

3

2

1

+3.3V_ALW

BG34
BJ34
BG36
BJ36

PERN8
PERP8
PETN8
PETP8

C

(Not available for HM55)
PCIECLKRQ{0,3,4,5,6,7}# should have a 10K pull-up to +3.3V_ALW.
PCIECLKRQ{1,2} should have a 10K pull-up to +3.3_RUN

AK48
AK47

R2320
R2321

[77] CLK_PCIE_NEW#
[77] CLK_PCIE_NEW

1
1

2
2

0R2J-2-GP CLK_PCIE_NEW1#
0R2J-2-GP CLK_PCIE_NEW1
NEWCARD_CLKREQ#

[77] NEWCARD_CLKREQ#
R2323
R2322

[64] CLK_PCIE_MINI1#
[64] CLK_PCIE_MINI1

1
1

2
2

0R2J-2-GP CLK_PCIE_MINI1_1#
0R2J-2-GP CLK_PCIE_MINI1_1
MINI1_CLKREQ#

[64] MINI1_CLKREQ#
R2325
R2324

[76] CLK_PCIE_LAN#
[76] CLK_PCIE_LAN
B

1
1

2
2

0R2J-2-GP CLK_PCIE_LAN1#
0R2J-2-GP CLK_PCIE_LAN1
CLKREQ#_LAN

[76] CLKREQ#_LAN
R2327
R2326

[65] CLK_PCIE_MINI2#
[65] CLK_PCIE_MINI2

1
1

2
2

0R2J-2-GP CLK_PCIE_MINI2_1#
0R2J-2-GP CLK_PCIE_MINI2_1
MINI2_CLKREQ#

AM43
AM45

AH42
AH41

CLKOUT_PCIE3N
CLKOUT_PCIE3P

A8

PCIECLKRQ3#/GPIO25

AM51
AM53

CLKOUT_PCIE4N
CLKOUT_PCIE4P

M9

PCIECLKRQ4#/GPIO26
CLKOUT_PCIE5N
CLKOUT_PCIE5P

H6

PEG_B_CLKRQ#

G12

SML1DAT

PEG_B_CLKRQ#/GPIO56

+3.3V_RUN

RN2303
SRN2K2J-1-GP

+3.3V_ALW

4
3

SML1CLK [37]
SML1DAT [37]

CL_CLK

CL_DATA1

T11

CL_DATA 1

CL_RST1#

T9

CL_RST# 1

PEG_A_CLKRQ#/GPIO47

H1

PEG_CLKREQ#

AD43
AD45

CLK_PCIE_VGA1#
CLK_PCIE_VGA1

CLKOUT_DMI_N
CLKOUT_DMI_P

AN4
AN2

CLK_EXP_N
CLK_EXP_P

CLKOUT_DP_N/CLKOUT_BCLK1_N
CLKOUT_DP_P/CLKOUT_BCLK1_P

AT1
AT3

TP_CLK_DP_N
TP_CLK_DP_P

AW24
BA24

CLKIN_DMI#
CLKIN_DMI

CLKIN_DMI# [7]
CLKIN_DMI [7]

CLKIN_BCLK_N
CLKIN_BCLK_P

AP3
AP1

CLK_CPU_BCLK#
CLK_CPU_BCLK

CLK_CPU_BCLK# [7]
CLK_CPU_BCLK [7]

CLKIN_DOT_96N
CLKIN_DOT_96P

F18
E18

DREFCLK#
DREFCLK

DREFCLK# [7]
DREFCLK [7]

AH13
AH12

CLK_PCIE_SATA#
CLK_PCIE_SATA

CLK_PCIE_SATA# [7]
CLK_PCIE_SATA [7]

REFCLK14IN

P41

CLK_PCH_14M

CLK_PCH_14M [7]

CLKIN_PCILOOPBACK

J42

CLK_PCI_FB

CLK_PCI_FB [21]

XTAL25_IN
XTAL25_OUT

AH51
AH53

XTAL25_IN
XTAL25_OUT

XCLK_RCOMP

AF38

XCLK_RCOMP

R2306 1

T45

TP_CLK_OUTFLEX0

1

TP2307
TPAD14-GP

CLKOUTFLEX1/GPIO65

P43

TP_CLK_PCI_LPC

1

TP2305
TPAD14-GP

CLKOUTFLEX2/GPIO66

T42

TP_CLKOUT2/GPIO66 1

TP2308
TPAD14-GP

CLKOUTFLEX3/GPIO67

N50

CLK48M/EDID_SEL

R2307 1

1

CLKIN_DMI_N
CLKIN_DMI_P

PCH_SMBDATA
PCH_SMBCLK

+3.3V_ALW

T13

+3.3V_RUN

TP2301TPAD14-GP
TP2302TPAD14-GP

R2304
10KR2J-3-GP

TP2303TPAD14-GP

PCH_SMB_DATA
PEG_CLKREQ# [80]

R2310

DW
10/19 Item 1

+3.3V_ALW

4
3
1
2

1
10KR2J-3-GP

CL_CLK1

IBEXPEAK-M-GP-NF

+3.3V_RUN

2

0R0402-PAD
1
2
1
2
0R0402-PAD

6

1

5

2

4

3

CLK_PCIE_VGA# [80]
CLK_PCIE_VGA [80]

CLK_EXP_N [9]
CLK_EXP_P [9]

PCH_SMBDATA [7,18,19,40,64,65]

Q2301
DMN66D0LDW-7-GP

C

PCH_SMBCLK [7,18,19,40,64,65]

PCH_SMB_CLK

TP2304TPAD14-GP
TP2306TPAD14-GP

1
1

PEG_CLKREQ#

G

[25,86,87] DGPU_PGOOD

DIS

Q2305
2N7002A-7-GP

2 90D9R2F-1-GP

Display Clock Integration
C2313

C2307

X2301

Normal

0R2J-2-GP

DY

DY

DY

dale DCI

SC18P

SC18P

25MHZ

1MR

DY

RN2308
SRN10KJ-7GP

B

R2380

+1.05V_VTT

DW
C2313
SC12P50V2JN-3GP

10/15 Item 6

CLKOUT_PEG_B_N
CLKOUT_PEG_B_P

P13

E10

SML1DATA/GPIO75

R2303

CLKOUTFLEX0/GPIO64

PCIECLKRQ5#/GPIO44

AK53
AK51

SML1CLK/GPIO58

SML1CLK

CLKIN_SATA_N/CKSSCD_N
CLKIN_SATA_P/CKSSCD_P

PCIECLKRQ2#/GPIO20

AJ50
AJ52
PCIE_CLK_RQ5#

SMBus

CLKOUT_PCIE2N
CLKOUT_PCIE2P

N4

SML1ALERT#

D

+3.3V_RUN

10KR2J-3-GP

R2308

PCIECLKRQ1#/GPIO18

AM47
AM48

M14

CLKOUT_PEG_A_N
CLKOUT_PEG_A_P

CLKOUT_PCIE1N
CLKOUT_PCIE1P

U4

SML0DATA

SML0_DATA

SML1ALERT#/GPIO74

WWAN

PCIECLKRQ0#/GPIO73

DW
12/10 Item 3
Reserve 0402 0Ohm resistors
, For RF Team to try solve PCIE noise

LAN

CLKOUT_PCIE0N
CLKOUT_PCIE0P

P9

SML0_CLK

+3.3V_ALW

XTAL25_IN

2 33R2J-2-GP

1

2

2

1

1

PERN7
PERP7
PETN7
PETP7

C6
G8

1

S

AT34
AU34
AU36
AV36

SML0CLK

2

R2380
1MR2J-1-GP

CLK_PCH_48M [77]

XTAL25_OUT

2

(Not available for HM55)

SML0ALERT#

DY EC2338
SC4D7P50V2CN-1GP

2

PERN6
PERP6
PETN6
PETP6

J14

SML0ALERT#/GPIO60

New
Card

PCH_SMB_CLK
PCH_SMB_DATA

PCH_SMB_DATA [77]

1

BA34
AW34
BC34
BD34

C2308 2
C2304 2

+3.3V_ALW
PCH_SMB_CLK [77]

2

PERN5
PERP5
PETN5
PETP5

PCH_SMB_DATA

1

RN2302
SRN2K2J-1-GP

D

1 SCD1U16V2KX-3GP PCIE_ITXN5_NRXN5_C
1 SCD1U16V2KX-3GP PCIE_ITXP5_NRXP5_C

BF33
BH33
BG32
BJ32

C2302 2
C2311 2

C8

2

+3.3V_ALW

8
7
6
5

X2301
XTAL-25MHZ-67GP

1

PERN4
PERP4
PETN4
PETP4

PCH_SMB_CLK

1
2
3
4

1

PCIE_IRXN5_NTXN5
PCIE_IRXP5_NTXP5
PCIE_ITXN5_NRXN5
PCIE_ITXP5_NRXP5

1 SCD1U16V2KX-3GP PCIE_ITXN4_MRXN4_C
1 SCD1U16V2KX-3GP PCIE_ITXP4_MRXP4_C

BA32
BB32
BD32
BE32

SMBALERT#

2

[77]
[77]
[77]
[77]

1 SCD1U16V2KX-3GP PCIE_ITXN3_LRXN3_C
1 SCD1U16V2KX-3GP PCIE_ITXP3_LRXP3_C

PERN3
PERP3
PETN3
PETP3

B9
H14

SML1DAT
SML1CLK
SML0_CLK
SML0_DATA

R2302

Link

PCIE_IRXN4_MTXN4
PCIE_IRXP4_MTXP4
PCIE_ITXN4_MRXN4
PCIE_ITXP4_MRXP4

C2303 2
C2309 2

AU30
AT30
AU32
AV32

SMBDATA

WLAN

Controller

[65]
[65]
[65]
[65]

PERN2
PERP2
PETN2
PETP2

PEG

[76] PCIE_IRXN3_LTXN3
[76] PCIE_IRXP3_LTXP3
[76] PCIE_ITXN3_LRXN3
[76] PCIE_ITXP3_LRXP3

C2318 2
C2310 2

AW30
BA30
1 SCD1U16V2KX-3GP PCIE_ITXN2_MRXN2_C BC30
1 SCD1U16V2KX-3GP PCIE_ITXP2_MRXP2_C BD30

SMBCLK

PCI-E*

PCIE_IRXN2_MTXN2
PCIE_IRXP2_MTXP2
PCIE_ITXN2_MRXN2
PCIE_ITXP2_MRXP2

SMBALERT#/GPIO11

From CLK BUFFER

[64]
[64]
[64]
[64]

PERN1
PERP1
PETN1
PETP1

Clock Flex

D

BG30
BJ30
BF29
BH29

R2301
10KR2J-3-GP

2 OF 10

U2001B

1
2

RN2313
SRN2K2J-2-GP

C2307
SC15P50V2JN-2-GP

Near R23071

1

RN2307
A

8
7
6
5

1
2
3
4

CLKREQ#_LAN
PEG_B_CLKRQ#
PCIE_CLK_RQ5#
MINI2_CLKREQ#

1
2
3
4

8
7
6
5

MINI1_CLKREQ#
NEWCARD_CLKREQ#
PCH_GPIO19
PCH_GPIO38


PCH_GPIO19 [24]
PCH_GPIO38 [25]

A

Wistron Corporation

SRN10KJ-7GP

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Q2306_1

1

Q2306
MMBT3904-7-F-GP

2

R2333
2K2R2J-2-GP

Title

2

[65] MINI2_CLKREQ_R#

3

MINI2_CLKREQ#

PCH (PCI-E/SMBUS/CLOCK/CL)
Size

R2309 1
5

DY

2 0R2J-2-GP

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Document Number

Rev

Vostro Calpella
Date: Monday, January 18, 2010

Sheet
1

23

X01
of

91

5

4

G2401
GAP-OPEN

1

+RTC_CELL

DW

This strap should only be asserted low via
external pull down in manufacturing/debug
environments ONLY.

SRTCRST#

2
1KR2J-1-GP

DY

INTRUDER#

A14

INTVRMEN

R2405 1

2 56R2J-4-GP

ACZ_BIT_CLK

A30

HDA_BCLK

[77] PCH_AZ_CODEC_SYNC

R2407 1

2 33R2J-2-GP

ACZ_SYNC_R

D29

HDA_SYNC

R2408 1

2 33R2J-2-GP

ACZ_RST#_R

P1

SB_SPKR

[77] PCH_AZ_CODEC_RST#
[77] PCH_SDIN_CODEC

C

1
R2419

A16

[77] PCH_AZ_CODEC_BITCLK

[77]

ME_UNLOCK#

RTCRST#

D17

2

10/26 Item 30

Flash Descriptor Security
Override/ ME Debug Mode

C14

SRTCRST#
SM_INTRUDER#
1MR2J-1-GP
PCH_INTVRMEN
2
330KR2F-L-GP
TP2410
1

1
R2406
1
R2404

2

10/22 Item 22

1

C2404
SC1U6D3V3KX-2GP

DW

PCH_RTCRST#

1

ME_UNLOCK#

[77] PCH_SDOUT_CODEC

R2409 1

2 33R2J-2-GP ACZ_SDATAOUT_R
ME_UNLOCK#

[37] ME_UNLOCK#

C30

SPKR

G30

HDA_SDIN0

F30

HDA_SDIN1

E32

HDA_SDIN2

F32

HDA_SDIN3

B29

HDA_SDO

H32

HDA_DOCK_EN#/GPIO33

J30

HDA_DOCK_RST#/GPIO13

2 SB_SPKR
1KR2J-1-GP

2

Low = Default
HDA_SPKR High = No Reboot

INT_SERIRQ
10KR2J-3-GP

B

TP2404

1

PCH_JTAG_TCK

M3

JTAG_TCK

TP2405

1

PCH_JTAG_TMS

K3

JTAG_TMS

TP2406

1

PCH_JTAG_TDI

K1

JTAG_TDI

TP2407

1

PCH_JTAG_TDO

J2

JTAG_TDO

TP2408

1

PCH_JTAG_RST#

J4

TRST#

C34

LDRQ0#
LDRQ1#/GPIO23

A34
F34

SERIRQ

AB9

INT_SERIRQ [37,76]

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

AK7
AK6
AK11
AK9

SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP

AH6
AH5
AH9
AH8

SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP

AF11
AF9
AF7
AF6

SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP

AH3
AH1
AF3
AF1

SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP

AD9
AD8
AD6
AD5

SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP

AD3
AD1
AB3
AB1

SATA_ITXN0_HRXN0_C C2405 1
SATA_ITXP0_HRXP0_C C2406 1

SATAICOMPO

AF16

SATAICOMPI

AF15

SATA_ITXN1_ORXN1_C C2407 1
SATA_ITXP1_ORXP1_C C2408 1

(Not available for HM55)

ESATA
ESATA_TXN4_C
ESATA_TXP4_C

SPI_CLK_R

BA2

SPI_CLK

2 15R2J-GP

SPI_CS#0_R

AV3

SPI_CS0#

AY3

SPI_CS1#

SATALED#

T3

AY1

SPI_MOSI

SATA0GP/GPIO21

Y9

GPO_DSM

AV1

SPI_MISO

SATA1GP/GPIO19

V1

PCH_GPIO19

PCH_AZ_CODEC_BITCLK

ESATA_IRX_DTX_N4_C [63]
ESATA_IRX_DTX_P4_C [63]
ESATA_ITX_DRX_N4 [63]
ESATA_ITX_DRX_P4 [63]

2 SCD01U50V2KX-1GP
2 SCD01U50V2KX-1GP

+1.05V_VTT

2 15R2J-GP

SPI_MOSI_R

C2410 1
C2411 1

SATAICOMP

1

2 15R2J-GP

2 SCD01U50V2KX-1GP
2 SCD01U50V2KX-1GP

SATA_IRXN1_OTXN1_C [59]
SATA_IRXP1_OTXP1_C [59]
SATA_ITXN1_ORXN1 [59]
SATA_ITXP1_ORXP1 [59]
C

1

1

SATA_IRXN0_HTXN0_C [59]
SATA_IRXP0_HTXP0_C [59]
SATA_ITXN0_HRXN0 [59]
SATA_ITXP0_HRXP0 [59]

(Not available for HM55)

R2414

R2415

2 SCD01U50V2KX-1GP
2 SCD01U50V2KX-1GP

ODD

R2413

[62] PCH_SPI_DO

D

[37,70,76]

LPC_LFRAME# [37,70,76]

[62] PCH_SPI_CS0#

[62] PCH_SPI_DI

LPC_LAD[0..3]

LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3

[62] PCH_SPI_CLK

R2412 1

2 37D4R2F-GP

B

SPI

1
R2411

DY

FWH4/LFRAME#

HDA_RST#

JTAG

No Reboot Strap R23
1
R2410

FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3

D33
B33
C32
A32

HDD

NO REBOOT STRAP

+3.3V_RUN

LPC

TP2409

2

R2403
20KR2F-L-GP
1
2

RTCX1
RTCX2

SATA

+RTC_CELL

B13
D13

LPC_LAD[0..3]

1 OF 10

U2001A
PCH_RTCX1
PCH_RTCX2

RTC

C2403
SC15P50V2JN-2-GP

2

2

3

IHDA

1
2

INTVRMEN- Integrated SUS
1.1V VRM Enable
High - Enable internal VRs

2

C2401
SC1U6D3V3KX-2GP

1

C2402
SC15P50V2JN-2-GP

1

R2402
20KR2J-L2-GP
1
2

X2401
X-32D768KHZ-67-GP
1
4

D

2

+RTC_CELL

PCH_RTCX2

1

PCH_RTCX1

1
2
R2401
10MR2J-L-GP

3

SATA_LED# [66]
GPO_DSM [25]
PCH_GPIO19 [23]

1

IBEXPEAK-M-GP-NF

2

RFC01
AOZ8131DI-05L-GP

EMI Request



A

A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

PCH (SPI/RTC/LPC/SATA/IHDA)
Size

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Document Number

Rev

Vostro Calpella
Date: Monday, January 18, 2010

Sheet
1

24

X01
of

91

5

4

3

2

1

10/15 Item 1

C38

TACH1/GPIO1

[78]

BIO_DET#

BIO_DET#

D37

TACH2/GPIO6

ECSWI#

J32

TACH3/GPIO7

ECSMI#

F10

GPIO8

ECSMI#

2

DW

PCH_GPIO15

12/08 Item 5

R2505
1 0R2J-2-GP
2

DY

[23,86,87] DGPU_PGOOD

R3749
1

[54] LCD_CBL_DET#

DGPU_HOLD_RST#

[80] DGPU_HOLD_RST#
R2506
0R0402-PAD
1
2

DGPU_PWROK

2 100R2J-2-GP

TPAD14-GP

DW

LCD_CBL_DET_R#

TP2508

1

10/29 Item 1

2
R2525
10KR2J-3-GP

1
[68]

KB_DET#

R2548 1

[40] FFS_INT2_R
[37] TURBO_BOOST_ALERT#
+3.3V_ALW
RN2512
DDR_RST_GATE
ECSMI#

1
2

R2526 2

STP_PCI#
[24]

RN2515 1
2

GPO_DSM

2

R2508
0R0402-PAD

DW

[9,22] XDP_DBRESET#

RN2514 1
KB_DET_R#
2

DGPU_PWROK

R2507 2

SCLOCK/GPIO22

STP_PCI#

M11

STP_PCI#/GPIO34

PECI
RCIN#

TPAD14-GP

TP2510

PROCPWRGD

BE10

THRMTRIP#

BD10

TP1

BA22

SATA3GP/GPIO37

TP2

AW22

V3

SLOAD/GPIO38

TP3

BB22

P3

SDATAOUT0/GPIO39

TP4

AY45

PCIECLKRQ6#

H3

PCIECLKRQ6#/GPIO45

TP5

AY46

DDR_RST_GATE

F1

PCIECLKRQ7#/GPIO46

TP6

AV43

FFS_INT2_R

AB6

SDATAOUT1/GPIO48

TP7

AV45

T_B_ALERT_R#

AA4

SATA5GP/GPIO49

TP8

AF13

GPIO57

TP9

M18

TP10

N18

TP11

AJ24

TP12

AK41

TP13

AK42

TP14

M32

TP15

N32

TP16

M30

TP17

N30

TP18

H12

PCH_NCTF_1

4
3
SRN10KJ-5-GP
4
3

TPAD14-GP

TP2511

1

PCH_NCTF_2

TPAD14-GP

TP2512

1

PCH_NCTF_3

SRN10KJ-5-GP
1 10KR2J-3-GP

TPAD14-GP

DW

TP2509

1

PCH_NCTF_4

A4
A49
A5
A50
A52
A53
B2
B4
B52
B53
BE1
BE53
BF1
BF53
BH1
BH2
BH52
BH53
BJ1
BJ2
BJ4
BJ49
BJ5
BJ50
BJ52
BJ53
D1
D2
D53
E1
E53

VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31

TP19

AA23

NC_1

AB45

NC_2

AB38

NC_3

AB42

NC_4

AB41

NC_5

T39

INIT3_3V#
TP24

+3.3V_RUN

10/28 Item 4

KBRCIN#

[37]

H_PWRGOOD [9,42]
PCH_THERMTRIP_R

1
R2511
56R2J-4-GP

2

H_THRMTRIP# [9,37,42]

PCH

SATACLKREQ#/GPIO35
SATA2GP/GPIO36

F8

R2509
56R2J-4-GP

H_PECI [9]

Placed Within 2" from

AB7

PCH_GPIO57

1

BG10

+1.05V_VTT

T1

AB13

4
3

RN2513 1
2

Y7

GPIO28

SRN10KJ-5-GP
DGPU_PWR_EN#
BIO_DET#

BCLK_CPU_P [9]

GPIO27

+3.3V_RUN
B

BCLK_CPU_N [9]

AM1

V13

1 10KR2J-3-GP

DY

AM3

CLKOUT_BCLK0_P/CLKOUT_PCIE8P

12/08 Item 5

4
3

SRN10KJ-5-GP
PCH_GPIO27

1

KA20GATE [37]

CLKOUT_BCLK0_N/CLKOUT_PCIE8N

AB12

2100R2J-2-GP KB_DET_R#

[9] DDR_RST_GATE

U2

TACH0/GPIO17

PCH_GPIO28

PCH_GPIO38

[23] PCH_GPIO38

A20GATE

D

SATA4GP/GPIO16

PCH_GPIO27

DGPU_PWR_EN#

AF48
AF47

F38

V6

[37] DGPU_PWR_EN#

CLKOUT_PCIE7N
CLKOUT_PCIE7P

AA2

GPIO24

DGPU_PRSNT#
C

GPIO15

H10

TouchPanel_Stop

[76] TouchPanel_Stop

LAN_PHY_PWR_CTRL/GPIO12

T7

NCTF

[9,37,49,50] VTT_PWRGD

K9

AH45
AH46

1

1

[37]

DY

CLKOUT_PCIE6N
CLKOUT_PCIE6P

2

ECSCI#

MISC

ECSCI#

ECSWI#

C2501
SC47P50V2JN-3GP

BMBUSY#/GPIO0

[21,37]

CPU

DIS

Y3

D

[37]

6 OF 10

U2001F
DEEPIDLE_WAKE_INT#

GPIO

Q2515
MMBT3904-7-F-GP
2

2

1 2

Q2515_1

3

[81] DEEPIDLE_WAKE_INT_R#

DW

R2503
10KR2J-3-GP

RSVD

2

DIS
1

R2552
10KR2J-3-GP

+3.3V_RUN

DIS R2555
2K2R2J-2-GP

1

+3.3V_RUN_GPU

1

+3.3V_RUN_GPU

P6

C

B

INIT3_3V#

1

TP2506TPAD14-GP

C10

IBEXPEAK-M-GP-NF

1

2 10KR2J-3-GP

PCH_GPIO28
PCH_GPIO57
PCH_GPIO15
PCIECLKRQ6#

R2530
R2531
R2532
R2533

1
1
1
1

10KR2J-3-GP
10KR2J-3-GP
1KR2J-1-GP
10KR2J-3-GP

+3.3V_RUN

UMA R2527
10KR2J-3-GP

+3.3V_ALW

2
2
2
2

DGPU_PRSNT#

DY R2516
10KR2J-3-GP

DGPU_HOLD_RST#

1

A

+3.3V_RUN

2

R2524

DIS



A

1

LCD_CBL_DET_R#

Wistron Corporation

1

1

2 10KR2J-3-GP

1

R2519

2

ECSWI#

R2528
10KR2J-3-GP

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

R2534
10KR2J-3-GP

PCH (GPIO/CPU)

2

2

Title
Size

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Document Number

Rev

Vostro Calpella
Date: Monday, January 18, 2010

Sheet
1

25

X01
of

91

5

4

3

2

1

DW

POWER

AD35

2

+1.05V_VTT

BJ18
AM23

1

1
2

2
C2626
SC10U6D3V5MX-3GP

59mA

L2604
IND-D1UH-21-GP

DW
10/26 Item 2

+3.3V_RUN

C2607
SCD1U10V2KX-5GP
C

VCCVRM[1]
VCCFDIPLL
VCCIO

DW

AT24

VCCDMI

AT16

VCCDMI

AU16

35mA

+1.05VS_VCC_DMI

+1.05V_VTT

1
C2613
SC1U10V3KX-3GP

2

R2601

58mA

0R0402-PAD

DW
12/08 Item 5

VCCPNAND
VCCPNAND
VCCPNAND
VCCPNAND
VCCPNAND
VCCPNAND
VCCPNAND
VCCPNAND
VCCPNAND

156mA

VCC3_3

VCCVRM

AM16
AK16
AK20
AK19
AK15
AK13
AM12
AM13
AM15

+3.3V_RUN

156mA
C2615
SCD1U10V2KX-5GP

+3.3V_RUN
B

1

DY

B

357mA

AN35
R2606
+VCC_VRM
0R0402-PAD
AT22
2
1 +VCC_VRM

DY

C2624

2

VCCME3_3
VCCME3_3
VCCME3_3
VCCME3_3

85mA

85mA

AM8
AM9
AP11
AP9

PCH_VCCME3_3

12/08 Item 5

C2622
SCD1U10V2KX-5GP

DW
12/08 Item 5

2

IBEXPEAK-M-GP-NF

R2605
0R0402-PAD

2

C2616
SC10U6D3V5MX-3GP

+1.8V_RUN

1

357mA
1

VCCIO
VCCIO

C2625

1

1

DY

+1.8V_RUN

DY2

+VCC_VRM

NAND / SPI

+1.05VS_VCCAPLL_FDI

1
2
L2602
IND-1UH-2-GP

+3.3V_RUN

<1mA

1

2

AN30
AN31

3.062A

2

1

AB35

VCC3_3

R2609
0R0603-PAD-1-GP

2

AB34

VCC3_3

12/08 Item 5

SCD1U10V2KX-5GP
+1.8VS_VCCTX_LVDS

1

VCC3_3

357mA

D

DW

C2623
1

1

VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO

+3.3V_RUN

C2603
SC10U6D3V5MX-3GP

2

AN20
AN22
AN23
AN24
AN26
AN28
BJ26
BJ28
AT26
AT28
AU26
AU28
AV26
AV28
AW26
AW28
BA26
BA28
BB26
BB28
BC26
BC28
BD26
BD28
BE26
BE28
BG26
BG28
BH27

2

1

LVDS

VCCTX_LVDS

VCCAPLLEXP

FDI

+1.05V_VTT

AH39

VCCTX_LVDS
VCCTX_LVDS

2

C2614
SCD1U10V2KX-4GP

1

+3.3V_RUN

VSSA_LVDS

1

1

1
2

2

C2612
SC1U10V3KX-3GP

SC4D7U6D3V3KX-GP

DY

C2611

2

1

C2610
SC4D7U6D3V3KX-GP

DY
2

1

C2609
SC1U10V3KX-3GP

SC10U6D3V5KX-1GP

2

C2608

1

3.062A

C

AH38

C2605

2

2

+1.05V_VTT

40mA

VCCALVDS

59mAVCCTX_LVDS

HVCMOS

C2606
SC10U6D3V5MX-3GP

DY

AF51

AP43
AP45
AT46
AT45

DMI

1

IND-1UH-2-GP

BJ24

AF53

VSSA_DAC

2

<1mA

PCI E*

+1.05VS_VCCAPLL_EXP

2

VSSA_DAC

C2604

SCD01U16V2KX-3GP

40mAL2601
1
DY

AE52

SCD01U16V2KX-3GP

+1.05VS_VCCAPLL_EXP

VCCIO

VCCADAC

L2603
1
2
PBY160808T-181Y-GP

+VCCA_DAC_1_2

+3VS_VCCA_LVD

+1.05V_VTT

AK24

AE50

1

CRT

1.432A

VCC CORE

1
2

1
2

7 OF 10

VCCADAC

SCD1U10V2KX-5GP

D

C2602
SC1U10V2KX-1GP

VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE

SCD01U16V2KX-3GP

C2601
SC10U6D3V5KX-1GP

AB24
AB26
AB28
AD26
AD28
AF26
AF28
AF30
AF31
AH26
AH28
AH30
AH31
AJ30
AJ31

2

U2001G

1.432A

+1.05V_VTT

10/26 Item 3

69mA

+1.05V_VTT



A

A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

PCH (POWER1)
Size

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Document Number

Rev

Vostro Calpella
Date: Monday, January 18, 2010

Sheet
1

26

X01
of

91

5

4

3

L2701
IND-10UH-203-GP

AP53

VCCACLK

AF23

VCCLAN

AF24

VCCLAN

VCCME

2

VCCME

1

Y42

VCCME

V9

DCPRTC

AU24

VCCVRM

BB51
BB53

VCCADPLLA
VCCADPLLA

68mA

BD51
BD53

VCCADPLLB
VCCADPLLB

69mA

AH23
AJ35
AH35

VCCIO
VCCIO
VCCIO

AF34

VCCIO

AH34

VCCIO

AF32

VCCIO

<1mA

VCCIO

V23

V5REF_SUS

F24

+5VALW_PCH_VCC5REFSUS

V5REF

K49

+5VS_PCH_VCC5REF

VCC3_3

J38

VCC3_3

L38

VCC3_3

M36

VCC3_3

N36

VCC3_3

P36

VCC3_3

U35

VCC3_3

AD13

<1mA

DCPSST

AK3
AK1

VCCSUS3_3

U20

VCCSUS3_3

1

2
R2702
100R2J-2-GP

C2715
SC1U10V2KX-1GP

C2721
SC1U10V2KX-1GP

VCCIO

AH22

VCCVRM

AT20

VCCIO

AH19

VCCIO

AD20

VCCIO

AF22

VCCIO
VCCIO
VCCIO
VCCIO

AD19
AF20
AF19
AH20

VCCIO
VCCIO
VCCIO
VCCIO

AB19
AB20
AB22
AD22

VCCME
VCCME
VCCME
VCCME

AA34
Y34
Y35
AA35

DY

+1.05V_VTT

31mA

2

C2722

DYSC1U10V2KX-1GP

B

2

+1.05V_VTT

C2725
SC1U10V2KX-1GP

U22

VCCSUS3_3

V15

VCC3_3

V16

VCC3_3

Y16

VCC3_3

C2727
SCD1U10V2KX-4GP

2

1

2

+3.3V_RUN

SATA

2
U19

1

163mA

V_CPU_IO

<1mA

2mA

IBEXPEAK-M-GP-NF

6mA

VCCSUSHDA

L30

+1.05V_VTT

R2707
0R0402-PAD

6mA

1



2

2

C2733

C2731
SC1U10V2KX-1GP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

DW
12/08 Item 5

Title
+3VS_+1.5VS_HDA_IO
Size

http://laptop-motherboard-schematic.blogspot.com/
4

A

+3.3V_ALW

1

VCCRTC

HDA

A12

RTC

2

V_CPU_IO

CPU

1

C2730

AU18

1

2
C2732

AT18

2

2mA

1

+RTC_CELL

2

1
2

A

C2729

SCD1U16V2KX-3GP SCD1U10V2KX-4GP

C2728
SC10U6D3V5KX-1GP

SCD1U16V2KX-3GP SCD1U10V2KX-4GP

<1mA

1

+1.05V_VTT

5

1

+VCC_VRM

VCCSUS3_3

196mA

PCI/GPIO/LPC

+3.3V_ALW

C2726
SCD1U10V2KX-4GP

L2704
IND-10UH-203-GP

31mA

2

DCPSUS

P18

C

C2717
SCD1U10V2KX-4GP

1

VCCSATAPLL
VCCSATAPLL

C2724
SCD1U10V2KX-4GP

2

1

Y22

+5V_RUN

D2702
CH751H-40PT-GP

C2712
SC1U10V2KX-1GP

+1.05VS_VCCAPLL

1
2

+1.05VALW_INT_VCCSUS

R2701
100R2J-2-GP

+3.3V_RUN

C2716
SCD1U10V2KX-4GP

1

V12

2

1

DY

C2723
SCD1U10V2KX-4GP

1

+3.3V_RUN

1

+VCCSST
B

+5V_ALW
+3.3V_RUN

+1.05V_VTT

1
2

1

C2720
SC1U10V2KX-1GP

2

1
2

C2719
SC1U10V2KX-1GP

U23

2

68mA +1.05VS_VCCA_A_DPL
69mA +1.05VS_VCCA_B_DPL

+1.05V_VTT

C2718
SC1U10V2KX-1GP

VCCSUS3_3

D2701
CH751H-40PT-GP

1

Y41

C2709
SCD1U10V2KX-4GP

2

VCCME

+3.3V_ALW
+3.3V_ALW

1

Y39

+VCC_VRM

2
C2714
SC1U10V2KX-1GP

2

DY

C2735
SC10U6D3V5MX-3GP

VCCME

PCI/GPIO/LPC

1

1

IND-10UH-222-GP

1

+1.05VS_VCCA_B_DPL

2

L2703

1

+VCCRTCEXT
C2713
SCD1U10V2KX-4GP

2

VCCME

V42

C2711
SC1U10V2KX-1GP

2

2

DY

VCCME

V41

Clock and Miscellaneous

C2734
SC10U6D3V5MX-3GP

1

DY

V39

2

AF42

163mA

1.849A

1

VCCME

2

VCCME

AF41

2

VCCME

AF43

1

VCCME

AD41

D

C2703
SCD1U10V2KX-4GP

1

VCCME

AD39

+3.3V_ALW

1

AD38

2

2

C2710
SC1U10V2KX-1GP

+1.05VS_VCCA_A_DPL

2

1

1

1

2

C2708
SC1U10V2KX-1GP

1

1

1.849A

C

V28
U28
U26
U24
P28
P26
N28
N26
M28
M26
L28
L26
J28
J26
H28
H26
G28
G26
F28
F26
E28
E26
C28
C26
B27
A28
A26

2

DCPSUSBYP

USB

+1.05V_VTT

L2702
IND-10UH-222-GP

VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3

C2706
SC1U10V2KX-1GP

1

Y20

320mA

2

C2707
SCD1U10V2KX-4GP

+1.05V_VTT

V24
V26
Y24
Y26

52mA

1

DCPSUSBYP

C2704
SC10U6D3V5KX-1GP

VCCIO
VCCIO
VCCIO
VCCIO

2

D

C2705
SC10U6D3V5KX-1GP

+1.05V_VTT

10 OF 10

1

VCCACLK

2

AP51

2

10/28 Item 5

C2702

DY

2

DY

DW

POWER

U2001J

1

C2701

2

DY

1

+1.05VS_VCCA_CLK

2

SC1U10V2KX-1GP

1

SC10U6D3V5MX-3GP

52mA

1

+1.05V_VTT

2

3

2

Document Number

PCH (POWER2)

Rev

Vostro Calpella
Date: Monday, January 18, 2010

Sheet
1

27

X01
of

91

5

4

3

D

8 OF 10

U2001H

C

B

AB16

VSS

AA19
AA20
AA22
AM19
AA24
AA26
AA28
AA30
AA31
AA32
AB11
AB15
AB23
AB30
AB31
AB32
AB39
AB43
AB47
AB5
AB8
AC2
AC52
AD11
AD12
AD16
AD23
AD30
AD31
AD32
AD34
AU22
AD42
AD46
AD49
AD7
AE2
AE4
AF12
Y13
AH49
AU4
AF35
AP13
AN34
AF45
AF46
AF49
AF5
AF8
AG2
AG52
AH11
AH15
AH16
AH24
AH32
AV18
AH43
AH47
AH7
AJ19
AJ2
AJ20
AJ22
AJ23
AJ26
AJ28
AJ32
AJ34
AT5
AJ4
AK12
AM41
AN19
AK26
AK22
AK23
AK28

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

IBEXPEAK-M-GP-NF
A

AK30
AK31
AK32
AK34
AK35
AK38
AK43
AK46
AK49
AK5
AK8
AL2
AL52
AM11
BB44
AD24
AM20
AM22
AM24
AM26
AM28
BA42
AM30
AM31
AM32
AM34
AM35
AM38
AM39
AM42
AU20
AM46
AV22
AM49
AM7
AA50
BB10
AN32
AN50
AN52
AP12
AP42
AP46
AP49
AP5
AP8
AR2
AR52
AT11
BA12
AH48
AT32
AT36
AT41
AT47
AT7
AV12
AV16
AV20
AV24
AV30
AV34
AV38
AV42
AV46
AV49
AV5
AV8
AW14
AW18
AW2
BF9
AW32
AW36
AW40
AW52
AY11
AY43
AY47

1

9 OF 10

U2001I

AY7
B11
B15
B19
B23
B31
B35
B39
B43
B47
B7
BG12
BB12
BB16
BB20
BB24
BB30
BB34
BB38
BB42
BB49
BB5
BC10
BC14
BC18
BC2
BC22
BC32
BC36
BC40
BC44
BC52
BH9
BD48
BD49
BD5
BE12
BE16
BE20
BE24
BE30
BE34
BE38
BE42
BE46
BE48
BE50
BE6
BE8
BF3
BF49
BF51
BG18
BG24
BG4
BG50
BH11
BH15
BH19
BH23
BH31
BH35
BH39
BH43
BH47
BH7
C12
C50
D51
E12
E16
E20
E24
E30
E34
E38
E42
E46
E48
E6
E8
F49
F5
G10
G14
G18
G2
G22
G32
G36
G40
G44
G52
AF39
H16
H20
H30
H34
H38
H42

2

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

H49
H5
J24
K11
K43
K47
K7
L14
L18
L2
L22
L32
L36
L40
L52
M12
M16
M20
N38
M34
M38
M42
M46
M49
M5
M8
N24
P11
AD15
P22
P30
P32
P34
P42
P45
P47
R2
R52
T12
T41
T46
T49
T5
T8
U30
U31
U32
U34
P38
V11
P16
V19
V20
V22
V30
V31
V32
V34
V35
V38
V43
V45
V46
V47
V49
V5
V7
V8
W2
W52
Y11
Y12
Y15
Y19
Y23
Y28
Y30
Y31
Y32
Y38
Y43
Y46
P49
Y5
Y6
Y8
P24
T43
AD51
AT8
AD47
Y47
AT12
AM6
AT13
AM5
AK45
AK39
AV14

D

C

B



A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

IBEXPEAK-M-GP-NF

PCH (VSS)
Size

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Document Number

Rev

Vostro Calpella
Date: Monday, January 18, 2010

Sheet
1

28

X01
of

91

5

4

3

2

1

D

D

C

C

(Blank)

B

B

A

A



Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
Document Number
Custom

(Reserve)

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet
1

29

of

91

5

4

3

2

1

D

D

C

C

(Blank)

B

B

A

A



Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
Document Number
Custom

(Reserve)

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet
1

30

of

91

5

4

3

2

1

D

D

C

C

(Blank)

B

B

A

A



Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
Document Number
Custom

(Reserve)

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet
1

31

of

91

5

4

3

2

1

D

D

C

C

(Blank)

B

B



A

A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
A3

Document Number

Reserve

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet
1

32

of

91

5

4

3

2

1

D

D

C

C

(Blank)

B

B

A

A



Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
Document Number
Custom

(Reserve)

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet
1

33

of

91

5

4

3

2

1

D

D

C

C

(Blank)

B

B

A

A



Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
Document Number
Custom

(Reserve)

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet
1

34

of

91

5

4

3

2

1

D

D

C

C

(Blank)

B

B



A

A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
A3

Document Number

(Reserve)

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet
1

35

of

91

5

4

3

2

1

D

D

C

C

(Blank)

B

B



A

A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
A3

Document Number

(Reserve)

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet
1

36

of

91

3

KBC_PWR

1

3

10/15 Item 3

+3.3V_RUN

+3.3V_RTC_LDO

2
1
2

[66] PWRLED#
[66] PWR_BTN_LED#
[68] KB_BL_CTRL

[54]
[47]
[43]
[86]
[24]
[63,76]

BLON_OUT
IMVP_VR_ON
PSID_DISABLE#
GFX_CORE_EN
ME_UNLOCK#
USB_PWR_EN#

1 R3706

2 0R0402-PAD

1 R3719

2 0R0402-PAD

KBC_PWRBTN_EC#
AC_IN_R#
LID_CLOSE#
PCB_VER0
SW_UMA_ID
1D5V_VGA_ON
PCB_VER1
PWRLED#
PWR_BTN_LED#
KB_BL_CTRL
AD_OFF
RSMRST#_KBC
PM_SLP_S4#
NUM_LOCK_LED#
3V_5V_POK
PM_PWROK_R
EC_SPI_WP#_R
EC_PWR_SHDN#
BLON_OUT
IMVP_VR_ON_R
PSID_DISABLE#
GFX_CORE_EN
ME_UNLOCK#
USB_PWR_EN#

64
95
93
94
119
6
109
120
65
66
16
17
20
21
22
23
24
25
26
27
28
73
74
75
110

GPIO01/TB2
GPIO03
GPIO06
GPIO07
GPIO23
GPIO24
GPIO30
GPIO31
GPIO32/D_PWM
GPIO33/H_PWM
GPIO40/F_PWM
GPIO42/TCK
GPIO43/TMS
GPIO44/TDI
GPIO45/E_PWM
GPIO46/TRST#
GPIO47
GPIO50/TDO
GPIO51
GPIO52/RDY#
GPIO53
GPIO70
GPIO71
GPIO72
GPO82/TRIS#

1

2

2

1

2

1

S
D

2

G

2

1

6$
6%
6&







SML1DAT
SML1CLK
BAT_SDA
BAT_SCL

PANEL_BKEN_GPU [81]

1

PANEL_BKEN_PCH

[24,70,76]

[20]

E51_RxD
R3725

44

2AGND 103

PM_LAN_ENABLE [76]
1
2 0R0402-PAD
S5_ENABLE [42]

BAT_SDA
BAT_SCL

[22] PCH_SUSCLK_KBC

DY

K

ECSCI#_KBC

WIRELESS_ON#/OFF 1
R3740
S5_ENABLE
1
R3728
KCOL0
1
R3714
SHBM_LCDTST_EN
1
R3717
BLUETOOTH_EN
1
R3731
PANEL_BKEN
1
R3739
2 OF 2

32KX1/32KCLKIN

SW_UNSW_ID 79
AMP_MUTE# 30

32KX2
GPIO55/CLKOUT

63
117
SHBM_LCDTST_EN31
32
118
62

GPIO14/TB1
GPIO20/TA2
GPIO56/TA1
GPIO15/A_PWM
GPIO21/B_PWM
GPIO13/C_PWM

1

R3727

DY 2K2R2J-2-GP

2
2

DY
DY

2
2
2
2

SW_UNSW_ID
100KR2J-1-GP

R3742
2K2R2J-2-GP

10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP

Pull High : Dis Only
Pull Low : UMA + Switch Board

10KR2J-3-GP
10KR2J-3-GP

13
12
11
10
71
72

GPIO12/PSDAT3
GPIO25/PSCLK3
GPIO27/PSDAT2
GPIO26/PSCLK2
GPIO35/PSDAT1
GPIO37/PSCLK1

KBSOUT0/JENK#
KBSOUT1/TCK
KBSOUT2/TMS
KBSOUT3/TDI
KBSOUT4/JEN0#
KBSOUT5/TDO
KBSOUT6/RDY#
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12/GPIO64
KBSOUT13/GPIO63
KBSOUT14/GPIO62
KBSOUT15/GPIO61/XOR_OUT
GPIO60/KBSOUT16
GPIO57/KBSOUT17

53
52
51
50
49
48
47
43
42
41
40
39
38
37
36
35
34
33

KCOL0
KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
TP_KCOL171

KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7

54
55
56
57
58
59
60
61

KROW0
KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7

VCC_POR#

85

ECRST#

KBC

12/08 Item 5

EC_SPI_DI
SPI_DIO
EC_SPI_CS#
EC_SPI_CLK

R3753

1

R3735

1

86
87
90
2 0R0402-PADEC_SPI_CLK_C 92
2 0R0402-PADEC_SPI_DO

F_SDI
F_SDO
F_CS0#
F_SCK

FIU

[68]

B

DW
10/16 Item 1

TP3701
KROW[0..7]

PS/2

KBC_PWR

[68]

A

2

U3704
R3718
4K7R2J-2-GP

1

GND

DY

3

VCC

1

NPCE781BA0DX-GP

R3724
10KR2J-3-GP
2 ECRST#



RESET#

1

2

Wistron Corporation
E

1

2

R3702
0R0402-PAD

ECRST#_C B
Q3702
CH3906PT-GP

DY C3707
2

[39,42] PURE_HW_SHUTDOWN#

74.00690.I7B

SC1U10V3KX-3GP

01/11 Item 1

C

http://laptop-motherboard-schematic.blogspot.com/
DW

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

1

G690L293T73UF-GP
CAPA2_INT_R#

1

1 2

KBC_PWR

SRN10KJ-7GP

77

3.3V_RUN_GPU_EN
1.05V_GFX_ON
SCR_LOCK_LED#
R3707 2 100R2J-2-GP
LCD_TST_R
1
TPDATA
TPCLK

[87] 3.3V_RUN_GPU_EN
[87] 1.05V_GFX_ON
[66] SCR_LOCK_LED#
[54] LCD_TST
[68] TPDATA
[68] TPCLK

1
R3738
2K2R2J-2-GP

2

+3.3V_RUN

5
6
7
8

KCOL[0..16]

[47] IMVP_VR_PWRGD
[22] PM_PWRBTN#
[54] SHBM_LCDTST_EN
[77] KBC_BEEP
[66] BATT_ORANGE_LED
[54] LBKLT_CTL_EC

[62]
[62]
[62]
[62]

E51_TxD

3

4
3
2
1

ECSMI#_KBC

KBC_PWR

CAPA_INT#

DW

100KR2J-1-GP

1

+3.3V_RUN

[78]

TURBO_BOOST_ALERT#
KB_BL_DET#
KA20GATE
KBRCIN#

U3701B
KBC_XI

[77] AMP_MUTE#

PLT_RST# [9,21,64,65,70,76,77,80]

Q3709_1

2

C

DY

RN2312

K

A

1
2

10/16 Added
1.Added Switch Baord Detection circuit , For software request.
2.Removed CAPA_RST# from Capacity board..

DW

Q3709
MMBT3904-7-F-GP
2

10KR2J-3-GP

SRN4K7J-8-GP

C3710 need place near pin 44.

C3717
SC470P50V2KX-3GP

A

2

4
3

D3701
BAS16XV2T1G-GP-U

R3741
0R0402-PAD
1
2

DY

KBC_THERMTRIP#
1
R3709

ECSWI#_KBC

K

A

ECSCI#

ECSMI#

C3710
SC1U10V3KX-3GP

DGPU_SELECT# [21,54,74]

KBC_PWR

VTT_PWRGD [9,25,49,50]

12/08 Item 5

KBC_VCORF

12/03 Item 2

1

1

RN3701

E51_TxD [64]
E51_RxD [64]
AC_PRESENT_EC [22]

1

2

A

[77]

DGPU_SELECT#

73.03157.C0H

SCD1U16V2KX-3GP

C KBC_THERMTRIP#

E

ECSWI#

WIRELESS_ON#/OFF

C3705
SCD1U10V2KX-4GP

DIS

+3.3V_RUN

C3716
THERMTRIP_GATE
2
1

D3703
BAS16XV2T1G-GP-U

DW

DW
R3720
300R2J-2

2

[25]

PANEL_BKEN

4
5
6

NC7SB3157P6X-1GP

H=>B1 -iGPU PCH (UMA)
L=>B0 -dGPU GPU (DIS)

D3702
BAS16XV2T1G-GP-U

[21,25]

VTT_PWRGD_G34
R3723

A
VCC
S

R3737
2K2R2J-2-GP

BLUETOOTH_EN [77]
WIFI_RF_EN [64]

E51_TxD
E51_RxD

B0
GND
B1

DIS

BATT_WHITE_LED [66]

WIRELESS_ON#/OFF

3
2
1

PANEL_BKEN_PCH

DY
D3712
BAT54C-7-F-GP

ECSMI#_KBC

NPCE781BA0DX-GP

9(5

PLT_RST1#_1

DYR3736
4K7R2J-2-GP

PANEL_BKEN_GPU

+1.05V_VTT

[23]
[23]
[76]
[76]

R3730
0R2J-2-GP






2 0R2J-2-GP

UMA

2

2

[9,25,42] H_THRMTRIP#

1

9(5

1

1

GPIO41

LPC_LAD[0..3]

ECSCI#_KBC
PANEL_BKEN
ECSWI#_KBC

AGND

GND
GND
GND
GND
GND
GND
2
1
10KR2J-3-GP
R3711

DY DY

12/03 Item 3

1

80

102

4
VDD

AVCC

GPIO16
GPIO34
GPIO36

0%9(56,21,'

DW

DW

+3.3V_RUN

INT_SERIRQ [24,76]
PM_CLKRUN# [22]
KBRCIN# [25]
KA20GATE [25]

81

114
14
15

116
89
78
45
18
5

1

1
2

10KR2J-3-GP
R3732

R3708
10KR2J-3-GP

LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3

BATT_WHITE_LED

111
113
112

VCORF

PCB_VER0
PCB_VER1

AC_IN# [76]

R3703

CAP_LOCK_LED# [66]
PCLK_KBC [21]
LPC_LFRAME# [24,70,76]

SML1DAT
SML1CLK

GPO83/SOUT_CR/BADDR1
GPIO87/SIN_CR
GPO84/BADDR0

12/08 Item 5

R3701
10KR2J-3-GP

CAP_LOCK_LED#
PLT_RST1#_1

68
67
69
70

84
83
82
91

GPIO77
GPIO76/SHBM
GPIO75
GPIO81

SER/IR

+3.3V_RUN

D
KBC_PWR

KBC_ON#

D

[76]

[25]

DW

B

DY

PANEL_BKEN 3

124
7
2
3
126
127
128
1
125
8
122
121
29
9
123

GPIO66/G_PWM

SPI

GPIO

THERM_SCL [39,78]

10/22 Item

BAT_IN#

GPIO74/SDA2
GPIO73/SCL2
GPIO22/SDA1
GPIO17/SCL1

SMB

SP

1
DMN66D0LDW-7-GP

2

PM_SLP_S3#

[69] LID_CLOSE#

AD_OFF
RSMRST#_KBC
PM_SLP_S4#
NUM_LOCK_LED#
3V_5V_POK
PM_PWROK
EC_SPI_WP#_R

D/A

6

SML1DAT

2

[22,42,50,51,77,86]

[76]
[22]
[22,50,77]
[66]
[22,46]
[22]
[62]

GPI94
GPI95
GPI96
GPI97

DY

Q3701
CH3904PT-GP

[87] 1D5V_VGA_ON

UMA

LPC

2

Q3704
SI2301BDS-T1-GP

G

2

DIS R3716
2K2R2J-2-GP

GPI90/AD0
GPI91/AD1
GPI92/AD2
GPI93/AD3
GPIO05
GPIO04

1 OF 2

GPIO10/LPCPD#
LRESET#
LCLK
LFRAME#
LAD0
LAD1
LAD2
LAD3
SERIRQ
GPIO11/CLKRUN#
KBRST#
GA20
ECSCI#/GPIO54
GPIO65/SMI#
GPIO67/PWUREQ#

A/D

3

5

U3703

2

1

Pull High : Discrete
internal Pull Low for UMA

VREF

D3707
BAT54C-U-GP

2

97
98
THERMTRIP_VGA_R# 99
100
TURBO_BOOST_ALERT#
108
KBC_THERMTRIP#
96

SUS_PWR_DN_ACK
101
R3712 1
100R2J-2-GP
KB_BL_DET_R#105
2
DGPU_PWR_EN#
106
CAPA2_INT_R#
107

[22] SUS_PWR_DN_ACK
[68] KB_BL_DET#
[25] DGPU_PWR_EN#

KBC_PWR

DY

Q3706
2N7002A-7-GP

SML1CLK

4

R3754
10KR2J-3-GP

B

AD_IA_KBC

[43] PS_ID_EC
[25] TURBO_BOOST_ALERT#

115
88
76
46
19

U3701A

1

DY 3
C3714
SC4D7U10V3KX-GP
EC_PWR_SHDN# S

VCC
VCC
VCC
VCC
VCC

1
2

C3715
SCD1U10V2KX-4GP

1
2

C3706
SC2D2U10V3KX-1GP

2

1

C3701
SCD1U10V2KX-4GP

1
2

C3708
SCD1U10V2KX-4GP

1
2

2

C3713
SCD1U10V2KX-4GP

1

C3711
SCD1U10V2KX-4GP

1
2

C3712
SCD1U10V2KX-4GP

1
2

C3702
SC2D2U10V3KX-1GP

AGND

C3703
SCD1U10V2KX-4GP

KBC_ON#

1

KBC_PWR
VBAT

2

DY

2

R3744
10KR2J-3-GP

+3.3V_RTC_LDO

AC_IN_R#

2

1

U3702
[39,78] THERM_SDA

DY

R3751
0R2J-2-GP

+3.3V_RUN

L3701
BLM18AG601SN-3GP

KBC_PWR

DY

10/28 Item 8

1

KBC_PWR

1

DW

Put 0.1uf close to VCC-GND pin pair.

[76] AD_IA_KBC
[87] 1.8_GFX_ON

R3729
2K2R2J-2-GP

KBC_PWR R3752
10KR2J-3-GP
1
2

DY

104

C

KBC_PWRBTN#
3
D3705
BAT54C-U-GP

KBC_PWRBTN#

SW1
SW-TACT-175-GP

R3747
0R5J-5-GP

D

[78]

2

THERMTRIP_VGA_R#

KBC_PWRBTN#

6

DY

2

1

2

DIS 3

5

2

1

1

2

[81] THERMTRIP_VGA#

R3722
10KR2J-3-GP

4

2

Q3714_1
Q3714
MMBT3904-7-F-GP

DIS

SSID = KBC

DW

+3.3V_RTC_LDO

2

R3721
10KR2J-3-GP

+3.3V_RTC_LDO

1

KBC_PWR

2

1

DIS R3748
2K2R2J-2-GP

2

R3746
R3734
100R2J-2-GP
100KR2J-1-GP
1
2 KBC_PWRBTN_EC# 1
2

10mW circuit

1 1

4

+3.3V_RUN_GPU

1

+3.3V_RUN_GPU

C3704
SCD1U16V2KX-3GP

5

Title

KBC Nuvoton NPCE781BA0DX
Size
Document Number
Custom

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet

37

of

91

5

4

3

2

1

D

D

C

C

(Blank)

B

B

A

A



Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
Document Number
Custom

(Reserve)

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet
1

38

of

91

4

3

+5V_RUN

+5V_RUN

+3.3V_RUN
R3912
0R2J-2-GP

1

R3907
10KR2J-3-GP

C3909
SCD1U16V2KX-3GP

1

2

DY
D3901
B0530WS-7-F-GP

2

2

2

1

1

25mil
C3910
SC4D7U6D3V5KX-3GP

1

1

SSID = Thermal

2

EMC2102_FAN_TACH

A

EMC2102_FAN_TACH_1

K

DY

D

R3901
10KR2J-3-GP

2

5

EMC2102_FAN_TACH_1 [58]
D

EMC2102_FAN_DRIVE

EMC2102_FAN_DRIVE [58]

25mil
RN3901
3
4

2
1

+3.3V_RUN

SRN4K7J-8-GP
THERM_SCL [37,78]
THERM_SDA [37,78]

C3914
SC470P50V2JN-GP

22
SMDATA

24

25

23
SMCLK

VDD_5Vb

DN2

CLK_IN

18

CLK_32K

CH2_THERMDA

5

DP2

CLK_SEL

17

EMC2102_CLK_SEL

T8_THERMDC

6

DN3

RESET#

16

TP_EM2102_RESET# 1

T8_THERMDA

7

DP3

NC#15

15

DY 1

EMC2102_SHDN

14

+3.3V_RUN

C

TP3904 TPAD14-GP

3
4

2
1

+3.3V_RUN

SRN10KJ-5-GP
KBC_PWR
1

R3910
10KR2J-3-GP

EMC2102_FAN_mode

+3.3V_RUN

R3917
10KR2J-3-GP

1
C3902
SCD1U16V2KX-3GP

B

1

DY

SHDN#_G
2

1
0R2J-2-GP

1 R3914 2
10KR2J-3-GP

R3902
10KR2F-2-GP
2

2

GND = Fan is OFF
OPEN = Fan is at 60% full-scale
+3.3V = Fan is at 75% full-scale

C

C3903 must be
near EMC2102

D

PURE_HW_SHUTDOWN#

TRIP_SET Pin Voltage
V_DEGREE=(((Degree-75)/21)
T8 shutdown is set 86 deg-C.

[37,42]

V_DEGREE
Q3903
2N7002A-7-GP

1

1

S

C3903
SC470P50V2JN-GP

C3904
SCD1U16V2KX-3GP

R3904
2K37R2F-GP

2

3.HW T8 sensor ( CPU )

1

DY C3901
SC470P50V2JN-GP

B

1

Q3901
CH3904PT-GP

2

E

2

C3901 must be near Q3901

GND = Internal Oscillator Selected
+3.3V = External 32.768kHz Clock Selected

10KR2J-3-GP

1
R3916
2

B

+3.3V_RUN
2

RN3902

+3.3V_RUN

CPU Sensor
Layout notice :
Both VGA_THERMDA and THERMDC routing
10 mil trace width and 10 mil spacing.

1

EMC2102-DZK-GP

10KR2J-3-GP

C3913 must be near Q3904

TP3903 TPAD14-GP
R3906

EMC2102_PWROK
EMC2102_THERMTRIP#

R3903
2

1

POWER_OK#

THERMTRIP#
13

SYS_SHDN#
12

FAN_MODE

TRIP_SET
11

C3906
SC470P50V2JN-GP

C3913 SRN0J-6-GP
SC470P50V3JN-2GP

C

26

4

CH2_TDA

2.

FANb

TP_ALERT#

CH2_THERMDC

G

UMA

FANa

19

SYS_SHDN#

E

UMA

27

ALERT#

C3906 must be
near EMC2102

4
3

TACH

DP1

EMC2102

21

2

RN3907
1
2

UMA B

3

GND = Channel 1
OPEN = Channel 3
+3.3V = Disabled

CH2_TDC

Q3904
MMBT3904-3-GP

3
4

20

EMC2102_DP1

2

DIS

2
1

[81] VGA_THERMDC
[81] VGA_THERMDA

1

RN3906
SRN0J-6-GP

GND

NC#21

10

2. GPU Sensor

DN1

SHDN_SEL

C

VDD_3V

2

NC#8

Layout notice:
H_THERMDA, H_THERMDC routing together,
Trace width / Spacing = 10 / 10 mil

1
EMC2102_DN1

9

C3914 must be
near EMC2102

VDD_5Va

2

2

1

C3905
SCD1U16V2KX-3GP

C

2

DY

U3901

8

B

C3912
SC470P50V2JN-GP

1

1

E

C3912 must be near Q3905

Q3905
CH3904PT-GP

29

1 EMC2102_VDD_3D3
R3908
49D9R2F-GP

GND

2

+3.3V_RUN

Q3905 must be near WWAN

28

1. WWAN

2

Layout notice :
Both DN3 and DP3 routing 10 mil
trace width and 10 mil spacing.

32K suspend clock output

R3913
S

1

Q3902
2N7002A-7-GP

CLK_32K

2

10R2J-2-GP

DY
2

G

A

CLK_32K_R

A



1

D

[22] PCH_SUSCLK_2102

C3911
SC4D7P50V2CN-1GP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

RUN_POWER_ON [42]
Title

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Thermal/Fan Controllor EMC2102 Rev

Size
Document Number
Custom

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet
1

39

of

91

5

4

3

2

1

SSID = User.Interface

D

D

Free Fall Sensor
Note
- no via, trace, under the sensor (keep out area around 2mm)
- stay away from the screw hole or metal shield soldering joints
- design PCB pad based on our sensor LGA pad size (add 0.1mm)
- solder stencil opening to 90% of the PCB pad size
- mount the sensor near the center of mass of the NB as possible as you can

2

DY
2

C4001
SC10U6D3V5MX-3GP

1

1

+3.3V_RUN

C4002
SCD1U10V2KX-4GP

+3.3V_RUN
C

+3.3V_RUN

2
8

PCH_SMBDATA

13

SDA/SDI/SDO

INT2

9

12

SDO
GND
GND
GND
GND

2
4
5
10

HDD_FALL_INT1

HDD_FALL_INT1 [21]

R4005
100KR2J-1-GP

7
3
11

CS
RESERVED#3
RESERVED#11

FALL_INT2

1

INT1

1

SCL/SPC

2

14

2

1

PCH_SMBCLK

1 R4001
DY 2 HDD_FALL_SDO
100KR2J-1-GP

R4004
100KR2J-1-GP

3

+3.3V_RUN

DY

VDD_IO

PCH_SMBCLK
PCH_SMBDATA

VDD

[7,18,19,23,64,65]
[7,18,19,23,64,65]

6

U4001

1

C

+3.3V_RUN

B

1
6

R4006
100KR2J-1-GP

R4008

2

DY10KR2J-3-GP

2

09/0422
(#1) Just pull +3.3V_RUN ~ Ref. Rothschild
(#2) FAE/ DY is ok, chip internal pull-up resistors
(#3) From spec, Slave ADdress(SAD) is 001110xb
Pull HIGH SAD is 0011101b
Pull GND SAD is 0011100b

5

4

1

DE351DLTR8-GP

+5V_RUN
Q4002
DMN66D0LDW-7-GP

FFS_INT2_R

B

FFS_INT2 [59]

R4007

1

DY

2
0R2J-2-GP
FFS_INT2_R [25]

A

A



Note
(1) Keep all signals are the same trace width. (included VDD, GND).
(2) No VIA under IC bottom.

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
Document Number
Custom

Free Fall Sensor

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet
1

40

of

91

5

4

3

2

1

D

D

C

C

(Blank)

B

B

A

A



Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
Document Number
Custom

(Reserve)

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet
1

41

of

91

5

4

3

SSID = Reset.Suspend

2

1

DW

+1.5V_RUN:

10/26 Item 3

Peak current: 4650 mA
Design current: 3255 mA

1

+1.5V_RUN

R4219
221R2F-2-GP
+1.5V_RUN

H_THRMTRIP# [9,25,37]

+1.5V_SUS

E

SIR460DP-T1-GE3 MAX 40 A

C4208
SCD1U10V2KX-4GP

DY

DY

PURE_HW_SHUTDOWN#

D4201

RUN_POWER_ON

R4216
10KR2J-3-GP
1
2

S
S
S
G

Q4203
2N7002A-7-GP

1
2
3
4

PS_S3CNTRL

Q4204
SIR460DP-T1-GE3-GP
1.5V_CPU_ENABLE

K

BAS16XV2T1G-GP-U
1
2
R4203
1KR2J-1-GP

G

C4212
SC10U6D3V5KX-1GP

C4211
SCD01U50V2KX-1GP

S5_ENABLE [37]
2

R4209
200KR2J-L1-GP

[37,39]

D
D
D
D

1

A

3V_5V_EN
1

[46]

8
7
6
5

D

Rds(on) = 4.7 mOhm (Max)
Q4201
CHT2222APT-GP

S

1

B

1

H_PWRGD_R

2

2

DY

1KR2J-1-GP

2

1

[9,25] H_PWRGOOD

C

R4214

D

Q4203_D
2

D

2

DY

+1.5V_RUN

1
2

C4210
SCD1U10V2KX-4GP

2

1

C

Calpella Platform S3 Power Reduction Platform
S3 Power Reduction CRB Implementation
Design Details
Revision 0.1
C4209

C

SCD1U10V2KX-4GP

+3.3V_RTC_LDO
1

Peak current: 5605.6mA ( HD:1100 ODD:2500 )
Design current: 3923.92 mA
+5V_RUN

R4201
100KR2J-1-GP

+5V_ALW

RUN_POWER_ON

2 10KR2J-3-GP

1

+15V_ALW

DY R4220

12/08 Item 1

8
7
6
5

1

11.6A
Rds=14m ohm

Q4205

DY 2N7002A-7-GP
PS_S3CNTRL

B

G

B

S

Peak current: 8379.2 mA
Design current: 5865.4 mA

1

6

5

R4206
100KR2J-1-GP
4

Q4202
DMN66D0LDW-7-GP

10R3J-3-GP

AO4468-GP

2

1

2

C4204
SC6800P25V2KX-1GP
3

RUN_ON_5V

DW
D
D
D
D

Q4205_D
2

R4205

2

[50] PS_S3CNTRL

1
2
3
4

U4201
S
S
S
G

D

PS_S3CNTRL

2

1

+5V_RUN

+3.3V_RUN
+3.3V_RUN

R4211
2 10KR2J-3-GP RUN_ON_3D3V

C4203
SCD01U50V2KX-1GP

2

1

1

1
2
3
4

1

D
D
D
D

8
7
6
5

DY R4221
Q4206_D
2

RUN_POWER_ON [39]

PM_SLP_S3#

FDS8880-NL-GP

10.7A
Rds=12m ohm

10R3J-3-GP

D

[22,37,50,51,77,86]

+3.3V_ALW
U4202
S
S
S
G

DW
10/26 Item 3

PS_S3CNTRL

DY

Q4206
2N7002A-7-GP

S

G

A

A



Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Power Plane Enable

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
Document Number
Custom

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet
1

42

of

91

5

4

3

2

1

D

D

1

PR4306
15KR2J-1-GP

1

2

2

+5V_ALW

2
0R2J-2-GP

DY

D

S

PR4304
2K2R2J-2-GP
3

PR4302
1
2
33R2J-2-GP

PS_ID

C

1

PSID_DISABLE# [37]

G

1

PD4301
BAV99-4-GP

2

PSID_DISABLE#_R

+3.3V_ALW
1

+3.3V_ALW

PR4301

2

C
D

3

1
1

PQ4303
FDV301N-NL-GP

PD4302
BAV99-4-GP

2

PQ4304
CH3904PT-GP

PR4309
100KR2J-1-GP

DY

PR4303
10KR2J-3-GP

E
B

2

PSID_PRO

PS_ID_EC [37]
C

PR4310
1

DY

2

33R2J-2-GP

[76]

PS_ID_R2

PS_ID_R2

B

B

A

A



Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
Document Number
Custom

DC IN

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet
1

43

of

91

5

4

3

2

1

D

D

C

C

(Blank)

B

B



A

A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
A3

Document Number

(Reserve)

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet
1

44

of

91

5

4

3

2

1

D

D

C

C

(Blank)

B

B

A

A



Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
Document Number
Custom

(Reserve)

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet
1

45

of

91

A

B

C

D

E

+3.3V_ALW_2

2009/10/21 X01
+PWR_SRC_3D3V

2
PD3904_1
3

1

1
2

1

2

1

2

1

PD3903_04
1

2

2

2

1
1

1

15

GND

25

14

SKIPSEL

LG1_CP

18

DY

2009/10/21 X01

TONSEL

CH1

CH2

200kHz

265kHz

VREF

245kHz

305kHz

VREG3

300kHz

375kHz

VREG5

365kHz

460kHz

1

1

2

2

2

1

5
6
7
8

GAP-CLOSE-PWR
PG4622
1
2

2

1
2

1

1

GAP-CLOSE-PWR
PG4633
1
2

GAP-CLOSE-PWR
PG4632
1
2

1

GAP-CLOSE-PWR

GAP-CLOSE-PWR

PR4612
33KR2F-GP

DY
1
PR4615
21K5R2F-GP
2

2

Close to VFB Pin (pin2)

2

3V_5V_POK [22,37]

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
Inductor: 2.2uH PCMC063T-2R2MN Cyntec 20 mohm Isat =14Arms 68.2R210.20B
O/P cap: 220U 6.3V PSLV0J227M(25) 25mOhm 2.236Arms NEC_TOKIN/77.C2271.00L
O/P cap: 100U 6.3V TEPSLB20J107M(45)8R 45mOhm 1.374Arms NEC_TOKIN/77.C1071.081
H/S: FDSS8884 SO-8/ 23mohm/30mOhm@4.5Vgs/ 84.08884.037
L/S: FDS6690AS SO-8/ 12mohm/15mOhm@4.5Vgs/ 84.06690.E37

+3.3V_ALW_2

+3.3V_RTC_LDO
PR4620
0R0402-PAD
1
2

SKIPSEL

VREG3 or VREG5

VREF(2V)

Operating
Mode

OOA Auto Skip

Auto Skip

EN0

GAP-CLOSE-PWR
PG4621
1
2

GAP-CLOSE-PWR
PG4631
1
2

51125_FB1_R

PR4614
100KR2J-1-GP

PC4626

GAP-CLOSE-PWR
PG4601
1
2

GAP-CLOSE-PWR
PG4629
1
2

2

1 2
KBC_PWR

GAP-CLOSE-PWR
PG4619
1
2

GAP-CLOSE-PWR
PG4628
1
2

PTC4604

3

GAP-CLOSE-PWR
PG4617
1
2

2

17

PC4623
SC18P50V2JN-1-GP

1

3D3V_AUX_S5_5_51125 8

DY

+5V_ALW2

Operating
Mode
1

PR4611
0R2J-2-GP

51125_VCLK

TPS51125: ASM
RT8205B : DY

GND

PC4621
SC560P50V-GP

PTC4602

1

PR4619
0R0402-PAD

PR4621
1
0R2J-2-GP

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
Inductor: 3.3UH PCMB104T-3R3MS Cyntec 11.8mohm Isat =16Arms 68.3R310.20C
O/P cap: 220U 6.3V PSLV0J227M(25) 25mOhm 2.236Arms NEC_TOKIN/77.C2271.00L
O/P cap: 100U 6.3V TEPSLB20J107M(45)8R 45mOhm 1.374Arms NEC_TOKIN/77.C1071.081
H/S: FDSS8884 SO-8/ 23mohm/30mOhm@4.5Vgs/ 84.08884.037
L/S: FDS6690AS SO-8/ 12mohm/15mOhm@4.5Vgs/ 84.06690.E37

S

2009/10/21 X01

SC10U10V5KX-2GP

1

1

DY

1

GAP-CLOSE-PWR-3-GP

PR4618
1
0R2J-2-GP

2
2

2

PR4617
1
0R2J-2-GP

Close to VFB Pin (pin5)
+3.3V_ALW_2

PG4623
1

2

1

2

DY
2

G

2009/10/30 X01

1

1
2

PGND

TONSEL

PC4625
SC4D7U10V5KX-4GP

51125_VREF

PR4616
0R0402-PAD
2
1
2

51125_ENTIP1

REF

51125_SKIPSEL

+3.3V_ALW_2

+3.3V_ALW_2

3V_5V_POK

4

RT8205BGQW-GP

51125_VREF

23
1

2

TPS51125: DY
RT8205B : ASM

PGOOD
ENTRIP1

3

VREG3

2009/10/21 X01

51125_TONSEL

ENTRIP2

PC4601
SCD1U10V2KX-4GP
PG4620

2

EN

PR4607
2D2R5F-2-GP

GAP-CLOSE-PWR
PG4616
1
2

GAP-CLOSE-PWR
PG4625
1
2

1

13

51125_ENTIP2 6

51125_VREF

51125_FB1

FB1

VREG5

G

24
2

VOUT1

D

2

FB2

51125_VO1

2

D
D
D
D

VOUT2

5

2 51125_EN
DY820KR2F-GP

S
S
S
G

151125_LL2_R
2

7

51125_FB2

1
PR4608

1
2
3
4

S

51125_VO2

4
3
2
1

PL4602
1
2
IND-2D2UH-157-GP-U

2

51125_DRVL1

1

51125_LL1

19

151125_LL1_R
2

20

LGATE1

1

PG4614
2

GAP-CLOSE-PWR
PG4615
1
2

+PWR_SRC_5V

PG4612
2

GAP-CLOSE-PWR
PG4624
1
2

+5V_PWR

5
6
7
8

VIN
PHASE1

LGATE2

S

4
3
2
1

16

1

1
2

1

PHASE2

12

PU4605

2

1
2

11

PU4604
FDS6690AS-GP

1

1

UGATE1

51125_LL2
51125_DRVL2

G

ST100U6D3VBM-5GP

2

UGATE2

21

SCD1U25V3KX-GP
PC4618
1
2

51125_VBST1_1

SC22U6D3V5MX-2GP
PC4628

2

51125_DRVH1

10

2

8
7
6
5

1

51125_VBST1 1

+PWR_SRC

DIS(Auburndale)
Design Current =8.53A
13.39A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

RT8205B_5V/3D3V

Size
Document Number
Custom
A

B

C

D

http://laptop-motherboard-schematic.blogspot.com/

Rev

DW Calpella

Date: Monday, January 18, 2010

Sheet
E

46

X01
of

91

5

4

3

2

1

PM_DPRSLPVR [12]
[7] VR_CLKEN#
IMVP_VR_ON [37]

7

COMP
FB

9

ISEN3/FB2

2

1

1
2

4
3
2
1

2

1

1
2

5
6
7
8
1

VCCP

25

62883_VCCP

PWM3/LGATE1#

24

62883_PWM3

LGATE1

23

LGATE1

VSSP1

22

PHASE1

21

LGATE2

[48]

ISEN3

1
PR4756
1
PR4759
1
PR4760
1
PR4762
1
PR4763

VSUM+
VSUM-

LGATE1

PC4741

[48]

PHASE1

[48]

ISEN1
ISEN2

2

3K65R3F-GP

2

1
2

1
1
2

1
2
PHASE3_R

51KR2F-L-GP

2

PTC4702

DY

C

1R2F-GP

2

51KR2F-L-GP

2

51KR2F-L-GP

Intel support POC (power on current).

1

20

1
2

1

1

2

2

2

1

1
2

2

2

1

1

1
2

1
2

1
2

1

DY
B

1
2

1

1
2

2

2

1

1
2

1
2

2

2

1

1

1

1

DY

62883_AGND

2

2

VSUM-

VSUM-

[48]

NTC 10K close to Choke of Phase1

A



1
2

1
2
PR4796
768R2F-1-GP

A

62883_AGND
PR4795
NTC-10K-26-GP

1

PC4758
SCD01U25V2KX-3GP

1VSUM_RR
2

1

1

VSUM_RC 2
2

1
2

PC4760
SC1000P50V3JN-GP-U

PC4756
PR4784
SCD22U16V3KX-2-GP

2009/10/30 X01

11KR2F-L-GP

2

1

2

2

1

DY

1KR2J-1-GP

DY

1KR2J-1-GP

1

DY

1KR2J-1-GP

DY

1KR2J-1-GP

DY

PR4783
2K61R2F-1-GP

1KR2J-1-GP

PC4757
SCD068U16V2KX-GP

1KR2J-1-GP

PR4782
82D5R2F-1-GP

1KR2J-1-GP

VSUM+ [48]

1KR2J-1-GP

1KR2J-1-GP

62883_AGND

DY

PR4785 PR4786 PR4787 PR4788 PR4789 PR4790 PR4791 PR4792 PR4793

62883_AGND 62883_AGND

[12] VCC_SENSE

DY

CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6
PM_DPRSLPVR
PSI#

2

2

+1.05V_VTT

VSS_SENSE [12]

VSUM+

PC4759
SC330P50V2KX-3GP

2

2

19

18

17

16

15

1
2

DY

1

VSUM-

PR4799
1

PC4750
100KR2F-L1-GP
SCD22U10V2KX-1GP

1KR2J-1-GP

PC4754
SC330P50V2KX-3GP

PR4781

1KR2J-1-GP

2009/10/30 X01

+PWR_SRC_CPU1
1 PR4768 2
0R0402-PAD
+5V_ALW
1
2
PR4769
1R2F-GP

1KR2J-1-GP

PC4752

PR4770 PR4771 PR4772 PR4773 PR4774 PR4775 PR4776 PR4777 PR4778
IMVP_IMON [12]

1KR2J-1-GP

62883_FB_VSEN_R

2
2 PR4794 1
0R0402-PAD
1K87R2F-GP

2BOOT1_PHASE1
2D2R3J-2-GP

1
PR4767
IMVP_IMON

1KR2J-1-GP

SC390P50V2KX-GP

BOOT1

1KR2J-1-GP

PC4751
262883_FB_VSEN
1
2

+1.05V_VTT

PC4746
SCD22U16V3KX-1-GP

UGATE1 [48]

2

PC4749

62883_VDD

1

UGATE1

62883_VIN

ISEN1

14

62883_AGND

13

2

UGATE1

PHASE1

PC4742

PG4713
GAP-CLOSE-PWR-3-GP

1SNUBBER3 2
2

PR4755
0R3J-0-U-GP

PG4714
GAP-CLOSE-PWR-3-GP

1

LGATE2

LGATE2

PC4701
SC560P50V-GP

PTC4701

2

1
BOOT

5
6
7
8
27
26

BOOT1

IMON

VIN

VDD

ISUM+

ISUM-

RTN

GND

VSEN

ISEN2

41

ISEN1

10

DY

2

VSSP2

2

8

DY

+VCC_CORE_PHASE3

VW

PR4753
0R2J-2-GP
1

1

NTC

6

2D2R5F-2-GP

4
3
2
1

1

VR_TT#

5

2

1
PR4780

[12] VSS_SENSE

5
VCC
9
3

2

31
VID0

32
VID1

33
VID2

34
VID3

35
VID4

VID5

36

37

4

DYPR4701

1KR2J-1-GP

ISEN3

VID6

[48]

PU4703

1KR2J-1-GP

ISEN3

38

[48]

PHASE2

2

1KR2J-1-GP

[48]

1
PR4779
562R2F-GP

VR_ON

UGATE2

PHASE2

8K25R2F-1-GP

ISEN2

GND
GND

6208_PWM

62883_CLK_EN#
1
PR4744
62883_DPRSLPVR 1
PR4745
62883_VR_ON
1
PR4737
62883_VID6
1
PR4738
62883_VID5
1
PR4746
62883_VID4
1
PR4739
62883_VID3
1
PR4740
62883_VID2
1
PR4741
62883_VID1
1
PR4742
62883_VID0
1
PR4743

UGATE2

28

SCD22U25V3KX-GP
PC4753

ISEN1

ISEN2

39

40
CLK_EN#

29

PHASE2

SC1U10V2KX-1GP

ISEN1

[48]

DPRSLPVR

UGATE2

RBIAS

SCD22U25V3KX-GP

[48]

+5V_ALW

[48]

PSI#

2

B

BOOT2

3

1

DY

BOOT2

2

62883_ISUM-

1
2
1
262883_COMP_R1
2
PC4747
PC4748
PR4766
SC22P50V2JN-4GP SC150P50V2JN-3GP
324KR2F-GP

2

VSUM-

1
2
PC4744
SC33P50V2JN-3GP

SCD22U25V3KX-GP

2

DY

ISEN2
1PC4745 1

SCD22U25V3KX-GP

ISEN3

1
PR4764
0R2J-2-GP

ISEN3

PC4743

30

SC1U10V2KX-1GP

2009/08/12

62883_FB

BOOT2

1

62883_COMP
1
2
PR4761
8K06R2F-GP
1
2
PC4740
SC1000P50V3JN-GP-U

1
2
COIL-D36UH-3-GP

LGATE3

2

62883_VW
2

PC4739
SCD01U25V2KX-3GP

62883_AGND

62883_NTC

+VCC_CORE

PL4701
PHASE3

SC1U10V2KX-1GP

62883_AGND

26266A_NTC_R
1
2PR4758
NTC-470K-8-GP

VSUM-

62883_AGND

UGATE3
ISL6208CRZ-TGP-U

PR4750
0R0402-PAD

1

62883_PSI#
0R0402-PAD
62883_RBIAS
147KR2F-GP

12

2

PGOOD

11

2

[9] H_PROCHOT#
1
PR4757
4K02R2F-GP
1

2

6208_FCCM

CPU_VID1

CPU_VID2

CPU_VID3

CPU_VID0
0R0402-PAD
2

0R0402-PAD
2

0R0402-PAD

0R0402-PAD
2

CPU_VID4
0R0402-PAD

2

CPU_VID5

2

0R0402-PAD

0R0402-PAD
2

2

0R0402-PAD
2

0R0402-PAD
2

1
2
1
2

1
2

1
PR4752
1
PR4754

62883_PGOOD 1

D

ST330U2VDM-4-GP

NTC 470K close to H/S MOSFET of Phase1

PHASE3
UGATE3
LGATE3

7
8
4

PC4734

ST330U2VDM-4-GP

C

FCCM

PHASE
UGATE
LGATE

PC4733

SCD1U50V3KX-GP

PSI#
62883_AGND

PWM

6

PU4702

PC4738

SC10U25V6KX-1GP

[12]

PR4748
0R0402-PAD
1
2

PC4737

SC10U25V6KX-1GP

[37] IMVP_VR_PWRGD

PR4751
68R2-GP

2

PC4736
SCD22U16V3KX-1-GP

SIS402DN-T1-GE3-GP
S
S
S
G

PU4701
ISL62883HRTZ-T-GP

PR4749
1K91R2F-1-GP

+1.05V_VTT

PU4705

D
D
D
D

+3.3V_RUN

SC1U10V2KX-1GP PR4735
BOOT3
1
2 6208_PHASE3
2D2R3J-2-GP

SC10U25V6KX-1GP

PR4747
1K91R2F-1-GP

+PWR_SRC_CPU1

SIS406DN-T1-GE3-GP
S
S
S
G

2

+5V_ALW
PR4736
0R0402-PAD
PC4735
2
1
1
2

[12]

D
D
D
D

D

0R0402-PAD

CPU_VID6

CPU_VID[6..0]
+3.3V_RUN

PC4762
SCD1U25V3KX-GP

GAP-CLOSE-PWR-3-GP
1
2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

62883_AGND
PR4798
Title

62883_AGND

ISL62883_CPU_CORE_1/2

Size
Document Number
Custom

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Rev

DW Calpella

Date: Monday, January 18, 2010

Sheet
1

X01
47

of

91

5

UGATE2

ISEN1

[47] ISEN1

ISEN3

[47] ISEN3

2

1
2

PC4802
SC560P50V-GP

2

3K65R3F-GP

2

2

1

PTC4802

2

1

PTC4801

C

1R2F-GP

2

51KR2F-L-GP

2

51KR2F-L-GP

TC4801
SE47U25VM-8-GP

1

PC4871

SIS406DN-T1-GE3-GP
S
S
S
G

4
3
2
1

2

1

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
Inductor: 0.36UH ETQP4LR36WFC PANASONIC 1.1mohm/ 68.R3610.20A
O/P cap: 330U 2V EEFSX0D221E7 6mOhm 3.0Arms Panasonic/79.33719.20L
O/P cap: 220U 2V EEFSX0D331XE 7mOhm 3.4Arms Panasonic/79.22719.90L
H/S: SI7686DP/ POWERPAK-8/11mOhm/14mOhm@4.5Vgs/ 84.07686.037
L/S: SiR460DP/ POWERPAK-8/ 4.9mOhm/6.1mohm@4.5Vgs/ 84.00460.037
Freq=300KHz@PER PHASE

SCD1U50V3KX-GP

2

1

PC4870
SC10U25V6KX-1GP

2

PC4869
SC10U25V6KX-1GP

D
D
D
D

PU4802

PC4868
SC10U25V6KX-1GP

2

1

+PWR_SRC_CPU1

5
6
7
8

1

PG4801
GAP-CLOSE-PWR-3-GP

51KR2F-L-GP

2

DY

+VCC_CORE_PHASE2

2

VSUM-

[47] VSUM-

1

1
PR4801
1
PR4802
1
PR4803
1
PR4804
1
PR4805

VSUM+

[47] VSUM+
+PWR_SRC

DY
ISEN2

[47] ISEN2

2

1SNUBBER2 2

4
3
2
1
LGATE2

[47] LGATE2

1

2D2R5F-2-GP

SIS402DN-T1-GE3-GP
S
S
S
G

GAP-CLOSE-PWR

2

DYPR4815

PU4803

PHASE2_R

D
D
D
D

GAP-CLOSE-PWR
PG4806
1
2

C

1

1

PR4812
BOOT2 1
2B00T2_R 1
2
PC4867
2D2R3J-2-GP
SCD22U16V3KX-1-GP

ST330U2VDM-4-GP

BOOT2

D

UMA(Auburndale)
Design Current = 34A
Peak Current=48A
57.6A

51KR2F-L-GP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

ISL62883_CPU_CORE_2/2

Size
Document Number
Custom

http://laptop-motherboard-schematic.blogspot.com/

Rev

DW Calpella

Date: Monday, January 18, 2010

5

4

3

2

Sheet
1

X01
48

of

91

5

+PWR_SRC

4

3

2

1

+PWR_SRC_1D05V

1

TPS51218 for +1.05V_VTT

PG4902
2

GAP-CLOSE-PWR
PG4903
1
2

D

GAP-CLOSE-PWR
PG4904
1
2

+PWR_SRC_1D05V

UMA(Arrandale 1.05V_VTT)
Design Current = 19.91A
27.39A290KHz
200K -->340KHz
100K -->380KHz
39K -->430KHz

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
Inductor: 0.56uH PCMC104T-R56MN Cyntec DCR:1.8mohm Isat=25Arms 68.R5610.10D
O/P cap: 330U 2.5V EEFSX0D331ER 9mOhm 3Arms PANASONIC/ 79.33719.L01
H/S: SIR474DP-T1-GE3/10mohm/ 12mOhm@4.5Vgs/ 84.00474.037
L/S: SI7170DP-T1-GE3/3.6mOhm/4.3mohm@4.5Vgs/ 84.07170.037

A

A



Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

TPS51218_+1.05V_VTT
Size
Document Number
Custom
Date:
5

4

3

2

http://laptop-motherboard-schematic.blogspot.com/

Rev

DW Calpella
Sheet

Monday, January 18, 2010
1

X01
49

of

91

5

4

3

2

1

SSID = PWR.Plane.Regulator_1p5v0p75v

1D5V_EN

11

0D75V_EN 10
23

1
GAP-CLOSE-PWR
PG5004
2
1

LX

20 TPS51116_PHS

GAP-CLOSE-PWR
PG5006
2
1

DL

19 TPS51116_LGT

GAP-CLOSE-PWR
PG5008
2
1

VTTEN
VTTIN
NC#7

1

PGND2

4

TON

S

425302_425302_Calpella_S3PowerReduction_WhitePape
Revision 0.7
R5034
100KR2J-1-GP
1
2

[9,25,37,49] VTT_PWRGD

GAP-CLOSE-PWR

0D75V_EN

Q5003
2N7002A-7-GP

8

TPS51116_VDDQSNS

FB

9

TPS51116_VDDQSET

VCCA

6

+5V_ALW

2

+0D75V_DDR_P

S
2

+PWR_SRC_1D5V

DW
10/29 Item 1

DY PC5020

1

PC5007

2
1

2
PU5003
FDS8880-NL-GP

2

SC1U10V3KX-3GP

1 PR5013 2
0R0603-PAD

PC5021
SCD033U16V3KX-GP

C

SC4D7U25V5KX-GP

REF

VSSA

DY

+V_DDR_REF

PS_S3CNTRL G

PR5005
1

0R2J-2-GP

D
D
D
D

Design Current = 0.7A

1TPS51116_REF 5

25

GND

VTTS

PC5006
SCD1U50V3KX-GP

VTT

3

2

2

24

VDDQS

[42] PS_S3CNTRL

1

DY

18
17

PC5005
SC10U25V6KX-1GP

TPS51116_TON

PGND1
PGND1

1

PC5017
SC1KP50V2KX-1GP

+0D75V_DDR_P

PC5022
SCD1U10V2KX-4GP

TPS51116RGER-GP-U

2

2 0R0402-PAD

7

2

15

EN/PSV

1

+1.5V_SUS
PR5002 1

PC5002
SC1U10V3KX-3GP
1M1R2J-GP

1

DH

0R3J-0-U-GP

5
6
7
8

DY 2

D

1

22 TPS51116_VBST

1

PR50011

2 TPS51116_VBST1

+PWR_SRC_1D5V
PG5002
1

21 TPS51116_UGT

2

+5V_ALW

2

BST

1

+1.5V_SUS

1D5V_EN

DY

PGD
NC#12

1 PR5014 2
0R0402-PAD

[22,37,77] PM_SLP_S4#

PC5004
SC10U25V6KX-1GP

TI: Non_ASM
RT: ASM

PD5001
CH551H-30PT-GP

+PWR_SRC
PR5003
1

2

DY

TPS51116_NC#12 12

D

G

D

1
2

13

PR5011
2 620KR2F-GP

R5035
22R2J-2-GP

Q5004
2N7002A-7-GP
PS_S3CNTRL

PU5002

VDDP

1

ILIM

VDDP

14

16

2
PR5004
20KR2F-L-GP

C

DY

TPS51116_ILIM

1

PC5001
SCD1U10V2KX-4GP

+5V_ALW

2

2

SC1U10V3KX-3GP
PC5018

+PWR_SRC_1D5V

[49,51] RUNPWROK

0D75V_EN

DY

PC5019
SC1U10V3KX-3GP

2

PC5003
SC1KP50V2KX-1GP

+3.3V_ALW

2 0R2J-2-GP

DY

2

1
1

1

PR5012 1

PM_SLP_S3#

2

PR5007
1
2 TPS51116_VDD
7K5R2F-1-GP

D

[22,37,42,51,77,86]

PR5006
5D1R3J-GP
+5V_ALW

Q5004_D
2

+5V_ALW

2009/10/30 X01
DIS:12.4Kohm/64.12425.6DL
UMA:7.5Kohm/64.75015.6DL

1

+0.75V_DDR_VTT

DIS(Auburndale)
Design Current = 11.82A
18.57A400KHz

PR5010
30KR2F-GP
2

VDDQ (V)

2

DY

PR5009
30KR2F-GP
TPS51116_VDDQSET

VDDQSET

PTC5002

DY

1

TPS51116_LGT

1

2

PC5015
SC330P50V3KX-GP

PC5014
SCD1U10V2KX-4GP

DY

PG5016
GAP-CLOSE-PWR-3-GP

VTT

1

TPS51116_PHS_SET
1

VTTREF

4
3
2
1

VDDR

PTC5001

SE220U2VDM-8GP

S5

S
S
S
G

S3

PR5008
2D2R5F-2-GP

SE220U2VDM-8GP

DY

D
D
D
D

GAP-CLOSE-PWR
PU5001
FDS6676AS-GP

State

B

1
2
COIL-1D5UH-25-GP
PC5013
SC4D7U6D3V5KX-3GP

2

PC5012
SCD1U25V3KX-GP

1

TPS51116_VBST1 1

1

1

PL5001

2

GAP-CLOSE-PWR
PG5015
1
2

+1.5V_SUS
TPS51116_UGT

5
6
7
8

+0D75V_DDR_P
+0.75V_DDR_VTT
PG5014
1
2

PC5011
SC10U10V5KX-2GP

2

1
2

PC5010
SC10U10V5KX-2GP

1
2

PC5009
SC10U10V5KX-2GP

1
2

B

PC5008
SCD1U10V2KX-4GP

4
3
2
1

S
S
S
G

UMA(Auburndale)
Design Current = 8.86A
13.92A

A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

TPS51116_+1.5V_SUS
Document Number
Size
Custom

Rev

DW Calpella

Date: Monday, January 18, 2010
5

4

3

2

http://laptop-motherboard-schematic.blogspot.com/

Sheet
1

X01
50

of

91

5

4

3

2

1

SSID = PWR.Plane.Regulator_1p8v

APL5930 for +1.8V_RUN

+3.3V_ALW

PG5102
2
1

1
2

1
2

R5105
10KR2F-2-GP

2

1

1

1
2

2

DY

PR5104
15KR2F-GP

C

Vout=0.8V*(R1+R2)/R2

2

1

C

5912_1.8V_RUN_FB

1

SO-8-P

1

GAP-CLOSE-PWR
1

2

FB

PG5104
2

PC5108

3
4

+1.8V_RUN_P

SC22U6D3V5MX-2GP

VOUT#3
VOUT#4

+1.8V_RUN

GAP-CLOSE-PWR
PG5105
1
2

1D8V_VIN

PC5107

5
9

PC5106

VIN#5
VIN#9

SC68P50V2JN-1GP

APL5930KAI-TRG-GP

+1.8V_RUN_P

6
VCNTL

EN

DIS(Arrandale)
Design Current = 1605 mA

1

GND

2

8

2009/07/08

GAP-CLOSE-PWR

SC22U6D3V5MX-2GP

PM_SLP_S3#

POK

PC5103

[22,37,42,50,77,86]

7

DY

D

GAP-CLOSE-PWR
PG5103
2
1

SC10U10V5KX-2GP

[49,50] RUNPWROK

PC5104

PU5102

SC10U10V5KX-2GP

PC5102

SC1U10V3KX-3GP

1

+5V_ALW

2

D

2

PR5105
12KR2F-L-GP

B

B

A

A



Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

APL5930_+1.8V_RUN

Size
Document Number
Custom

http://laptop-motherboard-schematic.blogspot.com/

Date: Monday, January 18, 2010

5

4

3

2

Rev

DW Calpella
Sheet
1

51

X01
of

91

5

4

3

2

1

D

D

C

C

(Blank)

B

B

A

A



Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
Document Number
Custom

(Reserve)

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet
1

52

of

91

5

4

3

2

1

SSID = CPU.GFX.Regulator

+PWR_SRC_CPU_GFXCORE

[13]

GFX_VID5

PR5303 1

2 0R0402-PAD

3211_VID5

[13]

GFX_VID4

PR5304 1

2 0R0402-PAD

3211_VID4

[13]

GFX_VID3

PR5305 1

2 0R0402-PAD

3211_VID3

[13]

GFX_VID2

PR5307 1

2 0R0402-PAD

3211_VID2

[13]

GFX_VID1

PR5308 1

2 0R0402-PAD

3211_VID1

[13]

GFX_VID0

PR5309 1

2 0R0402-PAD

3211_VID0

+1.05V_VTT

PR5301 1

+PWR_SRC_CPU_GFXCORE

2 10KR2J-3-GP
2 0R0402-PAD

3211_GFX_VR_EN

32
31
30
29
28
27
26
25

4
3
2
1

3211_RT

1
2

2

1

1

PC5315

1

PC5313

2

PC5312

SC1U10V2KX-1GP

1

PTC5301

2

1

1
2

1
2

1

PTC5302

SCD01U25V2KX-3GP

3211_RPM
340KR2F-1-GP

PG5324

GAP-CLOSE-PWR-3-GP

80K6R2F-GP
237KR2F-GP

PG5323

2

EN
VID0
VID1
VID2
VID3
VID4
VID5
VID6
IREF
RPM
RT
RAMP
LLINE
CSREF
CSFB
CSCOMP
9
10
11
12
13
14
15
16

3211_IREF

DY

GAP-CLOSE-PWR-3-GP

2

GND_3211_I

PU5303
PC5310

C

PR5317

2

2
1
2

1

1
2
COIL-D56UH-2-GP

DY

GND_3211_I
PC5316
13211_RAMP_1

2
422KR2F-1-GP

PR5326
1

PC5317
SC1000P100V3KX-GP

PR5335
2

+CPU_GFXCORE

PR5329

1
2

3211_CSCOMP_1 1

PR5328
2

178KR3F-GP

1

2

3211_SW_L

64K9R2F-1-GP

PR5330
NTC-220K-2-GP
1
2
B

1

1

2

DY

B

PC5319
SC1KP50V2KX-1GP

GND_3211_I

PR5327
2

110KR2F-GP
PC5318
SC270P50V2KX-1GP

2

GND_3211_I
3211_FB_1

1
PR5325

1

PR5324
1KR2F-3-GP

1

2

+PWR_SRC_CPU_GFXCORE

20KR2F-L-GP
2
1

2

1

PR5323

1

+CPU_GFXCORE
3211_DRVH

+5V_ALW

3211_DRVL

12A

PL5301

2

3211_RAMP
3211_LLINE
3211_CSREF
3211_CSFB
3211_CSCOMP

PR5320
PR5322

SC1KP50V2KX-1GP

2

1
2
1
2
SC47P50V2JN-3GP
2
1

SC220P50V2JN-3GP
2
1

SC470P50V2KX-3GP

2

2 1R3J-L1-GP 3211_BST_1 1

SE330U2VDM-L-GP

ADP3211MNR2G-GP
1

UMA
Thermal Design Current =
Max. Current = 22A
24.2A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

ADP3211 CPU_GFXCORE

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
Document Number
Custom

Rev

X01

DW Calpella UMA

Date: Monday, January 18, 2010

Sheet
1

53

of

91

+3.3V_RUN

SSID = VIDEO

+3.3V_RUN_GPU

Close GPU

SSID = Inverter

2
1

2
1

Close PCH

DIS
3
4

RN5409
SRN2K2J-1-GP
3
4

RN5404
SRN2K2J-1-GP

L_DDC_DATA
L_DDC_CLK

LDDC_DATA
LDDC_CLK

INVERTER POWER

UMA/DIS LVDS DDC CLK/DAT select circuit
+PWR_SRC_LCD

H=>B1 -iGPU PCH (UMA)
L=>B0 -dGPU GPU (DIS)

1

EDID_SELECT#

C5401
SC1KP50V2KX-1GP

[20] L_DDC_CLK

B0
GND
B1

DY

EV @ LVDS side

2

LDDC_CLK_CON

4
5
6

A
VCC
S

2

DY

DIS
3
2
1

1

+3.3V_RUN

U5445

1

LDDC_DATA_CON
LDDC_CLK_CON

EDID_SELECT#

[81] LDDC_CLK

EDID_SELECT#
C5414
SC22P50V2JN-4GP

C5415
SC22P50V2JN-4GP

SSID = VIDEO

G3201TL1U-1-GP

73.03201.00J
L_DDC_DATA
L_DDC_CLK

1
2

DYR5410
10KR2J-3-GP

VGA_TXAOUT1VGA_TXAOUT1+

2 100R2J-2-GP

R5408 1

+3.3V_RUN

LCD_BRIGHTNESS

BLON_OUT [37]
LCD_TST [37]

UMA/DIS LVDS PWM select circuit

2 100R2J-2-GP

VGA_TXAOUT0- [74]
VGA_TXAOUT0+ [74]

R5438
0R2J-2-GP
1
2

DY

[37] LBKLT_CTL_EC

R5439
0R2J-2-GP
1 DIS

VGA_TXAOUT1- [74]
VGA_TXAOUT1+ [74]
[81] LBKLT_CTL_GPU

VGA_TXAOUT2VGA_TXAOUT2+

VGA_TXAOUT2- [74]
VGA_TXAOUT2+ [74]

VGA_TXACLKVGA_TXACLK+
LCD_CBL_DET#

VGA_TXACLK- [74]
VGA_TXACLK+ [74]
LCD_CBL_DET# [25]

[20] LBKLT_CTL_PCH

U5448
2

LCD_BRESS
3 B0
2 GND
1 B1

+3.3V_RUN

DIS A
VCC
S

4
5
6

LCD_BRIGHTNESS
DGPU_PWM_SELECT# [21]

G3201TL1U-1-GP

LCDVDD_EN_PCH

R5423

1

UMA

73.03201.00J

20.F1555.030

R5422

1

LBKLT_CTL_EC

R5424

1

UMA

2 0R2J-2-GP

DY

2 0R2J-2-GP

LCD_BRIGHTNESS

+3.3V_RUN

DIS
[81] LCDVDD_EN_GPU
[20] LCDVDD_EN_PCH

3
2
1

B0
GND
B1

A
VCC
S

4
5
6

+LCDVDD

1

[37] SHBM_LCDTST_EN
U5446

LBKLT_CTL_PCH

U5466_4

D5407
BAT54C-7-F-GP

H=>B1 -iGPU PCH (UMA)
L=>B0 -dGPU GPU (DIS)

JAE-CON30-5-GP-U

2 0R2J-2-GP

U5466_4

3

ENVDD_D

R5409
0R0402-PAD
1
2

ENVDD

+3.3V_RUN

U5403
3
2
1

OUT
GND
EN

IN#4

4

IN#5

5

1

VGA_TXAOUT0VGA_TXAOUT0+

1 R5406

33R2J-2-GP
2

2

DGPU_SELECT#

R5411
49K9R2F-L-GP

G3201TL1U-1-GP

DY

2

BLON_OUT_R
LCD_TST
LDDC_CLK_CON
LDDC_DATA_CON
LCD_DET_G

R5404
1

1

+3.3V_EEPROM
LCD_BRIGHTNESS

2

37

C5406
SCD1U10V2KX-4GP

1

36

C5403
SC10U6D3V5KX-1GP
+3.3V_RUN

1

DY

2

35

+LCDVDD

LDDC_DATA_CON
LDDC_CLK_CON

LCD POWER

2

34

2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
NP2
32

2 0R2J-2-GP
2 0R2J-2-GP

UMA
UMA

1

1

31
NP1
1

2

33

1
1

+LCDVDD

LCD1

C5402
SCD1U10V2KX-4GP

+PWR_SRC_LCD

R5421
R5420

2

LVDS CONNECTOR

C5405
SCD1U50V3KX-GP

69.50007.A41
2ND : 69.50007.A31

G3201TL1U-1-GP

73.03201.00J

[21,55,57] EDID_SELECT#

1

2

2

LDDC_DATA_CON

4
5
6

A
VCC
S

2

[20] L_DDC_DATA

B0
GND
B1

1

DIS
3
2
1

[81] LDDC_DATA

+PWR_SRC

F5401
POLYSW-1D1A24V-1-GP

+3.3V_RUN

U5444

G5285T11U-GP
C5408
SCD1U16V2KX-3GP

C5407
SC1U10V3KX-3GP

73.03201.00J
[21,37,74] DGPU_SELECT#
LCD_BRIGHTNESS

R5407
10KR2J-3-GP

H=>B1 -iGPU PCH (UMA)
L=>B0 -dGPU GPU (DIS)



Wistron Corporation

2

1

C5404
SC33P50V2JN-3GP

2

DY
2

1

C5409
SC33P50V2JN-3GP

1

LCD_TST

DY

DGPU_SELECT#

BLON_OUT_R

For EMI request

http://laptop-motherboard-schematic.blogspot.com/

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

LCD/Inverter Connector

Size
Document Number
Custom

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet

54

of

91

3

+5V_RUN
D5504
B0530WS-7-F-GP
K
A

2

1

+5V_CRT_RUN

1

CRT1
C5510
SCD01U16V2KX-3GP

16

L5502

1 R5594 2CRT_R_R2
1
2
BLM18BB220SN-GP
0R2J-2-GP

M_GREEN

1 R5595 2CRT_G_R2
1
2
0R2J-2-GP
BLM18BB220SN-GP

D

CRT_R

CRT_G

+5V_CRT_RUN

CRT_B

L5503

1

1

C5507
SC8P250V2CC-GP

3

+3.3V_RUN

1

1

D5503
BAV99-4-GP

DY
2

3

D5502
BAV99-4-GP

+3.3V_RUN

JVGA_VS

JVGA_VS [74]

15

DDC_CLK_CON

17

DYDY

C5501
SC8P250V2CC-GP

C5506
SC8P250V2CC-GP

C5502
SC33P50V2JN-3GP

*Pi-filter & 150 Ohm pull-down
resistors should be as close
as to CRT CONN.
* RGB signal will hit 75 Ohm
first, then pi-filter, finally
CRT CONN.

C5504
SC33P50V2JN-3GP

AFTP5503
AFTP5501
AFTP5509
AFTP5507
AFTP5506
AFTP5508
AFTP5504
AFTP5505

1
1
1
1
1
1
1
1

+5V_CRT_RUN
DDC_DATA_CON
DDC_CLK_CON
CRT_R
CRT_G
CRT_B
JVGA_HS
JVGA_VS

C

+3.3V_RUN

+3.3V_RUN_GPU

+5V_CRT_RUN

RN5511
SRN2K2J-1-GP

RN5513
SRN2K2J-1-GP

CRT_DAT_DDC
CRT_CLK_DDC

DIS
3
2
1

[81] CRT_DAT_DDC
[20] GMCH_DDCDATA

B0
GND
B1

A
VCC
S

4
5
6

1
2

DY

+3.3V_RUN
DDC_DATA_CON2

C5519
SC22P50V2JN-4GP

EDID_SELECT#

1

DDC_DATA_CON
DDC_CLK_CON

UMA/DIS CRT DDC CLK/DAT select circuit
U5542

B

DY
2

GMCH_DDCDATA
GMCH_DDCCLK

3
4

DIS
3
4

3
4

RN5510
SRN2K2J-1-GP

2
1

2
1

Close GPU
2
1

Close PCH

B

JVGA_HS [74]

14

Layout Note:

C5512
SC8P250V2CC-GP

CRT_B

DY

+3.3V_RUN

JVGA_HS

2

2

C5508
SC8P250V2CC-GP

2

3

D5501
BAV99-4-GP

2

1

2

R5503
150R2F-1-GP

CRT_G

DY

DDC_DATA_CON

13

VIDEO-15-127-GP-U

2

2

2
R5501
150R2F-1-GP

C

1

D

12

20.20401.015

C5509
SC8P250V2CC-GP

CRT_R

AFTP5502

DY DY

2

2

2
R5502
150R2F-1-GP

1

1

1

1

1

DY

CRT_B

1

1 R5596 2CRT_B_R2
1
2
BLM18BB220SN-GP
0R2J-2-GP

M_BLUE

1

[74]

11

7
2
8
3
9
4
10
5

CRT_G

L5501
[74]

6
1

CRT_R

M_RED

2

[74]

1

SSID = VIDEO

2

1

4

2

5

C5520
SC22P50V2JN-4GP

5V @ CRT side

+3.3V_RUN

G3201TL1U-1-GP

73.03201.00J
[21,54,57] EDID_SELECT#

Q5517

EDID_SELECT#
DDC_DATA_CON2
U5543

DIS
[81] CRT_CLK_DDC
A

[20] GMCH_DDCCLK

3
2
1

B0
GND
B1

A
VCC
S

4
5
6

+3.3V_RUN
DDC_CLK_CON2

4

3

5

2

6

EDID_SELECT#

DDC_DATA_CON

1


DMN66D0LDW-7-GP

G3201TL1U-1-GP

DDC_CLK_CON2

Wistron Corporation

DDC_CLK_CON

73.03201.00J

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

H=>B1 -iGPU PCH (UMA)
L=>B0 -dGPU GPU (DIS)

Title
GMCH_DDCDATA
GMCH_DDCCLK

5

A

R5593
R5592

1
1

UMA
UMA

2 0R2J-2-GP
2 0R2J-2-GP

DDC_DATA_CON2
DDC_CLK_CON2

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
A3

CRT Connector

Document Number

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet
1

55

of

91

5

4

3

2

1

D

D

C

C

(Blank)

B

B

A

A



Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
Document Number
Custom

(Reserve)

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet
1

56

of

91

5

4

3

2

1

UMA/DIS HDMI signal select circuit
Place near connector
[81]
[81]
[81]
[81]
[81]
[81]
[81]
[81]

C5769
C5764
C5770
C5765
C5768
C5767
C5771
C5766

IFPC_D2+
IFPC_D2IFPC_D1+
IFPC_D1IFPC_D0+
IFPC_D0IFPC_TXC+
IFPC_TXC-

2
2
2
2
2
2
2
2

DIS1
DIS1
DIS1
DIS1
DIS1
DIS1
DIS1
DIS1

HDMI_TXD2
HDMI_TXD#2
HDMI_TXD1
HDMI_TXD#1
HDMI_TXD0
HDMI_TXD#0
HDMI_TXC
HDMI_TX#C

SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP

HDMI1

D

HDMI_TXD0 RN5716 1
HDMI_TXD#0
2
HDMI_TXC
3
HDMI_TX#C
4

HDMI_HP_DET_CON

8 SRN499F-GP
7
6
5

HDMI_TX#C
HDMI_TXC
HDMI_TXD#0

Place near connector

1

22
+3.3V_RUN

R5755 1
R5756 1

4K7R2J-2-GP
4K7R2J-2-GP

DY 22
DY

jitter elimination control
PS8101

35
34

HDMI_C_DATA1HDMI_C_DATA1+

44
45

IN_D3IN_D3+

OUT_D3OUT_D3+

17
16

HDMI_TXD#1
HDMI_TXD1

HDMI_C_DATA2HDMI_C_DATA2+

47
48

IN_D4IN_D4+

OUT_D4OUT_D4+

14
13

HDMI_TXD#2
HDMI_TXD2

PC0
PC1

3
4

REXT_HDMI
+3.3V_RUN
R5754
8101_OE#
DDC_EN_PS8101
4K7R2J-2-GP
2
1

6
10
25
32

SDVO_DAT
SDVO_CLK
HDMI_HP_DET

30
29
28

HDMI_HP_DET_CON
HDMI_SDATA_CON
HDMI_SCLK_CON

DY Q5702

G

8101_OE#

2N7002A-7-GP

UMA

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

5V @ HDMI side

+3.3V_RUN

Q5704
2N7002A-7-GP
Q5703
DMN66D0LDW-7-GP

R5717

DIS 10KR2J-3-GP

DIS

B

4

1

PS8101-GP

UMA20KR2J-L2-GP

SDVO_DAT [20]
SDVO_CLK [20]
HDMI_HP_DET [20,21]

HDMI_HP_DET_CON G

1
5
12
18
24
27
31
36
37
43
49

2
R5752
UMA453R2F-1-GP

R5716

DIS 20KR2J-L2-GP

2

HPD_SINK
SDA_SINK
SCL_SINK

8
9
7

+5V_RUN

3

SDA
SCL
HPD

REXT
RT_EN#
OE#
DDC_EN

UMA

+3.3V_RUN

R5747

UMA
PC0
PC1

R5751

DY 5K1R2F-2-GP

DY

S

1

1 4K7R2J-2-GP
1 4K7R3J-3-GP

HDMI level shift circuit
R5718
10KR2J-3-GP

1

20
19

1

OUT_D2OUT_D2+

6

IN_D2IN_D2+

+3.3V_RUN_GPU

1

41
42

HDMI_TXD#0
HDMI_TXD0

HDMI_HP_DET_R#2

HDMI_TX#C
HDMI_TXC

2

23
22

5

OUT_D1OUT_D1+

2

2
11
15
21
26
33
40
46

IN_D1IN_D1+

1

38
39

1

HDMI_C_DATA0HDMI_C_DATA0+

D

HDMI_C_CLKHDMI_C_CLK+

+3.3V_RUN

2

C

(internal pull-up)

NC#35
NC#34

PC0 PC1 EQ
0
0 8db
0
1 4db
1
0 12db
1
1 0db

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

C5775
C5773
U5750
SCD1U10V2KX-4GP SCD1U10V2KX-4GP

B

22.10296.061

+5V_RUN

PI3VDP411LS

PS8101 TMDS inputs equalization control

DW

Close HDMI Connect

(internal pull-lo)

4K7R2J-2-GP
4K7R2J-2-GP

SKT-HDMI19P-25-GP
D5705
BAV99-4-GP

DY
2

2

UMA

2

UMA

2

UMA

DY 22
DY

1

8101_NC35
8101_NC34

1

1

1

1
2

UMA

R5749 1
R5750 1

3

HDMI_HP_DET_CON

C

01/15 Item 1

HDMI_TXD1
HDMI_TXD#2

UMA HDMI level shift circuit
+3.3V_RUN

UMA
UMA

HDMI_TXD0
HDMI_TXD#1

HDMI_TXD2

C5772
C5774
SCD1U10V2KX-4GP SCD1U10V2KX-4GP

2
2

DIS
G

20

Close to PCH

R5753
R5748

+3.3V_RUN

D

1
UMA
1
UMA
1
UMA
1
UMA
1
UMA
1
UMA
1
UMA
1
UMA

Q5701
2N7002A-7-GP

S

2
2
2
2
2
2
2
2

HDMI_C_CLKHDMI_C_CLK+
HDMI_C_DATA0HDMI_C_DATA0+
HDMI_C_DATA1HDMI_C_DATA1+
HDMI_C_DATA2HDMI_C_DATA2+

S

HDMI_CLK-_C
HDMI_CLK+_C
HDMI_DATA0-_C
HDMI_DATA0+_C
HDMI_DATA1-_C
HDMI_DATA1+_C
HDMI_DATA2-_C
HDMI_DATA2+_C

SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP

2

[20]
[20]
[20]
[20]
[20]
[20]
[20]
[20]

C5776
C5778
C5782
C5780
C5781
C5779
C5777
C5783

19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2

HDMI_SDATA_CON
HDMI_SCLK_CON

D

DIS

21

IFPC_Lo

DIS

8 SRN499F-GP
7
6
5

D

23

+5V_RUN
HDMI_TXD2 RN5713 1
HDMI_TXD#2
2
HDMI_TXD1
3
HDMI_TXD#1
4

HDMI_HP_DET_CON

HDMI_HPD_3D3_CON

71.P8101.003 (PARADE)
2ND = 71.03360.A0K (NXP)

2
1

+3.3V_RUN_GPU

2
1

+3.3V_RUN

Close PCH

Close GPU

RN5714
SRN2K2J-1-GP

UMA/DIS HDMI Detection select circuit

RN5715
SRN2K2J-1-GP

DIS

U5749

+3.3V_RUN

3
4

+5V_RUN

+3.3V_RUN

D5704
RB751V-40-1-GP
+3.3V_RUN

HDMI_SDATA_CON_L
EDID_SELECT#

5V @ HDMI side

Q5720

73.03201.00J
R5772
0R2J-2-GP
1
2
+3.3V_RUN
U5747

[20] SDVO_CLK

H=>B1 -iGPU PCH (UMA)
L=>B0 -dGPU GPU (DIS)
5

3
2
1

B0 DIS A
GND VCC
B1
S

G3201TL1U-1-GP

73.03201.00J

4
5
6

5

DIS 2

6

DY

[81] HDMI_SCLK_DDC

3

HDMI_SDATA_CON

H=>B1 -iGPU PCH (UMA)
L=>B0 -dGPU GPU (DIS)

R5722
0R2J-2-GP
1
2

DY

R5773
0R0402-PAD

1

2

HDMI_SDATA_CON
HDMI_SCLK_CON
HDMI_SCLK_CON

C5721
SC22P50V2JN-4GP

DY

Wistron Corporation
DY

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
C5722
SC22P50V2JN-4GP

Title

http://laptop-motherboard-schematic.blogspot.com/
4

73.03201.00J

Close PCH

A

HDMI_SCLK_CON_L

EDID_SELECT#

EDID_SELECT# [21,54,55]



1
DMN66D0LDW-7-GP

HDMI_SCLK_CON_L

HDMI_HPD_3D3_CON

G3201TL1U-1-GP
R5746
100KR2J-1-GP

RN5711
SRN2K2J-1-GP

1

EDID_SELECT#

[21,54,55] EDID_SELECT#

4

4
5
6

3
4

HDMI_SDATA_CON_L

G3201TL1U-1-GP

A

DY

A
VCC
S

1

4
5
6

2

[20] SDVO_DAT

B0 DIS A
GND VCC
B1
S

Close GPU

B0
GND
B1

+5V_HDMI

U5746

3
2
1

[81] HDMI_SDATA_DDC

R5745
100KR2J-1-GP
D5703
RB751V-40-1-GP

1

2 0R2J-2-GP

+5V_HDMI_C

DY

2+5V_HDMI_C
2
1+5V_HDMI
2

1

2

R5771

1
1

UMA/DIS HDMI DDC CLK/DAT select circuit

2

[20,21] HDMI_HP_DET

HDMI_SDATA_DDC
HDMI_SCLK_DDC

1

SDVO_DAT
SDVO_CLK

2

3
4

DIS
3
2
1

[81] HDMI_HP_DET_VGA

3

2

Size
Document Number
Custom

HDMI Connector

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet
1

57

of

91

5

4

3

2

1

D

D

SSID = Thermal

Fan Connector
C

AFTP5803

1

EMC2102_FAN_TACH_1

AFTP5802

1

EMC2102_FAN_DRIVE

C

FAN1
[39] EMC2102_FAN_TACH_1

EMC2102_FAN_TACH_1

[39] EMC2102_FAN_DRIVE

EMC2102_FAN_DRIVE

1

D5801
SDMK0340L-7-F-GP

1

1
4
FOX-CON3-6-GP-U

20.D0210.103

A

2

C5801
SC10U6D3V5MX-3GP

AFTP5801

K

*Layout* 25 mil

5
3
2

B

B



A

A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
A3

Document Number

FAN

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet
1

58

of

91

SSID = SATA

SSID = SATA

SATA HDD Connector
HDD1

ODD Connector

16
S1

ODD1

8
NP1

1 SCD01U50V2KX-1GP
1 SCD01U50V2KX-1GP

SATA_IRXN1_OTXN1
SATA_IRXP1_OTXP1

2

S5
S6

1

1

SATA_IRXP0_HTXP0_C [24]

+3.3V_RUN
C5914
SCD01U50V2KX-1GP

P1
P3
P4
P5

+5V_RUN

C5908
SCD1U10V2KX-4GP

SATA_IRXP0_HTXP0 2

S7

P2

+5V_RUN

P6

P1
P2
P3
P4
P5
P6
NP2
9

P7
P8
P9
P10
P11

FFS_INT2 [40]

P12
P13
P14
P15

SKT-SATA7P+6P-51-GP

17

62.10065.671
SKT-SATA7P+15P-30-GP

62.10065.911
Close to CONN
5V power pin

2

DY

1
2

1

C5902
SC10U6D3V5MX-3GP

1
2

Close to CONN
3.3V power pin
+3.3V_RUN

C5907
SCD1U16V2KX-3GP

1

C5903
SC10U6D3V5MX-3GP

+5V_RUN

2

C5915
SC10U6D3V5MX-3GP

SATA_ITXP0_HRXP0 [24]

S4

SATA_IRXN0_HTXN0

C5913
SCD01U50V2KX-1GP
+3.3V_RUN

S2
S3
S4
S5
S6
S7

+5V_RUN

2

SATA_RX- and SATA_RX+ Trace
Length match within 20 mil

2
2

1

C5911
C5912

2

[24] SATA_IRXN1_OTXN1_C
[24] SATA_IRXP1_OTXP1_C

1

[24] SATA_IRXN0_HTXN0_C

S1
[24] SATA_ITXP1_ORXP1
[24] SATA_ITXN1_ORXN1

S2
S3

[24] SATA_ITXN0_HRXN0

C5901
SC56P25V2JN-GP



Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

http://laptop-motherboard-schematic.blogspot.com/

Size
A3

Document Number

HDD/ODD Connector

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet

59

of

91

5

4

3

2

1

D

D

C

C

(Blank)

B

B

A

A



Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
Document Number
Custom

(Reserve)

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet
1

60

of

91

5

4

3

2

1

D

D

C

C

(Blank)

B

B

A

A



Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
Document Number
Custom

(Reserve)

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet
1

61

of

91

5

4

3

2

1

SSID = RBATT

SSID = Flash.ROM

D

D

SPI FLASH ROM (256K bytes) for KBC
EC_SPI_CS#
EC_SPI_HOLD#

KBC_PWR

1

RN6201
SRN100KJ-6-GP
1
2

RTC Connector

1

4
3

KBC_PWR

2

2

DY

+3.3V_RTC_LDO
KBC_PWR

C6203
SC4D7U10V3KX-GP

1

C

C6204
SCD1U16V2KX-3GP

C

+RTC_CELL

D6201

R6201
100KR2J-1-GP

1

+RTC_VCC
RTC1

[37] EC_SPI_CS#
[37] EC_SPI_DI
[37] EC_SPI_WP#_R

EC_SPI_CS#
SPI_DO
EC_SPI_WP#

2 0R0402-PAD
2 0R0402-PAD

1
2
3
4

CS#
SO
WP#
GND

1
VCC
HOLD#
SCK
SI

8
7
6
5

EC_SPI_HOLD#

DW

C6202
SC1U10V3KX-3GP

BAT54CW-1-GP

EC_SPI_CLK [37]
SPI_DIO [37]

12/08 Item 5

1

3
1

2

1KR2J-1-GP

2
4
AFTP6202

Width=20mils

FOX-CON2-7-GP

1

DY

20.D0075.102

2

1

AT25DF021-SSH-T-GP

R6202
RTC_PWR

2

1

R6205 1
R6204 1

2

2

3
KBC_PWR

U6203

R6203

DY100KR2J-1-GP
2

C6207
SC4D7P50V2CN-1GP
AFTP6201

1

+RTC_VCC

DW
01/08 Item 1
1.Add R6203 Pull Lo resister

B

B

SPI FLASH ROM (4M bytes) for PCH
C6205
SC4D7U10V3KX-GP

1

+3.3V_RUN
PCH_SPI_WP#
PCH_SPI_HOLD_0#

C6206
SCD1U16V2KX-3GP

DY

2

RN6202
SRN4K7J-8-GP
4
3

1

1
2

2

+3.3V_RUN

1

+3.3V_RUN

R6207
4K7R2J-2-GP

+3.3V_RUN

U6202

2
1

2
R6206
15R2J-GP

A

PCH_SPI_DI_R
PCH_SPI_WP#

1
2
3
4

CS#
SO
WP#
GND

VCC
HOLD#
SCK
SI

8
7
6
5

PCH_SPI_HOLD_0#
PCH_SPI_CLK [24]
PCH_SPI_DO [24]


A

1

[24] PCH_SPI_CS0#
[24] PCH_SPI_DI

AT25DF321-SU-GP

DY
2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

C6208
SC4D7P50V2CN-1GP

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
A3

EEPROM/RTC Connector

Document Number

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet
1

62

of

91

5

4

3

2

1

SSID = USB
+5V_USB1

USB Power

+5V_USB1
USB2
U6303

4

2
USB_OC#2_3 [21]

1

1

C6305
SC1U10V3KX-3GP

2

DY
2

1

DY

1
2
3
4
5
6
7
8

USB_P2USB_P2+

DY

TPS2062AD-GP

DY
2

at least 80 mil

8
7
6
5

OC1#
OUT1
OUT2
OC2#

2

[37,76] USB_PWR_EN#

GND
IN
EN1#
EN2#

C6306
SCD1U10V2KX-4GP

1

C6302
SCD1U10V2KX-4GP

D

1
2
3
4

1

at least 80 mil

D6305
1

+5V_USB1

R6307
100KR2J-1-GP

+5V_ALW

USB_P2-

TC6303
ST100U6D3VBML1GP

2

3

USB_P2+
AFTP6317
AFTP6316
AFTP6321
AFTP6320

PRTR5V0U2X-GP

USB_P2USB_P2+
+5V_USB1
GND

1
1
1
1

USB_PWR
USBUSB+
GND
GND
GND
NC#7
NC#8

D

SKT-USB-115-GP-U2

22.10218.K01
+5V_USB1
USB3

USB_PP3

USB_PP3

USB_P3+
1

[21]

TR6304
DLW21HN900SQ2LGP-U

USB_P3USB_P3+
+5V_USB1

2

USB_P2+
2

USB_PP2

USB_PP2

1

[21]

TR6305
DLW21HN900SQ2LGP-U

D6304
1

4
AFTP6315
AFTP6314
AFTP6318
AFTP6319

[21]

USB_PN2

USB_PN2

USB_P2-

[21]

3

4

3

4

DY

C

USB_P3-

USB_PN3

USB_PN3

1
2
3
4
5
6
7
8

2

USB_P3-

3

USB_P3USB_P3+
+5V_USB1
GND

1
1
1
1

USB_PWR
USBUSB+
GND
GND
GND
NC#7
NC#8
SKT-USB-115-GP-U2

22.10218.K01

USB_P3+

C

PRTR5V0U2X-GP

DW

DW

01/06 Item 1
1.co-layout should not be allowed in X-build

01/06 Item 1
1.co-layout should not be allowed in X-build

ESATA Power
U6302

USB_OC#4_5 [21]

2

DY

+5V_USB2

1

DW
2

1

C6304
SC1U10V3KX-3GP

1

DY

1

at least 80 mil

8
7
6
5

2

2

OC1#
OUT1
OUT2
OC2#

TPS2062AD-GP

DY
B

+5V_USB2

GND
IN
EN1#
EN2#

C6303
SCD1U10V2KX-4GP

[37,76] USB_PWR_EN#

1
2
3
4

2

1

C6301
SCD1U10V2KX-4GP

at least 80 mil

R6305
100KR2J-1-GP

+5V_ALW

ESATA1

01/06 Item 1
1.co-layout should not be allowed in X-build

TC6302
ST100U6D3VBML1GP

DW

[24] ESATA_ITX_DRX_P4
[24] ESATA_ITX_DRX_N4

R6304
R6310

2 0R0402-PAD
2 0R0402-PAD

1
1

01/06 Item 1
1.co-layout should not be allowed in X-build

1

VBUS

SATA_ITX_DRX_P4
SATA_ITX_DRX_N4

6
7

A+
A-

SATA_IRX_DTX_P4
SATA_IRX_DTX_N4

10
9

B+
B-

ESATA_USB_D+
ESATA_USB_D[21]

USB_PP4

USB_PP4

3
2

D+
D-

GND
GND
GND
GND
GND
GND
GND
GND

4
5
8
11
12
13
14
15

B

AFTP6306

SKT-USB-SATA-GP

ESATA_USB_D+

22.10254.161

3

4

1

[21]

USB_PN4

2

1

TR6301
DLW21HN900SQ2LGP-U

USB_PN4

ESATA_USB_DAFTP6308
AFTP6309
AFTP6302

+5V_USB2

DW

D6306
1

01/06 Item 1
1.co-layout should not be allowed in X-build

A

1
1
1

+5V_USB2
ESATA_USB_DESATA_USB_D+

4

A



DY

Wistron Corporation
C6308 1

[24] ESATA_IRX_DTX_N4_C

2

ESATA_IRX_DTX_N4

1 R6311 2
0R0402-PAD

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

SATA_IRX_DTX_N4
ESATA_USB_D-

2

SCD01U16V2KX-3GP

3

ESATA_USB_D+
Title

PRTR5V0U2X-GP
[24] ESATA_IRX_DTX_P4_C

C6307 1

2

SCD01U16V2KX-3GP

5

ESATA_IRX_DTX_P4

1 R6312 2
0R0402-PAD

SATA_IRX_DTX_P4

USB /ESATA Port

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
Document Number
Custom

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet
1

63

of

91

5

4

3

2

1

SSID = Wireless

D

D

Mini Card Connector(802.11a/b/g/n)
+1.5V_RUN

+3.3V_RUN

WLAN1

53
1
+5V_ALW

1

1
2

1

C6406
SCD1U16V2KX-3GP

2

DY

C6404
SC10U6D3V5MX-3GP

1

1

DY
2

[37]
[37]

+1.5V_RUN

C6402
SCD1U16V2KX-3GP

2

DY

C6405
SC10U6D3V5MX-3GP

1

+3.3V_RUN

[23] CLK_PCIE_MINI1#
[23] CLK_PCIE_MINI1

E51_RXD
E51_TXD

R6404 1
R6403 1

DY
DY

C6407
SCD1U16V2KX-3GP

C6403
SCD1U16V2KX-3GP

DY

2

C6401
SCD1U16V2KX-3GP

2

C

[77]
WLAN_ACT
[77]
BT_ACT
[23] MINI1_CLKREQ#

2

1

+3.3V_RUN

2 0R2J-2-GP
2 0R2J-2-GP

E51_RXD_R
E51_TXD_R
[23] PCIE_IRXN2_MTXN2
[23] PCIE_IRXP2_MTXP2
[23] PCIE_ITXN2_MRXN2
[23] PCIE_ITXP2_MRXP2
+3.3V_RUN

2

1

WLAN_ACT
R6402
C6408
SC220P50V2KX-3GP

+5V_ALW

1

DY

2

+5V_MINI_DEBUG

0R3J-0-U-GP

NP1
2

3
5
7
9
11
13
15

4
6
8
10
12
14
16

17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
NP2

54

C

PLT_RST#

WIFI_RF_EN [37]
PLT_RST# [9,21,37,65,70,76,77,80]
+3.3V_RUN

PCH_SMBCLK
PCH_SMBDATA

PCH_SMBCLK [7,18,19,23,40,65]
PCH_SMBDATA [7,18,19,23,40,65]

USB_WLAN_NUSB_WLAN_P+

USB_WLAN_NUSB_WLAN_P+
LED_WLAN_WWAN_WIMAX_OUT# [65,66]

DW

DW

01/06 Item 1
1.co-layout should not be allowed in X-build

10/22 Item 20

SKT-MINI52P-41-GP
R6406
0R0603-PAD-1-GP

B

62.10043.841

B

USB_WLAN_N-

1

2

USB_PN1

USB_WLAN_P+

1

2

USB_PP1

USB_PN1 [21]
USB_PP1 [21]

R6405
0R0603-PAD-1-GP



A

A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
A3

MINICARD(WLAN)/ITP CONN

Document Number

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet
1

64

of

91

5

4

3

SSID = Wireless

2

1

Mini Card Connector(WWAN)

Place near MINI Card CONN
+3.3V_RUN
+3.3V_RUN

+1.5V_RUN

1

2

+3.3V_RUN

MINI2_CLKREQ_R#

R6501

D

D

+1.5V_RUN

[23] MINI2_CLKREQ_R#
[23] CLK_PCIE_MINI2#
[23] CLK_PCIE_MINI2

Place near Pin 24
C6506
SCD1U16V2KX-3GP

1
2

1

C6511
SC33P50V2JN-3GP

2

SCD047U10V2KX-2GP

1

C6510

2

[23] PCIE_IRXN4_MTXN4
[23] PCIE_IRXP4_MTXP4
[23] PCIE_ITXN4_MRXN4
[23] PCIE_ITXP4_MRXP4
+3.3V_RUN

1

C6515
SC33P50V2JN-3GP

2

SCD047U10V2KX-2GP

1

C6514

+1.5V_RUN

2

UIM_CLK_SIM

53

0R0402-PAD
2
1

3
5
7
9
11
13
15

4
6
8
10
12
14
16

17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
NP2

54

UIM_CLK

UIM_CLK

[76]

1

NP1
2

1

+3.3V_RUN

C

WWAN1

2

1

C6508
SC33P50V2JN-3GP

DY
2

C6512
SC33P50V2JN-3GP

1
2

SCD047U10V2KX-2GP

1

C6509

DY
2

SCD047U10V2KX-2GP

1

C6513

2

2

1

PTC6502
ST220U6D3VDM-20GP

R6515
10KR2J-3-GP

UIM_PWR
UIM_DATA
UIM_CLK_SIM
UIM_RESET
UIM_VPP

WWAN_RF_EN
PLT_RST#

C6507
SC100P50V2JN-3GP

UIM_PWR [76]
UIM_DATA [76]
UIM_RESET [76]
UIM_VPP [76]

WWAN_RF_EN [21]
PLT_RST# [9,21,37,64,70,76,77,80]
+3.3V_RUN

PCH_SMBCLK
PCH_SMBDATA

PCH_SMBCLK [7,18,19,23,40,64]
PCH_SMBDATA [7,18,19,23,40,64]

USB_P5USB_P5+

1
1
LED_WLAN_WWAN_WIMAX_OUT# [64,66]

R6502
0R0603-PAD-1-GP
2
2

USB_PN5 [21]
USB_PP5 [21]

R6503
0R0603-PAD-1-GP
C

DW
10/22 Item 20

SKT-MINI52P-41-GP

62.10043.841

B

B



A

A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
A3

WWAN Connector

Document Number

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet
1

65

of

91

5

4

3

2

For LED & Capacity board

PWR BTN LED

LED Type

Color

PWR_BTN_LED#

[37] PWR_BTN_LED#

For LED & Capacity board:

2
R6628

1PWR_BTN_LED_R#
20KR2J-L2-GP

Power rail

White

SCRL LED

D

ALW
[37] SCR_LOCK_LED#

CAP LED

White

ALW

NUM LED

White

ALW

CAPS LED

PWR BTN LED

White

ALW

[37] CAP_LOCK_LED#

SATA ACT LED1

White

RUN

BT ACT LED

White

RUN

SCR_LOCK_LED#

2
R6620

1 SCRL_LED_R#
20KR2J-L2-GP

SCRL_LED_R# [78]

CAP_LOCK_LED#

2
R6621

1 CAP_LED_R#
20KR2J-L2-GP

CAP_LED_R# [78]

NUM_LOCK_LED#

2
R6622

1 NUM_LED_R#
20KR2J-L2-GP

NUM_LED_R# [78]

NUM LED

Remove BJT to daughetr board

[37] NUM_LOCK_LED#

WLAN WWAN
WIMAX LED

PWR_BTN_LED_R# [78]

For LED & Capacity board:

SCRLK LED

D

1

RUN

White

For LED & Capacity board:

Bluetooth LED

LED_BT_ACT_K_R#
1
20KR2J-L2-GP

2
R6623

[77] BT_ACTIVE_K#

LED_BT_ACT_K_R# [78]

C

C

For IO board
LED Type

Color

PWR LED2

Power rail

White(Multi-color) ALW

BATTERY LED2

Amber(Multi-color)

ALW

DW
White(Multi-color) ALW

WLAN WWAN WIMAX LED

10/22 Item 20

2
R6634

[64,65] LED_WLAN_WWAN_WIMAX_OUT#

1
20KR2J-L2-GP

HD LED

WLAN_WWAN_WIMAX_LED# [78]

For LED&Capacity board:

+5V_RUN
Q6606

B

R2

2
R6625

SATA_ACT_C#
1
20KR2J-L2-GP

B

R1

[24] SATA_LED#

E
C

HDD_LED

B

R6626
0R0402-PAD
1
2

SATA1_ACT_LED

SATA1_ACT_LED [78]

DDTA143ECA-7-F-GP

Battery

& Power LED

DW
12/08 Item 5

Orange
R6630
0R0402-PAD
1
2

[37] BATT_ORANGE_LED

Q6607
BAT_O_LED_R

B

BAT_O_LED

C

R1
R2

R6617
0R0402-PAD
1
2

BATT_LED_ORANGE

BATT_LED_ORANGE [77]

E

For IO board

PDTC124EU-1-GP

White
Q6609

R6632

1 0R0402-PAD
2 BAT_W_LED_R

[37] BATT_WHITE_LED
A

B

R2
PDTC124EU-1-GP

B

R1

PWRLED#

BATT_LED_WHITE

BATT_LED_WHITE [77]


Wistron Corporation

For IO board
+5V_ALW

E

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

C

POWER_LED_L

R6619
0R0402-PAD
1
2

Title
PWR2_LED

PWR2_LED

[77]

DDTA143ECA-7-F-GP

For IO board

5

A

Q6608
R2

[37]

R6629
0R0402-PAD
1
2

E

white
R6631
20KR2J-L2-GP
1
2 POWER_LED_R#

BAT_W_LED

C

R1

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
A3

Document Number

LED

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet
1

66

of

91

5

4

3

2

1

D

D

C

C

(Blank)

B

B

A

A



Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
Document Number
Custom

(Reserve)

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet
1

67

of

91

5

4

3

SSID = KBC

2

1

SSID = Touch.Pad

Internal KeyBoard Connector
KB_DET#

TouchPad Connector

AFTP6863

1

D

KB1

+5V_RUN

C

1

1
RN6802
SRN10KJ-5-GP

KROW[0..7] [37]
KCOL[0..16] [37]
[37]
[37]

C6805
SCD1U16V2KX-3GP

KB_DET# [25]
AFTP6837
AFTP6836
AFTP6839
AFTP6838
AFTP6841
AFTP6840
AFTP6842
AFTP6843
AFTP6844
AFTP6845
AFTP6847
AFTP6846
AFTP6849
AFTP6848
AFTP6851
AFTP6850
AFTP6853
AFTP6852
AFTP6855
AFTP6854
AFTP6857
AFTP6856
AFTP6859
AFTP6858
AFTP6860

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

2

KROW7
KROW6
KROW4
KROW2
KROW5
KROW1
KROW3
KROW0
KCOL5
KCOL4
KCOL7
KCOL6
KCOL8
KCOL3
KCOL1
KCOL2
KCOL0
KCOL12
KCOL16
KCOL15
KCOL13
KCOL14
KCOL9
KCOL11
KCOL10

2
1

KB_DET#

2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

3
4

1

+5V_RUN

TPAD1
AFTP6835
1

C6804
SC33P50V2JN-3GP

5
1
2
3
4

TPCLK
TPDATA
1
1

31

2
2

D

C6806
SC33P50V2JN-3GP

6
ACES-CON4-10-GP-U

20.K0320.004
AFTP6815
AFTP6816
AFTP6817

1
1
1

+5V_RUN
TPCLK
TPDATA

C

AFTP6862

32
HRS-CON30-1-GP-U

20.K0259.030

B

KB Backlight CONN

B

+5V_RUN

CON5
5

R6815
1KR2J-1-GP
CN7_P2
1
2
KB_BL_DET#
KB_BL_CTRL#

[37] KB_BL_DET#

AFTP6864

2
3
4

1
1
1
1

+5V_RUN
CN7_P2
KB_BL_DET#
KB_BL_CTRL#

6

D

1

AFTP6833
AFTP6832
AFTP6834
AFTP6861

1

ACES-CON4-10-GP-U

DY
2

AO3418 MAX 3.8A

1

R6803
100KR2J-1-GP

2

S

2

1

+5V_RUN
1

+5V_RUN

20.K0320.004

Q6808
AO3418-GP

G

[37] KB_BL_CTRL

C6812
SCD1U25V2ZY-1GP

C6895
SC4D7U10V5KX-1GP

A

A



Place near CON5

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Keyboard/Touch Pad

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
Document Number
Custom

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet
1

68

of

91

5

4

3

2

1

Hall Sensor Connector
D

D

1

+3.3V_ALW

+3.3V_ALW
1

2

C6902
SCD1U16V2KX-3GP

HALL1
1

VDD

3

OUTPUT

[37] LID_CLOSE#

1

2

DY

R6903
100KR2J-1-GP

VSS
LID_CLOSE#

1
R6901

LID_CLOSE#_1
2
10R2J-2-GP

C6901
SCD047U10V2KX-2GP

2

2

EM-6781-T30-GP

C

C

B

B

A

A



Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
Document Number
Custom

Hall sensor

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet
1

69

of

91

5

4

3

2

1

D

D

GOLDEN FINGER FOR DEBUG BOARD
+3.3V_RUN
[24,37,76]
[24,37,76]
[24,37,76]
[24,37,76]
[24,37,76]
[9,21,37,64,65,76,77,80]

C

LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LPC_LFRAME#
PLT_RST#

[21] PCLK_FWH

DBT1
1
2
3
4
5
6
7
8
9
10
11
12

C

DY
MLX-CON10-7-GP

20.D0183.110

B

B

A

A



Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
Document Number
Custom

Debug port

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet
1

70

of

91

5

4

3

2

1

D

D

C

C

(Blank)

B

B

A

A



Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
Document Number
Custom

(Reserve)

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet
1

71

of

91

5

4

3

2

1

D

D

C

C

(Blank)

B

B

A

A



Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
Document Number
Custom

(Reserve)

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet
1

72

of

91

5

4

3

2

1

For EMI

SSID = User.Interface

USB_PP7 [21]
D

D

3

4

Camera Connector
CAMERA1

L7301
DLW21HN900SQ2LGP-U

9
1

AUD_DMIC_IN0_R

2

R7300

1 33R2J-2-GP

AUD_DMIC_IN0

AUD_DMIC_CLK_G

[77]

AUD_DMIC_CLK_G

DW
01/18 Item 1

[77]

10

1
C7305
SC4D7U6D3V3KX-GP

ACES-CON8-3-GP-U

1

AFTP7307

20.F0779.008
EC7302

DY SC220P50V2KX-3GP
2

DY
2

EC7303
SC220P50V2KX-3GP

1

USB_PN7 [21]

1

2

EC7304
SCD1U16V2KX-3GP

2

1

R7301
0R0603-PAD-1-GP
1
2

CAMERA_USB1+
CAMERA_USB1+3.3V_CAMERA

2

2
3
4
5
6
7
8

+3.3V_CAMERA

1

Camera Power
+3.3V_RUN

DW
01/06 Item 1
1.co-layout should not be allowed in X-build

DW

C

C

12/08 Item 5

AFTP7303
AFTP7304
AFTP7305
AFTP7306

1
1
1
1

AUD_DMIC_IN0_R
+3.3V_CAMERA
CAMERA_USB1CAMERA_USB1+

B

B



A

A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
A3

Camera CONN

Document Number

Rev

X01

Vostro Montevina Discrete

Date: Monday, January 18, 2010

Sheet
1

73

of

91

5

4

3

2

1

UMA/DIS LVDS signal select circuit
+1.8V_RUN

DGPU_1D8V_SEL#

9

BTMDS2+
BTMDS2TMDS2+
BTMDS1+
TMDS2BTMDS1TMDS1+
BTMDS0+
TMDS1BTMDS0TMDS0+
BTMDSCLK+
TMDS0BTMDSCLK- TMDSCLK+
TMDSCLK-

3
4
6
7
11
12
14
15

GND

D

C7403
SCD1U10V2KX-4GP

VGA_TXAOUT2+ [54]
VGA_TXAOUT2- [54]
VGA_TXAOUT1+ [54]
VGA_TXAOUT1- [54]
VGA_TXAOUT0+ [54]
VGA_TXAOUT0- [54]
VGA_TXACLK+ [54]
VGA_TXACLK- [54]

1
5
10
13
17
19
21
39
41

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

DIS

C7401
SCD1U10V2KX-4GP

UMA LVDS signal circuit

SEL

H=>BTMDS -iGPU PCH (UMA)
L=>ATMDS -dGPU GPU (DIS)

1

29
28
27
26
25
24
23
22

DIS DIS DIS C7404
SCD1U10V2KX-4GP
2

MCH_LVDSA_DAT2
MCH_LVDSA_DAT2#
MCH_LVDSA_DAT1
MCH_LVDSA_DAT1#
MCH_LVDSA_DAT0
MCH_LVDSA_DAT0#
MCH_LVDSA_CLK
MCH_LVDSA_CLK#

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

1

[20]
[20]
[20]
[20]
[20]
[20]
[20]
[20]

ATMDS2+
ATMDS2ATMDS1+
ATMDS1ATMDS0+
ATMDS0ATMDSCLK+
ATMDSCLK-

2

VGA_LVDSA_DAT2
VGA_LVDSA_DAT2#
VGA_LVDSA_DAT1
VGA_LVDSA_DAT1#
VGA_LVDSA_DAT0
VGA_LVDSA_DAT0#
VGA_LVDSA_CLK
VGA_LVDSA_CLK#

2

D

[81]
[81]
[81]
[81]
[81]
[81]
[81]
[81]

2
8
16
18
20
30
40
42

1

U7411
38
37
36
35
34
33
32
31

MCH_LVDSA_CLK
MCH_LVDSA_CLK#

1
2

RN7408
SRN0J-6-GP
4
3

UMA

VGA_TXACLK+
VGA_TXACLK-

MCH_LVDSA_DAT2
MCH_LVDSA_DAT2#

1
2

RN7409
SRN0J-6-GP
4
3

VGA_TXAOUT2+
VGA_TXAOUT2-

MCH_LVDSA_DAT1
MCH_LVDSA_DAT1#

1
2

RN7411
SRN0J-6-GP
4
3

VGA_TXAOUT1+
VGA_TXAOUT1-

MCH_LVDSA_DAT0
MCH_LVDSA_DAT0#

1
2

RN7410
SRN0J-6-GP
4
3

VGA_TXAOUT0+
VGA_TXAOUT0-

UMA

UMA

43

PI3HDMI412FTZHE-GP

Main Source: 71.03412.C0G
2nd Source: 71.03412.C0G

C

C

UMA

C7407
SCD1U10V2KX-4GP

DW

2

1

+5V_CRT_RUN

10/23 Item 25

B

B

UMA/DIS CRT Hsync/Vsync select circuit
DGPU_SELECT

+3.3V_RUN

Hsync & Vsync level shift

DGPU_SELECT#

UMA

1 0R2J-2-GP

U7408A
SSAHCT125PWR-GP
VSYNC_5
3

+5V_CRT_RUN
U7435
16
DGPU_SELECT# 1 VCC
S
2 IA0
[81] VGA_BLUE
3 IA1
[20] MCH_BLUE
5 IB0
[81] VGA_GREEN
6 IB1
[20] MCH_GREEN
11 IC0
[81] VGA_RED
10 IC1
[20] MCH_RED
14 ID0
13 ID1
8 GND

7

VSYNC_5

6

RN7445
VSYNC_5 2
HSYNC_5 1

DGPU_SELECT

3
4

JVGA_VS [55]
JVGA_HS [55]

SRN33J-5-GP-U

1
DIS

MCH_RED

DIS

YA

4

M_BLUE [55]

YB

7

M_GREEN [55]

YC

9

M_RED [55]

YD

12

OE#

15

14

A

9

[20] GMCH_HSYNC

1
1

UMA
UMA

2 0R2J-2-GP
2 0R2J-2-GP

R7418

1

UMA

2 0R2J-2-GP

M_BLUE
M_GREEN
M_RED

73.53257.B0C
2ND = 73.03257.C0B

H=>I(X)1 -iGPU PCH (UMA)
L=>I(X)0 -dGPU GPU (DIS)

U7408C
SSAHCT125PWR-GP
8

R7419
R7417

PI5C3257QE-GP

+5V_CRT_RUN
10

DGPU_SELECT#

2

6

5

DISR7487
20KR2F-L-GP

UMA/DIS CRT signal select circuit MCH_BLUE
MCH_GREEN
C7408
SCD1U10V2KX-4GP

U7408B
SSAHCT125PWR-GP

7

1

4

14
5

[81] VGA_VSYNC
+1.8V_RUN

DIS
4

2

+5V_CRT_RUN

DGPU_1D8V_SEL#

[21,37,54] DGPU_SELECT#

R7420

2

1

Q7410
DMN66D0LDW-7-GP

2

[20] GMCH_VSYNC

2

3

DGPU_SELECT
2

DIS R7485
20KR2F-L-GP

1

14

1

+5V_CRT_RUN

HSYNC_5

A



12

[81] VGA_HSYNC

Wistron Corporation

7

13

14

+5V_CRT_RUN

11

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

HSYNC_5

7

Title

DGPU_SELECT# H=> -iGPU PCH (UMA)
L=> -dGPU GPU (DIS)
5

U7408D
SSAHCT125PWR-GP

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
Document Number
Custom

Swith-1

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet
1

74

of

91

5

4

3

2

1

D

D

C

C

(Blank)

B

B



A

A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
A3

Document Number

Reserve

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet
1

75

of

91

5

4

3

2

1

Place near CON1

+PWR_SRC

+PWR_SRC

1

C7604
SCD1U16V2KX-3GP

+3.3V_RUN

2

1
2

C7606
SCD1U16V2KX-3GP

1
2

1

+PWR_SRC

+3.3V_ALW

C7602
SCD1U16V2KX-3GP

+5V_ALW

C7605
SCD1U25V2ZY-1GP

2

1

+PWR_SRC

C7603
SCD1U25V2ZY-1GP

2

1
2

DC_IN board CON

D

+PWR_SRC

C7601
SCD1U25V2ZY-1GP

+PWR_SRC

+5V_ALW

D

+3.3V_RUN

Must keep 3x spacing to any other signals
UIM_CLK
[65] UIM_CLK
[65]

UIM_VPP

[65]

UIM_PWR

width > 20mil
sapceing > 10 mils

UIM_VPP
UIM_PWR
AFTP7668

DW

1

UIM_RESET [65]
TouchPanel_Stop [25]
UIM_DATA [65]

DW
ACES-CONN60D-GP

10/29 Item 1

01/08 Item 1
1.Changed Pin46 to +5V_RUN
Pin14 to GND

2
1
C7694
SC4D7U10V3KX-GP

2
1
C7690
SC4D7U10V3KX-GP

1

+PWR_SRC

DY
2

1

C7692
SCD1U25V2ZY-1GP

2

DY

2

1
USB_PN9 [21]
USB_PP9 [21]

1

AD_OFF [37]
PS_ID_R2 [43]

+PWR_SRC

+PWR_SRC

2

BAT_SCL [37]
BAT_SDA [37]

BAT_IN# [37]
PCIE_WAKE# [22,77]
USB_PWR_EN# [37,63]

USB_PN9
USB_PP9
UIM_RESET
TouchPanel_Stop
UIM_DATA

2
1
C7689
SC4D7U25V5KX-GP

2
1
C7688
SC4D7U25V5KX-GP

1
61
NP1

AD_OFF
PS_ID_R2

1

2
63
62

BAT_SCL
BAT_SDA

BAT_IN#
PCIE_WAKE#
USB_PWR_EN#

+PWR_SRC

DY

C7693
SC4D7U25V5KX-GP

CLK_PCIE_LAN
CLK_PCIE_LAN#

DY

C7691
SC4D7U25V5KX-GP

[23] CLK_PCIE_LAN
[23] CLK_PCIE_LAN#

+PWR_SRC

C7607
SCD1U25V2ZY-1GP

C

PCIE_IRXP3_LTXP3
PCIE_IRXN3_LTXN3
PCIE_ITXP3_LRXP3
PCIE_ITXN3_LRXN3

DY

+PWR_SRC

AD_IA_KBC [37]
AC_IN# [37]

2

[23] PCIE_IRXP3_LTXP3
[23] PCIE_IRXN3_LTXN3
[23] PCIE_ITXP3_LRXP3
[23] PCIE_ITXN3_LRXN3

USB_PN0
USB_PP0

KBC_PWR
USB_OC#0_1 [21]

AD_IA_KBC
AC_IN#

C7608
SCD1U25V2ZY-1GP

USB_PN0
USB_PP0

+5V_ALW
USB_OC#0_1

1

[21]
[21]

CLKREQ#_LAN
PLT_RST#
PM_LAN_ENABLE

DY

DY

C7609
SCD1U25V2ZY-1GP

+3.3V_ALW
+3.3V_RUN
[23] CLKREQ#_LAN
[9,21,37,64,65,70,77,80] PLT_RST#
[37] PM_LAN_ENABLE

+PWR_SRC

2

+PWR_SRC

NP2
64
59
57
55
53
51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3

2
1
C7687
SC4D7U25V5KX-GP

CON1
65
66
60
58
56
54
52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4

C

+5V_ALW
: 2000mA
+3.3V_ALW : 347mA
+3.3V_RUN/+5V_RUN:80mA ( Touch Panel )
KBC_PWR : < 1mA
+PWR_SRC : Estimated by using battery 11.1V,85W

20.F1009.060
DW
01/08 Item 1
1.Remove DC-IN Board AFTP

TPM board CON

B

B

+3.3V_RUN
TPM1

+3.3V_RUN

LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LPC_LFRAME#
PLT_RST#
INT_SERIRQ
PCLK_TPM
1
AFTP7681

1

1

LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
LPC_LFRAME#
PLT_RST#
INT_SERIRQ
PCLK_TPM

2
3
4
5
6
7
8
9
10

DY
2

[24,37,70]
[24,37,70]
[24,37,70]
[24,37,70]
[24,37,70]
[9,21,37,64,65,70,77,80]
[24,37]
[21]

11
C7611
SCD1U16V2KX-3GP

DY
Place near TPM1
12

+3.3V_RUN

: 30mA

ACES-CON10-18-GP

20.K0315.010

A

A



Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

DC_IN/TPM board CON

Size
Document Number
Custom

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet
1

76

of

91

5

4

3

2

1

Place near CON4

SSID = User.Interface

2

1

+3.3V_RUN

Audio board CON

D

D

IO board CON
C7703
SCD1U16V2KX-3GP

C7737

1

C7705
SCD1U16V2KX-3GP

2

1
2

C7704
SCD1U16V2KX-3GP

1

1
2

+3.3V_ALW

1

+3.3V_RUN

2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36

[66] PWR2_LED
+1.5V_RUN

PWR2_LED

[23] NEWCARD_CLKREQ#

NEWCARD_CLKREQ#

[21] USB_PP12
[21] USB_PN12

USB_PP12
USB_PN12

[23] CLK_PCIE_NEW#
[23] CLK_PCIE_NEW

CLK_PCIE_NEW#
CLK_PCIE_NEW

[23] PCIE_IRXN5_NTXN5
[23] PCIE_IRXP5_NTXP5

PCIE_IRXN5_NTXN5
PCIE_IRXP5_NTXP5

[23] PCIE_ITXN5_NRXN5
[23] PCIE_ITXP5_NRXP5

PCIE_ITXN5_NRXN5
PCIE_ITXP5_NRXP5

[23] CLK_PCH_48M

CLK_PCH_48M

1
1

+3.3V_RUN

20.K0315.028
AFTP7710
AFTP7706
AFTP7709

1
1
1

+5V_RUN
+3.3V_RUN
WIRELESS_ON#/OFF

AFTP7702
AFTP7703
AFTP7704
AFTP7705
AFTP7707
AFTP7708
AFTP7712
AFTP7713
AFTP7714
AFTP7715
AFTP7716

1
1
1
1
1
1
1
1
1
1
1

WLAN_ACT
BLUETOOTH_EN
BT_ACTIVE_K#
BT_ACT
USB_PP8
USB_PN8
PCH_AZ_CODEC_BITCLK_R
PCH_SDIN_CODEC
PCH_SDOUT_CODEC
PCH_AZ_CODEC_SYNC
PCH_AZ_CODEC_RST#

AFTP7718
AFTP7719
AFTP7720
AFTP7721
AFTP7723

1
1
1
1
1

SB_SPKR
KBC_BEEP
AUD_DMIC_IN0
AUD_DMIC_CLK_G
AMP_MUTE#

DY

+3.3V_RUN

DY

USB_PN13
USB_PP13

[21] USB_PN13
[21] USB_PP13
[22,37,42,50,51,86]
[22,37,50]
[66]
[66]
[9,21,37,64,65,70,76,80]
[22,76]
[23]
[23]

PM_SLP_S3#
PM_SLP_S4#
BATT_LED_ORANGE
BATT_LED_WHITE
PLT_RST#
PCIE_WAKE#
PCH_SMB_DATA
PCH_SMB_CLK

PM_SLP_S3#
PM_SLP_S4#
BATT_LED_ORANGE
BATT_LED_WHITE
PLT_RST#
PCIE_WAKE#
PCH_SMB_DATA
PCH_SMB_CLK
+5V_ALW

C

38
C7796
SC4D7U10V3KX-GP

ACES-CON36-2-GP

20.K0315.036

DYC7738
SC150P50V2KX-GP
PCH_SDOUT_CODEC

DYC7739
SC150P50V2KX-GP
PCH_AZ_CODEC_SYNC
1

2

C7792
C7797
SC4D7U10V3KX-GP
SC4D7U10V3KX-GP
C7793
SC4D7U10V3KX-GP

1
ACES-CON28-3-GP

PCH_SDIN_CODEC

2

2

C7795
SC4D7U10V5KX-1GP

1

C7794
SC4D7U10V5KX-1GP

DY

2

C7791
SC4D7U10V5KX-1GP

DY

DY

2

2

DYSC150P50V2KX-GP

+3.3V_RUN

1

1

DY

1

1

USB_PN8

C7707
SCD1U16V2KX-3GP

1

2

2

+3.3V_RUN

2

2

+5V_RUN

1

1

C7736

DYSC150P50V2KX-GP

1

1
2

DY

B

USB_PP8

+5V_RUN

1

1500mA
25mA

+3.3V_ALW

+3.3V_RUN
+5V_RUN

C7710
SCD1U16V2KX-3GP

AFTP7722

+5V_RUN
:
+3.3V_RUN :

C7709
SCD1U16V2KX-3GP

2

[37] AMP_MUTE#
[24] SB_SPKR
[64] BT_ACT
[37] WIRELESS_ON#/OFF
[37] KBC_BEEP
[37] BLUETOOTH_EN
[66] BT_ACTIVE_K#

C7708
C7701
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP

37

+3.3V_RUN +1.5V_RUN

DY

2

C

AMP_MUTE#
SB_SPKR
BT_ACT
WIRELESS_ON#/OFF
KBC_BEEP
BLUETOOTH_EN
BT_ACTIVE_K#

DY

1

AUD_DMIC_IN0
AUD_DMIC_CLK_G

[73] AUD_DMIC_IN0
[73] AUD_DMIC_CLK_G

DY

2

USB_PP8
USB_PN8
BLM15EG121SN1D-GP
2PCH_AZ_CODEC_BITCLK_R
[24] PCH_AZ_CODEC_BITCLK 1
PCH_SDIN_CODEC
[24] PCH_SDIN_CODEC
PCH_SDOUT_CODEC
[24] PCH_SDOUT_CODEC
PCH_AZ_CODEC_SYNC
[24] PCH_AZ_CODEC_SYNC
PCH_AZ_CODEC_RST#
[24] PCH_AZ_CODEC_RST#

Place near CON6

+5V_RUN

+3.3V_RUN

2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
30

1

WLAN_ACT

USB_PP8
USB_PN8
L7702

CON6

+5V_RUN

2

+3.3V_RUN
[64] WLAN_ACT
[21]
[21]

+5V_RUN

C7706
SCD1U16V2KX-3GP

29
1

+5V_RUN

2

CON4

C7740
SC150P50V2KX-GP

AFTP7758
AFTP7757
AFTP7760
AFTP7762
AFTP7759
AFTP7769
AFTP7768
AFTP7767
AFTP7777
AFTP7776
AFTP7773
AFTP7772
AFTP7781
AFTP7785
AFTP7787
AFTP7771
AFTP7770
AFTP7761
AFTP7765
AFTP7764
AFTP7763
AFTP7775
AFTP7766

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

+3.3V_ALW
+3.3V_RUN
+1.5V_RUN
USB_PN12
USB_PP12
NEWCARD_CLKREQ#
PCH_SMB_CLK
PCH_SMB_DATA
PM_SLP_S3#
PM_SLP_S4#
BATT_LED_ORANGE
PWR2_LED
PLT_RST#
BATT_LED_WHITE
+5V_ALW
CLK_PCIE_NEW#
CLK_PCIE_NEW
PCIE_IRXN5_NTXN5
PCIE_IRXP5_NTXP5
PCIE_ITXN5_NRXN5
PCIE_ITXP5_NRXP5
USB_PN13
USB_PP13

AFTP7774
AFTP7778

1
1

PCIE_WAKE#
CLK_PCH_48M

+1.5V_RUN :
+3.3V_RUN :
+3.3V_ALW :
+5V_ALW:

650mA
1775mA
275mA
60mA

B

2

DY
1

PCH_AZ_CODEC_RST#

2

DYC7741
SC150P50V2KX-GP
1

PCH_AZ_CODEC_BITCLK
C7742
SC150P50V2KX-GP

A

DY

A



2

EMI Cap

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Audio BD/IO BD CONN

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
Document Number
Custom

Rev

X01

Vostro Montevina Discrete

Date: Monday, January 18, 2010

Sheet
1

77

of

91

5

4

3

2

1

+3.3V_RUN :
+5V_RUN
:
+5V_ALW
:

D

Finger Printer Connector

3.5mA
240mA
80mA

D

LED&Capacity board CONN
+3.3V_RUN

1

AFTP7801

1

[37] KBC_PWRBTN#
[66] WLAN_WWAN_WIMAX_LED#
[66] SCRL_LED_R#
[66] CAP_LED_R#
[66] NUM_LED_R#
[66] SATA1_ACT_LED
[66] LED_BT_ACT_K_R#

6

01/06 Item 1
1.co-layout should not be allowed in X-build

ACES-CON5-10-GP

[66] PWR_BTN_LED_R#
[37] CAPA_INT#

20.K0315.005
C

AFTP7823
AFTP7802
AFTP7803
AFTP7804

1
1
1
1

[37,39] THERM_SDA
[37,39] THERM_SCL

BIO_DET#
+3.3V_RUN
Biometric_USBPN
Biometric_USBPP

+3.3V_RUN

PTWO-CON20-2-GP-U

DW
10/16 Item 1
10/22 Item 20

1

1

1

2
3
4
KBC_PWRBTN#
5
WLAN_WWAN_WIMAX_LED# 6
SCRL_LED_R#
7
CAP_LED_R#
8
NUM_LED_R#
9
SATA1_ACT_LED
10
LED_BT_ACT_K_R#
11
12
PWR_BTN_LED_R#
13
CAPA_INT#
14
15
16
THERM_SDA
17
THERM_SCL
18
19
20
22

+3.3V_RUN

2

BIO_DET#

+5V_ALW

2

5
4
3
2

+5V_ALW

C7805
SCD1U10V2KX-4GP

BIO_DET#

Biometric_USBPN
Biometric_USBPP

+5V_RUN

21
1

+5V_RUN

C7804
SCD1U10V2KX-4GP

[25]

DW

7

2

R7802
0R0603-PAD-1-GP
1
2
1
2
R7801
0R0603-PAD-1-GP

C7803
SCD1U10V2KX-4GP

[21] USB_PN11
[21] USB_PP11

2

1

Close to CON2
CON2

CON3

C7801
SCD1U10V2KX-4GP

AFTP7808
AFTP7809
AFTP7810
AFTP7811
AFTP7812

1
1
1
1
1

SCRL_LED_R#
CAP_LED_R#
NUM_LED_R#
SATA1_ACT_LED
LED_BT_ACT_K_R#

AFTP7814

1

CAPA_INT#

AFTP7816
AFTP7817
AFTP7818
AFTP7819
AFTP7820
AFTP7821
AFTP7822

1
1
1
1
1
1
1

THERM_SDA
THERM_SCL
+3.3V_RUN
+5V_RUN
+5V_ALW
PWR_BTN_LED_R#
KBC_PWRBTN#

AFTP7830

1

WLAN_WWAN_WIMAX_LED#

C

20.K0392.020

B

B

A

A



Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Finger Printer/Capacity

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
Document Number
Custom

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet
1

78

of

91

3

2

SSID = Mechanical
H_HD1
SPRING-95-GP

DW

BOSS:

EMI Request

H_HD2
SPRING-95-GP

+PWR_SRC

ThermalBOSS1
BOSS3
STF256R89H178-GP

DY

BOSS4
STF256R50H172-GP

HOLE:

D

12/03 Item 5

RFC58
SCD1U25V2ZY-1GP
2
1

RFC56
SCD1U25V2ZY-1GP
2
1

RFC55
SCD1U25V2ZY-1GP
2
1

RFC54
SCD1U25V2ZY-1GP
2
1

RFC53
SCD1U25V2ZY-1GP
2
1
RFC59
SCD1U25V2ZY-1GP
2
1

RFC61
SCD1U25V2ZY-1GP
2
1

RFC66
SCD1U25V2ZY-1GP
2
1

RFC65
SCD1U25V2ZY-1GP
2
1

B

RFC69
SC56P25V2JN-GP

1

1

DY

+5V_RUN

2

+VCC_GFX_CORE

+VCC_GFX_CORE

A

+VCC_CORE

1
2

EC7950
SCD1U25V2ZY-1GP

Wistron Corporation

EC7949
SCD1U25V2ZY-1GP
2
1

+3.3V_RUN

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Miscellaneous Components

http://laptop-motherboard-schematic.blogspot.com/
4

DIS



+VCC_CORE

DY

DIS

RFC73
SCD1U25V2ZY-1GP
2
1

DY

DIS

RFC72
SCD1U25V2ZY-1GP
2
1

1

+1.5V_RUN_GPU

2

1

DY
2

DY

+PWR_SRC
EC7941
SCD1U25V2ZY-1GP

EC7938
SCD1U25V2ZY-1GP

1

DY

+PWR_SRC

Size
Document Number
Custom

3

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

5

DY

+5V_RUN

+VCC_GFX_CORE

2

+PWR_SRC

EC7948
SCD1U25V2ZY-1GP
2
1

RFC42
SCD1U25V2ZY-1GP
2
1

RFC41
SCD1U25V2ZY-1GP
2
1

RFC43
SCD1U25V2ZY-1GP
2
1

2

1

RFC11
SCD1U25V2ZY-1GP
2
1

DY

+3.3V_ALW

+5V_ALW

EC7946
EC7947
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP

2

DY

+3.3V_ALW +5V_RUN

DY

DY

+3.3V_ALW

DY
2

EC7945

SC1000P50V3JN-GP-U

1

DY
2

EC7943

1

SC1000P50V3JN-GP-U
EC7944
SCD1U25V2ZY-1GP
2
1

DY

+VCC_GFX_CORE

DY

+5V_ALW

1

DY

+5V_ALW

2

DY

+15V_ALW

RFC12
SC56P25V2JN-GP

DIS

RFC63
SCD1U25V2ZY-1GP
2
1

EC7937
SCD1U25V2ZY-1GP
2
1

+1.5V_SUS

+1.5V_SUS

+5V_ALW

+5V_RUN

DY

RFC57
SCD1U25V2ZY-1GP
2
1

1
EC7936
SCD1U25V2ZY-1GP
2
1

DY

EC7940
SCD1U25V2ZY-1GP

RFC39
SCD1U25V2ZY-1GP
2
1

DY

A

+5V_RUN

DY

+1.5V_SUS
RFC38
SCD1U25V2ZY-1GP
2
1

RFC15
SCD1U25V2ZY-1GP
2
1

RFC14
SCD1U25V2ZY-1GP
2
1

DY

+1.5V_SUS

1

+PWR_SRC

DY
2

2

DY

+1.5V_SUS

SC1000P50V3JN-GP-U

1

1

+1.5V_SUS

DY

RFC40
SCD1U25V2ZY-1GP
2
1

+PWR_SRC

+5V_ALW
RFC13
SCD1U25V2ZY-1GP
2
1

RFC10
SCD1U25V2ZY-1GP

1

DY
2

2

DY

+PWR_SRC

+1.5V_SUS

+PWR_SRC

EC7942

DY

+1.5V_SUS

+5V_RUN
RFC36
SCD1U25V2ZY-1GP
2
1

2

RFC17
SC56P25V2JN-GP

DY

+5V_RUN
RFC37
SCD1U25V2ZY-1GP
2
1

DY
2

DY

+3.3V_RUN

2

1

1

+3.3V_RUN

DY

+5V_ALW

EC7935
SCD1U25V2ZY-1GP
2
1

2

DY

RFC32
SCD1U25V2ZY-1GP

+5V_RUN

1

1
+VCC_CORE
EC7934
SCD1U25V2ZY-1GP
2
1

+PWR_SRC

+3.3V_RUN

RFC09
SCD1U25V2ZY-1GP

1

+3.3V_RUN

DY

HOLE12
HOLE197R166-GP

34.4EM01.001 34.4EM01.001 34.4EM01.001

+5V_RUN

EC7921
SCD1U25V2ZY-1GP

RFC35
SCD1U25V2ZY-1GP

+5V_RUN
RFC19
SCD1U25V2ZY-1GP
2
1

DY

+3.3V_ALW
RFC08
SCD1U25V2ZY-1GP
2
1

RFC07
SCD1U25V2ZY-1GP
2
1

+3.3V_ALW

DY

+1.8V_RUN

RFC62
SCD1U25V2ZY-1GP
2
1

RFC34
SCD1U25V2ZY-1GP
2
1

1

+5V_RUN

1

1

RFC16
SCD1U25V2ZY-1GP

RFC04
SC56P25V2JN-GP

DY
2

1
2

2

RFC03
SC1KP50V2KX-1GP

+3.3V_RUN

RFC18
SCD1U25V2ZY-1GP

1

+3.3V_RUN

DY

DY

2

RFC02
SC33P50V2JN-3GP

2

B

+3.3V_RUN

1

1

+5V_ALW

DY

C

+5V_ALW

2

RFC33
SC56P25V2JN-GP

For RF Team
+5V_ALW

1

1
HOLE11
HOLE197R166-GP

1

+5V_ALW

+PWR_SRC

1

1

1
2

ZZ.00PAD.I71 ZZ.00PAD.N91 ZZ.00PAD.J01
RFC30
SC56P25V2JN-GP HOLE10
HOLE197R166-GP

RFC28
SC1KP50V2KX-1GP

RFC26
SC56P25V2JN-GP

DY

+PWR_SRC

+VCC_GFX_CORE

2

1
2

RFC29
SC56P25V2JN-GP

DY

RFC64
SCD1U25V2ZY-1GP
2
1

C7938
SCD1U25V2ZY-1GP

HOLE9
HOLE256R126-GP

+PWR_SRC

+1.8V_RUN

EC7939
SCD1U25V2ZY-1GP

C7937
SCD1U25V2ZY-1GP

ZZ.00PAD.I71

HOLE8
HTE95B85R32-U-475-GP

HOLE7
HOLE355X355R126-GP

+5V_ALW

RFC31
SCD1U25V2ZY-1GP
2
1

2

2

2

1

1

1
2

C7936
SCD1U25V2ZY-1GP

+5V_ALW

DY

+PWR_SRC

DY

+1.5V_SUS

+PWR_SRC

ZZ.00PAD.Q41

+5V_RUN

+5V_USB1
RFC27
SCD1U25V2ZY-1GP
2
1

+1.05V_VTT

1

+1.05V_VTT

ZZ.00PAD.N81

DY

1

+5V_RUN
+5V_USB1

+1.05V_VTT

+PWR_SRC

DY

DY

RFC60
SCD1U25V2ZY-1GP
2
1

RFC22
SC56P25V2JN-GP

DY

+1.5V_SUS

+1.05V_VTT

+3.3V_ALW
RFC25
SCD1U25V2ZY-1GP
2
1

DY

RFC24
SCD1U25V2ZY-1GP
2
1

1

RFC23
SCD1U25V2ZY-1GP
2
1

+3.3V_ALW

ZZ.ZZZZZ.ZZZ

For DMI

1

+3.3V_ALW

2

1
2

2

+3.3V_ALW

RFC20
SCD1U25V2ZY-1GP

1

RFC21
SCD1U25V2ZY-1GP

DY

1

+3.3V_RUN

DY

DY

H13
HOLE198R182
+3.3V_RUN

DY

+1.05V_VTT

RFC50
SCD1U25V2ZY-1GP
2
1

HOLE6
HOLE5
HT95X95BE95R32-U-475-S-GPHOLE355X355R126-GP

+1.05V_VTT

RFC49
SCD1U25V2ZY-1GP
2
1

ZZ.00PAD.K81 ZZ.00PAD.N81

HOLE4
HT95X95B95R32-GP

DY

RFC52
SCD1U25V2ZY-1GP
2
1

ZZ.00PAD.I71
DW

C

D

RFC51
SCD1U25V2ZY-1GP
2
1

1

DY

On ??

+1.05V_VTT

RFC67
SCD1U25V2ZY-1GP
2
1

On Bottom

1

1

34.4B417.001 34.4B417.001 34.4CQ02.101
On Bottom

+1.05V_VTT

RFC48
SCD1U25V2ZY-1GP
2
1

+1.05V_VTT

RFC47
SCD1U25V2ZY-1GP
2
1

HOLE3
HT95X95B95R32-GP

RFC46
SCD1U25V2ZY-1GP
2
1

HOLE2
HTE10BE10R32-U-55-GP

RFC45
SCD1U25V2ZY-1GP
2
1

HOLE1
HOLE355X355R126-GP

34.4ES32.001
On Bottom

DY

1

1

1

1

34.4ES31.001 34.4ES31.001

+PWR_SRC

DY

RFC71
SCD1U25V2ZY-1GP
2
1

BOSS2
STF256R89H178-GP

+VCC_CORE

RFC44
SCD1U25V2ZY-1GP
2
1

1

1

10/15 Item 7

STF237R136H91-GP

1

RFC68
SCD1U25V2ZY-1GP
2
1

4

RFC70
SCD1U25V2ZY-1GP
2
1

5

2

Sheet
1

79

of

91

5

4

3

2

1

PCIE_MTX_GRX_P[0..15]

SSID = VIDEO

PCIE_MTX_GRX_P[0..15] [8]

PCIE_MTX_GRX_N[0..15]

C8033
C8034
C8035
C8036
C8037
C8038
C8039
C8040
C8042
C8043
C8044
C8045
C8047
C8048
C8050
C8051
C8052
C8053
C8054
C8055
C8056
C8057
C8058
C8077
C8078
C8079
C8080
C8081
C8082
C8083
C8084
C8085

1SCD1U16V2KX-3GP
1SCD1U16V2KX-3GP
1SCD1U16V2KX-3GP
1SCD1U16V2KX-3GP
1SCD1U16V2KX-3GP
1SCD1U16V2KX-3GP
1SCD1U16V2KX-3GP
1SCD1U16V2KX-3GP
1SCD1U16V2KX-3GP
1SCD1U16V2KX-3GP
1SCD1U16V2KX-3GP
1SCD1U16V2KX-3GP
1SCD1U16V2KX-3GP
1SCD1U16V2KX-3GP
1SCD1U16V2KX-3GP
1SCD1U16V2KX-3GP
1SCD1U16V2KX-3GP
1SCD1U16V2KX-3GP
1SCD1U16V2KX-3GP
1SCD1U16V2KX-3GP
1SCD1U16V2KX-3GP
1SCD1U16V2KX-3GP
1SCD1U16V2KX-3GP
1SCD1U16V2KX-3GP
1SCD1U16V2KX-3GP
1SCD1U16V2KX-3GP
1SCD1U16V2KX-3GP
1SCD1U16V2KX-3GP
1SCD1U16V2KX-3GP
1SCD1U16V2KX-3GP
1SCD1U16V2KX-3GP
1SCD1U16V2KX-3GP

2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2

AB10
AC10

CLK_PCIE_VGA
CLK_PCIE_VGA#

PEX_TSTCLK_OUT
PEX_TSTCLK_OUT#

AF10
AE10

PEX_TEST_PLL_CLK_OUT
PEX_TEST_PLL_CLK_OUT#

PEX_CLKREQ#
PEX_RST#

AE9
AD9

PEX_CLKREQ#
PEX_RST#

PEX_SVDD_3V3

AG9

C8059
SCD1U16V2KX-3GP
2
1

CLK_PCIE_VGA [23]
CLK_PCIE_VGA# [23]

D

+1.05V_GFX_PCIE

Place near GPU

DY

+3.3V_RUN_GPU

C

DY

DY

1

1
2

SCD1U16V2KX-3GP
C8065

1
2

2
200R2F-L-GP

DY

1
R8002

R8004
10KR2J-3-GP
+3.3V_RUN_GPU

1

Place under GPU

PEX_REFCLK
PEX_REFCLK#

PCIE_MRX_GTX_N[0..15] [8]

IOVDD + IOVDDQ = 2200mA

2

Place near GPU

SCD1U16V2KX-3GP
C8066

1
2

SC1U10V2KX-1GP
C8068

1
2

SC1U10V2KX-1GP
C8067

1
2

SC4D7U6D3V3KX-GP
C8064

1

DY
2

2

SC10U6D3V5KX-1GP
C8074

1

SC10U6D3V5KX-1GP
C8069

DY

PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ

PCIE_MRX_GTX_P[0..15] [8]

PCIE_MRX_GTX_N[0..15]

Place under GPU

C

AB13
AB16
AB17
AB7
AB8
AB9
AC13
AC7
AD6
AE6
AF6
AG6

PCIE_MRX_GTX_P[0..15]

PCIE_MRX_GTX_P0
PCIE_MRX_GTX_N0
PCIE_MRX_GTX_P1
PCIE_MRX_GTX_N1
PCIE_MRX_GTX_P2
PCIE_MRX_GTX_N2
PCIE_MRX_GTX_P3
PCIE_MRX_GTX_N3
PCIE_MRX_GTX_P4
PCIE_MRX_GTX_N4
PCIE_MRX_GTX_P5
PCIE_MRX_GTX_N5
PCIE_MRX_GTX_P6
PCIE_MRX_GTX_N6
PCIE_MRX_GTX_P7
PCIE_MRX_GTX_N7
PCIE_MRX_GTX_P8
PCIE_MRX_GTX_N8
PCIE_MRX_GTX_P9
PCIE_MRX_GTX_N9
PCIE_MRX_GTX_P10
PCIE_MRX_GTX_N10
PCIE_MRX_GTX_P11
PCIE_MRX_GTX_N11
PCIE_MRX_GTX_P12
PCIE_MRX_GTX_N12
PCIE_MRX_GTX_P13
PCIE_MRX_GTX_N13
PCIE_MRX_GTX_P14
PCIE_MRX_GTX_N14
PCIE_MRX_GTX_P15
PCIE_MRX_GTX_N15

C8041
SC10U6D3V5KX-1GP
2
1

PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD

AC9
AD7
AD8
AE7
AF7
AG7

PCIE_MRX_GTX_C_P0
PCIE_MRX_GTX_C_N0
PCIE_MRX_GTX_C_P1
PCIE_MRX_GTX_C_N1
PCIE_MRX_GTX_C_P2
PCIE_MRX_GTX_C_N2
PCIE_MRX_GTX_C_P3
PCIE_MRX_GTX_C_N3
PCIE_MRX_GTX_C_P4
PCIE_MRX_GTX_C_N4
PCIE_MRX_GTX_C_P5
PCIE_MRX_GTX_C_N5
PCIE_MRX_GTX_C_P6
PCIE_MRX_GTX_C_N6
PCIE_MRX_GTX_C_P7
PCIE_MRX_GTX_C_N7
PCIE_MRX_GTX_C_P8
PCIE_MRX_GTX_C_N8
PCIE_MRX_GTX_C_P9
PCIE_MRX_GTX_C_N9
PCIE_MRX_GTX_C_P10
PCIE_MRX_GTX_C_N10
PCIE_MRX_GTX_C_P11
PCIE_MRX_GTX_C_N11
PCIE_MRX_GTX_C_P12
PCIE_MRX_GTX_C_N12
PCIE_MRX_GTX_C_P13
PCIE_MRX_GTX_C_N13
PCIE_MRX_GTX_C_P14
PCIE_MRX_GTX_C_N14
PCIE_MRX_GTX_C_P15
PCIE_MRX_GTX_C_N15

C8073
SC10U6D3V5MX-3GP
2
1

AD10
AD11
AD12
AC12
AB11
AB12
AD13
AD14
AD15
AC15
AB14
AB15
AC16
AD16
AD17
AD18
AC18
AB18
AB19
AB20
AD19
AD20
AD21
AC21
AB21
AB22
AC22
AD22
AD23
AD24
AE25
AE26

C8061
SC1U10V3KX-3GP
2
1

PEX_TX0
PEX_TX0#
PEX_TX1
PEX_TX1#
PEX_TX2
PEX_TX2#
PEX_TX3
PEX_TX3#
PEX_TX4
PEX_TX4#
PEX_TX5
PEX_TX5#
PEX_TX6
PEX_TX6#
PEX_TX7
PEX_TX7#
PEX_TX8
PEX_TX8#
PEX_TX9
PEX_TX9#
PEX_TX10
PEX_TX10#
PEX_TX11
PEX_TX11#
PEX_TX12
PEX_TX12#
PEX_TX13
PEX_TX13#
PEX_TX14
PEX_TX14#
PEX_TX15
PEX_TX15#

C8062
SC1U6D3V2KX-GP
2
1

+1.05V_GFX_PCIE

PEX_RX0
PEX_RX0#
PEX_RX1
PEX_RX1#
PEX_RX2
PEX_RX2#
PEX_RX3
PEX_RX3#
PEX_RX4
PEX_RX4#
PEX_RX5
PEX_RX5#
PEX_RX6
PEX_RX6#
PEX_RX7
PEX_RX7#
PEX_RX8
PEX_RX8#
PEX_RX9
PEX_RX9#
PEX_RX10
PEX_RX10#
PEX_RX11
PEX_RX11#
PEX_RX12
PEX_RX12#
PEX_RX13
PEX_RX13#
PEX_RX14
PEX_RX14#
PEX_RX15
PEX_RX15#

C8063
SC1U6D3V2KX-GP
2
1

D

AE12
AF12
AG12
AG13
AF13
AE13
AE15
AF15
AG15
AG16
AF16
AE16
AE18
AF18
AG18
AG19
AF19
AE19
AE21
AF21
AG21
AG22
AF22
AE22
AE24
AF24
AG24
AF25
AG25
AG26
AF27
AE27

C8060
SCD1U16V2KX-3GP
2
1

PCIE_MTX_GRX_P0
PCIE_MTX_GRX_N0
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_P3
PCIE_MTX_GRX_N3
PCIE_MTX_GRX_P4
PCIE_MTX_GRX_N4
PCIE_MTX_GRX_P5
PCIE_MTX_GRX_N5
PCIE_MTX_GRX_P6
PCIE_MTX_GRX_N6
PCIE_MTX_GRX_P7
PCIE_MTX_GRX_N7
PCIE_MTX_GRX_P8
PCIE_MTX_GRX_N8
PCIE_MTX_GRX_P9
PCIE_MTX_GRX_N9
PCIE_MTX_GRX_P10
PCIE_MTX_GRX_N10
PCIE_MTX_GRX_P11
PCIE_MTX_GRX_N11
PCIE_MTX_GRX_P12
PCIE_MTX_GRX_N12
PCIE_MTX_GRX_P13
PCIE_MTX_GRX_N13
PCIE_MTX_GRX_P14
PCIE_MTX_GRX_N14
PCIE_MTX_GRX_P15
PCIE_MTX_GRX_N15

PCIE_MTX_GRX_N[0..15] [8]

2 OF 7

U8001B

N11M-GE1-S-A2-GP-U

B

+3.3V_RUN

U8028

+1.05V_GFX_PCIE

DY 3

PEG_CLKREQ# [23]
B

Q8007
MMBT3904-7-F-GP

Place under GPU

Place under GPU
(Per pin)

Place near GPU

+1.05V_GFX_PCIE

100KR2J-1-GP

DCR= 0.13 ohm

1

1

DY

2

DY

2

100NH 0603

SC4D7U6D3V3KX-GP
C8075

DYR8016

PBY160808T-121Y-GP

SC1U10V2KX-1GP
C8076

NL17SZ08DFT2G-GP

L8011

2
C8072
SCD1U16V2KX-3GP
2
1

PEX_RST#

1

4

2

Y

1

C8071
SCD1U16V2KX-3GP
2
1

DY

VCC

C8046
SC4D7U6D3V3KX-GP

GND

1

A

3

2

2

C8070
SC1U6D3V2KX-GP

10/28 Item 6

2

DW

PLT_RST#

5

1

1

PLT_RST#

PEX_PLLVDD = 120mA

2

Q8007_1

+GPU_PLLVDD

B

C8086
SC1U6D3V2KX-GP

[9,21,37,64,65,70,76,77]

+PEX_PLLVDD

Place near GPU

2

1

[25] DGPU_HOLD_RST#

C8087
SCD1U10V2KX-4GP

R8034

DY2K2R2J-2-GP
1 2

+PEX_PLLVDD
+GPU_PLLVDD

C8049
SCD1U10V2KX-4GP

AF9
K5

2

PLLVDD

1

2 R8001
2K49R2F-GP

1

1

PEX_PLLVDD

PEX_TERMP

AG10

2

PEX_TERMP

+3.3V_RUN_GPU

1

L8005

2

PBY160808T-121Y-GP

I SP_PLLVDD=45mA



A

A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
A3

VGA-PCIE/LVDS(1/4)

Document Number

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet
1

80

of

91

5

4

3

2

1

+3.3V_RUN_GPU

4 OF 7

DACA_RSET
+DACA_VDD
DACA_VREF

AE1
AG2
AF1

C8103
SCD1U10V2KX-5GP

2
1

DACB_BLUE
DACB_GREEN
DACB_RED

U4
U6

DACB_VSYNC
DACB_HSYNC

V6
W5
R6

DACB_RSET
DACB_VDD
DACB_VREF

[83]
[83]
[83]

STRAP0
STRAP1
STRAP2

C7
B9
A9

STRAP0
STRAP1
STRAP2

4
3

CLK GEN 27M select:
AG4
AE4

TP_JTAG_TDI_GPU
TP_JTAG_TDO_GPU

JTAG_TMS
JTAG_TRST#
JTAG_TCK

AF4
AG3
AF3

TP_JTAG_TMS_GPU
TP8101
1
JTAG_RST#_GPU
2
1
TP_JTAG_TCK_GPU 1KR2J-1-GP
TP8103 R8120
1

ROM_SO
ROM_SI

C10
A10

ROM_SO_GPU
ROM_SI_GPU

ROM_SCLK
ROM_CS#

C9
B10

ROM_SCLK_GPU

XTAL_IN
XTAL_OUT

D10
E10

XTAL_IN

XTAL_OUTBUFF
XTAL_SSIN
MULTI_STRAP_REF0_GND
MULTI_STRAP_REF1_GND

TP8102
TP8104

1
1

THERMDN
THERMDP
TESTMODE
CEC
SP_PLLVDD
SPDIF
BUFRST#

XTAL_IN

R8123 1

XTAL_SSIN

R8131 1

R8132
10KR2J-3-GP

XTALBUFF
R8124 2
E9
D11 XTAL_SSIN

F11
F10

R8133
1
1
R8126

DY

AD25
N2
L6
F9

GPU_XTAL_IN
R8115
1MR2J-1-GP

VGA 27M

R8123

R8131

R8125

R8132

SS

DY

POP

DY

POP

NON-SS

POP

DY

POP

DY

HDCP_TESTMODE
CEC
R8127 2
+SP_PLLVDD

1 10KR2J-3-GP
+3.3V_RUN_GPU

Place near GPU

2
1

1

1

C8122
SCD1U16V2KX-3GP

2

2

1
2

1

+3.3V_RUN_GPU

IFPAB_PLLVDD = 220mA
L8109

330 ohm , DCR=0.070 ohm

Place near GPU

DY

1

DY

2

1
2

Spec 300 ohm,
ESR<0.25 ohm

C8152
SC1U6D3V2KX-GP

Place near GPU

C8128
SC4D7U6D3V3KX-GP

2

1

N11M-GE1-S-A2-GP-U
PBY160808T-181Y-GP

+IFPC_PLLVDD
C8123
SCD1U10V2KX-4GP

+IFPAB_PLLVDD

2

C8117
SCD1U10V2KX-4GP

1

1
2
BLM18SG331TN1D-GP

IFPAB_PLLVDD = 220mA

L8108

1

IFPC_AUX_I2CW_SCL
IFPC_AUX_I2CW_SDA#

+1.05V_GFX_PCIE

2

IFPC_RSET

G4
G5

+IFPC_PLLVDD

+IFPAB_PLLVDD

1

IFPC_IOVDD
IFPC_PLLVDD

C8115
SC1U6D3V2KX-GP

J6
P6
R5

Place under GPU
near IFPB_IOVDD

2

IFPAC_RSET

IFPC_L0
IFPC_L0#
IFPC_L1
IFPC_L1#
IFPC_L2
IFPC_L2#
IFPC_L3
IFPC_L3#

1

10KR2J-3-GP

1

[57] HDMI_SCLK_DDC
[57] HDMI_SDATA_DDC

2

IFPB_IOVDD

P4
N4
M5
M4
L4
K4
H4
J4

2

Place under GPU
B

R8130
IFPE_PLLVDD

Place near GPU

DY

+IFPAB_IOVDD

2009/05/28

2

+IFPC_IOVDD
+IFPC_PLLVDD

V2

Revised decoupling C

Place under GPU
near IFPA_IOVDD

C8112
SC4D7U6D3V3KX-GP

IFPC_D2+
IFPC_D2IFPC_D1+
IFPC_D1IFPC_D0+
IFPC_D0IFPC_TXC+
IFPC_TXC-

1
R8122
1KR2F-3-GP

Place near GPU

DY
2

F7
G6

1

+IFPC_IOVDD

2
C8111
SCD1U16V2KX-3GP

IFPE_AUX_I2CY_SCL
IFPE_AUX_I2CY_SDA#

[57]
[57]
[57]
[57]
[57]
[57]
[57]
[57]

IFPB_TXD4
IFPB_TXD4#
IFPB_TXD5
IFPB_TXD5#
IFPB_TXD6
IFPB_TXD6#
IFPB_TXD7
IFPB_TXD7#

DY

DY
2

1

Impedance:220ohm
Rated Current:1.4A
DCR:0.1ohm

1

D7
F8

+IFPAB_IOVDD

IFPB_TXC
IFPB_TXC#

W1
V1
W3
W2
AA2
AA3
AB1
AA1

+IFPAB_IOVDD

2

R8129
IFPDE_IOVDD

10KR2J-3-GP

AB3
AB2

1

PBY160808T-181Y-GP

2

IFPE_PLLVDD
IFPE_RSET

1

C8119
SC1U10V2KX-1GP

D6
C6
A6
A7
B6
B7
E6
E7

2
10KR2J-3-GP

IFPAB_IOVDD = 285mA

L8105
PBY160808T-221Y-N-GP

1

IFPE_L0
IFPE_L0#
IFPE_L1
IFPE_L1#
IFPE_L2
IFPE_L2#
IFPE_L3
IFPE_L3#

B

CLK_VGA_27M

DY C8121
SC4D7P50V2CN-1GP

2

H6

IFPAB_RSET

PBY160808T-121Y-GP

I SP_PLLVDD=45mA

C8129
SC4D7U6D3V3KX-GP

IFPDE_IOVDD

IFPAB_PLLVDD

IFPD_PLLVDD

1

IFPD_AUX_I2CX_SCL
IFPD_AUX_I2CX_SDA#

D3
D4

2

M6

+1.05V_GFX_PCIE

IFPAB_IOVDD = 220mA

L8107

R8128

C8150
SCD1U10V2KX-4GP

IFPD_RSET

AB6

2
L8110

DY

+IFPC_IOVDD

+1.8V_RUN_GPU

C8151
SCD1U10V2KX-4GP

N6

IFPA_IOVDD

AD5

C

+1.05V_GFX_PCIE

1
SC4D7U6D3V3KX-GP
C8120

2

1

TP8105
TP8106

+IFPAB_IOVDD

1

IFPD_PLLVDD

V3

IFPAB_RSET

F5
F4
E4
D5
C3
C4
B3
B4

2

IFPA_TXD0
IFPA_TXD0#
IFPA_TXD1
IFPA_TXD1#
IFPA_TXD2
IFPA_TXD2#
IFPA_TXD3
IFPA_TXD3#

IFPD_L0
IFPD_L0#
IFPD_L1
IFPD_L1#
IFPD_L2
IFPD_L2#
IFPD_L3
IFPD_L3#

C8149
SC1U6D3V2KX-GP

V5
V4
AA5
AA4
W4
Y4
AB4
AB5

2

C8138
SC10P50V2JN-4GP

VGA_THERMDA [39]

R8107 2
1 10KR2J-3-GP

N5

1

[74]
[74]
[74]
[74]
[74]
[74]

+IFPAB_PLLVDD

C8135
SC10P50V2JN-4GP

VGA_THERMDC [39]
C8102
SC2200P50V2KX-2GP

C8126
SC4D7U6D3V3KX-GP

IFPA_TXC
IFPA_TXC#

DY

4

XTAL-27MHZ-90-GP

3 OF 7

U8001C

AC4
AD4

1
R8121
1KR2F-3-GP

1

+SP_PLLVDD

[74] VGA_LVDSA_CLK
[74] VGA_LVDSA_CLK#

+IFPAB_IOVDD

3

2
2 40K2R2F-GP
40K2R2F-GP

JTAG_RST#_GPU 1
HDCP_TESTMODE 1

VGA_LVDSA_DAT0
VGA_LVDSA_DAT0#
VGA_LVDSA_DAT1
VGA_LVDSA_DAT1#
VGA_LVDSA_DAT2
VGA_LVDSA_DAT2#

2

2 0R2J-2-GP

GPU_XTALOUT

GPU_XTAL_IN
1
0R2J-2-GP GPU_XTALOUT

1 10KR2J-3-GP

STRAP_CAL_PU_GND0
STRAP_CAL_PU_GND1

X8101

CLK_VGA_27M [7]

ROM_SCLK_GPU [83]

2
R8114

D8
D9

Crystal for GM
Main 82.30034.651

2 0R2J-2-GP

R8125
10KR2J-3-GP

DY

ROM_SO_GPU [83]
ROM_SI_GPU [83]

DY
DY

D

1

JTAG_TDI
JTAG_TDO

2

STRAP0
STRAP1
STRAP2

Default X'TAL

2

R8111
10KR2F-2-GP

C

T1
T2

SC1U6D3V2KX-GP
C8127

2

DACB_VDD

DACA_RSET
DACA_VDD
DACA_VREF

R4
T4
T5

1

1

1

DY
2

2

C8108
SC4700P50V2KX-1GP

1

1

C8118
SCD1U10V2KX-4GP

2

+DACA_VDD

DY
2

1

C8144
SCD1U10V2KX-4GP

1
2

C8154
SC1U6D3V2KX-GP

2

1

C8153
SC4D7U6D3V3KX-GP

DY

C8143
SCD1U10V2KX-4GP

16mil

1
2
BLM18SG331TN1D-GP

R8106
124R2F-U-GP
2
1

+DACA_VDD

L8106

Spec 300 ohm,
DCR<0.25 ohm

R8119
150R2F-1-GP

2

Place under GPU

330 ohm , DCR=0.070 ohm

C8107
SC470P50V2KX-3GP

Place near GPU
+3.3V_RUN_GPU

R8118
150R2F-1-GP
2
1

1

R8116
150R2F-1-GP
2
1

+DACA_VDD = 120mA

A3
A4

I2CS_SCL
I2CS_SDA

2

DACA_VSYNC
DACA_HSYNC

I2CH_SCL
I2CH_SDA

I2CB_SCL
I2CB_SDA

LDDC_CLK [54]
LDDC_DATA [54]

1

AD1
AD2

LDDC_CLK
LDDC_DATA

1

[74] VGA_VSYNC
[74] VGA_HSYNC

I2CB_SCL
I2CB_SDA

A2
B1

2

DACA_BLUE
DACA_GREEN
DACA_RED

R2
R3

I2CC_SCL
I2CC_SDA

RN8112
SRN2K2J-1-GP

[55]
[55]

2

AD3
AE3
AE2

[74] VGA_BLUE
[74] VGA_GREEN
[74] VGA_RED

I2CB_SCL
I2CB_SDA

CRT_CLK_DDC
CRT_DAT_DDC

1

DEEPIDLE_WAKE_INT_R#

[25] DEEPIDLE_WAKE_INT_R#

CRT_CLK_DDC
CRT_DAT_DDC

1

D

R1
T3

2

THERMTRIP_VGA#

[37] THERMTRIP_VGA#

I2CA_SCL
I2CA_SDA

1

PWRCNTL_0
PWRCNTL_1

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19

2

N1
G1
C1
M2
M3
K3
K2
J2
C2
M1
D2
D1
J3
J1
K1
F3
G3
G2
F1
F2

2

U8001D

[57] HDMI_HP_DET_VGA
[54] LBKLT_CTL_GPU
[54] LCDVDD_EN_GPU
[37] PANEL_BKEN_GPU
[86] PWRCNTL_0
[86] PWRCNTL_1

1
2

SSID = VIDEO

Place under GPU

A

A



Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
A2
Date:

VGA-LVDS/CRT/DP PORT

Document Number

Rev

X01

Vostro Calpella
Monday, January 18, 2010

Sheet
1

81

of

91

5

4

3

2

1

SSID = VIDEO

U8001G

D

TPAD14-GP
TPAD14-GP

TP8203
TP8205

TP_VDD_SENSE_E15
E15
TP_VDD_SENSE_W15 W15

1
1

NC#J5
NC#D15
NC#C15

J5
D15
C15

RFU_1
RFU_2
RFU_3
RFU_4
RFU_5

T6
W6
Y6
AA6
N3

Place under GPU

Place near GPU

VDD_SENSE
VDD_SENSE

VID_PLLVDD

K6

1

C8231
SC4D7U6D3V3KX-GP

DY
2

1

C8211
SC1U6D3V2KX-GP

DY
2

1

1

C8232
SCD1U10V2KX-5GP

DY

2

A12
B12
C12
D12
E12
F12

2

VDD33
VDD33
VDD33
VDD33
VDD33
VDD33

C8230
SCD1U10V2KX-5GP

+3.3V_RUN_GPU

1

C8240
SC4D7U6D3V3KX-GP

2

1

Place near GPU

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

2

2

1

C8247
SCD01U16V2KX-3GP

1
2

C8246
SCD01U16V2KX-3GP

1

C8244
SCD01U16V2KX-3GP

2
SCD047U10V2KX-2GP
2
1

2

J9
J10
J12
J13
L9
M9
M11
M17
N9
N11
N12
N13
N14
N15
N16
N17
N19
P11
P12
P13
P14
P15
P16
P17
R9
R11
R12
R13
R14
R15
R16
R17
T9
T11
T17
U9
U19
W9
W10
W12
W13
W18
W19

C8234
SCD1U10V2KX-4GP

1

C8243
SCD01U16V2KX-3GP
C8250

DY

SCD047U10V2KX-2GP
2
1

1
2

C8242
SCD01U16V2KX-3GP

DY

C8249

SCD047U10V2KX-2GP
2
1

1
2
1
2

C8248

C8241
SCD01U16V2KX-3GP

+VCC_GFX_CORE

C

6 OF 7

U8001F

C8229
SCD1U10V2KX-5GP

Place under GPU

+GPU_PLLVDD

B2
B5
B8
B11
B14
B17
B20
B23
B26
E2
E5
E8
E11
E17
E20
E23
E26
F6
H2
H5
J11
J14
J17
K19
K9
L2
L11
L12
L13
L14
L15
L16
L17
L5
M12
M13
M14
M15
M16
P2
P5
P9
P19
P23
P26
T12
T13
T14
T15
T16

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

7 OF 7

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

GND_SENSE
GND_SENSE

D

AF8
AF5
AF26
AF23
AF20
AF2
AF17
AF14
AF11
AC26
AC23
AC20
AC17
AC14
AC11
AC8
AC6
AC5
AC2
Y26
Y23
Y5
Y2
W17
W14
W11
V9
V19
U26
U23
U17
U16
U15
U14
U13
U12
U11
U5
U2

C

E14
W16

N11M-GE1-S-A2-GP-U
N11M-GE1-S-A2-GP-U
B

B

FBVDD/Q = 2.55A
+1.5V_RUN_GPU
U8001E

C8253

SCD047U10V2KX-2GP

C8252

SCD1U16V2KX-3GP
2
1

SCD1U16V2KX-3GP
2
1

1

C8251

2

1
2

C8209
SCD1U16V2KX-3GP

1

C8235
SCD1U16V2KX-3GP

2
1

N11M-GE1-S-A2-GP-U

DY

+1.5V_RUN_GPU

C8219
SC1U10V3KX-3GP

Place near GPU

2
A

+1.5V_RUN_GPU

Place under GPU
A13
B13
C13
D13
D14
E13
F13
F14
F15
F16
F17
F19
F22
H23
H26
J15
J16
J18
J19

1

FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ

C8222
SCD1U16V2KX-3GP

FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ

2

5 OF 7

L19
L23
L26
M19
N22
U22
Y22



A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
A3

VGA-POWER/GND(3/4)

Document Number

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet
1

82

of

91

5

4

3

2

SSID = VIDEO

1

+3.3V_RUN_GPU

Strap pin resistor need use 1% resistor (NV Design Guide)

Strap pin define

C

B

2

Place near GPU DY

1
2

330 ohm , DCR=0.070 ohm

+FB_PLLVDD

T19

SC1U6D3V2KX-GP
C8301

+1.05V_GFX_PCIE

FB_CAL_PU_GND
A15
FB_CAL_PD_VDDQ B15
FB_CAL_TERM_GND B16

AC19
R19

16mil
1

L8301

1
2
BLM18SG331TN1D-GP

1R8303
1R8314
2R8315

2
2
1

SC4D7U6D3V3KX-GP
C8302

+1.5V_RUN_GPU

40D2R2F-GP
40D2R2F-GP
60D4R2F-GP

FB_CAL_PU_GND
FB_CAL_PD_VDDQ
FB_CAL_TERM_GND
FB_PLLAVDD
FB_PLLAVDD
FB_DLLAVDD

FBA_DEBUG

M22

FB_VREF

A16

[84]
[84]

CLKA1
CLKA1#

[85]
[85]

R8312
4K99R2F-L-GP

N24
N23

CLKA0
CLKA0#

R8313
10KR2F-2-GP

FBA_CLK1
FBA_CLK1#

CLKA1
CLKA1#

R8311
4K99R2F-L-GP
2
1

CLKA0
CLKA0#

[84]
[84]
[84]
[84]
[85]
[85]
[85]
[85]

1

F24
F23

QSA0
QSA1
QSA2
QSA3
QSA4
QSA5
QSA6
QSA7

2

QSA0
QSA1
QSA2
QSA3
QSA4
QSA5
QSA6
QSA7

R8309
15KR2F-GP
1

C25
A19
E19
A24
T22
AA24
AA26
T27

[84]
[84]
[84]
[84]
[85]
[85]
[85]
[85]

2

FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7

QSA#0
QSA#1
QSA#2
QSA#3
QSA#4
QSA#5
QSA#6
QSA#7

R8304
15KR2F-GP
2
1

QSA#0
QSA#1
QSA#2
QSA#3
QSA#4
QSA#5
QSA#6
QSA#7

R8305
4K99R2F-L-GP
2
1

D25
A18
E18
B24
R22
Y24
AA27
R27

[84]
[84]
[84]
[84]
[85]
[85]
[85]
[85]

R8316
30KR2F-GP
1

FBA_DQS_RN0
FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7

DQMA#0
DQMA#1
DQMA#2
DQMA#3
DQMA#4
DQMA#5
DQMA#6
DQMA#7

DY

DY

D

DY

STRAP0

[81] STRAP0

STRAP1

[81] STRAP1

STRAP2

[81] STRAP2

ROM_SCLK_GPU

[81] ROM_SCLK_GPU

ROM_SI_GPU

[81] ROM_SI_GPU

ROM_SO_GPU

[81] ROM_SO_GPU

Logical Strap Bit Mapping
Resistor Pull-Up Pull-Down
5Kohms
1000
0000
10Kohms 1001
0001
15Kohms 1010
0010
20Kohms 1011
0011
25Kohms 1100
0100
30Kohms 1101
0101
35Kohms 1110
0110
45Kohms 1111
0111

DY

DY

DY
2

DQMA#0
DQMA#1
DQMA#2
DQMA#3
DQMA#4
DQMA#5
DQMA#6
DQMA#7

R8302
34K8R2F-1-GP
2
1

C26
B19
D19
D23
T24
AA23
AB27
T26

FBA_CMD_0 [84]
RAS#
[84,85]
FBA_CMD_2 [84]
BA1
[84,85]
FBA_CMD_4 [85]
FBA_CMD_5 [85]
FBA_CMD_6 [85]
FBA_CMD_7 [85]
FBA_CMD_8 [85]
MAA11 [84,85]
CAS#
[84,85]
WE#
[84,85]
BA0
[84,85]
FBA_CMD_13 [85]
MAA12 [84,85]
MEM_RST
[84,85]
MAA7
[84,85]
MAA10 [84,85]
FBA_CMD_18 [84]
MAA0
[84,85]
MAA9
[84,85]
MAA6
[84,85]
FBA_CMD_22 [84]
MAA8
[84,85]
FBA_CMD_24 [84]
MAA1
[84,85]
MAA13 [84,85]
BA2
[84,85]
FBA_CMD_28 [85]
FBA_CMD_29 [84]
FBA_CMD_30 [84]

R8301
10KR2F-2-GP
2
1

FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7

FBA_CLK0
FBA_CLK0#

1

FBA_CMD_0
RAS#
FBA_CMD_2
BA1
FBA_CMD_4
FBA_CMD_5
FBA_CMD_6
FBA_CMD_7
FBA_CMD_8
MAA11
CAS#
WE#
BA0
FBA_CMD_13
MAA12
MEM_RST
MAA7
MAA10
FBA_CMD_18
MAA0
MAA9
MAA6
FBA_CMD_22
MAA8
FBA_CMD_24
MAA1
MAA13
BA2
FBA_CMD_28
FBA_CMD_29
FBA_CMD_30

F26
J24
F25
M23
N27
M27
K26
J25
J27
G23
G26
J23
M25
K27
G25
L24
K23
K24
G22
K25
H22
M26
H24
F27
J26
G24
G27
M24
K22
J22
L22

R8306
45K3R2F-L-GP
2
1

1 OF 7

FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30

2

FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D8
FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63

1

D

D22
E24
E22
D24
D26
D27
C27
B27
A21
B21
C21
C19
C18
D18
B18
C16
E21
F21
D20
F20
D17
F18
D16
E16
A22
C24
D21
B22
C22
A25
B25
A26
U24
V24
V23
R24
T23
R23
P24
P22
AC24
AB23
AB24
W24
AA22
W23
W22
V22
AA25
W27
W26
W25
AB25
AB26
AD26
AD27
V25
R25
V26
V27
R26
T25
N25
N26

R8307
4K99R2F-L-GP
2
1

MDA0
MDA1
MDA2
MDA3
MDA4
MDA5
MDA6
MDA7
MDA8
MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63

2

U8001A

[84,85] MDA[0..63]

C

R8308
15KR3F-GP

Strap0
USER_BIT0
USER_BIT1
USER_BIT2
USER_BIT3

1
1
1
1

Strap1
3GIO_PADCFG_LUT_ADR0
3GIO_PADCFG_LUT_ADR1
3GIO_PADCFG_LUT_ADR2
3GIO_PADCFG_LUT_ADR3

EDID is used

Reserved

ROM_SI_GPU
RAM_CFG0
RAM_CFG1
RAM_CFG2
RAM_CFG3

ROM_SO_GPU
VGA_DEVICE
SMB_ALT_ADDR
FB_0_BAR_SIZE
XCLK_417

0
1
1
1

Strap2
PCI_DEVID_0
PCI_DEVID_1
PCI_DEVID_2
PCI_DEVID_3

DW

1
0
1
0

01/15 Item 1

N11M-GE1 GPU Device ID=0x0A75

ROM_SCLK_GPU
PEX_PLL_EN_TERM
SLOT_CLK_CONFIG
SUB_VENDOR
PCI_DEVID_4

1
0
0
0

0
1
0
1

Default setting: SAMSUNG sDDR3 64Mx16BIT-->20K pull down (0x0011)
RAM_CFG[3:0]
0000
0001
0010
0011
0100
0101
0110
0111

Config

64MX16
64MX16

FB_BUS Width
€
DDR3
DDR3

64Bit
64Bit
€

Definitions
€
€
Hynix
Samsung
Default
€
€
€
€

B

If use Hynix sDDR3 64Mx16BIT(0x0010), R8308 change to 15K

nVIDIA recommend

N11M-GE1-S-A2-GP-U

SUB_VENDOR
0
No VBIOS ROM
1
BIOS ROM present
3GIO_PADCFG
0000
Desktop
1110
Notebook (POR)

XCLK_417
0
277MHz(POR)
1
Reserved

PEX_PLL_EN_TERM
0 Disable (POR)
1 Enable

USER[3:0]
1111 Use EDID to detect panel settings

SLOT_CLOCK_CFG
0
GPU and MCH do not share a common reference clock
1
GPU and MCH share a common reference clock (POR)

FB_PLLAVDD+FB_DLLAVDD=100mA



A

A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
A3

VGA-MEMORY/STRAPS(4/4)

Document Number

Rev

X01

Vostro Calpella

Date: Monday, January 18, 2010

Sheet
1

83

of

91

5

4

3

2

1

SSID = VIDEO
+1.5V_RUN_GPU

+1.5V_RUN_GPU
MDA[0..63] [83,85]

U8401

BA0
BA1
BA2

M2
N8
M3

BA0
BA1
BA2

10KR2J-3-GP
R8411
2
1

[83] FBA_CMD_18

CLKA0
CLKA0#

CLKA0
CLKA0#

FBA_CMD_18

[83]
[83]

DQMA#3
DQMA#1
[83,85]
[83,85]
[83,85]

WE#
CAS#
RAS#

J7
K7

CK
CK#

K9

CKE

DQMA#3
DQMA#1

D3
E7

WE#
CAS#
RAS#

L3
K3
J3

DQSL
DQSL#

F3
G3

QSA1
QSA#1

ODT

K1

FBA_CMD_30

CS#
RESET#

L2
T2

NC#T7
NC#L9
NC#L1
NC#J9
NC#J1

T7
L9
L1
J9
J1

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

J8
M1
M9
J2
P9
G8
B3
T1
A9
T9
E1
P1

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

DMU
DML
WE#
CAS#
RAS#

H1
M8
L8

VREFDQ
VREFCA
ZQ

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
M7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
NC#M7

BA0
BA1
BA2

M2
N8
M3

BA0
BA1
BA2

CLKA0
CLKA0#

J7
K7

CK
CK#

K9

CKE

R8403
1KR2F-3-GP
QSA3
QSA#3

[83]
[83]

QSA1
QSA#1

[83]
[83]

VREFA2

FBA_CMD_30 [83]

FBA_CMD_29
MEM_RST

FBA_CMD_29 [83]
MEM_RST
[83,85]

R8409
10KR2J-3-GP

2

R8410
10KR2J-3-GP

R8402
1KR2F-3-GP

CLKA0

1
R8407

1

[83,85]
[83,85]
[83,85]
R8418
243R2F-2-GP

[83]
[83]

BA0
BA1
BA2
CLKA0
CLKA0#

FBA_CMD_18

[83] FBA_CMD_18

CLKA0#

G1
F9
E8
E2
D8
D1
B9
B1
G9

[83]
[83]

DQMA#2
DQMA#0
[83,85]
[83,85]
[83,85]

2 ZQ_VRAM12
243R2F-2-GP
MAA0
MAA1
FBA_CMD_22
FBA_CMD_24
FBA_CMD_0
FBA_CMD_2
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13

[83,85]
MAA0
[83,85]
MAA1
[83] FBA_CMD_22
[83] FBA_CMD_24
[83] FBA_CMD_0
[83] FBA_CMD_2
[83,85]
MAA6
[83,85]
MAA7
[83,85]
MAA8
[83,85]
MAA9
[83,85]
MAA10
[83,85]
MAA11
[83,85]
MAA12
[83,85]
MAA13

2

[83]
[83]

C

BA0
BA1
BA2

QSA3
QSA#3

2

1
2

C8420
SCD01U16V2KX-3GP

[83,85]
[83,85]
[83,85]

C7
B7

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

+1.5V_RUN_GPU

1

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
NC#M7

DQSU
DQSU#

A8
A1
C1
C9
D2
E9
F1
H9
H2

MDA[0..63] [83,85]

2

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
M7

1
2

R8406
[83,85]
MAA0
[83,85]
MAA1
[83] FBA_CMD_22
[83] FBA_CMD_24
[83] FBA_CMD_0
[83] FBA_CMD_2
[83,85]
MAA6
[83,85]
MAA7
[83,85]
MAA8
[83,85]
MAA9
[83,85]
MAA10
[83,85]
MAA11
[83,85]
MAA12
[83,85]
MAA13

2 ZQ_VRAM11
243R2F-2-GP

MDA27
MDA29
MDA26
MDA25
MDA28
MDA31
MDA24
MDA30

C8421
SCD01U16V2KX-3GP

MAA0
MAA1
FBA_CMD_22
FBA_CMD_24
FBA_CMD_0
FBA_CMD_2
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13

2
1
R8401
1KR2F-3-GP

1

D7
C3
C8
C2
A7
A2
B8
A3

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

1

VREFDQ
VREFCA
ZQ

VREFA1

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

WE#
CAS#
RAS#

DQMA#2
DQMA#0

D3
E7

WE#
CAS#
RAS#

L3
K3
J3

Close to VRAM side

K4W2G1646B-HC12-GP

MDA[0..63] [83,85]

U8402

K8
K2
N1
R9
B2
D9
G7
R1
N9

2

H1
M8
L8

R8404
1KR2F-3-GP

MDA13
MDA15
MDA8
MDA14
MDA9
MDA12
MDA10
MDA11

1

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

+1.5V_RUN_GPU

E3
F7
F2
F8
H3
H8
G2
H7

2

A8
A1
C1
C9
D2
E9
F1
H9
H2

D

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

1

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

1

K8
K2
N1
R9
B2
D9
G7
R1
N9

DMU
DML
WE#
CAS#
RAS#

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

E3
F7
F2
F8
H3
H8
G2
H7

MDA6
MDA7
MDA3
MDA5
MDA0
MDA1
MDA2
MDA4

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

D7
C3
C8
C2
A7
A2
B8
A3

MDA17
MDA20
MDA16
MDA22
MDA18
MDA23
MDA19
MDA21

DQSU
DQSU#

C7
B7

QSA2
QSA#2

DQSL
DQSL#

F3
G3

QSA0
QSA#0

ODT

K1

FBA_CMD_30

CS#
RESET#

L2
T2

FBA_CMD_29
MEM_RST

NC#T7
NC#L9
NC#L1
NC#J9
NC#J1

T7
L9
L1
J9
J1

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

J8
M1
M9
J2
P9
G8
B3
T1
A9
T9
E1
P1

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

G1
F9
E8
E2
D8
D1
B9
B1
G9

MDA[0..63] [83,85]
D

QSA2
QSA#2

[83]
[83]

QSA0
QSA#0

[83]
[83]
FBA_CMD_30 [83]

FBA_CMD_29 [83]
MEM_RST
[83,85]

C

K4W2G1646B-HC12-GP

64X16 SAMSUNG K4W1G1646E-HC12 P/N:72.41164.H0U
64X16 HYNIX H5TQ1G63BFR-12C
P/N:72.51G63.C0U

1
2

C8429
SC1U10V3KX-3GP

1
2

2

DY

C8428
SC1U10V3KX-3GP

1

Place under / near VRAM

C8426
SC1U25V3KX-1-GP

1
2

C8427
SC1U10V3KX-3GP

1
2

C8425
SC1U10V3KX-3GP

1
2

C8424
SC1U10V3KX-3GP

1
2

+1.5V_RUN_GPU

Place under / near VRAM

C8423
SC1U10V3KX-3GP

1
2

C8422
SC1U10V3KX-3GP

+1.5V_RUN_GPU

B

B

C8413
SCD1U16V2KX-3GP

C8415
SCD1U10V2KX-4GP
2
1

C8414
SCD1U16V2KX-3GP
2
1

C8409
SCD1U16V2KX-3GP
2
1

1
2

C8405
SCD1U16V2KX-3GP
2
1

C8412
SCD1U16V2KX-3GP

C8411
SCD1U16V2KX-3GP
2
1

C8410
SCD1U16V2KX-3GP
2
1

+1.5V_RUN_GPU

C8408
SCD1U16V2KX-3GP
2
1

1
2

C8404
SCD1U10V2KX-4GP
2
1

+1.5V_RUN_GPU

A

A



Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

VRAM(1/2)
5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
A2
Date:

Document Number

Rev

X01

Vostro Calpella
Monday, January 18, 2010

Sheet
1

84

of

91

5

4

3

2

1

SSID = VIDEO
+1.5V_RUN_GPU
+1.5V_RUN_GPU

MDA[0..63] [83,84]

U8501

MDA[0..63]

U8502

[83,84]
[83,84]
[83,84]
[83]
[83]

C

BA0
BA1
BA2
CLKA1
CLKA1#

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
NC#M7

BA0
BA1
BA2

M2
N8
M3

BA0
BA1
BA2

CLKA1
CLKA1#

J7
K7

CK
CK#

FBA_CMD_7

K9

CKE

R8508
[83]
10KR2J-3-GP
[83]

2

DQMA#6
DQMA#5
[83,84]
[83,84]
[83,84]

WE#
CAS#
RAS#

DQMA#6
DQMA#5

D3
E7

DMU
DML

WE#
CAS#
RAS#

L3
K3
J3

WE#
CAS#
RAS#

DQSU
DQSU#

C7
B7

QSA6
QSA#6

DQSL
DQSL#

F3
G3

QSA5
QSA#5

ODT

K1

CS#
RESET#

L2
T2

NC#T7
NC#L9
NC#L1
NC#J9
NC#J1

T7
L9
L1
J9
J1

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

J8
M1
M9
J2
P9
G8
B3
T1
A9
T9
E1
P1

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

G1
F9
E8
E2
D8
D1
B9
B1
G9

MDA[0..63] [83,84]

1

+1.5V_RUN_GPU

QSA5
QSA#5

[83]
[83]

R8501
1KR2F-3-GP

2

[83]
[83]

VREFA4

1

QSA6
QSA#6

FBA_CMD_28

FBA_CMD_28 [83]

FBA_CMD_8
MEM_RST

FBA_CMD_8 [83]
MEM_RST
[83,84]

1

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
M7

1

[83] FBA_CMD_7

MAA0
MAA1
FBA_CMD_4
FBA_CMD_6
FBA_CMD_5
FBA_CMD_13
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13

MDA49
MDA52
MDA50
MDA53
MDA48
MDA54
MDA51
MDA55

R8504
1KR2F-3-GP
R8506
10KR2J-3-GP

C8506
SCD01U16V2KX-3GP

[83,84]
MAA0
[83,84]
MAA1
[83] FBA_CMD_4
[83] FBA_CMD_6
[83] FBA_CMD_5
[83] FBA_CMD_13
[83,84]
MAA6
[83,84]
MAA7
[83,84]
MAA8
[83,84]
MAA9
[83,84]
MAA10
[83,84]
MAA11
[83,84]
MAA12
[83,84]
MAA13

D7
C3
C8
C2
A7
A2
B8
A3

2

R8509

2 ZQ_VRAM21
243R2F-2-GP

VREFDQ
VREFCA
ZQ

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

K8
K2
N1
R9
B2
D9
G7
R1
N9

Layout swap

2

2

2

R8507
1KR2F-3-GP

1

H1
M8
L8

MDA41
MDA45
MDA42
MDA43
MDA40
MDA47
MDA44
MDA46

1
R8503
[83,84]
MAA0
[83,84]
MAA1
[83] FBA_CMD_4
[83] FBA_CMD_6
[83] FBA_CMD_5
[83] FBA_CMD_13
[83,84]
MAA6
[83,84]
MAA7
[83,84]
MAA8
[83,84]
MAA9
[83,84]
MAA10
[83,84]
MAA11
[83,84]
MAA12
[83,84]
MAA13

2 ZQ_VRAM22
243R2F-2-GP

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

E3
F7
F2
F8
H3
H8
G2
H7

MDA58
MDA59
MDA62
MDA56
MDA63
MDA61
MDA57
MDA60

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

D7
C3
C8
C2
A7
A2
B8
A3

MDA34
MDA38
MDA33
MDA39
MDA36
MDA35
MDA32
MDA37

DQSU
DQSU#

C7
B7

QSA4
QSA#4

DQSL
DQSL#

F3
G3

QSA7
QSA#7

ODT

K1

FBA_CMD_28

CS#
RESET#

L2
T2

FBA_CMD_8
MEM_RST

NC#T7
NC#L9
NC#L1
NC#J9
NC#J1

T7
L9
L1
J9
J1

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

J8
M1
M9
J2
P9
G8
B3
T1
A9
T9
E1
P1

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

G1
F9
E8
E2
D8
D1
B9
B1
G9

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

A8
A1
C1
C9
D2
E9
F1
H9
H2

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

H1
M8
L8

VREFDQ
VREFCA
ZQ

MAA0
MAA1
FBA_CMD_4
FBA_CMD_6
FBA_CMD_5
FBA_CMD_13
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
M7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
NC#M7

BA0
BA1
BA2

M2
N8
M3

BA0
BA1
BA2

CLKA1
CLKA1#

J7
K7

CK
CK#

FBA_CMD_7

K9

CKE

DQMA#4
DQMA#7

D3
E7

DMU
DML

WE#
CAS#
RAS#

L3
K3
J3

WE#
CAS#
RAS#

CLKA1
[83,84]
[83,84]
[83,84]

1

1

1

C8503
SCD01U16V2KX-3GP

VREFA3

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

E3
F7
F2
F8
H3
H8
G2
H7

R8517
243R2F-2-GP

CLKA1#

[83]
[83]

2

2

R8510
1KR2F-3-GP

A8
A1
C1
C9
D2
E9
F1
H9
H2

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

1

1

+1.5V_RUN_GPU

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

2

D

K8
K2
N1
R9
B2
D9
G7
R1
N9

BA0
BA1
BA2
CLKA1
CLKA1#

[83] FBA_CMD_7
[83]
[83]

[83,84]
[83,84]
[83,84]

Close to VRAM side

K4W2G1646B-HC12-GP

DQMA#4
DQMA#7
WE#
CAS#
RAS#

[83,84]

Layout swap

D

MDA[0..63]

QSA4
QSA#4

[83]
[83]

QSA7
QSA#7

[83]
[83]

[83,84]

FBA_CMD_28 [83]
FBA_CMD_8 [83]
MEM_RST
[83,84]

C

K4W2G1646B-HC12-GP

1
2

C8535
SC1U10V3KX-3GP

1
2

2

DY

C8536
SC1U10V3KX-3GP

1

Place under / near VRAM

C8537
SC1U25V3KX-1-GP

1
2

C8538
SC1U10V3KX-3GP

1
2

2

DY

+1.5V_RUN_GPU

C8532
SC1U10V3KX-3GP

1

C8531
SC1U25V3KX-1-GP

1
2

2

DY

Place under / near VRAM

C8533
SC1U10V3KX-3GP

1

C8534
SC1U25V3KX-1-GP

+1.5V_RUN_GPU

B

B

+1.5V_RUN_GPU

C8521
SCD1U16V2KX-3GP

C8522
SCD1U16V2KX-3GP
2
1

C8523
SCD1U16V2KX-3GP
2
1

C8524
SCD1U16V2KX-3GP
2
1

1
2

C8525
SCD1U16V2KX-3GP
2
1

C8516
SCD1U16V2KX-3GP

C8517
SCD1U16V2KX-3GP
2
1

C8518
SCD1U16V2KX-3GP
2
1

C8519
SCD1U16V2KX-3GP
2
1

1
2

C8520
SCD1U16V2KX-3GP
2
1

+1.5V_RUN_GPU

A

A



Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

VRAM
5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Size
A2
Date:

Document Number

Rev

X01

Vostro Calpella
Monday, January 18, 2010

Sheet
1

85

of

91

5

4

3

2

1

SSID = PWR.Plane.Regulator_GFX
+PWR_SRC

+PWR_SRC_GFX_CORE

Vout=0.704V*(R1+R2)/R2

PG8617
1
2
GAP-CLOSE-PWR
PG8613
1
2

+PWR_SRC_GFX_CORE

2

1

PC8603
SC2200P50V2KX-2GP

2

1
2

PC8604
SCD1U50V3KX-GP

1
2

1
2

5
6
7
8

SC10U25V6KX-1GP
PC8609

DIS
Thermal Design Current
Max Current = 16.77A
18.45A290KHz
200K -->340KHz
100K -->380KHz
39K -->430KHz

1
2

2

D

1
PR8621

PD8615

10KR2F-2-GP DY
I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
Inductor: 1.5UH PCMC104T-1R5MN Cyntec DCR:4.2mohm Isat =33Arms 68.1R510.10J
O/P cap: 330U 2V EEFSX0D331ER 9mOhm 3Arms Panasonic/ 79.33719.L01
H/S: SI7686DP/ POWERPAK-8/11mOhm/14mOhm@4.5Vgs/ 84.07686.037
DW
L/S: SiR460DP/ POWERPAK-8/ 4.9mOhm/6.1mohm@4.5Vgs/ 84.00460.037
12/07 Item 1
Switching freq-->350KHz

K

A PD8615_A 1

2

B0530WS-7-F-GP

2

PR8615
5K1R2F-2-GP

S

D

DY

S

G
2

10KR2F-2-GP

PQ8601
2N7002A-7-GP

2

PWRCNTL_1_R

PR8616
100KR2J-1-GP

1

1

PR8617
2

[81] PWRCNTL_1

DY

SCD047U16V2KX-1-GP
PC8608
2
1

0.85V

B

DY
1

L

SCD047U16V2KX-1-GP
PC8610
2
1

L

PR8602
100KR2J-1-GP

1

1.03V

1

H

PQ8602
2N7002A-7-GP
G

DY

PR8620
10KR2F-2-GP
2

L

PR8607
20KR2F-L-GP

PWRCNTL_1#

DY

+3.3V_RUN_GPU

+VCC_GFX_CORE

2

PR8618
2
1 PWRCNTL_0_R
10KR2F-2-GP

[81] PWRCNTL_0

PWRCNTL_1

DY

PR8614
5K1R2F-2-GP

B0530WS-7-F-GP

2009/10/30 X01

PWRCNTL_0

A PD8601_A 1

DY
2

PR8619
10KR2F-2-GP

DY

PR8611

PWRCNTL_0#

K

PR8613

DY75KR2F-GP
2

PD8601

24K3R2F-1-GP

+3.3V_RUN_GPU

1

1

+GFX_CORE_FB

B

A

PC8602
SCD1U10V2KX-4GP

PR8606
2D2R5F-2-GP

1

DY
1+GFX_CORE_LL_R 2

PU8602

5
6
7
8

PC8617
SC1U10V2KX-1GP

4
3
2
1

TPS51218DSCR-GP-U1

1
2
IND-1D5UH-34-GP

1

+5V_ALW
+GFX_CORE_DRVL

PG8604
GAP-CLOSE-PWR-3-GP

2+GFX_CORE_VBST12

2

1

+GFX_CORE_VBST 1
+GFX_CORE_DRVH
+GFX_CORE_SW

SIR460DP-T1-GE3-GP

2

11
10
9
8
7
6

D
D
D
D

PR8604
470KR2F-GP

PR8633
2D2R3J-2-GP
GND
VBST
DRVH
SW
V5IN
DRVL

1

2

DY

1

PR8638 1

100KR2J-1-GP

C

PGOOD
TRIP
EN
VFB
CCM

SE330U2VDM-L-GP

PM_SLP_S3#

2

1
2
3
4
5

SE330U2VDM-L-GP

[22,37,42,50,51,77]

PR8631 1
1KR2F-3-GP

SC1KP50V2KX-1GP
PC8634

[37] GFX_CORE_EN

+GFX_CORE_TRIP
+GFX_CORE_EN
+GFX_CORE_FB
+GFX_CORE_CCM

2

PR8632
1
2
78K7R2F-GP

1GPU_VDD_SENS_GAP

PU8603

2009/10/30 X01



A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

TPS51218 +VCC_GFX_CORE

Size
Document Number
Custom

Rev

Vostro Calpella (Discrete)

Date: Monday, January 18, 2010
5

4

3

2

http://laptop-motherboard-schematic.blogspot.com/

Sheet
1

86

of

X01
91

5

4

3

2

1

+3.3V_RTC_LDO

+3.3V_RUN_GPU

+15V_ALW

2

Peak current: 1140 mA
Design current: 798 mA

1

2

R8714
100KR2J-1-GP

+3.3V_RUN_GPU
R8711
100KR2J-1-GP

R8713
10KR2J-3-GP
RUN_ON_3D3GFX
2
1

D

D

1
1

AO3434L-GP MAX 4.2A

G

C8708
SCD01U50V2KX-1GP

Rds(on) = 52 mOhm (Max)

3.3V_GPU_EN_R

2

C8786
SC1U6D3V2KX-GP

S

3

2

1

RUN_ON_3D3GFX_R

[37] 3.3V_RUN_GPU_EN

+3.3V_ALW

Q8710
AO3434L-GP

Q8707
BAS16XV2T1G-GP-U DMN66D0LDW-7-GP
R8778
2KR2F-3-GP
2
1

2

C8704
SC10U6D3V5KX-1GP

K

2

DY

6

D8706

A

4

D

5

1

1

3D3V_VGA_ON#

+3.3V_RTC_LDO

+1.05V_GFX_PCIE:

2

+15V_ALW

2

+1.05V_GFX_PCIE

Peak current: 3550 mA
Design current: 2485 mA

R8708
100KR2J-1-GP

1D05V_VGA_ON#

+1.05V_VTT

2

C8701
SC10U6D3V5KX-1GP

4

5

6

1

1

1

R8712
100KR2J-1-GP

Q8704
DMN66D0LDW-7-GP

1
2
3
4

R8716
RUN_ON_1D05V
2 10KR2J-3-GP
1

RUN_ON_1D05V_R

3

10/28 Item 1

Place near device side(VGA chip),
use 10 mil trace between power
rail and Q8701 Drain

+3.3V_RTC_LDO

+1.5V_RUN_GPU:

C

DW

1.05V_GFX_ON

[37] 1.05V_GFX_ON

8
7
6
5

10.7A
Rds=12m ohm

2

C8705
SCD01U50V2KX-1GP

D
D
D
D

FDS8880-NL-GP

1

2

1

C

U8703
S
S
S
G

2

+15V_ALW

2

+1.5V_RUN_GPU

Peak current: 4230 mA
Design current: 2961 mA

R8710
100KR2J-1-GP

1D5V_VGA_ON#

+1.5V_SUS

2

C8702
SC10U6D3V5KX-1GP

4

5

6

1

1

1

R8715
100KR2J-1-GP

Q8705
DMN66D0LDW-7-GP

1
2
3
4

R8717

2 10KR2J-3-GP
1

RUN_ON_1D5V

3

+1.8V_RUN_GPU

8
7
6
5

10.7A
Rds=12m ohm

2

B

1D5V_VGA_ON

[37] 1D5V_VGA_ON

+3.3V_RTC_LDO

2

DW
10/28 Item 1

+3.3V_ALW

1

DYR8718
100KR2J-1-GP

1

PG8706
2

1

GAP-CLOSE-PWR
PG8707
2

1.8_GFX_ON#

PC8716
SC10U10V5KX-2GP

1
PC8715
SC10U10V5KX-2GP

GAP-CLOSE-PWR

DY

DIS:
Peak current: 300 mA
Design current: 210 mA

2

3

2

1

DY

2

1
+1.8V_RUN_GPU

Q8706
DMN66D0LDW-7-GP

2

4

5

6

+3D3V_1D8_LDO

R8720

DY 100R2J-2-GP
1.8_RUN_ON

PR8712
15KR2F-GP

RT9025-25PSP-GP

2
1

RT9025_FB
+5V_ALW

1

PG8708
2

1

GAP-CLOSE-PWR
PG8709
2

1

1

PC8719

DY

PC8720

GAP-CLOSE-PWR
A



Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Vo=0.8*(1+(R1/R2))

LDO 1.8V

2

PC8717
SC1U16V3KX-2GP

2

1

PR8713
12KR2F-L-GP

PC8718

2

1

8
7
6
5

SC10U10V5KX-2GP

2

GND
ADJ
VOUT
NC#5

SC10U10V5KX-2GP

PC8724
SCD1U10V2KX-4GP

PGOOD
EN
VIN
VDD

SC100P50V2JN-3GP

DY

A

1
2
3
4

2

DGPU_PGOOD
RT9025_EN

2

1

1
PR8711
0R0402-PAD

GND

[23,25,86] DGPU_PGOOD
[37] 1.8_GFX_ON

+1.8V_RUN_GPU

+1.8V_PWR
PU8701

9

RT9025_EN

1

12/03 Item 4

1

DW

2

B

C8707
SCD01U50V2KX-1GP

D
D
D
D

FDS8880-NL-GP

1

2

1

RUN_ON_1D5V_R

U8705
S
S
S
G

http://laptop-motherboard-schematic.blogspot.com/
Size
Document Number
Custom

Rev

Vostro Calpella

Date: Monday, January 18, 2010

5

4

3

2

Sheet
1

X01
87

of

91

5

DATE
2009/10/15

4

VERSON ITEM PAGE
X01

1

25

2

All

3

Modify List
Swapped Q2515 C,E Pin
Combine pull-up/down resistors from single
to series resistor

2

1

Issue Description

OWNER
EE

For correct.
For save more part counts

EE

D

D

3

37

Update 10mW circuit.

For DC mode power consumption can be less than 10mW under S5.

EE

4

22

Add U2213,R2221

Added 3v/5v S5 power good to control resume reset sequence circuit
prevent RTC data loss.

EE

5

51

6

23

7

79

stuffed PC5105 with 1uF
Added 25M Crystal
Added BOSS4

For power sequencing of +1.8V_RUN , Delay timing

9

All

EE
EE
EE
ME

For DCI ( DisplayClock_Integration )
For Steady the thermal module
For ME request Changed connect PN:

C

2009/10/16

1

2009/10/19

37,87

1

77

2

9,27

3

74

B

BOSS1
CON3
CON4
CON6
DM1
DM2
HOLE1
HOLE2
HOLE3
HOLE4
HOLE5
HOLE6
HOLE7
HOLE8
HOLE9
LCD1
TPAD1

from
from
from
from
from
from
from
from
from
from
from
from
from
from
from
from
from

34.4W005.001
20.K0315.005
20.K0315.028
20.K0315.036
62.10017.U81
62.10017.U71
ZZ.00PAD.I71
ZZ.00PAD.K81
ZZ.00PAD.N81
ZZ.00PAD.N81
ZZ.00PAD.K11
ZZ.00PAD.I71
ZZ.00PAD.I71
ZZ.00PAD.N91
ZZ.00PAD.J01
20.F1093.040
20.K0320.004

to
to
to
to
to
to
to
to
to
to
to
to
to
to
to
to
to

34.4CQ03.101
20.K0293.006
20.K0275.028
20.K0276.036
62.10017.P31
62.10017.Q31
ZZ.00PAD.G51
ZZ.00PAD.E11
ZZ.00PAD.D71
ZZ.00PAD.D71
ZZ.00PAD.E11
ZZ.00PAD.G51
ZZ.00PAD.G51
ZZ.00PAD.D31
ZZ.00PAD.D11
20.F1555.030
20.K0265.004

C

Removed CAPA_RST# from Capacity board
Added Switch Baord Detection circuit

EE
EE

For software request.
For new connect pin define.

Reversal CON6 Pin 36 <-> 1 ; 35 <-> 2
Changed RN907,L2701,L2704
Swapped the RN7408,RN7409,RN7410,RN7411

EE
EE
EE

For update components
For Layout request.

B



A

A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Change List - EE(1)

Size
Document Number
Custom

Rev

Vostro Calpella

Date: Monday, January 18, 2010

Sheet
1

X01
88

of

91

5

DATE

2009/10/19

4

VERSON ITEM PAGE

X01

2009/10/22

1

21,23

1

All

3

2

Modify List

1

Issue Description

OWNER

For fixed gitch.

Changed EDID_SELECT# pin from PCH_GPIO66 to PCH_GPIO5
Swapped resistance

EE
EE

For Layout request.

D

D

2009/10/27

2

64,65
66,78

3

All

DM1
DM2
HOLE5
TPM1
WLAN1
WWAN1
Update

from 62.10017.U81
from 62.10017.U71
from ZZ.00PAD.K11
from 20.K0238.010
from 20.F1286.052
from 20.F1286.052
H13 Footprint

to
to
to
to
to
to

4

24

X2401

from

to

5

9,42
50

Stuff "S3 Power Reduction" circuit reserve component

1

79

C

2

All
42

2009/10/28

1
2

2009/12/03

B

2009/12/08

26
25

5

27

6

80

7

57

2010/01/11

X-Bulid

37

1

25,76

1

24,63
79

2

37

3

37

4

87

5

79

1

38

2

42

1

76

2

51

3

All

4

23

SC

SC

26

3
4

8
2009/10/29

87

5
37,62

2010/01/18

X-Bulid

1

21,73

Update SPEC

EE

62.10017.P31
62.10017.Q31
ZZ.00PAD.K81
20.K0315.010
62.10043.841
62.10043.841

For ME request Changed connect PN

ME

82.30001.A81

Update component

EE

Update schematic base on test result.

EE

Merge WWAN and WLAN LED

82.30001.691

Add RFC7907 +5V_ALW to GND 33pF Cap
Add RFC7908 +5V_ALW to GND 0.1uF Cap
Add RFC7909 +3.3V_RUN to GND 0.1uF Cap
Changed power rail netname from +1.5V_CPU to +1.5V_RUN
Del U4204,R4213,C4206,R4215,R4217,R4218
Del Q8701,R8709
Add Q8706,R8718,R8720
Del U2601,C2629,C2628
Del R2602
Del R2517
Del R2708
Del R8039
Add R5773 between +5V_HDMI_C and +5V_HDMI.
Add SW1
Assign PCH GPIO35 for TouchPanel_Stop..
Rename RFC***, USBESATA1 Part Referse

RF
C

Merge +1.5V_CPU to +1.5V_RUN ,For CosDown.

EE

Remove +1.5V_RUN_GPU discharge circuit,base on test result.

EE

Reserve +1.8V_RUN_GPU discharge circuit,base on test result.
Remove reserve circuit +3.3V_CRT_LDO Circuit for LDO Regulators,base on test result.
Remove reserve resistor,For save more part counts
Remove reserve pull-Hi resistors,For not use it
Remove reserve resistor,For save more part counts
Remove reserve resistor,For save more part counts
dummy D5703 Stuff R5773 ,For save more part counts base on test result.
Add mine switch to control PWR_BTN , Only on Sample stage
Add TouchPanel Stop Pin to control ON/OFF by PCH GPIO35

EE
EE

Rename Part Referse Ex: USBESATA1 to ESATA1 for manufactory request
Add damping resistor for signal improvement

Add R3720 damping resistor.
Add R3703,U3703,C3705
Changed Net Connect
For ME request Changed below connect PN:
Add PR8621 Pull-Lo resistor.
Add Q4205,Q4206,R4220,R4221
Del AFTP7634 ~ 7662; 7664~7667 ;7669;7672;7302
PR5102 short ; replacing PC5105 by 10K resistor to GND
Mount EMI CHOKE or Reserve colse Gap for
Differential-Pair
Del RN2327 , Reserve colse Gap
Reserve threadhold 2.93V reset IC (74.00690.I7B) in
PURE_HW_SHUTDOWN# pin
Reserve Pull-Lo resistor for SPI_WP#.
Swap Camera USB Port from Port-10 to Port-7

EE
EE
EE
ME
EE
EE
EE
EE
EE

Co-layout MUX and OR gate for BLON to solve white screen issue while iGPU to dGPU.
Changed Q8706.2

from 1.8_GFX_ON to RT9025_EN ,For correct.

Change P/N of “HOLE5” from ZZ.00PAD.K81 to ZZ.00PAD.Q41.
Reserve for control. +VCC_GFX_CORE power rail default to 0.85.
Added discharge circuit for +5_RUN,+3_RUN.
Del AFTP For saved more layout space.
prevent PM_SLP_S3# signal rebound

Co-layout should not be allowed in X-build.
For saved more layout space.
Reserve For Flash ROM Damaged Issue.

EE
EE

For Camera USB issue

EE

B

A

A



Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Change List - EE(2)

Document Number
Size
Custom

Rev

Vostro Calpella

5

4

X01

http://laptop-motherboard-schematic.blogspot.com/
Date: Monday, January 18, 2010

3

2

Sheet
1

89

of

91

5

DATE

4

VERSON ITEM PAGE

3

2

Modify List

1

Issue Description

OWNER

D

D

2009/10/19

X01

2

81

Remove R8149
PCLK_FWHΕ
ΕCLK_PCI_FBΕ
ΕPCLK_KBCΕ
ΕPCLK_TPM
reserve by pass cap
23
CLK_PCH_48M reserve by pass cap
23
Romove R2350 and C2324
37
Romove R3726 and C3704
79
Reserve +PWR_SRC to GND cap
79
Add EC7934 0.1u in +VCC_CORE
Add EC7911 0.1u +1.5V_SUS to GND cap*1
Add EC7935,EC7936 0.1u +1.5V_SUS to GND cap*2
Add EC7937 0.1u +1.5V_SUS to GND cap*1
Add EC7938 0.1u +PWR_SRC to GND cap*1
Update TR6304,TR6305 p/n to 68.00201.141
73
Move EC7302
79
dummy 0.1u x 2 in green area 6135,195 ----EC7939,EC7940
dummy 0.1u cap in red area 1755,4435 -----EC7941
dummy 1000p in green area
5225,6950----EC7942
dummy 1000p in green area 3780,6180-----EC7943
dummy 104p and 1000p in green area 5385,7010--EC7944,EC7945
dummy 0.1u in green area
3400,6300---EC7946
dummy 0.1u in green area
1240,4035--EC7947
55
add damping 33ohm on R,G,B Singel---R5594,R5595,R5596
79
mount EC7948,EC7949,EC7934
73
mount LECM2012H-900QT-GP in L7301
change R2405 from 10 ohm to 56 ohm and mount 120 ohm
24,77
bead bead p/n:BLM15EG121SN1 L7702
73
mount 220p cap on EC7302 and EC7303
79
Add EC7950

For EMI team request

EMI

For EMI team request

EMI

For EMI team request

EMI

For RF Team request

RF
EMI

21

C

2009/10/22

3

2009/10/23

4

2009/12/08

SC

1

2009/12/09

SC

1
2
3

B

4

C

For EMI team request

B

A

A



Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Change List - EMI&RF

Size
Document Number
Custom

Rev

Vostro Calpella

Date: Monday, January 18, 2010

X01

Sheet
1

90

of

91

5

DATE
2009/10/22

4

VERSON ITEM PAGE
X011

1

46

D

53
2009/10/29

2

50

Modify List
PR4604,PR4605 --> 4.7ohm for RT, 0 ohm
PR4622 --> 820k ohm for RT, DY for TI
PR4616 --> ASM for RT, DY for TI
PR4617 --> DY for RT, ASM for TI
PC5307 change to 68nF for Intel spec
Add 4.7uF at +PWR_SRC_1D5V

3

2

1

Issue Description

OWNER
Power Team

Change PU4603 from TPS51125 to RT8205B

for TI

D

Improve Jitter issue

Power Team

C

C

B

B

A

A



Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

5

http://laptop-motherboard-schematic.blogspot.com/
4

3

2

Change List - Power

Size
Document Number
Custom

Rev

Vostro Calpella

Date: Monday, January 18, 2010

X01

Sheet
1

91

of

91



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