X10SLH LN6TF

X10SLH-LN6TF X10SLH-LN6TF

User Manual: X10SLH-LN6TF

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X10SLH-LN6TF
USER’S MANUAL
Revision 1.0
The information in this User’s Manual has been carefully reviewed and is believed to be accurate.
The vendor assumes no responsibility for any inaccuracies that may be contained in this document,
makes no commitment to update or to keep current the information in this manual, or to notify any
person or organization of the updates. Please Note: For the most up-to-date version of this
manual, please see our web site at www.supermicro.com.
Super Micro Computer, Inc. ("Supermicro") reserves the right to make changes to the product
described in this manual at any time and without notice. This product, including software and docu-
mentation, is the property of Supermicro and/or its licensors, and is supplied only under a license.
Any use or reproduction of this product is not allowed, except as expressly permitted by the terms
of said license.
IN NO EVENT WILL SUPERMICRO BE LIABLE FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL,
SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO
USE THIS PRODUCT OR DOCUMENTATION, EVEN IF ADVISED OF THE POSSIBILITY OF
SUCH DAMAGES. IN PARTICULAR, SUPERMICRO SHALL NOT HAVE LIABILITY FOR ANY
HARDWARE, SOFTWARE, OR DATA STORED OR USED WITH THE PRODUCT, INCLUDING THE
COSTS OF REPAIRING, REPLACING, INTEGRATING, INSTALLING OR RECOVERING SUCH
HARDWARE, SOFTWARE, OR DATA.
Any disputes arising between manufacturer and customer shall be governed by the laws of Santa
Clara County in the State of California, USA. The State of California, County of Santa Clara shall
be the exclusive venue for the resolution of any such disputes. Super Micro's total liability for all
claims will not exceed the price paid for the hardware product.
FCC Statement: This equipment has been tested and found to comply with the limits for a class B
digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable
protection against harmful interference in a residential installation. This equipment generates, uses,
and can radiate radio frequency energy and, if not installed and used in accordance with the instruc-
tions, may cause harmful interference to radio communications. However, there is no guarantee that
interference will not occur in a particular installation. If this equipment does cause harmful interfer-
ence to radio or television reception, which can be determined by turning the equipment off and on,
the user is encouraged to try to correct the interference by one or more of the following measures:
•Reorient or relocate the receiving antenna.
•Increase the separation between the equipment and receiver.
•Connect the equipment to an outlet on a circuit different from that to which the receiver
is connected.
•Consult the authorized dealer or an experienced radio/TV technician for help.
California Best Management Practices Regulations for Perchlorate Materials: This Perchlorate warn-
ing applies only to products containing CR (Manganese Dioxide) Lithium coin cells. “Perchlorate
Material-special handling may apply. See www.dtsc.ca.gov/hazardouswaste/perchlorate”
WARNING: Handling of lead solder materials used in this
product may expose you to lead, a chemical known to the
State of California to cause birth defects and other repro-
ductive harm.
Manual Revision 1.0
Release Date: December 5, 2014
Unless you request and receive written permission from Super Micro Computer, Inc., you may not
copy any part of this document.
Information in this document is subject to change without notice. Other products and companies
referred to herein are trademarks or registered trademarks of their respective companies or mark
holders.
Copyright © 2014 by Super Micro Computer, Inc.
All rights reserved.
Printed in the United States of America
iii
Preface
Preface
This manual is written for system integrators, IT technicians and
knowledgeable end users. It provides information for the installation and use of the
X10SLH-LN6TF motherboard.
About This Motherboard
The X10SLH-LN6TF supports a single Intel® Xeon™ E3-1200 v3 proces-
sor in an LGA 1150 H3 socket. With the Intel® C226 Express chipset built in, the
X10SLH-LN6TF motherboard supports Intel® Rapid Storage Technology, offering
great system enhancement to Denlow Server platforms. Please refer to our website
(http://www.supermicro.com/products/) for processor and memory support updates.
This product is intended to be installed and serviced by professional technicians.
Manual Organization
Chapter 1 describes the features, specications and performance of the mother-
board, and provides detailed information on the Intel® C226 Express chipset.
Chapter 2 provides hardware installation instructions. Read this chapter when in-
stalling the processor, memory modules and other hardware components into the
system. If you encounter any problems, see Chapter 3, which describes trouble-
shooting procedures for video, memory and system setup stored in the CMOS.
Chapter 4 includes an introduction to the BIOS, and provides detailed information
on running the CMOS Setup utility.
Appendix A provides BIOS Error Beep Codes.
Appendix B lists software program installation instructions.
Appendix C contains UEFI BIOS Recovery instructions.
Appendix D provides Dual BIOS Boot Block information for BIOS crisis recovery.
iv
Conventions Used in the Manual:
Special attention should be given to the following symbols for proper installation and
to prevent damage done to the components or injury to yourself:
Warning: Critical information to prevent damage to the components or injury to your-
self.
Important: Important information given to ensure proper system installa-
tion or to relay safety precautions.
Note: Additional Information given to differentiate various models or pro-
vides information for correct system setup.
X10SLH-LN6TF User’s Manual
v
Contacting Supermicro
Contacting Supermicro
Headquarters
Address: Super Micro Computer, Inc.
980 Rock Ave.
San Jose, CA 95131 U.S.A.
Tel: +1 (408) 503-8000
Fax: +1 (408) 503-8008
Email: marketing@supermicro.com (General Information)
support@supermicro.com (Technical Support)
Web Site: www.supermicro.com
Europe
Address: Super Micro Computer B.V.
Het Sterrenbeeld 28, 5215 ML
's-Hertogenbosch, The Netherlands
Tel: +31 (0) 73-6400390
Fax: +31 (0) 73-6416525
Email: sales@supermicro.nl (General Information)
support@supermicro.nl (Technical Support)
rma@supermicro.nl (Customer Support)
Web Site: www.supermicro.nl
Asia-Pacic
Address: Super Micro Computer, Inc.
3F, No. 150, Jian 1st Rd.
Zhonghe Dist., New Taipei City 235
Taiwan (R.O.C)
Tel: +886-(2) 8226-3990
Fax: +886-(2) 8226-3992
Email: support@supermicro.com.tw
Web Site: www.supermicro.com.tw
vi
Table of Contents
Preface
About This Motherboard ................................................................................................ iii
Manual Organization .....................................................................................................iii
Conventions Used in the Manual: .................................................................................iv
Contacting Supermicro ...................................................................................................v
Chapter 1 Introduction
1-1 Overview ......................................................................................................... 1-1
Checklist .......................................................................................................... 1-1
Motherboard Features ..................................................................................... 1-7
1-2 Chipset Overview ......................................................................................... 1-10
Intel® C226 Express Chipset Features ......................................................... 1-10
1-3 Special Features ............................................................................................1-11
Recovery from AC Power Loss ......................................................................1-11
1-4 PC Health Monitoring .....................................................................................1-11
Fan Status Monitor with Firmware Control ...................................................1-11
Environmental Temperature Control ..............................................................1-11
System Resource Alert ................................................................................. 1-12
1-5 ACPI Features ............................................................................................... 1-12
Slow Blinking LED for Suspend-State Indicator ........................................... 1-12
1-6 Power Supply ................................................................................................ 1-12
1-7 Super I/O ....................................................................................................... 1-13
1-8 Advanced Power Management ..................................................................... 1-13
Intel® Intelligent Power Node Manager (NM) (Available when the NMView
utility is installed in the system) .................................................................... 1-13
Manageability Engine (ME) ........................................................................... 1-14
Chapter 2 Installation
2-1 Standardized Warning Statements ................................................................. 2-1
Battery Handling .............................................................................................. 2-1
Product Disposal ............................................................................................. 2-3
2-2 Static-Sensitive Devices .................................................................................. 2-4
Precautions ..................................................................................................... 2-4
Unpacking ....................................................................................................... 2-4
2-3 Motherboard Installation .................................................................................. 2-5
Tools Needed .................................................................................................. 2-5
Location of Mounting Holes ............................................................................ 2-5
Installing the Motherboard .............................................................................. 2-6
2-4 Processor and Heatsink Installation................................................................ 2-7
X10SLH-LN6TF User’s Manual
vii
Table of Contents
Installing the LGA1150 Processor ................................................................. 2-7
Installing an Active CPU Heatsink with Fan ................................................. 2-10
Removing the Heatsink ................................................................................. 2-12
2-5 Installing DDR3 Memory ............................................................................... 2-13
DIMM Installation .......................................................................................... 2-13
Removing Memory Modules ......................................................................... 2-14
Memory Support ............................................................................................ 2-14
Memory Population Guidelines ..................................................................... 2-14
2-6 Connectors/IO Ports ...................................................................................... 2-16
Backplane I/O Panel ..................................................................................... 2-16
Serial Ports ............................................................................................... 2-17
Video Connection ..................................................................................... 2-17
Universal Serial Bus (USB) ...................................................................... 2-18
Ethernet Ports .......................................................................................... 2-19
Unit Identier Switch/UID LED Indicators ................................................ 2-20
Front Control Panel ....................................................................................... 2-21
Front Control Panel Pin Denitions............................................................... 2-22
NMI Button ............................................................................................... 2-22
Power LED .............................................................................................. 2-22
HDD LED .................................................................................................. 2-23
NIC1/NIC2 LEDs ...................................................................................... 2-23
Overheat (OH)/Fan Fail/PWR Fail/UID LED ............................................ 2-24
Power Fail LED ........................................................................................ 2-24
Reset Button ........................................................................................... 2-25
Power Button ........................................................................................... 2-25
2-7 Connecting Cables ........................................................................................ 2-26
ATX Main PWR & CPU PWR Connectors (JPW1 & JPW2) ................... 2-26
Fan Headers (Fan 1- Fan 4/Fan A) ......................................................... 2-27
Chassis Intrusion (JL1) ........................................................................... 2-27
Internal Buzzer (SPKR1) .......................................................................... 2-28
Onboard Power LED (JLED1) .................................................................. 2-28
DOM PWR Connectors (JSD1/JSD2) ...................................................... 2-29
Standby Power Header ............................................................................ 2-29
T-SGPIO 1/2 Headers .............................................................................. 2-30
TPM Header/Port 80 Header ................................................................... 2-30
Power SMB (I2C) Connector .................................................................... 2-31
2-8 Jumper Settings ............................................................................................ 2-32
Explanation of Jumpers ................................................................................ 2-32
GLAN Enable/Disable .............................................................................. 2-32
viii
CMOS Clear (JBT1) ................................................................................. 2-33
PCI Slot SMB Enable (JI2C1/JI2C2) ......................................................... 2-33
Watch Dog Enable/Disable ...................................................................... 2-34
Rear USB 4/5_Wake_Up Enable ............................................................. 2-34
ME Recovery ........................................................................................... 2-35
Manufacturer Mode Select ....................................................................... 2-35
VGA Enable .............................................................................................. 2-36
BIOS Recovery (JBR1) ............................................................................ 2-36
2-9 Onboard Indicators ........................................................................................ 2-37
LAN Port LEDs ......................................................................................... 2-37
IPMI_Dedicated LAN LEDs ...................................................................... 2-37
Onboard Power LED (LE3) ..................................................................... 2-38
BMC Heartbeat LED ................................................................................ 2-38
Unit Identication LED (LE4) .................................................................... 2-39
2-10 SATA Connections ......................................................................................... 2-40
SATA 3.0 Connections .............................................................................. 2-40
Chapter 3 Troubleshooting
3-1 Troubleshooting Procedures ........................................................................... 3-1
Before Power On ............................................................................................ 3-1
No Power ........................................................................................................ 3-1
No Video ......................................................................................................... 3-2
Memory Errors ............................................................................................... 3-2
Losing the System’s Setup Conguration ....................................................... 3-2
3-2 Technical Support Procedures ........................................................................ 3-3
3-3 Frequently Asked Questions ........................................................................... 3-4
3-4 Battery Removal and Installation .................................................................... 3-5
Battery Removal .............................................................................................. 3-5
3-5 Returning Merchandise for Service................................................................. 3-6
Proper Battery Disposal .................................................................................. 3-6
Battery Installation ........................................................................................... 3-6
Chapter 4 BIOS
4-1 Introduction ...................................................................................................... 4-1
Starting BIOS Setup Utility .............................................................................. 4-1
How To Change the Conguration Data ......................................................... 4-1
How to Start the Setup Utility ......................................................................... 4-2
4-2 Main Setup ...................................................................................................... 4-2
The following Main menu items will be displayed: ..................................... 4-3
System Time/System Date ........................................................................ 4-3
X10SLH-LN6TF User’s Manual
ix
Table of Contents
Supermicro X10SLH-LN6TF....................................................................... 4-3
Version ........................................................................................................ 4-3
Build Date ................................................................................................... 4-3
Memory Information ................................................................................... 4-3
Total Memory .............................................................................................. 4-3
4-3 Advanced Setup Congurations...................................................................... 4-4
Boot Feature ................................................................................................. 4-4
Quiet Boot .................................................................................................. 4-4
AddOn ROM Display Mode ........................................................................ 4-4
Bootup Num-Lock ....................................................................................... 4-5
Wait For 'F1' If Error ................................................................................... 4-5
Interrupt 19 Capture ................................................................................... 4-5
Re-try Boot ................................................................................................. 4-5
Power Conguration ..................................................................................... 4-5
Watch Dog Function ................................................................................... 4-5
Power Button Function ............................................................................... 4-5
Restore on AC Power Loss ........................................................................ 4-5
CPU Conguration ....................................................................................... 4-6
Clock Spread Spectrum ............................................................................. 4-7
Hyper-threading .......................................................................................... 4-7
Active Processor Cores .............................................................................. 4-7
Limit CPUID Maximum ............................................................................... 4-7
Execute-Disable Bit (Available if supported by the OS & the CPU) .......... 4-7
Intel® Virtualization Technology (Available when supported by the CPU) . 4-7
Hardware Prefetcher (Available when supported by the CPU) ................. 4-7
Adjacent Cache Line Prefetch (Available when supported by the CPU) ... 4-7
CPU AES .................................................................................................... 4-8
Boot Perfomrance Mode ............................................................................ 4-8
EIST ............................................................................................................ 4-8
Turbo Mode ................................................................................................ 4-8
Energy Performance ................................................................................ 4-10
VR Current Value ..................................................................................... 4-10
CPU C States ........................................................................................... 4-10
CPU C7 Report (Available when "CPU C-States" is set to Enabled ...... 4-10
Package C-State limit ................................................................................4-11
LakeTiny Feature .......................................................................................4-11
ACPI T State .............................................................................................4-11
Chipset Conguration .....................................................................................4-11
System Agent (SA) Conguration ...............................................................4-11
x
X10SLH-LN6TF User’s Manual
VT-d .......................................................................................................... 4-12
PCH-IO Conguration ................................................................................ 4-15
Legacy USB Support ................................................................................ 4-15
Port 60/64 Emulation ................................................................................ 4-15
XHCI Hand-Off ......................................................................................... 4-16
EHCI Hand-Off ......................................................................................... 4-16
XHCI Mode ............................................................................................... 4-16
SATA Conguration .................................................................................... 4-16
SATA Controllers ...................................................................................... 4-16
SATA Mode Selection ............................................................................... 4-16
SATA RAID Option ROM/UEFI Driver ...................................................... 4-16
PCIe/PCI/PnP Conguration ..................................................................... 4-18
Above 4G Decoding ................................................................................. 4-18
VGA Palette Snoop .................................................................................. 4-18
CPU SLOT6 PCI-E 3.0 X8 (IN X16) OPROM ......................................... 4-18
PCH SLOT4 PCI-E 2.0 X4 (IN X8) OPROM ........................................... 4-18
Launch Storage OpROM Policy ............................................................... 4-18
Other PCI Device ROM Priority ............................................................... 4-18
Onboard LAN1 Option ROM .................................................................... 4-19
Onboard LAN2/LAN3/LAN4/LAN5/LAN6 Option ROM ............................ 4-19
VGA Priority .............................................................................................. 4-19
Network Stack .......................................................................................... 4-19
ACPI Settings ............................................................................................ 4-19
High Precision Event Timer ...................................................................... 4-19
ACPI Sleep State ..................................................................................... 4-19
WHEA Support ......................................................................................... 4-19
Intel Server Platform Services Conguration ............................................ 4-20
Super IO Conguration ............................................................................ 4-20
Super IO Chip NCT6776F ...................................................................... 4-20
Serial Port 1 Conguration / Serial Port 2 Conguration ...................... 4-20
Serial Port ................................................................................................. 4-20
Change Settings ....................................................................................... 4-20
Serial Port Console Redirection ................................................................. 4-21
EMS (Emergency Management Services) Console Redirection ............. 4-22
EMS Console Redirection Settings ............................................................ 4-22
Trusted Computing (Available when a TPM device is installed and detected
by the BIOS) ................................................................................................. 4-23
Conguration ............................................................................................ 4-23
Security Device Support ........................................................................... 4-23
xi
TPM State ................................................................................................ 4-24
Pending Operation ................................................................................... 4-24
Current Status Information ....................................................................... 4-24
Intel TXT (LT) Support .............................................................................. 4-24
4-4 Event Logs .................................................................................................... 4-25
Change SMBIOS Event Log Settings ........................................................ 4-25
SMBIOS Event Log .................................................................................. 4-25
PCI Error Logging Support ....................................................................... 4-25
Erasing Settings ....................................................................................... 4-25
Erase Event Log ....................................................................................... 4-25
When Log is Full ...................................................................................... 4-25
SMBIOS Event Log Standard Settings .................................................... 4-26
Log System Boot Event ........................................................................... 4-26
MECI (Multiple Event Count Increment) .................................................. 4-26
METW (Multiple Event Count Time Window) ........................................... 4-26
View SMBIOS Event Log ........................................................................... 4-26
IPMI ............................................................................................................ 4-27
System Event Log ...................................................................................... 4-27
When SEL is Full ...................................................................................... 4-27
BMC Network Conguration ...................................................................... 4-28
IPMI LAN Selection .................................................................................. 4-28
IPMI Network Link Status ......................................................................... 4-28
Update IPMI LAN Conguration ............................................................... 4-28
Conguration Address Source ................................................................. 4-28
4-5 Boot Settings ................................................................................................. 4-29
Set Boot Priority ....................................................................................... 4-29
Delete Boot Option ................................................................................ 4-29
Delete Driver Option ............................................................................. 4-29
Network Device BBS Priorities.............................................................. 4-30
UEFI Boot Drive BBS Priorities............................................................. 4-30
4-6 Security Settings ........................................................................................... 4-31
Password Check ...................................................................................... 4-31
Administrator Password .......................................................................... 4-31
4-7 Save & Exit ................................................................................................... 4-32
Discard Changes and Exit ...................................................................... 4-32
Save Changes and Reset ........................................................................ 4-32
Save Options ............................................................................................ 4-32
Save Changes .......................................................................................... 4-32
Discard Changes ...................................................................................... 4-32
Table of Contents
xii
Restore Optimized Defaults ..................................................................... 4-33
Save As User Defaults ............................................................................. 4-33
Restore User Defaults .............................................................................. 4-33
Boot Override ........................................................................................... 4-33
Appendix A BIOS Error Beep Codes
A-1 BIOS Error Beep Codes .................................................................................A-1
Appendix B Software Installation Instructions
B-1 Installing Software Programs ..........................................................................B-1
B-2 Installing SuperDoctor® 5 ................................................................................B-2
Appendix C UEFI BIOS Recovery Instructions
C-1 An Overview to the UEFI BIOS ......................................................................C-1
C-2 How to Recover the UEFI BIOS Image (the Main BIOS Block) .....................C-1
C-3 To Recover the Main BIOS Block Using a USB-Attached Device..................C-1
Appendix D Dual Boot Block
D-1 Introduction ......................................................................................................D-1
BIOS Boot Block .............................................................................................D-1
BIOS Boot Block Corruption Occurrence ......................................................D-1
D-2 Steps to Reboot the System by Using Jumper JBR1 (Available when JBR1 is
Installed onboard) .......................................................................................................D-2
X10SLH-LN6TF User’s Manual
Chapter 1: Introduction
1-1
Chapter 1
Introduction
1-1 Overview
Checklist
Congratulations on purchasing your computer motherboard from an acknowledged
leader in the industry. Supermicro boards are designed with the utmost attention to
detail to provide you with the highest standards in quality and performance.
Please check that the following items have all been included with your motherboard.
If anything listed here is damaged or missing, contact your retailer.
The following items are included in the retail box.
•One (1) Supermicro Motherboard
•Six (6) SATA cables
•One (1) I/O shield
•One (1) Quick Reference Guide
Note: For your system to work properly, please follow the links below to
download all necessary drivers/utilities and the user's manual for your
motherboard.
SMCI product manuals: http://www.supermicro.com/support/manuals/
Product Drivers and utilities: ftp://ftp.supermicro.com/
If you have any questions, please contact our support team at support@supermicro.
com.
1-2
X10SLH-LN6TF User’s Manual
X10SLH-LN6TF Motherboard Image
Note: All graphics shown in this manual were based upon the latest PCB Revision
available at the time of publishing of the manual. The motherboard you've received
may or may not look exactly the same as the graphics shown in this manual.
Chapter 1: Introduction
1-3
X10SLH-LN6TF Motherboard Layout
Important Notes to the User
•See Chapter 2 for detailed information on jumpers, I/O ports and JF1 front
panel connections.
•" " indicates the location of "Pin 1".
•Jumpers/components not indicated are for testing only.
•When LE3 (Onboard Power LED Indicator) is on, system power is on. Unplug
the power cable before installing or removing any components.
A
IPMI CODE
CA
BIOS
LICENSE
BAR CODE
MAC CODE
CA
A
C
AC
A
+
JLAN3 JLAN2 JLAN1
JP1000
JPW1
JPW2
JSTBY1
J4
LE6
DIMM1
DIMM2
DIMM4
DIMM3
FAN4
FAN3
FAN2 FAN1
FANA
JPME1
JI2C1
JPME2
JI2C2
JPUSB1
JPL1
JPL2
JPL3
JPG1
JBR1
JWD1
JLED1
LE5
LE4
LE1
LE3
J3
JL1
JLED_LAN4
JLED_LAN3
JLED_LAN6
JLED_LAN5
JPI2C1
JTPM1 T-SGPIO1
T-SGPIO2
JSD2
JSD1
SPKR1
B1
JBT1
JF1
SW1
COM1
COM2
PCH SLOT4 PCI-E 2.0 X4(IN X8)
DESIGNED IN USA
X10SLH-LN6TF
REV:1.01
USB0(3.0)
USB1(3.0)
USB12/13
USB8/9
CPU SLOT6 PCI-E 3.0 X8(IN X16)
I-SATA 0I-SATA2
I-SATA 1I-SATA3
I-SATA 4
I-SATA 5
VGA
LAN5/6 LAN3/4 LAN1/2
USB4/5 (2.0)
USB2/3(3.0)
JLED1:3 pin Power LED
IPMI LAN
JF1
NIC2
NIC1
ON
PWR
X
RST
OH/
FF
LED
LED
HDD
X
PWR
NMI
C226
X540 X540 X540
BMC
PLX
1-4
X10SLH-LN6TF User’s Manual
X10SLH-LN6TF Quick Reference
A
IPMI CODE
CA
BIOS
LICENSE
BAR CODE
MAC CODE
CA
A
C
AC
A
+
JLAN3 JLAN2 JLAN1
JP1000
JPW1
JPW2
JSTBY1
J4
LE6
DIMM1
DIMM2
DIMM4
DIMM3
FAN4
FAN3
FAN2 FAN1
FANA
JPME1
JI2C1
JPME2
JI2C2
JPUSB1
JPL1
JPL2
JPL3
JPG1
JBR1
JWD1
JLED1
LE5
LE4
LE1
LE3
J3
JL1
JLED_LAN4
JLED_LAN3
JLED_LAN6
JLED_LAN5
JPI2C1
JTPM1 T-SGPIO1
T-SGPIO2
JSD2
JSD1
SPKR1
B1
JBT1
JF1
SW1
COM1
COM2
PCH SLOT4 PCI-E 2.0 X4(IN X8)
DESIGNED IN USA
X10SLH-LN6TF
REV:1.01
USB0(3.0)
USB1(3.0)
USB12/13
USB8/9
CPU SLOT6 PCI-E 3.0 X8(IN X16)
I-SATA 0I-SATA2
I-SATA 1I-SATA3
I-SATA 4
I-SATA 5
VGA
LAN5/6 LAN3/4 LAN1/2
USB4/5 (2.0)
USB2/3(3.0)
JLED1:3 pin Power LED
IPMI LAN
JF1
NIC2
NIC1
ON
PWR
X
RST
OH/
FF
LED
LED
HDD
X
PWR
NMI
C226
X540 X540 X540
BMC
PLX
Chapter 1: Introduction
1-5
X10SLH-LN6TF Jumpers
Jumper Description Default
JBR1 BIOS Recovery Pins 1-2 (Normal)
JBT1 CMOS Clear (See Chpt. 2)
JI2C1/JI2C2 SMB to PCI Slots Off (Disabled)
JPG1 VGA Enable Pins 1-2 (Enabled)
JPL1/JPL2JPL3 LAN1/2, LAN3/4, LAN5/6 Enable Pins 1-2 (Enabled)
JPME1 ME Recovery Pins 1-2 (Normal)
JPME2 Manufacturing Mode Pins 1-2 (Normal)
JPUSB1 USB4/5 Wake_Up Enable Pins 1-2 (Enabled)
JWD1 Watch Dog Enable Pins 1-2 (RST)
X10SLH-LN6TF Headers/Connectors
Connector Description
Battery (B1) Onboard Battery
COM1/COM2 COM1/COM2 Port Headers
Fan1 - Fan4, FanA System/CPU Fan Headers
IPMI LAN IPMI Dedicated LAN
JF1 Front Panel Control Header
JL1 Chassis Intrusion Header
JLED1 Power LED Indicator Header
JLED_LAN3 - JLED_LAN6 LAN3 - LAN6 Activity LED
JPI2C1 Power System Management Bus (Power SMB)
JPW1 24-pin ATX Main Power Connector (Required)
JPW2 +12V 8-pin CPU power Connector (Required)
JSD1/JSD2 SATA DOM (Device_On_Module) Power Connector
JSTBY1 Standby Power Header
JTPM1 Trusted Platform Module/Port 80 Connector
LAN1 - LAN6 10 Gigabit (RJ45) Ports (LAN1 - LAN6)
SPKR1 Internal Speaker/Buzzer
I-SATA0 - I-SATA5 (SATA 3.0) (Intel PCH) Serial ATA (SATA 3.0) Ports 0-5 (6Gb/sec)
Slot 6 (CPU) PCI-Express 3.0 x8 (in x16 Slot)
Slot 4 (PCH) PCI-Express 2.0 x4 (in x8 Slot)
SW1 Unit Identier (UID) Switch
T-SGPIO 1/2 Serial_Link General Purpose I/O Connection Headers 1/2
USB 0 (3.0)/USB 1 (3.0) USB 3.0 Port 0/USB 3.0 Vertical Header 1
USB 2/3 Backpanel USB 3.0 Ports 2/3
1-6
X10SLH-LN6TF User’s Manual
USB 4/5 Backpanel USB 2.0 Ports 4/5
USB 8/9, USB 12/13 Front Panel Accessible USB 2.0 Headers 8/9, 12/13
VGA Backpanel VGA Port
X10SLH-LN6TF LED Indicators
LED Description Color/State Status
LE3 Onboard Standby PWR LED Green: Solid on Dual Power On
LE4 Unit Identifer (UID) LED Blue: On Unit Identied
LE5 BMC Heartbeat LED Green Blinking BMC Normal
LE6 System Sleep State LED Red: S5, Green: S0
Chapter 1: Introduction
1-7
Motherboard Features
CPU Single Intel® Xeon™ E3-1200 v3 processor in an LGA 1150
H3 socket.
Memory Supports up to 32 GB of DDR3 Unbuffered ECC 1600/1333
MHz (1.35V/1.5V) memory in four memory slots.
Dual-channel memory
DIMM sizes
UDIMM 1 GB, 2 GB, 4GB, and 8GB
Chipset Intel® C226 Express
Expansion Slots One (1) PCI Express 2.0 x4 (in x8) slot (CPU Slot 4)
One (1) PCI Express 3.0 x8 (in x16) slot (CPU Slot 6)
Network Connections Intel® X540 Gigabit Ethernet Controller:
•Six (6) RJ-45 LAN ports in the rear I/O panel with
Link and Activity LEDs
I/O Devices SATA Connections
SATA 3.0 (6Gb/s) Six (6) I-SATA 0-5 via Intel® C226
Express with Intel® Rapid Storage
Technology support
RAID 0, 1, 5, 10
USB Devices
Two (2) USB 3.0 ports on the rear I/O panel (USB 2/3),
Two (2) USB 2.0 ports on the rear I/O panel (USB 4/5)
Four (4) Front Accessible USB 2.0 ports on two headers
(USB 8/9, USB 12/13),
One (1) Front Accessible Type A USB 3.0 (USB 0)
One (1) Front Accessible Header USB 3.0 (USB 1)
Serial (COM) Ports
One (1) Backpanel Serial Port (COM1)
One (1) Front Accessible Header (COM2)
Super I/O
Nuvoton NCT6776
BIOS 128 Mb AMI BIOS® SPI Flash BIOS
Plug and Play (PnP), DMI 2.3, PCI 2.3, ACPI 1.0/2.0/3.0,
USB Keyboard and SMBIOS 2.5
Power Conguration ACPI/APM Power Management
Main Switch Override Mechanism
Keyboard Wake-up from Soft-Off
Power-on mode for AC power recovery
1-8
X10SLH-LN6TF User’s Manual
PC Health Monitoring CPU Monitoring
Onboard voltage monitors for CPU core, +3.3V, +5V,-12V,
+12V, +3.3V Stdby, VBAT, Memory, VCORE for CPU
CPU 3-phase switching voltage regulator
CPU/System overheat LED and control
CPU Thermal Trip support
Thermal Monitor 2 (TM2) support
Fan Control
Fan status monitoring with rmware 4-pin fan speed control
via IPMI interface
Low noise fan speed control
System Management PECI (Platform Environment Conguration Interface) 3.0
support
System resource alert via SuperDoctor® 5
SuperDoctor® 5, Watch Dog, NMI
Chassis Intrusion header and detection
CD Utilities BIOS ash upgrade utility
Other ROHS 6/6 (Full Compliance, Lead Free)
Dimensions ATX form factor (9.6" x 12") (243.84 mm x 304.8 mm)
Chapter 1: Introduction
1-9
System Block Diagram
Note: This is a general block diagram and may not exactly represent
the features on your motherboard. See the Motherboard Features
pages for the actual specications of each motherboard.
X10SLH-LN6TF Block Diagram
DDR3 (CHA)
H3
PCIe3.0_x16
VRM 12.5
SVID
LPC I/O
NCT6776D
PCIe x16 SLOT
DDR3 (CHB)
DIMM1
DIMM2(Far)
DIMM1
DIMM2(Far)
4 UDIMM
MISC VRs
1600/1333MHz
8.0Gb
x4 DMI II
5.0Gb
5.0Gbps
PCIe_x4
PCIe x8 SLOT
6 SATA PORTS
SATA-III
6.0Gbps
4 USB PORTS
USB3.0
FLASH
SPI 128Mb
SPI
COM1,2
HEALTH
INFO
TPM1.2 Header
LPC
RGMII
VGA
PORT
RTL8211E
PHY
ASPEED
ASP2400
PCIe x1
RJ45
PCH
C220 series
1600/1333MHz
480Mbps
USB2.0
6 USB PORTS
4.8Gbps
PLX
PEX8747
Intel X540
Intel X540
Intel X540
RJ45
RJ45
RJ45
RJ45
RJ45
RJ45
8.0Gb
5.0Gb
5.0Gb
5.0Gb
x8
x8
x8
x8
1-10
X10SLH-LN6TF User’s Manual
1-2 Chipset Overview
The X10SLH-LN6TF supports a single Intel® Xeon™ E3-1200 v3 processor in an
LGA 1150 H3 socket. Built upon the functionality and the capability of the C226 Ex-
press chipset, the motherboard provides substantial enhancement to system per-
formance and storage capability for high performance platforms in a sleek package.
The high-speed Direct Media Interface (DMI) featured in the Intel® C226 Express
chipset supports high-speed Direct Media Interface (DMI) for chip-to-chip true iso-
chronous communication, providing up to 10 Gb/s of software-transparent data
transfer rate on each read/write direction. In addition, the X10SLH-LN6TF also
features a TCO timer which allows the system to recover from a software/hardware
lock and perform tasks, including Function Disable and Intruder Detect.
Intel® C226 Express Chipset Features
•Direct Media Interface (up 20 Gb/s transfer, Full Duplex)
•Intel® Matrix Storage Technology and Intel Rapid® Storage Technology
•Intel® I/O Virtualization (VT-d) Support
•Intel® Smart Response Technology
•Intel® Trusted Execution Technology Support
•PCI Express 2.0 Interface (up to 5.0 GT/s)
•SATA Controller (up to 6Gb/sec)
•Advanced Host Controller Interface (AHCI)
•Intel® Active Management Technology (iAMT) 9.0 and vPRO 9.0 support
Chapter 1: Introduction
1-11
1-3 Special Features
Recovery from AC Power Loss
Basic I/O System (BIOS) provides a setting for you to determine how the system will
respond when AC power is lost and then restored to the system. You can choose
for the system to remain powered off, (in which case you must press the power
switch to turn it back on), or for it to automatically return to a power-on state. See
the Advanced BIOS Setup section to change this setting. The default setting is
Last State.
1-4 PC Health Monitoring
This section describes the PC health monitoring features of the board. All have an
onboard System Hardware Monitoring chip that supports PC health monitoring. An
onboard voltage monitor will scan these onboard voltages continuously: CPU Vcore,
12V, -12V, 5V, 3.3V, 3.3VSB, memory and battery voltages. Once a voltage becomes
unstable, a warning is given, or an error message is sent to the screen. The user
can adjust the voltage thresholds to dene the sensitivity of the voltage monitor.
Fan Status Monitor with Firmware Control
PC health monitoring in the BIOS can check the RPM status of the cooling fans.
The onboard CPU and chassis fans are controlled by Thermal Management via
IPMI Firmware.
Environmental Temperature Control
The thermal control sensor monitors the CPU temperature in real time and will turn
on the thermal control fan whenever the CPU temperature exceeds a user-dened
threshold. The overheat circuitry runs independently from the CPU. Once the ther-
mal sensor detects that the CPU temperature is too high, it will automatically turn
on the thermal fans to prevent the CPU from overheating. The onboard chassis
thermal circuitry can monitor the overall system temperature and alert the user when
the chassis temperature is too high.
Note: To avoid possible system overheating, please be sure to provide
adequate airow to your system.
1-12
X10SLH-LN6TF User’s Manual
System Resource Alert
This feature is available when the system is used with SuperDoctor® 5 in the
Windows OS environment or used with SuperDoctor II in Linux. SuperDoctor
is used to notify the user of certain system events. For example, you can also
congure SuperDoctor to provide you with warnings when the system temperature,
CPU temperatures, voltages and fan speeds go beyond predened thresholds.
1-5 ACPI Features
ACPI stands for Advanced Conguration and Power Interface. The ACPI specica-
tion denes a exible and abstract hardware interface that provides a standard
way to integrate power management features throughout a PC system, including
its hardware, operating system and application software. This enables the system
to automatically turn on and off peripherals such as CD-ROMs, network cards, hard
disk drives and printers.
In addition to enabling operating system-directed power management, ACPI also
provides a generic system event mechanism for Plug and Play, and an operating
system-independent interface for conguration control. ACPI leverages the Plug and
Play BIOS data structures, while providing a processor architecture-independent
implementation that is compatible with Windows 7, Windows 8, and Windows 2008
Operating Systems.
Slow Blinking LED for Suspend-State Indicator
When the CPU goes into a suspend state, the chassis power LED will start to blink
to indicate that the CPU is in suspend mode. When the user presses any key, the
CPU will "wake up", and the LED will automatically stop blinking and remain on.
1-6 Power Supply
As with all computer products, a stable power source is necessary for proper and
reliable operation. It is even more important for processors that have high CPU
clock rates.
This motherboard accommodates 24-pin ATX power supplies. Although most
power supplies generally meet the specications required by the CPU, some are
inadequate. In addition, the 12V 8-pin power connector located at JPW2 is also
required to ensure adequate power supply to the system. Also your power supply
must supply at least 3A +5STBY for the Ethernet ports.
Warning: 1. To prevent damage to the power supply or motherboard, please use a
power supply that contains a 24-pin and a 8-pin power connectors. Be sure to connect
these connectors to the 24-pin (JPW1) and the 8-pin (JPW2) power connectors on the
Chapter 1: Introduction
1-13
motherboard. Failure in doing so will void the manufacturer warranty on your power
supply and motherboard. 2. To provide adequate power to SATA devices, please con-
nect the SATA DOM PWR connector (JSD1) to the power supply.
It is strongly recommended that you use a high quality power supply that meets ATX
power supply Specication 2.02 or above. It must also be SSI compliant. (For more
information, please refer to the web site at http://www.ssiforum.org/). Additionally, in
areas where noisy power transmission is present, you may choose to install a line
lter to shield the computer from noise. It is recommended that you also install a
power surge protector to help avoid problems caused by power surges.
1-7 Super I/O
The Super I/O supports two high-speed, 16550 compatible serial communication
ports (UARTs). Each UART includes a 16-byte send/receive FIFO, a programmable
baud rate generator, complete modem control capability and a processor interrupt
system. Both UARTs provide legacy speed with baud rate of up to 115.2 Kbps
as well as an advanced speed with baud rates of 250 K, 500 K, or 1 Mb/s, which
support higher speed modems.
The Super I/O provides functions that comply with ACPI (Advanced Conguration
and Power Interface), which includes support of legacy and ACPI power manage-
ment through an SMI or SCI function pin. It also features auto power management
to reduce power consumption.
1-8 Advanced Power Management
The following advanced power management features are supported by this moth-
erboard:
Intel® Intelligent Power Node Manager (NM) (Available
when the NMView utility is installed in the system)
The Intel® Intelligent Power Node Manager (IPNM) provides your system with
real-time thermal control and power management for maximum energy efciency.
Although IPNM Specication Version 1.5/2.0 is supported by the BMC (Baseboard
Management Controller), your system must also have IPNM-compatible Manage-
ability Engine (ME) rmware installed to use this feature.
Note: Support for IPNM Specication Version 1.5 or Version 2.0 depends
on the power supply used in the system.
1-14
X10SLH-LN6TF User’s Manual
Manageability Engine (ME)
The Manageability Engine, which is an ARC controller embedded in the PCH,
provides Server Platform Services (SPS) to your system. The services provided by
SPS are different from those provided by the ME on client platforms.
Chapter 2: Installation
2-1
Chapter 2
Installation
2-1 Standardized Warning Statements
The following statements are industry-standard warnings, provided to warn the user
of situations which have the potential for bodily injury. Should you have questions or
experience difculty, contact Supermicro's Technical Support department for assis-
tance. Only certied technicians should attempt to install or congure components.
Read this section in its entirety before installing or conguring components in the
Supermicro chassis.
Battery Handling
Warnung
Bei Einsetzen einer falschen Batterie besteht Explosionsgefahr. Ersetzen Sie die
Batterie nur durch den gleichen oder vom Hersteller empfohlenen Batterietyp.
Entsorgen Sie die benutzten Batterien nach den Anweisungen des Herstellers.
Warning!
There is a danger of explosion if the battery is replaced incorrectly. Replace the
battery only with the same or equivalent type recommended by the manufacturer.
Dispose of used batteries according to the manufacturer's instructions
電池の取扱い
電池交換が正行われな場合、破裂の危険性が 交換す電池は
ーが推奨型、たは同等のを使用下い。 使用済電池は製造元の指示に
て処分して下い。
警告
电池更换不当会有爆炸危险。请只使用同类电池或制造商推荐的功能相当的电池更
换原有电池。请按制造商的说明处理废旧电池。
警告
電池更換不當會有爆炸危險。請使用製造商建議之相同或功能相當的電池更換原有
電池。請按照製造商的說明指示處理廢棄舊電池。
2-2
X10SLH-LN6TF User’s Manual
Attention
Danger d'explosion si la pile n'est pas remplacée correctement. Ne la remplacer
que par une pile de type semblable ou équivalent, recommandée par le fabricant.
Jeter les piles usagées conformément aux instructions du fabricant.
¡Advertencia!
Existe peligro de explosión si la batería se reemplaza de manera incorrecta. Re-
emplazar la batería exclusivamente con el mismo tipo o el equivalente recomen-
dado por el fabricante. Desechar las baterías gastadas según las instrucciones
del fabricante.
!הרהזא
תנכס תמייקץוציפ .הניקת אל ךרדב הפלחוהו הדימב הללוסה לש ףילחהל שי
גוסב הללוסה תא מ םאותה תרבחלמומ ןרציתצ.
תוללוסה קוליס תושמושמה עצבל שי .ןרציה תוארוה יפל




경고!
배터리가 올바르게 교체되지 않으면 폭발의 위험이 있습니다. 기존 배터리와 동일
하거나 제조사에서 권장하는 동등한 종류의 배터리로만 교체해야 합니다. 제조사
안내에 따라 사용된 배터리를 처리하여 주십시오.
Waarschuwing
Er is ontplofngsgevaar indien de batterij verkeerd vervangen wordt. Vervang de
batterij slechts met hetzelfde of een equivalent type die door de fabrikant aan-
bevolen wordt. Gebruikte batterijen dienen overeenkomstig fabrieksvoorschriften
afgevoerd te worden.
Chapter 2: Installation
2-3
Product Disposal
Warning!
Ultimate disposal of this product should be handled according to all national laws
and regulations.
製品の廃棄
の製品を廃棄処分場合、国の関係る全の法律条例に従い処理す必要が
ありま
警告
本产品的废弃处理应根据所有国家的法律和规章进行。
警告
本產品的廢棄處理應根據所有國家的法律和規章進行。
Warnung
Die Entsorgung dieses Produkts sollte gemäß allen Bestimmungen und Gesetzen
des Landes erfolgen.
¡Advertencia!
Al deshacerse por completo de este producto debe seguir todas las leyes y regla-
mentos nacionales.
Attention
La mise au rebut ou le recyclage de ce produit sont généralement soumis à des
lois et/ou directives de respect de l'environnement. Renseignez-vous auprès de
l'organisme compétent.
רצומה קוליס
!הרהזא
ו תויחנהל םאתהב תויהל בייח הז רצומ לש יפוס קוליס.הנידמה יקוח
2-4
X10SLH-LN6TF User’s Manual
2-2 Static-Sensitive Devices
Electrostatic-Discharge (ESD) can damage electronic com ponents. To avoid dam-
aging your system board, it is important to handle it very carefully. The following
measures are generally sufcient to protect your equipment from ESD.
Precautions
Use a grounded wrist strap designed to prevent static discharge.
Touch a grounded metal object before removing the board from the antistatic
bag.
Handle the board by its edges only; do not touch its components, peripheral
chips, memory modules or gold contacts.
When handling chips or modules, avoid touching their pins.
Put the motherboard and peripherals back into their antistatic bags when not in
use.
For grounding purposes, make sure your computer chassis provides excellent
conductivity between the power supply, the case, the mounting fasteners and
the motherboard.
Use only the correct type of onboard CMOS battery. Do not install the onboard
battery upside down to avoid possible explosion.
Unpacking
The motherboard is shipped in antistatic packaging to avoid static damage. When
unpacking the board, make sure that the person handling it is static protected.
Waarschuwing
De uiteindelijke verwijdering van dit product dient te geschieden in overeenstemming
met alle nationale wetten en reglementen.
 
경고!
이 제품은 해당 국가의 관련 법규 및 규정에 따라 폐기되어야 합니다.
Chapter 2: Installation
2-5
A
IPMI CODE
CA
BIOS
LICENSE
BAR CODE
MAC CODE
CA
A
C
AC
A
+
JLAN3 JLAN2 JLAN1
JP1000
JPW1
JPW2
JSTBY1
J4
LE6
DIMM1
DIMM2
DIMM4
DIMM3
FAN4
FAN3
FAN2 FAN1
FANA
JPME1
JI2C1
JPME2
JI2C2
JPUSB1
JPL1
JPL2
JPL3
JPG1
JBR1
JWD1
JLED1
LE5
LE4
LE1
LE3
J3
JL1
JLED_LAN4
JLED_LAN3
JLED_LAN6
JLED_LAN5
JPI2C1
JTPM1 T-SGPIO1
T-SGPIO2
JSD2
JSD1
SPKR1
B1
JBT1
JF1
SW1
COM1
COM2
PCH SLOT4 PCI-E 2.0 X4(IN X8)
DESIGNED IN USA
X10SLH-LN6TF
REV:1.01
USB0(3.0)
USB1(3.0)
USB12/13
USB8/9
CPU SLOT6 PCI-E 3.0 X8(IN X16)
I-SATA0I-SATA2
I-SATA1I-SATA3
I-SATA4
I-SATA5
VGA
LAN5/6 LAN3/4 LAN1/2
USB4/5 (2.0)
USB2/3(3.0)
JLED1:3 pin Power LED
IPMI LAN
JF1
NIC2
NIC1
ON
PWR
X
RST
OH/
FF
LED
LED
HDD
X
PWR
NMI
C226
X540 X540 X540
BMC
PLX
Caution: 1) To avoid damaging the motherboard and its components, please do
not use a force greater than 8 lb/inch on each mounting screw during motherboard
installation. 2) Some components are very close to the mounting holes. Please take
precautionary measures to avoid damaging these components when installing the
motherboard to the chassis.
2-3 Motherboard Installation
All motherboards have standard mounting holes to t different types of chassis.
Make sure that the locations of all the mounting holes for both motherboard and
chassis match. Although a chassis may have both plastic and metal mounting fas-
teners, metal ones are highly recommended because they ground the motherboard
to the chassis. Make sure that the metal standoffs click in or are screwed in tightly.
Then use a screwdriver to secure the motherboard onto the motherboard tray.
Tools Needed
Philips Screwdriver
(1)
Standoffs (10)
Only if Needed
Philips Screws (10)
Location of Mounting Holes
2-6
X10SLH-LN6TF User’s Manual
Installing the Motherboard
1. Install the I/O shield into the back of the chassis.
2. Locate the mounting holes on the motherboard. (See the previous page.)
3. Locate the matching mounting holes on the chassis. Align the mounting holes
on the motherboard against the mounting holes on the chassis.
4. Install standoffs in the chassis as needed.
5. Install the motherboard into the chassis carefully to avoid damaging other
motherboard components.
6. Using the Phillips screwdriver, insert a Phillips head #6 screw into a mounting
hole on the motherboard and its matching mounting hole on the chassis.
7. Repeat Step 5 to insert #6 screws into all mounting holes.
8. Make sure that the motherboard is securely placed in the chassis.
Note: Images displayed are for illustration only. Your chassis or system
components may or may not look exactly the same as graphics shown
in this manual.
Chapter 2: Installation
2-7
2-4 Processor and Heatsink Installation
Warning: When handling the processor package, avoid placing direct pressure on the
label area of the fan.
Important:
•Always connect the power cord last, and always remove it before adding,
removing or changing any hardware components. Make sure that you install
the processor into the CPU socket before you install the CPU heatsink.
•If you buy a CPU separately, make sure that you use an Intel-certied multi-
directional heatsink only.
•Make sure to install the system board into the chassis before you install
the CPU heatsink.
•When receiving a server board without a processor pre-installed, make sure
that the plastic CPU socket cap is in place and none of the socket pins are
bent; otherwise, contact your retailer immediately.
•Refer to the Supermicro website for updates on CPU support.
Load Lever
Installing the LGA1150 Processor
1. Press the load lever to release the load plate, which covers the CPU socket,
from its locking position.
Load Plate
2-8
X10SLH-LN6TF User’s Manual
2. Gently lift the load lever to open the load plate. Remove the plastic cap.
3. Use your thumb and your index nger to hold the CPU at the North center
edge and the South center edge of the CPU.
4. Align the CPU key that is the semi-circle cutouts against the socket keys.
Once it is aligned, carefully lower the CPU straight down into the socket. (Do
not drop the CPU on the socket. Do not move the CPU horizontally or verti-
cally.
South Center Edge
North Center Edge
Chapter 2: Installation
2-9
Warning: You can only install the CPU inside the socket only in one direction. Make
sure that it is properly inserted into the CPU socket before closing the load plate. If it
doesn't close properly, do not force it as it may damage your CPU. Instead, open the
load plate again and double-check that the CPU is aligned properly.
CPU properly
installed
Load lever locked
into place
5. Do not rub the CPU against the surface or against any pins of the socket to
avoid damaging the CPU or the socket.)
6. With the CPU inside the socket, inspect the four corners of the CPU to make
sure that the CPU is properly installed.
7. Use your thumb to gently push the load lever down to the lever lock.
2-10
X10SLH-LN6TF User’s Manual
Thermal Grease
Heatsink
Fins
Recommended Supermicro
heatsink:
SNK-P0046A4 active heatsink
Installing an Active CPU
Heatsink with Fan
1. Locate the CPU Fan power connec-
tor on the motherboard. (Refer to
the layout on the right for the CPU
Fan location.)
2. Position the heatsink so that the
heatsink fan wires are closest to the
CPU fan power connector and are
not interfered with other compo-
nents.
3. Inspect the CPU Fan wires to make
sure that the wires are routed
through the bottom of the heatsink.
4. Remove the thin layer of the protec-
tive lm from the heatsink.
Warning: CPU overheat may occur if the
protective film is not removed from the
heatsink.
5. Apply the proper amount of thermal
grease on the CPU.
Note: If your heatsink came with
a thermal pad, please ignore
this step.
6. If necessary, rearrange the wires
to make sure that the wires are not
pinched between the heatsink and
the CPU. Also make sure to keep
clearance between the fan wires
and the ns of the heatsink.
Chapter 2: Installation
2-11
7. Align the four heatsink fasten-
ers with the mounting holes
on the motherboard. Gently
push the pairs of diagonal
fasteners (#1 & #2, and #3 &
#4) into the mounting holes
until you hear a click. Also,
make sure to orient each
fastener so that the narrow
end of the groove is pointing
outward.
8. Repeat Step 7 to insert all
four heatsink fasteners into
the mounting holes.
9. Once all four fasteners are
securely inserted into the
mounting holes, and the heat-
sink is properly installed on
the motherboard, connect the
heatsink fan wires to the CPU
Fan connector.
2-12
X10SLH-LN6TF User’s Manual
Removing the Heatsink
Warning: We do not recommend that the
CPU or the heatsink be removed. However, if
you do need to remove the heatsink, please
follow the instructions below to prevent dam-
age to the CPU or other components.
Active Heatsink Removal
1. Unplug the power cord from the
power supply.
2. Disconnect the heatsink fan wires
from the CPU fan header.
3. Use your nger tips to gently press
on the fastener cap and turn it
counterclockwise to make a 1/4 (900)
turn, and pull the fastener upward to
loosen it.
4. Repeat Step 3 to loosen all fasteners
from the mounting holes.
5. With all fasteners loosened, remove
the heatsink from the CPU.
Unplug the
PWR cord
Pull Up
For the 1U passive heat sink, ask for SNK-P0046P (back plate is included),
for the 2U active heat sink, SNK-P0046A4.
Chapter 2: Installation
2-13
A
IPMI CODE
CA
BIOS
LICENSE
BAR CODE
MAC CODE
CA
A
C
AC
A
+
JLAN3 JLAN2 JLAN1
JP1000
JPW1
JPW2
JSTBY1
J4
LE6
DIMM1
DIMM2
DIMM4
DIMM3
FAN4
FAN3
FAN2 FAN1
FANA
JPME1
JI2C1
JPME2
JI2C2
JPUSB1
JPL1
JPL2
JPL3
JPG1
JBR1
JWD1
JLED1
LE5
LE4
LE1
LE3
J3
JL1
JLED_LAN4
JLED_LAN3
JLED_LAN6
JLED_LAN5
JPI2C1
JTPM1 T-SGPIO1
T-SGPIO2
JSD2
JSD1
SPKR1
B1
JBT1
JF1
SW1
COM1
COM2
PCH SLOT4 PCI-E 2.0 X4(IN X8)
DESIGNED IN USA
X10SLH-LN6TF
REV:1.01
USB0(3.0)
USB1(3.0)
USB12/13
USB8/9
CPU SLOT6 PCI-E 3.0 X8(IN X16)
I-SATA0I-SATA2
I-SATA1I-SATA3
I-SATA4
I-SATA5
VGA
LAN5/6 LAN3/4 LAN1/2
USB4/5 (2.0)
USB2/3(3.0)
JLED1:3 pin Power LED
IPMI LAN
JF1
NIC2
NIC1
ON
PWR
X
RST
OH/
FF
LED
LED
HDD
X
PWR
NMI
C226
X540 X540 X540
BMC
PLX
2-5 Installing DDR3 Memory
Note: Check the Supermicro website for recommended memory mod-
ules.
CAUTION
Exercise extreme care when installing or removing DIMM
modules to prevent any possible damage.
DIMM Installation
1. Insert the desired number of DIMMs
into the memory slots, starting with
DIMMA2 (Channel A, Slot 2, see
the next page for the location). For
the system to work properly, please
use the memory modules of the
same type and speed in the same
motherboard.
Release Tabs
Notches
2. Push the release tabs outwards on
both ends of the DIMM slot to unlock
it.
Press both notches
straight down into
the memory slot.
3. Align the key of the DIMM mod-
ule with the receptive point on the
memory slot.
4. Align the notches on both ends of
the module against the receptive
points on the ends of the slot.
5. Use two thumbs together to press
the notches on both ends of the
module straight down into the slot
until the module snaps into place.
6. Press the release tabs to the lock
positions to secure the DIMM module
into the slot.
2-14
X10SLH-LN6TF User’s Manual
Removing Memory Modules
Reverse the steps above to remove the DIMM modules from the motherboard.
Memory Support
The X10SLH-LN6TF supports up to 32GB of Unbuffered (UDIMM) DDR3 ECC
1600/1333 MHz (1.35V/1.5V) memory in four slots. Populating these DIMM mod-
ules with a pair of memory modules of the same type and same size will result
in interleaved memory, which will improve memory performance. Please refer to
the table below:
Memory Population Guidelines
Please follow the table below when populating the X10SLH-LN6TF.
DDR3 Unbuffered ECC (UDIMM) Memory
DIMM Slots per
Channel
DIMMs Populat-
ed per Channel
DIMM Type POR Speeds Ranks per DIMM (any
combination)
2 1 Unbuffered
DDR3
1333, 1600 Single Rank, Dual Rank
2 2 Unbuffered
DDR3
1333, 1600 Single Rank, Dual Rank
Notes:
•Be sure to use memory modules of the same type, same speed, same
frequency on the same motherboard. Mixing of memory modules of dif-
ferent types and speeds is not allowed.
•Due to memory allocation to system devices, the amount of memory that
remains available for operational use will be reduced when 4 GB of RAM
is used. The reduction in memory availability is disproportional. See the
following table for details.
Slot B2 (Blue Slot)
Slot B1
Slot A1
Slot A2 (Blue Slot)
Towards the edge of the motherboard
Towards the CPU
Chapter 2: Installation
2-15
•For Microsoft Windows users: Microsoft implemented a design change in the
Windows XP with Service Pack 2 (SP2) and Windows Vista. This change is
specic to the behavior of Physical Address Extension (PAE) mode which
improves driver compatibility. For more information, please read the following
article at Microsoft’s Knowledge Base website at: http://support.microsoft.
com/kb/888137.
Possible System Memory Allocation & Availability
System Device Size Physical Memory
Remaining (-Available)
(4 GB Total System
Memory)
Firmware Hub ash memory (System BIOS) 1 MB 3.99
Local APIC 4 KB 3.99
Area Reserved for the chipset 2 MB 3.99
I/O APIC (4 Kbytes) 4 KB 3.99
PCI Enumeration Area 1 256 MB 3.76
PCI Express (256 MB) 256 MB 3.51
PCI Enumeration Area 2 (if needed) -Aligned on 256-MB
boundary-
512 MB 3.01
VGA Memory 16 MB 2.85
TSEG 1 MB 2.84
Memory available to OS and other applications 2.84
2-16
X10SLH-LN6TF User’s Manual
A
IPMI CODE
CA
BIOS
LICENSE
BAR CODE
MAC CODE
CA
A
C
AC
A
+
JLAN3 JLAN2 JLAN1
JP1000
JPW1
JPW2
JSTBY1
J4
LE6
DIMM1
DIMM2
DIMM4
DIMM3
FAN4
FAN3
FAN2 FAN1
FANA
JPME1
JI2C1
JPME2
JI2C2
JPUSB1
JPL1
JPL2
JPL3
JPG1
JBR1
JWD1
JLED1
LE5
LE4
LE1
LE3
J3
JL1
JLED_LAN4
JLED_LAN3
JLED_LAN6
JLED_LAN5
JPI2C1
JTPM1 T-SGPIO1
T-SGPIO2
JSD2
JSD1
SPKR1
B1
JBT1
JF1
SW1
COM1
COM2
PCH SLOT4 PCI-E 2.0 X4(IN X8)
DESIGNED IN USA
X10SLH-LN6TF
REV:1.01
USB0(3.0)
USB1(3.0)
USB12/13
USB8/9
CPU SLOT6 PCI-E 3.0 X8(IN X16)
I-SATA0I-SATA2
I-SATA1I-SATA3
I-SATA4
I-SATA5
VGA
LAN5/6 LAN3/4 LAN1/2
USB4/5 (2.0)
USB2/3(3.0)
JLED1:3 pin Power LED
IPMI LAN
JF1
NIC2
NIC1
ON
PWR
X
RST
OH/
FF
LED
LED
HDD
X
PWR
NMI
C226
X540 X540 X540
BMC
PLX
2-6 Connectors/IO Ports
The I/O ports are color coded in conformance with the industry standards. See the
gure below for the colors and locations of the various I/O ports.
Backplane I/O Panel
E
A
B
C
F
DG
H
I
J
K
LM
Backplane I/O Panel
A. COM1 F. USB Port 3 (3.0) K. LAN6
B. USB Port 5 (2.0) G. LAN2 L. LAN5
C. USB Port 4 (2.0) H. LAN1 M. VGA
D. IPMI LAN I. LAN4
E. USB Port 2 (3.0) J. LAN3
Chapter 2: Installation
2-17
A
IPMI CODE
CA
BIOS
LICENSE
BAR CODE
MAC CODE
CA
A
C
AC
A
+
JLAN3 JLAN2 JLAN1
JP1000
JPW1
JPW2
JSTBY1
J4
LE6
DIMM1
DIMM2
DIMM4
DIMM3
FAN4
FAN3
FAN2 FAN1
FANA
JPME1
JI2C1
JPME2
JI2C2
JPUSB1
JPL1
JPL2
JPL3
JPG1
JBR1
JWD1
JLED1
LE5
LE4
LE1
LE3
J3
JL1
JLED_LAN4
JLED_LAN3
JLED_LAN6
JLED_LAN5
JPI2C1
JTPM1 T-SGPIO1
T-SGPIO2
JSD2
JSD1
SPKR1
B1
JBT1
JF1
SW1
COM1
COM2
PCH SLOT4 PCI-E 2.0 X4(IN X8)
DESIGNED IN USA
X10SLH-LN6TF
REV:1.01
USB0(3.0)
USB1(3.0)
USB12/13
USB8/9
CPU SLOT6 PCI-E 3.0 X8(IN X16)
I-SATA0I-SATA2
I-SATA1I-SATA3
I-SATA4
I-SATA5
VGA
LAN5/6 LAN3/4 LAN1/2
USB4/5 (2.0)
USB2/3(3.0)
JLED1:3 pin Power LED
IPMI LAN
JF1
NIC2
NIC1
ON
PWR
X
RST
OH/
FF
LED
LED
HDD
X
PWR
NMI
C226
X540 X540 X540
BMC
PLX
Video Connection
A Video (VGA) port is located next
to LAN2 on the I/O backplane. Refer
to the board layout below for the
location.
Serial Ports
Two COM connections (COM1 &
COM2) are located on the mother-
board. COM1 is located on the Back-
plane I/O panel. COM2 is located next
to the onboard battery. See the table on
the right for pin denitions.
Serial COM2 Port
Pin Denitions
Pin # Denition Pin # Denition
1DCD 6 DSR
2 RXD 7 RTS
3 TXD 8 CTS
4 DTR 9 RI
5 Ground 10 N/A
A
B
C
A. COM1 - RJ45 Type Connector
B. COM2
C. VGA
COM2
2-18
X10SLH-LN6TF User’s Manual
A
IPMI CODE
CA
BIOS
LICENSE
BAR CODE
MAC CODE
CA
A
C
AC
A
+
JLAN3 JLAN2 JLAN1
JP1000
JPW1
JPW2
JSTBY1
J4
LE6
DIMM1
DIMM2
DIMM4
DIMM3
FAN4
FAN3
FAN2 FAN1
FANA
JPME1
JI2C1
JPME2
JI2C2
JPUSB1
JPL1
JPL2
JPL3
JPG1
JBR1
JWD1
JLED1
LE5
LE4
LE1
LE3
J3
JL1
JLED_LAN4
JLED_LAN3
JLED_LAN6
JLED_LAN5
JPI2C1
JTPM1 T-SGPIO1
T-SGPIO2
JSD2
JSD1
SPKR1
B1
JBT1
JF1
SW1
COM1
COM2
PCH SLOT4 PCI-E 2.0 X4(IN X8)
DESIGNED IN USA
X10SLH-LN6TF
REV:1.01
USB0(3.0)
USB1(3.0)
USB12/13
USB8/9
CPU SLOT6 PCI-E 3.0 X8(IN X16)
I-SATA0I-SATA2
I-SATA1I-SATA3
I-SATA4
I-SATA5
VGA
LAN5/6 LAN3/4 LAN1/2
USB4/5 (2.0)
USB2/3(3.0)
JLED1:3 pin Power LED
IPMI LAN
JF1
NIC2
NIC1
ON
PWR
X
RST
OH/
FF
LED
LED
HDD
X
PWR
NMI
C226
X540 X540 X540
BMC
PLX
A. Backpanel USB 4 (2.0)
B. Backpanel USB 5 (2.0)
C. Backpanel USB 3 (3.0)
D. Backpanel USB 2 (3.0)
E. Front USB 8/9 (2.0)
F. Front USB 12/13 (2.0)
G. Type A USB 0 (3.0)
H. Front Accessible USB 1 (3.0)
Universal Serial Bus (USB)
Two Universal Serial Bus 3.0 ports (USB2/3) and two USB 2.0 ports (USB4/5) are
located on the I/O back panel. In addition, two USB 2.0 headers (four USB 2.0 con-
nections: 8/9, 12/13), a Type A USB 3.0 header (USB0), and a front accessible USB
3.0 header (USB1) are also located on the motherboard to provide front chassis
access using USB cables (not included). See the tables below for pin denitions.
Front Panel USB (2.0) 8/9, 12/13
Pin Denitions
Pin # Denition Pin # Denition
1+5V 2+5V
3 USB_PN2 4 USB_PN3
5 USB_PP2 6 USB_PP3
7 Ground 8 Ground
9Key 10 Ground
A
Front Panel USB (3.0) 1
Pin Denitions
Signal Name Description
1VBUS Power
2 D- USB 2.0 Differential Pair
3 D+
4 Ground Ground of PWR Return
5 StdA_SSRX- SuperSpeed Receiver
6 StdA_SSRX+ Differential Pair
7 GND_DRAIN Ground for Signal Return
8 StdA_SSTX- SuperSpeed Transmitter
9 StdA_SSTX+ Differential Pair
C
E
B
F
D
H
G
Chapter 2: Installation
2-19
A
IPMI CODE
CA
BIOS
LICENSE
BAR CODE
MAC CODE
CA
A
C
AC
A
+
JLAN3 JLAN2 JLAN1
JP1000
JPW1
JPW2
JSTBY1
J4
LE6
DIMM1
DIMM2
DIMM4
DIMM3
FAN4
FAN3
FAN2 FAN1
FANA
JPME1
JI2C1
JPME2
JI2C2
JPUSB1
JPL1
JPL2
JPL3
JPG1
JBR1
JWD1
JLED1
LE5
LE4
LE1
LE3
J3
JL1
JLED_LAN4
JLED_LAN3
JLED_LAN6
JLED_LAN5
JPI2C1
JTPM1 T-SGPIO1
T-SGPIO2
JSD2
JSD1
SPKR1
B1
JBT1
JF1
SW1
COM1
COM2
PCH SLOT4 PCI-E 2.0 X4(IN X8)
DESIGNED IN USA
X10SLH-LN6TF
REV:1.01
USB0(3.0)
USB1(3.0)
USB12/13
USB8/9
CPU SLOT6 PCI-E 3.0 X8(IN X16)
I-SATA0I-SATA2
I-SATA1I-SATA3
I-SATA4
I-SATA5
VGA
LAN5/6 LAN3/4 LAN1/2
USB4/5 (2.0)
USB2/3(3.0)
JLED1:3 pin Power LED
IPMI LAN
JF1
NIC2
NIC1
ON
PWR
X
RST
OH/
FF
LED
LED
HDD
X
PWR
NMI
C226
X540 X540 X540
BMC
PLX
AC
Ethernet Ports
Six Gigabit Ethernet ports (LAN1 ~ LAN6) and an IPMI_LAN port are located next
to the VGA Connector on the I/O backpanel to provide network connections. These
ports accept RJ45 type cables.
Note: Please refer to the LED Indicator Section for LAN LED information.
A. LAN1
B. LAN2
C. LAN3
D. LAN4
E. LAN5
F. LAN6
G. IPMI LAN
B
GD
E
F
2-20
X10SLH-LN6TF User’s Manual
A
IPMI CODE
CA
BIOS
LICENSE
BAR CODE
MAC CODE
CA
A
C
AC
A
+
JLAN3 JLAN2 JLAN1
JP1000
JPW1
JPW2
JSTBY1
J4
LE6
DIMM1
DIMM2
DIMM4
DIMM3
FAN4
FAN3
FAN2 FAN1
FANA
JPME1
JI2C1
JPME2
JI2C2
JPUSB1
JPL1
JPL2
JPL3
JPG1
JBR1
JWD1
JLED1
LE5
LE4
LE1
LE3
J3
JL1
JLED_LAN4
JLED_LAN3
JLED_LAN6
JLED_LAN5
JPI2C1
JTPM1 T-SGPIO1
T-SGPIO2
JSD2
JSD1
SPKR1
B1
JBT1
JF1
SW1
COM1
COM2
PCH SLOT4 PCI-E 2.0 X4(IN X8)
DESIGNED IN USA
X10SLH-LN6TF
REV:1.01
USB0(3.0)
USB1(3.0)
USB12/13
USB8/9
CPU SLOT6 PCI-E 3.0 X8(IN X16)
I-SATA0I-SATA2
I-SATA1I-SATA3
I-SATA4
I-SATA5
VGA
LAN5/6 LAN3/4 LAN1/2
USB4/5 (2.0)
USB2/3(3.0)
JLED1:3 pin Power LED
IPMI LAN
JF1
NIC2
NIC1
ON
PWR
X
RST
OH/
FF
LED
LED
HDD
X
PWR
NMI
C226
X540 X540 X540
BMC
PLX
Power Button
Blue+ (OH/Fan Fail/
PWR FaiL/UID LED)
1
LAN1_Activity
LED
Reset Button
2
Power Fail LED
HDD LED
PWRLED
Reset
PWR
Red+ (Blue LED Cathode)
Ground
Ground
1920
LED_Anode+
X
Ground NMI-
X
LAN2 Activity
LED
LED_Anode+
LED_Anode+
LED_Anode+
LED_Anode+
C
A. UID Switch
B. Rear UID LED
C. Front UID LED
A
B
Unit Identier Switch/UID LED Indicators
A Unit Identier (UID) Switch and two LED Indi-
cators are located on the motherboard. The UID
Switch is located next to the VGA port on the
backplane. The Rear UID LED (LE4) is located
next to the UID Switch. The Front Panel UID
LED is located at Pins 7/8 of the Front Control
Panel at JF1. Connect a cable to Pin 8 on JF1
for Front Panel UID LED indication. When you
press the UID switch, both Rear UID LED and
Front Panel UID LED Indicators will be turned
on. Press the UID switch again to turn off both
LED Indicators. These UID Indicators provide
easy identication of a system unit that may be
in need of service.
Note: UID can also be triggered via
IPMI on the motherboard. For more
information on IPMI, please refer to the
IPMI User's Guide posted on our web-
site @ http://www.supermicro.com.
UID Switch
Pin# Denition
1 Ground
2 Ground
3 Button In
4 Button In
UID LED
Status
Color/State Status
Blue: On Unit Identied
Chapter 2: Installation
2-21
A
IPMI CODE
CA
BIOS
LICENSE
BAR CODE
MAC CODE
CA
A
C
AC
A
+
JLAN3 JLAN2 JLAN1
JP1000
JPW1
JPW2
JSTBY1
J4
LE6
DIMM1
DIMM2
DIMM4
DIMM3
FAN4
FAN3
FAN2 FAN1
FANA
JPME1
JI2C1
JPME2
JI2C2
JPUSB1
JPL1
JPL2
JPL3
JPG1
JBR1
JWD1
JLED1
LE5
LE4
LE1
LE3
J3
JL1
JLED_LAN4
JLED_LAN3
JLED_LAN6
JLED_LAN5
JPI2C1
JTPM1 T-SGPIO1
T-SGPIO2
JSD2
JSD1
SPKR1
B1
JBT1
JF1
SW1
COM1
COM2
PCH SLOT4 PCI-E 2.0 X4(IN X8)
DESIGNED IN USA
X10SLH-LN6TF
REV:1.01
USB0(3.0)
USB1(3.0)
USB12/13
USB8/9
CPU SLOT6 PCI-E 3.0 X8(IN X16)
I-SATA0I-SATA2
I-SATA1I-SATA3
I-SATA4
I-SATA5
VGA
LAN5/6 LAN3/4 LAN1/2
USB4/5 (2.0)
USB2/3(3.0)
JLED1:3 pin Power LED
IPMI LAN
JF1
NIC2
NIC1
ON
PWR
X
RST
OH/
FF
LED
LED
HDD
X
PWR
NMI
C226
X540 X540 X540
BMC
PLX
Front Control Panel
JF1 contains header pins for various buttons and indicators that are normally located
on a control panel at the front of the chassis. These connectors are designed spe-
cically for use with Supermicro chassis. See the gure below for the descriptions
of the front control panel buttons and LED indicators. Refer to the following section
for descriptions and pin denitions.
JF1 Header Pins
Power Button
Blue+ (OH/Fan Fail/
PWR FaiL/UID LED)
1
LAN1_Activity
LED
Reset Button
2
Power Fail LED
HDD LED
PWRLED
Reset
PWR
Red+ (Blue LED Cathode)
Ground
Ground
1920
LED_Anode+
X
Ground NMI-
X
LAN2 Activity
LED
LED_Anode+
LED_Anode+
LED_Anode+
LED_Anode+
2-22
X10SLH-LN6TF User’s Manual
A
IPMI CODE
CA
BIOS
LICENSE
BAR CODE
MAC CODE
CA
A
C
AC
A
+
JLAN3 JLAN2 JLAN1
JP1000
JPW1
JPW2
JSTBY1
J4
LE6
DIMM1
DIMM2
DIMM4
DIMM3
FAN4
FAN3
FAN2 FAN1
FANA
JPME1
JI2C1
JPME2
JI2C2
JPUSB1
JPL1
JPL2
JPL3
JPG1
JBR1
JWD1
JLED1
LE5
LE4
LE1
LE3
J3
JL1
JLED_LAN4
JLED_LAN3
JLED_LAN6
JLED_LAN5
JPI2C1
JTPM1 T-SGPIO1
T-SGPIO2
JSD2
JSD1
SPKR1
B1
JBT1
JF1
SW1
COM1
COM2
PCH SLOT4 PCI-E 2.0 X4(IN X8)
DESIGNED IN USA
X10SLH-LN6TF
REV:1.01
USB0(3.0)
USB1(3.0)
USB12/13
USB8/9
CPU SLOT6 PCI-E 3.0 X8(IN X16)
I-SATA0I-SATA2
I-SATA1I-SATA3
I-SATA4
I-SATA5
VGA
LAN5/6 LAN3/4 LAN1/2
USB4/5 (2.0)
USB2/3(3.0)
JLED1:3 pin Power LED
IPMI LAN
JF1
NIC2
NIC1
ON
PWR
X
RST
OH/
FF
LED
LED
HDD
X
PWR
NMI
C226
X540 X540 X540
BMC
PLX
Power Button
Blue+ (OH/Fan Fail/
PWR FaiL/UID LED)
1
LAN1_Activity
LED
Reset Button
2
Power Fail LED
HDD LED
PWRLED
Reset
PWR
Red+ (Blue LED Cathode)
Ground
Ground
1920
LED_Anode+
X
Ground NMI-
X
LAN2 Activity
LED
LED_Anode+
LED_Anode+
LED_Anode+
LED_Anode+
Front Control Panel Pin Denitions
A. NMI
B. PWR LED
A
B
Power LED
The Power LED connection is located
on pins 15 and 16 of JF1. Refer to the
table on the right for pin denitions.
NMI Button
The non-maskable interrupt button
header is located on pins 19 and 20
of JF1. Refer to the table on the right
for pin denitions.
NMI Button
Pin Denitions (JF1)
Pin# Denition
19 Control
20 Ground
Power LED
Pin Denitions (JF1)
Pin# Denition
15 LED_Anode+
16 PWR LED
Chapter 2: Installation
2-23
Power Button
Blue+ (OH/Fan Fail/
PWR FaiL/UID LED)
1
LAN1_Activity
LED
Reset Button
2
Power Fail LED
HDD LED
PWRLED
Reset
PWR
Red+ (Blue LED Cathode)
Ground
Ground
1920
LED_Anode+
X
Ground NMI-
X
LAN2 Activity
LED
LED_Anode+
LED_Anode+
LED_Anode+
LED_Anode+
A
B
HDD LED
The HDD LED connection is located
on pins 13 and 14 of JF1. Attach a
cable here to indicate HDD activ-
ity. See the table on the right for pin
denitions.
HDD LED
Pin Denitions (JF1)
Pin# Denition
13 LED_Anode+
14 HD Active
NIC1/NIC2 LEDs
The NIC (Network Interface Control-
ler) LED connection for GLAN Port 1
is located on pins 11 and 12 of JF1,
and the LED connection for GLAN
Port 2 is on Pins 9 and 10. Attach the
NIC LED cables to the LED indicators
mentioned above to display network
activity. Refer to the layout below for
the locations of NIC LED indicators.
GLAN1/2 LED
Pin Denitions (JF1)
Pin# Denition
9 LED_Anode+
10 LAN2 Activity LED
11 LED_Anode+
12 LAN1 Activity LED
A. HDD LED
B. NIC1 LED
C. NIC2 LED
C
A
IPMI CODE
CA
BIOS
LICENSE
BAR CODE
MAC CODE
CA
A
C
AC
A
+
JLAN3 JLAN2 JLAN1
JP1000
JPW1
JPW2
JSTBY1
J4
LE6
DIMM1
DIMM2
DIMM4
DIMM3
FAN4
FAN3
FAN2 FAN1
FANA
JPME1
JI2C1
JPME2
JI2C2
JPUSB1
JPL1
JPL2
JPL3
JPG1
JBR1
JWD1
JLED1
LE5
LE4
LE1
LE3
J3
JL1
JLED_LAN4
JLED_LAN3
JLED_LAN6
JLED_LAN5
JPI2C1
JTPM1 T-SGPIO1
T-SGPIO2
JSD2
JSD1
SPKR1
B1
JBT1
JF1
SW1
COM1
COM2
PCH SLOT4 PCI-E 2.0 X4(IN X8)
DESIGNED IN USA
X10SLH-LN6TF
REV:1.01
USB0(3.0)
USB1(3.0)
USB12/13
USB8/9
CPU SLOT6 PCI-E 3.0 X8(IN X16)
I-SATA0I-SATA2
I-SATA1I-SATA3
I-SATA4
I-SATA5
VGA
LAN5/6 LAN3/4 LAN1/2
USB4/5 (2.0)
USB2/3(3.0)
JLED1:3 pin Power LED
IPMI LAN
JF1
NIC2
NIC1
ON
PWR
X
RST
OH/
FF
LED
LED
HDD
X
PWR
NMI
C226
X540 X540 X540
BMC
PLX
2-24
X10SLH-LN6TF User’s Manual
Power Button
Blue+ (OH/Fan Fail/
PWR FaiL/UID LED)
1
LAN1_Activity
LED
Reset Button
2
Power Fail LED
HDD LED
PWRLED
Reset
PWR
Red+ (Blue LED Cathode)
Ground
Ground
1920
LED_Anode+
X
Ground NMI-
X
LAN2 Activity
LED
LED_Anode+
LED_Anode+
LED_Anode+
LED_Anode+
A
B
Power Fail LED
The Power Fail LED connection is
located on pins 5 and 6 of JF1. Re-
fer to the table on the right for pin
denitions.
PWR Fail LED
Pin Denitions (JF1)
Pin# Denition
5 LED_Anode+
6 PWR Supply Fail
Overheat (OH)/Fan Fail/PWR Fail/
UID LED
Connect an LED cable to pins 7 and
8 of Front Control Panel to use the
Overheat/Fan Fail/Power Fail and
UID LED connections. The Red LED
on pin 7 provides warnings of over-
heat, fan failure or power failure. The
Blue LED on pin 8 works as the front
panel UID LED indicator. The Red
LED takes precedence over the Blue
LED by default. Refer to the table on
the right for pin denitions.
OH/Fan Fail/ PWR Fail/Blue_UID
LED Pin Denitions (JF1)
Pin# Denition
7Red+(Blue LED Cathode)
8 Blue+ (OH/Fan Fail/Power Fail/
UID LED)
OH/Fan Fail/PWR Fail LED
Status (Red LED)
State Denition
Off Normal
On Overheat
Flashing 1 Hz & 1/4Hz
Fan Fail & PWR Fail
A. OH/Fan Fail/PWR Fail/UID LED
B. PWR Fail LED
A
IPMI CODE
CA
BIOS
LICENSE
BAR CODE
MAC CODE
CA
A
C
AC
A
+
JLAN3 JLAN2 JLAN1
JP1000
JPW1
JPW2
JSTBY1
J4
LE6
DIMM1
DIMM2
DIMM4
DIMM3
FAN4
FAN3
FAN2 FAN1
FANA
JPME1
JI2C1
JPME2
JI2C2
JPUSB1
JPL1
JPL2
JPL3
JPG1
JBR1
JWD1
JLED1
LE5
LE4
LE1
LE3
J3
JL1
JLED_LAN4
JLED_LAN3
JLED_LAN6
JLED_LAN5
JPI2C1
JTPM1 T-SGPIO1
T-SGPIO2
JSD2
JSD1
SPKR1
B1
JBT1
JF1
SW1
COM1
COM2
PCH SLOT4 PCI-E 2.0 X4(IN X8)
DESIGNED IN USA
X10SLH-LN6TF
REV:1.01
USB0(3.0)
USB1(3.0)
USB12/13
USB8/9
CPU SLOT6 PCI-E 3.0 X8(IN X16)
I-SATA0I-SATA2
I-SATA1I-SATA3
I-SATA4
I-SATA5
VGA
LAN5/6 LAN3/4 LAN1/2
USB4/5 (2.0)
USB2/3(3.0)
JLED1:3 pin Power LED
IPMI LAN
JF1
NIC2
NIC1
ON
PWR
X
RST
OH/
FF
LED
LED
HDD
X
PWR
NMI
C226
X540 X540 X540
BMC
PLX
Chapter 2: Installation
2-25
Power Button
Blue+ (OH/Fan Fail/
PWR FaiL/UID
LED)
1
LAN1_Activity
LED
Reset Button
2
Power Fail LED
HDD LED
PWRLED
Reset
PWR
Red+ (Blue LED Cathode)
Ground
Ground
1920
LED_Anode+
X
Ground NMI-
X
LAN2 Activity
LED
LED_Anode+
LED_Anode+
LED_Anode+
LED_Anode+
A
B
Power Button
The Power Button connection is located
on pins 1 and 2 of JF1. Momentarily
contacting both pins will power on/off
the system. This button can also be con-
gured to function as a suspend button
(with a setting in the BIOS - See Chapter
5). To turn off the power when the system
is in suspend mode, press the button for
4 seconds or longer. Refer to the table on
the right for pin denitions.
Power Button
Pin Denitions (JF1)
Pin# Denition
1 Signal
2 Ground
Reset Button
Pin Denitions (JF1)
Pin# Denition
3 Reset
4 Ground
A. Reset Button
B. PWR Button
Reset Button
The Reset Button connection is located
on pins 3 and 4 of JF1. Attach it to a
hardware reset switch on the computer
case. Refer to the table on the right for
pin denitions.
A
IPMI CODE
CA
BIOS
LICENSE
BAR CODE
MAC CODE
CA
A
C
AC
A
+
JLAN3 JLAN2 JLAN1
JP1000
JPW1
JPW2
JSTBY1
J4
LE6
DIMM1
DIMM2
DIMM4
DIMM3
FAN4
FAN3
FAN2 FAN1
FANA
JPME1
JI2C1
JPME2
JI2C2
JPUSB1
JPL1
JPL2
JPL3
JPG1
JBR1
JWD1
JLED1
LE5
LE4
LE1
LE3
J3
JL1
JLED_LAN4
JLED_LAN3
JLED_LAN6
JLED_LAN5
JPI2C1
JTPM1 T-SGPIO1
T-SGPIO2
JSD2
JSD1
SPKR1
B1
JBT1
JF1
SW1
COM1
COM2
PCH SLOT4 PCI-E 2.0 X4(IN X8)
DESIGNED IN USA
X10SLH-LN6TF
REV:1.01
USB0(3.0)
USB1(3.0)
USB12/13
USB8/9
CPU SLOT6 PCI-E 3.0 X8(IN X16)
I-SATA0I-SATA2
I-SATA1I-SATA3
I-SATA4
I-SATA5
VGA
LAN5/6 LAN3/4 LAN1/2
USB4/5 (2.0)
USB2/3(3.0)
JLED1:3 pin Power LED
IPMI LAN
JF1
NIC2
NIC1
ON
PWR
X
RST
OH/
FF
LED
LED
HDD
X
PWR
NMI
C226
X540 X540 X540
BMC
PLX
2-26
X10SLH-LN6TF User’s Manual
A
IPMI CODE
CA
BIOS
LICENSE
BAR CODE
MAC CODE
CA
A
C
AC
A
+
JLAN3 JLAN2 JLAN1
JP1000
JPW1
JPW2
JSTBY1
J4
LE6
DIMM1
DIMM2
DIMM4
DIMM3
FAN4
FAN3
FAN2 FAN1
FANA
JPME1
JI2C1
JPME2
JI2C2
JPUSB1
JPL1
JPL2
JPL3
JPG1
JBR1
JWD1
JLED1
LE5
LE4
LE1
LE3
J3
JL1
JLED_LAN4
JLED_LAN3
JLED_LAN6
JLED_LAN5
JPI2C1
JTPM1 T-SGPIO1
T-SGPIO2
JSD2
JSD1
SPKR1
B1
JBT1
JF1
SW1
COM1
COM2
PCH SLOT4 PCI-E 2.0 X4(IN X8)
DESIGNED IN USA
X10SLH-LN6TF
REV:1.01
USB0(3.0)
USB1(3.0)
USB12/13
USB8/9
CPU SLOT6 PCI-E 3.0 X8(IN X16)
I-SATA0I-SATA2
I-SATA1I-SATA3
I-SATA4
I-SATA5
VGA
LAN5/6 LAN3/4 LAN1/2
USB4/5 (2.0)
USB2/3(3.0)
JLED1:3 pin Power LED
IPMI LAN
JF1
NIC2
NIC1
ON
PWR
X
RST
OH/
FF
LED
LED
HDD
X
PWR
NMI
C226
X540 X540 X540
BMC
PLX
2-7 Connecting Cables
This section provides brief descriptions and pin-out denitions for onboard headers
and connectors. Be sure to use the correct cable for each header or connector.
For information on Backpanel USB and Front Panel USB ports, refer to page 2-21.
A. 24-Pin ATX Main PWR
B. 8-Pin PWR
ATX Power 24-pin Connector
Pin Denitions (JPW1)
Pin# Denition Pin # Denition
13 +3.3V 1+3.3V
14 -12V 2+3.3V
15 COM 3COM
16 PS_ON 4 +5V
17 COM 5COM
18 COM 6+5V
19 COM 7COM
20 Res (NC) 8PWR_OK
21 +5V 95VSB
22 +5V 10 +12V
23 +5V 11 +12V
24 COM 12 +3.3V
(Required)
12V 8-pin Power Connec-
tor Pin Denitions
Pins Denition
1 through 4 Ground
5 through 8 +12V
ATX Main PWR & CPU PWR
Connectors (JPW1 & JPW2)
The 24-pin main power connector
(JPW1) is used to provide power to
the motherboard. The 8-pin CPU
PWR connector (JPW2) is also
required for the processor. These
power connectors meet the SSI EPS
12V specication. See the table on
the right for pin denitions.
24-Pin Main PWR
A
B
Chapter 2: Installation
2-27
A
IPMI CODE
CA
BIOS
LICENSE
BAR CODE
MAC CODE
CA
A
C
AC
A
+
JLAN3 JLAN2 JLAN1
JP1000
JPW1
JPW2
JSTBY1
J4
LE6
DIMM1
DIMM2
DIMM4
DIMM3
FAN4
FAN3
FAN2 FAN1
FANA
JPME1
JI2C1
JPME2
JI2C2
JPUSB1
JPL1
JPL2
JPL3
JPG1
JBR1
JWD1
JLED1
LE5
LE4
LE1
LE3
J3
JL1
JLED_LAN4
JLED_LAN3
JLED_LAN6
JLED_LAN5
JPI2C1
JTPM1 T-SGPIO1
T-SGPIO2
JSD2
JSD1
SPKR1
B1
JBT1
JF1
SW1
COM1
COM2
PCH SLOT4 PCI-E 2.0 X4(IN X8)
DESIGNED IN USA
X10SLH-LN6TF
REV:1.01
USB0(3.0)
USB1(3.0)
USB12/13
USB8/9
CPU SLOT6 PCI-E 3.0 X8(IN X16)
I-SATA0I-SATA2
I-SATA1I-SATA3
I-SATA4
I-SATA5
VGA
LAN5/6 LAN3/4 LAN1/2
USB4/5 (2.0)
USB2/3(3.0)
JLED1:3 pin Power LED
IPMI LAN
JF1
NIC2
NIC1
ON
PWR
X
RST
OH/
FF
LED
LED
HDD
X
PWR
NMI
C226
X540 X540 X540
BMC
PLX
A. Fan 1
B. Fan 2
C. Fan 3
D. Fan 4
E. Fan A
F. Chassis Intrusion
Fan Header
Pin Denitions
Pin# Denition
1Ground (Black)
22.5A/+12V
(Red)
3 Tachometer
4PWM_Control
Fan Headers (Fan 1- Fan 4/Fan A)
The X10SLH-LN6TF has ve fan headers (Fan
1-Fan 4, Fan A). These fans are 4-pin fan head-
ers. Although pins 1-3 of the fan headers are
backward compatible with the traditional 3-pin
fans, we recommend that 4-pin fans be used
to take advantage of the fan speed control via
IPMI interface. This allows the fan speeds to be
automatically adjusted based on the tempera-
tures of the CPU or the motherboard. Refer to
the table on the right for pin denitions.
A
B
C
D
E
Chassis Intrusion (JL1)
A Chassis Intrusion header is located at JL1 on
the motherboard. Attach the appropriate cable
from the chassis to inform you of a chassis intru-
sion when the chassis is opened.
Chassis Intrusion
Pin Denitions (JL1)
Pin# Denition
1 Intrusion Input
2 Ground
F
2-28
X10SLH-LN6TF User’s Manual
A
IPMI CODE
CA
BIOS
LICENSE
BAR CODE
MAC CODE
CA
A
C
AC
A
+
JLAN3 JLAN2 JLAN1
JP1000
JPW1
JPW2
JSTBY1
J4
LE6
DIMM1
DIMM2
DIMM4
DIMM3
FAN4
FAN3
FAN2 FAN1
FANA
JPME1
JI2C1
JPME2
JI2C2
JPUSB1
JPL1
JPL2
JPL3
JPG1
JBR1
JWD1
JLED1
LE5
LE4
LE1
LE3
J3
JL1
JLED_LAN4
JLED_LAN3
JLED_LAN6
JLED_LAN5
JPI2C1
JTPM1 T-SGPIO1
T-SGPIO2
JSD2
JSD1
SPKR1
B1
JBT1
JF1
SW1
COM1
COM2
PCH SLOT4 PCI-E 2.0 X4(IN X8)
DESIGNED IN USA
X10SLH-LN6TF
REV:1.01
USB0(3.0)
USB1(3.0)
USB12/13
USB8/9
CPU SLOT6 PCI-E 3.0 X8(IN X16)
I-SATA0I-SATA2
I-SATA1I-SATA3
I-SATA4
I-SATA5
VGA
LAN5/6 LAN3/4 LAN1/2
USB4/5 (2.0)
USB2/3(3.0)
JLED1:3 pin Power LED
IPMI LAN
JF1
NIC2
NIC1
ON
PWR
X
RST
OH/
FF
LED
LED
HDD
X
PWR
NMI
C226
X540 X540 X540
BMC
PLX
Internal Buzzer (SPKR1)
The Internal Buzzer (SPKR1) can be
used to provide audible indications for
various beep codes. See the table on
the right for pin denitions.
A. Internal Buzzer
B. Onboard Power LED
Internal Buzzer
Pin Denition
Pin# Denitions
Pin 1 Pos. (+) VCC
Pin 2 Neg. (-) Beep In
A
Onboard Power LED (JLED1)
An onboard Power LED header is
located at JLED1. This Power LED
header is connected to Front Control
Panel located at JF1 to indicate the
status of system power. See the table
on the right for pin denitions.
Onboard PWR LED
Pin Denitions
Pin# Denition
1VCC
2No Connection
3Connection to PWR
LED in JF1
B
Chapter 2: Installation
2-29
A
IPMI CODE
CA
BIOS
LICENSE
BAR CODE
MAC CODE
CA
A
C
AC
A
+
JLAN3 JLAN2 JLAN1
JP1000
JPW1
JPW2
JSTBY1
J4
LE6
DIMM1
DIMM2
DIMM4
DIMM3
FAN4
FAN3
FAN2 FAN1
FANA
JPME1
JI2C1
JPME2
JI2C2
JPUSB1
JPL1
JPL2
JPL3
JPG1
JBR1
JWD1
JLED1
LE5
LE4
LE1
LE3
J3
JL1
JLED_LAN4
JLED_LAN3
JLED_LAN6
JLED_LAN5
JPI2C1
JTPM1 T-SGPIO1
T-SGPIO2
JSD2
JSD1
SPKR1
B1
JBT1
JF1
SW1
COM1
COM2
PCH SLOT4 PCI-E 2.0 X4(IN X8)
DESIGNED IN USA
X10SLH-LN6TF
REV:1.01
USB0(3.0)
USB1(3.0)
USB12/13
USB8/9
CPU SLOT6 PCI-E 3.0 X8(IN X16)
I-SATA0I-SATA2
I-SATA1I-SATA3
I-SATA4
I-SATA5
VGA
LAN5/6 LAN3/4 LAN1/2
USB4/5 (2.0)
USB2/3(3.0)
JLED1:3 pin Power LED
IPMI LAN
JF1
NIC2
NIC1
ON
PWR
X
RST
OH/
FF
LED
LED
HDD
X
PWR
NMI
C226
X540 X540 X540
BMC
PLX
A. DOM PWR (JSD1/JSD2)
B. Standby PWR
A
B
DOM PWR Connectors (JSD1/
JSD2)
The Disk-On-Module (DOM) power
connectors, located at JSD1 and
JSD2, provide 5V (Gen1/Gen) power
to a solid state DOM storage device
connected to one of the SATA ports.
See the table on the right for pin
denitions.
DOM PWR
Pin Denitions
Pin# Denition
15V
2 Ground
3 Ground
Standby Power Header
The Standby Power header is located
at JSTBY1 on the motherboard. See
the table on the right for pin deni-
tions.
Standby Power
Pin Denitions
Pin# Denition
1+5V Standby
2 Ground
3No Connection
2-30
X10SLH-LN6TF User’s Manual
A
IPMI CODE
CA
BIOS
LICENSE
BAR CODE
MAC CODE
CA
A
C
AC
A
+
JLAN3 JLAN2 JLAN1
JP1000
JPW1
JPW2
JSTBY1
J4
LE6
DIMM1
DIMM2
DIMM4
DIMM3
FAN4
FAN3
FAN2 FAN1
FANA
JPME1
JI2C1
JPME2
JI2C2
JPUSB1
JPL1
JPL2
JPL3
JPG1
JBR1
JWD1
JLED1
LE5
LE4
LE1
LE3
J3
JL1
JLED_LAN4
JLED_LAN3
JLED_LAN6
JLED_LAN5
JPI2C1
JTPM1 T-SGPIO1
T-SGPIO2
JSD2
JSD1
SPKR1
B1
JBT1
JF1
SW1
COM1
COM2
PCH SLOT4 PCI-E 2.0 X4(IN X8)
DESIGNED IN USA
X10SLH-LN6TF
REV:1.01
USB0(3.0)
USB1(3.0)
USB12/13
USB8/9
CPU SLOT6 PCI-E 3.0 X8(IN X16)
I-SATA0I-SATA2
I-SATA1I-SATA3
I-SATA4
I-SATA5
VGA
LAN5/6 LAN3/4 LAN1/2
USB4/5 (2.0)
USB2/3(3.0)
JLED1:3 pin Power LED
IPMI LAN
JF1
NIC2
NIC1
ON
PWR
X
RST
OH/
FF
LED
LED
HDD
X
PWR
NMI
C226
X540 X540 X540
BMC
PLX
C
A.T-SGPIO 1
B.T-SGPIO 2
C.JTPM1
A
B
T-SGPIO 1/2 Headers
Two Serial-Link General Purpose
Input/Output headers (T-SGPIO 1/2)
are located on the motherboard to en-
hance system performance. See the
table on the right for pin denitions.
Note: NC= No Connection
T-SGPIO
Pin Denitions
Pin# Denition Pin Denition
1NC 2NC
3 Ground 4 Data
5 Load 6 Ground
7Clock 8NC
TPM Header/Port 80 Header
A Trusted Platform Module/Port 80
header is located at JTPM1 to provide
TPM support and Port 80 connection.
Use this header to enhance system
performance and data security. See
the table on the right for pin deni-
tions.
TPM/Port 80 Header
Pin Denitions
Pin # Denition Pin # Denition
1LCLK 2 GND
3 LFRAME# 4 <(KEY)>
5 LRESET# 6 +5V (X)
7 LAD 3 8 LAD 2
9+3.3V 10 LAD1
11 LAD0 12 GND
13 SMB_CLK4 14 SMB_DAT4
15 +3V_DUAL 16 SERIRQ
17 GND 18 CLKRUN# (X)
19 LPCPD# 20 LDRQ# (X)
Chapter 2: Installation
2-31
A
IPMI CODE
CA
BIOS
LICENSE
BAR CODE
MAC CODE
CA
A
C
AC
A
+
JLAN3 JLAN2 JLAN1
JP1000
JPW1
JPW2
JSTBY1
J4
LE6
DIMM1
DIMM2
DIMM4
DIMM3
FAN4
FAN3
FAN2 FAN1
FANA
JPME1
JI2C1
JPME2
JI2C2
JPUSB1
JPL1
JPL2
JPL3
JPG1
JBR1
JWD1
JLED1
LE5
LE4
LE1
LE3
J3
JL1
JLED_LAN4
JLED_LAN3
JLED_LAN6
JLED_LAN5
JPI2C1
JTPM1 T-SGPIO1
T-SGPIO2
JSD2
JSD1
SPKR1
B1
JBT1
JF1
SW1
COM1
COM2
PCH SLOT4 PCI-E 2.0 X4(IN X8)
DESIGNED IN USA
X10SLH-LN6TF
REV:1.01
USB0(3.0)
USB1(3.0)
USB12/13
USB8/9
CPU SLOT6 PCI-E 3.0 X8(IN X16)
I-SATA0I-SATA2
I-SATA1I-SATA3
I-SATA4
I-SATA5
VGA
LAN5/6 LAN3/4 LAN1/2
USB4/5 (2.0)
USB2/3(3.0)
JLED1:3 pin Power LED
IPMI LAN
JF1
NIC2
NIC1
ON
PWR
X
RST
OH/
FF
LED
LED
HDD
X
PWR
NMI
C226
X540 X540 X540
BMC
PLX
A. PWR SMB
A
Power SMB (I2C) Connector
Power System Management Bus (I2C)
Connector (JPI2C1) monitors power
supply, fan and system temperatures.
See the table on the right for pin
denitions.
PWR SMB
Pin Denitions
Pin# Denition
1Clock
2 Data
3 PWR Fail
4 Ground
5+3.3V
2-32
X10SLH-LN6TF User’s Manual
A
IPMI CODE
CA
BIOS
LICENSE
BAR CODE
MAC CODE
CA
A
C
AC
A
+
JLAN3 JLAN2 JLAN1
JP1000
JPW1
JPW2
JSTBY1
J4
LE6
DIMM1
DIMM2
DIMM4
DIMM3
FAN4
FAN3
FAN2 FAN1
FANA
JPME1
JI2C1
JPME2
JI2C2
JPUSB1
JPL1
JPL2
JPL3
JPG1
JBR1
JWD1
JLED1
LE5
LE4
LE1
LE3
J3
JL1
JLED_LAN4
JLED_LAN3
JLED_LAN6
JLED_LAN5
JPI2C1
JTPM1 T-SGPIO1
T-SGPIO2
JSD2
JSD1
SPKR1
B1
JBT1
JF1
SW1
COM1
COM2
PCH SLOT4 PCI-E 2.0 X4(IN X8)
DESIGNED IN USA
X10SLH-LN6TF
REV:1.01
USB0(3.0)
USB1(3.0)
USB12/13
USB8/9
CPU SLOT6 PCI-E 3.0 X8(IN X16)
I-SATA0I-SATA2
I-SATA1I-SATA3
I-SATA4
I-SATA5
VGA
LAN5/6 LAN3/4 LAN1/2
USB4/5 (2.0)
USB2/3(3.0)
JLED1:3 pin Power LED
IPMI LAN
JF1
NIC2
NIC1
ON
PWR
X
RST
OH/
FF
LED
LED
HDD
X
PWR
NMI
C226
X540 X540 X540
BMC
PLX
C
2-8 Jumper Settings
Explanation of Jumpers
To modify the operation of the motherboard,
jumpers can be used to choose between
optional settings. Jumpers create shorts be-
tween two pins to change the function of the
connector. Pin 1 is identied with a square
solder pad on the printed circuit board.
Note: On two-pin jumpers, "Closed"
means the jumper is on, and "Open"
means the jumper is off the pins.
A. JPL1: LAN1/2 Enable
B. JPL2: LAN3/4 Enable
c. JPL3: LAN5/6 Enable
GLAN Enable/Disable
Jumpers JPL1/JPL2/JPL3 enable or disable
LAN ports 1/2/3 on the motherboard. See
the table on the right for jumper settings. The
default setting is enabled.
GLAN Enable
Jumper Settings
Jumper Setting Denition
1-2 Enabled (default)
2-3 Disabled
A
B
Chapter 2: Installation
2-33
A
IPMI CODE
CA
BIOS
LICENSE
BAR CODE
MAC CODE
CA
A
C
AC
A
+
JLAN3 JLAN2 JLAN1
JP1000
JPW1
JPW2
JSTBY1
J4
LE6
DIMM1
DIMM2
DIMM4
DIMM3
FAN4
FAN3
FAN2 FAN1
FANA
JPME1
JI2C1
JPME2
JI2C2
JPUSB1
JPL1
JPL2
JPL3
JPG1
JBR1
JWD1
JLED1
LE5
LE4
LE1
LE3
J3
JL1
JLED_LAN4
JLED_LAN3
JLED_LAN6
JLED_LAN5
JPI2C1
JTPM1 T-SGPIO1
T-SGPIO2
JSD2
JSD1
SPKR1
B1
JBT1
JF1
SW1
COM1
COM2
PCH SLOT4 PCI-E 2.0 X4(IN X8)
DESIGNED IN USA
X10SLH-LN6TF
REV:1.01
USB0(3.0)
USB1(3.0)
USB12/13
USB8/9
CPU SLOT6 PCI-E 3.0 X8(IN X16)
I-SATA0I-SATA2
I-SATA1I-SATA3
I-SATA4
I-SATA5
VGA
LAN5/6 LAN3/4 LAN1/2
USB4/5 (2.0)
USB2/3(3.0)
JLED1:3 pin Power LED
IPMI LAN
JF1
NIC2
NIC1
ON
PWR
X
RST
OH/
FF
LED
LED
HDD
X
PWR
NMI
C226
X540 X540 X540
BMC
PLX
CMOS Clear (JBT1)
JBT1 is used to clear the saved system setup conguration stored in the CMOS chip.
To clear the contents of the CMOS, completely shut down the system, remove the
AC power cord and then short JBT1 with a jumper. This will erase all user settings
and revert everything to their factory-set defaults.
A. Clear CMOS
B. JI2C1
C. JI2C2
PCI Slot_SMB Enable
Jumper Settings
Jumper Setting Denition
1-2 Enabled
2-3 Disabled
PCI Slot SMB Enable (JI2C1/JI2C2)
Use jumpers JI2C1/JI2C2 to enable PCI
SMB (System Management Bus) support
to improve system management for the
PCI slots. See the table on the right for
jumper settings.
C
A
B
2-34
X10SLH-LN6TF User’s Manual
A. Watch Dog Enable
B Rear USB4/5 Enable
A
Watch Dog Enable/Disable
Watch Dog (JWD1) is a system monitor that
can reboot the system when a software appli-
cation hangs. Close pins 1-2 to reset the sys-
tem if an application hangs. Close Pins 2-3 to
generate a non-maskable interrupt signal for
the application that hangs. See the table on
the right for jumper settings. Watch Dog must
also be enabled in the BIOS.
Watch Dog
Jumper Settings
Jumper Setting Denition
Pins 1-2 Reset (default)
Pins 2-3 NMI
Open Disabled
Rear USB 4/5_Wake_Up Enable
Set jumper JPUSB1 to Enabled to "wake up"
the system when a device installed in USB 4
or 5 receives a signal. See the table on the
right for jumper settings.
Rear USB 4/5 Wake_Up En-
able Jumper Settings
Jumper Setting Denition
Pins 1-2 Enabled (Default)
Pins 2-3 Disabled
B
A
IPMI CODE
CA
BIOS
LICENSE
BAR CODE
MAC CODE
CA
A
C
AC
A
+
JLAN3 JLAN2 JLAN1
JP1000
JPW1
JPW2
JSTBY1
J4
LE6
DIMM1
DIMM2
DIMM4
DIMM3
FAN4
FAN3
FAN2 FAN1
FANA
JPME1
JI2C1
JPME2
JI2C2
JPUSB1
JPL1
JPL2
JPL3
JPG1
JBR1
JWD1
JLED1
LE5
LE4
LE1
LE3
J3
JL1
JLED_LAN4
JLED_LAN3
JLED_LAN6
JLED_LAN5
JPI2C1
JTPM1 T-SGPIO1
T-SGPIO2
JSD2
JSD1
SPKR1
B1
JBT1
JF1
SW1
COM1
COM2
PCH SLOT4 PCI-E 2.0 X4(IN X8)
DESIGNED IN USA
X10SLH-LN6TF
REV:1.01
USB0(3.0)
USB1(3.0)
USB12/13
USB8/9
CPU SLOT6 PCI-E 3.0 X8(IN X16)
I-SATA0I-SATA2
I-SATA1I-SATA3
I-SATA4
I-SATA5
VGA
LAN5/6 LAN3/4 LAN1/2
USB4/5 (2.0)
USB2/3(3.0)
JLED1:3 pin Power LED
IPMI LAN
JF1
NIC2
NIC1
ON
PWR
X
RST
OH/
FF
LED
LED
HDD
X
PWR
NMI
C226
X540 X540 X540
BMC
PLX
Chapter 2: Installation
2-35
Manufacturer Mode Select
Close jumper JPME2 to bypass SPI ash
security and force the system to use the
Manufacturer Mode which will allow the
user to ash the system rmware from
a host server to modify system settings.
See the table on the right for jumper
settings.
ME Mode Select
Jumper Settings
Jumper Setting Denition
1-2 Normal (Default)
2-3 Manufacturer Mode
ME Recovery
Jumper Settings
Jumper Setting Denition
1-2 Normal (Default)
2-3 ME Recovery
ME Recovery
Set jumper JPME1 to select ME Firm-
ware Recovery mode, which will limit
system resource for essential function
use only without putting restrictions on
power use. In the single operation mode,
online upgrade will be available via Re-
covery mode. See the table on the right
for pin denitions.
A. ME Recovery
B. Manufacturer Mode
A
B
A
IPMI CODE
CA
BIOS
LICENSE
BAR CODE
MAC CODE
CA
A
C
AC
A
+
JLAN3 JLAN2 JLAN1
JP1000
JPW1
JPW2
JSTBY1
J4
LE6
DIMM1
DIMM2
DIMM4
DIMM3
FAN4
FAN3
FAN2 FAN1
FANA
JPME1
JI2C1
JPME2
JI2C2
JPUSB1
JPL1
JPL2
JPL3
JPG1
JBR1
JWD1
JLED1
LE5
LE4
LE1
LE3
J3
JL1
JLED_LAN4
JLED_LAN3
JLED_LAN6
JLED_LAN5
JPI2C1
JTPM1 T-SGPIO1
T-SGPIO2
JSD2
JSD1
SPKR1
B1
JBT1
JF1
SW1
COM1
COM2
PCH SLOT4 PCI-E 2.0 X4(IN X8)
DESIGNED IN USA
X10SLH-LN6TF
REV:1.01
USB0(3.0)
USB1(3.0)
USB12/13
USB8/9
CPU SLOT6 PCI-E 3.0 X8(IN X16)
I-SATA0I-SATA2
I-SATA1I-SATA3
I-SATA4
I-SATA5
VGA
LAN5/6 LAN3/4 LAN1/2
USB4/5 (2.0)
USB2/3(3.0)
JLED1:3 pin Power LED
IPMI LAN
JF1
NIC2
NIC1
ON
PWR
X
RST
OH/
FF
LED
LED
HDD
X
PWR
NMI
C226
X540 X540 X540
BMC
PLX
2-36
X10SLH-LN6TF User’s Manual
A
IPMI CODE
CA
BIOS
LICENSE
BAR CODE
MAC CODE
CA
A
C
AC
A
+
JLAN3 JLAN2 JLAN1
JP1000
JPW1
JPW2
JSTBY1
J4
LE6
DIMM1
DIMM2
DIMM4
DIMM3
FAN4
FAN3
FAN2 FAN1
FANA
JPME1
JI2C1
JPME2
JI2C2
JPUSB1
JPL1
JPL2
JPL3
JPG1
JBR1
JWD1
JLED1
LE5
LE4
LE1
LE3
J3
JL1
JLED_LAN4
JLED_LAN3
JLED_LAN6
JLED_LAN5
JPI2C1
JTPM1 T-SGPIO1
T-SGPIO2
JSD2
JSD1
SPKR1
B1
JBT1
JF1
SW1
COM1
COM2
PCH SLOT4 PCI-E 2.0 X4(IN X8)
DESIGNED IN USA
X10SLH-LN6TF
REV:1.01
USB0(3.0)
USB1(3.0)
USB12/13
USB8/9
CPU SLOT6 PCI-E 3.0 X8(IN X16)
I-SATA0I-SATA2
I-SATA1I-SATA3
I-SATA4
I-SATA5
VGA
LAN5/6 LAN3/4 LAN1/2
USB4/5 (2.0)
USB2/3(3.0)
JLED1:3 pin Power LED
IPMI LAN
JF1
NIC2
NIC1
ON
PWR
X
RST
OH/
FF
LED
LED
HDD
X
PWR
NMI
C226
X540 X540 X540
BMC
PLX
A. VGA Enable
B. BIOS Recovery
A
VGA Enable
Jumper JPG1 allows the user to enable
the onboard VGA connector. The default
setting is 1-2 to enable the connection.
See the table on the right for jumper
settings.
VGA Enable
Jumper Settings
Jumper Setting Denition
1-2 Enabled (Default)
2-3 Disabled
B
BIOS Recovery (JBR1)
Close pins 2 and 3 of jumper JBR1 for
BIOS recovery. The default setting is on
pins 1 and 2 for normal operation. See
the table on the right for jumper settings.
BIOS Recovery
Jumper Settings
Jumper Setting Denition
Pins 1-2 Normal
Pins 2-3 BIOS Recovery
Chapter 2: Installation
2-37
A
IPMI CODE
CA
BIOS
LICENSE
BAR CODE
MAC CODE
CA
A
C
AC
A
+
JLAN3 JLAN2 JLAN1
JP1000
JPW1
JPW2
JSTBY1
J4
LE6
DIMM1
DIMM2
DIMM4
DIMM3
FAN4
FAN3
FAN2 FAN1
FANA
JPME1
JI2C1
JPME2
JI2C2
JPUSB1
JPL1
JPL2
JPL3
JPG1
JBR1
JWD1
JLED1
LE5
LE4
LE1
LE3
J3
JL1
JLED_LAN4
JLED_LAN3
JLED_LAN6
JLED_LAN5
JPI2C1
JTPM1 T-SGPIO1
T-SGPIO2
JSD2
JSD1
SPKR1
B1
JBT1
JF1
SW1
COM1
COM2
PCH SLOT4 PCI-E 2.0 X4(IN X8)
DESIGNED IN USA
X10SLH-LN6TF
REV:1.01
USB0(3.0)
USB1(3.0)
USB12/13
USB8/9
CPU SLOT6 PCI-E 3.0 X8(IN X16)
I-SATA0I-SATA2
I-SATA1I-SATA3
I-SATA4
I-SATA5
VGA
LAN5/6 LAN3/4 LAN1/2
USB4/5 (2.0)
USB2/3(3.0)
JLED1:3 pin Power LED
IPMI LAN
JF1
NIC2
NIC1
ON
PWR
X
RST
OH/
FF
LED
LED
HDD
X
PWR
NMI
C226
X540 X540 X540
BMC
PLX
A. LAN Ports LEDs
B. IPMI_LAN LED
A
B
LAN Port LEDs
Six LAN ports (LAN1-LAN6) are
located on the I/O backplane of the
motherboard. Each Ethernet LAN port
has two LEDs. The yellow LED indi-
cates activity, while the Link LED may
be green, amber, or off to indicate the
speed of the connections. See the
tables at right for more information.
2-9 Onboard Indicators
Activity LED
B
Link LED
GLAN Ports 1/2 Link Indicator
LED Settings
LED Color Denition
Off No Connection or 100 Mbps
Amber 1 Gbps
Green 10 Gbps
GLAN 1/2 Activity Indicator
LED Settings
Color Status Denition
Yellow Flashing Active
A
IPMI_Dedicated LAN LEDs
An IPMI_Dedicated LAN is also located
on the I/O Backplane of the X10SLH-
LN6TF. The amber LED on the right in-
dicates connection and activity, while
the green LED on the left indicates the
speed of the connection. See the tabls
on the right.
IPMI LAN
IPMI LAN Link Speed LED (Left) &
Connection Activity LED (Right)
LED Color/State Denition
Off Off No Connection
Activity Yellow: Blinking Active
Speed Orange 1 Gbps
Speed Green 100 Mbps
Activity LEDLink LED
LAN Ports
2-38
X10SLH-LN6TF User’s Manual
A
IPMI CODE
CA
BIOS
LICENSE
BAR CODE
MAC CODE
CA
A
C
AC
A
+
JLAN3 JLAN2 JLAN1
JP1000
JPW1
JPW2
JSTBY1
J4
LE6
DIMM1
DIMM2
DIMM4
DIMM3
FAN4
FAN3
FAN2 FAN1
FANA
JPME1
JI2C1
JPME2
JI2C2
JPUSB1
JPL1
JPL2
JPL3
JPG1
JBR1
JWD1
JLED1
LE5
LE4
LE1
LE3
J3
JL1
JLED_LAN4
JLED_LAN3
JLED_LAN6
JLED_LAN5
JPI2C1
JTPM1 T-SGPIO1
T-SGPIO2
JSD2
JSD1
SPKR1
B1
JBT1
JF1
SW1
COM1
COM2
PCH SLOT4 PCI-E 2.0 X4(IN X8)
DESIGNED IN USA
X10SLH-LN6TF
REV:1.01
USB0(3.0)
USB1(3.0)
USB12/13
USB8/9
CPU SLOT6 PCI-E 3.0 X8(IN X16)
I-SATA0I-SATA2
I-SATA1I-SATA3
I-SATA4
I-SATA5
VGA
LAN5/6 LAN3/4 LAN1/2
USB4/5 (2.0)
USB2/3(3.0)
JLED1:3 pin Power LED
IPMI LAN
JF1
NIC2
NIC1
ON
PWR
X
RST
OH/
FF
LED
LED
HDD
X
PWR
NMI
C226
X540 X540 X540
BMC
PLX
Onboard PWR LED Indicator
LED Status
Status Denition
Off System Off
On System on, or
System off and PWR
Cable Connected
Onboard Power LED (LE3)
An onboard Power LED is located at LE3
on the motherboard. When LE3 is on, the
AC power cable is connected. Make sure
to disconnect the power cable before re-
moving or installing any component. See
the layout below for the LED location.
A. Onboard PWR LED
B. BMC LED
A
BMC Heartbeat LED
A BMC Heartbeat LED is located at LE5
on the motherboard. When LE5 is blink-
ing, BMC functions normally. See the
table on the right for more information.
BMC Heartbeat LED
Status
Color/State Denition
Green:
Blinking
BMC: Normal
B
Chapter 2: Installation
2-39
A
IPMI CODE
CA
BIOS
LICENSE
BAR CODE
MAC CODE
CA
A
C
AC
A
+
JLAN3 JLAN2 JLAN1
JP1000
JPW1
JPW2
JSTBY1
J4
LE6
DIMM1
DIMM2
DIMM4
DIMM3
FAN4
FAN3
FAN2 FAN1
FANA
JPME1
JI2C1
JPME2
JI2C2
JPUSB1
JPL1
JPL2
JPL3
JPG1
JBR1
JWD1
JLED1
LE5
LE4
LE1
LE3
J3
JL1
JLED_LAN4
JLED_LAN3
JLED_LAN6
JLED_LAN5
JPI2C1
JTPM1 T-SGPIO1
T-SGPIO2
JSD2
JSD1
SPKR1
B1
JBT1
JF1
SW1
COM1
COM2
PCH SLOT4 PCI-E 2.0 X4(IN X8)
DESIGNED IN USA
X10SLH-LN6TF
REV:1.01
USB0(3.0)
USB1(3.0)
USB12/13
USB8/9
CPU SLOT6 PCI-E 3.0 X8(IN X16)
I-SATA0I-SATA2
I-SATA1I-SATA3
I-SATA4
I-SATA5
VGA
LAN5/6 LAN3/4 LAN1/2
USB4/5 (2.0)
USB2/3(3.0)
JLED1:3 pin Power LED
IPMI LAN
JF1
NIC2
NIC1
ON
PWR
X
RST
OH/
FF
LED
LED
HDD
X
PWR
NMI
C226
X540 X540 X540
BMC
PLX
A. UID Identier
A
UID LED Status
Color/State OS Status
Blue: On Windows OS Unit Identied
Unit Identication LED (LE4)
A rear UID LED indicator (LE4) is located
next to the I/O backplane. This UID indicator
provides easy identication of a system unit
that may be in need of service.
Note: UID can also be triggered via
IPMI on the motherboard. For more
information on IPMI, please refer to
the IPMI User's Guide posted on
our website @ http://www.super-
micro.com.
2-40
X10SLH-LN6TF User’s Manual
A
IPMI CODE
CA
BIOS
LICENSE
BAR CODE
MAC CODE
CA
A
C
AC
A
+
JLAN3 JLAN2 JLAN1
JP1000
JPW1
JPW2
JSTBY1
J4
LE6
DIMM1
DIMM2
DIMM4
DIMM3
FAN4
FAN3
FAN2 FAN1
FANA
JPME1
JI2C1
JPME2
JI2C2
JPUSB1
JPL1
JPL2
JPL3
JPG1
JBR1
JWD1
JLED1
LE5
LE4
LE1
LE3
J3
JL1
JLED_LAN4
JLED_LAN3
JLED_LAN6
JLED_LAN5
JPI2C1
JTPM1 T-SGPIO1
T-SGPIO2
JSD2
JSD1
SPKR1
B1
JBT1
JF1
SW1
COM1
COM2
PCH SLOT4 PCI-E 2.0 X4(IN X8)
DESIGNED IN USA
X10SLH-LN6TF
REV:1.01
USB0(3.0)
USB1(3.0)
USB12/13
USB8/9
CPU SLOT6 PCI-E 3.0 X8(IN X16)
I-SATA0I-SATA2
I-SATA1I-SATA3
I-SATA4
I-SATA5
VGA
LAN5/6 LAN3/4 LAN1/2
USB4/5 (2.0)
USB2/3(3.0)
JLED1:3 pin Power LED
IPMI LAN
JF1
NIC2
NIC1
ON
PWR
X
RST
OH/
FF
LED
LED
HDD
X
PWR
NMI
C226
X540 X540 X540
BMC
PLX
2-10 SATA Connections
SATA 3.0 Connections
Six Serial ATA (SATA) 3.0 connectors (I-SATA0-5) are located on the X10SLH-
LN6TF. These SATA 3.0 ports are supported by the Intel® C226 PCH chip. The SATA
3.0 ports support RAID 0, 1, 10, and 5; while the SATA 2.0 ports support RAID 0
and 1. These Serial Link connections provide faster data transmission than legacy
Parallel ATA. See the table on the right for pin denitions.
SATA 2.0/3.0 Connectors
Pin Denitions
Pin# Signal
1 Ground
2 SATA_TXP
3 SATA_TXN
4 Ground
5 SATA_RXN
6 SATA_RXP
7 Ground
A. I-SATA 3.0 #0
B. I-SATA 3.0 #1
C. I-SATA 3.0 #2
D. I-SATA 3.0 #3
E. I-SATA 3.0 #4
F. I-SATA 3.0 #5
X10SLH-LN6TF SATA Connector
Types
Port# Connection Type
I-SATA 0-5 SATA 3.0/6 Gb/s
RAID 0, 1, 10, 5
Supported by Intel C226 PCH-Exp.
D
E
F
C
A
B
3-1
Chapter 3: Troubleshooting
Chapter 3
Troubleshooting
3-1 Troubleshooting Procedures
Use the following procedures to troubleshoot your system. If you have followed all
of the procedures below and still need assistance, refer to the ‘Technical Support
Procedures’ and/or ‘Returning Merchandise for Service’ section(s) in this chapter.
Always disconnect the AC power cord before adding, changing or installing any
hardware components.
Before Power On
1. Make sure that the Onboard Power LED is not on. (Note: If it is on, the
onboard power is on. Be sure to unplug the power cable before installing or
removing the components.)
2. Make sure that there are no short circuits between the motherboard and
chassis.
3. Disconnect all ribbon/wire cables from the motherboard, including those for
the keyboard and mouse. Also, be sure to remove all add-on cards.
4. Install a CPU and heatsink (be sure that it is fully seated) and then connect
the chassis speaker and the power LED to the motherboard. Check all jumper
settings as well.
No Power
1. Make sure that there are no short circuits between the motherboard and
chassis.
2. Make sure that all jumpers are set to their default positions.
3. Check if the 115V/230V switch on the power supply is properly set.
4. Turn the power switch on and off to test the system.
5. The battery on your motherboard may be old. Check to make sure that it still
supplies ~3VDC. If it does not, replace it with a new one.
3-2
X10SLH-LN6TF User’s Manual
No Video
1. If the power is on, but you have no video--in this case, you will need to re-
move all the add-on cards and cables rst.
2. Use the speaker to determine if any beep codes exist. (Refer to Appendix A
for details on beep codes.)
3. Remove all memory modules and turn on the system. (If the alarm is on,
check the specications of memory modules, reset the memory or try a differ-
ent one.)
Memory Errors
1. Make sure that the DIMM modules are properly installed and fully seated in
the slots.
2. You should be using unbuffered ECC DDR3 (1.5V) 1600/1333 MHz memory
recommended by the manufacturer. Also, it is recommended that you use the
memory modules of the same type and speed for all DIMMs in the system.
Do not use memory modules of different sizes, different speeds and different
types on the same motherboard.
3. Check for bad DIMM modules or slots by swapping modules between slots to
see if you can locate the faulty ones.
4. Check the switch of 115V/230V power supply.
Losing the System’s Setup Conguration
1. Please be sure to use a high quality power supply. A poor quality power sup-
ply may cause the system to lose CMOS setup information. Refer to Section
1-6 for details on recommended power supplies.
2. The battery on your motherboard may be old. Check to verify that it still sup-
plies ~3VDC. If it does not, replace it with a new one.
3. If the above steps do not x the Setup Conguration problem, contact your
vendor for repairs.
3-3
Chapter 3: Troubleshooting
3-2 Technical Support Procedures
Before contacting Technical Support, please make sure that you have followed all
the steps listed below. Also, Note that as a motherboard manufacturer, Supermicro
does not sell directly to end users, so it is best to rst check with your distributor or
reseller for troubleshooting services. They should know of any possible problem(s)
with the specic system conguration that was sold to you.
1. Please go through the ‘Troubleshooting Procedures’ and 'Frequently Asked
Question' (FAQ) sections in this chapter or see the FAQs on our website
(http://www.supermicro.com/support/faqs/) before contacting Technical Sup-
port.
2. BIOS upgrades can be downloaded from our website at (http://www.supermi-
cro.com/support/bios/).
Note: Not all BIOS can be ashed. Some cannot be ashed; it depends
on the boot block code of the BIOS.
3. If you've followed the instructions above to troubleshoot your system, and still
cannot resolve the problem, then contact Supermicro's technical support and
provide them with the following information:
• Motherboard model and PCB revision number
• BIOS release date/version (this can be seen on the initial display when your
system rst boots up)
•System conguration
•An example of a Technical Support form is on our website at (http://www.su-
permicro.com/support/contact.cfm).
4. Distributors: For immediate assistance, please have your account number
ready when placing a call to our technical support department. We can be
reached by e-mail at support@supermicro.com, by phone at: (408) 503-
8000, option 2, or by fax at (408)503-8019.
3-4
X10SLH-LN6TF User’s Manual
3-3 Frequently Asked Questions
Question: What type of memory does my motherboard support?
Answer: The X10SLH-LN6TF supports up to 32GB of unbuffered ECC DDR3
1600/1333 MHz (1.5V/1.35V) memory modules. See Section 2-5 for details on
installing memory.
Question: How do I update my BIOS?
Answer: We do NOT recommend that you upgrade your BIOS if you are not
experiencing any problems with your system. Updated BIOS les are located on
our website at http://www.supermicro.com/support/bios/. Please check our BIOS
warning message and the information on how to update your BIOS on our web
site. Select your motherboard model and download the BIOS ROM le to your
computer. Also, check the current BIOS revision to make sure that it is newer than
your BIOS before downloading. You may choose the zip le or the .exe le. If you
choose the zipped BIOS le, please unzip the BIOS le onto a bootable device or
a USB pen/thumb drive. To ash the BIOS, run the batch le named "ami.bat" with
the new BIOS ROM le from your bootable device or USB pen/thumb drive. Use
the following format:
F:\> ami.bat BIOS-ROM-lename.xxx <Enter>
Note: Always use thele named “ami.bat” to update the BIOS, and insert
a space between "ami.bat" and the lename. The BIOS-ROM-lename
will bear the motherboard name (i.e., X10SLH-LN6TF) and build version
as the extension. For example, "X10SLH-LN6TF.115". When completed,
your system will automatically reboot.
If you choose the .exe le, please run the .exe le under Windows to create
the BIOS ash oppy disk. Insert the oppy disk into the system you wish
to ash the BIOS. Then, boot the system to the oppy disk. The BIOS util-
ity will automatically ash the BIOS without any prompts. Please note that
this process may take a few minutes to complete. Do not be concerned if
the screen is paused for a few minutes.
When the BIOS ashing screen is completed, the system will reboot and
will show “Press F1 or F2”. At this point, you will need to load the BIOS
defaults. Press <F1> to go to the BIOS setup screen, and press <F9> to
load the default settings. Next, press <F10> to save and exit. The system
will then reboot.
Warning: Do not shut down or reset the system while updating the BIOS to prevent
possible system boot failure!
3-5
Chapter 3: Troubleshooting
Important: The SPI BIOS chip installed on this motherboard is not re-
movable. To repair or replace a damaged BIOS chip, please send your
motherboard to RMA at Supermicro for service.
Question: I think my BIOS is corrupted. How can I recover my BIOS?
Answer: Please see Appendix C - BIOS Recovery for detailed instructions.
Question: Why do I get an error message “IASTOR.SYS read error” and "press F6
to install Intel RAID driver" when installing Windows on my motherboard?
Answer: To solve this issue, disable the IPMI jumper. Another solution is to use a
USB oppy drive instead of the onboard oppy drive. For the IPMI jumper location,
please check Chapter 1.
Question: What is the heatsink part number for my X10SLH-LN6TF motherboard?
Answer: For the 1U passive heatsink, ask for SNK-P0046P (back plate is included).
For the 2U active heatsink, use SNK-P0046A4.
Question: Why can't I recover the BIOS even when I’ve followed the instructions
in the user’s manual for the motherboard?
Answer: Please disable the IPMI jumper and try it again. For the jumper location,
please check Chapter 1.
3-4 Battery Removal and Installation
Battery Removal
To remove the onboard battery, follow the steps below:
1. Power off your system and unplug your power cable.
2. Locate the onboard battery as shown below.
3. Using a tool such as a pen or a small screwdriver, push the battery lock out-
wards to unlock it. Once unlocked, the battery will pop out from the holder.
4. Remove the battery.
3-6
X10SLH-LN6TF User’s Manual
3-5 Returning Merchandise for Service
A receipt or copy of your invoice marked with the date of purchase is required
before any warranty service will be rendered. You can obtain service by calling
your vendor for a Returned Merchandise Authorization (RMA) number. For faster
service, you may also obtain RMA authorizations online (http://www.supermicro.
com/RmaForm/). When you return the motherboard to the manufacturer, the RMA
number should be prominently displayed on the outside of the shipping carton, and
mailed prepaid or hand-carried. Shipping and handling charges will be applied for
all orders that must be mailed when service is complete.
This warranty only covers normal consumer use and does not cover damages
incurred in shipping or from failure due to the alteration, misuse, abuse or improper
maintenance of products.
During the warranty period, contact your distributor rst for any product problems.
Proper Battery Disposal
Warning: Please handle used batteries carefully. Do not damage the battery in any
way; a damaged battery may release hazardous materials into the environment. Do
not discard a used battery in the garbage or a public landll. Please comply with the
regulations set up by your local hazardous waste management agency to dispose of
your used battery properly.
Battery Installation
1. To install an onboard battery, follow the steps 1 & 2 above and continue
below:
2. Identify the battery's polarity. The positive (+) side should be facing up.
3. Insert the battery into the battery holder and push it down until you hear a
click to ensure that the battery is securely locked.
Warning: When replacing a battery, be sure to only replace it with the same type.
OR
Chapter 4: AMI BIOS
4-1
Chapter 4
BIOS
4-1 Introduction
This chapter describes the AMI BIOS Setup Utility for the X10SLH-LN6TF. The
ROM BIOS is stored in a Flash EEPROM and can be easily updated. This chapter
describes the basic navigation of the AMI BIOS Setup Utility setup screens.
Note: For AMI BIOS Recovery, please refer to the UEFI BIOS Recovery
Instructions in Appendix C.
Starting BIOS Setup Utility
To enter the AMI BIOS Setup Utility screens, press the <Delete> key while the
system is booting up.
Note: In most cases, the <Delete> key is used to invoke the AMI BIOS
setup screen. There are a few cases when other keys are used, such as
<F1>, <F2>, etc.
Each main BIOS menu option is described in this manual. The Main BIOS setup
menu screen has two main frames. The left frame displays all the options that can
be congured. Grayed-out options cannot be congured. Options in blue can be
congured by the user. The right frame displays the key legend. Above the key
legend is an area reserved for a text message. When an option is selected in the
left frame, it is highlighted in white. Often a text message will accompany it. (Note:
the AMI BIOS has default text messages built in. Supermicro retains the option to
include, omit, or change any of these text messages.)
The AMI BIOS Setup Utility uses a key-based navigation system called "hot keys".
Most of the AMI BIOS setup utility "hot keys" can be used at any time during the
setup navigation process. These keys include <F1>, <F10>, <Enter>, <ESC>, ar-
row keys, etc.
Note: Options printed in Bold are default settings.
How To Change the Conguration Data
The conguration data that determines the system parameters may be changed by
entering the AMI BIOS Setup utility. This Setup utility can be accessed by pressing
<Del> at the appropriate time during system boot.
4-2
X10SLH-LN6TF User’s Manual
How to Start the Setup Utility
Normally, the only visible Power-On Self-Test (POST) routine is the memory test.
As the memory is being tested, press the <Delete> key to enter the main menu of
the AMI BIOS Setup Utility. From the main menu, you can access the other setup
screens. An AMI BIOS identication string is displayed at the left bottom corner of
the screen, below the copyright message.
Warning: Do not upgrade the BIOS unless your system has a BIOS-related issue.
Flashing the wrong BIOS can cause irreparable damage to the system. In no event
shall Supermicro be liable for direct, indirect, special, incidental, or consequential dam-
ages arising from a BIOS update. If you have to update the BIOS, do not shut down
or reset the system while the BIOS is updating. This is to avoid possible boot failure.
4-2 Main Setup
When you rst enter the AMI BIOS Setup Utility, you will enter the Main setup screen.
You can always return to the Main setup screen by selecting the Main tab on the
top of the screen. The Main BIOS Setup screen is shown below.
Chapter 4: AMI BIOS
4-3
The following Main menu items will be displayed:
System Time/System Date
Use this option to change the system time and date. Highlight System Time or
System Date using the arrow keys. Enter new values through the keyboard. Press
the <Tab> key or the arrow keys to move between elds. The date must be entered
in Day MM/DD/YY format. The time is entered in HH:MM:SS format.
Note: The time is in the 24-hour format. For example, 5:30 P.M. appears
as 17:30:00.
The following BIOS items will also be displayed:
Supermicro X10SLH-LN6TF
Version
Build Date
Memory Information
Total Memory
4-4
X10SLH-LN6TF User’s Manual
4-3 Advanced Setup Congurations
Use the arrow keys to select Boot Setup and press <Enter> to access the submenu
items:
Warning: Take Caution when changing the Advanced settings. An incorrect value, a
very high DRAM frequency or an incorrect DRAM timing setting may cause system
to become unstable. When this occurs, revert to the setting to its manufacture default
setting.
Boot Feature
Quiet Boot
This feature selects the screen display between POST messages or the OEM
logo at bootup. Select Disabled to display the POST messages. Select Enabled
to display the OEM logo instead of the normal POST messages. The options are
Enabled and Disabled.
AddOn ROM Display Mode
This feature sets the display mode for the Option ROM. Select Keep Current to
use the current AddOn ROM display setting. Select Force BIOS to use the Option
ROM display mode set by the system BIOS. The options are Force BIOS and
Keep Current.
Chapter 4: AMI BIOS
4-5
Bootup Num-Lock
This feature selects the Power-on state for the Numlock key. The options are Off
and On.
Wait For 'F1' If Error
This feature forces the system to wait until the 'F1' key is pressed if an error oc-
curs. The options are Disabled and Enabled.
Interrupt 19 Capture
Interrupt 19 is the software interrupt that handles the boot disk function. When this
item is set to Enabled, the ROM BIOS of the host adaptors will "capture" Interrupt
19 at bootup and allow the drives that are attached to these host adaptors to func-
tion as bootable disks. If this item is set to Disabled, the ROM BIOS of the host
adaptors will not capture Interrupt 19, and the drives attached to these adaptors
will not function as bootable devices. The options are Postponed and Immediate.
Re-try Boot
If this item is enabled, the BIOS will automatically reboot the system from a speci-
ed boot device after its initial boot failure. The options are Disabled, Legacy
Boot, and EFI Boot.
Power Conguration
Watch Dog Function
If enabled, the Watch Dog Timer will allow the system to reboot when it is inactive
for more than 5 minutes. The options are Enabled and Disabled.
Power Button Function
This feature controls how the system shuts down when the power button is pressed.
Select 4_Seconds_Override for the user to power off the system after pressing and
holding the power button for 4 seconds or longer. Select Instant Off to instantly
power off the system as soon as the user presses the power button. The options
are 4 Second Override and Instant Off.
Restore on AC Power Loss
Use this feature to set the power state after a power outage. Select Power-Off for
the system power to remain off after a power loss. Select Power-On for the system
power to be turned on after a power loss. Select Last State to allow the system
to resume its last power state before a power loss. The options are Power-On,
Stay-Off and Last State.
4-6
X10SLH-LN6TF User’s Manual
CPU Conguration
The following CPU information will be displayed:
•Type of CPU
•CPU Signature
•CPU Stepping
•Processor Family
•Microcode Patch
•Maximum CPU Speed
•Minimum CPU Speed
•CPU Speed
•Processor Cores
•Intel® HT(Hyper-Threading) Technology
•Intel® VT-x (Virtualization) Technology
•Intel® SMX (Safer Mode Extensions) Technology
•64-bit
•EIST (Enhanceed Intel SpeedstepTechnology) Technology
•CPU C3 State
•CPU C6 State
•CPU C7 State
•L1 Data Cache
•L1 Code Cache
•L2 Cache
•L3 Cache
Chapter 4: AMI BIOS
4-7
Clock Spread Spectrum
If this feature is set to Enabled, the BIOS will monitor the level of Electromagnetic
Interference caused by the components and will attempt to reduce the interference
whenever needed. The options are Enabled and Disabled.
Hyper-threading
Select Enabled to support Intel Hyper-threading Technology to enhance CPU per-
formance. The options are Enabled and Disabled.
Active Processor Cores
This feature determines how many CPU cores will be activated for each CPU. When
all is selected, all cores in the CPU will be activated. (Please refer to Intel's web
site for more information.) The options are All, 1, 2, and 3.
Limit CPUID Maximum
Select Enabled to set the maximum CPU ID value and to boot the legacy operat-
ing systems that cannot support processors with extended CPUID functions. The
options are Enabled and Disabled (for the Windows OS).
Execute-Disable Bit (Available if supported by the OS & the CPU)
Set to Enabled to enable the Execute Disable Bit which will allow the processor
to designate areas in the system memory where an application code can execute
and where it cannot, thus preventing a worm or a virus from ooding illegal codes
to overwhelm the processor or damage the system during an attack. The default is
Enabled. (Refer to Intel and Microsoft Web Sites for more information.)
Intel® Virtualization Technology (Available when supported by the CPU)
Select Enabled to use the Intel Virtualization Technology to allow one platform to
run multiple operating systems and applications in independent partitions, creat-
ing multiple "virtual" systems in one physical computer. The options are Enabled
and Disabled.
Hardware Prefetcher (Available when supported by the CPU)
If set to Enabled, the hardware prefetcher will prefetch streams of data and instruc-
tions from the main memory to the L2 cache to improve CPU performance. The
options are Disabled and Enabled.
Adjacent Cache Line Prefetch (Available when supported by the CPU)
Select Enabled for the CPU to prefetch both cache lines for 128 bytes as comprised.
Select Disabled for the CPU to prefetch both cache lines for 64 bytes. The options
are Disabled and Enabled.
4-8
X10SLH-LN6TF User’s Manual
Note: If there is any change to this setting, you will need to power off and
restart the system for the change to take effect. Please refer to Intel’s
website for detailed information.
CPU AES
Select Enable to enable Intel CPU Advanced Encryption Standard (AES) Instruc-
tions for CPU to enhance data integrity. The options are Enabled and Disabled.
Boot Perfomrance Mode
Use this feature to select the performance state that the BIOS will set before OS
handoff. The options are Max Non-Turbo Performance and Turbo Perfromance.
EIST
EIST (Enhanced Intel SpeedStep Technology) allows the system to automatically
adjust processor voltage and core frequency in an effort to reduce power consump-
tion and heat dissipation. Please refer to Intel’s web site for detailed information.
The options are Disabled and Enabled.
Turbo Mode
This feature allows processor cores to run faster than the frequency recommended
by the manufacturer. The options are Disabled and Enabled. If this feature is set
to Enabled, the following items will display:
CPU Power Limit1 (Available when "Turbo Mode" is set to Enabled)
Use this feature to set the power limit for CPU1. Press "+" or "-" on your keyboard
to change this value. Enter 0 to use the manufacture default setting.
CPU Power Limit1 Time (Available when "Turbo Mode" is set to Enabled)
This item allows the user to determine how long CPU1 should operate at the
power limit set by the user for the item above. Press "+" or "-" on your keyboard
to change this value. Enter 0 to use the manufacture default setting.
CPU Power Limit2 (Available when "Turbo Mode" is set to Enabled)
Use this feature to set the power limit for CPU2. Press "+" or "-" on your keyboard
to change this value. Enter 0 to use the manufacture default setting.
Platform Power Limit Lock
If set to Enabled, the Platform Power Limit MSR will be locked and a reset will
be required to unlock the register. The options are Disabled and Enabled.
CPU Power Limit3 (Available when "Turbo Mode" is set to Enabled)
Use this feature to set the power limit for the CPU. Press "+" or "-" on your
keyboard to change this value. Enter 0 to use the manufacture default setting.
Chapter 4: AMI BIOS
4-9
CPU Power Limit3 Time (Available when "Turbo Mode" is set to Enabled)
This item allows the user to determine how long the CPU should operate at the
power limit set by the user for the item above. Press "+" or "-" on your keyboard
to change this value. Enter 0 to use the manufacture default setting.
CPU Power Limit3 Duty Cycle (Available when "Turbo Mode" is set to
Enabled)
Use this feature to specify the duty cycle that the CPU is required to maintain
over the congured Power Limit3 time windows. Press "+" or "-" on your keyboard
to change this value. Enter 0 to use the manufacture default setting.
DDR Power Limit1 (Available when "Turbo Mode" is set to Enabled)
Use this feature to set the power limit for DDR1. Press "+" or "-" on your keyboard
to change this value. Enter 0 to use the manufacture default setting.
DDR Power Limit1 Time (Available when "Turbo Mode" is set to Enabled)
This item allows the user to determine how long DDR1 should operate at the
power limit set by the item above. Press "+" or "-" on your keyboard to change
this value. Enter 0 to use the manufacture default setting.
DDR Power Limit2 (Available when "Turbo Mode" is set to Enabled)
Use this feature to set the power limit for DDR2. Press "+" or "-" on your keyboard
to change this value. Enter 0 to use the manufacture default setting.
1-Core Ratio Limit (Available when "Turbo Mode" is set to Enabled)
This increases (multiplies) 1 clock speed in the CPU core in relation to the bus
speed when one CPU core is active. Press "+" or "-" on your keyboard to change
this value. Enter 0 to use the manufacture default setting.
2-Core Ratio Limit (Available when "Turbo Mode" is set to Enabled)
This increases (multiplies) 2 clock speeds in the CPU core in relation to the bus
speed when two CPU cores are active. Press "+" or "-" on your keyboard to
change this value. Enter 0 to use the manufacture default setting.
3-Core Ratio Limit (Available when "Turbo Mode" is set to Enabled)
This increases (multiplies) 3 clock speeds in the CPU core in relation to the bus
speed when three CPU cores are active. Press "+" or "-" on your keyboard to
change this value Enter 0 to use the manufacture default setting.
4-Core Ratio Limit (Available when "Turbo Mode" is set to Enabled)
This increases (multiplies) 4 clock speeds in the CPU core in relation to the bus
speed when four CPU cores are active. Press "+" or "-" on your keyboard to
change this value Enter 0 to use the manufacture default setting.
4-10
X10SLH-LN6TF User’s Manual
Energy Performance
Use this feature to select an appropriate fan setting to achieve the maximum system
performance (with maximum cooling) or maximum energy efciency (with maximum
power saving). The fan speeds are controlled by the rmware management via IPMI
2.0. The options are Performance, Balanced Performance, Balanced Energy, and
Energy Efcient.
VR Current Value
Use this feature to set the limit on the current voltage regulator. Press "+" or "-" on
your keyboard to change this value. Enter 0 to use the manufacture default setting.
CPU C States
C-States architecture, a processor power management platform developed by
Intel, can further reduce power consumption from the basic C1 (Halt State) state
that blocks clock cycles to the CPU. Select Enabled for CPU C-Sates support. The
options are Enabled and Disabled. If this feature is set to Enabled, the following
items will display:
Enhanced C1 State (Available when "CPU C-States" is set to Enabled)
Select Enabled to enable Enhanced C1 Power State to boost system perfor-
mance. The options are Enabled and Disabled.
CPU C3 Report (Available when "CPU C-States" is set to Enabled)
Select Enabled to allow the BIOS to report the CPU C3 State (ACPI C2) to the
operating system. During the CPU C3 State, the CPU clock generator is turned
off. The options are Enabled and Disabled.
CPU C6 Report (Available when "CPU C-States" is set to Enabled)
Select Enabled to allow the BIOS to report the CPU C6 State (ACPI C3) to the
operating system. During the CPU C6 State, the power to all caches is turned
off. The options are Enabled and Disabled.
C6 Latency (Available when "CPU C-States" is set to Enabled)
Select Short to set a short delay time(period) during which the BIOS reports
CPU C6 State (ACPI C3) to the operating system. Select Long to set a long
delay time(period) during which the BIOS reports CPU C6 State (ACPI C3)
to the operating system. The options are Short and Long.
CPU C7 Report (Available when "CPU C-States" is set to Enabled
Select Enabled to allow the BIOS to report the CPU C7 State (ACPI C3) to the
operating system. CPU C7 State is a processor-specic low C-State. The options
are Enabled and Disabled.
Chapter 4: AMI BIOS
4-11
C7 Latency (Available when "CPU C-States" is set to Enabled)
Select Short to set a short delay time(period) during which the BIOS reports
CPU C7 State (ACPI C3) to the operating system. Select Long to set a long
delay time(period) during which the BIOS reports CPU C7 State (ACPI C3)
to the operating system. The options are Short and Long.
C1 State Auto Demotion
When this item is enabled, the CPU will conditionally demote C3, C6 or C7
requests to C1 based on un-cored auto-demote information. The options are
Disabled and Enabled.
C3 State Auto Demotion
When this item is enabled, the CPU will conditionally demote C6 or C7 requests
to C3 based on un-cored auto-demote information. The options are Disabled
and Enabled.
C State Pre-Wake
Select Enabled to support C State Pre-Wake State features. The options are
Enabled and Disabled
Package C-State limit
Select Auto for the AMI BIOS to automatically set the limit on the C-State package
register. The options are C0/C1, C2, C3, C6, C7, C7S, and Auto.
LakeTiny Feature
Select Enabled for LakeTing feature support. The options are Disabled and En-
abled.
ACPI T State
Select Enabled for ACPI T state (processor throttling) feature support. The options
are Disabled and Enabled.
Chipset Conguration
Warning: Setting the wrong values in the following sections may cause the system
to malfunction.
System Agent (SA) Conguration
This item displays the information for the system Agent.
•System Agent Bridge Name
•VT-d Capability
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X10SLH-LN6TF User’s Manual
VT-d
Select Enabled to enable Intel's Virtualization Technology support for Direct I/O VT-d
by reporting the I/O device assignments to VMM through the DMAR ACPI Tables.
This feature offers fully-protected I/O resource-sharing across the Intel platforms,
providing the user with greater reliability, security and availability in networking and
data-sharing. The settings are Enabled and Disabled.
Graphics Conguration
This item displays the information the system Bridge.
Internal Graphics
Select Auto to keep Internal Graphics Device (IGD) enabled. The options are
Auto, Disabled, and Enabled.
Aperture Size for Haswell
Use this feature to select the graphics aperture size. The options are 128MB,
256MB, and 512MB.
DVMT Pre-Allocated For Haswell
Use this feature to select the DVMT 5.0 pre-allocated graphics memory size used
by the Internal Graphics Device. The options are 32M, 64M, 96M, 128M, 160M,
192M, 224M, 256M, 288M, 320M, 352M, 384M, 416M, 448M, 480M, and 512M.
DVMT Total Gfx Mem
Use this feature to select the DVMT 5.0 total graphic memory size used by the
Internal Graphics Device. The options are 128M, 256M, and MAX.
PCI-E Conguration
This item displays the information of the (graphics) device installed on a PCI-E
slot:
•PEG0
•PEG1
•PEG2
Chapter 4: AMI BIOS
4-13
Run-time C7 Allowed
Select Enabled for Run-time C7 support, which will allow the CPU to enter the
deep sleep state while the system is in operation to reduce power consumption.
(Note: Please be sure to restore the default settings and save appropriate end-
point settings for all components associated with this feature before you enable
it.) The options are Enabled and Disabled.
Detect Non-Compliance Device
This feature detects non-compliance PCI-Express devices. The options are
Enabled and Disabled.
Program PCI-E ASPM After OpROM
PCI-E ASPM, Active State Power Management, is a power management pro-
tocol used to manage power consumption of serial-link devices installed on
PCI-Exp slots during a prolonged off-peak time. If this item is set to Enabled,
PCI-E ASPM will be programmed after the OpROM. If this item is set Disabled,
the PCI-E ASPM will be programmed before OpROM. The options are Enabled
and Disabled.
CPU SLOT6 PCI-E 3.0 X8 (IN X16) - ASPM
Use this feature to control the Active State Power Management support for the
PEG device. The options are Disabled, Auto, ASPM L0s, ASPM L1, and ASPM
L0sL1.
DMI Link ASPM Control
Use this feature to enable or disable the control of the Active State Power
Management on the SA side of the DMI Link. The options are Disabled, L0s,
L1, and L0sL1.
PCH DMI Link ASPM Control
Use this feature to control the Active State Power Management on both NB side
and SB side of the DMI Link. The options are Disabled and Enabled.
PCH SLOT4 PCI-E 2.0 X4 (IN X8) - ASPM
Use this feature to set the Active State Power Management level. The options
are Disabled, L0s, L1, L0sL1, and Auto.
Memory Conguration
This item displays the information on the memory modules installed on the
motherboard:
•Memory RC Version
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X10SLH-LN6TF User’s Manual
•Memory Frequency
•Total Memory
•Memory Voltage
•DIMM A1
•DIMM A2
•DIMM B1
•DIMM B2
•CAS Latency (tCL)
•Minimum Delay Time
•CAS to RAS (tRCDmin)
•Row Precharge (tRPmin)
•Active to Precharege (tRASmin)
Memory Frequency Limiter
This feature sets the limit of memory frequency for DIMM modules installed on
the the motherboard. The options are 1067 (MHz), 1333 (MHz), 1600 (MHz),
and Auto.
Max TOLUD (Top of Low Usable DRAM)
This feature sets the maximum TOLUD value, which species the "Top of Low
Usable DRAM" memory space to be used by internal graphics devices, GTT
Stolen Memory, and TSEG, respectively, if these devices are enabled. The op-
tions are Enabled and Dynamic, 1 GB, 1.25 GB, 1.5 GB, 1.75 GB,. 2 GB, 2.25
GB, 2.5 GB, 2.75 GB, 3 GB and 3.25 GB.
Note: TSEG is a block of memory that is only accessible by the processor
while operating in SMM mode.
Memory Scrambler
This feature enables or disables memory scrambler support for memory error
correction. The settings are Enabled and Disabled.
Chapter 4: AMI BIOS
4-15
Thermal Throttling
This feature selects from the different throttling methods. The options are Dis-
abled and CLTM.
Memory Refresh Rate
Use this item to select the memory refresh rate. The memory refresh rate is
2X for warm and hot conditions and 1X for normal conditions. The options are
Always 1X and Auto.
PCH-IO Conguration
This item displays the information for PCH-IO Chip.
•Intel® PCH Rev ID
•USB Conguration
•USB Devices
EHCI1
Select Enabled to enable EHCI (Enhanced Host Controller Interface) Controller 1
for USB 2.0 support. One EHCI controller must always be enabled. The settings
are Enabled and Disabled.
EHCI2
Select Enabled to enable EHCI (Enhanced Host Controller Interface) Controller 2
for USB 2.0 support. One EHCI controller must always be enabled. The settings
are Enabled and Disabled..
Legacy USB Support
This feature enables support for legacy USB devices. Select Auto to disable
legacy support if USB devices are not present. Select Disable to have USB
devices available only for EFI applications. The options are Enabled, Disabled
and Auto.
Port 60/64 Emulation
This feature enables or disables I/O port 60h/64h emulation support. This should
be enabled for complete USB keyboard legacy support for non-USB-aware Op-
erating Systems. The options are Disabled and Enabled.
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X10SLH-LN6TF User’s Manual
XHCI Hand-Off
This item is a work-around for Operating Systems that do not have XHCI (Ex-
tensible Host Controller Interface) hand-off support. The XHCI ownership change
should be claimed by the XHCI driver. The settings are Enabled and Disabled.
EHCI Hand-Off
This item is for Operating Systems that does not support Enhanced Host Con-
troller Interface (EHCI) hand-off. When enabled, EHCI ownership change will be
claimed by the EHCI driver. The settings are Disabled and Enabled.
XHCI Mode
This feature handles the mode of operation for the XHCI (Extensible Host
Controller Interface) controller. The settings are Smart Auto, Auto, Enabled,
Disabled and Manual.
SATA Conguration
When this submenu is selected, the AMI BIOS automatically detects the presence
of the SATA Devices and displays the following items:
SATA Controllers
This item Enables or Disables the built-in SATA controllers on the motherboard.
The options are Enabled and Disabled.
SATA Mode Selection
This item selects the mode for the installed SATA drives. The options are Disabled,
IDE, AHCI, and RAID.
SATA RAID Option ROM/UEFI Driver
This item enables either the onboard SATA option ROM or the EFI driver. The op-
tions are Enabled or Disabled.
If AHCI is selected in SATA Mode Selection above, the following items are
displayed:
Serial ATA Port 0~ Port 5
This item displays the information detected on the installed SATA drives on the
particular SATA port.
•Model number of drive and capacity
•Software Preserve Support
Chapter 4: AMI BIOS
4-17
Port 0 ~ Port 5 Hot Plug
This feature designates the port specied as hot pluggable. Set this item to
Enabled to enable hot-plugging. The options are Disabled and Enabled.
Port 0 ~ Port 5 SATA Device Type
This feature congures the selected SATA port to support either a solid state
drive or hard disk drive. The options are Hard Disk Drive and Solid Sate Drive.
Port 0 ~ Port 5 Spin Up Device
On an edge detect from 0 to 1, set this item to allow the PCH to start a COMRE-
SET initialization sequence to the device. The options are Disabled and Enabled.
If IDE is selected in SATA Mode Selection above, the following items are
displayed:
Serial ATA Port 0~ Port 5
This item displays the information detected on the installed SATA drives on the
particular SATA port.
•Model number of drive and capacity
•Software Preserve Support
If RAID is selected in SATA Mode Selection above, the following items are
displayed:
Serial ATA Port 0~ Port 5
This item displays the information detected on the installed SATA drives on the
particular SATA port.
•Model number of drive and capacity
•Software Preserve Support
Port 0 ~ Port 5 Hot Plug
This feature designates this port as hot pluggable. Set this item to Enabled to
enable hot-plugging. The options are Hard Disk Drive and Solid State Drive.
Port 0 ~ Port 5 SATA Device Type
This feature congures the selected SATA port to support either a solid state
drive or hard disk drive. Set this item to Enabled to enable hot-plugging. The
options are Enabled and Disabled.
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X10SLH-LN6TF User’s Manual
Port 0 ~ Port 5 Spin Up Device
On an edge detect from 0 to 1, set this item to allow the PCH to start a COMRE-
SET initialization sequence to the device. The options are Enabled and Disabled.
PCIe/PCI/PnP Conguration
This feature allows the user to set the PCI/PnP congurations for the following items:
Above 4G Decoding
Select Enabled for 64-bit devices to be decoded above the 4GB address space
If 64bit PCI decoding is supported by the system. The options are Disabled and
Enabled.
VGA Palette Snoop
Select Enabled to support VGA palette register snooping which will allow the
PCI cards that do not contain their own VGA color palette to examine the video
cards palette and mimic it for proper color display. The options are Disabled and
Enabled.
CPU SLOT6 PCI-E 3.0 X8 (IN X16) OPROM
Use this feature to enable or disable PCIe slot Option ROMs to boot the computer
using a device installed on the slot specied. The options are Disabled, Legacy
and EFI.
PCH SLOT4 PCI-E 2.0 X4 (IN X8) OPROM
Use this feature to enable or disable PCIe slot Option ROMs to boot the computer
using a device installed on the slot specied. The options are Disabled, Legacy
and EFI.
Launch Storage OpROM Policy
This feature controls how the system executes UEFI (Unied Extensible Firmware
Interface), and legacy storage OPROM. Select Legacy Only to boot the system
using a legacy device installed in a PCI slot. The options are Do Not Launch, UEFI
Only and Legacy Only.
Other PCI Device ROM Priority
This feature selects a PCI device OPROM to launch for system boot if this device
is not a network, mass storage, or video device. The options are UEFI Only and
Legacy Only.
Chapter 4: AMI BIOS
4-19
Onboard LAN1 Option ROM
Select iSCSI to use the iSCSI Option ROM to boot the computer using an iSCSI
device installed in a LAN port specied. Select PXE (Preboot Execution Environ-
ment) to boot the computer using a PXE device installed in a LAN port specied.
Select Disabled to prevent system boot using a device installed in a LAN port.
The options are Disabled, PXE, iSCSI, and FCoE.
Onboard LAN2/LAN3/LAN4/LAN5/LAN6 Option ROM
Select PXE (Preboot Execution Environment) or to boot the computer using a
PXE device installed in a LAN port specied. Select Disabled to prevent system
boot using a device installed in a LAN port. Select FCoE for Fiber Channel over
Ethernet. The options are Disabled, PXE, and FCoE.
VGA Priority
This feature selects the priority between the onboard and rst offboard video device
that has been detected. The options are Onboard and Offboard.
Network Stack
Select Enabled enable PXE (Preboot Execution Environment) or UEFI (Unied
Extensible Firmware Interface) for network stack support. The options are Enabled
and Disabled.
ACPI Settings
High Precision Event Timer
Select Enabled to activate the High Performance Event Timer (HPET) that produces
periodic interrupts at a much higher frequency than a Real-time Clock (RTC) does in
synchronizing multimedia streams, providing smooth playback and reducing the de-
pendency on other timestamp calculation devices, such as an x86 RDTSC Instruc-
tion embedded in the CPU. The High Performance Event Timer is used to replace
the 8254 Programmable Interval Timer. The options are Enabled and Disabled.
ACPI Sleep State
This feature selects the ACPI Sleep State that the system will enter into when
the suspend button is activated. The options are Suspend Disabled and S3 only
(suspend to RAM).
WHEA Support
This feature Enables the Windows Hardware Error Architecture (WHEA) support for
the Windows 2008 (or a later vision) operating system. The options are Enabled
and Disabled.
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X10SLH-LN6TF User’s Manual
Intel Server Platform Services Conguration
The following status information for this motherboard are displayed:
•ME BIOS Interface Version
•SPS Version
•ME FW (Firmware) Status Value
•ME FW State
•ME FW Operation State
•ME FW Error Code
•ME NM FW Status Value
•BIOS Booting Mode
•Cores Disabled
•ME FW SKU Information
•End-of-POST Status
Super IO Conguration
Super IO Chip NCT6776F
Serial Port 1 Conguration / Serial Port 2 Conguration
Serial Port
Select Enabled to enable the onboard serial port. The options are En-
abled and Disabled.
Change Settings
This option species the base I/O port address and the Interrupt Request
address of Serial Port 1 and 2. Select Auto to let the BIOS automatically
assign the base I/O and IRQ address.
The options for Serial Port 1 are Auto, (IO=3F8h; IRQ=4), (IO=3F8h;
IRQ=3, 4, 10, 11), (IO=2F8h; IRQ=3, 4, 10, 11), (IO=3E8h; IRQ=3, 4,
10, 11) and (IO=2E8h; IRQ=3, 4, 10, 11).
Chapter 4: AMI BIOS
4-21
The options for Serial Port 2 are Auto, (IO=2F8h; IRQ=3), (IO=3F8h;
IRQ=3, 4, 10, 11), (IO=2F8h; IRQ=3, 4, 10, 11), (IO=3E8h; IRQ=3, 4,
10, 11) and (IO=2E8h; IRQ=3, 4, 10, 11).
Serial Port Console Redirection
Console Redirection (COM1, SOL)
Use this feature to enable console redirection for COM1 and SOL ports. The op-
tions are Enabled and Disabled. The default for both COM ports is Disabled. The
default for SOL is Enabled.
Console Redirection Settings
Terminal Type
This feature allows the user to select the target terminal emulation type for Con-
sole Redirection. Select VT100 to use the ASCII Character set. Select VT100+ to
add color and function key support. Select ANSI to use the Extended ASCII Char-
acter Set. Select VT-UTF8 to use UTF8 encoding to map Unicode characters
into one or more bytes. The options are VT100, VT100+, VT-UTF8, and ANSI.
Bits Per second
Use this item to set the transmission speed for a serial port used in Console
Redirection. Make sure that the same speed is used in the host computer and the
client computer. A lower transmission speed may be required for long and busy
lines. The options are 9600, 19200, 38400, 57600, and 115200 (bits per second).
Data Bits
Use this feature to set the data transmission size for Console Redirection. The
options are 7 (Bits) and 8 (Bits).
Parity
A parity bit can be sent along with regular data bits to detect data transmission
errors. Select Even if the parity bit is set to 0, and the number of 1's in data bits
is even. Select Odd if the parity bit is set to 0, and the number of 1's in data bits
is odd. Select None if you do not want to send a parity bit with your data bits
in transmission. Select Mark to add a mark as a parity bit to be sent along with
the data bits. Select Space to add a Space as a parity bit to be sent with your
data bits. The options are None, Even, Odd, Mark, and Space.
Stop Bits
A stop bit indicates the end of a serial data packet. Select 1 Stop Bit for standard
serial data communication. Select 2 Stop Bits if slower devices are used. The
options are 1 and 2.
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X10SLH-LN6TF User’s Manual
Flow Control
Use this item to set the ow control for Console Redirection to prevent data
loss caused by buffer overow. Send a "Stop" signal to stop sending data when
the receiving buffer is full. Send a "Start" signal to start sending data when the
receiving buffer is empty. The options are None and Hardware RTS/CTS.
VT-UTF8 Combo Key Support
Select Enabled to enable VT-UTF8 Combination Key support for ANSI/VT100
terminals. The options are Enabled and Disabled.
Recorder Mode
Select Enabled to capture the data displayed on a terminal and send it as text
messages to a remote server. The options are Disabled and Enabled.
Resolution 100x31
Select Enabled for extended-terminal resolution support. The options are Dis-
abled and Enabled.
Legacy OS Redirection Resolution
Use this item to select the number of rows and columns used in Console Redi-
rection for legacy OS support. The options are 80x24 and 80x25.
Putty KeyPad
This feature selects Function Keys and KeyPad settings for Putty, which is a
terminal emulator designed for the Windows OS. The options are VT100, LINUX,
XTERMR6, SCO, ESCN, and VT400.
Redirection After BIOS POST
Use this feature to enable or disable legacy Console Redirection after BIOS
POST. When set to Bootloader, legacy Console Redirection is disabled before
booting the OS. When set to Always Enable, legacy Console Redirection remains
enabled when booting the OS. The options are Always Enable and Bootloader.
EMS (Emergency Management Services) Console Redirection
Select Enabled to use a COM port selected by the user for EMS Console Redirec-
tion. The options are Enabled and Disabled.
*If the item above set to Enabled, the following items will become available
for user's conguration:
EMS Console Redirection Settings
This feature allows the user to specify how the host computer will exchange
data with the client computer, which is the remote computer used by the user.
Chapter 4: AMI BIOS
4-23
Out-of-Band Management Port
The feature selects a serial port in a client server to be used by the Microsoft
Windows Emergency Management Services (EMS) to communicate with a re-
mote host server. The options are COM1 and SOL.
Terminal Type
Use this feature to select the target terminal emulation type for Console Redirec-
tion. Select VT100 to use the ASCII character set. Select VT100+ to add color
and function key support. Select ANSI to use the extended ASCII character set.
Select VT-UTF8 to use UTF8 encoding to map Unicode characters into one or
more bytes. The options are VT100, VT100+, VT-UTF8, and ANSI.
Bits Per Second
This item sets the transmission speed for a serial port used in Console Redirec-
tion. Make sure that the same speed is used in the host computer and the client
computer. A lower transmission speed may be required for long and busy lines.
The options are 9600, 19200, 57600, and 115200 (bits per second).
Flow Control
Use this item to set the ow control for Console Redirection to prevent data
loss caused by buffer overow. Send a "Stop" signal to stop sending data when
the receiving buffer is full. Send a "Start" signal to start sending data when
the receiving buffer is empty. The options are None, Hardware RTS/CTS, and
Software Xon/Xoff.
The setting for each these features is displayed:
Data Bits, Parity, Stop Bits
Trusted Computing (Available when a TPM device is
installed and detected by the BIOS)
Conguration
Security Device Support
If this feature and the TPM jumper on the motherboard are both set to Enabled,
onboard security devices will be enabled for TPM support to enhance data integrity
and network security. Please reboot the system for a change on this setting to take
effect. The options are Enabled and Disabled.
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X10SLH-LN6TF User’s Manual
TPM State
Select Enabled to use TPM (Trusted Platform Module) settings to enhance system
data security. Please reboot your system for any change on the TPM state to take
effect. The options are Disabled and Enabled.
Pending Operation
Use this item to schedule a TPM-related operation to be performed by a security
device for system data integrity. Your system will reboot to carry out a pending TPM
operation. The options are 0, Enable Take Ownership, Disable Take Ownership,
and TPM Clear.
Note: Your system will reboot to carry out a pending TPM operation.
Current Status Information
This feature indicates the status of the following TPM items:
•TPM Enabled Status
•TPM Active Status
•TPM Owner Status.
Intel TXT (LT) Support
Intel TXT (Trusted Execution Technology) helps protect against software-based at-
tackes to ensure the security, condentiality, and integrity of all data stored in the
system. The options are Enabled and Disabled.
Chapter 4: AMI BIOS
4-25
4-4 Event Logs
Change SMBIOS Event Log Settings
SMBIOS Event Log
Change this item to enable or disable all features of the SMBIOS Event Logging
during system boot. The options are Enabled and Disabled.
PCI Error Logging Support
Use this item to enable or disable PCI error logging. The options are Enabled and
Disabled.
Erasing Settings
Erase Event Log
If this feature is set to Yes, all logged events will be erased. The options are No,
Yes, Next reset and Yes, Every reset.
When Log is Full
Select Erase Immediately for all messages to be automatically erased from the
event log when the event log memory is full. The options are Do Nothing and
Erase Immediately.
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X10SLH-LN6TF User’s Manual
SMBIOS Event Log Standard Settings
Log System Boot Event
This option toggles the System Boot Event logging to enabled or disabled. The
options are Disabled and Enabled.
MECI (Multiple Event Count Increment)
The Multiple Event Count Increment (MECI) counter counts the number of oc-
curences a duplicate event must happen before the MECI counter is incremented.
This is a numeric value. The default value is 1.
METW (Multiple Event Count Time Window)
The Multiple Event Time Window (METW) denes number of minutes must pass
between duplicate log events before MECI is incremented. This is in minutes, from
0 to 99. The default value is 60.
View SMBIOS Event Log
This section displays the contents of the SMBIOS Event Log.
Chapter 4: AMI BIOS
4-27
IPMI
System Event Log
This feature is used to change the Sytem Event Log (SEL) conguration.
SEL Components - Change this item to enable or disable all features of System
Event Logging. The options are Enabled and Disabled. When Enabled, the
following can be congured:
Erase SEL - This option erases all logged SEL events. The options are No, Yes,
On Next reset and Yes, On Every reset.
When SEL is Full
This option automatically clears the System Event Log memory of all messages
when it is full. The options are Do Nothing and Erase Immediately.
Note: Restart the computer for these changes to take effect.
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X10SLH-LN6TF User’s Manual
BMC Network Conguration
The following items will be displayed:
IPMI LAN Selection
This item displays the IPMI LAN setting. The default setting is Failover.
IPMI Network Link Status
This item displays the IPMI Network Link status. The default setting is Shared LAN.
Update IPMI LAN Conguration
Select Yes for the BIOS to implement all IP/MAC address changes at the next
system boot. The options are No and Yes
Conguration Address Source
Use this item to select the source of the IP address for this computer. If Static is
selected, you will need to know the IP address of this computer and enter it to the
system manually in the eld. If DHCP is selected, the BIOS will search for a DHCP
(Dynamic Host Conguration Protocol) server in the network that is attached to
and request the next available IP address for this computer. The options are DHCP
and Static.
The following items are assigned IP addresses automatically if DHCP is selected,
or they can be congured manually if Static is selected.
Station MAC Address
This item displays the Station MAC address for this computer. Mac addresses are
6 two-digit hexadecimal numbers.
Station IP Address
This item displays the Station IP address for this computer. This should be in decimal
and in dotted quad form (i.e., 192.168.10.253).
Subnet Mask
This item displays the sub-network that this computer belongs to. The value of each
three-digit number separated by dots should not exceed 255.
Gateway IP Address
This item displays the Gateway IP address for this computer. This should be in
decimal and in dotted quad form (i.e., 192.168.10.253).
Chapter 4: AMI BIOS
4-29
4-5 Boot Settings
Use this feature to congure Boot Settings:
Set Boot Priority
This option prioritizes the order of bootable devices that the system to boot from.
Press [ENTER] on each entry from top to bottom to select devices.
•1st Boot Device
•2nd Boot Device
•3rd Boot Device
•4th Boot Device
•5th Boot Device
•6th Boot Device
Delete Boot Option
This feature allows the user to delete a previously dened boot device from which
the systems boots during startup. The settings are [any pre dened boot device]
Delete Driver Option
This feature allows the user to delete a previously dened boot device from which
the systems boots during startup. The settings are [any pre dened boot device]
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X10SLH-LN6TF User’s Manual
Network Device BBS Priorities
This feature allows the use to specify the the boot device priority sequence from
available network devices. The settings are [any detected boot device] and Disabled.
UEFI Boot Drive BBS Priorities
This feature allows the user to specify which devices are boot devices and appear
as boot devices to the system. The settings are [any detected boot device] and
Disabled.
Chapter 4: AMI BIOS
4-31
4-6 Security Settings
This menu allows the user to congure the following security settings for the
system.
If the Administrator password is dened ONLY - this controls access to the
BIOS setup ONLY.
If the User's password is dened ONLY - this password will need to be entered
upon each system boot, and will also have Administrator rights in the setup.
Passwords must be at least 3 and up to 20 characters long.
Password Check
Select Setup for the system to check for a password at Setup. Select Always for the
system to check for a password at bootup or upon entering the BIOS Setup utility.
The options are Setup and Always.
Administrator Password
Press Enter to create a new, or change an existing Administrator password.
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X10SLH-LN6TF User’s Manual
4-7 Save & Exit
Select the Exit tab from the BIOS Setup Utility screen to enter the Exit BIOS Setup
screen.
Discard Changes and Exit
Select this option to quit the BIOS Setup without making any permanent changes
to the system conguration, and reboot the computer. Select Discard Changes and
Exit from the Exit menu and press <Enter>.
Save Changes and Reset
When you have completed the system conguration changes, select this option
to leave the BIOS Setup Utility and reboot the computer, so the new system con-
guration parameters can take effect. Select Save Changes and Exit from the Exit
menu and press <Enter>.
Save Options
Save Changes
When you have completed the system conguration changes, select this option to
save any changes made. This will not reset (reboot) the system.
Discard Changes
Select this option and press <Enter> to discard all the changes and return to the
AMI BIOS Utility Program.
Chapter 4: AMI BIOS
4-33
Restore Optimized Defaults
To set this feature, select Restore Defaults from the Exit menu and press <Enter>.
These are factory settings designed for maximum system stability, but not for
maximum performance.
Save As User Defaults
To set this feature, select Save as User Defaults from the Exit menu and press <En-
ter>. This enables the user to save any changes to the BIOS setup for future use.
Restore User Defaults
To set this feature, select Restore User Defaults from the Exit menu and press <En-
ter>. Use this feature to retrieve user-dened settings that were saved previously.
Boot Override
Listed on this section are other boot options for the system (i.e., Built-in EFI shell).
Select an option and press <Enter>. Your system will boot to the selected boot
option.
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X10SLH-LN6TF User’s Manual
Notes
Appendix A: POST Error Beep Codes
A-1
Appendix A
BIOS Error Beep Codes
During the POST (Power-On Self-Test) routines, which are performed each time
the system is powered on, errors may occur.
Non-fatal errors are those which, in most cases, allow the system to continue
with bootup. The error messages normally appear on the screen.
Fatal errors will not allow the system to continue to bootup. If a fatal error oc-
curs, you should consult with your system manufacturer for possible repairs.
These fatal errors are usually communicated through a series of audible beeps.
The numbers on the fatal error list correspond to the number of beeps for the
corresponding error.
A-1 BIOS Error Beep Codes
BIOS Error Beep Codes
Beep Code/LED Error Message Description
1 beep Refresh Circuits have been reset.
(Ready to power up)
5 short beeps + 1 long
beep
Memory error No memory detected in the
system
8 beeps Display memory
read/write error
Video adapter missing or with
faulty memory
OH LED On System OH System Overheat
A-2
X10SLH-LN6TF User’s Manual
Notes
Appendix B: Software Installation Instructions
B-1
Appendix B
Software Installation Instructions
B-1 Installing Software Programs
The Supermicro ftp site contains drivers and utilities for your system at ftp://ftp.
supermicro.com. Some of these must be installed, such as the chipset driver.
After accessing the ftp site, go into the CDR_Images directory and locate the ISO
le for your motherboard. Download this le to create a CD/DVD of the drivers and
utilities it contains. (You may also use a utility to extract the ISO le if preferred.)
Another option is to go to the Supermicro Website at http://www.supermicro.com/
products/. Find the product page for your motherboard here, where you may down-
load individual drivers and utilities.
After creating a CD/DVD with the ISO les, insert the disk into the CD/DVD drive
on your system and the display shown below should appear.
Note 1: Click the icons showing a hand writing on paper to view the
readme les for each item. Click the computer icons to the right of these
items to install each item (from top to the bottom) one at a time. After
installing each item, you must re-boot the system before moving on
to the next item on the list. The bottom icon with a CD on it allows you
to view the entire contents.
Note 2: When making a storage driver diskette by booting into a Driver
CD, please set the SATA Conguration to "Compatible Mode" and congure
SATA as IDE in the BIOS Setup. After making the driver diskette, be sure
to change the SATA settings back to your original settings.
Driver/Tool Installation Display Screen
B-2
X10SLH-LN6TF User’s Manual
B-2 Installing SuperDoctor5
The Supermicro SuperDoctor® 5 is a hardware monitoring program that functions in
a command-line or web-based interface in Windows and Linux operating systems.
The program monitors system health information such as CPU temperature, system
voltages, system power consumption, fan speed, and provides alerts via email or
Simple Network Management Protocol (SNMP).
SuperDoctor® 5 comes in local and remote management versions and can be
used with Nagios to maximize your system monitoring needs. With SuperDoctor®
5 Management Server (SSM Server), you can remotely control power on/off and
reset chassis intrusion for multiple systems with SuperDoctor® 5 or IPMI. SD5
Management Server monitors HTTP, FTP, and SMTP services to optimize the ef-
ciency of your operation.
Note: The default User Name and Password for SuperDoctor® 5 is admin
/admin.
SuperDoctor® 5 Interface Display Screen (Health Information)
Note: The SuperDoctor® 5 program and User’s Manual can be downloaded
from the Supermicro web site at http://www.supermicro.com/products/nfo/
sms_sd5.cfm.
Appendix C: UEFI BIOS Recovery
C-1
Appendix C
UEFI BIOS Recovery Instructions
Warning: Do not upgrade the BIOS unless your system has a BIOS-related issue.
Flashing the wrong BIOS can cause irreparable damage to the system. In no event shall
Supermicro be liable for direct, indirect, special, incidental, or consequential damages
arising from a BIOS update. If you need to update the BIOS, do not shut down or reset
the system while the BIOS is updating to avoid possible boot failure.
C-1 An Overview to the UEFI BIOS
The Unied Extensible Firmware Interface (UEFI) specication provides a software-
based interface between the operating system and the platform rmware in the
pre-boot environment. The UEFI specication supports an architecture-independent
mechanism for add-on card initialization to allow the UEFI OS loader, which is stored
in the add-on card, to boot up the system. UEFI offers a clean, hands-off control
to a computer system at bootup.
C-2 How to Recover the UEFI BIOS Image (the Main
BIOS Block)
A UEF BIOS ash chip consists of a recovery BIOS block, comprised of two boot
blocks and a main BIOS block (a main BIOS image). The boot block contains critical
BIOS codes, including memory detection and recovery codes for the user to ash
a new BIOS image if the original main BIOS image is corrupted. When the system
power is on, the boot block codes execute rst. Once that is completed, the main
BIOS code will continue with system initialization and bootup.
Note: Follow the BIOS Recovery instructions below for BIOS recovery
when the main BIOS boot crashes. However, when the BIOS boot block
crashes, you will need to follow the procedures in Appendix D.
C-3 To Recover the Main BIOS Block Using a USB-
Attached Device
This feature allows the user to recover a BIOS image using a USB-attached device
without additional utilities used. A USB ash device such as a USB Flash Drive, or
a USB CD/DVD ROM/RW device can be used for this purpose. However, a USB
Hard Disk drive cannot be used for BIOS recovery at this time.
C-2
X10SLH-LN6TF User’s Manual
5. When the screen as shown above displays, using the arrow key, select the
item- "Proceed with ash update" and press the <Enter> key. You will see the
progress of BIOS Recovery as shown in the screen below.
Note: Do not interrupt the process of BIOS ashing until it is com-
pleted.
To perform UEFI BIOS recovery using a USB-attached device, follow the instruc-
tions below.
1. Using a different machine, copy the "Super.ROM" binary image le into the
disc Root "\" Directory of a USB device or a writeable CD/DVD.
Note: If you cannot locate the "Super.ROM" le in your driver disk, visit
our website at www.supermicro.com to download the BIOS image into
a USB ash device and rename it "Super ROM" for BIOS recovery use.
2. Insert the USB device that contains the new BIOS image ("Super.ROM") into
your USB drive and power on the system
3. While powering on the system, keep pressing <Ctrl> and <Home> simultane-
ously on your keyboard until your hear two short beeps. This may take from a
few seconds to one minute.
4. After locating the new BIOS binary image, the system will enter the BIOS
Recovery menu as shown below.
Note: At this point, you may decide if you want to start with BIOS Recov-
ery. If you decide to proceed with BIOS Recovery, follow the procedures
below.
Appendix C: UEFI BIOS Recovery
C-3
6. After the process of BIOS Recovery is complete, press any key to reboot the
system.
7. Using a different system, extract the BIOS package into a bootable USB ash
drive.
8. When a DOS prompt appears, enter AMI.BAT BIOSname.### at the prompt.
Note: Do not interrupt this process until BIOS ashing is completed.
C-4
X10SLH-LN6TF User’s Manual
9. After seeing the message that BIOS update is completed, unplug the AC pow-
er cable from the power supply to clear CMOS, and then plug the AC power
cable in the power supply again to power on the system.
10. Press <Del> continuously to enter the BIOS Setup utility.
11. Press <F3> to load default settings.
12. After loading default settings, press <F4> to save the settings and exit the
BIOS Setup utility.
Appendix D: Dual Boot Block
D-1
Appendix D
Dual Boot Block
D-1 Introduction
This motherboard supports the Dual Boot Block feature, which is the last-ditch
mechanism to recover the BIOS boot block. This section provides an introduction
to the feature.
BIOS Boot Block
A BIOS boot block is the minimum BIOS loader required to enable necessary
hardware components for the BIOS crisis recovery ash that will update the main
BIOS block. An on-call BIOS boot-block corruption may occur due to a software
tool issue (see image below) or an unexpected power outage during BIOS updates.
BIOS Boot Block Corruption Occurrence
When a BIOS boot block is corrupted due to an unexpected power outage or a
software tool malfunctioning during BIOS updates, you can still reboot the system
by closing pins 2 and 3 using a cap on Jumper JBR1. When JBR1 is set to pins
2 and 3, the system will boot from a backup boot block pre-loaded in the BIOS by
the manufacturer.
D-2
X10SLH-LN6TF User’s Manual
D-2 Steps to Reboot the System by Using Jumper JBR1
(Available when JBR1 is Installed onboard)
1. Power down the system.
2. Close pins 2-3 on Jumper JBR1, and power on the system.
3. Follow the BIOS recovery SOP listed in the previous chapter (Appendix C).
4. After completing the steps above, power down the system.
5. Close pins 1-2 on Jumper JBR1, and power on the system.
(Disclaimer Continued)
The products sold by Supermicro are not intended for and will not be used in life support systems,
medical equipment, nuclear facilities or systems, aircraft, aircraft devices, aircraft/emergency com-
munication devices or other critical systems whose failure to perform be reasonably expected to result
in signicant injury or loss of life or catastrophic property damage. Accordingly, Supermicro disclaims
any and all liability, and should buyer use or sell such products for use in such ultra-hazardous ap-
plications, it does so entirely at its own risk. Furthermore, buyer agrees to fully indemnify, defend
and hold Supermicro harmless for and against any and all claims, demands, actions, litigation, and
proceedings of any kind arising out of or related to such ultra-hazardous use or sale.

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