Clevo M740J, M740JU, M760J, M760JU Service Manual. Www.s Manuals.com. Manual

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Preface

Notebook Computer
M740J/M740JU/M760J/M760JU
Service Manual
Preface

I

Preface

Notice
The company reserves the right to revise this publication or to change its contents without notice. Information contained
herein is for reference only and does not constitute a commitment on the part of the manufacturer or any subsequent vendor. They assume no responsibility or liability for any errors or inaccuracies that may appear in this publication nor are
they in anyway responsible for any loss or damage resulting from the use (or misuse) of this publication.
This publication and any accompanying software may not, in whole or in part, be reproduced, translated, transmitted or
reduced to any machine readable form without prior consent from the vendor, manufacturer or creators of this publication, except for copies kept by the user for backup purposes.

Preface

Brand and product names mentioned in this publication may or may not be copyrights and/or registered trademarks of
their respective companies. They are mentioned for identification purposes only and are not intended as an endorsement
of that product or its manufacturer.
Version 1.0
June 2008

Trademarks
AMD Athlon™, AMD Sempron™ and AMD Turion™ are trademarks of Advanced Micro Devices, Inc.
Windows® is a registered trademark of Microsoft Corporation.
Other brand and product names are trademarks and./or registered trademarks of their respective companies.

II

Preface

About this Manual
This manual is intended for service personnel who have completed sufficient training to undertake the maintenance and
inspection of personal computers.
It is organized to allow you to look up basic information for servicing and/or upgrading components of the M740J/
M740JU/M760J/M760JU series notebook PC.
The following information is included:
Chapter 1, Introduction, provides general information about the location of system elements and their specifications.
Chapter 2, Disassembly, provides step-by-step instructions for disassembling parts and subsystems and how to upgrade
elements of the system.

Preface

Appendix A, Part Lists
Appendix B, Schematic Diagrams

III

Preface

IMPORTANT SAFETY INSTRUCTIONS
Follow basic safety precautions, including those listed below, to reduce the risk of fire, electric shock and injury to persons when using any electrical equipment:

Preface

1. Do not use this product near water, for example near a bath tub, wash bowl, kitchen sink or laundry tub, in a wet
basement or near a swimming pool.
2. Avoid using a telephone (other than a cordless type) during an electrical storm. There may be a remote risk of electrical shock from lightning.
3. Do not use the telephone to report a gas leak in the vicinity of the leak.
4. Use only the power cord and batteries indicated in this manual. Do not dispose of batteries in a fire. They may
explode. Check with local codes for possible special disposal instructions.
5. This product is intended to be supplied by a Listed Power Unit with an AC Input of 100 - 240V, 50 - 60Hz, DC Output
of 19V, 3.42A (65 Watts) minimum AC/DC Adapter for M740J/M760J computers, OR 19V, 4.74A (90 Watts) minimum AC/DC Adapter for M740JU/M760JU computers.

CAUTION
Always disconnect all telephone lines from the wall outlet before servicing or disassembling this equipment.

TO REDUCE THE RISK OF FIRE, USE ONLY NO. 26 AWG OR LARGER,
TELECOMMUNICATION LINE CORD
This Computer’s Optical Device is a Laser Class 1 Product

IV

Preface

Instructions for Care and Operation
The notebook computer is quite rugged, but it can be damaged. To prevent this, follow these suggestions:
1.

Don’t drop it, or expose it to shock. If the computer falls, the case and the components could be damaged.
Do not expose the computer
to any shock or vibration.

2.

Do not place anything heavy
on the computer.

Keep it dry, and don’t overheat it. Keep the computer and power supply away from any kind of heating element. This
is an electrical appliance. If water or any other liquid gets into it, the computer could be badly damaged.
Do not leave it in a place
where foreign matter or moisture may affect the system.

Don’t use or store the computer in a humid environment.

Do not place the computer on
any surface which will block
the vents.

Preface

Do not expose it to excessive
heat or direct sunlight.

3.

Do not place it on an unstable
surface.

Follow the proper working procedures for the computer. Shut the computer down properly and don’t forget to save
your work. Remember to periodically save your data as data may be lost if the battery is depleted.
Do not turn off the power
until you properly shut down
all programs.

Do not turn off any peripheral
devices when the computer is
on.

Do not disassemble the computer by yourself.

Perform routine maintenance
on your computer.

V

Preface
4.
5.

Avoid interference. Keep the computer away from high capacity transformers, electric motors, and other strong magnetic fields. These can hinder proper performance and damage your data.
Take care when using peripheral devices.
Use only approved brands of
peripherals.

Unplug the power cord before
attaching peripheral devices.

Preface

Power Safety
The computer has specific power requirements:



VI

•
•

Power Safety
Warning

•

Before you undertake
any upgrade procedures, make sure that
you have turned off the
power, and disconnected all peripherals
and cables (including
telephone lines). It is
advisable to also remove your battery in
order to prevent accidentally turning the
machine on.

•
•
•

Only use a power adapter approved for use with this computer.
Your AC adapter may be designed for international travel but it still requires a steady, uninterrupted power supply. If you are
unsure of your local power specifications, consult your service representative or local power company.
The power adapter may have either a 2-prong or a 3-prong grounded plug. The third prong is an important safety feature; do
not defeat its purpose. If you do not have access to a compatible outlet, have a qualified electrician install one.
When you want to unplug the power cord, be sure to disconnect it by the plug head, not by its wire.
Make sure the socket and any extension cord(s) you use can support the total current load of all the connected devices.
Before cleaning the computer, make sure it is disconnected from any external power supplies.
Do not plug in the power
cord if you are wet.

Do not use the power cord if
it is broken.

Do not place heavy objects
on the power cord.

Preface

Battery Precautions
• Only use batteries designed for this computer. The wrong battery type may explode, leak or damage the computer.
• Do not remove any batteries from the computer while it is powered on.
• Do not continue to use a battery that has been dropped, or that appears damaged (e.g. bent or twisted) in any way. Even if the
computer continues to work with a damaged battery in place, it may cause circuit damage, which may possibly result in fire.
• Recharge the batteries using the notebook’s system. Incorrect recharging may make the battery explode.
• Do not try to repair a battery pack. Refer any battery pack repair or replacement to your service representative or qualified service
personnel.
• Keep children away from, and promptly dispose of a damaged battery. Always dispose of batteries carefully. Batteries may explode
or leak if exposed to fire, or improperly handled or discarded.
• Keep the battery away from metal appliances.
• Affix tape to the battery contacts before disposing of the battery.
• Do not touch the battery contacts with your hands or metal objects.

Preface


Battery Disposal
The product that you have purchased contains a rechargeable battery. The battery is recyclable. At the end of
its useful life, under various state and local laws, it may be illegal to dispose of this battery into the municipal
waste stream. Check with your local solid waste officials for details in your area for recycling options or proper
disposal.
Caution
Danger of explosion if battery is incorrectly replaced. Replace only with the same or equivalent type recommended by the manufacturer. Discard used battery according to the manufacturer’s instructions.

VII

Preface

Related Documents
You may also need to consult the following manual for additional information:

Preface

User’s Manual on CD
This describes the notebook PC’s features and the procedures for operating the computer and its ROM-based setup program. It also describes the installation and operation of the utility programs provided with the notebook PC.

VIII

Preface

Contents
Introduction ..............................................1-1

Disassembly ...............................................2-1
Overview .........................................................................................2-1
Maintenance Tools ..........................................................................2-2
Connections .....................................................................................2-2
Maintenance Precautions .................................................................2-3
Disassembly Steps ...........................................................................2-4
Removing the Battery ......................................................................2-5
Removing the Hard Disk Drive .......................................................2-6
Removing the Optical (CD/DVD) Device ......................................2-9
Removing the System Memory (RAM) ........................................2-11
Removing the Inverter Board ........................................................2-13
Removing and Installing the Processor .........................................2-14
Removing the Wireless LAN Module ...........................................2-17
Removing the Bluetooth Module ..................................................2-18
Removing the Keyboard ................................................................2-19
Removing the Modem ...................................................................2-20

Part Lists ..................................................A-1

Schematic Diagrams................................. B-1
System Block Diagram ...................................................................B-2
Clock Generator ..............................................................................B-3
CPU-1 .............................................................................................B-4
CPU-2 .............................................................................................B-5
CPU-3 .............................................................................................B-6
CPU-4 .............................................................................................B-7
DDRII S0-DIMM 0 ........................................................................B-8
DDRII S0-DIMM 1 ........................................................................B-9
RS780M-1 .....................................................................................B-10
RS780M-2 .....................................................................................B-11
RS780M-3 .....................................................................................B-12
M82-XT-1 .....................................................................................B-13
IX

Preface

Overview .........................................................................................1-1
System Specifications ................................. 1-2
External Locator - Top View with LCD Panel Open ......................1-5
External Locator - Front & Right side Views .................................1-6
External Locator - Left Side & Rear View .....................................1-7
External Locator - Bottom View .....................................................1-8
Mainboard Overview - Top (M74J/M76J-Key Parts) .....................1-9
Mainboard Overview - Bottom (M74J/M76J-Key Parts) .............1-10
Mainboard Overview - Bottom (M74JU/M76JU-Key Parts) .......1-11
Mainboard Overview - Top (Connectors) .....................................1-12
Mainboard Overview - Bottom (Connectors) ...............................1-13

Part List Illustration Location ........................................................ A-2
Top with Fingerprint (M740J/M740JU) ........................................ A-3
Top without Fingerprint (M740J/M740JU) ................................... A-4
Bottom (M740J) ............................................................................. A-5
Bottom (M740JU) .......................................................................... A-6
LCD (M740J/M740JU) ................................................................. A-7
HDD (M740J/M740JU) ................................................................. A-8
COMBO (M740J/M740JU) ........................................................... A-9
DVD-Dual Drive (M740J/M740JU) ............................................ A-10
Top with Fingerprint (M760J/M760JU) ...................................... A-11
Top without Fingerprint (M760J/M760JU) ................................. A-12
Bottom (M760J) ........................................................................... A-13
Bottom (M760JU) ........................................................................ A-14
LCD (M760J/M760JU) ............................................................... A-15
HDD (M760J/M760JU) ............................................................... A-16
COMBO (M760J/M760JU) ......................................................... A-17
DVD-Dual Drive (M760J/M760JU) ............................................ A-18

Preface

Preface
M82-XT-2 .................................................................................... B-14
M82-XT-3 .................................................................................... B-15
DDRII 32MX16 ........................................................................... B-16
LVDS, INVERTER ...................................................................... B-17
HDMI, CRT ................................................................................. B-18
SB700-1 ........................................................................................ B-19
SB700-2 ....................................................................................... B-20
SB700-3 ........................................................................................ B-21
SB700-4 ........................................................................................ B-22
New Card, Mini PCIE .................................................................. B-23
3G, PATA ODD, eSATA ............................................................. B-24
USB, FAN, TP, FP, MULTI CON ............................................... B-25
CARD READER .......................................................................... B-26
ISATA HDD, LED, HOTKEY, BT ............................................. B-27
PCIE GIGALAN RTL8111C ....................................................... B-28
AUDIO CODEC ALC662 ........................................................... B-29
AUDIO AMP2056 ....................................................................... B-30
KBC ITE IT8512E ....................................................................... B-31
1.8VS, 3,3VS, 5VS, 1.1VS, 3.3V ................................................. B-32
VGA POWER & POWER GD .................................................... B-33
VCORE VDD CORE ................................................................... B-34
VCORE VDD CORE ................................................................... B-35
1.8V, 0.9V .................................................................................... B-36
1.1VS, 1.2V, 1.2VS, 2.5V ............................................................ B-37
VGA CORE 1.5VS ...................................................................... B-38
VDD3, VDD5 ............................................................................... B-39
CHARGER, DC IN ...................................................................... B-40
CLICK FINGER BOARD FOR M76 .......................................... B-41
MULTI FUNCTION BOARD ..................................................... B-42
AUDIO BOARD .......................................................................... B-43
FINGER SENSOR BOARD ........................................................ B-44
POWER SWITCH BOARD FOR M74 ....................................... B-45
X

FINGER BOARD FOR M74 ........................................................B-46
EXTERNAL ODD BOARD FOR M76 .......................................B-47
POWER SWITCH BOARD FOR M76 ........................................B-48

Introduction

Chapter 1: Introduction
Overview
This manual covers the information you need to service or upgrade the M740J/M740JU/M760J/M760JU series notebook computer. Information about operating the computer (e.g. getting started, and the Setup utility) is in the User’s
Manual. Information about drivers (e.g. VGA & audio) is also found in User’s Manual. That manual is shipped with the
computer.
Operating systems (e.g. Windows XP, Windows Vista, etc.) have their own manuals as do application software (e.g. word
processing and database programs). If you have questions about those programs, you should consult those manuals.

1.Introduction

The M740J/M740JU/M760J/M760JU series notebook is designed to be upgradeable. See “Disassembly” on page 2 - 1
for a detailed description of the upgrade procedures for each specific component. Please note the warning and safety information indicated by the “” symbol.
The balance of this chapter reviews the computer’s technical specifications and features.

Overview 1 - 1

Introduction

System Specifications
Feature

1.Introduction

Processor

Core Logic
LCD

Specification
AMD Turion™ X2 Ultra Dual Core Processor
(638-pin) Micro-PGA Package, Socket S1G2
ZM80/ ZM82/ ZM83/ ZM86

65nm (65 Nanometer) Process Technology
2MB L2 Cache & 800MHz FSB, TDP: 35W
2.1/ 2.2/ 2.3/ 2.4 GHz

AMD Turion™X2 Dual Core Processor
(638-pin) Micro-PGA Package, Socket S1G2
RM70/ RM72/ RM74

65nm (65 Nanometer) Process Technology
1MB L2 Cache & 800MHz FSB, TDP: 35W
2.0/ 2.1/ 2.2 GHz

AMD Turion™X2 Dual Core Processor
(638-pin) Micro-PGA Package, Socket S1G2
QL60/ QL62/ QL64

65nm (65 Nanometer) Process Technology
1MB L2 Cache & 667MHz FSB, TDP: 35W
1.9/ 2.0/ 2.1 GHz

AMD Sempron™ Processor
(638-pin) Micro-PGA Package, Socket S1G2
SI40/ SI42/ SI44

65nm (65 Nanometer) Process Technology
512KB L2 Cache & 667MHz FSB, TDP: 25W
2.0/ 2.1/ 2.2 GHz

ATI® RS780MN + SB700
M740J/M740JU:

M760J/M760JU:

14.1" WXGA (1280*800)/ WXGA+ (1440*900) TFT LCD

15.4" WXGA (1280*800)/ WXGA+ (1440*900)/ WSXGA+
(1680*1050) TFT LCD

Memory

64-bit Wide DDRII (DDR2) Data Channel
Two 200 Pin SO-DIMM Sockets Supporting DDRII (DDR2) 667MHz/ 800MHz
Memory Expandable up to 4GB (1024MB/ 2048MB DDRII Modules)

Video Adapter

M740J/M760J:

M740JU/M760JU:

ATI® RS780M Integrated Video

ATI Mobility Radeon HD 3470 Hybird X2 Discrete
Video On-Board

High Preference 2D/3D Graphic Accelerator
Shared Memory Architecture of up to 256MB
Supports DirectX®10

256MB of GDDR2 Video Memory On-Board
Integrated HDMI & Unified Video Controller
Supports Cross Fire (In Windows Vista only)
Supports DirectX® 10

Security

Security (Kensington® Type) Lock Slot
Fingerprint ID Reader Module (Factory Option)

BIOS Password

BIOS

One 8Mb SPI Flash ROM

Phoenix™ BIOS

1 - 2 System Specifications

Introduction
Feature

Specification
One Changeable 12.7mm(h) PATA Optical Device (CD/DVD) Type Drive (see “Optional” on page 1 - 4) Easy
Changeable 2.5" 9.5 mm (h) SATA (Serial) HDD

Audio

High Definition Audio
3D Enhanced Sound System
Sound-Blaster PRO™ Compatible

S/PDIF Digital Output
2 * Built-In Speakers
Built-In Microphone

Keyboard &
Pointing Device

Winkey Keyboard

Built-In TouchPad with Scrolling Function

Interface

Three USB 2.0 Ports
One External Monitor Port
One HDMI-Out Port (High-Definition Multimedia Interface)
One Headphone-Out Jack
One Microphone-In Jack
One S/PDIF-Out Jack

One eSATA Port (supported in Windows Vista only):
AHCI mode supports hot swapping
IDE mode does not support hot swapping
One RJ-11 Modem Jack
One RJ-45 LAN Jack
One DC-In Jack

Card Reader

Embedded 7-in-1 Card Reader (MS/ MS Pro/ SD/ Mini SD/ MMC/ RS MMC/ MS Duo) Note: MS Duo/ Mini SD/ RS
MMC Cards require a PC adapter

ExpressCard Slot

One ExpressCard/34(54) Slot

Mini-Card Slots

One Mini-Card Slot for Wireless LAN Module
One Mini-Card Slot for 3.5G Module

Communication

56K Fax Modem
Built-in 10/100/1000Mb Base-TX Ethernet LAN
802.11b/g Wireless LAN Mini-Card Module with USB/PCIe Interface (Option)
Bluetooth 2.0 + EDR (Enhanced Data Rate) Module (Factory Option)
1.3M or 2.0M Pixel PC Camera Module with USB Interface (Factory Option)


UMTS Modes
Note that UMTS
modes
CAN
NOT be used in
North America.

Power
Management

3.5G Module:
UMTS/HSPDA-based 3.5G Mini-Card Module with USB Interface (Factory Option)
Quad-band GSM/GPRS (850 MHz, 900 MHz, 1800 MHz, 1900 MHz)
UMTS WCDMA FDD (2100 MHz)
Supports ACPI v2.0

Supports Wake on LAN

System Specifications 1 - 3

1.Introduction

Storage

Introduction
Feature

1.Introduction

Power

Specification
M740J/M760J:

M740JU/M760JU:

Full Range AC/DC Adapter AC input 100 - 240V, 50 60Hz, DC Output 19V, 3.42A or 18.5V, 3.5A (65 Watts)

Full Range AC/DC Adapter AC input 100 - 240V, 50 60Hz, DC Output 19V, 4.74A (90 Watts)

Battery

6 Cell Smart Lithium-Ion Battery Pack, 4000mAH OR 4400mAH

Environmental
Spec

Temperature
Operating:
Non-Operating:

Dimensions
& Weight

M740J/M740JU:

M760J/M760JU:

336mm (w) * 250mm (d) * 24.8-35.7mm (h)

359mm (w) * 268mm (d) * 24.8-37mm (h)

Around 2.3 kg With 6 Cell Battery

2.6 kg With 6 Cell Battery

PATA Optical Drive Module Options:
DVD/CD-RW Combo Device Module
Super Multi Device Module

UMTS/HSPDA-based 3.5G Mini-Card Module with USB
Interface (Factory Option)
Quad-band GSM/GPRS (850 MHz, 900 MHz, 1800
MHz, 1900 MHz)
UMTS WCDMA FDD (2100 MHz)

Optional

5°C - 35°C
-20°C - 60°C

802.11b/g Wireless LAN Mini-Card Module with USB/PCIe
Interface
1.3M or 2.0M Pixel PC Camera Module with USB
Interface (Factory Option)
Fingerprint ID Reader Module (Factory Option)
Bluetooth 2.0 + EDR (Enhanced Data Rate) Module
(Factory Option)

1 - 4 System Specifications

Relative Humidity
Operating:
Non-Operating:

20% - 80%
10% - 90%


UMTS Modes
Note that UMTS modes CAN NOT be used in
North America.

Introduction

External Locator - Top View with LCD Panel Open

Figure 1
Top View

1

1

2

2

3

3

3

4
5

4

5
6

6
7

7
8

8
9

9

10

10
M740J/M740JU

10

M760J/M760JU

10

External Locator - Top View with LCD Panel Open 1 - 5

1.Introduction

3

1. Optional Built-In
PC Camera
2. LCD
3. Speakers
4. Power Button
5. Hot Key Buttons
6. Keyboard
7. Built-In
Microphone
8. Touchpad &
Buttons
9. Fingerprint
Module (Optional)
10. LED Indicators

Introduction
Figure 2

External Locator - Front & Right side Views

Front Views
1. LED Indicators

1.Introduction

1

Figure 3
Right Side Views
1. S/PDIF-Out Jack
2. Microphone-In
Jack
3. Headphone-Out
Jack
4. USB 2.0 Port
5. Optical Device
Drive Bay
6. RJ-11 Phone
Jack
7. Security Lock
Slot

1

2 3

1 - 6 External Locator - Front & Right side Views

4

5

6

7

Introduction

External Locator - Left Side & Rear View
Figure 4
Left Side View

1

2

3

4

5

7
6

7

8
9

Figure 5
Rear View
1

1. Battery

External Locator - Left Side & Rear View 1 - 7

1.Introduction

1. DC-In Jack
2. External Monitor
Port
3. RJ-45 LAN Jack
4. e-SATA Port
5. HDMI-Out Port
6. Vent
7. 2 * USB 2.0 Ports
8. ExpressCard Slot
9. 7-in-1 Card
Reader

Introduction

External Locator - Bottom View
Figure 6

1.Introduction

Bottom View
1. Battery
2. Bluetooth
Module Cover
3. RAM & CPU Bay
Cover
4. Vent
5. Hard Disk Bay
Cover
6. 3.5G USIM Card
Cover

1

1
2

2

4

5

3

3

4

5

6

6

4

M740J/M740JU


Overheating
To prevent your computer from overheating
make sure nothing
blocks the vent/fan intakes while the computer is in use.

1 - 8 External Locator - Bottom View

4

M760J/M760JU

Introduction

Mainboard Overview - Top (M74J/M76J-Key Parts)

Figure 7
Mainboard Top
Key Parts
1. LG-2402P-1
2. RTL8111C
3. ExpressCard
Connector
4. ITE IT8512E

1.Introduction

1

2

3

4

Mainboard Overview - Top (M74J/M76J-Key Parts) 1 - 9

Introduction
Figure 8

Mainboard Overview - Bottom (M74J/M76J-Key Parts)

1.Introduction

Mainboard Bottom
Key Parts
1. Mini-Card
Connector (WLAN
Module)
2. CPU Socket (no
CPU installed)
3. Memory Slots
DDR2 SO-DIMM
4. ALC662
5. South Bridge
6. ICS
7. North Bridge

1

7

2

6
3

5
4

1 - 10 Mainboard Overview - Bottom (M74J/M76J-Key Parts)

Introduction

Mainboard Overview - Bottom (M74JU/M76JU-Key Parts)

Figure 9
Mainboard Bottom
Key Parts

1

7

6
3

5
4

Mainboard Overview - Bottom (M74JU/M76JU-Key Parts) 1 - 11

1.Introduction

2

8

1. Mini-Card
Connector (WLAN
Module)
2. CPU Socket (no
CPU installed)
3. Memory Slots
DDR2 SO-DIMM
4. ALC662
5. South Bridge
6. ICS
7. North Bridge
8. ATI -VGA on
Board

Introduction
Figure 10

Mainboard Overview - Top (Connectors)

1.Introduction

Mainboard Top
Connectors
1. LCD Cable
Connector
2. Speaker Cable
Connector
3. Inverter Cable
Connector
4. Fingerprint Cable
Connector
5. TouchPad Cable
Connector
6. Microphone
Cable Connector
7. Keyboard Cable
Connector
8. Power board
Connector
9. Audio Board
Connector

1
3

2

8

7
6

4
5

9

1 - 12 Mainboard Overview - Top (Connectors)

Introduction

Mainboard Overview - Bottom (Connectors)

Figure 11
Mainboard Bottom
Connectors

1
2
3

4

7
6

8

5

Mainboard Overview - Bottom (Connectors) 1 - 13

1.Introduction

1. Battery
Connector
2. BT Cable
Connector
3. Multi Board
(Modem)
Connector
4. CD-ROM
Connector
5. HDD Connector
6. CMOS Bat.
Connector
7. Debug Cable
Connector
8. CPU Fan Cable
Connector

Disassembly

Chapter 2: Disassembly
Overview
This chapter provides step-by-step instructions for disassembling the M740J/M740JU/M760J/M760JU series notebook’s parts and subsystems. When it comes to reassembly, reverse the procedures (unless otherwise indicated).
We suggest you completely review any procedure before you take the computer apart.

To make the disassembly process easier each section may have a box in the page margin. Information contained under
the figure # will give a synopsis of the sequence of procedures involved in the disassembly procedure. A box with a 
lists the relevant parts you will have after the disassembly process is complete. Note: The parts listed will be for the disassembly procedure listed ONLY, and not any previous disassembly step(s) required. Refer to the part list for the previous disassembly procedure. The amount of screws you should be left with will be listed here also.


Information

A box with a  will also provide any possible helpful information. A box with a  contains warnings.
An example of these types of boxes are shown in the sidebar.


Warning

Overview 2 - 1

2.Disassembly

Procedures such as upgrading/replacing the RAM, optical device and hard disk are included in the User’s Manual but are
repeated here for your convenience.

Disassembly
NOTE: All disassembly procedures assume that the system is turned OFF, and disconnected from any power supply (the
battery is removed too).

Maintenance Tools
The following tools are recommended when working on the notebook PC:

2.Disassembly

•
•
•
•
•
•

M3 Philips-head screwdriver
M2.5 Philips-head screwdriver (magnetized)
M2 Philips-head screwdriver
Small flat-head screwdriver
Pair of needle-nose pliers
Anti-static wrist-strap

Connections
Connections within the computer are one of four types:

2 - 2 Overview

Locking collar sockets for ribbon connectors

To release these connectors, use a small flat-head screwdriver to
gently pry the locking collar away from its base. When replacing the connection, make sure the connector is oriented in the
same way. The pin1 side is usually not indicated.

Pressure sockets for multi-wire connectors

To release this connector type, grasp it at its head and gently
rock it from side to side as you pull it out. Do not pull on the
wires themselves. When replacing the connection, do not try to
force it. The socket only fits one way.

Pressure sockets for ribbon connectors

To release these connectors, use a small pair of needle-nose pliers to gently lift the connector away from its socket. When replacing the connection, make sure the connector is oriented in
the same way. The pin1 side is usually not indicated.

Board-to-board or multi-pin sockets

To separate the boards, gently rock them from side to side as
you pull them apart. If the connection is very tight, use a small
flat-head screwdriver - use just enough force to start.

Disassembly

Maintenance Precautions
The following precautions are a reminder. To avoid personal injury or damage to the computer while performing a removal and/or replacement job, take the following precautions:

Power Safety
Warning
Before you undertake
any upgrade procedures, make sure that
you have turned off the
power, and disconnected all peripherals
and cables (including
telephone lines). It is
advisable to also remove your battery in
order to prevent accidentally turning the
machine on.

Cleaning
Do not apply cleaner directly to the computer, use a soft clean cloth.
Do not use volatile (petroleum distillates) or abrasive cleaners on any part of the computer.

Overview 2 - 3

2.Disassembly

1. Don't drop it. Perform your repairs and/or upgrades on a stable surface. If the computer falls, the case and other
components could be damaged.
2. Don't overheat it. Note the proximity of any heating elements. Keep the computer out of direct sunlight.
3. Avoid interference. Note the proximity of any high capacity transformers, electric motors, and other strong magnetic fields. These can hinder proper performance and damage components and/or data. You should also monitor
the position of magnetized tools (i.e. screwdrivers).
4. Keep it dry. This is an electrical appliance. If water or any other liquid gets into it, the computer could be badly
damaged.
5. Be careful with power. Avoid accidental shocks, discharges or explosions.
•Before removing or servicing any part from the computer, turn the computer off and detach any power supplies.
•When you want to unplug the power cord or any cable/wire, be sure to disconnect it by the plug head. Do not pull on the wire.
6. Peripherals – Turn off and detach any peripherals.
7. Beware of static discharge. ICs, such as the CPU and main support chips, are vulnerable to static electricity.
Before handling any part in the computer, discharge any static electricity inside the computer. When handling a
printed circuit board, do not use gloves or other materials which allow static electricity buildup. We suggest that
you use an anti-static wrist strap instead.
8. Beware of corrosion. As you perform your job, avoid touching any connector leads. Even the cleanest hands produce oils which can attract corrosive elements.
9. Keep your work environment clean. Tobacco smoke, dust or other air-born particulate matter is often attracted
to charged surfaces, reducing performance.
10. Keep track of the components. When removing or replacing any part, be careful not to leave small parts, such as
screws, loose inside the computer.



Disassembly

Disassembly Steps
The following table lists the disassembly steps, and on which page to find the related information. PLEASE PERFORM
THE DISASSEMBLY STEPS IN THE ORDER INDICATED.

To remove the Battery:
1. Remove the battery

To remove the Wireless LAN Module:
page 2 - 5

1. Remove the battery
2. Remove the wireless LAN

page 2 - 5
page 2 - 6

To remove the Bluetooth Module:
:

page 2 - 5
page 2 - 17

To remove the HDD:

2.Disassembly

1. Remove the battery
2. Remove the HDD

1. Remove the battery
2. Remove the Bluetooth

To remove the Optical Device:
1. Remove the battery
2. Remove the Optical device

page 2 - 5
page 2 - 9

1. Remove the battery
2. Remove the system memory

page 2 - 5
page 2 - 11

To remove the Inverter Board:
1. Remove the battery
2. Remove the inverter board

page 2 - 5
page 2 - 13

To remove and install a Processor:
1. Remove the battery
2. Remove the processor
3. Install the processor

2 - 4 Disassembly Steps

To remove the Keyboard:
1. Remove the battery
2. Remove the keyboard

To remove the System Memory:

page 2 - 5
page 2 - 14
page 2 - 16

page 2 - 5
page 2 - 18

page 2 - 5
page 2 - 19

To remove the Modem:
1.
2.
3.
4.
5.
6.
7.
8.

Remove the battery
Remove the HDD
Remove the Optical device
Remove the processor
Remove the Wireless LAN Module
Remove the Bluetooth Module
Remove the keyboard
Remove the modem

page 2 - 5
page 2 - 6
page 2 - 9
page 2 - 14
page 2 - 17
page 2 - 18
page 2 - 19
page 2 - 20

Disassembly

Removing the Battery
1.
2.
3.
4.

Turn the computer off, and turn it over.
Slide the latch 1 in the direction of the arrow.
Slide the latch 2 in the direction of the arrow, and hold it in place.
Slide the battery 63 in the direction of the arrow 4 .

Figure 1
Battery Removal
a. Slide the latch and hold
in place.
b. Slide the battery in the direction of the arrow.

a.

2

2.Disassembly

1

b.
3

4


3. Battery

Removing the Battery 2 - 5

Disassembly

Removing the Hard Disk Drive
Figure 2
HDD Assembly
Removal
a. Locate the HDD bay
cover and remove the
screw(s).

The hard disk drive can be taken out to accommodate other 2.5" serial (SATA) hard disk drives with a height of 9.5mm
(h). Follow your operating system’s installation instructions, and install all necessary drivers and utilities (as outlined in
Chapter 4 of the User’s Manual) when setting up a new hard disk.

Hard Disk Upgrade Process
1. Turn off the computer, and remove the battery (page 2 - 5).
2. Locate the hard disk bay cover and remove screw 1 & 2 .

2.Disassembly

a.

1

2

1

M740J/M740JU

2

M760J/M760JU


HDD System Warning



New HDD’s are blank. Before you begin make sure:
You have backed up any data you want to keep from your old HDD.

• 2 Screws

You have all the CD-ROMs and FDDs required to install your operating system and programs.
If you have access to the internet, download the latest application and hardware driver updates for the operating system you plan
to install. Copy these to a removable medium.

2 - 6 Removing the Hard Disk Drive

Disassembly
For M740J/M740JU computers:
3.
4.
5.
6.
7.

Figure 3

Remove the hard disk bay cover 63 .
Grip the tab and slide the hard disk in the direction of arrow 4 .
Lift the hard disk out of the bay 5 .
Remove the screw 6 and the adhesive cover 67 from the hard disk 68 .
Reverse the process to install a new hard disk (do not forget to replace all the screws and covers).

HDD Assembly
Removal (cont’d.)
b. Remove the HDD bay
cover.
c. Grip the tab and slide the
HDD in the direction of
the arrow.
d. Lift the HDD assembly
out of the bay.
e. Remove the screw and
adhesive cover.

b.
3

2.Disassembly

e.

6

7

c.

4

8

d.


5

3. HDD Bay Cover
7. Adhesive Cover
8. HDD

• 1 Screw

Removing the Hard Disk Drive 2 - 7

Disassembly

Figure 4
HDD Assembly
Removal (cont’d.)

2.Disassembly

f. Remove the HDD Bay
Cover.
g. Grip the tab and slide the
HDD in the direction of
the arrow.
h. Lift the HDD assembly
out of the bay.
i. Remove the screw and
adhesive cover.

For M760J/M760JU computers:
8.
9.
10.
11.
12.

Remove the hard disk bay Cover 63 .
Grip the tab and slide the hard disk in the direction of arrow 4 .
Lift the hard disk out of the bay 5 .
Remove the screws 6 & 7 and the adhesive cover 68 from the hard disk 69 .
Reverse the process to install a new hard disk (do not forget to replace all the screws and covers).
f.

3

i.

6

g.
8

4

7
9

h.


3. HDD Bay Cover
8. Adhesive Cover
9. HDD

• 2 Screws

2 - 8 Removing the Hard Disk Drive

5

Disassembly

Removing the Optical (CD/DVD) Device

Figure 5

1.
2.
3.
4.
5.
6.

Turn off the computer, and remove the battery (page 2 - 5).
M740J/M740JU: (see over for M760J/M760JU) Locate the component bay cover 1 and remove screws 2 - 4 .
Carefully (a fan and cable are attached to the under side of the cover) lift up the bay cover.
Carefully disconnect the fan cable 5 , and remove the cover 1 .
Remove the screw at point 6 , and use a screwdriver to carefully push out the optical device 8 at point 7 .
Insert the new device and carefully slide it into the computer (the device only fits one way. DO NOT FORCE IT; The
screw holes should line up).
7. Restart the computer to allow it to automatically detect the new device.
a.

Optical Device
Removal
a. Remove the screws.
b. Disconnect the fan cable
and remove the cover.
c. Remove the screw.
d. Push the optical device
out off the computer at
point 7.

c.

2.Disassembly

2

4

3
1

6
M740J/M740JU
b.

d.


1

c.

1. Component Bay Cover
8. Optical Device

8

7
• 4 Screws

5

Removing the Optical (CD/DVD) Device 2 - 9

Disassembly

Figure 6
Optical Device
Removal (cont’d.)

2.Disassembly

e. Remove the screws.
f. Remove the cover.
g. Remove the screw.
h. Push the optical device
out off the computer at
point 7.

8.
9.
10.
11.

M760J/M760JU: Locate the hard disk bay cover 1 and loosen screws 2 & 3 .
Remove the hard disk bay cover 1 .
Remove the screw at point 6 , and use a screwdriver to carefully push out the optical device 8 at point 7 .
Insert the new device and carefully slide it into the computer (the device only fits one way. DO NOT FORCE IT; The
screw holes should line up).
12. Restart the computer to allow it to automatically detect the new device.
e.

g.

6
1
2

7

3

M760J/M760JU
f.



h.

1

1. HDD Bay Cover
8. Optical Device

8
7

• 3 Screws

2 - 10 Removing the Optical (CD/DVD) Device

Disassembly

Removing the System Memory (RAM)

Figure 7

The computer has two memory sockets for 200 pin Small Outline Dual In-line Memory Modules (SO-DIMM) supporting
DDR2 667/800MHz. The main memory can be expanded up to 4GB. The SO-DIMM modules supported are 1024MB,
and 2048MB and DDRII Modules. The total memory size is automatically detected by the POST routine once you turn
on your computer.

RAM Module
Removal
a. Remove the screws.
b. Remove the cover.

Memory Upgrade Process
1.
2.
3.
4.

Turn off the computer, remove the battery (page 2 - 5).
Locate the component bay cover 1 , and remove screws 2 - 4 .
Carefully (a fan and cable are attached to the under side of the cover) lift up the bay cover (page 2 - 9).
The RAM module(s) will be visible at point 5 on the mainboard.

2

3

2

4
1

3

1
5

Be careful not to touch
the metal pins on the
module’s connecting
edge. Even the cleanest hands have oils
which can attract particles, and degrade the
module’s
performance.

4
M740J/M740JU

M760J/M760JU


1. Component Bay
Cover

• 3 Screws

Removing the System Memory (RAM) 2 - 11

2.Disassembly

b.

a.


Contact Warning

Disassembly
Figure 8
RAM Module
Removal (cont’d.)

5. Gently pull the two release latches ( 6 & 7 ) on the sides of the memory socket in the direction indicated by the
arrows (Figure 8c).
c.

2.Disassembly

c. Pull
the
release
latch(es).
d. Remove the module(s).
e. Properly re-insert the
bay cover pins.

d.

6

7
8

6.
7.
8.
9.

The RAM module(s) 8 will pop-up (Figure 8d), and you can then remove it.
Pull the latches to release the second module if necessary.
Insert a new module holding it at about a 30° angle and fit the connectors firmly into the memory slot.
The module’s pin alignment will allow it to only fit one way. Make sure the module is seated as far into the slot as it
will go. DO NOT FORCE the module; it should fit without much pressure.
10. Press the module in and down towards the mainboard until the slot levers click into place to secure the module.
11. Replace the bay cover and screws (make sure you reconnect the fan cable before screwing down the bay
cover).
Note for M760J/M760JU computers that there are four 9 - 12 cover pins which need to be aligned with slots in
the case, to insure a proper cover fit, before screwing down the bay cover 1 .
e.
9
1



10
11

8. RAM Module(s)

12

12. Restart the computer to allow the BIOS to register the new memory configuration as it starts up.

2 - 12 Removing the System Memory (RAM)

Disassembly

Removing the Inverter Board

Figure 9

1. Turn off the computer, and remove the battery (page 2 - 5).
2. Remove any rubber covers, screws 1 - 6 (Figure 9a), then run your finger around the middle of the frame to
carefully unsnap the LCD front panel module 7 from the back.
3. Discharge the remaining system power (see “Inverter Power Warning” below).
4. Remove screw 8 (Figure 9b) from the inverter, and carefully lift the inverter board up slightly.
5. Disconnect cables 9 & 10 (Figure 9c) from the inverter, then remove the inverter 11 (Figure 9d) from the top
case assembly.
a.

2

3

4

5

b.

a. Remove the 6 screws
and unsnap the LCD
front panel module from
the back.
b. Remove the screw and
discharge the remaining
power from the inverter
board and lift the board
up slightly.
c. Disconnect the cables
from the inverter.
d. Remove the inverter.

c.
1

6
9

7


Inverter Power Warning
In order to prevent a short circuit when removing the inverter it is necessary to discharge any remaining system power. To do
so, press the computer’s power button for a
few seconds before disconnecting the inverter cable.

d.

10

11


7. LCD Front Panel
11. Inverter Board

• 6 Screws

Removing the Inverter Board 2 - 13

2.Disassembly

8

Inverter Board
Removal

Disassembly

Removing and Installing the Processor
Figure 10
Processor Removal
a. Remove the cover and
Iocate the heat sink.
b. Remove the screws in
the order indicated.
c. Remove the heat sink.

Processor Removal Procedure
1.
2.
3.
4.

Turn off the computer, remove the battery (page 2 - 5) and the component bay cover (page 2 - 9).
The CPU heat sink will be visible at point A on the mainboard.
Remove screws 3 , 2 , 1 (Figure 10b) the reverse order as indicated on the label.
Carefully lift up the heat sink B (Figure 10c) off the computer.
c.

a.

A

2.Disassembly

B

b.

M740J/M760J
2

1

B



3

B. Heat Sink

• 3 Screws

2 - 14 Removing and Installing the Processor

M740JU/M760JU

Disassembly
5.
6.
7.
8.

Turn the release latch C towards the unlock symbol
, to release the CPU (Figure 11a).
Carefully (it may be hot) lift the CPU D up out of the socket (Figure 11b).
See page 2 - 16 for information on inserting a new CPU.
When re-inserting the CPU, pay careful attention to the pin alignment, it will fit only one way (DO NOT FORCE IT!).

Figure 11
Processor Removal
(cont’d)
d. Turn the release latch to
unlock the CPU.
e. Lift the CPU out of the
socket.

d.

2.Disassembly

C

Unlock

Lock

e.


D

Caution
The heat sink, and CPU area in
general, contains parts which are
subject to high temperatures. Allow the area time to cool before removing these parts.


7. CPU

Removing and Installing the Processor 2 - 15

Disassembly
Figure 12
Processor
Installation
a. Insert the CPU.
b. Turn the release latch towards the lock symbol.
c. Remove the sticker from
the heat sink and insert
the heat sink.
d. Tighten the screws.

Processor Installation Procedure
1. Insert the CPU A , pay careful attention to the pin alignment, it will fit only one way (DO NOT FORCE IT!), and
turn the release latch B towards the lock symbol
(Figure 12b).
2. Remove the sticker C (Figure 12c) from the heat sink.
3. Insert the heat sink D as indicated in Figure 12c.
4. Tighten screws 1 - 3 in the order indicated on the label.
5. Replace the component bay cover and tighten the screws (page 2 - 9).
a.

c.

C

A

2.Disassembly

D
M740J/M760J

C
b.

D

M740JU/M760JU


A. CPU
D. Heat Sink

d.
B

• 3 Screws

2 - 16 Removing and Installing the Processor

Disassembly

Removing the Wireless LAN Module
1.
2.
3.
4.
5.

Figure 13

Turn off the computer, remove the battery (page 2 - 5) and the component bay cover (page 2 - 9).
The Wireless LAN module will be visible at point 1 on the mainboard.
Carefully disconnect cables 2 - 3 , then remove screw 4 from the module socket.
The Wireless LAN module 5 will pop-up.
Lift the Wireless LAN module (Figure 13d) up and off the computer.
c.

a.
1

Wireless LAN
Module Removal
a. Remove the cover.
b. Disconnect the cable
and remove the screw.
c. The WLAN module will
pop up.
d. Lift the WLAN module
out.

5

b.
d.
4
3

2


5. WLAN Module.

• 1 Screw

Removing the Wireless LAN Module 2 - 17

2.Disassembly

Note: Make sure you
reconnect the antenna
cable to “1” + “2”
socket (Figure b).

Disassembly
Figure 14
Bluetooth Module
Removal

Removing the Bluetooth Module

1.
2.
3.
a. Remove the screw.
4.
b. Lfit the cover and remove
5.
the screw.
c. Disconnect the cable and
the connector.
d. Lift the Bluetooth module
up off the socket.

Turn off the computer, remove the battery (page 2 - 5).
Locate the Bluetooth bay cover, and remove the screw 1 and cover 2 .
Remove the screw 3 and turn the module over.
Carefully separate the Bluetooth module from the connector 4 and disconnect the cable 5 .
Lift the Bluetooth module 6 (Figure 14c) up and off the computer.
c.

a.

2.Disassembly

5
4

1

d.

b.
2


2. Cover
6. Bluetooth Module

• 2 Screws

2 - 18 Removing the Bluetooth Module

3

6

Disassembly

Removing the Keyboard
1. Turn off the computer, and remove the battery (page 2 - 5).
2. Press the four keyboard latches at the top of the keyboard to elevate the keyboard from its normal position (you
may need to use a small screwdriver to do this).
3. Carefully lift the keyboard 5 up, being careful not to bend the keyboard ribbon cable (Figure 15b).
4. Disconnect the keyboard ribbon cable 6 from the locking collar socket 7 .
a.

c.
1

2

3

4

Figure 15
Keyboard Removal
a. Press the four latches to
release the keyboard.
b. Lift the keyboard up and
disconnect the cable
from the locking collar.
c. Remove the keyboard.

Re-Inserting the Keyboard

b.
5

6
7

5

When re-inserting the
keyboard firstly align
the four keyboard tabs
at the bottom of the
keyboard with the slots
in the case.


5. Keyboard

Removing the Keyboard 2 - 19

2.Disassembly



Disassembly

Figure 16
Modem Removal
a. Remove the screws.
b. Turn the computer over,
remove the screws and
disconnect the cables.
c. Remove the screws.

Removing the Modem
1. Turn off the computer, remove the battery (page 2 - 5), HDD (page 2 - 6), component bay cover (page 2 - 11),
optical device (page 2 - 9), CPU (page 2 - 14), bluetooth (page 2 - 18) and keyboard (page 2 - 19).
2. Remove screws 1 - 21 from the bottom case.
3. Turn the computer over, remove screws 22 - 24 and disconnect cables 25 - 27 (Figure 17b).
4. For M760J/M760JU only - remove screws 28 - 29 (Figure 17c) from the rear of the computer.
M740J/M740JU
a.

3

1

4

5

21

20

4

2

5

18

17

2.Disassembly

1

8
7

2

M760J/M760JU

3

6

7

8

10

9

6

11

9
19
10

16

12

18

17

15
12

13

14

11
16

14

15

13

b.
25

25


• 20 Screws
(M740J/M740JU)/
26 Screws
(M760J/M760JU)

2 - 20 Removing the Modem

23

24

22

23

22

26

26
27

27

c.
28

29

Disassembly
5.
6.
7.
8.
9.

Carefully lift the top case 30 up and off the computer (Figure 17d).
Remove screws 31 - 33 from the computer.
Remove screws 34 - 35 from the modem module.
Lift the modem up and separate the modem from the connector 36 .
Lift the modem 37 off the computer.

Figure 17
Modem Removal
(cont’d.)
d. Lift the cover off the
computer.
e. Remove the screws.
f. Remove the screws and
disconnect the connector.
g. Lift the modem out.

d.
30

M740J/M740JU

M760J/M760JU

2.Disassembly

e.
33
33

32

32

31

31

f.
34
34
36

36

35

35


g.

30. Top Case
37. Modem

37

37

• 5 Screws

Removing the Modem 2 - 21

Part Lists

Appendix A: Part Lists
This appendix breaks down the M740J/M740JU/M760J/M760JU series notebook’s construction into a series of illustrations. The component part numbers are indicated in the tables opposite the drawings.
Note: This section indicates the manufacturer’s part numbers. Your organization may use a different system, so be sure
to cross-check any relevant documentation.
Note: Some assemblies may have parts in common (especially screws). However, the part lists DO NOT indicate the
total number of duplicated parts used.

A.Part Lists

Note: Be sure to check any update notices. The parts shown in these illustrations are appropriate for the system at the
time of publication. Over the product life, some parts may be improved or re-configured, resulting in new part numbers.

A - 1

Part Lists

Part List Illustration Location
The following table indicates where to find the appropriate part list illustration.
Table A- 1
Part List Illustration
Location

A.Part Lists

Parts

M740J

M740JU

M760J

M760JU

Top with Fingerprint

page A - 3

page A - 11

Top without Fingerprint

page A - 4

page A - 12

Bottom

page A - 5

page A - 6

page A - 13

page A - 14

LCD

page A - 7

page A - 15

HDD

page A - 8

page A - 16

COMBO

page A - 9

page A - 17

DVD-Dual Drive

page A - 10

page A - 18

A - 2 Part List Illustration Location

Part Lists

Top with Fingerprint (M740J/M740JU)

Figure A - 1

白色 (無鉛)
無鉛
無鉛

無鉛

無鉛
無鉛
無鉛
無鉛
無鉛
無鉛

無鉛
無鉛
無鉛
無鉛

Top with Fingerprint (M740J/M740JU) A - 3

A.Part Lists

Top with
Fingerprint
(M740J/M740JU)

Part Lists

Top without Fingerprint (M740J/M740JU)

A.Part Lists

Figure A - 2
Top without
Fingerprint
(M740J/M740JU)

白色 (無鉛)
無鉛
無鉛

無鉛

無鉛
無鉛
無鉛
無鉛
無鉛

無鉛
無鉛

無鉛
無鉛

A - 4 Top without Fingerprint (M740J/M740JU)

Part Lists

Bottom (M740J)

無鉛

無鉛

無鉛
無鉛
無鉛

無鉛
無鉛
無鉛

外

無鉛
無鉛
無鉛
無鉛
無鉛

外

無鉛
無鉛

無鉛

Figure A - 3
Bottom (M740J)

無鉛

無鉛
無鉛
無鉛
無鉛

無鉛
無鉛

無鉛
無鉛

無鉛
無鉛
凱碩

無鉛

無鉛

無鉛
無鉛
無鉛
無電鍍

無鉛

無鉛
無鉛

無鉛
無鉛
無電鍍

無鉛
無鉛

無鉛
無電鍍

無鉛
無鉛
無鉛

藍天3 互億

無鉛

無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無電鍍

無鉛
無鉛

導電布
導電布

無鉛
無鉛
無鉛

Bottom (M740J) A - 5

A.Part Lists

無鉛

海華

Part Lists

Bottom (M740JU)

無鉛

無鉛

無鉛
無鉛
無鉛

無鉛
無鉛
無鉛

外

無鉛
無鉛
無鉛
無鉛

A.Part Lists

Figure A - 4
Bottom (M740JU)

無鉛
無鉛

外

無鉛
無鉛
無鉛

海華

無鉛
無鉛

無鉛
無鉛
無鉛
無鉛
無鉛

無鉛

無鉛
無鉛

無鉛
無鉛
凱碩

無鉛

無鉛

無鉛
無鉛
無鉛

無鉛
無鉛

無鉛
無鉛
無鉛

無鉛
無鉛
無鉛
藍天3 互億

無鉛

無鉛
無鉛
無鉛
無鉛
無鉛
無鉛

導電布
導電布

無鉛
無鉛
無鉛

A - 6 Bottom (M740JU)

Part Lists

LCD (M740J/M740JU)

Figure A - 5

無鉛
無鉛
無鉛

無鉛
無鉛
無鉛

無鉛
無鉛
無鉛
無鉛
無鉛
無鉛

無鉛
無鋁箔

無鉛
精乘

無鉛

無鉛
無鉛
無鉛

無鉛
無鉛
無鉛

精乘

無鉛
無鉛

中性

電鑄薄膜鍍亮鉻）

無鉛
無鉛

無鉛
無鉛
無鉛

精乘
精乘

無鉛
無鉛

LCD (M740J/M740JU) A - 7

A.Part Lists

LCD (M740J/
M740JU)

Part Lists

HDD (M740J/M740JU)

A.Part Lists

Figure A - 6
HDD
(M74J/M740JU)

無鉛
(無鉛)

A - 8 HDD (M740J/M740JU)

Part Lists

COMBO (M740J/M740JU)

Figure A - 7

*(非耐落)

無鉛
無鉛

無鉛
無鉛
無鉛
無鉛

COMBO (M740J/M740JU) A - 9

A.Part Lists

COMBO
(M740J/M740JU)

Part Lists

DVD-Dual Drive (M740J/M740JU)

A.Part Lists

Figure A - 8
DVD-Dual Drive
(M740J/M740JU)

*(非耐落)

無鉛
無鉛

無鉛
無鉛
無鉛

A - 10 DVD-Dual Drive (M740J/M740JU)

Part Lists

Top with Fingerprint (M760J/M760JU)

Figure A - 9

白色 (無鉛)
白色

無鉛

無鉛
無鉛

白色

設變

無鉛
無鉛
無鉛
無鉛(背膠變更)

無鉛
無鉛
無鉛

無鉛
頭徑

頭厚

號穴 鍍白鎳 I頭 無鉛

無鉛
無鉛
無鉛

無鉛

Top with Fingerprint (M760J/M760JU) A - 11

A.Part Lists

Top with
Fingerprint
(M760J/M760JU)

Part Lists

Top without Fingerprint (M760J/M760JU)

A.Part Lists

Figure A - 10
Top without
Fingerprint
(M760J/M760JU)

白色 (無鉛)
白色

無鉛

無鉛
無鉛

白色

設變

無鉛
無鉛
無鉛
無鉛
無鉛(背膠變更)

無鉛
無鉛

無鉛
頭徑

頭厚

號穴 鍍白鎳 I頭 無鉛

無鉛

無鉛
無鉛

A - 12 Top without Fingerprint (M760J/M760JU)

Part Lists

Bottom (M760J)

無鉛

無鉛
無鉛

無鉛
無鉛
無鉛

導電布

無鉛

導電布

無鉛
無鉛
無鉛

無鉛
無鉛
無鉛
無鉛

無鉛

外

Figure A - 11
Bottom (M760J)

無鉛

外

無鉛
無鉛

無鉛
非耐落

無鉛

海華

無鉛
無鉛
無鉛
無鉛

無鉛

無鉛
無鉛

無鉛
凱碩

無鉛

無鉛

無鉛
無鉛

(黑色)(無鉛)
無鉛

無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
(黑色)

無鉛
無鉛

藍天3 互億

無鉛

無鉛
無鉛
無鉛

(黑色)
度,黑色
黑色

後設變咬花

無鉛
無鉛
無鉛

無鉛
無鉛

無鉛
無鉛

Bottom (M760J) A - 13

A.Part Lists

無鉛

Part Lists

Bottom (M760JU)

無鉛

無鉛
無鉛

無鉛
無鉛
無鉛

導電布

無鉛

導電布

無鉛
無鉛
無鉛
無鉛

無鉛
無鉛
無鉛

A.Part Lists

Figure A - 12
Bottom (M760JU)

無鉛
無鉛

外

無鉛

外

無鉛
無鉛

無鉛
非耐落

無鉛

海華

無鉛
無鉛
無鉛
無鉛

無鉛

無鉛
無鉛

無鉛
凱碩

無鉛

無鉛

無鉛
無鉛

(黑色)(無鉛)
無鉛

無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
(黑色)

無鉛
無鉛

藍天3 互億

無鉛

無鉛
無鉛
無鉛

(黑色)
度,黑色
黑色

後設變咬花

無鉛
無鉛
無鉛

無鉛
無鉛

無鉛
無鉛

A - 14 Bottom (M760JU)

Part Lists

LCD (M760J/M760JU)

Figure A - 13
無鉛
無鉛

無鉛
無鉛
無鉛

(非耐落)

無鉛
無鉛
頭徑

頭厚

號穴 鍍白鎳 頭 無鉛

無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛
無鉛

無鉛
無鉛

精乘

無鉛

黑色

惠貿

無鉛

黑色

惠貿

無鉛

無鉛

無鉛

無鉛

中性

電鑄薄膜鍍亮鉻)

(偉鎮)無鉛

無鉛

無鉛
無鉛
無鉛
后蓋保護

無鉛

LCD (M760J/M760JU) A - 15

A.Part Lists

無鉛

LCD (M760J/
M760JU)

Part Lists

HDD (M760J/M760JU)

A.Part Lists

Figure A - 14
HDD
(M760J /M760JU)

無鉛
(無鉛)

A - 16 HDD (M760J/M760JU)

Part Lists

COMBO (M760J/M760JU)

Figure A - 15

*(非耐落)

無鉛
無鉛

無鉛
黑色

無鉛
無鉛

COMBO (M760J/M760JU) A - 17

A.Part Lists

COMBO
(M760J/M760JU)

Part Lists

DVD-Dual Drive (M760J/M760JU)

A.Part Lists

Figure A - 16
DVD-Dual Drive
(M760J/M760JU)

*(非耐落)

無鉛
無鉛

無鉛
無鉛
黑色

無鉛
無鉛

A - 18 DVD-Dual Drive (M760J/M760JU)

Schematic Diagrams

Appendix B: Schematic Diagrams
This appendix has circuit diagrams of the M740J/M740JU/M760J/M760JU notebook’s PCB’s. The following table indicates where to find the appropriate schematic diagram.
Diagram - Page

Diagram - Page

Diagram - Page

HDMI, CRT - Page B - 18

VCORE VDD CORE - Page B - 34

Clock Generator - Page B - 3

SB700-1 - Page B - 19

VCORE VDD CORE - Page B - 35

CPU-1 - Page B - 4

SB700-2 - Page B - 20

1.8V, 0.9V - Page B - 36

CPU-2 - Page B - 5

SB700-3 - Page B - 21

1.1VS, 1.2V, 1.2VS, 2.5V - Page B - 37

CPU-3 - Page B - 6

SB700-4 - Page B - 22

VGA CORE 1.5VS - Page B - 38

CPU-4 - Page B - 7

New Card, Mini PCIE - Page B - 23

VDD3, VDD5 - Page B - 39

DDRII S0-DIMM 0 - Page B - 8

3G, PATA ODD, eSATA - Page B - 24

CHARGER, DC IN - Page B - 40

DDRII S0-DIMM 1 - Page B - 9

USB, FAN, TP, FP, MULTI CON - Page B - 25

CLICK FINGER BOARD FOR M76 - Page B - 41

RS780M-1 - Page B - 10

CARD READER - Page B - 26

MULTI FUNCTION BOARD - Page B - 42

RS780M-2 - Page B - 11

ISATA HDD, LED, HOTKEY, BT - Page B - 27

AUDIO BOARD - Page B - 43

RS780M-3 - Page B - 12

PCIE GIGALAN RTL8111C - Page B - 28

FINGER SENSOR BOARD - Page B - 44

M82-XT-1 - Page B - 13

AUDIO CODEC ALC662 - Page B - 29

POWER SWITCH BOARD FOR M74 - Page B - 45

M82-XT-2 - Page B - 14

AUDIO AMP2056 - Page B - 30

FINGER BOARD FOR M74 - Page B - 46

M82-XT-3 - Page B - 15

KBC ITE IT8512E - Page B - 31

EXTERNAL ODD BOARD FOR M76 - Page B - 47

DDRII 32MX16 - Page B - 16

1.8VS, 3,3VS, 5VS, 1.1VS, 3.3V - Page B - 32

POWER SWITCH BOARD FOR M76 - Page B - 48

LVDS, INVERTER - Page B - 17

VGA POWER & POWER GD - Page B - 33

Schematic
Diagrams

B.Schematic Diagrams

System Block Diagram - Page B - 2

Table B - 1


Version Note
The schematic diagrams in this chapter
are based upon version 6-7P-M74J9-003.
If your mainboard (or
other boards) are a later version, please
check with the Service
Center for updated diagrams (if required).

B - 1

Schematic Diagrams

System Block Diagram
CLEVO M740J(JU)/M760J(JU)

C L ICK FING E R B O AR D F O R M7 6

6-71-M74J0-D03A

D D R I I , 8 00 MT / S

6 -7 1 -M 7 6 S2 - D0 3C

AM D S1G2 CPU

EXTERNAL CLOCK GENERATOR

M UL TI FU N CTIO N BO A RD
In tSPK - R+ C CD + M D C

U NB U FFE RE D D D R 2
SO D IM M 0

C PU
Te m p e ra tu re se n s o r

638-Pin uFCPGA 638

IC S 9L PRS 480
6 4 P IN

6 -7 1 -M 7 4 S1 - D0 3

C hann el A

C hann el B

A UD IO Bo a r d
H e ad p ho n e +S PD IF+ Ex t
M i cr o p ho ne + US B X 1
6 - 71 - M 7 4S A-D 03 A

U NB U FFE RE D D D R 2
SO D IM M 1

HDT
SB- TS I

B.Schematic Diagrams

6 -7 1 -M 6 6 UF -D0 3

IN

OU T

FIN G ER S EN SO R B O AR D FO R M 76

L VD S C O N

6 -7 1 -M 7 4 SS- D0 3
FIN G ER B O A RD FO R M 74
6 -7 1 -M 7 4 SF -D0 3

Sheet 1 of 47
System Block
Diagram

Hype rT rans port
LI NK0

P O W E R S W IT CH BO A R D FO R M 74
L V DS MU X

M 82 X T-S

H D MI CO N

16 x 1 6

RS780M(C)
Hy pe rT ra ns port LI NK 0 C P U I/ F
DX 1 0 I G P( RS 78 0 )

P CI E x 16

E XTE R NA L O D D B O AR D F O R M7 6

LV DS /T M D S
CR T C O N

6 -7 1 -M 7 6 SN- D0 3

VGA
Te m p e ra tu re s en s o r

L V DS MU X

1 X 1 6 P CI E I/ F
1 X 4 P CI E I/ F W IT H SB

P O W E R S W IT CH BO A R D FO R M 76

A UD IO AM P
A P205 6A

6 X 1 P CI E I/ F

6 -7 1 -M 7 6 SS- D0 2
G P P P CI E IN T ERFAC E

P CI E4

M INIPC IE -3G
USB6

P CI E3

Ca rd R e ad er

H e a d p ho n e J a c k

P CIE 0

N E W C A RD

P CI E1

P CI E2

PC IE E TH E RN ET
R TL 8 1 11C

U SB4

PCI E
X4

M INIP CIE -W L
U SB 8

SPD IF J a c k

H D A UD IO I/ F

SB700
U SB 2 . 0
1 . 8V S,3 .3 V S, 5VS ,1. 1V S, 3.3 V, 5V

US B 2. 0 ( 1 0)

S ATA II I/ F

SA TA I I ( 1 P O RT S )
U SB #2
P ort 2

U S B# 0

U SB #1

P o rt 1

B l ue t o o th

A TA 6 6/ 1 00/ 133 I/ F

SP I I /F

C CD

U SB7

U SB 9

L P C I/ F
AC P I 1. 1
IN T RTC

V CO R E_ VD D _ CO R E
C PU_ VD D 0, C PU_ VD D D 1

SPI I/ F
Fi n g e r Pri n te r
U SB1 1

V CO R E_ VD D _ NB

S PI R O M

U SB 1. 1
( KB C )

1 . 8V , 0 .9 V

1 . 1V S , 1. 2V, 1.2 VS , 2. 5 V

L PC

D EB UG P O R T
K BC IT8 512E

V G A_ CO R E , 1. 5 V S
B AT TER Y CH A G ER
C PU F AN

V D D 3 , VD D 5

C H AR G ER ,D C IN

B - 2 System Block Diagram

A Z A L IA C O DE C
A L C 662
HD D x1
SA TA # 1

AZA LI A HD A U DI O

P o rt 0

AT A 6 6/ 1 00 / 1 33
V G A P OE W R & P W R G D
3 . 3V S_V G A, 1. 8VS _V G A, 1. 1VS_ VG A

In t Sp e ak er x 2

MDC

INT
K EY BO A RD

PS2
TO UC H PAD

SPI RO M

PA TA O D D

M IC In J a c k
e -SA TA x 1
SA TA# 2

Schematic Diagrams

Clock Generator
3 .3 V S

CL K _ V D D

1 .2 V S

C LK _V D D I O
.1 U_ 1 6 V _ 0 4

.1 U_ 1 6 V _ 0 4

. 1U _ 1 6V _ 04

C 362
C 3 63

C 3 48

C7 5 6

C 36 1

. 1U _ 1 6 V _ 04

. 1 U _ 1 6V _0 4

.1 U_ 1 6 V _ 0 4

C 753

C3 4 4

C 755

C 754

C3 4 9

C 336

C3 2 3

C 3 58

C3 5 9

C3 7 2
10 U _ 6. 3V _0 8

1 U_ 1 6 V _ 0 6
1 0 U _6 . 3 V _ 0 8

.1 U_ 1 6 V _ 0 4
. 1 U _ 16 V _ 0 4

. 1 U _ 1 6V _0 4

. 1 U _ 16 V _ 0 4

P la c e v e ry
c lose to U1
C L K_ VD D

H C B 1 6 08 K F -1 21 T 2 5 -0 6

L39

H C B 1 6 08 K F -1 21 T 2 5 -0 6

Pla c e w i thi n 0 .5 " of
CLKG EN
U 30
Z0 20 1

C3 5 0
.1 U_ 1 6 V _ 0 4

4
7

Z0 20 2 56
60

C3 3 9
63
26
48
55
35
16
40

.1 U_ 1 6 V _ 0 4

CL K _ V D D

25
47
34
11
17

C LK _ V D D I O

Layout note:
PLACE CRYSTAL WITHIN 500
MILS OF ICS9LPRS480

1
24
46
52
43
33
10
18

X3
2

1

R 47 4
*1 M _ 04

2 7 P_ 5 0 V_ 0 4

1 4 . 3 1 8 MH z

Z0 20 3 61
Z0205
R 475
Z0 20 4 62
*0 _ 0 4 02 _ 5 m i _l s h o rt
Z0 20 9 23
P C I E _ E X P C A R D _ C L K R E Q#
45
Z0 21 0 44
Z0 21 1 39
W LA N _ C LK R E Q #
38

C 34 7
2 7 P _ 5 0V _0 4

. 1 U _ 16 V _ 0 4

CL K _ V D D

R 469

8 .2 K _ 0 4
C 90 8

Z0 20 6 51
*1 U _ 16 V _ 0 6 2
3

7 ,8 ,1 9 S CL K 0
7 , 8 , 1 9 S D A TA 0

2008/03/18

G
G
G
G

N
N
N
N

D1
D2
D3
D4

C P U K G 0 T _ LP R S
C P U K G0 C _ LP R S

V DD A_ 2 7
G N DA_ 2 7
V DD RE F
G N DR E F
V
V
V
V
V
V
V

DD
DD
DD
DD
DD
DD
DD

V
V
V
V
V

DD
DD
DD
DD
DD

G
G
G
G
G
G
G
G

N
N
N
N
N
N
N
N

48
AT IG
CP U
HT T
SB_ SR C
SR C
SATA

A T I G _I O
CP U_ IO
SB _ S R C_ IO
S R C_ IO 1
S R C_ IO 2

D4 8
DAT IG 1
DC P U
DH T T
D S A TA
D S B _S R C
DSR C 1
DSR C 2

X1
X2
C
C
C
C
C

L KR
L KR
L KR
L KR
L KR

RS
RS
RS
RS

S R C 7 T _ L P R S / 2 7 MH z_ S S
S R C 7 C _ LP R S / 2 7 M H z _ N S

S B _ S R C 0 T _ LP R S
S B _ S R C 0 C _ LP R S
S B _ S R C 1 T _ LP R S
S B _ S R C 1 C _ LP R S
S R C 0 T _ LP
S R C 0 C _ LP
S R C 1 T _ LP
S R C 1 C _ LP
S R C 2 T _ LP
S R C 2 C _ LP
S R C 3 T _ LP
S R C 3 C _ LP
S R C 4 T _ LP
S R C 4 C _ LP

RS
RS
RS
RS
RS
RS
RS
RS
RS
RS

S R C 6T / S A T A T _ LP R S
S R C 6 C / S A T A C _ LP R S
E Q0 #
E Q1 #
E Q2 #
E Q3 #
E Q4 #

H T T 0 T/ 6 6 M _ LP R S
H T T 0 C / 6 6 M _ LP R S
4 8 M Hz _ 0

P D#

R E F 0 / S E L _H T T 6 6
RE F 1 /SE L _ SA T A
RE F 2 /S E L _ 2 7

S MB C L K
S MB D A T
T h e rm
T h e rm
T h e rm
T h e rm

A TI G 0 T _ LP
A T I G0 C _ LP
A TI G 1 T _ LP
A T I G1 C _ LP

a l _G
a l _G
a l _G
a l _G

N
N
N
N

D1
D2
D3
D4

T h erm
T h erm
T h erm
T h erm
T h erm

a l _ GN
a l _ GN
a l _ GN
a l _ GN
a l _ GN

D
D
D
D
D

5
6
7
8
9

50
49

C PU_ C L K P_ R
C P U_ C L K N_ R

RN 4 8 1
2

4 * 0 _4 P 2R _ 0 4_ 4 m i l _s h o rt
3

CPU_CL KP 5
CPU_CL KN 5

30
29
28
27

N B GF X_ C L K P _ R
N B GF X_ C L K N _ R
G F X _C L K P _ R
G F X _C L K N _ R

RN 5 0 1
2
RN 5 2 1
2

4 * 0 _4 P 2R _ 0 4_ 4 m i l _s h o rt
3
4 * 0 _4 P 2R _ 0 4_ 4 m i l _s h o rt
3

NBGFX_CLKP 10
NBGFX_CLKN 1 0
GFX_CLKP 12
GFX_CLKN 1 2

6
5

Z0207

37
36
32
31

N BS L IN K _ CL K P_ R
N BS L IN K _ CL K N _ R
S B S RC _ CL K P _ R
S B S RC _ CL K N _ R

R 477

33_04

RN 4 7 1
2
RN 4 9 1
2

N B GP P _ C L K P _ R
N B GP P _ C L K N _ R
P CIE _ E X P CA R D_ C L K P _ RRN
P C I E _ E X P C A R D _ C L K N _R
P C I E _ P E 1 _ C LK P _ R
RN
P C I E _ P E 1 _ C LK N _ R
P C I E _ P E 2 _ C LK P _ R
RN
P C I E _ P E 2 _ C LK N _ R
P C I E _ P E 3 _ C LK P _ R
RN
P C I E _ P E 3 _ C LK N _ R

22
21
20
19
15
14
13
12
9
8

53 1
2
56 1
2
55 1
2
54 1
2

EXT_VGA_27 M 13
4 * 0 _4 P 2R _ 0 4_ 4 m i l _s h o rt
3
4 * 0 _4 P 2R _ 0 4_ 4 m i l _s h o rt
3

SBL INK_ CLKP 1 0
SBL INK_ CLKN 10
SBSRC_CLKP 18
SBSRC_CLKN 1 8

4
3
4
3
4
3
4
3

PCIE_EXPCARD_CLKP 22
PCIE_EXPCARD_CLKN 22
PCIE_LAN_CLKP 27
PCIE_LAN_CLKN 27
PCIE_CR_ CLKP 2 5
PCIE_CR_ CLKN 25
PCIE_WLAN_CL KP 22
PCIE_WLAN_CL KN 22

* 0 _4 P 2R _ 0 4_ 4 m i l _s h o rt
* 0 _4 P 2R _ 0 4_ 4 m i l _s h o rt
* 0 _4 P 2R _ 0 4_ 4 m i l _s h o rt
* 0 _4 P 2R _ 0 4_ 4 m i l _s h o rt

Clo ck ch ip ha s i nte rn al se ria l te rmi na tion s
for dif fer en cia l p air s, exte rn al r e sis tor s ar e
re se rve d fo r de bu g pu rp os e .

Sheet 2 of 47
Clock Generator

42
41
54
53

N B H T R E F _ C LK P _ R
N B H T R E F _ C LK N _ R

64

Z0208

59
58
57

S E L _ H T 66
S E L _ S A TA
S E L _ 2 7 MH z

RN 5 1 1
2

4 * 0 _4 P 2R _ 0 4_ 4 m i l _s h o rt
3

NBHT_CLKP 10
NBHT_CLKN 10
CLK_48M_USB 1 9

NB_ OSC 10
RS780 1.1 V

GN
GN
GN
GN
GN

D
D
D
D
D

5
6
7
8
9

R 163
9 0 . 9 _ 1 % _ 06

ICS9 L P R S4 8 0

C LK _ V D D

CL K _ V D D
* d e fa u l t

R 47 3
R 467
*8 . 2 K _ 0 4
1 9 , 2 2 P C I E _ E X P C A R D _ C L K R E Q#
22 W L A N _ C L K R E Q#

R 471

R1 6 6

1

66 M H z 3 . 3 V s i n gl e e n d e d H T T c ol c k

0*

10 0 M H z d i f f e re n t i a l H T T c l oc k

S E L _ HT T 6 6

R 468
* 8 .2 K _ 0 4
P C I E _ E X P C A R D _ C L K R E Q#
W L A N _ C LK R E Q #

S E L _ H T6 6 * 8 . 2 K _ 04
SEL _ SATA
S E L _ 2 7 MH z

*8 . 2 K _ 0 4

8 .2 K _ 0 4

1

1 0 0 MH z n o n -s p re ad i n g d fi f e re n t i a l S A T A c l oc k

0*

1 0 0 MH z s p re a d ni g d i f f er en t i a l S R C c l o c k

1*

2 7 MH z si n g l ed c l o c k

0

1 0 0 MH z s p re a d ni g d i f f er en t i a l S R C c l o c k

S EL _ SATA

S E L _ 27 M H z
R 47 2
8 .2 K _ 0 4

R 470
*8 . 2 K _ 0 4

R1 6 4
* 8. 2K _0 4

Clock Generator B - 3

B.Schematic Diagrams

L41

C L K_ VD D

C 343

.1 U_ 1 6 V _ 0 4

Pla ce ne xt to VDD 48

Schematic Diagrams

CPU-1
U28A

1.2VS
D1
D2
D3
D4

1.5A
60M IL

B.Schematic Diagrams

Sheet 3 of 47
CPU-1

9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9

HT_NB_CPU_CAD_H0
HT_NB_CPU_CAD_L0
HT_NB_CPU_CAD_H1
HT_NB_CPU_CAD_L1
HT_NB_CPU_CAD_H2
HT_NB_CPU_CAD_L2
HT_NB_CPU_CAD_H3
HT_NB_CPU_CAD_L3
HT_NB_CPU_CAD_H4
HT_NB_CPU_CAD_L4
HT_NB_CPU_CAD_H5
HT_NB_CPU_CAD_L5
HT_NB_CPU_CAD_H6
HT_NB_CPU_CAD_L6
HT_NB_CPU_CAD_H7
HT_NB_CPU_CAD_L7
HT_NB_CPU_CAD_H8
HT_NB_CPU_CAD_L8
HT_NB_CPU_CAD_H9
HT_NB_CPU_CAD_L9
HT_NB_CPU_CAD_H10
HT_NB_CPU_CAD_L10
HT_NB_CPU_CAD_H11
HT_NB_CPU_CAD_L11
HT_NB_CPU_CAD_H12
HT_NB_CPU_CAD_L12
HT_NB_CPU_CAD_H13
HT_NB_CPU_CAD_L13
HT_NB_CPU_CAD_H14
HT_NB_CPU_CAD_L14
HT_NB_CPU_CAD_H15
HT_NB_CPU_CAD_L15

9
9
9
9

HT_NB_CPU_CLK_H0
HT_NB_CPU_CLK_L0
HT_NB_CPU_CLK_H1
HT_NB_CPU_CLK_L1

9
9
9
9

HT_NB_CPU_CTL_H0
HT_NB_CPU_CTL_L0
HT_NB_CPU_CTL_H1
HT_NB_CPU_CTL_L1

E3
E2
E1
F1
G3
G2
G1
H1
J1
K1
L3
L2
L1
M1
N3
N2
E5
F5
F3
F4
G5
H5
H3
H4
K3
K4
L5
M5
M3
M4
N5
P5
J3
J2
J5
K5
N1
P1
P3
P4

VLDT_A0
VLDT_A1
VLDT_A2
VLDT_A3

1.2VS

HT LINK

L0_CADIN_H0
L0_CADIN_L0
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H2
L0_CADIN_L2
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H5
L0_CADIN_L5
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H7
L0_CADIN_L7
L0_CADIN_H8
L0_CADIN_L8
L0_CADIN_H9
L0_CADIN_L9
L0_CADIN_H10
L0_CADIN_L10
L0_CADIN_H11
L0_CADIN_L11
L0_CADIN_H12
L0_CADIN_L12
L0_CADIN_H13
L0_CADIN_L13
L0_CADIN_H14
L0_CADIN_L14
L0_CADIN_H15
L0_CADIN_L15

VLDT_B0
VLDT_B1
VLDT_B2
VLDT_B3

L0_CADOUT_H0
L0_CADOUT_L0
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H15
L0_CADOUT_L15

L0_CLKIN_H0
L0_CLKIN_L0
L0_CLKIN_H1
L0_CLKIN_L1

L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1

L0_CTLIN_H0
L0_CTLIN_L0
L0_CTLIN_H1
L0_CTLIN_L1

L0_CTLOUT_H0
L0_CTLOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1

AE2
AE3
AE4
AE5

1.5A
60M IL

AD1
AC1
AC2
AC3
AB1
AA1
AA2
AA3
W2
W3
V1
U1
U2
U3
T1
R1
AD4
AD3
AD5
AC5
AB4
AB3
AB5
AA5
Y5
W5
V4
V3
V5
U5
T4
T3

HT_CPU_NB_CAD_H0 9
HT_CPU_NB_CAD_L0 9
HT_CPU_NB_CAD_H1 9
HT_CPU_NB_CAD_L1 9
HT_CPU_NB_CAD_H2 9
HT_CPU_NB_CAD_L2 9
HT_CPU_NB_CAD_H3 9
HT_CPU_NB_CAD_L3 9
HT_CPU_NB_CAD_H4 9
HT_CPU_NB_CAD_L4 9
HT_CPU_NB_CAD_H5 9
HT_CPU_NB_CAD_L5 9
HT_CPU_NB_CAD_H6 9
HT_CPU_NB_CAD_L6 9
HT_CPU_NB_CAD_H7 9
HT_CPU_NB_CAD_L7 9
HT_CPU_NB_CAD_H8 9
HT_CPU_NB_CAD_L8 9
HT_CPU_NB_CAD_H9 9
HT_CPU_NB_CAD_L9 9
HT_CPU_NB_CAD_H10 9
HT_CPU_NB_CAD_L10 9
HT_CPU_NB_CAD_H11 9
HT_CPU_NB_CAD_L11 9
HT_CPU_NB_CAD_H12 9
HT_CPU_NB_CAD_L12 9
HT_CPU_NB_CAD_H13 9
HT_CPU_NB_CAD_L13 9
HT_CPU_NB_CAD_H14 9
HT_CPU_NB_CAD_L14 9
HT_CPU_NB_CAD_H15 9
HT_CPU_NB_CAD_L15 9

Y1
W1
Y4
Y3
R2
R3
T5
R5

SOCKET_638_PIN

* If V LDT is co n n ect e d o n ly on o n e s id e,
o ne 4.7u F cap sh o uld b e ad d ed t o
t he is land s ide
1.2VS

4.7U_6.3V_06

4.7U_6.3V_06

C678

C706

4.7U_6.3V_06

C702

.22U_10V_04

.22U_10V_04
C681

C685

180P_NPO_50V_04

Place close to socket

B - 4 CPU-1

C709

C705
180P_NPO_50V_04

HT_CPU_NB_CLK_H0
HT_CPU_NB_CLK_L0
HT_CPU_NB_CLK_H1
HT_CPU_NB_CLK_L1

9
9
9
9

HT_CPU_NB_CTL_H0
HT_CPU_NB_CTL_L0
HT_CPU_NB_CTL_H1
HT_CPU_NB_CTL_L1

9
9
9
9

Schematic Diagrams

CPU-2
Processor Memory In terface

VTT
75 0 mA

U 28 C
ME M: D A T A

8 ME M _ MB _ D A T A [ 0 . . 6 3]
0 .9 V

0 . 9V

U 28 B

R 442
R 432

1. 8V

3 9. 2_ 1 % _ 04
3 9. 2_ 1 % _ 04

7 ME M _ MA 0 _ O D T 0
7 ME M _ MA 0 _ O D T 1

AF1 0
AE1 0

M_ Z P
M_ Z N

ME M _ MA _ R E S E T #

H1 6

ME M _ MA 1 _ O D T 0
ME M _ MA 1 _ O D T 1

T1 9
V2 2
U2 1
V1 9

7 ME M _ MA 0 _ C S # 0
7 ME M _ MA 0 _ C S # 1

Z04 01
Z04 02

T2 0
U1 9
U2 0
V2 0
J2 2
J2 0

7 ME M _ MA _ C K E 0
7 ME M _ MA _ C K E 1

7 M E M_ M A _ C L K 1 _ P
7 M E M_ M A _ C L K 1 _ N
7 M E M_ M A _ C L K 7 _ P
7 M E M_ M A _ C L K 7 _ N

Z04 05
Z04 06

7 ME M _ MA _ A D D [ 0 . . 1 5 ]

M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M

EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM

_ MA _ A D
_ MA _ A D
_ MA _ A D
_ MA _ A D
_ MA _ A D
_ MA _ A D
_ MA _ A D
_ MA _ A D
_ MA _ A D
_ MA _ A D
_ MA _ A D
_ MA _ A D
_ MA _ A D
_ MA _ A D
_ MA _ A D
_ MA _ A D

N1 9
N2 0
E1 6
F1 6
Y1 6
AA1 6
P1 9
P2 0
N2 1
M2 0
N2 2
M1 9
M2 2
L2 0
M2 4
L2 1
L1 9
K2 2
R2 1
L2 2
K2 0
V2 4
K2 4
K1 9

D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D1 0
D1 1
D1 2
D1 3
D1 4
D1 5

R2 0
R2 3
J2 1

7 M E M_ M A _ B A N K 0
7 M E M_ M A _ B A N K 1
7 M E M_ M A _ B A N K 2

R1 9
T2 2
T2 4

7 M E M_ M A _ R A S #
7 M E M_ M A _ C A S #
7 M E M_ M A _ W E #

TT 1
TT 2
TT 3
TT 4

M E M: C MD / C TR L / C L K

M EM ZP
M EM ZN

VT T5
VT T6
VT T7
VT T8
VT T9

V T T _S E N S E

R S V D _ M1

M EM VREF

M
M
M
M

A 0 _ OD
A 0 _ OD
A 1 _ OD
A 1 _ OD

T0
T1
T0
T1

M
M
M
M

A 0 _ CS _ L 0
A 0 _ CS _ L 1
A 1 _ CS _ L 0
A 1 _ CS _ L 1

R S V D_ M 2
MB 0 _ OD T 0
MB 0 _ OD T 1
MB 1 _ OD T 0
M B 0 _ CS _ L 0
M B 0 _ CS _ L 1
M B 1 _ CS _ L 0

M A _ CK E 0
M A _ CK E 1

M B _ CK E 0
M B _ CK E 1

M
M
M
M
M
M
M
M

A _ CL K _ H 5
A _ CL K _ L 5
A _ CL K _ H 1
A _ CL K _ L 1
A _ CL K _ H 7
A _ CL K _ L 7
A _ CL K _ H 4
A _ CL K _ L 4

M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M

A_ AD
A_ AD
A_ AD
A_ AD
A_ AD
A_ AD
A_ AD
A_ AD
A_ AD
A_ AD
A_ AD
A_ AD
A_ AD
A_ AD
A_ AD
A_ AD

M B _ C LK _ H 5
M B _ CL K_ L 5
M B _ C LK _ H 1
M B _ CL K_ L 1
M B _ C LK _ H 7
M B _ CL K_ L 7
M B _ C LK _ H 4
M B _ CL K_ L 4

D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D1 0
D1 1
D1 2
D1 3
D1 4
D1 5

M B_ ADD 0
M B_ ADD 1
M B_ ADD 2
M B_ ADD 3
M B_ ADD 4
M B_ ADD 5
M B_ ADD 6
M B_ ADD 7
M B_ ADD 8
M B_ ADD 9
M B _ A DD 1 0
M B _ A DD 1 1
M B _ A DD 1 2
M B _ A DD 1 3
M B _ A DD 1 4
M B _ A DD 1 5

M A_ BAN K0
M A_ BAN K1
M A_ BAN K2

M B_ BAN K0
M B_ BAN K1
M B_ BAN K2
MB _ R A S _ L
MB _ C A S _ L
M B_ W E_ L

M A _ RA S _ L
M A _ CA S _ L
M A_ W E_ L

W10
AC 1 0
AB1 0
AA1 0
A1 0
C P U _M _ V R E F _ S U S

Y 10 Z 0 4 0 7
W17
B 1 8 M E M _M B _ R E S E T #
W26
W23
Y 26 M E M _M B 1 _ OD T 0

ME M_ MB 0_ O D T 0 8
ME M_ MB 0_ O D T 1 8

V2 6
W25
U 22 Z 0 4 0 8

ME M_ MB 0_ C S # 0 8
ME M_ MB 0_ C S # 1 8

J25
H 26

ME M_ MB _C K E 0 8
ME M_ MB _C K E 1 8

P2 2 Z0 4 0 9
R 22 Z 0 4 1 0
A1 7
A1 8
AF1 8
AF1 7
R 26 Z 0 4 1 1
R 25 Z 0 4 1 2
P2 4
N 24
P2 6
N 23
N 26
L23
N 25
L24
M 26
K2 6
T26
L26
L25
W24
J23
J24

ME
ME
ME
ME
ME
ME
ME
ME
ME
ME
ME
ME
ME
ME
ME
ME

M_ M
M_ M
M_ M
M_ M
M_ M
M_ M
M_ M
M_ M
M_ M
M_ M
M_ M
M_ M
M_ M
M_ M
M_ M
M_ M

ME M_ MB _C L K 1 _ P 8
ME M_ MB _C L K 1 _ N 8
ME M_ MB _C L K 7 _ P 8
ME M_ MB _C L K 7 _ N 8

B _ A DD
B _ A DD
B _ A DD
B _ A DD
B _ A DD
B _ A DD
B _ A DD
B _ A DD
B _ A DD
B _ A DD
B _ A DD
B _ A DD
B _ A DD
B _ A DD
B _ A DD
B _ A DD

M E M _M B _ A D D [ 0 . . 1 5 ] 8

0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15

R 24
U 26
J26

ME M_ MB _B A N K 0 8
ME M_ MB _B A N K 1 8
ME M_ MB _B A N K 2 8

U 25
U 24
U 23

ME M_ MB _R A S # 8
ME M_ MB _C A S # 8
ME M_ MB _W E # 8

S O C K E T _6 3 8 _ P I N
8 M E M_ M B _ D M [ 0 . . 7 ]
1. 8 V

1114

R 1 79

3 .3 V

1 .8 V

C4 1 1

R1 9 2
*1 K _ 1 % _ 0 4
8

*. 1 U F _ 16 V _ 0 4
Z 0 41 3

3

+

C P U _ M_ V R E F _ S U S
U1 0 A
*L M 35 8
1

*1 0 _ 1% _ 0 4
R 181

Z0 41 4

R4 5 3
1 K _ 0 4_ 1 %

W idt h 2 0 mil , le ngth < 6 inch 8

W idt h 20 m il , le ngth < 6 i nch

C P U _ M_ V R E F _ S U S

R1 7 8
*1 0 K _ 0 4

4

2

R 1 90
*1 K _ 1 % _ 0 4

*0 _ 0 4

C 39 0
* 1 00 0 P F _ 5 0 V _ 0 4 Z 04 1 5

R 18 5

R1 8 0

C7 2 3
C 313

C 31 5

C3 0 6
1 0 U _ 1 0 V _ 08

*0 _ 04

C 721

R 45 7
1 K _ 0 4_ 1 %

* 0 _0 4
. 1 U _ X 7R _ 1 0V _0 4

1 0 0 0P _X 7 R _5 0 V _ 0 4

* 10 0 0 P _ X 7R _ 5 0V _0 4
*. 1 U _X 7 R _1 0 V _ 0 4
0 .9 V

8
8
8
8
8
8
8
8
8
8
8
8
8
8
8

M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M

EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM

_M
_M
_M
_M
_M
_M
_M
_M
_M
_M
_M
_M
_M
_M
_M
_M

B _ DQ
B _ DQ
B _ DQ
B _ DQ
B _ DQ
B _ DQ
B _ DQ
B _ DQ
B _ DQ
B _ DQ
B _ DQ
B _ DQ
B _ DQ
B _ DQ
B _ DQ
B _ DQ

S0 _ P
S0 _ N
S1 _ P
S1 _ N
S2 _ P
S2 _ N
S3 _ P
S3 _ N
S4 _ P
S4 _ N
S5 _ P
S5 _ N
S6 _ P
S6 _ N
S7 _ P
S7 _ N

EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM
EM

_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D

ATA0
ATA1
ATA2
ATA3
ATA4
ATA5
ATA6
ATA7
ATA8
ATA9
ATA1 0
ATA1 1
ATA1 2
ATA1 3
ATA1 4
ATA1 5
ATA1 6
ATA1 7
ATA1 8
ATA1 9
ATA2 0
ATA2 1
ATA2 2
ATA2 3
ATA2 4
ATA2 5
ATA2 6
ATA2 7
ATA2 8
ATA2 9
ATA3 0
ATA3 1
ATA3 2
ATA3 3
ATA3 4
ATA3 5
ATA3 6
ATA3 7
ATA3 8
ATA3 9
ATA4 0
ATA4 1
ATA4 2
ATA4 3
ATA4 4
ATA4 5
ATA4 6
ATA4 7
ATA4 8
ATA4 9
ATA5 0
ATA5 1
ATA5 2
ATA5 3
ATA5 4
ATA5 5
ATA5 6
ATA5 7
ATA5 8
ATA5 9
ATA6 0
ATA6 1
ATA6 2
ATA6 3

C1 1
A1 1
A1 4
B1 4
G1 1
E1 1
D1 2
A1 3
A1 5
A1 6
A1 9
A2 0
C1 4
D1 4
C1 8
D1 8
D2 0
A2 1
D2 4
C2 5
B2 0
C2 0
B2 4
C2 4
E2 3
E2 4
G2 5
G2 6
C2 6
D2 6
G2 3
G2 4
AA2 4
AA2 3
A D2 4
AE2 4
AA2 6
AA2 5
A D2 6
AE2 5
A C2 2
A D2 2
AE2 0
AF2 0
AF2 4
AF2 3
A C2 0
A D2 0
A D1 8
AE1 8
A C1 4
A D1 4
AF1 9
A C1 8
AF1 6
AF1 5
AF1 3
A C1 2
AB1 1
Y1 1
AE1 4
AF1 4
AF1 1
A D1 1

M
M
M
M
M
M
M
M

EM
EM
EM
EM
EM
EM
EM
EM

_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D
_ MB _ D

M0
M1
M2
M3
M4
M5
M6
M7

A1 2
B1 6
A2 2
E2 5
AB2 6
AE2 2
A C1 6
A D1 2
C1 2
B1 2
D1 6
C1 6
A2 4
A2 3
F2 6
E2 6
A C2 5
A C2 6
AF2 1
AF2 2
AE1 6
A D1 6
AF1 2
AE1 2

M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M

B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA
B _ DA

TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA
TA

0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63

M
M
M
M
M
M
M
M

B _ DM
B _ DM
B _ DM
B _ DM
B _ DM
B _ DM
B _ DM
B _ DM

0
1
2
3
4
5
6
7

M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M

B _ DQ
B _ DQ
B _ DQ
B _ DQ
B _ DQ
B _ DQ
B _ DQ
B _ DQ
B _ DQ
B _ DQ
B _ DQ
B _ DQ
B _ DQ
B _ DQ
B _ DQ
B _ DQ

S _ H0
S_ L 0
S _ H1
S_ L 1
S _ H2
S_ L 2
S _ H3
S_ L 3
S _ H4
S_ L 4
S _ H5
S_ L 5
S _ H6
S_ L 6
S _ H7
S_ L 7

MA _D A T A 0
MA _D A T A 1
MA _D A T A 2
MA _D A T A 3
MA _D A T A 4
MA _D A T A 5
MA _D A T A 6
MA _D A T A 7
MA _D A T A 8
MA _D A T A 9
M A _ DAT A 1 0
M A _ DAT A 1 1
M A _ DAT A 1 2
M A _ DAT A 1 3
M A _ DAT A 1 4
M A _ DAT A 1 5
M A _ DAT A 1 6
M A _ DAT A 1 7
M A _ DAT A 1 8
M A _ DAT A 1 9
M A _ DAT A 2 0
M A _ DAT A 2 1
M A _ DAT A 2 2
M A _ DAT A 2 3
M A _ DAT A 2 4
M A _ DAT A 2 5
M A _ DAT A 2 6
M A _ DAT A 2 7
M A _ DAT A 2 8
M A _ DAT A 2 9
M A _ DAT A 3 0
M A _ DAT A 3 1
M A _ DAT A 3 2
M A _ DAT A 3 3
M A _ DAT A 3 4
M A _ DAT A 3 5
M A _ DAT A 3 6
M A _ DAT A 3 7
M A _ DAT A 3 8
M A _ DAT A 3 9
M A _ DAT A 4 0
M A _ DAT A 4 1
M A _ DAT A 4 2
M A _ DAT A 4 3
M A _ DAT A 4 4
M A _ DAT A 4 5
M A _ DAT A 4 6
M A _ DAT A 4 7
M A _ DAT A 4 8
M A _ DAT A 4 9
M A _ DAT A 5 0
M A _ DAT A 5 1
M A _ DAT A 5 2
M A _ DAT A 5 3
M A _ DAT A 5 4
M A _ DAT A 5 5
M A _ DAT A 5 6
M A _ DAT A 5 7
M A _ DAT A 5 8
M A _ DAT A 5 9
M A _ DAT A 6 0
M A _ DAT A 6 1
M A _ DAT A 6 2
M A _ DAT A 6 3
MA _ D
MA _ D
MA _ D
MA _ D
MA _ D
MA _ D
MA _ D
MA _ D

M0
M1
M2
M3
M4
M5
M6
M7

M A _ DQ S _ H0
MA _ D QS _ L 0
M A _ DQ S _ H1
MA _ D QS _ L 1
M A _ DQ S _ H2
MA _ D QS _ L 2
M A _ DQ S _ H3
MA _ D QS _ L 3
M A _ DQ S _ H4
MA _ D QS _ L 4
M A _ DQ S _ H5
MA _ D QS _ L 5
M A _ DQ S _ H6
MA _ D QS _ L 6
M A _ DQ S _ H7
MA _ D QS _ L 7

G 12
F12
H 14
G 14
H 11
H 12
C 13
E1 3
H 15
E1 5
E1 7
H 17
E1 4
F14
C 17
G 17
G 18
C 19
D 22
E2 0
E1 8
F18
B2 2
C 23
F20
F22
H 24
J19
E2 1
E2 2
H 20
H 22
Y 24
A B 24
A B 22
A A 21
W 22
W 21
Y 22
A A 22
Y 20
A A 20
A A 18
A B 18
A B 21
AD 2 1
AD 1 9
Y 18
AD 1 7
W 16
W 14
Y 14
Y 17
A B 17
A B 15
AD 1 5
A B 13
AD 1 3
Y 12
W 11
A B 14
A A 14
A B 12
A A 12
E1 2
C 15
E1 9
F24
AC 2 4
Y 19
A B 16
Y 13
G 13
H 13
G 16
G 15
C 22
C 21
G 22
G 21
AD 2 3
AC 2 3
A B 19
A B 20
Y 15
W 15
W 12
W 13

M E M_ M A _ D A T A 0
M E M_ M A _ D A T A 1
M E M_ M A _ D A T A 2
M E M_ M A _ D A T A 3
M E M_ M A _ D A T A 4
M E M_ M A _ D A T A 5
M E M_ M A _ D A T A 6
M E M_ M A _ D A T A 7
M E M_ M A _ D A T A 8
M E M_ M A _ D A T A 9
ME M_ MA _D A T A 1 0
ME M_ MA _D A T A 1 1
ME M_ MA _D A T A 1 2
M E M_ M A _ D A T A 1 3
M E M_ M A _ D A T A 1 4
M E M_ M A _ D A T A 1 5
M E M_ M A _ D A T A 1 6
M E M_ M A _ D A T A 1 7
M E M_ M A _ D A T A 1 8
M E M_ M A _ D A T A 1 9
M E M_ M A _ D A T A 2 0
M E M_ M A _ D A T A 2 1
M E M_ M A _ D A T A 2 2
M E M_ M A _ D A T A 2 3
M E M_ M A _ D A T A 2 4
M E M_ M A _ D A T A 2 5
M E M_ M A _ D A T A 2 6
M E M_ M A _ D A T A 2 7
M E M_ M A _ D A T A 2 8
M E M_ M A _ D A T A 2 9
M E M_ M A _ D A T A 3 0
M E M_ M A _ D A T A 3 1
M E M_ M A _ D A T A 3 2
M E M_ M A _ D A T A 3 3
M E M_ M A _ D A T A 3 4
M E M_ M A _ D A T A 3 5
M E M_ M A _ D A T A 3 6
M E M_ M A _ D A T A 3 7
M E M_ M A _ D A T A 3 8
M E M_ M A _ D A T A 3 9
M E M_ M A _ D A T A 4 0
M E M_ M A _ D A T A 4 1
M E M_ M A _ D A T A 4 2
M E M_ M A _ D A T A 4 3
M E M_ M A _ D A T A 4 4
M E M_ M A _ D A T A 4 5
M E M_ M A _ D A T A 4 6
M E M_ M A _ D A T A 4 7
M E M_ M A _ D A T A 4 8
M E M_ M A _ D A T A 4 9
M E M_ M A _ D A T A 5 0
M E M_ M A _ D A T A 5 1
M E M_ M A _ D A T A 5 2
M E M_ M A _ D A T A 5 3
M E M_ M A _ D A T A 5 4
M E M_ M A _ D A T A 5 5
M E M_ M A _ D A T A 5 6
M E M_ M A _ D A T A 5 7
M E M_ M A _ D A T A 5 8
M E M_ M A _ D A T A 5 9
M E M_ M A _ D A T A 6 0
M E M_ M A _ D A T A 6 1
M E M_ M A _ D A T A 6 2
M E M_ M A _ D A T A 6 3
ME
ME
ME
ME
ME
ME
ME
ME

M_ MA
M_ MA
M_ MA
M_ MA
M_ MA
M_ MA
M_ MA
M_ MA

_D
_D
_D
_D
_D
_D
_D
_D

M0
M1
M2
M3
M4
M5
M6
M7

ME M _ MA _ D A T A [ 0 . . 6 3 ] 7

Sheet 4 of 47
CPU-2

ME M _ MA _ D M[ 0 . . 7 ] 7

M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M

E M_ M
E M_ M
E M_ M
E M_ M
E M_ M
E M_ M
E M_ M
E M_ M
E M_ M
E M_ M
E M_ M
E M_ M
E M_ M
E M_ M
E M_ M
E M_ M

A _ DQ
A _ DQ
A _ DQ
A _ DQ
A _ DQ
A _ DQ
A _ DQ
A _ DQ
A _ DQ
A _ DQ
A _ DQ
A _ DQ
A _ DQ
A _ DQ
A _ DQ
A _ DQ

S0 _ P
S0 _ N
S1 _ P
S1 _ N
S2 _ P
S2 _ N
S3 _ P
S3 _ N
S4 _ P
S4 _ N
S5 _ P
S5 _ N
S6 _ P
S6 _ N
S7 _ P
S7 _ N

7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7

Place close to socket
S OC K E T _ 6 38 _ P I N
4 .7 U_ 6 .3 V _ 0 6
C 750

* 4 . 7 U _ 6 . 3 V _ 06

C 722

4 .7 U_ 6 .3 V _ 0 6
C7 2 5

4 .7 U_ 6 .3 V _ 0 6

C7 4 2

. 22 U _1 0 V _ 0 4
C7 3 8

*. 2 2 U _ 1 0 V _ 0 4

C7 3 9

. 2 2U _ 10 V _ 0 4
C 73 2

*. 2 2 U _ 1 0 V _ 04

1 00 0 P _ X 7 R _ 5 0 V _ 04

C 73 0

C 7 35

C 7 17

* 1 00 0 P _ X 7 R _ 5 0 V _ 04

1 0 00 P _ X 7 R _ 5 0 V _ 0 4
C 718

C7 4 6

*1 0 00 P _ X 7 R _ 5 0 V _ 0 4

1 8 0 P _ N P O _ 5 0V _ 0 4
C7 2 4

C7 2 8

1 80 P _ N P O_ 5 0 V _ 0 4

1 8 0P _N P O _ 50 V _ 0 4
C7 2 7

C7 2 6

*1 8 0 P _ N P O_ 5 0V _0 4

CPU-2 B - 5

B.Schematic Diagrams

Z04 03
Z04 04

V
V
V
V

To SO-DIMM
0 socket

D1 0
C1 0
B1 0
A D1 0

PL ACE T HEM CLOSE T O
CPU WITHIN1 "

M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M

To SO-DIMM
1 socket

VTT
7 50 mA

Schematic Diagrams

CPU-3
C 2 09
C 22 0
4 .7 U _6 . 3V _0 6 . 22U _ 16 V _06

2 C P U _C L KP
C 2 41
3 900 P _X 7R _ 50V _ 04

AMD CHECK
K n o w n l o w te m p e r atu r e P G i s s u e ,
R e p l a ce w i th a n o th e r p ar t
R 105
3 00 _0 4
1 8 C P U _P W R GD

2 C P U _C L KN

K eep tra ce fro m re si s or to C P U w i thi n 0. 6 "
k ee p tra ce fro m ca ps to C P U w i thi n 1. 2 "

R 4 00
R 4 02

1 .2 V S
C P U _V D D 0

3 3 C PU _ V D D 0 _ R U N _ F B _H
3 3 C PU _ V D D 0 _ R U N _ F B _L
R 100
3 00 _0 4

AF 4
AF 5
AE 6

44 . 2_ 1%_ 04 C P U _ H TR E F 0
44 . 2_ 1%_ 04 C P U _ H TR E F 1

2 .2 _1 %_ 06

C PU _ V D D 1 P R 13 5

2. 2_ 1% _06
Y6
AB 6
PR 134

L D T_ S TOP #
*0_ 04 02 _5 mi _l sho rt

CL OS E T O S O CKE T

R 39 8 20K _ 04
Z 05 02

3. 3V S

2 . 2_ 1%_ 06 C P U _D B R D Y
C P U _T MS
C P U _T C K
C P U _T R ST #
C P U _T D I

G10
AA 9
A C9
A D9
AF 9

34. 8 K _04

R 391
3 00 _0 4

Sheet 5 of 47
CPU-3

S
LD T _R S T#
*0 _04 02 _5 mi _l sh ort

C P U _T ES T 25 _H _ BY P A S SC L K _H
C P U _T ES T 25 _L_ B Y PA S S C LK _L

D

R 57 3
R 57 4

L D T_ R ST #_ H D T

Q4 5
2N 700 2W

20 08/ 03/ 18

C P U _LD T_R E Q#

10 C P U _ LD T _R E Q#

C P U _T ES T 18_ P LL TE S T1
C P U _T ES T 19_ P LL TE S T0
R 3 93
3 00 _04

G

R 3 92

1 8 C P U _L D T_ R ST #

3. 3V S

3 00 _0 4 C P U _T ES T 21 _S C A N EN
C P U _T ES T 20 _S C A N C LK 2
3 00 _0 4 C P U _T ES T 24 _S C A N C LK 1
C P U _T ES T 22 _S C A N SH I F TE N
C P U _T ES T 12 _S C A N SH I F TE N B
C P U _T ES T 27 _S I N GLE C H A I N
C P U _T ES T 9_ AN A L OGI N
C P U _T ES T 6_ D IE C R A C K MON

R 4 31
*0_ 04

1 .8 V

A D7
H 10
G9
E9
E8
AB 8
AF 7
AE 7
AE 8
A C8
AF 8
C2
AA 6
A3
A5
B3
B5
C1

R 4 12
R 41 8
3 90 _0 4 39 0_ 04
19 SC L K 3
1 9 S D AT A 3

R 417

C P U _S I C
*0 _0 40 2_ 5mi _l sh ort

R 419

C P U _S I D
*0 _0 40 2_ 5mi _l sh ort

K EY 1
K EY 2

V DDA 1
V DDA 2
C LK I N _ H
C LK I N _ L

SVC
SVD

R E SE T _L
P WR OK
LD T S TOP _L
LD T R E Q_L

T H E R MTR I P _L
PR OC H OT _L
MEMH OT _L

S IC
S ID
A LE R T_ L

T H E R MD C
TH E R MD A

M1 1
W 18

R 4 06
1 K_ 04

A6
A4

C P U _S V C _R
C P U _S V D _R

R 39 9

R 42 6

R 4 01

30 0_ 04

300 _0 4

3 00 _04

R 404
* 10 K_ 04

R 38 7
10 K _0 4

Z0 50 3

E
2N 3 90 4
* 0_ 040 2_ 5m li _s ho rt

C

AF 6
AC7
AA8

C P U _T H ER MTR I P #_ 1. 8V
C P U _P R OC H OT #_ R
C P U _ME MH OT #_ 1. 8V

R 27 7

W7
W8

C P U _T H ER MD C R 4 49
C P U _T H ER MD A R 4 51

*0_ 04 02 _1 0mi l _s hort H _ TH E R MD C
*0_ 04 02 _1 0mi l _s hort H _ TH E R MD A

W9
Y9

Z 05 06
Z 05 07

R 38 6
*10 K_ 04

Z 05 05
Q 47

C

Q46
C P U _P R OC H OT # 18
C P U _ME MH OT # 7, 8

E
*2N 3 90 4

C P U _ TH E R MTR I P # 1 9, 3 8

H T_ R E F0
H T_ R E F1
V D D 0_ FB _ H
V D D 0_ FB _ L

VD D I O_ F B_ H
V D D I O_F B _L

V D D 1_ FB _ H
V D D 1_ FB _ L

V D D N B_ F B_ H
V D D N B _F B _L

DB RDY
TMS
TC K
TR S T _L
TD I

D B R E Q_L
T DO

TE S T2 3

TE S T2 8_ H
TE S T28 _L

TE S T1 8
TE S T1 9

TE ST 17
TE ST 16
TE ST 15
TE ST 14

TE S T2 5_ H
TE S T2 5_ L
TE S T2 1
TE S T2 0
TE S T2 4
TE S T2 2
TE S T1 2
TE S T2 7

TE S T7
TE ST 10
TE S T8
TE S T2 9_ H
TE S T29 _L

TE S T9
TE S T6
R S VD
R S VD
R S VD
R S VD
R S VD

R S V D 10
R S VD 9
R S VD 8
R S VD 7
R S VD 6

1
2
3
4
5

P R3 5

2. 2 _1 %_0 6

C P U _ VD D N B

H6
G6

C P U _V D D N B _R U N _ F B_ H 34
C P U _V D D N B _R U N _ F B_ L 3 4

E 1 0 C P U _D B R E Q#

P R3 6
R 5 72

2. 2 _1% _0 6
30 0_ 04

1 .8 V

A E 9 C P U _T D O

C L O S E T O S O C K ET

J7
H8

C P U _T E ST 28 _H _ PL LC H R Z _ P
C P U _T E ST 28 _L _P LL C H R Z _N

D7
E7
F7
C7

C P U _T E ST 17 _B P 3
C P U _T E ST 16 _B P 2
C P U _T E ST 15 _B P 1
C P U _T E ST 14 _B P 0

C3
K8

C P U _T E ST 7_ AN A L OG_T
C P U _T E ST 10 _A N A LOGOU T

C4

C P U _T E ST 8_ D I G_T

C9
C8

C P U _T E ST 29 _H _ FB C L KOU T _P
C P U _T E ST 29 _L _F B C LK OU T_ N

H1 8
H1 9
AA7
D5
C5

S OC K ET _6 38 _P I N

200 8/0 3/1 8

Thermal IC

VID Override Circuit
Q4 8
*A O34 09
S
D

3. 3 V

R 4 56
*0 _0 4
Z0 50 9

C 71 9

TH M_ V D D

R 45 4
0_ 04

20 mi l

3 . 3V

G
Z 05 10

C 720

1 . 8V

*. 1U _ X7 R _1 0V _0 4
R 45 9
*10 0K _1 %_ 04

R 45 5
*2 0K _1 %_ 04

R 45 8
1U _ 16 V_ 06
10 0K _0 4

V DD3

1 . 8V
R 4 41

D

Z 05 11

3 0 T H ER M_ R S T#

1 K _04

Q49
*2 N 70 02W

TH E R M_ R ST # G

R 45 0

R 4 52

4. 7 K_ 04

4 . 7K _0 4

R 43 4

R 1 03

1K _ 04

*2 . 2K _0 4
R 11 9

S

B.Schematic Diagrams

C P U _T ES T 23_ TS T U PD
R 39 7

1. 8 VS

R6
P6

2. 2 _1 %_0 6
F6
E6

PR 3 8

3 3 C PU _ V D D 1 _ R U N _ F B _H
3 3 C PU _ V D D 1 _ R U N _ F B _L
R9 7

10, 1 8 C P U _L D T_ ST OP #

PR3 7

B7
A7
F 10
C6

LD T _R S T #
C 242
P W R GD
16 9_ 1%_ 04
LD T _S T OP#
C P U _L D T_ R EQ#
390 0P _ X7 R _50 V _0 4
C 22 3 . 1 U _X 7R _ 10 V_ 04
C P U _S I C
C P U _S I D
p l ac e t h e m to C P U w it h i n 1 . 5 "
C P U _A LE R T

P W R GD
*0_ 04 02 _5 mi _l sho rt

1. 8 VS

A9
A8

C P U _C L K I N _S C _P
C P U _C L K I N _S C _N

R 11 8

3. 3 V

1 . 8V

C 246
390 0P _ X7 R _50 V _0 4
tolerance 10% 1113

1 . 8V

P W R GD
U 28D
F8
F9

C 2 10
10 U _1 0V _ 08

1. 8 VS

VDDA
250mA
C PU _ V D D A_ R U N

B

F C M1 60 8K T-3 00 T07

B

L2 5

R 1 08

1. 8 V

L A Y OU T : R OU T E V D D A T R A C E A P P R OX .
50 m i l s W I D E (U S E 2 x 25 m i l T R A C ES T O
EX I T B A L L F I E L D ) A N D 5 0 0 m il s L O N G .

2 . 5V S

C P U _ SV C _ R

R 43 0

C P U _S V C
*0 _0 40 2_ 5mi l _s hort

C P U _ SV D _ R

R 43 3

C P U _S V D
*0 _0 40 2_ 5mi l _s hort

P W R GD

R 10 6

P WR GD 1
*0 _0 40 2_ 5mi l _s hort

C P U _ SV C 33 , 34

3. 3 VS

10 K_ 04

U 29
1
2
3
4

H _ TH E R MD A 10 MI LE
H _ TH E R MD C 10 MI LE
C 71 6
10 00 P _X7 R _5 0V _ 04

V DD
S C LK
D+
S D A TA
DA LE R T#
T H E R M# GN D
A D M10 32A R M

8
7
6
5

Z 05 13 R 4 46

S MC _C PU _ TH E R M 30
S MD _C PU _ TH E R M 30
T H ER M _A LE R T# 19 ,3 0

*0 _0 4

R 1 15

Z 05 01

C P U _ SV D 33 , 34
G

4 . 7K _0 4

S

D C PU _ P WR GD _ SV I D _ R EG
Q14

La you t N ote :
Ro ute H_ THE RMD A a nd
H_ THE RMD C o n s ame la yer .
10 mi l t rac e o n 1 0 m il
sp aci ng.

HDT Connector
L D T_R ST #
P WR G D
C PU _D BR E Q#
C PU _D BR D Y
C PU _T CK
C PU _T MS
C PU _T DI
C PU _T RS T#
C PU _T DO

1 . 8V

Ne ar to
AD M10 32

2N 7 00 2W
R 44 8

*0 _0 40 2_ 5mi l _s hor t

R 44 7

10K _ 04

T H M_V D D
R 4 27
*22 0_ 04

J1
1
3
5
7
9
11
13
15
17
19
21
23
K EY

*A SP -68 20 0-0 7

B - 6 CPU-3

Z 05 12

2
4
6
8
10
12
14
16
18
20
22
24
26

2008/03/24
PW R GD
C PU _D BR E Q#

C 9 09
. 1U _X 7R _ 10 V _04
L D T_ R ST #_ H D T

C 9 10
.1 U _X 7R _ 10 V _04

R 42 0

R 10 9

*2 20 _0 4 *22 0_ 04

R 1 12

*0_ 04

C P U _ PW R GD _ SV I D _R E G 33 , 34

Schematic Diagrams

CPU-4
U 28 F
U2 8 E

CP U_ V D D0

VDD 0 COR E
0. 37 5- 1. 50 0V
18 A

C PU_ VDD NB
3A

1 .8 V

VDDI O
2A

K1 6
M1 6
P1 6
T16
V1 6
H2 5
J17
K1 8
K2 1
K2 3
K2 5
L17
M1 8
M2 1
M2 3
M2 5
N1 7

C P U _ V DD 1

VD
VD
VD
VD
VD
VD
VD
VD
VD
VD
VD
VD
VD
VD
VD
VD
VD
VD
VD
VD
VD
VD
VD

D0 _ 1
D0 _ 2
D0 _ 3
D0 _ 4
D0 _ 5
D0 _ 6
D0 _ 7
D0 _ 8
D0 _ 9
D0 _ 1 0
D0 _ 1 1
D0 _ 1 2
D0 _ 1 3
D0 _ 1 4
D0 _ 1 5
D0 _ 1 6
D0 _ 1 7
D0 _ 1 8
D0 _ 1 9
D0 _ 2 0
D0 _ 2 1
D0 _ 2 2
D0 _ 2 3

VD
VD
VD
VD
VD

DN
DN
DN
DN
DN

B_ 1
B_ 2
B_ 3
B_ 4
B_ 5

VD
VD
VD
VD
VD
VD
VD
VD
VD
VD
VD
VD

DIO
DIO
DIO
DIO
DIO
DIO
DIO
DIO
DIO
DIO
DIO
DIO

1
2
3
4
5
6
7
8
9
10
11
12

V D D1 _ 1
V D D1 _ 2
V D D1 _ 3
V D D1 _ 4
V D D1 _ 5
V D D1 _ 6
V D D1 _ 7
V D D1 _ 8
V D D1 _ 9
V D D 1_ 1 0
V D D 1_ 1 1
V D D 1_ 1 2
V D D 1_ 1 3
V D D 1_ 1 4
V D D 1_ 1 5
V D D 1_ 1 6
V D D 1_ 1 7
V D D 1_ 1 8
V D D 1_ 1 9
V D D 1_ 2 0
V D D 1_ 2 1
V D D 1_ 2 2
V D D 1_ 2 3
V D D 1_ 2 4
V D D 1_ 2 5
V D D 1_ 2 6
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V

S O C K E T _6 3 8 _ P I N

DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD

I O2 7
I O2 6
I O2 5
I O2 4
I O2 3
I O2 2
I O2 1
I O2 0
I O1 9
I O1 8
I O1 7
I O1 6
I O1 5
I O1 4
I O1 3

P8
P1 0
R 4
R 7
R 9
R 11
T2
T6
T8
T10
T12
T14
U 7
U 9
U 11
U 13
U 15
V6
V8
V1 0
V1 2
V1 4
W4
Y 2
AC 4
AD 2
Y 25
V2 5
V2 3
V2 1
V1 8
U 17
T25
T23
T21
T18
R 17
P2 5
P2 3
P2 1
P1 8

VD D1 CO RE
1 .3 75 -1 .5 00 V
1 8A

1 .8 V

VDD IO
2A

AA4
AA1 1
AA1 3
AA1 5
AA1 7
AA1 9
AB2
AB7
AB9
AB2 3
AB2 5
A C1 1
A C1 3
A C1 5
A C1 7
A C1 9
A C2 1
A D6
A D8
A D2 5
AE1 1
AE1 3
AE1 5
AE1 7
AE1 9
AE2 1
AE2 3
B4
B6
B8
B9
B1 1
B1 3
B1 5
B1 7
B1 9
B2 1
B2 3
B2 5
D6
D8
D9
D1 1
D1 3
D1 5
D1 7
D1 9
D2 1
D2 3
D2 5
E4
F2
F11
F13
F15
F17
F19
F21
F23
F25
H7
H9
H2 1
H2 3
J4

V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V

SS1
SS2
SS3
SS4
SS5
SS6
SS7
SS8
SS9
SS1 0
SS1 1
SS1 2
SS1 3
SS1 4
SS1 5
SS1 6
SS1 7
SS1 8
SS1 9
SS2 0
SS2 1
SS2 2
SS2 3
SS2 4
SS2 5
SS2 6
SS2 7
SS2 8
SS2 9
SS3 0
SS3 1
SS3 2
SS3 3
SS3 4
SS3 5
SS3 6
SS3 7
SS3 8
SS3 9
SS4 0
SS4 1
SS4 2
SS4 3
SS4 4
SS4 5
SS4 6
SS4 7
SS4 8
SS4 9
SS5 0
SS5 1
SS5 2
SS5 3
SS5 4
SS5 5
SS5 6
SS5 7
SS5 8
SS5 9
SS6 0
SS6 1
SS6 2
SS6 3
SS6 4
SS6 5

S OC K E T _ 6 38 _ P I N

V S S 66
V S S 67
V S S 68
V S S 69
V S S 70
V S S 71
V S S 72
V S S 73
V S S 74
V S S 75
V S S 76
V S S 77
V S S 78
V S S 79
V S S 80
V S S 81
V S S 82
V S S 83
V S S 84
V S S 85
V S S 86
V S S 87
V S S 88
V S S 89
V S S 90
V S S 91
V S S 92
V S S 93
V S S 94
V S S 95
V S S 96
V S S 97
V S S 98
V S S 99
V S S 1 00
V S S 1 01
V S S 1 02
V S S 1 03
V S S 1 04
V S S 1 05
V S S 1 06
V S S 1 07
V S S 1 08
V S S 1 09
V S S 1 10
V S S 1 11
V S S 1 12
V S S 1 13
V S S 1 14
V S S 1 15
V S S 1 16
V S S 1 17
V S S 1 18
V S S 1 19
V S S 1 20
V S S 1 21
V S S 1 22
V S S 1 23
V S S 1 24
V S S 1 25
V S S 1 26
V S S 1 27
V S S 1 28
V S S 1 29

J6
J8
J10
J12
J14
J16
J18
K 2
K 7
K 9
K 11
K 13
K 15
K 17
L6
L8
L10
L12
L14
L16
L18
M7
M9
A C6
M 17
N 4
N 8
N 10
N 16
N 18
P 2
P 7
P 9
P 11
P 17
R 8
R 10
R 16
R 18
T7
T9
T11
T13
T15
T17
U 4
U 6
U 8
U 10
U 12
U 14
U 16
U 18
V 2
V 7
V 9
V 11
V 13
V 15
V 17
W 6
Y 21
Y 23
N 6

BOTTOM SIDE DECOUPLING
C P U_ V D D0

.2 2 U_ 1 0 V _ 0 4
C 25 0

10 U _ 6. 3 V _ 0 8

C 20 4

C2 0 8

C 234

C2 4 9

2 2U _ _ Y 5 V _ 6 . 3 V _ 08
2 2 U_ _ Y 5 V _ 6 .3 V _ 0 8
2 2 U _ _ Y 5 V _ 6 . 3 V _ 08

1 8 0 P _ N P O_ 5 0V _0 4
C 23 9

C2 2 4

. 0 1 U _1 6 V _ 0 4

C P U_ V D D1

.2 2 U_ 1 0 V _ 0 4
C 68 8

22 U _ 10 V _ 1 2

C 68 2

2 2U _ 1 0V _1 2

C6 7 5

C 660

C2 3 1

22 U _1 0 V _ 1 2 2 2 U _ 1 0 V _ 1 2

C P U_ V D DN B

1 8 0 P _ N P O_ 5 0V _0 4
C 23 7

C2 1 8

. 0 1 U _1 6 V _ 0 4

1 .8 V

2 2 U _1 0 V _ 1 2
C 71 1

. 2 2U _ 1 0V _0 4

C 715

22 U _ 10 V _ 1 2

C 29 2

2 2 U _ 1 0 V _ 12

C2 9 3

C3 0 7

C 7 47

2 2 U _1 0 V _ 1 2 . 2 2 U _ 1 0 V _ 04

C2 5 3

18 0 P _ X 7 R _ 5 0V _0 4
C 30 8

Sheet 6 of 47
CPU-4

1 8 0 P _ X 7R _ 5 0V _0 4

DECOUPLING BETWEEN PROCESSOR AND DIMMs
PLACE CLOSE TO PROCESSOR AS POSSIBLE
1 . 8V

4 . 7 U _6 . 3 V _ 0 6
C 29 7

4 . 7U _ 6 . 3V _0 6

C 74 1

*4 . 7 U _6 . 3 V _ 0 6

. 2 2 U _1 0 V _ 0 4
C 29 8

4. 7 U _ 6. 3 V _ 0 6

C 7 40

C 3 02

*. 2 2 U _1 0 V _ 0 4
C 2 59

. 2 2 U _ 1 0V _0 4

C 7 52

. 01 U _1 6 V _ 0 4
C 748

*. 2 2 U _1 0 V _ 0 4

C 303

1 8 0 P _ N P O _ 5 0V _0 4
C7 5 1

C7 3 7

. 01 U _ 16 V _ 0 4

CPU-4 B - 7

B.Schematic Diagrams

C P U _ V DD NB

G 4
H 2
J9
J11
J13
J15
K6
K1 0
K1 2
K1 4
L4
L7
L9
L11
L13
L15
M2
M6
M8
M1 0
N 7
N 9
N1 1

Schematic Diagrams

DDRII S0-DIMM 0
SO-DIMM 0
J_ D I MM_1 A

4 ME M_MA _ AD D [0 . . 15 ]

4
4
4
4
4
4

Sheet 7 of 47
DDRII S0-DIMM 0

ME M_M A0 _C S # 0
ME M_M A0 _C S # 1
ME M_M A_ C LK 1 _P
ME M_M A_ C LK 1 _N
ME M_M A_ C LK 7 _P
ME M_M A_ C LK 7 _N
4 ME M_M A_ C K E0
4 ME M_M A_ C K E1
4 ME M_ MA _C A S #
4 ME M_ MA _R A S #
4 MEM _MA _W E #

2 , 8, 19 S C LK 0
2 , 8, 19 S D AT A 0

R 18 7

R 18 9

10 K_ 04

1 0K _ 04

M
M
M
M
M
M
M
M

EM_ MA _D QS 0 _P
EM_ MA _D QS 1 _P
EM_ MA _D QS 2 _P
EM_ MA _D QS 3 _P
EM_ MA _D QS 4 _P
EM_ MA _D QS 5 _P
EM_ MA _D QS 6 _P
EM_ MA _D QS 7 _P

4
4
4
4
4
4
4
4

M
M
M
M
M
M
M
M

EM_ MA _D QS 0 _N
EM_ MA _D QS 1 _N
EM_ MA _D QS 2 _N
EM_ MA _D QS 3 _N
EM_ MA _D QS 4 _N
EM_ MA _D QS 5 _N
EM_ MA _D QS 6 _N
EM_ MA _D QS 7 _N

ME M_ MA_ B AN K0
ME M_ MA_ B AN K1
ME M_ MA0 _C S # 0
ME M_ MA0 _C S # 1
ME M_ MA_ C LK 1 _P
ME M_ MA_ C LK 1 _N
ME M_ MA_ C LK 7 _P
ME M_ MA_ C LK 7 _N
ME M_ MA_ C K E 0
ME M_ MA_ C K E 1
ME M_ MA_ C A S #
ME M_ MA_ R A S #
ME M_ MA_ W E#
S A 0_ D I M0_ 1
S A 1_ D I M0_ 1
S C LK 0
S D A TA 0

1 07
1 06
1 10
1 15
30
32
1 64
1 66
79
80
1 13
1 08
1 09
1 98
2 00
1 97
1 95

ME M_ MA0 _OD T0 1 14
ME M_ MA0 _OD T1 1 19

4 ME M_MA 0 _OD T 0
4 ME M_MA 0 _OD T 1
4 MEM _MA _D M [0 . . 7]

4
4
4
4
4
4
4
4

1 02
1 01
1 00
99
98
97
94
92
93
91
1 05
90
89
1 16
86
84
85

ME M_ MA_ D M0 10
ME M_ MA_ D M1 26
ME M_ MA_ D M2 52
ME M_ MA_ D M3 67
ME M_ MA_ D M4 1 30
ME M_ MA_ D M5 1 47
ME M_ MA_ D M6 1 70
ME M_ MA_ D M7 1 85
ME M_ MA_ D QS 0_ P
13
ME M_ MA_ D QS 1_ P
31
ME M_ MA_ D QS 2_ P
51
ME M_ MA_ D QS 3_ P
70
ME M_ MA_ D QS 4_ P 1 31
ME M_ MA_ D QS 5_ P 1 48
ME M_ MA_ D QS 6_ P 1 69
ME M_ MA_ D QS 7_ P 1 88
ME M_ MA_ D QS 0_ N 11
ME M_ MA_ D QS 1_ N 29
ME M_ MA_ D QS 2_ N 49
ME M_ MA_ D QS 3_ N 68
ME M_ MA_ D QS 4_ N 1 29
ME M_ MA_ D QS 5_ N 1 46
ME M_ MA_ D QS 6_ N 1 67
ME M_ MA_ D QS 7_ N 1 86
1 . 8V

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A 1 0/ A P
A1 1
A1 2
A1 3
A1 4
A1 5
A 1 6_ BA 2
BA0
BA1
S0 #
S1 #
CK0
CK0 #
CK1
CK1 #
CKE0
CKE1
CAS#
RAS#
W E#
SA0
SA1
S CL
S DA
OD T0
OD T1
DM
DM
DM
DM
DM
DM
DM
DM

0
1
2
3
4
5
6
7

DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ

S0
S1
S2
S3
S4
S5
S6
S7

D Q S0 #
D Q S1 #
D Q S2 #
D Q S3 #
D Q S4 #
D Q S5 #
D Q S6 #
D Q S7 #
2-1 73 40 73 -1

5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
12 3
12 5
13 5
13 7
12 4
12 6
13 4
13 6
14 1
14 3
15 1
15 3
14 0
14 2
15 2
15 4
15 7
15 9
17 3
17 5
15 8
16 0
17 4
17 6
17 9
18 1
18 9
19 1
18 0
18 2
19 2
19 4

D Q0
D Q1
D Q2
D Q3
D Q4
D Q5
D Q6
D Q7
D Q8
D Q9
D Q1 0
D Q1 1
D Q1 2
D Q1 3
D Q1 4
D Q1 5
D Q1 6
D Q1 7
D Q1 8
D Q1 9
D Q2 0
D Q2 1
D Q2 2
D Q2 3
D Q2 4
D Q2 5
D Q2 6
D Q2 7
D Q2 8
D Q2 9
D Q3 0
D Q3 1
D Q3 2
D Q3 3
D Q3 4
D Q3 5
D Q3 6
D Q3 7
D Q3 8
D Q3 9
D Q4 0
D Q4 1
D Q4 2
D Q4 3
D Q4 4
D Q4 5
D Q4 6
D Q4 7
D Q4 8
D Q4 9
D Q5 0
D Q5 1
D Q5 2
D Q5 3
D Q5 4
D Q5 5
D Q5 6
D Q5 7
D Q5 8
D Q5 9
D Q6 0
D Q6 1
D Q6 2
D Q6 3

MEM_ MA _D A T A0
MEM_ MA _D A T A1
MEM_ MA _D A T A2
MEM_ MA _D A T A3
MEM_ MA _D A T A4
MEM_ MA _D A T A5
MEM_ MA _D A T A6
MEM_ MA _D A T A7
MEM_ MA _D A T A8
MEM_ MA _D A T A9
MEM_ MA _D A T A1 0
MEM_ MA _D A T A1 1
MEM_ MA _D A T A1 2
MEM_ MA _D A T A1 3
MEM_ MA _D A T A1 4
MEM_ MA _D A T A1 5
MEM_ MA _D A T A2 0
MEM_ MA _D A T A1 7
MEM_ MA _D A T A1 8
MEM_ MA _D A T A2 1
MEM_ MA _D A T A2 3
MEM_ MA _D A T A2 2
MEM_ MA _D A T A1 9
MEM_ MA _D A T A1 6
MEM_ MA _D A T A2 4
MEM_ MA _D A T A2 5
MEM_ MA _D A T A2 7
MEM_ MA _D A T A2 6
MEM_ MA _D A T A2 8
MEM_ MA _D A T A2 9
MEM_ MA _D A T A3 0
MEM_ MA _D A T A3 1
MEM_ MA _D A T A3 2
MEM_ MA _D A T A3 8
MEM_ MA _D A T A3 3
MEM_ MA _D A T A3 4
MEM_ MA _D A T A3 6
MEM_ MA _D A T A3 7
MEM_ MA _D A T A3 5
MEM_ MA _D A T A3 9
MEM_ MA _D A T A4 0
MEM_ MA _D A T A4 1
MEM_ MA _D A T A4 2
MEM_ MA _D A T A4 3
MEM_ MA _D A T A4 4
MEM_ MA _D A T A4 5
MEM_ MA _D A T A4 6
MEM_ MA _D A T A4 7
MEM_ MA _D A T A4 8
MEM_ MA _D A T A4 9
MEM_ MA _D A T A5 0
MEM_ MA _D A T A5 1
MEM_ MA _D A T A5 2
MEM_ MA _D A T A5 3
MEM_ MA _D A T A5 4
MEM_ MA _D A T A5 5
MEM_ MA _D A T A5 6
MEM_ MA _D A T A5 7
MEM_ MA _D A T A6 2
MEM_ MA _D A T A5 8
MEM_ MA _D A T A6 0
MEM_ MA _D A T A6 1
MEM_ MA _D A T A6 3
MEM_ MA _D A T A5 9

0. 9 V

ME M_MA _ D AT A [ 0. . 63 ] 4

M EM_ MA _B A N K 2

4
3

1 RN9
2 4 P2 R X4 7_ 04

M EM_ MA _A D D 9
M EM_ MA _A D D 1 2

4
3

1 RN1 0
2 4 P2 R X4 7_ 04

M EM_ MA _A D D 8
M EM_ MA _A D D 1

4
3

1 RN1 1
2 4 P2 R X4 7_ 04

M EM_ MA _A D D 5
M EM_ MA _A D D 3

4
3

1 RN1 2
2 4 P2 R X4 7_ 04

C 39 6

4
3

1 RN1 3
2 4 P2 R X4 7_ 04

C 37 7

M EM_ MA _A D D 1 0

4 ME M_ MA _C A S #

4
3

1 RN1 4
2 4 P2 R X4 7_ 04

4 ME M_ MA 0_ C S# 1
4 ME M_ MA 0_ OD T1

4
3

1 RN1 5
2 4 P2 R X4 7_ 04

1
2

4 RN1 6
3 4 P2 R X4 7_ 04

4 ME M_ MA _C K E 0

C 39 4

*. 1U _ X7 R _1 0V _ 04
1. 8V
. 1U _ X7 R _1 0V _ 04

C 39 5

4 ME M_ MA _W E #

*. 1U _ X7 R _1 0V _ 04
1. 8V
. 1U _ X7 R _1 0V _ 04

C 39 8
M EM_ MA _B A N K 0

4 ME M_ MA _C K E 1

*. 1U _ X7 R _1 0V _ 04
1. 8V
. 1U _ X7 R _1 0V _ 04

C 39 3
C 37 4

*. 1U _ X7 R _1 0V _ 04
1. 8V
. 1U _ X7 R _1 0V _ 04

C 39 7
M EM_ MA _A D D 1 5

C 37 6
M EM_ MA _A D D 1 4
M EM_ MA _A D D 7

1
2

4 RN1 7
3 4 P2 R X4 7_ 04

M EM_ MA _A D D 1 1
M EM_ MA _A D D 6

1
2

4 RN1 8
3 4 P2 R X4 7_ 04

C 37 5

M EM_ MA _A D D 4
M EM_ MA _A D D 2

1
2

4 RN1 9
3 4 P2 R X4 7_ 04

C 38 0

M EM_ MA _A D D 0
M EM_ MA _B A N K 1

1
2

4 RN2 0
3 4 P2 R X4 7_ 04

C 37 9

1
2

4 RN2 1
3 4 P2 R X4 7_ 04

1
2

4 RN2 2
3 4 P2 R X4 7_ 04

*. 1U _ X7 R _1 0V _ 04
1. 8V
. 1U _ X7 R _1 0V _ 04

C 39 9
C 37 8

*. 1U _ X7 R _1 0V _ 04
1. 8V
. 1U _ X7 R _1 0V _ 04
*. 1U _ X7 R _1 0V _ 04
1. 8V
. 1U _ X7 R _1 0V _ 04

C 39 2
4 ME M_ MA _R A S #
4 ME M_ MA 0_ C S# 0
4 ME M_ MA 0_ OD T0

M EM_ MA _A D D 1 3

*. 1U _ X7 R _1 0V _ 04
1. 8V
. 01 U _1 6V _0 4

C 38 1

C LO SE TO SO -DI MM_ 0
1 . 8V
. 1U _ X7 R _1 0V _ 04

C 352

C 3 88

. 01 U _1 6V _0 4

C 3 46

. 1U _ X7 R _1 0V _ 04 *. 1U _ X7 R _1 0V _ 04

C 3 91

* . 1U _ X7 R _1 0V _0 4

C 4 04

C 35 3

.1 U _ X7R _1 0V _0 4

P L A C E C L OS E T O S OC K E T ( P E R E M I/E M C )
J_ D I MM_1 B
1 12
1 11
1 17
96
95
1 18
81
82
87
1 03
88
1 04

3. 3 V S

20 m i ls
C 38 2
2 . 2U _ 6. 3 V _0 6

C 36 6

1 99
. 1 U _X 7R _ 10 V _04

5, 8 C P U _ MEM H OT#
M VR E F _D IM

Z 07 01
R 1 91
*0 _0 40 2_ 5m li _s ho rt

2 0 m il s

83
1 20
50
69
1 63

MV R E F _D I M

1

D I MM0 _GN D 0 2 01
D I MM0 _GN D 1 2 02

C 3 60
C 42 1

V DD1
V DD2
V DD3
V DD4
V DD5
V DD6
V DD7
V DD8
V DD9
V DD1 0
V DD1 1
V DD1 2
V DDS P D
NC 1
NC 2
NC 3
NC 4
N C TE S T
V RE F
GN D 0
GN D 1

2 . 2U _ 6. 3 V_ 06
. 1 U _X 7R _ 10 V_ 04

47
1 33
1 83
77
12
48
1 84
78
71
72
1 21
1 22
1 96
1 93
8

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
V S S 10
V S S 11
V S S 12
V S S 13
V S S 14
V S S 15
2-1 73 40 73 -1
1. 8 V

18
24
41
53
42
54
59
65
60
66
12 7
13 9
12 8
14 5
16 5
17 1
17 2
17 7
18 7
17 8
19 0
9
21
33
15 5
34
13 2
14 4
15 6
16 8
2
3
15
27
39
14 9
16 1
28
40
13 8
15 0
16 2

V SS 1 6
V SS 1 7
V SS 1 8
V SS 1 9
V SS 2 0
V SS 2 1
V SS 2 2
V SS 2 3
V SS 2 4
V SS 2 5
V SS 2 6
V SS 2 7
V SS 2 8
V SS 2 9
V SS 3 0
V SS 3 1
V SS 3 2
V SS 3 3
V SS 3 4
V SS 3 5
V SS 3 6
V SS 3 7
V SS 3 8
V SS 3 9
V SS 4 0
V SS 4 1
V SS 4 2
V SS 4 3
V SS 4 4
V SS 4 5
V SS 4 6
V SS 4 7
V SS 4 8
V SS 4 9
V SS 5 0
V SS 5 1
V SS 5 2
V SS 5 3
V SS 5 4
V SS 5 5
V SS 5 6
V SS 5 7

4 ME M_MA _ C LK 7 _P

0 _0 4

C 4 12

1K _ 1% _0 4

MVR EF _ D I M
U 10 B
*LM3 58
Z 0 70 3
7

*1 0_ 04 _1 %
R 2 04

R 2 05
*1 0K _ 04
R 19 7

R 20 3

B - 8 DDRII S0-DIMM 0

. 1U _ X7 R _1 0V _ 04

C 4 01

C 37 1

.1 U _X 7R _1 0V _0 4

* 0_ 04

* 0_ 04

Widt h 20 mil ,len gth <6 inch
MV R E F_ D I M

C 3 68
. 1U _X 7R _ 10 V_ 04

C 36 7
10 00 P _X 7R _ 50 V_ 04

C 37 0

. 1 U _X 7R _ 10 V _0 4

C 3 86

. 1 U _X 7R _ 10 V_ 04

C 3 64

*. 1U _X 7R _ 10 V_ 04

. 01 U _1 6V _0 4

C 4 03
. 1 U _X 7R _10 V _0 4

C 38 9
. 1 U _X 7R _ 10 V _04

1 . 8V

C 4 07

1 00 U _6 . 3V _B 2 1 0U _ 10 V_ 08

*. 1 U _X 7R _ 10 V_ 04

*. 1U F _1 6V _ 04

C 41 6
10 00 PF _ 50 V _04
Z0 70 4

1 0U _ 10 V_ 08

1. 8 V

8
R 1 96

1 . 8V

C 3 85
C 3 83

1 0U _ 10 V _0 8

C 41 8

5 +
6
-

1. 5 P _X 7R _ 50 V_ 04

0 .9 V

C 4 05

1 K_ 1% _0 4
Z 070 2

C 2 56

t ole ra nce 1 0% 111 3
4 ME M_MA _ C LK 1 _N

R 20 2
3. 3 V

1. 5 P _X 7R _ 50 V_ 04

4 ME M_MA _ C LK 1 _P

+ C 4 08

R 1 95

P L AC E C L OS E T O P RO CE S S O R
W I T H I N 1. 5 I N C H

C 2 43

t ole ra nce 1 0% 111 3
4 ME M_MA _ C LK 7 _N

4

B.Schematic Diagrams

4 ME M_MA _B A N K [ 0. . 2 ]

ME M_ MA_ A D D 0
ME M_ MA_ A D D 1
ME M_ MA_ A D D 2
ME M_ MA_ A D D 3
ME M_ MA_ A D D 4
ME M_ MA_ A D D 5
ME M_ MA_ A D D 6
ME M_ MA_ A D D 7
ME M_ MA_ A D D 8
ME M_ MA_ A D D 9
ME M_ MA_ A D D 10
ME M_ MA_ A D D 11
ME M_ MA_ A D D 12
ME M_ MA_ A D D 13
ME M_ MA_ A D D 14
ME M_ MA_ A D D 15
ME M_ MA_ B AN K2

C 36 5

C 40 6

C 35 6

C 3 57

10 U _1 0V _ 08

*10 U _1 0V _ 08

4. 7U _6. 3 V _0 6 * 4. 7U _6 .3 V _0 6

C 3 87

C 4 02

C 34 5

C 35 4

C 35 5

*1 U _6 . 3V _ 04

1U _6 .3 V _0 4

1U _ 6. 3 V _0 4

. 22 U _X 7R _ 06

* . 22 U _X 7R _ 06

+ C 3 73
*2 20 U _4 V _D

Schematic Diagrams

DDRII S0-DIMM 1
SO-DIMM 1
J_ D I MM_ 2A

4 ME M_ MB _A D D [ 0 . . 15 ]

ME M_ MB _A D D 0
ME M_ MB _A D D 1
ME M_ MB _A D D 2
ME M_ MB _A D D 3
ME M_ MB _A D D 4
ME M_ MB _A D D 5
ME M_ MB _A D D 6
ME M_ MB _A D D 7
ME M_ MB _A D D 8
ME M_ MB _A D D 9
ME M_ MB _A D D 1 0
ME M_ MB _A D D 1 1
ME M_ MB _A D D 1 2
ME M_ MB _A D D 1 3
ME M_ MB _A D D 1 4
ME M_ MB _A D D 1 5
ME M_ MB _B A N K 2

4 ME M_M B_ B A N K [ 0. . 2 ]

3. 3 VS

R 48 8
4. 7 K _0 4

ME M_ MB _B A N K 0
ME M_ MB _B A N K 1
ME M_ MB 0_ C S #0
ME M_ MB 0_ C S #1
ME M_ MB _C L K 1_ P
ME M_ MB _C L K 1_ N
ME M_ MB _C L K 7_ P
ME M_ MB _C L K 7_ N
ME M_ MB _C K E 0
ME M_ MB _C K E 1
ME M_ MB _C A S #
ME M_ MB _R A S #
ME M_ MB _W E #
S A 0_ D I M1_ 1
S A 1_ D I M1_ 1
S C L K0
S D A TA 0

ME M_ MB 0_ C S # 0
ME M_ MB 0_ C S # 1
ME M_ MB _C LK 1 _P
ME M_ MB _C LK 1 _N
ME M_ MB _C LK 7 _P
ME M_ MB _C LK 7 _N
4 ME M_ MB _ C K E0
4 ME M_ MB _ C K E1
4 ME M_M B_ C A S #
4 ME M_M B_ R A S #
4 ME M_ MB _W E #

2 , 7, 1 9 S C L K 0
2 , 7, 1 9 S D A T A 0

R 48 4

4 M EM _MB 0 _OD T0
4 M EM _MB 0 _OD T1
4 ME M_ MB _D M [0 . . 7]

0_ 04

1 07
1 06
1 10
1 15
30
32
1 64
1 66
79
80
1 13
1 08
1 09
1 98
2 00
1 97
1 95

ME M_ MB 0_ OD T 0 1 14
ME M_ MB 0_ OD T 1 1 19
ME M_ MB _D M
ME M_ MB _D M
ME M_ MB _D M
ME M_ MB _D M
ME M_ MB _D M
ME M_ MB _D M
ME M_ MB _D M
ME M_ MB _D M

0 10
1 26
2 52
3 67
4 1 30
5 1 47
6 1 70
7 1 85

4
4
4
4
4
4
4
4

ME M_MB _ D QS 0 _P
ME M_MB _ D QS 1 _P
ME M_MB _ D QS 2 _P
ME M_MB _ D QS 3 _P
ME M_MB _ D QS 4 _P
ME M_MB _ D QS 5 _P
ME M_MB _ D QS 6 _P
ME M_MB _ D QS 7 _P

ME M_ MB _D QS 0 _P
ME M_ MB _D QS 1 _P
ME M_ MB _D QS 2 _P
ME M_ MB _D QS 3 _P
ME M_ MB _D QS 4 _P
ME M_ MB _D QS 5 _P
ME M_ MB _D QS 6 _P
ME M_ MB _D QS 7 _P

13
31
51
70
1 31
1 48
1 69
1 88

4
4
4
4
4
4
4
4

ME M_MB _ D QS 0 _N
ME M_MB _ D QS 1 _N
ME M_MB _ D QS 2 _N
ME M_MB _ D QS 3 _N
ME M_MB _ D QS 4 _N
ME M_MB _ D QS 5 _N
ME M_MB _ D QS 6 _N
ME M_MB _ D QS 7 _N

ME M_ MB _D QS 0 _N
ME M_ MB _D QS 1 _N
ME M_ MB _D QS 2 _N
ME M_ MB _D QS 3 _N
ME M_ MB _D QS 4 _N
ME M_ MB _D QS 5 _N
ME M_ MB _D QS 6 _N
ME M_ MB _D QS 7 _N

11
29
49
68
1 29
1 46
1 67
1 86

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A 1 0/ A P
A1 1
A1 2
A1 3
A1 4
A1 5
A 1 6_ B A 2
BA0
BA1
S0 #
S1 #
C K0
C K0 #
C K1
C K1 #
C KE 0
C KE 1
C AS #
R AS #
W E#
SA0
SA1
S CL
S DA
O D T0
O D T1
D
D
D
D
D
D
D
D

M0
M1
M2
M3
M4
M5
M6
M7

D
D
D
D
D
D
D
D

QS 0
QS 1
QS 2
QS 3
QS 4
QS 5
QS 6
QS 7

D
D
D
D
D
D
D
D

QS 0#
QS 1#
QS 2#
QS 3#
QS 4#
QS 5#
QS 6#
QS 7#

D Q0
D Q1
D Q2
D Q3
D Q4
D Q5
D Q6
D Q7
D Q8
D Q9
D Q1 0
D Q1 1
D Q1 2
D Q1 3
D Q1 4
D Q1 5
D Q1 6
D Q1 7
D Q1 8
D Q1 9
D Q2 0
D Q2 1
D Q2 2
D Q2 3
D Q2 4
D Q2 5
D Q2 6
D Q2 7
D Q2 8
D Q2 9
D Q3 0
D Q3 1
D Q3 2
D Q3 3
D Q3 4
D Q3 5
D Q3 6
D Q3 7
D Q3 8
D Q3 9
D Q4 0
D Q4 1
D Q4 2
D Q4 3
D Q4 4
D Q4 5
D Q4 6
D Q4 7
D Q4 8
D Q4 9
D Q5 0
D Q5 1
D Q5 2
D Q5 3
D Q5 4
D Q5 5
D Q5 6
D Q5 7
D Q5 8
D Q5 9
D Q6 0
D Q6 1
D Q6 2
D Q6 3

5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
1 23
1 25
1 35
1 37
1 24
1 26
1 34
1 36
1 41
1 43
1 51
1 53
1 40
1 42
1 52
1 54
1 57
1 59
1 73
1 75
1 58
1 60
1 74
1 76
1 79
1 81
1 89
1 91
1 80
1 82
1 92
1 94

VS S 1 6
VS S 1 7
VS S 1 8
VS S 1 9
VS S 2 0
VS S 2 1
VS S 2 2
VS S 2 3
VS S 2 4
VS S 2 5
VS S 2 6
VS S 2 7
VS S 2 8
VS S 2 9
VS S 3 0
VS S 3 1
VS S 3 2
VS S 3 3
VS S 3 4
VS S 3 5
VS S 3 6
VS S 3 7
VS S 3 8
VS S 3 9
VS S 4 0
VS S 4 1
VS S 4 2
VS S 4 3
VS S 4 4
VS S 4 5
VS S 4 6
VS S 4 7
VS S 4 8
VS S 4 9
VS S 5 0
VS S 5 1
VS S 5 2
VS S 5 3
VS S 5 4
VS S 5 5
VS S 5 6
VS S 5 7

18
24
41
53
42
54
59
65
60
66
1 27
1 39
1 28
1 45
1 65
1 71
1 72
1 77
1 87
1 78
1 90
9
21
33
1 55
34
1 32
1 44
1 56
1 68
2
3
15
27
39
1 49
1 61
28
40
1 38
1 50
1 62

ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D
ME M_ MB _D

AT A 0
AT A 1
AT A 2
AT A 3
AT A 4
AT A 5
AT A 6
AT A 7
AT A 8
AT A 9
AT A 10
AT A 11
AT A 12
AT A 13
AT A 14
AT A 15
AT A 22
AT A 17
AT A 18
AT A 16
AT A 20
AT A 21
AT A 23
AT A 19
AT A 24
AT A 25
AT A 26
AT A 27
AT A 28
AT A 29
AT A 30
AT A 31
AT A 32
AT A 33
AT A 34
AT A 35
AT A 36
AT A 37
AT A 38
AT A 39
AT A 40
AT A 41
AT A 42
AT A 43
AT A 44
AT A 45
AT A 46
AT A 47
AT A 48
AT A 49
AT A 50
AT A 51
AT A 52
AT A 53
AT A 54
AT A 55
AT A 56
AT A 57
AT A 58
AT A 59
AT A 60
AT A 61
AT A 63
AT A 62

0. 9 V

ME M_ MB _D A T A [ 63 : 0] 4

4 ME M_ MB _C KE 0

ME M_M B_ B A N K 2

4
3

1 R N 23
2 4 P 2R X 47 _ 04

ME M_M B_ A D D 1 2
ME M_M B_ A D D 9

4
3

1 R N 24
2 4 P 2R X 47 _ 04

ME M_M B_ A D D 8
ME M_M B_ A D D 5

4
3

1 R N 25
2 4 P 2R X 47 _ 04

ME M_M B_ A D D 3
ME M_M B_ A D D 1

4
3

1 R N 26
2 4 P 2R X 47 _ 04

ME M_M B_ A D D 1 0
ME M_M B_ B A N K 0

4
3

1 R N 27
2 4 P 2R X 47 _ 04

C 4 46
C 4 33
C 4 34
C 4 47
C 4 36

4 ME M_ MB _W E #
4 ME M_ MB _C AS #
4 ME M_ MB 0_ C S # 1
4 ME M_ MB 0_ OD T 1

4
3

1 R N 28
2 4 P 2R X 47 _ 04

4
3

1 R N 29
2 4 P 2R X 47 _ 04

1
2

4 R N 30
3 4 P 2R X 47 _ 04

C 4 49
C 4 38
C 4 51

4 ME M_ MB _C KE 1

ME M_M B_ A D D 1 4

C 4 48
1
2

ME M_M B_ A D D 1 5
ME M_M B_ A D D 7

4 R N 31
3 4 P 2R X 47 _ 04

C 4 53
C 4 50

ME M_M B_ A D D 1 1
ME M_M B_ A D D 6

1
2

4 R N 32
3 4 P 2R X 47 _ 04

C 4 35

ME M_M B_ A D D 4
ME M_M B_ A D D 2

1
2

4 R N 33
3 4 P 2R X 47 _ 04

C 4 32

ME M_M B_ A D D 0
ME M_M B_ B A N K 1

1
2

4 R N 34
3 4 P 2R X 47 _ 04

C 4 37
C 4 52

4 ME M_ MB _R AS #
4 ME M_ MB 0_ C S # 0
4 ME M_ MB 0_ OD T 0

ME M_M B_ A D D 1 3

1
2

4 R N 35
3 4 P 2R X 47 _ 04

1
2

4 R N 36
3 4 P 2R X 47 _ 04

C 4 39

* . 1U _ X7 R _ 10 V _0 4
1 . 8V
. 1 U _ X7 R _1 0 V_ 04
* . 1U _ X7 R _ 10 V _0 4
1 . 8V
. 1 U _ X7 R _1 0 V_ 04
* . 1U _ X7 R _ 10 V _0 4
1 . 8V
. 1 U _ X7 R _1 0 V_ 04
* . 1U _ X7 R _ 10 V _0 4
1 . 8V
. 1 U _ X7 R _1 0 V_ 04
* . 1U _ X7 R _ 10 V _0 4
1 . 8V
. 0 1U _1 6V _ 04
* . 1U _ X7 R _ 10 V _0 4
1 . 8V
. 1 U _ X7 R _1 0 V_ 04

Sheet 8 of 47
DDRII S0-DIMM 1

* . 1U _ X7 R _ 10 V _0 4
1 . 8V
. 1 U _ X7 R _1 0 V_ 04
* . 1U _ X7 R _ 10 V _0 4
1 . 8V
. 1 U _ X7 R _1 0 V_ 04

1 . 8V
. 1U _ X 7R _ 10 V _0 4

C 4 24

C 44 5

. 1U _ X7 R _ 10 V _0 4

C 4 28

C 41 7

.1 U _ X7 R _ 10 V_ 0 4 . 1 U _X 7 R _1 0V _ 04

. 1U _ X7 R _ 10 V _0 4

C 4 43

C 44 4

. 1 U _X 7R _1 0V _ 04

PLACE CL OSE TO SOCKET( PEREMI/EMC)

17 34 0 75 -2

1 . 8V

J_ D I MM_ 2B
1 12
1 11
1 17
96
95
1 18
81
82
87
1 03
88
1 04

3. 3 V S

2 0 m il s
C 44 0
2. 2 U _6 . 3V _ 06

C 4 20
. 1 U _X 7R _1 0V _ 04

R 20 7
Z 0 80 1
* 0_ 04 02 _ 5m li _s ho rt

5, 7 C P U _M EM H OT#
MV R E F _ D I M

1 99

2 0 m il s

MV R E F _D I M

C 43 0
C 4 22

83
1 20
50
69
1 63
1

D I MM1 _G N D 0 2 01
D I MM1 _G N D 1 2 02

2. 2 U _6 . 3V _ 06
. 1 U _ X7 R _1 0V _ 04

47
1 33
1 83
77
12
48
1 84
78
71
72
1 21
1 22
1 96
1 93
8

V DD
V DD
V DD
V DD
V DD
V DD
V DD
V DD
V DD
V DD
V DD
V DD

1
2
3
4
5
6
7
8
9
10
11
12

V D D SP D
N
N
N
N
N

C1
C2
C3
C4
C TE S T

V RE F
G ND0
G ND1
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
V S S 10
V S S 11
V S S 12
V S S 13
V S S 14
V S S 15
17 34 0 75 -2

4 ME M_M B_ C L K 7_ P
PLACE CLOSE TOPROCESSOR
WITHIN1.5INCH

C2 2 8

t ol er anc e 10 % 11 13
4 ME M_M B_ C L K 7_ N

1. 5 P _X 7R _ 50 V _0 4

4 ME M_M B_ C L K 1_ P
C2 6 1

t ol er anc e 10 % 11 13
4 ME M_M B_ C L K 1_ N

1. 5 P _X 7R _ 50 V _0 4

0 . 9V
1 . 8V

C4 6 7

C 4 66

C 46 5

C 7 68

C 7 69

1 U _ 6. 3 V_ 04

1U _6 . 3V _ 04

1U _ 6. 3 V _0 4

. 2 2U _ X7 R _ 06

. 22 U _ X7 R _0 6

+C 42 9
22 0U _ 4 V_ D

C 45 6

C 41 9

10 U _ 10 V_ 0 8

1 0U _1 0V _ 08

1 . 8V

+C 4 5 7

C 4 58

C 42 7

C4 5 9

C 7 70

1 0U _ 10 V _0 8

*10 U _ 10 V _0 8

1 0U _1 0V _ 08

*4 . 7U _ 6. 3 V _0 6 4. 7 U _6 . 3V _ 06

C 77 1
C 4 26

1 00 U _ 6. 3 V_ B 2

C 45 4

C4 4 1

C 4 42

C 40 9

C 42 5

. 1 U _X 7R _1 0V _ 04 . 1U _X 7R _ 10 V _0 4 *. 1U _X 7R _ 10 V _0 4 * . 1U _ X7 R _ 10 V _0 4 . 1 U _X 7R _1 0V _ 04 . 01 U _ 16 V _0 4

C4 1 0

C 4 64

. 1U _ X7 R _ 10 V _0 4 . 1 U _ X7 R _1 0V _ 04

DDRII S0-DIMM 1 B - 9

B.Schematic Diagrams

4
4
4
4
4
4

1 02
1 01
1 00
99
98
97
94
92
93
91
1 05
90
89
1 16
86
84
85

Schematic Diagrams

RS780M-1
T _ CPU
T _ CPU
T _ CPU
T _ CPU
T _ CPU
T _ CPU
T _ CPU
T _ CPU
T _ CPU
T _ CPU
T _ CPU
T _ CPU
T _ CPU
T _ CPU
T _ CPU
T _ CPU

_ NB
_ NB
_ NB
_ NB
_ NB
_ NB
_ NB
_ NB
_ NB
_ NB
_ NB
_ NB
_ NB
_ NB
_ NB
_ NB

_C
_C
_C
_C
_C
_C
_C
_C
_C
_C
_C
_C
_C
_C
_C
_C

AD
AD
AD
AD
AD
AD
AD
AD
AD
AD
AD
AD
AD
AD
AD
AD

_ H0
_ L0
_ H1
_ L1
_ H2
_ L2
_ H3
_ L3
_ H4
_ L4
_ H5
_ L5
_ H6
_ L6
_ H7
_ L7

3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3

H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H

T _ CPU
T _ CPU
T _ CPU
T _ CPU
T _ CPU
T _ CPU
T _ CPU
T _ CPU
T _ CPU
T _ CPU
T _ CPU
T _ CPU
T _ CPU
T _ CPU
T _ CPU
T _ CPU

_ NB
_ NB
_ NB
_ NB
_ NB
_ NB
_ NB
_ NB
_ NB
_ NB
_ NB
_ NB
_ NB
_ NB
_ NB
_ NB

_C
_C
_C
_C
_C
_C
_C
_C
_C
_C
_C
_C
_C
_C
_C
_C

AD
AD
AD
AD
AD
AD
AD
AD
AD
AD
AD
AD
AD
AD
AD
AD

_ H8
_ L8
_ H9
_ L9
_ H1 0
_ L1 0
_ H1 1
_ L1 1
_ H1 2
_ L1 2
_ H1 3
_ L1 3
_ H1 4
_ L1 4
_ H1 5
_ L1 5

3
3
3
3

H
H
H
H

T _ CPU
T _ CPU
T _ CPU
T _ CPU

_ NB
_ NB
_ NB
_ NB

_C
_C
_C
_C

L K _ H0
L K_ L 0
L K _ H1
L K_ L 1

3
3
3
3

H
H
H
H

T _ CPU
T _ CPU
T _ CPU
T _ CPU

_ NB
_ NB
_ NB
_ NB

_C
_C
_C
_C

T L _H 0
T L _L 0
T L _H 1
T L _L 1

AC 2 4
AC 2 5
A B2 5
A B2 4
A A2 4
A A2 5
Y 22
Y 23
W 21
W 20
V2 1
V2 0
U 20
U 21
U 19
U 18
T2 2
T2 3
A B2 3
A A2 2
M 22
M 23
R 21
R 20

R 405

30 1 _ 1 % _ 04 H T _R X C A LP
H T _R X C A LN

C 23
A2 4

HT _ R
HT _ R
HT _ R
HT _ R
HT _ R
HT _ R
HT _ R
HT _ R
HT _ R
HT _ R
HT _ R
HT _ R
HT _ R
HT _ R
HT _ R
HT _ R

XC
XC
XC
XC
XC
XC
XC
XC
XC
XC
XC
XC
XC
XC
XC
XC

AD
AD
AD
AD
AD
AD
AD
AD
AD
AD
AD
AD
AD
AD
AD
AD

0P
0N
1P
1N
2P
2N
3P
3N
4P
4N
5P
5N
6P
6N
7P
7N

HT _ R
HT _ R
HT _ R
HT _ R
HT _ R
HT _ R
HT _ R
HT _ R
HT _ R
HT _ R
HT _ R
HT _ R
HT _ R
HT _ R
HT _ R
HT _ R

XC
XC
XC
XC
XC
XC
XC
XC
XC
XC
XC
XC
XC
XC
XC
XC

AD
AD
AD
AD
AD
AD
AD
AD
AD
AD
AD
AD
AD
AD
AD
AD

8P
8N
9P
9N
1 0P
1 0N
1 1P
1 1N
1 2P
1 2N
1 3P
1 3N
1 4P
1 4N
1 5P
1 5N

HT _ R
HT _ R
HT _ R
HT _ R

XC
XC
XC
XC

L K0 P
L K0 N
L K1 P
L K1 N

HT _ R
HT _ R
HT _ R
HT _ R

XC
XC
XC
XC

TL 0P
TL 0N
TL 1P
TL 1N

H T _ T XC
H T _T X C
H T _ T XC
H T _T X C
H T _ T XC
H T _T X C
H T _ T XC
H T _T X C
H T _ T XC
H T _T X C
H T _ T XC
H T _T X C
H T _ T XC
H T _T X C
H T _ T XC
H T _T X C

PAR T 1 O F 6

HYPER TRANSPORT CPU
I/F

Sheet 9 of 47
RS780M-1

H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H

AD 0 P
AD0 N
AD 1 P
AD1 N
AD 2 P
AD2 N
AD 3 P
AD3 N
AD 4 P
AD4 N
AD 5 P
AD5 N
AD 6 P
AD6 N
AD 7 P
AD7 N

H T _ T XC A D 8 P
H T _T X C A D 8 N
H T _ T XC A D 9 P
H T _T X C A D 9 N
HT _ T X CA D 1 0 P
H T _ TX C A D 10 N
HT _ T X CA D 1 1 P
H T _ TX C A D 11 N
HT _ T X CA D 1 2 P
H T _ TX C A D 12 N
HT _ T X CA D 1 3 P
H T _ TX C A D 13 N
HT _ T X CA D 1 4 P
H T _ TX C A D 14 N
HT _ T X CA D 1 5 P
H T _ TX C A D 15 N
H
H
H
H

T _ TX C L K 0 P
T_ T X C L K 0 N
T _ TX C L K 1 P
T_ T X C L K 1 N

HT _ T X CT L 0 P
H T _ TX C T L0 N
HT _ T X CT L 1 P
H T _ TX C T L1 N
H T _T X C A L P
HT _ T X CA L N

H T _ R XC A L P
H T _ R XC A L N

D 24
D 25
E2 4
E2 5
F24
F25
F23
F22
H 23
H 22
J25
J24
K2 4
K2 5
K2 3
K2 2
F21
G 21
G 20
H 21
J20
J21
J18
K1 7
L19
J19
M 19
L18
M 21
P2 1
P1 8
M 18
H 24
H 25
L21
L20

H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H

T _ NB_ C
T _ NB_ C
T _ NB_ C
T _ NB_ C
T _ NB_ C
T _ NB_ C
T _ NB_ C
T _ NB_ C
T _ NB_ C
T _ NB_ C
T _ NB_ C
T _ NB_ C
T _ NB_ C
T _ NB_ C
T _ NB_ C
T _ NB_ C

PU
PU
PU
PU
PU
PU
PU
PU
PU
PU
PU
PU
PU
PU
PU
PU

_C
_C
_C
_C
_C
_C
_C
_C
_C
_C
_C
_C
_C
_C
_C
_C

AD
AD
AD
AD
AD
AD
AD
AD
AD
AD
AD
AD
AD
AD
AD
AD

_ H0
_ L0
_ H1
_ L1
_ H2
_ L2
_ H3
_ L3
_ H4
_ L4
_ H5
_ L5
_ H6
_ L6
_ H7
_ L7

3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3

H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H

T _ NB_ C
T _ NB_ C
T _ NB_ C
T _ NB_ C
T _ NB_ C
T _ NB_ C
T _ NB_ C
T _ NB_ C
T _ NB_ C
T _ NB_ C
T _ NB_ C
T _ NB_ C
T _ NB_ C
T _ NB_ C
T _ NB_ C
T _ NB_ C

PU
PU
PU
PU
PU
PU
PU
PU
PU
PU
PU
PU
PU
PU
PU
PU

_C
_C
_C
_C
_C
_C
_C
_C
_C
_C
_C
_C
_C
_C
_C
_C

AD
AD
AD
AD
AD
AD
AD
AD
AD
AD
AD
AD
AD
AD
AD
AD

_ H8 3
_ L8 3
_ H9 3
_ L9 3
_ H1 0 3
_ L1 0 3
_ H1 1 3
_ L1 1 3
_ H1 2 3
_ L1 2 3
_ H1 3 3
_ L1 3 3
_ H1 4 3
_ L1 4 3
_ H1 5 3
_ L1 5 3

H T _ N B _ C P U _C L K _ H 0 3
H T _ N B _ C P U _C L K _ L 0 3
H T _ N B _ C P U _C L K _ H 1 3
H T _ N B _ C P U _C L K _ L 1 3

M 24
M 25
P1 9
R 18

H
H
H
H
R 40 3

T _ NB_ C
T _ NB_ C
T _ NB_ C
T _ NB_ C

B2 4
B2 5

H T _ TX C A L P
H T _T X C A LN

A5
B5
A4
B4
C 3
B2
D 1
D 2
E2
E1
F4
F3
F1
F2
H 4
H 3
H 1
H 2
J2
J1
K4
K3
K1
K2
M4
M3
M1
M2
N 2
N 1
P1
P2

T MD S 0 _ D A TA 0P
T MD S 0 _ D A TA 0N
T MD S 0 _ D A TA 1P
T MD S 0 _ D A TA 1N
T MD S 0 _ D A TA 2P
T MD S 0 _ D A TA 2N
T MD S 0 _ D A TA 3P
T MD S 0 _ D A TA 3N
G F X _T X 4 P _ C
G F X _T X 4 N _C
G F X _T X 5 P _ C
G F X _T X 5 N _C
G F X _T X 6 P _ C
G F X _T X 6 N _C
G F X _T X 7 P _ C
G F X _T X 7 N _C
G F X _T X 8 P _ C
G F X _T X 8 N _C
G F X _T X 9 P _ C
G F X _T X 9 N _C
G F X _T X 1 0 P _ C
G F X _T X 1 0 N _ C
G F X _T X 1 1 P _ C
G F X _T X 1 1 N _ C
G F X _T X 1 2 P _ C
G F X _T X 1 2 N _ C
G F X _T X 1 3 P _ C
G F X _T X 1 3 N _ C
G F X _T X 1 4 P _ C
G F X _T X 1 4 N _ C
G F X _T X 1 5 P _ C
G F X _T X 1 5 N _ C

C 69 5

. 1 U _X 7 R _1 6 V _ 0 4 + K

C 69 7

. 1 U _X 7 R _1 6 V _ 0 4 + K

AC 1
AC 2
AB 4
AB 3
AA 2
AA 1
Y 1
Y 2
Y 4
Y 3
V1
V2

G
G
G
G
G
G
G
G

C 64 2

AD
AE
AE
AD
AB
AC
AD
AE

A_ T X0 P_ C
A _ T X 0 N_ C
A_ T X1 P_ C
A _ T X 1 N_ C
A_ T X2 P_ C
A _ T X 2 N_ C
A_ T X3 P_ C
A _ T X 3 N_ C

PU
PU
PU
PU

_C
_C
_C
_C

T L _ H0
T L _ L0
T L _ H1
T L _ L1

3
3
3
3

3 0 1 _ 1 %_ 0 4

CLOSE TO U5

R S 7 80 (R X 7 80 )

FOR INTERNAL HDMI

U 22 B
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
22
22
27
27
2 5 P CI
2 5 P CI
22
22

P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P

CIE _ M
CIE _ M
CIE _ M
CIE _ M
CIE _ M
CIE _ M
CIE _ M
CIE _ M
CIE _ M
CIE _ M
CIE _ M
CIE _ M
CIE _ M
CIE _ M
CIE _ M
CIE _ M
CIE _ M
CIE _ M
CIE _ M
CIE _ M
CIE _ M
CIE _ M
CIE _ M
CIE _ M
CIE _ M
CIE _ M
CIE _ M
CIE _ M
CIE _ M
CIE _ M
CIE _ M
CIE _ M

X M_ N
X M_ N
X M_ N
X M_ N
X M_ N
X M_ N
X M_ N
X M_ N
X M_ N
X M_ N
X M_ N
X M_ N
X M_ N
X M_ N
X M_ N
X M_ N
X M_ N
X M_ N
X M_ N
X M_ N
X M_ N
X M_ N
X M_ N
X M_ N
X M_ N
X M_ N
X M_ N
X M_ N
X M_ N
X M_ N
X M_ N
X M_ N

B _ RX0 P
B _ RX0 N
B _ RX1 P
B _ RX1 N
B _ RX2 P
B _ RX2 N
B _ RX3 P
B _ RX3 N
B _ RX4 P
B _ RX4 N
B _ RX5 P
B _ RX5 N
B _ RX6 P
B _ RX6 N
B _ RX7 P
B _ RX7 N
B _ RX8 P
B _ RX8 N
B _ RX9 P
B _ RX9 N
B _ RX1 0 P
B _ RX1 0 N
B _ RX1 1 P
B _ RX1 1 N
B _ RX1 2 P
B _ RX1 2 N
B _ RX1 3 P
B _ RX1 3 N
B _ RX1 4 P
B _ RX1 4 N
B _ RX1 5 P
B _ RX1 5 N

P C I E _ N B _ MI N I C A R D _ R X P
P C I E _ N B _ MI N I C A R D _ R X N
P C I E _ N B _ GI G A L A N _R X P
P C I E _ N B _ GI G A L A N _R X N
E _ NB _ C A R DR E A D E R_ R X P
E _ NB _ C A R DR E A D E R_ R X N
P C IE _ N B _ E X P CA RD _ RX P
P C IE _ N B _ E X P CA RD _ RX N

18
18
18
18
18
18
18
18

P
P
P
P
P
P
P
P

CIE _ S B
CIE _ S B
CIE _ S B
CIE _ S B
CIE _ S B
CIE _ S B
CIE _ S B
CIE _ S B

_ NB_ R
_ NB_ R
_ NB_ R
_ NB_ R
_ NB_ R
_ NB_ R
_ NB_ R
_ NB_ R

X 0P
X 0N
X 1P
X 1N
X 2P
X 2N
X 3P
X 3N

D 4
C 4
A 3
B 3
C 2
C 1
E 5
F 5
G 5
G 6
H 5
H 6
J6
J5
J7
J8
L5
L6
M8
L8
P 7
M7
P 5
M5
R 8
P 8
R 6
R 5
P 4
P 3
T4
T3
AE
AD
AE
AD
AD
AD
V
W
U
U
U
U

3
4
2
3
1
2
5
6
5
6
8
7

AA
Y
AA
Y
AA
AA
W
Y

8
8
7
7
5
6
5
5

GF
GF
GF
GF
GF
GF
GF
GF
GF
GF
GF
GF
GF
GF
GF
GF
GF
GF
GF
GF
GF
GF
GF
GF
GF
GF
GF
GF
GF
GF
GF
GF

X_ R
X_ R
X_ R
X_ R
X_ R
X_ R
X_ R
X_ R
X_ R
X_ R
X_ R
X_ R
X_ R
X_ R
X_ R
X_ R
X_ R
X_ R
X_ R
X_ R
X_ R
X_ R
X_ R
X_ R
X_ R
X_ R
X_ R
X_ R
X_ R
X_ R
X_ R
X_ R

GP
GP
GP
GP
GP
GP
GP
GP
GP
GP
GP
GP

P _ RX 0 P
P _ RX 0 N
P _ RX 1 P
P _ RX 1 N
P _ RX 2 P
P _ RX 2 N
P _ RX 3 P
P _ RX 3 N
P _ RX 4 P
P _ RX 4 N
P _ RX 5 P
P _ RX 5 N

SB_ R
SB_ R
SB_ R
SB_ R
SB_ R
SB_ R
SB_ R
SB_ R

X0 P
X0 N
X1 P
X1 N
X2 P
X2 N
X3 P
X3 N
X4 P
X4 N
X5 P
X5 N
X6 P
X6 N
X7 P
X7 N
X8 P
X8 N
X9 P
X9 N
X 1 0P
X 1 0N
X 1 1P
X 1 1N
X 1 2P
X 1 2N
X 1 3P
X 1 3N
X 1 4P
X 1 4N
X 1 5P
X 1 5N

X0 P
X0 N
X1 P
X1 N
X2 P
X2 N
X3 P
X3 N

P ART 2 OF 6

PCIE I/F
GFX

B.Schematic Diagrams

U 22 A
Y 25
Y 24
V2 2
V2 3
V2 5
V2 4
U 24
U 25
T2 5
T2 4
P2 2
P2 3
P2 5
P2 4
N 24
N 25

3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3

P CIE I/ F GP P

P CIE I/ F SB

GF X _ T X 0 P
G F X _ T X0 N
GF X _ T X 1 P
G F X _ T X1 N
GF X _ T X 2 P
G F X _ T X2 N
GF X _ T X 3 P
G F X _ T X3 N
GF X _ T X 4 P
G F X _ T X4 N
GF X _ T X 5 P
G F X _ T X5 N
GF X _ T X 6 P
G F X _ T X6 N
GF X _ T X 7 P
G F X _ T X7 N
GF X _ T X 8 P
G F X _ T X8 N
GF X _ T X 9 P
G F X _ T X9 N
GF X_ T X 1 0 P
GF X _ T X 10 N
GF X_ T X 1 1 P
GF X _ T X 11 N
GF X_ T X 1 2 P
GF X _ T X 12 N
GF X_ T X 1 3 P
GF X _ T X 13 N
GF X_ T X 1 4 P
GF X _ T X 14 N
GF X_ T X 1 5 P
GF X _ T X 15 N
G
G
G
G
G
G
G
G
G
G
G
G

PP_ TX0 P
P P _ T X0 N
PP_ TX1 P
P P _ T X1 N
PP_ TX2 P
P P _ T X2 N
PP_ TX3 P
P P _ T X3 N
PP_ TX4 P
P P _ T X4 N
PP_ TX5 P
P P _ T X5 N
SB_ TX0 P
S B _ T X0 N
SB_ TX1 P
S B _ T X1 N
SB_ TX2 P
S B _ T X2 N
SB_ TX3 P
S B _ T X3 N

P C E _ C A L R P (P C E _ B C A L R P )
P C E _ C A L R N (P C E _ B C A L R N )
R S 7 80 (R X 7 80 )

B - 10 RS780M-1

7
7
6
6
6
6
5
5

P P _ T X0 P
P P _ T X0 N
P P _ T X1 P
P P _ T X1 N
P P _ T X2 P
P P _ T X2 N
P P _ T X3 P
P P _ T X3 N

A C 8 Z 0 9 01 R 2 5
A B 8 Z 0 9 02 R 2 7

_C
_C
_C
_C
_C
_C
_C
_C

C 69 9

. 1 U _X 7 R _1 6 V _ 0 4 + K

C 70 1

. 1 U _X 7 R _1 6 V _ 0 4 + K

C 68 9

. 1 U _X 7 R _1 6 V _ 0 4 + K

C 68 7

. 1 U _X 7 R _1 6 V _ 0 4 + K

C 68 3

. 1 U _X 7 R _1 6 V _ 0 4 + K

C 68 0

. 1 U _X 7 R _1 6 V _ 0 4 + K

C 67 6

. 1 U _X 7 R _1 6 V _ 0 4 + K

C 67 4

. 1 U _X 7 R _1 6 V _ 0 4 + K

C 67 1

. 1 U _X 7 R _1 6 V _ 0 4 + K

C 67 0

. 1 U _X 7 R _1 6 V _ 0 4 + K

C 66 2

. 1 U _X 7 R _1 6 V _ 0 4 + K

C 65 6

C 64 7
C 65 0
C 65 1

C 63 0
C 63 4
C 63 3
C 63 7

1 . 2 7 K _ 1% _ 0 4
2 K _ 1% _ 0 4

. 1 U _ X 7 R _ 1 6 V _ 0 4+ K

C6 9 6

. 1 U _ X 7 R _ 1 6 V _ 0 4+ K

C6 9 8

. 1 U _ X 7 R _ 1 6 V _ 0 4+ K

C7 0 0

. 1 U _ X 7 R _ 1 6 V _ 0 4+ K

C6 8 6

. 1 U _ X 7 R _ 1 6 V _ 0 4+ K

C6 8 4

. 1 U _ X 7 R _ 1 6 V _ 0 4+ K

C6 7 9

. 1 U _ X 7 R _ 1 6 V _ 0 4+ K

C6 7 7

. 1 U _ X 7 R _ 1 6 V _ 0 4+ K

C6 7 3

. 1 U _ X 7 R _ 1 6 V _ 0 4+ K

C6 7 2

. 1 U _ X 7 R _ 1 6 V _ 0 4+ K

C6 6 9

. 1 U _ X 7 R _ 1 6 V _ 0 4+ K

C6 6 6

. 1 U _ X 7 R _ 1 6 V _ 0 4+ K

C6 6 1

. 1 U _ X 7 R _ 1 6 V _ 0 4+ K

C6 5 8

. 1 U _ X 7 R _ 1 6 V _ 0 4+ K

C6 5 7

. 1 U _ X 7 R _ 1 6 V _ 0 4+ K

C6 5 4

. 1 U _ X 7 R _ 1 6 V _ 0 4+ K

PC
PC
PC
PC
PC
PC
PC
PC
PC
PC
PC
PC
PC
PC
PC
PC
PC
PC
PC
PC
PC
PC
PC
PC
PC
PC
PC
PC
PC
PC
PC
PC

. 1 U _X 7 R _1 6 V _ 0 4 + K

C 66 5

C 65 5

C6 9 4

. 1 U _X 7 R _1 6 V _ 0 4 + K
. 1 U _X 7 R _1 6 V _ 0 4 + K

. 1 U _X 7 R _1 6 V _ 0 4
C 639
. 1 U _X 7 R _1 6 V _ 0 4
C 645
. 1 U _X 7 R _1 6 V _ 0 4
C 649
. 1 U _X 7 R _1 6 V _ 0 4
C 653

. 1 U _X 7 R _1 6 V _ 0 4
C 631
. 1 U _X 7 R _1 6 V _ 0 4
C 635
. 1 U _X 7 R _1 6 V _ 0 4
C 632
. 1 U _X 7 R _1 6 V _ 0 4
C 636
V D D_ PC IE

. 1 U _ X 7R _ 1 6V _0 4
. 1 U _ X 7R _ 1 6V _0 4
. 1 U _ X 7R _ 1 6V _0 4
. 1 U _ X 7R _ 1 6V _0 4

. 1 U _ X 7R _ 1 6V _0 4
. 1 U _ X 7R _ 1 6V _0 4
. 1 U _ X 7R _ 1 6V _0 4
. 1 U _ X 7R _ 1 6V _0 4

IE_ N
IE_ N
IE_ N
IE_ N
IE_ N
IE_ N
IE_ N
IE_ N
IE_ N
IE_ N
IE_ N
IE_ N
IE_ N
IE_ N
IE_ N
IE_ N
IE_ N
IE_ N
IE_ N
IE_ N
IE_ N
IE_ N
IE_ N
IE_ N
IE_ N
IE_ N
IE_ N
IE_ N
IE_ N
IE_ N
IE_ N
IE_ N

B _ MX M
B _ MX M
B _ MX M
B _ MX M
B _ MX M
B _ MX M
B _ MX M
B _ MX M
B _ MX M
B _ MX M
B _ MX M
B _ MX M
B _ MX M
B _ MX M
B _ MX M
B _ MX M
B _ MX M
B _ MX M
B _ MX M
B _ MX M
B _ MX M
B _ MX M
B _ MX M
B _ MX M
B _ MX M
B _ MX M
B _ MX M
B _ MX M
B _ MX M
B _ MX M
B _ MX M
B _ MX M

_T X 0 P 1 2
_T X 0 N 1 2
_T X 1 P 1 2
_T X 1 N 1 2
_T X 2 P 1 2
_T X 2 N 1 2
_T X 3 P 1 2
_T X 3 N 1 2
_T X 4 P 1 2
_T X 4 N 1 2
_T X 5 P 1 2
_T X 5 N 1 2
_T X 6 P 1 2
_T X 6 N 1 2
_T X 7 P 1 2
_T X 7 N 1 2
_T X 8 P 1 2
_T X 8 N 1 2
_T X 9 P 1 2
_T X 9 N 1 2
_T X 1 0 P 1 2
_T X 1 0 N 12
_T X 1 1 P 1 2
_T X 1 1 N 12
_T X 1 2 P 1 2
_T X 1 2 N 12
_T X 1 3 P 1 2
_T X 1 3 N 12
_T X 1 4 P 1 2
_T X 1 4 N 12
_T X 1 5 P 1 2
_T X 1 5 N 12

P
P
P
P
P
P
P
P

CIE
CIE
CIE
CIE
CIE
CIE
CIE
CIE

_N
_N
_N
_N
_N
_N
_N
_N

B _ M INIC A R D_ T X P 2 2
B _ M INIC A R D_ T X N 2 2
B _ G I GA L A N _ T XP 2 7
B _ G I GA L A N _ T XN 2 7
B _ C A RD RE A DE R_ T X P 2 5
B _ C A RD RE A DE R_ T X N 2 5
B_ EX PC A R D_ T XP 2 2
B_ EX PC A R D_ T XN 2 2

P
P
P
P
P
P
P
P

CIE
CIE
CIE
CIE
CIE
CIE
CIE
CIE

_N
_N
_N
_N
_N
_N
_N
_N

B_ SB_ T X0 P
B_ SB_ T X0 N
B_ SB_ T X1 P
B_ SB_ T X1 N
B_ SB_ T X2 P
B_ SB_ T X2 N
B_ SB_ T X3 P
B_ SB_ T X3 N

18
18
18
18
18
18
18
18

TM
TM
TM
TM

DS
DS
DS
DS

0_ D
0_ D
0_ D
0_ D

AT A0 P
AT A0 N
AT A1 P
AT A1 N

R
R
R
R

83
84
81
82

0_ 0 4 -K
0_ 0 4 -K
0_ 0 4 -K
0_ 0 4 -K

T X 2P
T X 2M
T X 1P
T X 1M

TM
TM
TM
TM

DS
DS
DS
DS

0_ D
0_ D
0_ D
0_ D

AT A2 P
AT A2 N
AT A3 P
AT A3 N

R
R
R
R

79
80
77
78

0_ 0 4 -K
0_ 0 4 -K
0_ 0 4 -K
0_ 0 4 -K

T X 0P _D P B 1 N _ N B
T X 0M _ D P B 1 P _ N B
T X C P _ D P B 0 N _N B
T X C M _ D P B 0P _N B

_D P B 3 N _ N B
_ DP B 3 P _ NB
_D P B 2 N _ N B
_ DP B 2 P _ NB

T X 2 P _ D P B 3 N_ N B 1 7
T X 2 M _D P B 3 P _ N B 1 7
T X 1 P _ D P B 2 N_ N B 1 7
T X 1 M _D P B 2 P _ N B 1 7

T X 0 P _ D P B 1 N_ N B
T X 0 M _D P B 1 P _ N B
T X C P _ DP B 0 N_ N B
T X C M_ D P B 0 P _ N B

17
17
17
17

Schematic Diagrams

RS780M-2
3. 3V S
L1 5

H C B 16 08 KF -1 21 T2 5
C 14 0

C K _A V D D

2. 2 U _6 . 3V _ 06
1 . 8V S
R 94
* 0_ 04 02 _2 0m li _s ho rt

A VD D D I
C 17 8
2. 2 U _6 . 3V _ 06

U 2 2C

3. 3 V S

L1 7

H C B 16 08 KF -1 21 T2 5
C 16 5
Z 10 73
2. 2 U _6 . 3V _ 06

HS Y NC#

R 4 23 R S 7 80 3 K _0 4
R 4 38 D N I *3 K _0 4

3. 3 V S
C 15 5

RX740/RS740/RS780dif feren ce t ab e
l

Z 10 76
Z 10 77
Z 10 78

22 P _5 0V _0 4

F12
E1 2
F14
G1 5
H1 5
H1 4
E1 7
F17
F15

15 0R termin ation < 1 inch trace
R S 74 0
N B_ P W R GD
IN
AL LOW _ LD T S TOP
OU T(d ef a ul t )/ I N
LD T _S T OP#
IN (d ef au tl )/ I N

R X 78 0

3. 3 V I N

1. 8 V N
I

OC

OC

3. 3 V I N

1. 8 V N
I

R S 78 0

17 N B_ V GA _R

1 .8 V I N

17 N B_ V GA _G

OC / 1 . 8V I N
*
3 .3 V I N / OC
*

17 N B_ V GA _B

R 75

14 0_ 1% _0 4

R 70

15 0_ 1% _0 4

R 69

15 0_ 1% _0 4

1 .1 V S

R 95
R 85

22 P _5 0V _0 4

C 14 3

22 P _5 0V _0 4

HS Y NC#
V S Y NC#
Z 10 01
Z 10 02

*0_ 04 02 _5 mi l _s ho rt
*0_ 04 02 _5 mi l _s ho rt

H C B 1 60 8K F -12 1T 25
H C B 1 60 8K F -12 1T 25

P LL VD D
P LL VD D 18

1 .8 V S

R E D (D F T_ GPI O 0)
R E D b(N C )
GR E E N (D FT _G PI O1 )
GR E E N b(N C )
BL U E (D F T_ GP I O3)
BL U E b(N C )

A1 1
B1 1
F8
E8

D A C _H S Y N C (P W M_ GPI O4 )
D A C _V S Y N C (P W M_GP I O6 )
D A C _S C L (PC E _ R C A LR N )
D A C _S D A (P C E _T C A LR N )

H1 7
L1 4
L7 9
C 91 1
10 U _6 . 3V _ 06

C O MMO N

V D D A 18 H TP L L
V D D A 18 PC IE P L L

H C B 1 60 8K F -12 1T 25
H C B 1 60 8K F -12 1T 25

C 19 1
10 U _6 . 3V _ 08
2 . 2U _ 6. 3 V_ 06

C 6 91
C 17 5
C 13 4
C 70 7
16 , 18 , 20 , 23 A _ R S T#
2 . 2U _ 6. 3 V _0 6
2. 2U _6 . 3V _0 6 3 2 N B _ P WR GD _I N
2 . 2U _ 6. 3 V _0 6

2 N B H T _C L K P
2 N B H T _C L K N
1 . 1V S

R 4 15
*0 _0 40 2_ 5m li _s ho rt
A _R S T #
Z 10 04
N B _L D T _S TOP #
N B _A L LOW _ LD T ST OP
N B H T_ C L KP
N B H T_ C L KN

R 55
3 . 3V S

R 42 5
R 41 6
R 41 4
R 42 4
16 N B_ L C D _D D C _C L K
16 N B_ L C D _D D C _D A T A
17 N B_ H D MI _ D D C _ C LK
17 N B_ H D MI _ D D C _ D A TA

R 43 9

D 7
E7
D 8
A1 0
C1 0
C1 2
C2 5
C2 4

R 41 3
N B _R EF C L K _P
2 N B _ OS C
*0 _0 40 2_ 5mi l _s ho rt N B _R EF C L K _N
*0_ 04 02 _5 mi l _s ho rt
N B GF X_ C LK P
4. 7 K_ 04
2 N B GF X _C L K P
N B GF X_ C LK N
2 N B GF X _C L K N
4. 7K _ 04
Z 10 06
4. 7K _ 04
Z 10 07
4. 7K _ 04
S B LI N K _C LK P
2 S B LI N K _ C LK P
S B LI N K _C LK N
4. 7K _ 04
2 S B LI N K _ C LK N
N B _L C D _D D C _C L K
N B _L C D _D D C _D A T A
N B _H D M I_ D D C _ C LK
N B _H D M I_ D D C _ D A TA
Z 10 08
Z 10 09
3. 3 V

R 59
4 . 7K _ 04 Z1 00 5
R 60

C _P r(D F T_ GP I O5)
Y (D F T_ GP O
I 2)
C OMP _P b (D FT _ GPI O4 )

G1 8
G1 7
E1 8
F18
E1 9
F19

Z 10 03 G1 4
7 15 _1 %_0 4
A1 2
D1 4
B1 2

R6 1
L7 6
L1 9

E1 1
F11
T2
T1
U 1
U 2
V4
V3
B9
A9
A8
B8
B7
A7

10 K _0 4 Z 10 75

B1 0

Z 10 11

G1 1

Z 10 12

C 8

A 22
B 22
A 21
B 21
B 20
A 20
A 19
B 19

N B _L VD
N B _L VD
N B _L VD
N B _L VD
N B _L VD
N B _L VD

S_ TX _L 0P
S_ TX _L 0N
S_ TX _L 1P
S_ TX _L 1N
S_ TX _L 2P
S_ TX _L 2N

TX OU T_ U 0P (N C )
T XOU T _ U 0N (N C )
TX OU T_ U 1P (P C I E _R E S E T_ GP I O3)
T XOU T_ U 1N (P C I E _R E S E T_ GP I O2)
TX OU T_ U 2P (N C )
T XOU T _ U 2N (N C )
TX OU T_ U 3P (P C I E _R E S E T_ GP I O5)
T XOU T _ U 3N (N C )

B 18
A 18
A 17
B 17
D2 0
D2 1
D1 8
D1 9

N B _L VD
N B _L VD
N B _L VD
N B _L VD
N B _L VD
N B _L VD

S_ TX _U
S_ TX _U
S_ TX _U
S_ TX _U
S_ TX _U
S_ TX _U

0P
0N
1P
1N
2P
2N

T XC L K _L P(D B G_ GP I O1)
TX C L K_ LN (D B G_ GP I O3)
T XC LK _U P (P C I E _R E S E T_ GP I O4)
T XC L K _U N (P C I E _R E S E T_ GP I O1)

B 16
A 16
D1 6
D1 7

N B _L VD
N B _L VD
N B _L VD
N B _L VD

S_ TX _C
S_ TX _C
S_ TX _C
S_ TX _C

LK LP
LK LN
LK U P
LK U N

PART 3 OF 6

T XOU T _L 0P (N C )
TX OU T _L 0N (N C )
T XOU T _L 1P (N C )
TX OU T _L 1N (N C )
T XOU T _L 2P (N C )
T XOU T _L 2N (D B G_ GP I O0)
T XOU T _L 3P (N C )
T XOU T _L 3N (D B G_ GP I O2)

D A C _R S E T(P W M_ GPI O1 )
V D D L TP 1 8(N C )
V S SL TP 1 8(N C )

PL L VD D (N C )
PL L VD D 18 (N C )
PL L VS S (N C )
VD D A 18 H TP LL
VD D A 18 PC I E P L L1
VD D A 18 PC I E P L L2
SY SR ES E Tb
PO WE R GOO D
LD T S TOP b
AL L OW_ LD T S TOP

V D D L T1 8_ 1(N C )
V D D L T1 8_ 2(N C )
V D D L T3 3_ 1(N C )
V D D L T3 3_ 2(N C )
V S S LT 1(V S S)
V S S LT 2(V S S)
V S S LT 3(V S S)
V S S LT 4(V S S)
V S S LT 5(V S S)
V S S LT 6(V S S)
V S S LT 7(V S S)

H T_ R E F C LK P
H T_ R E F C LK N
R E FC LK _P / OS C I N (OS C I N )
R E FC LK _N (P W M_ GPI O3 )
GF X_ R E FC L K P
GF X_ R E FC L K N
GP P_ R E F C LK P
GP P_ R E F C LK N

L V D S_ D I GON (P C E _ TC A LR P)
L V D S _B L ON (PC E_ R C A LR P)
LV D S _E N A _ BL (P WM_ GP I O2)

A 13
B 13

Z 10 13

A 15
B 15
A 14
B 14

Z 10 14

I 2C _ C LK
I 2C _ D A TA
D D C _ C LK 0/ A U X 0P (N C )
D D C _ D AT A 0/ A U X 0N (N C )
D D C _ C LK 1/ A U X 1P (N C )
D D C _ D AT A 1/ A U X 1N (N C )

MI S.

S U S _ S TA T# (P WM_ GP I O5)
TH ER M AL D I OD E _P
TH E R MA L D I OD E _N

ST R P _D AT A
R S VD

T E S TMOD E

1. 8 VS

H C B1 6 08 KF -1 21 T2 5

C 1 74
2 . 2U _ 6. 3 V_ 06
L 78

C 6 93
. 1U _1 6V _0 4

1. 8 VS

6 00mA

H C B 1 60 8K F -12 1T 25

Sheet 10 of 47
RS780M-2

C 6 90
4 . 7U _ 6. 3 V_ 06

Z 10 16
Z 10 79
Z 10 18

R8 6
*0 _0 4 02 _5 mi _l sh ort
R 5 75
* 0_ 04
R9 3
*0 _0 40 2_ 5m i _l sh ort

*1 .2 7 K_ 04

T MD S _H P D (N C )
H P D (N C )

16
16
16
16

Z 10 15
Z 10 74

R 6 05 R 9 2

GP PS B _ R EF C L K P (S B _ R EF C L K P )
GP PS B _ R EF C L K N (S B_ R E F C LK N )

16
16
16
16
16
16

L 20

C1 4
D1 5
C1 6
C1 8
C2 0
E 20
C2 2

E9
F7
G1 2

16
16
16
16
16
16

N B _ LC D _ P WR _ E N 16
N B _ LC D _ B KL _E N 1 6

R8 7

1 .2 7K _ 04 1 . 27 K_ 04

D9
D1 0

TMD S_ H P D 0 1 7

D1 2

Z 10 20

AE8
AD8

Z 10 21
Z 10 22

R 4 43

*0 _0 4

S U S _S T AT # 1 9

R 4 37
1 0K _0 4

D 1 3 TE S T_ E N

AU X_ C A L(N C )
R S 7 80 (R X7 80 )

R6 4
1. 8 K _1 %_ 04

U 2 2D

1 . 8V S

R9 9
3 00 _0 4
5 C P U _ LD T _R EQ#
1 8 A LL OW _L D TS T OP

R 1 02

2008/ 03/18

AB1 2
AE1 6
V1 1
AE1 5
AA1 2
AB1 6
AB1 4
AD1 4
AD1 3
AD1 5
AC1 6
AE1 3
AC1 4
Y1 4

Z 10 37 A D 1 6
Z 10 38 A E 1 7
Z 10 39 A D 1 7

*0 _0 40 2_ 5m li _s ho rt
R 1 01
*0 _0 40 2_ 5m li _s h ort

Z 10 23
Z 10 24
Z 10 25
Z 10 26
Z 10 27
Z 10 28
Z 10 29
Z 10 30
Z 10 31
Z 10 32
Z 10 33
Z 10 34
Z 10 35
Z 10 36

N B _ A LL OW_ LD TS TOP
Z 10 40 W 1 2
Z 10 41 Y 1 2
Z 10 42 A D 1 8
Z 10 43 A B 1 3
Z 10 44 A B 1 8
Z 10 45 V 1 4
Z 10 46 V 1 5
Z 10 47 W 1 4
Z 10 48 A E 1 2
Z 10 49 A D 1 2

PAR4 OF 6
M EM_ D Q0 / D V O_V S Y N C (N C )
ME M_ D Q1/ D V O_ H S Y N C (N C )
M EM _D Q2 / D V O_D E (N C )
ME M_D Q 3/ D V O_ D 0(N C )
ME M_D Q4(N C )
ME M_D Q 5/ D V O_ D 1(N C )
ME M_D Q 6/ D V O_ D 2(N C )
ME M_D Q 7/ D V O_ D 4(N C )
ME M_D Q 8/ D V O_ D 3(N C )
ME M_D Q 9/ D V O_ D 5(N C )
ME M_ D Q1 0/ D V O_ D 6(N C )
ME M_ D Q1 1/ D V O_ D 7(N C )
ME M_ D Q1 2(N C )
ME M_ D Q1 3/ D V O_ D 9(N C )
ME M_D Q 14 /D VO_ D 1 0(N C )
ME M_D Q 15 /D VO_ D 1 1(N C )
ME M_B A 0(N C )
ME M_B A 1(N C )
ME M_B A 2(N C )
ME M_ D QS 0P / D V O_I D C KP (N C )
M EM_ D QS 0 N / D VO _I D C K N (N C )
ME M_R A S b (N C )
ME M_ D QS 1P (N C )
ME M_C A S b (N C )
ME M_D QS 1N (N C )
ME M_W E b(N C )
ME M_C S b (N C )
ME M_D M0(N C )
ME M_C K E (N C )
ME M_D M 1/ D V O_ D 8(N C )
ME M_OD T(N C )
I OP L LV D D 1 8(N C )
ME M_C K P (N C )
I OP L LV D D (N C )
ME M_C K N (N C )
I OP LL V SS (N C )
ME M_C O MPP (N C )
ME M_C O MPN (N C )
ME M_ VR EF (N C )
R S 7 80 (R X7 80 )
ME M_A 0 (N C )
ME M_A 1 (N C )
ME M_A 2 (N C )
ME M_A 3 (N C )
ME M_A 4 (N C )
ME M_A 5 (N C )
ME M_A 6 (N C )
ME M_A 7 (N C )
ME M_A 8 (N C )
ME M_A 9 (N C )
ME M_A 1 0(N C )
ME M_A 1 1(N C )
ME M_A 1 2(N C )
ME M_A 1 3(N C )

SBD_MEM /DVO_I/F

N B _ LD T _S T OP#

R 4 40
*0 _0 40 2_ 5m li _s ho rt

5, 1 8 C P U _ LD T _S T OP#

A A1 8
A A2 0
A A1 9
Y 19
V 17
A A1 7
A A1 5
Y 15
A C 20
A D 19
A E2 2
A C 18
A B2 0
A D 22
A C 22
A D 21

Z 10 50
Z 10 51
Z 10 52
Z 10 53
Z 10 54
Z 10 55
Z 10 56
Z 10 57
Z 10 58
Z 10 59
Z 10 60
Z 10 61
Z 10 62
Z 10 63
Z 10 64
Z 10 65

Y 17
W 18
A D 20
A E2 1

Z 10 66
Z 10 67
Z 10 68
Z 10 69

W 17
A E1 9

Z 10 70
Z 10 71

A E2 3
A E2 4

ST RAP_DEBUG_BUS_GPIO_ENABLEb

En ables the Test Deb ug Bus us ing GPIO .
RX 780:NB_TV _C; RS740 :RS740_DF T_GPIO5; RS780:VS YNC#
1. 8 V S
1. 1 V S

R S740/RS78 0
1 Disable
0 Enable

A D 23
A E1 8

Z 10 72 R 20

RX78 0
Enab le
Disa ble

0_ 04
RS740/RS780:Enables Side po rt memor y

RS 740:RS740 _DFT_GPIO 0
RS 780:HSYNC #
Se lects if Memory SI DE PORT i s availa ble or no t
1 = Memory Side port Not avai lable
0 = Memory Side port availabl e
Re gister Re adback of strap:
NB _CLKCFG:C LK_TOP_SP ARE_D[1]

RS780M-2 B - 11

B.Schematic Diagrams

17 H S Y N C #
17 VS Y N C #
17 N B_ C R T _D D C _C L K
17 N B_ C R T _D D C _D A T A

*, C LMC m od e: N B se nd LD T _ ST OP #, A LL OW _L D TS T OP wi l l b ec om e i np ut

C 15 0

AV D D 1(N C )
AV D D 2(N C )
AV D D D I (N C )
AV S S D I (N C )
AV D D Q(N C )
AV S S Q(N C )

C R T/TV OU T

3 K _0 4
*3 K _0 4

P LL P WR
L VTM

R 4 22
R 4 21 D N I

PM

V S Y NC#

C LO C Ks

1. 8 VS

Schematic Diagrams

RS780M-3
1.1VS
1.2V(RS740)

VDD_PCIE
1.2V(RS740)

1.1V(RX780;RS780)

1. 1
VS
1.1V(RX780;RS780)

U22E
Z1
101

HCB1608KF-121T25

C622

C623
C624
C625
. 1U_16V_04 .1U_16V_04 .1U_16
V_04

4.7U_6.3V_06

L77

HCB1608KF-121T25

4.7U_6.3V_06

J17
K16
L16
M16
P16
R16
T16
H18
G19
F20
E21
D22
B23
A23

VDDHT
RX

C126
C692
C138
. 1U_16V_04 .1U_16V_04 .1U_16
V_04

C708

1.2VS
L70

HCB1608KF-121T
25

VDDHTTX
C69

4.7U_6.3V_06

C629

C76

C641

C59

.1U_16V_0
4.1U_16
V_0
4

Sheet 11 of 47
RS780M-3

. 1U_16V_04

1.8VS
L67

. 1U_16V_04

HCB1608KF-121T
25
C607

C72

C604

VDDA18PCI E
C60
6

4.7U_6.3V_06
4.7U_6.3V_06

AE25
AD24
AC23
AB22
AA21
Y20
W19
V18
U17
T17
R17
P17
M17

C63

C605
. 1U_16V_04

.1U_16V_04 . 1U_16V_04

1.8VS

1U_
10V_06

C621

1.8VS
R377

F9
G9
Z110
3 AE11
AD11

*0_0603_32mil_
short
*1U_10V_06

J10
P10
K10
M10
L10
W9
H9
T10
R10
Y9
AA9
AB9
AD9
AE9
U10

C66

VDDPCI E_1
VDDPCI E_2
VDDPCI E_3
VDDPCI E_4
VDDPCI E_5
VDDPCI E_6
VDDPCI E_7
VDDPCI E_8
VDDPCI E_9
VDDPCIE_10
VDDPCIE_11
VDDPCIE_12
VDDPCIE_13
VDDPCIE_14
VDDPCIE_15
VDDPCIE_16
VDDPCIE_17

P ART 5 /6

VDDHTRX_1
VDDHTRX_2
VDDHTRX_3
VDDHTRX_4
VDDHTRX_5
VDDHTRX_6
VDDHTRX_7
VDDHTTX_1
VDDHTTX_2
VDDHTTX_3
VDDHTTX_4
VDDHTTX_5
VDDHTTX_6
VDDHTTX_7
VDDHTTX_8
VDDHTTX_9
VDDHTTX_10
VDDHTTX_11
VDDHTTX_12
VDDHTTX_13
VDDA18PCIE_1
VDDA18PCIE_2
VDDA18PCIE_3
VDDA18PCIE_4
VDDA18PCIE_5
VDDA18PCIE_6
VDDA18PCIE_7
VDDA18PCIE_8
VDDA18PCIE_9
VDDA18PCIE_10
VDDA18PCIE_11
VDDA18PCIE_12
VDDA18PCIE_13
VDDA18PCIE_14
VDDA18PCIE_15
VDD18_1
VDD18_2
VDD18_M
EM1(NC)
VDD18_M
EM2(NC)

VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22

VDD_M
EM1(NC)
VDD_M
EM2(NC)
VDD_M
EM3(NC)
VDD_M
EM4(NC)
VDD_M
EM5(NC)
VDD_M
EM6(NC)
VDD33_1(NC)
VDD33_2(NC)

A6
B6
C6
D6
E6
F6
G7
H8
J9
K9
M9
L9
P9
R9
T9
V9
U9

VDD_PCIE

L11
HCB1608KF-121T
25
C120
C96
C149
.1
U_16V_04 .1U_16V_04 1U_1
0V_0
6

C1
57
1U_10V_06

C105
4.7U_6.3V_06

1.1VS
.1U_16V_04

K1
2
J14
U16
J11
K1
5
M12
L14
L11
M13
M15
N12
N14
P1
1
P1
3
P1
4
R12
R15
T11
T15
U12
T14
J16

.1U_16V_04

10U_6.3V_06

.1U_16V_04

C4
0
C119

C100

.1U_16V_04

C91

C9
3

.1U_16V_04

C1
09

.1U_16V_04

C7
5

C57

C8
4

.1U_16V_04

10U_6.3V_06

AE10
AA11
Y11
AD10
AB10
AC10
3.3VS
H11
H12

RS780(RX780)

R71
*0_0603_32mil_short

Z1102
C139

C130

.1U_16V_04

.1
U_16V_04

A2
B1
D3
D5
E4
G1
G2
G4
H7
J4
R7
L1
L2
L4
L7
M6
N4
P6
R1
R2
R4
V7
U4
V8
V6
W1
W2
W4
W7
W8
Y6
AA4
AB5
AB1
AB7
AC3
AC4
AE1
AE4
AB2

AE14
D11
G8
E14
E15
J15
J12
K14
M11
L15

VSSAPCIE1
VSSAPCIE2
VSSAPCIE3
VSSAPCIE4
VSSAPCIE5
VSSAPCIE6
VSSAPCIE7
VSSAPCIE8
VSSAPCIE9
VSSAPCIE10
VSSAPCIE11
VSSAPCIE12
VSSAPCIE13
VSSAPCIE14
VSSAPCIE15
VSSAPCIE16
VSSAPCIE17
VSSAPCIE18
VSSAPCIE19
VSSAPCIE20
VSSAPCIE21
VSSAPCIE22
VSSAPCIE23
VSSAPCIE24
VSSAPCIE25
VSSAPCIE26
VSSAPCIE27
VSSAPCIE28
VSSAPCIE29
VSSAPCIE30
VSSAPCIE31
VSSAPCIE32
VSSAPCIE33
VSSAPCIE34
VSSAPCIE35
VSSAPCIE36
VSSAPCIE37
VSSAPCIE38
VSSAPCIE39
VSSAPCIE40

P ART 6 /6

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
RS780(RX780)

RS7 4 0/ RX 78 0 /R S7 80 PO W ER DI FFEREN CE TAB LE
PIN NAM
E

RS740

RX780

RS78 0

PIN NAM
E

RS74 0

VDDHT

NC

+1.1V

+1.1V

IO
PLLVDD

+1.2V

NC

+1.1V
+3.3V

RS7 80

VDDHTRX

NC

+1.1V

+1.1V

AVDD

+3.3V

NC

VDDHTT
X

+
1. 2V

+1.2V

+1.2V

AVDDDI

+1.8V

NC

+1.8V

VDDA18PCIE

NC

+1.8V

+1.8V

AVDDQ

+1.8V

NC

+1.8V

+1.8V

+1.8V

PLLVDD

NC

+1.1V

VDD18_M
EM

NC

NC

+1.8V

PLLVDD18

+1.8V

NC

+1.8V

VDDPCIE

+
1. 2V

+1.1V

+1.1V

VDDA1
8PCIEPLL

+1.2V

+1.8V

+1.8V

+
1. 2V

+1.1V

VDDA1
8HTPLL

+1.8V

VDDG18

VDDC

+
1. 8V

+1.2V

+1.8V

+1.8V

+1.8V/1.5V

NC

+1.8V/1.5V

VDDLTP18

+1.8V

NC

+1.8V

VDDG33

+
3. 3V

NC

+3.3V

VDDLT18

+1.8V

NC

+1.8V

IOPLLVDD18

+
1. 8V

NC

+1.8V

VDDLT33

+3.3V

NC

NC

VDD_MEM

B - 12 RS780M-3

RX780

+1.1V

GROUND

B.Schematic Diagrams

. 1U_16V_04

U22F

VDDHT_1
VDDHT_2
VDDHT_3
VDDHT_4
VDDHT_5
VDDHT_6
VDDHT_7

POWER

L71

VSSAHT1
VSSAHT2
VSSAHT3
VSSAHT4
VSSAHT5
VSSAHT6
VSSAHT7
VSSAHT8
VSSAHT9
VSSAHT10
VSSAHT11
VSSAHT12
VSSAHT13
VSSAHT14
VSSAHT15
VSSAHT16
VSSAHT17
VSSAHT18
VSSAHT19
VSSAHT20
VSSAHT21
VSSAHT22
VSSAHT23
VSSAHT24
VSSAHT25
VSSAHT26
VSSAHT27
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34

A25
D23
E22
G
22
G
24
G
25
H19
J22
L17
L22
L24
L25
M
20
N22
P20
R19
R22
R24
R25
H20
U22
V19
W22
W24
W25
Y21
AD25
L12
M
14
N13
P12
P15
R11
R14
T12
U14
U11
U15
V12
W11
W15
AC12
AA14
Y18
AB11
AB15
AB17
AB19
AE20
AB21
K11

Schematic Diagrams

M82-XT-1
PCIE BUS Mirror

U2 3 A

A C 30
A C 31

9 P C I E _ N B _ MX M_ T X 1 5P
9 P C I E _ N B _ MX M_ T X 1 5N

A C 29
A B 29

9 P C I E _ N B _ MX M_ T X 1 4P
9 P C I E _ N B _ MX M_ T X 1 4N

A B 31
A B 30

9 P C I E _ N B _ MX M_ T X 1 3P
9 P C I E _ N B _ MX M_ T X 1 3N

A A 31
A A 30

9 P C I E _ N B _ MX M_ T X 1 2P
9 P C I E _ N B _ MX M_ T X 1 2N

W 30
W 31

9 P C I E _ N B _ MX M_ T X 1 1P
9 P C I E _ N B _ MX M_ T X 1 1N

V 31
V 30

9 P C I E _ N B _ MX M_ T X 9 P
9 P C I E _ N B _ MX M_ T X 9 N

U 31
U 30

9 P C I E _ N B _ MX M_ T X 8 P
9 P C I E _ N B _ MX M_ T X 8 N

P 30
P 31

9 P C I E _ N B _ MX M_ T X 7 P
9 P C I E _ N B _ MX M_ T X 7 N

P 29
N 29

9 P C I E _ N B _ MX M_ T X 6 P
9 P C I E _ N B _ MX M_ T X 6 N

N 31
N 30

9 P C I E _ N B _ MX M_ T X 5 P
9 P C I E _ N B _ MX M_ T X 5 N

M 31
M 30

9 P C I E _ N B _ MX M_ T X 4 P
9 P C I E _ N B _ MX M_ T X 4 N

K 30
K 31

9 P C I E _ N B _ MX M_ T X 3 P
9 P C I E _ N B _ MX M_ T X 3 N

K 29
J 29

9 P C I E _ N B _ MX M_ T X 2 P
9 P C I E _ N B _ MX M_ T X 2 N

J 31
J 30

9 P C I E _ N B _ MX M_ T X 1 P
9 P C I E _ N B _ MX M_ T X 1 N

P C I E _ R X1 P
P C I E _ R X1 N
P C I E _ R X2 P
P C I E _ R X2 N

P C I E _ R X3 P
P C I E _ R X3 N

P C I E _ R X4 P
P C I E _ R X4 N
P C I E _ R X5 P
P C I E _ R X5 N

P C I E _ R X6 P
P C I E _ R X6 N

P C I E _ R X7 P
P C I E _ R X7 N
P C I E _ R X8 P
P C I E _ R X8 N

P C I E _ R X9 P
P C I E _ R X9 N

P
C
I
E
X
P
R
E
S
S

P C I E _ T X 1P
P C I E _ TX 1 N
P C I E _ T X 2P
P C I E _ TX 2 N

P C I E _ T X 3P
P C I E _ TX 3 N

P C I E _ T X 4P
P C I E _ TX 4 N
P C I E _ T X 5P
P C I E _ TX 5 N

I
N
T
E
R
F
A
C
E

P C I E _ T X 6P
P C I E _ TX 6 N

P C I E _ T X 7P
P C I E _ TX 7 N
P C I E _ T X 8P
P C I E _ TX 8 N

P C I E _ T X 9P
P C I E _ TX 9 N

P C I E _ R X1 0 P
P C I E _ R X1 0 N

P C I E _ T X 1 0P
P C I E _ T X1 0 N

P C I E _ R X1 1 P
P C I E _ R X1 1 N

P C I E _ T X 1 1P
P C I E _ T X1 1 N

P C I E _ R X1 2 P
P C I E _ R X1 2 N

P C I E _ T X 1 2P
P C I E _ T X1 2 N

P C I E _ R X1 3 P
P C I E _ R X1 3 N

P C I E _ T X 1 3P
P C I E _ T X1 3 N

P C I E _ R X1 4 P
P C I E _ R X1 4 N

P C I E _ T X 1 4P
P C I E _ T X1 4 N

P C I E _ R X1 5 P
P C I E _ R X1 5 N

P C I E _ T X 1 5P
P C I E _ T X1 5 N

AA2 8
AA2 7

Z 1 21 3
Z 1 21 4

C9 2
C9 7

AA2 5
AA2 4

Z 1 21 5
Z 1 21 6

C9 8
. 1 U _X 7 R _1 0 V _ 0 4+ K
C 1 0 4 . 1 U _X 7 R _1 0 V _ 0 4+ K

Y2 8
Y2 7

Z 1 21 7
Z 1 21 8

C 1 0 3 . 1 U _X 7 R _1 0 V _ 0 4+ K
C 1 0 6 . 1 U _X 7 R _1 0 V _ 0 4+ K

Y2 5
Y2 4

Z 1 21 9
Z 1 22 0

C 1 0 7 . 1 U _X 7 R _1 0 V _ 0 4+ K
C 1 1 2 . 1 U _X 7 R _1 0 V _ 0 4+ K

. 1 U _X 7 R _1 0 V _ 0 4+ K
. 1 U _X 7 R _1 0 V _ 0 4+ K

V2 8
V2 7

Z 1 22 1
Z 1 22 2

C 1 1 1 . 1 U _X 7 R _1 0 V _ 0 4+ K
C 1 1 7 . 1 U _X 7 R _1 0 V _ 0 4+ K

V2 5
V2 4

Z 1 22 3
Z 1 22 4

C 1 1 8 . 1 U _X 7 R _1 0 V _ 0 4+ K
C 1 2 2 . 1 U _X 7 R _1 0 V _ 0 4+ K

T 28
T 27

Z 1 22 5
Z 1 22 6

C 1 2 1 . 1 U _X 7 R _1 0 V _ 0 4+ K
C 1 2 3 . 1 U _X 7 R _1 0 V _ 0 4+ K

T 25
T 24

Z 1 22 7
Z 1 22 8

C 1 2 4 . 1 U _X 7 R _1 0 V _ 0 4+ K
C 1 2 9 . 1 U _X 7 R _1 0 V _ 0 4+ K

P2 8
P2 7

Z 1 22 9
Z 1 23 0

P2 5
P2 4

Z 1 23 1
Z 1 23 2

C 1 3 6 . 1 U _X 7 R _1 0 V _ 0 4+ K
C 1 4 2 . 1 U _X 7 R _1 0 V _ 0 4+ K

M2 8
M2 7

Z 1 23 3
Z 1 23 4

C 1 4 1 . 1 U _X 7 R _1 0 V _ 0 4+ K
C 1 4 7 . 1 U _X 7 R _1 0 V _ 0 4+ K

M2 5
M2 4

Z 1 23 5
Z 1 23 6

C 1 4 8 . 1 U _X 7 R _1 0 V _ 0 4+ K
C 1 5 4 . 1 U _X 7 R _1 0 V _ 0 4+ K

L 28
L 27

Z 1 23 7
Z 1 23 8

C 1 5 3 . 1 U _X 7 R _1 0 V _ 0 4+ K
C 1 5 8 . 1 U _X 7 R _1 0 V _ 0 4+ K

Z 1 23 9
Z 1 24 0

L 25
L 24

J 28
J 27

Z 1 24 1
Z 1 24 2

G2 8
G2 7

Z 1 24 3
Z 1 24 4

O DT A 0
O DT A 1

1 5 OD TA 0
1 5 OD TA 1

P C I E _ M XM _ N B _ R X1 5 P 9
P C I E _ M XM _ N B _ R X1 5 N 9

C ASA0 #
C ASA1 #

1 5 CA S A 0 #
1 5 CA S A 1 #

P C I E _ M XM _ N B _ R X1 3 P 9
P C I E _ M XM _ N B _ R X1 3 N 9

W E A 0#
W E A 1#

1 5 W EA0 #
1 5 W EA1 #

C KEA0
C KEA1

1 5 CK E A 0
1 5 CK E A 1

P C I E _ M XM _ N B _ R X1 2 P 9
P C I E _ M XM _ N B _ R X1 2 N 9

C S A 0 _ 0#
C S A 1 _ 0#

1 5 CS A 0 _ 0 #
1 5 CS A 1 _ 0 #
P C I E _ M XM _ N B _ R X1 1 P 9
P C I E _ M XM _ N B _ R X1 1 N 9

P C I E _ M XM _ N B _ R X1 0 P 9
P C I E _ M XM _ N B _ R X1 0 N 9

C LK A 0
C LK A 0 #

1 5 CL K A 0
1 5 CL K A 0 #

C LK A 1
C LK A 1 #

P C I E _ M XM _ N B _ R X9 P
P C I E _ M XM _ N B _ R X9 N

9
9

1 5 CL K A 1
1 5 CL K A 1 #

P C I E _ M XM _ N B _ R X8 P
P C I E _ M XM _ N B _ R X8 N

9
9

1 5 W D QS A [ 7. . 0]

W DQ S A [7 ..0 ]
R D QS A [ 7 . . 0 ]

1 5 R D QS A [ 7 . . 0 ]

C 1 2 8 . 1 U _X 7 R _1 0 V _ 0 4+ K
C 1 3 5 . 1 U _X 7 R _1 0 V _ 0 4+ K

P C I E _ M XM _ N B _ R X7 P
P C I E _ M XM _ N B _ R X7 N

9
9

P C I E _ M XM _ N B _ R X6 P
P C I E _ M XM _ N B _ R X6 N

9
9

P C I E _ M XM _ N B _ R X5 P
P C I E _ M XM _ N B _ R X5 N

9
9

P C I E _ M XM _ N B _ R X4 P
P C I E _ M XM _ N B _ R X4 N

9
9

P C I E _ M XM _ N B _ R X3 P
P C I E _ M XM _ N B _ R X3 N

9
9

D Q MA # [ 7 . . 0 ]

1 5 D Q MA # [ 7 . . 0 ]

MD A [ 6 3 . . 0 ]

1 5 MD A [ 6 3 . . 0 ]

C 1 5 9 . 1 U _X 7 R _1 0 V _ 0 4+ K
C 1 6 9 . 1 U _X 7 R _1 0 V _ 0 4+ K

P C I E _ M XM _ N B _ R X2 P
P C I E _ M XM _ N B _ R X2 N

C 1 6 8 . 1 U _X 7 R _1 0 V _ 0 4+ K
C 1 7 6 . 1 U _X 7 R _1 0 V _ 0 4+ K

9
9

P C I E _ M XM _ N B _ R X1 P
P C I E _ M XM _ N B _ R X1 N

9
9

P C I E _ M XM _ N B _ R X0 P
P C I E _ M XM _ N B _ R X0 N

9
9

MA A [ 1 1 . . 0 ]

1 5 MA A [ 1 1 . . 0 ]

BA0
BA1

1 5 BA0
1 5 BA1

A1 2

1 5 A 12

1. 8 V S _V GA

R4 3 5
1 00 _ 1 % _0 4 + K

P LA CE M VREF DIV IDERS
A ND C APS CLOS E TO
A SIC
1 00 _ 1 % _0 4 + K

C7 0 3

R4 2 8
H 31
H 30

9 P C I E _ N B _ MX M_ T X 0 P
9 P C I E _ N B _ MX M_ T X 0 N

MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD

R ASA0 #
R ASA1 #

1 5 RA S A 0 #
1 5 RA S A 1 #
P C I E _ M XM _ N B _ R X1 4 P 9
P C I E _ M XM _ N B _ R X1 4 N 9

P a rt 3 o f 6

C 1 7 7 . 1 U _X 7 R _1 0 V _ 0 4+ K
C 1 8 3 . 1 U _X 7 R _1 0 V _ 0 4+ K

1 .8 VS _ VG A

. 1U _ 16 V _ 0 4 +K
Clock
A D 29
A D 30

2 GF X_ C LK P
2 GF X_ C LK N

Calibration

P CIE _ R E F CL K P
P CIE _ R E F CL K N

P CIE _ C A L RN

SM BUS
A C 28
A C 27
M X M_ R S T#

A G 25

P C I E _C A L R P

N C_ SM BCL K
N C _ S M B D A TA

R 43 6
A F 2 5 Z 1 2 0 1 R3 7 0

2 K _ 1 % _0 4 + K

1 00 _ 1 % _0 4 + K

1 . 1 V S _ V GA

NC _ 1
NC _ 2

E
E
E
D
C
B
B
A
E
D
E
D
G
G
E
D
C
B
B
A
C
A
C
B
C
B
A
B
C
B
A
C

29
30
31
31
29
29
30
29
26
26
25
25
23
21
21
21
28
28
27
27
25
25
24
24
23
23
23
22
20
20
20
19
C8
C7
B7
A7
A5
C4
B4
A3
G9
E9
D9
G7
G5
F5
G4
F4
B3
B2
C2
C1
E3
F3
F2
F1
G2
G1
H3
H2
K2
L3
L2
L1

Z 12 0 3
Z 12 0 4

F 30
F 31

Z 12 0 5
Z 12 0 6
Z 12 0 7

L5
L7
J7

AE2 5 Z 1 2 0 2
R 42 9

P E RS T B

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A 10
A 11
A 12
A 13
A 14
A 15
A 16
A 17
A1 8
A1 9
A 20
A 21
A 22
A 23
A 24
A 25
A 26
A 27
A 28
A 29
A 30
A 31
A 32
A 33
A 34
A 35
A 36
A 37
A 38
A 39
A 40
A 41
A 42
A 43
A 44
A 45
A 46
A 47
A 48
A 49
A 50
A 51
A 52
A 53
A 54
A 55
A 56
A 57
A 58
A 59
A 60
A 61
A 62
A 63

AE2 3
AH3 0

C 70 4

R3 6 9
1 00 _ 1 % _0 4 + K

1 . 2 7 K _ 1 %_ 0 4 + K

D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D

Q_ 0
Q_ 1
Q_ 2
Q_ 3
Q_ 4
Q_ 5
Q_ 6
Q_ 7
Q_ 8
Q_ 9
Q_ 1 0
Q_ 1 1
Q_ 1 2
Q_ 1 3
Q_ 1 4
Q_ 1 5
Q_ 1 6
Q_ 1 7
Q_ 1 8
Q_ 1 9
Q_ 2 0
Q_ 2 1
Q_ 2 2
Q_ 2 3
Q_ 2 4
Q_ 2 5
Q_ 2 6
Q_ 2 7
Q_ 2 8
Q_ 2 9
Q_ 3 0
Q_ 3 1
Q_ 3 2
Q_ 3 3
Q_ 3 4
Q_ 3 5
Q_ 3 6
Q_ 3 7
Q_ 3 8
Q_ 3 9
Q_ 4 0
Q_ 4 1
Q_ 4 2
Q_ 4 3
Q_ 4 4
Q_ 4 5
Q_ 4 6
Q_ 4 7
Q_ 4 8
Q_ 4 9
Q_ 5 0
Q_ 5 1
Q_ 5 2
Q_ 5 3
Q_ 5 4
Q_ 5 5
Q_ 5 6
Q_ 5 7
Q_ 5 8
Q_ 5 9
Q_ 6 0
Q_ 6 1
Q_ 6 2
Q_ 6 3

M A_ 0
M A_ 1
M A_ 2
M A_ 3
M A_ 4
M A_ 5
M A_ 6
M A_ 7
M A_ 8
M A_ 9
MA _ 1 0
MA _ 1 1
M A_ BA0
M A_ BA1
M A_ A1 2
M A_ BA2

MEMORY
INTERFACE

DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ

Mb _ 0
Mb _ 1
Mb _ 2
Mb _ 3
Mb _ 4
Mb _ 5
Mb _ 6
Mb _ 7
Q
Q
Q
Q
Q
Q
Q
Q

Q
Q
Q
Q
Q
Q
Q
Q

S_ 0
S_ 1
S_ 2
S_ 3
S_ 4
S_ 5
S_ 6
S_ 7

S _ 0B
S _ 1B
S _ 2B
S _ 3B
S _ 4B
S _ 5B
S _ 6B
S _ 7B
O DT 0
O DT 1
C L K0
C L K1

CL K0 b
CL K1 b
R AS0 b
R AS1 b
C AS0 b
C AS1 b
CS 0 b _ 0
CS 0 b _ 1
CS 1 b _ 0
CS 1 b _ 1

M VR EF D
M VR EF S

C KE0
C KE1

T ES T _ M CL K
T ES T _ Y CL K
M E M TE S T

W E0 b
W E1 b
D R A M_ R S T

B1 4
A1 4
B1 3
E1 4
B1 7
A1 7
C1 5
G1 6
E1 6
C1 4
A1 2
B1 2
C1 2
D1 4
B1 5
G1 4

MA A 0
MA A 1
MA A 2
MA A 3
MA A 4
MA A 5
MA A 6
MA A 7
MA A 8
MA A 9
MA A 10
MA A 11
BA0
BA1
A1 2
BA2

D3 0
G2 5
C2 6
C2 1
C5
D6
D2
K3

DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ

C3 0
D2 3
B2 6
B2 1
B6
E7
E2
J2

RD
RD
RD
RD
RD
RD
RD
RD

C3 1
E2 3
A2 6
A2 1
A6
D7
E1
J1

WD
WD
WD
WD
WD
WD
WD
WD

MA # 0
MA # 1
MA # 2
MA # 3
MA # 4
MA # 5
MA # 6
MA # 7

QS
QS
QS
QS
QS
QS
QS
QS

A0
A1
A2
A3
A4
A5
A6
A7

QS A 0
QS A 1
QS A 2
QS A 3
QS A 4
QS A 5
QS A 6
QS A 7

E2 0
C1 1

O DT A0
O DT A1

A1 8
A1 1

C L KA0
C L KA1

B1 8
B1 1

C L KA0 #
C L KA1 #

G2 0
D1 2

R ASA0 #
R ASA1 #

D2 0
E1 2

C ASA0 #
C ASA1 #

E1 8
G1 8

C SA0 _ 0 #
C SA0 _ 1 #

G1 1
E1 1

C SA1 _ 0 #
C SA1 _ 1 #

D1 8
G1 2

C KEA0
C KEA1

D1 6
C1 0
J5

Sheet 12 of 47
M82-XT-1

W EA0 #
W EA1 #
M E M_ R S T

. 1U _ 1 6V _ 0 4 + K
M8 2 XT -S + K

M8 2 XT -S + K
U 2 3F

Z 12 4 5 R 45

0 _ 04 + K

PART 6 OF 6
3 . 3 V S _ V GA
L VD DR
R 174
1 0 K _ 0 4 +K
R B 7 5 1 V -4 0 +K
1 8, 2 0 P C I E _ R S T #

1 8 P E _ G P I O0

D1 9
C

A

LV D D C

AF2 0
AG 2 0
AJ 1 8
AH 2 0

LV D D R _ 1
LV D D R _ 2
LV D D C _ 1
LV D D C _ 2

M X M_ R S T #
AF2 3
AF2 1
AL 1 8
AJ 2 2
AJ 2 5
AK1 8
AK2 3
AK2 5
AJ 2 1
AL 2 3
AL 2 5

D 1 8 R B 7 5 1 V -4 0 +K
C
A

L PV DD
L PVSS

AG 1 8
AH 1 8

LV
LV
LV
LV
LV
LV
LV
LV
LV
LV
LV

SSR_ 1
SSR_ 2
SSR_ 3
SSR_ 4
SSR_ 5
SSR_ 6
SSR_ 7
SSR_ 8
SSR_ 9
SSR_ 1 0
SSR_ 1 1

LP V D D
LP V S S

VAR Y_ BL
Control
D I G ON

M XM _ LC D _ B K L _ E N

R6 2

1 3, 16

T XCL K_ L P
TX C L K _L N
T XO U T _ L 0 P
TX O U T _ L0 N
T XO U T _ L 1 P
TX O U T _ L1 N
T XO U T _ L 2 P
TX O U T _ L2 N
T XO U T _ L 3 P
TX O U T _ L3 N

1 . 8 V S _ V GA

R7 6

R 65

4 . 7K _0 4 + K

2 40 _ 1 % _0 6 + K
AA7

R3 9

*1 0 K _0 4

4 . 7K _0 4 + K
4 . 7K _0 4 + K

AC 6

MX M _L C D _ P W R _ E N 1 6

LVDS channel
T X CL K _ U P
T X CL K _ UN
T X OU T _U 0 P
T XO U T _ U 0 N
T X OU T _U 1 P
T XO U T _ U 1 N
T X OU T _U 2 P
T XO U T _ U 2 N
T X OU T _U 3 P
T XO U T _ U 3 N

R 66

AD 2 1
AE2 1
AJ 2 4
AJ 2 3
AK2 4
AL 2 4
AG 2 1
AH 2 1
AG 2 3
AH 2 3
AL 1 9
AK1 9
AJ 2 0
AJ 1 9
AK2 0
AL 2 0
AK2 1
AL 2 1
AK2 2
AL 2 2

DIV IDER RESI STORS

Z 1 2 09
Z 1 2 10

Z 1 2 11
Z 1 2 12

MX M_ L V D
MX M_ L V D
MX M_ L V D
MX M_ L V D
MX M_ L V D
MX M_ L V D
MX M_ L V D
MX M_ L V D

S _ TX _ C L K U
S _ TX _ C L K U
S _ TX _ U 0 P
S _ TX _ U 0 N
S _ TX _ U 1 P
S _ TX _ U 1 N
S _ TX _ U 2 P
S _ TX _ U 2 N

P 16
N 16
16
16
16
16
16
16

MX M_ L V D
MX M_ L V D
MX M_ L V D
MX M_ L V D
MX M_ L V D
MX M_ L V D
MX M_ L V D
MX M_ L V D

S _ TX _ C L K L P 16
S _ TX _ C L K L N 1 6
S _ TX _ L 0 P 1 6
S _ TX _ L 0 N 1 6
S _ TX _ L 1 P 1 6
S _ TX _ L 1 N 1 6
S _ TX _ L 2 P 1 6
S _ TX _ L 2 N 1 6

DD R2

D DR3

MVR EF TO 1. 8V

1 00 R

40 .2 R

MVR EF TO GND

1 00 R

10 0R

M8 2 X T-S +K

M82-XT-1 B - 13

B.Schematic Diagrams

W 29
V 29

9 P C I E _ N B _ MX M_ T X 1 0P
9 P C I E _ N B _ MX M_ T X 1 0N

P C I E _ T X 0P
P C I E _ TX 0 N

P C I E _ R X0 P
P C I E _ R X0 N

F O R D U A L R AN K C O N N E C T IO N S
U S E T H E C S x B _1 C H IP S EL E C T
P INS

U2 3 C

P AR T 1 OF 6

write strobe read strobe

PCIE BUS Mirror

Schematic Diagrams

M82-XT-2
U 2 3B
PA R T 2O F 6

Z1 30 1
Z1 30 2

AJ 4
AJ 5

Z1 30 3
Z1 30 4

AL 5
AK5

Z1 30 5
Z1 30 6

AL 6
AK6

Z1 30 7
Z1 30 8

AK8
AL 8

D VA L I D

A D9

PS Y N C

AE7
AK4
AL 3
V2
V1
W3

B.Schematic Diagrams

W1
Z 1 30 9
Y1
Z 1 31 0
Y2
Z 1 31 1
Y3
Z 1 31 2
AA2
Z 1 31 3
AA3
Z 1 31 4
AB1
AB2
Z 1 31 5
Z 1 31 6
AB3
A C1
Z 1 31 7
A C3
Z 1 31 8
Z 1 31 9
A D1
Z 1 32 0
A D2
A D3
Z 1 32 1
Z 1 32 2
AF3
A G3
Z 1 32 3
Z 1 32 4
A H3
Z 1 32 5
A G1
Z 1 32 6
A H2
Z 1 32 7
A H1
Z 1 32 8
AJ 3
D VP D A TA 2 0 A J 1
D VP D A TA 2 1 A J 2
D VP D A TA 2 2 A K 2
D VP D A TA 2 3 A K 3

CHECK PIN IF
NO USED
JUST DEL IT

Sheet 13 of 47
M82-XT-2
R5 7

GPI O0
GPI O1
GPI O2
GPI O3
GPI O4
GPI O5
GPI O6
GPI O7
*0_ 04
SOU T
SI N
SC L K
GPI O1 1
GPI O1 2
GPI O1 3
10 0K _0 4+ K Z1 32 9

*1 0K _0 4

3. 3 VS _ VGA
R 54
D7

AC/BATT#
C

3 0, 3 9 A C _I N

1 2, 16 MXM_ LC D _ B KL _E N

R5 8

10 0K _0 4+ K
GP I O17 _I N T #

A
R B 75 1V -40 +K

TMDS DET
R4 9
37 G PI O1 5_ P SW _0

1.1V 0.95V 0.9V

GP O
I 1 7_ I N T#
GP IO 15
GP IO 20

0
0

1
0

0
1

1
1
3 . 3V S _V GA

10 K_ 04 +K TE MP _F A I L#

R 52
37 G PI O2 0_ P SW _1
GP I O22 R 4 08
R4 2
10 K _0 4+ K

Z 1 33 0
0_ 04 +K
R5 6

G PI O_ 23 _C L K R EQ B
D R I VE S LOW
D U R I N G R ES E T

1. 8 VS _ VGA

S CS #
GPI O_ C LK R E Q#
1K _0 4+ K Z 1 33 1
Z 1 33 2
Z 1 33 3
Z 1 33 4
Z 1 33 5

Z 1 33 6 Y 8
Z 1 33 7 Y 7
Z 1 37 1 V 8
A H6
A G6

V RE FG VO L TAG E D I VI D ER I S
( V RE FG = V D DR 4, 5( 1. 8V) / 3 = 6
.V )

R2 6

Y4
V3
V4
V5
U3
U2
T4
T5
T7
T8
R1
R2
R3
P1
P3
N1
N2
P4
P7
P8
P5
V7
N3
Y5
M4
M5
M7
M8
L8

4 99 _1 %_ 04 +K
Z 13 67
R2 9

C8 8

AC1 1

MP V D D
MPV S S

E N S U R E X T A L IN V O L T A G E
L EV E L O F 1 .8 V
R 3 75

2 EX T_ V GA_ 27 M

C 6 46
. 1U _1 6V _0 4+ K

T X0M _D P B 1P
T X0P _ D P B1 N

TX 1M_ D P A2 P
TX 1P _D P A 2 N

T X1M _D P B 2P
T X1P _ D P B2 N

TX 2M_ D P A3 P
TX 2P _D P A 3 N

T X2M _D P B 3P
T X2P _ D P B3 N
D P A _P V D D
D P A_ P VS S

D V AL I D
PS Y N C _ N E W

D P B _P V D D
D P B_ P VS S

D PL L_ V D D C

1 24_ 1% _0 4+ K

A9
B9
AE 1 2

VCC

OU T

GN D

E /D

3 Z 1 34 1 R 3 76

R 16

1

C 9 14 . 1U _ X7 R _1 0V _ 04 +K
C 9 15 . 1U _ X7 R _1 0V _ 04 +K

AL 10 Z 1 37 6
AK 1 0 Z 1 37 7

C 9 16 . 1U _ X7 R _1 0V _ 04 +K
C 9 17 . 1U _ X7 R _1 0V _ 04 +K

AL 11 Z 1 37 8
AK 1 1 Z 1 37 9

C 9 18 . 1U _ X7 R _1 0V _ 04 +K
C 9 19 . 1U _ X7 R _1 0V _ 04 +K

AL 7
AK 7

D P B_ V D D R _1
D P B_ V D D R _2

AK 1 3
AL 13

D PB _ VS S R _5
D PB _ VS S R _4
D PB _ VS S R _3
D PB _ VS S R _2
D PB _ VS S R _1

AL 12
AK 1 2
AJ 11
AH 9
AH 1 1

D V PC L K
D V PD A T A_ 0
D V PD A T A_ 1
D V PD A T A_ 2
D V PD A T A_ 3
D V PD A T A_ 4
D V PD A T A_ 5
D V PD A T A_ 6
D V PD A T A_ 7
D V PD A T A_ 8
D V PD A T A_ 9
D V PD A T A_ 10
D V PD A T A_ 11
D V PD A T A_ 12
D V PD A T A_ 13
D V PD A T A_ 14
D V PD A T A_ 15
D V PD A T A_ 16
D V PD A T A_ 17
D V PD A T A_ 18
D V PD A T A_ 19
D V PD A T A_ 20
D V PD A T A_ 21
D V PD A T A_ 22
D V PD A T A_ 23

D PA _ VS S R _5
D PA _ VS S R _4
D PA _ VS S R _3
D PA _ VS S R _2
D PA _ VS S R _1
D P _ C AL R
H PD 1

EX T TM DS
D VO

R
RB
G
GB
B
BB
DA C1 / CRT
HS Y NC
V S Y NC
R S ET

GP O
I
GP O
I
GP O
I
GP O
I
GP O
I
GP O
I
GP O
I
GP O
I
GP O
I
GP O
I
GP O
I
GP O
I
GP O
I
GP O
I
GP O
I
GP O
I
GP O
I
GP O
I
GP O
I
GP O
I
GP O
I
GP O
I
GP O
I
GP O
I
GP O
I
GP O
I
GP O
I
GP O
I
GP O
I

_0
_1
_2
G EN E RA L
_3
PU R P OS E
_4
IO
/
_5
_6
_7_ B LON
_8_ R OMS O
_9_ R OMS I
_10 _R OMSC K
_11
_12
_13
_14 _H PD 2
_15 _P W R C N T L0
_16 _S S I N
_17 _T H E R MA L_ I N T
_18 _H PD 3
_19 _C TF
_20 _P W R C N T L1
_21 _B B _E N
_22 _R OMC S B
_23 _C LK R E QB
_24 _J MOD E
_25 _T D I
_26 _T C K
_27 _T MS
_28 _T D O

A V DD
A VS S Q
VD D 1D I
V S S 1D I
R2
R 2B
G2
G2B
D AC 2 (T V/ C R T2)

B2
B 2B
C
Y

C OMP
V2 S Y N C
H2 S Y NC
A 2V D D
A2 V D D Q

GE N _A
GE N _B
GE N _C
GE N _D _ H P D 4
GE N _E

A 2 VS S Q
VD D 2D I
V S S 2D I

VR EF G
D P LL _P V D D
D P LL _P V SS

SC L
S DA

PC IE _ PV D D
MP VD D
MP VS S

SE RI A L
BU SE S
PL L&
XT AL

D D C 2 D A TA
D D C 2 C LK

D P LL _V D D C

Z 1 33 9 A J3 0

XT AL OU T

D D C 1 D A TA
D D C 1 C LK

AJ 8
AF 7
AG7
AJ 7
AH 7
AG1 1

PL LT E ST
M8 2X T-S +K

Z 13 68
05 02

OPT ION AL 3V /5V LEV EL SH IFT E RS
3. 3 V T O 5V L E V E L S H I FT L O G I C R E Q U I R ED
D D C 1 ,D D C 2 U S E D ON M 8 x
D D C 3 , D D C 4 A R E 5 V T O L ER A N T O N M 8 x

D P LU S
D MI N U S

D P B_ V D D R

GPIO13 GPIO1 2 GPIO11

SIN
ROM C FG

0

1

0

0

EXT BIO S ROM ENABLE

1

EXT BIO S ROM DISABLE

0

GPIO2 2

WI TH M 8x AS C
I
IN S TAL L M 8x S TR AP R E SI ST OR S
AN D

M8 x
S TR A P P N
I G

GP I O0
GP I O1
GP I O2
GP I O3
GP I O4
GP I O5
GP I O6

R3 8
R 3 82
R5 0
R4 6
R 3 83
R 3 84
R 3 85

10 K _0 4+ K
*1 0K _0 4
*1 0K _0 4
*1 0K _0 4
*1 0K _0 4
*1 0K _0 4
*1 0K _0 4

S OU T
S IN

R 4 09
R 3 95

10 K _0 4+ K
10 K _0 4+ K

GP I O1 1 R 3 88
GP I O1 2 R 3 90
GP I O1 3 R 3 96
S CL K
R 3 94

*1 0K _0 4
*1 0K _0 4
10 K _0 4+ K
*1 0K _0 4

GP I O2 2 R 4 07

10 K _0 4+ K

D V A LI D R 3 4
P S Y NC R3 5

*1 0K _0 4
*1 0K _0 4

D A C 1 _V S Y
D A C 1 _H S Y

D O N O T I NS TA LL M 7 xS TR A P
RE SI ST O R S

R1 9
R2 3

10 K _0 4+ K
10 K _0 4+ K

MEM co nfig
1 . 8V S _V GA

Z 13 42

R 3 71

Z 13 43 R 3 74

0_ 04 +K

15 0_ 1% _0 4+ K

IF H OT PL U G D E TE C T S
I N OT R EQ U R
I ED
R EMO VE A LL TH I S LOGI C E XC EP T
F OR 1 00 K P U L L D OW N

Z 13 44

C 90 0 22 P_ 50 V _0 4+ K
C 90 1 22 P_ 50 V _0 4+ K

Z 1 34 6 R 2 2

4 99_ 1% _0 4+ K

DVPDAT A22
DVPDAT A23

1
*

Qimonda
HYB18T5121 61B2F-20

DVPDAT A22
DVPDAT A23

*
1

Samsung
K4N51163QG -ZC20

R 60 7

1 50 _1 %_ 04 +K

R 60 8

1 50 _1 %_ 04 +K
D A C 1_ H S Y 17
D A C 1_ V SY 1 7

HPD 1 7

HDMI DET

R 47
*10 0K _0 4

CLOSE TO CHIP

FLA S H R OM

2008/03/18

U 24

A VD D
O PT O
I N AL 0 O H M S TR A PS T O G R OU N D
FO R R B , GB , B B AN D R2 B, G 2B B
, 2B

AJ 27

SE E D AC 1_R G B A N D D AC 2_R G B

V DDDI

SH E ET S
PL AC E O R R ES IS TO R S C LO SE T O A SI C

V S SD I

SIN

5

S C LK

6

SCS #

1

3. 3V S _V GA

AL 17 Z 1 34 7
AK 1 7 Z 1 34 8

C 66 8
< R EF E R E N C E >

Z 1 35 4

AJ 14

Z 1 35 5

S OU T

2

T YP E 1

H OL D
W
V CC
VS S
AT 25 F 51 2A N +K

4

. 1U _ 16 V_ 04 +K
1 0K _0 4+ K

AJ 15

Q

C

3
8

AL 14 Z 1 35 1
AK 1 4 Z 1 35 2
Z 1 35 3

D

S

7
1 0K _0 4+ K Z 13 62

R 4 10
N ON-HD C P

AL 15 Z 1 34 9
AK 1 5 Z 1 35 0

AJ 17

*1 0K _0 4
*1 0K _0 4

D AC 1 _B B 17

AH 2 8

AJ 26

D V P D A TA 2 2 R 3 73
D V P D A TA 2 3 R 3 72

1 50 _1 %_ 04 +K
D AC 1 _GB 1 7

AK 2 9
AK 3 0

AL 29

R 48
0_0 4+ K

D AC 1 _R B 1 7

C 89 9 22 P_ 50 V _0 4+ K

AL 26
AK 2 6

HDC P

V DD3

AE 1 6 Z 1 35 6
AF 1 6 Z 1 35 7
AH 1 4

041 1
R 3 56

A 2V D D

AH 1 6

R 3 61
C 59 1

A 2V D D Q

AG1 6

4 . 7K _0 4+ K 4 .7 K _0 4+ K
3 . 3V S _V GA

AF 1 8

. 1U _ 16 V_ 04 +K

V DDDI

AE 1 8

V S SD I

AG1 4 Z 1 35 8
R2 8

7 15 _1 %_0 4+ K

U2 0

A 2 VS S Q
3 0 S MC _V GA _T H E R M

AA 5
AA 4

MX M_L C D _ D D C _C L K 1 6
MX M_L C D _ D D C _D A T A 1 6

AJ 29
AH 2 9

3 0 S MD _V GA _T H E R M

S MC _V GA _T H E R M
S MD _V GA _T H E R M

Z 13 63
R 3 55
0 _0 4+ K
R 3 60
Z 13 64
0 _0 4+ K

AE 5
AE 4

D+
D-

7

5

S CL K
S DA T A

C9 0
VDD
D+

R3 2

10 K _0 4+ K

MX M_H D MI _D D C _ D A TA 17
MX M_H D MI _D D C _ C LK 17
3. 3 VS _ VG A

D-

3

DA L ER T
Z1 36 6
4
TH E R M
G ND
A D M10 32 A R M/ AS C 7 51 1M8 +K

2. 2 K _0 4+ K

D+

2

3. 3 VS _ VGA
R 3 64

2 20 0P _5 0V _ 04 +K

1

Z 13 65

Z 1 35 9
Z 1 36 0

AE 1 4 Z 1 36 1

8

6

MX M_C R T_ D D C _D A T A 1 7
MX M_C R T_ D D C _C L K 1 7

AC 5
AC 4

AF 9
AG9

T S _F D O

T X2 M_D P B 3P _V GA 17
T X2 P_ D P B3 N _V GA 17

R 60 6

D D C 4D A TA _ D P 4_ AU X N
D D C 4C L K _D P 4_ A U XP
TH ER MA L

T X1 M_D P B 2P _V GA 17
T X1 P_ D P B2 N _V GA 17

AL 27
AK 2 7

AF 4
AH 4

TE ST

D P A_ V D D R

AL 28
AK 2 8

D D C 3D A TA _ D P 3_ AU X N
D D C 3C L K _D P 3_ A U XP

TE S TE N

T X0 M_D P B 1P _V GA 17
T X0 P_ D P B1 N _V GA 17

D P B_ P VD D
D P B_ P VS S

AA 8

AJ 28

3 . 3V S _V GA

T XC M_ D P B0 P _V GA 1 7
T XC P _D P B 0 N _V GA 1 7

D P A_ P VD D
D P A_ P VS S

AE 1 1
AF 1 1

D P A_ V D D R _1
D P A_ V D D R _2

22 0_ 1% _0 4+ K

B - 14 M82-XT-2

C 9 12 . 1U _ X7 R _1 0V _ 04 +K
C 9 13 . 1U _ X7 R _1 0V _ 04 +K

Z 1 37 4
Z 1 37 5

D V PC N T L_ 0
D V PC N T L_ 1
D V PC N T L_ 2

XT AL I N

AD1 2
R 37 8

*27 . 00 0MH z+ K

Z 1 37 2
Z 1 37 3

AJ 9
AJ 10

D V PC N T L_ MV P _0
D V PC N T L_ MV P _1

Z 1 33 8 A J3 1

1K _0 4+ K Z 1 34 0 A H 2 6

AK 9
AL 9

AJ 12
AJ 13

*1 24 _1 %_ 04

X1
2

R3 3

AH3 1

P C I E _P V D D

. 1U _1 6V _0 4+ K

1 K _0 4+K

AH1 2
A G1 2

D P LL _P V D D
D PL L_ P VS S

2 49 _1 %_ 06 +K

4

T XC M _D P B 0P
I N TE GR A T ED
TMD S/ D P P OR T T XC P _ D P B0 N

TX 0M_ D P A1 P
TX 0P _D P A 1 N

R 2 S ET

PL AC E V R EF D IV I DE R
AN D CA P CL O SE T O
AS I C

3. 3 V S_ V GA

0 41 5

TX C M_D P A 0P
TX C P _D P A 0N

R 3 66

*0 _0 4

R 3 63

0 _0 4+ K

V GA _ AL E R T# 3 0

Schematic Diagrams

M82-XT-3
U 23 E

U 23 D
PART4 OF6

C 20 0

C 17 9

C 2 22

*10 U _ 10 V _0 8

A 15
A 22
A 28
A4
A8
B8
C9
D1
H1
H 11
H 12
H 14
H 16
H 18
H 20
H 21
B 31
M1

C 1 45

1 0U _1 0V _ 08 +K

10 U _ 10 V_ 0 8+ K
1U _1 6V _0 6 +K

C5 8

C6 2

C 21 9

1U _ 16 V _0 6+ K 1 U _1 6V _ 06 +K

C 1 70

C 1 33

* 1U _ 16 V _0 6

C3 6

C 1 87

C 18 5

AA9
Y9
V9
T9
J 11
J 20
J 21
L9

*1 U _1 6V _ 06
1U _ 16 V _0 6+ K 1 U _1 6V _ 06 +K

* 1U _ 16 V _0 6

V DD_ CT
3. 3 V_ D E LA Y

V DDR
V DDR
V DDR
V DDR
V DDR
V DDR
V DDR
V DDR
V DDR
V DDR
V DDR
V DDR
V DDR
V DDR
V DDR
V DDR
V DDR
V DDR

1_ 1
1_ 2
1_ 3
1_ 4
1_ 5
1_ 6
1_ 7
1_ 8
1_ 9
1_ 10
1_ 11
1_ 12
1_ 13
1_ 14
1_ 15
1_ 16
1_ 17
1_ 18

V D D _ C T _1
V D D _ C T _2
V D D _ C T _3
V D D _ C T _4
V D D _ C T _5
V D D _ C T _6
V D D _ C T _7
V D D _ C T _8

C 2 13

C 22 6

C9 9
1U _1 6V _ 06 +K

10 U _1 0V _ 08 +K 1 U _1 6V _ 06 +K
L66

Z 1 40 2 A F 1
AF2

1 U _ 16 V _0 6+ K

Z 1 40 3 A E 1
AE2

H C B 1 00 5K F -12 1T 20 _0 4+ K
C 6 16

C6 0 0

C 60 9

. 1 U _1 0 V_ 04 +K

1U _ 1 6V _0 6+ K
M2
M3
L4
AD 11

10 U _ 10 V_ 0 8+ K
L72

H C B 1 00 5K F -12 1T 20 _0 4 +K
C 5 96

1U _ 1 6V _0 6+ K

P
O
W
E
R

V D D R 5_ 1
V D D R 5_ 2

A 10
A 19

V D D C _1
V D D C _2
V D D C _3
V D D C _4
V D D C _5
V D D C _6
V D D C _7
V D D C _8
V D D C _9
V D D C _ 10
V D D C _ 11
V D D C _ 12
V D D C _ 13
V D D C _ 14
V D D C _ 15
V D D C _ 16
V D D C _ 17
V D D C _ 18
V D D C _ 19
V D D C _ 20
V D D C _ 21
V D D C _ 22
V D D C _ 23
V D D C _ 24
V D D C _ 25
V D D C _ 26
V D D C _ 27
V D D C _ 28
V D D C _ 29
V D D C _ 30
V D D C _ 31
V D D C _ 32
V D D C _ 33

RS V D_ 1
RS V D_ 2
RS V D_ 3
RS V D_ 4
V D D R H _1
V D D R H _2

1 U _ 16 V_ 0 6+ K
B 10
B 19

VS S _ ME MC LK _ 0
VS S _ ME MC LK _ 1

1 . 8V S _V GA

V GA _C OR E
R 11
P 11
C3 0

C 50

1U _1 6V _0 6 +K

V S S RH_ 1
V S S RH_ 2

B B N_ 1
B B N_ 2
B B P _1
B B P _2

1U _ 16 V _0 6+ K

D

S AO 34 09 +K

Back B ias

V 11
U 11

Q1 5

V D D R 4_ 1
V D D R 4_ 2

P C I E _V D D C _1
P C I E _V D D C _2
P C I E _V D D C _3
P C I E _V D D C _4
P C I E _V D D C _5
P C I E _V D D C _6
P C I E _V D D C _7
P C I E _V D D C _8
P C I E _V D D C _9
PC IE _ V D D C _ 10
PC IE _ V D D C _ 11
PC IE _ V D D C _ 12

C5 9 4
VD D _ME M_ C L K0
VD D _ME M_ C L K1

CORE GND

V D D R 3_ 1
V D D R 3_ 2
V D D R 3_ 3
V D D R 3_ 4

_1
_2
_3
_4
_5
_6
_7
_8

V D D C I _1
V D D C I _2
V D D C I _3
V D D C I _4

AF 3 0
AF 3 1
AF 2 9
AF 2 7
AF 2 8
A G2 9
A G3 0
A G3 1

1 . 8V S _ VG A

AA2 3
AC2 4
AC2 5
AE2 6
AE2 7
AE2 8
L 23
M2 3
P2 3
T 23
V2 3
Y2 3

1. 1 V S_ V GA

V GA _C OR E

L 11
L 14
L 17
L 20
M1 2
M1 5
M1 8
M2 1
AC2 0
P1 4
P1 7
P2 0
R1 2
R1 5
R1 8
R2 1
AD2 0
U1 4
U1 7
U2 0
V1 2
V1 5
V1 8
V2 1
Y1 1
Y1 4
Y1 7
Y2 0
AA1 2
AA1 5
AA1 8
AA2 1
P9
J 12
J 14
J 16
J 18

C2 4

C3 1

C 59 0

C 5 88

C5 8 9

*1 0U _ 10 V _0 8 *1 U _ 16 V _0 6 1U _ 16 V _0 6+ K *1 U _1 6V _ 06 1 U _ 16 V_ 06 + K

C2 3

C6 8

C 32

C2 5

S5
1

S H OR T
2

S1
1

S H OR T
2

S4
1

S H OR T
2

S2
1

S H OR T
2

A 2V S S Q

S8
1

S H OR T
2

V S S_ ME MC L K _1

S7
1

S H OR T
2

S6
1

S H OR T
2

S9
1

S H OR T
2

S3
1

S H OR T
2

D P B _P V S S
D P LL _P V S S
V S SD I

V S S_ ME MC L K _0
MP V S S
D P A _P V S S
LP V S S

C1 6 6

10 U _ 10 V_ 0 8+ K
1 U _1 6V _ 06 +K 1U _ 16 V _0 6+ K *1 U _1 6V _ 06 1 U _ 16 V_ 06 + K

C2 6

C9 4

C 33

C 1 14

C2 9

10 U _ 10 V_ 0 8+ K
1 U _1 6V _ 06 +K *1U _ 1 6V _0 6 1U _1 6V _ 06 +K 1 U _ 16 V_ 06 + K

C2 7

C3 4

C 22

C 1 01

C1 6 7

10 U _ 10 V_ 0 8+ K
1 U _1 6V _ 06 +K 1U _ 16 V _0 6+ K 1U _1 6V _ 06 +K 1 U _ 16 V_ 06 + K

Z1 40 1

PLA CE ALL DECOUPLIN G CAPS
CLO SE TO THE ASIC
AND RUN DEDICATED T RACES
FRO M ASIC PINS
TO JOIN THE GROUND PLANE
WIT H ONE VIA AT THE CAP

Sheet 14 of 47
M82-XT-3

L 16
C 1 73

C 18 2

C 18 0

C 1 81

H C B 20 1 2K F -12 1T 30 _0 6+ K

1 0U _ 10 V _0 8+ K
1 U _ 16 V _0 6+ K 1U _ 1 6V _0 6+ K *1 U _ 16 V_ 0 6

M8 2X T-S + K

3. 3 V S _V GA

G

M82 XT -S +K
3. 3 VS _ V GA

R 11 6
10 0K _ 04 +K

PLACE ALL DECOUPLING AS CLOSE TO ASIC AS POSS IBLE

Z1 40 4
D

R 12 0
7 5K _0 4+ K
Z 14 05 G

Q 16
S

2 N 7 00 2W + K
C 2 48

40mA

. 0 1U _ 16 V _X 7R _0 4+ K

1. 8 V S_ V GA

FORM8x
INSTALL LVDDRAND LVDDC TO+1.8V
WITHTHE ONEL VDDC FIL TER
DONOT INSTALL LVDDRFILTER

400 mA

1. 8 V S_ V GA

200mA

INSTALL STRAP RESISTOR
L 62
H C B1 60 8K F -1 21 _0 6+ K C 5 93
C 5 98
C 61 2

1. 1 V S _V GA

LV D D R

10 U _1 0V _ 08 +K 1 U _1 6V _ 06 +K . 1 U _ 10 V_ 0 4+ K

1. 1 V S _V GA
LV D D C

40mA

40m A
52m A

1. 8 V S_ V GA

10 U _1 0 V_ 08 +K
L5
H C B1 00 5K F -1 21 T2 0_ 04 +K
C4 3

LP V D D
C5 5

1 . 8V S _V GA

. 1U _ 10 V _0 4+ K

*
LP V S S
D P LL _P V D D

1. 8 V S_ V GA

10 U _1 0 V_ 08 +K 1 U _1 6V _ 06 +K

L 73
H C B1 00 5K F -1 21 T2 0_ 04 +K
C 6 52

. 1U _ 10 V _0 4+ K

P C I E_ P V D D
C 6 43

( 1.8 V @ 40M A PC I E_P VD D )

104mA

C 64 8
1 . 8V S _V GA

A 2V D D
C6 4

( 3 .3V @

C 53

A 2V D D Q

1 . 8V S _V GA

C5 4

C 70

10 U _ 10 V_ 0 8+ K 1 U _1 6 V_ 06 + K

. 1U _ 10 V _0 4+ K

* 10 U _1 0V _ 08

L6 9
H C B 10 05 K F -12 1T 20 _0 4+ K
C4 7

96mA

135M A A2V D D)

10 U _ 10 V_ 08 + K . 1 U _1 0V _ 04 +K

L7
H C B1 00 5K F -1 21 T2 0_ 04 +K
C4 5

C 89

C 16 1

@ 11 0M A

C 1 08

C4 9

1 0U _1 0V _ 08 +K . 1U _ 10 V _0 4+ K

L6 8
H C B 10 05 K F -12 1T 20 _0 4+ K
C6 1 0

L4

H C B 10 05 K F-1 21 T2 0_ 0 4+ K
C 42

V DDDI
1 U _1 6 V_ 06 + K
VS S D I

V GA _ C OR E

L 22

D P L L_ V D D C

C5 1

*
D P LL _P V S S

. 1 U _ 10 V_ 0 4+ K

H C B 10 05 K F -1 2 1T 20 _0 4+ K

10 U _1 0V _ 08 +K

( D PL L_ VD D C 1. 1V @ 10 0M A)

C 73

10 U _1 0V _ 08 +K 1 U _1 6V _ 06 +K

C 1 97

. 1 U _1 0V _ 04 +K

A V DD
C 62 6

C 65

( VD D _C T )

( 1. 8V @ 40 0M A P CI E _VD D R )

C 1 64

1U _ 16 V _0 6+ K

C 83

C2 8

1U _ 16 V _0 6+ K 1 U _1 6V _ 06 +K 1 U _ 16 V_ 0 6+ K

400m A

230mA
C1 9 5

1U _ 1 6V _0 6 +K

48m A
1. 8 V S_ V GA

V S S_ ME MC L K _1

C 41

10 U _1 0V _ 08 +K 1 U _1 6V _ 06 +K
. 1 U _1 0 V_ 04 +K

*
D P A _ PV S S

472mA

*D P LL _P V S S

C5 6

. 1 U _1 0V _ 04 +K

1 0U _1 0V _ 08 +K . 1U _ 10 V _0 4+ K

10 U _ 10 V_ 08 + K 1 U _1 6V _ 06 +K

L6
H C B1 00 5K F -1 21 T2 0_ 04 +K
C4 4

M A V DD R H A _2
I N C LU D ED IN VD D R 1)

( PC I E_V D D C 1. 1V @ 1 A )

V D D _ C T ( VD D _C T 1. 8V
C 12 5

( 1.8 V @ M A V DD R H A _1
I N C LU D ED IN VD D R 1)

V S S_ ME MC L K _0
V D D _M EM _C L K 1 ( 1.8 V @

C 6 20

1 U _1 6 V_ 06 + K

. 1U _ 10 V _0 4+ K

100 mA
3 . 3V S _V GA

V D D _M EM _C L K 0

1 . 1V S _ VG A

D P A _ PV D(D1.8V@20m
A)
C 61 5

1 0U _1 0V _ 08 +K 1U _ 1 6V _0 6+ K . 1 U _1 0V _ 04 +K

L1 3
H C B 10 05 K F -12 1T 20 _0 4+ K
C1 3 1

( 1 .8V @ 40M A D P LL _P VD D )

C 67
1 . 8V S _V GA

68m A

0_ 08 +K
R 35 9

D P B _P V D D
( 1
.8V@20m
A)
*
D P B _P V S S

C 18 9

C 1 93

10 U _ 10 V_ 08 + K 1 U _1 6V _ 06 +K
L 24
H C B1 00 5 KF -1 21 T2 0_ 04 +K
C 19 9
C 1 94
C 19 0

D P B _ VD D R

C 6 18
C6 0 1
C 61 3
1 0U _1 0V _0 8 +K1U _ 16 V _0 6+ K

L6 5
H C B 10 05 K F -12 1T 20 _0 4+ K
C6 0 3

64mA

( 1. 8V @ 40M A LP VD D )

C 71

1 U _1 6V _ 06 +K
C5 2

L 23
H C B1 00 5 KF -1 21 T2 0_ 04 +K
C 19 8

. 1U _ 10 V _0 4+ K

C 6 19

1 0U _ 10 V _0 8+ K 1U _ 16 V _0 6+ K . 1U _1 0V _0 4 +K

L6 3
H C B 10 05 K F -12 1T 20 _0 4+ K

C 61 1
1 . 8V S _V GA

L8
H C B1 00 5K F -1 21 T2 0_ 04 +K
C4 6

C 61 4

C 82

. 1U _ 10 V _0 4+ K
D P A _ VD D R

C 38

10 U _1 0 V_ 08 +K 1 U _1 6V _ 06 +K .1 U _ 10 V _0 4+ K

1. 8 V S_ V GA

1. 8 V S_ V GA

C8 0

10 U _ 10 V _0 8+ K 1 U _ 16 V_ 06 + K

10 U _ 10 V_ 0 8+ K 1 U _1 6 V_ 06 +K . 1U _ 10 V _0 4+ K

200mA

( 1. 8V @ 4 00M A L VD D C , LV DD R )

C 5 97

1. 8 V S_ V GA

DONOT INSTAL L STRAP
RE
SISTOR

L6 4
H C B 10 05 K F -12 1T 20 _0 4+ K
C6 0 2

L 10
H C B1 00 5 KF -1 21 T2 0_ 04 +K
C8 1

R 3 58
0 _0 8+ K

C 59 2

FORM8x
INSTALL DPA_VDDRTO+1.1V AND
DPB_VDDR TO+1.1V
WIT HSEPARATE FIL TERS

C 1 92
1 U _1 6V _ 06 +K

M PV D D

( 9
. 5 V- 1. 1V @ 2 30M A M PV DD )

C 18 8
*
. 1U _ 10 V _0 4+MP
K VS S

( 1 .8V @ 100M A VD D 1D I ,V D D2 DI )

( 1. 8V @ 6 5M A A VD D )

C 6 27
1 U _1 6 V_ 06 + K

( 1 .8V @ 2M A A 2VD D Q )

1 0U _1 0V _ 08 +K . 1U _ 10 V _0 4+ K

*
A 2V S S Q

M82-XT-3 B - 15

B.Schematic Diagrams

C 23 5

I/O Intern al

( 3 .3V @ 50M A V D D R3 )

AC 18
AC 16
AC 14
AC 12

P C I E _V D D R
P C I E _V D D R
P C I E _V D D R
P C I E _V D D R
P C I E _V D D R
P C I E _V D D R
P C I E _V D D R
P C I E _V D D R

PCI-Ex press

1 0U _ 10 V _0 8+ K

Memor y
I/ O
Clock

V S S _1
V S S _2
V S S _3
V S S _4
V S S _5
V S S _6
V S S _7
V S S _8
V S S _9
V S S _1 0
V S S _1 1
V S S _1 2
V S S _1 3
V S S _1 5
V S S _1 6
V S S _1 7
V S S _1 8
V S S _1 9
V S S _2 0
V S S _2 1
V S S _2 2
V S S _2 3
V S S _2 4
V S S _2 5
V S S _2 6
V S S _2 7
V S S _2 8
V S S _2 9
V S S _3 0
V S S _3 1
V S S _3 2

B 25
J8
B5
D1 1
C1 7
C2 2
C2 7
D2 9
C3
C6
D3
D2 8
F 29
D4
F 11
F 12
F 14
F 16
F 18
F 20
F 21
F 23
F 25
F7
F9
G3
G6
H2 3
J3
J4
J6
K1
L1 2
L1 5
L1 8
L2 1
L6
M1 1
M1 4
M1 7
M2 0
M6
P 12
P 15
P 18
P 21
P6
A C 21
R1 4
R1 7
R2 0
T6
U1
U1 2
U1 5
U1 8
U2 1
A E 20
V 14
V 17
V 20
P2
V6
W2
Y1 2
Y1 5
Y1 8
Y2 1
Y6
M9

Memo ry I/O

P CI -E xp res s GN D

A1 3
A2
C1 8
A2 4
A3 0
AA1
A A1 1
A A1 4
A A1 7
A A2 0
AA6
AC2
AC7
AE3
AL 4
A D1 4
A F1 2
A F1 4
A D1 6
A D1 8
AE6
A G2
AE9
A H2 5
AK1
A K3 1
AJ 6
AL 2
A L3 0
B1
C1 3

P C I E _V S S _1
P C I E _V S S _2
P C I E _V S S _3
P C I E _V S S _4
P C I E _V S S _5
P C I E _V S S _6
P C I E _V S S _7
P C I E _V S S _8
P C I E _V S S _9
P C I E _V S S _1 0
P C I E _V S S _1 1
P C I E _V S S _1 2
P C I E _V S S _1 3
P C I E _V S S _1 4
P C I E _V S S _1 5
P C I E _V S S _1 6
P C I E _V S S _1 7
P C I E _V S S _1 8
P C I E _V S S _1 9
P C I E _V S S _2 0
P C I E _V S S _2 1
P C I E _V S S _2 2
P C I E _V S S _2 3
P C I E _V S S _2 4
P C I E _V S S _2 5
P C I E _V S S _2 6
P C I E _V S S _2 7
P C I E _V S S _2 8
P C I E _V S S _2 9
P C I E _V S S _3 0
P C I E _V S S _3 1
P C I E _V S S _3 2

1 . 8V S _ VG A
V S S _3 3
V S S _3 4
V S S _3 5
V S S _3 6
V S S _3 7
V S S _3 8
V S S _3 9
V S S _4 0
V S S _4 1
V S S _4 2
V S S _4 3
V S S _4 4
V S S _4 5
V S S _4 6
V S S _4 7
V S S _4 8
V S S _4 9
V S S _5 0
V S S _5 1
V S S _5 2
V S S _5 3
V S S _5 4
V S S _5 5
V S S _5 6
V S S _5 7
V S S _5 8
V S S _5 9
V S S _6 0
V S S _6 1
V S S _6 2
V S S _6 3
V S S _6 4
V S S _6 5
V S S _6 6
V S S _6 7
V S S _6 8
V S S _6 9
V S S _7 0
V S S _7 1
V S S _7 2
V S S _7 3
V S S _7 4
V S S _7 5
V S S _7 6
V S S _7 7
V S S _7 8
V S S _7 9
V S S _8 0
V S S _8 1
V S S _8 2
V S S _8 3
V S S _8 4
V S S _8 5
V S S _8 6
V S S _8 7
V S S _8 8
V S S _8 9
V S S _9 0
V S S _9 1
V S S _9 2
V S S _9 3
V S S _9 4
V S S _9 5
V S S _9 6
V S S _9 7
V S S _9 8
V S S _9 9
VS S _ 10 0
VS S _ 10 1
VS S _ 10 2

Core

Pa rt 5 of 6
A A2 6
A A2 9
A C2 6
A D3 1
A E2 9
A E3 0
A E3 1
F2 8
G2 6
G2 9
G3 0
G3 1
H2 9
J2 5
J2 6
L2 6
L2 9
L3 0
L3 1
M2 6
M2 9
P2 6
R2 9
R3 0
R3 1
T2 6
U2 9
V2 6
Y2 6
Y2 9
Y3 0
Y3 1

Schematic Diagrams

DDRII 32MX16
U2 7

B.Schematic Diagrams

U2 6
B A0
B A1

L2
L3

A 12
MA A 11
MA A 10
MA A 9
MA A 8
MA A 7
MA A 6
MA A 5
MA A 4
MA A 3
MA A 2
MA A 1
MA A 0

R 2
P7
M2
P3
P8
P2
N 7
N 3
N 8
N 2
M7
M3
M8

CL K A 0 #
CL K A 0

K8
J8

CK E A 0

K2

C S A 0_ 0 #

L8

W EA0 #

K3

RA S A 0 #

K7

CA S A 0 #

L7

D Q MA #2
D Q MA #0

F3
B3

OD T A 0

K9

R D QS A 2
W D QS A 2

F7
E8

D
D
D
D
D
D

BA0
BA1
A1 2
A1 1
A 1 0 /A P
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

CK
CK

Q 15
Q 14
Q 13
Q 12
Q 11
Q 10
D Q9
D Q8
D Q7
D Q6
D Q5
D Q4
D Q3
D Q2
D Q1
D Q0

V D D Q1
V D D Q2
V D D Q3
V D D Q4
V D D Q5
V D D Q6
V D D Q7
V D D Q8
V D D Q9
V D D Q 10

CK E

CS
WE

VD
VD
VD
VD
VD

RA S
CA S
L DM
UD M

D1
D2
D3
D4
D5

V D DL
V S S DL

B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8

MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD

A0
A2
A7
A1
A4
A5
A3
A6
A2 1
A1 6
A2 2
A1 8
A1 9
A2 3
A1 7
A2 0

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

R
P
M
P
P
P
N
N
N
N
M
M
M

2
7
2
3
8
2
7
3
8
2
7
3
8

CL K A 0 #
CL K A 0

K 8
J8

CK E A 0

K 2

D
D
D
D
D
D

BA0
BA1
A1 2
A1 1
A 1 0 /AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

CK
CK

L8

C S A 0_ 0 #

L2 7

< V A L UE >

W EA0 #

K 3

RA S A 0 #

K 7

CA S A 0 #

L7

D Q MA # 1
D Q MA # 3

F 3
B 3

OD T A 0

K 9

R D QS A 1
W DQ S A 1

F 7
E 8

Z 1 50 2
C 2 30

OD T

C2 3 6

Q1 5
Q1 4
Q1 3
Q1 2
Q1 1
Q1 0
D Q9
D Q8
D Q7
D Q6
D Q5
D Q4
D Q3
D Q2
D Q1
D Q0

V D D Q1
V D D Q2
V D D Q3
V D D Q4
V D D Q5
V D D Q6
V D D Q7
V D D Q8
V D D Q9
V D D Q1 0

CKE

1 . 8 V S _V GA

A1
E1
J9
M9
R1
J1
J7

L2
L3

BA 0
BA 1
A1 2
MA A 11
MA A 10
MA A 9
MA A 8
MA A 7
MA A 6
MA A 5
MA A 4
MA A 3
MA A 2
MA A 1
MA A 0

CS
WE

VD
VD
VD
VD
VD

RAS
CAS
L DM
UD M

D1
D2
D3
D4
D5

V D DL
V S S DL

B
B
D
D
D
D
C
C
F
F
H
H
H
H
G
G

9
1
9
1
3
7
2
8
9
1
9
1
3
7
2
8

A
C
C
C
C
E
G
G
G
G

9
1
3
7
9
9
1
3
7
9

MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD
MD

A2 8
A2 4
A3 0
A3 1
A2 6
A2 9
A2 5
A2 7
A1 2
A9
A1 3
A8
A1 1
A1 5
A1 0
A1 4

1 .8 VS_ V G A

A 1
E 1
J9
M9
R 1
J1
J7

L80

C7 1 3

1 U _1 0 V _ 0 6 + K
1 . 8 V S _V GA

Sheet 15 of 47
DDRII 32MX16

R D QS A 0
W D QS A 0

R1 1 3

4 . 9 9 K _ 1 % _0 4 + K

B7
A8

Z1501

(S S T L-1 .8 ) VR EF = . 5 *V D D Q

. 1 U _1 6 V _ 0 4 +K

L DQ S
L DQ S

V S S Q1
V S S Q2
V S S Q3
V S S Q4
V S S Q5
V S S Q6
V S S Q7
V S S Q8
V S S Q9
V S S Q 10

UD Q S
UD Q S

J2
VR EF
A2
E2
L1
R 3
R 7
R 8

R 117
C2 3 8
. 1 U _ 1 6 V _ 04 + K

4 . 9 9 K _ 1 %_ 0 4 + K

NC
NC
NC
NC
NC
NC

# A2
# E2
#L1
# R3
# R7
# R8

VSS1
VSS2
VSS3
VSS4
VSS5

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

1 .8 V S _ V G A

B 7
A 8

R D QS A 3
W DQ S A 3

R 444

4. 99 K _ 1 % _ 0 4+ K

Z150 3

(S S TL -1. 8 ) V R E F = . 5 *VD D Q

V S S Q1
V S S Q2
V S S Q3
V S S Q4
V S S Q5
V S S Q6
V S S Q7
V S S Q8
V S S Q9
V S S Q1 0

U D QS
U D QS

J2
A 2
E 2
L1
R 3
R 7
R 8

R 4 45
C7 1 4
. 1U _ 1 6V _0 4 + K

4 . 9 9 K _ 1% _ 0 4 + K

C7 1 2

. 1U _ 1 6V _0 4 + K
L DQ S
L DQ S

V RE F

A3
E3
J3
N1
P9

< VAL U E>

Z 15 0 4

OD T

NC
NC
NC
NC
NC
NC

# A2
# E2
# L1
# R3
# R7
# R8

VSS1
VSS2
VSS3
VSS4
VSS5

A
B
B
D
D
E
F
F
H
H

1 U _ 1 0 V _ 0 6 +K

7
2
8
2
8
7
2
8
2
8

C L KA0

1 2 C L KA0

C LK A 0 #

1 2 C L KA0 #

R 1 11
A 3
E 3
J3
N 1
P 9

5 6. 2 _ 1 % _ 04 + K

47 0 P _ X 7 R _ 5 0 V _ 0 4+ K

1 .8 VS _ VG A

1 .8 V S _ V G A

C 1 62

C8 6

C 132

C2 4 4

C 137

*. 1 U _ 16 V _ 0 4
. 0 1 U _ 1 6 V _ 0 4+ K

* . 1 U _ 1 6 V _ 04

C 7 10

C 2 01

. 1 U _ 1 6 V _ 04 + K

B A0
B A1

L2
L3
R 2
P7
M2
P3
P8
P2
N 7
N 3
N 8
N 2
M7
M3
M8

CL K A 1 #
CL K A 1

K8
J8

CK E A 1

K2

C S A 1_ 0 #

L8

W EA1 #

K3

RA S A 1 #

K7

CA S A 1 #

L7

D Q MA #6
D Q MA #4

F3
B3

OD T A 1

K9

C2 2 7

C 18 6

C2 0 6

*1 0 U _ 1 0 V _ 0 8

* .1 U_ 1 6 V _ 0 4

1 U _1 0 V _ 0 6 +K

. 1U _ 1 6V _0 4 + K

. 1 U _ 1 6 V _ 0 4 +K

* .1 U_ 1 6 V _ 0 4

. 0 1U _ 1 6V _0 4 + K

U 25

A 12
MA A 11
MA A 10
MA A 9
MA A 8
MA A 7
MA A 6
MA A 5
MA A 4
MA A 3
MA A 2
MA A 1
MA A 0

C 21 5

C 1 51

* . 1 U _ 1 6 V _ 04

* . 1U _ 1 6V _0 4
1 U _1 0 V _ 0 6 + K

H Y B 1 8 T 51 2 1 6 1 B 2 F -2 0+ K

C 203

C1 4 4

C 21 1

* 1 0 U _ 1 0 V _ 08
10 U _ 10 V _ 0 8 + K

5 6 . 2_ 1 % _ 0 4+ K

C2 3 3

H Y B 1 8 T 5 12 1 6 1 B 2 F -2 0 +K

C2 2 1

R 1 10
Z 1 5 05

U2 1

BA0
BA1
A1 2
A1 1
A 1 0 /A P
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

CK
CK

D
D
D
D
D
D

Q 15
Q 14
Q 13
Q 12
Q 11
Q 10
D Q9
D Q8
D Q7
D Q6
D Q5
D Q4
D Q3
D Q2
D Q1
D Q0

V D D Q1
V D D Q2
V D D Q3
V D D Q4
V D D Q5
V D D Q6
V D D Q7
V D D Q8
V D D Q9
V D D Q 10

CK E

CS
WE
RA S

VD
VD
VD
VD
VD

CA S
L DM
UD M

D1
D2
D3
D4
D5

V D DL
V S S DL

B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8

M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M

GDDR2 32MX16
MEMORY

A9
C1
C3
C7
C9
E9
G1
G3
G7
G9

A1 2
MA A 11
MA A 10
MA A 9
MA A 8
MA A 7
MA A 6
MA A 5
MA A 4
MA A 3
MA A 2
MA A 1
MA A 0

R
P
M
P
P
P
N
N
N
N
M
M
M

CL K A 1 #
CL K A 1

K 8
J8

CK E A 1

K 2

2
7
2
3
8
2
7
3
8
2
7
3
8

BA0
BA1
A1 2
A1 1
A 1 0 /AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

CK
CK
CKE

1 . 8 V S _V GA
C S A 1_ 0 #

A1
E1
J9
M9
R1
J1
J7

L2
L3

BA 0
BA 1

DA 3 4
DA 3 9
DA 3 2
DA 3 6
DA 3 8
DA 3 3
DA 3 7
DA 3 5
DA 5 4
DA 4 9
DA 5 3
DA 4 8
DA 5 1
DA 5 5
DA 5 0
DA 5 2

L1 8

< V A L UE >

L8

W EA1 #

K 3

RA S A 1 #

K 7

CA S A 1 #

L7

D Q MA # 7
D Q MA # 5

F 3
B 3

OD T A 1

K 9

R D QS A 7
W DQ S A 7

F 7
E 8

R D QS A 5
W DQ S A 5

B 7
A 8

Z 1 50 7
C 1 72

OD T

C1 7 1

CS
WE
RAS
CAS
L DM
UD M

D
D
D
D
D
D

Q1 5
Q1 4
Q1 3
Q1 2
Q1 1
Q1 0
D Q9
D Q8
D Q7
D Q6
D Q5
D Q4
D Q3
D Q2
D Q1
D Q0

V D D Q1
V D D Q2
V D D Q3
V D D Q4
V D D Q5
V D D Q6
V D D Q7
V D D Q8
V D D Q9
V D D Q1 0
VD
VD
VD
VD
VD

D1
D2
D3
D4
D5

V D DL
V S S DL

B
B
D
D
D
D
C
C
F
F
H
H
H
H
G
G

9
1
9
1
3
7
2
8
9
1
9
1
3
7
2
8

A
C
C
C
C
E
G
G
G
G

9
1
3
7
9
9
1
3
7
9

M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M

DA4 0
DA4 5
DA4 2
DA4 7
DA4 6
DA4 1
DA4 4
DA4 3
DA6 0
DA5 9
DA6 2
DA5 6
DA5 7
DA6 1
DA5 8
DA6 3

CAS A0 #
CAS A1 #

1 2 C ASA0 #
1 2 C ASA1 #

W EA0 #
W EA1 #

1 2 W E A0 #
1 2 W E A1 #

CKE A0
CKE A1

1 2 C KEA0
1 2 C KEA1

C S A 0_ 0 #
C S A 1_ 0 #

1 2 C SA0 _ 0 #
1 2 C SA1 _ 0 #

O DT A 0
O DT A 1

1 2 O DT A0
1 2 O DT A1

W D QS A [ 7 . . 0 ]

1 2 W D Q S A [7 ..0 ]

R DQ S A [7 ..0 ]

1 2 R D Q S A [7 ..0 ]

D QM A # [ 7 . . 0 ]

1 2 D QM A # [ 7 . . 0 ]

1 .8 VS_ V G A

MD A [ 6 3 . . 0 ]

1 2 M D A [ 63 . . 0 ]

M AA[1 1 ..0 ]

1 2 M A A [1 1 ..0 ]

A 1
E 1
J9
M9
R 1
J1
J7

RAS A0 #
RAS A1 #

1 2 R ASA0 #
1 2 R ASA1 #

BA1
BA0

1 2 BA 1
1 2 BA 0
L74

A1 2

1 2 A1 2



Z 15 0 9
C 66 4

OD T

C1 1 0
1 U _ 1 0 V _ 0 6 +K

1 . 8 V S _ V GA

R7 3

4 . 9 9 K _ 1% _ 0 4 + K

( SS T L- 1. 8) V R E F = . 5*V D D Q

R D QS A 6
W D QS A 6

F7
E8

R D QS A 4
W D QS A 4

B7
A8

Z1506

A2
E2
L1
R 3
R 7
R 8

C 1 52

R7 2

J2

. 1 U _1 6 V _ 0 4 +K
4 . 9 9 K _ 1% _ 0 4 +K

L DQ S
L DQ S

UD Q S
UD Q S

VR EF
NC
NC
NC
NC
NC
NC

# A2
# E2
#L1
# R3
# R7
# R8

1 U _1 0 V _ 0 6 + K

. 1 U _1 6 V _ 0 4 +K
V S S Q1
V S S Q2
V S S Q3
V S S Q4
V S S Q5
V S S Q6
V S S Q7
V S S Q8
V S S Q9
V S S Q 10
VSS1
VSS2
VSS3
VSS4
VSS5

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

1 .8 VS _ VG A

R 389

4 . 9 9 K _ 1% _ 0 4 + K

A3
E3
J3
N1
P9

(S S TL -1. 8 ) V R E F = . 5 *VD D Q

Z150 8

A 2
E 2
L1
R 3
R 7
R 8

R 36
C6 6 7
. 1U _ 1 6V _0 4 + K

4 . 9 9 K _ 1% _ 0 4 + K

J2

. 1U _ 1 6V _0 4 + K
L DQ S
L DQ S

U D QS
U D QS

V RE F
NC
NC
NC
NC
NC
NC

# A2
# E2
# L1
# R3
# R7
# R8

V S S Q1
V S S Q2
V S S Q3
V S S Q4
V S S Q5
V S S Q6
V S S Q7
V S S Q8
V S S Q9
V S S Q1 0
VSS1
VSS2
VSS3
VSS4
VSS5

A
B
B
D
D
E
F
F
H
H

7
2
8
2
8
7
2
8
2
8

C LK A 1

1 2 CL KA 1

C L KA1 #

1 2 C L K A 1#

R4 0

A 3
E 3
J3
N 1
P 9

5 6. 2 _ 1 % _ 04 + K

R4 1

Z 15 1 0

5 6 . 2_ 1 % _ 0 4+ K

C 116
4 7 0 P _ X 7R _ 5 0V _0 4 + K

H Y B 1 8 T 5 12 1 6 1 B 2 F -2 0 +K

H Y B 1 8 T 51 2 1 6 1 B 2 F -2 0+ K

1 .8 VS _ VG A

C2 0 5

1 .8 V S _ V G A

C2 0 2

C8 7

C 1 27

C2 1 7

C2 1 6

C1 5 6

1 0 U _ 1 0 V _ 0 8+ K

B - 16 DDRII 32MX16

C 1 96
* 1 0 U _ 1 0 V _ 08

*1 0 U _1 0 V _ 0 8

1 U _ 1 0 V _ 0 6+ K

. 1U _ 1 6V _0 4 + K. 1 U _1 6 V _ 0 4 + K

. 1 U _ 1 6 V _ 04 + K. 1U _ 1 6V _0 4 + K

C 2 45

C2 1 4

C2 3 2

C 2 12

C6 1

C7 8

C6 0

* 1 0 U _ 1 0V _0 8
1 0 U _ 1 0 V _ 08 + K

1 U _ 1 0 V _ 0 6+ K

. 1U _ 1 6V _0 4 + K

. 1 U _ 1 6 V _ 0 4+ K

. 1 U _ 16 V _ 0 4 + K. 1 U _1 6 V _ 0 4 +K

C 79
1 0 U _1 0 V _ 0 8 + K

Schematic Diagrams

LVDS, INVERTER
PANEL CONNECTOR
J _L C D 1
L VD S U C L KN
L VD S U C L KP
L VD S U N 1
L VD S U P 1
L VD S L C LK N
L VD S L C LK P
L VD S L N 1
L VD S L P1
L VD S L N 0
L VD S L P0

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
8 81 07 -300 01

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30

L C D _D D C _D A TA
L C D _D D C _C L K
L V D SU N 2
L V D SU P 2

FOR INTERNAL LVDS

L V D SU N 0
L V D SU P 0
L V D SL N 2
L V D SL P 2
3 . 3V S

2A

PL V D D

C 5 74

C7

4 . 7U _ 6. 3V _ 08

. 1U _ 16V _ 04 . 1 U _16 V _0 4

C5

1 0 N B _L V D S_ TX _C L KU P
1 0 N B _L V D S_ TX _C L KU N

3
4

2 RN4 0
1 4 P2 R X0 _0 4- K

L V D SU C L K P
L V D SU C L K N

1 0 N B _L VD S _ TX _U 2 P
1 0 N B _L VD S _ TX _U 2 N

3
4

2 RN3 9
1 4 P2 R X0 _0 4- K

L V D SU P 2
L V D SU N 2

1 0 N B _L VD S _ TX _U 1 P
1 0 N B _L VD S _ TX _U 1 N

3
4

2 RN3 8
1 4 P2 R X0 _0 4- K

L V D SU P 1
L V D SU N 1

1 0 N B _L VD S _ TX _U 0 P
1 0 N B _L VD S _ TX _U 0 N

3
4

2 RN3 7
1 4 P2 R X0 _0 4- K

L V D SU P 0
L V D SU N 0

4
3

1 RN5 7
2 4 P2 R X0 _0 4+ K

L V D SU C L K P
L V D SU C L K N

4
3

1 RN5 9
2 4 P2 R X0 _0 4+ K

L V D SU P 2
L V D SU N 2

1 2 MX M_L VD S _ TX_ U 1P
1 2 MX M_L VD S _ TX_ U 1N

4
3

1 RN6 1
2 4 P2 R X0 _0 4+ K

L V D SU P 1
L V D SU N 1

1 2 MX M_L VD S _ TX_ U 0P
1 2 MX M_L VD S _ TX_ U 0N

4
3

1 RN6 3
2 4 P2 R X0 _0 4+ K

L V D SU P 0
L V D SU N 0

1 0 N B _L V D S_ TX _L 2N
1 0 N B _L V D S_ TX _L 2P

4
3

1 RN4 3
2 4 P2 R X0 _0 4-K

L V D SL N 2
L V D SL P 2

1 0 N B _L V D S_ TX _L 0N
1 0 N B _L V D S_ TX _L 0P

3
4

2 RN4 4
1 4 P2 R X0 _0 4-K

L V D SL N 0
L V D SL P 0

4
3

1 RN4 1
2 4 P2 R X0 _0 4-K

L V D SL C LK N
L V D SL C LK P

4
3

1 RN4 2
2 4 P2 R X0 _0 4-K

L V D SL N 1
L V D SL P 1

3
4

2 RN5 8
1 4 P2 R X0 _0 4+ K

L V D SL N 2
L V D SL P 2

4
3

1 RN6 0
2 4 P2 R X0 _0 4+ K

L V D SL N 0
L V D SL P 0

3
4

2 RN6 2
1 4 P2 R X0 _0 4+ K

L V D SL C LK N
L V D SL C LK P

3
4

2 RN6 4
1 4 P2 R X0 _0 4+ K

L V D SL N 1
L V D SL P 1

10 N B _ LV D S _TX _C L K LN
10 N B _ LV D S _TX _C L K LP
1 0 N B _L V D S_ TX _L 1N
1 0 N B _L V D S_ TX _L 1P

AMD CHECK
3 . 3V S _V GA

FOR M82-EXTERNAL LVDS
1 2 MX M_L VD S _ TX _C LK U P
1 2 MX M_L VD S _ TX _C LK U N

R9
G

2. 2 K_ 04 +K
S

13 MX M_L C D _D D C _ C LK

1 2 MX M_L VD S _ TX_ U 2P
1 2 MX M_L VD S _ TX_ U 2N

Q1
2N 70 02 W+ K
D

L C D _D D C _ C LK

10 N B _L C D _D D C _C L K

R5

0 _0 4-K

1 2 MX M_L VD S _ TX_ L2 N
1 2 MX M_L VD S _ TX_ L2 P
1 2 MX M_L VD S _ TX_ L0 N
1 2 MX M_L VD S _ TX_ L0 P

12 MX M_L V D S_ TX _C L KL N
12 MX M_L V D S_ TX _C L KL P
1 2 MX M_L VD S _ TX_ L1 N
1 2 MX M_L VD S _ TX_ L1 P

3 . 3V S _V GA

Sheet 16 of 47
LVDS, INVERTER

R 11

G

2. 2 K_ 04 +K

S

1 3 MX M_L C D _D D C _ D A TA

Q2
2N 70 02 W+ K
D

L C D _D D C _ D A TA

1 0 N B _L C D _D D C _D A TA

R1 0

0 _0 4-K
S Y S 15 V

PANEL POWER

SY S1 5V

3. 3 V S

R 34 8

R 3 50

1M_ 04

1 M_0 4

U 19
1
2

Z 1 603
D

3

Q3 8
* R B7 51 V
A

G

Z1 60 2

D

D

D

G
S
SI 3 45 6D V

+

6

2 N 70 02 W

.1 U _1 6V _ 04

P LV D D

R 3 47

R 34 6

C 5 76

C 57 5

R 3 49

2 00 _0 4

20 0_ 04

. 1 U _1 6V _0 4

10 U _1 0V _0 8

1 00K _ 04

S

. 1U _ 16 V_ 04
D

Z 16 04

2N 7 002 W +K

G

C 57 7

*1 00 U _6 . 3V _B 2
4

Q3 6
12 MX M_L C D _P W R _E N

C 5 73

5

C 57 2

D

1 0, 18 , 20 , 23 A _R ST #

D 36
C

D

Q37
G

2 N 70 02 W
S

S

R 3 45

D

2 . 7K _0 4+ K

Q3 5
2N 7 002 W

G

10 N B _L C D _P W R _E N

S

R 3 43
*2 . 7K _0 4

3 . 3V S
C 9 07

3 . 3V

R8

3. 3V

R 63

30 B K L_ EN

1 0K _0 4

Z 160 1

2

R1 3
7

7

14

10 0K _0 4
Z 16 07

2 0 S B _B LON

Q1 2

14
S

Q6
*2N 700 2W

G

N B _L C D _B K L_ EN

* .1 U _1 6V _0 4

. 1U _ 50V _ 06

1 9, 2 6, 30 LI D _S W #

12

19 , 30 ,3 2 S B _P WR GD

13

V I N _I N V

C2
. 1U _ 50 V _06

U4 C
7 4L V C 08 PW

7

I N V_ B LON

Z 16 08 10
U 4D
74 LV C 08 P W
11

R 15
S

9

8
3. 3 V

2N 7 002 W +K

G

D
0 412
10 N B _ LC D _ BK L _E N

C3

40 mil

5

D

S

2. 7K _ 04+ K
Z 160 5

L1
H C B2 01 2K F -50 0T 40_ 08

C3 7

6
R7

R 68

U 4B
74 LV C 08 P W

Z 1 606 4

4 . 7K _0 4
2N 7 00 2W +K

G

12 , 13 MX M_L C D _B K L_ E N

VI N

3. 3 V

3
B LON

Q1 3

U 4A
74 LV C 0 8P W

1

7

0 41 2

R 60 9

10 0K _0 4

14

.4 7U _ 16 V_ 06

3. 3 VS

14

10 , 18 ,2 0, 2 3 A _R S T#

4. 7K _ 04

*R B 75 1V
A
D

D9
C

.

INVERTER CONNECTOR

R1

C 4

1M_ 04

. 1 U _1 0V _0 4

J _I N V 1
1
2
3
4
5
6
8 72 13 - 060 0G
6-20-4 1A10-106

J _I NV 1

*2. 7 K_ 04
30 BR I GH T N E SS
R 14

1

0 _0 4-K
6

LVDS, INVERTER B - 17

B.Schematic Diagrams

050 7

EDID Mo de

Schematic Diagrams

HDMI, CRT
HDMI

3 . 3V S
5V S

S
4
3

T X1 P_ DP B 2N _H
T X1 M_ D PB 2P _H

1
2

4
3

T X0 P_ DP B 1N _H
T X0 M_ D PB 1P _H

RN1
4 P2 R X0_ 04+ K

1
2

4
3

T XC P _D P B0 N _H
T XC M_D P B 0P _H

M740J/M760J ? ? ?

H D MI _D D C _C L K

3. 3 VS _V G A
9 TX 2P _D P B3 N _N B

2N 7 002 W
Z 17 16

? ? ?
R 14 6

R 145

R 14 3

R 142

D

1
2

RN2
4 P2 R X0_ 04+ K

G

R 14 0

R 13 9 R 13 7

FOR M740J/M760J ? 750R

R 13 5
7 50_ 1%_ 04

13 TX C P_ D PB 0N _ VG A
13 TX C M_D P B0 P_ VG A

RN5
4 P2 R X0_ 04+ K

75 0_1 %_0 4

13 TX 0M_D P B 1P _V G A

7 50_ 1%_ 04

13 TX 0P _D P B1 N _V G A

75 0_1 %_0 4

*0 _04 02_ 5mi l _sh ort
3. 3 VS _V G A

Q2 4

75 0_1 %_0 4

R 128

T X2 P_ DP B 3N _H
T X2 M_ D PB 3P _H

750 _1 %_0 4

13 TX 1P _D P B2 N _V G A
13 TX 1M_D P B 2P _V G A

A

R S7 40( 3 160 150 20 0G ); RX 78 0( 31 500 682 00 G) ; R S 780 ( 315 006 82 00G )

4
3

750 _1 %_0 4

C
AC
D1 1
* BA V 99

3. 3 VS
R 131
2. 2K _0 4- K
R S7 40 (3 230 03 930 0G ) ; R X78 0( 32 300 472 00 G ); R S 780 ( 323 00 472 00G )
G
6. 8K _0 4
Q 23
S
D 2N 70 02 W- K
Z 171 7

1
2

75 0_1 %_0 4

5 VS
R 136

1 0 NB _H D MI _D D C _ CL K

RN7
4 P2 R X0_ 04+ K

13 TX 2P _D P B3 N _V G A
13 TX 2M_D P B 3P _V G A

3. 3 VS

FOR M740JU/M760JU ? 499R

TX 2P _D P B3 N _N B
TX 2M_D P B 3P _N B

C 268
C 267

. 1U _ X7R _ 16V _0 4- K
. 1U _ X7R _ 16V _0 4- K

TX 1P _D P B2 N _N B
TX 1M_D P B 2P _N B

C 266
C 265

. 1U _ X7R _ 16V _0 4- K
. 1U _ X7R _ 16V _0 4- K

TX 0P _D P B1 N _N B
TX 0M_D P B 1P _N B

C 264
C 263

. 1U _ X7R _ 16V _0 4- K
. 1U _ X7R _ 16V _0 4- K

T X0P _D P B 1N _H
T X0M_ D PB 1P _H

TX C P_ D PB 0N _ NB
TX C M_D P B0 P_ NB

C 262
C 260

. 1U _ X7R _ 16V _0 4- K
. 1U _ X7R _ 16V _0 4- K

T XC P _D P B0 N _H
T XC M_D P B 0P _H

T X2P _D P B 3N _H
T X2M_ D PB 3P _H

9 TX 2M_ DP B 3P _N B
R 618
*2. 2K _0 4+K

G

9 TX 1P _D P B2 N _N B
9 TX 1M_ DP B 2P _N B

Q 77
S
D *2N 7 002 W+ K
R S7 40 (3 230 03 930 0G ) ; R X78 0( 32 300 472 00 G ); R S 780 ( 323 00 472 00G )

1 3 MXM_H D MI _D D C _C L K

R 13 2

5V S
9 TX 0P _D P B1 N _N B
9 TX 0M_ DP B 1P _N B

0_ 04 +K

3. 3 VS

9 TX C P_ D PB 0N _ N B
9 TX C M_D P B0 P_ N B

C
AC
D1 2
*B A V9 9

5 VS

A

T X1P _D P B 2N _H
T X1M_ D PB 2P _H

M740JU/M760JU ? ? ?

3. 3 VS
R S7 40( 3 160 150 20 0G ); RX 78 0( 31 500 682 00 G) ; R S 780 ( 315 006 82 00G )

R 126
R 133

6. 8 00
K_ G
04); R S 780 ( 323 00 472 00G )
G 0G ) ; R X78 0( 32 300 472
R S7
2. 40
2K (_0
3 230
4- K03 930
Q 18
S
D 2N 70 02 W- K
Z1 718

R 127
1 0 NB _H D MI _D D C _ DA T A

H D MI _D D C _D A TA

* 0_0 402 _5m li _s hort

HDMI CONNECTOR

5V S
3. 3 VS _V G A

R 6 19
G
Q 78
*2 . 2K _04 +K
S
D *2N 7 002 W+ K
R S7 40( 32 30 039 300 G ) ;R X 780 ( 323 004 72 00G ); R S7 80 (3 23 004 720 0G )

13 MXM_ H DMI _ D DC _ D AT A

Sheet 17 of 47
HDMI, CRT

L 29

H C B2 01 2K F-12 1T 30

J_H D MI 1

Z1 71 9

C 258

C 25 7

*22 U_ 6. 3V _0 8

22 U _6. 3V _0 8
19

R 13 4

0_ 04 +K

+ 5V
DD C/ C E CGND
16
14

T XC M_D P B0 P_ H
T XC P _D P B0 N_ H

3

10

S DA
R E S ER V ED
C EC
T MD S C LO C K -

1

6

T X1P _D P B 2N _H

3
L32

4

4

S H I EL D 0

S H I EL D 1
T MD S D A TA 1+
S H I EL D 2

3. 3V S

TMD S D AT A2 +
R 1 14
1 0K _0 4+K

L31
*WC M20 12 F2 S- 16 1T 03_ P
3
4

T X0M_ D PB 1P _H

7

2

1

T X0P _D P B 1N _H

3

3

4

T X2M_ D PB 3P _H

1

2

1

T X2P _D P B 3N _H

5

L 33
*WC M20 12 F2 S- 16 1T 03_ P

C
D1 0
A

B Z 17 11 R 125
C

200 K_ 04

H DMI _ HP D

E

13 H P D

Q 17
2N 3 904

R B 751 V- 40 +K
10 TMD S _H P D 0

Z 172 0

9

TMD S D A TA 2-

2

*WC M20 12 F2 S- 16 1T 03_ P

13

TMD S D AT A0 +
T MD S D A TA 1-

3 . 3V S_ VG A

H D MI _D D C _C LK

11

TMD S D A TA 0-

2

15

C LK SH I E LD
T MD S C LO C K +

8
T X1M_ D PB 2P _H

17

S CL

12

4

H D MI _H PD

H O T PL UG D E TE C T

18
H DMI _ DD C _ D AT A
L30
*WC M20 12 F2 S- 16 1T 03_ P
2
1

R 1 24

Z 17 10
R 12 1

SK - C 128 41

P I N GN D 1 ~ 4= GN D

20 0K _04

0 _04
R1 23
1K _0 4

CRT
A

C

D3
B A V9 9
L61
L60

F BL U E

L58

AC

D4
BA V 99

J_ CR T 1
C 1 050 9- 91 505 - L

AC

F R ED
F G RN

AC

D3 9
B A V9 9

A

C

A

C

3. 3 VS

.
.
.

F C M1 60 8K -1 21 T06

Z1 708

1

F C M1 60 8K -1 21 T06

Z1 709

2

F C M1 60 8K -1 21 T06

Z1 712

3

9

24
10 mil
11

4
C 20
R 3 53

R 35 2

R 3 51

C2 1

C 19

C 18

C 15

140 _1 %_04

15 0_1 %_0 4

1 50_ 1%_ 04

2 2P _50 V_ 04

12

C1 6

D D C D AT A

5
22P _5 0V _0 4 2 2P _50 V_ 04

2 2P _50 V_ 04

22 P_ 50V _0 4 2 2P _50 V_ 04

13

H SY N C

6
14

V SY N C

7
15

PLE ASE CLO SE TO CONN ECT OR
D3 7
R 5 97

R6

1K _0 4

R4

1K _0 4

Z 170 7

C1 7

GN D 1
GN D 2

EMI
22P-->47P

5V S

R 35 7

D D C LK

8

3. 3V S_ VG A

C

10 00P _ 50V _0 4
A

C 14

C 13

1 00 0P _50 V_ 04

C 12

100 0P _5 0V _04

100 0P _50 V _04

5V S

R B 75 1V
6 .8 K_ 04 +K

D D C LK

F C M16 08K -121 T0 6

5V S

0_ 04 -K

H SY N C

F C M16 08K -121 T0 6
D2
B AV 99

D 38
*B AV 99

AC

V SY N C

D1
B A V9 9

D5
*BA V 99

C

L5 6

D D CD A TA

F C M16 08K -121 T0 6

A

R 35 4
3. 3V S_ VG A

Z 170 6

F C M16 08K -121 T0 6

AC

S

10 N B _C R T_ D D C _D AT A

G

G

L5 7

A

6. 8K _0 4- K

D
Q3 9
2N 70 02W

Z 170 5

C

G

V _S Y N C S
Q 75
*2 N7 00 2W
D

D
Q 40
2 N 700 2W

A

S

H _ SY N C

C

L5 5

C R T_D D C _C L K

AC

3. 3V S

R 59 8

AC

L5 9

C R T_D D C _D A TA

13 MX M_ C R T_D D C _ DA T A

A

S

Q 41
2N 7 002 W+ K
D

C

G

4 . 7K _04 +K

.
.
.
.

5V S
5 VS
R 36 8

5V S

5V S

FOR INTERNAL CRT(M74J/M76J? ? ? )
10 N B_ V GA _R
10 N B_ V GA _G
10 N B_ V GA _B

10 H SY N C #
10 V SY N C #

5 VS

R N 45
3
4

4 P2 R X0_ 04 -K
2
1

R 38 1

0 _0 4_- K

3
4
R N 46

2
1

F RED
F GRN
F B LU E

H _S YN C
V_ SY N C

4 P2 R X0_ 04 -K

R 5 99

G

4 . 7K _04 +K

S

Q 42
2N 7 002 W+ K
D

6 .8 K_ 04 +K

FOR M82 EXTERNAL CRT(M74JU/M76JU? ? ? )
R N 65

1 3 MXM_C R T _D D C _C LK
13 D AC 1 _R B
13 D AC 1 _G B
3. 3V S

3
4
R 61 1

4 P2 R X0_ 04 +K
2
1
0 _0 4_+ K

F RED
F GRN
F B LU E

13 D AC 1 _B B
R 60 0
G

B.Schematic Diagrams

3. 3V S _V G A

6 . 8K _04 -K
S

Q 76
*2 N7 00 2W
D

1 0 N B_ C R T_D D C _C L K

R 362

B - 18 HDMI, CRT

0_ 04- K

13 D AC 1 _H S Y
13 D AC 1 _V SY

3
4
R N 66

2
1
4 P2 R X0_ 04 +K

H _S YN C
V_ SY N C

Schematic Diagrams

SB700-1
U31
A

V2
3
V2
2
V2
4
V2
5
U2
5
U2
4
T2
3
T2
2
U2
2
U2
1
U1
9
V1
9
R2
0
R2
1
R1
8
R1
7

PCIE_NB_SB_TX
0P
PCIE_NB_SB_TX
0N
PCIE_NB_SB_TX
1P
PCIE_NB_SB_TX
1N
PCIE_NB_SB_TX
2P
PCIE_NB_SB_TX
2N
PCIE_NB_SB_TX
3P
PCIE_NB_SB_TX
3N

AMD CHECK

R263
R265

PCIE_VDDR

562_1%_04
2.05K_1%_06

Z180
2
Z180
3

T2
5
T2
4

Z180
4

P2
4

1.2VS
L49

BK1608HS6
01

SB700

A_RST#

Par t 1 o f 5

PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
PCIE_RX0P
PCIE_RX0N
PCIE_RX1P
PCIE_RX1N
PCIE_RX2P
PCIE_RX2N
PCIE_RX3P
PCIE_RX3N
PCIE_CALRP
PCIE_CALRN
PCIE_PVDD

R273
PLACE THESE COMPONENTS CLOSE TOU600, AND
USE GROUND GUARD FOR32K_X1 AND32K_X2
32K_X1

*0_04

K2
3
K2
2

Z1807
Z1808

M2
4
M2
5

Z1809
Z1810

P1
7
M1
8

Z1811
Z1812

M2
3
M2
2

Z1813
Z1814

J1
9
J1
8

Z1815
Z1816

L2
0
L1
9

Z1817
Z1818

M1
9
M2
0

Z1819
Z1820

N2
2
P2
2

Z1821

L1
8

25M
_X1

J2
1

Z1822

PCIE_RCLKP/NB_LNK_CLKP
PCIE_RCLKN/NB_LNK_CL
KN

PCI INTERFACE

Z1805
Z1806

NB_DISP_CL
KP
NB_DISP_CL
KN
NB_HT_CLKP
NB_HT_CLKN
CPU_HT_CLKP
CPU_HT_CLKN
SLT_G
FX_CLKP
SLT_G
FX_CLKN
GPP_CLK0P
GPP_CLK0N
GPP_CLK1P
GPP_CLK1N

CLOCK GENERATOR

2 SBSRC_CLKP
2 SBSRC_CLKN

N2
5
N2
4

GPP_CLK2P
GPP_CLK2N
GPP_CLK3P
GPP_CLK3N
25M
_48M_6
6M_OSC

25M
_X1

J2
0
25M
_X2

32K_X2
32K_X1
32K_X2

R530
*20M
_06
R529

A3
X1

20M_0
6
1.8VS
B3

C848
18P_NPO_04

X2

C847
18P_NPO_04

LPC

32.768KHz
1
2

RTC XTAL

X6
4
3

CPU_PROCHOT# PU 3.3v BECAUSE FORF ANCONTROL .
OT
HERWI SE, PUTO VDDIO.

ALLOW_LDTST
P
PRO
CHO
T#
LDT_PG
LDT_STP#
LDT_RST#
SB7
00

RTC

F2
3
F2
4
F2
2
G2
5
G2
4

CPU

R295
*1K_04
10 ALLOW_LDT
STO
P
5 CPU_PROCHOT#
5 CPU_PWRGD
5,10 CPU_LDT_STO
P#
5 CPU_LDT
_RST#

R261

*2
2_04

LPC_CL
K1
3.3V

R249

*10K_04
3.3VS

PCIRST#

N1

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
CBE0#
CBE1#
CBE2#
CBE3#
FRAME#
DEVSEL#
IRDY#
TRDY#
PAR
STOP#
PERR#
SERR#
REQ
0#
REQ
1#
REQ
2#
REQ3#/G
PIO
70
REQ4#/G
PIO
71
GNT0#
GNT1#
GNT2#
G
NT3#/G
PIO
72
G
NT4#/G
PIO
73
CLKRUN#
LO
CK#
INTE#/G
PIO
33
PIO
34
INTF#/G
INTG#/G
PIO
35
INTH#/G
PIO
36

LPCCLK0
LPCCLK1
LAD0
LAD1
LAD2
LAD3
LFRAME#
L
DRQ
0#
LDRQ1#
/G
NT5#/G
PIO
68
BMREQ#/REQ5#/G
PIO
65
SERIRQ

RTCCLK
INTRUDER_AL
ERT#
VBAT

R303

*0_04

R282

0_04

5
Z1826 2
4

U2
P7
V4
T1
V3
U1
V1
V2
T2
W1
T9
R6
R7
R5
U8
U5
Y7
W8
V9
Y8
AA8
Y4
Y3
Y2
AA2
AB4
AA1
AB3
AB2
AC1
AC2
AD1
W2
U7
AA7
Y1
AA6
W5
AA5
Y5
U6
W6
W4
V7
AC3
AD4
AB7
AE6
AB6
AD2
AE4
AD5
AC6
AE5
AD6
V5

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI_CBE#0
PCI_CBE#1
PCI_CBE#2
PCI_CBE#3
PCI_FRAME#
PCI_DEVSEL#
PCI_IRDY#
PCI_TRDY#
PCI_PAR
PCI_STOP#
PCI_PERR#
PCI_SERR#
PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3
PCI_REQ#4
PCI_GNT#0
Z1827
Z1828
PCI_GNT#3 R24
0
PCI_GNT#4
PCI_CLKRUN#
Z1829

AD3
AC4
AE2
AE3

PCI_INTA#
PCI_INTB#
Z1830
Z1831

G
22
E22
H24
H23
J25
J24
H25
H22
AB8
AD7
V15

LPC_CL
K0
Z1832

C3
C2
B2

LDRQ#0
LDRQ#1
GPIO65

74AHC1G08G
W
*0_04
R175

12,20 PCIE_RST#

? ? ?

M XM on ly mo de

PE_GPIO2

0_04

PE_GPIO1 32

X

0

LPC_CLK1
LAD0 30
LAD1 30
LAD2 30
LAD3 30
LFRAME# 30

0

X

1

Po w er Expre s s m od e

1

0/1

X

I GP + M XM

0

X

0

LDRQ#0

R279

*8.2K_04

LDRQ#1

R234

Sheet 18 of 47
SB700-1

*8.2K_04
COM
8.2K
MON
_04

PE_GPIO1

R239

PE_GPIO0

R218

PX_EN

R487

*2.2K_
04

G
PIO6
5

R253

COM
100K
MON_04

R481

0_04

*8.2K_
04
*2.2K_
04

LPC_CL
K1 30
R483 *1
K_0
4

VDD3
R482
470_04
Z183
7

R248

RTC_CLK
INTRUDER_ALERT#
VBAT_IN

*0_04

R524
R523

C552
C549
1
U_10V_06
.1U_16V_04

SB_CR_
WAKE# 25
SERIRQ 30

*1M_0
4
51
0_04

A_VBAT

RTC CLEAR

D43
RB751V

C
D42
RB751V

JO
PEN1
*OPEN_10mil-1M
M

A Z1833

Z1834

J_RTC1
1
2
85205-02R

R3
14

DISPL AY OUT PUT
IGP( L VDS,VGA,HDMI ,TV)

PCI_REQ
#0
PCI_REQ
#1
PCI_REQ
#2
PCI_REQ
#3
PCI_REQ
#4

*8.2K_04
*8.2K_04
*8.2K_04
*8.2K_04
*8.2K_04
*8.2K_04

PE_GPIO0 12

22
_04

2

INT _VGA_T V_EN#

0

10
K_04
10
K_04
10
K_04
10
K_04

R246
R232
R213
R221
R220
R212

R231

3. 3
V

PX_EN

R2
57
R2
50
R2
74
R2
98

3.3VS

G
PIO6
5

PX_EN
R49
0
*0_0402_5
mil_short
R21
9
0_
04

R29
6

straps page

PCI_CLK2
PCI_CLK3
LPC_CLK0
LPC_CLK1

DISPLAY SUP PORT TABLE
I GP o n ly mo d e

BUF_PLT_RST# 22,25,27,30

1
3

10K_04
RTC_CLK

MXM ( L VDS, VGA,HDM I,T V)
*M XM (VGA,HDMI, TV,DP); MXM /IGP(L VDS)
IGP( L VDS,VGA,HDMI ,TV)

R3
13
*1
0K_0
4

SB700-1 B - 19

B.Schematic Diagrams

C60 8 AND C609 CL OSE
TO SB700

SBSRC_CLKP
SBSRC_CLKN

LPC_CL
K1_R
Z1823
PCI_CLK2
PCI_CLK3
Z1824
PCICLK5

A_RST#

PCIE_PVSS

C516
1
U_10V_06

P4
P3
P1
P2
T4
T3

U15
PCIRST#

P2
5
C80
7
10U_10V_08

PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5/G
PIO
41

A

A_RX0
P_C
A_RX0
N_C
A_RX1
P_C
A_RX1
N_C
A_RX2
P_C
A_RX2
N_C
A_RX3
P_C
A_RX3
N_C

C

.1U_X7R_
10V_
04
.1U_X7R_
10V_
04
.1U_X7R_
10V_
04
.1U_X7R_
10V_
04
.1U_X7R_
10V_
04
.1U_X7R_
10V_
04
.1U_X7R_
10V_
04
.1U_X7R_
10V_
04

1

9
9
9
9
9
9
9
9

C797
C790
C798
C796
C801
C799
C802
C800

PCIE_SB_NB_RX0P
PCIE_SB_NB_RX0N
PCIE_SB_NB_RX1P
PCIE_SB_NB_RX1N
PCIE_SB_NB_RX2P
PCIE_SB_NB_RX2N
PCIE_SB_NB_RX3P
PCIE_SB_NB_RX3N

N2

PCI CLKS

PL ACE THESE PCIE AC COUPLING
CAPS CLOSE TO SB70 0

9
9
9
9
9
9
9
9

Z180
1

33_04

PCI EXPRESS IN TERFACE

R293

10,16,20,23 A_RST#

Schematic Diagrams

SB700-2
Whe n Exte r nal Cl ock Gen , u se d as 4 8M Cl ock in pu t
Whe n In te rna l Cloc k Ge n, u s ed as 48M Cloc k
ou tp u t

U3 1 D
3 .3 V

R S M RS T # _ R

3 0 GA 2 0
3 0 K B C _R S T #
3 0 SCI#
3 0 S MI #
2 2 P C I E _ E X P C A R D _P W R E N #
3 2 S Y S _R S T #
2 2 ,2 7 PC IE_ W AK E#
3 0 SW I #
R 5 77
5 , 3 8 C P U _ T H E R M TR I P #
3 .3 V
R5 7 8
32 W D _ P W R G D

R S M R S T #_ R

P C I _P ME # / G E V E N T 4 #
RI# /E X T E V NT 0 #
S L P _ S 2 / GP M9 #
SL P_ S3 #
SL P_ S5 #
P W R _ B T N#
P W R _ GO OD
S U S _S T A T #
TEST 2
TEST 1
TEST 0
GA 2 0 I N / GE V E N T0 #
K B R S T # / GE V E N T 1 #
L P C _ P M E # / G E V E N T 3#
L P C _ S M I # / E X T E V N T 1#
S 3 _ S T A T E / GE V E N T5 #
S Y S _R E S E T# / G P M 7 #
W A K E #/ GE V E N T 8 #
B L I N K / GP M 6 #
S MB A L E R T # / T H R M T R I P # / G E V E N T 2 #
NB _ P W RG D

U S B C L K / 1 4 M _2 5 M _4 8 M _O S C
US B _ R CO M P

U SB_ FSD 1 3 P
U S B _ F S D 13 N
U SB_ FSD 1 2 P
U S B _ F S D 12 N
US B _ HS D 1 1 P
U S B _ H S D 11 N
US B _ HS D 1 0 P
U S B _ H S D 10 N
U S B _H S D 9 P
U SB _ H SD9 N

D 3
RS M R S T #

U S B _H S D 8 P
U SB _ H SD8 N

R5 7 9
R5 8 0
R6 0 4

2 ,2 2 P C IE _ E X P CA RD _ CL K R E Q #
2 2 P C IE_ EX PCA RD _ PW R EN#

U S B _H S D 7 P
U SB _ H SD7 N

S A T A _ I S 0 # / G P I O1 0
C L K _ R E Q3 # / S A TA _I S 1 #/ G P I O 6
S MA R T V O L T/ S A T A _ I S 2 # / GP I O4
C L K _ R E Q0 # / S A TA _I S 3 #/ G P I O 0
C L K _ R E Q1 # / S A TA _I S 4 #/ F A N O U T3 / G P I O 3 9
C L K _ R E Q2 # / S A TA _I S 5 #/ F A N I N 3 / G P I O4 0
S P K R / G P I O2
S CL 0 /G P O C0 #
S D A 0/ GP O C 1 #
S CL 1 /G P O C2 #
S D A 1/ GP O C 3 #
D D C 1 _ S C L / GP I O9
DD C1 _ S D A /G P IO 8
L LB #/ G P I O 6 6
S H U T D O W N # / GP I O5
D D R 3 _ R S T #/ GE V E N T 7 #

U S B _H S D 6 P
U SB _ H SD6 N

*0 _ 0 4
*0 _ 0 4
0 _0 4

C 902
* 6 8P _5 0 V _ 0 4

9
8
8
9
5
8
4

US B
US B
US B
US B
US B
US B
US B

_O
_O
_O
_O
_O
_O
_O

C
C
C
C
C
C
C

6# / I R _ T X 1/ G E V E N T 6 #
5# / I R _ T X 0/ G P M 5 #
4# / I R _ R X 0 / G P M4 #
3# / I R _ R X 1 / G P M3 #
2# / G P M 2 #
1# / G P M 1 #
0# / G P M 0 #

I MC _G P I O 8
I MC _G P I O 9
I MC _ P W M 0 / I MC _ GP I O1 0
S C L 2 / I MC _ GP I O1 1
S D A 2 / I MC _ GP I O1 2
S C L 3 _ LV / I MC _ GP I O1 3
S D A 3 _ LV / I MC _ GP I O1 4
I MC _ P W M 1 / I MC _ GP I O1 5
I MC _ P W M 2 / I MC _ GP O1 6
I MC _ P W M 3 / I MC _ GP O1 7

Z1907

33_04

C9 0 6

2 4, 28 A Z _ S D O U T
2 8 A Z _ SDIN 0
2 4 A Z _ SDIN 1

22 P _ 5 0 V _ 0 4
2 4 ,2 8 A Z _ SY N C
2 4 ,2 8 A Z _ R ST #
2 5 S B _ CR _ CP P E #

R 27 0

M1
M2
J7
J8
L8
A Z _ S DIN 2
M3
A Z _ S DIN 3
L6
M4
A Z _ RST #
* 0 _0 4
Z 1 97 5 L 5

A Z _ B I T C LK
A Z _ S D OU T
AZ _ S D IN0 /G P IO 4 2
AZ _ S D IN1 /G P IO 4 3
AZ _ S D IN2 /G P IO 4 4
AZ _ S D IN3 /G P IO 4 6
AZ _ S Y NC
AZ _ RS T #
A Z _ D O C K _ R S T # / G P M8 #

3 .3 VS

R 2 35
R 2 60

2 0 K_ 0 4
2 0 K_ 0 4

S B GP I O6
S B GP I O0

R 2 42
R 2 51

2 .2 K _ 0 4
2 .2 K _ 0 4

S CL K 0
S DA T A 0

R 5 31
R 2 75
R 2 64

1 K_ 0 4
2 .2 K _ 0 4
2 .2 K _ 0 4

P W R_ B T N #
S CL K 1
S DA T A 1

R 2 71
R 5 18
R 5 19

1 0 K_ 0 4
2 .2 K _ 0 4
* 2. 2K _0 4

R 5 17
R 5 20

* 2. 2K _0 4
2 .2 K _ 0 4

3 . 3V S

R 29 2
1 0 K_ 0 4
C OM MO N

3 .3 V

R2 6 6

B - 20 SB700-2

1 0 K_ 0 4

S U S _S T A T #
G P1 6
G P1 7

ST RAP p in t o d e fin e
us e L PC or SPI ROM

A Z _ RS T #

2 3 HD _ A UX _ R S T #

U S B _H S D 3 P
U SB _ H SD3 N

U S B _H S D 0 P
U SB _ H SD0 N

USB OC

B
B
A
A
E
F
E

INTEGRATED uC

R6 0 2

*1 0 K _ 0 4 Z 1 9 1 5
1 0K _0 4 Z 1 9 1 6
Z1917
*1 0 K _ 0 4 Z 1 9 1 8
*1 0 K _ 0 4 Z 1 9 7 4
*1 0 K _ 0 4 Z 1 9 2 0
Z1921

HD AUDI O

M/B USB PORT 0,1
2 4 , 2 8 A Z _ B I T C LK

R 52 1
R 29 4
R 30 7

R3 1 9
*0 _ 0 4 02 _ 5 m i _l s h o rt

2 4 U S B _ OC P 0 _ 1 #

U S B _H S D 4 P
U SB _ H SD4 N

U S B _H S D 1 P
U SB _ H SD1 N
R 52 2
R 31 6

R3 1 7
* 0_ 0 4 0 2 _5 m i l _ sh o rt

U S B _H S D 5 P
U SB _ H SD5 N

U S B _H S D 2 P
U SB _ H SD2 N

3 .3 V

NEW CARD 2 2 U S B _ OC P 8 _ 9 #

USB 2.0

SCLK0,SDATA0=>Clock
SCLK1,SDATA1=>PCI-E

S B G P I O1 0 A E 1 8
S B GP I O6 A D 1 8
S B GP I O4 A A 1 9
S B GP I O0 W 1 7
Z1910
V 17
2008/03/18
Z1911
W 20
Z1912
R 25 4
W 21
28 I C H _S P K R
AA 1 8
*0 _ 0 40 2 _ 5 m li _ s h or t
2 ,7 ,8 SC L K 0
W 18
2 ,7 ,8 SD AT A0
K 1
Gen,DDR 2,VGA
2 2 SC L K1
K 2
Mini Card(WLAN,LAN)
2 2 SD AT A1
S B G P I O9
AA 2 0
S B G P I O8
Y 18
S B G P I O6 6
3 .3 V
R3 0 4
1 0 K_ 0 4
C 1
R 24 3
1 0K _0 4
Y 19
S B G P I O5
R 27 6
* 0 _0 4 Z 1 9 1 4
G5
to CPU Thermal IC 5, 3 0 T H E R M _ A L E R T#
R 27 2
* 0 _0 4
2 5 S B _ CR _ CP P E #

GPIO

Sheet 19 of 47
SB700-2

R2 8 8
*0 _ 0 4 02 _ 5 m i _l s h o rt

Z1 92 3
Z1 92 4
35mil Z 1 9 2 5
Z1 92 6

H 19
H 20
H 21
F 25

Z1 92 7
Z1 92 8
Z1 92 9
Z1 93 0

D 22
E 24
E 25
D 23

I MC _ GP I O0
I MC _ GP I O1
S P I _ C S 2 #/ I MC _ GP I O 2
I D E _R S T # / F _ R S T #/ I MC _G P O 3
I MC _ GP I O4
I MC _ GP I O5
I MC _ GP I O6
I MC _ GP I O7

SB7 0 0

INTEG RATED uC

B.Schematic Diagrams

C 85 4
* 2. 2 U _ 6. 3V _0 6

30 P ME #

Z1 90 2
*0 _ 0 40 2 _ 5 m li _ s h or tZ 1 9 0 3
*0 _ 0 40 2 _ 5 m li _ s h or tZ 1 9 0 4
*0 _ 0 40 2 _ 5 m li _ s h or tZ 1 9 0 5

USB MISC

0_04

R3 0 6
R3 0 5
R2 8 1

USB 1.1

R 526

Z 1 9 01

ACPI / WAKE UP EVENTS

3 0 RS M R S T #

E 1
E 2
H 7
F 5
G1
H 2
H 1
K 3
S B _ TE S T 2 H 5
2008/03/18
S B _ TE S T 1 H 4
S B _ TE S T 0 H 3
R 2 6 7 *0 _ 0 40 2 _ 5 m li _ s h or tZ 1 9 7 1 Y 1 5
R 2 6 8 *0 _ 0 40 2 _ 5 m li _ s h or tZ 1 9 7 2 W 1 5
K 4
K 24
R 601
* 0 _0 4 Z 1 9 0 6
F 1
J2
H 6
R 528
* 0 _0 4 Z 1 9 7 3
F 2
C
P
U
_
T
H
E
R
M
T
R
I
P
#S
B
0_04
J6
* 10 K _ 0 4
W 14

R3 1 8
*0 _ 0 4
1 6 , 2 6, 30 L I D _ S W #
R5 7 6
0 _0 4
3 0 SW I#
2 2 , 30 , 3 1 , 3 2 , 3 6 S U S B #
3 0 S US C#
P W R _ B T N#
3 0 P W R_ B T N #
1 6 , 3 0 , 3 2 S B _ P W R GD
10 S U S _ S T A T #

R 52 7
* 22 K _ 0 4

Par t 4 of 5

SB700

I MC
I MC
I MC
I MC
I MC
I MC
I MC
I MC

_ GP I
_ GP I
_ GP I
_ GP I
_ GP I
_ GP I
_ GP I
_ GP I

O1 8
O1 9
O2 0
O2 1
O2 2
O2 3
O2 4
O2 5

I MC
I MC
I MC
I MC
I MC
I MC
I MC
I MC
I MC
I MC
I MC
I MC
I MC
I MC
I MC
I MC

_ GP I
_ GP I
_ GP I
_ GP I
_ GP I
_ GP I
_ GP I
_ GP I
_ GP I
_ GP I
_ GP I
_ GP I
_ GP I
_ GP I
_ GP I
_ GP I

O2 6
O2 7
O2 8
O2 9
O3 0
O3 1
O3 2
O3 3
O3 4
O3 5
O3 6
O3 7
O3 8
O3 9
O4 0
O4 1

C 8

Z 1 93 1

G 8

Z 1 93 2

E6
E7

Z 1 93 3
Z 1 93 4

F7
E8

R 2 83

* 0_ 0 4 0 2 _5 m i l _s h o rt

R2 9 9

C LK _4 8 M _ U S B

2

1 1 . 8 K _ 1 % _ 06

U SBP1 2 2 4
U S B N 1 2 24

H 1 1 Z 1 93 5
J 1 0 Z 1 93 6
E1 1
F1 1

Z 1 93 7
Z 1 93 8

A1 1
B1 1

US B P 9 2 4
US B N9 2 4

C 10
D 10

US B P 8 2 2
US B N8 2 2

G 11
H 12

US B P 7 2 6
US B N7 2 6

E1 2
E1 4

US B P 6 2 6
US B N6 2 6

C 12
D 12

US B P 5 2 2
US B N5 2 2

B1 2
A1 2

US B P 4 2 3
US B N4 2 3

G 1 2 Z 1 94 1
G 1 4 Z 1 94 2
H 14
H 15

US B P 2 2 4
US B N2 2 4

A1 3
B1 3

US B P 1 2 4
US B N1 2 4

B1 4
A1 4

USB13
USB12
USB11
USB10
USB9
USB8
USB7

N.C
Fi ng er Print er
N.C
N.C
CCD
New Car d
Bul et oo th (Fo r M7 40J/K)

USB6
USB5
USB4
USB3
USB2
USB1
USB0

Bul et oo th (Fo r M7 60J/K)
WL AN ( PCIE M in i Car d)
3 G( PCIE Mi ni Car d )
N.C
USB Por t 2 (Au di o/B)
USB Por t 1 (M /B)
USB Por t 0 (M /B)

3 .3 V

US B P 0 2 4
US B N0 2 4
Z 1 94 3
Z 1 94 4
Z 1 94 5

A1 8
B1 8
F2 1
D 21
F1 9
E2 0
E2 1
E 1 9 Z 1 94 6
D 1 9 GP 1 6
E 1 8 GP 1 7
G 20
G 21
D 25
D 24
C 25
C 24
B2 5
C 23

Z 1 94 7
Z 1 94 8
Z 1 94 9
Z 1 95 0
Z 1 95 1
Z 1 95 2
Z 1 95 3
Z 1 95 4

B2 4
B2 3
A2 3
C 22
A2 2
B2 2
B2 1
A2 1
D 20
C 20
A2 0
B2 0
B1 9
A1 9
D 18
C 18

Z 1 95 5
Z 1 95 6
Z 1 95 7
Z 1 95 8
Z 1 95 9
Z 1 96 0
Z 1 96 1
Z 1 96 2
Z 1 96 3
Z 1 96 4
Z 1 96 5
Z 1 96 6
Z 1 96 7
Z 1 96 8
Z 1 96 9
Z 1 97 0

2 . 2K _ 04
R5 1 5

2. 2 K _ 0 4

SCLK2,SDATA2=>PCI Express Card(NEW CARD)
SCLK3,SDATA3=>CPU

R5 1 6
S CL K2
S D A TA
S CL K3
S D A TA

22
2 22
5
3 5

*SCLK3,SDATA3=>CPU
CPU? PULL HIGH

Schematic Diagrams

SB700-3
SAT A PORT S DIST RIBUTI ON:
0 - 2.5" HDD
1 - eSATA CONN.
2,3,4 ,5 - NOT USED

PLACE SAT A AC COUPLING
CAPS CL OSE TO SB7 00

Z2001
Z2002

S A T A _ T X 1 +_ C
S A T A _ T X 1 -_C

C 7 79
C 7 78

2 3 S A T A _ R X 1 -_ C
2 3 S A T A _ RX 1 + _ C

R 256

PLACE SATA_ CAL
RES VERY CL OSE TO
BALL OF SB7 0 0

NOTE:

1 . 0 K _ 1 %_ 0 4

Z2005
Z2006

AD 1 3
AE1 3

Z2007
Z2008

AB1 4
AC 1 4

Z2009
Z2010

AE1 4
AD 1 4

Z2011
Z2012

AD 1 5
AE1 5

Z2013
Z2014

AB1 6
AC 1 6

Z2015
Z2016

AE1 6
AD 1 6

S A T A_ CA L

V1 2

SAT A_ X1

Y 12

SAT A_ X2

AA1 2
W11

23 S A T A _ L E D #

R6 50 IS 1 K 1% FOR 2 5 MHz
XT AL, 4.9 9K 1 % F OR 1 00 MHz
INT ERNAL CL OCK

0104

P L LV D D _ A T A

AA1 1

XT L V D D _ A T A

W12

S A TA _R X 1 N
S A TA _R X 1 P
S A TA _T X 2 P
S A TA _T X 2 N
S A TA _R X 2 N
S A TA _R X 2 P
S A TA _T X 3 P
S A TA _T X 3 N
S A TA _R X 3 N
S A TA _R X 3 P
S A TA _T X 4 P
S A TA _T X 4 N

S A TA _C A L
S A TA _X 1

S P I_ DI/G
S P I _ D O/ G
S P I_ CL K /G
S P I _ H OL D #/ G
S P I _ C S #/ G

15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

P IO
P IO
P IO
P IO
P IO

12
11
47
31
32

L A N _ R S T #/ G P I O 1 3
R O M_ R S T #/ G P I O 1 4

S A TA _X 2
F A N O U T0 / G P I O 3
F A N OU T 1/ G P I O 4 8
F A N OU T 2/ G P I O 4 9

S A TA _A C T # / G P I O6 7

P L L V D D _ S A TA

SAT A_ X1

F A N I N 0/ G P I O 5 0
F A N I N 1/ G P I O 5 1
F A N I N 2/ G P I O 5 2

R2 1 0
1 0 M_ 0 4

T E MP _ C OM M
T E M P I N 0/ G P I O 6 1
T E M P I N 1/ G P I O 6 2
T E M P I N 2/ G P I O 6 3
TE MP I N 3 / T A L E R T #/ G P I O 6 4
V IN
V IN
V IN
V IN
V IN
V IN
V IN
V IN

SAT A_ X2
1 .2 V S

P IO
P IO
P IO
P IO
P IO
P IO
P IO
P IO
P IO
P IO
P IO
P IO
P IO
P IO
P IO
P IO

AA2 4
AA2 5
Y 22
AB2 3
Y 23
AB2 4
AD 2 5
AC 2 5
AC 2 4
Y 25
Y 24

ID
ID
ID
ID
ID
ID
ID
ID
ID
ID
ID

AD 2 4
AD 2 3
AE2 2
AC 2 2
AD 2 1
AE2 0
AB2 0
AD 1 9
AE1 9
AC 2 0
AD 2 0
AE2 1
AB2 2
AD 2 2
AE2 3
AC 2 3

ID
ID
ID
ID
ID
ID
ID
ID
ID
ID
ID
ID
ID
ID
ID
ID

G6
D 2
D 1
F4
F3

SP
SP
SP
SP
SP

E_ PD
E_ PD
E_ PD
E_ PD
E_ PD
E_ PD
E_ PD
E_ PD
E_ PD
E_ PD
E_ PD
E_ PD
E_ PD
E_ PD
E_ PD
E_ PD

E _ P D I OR D Y 2 3
E _ IRQ 2 3
E _ P D A 0 23
E _ P D A 1 23
E _ P D A 2 23
E _ PDD A C K # 2 3
E _ P D D R E Q 23
E _ P D I OR # 2 3
E _ P D I OW # 2 3
E _ PDC S 1 # 2 3
E _ PDC S 3 # 2 3

D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D1 0
D1 1
D1 2
D1 3
D1 4
D1 5

NOTE:

3 .3 V

IF THERE IS NO IDE, TEST
POI NT S FO R DEBUG BUS
IS M ANDATO RY

R 315
2 0 K_ 0 4

ID E _ PDD [1 5 :0 ]

I D E _P D D [ 1 5: 0]

C 4 7 2 1 5 P _ N P O _0 4
P L LV D D _ A T A

0/ G
1/ G
2/ G
3/ G
4/ G
5/ G
6/ G
7/ G

PIO
PIO
PIO
PIO
PIO
PIO
PIO
PIO

53
54
55
56
57
58
59
60

I _D
I _D
I _C
I _H
I _C

A T A IN
A T A O UT
LK
O LD #
R 4 94
S#
* 0 _ 04 0 2 _ 5 m li _ s h or t
U 15
L A N _ RS T #
J1
S B 7 0 0_ R OM _ R S T#

23

M8
M5
M7

Z2017
Z2018
Z2019

P5
P8
R 8

Z2020
Z2021
Z2022

C 6
B6
A6
A5
B5

R2 9 7
Z2023
Z2024
Z2025
Z2026
T E M PIN 3

A4
B4
C 4
D 4
D 5
D 6
A7
B7

Z2031
Z2032
Z2033

2 0 K_ 0 4
D2 0
S P I _ C S #_ S E L

H C B 1 6 0 8 K F -1 2 1 T2 5 -0 6

AVD D

C7 7 3

C 7 74

CLOSE TO THE
BALL OF SB7 00

L A N _R S T #

A
C

P C I E _R S T # 1 2 , 1 8

A

R 49 5
*0 _ 0 4

NOTE:

R 184

AL L HWM CI RCUITS ARE ONL Y F ORSB6 00
AL L HWM VAL UES ARE T BD

* 1 K_ 0 4

D2 1

R B 75 1 V

NOT E: ROUT E T EM P_COM M
AS A 10 MIL T RACE

B D _ ID0
B D _ ID1
R5 3 5
R5 4 2
R6 2 4
V IN _ 5
V IN _ 6
V IN _ 7

* 0_ 0 4 0 2 _ 5m i l _ sh o rt
3 .3 V

* 0_ 0 4 0 2 _ 5m i l _ sh o rt
* 0_ 0 4 0 2 _ 5m i l _ sh o rt
* 0_ 0 4

S B _ B L O N 16
S B _ M UT E # 2 9
SB_ D PS_ L AN 2 7

3 .3 V

R5 4 1

R 538

*1 0 K _ 0 4

* 1 0 K _ 04

R5 4 0

R 539

1 0K _0 4

1 0 K_ 0 4

B D_ ID 1
B D_ ID 0

BD_I D1

F6

BD_ID0

M7 40J

L

L

M7 40K

H

H

G7
C5 3 3
C5 3 2
. 1U _ 1 6 V _ 04 2 . 2 U _ 6 . 3 V _ 0 6

S B 7 00
*1 U _ 10 V _ 0 6

3 .3 V S

AVSS

C7 7 2

R B 75 1 V

C

1 0 , 1 6, 1 8 , 2 3 A _ R S T #

3. 3V
L 46

Sheet 20 of 47
SB700-3

3 .3 VS

T E MP I N 3

R 1 76

S A TA _R X 5 N
S A TA _R X 5 P

2

2 5 MH z

I D E _ D 0/ G
I D E _ D 1/ G
I D E _ D 2/ G
I D E _ D 3/ G
I D E _ D 4/ G
I D E _ D 5/ G
I D E _ D 6/ G
I D E _ D 7/ G
I D E _ D 8/ G
I D E _ D 9/ G
D E _ D 1 0/ G
D E _ D 1 1/ G
D E _ D 1 2/ G
D E _ D 1 3/ G
D E _ D 1 4/ G
D E _ D 1 5/ G

S A TA _T X 5 P
S A TA _T X 5 N

HW MONITOR

X4

I
I
I
I
I
I

S A TA _R X 4 N
S A TA _R X 4 P

1

0417

S A TA _T X 1 P
S A TA _T X 1 N

X T L V DD _ S A T A

C 4 7 1 1 5 P _ N P O _0 4

IDE _ IO RD Y
I D E _I R Q
ID E _ A 0
ID E _ A 1
ID E _ A 2
IDE _ D A C K #
ID E _ DR Q
I D E _ I OR #
I D E _ I OW #
I DE _ C S 1 #
I DE _ C S 3 #

Part 2 of 5

S A TA _R X 0 N
S A TA _R X 0 P

HWM_AGND TRACE AT L EAST
10 MIL WIDE

1 U _ 1 0 V _ 0 6 2 . 2 U _6 . 3 V _ 0 6

XT L V D D _ A T A
3 .3 V
L48

3 .3 V _ SP I

CL OSE TO THE BALL
OF SB70 0

N C 2

N C _0 4
3 .3 V _ S P I

J_SPI? PIN? ? LV220 JSPIDBG

H C B 16 0 8 K F -1 2 1 T 2 5-0 6

S P I _ H OL D #_ R
S P I _ C LK
S P I _ D A T A OU T

C 4 96
1 U _1 0 V _ 0 6

J_SPI1
2
10

1
9

J _ SPI 1
2
4
6
8
10

1
3
5
7
9

R5 0 6
S P I _C S # _ S E L
S P I _D A T A I N
S P I _F LA S H

*S P U F Z -1 0 S 3 -V B -0 -B _ N

1K _0 4
S P I _ C S #_ S E L
S P I _ D A TA I N
S P I_ F L A SH

R5 0 5

8Mbit

1 0 K_ 0 4
U 32
1
C E#
2
SO
3
WP #
4
G ND

VD D
HO L D#
SC K
SI

C 83 2
R 51 1
*. 1U _ 1 6V _0 4 1 0 K _ 0 4
8
7
6
5

S P I _ H OL D #_ R
S P I _ C LK
S P I _ D A T A OU T

R 51 4

*0 _ 0 4 S P I _ H OL D #

* SST 2 5 VF 0 8 0 B

SST SPI ROM

SPI ROM =>base on AMD, change net name
SPI CONN.=>base on LV220

SB700-3 B - 21

B.Schematic Diagrams

2 3 S A T A _ T X 1 + _C
2 3 S A T A _ T X 1 -_ C

AE1 0
AD 1 0

AD 1 1
Z2003
AE1 1
Z2004
*0 _ 0 4 0 2_ 5 m i _l s h o rt
. 01 U _ 16 V _0 4 Z 2 02 9 R 2 2 4
SAT A_ T X1 + AB1 2
. 01 U _ 16 V _0 4 Z 2 03 0 R 2 2 5
SAT A_ T X1 - AC 1 2
*0 _ 0 4 0 2_ 5 m i _l s h o rt
C7 7 7
. 0 1 U _ 1 6 V _ 0 4 S A T A _ R X 1- A E 1 2
S A TA _R X 1 -_ C
C7 7 6
. 0 1 U _ 1 6 V _ 0 4 S A T A _ R X 1+ A D 1 2
S A TA _R X 1 +_ C

SB700

S A TA _T X 0 P
S A TA _T X 0 N

ATA 66/10 0/133

C7 8 0
C7 8 1

S A TA _R X 0 -_ C
S A TA _R X 0 +_ C

2 6 S A T A _ R X 0 -_ C
2 6 S A T A _ RX 0 + _ C

U 31B

*0 _ 0 40 2 _ 5 m li _ s h or t
SAT A_ T X0 + AD 9
SAT A_ T X0 - A E9
* 0 _0 4 0 2 _ 5m i l _ sh o rt
. 0 1 U _ 1 6 V _ 0 4 S A T A _ R X 0- A B 1 0
. 0 1 U _ 1 6 V _ 0 4 S A T A _ R X 0+ A C 1 0

. 01 U _ 16 V _0 4 Z 2 02 7 R 2 2 2
. 01 U _ 16 V _0 4 Z 2 02 8 R 2 2 3

SPI ROM

C 7 83
C 7 82

SERI AL ATA

S A T A _ T X 0 +_ C
S A T A _ T X 0 -_C

SATA PWR

2 6 S A T A _ T X 0 + _C
2 6 S A T A _ T X 0 -_ C

Schematic Diagrams

SB700-4
1 .2 VS

PL ACE AL L THE DECOUPL ING CAPS ON
THIS SHEET CL OSE TO SB AS
POSSI BL E.

.1 U _ 1 6 V _ 0 4

C 5 03

1 U_ 1 0 V _ 0 6

C4 9 3

C 500

C 4 92

C8 2 5

* 1 U _ 1 0 V _ 0 6*1 U _ 1 0 V _ 0 6 1 U _ 1 0V _ 06

C 479

1 U_ 1 0 V _ 0 6

C 470

C4 8 8
C 50 2
C5 1 7
2 2 U _6 . 3 V _0 8
.1 U_ 1 6 V _ 0 4
. 1 U _1 6 V _ 0 4
.1 U_ 1 6 V _ 0 4

Sheet 21 of 47
SB700-4

VD
VD
VD
VD

D 3 3 _ 1 8 _1
D 3 3 _ 1 8 _2
D 3 3 _ 1 8 _3
D 3 3 _ 1 8 _4

PC
PC
PC
PC
PC
PC
PC

IE_ VD
IE_ VD
IE_ VD
IE_ VD
IE_ VD
IE_ VD
IE_ VD

SB700

_1
_2
_3
_4
_5
_6
_7
_8
_9
_10
_11
_12

V
V
V
V
V
V
V
V
V

Pa rt 3 of 5

DD
DD
DD
DD
DD
DD
DD
DD
DD

_1
_2
_3
_4
_5
_6
_7
_8
_9

L15
M 12
M 14
N 13
P1 2
P1 4
R 11
R 15
T16

Z 2 10 2

R2 1 6
*0 _ 0 8 0 5_ 5 0 m i _l s h o rt

Y
AA
AA
AE

20
21
22
25

P
P
P
P
R
R
R

18
19
20
21
22
24
25

CK
CK
CK
CK

V DD
V DD
V DD
V DD

_ 1 .2 V _ 1
_ 1 .2 V _ 2
_ 1 .2 V _ 3
_ 1 .2 V _ 4

L21
L22
L24
L25

Z 2 10 1

U3 1 E

2. 5A
C5 1 9

C 48 4

SB700

C 509

C5 1 8

C5 1 0

C4 8 6

C5 0 6
.1 U_ 1 6 V_ 0 4

1 U _ 10 V _0 6

1 U _ 10 V _0 6

1U _ 1 0 V _ 0 6

1U _ 1 0 V _ 0 6

.1 U_ 1 6 V _ 0 4
2 2 U_ 6 .3 V _ 0 8

1 . 2 V _C K V D D

1.8 V=> FL ASH M EM ORY M ODE(DEFAUL T)
3.3 V=> IDE M ODE

3 .3 V S

DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ

CO RE S0

C 501

VD
VD
VD
VD
VD
VD
VD
VD
VD
VD
VD
VD

CLKG EN I/O

. 1 U _1 6 V _ 0 4

C5 0 4

L9
M9
T 15
U9
U 16
U 17
V8
W7
Y6
AA4
AB5
A B 21

L84
H C B 1 6 0 8 K F -1 2 1 T 2 5 _0 6

T10
U 10
U 11
U 12
V1 1
V1 4
W 9
Y 9
Y 11
Y 14
Y 17
AA 9
AB 9
A B1 1
A B1 3
A B1 5
A B1 7
AC 8
AD 8
AE 8

P OW E R

PC IE_ VD D R

AVS
AVS
AVS
AVS
AVS
AVS
AVS
AVS
AVS
AVS
AVS
AVS
AVS
AVS
AVS
AVS
AVS
AVS
AVS
AVS

S_ SATA_ 1
S_ SATA_ 2
S_ SATA_ 3
S_ SATA_ 4
S_ SATA_ 5
S_ SATA_ 6
S_ SATA_ 7
S_ SATA_ 8
S_ SATA_ 9
S_ SATA_ 1 0
S_ SATA_ 1 1
S_ SATA_ 1 2
S_ SATA_ 1 3
S_ SATA_ 1 4
S_ SATA_ 1 5
S_ SATA_ 1 6
S_ SATA_ 1 7
S_ SATA_ 1 8
S_ SATA_ 1 9
S_ SATA_ 2 0

AVS
AVS
AVS
AVS
AVS
AVS
AVS
AVS
AVS
AVS
AVS
AVS
AVS
AVS
AVS
AVS
AVS
AVS
AVS
AVS
AVS
AVS
AVS
AVS

S _ US
S _ US
S _ US
S _ US
S _ US
S _ US
S _ US
S _ US
S _ US
S _ US
S _ US
S _ US
S _ US
S _ US
S _ US
S _ US
S _ US
S _ US
S _ US
S _ US
S _ US
S _ US
S _ US
S _ US

C 803

2 2 U _ 6. 3V _ 08 1 U _ 1 0 V _ 0 6

C 8 05

1 U _1 0 V _ 0 6

C5 1 2

1U _ 1 0 V _ 0 6

C 804

C 5 14

1 U_ 1 0 V _ 0 6 .1 U_ 1 6 V _ 0 4

C5 1 1

.1 U_ 1 6 V _ 0 4

3 .3 V

3.3 V_S5 I/O

C8 0 6

_1
_2
_3
_4
_5
_6
_7

1 .2 VS

AA
AB
AA
AA
AC
AD
AE

A V D D_ S A T A

H C B 1 6 0 8K F -1 2 1 T 25 _ 0 6
C 7 59

C7 6 0

C 762

2 2 U _ 6 . 3 V _ 0 8 1U _ 1 0 V _ 0 6 1 U _ 10 V _ 0 6

C 7 64

.1 U_ 1 6 V _ 0 4

C7 6 7

.1 U_ 1 6 V _ 0 4

14
18
15
17
18
17
17

AVD
AVD
AVD
AVD
AVD
AVD
AVD

D_ S
D_ S
D_ S
D_ S
D_ S
D_ S
D_ S

AT A_ 1
AT A_ 4
AT A_ 2
AT A_ 3
AT A_ 5
AT A_ 6
AT A_ 7

S 5 _ 3 .3 V _ 1
S 5 _ 3 .3 V _ 2
S 5 _ 3 .3 V _ 3
S 5 _ 3 .3 V _ 4
S 5 _ 3 .3 V _ 5
S 5 _ 3 .3 V _ 6
S 5 _ 3 .3 V _ 7

A1 7
A2 4
B1 7
J4
J5
L1
L2

C 850

C 515

.1 U_ 1 6 V _ 0 4

C8 6 4

. 1 U _1 6 V _ 0 4

22 U _ 6 . 3 V _ 0 8

1 .2 V

SATA I/O

2A

L82

CORE S5

H C B 1 60 8 K F -1 2 1T 2 5 _ 0 6

DR
DR
DR
DR
DR
DR
DR

A-LI NK I/O

2A

L 83

S 5 _ 1 .2 V _ 1
S 5 _ 1 .2 V _ 2

G 2
G 4
C 813

US B _ P HY _ 1 .2 V _ 1
US B _ P HY _ 1 .2 V _ 2

A1 0
B1 0

C 81 2

C 52 7

.1 U_ 1 6 V _ 0 4
1 U_ 1 0 V _ 0 6

. 1 U _ 16 V _ 0 4

C8 0 9

1 U _ 10 V _0 6

1 .2 V _ U S B _ P HY _ R

A1 5
B1 5
C 14
D 8
D 9
D 11
D 13
D 14
D 15
E1 5
F12
F14
G 9
H 9
H 17
J9
J11
J12
J14
J15
K1 0
K1 2
K1 4
K1 5

B_ 1
B_ 2
B_ 3
B_ 4
B_ 5
B_ 6
B_ 7
B_ 8
B_ 9
B_ 1 0
B_ 1 1
B_ 1 2
B_ 1 3
B_ 1 4
B_ 1 5
B_ 1 6
B_ 1 7
B_ 1 8
B_ 1 9
B_ 2 0
B_ 2 1
B_ 2 2
B_ 2 3
B_ 2 4

3 .3 V

C 8 78

1 U_ 1 0 V _ 0 6

C 8 77

C 857

1 0 U_ 1 0 V_ 0 8

A VD D_ U S B

* 1 U _ 1 0 V _ 0 6. 1 U _1 6 V _ 0 4

C8 3 8

. 1 U _ 16 V _0 4

C8 3 7

C 876

.1 U_ 1 6 V _ 0 4

C8 5 6

C 862

*. 1U _ 1 6 V _ 0 4 . 1 U _ 1 6V _ 04

C 8 66

1 0U _ 1 0 V _ 0 8

A VDD C K_ 3 .3 V

A
B
C
D
D
E
F
F
F
G
G
G

3 .3 VS

16
16
16
16
17
17
15
17
18
15
17
18

AE 7
AVD
AVD
AVD
AVD
AVD
AVD
AVD
AVD
AVD
AVD
AVD
AVD

DT X _ 0
DT X _ 1
DT X _ 2
DT X _ 3
DT X _ 4
DT X _ 5
DR X _ 0
DR X _ 1
DR X _ 2
DR X _ 3
DR X _ 4
DR X _ 5

R2 0 6
1 K_ 0 4

V5 _ VR EF

V 5_ V R E F
A V D D C K _ 3. 3V

PLL

2A

L9 2
H C B 16 0 8 K F - 12 1 T 2 5 _ 0 6

J16

A V DD C K _ 3 .3 V

K1 7

A V DD C K _ 1 .2 V

3. 3V S

A V D D C K _ 1. 2V
A V DD C

C
E9

5V S

D2 2
A

3 .3 V_ A VDD C
F M 5 82 2
C 45 5
1 U_ 1 0 V_ 0 6

? ? ? ? M540SE? ? ? ?

SB7 0 0

C8 2 8
2 .2 U _ 6 .3 V _ 0 6
1 .2 V

1. 2V _ U S B _ P H Y _ R
R 5 43

2A

1 .2 V _ CK VDD

L51
H C B 1 6 0 8 K F - 12 1 T 2 5 _ 06 C 5 2 3

C 8 08
C5 2 1
C 814
C 8 11
.1 U_ 1 6 V _ 0 4
1 U _ 1 0V _ 06
. 1 U _1 6 V _ 0 4
* 1 U_ 1 0 V _ 0 6
1 0 U _ 10 V _0 8

A V D D C K _1 . 2 V

200mA

L50
H C B 1 00 5 K F -1 21 T 2 0 _ 0 4

C 823
2 . 2 U _6 . 3 V _0 6

B - 22 SB700-4

F 9

PC
PC
PC
PC
PC
PC
PC
PC

IE_ C
IE_ C
IE_ C
IE_ C
IE_ C
IE_ C
IE_ C
IE_ C

AVS SC
S B 70 0

200mA

L87
H C B 1 0 0 5K F -1 2 1 T2 0 _ 0 4

1 .2 VS

H 18
J17
J22
K2 5
M 16
M 17
M 21
P1 6

* 0 _0 6 0 3 _ 3 2 m li _ s h or t

C 839
C 85 8
C8 7 3
. 1 U _ 1 6 V _ 0 4. 1U _ 1 6 V _ 0 4 2 2 U _ 6 . 3 V _ 0 8

3. 3V _A V D D C

3 .3 V

200mA

L91
H C B 1 0 05 K F -1 2 1 T2 0 _ 0 4
C8 4 6
C 853
. 1 U _ 1 6 V _ 0 42 . 2 U _ 6 . 3 V _ 0 6

K_ VSS_ 1
K_ VSS_ 2
K_ VSS_ 3
K_ VSS_ 4
K_ VSS_ 5
K_ VSS_ 6
K_ VSS_ 7
K_ VSS_ 8

GR OUN D

1. 2V S

USB I/O

B.Schematic Diagrams

.1 U_ 1 6 V _ 0 4

C4 9 9

1 U_ 1 0 V _ 0 6

IDE/FLSH I/O

2 2 U _ 6. 3 V _0 8

C 495

SB700 (A11) 1.2V
SB700 (A12) 1.2VS

U 31 C

PCI/G PIO I/O

3 .3 V S

VS S_ 1
VS S_ 2
VS S_ 3
VS S_ 4
VS S_ 5
VS S_ 6
VS S_ 7
VS S_ 8
VS S_ 9
V SS_ 1 0
V SS_ 1 1
V SS_ 1 2
V SS_ 1 3
V SS_ 1 4
V SS_ 1 5
V SS_ 1 6
V SS_ 1 7
V SS_ 1 8
V SS_ 1 9
V SS_ 2 0
V SS_ 2 1
V SS_ 2 2
V SS_ 2 3
V SS_ 2 4
V SS_ 2 5
V SS_ 2 6
V SS_ 2 7
V SS_ 2 8
V SS_ 2 9
V SS_ 3 0
V SS_ 3 1
V SS_ 3 2
V SS_ 3 3
V SS_ 3 4
V SS_ 3 5
V SS_ 3 6
V SS_ 3 7
V SS_ 3 8
V SS_ 3 9
V SS_ 4 0
V SS_ 4 1
V SS_ 4 2
V SS_ 4 3
V SS_ 4 4
V SS_ 4 5
V SS_ 4 6
V SS_ 4 7
V SS_ 4 8
V SS_ 4 9
V SS_ 5 0

P CIE _ CK _ V S S _ 9
P CI E _ CK _ V S S _ 1 0
P CI E _ CK _ V S S _ 1 1
P CI E _ CK _ V S S _ 1 2
P CI E _ CK _ V S S _ 1 3
P CI E _ CK _ V S S _ 1 4
P CI E _ CK _ V S S _ 1 5
P CI E _ CK _ V S S _ 1 6
P CI E _ CK _ V S S _ 1 7
P CI E _ CK _ V S S _ 1 8
P CI E _ CK _ V S S _ 1 9
P CI E _ CK _ V S S _ 2 0
P CI E _ CK _ V S S _ 2 1

Part 5 of 5

A V S S CK

A2
A2 5
B1
D 7
F2 0
G 19
H 8
K9
K1 1
K1 6
L4
L7
L10
L11
L12
L14
L16
M6
M 10
M 11
M 13
M 15
N 4
N 12
N 14
P6
P9
P1 0
P1 1
P1 3
P1 5
R 1
R 2
R 4
R 9
R 10
R 12
R 14
T1 1
T1 2
T1 4
U 4
U 14
V6
Y 21
AB 1
A B 19
A B 25
AE 1
A E 24

P2 3
R 16
R 19
T1 7
U 18
U 20
V1 8
V2 0
V2 1
W 19
W 22
W 24
W 25
L17

Schematic Diagrams

New Card, Mini PCIE
NEW CARD(Port 8)

3 .3 V S
*. 1 U _ 1 6 V _ 0 4

5

C4 8 1
B U F _ P L T _R S T #

1
4
2

3 .3 V
U 12
. 1 U _1 6 V _ 0 4

21

9
A U X IN

PER ST#

3 .3 V S
A U X OU T
C 4 14
C 4 23

. 1 U _1 6 V _ 0 4
* . 1 U _ 1 6V _0 4

6
5

3 .3 V IN
3 .3 V IN

3 . 3 V OU T
3 . 3 V OU T

1 .5 V S
C 4 15
C 4 13

. 1 U _1 6 V _ 0 4
* . 1 U _ 1 6V _0 4

18
19

B U F _ P L T_ R S T #

2
23
4

1 9, 3 0 , 3 1 , 3 2, 3 6 S U S B #

3. 3 V

R 1 98

* 1 0K _ 0 4

R 2 00

1 0 K_ 0 4

1
10
12
13
24

1 .5 V IN
1 .5 V IN

1 . 5 V OU T
1 . 5 V OU T

S Y S R S T#
O C#

CP P E #
C P US B #

8
7

G ND
G ND

C 48 0

N C_ 3 .3 V S

40 mil

C 49 0

. 1 U _1 6 V _ 0 4

C 48 7

. 1 U _1 6 V _ 0 4

C 46 8

. 1 U _1 6 V _ 0 4

13
P E RS T #
12

40 mil

C 47 3

22
3

N C_ RC L K E N R1 9 9
N C_ S H DN # R2 0 1

*1 0 0 K _ 04

3 . 3V S
3 . 3V

*1 0 K _ 0 4
*1 0 K _ 0 4

R 241

Add GND pin

17
4
11
16

1 0 K _0 4
19
18

2 P CIE _ E X P C A RD _ CL K P
2 P CIE _ E X P C A RD _ CL K N
R 2 62
R 2 59

9 P C I E _N B _ E X P C A R D _R X P
9 P C I E _N B _ E X P C A R D _R X N
9 P C I E _ N B _E XP C A R D _ T X P
9 P C I E _ N B _E XP C A R D _ T X N

11
25

9
10

N C_ CP P E #
N C_ CP US B #
P C IE _ W A K E #

1 9, 2 7 P C I E _ W A K E #
2 , 19 P C I E _ E X P C A R D _ C L K R E Q#

*1 0 0 K _ 04

14
15

. 1 U _1 6 V _ 0 4

15
14
R1 9 4

RC L KEN
S H DN #

20 mil

N C_ 1 .5 V S

16
17

R1 9 3

C
C
C
C
C

J_ N E W 1
N C_ P E R S T #
. 1 U _1 6 V _ 0 4

N C_ 3 .3 V

6-01-74108-Q61

ST BY #

N
N
N
N
N

U 13
7 4 A H C 1 G0 8 GW

20

* 0_ 0 4 0 2_ 5 m i _l s h or t
* 0_ 0 4 0 2_ 5 m i _l s h or t

Z2 201
Z2 202

22
21
25
24

P 22 3 1 T H L F C 1

WLAN

* 0 _0 4 0 2_ 5 m i _l s h o rt
* 0 _0 4 0 2_ 5 m i _l s h o rt

POWER

2

R 20 9
R 20 8

1 9 SD AT A2
1 9 SC L K2

N C _C P P E #
N C _C P U S B #

L 45

3
2

4
3
*W C M 2 01 2 F 2 S -1 6 1 T0 3 _ P

19 U S B N 8

R 2 44
R 2 45

1 9 P C I E _E XP C A R D _ P W R E N #

1

19 U S B P 8

ENE P2231 pin3,4,14,15,22
has internally pulled high
( 170K ohmS )

8
7
Z 2 2 03
Z 2 2 04

*0 _ 0 4 02 _ 5 m li _ s h ort
*0 _ 0 4 02 _ 5 m li _ s h ort

+ 3 .3 VA U X
+ 3 .3 V
+ 3 .3 V

+ 1 .5 V
+ 1 .5 V
C PPE#
C PU SB#
W AKE#
C L K R E Q#
R EFC L K+
R EFC L KR ESER VED
P E Rp 0 R E S E R V E D
P E Rn 0
P E T p0
G ND
P E T n0
G ND
G ND
G ND
U SB_ D +
G ND
U SB_ D G ND
G ND
G ND
S MB _ D A T A
S MB _ C LK

1
3
5

PC IE_ W AK E #

Q9

20MIL

S

D

7
11
13
9
15

2 W L A N _ C LK R E Q #
2 P C I E _W LA N _ C L K N
2 P C I E _W LA N _ C L K P

W L A N _3 . 3 V

20MIL

3 .3 V

W AKE#
C OE X1
C OE X2
C
R
R
G
G

1
2
3
4

Sheet 22 of 47
New Card, Mini
PCIE

Layout? ? ? ?
"WLAN(Wimax, 802.11N)"
20 mil
20 mil

J_ M I N I 1

*0 _ 0 8 05 _ 5 0 m li _ s ho rt

N E W _ R E S E R V E D1
N E W _ R E S E R V E D2

1
20
23
26
G ND
G ND
G ND
G ND

13 0 8 0 1- 1

MINI CARD (WLAN,Port 5)
R4 4

5
6

L K R E Q#
EFC L KEFC L K+
ND 0
ND 1

3 . 3 V A U X _0
1. 5V _0
U I M_ P W R
U I M _D A T A
UIM _ CL K
U I M _R E S E T
UIM _ V P P

2
6
8
10
12
14
16

UIM
UIM
UIM
UIM
UIM

W L A N _3 . 3 V
W L A N _1 . 5 V S

_ PW R_ 1
_ DA T A _ 1
_ CL K _ 1
_ RS T _ 1
_ VPP_ 1

4
GN D 5

G
* A O 34 0 9
C 85

* 10 0 0 P _ 50 V _ 0 4

C 102

1 0 0 K _ 04

. 1U _ 16 V _ 0 4

KE Y
21
27
29

Z 2 2 05
R 30

* 1 0U _ 1 0V _ 0 8

* 2 0K _0 4
R 31

Z 2 2 06

* 10 0 K _ 0 4
D

2008/03/24

Q 10

From SB GPIO Pin default HI
Power Plane:Suspend
S3:Defined

C6 5 9
C6 6 3

35
23
25
31
33

. 1 U _ X 7R _ 1 0V _0 4 Z 22 0 7
. 1 U _ X 7R _ 1 0V _0 4 Z 22 0 8

G

17
19
37
39
41
43
45
47
49
51

* 2 N 7 0 0 2W
S

3 0 W L A N _P W R

3 0 W L A N _ DE T #
9 P C I E _ N B _ MI N I C A R D _R X N
9 P C I E _ N B _ MI N I C A R D _R X P
9 P C I E _N B _ MI N I C A R D _ TX N
9 P C I E _ N B _ MI N I C A R D _ T X P

L75
W L A N _3 . 3 V

.

C 77

R 37

3G -P O W E R

*H C B 1 6 0 8 K F -1 2 1T 2 5

G ND 2
G ND 3
G ND 4
G
P
P
P
P

GN D 6
GN D 7
GN D 8
GN D 9
GN D 10

ND 1 1
E Tn 0
E Tp 0
E Rn 0
E Rp 0

R e se rv ed 0
R e se rv ed 1
G ND 1 2
3 . 3 V A U X _3
3 . 3 V A U X _4
G ND 1 3
R e se rv ed 2
R e se rv ed 3
R e se rv ed 4
R e se rv ed 5

W _ D IS A B L E #
P E R S E T#
S M B _ CL K
S M B _D A T A
US B _ DU SB_ D+
3 . 3 V A U X _1
1. 5V _1
1. 5V _2
3 . 3 V A U X _2
L E D_ W W A N#
L E D _ W L AN#
L E D_ W P A N#

18
26
34
40
50
20
22
30
32
36
38
24
28
48
52
42
44
46

B U F _P LT _ R S T #
MI N I _ S C LK 1
MI N I _ S D A TA 1

W L AN_ EN
R5 1
R5 3

W L A N _ 3. 3 V
Z 2 2 09 R 4 3
*0 _ 06 0 3 _ 32 m i l _s h o rt
W L A N_ 1 .5 V S
W LA N _ 3 . 3 V

*0 _ 0 4
*0 _ 0 4

2

L1 2

2 6 , 30

S CL K 1 1 9
S DA T A 1 1 9

1

3
4
*W C M2 0 1 2 F 2 S -1 61 T 0 3 _P

US B N5 1 9
USB P5 1 9

2008/03/18

88 9 0 8 -52 0 4
W L A N_ 1 .5 V S

R7 4
*0 _ 0 8 05 _ 5 0 mi l _ sh o rt
1 .5 V S

WLAN_PWR Signal default HI for WLAN
1.BIOS Setup HI for Intel PCIE WLAN
2.USB WLAN BIOS Setup LOW for
Fn+F10

W L AN_ 3 .3 V

C1 4 6

C 16 3

C 11 3

C 6 44

C 6 40

. 1 U _ 1 6 V _ 04

1 0 U _ 1 0 V _ 08

.1 U_ 1 6 V _ 0 4

. 1 U _1 6 V _ 0 4

1 0 U_ 1 0 V _ 0 8

New Card, Mini PCIE B - 23

B.Schematic Diagrams

1 8 , 2 5, 2 7 , 3 0 B U F _P LT _ R S T #
1 9 US B _ O CP 8 _ 9 #

N C _ R S T#

3

C 4 31

Schematic Diagrams

3G, PATA ODD, eSATA
Layout? ? ? ?
"3.5G(HSDPA) "

20 mil C 8 2 2

+

MINI CARD 3G(Port 6)
C7 6 3

3 30 U _4 V _ D 2

SIM CONN

G ND

R4 9 3

*4 . 7 K _ 04

. 1 U _ 1 6 V _0 4

J _3 G 1
1
3
5
7
11
13
9
15

3. 3 V A U X _ 0
1 .5 V_ 0
UIM _ P W R
UIM _ DA T A
U I M_ C L K
UIM _ RE S E T
U I M_ V P P

W AKE#
CO EX 1
CO EX 2
C L K R E Q#
REF CL K REF CL K +
GN D 0
GN D 1

G ND 5

2
6
8
10
12
14
16

J _ S IM 1

3. 3V S
U
U
U
U
U

LOCK
(TOP VIEW)

I M_ P W R
I M_ D A T A
I M_ C LK
I M_ R S T
I M_ V P P

C8 1 5

U I M _C L K R 4 9 1
* 0 _0 4 0 2 _1 0 m i _l s h or t

. 1U _ 1 6V _ 0 4

4

Z 2 3 08
UIM _ RS T
UIM _ P W R

B.Schematic Diagrams

35
23
25
31
33

30 3 G _ D E T #

17
19
37
39
41
43
45
47
49
51

3 .3 VS

Sheet 23 of 47
3G, PATA ODD,
eSATA

C8 1 6

C 81 7

. 1 U _ 1 6 V _ 04

G ND

1 0 U _ 1 0V _0 8

G ND

W _ D I S A B LE #
PER SET#
S M B _ CL K
S M B_ DAT A
U S B _ DU SB_ D +

R e s e rv e d0
R e s e rv e d1
GN D 1 2
3. 3V A U X _ 3
3. 3V A U X _ 4
GN D 1 3
R e s e rv e d2
R e s e rv e d3
R e s e rv e d4
R e s e rv e d5

U I M _D A T A
U I M _V P P

OPEN

GN D

S I M L OC K 1 7 70 6 6 1 -1

G ND
*2 2 P _ 5 0V _ 0 4

G ND 6
G ND 7
G ND 8
G ND 9
G ND 1 0

GN D 2
GN D 3
GN D 4
GN D 1 1
PET n 0
PET p 0
P E R n0
P E R p0

C 7 Z 2 30 9 R 4 9 2
* 0 _ 04 0 2 _ 10 m i _l s h o rt
C 6
C 5

U I M_ D A T A
U I M_ V P P
U I M_ G N D

C 789

C7 8 7 C 7 9 5

G ND

K EY
21
27
29

U I M_ C L K
U I M_ R S T
U I M_ P W R

C 7 93
* 2 2P _ 5 0 V _ 0 4

GN D

C 3
C 2
C 1

3. 3 V A U X _ 1
1 .5 V_ 1
1 .5 V_ 2
3. 3 V A U X _ 2
L E D _W W A N #
LE D _ W L A N #
L ED _ W PAN #

18
26
34
40
50

GN D

20
22
30
32
36
38

GN D

G ND

* 2 2P _5 0 V _ 0 4

GN D

3 G _E N 3 0

3

L 85

4

2
24
28
48
52
42
44
46

* 2 2 P _5 0 V _ 0 4

Z2310

R 5 01
*0 _ 0 60 3 _ 3 2m i l _s h o rt

3 .3 VS

U S B N4 1 9

1

U SBP4 1 9

*W C M 3 21 6 F 2 S -1 6 1T 0 3

3 .3 VS
+ C8 2 1
*2 2 0 U _ 4 V _ D 2

Layout?
1. SIM? ? ? ? ? ? ? ? (10mil)
2. ? ? ? ? ? ? ? ? GND
3. SIM hold ? ? ? ? ? GND? ?
4. SIM CONN ? ? MINI CARD
CONN

3 .3 VS

8 89 1 0 -5 2 04
C 7 61

* . 1 U _ 1 6 V _ 04

G ND
G ND
GN D

SATA HDD & PATA O DD LED

e SATA

PATA ODD
3 .3 V S

I D E _ P D D [ 1 5 : 0]

2 0 I DE _ P D D[1 5 :0 ]

R1 6 5
20 K _ 0 4

1 0 , 16 , 1 8 , 2 0 A _ R S T #

1 9 HD _ A UX _ R S T #

D 14
C

R B7 5 1 V
A

D 13
C

R B7 5 1 V
A
J _ OD D 1

C 3 3 7 * . 0 1 U _ 1 6V _0 4

Z 2 3 02
Z 2 3 03
C D _R E S E T #
IDE _ P D D7
IDE _ P D D6
IDE _ P D D5
IDE _ P D D4
IDE _ P D D3
IDE _ P D D2
IDE _ P D D1
IDE _ P D D0

I D E _ P D I OW #
I D E _ P D I OR D Y
ID E _ IRQ
ID E _ P DA 1
ID E _ P DA 0
ID E _ P DC S 1 #
C D_ D AS P#

20 I D E _ P D I OW #
20 I D E _ P D I OR D Y
2 0 I DE_ IR Q
2 0 IDE_ PD A1
2 0 IDE_ PD A0
20 I D E _ P D C S 1 #
5V S
R 46 2

1 0 K_ 0 4

R 46 3
* 0_ 0 4 0 2_ 5 m i _l s h or t

C D_ CA BS EL
Z 2 30 4

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49

IDE
IDE
IDE
IDE
IDE
IDE
IDE
IDE
IDE
IDE

C 73 3

DD 8
DD 9
D D 10
D D 11
D D 12
D D 13
D D 14
D D 15
DD RE Q
DIO R#

20 S A TA _T X 1 + _C
20 S A TA _T X 1 -_ C

IDE _ P D DA C K # 2 0
R 46 6

1 0 K _ 04
3 . 3V S
IDE _ P D A 2 2 0
IDE _ P D CS 3 # 2 0

2008/03/24

C7 3 1

5V S

1 U _ 1 6 V _ 06

C7 4 9

C7 4 3
+C 7 2 9
1 0 0 U_ 1 0 V _ D2

B - 24 3G, PATA ODD, eSATA

. 1 U _ 16 V _ 0 4

2

3

1

GN D 1
3 .3 V S

3 .3 VS

TX P
TX N
R4 6 0

20 S A TA _R X 1+ _ C

S A T A _ R X 1 -_ C

3

S A T A _ R X 1 +_ C

2
1
L21
* W C M2 0 1 2F 2 S - 16 1 T 03 _ P

4

5

. 1 U _ 1 6 V _ 04

R 461

6
7

10 K _ 0 4

RXN

10 U _ 6. 3 V _ 0 8

1 0 0 K_ 0 4

RXP
GN D 3
2 0 S A T A _ LE D #

S A TA _L E D #

D 40
C

S CS 3 5 5 V
A

P S A B T 4 -0 7M L B S 4 N N X N 0

P IN G ND 1 ~ 4 = G N D
CD _ DA S P #

C
D 41

*. 1 U _1 6 V _ 0 4

. 1 U _ 1 6 V _ 04

S A T A _ TX 1 -_ C

2

GN D 2
20 S A TA _R X 1- _C
I D E _ P D D R E Q 20
I D E _ P D I OR # 2 0

DD ACK#
D D I A G#
DA2
DC S3 #

L26
* W C M2 0 1 2F 2 S - 16 1 T 03 _ P
3
4

1

S A T A _ TX 1 + _ C

4

Z 2 3 07

C 1 24 3 4 -1 5 A 1- B
6-21-11D00-050

C7 3 6

_P
_P
_P
_P
_P
_P
_P
_P
_P
_P

I D E _P
Z 2 3 06
I D E _P
I D E _P
I D E _P

P I N G ND 1 ~ 2 = G N D

C 734

J _E S A T A 1

Z 2 3 05

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50

A
S CS 3 5 5 V

H D _L E D # 2 6

Schematic Diagrams

USB, FAN, TP, FP, MULTI CON
USB PORT*2(Port 0,Port1)

FAN CONTROL
8

5V S

5 VS

5 VS_ F A N

L81
H C B 20 1 2 K F -5 0 0T 4 0 -08

3

US B V C C0 1
U 7
VIN

V OU T

VIN

V OU T

100 MIL

1

C4 0 0

2

+
-

C 75 8

1
U 1 1A
GM 3 5 8

4

4

.

5V

5

C 34 0

C 33 5

C 33 3

2

. 1 U _1 6 V _ 0 4

. 1 U _ 1 6 V _ 04

1 0 U _ 1 0V _0 8

. 1 U _ 1 6V _0 4

C
G
F A N _ D C _V O L _ R

F A N_ D C_ V O L

5

R4 7 8
1 0 K _ 1% _ 0 4

+
-

6

Z 24 0 1

7

J_ F A N 1

+
1 0 0U _ 6. 3 V _ B 2

60 mil

.

+C 2 90

C2 8 0

1 0 0 U _ 6 . 3 V _B 2

J_FAN1

Port 0

. 1 U _ 1 6V _0 4

3

30 C P U _F A N S E N
R 4 80

3 .3 VS

J _ USB1
1
R 568
4

1 9 US B N0

0 _0 4
3

Z2402

2

2

Z2403

3

1

1 9 US B P 0

4

GN D

0 _0 4
K S -00 1 H L -A N B C

US B _ V C C0 1 _ 0

+C 3 51

*. 1 U _1 6 V _ 0 4

Port 1
1

R 570
4

19 U S B N 1

R 1 55

0_04
3

Z 2 40 8

2

2

Z 2 40 9

3

* 0_ 0 6 03 _ 3 2 mi l _ sh o rt
*0 _ 06

1
2
3
4
5
6

J _ USB2
For ESD
06/15

R 1 54

5 VS
5V
J_ T P 1

. 1 U _ 1 6V _0 4

Sheet 24 of 47
USB, FAN, TP, FP,
MULTI CON

5 V S _ TP

C3 3 8

1 0 0 U _ 6 . 3 V _B 2

A
S C S 5 5 1 V -3 0

FOR M760J CLICK CONN

60 mil
C3 2 2

1

DA T A _ L

G ND 1
G ND 1
GN D 2
G N D 3GN D 2
G ND 3
GN D 4
GN D 4

R 56 9

4 .7 K _ 0 4

C
D4 5

V+

DA T A _ H
*W C M 20 1 2 F 2 S -1 61 T 0 3
L3 5

5V

8 5 20 5 -0 3 00 1

V+

R 4 64

R 4 65

C2 8 9

1 0 K_ 0 4

1 0 K_ 0 4

*1 0 U _ 1 0V _0 8

C 288

C 7 44

C 7 45

1 U _ 10 V _ 0 6

4 7 P _ 5 0V _0 4

4 7 P _ 5 0V _ 0 4

TP _D A T A 3 0
TP _C L K 3 0

85 2 0 1- 06 0 5 1
DA T A _ L

1

19 U S B P 1

R 571

4

GN D

0_04
K S -00 1 H L -A N B C

G ND 1
G ND 1
GN D 2
G N D 3GN D 2
G ND 3
GN D 4
GN D 4

DA T A _ H
*W C M 20 1 2 F 2 S -1 61 T 0 3
L4 2

L E D _ C TR L 3 0

FOR M74OJ CLICK CONN
J_ T P 2

3 .3 VS

3 .3 VS_ F P

J _S W 1

3 .3 V S
L37
H C B 1 60 8 K F -1 2 1 T2 5 _ 0 6

J _ F P1
R 62 1
Z24 12

1
2
3
4

1 00 K _ 0 6
M_ B T N # 3 1
P C1 9 2

. 0 1 U _ 5 0 V _0 4

0501

8 52 0 1 -0 4R

US B P 1 2 1 9
US B N 1 2 1 9

12
C 3 16

6- 20 -9 4A 20 -11 2

MULT I I/O CONN.(Port 9)
5V

3. 3 V

R1 7

3 3_ 0 4

L1 0 1

.

F C M 1 00 5 K F -1 2 1 T0 1
C 904
* 4 7P _ 5 0 V _ 0 4

Z 24 0 7

1
3
5
7
9
11
13
15

2
4

T P B UT T O N_ L

SW?
4
3

Audio/B

FOR MULTI IO BOARD

CONN.(Port 2)

1 9 USBP2

1

U SBN 2

2

5V
4

U SBP2

3

S P K O U T R + 29
S P K O UT R - 2 9

5V

3. 3 V

C8 9 1
4 7 P _5 0 V _ 0 4

C 9 24
. 0 1 U _ 1 6 V _ 04

C 9 25
. 0 1U _ 1 6V _ 0 4

C 9 2 0 * . 1 U _ 1 6 V _ 04

U S B N 2 _R
5V

U S B P 2_ R

*W C M2 0 12 F 2 S -1 6 1 T0 3 _ N P

C CD _ DE T # 3 0
C CD _ E N 3 0

US B N9 1 9
US B P 9 1 9

FOR PHONE JACK BOARD

L 10 0
1 9 USBN 2

2
4
6
8
10
12
14
16

8 7 2 16 -1 6 0 6

1
3

T P B U TT O N _ R

C3 4 2
. 1 U _ 1 0 V _X 7 R _0 4

3 .3 V

Z 24 1 1

2
4

5 VS_ TP

8 7 15 1 -1 2 07 G

28 M I C 1 -R
28 M I C 1 -L

C8 9 2
47 P _ 5 0 V _0 4
2 8 S P DIF O

C9 0 3
4 7 P _5 0 V _ 0 4

1
3

SW 6
T J G-5 3 3 -S -T / R

. 1 U _ 16 V _ 0 4

J _ MU L TI

19 , 2 8 A Z _ S D OU T
19 , 2 8 A Z _ S Y N C
19 A Z _S D I N 1
1 9 , 28 A Z _R S T #
19 , 2 8 A Z _ B I T C L K

LIFT
KEY

S W7
T J G- 53 3 -S -T / R

J_FP1
4
1

FOR POWER SWITCH BOARD

R 18
Z 24 0 6
*0 _0 4 0 2 _1 0 m i _l s h ort

RIGHT
KEY

T P_ CL K
T P _ D A TA

8 5 20 1 -0 4 L

L9 9
F C M 10 0 5 K F -1 2 1T 0 1
S P DI F O

.

1
4

1
2
3
4

.

SJ_SW1

1

5
6

FP CONN

11/14

5
6

POWE R SWITCH CONN.

T P B U T TO N _ L
T P _ S C R O LL _ D O W N
T P _ S C R O LL _ U P
T P B U T TO N _ R
Z240 4
Z240 5

1
2
3
4
5
6
7
8
9
10
11
12

6 80 P _ 5 0 V _ 04

C 8 93

2 9 H E A D P H ON E -R
2 9 H E A D P H ON E -L
28 J D _S E N S E A
29 S P K _ H P #
28 J D _S E N S E B

MI C 1 -R
MI C 1 -L
A U DG
H E A D P H ON E -R
H E A D P H ON E -L
S P K _ HP #
J D_ S E N S E B
US B N2 _ R
U S B P 2 _R
Z 24 1 0

C 9 2 1 * . 1 U _ 1 6 V _ 04
J _ A UD IO
1
2
3
4
5
6
7
8
9
10
11
12
13

C 9 22
. 0 1 U _ 1 6 V _ 04
A UD G

8 72 1 3 -1 30 0 G_ R

USB, FAN, TP, FP, MULTI CON B - 25

B.Schematic Diagrams

R 1 68
5 1 K_ 0 4

1
2
3

C7 5 7

3 0 C P U _F A N

US B _ V C C0 1 _ 0

L40
H C B 2 0 12 K F -5 0 0 T 40 _ 0 8

1 9 U S B _O C P 0_ 1 #

* . 1 U _ 1 6 V _0 4

D 44
S C S 5 5 1 V -3 0

F A N _ D C _ V OL
11/14

C 325

Q5 0
N D S 3 5 2A P _N L

U1 1 B
GM 35 8

0410
U S B V C C 01
R 1 67
2 7 K_ 0 4

1 0 U _ 1 0 V _0 8

40MIL

R4 7 9
4 . 9 9 K _1 % _ 0 6

A

G ND
R T 97 0 1 -C P L

S

3

1 0 U _1 0 V _ 0 8

D

C 331

Schematic Diagrams

CARD READER
Card Reader Power
3.3VS

3.3VS

R547

4.7K_04 SD_CD#

R546

4.7K_04 MS_INS#

VCC_CARD

R5
00

10K_
04

MDI O
12 R532
MDI O
14 R549

MDI O
7

200K_04
200K_04

*0_0805
_50mil_short

Use 0805 type and over 20 mils trace width on
both side

VCC_CARD
SDWP R499
MDIO13 R550

R560

CARD_
PWREN#

10
K_04
10
K_04
VDDA33

L90
HCB2012KF-500T40_
08

Card Re ader Pu ll
High/Lo w
Resisto rs

? ? ? ? , JMB? ? ? ? ? ?
CR1_PCTLN? ? ? ? VCC_CARD? ?

3.3VS

.
+C827

C849

C835

C81
8

.1U_16V_04

10U_10V_08

.1U_1
6V_04

*10
0U_6.3V_B2

Q66
*AO3409
S
D

3.3VS

VCC_CARD

G

MDIO
8
MDI O
9
MDIO10
MDIO11
MDIO12

*100K_04

.1U_16V_04

.1U_
16V_04

18,22,27,30 BUF_PL
T_RST#
2 PCIE_CR_CLKN
2 PCIE_CR_CLKP

BUF_PL
T_RST#

CARD_PWREN#

JMB385

2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3

MDIO
13
MDIO
14
CR1
_LEDN

3.3VS

CARD_PWREN#
SD_CD#
MS_INS#
SEECLK
Z2
502

APVDD

C819

C874
. 1U_16V_04
. 1U_16V_04
D51
A

C

SB_CR_WAKE# 18
SB_CR_CPPE# 19

RB75
1V
JM38
5

Q62
G

C863
C861

.1U_X7R_16V_04
.1U_X7R_16V_04

2N7002W

PCI E_NB_CARDREADER_RXP 9
PCI E_NB_CARDREADER_RXN 9

APVDD

C8
52

G
S

GND
MDIO
13
MDIO
14
CR_LEDN
DV33
REG_CTRL
DV18
CR1_PCTLN
CR1_CD0N
CR1_CD1N
SEECLK
SEEDAT

PCIE_CR_CLKN
PCIE_CR_CLKP

*100K_04

S

C8
75

DV18
PCIES_EN
PCIES
MDI O
7
MDI O
6
MDI O
5
MDI O
4
DV33
MDI O
3
MDI O
2
MDI O
1
MDI O
0

*.1U_16V_04

*2N70
02W

XRSTN
XTEST
APCL
KN
APCLKP
APVDD
APGND
APREXT
APRXP
APRXN
APV1
8
APTXN
APTXP

SD/ M
SCLKR498

3.3VS

37
38
39
40
MDIO7
SDWP
41
22_04 Z250
3 42
SDCMD/MSBS 43
44
MDIO3
45
46
MDIO2
MDIO1
47
48
MDIO0

*470_04

D

3.3VS

R496

D

36
35
34
33
32
31
30
29
28
27
26
25
C820

C824

Q
65

U33

NC
NC
NC
GND
GND
G
ND
TAV33
MDIO8
MDIO
9
MDI O
10
MDIO11
MDIO12

Sheet 25 of 47
CARD READER

R564

Z2501

APVDD

1
GND 2
3
4
5
6
PREXT7
8
9
1
0
APTXN
11
APTXP
12

B.Schematic Diagrams

R548

APVDD

C829

C830
C833

1000P_5
0V_04 .1U_16V_04

10
U_10V_08

C831

PCIE_
NB_CARDREADER_TXN 9
.1U_
16V_
04
PCIE_
NB_CARDREADER_TXP 9

10U_10
V_08

ARGND
R512

ARGND

8.2K_04

Card Reader
Connector

ARGND
R507

J_CARD- REV1
SD_CD#
M
DIO2
M
DIO3
SDCM
D/MSBS
VCC_CARD

SD/M
SCLK
M
DIO0
M
DIO1
SDWP

VCC_CARD

SD/M
SCLK
M
DIO3
M
S_INS#
M
DIO2
M
DIO0
M
DIO1
SDCM
D/MSBS

P1
P2
P3
P4
P5
P6
P7
P8
P9
P10
P11
P12
P13
P14
P15
P16
P17
P18
P19
P20
P21

CD_SD
DAT2_SD
CD/DAT3
_SD
CMD_SD
VSS_SD
VDD_SD
CLK_SD
VSS_SD
DAT0_SD
DAT1_SD
WP_SD
VSS_MS
VCC_M
S
SCLK_MS
DAT3_MS
INS_MS
DAT2_MS
SDIO/DAT0_M
S
DAT1_MS
BS_M
S
VSS_MS

ARGND

VCC_CARD
SD/MSCLK

C775

C794

C784

C826

10P_
50V_04

*10P_50V_04

.1U_16
V_0
4

.1U_16V_04

*10U_
10V_08

Near Cardreader CONN
GND
GND

MDR019-C0-0010( Reverse)

B - 26 CARD READER

C788

P22
P23

2008/03/27

*0_
0603_32mli_short

Schematic Diagrams

ISATA HDD, LED, HOTKEY, BT
SATA HDD

WEB_EMAIL#

HOT KEY
1
3

J_ H D D 1

W E B _ E MA I L # 3 0
C 10

S A T A _ T X 0+ _ C
S A T A _ T X 0-_ C

PSW1~8

S A T A _ R X 0 -_C 2 0
S A T A _ R X 0 +_ C 2 0

C7 9 1

1
3

C7 9 2

SW 4
*T J G- 53 3 -S -V -T / R
1
2
3
4

1
2

3
4

WEB_WWW#

3. 3V S
P1
P2
P3
P4
P5
P6
P7
P8
P9
P1 0
P1 1
P1 2
P1 3
P1 4
P1 5

. 1 U _1 6 V _ 0 4

5
6

S A T A _ TX 0 + _C 2 0
S A T A _ TX 0 -_ C 2 0

S A T A _ R X 0 -_ C
S A T A _ RX 0 + _ C

SW 2
T J G-5 3 3 -S -V -T / R
2
4

5
6

S1
S2
S3
S4
S5
S6
S7

LID SWITCH IC

SW 1
T J G-5 3 3- S -V -T / R
2
4

W EB_ W W W # 3 0

GN D

FOR 760J

3. 3 V
R3 4 4

1 0 0K _0 4

C9
G ND

U1

. 1U _ 16 V _ 0 4

1

5 VS
1
3

HD D_ N C0
C4 7 6
. 1 U _ 1 6V _0 4

C4 7 4

.1 U_ 1 6 V _ 0 4

1U _ 10 V _ 0 6

+ C7 8 5

C7 8 6

2 0 U _ 6 . 3V _0 8 * 1 00 U _6 . 3 V _ B 2

OU T

2

L ID_ S W #

GN D

SW 3
T J G-5 3 3 -S -V -T / R
1
2
3
4

GN D

C1

L I D _ S W # 1 6, 1 9 , 3 0

C 57 1
MH -2 4 8

AP_ KEY # 3 0

. 1 U _ 1 6 V _0 4

PSU1, PSU2
1 0 0P _5 0 V _ 0 4

3

C 11

FOR 760J

1

2

.1 U_ 1 6 V_ 0 4

5
6

. 1 U _1 6 V _ 0 4

C 47 5

5
6

C 4 77
HD D_ N C1
HD D_ N C2
HD D_ N C3

AP_KEY#

SW 5
* TJ G -5 33 -S -V -T/ R
2
4

V CC

3

1 0U _ 10 V _ 0 8
5
6

. 0 1U _ 1 6V _ 0 4

S A T -2 2 R C 1 A A
GN D

GN D

LED

GN D

Bluetooth(Port7)

3 .3 VS

3 . 3V S

3 .3 VS

R3 3 9
R 33 8

R3 4 0

R 3 41

3. 3 V

22 0 _ 0 4
Z2602

A

CAPS
LOCK
LED

D3 4

SCROLL
LOCK
LED

50mil

C3 5

C3 9

. 1 U _ 1 6 V _0 4

1 0U _ 10 V _ 0 8
J _ BT1

1 9 U SB N7
1 9 U SBP7
3 0 B T _ DET #
3 .3 V

H D_ L E D# 2 3

L E D_ N UM # 3 0

L ED _ CA P# 3 0

R 12

10 K _ 0 4

LE D _ S C R OL L # 3 0

V D D5

VDD 5

5 VS

V D D5
R3 3 6

R 33 5

4 7 0_ 0 4
R3 3 1

R3 3 4

4 7 0_ 0 4

1

3

2

4

3

WLAN
LED

D2 9
K P B -3 0 2 5Y S GC

K P B -3 0 2 5Y S GC

Z2612

3 VS_ BT 2

L54
H C B 2 0 1 2 K F -5 00 T 4 0 _0 8

50mil

C 5 70

C 5 69

. 1 U _ 16 V _ 0 4

1 0 U_ 1 0 V _ 0 8
J _ B T2

Z 26 1 3

C
B
E

LE D _ B A T _ F U L L # 3 0

W L A N_ E N

Q7 0
D T C 1 14 E U A

2 2, 30

1 9 US B N 6
1 9 US B P 6
30 B T_ D E T #
3 .3 V

R3 3 0

1 0 K _ 04

B T_ D E T #
B T_ E N #
D

L ED_ P W R# 3 0

3 .3 V

Layout? ? ? ?
"Bluetooth For
M760J"

D2 8
2

Y
SG
2

K P B -30 2 5 Y S G C

BAT LED

Y
SG

Z 26 0 9

BT
LED

4

Z2 6 08
3

L E D _ A CIN # 3 0

L E D_ B A T _ C HG # 3 0
C
B T _E N 3 0
E

Q6 9
DT C1 1 4 E UA

Q3 3
2 N 7 0 0 2W

* 8 72 1 3 -0 6L

G

3 0 BT _ EN

B

1
2
3
4
5
6

From EC default HI

S

3

SG

POWER ON
LED

D 27

4

Y

1
2

2

4 7 0_ 0 4

1

Z 2 6 07

Z 2 60 6
1

4 7 0_ 0 4

Z 26 1 1

4

47 0 _ 04

1

Z2610
4 7 0 _ 04

Bluetooth(Port5)

R 33 3

.

V D D5

S

From EC default HI

R3 3 2

8 72 1 2 -0 6G 0

Q 5
2 N 70 0 2 W

G

30 B T_ E N

5 VS

1
2
3
4
5
6

B T _ DE T #
BT _ EN#
D

C

D 33

C

A

NUM
LOCK
LED

K P -2 01 2 S G C

A
C

K P -2 0 12 S G C

D 32
K P -20 1 2 S GC

A

HDD/
CD-ROM
LED

D3 1

C

Z 2 6 04

Z2 6 03

K P -2 0 1 2S GC

Z 26 0 1

3 VS_ BT1

L9
H C B 2 01 2 K F -5 0 0 T4 0 _ 0 8

2 2 0 _ 04

.

2 20 _ 0 4

1 2 0_ 0 4

Sheet 26 of 47
SATA HDD, LED,
HOTKEY, BT

Layout? ? ? ?
"Bluetooth For
M740J/M760J"

3 .3 V S

ISATA HDD, LED, HOTKEY, BT B - 27

B.Schematic Diagrams

P IN G ND 1 ~ 2 = G ND

Schematic Diagrams

PCIE GIGALAN RTL8111C
LAN (RTL8111C)

FOR RTL8101E
R 58 1

L A N_ V D D3

C T RL 1 8

LA N V D D 1 5

FB1 2

L36

L38

L A N V D D 18

R 15 6

.

3 . 3V

*0 _ 0 6

must be within
0.5cm

must be within
0.5cm (to pin
1)

? ? ? INDUCTOR
(600mA)

.

H C B 2 0 1 2K F -5 00 T 4 0 _0 8
C 32 4

C 2 79

C 2 96

C 3 21

C 2 76

C 304

C 31 1

2 2 U _ 6 . 3 V _ 08

. 1 U _1 6 V _ 0 4

. 1 U _1 6 V _ 0 4

* . 1 U _ 1 6V _0 4

. 1 U _ 16 V _ 0 4

. 1 U _ 16 V _ 0 4

C3 1 9

C 3 10

C2 8 3

+C 30 9

4 . 7 u H _ + / -1 0% _ 2 5 20

4 0 mil

*. 0 1 U _ 1 6V _0 4

4 0 mil

0 _ 06

C 3 00

C 3 12

2 2 U _ 6 . 3 V _0 8

C2 8 4

C 28 6

C 2 85

2 2 U _ 6 . 3V _0 8

* 10 0 U _ 6 . 3 V _ B 2

*. 0 1 U _ 1 6 V _ 04

. 1 U _ 1 6 V _ 04
. 1 U _1 6 V _ 0 4

100MHz/100 1A

. 1 U _ 1 6 V _ 04

. 1 U _ 1 6 V _ 04

. 1 U _ 1 6 V _ 04
R1 5 7
0 _ 06

RTL8101E RTL8111C

FOR RTL8101E
R157? ? ?

L A N _V D D 3

LANVDD18
LANVDD15

6 0 mi l

C 3 17

C 3 20

. 1 U _1 6 V _ 0 4

. 1 U _ 16 V _ 0 4

C3 1 8

C 271

C3 1 4

. 1 U _ 1 6 V _0 4

C 328

. 1 U _ 1 6 V _ 04

. 1 U _ 1 6 V _0 4

C2 8 2

*. 1 U _1 6 V _ 0 4

C3 2 9

. 1 U _ 1 6 V _ 04

1.8V
1.5V

1.2V
1.2V

L A N V D D1 5

6 0 mil

C 2 99

*. 1U _ 16 V _ 0 4

+ C3 2 6

. 1 U _ 1 6 V _ 04

C 3 32

*1 0 0 U _ 6 . 3 V _ B 2

L A N_ A V D D1 8

LA N _ C L K R E Q#

4 0 mil
C2 7 3

. 1 U _ 16 V _ 0 4 . 1U _ 16 V _ 0 4
C 2 75

FOR RTL8101E
L34? 0_06

.1U_16_04 capacitance as close as
possible to RTL8111C

L A N V D D 18
L3 4

FB1 2

L A N _ E V D D 18

4 0 mil

.
F C M2 0 1 2 V F -1 2 1T 0 8
S HO RT _ 1 A
2

C 2 70

C 2 95

C 29 1

1 0 U _ 1 0 V _ 08

. 1 U _1 6 V _ 0 4

. 1 U _1 6 V _ 0 4
Z 2 7 01

C 3 01
C 3 05

. 1 U _ X 7R _ 1 0V _ 0 4 P C I E _ R X P 2 _ G LA N _ C
. 1 U _ X 7R _ 1 0V _ 0 4 P C I E _ R X N 2 _G L A N _ C

29
30
26
27

2 P C I E _ L A N _C L K P
2 P C I E _ L A N _ C LK N

E V D D1 8
E V D D1 8
E G ND
E G ND
H S IP
H S IN

PCI-E LAN

MD I P 1
M DIN 1

RTL8111C-VB

H S OP
H S ON

R1 5 1

1 8, 2 2 , 2 5 , 3 0 B U F _ P L T _ R S T #

*0 _ 04 0 2 _ 5m i l _s h o rt

R1 4 9

2 . 49 K _ 1 % _ 04

1 K _ 04

RS T B

20

Z 2 7 02

64

Z 2 7 03

36

R E F CL K _ P
R E F CL K _ N

L ED 0
L ED 1
L ED 2
L ED 3

PER STB
V C T RL 1 8
V C T RL 1 5

R SET
IS O L A T E B

R6 2 2

*1 K _ 0 4

R1 5 9

2 0 SB_ D PS_ L AN

1 5K _0 4
R1 5 3

62

MD I P 2
M DIN 2
MD I P 3
M DIN 3

L A NW A K E B

3. 3 V S

G V DD

C KTAL 2
C KTAL 1

Enable Switching
regulator
Hi: Enable
Low: Disable

R5 8 3
R5 8 4

* 49 . 9 _ 1 % _0 4 Z 2 71 2 C 8 9 4
* 49 . 9 _ 1 % _0 4

*. 0 1 U _ 1 6 V _ 04

MD I O1 +
MD I O1 -

R5 8 5
R5 8 6

* 49 . 9 _ 1 % _0 4 Z 2 71 3 C 8 9 5
* 49 . 9 _ 1 % _0 4

*. 0 1 U _ 1 6 V _ 04

3 .6 K _ 0 6

3
4

MD I O0 +
MD I O0 -

6
7

MD I O1 +
MD I O1 -

9
10

MD I O2 +
MD I O2 -

12
13

MD I O3 +
MD I O3 -

57
56
55
54
1
63
61
60

1
2
3
4
1 0 K_ 0 4

C S
S K
D I
D O

VCC
NC
O RG
G ND

8
7
6
5

RP 1
C 34 1

*. 1U _ 16 V _ 0 4

A T9 3 C 4 6 D N -S H -T

FOR RTL8101E

T CT 1
T D1 +
T D1 T CT 2
T D2 +
T D2 T CT 3
T D3 +
T D3 T CT 4
T D4 +
T D4 -

MC T 1
MX 1 +
M X 1MC T 2
MX 2 +
M X 2MC T 3
MX 3 +
M X 3MC T 4
MX 4 +
M X 4-

24
23
22
21
20
19
18
17
16
15
14
13

* 0 _0 6 >40MILS

R 14 8

0_06

G S 5 01 9 P L F

C 2 78

2

L MX 3 +
L MX 3 LM X 4+
L MX 4 -

4
3
2
1

X1 +
X1 X2 +
X2 -

-0 0 51 = P 3
5 D LM X 3 +
6 D LM X 3 7 D LM X 4 +
8 D LM X 4 -

4
5
7
8

sh i e l d
sh i e l d

GN D 1
GN D 2

DC +
DC DD +
DD C 10 0 9 1- 10 8 A 4

5
6
7
8

D
D
D
D

LM
LM
LM
LM

X3 +
X3 X4 +
X4 -

8 P 4 RX 0 _ 0 6

. 1 U _ 1 6 V _ 04

2 2 U _6 . 3 V _ 0 8

? ??

Z 2 7 07
Z 2 7 08
Z 2 7 09
Z 2 7 10

1

2 5 MH z
C2 9 4

7 5 _ 1%
7 5 _ 1%
7 5 _ 1%
7 5 _ 1%

_04
_04
_04
_04

C1 6 0

22 P _ 5 0 V _ 04

*0 _ 0 6

0501

*0 _ 0 4

Z 2 71 1

L A N V D D 18
R 12 2

R 62 3

R9 1
R9 0
R8 9
R8 8

C2 8 7

3 .3 V

* . 1 U _ 1 6V _0 4

* #9 4 4 C M
4
3
2
1

LM
LM
LM
LM

C2 6 9

*0 _ 0 4

C 3 27

LP 1
L MX 3 +
L MX 3 LM X 4+
L MX 4 -

>40MILS

R1 5 0

*. 1 U _ 1 6 V _ 04

8 P 4 RX 0 _ 0 6
J _ RJ 4 5
* #9 4 4 C M -0 0 51 = P 3
4
5 D LM X 1 + 1
DA +
3
6 D LM X 1 - 2
DA 2
7 D LM X 2 + 3
DB +
1
8 D LM X 2 - 6
DB -

D
D
D
D

L A N_ V D D3

>40MILS

NEAR U27

C3 3 4

LP 2
L MX 1 +
L MX 1 LM X 2+
L MX 2 -

5
6
7
8

Z2705

X2

Z2714

4
3
2
1

RP 2

L A N_ V D D1 5

R 58 7

POWER PLAN FOR PIN1
C T R L1 8
C T R L1 5 / V D D 3 3

L MX 1 +
L MX 1 LM X 2+
L MX 2 L28
1
2
3
4
5
6
7
8
9
10
11
12

2 2P _5 0 V _ 0 4

B - 28 PCIE GIGALAN RTL8111C

MD I O0 +
MD I O0 -

U 8
E E CS
M A 2 /E E S K
M A 1 /E E D I
M A 0 /E E D O

44
48
47
45

Z2706

17
18
34
35
39
40
42
50
51
L A N _V D D 3

R 1 58

Z 2 7 04

0 _0 4

0501

FOR RTL8101E
LA N _ V D D 3

R 1 60

MD I P 0
M DIN 0

. 1 U _1 6 V _ 0 4

*0 _ 0 4

U6
RTL 8111C-VB or VC
P IN 6 5 ,G N D1 ~ 9 = G ND

E E CS
EESK
EED I
E E DO

A V D D1 8
A V D D1 8
A V D D1 8
A V D D1 8

19

1 9 , 2 2 P C I E _W A K E #

R1 6 1

22
28
25
31

23
24

9 P C I E _ N B _ G I GA L A N _ T XP
9 P C I E _ N B _ G I GA L A N _ T XN
9 P C I E _ N B _ G I GA L A N _ R X P
9 P C I E _ N B _ G I GA L A N _ R X N

5
8
11
14

NC
N C
N C
NC
N C
NC
N C
NC
NC

SH 1
1

* . 1 U _ 1 6V _0 4

58
52
49
43
41
38
33
32
21
15

. 1 U _ 1 6V _0 4

10 U _1 0 V _ 0 8

R 58 2

C 33 0

2 2 U _ 6 . 3 V _ 08

L A N _V D D 15

C 27 4

VDD 1 5
V D D1 5
VDD 1 5
V D D 15
V D D1
V D D 15
V D D1 5
VDD 1 5
V D D1 5
VDD 1 5

C 2 72

53
46
37
16

C2 7 7

2
59

R 147
* 0_ 0 8 0 5_ 5 0 m li _ s ho rt

VDD 3 3
V D D3 3
V D D3 3
V D D 33

Sheet 27 of 47
PCIE GIGALAN
RTL8111C

FOR RTL8101E

LA N V D D 1 8

A V D D3 3
AVDD 3 3

B.Schematic Diagrams

40 m il

L A N _ DS P _ E C

30

FOR RTL8101E

V _ DA C

4 0 mi l

C2 4 0

C 247

C 22 9

C 20 7

. 0 1U _ 1 6V _ 0 4

. 01 U _1 6 V _ 0 4

. 0 1 U _ 1 6 V _ 04

. 0 1 U _ 1 6 V _ 04

1 0 00 p _ 2K V _ 12

Schematic Diagrams

AUDIO CODEC ALC662
CODEC ( ALC662)
D24
C

3.3VS

C865

L
52

3.3VS_AUD

5VS_AUD
.1U_
16V_04

L53

U16
4

5
OUT

C882

C881

C869

10U_
10V_08

.1
U_16V_04

.1U_16V_04

C556

C890

.1U_16V_04

10
U_10V_08

VIN

SHDN#

AUDG
.1U_1
6V_
04

5V

HCB1608KF- 1
21T25_06
5VS

10U_1
0V_
08

HCB1
608KF-121
T25_06

.

C56
2

*SCS551V-30
A

.

PIN25,PIN38 ? 1? 10uF/.1uF

C5
68

Z2805 3

1
2

C5
41

BYP GND
*G924

1U_10V_06

R325
R324
R537
R323
R326

1
9,24 AZ_SDOUT
19,24 AZ_BITCLK
19 AZ_SDIN0
19,24 AZ_SYNC
19,24 AZ_RST#

AZ_SDOUT_R
AZ_BITCLK_R
AZ_SDIN0_
R
AZ_SYNC_R
AZ_RST#_R

33_04
0_04
22_04
33_04
33_04

47

2
9 EAPD_M
ODE

check to jack,VGA

48

24 SPDI FO
BEEP

R321

10K_04

PCBEEP_C

C553

5
6
8
10
11

PCBEEP_
R

1U_10V_0
6

SDATA-OUT
BIT-CLK
SDATA-IN
SYNC
RESET#

25
38

1
9

AVDD1
AVDD2

GPIO0
GPIO1

DVDD1
DVDD2

2
3

*22P_50V_04

LINE1-VREFO-L
LINE1-VREF-R
MIC2-VREFO
LINE2-VREFO

EAPD
SPDI FO

FRONT-OUT-L
FRONT-OUT-R

12

1K_04
10
0P_
50V_04
24 JD_SENSEA
24 JD_SENSEB
C845
C844

2
9 L_
HP_OUT_A
2
9 R_HP_OUT_A
INT_M
IC R510

1K_04

R590
R591

Z2817

C843
C842

20K_1%_04 Z2801
39.2K_1%_04 Z2818

13
34

HP_L
HP_R

14
15

4.7U_X5
R_06
4.7U_X5
R_06
4.7U_X5
R_06
4.7U_X5
R_06

MIC2_L 16
MIC2_R 17
Z2802
Z2803
Z2804

24 MIC1-L
24 MIC1-R

M
IC1-L R509
M
IC1-R R508

75_0
4
75_0
4

MIC1_L_C
MIC1_R_C

C841
C840

4.7U_X5
R_06
4.7U_X5
R_06

18
19
20

MIC1_L 21
MIC1_R 22

SURR-OUT-L
SURR-OUT-R
Se
nse A(JD1)
Se
nse B(JD2)

CEN-OUT
LFE-OUT

LINE2-L
LINE2-R

ANALOG

SIDESURR-L
SI DESURR-R

MIC2-L
MIC2-R

NC

CD-L
CD-GND
CD-R

JDREF
L
I NE1-L
LINE1-R

AVSS1
AVSS2

R320
C551

MIC1-L
MIC1-R

27

ALC_VREF

28
32

M
IC1-VREFO-L
M
IC1-VREFO-R

C872

.1
U_16V_04

*.1U_16V_04

.

1
0U_10V_08

L98
FCM2012
VF-121T0
8

VREF

MIC1-VREFO-L
MIC1
- VREFO-R

DIGITAL

PCBEEP

AUDG

C561

AUDG

29
37

Z280
6
Z280
7

30
31

M
IC2-VREFO
ALC-LINE2-VREFO

35
36

FRONT_
L
FRONT_
R

39
41

Z280
8
Z280
9

43
44

Z281
0
Z281
1

45
46

Z281
2
Z281
3

33

Z281
4

40

JDREF

23
24

Z281
5
Z281
6

AUDG

Layout Note:

C56
6
C56
7

Very close to Audio Codec
4.7U_X5R_0
6
4.7U_X5R_0
6

NEAR CODEC

R329

20K_1%_04

MIC2-VREFO

J_INTMIC1
2

AUDG

2.2K_
04
J_INTM
IC1

26
42
MIC1_L
MIC1_R

C544
C545
C546
C547

INT_M
IC

.1U_16V_04
.1U_16V_04

C281

Layout Note:

.1U_16V_04
.1U_16V_04

AUDG

Codec pin 1 ~ pin 11 and pin 47 and pin 48
are Digital signals.
The others are Analog signals.

AUDG

330P_X7R_04

1
2
88266-02001
PCB Footprint = 8
8266-2R

PCB FOOTPRINT 2L-->2R

PIN 13 JD_SENSE
? ? ? ? ? ? ? ?

Layout Note:
Very close to Audio Codec

MIC1
- VREFO-R

MIC1-VREFO
-L

R327

PC BEEP

R3
28

4.7K_04
MIC1-L

4.7K_04
MIC1-R

C560

C5
64

BEEP

30 BEEP
19 ICH_SPKR

1

R152

ALC662
MIC2_L
MIC2_R

Sheet 28 of 47
AUDIO CODEC
ALC662

FRONT-L 29
FRONT-R 29

680
P_X
7R_04
C555

680P_X7
R_04

1U_10V_
06
AUDG

AUDG

AUDIO CODEC ALC662 B - 29

B.Schematic Diagrams

ALC_GPIO0
ALC_GPIO1
C513

DVSS1
DVSS2

U35

4
7

C54
0
AUDG

Schematic Diagrams

AUDIO AMP2056
AUDIO AMP
5 VS

5 V S _ A MP

.

L89

H C B 2 01 2 K F -5 0 0 T 4 0_ 0 8

C8 1 0
C 83 4

C 8 51

C8 8 3

C 53 4

C 5 57

1 0 U _ 1 0 V _ 08

1 0 U_ 1 0 V_ 0 8

*. 1 U _1 6 V _ 0 4

.1 U_ 1 6 V _ 0 4

. 1 U _ 16 V _ 0 4

.1 U_ X 7 R_ 1 0 V _ 0 4

.

L97

F C M 1 60 8 K -1 2 1 T 06

C 8 87

. 1U _ 1 6V _0 4

C 9 26

*. 1 U _ 1 6 V _ 0 4

AP UD G

C 554

5 V S _ A MP

40 mils

*. 1 U _ X 7 R _ 1 0 V _ 0 4
C 5 30

Low mute!

R 32 2
C
D2 6

A
S C S 3 55 V

C
D2 5

A
S C S 3 55 V

* . 1 U _ X 7R _ 1 0V _0 4
1 0 K_ 0 4
OP MU T E A P M #

C9 0 5

5

2 0 S B _ MU T E #

2 8 E A P D _ MO D E

APU DG

C 8 68

. 1 U _1 6 V _ 0 4

A P UD G

C 537

1U _ 1 0V _ 0 6

L_ I N _ A MP _C

5

0_04

Z 2 9 03

C 531

4. 7 U _ 6. 3 V _ 0 6

R_ IN _ HP _ L

R 3 00

39 K _ 0 4

R _ I N _H P _ C

4

R 49 7

0_04

Z 2 9 04

C 538

4. 7 U _ 6. 3 V _ 0 6

L _ I N _ H P _L

R 3 10

39 K _ 0 4

L_ I N _ H P _ C

6

27

C PVSS
H PVSS

A P A 2 05 6 A / A P A 2 05 7 A

S PKO UT R +

R _ O U T -_ C

R 6 13

*0 _ 0 40 2 _ 1 0m i l _ sh o rt

S PKO UT R -

8

L_ O U T + _ C

R 6 14

*0 _ 0 40 2 _ 1 0m i l _ sh o rt

S PKO UT L +

L2

9

L_ O U T -_ C

R 6 15

*0 _ 0 40 2 _ 1 0m i l _ sh o rt

S PKO UT L -

L3

S P K O U T R + 24
S P K O UT R - 2 4

17

R _ H P _ OU T_ C

R 6 16

*0 _ 0 40 2 _ 1 0m i l _ sh o rt

18

L_ H P _ OU T _C

R 6 17

*0 _ 0 40 2 _ 1 0m i l _ sh o rt

11

Z 2 91 1

19

Z 2 91 2

H E A D P H O N E -R 2 4

J_ S P K L 1
S P K OU T L +_ R
S P K OU T L -_R

F C M 1 6 08 K -1 2 1 T 06
F C M 1 6 08 K -1 2 1 T 06

C 6

1 80 P _ 5 0 V _ 0 4

1 8 0 P _ 50 V _ 0 4

H E A D P H O N E -L 2 4

R3 0 1
5 VS_ AM P
* 0 _0 6 0 3 _3 2 m i _l s h o rt
C5 3 9

C 543

1 U _ 1 0 V _0 6

. 1U _ 1 6V _ 0 4

A P U DG

R5 5 7
3. 3V S
* 0 _0 4 0 2 _2 0 m i _l s h o rt

R _ I N _H P _ C

C5 5 9

6 8 P _ 5 0 V _0 4

R _ HP _ O UT _ C

L_ I N _ H P _ C

C5 5 8

6 8 P _ 5 0 V _0 4

L _ H P _O U T _ C

Z 2 91 3

Z 2 91 5

1U _ 1 0V _ 0 6

.1 U_ 1 6 V _ 0 4

. 1 U _1 6 V _ 0 4

G
A P U DG

S

Q 73
2 N 70 0 2 W

C
Q 74
D T C 1 14 E U A
E

5 VS

C8 9 6

5

.1 U_ X 7 R_ 0 4
R 5 95
1 0 K_ 0 4

1
4 Z 29 1 6

A MP _ E N #

2

3

C 87 9

D

10 0 K _ 0 4

B

C8 8 8

2. 2U _ X 5R _ 10 V _ 0 6

R5 9 4

10 K _ 0 4

C8 8 0

U3 8
74 A H C 1 G 0 8G W

C 8 97
1 U _1 0 V _ 0 6

AP UD G

A PUD G

1
2

8 5 2 0 4- 02 R
P C B F o o t p rin t = 8 5 2 0 4-0 2 R
C8

C8 7 1
R5 9 3

MU T E A P M #

1
20
10

28
26

H PVDD

C P-

R 59 2
1 0 0K _0 4
5 VS

2 4 S P K _ HP #

21

B YPASS

15
16

*0 _ 0 40 2 _ 1 0m i l _ sh o rt

25

Z 2 90 9

C P+
C PVDD

14

R 6 12

R _ HP _ O UT

P G ND

2008/03/24

A P UD G

A MP _ E N #
H P_ EN
L _ HP _ O UT

12

R _ O U T + _C

A PA20 56

C P G ND
P G ND

C5 5 0
2. 2 U _ X5 R _ 10 V _ 0 6
Z 2 90 8

R 2 91

R 28 6

Z 2 90 7
R2 8 5

L_ O U T +
L _ I N _H P

23

A MP _E N #

22

R_ O UT R _ IN_ H P

GN D

Z 29 1 4

J_SPK1
2
1
R_ O UT +

L _ O UT -

24

R 503

L _ I N _A MP

R5 5 1
1 0 K _ 04

* 10 K _ 0 4

*1 0 K _ 0 4

4 . 7 K _ 0 4 Z 2 9 02

R 28 4

* 1 0 K _ 04

R 28 7

R _ IN_ A M P

V DD
PVD D
P V DD

3

BEEP
S D#

R _ I N _A MP _ C

1U _ 1 0V _ 0 6

GN D

C 536

C near CP+ and CP-

B - 30 AUDIO AMP2056

. 1U _ 1 6V _0 4

Z 29 1 0

29

4 . 7 K _ 0 4 Z 2 9 01

*1 0 K _ 0 4

2 8 F R ON T -L

2 8 L _H P _ OU T _ A

C5 3 5

. 1 U _ 16 V _ 0 4

13
7

3

U 18
7 4 A H C 1 G0 8 GW

U3 4

2 8 R _ H P _ OU T _A

C 5 48

1U _ 1 0V _ 0 6

2

A P U DG
R 29 0

C5 6 5

10 0 K _ 0 4
MU T E A P M #

4

3 0 K B C _ MU T E #

2 8 F R ON T -R

R5 5 3

. 1 U _1 6 V _ 0 4

1

2

Sheet 29 of 47
AUDIO AMP2056

5V S

.
.

B.Schematic Diagrams

3 .3 V S

For Vista Audio fidelity test

Schematic Diagrams

KBC ITE IT8512E
K B C_ A V D D

L47
H C B 16 0 8 K F -1 2 1 T2 5 _ 0 6

C 507

C5 2 8

1 0 U _1 0 V _ 0 8

C5 2 5

. 1U _ 1 6V _0 4

C5 2 9

. 1 U _ 1 6 V _ 04

V D D3

.

V DD 3
C4 9 8

C 49 7

. 1 U _ 1 6 V _ 04

.1 U_ 1 6 V _ 0 4

R3 0 2

V DD 3

1 0 K_ 0 4

W DT _ E N

C 49 1

. 1 U _ 1 6 V _ 04

R 30 9

V D D3

R 312

P J1 3

* . 1U _ 1 6V _0 4
1 0 K _ 04

W D _ DIS A B L E

1 0 0 K_ 0 4

1

2

C5 0 8
1
. 1U _ 1 6V _0 4

24

J_KB1

R3 0 8
U 17

2 4 C P U_ F A N

76
77
78
79
80
81

SY S_ FAN

2 2 W L A N_ P W R
2 2 ,2 6 W L A N_ E N
1 3 V GA _A LE R T #
2 9 K B C_ M UT E #
B A T _ DE T
B A T _ V O LT _ R
C U R _S E N S E _R
T OT A L _ C U R _ R

R 2 28
1 0 K_ 0 4

66
67
68
69
70
71
72
73

E C _M OD E L _ I D
3 G_ D E T #
C C D _D E T #
M OD E L _I D

2 3 3G _ D E T #
2 4 C C D _D E T #

R 2 33

D
D
D
D
D
D

5
5
13
13

3 9 S MC _B A T
3 9 S MD _B A T
S M C_ C P U_ T HE RM
S M D_ C P U_ T HE RM
S M C _ V G A _T H E R M
S M D _ V G A _T H E R M

C4 8 3

28 B E E P

1 U _ 16 V _ 0 6

LOW ACTIVE

C_ B A T
D_ B A T
C_ C P U_ T HE R
D_ C P U_ T HE R
C _ V G A _ TH E R
D _ V G A _ TH E R

L CD _ B RIG HT N E S S
KBC _ BEEP

2 6 L E D_ S C RO L L #
26 L E D _ N U M#
2 6 L E D _ CA P #
2 6 L E D _ B A T _ C H G#
2 6 L E D _ B A T _ F U LL #
2 6 L E D_ P W R#
8 0 CL K
3 IN1
8 0 DE T #

1 9 PM E#
2 4 T P _C L K
2 4 TP _D A T A

85
86
87
88
89
90

18
21

3 1 P W R _S W #
1 6 , 1 9 , 2 6 LI D _ S W #

33

2 6 W EB_ W W W #

10 8
10 9

26 B T_ E N
1 6 BKL _ EN

M740J

M760J

M740K

3.3V

0V

?V

M760K

0/ G
1/ G
2/ G
3/ G
4/ G
5/ G

74

3
VBAT

AVC C

VST BY
VSTBY
VS TBY
VSTBY
V STBY
VST BY

PJ 0
PJ 1
PJ 2
PJ 3
PJ 4
PJ 5

IT8512E

DC
DC
DC
DC
DC
DC
DC
DC

0/ G
1/ G
2/ G
3/ G
4/ G
5/ G
6/ G
7/ G

F LF R A M E # / GP G2
F L A D0 /S C E #
F L A D 1 /S I
F L A D2 /S O
F L A D 3 / GP G6
F LC L K / S C K
( P D )F LR S T # / W U I 7/ T M / GP G0

GPIO

SMBUS
S
S
S
S
S
S

MC
MD
MC
MD
MC
MD

LK 0/ G
A T 0/ G
LK 1/ G
A T 1/ G
LK 2/ G
A T 2/ G

( P D )K S O1 6 / GP C 3
( P D )K S O1 7 / GP C 5

PB3
PB4
PC 1
PC 2
PF6 ( PU )
PF7 ( PU )

(
(
(
(
(
(
(

PWM
P
P
P
P
P
P
P
P

W M0 / G
W M1 / G
W M2 / G
W M3 / G
W M4 / G
W M5 / G
W M6 / G
W M7 / G

PA0 (
PA1 (
PA2 (
PA3 (
PA4 (
PA5 (
PA6 (
PA7 (

PU
PU
PU
PU
PU
PU
PU
PU

)
)
)
)
)
)
)
)

P
P
P
P
P
P

S 2C
S 2D
S 2C
S 2D
S 2C
S 2D

PD
PD
PD
PD
PD
PD
PD

)I D
)I D
)I D
)I D
)I D
)I D
)I D

0 / GP
1 / GP
2 / GP
3 / GP
4 / GP
5 / GP
6 / GP

H0
H1
H2
H3
H4
H5
H6

( P D )I D 7 / GP G1

EXT GPIO
( P D )E GA D / G P E 1
( P D )E G C S # / G P E 2
( P D )E G C L K / G P E 3

PS/2
F 0(
F 1(
F 2(
F 3(
F 4(
F 5(

PU
PU
PU
PU
PU
PU

( P D )W U I 5 / G P E 5
( P D )L P C P D #/ W U I 6 / G P E 6

)
)
)
)
)
)

PWM/COUNTER
( P D )T A C H 0 / GP D 6
( P D )T A C H 1 / GP D 7

WAKE UP

( P D )T M R I 0 / W U I 2 / GP C 4
( P D )T M R I 1 / W U I 3 / GP C 6

P W R S W / GP E 4( P U )

CIR

R I 1 # / W U I 0 / G P D 0( P U )
R I 2 # / W U I 1 / G P D 1( P U )

( P D )C R X / GP C 0
( P D )C TX / G P B 2

GP INTERRUPT

LPC/WAKE UP

G I N T / G P D 5( P U )

( P D )L 8 0 H L A T / G P E 0
( P D )R I N G #/ P W R F A I L #/ L P C R S T# / G P B 7

UART
R X D/G P B 0 ( P U )
T X D / GP B 1 ( P U )
I T8 5 1 2 E / I T 8 50 2 -J

I0
I1
I2
I3
I4
I5
I6
I7

4
5
6
8
11
12
14
15

KB
KB
KB
KB
KB
KB
KB
KB

-S I 0
-S I 1
-S I 2
-S I 3
-S I 4
-S I 5
-S I 6
-S I 7

4
5
6
8
11
12
14
15

36
37
38
39
40
41
42
43
44
45
46
51
52
53
54
55

K B -S
K B -S
K B -S
K B -S
K B -S
K B -S
K B -S
K B -S
K B -S
K B -S
K B -S
K B -S
K B -S
K B -S
K B -S
K B -S

O0
O1
O2
O3
O4
O5
O6
O7
O8
O9
O1 0
O1 1
O1 2
O1 3
O1 4
O1 5

1
2
3
7
9
10
13
16
17
18
19
20
21
22
23
24

KB
KB
KB
KB
KB
KB
KB
KB
KB
KB
KB
KB
KB
KB
KB
KB

-S O0
-S O1
-S O2
-S O3
-S O4
-S O5
-S O6
-S O7
-S O8
-S O9
-S O1 0
-S O1 1
-S O1 2
-S O1 3
-S O1 4
-S O1 5

1
2
3
7
9
10
13
16
17
18
19
20
21
22
23
24

CLOCK

0507

1

R E S E T#
VC C

Z 30 0 6 S

4

G ND

K B C _ S P I_ CE #
KBC _ SPI_ SI
KBC _ SPI_ SO

1U _ 10 V _ 0 6

A T 35 1 0 I GV -2. 93 -C -C -T 1

V DD 3

R4 8 9
R2 8 0
R2 8 9

1 0 K_ 0 4
4 .7 K_ 0 4
4 .7 K_ 0 4

C K3 2 KE
C K3 2 K

3.3V

R 23 8

10 K _ 0 4

S MC _ B A T

AC
D5 0
BAV9 9

VD D 3

*1 0 K _ 04

RX

A
C

S MD _ B A T

AC
D4 9
BAV9 9

B A T _ DE T

AC
D4 6
BAV9 9

B A T _ V OL T

AC
D4 7
BAV9 9

V D D3

Sheet 30 of 47
KBC ITE IT8512E

A
R2 2 7
R2 2 6

3 G_ D E T#
CC D_ D E T #

1 0 K _ 04
1 0 K _ 04

A
C 50 5
L P C _ C LK 1

R 2 55

*1 0 _ 0 4 P C L K _ K B C _ R
*1 0 P _ 5 0V _0 4

A

C 89 8

3 9 C U R _S E N S E

CU R_ S E N S E

AC
D4 8
BAV9 9

T OT A L _ C U R

AC
D2 3
BAV9 9

* 1 0P _ 5 0 V _ 0 4
39 T O TA L_ C U R

* 0_ 0 4 L A N _ D S P _ E C

LA N _ D S P _E C 2 7

A

B A T _ V OL T

C

CU R_ S E N S E

A

T OT A L _ C U R

R2 1 1
R2 1 5
R2 1 7

B A T _ V OL T _ R
C 4 69
CU R_ S E N S E _ R
*1 0 0 _ 04
C 4 78
T OT A L _ C U R _ R
*1 0 0 _ 04
C 4 82
1 0 0_ 0 4

1 U _1 0 V _ 0 6
1 U _1 0 V _ 0 6
1 U _1 0 V _ 0 6

0507
W L A N _ DE T # 2 2
B T _ D E T# 2 6
D D_ O N 3 1
3 G _E N 2 3

Z 30 0 3 R 25 2
Z 30 0 4 R 25 8

*0 _ 04 0 2 _ 5m i l _s h o rt
*0 _ 04 0 2 _ 5m i l _s h o rt

S MI # 1 9
S CI# 1 9

V D D3

P W R_ B T N# 1 9

N C3

N C _ 04

35
17

47
48

C P U_ F A NS E N

S Y S _ F A NS E N

119
123

Z300 2
R 59 6
L E D_ C T RL
C TX 0

0_04

V C OR E _O N
S B _ P W R GD

KBC_SPI_*_R = 0.1"~0.5"

U 36
S P I_ V DD

8

V DD

SI
SO

24
R 5 44

120
124

8Mbit

. 1 U _ 16 V _ 0 4

R S MR S T # 1 9to SB
K B C _ R S T# 1 9

1 K_ 0 4

K B C _F LA S H 3

W P#

33
1 6 , 1 9, 3 2

CE #
S CK

R 5 52

L E D _ CT RL 2 4

4 .7 K_ 0 4

H OL D #

7
HO L D#

5 K B C_ S P I_ S I_ R
R5 6 1
2 K B C_ S P I_ S O _ R
R5 1 3
1 K B C _ S P I _ C E # _R
R5 2 5
6 K B C_ S P I_ S C L K _ R
R5 5 5
4

K B C_ S P I_ S I
C8 8 6
K B C_ S P I_ S O
1 5 _ 1 % _0 4
C8 3 6
K B C_ S P I_ C E #
1 5 _ 1 % _0 4
C8 5 5
K B C_ S P I_ S C L K
47_04
C8 8 4
47_04

*3 3 P _ 5 0V _0 4
*3 3 P _ 5 0V _0 4
*3 3 P _ 5 0V _0 4
*3 3 P _ 5 0V _0 4

VSS

W 2 5 X 80 V S S I G
19

S W I # 19

112

C HA G _ E N

V DD 3

39

S P I_ V DD
J _ 8 0D E B U G1

2
128

C K 32 K E
C K 32 K
R2 7 8

X5
4
3
C 5 26
15 P _ 5 0 V _ 0 4

C9 2 8

VOLTAGE

C

C CD _ E N 2 4

107

82
83
84

HIGH

M OD E L_ I D

C

C LK R U N #
Z300 7
R 62 5
M C H _T S A T N _ E C
W D T _E N

MODEL_ID

V1.0

R 22 9

3 9 B A T _ V OL T

S U S B # 1 9 , 2 2, 31 , 3 2 , 3 6
S U S C # 19

93
94
95
96
97
98
99

VER.

C

K B C _ S P I _ S C LK

56
57

K B C_ W R E S E T #
C5 4 2

3 IN 1

3 9 BAT_ D ET

100
101
102
103
104
105
106

10 0 K _ 0 4
D
Q5 6
2 N 7 0 0 2W

W DI

2

. 1U _ 1 6V _ 0 4

C 8 70

WAKE UP

L K 0 / GP
A T 0 / GP
L K 1 / GP
A T 1 / GP
L K 2 / GP
A T 2 / GP

K B -S
K B -S
K B -S
K B -S
K B -S
K B -S
K B -S
K B -S

G

M R#

5

C

FLASH
PI0
PI1
PI2
PI3
PI4
PI5
PI6
PI7

58
59
60
61
62
63
64
65

?V

WEB0--->AP KEY
WEB1--->EMAILKEY
WEB2--->WWW KEY
1 6 B R I GH T N E S S

24
25
28
29
30
31
32
34

12 5

5 T H E RM _ RS T #

EC MODEL_ID

M
M
M
M

11 0
11 1
11 5
11 6
11 7
11 8

AC
AC
AC
AC
AC
AC

ADC
A
A
A
A
A
A
A
A

* 1 0K _0 4
SM
SM
SM
SM
SM
SM

26
50
92
1 14
121
1 27

11

DAC

Z3008

V D D3

E C S C I # / GP D 3 ( P U )
E C S M I # / GP D 4 ( P U )

. 1 U _ 1 6 V _ 04

KSI0 /ST B#
K S I1 /A F D#
K S I 2/ I N I T #
K S I 3/ S LI N #
KSI4
KSI5
KSI6
KSI7

K S O0 / P D 0
K S O1 / P D 1
K S O2 / P D 2
K S O3 / P D 3
K S O4 / P D 4
K S O5 / P D 5
K S O6 / P D 6
K S O7 / P D 7
K S O8 / A C K #
K S O 9/ B U S Y
K S O 1 0/ P E
K S O1 1 / E R R #
K S O 1 2/ S L C T
K S O1 3
K S O1 4
K S O1 5

G A 2 0 / GP B 5
K B RS T # /G P B 6 ( P U )
P W U R E Q# / G P C 7( P U )
L 8 0 L LA T/ G P E 7 ( P U )

3

J _ KB2
8 52 0 2 -2 40 5 1
C5 6 3

K/B MATRIX

AVSS

23
15

2 6 AP_ KEY #
2 6 W EB_ EM AIL #

LPC

W RS T #

Z 3 00 5

FOR M740J/K

J _ KB1
*8 5 20 2 -2 4 05 1

J _ SPI2
S P I_ V DD
K B C _ S P I _ C E #_ R
K B C _ S P I _ S O _R

* 1 0M _ 04

75

12 6
4
16
20

1 9 GA 2 0
1 3 , 39 A C _ I N
2 6 L E D_ A C IN#
5 , 1 9 T H E R M_ A L E R T#

L AD 0
L AD 1
L AD 2
L AD 3
L P C CL K
L FR AM E#
S E RIR Q
L P C R S T# / W U I 4 / GP D 2 ( P U )

VSS
VSS
VS S
VSS
V SS
VSS
VSS

14

2 0 m il

3 2. 7 6 8 K H z
1
2

1
3
5
7

2
4
6
8

K B C _S P I _ S C L K _ R
K B C _S P I _ S I _ R

* S P N Z -0 8S 3-B -C -0 -P

1 5 P _ 5 0V _0 4

2
10

3 IN 1
8 0 CL K
8 0 D E T#

8 5 2 05 -0 5 0 01
11/14

J_SPI1
C 5 22

1
2
3
4
5

1
9
J_ H 8D B G 1

. 1U _ 1 6V _ 0 4

R 2 36
* 0 _ 04 0 2 _ 5m i l _s h o rt
C 4 85

L CD _ B RIG HT N E S S

J_H8DBG1
1
2

N C1

NC _ 0 4

FOR IT8512E R620 --> 0
FOR IT8502-J R620 --> 0.1UF

10

9

W DT _ E N

3 IN 1

2
4
6
8
10

1
3
5
7
9

V DD 3
8 0C L K
8 0D E T #

* S P U F Z -1 0 S 3 -V B -0 -B

*. 1 U _1 6 V _ 0 4
K B C _ A GN D

KBC ITE IT8512E B - 31

B.Schematic Diagrams

Z 3 0 01
* 0 _0 4 0 2 _5 m i l _s h o rt
K B C _ W RE S E T #

FOR M760J/K

1
12
27
49
91
1 13
122

10
9
8
7
13
6
5
22

L P C _C L K 1

VC C

U1 4
1 8 L A D0
1 8 L A D1
1 8 L A D2
1 8 L A D3
1 8 L P C _ C LK 1
1 8 L F R A ME #
18 S E R I R Q
1 8 , 2 2 , 2 5, 2 7 B U F _ P L T _R S T #
R 24 7

R3 1 1

K B C _ A GN D

3 .3 VS

C9 2 7

W D _D I S A B L E

1 0 K_ 0 4

Schematic Diagrams

1.8VS, 3,3VS, 5VS, 1.1VS, 3.3V
PD 2 0
C

A

V A

V IN1

F M 0 54 0 -N

A

C

V IN

SY S5 V
PQ 3 4

PR1 7 2

V DD 3

1 0 K _ 06
E

P D2 7

2 S B 1 1 9 8K R
C Z 3 10 1

F M0 5 4 0 -N

A

C
R5 5 9

To H8

P D2 3

F M0 5 4 0 -N

SUS B
Z3102
G
PQ 3 1
2 N 70 0 2 W

D

S

D

Z3104
P R1 6 6

1 0 K_ 0 6

From H8

19 , 2 2 , 3 0 , 3 2, 3 6 S U S B #

2 N 7 0 0 2W
R 54 5

30

30 p _ 5 0V _0 6
OP E N -3 m m
2

S

. 1 U _ 50 V _ 0 6

C

1 0 0K _0 4

P Q3 3
D T A 1 1 4E U A

POWER CONN.

SW 8
* TJ G -5 33 -S -V -T / R
1
2
3
4

DEBUG USE

SY S5 V

5
6

R5 6 6

2008/03/28

1 0K _0 4

D D_ O N#

SY S1 5 V

R 5 36

Q 61
S I 48 0 0
8
7
6
5

2 0 0 K _ 1% _ 0 4

V DD 3

1 .8 V S

5A

3
2
1
4

C 8 60

SYS1 5 V

R2 3 0

C 85 9

Q2 9
S I 4 8 00
8
7
6
5

68 0 K _ 1 % _ 04
. 1 U _1 0 V _ 0 4

D D _ ON # 3 2, 3 5 , 3 6

D

NM OS

N MO S
1 .8 V

5A

3 .3 VS

3
2
1
4

D D _O N

3 0 D D _ ON

Q7 2
2 N 7 0 0 2W

G

C8 8 9
. 1 U _ 1 0V _0 4

S

Sheet 31 of 47
1.8VS, 3,3VS, 5VS,
1.1VS, 3.3V

J3

S

D D_ O N

C8 8 5

G

S USB #

1 0 0 K _ 04

B

C4 6 3

R 56 7
C 46 1

. 1U _ 1 0V _0 4

1 0 0K _0 4

1 0 U _ 1 0 V _ 08

1 0 U _ 1 0 V _ 08

Z3108

Z 3 11 1

C 489
22 0 0 p _5 0 V _ 0 6

SU SB

S US B

S

G

S

G

Q3 1
2 N 7 0 0 2W

D

D

Q 57
2 N 7 00 2 W

C 86 7
2 2 0 0p _ 5 0 V _ 0 6

EMI

5V S

NM O S
1 .1 V
S YS1 5 V

R3 6 5
1M _ 0 4

1 .1 VS

8A
C1 1 5

C 74

. 1U _ 1 0V _0 4

1 0 U _6 . 3 V _ 0 6

V D D5
S Y S 1 5V

R2 3 7
1 0 0K _1 % _ 0 4
Q4 3
2 N 7 0 0 2W

5A

5V S

C4 6 2

C4 6 0

.1 U_ 1 0 V _ 0 4

1 0U _ 1 0V _0 8

P C 1 91

P C 1 90

P C2 3 8

*. 0 1 U _5 0 V _ 0 4

PC 6 4

.0 1 U_ 5 0 V _ 0 4

P C2 5 5

*. 0 1 U _5 0 V _ 0 4

P C 2 09

.0 1 U_ 5 0 V _ 0 4

P C3 7

. 0 1 U _ 5 0 V _ 04

PC 8 9

* . 0 1U _ 5 0V _0 4

P C6 2

*. 0 1 U _5 0 V _ 0 4

P C 1 00

* . 0 1U _ 5 0V _0 4

P C2 1 0

. 0 1 U _ 5 0 V _ 04

PC 9 7

* . 0 1U _ 5 0V _0 4

P C6 7

*. 0 1 U _5 0 V _ 0 4

PC 4 3

.0 1 U_ 5 0 V _ 0 4

P C2 4

. 0 1 U _ 5 0 V _ 04

P C8 8

*. 0 1 U _5 0 V _ 0 4

* . 0 1U _ 5 0V _0 4

. 0 1 U _5 0 V _ 0 4

Z3 11 2
SU SB

G

Q 30
SI4 8 0 0
8
7
3
6
2
5
1
4

Q 32
2 N 70 0 2 W

D

D

3. 3V

. 0 1 U _5 0 V _ 0 4

N MO S

Z 3 11 3

C 595
22 0 0 p _5 0 V _ 0 6

3 .3 VS

PC 5 2

Q4
A O4 4 5 6
8
7
3
6
2
5
1
4

C4 9 4
2 2 00 p _ 5 0V _0 6

5V
PC1 1 5

S US B

G
S

S

* . 01 U _ 50 V _ 0 4
1. 8V S

N MO S
S YS1 5 V

VD D3

Q 54
S I 4 80 0
8
7
6
5

R4 8 6

NM OS
3. 3 V

S Y S 15 V

5A

3
2
1
4

Power Plane

V D D5

R4 8 5

Q5 3
S I 4 8 00
8
7
6
5

1 M_ 0 4

PC 6 3
5V

3
2
1
4

Power Plane

1M _ 0 4

D
C 766
22 0 0 p _5 0 V _ 0 6

. 01 U _ 50 V _ 0 4
PC 4 6

P C8 7

P C 1 21
D

Q5 1
2N 7 0 02 W

C7 6 5
2 20 0 p _ 50 V _ 0 6

G

D D_ O N#

D D _ ON #
S

1

G

Q5 2
2 N 7 0 0 2W

J2

2

O P E N -3 mm

B - 32 1.8VS, 3,3VS, 5VS, 1.1VS, 3.3V

5A

* . 0 1 U _ 5 0 V _ 04
Z 3 1 07

Z 3 10 6

S

B.Schematic Diagrams

P R 1 73

M_ B T N #

Q6 7

G D D_ O N
P R 1 74

2 0 0 K _ 06
P C 20 5

2 4 M_ B T N #

PQ 3 0
2 N7 0 0 2 W

G

Z3105
Z 3 1 14
E

S U S B 3 2 , 3 5, 3 6 , 3 7

Z3 10 3

1 0 K_ 0 6

D

P C 2 15
. 1 U _5 0 V _ 0 6

P R 16 8

1

VIN

EC

P R 16 7
1 00 K _ 0 4

S

D

PQ 3 2
2 N7 0 0 2 W

B

1 0K _0 4
PW R _ SW #

3 0 P W R _S W #

* . 0 1 U _ 5 0 V _ 04

*. 0 1 U _5 0 V _ 0 4

Schematic Diagrams

VGA POWER & POWER GD
5V
5 VS

R 5 65
1 0 0 _1 % _ 0 6

1 M_ 0 4 + K

C 2 51

. 1U _ 1 0 V _ 04 + K

1 0 U _ 1 0 V _ 0 8 +K

2 .5 V S

R 5 62
1 0 0 _1 % _ 0 6

Z 32 1 0

Z 32 1 1

D

1A

C2 5 2

R 563
1 0 0 _ 1 % _0 6
Z3205

Q 71
2 N 70 0 2 W

R5 5 6
1 00 _ 1 % _ 0 6

Q 68
2 N 70 0 2 W

G
S

G

D D _ ON #

3 1 , 3 5 , 36 D D _O N #

Q 63
2 N 7 0 02 W

G

S

D

Z3204
Q6 0
2N 7 0 02 W

G

S

R1 3 0

D

S Y S 1 5V

R5 3 4
10 0 _ 1 % _0 6

3 . 3 V S _V GA

S

Q 19
S I 48 0 0 + K
8
7
3
6
2
5
1
4

D

NM O S
3 .3 V

3 .3 V

3 .3 VS

Z3 2 06

C2 5 5
2 2 00 p _ 5 0 V _ 04 + K

D

Q2 2
2N 7 0 02 W +K
G

E X T _ V GA _P OW E R _ O N #

Q5 9
2 N7 0 0 2 W

G

SU SB

3 1 , 3 5, 36 , 3 7 S U S B

1 .5 VS

2 .5 VS

S

1 .8 VS

S

D

Z3201

3 .3 VS

? ?

R5 5 4
1 00 K _ 0 4

PIN ? ? GPIO PIN
R 533
1 0 0 _ 1 % _0 6

2.5V POWER GOOD

U 37
5
2

Z 3 2 09

CPU_VCORE & VDD_NB

1 . 8 V S _V GA

Q 20
S I 48 0 0 + K
8
7
3
6
2
5
1
4

R1 2 9
1 M_ 0 4 + K

6A
C1 8 4

. 1U _ 1 0 V _ 04 + K

10 U _ 10 V _ 0 8 + K

D

Z3202

C2 5 4
2 2 00 p _ 5 0 V _ 04 + K

33 , 3 4 P W R G D _ V C O R E

Q2 1
2N 7 0 02 W +K
G

R 1 71

22_04

R 1 70

22_04

R1 7 7

Z3 2 13

* 0 _ 04 0 2 _ 5 m li _ s ho rt

S B_ P W RG D 1 6 ,1 9 ,3 0

R 269
2 0 K_ 0 4

C3 6 9
S Y S _ RS T #

S

*2 . 2 U _6 . 3 V _ 0 6
R 6 10

3 6 1 .2 VS _ PG

? ?

Sheet 32 of 47
VGA POWER &
POWER GD

3 .3 V

1 . 8V S
3 6 1 .1 V _ P G

E X T _ V GA _P OW E R _ O N #

33

74 A H C 1G 0 8 GW

3 .3 VS

R1 6 9
1 0K _ 04

C2 2 5

CP U_ V D D_ E N

1
3

19 , 2 2 , 3 0 , 3 1, 36 S U S B #

Q 58
2 N 7 0 02 W

G

S

1 .8 V
S Y S 1 5V

Q6 4
2N 7 0 02 W

G

Z3208

S

NM O S

D

D

4
Z3207

PIN ? ? GPIO PIN

S Y S _ RS T #

1 9 , 2 2, 3 0 , 3 1 , 3 6 S U S B #

22_04

D 16
C

R B 75 1 V
A

D 17
C

R B 75 1 V
A

1 .8 VS

S YS_ R ST# 1 9

C 520
R 1 73
3 0 0 _0 4

U 9

. 1U _ 5 0V _0 6

5
2
4
R 182

* 0 _ 04 Z 3 21 4

NB _ P W RG D_ IN

1
3

10

*7 4 A H C 1 G 08 G W

NM O S
1 .1 V

1 . 1 V S _V GA

Q 3
S I 48 0 0 + K
8
7
3
6
2
5
1
4

S Y S 1 5V

R3 6 7
1 M_ 0 4 + K

3A

19

C4 8

C9 5

. 1U _ 1 0 V _ 04 + K

10 U _ 10 V _ 0 8 + K

1 .8 V S _ V GA

D

Z3203

C5 9 9
2 2 00 p _ 5 0 V _ 04 + K

Q4 4
2N 7 0 02 W +K
G

R 172
* 0 _ 04 0 2 _ 5 m li _ s ho rt

EMI

P C 2 5 * . 0 1U _ 5 0V _ 04
E X T _ V GA _P OW E R _ O N #
P C 3 6 * . 0 1U _ 5 0V _ 04

S
S YS5 V

R1 8 3
* 0 _ 04 0 2 _ 5 m li _ s h ort

W D_ P W RG D

? ?

PIN ? ? GPIO PIN

R 1 86
1 0 K _ 0 4 +K
H 31
2
3
4
5

D

E X T_ V GA _ P O W E R _ ON # 3 7

P E _ GP I O1

M T H3 1 5 D1 1 1

Q 28

C3 8 4

2 N 70 0 2 W + K

. 1U _ 1 0 V _ 04 + K

2
3
4
5

H 37
9
8
7
6

1

2
3
4
5

M T H3 1 5 D1 1 1

H 14
9
8
7
6

1

2
3
4
5

M T H3 1 5 D1 1 1

H 18
1

9
8
7
6

M T H3 1 5 D1 1 1

2
3
4
5

H 29
1

M T H3 1 5 D1 1 1

9
8
7
6

H 23

2

9
1

5
M T H 3 1 5 D 11 1 _ N 3 4 6 7 8

2
3
4
5

H 39
9
8
7
6

1

M T H3 1 5 D1 1 1

2
3
4
5

H 38
1

9
8
7
6

M T H3 1 5 D1 1 1

2
3
4
5

H 17
9
8
7
6

1

H1 3

2
3

9
8

2
3
4
5

1

M T H3 1 5 D1 1 1

M T H3 1 5 D1 1 1 _ N4 5 6 7

H 7
C 2 37

H 3
C 237

9
8
7
6

1

H1
C1 9 7 NP

MT H 3 15 D 1 11

G
S

1 8 P E _ GP I O1

H 35
9
8
7
6

1

R 1 88

H1 2
H1 1
H 41
C 1 5 8 D 1 5 8 C 1 5 8 D 1 5 8 C 1 58 D 1 58

H4 0
H2 1
H 34
C 1 5 8 D 1 5 8 C 2 7 6 D 1 4 6 C 2 76 D 1 46

H3 3
H1 9
H 27
C 2 7 6 D 1 4 6 C 2 3 7 D 1 1 1 C 2 76 D 1 86

H 24
C 2 76 D 1 86

H 25
H 20
H2 2
C 2 76 D 1 86 C 2 7 6 D 1 4 6 C 2 7 6 D 1 4 6

H1 5
C 6 7 D 67

H 36
C 6 7D 6 7

H 26
C 2 7 6 D1 8 6

H 6
C 237

H2
S M D 7 9 X 17 7 R N P

H4
C2 3 7

H 10
C 2 37

H9
C2 3 7

H 8
C 237

H 16
C 31 5 B 2 1 7 D 1 1 1

1 0 0 K _ 0 4+ K

M3
M-M A R K 1

M1 4
M- MA R K 1

M5
M -MA R K 1

M8
M-M A R K 1

M2
M- MA R K 1

M7
M -MA R K 1

M1 1
M-M A R K 1

M1
M- MA R K 1

M 13
M -MA R K 1

M1 0
M-M A R K 1

M9
M- MA R K 1

M 12
M -MA R K 1

M6
M-M A R K 1

M4
M-M A R K 1

H 42
C 1 18 N P

H 43
C 1 18 N P

H 44
S M D 9 8 X 1 7 8R N P

H 30
H3 2
H 28
H 5
C 2 7 6 D 1 4 6 C 2 7 6 D 1 4 6 C 2 76 D 1 46 C 2 9 6 D 1 6 6

VGA POWER & POWER GD B - 33

B.Schematic Diagrams

R5 5 8
10 0 _ 1 % _0 6

Schematic Diagrams

VCORE VDD CORE
PR1 5 2
P R 14 7

5V

E N _ V CO RE

10 K _ 0 4

C P U _V D D 0_ R U N _ F B _ H

C P U _ V D D 0 _ R U N _ F B _H

5

PC1 8 5
2 2 0 P _ 50 V _ 0 4

D

0 _ 04
1 00 K _ 0 4

R SN 1

C P U _V D D 0_ R U N _ F B _ L

P Q 28

K B C V R ON

Z 3 3 01

G

PR1 5 3

C P U _ V D D 0 _ R U N _ F B _L 5

3 48 _ 0 6

2

2 N 7 0 02 W
D

S

3 0 V CO RE _ O N

P R1 5 0

3 48 _ 0 6

R SP1

E N _ V C OR E 3 4

P R 14 6

PR 1 4 8

PJ 9

PR 5 1
C SP1

P Q 27
2 N 7 0 0 2W

G

P C6 0

1 0 K _ 1% _ 0 6

S

*1 M_ 1 % _ 04

Z 3 3 07

3m m
1

3 2 C P U_ V D D_ E N

P C1 8 7

P R 1 51

PC 1 8 6

P R1 4 9

5 . 6 K _ 1 %_ 0 6

0 . 1 U _5 0 V _ 0 6

2 . 2 _ 1 % _0 6

10 0 P _ 5 0 V _ 04

. 1 U _5 0 V _ 0 6
3. 3V S

VERY IMPORTANT

CS N1

PWR_OK signal shoukd not be
accidentally de-asserted due to noise
or induced glitches. To avoid any

5 , 34 C P U _P W R G D _ S V I D _ R E G

parasitic de-assertion, the use of an
RC filter is mandatory

C P U _ P W R GD _ S V I D _ R E G

P R4 7

P C5 8

* 1 00 K _ 0 4

6 8 0 0 P F _ 5 0V _0 6

P R 49

2 00 _ 0 6

P C5 7
1 0 0 0 P _ 50 V _ 0 6

PQ 2 4
I R F 7 41 3 Z P B F

P C1 7 5

P C1 7 6

PC 4 0
+

< VA L UE>

< VAL U E>

1 5 U_ 2 5 V _ D2

P T H3
2

C P U _V D D 0

D
D
D
D

1U _ 10 V _ 0 6
PQ 2 2
I R F 7 41 3 Z P B F

P C1 7 2

P C1 7 1

P C 44
+

P C2 6 0

< VA L UE>

< VAL U E>

1 5 U _ 2 5V _D 2

C A R 4 00 L 1 6 M

1

C P U _V D D 1

2
G
S
S
S

F M 05 4 0 -N
PC1 8 0
. 2 2U _ 1 6V _ 0 6
H DR 2
L X2

. 5 6 U _ 1 0 *1 0 *4 . 1

C
PD 7
F M 5 82 2

1 0 0 K _ 06

Z 3 31 2

3 3 0U F _ 2 . 5V _D 3

3 3 0 UF _ 2 .5 V _ D3

4
3
2
1

L DR 2

4
3
2
1

PC1 6 9
1 00 0 P _ 5 0V _0 6

3 2, 3 4 P W R G D _ V C OR E

PR4 0

P R 1 38

CP U_ V D D1

Z 3 3 10

PR 3 9

5 . 6 K _ 1% _ 0 6
PC 1 7 9

V IN

1 0 K _ 1% _ 0 6
P R1 3 7

C LO SE TO P D7

P C4 8
PC5 0

. 1U _ 5 0V _ 0 6

2 . 2 _ 1 % _0 6
P C 1 6 2 * . 0 1U _ 5 0V _0 4

1 0 0 0 P _ 50 V _ 0 6
1 00 P _ 5 0 V _ 04
CSN 2
PC 5 1

output voltage offset
setting resistors
P R1 5 4
RS N1

6 80 0 P _ 5 0V _0 6

Single point ground connection

VR EF

P R1 3 9
RS P 2

34 . 8 K _ 1 % _0 6
P R1 4 1

6-13-34821-28B

PR1 5 5
* 0 _0 6 0 3 _3 2 m i _l s h or t

P C 1 81
2 2 0 P _ 5 0V _0 4

RS N2

C P U_ V D D1 _ RU N_ F B _ H

C P U _ V D D 1 _R U N _ F B _ H

34 8 _ 0 6
P R1 4 0

34 . 8 K _ 1 % _0 6

Signal Ground

Power Ground

RS N 2

C P U_ V D D1 _ RU N_ F B _ L
34 8 _ 0 6

B - 34 VCORE VDD CORE

EMI
P C 3 1 * . 0 1U _ 5 0V _0 4

C SP2
27 . 4 K _ 1 % _ 06

C P U _ V D D 1 _ R U N _ F B _L 5

5

P C1 5 7
+

P C3 9
+
* 47 0 U _2 . 5 V _ D

A

G
S
S
S

PR 4 2

P C 16 6
+

1
2

P Q 21
A O4 4 56

D
D
D
D

D
D
D
D

P Q 23
A O 4 4 56

PT H 2

1 0_ 0 8 2

2

5
6
7
8

5
6
7
8

CP U _ V DD 1
P R 1 36

1

P L7

18A
1

A

Rth1 and Rth2 must be placed as close as
possible to L1 respectively L2, preferably
on the same side of the PCB. Sensing lines
towards the controller can be routed on
internal layers to provide shielding from
the inductors' noise

2

PD 1 4
BST2 C

1

5
6
7
8

CLO SE TO P D4

1. 9 1 K _ 0 6

P R1 4 3
10 K _ 0 6

2

C
A

G
S
S
S
4
3
2
1

4
3
2
1
P C1 8 2

Z3 30 9

3 .3 VS

PR4 1
* 0_ 0 4 0 2_ 5 m i _l s h or t

P C4 1
+

1 0 0 0P _5 0 V _ 0 6
LD R 1

V F I X _ OZ 8 3 8
P W R GD _ V C O R E

P C4 2
+

3 3 0U F _ 2 . 5 V _ D 3 * 47 0 U _2 . 5 V _ D
2

33 0 U F _2 . 5 V _ D 3
2

5
6
7
8
D
D
D
D

P C 17 7
+

. 5 6U _ 10 * 10 * 4. 1

Z3 31 1
PC 1 8 4

F M 5 82 2
PQ 2 5
A O 4 4 56

PL 8

10_08

1

4
3
2
1
5
6
7
8
D
D
D
D

BST 1

A
F M 05 4 0 -N

G
S
S
S

P C4 9

PR1 4 5
PD 8

4
3
2
1

Z3 30 4

RS N 2
R SP2

C

C PU_ S V C

5, 3 4 C P U _ S V C

P Q 26
A O4 4 56

P D1 5

P R 14 4
2 . 2 _ 1 % _0 6
Z3 30 8

P R 14 2 2 . 2 _1 % _ 0 6

16
15
14
13
12
11
10
9

1
2
3
4
5
6
7
8

33

O Z838

LX 1
BST1
L D R1
G ND P
VDD P
L D R2
BST2
LX 2

18A
1 00 K _ 0 6
C P U_ V D D0

P C 18 3
. 2 2 U _ 1 6 V _0 6

G
S
S
S

RSN 1
R SP1
G ND A

C O MP V 1
V DD A
V RE F
TS E T
IL IM
SVD
SVC
C O MP V 2

. 01 U _5 0 V _ 0 6

10 0 0 P _ 50 V _ 0 6 P C 5 3

2 0 . 5 K _ 1% _ 0 6

C SP1
C S N1
Z3313
Z3303

RS N1
R SP1
SC
CSP 1
C S N1
EN
P W R_ O K
H DR 1

1U _ 1 0V _ 0 6

P R 45
43 . 2 K _ 1 % _0 6

PR 4 3

PC5 5
. 1U _ 2 5V _0 6

C PU_ S V D

5, 3 4 C P U _ S V D

25
26
27
28
29
30
31
32

IL IM

TSE T

VR EF
P C5 6

P J8
3m m

PR4 4

. 22 U _ 16 V _ 0 6

2

5 1 K _ 1 % _ 06

PR 4 6
2 . 49 K _ 1 % _ 06

5 1 K _ 1 % _0 6

16 . 2 K _ 1 % _ 06

P R5 0

SC
P R5 2
3 .3 VS

PU 6

RS N2
R SP2
VF IX
CS P 2
C SN2
VIN
P G
H DR 2

V D DA

C SP2
C S N2
Z 3 30 5
Z3306

. 0 1 U _ 5 0 V _0 6

22 _ 0 6

H DR 1
L X1

24
23
22
21
20
19
18
17

PC 6 1

P C5 9

1

G
S
S
S

Z3302
PR4 8

1

Sheet 33 of 47
VCORE VDD CORE

1

5V

1

0_06

2

PR2 0 8

V IN
5
6
7
8

*. 1 U _ X 7 R _ 1 0 V _ 06

D
D
D
D

E N _ V C OR E

1

B.Schematic Diagrams

V IN
P C 2 61

Schematic Diagrams

VCORE VDD CORE

VERY IMPORTANT
PR33
CPU_PWRGD_ SVID _REG

5,3 3 CPU _PWR GD_SVID_REG

P WR_O K si gnal shou kd n ot b e ac cide ntal ly
d e-as sert ed d ue to noi se o r in duce d gl itch es.
T o av oid any paras itic de- asse rtio n, t he u se

Z34 02
200 _06

o f an RC filt er is man dato ry
PC163
1 000P_50 V_ 06

EN_ VC ORE

3 3 EN_ VCO RE

5V

VIN

1

CPU_SVD

5,3 3 C PU_ SVC

CPU_SVC

29

D
D
D
D


CPU_ VDD NB

*10_0 8

PD1 3

A
LD R_NB

1

Sheet 34 of 47
VCORE VDD CORE

PC16 7
+

2 20U_4 V_ D *22 0U_4V_D

PC3 5
1 00K_06
*100 0P_ 50V_06

4
3
2
1

FM05 40-N

2

PC16 8
+

PTH 1
Z3406

2

FM582 2

1

1 .5U_ 7*7*3.5

1

C

PR 34

CPU_VDDNB

2

2

4
3
2
1
5
6
7
8
D
D
D
D

PQ20
AO4 468

A

C

3A

PL6

PD6
G
S
S
S

BST_NB

PC165

*15U_ 25V_D2

1

PC 33
.22 U_16 V_0 6
14
13
12
11
10
9
8

HDR
LX
BST
LDR
GNDP
VDDP
NC

PC32
+

2

G
S
S
S

CSP_ NB
C SN_ NB

RSP_ NB
GND A

I LIM_NB

OZ839

PC 164
1 U_10V_0 6

CLOSE TO PD8

PR12 9
Z3 403
PR30

5. 23K_1%_0 6
PC 159

PR1 30

PR133

3.9 K_ 1%_ 06
CSP_NB

Z3405

PC156
100 0P_50V_0 6

5,3 3 C PU_ SVD

PR24

.1U_ 25V_06

2
PJ7

RSN
COMPV
VD DA
VR EF
TSET
ILI M
SVD

6 8.1 K_ 1%_ 06

25. 5K_1%_06

PC1 55

51 K_ 1%_ 06

3mm

2. 49K_1%_06

.22U _16V_06

3. 3VS

51 K_1 %_ 06

PC154

SC_NB

TSET_NB

PR2 5

16.2 K_ 1%_ 06

PR1 21

RSP
SC
CSP
CSN
NC
EN
PWR_ OK

22
Z3401
23
VDDA_NB 24
25
26
27
28
PR1 25

VREF_ NB

PR1 22

PU1

HDR _NB
LX_NB

SVC
NC
VFIX
VIN
GNDA
PG
NC

1U_ 10V_06

Z34 04

PC1 53

21
20
19
18
17
16
15

.0 1U_50 V_ 06

PC152

PQ19
AO4 468

1
2
3
4
5
6
7

PR 123
22_0 6

R SN_ NB

1

5
6
7
8

VIN

PC15 8

. 15U_1 6V_06

CSN_NB
1 00P_50V_0 4

3.3 VS

2. 2_1%_0 6
PC161
68 00P_50 V_ 06

PR3 2
1.91 K_ 06

VFI X_OZ839

PR28
CPU_VDDNB_R UN_FB_ H

RSP_NB
PR3 1

32 ,33 PWRGD_VCOR E

0_04
PC 30

CPU_VDDNB_RUN _FB_H 5

40 .2_ 06

PR132
1000 P_ 50V_06

VIN
PR13 1
10 K_ 06

output voltage offset
setting resistor
PR1 24
RSN _NB

RSN_ NB
2 7.4 K_1 %_ 06

CPU_VDDNB_R UN_FB_ L

PC16 0

CPU_VDDNB_RUN _FB_L 5

PR 26
40. 2_06

1 000P_5 0V_ 06
VREF_ NB

4.02 K_ 1%_ 06

Single point ground connection
PR 120
*0_06 03_3 2mil_s hort

Signal Ground

Power Ground

VCORE VDD CORE B - 35

B.Schematic Diagrams

5V

Schematic Diagrams

1.8V, 0.9V

VIN

5V

3
. 3V

PR56

3

7
VDDQS

PR55

Z3502

2

Z3503
Z3504

6
8

Z3505

9

TON

FB
REF

BST

COM
P
10_06

Sheet 35 of 47
1.8V, 0.9V

Rb

10_06

PR59
10K_1%_06

PC83
DH

*.1U_2
5V_06
Z3506 10

Z35
08

VCCA
PC198

.068U_50V_06

10_06

1000P_50V_04

4

VSSA

1

Z3509 14
15

1.5A
1

PJ1
2

OPEN_3A
PR53

PC70

PC71

PC74

12
13

+

1
20
K_1%_06

4.7U_10V_X5R_08

4.7U_10V_X5R_08

*150U_4V_B

VTTEN

. 1U_50V_06

PL9
VDDQ

4

8
PQ36
AO4456

8A
PC77
+

PD26

PC84

18
16
17

PC194

PC195

.1U_16V_04

.01U_50V_04

*220U_4V_D2

PR60
VSSA
*0_0603_32mil_short

SC486
VDDQ
PC73

PC72

*4.7U_10V_X5R_08

1. 8V

1U_10V_06

EMI
PC248*.01U_50V_04

PR160

47K_04

1. 8
VEN
PC188. 01U_50V_04

D

5V

PC202
PQ29

DD_O
N#

.1U_16V_X7R_06

G
2N7002W

PC45 *.01U_50V_04

S

31,32,36 DD_O
N#

4.7U/10V/X5R/0805:6-08-4752L-2C0
1U/10V/0603 :6-07-1059L-7G0

PC189*.01U_50V_04

PR161
PC69 . 01U_50V_04

VTTEN

5V
D

47K_04

PR179
31,32,36 DD_O
N#

PC206

PR178
31,32,36,37 SUSB
*0_04

F unction Design

PQ41

PC244*.01U_50V_04
.1U_16V_X7R_06

Z3510G
S

2N7002W
0_04

O.C.P

10 uA * R (I li m) = O CP * R ds (o n)
10 uA * 4 .7 K = OC P * 4m oh m( IR F7 83 2)
OC P = 10 uA *4 .7 K / 4m oh m
OC P = 11 .7 5A

B - 36 1.8V, 0.9V

2
OPEN_8A

1U_10V_06
PG
ND1
PG
ND1
PG
ND2

PJ10
1

PC78
+

220U_4V_D2

FM5822

5V

VDDP1

VDDP2
VDDP2
EN/PSV

PC263
*15U_25V_D2

2.5U_7*7*3.5

19 Z3515

20

11

VI N
+

0501

4.7K_1%_06
22 Z3514

VSSA
VTT
VTT

PC230

*4.7U_25V_X
5R_08

8
PQ35
AO4474

PR158
21 Z3513

DL

1U_10V_06

PC232

4.7U_25V_X5R_08

ILIM

PC200
LX

1U_10V_06

0.9V

VTTS

5

Z3507
PR54

PC80

PC86

PC2
33

1
2
3

PR57

PR159
24 Z3511
Z3517
*0_0603_32mli_short
PC199
.1U_10V_X7R_04
PR162
23 Z3512
4
Z3516
*0_0603_32mli_short

1

1
U_10V_06

2

1U_10V_06

1.8V_PWRGD

1

PR58
2K_1%_
06

PGD

2

PC201

1

PC79

2

B.Schematic Diagrams

100P_50V_
04

Ra

A

PC85

5
6
7

Z3501

1
2
3

10_06

C

PR165

*100K_04

FM
0540N

PU2

2

10_06

C

PR163

1M
_06

PD9

Vout = 1.5V ( 1 + Ra / Rb )

5
6
7

PR164

A

VDDQ

1.8V

Schematic Diagrams

1.1VS, 1.2V, 1.2VS, 2.5V
VIN

5V
3. 3 V

Z 3 6 01
PR 9 4
* 0_ 0 6 0 3 _3 2 m i _l s h o rt

PR 9 5

10 _ 0 4

Z 3 6 11

PC 1 2 3

1 U _ 10 V _ 0 6

PR 1 0 5

PR 5

10 _ 0 4

Z 3 6 12

PC 1 4 0

1 U _ 10 V _ 0 6

* 1 0K _0 4

1 .1 V_ PG

PC 1 4

PC 2

P C1 3

PD 5
3 .3 VS

PR 9 8

S G ND 1

A

1 . 2 V S _P G

3 2 1 .2 VS_ PG

A

32 1 . 1 V _ P G

S GN D 2

PD 4
F M 05 4 0 N

* 10 K _ 0 4

F M0 5 4 0 N
*4 . 7 U _ 2 5 V _ X 5 R _ 0 8

7
6
5

C
P D2 8

PQ 1 1
A O 4 45 6

2

P R6

Ra
1 2 K _ 1% _ 0 4

P C1 7

17
Z3602

6

Z3603
P R 1 04
6 . 8 K _ 1 %_ 0 6
Z3604

4

Z3605
.1 U_ 1 0 V _ X 7 R_ 0 4
Z3606
PC 1 5

2

Z3607

26

5

7

4
Z3628

F M5 8 2 2

V DD P 2

V CC A 2

D H 1

T O N1

I LI M 1

T O N2
D H2

L X1

BST 2

D L1

SC413

B ST1

I L I M2

F BK1

LX 2

24
V OU T 1
Z 3 6 08

8

Vout = 0.5V ( 1 + Ra / Rb )

11

S GN D 1

PC 1 2

*4 . 7 U _ 2 5 V _ X 5R _ 0 8 * 4. 7U _ 2 5V _X 5 R _0 8

S G ND 2
0501

23

Z 3 6 13

P R1 0 1

1 M_ 0 4

9

Z 3 6 14

P R1 0 2

7 5 0K _0 4

20

19

Z 3 6 15
Z3621
. 1 U _ 10 V _ X 7 R _ 0 4
Z 3 6 16
P C 11
P R4
* 0 _0 6 0 3 _3 2 m i _l s h o rt
Z 3 6 17
P R1 0 0
5 . 3 6 K _ 1% _ 0 6
Z 3 6 18

16

Z 3 6 19

12

Z 3 6 20

21
18

2A
Vout = 0.5V ( 1 + Ra / Rb )
8
P Q1 4

Power Plane
V1 .2

4
A O 44 7 4
P D1

E N/P S V 2

FBK2

E N/P S V 1

VO UT 2

1

PR 9 7
*1 0 _ 0 8

4
10

A O 44 5 6
A

F M 58 2 2
Z 3 62 9
P C 12 5
*1 0 0 0 P _ 50 V _ 0 6 +

Ra

PR 3

P C1 0

1 4 K _ 1% _ 0 4

2 0 P _ 5 0 V _ 04

1

Sheet 36 of 47
1.1VS, 1.2V, 1.2VS,
2.5V

2

8m m

2

+

P R 99

Rb

1 0 K _ 1% _ 0 4

PU 4

15

P GN D 1

P G ND 2

PJ 5

8A

S GN D 2
P Q1 6

SU SB

3 1 , 32 , 3 5 , 3 7 S U S B

1. 2 V S

P L4
2 . 5 U _ 7* 7 *3 . 5
2

D

S G ND 1

A GN D 2

A GN D 1

1 0 K_ 0 4

1

28

PR 1 0 6

14

PR 1 0 3
10 K _ 1 % _ 0 4

8
P Q1 0

1
2
3

22

DL 2

5V

Rb

P C3

3
2
1

2 20 U _ 4V _D 2

A

*1 0 0 0P _5 0 V _ 0 6

*1 0 _0 8

P C1 2 2

.1 U_ 5 0 V _ 0 6

C

1

P R2
P C4

. 0 01 U _ 50 V _ 0 4

25

P C1 3 8
1 2 2 0 U_ 4 V _ D2

3
2
1

2 . 5 U _ 7 *7 * 3 . 5
PL 3
P C9
+

. 0 01 U _ 50 V _ 0 4

P C 1 30

13

5
6
7

8A
1 00 P _ 5 0 V _ 0 4

2

8m m

1 U_ 1 0 V _ 0 6

V CC A 1

PC 1 3 6

G

S G N D 1 S GN D 2
. 1 U _ 5 0 V _ 06

2 .5 VS

P R1 7 0

V D D3

S

2N 7 0 02 W

* 0 _ 12

3 .3 V

Z3609

Z 3 6 22 2

*0 _ 08 0 5 _ 5 0m i l _ sh o rt

A ME 88 1 6

V IN

V OU T

1A

3

4 7 K_ 0 4

. 1 U _ 5 0 V _ 06

G

P C 21 9
1 0U _ 1 0V _0 8

2N 7 0 02 W

PC 2 1 3
* 1 0U _ 1 0V _0 8

AD J

PR 6 4

GN D

*0 _ 04 Z 36 1 0

G ND

PR 1 1 4

GN D

EN

PC 1 4 2
P Q1 5

31 , 3 2 , 3 5 , 37 S U S B

1 K _ 1 % _ 04
Z3624

S G ND 1

S GN D 2

3 1 , 3 2 , 35 D D _O N #

PR 1 1 5

8

7

6

5

S

P R 11 0
P R 96
*0 _ 0 6 0 3_ 3 2 m li _ s h or t
*0 _ 0 60 3 _ 3 2m i l _ sh o rt

P C 2 31 P C 21 8 P C 21 1

Ra

4
G ND

D

Z 3 6 23 1

0_ 0 4

Rb

S G ND 1

PR 1 8 1

Max output current is 1A
Vout = 1.24V ( 1 + Ra / Rb )
P R 1 82

1 9 , 22 , 3 0 , 3 1 , 3 2 S U S B #

9 7 6 _1 % _ 0 4

1 0 K _ 04

PR 1 8 0
5V

1 .8 V

* 1 0 U _ 1 0V _0 8

PR 1 1 1
5V

1A

1 0 U_ 1 0 V _ 0 8

P R1 6 9

. 0 1 U _1 6 V _ 0 4

PU 8
S G ND 2

10 0 K _ 0 4

P C2 2 1

2 .5 V S

EMI

. 2 2 U F _ X7 R _ 16 V
P C 3 8 * . 0 1U _ 5 0V _0 4

P C 2 56

Z36 25

4 7 K _ 04

8

VC NT L

1 U_ 1 0 V _ 0 6
6
4

P C 6 6 * . 0 1U _ 5 0V _0 4

3A1

Z 3 62 6

V O UT

OP E N _ 3 A

3

2

Z 3 62 7

P R 1 75

1 0 K _ 1 % _0 4

P C 6 5 . 0 1 U _5 0 V _ 0 4
P C 2 17

.1 U_ 5 0 V _ 0 6

P C 2 20
P C2 4 0
. 1U _ 1 6V _0 4

P C2 4 1
1 0 U _1 0 V _ 0 8

PC 2 4 2
1 0U _ 1 0V _0 8
P R1 7 1

P C2 1 6

P C 2 26

P C2 2 7

6 8 P _ 50 V _ 0 4
1 0 U_ 1 0 V _ 0 8

G

P C 25 7

S

3 1 , 3 2, 3 5 D D _ O N #

P C 5 4 * . 0 1U _ 5 0V _0 4

Ra
V FB

P C 2 25
PQ 4 6
2 N7 0 0 2 W

2

1 .2 V S

E N
GN D

PJ 1 5

V O UT

D

1

APL 5913

10 U _ 10 V _ 0 8

P R2 0 0

V IN
V IN
P OK

1 0 U _1 0 V _ 0 8

5V

5
9
7

1 .2 V _ P W RG D

*1 0 K _ 04

1U _ 10 V _ 0 6

P U7
P R 19 9

3 . 3V

1 .2 V

. 1 U _1 6 V _ 0 4

Rb
20 K _ 1 % _ 04

Vout = 0.8V ( 1 + Ra / Rb )

1.1VS, 1.2V, 1.2VS, 2.5V B - 37

B.Schematic Diagrams

1

PC 8

4

P G OO D 2

V DD P 1

2

PQ 1 2
A O 4 47 4

P GO OD 1

P C 13 9
1 *2 2 0U _ 4 V _ D 2

8
V 1 .1

PJ 4

3

5
6
7

7
6
5

0501

Power Plane
1 .1 V

P C 1 6 1 U_ 1 0 V _ 0 6

1
2
3

27

2A

P C 1 28
C

* 4. 7 U _ 25 V _ X 5 R _ 0 8

C

.1 U_ 5 0 V _ 0 6

Schematic Diagrams

VGA CORE 1.5VS
5V

1 3 G P I O 15 _ P S W _ 0

1. 2V 1 .0 V 1 .0 V 0 .9 5V

1 3 G P I O 20 _ P S W _ 1

1
1

G P I O2 0 _ P S W _ 1

PR 7 5

*1 0 K _ 0 4+ K
5V

? ?
1 0 0K _ 0 4 +K

1 0 0K _0 4 + K

E N _ V GA _C OR E

P D1 1

D

1 M_ 1 %_ 0 4 + K

PQ 9
S US B

P R9 3

* 0_ 0 4 Z 3 70 1

P C1 0 8

F M0 5 4 0-N + K

P R1

G
1 0K _1 % _ 04 + K

S

1

P J2
2 2 00 P F _ 5 0 V _ 06 + K

2
3
1
PAD

C
Z 3 7 07

4

P D3
P Q1 3
A O 44 5 6 +K

17

0417

F M5 8 2 2+ K

P C1 1 9

+

+

2
8m m

PC1 2 4

Z3 714

PC 5

PC6

5

8

P C 11 6

P R8 7
Z 37 1 3

2 2 0U _ 4V _D 2 +K

4

. 1 U _ 1 6V _ 0 4 +K

Z 3 7 06

3

V GA _ C O R E

P J3
1

*2 20 U _4 V _ D 2+ K

2

V G A _ V CO RE

15A

PL 2
2 . 5 u H _ 6 . 8* 7 . 3* 3 . 5+ K
1
2

A

D 1

D L

Z 3 7 05

5
6
7
8

BST

1

2
3
1

16

15
G 1

D H

LX

V CC

D 0

. 1 U _ 5 0V _ 0 6 + K

PU 3
S C 4 7 1A + K

V O UT

P R9 0
3 7 . 4 K _ 1% _ 0 6 +K

P Q8
A O4 4 74 + K

P C1 1 1

PG D

FB

*1 0 0 P _ 50 V _ 0 4
0417

14

Z370 3
10
9

Sheet 37 of 47
VGA CORE 1.5VS

IL IM

13
11
Z 3 7 02

P C 11 2

6

V GA V C OR E _ P W R GD

EN

R TN

12

*1 0 K _ 0 4

G 0

1
P R 84

Z370 4

4

3m m

G ND

2m m
3. 3V S

7

PJ 1 8
0416

1 U _ 1 0 V _ 06 + K

37 . 4 K _ 1 %_ 0 6 +K

4 7 0 P _ 50 V _ 0 4 +K

EMI
PR 8 5
P C1 1 7

PR 8 6

V G A _ C OR E

P R9 1
3 7 . 4 K _ 1% _ 0 4 +K

0 _ 0 4+ K

P C 3 4 . 0 1 U _ 5 0 V _ 04

2 0 P _ 5 0V _0 4 + K 1 0 K _ 1% _ 0 4+ K
P R8 8
Z 37 1 5

Z 3 71 6
0417

FB
P C1 1 8

P C 1 8 * . 0 1U _ 50 V _ 0 4

37 . 4 K _ 1 %_ 0 4 +K

1 0 0 0 P _5 0 V _ 0 4+ K

P C 1 14

PR 8 9

. 0 1 U _ 1 6 V _ 04 + K

4 9 . 9 K _1 % _ 0 6+ K

0417

5V

1 .8 V

1 .5 VS

P C2 5 8
P U9
P R2 0 1

3 .3 V

5V

PR2 0 2

1 0 0 K _1 % _ 0 4

5
9
7

1 . 5V S _P W R G D

*1 0 K _ 0 4

Z 3 7 10

8

1 U _ 1 0V _0 6
6

3A

V C NT L
4

Z371 1

VO UT

3 1 , 3 2, 3 5 , 3 6 S U S B

Ra

VF B

2

Z371 2

8 . 8 7 K _ 1% _ 0 4

P C 2 22

6 8 P _ 5 0V _0 4

P C 1 78 . 0 1U _ 50 V _ 0 4

P C 25 9
2 2 00 P F _ 5 0 V _ 06

P C2 4 5

P C 2 36

P C 23 9

. 1 U _ 1 6V _ 0 4

1 0U _ 10 V _ 0 8

10 U _1 0 V _ 0 8

PC2 1 4

P C2 2 3

P C 2 08

P C 20 7

10 U _1 0 V _ 0 8

1 U _1 0 V _ 0 6

1 0 U _ 1 0V _0 8

1 0U _ 10 V _ 0 8

P R1 7 7

Rb
1 0K _ 1 % _ 04

Vo ut = 0 .8 V ( 1 + R a / Rb )

B - 38 VGA CORE 1.5VS

EMI
1. 5 V S

P R 1 76

P C 2 12
P Q4 5
2 N 7 0 02 W

G

2
O PEN_ 3 A

3

EN
G ND

PJ 1 4
1

VO UT

D

1

VIN
VIN
PO K

APL 5913

S

B.Schematic Diagrams

5
6
7
8

2

C

2 N 7 0 02 W + K
2

* 4 . 7U _ 25 V _ 0 8 +K

PR 7 7
A

PR8 1

P R 78

P C 1 07

5V

3 2 E X T_ V G A _ P OW E R _ ON #

< N A ME >

0411
4 . 7 U _ 2 5 V _0 8 + K

0
1

4 . 7U _ 25 V _ 0 8 +K

1
0

*1 0 K _ 0 4+ K

PC1 1 3

0
0

GPIO20

PR 7 6

P C 1 09

GPIO15

G P I O1 5 _ P S W _ 0

. 1 U _ 1 6 V _ 04

Schematic Diagrams

VDD3, VDD5
V IN
C

P C2 0 3
LG A TE 1
VIN1
PR6 1

Z 3 8 13

10 _0 6

. 0 1U _5 0V _ 0 4

A

S Y S 5V

PD 18 S C S 35 5V
Z 3 81 4
A
C

S Y S 10 V

PD 16 S C S 35 5V
PC 82
22 00 p _5 0 V _0 4

PC9 1
C

P C2 0 4

. 1U _5 0 V _0 6
P D 24
F M 05 4 0-N

LD O5 V

. 0 1 U _ 50 V _0 4

6 -06 -00 540- 021
A

P D2 5
C

F M0 5 40 -N
A

PD 19 S C S 35 5V
Z 3 81 5
A
C

S Y S 15 V

PD 17 S C S 35 5V
LD O 5V

C

A

PC 81
22 00 p _5 0 V _0 4

6- 06-0 035 5-06 1
P C9 0

P R 1 83

0501

P C2 3 7
*1 M_ 04
0 . 1u _1 0 V _X 7 R _0 4

4 . 7u _ 6. 3 V _ 06

P C 22 8

P C 2 35

Z 3 8 02

P C 22 4

5
6
7

19

15

4

13

Z 38 1 7

P R 1 57
8m _ 12

SYS3 V

5A 1

17

LG A TE 2

8

Z 38 1 8

8
F M 58 22

1
2
3

BG 2

3
2
1

BG 1

P Q 39
A O4 4 68
4

+

Z 3 8 07

2

Z 3 8 08

3

E XT V C C

7

Z 38 1 9

11

P R1 8 6
Z 38 2 0
*0 _0 6 03 _ 32 mi l _s h ort
P C9 8
Z 38 2 1 22 0 p_ 50 V _ 04

2
P R6 2

*1 0 0P _ 5 0V _ 04

VFB2

4

IL IM
10

T K/SS1

Z 3 82 6

1

9

P G ND

16

PR6 9
2 0K _ 1% _ 04

P U1 0
L TC 38 5 0
PIN 29 = SGND4

3. 3 V

5V
S G ND4

6- 02- 0385 0-C Q0
PR2 0 3
*1 0 K _0 4

PR1 9 7
1 0K _ 04

L D O5 V

P J1 6
1
2 S H OR T

P C 2 51

D

D

D

G

P Q4 3
2 N 7 00 2 W

. 1U _1 6 V _0 4

G

P Q 42
2 N 7 0 02 W
G

D
S

P Q4 7
2N 70 0 2W
G

S GN D 4

S G ND4
Z 3 8 27

P C 2 62
P R 19 4
1 0 0K _ 0 4

PJ 1 7

P Q 48
2 N 7 00 2 W
G Z 38 2 9

P R1 9 6
1 0K _ 0 4
P R 1 95

0_ 0 4
C P U _T H E R M TR I P # 5 , 1 9

S

P R6 6
*0 _0 4

Z 38 31

1U _X 5 R _1 0 V _0 6

2

S GN D 4 S GN D 4

L D O5 V

P R 2 05
*1 0K _ 0 4
3. 3 V

Z 3 83 0

P R1 8 9
*1 0K _ 0 4

3 .3 V

P R 20 7
4 7K _ 1 %_ 04

S

S GN D 4

P Q4 4
2 N 7 00 2W

S

*0 _0 4

L D O5 V
P R 1 90
*0 _0 4 02 _ 20 m li _s h ort

S

PR6 8

S GN D 4

P C 2 46

P C9 9

0. 0 1 U _ 50 V _0 4

P R 20 4
1 0 K _0 4

SYS5 V
P C 96
S GN D 4
1 00 0 P _5 0V _ 0 4

6 3. 4 K _1 % _0 6

Z 38 2 3

S GN D 4

1 00 0 P _5 0 V _0 4

PR6 3

47 K _0 4

*1 0 0P _ 50 V _ 04

F R E Q/ P L LF L TR

3V E N

S GN D 4

P C 2 52
Z 3 82 2

S G ND4

Z3 8 25

PR1 8 8
3 . 32 K _ 1% _ 06

T K/SS2

P R 18 5
10 K _0 4
P R 18 4
* 0_ 0 4

5A

5V

P C 2 53

M OD E / P L L I N

R UN1

Z 3 8 10 2 5

L D O5 V
S G ND4

5

2

OP E N -5 mm

Z 3 82 8

1 0_ 0 4

P C 2 47
1 00 0 P _5 0 V _0 4
P R 1 98
1 0_ 0 4

P G OOD

RUN 2

Z 3 8 09 2 4

I TH 2

6

12
P R6 5
LD O5 V
*0 _ 04 02 _ 20 m li _ sh o rt

VFB1

26

PR7 0

2 0 K _1 % _0 6

S EN S E 2-

IT H1

* 10 0 P _5 0 V _0 4

S GN D 4
0423

S E N S E 1-

P R 1 93

PJ 1 2

P C1 9 6

Z 3 8 06 2 8

Z 3 82 4

P C2 5 0

10 _ 04
P C2 4 9
2 20 p _5 0V _ 0 4

Z 3 8 12

5 V EN

P R 1 92
47 K _ 04

PC2 5 4

3 0M I L
1

11 0 K _1 %_ 0 6

S ENS E 2 +

D

P R1 9 1
P R6 7

*2 2p _ 50 V _0 4

S E N S E 1+

P C 24 3

P C7 5

Z 3 8 05 2 7

10 _ 04
1 0 00 P _5 0 V _0 4

V D D3

0 . 1u _ 10 V _X 7 R _ 0 4

7
6
5

SW 2

PL 1 1
4 . 7u H _ 6. 8 *7 . 3 *3 . 5
1
2

1 25mohm_NEC
1 50 u _6 . 3 V _D 2

L GA T E 12 0

4

Z 3 8 11 P R 1 8 7

P C9 4

Sheet 38 of 47
VDD3, VDD5

8
P Q 40
A O 44 68

P D2 1

6 -06 -058 22- 061
A

SW 1

P Q3 8
A O4 46 8

P D 22
F M5 8 22

1 5 0u _ 6. 3 V _ D 2
25mohm_NEC

Z 38 1 6

1
2
3
Z 3 8 04 2 3

1
0 . 1u _ 10 V _X 7 R _ 04
2

0 . 1u _ 10 V _ X7 R _ 04

V IN

21

2
8

+P C 76

P C1 9 7

0. 1 u _1 0V _ X 7R _0 4
14

C

1

OP E N -5 mm

*4 . 7u _ 25 V _ X5 R _ 08

A

6-1 3-R0 080 -13B

5A

2

TG 2

0 . 02 2 U _ 16 V _ 04

P J1 1
1

P C1 9 3

T G1

6-1 9-41 001 -24 2
C

5A

Z 3 8 03 2 2

4

P L1 0
4. 7 u H _ 6. 8 *7 . 3* 3. 5

5
6
7

P R1 5 6
8 m_ 1 2

*4 . 7 u_ 2 5V _ X5 R _ 0 8
P C2 2 9

3
2
1

SYS5 V

B O OS T 2

P Q3 7 8
A O4 4 68

6- 15- 0480 0-7 B1
V DD5

I NT V CC

7
6
5

0 . 1u _ 10 V _X 7 R _ 04

B OOS T 1

P C9 2

18

0501
*4 . 7u _ 25 V _ X5 R _ 08

P R 2 06

*0 _0 6

S G ND4

VDD3, VDD5 B - 39

B.Schematic Diagrams

Z 3 8 01
P C 2 34
4 . 7u _ 25 V _ X5 R _ 08

Schematic Diagrams

CHARGER, DC IN
PQ 3
S I 4 83 5 B D Y
8
7
6
5

V IN

3
2
1
4

4A 160mil

VB
PQ 1 7
S I4 8 3 5 BDY
8
7
6
5

VA
PL 5
15 U _ 10 * 10 * 6
Z 3 9 07

P R 1 09

2 5 m _2 5

C

7A
P C1 3 5

P C1 3 4
P C1 9

P C1 4 1

P C1 4 4

4 . 7 U _2 5 V _ X 5 R _0 8

4 . 7 U _2 5 V _ X 5 R _0 8

P C2 2

4 .7 U _2 5 V _ X 5 R_ 0 8

P D1 2
F M5 8 2 2
4 . 7 U _2 5 V _ _ X 5R _ 0 8

4. 7 U _ 25 V _ X 5 R _ 0 8

A

Z3906

P R1 2

*0 _ 0 60 3 _ 3 2m i l _ sh o rt

Z3 9 1 9 PR 2 3

* 0_ 0 6

Hi:16.8V
Low:12.6V

MV R E F

P R7 3
20 K _ 1 % _ 04

C U R _S E N S E

P R 27
*0 _ 06 0 3 _ 32 m i l _s h o rt

30

P C 26
. 0 1 U _ 5 0 V _0 6
V A

P R 13
CT L
* 0 _0 6 0 3 _3 2 m i _l s h or t

2008/03/25
P R1 2 8

VA

PC1 5 0

PC 1 5 1

* 1 00 K _ 0 6

P U5

22 P _ 5 0 V _ 0 4
P R1 2 7
Z 3 9 10
* 0 _0 6 0 3 _3 2 m i _l s h o rt Z 3 9 11
Z 3 9 12
P R1 9
3 0 K _ 0 6 Z 3 9 13

P R1 1 7
Z3918

P C 14 8
2 20 0 P _ 5 0 V _ 06 3 3 K _ 06

8
S I 4 8 3 5B D Y
7
3
6
2
5
1
P Q4 5

C

Sheet 39 of 47
CHARGER, DC IN

8 *S I 48 3 5 B D Y
7
3
6
2
5
1
P Q4 6

Z 3 9 14
Z 3 9 15
Z 3 9 16
Z 3 9 17

VIN
. 1U _ 5 0V _0 6
P R 17

10_06

13
14
15
16
17
18
19
20
21
22
23
24

P R 79
5 1 0K _ 0 6

P D1 0
U D Z 16 B

+I N C 1
-I N C 1
CT L O UT D /S E L
FB1 2 3
OU T C 1
-I N E 3
+ IN E 1
RT
-I N E 1
XA C O K
ACIN
VH
VR EF
OU T
A CO K
VCC
-I N E 2
CS
+ IN E 2
GN D
OU TC 2
-I N C 2
+I N C 2
MB39A126

12
11
10
9
8
7
6
5
4
3
2
1

2008/03/25
P R1 1 8

1 00 K _ 0 6
6 80 0 P _ 5 0 V _X 7 R _0 4
Z 3 9 2 3 P C 27
AC IN
* . 03 3 U _5 0 V _ 0 6 * 0 _0 6 0 3 _3 2 m i _l s h o rt
6 80 0 P _ 5 0 V _X 7 R __ 0 4
1 0K _ 0 6 Z 3 9 2 4 P C 14 5

P R1 1 9
P R2 0
P C1 4 9

Z 3 92 0
Z 3 92 1
A CO K#
Z 3 92 2

1 0K _ 0 6

P R1 1 2
P R1 1 3

PR1 2 6
*1 0 K _ 06

1 00 K _ 0 6
T O TA L_ C U R

MB 39 A 1 2 6

30
PR1 1 6
*2 . 2 M_ 0 6

. 0 1 U _ 5 0 V _ 06

P C 1 4 3 . 22 U _ 16 V _ 0 6

ADJ C.V POINT

P C2 3

A

change value

Z3903

Z 3 9 04

P R 82
2 0 0K _ 0 6

B

Z3905
C
PQ 7
E2 N 3 9 0 4

PC1 4 6

. 1 U _ 5 0 V _ 06
MV R E F

PR 2 2
P R8 0
1 0 0 K_ 0 6

P R1 5

PC1 1 0
3 0 K _ 1 % _0 6

3 0 K _ 1% _ 0 6

P C1 4 7

. 1 U _ 5 0V _0 6

C U R _ C ON T

P R8 3
1 0 K_ 0 6

T _ C U R _ C ON T

Z 3 9 02

J B A T TA 1
S YS3 V

1 0 0 0P _5 0 V _ 0 6
VAPR 2 1

D

EMI

V A

P R1 6

PQ 1 8
2 N7 0 0 2 W

Z3 9 09

P R7
P R8
P R9

3 0 S M C_ BA T
P R2 9
3 0 S M D_ BA T
10 0 K _ 0 4
3 0 B A T _ DE T

Z3 9 26
Z3 9 27
Z3 9 28
Z3 9 29
Z3 9 30

1 0 0 _0 4
1 0 0 _0 4
1 0 0 _0 4

PC 1 3 1
1 0 K _ 1 % _0 6

1 0 K _ 1% _ 0 6

G

P J6
3m m

P C 1 0 3 . 01 U _5 0 V _ 0 4

P C 1 2 0 * . 0 1 U _ 5 0 V _0 4

P C7

* . 0 1 U _ 5 0V _0 4

P C2 1

. 0 1 U _5 0 V _ 0 4

Total Power
M7x0J : PR15 30K_1%
M7x0JU : PR15 18K_1%

P R 14

V D D3

P C 1 7 4 . 01 U _5 0 V _ 0 4
P C6 8

* . 0 1 U _ 5 0V _0 4

VB

A C OK #
P R1 8
*0 _ 0 40 2 _ 2 0m i l _s h o rt

A C_ IN

10 K _ 0 4

E

C

Z3 9 31

B A T _V OL T
3 0 K _ 1 %_ 0 4

DB

. 0 1 U _5 0 V _ 0 4
P C 1 7 3 * . 0 1 U _ 5 0 V _0 4

B - 40 CHARGER, DC IN

P Q1
D T A 1 14 E U A
Z 3 9 32

G

P C2 0
P R1 0
. 1U _ 5 0V _0 6

PQ 2
S Y S 5V

P C 1 7 0 * . 0 1 U _ 5 0 V _0 4

C H A G_ E N

30

P C 1 33
3 0 P _ 50 V _ 0 4 B T J- 09 O K 1
P I N GN D 1~ 2= GND

30 P _ 5 0 V _ 0 4
3 0 P _ 5 0V _0 4

*0 _ 0 40 2 _ 2 0m i l _ sh o rt

A C_ IN

13 , 3 0

#
#
#
#
#

TOTAL POWER = 65W
MAX CHARGE CURRENT = 2.5A
BAT_SEL H:16.8V ; L: 12.6V
CURSEN : Vcursen=0.025 X 20 X Ichg
TOTAL_CUR : Vtotal_cur=0.020 X 20 X Ichg

P R1 1

P C 1 2 6 . 01 U _5 0 V _ 0 4
P C1 2 9

P R 10 8

2008/03/25

P C 9 3 . 01 U _5 0 V _ 0 4

P C 9 5 * . 0 1 U _ 5 0 V _0 4

P C1 3 2

P R 1 07
* 0_ 0 4 0 2_ 2 0 m li _ s h ort
PQ 4
2 N 7 0 0 2W
G C HA G _ E N

2

* . 0 1 U _ 5 0V _0 4

D

V IN

P C1 3 7

Z 3 9 25

* . 01 U _ 50 V _ 0 4

2 N7 0 0 2 W

1
2
3
4
5
6
7
8
9

S

P C1

1

. 0 1U _ 5 0V _0 4

S

P C4 7

S

B.Schematic Diagrams

PF1

3A 120mil

Z3908

. 1 U _ 50 V _ 0 6

PC 2 8

3
2
1
4

P C 1 0 2 4 . 7 U _2 5 V _ X 5 R _ 0 8

22 0 K _ 1 % _0 4

A C IN

. 1 U _ 50 V _ 0 6

P R7 2

PC 1 0 1

4 .7 U_ 2 5 V _ X 5 R_ 0 8

1 0 K _ 04

4A 160mil

2 0 m _ 25

4 . 7 U _2 5 V _ X 5 R _ 0 8

PR 7 4

PR 7 1

. 1 U _5 0 V _ 0 6
P C 1 04

. 1 U _5 0 V _ 0 6

2 D C -G2 1 3 -B 2 0 0

PC 1 0 5

1
2
1
2
3
4

. 1 U _ 5 0V _0 6

ND
ND
ND
ND

VA-

H C B 4 5 32 K - 80 0 _ 1 8
VA

PC1 0 6

G
G
G
G

4A 160mil
Z 3 9 01

PC 2 9

VA

PL 1
J A CK1

6 . 0 4 K _ 1 %_ 0 4

B A T_ V O L T 30

# Fre quen cy:5 00KH z

# 4.7u/25V/X5R : 6-07-47522-2C0

Schematic Diagrams

CLICK FINGER BOARD FOR M76
D
R
A
O
B
R
E
G
N
I
F

D
R
A
O
B
K
C
I
L
C

CJ _ F P 1
CG ND

CC 1 3
. 1 U _ 10 V _ X 7 R _ 0 4
C5 V
C GN D

M760XX?
M765XX?

CJ _ T P 2
1
2
3
4
5
6

CT P _ D A T A
CT P _ C L K

CJ_TP2
1

RIGHT
KEY

CSW1, CSW2
CSW3, CSW4
2
1

4
3

CS W 1
TJ G -5 33 -S -T/ R

6

TM
TG
TM
TM
TG

UX O UT
RID 0 /S E N S E
CS
I S O / MO D E 3
P IO 1

C
C
C
C
C

TD
TD
TG
TU
TU

ATA0
ATA1
P I O 0/ I N T
S B _ P N 7_ R
SB_ PP7 _ R

1
3
5
7
9
11
13
15
17
19
21
23

2
4
6
8
10
12
14
16
18
20
22
24

CS W 2
T JG -5 3 3 -S -T / R

1
3

8 5 2 0 1- 06 0 5 1 _S _R

CG ND

LIFT
KEY

CSW1~4

C
C
C
C
C

2
4

C C5

C C6

CC 8

1 U_ 1 0 V _ 0 6

1 U _1 0 V _ 0 6

1U _ 1 0V _0 6

CO N2 4 A

1
3

C T P B U T T ON _R

C TA V D D
C TT C _ V D D
C TD V D D 1

C T MO S I
CT P D _ RE G
C T NR E S E T
C T D A TA 2
C T E S D_ R ING
C T MC L K
CT XIN
C T X OU T

2
4

CG ND

CG ND

C GN D

C GN D

C T P B U TT O N _ L

5
6

CS W 4
*T J G- 53 3 -S -T / R
1
3

D03 For
M765

2
4

D03 For
M765

5
6

5
6
C T P _ C LK
CT P_ D A T A
CG ND

C 5V

C T GP I O 0 / I N T

C R1 7

1 . 5K _0 4

C T U S B _ P P 7_ R

C R1 8

2 7. 4 _ 1 % _ 04

C T 3 . 3V
CJ _ F P2

CG ND

C GN D

1
2
3
4

1

2
4

CJ_FP1

12

6-20-94A20-112

CS W 3
*T J G-5 3 3 -S -T / R
1
3

4

C T P B U T T ON _L
C TP _ S C R OL L _D O W N
C TP _ S C R OL L _U P
C T P B U T T ON _R
Z 4 5 01
Z 4 5 02

1
2
3
4
5
6
7
8
9
10
11
12

1

CT US B _ P P 7
C T USB_ PN 7

C T US B _ P P 7

Sheet 40 of 47
CLICK FINGER
BOARD FOR M76

C C1 9
4 7 P _ 50 V _ 0 4

85 2 0 1 -0 40 5 1 _ S _ R

C C 12

C GN D

8 7 1 51 -1 2 0 7G _ L
C GN D

. 1 U _ 1 0V _X 7 R _0 4

CG N D

C H2
C 55 D 5 5

C H5
C 5 5 D5 5

C H 1
2
3
4
5

C H3
9
8
7
6

1

2
3
4
5

MT H 23 7 D 9 1
C GN D

C H4
9
8
7
6

1

2
3
4
5

C GN D

9
8
7
6

1

MT H 2 3 7 D 9 1
CG ND

C H6
2
3
4
5

MT H 2 3 7 D 9 1
CG ND

C GN D

9
8
7
6

1

M T H2 3 7 D9 1
CG ND

C GN D

CG ND

TCS4B Unstuff
CT 3 .3 V

TCS4C 1U_10V_06

CT 3 .3 V

C C2 0

CC 2 2

1 U_ 1 0 V _ 0 6

. 1 U _ 1 0 V _ X 7R _ 0 4

CT G RID 0 /S E N S E

C C2
. 1 U _ 2 5 V _ X7 R _ 06
Z 4 5 07

CR 2
1 0 0_ 0 6
CT E S D _ RIN G

TCS4B

Unstuff

TCS4C

330K_04

C U1

10mil

CR 3

CC 4

*3 3 0 K _ 0 4

*1 U _ 1 0 V _ 0 6

1
3
2

CR 1

CC 1

33 0 K _ 0 6

*4 7 P _ 5 0V _0 6

C GN D

C T P D_ R E G

C T T C _V D D

C

R C L A MP 0 5 0 2 B

TCS4B

Unstuff

TCS4C

47P_50V_06

CR 4
CR 8

4 7 K_ 0 4
CG ND

C R 10

C T D A TA 0

CR 9

4 7 K_ 0 4

CR 7

3 3 0 K _ 04

C T M I S O/ M OD E 3

CR 5

4 7 K_ 0 4

CR 6

4 7 K_ 0 4

C T 3. 3 V
C T US B _ P N 7 _ R

CR 1 5

CT U S B _ P N7

27 . 4 _ 1 % _0 4

C GN D
C Q1
N DS 3 5 2 A P _ NL
G

C R 16

CC 1 8

10 0 K _ 0 4

4 7P _5 0 V _ 0 4

. 1 U _ 1 0 V _ X7 R _ 04

C R1 4

CG ND

* 0 _0 6
CG ND
D

C C 17
C TA V D D

. 0 22 U _1 6 V _ X 7 R _ 0 4

CG ND

C GN D

C T TC _ V D D
S
Q
CS #
SCK

CT T C_ V D D

C R 12

C C3

C C1 5

. 1 U _ 1 0 V _ X 7R _ 0 4

1 U _1 0 V _ 0 6

3

B

1U _ 1 0V _0 6

A#

V CC

C R 21
10 0 K _ 0 4

C C2 3

3

C T3 . 3 V

CC 1 1

2 2 P _ 50 V _ 0 4

CG ND

8
3 3 0 K_ 0 4
C C7

B
R x /Cx

C CS 1
S M D 2 2 8 X2 7 6 R

C T X OU T

C R 20

CL R #

Cx

GN D

Q

7

Z45 04

6

Z45 05
C C2 1

0507

2 2 P _ 50 V _ 0 4
2 . 2 U _6 . 3 V _ 0 6
C GN D

1 U_ 1 0 V _ 0 6

1

4

5

Z 4 5 0 6C R 1 9

1 0 K_ 0 4

C T G _F E T

1

1
1

1
1

1

2

Z 4 50 3
C GN D

*1 M_ 0 4

TCS4C 22P_50V_04

CU 3
1

C CS 3
S M D 2 2 8 X 27 6 R

CX 1
1 2 MH z F U J I C O M F S X -8L

TCS4B 33P_50V_04

C T MU X OU T
CG ND

C C 16

C GN D

1

. 1U _ 1 0V _ X 7 R _ 0 4

C C2 4
C T3 . 3 V
. 1 U _ 1 0 V _ X 7R _ 0 4

CG ND

E
C Q2
CB T B 1 1 9 8 N 3

M9 5 1 2 8W MN 6 TP

C CS 4
S M D 75 X 2 7 6R

CR 1 1

33 _ 0 6

7

HO L D#

C GN D
C CS 2
S MD 75 X 2 7 6R

C C 14

C R 13

CT DV DD 1
VSS

CG ND

8

V DD

W P#

4

2 2 P _ 50 V _ 0 4

1 5 _ 06

1

5
2
1
6

CC 1 0

C TX I N

CU 2
I S O/ MO D E 3
OS I
CS
CL K

CG ND

C C9
S

C T G_ F E T

CT M
CT M
CT M
CT M

*S C S 5 51 V - 30
*1 0 m i _l s h o rt

C T NR E S E T

C T G P I O1

C D1

D03

CT T C_ V D D

4 7 K_ 0 4

A

C T D A TA 1

2

C T D A TA 2

S N 74 L V C 1 G1 2 3D C T
CG ND
C GN D

CG ND

CG ND

C GN D

CG ND

CLICK FINGER BOARD FOR M76 B - 41

B.Schematic Diagrams

CJ _ T P 1

CJ_TP1

5
6

C GN D

Schematic Diagrams

B.Schematic Diagrams

MULTI FUNCTION BOARD

Sheet 41 of 47
MULTI FUNCTION
BOARD

B - 42

Schematic Diagrams

AUDIO BOARD
USB PORT
A _U S B V C C
A L5
H C B 1 6 08 K F -1 2 1 T 25

A _ US B V CC 2

60 mil

A _ US B V CC
A_ 5 V

AC 1

A C7

1 0 0U _ 6. 3 V _ B 2

. 1U _ 10 V _ X 7 R _ 0 4

+

A C9

AU 1
4
3

VIN

V OU T

VIN

V OU T

10 U _1 0 V _ 0 8

GN D

50 mil

1

A J _ US B 1
5

AC 5

AC 6

A C8

1
A GN D

. 1 U _ 1 0 V _ X 7R _ 04

2

. 1 U _1 0 V _ X 7R _ 0 4

1 0 U_ 1 0 V_ 0 8

R T9 7 0 1 -C P L

AR 1

*1 0 mi l _ sh o rt

A US B _ P N4 _ R

2

A U S B _ P P 4 _R

3

A G ND
A GN D

V+
D A TA _L
D A TA _H

4
A US B _ P N 4

A L1

G ND

2

4
3
*W C M2 0 1 2F 2S -16 1 T 0 3
AR 2

C 1 0 7 B 3 -10 4 0 3 -Y

*1 0 mi l _ sh o rt
A G ND

AG ND

Sheet 42 of 47
AUDIO BOARD

AUDIO JACK
2008/03/28

A_ 5 V

AJ _ FB1
1
2
3
4
5
6
7
8
9
10
11
12
13

A M I C 1 -R
A M I C 1 -L
AH
AH
AM
AS
AH
AU
AU

E A D P HO NE - R
E A D P HO NE - L
IC_ S E NS E
P K _ HP #
P_ SEN SE
SB_ PN 4
SB_ PP4

A S P DIF O

AC1 1
. 0 1U _ 16 V _ X 7 R _ 0 4
A S P DI F O
Z 4 7 10

AL 7

0
AR 7
2 2 0 _0 4

Z 47 0 1
Z 47 0 2

5 A J _ S P D IF 1
4
R
3

Z 47 0 3
Z 47 0 4

2
L
6
1
2S J-S 35 1 -S 3 0

AC 1 2
* 10 0 0 P _ 50 V _ 0 4

SPDIF OUT

BLACK
A GN D
A MI C _ S E N S E

8 7 2 12 -1 3 G0 _ L
A _ A U D G A GN D

D03B

A MI C 1 -R

AL 4

F C M 10 0 5 K F -1 2 1T 0 3

Z 47 0 5

A MI C 1 -L

AL 6

F C M 10 0 5 K F -1 2 1T 0 3

Z 47 0 6
Z 47 0 7

AC 1 0

AC 4

6 8 0 P _ 50 V _ 0 4

6 8 0 P _ 50 V _ 0 4

5 A J _ MI C 1
4
R
3

3 4

5

2
L
6
1
2S J-S 35 1 -S 3 0

MIC IN

2

1

6

BLACK
A HP _ S E N S E

A _ AU DG

D03B

ASP K_ HP #
A H E A D P H O N E -R
A R3

10 0 _ 06

A R5

10 0 _ 06

A H E A D P H O N E -L

A C1 4

Z4 7 1 1 AL 2

F C M1 0 0 5 K F -1 21 T 0 3

Z4 7 1 2 AL 3

F C M1 0 0 5 K F -1 21 T 0 3

Z 4 7 08
Z 4 7 09

AR9

A R8

AC 3

AC 2

1 K _ 04

1 K _ 04

6 8 0 P _ 50 V _ 0 4

6 8 0 P _ 50 V _ 0 4

5 A J _ HP 1
4
R
3
2
L
6
1
2S J-S 35 1 -S 3 0

HEAD PHONE

BLACK

. 1 U _ 1 0V _X 7 R _ 0 4

D03B
A H5
C 2 96 D 2 96 N

A H1
AH 3
C 5 2 D 5 2 C 52 D 52

A H2
2
3
4
5

A C1 5

. 1 U _ 1 0V _X 7 R _ 0 4

A C1 3

. 1 U _ 1 0V _X 7 R _ 0 4

A C1 6

. 1 U _ 1 0V _X 7 R _ 0 4

A _ AU DG

AH 4
1

9
8
7
6

2
3
4
5

1

9
8
7
6

D03B
MT H 2 7 6 D 1 1 1
A GN D

M TH 2 76 D 1 11
A GN D

A G ND

A GN D

A _ A U DG

A G ND

AUDIO BOARD B - 43

B.Schematic Diagrams

A US B _ P P 4

1

GN D 1
s h ei l d
GN D 2
G N D 3sh i e dl
s h i el d
GN D 4
s hi e l d

50 mil

Schematic Diagrams

FINGER SENSOR BOARD

FU 1
EXT_RI N G2
CR I DO
R I NG
MUXOUT

B.Schematic Diagrams

AV DD
MC S
PAD _VD D1B
MISO

Sheet 43 of 47
FINGER SENSOR
BOARD

DV DD
GPI O1
AGND
DA TA0
DA TA1
GPI O0
MCLK
U SB_DN
U SB _D P
MOSI
PD _R EG
N R ESET
D GND
DA TA2
EXT_RI N G1
PV DD
XTALIN
PGND
XTALOUT
TC S4B

A1

FESD _R IN G

B1

FGRI D 0/ SEN SE

C1
D1

F GN D
FMUXOU T

E1
F1

F AVD D
FMCS

G1
H1

F TC _VDD
FMIS O/ MOD E3

J1
A2
B2
C2

FJ 1

F DVD D 1
FGPI O1

FGN D
F GN D

FD ATA0

D2

FD ATA1

E2

FGPI O0/ IN T

F2

FMCLK

G2

FU SB_PN 7_R

H2

FU SB_PP7_R

J2

FMOS I

FGN D

FMU XOU T
FGR ID 0/SE NS E
FMC S
FMI SO/MODE3
FGPI O1
FD ATA0
FD ATA1
FGPI O0/ IN T
FU SB_PN 7_R
FU SB_PP7_R

1
3
5
7
9
11
13
15
17
19
21
23

2
4
6
8
10
12
14
16
18
20
22
24

F MOSI
F PD_R EG
F NR ESET
F DATA2
F ESD _R I NG
F MC LK
F XI N
F XOU T

FGN D

C ON24

A3

FPD _RE G

B3

FN RE SET

FJ1
1

C3
FD ATA2

E3

FESD _R IN G

F3

F TC _VDD
FXIN

H3
FGN D
J3

B - 44 FINGER SENSOR BOARD

23

2
24
BOTTON VIEW

24

1

F GN D

D3

G3

23

FXOU T

2
TOP VIEW

FAV DD
FTC _VD D
FD VD D 1

Schematic Diagrams

POWER SWITCH BOARD FOR M74
POWER SW & POWER LED FOR M74

POW ER BUTTON
SMSW1
TJG-533-S-T/R
1
3

POW ER
SWI TCH
LED

SMR1
2
4

220_04
SM_BTN#
SM_3.3VS
20m il

5
6

SMC1

SMJ_SW1

20mil Z4901
Z4902

*.1U_04
A

SM_BTN#

SMGND

D 03

SMD1

SMGND

1
2
3
4

SJ_SW1

Sheet 44 of 47
POWER SWITCH
BOARD FOR M74

4
1

85201-04051_L
SMGND
C

KPC-3216QBC-C

SMGND

SMH3
C52D52

2
3
4
5

SMH1

9
8
7
6

1

2
3
4
5

SMH4

9
8
7
6

1

SMS1
C126
1

SMH2
C52D52

1

SMH5
C237B52D52N

MTH237D87
SMGND
SMGND

SMGND

MTH237D87
SMGND
SMGND

POWER SWITCH BOARD FOR M74 B - 45

B.Schematic Diagrams

SM_3.3VS
20mil

Schematic Diagrams

FINGER BOARD FOR M74
4
7
M
R
O
F
D
R
A
O
B
R
E
G
N
I
F
TCS4B Unstuff

F C CT 3 .3 V _ F
F C C T 3 . 3V _F
F CC 1
.1 U_ 2 5 V_ X7 R_ 0 6
F CT G RID 0 /S E N S E _ F
Z5 0 05

F CC 1 3

F C C1 4

1U _ 1 0V _0 6

.1 U_ 1 0 V_ X 7 R_ 0 4

F CR 1 6
10 0 _ 0 6

TCS4B

Unstuff

F CT E S D_ R ING _ F

1
3

TCS4C

330K_04

2
F CR 1 8

F C GN D

Unstuff

TCS4C

47P_50V_06
F C R1 4

4 7 K _ 04

F C R1 0

3 3 0K _0 4

0501

4 7 K _ 04

*S C S 5 5 1 V -3 0
*1 0 m i _l s h o rt
A

F C R9

F C T G P I O 1_ F

F C Q1
ND S 3 5 2 A P _ N L
F C TG _ F E T _ F
G

S

F C R8

F CT D A T A 0 _ F

F C D1

D03

4 7 K _ 04

F C R2
F C GN D

*0 _ 0 6

F C GN D

D

F CC 5
F CT A VD D_ F

. 02 2 U _ 16 V _ X 7 R _ 0 4
F C T M I S O / MO D E 3_ F C R 1 1

4 7 K _ 04

Sheet 45 of 47
FINGER BOARD
FOR M74

F C T T C _V D D _ F

F C R3

1 5 _0 6

F CG N D

FC C 4

F C C7

1 U _1 0 V _ 0 6

.1 U_ 1 0 V_ X7 R_ 0 4

F CR 1 9

F C C T 3. 3V _F
FC C 2
.1 U_ 1 0 V_ X 7 R_ 0 4
F C T X IN_ F

33 _ 0 6
F CT D V DD 1 _ F

E
F CQ 2
CB T B 1 19 8 N 3

B

F C GN D
F C GN D

F CU 2
1

F CC 1 7
Z5002

F C T T C _ V D D _F
F CU 3
F C TM I S O / M OD E 3 _ F 5
2
F C TM O S I _ F
1
F C TM C S _ F
6
F C TM C LK _F

V DD

A #

VC C

7

R x /Cx

F C GN D

. 1U _ 1 0 V _ X7 R _ 04

F C R2 0

F C C1 8

1 0 0K _0 4

1 U_ 1 0 V_ 0 6

3

3 3 0 K_ 0 4

B

8
F CC 2 0

2

F CG N D
F C T X OU T _ F

FC R 1
8

2

1U _ 1 0V _0 6

S
Q
C S#
S CK

F C CT 3 .3 V_ F

3
C L R#

Cx

G N D

Q

Z5004

6

Z5001
F C C3

5

Z5003

1
4
F C GN D
FC X1
1 2 MH z-H S X 5 3 1S

F C R 21

* 4 7K _0 4

2 .2 U_ 6 .3 V_ 0 6
F C C1 5

3

4

W P#

F C R1 7

10 K _ 0 4

F CC 2 1

F C T G_ F E T_ F
1 8 P _ 50 V _0 6

18 P _ 5 0 V _ 0 6

S N 7 4 L V C 1G 1 2 3 D C T
4

V SS

HO L D#

7

F C GN D

F C GN D

M9 5 1 28 W MN 6 TP
F CG N D

F CG N D

F C GN D

F CG ND

TCS4B 33P_50V_04
F CT U S B _ P N 7 _ R_ F F C R6

2 7 . 4_ 1 % _ 0 4

TCS4C 22P_50V_04

F C T T C_ V D D_ F

F C T U S B _ P N 7 _F

F C T GP I O 0 / I N T_ F F C R 4

1 .5 K _ 0 4

F C T U S B _P P 7 _R _ FF C R 5

2 7 . 4 _ 1 %_ 0 4

F C T MU XO U T_ F
F C TN R E S E T _ F F C R 1 2
F CR 7

F CC 9

10 0 K _ 0 4

47 P _ 5 0 V _ 0 4

47 K _ 0 4

F C T US B _ P P 7 _ F

F C C1 1
F C C1 0

F C C8

2 2 P _ 50 V _ 0 4

4 7 P _ 50 V _0 4

.1 U_ 1 0 V _ X 7 R_ 0 4
F CG N D

F CG N D
F CG ND
F C GN D

F C G ND
F CG ND

F CT D
F CT D
F CT G
F CT U
F CT U

F CC 1 6

F C C 19

F C C2 2

1U _ 1 0V _ 06

1 U _1 0 V _ 0 6

1 U_ 1 0 V _ 0 6

F CG ND

F CH 4
C4 4 D4 4

MT H 23 7 D 91

F CG ND

F C H3
C4 4 D 4 4

F C GN D

FC H 6
C 2 3 7D 2 3 7

F C GN D

FC S1
S M D 79 X 1 9 7 R

F C GN D
C ON 2 4 A
F CG ND
F CG ND

B - 46 FINGER BOARD FOR M74

F C GN D

F C GN D

2
3
4
5

M T H2 3 7 D9 1

F C GN D

FC H 5
C 2 3 7D 2 3 7

F C H1
9
8
7
6

1

F C S3
S M D 7 9 X 1 97 R

F CG ND

9
8
7
6

M TH 2 3 7D 9 1

F C GN D F C G N D
F CS 2
S MD 7 9 X1 9 7 R

F C GN D

F CG ND
FC S4
S M D 79 X 1 9 7 R
1

F C T M OS I _F
F C TP D _ R E G_ F
F C T N R E S E T_ F
F CT D A T A 2 _ F
F C T E S D _ R I N G_ F
F CT M CL K _ F
F C T X I N _F
F CT X O UT _ F

F CT A V DD _ F
F C T T C _V D D _ F
F CT D V D D1 _ F

1

1

MT H 2 3 7D 9 1
2
4
6
8
10
12
14
16
18
20
22
24

2
3
4
5

1

8 5 2 0 1-0 4 0 5 1 _R

1
3
UX O UT _ F
RI D0 /S E N S E _ F 5
7
C S _F
I S O / MO D E 3 _F 9
11
P I O 1 _F
13
15
AT A0 _ F
17
AT A1 _ F
19
PIO 0 /INT _ F
SB _ PN 7 _ R_ F 2 1
S B _ P P 7_ R _ F 2 3

F C H2
9
8
7
6

1

F C TU S B _ P P 7_ F
F C T U S B _ P N 7_ F

F CT M
F CT G
F CT M
F CT M
F CT G

1

1

1
4

1
2
3
4

F C G ND

2
3
4
5

1

FC J _ FP2
F C CT 3 .3 V _ F
F C J_ F P 1

F CH 7
9
8
7
6

1

1

F C H8
2
3
4
5

1

F CG ND

FCJ_FP1

B.Schematic Diagrams

F CT D A T A 1 _ F

*1 U _ 10 V _0 6

F C T P D _ R E G_ F

TCS4B

F C C T 3. 3V _F

F C R1 3

F C C6

*3 3 0 K _ 0 4

* 4 7P _5 0 V _ 0 6

C

33 0 K _ 0 6

F C TT C _ V D D _ F
F CT D A T A 2 _ F

F C R1 5

F C C 12
R C L A MP 05 0 2 B

F C GN D

TCS4C 1U_10V_06

FC U 1

10mil

F C GN D

Schematic Diagrams

EXTERNAL ODD BOARD FOR M76
OJ_ODD1
Z4401
Z4402
OCD_RST#
OIDE_PDD7
OIDE_PDD6
OIDE_PDD5
OIDE_PDD4
OIDE_PDD3
OIDE_PDD2
OIDE_PDD1
OIDE_PDD0
OIDE_PDIOW#
OIDE_PDIORDY
OIDE_I RQ
OIDE_PDA1
OIDE_PDA0
OIDE_PDCS1#
OCD_DASP#

OCD_CABSEL
Z4403

OJ_ODD2
Z4404

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50

OIDE_PDD8
OIDE_PDD9
OIDE_PDD10
OIDE_PDD11
OIDE_PDD12
OIDE_PDD13
OIDE_PDD14
OIDE_PDD15
OIDE_PDDREQ
OIDE_PDIOR#

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49

OIDE_PDIOW#
OIDE_PDIORDY
OIDE_I RQ
OIDE_PDA1
OIDE_PDA0
OIDE_PDCS1#
OCD_DASP#

OIDE_PDDACK#
Z4405
OIDE_PDDIAG#
OIDE_PDA2
OIDE_PDCS3#

O_5V
OCD_CABSEL
Z4403

Z4406

C15078-100A

OGND

OC3

OC2

OC4

.1U_10V_X7R_04

.1U_10V_X7R_04

1U_10V_06

10U_10V_08

OIDE_PDD8
OIDE_PDD9
OIDE_PDD10
OIDE_PDD11
OIDE_PDD12
OIDE_PDD13
OIDE_PDD14
OIDE_PDD15
OIDE_PDDREQ
OIDE_PDIOR#
OIDE_PDDACK#
Z4405
OIDE_PDDIAG#
OIDE_PDA2
OIDE_PDCS3#

O_5V

Z4406

Sheet 46 of 47
EXTERNAL ODD
BOARD FOR M76

PIN GND1~2 =O GND

OGND

OC1

Z4404

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50

C14309-106A

O_5V

PIN GND1~2 =O GND
OGND

Z4401
Z4402
OCD_RST#
OIDE_PDD7
OIDE_PDD6
OIDE_PDD5
OIDE_PDD4
OIDE_PDD3
OIDE_PDD2
OIDE_PDD1
OIDE_PDD0

OGND

OGND

OH2
C276B197D111

OGND

OH1
C276B197D111

OH3
C67D67

OH4
C67D67

OGND

EXTERNAL ODD BOARD FOR M76 B - 47

B.Schematic Diagrams

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49

Schematic Diagrams

POWER SWITCH BOARD FOR M76
POWER SW & POWER LED FOR M76

SHR1
2
4

220_04
SH_BTN#
2 0mil
20 mil

D0 2
SHC1

SH_3.3VS
SHJ_SW1

Z5101
SHGND

SH_BTN#
SHGND

KPC-3216QBC-C
C

SHGND

SHGND

SHH2
2
3
4
5

SHH4
9
8
7
6

1

2
3
4
5

9
8
7
6

1

SHS1
C126
1

SHH1
C52D52

1

SHH3
C52D52

MTH237D87
SHGND
SHGND

B - 48 POWER SWITCH BOARD FOR M76

SHGND

1
2
3
4
85201-04051_L

Z5102

SHD1

SHH5
C237B52D52N

20mil

*.1U_04

A

Sheet 47 of 47
POWER SWITCH
BOARD FOR M76

1
3

POWER
SWITCH
LED

20 mil

SHSW1
TJG-533-S-T/R

5
6

B.Schematic Diagrams

SH_3.3VS

POW ER BUTTON

MTH237D87
SHGND
SHGND

SJ_SW1
4
1

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Subject                         : Clevo M740J, M740JU, M760J, M760JU - Service Manual. www.s-manuals.com.
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