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W270HNQ/W270HPQ Series Preface Notebook Computer W270HNQ/ W270HPQ Service Manual Preface I Preface Notice The company reserves the right to revise this publication or to change its contents without notice. Information contained herein is for reference only and does not constitute a commitment on the part of the manufacturer or any subsequent vendor. They assume no responsibility or liability for any errors or inaccuracies that may appear in this publication nor are they in anyway responsible for any loss or damage resulting from the use (or misuse) of this publication. This publication and any accompanying software may not, in whole or in part, be reproduced, translated, transmitted or reduced to any machine readable form without prior consent from the vendor, manufacturer or creators of this publication, except for copies kept by the user for backup purposes. Preface Brand and product names mentioned in this publication may or may not be copyrights and/or registered trademarks of their respective companies. They are mentioned for identification purposes only and are not intended as an endorsement of that product or its manufacturer. Version 1.0 May 2011 Trademarks Intel and Intel Core are trademarks of Intel Corporation. Windows® is a registered trademark of Microsoft Corporation. Other brand and product names are trademarks and /or registered trademarks of their respective companies. II Preface About this Manual This manual is intended for service personnel who have completed sufficient training to undertake the maintenance and inspection of personal computers. It is organized to allow you to look up basic information for servicing and/or upgrading components of the W270HNQ/ W270HPQ series notebook PC. The following information is included: Chapter 1, Introduction, provides general information about the location of system elements and their specifications. Chapter 2, Disassembly, provides step-by-step instructions for disassembling parts and subsystems and how to upgrade elements of the system. Preface Appendix A, Part Lists Appendix B, Schematic Diagrams Appendix C, Updating the FLASH ROM BIOS III Preface IMPORTANT SAFETY INSTRUCTIONS Follow basic safety precautions, including those listed below, to reduce the risk of fire, electric shock and injury to persons when using any electrical equipment: Preface 1. Do not use this product near water, for example near a bath tub, wash bowl, kitchen sink or laundry tub, in a wet basement or near a swimming pool. 2. Avoid using a telephone (other than a cordless type) during an electrical storm. There may be a remote risk of electrical shock from lightning. 3. Do not use the telephone to report a gas leak in the vicinity of the leak. 4. Use only the power cord and batteries indicated in this manual. Do not dispose of batteries in a fire. They may explode. Check with local codes for possible special disposal instructions. 5. This product is intended to be supplied by a Listed Power Unit with an AC Input of 100 - 240V, 50 - 60Hz, DC Output of 19V, 4.74A (90W) minimum AC/DC Adapter. CAUTION This Computer’s Optical Device is a Laser Class 1 Product FCC Statement This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: This device may not cause harmful interference. This device must accept any interference received, including interference that may cause undesired operation. IV Preface Instructions for Care and Operation The notebook computer is quite rugged, but it can be damaged. To prevent this, follow these suggestions: 1. Don’t drop it, or expose it to shock. If the computer falls, the case and the components could be damaged. Do not expose the computer to any shock or vibration. 2. Do not place anything heavy on the computer. Keep it dry, and don’t overheat it. Keep the computer and power supply away from any kind of heating element. This is an electrical appliance. If water or any other liquid gets into it, the computer could be badly damaged. Do not leave it in a place where foreign matter or moisture may affect the system. Don’t use or store the computer in a humid environment. Do not place the computer on any surface which will block the vents. Preface Do not expose it to excessive heat or direct sunlight. 3. Do not place it on an unstable surface. Follow the proper working procedures for the computer. Shut the computer down properly and don’t forget to save your work. Remember to periodically save your data as data may be lost if the battery is depleted. Do not turn off the power until you properly shut down all programs. Do not turn off any peripheral devices when the computer is on. Do not disassemble the computer by yourself. Perform routine maintenance on your computer. V Preface 4. 5. Avoid interference. Keep the computer away from high capacity transformers, electric motors, and other strong magnetic fields. These can hinder proper performance and damage your data. Take care when using peripheral devices. Use only approved brands of peripherals. Unplug the power cord before attaching peripheral devices. Preface Power Safety The computer has specific power requirements: VI • • Power Safety Warning • Before you undertake any upgrade procedures, make sure that you have turned off the power, and disconnected all peripherals and cables (including telephone lines). It is advisable to also remove your battery in order to prevent accidentally turning the machine on. • • • Only use a power adapter approved for use with this computer. Your AC adapter may be designed for international travel but it still requires a steady, uninterrupted power supply. If you are unsure of your local power specifications, consult your service representative or local power company. The power adapter may have either a 2-prong or a 3-prong grounded plug. The third prong is an important safety feature; do not defeat its purpose. If you do not have access to a compatible outlet, have a qualified electrician install one. When you want to unplug the power cord, be sure to disconnect it by the plug head, not by its wire. Make sure the socket and any extension cord(s) you use can support the total current load of all the connected devices. Before cleaning the computer, make sure it is disconnected from any external power supplies. Do not plug in the power cord if you are wet. Do not use the power cord if it is broken. Do not place heavy objects on the power cord. Preface Battery Precautions • Only use batteries designed for this computer. The wrong battery type may explode, leak or damage the computer. • Do not continue to use a battery that has been dropped, or that appears damaged (e.g. bent or twisted) in any way. Even if the computer continues to work with a damaged battery in place, it may cause circuit damage, which may possibly result in fire. • Recharge the batteries using the notebook’s system. Incorrect recharging may make the battery explode. • Do not try to repair a battery pack. Refer any battery pack repair or replacement to your service representative or qualified service personnel. • Keep children away from, and promptly dispose of a damaged battery. Always dispose of batteries carefully. Batteries may explode or leak if exposed to fire, or improperly handled or discarded. • Keep the battery away from metal appliances. • Affix tape to the battery contacts before disposing of the battery. • Do not touch the battery contacts with your hands or metal objects. Battery Guidelines Preface The following can also apply to any backup batteries you may have. • If you do not use the battery for an extended period, then remove the battery from the computer for storage. • Before removing the battery for storage charge it to 60% - 70%. • Check stored batteries at least every 3 months and charge them to 60% - 70%. Battery Disposal The product that you have purchased contains a rechargeable battery. The battery is recyclable. At the end of its useful life, under various state and local laws, it may be illegal to dispose of this battery into the municipal waste stream. Check with your local solid waste officials for details in your area for recycling options or proper disposal. Caution Danger of explosion if battery is incorrectly replaced. Replace only with the same or equivalent type recommended by the manufacturer. Discard used battery according to the manufacturer’s instructions. Battery Level Click the battery icon in the taskbar to see the current battery level and charge status. A battery that drops below a level of 10% will not allow the computer to boot up. Make sure that any battery that drops below 10% is recharged within one week. VII Preface Related Documents You may also need to consult the following manual for additional information: User’s Manual on CD/DVD This describes the notebook PC’s features and the procedures for operating the computer and its ROM-based setup program. It also describes the installation and operation of the utility programs provided with the notebook PC. System Startup Remove all packing materials. Place the computer on a stable surface. Insert the battery and make sure it is locked in position. Securely attach any peripherals you want to use with the computer (e.g. keyboard and mouse) to their ports. 5. Attach the AC/DC adapter to the DC-In jack at the left of the computer, then plug the AC power cord into an outlet, and connect the AC power cord to the AC/DC adapter. 6. Use one hand to raise the lid/LCD to a comfortable viewing angle (do not exceed 130 degrees); use the other hand (as illustrated in Figure 1) to support the base of the computer (Note: Never lift the computer by the lid/LCD). 7. Press the power button to turn the computer “on”. Preface 1. 2. 3. 4. Figure 1 Opening the Lid/LCD/ Computer with AC/DC Adapter Plugged-In VIII Shut Down 130 ﾟ Note that you should always shut your computer down by choosing Shut Down from the Start Menu. This will help prevent hard disk or system problems. Preface Contents Introduction ..............................................1-1 Disassembly ...............................................2-1 Overview .........................................................................................2-1 Maintenance Tools ..........................................................................2-2 Connections .....................................................................................2-2 Maintenance Precautions .................................................................2-3 Disassembly Steps ...........................................................................2-4 Removing the Battery ......................................................................2-5 Removing the Hard Disk Drive .......................................................2-6 Removing the Optical (CD/DVD) Device ......................................2-8 Removing the System Memory (RAM) ..........................................2-9 Removing and Installing a Processor ............................................2-11 Removing the Wireless LAN Module ...........................................2-14 Removing the Keyboard ................................................................2-15 Part Lists ..................................................A-1 Part List Illustration Location ........................................................ A-2 Top ................................................................................................. A-3 Bottom ............................................................................................ A-4 Schematic Diagrams................................. B-1 System Block Diagram ...................................................................B-2 Processor 1/7-DMI, FDI, PEG ........................................................B-3 Processor 2/7- CLK, MISC .............................................................B-4 Processor 3/7- (DDR3) ...................................................................B-5 Processor 4/7- Power ......................................................................B-6 Processor 5/7- GFX PWR ...............................................................B-7 Processor 6/7- GND ........................................................................B-8 Processor 7/7- RSVD ......................................................................B-9 DDR3 SO-DIMM_0 .....................................................................B-10 DDR3 SO-DIMM_1 .....................................................................B-11 PANEL, INVERTER, CRT ..........................................................B-12 VGA PCI-E Interace .....................................................................B-13 VGA Frame Buffer Interface ........................................................B-14 VGA Frame Buffer A ...................................................................B-15 VGA Frame Buffer C ...................................................................B-16 VGA I/O .......................................................................................B-17 VGA NVVDD Cecoupling ...........................................................B-18 PCH 1/9- RTC, HDA, SATA .......................................................B-19 PCH 2/9- PCIE, SMBUS, CLK ....................................................B-20 PCH 3/9- DMI, FDI, PWRGD .....................................................B-21 PCH 4/9- LVDS, DDI, CRT .........................................................B-22 PCH 4/9- OCI, USB, RSVD .........................................................B-23 PCH 6/9- GPIO, CPU ...................................................................B-24 PCH 7/9- PWR .............................................................................B-25 PCH 8/9 POWER .........................................................................B-26 PCH 3/9- GRD ..............................................................................B-27 IX Preface Overview .........................................................................................1-1 Specifications ..................................................................................1-2 External Locator - Top View with LCD Panel Open ......................1-4 External Locator - Front & Right Side Views .................................1-5 External Locator - Left Side & Rear View .....................................1-6 External Locator - Bottom View .....................................................1-7 Mainboard Overview - Top (Key Parts) .........................................1-8 Mainboard Overview - Bottom (Key Parts) ....................................1-9 Mainboard Overview - Top (Connectors) .....................................1-10 Mainboard Overview - Bottom (Connectors) ...............................1-11 .......................................................................................................1-12 SATA BLU-RAY COMBO .......................................................... A-5 SATA DVD DUAL ....................................................................... A-6 LCD ............................................................................................... A-7 Preface Preface WLAN 3G MINI PCIE ................................................................ B-28 CCD, TPM, MULTI CON ........................................................... B-29 USB2.0, USB3.0 NEC ................................................................. B-30 Card Reader (JMC251 C) ............................................................. B-31 SATA ODD, LED, USB CHARGE ............................................. B-32 HDMI, RJ45 ................................................................................. B-33 AUDIO CODEC ALC269 ........................................................... B-34 KBC-ITE IT8518E ....................................................................... B-35 5VS, 3VS, 3.3VM, 1.5VS CPU ................................................... B-36 VDD3, VDD5 ............................................................................... B-37 Power 0.85VS, 1.8VS, PEX VDD ............................................... B-38 POWER 1.5V/1.05VS/0.75V ....................................................... B-39 POWER VCORE1 ....................................................................... B-40 POWER VCORE2 ....................................................................... B-41 Power VGA NVVDD ................................................................... B-42 AC IN, CHARGER ...................................................................... B-43 AUDIO BOARD .......................................................................... B-44 CLICK BOARD ........................................................................... B-45 W251HPQ POWER SW BOARD ............................................... B-46 W270HU BRIDGE ODD BOARD .............................................. B-47 W270HU POWER SW BOARD ................................................. B-48 Power Diagram ............................................................................. B-49 Power On SEQ ............................................................................. B-50 Updating the FLASH ROM BIOS......... C-1 To update the FLASH ROM BIOS you must: C-1 Download the BIOS ....................................................................... C-1 Unzip the downloaded files to a bootable CD/DVD/ or USB Flash drive ................................................................................................ C-1 Set the computer to boot from the external drive ........................... C-1 Use the flash tools to update the BIOS .......................................... C-2 Restart the computer (booting from the HDD) .............................. C-2 X Introduction Chapter 1: Introduction Overview This manual covers the information you need to service or upgrade the W270HNQ/W270HPQ series notebook computer. Information about operating the computer (e.g. getting started, and the Setup utility) is in the User’s Manual. Information about dri-vers (e.g. VGA & audio) is also found in the User’s Manual. The manual is shipped with the computer. Operating systems (e.g. Window 7, etc.) have their own manuals as do application softwares (e.g. word processing and database programs). If you have questions about those programs, you should consult those manuals. 1.Introduction The W270HNQ/W270HPQ series notebook is designed to be upgradeable. See Disassembly on page 2 - 1 for a detailed description of the upgrade procedures for each specific component. Please take note of the warning and safety information indicated by the “” symbol. The balance of this chapter reviews the computer’s technical specifications and features. Overview 1 - 1 Introduction Specifications Latest Specification Information 1.Introduction The specifications listed here are correct at the time of sending them to the press. Certain items (particularly processor types/speeds) may be changed, delayed or updated due to the manufacturer's release schedule. Check with your service center for more details. CPU The CPU is not a user serviceable part. Accessing the CPU in any way may violate your warranty. Processor Options Memory Intel® Core™ i7 Processor i7-2820QM (2.30GHz) 8MB L3 Cache, 32nm, DDR3-1600MHz, TDP 45W i7-2720QM (2.20GHz) 6MB L3 Cache, 32nm, DDR3-1600MHz, TDP 45W i7-2630QM (2.00GHz) 6MB L3 Cache, 32nm, DDR3-1333MHz, TDP 45W i7-2620M (2.70GHz) 4MB L3 Cache, 32nm, DDR3-1333MHz, TDP 35W Intel® Core™ i5 Processor i5-2540M (2.60GHz), i5-2520M (2.50GHz), i5-2410M (2.30GHz) 3MB L3 Cache, 32nm, DDR3-1333MHz, TDP 35W Intel® Core™ i3 Processor i3-2310M (2.10GHz) 3MB L3 Cache, 32nm, DDR3-1333MHz, TDP 35W Two 204 Pin SO-DIMM Sockets Supporting DDR3 1333/ 1600MHz Memory Memory Expandable up to 8GB Core Logic Intel® HM65 Chipset Storage (Factory Option) One Changeable 12.7mm(h) Optical Device Type Drive (Super Multi Drive Module or Blu-Ray Combo Drive Module) One Changeable 2.5" 9.5mm (h) SATA HDD Audio High Definition Audio Compliant Interface 3D Stereo Enhanced with THX Sound System 2 * Built-In Speakers Built-In Microphone Security BIOS Security (Kensington® Type) Lock Slot BIOS Password One 32Mb SPI Flash ROM AMI BIOS Keyboard LCD W270HNQ: 17.3" (43.94cm) HD+/ FHD LCD W270HPQ: 17.3" (43.94cm) HD+ LCD 1 - 2 Specifications (The real memory operating frequency depends on the FSB of the processor.) Full-size “WinKey” keyboard (with numeric keypad) Pointing Device Built-in Touchpad Introduction Video Adapter Interface Dimensions & Weight W270HNQ: One USB 2.0 Port Two USB 3.0 Ports One eSATA Port One HDMI-Out Port One External Monitor Port One Headphone-Out Jack One Microphone-In Jack One RJ-45 LAN Jack One DC-in Jack 413mm (w) * 270mm (d) * 14 - 40.5mm (h) 2.99 kg (with 48.84WH Battery and ODD) Intel® GMA HD and NVIDIA® GeForce GT 540M Supports NVIDIA® Optimus Technology Intel Integrated GPU (Intel® GMA HD): Microsoft DirectX®10.1 Compatible NVIDIA Discrete GPU (NVIDIA® GeForce GT 540M): 2GB GDDR3 Video RAM Microsoft DirectX®11 Compatible W270HPQ: Intel Integrated GPU (Intel® GMA HD): Microsoft DirectX®10.1 Compatible Embedded Multi-In-1 Card Reader MMC (MultiMedia Card) / RS MMC SD (Secure Digital) / Mini SD / SDHC/ SDXC MS (Memory Stick) / MS Pro / MS Duo Mini Card Slot NVIDIA Discrete GPU (NVIDIA® GeForce GT 520M): 1GB GDDR3 Video RAM Microsoft DirectX®11 Compatible Slot 1 for WLAN Module or WLAN and Bluetooth Combo Module Communication Environmental Spec Built-In Gigabit Ethernet LAN (Factory Option) 1.3M/2.0M Pixel USB PC Camera Module Temperature Operating: 5°C - 35°C Non-Operating: -20°C - 60°C Relative Humidity Operating: 20% - 80% Non-Operating: 10% - 90% WLAN/ Bluetooth Half Mini-Card Modules: (Factory Option) Intel® Centrino® Advanced-N 6230 Wireless LAN (802.11a/g/n) + Bluetooth 3.0 (Factory Option) Intel® Centrino® Wireless-N 1030 Wireless LAN (802.11b/g/n) + Bluetooth 3.0 (Factory Option) Third-Party Wireless LAN (802.11b/g/n) (Factory Option) Third-Party Wireless LAN (802.11b/g/n) + Bluetooth 3.0 1.Introduction Intel® GMA HD and NVIDIA® GeForce GT 520M Supports NVIDIA® Optimus Technology Card Reader Power Full Range AC/DC Adapter AC Input: 100 - 240V, 50 - 60Hz DC Output: 19V, 4.74A (90W) 6 Cell Smart Lithium-Ion Battery Pack, 48.84WH (Factory Option) 6 Cell Smart Lithium-Ion Battery Pack, 62.16WH Specifications 1 - 3 Introduction Figure 1 External Locator - Top View with LCD Panel Open Top View 1.Introduction 1 1. PC Camera (Optional) 2. LCD 3. Power Button 4. LED Status Indicators 5. Keyboard 6. Built-In Microphone 7. Touchpad & Buttons 2 17.3” (43.94cm) 4 3 5 6 7 1 - 4 External Locator - Top View with LCD Panel Open Introduction External Locator - Front & Right Side Views Figure 2 Front View 1. LED Power Indicators FRONT VIEW 1 RIGHT SIDE VIEW 1 2 3 4 5 6 1. Microphone-In Jack 2. Headphone-Out Jack 3. USB 2.0 Port 4. Optical Device Drive Bay 5. Emergency Eject Hole 6. Security Lock Slot External Locator - Front & Right Side Views 1 - 5 1.Introduction Figure 3 Right Side View Introduction External Locator - Left Side & Rear View Figure 4 1.Introduction Left Side View 1. DC-In Jack 2. External Monitor Port 3. RJ-45 LAN Jack 4. HDMI-Out Port 5. USB 3.0 Ports 6. Vent 7. e-SATA Port 8. Multi-in-1 Card Reader / LEFT SIDE VIEW 1 2 Figure 5 4 5 6 REAR VIEW Rear View 1. Battery 1 1 - 6 External Locator - Left Side & Rear View 7 5 3 8 Introduction External Locator - Bottom View Figure 6 Bottom View 1. Battery 2. Component Bay Cover 3. Vent 4. Hard Disk Bay Cover 5. Speakers 1 3 3 1.Introduction 2 3 4 3 Overheating 5 5 To prevent your computer from overheating, make sure nothing blocks any vent while the computer is in use. External Locator - Bottom View 1 - 7 Introduction Figure 7 Mainboard Overview - Top (Key Parts) Mainboard Top Key Parts 1.Introduction 1. KBC-ITE IT8518 2. Audio Codec ALC269 3. JMICRO JMC251 C 3 1 - 8 Mainboard Overview - Top (Key Parts) 2 1 Introduction Mainboard Overview - Bottom (Key Parts) Figure 8 Mainboard Bottom Key Parts 5 3 2 1 6 Mainboard Overview - Bottom (Key Parts) 1 - 9 1.Introduction 4 1. Memory Slots DDR3 SO-DIMM 2. CMOS Battery 3. Mini-Card Connector (WLAN Module) 4. CPU Socket (no CPU installed) 5. nVIDIA VGA 6. Platform Controller Hub Introduction Figure 9 Mainboard Overview - Top (Connectors) Mainboard Top Connectors 1.Introduction 1. 2. 3. 4. HDMI-Out Port USB Port 3.0 eSATA Port Speaker Cable Connector 5. Microphone Cable Connector 6. Audio Board Connector 7. TouchPad Cable Connector 1 8. TouchPad Cable Connector 2 9. Keyboard Cable Connector 10. Switch Board Cable Connector 10 1 2 9 5 8 7 2 3 6 4 1 - 10 Mainboard Overview - Top (Connectors) Introduction Mainboard Overview - Bottom (Connectors) Figure 10 7 8 6 9 5 Mainboard Bottom Connectors 1 3 2 4 Mainboard Overview - Bottom (Connectors) 1 - 11 1.Introduction 1. ODD Connector 2. HDD Connector 3. CPU Fan Cable Connector 4. Multi-in-1 Card Reader 5. RJ-45 LAN Jack 6. External Monitor Port 7. DC-In Jack 8. CCD Cable Connector 9. LCD Cable Connector 1.Introduction Introduction 1 - 12 Disassembly Chapter 2: Disassembly Overview This chapter provides step-by-step instructions for disassembling the W270HNQ/W270HPQ series notebook’s parts and subsystems. When it comes to reassembly, reverse the procedures (unless otherwise indicated). We suggest you completely review any procedure before you take the computer apart. To make the disassembly process easier each section may have a box in the page margin. Information contained under the figure # will give a synopsis of the sequence of procedures involved in the disassembly procedure. A box with a lists the relevant parts you will have after the disassembly process is complete. Note: The parts listed will be for the disassembly procedure listed ONLY, and not any previous disassembly step(s) required. Refer to the part list for the previous disassembly procedure. The amount of screws you should be left with will be listed here also. Information A box with a will also provide any possible helpful information. A box with a contains warnings. An example of these types of boxes are shown in the sidebar. Warning Overview 2 - 1 2.Disassembly Procedures such as upgrading/replacing the RAM, optical device and hard disk are included in the User’s Manual but are repeated here for your convenience. Disassembly NOTE: All disassembly procedures assume that the system is turned OFF, and disconnected from any power supply (the battery is removed too). Maintenance Tools The following tools are recommended when working on the notebook PC: 2.Disassembly • • • • • • M3 Philips-head screwdriver M2.5 Philips-head screwdriver (magnetized) M2 Philips-head screwdriver Small flat-head screwdriver Pair of needle-nose pliers Anti-static wrist-strap Connections Connections within the computer are one of four types: 2 - 2 Overview Locking collar sockets for ribbon connectors To release these connectors, use a small flat-head screwdriver to gently pry the locking collar away from its base. When replacing the connection, make sure the connector is oriented in the same way. The pin1 side is usually not indicated. Pressure sockets for multi-wire connectors To release this connector type, grasp it at its head and gently rock it from side to side as you pull it out. Do not pull on the wires themselves. When replacing the connection, do not try to force it. The socket only fits one way. Pressure sockets for ribbon connectors To release these connectors, use a small pair of needle-nose pliers to gently lift the connector away from its socket. When replacing the connection, make sure the connector is oriented in the same way. The pin1 side is usually not indicated. Board-to-board or multi-pin sockets To separate the boards, gently rock them from side to side as you pull them apart. If the connection is very tight, use a small flat-head screwdriver - use just enough force to start. Disassembly Maintenance Precautions The following precautions are a reminder. To avoid personal injury or damage to the computer while performing a removal and/or replacement job, take the following precautions: •Before removing or servicing any part from the computer, turn the computer off and detach any power supplies. •When you want to unplug the power cord or any cable/wire, be sure to disconnect it by the plug head. Do not pull on the wire. 6. Peripherals – Turn off and detach any peripherals. 7. Beware of static discharge. ICs, such as the CPU and main support chips, are vulnerable to static electricity. Before handling any part in the computer, discharge any static electricity inside the computer. When handling a printed circuit board, do not use gloves or other materials which allow static electricity buildup. We suggest that you use an anti-static wrist strap instead. 8. Beware of corrosion. As you perform your job, avoid touching any connector leads. Even the cleanest hands produce oils which can attract corrosive elements. 9. Keep your work environment clean. Tobacco smoke, dust or other air-born particulate matter is often attracted to charged surfaces, reducing performance. 10. Keep track of the components. When removing or replacing any part, be careful not to leave small parts, such as screws, loose inside the computer. Power Safety Warning Before you undertake any upgrade procedures, make sure that you have turned off the power, and disconnected all peripherals and cables (including telephone lines). It is advisable to also remove your battery in order to prevent accidentally turning the machine on. Cleaning Do not apply cleaner directly to the computer, use a soft clean cloth. Do not use volatile (petroleum distillates) or abrasive cleaners on any part of the computer. Overview 2 - 3 2.Disassembly 1. Don't drop it. Perform your repairs and/or upgrades on a stable surface. If the computer falls, the case and other components could be damaged. 2. Don't overheat it. Note the proximity of any heating elements. Keep the computer out of direct sunlight. 3. Avoid interference. Note the proximity of any high capacity transformers, electric motors, and other strong magnetic fields. These can hinder proper performance and damage components and/or data. You should also monitor the position of magnetized tools (i.e. screwdrivers). 4. Keep it dry. This is an electrical appliance. If water or any other liquid gets into it, the computer could be badly damaged. 5. Be careful with power. Avoid accidental shocks, discharges or explosions. Disassembly Disassembly Steps The following table lists the disassembly steps, and on which page to find the related information. PLEASE PERFORM THE DISASSEMBLY STEPS IN THE ORDER INDICATED. To remove the Battery: 1. Remove the battery page 2 - 5 To remove the HDD: 2.Disassembly 1. Remove the battery 2. Remove the HDD page 2 - 5 page 2 - 6 To remove the Optical Device: 1. Remove the battery 2. Remove the Optical device page 2 - 5 page 2 - 8 To remove the System Memory: 1. Remove the battery 2. Remove the system memory page 2 - 5 page 2 - 9 To remove and install a Processor: 1. Remove the battery 2. Remove the processor 3. Install the processor page 2 - 5 page 2 - 11 page 2 - 13 To remove the Wireless LAN Module: 1. Remove the battery 2. Remove the WLAN module page 2 - 5 page 2 - 14 To remove the Keyboard: 1. Remove the battery 2. Remove the keyboard 2 - 4 Disassembly Steps page 2 - 5 page 2 - 15 Disassembly Removing the Battery 1. 2. 3. 4. Figure 1 Battery Removal Turn the computer off, and turn it over. Slide the latch 1 in the direction of the arrow (Figure 1a). Slide the latch 2 in the direction of the arrow, and hold it in place (Figure 1a). Slide the battery 63 in the direction of the arrow 4 (Figure 1b). a. a. Slide the latch and hold it in place. b. Slide the battery in the direction of the arrow. b. 2 4 1 2.Disassembly 3 3. Battery Removing the Battery 2 - 5 Disassembly Removing the Hard Disk Drive Figure 2 HDD Assembly Removal 2.Disassembly a. Locate the HDD bay cover and remove the screws. The hard disk drive can be taken out to accommodate other 2.5" serial (SATA) hard disk drives with a height of 9.5mm (h). Follow your operating system’s installation instructions, and install all necessary drivers and utilities (as outlined in Chapter 4 of the User’s Manual) when setting up a new hard disk. Hard Disk Upgrade Process 1. Turn off the computer, and remove the battery (page 2 - 5). 2. Locate the hard disk bay cover and remove screws 1 & 2 (Figure 2a). a. HDD System Warning New HDD’s are blank. Before you begin make sure: You have backed up any data you want to keep from your old HDD. 1 • 2 Screws 2 - 6 Removing the Hard Disk Drive 2 You have all the CD-ROMs and FDDs required to install your operating system and programs. If you have access to the internet, download the latest application and hardware driver updates for the operating system you plan to install. Copy these to a removable medium. Disassembly 3. 4. 5. 6. 7. Remove the hard disk bay cover 63 (Figure 3b). Grip the tab and slide the hard disk in the direction of arrow 4 (Figure 3c). Lift the hard disk assembly 65 out of the bay 6 (Figure 3d). Remove the screw 7 - 10 and the mylar cover 11 from the hard disk 12 (Figure 3e). Reverse the process to install a new hard disk (do not forget to replace all the screws and covers). d. b. 6 b. Remove the HDD bay cover. c. Grip the tab and slide the HDD assembly in the direction of the arrow. d. Lift the HDD assembly out of the bay. e. Remove the screws and mylar cover. 2.Disassembly 3 Figure 3 HDD Assembly Removal (cont’d.) 5 e. c. 7 10 8 4 11 12 9 3. HDD Bay Cover 5. HDD Assembly 11. Mylar Cover 12. HDD • 4 Screws Removing the Hard Disk Drive 2 - 7 Disassembly Figure 4 Optical Device Removal 1. 2. 3. 4. Turn off the computer, remove the battery (page 2 - 5) and hard disk (page 2 - 6). Remove the screw at point 1 (Figure 4a). Use a screwdriver to carefully push out the optical device 3 at point 2 (Figure 4b). Insert the new device and carefully slide it into the computer (the device only fits one way. DO NOT FORCE IT; The screw holes should line up). 5. Restart the computer to allow it to automatically detect the new device. a. 2.Disassembly a. Remove the screw at point 1 . b. Use a screwdriver to carefully push out the optical device at point 2 . Removing the Optical (CD/DVD) Device b. 3 1 2 3. Optical Device • 1 Screw 2 - 8 Removing the Optical (CD/DVD) Device Disassembly Removing the System Memory (RAM) Figure 5 The computer has two memory sockets for 204 pin Small Outline Dual In-line Memory Modules (SO-DIMM) supporting DDRIII (DDR3) Up to 1066/1333 MHz. The main memory can be expanded up to 8GB. The SO-DIMM modules supported are 1024MB and 2048MB DDRIII Modules. The total memory size is automatically detected by the POST routine once you turn on your computer. Memory Upgrade Process RAM Module Removal a. Remove the screws from the component bay cover. 1. Turn off the computer, turn it over and remove the battery (page 2 - 5). 2. Remove screws 1 - 4 from the component bay cover 5 (Figure 5a). a. 2.Disassembly 2 1 5 4 3 5. Component Cover Bay • 4 Screws Removing the System Memory (RAM) 2 - 9 Disassembly Figure 6 RAM Module Removal (cont’d) 2.Disassembly b. The RAM modules will be visible at point 8 on the mainboard. c. Pull the release latches. d. Remove the module. 3. 4. 5. 6. Carefully (a fan and cable are attached to the under side of the cover) lift up the bay cover. Carefully disconnect the fan cable 6 , and remove the cover 7 . The RAM modules will be visible at point 8 on the mainboard (Figure 5b). Gently pull the two release latches ( 9 & 10 ) on the sides of the memory socket in the direction indicated by the arrows (Figure 5c). The RAM module 11 will pop-up (Figure 5d), and you can then remove it. c. b. 9 7 10 Contact Warning 8 Be careful not to touch the metal pins on the module’s connecting edge. Even the cleanest hands have oils which can attract particles, and degrade the module’s performance. 11. RAM Module 6 6 d. 11 7. Pull the latches to release the second module if necessary. 8. Insert a new module holding it at about a 30° angle and fit the connectors firmly into the memory slot. 9. The module will only fit one way as defined by its pin alignment. Make sure the module is seated as far into the slot as it will go. DO NOT FORCE IT; it should fit without much pressure. 10. Press the module in and down towards the mainboard until the slot levers click into place to secure the module. 11. Replace the component bay cover and the screws (see page 2 - 9). 12. Restart the computer to allow the BIOS to register the new memory configuration as it starts up. 2 - 10 Removing the System Memory (RAM) Disassembly Removing and Installing a Processor Figure 7 Processor Removal Procedure Processor Removal 1. Turn off the computer, turn it over, and remove the battery (page 2 - 5) and the component bay cover (page 2 - 9). 2. The CPU heat sink will be visible at point A . 3. Loosen the CPU heat sink screws in the order 6 , 5 , 4 , 3 , 2 & 1 (the reverse order as indicated on the label Figure 7a). 4. Grip the heat sink tab and carefully lift the heat sink 7 up (Figure 7b) and off the computer at a 60 degree angle. a. Remove the screws from the CPU heatsink. b. Grip the heat sink tab and carefully lift the heat sink up and off the computer at a 60 degree angle. a. 6 5 1 2.Disassembly 4 2 A 3 b. 7 7. Heat Sink • 6 Screws Removing and Installing a Processor 2 - 11 Disassembly Figure 8 Processor Removal (cont’d) d. Turn the release latch to unlock the CPU. e. Lift the CPU out of the socket. 5. 6. 7. 8. Turn the release latch 8 towards the unlock symbol to release the CPU (Figure 9d). Carefully (it may be hot) lift the CPU 9 up and out of the socket (Figure 9e). Reverse the process to install a new CPU. When re-inserting the CPU, pay careful attention to the pin alignment, it will fit only one way (DO NOT FORCE IT!). c. 8 2.Disassembly 8 Unlock Lock d. Caution 9 9. CPU 2 - 12 Removing and Installing a Processor The heat sink, and CPU area in general, contains parts which are subject to high temperatures. Allow the area time to cool before removing these parts. Disassembly Processor Installation Procedure Figure 9 1. Insert the CPU A (Figure 9a), pay careful attention to the pin alignment, it will fit only one way (DO NOT FORCE IT!), and turn the release latch B towards the lock symbol (Figure 9b). 2. Remove the stickers C - D from the heat sink. 3. Insert the heat sink E as indicated in Figure 9d. 4. Tighten the CPU heat sink screws in the order 1 , 2 , 3 , 4 , 5 & 6 (the order as indicated on the label and Figure 9d). 5. Replace the component bay cover (don’t forget to replace the fan cable) and tighten the screws (page 2 - 9). c. a. A Processor Installation a. Insert the CPU. b. Turn the release latch towards the lock symbol. c. Remove the sticker from the heat sink and insert the heat sink. d. Tighten the screws. 2.Disassembly C D d. b. 6 5 1 B 4 2 3 E Note: Tighten the screws in the order as indicated on the label. A. CPU E. Heat Sink • 6 Screws Removing and Installing a Processor 2 - 13 Disassembly Figure 10 Wireless LAN Module Removal 2.Disassembly a. Locate the WLAN. b. Disconnect the cables and remove the screw. c. The WLAN module will pop up. d. Remove the Wireless LAN module. Removing the Wireless LAN Module 1. 2. 3. 4. Turn off the computer, turn it over, and remove the battery (page 2 - 5) and the component bay cover (page 2 - 9). The Wireless LAN module will be visible at point 1 on the mainboard (Figure 11a). Carefully disconnect the cables 2 - 3 ,and then remove the screw 4 (Figure 11b). The Wireless LAN module 5 (Figure 11c) will pop-up, and you can remove it from the computer (Figure 11d). c. a. Note: Make sure you reconnect the antenna cable to the “1 + 2” socket (Figure 11b). 5 1 b. d. 4 3 5.Wireless LAN Module • 1 Screw 2 - 14 Removing the Wireless LAN Module 2 4 5 Disassembly Removing the Keyboard Figure 11 1. Turn off the computer, and remove the battery (page 2 - 5) and the component bay cover (page 2 - 9). 2. Remove screws 1 - 6 from the bottom of the computer (inside the battery compartment), and then press at point 7 to unsnap the LED cover module (use the eject pin tool provided to do this Figure 11a). 3. Turn the computer over, unsnap up the LED cover module 8 from the center of the computer (Figure 11b). 4. Remove screws 9 - 13 from the keyboard (Figure 11c). 5. Carefully lift the keyboard 14 up, being careful not to bend the keyboard ribbon cable 15 . Disconnect the keyboard ribbon cable 15 from the locking collar socket 16 by using a flat-head screwdriver to pry the locking collar pins 17 away from the base (Figure 11d). 6. Carefully lift up the keyboard 14 (Figure 11e) off the computer. d. 14 1 6 7 4 2 5 15 3 17 b. a. Remove screws from the bottom of the computer. b. Turn the computer over, unsnap up the LED cover module from the center of the computer. c. Remove screws from the keyboard. d. Carefully lift the keyboard up and disconnect the keyboard ribbon cable from the locking collar socket by using a flathead screwdriver to pry the locking collar pins away from the base. e. Remove the keyboard. 17 16 8 e. Re-Inserting the Keyboard c. 9 10 11 12 13 14 Keyboard Tabs When re-inserting the keyboard firstly align the four keyboard tabs at the bottom (Figure 11e) at the bottom of the keyboard with the slots in the case. 8. LED Cover Module 14. Keyboard 11 Screws Removing the Keyboard 2 - 15 2.Disassembly a. Keyboard Removal 2.Disassembly Disassembly 2 - 16 Appendix A:Part Lists This appendix breaks down the W270HNQ/W270HPQ series notebook’s construction into a series of illustrations. The component part numbers are indicated in the tables opposite the drawings. Note: This section indicates the manufacturer’s part numbers. Your organization may use a different system, so be sure to cross-check any relevant documentation. Note: Some assemblies may have parts in common (especially screws). However, the part lists DO NOT indicate the total number of duplicated parts used. A.Part Lists Note: Be sure to check any update notices. The parts shown in these illustrations are appropriate for the system at the time of publication. Over the product life, some parts may be improved or re-configured, resulting in new part numbers. A - 1 Part List Illustration Location The following table indicates where to find the appropriate part list illustration. Table A - 1 A.Part Lists Part List Illustration Location A - 2 Part W270HNQ/W270HPQ Top page A - 3 Bottom page A - 4 SATA BLU-RAY COMBO page A - 5 SATA DVD DUAL page A - 6 LCD page A - 7 Top Top 灰色 Top A - 3 A.Part Lists Figure A - 1 Bottom A.Part Lists Figure A - 2 Bottom A - 4 Bottom SATA BLU-RAY COMBO SATA BLU-RAY COMBO 志精 SATA BLU-RAY COMBO A - 5 A.Part Lists Figure 3 A.Part Lists SATA DVD DUAL Figure 4 SATA DVD DUAL 志精 A - 6 SATA DVD DUAL LCD Figure A - 5 LCD A - 7 A.Part Lists LCD A - 8 A.Part Lists Schematic Diagrams Appendix B: Schematic Diagrams This appendix has circuit diagrams of the W270HNQ/W270HPQ notebook’s PCB’s. The following table indicates where to find the appropriate schematic diagram. Diagram - Page Diagram - Page Diagram - Page PCH 1/9- RTC, HDA, SATA - Page B - 19 5VS, 3VS, 3.3VM, 1.5VS CPU - Page B - 36 Processor 1/7-DMI, FDI, PEG - Page B - 3 PCH 2/9- PCIE, SMBUS, CLK - Page B - 20 VDD3, VDD5 - Page B - 37 Processor 2/7- CLK, MISC - Page B - 4 PCH 3/9- DMI, FDI, PWRGD - Page B - 21 Power 0.85VS, 1.8VS, PEX VDD - Page B - 38 Processor 3/7- (DDR3) - Page B - 5 PCH 4/9- LVDS, DDI, CRT - Page B - 22 POWER 1.5V/1.05VS/0.75V - Page B - 39 Processor 4/7- Power - Page B - 6 PCH 4/9- OCI, USB, RSVD - Page B - 23 POWER VCORE1 - Page B - 40 Processor 5/7- GFX PWR - Page B - 7 PCH 6/9- GPIO, CPU - Page B - 24 POWER VCORE2 - Page B - 41 Processor 6/7- GND - Page B - 8 PCH 7/9- PWR - Page B - 25 Power VGA NVVDD - Page B - 42 Processor 7/7- RSVD - Page B - 9 PCH 8/9 POWER - Page B - 26 AC IN, CHARGER - Page B - 43 DDR3 SO-DIMM_0 - Page B - 10 PCH 3/9- GRD - Page B - 27 AUDIO BOARD - Page B - 44 DDR3 SO-DIMM_1 - Page B - 11 WLAN 3G MINI PCIE - Page B - 28 CLICK BOARD - Page B - 45 PANEL, INVERTER, CRT - Page B - 12 CCD, TPM, MULTI CON - Page B - 29 W251HPQ POWER SW BOARD - Page B - 46 VGA PCI-E Interace - Page B - 13 USB2.0, USB3.0 NEC - Page B - 30 W270HU BRIDGE ODD BOARD - Page B - 47 VGA Frame Buffer Interface - Page B - 14 Card Reader (JMC251 C) - Page B - 31 W270HU POWER SW BOARD - Page B - 48 VGA Frame Buffer A - Page B - 15 SATA ODD, LED, USB CHARGE - Page B - 32 Power Diagram - Page B - 49 VGA Frame Buffer C - Page B - 16 HDMI, RJ45 - Page B - 33 Power On SEQ - Page B - 50 VGA I/O - Page B - 17 AUDIO CODEC ALC269 - Page B - 34 VGA NVVDD Cecoupling - Page B - 18 KBC-ITE IT8518E - Page B - 35 Table B - 1 SCHEMATIC DIAGRAMS Version Note The schematic diagrams in this chapter are based upon version 6-7P-W25p6-001 If your mainboard (or other boards) are a later version, please check with the Service Center for updated diagrams (if required). B - 1 B.Schematic Diagrams System Block Diagram - Page B - 2 Schematic Diagrams System Block Diagram VDD3,VDD5 W251HPQ/ W251HNQ Huron River System Block Diagram GPU NVDIDA GV2 NVVDD W251HPQ 6I N1 6-7P-W25P6-001 W251HPQ MAIN BOARD 6-71-W25P0-D02 PCIE*8 AUDIO BOARD P HO NE J AC K x2 , US B x1 5V,3V,5VS,3VS,1.5VS, 1.8VS,+1.5S_CPU B.Schematic Diagrams 1.8V, PEX_VDD,0.85VS 1.5V,0.75VS(VTT_MEM) FBVDDQ Nvidia Fermi N12P RAM SIZE:1~2GB (64MX16) 969 Balls PROCESSOR 6-71-W25P2-D02 DMI*4 <= 8" EC /B IO S SP I DDRIII SO-DIMM1 W270HU POWER SW B'd MIC IN 6-71-W25PN-D01 HP OUT U SB P OR T (U SB 1) (INT SPK R) T PM 1 .2 Op ti on al 32.768 KHz EC I TE 8 51 8E 128pins LQFP LPC 33 MHz 0. 5" ~1 1" INT MIC SHEET 18,19,20,21,22,23,24,25,26 1 4*14 *1. 6mm 24 MHz TH ER MA L SE NS OR G711ST9U S MA RT F AN S MA RT B AT TE RY A C- IN SATA I/II 3.0Gb/s PCIE SA TA O DD eS AT A USB2.0 480 Mbps < 12 " U SB 3. 0 NE C u PD 72 02 00 25 MH z <1 2" M in i PC IE S OC KE T 3 G MS AT A CA RD (U SB 2/ SA TA 3) Mi ni P CI E S OC KE T WL AN ( US B3 ) JM IC RO JMC251_C CARD LAN READER (Optional) (Lo w Power) RJ -4 5 U SB P OR T (U SB 8) US B PO RT 1 ( US B0 ) C CD (U SB 5) US B PO RT 2 W2 70 HU BR ID GE OD D BO AR D 100 MHz 32.768KHz 1" ~1 6" B - 2 System Block Diagram AZALIA LINK EC SMBUS IN T. K/ B SA TA H DD INT SPKER-L Az al ia C od ec REALTAK ALC269 25x25mm 989 Ball FCBGA US B PO RT 3 U SB 2.0 /U SB 3. 0 6-71-W25PS-D11 W270HU BRIDGE ODD B'd INT SPKER-R CougarPoint Controller Hub (PCH) HD MI C on ne ct or W251HPQ POWER SW B'd AU DI O BO AR D < 8" < 15" LC CR D T CO CO NN NN EC EC TO TO R R DDRIII SO-DIMM2 6-71-W25PS-D02 0. 1"~ 13 0. 5" ~5 .5 " S EN TEL IC 6-49-C 4102 -010 T OUCKCHBOPA D CLI ARD CLICK BOARD SYSTEM SMBUS FDI Sheet 1 of 49 System Block Diagram 800/1067/1333 MHz DDR3 / 1.5V rPGA989/988 1.05VS_VTT VGFX_CORE 6-71-W25P8-D02 Sandy Bridge 7I N1 SO CK ET Schematic Diagrams Processor 1/7-DMI, FDI, PEG Sandy Bridge Processor 1/7 ( DMI,PEG,FDI ) CPU H9 H1 7 H1 3 H6 _ 3 D4 _ 4 H6 _ 3 D4 _ 4 H6 _ 3 D4 _ 4 1 . 0 5V S _ V T T U2 9 A D M I _T X P 0 D M I _T X P 1 D M I _T X P 2 D M I _T X P 3 B 28 B 26 A 24 B 23 20 20 20 20 D D D D MI _ R MI _ R MI _ R MI _ R XN XN XN XN 0 1 2 3 20 20 20 20 D D D D MI _ R MI _ R MI _ R MI _ R XP XP XP XP 0 1 2 3 20 20 20 20 20 20 20 20 FD FD FD FD FD FD FD FD I _ T XN I _ T XN I _ T XN I _ T XN I _ T XN I _ T XN I _ T XN I _ T XN 0 1 2 3 4 5 6 7 20 20 20 20 20 20 20 20 FD FD FD FD FD FD FD FD I _ T XP I _ T XP I _ T XP I _ T XP I _ T XP I _ T XP I _ T XP I _ T XP 0 1 2 3 4 5 6 7 20 20 F DI_ F S Y NC 0 F DI_ F S Y NC 1 20 F DI_ IN T 20 20 F DI_ L S Y NC 0 F DI_ L S Y NC 1 G 21 E 22 F 21 D 21 G 22 D 22 F 20 C 21 A 21 H 19 E 19 F 18 B 21 C 20 D 18 E 17 A 22 G 19 E 20 G 18 B 20 C 19 D 19 F 17 J 18 J 17 DM DM DM DM P E G _ I C O MP I P E G_ I C OM P O P E G _ R C OM P O I_ RX # [0 ] I_ RX # [1 ] I_ RX # [2 ] I_ RX # [3 ] DM I_ RX [0 ] DM I_ RX [1 ] DM I_ RX [2 ] DM I_ RX [3 ] DM DM DM DM I _ TX # [ 0 ] I _ TX # [ 1 ] I _ TX # [ 2 ] I _ TX # [ 3 ] DM DM DM DM I _ TX [ 0 ] I _ TX [ 1 ] I _ TX [ 2 ] I _ TX [ 3 ] F D I 0 _ T X #[ 0 ] F D I 0 _ T X #[ 1 ] F D I 0 _ T X #[ 2 ] F D I 0 _ T X #[ 3 ] F D I 1 _ T X #[ 0 ] F D I 1 _ T X #[ 1 ] F D I 1 _ T X #[ 2 ] F D I 1 _ T X #[ 3 ] F D I 0 _ T X [ 0] F D I 0 _ T X [ 1] F D I 0 _ T X [ 2] F D I 0 _ T X [ 3] F D I 1 _ T X [ 0] F D I 1 _ T X [ 1] F D I 1 _ T X [ 2] F D I 1 _ T X [ 3] F DI0 _ F S Y NC F DI1 _ F S Y NC H 20 F DI_ IN T 1. 0 5 V S _ V T T R 43 1 J 19 H 17 F DI0 _ L SY N C F DI1 _ L SY N C 2 4. 9_ 1 % _ 04 R 43 2 E D P _ C O MP I O A 18 A 17 E D P _H P D # B 16 DP Compensation Signal D Q 34 * MT N 7 0 0 2 Z H S 3 G E M B _ HP D 11 11 e DP _ A U X P e DP _ A U X N 11 11 11 11 e DP _ T X P 0 e DP _ T X P 1 e DP _ T X P 2 e DP _ T X P 3 11 11 11 11 e DP _ T X N0 e DP _ T X N1 e DP _ T X N2 e DP _ T X N3 C 208 C 199 *0 . 1 u_ 1 0 V _ X 7R _ 0 4 *0 . 1 u_ 1 0 V _ X 7R _ 0 4 D P _ A U X _P D P _ A U X _N C C C C 185 193 186 700 *0 . 1 u_ 1 0 V _ X 7R *0 . 1 u_ 1 0 V _ X 7R *0 . 1 u_ 1 0 V _ X 7R *0 . 1 u_ 1 0 V _ X 7R _04 _04 _04 _04 DP _ T X P _ 0 DP _ T X P _ 1 DP _ T X P _ 2 DP _ T X P _ 3 C 17 F 16 C 16 G 15 C C C C 187 195 192 701 *0 . 1 u_ 1 0 V _ X 7R *0 . 1 u_ 1 0 V _ X 7R *0 . 1 u_ 1 0 V _ X 7R *0 . 1 u_ 1 0 V _ X 7R _04 _04 _04 _04 DP _ T X N_ 0 DP _ T X N_ 1 DP _ T X N_ 2 DP _ T X N_ 3 C 18 E 16 D 16 F 15 C 15 D 15 eD P _ C O MP I O eD P _ I C OM P O eD P _ H P D eD P _ A U X eD P _ A U X# S 11 12/2 R 52 2 * 10 0 K _ 0 4 12/1 eD eD eD eD P _ T X [ 0] P _ T X [ 1] P _ T X [ 2] P _ T X [ 3] eDP * 1K _1 % _ 0 4 12/1 eD P _ T X #[ 0 ] eD P _ T X #[ 1 ] eD P _ T X #[ 2 ] eD P _ T X #[ 3 ] PCI EXPRESS* - GRAPHICS 20 20 20 20 B 27 B 25 A 25 B 24 0 1 2 3 DMI I _T X N I _T X N I _T X N I _T X N Intel( R) FDI 1 .0 5 V S_ VT T DM DM DM DM P E G _R X # [ 0] P E G _R X # [ 1] P E G _R X # [ 2] P E G _R X # [ 3] P E G _R X # [ 4] P E G _R X # [ 5] P E G _R X # [ 6] P E G _R X # [ 7] P E G _R X # [ 8] P E G _R X # [ 9] P E G _ R X # [ 1 0] P E G _ R X # [ 1 1] P E G _ R X # [ 1 2] P E G _ R X # [ 1 3] P E G _ R X # [ 1 4] P E G _ R X # [ 1 5] P E G_ R X [ 0] P E G_ R X [ 1] P E G_ R X [ 2] P E G_ R X [ 3] P E G_ R X [ 4] P E G_ R X [ 5] P E G_ R X [ 6] P E G_ R X [ 7] P E G_ R X [ 8] P E G_ R X [ 9] P E G _R X [ 1 0] P E G _R X [ 1 1] P E G _R X [ 1 2] P E G _R X [ 1 3] P E G _R X [ 1 4] P E G _R X [ 1 5] P E G_ T X # [ 0] P E G_ T X # [ 1] P E G_ T X # [ 2] P E G_ T X # [ 3] P E G_ T X # [ 4] P E G_ T X # [ 5] P E G_ T X # [ 6] P E G_ T X # [ 7] P E G_ T X # [ 8] P E G_ T X # [ 9] P E G _T X # [ 1 0] P E G _T X # [ 1 1] P E G _T X # [ 1 2] P E G _T X # [ 1 3] P E G _T X # [ 1 4] P E G _T X # [ 1 5] P E G_ T X [ 0] P E G_ T X [ 1] P E G_ T X [ 2] P E G_ T X [ 3] P E G_ T X [ 4] P E G_ T X [ 5] P E G_ T X [ 6] P E G_ T X [ 7] P E G_ T X [ 8] P E G_ T X [ 9] P E G_ T X [ 1 0] P E G_ T X [ 1 1] P E G_ T X [ 1 2] P E G_ T X [ 1 3] P E G_ T X [ 1 4] P E G_ T X [ 1 5] K3 3 M3 5 L 34 J 35 J 32 H3 4 H3 1 G3 3 G3 0 F35 E3 4 E3 2 D3 3 D3 1 B3 3 C3 2 P E G _I R C O M P _ R P P P P P P P P E G_ R E G_ R E G_ R E G_ R E G_ R E G_ R E G_ R E G_ R X# 0 X# 1 X# 2 X# 3 X# 4 X# 5 X# 6 X# 7 P P P P P P P P E G_ R E G_ R E G_ R E G_ R E G_ R E G_ R E G_ R E G_ R X0 X1 X2 X3 X4 X5 X6 X7 R 421 24 . 9 _ 1 % _0 4 12 12 12 12 12 12 12 12 PEG Compensation Signal J 33 L 35 K3 4 H3 5 H3 2 G3 4 G3 1 F33 F30 E3 5 E3 3 F32 D3 4 E3 1 C3 3 B3 2 CAD NOTE: PEG_ICOMPI and RCOMPO signals should be shorted and routed with - max length = 500 mils - typical impedance = 43 mohms PEG_ICOMPO signals should be routed with - max length = 500 mils - typical impedance = 14.5 mohms 12 12 12 12 12 12 12 12 M2 9 M3 2 M3 1 L 32 L 29 K3 1 K2 8 J 30 J 28 H2 9 G2 7 E2 9 F27 D2 8 F26 E2 5 PEG PEG PEG PEG PEG PEG PEG PEG _ TX # _ 0 _ TX # _ 1 _ TX # _ 2 _ TX # _ 3 _ TX # _ 4 _ TX # _ 5 _ TX # _ 6 _ TX # _ 7 C5 4 5 C5 4 2 C5 5 0 C5 5 4 C5 5 6 C5 6 1 C5 6 7 C5 6 9 0. 0. 0. 0. 0. 0. 0. 0. 22 u _ 1 0V _ X 5 R _ 0 4 22 u _ 1 0V _ X 5 R _ 0 4 22 u _ 1 0V _ X 5 R _ 0 4 22 u _ 1 0V _ X 5 R _ 0 4 22 u _ 1 0V _ X 5 R _ 0 4 22 u _ 1 0V _ X 5 R _ 0 4 22 u _ 1 0V _ X 5 R _ 0 4 22 u _ 1 0V _ X 5 R _ 0 4 M2 8 M3 3 M3 0 L 31 L 28 K3 0 K2 7 J 29 J 27 H2 8 G2 8 E2 8 F28 D2 7 E2 6 D2 5 PEG PEG PEG PEG PEG PEG PEG PEG _ TX _ 0 _ TX _ 1 _ TX _ 2 _ TX _ 3 _ TX _ 4 _ TX _ 5 _ TX _ 6 _ TX _ 7 C5 4 0 C5 4 3 C5 4 7 C5 5 3 C5 5 5 C5 6 0 C5 6 5 C5 6 8 0. 0. 0. 0. 0. 0. 0. 0. 22 u _ 1 0V _ X 5 R _ 0 4 22 u _ 1 0V _ X 5 R _ 0 4 22 u _ 1 0V _ X 5 R _ 0 4 22 u _ 1 0V _ X 5 R _ 0 4 22 u _ 1 0V _ X 5 R _ 0 4 22 u _ 1 0V _ X 5 R _ 0 4 22 u _ 1 0V _ X 5 R _ 0 4 22 u _ 1 0V _ X 5 R _ 0 4 P P P P P P P P E G_ T X # 0 E G_ T X # 1 E G_ T X # 2 E G_ T X # 3 E G_ T X # 4 E G_ T X # 5 E G_ T X # 6 E G_ T X # 7 P P P P P P P P E G_ T X 0 E G_ T X 1 E G_ T X 2 E G_ T X 3 E G_ T X 4 E G_ T X 5 E G_ T X 6 E G_ T X 7 Sheet 2 of 49 Processor 1/7-DMI, FDI, PEG 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 Q1 5 5 GN D NC G ND 4 1 2 SC70-5 & SC70-3 Co-lay 3 V CC VO *T M P 2 0 P Z 9 8 8 27 -3 6 4 B -0 1F 3 .3 V Q1 4 M 6-86-27988-000 S 6-86-27988-001 S 6-86-27988-002 2 1 V CC OU T 1:2 (4mils:8mils) T H E R M _ V OL T 34 C2 6 6 3 GN D 0 . 1u _ 1 0 V _ X5 R _ 04 G7 1 1 S T 9 U C2 6 4 0 . 1 u_ 1 0 V _ X 5R _ 0 4 1 PLACE NEAR U2 3 2 3, 5 , 2 3 , 2 4 , 2 5, 3 5 , 3 7 , 3 9 1 . 0 5V S _ V T T 3 , 8 , 11 , 1 6 , 1 8 , 19 , 2 0 , 2 2 , 2 3, 2 4 , 2 5 , 2 7, 2 8 , 2 9 , 3 0, 35 , 3 7 , 3 8 , 39 3 .3 V Processor 1/7-DMI, FDI, PEG B - 3 B.Schematic Diagrams CAD NOTE: DP_COMPIO and ICOMPO signals should be shorted near balls and routed with - typical impedance < 25 mohms 20 20 20 20 20 mil J 22 J 21 H2 2 Schematic Diagrams Processor 2/7- CLK, MISC 1 0 K _ 04 R3 9 9 PU/PD for JTAG signals Sandy Bridge Processor 2/7 ( CLK,MISC,JTAG ) Processor Pull downs 1 . 0 5V S _V T T H _ C P U P W R GD _ R XD XD XD XD XD XD TRACE WIDTH 10MIL, LENGTH <500MILS P _ TM S P _ TD I _ R P _ P RE Q # P _ TD O_ R P _ TC L K P _ TR S T # R4 1 6 R4 1 4 R4 1 5 R4 1 8 R4 2 0 R4 1 0 51 _ 0 4 51 _ 0 4 *5 1 _0 4 51 _ 0 4 51 _ 0 4 51 _ 0 4 U 2 9B 3 .3 VS X DP_ D B R_ R H _P R OC H O T # 23 H _ TH R M T R I P # PEC I H _ P R OC H O T# _ R A L3 2 *1 0 mi l _ sh o rt _ 04 H _ T H R MT R I P #_ R A N3 2 5 6 _1 % _ 0 4 R4 0 1 A N3 3 H_ P E C I_ R P R OC H O T# T H E R MT R I P # S M _R C O MP [ 0 ] S M _R C O MP [ 1 ] S M _R C O MP [ 2 ] R8 2 H _ C P U P W R GD P M S Y S _ P W R GD _ B U F *1 0 mi l _ sh o rt _ 04 H _ C P U P W R GD _ R R 14 4 1 3 0_ 1 % _ 04 AP3 3 P M _S Y N C U N C OR E P W R G OO D V8 V D D P W R GO OD _R S M _D R A MP W R OK Buffered reset to CPU 1. 05 V S _ V T T A R3 3 B UF _ CPU _ RST # 3 .3 V S R ESET # R4 4 1 75 _ 0 4 1 0 K_ 0 4 R4 3 9 3 R 4 36 AK 1 A5 A4 S M_ R C OM P _ 0 S M_ R C OM P _ 1 S M_ R C OM P _ 2 A P 29 A P 27 XD P _ P R D Y # XD P _ P R E Q # AR 2 6 AR 2 7 A P 30 XD P _ TC L K XD P _ TM S XD P _ TR S T # T DI TD O AR 2 8 A P 26 XD P _ TD I _ R XD P _ TD O_ R AL 3 5 XD P _ D B R _R B P M# [ 0 ] B P M# [ 1 ] B P M# [ 2 ] B P M# [ 3 ] B P M# [ 4 ] B P M# [ 5 ] B P M# [ 6 ] B P M# [ 7 ] XD XD XD XD XD XD XD XD P _ B P M0 _ R P _ B P M1 _ R P _ B P M2 _ R P _ B P M3 _ R P _ B P M4 _ R P _ B P M5 _ R P _ B P M6 _ R P _ B P M7 _ R CLOCKS 25 . 5 _ 1% _ 0 4 R4 4 3 20 0 _ 1% _ 0 4 *0 _ 04 Q2 0 MT N 7 0 0 2Z H S 3 S D R2 1 7 1 K_ 0 4 D D R 3 _D R A M R S T # D R A MR S T _ C N T R L 9, 1 0 8 , 19 C6 5 2 0 . 04 7 u _1 0 V _ X7 R _0 4 S3 circuit:- DRAM PWR GOOD logic 3 .3 V 3 . 3V P Z 98 8 2 7-3 6 4 B -0 1F C2 4 8 R1 4 7 R1 5 3 S *2 0 0 _0 4 Q3 1 A S L 2N 7 00 2 D W 1T 1 G 5 1 14 0 _ 1% _ 0 4 R4 4 2 S M_ R C OM P _ 2 R 2 20 1 K_ 0 4 R2 1 8 4 . 9 9K _1 % _ 04 AT2 8 AR 2 9 AR 3 0 AT3 0 A P 32 AR 3 1 AT3 1 AR 3 2 R4 4 6 S M_ R C OM P _ 1 1. 5 V R 22 2 C P U _ D R A MR S T# D BR# S M_ R C OM P _ 0 S3 circuit:- DRAM_RST# to memory should be high during S3 Q3 1 B L 2 N 7 00 2 D W 1T 1 G 4 6 C P U _D R A M R S T # DDR3 Compensation Signals D 2G P L T _ RST # T CK T MS T R S T# 1 K_ 0 4 B U F _ CPU _ RST # 43 _ 1 %_ 0 4 D 5G 1 2 , 22 , 2 8 JTAG & BPM 23 H _ P M_ S Y N C A M3 4 PWR MANAGEMENT 20 *1 0 mi l _ sh o rt _ 04 H _ P M _S Y N C _ R CL K_ D P 1 9 CL K_ D P # 1 9 R 8 S M _ D R A MR S T# P RD Y # P R E Q# R4 0 2 A1 6 A1 5 * 0. 1 u _ 16 V _ Y 5 V _ 04 Sheet 3 of 49 Processor 2/7-CLK, MISC 39 R9 1 *1 0 mi l _ sh o rt _ 04 C A TE R R # D P L L_ R E F _ S S C L K D P L L _R E F _ S S C L K # R4 0 3 C L K _ B C LK 1 9 C L K _ B C LK # 19 * 1 00 K _ 0 4 If PR OC HO T# i s not u se d, th en it m us t be te rm in at ed wi th a 56 -O + -5 % p ul l- up re sis to r to 1 .0 5VS _V TT . R4 0 0 H_ P E CI S KT O CC # A L3 3 A2 8 A2 7 G 2 3, 3 4 R 4 40 1 . 5V S _C P U R1 4 5 20 0 _ 1% _ 0 4 1 1 0 0 K _0 4 20 P M_ D R A M _P W R GD 38 1. 5V S _C P U _ P W R GD 4 P MS Y S _ P W R GD _B U F 3 2 1 . 0 5V S _V T T Processor Pull up R 1 50 U 10 * 7 4A H C 1 G 09 R1 4 8 *3 9 _0 4 0 _0 4 D 3. 3 V S R 88 3. 3 V 34 H _ P R OC H OT # _ E C S D 12/1 Add B - 4 Processor 2/7- CLK, MISC Q 10 M T N 7 0 02 Z H S 3 G S Q 16 * MT N 7 0 0 2Z H S 3 3 . 3V _E N _ D G Q 17 * B S S 1 38 _ N L G R 94 1 0 0 K _0 4 SU SB S H _P R OC H O T # D 1. 5 V S _ C P U _ P W R GD R 15 7 * 10 K _ 0 4 R5 7 2 *1 0 K _0 4 D 1 .5 V S _ CP U 3 5, 3 7 , 3 8 6 2 _ 04 C 1 35 47 p _ 50 V _ N P O _ 04 C AD No te : Ca pac it or n eed t o be p lac ed c los e to b uf fer o utp ut p in 6 , 9 , 10 , 2 5 , 2 9, 3 3 , 3 5, 37 , 3 8 1 . 5 V 6 , 35 1. 5 V S _ C P U 2 , 5, 2 3 , 2 4, 25 , 3 5 , 37 , 3 9 1 . 0 5 V S _ V TT 2 , 8, 1 1 , 1 6, 18 , 1 9 , 20 , 2 2 , 2 3, 2 4 , 2 5, 2 7 , 2 8 , 29 , 3 0 , 3 5, 3 7 , 3 8, 3 9 3 . 3 V 9 , 10 , 1 1 , 12 , 1 8 , 1 9, 2 0 , 2 1, 22 , 2 3 , 24 , 2 5 , 2 7, 2 8 , 3 0, 31 , 3 2 , 33 , 3 4 , 3 5, 3 9 3 . 3 V S 12/1 ? ? ? Q1 3 *MT N 70 0 2 Z H S 3 G TRACE WIDTH 10MIL, LENGTH <500MILS R 1 56 * 1 0K _ 0 4 S B.Schematic Diagrams H_ C A T E RR # MISC P R OC _S E LE C T # A N3 4 DDR3 MISC H _S N B _ I V B # THERMAL 23 B CL K B CL K # C2 6 H _ S NB _ IV B # Schematic Diagrams Processor 3/7- (DDR3) Sandy Bridge Processor 3/7 ( DDR3 ) U29C 9 9 9 M _A_BS0 M _A_BS1 M _A_BS2 9 9 9 M _A_CAS# M _A_RAS# M _A_WE# C5 D5 D3 D2 D6 C6 C2 C3 F10 F8 G10 G9 F9 F7 G8 G7 K4 K5 K1 J1 J5 J4 J2 K2 M8 N10 N8 N7 M10 M9 N9 M7 AG6 AG5 AK6 AK5 AH5 AH6 AJ5 AJ6 AJ8 AK8 AJ9 AK9 AH8 AH9 AL9 AL8 AP11 AN11 AL12 AM12 AM11 AL11 AP12 AN12 AJ14 AH14 AL15 AK15 AL14 AK14 AJ15 AH15 AE10 AF10 V6 AE8 AD9 AF9 SA_DQ [0] SA_DQ [1] SA_DQ [2] SA_DQ [3] SA_DQ [4] SA_DQ [5] SA_DQ [6] SA_DQ [7] SA_DQ [8] SA_DQ [9] SA_DQ [10] SA_DQ [11] SA_DQ [12] SA_DQ [13] SA_DQ [14] SA_DQ [15] SA_DQ [16] SA_DQ [17] SA_DQ [18] SA_DQ [19] SA_DQ [20] SA_DQ [21] SA_DQ [22] SA_DQ [23] SA_DQ [24] SA_DQ [25] SA_DQ [26] SA_DQ [27] SA_DQ [28] SA_DQ [29] SA_DQ [30] SA_DQ [31] SA_DQ [32] SA_DQ [33] SA_DQ [34] SA_DQ [35] SA_DQ [36] SA_DQ [37] SA_DQ [38] SA_DQ [39] SA_DQ [40] SA_DQ [41] SA_DQ [42] SA_DQ [43] SA_DQ [44] SA_DQ [45] SA_DQ [46] SA_DQ [47] SA_DQ [48] SA_DQ [49] SA_DQ [50] SA_DQ [51] SA_DQ [52] SA_DQ [53] SA_DQ [54] SA_DQ [55] SA_DQ [56] SA_DQ [57] SA_DQ [58] SA_DQ [59] SA_DQ [60] SA_DQ [61] SA_DQ [62] SA_DQ [63] SA_BS[0] SA_BS[1] SA_BS[2] SA_CAS# SA_RAS# SA_WE# PZ98827-364B-01F SA_CLK[ 0] SA_ CLK#[ 0] SA_CKE[ 0] SA_CLK[ 1] SA_ CLK#[ 1] SA_CKE[ 1] SA_CLK[ 2] SA_ CLK#[ 2] SA_CKE[ 2] SA_CLK[ 3] SA_ CLK#[ 3] SA_CKE[ 3] SA_CS#[ 0] SA_CS#[ 1] SA_CS#[ 2] SA_CS#[ 3] SA_ODT[ 0] SA_ODT[ 1] SA_ODT[ 2] SA_ODT[ 3] SA_DQS#[ 0] SA_DQS#[ 1] SA_DQS#[ 2] SA_DQS#[ 3] SA_DQS#[ 4] SA_DQS#[ 5] SA_DQS#[ 6] SA_DQS#[ 7] SA_DQS[ 0] SA_DQS[ 1] SA_DQS[ 2] SA_DQS[ 3] SA_DQS[ 4] SA_DQS[ 5] SA_DQS[ 6] SA_DQS[ 7] SA_MA[ 0] SA_MA[ 1] SA_MA[ 2] SA_MA[ 3] SA_MA[ 4] SA_MA[ 5] SA_MA[ 6] SA_MA[ 7] SA_MA[ 8] SA_MA[ 9] SA_MA[ 10] SA_MA[ 11] SA_MA[ 12] SA_MA[ 13] SA_MA[ 14] SA_MA[ 15] AB6 AA6 V9 M_A_CL K_DDR0 9 10 M_A_CL K_DDR#0 9 M_A_CKE0 9 AA5 AB5 V10 M _B_DQ[63:0] M _B_DQ0 M _B_DQ1 M _B_DQ2 M _B_DQ3 M _B_DQ4 M _B_DQ5 M _B_DQ6 M _B_DQ7 M _B_DQ8 M _B_DQ9 M _B_DQ10 M _B_DQ11 M _B_DQ12 M _B_DQ13 M _B_DQ14 M _B_DQ15 M _B_DQ16 M _B_DQ17 M _B_DQ18 M _B_DQ19 M _B_DQ20 M _B_DQ21 M _B_DQ22 M _B_DQ23 M _B_DQ24 M _B_DQ25 M _B_DQ26 M _B_DQ27 M _B_DQ28 M _B_DQ29 M _B_DQ30 M _B_DQ31 M _B_DQ32 M _B_DQ33 M _B_DQ34 M _B_DQ35 M _B_DQ36 M _B_DQ37 M _B_DQ38 M _B_DQ39 M _B_DQ40 M _B_DQ41 M _B_DQ42 M _B_DQ43 M _B_DQ44 M _B_DQ45 M _B_DQ46 M _B_DQ47 M _B_DQ48 M _B_DQ49 M _B_DQ50 M _B_DQ51 M _B_DQ52 M _B_DQ53 M _B_DQ54 M _B_DQ55 M _B_DQ56 M _B_DQ57 M _B_DQ58 M _B_DQ59 M _B_DQ60 M _B_DQ61 M _B_DQ62 M _B_DQ63 M_A_CL K_DDR1 9 M_A_CL K_DDR#1 9 M_A_CKE1 9 AB4 AA4 W9 AB3 AA3 W10 AK3 AL3 AG1 AH1 AH3 AG3 AG2 AH2 C4 G6 J3 M6 AL6 AM 8 AR12 AM 15 M_ A_DQS# 0 M_ A_DQS# 1 M_ A_DQS# 2 M_ A_DQS# 3 M_ A_DQS# 4 M_ A_DQS# 5 M_ A_DQS# 6 M_ A_DQS# 7 D4 F6 K3 N6 AL5 AM 9 AR11 AM 14 M_ A_DQS0 M_ A_DQS1 M_ A_DQS2 M_ A_DQS3 M_ A_DQS4 M_ A_DQS5 M_ A_DQS6 M_ A_DQS7 AD10 W1 W2 W7 V3 V2 W3 W6 V1 W5 AD8 V4 W4 AF8 V5 V7 M_ A_A0 M_ A_A1 M_ A_A2 M_ A_A3 M_ A_A4 M_ A_A5 M_ A_A6 M_ A_A7 M_ A_A8 M_ A_A9 M_ A_A10 M_ A_A11 M_ A_A12 M_ A_A13 M_ A_A14 M_ A_A15 M_A_CS#0 M_A_CS#1 9 9 M_A_ODT0 M_A_ODT1 9 9 M_A_DQS#[7:0] M_A_DQS[7:0] M _A_ A[15:0] 9 9 9 10 10 10 M_B_BS0 M_B_BS1 M_B_BS2 10 10 10 M_B_CAS# M_B_RAS# M_B_WE# C9 A7 D10 C8 A9 A8 D9 D8 G 4 F4 F1 G 1 G 5 F5 F2 G 2 J7 J8 K10 K9 J9 J10 K8 K7 M 5 N4 N2 N1 M 4 N5 M 2 M 1 AM 5 AM 6 AR3 AP3 AN3 AN2 AN1 AP2 AP5 AN9 AT5 AT6 AP6 AN8 AR6 AR5 AR9 AJ11 AT8 AT9 AH11 AR8 AJ12 AH12 AT11 AN14 AR14 AT14 AT12 AN15 AR15 AT15 AA9 AA7 R6 AA10 AB8 AB9 SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63] SB_BS[0] SB_BS[1] SB_BS[2] SB_CAS# SB_RAS# SB_WE# SB_CLK[0] SB_CLK#[0] SB_CKE[0] SB_CLK[1] SB_CLK#[1] SB_CKE[1] SB_CLK[2] SB_CLK#[2] SB_CKE[2] SB_CLK[3] SB_CLK#[3] SB_CKE[3] SB_CS#[0] SB_CS#[1] SB_CS#[2] SB_CS#[3] SB_O DT[0] SB_O DT[1] SB_O DT[2] SB_O DT[3] SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7] SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7] SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8] SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15] AE2 AD2 R9 M_B_CLK_DDR2 10 M_B_CLK_DDR#2 10 M_B_CKE2 1 0 AE1 AD1 R10 M_B_CLK_DDR3 10 M_B_CLK_DDR#3 10 M_B_CKE3 1 0 AB2 AA2 T9 AA1 AB1 T10 AD3 AE3 AD6 AE6 AE4 AD4 AD5 AE5 D7 F3 K6 N3 AN5 AP9 AK1 2 AP1 5 M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7 C7 G3 J6 M3 AN6 AP8 AK1 1 AP1 4 M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 AA8 T7 R7 T6 T2 T4 T3 R2 T5 R3 AB7 R1 T1 AB1 0 R5 R4 M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15 M_B_CS#2 M_B_CS#3 10 10 M_B_ODT2 M_B_ODT3 1 0 1 0 M_B_DQ S#[7:0] M_B_DQ S[7:0] M_B_A[15: 0 ] Sheet 4 of 49 Processor 3/7(DDR3) 10 10 1 0 PZ9 8827-364B-01F Processor 3/7- (DDR3) B - 5 B.Schematic Diagrams M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ1 0 M_A_DQ1 1 M_A_DQ1 2 M_A_DQ1 3 M_A_DQ1 4 M_A_DQ1 5 M_A_DQ1 6 M_A_DQ1 7 M_A_DQ1 8 M_A_DQ1 9 M_A_DQ2 0 M_A_DQ2 1 M_A_DQ2 2 M_A_DQ2 3 M_A_DQ2 4 M_A_DQ2 5 M_A_DQ2 6 M_A_DQ2 7 M_A_DQ2 8 M_A_DQ2 9 M_A_DQ3 0 M_A_DQ3 1 M_A_DQ3 2 M_A_DQ3 3 M_A_DQ3 4 M_A_DQ3 5 M_A_DQ3 6 M_A_DQ3 7 M_A_DQ3 8 M_A_DQ3 9 M_A_DQ4 0 M_A_DQ4 1 M_A_DQ4 2 M_A_DQ4 3 M_A_DQ4 4 M_A_DQ4 5 M_A_DQ4 6 M_A_DQ4 7 M_A_DQ4 8 M_A_DQ4 9 M_A_DQ5 0 M_A_DQ5 1 M_A_DQ5 2 M_A_DQ5 3 M_A_DQ5 4 M_A_DQ5 5 M_A_DQ5 6 M_A_DQ5 7 M_A_DQ5 8 M_A_DQ5 9 M_A_DQ6 0 M_A_DQ6 1 M_A_DQ6 2 M_A_DQ6 3 DDR SYSTEM MEMORY B M_A_DQ[63:0] DDR SYSTEM MEMORY A 9 U29 D Schematic Diagrams Processor 4/7- Power Sandy Bridge Processor 4/7 ( POWER ) U29F POWER PROCESSOR CORE POWER PRO CES SO R U NC ORE P OWE R C587 C586 22u_6.3V_X5R_08 22u_6.3V_X5R_08 *22u_6. 3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 *22u_6. 3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08 C590 C595 C137 C151 C594 *22u_6. 3V_X5R_08 22u_6.3V_X5R_08 C585 *22u_6. 3V_X5R_08 C156 22u_6.3V_X5R_08 C102 *22u_6.3V_X5R_08 C167 22u_6.3V_X5R_08 C76 VCORE 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 C173 C596 C191 C169 C168 10u_6.3V_X5R_06 10u_6.3V_X5R_06 C172 *10u_6. 3V_X5R_06 C171 *10u_6.3V_X5R_06 C170 *10u_6.3V_X5R_06 C598 10u_6.3V_X5R_06 C599 VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 VCC50 VCC51 VCC52 VCC53 VCC54 VCC55 VCC56 VCC57 VCC58 VCC59 VCC60 VCC61 VCC62 VCC63 VCC64 VCC65 VCC66 VCC67 VCC68 VCC69 VCC70 VCC71 VCC72 VCC73 VCC74 VCC75 VCC76 VCC77 VCC78 VCC79 VCC80 VCC81 VCC82 VCC83 VCC84 VCC85 VCC86 VCC87 VCC88 VCC89 VCC90 VCC91 VCC92 VCC93 VCC94 VCC95 VCC96 VCC97 VCC98 VCC99 VCC100 PZ98827-364B-01F B - 6 Processor 4/7- Power PEG AND DDR C188 1. 05VS_VTT AG35 AG34 AG33 AG32 AG31 AG30 AG29 AG28 AG27 AG26 AF35 AF34 AF33 AF32 AF31 AF30 AF29 AF28 AF27 AF26 AD35 AD34 AD33 AD32 AD31 AD30 AD29 AD28 AD27 AD26 AC35 AC34 AC33 AC32 AC31 AC30 AC29 AC28 AC27 AC26 AA35 AA34 AA33 AA32 AA31 AA30 AA29 AA28 AA27 AA26 Y35 Y34 Y33 Y32 Y31 Y30 Y29 Y28 Y27 Y26 V35 V34 V33 V32 V31 V30 V29 V28 V27 V26 U35 U34 U33 U32 U31 U30 U29 U28 U27 U26 R35 R34 R33 R32 R31 R30 R29 R28 R27 R26 P35 P34 P33 P32 P31 P30 P29 P28 P27 P26 VCCIO1 VCCIO2 VCCIO3 VCCIO4 VCCIO5 VCCIO6 VCCIO7 VCCIO8 VCCIO9 VCCIO10 VCCIO11 VCCIO12 VCCIO13 VCCIO14 VCCIO15 VCCIO16 VCCIO17 VCCIO18 VCCIO19 VCCIO20 VCCIO21 VCCIO22 VCCIO23 VCCIO24 VCCIO25 VCCIO26 VCCIO27 VCCIO28 VCCIO29 VCCIO30 VCCIO31 VCCIO32 VCCIO33 VCCIO34 VCCIO35 VCCIO36 VCCIO37 VCCIO38 VCCIO39 VCCIO40 AH13 AH10 AG10 AC10 Y10 U10 P10 L10 J14 J13 J12 J11 H14 H12 H11 G14 G13 G12 F14 F13 F12 F11 E14 E12 E11 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11 1.05VS_VTT 8 .5 A C196 C206 C204 C232 C203 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6. 3V_X5R_08 22u_6. 3V_X5R_08 22u_6. 3V_X5R_08 C627 C602 C603 C629 C614 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6. 3V_X5R_08 22u_6. 3V_X5R_08 22u_6. 3V_X5R_08 C623 C608 C613 C609 C610 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6. 3V_X5R_08 22u_6. 3V_X5R_08 22u_6. 3V_X5R_08 C607 C611 C612 C606 C597 *22u_6.3V_X5R_08 *22u_6.3V_X5R_08 *22u_6.3V_X5R_08 *22u_6.3V_X5R_08 *22u_6.3V_X5R_08 C202 C223 C222 *22u_6.3V_X5R_08 *22u_6.3V_X5R_08 *22u_6.3V_X5R_08 C201 C205 C231 *22u_6.3V_X5R_08 *22u_6.3V_X5R_08 *22u_6.3V_X5R_08 J23 1. 05VS_VCCP_F R419 *15mil_short_06 1.05VS_VTT CLOSE TO CPU 1.05VS_VTT SVID C588 22u_6.3V_X5R_08 Sheet 5 of 49 Processor 4/7Power C589 *10u_6.3V_X5R_06 B.Schematic Diagrams VCORE 48A AJ29 VIDALERT# AJ30 VIDSCLK AJ28 VIDSOUT H_CPU_SVI DALRT# 75_04 R93 H_CPU_SVI DDAT_R130_1%_04 R112 H_CPU_SVIDALRT#_R H_CPU_SVIDCLK_R H_CPU_SVIDDAT_R R105 R95 R108 43_1%_04 0_04 0_04 H_CPU_SVIDALRT# 39 H_CPU_SVIDCLK 39 H_CPU_SVIDDAT 39 VCORE_VCC_SENSE 39 VCORE_VSS_SENSE 39 1. 05VS_VTT SENSE LINES SV 48 CORE SUPPLY VCORE ICCMAX Maximum Processor VCC_SENSE VSS_SENSE AJ35 AJ34 R433 *10_04 VCCIO_SENSE VSSIO_SENSE 12/1 ? ? 10R B10 A10 R438 *10_04 39,40 VCORE 2,3,23,24,25, 35,37,39 1.05VS_VTT + C640 220u_6.3V_6.3*6.3*4. 2 + C641 220u_6.3V_6.3*6.3*4. 2 Schematic Diagrams Processor 5/7- GFX PWR Sandy Bridge Processor 5/7 ( GRAPHICS POWER ) POWER 1 .5 V U 2 9G V G F X _ CO RE C2 0 7 C6 1 6 C1 7 4 2 2 u _ 6. 3 V _ X 5 R _ 0 8 2 2 u_ 6 . 3 V _ X 5R _ 08 2 2u _ 6 . 3 V _ X5 R _0 8 22 u _ 6 . 3V _X 5 R _ 0 8 2 2u _ 6 . 3 V _X 5 R _0 8 C 5 76 C 62 6 C1 8 4 C6 0 0 C5 9 3 2 2 u _ 6. 3 V _ X 5 R _ 0 8 2 2 u_ 6 . 3 V _ X 5R _ 08 2 2u _ 6 . 3 V _ X5 R _0 8 22 u _ 6 . 3V _X 5 R _ 0 8 2 2u _ 6 . 3 V _X 5 R _0 8 C6 3 0 2 2 0 u_ 6 . 3 V _ 6 . 3* 6 . 3* 4 . 2 1 .8 V S 1.2A + C 63 5 3 3 0u F _ 2 . 5 V _ 9 m_ 6 . 3 *6 + C 6 33 3 3 0 u F _2 . 5 V _ 9 m _6 . 3 * 6 C 6 34 1 0 u _6 . 3 V _ X 5 R _ 0 6 C 63 1 1 u _ 6 . 3V _Y 5 V _ 04 C 63 2 1 u _ 6. 3 V _ X 5 R _ 0 4 B6 A6 A2 VC CPL L 1 VC CPL L 2 VC CPL L 3 39 39 R 4 49 V _ S M _V R E F 0_04 R4 5 1 1 K _ 1% _ 0 4 Q 32 *M T N 2 3 0 6A N 3 S D R4 4 5 *1 0 0K _1 % _ 0 4 V _ S M_ V R E F _ C N T G SENSE LINES V C C _ G T_ S E N S E V S S _G T _S E N S E R4 4 8 C6 3 7 1 K _ 1% _ 0 4 0 . 1u _ 1 6 V _ Y 5 V _ 0 4 V_ S M _ VREF AL 1 S M_ V R E F S US B # CAD Note: +V_SM_VREF should have 10 mil trace width 1 .5 V S _ CP U 12A V D D Q1 V D D Q2 V D D Q3 V D D Q4 V D D Q5 V D D Q6 V D D Q7 V D D Q8 V D D Q9 V D D Q1 0 V D D Q1 1 V D D Q1 2 V D D Q1 3 V D D Q1 4 V D D Q1 5 AF 7 AF 4 AF 1 AC 7 AC 4 AC 1 Y 7 Y 4 Y 1 U 7 U 4 U 1 P7 P4 P1 2 0 , 2 9, 3 4 , 3 5 C2 6 9 C 26 8 C 26 7 1 0u _ 6 . 3 V _ X5 R _0 6 1 0 u_ 6 . 3 V _ X 5R _ 06 1 0 u _6 . 3 V _ X 5R _ 0 6 C2 5 6 C 25 7 C 25 8 1 0u _ 6 . 3 V _ X5 R _0 6 1 0 u_ 6 . 3 V _ X 5R _ 06 10 u _ 6 . 3V _X 5 R _ 0 6 + C6 3 6 Sheet 6 of 49 Processor 5/7- GFX PWR 3 30 u F _ 2 . 5 V _ 9m _ 6 . 3 *6 0 . 8 5V S VCC VCC VCC VCC VCC VCC VCC VCC SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 6A M 27 M 26 L26 J26 J25 J24 H 26 H 25 H 23 C1 4 8 C1 5 8 C 15 5 10 u _ 6 . 3 V _X 5 R _0 6 1 0u _ 6 . 3 V _ X5 R _0 6 1 0 u_ 6 . 3 V _ X 5R _ 06 + C 71 6 5 6 0 u_ 2 . 5 V _ 6. 6* 6 . 6* 5 . 9 12/23 ? ? ? ? V CC S A _ S E N S E V CC S A _ S E N S E V C CS A _ S E NS E 37 1 .5 V F C_ C2 2 V C CS A _ V ID1 C 2 2 R4 2 8 C 2 4 R4 2 6 *0 _ 04 *0 _ 04 V C CS A _ V ID0 V C CS A _ V ID1 37 37 C2 8 5 C2 8 4 0 . 1u _ 1 0 V _ X 5R _ 0 4 C 60 5 A K 35 A K 34 0 . 1 u_ 1 0 V _ X 5 R _ 0 4 C 1 97 VREF 2 2u _ 6 . 3 V _X 5 R _0 8 DDR3 -1.5V RAILS C1 8 9 22 u _ 6 . 3V _X 5 R _ 0 8 SA RAIL C1 9 0 2 2u _ 6 . 3 V _ X5 R _0 8 V A X G_ S E N S E V S S A X G_ S E N S E MISC C5 7 5 2 2 u_ 6 . 3 V _ X 5R _ 08 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 GRAPHICS C 16 6 2 2 u _ 6. 3 V _ X 5 R _ 0 8 VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG VAXG 1.8V RAIL C 1 83 AT 2 4 AT 2 3 AT 2 1 AT 2 0 AT 1 8 AT 1 7 AR2 4 AR2 3 AR2 1 AR2 0 AR1 8 AR1 7 AP2 4 AP2 3 AP2 1 AP2 0 AP1 8 AP1 7 AN2 4 AN2 3 AN2 1 AN2 0 AN1 8 AN1 7 A M2 4 A M2 3 A M2 1 A M2 0 A M1 8 A M1 7 AL 2 4 AL 2 3 AL 2 1 AL 2 0 AL 1 8 AL 1 7 AK2 4 AK2 3 AK2 1 AK2 0 AK1 8 AK1 7 AJ 2 4 AJ 2 3 AJ 2 1 AJ 2 0 AJ 1 8 AJ 1 7 AH2 4 AH2 3 AH2 1 AH2 0 AH1 8 AH1 7 P Z 98 8 2 7 -36 4 B -0 1 F 1 .5 V S _ CP U 3 7 0 . 8 5V S 40 V GF X _ C O R E 3 , 35 1 . 5V S _C P U 2 3 , 2 4, 37 1. 8V S 3 , 9 , 1 0, 2 5 , 2 9 , 3 3, 3 5 , 3 7 , 38 1 . 5V Processor 5/7- GFX PWR B - 7 B.Schematic Diagrams + 33A Schematic Diagrams Processor 6/7- GND Sandy Bridge Processor 6/7 ( GND ) B.Schematic Diagrams U2 9H CAD Note: 0 ohm resistor should be placed close to CPU Sheet 7 of 49 Processor 6/7- GND AT35 AT32 AT29 AT27 AT25 AT22 AT19 AT16 AT13 AT10 AT7 AT4 AT3 AR25 AR22 AR19 AR16 AR13 AR10 AR7 AR4 AR2 AP34 AP31 AP28 AP25 AP22 AP19 AP16 AP13 AP10 AP7 AP4 AP1 AN30 AN27 AN25 AN22 AN19 AN16 AN13 AN10 AN7 AN4 AM29 AM25 AM22 AM19 AM16 AM13 AM10 AM7 AM4 AM3 AM2 AM1 AL34 AL31 AL28 AL25 AL22 AL19 AL16 AL13 AL10 AL7 AL4 AL2 AK33 AK30 AK27 AK25 AK22 AK19 AK16 AK13 AK10 AK7 AK4 AJ25 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS1 0 VSS1 1 VSS1 2 VSS1 3 VSS1 4 VSS1 5 VSS1 6 VSS1 7 VSS1 8 VSS1 9 VSS2 0 VSS2 1 VSS2 2 VSS2 3 VSS2 4 VSS2 5 VSS2 6 VSS2 7 VSS2 8 VSS2 9 VSS3 0 VSS3 1 VSS3 2 VSS3 3 VSS3 4 VSS3 5 VSS3 6 VSS3 7 VSS3 8 VSS3 9 VSS4 0 VSS4 1 VSS4 2 VSS4 3 VSS4 4 VSS4 5 VSS4 6 VSS4 7 VSS4 8 VSS4 9 VSS5 0 VSS5 1 VSS5 2 VSS5 3 VSS5 4 VSS5 5 VSS5 6 VSS5 7 VSS5 8 VSS5 9 VSS6 0 VSS6 1 VSS6 2 VSS6 3 VSS6 4 VSS6 5 VSS6 6 VSS6 7 VSS6 8 VSS6 9 VSS7 0 VSS7 1 VSS7 2 VSS7 3 VSS7 4 VSS7 5 VSS7 6 VSS7 7 VSS7 8 VSS7 9 VSS8 0 PZ98827 -364B-0 1F B - 8 Processor 6/7- GND U29I VSS VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 AJ22 AJ19 AJ16 AJ13 AJ10 AJ7 AJ4 AJ3 AJ2 AJ1 AH35 AH34 AH32 AH30 AH29 AH28 AH26 AH25 AH22 AH19 AH16 AH7 AH4 AG9 AG8 AG4 AF6 AF5 AF3 AF2 AE35 AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE9 AD7 AC9 AC8 AC6 AC5 AC3 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 Y9 Y8 Y6 Y5 Y3 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 U9 U8 U6 U5 U3 U2 T35 T34 T33 T32 T31 T30 T29 T28 T27 T26 P9 P8 P6 P5 P3 P2 N 35 N 34 N 33 N 32 N 31 N 30 N 29 N 28 N 27 N 26 M34 L 33 L 30 L 27 L9 L8 L6 L5 L4 L3 L2 L1 K35 K32 K29 K26 J 34 J 31 H 33 H 30 H 27 H 24 H 21 H 18 H 15 H 13 H 10 H9 H8 H7 H6 H5 H4 H3 H2 H1 G 35 G 32 G 29 G 26 G 23 G 20 G 17 G 11 F34 F31 F29 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191 VSS192 VSS193 VSS194 VSS195 VSS196 VSS197 VSS198 VSS199 VSS200 VSS201 VSS202 VSS203 VSS204 VSS205 VSS206 VSS207 VSS208 VSS209 VSS210 VSS211 VSS212 VSS213 VSS214 VSS215 VSS216 VSS217 VSS218 VSS219 VSS220 VSS221 VSS222 VSS223 VSS224 VSS225 VSS226 VSS227 VSS228 VSS229 VSS230 VSS231 VSS232 VSS233 PZ98 827-3 64B-01F VSS VSS234 VSS235 VSS236 VSS237 VSS238 VSS239 VSS240 VSS241 VSS242 VSS243 VSS244 VSS245 VSS246 VSS247 VSS248 VSS249 VSS250 VSS251 VSS252 VSS253 VSS254 VSS255 VSS256 VSS257 VSS258 VSS259 VSS260 VSS261 VSS262 VSS263 VSS264 VSS265 VSS266 VSS267 VSS268 VSS269 VSS270 VSS271 VSS272 VSS273 VSS274 VSS275 VSS276 VSS277 VSS278 VSS279 VSS280 VSS281 VSS282 VSS283 VSS284 VSS285 F22 F19 E30 E27 E24 E21 E18 E15 E13 E10 E9 E8 E7 E6 E5 E4 E3 E2 E1 D3 5 D3 2 D2 9 D2 6 D2 0 D1 7 C3 4 C3 1 C2 8 C2 7 C2 5 C2 3 C1 0 C1 B22 B19 B17 B15 B13 B11 B9 B8 B7 B5 B3 B2 A35 A32 A29 A26 A23 A20 A3 Schematic Diagrams Processor 7/7- RSVD Sandy Bridge Processor 7/7 ( RESERVED ) CFG Straps for Processor PE G Sta tic L ane Rever sal - CFG2 is f or th e 16 x CF G2 1: (Defa ult) Norm al Op erati on; L ane # de finit ion match es so cket pin m ap d efini tion 0: Lane Reve rsed CFG2 R417 *1K_04 U29E CF G4 CFG2 CFG4 R114 CFG4 CFG5 CFG6 CFG7 *1K_04 PC IE Po rt Bi furc ation Stra ps CF G[6:5 ] 11: 10: 01: 00: *1K_04 CFG6 R109 *1K_04 R134 *0_04 D Q11 *MTN2306AN3 S 9 VREF_DQ_CHA H_CPU_RSVD1 AJ31 H_CPU_RSVD2 AH31 H_CPU_RSVD3 AJ33 H_CPU_RSVD4 AH33 AJ26 B4 D1 VREF_CH_A_DI MM VREF_CH_B_DI MM R138 R136 *1K_04 R129 *1K_04 G 10 VREF_DQ_CHB *0_04 Q12 *MTN2306AN3 D S 3,19 DRAMRST_CNTRL 3.3V R429 10K_1%_04 H_SNB_IVB#_PWRCTRL R430 *10mil_short _04 H_SNB_IVB#_PWRCTRL_R F25 F24 F23 D24 G25 G24 E23 D23 C30 A31 B30 B29 D30 B31 A30 C29 J20 B18 A19 J15 On CR B H_SNB _IVB# _PWRC TRL = low , 1.0 V H_SNB _IVB# _PWRC TRL = hig h/NC, 1.05 V PE G DEF ER TR AINI NG CF G7 RSVD28 RSVD29 RSVD30 RSVD31 RSVD32 CFG[0] CFG[1] CFG[2] CFG[3] CFG[4] CFG[5] CFG[6] CFG[7] CFG[8] CFG[9] CFG[10] CFG[11] CFG[12] CFG[13] CFG[14] CFG[15] CFG[16] CFG[17] RSVD33 RSVD34 RSVD35 RSVD37 RSVD38 RSVD39 RSVD40 RSVD41 RSVD42 RSVD43 RSVD44 RSVD45 VAXG_VAL_SENSE VSSAXG_VAL_SENSE VCC_VAL_SENSE VSS_VAL_SENSE L7 AG7 AE7 AK2 W8 AT26 AM33 AJ27 T8 J16 H16 G16 AR35 AT34 AT33 AP35 AR34 Sheet 8 of 49 Processor 7/7RSVD RSVD5 RSVD6 RSVD7 G CFG5 R111 (Default) x16 - Device 1 functions 1 and 2 disabled x8, x8 - Device 1 function 1 enabled ; function 2 disabled Reserved - (Device 1 function 1 disabled ; function 2 enabled) x8,x4,x4 - Device 1 functions 1 and 2 enabled AK28 AK29 AL26 AL27 AK26 AL29 AL30 AM31 AM32 AM30 AM28 AM26 AN28 AN31 AN26 AM27 AK31 AN29 RSVD8 RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 RSVD21 RSVD22 RSVD23 RSVD24 RSVD25 VCCIO_SEL RSVD46 RSVD47 RSVD48 RSVD49 RSVD50 RSVD51 RSVD52 B34 A33 A34 B35 C35 AJ32 AK32 AH27 VCC_DIE_SENSE RSVD54 RSVD55 RSVD56 RSVD57 RSVD58 AN35 AM35 AT2 AT1 AR1 RSVD27 KEY B1 PZ98827-364B- 01F 1: (De fault ) PEG Trai n imm ediat ely follo wing xxRES ETB d e ass erti on 0: PEG Wait for BIOS for t raini ng CFG7 R107 *1K_04 2,3,11, 16,18,19,20,22, 23,24,25,27, 28,29,30,35,37, 38,39 3.3V Processor 7/7- RSVD B - 9 B.Schematic Diagrams 1: (Defa ult) Disa bled; No P hysic al D ispla y Por t at tache d to Embe dded Displ ay Po rt 0: Enabl ed; An ex terna l Dis play Port devi ce is co nnect ed t o the Embe dded Displ ay P ort RESERVED CFG0 Di splay Port Pre sence Stra p Schematic Diagrams DDR3 SO-DIMM_0 SO-DIMM A C 34 9 M_ A _ C L K _ D D R 0 *1 0 p_ 5 0 V _N P O_ 0 4 M _ A _C L K _D D R # 0 C 34 8 M_ A _ C L K _ D D R 1 *1 0 p_ 5 0 V _N P O_ 0 4 M _ A _C L K _D D R # 1 4 M_ A _ A [ 1 5 : 0 ] 4 M _ A _B S 0 4 M _ A _B S 1 4 M _ A _B S 2 4 M _ A _C S # 0 4 M _ A _C S # 1 M _ A _C L K _D D R 0 M _ A _C L K _D D R # 0 M _ A _C L K _D D R 1 M _ A _C L K _D D R # 1 4 M _ A _C K E 0 4 M _ A _C K E 1 4 M_ A _ C A S # 4 M_ A _ R A S # 4 M_ A _ W E # 4 4 4 4 Sheet 9 of 49 DDR3 SO-DIMM_0 1 0 ,1 9 1 0 ,1 9 S M B _C L K S M B _D A T A 4 4 M _ A _O D T 0 M _ A _O D T 1 _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A 0 _A 1 _A 2 _A 3 _A 4 _A 5 _A 6 _A 7 _A 8 _A 9 _A 1 0 _A 1 1 _A 1 2 _A 1 3 _A 1 4 _A 1 5 S A 0 _ DIM 0 S A 1 _ DIM 0 98 97 96 95 92 91 90 86 89 85 1 07 84 83 1 19 80 78 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A 1 0 /A P A1 1 A 1 2 /B C # A1 3 A1 4 A1 5 1 09 1 08 79 1 14 1 21 1 01 1 03 1 02 1 04 73 74 1 15 1 10 1 13 1 97 2 01 2 02 2 00 BA 0 BA 1 BA 2 S0 # S1 # C K0 C K0 # C K1 C K1 # C KE0 C KE1 C AS# R AS# WE # SA 0 SA 1 SC L SD A 1 16 1 20 O DT 0 O DT 1 11 28 46 63 1 36 1 53 1 70 1 87 4 RN 3 10 K _ 8 P 4 R _ 0 4 1 8 2 7 3 6 S A 1 _ D I M0 4 5 S A 0 _ D I M0 M _ A _ D QS #[ 7 : 0 ] S A 1 _ DIM 1 S A 0 _ DIM 1 10 10 M M M M M M M M _A _A _A _A _A _A _A _A _D _D _D _D _D _D _D _D QS 0 QS 1 QS 2 QS 3 QS 4 QS 5 QS 6 QS 7 12 29 47 64 1 37 1 54 1 71 1 88 M M M M M M M M _A _A _A _A _A _A _A _A _D _D _D _D _D _D _D _D QS # 0 QS # 1 QS # 2 QS # 3 QS # 4 QS # 5 QS # 6 QS # 7 10 27 45 62 1 35 1 52 1 69 1 86 M0 M1 M2 M3 M4 M5 M6 M7 D D D D D D D D QS 0 QS 1 QS 2 QS 3 QS 4 QS 5 QS 6 QS 7 D D D D D D D D QS 0 # QS 1 # QS 2 # QS 3 # QS 4 # QS 5 # QS 6 # QS 7 # M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M M 5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 12 9 13 1 14 1 14 3 13 0 13 2 14 0 14 2 14 7 14 9 15 7 15 9 14 6 14 8 15 8 16 0 16 3 16 5 17 5 17 7 16 4 16 6 17 4 17 6 18 1 18 3 19 1 19 3 18 0 18 2 19 2 19 4 LI N K T E K D D R R K -2 04 0 1 -TP 5B _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _A _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D _D M_ A _ D Q [ 63 : 0 ] Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q1 0 Q1 1 Q1 2 Q1 3 Q1 4 Q1 5 Q1 6 Q1 7 Q1 8 Q1 9 Q2 0 Q2 1 Q2 2 Q2 3 Q2 4 Q2 5 Q2 6 Q2 7 Q2 8 Q2 9 Q3 0 Q3 1 Q3 2 Q3 3 Q3 4 Q3 5 Q3 6 Q3 7 Q3 8 Q3 9 Q4 0 Q4 1 Q4 2 Q4 3 Q4 4 Q4 5 Q4 6 Q4 7 Q4 8 Q4 9 Q5 0 Q5 1 Q5 2 Q5 3 Q5 4 Q5 5 Q5 6 Q5 7 Q5 8 Q5 9 Q6 0 Q6 1 Q6 2 Q6 3 4 J D I MM 2B 1 .5 V 75 76 81 82 87 88 93 94 99 1 00 1 05 1 06 1 11 1 12 1 17 1 18 1 23 1 24 3 .3 V S 2 0 mi ls C 3 61 C3 1 5 1 u _ 6. 3V _ X 5 R _ 0 4 0 . 1 u_ 1 6 V _Y 5 V _0 4 VD VD VD VD VD VD VD VD VD VD VD VD VD VD VD VD VD VD D1 D2 D3 D4 D5 D6 D7 D8 D9 D1 0 D1 1 D1 2 D1 3 D1 4 D1 5 D1 6 D1 7 D1 8 1 99 V D DS P D 3 .3 V S R1 9 4 10 3 ,1 0 77 1 22 1 25 1 0 K_ 0 4 1 98 30 T S # _ D I MM 0 _1 D D R 3_ D R A MR S T # C C C C 3 63 3 64 3 66 3 51 1 u_ 6 . 3 V _ X5 R _0 4 0 . 1 u_ 1 6 V _Y 5 V _0 4 1 u_ 6 . 3 V _ X5 R _0 4 0 . 1 u_ 1 6 V _Y 5 V _0 4 V R E F _ D Q_ 0 V R E F _ C A _0 CLO SE TO SO -DI MM _ 0 RN 6 5 6 7 8 4 3 2 1 1 K _ 8P 4 R _0 4 V R E F _ CA _ 0 V R E F _ D Q _0 R 2 07 C 3 62 C3 6 5 *0 _ 0 4 1 1 26 2 3 8 9 13 14 19 20 25 26 31 32 37 38 43 1 .5 V 0 . 1 u_ 1 6 V _ Y 5V _0 4 4 3 .3 V S M _A _D QS [ 7 : 0 ] D D D D D D D D DQ 0 DQ 1 DQ 2 DQ 3 DQ 4 DQ 5 DQ 6 DQ 7 DQ 8 DQ 9 DQ 1 0 DQ 1 1 DQ 1 2 DQ 1 3 DQ 1 4 DQ 1 5 DQ 1 6 DQ 1 7 DQ 1 8 DQ 1 9 DQ 2 0 DQ 2 1 DQ 2 2 DQ 2 3 DQ 2 4 DQ 2 5 DQ 2 6 DQ 2 7 DQ 2 8 DQ 2 9 DQ 3 0 DQ 3 1 DQ 3 2 DQ 3 3 DQ 3 4 DQ 3 5 DQ 3 6 DQ 3 7 DQ 3 8 DQ 3 9 DQ 4 0 DQ 4 1 DQ 4 2 DQ 4 3 DQ 4 4 DQ 4 5 DQ 4 6 DQ 4 7 DQ 4 8 DQ 4 9 DQ 5 0 DQ 5 1 DQ 5 2 DQ 5 3 DQ 5 4 DQ 5 5 DQ 5 6 DQ 5 7 DQ 5 8 DQ 5 9 DQ 6 0 DQ 6 1 DQ 6 2 DQ 6 3 0. 1u _ 16 V _ Y 5 V _ 0 4 B.Schematic Diagrams La yout Note : si gna l/ spa ce /si gna l: 8 / 4 /8 JD I MM 2A M M M M M M M M M M M M M M M M V R E F _ D Q_ C H A 8 N C1 N C2 N CT E S T EVEN T# R ESET# V R E F _ DQ V R E F _ CA VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS1 0 VSS1 1 VSS1 2 VSS1 3 VSS1 4 VSS1 5 VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS VS S 16 S 17 S 18 S 19 S 20 S 21 S 22 S 23 S 24 S 25 S 26 S 27 S 28 S 29 S 30 S 31 S 32 S 33 S 34 S 35 S 36 S 37 S 38 S 39 S 40 S 41 S 42 S 43 S 44 S 45 S 46 S 47 S 48 S 49 S 50 S 51 S 52 44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196 V T T_ M E M V T T1 V T T2 G1 G2 203 204 G ND 1 G ND 2 L I N K T E K D D R R K -20 4 0 1- TP 5 B ? ? 5 .2 H REV 6-86-24204-005 V T T _M E M 1 . 5V 12/17 PWRCHANGE C3 0 7 10 u _ 6. 3 V _ X 5 R _ 06 C 32 8 1 u _6 . 3 V _ X 5R _0 4 C3 1 7 1u _ 6 . 3V _X 5 R _ 0 4 C 30 2 1 u _6 . 3 V _ X5 R _0 4 C2 9 6 1u _ 6 . 3V _ X 5 R _ 0 4 + C6 4 2 + C7 0 2 *5 60 u _ 2. 5V _ 6 . 6 *6 . 6 *5 . 9 + C 7 03 56 0 u _2 . 5 V _ 6. 6 * 6. 6 * 5. 9 56 0 u _2 . 5 V _ 6. 6 * 6. 6 * 5. 9 1. 5 V C3 2 1 C 32 3 C2 9 8 C 30 0 C3 0 1 C 30 4 C3 2 4 C2 9 9 C 3 03 C3 0 5 0. 1 u _ 16 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 04 0. 1 u _ 16 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _Y 5 V _ 04 0. 1 u _ 16 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _Y 5 V _ 04 0. 1 u _ 16 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _Y 5 V _0 4 0. 1 u _ 16 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _Y 5 V _0 4 10 , 3 8 3 , 6 , 1 0, 2 5 , 2 9, 3 3 , 3 5 , 37 , 3 8 3 , 10 , 1 1 , 1 2, 1 8 , 1 9, 2 0 , 2 1 , 22 , 2 3 , 24 , 2 5 , 27 , 2 8 , 3 0, 3 1 , 3 2, 3 3 , 3 4 , 35 , 3 9 1 . 5V B - 10 DDR3 SO-DIMM_0 C2 9 5 C 32 7 C3 1 2 C 32 5 C3 2 6 C 29 7 C3 2 2 C3 2 0 10 u _ 6. 3 V _ X 5 R _ 06 1 0 u_ 6 . 3 V _ X5 R _ 0 6 10 u _ 6. 3 V _ X 5 R _ 06 1 u _6 . 3 V _ X5 R _0 4 1u _ 6 . 3V _ X 5 R _ 0 4 1 u _6 . 3 V _ X5 R _0 4 1u _ 6 . 3V _ X 5 R _ 0 4 1 u _6 . 3 V _ X5 R _0 4 V T T _M E M 1 .5 V 3 .3 V S Schematic Diagrams DDR3 SO-DIMM_1 SO-DIMM B J D I M M1 B C3 1 3 M _ B _C L K _ D D R 2 *1 0 p_ 5 0 V _ N P O _ 04 M _ B _ CL K _ DD R# 2 C3 0 6 M _ B _C L K _ D D R 3 *1 0 p_ 5 0 V _ N P O _ 04 M _ B _ CL K _ DD R# 3 4 M M M M M M M M M M M M M M M M La y out N ot e : signa l/ spac e /si gna l : 8/ 4 / 8 4 M _B _B S 0 4 M _B _B S 1 4 M _B _B S 2 4 M _B _C S # 2 4 M _B _C S # 3 M_ B _ C L K _ D D R 2 M_ B _ C L K _ D D R # 2 M_ B _ C L K _ D D R 3 M_ B _ C L K _ D D R # 3 4 M_ B _ C K E 2 4 M_ B _ C K E 3 4 M _ B _ CA S # 4 M _ B _ RA S # 4 M _ B_ W E# 9 S A 0 _ D I M1 9 S A 1 _ D I M1 9 , 19 S MB _C L K 9 , 19 S MB _D A T A 4 4 _B _ A 0 _B _ A 1 _B _ A 2 _B _ A 3 _B _ A 4 _B _ A 5 _B _ A 6 _B _ A 7 _B _ A 8 _B _ A 9 _B _ A 1 0 _B _ A 1 1 _B _ A 1 2 _B _ A 1 3 _B _ A 1 4 _B _ A 1 5 S A 0 _ DIM 1 S A 1 _ DIM 1 98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78 109 108 79 114 121 101 103 102 104 73 74 115 110 113 197 201 202 200 116 120 M _B _O D T 2 M _B _O D T 3 11 28 46 63 136 153 170 187 4 _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D QS 0 QS 1 QS 2 QS 3 QS 4 QS 5 QS 6 QS 7 12 29 47 64 137 154 171 188 M M M M M M M M _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D _B _ D QS # 0 QS # 1 QS # 2 QS # 3 QS # 4 QS # 5 QS # 6 QS # 7 10 27 45 62 135 152 169 186 BA0 BA1 BA2 S0 # S1 # CK0 CK0 # CK1 CK1 # CKE 0 CKE 1 CAS # RAS # W E# SA0 SA1 S CL S DA OD T 0 OD T 1 DM DM DM DM DM DM DM DM 0 1 2 3 4 5 6 7 DQ DQ DQ DQ DQ DQ DQ DQ S0 S1 S2 S3 S4 S5 S6 S7 DQ DQ DQ DQ DQ DQ DQ DQ S0 # S1 # S2 # S3 # S4 # S5 # S6 # S7 # D D R R K -2 0 4 01 -T P 9 D V T T_ M E M M_ B _ D Q[ 6 3 : 0 ] 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 4 75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124 3. 3 V S 20 m ils VD VD VD VD VD VD VD VD VD VD VD VD VD VD VD VD VD VD D1 D2 D3 D4 D5 D6 D7 D8 D9 D1 0 D1 1 D1 2 D1 3 D1 4 D1 5 D1 6 D1 7 D1 8 199 V D DS P D C3 4 4 C3 4 3 1u _ 6 . 3 V _ X5 R _0 4 0 . 1u _ 1 6V _Y 5 V _ 04 9 3 ,9 C C C C 333 330 288 291 77 122 125 198 30 T S # _ D I M M0 _ 1 D D R 3 _D R A MR S T # 1 u _ 6. 3 V _ X 5 R _ 0 4 0 . 1 u _1 6 V _ Y 5 V _ 0 4 1 u _ 6. 3 V _ X 5 R _ 0 4 0 . 1 u _1 6 V _ Y 5 V _ 0 4 V R E F _D Q_ 1 V R E F _C A _ 1 1 126 NC 1 NC 2 NC T E S T EVEN T # RE SE T # V R E F _ DQ V R E F _ CA 12/06 ? ? CLOS E TO SO- DI MM 1 1 .5 V RN 2 5 6 7 8 4 3 2 1 1K _ 8 P 4 R _ 0 4 V R E F _ C A _1 V R E F _ D Q_ 1 C2 9 0 R1 8 5 * 0 _0 4 V R E F _ D Q_ C H B C 2 89 0. 1u _ 1 6V _Y 5V _ 0 4 M _ B _D QS #[ 7 : 0 ] M M M M M M M M DQ 0 DQ 1 DQ 2 DQ 3 DQ 4 DQ 5 DQ 6 DQ 7 DQ 8 DQ 9 DQ 1 0 DQ 1 1 DQ 1 2 DQ 1 3 DQ 1 4 DQ 1 5 DQ 1 6 DQ 1 7 DQ 1 8 DQ 1 9 DQ 2 0 DQ 2 1 DQ 2 2 DQ 2 3 DQ 2 4 DQ 2 5 DQ 2 6 DQ 2 7 DQ 2 8 DQ 2 9 DQ 3 0 DQ 3 1 DQ 3 2 DQ 3 3 DQ 3 4 DQ 3 5 DQ 3 6 DQ 3 7 DQ 3 8 DQ 3 9 DQ 4 0 DQ 4 1 DQ 4 2 DQ 4 3 DQ 4 4 DQ 4 5 DQ 4 6 DQ 4 7 DQ 4 8 DQ 4 9 DQ 5 0 DQ 5 1 DQ 5 2 DQ 5 3 DQ 5 4 DQ 5 5 DQ 5 6 DQ 5 7 DQ 5 8 DQ 5 9 DQ 6 0 DQ 6 1 DQ 6 2 DQ 6 3 M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q M_ B _ D Q 0 . 1 u_ 1 6 V _ Y 5V _0 4 4 M _B _ D QS [ 7 : 0 ] A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A 1 0/ A P A1 1 A 1 2/ B C # A1 3 A1 4 A1 5 5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 12 9 13 1 14 1 14 3 13 0 13 2 14 0 14 2 14 7 14 9 15 7 15 9 14 6 14 8 15 8 16 0 16 3 16 5 17 5 17 7 16 4 16 6 17 4 17 6 18 1 18 3 19 1 19 3 18 0 18 2 19 2 19 4 8 2 3 8 9 13 14 19 20 25 26 31 32 37 38 43 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS1 0 VSS1 1 VSS1 2 VSS1 3 VSS1 4 VSS1 5 VSS1 6 VSS1 7 VSS1 8 VSS1 9 VSS2 0 VSS2 1 VSS2 2 VSS2 3 VSS2 4 VSS2 5 VSS2 6 VSS2 7 VSS2 8 VSS2 9 VSS3 0 VSS3 1 VSS3 2 VSS3 3 VSS3 4 VSS3 5 VSS3 6 VSS3 7 VSS3 8 VSS3 9 VSS4 0 VSS4 1 VSS4 2 VSS4 3 VSS4 4 VSS4 5 VSS4 6 VSS4 7 VSS4 8 VSS4 9 VSS5 0 VSS5 1 VSS5 2 44 48 49 54 55 60 61 65 66 71 72 1 27 1 28 1 33 1 34 1 38 1 39 1 44 1 45 1 50 1 51 1 55 1 56 1 61 1 62 1 67 1 68 1 72 1 73 1 78 1 79 1 84 1 85 1 89 1 90 1 95 1 96 Sheet 10 of 49 DDR3 SO-DIMM_1 V T T_ M E M VT T1 VT T2 G 1 G 2 2 03 2 04 GN D 1 GN D 2 D D R R K -2 0 4 01 -T P 9 D ? ? 9 .2 H RE V 6-86-24204-006 C 360 C3 1 4 C3 3 1 C3 5 0 1 0 u _ 6. 3 V _ X 5 R _ 0 6 1u _ 6 . 3 V _X 5 R _0 4 1u _ 6 . 3 V _ X5 R _0 4 1u _ 6 . 3 V _ X5 R _0 4 C3 3 4 C 316 C3 4 5 C3 5 9 C3 3 7 C3 4 1 C3 5 3 C3 3 6 C3 3 8 1 0 u _ 6. 3 V _ X 5 R _ 0 6 10 u _ 6. 3V _ X 5 R _ 0 6 10 u _ 6 . 3V _X 5 R _ 0 6 1u _ 6 . 3 V _ X5 R _0 4 1 u_ 6 . 3 V _ X5 R _0 4 1 u_ 6 . 3 V _ X5 R _ 04 1 u_ 6 . 3 V _ X 5R _ 04 1 u_ 6 . 3 V _ X 5R _ 04 1 u _ 6. 3V _ X 5 R _ 0 4 1. 5V La yout Note : SO -D IM M _1 i s pl ac e d fa rthe r f rom t he GM CH tha n S O- DIM M _ 0 1 .5 V C3 5 2 0 . 1 u _ 16 V _ Y 5V _0 4 C3 3 5 C3 5 4 C3 4 0 C3 3 9 C3 4 2 C3 5 8 C3 5 7 C3 5 6 C 35 5 0. 1 u _ 1 6V _ Y 5 V _0 4 0. 1 u _ 1 6V _Y 5 V _0 4 0. 1u _ 1 6V _Y 5 V _ 04 0 . 1u _ 1 6 V _Y 5 V _ 04 0 . 1u _ 1 6 V _Y 5 V _ 04 0 . 1u _ 1 6 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 9 ,3 8 3 , 6 , 9 , 25 , 2 9 , 3 3, 35 , 3 7 , 3 8 3 , 9, 1 1 , 1 2 , 1 8, 1 9 , 2 0 , 21 , 2 2 , 2 3, 24 , 2 5 , 2 7, 2 8 , 3 0 , 31 , 3 2 , 3 3, 34 , 3 5 , 3 9 V T T _M E M 1 .5 V 3 .3 VS DDR3 SO-DIMM_1 B - 11 B.Schematic Diagrams 4 4 4 4 1 . 5V J D I M M1 A M _ B _ A [ 1 5: 0] Schematic Diagrams PANEL, INVERTER, CRT PANEL CONNECTOR (30Pin & 40Pin CO-lay) 21 21 21 21 21 21 21 21 21 21 3. 3 V S R3 6 9 R3 7 0 2 . 2K _ 0 4 2 . 2K _ 0 4 V IN_ L CD J _L C D 2 C 17 C2 0 0 . 1 u_ 5 0 V _Y 5V _0 6 0. 1 u _ 50 V _ Y 5 V _ 0 6 1 3 5 7 9 11 13 L V D S -L C LK N 1 5 L V D S -L C LK P 1 7 19 MU X _4 N 21 23 MU X _4 P 25 MU X _3 N 27 29 MU X _3 P 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 P _ DDC _ DAT A P _ DDC _ CL K 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 B RIG HT NE S S _ R La yo ut :N ot e LV DS & e DP ? ? ? ? ? ? R N 21 8 7 6 5 R N 22 8 7 6 5 R5 2 3 R5 2 4 1 0 _ 8 P 4R _ 04 2 3 4 1 0 _ 8 P 4R _ 04 2 3 4 0_04 0_04 R N 23 1 2 3 4 R N 24 1 2 3 4 R5 2 5 R5 2 6 8 * 0 _8 P 4 R _ 0 4 7 6 5 8 * 0 _8 P 4 R _ 0 4 7 6 5 * 0 _0 4 * 0 _0 4 12/1 ADD I N V _ B L ON 2 2 2 2 2 2 2 2 2 2 LV D S -L 2 N LV D S -L 2 P E MB _ H P D 3 .3 V S C 15 e DP _ T X N1 e DP_ T X P1 e DP _ T X N0 e DP_ T X P0 e D P _ A U XN e D P _ A U XP e DP _ T X N2 e DP_ T X P2 e DP _ T X N3 e DP_ T X P3 MU MU MU MU MU MU MU MU MU MU X _2 N X _2 P X _1 N X _1 P X _0 N X _0 P X _3 N X _3 P X _4 N X _4 P *8 7 2 16 -3 0 06 0 . 1 u_ 1 6 V _Y 5 V _0 4 P L V DD V DD 3 L V D S -U C L K N L V D S -U C L K P MU X _ 1 N MU X _ 1 P 0. 1 u _ 16 V _ Y 5 V _ 0 4 3. 3 V I N V _ B LO N L V D S -L2 N L V D S -L2 P EM B _ HP D E MB _H P D 3 . 3V S 21 21 B R I G H T N E S S _R 2 0_04 R 7 1M _ 04 1 M_ 0 4 D 6 P L VDD C B R I GH TN E S S Q 5 D T C 11 4 E U A B NB _ E N A V DD 34 PL V DD 2A R1 3 D C1 4 2G *R B 7 5 1 S -40 C 2 R 17 *B A V 99 R E C T I F I E R MU X_ 2 N MU X_ 2 P MU X_ 0 N MU X_ 0 P Q 6 P 2 7 0 3B A G 6 5 2 4 1 3 * 1 0K _ 0 4 R1 5 A D7 2A P L V DD R1 8 2A R8 C L V D S -L2 N L V D S -L2 P SYS1 5 V PANEL POWER S Q 2A M TD N 7 0 0 2Z H S 6 R 1 00 _ 0 4 0 . 02 2 u _1 6 V _ X7 R _ 0 4 3 4 . 7 u_ 6 . 3V _X 5 R _ 0 6 B R I GH TN E S S _ R D * 1 00 K _ 0 4 5G NB _ E N AV DD # 3 .3 V Q2 B MT D N 7 00 2 Z H S 6 R C2 8 *0 . 1 u_ 1 6V _Y 5V _ 0 4 4 21 21 C1 0 1 MU X _ 3 N MU X _ 3 P C1 1 E MU X _ 4 N MU X _ 4 P P _D D C _D A T A 2 1 P _D D C _C L K 2 1 AC LV D S -L C L K N LV D S -L C L K P L V D S -L C L K N L V D S -L C L K P P _ D D C _ D A TA P _ DD C_ CL K 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 C 21 21 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 A Sheet 11 of 49 PANEL, INVERTER, CRT Gn d 1 G nd2 J _ L CD 1 6 G 1 G2 V IN_ L CD S 87 2 1 6-4 0 0 6 ? 40pin c on nec to r? , ? ? 30pin c on nec to r? ? ? ? pin pad? ? ? ? F RE D 1 D A C _ GR E E N L3 F C M1 0 0 5M F -6 00 T 0 1 L4 0 F C M1 0 0 5M F -6 00 T 01 F GR N 2 D A C _ B LU E L2 F C M1 0 0 5M F -6 00 T 0 1 L3 9 F C M1 0 0 5M F -6 00 T 01 F B L UE 3 C5 2 7 C 5 21 4 5 2A 12/8 ? ? R9 1 0 0 K _0 4 R 59 5 R1 2 B L 01 1 0 K _ 04 1 K _ 04 11 24 mil H SYN C 14 V S Y NC 15 D DCL K 2 1 ,3 4 N B _ ENA VD D NB _ EN AV DD N B _ E N A V D D # 5G S Q4 A MT D N 70 0 2 Z H S 6 R 2G 8 3 . 3V 34 BKL _ EN 21 B L ON B K L _E N 1 B L ON 2 U2 7 A 74 L V C 0 8 P W 3 14 14 *1 0 0 K _0 4 U 27 B 7 4 LV C 0 8P W B L ON 1 4 3 .3 V 6 B L O N2 5 1 00 K _ 0 4 9 21 DA C_ D DCA CL K D A C_ H S YNC 21 D A C_ V S Y NC DD C_ IN2 14 S Y N C _ OU T 1 R2 5 S YN C_ IN2 S Y N C _ OU T 2 V C C _S Y N C VIDE O _ 1 V C C _V I D E O VIDE O _ 2 V C C _D D C VIDE O _ 3 2 3 .3 V S 7 C3 0 0 . 1u _ 1 6V _ Y 5 V _ 0 4 0. 1 u _ 16 V _ Y 5 V _0 4 C2 7 B - 12 PANEL, INVERTER, CRT 16 1 1 _ 04 B YP 8 H S Y N C _ C R 16 V S Y N C _ C R 14 33 _ 04 33 _ 04 3 F RE D 4 F GR N 5 F B L UE 23 HSY NC 28 , 3 4 V SY NC 2 0 , 3 4, 3 9 L ID_ S W # A L L _ S Y S _ P W R GD G ND T P D7 S 0 1 9 C5 2 5 ESD+LEVEL SHIFT+BUFFER 0 . 1u _ 16 V _ Y 5 V _ 0 4 M S 6-02-07019-B20 6-02-47721-B60 1 8 , 27 , 3 0 , 34 , 3 5 , 36 , 3 7 , 41 , 4 2 V D D 3 3 5, 3 6 , 3 7 S Y S 1 5 V 3 5 , 36 , 3 7 , 38 , 3 9 , 40 , 4 1 , 42 VIN 1 8, 2 4 , 2 5, 2 8 , 3 1, 3 2 , 3 3, 3 5 , 3 9, 4 0 5 V S 2 , 3, 8 , 1 6 , 18 , 1 9 , 20 , 2 2 , 23 , 2 4 , 25 , 2 7 , 28 , 2 9 , 30 , 3 5 , 37 , 3 8 , 39 3. 3 V 3 , 9, 10 , 1 2, 18 , 1 9, 20 , 2 1, 22 , 2 3, 24 , 2 5, 27 , 2 8, 30 , 3 1, 32 , 3 3, 34 , 3 5, 39 3 . 3 V S U2 7 C 74 L V C 0 8 P W 8 I N V _ B L ON 10 S B _ B L ON 6 BYP 3 . 3V *1 0 0 K _0 4 DD CL K D D C _ OU T 2 S YN C_ IN1 15 5 VS R 40 6 12 13 21 9 D DC DAT A D D C _ OU T 1 14 DD C_ IN1 U 27 D 7 4 LV C 0 8P W 12 R 3 97 C5 4 8 11 L I D _ S W # 1 13 1 M _0 4 7 U 23 11 14 7 R 40 7 * 0. 1 u _ 16 V _ Y 5 V _0 4 C 13 1 2 3 4 10 DA C_ D DCA DA T A S Q 4B M TD N 7 0 02 Z H S 6R 3 .3 V R 40 8 7 5V S R N1 2 . 2 K _ 8P 4R _0 4 21 D 7 GN D 1 G ND 2 6p _ 5 0V _ N P O_ 04 6 p_ 5 0V _N P O_ 0 4 6 p_ 5 0 V _N P O_ 0 4 D DCD A T A 13 D 6 8 7 6 5 3 . 3V S 6 p _5 0 V _ N P O _0 4 6 p_ 5 0V _N P O_ 0 4 6 p _5 0 V _ N P O_ 0 4 6 p _5 0 V _ N P O _0 4 1 50 _ 1 %_ 0 4 R3 7 1 1 5 0_ 1 % _0 4 R 37 2 6 p_ 5 0 V _N P O_ 0 4 12 R 37 6 C 5 C5 2 3 1 0 0 0p _ 50 V _ X 7 R _ 0 4 C5 2 2 C7 C 52 4 2 2 0 p_ 5 0 V _N P O_ 0 4 C 52 8 C9 C 12 22 0 p _5 0 V _ N P O_ 0 4 C 16 1 00 0 p_ 5 0 V _X 7R _0 4 C 25 6 D A C _ B LU E B L 02 1 10 3 F C M1 0 0 5M F -6 00 T 01 4 L4 1 9 D A C _ GR E E N 21 F C M1 0 0 5M F -6 00 T 0 1 L1 V IN_ L CD *H C B 1 6 0 8K F - 12 1 T2 5 7 DA C _ RE D L4 6 p _ 50 V _ N P O _ 04 21 2A J_ C R T 1 1 0 8A H 1 5F S T0 4 A 1 C C DA C_ RE D Q 3 M TP 3 4 0 3N 3 S D G CRT 21 V IN V IN 1 5 0 _1 % _0 4 B.Schematic Diagrams CLOSE TO LVDS CONN. PIN 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 L V D S -U 2N L V D S -U 2P L V D S -U 1N L V D S -U 1P L V D S -U 0N L V D S -U 0P L V D S -L 0 N L V D S -L 0 P L V D S -L 1 N L V D S -L1 P Schematic Diagrams VGA PCI-E Interace GPU H7 H8 H 12 H8 _0D 4_3 H8_0 D4_ 3 H 8_0D 4_3 3V3 _RU N U26A 3 .3V S R 44 1u_6. 3V _X5R _04 10 0K_0 4 C 103 C9 2 C 120 C 38 C 43 C 33 PE X_IO VDD PE X_IO VDD A K27 0. 1u_16 V_Y 5V_ 04 0. 1u _16V_ Y5V _04 1u_6. 3V _X5R _04 1u_6 .3V _X5R _04 10u _6. 3V_X5 R_0 6 4. 7u_6 .3 V_X5R _06 22 u_6. 3V_ X5R _08 4 PE RS TB# PEX_I OVD DQ PEX_I OVD DQ PEX_I OVD DQ PEX_I OVD DQ A G1 1 A G1 2 A G1 3 A G1 5 PEX_I OVD DQ PEX_I OVD DQ PEX_I OVD DQ A G1 A G1 A G1 A G2 A G2 A G2 PEX_R ST PEX_I OVD DQ PEX_I OVD DQ PEX_I OVD DQ A R1 3 PEX_C LKREQ PEX_I OVD DQ R6 1 3 3V3_ RU N 100K _04 R55 G D *0_0 4 S P EX_C LK RE Q#_ R 1 9 P EG _CL KR EQ # Q29 MTN 700 2ZH S3 R 64 *220 _1%_04 PEX _TST CLK _O UT PEX _TST CLK _O UT# AJ1 7 AJ1 8 PEX_T STCLK_O UT PEX_T STCLK_O UT VG A_P EXC LK A R1 6 VG A_P EXC LK VG A_P EXC LK # VG A_P EXC LK# A R1 7 PEX_R EFC L K 2 2 PE G_ RX0 PE G_ RX# 0 PEG _R X0 PEG _R X#0 AL1 7 A M1 7 PEX_T X0 PEX_T X0 2 P EG _TX0 2 P EG _TX# 0 PEG _TX0 PEG _TX# 0 AP1 7 A N1 7 PEX_R X0 PEX_R X0 2 2 PE G_ RX1 PE G_ RX# 1 2 P EG _TX1 2 P EG _TX# 1 2 2 PE G_ RX2 PE G_ RX# 2 2 P EG _TX2 2 P EG _TX# 2 2 2 PE G_ RX3 PE G_ RX# 3 2 P EG _TX3 PEG _R X1 PEG _R X#1 C 71 C 77 0. 22u _10V_ X5R _04 0. 22u _10V_ X5R _04 PE X_R X0 PE X_R X0# C 75 C 81 0. 22u _10V_ X5R _04 0. 22u _10V_ X5R _04 PE X_R X1 PE X_R X1# C 86 C 82 0. 22u _10V_ X5R _04 0. 22u _10V_ X5R _04 PE X_R X2 PE X_R X2# AL1 9 AK1 9 A R1 9 A R2 0 PEG _TX2 PEG _TX# 2 PEG _R X3 PEG _R X#3 A M1 9 A N1 9 AP1 9 PEG _TX1 PEG _TX# 1 PEG _R X2 PEG _R X#2 A M1 8 C 85 C 93 0. 22u _10V_ X5R _04 0. 22u _10V_ X5R _04 PE X_R X3 PE X_R X3# PEG _TX3 PEG _TX# 3 PE G_ RX4 PE G_ RX# 4 PEG _R X4 PEG _R X#4 2 P EG _TX4 2 P EG _TX# 4 PEG _TX4 PEG _TX# 4 2 2 PE G_ RX5 PE G_ RX# 5 2 P EG _TX5 PEG _R X5 PEG _R X#5 C 94 C 100 0. 22u _10V_ X5R _04 0. 22u _10V_ X5R _04 PE X_R X4 PE X_R X4# BBA I SN_NC BBA I SP_NC P LAC E N EAR BG A 22 0 0 mA 0. 22u _10V_ X5R _04 0. 22u _10V_ X5R _04 PE X_R X5 PE X_R X5# C 118 C 119 0. 22u _10V_ X5R _04 0. 22u _10V_ X5R _04 PE X_R X6 PE X_R X6# PEG _TX5 PEG _TX# 5 PE G_ RX6 PE G_ RX# 6 PEG _R X6 PEG _R X#6 2 P EG _TX6 2 P EG _TX# 6 PEG _TX6 PEG _TX# 6 2 PE G_ RX7 2 PE G_ RX# 7 2 P EG _TX7 2 P EG _TX# 7 PEG _R X7 PEG _R X#7 PEG _TX7 PEG _TX# 7 C 122 0. 22u _10V_ X5R _04 C 132 0. 22u _10V_ X5R _04 PE X_R X7 PE X_R X7# C 79 C9 5 C66 0. 1u_16 V_Y 5V_ 04 0. 1u _16V_ Y5V _04 1u_6. 3V _X5R _04 1u_6. 3V _X5R _04 10 u_6. 3V_ X5R _06 PEX_R X3 PEX_R X3 A M2 1 A M2 2 PEX_T X4 PEX_T X4 A J21 A J22 A J24 A J25 A J27 A K18 A K20 A K23 PEX_R X4 PEX_R X4 16 m li PEX _VD D_ SVD D D6 D 7 R3 4 E5 E 7 R3 5 F4 G5 H 32 P 6 R3 0 U7 V6 Y4 PEX_R X5 PEX_R X5 PEX_T X6 PEX_T X6 NC NC NC PEX_T X7 PEX_T X7 A N2 5 AP2 5 PEX_R X7 PEX_R X7 AL2 5 AK2 5 PEX_T X8 PEX_T X8 A R2 5 A R2 6 PEX_R X8 PEX_R X8 VDD 33 J VDD 33 J VDD 33 J VDD 33 J VDD 33 J VG A_R O M_S I VG A_R O M_S O VG A_R O M_S CL K 5 2 6 W5 W7 V7 VG A_S TRA P0 VG A_S TRA P1 VG A_S TRA P2 I2C H_SC L F6 I2C H _SC L R 384 *2 .2 K_04 G6 I2C H _SD A R 383 *2 .2 K_04 9 40. 2K_ 1%_04 M_S TRA P_R EF 0 N 40. 2K_ 1%_04 M_S TRA P_R EF 1 M9 VC C 8 C 531 *0 .1u _16V _Y5V _04 SI SO 4 SC K GN D *MX25L 5121E MC - 20G 6-04-25512-B71 6-04-25512-B70 6-04-25512-B72 6-04-25010-490 CEC S PDI F_NC A5 BU FRST PGO OD _OUT A4 C5 MU LTI_STR AP_R EF0_GN D MU LTI_STR AP_R EF1_GN D AK1 4 K9 N 12P -G V 2-A 1 NC NC NC AL2 3 A M2 3 WP CS S TRAP 0 S TRAP 1 S TRAP 2 I2CH _SDA A K26 A L16 A F6 A G6 A J5 A K15 A L7 B7 C 7 R3 80 D5 A R2 2 A R2 3 R OM_SI ROM_SO R OM_SCLK D3 C4 D4 G ND G ND NC NC NC NC NC NC NC NC NC NC NC NC NC NC A M2 4 A M2 5 22u_6. 3V _X5R _08 R 57 R 60 A2 A7 A A4 A B4 A B7 A C5 A D6 PEX_T X5 PEX_T X5 PEX_R X6 PEX_R X6 C36 4 .7u _6. 3V_X 5R_ 06 P LAC E N EAR BG A P LAC E N EAR BA LLS NC NC NC NC NC NC AL2 2 AK2 2 AP2 3 A N2 3 C 131 P EX_ VD D P LAC E N EA R BA LLS L5 PEX_R X2 PEX_R X2 PEX_T X3 PEX_T X3 C 44 AB 5 A G1 9 PEX_S VDD _ 3V 3 PE X_SVDD _3V3_NC F 7 P EX_SVD D_3V3 PEX_T X2 PEX_T X2 U 24 H OLD 1 3V3_R U N C8 4 3V 3_R UN G F108 G T21X AL2 0 2 P EG _TX# 5 2 2 PEX_I OVD DQ PEX_I OVD DQ ROM_CS C3 P EX_ VD D A G2 5 A G2 6 A J14 A J15 A J19 PEX_R X1 PEX_R X1 AP2 0 A N2 0 A N2 2 AP2 2 C 106 C 107 PEX_T X1 PEX_T X1 A M2 0 2 P EG _TX# 3 2 2 PEX_R EFC L K 3 VG A_R O M_C S# 7 6 7 8 2 3 4 J2 6 J2 5 *10K_ 04 L6 HC B 1608K F- 121T2 5 16 mi l H CB 1005K F- 121 T20 C 104 C5 8 4. 7u_ 6. 3V_X5 R_0 6 0. 1u_10V _X5R _04 V I D_P LLVD D C 51 C 45 C4 1 C4 9 C 42 4 .7u _6. 3V_X 5R_ 06 10u_ 6.3 V_X5 R_0 6 0. 1u_10V _X5R _04 0. 1u_10 V_X5R _04 NE AR PI N AD 9 0. 1u_1 0V_X5 R_0 4 N EAR PI N A F9 12 mi l S P_P LLV DD Sheet 12 of 49 VGA PCI-E Interace U26D 14/ 16XTA L_PLL A E9 A D9 A F9 PLLVD D VI D_PLLVD D SP _PLLVDD PL AC E NE AR BAL LS C4 8 C 61 4. 7u_6. 3V _X5R _06 0. 1u_1 0V_X5 R_0 4 N EAR PI N A E9 X_S SI N D2 B1 XT AL_SSIN XTAL_O UTB UFF XT AL_IN XTAL_O UT D1 X_O U TBU FF B2 R 381 0_0 4 R38 2 STR AP 4 N 12P- G V2- A 1 10 K_04 10K_0 4 FSX8L_25MHz? ? ? ? ? 0_0 4 STR AP 3 0_0 4 PG OO D 0_0 4 MU LTI _S TRA P_R EF 2_G ND X6 XTAL_ IN HS X840G A_ 27MHZ 2 1 XTA L_O UT C 29 C2 6 X5 2 0p_50V _N PO _04 4 20p_5 0V_N PO _04 3 1 2 *H S X321S _27MHZ 10 11 12 13 9 3V 3_R UN C6 5 C 56 C 40 C 35 C 62 0. 1u_16 V_Y 5V_0 4 0. 1u_16 V_Y 5V_ 04 0. 1u_1 6V_Y 5V _04 4. 7u_6 .3 V_X5R _06 1u _6. 3V_X 5R_ 04 Cry s ta l 80 4 5 & 3 2 2 5 Co- la y PLA CE N EA R BA LLS AL2 6 A M2 6 PEX_T X9 VDD_S ENSE PEX_T X9 VDD_S ENSE VDD_S ENSE G ND_S ENSE G ND_S ENSE G ND_S ENSE AP2 6 A N2 6 PEX_R X9 PEX_R X9 A M2 7 A M2 8 PEX_T X10 PEX_T X10 A N2 8 AP2 8 PEX_R X10 PEX_R X10 AL2 8 AK2 8 PEX_T X11 A R2 8 A R2 9 PEX_R X11 PEX_R X11 AK2 9 AL2 9 PEX_T X12 PEX_T X12 D 35 P7 A D2 0 A D1 9 R7 A M2 9 A M3 0 PS 1_V DD _SE NS E PS 1_G ND _S EN SE 41 41 R28 *20K _1%_04 V GA _R OM_SI R 379 R37 4 *4. 99K _1%_04 V GA _R OM_SO R 375 2 0K_1%_ 04 R29 *15K _1%_04 V GA _R OM_SC LK R 378 1 5K_1%_ 04 R37 45. 3K _1%_04 V GA _ST RA P0 R 38 *4. 99 K_1%_0 4 R49 *34. 8K _1%_04 V GA _ST RA P1 R 48 4 .99 K_1%_0 4 R47 30K _1%_04 V GA _ST RA P2 R 46 *24 .9 K_1%_0 4 E 35 1 0K_04 PEX_ VD D 1 6 mi l PEX_T X11 PEX _ P LLVDD A G1 4 AP2 9 A N2 9 3V 3_R U N PS 1_VD D _SE NS E PS 1_G ND _S EN SE L7 P EX_P LLV DD C 73 C72 C7 0 0. 1u_ 16V_ Y5V _04 1u_6. 3V _X5R _04 4. 7u_6. 3V _X5R _06 PLA CE NE AR B ALLS PEX_R X12 PEX_R X12 H C B10 05KF -1 21T20 12/ 7 PL AC E NE AR BG A 1u->0.1u C990525 PEX_T X13 PEX_T X13 A N3 1 AP3 1 PEX_R X13 PEX_R X13 A M3 1 A M3 2 PEX_T X14 PEX_T X14 A R3 1 A R3 2 PEX_R X14 PEX_R X14 A N3 2 AP3 2 PEX_T X15 PEX_T X15 A R3 4 AP3 4 PEX_R X15 PEX_R X15 De f a ult N1 2 P- GV2 RED M A RK GT21X RF U GF108 PEX_P LL _H VDD _NC A G2 0 PEX_TER MP A G2 1 PE X_TE RMP R74 R2 9 R4 7 R 46 N 12P -GS 15 K X X 24 .9K 6-04-41164-E35 SAM SUN G 1G K 4W1 G16 46G -BC 11 20 K X 15K 30 K X 6-04-42164-E30 SAM SUN G 2G K 4W2 G16 46C -HC 11 45 .3K A P35 G PU _TES TMOD E R42 2 R37 8 V GA ROM T ype R3 79 2.4 9K_1 % _ 04 N 12P -GV 2 TE STMODE De f aul t 1 G VGA R O M G RE EN M AR K V GA CAR D 10K_ 04 N1 2P- GV 2- A1 16, 37, 41 13, 37 39 , ,10 1 ,1 1 , 8 ,1 9,2 0,2 1, 22, 23, 24, 25, 27, 28, 30, 31, 32, 33, 34, 35, 39 3V3 _RU N PE X_VD D 3. 3VS VGA PCI-E Interace B - 13 B.Schematic Diagrams PEX_I OVD DQ PEX_I OVD DQ PEX_I OVD DQ PEX_I OVD DQ PEX_I OVD DQ PEX_I OVD DQ PEX_I OVD DQ PEX_I OVD DQ PEX_I OVD DQ PEX_I OVD DQ PEX_I OVD DQ PEX_I OVD DQ 12/7 ? BIOS share ROM , ? ? ?? ? R3 73 U 26K 13/16M I SC2 2 PLT_ RS T# 19 19 C1 39 A M1 6 1 34 dG P U_R ST # 3, 22, 28 A K16 A K17 A K21 A K24 P LAC E N EAR BA LLS 5 C3 9 3 V3_R U N PE X_IO VDD PE X_IO VDD PE X_IO VDD 3V 3_R UN U4 MC 74VH C 1G0 8DF T2G BI OS R OM PE X_V DD 1/16 PCI _EXPR ESS Schematic Diagrams VGA Frame Buffer Interface F ram e Buf fer Interface U 26B U 26C 3/16F BB FB A_D 2 FB A_D 3 FB A_D 4 FB A_D 5 FB A_D 6 FB A_D 7 FB A_D 8 FB A_D 9 FB A_D 10 FB A_D 11 FB A_D 12 FB A_D 13 FB A_D 14 FB A_D 15 FB A_D 16 FB A_D 17 FB A_D 18 FB A_D 19 FB A_D 20 FB A_D 21 FB A_D 22 FB A_D 26 FB A_D 27 FB A_D 28 FB A_D 29 FB A_D 30 FB A_D 31 FB A_D 32 FB A_D 33 FB A_D 34 FB A_D 35 FB A_D 36 FB A_D 37 FB A_D 38 FB A_D 39 FB A_D 40 FB A_D 41 FB A_D 42 FB A_D 43 FB A_D 44 FB A_D 45 FB A_D 46 Sheet 13 of 49 VGA Frame Buffer Interface FB A_D 47 FB A_D 48 FB A_D 49 FB A_D 50 FB A_D 51 FB A_D 52 FB A_D 53 FB A_D 54 FB A_D 55 FB A_D 56 FB A_D 57 FB A_D 58 FB A_D 59 FB A_D 60 FB A_D 61 FB A_D 62 FB A_D 63 1 4 FB AD Q M[ 7: 0] FB AD Q M5 FB AD Q M6 FB AD Q M7 14 FB AD QS _WP[ 7: 0] FB VDD Q FB VDD Q FB VDD Q FB VDD Q FB VDD Q FB VDD Q A J28 B 18 E 21 G 17 G 18 C5 0 C 80 F BC _D1 1 F BC _D1 2 F BC _D1 3 G 33 E 34 E 33 G 31 F 30 G 30 F BA_D13 F BA_D14 FB VDD Q FB VDD Q 4. 7u_6 .3 V_X5 R_0 6 F BC _D1 4 F BC _D1 5 FB VDD Q FB VDD Q FB VDD Q G 22 G8 G9 H 29 J1 4 J1 5 1u_6. 3V _X5R _04 F BA_D15 F BA_D16 F BA_D17 G 32 K 30 F F F F F F F F BA_D18 BA_D19 BA_D20 BA_D21 BA_D22 BA_D23 BA_D24 BA_D25 FB VDD Q FB VDD Q FB VDD Q FB VDD Q FB VDD Q FB VDD Q FB VDD Q FB VDD Q J1 6 J1 7 F BA_D26 F BA_D27 F BA_D28 FB VDD Q J2 9 K 32 H 30 K 31 L31 L30 M32 N 30 M30 P 31 R 32 R 30 AG 30 AG 32 AH 31 AF 31 AF 30 FB VDD Q FB VDD Q FB VDD Q F BA_D5 F BA_D6 FB VDD Q FB VDD Q F F F F F F AK 32 A J30 AH 30 AH 33 AH 35 F F F F F BA_D45 BA_D46 BA_D47 BA_D48 BA_D49 AH 34 AH 32 A J33 A L35 AM34 AM35 F F F F F BA_D50 BA_D51 BA_D52 BA_D53 BA_D54 AF 33 AE 32 F BA_D55 F BA_D56 F BA_D57 AF 34 AE 35 AE 34 F BA_D58 F BA_D59 F BA_D60 F BA_D61 F BA_D62 F BA_DQ M0 F BA_DQ M1 P 30 AF 32 A L32 A L34 AF 35 F BA_DQ M2 F BA_DQ M3 F BA_DQ M4 F BA_DQ M5 F BA_DQ M6 F BA_DQ M7 0. 1u_10 V_X5R _0 4 0. 1u_1 0V_X 5R_ 04 01 . u _10V _X5R _04 0. 1u_10V _X5R _04 F BA_DQ S_WP0 F BA_DQ S_WP1 F BA_DQ S_WP2 F BA_DQ S_WP3 F BA_DQ S_WP4 F BA_DQ S_WP5 FBA D QS _WP6 A J34 FBA D QS _WP7 AC 33 F BA_DQ S_WP6 F BA_DQ S_WP7 FBA D QS _RN 0 L35 G 35 F BA_DQ S_RN 0 H 31 N 32 F BA_DQ S_RN 1 F BA_DQ S_RN 2 F BA_DQ S_RN 3 F BA_DQ S_RN 4 F BA_DQ S_RN 5 F BC _D8 F BC _D9 F BC _D1 0 P LAC E N EA R BG A F BC _D1 F BC _D1 F BC _D1 F BC _D1 F BC _D2 F BC _D2 F BC _D2 4 F BC _D2 5 F BC _D2 6 F BC _D2 F BC _D2 F BC _D2 F BC _D3 F BC _D3 F BC _D3 F BC _D3 F BC _D3 FBA _C MD [ 31: 0] F BA _CMD [3 1: 0] FBA _C MD 1 FBA _C MD 17 FBA _C MD 31 GT21X FBA _CM D25 FBA _CM D23 FBA _CM D2 FBA _CM D0 FBA _CM D10 FBA _CM D26 FBA _CM D14 FBA _CM D7 FBA _CM D1 FBA _CM D22 FBA _CM D20 FBA _CM D24 FBA _CM D18 FBA _CM D9 FBA _CM D29 FBA _CM D8 FBA _CM D27 FBA _CM D15 FBA FBA FBA FBA FBA FBA FBA FBA _CM D11 _CM D16 _CM D28 _CM D3 _CM D17 _CM D5 _CM D4 _CM D21 FBA _CM D6 FBA _CM D13 FBA _CM D19 FBA _CM D12 FBA _CM D30 N/ A U 30 V 30 U 31 V 32 FB A_CMD3 FB A_CMD4 FB A_CMD5 T3 5 U 33 FB A_CMD6 FB A_CMD7 FB A_CMD8 W3 2 W3 3 W3 1 FB A_CMD9 FB A_CMD10 W3 4 U 34 U 35 FB A_CMD11 FB A_CMD12 FB A_CMD13 FB A_CMD14 FB A_CMD15 U 32 T3 4 T3 3 W3 0 A B30 FB A_CMD16 FB A_CMD17 FB A_CMD18 FB A_CMD19 FB A_CMD20 FB A_CMD21 A A30 A B31 A A32 A B33 Y 32 FB A_CMD22 FB A_CMD23 Y 33 A B34 A B35 FBA _C MD 0 FBA _C MD 1 FBA _C MD 2 FBA _C MD 3 FBA _C MD 4 FBA _C MD 5 F BA_ OD T_L F BA_ OD T_H F BA_ CK E_L F BA_ CK E_H F BA_ RS T# 10K_ 04 10K_ 04 10K_ 04 10K_ 04 F BC _D5 9 F BC _D6 0 F BC _D6 1 F BC _D6 2 F BC _D6 3 15 FB CD Q M0 FB CD Q M1 FB CD Q M2 FB CD Q M3 FB CD Q M4 FB CD Q M5 Y 31 Y 30 FB A_CMD30 FB A_CMD31 W2 9 Y 29 FBA _C MD 30 FBA _C MD 31 FBA _CLK0 FBA _CLK0 T3 2 T3 1 A C3 1 FBA _C LK0 FBA _C LK0# FBA _CLK1 FBA _CLK1 A C3 0 FB CD Q M6 FB CD Q M7 T3 0 T2 9 F BA_DEB UG0_C AS2 F BA_WCK1 F BA_WCK2 FBA _DEBU G1 FB A_D EB U G0 FB A_D EB U G1 E13 F13 D 30 E29 B29 C 31 C 29 FBB_D46 FBB_D47 FBB_D48 FBB_D49 FBB_D50 B31 C 32 B32 B35 B34 A29 FBB_D51 FBB_D52 FBB_D53 FBB_D54 FBB_D55 B28 A28 FBB_D56 FBB_D57 FBB_D58 C 28 C 26 D 25 FBB_D59 FBB_D60 FBB_D61 R8 5 R8 0 *6 0.4 _04 *1 0K_04 P LA CE N EA R B GA C LO SE T O C APS PLA C E NE AR BAL LS GT 2 1X R FU R FU G T21X GF108 FB _DLLAVD D F B_PLLAVD D C1 01 C 108 1u_6 .3V _X5R _04 4. 7u_ 6.3 V_X5 R_0 6 F BC _C MD [ 31: 0] 15 GT21X FBB _CM D25 FBB _CM D23 FBB _CM D2 FBB _CM D0 FBB _CM D10 FBB _CM D26 FBB _CM D14 FBB _CM D7 FBB _CM D29 FBB _CM D8 D 27 D 34 A34 D 28 FBB_DQ M3 FBB_DQ M4 FBB_DQ M5 FBB_DQ M6 FBB_DQ M7 FBB_DQ S_WP0 FBB_DQ S_WP1 FBB_DQ S_WP2 FBB_DQ S_WP3 FB CD Q S_WP 5 D 32 FB CD Q S_WP 6 A32 FBB_DQ S_WP4 FBB_DQ S_WP5 FBB_DQ S_WP6 FB CD Q S_WP 7 B26 FBB_DQ S_WP7 FB CD Q S_R N0 FB CD Q S_R N1 B14 B10 D9 FBB_DQ S_RN 0 FBB_DQ S_RN 1 FBB _CM D27 FBB _CM D15 FBB _CM D11 FBB FBB FBB FBB FBB FBB FBB FBB _CM D16 _CM D28 _CM D3 _CM D17 _CM D5 _CM D4 _CM D21 _CM D6 FBB _CM D13 FBB _CM D19 FBB _CM D12 FBB _CM D30 N /A UNUSED NTES GF 10 8 FB B_CMD0 FB B_CMD1 FB B_CMD2 FB B_CMD3 F 18 E 19 D 18 C 17 F 19 FB C_C MD0 FB B_CMD4 FB B_CMD5 FB B_CMD6 C 19 B 17 FB B_CMD7 FB B_CMD8 FB B_CMD9 E 20 B 19 D 20 FB B_CMD10 FB B_CMD11 A 19 D 19 C 20 FB B_CMD12 FB B_CMD13 FB B_CMD14 FB B_CMD15 FB B_CMD16 F 20 B 20 G 21 F 22 F 24 FB B_CMD17 FB B_CMD18 FB B_CMD19 FB B_CMD20 FB B_CMD21 FB B_CMD22 F 23 C 25 C 23 F 21 E 22 FB B_CMD23 FB B_CMD24 D 21 A 23 D 22 FB B_CMD25 FB B_CMD26 FB B_CMD27 B 23 C 22 B 22 FB B_CMD28 FB B_CMD29 FB B_CMD30 A 22 A 20 FB C_C MD2 FB C_C MD2 FB C_C MD2 FB C_C MD2 FB C_C MD2 FB C_C MD3 FB B_CMD31 G 20 FB C_C MD3 1 FB C_C MD1 FB C_C MD2 FB C_C MD3 FB C_C MD4 FB C_C MD5 FB C_C MD6 FBA _O DT _L FBA _O DT _H FBA _C KE _L FBA _C KE _H FBA _R ST# FB C_C MD7 FB C_C MD8 FB C_C MD0 R 67 FB C_C MD1 9R 71 FB C_C MD3 R 68 FB C_C MD1 6R 77 FB C_C MD2 0R 72 FB C_C MD9 FB C_C MD1 0 FB C_C MD1 1 FB C_C MD1 FB C_C MD1 FB C_C MD1 FB C_C MD1 FB C_C MD1 FB C_C MD1 FB C_C MD1 FB C_C MD1 2 3 4 5 6 7 8 9 FB C_C MD2 0 FB C_C MD2 1 FB C_C MD2 2 FB C_C MD2 3 FB C_C MD2 4 5 6 7 8 9 0 FB CD Q S_R N[ 7: 0] E14 F26 D 31 A31 A26 FBB_DQ S_RN 2 FBB_DQ S_RN 3 FBB_DQ S_RN 4 FBB_DQ S_RN 5 FBB_DQ S_RN 6 E 17 FB B_CLK0 FB B_CLK0 FB B_CLK1 FB B_CLK1 D 17 D 23 FB C_C LK 0 FB C_C LK 0# FB C_C LK 1 FB C_ CLK 0 1 5 FB C_ CLK 0# 15 E 23 FB C_C LK 1# FB C_ CLK 1 1 5 FB C_ CLK 1# 15 G 19 G 16 FB C_D EB U G0 FB C_D EB U G1 R 70 *6 0. 4_04 R 69 *1 0K_0 4 FB _CA L_P D_V D DQ R 78 4 0. 2_1%_04 FB _CA L_P U_G N D R 84 4 0. 2_1%_04 FB _CA L_TE RM_G N D R 79 6 0. 4_1%_04 FBB_DQ S_RN 7 FBB_WCK0 FBB_WCK0 F BB_DE BUG 0_ C AS2 FBB _DEBU G1 F B V D DQ FBB_WCK1 FBB_WCK1 FBB_WCK2 FBB_WCK2 FBB_WCK3 FBB_WCK3 L8 PE X_VD D HC B16 08KF - 121T25 1 6m i l FB A_ PLLA VD D_ GP U C12 1 C 130 C13 3 C14 3 0.1 u_10V _X5R _04 *0. 1u_ 10V_ X7R _04 1u_16 V_X5R _0 6 10u_6. 3V _X5R _06 NE AR P I N AG 27 N EA R P N I AF2 7 F B_CAL_PD _VDD Q FB_CAL_P U_GN D FB_CA L_TERM_GN D FB_VR EF C89 C 83 0.1 u_10V _X5R _04 NE AR P I N J19 *0. 1u_10 V_X7 R_0 4 N EAR PI N J1 8 1u ? ? X7R NV suggest BEAD 30 ohms @100Mhz (ESR=0.01ohms) NV suggest 12, 37 14, 15, 37 B - 14 VGA Frame Buffer Interface 0. 1u_10 V_X5 R_0 4 P LAC E N EA R B GA FB C_C MD1 7 FB C_C MD3 1 FBB_DQ M0 FBB_DQ M1 FBB_DQ M2 N 12P -G V 2-A 1 N 12P -G V2 A - 1 01 . u_10V _X5R _04 FB C_C MD1 FBB_D62 FBB_D63 G 28 G 24 G 25 A G2 7 A F27 0. 1u_ 10V_ X5R _04 FBC _C MD[ 31: 0] A16 D 10 F11 D 15 G 14 G 15 G 11 G 12 G 27 F B V DD Q C1 27 0. 1u_10 V_X5 R_0 4 FBB_D43 FBB_D44 FBB_D45 FB CD Q S_WP [7 0 : ] FB CD Q S_R N2 FB CD Q S_R N3 FB CD Q S_R N4 F BA_WCK2 F BA_WCK3 F BA_WCK3 C 96 FBB_D40 FBB_D41 FBB_D42 FBB _CM D1 FBB _CM D22 FBB _CM D20 FBB _CM D24 FBB _CM D18 FBB _CM D9 FB CD Q S_R N [7 0 :] F BA_ CLK 0 1 4 F BA_ CLK 0# 14 F BA_ CLK 1 1 4 F BA_ CLK 1# 14 C 136 FBB_D30 FBB_D31 FBB_D38 FBB_D39 B25 A25 W 27 Y 27 C1 29 FBB_D19 FBB_D20 FBB_D21 FBB_D22 FBB_D23 FBB_D24 FBB_D25 FBB_D26 D 24 E25 E32 F32 D 33 E31 C 33 F29 FB CD Q S_WP 0 C 14 A10 FB CD Q S_WP 1 FB CD Q S_WP 2 E10 FB CD Q S_WP 3 D 14 FB CD Q S_WP 4 E26 15 FBA _C LK1 FBA _C LK1# D 11 E11 D 12 FB CD Q S_WP [ 7: 0] 15 FBA _C MD 22 FBA _C MD 23 Y 35 W3 5 Y 34 F12 D8 FBV D DQ P LAC E U N DE R BG A FBB_D14 FBB_D15 FBC D QM[ 7: 0] FBA _C MD 19 FBA _C MD 20 FBA _C MD 21 FB A_CMD27 FB A_CMD28 FB A_CMD29 FBB_D16 FBB_D17 FBB_D18 FB CD Q M[ 7: 0] FBA _C MD 11 FBA _C MD 12 FBA _C MD 13 FBA _C MD 14 FBA _C MD 15 FBA _C MD 16 FBA _C MD 17 FBA _C MD 18 FB CD Q S_R N5 FB CD Q S_R N6 FB CD Q S_R N7 F BA_WCK0 F BA_WCK0 F BA_WCK1 F B_VRE F_NC 3 4 5 6 7 8 FBA _C MD 8 FBA _C MD 9 FBA _C MD 10 FBA _C MD 24 FBA _C MD 25 FBA _C MD 26 FBA _C MD 27 FBA _C MD 28 FBA _C MD 29 B8 A8 E8 F8 F10 F9 FBB_D32 FBB_D33 FBB_D34 FBB_D35 FBB_D36 FBB_D37 F BC _D5 F BC _D5 F BC _D5 F BC _D5 F BC _D5 F BC _D5 10K_ 04 FBB_D8 FBB_D9 FBB_D10 FBB_D11 FBB_D12 FBB_D13 F BVDD Q F BVDD Q F BVDD Q C 10 C8 B11 C 11 A11 F27 F28 FBA _C MD 6 FBA _C MD 7 FB A_CMD24 FB A_CMD25 FB A_CMD26 F B_PLLAVD D J27 UNUSED NTES F BA_ CMD 0 R 81 F BA_ CMD 19 R 86 F BA_ CMD 3 R 106 F BA_ CMD 16 R 87 F BA_ CMD 20 R 110 F BVDD Q F BVDD Q E28 D 26 F25 F BC _D5 1 F BC _D5 2 FB A_CMD0 FB A_CMD1 FB A_CMD2 F BVDD Q F BVDD Q F BVDD Q FBB_D6 FBB_D7 F BC _D3 5 F BC _D3 6 0 1 2 3 4 5 6 7 F BVDD Q F BVDD Q F BVDD Q FBB_D3 FBB_D4 FBB_D5 FBB_D27 FBB_D28 FBB_D29 F BC _D4 8 F BC _D4 9 F BC _D5 0 GF108 FBB_D0 FBB_D1 FBB_D2 F14 F15 E16 F16 F17 D 29 F BC _D4 F BC _D4 F BC _D4 F BC _D4 F BC _D4 F BC _D4 F BC _D4 F BC _D4 14 D 13 A13 A14 C 16 B16 A17 D 16 C 13 7 8 9 0 1 2 3 4 F BC _D3 7 F BC _D3 8 F BC _D3 9 F BA_DQ S_RN 6 F BA_DQ S_RN 7 G F108 6 7 8 9 0 1 F BC _D2 2 F BC _D2 3 J2 3 J2 4 FB _DLLAVD D FB _VR E F_TP F BC _D3 F BC _D4 F BC _D5 F BC _D6 F BC _D7 J2 0 J2 1 J2 2 FBA D QS _RN [ 7: 0] AD 29 AE 29 C12 6 F BA_D42 F BA_D43 F BA_D44 F BA_D63 P 29 R 29 L29 M29 AG 29 AH 29 C 124 F BA_D39 F BA_D40 F BA_D41 P 32 H 34 J30 FBA D QS _RN 4 AD 32 FBA D QS _RN 5 A J31 FBA D QS _RN 6 A J35 FBA D QS _RN 7 AC 34 C 125 BA_D31 BA_D32 BA_D33 BA_D34 BA_D35 BA_D36 F BA_D37 F BA_D38 FB AD QS _R N[ 7: 0] C1 28 F BA_D29 F BA_D30 AE 30 AC 32 AD 30 AN 33 A L31 AM33 A L33 AK 30 AE 33 AB 32 AC 35 FB VDD Q FB VDD Q F BA_D2 F BA_D3 F BA_D4 FB AD QS _WP 7 [ : 0] FBA D QS _RN 1 FBA D QS _RN 2 FBA D QS _RN 3 B13 F BC _D0 F BC _D1 F BC _D2 F BA_D7 F BA_D8 F BA_D9 F BA_D10 F BA_D11 F BA_D12 H 33 G 34 L34 FBA D QS _WP0 FBA D QS _WP1 H 35 FBA D QS _WP2 J32 FBA D QS _WP3 N 31 FBA D QS _WP4 AE 31 FBA D QS _WP5 A J32 14 FB C_ D[ 63: 0] K 35 K 33 K 34 FB AD QM[ 7: 0] FB AD Q M0 FB AD Q M1 FB AD Q M2 FB AD Q M3 FB AD Q M4 FB C_D [ 63: 0] F BA_D0 F BA_D1 J18 J19 B.Schematic Diagrams FB A_D 23 FB A_D 24 FB A_D 25 15 FBV DD Q P LAC E U ND E R BG A L32 N 33 L33 N 34 N 35 P 35 P 33 P 34 M27 L27 K2 7 FB A_D 0 FB A_D 1 AE A 27 DA27 CA 27 BA29 BA27 A 31 AAAA 2927 FB A_D 6 [ 3: 0] V3 V 42V9 2U 7 29 U 27 T2 R 7 27 P2N727 2/16F BA FB A_D [ 63: 0] 14 PEX _VD D FBV DD Q F BV D D Q 10K _04 10K _04 10K _04 10K _04 10K _04 Schematic Diagrams VGA Frame Buffer A Frame Buffer Partition A F B A_ CMD [ 31 : 0] 13 F BA _C MD [ 31: 0] FB A _D [ 63: 0 ] 13 F B A_ D[ 6 3: 0] F BV D D Q FB VD D Q 13 FB A D QM[ 7 :0 ] F B AD Q M[ 7: 0] FB A D QS _W P [7 0 : ] 13 C 164 C 21 9 C 2 21 C6 20 C 220 C 16 5 C1 63 C 210 0. 1u _16 V_ Y5 V_ 04 0. 1 u_1 6V _Y 5V _04 0 .1 u_ 16V _Y 5V _0 4 0. 1u_ 16 V_Y 5 V_ 04 0. 1u _16 V_ Y 5V _04 1 u_6 .3 V_ X5R _ 04 1u_ 6. 3V _X5 R _04 1u _6. 3V _X 5R _0 4 FB A DQ S _W P[ 7: 0 ] C 1 59 C 161 C 21 6 C 1 60 C2 17 C 162 C 21 8 C2 15 0 . 1u_ 16V _Y 5V _0 4 0. 1u _16 V_ Y5 V_ 04 0. 1u _1 6V _Y 5V _04 0 .1 u_1 6V _Y 5V _0 4 0. 1u_ 16V _Y 5 V_ 04 1u _6. 3V _X 5R _0 4 1 u_6 .3 V_ X5R _ 04 1u_ 6. 3V _X5 R _04 C 6 22 C 580 C 57 8 C 5 77 C5 79 C 618 C 61 7 C6 21 0 . 1u_ 16V _Y 5V _0 4 0. 1u _16 V_ Y5 V_ 04 0. 1u _1 6V _Y 5V _04 0 .1 u_1 6V _Y 5V _0 4 0. 1u_ 16V _Y 5 V_ 04 1u _6. 3V _X 5R _0 4 1 u_6 .3 V_ X5R _ 04 1u_ 6. 3V _X5 R _04 FB A D QS _R N [ 7: 0 ] 13 FB A DQ S _R N [ 7: 0] FB V D DQ C 601 C 19 8 C 19 4 C6 04 1u_ 6. 3V _X 5R _04 1u _6. 3 V_X 5R _0 4 1 u_6 .3 V_ X5R _ 04 1u_ 6. 3V _X5 R _04 FB VD D Q F BV D D Q C 624 C 62 5 C 6 19 C6 15 C 581 C 58 3 C5 84 C 582 0. 1u _16 V_ Y5 V_ 04 0. 1 u_1 6V _Y 5V _04 0 .1 u_ 16V _Y 5V _0 4 0. 1u_ 16 V_Y 5 V_ 04 0. 1u _16 V_ Y 5V _04 1 u_6 .3 V_ X5R _ 04 1u_ 6. 3V _X5 R _04 1u _6. 3V _X 5R _0 4 U8 MI RR O R MOD E C OMMAN D MAP PI NG U 31 F BV D D Q J3 K3 L3 F BA _C M D 11 F BA _C MD 15 F BA _C MD 28 F BA _C MD 2 L2 R AS VD D C AS VD D WE CS VD D VD D VD D P7 P3 N2 F BA _C MD 6 F BA _C MD 22 VD D VD D A1 A2 VD D VD D P8 F BA _C MD 26 F BA _C MD 5 F BA _C MD 21 P2 R8 R2 F BA _C MD 8 T8 F BA _C MD 4 F BA _C MD 25 F BA _C MD 23 R3 L7 F BA _C MD 9 N7 T3 R7 F BA _C MD 12 A3 A4 VD D Q A5 A6 A7 VD D Q VD D Q VD D Q A8 A9 VD D Q VD D Q A1 0 A1 1 VD D Q VD D Q A1 2 A1 3 VD D Q F B A_ CM D 1 1 F B A_ CMD 1 5 F B A_ CMD 2 8 F B A_ CMD 2 K2 K8 N1 N9 R1 R9 F B A_ CMD 7 F B A_ CMD 1 0 F B A_ CMD 2 4 J 3 K3 L3 L2 P7 P3 N2 A1 A8 C1 C9 F B A_ CMD 2 6 F B A_ CMD 5 F B A_ CMD 2 1 P2 R8 R2 D2 F B A_ CMD 8 T8 E9 F1 F B A_ CMD 4 F B A_ CMD 2 5 F B A_ CMD 2 3 R3 L7 F B A_ CMD 9 N7 T3 H9 F B A_ CMD 1 2 V DD V DD W E CS V DD V DD V DD A0 V DD V DD A1 A2 V DD V DD N3 F B A_ CMD 6 F B A_ CMD 2 2 H2 RA S CA S P8 R7 A3 A4 V D DQ A5 A6 A7 V D DQ V D DQ V D DQ A8 A9 V D DQ V D DQ A 10 A 11 V D DQ V D DQ A 12 A 13 V D DQ B2 D9 G7 K2 0 - 31 32-63 CKE CMD1 CMD8 A8 A8 CMD2 CMD3 CMD4 CMD2 CMD21 CMD24 CS0* A7 A6 A2 A1 CMD5 CMD6 CMD7 CMD23 CMD26 CMD7 A11 A9 A5 A4 A0 A12 FB A _C MD 11 FB A _C MD 15 CMD8 CMD15 CAS* CAS * FB A _C MD 25 FB A _C MD 18 CMD9 CMD13 CMD10 CMD4 K8 N1 N9 CMD11 CMD18 CMD15 CMD17 A1 F BA _C MD 13 F BA _C MD 27 M2 N8 M3 F BA _C MD 3 F BA _C LK 0 K9 J7 F BA _C LK 0# K7 F B A_ CMD 2 9 BA 0 BA 1 V SS BA 2 V SS V SS 13 13 F BA _C LK 0 F BA _C LK 0# J1 J9 L1 L9 M7 T7 C KE V SS V SS CK V SS CK V SS V SS V SS NC1 V SS NC2 NC3 NC4 V SS V SS NC5 NC6 V S SQ V S SQ V S SQ V S SQ F BA _C MD 20 T2 F BA _C MD 0 K1 F BA _Z Q 0 L8 V S SQ V S SQ V S SQ R ES E T OD T V S SQ V S SQ A9 B3 F B A_ CMD 1 3 F B A_ CMD 2 7 M2 N8 M3 F B A_ CMD 3 F B A_ CL K0 K9 J 7 F B A_ CL K0 # K7 E1 G8 CMD19 CMD28 WE* D2 F BA _C L K0 M1 M9 P1 E3 F7 F2 F8 H3 H8 FB A _D 13 FB A _D 10 FB A _D 15 G2 H7 FB A _D 11 D Q L0 D Q L1 D QU 0 D QU 1 D Q L2 D QU 2 D Q L3 D Q L4 D QU 3 D QU 4 D Q L5 D QU 5 D Q L6 D QU 6 D Q L7 D QU 7 D ML D Q SL D Q SL D MU D Q SU D Q SU FB A DQ M1 E7 F3 FB A DQ S _W P1 FB A DQ S _R N 1 G 3 VS S CK E VS S VS S CK VS S CK VS S VS S VS S NC1 VS S NC2 NC3 NC4 VS S VS S R 434 P9 T1 J 1 J 9 16 0_1 %_04 T9 L1 L9 F BA _C L K0 # B1 B9 M7 T7 D1 D8 E2 NC5 NC6 VS SQ VS SQ VS SQ VS SQ E8 F BV D D Q F9 G1 G9 F BA _C MD 20 T2 F BA _C MD 0 K1 FB A _Z Q1 L8 R E SE T OD T R 1 32 16mil<500mil VR E FD Q VR E F CA 2 43 _1%_ 04 FB A _D 8 B A2 VS SQ VS SQ VS SQ VS SQ VS SQ A1 0 CMD20 CMD10 A1 A2 CMD21 CMD25 A10 WE* CMD22 CMD9 A12 A0 E9 F1 H2 CMD23 CMD1 CS1* CMD24 CMD11 RAS* CMD25 CMD0 ODT H9 A6 RAS* FB A _C MD 9 FB A _C MD 24 FB A _C MD 10 FB A _C MD 13 FB A _C MD 26 FB A _C MD 22 FB A _C MD 21 FB A _C MD 5 P7 P3 N2 P8 P2 R8 R2 T8 FB A _C MD 23 FB A _C MD 28 FB A _C MD 4 R3 L7 FB A _C MD 7 N7 T3 R7 J2 J8 13 13 M1 M9 P1 FB A _C MD 29 FB A _C MD 6 FB A _C MD 30 M2 N8 M3 FB A _C LK 1 FB A _C LK 1# FB A _C MD 16 FB A _C LK 1 K9 J7 FB A _C LK 1# K7 R 1 30 0 .0 1u _16 V_ X7R _0 4 11 . K_ 1%_ 04 FB A _D 22 FB A _D 19 F BA _D 2 9 F BA _D 2 8 E3 F7 C8 FB A _D 20 F BA _D 3 0 F2 C2 A7 A2 FB A _D 17 F BA _D 2 5 FB A _D 21 FB A _D 18 F BA _D 2 6 F BA _D 2 7 F8 H3 H8 B8 A3 FB A _D 23 F BA _D 3 1 D3 C7 B7 F BA D Q M2 F BA D Q S_ WP 2 F BA D Q S_ R N2 K 4W 1G 16 46 G- B C 11 A0 V DD V DD A1 A2 V DD V DD A3 A4 V DDQ A5 A6 A7 V DDQ V DDQ V DDQ A8 A9 V DDQ V DDQ A10 A11 V DDQ V DDQ A12 A13 V DDQ F BA _D 2 4 G2 H7 D Q L0 D Q L1 D QU 0 D QU 1 D Q L2 D QU 2 D Q L3 D Q L4 D QU 3 D QU 4 D Q L5 D QU 5 D Q L6 D QU 6 D Q L7 D QU 7 D ML DQS L DQS L D MU D Q SU D Q SU F BA D Q M3 E7 F3 F BA D Q S_ WP 3 F BA D Q S_ R N3 G 3 K4 W1 G1 64 6G - BC 11 F BV D D Q F BA _C MD 11 F BA _C MD 15 F BA _C MD 25 F BA _C MD 18 K2 K8 N1 N9 R1 R9 F BA _C MD 9 F BA _C MD 24 F BA _C MD 10 J1 J9 T9 L1 L9 B1 B9 M7 T7 D1 D8 E2 FB A _C MD 20 T2 FB A _C MD 19 K1 BA 0 BA 1 VS S BA 2 VS S CK E VS S VS S CK VS S CK VS S VS S VS S NC 1 VS S NC 2 NC 3 NC 4 VS S VS S NC 5 NC 6 V SS Q V SS Q V SS Q RE S ET OD T FB A _Z Q2 F BA _V R EF 0 L8 V SS Q V SS Q V SS Q V SS Q V SS Q F BA _C MD 22 F BA _C MD 21 F BA _C MD 5 D2 F BA _C MD 8 T8 E9 F1 F BA _C MD 23 F BA _C MD 28 F BA _C MD 4 R3 L7 F BA _C MD 7 N7 T3 H9 F BA _C MD 14 A9 B3 FB A _D 3 FB A _D 6 F B A_ D3 7 F B A_ D3 3 E3 F7 C8 FB A _D 1 F B A_ D3 9 F2 C2 A7 A2 FB A _D 7 F B A_ D3 2 FB A _D 2 FB A _D 5 F B A_ D3 6 F B A_ D3 4 F8 H3 H8 B8 A3 FB A _D 0 F B A_ D3 8 B7 FB A D QM0 FB A D QS _W P0 FB A D QS _R N 0 P8 P2 R8 R2 R7 F B A_ D3 5 G2 H7 F B AD Q M4 E7 F3 F B AD Q S _WP 4 F B AD Q S _R N 4 G 3 DQ L 0 DQ L 1 F BA _C MD 6 F BA _C MD 30 M2 N8 M3 F BA _C MD 16 F BA _C LK 1 K9 J7 F BA _C LK 1# K7 E1 G8 VD D VD D WE CS VD D VD D VD D A0 VD D VD D A1 A2 VD D VD D A3 A4 VD D Q A5 A6 A7 VD D Q VD D Q VD D Q A8 A9 VD D Q VD D Q A1 0 A1 1 VD D Q VD D Q A1 2 A1 3 VD D Q B2 D9 G7 K2 K8 N1 N9 R1 R9 A1 D QU 0 D QU 1 DQ L 2 D QU 2 DQ L 3 DQ L 4 D QU 3 D QU 4 DQ L 5 D QU 5 DQ L 6 D QU 6 DQ L 7 D QU 7 DML DQ S L DQ S L D MU D QS U D QS U FB A _C LK 1 M1 M9 P1 J1 J9 1 60 _1%_ 04 T9 L1 L9 FB A _C LK 1# B1 B9 M7 T7 D1 D8 E2 BA 2 V SS C KE V SS V SS CK V SS CK V SS V SS V SS NC1 V SS NC2 NC3 NC4 V SS V SS NC5 NC6 V S SQ V S SQ V S SQ V S SQ E8 F B A_ C MD 2 0 T2 F BV D D Q R ES E T F9 G1 G9 F B A_ C MD 1 9 K1 OD T F B A_ ZQ 3 A8 C1 C9 D2 E9 F1 Sheet 14 of 49 VGA Frame Buffer A H2 H9 L8 V S SQ V S SQ V S SQ V S SQ V S SQ A9 B3 E1 G8 J 2 J 8 M1 M9 P1 P9 T1 T9 B1 B9 D1 D8 E2 E8 F9 G1 G9 ZQ 16mli <500mil 1. 1K _1 %_0 4 F BA _V R E F1 H1 M8 R 425 C 21 2 R 13 1 0. 01 u_ 16V _X 7R _0 4 1. 1K _1 %_0 4 VR E FD Q VR E F CA 24 3_1 %_04 D7 C3 F B A_ D 56 F B A_ D 59 FB A _D 45 FB A _D 47 C8 F B A_ D 58 FB A _D 42 F2 C2 A7 A2 F B A_ D 62 FB A _D 46 F B A_ D 61 F B A_ D 57 FB A _D 43 FB A _D 44 F8 H3 H8 B8 A3 F B A_ D 60 FB A _D 40 B7 V SS R 4 35 P9 T1 D3 C7 BA 0 BA 1 V SS J2 J8 16mil<500mil V R EF D Q V R E FC A D7 C3 D3 C7 P7 P3 N2 A1 H2 R AS C AS N3 R 13 3 R 12 8 2 43_ 1%_0 4 FB A _D 4 L2 A8 C1 C9 F BA _C MD 29 V SS Q E8 F9 G1 G9 H1 M8 J3 K3 L3 F BA _C MD 13 F BA _C MD 26 16mli <500mil VR E F DQ V R EF C A 2 43_ 1%_0 4 D7 C3 FB A _D 16 V DD V DD V DD B2 D9 G7 ZQ R 43 7 C 2 11 WE CS VS S P9 T1 11 . K_ 1%_ 04 FB A_ VR E F 0 H1 M8 V DD V DD A7 CMD30 CMD30 A15 BA2 N/A CMD 3 1 E1 G8 RA S CA S N3 FB A _C MD 8 FB A _C MD 14 CMD27 CMD16 CKE CMD28 CMD20 RST RST CMD29 CMD14 A14 A13 A9 B3 L2 ZQ R 1 23 FB A _D 14 VS S VS S J 2 J 8 ZQ FB A _D 12 FB A _D 9 B A0 B A1 CS1* CMD16 CMD19 ODT CMD17 CMD22 A4 A5 CMD18 CMD12 A13 A14 A8 C1 C9 CMD26 CMD5 F BA _C MD 29 CS0* CMD13 CMD27 BA2 A15 CMD14 CMD6 A3 BA1 U3 0 FB V D D Q BA1 A3 A9 A1 CMD12 CMD29 BA0 BA0 R1 R9 U7 J3 K3 L3 F B A_ D 63 FB A _D 41 FB A DQ M7 E3 F7 G2 H7 FB A DQ M5 E7 F3 FB A DQ S _W P5 FB A DQ S _R N 5 G 3 FB A DQ S _W P7 FB A DQ S _R N 7 K 4W 1G 16 46G - B C1 1 D Q L0 D Q L1 D QU 0 D QU 1 D Q L2 D QU 2 D Q L3 D Q L4 D QU 3 D QU 4 D Q L5 D QU 5 D Q L6 D QU 6 D Q L7 D QU 7 D ML D Q SL D Q SL D MU D Q SU D Q SU H1 M8 FB A_ VR E F 1 D7 C3 FB A _D 51 FB A _D 52 C8 FB A _D 48 C2 A7 A2 FB A _D 54 B8 A3 FB A _D 50 D3 C7 FB A DQ M6 B7 FB A _D 49 FB A _D 55 FB A _D 53 FB A DQ S _W P6 FB A DQ S _R N 6 K 4W 1G 16 46 G- B C 11 FB VD D Q + C 715 330 u_2 . 5V _V _A C 706 C 7 07 *22u _6 .3 V_ X5R _ 08 *2 2u _6. 3V _X 5R _0 8 12/2 0 1 3, 15, 3 7 FB V DD Q VGA Frame Buffer A B - 15 B.Schematic Diagrams A0 N3 F BA _C MD 7 F BA _C MD 10 F BA _C MD 24 FB VD D Q B2 D9 G7 GT21x GF108 CMD0 CMD3 Schematic Diagrams VGA Frame Buffer C Frame Buffer Partition C FB C _C MD [ 31: 0 ] 13 F BC _ C MD [ 3 1: 0] F B C_ D [6 3: 0] 13 13 FB C _D [ 63 :0 ] FB C D QM[ 7 0 : ] F B CD Q M[ 7: 0] F B VD D Q F B CD Q S _W P[ 7: 0 ] FB V DD Q 13 F BC D Q S_ WP [ 7: 0] F B CD Q S _R N [ 7: 0] 13 C 53 0 C3 4 C 536 C 53 5 C 534 C 57 C 52 9 0. 1u _1 6V _Y 5V _04 0 . 1u_ 16V _Y 5 V_ 04 0. 1u _16 V_ Y 5V _04 0 .1 u_1 6V _Y 5V _0 4 0. 1u _16 V_ Y5 V_ 04 1u_ 6. 3V _X 5R _0 4 1 u_6 .3 V_ X5R _ 04 F BC D Q S _R N [ 7: 0] C1 47 C 146 C 14 1 C5 33 C 64 C 1 17 C 153 0. 1u_ 16 V_Y 5 V_ 04 0. 1u _16 V_ Y 5V _04 0. 1 u_1 6V _Y 5V _0 4 0. 1u_ 16V _Y 5 V_ 04 0. 1u _1 6V _Y 5V _04 1 u_6 . 3V _X5 R _04 1u _6. 3V _X 5R _0 4 F B VD D Q B.Schematic Diagrams FB V DD Q C 56 6 C 5 39 C 570 C 55 9 C 140 C 546 C 14 9 0. 1u _1 6V _Y 5V _04 0 . 1u_ 16V _Y 5 V_ 04 0. 1u _16 V_ Y 5V _04 0 .1 u_1 6V _Y 5V _0 4 0. 1u _16 V_ Y5 V_ 04 1u_ 6. 3V _X 5R _0 4 1 u_6 .3 V_ X5R _ 04 U3 U 25 F BC _ C MD2 8 F BC _ C MD2 F BC _ C MD7 F BC _ C MD1 0 N3 P7 F BC _ C MD2 4 F BC _ C MD6 Sheet 15 of 49 VGA Frame Buffer C F BC _ C MD2 2 F BC _ C MD2 6 F BC _ C MD5 F BC _ C MD2 1 F BC _ C MD8 P3 N2 P8 P2 R8 R2 T8 F BC _ C MD2 3 F BC _ C MD9 R3 L7 R7 N7 F BC _ C MD1 2 T3 F BC _ C MD4 F BC _ C MD2 5 RA S VDD CA S W E CS VDD VDD VDD VDD VDD VDD VDD A0 A1 A2 A3 A4 A5 V DDQ V DDQ A6 A7 A8 A9 V DDQ V DDQ V DDQ V DDQ A 10 A 11 A 12 V DDQ V DDQ V DDQ F BC _ C MD2 7 13 13 F BC _ CL K0 F BC _ CL K0 # M2 N8 M3 F BC _ C MD 2 8 F BC _ C MD 2 J3 K3 L3 L2 F BC _ C MD 7 F BC _ C MD 1 0 N3 P7 F BC _ C MD 1 1 F BC _ C MD 1 5 K8 N1 N9 R1 F BC _ C MD 2 4 F BC _ C MD 6 R9 VDD A1 F BC _ C MD 2 2 F BC _ C MD 2 6 F BC _ C MD 5 A8 C1 C9 D2 F BC _ C MD 2 1 F BC _ C MD 8 E9 F1 H2 H9 P3 N2 P8 P2 R8 R2 T8 F BC _ C MD 2 3 F BC _ C MD 9 R3 L7 R7 N7 F BC _ C MD 1 2 T3 F BC _ C MD 4 F BC _ C MD 2 5 J 7 F BC _ C LK 0# K7 B A0 B A1 B A2 L9 M7 T7 F BC _ C MD2 0 F BC _ C MD0 F BC _ ZQ 0 VS S VS S A9 B3 E1 VS S VS S G8 J2 CK E CK CK VS S VS S VS S NC1 NC2 VS S VS S VS S VS S NC3 NC4 NC5 VS S Q J 1 J 9 L1 RA S VDD F BC _ C MD 2 9 F BC _ C MD 1 3 F BC _ C MD 2 7 J8 M1 M9 P1 P9 CA S W E CS VDD VDD VDD VDD A0 A1 VDD VDD VDD A2 A3 A4 A5 V DDQ V DDQ A6 A7 A8 A9 V DDQ V DDQ V DDQ V DDQ A 10 A 11 A 12 V DDQ V DDQ V DDQ F B C_ C MD2 5 F B C_ C MD1 8 J 3 K3 L3 L2 F B C_ C MD9 F B C_ C MD2 4 N3 P7 F B C_ C MD1 1 F B C_ C MD1 5 K8 N1 N9 R1 F B C_ C MD1 0 F B C_ C MD1 3 R9 VDD A1 F BC _ C LK 0# K7 R 39 J9 L1 1 60_ 1%_0 4 L9 M7 B1 VS S Q VS S Q OD T VS S Q VS S Q G9 V R EF D Q H1 M8 K1 L8 FB C _C L K0# B9 D1 D8 R E SE T T2 E2 E8 F9 G1 F BV D D Q T7 B A1 B A2 F B C_ C MD2 6 F B C_ C MD2 2 F B C_ C MD2 1 A8 C1 C9 D2 F B C_ C MD5 F B C_ C MD8 E9 F1 H2 H9 F BC _ CMD 0 R 52 FB C _Z Q 1 VS S VS S A9 B3 E1 VS S VS S G8 J2 CK E CK CK VS S VS S VS S NC1 NC2 VS S VS S VS S VS S NC3 NC4 NC5 P3 N2 P8 P2 R8 R2 T8 F B C_ C MD4 F B C_ C MD7 R3 L7 R7 N7 F B C_ C MD1 4 T3 F B C_ C MD2 3 F B C_ C MD2 8 VS S Q 13 13 F BC _ C LK 1 F BC _ C LK 1# M2 N8 M3 J 7 F B C_ C LK 1# K7 J 9 L1 B1 L9 M7 VS S B9 D1 D8 VS S Q VS S Q OD T VS S Q VS S Q G9 V RE F D Q H1 M8 T7 E2 E8 F9 G1 F B C_ C MD2 0 F B C_ C MD1 9 F B C_ ZQ 2 1u _6. 3V _X 5R _0 4 U 28 V DD V DD V DD V DD A0 A1 V DD V DD V DD A2 A3 A4 A5 V DDQ V DDQ A6 A7 A8 A9 V DDQ V DDQ V DDQ V DDQ A 10 A 11 A 12 V DDQ V DDQ V DDQ F BC _ VR E F0 V R EF C A 24 3_1 %_0 4 FB V D DQ K8 N1 N9 R1 A1 F BC _ C MD5 F BC _ C MD8 E9 F1 H2 H9 F BC _D 8 F BC _D 1 3 F BC _D 1 1 D Q L0 D Q L1 DQU 0 DQU 1 F8 H3 D Q L2 D Q L3 DQU 2 DQU 3 H8 G2 D Q L4 D Q L5 DQU 4 DQU 5 D Q L6 D Q L7 DQU 6 DQU 7 H7 E7 F BC D QM1 F BC D QS_ WP 1 F 3 D ML F BC D QS_ R N 1 G 3 D QS L D QS L D MU D QS U D QS U D7 C3 C8 C2 A7 A2 B8 A3 *33 0u_ 2. 5V _V _A FB C _D 2 9 FB C _D 2 7 FB C _D 3 0 FB C _D 2 4 FB C _D 3 1 FB C _D 2 5 E3 F7 F2 D Q L0 D Q L1 D QU 0 D QU 1 F8 H3 D Q L2 D Q L3 D QU 2 D QU 3 H8 G2 D Q L4 D Q L5 D QU 4 D QU 5 D Q L6 D Q L7 D QU 6 D QU 7 H7 D3 C7 FB C D Q M2 FB C D Q S_ WP 2 E7 FB C D QM3 FB C D QS_ WP 3 F3 D ML B7 FB C D Q S_ RN 2 FB C D QS_ R N 3 G3 D QS L D QS L K4 W1 G1 64 6G - BC 11 C 705 *22 u_6 . 3V _X5 R _08 *22 u_6 .3 V_ X5 R_ 08 B A0 B A1 B A2 VS S VS S A9 B3 E1 VS S VS S G8 J2 CK E CK CK VS S VS S VS S NC1 NC2 VS S VS S VS S VS S NC3 NC4 NC5 VS S Q OD T VS S Q VS S Q G9 V R EF D Q H1 M8 F BC _ C LK 1# K7 R9 2 J 9 L1 1 60_ 1%_ 04 L9 M7 FB C _C L K1 # E2 E8 F9 G1 F BV D D Q R 39 8 A 10 A 11 A 12 V DDQ V DDQ V DDQ K8 N1 N9 R1 R9 V DD A1 A8 C1 C9 D2 E9 F1 H2 H9 B A0 B A1 B A2 T7 A9 B3 E1 VS S VS S G8 J2 VS S VS S VS S NC1 NC2 VS S VS S VS S VS S NC3 NC4 NC5 VS S Q J8 M1 M9 P1 P9 T1 T9 VS S B1 B9 D1 D8 NC6 VS S Q VS S Q VS S Q VS S Q R E SE T VS S Q VS S Q OD T VS S Q VS S Q G9 V R EF D Q H1 M8 F BC _ C MD 2 0 T 2 FB C _Z Q 3 VS S VS S CK E CK CK L8 E2 E8 F9 G1 ZQ V R EF C A 243 _1% _04 V DDQ V DDQ V DDQ V DDQ F BC _ C MD 1 9 K 1 16mil<500mil R 83 V DDQ V DDQ A6 A7 A8 A9 K9 J 7 B1 B9 D1 D8 VS S Q VS S Q L8 V DD V DD V DD A2 A3 A4 A5 J 1 VS S R E SE T M2 N8 M3 F BC _ C MD1 6 F BC _ C LK 1 FB C _C L K1 T1 T9 VS S Q VS S Q VS S Q VS S Q K1 F BC _ C MD3 0 M1 M9 P1 P9 NC6 T2 F BC _ C MD2 9 F BC _ C MD6 J8 1. 1 K_ 1%_ 04 F BC _ VR E F 1 16mil <500mil R 41 2 F BC _ VR E F 1 V R EF C A 24 3_ 1%_0 4 C 13 4 D MU D QS U D QS U D7 C3 C8 C2 A7 A2 B8 F BC _ D3 F BC _ D7 F BC _D 3 7 F BC _D 3 5 F BC _ D0 F BC _ D6 F BC _ D1 F BC _D 3 6 F BC _D 3 4 F BC _D 3 9 E3 F7 F2 D Q L0 D Q L1 DQ U 0 DQ U 1 F8 H3 D Q L2 D Q L3 DQ U 2 DQ U 3 H8 G2 D Q L4 D Q L5 DQ U 4 DQ U 5 D Q L6 D Q L7 DQ U 6 DQ U 7 A3 F BC _ D4 F BC _ D2 F BC _ D5 F BC _D 3 3 F BC _D 3 8 F BC _D 3 2 D3 C7 F BC D QM0 F BC D QS _WP 0 E7 F BC D Q M4 F BC D Q S _WP 4 F 3 D ML B7 F BC D QS _R N 0 F BC D Q S _R N 4 G 3 D QS L D QS L H7 D7 C3 C8 C2 A7 A2 B8 A3 F B C _D 59 F B C _D 62 F BC _D 4 4 F BC _D 4 6 F B C _D 57 F B C _D 61 F B C _D 58 F BC _D 4 0 F BC _D 4 5 F BC _D 4 2 F B C _D 63 F B C _D 56 F B C _D 60 F BC _D 4 7 F BC _D 4 1 F BC _D 4 3 E3 F7 F2 DQ U 0 DQ U 1 D Q L2 D Q L3 DQ U 2 DQ U 3 C2 A7 H8 G2 D Q L4 D Q L5 DQ U 4 DQ U 5 A2 B8 D Q L6 D Q L7 DQ U 6 DQ U 7 H7 D3 C7 FB C D QM7 FB C D QS_ WP 7 E7 F BC D Q M5 F BC D Q S _WP 5 F 3 D ML D QS U D QS U B7 FB C D QS_ R N7 F BC D Q S _R N 5 G 3 D QS L D QS L K4 W1 G 164 6G - BC 1 1 K4 W1 G1 64 6G - BC 1 1 13, 1 4, 37 F BV D D Q D7 C3 C8 D Q L0 D Q L1 F8 H3 D MU 12/ 20 B - 16 VGA Frame Buffer C T3 A0 A1 B2 D9 G7 K2 1. 1 K_ 1%_ 04 FB C _D 2 8 FB C _D 2 6 C 70 4 F BC _ C MD1 4 V DD V DD V DD V DD A 13 FB V DD Q + C 714 F BC _ C MD4 F BC _ C MD7 V DD CA S W E CS 0. 0 1u_ 16V _X 7R _0 4 F B C_ D 23 F B C_ D 19 F B C_ D 18 K4 W1 G1 64 6G - BC 11 P2 R8 R2 T8 RA S R 40 9 F B C_ D 20 F B C_ D 21 F B C_ D 17 F B C_ D 22 F B C_ D 16 P3 N2 P8 R3 L7 R7 N7 F BC _ C MD2 3 F BC _ C MD2 8 1. 1 K_ 1%_0 4 E3 F7 F2 N3 P7 F BC _ C MD2 6 F BC _ C MD2 2 F BC _ C MD2 1 A8 C1 C9 D2 0. 01 u_ 16V _X 7R _0 4 F BC _D 1 2 F BC _D 1 0 F BC _D 1 4 F BC _ C MD9 F BC _ C MD2 4 F BC _ C MD1 0 F BC _ C MD1 3 R9 R 38 6 F BC _D 1 5 F BC _D 9 F BC _ C MD2 5 F BC _ C MD1 8 J 3 K3 L3 L2 F BC _ C MD1 1 F BC _ C MD1 5 V DD 16mil <500mil R 38 5 C 47 CA S W E CS B2 D9 G7 K2 ZQ 1. 1 K_ 1%_0 4 F BC _ VR E F0 V R EF C A C 564 1 u_6 . 3V _X5 R _04 V DD J 1 ZQ 16mil<500mil 243 _1% _04 C 5 44 0. 1u _1 6V _Y 5V _04 RA S K9 F B C_ C MD1 6 F B C_ C LK 1 T1 T9 R E SE T L8 F B C_ C MD3 0 M1 M9 P1 P9 VS S Q VS S Q VS S Q VS S Q K1 F B C_ C MD2 9 F B C_ C MD6 J8 NC6 F BC _ CMD 2 0 T2 ZQ R 66 C 55 7 0. 1u_ 16V _Y 5 V_ 04 A 13 B A0 K9 J7 J1 VS S VS S Q VS S Q VS S Q VS S Q M2 N8 M3 F BC _ C MD 3 F BC _ C LK 0 FB C _C L K0 T1 T9 NC6 C5 38 0. 1 u_1 6V _Y 5V _0 4 FB V D D Q B2 D9 G7 K2 A 13 K9 F BC _ C MD3 F BC _ C LK 0 C 11 2 0. 1u _16 V_ Y 5V _04 FB V D DQ B2 D9 G7 K2 A 13 F BC _ C MD2 9 F BC _ C MD1 3 C 154 0. 1u_ 16 V_Y 5 V_ 04 U5 FB V D DQ J 3 K3 L3 L2 F BC _ C M D1 1 F BC _ C MD1 5 C6 9 D MU D QS U D QS U F B C_ D 49 F B C_ D 53 F B C_ D 48 F B C_ D 54 F B C_ D 51 A3 F B C_ D 55 F B C_ D 50 F B C_ D 52 D3 C7 F B CD Q M6 F B CD Q S _W P6 B7 F B CD Q S _R N 6 Schematic Diagrams IF P C_ IO V D D I F PC _A U X I F PC _A U X TXC TXC FI P C _L3 IF P C _L3 TXD0 TXD0 FI P C _L2 IF P C _L2 TXD1 TXD1 FI P C _L1 IF P C _L1 TXD2 TXD2 FI P C _L0 IF P C _L0 GP O I 1 HPDC IF PC A N3 AP2 C5 2 R5 3 A R2 AP1 A M4 A M3 A M5 AL 5 1 0K _ 04 U5 MIOACAL_ PD_VDDQ_NC T5 MIOACAL_ PU_GND_NC N5 A M6 A M7 MIOA_CTL 3_NC MO I A_HSYNC_NC MIOA_VSYNC_NC MIOA_DE_NC K2 1 0K _ 04 AA7 AA6 AF1 IF P D_ IO V D D R4 T4 N 4 MI OA _C LK I N _ N C MIOB_ CLKOUT_NC MIOB_ CLKOUT_NC MIOB_CL KIN_NC FI P D _L3 IF P D _L3 TXD0 TXD0 IF P D _L2 IF P D _L2 TXD1 TXD1 FI P D _L1 IF P D _L1 TXD2 TXD2 FI P D _L0 IF P D _L0 GPI O19 I FP E F_P LL VD D I FP E F_R S ET N 12 P -GV 2-A 1 I F P E F _ IO V D D AD7 DVI-DL DVI-SL HDMI SDA SCL SDA SCL I FP E_ AU X I FP E_ AU X TXC TXC TXC TXC FI PE _L3 IF PE _L3 TXD0 TXD0 TXD0 TXD0 FI PE _L2 IF PE _L2 TXD1 TXD1 TXD1 TXD1 FI PE _L1 IF PE _L1 TXD2 TXD2 TXD2 TXD2 FI PE _L0 IF PE _L0 HPDE HPDE GP O I 15 I FP E _IO V D D TXD0 TXD0 FI PF _L2 IF PF _L2 1 0K _ 0 4 TXD4 TXD4 TXD1 TXD1 IF PF _L1 IF PF _L1 TXD5 TXD5 TXD2 TXD2 IF PF _L0 IF PF _L0 HPDF GP O I 21 IFPEF L7 V GA _ TH E R M D C E2 E1 2I C S_S C L I 2C S _S D A 3 S M C _V GA _ TH E R M S M D _V GA _ TH E R M E3 E4 I 2C C _S C L I 2C C _S D A I 2C C _S C L I 2C C _S D A S MC _V GA _ TH E R M S MD _V GA _ TH E R M 6 D C8 1 S IF PD N 1 2 P-G V 2-A 1 S MC _ V GA _T H E R M1 S MD _ V GA _T H E R M1 34 34 U 26 L 7/16 IF PAB Q 7A * L2 N 7 00 2D W1 T 1G 10 00 p _5 0V _ X7 R _ 04 Test Point V GA _ TH E R M D A B5 DVI-DL 5 6 7 8 4 3 2 1 D AC A _V D D A J 12 U2 6 F 4 /1 6DACA D AC A _V D D A K 12 * 0. 1 u_ 1 6V _ Y5 V _ 04 C 63 R 58 I 2C A _S C L I 2C A_ SD A G1 G4 I 2C A _ S C L I 2C A _ S D A AM 13 AL 1 3 S NN_ HS Y NC S N N _ V SY N C D AC A _V R EF A K 13 D AC A _R S ET JT A G_TC K JT A G_TM S JT A G_TD I JT A G_TD O JT A G_TR S T R 38 8 D AC A _H SY N C D A CA _V SY N C K3 H3 H2 H1 H4 H5 H6 J7 K4 K5 H7 J4 J6 GPI O2 GPI O3 GPI O4 GPI O5 GPI O6 GPI O7 GPI O8 GPI O9 GPI O10 GPI O11 GPI O12 GPI O13 GPI O14 RN1 4 2 2. K _ 8P 4 R _0 4 AP1 4 AR1 4 AN1 4 AN1 6 V _J TA G_ T R S TA P 1 6 AM 15 S NN_ RE D AM 14 S N N _ GR E E N D A C A_B LU E AL 1 4 S N N _ B LU E D A C A_R E D R5 0 R4 1 1 00 K _0 4 1 00 K _0 4 V _G PI O 8 V _G PI O 9 R4 2 R3 6 N V V D D _ V I D 0 41 N V V D D _ V I D 1 41 *0 _ 04 V GA _ TH E R M_ SH D W N # *0 _ 04 E C _ V GA _ AL E R T # A C_ DE T R4 5 1 0K _ 04 3 V 3 _R U N I FP A B _ P LL V D D AK9 A J1 1 IFPAB_PLLVDD A G9 IF PA B _ O I V DD *1 0m li _ sh ort _ 04 A G1 0 IFPA_O I VDD IFPB_O I VDD V GA _ TH E R M_ SH D W N _# V GA _ TH E R M_ SH D W N # S MD _V GA _ TH ER M S MC _V GA _ TH ER M AK6 AH 7 I2C B _S C L I 2C B _SD A G3 G2 D AC B _V R EF D AC B _R S ET R 32 10 K _0 4 I PAB_ TXC* F IF PAB_ TXC IFPA_ TXC IFPA_ TXC I PAB_ TXD3* F IF PAB_ TXD3 I PB_TXD4 F IF PB_TXD4 IF PAB_ TXD4* I PAB_ TXD4 F IF PB_TXD5 IF PB_TXD5 I PAB_ TXD5* F IF PAB_ TXD5 IF PB_TXD6 IF PB_TXD6 U2 N 1 2 P -G V 2-A 1 U 26 E 6/1 6 DACB D A C B _ VD D AG 7 D AC B _V D D IF PA_TXD2 IF PA_TXD2 12 /13 ? ? N 12 P -GV 2 -A 1 R1 9 I PA_TXD1 F IF PA_TXD1 I PAB_ TXD2* F IF PAB_ TXD2 I PA_TXD3 F IF PA_TXD3 L6 M6 M7 GPI O22 GPI O23 GPI O24 I PA_TXD0 F IF PA_TXD0 I PAB_ TXD1* F IF PAB_ TXD1 IFPAB_RSET L5 GPI O20 IF PAB_ TXD0* I PAB_ TXD0 F 3 V 3_ R U N L2 L4 M4 GPI O16 GPI O17 GPI O18 1 K _ 04 10 K _0 4 D AC A _GR EE N LVDS DVI-SL T H ER MD P 3 V 3_ R U N I 2C A_ S D A I 2C A_ S C L I 2C B_ S D A I 2C B_ S C L D AC B _H S YN C D A C B_V S YN C D A C B_ RE D D AC B _GR EE N D A C B_ BLU E A M1 A M2 I 2C B _S C L I 2C B _S D A Sheet 16 of 49 VGA I/O N 12 P -GV 2 -A 1 Q 7B * L2 N 7 00 2D W1 T 1G 4 RN1 3 2 . 2K _ 8P 4 R _0 4 U 26 J 12/16 MISC1 T H ER MD N FI PF _L3 IF PF _L3 TXD3 TXD3 3 V 3_ R U N A R7 A R8 I FP F_ AU X I FP F_ AU X TXC TXC R 33 3 V 3_ R U N A N7 AP7 SDA SCL I FP F _IO V D D A R4 A R5 AP5 A N5 DP G HPDD AE7 V4 W4 A E1 MI OB _ C LK I N _ N C D TXC TXC AL 1 1 0K _ 04 A N4 AP4 AJ 6 W3 W1 W2 Y5 S I F PD _A U X I F PD _A U X A B3Y 3Y 2Y 1 MIOB_ CTL3_NC MIOB_HSYNC_NC MIOB_VSYNC_NC MIOB_DE_NC R4 0 I F P E F _ PL L VD D MIOB_ VREF_ NC P5 N3 L3 N2 DP SDA SCL MIOBCAL_PU_GND_NC 5 DVI/HDMI MIOBCAL_PD_VDDQ_NC A B2 A B1 A C4 A C1 A C2 A C3 A E3 A E2 U6 W6 Y6 2 A K8 R5 6 U 26 I 9/16 IF PEF G I F P D _ I OV D D C5 3 N 12 P -GV 2 -A1 IF P D_ R SE T MIOBD0 _NC MIOBD1 _NC MIOBD2 _NC MIOBD3 _NC MIOBD4 _NC MIOBD5 _NC MIOBD6 _NC MIOBD7 _NC MIOBD8 _NC MIOBD9 _NC MIOBD10_NC MIOBD11_NC MIOBD12_NC MIOBD13_NC MIOBD14_NC 8 7 6 5 A B6 P3 T3 T2 T1 U4 U1 U2 U3 R6 T6 N6 U 26 P 11/16 MIOB MIOB_ VDDQ_NC MIOB_ VDDQ_NC MIOB_ VDDQ_NC MIOB_ VDDQ_NC R 24 * 0_ 04 5 6 7 8 4 3 2 1 GN D TH ER M# AL E R T # D SD A TA D+ SC LK V DD G7 81 -1P 8 U F IF PB_TXD7 IF PB_TXD7 V G A_ T H E R MD C V G A_ T H E R MD A V G A_ V D D IFPB_ TXC IFPB_ TXC 3 .3 V R1 0 R 21 R 22 10 0K _ 0 4 10 0K _ 0 4 R 23 R 20 10 K _0 4 10 K _0 4 C6 V GA _ TH E R M _S H D WN #1 0. 1 u_ 16 V _Y 5V _ 04 3. 3 V *10 m li _s h ort _ 04 6-02-00781-LD0 HPDAB AK4 IFPAB A L4 N 12 P -GV 2 -A 1 RN1 6 A J4 4 3 2 1 GPIO0 RN1 5 5 6 7 8 I F P C _ PL L V D D I F P A B _P L LV D D I F P D _ I OV D D I F P C _ I OV D D 4 3 2 1 5 6 7 8 I F P E F _P L LV D D I F P A B _I OV D D I F P E F _I OV D D I F P D _ PL L VD D N 12 P -GV 2-A 1 10 K _8 P 4R _0 4 10 K _8 P 4R _0 4 1 2, 3 7, 4 1 3 V 3 _R U N 2 , 3, 8 , 1 1, 1 8, 1 9, 2 0, 2 2 ,2 3 , 24 , 25 , 27 , 28 , 2 9, 3 0, 3 5, 3 7, 3 8 ,3 9 3. 3 V VGA I/O B - 17 B.Schematic Diagrams MIOA_ CLKOUT_NC MIOA_ CLKOUT_NC MIOA_ CL KIN_NC U2 6 G 5 /1 6IFPD FI P D_ PL LVD D AA9 AB9 W9 Y9 MIOA_VREF_ NC N 1 2 P-G V 2-A 1 I F P D _ P LL V D D A C 6 MO I AD0_NC MO I AD1_NC MO I AD2_NC MO I AD3_NC MO I AD4_NC MO I AD5_NC MO I AD6_NC MO I AD7_NC MO I AD8_NC MO I AD9_NC MIOAD1 0_NC MIOAD1 1_NC MIOAD1 2_NC MIOAD1 3_NC MIOAD1 4_NC 1 2 3 4 A J8 DP SDA SCL U 26 O 10/16 MIOA MIOA_VDDQ_NC MIOA_VDDQ_NC MIOA_VDDQ_NC MIOA_VDDQ_NC B4 I F P C _ I OV D D DVI/HDMI IF P C_ R SE T *0 . 1u _ 16 V _Y 5 V _0 4 A K7 P9 R9 T9 U9 IF P C_ PL LVD D *0 . 1u _ 16 V _Y 5 V _0 4 U2 6 H 8 /1 6IFPC I F P C _ P LL V D D A J9 P 2P 1P 4N 1 VGA I/O Schematic Diagrams VGA NVVDD Cecoupling B.Schematic Diagrams U 2 6M Sheet 17 of 49 VGA NVVDD Cecoupling AA1 1 AA1 2 AA1 3 AA1 4 AA1 5 AA1 6 AA1 7 AA1 8 AA1 9 AA2 AA2 0 AA2 1 AA2 2 AA2 3 AA2 4 AA2 5 AA3 4 AA5 AB1 2 AB1 4 AB1 6 AB1 8 AB2 0 AB2 2 AB2 4 AC 9 A D1 1 A D1 3 A D1 5 A D1 7 AD 2 A D2 1 A D2 3 A D2 5 A D3 1 A D3 4 AD 5 AE1 1 AE1 2 AE1 3 AE1 4 AE1 5 AE1 6 AE1 7 AE1 8 AE1 9 AE2 0 AE2 1 AE2 2 AE2 3 AE2 4 AE2 5 AG 2 A G3 1 A G3 4 AG 5 AK2 AK3 1 AK3 4 AK5 AL 1 2 AL 1 5 AL 1 8 AL 2 1 AL 2 4 AL 2 7 AL 3 0 AL 6 AL 9 AN 2 A N3 4 AP1 2 AP1 5 AP1 8 AP2 1 AP2 4 AP2 7 AP3 AP3 0 AP3 3 AP6 AP9 B1 2 B1 5 B2 1 B2 4 B2 7 B3 B3 0 B3 3 B6 B9 C 2 C3 4 E1 2 15 /1 6 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND NV V DD GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND E1 5 E1 8 E2 4 E2 7 E3 0 E6 E9 F2 F31 F34 F5 J2 J 31 J 34 J5 L9 M1 1 M1 3 M1 5 M1 7 M1 9 M2 M2 1 M2 3 M2 5 M3 1 M3 4 M5 N1 1 N1 2 N1 3 N1 4 N1 5 N1 6 N1 7 N1 8 N1 9 N2 0 N2 1 N2 2 N2 3 N2 4 N2 5 P1 2 P1 4 P1 6 P1 8 P2 0 P2 2 P2 4 R2 R3 1 R3 4 R5 T 11 T 13 T 15 T 17 T 19 T 21 T 23 T 25 U1 1 U1 2 U1 3 U1 4 U1 5 U1 6 U1 7 U1 8 U1 9 U2 0 U2 1 U2 2 U2 3 U2 4 U2 5 V1 2 V1 4 V1 6 V1 8 V2 V2 0 V2 2 V2 4 V3 1 V5 V9 Y1 1 Y1 3 Y1 5 Y1 7 Y1 9 Y2 1 Y2 3 Y2 5 N VVD D N VVD D U 26N AB1 1 AB1 3 AB1 5 AB1 7 AB1 9 AB2 1 AB2 3 AB2 5 A C1 1 A C1 2 A C1 3 A C1 4 A C1 5 A C1 6 A C1 7 A C1 8 A C1 9 A C2 0 A C2 1 A C2 2 A C2 3 A C2 4 A C2 5 A D1 2 A D1 4 A D1 6 A D1 8 A D2 2 A D2 4 L11 L12 L13 L14 L15 L16 L17 L18 L19 L20 L21 L22 L23 L24 L25 M1 2 M1 4 M1 6 M1 8 M2 0 M2 2 M2 4 P1 1 P1 3 P1 5 P1 7 P1 9 1 6/16 NVVDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD P2 1 P2 3 P2 5 R1 1 R1 2 R1 3 R1 4 R1 5 R1 6 R1 7 R1 8 R1 9 R2 0 R2 1 R2 2 R2 3 R2 4 R2 5 T1 2 T1 4 T1 6 T1 8 T2 0 T2 2 T2 4 V1 1 V1 3 V1 5 V1 7 V1 9 V2 1 V2 3 V2 5 W11 W12 W13 W14 W15 W16 W17 W18 W19 W20 W21 W22 W23 W24 W25 Y1 2 Y1 4 Y1 6 Y1 8 Y2 0 Y2 2 Y2 4 C 87 C 67 C 74 C5 4 C9 0 C1 0 9 C 59 C6 8 0 . 0 1 u_ 1 6 V _ X 7R _ 0 4 0 . 0 1 u _1 6 V _ X 7 R _ 0 4 0 . 0 1 u _ 16 V _ X 7 R _ 0 4 0. 0 1 u _ 16 V _ X 7 R _ 0 4 0 . 01 u _ 1 6V _X 7 R _0 4 0 . 0 1u _ 1 6 V _ X7 R _ 04 0 . 0 1 u _ 16 V _ X 7 R _ 0 4 0. 0 1 u _ 16 V _ X 7 R _ 0 4 C 10 5 C 1 23 C 115 0 . 0 2 2u _ 1 6 V _ X7 R _ 04 0 . 0 2 2 u_ 1 6 V _ X 7R _ 0 4 0 . 0 2 2 u _1 6 V _ X 7 R _ 0 4 C 88 C 99 C 98 0 . 0 4 7u _ 1 0 V _ X7 R _ 04 0 . 0 4 7 u_ 1 0 V _ X 7R _ 0 4 0 . 0 4 7 u _1 0 V _ X 7 R _ 0 4 C 18 C 19 * 0. 1 u _ 1 0V _X 5 R _0 4 * 0 . 1u _ 1 0 V _ X5 R _ 04 C 97 C 78 C 91 0 . 2 2 u_ 1 0 V _ X 5R _ 0 4 0 . 2 2 u _1 0 V _ X 5 R _ 0 4 0 . 2 2 u _ 10 V _ X 5 R _ 0 4 C 60 C 5 26 1 u _ 6. 3 V _ X 5 R _ 0 4 4 . 7 u _ 6. 3 V _ X 5 R _ 0 6 C 22 C 21 1 0 u _6 . 3 V _ X 5 R _ 0 6 1 0 u _6 . 3 V _ X 5 R _ 0 6 C 23 C 24 C 710 C7 1 1 C7 1 2 C7 1 3 2 2 u _6 . 3 V _ X 5 R _ 0 8 2 2 u _6 . 3 V _ X 5 R _ 0 8 * 2 2u _ 6 . 3 V _ X 5R _ 0 8 *2 2 u_ 6 . 3 V _ X 5 R _ 0 8 *2 2 u _6 . 3 V _ X 5 R _ 0 8 *1 0 u _ 6. 3 V _ X 5 R _ 0 6 1u ? ? ? ? N 1 2 P -GV 2-A 1 + C 69 8 12/22 ? ripple noise + C 6 99 3 3 0 U_ 2 .5 V _ D2 _ D 3 3 0 U_ 2 .5 V _ D2 _ D BOM LIST for(GS+2G B OM & GV2+1G BOM)i nclude special s tuff Location SET TING BOM LIST R29 R47 U3,U5,U7,U8,U25,U28,U30,U31 R378 R46 PR137 PR136 PR135 PR134 PR142 PR141 PR140 PR139 R379 U26 GS+2G SDRAM BOM GV2+1GSDRAM BOM PS. X= Un-stuff 15K X X 24.9K 12K 15K 12.7K X 15K 30K X 12K 15K 12K GPU CHIP SET 15K 10K 16.2K 10K 12.7K 10K 11.8K 11.5K 11.8K 45.3K N12P-GS QS 10K 20K N12P-GV2-A1 MP K4W1G1646G-BC11(1G) GPU CHIP SELECT GPU SDRAM SELECT GPU SDRAM SET GPU POWER SET N 1 2P -GV 2 -A 1 41 B - 18 VGA NVVDD Cecoupling X7R NV suggest P L A C E I N TH E B A C K P L A T E A R E A NV V D D K4W2G1646C-HC11(2G) Schematic Diagrams PCH 1/9- RTC, HDA, SATA N O RE BO OT S TR AP RT CV C C CougarPoint - M (RTC,HDA,SATA) 20m ils R 4 89 1 M_ 0 4 1u _ 6 . 3V _ X 5 R _ 0 4 2 R4 8 8 RT CV C C I NTV RM EN - Int eg ra te d S US 1 .05 V VR M Ena bl e H igh - E na ble I nt er nal V Rs L ow - E na ble E xt er nal V Rs R TC X 2 D 20 S R TC _ R T C # G 22 S M _I N T R U D E R # K 22 3 3 0 K _ 04 P C H _ I N T V R ME N C 17 H DA _ B IT CL K _ R N 34 R2 9 0 3 . 3 A _ 1. 5 A _ H D A _ I O H DA _ B IT CL K 33 H DA _ S Y NC 3 3 _0 4 R3 0 6 3 3 _0 4 R3 3 2 3 3 _0 4 H DA _ B IT CL K _ R S G La yo ut N ot e: Cl ose t o PC H ON -D ie P LL Vo lt ag e Sel ec t : HD A_ SY NC Hi -1 .5 V (D EFA UL T) Lo w- 1. 8V H D A _ S D OU T _ R D I N TV R ME N 34 ME _ W E 1 R3 3 7 1 K _ 04 H DA _ S Y NC R3 3 6 0 _ 04 R3 3 5 *9 1 0 _0 4 H DA _ S D IN0 H DA _ S D IN2 A 34 D2 0 R B 75 1 S -4 0C 2 C H DA _ S D IN3 H D A _S D OU T _R A 36 H DA _ S D O C 36 H D A _ D O C K _ E N # / GP I O 33 N 32 U S B 3 . 0_ S I M # S A T A 4 RX N S A T A 4R X P S A T A 4 TX N SAT A4 TXP H D A _ D O C K _ R S T# / G P I O1 3 P C H _ J TA G_ TC K _ B U F Fl as h De sc rip to r Se cur it y Ov er id e Lo w = Di sa ble d- (D ef aul t) Hi gh = E na ble d S A T A 3 RX N S A T A 3R X P S A T A 3 TX N SAT A3 TXP J T A G_ T C K S A T A 5 RX N S A T A 5R X P S A T A 5 TX N SAT A5 TXP J T A G_ T MS S A T A I C O MP O J3 P C H _ J TA G_ TM S H7 P C H _ J TA G_ TD I K5 P C H _ J TA G_ TD O H1 JT AG 29 12/7 ? ? W15? ? S A T A 1 RX N S A T A 1R X P S A T A 1 TX N SAT A1 TXP S A T A 2 RX N S A T A 2R X P S A T A 2 TX N SAT A2 TXP H DA _ S D IN1 A S A T A 0 RX N S A T A 0R X P S A T A 0 TX N SAT A0 TXP E 34 C 34 2 0 1 2 3 SE R IRQ H D A _ B C LK H D A _ R S T# J OP E N 2 *4 0 m li 3. 3 A _ 1 . 5 A _H D A _ I O LA D LA D LA D LA D C3 8 A3 8 B3 7 C3 7 L PC L PC L PC L PC D3 6 G 34 3 .3 V S / / / / L D R Q0 # L D R Q1 # / G P I O2 3 SPK R H DA _ S Y NC_ R Q2 7 MT N 7 0 02 Z H S 3 0 1 2 3 J T A G_ T D I J T A G_ T D O S A T A I C OM P I _A _A _A _A D0 D1 D2 D3 *1 K _ 0 4 R 21 4 S A T A _ L E D# *1 0 K _ 04 R4 6 9 2 8 ,3 4 2 8 ,3 4 2 8 ,3 4 2 8 ,3 4 L P C _F R A M E # F W H4 / L F RA M E # I N TR U D E R # T 10 H D A _S P K R H D A _R S T # HD A _ S DIN 0 H H H H S R T C R S T# K 34 33 33 33 FW FW FW FW IHDA 33 2 2 p_ 5 0 V _N P O_ 0 4 R2 9 9 H DA_ S PKR 2 8, 3 4 R 2 96 3 .3 V S * 10 K _ 0 4 E3 6 K3 6 B o a rd I D V5 SE R IRQ A M3 A M1 AP7 AP5 S A T A R XN 0 S A T A R XP 0 S A T A T X N0 SATAT XP0 ESATA A M1 0 A M8 AP1 1 AP1 0 S A T A _ RX N 1 S A T A _ RX P 1 S A T A _ T XN 1 S A T A _ T XP 1 SATA HDD S E RIR Q 2 8 ,3 4 R 2 97 1 0 K _ 04 A D7 A D5 A H5 A H4 S A TA _ R XN 2 3 1 S A TA _ R XP 2 31 S A TA _ T X N 2 3 1 S A TA _ T X P 2 3 1 AB8 AB1 0 AF3 AF1 SATA ODD S A TA _ R XN 3 2 7 S A TA _ R XP 3 27 S A TA _ T X N 3 2 7 S A TA _ T X P 3 2 7 3G/MSATA Y7 Y5 A D3 A D1 Sheet 18 of 49 PCH 1/9- RTC, HDA, SATA Y3 Y1 AB3 AB1 1. 05 V S Y1 1 S A T A I C O MP R2 6 0 3 7 . 4 _1 % _ 04 R2 4 0 4 9 . 9 _1 % _ 04 R4 7 4 7 5 0 _1 % _ 04 Y1 0 1. 05 V S A B 1 2 S A T A 3C OM P S A TA 3R C O MP O AB1 3 S A TA 3 C OM P I 34 0 _ 04 R4 5 4 S P I _ C S _0 # Y 14 *0 _ 0 4 R4 7 0 S P I _ C S _1 # T1 H S P I _M S I H S P I _ MS I V4 H S P I _ MS O H S P I _ MS O U3 H SPI_ CE# 34 T3 H S P I_ S CL K H S P I_ S CL K 34 S P I _ C LK S A T A 3 RB IA S A H1 RB IA S _ S A T A 3 P3 S A T A _L E D # V1 4 OD D _ D E T E C T# P1 BBS _ BIT 0 SPI_ C S0 # SPI_ C S1 # S PI 34 S P I _ M OS I SPI_ M ISO S A T A LE D # S A T A 0G P / G P I O2 1 S A T A 1G P / G P I O1 9 S A T A _L E D # 31 O D D _D E T E C T # R 46 8 23 * 1 K _0 4 BBS_BIT0 - BIOS BOOT STRAP BIT 0 B D 8 2 H M6 5 QS B 2 Q N J H F C -B G A 6-S03-08265-0S1 J_ H D D 1 S1 S2 S3 S4 S5 S6 S7 S A T A _ TX P 1 _ R S A T A _ TX N 1_ R C6 7 2 C6 7 1 0 . 0 1u _ 1 6V _X 7 R _ 0 4 0 . 0 1u _ 1 6V _X 7 R _ 0 4 S A T A _ TX P 1 S A T A _ TX N 1 S A T A _ RX N1 _ R C6 6 8 S A T A _ R X P 1 _R C 6 6 6 0 . 0 1u _ 1 6V _X 7 R _ 0 4 0 . 0 1u _ 1 6V _X 7 R _ 0 4 S A T A _ RX N1 S A T A _ RX P 1 J _ ESAT A1 1 G ND1 3. 3 V SATATXP0 C3 9 5 0 . 0 1 u _1 6 V _ X7 R _0 4 S A T A _T X P 0 _ C 1 S A T A _ T XP _ 0 _ C 2 SAT A T XN0 C3 8 7 0 . 0 1 u _1 6 V _ X7 R _0 4 S A T A _T X N 0 _ C 4 3 S A T A _ T XN _ 0_ C * W C M 2 01 2 F 2 S -1 61 T 0 3-s h o rt 3 3. 3 V S L25 2 TXP TXN 4 P1 P2 P3 P4 P5 P6 P7 P8 P9 P 10 P 11 P 12 P 13 P 14 P 15 R 4 56 21 0 _ 1% _ 0 6 R 2 02 21 0 _ 1% _ 0 6 5 VS C6 5 0 C6 5 1 H D D _N C 1 H D D _N C 2 H D D _N C 3 0. 1 u _ 16 V _ Y 5 V _ 0 4 2. 2 u _ 6. 3 V _ Y 5 V _ 0 6 + C6 4 3 22 0 u _6 . 3 V _ 6. 3* 6. 3 * 4. 2 R 4 65 1 0 0_ 1 % _0 4 R 2 11 R 2 10 1 0 0 _1 % _ 0 4 G ND 2 P I N G N D 1 ~ 2 = G ND R4 6 6 51 _ 0 4 C3 7 7 0 . 0 1 u _1 6 V _ X7 R _0 4 S A T A _R X N 0 _ C 1 S A T A R XP 0 C3 7 2 0 . 0 1 u _1 6 V _ X7 R _0 4 S A T A _R X P 0_ C 4 3 S A T A _ R X P _ 0 _C * W C M 2 01 2 F 2 S -1 61 T 0 3-s h o rt L23 2 S A T A _ R X N _0 _ C 5 R XN 6 R XP 7 G ND3 Gen3 ESATA POART A T 0 7 J3 6 B A A 1 0 1 6- 21 -1 470 4- 10 7 10 0 _ 1% _ 0 4 GN D 1 1 -1 62 -1 0 0 56 1 S A T A R XN 0 21 0 _ 1% _ 0 6 P C H _J T A G _T MS P C H _J T A G _T D I P C H _J T A G _T D O H D D _N C 0 G ND2 R 2 01 P C H _J T A G_ T C K _ B U F 2 5 3 . 3 A _1 . 5 A _ H D A _ I O 2 0, 25 RT CV C C 19 , 2 0 , 2 4, 2 5 , 3 5, 3 7 , 3 8 1 . 0 5V S 1 1 , 27 , 3 0 , 3 4, 3 5 , 3 6, 3 7 , 4 1, 42 V DD 3 1 1 , 24 , 2 5 , 28 , 3 1 , 3 2, 3 3 , 3 5, 3 9 , 4 0 5 V S 2 , 3 , 8 , 1 1, 1 6 , 1 9, 2 0 , 2 2, 23 , 2 4 , 25 , 2 7 , 28 , 2 9 , 3 0, 3 5 , 3 7, 3 8 , 3 9 3 . 3 V 3, 9 , 1 0 , 11 , 1 2 , 1 9, 2 0 , 2 1, 2 2 , 2 3, 24 , 2 5 , 27 , 2 8 , 30 , 3 1 , 3 2, 3 3 , 3 4, 3 5 , 3 9 3 . 3 V S PCH 1/9- RTC, HDA, SATA B - 19 B.Schematic Diagrams H D A _ S D OU T R TC R S T # L 34 1 K_ 0 4 H DA _ S Y N C_ R C4 7 3 33 R TC X 1 C 20 R TC _ R S T # SATA + 2 J_ R TC 3 B H A A A - B A T- 06 3 -P 0 1 C3 9 8 R T C _ X 1 A 20 RT C_ X 2 Zo= 50O ? 5% R 25 8 R 20 6 U3 4 A 1 0 M_ 0 4 L PC C6 5 6 1 8 p_ 5 0 V _N P O_ 0 4 R2 6 3 20 K _ 1 %_ 0 4 1 0 K_ 0 4 X8 3 4 J OP E N 1 *O P E N _1 0 m li -1 MM 1u _ 6 . 3V _ X 5 R _ 0 4 3 4 1 1 RT C _ V B A T R TC CL EA R C3 9 4 12/06 DEL - X7 MC -3 0 6 _3 2 . 7 6 8K H z SATA 6G 6- 22 -3 2R 76 -0B 2 6- 22 -3 2R 76 -0B G 1 K _ 04 RTC R2 5 4 20 K _ 1 %_ 0 4 R 25 1 3 .3 V S S E R IRQ 2 1 1 u _6 . 3 V _ X5 R _0 4 * 3 2. 7 6 8 K H z C4 0 1 N O RE BO OT ST RA P: HD A_ SP KR Hi gh E na bl e C6 5 8 1 8 p_ 5 0 V _N P O_ 0 4 2 1 D 9 B A T 5 4 CW G H A C 3 R T C _ V B A T _ 12 A 20m ils 1 V D D3 Schematic Diagrams PCH 2/9- PCIE, SMBUS, CLK CougarPoint - M (PCI-E,SMBUS,CLK) U 3 4B C4 6 5 C4 5 9 P C I E _T X N 3_ C P C I E _T X P 3 _ C 0 . 1 u_ 1 0 V _ X 7R _ 0 4 0 . 1 u_ 1 0 V _ X 7R _ 0 4 P C I E _T X N 4_ C P C I E _T X P 4 _ C B G 36 B J 36 A V 34 A U 34 BF BE AY BB 36 36 34 34 B G 37 B H 37 A Y 36 B B 36 B G 40 B J 40 A Y 40 B B 40 X USB3.0 NEC WLAN GLAN / CARD READER X X X X B E 38 B C 38 A W 38 A Y 38 Y 40 Y 39 P C I E C L K R Q0 # P ERN 6 P ERP6 P E T N6 P ET P6 P P P P ERN 7 ERP7 E T N7 ET P7 P P P P ERN 8 ERP8 E T N8 ET P8 1 00 MHz 2 9 C L K _ P CI E _ US B 3 0 # _ NE C 2 9 C L K _ P C I E _U S B 3 0 _ N E C 29 10 0MH z U S B 3 0 _C L K R E Q# _ N E C 2 7 C LK _P C I E _ W L A N # 2 7 CL K _ P C IE _ W L A N 27 10 0MH z R5 1 0 R5 1 1 * 1 0m i l _ sh o rt _ 0 4 C L K _ P C I E _U S B _ 3 0 _# _ N E C A A 48 * 1 0m i l _ sh o rt _ 0 4 C L K _ P C I E _U S B _ 3 0 _N E C A A 47 R1 9 9 * 1 0m i l _ sh o rt _ 0 4 U S B 3 0 _ C L K R E Q# _ N E C _ R V 10 R3 1 0 R3 0 9 * 1 0m i l _ sh o rt _ 0 4 C L K _ P C I E _W LA N # _ R * 1 0m i l _ sh o rt _ 0 4 C L K _ P C I E _W LA N _ R Y 37 Y 36 S ML 0 _ C L K S ML 0 _ D A TA RN 4 1 0 K _ 8P 4R _ 0 4 8 1 7 2 6 3 5 4 DR A M RS T _ CN T RL 3 ,8 P C I E C L K R Q6 # P C I E C L K R Q5 # P C I E C L K R Q0 # RN 5 1 0 K _ 8P 4R _ 0 4 8 1 7 2 6 3 5 4 S M L 0C L K C 13 L P D_ S P I_ IN T R# E1 4 S MC _ C P U _ T H E R M M 16 S MD _ C P U _ T H E R M M7 CL _ CL K 1 S M L1 C L K / GP I O5 8 S ML 1 D A T A / GP I O7 5 S MC _C P U _T H E R M 34 S MD _C P U _T H E R M 34 S M D_ CP U_ T HE R M S M C_ CP U_ T HE R M DR A M RS T _ CN T RL P E G _ C L K R E Q# T11 C L _ D A TA 1 P1 0 C L _ R S T# 1 M 10 P E G _C L K R E Q# AB3 7 AB3 8 V GA _P E X C L K # V GA _P E X C L K C L _D A T A 1 CL _ RS T 1 # C L K O U T _ P E G _A _ N CL K O UT _ P E G _ A _ P C L K OU T _D MI _ N CL K O UT _ DM I_ P P C I E C L K R Q 1 # / GP I O1 8 CL K O UT _ DP _ N C LK OU T_ D P _ P C L K OU T _ P C I E 2N C L K OU T _ P C I E 2P C L K I N _D MI _ N CL K IN _ DM I_ P P C I E C L K R Q 2 # / GP I O2 0 C L K OU T _ P C I E 3N C L K OU T _ P C I E 3P C L K I N _ G N D 1_ N C L K I N _G N D 1 _ P P C I E C L K R Q 3 # / GP I O2 5 R3 2 7 R3 2 6 * 1 0m i l _ sh o rt _ 0 4 C L K _ P C I E _G L A N # _ R * 1 0m i l _ sh o rt _ 0 4 C L K _ P C I E _G L A N _ R L A N _C L K R E Q# Y 43 Y 45 P C I E C LK R Q 5# C LK I N _ D OT _ 96 N C L K I N _D OT _ 9 6 P C L K OU T _ P C I E 4N C L K OU T _ P C I E 4P C L K I N _ S A TA _ N CL K IN _ S A T A _ P L 12 P C I E C L K R Q 4 # / GP I O2 6 V 45 V 46 C L K OU T _ P C I E 5N C L K OU T _ P C I E 5P C L _ C LK 1 237 234 482 377 D G P U _P R S N T # R 328 U S B 3 0_ C L K R E Q # _ V LI R 203 U S B 3 0_ C L K R E Q # _ N E C _ R R 1 9 8 27 CL _ D A T A 1 27 C L _ R S T #1 27 P E G _ C L K R E Q# 12 AV2 2 AU 2 2 AM 1 2 AM 1 3 P CH _ CL K _ D P _ N_ R P CH _ CL K _ D P _ P _ R BF1 8 BE1 8 CL K _ P C IE _ ICH # CL K _ P C IE _ ICH R 22 3 R 22 6 *1 0 m li _ s ho rt _ 0 4 *1 0 m li _ s ho rt _ 0 4 V GA _ P E X C LK # 1 2 V GA _ P E X C LK 12 10 0MH z 2 . 2K _0 4 2 . 2K _0 4 1 K _0 4 1 0K _ 0 4 C L K _ B CL K # 3 C L K _ B CL K 3 10 0MH z C L K _ DP # 3 C L K _ DP 3 12 0MH z BJ 3 0 BG 3 0 CL K _ B U F _ CP Y CL K # CL K _ B U F _ CP Y CL K C L K _ B U F _ D O T 96 # C L K _ B U F _ D O T 96 AK7 AK5 CL K _ B U F _ CK S S CD # CL K _ B U F _ CK S S CD K4 5 C L K _ B U F _ R E F 14 1 0K _ 0 4 1 0K _ 0 4 1 0K _ 0 4 CL K _ P C IE _ ICH # CL K _ P C IE _ ICH CL K _ B U F _ CP Y CL K # CL K _ B U F _ CP Y CL K RN 1 9 1 0 K _ 8 P 4 R_ 0 4 8 1 7 2 6 3 5 4 CL K _ B U CL K _ B U CL K _ B U CL K _ B U RN 9 1 0 K _ 8 P 4 R_ 0 4 8 1 7 2 6 3 5 4 F _ D O T 96 F _ D O T 96 # F _ CKS SCD F _ CKS SCD # C L K _ B U F _ R E F 14 P E G _C L K R E Q# L A N _ C LK R E Q # G 24 E2 4 R E F C LK 14 I N R 27 9 R 27 7 R 49 3 1 0 K_ 0 4 * 1 0K _0 4 1 0 K_ 0 4 Crystal 8045 & 3225 Co-lay C6 8 5 R 505 L 14 H 45 C LK _P C I _ F B C LK I N _ P C I L OO P B A C K 22 33 MHz X1 3 1 M _ 04 2 P C I E C L K R Q 5 # / GP I O4 4 A B 42 A B 40 P E G _ B _ C L K R Q# C L K OU T _ P E G_ B _ N C L K OU T _ P E G_ B _ P X T A L 2 5_ I N X T A L 25 _ OU T V4 7 V4 9 X TA L2 5 _ I N X TA L2 5 _ OU T E6 Y 47 V 40 V 42 P C I E C LK R Q 6# C L K OU T _ P C I E 6N C L K OU T _ P C I E 6P A K 14 A K 13 C L K OU T _ P C I E 7N C L K OU T _ P C I E 7P P C I E C L K R Q 7 # / GP I O4 6 C L K OU T _ I TP XD P _ N C L K OU T _ I TP XD P _ P R5 1 3 9 0 . 9_ 1 % _ 0 4 1 . 05 V S 90.9-O ? % pullup to +VccIO (1.05V, S0 rail)close to PCH P C I E C L K R Q 6 # / GP I O4 5 P E G _ P C I E C L K R Q7 # K 12 C L K _ XD P _ N C L K _ XD P _ P X C L K _ R C OM P X C L K _ R C OM P T 13 V 38 V 37 1 8p _ 5 0 V _ N P O _ 04 *H S X 3 21 S _ 2 5 MH Z C6 8 4 X 12 1 8p _ 5 0 V _ N P O _ 04 FSX8L_25MHz? ? ? ? ? P E G_ B _ C LK R Q # / GP I O 5 6 K4 3 C L K O U T F L E X 0 / GP I O6 4 F47 C L K O U T F L E X 1 / GP I O6 5 H 47 C L K O U T F L E X 2 / GP I O6 6 K4 9 C L K O U T F L E X 3 / GP I O6 7 D G P U _ P R S N T# B D 8 2 H M 6 5 QS B 2 QN JH F C -B GA 18 , 2 0 , 2 4, 25 , 3 5 , 3 7 , 38 1 . 0 5V S 2, 3, 8 , 1 1 , 1 6 , 18 , 2 0 , 2 2 , 2 3, 2 4 , 2 5 , 2 7, 2 8 , 2 9 , 3 0, 35 , 3 7 , 3 8 , 39 3 . 3V 3 , 9 , 1 0 , 1 1, 1 2 , 1 8 , 2 0, 21 , 2 2 , 2 3, 24 , 2 5 , 2 7 , 28 , 3 0 , 3 1 , 32 , 3 3 , 3 4 , 3 5, 3 9 3. 3V S B - 20 PCH 2/9- PCIE, SMBUS, CLK R R R R 3 .3 V S C L _ CL K1 P E G _A _C L K R Q # / GP I O4 7 C L K OU T _ P C I E 1N C L K OU T _ P C I E 1P L P D _ S P I _I N T R # BT_ SBD # P E G _ B _ C L K R Q# P E G _ P C I E C L K R Q7 # 9 , 10 3 .3 V A8 W L A N_ C L K RE Q # 3 0 C L K _ P C I E _ GL A N # 30 C L K _ P C I E _ GL A N M1 C 8 G 12 9, 10 S M L0 D A T A C L K OU T _ P C I E 0N C L K OU T _ P C I E 0P P C I E C L K R Q 0 # / GP I O7 3 U S B 3 0_ C LK R E Q # _V LI S M L 0A LE R T # / GP I O6 0 S M L1 A L E R T # / P C H H OT # / GP I O7 4 J2 C L K _ P C I E _ U S B _ 30 _ # _ V LAI B 49 C L K _ P C I E _ U S B _ 30 _ V L I A B 47 D R A MR S T _ C N T R L S M B _ DA T A 1 1 2 3 4 5 6 7 8 ERN 5 ERP5 E T N5 ET P5 A1 2 S M B _ CL K 4 Lane Lane Lane Lane Lane Lane Lane Lane P P P P S MB _D A T A RN 7 2 .2 K _ 8 P 4 R_ 0 4 8 1 7 2 6 3 5 4 2 Sheet 19 of 49 PCH 2/9- PCIE, SMBUS, CLK B J 38 B G 38 A U 36 A V 36 Usage ERN 4 ERP4 E T N4 ET P4 S MB _C L K S M B _ CL K S M B _ DA T A S M L0 _ C LK S M L0 _ D A T A 3 PCI-E x1 P ERN 3 P ERP3 P E T N3 P ET P3 P P P P H 14 C 9 27 1 P C I E _R X N 4 _ GL A N P C I E _R X P 4 _ GL A N P C I E _ T X N 4 _ GL A N P C I E _ T X P 4 _ GL A N 0 . 1 u_ 1 0 V _ X 7R _ 0 4 0 . 1 u_ 1 0 V _ X 7R _ 0 4 BT _ SBD # S MB C L K SM BD ATA FLEX CLOCKS B.Schematic Diagrams 30 30 30 30 C4 6 4 C4 5 7 P C I E _T X N 2_ C P C I E _T X P 2 _ C ERN 2 ERP2 E T N2 ET P2 B T _ S B D# X 8 A 0 25 0 0 0 F G1 H _2 5 M H z 2 7 P C I E _ R XN 3 _W L A N 2 7 P C I E _ R XP 3_ W L A N 2 7 P C I E _ T XN 3 _W L A N 2 7 P C I E _ T XP 3_ W L A N 0 . 1 u_ 1 0 V _ X 7R _ 0 4 0 . 1 u_ 1 0 V _ X 7R _ 0 4 P P P P SMBUS C4 3 8 C4 5 2 B E 34 B F 34 B B 32 A Y 32 Link EC EC EC EC E1 2 S MB A LE R T # / GP I O1 1 Controller P C I E _ R X N 2_ U S B 3 0 _N P C I E _ R X P 2 _ U S B 30 _ N P C I E _T X N 2_ U S B 3 0 _N P C I E _T X P 2 _ U S B 30 _ N ERN 1 ERP1 E T N1 ET P1 PCI-E* 29 29 29 29 P P P P CLOCKS B G 34 B J 34 A V 32 A U 32 12/7 ? ? X7R Schematic Diagrams PCH 3/9- DMI, FDI, PWRGD CougarPoint -M (DMI,FDI,GPIO) U34C 2 2 2 2 DMI_RX P0 DMI_RX P1 DMI_RX P2 DMI_RX P3 2 2 2 2 BC24 BE20 BG18 BG20 BE24 BC20 BJ18 BJ20 AW24 AW20 BB18 AV18 DMI_TX N0 DMI_TX N1 DMI_TX N2 DMI_TX N3 AY24 AY20 AY18 AU18 2 DMI_TX P0 2 DMI_TX P1 2 DMI_TX P2 2 DMI_TX P3 DMI0RXN DMI1RXN DMI2RXN DMI3RXN FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7 DMI0RXP DMI1RXP DMI2RXP DMI3RXP DMI0TXN DMI1TXN DMI2TXN DMI3TXN FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6 FDI_RXP7 BJ14 AY14 BE14 BH13 BC12 BJ12 BG10 BG9 BG14 BB14 BF14 BG13 BE12 BG12 BJ10 BH9 49.9_1 %_04 DMI_COM P_R BJ24 2 2 2 2 2 2 2 2 3.3V PM_SLP_LAN# SWI# SUS_PWR_ACK R23 0 R47 8 R48 3 *10K_04 10K_04 10K_04 PCIE_WAKE# PWR_BTN# PM_BATLOW# R22 9 R24 1 R47 7 10K_04 *10K_04 8.2K_04 AC_PRESENT_R R57 8 10K_04 PM_CLKRUN# R46 0 8.2K_04 RSM RST# R26 2 10K_04 12/7 add 3.3VS 2 FDI_FSYNC0 2 FDI_FSYNC0 BC10 DMI_IRCOMP DM I_2RBIAS 750_1%_04 FDI_TXP0 FDI_TXP1 FDI_TXP2 FDI_TXP3 FDI_TXP4 FDI_TXP5 FDI_TXP6 FDI_TXP7 FDI_I NT AV12 DMI_ZCOM P BG25 R486 2 2 2 2 2 2 2 2 AW1 6 FDI_INT R491 1. 05 VS FDI_TXN0 FDI_TXN1 FDI_TXN2 FDI_TXN3 FDI_TXN4 FDI_TXN5 FDI_TXN6 FDI_TXN7 FDI_FSYNC1 BH21 FDI_FSYNC1 2 AV14 DMI2RBIAS FDI _ LSYNC0 FDI_LSYNC0 2 FDI_LSYNC1 2 BB10 FDI _ LSYNC1 RTCVCC DSWODVREN A18 DSWODVREN E22 RSM RST# C12 SUS_PWR_ACK SUSACK# R457 3.3VS C411 10K_04 *0.1u_10V_ X5R_04 SYS_RESET# K3 SYS_PWRO K P12 SYS_RESET# SYS_PWROK 34 R259 PM_PCH_PWRO K 0_04 PM _PCH_PWROK_R L22 PWROK PWRO K *10mil_short _ 04 PM_M R255 L10 APWROK B13 3 PM_DRAM_PWRGD DRAMPWROK C21 RSMRST# 34 RSMRST # RSM RST# SUS_PWR_ ACK 34 K16 SUS_PWR_ACK 34 12/7 add 34 G8 S4_STATE# N14 SUSCLK D10 SLP_S5# SLP_S5# / GPIO63 330K_04 R48 5 *330K_04 PCIE_WAKE# 27,29,30 PM _CLKRUN# S4_STATE# H4 HI En abled (DEFAULT) SUSC# 34 , 38 F4 SLP_S3# SUSB# 6,29,34,35 G10 SLP_A# G16 SLP_SUS# SLP_A# ACPRESENT / GPIO31 SLP_SUS# BATLOW# / GPIO72 PMSYNCH AP14 A10 H_PM_SYNC K14 RI # DSWODV REN - On Die DSW VR Enable 28 28 LOW Di sabled SLP_S4# E10 SWI# SWI# PM_CLKRUN# SUSCLK / GPIO62 H20 PM_BAT LOW# PCIE_WAKE# SUS_STAT# / GPIO61 PWRBTN# *0_04 AC_PRESENT_R B9 N3 WAKE# CLKRUN# / GPIO32 E20 PWR_BTN# PWR_BTN# AC_PRESENT R48 7 DPWROK SUSWARN#/SUSPWRDNACK/GPIO30 R579 22,34 System Power Management DSWVRM EN Sheet 20 of 49 PCH 3/9- DMI, FDI, PWRGD 3 PM_SLP_LAN# SLP_LAN# / GPIO29 BD82HM65 QSB2 QNJH FC-BGA 3.3VR 3.3VR 37 3.3VR 3 14 *0_04 3.3V 12 3.3VS 12/8 39 34 DELAY_ PWRG D PM_PCH_PWRO K 11 SYS_PWRO K 13 9 8 ALL_SYS_PWRGD 11,34,39 10 R364 *100K_04 1.8VS_PWRG D 6 DDR_1.05VS_ PWRG D 5 12/8 2 7 7 1.05VS_PWRG D R581 U22 C 74LVC08PW 7 14 14 DDR1.5V_PWRGD 38 0_04 4 37 1 38 0.85VS_PWRGD U22B 74 LVC08PW U22A 74LVC08PW U22D 74LVC08PW R580 7 14 3.3VR 1.05VS_VTT _EN 35 R253 ON ? ? SUSB# -->? ? 1.05VS_VTT? SUSPEND? ? ? ? ? *10K_04 PM_M PWROK 11,18,27,30,34, 3 5,36,37,41,42 VDD3 18,25 RT CVCC 18,19,24,25,35,37,38 1.05VS 2,3,8, 1 1,16,18,19,22,23,24,25,27 , 28,29,30,35,37,38,39 3.3V 3, 9, 1 0,11,12,18,19,21,22,23,24 , 25,27,28,30,31,32,33,34,35,39 3.3VS PCH 3/9- DMI, FDI, PWRGD B - 21 B.Schematic Diagrams DMI0TXP DMI1TXP DMI2TXP DMI3TXP FDI DMI_RX N0 DMI_RX N1 DMI_RX N2 DMI_RX N3 DMI 2 2 2 2 Schematic Diagrams PCH 4/9- LVDS, DDI, CRT CougarPoint -M (LVDS,DDI) U 34D R2 9 1 2 . 3 7K _1 % _ 0 4 L V D S _I B G T45 P3 9 AF3 7 AF3 6 AE4 8 AE4 7 Sheet 21 of 49 PCH 4/9- LVDS, DDI, CRT 12/7 change to 10mil 11 D A C _B LU E 11 D A C _G R E E N 11 D A C _R E D AK3 9 AK4 0 11 11 L V D S - LC L K N L V D S - LC L K P 11 11 11 L V D S - L0 N L V D S - L1 N L V D S - L2 N A N4 8 A M4 7 AK4 7 AJ 4 8 11 11 11 L V D S - L0 P L V D S - L1 P L V D S - L2 P A N4 7 A M4 9 AK4 9 AJ 4 7 11 11 L V D S - U C LK N L V D S - U C LK P 11 11 11 L V DS - U0 N L V DS - U1 N L V DS - U2 N A H4 5 A H4 7 AF4 9 AF4 5 11 11 11 L V DS - U0 P L V DS - U1 P L V DS - U2 P A H4 3 A H4 9 AF4 7 AF4 3 AF4 0 AF3 9 L _ DD C_ C L K L _ DD C_ D A T A S D V O_ I N T N S DV O _ INT P L V D _I B G L V D _V B G S D V O_ C TR L C L K S D V O _ C T R LD A T A L V D _V R E F H L V D _V R E F L L V D S A _ CL K # L V D S A _ CL K L V D S A _ D A TA # 0 L V D S A _ D A TA # 1 L V D S A _ D A TA # 2 L V D S A _ D A TA # 3 L VD L VD L VD L VD S A _ DA S A _ DA S A _ DA S A _ DA DD P B _ A U X N D D P B _A U X P DD P B _ HP D TA 0 TA 1 TA 2 TA 3 L V D S B _ CL K # L V D S B _ CL K L VD L VD L VD L VD S B _ DA S B _ DA S B _ DA S B _ DA TA # 0 TA # 1 TA # 2 TA # 3 L V D S B _ D A TA 0 L V D S B _ D A TA 1 L V D S B _ D A TA 2 L V D S B _ D A TA 3 * 1 0m i l _ sh o rt _ 0 4 D A C _B LU E _ R C6 8 9 C6 9 2 C6 9 7 EMI R5 1 6 * 3 3p _ 5 0 V _ N P O _ 04 R5 1 7 * 3 3p _ 5 0 V _ N P O _ 04 R5 2 1 * 3 3p _ 5 0 V _ N P O _ 04 * 1 0m i l _ sh o rt _ 0 4 D A C _G R E E N _ R R 50 6 R 51 2 R 51 5 N4 8 1 5 0 _ 1% _ 0 4 D A C _ B L U E _ R 1 5 0 _ 1% _ 0 4 D A C _ G R E E N _ R P 4 9 T49 1 5 0 _ 1% _ 0 4 D A C _ R E D _ R * 1 0m i l _ sh o rt _ 0 4 D A C _R E D _R NEAR PCH 11 11 11 11 R 2 94 T39 M4 0 D A C_ D DC A CL K D A C _ D D C A D A TA M4 7 M4 9 D A C _H S Y N C D A C _V S Y N C 1 K_ 1 % _ 0 4 DA C_ IRE F _ R Connect to GND T43 T42 A P3 9 A P4 0 L _ C T R L_ C L K L _ C T R L_ D A T A C RT _ B L UE C R T _ GR E E N C RT _ RE D C RT _ DD C_ C L K C RT _ DD C_ D A T A DD P B_ 0 N D DP B_ 0 P DD P B_ 1 N D DP B_ 1 P DD P B_ 2 N D DP B_ 2 P DD P B_ 3 N D DP B_ 3 P D D P C _ C TR L C L K D D P C _ C T R LD A T A DD P C_ A U X N D D P C _A U X P D DP C_ HP D D DP C _ 0 N DD P C_ 0 P D DP C _ 1 N DD P C_ 1 P D DP C _ 2 N DD P C_ 2 P D DP C _ 3 N DD P C_ 3 P D D P D _ C TR L C L K D D P D _ C T R LD A T A C RT _ HS Y N C C RT _ V S Y NC D A C_ IR E F C RT _ I RT N DD P D_ A U X N D D P D _A U X P D DP D_ HP D D DP D _ 0 N DD P D_ 0 P D DP D _ 1 N DD P D_ 1 P D DP D _ 2 N DD P D_ 2 P D DP D _ 3 N DD P D_ 3 P P 38 M 39 A T4 9 A T4 7 A T4 0 A A A A A A A A V4 2 V4 0 V4 5 V4 6 U4 8 U4 7 V4 7 V4 9 P 46 P 42 A P4 7 A P4 9 A T3 8 A A A A B B B B Y4 7 Y4 9 Y4 3 Y4 5 A4 7 A4 8 B4 7 B4 9 3 .3 V S R3 3 0 2 . 2 K _ 04 R3 2 9 2. 2 K _ 0 4 H DM I_ CT R L CL K 32 H DM I_ CT R L DAT A 32 H D MI _H P D HD HD HD HD HD HD HD HD MI C MI C MI C MI C MI C MI C MI C MI C 32 _ C0 C N _ C0 C P _ C1 C N _ C1 C P _ C2 C N _ C2 C P _ CL K C N _ CL K C P 32 32 32 32 32 32 32 32 M 43 M 36 A T4 5 A T4 3 B H4 1 B B B B B B B B B4 3 B4 5 F44 E4 4 F42 E4 2 J4 2 G4 2 B D 8 2 H M 6 5 QS B 2 Q N J H F C - B GA External Graphics (PCH Integrated Graphics Disable) 3 , 9, 1 0 , 1 1 , 1 2, 18 , 1 9 , 2 0 , 22 , 2 3 , 2 4 , 25 , 2 7 , 2 8 , 3 0, 3 1 , 3 2 , 3 3, 3 4 , 3 5 , 3 9 B - 22 PCH 4/9- LVDS, DDI, CRT 3 .3 VS SDVO L _C T R L _ C L K L _C T R L _ D A TA Display Port B T40 K4 7 P _ D D C _ C LK P _ DD C_ D AT A 1 0K _0 4 1 0K _0 4 A P4 3 A P4 5 A M4 2 A M4 0 Display Port C 11 11 R3 0 2 R2 8 6 S D V O_ S T A L L N S D V O_ S T A L L P Display Port D Ver:1.0 pull up 2.2K S D V O _ TV C L K I N N S D V O_ T V C L K I N P L _ B K L T CT L CRT B.Schematic Diagrams 3 .3 V S L _ BKL TEN L _ V DD _ E N Digital Display Interface P4 5 LVDS J47 M4 5 1 1 B LO N 1 1 , 3 4 N B _E N A V D D Schematic Diagrams PCH 4/9- OCI, USB, RSVD CougarPoint -M (PCI,USB,RSVD) U34E Boot BIOS Location 0 1 0 1 R354 LPC Reserved PCI SPI (NAND) BBS_BIT1 *1K_04 B21 M 20 AY16 BG 46 Flash Descriptor security override strap BE28 BC30 BE32 BJ32 BC28 BE30 BF32 BG 32 AV26 BB26 AU28 AY30 AU26 AY26 AV28 AW30 LOW = PCI_GNT#3 swap override PCI_GNT#3 HIGH = Default Unde rstand the RE D FONT define R353 *1K_04 R318 *1K_04 PCI_GNT#3 TP21 TP22 TP23 TP24 RSVD7 RSVD8 RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 RSVD21 RSVD22 RSVD23 RSVD24 INT_PIRQA# INT_PIRQB# INT_PIRQC# INT_PIRQD# K40 K38 H38 G 38 TP25 TP26 TP27 TP28 TP29 TP30 TP31 TP32 TP33 TP34 TP35 TP36 TP37 TP38 TP39 TP40 DGPU_HO LD_RST# DGPU_SEL ECT# D_GPU_PWR_EN# C46 C44 E40 BBS_ BIT1 D47 DGPU_PWM _SELECT# E42 PCI_G NT#3 F46 31 SATA_ODD_DA# INT_PIRQE# SATA_ODD_DA# INT_PIRQG# INT_PIRQH# G 42 G 40 C42 D44 PIRQA# PIRQB# PIRQC# PIRQD# REQ1# / GPIO50 REQ2# / GPIO52 REQ3# / GPIO54 AT10 BC8 AU2 AT4 AT3 AT1 AY3 AT5 AV3 AV1 BB1 BA3 BB5 BB3 BB7 BE8 BD4 BF6 USB_O C#14 USB_O C#67 USB_O C#1011 USB_O C#45 RN18 10K_8P4R_04 5 4 6 3 7 2 8 1 INT_PIRQE# SATA_ODD_DA# INT_PIRQD# INT_PIRQA# RN12 10K_8P4R_04 4 5 3 6 2 7 1 8 3.3V 3.3VS RN20 10K_8P4R_04 DGPU_HOLD_RST# 4 5 3 6 DGPU_SELECT# 7 D_GPU_ PWR_EN# 2 1 8 AV5 AV10 AT8 RSVD26 RSVD27 RSVD28 RSVD29 AY5 BA2 INT_PIRQB# INT _PIRQC# INT _PIRQH# INT _PIRQG# AT12 BF3 RN11 10K_8P4R_04 4 5 3 6 2 7 1 8 DGPU_PWM_SELECT # INT _PIRQE# MPC Switch C ontrol MPC OFF -- 0 DEFAULT MPC ON -- 1 AY7 AV7 AU3 BG4 RSVD25 USB BBS_BIT0 0 0 1 1 RSVD5 RSVD6 PCI BBS_BIT1 RSVD1 RSVD2 RSVD3 RSVD4 RSVD Boot BIOS Strap TP1 TP2 TP3 TP4 TP5 TP6 TP7 TP8 TP9 TP10 TP11 TP12 TP13 TP14 TP15 TP16 TP17 TP18 TP19 TP20 RN8 10K_8P4R_04 5 4 6 3 7 2 8 1 G NT1# / GPIO51 G NT2# / GPIO53 G NT3# / GPIO55 PIRQE# / GPIO2 PIRQF# / GPIO3 PIRQG #/ G PIO4 PIRQH# / G PIO5 USBP0 N USBP0P USBP1 N USBP1P USBP2 N USBP2P USBP3 N USBP3P USBP4 N USBP4P USBP5 N USBP5P USBP6 N USBP6P USBP7 N USBP7P USBP8 N USBP8P USBP9 N USBP9P USBP10 N USBP10P USBP11 N USBP11P USBP12 N USBP12P USBP13 N USBP13P C24 A24 C25 B25 C26 A26 K28 H28 E28 D28 C28 A28 C29 B29 N28 M 28 L30 K30 G30 E30 C30 A30 L32 K32 G32 E32 C32 A32 C33 USBRBI AS# USB_BIAS USB_ PN0 USB_ PP0 USB_ PN1 USB_ PP1 USB_ PN2 USB_ PP2 USB_ PN3 USB_ PP3 29 29 31 31 27 27 27 27 USB_ PN5 USB_ PP5 28 28 CCD USB_ PN8 USB_ PP8 29 29 USB PORT3 R492 R3 52 *10K_04 Sheet 22 of 49 PCH 4/9- OCI, USB, RSVD USB PORT0 USB PORT1 3G WLAN 22.6_1%_06 B33 30,34 PME# R2 39 *0_04 PLT_RST# 3,12,28 28 19 PCLK_TPM CL K_PCI_FB 34 PCLK_KBC USBRBI AS K10 PME# C6 PLT_RST# PLTRST# R333 R502 *2 2_04 22_04 PCLK_TPM_ PCH CLK_PCI_FB_R R298 22_04 CLK_PCI_KBC_R H49 H43 J48 K42 H40 O C0# / GPI O 59 O C1# / GPI O 40 O C2# / GPI O 41 O C3# / GPI O 42 O C4# / GPI O 43 O C5# / GPI O9 O C6# / GPI O 10 O C7# / GPI O 14 CLKO UT_PCI0 CLKO UT_PCI1 CLKO UT_PCI2 CLKO UT_PCI3 CLKO UT_PCI4 A14 K20 B17 C16 L16 A16 D14 C14 USB_OC#01 USB_OC#23 USB_OC#45 USB_OC#67 USB_OC#89 USB_OC#10 11 USB_OC#12 13 USB_OC#14 R484 USB_ OC#01 31 *0_04 AC_PRESENT 20,34 BD82HM65 QSB2 Q NJH FC-BGA 3.3VS *0.1u_1 6V_Y5V_ 04 5 C648 PI N PL T_ RS T# to B uf fe r U33 MC74VHC1G08DFT 2G 1 4 BUF_PLT_RST # 2 3 PL T_RST# 27,29,30,34 R480 100K_04 2,3,8,11,16,18,19,20,23,24,25,27,28,29,30,35,37,38,39 3,9,10,11,12,18,19,20,21,23,24,25,27,28,30,31,32,33,34,35,39 3.3V 3.3VS PCH 4/9- OCI, USB, RSVD B - 23 B.Schematic Diagrams BG 26 BJ26 BH25 BJ16 BG 16 AH38 AH37 AK43 AK45 C18 N30 H3 AH12 AM4 AM5 Y13 K24 L24 AB46 AB45 USB_O C#01 USB_O C#23 USB_O C#89 USB_O C#1213 Schematic Diagrams PCH 6/9- GPIO, CPU 3.3V R464 R208 1K_04 1K_04 R473 R305 R300 R459 R461 *1K_04 *10K_04 1K_04 10K_04 10K_04 CougarPoint - M (GPIO,VSS_NCTF,RSVD) HOST_ALERT#1 HOST_ALERT#2 3.3VS 34 SMI# KBC_RST# DGPU_HPD_INTR# SCI# SMI# SATA_ODD_PRSNT# 3.3V R476 10K_04 SMI# A42 DGPU_HPD_INTR# H36 SCI# E38 ICC_EN# C10 C4 HOST_ALERT#1 G2 Sheet 23 of 49 PCH 6/9- GPIO, CPU R212 R221 *10mil_short_04 *10mil_short_04 *10mil_short_04 *10mil_short_04 *1K_04 100K_04 PCH_TS_VSS1 PCH_TS_VSS2 PCH_TS_VSS3 PCH_TS_VSS4 34 I CPPE# R238 *0_04 31 SATA_ODD_PRSNT# 3.3VS *10K_04 GFX_CRB_DET R467 INTERNAL GFX: LOW (DEFAULT) EXTERNAL GFX: HIGH 100K_04 U2 34 CRI T_TEMP_REP# R200 R209 *0_04 D40 BI OS_REC T5 HOST_ALERT#2 E8 SB_BLON 11 SB_BLON PLL_ODVR_EN FDI_OVRVLTG PLL_ODVR_EN:HIGH- ENABLED[DEFAULT] LOW - DISABLED R458 TACH5 / GPIO69 TACH2 / GPIO6 TACH6 / GPIO70 TACH3 / GPIO7 TACH7 / GPIO71 E16 PLL_ODVR_EN P8 GPIO34 K1 PCH_MUTE# K4 SATA_ODD_PRSNT# V8 FDI_OVRVLTG M5 MFG_MODE N2 GPIO15 A20GATE PECI SATA4GP / GPIO16 M3 TEST_SET_UP V13 100K_04 TEST_DET TACH0 / GPIO17 SCLOCK / GPIO22 GPIO24 / MEM_LED GPIO27 GPIO28 GFX_CRB_DET CRIT_TEMP_REP#_R V3 PROCPWRGD THRMTRI P# INIT3_3V# DF_TVS TS_VSS1 STP_PCI # / GPIO34 TS_VSS2 GPIO35 TS_VSS3 SATA2GP / GPIO36 TS_VSS4 SLOAD / GPIO38 NC_1 BI OS_REC A44 R204 BIOS RECOVERY A45 *0_04 DISABLE----HIGH (DEFAULT) ENABLE-----LOW A46 A5 A6 3.3V B3 SDATAOUT1 / GPIO48 VSS_NCTF_15 SATA5GP / GPIO49 VSS_NCTF_16 GPIO57 VSS_NCTF_17 10K_04 ICC_EN# R479 *1K_04 INTEGRATED Clock Chip Enable ICC_EN#: HIGH - DISABLED [DEFAULT] LOW - ENABLED R497 1.5K_1%_04 A40 GPIO71 R496 1.5K_1%_04 R213 10K_04 3. 3VS R227 R224 *10K_04 1. 05VS_VTT *0_04 BD1 BD49 BE1 BE49 BF1 BF49 P4 AU16 HPECI_R P5 3.3VS VSS_NCTF_1 VSS_NCTF_19 VSS_NCTF_2 VSS_NCTF_20 VSS_NCTF_3 VSS_NCTF_21 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_22 VSS_NCTF_23 VSS_NCTF_6 VSS_NCTF_24 VSS_NCTF_7 VSS_NCTF_25 VSS_NCTF_8 VSS_NCTF_26 VSS_NCTF_9 VSS_NCTF_27 VSS_NCTF_10 VSS_NCTF_28 VSS_NCTF_11 VSS_NCTF_29 VSS_NCTF_12 VSS_NCTF_30 VSS_NCTF_13 VSS_NCTF_31 VSS_NCTF_14 VSS_NCTF_32 H_PECI 3, 34 H_CPUPWRGD 3 AY10 HTHRMTRIP#_R R228 T14 GA20 34 KBC_RST# 34 AY11 390_1%_06 H_THRMTRIP# 3 INIT3_3V# AY1 NV_CLE R475 AH8 PCH_TS_VSS1 AK11 PCH_TS_VSS2 AH10 PCH_TS_VSS3 AK10 PCH_TS_VSS4 P37 BG2 BG48 BH47 BJ4 BJ44 BJ45 BJ46 BJ5 BJ6 C2 C48 D1 D49 E1 E49 F1 F49 BD82HM65 QS B2 QNJH FC- BGA 6,24,37 1.8VS 2,3,5,24,25,35,37,39 1.05VS_VTT 2,3,8,11,16,18,19, 20, 22, 24,25,27,28,29,30,35,37,38,39 3.3V 3,9,10,11,12,18,19,20,21, 22, 24, 25,27,28,30,31,32,33,34,35,39 3.3VS B - 24 PCH 6/9- GPIO, CPU 3.3VS KBC_RST# BH3 B47 R481 1.5K_1%_04 C41 GPIO70 SDATAOUT0 / GPIO39 D6 A4 10K_04 SATA_ODD_PWRGT 31 B41 PCH_GPIO57R495 SATA3GP / GPIO37 VSS_NCTF_18 R205 C40 SATA_ODD_PWRGT LAN_PHY_PWR_CTRL / GPIO12 RCIN# DGPU_PWROK R233 R216 R225 R219 TACH4 / GPIO68 TACH1 / GPIO1 GPIO8 EDID_SELECT# SATA_DET#4 ODD_DETECT# 18 BMBUSY# / GPI O0 CPU/MISC S_GPIO ODD_DETECT# TEST_SET_UP CRIT_TEMP_REP#_R 34 SCI# T7 GPIO RN17 10K_8P4R_04 1 8 2 7 3 6 4 5 U34F S_GPI O NCTF B.Schematic Diagrams RN10 10K_8P4R_04 1 8 2 7 3 6 4 5 R215 200K_04 GPIO34 DGPU_PWROK SATA_ODD_PWRGT MFG_MODE SATA_DET#4 1K_04 R472 2.2K_04 1.8VS H_SNB_IVB# 3 DMI & FDI Termination Voltage NV_CLE Set to Vss Set to Vcc when LOW when HIGH Schematic Diagrams PCH 7/9- PWR CougarPoint -M (POWER) C4 1 8 C 41 9 1 u _6 . 3 V _ X 5 R _ 0 4 1u _ 6 . 3 V _X 5 R _0 4 1 u _6 . 3 V _ X 5 R _ 0 4 12/7 change to 15mil 1. 0 5 V S 1 . 0 5 V S _ V C C A P L L _E XP CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC CC OR OR OR OR OR OR OR OR OR OR OR OR OR OR OR OR OR E [1 ] E [2 ] E [3 ] E [4 ] E [5 ] E [6 ] E [7 ] E [8 ] E [9 ] E [ 1 0] E [ 1 1] E [ 1 2] E [ 1 3] E [ 1 4] E [ 1 5] E [ 1 6] E [ 1 7] V C CA _ D A C_ 3 .3 V S V CC A DA C CRT C 42 4 1 0 u _6 . 3 V _ X 5R _ 06 VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VC VCC CORE C 40 4 AA2 3 A C2 3 A D2 1 A D2 3 AF2 1 AF2 3 A G2 1 A G2 3 A G2 4 A G2 6 A G2 7 A G2 9 A J2 3 A J2 6 A J2 7 A J2 9 A J3 1 U4 8 C 6 82 C6 8 1 C6 8 8 C 6 76 C6 9 1 0 . 0 1 u _1 6 V _ X 7R _ 04 0 . 1 u_ 1 0 V _ X5 R _0 4 1 0u _ 6 . 3 V _X 5 R _0 6 0 . 1 u _ 10 V _ X 5 R _ 0 4 2 2u _ 6 . 3 V _X 5 R _ 0 8 AK3 6 1mA R 27 5 R 5 01 * 1 5m i l _s h o rt _ 06 C4 5 0 *1 u _ 6. 3V _ X 5 R _ 0 4 A M 37 1 . 8V S _ V C C TX _ L V D V C C T X _L V D S [ 1 ] L3 4 H C B 1 60 8 K F -1 2 1T 2 5 60mA A M 38 V C C T X _L V D S [ 2 ] AP3 6 AP3 7 IN C4 6 7 C 4 74 0. 0 1 u _1 6 V _ X 7R _ 0 4 0. 01 u _ 16 V _ X 7 R _ 0 4 2 2 u _6 . 3 V _ X 5R _ 08 1 .8 V S 3 C 67 5 2 S H DN # SET G ND * A P L 56 0 3 -3 3B APL5603-33B 6-02-56033-4C0 G9091-330T11UF 6-02-90913-4C0 3 . 3V S VC CAPL L EX P V3 3 HVCMOS A N1 6 V C C I O [ 1 5] *1 0 u _ 6. 3 V _ X 5 R _ 0 6 A N1 7 V C C I O [ 1 6] A N2 1 V C C I O [ 1 7] 266mA V C C 3_ 3 [ 6 ] C4 5 8 V3 4 A N2 6 1 . 5 V S _ 1 . 8V S V C C I O [ 1 8] A N2 7 AT1 6 V C C I O [ 1 9] C 4 03 C 3 80 C 4 44 C 43 7 C 41 5 AP2 1 1 0 u _6 . 3 V _ X 5 R _ 0 6 1 u _ 6. 3 V _ X 5 R _ 0 4 1 u _ 6. 3 V _ X 5 R _ 0 4 1 u _ 6. 3 V _ X 5 R _ 0 4 1 u _6 . 3 V _ X 5 R _ 0 4 AP2 3 V C C I O [ 2 0] AT2 0 V C C I O [ 2 3] V C C I O [ 2 4] VCCIO AP2 6 42mA 1 .0 5 V S _ V T T V CC DM I[1 ] DMI V C C I O [ 2 1] V C C I O [ 2 2] 160mA V CC V RM [3 ] AP2 4 A T2 4 Sheet 24 of 49 PCH 7/9- PWR 0. 1 u _ 10 V _ X 5 R _ 0 4 V C C 3_ 3 [ 7 ] 2mA AB3 6 V C CC L K DM I V C C C LK D MI R 28 5 *1 5 m il _ s ho rt _ 0 6 1 . 05 V S C3 9 1 C3 8 8 1u _ 6 . 3V _X 5 R _ 0 4 1 0 u_ 6 . 3 V _ X5 R _0 6 A N3 3 V C C I O [ 2 5] A N3 4 3 .3 V S 266mA V C CD F T E RM [1 ] V C C 3 _ 3 [ 3] V C CD F T E RM [2 ] 1 . 5 V S _ 1 . 8V S 0 . 1 u _ 10 V _ X 5 R _ 0 4 AP1 6 1 . 0 5V S _V C C A P LL _ F D I R2 3 1 1. 0 5 V S * 0 _0 4 V C C V R M[ 2 ] B G6 V _ N V R A M _V C C Q A G 17 DFT / SPI C 4 29 A G 16 V C C I O [ 2 6] B H2 9 V c c A F D IP L L 190mA R 4 63 C3 9 0 R4 7 1 V C C D MI [ 2 ] FDI A U2 0 1 .0 5 S _ V CC _ DM I *0 _ 04 0. 1 u _ 1 0V _ X 5 R _ 0 4 AJ 1 7 V C CD F T E RM [4 ] V C CM E 3 .3 V 3 .3 V S R4 6 2 V C C I O [ 2 7] 3. 3 V S AJ 1 6 V C CD F T E RM [3 ] AP1 7 12/17 1 .8 V S *1 5 m il _ sh o rt _ 0 6 V1 20mA R 45 5 3 .3 V * 0 _0 4 * 1 5m i l _s h o rt _ 06 V C CS P I C 645 1 u _ 6 . 3V _X 5 R _ 0 4 R 25 6 1 .0 5 V S _ V T T 1. 05 V S 1 .5 VS 1 .8 V S B D 8 2 H M6 5 Q S B 2 QN J H F C -B GA * 1 5m i l _s h o rt _ 06 1 . 5 V S _ 1 . 8V S R 31 9 R 25 2 R 30 7 *0 _ 0 4 *1 0 m i l_ s h ort _ 0 4 *0 _ 0 4 35 1 . 5V S 2 5 1 . 5 V S _ 1 . 8V S 6 , 2 3 , 37 1 . 8V S 1 8 , 1 9 , 20 , 2 5 , 3 5, 37 , 3 8 1 . 0 5 V S 1 1, 1 8 , 2 5 , 28 , 3 1 , 3 2, 3 3 , 3 5 , 39 , 4 0 5 V S 2 , 3 , 5 , 23 , 2 5 , 3 5, 3 7 , 3 9 1 . 0 5 V S _ V TT 2 , 3 , 8, 11 , 1 6 , 1 8, 1 9 , 2 0 , 22 , 2 3 , 2 5, 2 7 , 2 8 , 29 , 3 0 , 3 5, 3 7 , 3 8 , 39 3 . 3V 3 , 9 , 10 , 1 1 , 1 2, 18 , 1 9 , 2 0, 2 1 , 2 2 , 23 , 2 5 , 2 7, 2 8 , 3 0 , 31 , 3 2 , 3 3, 3 4 , 3 5 , 39 3 . 3V S PCH 7/9- PWR B - 25 B.Schematic Diagrams V C C T X _L V D S [ 4 ] C4 6 1 1 V C C I O [ 2 8] C 65 5 2.93A * 2 3. 7 K _ 1 % _0 4 4 SET * 1 0K _ 1 % _ 04 AK3 7 B J2 2 1. 0 5 V S OU T R5 0 3 3 .3 V S VSSAL VD S A N1 9 1 . 0 5 V S _ V C C A P L L _E XP 1 5 U4 7 V S S A DA C V C CA L V D S *1 5 m il _ s ho r t _ 0 6 L4 9 *H C B 1 0 05 K F - 1 2 1 T 20 U 35 V C CA _ DA C3 .3 V S V C C T X _L V D S [ 3 ] R 4 90 5 VS L5 2 H C B 16 0 8 K F -1 2 1T 2 5 1mA 3 . 3V S _V C C A _L V D LVDS 1.3A * 1u _ 6 . 3 V _X 5R _ 04 PO W ER U 3 4G 1 . 0 5V S 3 . 3V S L5 3 H C B 16 0 8 K F -1 2 1T 2 5 Schematic Diagrams PCH 8/9 POWER CougarPoint - M (POWER) CougarPoint power supply range 1. 0 5 V S _ V C C A _ C L K L51 *H C B 1 0 05 K F -1 2 1 T2 0 1 . 05 V S U 34 J 3 . 3V Note: C417 - STUFFED ONLY FOR CPT INTERPOSER; UNSTUFF FOR CPT P OW ER A D4 9 C 39 3 N2 6 V CC A CL K 0 . 1 u_ 1 0 V _ X5 R _ 0 4 3mA V C C I O [ 2 9] V C C D S W 3_ 3 C3 7 5 *0 . 1 u_ 1 0 V _X 5 R _ 0 4 P CH _ V CC DS W 26 6mA C 68 3 C 46 3 1 0 u_ 6 . 3 V _ X5 R _0 6 1 u _6 . 3 V _ X 5R _0 4 V1 2 V C C 3 _3 L50 T38 V C C I O [ 3 3] V C C 3 _3 [ 5 ] V C C S U S 3 _ 3[ 7] V C C A P L L D MI 2 AL 2 9 C4 0 2 AL 2 4 V C C S U S 3 _ 3[ 8] V C C I O[ 1 4 ] U SB 1. 0 5 V S D CP S U S D C P S U S [ 3] V C C S U S 3 _ 3[ 9] V C C S U S 3 _ 3 [ 1 0] V C C S U S 3 _ 3[ 6] AA1 9 1 .01 A V CC A S W [1 ] T2 3 C 4 20 C4 3 1 0. 1 u _ 10 V _ X 5R _ 04 0 . 1 u_ 1 0 V _X 5 R _ 0 4 T2 4 V 23 V 24 D1 0 C 1mA R2 7 8 AA2 6 M2 6 5 V A _ P C H _ V C C 5R E F S U S V CC A S W [3 ] V CC A S W [4 ] AA2 7 V CC A S W [5 ] Sheet 25 of 49 PCH 8/9 POWER AA2 9 V CC A S W [6 ] C 41 3 2 2 u_ 6 . 3 V _ X5 R _0 8 C 42 2 AA3 1 1 u _6 . 3 V _ X 5R _0 4 A C2 6 V CC A S W [7 ] V CC A S W [8 ] A C2 7 V CC A S W [9 ] A C2 9 V CC A S W [1 0 ] C 39 7 A C3 1 1 u _6 . 3 V _ X 5R _ 04 A D2 9 V CC A S W [1 1 ] V CC A S W [1 2 ] A D3 1 V CC A S W [1 3 ] W21 V CC A S W [1 4 ] W23 Clock and Miscellaneous AA2 4 1 u _6 . 3 V _ X 5R _0 4 V CC A S W [1 5 ] Note: C1289- STUFFED ONLY FOR CPT INTERPOSER; UNSTUFF FOR CPT 5V 0. 1 u _ 10 V _ X 5R _ 04 W24 V 5R E F _ S U S A N2 3 D C P S U S [ 4] V C CA _ U S B S US C 4 00 *1 u _ 6. 3 V _ X 5 R _ 0 4 A N2 4 3. 3 V V C C S U S 3 _ 3[ 1] P 34 5 V S _ P C H_ V CC 5 RE F S U S D1 2 R B 75 1 S -4 0C 2 C A 1mA V 5 RE F R 2 74 N2 0 P CI /G PI O/ LP C C 43 5 2 2 u_ 6 . 3 V _ X5 R _0 8 3. 3 V 10 _ 1 %_ 0 4 C 4 34 1 . 0 5V S V C C I O [ 3 4] V CC A S W [2 ] C 41 4 R B 7 5 1S -4 0 C 2 A P 24 T2 6 AA2 1 1. 0 5 V S 97m A Max 1.10V 1.58V 1.89V 3.47V 5.25V T2 9 V C C A P LL _ C P Y _ P C H *H C B 1 6 08 K F -1 2 1 T2 5 *0 . 1 u_ 1 6 V _Y 5 V _0 4 3 .3 V T2 7 V C C I O [ 3 2] B H2 3 V CC A S W [1 6 ] V C C S U S 3 _ 3[ 2] 1 0 _1 % _ 04 3 .3 V S 5 VS C4 4 5 N2 2 V C C S U S 3 _ 3[ 3] 1 u _6 . 3 V _ X5 R _0 4 P 20 V C C S U S 3 _ 3[ 4] P 22 V C C S U S 3 _ 3[ 5] 3 .3 V C 4 12 A A 16 3 .3 V S V C C 3 _ 3[ 1] W 16 C4 5 1 C 6 62 C3 9 6 T3 4 0 . 1 u_ 1 0 V _X 5 R _ 0 4 0. 1 u _ 10 V _ X 5R _ 04 0 . 1 u_ 1 0 V _X 5 R _ 0 4 V C C 3 _ 3[ 8] V C C 3 _ 3[ 4] 1 u _ 6. 3V _ X 5 R _ 0 4 W26 V CC A S W [1 7 ] C3 9 2 12/7 change pcb F/P W29 0. 1 u _ 10 V _ X 5 R _ 04 V CC A S W [1 8 ] W31 1 . 5V S _1 . 8 V S A J2 V CC A S W [1 9 ] V C C 3 _ 3[ 2] 1 . 0 5 S _ S A TA 3 W33 1 .0 5 V S L33 H C B 1 0 05 K F -1 2 1 T2 0 V CC A S W [2 0 ] 1 . 0 5V S _ V C C A _ A _ D P L V C C I O[ 5] V C CR T CE X T + C 68 7 C6 8 6 C 48 3 22 u _ 6. 3V _ X 5 R _ 0 8 DC P RT C 1 .0 5 V S A H1 3 1 u _6 . 3 V _ X5 R _0 4 A H1 4 V CC V RM [4 ] 1 u _6 . 3 V _ X 5R _ 04 L2 4 H C B 10 0 5 K F -1 21 T 2 0 C3 7 3 Y4 9 R3 0 8 * 22 0 u _4 V _ V _ B N1 6 A F 13 V C C I O [ 1 2] 1 6mA V C C I O [ 1 3] *0 _ 04 V C C I O[ 6] B D4 7 S AT A V C C A D P LL A BF4 7 V C C A D P LL B C 47 1 150mA 1. 0 5 V S 22 u _ 6. 3V _ X 5 R _ 0 8 AF1 7 AF3 3 AF3 4 A G3 4 1 u _6 . 3 V _ X 5R _ 04 C 38 9 C4 8 4 1 u _6 . 3 V _ X 5R _ 04 1u _ 6 . 3V _X 5 R _ 0 4 V C C I O[ 7 ] V CC DIF F CL K N[1 ] V CC DIF F CL K N[2 ] V CC DIF F CL K N[3 ] AK1 1 . 05 V S 1 u _6 . 3 V _ X 5R _ 04 C 39 9 0. 1 u _ 10 V _ X 5 R _ 04 1 . 0 5 M_ V C C S U ST 1 7 V1 9 * 1u _ 6 . 3V _ X 5 R _ 0 4 <1mA 1. 0 5 V S _ V T T C3 7 6 C 37 1 C 37 9 4. 7 u _ 6. 3V _ X 5 R _ 0 6 0 . 1 u_ 1 0 V _ X5 R _0 4 0 . 1 u_ 1 0 V _ X5 R _ 0 4 2mA C6 5 9 C 66 1 C 66 3 1u _ 6 . 3V _X 5 R _ 0 4 0 . 1 u_ 1 0 V _ X5 R _0 4 0 . 1 u_ 1 0 V _ X5 R _ 0 4 3 . 3V A C1 6 A C1 7 C4 1 0 A D1 7 1 u _6 . 3 V _ X5 R _0 4 BJ 8 V C C I O[ 4] T2 1 D C P S U S [ 1] D C P S U S [ 2] V _ P RO C_ IO A2 2 1. 0 5 V S V C C A S W [ 2 2] V C C A S W [ 2 3] V 21 T1 9 V C C A S W [ 2 1] 3 . 3A _1 . 5 A _ H D A _I O P 32 16mA V CC S US H DA C 4 36 B D 82 H M6 5 QS B 2 Q N J H F C -B GA 0. 1 u _ 10 V _ X 5R _ 04 B - 26 PCH 8/9 POWER 1 . 5V 3 . 3A _ 1 . 5 A _ H D A _I O R 5 00 R 4 99 *0 _ 0 4 0 _0 4 DC P S S T V CC RT C RT CV C C 1 .0 5 V S V C C I O[ 3] V C CS S T V 1 6 C 37 4 1. 0 5 V S 1. 5 V S _ 1 . 8 V S A F 11 V C C V R M[ 1] V C C I O[ 2] V CC S S C C 43 2 1 . 05 V S _ V C C A P L L _S A TA 3 V C C A P L LS A T A A G3 3 M IS C C6 7 0 C PU 1 2/ 21 C 67 4 R TC * 22 0 u _4 V _ V _ B C 67 3 H DA + * 22 u _ 6. 3 V _ X 5 R _ 0 8 C 70 8 L4 8 *H C B 1 00 5 K F -1 2 1T 2 0 A F 14 80mA 80mA 1 . 0 5 V S _ V C C A _ B _D P L L 31 H C B 1 00 5 K F -1 21 T 2 0 * 22 u _ 6. 3 V _ X 5 R _ 0 8 B.Schematic Diagrams 1u _ 6 . 3V _ X 5 R _ 0 4 P 28 DC P S US B Y P 3. 3 V S 1. 0 5 V S C 4 23 P 26 V C C I O [ 3 0] T16 V C C I O [ 3 1] L35 H C B 1 6 08 K F -1 2 1 T2 5 Voltage 1.05V 1.5V 1.8V 3.3V 5V Min 1.00V 1.43V 1.71V 3.14V 4.75V 1 . 05 V S 1 8 3 . 3A _1 . 5 A _ H D A _I O 1 8 ,2 0 RT C V CC 2 4 1 . 5 V S _ 1 . 8V S 1 8 , 19 , 2 0 , 2 4, 3 5 , 3 7, 3 8 1 . 0 5 V S 3 , 6, 9 , 1 0 , 2 9, 3 3 , 3 5, 3 7 , 3 8 1 . 5V 2 , 3, 5 , 2 3 , 2 4, 3 5 , 3 7, 3 9 1 . 0 5 V S _ V T T 1 1 , 18 , 2 4 , 28 , 3 1 , 3 2, 3 3 , 3 5, 3 9 , 4 0 5 V S 2 , 3 , 8 , 11 , 1 6 , 1 8, 1 9 , 2 0, 2 2 , 2 3 , 24 , 2 7 , 28 , 2 9 , 3 0, 3 5 , 3 7, 3 8 , 3 9 3 . 3V 3 , 9 , 1 0 , 11 , 1 2 , 18 , 1 9 , 2 0, 2 1 , 2 2, 2 3 , 2 4 , 27 , 2 8 , 30 , 3 1 , 3 2, 3 3 , 3 4, 3 5 , 3 9 3 . 3V S 28 , 2 9 , 3 1, 3 5 , 3 7, 3 8 , 4 1 5 V Schematic Diagrams PCH 3/9- GRD CougarPoint -M (GND) U34I U34H VSS[ 159] VSS[ 160] VSS[ 161] VSS[ 162] VSS[ 163] VSS[ 164] VSS[ 165] VSS[ 166] VSS[ 167] VSS[ 168] VSS[ 169] VSS[ 170] VSS[ 171] VSS[ 172] VSS[ 173] VSS[ 174] VSS[ 175] VSS[ 176] VSS[ 177] VSS[ 178] VSS[ 179] VSS[ 180] VSS[ 181] VSS[ 182] VSS[ 183] VSS[ 184] VSS[ 185] VSS[ 186] VSS[ 187] VSS[ 188] VSS[ 189] VSS[ 190] VSS[ 191] VSS[ 192] VSS[ 193] VSS[ 194] VSS[ 195] VSS[ 196] VSS[ 197] VSS[ 198] VSS[ 199] VSS[ 200] VSS[ 201] VSS[ 202] VSS[ 203] VSS[ 204] VSS[ 205] VSS[ 206] VSS[ 207] VSS[ 208] VSS[ 209] VSS[ 210] VSS[ 211] VSS[ 212] VSS[ 213] VSS[ 214] VSS[ 215] VSS[ 216] VSS[ 217] VSS[ 218] VSS[ 219] VSS[ 220] VSS[ 221] VSS[ 222] VSS[ 223] VSS[ 224] VSS[ 225] VSS[ 226] VSS[ 227] VSS[ 228] VSS[ 229] VSS[ 230] VSS[ 231] VSS[ 232] VSS[ 233] VSS[ 234] VSS[ 235] VSS[ 236] VSS[ 237] VSS[ 238] VSS[ 239] VSS[ 240] VSS[ 241] VSS[ 242] VSS[ 243] VSS[ 244] VSS[ 245] VSS[ 246] VSS[ 247] VSS[ 248] VSS[ 249] VSS[ 250] VSS[ 251] VSS[ 252] VSS[ 253] VSS[ 254] VSS[ 255] VSS[ 256] VSS[ 257] VSS[ 258] VSS[259] VSS[260] VSS[261] VSS[262] VSS[263] VSS[264] VSS[265] VSS[266] VSS[267] VSS[268] VSS[269] VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301] VSS[302] VSS[303] VSS[304] VSS[305] VSS[306] VSS[307] VSS[308] VSS[309] VSS[310] VSS[311] VSS[312] VSS[313] VSS[314] VSS[315] VSS[316] VSS[317] VSS[318] VSS[319] VSS[320] VSS[321] VSS[322] VSS[323] VSS[324] VSS[325] VSS[328] VSS[329] VSS[330] VSS[331] VSS[333] VSS[334] VSS[335] VSS[337] VSS[338] VSS[340] VSS[342] VSS[343] VSS[344] VSS[345] VSS[346] VSS[347] VSS[348] VSS[349] VSS[350] VSS[351] VSS[352] H46 K18 K26 K39 K46 K7 L18 L2 L20 L26 L28 L36 L48 M12 P16 M18 M22 M24 M30 M32 M34 M38 M4 M42 M46 M8 N18 P30 N47 P11 P18 T33 P40 P43 P47 P7 R2 R48 T12 T31 T37 T4 W34 T46 T47 T8 V11 V17 V26 V27 V29 V31 V36 V39 V43 V7 W17 W19 W2 W27 W48 Y12 Y38 Y4 Y42 Y46 Y8 BG29 N24 AJ3 AD47 B43 BE10 BG41 G14 H16 T36 BG22 BG24 C22 AP13 M14 AP3 AP1 BE16 BC16 BG28 BJ28 H5 VSS[ 0] AA17 AA2 AA3 AA33 AA34 AB11 AB14 AB39 AB4 AB43 AB5 AB7 AC19 AC2 AC21 AC24 AC33 AC34 AC48 AD10 AD11 AD12 AD13 AD19 AD24 AD26 AD27 AD33 AD34 AD36 AD37 AD38 AD39 AD4 AD40 AD42 AD43 AD45 AD46 AD8 AE2 AE3 AF10 AF12 AD14 AD16 AF16 AF19 AF24 AF26 AF27 AF29 AF31 AF38 AF4 AF42 AF46 AF5 AF7 AF8 AG19 AG2 AG31 AG48 AH11 AH3 AH36 AH39 AH40 AH42 AH46 AH7 AJ19 AJ21 AJ24 AJ33 AJ34 AK12 AK3 VSS[ 1] VSS[ 2] VSS[ 3] VSS[ 4] VSS[ 5] VSS[ 6] VSS[ 7] VSS[ 8] VSS[ 9] VSS[ 10] VSS[ 11] VSS[ 12] VSS[ 13] VSS[ 14] VSS[ 15] VSS[ 16] VSS[ 17] VSS[ 18] VSS[ 19] VSS[ 20] VSS[ 21] VSS[ 22] VSS[ 23] VSS[ 24] VSS[ 25] VSS[ 26] VSS[ 27] VSS[ 28] VSS[ 29] VSS[ 30] VSS[ 31] VSS[ 32] VSS[ 33] VSS[ 34] VSS[ 35] VSS[ 36] VSS[ 37] VSS[ 38] VSS[ 39] VSS[ 40] VSS[ 41] VSS[ 42] VSS[ 43] VSS[ 44] VSS[ 45] VSS[ 46] VSS[ 47] VSS[ 48] VSS[ 49] VSS[ 50] VSS[ 51] VSS[ 52] VSS[ 53] VSS[ 54] VSS[ 55] VSS[ 56] VSS[ 57] VSS[ 58] VSS[ 59] VSS[ 60] VSS[ 61] VSS[ 62] VSS[ 63] VSS[ 64] VSS[ 65] VSS[ 66] VSS[ 67] VSS[ 68] VSS[ 69] VSS[ 70] VSS[ 71] VSS[ 72] VSS[ 73] VSS[ 74] VSS[ 75] VSS[ 76] VSS[ 77] VSS[ 78] VSS[ 79] VSS[ 80] VSS[ 81] VSS[ 82] VSS[ 83] VSS[ 84] VSS[ 85] VSS[ 86] VSS[ 87] VSS[ 88] VSS[ 89] VSS[ 90] VSS[ 91] VSS[ 92] VSS[ 93] VSS[ 94] VSS[ 95] VSS[ 96] VSS[ 97] VSS[ 98] VSS[ 99] VSS[ 100] VSS[ 101] VSS[ 102] VSS[ 103] VSS[ 104] VSS[ 105] VSS[ 106] VSS[ 107] VSS[ 108] VSS[ 109] VSS[ 110] VSS[ 111] VSS[ 112] VSS[ 113] VSS[ 114] VSS[ 115] VSS[ 116] VSS[ 117] VSS[ 118] VSS[ 119] VSS[ 120] VSS[ 121] VSS[ 122] VSS[ 123] VSS[ 124] VSS[ 125] VSS[ 126] VSS[ 127] VSS[ 128] VSS[ 129] VSS[ 130] VSS[ 131] VSS[ 132] VSS[ 133] VSS[ 134] VSS[ 135] VSS[ 136] VSS[ 137] VSS[ 138] VSS[ 139] VSS[ 140] VSS[ 141] VSS[ 142] VSS[ 143] VSS[ 144] VSS[ 145] VSS[ 146] VSS[ 147] VSS[ 148] VSS[ 149] VSS[ 150] VSS[ 151] VSS[ 152] VSS[ 153] VSS[ 154] VSS[ 155] VSS[ 156] VSS[ 157] VSS[ 158] AK38 AK4 AK42 AK46 AK8 AL1 6 AL1 7 AL1 9 AL2 AL2 1 AL2 3 AL2 6 AL2 7 AL3 1 AL3 3 AL3 4 AL4 8 AM 11 AM 14 AM 36 AM 39 AM 43 AM 45 AM 46 AM 7 AN2 AN29 AN3 AN31 AP12 AP19 AP28 AP30 AP32 AP38 AP4 AP42 AP46 AP8 AR2 AR48 AT1 1 AT1 3 AT1 8 AT2 2 AT2 6 AT2 8 AT3 0 AT3 2 AT3 4 AT3 9 AT4 2 AT4 6 AT7 AU24 AU30 AV16 AV20 AV24 AV30 AV38 AV4 AV43 AV8 AW14 AW18 AW2 AW22 AW26 AW28 AW32 AW34 AW36 AW40 AW48 AV11 AY12 AY22 AY28 S0 Iccmax Current (A) 1 (mA) 1 (mA) 1 (mA) 0.266 1 (mA) 0.08 0.08 1.3 0.042 2.925 1.01 0.020 2 (mA) 0.19 0.097 1 (mA) 0.16 0.02 0.095 0.055 1 (mA) 0.06 Sheet 26 of 49 PCH 3/9- GRD BD82HM65 QSB2 QNJH FC-BGA BD8 2HM65 QSB2 QNJH FC-BGA PCH 3/9- GRD B - 27 B.Schematic Diagrams AY4 AY42 AY46 AY8 B11 B15 B19 B23 B27 B31 B35 B39 B7 F45 BB12 BB16 BB20 BB22 BB24 BB28 BB30 BB38 BB4 BB46 BC14 BC18 BC2 BC22 BC26 BC32 BC34 BC36 BC40 BC42 BC48 BD46 BD5 BE22 BE26 BE40 BF10 BF12 BF16 BF20 BF22 BF24 BF26 BF28 BD3 BF30 BF38 BF40 BF8 BG17 BG21 BG33 BG44 BG8 BH11 BH15 BH17 BH19 H10 BH27 BH31 BH33 BH35 BH39 BH43 BH7 D3 D12 D16 D18 D22 D24 D26 D30 D32 D34 D38 D42 D8 E18 E26 G18 G20 G26 G28 G36 G48 H12 H18 H22 H24 H26 H30 H32 H34 F3 Voltage Rail Voltage V_CPU_IO 1.05 V5REF 5 V5REF_Sus 5 Vcc3_3 3.3 VccADAC3 1.05 VccADPLLA 1.05 VccADPLLB 1.05 VccCore 1.05 VccDMI 1.1 VccIO 1.05 VccASW 1.05 VccSPI 3.3 VccDSW3_3 3.3 VccDFTERM 1.8 VccSus3_3 3.3 VccSusHDA 3.3 VccVRM 1.5 VccClKDMI 1.05 VccSSC 1.05 VccDIFFCLKN 1.05 VccALVDS 3.3 VccTX_LVDS 1.8 Schematic Diagrams 7 11 13 9 15 3 G _3 . 3 V W AKE# C O E X1 C O E X2 3 . 3 V A U X_ 0 1. 5 V _ 0 U I M_ P W R U I M _D A T A UIM _ CL K U I M _R E S E T UIM _ V P P CL K RE Q # R E F C LK R E F C LK + GN D 0 GN D 1 60 mils 2 6 8 10 12 14 16 U U U U U U I M_ P W R R 73 U I M_ C LK U I M_ R S T U I M_ P W R 3G _ 3. 3 V I M_ P W R I M_ D A TA I M_ C LK I M_ R S T I M_ V P P J _ S I M1 SIM CONN R 75 (T OP VI EW ) 9 7 5 3 1 U I M _D A T A U I M _C *1 0 mi l _ sh o rt _ 04 *4 . 7 K _ 04 D U U U U E TE C T _S W I M_ D A T A I M_ C L K I M_ R S T I M_ P W R C5 7 1 9 17 1 2 -00 9 0 P C1 1 0 C1 1 3 0 . 1u _ 1 6V _ Y 5V _ 0 4 4 0 . 1u _ 16 V _ Y 5 V _ 0 4 GN D 5 8 6 4 2 U I M _M C M D UIM _ I/O U I M_ V P P U I M_ GN D R 76 * 10 m li _ s ho rt _ 0 4 U I M_ D *2 2 p _5 0 V _ N P O_ 0 4 GN D C 56 2 21 27 29 GN D C 54 1 GN D 1 0 u _6 . 3 V _ X 5R _ 06 C5 5 1 0 . 1 u_ 1 6V _Y 5 V _ 0 4 3 G_ E N R3 8 7 * 0_ 0 4 35 23 25 31 33 17 19 37 39 41 43 45 47 49 51 GN D 6 GN D 7 GN D 8 GN D 9 GN D 1 0 GN D 1 1 P E T n0 P E T p0 P E Rn 0 P E Rp 0 W _ DIS A B L E # PERSET # S M B _ CL K S M B _D A T A U S B _D U S B _ D+ R e s erv e d 0 R e s erv e d 1 GN D 1 2 3. 3V A U X _3 3. 3V A U X _4 GN D 1 3 R e s erv e d 2 R e s erv e d 3 R e s erv e d 4 R e s erv e d 5 3 . 3 V A U X_ 1 1. 5 V _ 1 1. 5 V _ 2 3 . 3 V A U X_ 2 L E D _W W A N # LE D _ W L A N # L E D _W P A N # 8 89 0 8 -52 0 4 M-0 1 18 26 34 40 50 20 22 30 32 36 38 3G _E N 34 US B _ P N2 US B _ P P 2 60 mil s 24 28 48 52 42 44 46 1. 2. 3. 4. Port 2 22 22 SI M? ? ? ? ? ? ? ? (1 0m il) ? ? ? ? ? ? ? ? GND SI M hol d ? ? ? ? ? GN D? ? SI M CON N ? ? MI NI CA RD CO NN 3G POWER 3. 3 V Q 30 A O 3 41 5 S D 3A 3G _3 . 3 V + C 5 37 C 55 1 u _6 . 3 V _ X5 R _0 4 C7 0 9 10 u _ 6. 3 V _ X 5R _0 6 22 0 u_ 6 . 3 V _ 6. 3 *6 . 3 *4 . 2 GN D GN D 3G _3 . 3 V H =9. 9? G ND G ND C1 1 6 Lay ou t? 3 G _3 . 3 V 3A G ND R 59 1 0 0 _0 4 R 54 2 0 K _ 1% _ 0 4 6 3 R 63 1 0 0K _ 0 4 H 11 * 6-3 4 -M5 2 N S -0 2 0 -2 2G 3 G_ P O W E R _ E N S Q8 A S MT D N 7 00 2 Z H S 6 R Q8 B MT D N 7 00 2 Z H S 6 R 4 34 12/ 22 D D 5G Bot to m 6-3 4- M5 2N S- 02 0-2 1 B.Schematic Diagrams 6 0mi ls 3 G_ 3. 3V Sheet 27 of 49 WLAN 3G MINI PCIE GN D 0 . 01 u _ 16 V _ X 7R _ 04 0 . 01 u _ 16 V _ X 7R _ 04 0 . 01 u _ 16 V _ X 7R _ 04 0 . 01 u _ 16 V _ X 7R _ 04 C5 6 3 C5 5 8 C6 4 7 C6 4 6 GN D 2 GN D 3 GN D 4 GN D C 11 4 G 0 . 1 u_ 1 6 V _Y 5 V _0 4 GN D 3 4 3 G_ D E T # 18 S A T A _R XP 3 18 S A T A _R XN 3 18 S A TA _T X N 3 1 8 S A T A _ T XP 3 G ND KEY U I M_ D A T A U I M_ V P P C 11 1 *2 2 p _5 0 V _ N P O_ 0 4 1 3 5 G ND 0. 1 u _ 16 V _ Y 5 V _ 04 *2 2 p _5 0 V _ N P O _0 4 22 0 u_ 6 . 3 V _ 6. 3 *6 . 3 *4 . 2 C 57 3 * 22 p _ 50 V _ N P O _0 4 C 55 2 J _3 G 1 GN G G ND GN D G ND MINI CARD GN D 1 G ND 2 GN D 3 G ND 4 3G/MSATA + WLAN 3G MINI PCIE From EC default HI WLAN MINI CARD 2 0 , 29 , 3 0 R 2 32 P C IE _ W A K E # 3 . 3V 1 9 W LA N _C L K R E Q # 1 9 C L K _ P C I E _W L A N # 1 9 C L K _ P C I E _W L A N * 0_ 0 4 W A K E # R1 5 1 10 K _ 0 4 H1 6 6 -34 -M5 2 N S -0 2 0 -2 B ott om 6 -34 -M 52 NS -0 20 -2 C L _C L K 1 C L _D A T A 1 C L _R S T #1 3 . 3V 35 23 25 31 33 R 16 1 R 17 5 R 17 7 R 18 1 R 18 3 J _ MI N I 1 W AKE# CO E X 1 CO E X 2 3 . 3V A U X _0 1 . 5 V _0 U I M _P W R U I M_ D A T A U I M_ C L K U I M_ R E S E T U I M_ V P P C L K R E Q# RE F CL K RE F CL K + GN D 0 GN D 1 4 GN D 5 * 0_ 0 4 B T _ E N _ R * 0_ 0 4 C L _C LK 1_ R * 0_ 0 4 C L _D A T A 1_ R * 0_ 0 4 C L _R S T #1 _ R *1 0 K _ 04 P C H _ B T _ E N _ # 17 19 37 39 41 43 45 47 49 51 GN D 2 GN D 3 GN D 4 GN D 1 1 PETn 0 PETp 0 P E R n0 P E R p0 R e s e rv e d0 R e s e rv e d1 GN D 1 2 3 .3 V A UX _ 3 3 .3 V A UX _ 4 GN D 1 3 R e s e rv e d2 R e s e rv e d3 R e s e rv e d4 R e s e rv e d5 8 8 9 08 -5 20 4 M-0 1 3 1 , 3 4 B T _E N 1 9 B T _S B D # R 18 2 R 18 4 2 6 8 10 12 14 16 M1 M5 M7 M8 M2 M3 M4 M6 M -MA R K M -MA R K M -MA R K M-M A R K M-M A R K M-M A R K M -MA R K M -MA R K 20 mil 20 mil R1 5 2 8 0C LK 8 0_ D E T# 3 IN1 0_04 * 0_ 0 4 GN D 6 GN D 7 GN D 8 GN D 9 G N D 10 W _ D I S A B LE # P E R S E T# S MB _ C L K S MB _ D A T A U SB_ DUS B _ D+ 3 . 3V A U X _1 1 . 5 V _1 1 . 5 V _2 3 . 3V A U X _2 LE D _ W W A N # L E D_ W L A N# LE D _ W P A N # H= 9. 9? 18 26 34 40 50 *0 _ 0 4 R 1 54 * 10 m i _l s h ort _ 0 4 H2 3 C 1 1 1D 11 1 N H 24 C 1 11 D 1 1 1 N B T _ S B D# 19 80 C LK 34 3I N 1 34 12/7 10K? ? short H1 0 J _ 80 D B G1 1 2 3 4 80 C LK 3I N 1 R 5 83 2 3 4 5 10 K _ 0 4 V D D3 H2 0 1 9 8 7 6 2 3 4 5 MT H 8 _ 0 D 2 _8 H 26 9 8 7 6 1 2 3 4 5 MT H 8_ 0 D 2 _ 8 9 8 7 6 1 M TH 8_ 0 D 2 _ 8 8 5 20 5 -0 40 0 1 R 4 47 *1 0 K _ 04 3 . 3V S W L A N_ E N 3 4 B U F _ P L T _R S T # 20 mil 3. 3 V A U X _1 B T _ DE T # 3 4 US B _ P N 3 2 2 US B _ P P 3 2 2 R4 5 0 0 _0 4 2 3 4 5 12/06 3 .3 V GN D Port 3 3 .3 V R 45 2 GN D 3 1, 3 4 GN D H6 9 2 8 3 7 4 6 5 1 BT _ DET # C 63 9 * 1 80 p _5 0 V _ N P O _0 4 1 G ND 9 8 7 6 MT H 8 _ 0 D 2 _8 GN D H2 5 9 2 8 3 7 4 1 6 5 MT H 8 _ 0D 2 _8 3 .3 V W LA N _L E D # 1 H4 2 3 4 5 4 7 K _0 4 40 mil 20 mil H1 9 MT H 8 _ 0D 2 _8 2 2, 2 9 , 3 0, 3 4 1 1 , 35 , 3 6 , 37 SYS1 5 V 1 1 , 1 8, 3 0 , 3 4, 3 5 , 3 6, 3 7 , 4 1, 4 2 V D D 3 2, 3 , 8 , 1 1, 16 , 1 8, 19 , 2 0, 22 , 2 3, 24 , 2 5, 28 , 2 9, 30 , 3 5, 37 , 3 8, 39 3 . 3 V 3 , 9, 1 0 , 1 1, 1 2 , 1 8, 1 9 , 2 0, 2 1 , 2 2, 2 3 , 2 4, 2 5 , 2 8, 3 0 , 3 1, 3 2 , 3 3, 3 4 , 3 5, 3 9 3 . 3 V S B - 28 WLAN 3G MINI PCIE H1 C 1 1 1D 1 11 N V D D3 20 22 30 32 36 38 24 28 48 52 42 44 46 H 2 C 11 1 D 1 1 1N 3 . 3V KEY 3 . 3V 19 19 19 7 11 13 9 15 21 27 29 3 4 W L A N_ DE T # 1 9 P C I E _ R X N 3 _ W LA N 1 9 P C I E _ R XP 3 _ W L A N 1 9 P C I E _ T X N 3 _ W LA N 19 P C I E _ T XP 3 _ W L A N B T _E N 1 3 5 H2 7 1 G ND 9 8 7 6 MT H 8_ 0 D 2 _ 8 G ND H5 9 2 8 3 7 4 6 5 MT H 8 _ 0 D 2 _8 GN D 2 3 4 5 1 H 14 1 G ND G ND 9 8 7 6 M TH 8_ 0 D 2 _ 8 G ND H 3 9 2 8 3 7 4 6 5 MT H 8_ 0 D 2 _ 8 G ND 2 3 4 5 1 G ND 9 8 7 6 M TH 8_ 0 D 2 _ 8 G ND Schematic Diagrams CCD, TPM, MULTI CON FOR POWER SW BOARD FOR OPTIMUS FUNCTION FOR TOUCH SENSOR BOARD CPU FAN CONTROL U 13 3 .3 V S 5 VS 3 .3 V 5 VS_ FAN C3 0 8 J _ SW 1 F ON V IN V OU T VSET GN GN GN GN C P U_ F A N M B TN R6 5 W EB_ W W W # W E B _ E M A I L# *1 0 m il _ sh o rt _ 04 M_ B T N # 6-02-03940-B20 6-02-00995-B20 6-02-99011-B20 35 LI D _ S W # 1 1, 3 4 1 2/ 14 DE L 12 /14 D EL A P _ ON D D D D 8 7 6 5 A X 9 95 S A 1 u_ 6 . 3 V _Y 5V _0 4 20 mi l 1 2 3 4 5 6 7 8 FO N 1 2 3 4 34 C 30 9 0 . 1u _ 1 6V _ Y 5 V _ 0 4 CP U_ FA N 5 V S _F A N 8 8 48 6 -0 80 1 J _F A N 1 6-20-94K10-108 10 u _ 6. 3 V _ X 5R _0 6 1 2/ 06 ? ? f oo tp ri nt 34 85 2 05 -0 3 70 1 J_FAN1 C P U _F A N S E N 3. 3 V S 3 R 45 3 4 . 7 K _ 04 1 CLICK CONN 5 VS_ TP 5V S R 1 70 TPM 1.2 *1 5 m il _ s ho rt _ 06 R 1 72 J _T P 1 1 2 3 4 8 52 0 1 -04 0 5 1 C 2 78 C2 7 9 * 10 u _ 6. 3 V _ X 5R _ 06 1 u_ 6 . 3 V _Y 5V _0 4 R1 7 3 10 K _ 0 4 10 K _ 0 4 C 2 80 C2 8 1 47 p _ 50 V _ N P O _0 4 47 p _ 50 V _ N P O _0 4 T P _D A T A 3 4 T P _C L K 3 4 C2 8 7 * 0. 1 u _ 16 V _ Y 5 V _ 04 3 .3 V S R 3 68 3 .3 V GN D J _ TP 2 18 , 3 4 3 , 12 , 2 2 18 , 3 4 20 L E D_ P W R 3 4 L E D _ A C I N 34 L E D_ B A T _ F UL L 3 4 L E D_ B A T _ CH G 3 4 *1 0K _0 4 U 20 3. 3 V 1 2 3 4 5 6 18 , 3 4 18 , 3 4 18 , 3 4 18 , 3 4 L P C_ A D0 L P C_ A D1 L P C_ A D2 L P C_ A D3 22 P CL K _ T P M 26 23 20 17 L A D0 L A D1 L A D2 L A D3 21 L CL K 22 16 27 15 L P C _ F R A ME # P L T _R S T# S E R IRQ P M _C LK R U N # V D D1 V D D2 V D D3 S 4 _ S TA T E # C5 2 0 C 4 77 *0 . 1 u_ 1 6 V _Y 5 V _0 4 * 0. 1 u _ 16 V _ Y 5 V _ 0 4 *0 . 1 u_ 1 6 V _Y 5 V _0 4 * 1u _ 6 . 3V _ Y 5V _ 0 4 5 L P CP D # VSB C5 1 7 *0 . 1 u_ 1 6V _Y 5V _ 0 4 GP I O G P I O2 T E S T B I/B A DD TP M _ P P C 47 8 3 . 3V S L F RA M E # L RE S E T # S E R IRQ CL K R UN# TP M _ B A D D9 6-21-91A00-106 6-21-91A10-106 6-20-94A70-104 10 19 24 C5 1 8 TPM 28 20 85 2 0 1-0 6 05 1 G ND 6 2 T P M3 0 0 4 T P M3 0 0 5 13 XTAL I 14 XTAL O XT A L I 7 PP T P M3 0 0 1 1 T P M3 0 0 2 3 T P M3 0 0 3 1 2 CCD X9 4 3 XTAL O NC _ 1 NC _ 2 NC _ 3 8 TESTI G ND_ 1 G ND_ 2 G ND_ 3 G ND_ 4 4 11 18 25 X1 1 4 3 C 47 5 U1 4 5 V IN V IN V OU T C1 1u _ 6 . 3V _ Y 5V _ 0 4 1A 1 C2 34 C C D _E N 3 EN G ND *1 8p _ 5 0V _ N P O_ 04 3. 3 V S LPCPD# in act ive t o LRST# in ac tive 32 ~9 6u s C3 TPM _PP 2 0. 1 u _1 6 V _ Y 5 V _ 04 C 4 76 Ass ert ed be for e e nt erin g S3 LPC res et timin g: 5 V _ CCD 1A * 3 2. 7 6 8K H z 1 2 * 3 2. 7 6 8K H z 1 2 * 18 p _5 0 V _ N P O _0 4 * S LB 9 6 3 5T T 5V Sheet 28 of 49 CCD, TPM, MULTI CON 2. 2 u _ 6. 3 V _ Y 5 V _ 06 HI: ACCESS L OW: NORMAL ( Inte rnal PD) T P M_ P P R3 1 4 * 10 K _ 0 4 T P M_ B A D D R3 1 3 * 10 K _ 0 4 R3 1 2 * 10 K _ 0 4 HI: 4E/ 4F H TPM _BADD L OW: 2E/ 2F H G 5 24 3 A R 3 67 * 3 3_ 0 4 P C L K _T P M C 5 19 * 1 0p _ 50 V _ N P O _ 04 P C L K _ T P M1 J _ CCD 1 P or t 5 From EC default HI 2 2 U S B _P N 5 22 US B _ P P 5 34 C C D _D E T # 1 2 3 4 5 85 2 0 5-0 5 0 01 11 , 1 8 , 24 , 2 5, 31 , 3 2, 33 , 3 5, 3 9 , 4 0 5 V S 2 5, 2 9 , 3 1, 3 5 , 37 , 3 8 , 41 5V 11 , 1 8, 2 7 , 3 0, 3 4 , 3 5, 3 6 , 3 7, 4 1 , 4 2 V D D 3 2 , 3 , 8 , 11 , 1 6 , 18 , 1 9 , 20 , 2 2 , 23 , 2 4 , 25 , 2 7, 29 , 3 0, 35 , 3 7, 3 8 , 3 9 3 . 3V 3, 9 , 1 0 , 11 , 1 2 , 18 , 1 9 , 20 , 2 1 , 22 , 2 3 , 24 , 2 5 , 27 , 3 0, 31 , 3 2, 33 , 3 4, 3 5 , 3 9 3 . 3V S CCD, TPM, MULTI CON B - 29 B.Schematic Diagrams 1 2 3 C 3 10 Schematic Diagrams USB2.0, USB3.0 NEC 3. 3V 33 . V 3. 3V A 1.0 5V C 332 22 u_6. 3V _X5R _0 8 C 318 22 u_6. 3V _X5R _0 8 C 292 0. 1u _16V _Y 5V_ 04 3. 3VA L21 H CB 1608 KF -1 21T25 US BV CC 3. 0 U S BVC C 3. 0_1 C 347 *10 0u_6 .3V _B _A + L15 R 169 10K _04 H C B16 08KF - 121T 25 C 244 C 254 0 .1 u_16V _Y 5V_ 04 C 26 0 0.1 u_16 V_Y 5V _04 C 26 3 0 .1 u_16 V_Y 5V _04 GN D 12 /7 0 1 . u_16 V_Y 5V _04 R 14 9 CLOSE TO CONNECTOR C 24 2 *1 5mil _sho rt _0 6 J _US B3 AU XD ET D 33 . VA 19 PC I E_R XP 2_U SB 30_ NE C 19 PC I E_R XN 2_U S B30 _NE C C 274 C 273 0. 1u_ 10V _X7R _04 D 2 D1 0. 1u_ 10V _X7R _04 F2 F1 1 9 P CI E _TXP 2_U SB 30_ NE C 1 9 P CI E _TXN 2_U S B30 _NE C B6 PE TXP PE TXN U 3TXD N 2 U2D M2 PE RX P PE RX N U 2DP 2 U 3R XDP 2 C 3. 3V R 168 R 162 R 167 0_0 4 10K _04 10K _04 H1 0. 1u_ 16V _Y5 V_04 0. 1u_1 6V_ Y5V _04 A6 N8 TXN 1 G _D M1 G _D P1 L1 8 US B_ PN 0 4 3 U SB _P N0 - 2 US B_ PP0 1 2 U SB _P P0+ 3 GN D R 192 10 K_0 4 OC 2 I B 4 *WC M201 2F2S - 161T0 3 R XN 1 *C 107C J- 104 05- L GN D US B30 _O C 3. 3V H 13 9 7 H 14 PPO N 2 SMI B PPO N 1 VC N TL VI N PO K VO U T VO U T EN 1 2 G ND R 127 VF B C 209 G S7 11 3 6-21-B4A20-009 C2 28 0. 02 2u_16 V_X 7R _04 ( 15 nF ~48 nF ) C 22 9 P PO N J14 750_ 1%_04 1 u_6. 3V _Y 5V_ 04 GN D C 226 R 125 0. 1u_ 16V_ Y5 V_04 2. 37K _1%_0 4 1 0u_6 .3 V_X5 R_ 06 18 U S B3. 0_ SI M# A 3A 4 8 C 20 0 OC 1 I B AU XD ET PS EL 1. 05 V 6 VI N 3 DA TA_ H R XP1 5V C2 14 1u_6 .3V _Y 5V _04 5 1 0K_ 04 DA TA_ L 22 U S B_P P0 ? ? ? ? PIN6? U9 2A R 12 6 V+ 22 U S B_P N 0 G 14 C 213 C 225 P5 PO N RS TB B 10 TXP 0 A 10 N 10 TXN 0 G _D M0 P 10 B 12 G _D P0 Vout= 0.8*(R127+R125)/R125=1.053V U 3T XDP 1 C 26 1 *0_04 AU XD ET_ R 1 u_6. 3V _X5R _04 U SB _SP I _SC LK M2 U SB _SP I _CE # N 2 U SB _SP I _SI U SB _SP I _SO N1 M1 SP IS C K SP IC S B SP IS I U 3TXD N 1 U2D M1 SP IS O U 2DP 1 U 3R XDP 1 uPD72 0200 K1 3 K1 4 J1 3 P4 A 12 U3 RXD N 1 R XP0 3. 3V R XN 0 GN D GN D P 12 R1 46 N 12 *2N 700 2W 1u_6. 3V _Y 5V _04 0_0 4 C 329 6-02-03510-920 6-02-06288-920 VIA EN# R189 ? ? ? P9 P7 P2 P1 N 13 N9 N7 N3 L17 C 251 22 u_6. 3V _X5R _08 C 247 22 u_6. 3V _X5R _08 C 224 0. 1u_ 16V _Y 5V_0 4 H CB 1608 KF -12 1T25 M13 M12 M11 U SB VC C 3. 0_2 C 262 U S BV CC 3. 0 3. 3V M10 M9 C 27 2 M4 M3 L12 C 22 7 GN D GN D L6 9 1 0. 1u_10 V_X 7R_ 04 TXP 0_R TXN 0 C 23 0 G_ DM0 4 *W CM201 2F2 S- 161T 03- shor t G_ DP 0 1 4 RX P0 *W CM201 2F2 S- 161T 03- shor t 1 RX N0 L11 L7 0. 1u_10 V_X 7R_ 04 TXN 0_R 3 US B_P N 8L 13 2 US B_P P8 + 3 RX P0_R L 16 2 RX N0_ R D i f f . t rac e 9 0o hm 8 2 4 3 6 7 5 G ND 1 2/ 23 E MI ? ? ? ? 51 2K bi t 0. 1u_1 6V_Y 5V _04 US B_S PI _V D D_1 8 S ST XDGN D GN D 2 U SB _F LAS H 3 R 166 1K _04 R 160 4. 7K _04 U SB _H O LD# 6 G ND C 190 09- 9090 5- L USB 3.0/PCH USB 2.0 Co-layout *0 _04 U SB _PN 8U SB _PP 8+ *0 _04 2 D A TA_ L 3 D A TA_ H 4 GN D GN D1 *C 107C J- 104 05- L GN D GN D 4 U SB _PN 8- G ND 2 G N D3 3 2 U SB _PP 8+ *WC M2 012F 2S- 161 T03 GN D 1 L1 4 1 G ND 4 U SB _PP 8 1 5_1%_ 04 U SB _S PI _SO 4 H O LD# V SS MX25L5 121E MC- 20G G ND 2 G N D3 U SB _PN 8 R 17 9 U SB _S PI _SI 6-21-B4A20-009 GN D 2, 3, 8, 11, 16, 18, 19, 20 ,2 2, 23, 24, 25, 27 ,28 ,3 0, 35, 37, 38, 39 3. 3V 25 ,28 ,3 1, 35, 37, 38, 41 5V 36 , 9 , ,10 ,2 5, 33, 35, 37, 38 1. 5V 1 5_1%_ 04 U SB _S PI _C E# CE # 7 V+ U SB_ PP 8 2 U S B_S PI _S O_R S CK GN D 4 J_ US B2 U SB_ PN 8 22 4 7_04 1 U S B_S PI _C E#_ R R 17 8 WP # GN D 3 S HI E LD G N D _D S SR X- R 15 9 SO S HI E LD D+ S SR X+ S HI E LD R 180 47 K_0 4 5 U S B_S PI _S I_ R SI GN D 1 S ST X+ S HI E LD V BU S U SB VC C 3. 0_2 1 22 4 33 . V KBC_SPI_*_R = 0.1"~0.5" U 12 J_ US B1 St an da rd -A TXP 0 1 00K _04 USB3.0 NEC ROM V DD M6 M5 R 19 7 N C1 GN D CLO1 SE2/TO7 CONNECTOR M8 M7 +C 346 *10 0u_6. 3V _B_ A *N C_ 04 US B_P N 8 R 139 US B_P P8 R 141 B - 30 USB2.0, USB3.0 NEC 1 G ND R 189 P 14 P 11 L3 L4 G ND GN D L1 L2 GN D G ND GN D GN D G ND GN D GN D J7 J8 J12 K3 K4 J9 J1 1 G ND GN D J4 J 6 GN D G ND GN D GN D G ND GN D GN D H7 H8 H9 H 12 J 3 G 13 H6 G7 G8 G9 G 11 G 12 G2 G6 F1 2 G1 F9 F 11 C 12 C 13 G ND GN D G ND GN D G ND GN D G ND G ND GN D GN D GN D GN D G ND G ND G ND GN D GN D GN D GN D GN D GN D GN D G ND GN D G ND G ND GN D G ND GN D GN D GN D GN D GN D C2 C3 C1 0 C1 1 G ND G ND F6 F7 F8 B1 3 B1 4 C1 G ND G ND GN D GN D E14 F4 B9 B1 1 GN D GN D G ND GN D B5 B7 G ND G ND E2 E 13 B3 B4 G ND G ND G ND GN D GN D G ND GN D 20p _50V _N PO _04 G ND G ND GN D GN D GN D GN D G ND GN D C 240 GN D GN D GN D GN D X1 *2 4MH z A7 A9 A1 1 A1 3 A1 4 G ND GN D 4 D3 D4 1 3 G ND G ND D13 D 14 E1 2 G ND G ND + G ND G ND GN D GN D GN D D1 1 D 12 C2 41 2 0p_5 0V_N P O_ 04 UG N D CS EL A2 A3 A4 A5 S P6 A1 VO U T3 E N# A PL3 510B KI - TR G C3 11 PP O N G 100 _04 C 319 8 4 U SB _O N 1# Q 19 U 3A VS S XT2 R 140 VO U T2 V I N2 *10K _04 U 2P VS S XT1 2A 7 V I N1 D6 X2 6 F LG # VO U T1 2 3 N 11 GN D N1 4 24MH z-F SX 5 - L 2 1 U 14 5 2A 1. 6K _1%_04 22 0u_6 .3V _6. 3*6 .3*4 .2 C1 4 6-22-24R00-1B5 US BV C C3. 0 R5 96 *0_04 US B30 _O C RR E F U 2A VS S M1 4 5V R 188 GN D GN D D R16 3 *0. 1u_ 16V_ Y5V _04 Sheet 29 of 49 USB2.0, USB3.0 NEC *0_04 U S B_P P0+ 6-02-06615-320 6-02-07113-320 1 . 5V 5V *0_04 U S B_P N0 - US B_ PP 0 R 19 0 0. 1u_1 6V_ Y5V _04 B.Schematic Diagrams R 15 5 AU XD ET _R J 2 J 1 USB 3.0/PCH USB 2.0 Co-layout US B_ PN 0 R 18 7 J _US B4 PE RS TB PE WAK EB PE CR E QB USB3.0 NEC core power 1.05V GN D C 190 09- 909 05- L 0. 1u_ 16V_ Y5V _04 D8 R B 751S -4 0C 2 3 92K _1%_04 0_0 4 K1 K2 GN D _D SSR X- GN D 4 10u_ 6. 3V_X 5R _06 AU XD ET PE WAK E 1 2/ 23 E MI ? ? ? ? GN D 3 GN D S HE I LD D+ SSR X+ S H E I LD *10u_6 .3 V_X 5R _06 R 165 1 9 U S B30_ CL KR EQ #_N E C 0_0 4 GN D TXP 1 P8 B8 A8 R 164 L 20 2 D i f f . t ra ce 9 0o h m UG N D GN D 2 S HE I LD U SB VC C 3. 0_1 1 U3 RXD N 2 22 ,27 3 , 0, 34 B U F_P LT_R S T# 20 ,2 7, 30 P C E I _WA KE # 1 2/2 1 SST XD- 4 US B_ PP 0+ 3 6 RX P1_ R 7 5 RX N1 _R L 19 2 3 U 3T XDP 2 H2 33 . V *W CM20 12F2 S- 161 T03- sho rt G _D P1 1 4 R XP1 *W CM20 12F2 S- 161 T03- sho rt 1 R XN 1 8 2 G ND 4 PE CL KN U1 1 uPD 72 0200 0. 1u_1 0V_X 7R _04 TXN 1_R 3 US B_ PN 0- 4 GN D 1 G ND 2 GN D 3 PE CL KP 5 p_50V _N PO _04 C 29 4 GN D 1 SST X+ S H E I LD VBU S G ND 4 B1 0 .0 1u_16 V_X 7R_ 04 P13 D7 B2 19 CL K_P C IE _U SB 30_N EC 1 9 C LK _PC I E_U S B30 #_N EC U 2A VD D 33 H11 K1 1 K 12 L5 H3 H4 L8 U 3A VD D3 3 VD D 10 VD D1 0 VD D 10 V D D10 VD D 10 VD D 10 V DD 10 E3 E4 D8 D9 E1 2 VD D 10 V D D1 0 VD D1 0 V DD 10 VD D 10 V DD 10 C4 C8 C9 C5 C6 N6 P3 N4 N5 L13 L1 4 L10 L9 G4 F3 G3 F14 D 10 F 13 C7 D5 VD D1 0 VD D 10 VD D 10 V DD 10 V DD 10 VD D 33 V D D33 VD D 33 V D D3 3 VD D 33 V DD 33 VD D 33 V D D33 VD D3 3 VD D 33 V D D3 3 VD D 33 VD D 33 V DD 33 E 11 C2 59 0. 01u_ 16V _X7R _04 C 235 C 238 0 .01 u_16 V_X7 R_ 04 0. 01u _16V _X7R _04 0. 01u_ 16V _X7R _04 C 265 C 23 4 0. 01 u_16 V_X7 R_ 04 0 .0 1u_16 V_X 7R _04 1 2/ 7 C2 43 0 .0 1u_1 6V_X 7R _04 C 237 C 246 S C 233 0. 01 u_16V _X7 R_0 4 C 25 2 0. 01u_1 6V_ X7R _04 C2 45 0. 01u _16V _X7R _0 4 C2 70 *MTN 7002Z H S3 TXN 1 G _D M1 9 1 0. 1u_1 0V_X 7R _04 TXP 1_R GN D 1 G ND 2 GN D 3 C 271 0. 01u _16V _X7 R_0 4 C2 36 C 239 0. 1u_ 16V _Y 5V_0 4 SU SB # VD D 10 V DD 10 C 277 Q 18 G 6,2 0, 34, 35 C 29 3 S tan da rd -A TXP 1 0 .1 u_16 V_Y 5V _04 U S B_S PI _S CLK _RR 15 8 4 7_04 6-04-25512-B71 6-04-25512-B70 6-04-25512-B72 U SB _S PI _SC LK Schematic Diagrams Card Reader (JMC251 C) JMC251 C S wi tc hi ng Re gu la to r c lo se t o PIN 33 V D D3 S D _ CL K R2 7 6 0 _ 04 R 26 9 C4 3 3 D V DD 0_04 near Pin#41 R 27 1 L32 (> 20 mi l) * 10 0 K _ 0 4 R E GL X (> 20 mi l) DV DD 3 . 3 V _ LA N *1 0 p _5 0 V _ N P O _ 04 S W F 2 52 0 C F -4 R 7M -M C6 6 5 C6 6 9 *0 . 1 u _1 6 V _ Y 5 V _ 0 4 2 . 2 u_ 6 . 3 V _ Y 5 V _ 06 32 32 L A N_ M DIP 1 L A N_ M DIN 1 32 32 3 . 3 V _ LA N L A N_ M DIP 2 L A N_ M DIN 2 32 32 L A N_ M DIP 3 L A N_ M DIN 3 V D D3 1 0 u_ 6 . 3 V _ X5 R _0 6 Pin#32 L AN L AN AVD L AN L AN _M D I P 2 _M D I N 2 D 1 2 _ 62 _M D I P 3 _M D I N 3 3 . 3V S (> 20 mil ) C 51 5 A V D D 1 2 _ 55 0 . 1u _ 1 6V _ Y 5V _0 4 Pin#32 0 . 1 u_ 1 6 V _ Y 5 V _ 04 Pin#33 * 4 . 7K _ 0 4 L A N _ S C L R 3 42 * 4 . 7K _ 0 4 U 21 8 7 V CC 6 5 L A N _ SDA S CL S DA (LQFP 64) GN D WP A0 A1 A2 1 2 3 *A T 2 4 C 0 2 B N R 3 21 * 1 5m i l _s h o rt _0 6 V DD RE G V C C 3V P W R CR T EST MP D W AKEN L A N _L E D 2 CR_ L E D RST N C PPEN G ND V D DIO M DIO 6 MD I O1 2 MD I O1 4 C R _C D 0 N 6-03-02510-0P0 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 R 32 2 *0 _ 0 6 V DD RE G (> 20 mi l) ( >2 0m il ) 3 .3 V S ( >2 0m il ) V C C_ CA R 3 . 3V _ L A N R3 4 3 R3 4 4 B U F _ P L T_ R S T# CP P E N S D_ W P R3 2 4 MD I O1 2 MD I O1 4 S D_ CD # R3 2 3 3 . 3V 3 .3 V S D MP D P ME # _ R LA N _ S C L LA N _ S D A 1 K_ 0 4 * 4 . 7K _0 4 22 , 2 7 , 29 , 3 4 C4 9 0 R 2 47 V DD 3 1 0 K _0 4 *0 _ 0 6 * 4. 7 K _ 0 4 0. 1 u _ 16 V _ Y 5V _ 0 4 3 . 3 V _L A N V C C _C A R D Sheet 30 of 49 Card Reader (JMC251 C) 3. 3 V S JM C 2 5 1- LG B Z 0 C ( >2 0m il ) C 5 03 JMC251 C R EXT A V DD 3 3 X IN X OU T C LK N CL K P A V D D1 2 RX P R XN GN D TX N TXP A V DD1 2 M D I O 13 M D I O7 CR _ CD1 N *1 5 m il _ sh o rt _ 0 6 L A N_ M DIP 0 L A N_ M DIN 0 M DIO 1 0 M DIO 9 M DIO 8 VD D V I P _1 V IN _ 1 A V DD1 2 V I P _2 V IN _ 2 G ND A V DD3 3 V I P _3 V IN _ 3 A V DD1 2 V I P _4 V IN _ 4 C4 8 6 C4 9 2 1 0u _ 6 . 3V _X 5 R _ 0 6 Pin#31 0 . 1 u_ 1 6 V _Y 5 V _0 4 Pin#31 RE X T _ C R2 6 4 1 2 3 4 5 6 7 A V D D 1 2_ 7 8 *1 5 mi l _ sh o rt _ 06 9 10 11 12 A V D D 1 2_ 1 3 13 *1 5 mi l _ sh o rt _ 06 1 4 15 M DIO 7 C R_ C D1 N 16 R2 4 8 *1 5 m il _ sh o rt _ 0 6 32 32 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 1 0 u_ 6 . 3 V _X 5 R _ 0 6 Pin#33 3 . 3V R 3 34 PC Ie Di ff er en ti al Pa ir s = 1 00 O hm 12 K _ 1 % _0 4 0 . 1 u _1 6 V _ Y 5 V _ 0 4 Pin#13 R 30 4 C 4 72 0 . 1 u _1 6 V _ Y 5 V _ 04 Pin#7 DV D D C 45 6 R 30 3 A V D D 1 2 _1 3 DV D D 3 .3 V _ L A N A V D D 1 2_ 7 12/7 R 31 1 0 _0 4 P C I E _ R X P _ 4 _G L A N C 4 69 P C I E _ R X N _4 _ GL A N C 4 66 MS _I N S # 3 . 3 V _ LA N 0 . 1u _ 1 0V _X 7 R _ 0 4 0 . 1u _ 1 0V _X 7 R _ 0 4 P C I E _ R XP 4 _ GL A N P C I E _R X N 4 _ GL A N 19 19 R 3 25 1 0 K_ 0 4 D1 5 A V D D 1 2_ 5 2 A V D D 1 2 _5 5 A V D D 1 2 _6 2 C 40 9 C 4 08 C 4 06 C4 6 8 0 . 1 u _1 6 V _ Y 5 V _ 04 Pin#52 0 . 1 u _1 6 V _ Y 5 V _ 0 4 Pin#55 0 . 1 u _1 6 V _ Y 5 V _ 0 4 Pin#62 *1 0 u _6 . 3 V _ X 5R _ 06 Pin#7 Reserved P C I E _T X N 4 _ GL A N 1 9 P C I E _ T X P 4_ G LA N 19 C L K _ P C I E _ GL A N 1 9 C L K _ P C I E _ G LA N # 1 9 2 0 , 2 7, 2 9 A P CIE _ W A K E # C R2 8 0 * 1M _ 04 X3 C4 0 5 C 4 91 C 5 02 0 . 1 u _1 6 V _ Y 5 V _ 04 Pin#43 *0 . 1 u _1 6 V _ Y 5 V _ 04 Pin#43 0 . 1 u _1 6 V _ Y 5 V _ 0 4 0 . 1 u _ 16 V _ Y 5 V _ 0 4 3 . 3 V _L A N C4 8 8 FSX8L_25MHz? ? ? ? ? X4 *H S X3 2 1 S _2 5 MH Z 4 1 3 V CC_ C A RD C 38 5 *0 . 1 u _1 6 V _ Y 5 V _ 04 Pin#2 V C C_ CA R D *1 0 u _6 . 3 V _ X5 R _0 6 S D _C L K C 66 4 Pin#2 * 0. 1 u _ 16 V _ Y 5V _ 0 4 R 49 4 7 5 _0 4 2 C 65 3 4 . 7 u_ 6 . 3 V _ X5 R _0 6 V C C_ CA R D 3 . 3 V _ LA N C 38 4 C 4 07 C 6 67 C4 2 1 1 0 u_ 6 . 3 V _ X5 R _0 6 Pin#59 Reserved 0 . 1 u _1 6 V _ Y 5 V _ 0 4 Pin#59 0 . 1 u _1 6 V _ Y 5 V _ 0 4 Pin#2 0 . 1 u_ 1 6 V _Y 5 V _0 4 Pin#21 Place all ca pacit ors close d to chi p. The sub scrip t in each CAP in cicat es th e pin n umb er o f JMC251/ JM C261 th at shou ld b e clo sed to. C 45 3 C4 3 0 2 2 p_ 5 0 V _N P O_ 0 4 22 p _ 50 V _ N P O_ 0 4 C 65 4 V C C_ CA R D * 0. 1 u _ 16 V _ Y 5V _ 0 4 12/13 ? EVT bug 19 6 -22 -2 5R 00 -1 B4 6 -22 -2 5R 00 -1 B5 P ME # 2 2 ,3 4 J _ C A R D -R E V 1 S D _C D # S D _D 2 S D _D 3 S D _B S L A NX IN F S X -8L _ 2 5M H z 2 1 C 48 9 0 _0 4 4 IN 1 SOCKET SD/MMC/MS/MS Pro F or J MC2 51 C V CC _ CA R D P M E #_ R R 3 01 R B 7 5 1 S -40 C 2 Card Reader Power L A N X OU T 3 . 3 V _ LA N 12/7 ? EC? ? ? A V D D 12 _ 7 C6 5 7 C6 6 0 0 . 1u _ 1 6V _Y 5V _0 4 *4 . 7 u _6 . 3 V _ X 5R _ 06 S D _D 0 S D _D 1 S D _W P SD SD MS SD SD SD SD _C L K _D 3 _I N S # _D 2 _D 0 _D 1 _B S P1 P2 P3 P4 P5 P6 P7 P8 P9 P1 0 P1 1 P1 2 P1 3 P1 4 P1 5 P1 6 P1 7 P1 8 P1 9 P2 0 P2 1 C D_ S D D A T2 _ S D C D / D A T3 _ S D C MD _S D VSS_ SD V D D_ S D C LK _ S D VSS_ SD D A T0 _ S D D A T1 _ S D W P_ SD VSS_ M S V C C _ MS S C LK _M S D A T3 _ MS I N S _ MS D A T2 _ MS S D I O/ D A T 0_ M S D A T1 _ MS BS_ M S VSS_ M S GN D GN D P 22 P 23 M D R 0 19 -C 0-1 0 4 2 Crystal 8045 & 3225 Co-lay Near Cardreader CONN 3 2 DV DD 1 1 , 1 8, 2 7 , 3 4, 35 , 3 6 , 37 , 4 1 , 4 2 V D D 3 2 , 3, 8 , 1 1 , 1 6, 1 8 , 1 9, 2 0 , 2 2 , 23 , 2 4 , 25 , 2 7 , 2 8, 2 9 , 3 5, 37 , 3 8 , 39 3. 3 V 3 , 9, 10 , 1 1 , 12 , 1 8 , 1 9, 2 0 , 2 1, 2 2 , 2 3 , 24 , 2 5 , 27 , 2 8 , 3 1, 3 2 , 3 3, 34 , 3 5 , 39 3. 3 V S Card Reader (JMC251 C) B - 31 B.Schematic Diagrams DV D D R2 4 9 M D I O 10 M DIO 9 M DIO 8 A V D D 1 2 _ 52 *1 5 m il _ sh o rt _ 0 6 L A NX IN L A N X OU T DV D D R2 5 0 V DD 3 C 48 5 4 U1 8 DV D D Fo r JM C2 51/ 26 1 on ly RE G L X M D I O1 1 L A N_ L E D0 L A N _L E D 1 I S ON _ 25 1 C S DX C_ P O W E R Card Reader Pull High/Low Resistors 3 . 3V _ L A N SD X C_ P O W ER S D _ C LK _ C SD _ BS S D_ D 3 S D _ D2 S D_ D 1 S D _ D0 DV D D MS _I N S # C4 8 7 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 * 4. 7 K _ 0 4 1 K_ 0 4 M D I O1 1 L A N _L E D 0 LA N _ L E D 1 ISO N GN D V D DIO V DD O M D I O5 M DIO 4 M D I O3 M DIO 2 M D I O1 M DIO 0 F B 12 GN D LX 3 . 3V S 3 . 3 V _ LA N R3 2 0 R3 1 7 Schematic Diagrams SATA ODD, LED, USB CHARGE SATA ODD 3. 3 V S 18 18 5 V S _ OD D S A T A _ OD D _ P R S N T# S A T A _ OD D _ D A # 2 2 2 2 0_ 0 4 R4 2 20 _ 0 4 U3 2 1 ? ??? ?? ?? ? P1 P2 P3 P4 P5 P6 2 2 0_ 0 4 C6 3 8 23 V O UT V IN V IN G ND EN 2 4 5 1 u_ 6 . 3 V _Y 5V _0 4 3 S A TA _O D D _P W R GT SCROLL LOCK D2 NUM LOCK D3 CAPS LOCK D 4 R Y -S P 17 0 Y G 34 -5 M LED R Y -S P 17 0 Y G 34 -5 M LED R Y -S P 1 7 0 Y G3 4 -5 M 23 G5 2 43 A A S A T A _ RX N2 S A T A _ RX P 2 R 3 Gre en G re en LED G re en C 0 . 0 1 u_ 1 6 V _X 7 R _ 0 4 0 . 0 1 u_ 1 6 V _X 7 R _ 0 4 3 .3 V S R 2 A C 27 5 C 27 6 3 .3 V S 5 VS S A T A _ TX P 2 1 8 S A T A _ TX N 2 18 C 0 . 0 1 u_ 1 6 V _X 7 R _ 0 4 0 . 0 1 u_ 1 6 V _X 7 R _ 0 4 A C 28 6 C 28 3 C S1 S2 S3 S4 S5 S6 S7 G ND2 G ND1 LED Zero Power ODD ? ? ? ? ? J_ODD1 J_ O D D 1 R4 4 4 C 1 8 51 1 -11 3 0 5-L C 2 55 C2 5 0 C2 5 3 C2 4 9 0. 1 u _ 16 V _ Y 5 V _ 04 0. 1 u _ 16 V _ Y 5 V _ 0 4 1u _ 6 . 3V _ Y 5V _ 0 4 1 0u _ 6. 3 V _ X 5R _ 06 + C 62 8 10 0 K _ 04 L E D _ N U M# LE D _ N U M # * 22 0 u _6 . 3 V _ 6. 3 *4 . 2 L E D_ CA P # 34 LE D _ C A P # LE D _ S C R O L L# 34 L E D _ S C R OL L # 34 P IN G ND 1 ~ 4 = G ND 3 . 3V S HDD LED 3. 3 V S 12 /8 R 1 R Y -S P 17 0 Y G 34 -5 M 22 US B _ P N1 22 US B _ P P 1 2 US B _ P P 1 3 IN S A T A _ LE D # D M_ O DP _ O D M_ I N VD D5 3 4 , 35 , 3 6 R 5 07 10 K _ 0 4 6 VD D5 R 5 08 10 K _ 0 4 7 VD D5 R 5 09 10 K _ 0 4 8 D D _ ON US B 1 _ P N1 10 US B 1 _ P P 1 3 2 2 7, 3 4 BT_ EN BT_ EN B C 69 0 W L A N _L E D # W LA N _L E D # 2 7, 3 4 0 . 1 u_ 1 6V _Y 5V _ 0 4 GN D E N/DS C I L I M0 C T L1 I L I M1 C T L2 N C 16 R 5 18 15 K _ 1 %_ 0 4 15 R 5 19 *1 0 K _0 4 9 C T L3 1 3 G _ OC # 0 1R 5 20 F A U L T# *0 _ 04 U S B _O C # 0 1 FOR AUDIO BOARD 22 T o S out h B rid ge O C P in. T P S 25 4 0 U S B V C C 01 M _PQ FP1 6 12 /1 4 De l Q 33 R Y -S P 1 55 H Y Y G 4 -1 14 I LI M _S E L 10 K _ 0 4 5 18 Q1 D TC 11 4 E U A 11 D P _ IN 4 R 5 14 S A T A _L E D # 12 OU T 22 0 _0 4 E U3 7 1 US B _ P N 1 17 C 69 3 1 u _6 . 3 V _ Y 5 V _ 04 4 22 0 _ 04 C U S B V C C 01 2 LED G ree n C 990 71 3 C VD D5 3 D5 HDD/CD-ROM 4 USB Charge PORT 1 R5 Y SG D1 WLAN/BT LED R6 1 A 2 2 0_ 0 4 Sheet 31 of 49 SATA ODD, LED, USB CHARGE PPAD B.Schematic Diagrams H1 8 H1 5 H 6 _0 D 2_ 3 H 6 _ 0D 2 _3 1.1A 60mils C 3 78 0 . 0 1u _ 1 6V _ X 7 R _ 04 J _A U D I O 1 CT L1 0 1 CT L2 CT L3 X 1 1 1 33 33 Dedic ated Char gin g Pot, Au to- de tect , Disab le USBp ort, Cha rg e cu rren t 1.5A 33 33 ? ? ? ? ? ? ? ? ? Char g ing Dow ns tream Po rt, BCSpe cificat ion 1.1, Supp ort USB 2.0, Charge curren t 1.5A US B _ P N1 US B _ P P 1 R 3 59 R 3 58 *0 _ 04 *0 _ 04 U S B 1 _P N 1 U S B 1 _P P 1 H E A D P H ON E -R H E A D P H ON E -L M I C 1 -R M IC1 -L M I C 1 -R M I C 1 -L R 2 68 R 2 72 22 0 _ 04 22 0 _ 04 H E A D P H ON E -R R H E A D P H ON E -L L 33 J D_ S E N S E S P K _ HP # 33 J D _ S E N S E _B U S B 1_ P N 1 U S B 1_ P P 1 33 33 S P K O UT R+ _ R S P K O U T R -_ R 1 2 3 4 5 6 7 8 9 10 11 12 13 14 8 72 1 3 - 14 0 0G U S B V CC 0 1 U S B V C C0 1 5V 100 MIL 5V U3 6 G_ OC # 01 100 MIL 2A 5 2 C 6 79 C 6 78 C 6 95 C6 9 4 C 69 6 3 0. 1 u _1 6 V _ Y 5 V _ 04 *2 2u _ 6 . 3V _ X 5 R _ 08 * 0 . 1u _ 1 6V _ Y 5 V _ 0 4 *0 . 1 u _1 6 V _ Y 5 V _0 4 * 1u _ 6 . 3V _ Y 5V _ 0 4 4 F L G # V OU T1 V IN 1 V OU T2 V IN 2 V OU T3 GN D *R T 9 7 15 B G S 3 5, 3 8 B - 32 SATA ODD, LED, USB CHARGE D D _ ON # 7 C6 8 0 C 6 77 8 *0 . 1 u _1 6 V _ Y 5 V _0 4 * 2 2u _ 6. 3V _ X 5R _ 08 1 EN # 2A 6 3 5 , 36 V DD5 2 5 , 28 , 2 9 , 35 , 3 7 , 38 , 4 1 5 V 1 1 , 18 , 2 7 , 30 , 3 4 , 35 , 3 6 , 37 , 4 1 , 42 V DD3 1 1, 1 8 , 2 4, 2 5 , 2 8, 3 2 , 3 3, 3 5 , 3 9, 4 0 5 V S 3 , 9 , 1 0, 1 1 , 1 2, 1 8 , 1 9, 2 0 , 21 , 2 2 , 23 , 2 4 , 25 , 2 7 , 28 , 3 0 , 32 , 3 3 , 34 , 3 5 , 39 3. 3 V S Schematic Diagrams HDMI, RJ45 GIGA LAN (JMC251C) LAN PORT 30 30 30 30 L MX 1 + L MX 1 - L42 LA N _M D I P 0 LA N _M D I N 0 LA N _M D I P 1 LA N _M D I N 1 L A N _ MD L A N _ MD L A N _ MD L A N _ MD IP 0 IN0 IP 1 IN1 12 11 9 8 L A N _ MD L A N _ MD L A N _ MD L A N _ MD IP 2 IN2 IP 3 IN3 6 5 3 2 T D4 T D4 + T D3 T D3 + MX 4 M X4 + MX 3 M X3 + 13 14 16 17 LM LM LM LM X1 + X1 X2 + X2 - 19 20 22 23 LM LM LM LM X3 + X3 X4 + X4 - 15 18 21 24 N MC N MC N MC N MC L MX 2 + L MX 2 - 1 4 L43 2 1 4 L44 FOR W/O LEVEL SHIFT D L MX 1 + I F W/ O U 6 Le ve l Shi ft , t hi s com po ne nt m usr s tu ff 3 D L MX 1 *W C M2 01 2 F 2 S -1 61 T 03 -s h ort 2 3 D L MX 2 *W C M2 01 2 F 2 S -1 61 T 03 -s h ort 3 .3 V S M CT 4 M CT 3 M CT 2 M CT 1 L MX 3 - T _4 T _3 T _2 T _1 7 5 _ 04 N MC T_ R 7 5 _ 04 7 5 _ 04 7 5 _ 04 R4 3 R3 1 R2 7 R2 6 G S T 50 0 9 LF C4 6 C3 7 C3 2 L MX 4 + 4 L45 3 D L MX 3 *W C M2 01 2 F 2 S -1 61 T 03 -s h ort 1 2 H D M I _C T R L C L K 1 D L MX 4 + 6 H D MI _ S C L -C 3 .3 V S L MX 4 - 4 L46 3 D L MX 4 *W C M2 01 2 F 2 S -1 61 T 03 -s h ort H D M I _C T R L D A T A 4 *0 . 01 u _ 16 V _ X 7R _ 04 12 /2 3 EM I? ? ? ? 3 T MD S _D A TA 0-L T MD S _D A TA 0# -L T MD S _C LO C K -L T MD S _C LO C K # -L TM TM TM TM DS _ D DS _ D DS _ D DS _ D A TA 2 # -L A TA 2 -L A TA 1 -L A TA 1 # -L RN2 7 *0 _8 P 4 R _ 0 4 5 4 6 3 7 2 8 1 T MD S T MD S T MD S T MD S _D _D _D _D A TA A TA A TA A TA TM TM TM TM DS _ D DS _ D DS _ C DS _ C A TA 0 -L A TA 0 # -L LO C K -L LO C K # - L RN2 8 *0 _8 P 4 R _ 0 4 5 4 6 3 7 2 8 1 T MD S T MD S T MD S T MD S _D _D _C _C A TA 0-R A TA 0# -R LO C K -R LO C K # -R H D MI _ S D A -C J _ RJ _ 1 GN D 1 GN D 2 12 /1 4 R 5 86 * 1 M_ 04 + + - H D M I _H P D Q 35 B * L2 N 7 0 0 2D W 1 T1 G 4 S DC DC DD DD 5 4 5 7 8 s h i el d s h i el d A TA A TA A TA A TA 2-L 2# -L 1-L 1# -L 3 2# -R 2-R 1-R 1# -R H D MI _ H P D -C Sheet 32 of 49 HDMI, RJ45 P J S -0 8 S O1 B -1 Main 6-21-B4040-008 45 44 21 21 H D MI C _ C 2 C N H D MI C _ C 2 C P H D MI C _ C LK C N H D MI C _ C LK C P C1 8 2 C1 8 1 0 . 1 u _1 0 V _ X7 R _ 0 4 H D M I C _ C LK C N _ C 48 0 . 1 u _1 0 V _ X7 R _ 0 4 H D M I C _ C LK C P _ C 47 HDM I_ CT RL CL K HDM I_ CT RL DA T A HDM I_ CT RL CL K H D M I _C TR L D A T A 9 8 OU T _ D 2 + O UT _ D2 - I N _D 3 + I N _D 3 - OU T _ D 3 + O UT _ D3 - I N _D 4 + I N _D 4 - OU T _ D 4 + O UT _ D4 - SC L SD A S C L_ S I N K S DA _ S IN K H PD HP D_ S IN K 7 H D MI _ H P D 3. 3 V S R 1 15 R 1 13 * 4. 7 K _ 0 4 * 0_ 0 4 OE # 25 DCC _ E N# 32 10 O E# ? ? ? SN7 5D P1 39 Ch an ge 3. 9K R 1 19 3 . 3V S R1 2 2 R1 2 4 3 . 9 K _ 04 *4 . 7 K _0 4 *4 . 7 K _0 4 P C0 P C1 RE X T OE _ 1 OE _ 2 3 4 6 34 35 VC VC VC VC VC VC VC VC D C C _E N # R T_ E N # PC 0 PC 1 R E XT O E _1 Q E _2 D CC_ E N # R1 2 1 4. 7 K _ 0 4 PC 0 R1 2 0 *4 . 7 K _0 4 PC 1 S N 7 5D P 1 39 P I N 4 9 = GN D 13 14 TM D S _ C L OC K # -R TM D S _ C L OC K -R 28 29 H D M I _ S C L -C H D M I _ S D A -C 30 HDM I_ HP D- C C 1 42 1 0 u_ 6 . 3 V _ X5 R _ 0 6 2 2 u _6 . 3 V _ X5 R _0 8 H OT P L U G D E T E C T +5V R 1 16 1 5 12 18 24 27 31 36 37 43 D D C / C E C GN D 16 SD A R E S E RV E D T MD S _C L OC K # 1 L12 2 T MD S _C L OC K *W C M2 0 12 F 2 S -1 61 T 0 3-s h o rt 0 . 1 u_ 1 6 V _Y 5V _0 4 0 . 1 u_ 1 6 V _Y 5 V _0 4 4 TM D S _ D A T A 1 -R 3 1 L10 T MD S _D A T A 1# T MD S C L OC K + 2 T MD S _D A T A 1 *W C M2 0 12 F 2 S -1 61 T 0 3-s h o rt 6 4 2 C 14 4 H D MI _ S C L-C 13 H D MI _ C E C 9 T MD S _ D A T A 0 # 7 T MD S _ D A T A 0 T MD S D A T A 0 TM D S D A T A 0+ T MD S D A T A 1 - A C AC AC A C A 12 /2 3 EM I? ? ? ? 1 4 L 11 2 T MD S _ D A T A 0 #-R 3 T MD S _ D A T A 0 -R * W C M 20 1 2 F 2S - 16 1 T0 3 -s ho r t 5 S HIE L D1 T MD S D A T A 1 + 3 T MD S _ D A T A 2 # 1 T MD S _ D A T A 2 1 2 T MD S _ D A T A 2 #-R T MD S D A T A 2 S H I E LD 2 TM D S D A T A 2+ 4 L9 3 T MD S _ D A T A 2 -R * W C M 20 1 2 F 2S - 16 1 T0 3 -s ho r t C 15 0 0 . 1 u_ 1 6 V _Y 5V _0 4 0 . 1 u_ 1 6 V _Y 5 V _0 4 5 VS C 14 5 17 15 11 10 8 TM D S _ D A T A 1 # -R H D MI _ H P D -C CL K S H IE L D S H I E LD 0 C 15 2 19 C EC 12 T MD S C L OC K - 3. 3 V S C 15 7 H D M I _ S D A -C S CL 14 10 0 K _ 04 TM D S _ C L OC K -R 2 11 15 21 26 33 40 46 D1 7 H D M I _ H P D -C H D M I _ S D A -C 12 /2 3 EM4I? ? ? 3? TM D S _ C L OC K # -R ? ? ? SN 75 DP 139 C 13 8 18 Q 3 5A * L 2N 70 0 2 D W 1 T 1G 0 . 1 u_ 1 6 V _Y 5V _0 4 1 6 D 4. 7 K _ 0 4 J _ H D MI 1 S R1 1 8 GN D [ 1 ] GN D [ 2 ] GN D [ 3 ] GN D [ 4 ] GN D [ 5 ] GN D [ 6 ] GN D [ 7 ] GN D [ 8 ] GN D [ 9 ] GN D [ 1 0 ] TM D S _ D A T A 0 # -R TM D S _ D A T A 0 -R G 3. 3 V S GN D ? ? ? C[1 ] C[2 ] C[3 ] C[4 ] C[5 ] C[6 ] C[7 ] C[8 ] TM D S _ D A T A 1 # -R TM D S _ D A T A 1 -R 16 17 49 21 19 20 D 18 H D MI _S C L- C R5 9 1 R 59 2 R5 9 3 R 59 4 0 . 1 u _1 0 V _ X7 R _ 0 4 H D M I C _ C 2C N _ C 0 . 1 u _1 0 V _ X7 R _ 0 4 H D M I C _ C 2C P _C OU T _ D 1 + O UT _ D1 - I N _D 2 + I N _D 2 - D1 9 *B A V 99 R E C T I F I E R *B A V 9 9 R E C TI F I E R *B A V 9 9 R E C T I F I E R 1 _ 04 C 12 8 17 -1 1 9A 5 - L P IN G ND 1 ~ 4 = G ND 12 /14 H D M I GN D 1 2/ 14 H D MI G N D _0 4 _04 _0 4 _ 04 C1 8 0 C1 7 9 I N _D 1 + I N _D 1 - R1 0 4 Fo r ES D *4 9 9_ 1 % * 49 9 _ 1% *4 9 9_ 1 % * 49 9 _1 % 42 41 5 V S _ H D MI _ I N GN D G ND GN D GN D 0 . 1 u _1 0 V _ X7 R _ 0 4 H D M I C _ C 1C N _ C 0 . 1 u _1 0 V _ X7 R _ 0 4 H D M I C _ C 1C P _C R4 1 3 2 . 2K _0 4 GN D 1 G ND 2 GN D 3 G ND 4 C1 7 8 C1 7 7 1_04 R 5 87 R5 8 8 R 58 9 R5 9 0 H D MI C _ C 1 C N H D MI C _ C 1 C P TM D S _ D A T A 2 # -R TM D S _ D A T A 2 -R _04 _0 4 _04 _0 4 H D MI C _ C 0 C N H D MI C _ C 0 C P 21 21 R 89 22 23 * 4 99 _ 1% *4 9 9_ 1 % * 49 9 _ 1% *4 9 9_ 1 % 39 38 21 21 21 21 21 21 0 . 1 u _1 0 V _ X7 R _ 0 4 H D M I C _ C 0C N _ C 0 . 1 u _1 0 V _ X7 R _ 0 4 H D M I C _ C 0C P _C C1 7 6 C1 7 5 R 41 1 2 . 2 K _ 04 5V S _ H D MI 5V S U6 2 12 /7 ? ? X7 R HDMI CONNECTOR A C FOR INTEL GRAPHIC C 5V S _H D M I 6- 03 -7 513 9- 03 0 3 0 DVD D 11 , 1 8 , 24 , 2 5 , 28 , 3 1 , 33 , 3 5 , 39 , 4 0 5 V S 3 , 9, 1 0 , 1 1, 1 2 , 1 8, 1 9 , 2 0, 2 1 , 2 2, 2 3 , 2 4, 2 5 , 2 7, 2 8 , 3 0, 3 1 , 3 3, 3 4 , 3 5, 3 9 3 . 3 V S HDMI, RJ45 B - 33 B.Schematic Diagrams D L MX 3 + D L MX 3 D L MX 4 + D L MX 4 - DA + DA DB + DB - _D _D _D _D D 1 2 3 6 3 . 3V S G D L MX 1 + D L MX 1 D L MX 2 + D L MX 2 - D *0 . 01 u _ 16 V _ X 7R _ 04 S *0 . 01 u _ 16 V _ X 7R _0 4 RN2 6 *0 _8 P 4 R _ 0 4 8 1 7 2 6 3 5 4 P_ C N_ C P_ C N_ C C5 3 2 C3 1 10 0 0 p_ 2 K V _ X7 R _ 1 2 _H 1 25 0. 0 1 u_ 1 6 V _X 7 R _ 0 4 H D MI C _ C 2C P _ C H D MI C _ C 2C N _ C H D MI C _ C LK C P _ C H D MI C _ C LK C N _ C 0C 0C 1C 1C Q3 3 B *L 2 N 7 00 2 D W 1 T 1 G G T CT 4 T CT 3 T CT 2 T CT 1 2 MX 2 M X2 + MX 1 M X1 + D *0 _0 4 T D2 T D2 + T D1 T D1 + MI C _ C MI C _ C MI C _ C MI C _ C Q3 3 A *L 2 N 7 00 2 D W 1 T 1 G S 10 7 4 1 T CT 4 T CT 3 T CT 2 T CT 1 D L MX 3 + 5 LA N _M D I P 2 LA N _M D I N 2 LA N _M D I P 3 LA N _M D I N 3 2 G 30 30 30 30 R5 1 1 T MD S T MD S T MD S T MD S HD HD HD HD D V DD L MX 3 + RN2 5 *0 _8 P 4 R _ 0 4 8 1 7 2 6 3 5 4 D L MX 2 + Schematic Diagrams AUDIO CODEC ALC269 CODEC (ALC269 & VT1802P) 1. 5 V R3 3 1 P V DD1 _ 2 R3 1 5 La y out note : GN D a nd AU DG spa ce i s 60 mi ls ~ 10 0mi ls 5 VS DV D D_ IO For 1 .5 V H DA Li nk. 3 .3 V S _ A UD R 26 7 * 15 m i l_ s h or t _0 6 * 0 _0 4 0_04 C 4 48 C 44 0 0 . 1 u _1 6 V _ Y 5 V _ 0 4 1 0 u _6 . 3 V _ X 5R _ 06 C 4 80 C 4 81 1 0 u _6 . 3 V _ X 5 R _ 0 6 0 . 1 u _1 6 V _ Y 5 V _ 0 4 V T1 80 2P C 4 47 * 0 . 1u _ 1 6 V _Y 5 V _ 04 5 VS_ AU D D 13 A 0 . 1 u _1 6 V _ Y 5 V _ 0 4 3 1 0u _ 6 . 3V _X 5 R _ 0 6 P D# H D A _ R S T# Sheet 33 of 49 AUDIO CODEC ALC269 AZ_RS T# For 1 .5 V HDA Link De - pop D Q2 2 *2 N 7 0 0 2 W G S P K OU T L + S P K OU T L - S D 5V S _A U D * 10 0 K _ 0 4 31 31 Q2 4 *B S S 13 8 _ N L G 40 41 E A P D _ MO D E Layout Note: 18 H DA _ S D IN0 18 HD A _ S DO UT 18 HD A _ B IT CL K 18 D M I C -D A T D M I C -C LK 2 3 10 u _ 6. 3 V _ X 5 R _ 0 6 R 3 16 3 3 _ 04 MI C 1 -L M I C 1 -R DIGITAL ANALOG 5 6-03-02695-030 B I T -C LK A Z _ S D IN0 _ R HD A _ S Y N C 8 S D A T A -I N A U DG C 5 13 11 M I C 1-V R E F O -L R ESET# P CB E E P 1 2 PC BEEP C 5 0 7 1 u _ 6 . 3V _X 5 R _ 0 4 42 43 1 0 0 p_ 5 0 V _ N P O _ 04 AVSS 1 AVSS2 4 .7 K _ 0 4 H D A _ R S T# B EEP_ R 31 R 36 1 C5 1 4 4 7 K_ 0 4 GN D R 36 0 S Y NC 26 37 F OR V OL UM N A DJ US T BEEP 13 S E NS E _ A R3 5 5 2 0 K _ 1% _ 0 4 14 15 L I N E 2 -L L I N E 2 -R R3 5 6 3 9 . 2K _1 % _ 0 4 16 17 MI C 2 _L MI C 2 _R 18 S E N S E -B 19 20 J DRE F MO N O -OU T 21 22 MI C 1 -L_ R C 5 1 1 MI C 1 -R _ R C 5 1 2 C5 0 9 C5 1 0 C6 4 9 * 1 0u _ 6 . 3 V _X 5 R _0 6 1u _ 6 . 3 V _ Y 5 V _ 04 D IG ITAL J D_ S E N S E H P -O U T -L H P -O U T -R CB P OP V E E 31 I N T_ M I C 2 NE AR C OD EC VT 18 02 P R 35 7= 5. 1K _1% _0 4 R3 5 7 C5 0 8 I N T _M I C 4 . 7 u _ 6. 3 V _ X 5 R _ 0 6 MI C 1_ L 4 . 7 u _ 6. 3 V _ X 5 R _ 0 6 MI C 1_ R VT 180 2P C4 8 2 0 . 1 u _1 6 V _ Y 5 V _ 0 4 C4 9 3 2 . 2 u _6 . 3 V _ Y 5 V _ 0 6 28 30 29 L D O_ C A P MI C 1 -V R E F O -R MI C 2 -V R E F O C4 7 9 C B N -A L 2 69 36 34 C B P - A LC 2 69 OP V E E -A L C 2 6 9 1K _0 4 2 1 VT 18 02 P 33 0P C2 8 2 6 80 p _ 5 0V _ X 7 R _ 0 4 V R E F -A L C 2 6 9 H E A D P H ON E -L H E A D P H ON E -R R1 7 4 AU DG L I N E 1 -L L I N E 1 -R 32 33 4. 7 K _ 0 4 J_ I N TM I C 1 27 35 1 VT 18 02 P 2. 2K _0 4 M I C 2 -V R E F O R 1 7 1 2 0K _ 1 % _ 04 * 10 0 p _5 0 V _ N P O_ 0 4 23 24 CB N 31 J D_ S E N S E _ B 4 . 7 u _ 6. 3 V _ X 5 R _ 0 6 4 . 7 u _ 6. 3 V _ X 5 R _ 0 6 88 2 6 6- 02 0 0 1 88 2 6 6- 2L 10 u VT 18 02 P R3 62 ,R 36 5= 75 _1% _0 4 V RE F L D O_ C A P MI C 1 -V R E F O-R M I C 2 -V R E F O 49 D 16 B A T5 4 C W GH A C 3 A LI N E 1 -L L I N E 1 -R S D A T A -OU T D VSS2 2 0. 1u _ 1 6V _Y 5 V _0 4 JD R E F MO N O -OU T G P I O0 -D MI C -D A T G P I O1 -D MI C -C L K PVSS 1 PVSS2 1 0 . 1u _ 1 6V _Y 5 V _ 04 S e n s e- B S P D IF C2 /E A P D S P D IF O 7 K B C _B E E P C5 0 4 LI N E 2 -L L I N E 2 -R 10 PC BEEP C4 9 4 MI C 2 -L M I C 2 -R 6 HD A _ S P K R C4 4 9 Se n s e A S P K -R S P K -R + 47 48 Au di o Co dec 34 5 VS L37 H C B 1 00 5 K F -1 2 1T 2 0 ANA LO G S P K -L + S P K -L - 44 45 S P K O U T R -_ R S P K O U T R +_ R Ve ry c lo se to 18 0 . 1 u_ 1 6 V _ Y 5 V _ 04 *1 0 u _6 . 3 V _ X 5R _ 06 25 38 1 4 PD # R 2 87 C 51 6 A U DG A V DD 1 A V D D2 B A T5 4 A W G H A * R B 7 5 1 S -4 0C 2 S VT 180 2P NC P IN H E A D P H O N E -L H E A D P H O N E -R C 4 54 M IC1 _ R M IC1 _ L 10 u _ 6. 3 V _ X 5 R _ 0 6 31 31 M I C 1 -V R E F O-L M I C 1 -V R E F O-R R3 6 2 R3 6 5 1K _0 4 1K _0 4 R3 6 6 R3 6 3 2. 2 K _ 0 4 2. 2 K _ 0 4 M I C 1 -R M I C 1 -L 31 31 AUD G VT 18 02 P R 36 3, R3 66 =4 .7K _1 %_ 04 12/8 2 . 2 u_ 6 . 3 V _ Y 5 V _ 0 6 C 4 60 A L C 26 9 Q-V B 5 -GR 2 . 2 u _ 6. 3 V _ Y 5V _ 0 6 3. 3VS _AUD A U DG A UD G 5 VS MI C 1 -V R E F O-L The rma l Pa d pla ce 9 V ia hole . 20 ms A Z_ RST# C4 2 8 1 0 00 p _ 50 V _ X 7 R _ 0 4 18 0 p _5 0 V _ N P O _ 04 3 .3 V S H E A D P H O N E -L H E A D P H ON E -R L28 F C M1 0 0 5K F -1 21 T 0 3 C4 2 7 R 28 2 * 22 0 K _ 0 4 8 52 0 4 -02 0 0 1 J_SPK1 2 1 E A P D _ MO D E G D R 2 88 2G S 18 0 p _5 0 V _ N P O _ 04 * 1 0K _0 4 Q 21 * N D S 3 52 A P Q 2 3A * L 2N 7 00 2 D W 1T 1 G 3 2 1 S P K OU TL -_ L EMI Require Pl e as e Let LC Filt e r toge the r a nd cl ose t o Codec .I F Spe a ke r w i re le ngth i s l es s t ha n 800 0m il s It don't ne e d the LC Fil te r. H ea dp ho ne An ti -P op C ir cu it J _S P K L1 A U DG R 26 6 R 28 1 * 4. 7 K _ 0 4 *1 0 K _ 0 4 D Q2 3 B *L 2 N 7 0 02 D W 1 T1 G 5G La yout note : Cl ose t o code c S 4 S P K OU TL - C 41 7 6 S PKOU TR + ,R- ,L+ ,L- Tra c e w idth S pe a k er 4 ohm- -- --- > 4 0mi ls S pe a k er 8 ohm- -- --- > 2 0mi ls LEFT 1 S pe a k er wi re le ngth l e ss t han 80 00 mil s , I t don't nee d LC Fil te r. L29 F C M1 0 0 5K F -1 21 T 0 3 S P K OU TL + _ L S S P K O UT L + P D# D B.Schematic Diagrams C D VDD 1 U 19 D1 1 0 . 1 u_ 1 6 V _ Y 5 V _ 04 0. 1 u _ 1 6V _ Y 5V _0 4 1 0 K _ 04 E A P D _ MO D E *1 0 m il _ s ho rt _ 0 4 C 49 5 R 28 3 A 39 46 C 2 *1 0 m il _ s ho rt _ 0 4 J P2 C4 6 2 PV DD 1 P V D D2 H D A _ R S T# KBC_ M UT E# ? ? ? 5V S _A U D C4 3 9 9 1 18 34 C 4 46 D V D D -I O 12/8 ? ? H C B 10 0 5 K F -1 21 T 2 0 C4 4 1 3 .3 V S L 30 3 .3 V S _ A UD H C B 1 0 0 5K F -1 21 T 2 0 AZ_ RST# For 3. 3V HDA Li nk De -pop L38 J P1 For 3 .3 V H DA Li nk. PD# C ont rol EMI Require C 4 42 * 1 0u _ 6 . 3V _X 5 R _ 0 6 12/21 DEL A UD G A UD G 3, 6 , 9 , 1 0 , 2 5, 2 9 , 3 5 , 37 , 3 8 1 . 5 V 1 1 , 1 8 , 24 , 2 5 , 2 8, 3 1 , 3 2 , 35 , 3 9 , 4 0 5 V S 3 , 9 , 1 0 , 1 1, 1 2 , 1 8 , 19 , 2 0 , 2 1, 2 2 , 2 3 , 24 , 2 5 , 2 7, 2 8 , 3 0 , 31 , 3 2 , 3 4, 3 5 , 3 9 3 . 3 V S B - 34 AUDIO CODEC ALC269 Schematic Diagrams KBC-ITE IT8518E K B C_ AV D D L 22 H C B 1 00 5 K F -1 2 1T 2 0 V D D3 C 4 43 0 . 1 u_ 1 6 V _Y 5 V _0 4 10 u _ 6. 3 V _ X 5R _ 06 0 . 1 u_ 1 6 V _Y 5 V _0 4 0 . 1 u _ 16 V _ Y 5 V _ 0 4 C4 9 8 0 . 1 u_ 1 6 V _Y 5 V _0 4 10 9 8 7 13 6 5 22 P CL K _ K B C K BC_ W R E S E T # 14 23 W LA N _ E N K B C _ MU TE # 1 8 ME _ W E 2 8 CP U _ F A N C R I T_ T E MP _ R E P # 42 2 T H E R M_ V O L T 4 2 T O TA L _ C U R 2 7 3 G _D E T # 2 8 CC D_ DE T # 16 16 4 2 S M C_ B A T 4 2 S M D_ B A T S M C _ V GA _ T H E R M S M D _ V GA _ T H E R M R 2 46 10 _ 04 CC D_ DE T # MO D E L _ I D S MC _B A T S MD _B A T S MC _V GA _ T H E R M S MD _V GA _ T H E R M S M C _ C P U _ TH E R M _ R S MD _C P U _ T H E R M_ R 1 10 1 11 1 15 1 16 1 17 1 18 LC D _ B R I GH TN E S S 24 25 28 29 30 31 32 34 33 K B C_ B E E P 3 1 L E D _S C R O LL # 3 1 L E D _ NUM # 31 LE D _ C A P # 2 8 L E D_ B AT _ CHG 2 8 L E D_ B A T _ F UL L 2 8 L E D_ PW R 37 8 0C L K B T _D E T # 2 7 3 IN1 d GP U _ P W R _ E N # 2 8 T P_ CL K 2 8 T P _ DA T A 27 11 C 0 / GP C 1 / GP C 2 / GP C 3 / GP C 4 / GP C 5 / GP C 6 / GP C 7 / GP IT8518 6-03-08518-0P2 FLASH I0 I1 I2 I3 I4 I5 I6 I7 F LF R A M E #/ G P G2 F LA D 0 / S C E # F L A D1 /S I F LA D 2 / S O F L A D 3/ G P G6 F L C LK / S C K ( P D )F L R S T # / W U I 7 / G P G0 / T M GPIO C L K 0 / GP B D A T 0 / GP B C L K 1 / GP C D A T 1 / GP C C L K 2 / GP F D A T 2 / GP F ( P D )K S O 1 6/ G P C 3 ( P D )K S O 1 7/ G P C 5 3 4 1 2 6( P U ) 7( P U ) ( ( ( ( ( ( ( ( PWM PW M PW M PW M PW M PW M PW M PW M PW M 0 / GP A 0 ( 1 / GP A 1 ( 2 / GP A 2 ( 3 / GP A 3 ( 4 / GP A 4 ( 5 / GP A 5 ( 6 / GP A 6 ( 7 / GP A 7 ( PU PU PU PU PU PU PU PU ) ) ) ) ) ) ) ) LK 0 / G A T0 / G LK 1 / G A T1 / G LK 2 / G A T2 / G PF0 ( PF1 ( PF2 ( PF3 ( PF4 ( PF5 ( D D D D D D D D )G )G )G )G )G )G )G )G PH0 /ID0 PH1 /ID1 PH2 /ID2 PH3 /ID3 PH4 /ID4 PH5 /ID5 PH6 /ID6 P G1 / I D 7 ( P D )E GA D / GP E 1 ( P D )E GC S # / GP E 2 ( P D )E GC L K / GP E 3 WAKE UP PU PU PU PU PU PU ( P D )W U I 5 / GP E 5 ( P D )LP C P D #/ W U I 6 / GP E 6 ) ) ) ) ) ) PWM/COUNTER ( P D )T A C H 0/ G P D 6 ( P D )T A C H 1/ G P D 7 ( P D ) TM R I 0 / W U I 2/ G P C 4 ( P D ) TM R I 1 / W U I 3/ G P C 6 WAKE UP PW R SW /G PE4 ( PU ) CIR R I 1# / W U I 0 / GP D 0( P U ) R I 2# / W U I 1 / GP D 1( P U ) ( P D )C R X/ G P C 0 ( P D )C T X / GP B 2 GP INTERRUPT 33 P P P P P P P P EXT GPIO PS/2 PS2 C PS2 D PS2 C PS2 D PS2 C PS2 D 18 21 P W R _B T N # J2 J3 J4 J5 SMBUS SM SM SM SM SM SM 1 25 3 G_ E N 35 P W R_ S W # 1 1, 2 8 L I D _S W # 20 AD AD AD AD AD AD AD AD 85 86 87 88 89 90 27 27 PJ 0 PJ 1 A C 2 / GP A C 3 / GP A C 4 / GP A C 5 / GP ADC 66 67 68 69 70 71 72 73 B A T _D E T B A T _V OL T 4 2 B AT _ DE T B A T_ V O LT K S O0 / P D 0 K S O1 / P D 1 K S O2 / P D 2 K S O3 / P D 3 K S O4 / P D 4 K S O5 / P D 5 K S O6 / P D 6 K S O7 / P D 7 K S O8 / A C K # K S O9 / B U S Y K S O1 0 / P E K S O 1 1/ E R R # K S O 12 / S L C T K S O 13 K S O 14 K S O 15 DAC G G D D D D K S I 0/ S TB # K S I1 /A F D# K S I 2 / I N I T# KS I3 /S L IN# KSI4 KSI5 KSI6 KSI7 K/B MATRIX E C S CI# /G PD3 ( P U ) E C S MI # / G P D 4 ( P U ) 76 77 78 79 80 81 ( P D )L 8 0 H L A T / GP E 0 K B -S I 0 K B -S I 1 K B -S I 2 K B -S I 3 K B -S I 4 K B -S I 5 K B -S I 6 K B -S I 7 4 5 6 8 11 12 14 15 K B -S I 0 K B -S I 1 K B -S I 2 K B -S I 3 K B -S I 4 K B -S I 5 K B -S I 6 K B -S I 7 4 5 6 8 11 12 14 15 36 37 38 39 40 41 42 43 44 45 46 51 52 53 54 55 K B -S O0 K B -S O1 K B -S O2 K B -S O3 K B -S O4 K B -S O5 K B -S O6 K B -S O7 K B -S O8 K B -S O9 K B -S O1 0 K B -S O1 1 K B -S O1 2 K B -S O1 3 K B -S O1 4 K B -S O1 5 1 2 3 7 9 10 13 16 17 18 19 20 21 22 23 24 K B -S O0 K B -S O1 K B -S O2 K B -S O3 K B -S O4 K B -S O5 K B -S O6 K B -S O7 K B -S O8 K B -S O9 K B -S O1 0 K B -S O1 1 K B -S O1 2 K B -S O1 3 K B -S O1 4 K B -S O1 5 1 2 3 7 9 10 13 16 17 18 19 20 21 22 23 24 100 101 102 103 104 105 106 3 G_ P OW E R _ E N K B C_ S P I_ CE # K B C_ S P I_ S I K B C_ S P I_ S O R3 5 1 * 0 _0 4 C4 9 9 VER:C VSS VSS VSS VSS VSS VSS VSS AVSS CLOCK C CD_ E N SU SB# S U S C# 93 94 95 96 97 98 99 107 CK 3 2 K E C K 32 K RX VO LT AGE R1 63 10 K/ R 17 1 X 3 .3 V R1 63 X /R 17 1 10 K 0V R 23 5 M OD EL_ ID 1 0 K _ 04 R 24 4 V D D3 * 10 K _ 0 4 RX Sheet 34 of 49 KBC-ITE IT8518E V D D3 27 3 G _D E T # C CD _ DET # R 24 5 R 23 6 S MC _ C P U _ T H E R M_ R S MC _ C P U _ T H E R M_ R S MD _ C P U _ T H E R M_ R R 28 4 R 28 9 R 29 2 28 P CL K _ K B C * 10 K _ 0 4 1 0 K _ 04 4 3_ 1 % _0 4 *0 _ 04 *0 _ 04 H_ P E C I 3 ,2 3 S M C_ CP U_ T HE R M S M D_ CP U_ T HE R M 19 19 * 10 _ 0 4 C P U_ F A NS E N SHO RT C 37 0 * 10 p _ 50 V _ N P O_ 04 1u _ 6 . 3 V _Y 5 V _0 4 *1 u _6 . 3 V _ Y 5 V _ 0 4 KBC_SPI_*_R = 0.1"~0.5" 0 . 1 u _1 6 V _ Y 5 V _ 0 4 32 Mb it C3 8 1 S P I _ V D D _1 8 R 2 42 K B C_ F L A S H 1 K _0 4 3 R 2 57 K B C_ HO L D# 4 . 7K _ 0 4 7 U1 6 V DD 3 5 K B C_ S PI_ SI_ R R 26 5 4 7 _ 04 2 K B C _ S P I _ S O_ R R 27 0 1 5 _ 1% _ 0 4 K B C _ S P I _ S O 1 K B C_ S P I_ CE # _ R R 26 1 1 5 _ 1% _ 0 4 K B C _ S P I _ C E # 6 K B C_ S PI_ SCL K _ R R 27 3 4 7 _ 04 SI SO W P# C E# S CK 28 P M _P C H _ P W R OK A L L _S Y S _ P W R GD C 50 6 C 38 3 T OT A L _ C U R NC 3 H OL D # VSS 4 P C T 2 5 V F 0 32 B 6-04-25032-491 120 124 P C LK _ K B C _ R B A T _ V OL T V D D3 R S MR S T# 20 K B C _R S T # 2 3 47 48 R3 4 0 6 , 2 0, 2 9 , 3 5 2 0 ,3 8 d GP U _ R S T # 1 2 H _P R OC H O T# _ E C 35 17 20 1 1, 2 0 , 3 9 K B C_ SP I_ S I K B C_ SP I_ S CL K 2'rd 6-04-02532-490 6-04-25320-490 12 /8 ? ? ? B OM ? ? ? ? 119 123 Co-lay SPI ROM PM E# 19 2 128 V ER . V 1. 0 MO D E L _ I D S U S _P W R _ A C K 2 0 B T _ E N 2 7, 3 1 B K L_ E N 1 1 HSP I_ C E# 1 8 H S P I_ S CL K 1 8 H S P I _ MS O 1 8 H S P I _ MS I 18 D D _ ON 3 1 , 35 , 3 6 82 83 84 S W I# 2 2, 30 U1 5 8 V DD 5 K B C _S P I _S I _R 2 K B C _S P I _S O _ R 1 K B C _S P I _C E # _R 6 K B C _S P I _S C L K _ R SI 20 SO C H G_ R S T CK 3 2 K E C K 3 2 KR 3 38 * 0 _0 4 42 K BC_ F L AS H ? ? ? R3 3 9 * 1 0M _0 4 X 10 *3 2 . 7 68 K H z 1 4 2 3 N B _E N A V D D IC PPE# 2 3 3 W P# 11 , 2 1 C E# S CK K BC_ HO L D# 7 12/06 ? ? ? ? 4 H OL D # VSS *M X2 5 L 32 0 5 D M 2I -1 2 G A C A - S P I -0 04 -T 0 3 0 . 1 u_ 1 6 V _Y 5 V _0 4 R3 4 9 B R I GH T N E S S Board? ? EC MODULE CHOOSE (FOR DIFFERENCE K/B TYPE) EC_ V SS NC 2 11 1 u _ 6. 3 V _ Y 5 V _ 0 4 K B C _ S P I _ S C LK 56 57 75 I T8 5 1 8E K B C _W R E S E T # J _K B 2 * 8 52 0 1 -24 0 5 1 58 59 60 61 62 63 64 65 ( P D )R I N G# / P W R F A I L #/ L P C R S T # / GP B 7 1 12 27 49 91 1 13 122 UART R XD / GP B 0( P U ) T X D/G P B 1 ( P U ) R 34 8 S P I _ V D D _1 LPC/WAKE UP G I N T / GP D 5 ( P U ) 1 08 1 09 24 J_KB1 FOR W250HPQ FOR W270HU 112 2 7, 3 1 W L A N _ LE D # 2 7 W L A N _D E T # 1 R3 4 1 C 5 05 S H OR T *1 0 m li _ s ho rt _ 0 4 L C D _ B R I G H T N E S S * 0 . 1u _ 1 6V _Y 5V _0 4 * 1 0m i l _s h o rt _0 4 C 4 96 C4 9 7 * 1 5p _ 5 0V _ N P O_ 0 4 *1 5 p _5 0 V _ N P O _0 4 K B C _ A GN D 1 1, 18 , 2 7 , 30 , 3 5 , 36 , 3 7 , 4 1, 4 2 3 , 9, 10 , 1 1 , 12 , 1 8 , 19 , 2 0 , 2 1, 2 2 , 2 3, 2 4 , 2 5, 27 , 2 8 , 30 , 3 1 , 32 , 3 3 , 3 5, 3 9 V D D3 3 .3 VS KBC-ITE IT8518E B - 35 B.Schematic Diagrams 27 33 LPC G A 2 0/ G P B 5 K B R S T #/ GP B 6 ( P U ) P W U R E Q # / GP C 7( P U ) L 8 0L L A T / GP E 7( P U ) 23 15 S M I# S C I# 0 1 2 3 CL K A ME # IRQ RS T # /W UI4 /G P D2 ( PU ) *0 . 1 u _1 6 V _ Y 5 V _ 04 J _K B 1 8 5 2 01 -2 4 05 1 W R ST# 1 26 4 16 20 2 3 G A2 0 4 2 A C _I N # 2 8 L E D_ ACIN 2 0 , 2 2 A C _P R E S E N T 23 23 L AD L AD L AD L AD L PC LFR SER L PC C3 6 7 *0 . 1 u _1 6 V _ Y 5 V _ 0 4 C 50 0 VST BY VST BY VST BY VST BY VST BY VST BY 1 8 , 28 LP C _ A D 0 1 8 , 28 LP C _ A D 1 1 8 , 28 LP C _ A D 2 1 8 , 28 LP C _ A D 3 2 2 P CL K _ K B C 18 , 2 8 L P C _F R A ME # 1 8 ,2 8 S E R IRQ 2 2 , 27 , 2 9 , 3 0 B U F _ P L T _ R S T # VCC U 17 C3 8 2 0 . 1 u _1 6 V _ Y 5 V _ 0 4 1 0 0 K _0 4 26 50 92 1 14 121 1 27 E C _V C C 3 .3 V S V D D3 C 3 68 K B C_ A G ND 3 H C B 1 0 05 K F -1 2 1 T2 0 VBAT L3 6 V DD 3 C 5 01 74 C4 5 5 AVC C C 4 70 0 . 1 u_ 1 6 V _ Y 5V _ 0 4 C3 8 6 Schematic Diagrams 5VS, 3VS, 3.3VM, 1.5VS CPU SYS3 V VIN V IN VDD 3 V IN P R 11 2 P U6 P R8 1 VA *1 2 K _ 04 0. 1 u _ 50 V _ Y 5 V _ 06 0. 1 u _ 50 V _ Y 5 V _ 06 V IN 28 PR 9 8 M _ B TN # 1 K_ 0 4 12/8 ? ? ? 8 VA V IN1 2 V IN 1 7 V IN P R 80 D D _ ON _L A T C H 3 6 M _B TN # 4 D D _O N # P W R_ S W # P W R_ S W # P W R_ S W # 5 I N S T A N T -ON 1 0 K _0 4 *1 0 0K _0 4 1 K _ 0 4 D D _ ON 6 1 P C1 1 1 P R 1 14 1 K_ 0 4 G ND 3 1 , 3 4, 3 6 D D_ O N# D 34 P 28 0 8 B 0 3 1 ,3 8 P C 10 4 2G D D _ ON * 0. 1 u _ 16 V _ Y 5 V _ 0 4 1 P R9 7 P C1 0 6 S P Q 27 A L2 N 70 0 2 D W 1 T 1G P R 11 3 1 0 0K _ 0 4 EMI 3.3V NM O S 5V NMOS S Y S 1 5V P Q6 6 A MT N N 20 N 03 Q 8 2 1 PR2 3 8 V D D3 8 7 5V P Q 64 A M TN N 2 0 N 0 3 Q8 2 1 P R 23 6 3A P R 11 1 1 0 K _0 4 1 M_ 0 4 SU SB 3 4 3. 3V _ E N 1 P Q 64 B MT N N 20 N 03 Q 8 5 V _E N 1 4 S US B 3 Power Plane 1M _ 04 P Q 66 B M TN N 2 0 N 0 3 Q8 6 , 2 0 , 2 9, 3 4 P C 20 3 5 P C 2 06 D SU SB# D D _ ON # S P Q 27 B L 2 N 7 0 02 D W 1T 1 G 3, 3 7 , 3 8 P C 10 3 5G * 0. 1 u _ 16 V _ Y 5 V _ 0 4 2 20 0 p _ 50 V _ X 7R _ 04 D D _ ON # 6 5 6 1 22 0 0 p_ 5 0 V _X 7 R _ 0 4 P J1 1 ON *4 0 mi l ON 2 ON 1.05VS_VTT ON 3.3VS NMOS S Y S 1 5V V D D3 5 VS 8 7 1. 0 5 V S _ V T T 3. 3 V S P R2 3 3 P C 20 2 5 4 70 0 p _ 50 V _ X 7R _ 04 3, 3 7 , 3 8 P Q6 3 B M T N N 2 0 N 0 3 Q8 6 1 SU SB 3 1. 05 V S _ V T T _E N 1 PJ 1 0 P C1 9 0 2 2 0 0 p_ 5 0 V _X 7 R _ 0 4 P Q 58 B MT N N 2 0N 0 3Q 8 P Q 26 5 12/13 ? BUG_18 P Q5 7 B M TN N 2 0 N 0 3 Q8 G S US B 5 5 S M TN 7 00 2 Z H S 3 6 12/13 ? BUG_18 P R2 3 2 *1 0 0_ 0 4 6 2 * 40 m i l P C 1 91 6 33 0 0 p_ 5 0 V _X 7 R _ 0 4 1 M _0 4 4 4 P Q 65 B MT N N 2 0 N 0 3Q 8 PC2 0 4 P R 1 10 7 5 _ 04 0 . 1 u_ 1 6 V _ Y 5V _0 4 3. 3V S _ E N 1 0. 1u _ 1 6V _ Y 5V _ 0 4 P C1 9 3 P C2 0 8 1 0 u_ 6 . 3 V _ X 5 R _ 06 3 5 V S _E N 1 P C 20 7 1 M_ 0 4 3 . 3V S _L O P R 23 9 P C2 0 5 0. 1 u _ 16 V _ Y 5 V _ 0 4 PR2 3 7 1M _ 04 10A 10 u _ 6. 3V _ X 5 R _ 0 6 P Q 65 A M TN N 2 0 N 0 3 Q8 8 2 7 1 M TN N 2 0 N 0 3 Q8 2 1 P Q 58 A M TN N 2 0 N 0 3 Q8 8 2 7 1 SYS1 5 V D V DD 5 8 7 3 SYS1 5 V P Q6 3 A MT N N 20 N 03 Q 8 2 1 P Q 57 A NM OS 4 NMO S 1. 0 5 V S 3 5VS 4 Sheet 35 of 49 5VS, 3VS, 3.3VM, 1.5VS CPU 3. 3 V 3A Power Plane 3 8 7 S Y S 3V 4 V DD 5 V D D3 ON ON 1.5VS_CPU PJ 5 PJ7 MUST SHORT 2 S Y S 1 5V 1 M_ 0 4 20 P C 98 P C9 5 1 . 0 5V S _V T T _ E N P R 1 09 1 0 0 _0 4 *1 0 u_ 6 . 3 V _ X5 R _0 6 S US B G P Q1 4 *M TN 7 00 2 Z H S 3 P C 93 D 2 20 0 p _ 50 V _ X 7R _ 04 G5 ON S 4 S *2 20 0 p _5 0 V _ X 7R _ 04 1 . 5V S _L O *0 . 1 u_ 1 6 V _ Y 5 V _ 04 1 .5 V S _ E N1 6 P C1 8 8 P Q1 5 B * MT N N 2 0N 0 3Q 8 B - 36 5VS, 3VS, 3.3VM, 1.5VS CPU G 1 . 0 5 V S _ V TT _ E N # 3 6 S Y S 3V 4 2 VA 3 6 V IN1 3 1, 3 6 V D D 5 2 4 1 .5 V S 3 , 6 1 . 5V S _C P U 11 , 3 6 , 3 7 S Y S 15 V 2 5, 2 8 , 2 9 , 31 , 3 7 , 38 , 4 1 5 V 1 8, 1 9 , 2 0 , 24 , 2 5 , 37 , 3 8 1 . 0 5 V S 11 , 3 6 , 37 , 3 8 , 3 9, 4 0 , 4 1, 42 V IN 3 , 6 , 9 , 10 , 2 5 , 2 9, 3 3 , 3 7, 3 8 1 . 5 V 1 1, 1 8 , 2 7 , 30 , 3 4 , 36 , 3 7 , 4 1, 4 2 V D D 3 1 1 , 18 , 2 4 , 2 5, 2 8 , 3 1, 3 2 , 3 3 , 39 , 4 0 5 V S 2, 3 , 5 , 2 3 , 24 , 2 5 , 37 , 3 9 1 . 0 5 V S _ V TT 2, 3 , 8 , 1 1 , 16 , 1 8 , 19 , 2 0 , 2 2, 2 3 , 2 4, 25 , 2 7 , 28 , 2 9 , 3 0, 3 7 , 3 8, 3 9 3 . 3 V 3, 9 , 1 0 , 1 1, 1 2 , 1 8, 19 , 2 0 , 21 , 2 2 , 2 3, 2 4 , 2 5, 2 7 , 2 8 , 30 , 3 1 , 32 , 3 3 , 3 4, 3 9 3 . 3 V S S *1 0 0 _0 4 1 0 u_ 6 . 3 V _ X 5 R _ 06 P C1 8 6 PC5 1 5 P R 10 8 200mA 2G S US B 1 4 3 *1 M_ 0 4 1 .5 V S _ CP U E N1 P R5 8 10 K _ 0 4 12/7 1. 5 V S 3 8 7 P Q1 5 A *MT N N 2 0 N 0 3 Q8 2 1 D 1. 5 V S _ C P U _ L O PR5 9 1 .5 V *OP E N -8 m m SYS1 5 V P Q 24 P 2 7 03 B A G 6 5 2 4 1 0. 1 u _ 16 V _ Y 5 V _ 0 4 1 R3 4 5 1.5VS NMO S 15A D 1 .5 V S _ CP U NMOS 3 1 .5 V 6 B.Schematic Diagrams SYS1 5 V ON ON P Q2 5 B L2 N 70 0 2 D W 1 T 1G ON ON D P Q2 5 A L 2N 70 0 2 D W 1 T 1 G S Q 28 M TN 7 00 2 Z H S 3 Schematic Diagrams VDD3, VDD5 V R E F _ V DD P R 93 * 0 _0 4 PR9 4 0_04 12 /17 PWR CHANGE PC 7 5 1 u_ 1 0 V _ Y 5 V _ 0 6 VFB 1 T ON S E L VF B2 PR 9 9 E N _ 3V P R9 6 E N _5 V P C 82 1 0 0K _0 4 P C8 0 1 00 0 p _ 50 V _ X 7 R _ 0 4 1 0 0 K_ 0 4 4. 7 u _ 2 5V _X 5 R _0 8 V O2 2 E N1 VF B1 VR EF 1 3 P C8 1 8 12/8 ? ? ? BOM? ? ? ? P C 19 8 uP6182 21 UG A T E 2 UG A T E1 PHA S E 2 P HA S E1 0 . 1 u _ 50 V _ Y 5V _0 6 0 . 1 u _ 1 0V _ X 7 R _ 0 4 UG A T E 1 7 20 P HA S E 1 19 L GA T E 1 1 GN D P A D G ND 12/22 EMI? ? ,? noise? ? 0_ 0 4 P R 10 5 *0 _ 04 M E 4 4 10 A D -G V IN_ 6 1 8 2 SK IP S EL VR EG 5 R B 0 54 0 S 2 P R1 0 2 *0 _ 04 C C 5 6 7 8 A A * SK3 4 SA 18 17 16 25 15 C PR 1 0 4 P R 10 3 0_04 *0 _ 0 4 P R1 0 6 2. 2 _ 0 6 M9 90 12 5 *5 . 1 _0 6 *2 2 0p _ 5 0 V _N P O _0 4 1 SY S5 V 3 C A 2 S Y S 1 0V 0 . 0 1 u_ 5 0 V _ X7 R _ 04 V R E G5 PD 9 C VI N PC 9 2 P C2 1 2 P D 10 G H 1 2/17 PWR CHANGEB A T 54 S W A P C9 1 V IN1 VDD5 SY S5 V 5A 1 Ra V DD 5 P J2 7 2 *OP E N -5 m m PR 9 5 3 0 K _ 1% _ 0 6 1 2 3 V CL K L DO 5 V IN S K IP S E L E N0 13 V R E G5 P R 10 7 P L 13 T MP C 0 6 03 H -4 R 7 M- Z 0 1 2 P+C 1 0 0 P R2 4 3 A C S OD 1 40 S H 4 * 6 80 K _ 1 % _ 0 4 12/17 PWRCHANGE VR EF _ VDD 4 . 7 u _2 5 V _ X 5R _ 0 8 P D2 4 P Q6 1 P R1 0 1 EN _ AL L P C 1 97 4. 7u _ 2 5 V _ X5 R _0 8 4 PD6 C R B 0 5 40 S 2 9/6 EMC DVT request L G AT E1 PD 7 A V R E G5 14 6 5 C C PR2 4 2 LG A T E 2 P+C 9 9 PC1 9 9 P Q6 2 ME 4 4 1 0 A D -G 4 1 2 3 12 P Q5 9 B P D 1 5 0 3Y V S 3 P C2 1 1 1 0 0p _ 5 0 V _ N P O _ 04 2 0K _1 % _ 0 4 * 22 0 p _ 50 V _ N P O_ 0 4 2 2 0u _ 6 . 3 V _ 6 . 3* 6 . 3* 4 . 2 P R 92 L G AT E2 SYS5 V 1 2/17 PWR CHANGE B O OT 1 1 00 0 p _ 50 V _ X 7 R _0 4 1 3K _1 % _ 0 6 11 * 10 K _ 0 4 P D2 3 PC 7 7 P D 25 P C 1 01 P R 91 * 5. 1 _ 0 6 0 . 1 u _1 6 V _ Y 5V _ 0 4 + P D 26 P C2 0 0 P HA S E 2 P C8 5 B O OT 1 PC7 8 *O P E N -5 m m 10 P R 10 0 PO K 22 Rb PR 8 9 1 9 . 1 K _1 % _ 0 6 +P C 1 0 2 P C 2 01 0 . 1 u _1 6 V _ Y 5 V _ 0 4 Sheet 36 of 49 VDD3, VDD5 12/22 EMI? ? ,? noise? ? P C9 4 P C 90 A 4 . 7 u _2 5 V _ X 5 R _ 0 8 1 u _1 0 V _ Y 5 V _ 0 6 P C8 8 R B 0 5 4 0S 2 PD 8 B A T 54 S W G H A 1 3 C A 2 2 2 0 0 p_ 5 0 V _ X7 R _ 04 S YS1 5 V 0 . 0 1 u _ 50 V _ X 7 R _ 0 4 P C8 9 2 2 0 0 p_ 5 0 V _ X7 R _ 04 VR EG 5 EN_ 3 V 5 V P R 86 * 0_ 0 4 E N_ 3 V P R 88 R1 8 6 3 1 0 K _0 4 1 4 D G D D_ O N PJ 8 *4 0 m i l MT N 7 0 0 2 Z H S 3 S PR 8 7 P C 73 AC _ IN 6 42 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 D 1 2 S 3 1, 3 4 , 3 5 P Q 19 B L 2 N7 0 0 2 DW 1 T 1 G 5G D D _O N _ E N _ V D D P Q1 8 E N_ 5 V * 10 m i l _s h o rt _ 04 D S P Q1 9 A L 2N 7 00 2 D W 1 T1 G 1 00 K _ 0 4 2G Support Intel V-Pro Function 3 5 SY S3 V 35 VIN 1 31 , 3 5 V D D 5 1 1 , 3 5 , 37 S Y S 15 V 1 1, 3 5 , 3 7 , 3 8, 3 9 , 4 0 , 4 1, 4 2 V IN 1 1, 18 , 2 7 , 3 0, 34 , 3 5 , 3 7 , 41 , 4 2 V D D 3 VDD3, VDD5 B - 37 B.Schematic Diagrams PL 1 4 T M P C 0 6 0 3H -4 R 7 M -Z 0 1 2 1 5A 1 A *S K 3 4S A SYS3 V P J 26 2 0. 1u _ 1 0 V _ X7 R _0 4 U GA TE 2 23 PO K 9 B OO T 2 8 CS O D1 4 0 S H A VDD 3 LD O3 1u _ 1 0V _Y 5 V _ 0 6 P C8 3 B OO T2 12/8 ? ? ? BOM? ? ? ? 5 6 7 8 P Q 59 A P D 15 0 3 Y V S 2 1 VDD3 ? ? ? ? ? ? V IN 24 VO 1 * 15 u _ 2 5V _6 . 3 *4 . 4 4 . 7 u _ 25 V _ X 5 R _ 0 8 7 * 1 5u _ 2 5 V _ 6. 3 * 4. 4 PC1 9 5 2 2 0 u _6 . 3 V _ 6 . 3 *6 . 3 *4 . 2 PC 8 4 VF B2 E N2 12/8 change to 0603 VI N 4 PU 7 V RE G 3 TO N SEL 6 5 1 0 00 p _ 5 0V _ X 7 R _ 0 4 Schematic Diagrams Power 0.85VS, 1.8VS, PEX VDD PEX_VDD NM O S ? ? ? ? PIN6? PC1 9 PR 1 4 1 0 0 _0 4 1 0u _ 6 . 3V _X 5 R _ 0 6 4 5 9 7 *1 0 m li _ s ho rt _ 0 4 P O K _ 6 61 0 R1 7 6 V 1 .8 2 . 2u _ 6 . 3 V _Y 5 V _ 06 6 V IN V IN P OK 5V 6 P R 68 1 0 K_ 0 4 SU SB GN D 2 VFB V F B _ 6 61 0 P R 7 3 PC 6 5 GS71 13 P C5 5 PC 5 6 0 . 1 u _ 16 V _ Y 5 V _ 0 4 1 0 u _6 . 3 V _ X 5R _ 06 8 2 p _ 50 V _ N P O_ 0 4 12/14 ? ? 8 7 P R 45 P Q7 A MT N N 2 0 N 0 3 Q8 2 1 F B V D DQ 12/20 ? ? PC 5 0 P C4 3 0 . 1 u _1 6 V _ Y 5 V _ 0 4 1 0u _ 6 . 3V _X 5 R _ 0 6 PR 5 1 3 F B V D D Q _P W R _ E N Vout= 0.8*(PR73+PR72)/PR72=1.84V F B V DD Q 1 M_ 0 4 V IN 6 41 P R 1 76 9 . 1 K _ 1% _ 0 4 P Q7 B MT N N 2 0 N 0 3 Q8 P R 17 5 1 0 . 7K _1 % _ 04 A P R1 6 9 10 K _ 0 4 P D1 9 P R1 7 0 R B 0 54 0 S 2 1 00 _ 0 4 P C 1 53 G P S _N V V D D _ P GO OD # 0 _0 4 C P S _ N V V D D _ P GO OD # S 5 PQ 9 M TN 7 00 2 Z H S 3 0 . 0 2 2u _ 1 6V _X 7 R _0 4 D 6 6 8 00 p _ 50 V _ X 7 R _ 0 4 0 . 1 u_ 5 0 V _ Y 5 V _0 6 5V P R1 6 7 P C 1 50 P C 44 4 . 7 u _ 25 V _ X 5 R _ 0 8 20 P C 15 4 P R 17 3 1 0 K _ 1% _ 0 4 0 . 8 5V S _P W R G D P C1 4 4 P R 1 74 1 2 K _ 1% _ 0 4 S S _ 0 .8 5 V S 3 .3 V 0 . 1 u _5 0 V _ Y 5 V _ 06 P R 17 1 9 . 3 1K _1 % _ 04 4 . 7u _ 2 5 V _X 5R _ 08 P R 1 72 9 . 3 1 K _1 % _ 0 4 PC1 4 5 4 1 0 0 _0 4 PQ 8 B M TN N 2 0 N 0 3 Q8 5 4 Sheet 37 of 49 Power 0.85VS, 1.8VS, PEX VDD P C5 9 FBVDDQ 1.5V@6A 240MIL 3 S Y S 1 5V PC5 7 1K _1 % _ 04 6-02-06615-320 6-02-07113-320 E A P _ 0 . 8 5V S 1 2 B OO T _0 . 8 5 V S P C 15 5 11 12 13 14 15 uP 61 2 2 C O MP _ 0 . 8 5V S 3 .3 V P R 18 8 *0 _ 04 34 P C1 6 2 P C1 6 3 4 7p _ 5 0 V _N P O_ 0 4 P R 19 1 1 0 0K _ 1 % _ 04 5V ON VD D3 PR 1 8 4 6 6 P R1 9 5 V C C S A _V I D 0 V C C S A _V I D 1 V CC S A _ V ID0 V CC S A _ V ID1 P R 1 77 3 3 K _ 1% _ 0 4 0.9 V D 0 . 8 5 V _ ON S B - 38 Power 0.85VS, 1.8VS, PEX VDD V CC SA _V ID 1 *1 u _ 6. 3 V _ X 5 R _ 0 4 0 0 SET0 V CC S A _ V ID0 R 4 27 1 0 K _ 04 V CC S A _ V ID1 R 4 23 R 4 24 *1 0 K _ 0 4 1 0 K _ 04 0 1 SET2 0. 72 5V 1 0 SET1 P J 18 2 B P Q 48 B T N 3 9 0 4N 3 V CC SA _V ID 0 P C1 6 1 0 .8 V 1 C 1 0K _0 4 E P R 1 97 *4 0 m li P R 19 6 *4 0 m il 1 0 _0 4 P C 1 58 PJ 1 7 1 2 * 0. 1u _ 1 0V _ X 5 R _ 0 4 CS P _ 0 .8 5 V S C S N _ 0. 8 5 V S * 40 m i l PJ 1 6 1 P R 18 6 1 . 3 K _1 % _ 0 4 P R 19 3 0_04 V CC S A _ S E NS E P R 1 94 1 0 K_ 0 4 1 .0 5 V S _ V T T P C1 5 9 P C1 6 6 0 . 1u _ 2 5 V _X 7 R _ 0 6 2 * 40 m i l G P J 19 1 2 K _ 1 %_ 0 4 P R 18 9 1 00 K _ 0 4 10 0 K _ 0 4 P Q4 6 M TN 7 00 2 Z H S 3 P Q 44 B P D 15 0 3 Y V S 2 S P R 1 85 0 _ 04 3 C S N _ 0. 85 V S 0 . 01 u _ 5 0V _ X 7 R _0 4 d GP U _P W R _ E N # + P C 1 68 PR 1 8 7 0_04 PJ 2 0 0 .8 5 V S * OP E N -5 m m 1 2 0 . 1u _ 1 6 V _Y 5V _ 0 4 3 P C1 6 4 0 . 01 u _ 50 V _ X 7 R _ 0 4 D P Q3 6 B L 2N 7 00 2 D W 1T 1 G 5G 4 d GP U _ P W R _ E N # R T _0 . 8 5 V S 1 3 S P R 19 2 2 2 _0 4 P Q 36 A L 2 N 7 0 02 D W 1 T1 G G2 1 22 0 0 p_ 5 0 V _ X7 R _0 4 6 D P C1 2 4 V 0 .8 5 6A 5 6 0 u_ 2 . 5 V _ 6 . 6* 6 . 6* 5 . 9 d GP U _P W R _ E N P H A S E _ 0. 8 5 V S L G_ 0 . 8 5V S C S P _0 . 8 5 V S P R 1 48 1 0 0 _0 4 4 . 7u _ 6 . 3 V _X 5 R _ 0 6 GN D PH ASE LG VC C RT C SP PL 1 0 T MP C 06 0 3 H -1 R 0M -Z 0 1 1 2 7 5 4 3 2 1 P R 19 0 1 K _ 1% _ 0 4 P C6 1M _ 04 SET3 SET2 SET1 SET0 FB 0.85VS P Q4 4 A P D 1 5 0 3Y V S 5 6 1A S E T 3_ 0 . 8 5 V S 6 S E T 2_ 0 . 8 5 V S 7 S E T 1_ 0 . 8 5 V S 8 S E T 0_ 0 . 8 5 V S 9 10 F B _ 0. 85 V S 21 20 19 18 17 16 8 0 . 1 u _1 0 V _ X 7R _ 04 4 P R1 4 7 3 V 3 _ RU N EAP SS P OK U G B OO T 3. 3 V P C 1 49 PU 1 0 C OM P V ID 0 V ID1 E N /P S M CS N SYS1 5 V ON P Q3 5 P 2 70 3 B A G 6 5 2 4 1 P R 17 8 1 0 K _ 1% _ 0 4 0. 85 V _ ON NM O S P R 1 79 1 5 K _ 1% _ 0 4 1 u _ 6. 3 V _ Y 5 V _ 0 4 B.Schematic Diagrams 8 7 P R7 2 2 2 00 p _ 50 V _ X 7 R _ 0 4 ON P Q8 A MT N N 2 0N 0 3Q 8 2 1 P C5 8 1 . 3 K _1 % _ 0 4 * 1 u_ 6 . 3 V _ Y 5 V _ 04 1 M _0 4 E N 1 . 8 V S G P R 77 2 *O P E N - 3m m V OU T EN 1 PC 6 6 P C 67 NM O S PJ 6 1 4 V OU T 8 E N 1 . 8V S 1 P Q 16 MT N 70 0 2 Z H S 3 S 3 , 35 , 3 8 1. 5 V 1 .8 V S 2A V C NT L 3 PQ 5 M TN 7 00 2 Z H S 3 G D dG P U _P W R _ E N # 1. 8V S _P W R G D 1 .8 V S _ P W RG D PU 4 1 0K _ 0 4 S 5 D P Q4 B MT N N 2 0 N 0 3 Q8 68 0 0 p_ 5 0 V _ X7 R _0 4 P R 67 3 .3 V 20 P C2 0 1.8VS P C6 1 2A P C1 8 0 . 1u _ 1 6 V _Y 5 V _ 04 3 1M _ 04 1 .0 5 V _ P W R_ E N 5V 3 .3 V 0 . 1u _ 1 6V _Y 5 V _ 0 4 MT N N 2 0 N 0 3 Q8 8 2 7 1 P R1 3 P E X _V D D 1.05V@4A 250 MIL P Q 4A 10 u _ 6. 3V _ X 5 R _0 6 1 .0 5 V S *1 0 u _6 . 3 V _ X 5 R _ 0 6 SYS1 5 V 1 . 0 5V S _V TT 0 .6 75 V 1 1 SET3 1 2 , 16 , 4 1 3 V 3 _ R U N 2, 3 , 5 , 2 3 , 2 4, 2 5 , 3 5, 39 1. 0 5 V S _ V T T 3, 6 , 9 , 1 0 , 2 5, 2 9 , 3 3 , 35 , 3 8 1 . 5 V 1 1, 18 , 2 7 , 3 0, 3 4 , 3 5, 36 , 4 1 , 4 2 V D D 3 6 0 . 85 V S 6 , 2 3, 2 4 1. 8 V S 11 , 3 5 , 3 6 S Y S 15 V 1 2 , 13 P E X _ V DD 1 3, 1 4 , 1 5 F B V D D Q 25 , 2 8 , 2 9, 3 1 , 3 5 , 38 , 4 1 5 V 11 , 3 5 , 3 6, 3 8 , 3 9 , 40 , 4 1 , 4 2 V I N 1 8 , 19 , 2 0 , 2 4, 2 5 , 3 5 , 38 1 . 05 V S 2, 3 , 8 , 1 1 , 16 , 1 8 , 1 9, 20 , 2 2 , 2 3, 2 4 , 2 5, 27 , 2 8 , 2 9, 3 0 , 3 5 , 38 , 3 9 3 . 3 V 6 Schematic Diagrams POWER 1.5V/1.05VS/0.75V 2 3 1 23 22 V L D OI N V BST P C1 9 2 0 . 1 u _ 1 0 V _ X 7R _ 0 4 VB ST PJ 7 2 VTT 24 P R 84 0 _0 6 1 1 VTT 21 D RV H 20 LL PC 1 9 4 P C 19 6 VD D Q DR V H 3 .3 _ 0 6 *O P E N -2 mm P C7 2 PC 7 1 P C7 0 V T T G ND 2 19 VTTSN S C VTTSN S 15A D RV L D R VL P D4 PC 9 6 PD 5 A * SK3 4 SA A C S OD 1 4 0 S H 5 6 7 8 5 6 7 8 G ND NC N C 0_06 DD R1 .5 V _ P W RG D Sheet 38 of 49 POWER 1.5V/ 1.05VS/0.75V 20 25 7 PR 2 3 1 P R 23 0 PR 6 0 4 7 K _ 04 PR 5 5 1 0 0K _0 4 1 0 .7 K _ 1 % _ 0 4 R1 P Q 11 A L 2 N 7 0 0 2 D W 1T 1 G 2G 1 P Q 1 1B S L 2 N7 0 0 2 DW 1 T 1 G 1 3 D PJ 4 D P Q1 3 *M T N 7 0 0 2 Z H S 3 G D 5V Vo u t=( R1/ R2+ 1)*0.75 P C5 2 0 .1 u _ 1 6 V _ Y 5 V _ 0 4 S P C5 3 2 0 ,3 4 0. 1 u _ 1 6 V _ Y 5 V _ 0 4 5G S US C# G *4 0 m i l 3 1, 3 5 2 P Q1 2 S US B 12 /21 PWR CHANGE VTTEN * 1 00 K _ 0 4 D P R5 6 *5 . 1 _ 0 6 PR 6 3 1 0 0 K _ 04 R2 1 0 0 K_ 0 4 P R 90 PC 6 0 D D R1 .5 V _ P W RG D D D _ ON # MT N 70 0 2 Z H S 3 S 5V A VI N 12/8 C 5 . 1 K _ 1 % _0 4 G 5 6 7 8 SU SB P Q 53 ME 48 9 4 -G 4 M T N7 0 0 2 Z H S 3 * 0. 1u _ 1 6 V _ Y 5 V _ 0 4 DH IL IM 2 3 1 PC 1 7 3 P C1 7 2 P C1 7 7 P C1 7 5 PC 1 7 4 P C 17 6 + P C1 4 6 *1 5 u _2 5 V _ 6 . 3 *4 . 4 R B0 5 4 0 S2 PR 2 0 3 0 . 1 u_ 5 0 V _ Y 5 V _ 0 6 1. 05 V _ O N PQ 6 7 4 . 7 u _ 25 V _ X 5R _ 0 8 P R2 0 4 1 0 0K _0 4 4 .7 u _ 2 5 V _ X 5 R_ 0 8 P D2 0 0. 1u _ 5 0 V _ Y 5 V _ 0 6 5V 1.05VS 16 LX *O P E N -8 m m P C 17 0 R TN 1 u_ 6 . 3 V _ Y 5 V _ 04 + P C 18 9 PC 1 8 7 0 . 1 u _ 16 V _Y 5V _0 4 C S K 34 S A A ? ? ? ? PIN3? UP 6 1 2 7 P C 1 84 *5 6 0 u _2 . 5 V _ 6 . 6 * 6. 6 * 5 . 9 DL 17 PAD + PD 2 2 2 3 1 G N D 5 R TN 6 7 N.C N .C DL 2 3 1 4 FB P Q5 2 *M E 4 6 26 -G 4 5 6 0 u _ 2. 5V _6 . 6 * 6 . 6 *5 . 9 P Q5 1 ME 4 6 2 6 -G 4 5 6 7 8 5 6 7 8 3 V CC 9 15A BST BST 10 V OU T 2 1 2 P GD P K 3 90 6 1 .0 5 V S P J 25 1 LX 11 1 . 0 5 V S _ P W R GD 1. 05 V S _ P W R GD N.C 12 EN 20 PL 1 2 T M P C 1 0 0 4 H -1 R 0 M-Z 01 1 2 0 . 1 u _ 1 0 V _ X 7R _ 0 4 D H 1 0 K_ 0 4 IL IM P R2 0 2 15 P U1 1 3 .3 V N .C 14 13 V 1 .0 5 8 1 .5 V S _ CP U_ P W RG D 1 0K _1 % _ 0 4 D 3 P R6 4 *1 0 K _ 1 % _ 04 PR 6 1 S 5V PR 6 5 10 S3 12 u P6 1 6 3 P Q2 2 *M E 4 62 6 -G 2 .2 _ 0 6 4 D S PC 5 4 *1 0 0 0 p _5 0 V _ X 7 R _ 0 4 S5 _ 6 1 6 3 S5 9 V D DQ S E T V D D QS E T 4 3 .3 V 11 * MT N 70 0 2 Z H S 3 5V P C 63 P G OO D V D DQ S N S G S US B PR 6 9 13 C OM P 5V 12/17 PWR CHANGE V C C P _ S E N S E _6 1 2 7 P R2 0 0 R1 0_ 0 4 5V PR 2 0 1 P R1 9 9 PC 1 6 9 4. 0 2 K _ 1 % _ 0 4 *1 5 p _ 5 0 V _ N P O _ 0 4 F B _ 1 . 0 5 V S _ 6 1 27 * 90 . 9 K _ 0 4 Vo ut =( R1/R2+1 )*0.75 P C1 7 1 P C1 6 7 0. 0 1 u _ 1 6 V _ X7 R _ 0 4 * 2 0 p_ 5 0 V _ N P O_ 0 4 R2 P R1 9 8 9. 3 1 K _ 1 % _ 0 4 9 ,1 0 V T T _M E M 1 3 ,1 4 ,1 5 ,3 7 F B V DD Q 2 5 , 2 8, 2 9 , 3 1 , 3 5 , 3 7 , 41 5V 1 1 , 3 5 , 3 6 , 3 7 , 39 , 4 0 , 4 1 , 4 2 V I N 1 8 , 1 9 , 2 0, 24 , 2 5 , 3 5 , 3 7 1 . 0 5 V S 3 , 6 , 9 , 1 0 , 2 5 , 29 , 3 3 , 3 5 , 3 7 1 . 5 V POWER 1.5V/1.05VS/0.75V B - 39 B.Schematic Diagrams P R 66 *1 0 _ 0 4 P V CC 5 V CC 5 VTTR EF 0 _0 6 1 0 K _ 1 % _0 6 1u _ 6 . 3 V _ Y 5 V _ 0 4 P C6 2 *1 0 0 0p _ 5 0 V _ X 7R _ 0 4 C S PR 7 1 15 14 1 u _ 6 . 3V _ Y 5 V _ 04 V D DQ S N S 8 PQ 1 0 SU SB 3 ,3 5 ,3 7 C OM P _ V D D 6 0_06 *2 2 _ 0 4 PR 7 5 16 CS S PR 6 2 5V PR 5 4 V T T _ ME M M OD E V T TR E F 5 0 . 1 u _ 1 0 V _ X7 R _ 0 4 P C6 4 P GN D C S _ GN D 4 2 3 1 MO D E 6 *0 _ 0 4 2 3 1 *0 _ 0 4 P R 70 0 .1 u _ 1 6 V _ Y 5 V _ 0 4 0 _ 04 P R 74 PQ 2 1 M E 4 62 6 -G 4 0 . 1u _ 1 6 V _ Y 5 V _ 0 4 G ND P R 76 5 6 0u _ 2 . 5 V _ 6 . 6 *6 . 6 * 5. 9 VD D Q 18 17 1 .5 V PC 9 7 + P C8 6 0_06 5V 2 *O P E N -8 m m *1 0 0 0 p_ 5 0 V _ X 7 R _ 0 4 1 2/17 PWRCHANGE 3 PJ 9 1 P C 79 LL P R8 2 10 u _ 6 . 3 V _ X 5 R _ 0 6 1 0 u _ 6. 3 V _X 5 R _0 6 *1 0 u _6 . 3 V _ X 5 R _0 6 1.5V 12/21 PWR CHANGE PL 1 TM P C 1 00 4 H -R 5 6 M -Z 0 1 1 2 PR 8 3 C VTT_ M EM P C7 4 0 . 1 u_ 5 0 V _ Y 5 V _ 0 6 PU 5 V D DQ P C6 9 1 0 u _ 6 . 3 V _ X5 R _ 0 6 VTT_MEM P C7 6 0 . 1 u _ 50 V _ Y 5 V _0 6 5 6 7 8 P Q2 3 M E 4 8 9 4- G 4 4 . 7 u _ 2 5V _ X 5 R _ 0 8 V IN C R B 05 4 0 S 2 4. 7u _ 2 5 V _ X 5 R _ 0 8 PD 3 A 5V Schematic Diagrams POWER VCORE1 P C1 8 0 10 0 p_ 5 0 V _N P O_ 0 4 6-13-93121-28B 10 0 _ 04 PR 4 2 1 0 K _ 04 P R 49 PR3 9 0 _0 4 PR2 2 6 5VS 12/1 PR222 del 2 . 2 _0 6 A_ GN D VIN P R 2 2 4 *1 5 m li _ s ho rt _ 0 6 A_ GN D 10 K _ 0 4 D E L A Y _P W R GD H _C PU_ SVID DAT H _C PU_ SVID CL K H _C PU_ SVID ALR T# VR _R DY VR _R DY A V R _O N 6 13 1_ VCC PR4 3 1 0 K _ 04 V RM P _ V IN T SE NSE A 1 2 3 4 5 6 7 8 9 10 11 12 13 1 K _1 % _ 04 VSP T SEN SE V R H O T# S D IO SC L K A L E R T# V R _ RDY V R _ RDY A EN ABL E VC C R OS C V R MP T SEN SEA P C4 0 P R 22 3 P C4 5 *1 4 K _ 1% _ 0 4 0 . 01 u _ 50 V _ X 7R _0 4 N C P 6 1 31 S A_ GN D IM ON A 2 2 0 0p _ 5 0V _ X 7 R _ 0 4 P C2 4 1 0 0 p_ 5 0 V _X 7 R _ 0 4 1 0_ 0 4 PR2 0 1 0_ 0 4 CS N 1 40 CS N 3 40 CSP 3 40 40 P C2 5 1 00 0 p _5 0 V _ X7 R _ 0 4 PC 2 6 P U3 Qua d 45 W CPU VID1 =0 .9 V Icc M ax = 94 A R_LL=1 .9 m ohm OCP~ 1 20A P R2 2 P R2 1 39 38 37 36 35 34 33 32 31 30 29 28 27 5. 4 9 K _ 1% _ 0 4 PC 2 8 CSN 3 CSP P 3 CSN 1 CSP P 1 D R ON 5. 4 9 K _ 1% _ 0 4 D R ON P R3 1 5VS 0 _0 4 V R 1 _P W MA PR3 4 * 10 K _ 0 4 P R 2 11 PR2 1 3 40 1 0 K _ 04 5VS 10 K _ 0 4 P R2 7 P R2 1 4 PR 3 2 1 1 3K _1 % _ 04 10 K _ 0 4 76 . 8 K _ 1% _ 0 4 1 8. 7 K _ 1 %_ 0 4 PJ 2 1 *OP E N -1 m m A_G ND 2 2 0 0p _ 50 V _ X 7R _ 04 OPTION: DISALBE ICC_ M AX_2 1h A_ GN D V_GT = R*1 0uA*25 6A/ 2V A_ GN D A_G ND PR2 1 5 P J2 3 11 3 K _ 1% _ 0 4 *O P E N -1 m m A_ G ND A_ GND CSN A CSPPA P C3 5 24 . 9 K _ 1% _ 0 4 CSCO MPA P C1 7 9 2 2 K _1 % _ 04 P C 37 4 70 p _ 50 V _ X 7R _0 4 6 4 . 9K _ 1 % _0 6 40 P R3 6 PR4 0 0 . 1 u _1 0 V _ X5 R _0 4 0 . 1 u _1 0 V _ X5 R _0 4 13 . 7 K _ 1% _ 0 4 COM PA P C 39 1 00 0 p _5 0 V _ X7 R _ 0 4 12/17 PWR CHANGE DIFFO UTA A_ GND A _G ND A_ GN D A_ G ND P R3 8 P R 1 80 10 0 _ 04 P C4 2 P R 44 6 8 p_ 5 0 V _N P O_ 0 4 6 V S S _ GT _ S E N S E 6 V C C _ GT _S E N S E P RT 3 1 V _G T 2 10 0 K _ N T C _ 0 6_ B P C4 6 P C4 8 10 0 0 p_ 5 0 V _X 7 R _ 0 4 B~ 43 50 1 0 0 p_ 5 0 V _N P O_ 0 4 P R4 7 P R 1 81 10 0 _ 04 40 16 5 K _ 1% _ 0 6 1 K _ 04 FBA PR4 8 0 _ 0 4 P R 2 19 7 5K _ 1 % _0 4 1 0 _ 1% _ 0 4 PR4 6 PR5 2 0 _ 0 4 P C4 9 3 . 0 1K _1 % _0 4 3 3 0 0p _ 5 0V _ X 7 R _ 0 4 PUT COLSE TO V_GT Inductor 3. 3 V S 1 0 K _0 4 1 P R 50 12/7 PJ 3 * 40 m i l 2 PR5 3 * 1 5m i _l s h ort _ 0 6 V R _ ON 1 1, 2, 3 , 8 , 1 1, 1 6 , 1 8, 1 9 , 2 0, 2 2 , 2 3, 24 , 2 5, 2, 1 1, 1 1, 18 , 2 4, 3 , 9, 1 0 , 1 1, 1 2 , 1 8, 1 9 , 2 0, 2 1 , 2 2, 2 3 , 2 4, 25 , 2 7, B - 40 POWER VCORE1 C S NA 0 . 0 4 7u _ 10 V _ X 7 R _ 04 C SPA PUT COLSE TO V_GT HOT SPOT 40 V R 1 _ P W M1 P W M 2_ 6 1 31 I MA X_ 6 1 31 VR 1_PWM A P R 22 1 A_ GN D A L L_ S Y S _P W R G D CS P 1 40 CSSU MA P R 20 7 40 40 V R 1_ P W M 3 I M ON PC 3 8 PR4 1 C SN1 40 0 . 0 47 u _ 10 V _ X 7R _ 04 PR 2 4 P R2 8 P C3 3 40 C S N 2 _5 V S 4 . 87 K _ 1 %_ 0 6 1 1, 2 0 , 3 4 CS P 3 C SN1 5VS 0_04 C SN3 0 . 0 47 u _ 10 V _ X 7R _ 04 A_ GN D CSN2 CSP 2 CSN3 CSP 3 CSN1 CSP 1 D RO N P W M1 / A D D R P W M 3/ V B OOT P W M2 / I S H E D I MA X P W M A / I MA X A V B OOT A IM ON A 1 0 0K _ N T C _ 0 6_ B A _G ND P C2 3 PR2 0 8 2 V S N A _ 6 13 1 V S P A _ 6 1 31 1 P R 22 9 2 8 . 2 5K _1 % _ 04 PR T4 1 u _6 . 3 V _ X5 R _0 4 B~ 39 64 CSP 1 VR1 _ CSR EF A_GN D TSEN SE PR2 1 8 H _ P R O C H OT # 10 0 K _ 1% _ 0 6 2 0_04 53 52 51 50 49 48 47 46 45 44 43 42 41 40 *0 _ 04 10 0 K _ 1% _ 0 6 P R1 9 C SSUM EPAD D I F F OU T VSN T RB S T F B CO M P IL IM D R OO P C S C O MP CSS U M IO UT CS R E F N C2 NC 1 0 _0 4 P R 21 6 2 0K _1 % _ 04 V S S _ S E N S E _6 1 3 1 VSN A VSPA FBA D IF F O UT A T RB ST A C OM P A I L I MA D R O OP A C S C OM P A IO UT A CS S U M A C SPA CS N A P R 21 7 3.3V P R2 3 7 5K _1 % _ 04 14 15 16 17 18 19 20 21 22 23 24 25 26 3.3VS P R 18 PR 1 7 I M ON 0_04 V C C _ S E N S E _ 6 1 31 1 0 0K _ N T C _ 0 6_ B PR1 8 3 V CO RE 33 0 0p _ 5 0V _ X 7 R _ 0 4 PR2 5 P R 30 TSEN SEA PC4 7 12 /17 PWRCHANGE V C OR E _ V C C _ S E N S E 5 , 40 22 p _5 0 V _ N P O _0 4 PR 2 6 PC2 7 4 . 02 K _ 1 %_ 0 4 10 0 _ 04 V C OR E _ V S S _ S E N S E 1 0 00 p _ 50 V _ X 7R _ 04 5 PC2 9 12/17 PWRCHANGE 1 6 5K _1 % _0 6 PR T1 P R 16 8 1 2 9 3 . 1K _1 % _ 06 0 . 1u _ 1 0V _ X 7 R _ 0 4 20 0 . 1u _ 1 0V _ X 7 R _ 0 4 B.Schematic Diagrams Sheet 39 of 49 POWER VCORE1 1 K_ 0 4 P C 32 PUT COLSE TO VCORE HOT SPOT 3 1 0 0_ 0 4 P R2 9 P R 35 B~ 39 64 A_ GN D PC3 0 P R3 3 CSC OM P PR1 8 2 2 1 0 0K _ N TC _0 6 _ B H_ CP U _ S V IDD A T H _ C P U _S V I D A L R T # H_ C P U_ S V IDC L K 5 PUT COLSE TO VCORE Phase 1 Inductor P RT 2 1 3 3 00 p _ 50 V _ X 7R _0 4 A_G ND TSEN SE PC3 6 B~ 43 50 P C 17 8 DIFFO UT H_ CP U _ S V IDD A T H _ C P U _ S V I D A L R T# H _ C P U _ S V I D C LK P R 21 0 2 4 . 9K _ 1 % _0 4 T RBS T 5 4 . 9 _1 % _ 04 C OM P_ CPU P R3 7 13 0 _ 1% _ 0 4 P R 2 09 1. 2 k _1 % _ 04 FB TR BST PR1 2 12/1 ? ? 5 5 5 6 80 p _5 0 V _ X 7R _0 4 P R 21 2 1 0 _0 4 CLOSE TO VR 1 1.05 VS_VTT VCORE_1 35 , 3 6 , 37 , 3 8 , 40 , 4 1 , 42 VIN 27 , 2 8 , 29 , 3 0 , 35 , 3 7 , 38 3. 3 V 3, 5 , 2 3 , 24 , 2 5 , 35 , 3 7 1 . 0 5V S _ V T T 35 , 3 6 , 37 , 3 8 , 40 , 4 1 , 42 VIN 25 , 2 8 , 31 , 3 2 , 33 , 3 5 , 40 5V S 28 , 3 0 , 31 , 3 2 , 33 , 3 4 , 35 3. 3 V S Q ua d VC CAXG VI D1= 1. 15 V I ccM a x = 26A R_ LL= 3. 9m ohm O CP~ 31 A C SPA 40 40 40 Schematic Diagrams POWER VCORE2 3 4 9 . 9_ 1 % _0 4 4 SW 7 V R E G _S W 1_ O U T P Q4 9 MD U 2 6 54 G ND 6 EN V CC LG P Q5 0 MD U 2 65 4 PQ 6 M DU2 6 5 4 P D2 G G G A S K 34 S A S S S 1 u_ 6 . 3 V _ X 5R _ 04 SW D R ON 5V S V R E G_ S W 3 _ OU T P Q4 2 MD U 2 6 54 G ND 6 LG 5 P Q3 MD U 2 65 4 P Q 43 M DU2 6 5 4 * 33 0 u _C A R 3 1 5 L P C1 4 3 P C1 6 0 P L6 T M P B 1 23 5 MP -R 3 6M -Z 0 1 1 2 1 G G CS P 1 39 39 V C OR E Sheet 40 of 49 POWER VCORE2 PD 1 V R E G_ S W 3 _ LG 2 G 1u _ 6. 3V _ X 5 R _ 0 4 A 9 SK3 4 SA S S S PAD P C1 5 C SN1 *1 5 m il _ sh o rt _ 0 6 P C1 3 9 1 5u _ 2 5V _6 . 3 *4 . 4 S 7 G S V R E G_ S W 3 _ H G C P WM 3 49 . 9 _ 1% _ 0 4 E N 4 V CC 2 8 D HG D BST D 39 P Q 41 M DU2 6 5 7 G D V IN D 0 . 22 u _ 10 V _ X 7R _ 06 N CP 5 9 1 1 1 P R5 *1 5 m il _ sh o rt _ 0 6 PL 7 PR 8 *T M P C 1 0 04 H -R 3 6 M-Z 0 1 *1 5 m il _ sh o rt _ 0 6 PR 7 *1 5 m il _ sh o rt _ 0 6 CS N 3 39 CS P 3 39 12/23 G 6 P Q 54 * MD U 2 65 4 V _ GT 39 V G F X _C OR E P D 21 G P C 1 83 39 P R2 0 5 *1 5 m il _ s ho rt _ 0 6 CS P A 39 P C4 1 + + 5 60 u _2 . 5 V _ 6 . 6* 6 . 6* 5. 9 CS N A 5 6 0 u_ 2 . 5 V _6 . 6 *6 . 6 *5 . 9 *1 5 m il _ s ho rt _ 0 6 12/17 PWR CHANGE V CO RE + P C1 5 6 + P C 1 42 + P C 1 51 + P C 1 41 + P C 1 52 + PC 1 4 + PC 1 7 + *3 3 0u _ 2 . 5V _V _ A P C1 4 7 *3 3 0u _ 2 . 5V _V _ A S P R2 0 6 *5 6 0u _ 2 . 5 V _6 . 6 *6 . 6 *5 . 9 Colay * 15 m i l_ s h ort _ 0 6 V GFX_ CO RE 5 60 u _ 2. 5 V _ 6 . 6 *6 . 6* 5 . 9 G SK3 4 SA 9 PR1 1 VR EG_ SWA_ L G PAD P C 18 2 VGFX_CORE PC1 5 7 5 60 u _ 2. 5 V _ 6 . 6 *6 . 6* 5 . 9 5 P L1 1 TM P C 1 0 0 4H -R 3 6 M-Z 0 1 1 2 P Q5 5 MD U 2 6 54 P C3 4 5 60 u _ 2. 5 V _ 6 . 6 *6 . 6 *5 . 9 LG VR EG_ SWA P C3 1 5 60 u _ 2. 5 V _ 6 . 6 *6 . 6 *5 . 9 G ND VR EG_ SWA_ HG 7 P C2 1 8 5 60 u _ 2. 5V _ 6 . 6 *6 . 6 *5 . 9 3 49 . 9 _ 1% _ 0 4 E N 4 V CC 8 C SW A 5 VS HG P WM S P R 22 7 D R ON 1u _ 6 . 3V _ X 5 R _ 0 4 39 BST D 2 V R 1_ P W M A D 1 39 S P U 1 2 N CP 5 9 1 1 P C1 8 5 0 . 1 u_ 5 0 V _Y 5V _ 0 6 P Q5 6 MD U 2 6 57 4 . 7 u_ 2 5 V _X 5R _ 08 0 . 22 u _ 10 V _ X 7 R _ 06 4 . 7 u_ 2 5 V _ X 5R _ 08 P C 1 81 * 4. 7 u _ 25 V _ X 5 R _ 0 8 2 .2 _ 0 6 * 4. 7 u _ 25 V _ X 5 R _ 0 8 P R 22 8 D V IN 6 V GF X _ C O R E 5 , 39 V CO RE 1 1 , 3 5, 3 6 , 3 7, 38 , 3 9 , 41 , 4 2 V I N 1 1 , 1 8, 2 4 , 2 5, 2 8 , 3 1, 32 , 3 3 , 35 , 3 9 5 V S POWER VCORE2 B - 41 B.Schematic Diagrams P C1 6 P Q4 0 MD U 2 6 57 V R 1_ P W M 3 2 PL 9 *T M P C 1 0 04 H -R 3 6 M-Z 0 1 P R 9 P +C 1 4 0 PU 1 39 1 V C OR E PR 1 0 2 . 2 _ 06 P C 1 31 V R E G _S W 1_ L G 5 9 PR 6 + P L8 T M P B 1 23 5 MP -R 3 6M -Z 0 1 1 2 PAD P C 21 0 . 1 u _5 0 V _ Y 5 V _0 6 D G S V R E G _S W 1_ H G 0 . 1 u _5 0 V _ Y 5 V _0 6 5 VS P WM 8 4 . 7 u _2 5 V _ X 5 R _ 0 8 P R 16 D R ON HG P C1 6 5 4 . 7 u _2 5 V _ X 5 R _ 0 8 39 N CP 5 9 1 1 BST C 2 V R 1_ P W M 1 P Q 47 M DU2 6 5 7 G D 39 P Q4 5 MD U 2 6 57 D 1 0 . 22 u _ 10 V _ X 7R _ 06 S PU 2 P C2 2 D 2 . 2 _ 06 D P R 15 P C1 4 8 *4 . 7 u _2 5 V _ X 5 R _ 08 P C 1 34 * 4 . 7u _ 2 5V _ X 5 R _ 0 8 V IN VCORE_2 Schematic Diagrams Power VGA NVVDD 1.N12P-GS? ,? ? 0.975V N 12 P- GS 0. 97 5V N VV DD _VI D0 0 0 N VV DD _VI D1 VDD 3 3 V 3_ R U N P C 11 6 P R 57 1 0 K _ 04 0 . 0 2 2u _ 1 6 V _ X7 R _0 4 P S _ N V V D D _ P GO OD # 0 .8 25 V 0 1 SE T0 N12P-GS 2.N12P-GV2 Default? ? 0.95V 1. 0V 0. 8V N 12 P- GV 2 0 .9 5V N VV DD _V ID 0 1 1 1 0 SE T2 S ET 1 PR139 PR141 PR140 PR142 11.8K PR134 15K 12.7K PR136 15K 10K PR135 12.7K 10K PR137 12K 0. 97 5V 0. 85 V 0 .8 V 0 1 1 0 1 1 S ET 3 0 0 N VV DD _V ID 1 SE T3 S ET 0 N12P-GV2 SE T2 S ET 1 PR139 PR141 PR140 PR142 10K PR134 16.2K 11.8K PR136 15K 11.5K PR135 12K 10K PR137 12K 37 D P R1 2 0 1 0 K_ 0 4 P R 12 7 P Q3 1 MT N 70 0 2 Z H S 3 G S VI N 1 0 K _ 1% _ 0 4 PR1 3 7 1 2 K _ 1% _ 0 4 P R1 4 1 1 1 . 8 K _1 % _ 0 4 PR1 3 6 1 5 K _ 1% _ 0 4 5V A P C1 1 5 * 1 00 p _ 5 0V _ N P O_ 0 4 PD 1 1 P Q2 9 M D U 2 65 7 1 K _ 1 %_ 0 4 SET3 SET2 SET1 SET0 FB G ND P HA S E LG V CC RT C SP P C4 4. 7u _ 2 5V _X 5 R _ 0 8 4. 7u _ 2 5V _X 5 R _ 0 8 G S 0 . 1u _ 1 0V _X 7 R _ 0 4 PL 4 * TM P C 1 0 0 4 H -R 36 M -Z 0 1 1 2 PL 3 B C I H 1 3 6 7H C -R 8 2 M 1 2 P R 1 16 3 3 K _ 1% _ 0 4 P Q3 3 MD U 2 6 54 G P Q3 4 M D U 2 65 4 G P Q3 2 M D U 2 65 4 P D 1 2 P D 13 P R1 1 7 5 .1 _ 0 6 G C S O D 1 4 0S H S A * SK3 4 SA A S S 0. 0 1 u _5 0 V _ X 7 R _ 0 4 PR1 2 4 12 K _ 1 % _ 04 1 0 0 K _ 04 P C1 0 7 P J1 4 2 1 9/6 EMC DVT request * 4 0m i l P J1 3 2 16 N V V D D _V I D 0 16 N V V D D _V I D 1 C S P _ N V V DD 0 . 1 u _2 5 V _ X 7R _ 06 1 P R 1 26 1 0 0 K _ 04 *0 . 1 u _1 0 V _ X 5 R _ 0 4 C S N _N V V D D E N _ V GA _C OR E 3 V 3_ R U N P R 11 9 PJ 1 5 2 PR1 1 8 P R1 4 6 0 _0 4 P R1 4 5 *0 _ 0 4 P R1 4 4 *0 _ 0 4 P R1 4 3 *0 _ 0 4 1 0 K_ 0 4 PS1 _ V D D_ S EN SE P S 1 _ GN D _ S E N S E 12/17 PWRCHANGE P J 12 1 2 K _ 1% _ 0 4 1 * 40 m i l V D D3 PR1 2 1 P C1 1 2 * 4 0m i l P R 1 22 1 0 0 K _ 04 2 PC1 1 4 10 K _ 0 4 *4 0 m li *2 2 0 0p _ 5 0 V _X 7 R _ 0 6 1 7 NV V DD 1 2 , 1 6 , 3 7 3 V 3 _R U N 2 5 , 2 8 , 29 , 3 1 , 3 5, 37 , 3 8 5 V 1 1, 1 8 , 2 7 , 30 , 3 4 , 3 5, 3 6 , 3 7 , 4 2 V D D 3 1 1, 3 5 , 3 6 , 37 , 3 8 , 3 9, 40 , 4 2 V I N B - 42 Power VGA NVVDD NV V D D 2 12 12 P C2 1 5 P C 2 16 + 5 6 0u _ 2 . 5V _6 . 6 *6 . 6 * 5. 9 22 0 p _ 50 V _ N P O_ 0 4 + P C2 1 4 * 2 2u _ 6 . 3 V _ X 5R _ 0 8 P R 1 25 PJ 1 1 *2 2 u_ 6 . 3 V _ X 5 R _ 0 8 1 0 0 K _1 % _ 0 4 +P C 2 1 3 + P R 1 31 0_04 *1 0 0 u_ 6 . 3 V _ B _ A PR 1 2 9 PR1 3 0 0_ 0 4 P C1 0 9 * 10 0 u _6 . 3 V _ B _ A 4 7 p _5 0 V _ N P O_ 0 4 C9 90 31 7 5 6 0u _ 2 . 5 V _6 . 6 * 6. 6 * 5. 9 V D D3 0 . 1 u _1 6 V _ Y 5 V _ 0 4 P C1 1 7 PC 1 1 8 N12P_VGA 12/22 ? ripple noise V G A _ V CO RE *O P E N -8m m C S N _N V V D D PR1 3 2 *0 _ 04 31A P C 12 2 2 2_ 0 4 P C3 4. 7 u _ 2 5V _ X 5 R _ 0 8 P C 1 19 0 . 0 1 u_ 5 0 V _ X7 R _0 4 P R 13 8 P C5 4. 7 u _ 2 5V _ X 5 R _ 0 8 P C 12 1 CSP_ N V VD D P C 12 0 6 7 8 9 10 11 12 13 14 15 PR1 3 3 T3 T2 T1 T0 P C1 4. 7 u _ 25 V _ X 5 R _ 0 8 C SE SE SE SE 21 20 19 18 17 16 G D 1 6 . 2 K _1 % _ 0 4 P C1 1 3 S PR1 3 4 EAP SS PO K UG B OO T 1 0 K _ 1% _ 0 4 P C1 1 0 D P U8 uP 61 2 2 C OM P V ID0 V I D1 EN /P SM C SN P R1 3 9 P C2 D 12/22 P Q3 0 MD U 2 6noise 57 EMI? ? ? ? ,? 1 2 K _ 1% _ 0 4 C PR1 3 5 D 1 1 . 5 K _1 % _ 0 4 D 0_ 0 6 0 _ 04 P R1 4 0 5 4 3 2 1 Sheet 41 of 49 Power VGA NVVDD PR 2 4 1 C R B 0 5 4 0S 2 P R 12 8 1 u_ 6 . 3 V _ Y 5 V _0 4 B.Schematic Diagrams 0 _ 04 P R1 4 2 Schematic Diagrams AC IN, CHARGER 12/17 PWR CHANGE 0. 1 u _ 50 V _ Y 5 V _0 6 P C1 3 0 1 0_ 0 6 PR1 6 6 1 0 _0 6 4 . 7 u _2 5 V _ X 5R _ 08 4 . 7u _ 2 5V _ X 5 R _ 0 8 PC 8 P C 13 5 0 . 0 47 u _ 10 V _ X 7R _0 4 16 BST_ 12 1 0_ 0 6 A V DD P D P D 15 R B 0 54 0 S 2 L DR ICHP B S TOZ8681 I C H M 1 VAC VDD P IA CM 3 IA CP 2 AC A V 9 P R1 6 0 P C 13 2 1 00 K _ 0 4 1 00 0 P _ 50 V _ X 7 R _ 0 4 P C 12 7 *1 u _ 25 V _ 0 8 P C 1 36 * 1u _ 2 5V _ 0 8 5 IC HP 4 IC HM J BATTA1 11 V_ BAT 10 S M C _ B A T _R S M D _ B A T _R BAT _ DET SC L IA CM IA C IA CP C OMP ACAV 7 IA C1 8 C OM P 34 B A T_ D E T 12/06 net? ? PR2 3 5 0 _0 4 PR2 3 4 0 _0 4 6 V DDA P R 1 63 0_04 17 PU 9 13 S DA 15 S G H DR BASE C VAC C LX P R1 6 4 *1 5 mi l _ sh o rt _ 06 S M C_ B A T 34 S M D_ B A T 34 TO T A L_ C U R C3 6 9 5 4 3 2 1 t B T D -10 1 0 00 9 Sheet 42 of 49 AC IN, CHARGER 34 4 7P _5 0 V _ N P O _0 4 P C1 2 5 1u _ 2 5V _ 0 8 P C 1 37 P R1 6 2 1 00 _ 0 4 P C 1 23 1 u _ 10 V _ 0 6 1 2/17 PWRCHANGE 0 . 4 7 u_ 1 0 V _Y 5 V _0 4 P C 13 8 1 u _1 0 V _ 06 S M C_ B A T V DD 3 P R 1 59 1 0 0 _0 4 P R1 5 6 D 1 0K _ 0 4 C H G_ R S T P Q3 8 A C_ IN # G P Q 17 M TP 3 4 0 3N 3 S D M T N 7 0 02 Z H S 3 S 34 10 0 K _ 04 P R7 8 30 0 K _ 1% _ 0 4 B A T _V O L T 34 VA PR1 5 3 1 M_ 04 34 PQ 3 7 M T N 7 00 2 Z H S 3 G S V_ BAT D PR1 5 8 12/21 2) Use Kelvin connec tions for R3, R4 (sepe rate f orce and meas urement tr aces) P C 68 6 0 . 4 K _1 % _ 04 0 . 1 u_ 1 6 V _Y 5V _0 4 P R 1 54 2 0 0 K _1 % _ 04 D 1) Allp ower traces s hould be routed on the outer a l yers GNDP, VAD, VSYS, LX, VCHG, VBATT PR 7 9 V DD3 12/21 V D D3 G P Q2 0 M TN 7 00 2 Z H S 3 P R1 5 2 P R1 5 1 P R1 5 0 S PCB Lay out no tes G P R 85 1 0 0K _ 1 % _0 4 10 K _ 0 4 4. 7 K _ 0 4 4. 7 K _ 0 4 A C_ IN 36 C S M C_ B A T AC PD1 6 B A V 99 R E C T I F I E R 3) R23 and R24 are d ummy r esistors, f or layout pur poses only (ser ves as single point connec tion b etween GNDP& GNDA) A C S M D_ B A T 4) Foo tprint TO-236 is equivalent to SOT-23 AC PD1 7 B A V 99 R E C T I F I E R A 3 5 , 36 SYS3 V 3 5 VA 1 1 , 1 8, 2 7 , 3 0, 3 4 , 3 5, 3 6 , 3 7, 4 1 V D D 3 1 1, 35 , 3 6, 37 , 3 8 , 39 , 4 0 , 41 V IN C 5) Foo tprint SIP/1Pis a single hole axial pad B A T_ D E T AC PD1 8 B A V 99 R E C T I F I E R A 6) Allr esisitors, capa citor s and semiconductor s are SMD 7) Pote ntiometer s, and test poin ts are axial devices AC IN, CHARGER B - 43 B.Schematic Diagrams L DR P R 14 9 Reset circuit 12 /17 PWRCHANGE P C 12 6 0 . 1 u_ 5 0V _Y 5V _0 6 L X_ C H G 1 4 PQ 3 9 M T N 7 0 02 Z H S 3 P R 16 5 * 2 20 p _5 0 V _ N P O _0 4 P C 13 4 P C 2 10 4 . 7 u _2 5 V _ X 5 R _ 08 P C1 1 P R 2 40 * 5 . 1_ 0 6 3 P R4 0 . 0 2_ 1 % _3 2 4 . 7 u_ 2 5 V _X 5 R _0 8 P C1 2 5 6 7 ? ? JB AT TA 1 PL 5 T MP C 0 6 0 3H -6 R 8 M-Z 0 1 *4 . 7 u_ 2 5V _X 5 R _0 8 0 . 04 7 u _1 0 V _ X7 R _0 4 P Q1 B P D 1 5 03 Y V S 8 4. 7 u _ 25 V _ X 5 R _ 0 8 10 _ 0 6 P C1 3 3 P C1 0 P R1 15 K _ 0 4 4. 7 u _ 25 V _ X 5 R _ 0 8 P D 14 R B 05 4 0 S 2 2 1 PR1 5 7 4 P R2 10 0 K _ 0 4 A 0 . 1 u _5 0 V _ Y 5V _0 6 P R 1 23 0 . 02 _ 1 %_ 3 2 3 2 1 P R1 1 5 10 K _ 0 4 P Q1 A P D 1 5 0 3Y V S P C9 P C 1 05 1 2 GN D 1 GN D 2 V _B A T 12/ 22 EMI ? ? ,? n oi se ? ? 6. 8U H_7 .3 *6 .6* 2. 8M M 12/17 PWRCHANGE P Q2 8 M E P 4 4 35 Q8 1 0_ 0 6 8 7 6 5 4 . 7 u_ 2 5 V _X 5 R _0 8 VA PR 3 PL 2 H C B 4 5 32 K -8 0 0T 9 0 P C 10 8 J _ D C _J A C K 1 5 0 9 32 -0 0 30 1 - 0 01 PQ 2 M E P 4 43 5 Q8 5 6 7 8 1 2 3 * 4. 7 u _ 25 V _ X 5 R _ 0 8 * 47 0 K _ 04 V IN P C1 2 8 0 _ 04 P R 1 55 P C 12 9 P R 1 61 4 VA Schematic Diagrams AUDIO BOARD USB PORT A _U S B V C C AL 5 H C B 1 6 0 8K F - 12 1 T2 5 A _ US B V C C2 60 mil +A C 1 AC7 1 0 0u _ 6 . 3V _ B _ A 0 . 1u _ 1 6V _ Y 5V _ 0 4 A J _ USB 1 A US B _ P N1 A US B _ P P 1 A R1 0 AL 9 4 1 *1 0 mi l _ sh o rt _ 04 3 V+ A G ND AUSB _ PN1 _ R 2 AUSB _ PP 1 _ R 3 1 2 *A W C M2 0 1 2F 2 S -1 6 1T 0 3 D A TA _ L D A TA _ H G ND 1 GN D 2 G ND 3 GN D 4 Port1 4 A R1 1 G ND *1 0 mi l _ sh o rt _ 04 B.Schematic Diagrams U S 0 4 03 6 B C A 0 8 1 GN D 1 GN D 2 G ND 3 GN D 4 PIN SWAP 6-21-B49C0-104 6-21-B49B0-104 A G ND TO M/B AUDIO JACK Sheet 43 of 49 AUDIO BOARD A _ US B V CC F C M1 00 5 K F -1 2 1T 0 3 A M I C 1 -L F C M1 00 5 K F -1 2 1T 0 3 AL 6 5 A J _ MI C 1 4 3 R 2 L 6 1 2S J -T 3 51 -S 2 3 AC1 0 AC 4 10 0 p_ 5 0 V _N P O_ 0 4 1 0 0p _ 5 0V _ N P O_ 04 A J _ A U D I O1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 A M I C 1 -R A M I C 1 -L A H E A D P H ON E -R A H E A D P H ON E -L A M IC_ S E N S E A S P K _H P # A H P_ SENSE A U SB _ PN1 AU SB_ PP1 A S P K OU T R + A S P K OU T R - MIC IN 6-20-B2800-106 BLACK A _ AUD G A H P _S E N S E ASPK_ H P# A H E A D P H O N E -R A R3 6 8_ 0 4 AL 2 F C M1 0 0 5K F -12 1 T 03 A H E A D P H O N E -L A R5 6 8_ 0 4 AL 3 F C M1 0 0 5K F -12 1 T 03 8 72 1 3 -14 0 0 G A _ A U DG A MI C _ S E N S E A M I C 1 -R AL 4 5 A J _ HP 1 4 R 3 A R9 AR 8 A C3 *1 K _ 0 4 * 1K _ 0 4 1 00 p _ 50 V _ N P O _ 04 2 6 L 1 2S J -T 3 51 -S 2 3 AC2 1 00 p _5 0 V _ N P O _0 4 HEADPHONE 6-20-B2800-106 A GN D 6-20-53A00-114 BLACK A _ AUD G AC1 4 0 . 1 u_ 1 6V _Y 5V _ 0 4 AC1 5 0 . 1 u_ 1 6V _Y 5V _ 0 4 AC1 3 0 . 1 u_ 1 6V _Y 5V _ 0 4 AC1 6 0 . 1 u_ 1 6V _Y 5V _ 0 4 AL 7 F C M1 0 05 K F -1 2 1T 0 3 A S P K O UT R+ A L8 F C M1 0 05 K F -1 2 1T 0 3 AC1 1 1 0 00 p _ 50 V _ X 7R _ 04 A GN D A _ A UDG AC8 1 80 p _ 50 V _ N P O _0 4 A _ A UD G AH 1 C 59 D 59 A H3 C5 9 D5 9 A H2 2 3 4 5 A H4 1 9 8 7 6 2 3 4 5 M TH 2 76 D 1 1 1 A GN D B - 44 AUDIO BOARD 1 9 8 7 6 MT H 2 7 6 D 1 11 A GN D A G N D A G ND A J _ S P K R 1 J_SPK1 2 1 1 2 85 2 04 -0 2 00 1 8 5 20 4 -0 2R A S P K O UT R+ _ R A S P K O U T R -_ R A S P K OU T R - A C1 7 1 80 p _ 50 V _ N P O _ 04 6-20-43150-102 6-20-43110-102 Schematic Diagrams CLICK BOARD CLICK BOARD CGND 6- 20-9 4A50- 104 6- 20-9 4AA0- 104 6- 20-9 4A70- 104 CGND 6-2 1-91A 00-1 06 6-2 1-91A 10-1 06 6-2 0-94A 70-1 04 3 B AT L ED CD26 RY-SP155HYYG4- 1 2 RY- SP155HYYG4-1 4 Y CD27 CGND CGND CGND CGND 6-52- 5500 2-04B 6-52- 5500 1-040 6-52- 5500 2-042 6-21 -91A 00-10 6 6-21 -91A 10-10 6 6-20 -94A 70-10 4 CR358 22 0_04 220_04 SG 1 1 CLED_PWR 2 CLED_ACIN 3 CLED_BAT_FULL 4 CLED_BAT_CHG 5 6 85201-06051 2 CR361 POW ER ON LED 4 CGND CGND CJ_TP3 1 CTP_CLK 2 CTP_DATA 3 CTPBUTTON_L 4 CTPBUTTON_R 5 6 85201-06051 220_04 Y CGND CJ_TP2 CR359 220_04 1 6 -52-5 5002 -04B 6 -52-5 5001 -040 6 -52-5 5002 -042 Sheet 44 of 49 CLICK BOARD E5120Q CSW1~4 2 1 4 3 LI FT KE Y RIG HT KE Y 1 3 CTPBUTTON_L CGND CH3 1 9 8 7 6 2 CH1 3 4 1 5 MTH237D91 CGND 9 8 7 6 2 3 4 5 MTH237D91 CGND CGND CH4 1 9 8 7 6 2 3 4 5 MTH23 7D91 CGND CGND 2 4 CTPBUTTON_R CGND 6- 53-31 50B- 245 6- 53-30 50B- 240 6- 53-30 50B- 241 2 3 4 5 CSW2 TJG-532-V-T/R 5 6 2 4 5 6 1 3 CSW1 TJG-532-V-T/R CH2 1 6-5 3-315 0B-24 5 6-5 3-305 0B-24 0 6-5 3-305 0B-24 1 9 8 7 6 MTH237D91 CGND CGND CGND CLICK BOARD B - 45 B.Schematic Diagrams CGND CJ_TP1 1 CTP_DATA 2 CTP_CLK 3 4 85201- 04051 CR360 3 CC3 *0.1u_16V_Y5V_04 CVDD3 SG CC1 *0.1u_16V_Y5V_04 C5VS 2 CC2 0. 1u_16V_Y5V_04 C5VS CLED_BAT_FULL CLED_BAT_CHG 1 CLED_PWR CLED_ACIN Schematic Diagrams W251HPQ POWER SW BOARD S _ 3. 3 V S POWER SW & LED POWER SWITCH LED S R2 S _ 3 .3 V LID SWITCH IC SD 2 S _ 3 .3 V S 20mil C 22 0 _ 0 4 20mil *B A V 9 9 R E C T I F I E R S _ 3 .3 V 12/1 ? ? Z 43 0 1 S _3 . 3 V S R1 AC 1 0 0K _0 4 S C6 8 84 8 6 -0 80 1 S MG N D SC 2 C 0 . 1 u _1 6 V _ Y 5V _0 4 S M GN D 3 4 1 2 6-53-3150B-245 6-53-3050B-241 6-53-3050B-240 POWER BUTTON FOR W251HPQ/W255HP/E5125Q S MG N D S P W R_ S W 2 T J G-5 3 2 -V -T / R 2 4 1 3 2 4 S M_ B T N # 5 6 1 S M_ B T N # SC 7 SC 8 S D4 S D5 *0 . 1 u _ 5 0V _Y 5 V _ 0 6 0 . 1 u_ 5 0 V _ Y 5 V _ 0 6 2 * V 1 5A V L C 0 4 0 2 2 * V 1 5 A V L C0 4 0 2 12/1 ? ? ? VARIST OR VARIST OR 6-24 -3000 3-00 6 S MG N D FOR W251HNQ/W255HN S MH 3 H 6 _ 0B 7_ 0 D 2_ 3 S MG N D B - 46 W251HPQ POWER SW BOARD S MH 4 H 7 _ 0 B 6 _0 D 3 _0 S MG N D S MH 5 H 6 _ 0 B 7 _0 D 2 _3 S M GN D S MG N D 6 -24- 3000 3-00 6 S M GN D SU1, SU2 3 1 6-53-3150B-245 6-53-3050B-240 6-53-3050B-241 POWER BUTTON S P W R _S W 1 * T JG -5 3 3 -S -T / R 1 3 S M GN D S M GN D S M GN D 1 PSW1~2 5 6 B.Schematic Diagrams Sheet 45 of 49 W251HPQ POWER SW BOARD S M GN D *1 0 0 p_ 5 0 V _ N P O_ 0 4 S MG N D 6-52-56001-023 6-52-56001-028 6-52-56000-020 6-52-56001-022 6-02-00248-LC2 6-02-00268-LC1 FOR W251HNQ/W255HN S M H2 H 6 _ 0 B 7 _ 0D 2 _ 3 S C1 MH 2 4 8- A L F A -E S O 6-20-94K10-108 S M H1 H 6 _ 0 B 7 _ 0D 2 _ 3 S LI D _ S W # OU T G ND S M GN D H T -15 0 N B -D T C 6-52-56001-023 6-52-56001-028 6-52-56000-020 6-52-56001-022 S M GN D S A P _O N 2 V CC S D1 3 SD 3 * H T -1 5 0 N B - D T S M _ B T N# SW EB_ W W W # S W E B _ E MA I L # S L ID _ S W # 1 0 . 1u _ 1 6 V _ Y 5 V _ 0 4 20mil 1 2 3 4 5 6 7 8 A A A S U1 SJ _ SW 2 S MG N D FOR W251HPQ/W255HP/E5125Q 2 Schematic Diagrams W270HU BRIDGE ODD BOARD ODD BOARD FOR W270HU M/B ? ODDQJ_O board ? DD2 P1 P2 P3 P4 P5 P6 S1 S2 S3 S4 S5 S6 S7 Q_SATA_TXP1 Q_SATA_TXN 1 Q_SATA_RXN1 Q_SATA_RXP1 QGND Q GND Q_OD D_DETECT# Q_5VS Q_5VS Q_SATA_ODD_ DA# P1 P2 P3 P4 P5 P6 2 4200 1-1 PIN GN D1~2=WGND 202 001- 1 QGND PIN GN D1~3=QGND Q GND 6-21-14010-013 Sheet 46 of 49 W270HU BRIDGE ODD BOARD 6-21-13010-013(DIP) Q_5VS + QC1 *2 20u_ 6.3V_6 .3*6. 3*4.2 QC2 QC3 0.1u _16V_Y 5V_04 0.1 u_16 V_Y 5V_04 QGND QH1 C23 7D91 QH2 C23 7D91 QG ND Q GND QH3 C67D 67 QH 4 C6 7D67 W270HU BRIDGE ODD BOARD B - 47 B.Schematic Diagrams Q J_ODD1 S1 S2 S3 S4 S5 S6 S7 Schematic Diagrams W270HU POWER SW BOARD POWER SW & LED POW ER SWI TCH LED W_ 3.3VS W_3.3VS W_3. 3V LID SWITCH IC WD1 0. 1u_16V_Y5V_04 WR2 WR3 W_3.3V WR4 WR5 220_04 WMGND 2 20_04 20mi l 1 20mil WU1 3 A A A A 2 WLI D_SW# VCC OUT WC2 WC3 MH248-ALFA- ESO *100p_50 V_NPO_04 WMGND 0.1u_1 6V_Y5V_04 WD2 WD3 WD4 HT- 150NB-DT WMGND C HT-150NB- DT C Sheet 47 of 49 W270HU POWER SW BOARD WD5 HT-150 NB-DT C HT-150NB-DT C WMGND WMGND 6-02 -00 248- LC2 6-02 -00 268- LC1 LU1 3 1 WMGND 6- 52-5 600 1-02 3 6- 52-5 600 1-02 8 6- 52-5 600 0-02 0 6- 52-5 600 1-02 2 WSW1 3 4 1 3 W_3.3V WPWR_SW1 TJG-532-V-T/R 2 4 WM_BTN# 1 W_3.3VS POW ER B UTT ON 1 2 5 6 WJ_SW1 1 2 3 4 5 6 7 8 WC4 20mi l WD6 WMH4 WMH5 H7_0D2_3 H7_0D2_3 0.1u_ 50V_Y5V_0 6 *V15AVLC0402 WM_BTN# WWEB_WWW# WWEB_EMAIL# WLID_SW# WAP_ON 2 B.Schematic Diagrams 220_04 20mil GND 220_04 20mil VA RISTO R 6 -2 4- 30 00 3- 00 6 WMGND WMGND WMGND WMGND 88486-0801 6-20 -94 K10- 108 B - 48 W270HU POWER SW BOARD 6-5 3-31 50B- 245 6-5 3-30 50B- 241 *BAV99 RECTI FIER AC 100K_1%_04 A WR1 C WC1 WMGND WMH1 WMH2 C91D91N C91D91N 2 Schematic Diagrams Power Diagram 3.3V PW R SW B'd 1 M_BTN# 2.92A 1.05VS RTCVCC 3.3VS U34 1.05VS_VTT 3.3VS ALL_SYS_PWRGD 9 PU6 P2808B 2 PWR_SW# 1.5VS 4a RSMRST# U17 IT8518 RSMRST#, DPWROK 4b PWR_BTN# CPU 11 PMSYS_PWRGD_BUF DRAMPWROK PJ26 Alway s enabl e EN_5V PJ27 1.5VS_CPU 0.85VS SYS_PWROK SLP_S4# 0b VDD5 VIN 5 SUSC# 5V 0c USBVCC01 USB PORT1 U37 TPS2540 EN PJ7 EN PG 1.5V 6e VTT_MEM 5V USB 3.0 uPD720200 U9 GS7113 EN U22A DDR1.5V_PWRGD U11 5c 1.05V PJ5 PJ9 SUSB 3.3V 5b 1.5VS_CPU 5a 1.5V PU5 uP6163 EN 1.05VS 7 1.05VS_VTT PQ11 VIN VIN 6 SUSB# PQ27B 3a 3.3V VDD3 PQ64 VDD5 DD_ON# 3 DD_ON 3c USBVCC3.0 3b 5V U14 RT9715BGS EN PQ66 PQ27A USB PORT0 PJ6 PU4 AX6615 1.8VS_PWRGD EN PG VDD5 ? PLVDD 3.3V U22B 1.05VS_VTT_EN 6f 1.8VS 3.3V USB PORT3 Sheet 48 of 49 Power Diagram PQ57 6d 1.05VS PU11 PJ25 uP6127 1.05VS_PWRGD EN PG VIN EC 8 0.85VS PJ20 U22C PU10 9 uP6122 0.85VS_PWRGD ALL_SYS_PWRGD PG 6a 5VS PU1,PU2 NCP5199 PQ65 VIN PU12 NCP5199 ? NB_ENAVDD PANEL VDD3 6c 3.3VS ? 5VS_ODD 5VS 13a VCORE 18 VGFX_CORE 16 PEX_VDD PQ4 dGPU_PWR_EN# EC P0 Mode: NVVDD 23A U32 G5243 EN U26 ODD GPU PLT_RST# dGPU_RST# 3.3V U22D 16c 1.05VS PQ63 ? SATA_ODD_PWRGT 13b PU3 NCP6131S DELAY_PWRGD EN PG 14 SYS_PWROK EN Q6 SB 10 PM_PCH_PWROK U4 17 PERSTB# PEXRST# 1.5A PEX_VDD 0.1A 3V3_RUN 4A FBVDDQ 1.5V 6b 1.5VS 16a 3V3_RUN PQ24 1.5V 16d FBVDDQ 16b NVVDD PQ7 PU8 PJ1 uP6122 EN PS_NVVDD_PGOOD# PG 3.3V PQ35 ? 3G_3.3V VGA Frame Buffer A U7,U8,U30,U31 VGA Frame Buffer c U3,U5,U25,U28 Q30 EC ? 3G_POWER 5V ? CCD_EN 3G MINI CARD ? 5V_CCD U1 G5243 EN DVDD(1.2V) 3.3VS U18 CardReader JMC251C 3.3V WLAN MINI CARD 5VS Touch Pad 5VS 3.3VS U19 CODEC ALC269 5VS 3.3VS SATA HDD CCD Power Diagram B - 49 B.Schematic Diagrams DD_ON_EN_VDD VDD3 6A 1.5V SO-DIMM 1.8VS SYS_PWROK SLP_S3# 0 VIN VGFX_CORE RESET# 14 0a VDD3 1.05VS_VTT 33A 12A UNCOREPWRGOOD 15 PLT_RST# PLTRST# VIN VCORE 8.5A 1.2A 12 H_CPUPWRGD PWOCPWRGD PWROK, APWROK 48A SM_DRAMPWROK PWRBTN# 10 PM_PCH_PWROK PU7 uP6182 U29 Cougar Point VDD3 Schematic Diagrams Power On SEQ TOP 2 PWR_SW# 308ms 3 DD_ON 84ms 1.3ms 3.3V rise time=960us 3a 3.3V 2.12ms 5V rise time=1.7ms 3b 5V 4a RSMRST# B.Schematic Diagrams 123ms 1.026ms 5b 1.5VS_CPU (PJ5) (C636.1) 1.026ms 6 SUSB# 6 (PQ27.5) SUSB# (J_MB1.1) (PQ65.1) 6a 5VS 6b 1.5VS (PQ24.4) 6b 1.5VS 6c 3.3VS (L35.2) (PQ63.1) 6c 3.3VS 6d 1.05VS (PQ4.8) (PJ25) 6d 1.05VS 6e VTT_MEM (PJ7) (JDIMM2.203) 6e VTT_MEM 6f 1.8VS (PJ6) (C633.1) 6f 1.8VS 7 1.05VS_VTT(C232.1) (PQ57.1) 7 1.05VS_VTT 8 0.85VS (PJ20) 8 0.85VS (C148.1) 9 ALL_SYS_PWRGD (U22.8)(U27.13) 9 ALL_SYS_PWRGD (PQ64.1) (U14.3) (PQ66.1) 4a RSMRST# (U17.35) 4b PWR_BTN# (U17.33) 5 SUSC# (PQ11.5) 5VS? ? ? ? ? 1V 984us 1.31ms 1.05VS rise time=753us 1.34ms 1.05VS rise time=932us 1.5ms 2.2ms 1.8VS rise time=442us 4.75ms 1.05VS_VTT rise time=336us 5.694ms 1.05VS_VTT rise time=672us 6.5ms 99ms 11 PMSYS_PWRGD_BUF(U10.4) 11 PMSYS_PWRGD_BUF 12 H_CPUPWRGD (R82) (C156.1) 12 H_CPUPWRGD (PC147.1) (? SVID? ? ? ? ? ? ? ) 13b DELAY_PWRGD(U22.12) (U20.16) 14 SYS_PWROK (U33.1) 16 dGPU_PWR_EN# (PQ5.G) (PQ36.2) (Q7.5) 13a VCORE 13b DELAY_PWRGD 14 SYS_PWROK (U22.11) 15 PLT_RST# 166ms 201ms 212.8ms 214ms 214ms 216.2 16 dGPU_PWR_EN# (PQ35.4) 16a 3V3_RUN 16b NVVDD (PJ1) (PC122.1) 16b NVVDD 16c PEX_VDD (PQ4.1) (L8.1) 16c 16d FBVDDQ (PQ8.1)) (C601.1) 16d FBVDDQ 17 PERSTB# (U44.4) 18 VGFX_CORE (C166.1) B - 50 Power On SEQ 749us 5VS rise time=376us 10 PM_PCH_PWROK 16a 3V3_RUN (PU4.5) 3b 5V 36us 10 PM_PCH_PWROK (U22.13) 15 PLT_RST# (PQ27.2) 3a 3.3V 5.898ms 1.05V rise time=2.372ms (U9.4) 6a 5VS 13a VCORE 3 DD_ON BOT 204ms BOT (C644.1) 5b 1.05V Sheet 49 of 49 Power On SEQ 173ms TOP (PJ9) 5a 1.5V (PU6.6) 91.6ms 4b PWR_BTN# 5 SUSC# 2 PWR_SW# PEX_VDD 17 PERSTB# (C575.1) (? SVID? ? ? ? ? ? ? ) 18 VGFX_CORE 1.78s 75us 1.087ms NVVDD rise time=677us 1.87ms PEX_VDD rise time=652us 4.6ms FBVDDQ rise time=1.23ms 188ms 530ms 3.54s 1.5V 1.05V BIOS Update Appendix C:Updating the FLASH ROM BIOS To update the FLASH ROM BIOS you must: • • • • • • • Download the BIOS 1. Go to www.clevo.com.tw and point to E-Services and click E-Channel. 2. Use your user ID and password to access the appropriate download area (BIOS), and download the latest BIOS files (the BIOS file will be contained in a batch file that may be run directly once unzipped) for your computer model (see sidebar for important information on BIOS versions). Unzip the downloaded files to a bootable CD/DVD/ or USB Flash drive 1. Insert a bootable CD/DVD/USB flash drive into the CD/DVD drive/USB port of the computer containing the downloaded files. 2. Use a tool such as Winzip or Winrar to unzip all the BIOS files and refresh tools to your bootable CD/DVD/USB flash drive (you may need to create a bootable CD/DVD with the files using a 3rd party software). BIOS Version Make sure you download the latest correct version of the BIOS appropriate for the computer model you are working on. You should only download BIOS versions that are V1.01.XX or higher as appropriate for your computer model. Note that BIOS versions are not backward compatible and therefore you may not downgrade your BIOS to an older version after upgrading to a later version (e.g if you upgrade a BIOS to ver 1.01.05, you MAY NOT then go back and flash the BIOS to ver 1.01.04). Set the computer to boot from the external drive 1. With the bootable CD/DVD/USB flash drive containing the BIOS files in your CD/DVD drive/USB port, restart the computer and press F2 (in most cases) to enter the BIOS. 2. Use the arrow keys to highlight the Boot menu. 3. Use the “+” and “-” keys to move boot devices up and down the priority order. 4. Make sure that the CD/DVD drive/USB flash drive is set first in the boot priority of the BIOS. 5. Press F4 to save any changes you have made and exit the BIOS to restart the computer. C - 1 C:BIOS Update Download the BIOS update from the web site. Unzip the files onto a bootable CD/DVD/USB Flash Drive. Reboot your computer from an external CD/DVD/USB Flash Drive. Use the flash tools to update the flash BIOS using the commands indicated below. Restart the computer booting from the HDD and press F2 at startup enter the BIOS. Load setup defaults from the BIOS and save the default settings and exit the BIOS to restart the computer. After rebooting the computer you may restart the computer again and make any required changes to the default BIOS settings. BIOS Update Use the flash tools to update the BIOS 1. Make sure you are not loading any memory management programs such as HIMEM by holding the F8 key as you see the message “Starting MS-DOS”. You will then be prompted to give “Y” or “N” responses to the programs being loaded by DOS. Choose “N” for any memory management programs. 2. You should now be at the DOS prompt e.g: DISK C:\> (C is the designated drive letter for the CD/DVD drive/USB flash drive). 3. Type the following command at the DOS prompt: C:BIOS Update C:\> Flash.bat 4. The utility will then proceed to flash the BIOS. 5. You should then be prompted to press any key to restart the system or turn the power off, and then on again but make sure you remove the CD/DVD/USB flash drive from the CD/DVD drive/USB port before the computer restarts. Restart the computer (booting from the HDD) 1. With the CD/DVD/USB flash drive removed from the CD/DVD drive/USB port the computer should restart from the HDD. 2. Press F2 as the computer restarts to enter the BIOS. 3. Use the arrow keys to highlight the Exit menu. 4. Select Load Setup Defaults (or press F3) and select “Yes” to confirm the selection. 5. Press F4 to save any changes you have made and exit the BIOS to restart the computer. Your computer is now running normally with the updated BIOS You may now enter the BIOS and make any changes you require to the default settings. C-2 www.s-manuals.com
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