Compal LA 1181 Schematics. Www.s Manuals.com. R4 Schematics

User Manual: Motherboard Compal LA-1181 ADY11 Tang - Schematics. Free.

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Page Count: 42

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

2002-02-04

uFCBGA/uFCPGA Coppermine-T or Tualatin

REV: 4

Tang/TangBTO Schematics Document

ADY11 LA-1181 3A

Cover Sheet

1 41Monday, February 04, 2002

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

PCI BUS

LPC BUS

Clock Generator

USB conn

uFCBGA/uFCPGA CPU

CardBus Controller

Almador-M

GMCH-M

HUB Link

HD#(0..63)HA#(3..31)

Compal confidential

Model Name :ADY11(Tang)

AMP& Phone

Jack

page 4,5

page 15

page 21

page 24

page 14

page 8,9,10

page 30

File Name : LA-1181 Coppermine-T or

Tualatin

Block Diagram

Power Circuit

DC/DC

page

32,33,34,35,36,37

Slot 0

page 22

page 31

DC/DC Interface

Suspend

IDE Connector

(HDD/CR-ROM)

page 19

AC97

Codec

page 23

SIOPIO

FDD

page 27 page 27

page 19

NS PC87393

page 26

Power On/Off

Reset & RTC

page 30

PSB

ICH3-M

BIOS

Int.KBD

Touch Pad

14M_5V EC 87570

PS/2 conn

page 28

page 27

page 29 page 27

page 29

EC I/O Buffer

page 29

LPC to X-BUS

& Super I/O

X BUS

OZ 6912

DVO Link

Memory BUS

CPU Bypass

& CPUVID

page 6

133MHz

1.8V 66MHz

3.3V 33MHz

3.3V 133MHz

3.3V 48MHz

3.3V 24.576MHz

3.3V ATA100

3.3V 33MHz

LAN

3COM -3C920

page 20

MDC

page 25

page 7

VCH Conn

page 15

625 BGA

421 BGA

page 16,17

SO-DIMM X2

BANK 0, 1, 2, 3page 12,13

VCH

Board

Thermal Sensor

MAX6654 W320-04

page 5

Fan Control

page 7

STAC9700

RJ45

page 20

IDSEL:AD17

(PIRQA#,GNT# 3,REQ#3)

IDSEL:AD20

(PIRQA/B#,GN T#2,REQ#2) AC-LINK

ITP Connector

CRT Connector

PCI debug

port

page 27

ADY11 LA-1181 3A

Block Diagram

2 41Wednesday, January 23, 2002

Compal Electronics, Inc.

Title

SizeDocument Number Rev

Date: Sheet of

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,I

NC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF

THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE

INFORMATION CONTAINS MAY BE

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF

COMPAL ELECTRONICS,INC.

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Compal Electronics, Inc.

SST-Build

FW82830MG FW82801CAM

QB63QB88

3C920-ST06CHIPS Rev CHIPS Rev

Lot:M28010

DC:C0117

SST2-Build Lot:M28010

DC:C0117

QC34 QB62

PT-Build QB62 Lot:M28010

DC:C0117

TangM2P3

FDD

PS/2

Series port

Parallel port

RJ45

Function

Model

3Com Lan

chipset(3C920)

YES

YES

NO

YES

YES

NO

YES

NO

YES

NO

NOYES

Note:"@" means all model depop

"#" means Tang depop

Note:"@" means all model depop

"&" means M2P3 depop

"#" means Tang depop

Lot:M28010

DC:C0117

ST-Build

QC34

QC34 QC42

ADY11 LA-1181 2

Note & Revision

3 41Friday, November 16, 2001

Title

Size Document Number Rev

Date: Sheet of

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

Mobile

Tualatin

Address

Lines

Request

Signals

Interface

Error

Arbitration

Signals

VCC

Snoop

Signals VSS VCC

Data

Signals

ADY11 LA-1181 2

Mobile Tualatin uFCPGA

4 41Friday, November 16, 2001

Compal Electronics, Inc.

Title

SizeDocument Number Rev

Date: Sheet of

HD#[0..63]

HREQ#[0..4]

HA#[3..31]

HD#52

HD#43

HD#14

HA#27

HA#14

HA#11

HD#41

HD#40

HD#39

HD#38

HD#9

HA#22

HA#20

HA#12

HD#26

HD#25

HD#63

HD#19

HD#15

HD#10

HREQ#4

HA#23

HA#17

HD#33

HD#16

HA#30

HA#21

HA#9

HA#3

HD#51

HD#50

HD#42

HD#32

HD#31

HD#30

HD#12

HA#16

HA#26

HA#24

HA#18

HD#62

HD#8

HD#6

HD#11

HD#5

HD#3

HA#31

HA#29

HD#57

HD#56

HD#55

HD#54

HD#53

HD#49

HD#48

HD#47

HD#46

HD#45

HD#44

HD#18

HD#29

HD#1

HD#0

HREQ#3

HD#28

HD#27

HREQ#2

HREQ#1

HREQ#0

HA#28

HA#15

HA#7

HA#6

HA#4

HD#24

HD#23

HD#22

HD#21

HD#20

HD#17

HD#13

HD#2

HA#25

HA#10

HA#5

HD#61

HD#60

HD#7

HD#4

HA#13

HA#8

HD#59

HD#58

HD#37

HD#36

HD#35

HD#34

HA#19

+CPU_CORE

+1.5VS

+CPU_CORE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,I

NC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF

THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE

INFORMATION CONTAINS MAY BE

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF

COMPAL ELECTRONICS,INC.

R108 1.5K

1 2

R121 10_0402

1 2

U5A

TUALATIN

K1

J1

G2

K3

J2

H3

G1

A3

J3

H1

D3

F3

G3

C2

B5

B11

C6

B9

B7

C8

A8

A10

B3

A13

A9

C3

C12

C10

A6

A15

A14

B13

A12

R1

L3

T1

U1

L1

T4

AA3

W2

AB3

P3

C14

AF23

AF4

L2

R2

AD23

C22

C4

A7

V3

T3

U2

AA2

A16

B17

A17

D23

B19

C20

C16

A20

A22

A19

A23

A24

C18

D24

B24

A18

E23

B21

B23

E26

C24

F24

D25

E24

B25

G24

H24

F26

L24

H25

C26

K24

G26

K25

J24

K26

F25

N26

J26

M24

U26

P25

L26

R24

R26

M25

V25

T24

M26

P24

AA26

T26

U24

Y25

W26

V26

AB25

T25

Y24

W24

Y26

AB24

AA24

V24

D22

F22

E21

H22

G21

K22

J21

M22

L21

P22

N21

T22

R21

V22

U21

Y22

W21

AB22

AA21

AC21

D20

F20

E19

AB20

AA19

AC19

D18

F18

E17

AB18

AA17

AC17

D16

F16

E15

AB16

AA15

AC15

D14

F14

E13

AB14

AA13

AC13

D12

F12

E11

AB12

AA11

AC11

D10

F10

E9

AB10

AA9

AC9

D8

F8

E7

AB8

AA7

AC7

D6

F6

E5

H6

G5

K6

J5

N5

T6

V6

U5

Y6

W5

AB6

AA5

AC5

M6

P6

E16

R4

E25

G25

J25

L25

N25

R25

U25

W25

AA25

AC25

AF25

AE26

C23

F23

H23

K23

M23

P23

T23

V23

Y23

AB23

AE23

B22

D21

F21

E22

H21

G22

K21

J22

M21

L22

P21

N22

T21

R22

V21

U22

Y21

W22

AB21

AA22

AC22

AE21

B20

D19

AB19

AA20

AC20

AE19

B18

D17

F17

E18

AB17

A#3

A#4

A#5

A#6

A#7

A#8

A#9

A#10

A#11

A#12

A#13

A#14

A#15

A#16

A#17

A#18

A#19

A#20

A#21

A#22

A#23

A#24

A#25

A#26

A#27

A#28

A#29

A#30

A#31

A#32

A#33

A#34

A#35

REQ#0

REQ#1

REQ#2

REQ#3

REQ#4

RP#

ADS#

AERR#

AP#0

AP#1

BERR#

BINIT#

IERR#

BNR#

BPRI#

NC

NC

NC

BREQ0#

LOCK#

DEFER#

HITM#

HIT#

D#0

D#1

D#2

D#3

D#4

D#5

D#6

D#7

D#8

D#9

D#10

D#11

D#12

D#13

D#14

D#15

D#16

D#17

D#18

D#19

D#20

D#21

D#22

D#23

D#24

D#25

D#26

D#27

D#28

D#29

D#30

D#31

D#32

D#33

D#34

D#35

D#36

D#37

D#38

D#39

D#40

D#41

D#42

D#43

D#44

D#45

D#46

D#47

D#48

D#49

D#50

D#51

D#52

D#53

D#54

D#55

D#56

D#57

D#58

D#59

D#60

D#61

D#62

D#63

VCC_0

VCC_1

VCC_2

VCC_3

VCC_4

VCC_5

VCC_6

VCC_7

VCC_8

VCC_9

VCC_10

VCC_11

VCC_12

VCC_13

VCC_14

VCC_15

VCC_16

VCC_17

VCC_18

VCC_19

VCC_20

VCC_21

VCC_22

VCC_23

VCC_24

VCC_25

VCC_26

VCC_27

VCC_28

VCC_29

VCC_30

VCC_31

VCC_32

VCC_33

VCC_34

VCC_35

VCC_36

VCC_37

VCC_38

VCC_39

VCC_40

VCC_41

VCC_42

VCC_43

VCC_44

VCC_45

VCC_46

VCC_47

VCC_48

VCC_49

VCC_50

VCC_51

VCC_52

VCC_53

VCC_54

VCC_55

VCC_56

VCC_57

VCC_58

VCC_59

VCC_61

VCC_62

VCC_63

VCC_64

VCC_65

VCC_66

VCC_67

VCC_68

VCC_69

VCC_70

VCC_71

VCC_72

VCC_73

VCC_74

VCC_75

VCC_76

VCC_77

VCC_78

VCC_79

VCC_80

VSS_0

VSS_1

VSS_2

VSS_3

VSS_4

VSS_5

VSS_6

VSS_7

VSS_8

VSS_9

VSS_10

VSS_11

VSS_12

VSS_13

VSS_14

VSS_15

VSS_16

VSS_17

VSS_18

VSS_19

VSS_20

VSS_21

VSS_22

VSS_23

VSS_24

VSS_25

VSS_26

VSS_27

VSS_28

VSS_29

VSS_30

VSS_31

VSS_32

VSS_33

VSS_34

VSS_35

VSS_36

VSS_37

VSS_38

VSS_39

VSS_40

VSS_41

VSS_42

VSS_43

VSS_44

VSS_45

VSS_46

VSS_47

VSS_48

VSS_49

VSS_50

VSS_51

VSS_52

VSS_53

VSS_54

VSS_55

VSS_56

VSS_57

HA#[3..31]<8>

HREQ#[0..4]<8>

HD#[0..63] <8>

HADS#<8>

HBNR#<8> HBPRI#<8>

HLOCK#<8>

HIT#<8>

HITM#<8>

HDEFER#<8>

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

Place

R_K<0.1"

from CPU

Note :

GHI# Pull-Up internally

Mobile

Tualatin

Data

Compatibility

Signals

VTT Ref

Analog

VCCTVID

Test

Access

PORT

( ITP )

Debug

Break

Point

APIC

Request

Signals GND

If used ITP port mu st depop

GTL Reference Voltage

1. Place R_A and R_B between and GMCH and CPU.

2. Place decoupling caps near CPU.(Within 500mils)

Layout note :

R_A

R_B

Address :1001_110X

W=15mil

Thermal Sensor

MAX6654MEE

CMOS Reference Voltage

1. Place R_E1 and R_F near CPU.

2. Place decoupling caps near CPU.

Layout note :

R_E

R_F

R_K

ADY11 LA-1181 2

Mobile Tualatin uFCPGA & Thermal sensor

5 41Friday, November 16, 2001

Compal Electronics, Inc.

Title

SizeDocument Number Rev

Date: Sheet of

ITP_TCK

H_THERMDA

H_IGNNE#

H_INTR

TESTHI2

H_THERMDC

ITP_TDI

H_A20M#

CLK_HCLK#

TESTLO2

TESTHI1

ITP_TMS

ITP_TRST#

ITP_PREQ#

CLK_HCLK

H_NMI

TESTLO1

+VTT_PLL

ITP_TDO

VTT_PWRGD

ITP_PRDY#

ITP_TDI

ITP_TMS

ITP_TRST#

ITP_TCK

ITP_PREQ#

ITP_PRDY#

TESTHI1

TESTHI2

TESTLO1

TESTLO2

+VTT_C

VTT_PWRGD

H_THERMDA

H_THERMDC

+VTT_PLLIN

+3VS

+VTT

+CPU_CORE

+V_AGTLREF

+VTT

+VTT

+VS_CMOSREF

+VTT

+1.5VS

+1.5VS

+1.5VS

+1.8VS

+VTT

+VTT

+1.5VS

+VTT

+VTT

+V_AGTLREF

+5VALW

+5VALW

+5VALW

+1.5VS

+VS_CMOSREF

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,I

NC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF

THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE

INFORMATION CONTAINS MAY BE

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF

COMPAL ELECTRONICS,INC.

R24

1.5K

12

R18

1.5K

12

R28

56.2_1%

12

R34 110_1%

1 2

R37

150

12

R30 56.2_1%

1 2

R134 14_1%

1 2

R19

3K

12

R36

150

12

R6

10K_0402

12

L22 FLM-201209-4R7K

1 2

R11

1K_0402

12

Q2

3904

23

1

C38

@10PF_0402

R35

@33_0402

1 2

U5B

TUALATIN

Y3

V1

U3

M5

W1

AC3

AF6

AF5

AD9

AD3

AB4

AE4

AF8

AD15

AE14

AE6

B15

Y1

W3

AF14

AF13

AF10

AE12

AF16

AE20

AF22

AD22

AD21

AD7

AD10

AD11

AF7

AF15

AF19

AE22

AD5

AF12

AE16

L5

AF21

AB26

H26

A21

AF9

A4

N1

AA1

Y4

R5

N3

N2

P1

P5

E1

F1

AC1

AD1

M1

AF18

AD16

AF11

AE8

N24

E2

P4

AD19

AD17

AF20

AE10

AE24

AD25

AE25

AC24

AF24

AD26

AC26

AD24

AD4

A5

D1

AD13

B1

P26

A11

E3

D26

AA18

AC18

AE17

B16

D15

F15

AB15

AA16

AC16

AE15

B14

D13

F13

E14

AB13

AA14

AC14

AE13

B12

D11

F11

E12

AB11

AA12

AC12

AE11

B10

D9

F9

E10

AB9

AA10

AC10

AE9

B8

D7

F7

E8

AB7

AA8

AC8

AE7

B6

F5

H5

G6

K5

J6

N6

L6

T5

R6

V5

U6

Y5

W6

AB5

AA6

AC6

AE5

B4

D4

F4

H4

K4

M3

U4

W4

B2

D2

F2

H2

K2

M2

P2

T2

V2

Y2

AB2

AD2

AE1

A25

C25

E20

F19

A26

G23

J23

L23

N23

R23

U23

W23

AA23

C21

C19

AD20

C17

AD18

C15

C13

AD14

C11

AD12

C9

C7

AD8

C5

AD6

AC23

AA4

E4

G4

J4

L4

AC4

V4

AE3

AF2

AF1

AE18

D5

E6

AB1

AC2

AE2

AF3

R3

B26

M4

AF26

C1

AF17

N4

RS#0

RS#1

RS#2

RSP#

TRDY#

A20M#

FERR#

FLUSH#

IGNNE#

SMI#

PWRGOOD

STPCLK#

DPSLP#

INTR/LINT0

NMI/LINT1

INIT#

RESET#

DRDY#

DBSY#

THERMDC

THERMDA

SELFSB1

SELFSB0

EDGECTRLP

RP3#

RP2#

BPM0#

BPM1#

TDI

TCK

TDO

TMS

TRST#

PREQ#

PRDY#

CMOSREF_0

CMOSREF_1

RTTIMPDEP

GHI#

VREF_1

VREF_2

VREF_3

VREF_4

VREF_5

VREF_6

VREF_7

VREF_8

TESTLO

VCC

PLL1

PLL2

NC

NC

NC

NC

CLK0

CLK0#

TESTLO

NC

NCHCTRLP

TESTHI

NC

NC

TESTHI

NC

PICD0

PICD1

PICCLK

NC

DEP#0

DEP#1

DEP#2

DEP#3

DEP#4

DEP#5

DEP#6

DEP#7

NC_1

NC_2

NC_3

NC_4

NC_5

NC_6

NC_7

VTTPWRGOOD

NC

VSS_58

VSS_59

VSS_60

VSS_61

VSS_62

VSS_63

VSS_64

VSS_65

VSS_66

VSS_67

VSS_68

VSS_69

VSS_70

VSS_71

VSS_72

VSS_73

VSS_74

VSS_75

VSS_76

VSS_77

VSS_78

VSS_79

VSS_80

VSS_81

VSS_82

VSS_83

VSS_84

VSS_85

VSS_86

VSS_87

VSS_88

VSS_89

VSS_90

VSS_91

VSS_92

VSS_93

VSS_94

VSS_95

VSS_96

VSS_97

VSS_98

VSS_99

VSS_100

VSS_101

VSS_102

VSS_103

VSS_104

VSS_105

VSS_106

VSS_107

VSS_108

VSS_109

VSS_110

VSS_111

VSS_112

VSS_113

VSS_114

VSS_115

VSS_116

VSS_117

VSS_118

VSS_119

VSS_120

VSS_121

VSS_122

VSS_123

VSS_124

VSS_125

VSS_126

VSS_127

VSS_128

VSS_129

VSS_130

VSS_131

VSS_132

VSS_133

VSS_134

VSS_135

VSS_136

VSS_137

VSS_138

VSS_139

VSS_140

VSS_141

VSS_142

VCCT_1

VCCT_2

VCCT_3

VCCT_4

VCCT_5

VCCT_6

VCCT_7

VCCT_8

VCCT_9

VCCT_10

VCCT_11

VCCT_12

VCCT_13

VCCT_14

VCCT_15

VCCT_16

VCCT_17

VCCT_18

VCCT_19

VCCT_20

VCCT_21

VCCT_22

VCCT_23

VCCT_24

VCCT_25

VCCT_26

VCCT_27

VCCT_28

VCCT_29

VCCT_30

VCCT_31

VCCT_32

VCCT_33

VCCT_34

VCCT_35

VCCT_36

VCCT_37

VCCT_38

VID0

VID1

VID2

VID3

VID4

VSS

VSS

VSS

NC

NC

NC

RP6 8P4R_1.5K

1 8

2 7

3 6

4 5

R136 1.5K

12

R38 56.2_1%

12

R7 1K_0402

12

R10 1K_0402

12

R25 1K_0402

12

R9 1K_0402

12

+

C22

33UF_D2_16V

R14

19.6K

1 2

R31

1K_1%

12

R21

2K_1%

12

C26

.1UF_0402

12

C41

.1UF_0402

12

C30

.1UF_0402

12

C36

.1UF_0402

12

R26

10K_0402

1 2

C34

2200PF

12

C35

.1UF_0402

1 2

R23

1K_0402

1 2

R27

10K_0402

1 2

R29 1K_0402

12

R20

499_1%

12

C33

.1UF_0402

12

R22

1K_1%

12

C31

.1UF_0402

12

C25

.1UF_0402

12

U6

MAX6654MEE

1

2

3

4

5

6

7

8 9

10

11

12

13

14

15

16

NC

VCC

DXP

DXN

NC

ADD1

GND

GND NC

ADD0

ALERT

SMBDATA

NC

SMBCLK

STBY

NC

R15

0_0402

12

H_RS#0<8> H_RS#1<8> H_RS#2<8>

H_TRDY#<8>

H_A20M#<16>

H_IGNNE#<16> H_SMI#<16>

H_STPCLK#<16> H_DPSLP#<16,32> H_INTR<16> H_NMI<16>H_INIT#<16>

H_DBSY#<8> H_DRDY#<8>

H_BSEL0<14> H_BSEL1<14>

CLK_CPU_APIC<14>

PM_CPUPERF#<16>

CLK_HCLK <14>

CLK_HCLK# <14>

CPU_VR_VID4 <6>

CPU_VR_VID1 <6>

CPU_VR_VID2 <6>

CPU_VR_VID0 <6>

CPU_VR_VID3 <6>

SMB_EC_DA1 <15,28,29,33>

SMB_EC_CK1 <15,28,29,33>

H_PWRGD<16>

H_FERR#<16>

H_RESET#<8>

ITP_TCK<7> ITP_TDI<7> ITP_TDO<7> ITP_TMS<7>

ITP_TRST#<7> ITP_PREQ#<7>

VTT_PWRGD# <14,28>

VTT_PWRGD<32>

ITP_PRDY#<7>

THRM# <29>

PICD0<16> PICD1<16>

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

EMI Clip PAD for CPU

Layout note :

Place .22uF caps underneath balls on solder side.

Use 2~3 vias per PAD.

Place 10uF caps on the peripheral near balls.

Place close to CPU, Use 2~3 vias per PAD.

Pls used X7R(uFCPGA EMTS Rev0.7)

Pls used X7R(uFCPGA EMTS Rev0.7)

Pls used X7R(uFCPGA EMTS Rev0.7)

Pls used X7R(uFCPGA EMTS Rev0.7)

Place close to CPU,

Use 2 vias per PAD.

Layout note :

CPU Voltage ID

PM_GMUXSEL = 0 : for low Voltage A-C

1 : for high Voltage B-C

D4 D3 D2 D1 D0 CPU_Core(V) ES(before MP)

-------------------------------------------------------

0 0 1 0 1 1.50V

1.15V0 1 1 0 0

-------------------------------------------------------

D4 D3 D2 D1 D0 CPU_Core(V) QS ( MP)

-------------------------------------------------------

0 1 1.40V

1.15V0 1 1 0 0

-------------------------------------------------------

Tualatin Coppermine-T

D4 D3 D2 D1 D0 CPU_Core(V) ES(before MP)

------------------------------------------------------ -

0 0 0 0 1 1.70V

1.35V0 1 0 0 0

------------------------------------------------------ -

D4 D3 D2 D1 D0 CPU_Core(V) QS ( MP)

------------------------------------------------------ -

0

1 0

0

00

0

0

------------------------------------------------------ -

10

1.35V

1.70V0 1 1

ADY11 LA-1181 2

CPU Bypass & CPU VID

6 41Friday, November 16, 2001

Compal Electronics, Inc.

Title

SizeDocument Number Rev

Date: Sheet of

CPU_VID3

CPU_VID2

CPU_VID1

CPU_VID0

CPU_VID4

+CPU_CORE

+CPU_CORE

+CPU_CORE

+CPU_CORE

+CPU_CORE

+CPU_CORE

+VTT

+VTT

+CPU_CORE

+3VS

+5VS

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,I

NC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF

THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE

INFORMATION CONTAINS MAY BE

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF

COMPAL ELECTRONICS,INC.

PAD2

PAD-2.5X3

1

PAD7

PAD-2.5X3

1

PAD6

PAD-2.5X3

1

PAD8

PAD-2.5X3

1

C234

.22UF_X7R

12

C230

.22UF_X7R

12

C146

.22UF_X7R

12

C196

.22UF_X7R

12

C216

.22UF_X7R

12

C229

.22UF_X7R

12

C205

.22UF_X7R

12

C233

.22UF_X7R

12

C142

.22UF_X7R

12

C188

.22UF_X7R

12

C228

.22UF_X7R

12

C235

.22UF_X7R

12

C212

.22UF_X7R

12

C192

.22UF_X7R

12

C194

.22UF_X7R

12

C165

.22UF_X7R

12

C231

.22UF_X7R

12

C145

.22UF_X7R

12

C143

.22UF_X7R

12

C141

.22UF_X7R

12

C174

.22UF_X7R

12

C200

10UF_10V_1206

12

C202

10UF_10V_1206

12

C28

10UF_10V_1206

12

C183

10UF_10V_1206

12

C151

10UF_10V_1206

12

C191

10UF_10V_1206

12

C24

10UF_10V_1206

12

C184

10UF_10V_1206

12

+C29

220UF_D2_4V

12

+C126

@220UF_D2_4V

12

+C292

220UF_D2_4V

12

+C153

220UF_D2_4V

12

+C293

@220UF_D2_4V

12

+C210

@220UF_D2_4V

12

+C119

220UF_D2_4V

12

+C260

220UF_D2_4V

12

C173

.22UF_X7R

12

C144

.22UF_X7R

12

C164

.22UF_X7R

12

C201

10UF_10V_1206

12

C182

10UF_10V_1206

12

+C118

@220UF_D2_4V

12

C130

1UF

12

C135

1UF

12

C152

1UF

12

+C37

220UF_D2_4V

12

C129

1UF

12

C248

1UF

12

C249

1UF

12

C222

1UF

12

C227

1UF

12

C199

1UF

12

C123

1UF

12

+C283

220UF_D2_4V

12

+C32

220UF_D2_4V

12

+C289

220UF_D2_4V

12

C455

.01UF_0402

12

U24

SN74CBT3383

1

23

4 5

67

8 9

1011

1213

14 15

1617

18 19

2021

22 23

24

BE#

C0A0

B0 D0

C1A1

B1 D1

C2A2

GNDBX

B2 D2

C3A3

B3 D3

C4A4

B4 D4

VCC

RP7

8P4R_1K

18 27 36 45

R257

1K_0402

12

AC_VID1<17>

AC_VID3<17>

AC_VID0<17>

PM_GMUXSEL<16,32>

AC_VID2<17>

AC_VID4<17>

CPU_VR_VID3<5>

CPU_VR_VID1<5>

CPU_VR_VID4<5>

CPU_VR_VID2<5>

CPU_VR_VID0<5> CPU_VID0 <32>

CPU_VID1 <32>

CPU_VID2 <32>

CPU_VID3 <32>

CPU_VID4 <32>

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

ITP PORT

COMPAL Electronics,Inc

+5VS POWER

Fan Control circuit

ADY11 LA-1181 2

ITP PORT & Fan control

7 41Friday, November 16, 2001

Title

Size Document Number Rev

Date: Sheet of

ITP_PRDY#

ITP_TDI

ITP_TRST#

ITP_TDO

ITP_PREQ#

ITP_TCK

ITP_TMS

+5VFAN

+VTT +3VS +VTT +VTT+1.5VS +1.5VS

+12VALW

+3V

+5VALW

R85

@56.2_1%

R86

@200

R87

@10K_0402

R96

@56_1%

R95 @240

R94

240 R89

@1.5K

R249 @0_0402

R84 @240

R88

@510

R91

@39 R90

@150 R92

@200

JP18

@AMP104078-4

1

3

5

7

9

11

13

15

17

19

21

23

25

27

29

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

1

3

5

7

9

11

13

15

17

19

21

23

25

27

29

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

U26C

74HCT08

9

10 8

R93

@39

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

D2

1SS355

2 1

D8

1N4148

21

Q10

2SA1036K

23

1

Q4

FMMT619

23

1

R235

3.48K_1%

1 2

C420

2.2UF_16V_0805

1 2

D1

1N4148

2 1

R375

10K_0402

12

JP17

53398-0310

1

2

3

C99

@1000PF_0402

R245

10K_0402

12

R415 5.6K_0402

1 2

R416 100_0402

1 2

ITP_PREQ# <5>

ITP_TRST# <5>

ITP_TDI <5>

ITP_TDO <5>

ITP_PRDY# <5>

ITP_PWROK<16,30>

ITP_TMS<5>

H_RESETX#<8>

PM_PWROK <16>

ITP_TCK<5>

CLK_ITPP# <14>CLK_ITPP<14>

EN_DFAN<28>

FAN1_TACH <28>

EC_HPOWON <28>

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

Almador-M

GMCH

Host

Interface

Host

Interface

VSS

10 mils wide,length <=500 mils.

Close to Ball R6.

HUB Interface Reference

1. Place R_C and R_D in middle of Bus.

2. Place capacitors near GMCH.

Layout note :

R_C

R_D

Place Reference Circuit near GMCH

ADY11 LA-1181 2

Almador-M GMCH(1/3)

8 41Friday, November 16, 2001

Compal Electronics, Inc.

Title

SizeDocument Number Rev

Date: Sheet of

HA#[3..31]HD#[0..63]

HREQ#[0..4]

H_RS#[0..2]

HA#3

HA#4

HA#5

HA#6

HA#7

HA#8

HA#9

HA#10

HA#11

HA#12

HA#13

HA#14

HA#15

HA#16

HA#17

HA#18

HA#19

HA#20

HA#21

HA#22

HA#23

HA#24

HA#25

HA#26

HA#27

HA#28

HA#29

HA#30

HA#31

HD#3

HD#40

HD#23

HD#31

HD#6

HD#38

HD#34

HD#4

HD#19

HD#14

HD#28

HD#24

HD#17

HD#8

HD#25

HD#29

HD#21

HD#10

HD#22

HD#12

HD#26

HD#36

HD#16

HD#13

HD#15

HD#37

HD#1

HD#9

HD#0

HD#35

HD#20

HD#7

HD#41

HD#11

HD#2

HD#30

HD#27

HD#18

HD#5

HD#33

HD#32

HD#39

HD#42

HD#43

HD#44

HD#45

HD#46

HD#47

HD#48

HD#49

HD#50

HD#51

HD#52

HD#53

HD#54

HD#55

HD#56

HD#57

HD#58

HD#59

HD#60

HD#61

HD#62

HD#63

HUB_PD0

HUB_PD1

HUB_PD2

HUB_PD3

HUB_PD4

HUB_PD5

HUB_PD7

HUB_PD6

HUB_PD8

HUB_PD9

HUB_PD10

H_RS#2

H_RS#0

HREQ#0

HREQ#4

HREQ#3

HREQ#2

HREQ#1

H_RS#1

CLKGBOUT

CLK_GBIN

+VS_HUBREF

VGAREF

+V_AGTLREF

+1.8VS

+VS_HUBREF

+1.5VS

VGAREF

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,I

NC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF

THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE

INFORMATION CONTAINS MAY BE

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF

COMPAL ELECTRONICS,INC.

C178

.01UF_0402

12

R126 27.4_1%

1 2

R127 54.9_1%

1 2

R128 54.9_1%

12

C263

.1UF_0402

12

R116 80.6_1%

1 2

C185

.1UF_0402

12

C190

.1UF_0402

12

R133 @0_0402

1 2

R156 47_0402

1 2

C259

@10PF_0402

R151

@33_0402

1 2

R168

33_0402

1 2

C297

5PF_0402

C277 .01UF_0402

1 2

R138 54.9_1%

1 2

R167

@240K

12

R124

301_1%

12

R125

301_1%

12

C176

.1UF_0402

12

R142

1K_1%

12

R141

1K_1%

12

C261 470PF

1 2

R143

82.5_1%

12

R147

82.5_1%

12

C270 470PF

1 2

U7A

ALMADOR-M

U4

P1

W6

U2

U6

R1

N3

W5

V4

P3

R3

U1

V6

W4

T3

P2

V3

R2

T1

W3

U3

Y4

AA3

W1

V1

Y1

Y6

AD3

AB4

AB5

V2

Y3

Y2

AA4

AA1

AA6

AB1

AC4

AA2

AB3

AD2

AD1

AC2

AB6

AC6

AC1

AF3

AD4

AD6

AC3

AH3

AE5

AE3

AG2

AF4

AF2

AJ3

AE4

AG1

AE1

AG4

AH4

AG3

AF1

H2

E3

G3

N4

M6

F1

F2

J3

F3

P6

G1

N5

H1

P4

T4

M2

J2

L2

R4

K1

L3

L1

J1

N1

T5

H3

M3

M1

K3

R6

C1

E1

L4

G5

J4

F4

D3

D1

J6

G4

K6

M4

K5

K4

L6

H6

H4

G6

AJ4

AH5

AC19

AG26

AD24

G26

H28

H29

H27

F29

F27

E29

E28

G25

G27

H26

G29

H24

F28

AC22

F6

J23

J25

K24

AB24

AA7

J7

C2

AB23

AC23

M12

M13

M17

M18

N12

N13

N14

N15

N16

N17

N18

P13

P14

P15

P16

P17

R13

R14

R15

R16

R17

T13

T14

T15

T16

T17

U12

U13

U14

U15

U16

U17

U18

V12

V13

V17

V18

AJ5

D2

AC5

Y5

U5

P5

L5

H5

AH2

AE2

AB2

W2

T2

N2

K2

G2

AC7

AH19

AH20

AF5

G28

H25

AC26

AD22

AE28

AH24

AF25

AF27

AH26

G8

AD7

H_D#0

H_D#1

H_D#2

H_D#3

H_D#4

H_D#5

H_D#6

H_D#7

H_D#8

H_D#9

H_D#10

H_D#11

H_D#12

H_D#13

H_D#14

H_D#15

H_D#16

H_D#17

H_D#18

H_D#19

H_D#20

H_D#21

H_D#22

H_D#23

H_D#24

H_D#25

H_D#26

H_D#27

H_D#28

H_D#29

H_D#30

H_D#31

H_D#32

H_D#33

H_D#34

H_D#35

H_D#36

H_D#37

H_D#38

H_D#39

H_D#40

H_D#41

H_D#42

H_D#43

H_D#44

H_D#45

H_D#46

H_D#47

H_D#48

H_D#49

H_D#50

H_D#51

H_D#52

H_D#53

H_D#54

H_D#55

H_D#56

H_D#57

H_D#58

H_D#59

H_D#60

H_D#61

H_D#62

H_D#63

H_A#3

H_A#4

H_A#5

H_A#6

H_A#7

H_A#8

H_A#9

H_A#10

H_A#11

H_A#12

H_A#13

H_A#14

H_A#15

H_A#16

H_A#17

H_A#18

H_A#19

H_A#20

H_A#21

H_A#22

H_A#23

H_A#24

H_A#25

H_A#26

H_A#27

H_A#28

H_A#29

H_A#30

H_A#31

H_CPURST#

H_ADS#

H_BNR#

H_BPRI#

H_DBSY#

H_DEFER#

H_DRDY#

H_HIT#

H_HITM#

H_LOCK#

H_TRDY#

H_REQ#0

H_REQ#1

H_REQ#2

H_REQ#3

H_REQ#4

H_RS#0

H_RS#1

H_RS#2

CLK_HT

CLK_HT#

CLK_DREF

CLK_GBIN

CLK_GBOUT

HUB_PD0

HUB_PD1

HUB_PD2

HUB_PD3

HUB_PD4

HUB_PD5

HUB_PD6

HUB_PD7

HUB_PD8

HUB_PD9

HUB_PD10

HUB_PSTRB

HUB_REF

HUB_PSTRB#

DVO_RCOMP

SM_RCOMP

HUB_RCOMP

AGP_REF

AGP_RCOMP/DVOBC_RCOMP

RESET#

H_GTLREF1

H_GTLREF0

H_GTLRCOMP

VSS

VSS

VSS0

VSS1

VSS2

VSS3

VSS4

VSS5

VSS6

VSS7

VSS8

VSS9

VSS10

VSS11

VSS12

VSS13

VSS14

VSS15

VSS16

VSS17

VSS18

VSS19

VSS20

VSS21

VSS22

VSS23

VSS24

VSS25

VSS26

VSS27

VSS28

VSS29

VSS30

VSS31

VSS32

VSS33

VSS34

VSS35

VSS36

VSS_H0

VSS_H1

VSS_H2

VSS_H3

VSS_H4

VSS_H5

VSS_H6

VSS_H7

VSS_H8

VSS_H9

VSS_H10

VSS_H11

VSS_H12

VSS_H13

VSS_H14

VSS_H15

VSS_H16

VSSPCMOS_LM0

VSSPCMOS_LM1

VSSPCMOS_LM2

VSSP_HUB0

VSSP_HUB1

VSSP_IO0

VSSP_IO1

VSSP_IO2

VSSP_DVO0

VSSP_DVO1

VSSP_DVO2

VSSA_DAC

VSSA_CPLL

VSSA_HPLL

HA#[3..31] <4>HD#[0..63]<4>

HREQ#[0..4] <4>

H_RESET# <5>

HADS# <4>

HBNR# <4>

HBPRI# <4>

H_DBSY# <5>

HDEFER# <4>

H_DRDY# <5>

HIT# <4>

HITM# <4>

HLOCK# <4>

H_TRDY# <5>

HUB_PD[0..10]<16> HUB_PSTRB<16>HUB_PSTRB#<16>

H_RS#[0..2] <5>

CLK_GHT <14>

CLK_GHT# <14>

CLK_DREF <14>

CLK_GBIN <14>

CLK_GBOUT <14>

PCIRST# <15,16,20,21,26,27,28>

H_RESETX#<7>

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

System Memory Reference

Memory

Almador-M

GMCH

Power

VSS

Layout note :

Layout note

SM_OCLK_RCLK trace length 150mil +-50mil

System

XOR

System

VSS

SDRAM

Layout Note:

F20,E 20,F12,E11

ADD Testpoint

for Factory

SDRAM

Close to Ball E5 and F24

near pin A24

Memory

Layout note

Cap near pin A8

Place resistors near GMCH

Layout note :

Place resistors near GMCH

Layout note :

Cap

near pin A12

ADY11 LA-1181 2

Almador-M GMCH(2/3)

9 41Friday, November 16, 2001

Compal Electronics, Inc.

Title

SizeDocument Number Rev

Date: Sheet of

SM_CKE2

SM_CKE3

MMA3

MMA9

MMA5

MMA12

MMA1

SM_D_RAS#

MMA0

MMA11

MMA2

MMA6

MMA7

SM_D_BA1

SM_OCLK_RCLK

SM_D_CLK2

SM_CKE0

SM_CS#3

SM_D_BA0

SM_D_CLK0

MMA8

MMA4

MMA10

SM_CKE1

SM_CS#2

SM_D_WE#

SM_CS#1

SM_DQM3

SM_DQM4

SM_DQM5

SM_DQM6

SM_DQM7

SM_CS#0

SM_DQM1

SM_DQM2

SM_DQM0

SM_D_CAS#

SM_DQ56

SM_DQ31

SM_DQ37

SM_DQ10

SM_DQ42

SM_DQ45

SM_DQ16

SM_DQ17

SM_DQ22

SM_DQ2

SM_DQ38

SM_DQ46

SM_DQ33

SM_DQ23

SM_DQ25

SM_DQ61

SM_DQ49

SM_DQ39

SM_DQ54

SM_DQ26

SM_DQ4

SM_DQ21

SM_DQ18

SM_DQ1

SM_DQ40

SM_DQ9

SM_DQ20

SM_DQ5

SM_DQ60

SM_DQ55

SM_DQ28

SM_DQ27

SM_DQ8

SM_DQ14

SM_DQ7

SM_DQ50

SM_DQ47

SM_DQ19

SM_DQ[0..63]

SM_DQ0

SM_DQ15

SM_DQ11

SM_DQ24

SM_DQ41

SM_DQ34

SM_DQ59

SM_DQ57

SM_DQ36

SM_DQ53

SM_DQ58

SM_DQ51

SM_DQ32

SM_DQ63

SM_DQ48

SM_DQ43

SM_DQ13

SM_DQ29

SM_DQ52

SM_DQ62

SM_DQ12

SM_DQ44

SM_DQ35

SM_DQ30

SM_DQ6

SM_DQ3

SM_D_CLK1

SM_D_CLK3

MMA12

MMA1

MMA3

MMA0

MMA11

MMA10

MMA9

MMA7

MMA6

MMA5

MMA8

MMA4

MMA2

SM_MA0

SM_MA1

SM_MA2

SM_MA3

SM_MA4

SM_MA5

SM_MA6

SM_MA7

SM_MA8

SM_MA9

SM_MA10

SM_MA11

SM_MA12

+3V

+V_SMREF

+V_SMREF

+3V

+3V

+VTT

+3V

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,I

NC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF

THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE

INFORMATION CONTAINS MAY BE

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF

COMPAL ELECTRONICS,INC.

R122

249_1%

12

R123

49.9_1%

12

R120 10_0402

1 2

R111 10_0402

1 2

R114 10_0402

1 2

R118 10_0402

1 2

C157

.1UF_0402

12

C132 .1UF_0402

1 2

R115 10_0402

1 2

C160

.1UF_0402

12

C134

@22PF_0402

12

C131

.1UF_0402

12

U7B

ALMADOR-M

D29

C29

D27

C27

A27

B26

E24

C25

E23

B25

C23

F22

B23

C22

E21

B22

C12

D10

C11

A10

C10

C8

A7

E9

C7

E8

A5

F8

C5

D6

B4

C4

E27

C28

B28

E26

C26

D25

A26

D24

F23

A25

G22

D22

A23

F21

D21

A22

F11

A11

B11

F10

B10

B8

D9

B7

F9

A6

C6

D7

B5

E6

A4

D4

A20

B20

B19

C19

A18

A19

C17

C18

B17

A17

A16

C15

C14

F20

E20

F12

E11

C21

F19

E12

A12

B16

C16

F18

D18

D13

D12

E18

F17

F14

F13

E17

F16

D16

D15

E15

E14

A15

B2

B14

A3

A14

C3

A13

C9

C13

A9

B13

A8

C20

D19

A21

A24

C24

E5

F24

AD8

AD9

AD10

AJ21

AE8

AE9

AE10

AE11

AE12

AE13

AE17

AE19

AH21

AF8

AF9

AF10

AF11

AF12

AF13

AF14

AF15

AF16

AF17

AF18

AF19

AF20

AG7

AG15

AG16

AG21

AH6

AH8

AH9

AH11

AH12

AH14

AH17

AH18

B3

B6

B9

B12

B15

B18

B21

B24

B27

E7

E10

E13

E16

E19

E22

E25

G9

G21

E4

D28

K28

N28

T28

W28

AB28

L25

P25

U25

Y25

AE20

G24

H7

H23

K7

K23

L7

N6

T6

W7

Y7

AB7

M24

P24

T24

V24

Y23

M14

M15

M16

P12

R12

T12

P18

R18

T18

SM_DQ0

SM_DQ1

SM_DQ2

SM_DQ3

SM_DQ4

SM_DQ5

SM_DQ6

SM_DQ7

SM_DQ8

SM_DQ9

SM_DQ10

SM_DQ11

SM_DQ12

SM_DQ13

SM_DQ14

SM_DQ15

SM_DQ16

SM_DQ17

SM_DQ18

SM_DQ19

SM_DQ20

SM_DQ21

SM_DQ22

SM_DQ23

SM_DQ24

SM_DQ25

SM_DQ26

SM_DQ27

SM_DQ28

SM_DQ29

SM_DQ30

SM_DQ31

SM_DQ32

SM_DQ33

SM_DQ34

SM_DQ35

SM_DQ36

SM_DQ37

SM_DQ38

SM_DQ39

SM_DQ40

SM_DQ41

SM_DQ42

SM_DQ43

SM_DQ44

SM_DQ45

SM_DQ46

SM_DQ47

SM_DQ48

SM_DQ49

SM_DQ50

SM_DQ51

SM_DQ52

SM_DQ53

SM_DQ54

SM_DQ55

SM_DQ56

SM_DQ57

SM_DQ58

SM_DQ59

SM_DQ60

SM_DQ61

SM_DQ62

SM_DQ63

SM_MA0

SM_MA1

SM_MA2

SM_MA3

SM_MA4

SM_MA5

SM_MA6

SM_MA7

SM_MA8

SM_MA9

SM_MA10

SM_MA11

SM_MA12

NC

NC

NC

NC

VSS

VSS

VCC_SM

VCC_SM

SM_BA0

SM_BA1

SM_DQM0

SM_DQM1

SM_DQM2

SM_DQM3

SM_DQM4

SM_DQM5

SM_DQM6

SM_DQM7

SM_CS#0

SM_CS#1

SM_CS#2

SM_CS#3

VCCQ_SM

VSS

SM_CLK0

SM_CLK1

SM_CLK2

SM_CLK3

VSS

VSS

SM_CKE0

SM_CKE1

SM_CKE2

SM_CKE3

VSS

VCC_SM

SM_RAS#

SM_CAS#

SM_WE#

SM_OCLK

SM_RCLK

SM_VREF0

SM_VREF1

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSSP_SM0

VSSP_SM1

VSSP_SM2

VSSP_SM3

VSSP_SM4

VSSP_SM5

VSSP_SM6

VSSP_SM7

VSSP_SM8

VSSP_SM9

VSSP_SM10

VSSP_SM11

VSSP_SM12

VSSP_SM13

VSSP_SM14

VSSP_SM15

VSSP_SM16

VSSP_SM17

VSSP_SM18

VSSP_SM19

VSSP_AGP0

VSSP_AGP1

VSSP_AGP2

VSSP_AGP3

VSSP_AGP4

VSSP_AGP5

VSSP_AGP6

VSSP_AGP7

VSSP_AGP8

VSSA_DPLL0

VSSA_DPLL1

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

R113 10_0402

1 2

R119 10_0402

1 2

R109 10_0402

1 2

R110 10_0402

1 2

RP4

8P4R_10

1 8

2 7

3 6

4 5

RP5

8P4R_10

1 8

2 7

3 6

4 5

RP3

8P4R_10

1 8

2 7

3 6

4 5

R112 10_0402

1 2

SM_CKE3<13>

SM_DQM[0..7] <12,13>

SM_CKE2<13>

SM_CKE0<12>

SM_CKE1<12>

SM_CS#1<12>

SM_BA1 <12,13>

SM_BA0 <12,13>

SM_WE#<12,13>

SM_CS#3<13>

SM_CAS# <12,13>

SM_CS#2<13>

SM_RAS#<12,13>

SM_CS#0<12>

SM_DQ[0..63] <12,13>

SMD_CLK3<13>

SMD_CLK2<13>

SMD_CLK1<12>

SMD_CLK0<12>

SM_MA[0..12] <12,13>

VSSA_DPLL1 <10>

VSSA_DPLL0 <10>

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

Almador-M

GMCH

Place close to AE16,

AE15 of GMCH

Layout note :

AGP

Interface

Local Memory

Interface

Local Memory

Interface

Interface

Display

Power

Interface

(DVOB/DVOC & ZV port)

(DVOA port)

AGP_PAR : Strapping option for SW detection of

AGP or DVO device.

0 -> DVO B/C device

1 -> AGP device

Layout Note:

AE24,AJ25

ADD Testpoint

for Factory

XOR

1. Place R_I and R_J near GMCH.

R_I

R_J

DVOA_D1 IOQD=1 IOQD=8

DVOA_D5 Desktop Mobile

DVOA_D6 Dual Ended Term Single Ended Term

Strap Name Low High

37.4_1% resistors and cap

must be placed after RGB

pi filter near CRT

connector.

1.5V level clock

ADY11 LA-1181 2

Almador-M GMCH(3/3)

10 41Friday, November 16, 2001

Compal Electronics, Inc.

Title

SizeDocument Number Rev

Date: Sheet of

VCCA_DPLL

DVOA_CLKIN

DVOA_INTR#

DVOA_D6

DVOA_D5

DVOA_D1

DVOA_D1

DVOA_D5

DVOA_D6

VCCADPLL

AGP_PAR

DVOA_INTR#

DVOA_CLKIN

AGP_PAR

AGP_FRAME#

AGP_IRDY#

AGP_TRDY#

AGP_STOP#

AGP_DEVSEL#

AGP_DEVSEL#

DVO_STALL

AGP_WBF#

AGP_RBF#

AGP_PIPE#

AGP_REQ#

AGP_GNT#

AGP_REQ#

AGP_GNT#

AGP_PIPE#

AGP_WBF#

AGP_RBF#

AGP_ST0

AGP_ST1

AGP_ST2

DVO_INT#

AGP_ST0

AGP_ST1

AGP_ST2

AGP_IRDY#

DVO_INT#

DVO_STALLCRT_R#

CRT_G#

CRT_B#

CRT_R#

CRT_G#

CRT_B#

DPMS_CLK

VCCA_DPLL0

VCCA_DPLL1

AGP_FRAME#

AGP_TRDY#

AGP_STOP#

+VTT

+VTT

+1.8VS

+VTT

+VS_RIMMREF

+1.8VS

+3V

+1.5VS

+3V

+1.5VS

+VTT

+3V

+1.8VS

+1.5VS

+3VS

+1.5VS

+1.8VS

+VS_RIMMREF

+3VS

+1.5VS

+3VS

+1.5VS

+1.5VS

+VTT

+1.5VS

+3VS

+3VS

+3VS

+1.8VS

+1.5VS

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,I

NC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF

THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE

INFORMATION CONTAINS MAY BE

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF

COMPAL ELECTRONICS,INC.

C278

68PF

12

C281 .1UF_0402

12

C170.1UF_0402

12

C266

68PF

12

R169

10K_0402

1 2

R170 10K_0402

1 2

R132 330

1 2

C632

.01UF_0402

12

C290

.1UF_0402

12

R166 10K_0402

1 2

R146 @2.2K

1 2

R144 2.2K

1 2

R173 @2.2K

1 2

R172 255_1%

1 2

C167

.1UF_0402

12

R162 10K_0402

1 2

R157 100K_0402

1 2

R164 100K_0402

1 2

R154

2K_1%

12

R159

576_1%

12

R152 10K_0402

1 2

R137 8.2K_0402

1 2

R153 10K_0402

1 2

R145 10K_0402

1 2

L49

FBM-11-201209-601T

1 2 R176 0_0402

1 2

RP9

@8P4R_8.2K

1 8

2 7

3 6

4 5

R150 @8.2K_0402

1 2

L45

FBM-11-201209-601T

1 2 R117 0_0402

1 2

C294

.1UF_0402

12

R131 100K_0402

1 2

R155 @8.2K_0402

1 2

R163 @8.2K_0402

1 2

R149 @8.2K_0402

1 2

R160 10K_0402

1 2

R161 10K_0402

1 2

R417 8.2K_0402

1 2

U7C

ALMADOR-M

AA29

AA24

AA25

Y24

Y27

Y26

W24

Y28

AB26

AB29

AB25

AC28

AC29

AB27

L29

L28

U29

U28

AA27

AA28

R29

P26

P27

N25

R28

AC27

AD29

P28

L27

P29

R27

T25

J29

J28

K26

K25

L26

J27

K29

K27

M29

M28

L24

M27

N29

M25

N26

N27

R25

R24

T29

T27

T26

U27

V27

V28

U26

V29

W29

V25

W26

W25

W27

Y29

AD21

AD20

AJ27

AD27

AE27

AH28

AG29

AF29

AE29

AH27

AG28

AF28

AD28

AF23

AF22

AD25

AC25

AG24

AJ24

AJ22

AH22

AG22

AJ23

AH23

AG23

AE23

AE24

AJ25

AH25

AG25

AJ26

AD26

AE26

AE21

AE22

AG17

AJ17

AG18

AJ18

AG19

AJ19

AG20

AJ20

AJ11

AH10

AJ10

AG10

AJ9

AG9

AJ8

AG8

AH7

AF7

AJ7

AG11

AJ12

AG12

AH13

AG13

AJ13

AG14

AJ14

AJ6

AG6

AD14

AE14

AC24

AH15

AJ15

AJ16

AH16

V14

V15

V16

AE16

AE15

AD15

AD16

AE25

AD23

J24

F26

N24

W23

J26

M26

R26

V26

AA26

L23

AA23

U24

AE6

G7

G10

G20

AF6

AE7

AC9

AC8

AF26

AG27

F5

J5

M5

R5

V5

AA5

AD5

AG5

E2

D5

D8

D11

D14

D17

D20

D23

D26

F7

F15

G11

G19

G23

AC10

AC11

AD11

AD12

AD13

AE18

AD17

AD18

AD19

AC20

F25

AC21

AF21

AF24

AGP_SBA0/ZV_D8

AGP_SBA1/ZV_D7

AGP_SBA2/ZV_D6

AGP_SBA3/ZV_D5

AGP_SBA4/ZV_D2

AGP_SBA5/ZV_D1

AGP_SBA6/ZV_D0

AGP_SBA7/ZV_HREF

AGP_PIPE#/ZV_D10

AGP_WBF#/ZV_D9

AGP_RBF#/ZV_D11

AGP_ST0/ZV_D14

AGP_ST1/ZV_D13

AGP_ST2/ZV_D12

AGP_ADSTB0/DVOB_CLK

AGP_ADSTB#0/DVOB_CLK#

AGP_ADSTB1/DVOC_CLK

AGP_ADSTB#1/DVOC_CLK#

AGP_SBSTB/ZV_D4

AGP_SBSTB#/ZV_D3

AGP_FRAME#/M_DDC2_DATA

AGP_IRDY#/M_I2C_CLK

AGP_TRDY#/M_DDC2_CLK

AGP_STOP#

AGP_DEVSEL#/M_I2C_DATA

AGP_REQ#/ZV_CLK

AGP_GNT#/ZV_D15

AGP_PAR

AGP_CBE#0/DVOB_D7

AGP_CBE#1/DVOB_BLANK#

AGP_CBE#2/ZV_VSYNC

AGP_CBE#3/DVOC_D5

AGP_AD0/DVOB_HSYNC

AGP_AD1/DVOB_VSYNC

AGP_AD2/DVOB_D1

AGP_AD3/DVOB_D0

AGP_AD4/DVOB_D3

AGP_AD5/DVOB_D2

AGP_AD6/DVOB_D5

AGP_AD7/DVOB_D4

AGP_AD8/DVOB_D6

AGP_AD9/DVOB_D9

AGP_AD10/DVOB_D8

AGP_AD11/DVOB_D11

AGP_AD12/DVOB_D10

AGP_AD13/DVOBC_CLKINT#

AGP_AD14/DVOB_FLD/STL

AGP_AD15

AGP_AD16/DVOC_VSYNC

AGP_AD17/DVOC_HSYNC

AGP_AD18/DVOC_BLANK#

AGP_AD19/DVOC_D0

AGP_AD20/DVOC_D1

AGP_AD21/DVOC_D2

AGP_AD22/DVOC_D3

AGP_AD23/DVOC_D4

AGP_AD24/DVOC_D7

AGP_AD25/DVOC_D6

AGP_AD26/DVOC_D9

AGP_AD27/DVOC_D8

AGP_AD28/DVOC_D11

AGP_AD29/DVOC_D10

AGP_AD30/DVOC_INT#/DPMS_CLK

AGP_AD31/DVOC_FLD/STL

DVO_BLANK#

DVO_CLKIN

DAC_REFSET

IO_DDC1DATA

IO_DDC1CLK

DAC_BLUE

DAC_GREEN

DAC_RED

DAC_VSYNC

DAC_BLUE#

DAC_GREEN#

DAC_RED#

DAC_HSYNC

DVO_VSYNC

DVO_HSYNC

IO_I2CCLK

IO_I2CDATA

DVO_CLK#

DVO_CLK

DVO_D0

DVO_D1

DVO_D2

DVO_D3

DVO_D4

DVO_D5

DVO_D6

DVO_D7

DVO_D8

DVO_D9

DVO_D10

DVO_D11

IO_DDC2DATA

IO_DDC2CLK

DVO_INTR#

DVO_FIELD

LM_DQA0

LM_DQA1

LM_DQA2

LM_DQA3

LM_DQA4

LM_DQA5

LM_DQA6

LM_DQA7

LM_DQB0

LM_DQB1

LM_DQB2

LM_DQB3

LM_DQB4

LM_DQB5

LM_DQB6

LM_DQB7

LM_CMD

LM_SCK

LM_SIO

LM_RQ0

LM_RQ1

LM_RQ2

LM_RQ3

LM_RQ4

LM_RQ5

LM_RQ6

LM_RQ7

LM_RCLK

LM_GCLK

LM_RAMREF0

LM_RAMREF1

AGP_BUSY#

LM_CTM

LM_CTM#

LM_CFM

LM_CFM#

VDD_LM

VDD_LM

VDD_LM

VDD_LM

VDD_LM

VDD_LM

VDD_LM

VCCP_IO

VCCP_IO

VCCP_HUB

VCCP_HUB

VCCQ_AGP

VCCQ_AGP

VCCP_AGP

VCCP_AGP

VCCP_AGP

VCCP_AGP

VCCP_AGP

VCCP_AGP

VCCP_AGP

VCCP_AGP

VCCA_HPLL

VCCA_CPLL

VCCQ_SM

VCCQ_SM

VCCPCMOS_LM

VCCPCMOS_LM

VCCPCMOS_LM

VCCPCMOS_LM

VCCA_DAC

VCCA_DAC

VCC_H

VCC_H

VCC_H

VCC_H

VCC_H

VCC_H

VCC_H

VCC_H

VCC_H

VCCP_SM

VCCP_SM

VCCP_SM

VCCP_SM

VCCP_SM

VCCP_SM

VCCP_SM

VCCP_SM

VCCP_SM

VCCP_SM

VCCP_SM

VCCP_SM

VCCP_SM

VCC_LM

VCC_LM

VCC_LM

VCC_LM

VCC_LM

VCC_LM

VCC_LM

VCC_LM

VCC_LM

VCCA_DPLL0

VCCA_DPLL1

VCCP_DVO

VCCP_DVO

VCCP_DVO

R129 @100K_0402

1 2

R418 37.4_1%

1 2

R419 37.4_1%

1 2

R420 37.4_1%

1 2

R422

604_1%

1 2

R421 732_1%

12

U47

TC7SH14

1

2

34

5

NC

A

GND Y

VCC

+C180

100UF_D2_6.3V

12

+C302

100UF_D2_6.3V

12

R430 8.2K_0402

1 2

R431 8.2K_0402

1 2

R432 @8.2K_0402

1 2

T52

1

T53

1

C627 @.1UF_0402

1 2

C628 @.1UF_0402

1 2

C629 @.1UF_0402

1 2

AGP_BUSY# <16>

DVO_D0<15> DVO_D1<15>

DVO_D2<15> DVO_D3<15>

DVO_D4<15> DVO_D5<15>

DVO_D6<15>

DVO_HSYNC<15> DVO_VSYNC<15>

DVO_D8<15>

DVO_D7<15>

DVO_D9<15>

DVO_D10<15> DVO_D11<15>

DVO_CLK<15> DVO_CLK#<15>

DVO_BL#<15>

CRT_R <15>

CRT_G <15>

CRT_B <15>

CRT_VSYNC <15>

CRT_HSYNC <15>

3VDDCCL <15>

3VDDCDA <15>

VSSA_DPLL1 <9>

LTVCK<15>

LTVDA<15>

DVO_STALL<15>

VSSA_DPLL0 <9>

RTCCLK<16>

GMBSCL <15>

GMBSDA<15>

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Compal Electronics, Inc.

Layout note :

Distribute as close as possible

to GMCH Processor Quadrant .

Layout note :

Distribute as close as possible

to VCCPCMOS_LM. (GMCH pin

AF6, AE7, AC9, AC8)

Layout note :

Distribute as close as possible

to GMCH Local Memory Quadrant .

Distribute as close as possible

to GMCH AGP/DVO Quadrant .

Layout note :

Distribute as close as possible

to GMCH System Memory Quadrant .

Layout note :

Layout note :

Distribute as close as possible

to IO Quadrant .

.1UF Cap Used X7R

ADY11 LA-1181 2

GMCH-M Decoupling

11 41Friday, November 16, 2001

Title

Size Document Number Rev

Date: Sheet of

+VTT

+VTT

+VTT

+VTT

+VTT

+VTT

+3V

+3V

+1.5VS

+1.8VS

+VTT

+3V

+1.8VS

C206

.1UF_0402

12

C220

.1UF_0402

12

C177

.1UF_0402

12

C207

.1UF_0402

12

C224

.1UF_0402

12

C238

.1UF_0402

12

C169

.1UF_0402

12

C208

.1UF_0402

12

C198

.1UF_0402

12

C193

.1UF_0402

12

C237

.1UF_0402

12

C247

.1UF_0402

12

C225

.1UF_0402

12

C291

.1UF_0402

12

C158

.1UF_0402

12

C203

.1UF_0402

12

C239

.1UF_0402

12

C256

.1UF_0402

12

C219

.1UF_0402

12

C286

.1UF_0402

12

+C27

220UF_D2_4V

12

+C23

220UF_D2_4V

12

C282

.1UF_0402

12

C288

@.1UF_0402

12

C269

@.01UF_0402

12

C268

.01UF_0402

12

C213

.1UF_0402

12

C223

.1UF_0402

12

C271

.1UF_0402

12

C236

.1UF_0402

12

C163

.1UF_0402

12

C274

.1UF_0402

12

C204

.1UF_0402

12

C246

.1UF_0402

12

C156

.1UF_0402

12

C258

82PF

12

C279

.1UF_0402

12

C254

.1UF_0402

12

C275

.1UF_0402

12

C252

82PF

12

+C304

22UF_10V_1206

12

+C273

22UF_10V_1206

12

C296

82PF

12

C214

.1UF_0402

12

C255

.1UF_0402

12

C159

.1UF_0402

12

C168

.1UF_0402

12

C162

.1UF_0402

12

C140

.1UF_0402

12

+C133

22UF_10V_1206

12

C171

82PF

12

C154

.1UF_0402

12

C139

.1UF_0402

12

C179

82PF

12

C150

.1UF_0402

12

C166

82PF

12

C147

.1UF_0402

12

C148

.1UF_0402

12

C284

82PF

12

C149

.1UF_0402

12

C138

.1UF_0402

12

C280

.1UF_0402

12

+C122

@220UF_D2_4V

12

C276

.1UF_0402

12

+C127

@220UF_D2_4V

12

C251

.1UF_0402

12

C264

.1UF_0402

12

C265

.1UF_0402

12

C257

.1UF_0402

12

C181

.1UF_0402

12

C295

.1UF_0402

12

C197

.1UF_0402

12

C221

.1UF_0402

12

C267

.1UF_0402

12

C243

.1UF_0402

12

C245

.1UF_0402

12

+C125

22UF_10V_1206

12

C155

.1UF_0402

12

C137

.1UF_0402

12

C187

.1UF_0402

12

C244

.1UF_0402

12

C242

.1UF_0402

12

C232

.1UF_0402

12

C272

82PF

12

C250

.1UF_0402

12

C240

.1UF_0402

12

C285

82PF

12

C209

.1UF_0402

12

C262

.1UF_0402

12

C299

82PF

12

C287

.1UF_0402

12

C306

10UF_10V_1206

12

C300

10UF_10V_1206

12

+C303

220UF_D2_4V

12

C186

.01UF_0402

12

A

A

B

B

C

C

D

D

E

E

F

F

G

G

H

H

1 1

2 2

3 3

4 4

Layout note :

One .1uF cap per power pin .

Place each cap close to SODIMM(DIMM 0) pin .

DIMM0

Place closely to DIMM0

System S MBus Select

SM_SEL#

0=SODIMM0 ;

1=SODIMM1

ADY11 LA-1181 2

SO-DIMM SLOT0 /Decoupling & DIMM Select

12 41Friday, November 16, 2001

Compal Electronics, Inc.

Title

SizeDocument Number Rev

Date: Sheet of

SM_DQM4

SM_MA0

SM_MA1

SM_MA2

SMD_CLK0

SM_RAS#

SM_MA9

SODIMM0_SMDAT0

SM_DQM0

SM_MA3

SM_CKE1

SM_MA12

SM_BA0

SM_BA1

SM_MA11

SM_DQM3

SM_DQM5

SM_DQM6

SM_DQM7SM_DQM2

SM_DQM1

SM_MA6

SM_MA8

SM_MA10

SM_MA7

SM_MA4

SM_MA5

SM_DQ13

SM_DQ9

SM_DQ30

SM_DQ25

SM_DQ24

SM_DQ1

SM_DQ62

SM_DQ4

SM_DQ34SM_DQ3

SM_DQ29

SM_DQ44

SM_DQ2

SM_DQ7

SM_DQ8

SM_DQ31

SM_DQ58SM_DQ27

SM_DQ5

SM_DQ35

SM_DQ50

SM_DQ43

SM_DQ60

SM_DQ14

SM_DQ52

SM_DQ47

SM_DQ11

SM_DQ59

SM_DQ33

SM_DQ38

SM_DQ54

SM_DQ6

SM_DQ61

SM_DQ48

SM_DQ42

SM_DQ53

SM_DQ17

SM_DQ12

SM_DQ32

SM_DQ46

SM_DQ26

SM_DQ23

SM_DQ40

SM_DQ37

SM_DQ28

SM_DQ22

SM_DQ56

SM_DQ57

SM_DQ20

SM_DQ51

SM_DQ63

SM_DQ19

SM_DQ49

SM_DQ10

SM_DQ15

SM_DQ0

SM_DQ36

SM_DQ16

SM_DQ21

SM_DQ18

SM_DQ41

SM_DQ55

SM_DQ45

SMD_CLK1

SM_WE#

SM_CS#0

SM_CS#1

SODIMM_SMCLK

SM_CKE0

SM_CAS#

SM_DQ39

SMD_CLK1SMD_CLK0

SODIMM_SMCLK

SM_SEL

SM_SEL#

SM_SEL

SM_SEL#

+3V

+3V

+3V +3V

+5VS

+3V

+3VS

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,I

NC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF

THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE

INFORMATION CONTAINS MAY BE

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF

COMPAL ELECTRONICS,INC.

C329

.1UF_0402

12

C347

.1UF_0402

12

C69

.1UF_0402

12

C71

.1UF_0402

12

+C316

22UF_10V_1206

12

C335

.1UF_0402

12

C331

.1UF_0402

12

C334

.1UF_0402

12

C327

.1UF_0402

12

C328

.1UF_0402

12

C72

.1UF_0402

12

C68

.1UF_0402

12

C330

.1UF_0402

12

C70

.1UF_0402

12

C65

.1UF_0402

12

C333

.1UF_0402

12

C67

.1UF_0402

12

C66

.1UF_0402

12

C332

.1UF_0402

12

JP21

SO-DIMM144-Reverse

1

3

5

7

9

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

55

57

59

61

63

65

67

69

71

73

75

77

79

81

83

85

87

89

91

93

95

97

99

101

103

105

107

109

111

113

115

117

119

121

123

125

127

129

131

133

135

137

139

141

143

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

44

46

48

50

52

54

56

58

60

62

64

66

68

70

72

74

76

78

80

82

84

86

88

90

92

94

96

98

100

102

104

106

108

110

112

114

116

118

120

122

124

126

128

130

132

134

136

138

140

142

144

VSS

DQ0

DQ1

DQ2

DQ3

VCC

DQ4

DQ5

DQ6

DQ7

VSS

CKE0#DQMB0

CKE1#/DQMB1

VCC

A0

A1

A2

VSS

DQ8

DQ9

DQ10

DQ11

VCC

DQ12

DQ13

DQ14

DQ15

VSS

RFU/DQ64

RFU/DQ65

RFU/CLK0

VCC

RFU/RAS#

WE#

RE0#/S0#

RE1#/S1#

RFU/EDO_OE#

VSS

RFU/DQ66

RFU/DQ67

VCC

DQ16

DQ17

DQ18

DQ19

VSS

DQ20

DQ21

DQ22

DQ23

VCC

A6

A8

VSS

A9

A10

VCC

CE2#/DQMB2

CE3#/DQMB3

VSS

DQ24

DQ25

DQ26

DQ27

VCC

DQ28

DQ29

DQ30

DQ31

VSS

SDA

VCC

VSS

DQ32

DQ33

DQ34

DQ35

VCC

DQ36

DQ37

DQ38

DQ39

VSS

DQMB4/CE4#

DQMB5/CE5#

VCC

A3

A4

A5

VSS

DQ40

DQ41

DQ42

DQ43

VCC

DQ44

DQ45

DQ46

DQ47

VSS

DQ68/RFU

DQ69/RFU

CKE0/RFU

VCC

CAS#/RFU

CKE1/RFU

A12/RFU

A13/RFU

CLK1/RFU

VSS

DQ70/RFU

DQ71/RFU

VCC

DQ48

DQ49

DQ50

DQ51

VSS

DQ52

DQ53

DQ54

DQ55

VCC

A7

BA0

VSS

BA1

A11

VCC

DQMB6/CE6#

DQMB7/CE7#

VSS

DQ56

DQ57

DQ58

DQ59

VCC

DQ60

DQ61

DQ62

DQ63

VSS

SCL

VCC

R50 0_0402

1 2

C326

@15PF

12

C73

@15PF

12

R49

@10

12

R185

@10

12

G

D

S

Q18

2N7002

2

13

G

D

S

Q16

2N7002

2

13

G

D

S

Q19

2N7002

2

13

R183

10K_0402

12

R184

10K_0402

12

R48

10K_0402

12

G

D

S

Q17

2N7002

2

13

R268

10K_0402

12

SM_DQ[0..63] <9,13>

SM_DQM4<9,13> SM_DQM5<9,13>

SM_DQM6<9,13> SM_DQM7<9,13> SM_DQM3<9,13>

SM_DQM2<9,13>

SM_DQM1<9,13>

SM_DQM0<9,13>

SM_MA0<9,13> SM_MA1<9,13> SM_MA2<9,13>

SM_MA6<9,13> SM_MA8<9,13>

SM_MA10<9,13> SM_MA9<9,13>

SM_MA7 <9,13>

SM_MA12 <9,13>

SM_MA3 <9,13>

SM_MA4 <9,13>

SM_MA5 <9,13>

SMD_CLK0<9>

SMD_CLK1<9>

SM_RAS#<9,13> SM_WE#<9,13> SM_CS#0<9> SM_CS#1<9>

SM_MA11 <9,13>

SM_BA1 <9,13>

SM_BA0 <9,13>

SM_CAS#<9,13>

SM_CKE1<9>

SM_CKE0<9>

SMB_DATA<14,16,18> SODIMM1_SMDAT1<13>

SODIMM_SMCLK<13>SMB_CLK<14,16,18>

SM_SEL#<16>

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

EMI Clip PAD for Memory DoorDIMM1

Place closely to DIMM1

Layout note :

One .1uF cap per power pin .

Place each cap close to SODIMM(DIMM 1) pin .

ADY11 LA-1181 2

SO-DIMM SLOT1 & Decoupling

13 41Friday, November 16, 2001

Compal Electronics, Inc.

Title

SizeDocument Number Rev

Date: Sheet of

SM_DQM4

SM_MA3

SM_CKE3

SM_MA12

SM_BA0

SM_BA1

SM_MA11

SM_DQM7

SM_DQM6

SM_DQM5

SM_MA7

SM_MA4

SM_MA5

SM_DQ63

SM_DQ48

SM_DQ57

SM_DQ42

SM_DQ53

SM_DQ32

SM_DQ54

SM_DQ39

SM_DQ40

SM_DQ34

SM_DQ55

SM_DQ43

SM_DQ33

SM_DQ56

SM_DQ35

SM_DQ47

SM_DQ61

SM_DQ52

SM_DQ46

SM_DQ36

SM_DQ45

SM_DQ58

SM_DQ44

SM_DQ38

SM_DQ51

SM_DQ37

SM_DQ60

SM_DQ62

SM_DQ49

SM_DQ59

SM_DQ50

SM_DQ41

SMD_CLK3

SODIMM_SMCLK

SM_CKE2

SM_CAS#

SM_DQM0

SM_MA0

SM_MA1

SM_MA2

SMD_CLK2

SM_RAS#

SM_MA9

SODIMM1_SMDAT1

SM_DQM1

SM_DQM2

SM_DQM3

SM_MA6

SM_MA8

SM_MA10

SM_DQ17

SM_DQ27

SM_DQ16

SM_DQ22

SM_DQ11

SM_DQ18

SM_DQ12

SM_DQ19

SM_DQ31

SM_DQ15

SM_DQ5

SM_DQ29

SM_DQ28

SM_DQ20

SM_DQ3

SM_DQ6

SM_DQ23

SM_DQ8

SM_DQ7

SM_DQ2

SM_DQ30

SM_DQ9

SM_DQ21

SM_DQ13

SM_DQ25

SM_DQ1

SM_DQ26

SM_DQ4

SM_DQ24

SM_DQ14

SM_DQ0

SM_DQ10

SM_WE#

SM_CS#2

SM_CS#3

SMD_CLK2SMD_CLK3

+3V +3V

+3V

+3V

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,I

NC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF

THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE

INFORMATION CONTAINS MAY BE

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF

COMPAL ELECTRONICS,INC.

PAD10

PAD-2.5X3

1

PAD12

PAD-2.5X3

1

PAD18

PAD-2.5X3

1

PAD14

PAD-2.5X3

1

PAD19

PAD-2.5X3

1

PAD11

PAD-2.5X3

1

PAD16

PAD-2.5X3

1

JP13

SO-DIMM144-Normal

1

3

5

7

9

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

55

57

59

61

63

65

67

69

71

73

75

77

79

81

83

85

87

89

91

93

95

97

99

101

103

105

107

109

111

113

115

117

119

121

123

125

127

129

131

133

135

137

139

141

143

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

44

46

48

50

52

54

56

58

60

62

64

66

68

70

72

74

76

78

80

82

84

86

88

90

92

94

96

98

100

102

104

106

108

110

112

114

116

118

120

122

124

126

128

130

132

134

136

138

140

142

144

VSS

DQ0

DQ1

DQ2

DQ3

VCC

DQ4

DQ5

DQ6

DQ7

VSS

CKE0#DQMB0

CKE1#/DQMB1

VCC

A0

A1

A2

VSS

DQ8

DQ9

DQ10

DQ11

VCC

DQ12

DQ13

DQ14

DQ15

VSS

RFU/DQ64

RFU/DQ65

RFU/CLK0

VCC

RFU/RAS#

WE#

RE0#/S0#

RE1#/S1#

RFU/EDO_OE#

VSS

RFU/DQ66

RFU/DQ67

VCC

DQ16

DQ17

DQ18

DQ19

VSS

DQ20

DQ21

DQ22

DQ23

VCC

A6

A8

VSS

A9

A10

VCC

CE2#/DQMB2

CE3#/DQMB3

VSS

DQ24

DQ25

DQ26

DQ27

VCC

DQ28

DQ29

DQ30

DQ31

VSS

SDA

VCC

VSS

DQ32

DQ33

DQ34

DQ35

VCC

DQ36

DQ37

DQ38

DQ39

VSS

DQMB4/CE4#

DQMB5/CE5#

VCC

A3

A4

A5

VSS

DQ40

DQ41

DQ42

DQ43

VCC

DQ44

DQ45

DQ46

DQ47

VSS

DQ68/RFU

DQ69/RFU

CKE0/RFU

VCC

CAS#/RFU

CKE1/RFU

A12/RFU

A13/RFU

CLK1/RFU

VSS

DQ70/RFU

DQ71/RFU

VCC

DQ48

DQ49

DQ50

DQ51

VSS

DQ52

DQ53

DQ54

DQ55

VCC

A7

BA0

VSS

BA1

A11

VCC

DQMB6/CE6#

DQMB7/CE7#

VSS

DQ56

DQ57

DQ58

DQ59

VCC

DQ60

DQ61

DQ62

DQ63

VSS

SCL

VCC

R46 0_0402

1 2

R47

@10

12

C64

@15PF

12

C45

@15PF

12

R44

@10

12

C54

.1UF_0402

12

C59

.1UF_0402

12

C62

.1UF_0402

12

C49

.1UF_0402

12

C61

.1UF_0402

12

C46

.1UF_0402

12

C60

.1UF_0402

12

C47

.1UF_0402

12

+C44

22UF_10V_1206

12

C56

.1UF_0402

12

C52

.1UF_0402

12

C51

.1UF_0402

12

C55

.1UF_0402

12

C48

.1UF_0402

12

C50

.1UF_0402

12

C63

.1UF_0402

12

C53

.1UF_0402

12

C57

.1UF_0402

12

C58

.1UF_0402

12

SMD_CLK3<9>

SM_CKE3 <9>

SM_CKE2 <9>

SMD_CLK2<9>

SM_CS#2<9> SM_CS#3<9>

SM_DQ[0..63] <9,12>

SM_MA2<9,12> SM_MA1<9,12> SM_MA0<9,12>

SM_DQM1<9,12> SM_DQM0<9,12>

SM_WE#<9,12> SM_RAS#<9,12>

SM_MA10<9,12>

SM_MA6<9,12> SM_MA8<9,12>

SM_MA9<9,12>

SM_DQM2<9,12>

SM_BA1 <9,12>

SM_BA0 <9,12>

SM_MA11 <9,12>

SM_MA7 <9,12>

SM_DQM7<9,12>

SM_DQM6<9,12>

SM_MA12 <9,12>

SM_CAS# <9,12>

SM_DQM5<9,12>

SM_DQM4<9,12>

SM_MA4 <9,12>

SM_MA3 <9,12>

SM_MA5 <9,12>

SODIMM1_SMDAT1<12> SODIMM_SMCLK <12>

SM_DQM3<9,12>

A

A

B

B

C

C

D

D

E

E

F

F

G

G

H

H

1 1

2 2

3 3

4 4

Place Crystal within 500 mils of CK_Titan

Place near CPU

caps are internal

to CK_TITAN

Place all these Block's

Components near CPU

Place all these Block's

Components near

GMCH

Place all these Block's

Components near ITP

port

* 33

Width=40 m

ils

Close to CLKGEN

0 Ohm resistor for ICH3 d oesn't

need to support APIC fu nction

Place near ICH

*BLM21A60

1SPT

Note:

CPU_CLK[2:0] needs to be running in C3, C4.

Please clos ely pin42

or IC S 9508-05

ADY11 LA-1181 2

Clock Generator

14 41Friday, November 16, 2001

Compal Electronics, Inc.

Title

SizeDocument Number Rev

Date: Sheet of

CLKDREF

CLK_HT#

CLK_BCLK#

CLK_ICH48M

CLKPCI_SIO

CLKPCI_F2

CLKICHHUB

CLKGBIN

CLKPCI_F1 PCIF1

CLKPCI_PCM

PCIF1

CLK_ICH14M

H_BSEL0

H_BSEL1

CLKPCI_LAN

CLK_ITP

CLK_ITP#

CLK_HT

CLKPCI_LPC

CLK_BCLK

CLKPCI_F0 PCIF0

PCIF0

CLKOSC_VCH

+3VS

+3VS

+3VS

+3VS

+3VS

+3V_CLK

+3VS_CLKVDD

+3VS

+3VS_VDD48M

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,I

NC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF

THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE

INFORMATION CONTAINS MAY BE

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF

COMPAL ELECTRONICS,INC.

R42 33_1%

1 2

R59 10_0402

1 2

R43 33_1%

1 2

R45

475_1%

12

R40 61.9_1%

1 2

R41 61.9_1%

1 2

R16 33_1%

1 2

R12 33_1%

1 2

R13

475_1%

12

R17 61.9_1%

1 2

R8 61.9_1%

1 2

R52 22_0402

1 2

R51 221_1%

1 2

R74 33_0402

1 2

R72 33_0402

1 2

R68 33_0402

1 2

C90 @10PF_0402

12

C93 @10PF_0402

12

Y1

14.318MHZ

12

+C95

22UF_10V_1206

12

C76

.1UF_0402

12

C87

.1UF_0402

12

C78

.1UF_0402

12

C89

.1UF_0402

12

C82

.1UF_0402

12

C88

.1UF_0402

12

C77

.1UF_0402

12

L24

FBM-11-201209-601T

1 2

C86

.1UF_0402

12

R67 33_0402

1 2

R33 26.7_1%

1 2

R32

137_1%

12

R71 33_0402

1 2

R65 33_0402

1 2

R64 33_0402

1 2

R63 33_0402

1 2

R61

@0_0402

12

R54

@0_0402

12

R55

@0_0402

12

R58

10K_0402

12

R57 10K_0402

1 2

R56 0_0402

1 2

R73 33_0402

1 2

R81 33_1%

1 2

R82 @33_1%

1 2

R78

475_1%

12

R80 61.9_1%

1 2

R83 61.9_1%

1 2

U9

W320-04

1

8

14

19

32

37

46

50

26

4

9

15

20

31

36

41

47

273

2

40

55

54

25

34

53

28

43

29

30

33

35

42

45

44

49

48

52

51

24

23

22

21

7

6

5

18

17

16

13

12

11

10

39

38

56

VDD_REF

VDD_PCI

VDD_PCI

VDD_3V66

VDD_3V66

VDD_48MHZ

VDD_CPU

VDD_CPU

VDD_CORE

GND_REF

GND_PCI

GND_PCI

GND_3V66

GND_3V66

GND_48MHZ

GND_IREF

GND_CPU

GND_COREXTAL_OUT

XTAL_IN

SEL2

SEL1

SEL0

PWR_DWN#

PCI_STOP#

CPU_STOP#

VTT_PWRGD#

MULT0

SDATA

SCLK

3V66_0/DRCG

3V66_1/VCH_CLK

IREF

CPUCLKT2

CPU_CLKC2

CPUCLKT1

CPUCLKC1

CPUCLKT0

CPUCLKC0

66MHZ_IN/3V66_5

66MHZ_OUT2/3V66_4

66MHZ_OUT1/3V66_3

66MHZ_OUT0/3V66_2

PCICLK_F2

PCICLK_F1

PCICLK_F0

PCICLK6

PCICLK5

PCICLK4

PCICLK3

PCICLK2

PCICLK1

PCICLK0

48MHZ_USB

48MHZ_DOT

REF

C92

10PF_0402

R69

33_040212

R66 33_0402

1 2

R75 33_0402

1 2

R70

240K

12

L23

FBM-11-201209-601T

1 2

R354 51.1_1%

1 2

R355

348_1%

12

R53 33_0402

1 2

R60

1K_0402

12

R62

1K_0402

12

L25 10_0805

1 2

C75

.1UF_0402

12

L64

FBM-11-201209-601T

1 2

C98

10UF_10V_1206

12

C94

10UF_10V_1206

12

R433 0_0402

1 2

CLK_DREF<8>

CLK_GHT <8>

CLK_GHT# <8>

CLK_HCLK <5>

CLK_HCLK# <5>

CLK_ICH48<16>

SLP_S1#<16,28> PM_STPPCI#<16> PM_STPCPU#<16>

CLK_GBOUT <8>

CLK_CPU_APIC <5>

CLK_ICHHUB <16>

CLK_ICHPCI <16>

CLK_GBIN <8>

CLK_ICH14<16>

CLK_14M_SIO<26>

SMB_CLK<12,16,18> SMB_DATA<12,16,18>

H_BSEL1<5> H_BSEL0<5>

CLK_ITPP <7>

CLK_ITPP# <7>

VTT_PWRGD#<5,28>

CLK_PCI_LAN <20>

CLK_PCI_PCM <21>

CLK_PCI_SIO <26>

CLK_PCI_LPC <27>

CLK_OSC_VCH<15>

CLK_ICHAPIC <16>

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

CRT Connector

DDC_MONID0

Please closely to VCH Conn. power pin

ADY11 LA-1181 2

VCH Conn. & CRT

15 41Monday, February 25, 2002

Compal Electronics, Inc.

Title

SizeDocument Number Rev

Date: Sheet of

VCH_RST#

M_SEN#

DISPOFF#

CRTB

CRTR

M_SEN#

CRTG

DISPOFF#

+3VS

+1.8VS

+12VALW

B+

+5VALW

+3VS

CRTVCC

+3VS

CRTVCC

+1.8VS

CRTVCC

CRTVCC

CRTVCC

+5VS

+5VS

+1.5VS

B++12VALW

+5VALW +5VS +3VS+1.8VS +1.5VS

+5VS

+12VALW

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,I

NC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF

THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE

INFORMATION CONTAINS MAY BE

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF

COMPAL ELECTRONICS,INC.

JP9

VCH Conn.

1 2

3 4

5 6

7 8

9 10

11 12

13 14

15 16

17 18

19 20

21 22

23 24

25 26

27 28

29 30

31 32

33 34

35 36

37 38

39 40

41 42

43 44

45 46

47 48

49 50

51 52

53 54

55 56

57 58

59 60

G1 G2

3 4

5 6

7 8

9 10

11 12

13 14

15 16

17 18

19 20

G21 G22

23 24

25 26

27 28

29 30

31 32

33 34

35 36

37 38

G39 G40

41 42

43 44

45 46

47 48

49 50

51 52

53 54

55 56

57 58

G59 G60

R1

10K_0402

12

C8

3.3PF

12

C6

3.3PF

12

G

D

S

Q5

2N7002

2

1 3

L4FBM-11-160808-121

1 2

R101

4.7K_0402

1 2

D4 @DAN217

1

2

3

C3

.1UF_0402

12

C9

27PF

12

L14 FCM2012C-800(0805)

1 2

L15

FCM2012C-800(0805)

1 2

D3 @DAN217

1

2

3

JP2

CRT CONN.

6

11

1

7

12

2

8

13

3

9

14

4

10

15

5

R4

75_1%

12

U10

74AHCT1G125GW

2 4

1

3

5

R3

75_1%

12

C105

100PF_0402

12

C110

.1UF_0402

12

U2

74AHCT1G125GW

2 4

1

3

5

L5 FBM-11-160808-121

1 2

C106

.1UF_0402

12

C7

3.3PF

12

C103

100PF_0402

12

D5 @DAN217

1

2

3

L13

FCM2012C-800(0805)

1 2

R5

75_1%

12

R98

4.7K_0402

12

R103

0_0402

12

R97

10K_0402

12

C104

100PF_0402

12

C2

100PF_0402

12

C4

27PF

12

G

D

S

Q6

2N7002

2

1 3

U12

TC7ST08FU

2

14

5

R139 @0_0402

1 2

R135 0_0402

1 2

C172

.1UF_25V

12

C195

.1UF_0402

12

C211

.1UF_0402

12

C218

.1UF_0402

12

C217

.1UF_0402

12

C241

.1UF_0402

12

C161

.1UF_0402

12

C621

@3.3PF

12

C622

@3.3PF

12

C623

@3.3PF

12

G

D

S

Q1

SI2302DS

2

13

G

D

S

Q15

2N7002

2

13

R261

68K_0402_5%

12

R264

100K_0402_1%

1 2

DVO_D0<10> DVO_D1<10>

DVO_D2<10>

DVO_D3<10>

DVO_D4<10> DVO_D5<10>

DVO_D7<10>

DVO_D6<10>

DVO_D8<10>

DVO_D9<10> DVO_D11<10>

DVO_D10<10>

DVO_CLK#<10>

DVO_BL#<10>

DVO_STALL<10>

DVO_HSYNC<10> DVO_VSYNC<10>

GMBSCL <10>

GMBSDA<10>

DVO_CLK<10>

CLK_OSC_VCH<14>

SMB_EC_CK1 <5,28,29,33>

LTVCK <10>

LTVDA <10>

DAC_BRIG <28>

SMB_EC_DA1 <5,28,29,33>

INVT_PWM <28>

ENABKL <29>

3VDDCDA <10>

CRT_VSYNC<10>

CRT_R<10>

CRT_B<10>

3VDDCCL <10>

CRT_HSYNC<10>

CRT_G<10>

BKOFF#<28>

ENABKL<29>

PCIRST# <8,16,20,21,26,27,28>

EC_VCHRST# <29>

CRT_ON#<28>

A

A

B

B

C

C

D

D

1 1

2 2

3 3

4 4

(for use if CPU unable

to support DPSLP#)

ICH3-M (1/2)

Interface

PCI

Interface

LAN

PCI

Interface

HubLink

Interface

VSS

AC'97

Interface LPC

Interface

Clocks EEPROM

Interface

Interface

CPU

Interface

System

Managment

Interface

Interrupt

GPIO

unMUX

GeyservillePower Management

Place closely to

ICH3-M

Place closely to

ICH3-M

Close to ICH3-M.

HUB Interface VSwing Voltage

1. Place R_G and R_H in middle of Bus.

R_G

R_H

Place closely to

ICH3-M

Layout note:

Locate J1 and R265 on bottom side and with

easy access through memo ry door

PT Change la yout pad

ADY11 LA-1181 2

Intel ICH3-M

16 41Friday, November 16, 2001

Compal Electronics, Inc.

Title

SizeDocument Number Rev

Date: Sheet of

HUB_PD[0..10]

PIRQA#

PIRQB#

PIRQD#

PIRQC#

+R_VBAIS

AD27

AD16

AD13

AD12

RTC_X1

GPIO5

RTC_X2

ICH_WAKE_UP#

AD8

AD3

AD2

AD1

CLK_ICHAPIC

ICH_L_OUT#

HUB_PD5

AD14

AD9

PIRQB#

HUB_PD0

AD26

AD20

AD17

AD11

AD10

AD7

AD6

CLK_ICH14

CLK_ICH14 HUB_ICH_RCOMP

GPIO3

HUB_PD10

HUB_PD4

AD22

RTC_VBIAS

HUB_PD9

HUB_PD3

HUB_PD2

AD31

AD30

AD21

RTC_VBIAS

RTC_X2

RTC_X1

CLK_ICH48

AD28

PBTN_OUT#

IDE_PATADET

HUB_PD8

AD23

AD19

CLK_ICHPCI

GPIO2

ICH_SCI#

HUB_PD6

HUB_PD1

CLK_ICHPCI

AD4

CLK_ICHHUB

ICH_THRM#

PIRQA#

PIRQC#

GPIO4

AD25

AD24

EC_SMI#

AD29

PIRQD#

HUB_PD7

AD15

CLK_ICH48

RTC_RST#

AD18

AD5

AD0

CLK_ICHHUB

IAC_BITCLK

AC_RST#

SDATA_IN0

SDATA_IN1

SDATAO

IAC_BITCLK

SDATA_IN0

SDATA_IN1

IAC_SYNC

IAC_SDATAO

IAC_SYNC

CLK_ICHAPIC

EC_SMI#

ICH_SCI#

ICH_L_OUT#

ICH_THRM#

PBTN_OUT#

PM_PWROK BATTLOW#

BATTLOW#

IDE_PATADET

SDATAO

PIDEPWR

GPIO2

GPIO3

GPIO4

GPIO5

ICH_RI#

ICH_RI#

ICH_WAKE_UP#

AC_RST#

+RTCVCC

+RTCVCC

+VS_HUBREF

+VS_HUBVSWING

+1.5VS

+1.8VS

+VS_HUBVSWING

+3VS

+3VALW

+3VALW

+3VS

+3VS

+3VS

+3VALW

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,I

NC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF

THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE

INFORMATION CONTAINS MAY BE

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF

COMPAL ELECTRONICS,INC.

R335 36.5_1%

1 2

R265

1K_0402

12

C539

.01UF_0402

12

C534

.01UF_0402

12

R287

@10K_0402

12

C518

15PF

12

R311

10_0402

12

R282 10M

1 2

C460

12PF

12

R281 10M

1 2

C482

.047UF

1 2

R273 1K_0402

1 2

X2

32.768KHZ

C465

12PF

12

J1

JOPEN

12

C477

1UF

12

R280 15K

1 2

C554

@15PF

12

R336

@10

12

C574

5PF_0402

12

R369

10_0402

12

C514

5PF_0402

R306

33_0402

1 2

R408

10K_0402

1 2

C595 @33PF_0402

1 2

R391

@22_0402

1 2

R392

33_0402

1 2

R298 33_0402

12

U37A

ICH3-M

J2

K1

J4

K3

H5

K4

H3

L1

L2

G2

L4

H4

M4

J3

M5

J1

F5

N2

G4

P2

G1

P1

F2

P3

F3

R1

E2

N4

D1

P4

E1

P5

K2

K5

N1

R2

A4

E3

D2

D5

B4

D3

F4

A3

R4

E4

U22

W23

Y21

AA23

AB23

AA21

J22

AB22

V23

Y22

AC5

AB5

AC4

AB2

AC3

Y6

H1

H2

L5

Y1

W1

M1

M2

G5

N3

B3

B6

D4

C4

F1

M3

T5

U23

Y23

W21

L22

M21

M23

N20

P21

R22

R20

T23

M19

P19

N19

T19

R19

N22

P23

K19

L20

L19

E9

D8

E8

D10

C8

A8

A9

B9

C10

A10

C9

D7

V4

Y5

AB3

V5

AC2

AB21

AB1

AA6

AA1

AA7

W20

AA5

AA2

V21

U21

AA4

AB4

U5

U20

Y20

V19

B7

D11

B11

C11

C7

A7

V1

U3

T3

U2

T2

U4

U1

V2

W2

Y4

Y2

W3

W4

Y3

AC6

AC7

Y7

F20

J23

AB7

H22

W19

AB14

A5

C5

B5

A6

A2

B2

C1

B1

J21

J20

J19

A1

A13

A16

A17

A20

A23

B8

B10

B13

B14

B15

B18

B19

B20

B22

C3

C6

F19

C14

C15

C16

C17

C18

C19

C20

C21

C22

D9

D13

D16

D17

D20

D21

D22

E5

PCI_AD0

PCI_AD1

PCI_AD2

PCI_AD3

PCI_AD4

PCI_AD5

PCI_AD6

PCI_AD7

PCI_AD8

PCI_AD9

PCI_AD10

PCI_AD11

PCI_AD12

PCI_AD13

PCI_AD14

PCI_AD15

PCI_AD16

PCI_AD17

PCI_AD18

PCI_AD19

PCI_AD20

PCI_AD21

PCI_AD22

PCI_AD23

PCI_AD24

PCI_AD25

PCI_AD26

PCI_AD27

PCI_AD28

PCI_AD29

PCI_AD30

PCI_AD31

PCI_C/BE#0

PCI_C/BE#1

PCI_C/BE#2

PCI_C/BE#3

PCI_GNT#0

PCI_GNT#1

PCI_GNT#2

PCI_GNT#3

PCI_GNT#4

PCI_REQ#0

PCI_REQ#1

PCI_REQ#2

PCI_REQ#3

PCI_REQ#4

CPU_RCIN#

CPU_PWRGOOD

CPU_NMI

CPU_INTR

CPU_INIT#

CPU_IGNNE#

CPU_FERR#

CPU_DPSLP#

CPU_A20M#

CPU_A20GATE

SMB_ALERT#/GPIO11

SMB_DATA

SMB_CLK

SMLINK1

SMLINK0

SM_INTRUDER#

PCI_TRDY#

STOP#

PCI_SERR#

PCI_RST#

PCI_PME#

PCI_LOCK#

PCI_PERR#

PCI_PAR

PCI_IRDY#

PCI_GPIO17/GNTB#/GNT5#

PCI_GPIO16/GNTA#

PCI_GPIO1/REQB#/REQ5#

PCI_GPIO0/REQA#

PCI_FRAME#

PCI_DEVSEL#

PCI_CLK

STPCLK#

CPU_SMI#

CPU_SLP#

HUB_PD0

HUB_PD1

HUB_PD2

HUB_PD3

HUB_PD4

HUB_PD5

HUB_PD6

HUB_PD7

HUB_PD8

HUB_PD9

HUB_PD10

HUB_CLK

HUB_PAR

HUB_PSTRB

HUB_PSTRB#

HUB_RCOMP

HUB_VREF

HUB_VSWING

EEP_CS

EEP_DIN

EEP_DOUT

EEP_SHCLK

LAN_RXD0

LAN_RXD1

LAN_RXD2

LAN_TXD0

LAN_TXD1

LAN_TXD2

LAN_JCLK

LAN_RSTSYNC

PM_AGPBUSY#/GPIO6

PM_AUXPWROK

PM_BATLOW#

PM_C3_STAT#/GPIO21

PM_CLKRUN#/GPIO24

PM_DPRSLPVR

PM_PWRBTN#

PM_PWROK

PM_RI#

PM_RSMRST#

PM_SLP_S1#/GPIO19

PM_SLP_S3#

PM_SLP_S5#

PM_STPCPU#/GPIO20

PM_STPPCI#/GPIO18

PM_SUS_CLK

PM_SUS_STAT#

PM_THRM#

PM_GMUXSEL/GPIO23

PM_CPUPREF#/GPIO22

PM_VGATE/VRMPWRGD

AC_BITCLK

AC_RST#

AC_SDATAIN0

AC_SDATAIN1

AC_SDATAOUT

AC_SYNC

LPC_AD0

LPC_AD1

LPC_AD2

LPC_AD3

LPC_DRQ#0

LPC_DRQ#1

LPC_FRAME#

GPIO_7

GPIO_8

GPIO_12

GPIO_13

GPIO_25

GPIO_27

GPIO_28

CLK_RTCX2

CLK_RTCX1

CLK_RTEST#

CLK_48

CLK_14

CLK_VBIAS

INT_SERIRQ

INT_IRQ15

INT_IRQ14

INT_PIRQH#/GPIO5

INT_PIRQG#/GPIO4

INT_PIRQF#/GPIO3

INT_PIRQE#/GPIO2

INT_PIRQD#

INT_PIRQC#

INT_PIRQB#

INT_PIRQA#

INT_APICD1

INT_APICD0

INT_APICCLK

VSS0

VSS1

VSS2

VSS3

VSS4

VSS5

VSS6

VSS7

VSS8

VSS9

VSS10

VSS11

VSS12

VSS13

VSS14

VSS15

VSS16

VSS17

VSS18

VSS19

VSS20

VSS21

VSS22

VSS23

VSS24

VSS25

VSS26

VSS27

VSS28

VSS29

VSS30

VSS31

VSS32

VSS33

VSS34

R318

301_1%

12

R319

301_1%

12

C532

.1UF_0402

12

C559

10PF_0402

12

R352

10_0402

12

R288 0_0402

1 2

D13

RB751V

21 R304 10K_0402

1 2

D12

RB751V

21 R300 10K_0402

1 2

D14

RB751V

21 R308 10K_0402

1 2

D11

RB751V

21

R277

0_0402

1 2

D9 1SS355

21 R266 10K_0402

1 2

R285 10K_0402

1 2

C606

@27PF

12

C607

@27PF

12

R393

22_0402

12

R396 @10K_0402

1 2

R411 10K_0402

1 2

R409 @10K_0402

1 2

R425 10K_0402

1 2

R426 10K_0402

1 2

R427 10K_0402

1 2

R424 10K_0402

1 2

D26

RB751V

21

D25

RB751V

21

R423 10K_0402

1 2

R440

@1K_0402

1 2

R438 33_0402

1 2

R445 @22M

1 2

R446

@2.4M_1%

1 2

CLK_ICH14<14>

PCIRST# <8,15,20,21,26,27,28>

LAD1 <26>

CLK_ICHPCI <14>

HUB_PSTRB <8>

GNT#1<18>

REQ#4<18>

PM_DPRSLPVR<32>

GNT#2<18,21>

LAD2 <26>

FRAME# <18,20,21,27>

C/BE#0<20,21,27>

LAD0 <26>

REQ#0<18>

C/BE#3<20,21,27>

HUB_PD[0..10] <8>

CLK_ICH48<14>

TRDY# <18,20,21,27>

LAD3 <26>

REQ#3<18,20>

HUB_PSTRB# <8>

C/BE#1<20,21,27>

REQ#1<18>

AD[0..31]<20,21,27>

PM_GMUXSEL<6,32>

C/BE#2<20,21,27>

CLK_ICHHUB <14>

IRDY# <18,20,21>

STOP#<18,20,21>

PCI_REQB# <18>

PCI_REQA# <18>

PERR# <18,20,21>

REQ#2<18,21>

PAR <20,21>

DEVSEL# <18,20,21>

SIRQ <18,21,26>

LDRQ#0 <26>

KBRST# <28>

PM_CPUPERF#<5>

SM_INTRUDER# <18>

SMB_CLK <12,14,18>

SMB_DATA <12,14,18>

PM_CLKRUN#<18,20,21,26> IRQ14 <18,19>

IRQ15 <18,19>

SLP_S3#<28> SLP_S1#<14,28>

SLP_S5#<28> PM_STPCPU#<14> PM_STPPCI#<14>

SUS_STAT#<26>

H_DPSLP#<5,32>

SMB_ALERT# <18>

SM_SEL# <12>

LDRQ#1

GATEA20<28>

H_SMI# <5>

H_INIT# <5>

SMLINK1 <18>

H_NMI <5>

SMLINK0 <18>

H_STPCLK# <5>

H_INTR <5>

H_FERR# <5>

H_PWRGD <5>

H_IGNNE# <5>

ICH_VGATE<7,30>

PIRQA#<18,21> PIRQB#<18,20> PIRQC#<18> PIRQD#<18>

GNT#3<18,20>

AGP_BUSY#<10>

PM_C3_STAT#

GNT#0<18>

IAC_BITCLK<23,25>

AC97_RST#<23,25>

SDATA_IN0<23>

RSMRST#<30>

RTCCLK<10>

SDATA_IN1<25> SERR# <18,20,21>

PLOCK# <18,21>

GNT#4<18>

IAC_SYNC<23,25>

IAC_SDATAO<23,25>

PM_PWROK<7>

CLK_ICHAPIC <14>

H_A20M# <5>

EC_SMI#<26,28>

SCI#<28>

LID_OUT#<29>

EC_THRM#<28>

PWRBTN_OUT#<29>

VLBA#<29>

PICD0 <5>

PICD1 <5>

SWI#<29>

EC_WAKEUP#<29>

LFRAME# <26>

PIDEPWR <19>

ICH_RI#<18>

A

A

B

B

C

C

D

D

1 1

2 2

3 3

4 4

ICH3-M (2/2)Interface

IDE

Interface

USB

Misc

Power

Power

VSS

Layout note The Cap c lose to

ICH3-M (< 1 inch)

Disable Timeo ut feature

0=I2C CTRL CPUVID select

1=Bus switch CPUVID select

M/B ID

MB_ID0 MB_ID1

SST

PT

ST

QT

0 0

01

10

1 1

Note:

R376=22.6_1% for B0(QB63 part)

R376=18.2_1% for B0(QB62 & SL5LF pa rt)

Close ly Pin AB6

*

ADY11 LA-1181 2

Intel ICH3-M

17 41Friday, November 16, 2001

Compal Electronics, Inc.

Title

SizeDocument Number Rev

Date: Sheet of

SDD10

SDD1

PDD0

PDD9

SDD11

PDD6

PDD2

SDD8

SDD0

PDD3

PDD13

PDD12

SDD12

OVCUR#1

PDD7

SDD13

PDD8

PDD1

SDD6

PDD11

SDD4

VCC5REF

SDD3

SDD2

PDD5

USBP0-

AV_VID4

USBP0+

PDD4

SDD7

PDD10

SDD9

PDD15

PDD14

SDD5

USBP2+

USBP2-

OVCUR#2

OVCUR#3

OVCUR#4

OVCUR#5

ICH_SPKR

VCC1.8SUS

VCC1.8SUS

ICH_ACIN

ICH_ACIN

VCCPAU

USBP0-

USBP0+

USBP2+

VCCREFSUS

ICH_SPKR

USBP2-

OVCUR#5

OVCUR#4

OVCUR#3

OVCUR#1

OVCUR#0

SDD15

SDD14

ICH_IDE_SRST#

AV_VID4

MB_ID0

MB_ID1

MB_ID0

MB_ID1

+5VS+3VS+3VALW

+3VALW

+1.5VS

+1.8VALW

+VCC_RTC

+V1.8_ICHLAN

+1.8VALW

+3VS+1.8VS

+3VS

+3VALW

+1.8VS

+3VS

+3V

VCCPSUS

VCC1.8SUS

+5VS

+3VS

+3VS

+RTCVCC+VCC_RTC

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,I

NC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF

THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE

INFORMATION CONTAINS MAY BE

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF

COMPAL ELECTRONICS,INC.

D10

1SS355

21

C573

1UF

12

C488

.1UF_0402

12

R248

1K_0402

12

R376

18.2_1%

12

L63

FBM-11-201209-601T

1 2

D23 RB751V

21

R370

100K_0402

12

R397

0_0402

12

R389

0_0805

1 2

R403

0_0805

12

R402

0_0805

12

R395

0_0805

1 2

C597 5PF_0402

1 2

C598 5PF_0402

1 2

C602

.1UF_0402

12

R346

@1K_0402

1 2

RP22

8P4R_10K

1 8

2 7

3 6

4 5

U37B

ICH3-M

D19

A19

E17

B17

D15

A15

D18

A18

E16

B16

D14

A14

E12

D12

C12

B12

A12

A11

H20

G22

F21

G19

E22

E21

H21

G23

F23

G21

D23

E23

B21

AC15

AB15

AC21

AC22

AA14

AC14

AA15

AC20

AA19

AB20

W12

AB11

AA10

AC10

W11

Y9

AB9

AA9

AC9

Y10

W9

Y11

AB10

AC11

AA11

AC12

Y17

W17

AC17

AB16

W16

Y14

AA13

W15

W13

Y16

Y15

AC16

AB17

AA17

Y18

AC18

Y13

Y19

AB12

AB18

AC13

AC19

Y12

AA18

AB13

AB19

H23

E13

F14

K12

P10

V6

V7

F15

F16

F7

F8

K10

AB6

E6

W8

C13

W5

F9

F10

P14

U18

V22

C23

B23

E7

T21

D6

T1

C2

A21

A22

F6

G6

H6

J6

M10

R6

T6

U6

G18

H18

P12

V15

V16

V17

V18

J18

M14

R18

T18

U19

F17

F18

K14

E10

V8

V9

E11

K6

K18

P6

P18

V10

V14

E14

E15

E18

E19

E20

F22

G3

G20

H19

AA22

J5

K11

K13

K20

K21

K22

K23

L3

L10

L11

L12

L13

L14

L21

L23

M11

M12

M13

M20

M22

N5

N10

N11

N12

N13

N14

N21

N23

P11

P13

P20

P22

R3

R5

R21

R23

T4

T20

T22

V3

AC23

V20

W6

W7

W10

W14

W18

W22

Y8

AA3

AA8

AA12

AA16

AA20

AB8

AC1

AC8

USB_PP0

USB_PP1

USB_PP2

USB_PP3

USB_PP4

USB_PP5

USB_PN#0

USB_PN#1

USB_PN#2

USB_PN#3

USB_PN#4

USB_PN#5

USB_OC#0

USB_OC#1

USB_OC#2

USB_OC#3

USB_OC#4

USB_OC#5

USB_LEDA#0/GPIO32

USB_LEDA#1/GPIO33

USB_LEDA#2/GPIO34

USB_LEDA#3/GPIO35

USB_LEDA#4/GPIO36

USB_LEDA#5/GPIO37

USB_LEDG#0/GPIO38

USB_LEDG#1/GPIO39

USB_LEDG#2/GPIO40

USB_LEDG#3/GPIO41

USB_LEDG#4/GPIO42

USB_LEDG#5/GPIO43

USB_RBIAS

IDE_PDCS1#

IDE_PDCS3#

IDE_SDCS1#

IDE_SDCS3#

IDE_PDA0

IDE_PDA1

IDE_PDA2

IDE_SDA0

IDE_SDA1

IDE_SDA2

IDE_PDD0

IDE_PDD1

IDE_PDD2

IDE_PDD3

IDE_PDD4

IDE_PDD5

IDE_PDD6

IDE_PDD7

IDE_PDD8

IDE_PDD9

IDE_PDD10

IDE_PDD11

IDE_PDD12

IDE_PDD13

IDE_PDD14

IDE_PDD15

IDE_SDD0

IDE_SDD1

IDE_SDD2

IDE_SDD3

IDE_SDD4

IDE_SDD5

IDE_SDD6

IDE_SDD7

IDE_SDD8

IDE_SDD9

IDE_SDD10

IDE_SDD11

IDE_SDD12

IDE_SDD13

IDE_SDD14

IDE_SDD15

IDE_PDDACK#

IDE_SDDACK#

IDE_PDDREQ

IDE_SDDREQ

IDE_PDIOR#

IDE_SDIOR#

IDE_PDIOW#

IDE_SDIOW#

IDE_PIORDY

IDE_SIORDY

SPKR

VCC_SUS0

VCC_SUS1

VCC_SUS2

VCC_SUS3

VCC_SUS4

VCC_SUS5

VCC_USB0/VCC_SUS6

VCC_USB1/VCC_SUS7

VCC_AUX0/VCCLAN1_8

VCC_AUX1/VCCLAN1_8

VCC_AUX2/VCCLAN1_8

VCC_RTC

VCC5REF1

VCC5REF2

VCC5REFSUS1

VCC5REFSUS2

VCCPAUX0/VCCLAN3_3

VCCPAUX1/VCCLAN3_3

VCCPCPU0

VCCPCPU1

VCCPCPU2

VCCUSBBG/VCC_SUS8

VCCUSBPLL/VCC_SUS9

N/C0

N/C1

N/C2

N/C3

N/C4

VSS102

VSS103

VCCPPCI0

VCCPPCI1

VCCPPCI2

VCCPPCI3

VCCPPCI4

VCCPPCI5

VCCPPCI6

VCCPPCI7

VCCP0

VCCP1

VCCPIDE0

VCCPIDE1

VCCPIDE2

VCCPIDE3

VCCPIDE4

VCCPHL0

VCCPHL1

VCCPHL2

VCCPHL3

VCCA

VCCPSUS3/VCCPUSB0

VCCPSUS4/VCCPUSB1

VCCPSUS5/VCCPUSB2

VCCPSUS0

VCCPSUS1

VCCPSUS2

VCCCORE0

VCCCORE1

VCCCORE2

VCCCORE3

VCCCORE4

VCCCORE5

VCCCORE6

VSS35

VSS36

VSS37

VSS38

VSS39

VSS40

VSS41

VSS42

VSS43

VSS44

VSS45

VSS46

VSS47

VSS48

VSS49

VSS50

VSS51

VSS52

VSS53

VSS54

VSS55

VSS56

VSS57

VSS58

VSS59

VSS60

VSS61

VSS62

VSS63

VSS64

VSS65

VSS66

VSS67

VSS68

VSS69

VSS70

VSS71

VSS72

VSS73

VSS74

VSS75

VSS76

VSS77

VSS78

VSS79

VSS80

VSS81

VSS82

VSS83

VSS84

VSS85

VSS86

VSS87

VSS88

VSS89

VSS90

VSS91

VSS92

VSS93

VSS94

VSS95

VSS96

VSS97

VSS98

VSS99

VSS100

VSS101

U25

@74AHCT1G125GW

24

1

3

5

R363

1K_0402

12

R254 0_0402

1 2

R441

@10K_0402

12

R443

10K_0402

12

R442

10K_0402

12

R444

@10K_0402

12

C631

.1UF_0402

12

R451

1K_0402

1 2

R453 0_0402

1 2

PDDACK# <19>

SDIORDY <19>

PDA1 <19>

SDCS3# <19>

AC_VID2<6> SDD[0..15] <19>

PDIORDY <19>

AC_VID4<6>

PDA0 <19>

PDD[0..15] <19>

SDCS1# <19>

AC_VID1<6>

PDA2 <19>

AC_VID0<6>

PDIOW# <19>

PDCS1# <19>

SDDREQ <19>

PDCS3# <19>

SDIOR# <19>

PDDREQ <19>

SDA1 <19>

SDIOW# <19>

SDA2 <19>

SDDACK# <19>

AC_VID3<6>

PDIOR# <19>

SDA0 <19>

ICH_SPKR<24>

ICH_M_SEN#<18>

ACIN<28,33,35>

USBP2-<30> USBP2+<30>

USBP0+<30> USBP0-<30>

EC_FLASH#<28>

OVCUR#2<30>

OVCUR#0<30>

SIDERST#<19>

PIDERST#<19>

A

A

B

B

C

C

D

D

1 1

2 2

3 3

4 4

ADY11 LA-1181 2

ICH3-M Decoupling & Pull-Up

18 41Friday, November 16, 2001

Compal Electronics, Inc.

Title

SizeDocument Number Rev

Date: Sheet of

+3VS +3VS

+3VS

+3VS +3VS

+3VS

+3VALW

+3VS

+3VALW

+3VS

+1.5VS

+1.8VS

VCC1.8SUS

+3VS

+3VS

+RTCVCC

+3VS

VCCPSUS

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,I

NC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF

THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE

INFORMATION CONTAINS MAY BE

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF

COMPAL ELECTRONICS,INC.

R289 10K_0402

1 2

R291 10K_0402

1 2

C499

.1UF_0402

12

+C503

1UF

12

C517

.1UF_0402

12

C479

47PF_0402

12

C576

47PF_0402

12

C563

47PF_0402

12

C485

.1UF_0402

12

+C596

22UF_10V_1206

12

C569

.1UF_0402

12

C568

.1UF_0402

12

C524

.1UF_0402

12

C567

.1UF_0402

12

C591

.1UF_0402

12

+C475

22UF_10V_1206

12

C491

.1UF_0402

12

C610

47PF_0402

12

C523

.1UF_0402

12

C490

.1UF_0402

12

C608

47PF_0402

12

C521

.1UF_0402

12

C476

.1UF_0402

12

C611

.1UF_0402

12

C566

.1UF_0402

12

C590

.1UF_0402

12

+C609

22UF_10V_1206

12

C588

.1UF_0402

12

C600

.1UF_0402

12

C601

.1UF_0402

12

RP13

10P8R_8.2K

10

9

8

7

6

1

2

3

4

5

RP21

10P8R_8.2K

10

9

8

7

6

1

2

3

4

5

RP19

10P8R_8.2K

10

9

8

7

6

1

2

3

4

5

R400 @8.2K_0402

1 2

C550

.1UF_0402

12

C519

33PF_0402

12

C545

.1UF_0402

12

C509

.1UF_0402

12

C561

.1UF_0402

12

C530

33PF_0402

12

C497

.1UF_0402

12

+C522

100UF_D2_6.3V

12

C583

.1UF_0402

12

C603

.1UF_0402

12

+C586

22UF_10V_1206

12

C589

.1UF_0402

12

R398 @8.2K_0402

1 2

R399 @8.2K_0402

1 2

R283 4.7K_0402

1 2

R284 4.7K_0402

1 2

R263 10K_0402

1 2

R262 4.7K_0402

1 2

R267 4.7K_0402

1 2

R434 10K_0402

1 2

R435 10K_0402

1 2

STOP#<16,20,21>

GNT#2<16,21>

FRAME#<16,20,21,27>

TRDY#<16,20,21,27> IRDY#<16,20,21> SERR# <16,20,21>

DEVSEL# <16,20,21>

PERR# <16,20,21>

PLOCK# <16,21>

PCI_REQA#<16> PCI_REQB#<16> REQ#3 <16,20>

REQ#2 <16,21>

REQ#1<16> REQ#0<16> REQ#4 <16>

IRQ14<16,19>

IRQ15 <16,19>

PIRQA# <16,21>

PIRQB# <16,20>

PIRQC# <16>

PIRQD#<16>

SMB_ALERT#<16>

ICH_RI#<16>

GNT#1<16>

SIRQ <16,21,26>

GNT#3<16,20>

PM_CLKRUN#<16,20,21,26>

SMLINK0<16> SMLINK1<16>

SMB_DATA<12,14,16> SMB_CLK<12,14,16>

GNT#0<16>

ICH_M_SEN#<17>

GNT#4<16>

SM_INTRUDER#<16>

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

W=80mils

Placec caps. near FDD CONN.

CD-ROM Connector

Placea caps. near HDD

CONN.

FDD Connector

HDD Connector

Placea caps. near CDROM

CONN.

Correct HDD pin define ,pls update layout

# means no-pop for Tang

Note: PT-test must pop these component s

S

Layout Note: +5VSHD D trace

width 60 mil

SI2301DS: P CHANNEL

VGS: -4.5V, RDS: 130 mOHM

VGS: -2.5V, RDS: 190mOHM

Id(MAX): 2.3A

VGS(MAX): +-8V

3

D1

G

2

ADY11 LA-1181 2

IDE/FDD/CD-ROM Module

19 41Friday, November 16, 2001

Compal Electronics, Inc.

Title

SizeDocument Number Rev

Date: Sheet of

WDATA#

MTR0#

FDDIR#

DISKCHG#

INDEX#

WRPRT#

TRK0#

SDD11

SDD13

SDD6

SDD3

SDD1

SDD8

SDD14

RIRQ15

SDD7

RSDDACK#

SDD10

SDD0

SDD5

SDIORDY

SDD2 SDD15

SDDREQ

SDD9

PDIAG#

SDD4 SDD12

HDSEL#

WGATE#

RDATA#

STEP#

SEC_CSEL

DRV0#

SDD[0..15]

PDD[0..15]

PDD8

PDD6

PDD5

PDD4 PDD11

PDD3 PDD12

PDD2 PDD13

PDD1 PDD14

PDD0 PDD15

RPDDACK#

PDDREQ

PDIORDY

RIRQ14

PCSEL

PDD10

PDD9

DRV0# ACT_LED#

PDD7

STEP#

WRPRT#

DRV0#

WGATE#

RDATA#

DISKCHG#

INDEX#

HDSEL#

WDATA#

TRK0#

FDDIR#

MTR0#

3MODE#_11

3MODE#_13

3MODE#

3MODE#_11

3MODE#_13

PDIORDY

SDIORDY

PDDREQ

RPDDACK#

RIRQ14

SDDREQ

RSDDACK#

RIRQ15

PHDD_LED#

PHDD_LED#

SHDD_LED#

SHDD_LED#

+5VS

+5VS

+5VS

+5VS

+5VS

+5VS

+5VS

+5VSHDD

+5VSHDD

+5VS

+5VS

+5VS

+3VS

+3VS

+5VS

+5VSHDD

+5VS

+12VALW+5VS+5VSHDD

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,I

NC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF

THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE

INFORMATION CONTAINS MAY BE

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF

COMPAL ELECTRONICS,INC.

C366

1UF_25V_0805

12

C364

.1UF_0402

12

C102

.1UF_0402

12

C451

1000PF_0402

12

C584

#.1UF_0402

12

C83 .1UF_0402

1 2

C100

1UF_25V_0805

12

C599

#.1UF_0402

12

C587

#1UF_25V_0805

12

C365

1000PF_0402

12

RP15

10P8R_1K

10

9

8

7

6

1

2

3

4

5

RP20

8P4R_1K

1 8

2 7

3 6

4 5

R197

470_0402

1 2

C445

10UF_16V_1206

12

C592

#10UF_16V_1206

12

C81

10UF_16V_1206

12

R239

470_0402

1 2

C101

.1UF_0402

1 2

R76

@10K_0402

1 2

R244

@10K_0402

1 2

R206 100K_0402

1 2

JP24

#85201-2605-ACES-FDDCON

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

+5V

INDEX

+5V

DRIVE SELECT

+5V

DISK CHANGE

NC

READY

DENSITY OUT

MOTOR ON

NC

DIRECTION

DENSITY 2

STEP

GND / NC

WRITE DATA

GND

WRITE GATE

GND

TRACK 00

NC / GND

WRITE PROTECT

GND

READ DATA

GND

SIDE 1 SELECT

R366 @0_0402

1 2

R365 #0_0402

1 2

R243

4.7K_0402

1 2

R212

4.7K_0402

1 2

C85

10UF_16V_1206

12

C376

1000PF_0402

12

C377

.1UF_0402

12

C378

1UF_25V_0805

12

R242 22_0402

1 2

R241 22_0402

1 2

R240 @5.6K_0402

1 2

R213 22_0402

1 2

R207 22_0402

1 2

R217 @5.6K_0402

1 2

C443

33PF_0402

1 2

C399

33PF_0402

1 2

C444

10UF_16V_1206

12

U26A

74HCT08

1

23

14

7

R79

100K_0402

1 2

JP20

HH99221-S6-HDDCON

1 2

3 4

5 6

7 8

9 10

11 12

13 14

15 16

17 18

19 20

21 22

23 24

25 26

27 28

29 30

31 32

33 34

35 36

37 38

39 40

41 42

43 44

U26D

74HCT08

12

13 11

JP16

CD-ROM CONN.

1 2

3 4

5 6

7 8

9 10

11 12

13 14

15 16

17 18

19 20

21 22

23 24

25 26

27 28

29 30

31 32

33 34

35 36

37 38

39 40

41 42

43 44

45 46

47 48

49 50

R238

100K_0402

1 2

C413 47PF_0402

1 2

C416 47PF_0402

1 2

C411 47PF_0402

1 2

R237

100K_0402

12

C438

.01UF_0402

12

R428

150K

12

G

D

S

Q13

2N7002

2

13

Q14

SI2301DS

2

13

SDIOW#<17>SDIORDY<17>

SDCS1#<17> SDA0<17> SDA1<17>

INT_CD_R <23>

CD_AGND <23>

SIDERST#<17>

INT_CD_L<23>

SDA2 <17>

SDDREQ <17>

SDIOR# <17>

SDCS3# <17>

SDD[0..15]<17>

PDDREQ<17> PDIOW#<17> PDIOR#<17> PDIORDY<17>

PDA1<17> PDA0<17> PDCS1#<17> PDCS3# <17>

PDA2 <17>

ACT_LED# <27>

INDEX#<26>

DRV0#<26>

DISKCHG#<26>

MTR0#<26>

FDDIR#<26>

WDATA#<26>

HDSEL#<26>

TRK0#<26>

STEP#<26>

WRPRT#<26>

WGATE#<26>

RDATA#<26>

3MODE#<26>

PIDERST#<17>

PDD[0..15]<17>

PDDACK#<17>

IRQ14<16,18>

IRQ15<16,18>

SDDACK#<17>

FDD_PRES#<29>

PIDEPWR<16>

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DSX630G H:1.2mm +-30ppm

(20PF)

Compal Electron ics, Inc.

Set Standard features

Set SMBus Mandatory

Set 16K EEPROM

3COM

3C920 LAN CONTROLLER

Layout Note:

H0022 Pls closely to RJ45 Conn.

Place closely to Lan chips

Place closely to Lan chips

Note1

Note1:Place this test point in the RAM door area

AT93C66 P in6 (ORG)

1=16 bit ; 0=8 bit

(LAN_ACT)

(LAN_100LI

NK)

(LAN_10LI

NK)

The cap please closely to H0022

10M LINK : Green LED

100M LINK :O range LED

Activity :

Blink(Y ellow LED)

R448 Closel y AT93C86

FDC6320C

Gate 1: N-MOS

Gate 2: P-MOS

ADY11 LA-1181 2

3COM 3C920 LAN

20 41Friday, November 16, 2001

Title

Size Document Number Rev

Date: Sheet of

SOS6#

AD8

AD11

AD12

SOS2#

SOS3#

AD15

AD2

AD6

AD10

AD30

AD7

AD14

AD22

SOS7#

AD26

AD16

AD9

AD19

LAN_SOS5#

AD21

AD20

AD24

AD31

SOS4#

AD1

AD3

AD4

AD5

AD17

AD18

AD25

AD29

LAN_SOS1#

LAN_CRY1

AD0

AD13

AD27

AD28

AD23

LAN_AD17

CLK_PCI_LAN

LAN_AD17AD17

LAN_TX+

LAN_RX+

LAN_CRY2

LAN_RJ45T+

LAN_RJ45R+

LAN_RJ45T-

LAN_RJ45R-

LAN_100

LAN_10

LAN_100

LAN_10

SOS2#

SOS1#

SOS3#

SOS4#

SOS5#

SOS6#

SOS7#

CLK_PCI_LAN

LAN_RX+

LAN_RX-

LAN_TX+

LAN_TX-

LAN_EESEL

LAN_DFRMEE

LAN_DTOEE

LAN_P1

LAN_P1

LAN_RX-

LAN_TX-

LAN_EECLK

LAN_DTOEE

LAN_DFRMEE

LAN_EECLK

LAN_RST#

LAN_RST#

LAN_SOS5#

LAN_SOS1#

+3VASB +3VALW+3RX_PWR

+3TX_PWR+3TX_PWR

+3VS

+3VASB

+3RX_PWR

+3RX_PWR+3VASB

+3VS

+3VASB+3VASB

+3VASB

+3V

+3VASB

+3VASB

+3VASB

+3VASB+3VASB

+3VS

L51 @BLM21A601SPT

12

L56

#FBM-11-160808-121T

12

L54

#FBM-11-160808-121T

12

C361

#.01UF_0402

12

C356

#2.2UF_16V_0805

C428

#2.2UF_16V_0805

C381

#2.2UF_16V_0805

R215 #10K_0402

1 2

R218 #10K_0402

1 2

C424

#33PF_0402

12

Y2

XTAL

#25MHZ

1 2

R222 #10K_0402

1 2

C422

#.01UF_0402

12

C423

#33PF_0402

12

R236

#10K_0402

12

C419

#1UF

12

R233 #10K_0402

1 2

R226

#10K_0402

1 2

R178

#75_1%

12

R158

#75_1%

12

R177

#75_1%

12

R165

#75_1%

12

C298

@1000PF_1206_2KV

1 2

C253

#1000PF_1206_2KV

1 2

C425

#.01UF_0402

12

C426

#.01UF_0402

12

C427

#.01UF_0402

12

C396

#.01UF_0402

12

C389

#.01UF_0402

12

C369

#.01UF_0402

12

C374

#.01UF_0402

12

C363

#.01UF_0402

12

C397

#.01UF_0402

12

C410

#.01UF_0402

12

C375

#.01UF_0402

12

C395

#.01UF_0402

12

R231

#11.5K_1%

12

U21

#3C920-V3

B11

D11

C11

B12

A12

C12

B13

A14

C13

E11

B14

E12

D13

F11

E13

E14

J12

J13

K11

L12

K12

K13

L11

L13

N14

N13

P14

P12

M11

N12

P11

N11

D12

F12

H13

M13

N10

M14

H14

D14

A13

D2

J2

A10

A7

E2

F2

H2

P1

P7

N8

K14

A8

L1

N2

P3

K2

P5

M6

F6

F7

F8

F9

G6

G7

G8

G9

H6

H7

H8

H9

J6

J7

J8

J9

M3

L3

L4

K3

F4

C2

B1

K1

M2

M7

P10

L14

C14

A11

G14

D1

J1

B10

A6

E1

G1

H1

P9

J14

B8

P2

N3

N1

N5

N7

M1

M4

G12

M12

L9

N9

M9

L10

J11

H11

G13

H12

F14

G11

F13

M8

M10

A1

C3

G3

C10

D10

L8

B7

C7

B6

D6

C6

C5

A5

B5

A4

D5

B4

C4

A3

A2

C1

D3

E4

E3

F3

G4

H3

H4

J4

J3

K4

D7

B3

D4

B2

D9

A9

C8

D8

N6

P6

N4

P4

L5

M5

L6

L7

C9

B9

F1

G2

L2

P8

P13

AD0

AD1

AD2

AD3

AD4

AD5

AD6

AD7

AD8

AD9

AD10

AD11

AD12

AD13

AD14

AD15

AD16

AD17

AD18

AD19

AD20

AD21

AD22

AD23

AD24

AD25

AD26

AD27

AD28

AD29

AD30

AD31

CBE#0

CBE#1

CBE#2

CBE#3

VSSPCI1

VSSPCI2

VSSPCI3

VSSPCI4

VSSPCI5

VSSIO1

VSSIO2

VSSIO3

VSSIO4

VSSX1

VSSX2

VSSX3

VSSX4

VSSX5

VSSX6

VSSX7

VSSX8

VSSX9

VSSRX1

VSSRX2

VSSRX3

VSSTX1

VSSTX2

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

SOS1#

SOS2# / TXCLK

SOS3# / TXEN

SOS4# / CRS

SOS5# / RXOE

SOS6# / RXCLK

SOS7# / MDCLK

MAINP5

AUX5PN

AUXP

VDDPCI1

VDDPCI2

VDDPCI3

VDDPCI4

VDDPCI5

VDDIO1

VDDIO2

VDDIO3

VDDIO4

VDDX1

VDDX2

VDDX3

VDDX4

VDDX5

VDDX7

VDDRX1

VDDRX2

VDDRX3

VDDTX1

VDDTX2

PME

VDDLVDET

PAR

IDSEL

INTA#

RST#

GNT#

REQ#

FRAME#

IRDY#

TRDY#

DEVSEL#

STOP#

PERR#

SERR#

PME#

CLKRUN#

SMBDATA

SMBCLK

SMBCS#

WPOUT

GRST#

PCICLK

LD0 / POR0

LD1 / POR1

LD2 / POR2

LD3

LD4 / POR4

LD5

LD6 / POR6

LD7

LA0

LA1

LA2 / POR10

LA3

LA4

LA5

RXD0 / LA6

RXD1 / LA7

RXD2 / LA8

RXD3 / LA9

RXER / LA10

RXDV / LA11

TXD0 / LA12

TXD1 / LA13

TXD2 / LA14

TXD3 / LA15

COL / LA16

ROMCS#

MEMR#

MEMW#

MDIO

EESEL

EECLK / ACT

DTOEE / 100LNK

DFRAMEE / 10LNK

TXOP

TXON

RXIP

RXIN

TXCT (NC)

REF100

REF10

MEDTEST

GLBTEST#

PHYTEST#

X25HI

X25L0

NC3

NC5

NC6

R209

#1.62K_1%

12

R204

#1.91K_1%

12

C388

#.01UF_0402

12

C417

#.1UF_0402

12

RP10

@8P4R_10K

1 8

2 7

3 6

4 5 R232 @10K_0402

1 2

R234 @10K_0402

1 2

R224 @10K_0402

1 2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,I

NC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF

THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE

INFORMATION CONTAINS MAY BE

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF

COMPAL ELECTRONICS,INC.

C367

@10PF_0402

R199

@33_0402

1 2

R174

#0_0402

1 2

L55

#FLM-160808-68NKT

12

R214

#61.9_1%_0805

12

U15

#Pulse-H0022

1

2

3

6

7

8 9

10

11

14

15

16

RD+

RD-

CT

CT

TD+

TD- TX-

TX+

CT

CT

RX-

RX+

R228

#56.2_1%_0805

12

C407

#.1UF_0402

12

R225

#56.2_1%_0805

12

C412

#4.7PF_NPO

1 2

R223

#61.9_1%_0805

12

L52 #FBM-11-201209-601T

12

T1

1

R414

#10K_0402

1 2

U17

#AT93C86-10SC2.7

1

2

3

4

8

7

6

5

CS

SK

DI

DO

VCC

NC

NC/ORG

GND

R447

#200_0402

12

R436

#10K_0402

1 2

Q37

#FDC6320C

1

2

3 4

5

6

G1

S2

G2 D2

S1

D1

Q36

#FDC6320C

1

2

3 4

5

6

G1

S2

G2 D2

S1

D1

R437

#200_0402

12

R448

#200_0402

12

JP10

#JM36113-L5H7

2

1

3

4

5

6

7

8

13

14

12

11

10

9

PR1-

PR1+

PR2+

PR3+

PR3-

PR2-

PR4+

PR4-

SHLD1

SHLD2

LED_GREEN

LED_ORANGE

LDE_YELLOW+

LDE_YELLOW-

R198

#100_0402

1 2

D29 #RB751V

21

R452 #10K_0402

1 2

R208 @0_0402

1 2

R450 #10K_0402

1 2

D27 #RB751V

21

D28 #RB751V

21 R449 #10K_0402

1 2

C371

#.01UF_0402

12

C370

#.01UF_0402

12

C372

#.01UF_0402

12

C373

#.01UF_0402

12

LAN_PME#<29>

AD[0..31]<16,21,27>

FRAME#<16,18,21,27>

DEVSEL#<16,18,21>

PERR#<16,18,21>

PCIRST#<8,15,16,21,26,27,28>

IRDY#<16,18,21>

C/BE#0<16,21,27>

C/BE#2<16,21,27>

PIRQB#<16,18>

C/BE#3<16,21,27>

SERR#<16,18,21>

PAR<16,21>

GNT#3<16,18> REQ#3<16,18>

STOP#<16,18,21>

TRDY#<16,18,21,27>

C/BE#1<16,21,27>

CLK_PCI_LAN<14>

PM_CLKRUN#<16,18,21,26>

LAN_DISABLE#<28>

SOS1#<29>

SOS5#<29>

A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

ADY11 LA-11812

PCMCIA controller OZ6912

21 41Friday, November 16, 2001

Compal Electronics, Ltd.

Title

Size Document Number Rev

Date: Sheet of

S1_A[0..25]

S1_D[0..15]

S1_BVD1

S1_A23

S1_IOWR#

S1_INPACK#

S1_A15

S1_WE#

S1_A24

S1_A11

PCM_SPK#

S1_D1

S1_A10

S1_D4

S1_D0

S1_A3

S1_A22

S1_A21

S1_CE2#

S1_RDY#

S1_A4

S1_A25

S1_A14

S1_A13

S1_CD1#

S1_D2

S1_CD2#

S1_A17

S1_D7

S1_D6

S1_D5

S1_D12

S1_D10

S1_VS1

S1_A5

S1_A7

S1_A12

S1_A20

S1_A1

S1_RST

S1_A6

PCIRST#

S1_OE#

S1_D13

S1_D3

S1_D8

S1_A2

S1_D11

S1_D14

S1_BVD2

S1_A0

S1_A19

S1_A8

S1_CE1#

S1_D15

S1_D9

S1_WAIT#

S1_REG#

S1_VS2

S1_A9

S1_IORD#

S1_WP

CLK_PCI_PCM

AD26

AD5

AD29

AD10

AD24

AD18

AD3

AD22

AD14

AD30

AD6

AD21

AD28

AD16

AD19

AD7

AD31

AD9

AD8

AD12

AD27

AD15

AD13

AD4

AD25

AD20

AD23

AD17

AD11

AD2

AD1

AD0

AD[0..31]

AD20

PCM_RI#

S1_A18

S1_A16

S1_VCC

+3VALW

+3VS

+3VS

+3VS

+3VS

R203 100_0402

1 2

R201

@33_0402

12

C384

@22PF_0402

12

C339

.1UF_0402

12

C351

.1UF_0402

12

C345

.1UF_0402

1 2

D7

RB751V

21

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

R192 10K_0402

1 2

C383

.1UF_0402

12

C353

.1UF_0402

12

C338

.1UF_0402

12

C337

.1UF_0402

12

C382

.1UF_0402

12

C357

.1UF_0402

12

PQFP 144

22.2 X

22.2 X

1.60

U18

OZ6912

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

53

54

55

56

57

58

59

60

61 62

63

64

65

66

67

68

69

70

71

72

73

74

75

76

77

78

79

80

81

82

83

84

85

86

87

88

89

90

91

92

93

94

95

96

97

98

99

100

101

102

103

104

105

106

107

108

109

110

111

112

113

114

115

116

117

118

119

120

121

122

123

124

125

126

127

128

129

130

131

132

133

134

135

136

137

138

139

140

141

142

143

144

PCIREQ#

PCIGNT#

AD31

AD30

AD29

GND

AD28

AD27

AD26

AD25

AD24

C/BE3#

IDSEL

VCC

AD23

AD22

AD21

VCCP

AD20

PCIRST#

PCIPCLK

GND

AD19

AD18

AD17

AD16

C/BE2#

PCIFRAME#

PCIIRDY#

VCCP

PCITRDY#

PCIDEVSEL#

PCISTOP#

PCIPERR#

PCISERR#

PCIPAR

C/BE1#

AD15

AD14

AD13

AD12

GND

AD11

VCCP

AD10

AD9

AD8

C/BE0#

AD7

VCCP

AD6

AD5

AD4

AD3

AD2

AD1

AD0

GND

RI_OUT#/PME#

MF0

MF1 SPKROUT

VCCI

MF2

MF3

G_RST#

MF4

MF5

MF6

SUSPEND#

VPPD0

VPPD1

VCCD0#

VCCD1#

CCD1#/CD1#

CAD0/D3

CAD2/D11

GND

CAD1/D4

CAD4/D12

CAD3/D5

CAD6/D13

CAD5/D6

RSVD/D14

CAD7/D7

VCC

CAD8/D15

CCBE0#/CE1#

CAD9/A10

VCCCB

CAD10/CE2#

CAD11/OE#

CAD13/IORD#

GND

CAD12/A11

CAD15/IOWR#

CAD14/A9

CAD16/A17

CCBE1#/A8

RSVD/A18

CPAR/A13

VCC

CBLOCK#/A19

CPERR#/A14

CSTOP#/A20

CGNT#/WE#

CDEVSEL#/A21

CCCLK/A16

CTRDY#/A22

CIRDY#/A15

CFRAME#/A23

CCBE2#/A12

CAD17/A24

GND

CAD18/A7

CAD19/A25

CVS2/VS2#

CAD20/A6

CRST#/RESET

CAD21/A5

CAD22/A4

VCC

CREQ#/INPACK#

CAD23/A3

CCBE3#/REG#

VCCCB

CAD24/A2

CAD25/A1

CAD26/A0

GND

CVS1/VS1#

CINT#/READY

CSERR#/WAIT#

CAUDIO#/BVD2

CSTSCHNG/BVD1

CCLKRUN#/WP

CCD2#/CD2#

VCC

CAD27/D0

CAD28/D8

CAD29/D1

CAD30/D9

RSVD/D2

CAD31/D10

R195 0_0402

1 2

C340

.1UF_0402

R186 33_0402

1 2

C348

.1UF_0402

12

C359

4.7UF_10V_0805

12

SIRQ<16,18,26>

PM_CLKRUN#<16,18,20,26>

PCIRST#<8,15,16,20,26,27,28>

S1_WAIT# <22>

S1_INPACK# <22>

S1_WE# <22>

S1_BVD1 <22>

S1_WP <22>

S1_RDY# <22>

PCM_SPK#<24>

S1_BVD2 <22>

S1_A[0..25] <22>

S1_CD2# <22>

S1_CD1# <22>

S1_VS2 <22>

S1_VS1 <22>

S1_RST <22>

S1_CE2# <22>

S1_CE1# <22>

S1_REG# <22>

S1_OE#<22>

S1_IORD# <22>

S1_IOWR# <22>

VCCD0#<22> VCCD1#<22>

VPPD1<22> VPPD0<22>S1_D[0..15] <22>

PCM_SUSP#<28>

V_PRST#<22,28>

AD[0..31]<16,20,27>

CLK_PCI_PCM<14>

DEVSEL#<16,18,20>

FRAME#<16,18,20,27>IRDY#<16,18,20>TRDY#<16,18,20,27>

STOP#<16,18,20>

PAR<16,20>

PERR#<16,18,20>SERR#<16,18,20>

REQ#2<16,18>GNT#2<16,18>

PIRQA#<16,18>

PLOCK#<16,18>

C/BE#3<16,20,27>C/BE#2<16,20,27>C/BE#1<16,20,27>C/BE#0<16,20,27>

PCM_RI#<27>

PCM_PME#<29>

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

CardBus Socket

PCMCIA Power Controller

ADY11 LA-1181 2

CardBus Socket

22 41Friday, November 16, 2001

Compal Electronics, Inc.

Title

SizeDocument Number Rev

Date: Sheet of

S1_A[0..25]

S1_D[0..15]

S1_A23

S1_WP

S1_VCCL

V_PRST#

S1_D3 S1_CD1#

S1_D4

S1_D5

S1_D6

S1_D7

S1_CE1#

S1_A10

S1_OE#

S1_A11

S1_A9

S1_A8

S1_A13

S1_A14

S1_WE#

S1_RDY#

S1_A16

S1_A15

S1_A12

S1_A7

S1_A6

S1_A5

S1_A4

S1_A3

S1_A2

S1_A1

S1_A0

S1_D0

S1_D1

S1_D2

S1_WP

S1_D11

S1_D12

S1_D13

S1_D14

S1_D15

S1_CE2#

S1_VS1

S1_IORD#

S1_IOWR#

S1_A17

S1_A18

S1_A19

S1_A20

S1_A21

S1_A22

S1_A23

S1_A24

S1_A25

S1_VS2

S1_RST

S1_WAIT#

S1_INPACK#

S1_REG#

S1_BVD2

S1_BVD1

S1_D8

S1_D9

S1_D10

S1_CD2#

S1_VCCLS1_VCCL

S1_VPP

S1_VCC

S1_VCC

+5VALW

+3VALW

S1_VCC

S1_VPP

+3VALW +5VALW

+12VALW

S1_VPP

S1_VPPS1_VPP

S1_VCC

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,I

NC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF

THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE

INFORMATION CONTAINS MAY BE

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF

COMPAL ELECTRONICS,INC.

C355

.01UF_0402

12

C350

.1UF_0402

12

+C362

4.7UF_25V_1206

C346

10UF_10V_1206

12

R181 22K_0402

1 2

R193 22K_0402

1 2

C432

.1UF_0402

C404

4.7UF_10V_0805

12

C414

.1UF_0402

C431

.1UF_0402

C406

.1UF_0402

C435

10UF_10V_1206

12

C405

10UF_10V_1206

12

U22

TPS2211

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

VCCD0

VCCD1

3.3V

3.3V

5V

5V

GND

OC

12V

VPP

VCC

VCC

VCC

VPPD1

VPPD0

SHDN

C409

1UF_25V_0805

12

JP11

FOXCONN_1CA415M1-TA_68P

1

3

5

7

9

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

55

57

59

61

63

65

67

69

71

73

75

77

79

81

83

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

44

46

48

50

52

54

56

58

60

62

64

66

68

70

72

74

76

78

80

82

84

1

3

5

7

9

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

41

43

45

47

49

51

53

55

57

59

61

63

65

67

GND

GND

GND

GND

GND

GND

GND

GND

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

42

44

46

48

50

52

54

56

58

60

62

64

66

68

GND

GND

GND

GND

GND

GND

GND

GND

L50

FBM-11-160808-800LMT

1 2

C400

1000PF_0402

12

C324

1000PF_0402

1 2

S1_D[0..15]<21> S1_A[0..25]<21>

VCCD0# <21>

VCCD1# <21>

VPPD0<21>

VPPD1<21>

S1_CD1# <21>

S1_CE1#<21> S1_CE2#<21>

S1_OE#<21> S1_VS1<21>

S1_IORD# <21>

S1_IOWR# <21>

S1_WE#<21> S1_RDY#<21>

S1_VS2<21>

S1_RST <21>

S1_WAIT# <21>

S1_INPACK# <21>

S1_REG# <21>

S1_BVD2<21>

S1_BVD1<21>

S1_CD2# <21>S1_WP<21>

V_PRST# <21,28>

A

A

B

B

C

C

D

D

E

E

F

F

G

G

H

H

1 1

2 2

3 3

4 4

W=40Mil

reserve for AC97 coedc us

ing only

short the digital ground and ana

long ground

ADY11 LA-1181 2

AC97 CODEC

23 41Friday, November 16, 2001

Compal Electronics, Inc.

Title

SizeDocument Number Rev

Date: Sheet of

CD_R_R

CD_GNA

CD_L_R

MDMIC

LINEL

LINER

CD_GNA

MONO_IN

MDSPK

VDDA

VDDA

+3VS

VDDC

AVDD_AC97

+5VALW

+12VALW

+5VAU

+5VALW

VDDA

VDDA+5VALW

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,I

NC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF

THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE

INFORMATION CONTAINS MAY BE

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF

COMPAL ELECTRONICS,INC.

C449

@.1UF_0402

12

C450

@4.7UF_10V_0805

12

R276 @10K_0402

12

L59

FBM-11-201209-121MT

1 2

C498 1000PF_0402

1 2

R302 0_0805

1 2

R272

@100K_0402

1 2

+C493

@4.7U_25V_1206

C473

.1UF_0402

12

R345 6.8K_1%

12

R327 6.8K_1%

12

R296 47_0402

1 2

C495 1000PF_0402

1 2

R321 1K_0402

12

C484

.1UF_0402

12

R322

3.3K_0402

12

C478

1000PF_0402

1 2

C501

4.7UF_10V_0805

12

R295 22_0402

1 2

C512

4.7UF_10V_0805

12

C474 @1000PF_0402

1 2

Y3

24.576 MHz

C528 2.2UF_16V_0805

1 2

U30

STAC9700

14

15

17

16

23

24

18

20

19

21

22

13

12

35

36

37

11

10

6

5

8

2

3

29

30

28

27

1

9

25

38

32

46

47

48

4

7

39

41

31

33

34

43

44

45

40

26

42

AUX_L

AUX_R

VIDEO_R

VIDEO_L

LIN_IN_L

LIN_IN_R

CD_L

CD_R

CD_GNA

MIC1

MIC2

PHONE

PC_BEEP

LINE_OUT_L

LINE_OUT_R

MONO_OUT

RESET#

SYNC

BIT_CLK

SDATA_OUT

SDATA_IN

XTL_IN

XTL_OUT

AFLT1

AFLT2

VREFOUT

REFFLT

VCC

VCC

AVCC

AVCC

FLT3D

ID1#

EAPD#

S/PDIF_OUT

GND

GND

HP_OUT_L

HP_OUT_R

BPCFG

FLTI

FLTO

NC

NC

ID0#

NC

AGND

AGND

R275 @10K_0402

12

C494

@1UF_25V_0805

12

C527 1UF_25V_0805

1 2

C472 @1000PF_0402

1 2

C471 @1000PF_0402

1 2

C489

@1000PF_0402

12

R326 6.8K_1%

12

C483 22PF_0402

R299

@100K_0402

1 2

C487

@.047UF

12

C486 22PF_0402

C467

1000PF_0402

12

R328 6.8K_1%

12

R330

3.3K_0402

12

C529 1UF_25V_0805

1 2

C480

@1UF_25V_0805

1 2

C516

2700PF

12

R310

47K_0402

1 2

R309

4.7K_0402

1 2

C507 1UF_25V_0805

1 2

C496

@15PF_0402

D20

@AS2431L

1 3

2

C571 @68PF

12

+

-

U34A

@LM358

3

21

84

L61

@BLM21A601SPT

12

C557

@.1UF_0402

1 2

C572

@.1UF_0402

12

C560

@.1UF_0402

12

@5.1K

R359

12

@5.11K_0.5%R341

1 2

@100K_0402

R364

1 2

@2.4K

R353

12

@5.11K_0.5%

R343

1 2

@442_1%

R344

1 2

G

D

S

Q25

@SI2306DS

2

13

G

D

SQ30

@2N7002

2

13

@0_0402

R340

1 2

C548 @220PF

12

C549

@.1UF_0402

12

C581

.1UF_0402

12

C582

.1UF_0402

12

C580

@4.7UF_10V_0805

12

C579

4.7UF_10V_0805

12

C577

.01UF_0402

12

C515

.1UF_0402

12

C510

.1UF_0402

12

C500

.1UF_0402

12

28.7K_1%

R383

1 2

10K_1%

R394

12

U36

SI9182DH-AD

4

8

5

3

6

7 1

2

VIN

ON/OFF#

VOUT

GND

SENSE

ERROR CNOISE

DELAY

C619

2200PF

12

C618 .1UF_0402

1 2

C492

1UF_25V_0805

12

C502

1UF_25V_0805

12

C506

.1UF_0402

12

C620

.1UF_0402

12

C526 1UF_25V_0805

1 2

R320 @1K_0402

12

INT_CD_L<19>

INT_CD_R<19>

MD_SPK<25>

IAC_SDATAO<16,25>

LEFT <24>

IAC_BITCLK <16,25>

SDATA_IN0 <16>

IAC_SYNC<16,25>

CD_AGND<19>

MD_MIC <25>

RIGHT <24>

MONO_IN<24>

SUSP <31>

SUSP#<27,28,31,32,36>

MICIN<24>

AC97_RST#<16,25>

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

+3V POWER

+5V POWER

Speaker Connector

W=40mils

LINE OUT

10 mils tr

ace

Modify schematic for remove pre-AMP

EXT. MIC

ADY11 LA-1181 2

AMP & Audio Jack

24 41Monday, February 04, 2002

Compal Electronics, Inc.

Title

SizeDocument Number Rev

Date: Sheet of

LEFT

RIGHT

MONO_IN

INTSPK_R-

INTSPK_L+

INTSPK_R+

INTSPK_L-

INTSPK_L+

INTSPK_L-

LEFT

RIGHT

INTSPK_R+

INTSPK_R-

INTSPK_L+

INTSPK_R+

INTSPK_L+

INTSPK_R+

OPBPASS

PR_LEFT

INTSPK_R+

INTSPK_L+

PR_RIGHT PR

NBA_PLUG

PL

NBA_PLUG

OP_SHUT

OP_SHUT

BIAS

MICSEL

MIC-

VBIAS

EXTRMIC

MIC_IN

MIC+

MICSEL

EXTMIC EXT_MIC

VBIAS+3VS

+5VAMP

+5VS VDDA

VDDA

VDDA

+3VS

+5VALW

VDDA

VDDA

VDDA

AVDD_AC97

AVDD_MIC

C453 .01UF_0402

1 2

C454 .01UF_0402

1 2

C463

.1UF_0402

12

C462

.1UF_0402

12

R329

100K_0402

12

C525

1UF_25V_0805

1 2

R360

10K_0402

1 2

R357

100K_0402

12

C456 1UF_25V_0805

1 2

C457 1UF_25V_0805

1 2

L58

@BLM21A05_0805

1 2

JP19

Speaker Conn.

1

2

3

4

1

2

3

4

C464

4.7UF_10V_0805

12

R25050K

1 2

R25350K

1 2

R251150K

1 2

R256100K

1 2

R25575K

1 2

R252150K

1 2

R258100K

1 2

R25975K

1 2

C459

4.7UF_10V_0805

12

C461

.1UF_0402

12

C128

47PF_0402

12

R269

100K

C121

47PF_0402

12

+

C448

220UF_10V_D

1 2

+

C447

220UF_10V_D

1 2

R339

2K_0402

1 2

R331

2K_0402

1 2

R348

2K_0402

1 2 C533

@.1UF_0402

1 2

C536

1UF_25V_0805

1 2

C553

1UF_25V_0805

1 2

C562

.1UF_0402

12

Q21

2SC2411EK

23

1

R356

100K_0402

12

C546

1UF_25V_0805

1 2

R315

@10K_0402

12

D16

1SS355

2 1

C556

.1UF_0402

1 2

U35

TC7SH14

1

2

34

5

NC

A

GND Y

VCC

L44 FBM-11-160808-121T

1 2

L43 FBM-11-160808-121T

1 2

U26B

74HCT08

4

56

L57

BLM21A05_0805

1 2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,I

NC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF

THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE

INFORMATION CONTAINS MAY BE

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF

COMPAL ELECTRONICS,INC.

JP7

JA6333L-100

1

2

3

4

5

6

U27

TPA0202

1

12

13

24

7

18

11

8

14

16

20

19

6

23

17

2

9

10

3

15

22

5

21

4

GND/HS

GND/HS

GND/HS

GND/HS

LVDD

RVDD

MUTEIN

SHUTDW

SE/BTL#

HO/LINE#

RHPIN

RBYPASS

LBYPASS

NC

NC

NC

MUTEOUT

LOUT-

LOUT+

ROUT-

ROUT+

LHPIN

RLINEIN

LLINEIN

C124

47PF_0402

12

R351

@100K_0402

12

L46

FBM-11-160808-121T

1 2

C538

@.22UF_0805

1 2

R350

@2K_0402

R337

@2K_0402

R349

@1K_0402

R338

@1K_0402

C558

@1UF_25V_0805

12

C552

@1UF_25V_0805

12

C537

@.22UF_0805

1 2

JP8

JA6333L-100

1

2

3

4

5

6

C175

47PF_0402

12

C446

@.22UF_0805

1 2

C542

@.1UF_0402

12

U32

@CMAMP110

1

2

3

4

5

6

7

8

SEL

OUT

BIAS

VSUP

INT_MIC+

INT_MIC-

GND

EXT_MIC

R246

1K_0402

R247

2K_0402

C452

10UF_10V_0805

12

C520

@.22UF_0805

1 2

C531

.22UF_0805

1 2

R317

@0

R312 1K_0402

C626

@47PF_0402

12

C226

47PF_0402

12

L47

FBM-11-160808-121T

1 2

C633

@10UF_10V_1206

12

R567

@49.9

R568 2K_0402

PCM_SPK#<21>

ICH_SPKR<17>

BEEP<29>

LEFT<23>

RIGHT<23>

MONO_IN <23>

MUTE<28>

INT_MIC- <30>

INT_MIC+ <30>

MICIN<23>

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

1: Have primary CODEC on mot

her board

Pin 2 is NC for Pctel and connexant MDC modem

Pin 1 is NC for Pctel and connexant MDC modem

MDC Conn.

Screw Hole

Fiduial Mark

Spare Logic Gate

MDC Note

ADY11 LA-1181 2

MDC connector / Skew Hole

25 41Friday, December 07, 2001

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

+5VMDC

+3V

+3V

+3VMDC

+5V

+3VMDC

+3V

+3VALW

+12VALW

C394

@.1UF_0402

12

C393

@1000PF_0402

12

C380

@.1UF_0402

12

R216 10K_0402

1 2

R200 @0_0805

1 2

R221

@22_0402

12

C379

.1UF_0402

1 2

R220

22_0402

12

JP22

AMP-108-5424

1

3

5

7

9

11

13

15

23

21

17

19

25

27

29

2

4

6

8

10

12

14

16

18

20

22

24

26

28

30

MONO_OUT/PC_BEEP

AGND

AUXA_RIGHT

AUXA_LEFT

CD_GND

CD_RIGHT

CD_LEFT

GND

AC97_SDATA_OUT

3.3Vmain

3.3Vaux

GND

AC97_RESET#

GND

AC97_MSTRCLK

AUDIO_PWDN

MONO_PHONE

RESERVED

GND

+5V

RESERVED

RESERVED

RESERVED

RESERVED

RESERVED

AC97_SYNC

AC97_SDATA_IN1

AC97_SDATA_IN0

GND

AC97_BITCLK

R191 @0_0805

1 2

R190 0_0805

1 2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,I

NC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF

THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE

INFORMATION CONTAINS MAY BE

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF

COMPAL ELECTRONICS,INC.

H6

C315D126

1

H2

C315D126

1

H1

C315D126

1

H13

O193X134D193X134N

1

H12

S315D118

1

H7

C315D126

1

H22

C315D118

1

H4

C315D157

1

H3

C315D157

1

H10

C256D157

1

H11

C256D157

1

H8

C315D157

1

H23

C354D244

1

H24

C354D244

1

H15

O217X106D177X67

1

H16

O217X106D177X67

1

H25

O106X217D67X177

1

H19

O106X217D67X177

1

H17

C134D134N

1

M2

S394D138

1

M9

S276D110

1

H27

C315D110

1

H20

O75X213D40X177

1

H21

O75X213D40X177

1

H26

O75X213D40X177

1

H18

S315D118

1

H14

S315D118

1

M3

S315D118

1

H9

R256X315D138

1

FD1

FIDUCIAL MARK

1FD3

FIDUCIAL MARK

1FD2

FIDUCIAL MARK

1

FD6

FIDUCIAL MARK

1FD5

FIDUCIAL MARK

1

CF3

SMDC40M80

1CF1

SMDC40M80

1CF14

SMDC40M80

1CF18

SMDC40M80

1CF2

SMDC40M80

1

CF4

SMDC40M80

1CF13

SMDC40M80

1CF6

SMDC40M80

1CF15

SMDC40M80

1

CF7

SMDC40M80

1CF11

SMDC40M80

1CF17

SMDC40M80

1

CF12

SMDC40M80

1CF16

SMDC40M80

1

FD4

FIDUCIAL MARK

1

+

-

U34B

@LM358

5

67

84

M1

C315D118

1

M6

C315D118

1

M10

S315D244

1

U38D

74LVC125

12 11

13

U38C

74LVC125

9 8

10

C386

@1000PF_0402

12

CF8

SMDC40M80

1

CF10

SMDC40M80

1

C630

4.7UF_16V_A

12

H5

C315D118

1

M11

SMDC200M157

1

M5

S173D95X118

1

M4

S173D95

1

MD_SPK <23>

AC97_RST#<16,23>

IAC_SDATAO<16,23>

MD_MIC<23> MDC_DN# <28>

IAC_BITCLK <16,23>

IAC_SYNC <16,23>

SDATA_IN1 <16>

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

BASE ADDRESS CONFIG

URATION

XBUS RESET CONFIGU

RATION

BADDR PULL-UP

:4E

BADDR PULL-DO

WN:2E

(DEFAULT)

XCNF0

XCNF1

Pin # 61

Signal Pin # Description

BADDR

TEST

XCNF[2:0]

61

58

90, 4, 59

BASE Address Selection

"0": 2E~2F (Default)

"1": 4E~4F

"0": Normal (Default)

"1": Test Mode

2 1 0 Function

x 0 0 No BIOS

x 0 1 Normal Mode. XRDY dis abled

0 1 0 Latch Mode. XA12-19, XRDY enab led

1 1 0 Latch Mode. GPIO10~17,XRDY enab led

0 1 1 Latch Mode. XA12-19, XRDY disab led

1 1 1 Latch Mode. GPIO10~17,XRDY disab led

(default) * 1 ROM SOLUTION

IRQ8

BOARD_ID = HIGH -------> TANGBTO

BOARD_ID = LOW --------> TANG

$ means no-pop for TANGBTO

ADY11 LA-1181 2

LPC Super I/O NS PC87393

26 41Friday, November 16, 2001

Compal Electronics, Inc.

Title

SizeDocument Number Rev

Date: Sheet of

WRPRT#

INDEX#

LPTSLCTIN#

LPTSTB#

LPTINIT#

TXDA

XIOCHRDY

XA3

DRV0#

LPTSLCT

LPTERR#

LPTAFD#

XA1

XA0

LPTPE

LPTBUSY

LPTACK#

DTRA#

LPD4

XCNF2

LPD6

LPD7

DSRA#

RXDA

FDDIR#

3MODE#

RTSA#

CTSA#

XSTB0#

STEP#

LPD0

XD2

WGATE#

XD3

WDATA#

LPD2

LPD5

DCDA#

XD0

XD1

XD5

XD6

LPD3

XMEMR#

HDSEL#

RDATA#

MTR0#

XD4

XA2

TRK0#

LPD1

XD7

XMEMW#

DTRA#

XA12

XA13

XA16

TXDA

XMEMW#

XCNF2

XA17

XA14

XA15

XA18

XIOR#

XIOW#

RIA#

LAD1

LAD0

LPCSMI#

SIRQ

LAD2

LAD3

LFRAME#

LDRQ#0

CLK_PCI_SIO

LPC_RST#

CLK_14M_SIOCLK_PCI_SIO CLK_14M_SIO

DISKCHG#

LPC_RST#

BOARD_ID

BOARD_ID

+3VS

+3VS

+3VS

+3VS

+3VS +3VS

+3VS

+3VS

+3VS

+3VALW+3VALW

+3VS

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,I

NC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF

THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE

INFORMATION CONTAINS MAY BE

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF

COMPAL ELECTRONICS,INC.

C543

5PF_0402

12

C544

@15PF_0402

12

C535

.1UF_0402

12

C511

1000PF_0402

12

PC87393

U33

PC87393F

15

16

17

18

8

9

12

6

7

11

10

19

20

14

39

63

88

13

38

64

89

21

22

23

24

25

26

27

28

29

30

31

32

33

34

52

50

48

46

45

44

43

42

35

36

37

40

41

47

49

51

53

54

55

56

57

58

59

60

61

62

70

69

68

67

66

3

2

1

100

99

98

97

96

4

5

73

71

72

74

75

76

77

78

79

80

81

82

83

84

85

86

87

90

91

92

93

94

95

LAD0

LAD1

LAD2

LAD3

LCLK

LRESET#

LFRAME#

CLKRUN#/GPIO36

LPCPD#

LDRQ#

SERIRQ

SMI#/GPIO35

CLKIN

VDD

VDD

VDD

VDD

VSS

VSS

VSS

VSS

DSKCHG#

HDSEL#

RDATA#

WP#

TRK0#

WGATE#

WDATA#

SETP#

DIR#

DR0#

MTR0#

INDEX#

DENSEL

DRATE0/IRSL2

PD0/INDEX#

PD1/TRK0#

PD2/WP#

PD3/RDATA#

PD4/DSKCHG#

PD5/MSEN0

PD6/DRATE0

PD7/MSEN1

PNF/XRDY

SLCT/WGATE#

PE/WDATA#

BUSY_WAIT#/MTR1#

ACK#/DR1#

SLIN#_ASTRB#/STEP#

INIT#/DIR#

ERR#/HDSEL#

AFD#_DSTRB#/DENSEL

STB#_WRITE#

DCD1#

DSR1#

SIN1

RTS1#/TEST

SOUT1/XCNF0

CTS1#

DTR1#_BOUT1/BADDR

RI1#

IRTX

IRRX1

IRRX2_IRSL0

IRSL1

IRSL3/PWUREQ#

XD0/GPIO00/JOYABTN1

XD1/GPIO01/JOYBBTN1

XD2/GPIO02/JOYAY

XD3/GPIO03/JOYBY

XD4/GPIO04/JOYBX

XD5/GPIO05/JOYAX

XD6/GPIO06/JOYBBTN0

XD7/GPIO07/JOYABTN0

XWR#/XCNF1

XRD#/GPIO34/WDO#

XIOWR#/XCS1#/MTR1#/DRATE0

XIORD#/GPIO37/IRSL2/DR1#

XCS0#/DR1#/XDRY/GPIO25

XA19/DCD2#/JOYABTN0/GPIO17

XA18/GPIO16/JOYBBTN0/DSR2#

XA17/GPIO15/JOYAX/SIN2

XA16/GPIO14/JOYBX/RTS2#

XA15/GPIO13/JOYBY/SOUT2

XA14/GPIO12/JOYAY/CTS2#

XA13/GPIO11/JOYBBTN1/DTR2#_BOUT2

XA12/GPIO10/JOYABTN1/RI2#

XA11/GPIO33/XIOWR#/MDTX

XA10/GPIO32/XIORD#/MDRX

XA9/GPIO31/MTR1#/PIRQD

XA8/GPIO30/PIRQC

XA7/GPIO27/PIRQB

XA6/GPIO26/PRIQA/XSTB2#

XA5/XSTB1#/XCNF2

XA4/GPIO24/XSTB0#

XA3/GPIO23

XA2/GPIO22

XA1/GPIO21

XA0/GPIO20

C505

.1UF_0402

12

C481

4.7UF_10V_0805

12

R342 @0_0402

1 2

R278 @10K_0402

1 2

R332

4.7K_0402

12

R333 10K_0402

1 2

R303 @10K_0402

1 2

R323 10K_0402

1 2

R27410K_0402 12

R334 @10K_0402

1 2

R279 @10K_0402

1 2

R325

@33_0402

12

R324

10_0402

12

RP11

8P4R_10K

1 8

2 7

3 6

4 5

U40C

74LVC14

5 6

7 14

R429 10K_0402

1 2

C624

.01UF_0402

12

U40D

74LVC14

9 8

7 14

R565

10K_0402

1 2

R566

$0_0402

1 2

XIOR#<28> XIOW#<28>

DCDA# <27>

DSRA# <27>

RXDA<27>

CTSA#<27>

LPD0 <27>

LPD1 <27>

LPD2 <27>

LPD3 <27>

LPD4 <27>

LPD5 <27>

LPD6 <27>

LPD7 <27>

LPTBUSY <27>

LPTSLCTIN# <27>

LPTSLCT<27>

LPTACK#<27>

LPTERR# <27>

LPTPE<27>

IRQ1<28>

MTR0#<19>

FDDIR#<19> DRV0#<19>

HDSEL#<19>

IRQ11<28> IRQ12<28>

XIOCHRDY <28>

WGATE#<19>

WDATA#<19> STEP#<19>

XA12<28> XA13<28> XA14<28> XA15<28> XA16<28>

XA18<28> XA17<28>

XA1<28> XA0<28>

XA3<28> XA2<28>

XMEMR# <28>

XMEMW# <28>

XD0 <28>

XD1 <28>

XD2 <28>

XD3 <28>

XD4 <28>

XD5 <28>

XD6 <28>

XD7 <28>

RIA# <27>

LAD2<16> LAD1<16>

LDRQ#0<16>

LAD3<16>

LAD0<16>

SIRQ<16,18,21>

EC_SMI#<16,28>

XSTB0#<28>

3MODE#<19>

RTSA# <27>

TXDA <27>

LPTSTB# <27>

LPTAFD# <27>

LPTINIT# <27>

DTRA# <27>

SUS_STAT#<16>

LFRAME#<16>

CLK_14M_SIO<14>

CLK_PCI_SIO<14>

PM_CLKRUN#<16,18,20,21>

WRPRT#<19> RDATA#<19>

TRK0#<19>

INDEX#<19>

DISKCHG#<19>

PCIRST#<8,15,16,20,21,27,28>

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

w=10mils

w=10mils

Parallel Port

4516

W=40milsW=40mils

PS2 CONN.

Touch Pad & Status LED Conn.

S/W debug only

ACPI Debug port

from card

bus

Debug PORT

ADY11 LA-1181 2

PIO/SIO/PS2 Port/T_P Conn. & LPC Debug Conn.

27 41Monday, November 19, 2001

Compal Electronics, Inc.

Title

SizeDocument Number Rev

Date: Sheet of

ACK#

BUSY

PE

LPTSTB#

LPD0

LPD1

LPD2

LPD3

LPD4

LPD5

LPD6

LPD7

AFD/3M#

ERR#

PRNINIT#

SLCTIN#

ACK#

BUSY

PE

SLCT

FD4

FD5

FD6

FD7

FD7

FD6

FD5

FD4

FD0

FD3

FD1

FD2

PRNINIT#

AFD/3M# SLCT

SLCTIN#

ERR#

LPD[0..7]

FD3

FD2

FD1

FD0

AFD/3M#

FD0

ERR#

FD1

PRNINIT#

FD2

SLCTIN#

FD3

FD4

FD5

FD6

FD7

ACK#

BUSY

PE

SLCT

PWRPRN

SUSP#

KBD_DATA

PS2_DATA

PS2_CLK

KBD_CLK

TP_CLK

TP_DATA

PWR_LED#

ACT_LED#

BATT_LED#

CHARGE_LED#

TP_CLKTP_DATA

ACT_LED#

CHARGE_LED#

PWR_LED#

BATT_LED#

CLK_PCI_LPC

RIA0

DSRA#

CTSA#

DTRA#

RXDADCDA#

TXDA

RIA#

RTSA#

+5V_PRN

+5V_PRN

+5V_PRN

+5V_PRN

+5V_PRN

+5VS

+5V_PRN

+5VS KB_ASPS2KB_VCC

+5VS

+5VALW

+5VALW

+5VS

+5VS

+3VALW

+5VALW

RP1

10P8R_2.7K

10

9

8

7

6

1

2

3

4

5

RP2

10P8R_2.7K

10

9

8

7

6

1

2

3

4

5

R99

33_0402

1 2

R100

2.7K_0402

12

CP13

8P4C_270PF

1 8

2 7

3 6

4 5

CP4

8P4C_270PF

1 8

2 7

3 6

4 5

CP12

8P4C_270PF

1 8

2 7

3 6

4 5

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,I

NC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF

THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE

INFORMATION CONTAINS MAY BE

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF

COMPAL ELECTRONICS,INC.

C108

4.7UF_10V_0805

12

CP3

8P4C_270PF

1 8

2 7

3 6

4 5 C107

.1UF_0402

12

L39 0

1 2

L7 0

1 2

L38 0

1 2

L6 0

1 2

L8 0

1 2

L37 0

1 2

L36 0

1 2

L35 0

1 2

L34 0

1 2

L9 0

1 2

L10 0

1 2

L11 0

1 2

L1 0

1 2

L2 0

1 2

L3 0

1 2

L12 0

1 2

JP1

LPTCN-25-SUYIN

13

25

12

24

11

23

10

22

9

21

8

20

7

19

6

18

5

17

4

16

3

15

2

14

1

D6

1SS355

2 1

C111

47PF_0402

1 2

JP6

KBD/PS2_6

33005A-06T1-01-PS2

I16795326

5

6

3

1

2

4

F1

POLYSWITCH_1.1A

U4

KBMF01SC6

1

2

3 4

5

6

DATA IN

GND

CLK IN CLK OUT

VCC

DATA OUT

L41

FBM-11-451616-800T

1 2

C114

1UF_25V_0805

12

U3

KBMF01SC6

1

2

3 4

5

6

DATA IN

GND

CLK IN CLK OUT

VCC

DATA OUT

CP11

@8P4C_220PF

18 27 36 45

C97

@220PF

1 2

C96

@220PF

1 2

JP15

JST BM20B-SRDS-G

1 2

3 4

5 6

7 8

9 10

12

14

11

13

15 16

17

19 18

20

R374

20K_0402

12

D22

RB751V

21

R564

@33_0402

1 2

C842

@10PF_0402

JP23

@AMP 5-175638-0

1 2

3 4

5 6

7 8

9 10

12

14

11

13

15 16

17

19 18

20

JP3

@E&T 2041-012-12

1

3

5

7

9

2

4

6

8

10

11 12

+

+

+

+

+

+

+

+

+

+

+ +

LPTACK#<26>

LPTBUSY<26>

LPTPE<26>

LPTSLCT<26>

LPTERR#<26>

LPTAFD#<26>

LPD[0..7]<26>

LPTSTB#<26>

LPTINIT#<26>

LPTSLCTIN#<26>

SUSP#<23,28,31,32,36>

KBD_CLK<28>

KBD_DATA<28>

PS2_CLK<28>

PS2_DATA<28>

TP_DATA<28>TP_CLK<28>

ACT_LED#<19>

CHARGE_LED#<29>

PWR_LED# <29>

BATT_LED#<29>

RING# <28>PCM_RI#<21>

AD9<16,20,21>

AD6<16,20,21> AD2<16,20,21> AD1<16,20,21> AD5<16,20,21> AD8<16,20,21>

C/BE#2<16,20,21>

C/BE#0 <16,20,21>

AD4 <16,20,21>

AD0 <16,20,21>

AD3 <16,20,21>

AD7 <16,20,21>

C/BE#1 <16,20,21>

C/BE#3 <16,20,21>

PCIRST# <8,15,16,20,21,26,28>FRAME#<16,18,20,21> TRDY# <16,18,20,21>

CLK_PCI_LPC <14>

LID_SW# <29,30>

CTSA#<26>

DSRA# <26>

RXDA<26>

DTRA# <26>

TXDA<26>

RIA#<26>

RTSA#<26>

DCDA#<26>

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

NC: 1,2,43,44,45,46,87,88,89,90,131,132,133,134,175,176

Pin 130 PU for

Zero Latch

IREF: Charger current control

ADPREF: Adapter current

control

LI/MH#

ADY11 LA-1181 2

PC87570

28 41Friday, November 16, 2001

Compal Electronics, Inc.

Title

SizeDocument Number Rev

Date: Sheet of

KBA[0..18]

ADB[0..7]

KSI[0..7]

KSO[0..15]

XA0

XA1

XA2

XA3

XA12

XA13

XA14

XA15

XA16

XA17

XA18

XD0

XD1

XD2

XD3

XD4

XD7

XD4

XD0

XD5

XD6

ECAGND

XD5

51RST

SMB_EC_CK1

SMB_EC_DA1

CRY2

CRY1

KBA0

KBA1

KBA2

KBA3

KBA4

KBA5

KBA6

KBA7

KBA8

KBA9

KBA10

KBA11

KBA12

KBA13

KBA14

KBA15

KBA16

KBA17

KBA18

KBA18

ADB0

ADB0

ADB1

ADB2

ADB3

ADB4

ADB5

ADB6

ADB7

ADB1

ADB2

ADB3

ADB4

ADB5

ADB6

ADB7

FWR#

FRD#

FSEL#

KSI0

KSI1

KSI2

KSI3

KSI4

KSI5

KSI6

KSI7

KSO0

KSO1

KSO2

KSO3

KSO4

KSO5

KSO6

KSO7

KSO8

KSO9

KSO10

KSO11

KSO12

KSO13

KSO14

KSO15

KBD_DATA

KBD_CLK

PS2_DATA

PS2_CLK

TP_DATA

TP_CLK

FWR#

EC_THRM#

EC_ON

FSEL#

KBA18

KBD_DATA

PS2_DATA

PS2_CLK

FRD#

TP_DATA

TP_CLK

KBD_CLK

XD7

XD6

XD2

XD1

XD3

FWE#

KBA15

KBA17

BKOFF#

SELIO#

VBATT

BATT_CHGI

XD[0..7]

HMEMR#

G_RST#

ECAGNDBATT_TEMP

RCL#

RCL#

G20

SMB_EC_DA1

SMB_EC_CK1

G_RST#

G20

570_SMI#

570_SMI#

HMEMW#

ACOFF

PFAIL#

570_SMI#

PCM_SUSP#

KSO17

BATT_TEMP

ECAGNDVBATT

BATT_CHGI ECAGND

ECAGNDBATT-OVP

KB_VCC

+5VS

+5VS

+5VS

+5VALW

+5VALW

+5VALW

+5VALW

+5VALW

+3VALW

+5VALW

+3VS

+5VALW

+5VS

+5VBIOS

+5VALW

+RTCVCC

+5VALW

+3VALW

+5VALW

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,I

NC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF

THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE

INFORMATION CONTAINS MAY BE

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF

COMPAL ELECTRONICS,INC.

X1

32.768KHZ

RP12

10P8R_10K

10

9

8

7

6

1

2

3

4

5

L62

FBM-11-160808-601T

12

C541

.1UF_0402

1 2

R271

22M

1 2

R270

51K_0402

12

R406

100K_0402

1 2

R188

0_0402

12

R187

10K_0402

12

R410

100K_0402

1 2

G

D

S

Q33

2N7002

2

1 3 RP17

8P4R_10K

1 8

2 7

3 6

4 5

G

D

S

Q22

2N7002

2

13

R372

100K

12

U31

7SH32

2

14

5

R407

100K_0402

1 2

G

D

S

Q23

2N7002

2

13

R297

@0_0402

1 2

C547 .01UF_0402

1 2

R347

10K_0402

1 2

D17

RB751V

2 1

R313

4.7K_0402

12

R316

4.7K_0402

12

R314

10K_0402

1 2

D15

RB751V

2 1

L60

FBM-11-160808-601T

1 2

C504

.1UF_0402

12

C508

1000PF_0402

12

RP16

8P4R_10K

1 8

2 7

3 6

4 5

C470

33PF_0402

12

C341

.1UF_0402

1 2

R307

10K_0402

12

C468

10PF_0402

12

PC87570

U29

PC87570C4-176PIN

166

167

168

169

170

171

172

173

174

3

4

5

6

7

8

9

10

11

12

15

16

17

18

19

20

21

22

13

14

158

159

157

162

163

164

165

161

108

67

23

28

91

24

26

66

109

160

156

155

154

153

25

27

36

35

34

33

32

31

30

29

56

55

54

53

52

51

50

49

48

47

42

41

40

39

38

37

57

58

59

60

69

70

114

115

116

117

118

119

120

121

122

123

124

125

126

127

128

129

130

135

136

137

138

139

140

141

142

143

144

145

146

147

148

149

150

151

152

112

113

95

96

97

98

81

82

83

84

85

86

93

94

61

62

63

64

65

68

104

103

102

101

100

99

71

72

73

74

75

76

77

78

79

110

107

106

105

111

80

92

HA0

HA1

HA2

HA3

HA4

HA5

HA6

HA7

HA8

HA9

HA10

HA11

HA12

HA13

HA14

HA15

PA3/HA16

PA4/HA17

PE0/HA18

HD0

HD1

HD2

HD3

HD4

HD5

HD6

HD7

HAEN

HIOCHRDY

HIOR#

HIOW#

HMEMCS#/PA0

HMEMRD#/PA1

HMEMWR#/PA2

HMR

HPWRON

VCC

VCC

VCC

VCC

VBAT

AVCC

GND

GND

GND

GND

GND

IRQ1

IRQ8#

IRQ11

IRQ12

32KX1/32CLKIN

32KX2

KBSIN0

KBSIN1

KBSIN2

KBSIN3

KBSIN4

KBSIN5

KBSIN6

KBSIN7

KBSOUT0

KBSOUT1

KBSOUT2

KBSOUT3

KBSOUT4

KBSOUT5

KBSOUT6

KBSOUT7

KBSOUT8

KBSOUT9

KBSOUT10

KBSOUT11

KBSOUT12

KBSOUT13

KBSOUT14

KBSOUT15

PSDAT1

PSCLK1

PSDAT2

PSCLK2

PSDAT3/PC7

PSCLK3/PC6

A0

A1

A2

A3

A4

A5

A6

A7

A8

A9

A10

A11

A12

A13/BE0

A14/BE1

A15/PG1/CBRD

A16/PA5/FXBUSEN

A17/PA6

A18/PE1/SHBM#

D0

D1

D2

D3

D4

D5

D6

D7

D8/PF0

D9/PF1

D10/PF2

D11/PF3

D12/PF4

D13/PF5

D14/PF6

D15/PF7

WR0#

PG4/WR1#

DA0

DA1

DA2

DA3

PD0/AD0

PD1/AD1

PD2/AD2

PD3/AD3

PD4/AD4

PD5/AD5

PD6/AD6

PD7/AD7

PC0

PC1

PC2

PC3/EXINT0

PC4/EXINT11

PC5/EXINT15

PH0/BST0/ENV0

PH1/BST1/ENV1

PH2/BST2/TRIS

PH3/PFS

PH4/PLI

PH5/ISE#

PB0/RING#

PB1/SCL

PB2/SDA

PB3/TA

PB4/TB/EXINT10

PB5/GA20

PB6/HRSTO#

PB7/SWIN

PFAIL#

PG0/SELIO

PG2/CLK

PG3/SEL1#

HRMS/SEL0#

RD/HDEN

VREF

AGND

C513

.1UF_0402

12

R3051K_040212

U16

28F040

12

11

10

9

8

7

6

5

27

26

23

25

4

28

29

3

2

22

24

31

1

13

14

15

17

18

19

20

21

32

16

30

A0

A1

A2

A3

A4

A5

A6

A7

A8

A9

A10

A11

A12

A13

A14

A15

A16

CE#

OE#

WE#

VPP

D0

D1

D2

D3

D4

D5

D6

D7

VCC

GND

A17

R292 10K_0402

12

RP18

8P4R_10K

1 8

2 7

3 6

4 5

C565

.1UF_0402

12

R361 10K_0402

12

+C342

10UF_10V_1206

12

C466

1UF_25V_0805

1 2

C469

1000PF_0402

12

U45A

74HCT32

1

2

3

14

7

D18

RB751V

21

R301

100K_0402

12

C551 .01UF_0402

1 2

C555 .01UF_0402

1 2

C540 .01UF_0402

1 2

R260

@0_0402

12

R293

012

XA1<26> XA0<26>

XA3<26> XA2<26>

XA12<26> XA13<26> XA14<26> XA15<26> XA16<26>

XA18<26> XA17<26>

XIOCHRDY<26> XIOR#<26> XIOW#<26>

TP_CLK<27>

KBD_CLK<27>

IRQ1<26>

IRQ12<26>

XSTB0#<26>

SLP_S3#<16> SLP_S5#<16>

SLP_S1#<14,16>

SMB_EC_CK1<5,15,29,33> SMB_EC_DA1<5,15,29,33>

ACIN <17,33,35>

BKOFF# <15>

FSTCHG <34>

TP_DATA<27>

KBD_DATA<27>

SELIO# <29>

EC_ON <30>

KBA[0..18] <29>

ADB[0..7] <29>

KSI[0..7] <29,30>

KSO[0..15] <29>

SCI# <16>

XD0<26> XD1<26>

XD6<26>

XD2<26>

XD5<26>

XD3<26>

XD7<26>

XD4<26>

IRQ11<26>

KSO17<30>

PS2_DATA <27>

PS2_CLK<27>

EC_THRM# <16>

EC_HPOWON<7>

SCRLED#<30>NUMLED#<30>

RING#<27>

ON/OFF<30>

EC_FLASH# <17>

TRICKLE

XD[0..7]<26>

XMEMW#<26>

XMEMR#<26>

CAPSLED#<30>

PCIRST#<8,15,16,20,21,26,27> V_PRST# <21,22>

MUTE <24>

EN_DFAN<7>

DAC_BRIG<15>

IREF<34>

KBRST#<16>

GATEA20<16>

EC_SMI# <16,26>

PCM_SUSP#<21>

INVT_PWM<15> ACOFF <34>FAN1_TACH<7>

SYSON <31,33>

LAN_DISABLE# <20>

BATT-OVP<34>

MDC_DN#<25>

CRT_ON#<15> SUSP#<23,27,31,32,36> G_RST#

VR_ON <31,32>

BATT_TEMP<33>

VTT_PWRGD# <5,14>

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

EC I2C Bus Address:

NM24C164 Address definition: 1 A2 A1# A0 B2 B1 B0 R/W#

24C164: 1011 xxx R/W#

24C16: 101 0xxx R/W#

Input Port Output Port

INT_KBD CONN.

2/29 01

3/06 01

ADY11 LA-1181 2

EC Extend I/O KB Conn. & BIOS

29 41Friday, November 16, 2001

Compal Electronics, Inc.

Title

SizeDocument Number Rev

Date: Sheet of

ADB[0..7]

KSO[0..15]

KSI[0..7]

KBA[0..18]

ADB0

ADB1

ADB2

ADB3

ADB4

ADB5

ADB6

ADB7

KBA3AA

SELIO# LARST#

KBA1

SELIO#

ADB6

ADB4

ADB5

ADB0

ADB3

ADB2

ADB7

ADB1

PCM_PME#

CC

PCM_PME# AA

CC

KBA2

SELIO#

ADB6

ADB4

ADB5

ADB0

ADB3

ADB2

ADB7

ADB1

DD

ADB0

ADB1

ADB2

ADB3

ADB4

ADB5

ADB6

ADB7

KBA4BB

SELIO# LARST#

BB

DD

KSO15

KSO7

KSO13

KSO12

KSO3

KSO6

KSO8

KSO10

KSO2

KSO11

KSO14

KSO4

KSI2

KSO0

KSI5

KSI4

KSO9

KSI2

KSI0

KSI7

KSO13

KSO11

KSO3

KSO4

KSI5

KSO8

KSO5

KSO15

KSO6

KSO1

KSI1

KSO0

KSO7

KSO14

KSI3

KSO12

KSI4

KSI6

KSO2

KSO10

KSI6

KSO9

KSI1

KSI7

KSO5

KSI3

KSI0

KSO1

+5VALW

+5VALW

+5VALW

+5VALW

+5VALW

+5VALW

+3V

+5VALW

+5VALW

+5VALW

+5VALW

+5VALW +5VALW

+5VALW

+5VALW

+3VALW

+3VALW

+5VALW

+5VALW

+5VALW

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,I

NC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF

THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE

INFORMATION CONTAINS MAY BE

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF

COMPAL ELECTRONICS,INC.

R385 20K_0402

1 2

R387 100K_0402

1 2

R286

100K_0402

12

RP23

@8P4R_100K

18 27 36 45

RP25

@8P4R_100K

18 27 36 45

RP24

8P4R_100K

1 8

2 7

3 6

4 5

R380

@0_040212

R384

100K_0402

1 2

R390

100K_0402

1 2

R404

100K_0402

1 2

U44

@7SH32

2

14

5

U42

74HCT273

2

4 5

7 6

8 9

13 12

14 15

17 16

18 19

3

11

20

1

10

Q0

D1 Q1

D2 Q2

D3 Q3

D4 Q4

D5 Q5

D6 Q6

D7 Q7

D0

CLK

VCC

CLR

GND

U28

NM24C16

1

2

5

6

8

3

4

7A0

A1

SDA

SCL

VCC

A2

GND

WC

U39

74HCT244

2 18

4 16

6 14

8 12

11 9

13 7

15 5

17 3

1

19

20

10

1A1 1Y1

1A2 1Y2

1A3 1Y3

1A4 1Y4

2A1 2Y1

2A2 2Y2

2A3 2Y3

2A4 2Y4

1G

2G

VCC

GND

C575

.1UF_0402

1 2

C593

.1UF_0402

1 2

C612

.1UF_0402

1 2

CP5

8P4C_220PF

1 8

2 7

3 6

4 5

C613

@.1UF_0402

1 2

U45C

74HCT32

9

10 8

14

7

C614

@.1UF_0402

1 2

U41

74HCT273

2

4 5

7 6

8 9

13 12

14 15

17 16

18 19

3

11

20

1

10

Q0

D1 Q1

D2 Q2

D3 Q3

D4 Q4

D5 Q5

D6 Q6

D7 Q7

D0

CLK

VCC

CLR

GND

C458 .1UF_0402

1 2

CP6

8P4C_220PF

1 8

2 7

3 6

4 5

U45B

74HCT32

4

56

14

7

C594

1UF_25V_0805

1 2

U45D

74HCT32

12

13 11

14

7

U43

@74HCT244

2 18

4 16

6 14

8 12

11 9

13 7

15 5

17 3

1

19

20

10

1A1 1Y1

1A2 1Y2

1A3 1Y3

1A4 1Y4

2A1 2Y1

2A2 2Y2

2A3 2Y3

2A4 2Y4

1G

2G

VCC

GND

C578

.1UF_0402

1 2

CP7

8P4C_220PF

1 8

2 7

3 6

4 5

JP14

INT_KB_CONN.

1

23

45

67

89

10 11

12 13

14 15

16 17

18 19

20 21

22 23

24 25

1

23

45

67

89

10 11

12 13

14 15

16 17

18 19

20 21

22 23

24

Dummy

R378

100K_0402

1 2

R371

100K_0402

1 2

CP10

8P4C_220PF

1 8

2 7

3 6

4 5

CP8

8P4C_220PF

1 8

2 7

3 6

4 5

CP9

8P4C_220PF1 8

2 7

3 6

4 5

ADB[0..7]<28>

KSO[0..15]<28>

KSI[0..7]<28,30>

BEEP<24>

LID_OUT# <16>

PWRBTN_OUT# <16>

SMB_EC_CK1<5,15,28,33> SMB_EC_DA1<5,15,28,33>

KBA[0..18]<28>

SELIO#<28>

PCM_PME#<21>

AIR_ADP#<33>

LID_SW#<27,30>

ENABKL<15>

THRM#<5>

LAN_PME#<20> VLBA#<16>

BATT_LED#<27>

PWR_LED# <27>

CHARGE_LED# <27>

SWI# <16>

6C/8C#/4C#<33,34>

FDD_PRES#<19>

EC_VCHRST# <15>

SOS1#<20>

SOS5#<20>

EC_WAKEUP# <16>

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

WHEN R=0,Vbe=1

.35V

WHEN R=33K,Vbe

=0.8V

- + Power BTN

Power ON Circuit RTC Battery

W=40mils

USB Over Current

Note:

USB_AS=USB_BS=Trace width=40mils

W=40mils

4516

Place close to USB connector.

USB Port 0

W=40mils

4516

Place close to USB connector.

USB Port 1

LID Switch & Function Button

ADY11 LA-1181 2

Power OK/Reset/RTC battery/USB Conn.& Lid Switch

30 41Friday, November 16, 2001

Compal Electronics, Inc.

Title

SizeDocument Number Rev

Date: Sheet of

RTCPWR

EC_ON

ON/OFFBTN# ON/OFF

OVCUR#0

OVCUR#2

USB0D-

USB0D+USBP0+

USBP0-

USB0D-

USB0D+

USBP2+ USB2D+

USBP2- USB2D-

USB2D-

USB2D+

ON/OFFBTN#

+5VALW

+RTCVCC

CHGRTC

+5VALW

+3VALW

+3VALW +3VALW

+3VALW +3VALW

+3V

+3V

+5VSUSB_BS +3VUSB_AS

USB_AUSB_AS

USB_BS USB_B

+3VALW

+5VS

+3VALW

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,I

NC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF

THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE

INFORMATION CONTAINS MAY BE

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF

COMPAL ELECTRONICS,INC.

12

D21

RLZ20A

22K

22K

Q31

DTC124EK

2

13

C564

1000PF_0402

12

D24

HSM126S

1

2

3

C585

.1UF_0402

12

BATT1

RTCBATT

12 D19

DAN202U

1

2

3

R367

4.7K_0402

12

R362

100K_0402

12

R358

22K_0402

1 2

R379

1M_0402

12

R388

150K

12

C570

1UF_0805_X7R

1 2

R377 20K_0402

1 2

R373

10K_0402

12

R381 @0_0402

1 2

R386

@10K_0402

12

U11

TPS2042

1

2

5

6

8

3

4

7

GND

IN

OC2#

OUT2

OC1#

EN1#

EN2#

OUT1

R105

100K_0402

12

C116

.1UF_0402

12

C115

.1UF_0402

12

R104 47K_0402

1 2

R107 47K_0402

1 2

C117

.1UF_0402

12

R106

100K_0402

12

L42

FBM-11-451616-800T

1 2

+C112

150UF_10V_E

L18

FBM-11-160808-121

1 2

L19

FBM-11-160808-121

1 2

C19

.1UF_0402

12

C21

1000PF_0402

1 2

C18 @150PF_0402

1 2

C17 @150PF_0402

1 2

L40

FBM-11-451616-800T

1 2

C20

1000PF_0402

1 2

JP4

USB_CONN

1

2

3

4

VCC

D-

D+

GND

L20

FBM-11-160808-121

1 2

L21

FBM-11-160808-121

1 2

+C113

150UF_10V_E

C15

.1UF_0402

12

C14 @150PF_0402

1 2

C13 @150PF_0402

1 2

U38B

@74LVC125

5 6

4

U38A

74LVC125

2 3

1

14

7

G

D

S

Q28

@2N7002

2

13

U40B

74LVC14

3 4

7 14

U40E

74LVC14

11 10

7 14

U40F

74LVC14

13 12

7 14

U40A

74LVC14

1 2

147

R401

10K_0402

12

JP5

USB_CONN

1

2

3

4

VCC

D-

D+

GND

JP12

SUYIN 12750AR-16G2T-9

1 2

3 4

5 6

7 8

9 10

12

14

11

13

15 16

ON/OFF <28>

EC_ON# <36>

RSMRST# <16>

EC_ON<28>

ITP_PWROK <7,16>

VGATE<32>

ICH_VGATE <7,16>

OVCUR#2 <17>

OVCUR#0 <17>

USBP0+<17> USBP0-<17>

USBP2+<17> USBP2-<17>

VR_ON#<31>

KSO17<28> KSI0 <28,29>

KSI1<28,29> KSI2 <28,29>

KSI3<28,29>

INT_MIC-<24> INT_MIC+ <24>

SCRLED# <28>

CAPSLED#<28> NUMLED# <28>

LID_SW#<27,29>

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

+5VALW to +5V Transfer

+3VALW to +3V Transfer

+5VALW to +5VS Transfer

+3VALW to +3VS Transfer

+1.8VALW to +1.8VS Transfer

1.8VALW/+1.5VS Power direct prov ide

ADY11 LA-1181 2

DC/DC Circuit

31 41Friday, November 16, 2001

Compal Electronics, Inc.

Title

SizeDocument Number Rev

Date: Sheet of

SYSON#

SUSON

SUSON SYSON#

SUSP

SUSP

SUSP

SYSON#

SYSON#

VR_ON

RUNON

SUSP

RUNON

RUNON

VR_ON#

+12VALW

+5V

+12VALW

+5VALW

+3V

+3VALW

+5VALW +5VALW

+5VS

+12VALW

+5VALW

+5VALW

+3VALW +3VS

+5VALW

+12VALW

+3VALW +CPU_CORE

+VTT

+1.8VS+1.8VALW

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,I

NC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF

THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE

INFORMATION CONTAINS MAY BE

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF

COMPAL ELECTRONICS,INC.

R77

47K_0402

12

G

D

S

Q3

2N7002

2

13

C418

.01UF_0402

12

U23

SI4800

1

2

3

4

8

7

6

5

S

S

S

G

D

D

D

D

U13

SI4800

1

2

3

4

8

7

6

5

S

S

S

G

D

D

D

DC305

22UF_10V_1206

12

C317

10UF_10V_A

12

C439

.1UF_0402

12

C301

.1UF_0402

12

C441

10UF_10V_1206

12

R229

100K_0402

12

R230

1M_0402

12

R227

470_0402

12

R175

470_0402

12

G

D

S

Q12

2N7002

2

13

G

D

SQ7

2N7002

2

13

Q20

@SMO5

1

2

3

C442

4.7UF_16V_A

12

+C440

33UF_D2_16V

12

+C307

100UF_D_10V

12

C616

.1UF_0402

12

G

D

S

Q34

2N7002

2

13

R412

1M_0402

12

R405

100K_0402

12

C615

.01UF_0402

12

G

D

S

Q35

2N7002

2

13

R413

470_0402

12

U46 SI4800

1

2

3

4

8

7

6

5

S

S

S

G

D

D

D

DC617

22UF_10V_1206

12

C604

4.7UF_16V_A

12

G

D

S

Q9

2N7002

2

13

R189

470_0402

12

C336

22UF_10V_1206

12

C421

.1UF_0402

12

C315

10UF_10V_A

12

+C605

100UF_D_16V

12

+C325

100UF_D_10V

12

G

D

SQ11

2N7002

2

13

U14 SI4800 1

2

3

4

8

7

6

5

S

S

S

G

D

D

D

D

R382

10K_0402

12

G

D

S

Q32

2N7002

2

13

G

D

SQ27

@2N7002

2

13

G

D

SQ24

@2N7002

2

13

G

D

SQ29

@2N7002

2

13

R140

@330

12

R368

@100K_0402

1 2

R179

@330

12

R39

470_0402

12

C40

10UF_6.3V_A

12

C43

22UF_10V_1206

12

C42

.1UF_0402

12

G

D

S

Q8

2N7002

2

13

U8 SI4800 1

2

3

4

8

7

6

5

S

S

S

G

D

D

D

D

SYSON<28,33>

SUSP#<23,27,28,32,36>

SUSP<23>

VR_ON<28,32>

VR_ON#<30>

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

1.10

1.25

1.40

1.55

1.70

1.05

1.20

1.35

1.50

1.65

1.15

1.30

1.45

1.60

1.75

0

0

1

VOLTS

0.650

D3

0

1

1

0.725

0.800

0

0

1

1

0

0

1

1

0

0

1

1

0.875

0

0

1

1

OUTPUT

0.950

D0D2

0

1

1

0.625

0.700

0

0

1

1

0.775

0

0

1

1

0

0

1

1

0

0

1

1

0.850

0.925

0

0

1

10.600

0

0

1

0.675

0.750

0

0

1

1

0

0

1

1

D1

0

0

1

1

0.825

0

0

1

1

0.900

0.975

D4 = 0

1.00

D4 = 1

CPU-CORE/VTT

2VREF

ADY11 LA-1181 2

CPU VCORE

32 41Friday, November 16, 2001

Compal Electronics, Ltd.

Title

Size Document Number Rev

Date: Sheet of

VTTVLX

VTTVILIM

VTTVREF

VTTVFB

VTTBST

VTTLX

VTTVDL

SB+

+5VALWP

+VTTP

B+

+5VALWP

B++

+3VALWP

+5VALWP

+5VALWP

B+SB+

+CPU_CORE

NC_TEST3

B++

+3VALWP

NC_TEST4

PR219

27.4K

+PC145

220UF_D_4V

PR195 10

PC137

150PF

PC128

0.22UF_0805_16V

PL16

4.7UH-SPC-1205P-4R7A

PC1290.1UF_0805

PD32

1SS355

21

+

PC144

220UF_D_4V

PR201

14.3K_1%

1 2

PR209

150K_1%

12

PC155

4.7UF_1206_16V

PR206

12K_1%

PR220

3K_1%

PC156

4.7UF_1206_16V

PC141

1UF_0805_25V

PU3

MAX1714A

14

19

20

13

1

12

11

9

5

48

2

7

16

18

6

3

10

17

15 VDD

BST

LX

DL

DH

PGND

N/C

N/C

OUT

FBAGND

N/C

REF

TON

SKIP

ILIM

SHDN

PGOOD

V+

VCC

PC127

0.01UF PC130

0.1UF_0805_25V

PR228 3mR

12

PL17

CEP125-0R8NC-U

PD35

EC31QS04

2 1

PC160

4.7UF_1210_25V

PR191

1M

1 2

PR217

20

1 2

PR1920

1 2

PR196

0

1 2

PC140

1U

PC131

0.1UF_0805

PR188

1M

1 2

PC157

4.7UF_0805_10V

PR189

1M

1 2

PC165

470PF_0603

PC162

4.7UF_1210_25V

PR190

1M

1 2

PR225

51K 12

PC132

0.1UF_0805

PD33

1SS355

21

PC154

4.7UF_0805_10V

PR218

24.9K

PC167

@.01U/16V

PC136

1000PF_0603

PU10

MAX4524

1

2

3

4

5 6

7

8

9

10

NO2

NO3

NO1

INH

GND ADDB

ADDA

NO0

COM

V+

PR226

604K_1%

1 2

PR211

19.6K_1%

1 2

PR210

16.2K_1%

1 2

PR202

10K

1 2

PR203

10K

1 2

PC148

4700PF

PC149

4700PF

PC150

4700PF PC151

4700PF

PR187

1M

1 2

PC147

4700PF

PR181

0

1 2

PR182

0

1 2

PR185

0

1 2

PU6 MAX1718

21

22

23

24

25

14

3

2

17

6

20

11

12

15 10

7

8

18

19

5

13

4

1

16

26

28

27

9

D4

D3

D2

D1

D0

VGATE

TIME

SDN/SKIP

VDD

CC

OVP

REF

ILIM

GND TON

S0

S1

SUS

ZMODE

NEG

POS

FB

V+

DL

BST

DH

LX

VCC

PR186

@10K

12

PR230

@10K

12

PC163

4.7UF_1210_25V

+PC146

220UF_D_4V

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

PQ39

SI4362DY

3 6

5

7

8

2

4

1

PR229 3mR

12

PQ31

2SC2411K

13

2

-

+

PU7

MAX4322

1

2

3

4

5

PR214 510_1%

12

PR215 604_1%

12

PC133

0.1UF_0805

PR216 1K_1%

12

PR227

61.9K_1%

1 2

PR1930

1 2

PR207

316K_1%

PR208

180K_1%

PC164

4.7UF_1210_25V

PC152

4.7UF_1210_25V

PC153

4.7UF_1210_25V

PC134

0.1UF_0805_25V

PL19

KC-FBM-L11-322513-201LMAT

PL18

KC-FBM-L11-322513-201LMAT

PR183

0

1 2

PR237

@0

12

PR197 0

1 2

PR236 @0

1 2

PC161

4.7UF_1210_25V

PR242 0

1 2

PR243

0

PR245

@0

1 2

PR246

0

1 2

PR244

0

12

PQ38

SI4362DY

3 6

5

7

8

2

4

1

PQ36

IR7811A

3 6

5

7

8

2

4

1

PQ37

SI4362DY

3 6

5

7

8

2

4

1

PQ35

IR7811A

3 6

5

7

8

2

4

1

PC169

2200PF

PC170

0.1UF_0805_25V

12

PC171

0.1UF_0805_25V

12

PR184

0

1 2

S

G

D

PQ43

SI3456DV

3

6

2

4 5

1

PR247 @0

1 2

PR232 0

1 2

PR212

1K_1%

12

PQ42

SI4810DY

3 6

5

7

8

2

4

1

CPU_VID3<6>

CPU_VID4<6>

CPU_VID1<6>

CPU_VID0<6>

VGATE<30>

PM_DPRSLPVR <16>

VR_ON<28,31>

SUSP#<23,27,28,31,36>

VTT_PWRGD<5>

CPU_VID2<6>

2VREF

H_DPSLP#<5,16>

PM_GMUXSEL<6,16>

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

Detector

Precharge detector

15.9V/13.2V FOR

ADAPTOR

SMART Battery:

1.BAT+

2.LI/MH#

3.B/I

4.TS

5.SMB_EC_DA1

6.SMB_EC_CK1

7.GND

Vin Detector

17.93V/17.2V

PCN2 battery connector pin assignm ent

ADY11 LA-1181 2

Detector

33 41Friday, November 16, 2001

Compal Electronics, Inc.

Title

SizeDocument Number Rev

Date: Sheet of

PACIN

SYSON

BATT+

ADPIN

ADPGND

ADPGND

BATT_TEMP

ADPIN

BATT++

VIN

+5VALWP

BATT++

+5VP

RTCVREF

B+

BATT+

+5VALWP

+5VALWP

RTCVREF

VIN VINVS

+5VALWP

+5VALWP

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,I

NC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF

THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE

INFORMATION CONTAINS MAY BE

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF

COMPAL ELECTRONICS,INC.

PC29

1000PF

12

VIN

GND

AIR_ADP

PCN1

RP34-8RD-3PDL2J

3

2

1

4

5

6

7

PC26

1000PF

12

PC25

100PF

12

PC28

100PF

12

PD8

@BAS40-04

2

3

1

PD9

@BAS40-04

2

3

1

PQ12

2N7002

2

13

PC31

1000PF

12

PC32

0.1UF_16V

12

PC24

470PF_0805_25V

12

PC23

470PF_0805_25V

12

PR29

100K_0402

12

PR43 100 12

PR37

100

1 2

PR50

10K

1 2

PR49

499K_1%

12

PR48

215K_1%

12

PR54

47K 12

PR44

100K

1 2

PR45

1M_1%12 PR46

499K_1%

12

PCN2

BTC-07GR4 7P

1

2

3

4

5

6

7

PR36

1K

1 2

PD7

@BAS40-04

2

3

1

PR35

6.49K_1%

1 2

PR34

1K

1 2

100K

100K

PQ11

DTC115EUA

2

13

100K

100K

PQ13

DTC115EUA

2

13

PD10

RB751V

12

PD11

RB751V

12

1

2

PCN3

@2DC-S107B200

1

2

PL4

FBM-L11-453215-900LMAT

1 2

PL2

FBM-L11-453215-900LMAT

1 2

PL3

FBM-L11-453215-900LMAT

1 2

PD31

@EC10QS04

12

PC108

0.1UF_16V

12

PZD5

RLZ5.1B

12

PC107

1000PF

12

PC109

0.01UF

12

PR157

84.5K_1%

12

PR158

20K_1%

12

PR162

10K

12

PR161

10K

12

PR163

10k

1 2

PR159

22K

1 2

PR160

1M_1%

1 2

PR164

10K

12

+

-

PU12A

LM393A

3

21

84

+

-

PU12B

LM393A

5

6

7

PC111

1000PF

12

PR170

10_1206

12

PZD6

RLZ24B

12

PJP11

4MM

21

PR1

100K

PR2

1K_1%

PR3

@1K_1%

PF1

@7A

PJP4

4MM

2 1

AIR_ADP# <29>

BATT_TEMP <28>

SYSON <28,31>

SHDN#<35>

SMB_EC_DA1 <5,15,28,29>

SMB_EC_CK1<5,15,28,29>

ACIN <17,28,35>

PACIN <34>

ACON<34>

PACIN <34>

6C/8C#/4C# <29,34>

AIR_ADP

<34>

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

Charger

IREF=1 .746*Icharge

IREF=0~5V

OVP voltage :

LI-4S :18.0V----BATT-OVP =3.97V

BATT-OVP=0.2 206*BATT++

LI-3S :13.5V----BATT-OVP =2.98V

4S LI-ION

Charge voltage

3S LI- ION : 12.75V

NI-MH : 17.00V

Iadp=0~3.07A

Iair=0~2.26A

ADY11 LA-1181 2

Charger

34 41Wednesday, November 21, 2001

Compal Electronics, Inc.

Title

SizeDocument Number Rev

Date: Sheet of

ACON

LXCHRG

ACOFF#

ACOFF#

BATT+

VIN

VIN

BATT+

B+

P2 P3

B+++

BATT++

+5VP

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,I

NC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF

THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE

INFORMATION CONTAINS MAY BE

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF

COMPAL ELECTRONICS,INC.

PC49

1500PF

1 2

PC46

2200PF

1 2

PU5

MB3878

1

2

3

4

24

23

22

21

5

6

7

8

9

10

11

12

20

19

18

17

16

15

14

13

-INC2

OUTC2

+INE2

-INE2

+INC2

GND

CS

VCC(o)

FB2

VREF

FB1

-INE1

+INE1

OUTC1

OUTD

-INC1

OUT

VH

VCC

RT

-INE3

FB3

CTL

+INC1

PC41

2200PF

1 2

PC43

4700PF

1 2

PC45

0.1UF_16V

12

PC44

0.1UF_16V

1 2

PL5

SLF12565T-220M

1 2

PQ17

FDS4435

36

5

7

82

4

1

PC50

4.7UF_1210_25V

12

+

PC48

68UF_EC_25V

12

PC51

4.7UF_1210_25V

12

PC36

4.7UF_1210_25V

12

PC37

4.7UF_1210_25V

12

PD13

1SS355

1 2

PD12

1SS355

1 2

PC39

0.1UF_0805_25V

12

PC40

2200PF

PC42

0.1UF_0805_25V

1 2

PR71

1K

1 2

PR73

66.5K_1%

1 2

PR77

330K

1 2

PR68

22.6K_1%

12

PR75

100K_1%

1 2

PR76

10K

12

PR69

10K

1 2

PR66

100K

12

PR78

40.2K_1%

12

PR80

152K_0.1%

12

PR74

0.02_2512_1%

1 2

PR70

10K_1%

12

PR81

309K_0.1%

12

PR64

0

12

PR61

47K

1 2

PR67

47K_0402

1 2

PR72

@30.1K_1%

12

PR65

19.6K_1%

1 2

PR79

10K

12

PC47

0.1UF_0805_25V

1 2

PQ14

SI4835DY

36

5

7

82

4

1

PR60

200K_0402

12

PQ15

SI4835DY

3 6

5

7

8

2

4

1

PR63

150K_0402

12

PQ16

SI4835DY

3 6

5

7

8

2

4

1

100K

100KPQ18

DTC115EUA

2

13

PR131

47K

1 2

PR132

47K

1 2

PC101

1000PF

12

PR59

0.02_2010_1%

12

PL9

FBM-L11-322513-151LMAT

1 2

PD30

RB051L-40

12

G

D

SPQ19

2N7002

2

13

PR169

10K

1 2

PC112

10PF

1 2

PC113

22PF

1 2

PR174

2.2K

12

PR175

300K_0.5%

12

PR176

143K_0.5%

12

PC115

@0.1UF_16V

12

PC116

0.01UF

PR177

205K_1%

12

PC117

.01UF_0402_16V

12

PC118

.01UF_0402_16V

12

+

-

PU2B

LM3585

6

7

PR4

305K_0.1%PQ9

2N7002

2

13

PR5

100K

100K

100K

PQ10

DTC115EK

2

13

PC173

0.1UF

G

D

S

PQ30

2N7002

2

13

PACIN<33>

ACON<33>

IREF<28>

FSTCHG <28>

ACOFF <28>

AIR_ADP<33>

BATT-OVP<28>

6C/8C#/4C# <29,33>

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

+3.3V/+5V/+12V

+3.3V Ipeak = 6.6 6A ~ 10A

+5V Ipeak = 6. 66A ~ 10A

Recovery at 45 degree C

CPU thermal protection at 85 degree C

ADY11 LA-1181 2

+3.3V/+5V/+12V

35 41Friday, November 16, 2001

Compal Electronics, Inc.

Title

SizeDocument Number Rev

Date: Sheet of

FLYBACKSNB

BST31

DH31

DH51

POK

BST51

CSL5

LX3

DH3

DL5 CSH5

DL3

CSH3

+5VALWP

VS

VL

B++++

B++++

VL

+5VALWP

+12VALWP

B+

+3VALWP

VL

VL

VS

NC_TEST1

NC_TEST2

2.5VREF

VL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,I

NC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF

THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE

INFORMATION CONTAINS MAY BE

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF

COMPAL ELECTRONICS,INC.

PC68

0.1UF_0805_25V

1 2

+

PC86

150UF_D_6.3V_FP

12

PT1

SDT-1205P-100

1

4

3

2

PC67

4.7UF_1210_25V

12

PC80

@1000PF

12

PD19

EC11FS2

12

PC63

0.1UF_0805_25V

1 2

PC73

4.7UF_1210_25V

12

+

PC87

150UF_D_6.3V_FP

12

PC74

4.7UF_1210_25V

12

PC61

470PF_0805_100V

1 2

PC79

@1000PF

12

PC66

4.7UF_1210_25V

12

PQ21

SI4800DY

3 6

5

7

8

2

4

1

PQ23

SI4810DY

3 6

5

7

8

2

4

1

PC64

0.1UF_0805_25V

12

PC65

2200PF

PC71

2200PF

PC72

0.1UF_0805_25V

12

PC76

0.1UF_0805_25V

12

PC69

4.7UF_1206_10V

12

PC70

0.1UF_16V

1 2

PC75

4.7UF_1210_25V

12

PR98

10_1206

12

PR101

0.012_2512_1%

12

PR99

0_0402

1 2

PR103

0_0402

1 2

PR96

22_120612

PR97

0_0402

12

PR105

@100K_0402

12

PD23

EP10QY03

2 1

PQ22

SI4800DY

3 6

5

7

8

2

4

1

PQ24

SI4810DY

3 6

5

7

8

2

4

1

PR22

0_0402

1 2

PR23

0_0402

1 2

PD24

@RB751V

1 2 PR136

10K_0402_1%

12

PR137

10.2K_0402_1%

12

PC78

0.1UF_0805_25V

12

PD20

DAP202U

1

2

3

PL12

FBM-L11-322513-151LMAT

1 2

PR100

0.012_2512_1%

12

PL7

SLF12565T-100M

12

PR135

3.57K_1%

1 2

+

PC83

150UF_D_6.3V_FP

12

PR134

10K_0402

1 2

+

PC82

150UF_D_6.3V_FP

12

PD22

EP10QY03

2 1

PR155

47K_1%

PR153

100K_1%

PR154

100K_1%

PR150

2.15K_1% PR152

16.9K_1%

PC104

1UF_0805_25V

PC106

0.047UF_16V

12

PR156

47K_0402

12

PH1

10K_1%_0805

PC121

@.01UF_0402

12

PR178

1M_0402

1 2

PC119

47PF_0402

12

PC123

100PF_0402

12

PC124

@100PF_0402

12

PR179

2M_0402

12

PC122

47PF_0402

12

PC103

1000PF

12

+

-

PU4B

LM393A

5

67

84

PR238

@0

1 2

PR239

@0

12

PR241

@300K_0402

12

PR240

10K_0402

1 2

PC81

4.7UF_1206_10V

12

PR104

@0_0402

1 2

PC120

100PF_0402

12

PU9

MAX1632

26

24

25

27

1

2

3

10

8

4

5

18

16

17

19

20

14

13

12

15

9

6

11

23

7

28

21

22

LX3

DL3

BST3

DH3

CSH3

CSL3

FB3

SKIP#

GND

12OUT

VDD

BST5

DH5

LX5

DL5

PGND

CSH5

CSL5

FB5

SEQ

REF

SYNC

RST#

SHDN#

TIME/ON5

RUN/ON3

VL

V+

PC89

0.047UF_16V

12

PR106

47K_0402_1%

12

PC172

680PF_0402

12

PC60

4.7UF_1210_25V

1 2

SHDN# <33>

ACIN<17,28,33>

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

+1.8VALW/+1.5VS

+1.8V+-5%

+1.5VS+-5%

ADY11 LA-1181 2

+1.8VALW

36 41Tuesday, November 20, 2001

Compal Electronics, Inc.

Title

SizeDocument Number Rev

Date: Sheet of

LX18

2.5VREF

CHGRTCP

+1.5VS

+5VALW+5VALWP

+12VALW

+3VALW

+12VALWP

+3VALWP

+VTT

+1.8VALW

+1.8VALWP

+VTTP

+1.5VSP

+5VALWP

+1.8VALWP

2.5VREF

VS

+1.5VSP

+1.8VALWP

+5VALWP

+5VP

VIN

CHGRTC

RTCVREF

BATT+

B+

VS1

VS

VL

PJP5

4MM

21

PJP10

3MM

21

PJP8

3MM

21

PJP7

3MM

21

PC159

4.7UF_1206_25V

12

PQ25

2SC2411K

21

3

+PC138

150UF_D_6.3V_KO

12

PC142

2200PF

12

+

-

PU4A

LM393A 3

2

1

84

PD37

RB751V

1 2

PQ32

2SA1036K 2

3

1

PD36

RB051L-40

12

PR213

1K

1 2

PL14

5UH_SPC_06704-5R0A

12

PC126

0.01UF

12

S

G

D

PQ41

SI3445DV

3

6

2

4 5

1

PR199

100K_1%

12

PR222

38.3K_1%

12

PR235

@10K

12

PR204

10K

12

PR205

10K

12

PC166

68PF

S

GD

PQ40

SI3442DV

3

6

245

1

PC135

0.1UF_16V

12

PC143

220PF

+PC139

150UF_D_6.3V_KO

12

PC125

0.01UF

100K

100K

PQ26

DTC115EK

2

13

PC158

4.7UF_1206_25V

+

-

PU2A

LM3583

2

1

84

PR194

0

1 2

PR223

5.1K

1 2

PR200

200K_1%

12

PR221

300K_0.5%

1 2

PR224

5.1K

1 2

PR198

100K

1 2

PD15

RLS4148

12

PD17

RLS4148

12

PZD2

RLZ4.3B

12

PR89

200_0805

12

PR95

200

1 2

PR84

1.5K_1206

12

PR85

1.5K_1206

12

PR126

1.5K_1206

12

PR91

100K

12

PR94

22K

1 2

PC54

0.22UF_1206_25V

12

PZD4

RLZ16B

12

PR83

200_1206

1 2

PQ20

TP0610T

2

13

PD16

RLS414812

PZD3

RLZ5.1B

12

PC59

4.7UF_1206_25V

12

PU8

S-81233SG

2

1

3

IN

GND

OUT

PR90

10K

1 2

PC55

0.1UF_0805_25V

12

PR92

150K

12

PC58

1UF_0805_25V

12

PC56

0.1UF_16V

12

PR173

200_1206

1 2

100K

100K

PQ33

DTC115EK

2

13

PC168

0.1UF_16V

12

PR20

1.5K_1206

12

PR21

200

1 2

PJP6

3MM

21

SUSP# <23,27,28,31,32>

EC_ON#<30>

2.5VREF <35>

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Version change list (P.I.R. List) Page 1 of 2

Reason for change Rev.PG# Modify List B.Ver# PhaseFixed IssueItem

Compal Electronics, Inc.

Core-logic Chipset r evision Revision er ror 0.1B 3 FW82830M should be QB88 and FW8280 1CAM should

be QB6 3

0.1 SST

2 Leakage is sue +5VSHDD is on when plug AC-in and OS en ter S3,S4,S5.

we used GPIO25 of ICH3-M to control IDE power,but this

pin is resume plane, keep high af ter RSMRST#.

0.1B 19 Q14 pin3 change from +5VALW to +5V S power plan

3 Leakage is sue +5VS has about 500mv backdrive on S3;U2 6 is +5VS but

pin9 pull up to +3V

7 R94 pull up change t o +3VS

4 Leakage is sue +3VS has about 253mv backdrive on S3;Q 16 is on when

S3

12 R268 pull up change t o +3VS

5 Leakage is sue +3VS has about 253mv backdrive on S3;U37 pinU5

(ICH_THRM#)is +3VS plane

16 ICH_THRM# pull up change to +3VS

6 SM_CLK/DATA read and progr am failed Correct net,U9 pin29 should be connec t to SMB_DATA

U9 pin30 should be connect t o SMB_CLK

14Signal connect e rror

7 Level shi ft U26 is +5V output,but ICH3(U37 )pinAA 6 is 3V level Change R415 from 100_0402 to 5.6K_04 02;BOM change7

8 Correct Part v aule BOM and schematic vaule d ifferent Change JP20 vaule from"HH9927-S6" t o"HH9921-S6"

Change JP10 vaule from"JM361 13-L1H" to

"JM36113-L5 H7"

19

20

9 None Original design, EC_FLASH control by IC H3-M GPIO40 or

97338 pin 71. Follow compal common desi gn, use ICH3-M

GPIO40 control EC_F LASH#.

27 Change U33(97338) pin7 1 to NC

10 VR_ON cont rol For EC can control VR_ON after VT T_PWRGD# on 29 VTT_PWRGD# connect to U2 9 pin146

11 Debug ca rd Design change,used PCI port 80 debug card solution 28 Change JP23 connector type from "SUYI N 12793-10G2"

to "AMP 5-175638-0";BOM change

12 None 7 Change Q4 from "2SC2411EK" to "FMMT619"

BOM chan ge

0.1B

0.1B

0.1B

0.1B

0.1B

0.1B

0.1B

0.1B

0.1B

0.2

0.2

0.2

0.2

0.2

0.1

0.1

0.2

0.2

0.2

0.2

SST-2

SST-2

SST-2

SST-2

SST-2

SST

SST

SST-2

SST-2

SST-2

SST-20.1BFAN power transistor change. Max. power of 2 SC2411 is 0.2W.

Max. power of FMMT619 is 0.615W.

13 Component pad size Component is 0402 size,but layout pad size is 0603 0.1C 17 Layout modified and correct vaule from"5PF" to

"5PF_0402";BOM needn't change

14 Mechanical limit issue Mechanical limit H:2.2mm,used compone nt over limit 320.1C Change C440 from "100UF_D_16V" to " 33UF_D2_16V"

D2 size H=1.9mm; BOM change

0.2

0.2

SST-2

SST-2

15 Delect item 11 PT implement PCI port 80 solution 0.1C 28 SST2 don't ch ange

16 Clock wavef orm Clock waveform ove r SPEC

1.CLK_HCLK/H CLK#

2.CLK_DR EF

3.CLK_ICHA PIC

0.1C 14 1.Change R16,R12 from"33_1%" to"10_1%"

2.Change R59 from"22_0402" to "10_0402"

3.Pop R352 (10_0402) and pop

C559(10PF_04 02)

16

0.2

SST-2

SST-2

0.2

*

17 None LPC debug card on developer stage , depop it. 0.1C 28 Depop JP23 (S ST2) 0.2 SST-2

1

18 Correct Part v aule BOM and schematic vaule d ifferent 0.1D 24 Change R383 vaule from "29K_1%" to "28.7K_1%" 0.1 SST

19 Fixed EE issue list item11( 2001/6/5) Intel recommend series resistor on IDERST 0.1D 17 Add R453(0_0402) series resistor on PIDERST #--- BOM modify 0.2 SST-2

20 Fixed EE issue list item10( 2001/6/5) VCCA_DAC should have a 0.1uf and 0 .01uf nearby 0.1D 10,1 1We check layout file,C290 closely U7 pin AF26,so change

C290 from pag11 to pag10, C156 and C 186 change to

page 11(not change layout),and add C632 [0.01UF_0402]

near AF 26

0.2 SST-2

21 Fixed EE issue list item26,27( 2001/7/12) 1.Change CPU thermal skew hole s ize change.

2.CD-ROM skew hole size change.

0.1D 1.Change H1,H2,H6,H7 from 2.8m m to 3.2mm

2.Change H9 from 3.5mm long by 3.0mm wide

0.2 SST-2

22 CLK_HCLK/HCLK# resistor need n't change 0.1E 14 R12,R16 resistor to restore,de l item16-1 0.1 SST

23 ICH3 revis ion SST2 used QB62 or SL5LF revision 0.1E 17 Change R376 from"22.6_1%" to "18.2_1% ",BOM already

change O K.

0.2 SST-2

Follow Dell's reco mmend*

26

24 CLK EMI is sue Add AC termination on as belo w signals

1.CLK_GB IN

2.CLK_ICHH UB

3.CLK_ICH 48

4.CLK_PCI_S IO

5.CLK_GBO UT

6.CLK_ICHP CI

8 1.Pop R168(33_0402) and C297( 5PF_0402)

16 2.Pop R306(33_0402) and C514( 5PF_0402)

3.Pop R369(10_0402) and C574( 5PF_0402)

27 4.Pop R324(10_0402) and C543( 5PF_0402)

14 5.Pop R69(33_0402) and C92(1 0PF_0402)

16 6.Pop R311(10_0402) and C518( 15PF_0402)

0.1F 0.2 SST-2

25 Gerber rele ase Change Schematic revisio n to 0.20.2None SST-20.2

ADY11 LA-1181 2

P.I.R History

37 41Friday, November 16, 2001

Title

Size Document Number Rev

Date: Sheet of

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Version change list (P.I.R. List) Page 2 of 2

Reason for change Rev.PG# Modify List B.Ver# PhaseFixed IssueItem

Compal Electronics, Inc.

26 None Connector cha nge 0.2A FDD Connector change to ACES 85201-2605 0.3 PT19

27 None Remove OZ6933 PCMCIA Co ntroller 210.2A 1. Del Page 21, and shift down page

2. Del CF5, CF9

0.3 PT

0.3 PT0.2A28 None 22Remove Power Switch (2 slot) and change Ca rdBus Connector

0.2A

1. Schematic remove U20, C437, C403, C402 , C436, C434,

C433, C415, C408, C429, R219, R211, C79, C 80, C430, C318,

L53, C358, C343, C401

2. Change PCMCIA Socket vaule to FOXCO NN 1CA415M1-TA

0.3 PT29 None Add Board_ID for check Mosaic and Tang 26 Add U33 Pin71 for BOARD_ID, and Add Resiste r R565 10K_0402

and R566 0_0 402

30 None Remove Serial Port 0.2A 27 De-pop C1, C5, C10, C11, C109, U1, JP3, CP1, CP2, L26,

L27, L28, L29, L30, L31, L32, L33, Q26.

0.3 PT

31 None Lid Switch function change to Touc h-pad Board 0.2A 27 Schematic change, JP15 Pin17 net to +3VS, JP15 Pin18 net

to LID_S W#

0.3 PT

PT0.3None32 0.2A 27Debug Port change con nector Debug Port change connector from SUYIN 12793A-10G2 to

AMP 5-17563 8-0

33 None Power on switch board change connector 0.2A 30 Power On switch board change from AM P 4-175638 to

SUYIN 12750AR-16 G2T-9

0.3 PT

34 None ICH_VGATE de lay 0.2A 30 0.3 PT1. Schematic change, connect R381 pin2 to U40 Pin12

2. De-pop R386, R381

35 None Schematic remove Serial PORT function 0.2A 27 Schematic remove U1, CP1, CP2, C1, C5, C 10, C11, C109,

L26, L27, L28, L29, L30, L31, L32 , L33, Q26.

0.3 PT

25

36 CMOSREF not strong enough t o provide

the target 2/3 ratio devider

Change divider to 0.5K/1K at the ne xt available

opportunity to gain more CMOSR EF margin.

0.2A 5 BOM change R20 from 1K_1% to 499_1%, R22 from 2K_1% to

1K_1%

0.3 PT

37

None 0.3 Gerber release, schematic cha nge to 0.3 0.3 PT38

None 0.2A 0.3 PTM/B ID change t o PT 17 BOM add R441 10K_0402, Depop R4 43 10K_0402

39 PT0.31. BOM depop C126, C120, C293, C210, C283, C118.0.3Cost do wn

Gerber rele ase

Core_VCC and VTT capacitor reduce. 2. BOM change from 150UF_D2_6.3V (45mOhm) to

220U_D2_4V(25mOhm), Location C29, C39, C3 2, C292, C260,

C119, C153, C289, C37.

6

11 3. BOM depop C122, C127.

4. BOM change from 150UF_D2_6.3V (45mOhm) to

220U_D2_4V(25mOhm), Location C27, C23, C303.

40 None Remove Capaci tor 0.3B 6 Schematic remove C120.

41 None Resister Package e rror. 0.3B 24 Change R351 100K_0603 to R351 100K_0402

1.0

1.0

ST

ST

42 Suspend from lid switch, ca n't resume

from open L CD.

Change Lid switch power plan from +3 VS to +3VALW. 0.3C 27 2. Schematic JP12 Pin.15 t o +3VALW

3. Schematic R404 Pin.1 t o +3VALW

29

30

1.0 ST

43 For thermal module difference Mosaic-P4 Add stand-off on mother board. 0.3C 6

1. Schematic JP15 Pin.17 t o +3VALW

Schematic remove C39, add M11 S MDC200M157,

BOM add C283 220U_ 4V_D2.

1.0 ST

None Change Capacitor spec. 0.3C 31 BOM change C307, C325, C605 from 10 0UF_D_16V to

100UF_D_10 V.

1.0 ST

CRT connector layout shift. Shift CRT connector 1.33mm 0.3C

Factory DXF fix. Layout modi fy. 0.3C

ST

ST

1.0

1.0

Test point rev iew. Layout modi fy. 0.3C ST1.0

3COM 3C920 referance RJMA G version

update .

VDDPCI[1:5] pins from +3VASB to +3VS. 0.3C 20 1. Schematic modify, U21 some pin change p ower plan from

+3VASB to +3VS ( VDDPCI [1:5] )

1.0 ST

2. Schematic C370, C371, C373 change po wer plan from

+3VASB to +3 VS.

44

46

47

48

45

49 Poor quality w/static noise on

recording func tion.

Change MIC-AMP power plan. 0.3C 24 ST

1.050 None M/B ID change t o ST 0.3D 17

1.0

STBOM depop R441, R444, add R442, R4 43 10K_0402

1. Schematic modify, MIC-AMP change power plan from VDDA

to AVDD_MIC with R567 49.9Ohm to AVDD_AC97

2. Schematic add C633 10UF_ 10V_1206

51 None Change Back-light gate pow er plan. 1.0 15 1. U12 power plan from +3VS to +5VS.

2. U12 from SH08 t o ST08

52 Remove Internal MIC f unction None 3.0 24 1. BOM remove C538, C537 0. 22UF_0805

2. BOM remove C552, C558 1U_0805

3. BOM remove R337, R350 2K_0402

4. BOM remove R338, R349 1K_0402

3A QT

52 Design margin for CRT Pow er MosFET Change some resi ster. 3.0 15 1. BOM change R261 from 47K_0402_5% change to 68K_0402_5%.

2. BOM change R264 from 100K_0402_5% change to 100K_0402_1%.

4.0 MVB

ADY11 LA-1181 3A

P.I.R History

38 41Monday, February 25, 2002

Title

Size Document Number Rev

Date: Sheet of

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Version change list (P.I.R. List) Page 1 of 3

Reason for change Rev. PG# Modify List B.Ver#PhaseFixed IssueItem

1Change PWM frequency from 300KHZ to 200KHz 0.1B 33 1.Change PR197 from 100 to 0

2.Connect pin10 of PU6 to pin9 of PU6 0.1 SST

2Change PWM frequency from 200KHz to 300KHz 36 1.Delete PR104 and add PR103 0_0402

2.Connect pin15 of PU9 to ground

+5VALWP is unstable

Change PC48 to small size,the height limited is 6mm in

this area 35Output capacitor of Charger interfere

mechanical (switch board)

3

37

4

5

0.1

0.2

0.2

0.2

SST

SST2

SST2

SST2

0.1B

0.1B

0.1B

Add PC172 680PF connected to pin7 of PU936Delay 3.3VALWP start-up time 0.1B

Change PU8 from S-81235SG to S-81233SG0.1B 37 0.2 SST2

6

CPU_CORE voltage is unstable

Change PC48 from 100UF to 68UF

The time sequency of +1.5VS is error Change REF voltage from 2VREF of MAX1718 to

2.5VREF of MAX1632 .Change PR200 from 100K_1% to 200K_1%

The time sequency between 1.8VALWP

and 3.3VALWP is error

34 1.Change PR157 from 78.7K_1% to 84.5K_1%

2.Change PR48 from 249K_1% to 215K_1%

RTC battery that will be shortage.We

changed RTC battery from Panasonic

VL1220 to Maxell ML1220

Change LDO charger to 3.3V for Maxell ML1220

Modify Vin Detector and Precharger Detector circuit

7BOM and schematic vaule differentCorrect part vaule 0.1D 37 Change PL14 vaule from"5UH_SPC_06703" to

"5UH_SPC_06704-5R0A" 0.1 SST

8Correct curreent limited value Modify current limited from 2.86A to 3.22A 0.1E 35 0.1 SST1. Change PR68 from 24.9K_1% to 21K_1%

2. Change PR65 from 14.3K_1% to 15.8K_1%

9SST0.1Correct OCP of +VTTModify OCP current from 4.6A to 7A,because peak

current of +VTT is 6A in spec. 0.1E 33 1. Change PR201 from 10K_1% to 14.3K_1%

2. Change PR209 from 15K_1% to 150K_1%

340.1F

10 Add ferrite bead for EMI Based on EMI dept. test result, we must add bead

and change capacity for EMI issue

1. Add PL4 FBM-L11-453215-900LMAT

2. Change PC 24 from 0.1UF to 470PF and add PC23

470PF PT0.3

0.1F 34 Add PF1 7A fuseAdd NI-MH battery prevent NI-MH battery over charge/discharge

11

12

0.3 PT

Plug in AC adapter and battery on

time the system can't turn on. Separate precharge path from VS net because leakage

current is larger than p recharge current 0.1F 37 1. Connect pad2 of PD16 to VIN

2. Add PR20 1.5K and change PR84,PR85,and PR126 to

1.5K 0.3 PT

13 0.3 PT0.1F 37 1.Add PR21 200 ohm

Safety protection for RTC battery Add PR21 to prevent damging PR95 to damage RTC

battery

14 Design margin is not enough increase design margin for battery OVP prevent it

misses 0.1F 0.3 PT

Change battery OVP from 18.1V to 18.3V and

BATT-OVP will be changed from 4V to 4.04V

35

ADY11 LA-1181 2

PIR

Compal Electronics, Inc.

39 41Friday, November 16, 2001

Title

Size Document Number Rev

Date: Sheet of

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

0.1G

0.1H

Reason for change

0.1F

1.0

1. No-pop PCN3 and Populate PCN1

2. Populate PR29 and PQ11

3. Change PR68 from 28.7K_1% to21K_1%

4. Populate PQ30, PR65,PR131,PC101

PT2

PT

Change PC60 form 2.2F_1206_25V to 4.7UF_1210_25

modify constant power limited to 64W and

support air line adaptor identified

modify constant power limited to 49W and

disable air adapter

35

Support NI-MH battery

PT

0.3

0.3C

modify charge voltage

AC adapter is changed to 60W

Charger can't charge

35

0.3C

0.3

Phase

AC adapter is changed to 70W

1. Populate PC122 47PF_0402

2. Populate PR179 2M_0402

3. Populate PR137 10.2K_0402_1%

4. Populate PC123 100PF_0402

5. Change PR136 from 0_0402 to

10K_0402_1%

0.1F

PT

0.3

Pin3 of PQ9 isn't connectted pad2 of PR80

24

1. Change PR80 from 100K_0.1% to 152_0.1%

2. Change PR81 from 316K_0.1% to 309_0.1%

3. Add PR4 305K_0.1% and PR5 100K

4. Add PQ9 2N7002 and PQ10 DTC115EK

5. Add PC173 0.1U

34

0.3C

33

1.0

Implement 6cell li-on

34

Delete on-pop component

Add identifird signal 6C/8C#/4C#

Version change list (P.I.R. List)

33

Rev.

1.0

Modify List

23

1.Change control signal from AIR_ADP# to

AIR_ADP

2.Change PQ30 from TP0610T to 2N7002

15

33

34

PT

Item

0.3

PT2

PT2

The solution will reduce quantity of output

capacitor and increase stability

Change choice heighter capacitor

The control signal can't turn on PQ30

0.1F

0.1G

0.3D

Page 2 of 3

19

20

PT

0.3

21

Fixed Issue

0.3

16

B.Ver#

power limited for airline adapter is

disabled

noise issue from DC-DC

35Add compensation solution

for +5VALWP

18

34

1.Add PR1 100K and PR2 1K_1%

2.Add PR3 no-pop

Delete PC84,PC85,PC88

STReverse PF1 and add PJP4

22

PT

17

PG#

1. No-pop PCN1 and Populate PCN3

2. No-pop PR29 and PQ11

3. Change PR68 from 21K_1% to 28.7K_1%

4. No-pop PQ30, PR65,PR131,PC101

1.0

Pin3 of PQ9 isn't connectted pad2 of PR80

Because the reverse component is not need

34

Change 4S charge voltage to 17V for 4 cell/8 cell

and NI-MH,other 3S is 12.75V for 6cell

33

25

Add FUSE for safety of battery

Fix Battery OVP protect point Fix the table of Battery OVP and reserve

PC115 about OP Amps oscillates 1.0 34 1.0 STNo-pop PC115

ADY11 LA-1181 2

PIR

Compal Electronics, Inc.

40 41Friday, November 16, 2001

Title

Size Document Number Rev

Date: Sheet of

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Reason for change

1.0 Change PCN2 from BTC-07GR1 to BTC-07GR4 ST

1.0modify constant power limit spec.

33 1.0

Phase

ST2

1. Change PR68 from 21K_1% to 22.6_1%

2. Change PR65 from 15.8K_1% to19.6K_1%

34

Version change list (P.I.R. List)

Rev. Modify List

26

Item

enhance conductivity of battery connector based on

customer's requirement

1.0

Page 3 of 3

Fixed Issue B.Ver#

enhance conductivity of connector

27

PG#

modify constant power limited from 3.22A to 3.07A

28 Fix DFX issue 1.0 36 1.0 ST2

Delete PL15

The PL14 and PL15 is co-layout, but PL15 will not

be used.

29 Fix DFX issue Delete PJP9 for SMT process. 1.0 36 Delete PJP9

ADY11 LA-1181 2

PIR

Compal Electronics, Inc.

41 41Tuesday, November 20, 2001

Title

Size Document Number Rev

Date: Sheet of

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

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