Compal LA 2231 Schematics. Www.s Manuals.com. R0.3 Schematics

User Manual: Notebook RoverBook Voyager H571 - Service manuals and Schematics, Disassembly / Assembly. Free.

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A

B

C

D

E

1

1

Compal Confidential

2

2

DCL56 Schematics Document
Banias uFCBGA/uFCPGA Package with Odem Core
Logic
2004-02-03 for C-test
3

3

REV: 0.3

4

4

Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

B

C

D

Cover Sheet
Size

Document Number

Rev
0.3

DCL56 LA2231
Date:

Thursday, February 05, 2004

Sheet
E

1

of

45

A

B

C

D

E

Block Diagram

Compal confidential
Model Name :DCL56
File Name : LA-2231 Rev:0.3
Mobile Banias

Thermal Sensor

Clock Generator

SPR Conn

MAX6654

uFCBGA/uFCPGA CPU
page 4,5
478pin
HA#(3..31)
System Bus HD#(0..63)

1

1

page 12

page 4

page 34

400MHz

Fan Control

page 30

CRT Connector

Odem B

page 18

VGA
Board

Memory
BUS(DDR)

AGP4X(1.5V)

DDR-SO-DIMM X2

2.5V 200MHz

BANK 0, 1, 2, 3 page 9,10,11

uFCBGA-593 pin

AGP Conn

page 6,7,8

page 17

MULTIO

2

2

Ext. Board
USB port 0, 1, 2

PCI BUS

3.3V 33MHz

3.3V 48MHz

13 94
Controller
VIA VT6301S

page 23

page 22

1394
Connector

3

page 22

CardBus

LAN
RTL 8100L
page 21

page 25

page 25
3.3V 24.576MHz

BGA-421

ENE CB1410

BlueTooth I/F

USB conn

ICH4-M
MINI
PCI I/F

USB port 4

USBx3

page 13,14,15

AC-LINK

3.3V ATA100

page 19

Slot 0

RJ45

page 21

page 20

LPC BUS

3

3.3V 33MHz

LED INDICATE

Power On/Off
Reset & RTC

LPC to X-BUS
& KBC

HDD

page 28

SIO LPC47N217

SD/MS Slot

CDROM

AC97
Codec
ALC250

page 16

page 24

page 30

DC/DC Interface
Suspend

Winbond
W83L518D
page 24

ENE 910

page 25

page 16

page 31

page 26

PARALLEL

SERIAL

EC I/O Buffer

page 29

page 33

AMP& Phone
Jack

Touch Pad

page 17

page 32

4

4

Power Circuit
DC/DC
page
35,36,37,38,39,40,41,42

BIOS

FIR

page 29

Int.KBD

page 17

Compal Electronics, Inc.

Legacy I/O Option

Title

Block Diagram
Size

Document Number

Rev
0.3

DCL56 LA2231
Date:
A

B

C

D

Sheet

Tuesday, February 17, 2004
E

2

of

45

A

B

C

1

2

E

Board ID Table

Voltage Rails
Power Plane

D

S0-S1

Description

S3

S5

VIN

Adapter power supply (19V)

N/A

N/A

N/A

B+
+CPU_CORE

AC or battery power rail for power circuit.

N/A

N/A

N/A

Core voltage for CPU

ON

OFF

OFF

+VCCP

1.05V rail for Processor I/O

ON

OFF

OFF

+1.2VS

1.2VS switched power rail for MCH

ON

OFF

OFF

+1.25VS

1.25V switched power rail

ON

OFF

OFF

+1.5VALW

1.5V power rail

ON

ON

ON
OFF

+1.5V

1.5V power rail

ON

ON

+1.5VS

AGP 4X

ON

OFF

OFF

+1.8VALW

1.8V power rail

ON

ON

ON*

+1.8VS

1.8V switched power rail

ON

OFF

OFF

+2.5V

2.5V power rail

ON

ON

OFF

+2.5VS

2.5V switched power rail

ON

OFF

OFF

+3VALW

3.3V always on power rail

ON

ON

ON*

+3V

3.3V power rail

ON

ON

OFF

+3VS

3.3V switched power rail

ON

OFF

OFF

+5VALW

5V always on power rail

ON

ON

ON*

+5V

5V power rail

ON

ON

OFF

+5VS

5V switched power rail

ON

OFF

OFF

+12VALW

12V always on power rail

ON

ON

ON*

RTCVCC

RTC power

ON

ON

ON

BID2

BID1

BID0

0

0

0

PCB Revision
0.1

0

0

1

0.2

0

1

0

0.3

0

1

1

0.4

1

0

0

1

0

1

1

1

0

1

1

1

1

2

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

External PCI Devices
Device

IDSEL#

REQ#/GNT#

Interrupts
PIRQA

VGA

3

C ardBus

AD19

2

P IRQC

LAN

AD17

3

P IRQD

AD18,AD22

1/4

PIRQC/PIRQD

AD16

0

PIRQB

Mini-PCI
1394

3

4

4

Title

Compal Electronics, Ltd.
Notes & PIR

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

B

C

D

Size
B
Date:

Document Number

Rev
0.3

DCL56 LA2231
Thursday, February 05, 2004

Sheet
E

3

of

45

5

4

H_RS#[0..2]

JP12A

1

Note:
Placement near to CPU Conn

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

C

1

12 CLK_CPU_ITP
12 CLK_CPU_ITP#

A16
A15

ITP_CLK0
ITP_CLK1

12 CLK_CPU_BCLK
12 CLK_CPU_BCLK#

B15
B14

BCLK0
BCLK1

N2
L1
J3
N4
L4
H2
K3
K4
A4
J2
B11

ADS#
BNR#
BPRI#
BR0#
DEFER#
DRDY#
HIT#
HITM#
IERR#
LOCK#
RESET#

H_ADS#
H_BNR#
H_BPRI#
H_BR0#
H_DEFER#
H_DRDY#
H_HIT#
H_HITM#

H_IERR#
H_CPURST#
H_RS#0
H_RS#1
H_RS#2

B

6

+3VALW

H_TRDY#

R285
150_0402_5%
1
2
ITP_DBRESET#
6
7,13
7

+VCCP
13

H_DBSY#
H_DPSLP#
H_DPWR#

1
R271

1
2
R257
330_0402_5%

H_PW RGD
13

H_CPUSLP#
R261
@1K_0402_5%
1
2
1
2
R254
@1K_0402_5%

DINV0#
DINV1#
DINV2#
DINV3#

D25
J26
T24
AD20

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

DSTBN0#
DSTBN1#
DSTBN2#
DSTBN3#
DSTBP0#
DSTBP1#
DSTBP2#
DSTBP3#

C23
K24
W25
AE24
C22
L24
W24
AE25

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

A20M#
FERR#
IGNNE#
INIT#
LINT0
LINT1

C2
D3
A3
B5
D1
D4

H_A20M# 13
H_FERR# 13
H_IGNNE# 13
H_INIT# 13
H_INTR
13
H_NMI
13

STPCLK#
SMI#

C6
B4

H_STPCLK# 13
H_SMI#
13

DATA GROUP

H1
K1
L2
M3

RS0#
RS1#
RS2#
TRDY#

C8
B8
A9
C9

BPM0#
BPM1#
BPM2#
BPM3#

HOST CLK

CONTROL GROUP

2
A7
0_0402_5% M2
B7
C19
A10
B10
PRO_CHOT#B17

DBR#
DBSY#
DPSLP#
DPWR#
PRDY#
PREQ#
PROCHOT#

E4
A6
ITP_TCK
A13
ITP_TDI
C12
ITP_TDO
A12
TEST1
C5
TEST2
F23
ITP_TMS
C11
ITP_TRST# B13

PWRGOOD
SLP#
TCK
TDI
TDO
TEST1
TEST2
TMS
TRST#

THERMDA B18
THERMDC A18
C17

THERMDA DIODE
THERMDC
THERMTRIP#

A

14 THERMTRIP#

A19
A25
A22
B21
A24
B26
A21
B20
C20
B24
D24
E24
C26
B23
E23
C25
H23
G25
L23
M26
H24
F25
G24
J23
M23
J25
L26
N24
M25
H26
N25
K25
Y26
AA24
T25
U23
V23
R24
R26
R23
AA23
U26
V24
U25
V26
Y23
AA26
Y25
AB25
AC23
AB24
AC20
AC22
AC25
AD23
AE22
AF23
AD24
AF20
AE21
AD21
AF25
AF22
AF26

REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
ADSTB0#
ADSTB1#

2
R272
6
H_LOCK#
56_0402_5%
6
H_CPURST#

14 ITP_DBRESET#

ADDR GROUP

U3
AE5

6
6
6
6
6
6
6
6

MISC

1

C86
2200P_0402_50V7K

R79
@10K_0402_5%

U15

D

THERMDA

2

THERMDC

3

D-

28,34 EC_SMB_CK2

8

SCLK

28,34 EC_SMB_DA2

7

SDATA

2

C91
0.1U_0402_16V4Z

2

2

1

1
HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63

D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#

Banias

H_ADSTB#0
H_ADSTB#1

6
6

+VCCP

R2
P3
T2
P1
T1

A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#

D+

VDD1

1

ALERT#

6

THERM#

4

GND

5

ADM1032ARM_RM8

C

+VCCP

1
R273
1
R264
1
R259

ITP_TDO
2
@54.9_0402_1%
2 H_CPURST#
@54.9_0402_1%
ITP_TMS
2
39.2_0603_1%

1
R274

ITP_TCK
2
27.4_0402_1%

Note:
Placement near to ITP Conn

B

6
6
6
6
6
6
6
6
6
6
6
6

+3VS

2

+VCCP

P4
U4
V3
R3
V2
W1
T4
W2
Y4
Y1
U1
AA3
Y3
AA2
AF4
AC4
AC7
AC3
AD3
AE4
AD2
AB4
AC6
AD5
AE2
AD6
AF3
AE1
AF1

R290
@1K_0402_5%

THERMAL

LEGACY CPU

1

HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31

D

R265
ITP_TRST#
2
680_0402_5%

+3VS

H_REQ#[0..4]

H_REQ#[0..4]

R262
ITP_TDI
2
150_0402_5%

HD#[0..63] 6

HA#[3..31]

HA#[3..31]

1

HD#[0..63]

H_RS#[0..2] 6

1

PROCHOT#

1

6

2

C
+VCCP

+VCCP

1

1

2
R269
@56_0402_5%

2
B
E

Q34
@2SC2411K_SOT23

A

3

6

3

2 PRO_CHOT#
R268
56_0402_5%

Compal Electronics, Inc.

AMP_1473129-1
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Banias Processor in mFCPGA479 with ITP
Size
A3
Date:

5

4

3

2

Document Number

Rev
0.3

DCL56 LA2231
Thursday, February 05, 2004

Sheet
1

4

of

45

5

4

3

2

1

+CPU_CORE
+CPU_CORE
JP12C
JP12B

1
R217
1
R211

VCCSENSE AE7
2
@54.9_0402_1%
VSSSENSE AF6
2
@54.9_0402_1%

+1.8VS

D

+VCCP

C

+CPU_CORE

1

+VCCP
R233
1K_0402_1%

1

VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP

D6
D8
D18
D20
D22
E5
E7
E9
E17
E19
E21
F6
F8
F18

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5

E2
F2
F3
G3
G4
H4

VID0
VID1
VID2
VID3
VID4
VID5

1

1

D10
D12
D14
D16
E11
E13
E15
F10
F12
F14
F16
K6
L5
L21
M6
M22
N5
N21
P6
P22
R5
R21
T6
T22
U21

39
39
39
39
39
39

GTL_REF0

1
R263
1
R212
1
R266
1
R260
1
R267

AD26
E26
G1
AC1
P25
P26
AB2
AB1

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
GROUNG,
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

Banias

POWER,

GTLREF0
RSVD
RSVD
RSVD
COMP0
COMP1
COMP2
COMP3

2
B2 RSVD
@1K_0402_5%
2
AF7 RSVD
@1K_0402_5%
2
C14 RSVD
@1K_0402_5%
2
C3 RSVD
@1K_0402_5%
2
C16
@1K_0402_5% TEST3

1

1

1

1

1

+

+

+

+

+

+

C224

C223

C226

C225

C555

C556

2
2
2
2
2
2
220U_D2_4VM_R12
220U_D2_4VM_R12
@220U_D2_4VM_R12
220U_D2_4VM_R12
220U_D2_4VM_R12
@220U_D2_4VM_R12
+CPU_CORE

1

1

1

C242

1

C278

1

C240

1

C312

1

C284

C274

C314

2
2
2
2
2
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
+CPU_CORE

1

1

1

C241

1

C311

1

C267

1

C261

1

C292

C258

C230

SIGNALS AND NC2

2
2
2
2
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M

+CPU_CORE

1

1

1

C259

1

C260

1

C262

1

C231

1

C281

C236

C299

2
2
2
2
2
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
+CPU_CORE

1

1

1

C232

1

C235

1

C293

1

C268

1

C237

C228

C233

2
2
2
2
2
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
+CPU_CORE

1

1

1

C301

1

C239

1

C229

1

C310

1

C243

C238

C309

F20
F22
G5
G21
H6
H22
J5
J21
K22
U5
V6
V22
W5
W21
Y6
Y22
AA5
AA7
AA9
AA11
AA13
AA15
AA17
AA19
AA21
AB6
AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AC9
AC11
AC13
AC15
AC17
AC19
AD8
AD10
AD12
AD14
AD16
AD18
AE9
AE11
AE13
AE15
AE17
AE19
AF8
AF10
AF12
AF14
AF16
AF18

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

M4
M5
M21
M24
N3
N6
N22
N23
N26
P2
P5
P21
P24
R1
R4
R6
R22
R25
T3
T5
T21
T23

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

Banias

POWER, GROUND

2
2
2
2
2
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M

Vcc-core
Decoupling
SPCAP,Polymer

C,uF

ESR, mohm

ESL,nH

4X220uF

12m ohm/4

3.5nH/4

MLCC 0805 X5R

35X10uF

5m ohm/35

0.6nH/35

+1.8VS

1

1
C320

2

1
C351

2

1
C286

1

1

C249

2

2

1

C280

2

1

C255

2

C332

2

C344

2

0.01U_0402_16V7K
0.01U_0402_16V7K
10U_1206_10V4Z
10U_1206_10V4Z
0.01U_0402_16V7K
0.01U_0402_16V7K
10U_1206_10V4Z
10U_1206_10V4Z

T26
U2
U6
U22
U24
V1
V4
V5
V21
V25
W3
W6
W22
W23
W26
Y2
Y5
Y21
Y24
AA1
AA4
AA6
AA8
AA10
AA12
AA14
AA16
AA18
AA20
AA22
AA25
AB3
AB5
AB7
AB9
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AB26
AC2
AC5
AC8
AC10
AC12
AC14
AC16
AC18
AC21
AC24
AD1
AD4
AD7
AD9
AD11
AD13
AD15
AD17
AD19
AD22
AD25
AE3
AE6
AE8
AE10
AE12
AE14
AE16
AE18
AE20
AE23
AE26
AF2
AF5
AF9
AF11
AF13
AF15
AF17
AF19
AF21
AF24

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

D

C

B

AMP_1473129-1
+VCCP

AMP_1473129-1

1

2

2

VCCQ0
VCCQ1

PSI#

R238
R239
R218
R221
27.4_0402_1%54.9_0402_1%
54.9_0402_1%
27.4_0402_1%

2

P23
W4

E1

2
R231
2K_0402_1%

1

1

VCCA0
VCCA1
VCCA2
VCCA3

PSI#

COMP0
COMP1
COMP2
COMP3

2

F26
B1
N1
AC26

39

2

B

VCCSENSE
VSSSENSE

A2
A5
A8
A11
A14
A17
A20
A23
A26
B3
B6
B9
B12
B16
B19
B22
B25
C1
C4
C7
C10
C13
C15
C18
RESERVED
C21
C24
D2
D5
D7
D9
D11
D13
D15
D17
D19
D21
D23
D26
E3
E6
E8
E10
E12
E14
E16
E18
E20
E22
E25
F1
F4
F5
F7
F9
F11
F13
F15
F17
F19
F21
F24
G2
G6
G22
G23
G26
H3
H5
H21
H25
J1
J4
J6
J22
J24
K2
K5
K21
K23
K26
L3
L6
L22
L25
M1

1

1

+
C365

A

2

1
C331

2

1
C277

2

1
C338

2

1
C330

2

1
C295

2

1
C337

2

1
C336

2

1
C285

2

1
C329

2

C263

A

2

0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
150U_D2_6.3VM
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z

Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Banias Processor in mFCPGA479
Size
A3
Date:

5

4

3

2

Document Number

Rev
0.3

DCL56 LA2231
Thursday, February 05, 2004

Sheet
1

5

of

45

5

HUB_PD[0..10]

HUB_PD[0:10] 13

U17B

HSWNG1
HSWNG0
HRCOMP1
HRCOMP0

R242
49.9_0402_1%
MGH_GTLREF
1
1

1

C283
C290
C322
R245
1U_0603_10V6K 100_0402_1%
2
2
2
220P_0402_50V7K
220P_0402_50V7K

1

17 AGP_SBSTB
17 AGP_SBSTB#

AF27
AF26

SB_STB
SB_STB#

17 AGP_RBF#
17 AGP_WBF#

AE22
AE23
AF22

RBF#
WBF#
PIPE#

AGP

GND

AG25
AGP_ST1 AF24
AGP_ST2 AG26

17 AGP_ST0
17 AGP_ST1
17 AGP_ST2

CLK_MCH_66M P22

ST0
ST1
ST2

VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141

AB9
AD10
AF9
AJ9
A7
F8
J7
L8
N8
R8
U8
W8
AA8
AD8
AF7
AJ7
D5
F6
H6
K6
M6
P6
T6
V6
Y6
AB6
AD6
AF5
AJ5
A3
J4
L4
N4
R4
U4
W4
AA4
AC4
AE4
AJ3
E1
J1
L1
N1
R1
U1
W1
AA1
AC1
AE1
AG1

GRCOMP
AGPREF

AD25
AA21

66IN

2

+1.5VS

C

R224
@1K_0402_5%
AGP_ST2

+1.5VS

R228
@1K_0402_5%
AGP_ST1

R225
@1K_0402_5%

ST1

ST2

X

1

DDR

0

X

TEST MODE

1

X

400 Mhz PSB

AGP_RCOMP 1
+AGPREF

2

R236
27.4_0402_1%

C334
0.01U_0402_16V7K

MCH STRAP

R232
40.2_0603_1%
2

B

+1.5VS

+AGPREF

1

CLK_MCH_66M

1

RG82P4300M_FCBGA593

SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7

12 CLK_MCH_66M

H_RCOMP1
H_RCOMP0

R235
27.4_0402_1%

A

AH28
AH27
AG28
AG27
AE28
AE27
AE24
AE25

+VCCP

AD13 H_SWNG1
AA7 H_SWNG0
AC13
AC2

AD_STB0
AD_STB#0
AD_STB1
AD_STB#1

+1.8VS

HUB_VREF

1

HDSTBN#0
HDSTBN#1
HDSTBN#2
HDSTBN#3
HDSTBP#0
HDSTBP#1
HDSTBP#2
HDSTBP#3
DBI#0
DBI#1
DBI#2
DBI#3

R24
R23
AC27
AC28
AGP_SBA0
AGP_SBA1
AGP_SBA2
AGP_SBA3
AGP_SBA4
AGP_SBA5
AGP_SBA6
AGP_SBA7

HI_REF

2 R256
36.5_0402_1%

1

P26

1

M7
P8
AA9
AB12
AB16

R244
150_0402_1%

HLRCOMP

HUB_PSTRB 13
HUB_PSTRB# 13

P27 HUB_RCOMP

C291
0.1U_0402_16V4Z

R241
1K_0402_1%
+AGPREF

RG82P4300M_FCBGA593
R255
@22_0402_5%

2

AD4
AF6
AD11
AC15
AD3
AG6
AE11
AC16
AD5
AG5
AH9
AD15

HVREF0
HVREF1
HVREF2
HVREF3
HVREF4

CPURST#

AGP_ADSTB0
AGP_ADSTB0#
AGP_ADSTB1
AGP_ADSTB1#

17
17
17
17

N25
N24

D

1

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

AE17

2
H_SWNG0

R240
301_0402_1%

HI_STB
HI_STB#

HUB_PD0
HUB_PD1
HUB_PD2
HUB_PD3
HUB_PD4
HUB_PD5
HUB_PD6
HUB_PD7
HUB_PD8
HUB_PD9
HUB_PD10

R237
1K_0402_1%

Note:
R203,R204 placement
center of MCH and AGP

1

2

C327
@10P_0402_50V8K

A

2

4
4
4
4
4
4
4
4
4
4
4
4

H_CPURST#

H_RS#0
H_RS#1
H_RS#2

GFRAME#
GDEVSEL#
GIRDY#
GTRDY#
GSTOP#
GPAR
GREQ#
GGNT#

P25
P24
N27
P23
M26
M25
L28
L27
M27
N28
M24

2

ADS#
HTRDY#
DRDY#
DEFER#
HITM#
HIT#
HLOCK#
BR0#
BNR#
BPRI#
DBSY#
RS#0
RS#1
RS#2

Y24
W28
W27
W24
W23
W25
AG24
AH25

HI_0
HI_1
HI_2
HI_3
HI_4
HI_5
HI_6
HI_7
HI_8
HI_9
HI_10

1

U7
V4
W2
Y4
Y3
Y5
W3
V7
V3
Y7
V5
W7
W5
W6

1

HUB

GCBE#0
GCBE#1
GCBE#2
GCBE#3

AGP_FRAME#
AGP_DEVSEL#
AGP_IRDY#
AGP_TRDY#
AGP_STOP#
AGP_PAR
17 AGP_REQ#
17 AGP_GNT#

17
17
17
17
17
17

1

4

H_ADS#
H_TRDY#
H_DRDY#
H_DEFER#
H_HITM#
H_HIT#
H_LOCK#
H_BR0#
H_BNR#
H_BPRI#
H_DBSY#

C289
0.01U_0402_16V7K

Odem
GAD0
GAD1
GAD2
GAD3
GAD4
GAD5
GAD6
GAD7
GAD8
GAD9
GAD10
GAD11
GAD12
GAD13
GAD14
GAD15
GAD16
GAD17
GAD18
GAD19
GAD20
GAD21
GAD22
GAD23
GAD24
GAD25
GAD26
GAD27
GAD28
GAD29
GAD30
GAD31

2

4
4
4
4
4
4
4
4
4
4
4

1

BCLK#
BCLK

R230
150_0402_1%

+VCCP

R27
R28
T25
R25
T26
T27
U27
U28
V26
V27
T23
U23
T24
U24
U25
V24
Y27
Y26
AA28
AB25
AB27
AA27
AB26
Y23
AB23
AA24
AA25
AB24
AC25
AC24
AC22
AD24

AGP_C/BE#0 V25
AGP_C/BE#1 V23
AGP_C/BE#2 Y25
AGP_C/BE#3 AA23

1

K8
J8

12 CLK_MCH_BCLK#
12 CLK_MCH_BCLK

2
H_SWNG1

R234
301_0402_1%

2

HADSTB#0
HADSTB#1

1

1

R5
N7

H_ADSTB#0
H_ADSTB#1

C279
0.01U_0402_16V7K

2

4
4

+VCCP

1

HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4

HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63

2

U2
T7
R7
U5
T4

C

AA2
AB5
AA5
AB3
AB4
AC5
AA3
AA6
AE3
AB7
AE5
AF3
AC6
AC3
AF4
AE2
AG4
AG2
AE7
AE8
AH2
AC7
AG3
AD7
AH7
AE6
AC8
AG8
AG7
AH3
AF8
AH5
AC11
AC12
AE9
AC10
AE10
AD9
AG9
AC9
AE12
AF10
AG11
AG10
AH11
AG12
AE13
AF12
AG13
AH13
AC14
AF14
AG14
AE14
AG15
AG16
AG17
AH15
AC17
AF16
AE15
AH17
AD17
AE16

1

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

HOST

HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63

2

HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31

1

U6
T5
R2
U3
R3
P7
T3
P4
P3
P5
R6
N2
N5
N3
J3
M3
M4
M5
L5
K3
J2
N6
L6
L2
K5
L3
L7
K4
J5

AGP_AD0
AGP_AD1
AGP_AD2
AGP_AD3
AGP_AD4
AGP_AD5
AGP_AD6
AGP_AD7
AGP_AD8
AGP_AD9
AGP_AD10
AGP_AD11
AGP_AD12
AGP_AD13
AGP_AD14
AGP_AD15
AGP_AD16
AGP_AD17
AGP_AD18
AGP_AD19
AGP_AD20
AGP_AD21
AGP_AD22
AGP_AD23
AGP_AD24
AGP_AD25
AGP_AD26
AGP_AD27
AGP_AD28
AGP_AD29
AGP_AD30
AGP_AD31

2

Odem

HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31

AGP_C/BE#[0..3]
AGP_SBA[0..7]

17 AGP_SBA[0..7]

2

D

17 AGP_C/BE#[0..3]

AGP_AD[0..31]

1

17 AGP_AD[0..31]

2

H_REQ#[0..4]

U17A

B

1

HD#[0..63] 4

H_REQ#[0..4]

2

4

HD#[0..63]
HA#[3..31]

2

HA#[3..31]

2

2

H_RS#[0..2]

3

1

4
4

4

H_RS#[0..2]

Compal Electronics, Inc.
Title

Odem(1 of 3)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

Size
Document Number
Custom
DCL56
Date:

R ev
0.3

LA2231

Thursday, February 05, 2004

Sheet
1

6

of

45

5

4

3

DDR_SMA[0..12]

9 DDR_SDQ[0..63]
9 DDR_SDQS[0..8]

2

1

DDR_SMA[0..12] 9

DDR_SDQ[0..63]
DDR_SDQS[0..8]
U17C

9 DDR_CB[0..7]

DDR_CB[0..7]

D

E12
F17
E16
G17
G18
E18
F19
G20
G19
F21
F13
E20
G21
G22

SMA0
SMA1
SMA2
SMA3
SMA4
SMA5
SMA6
SMA7
SMA8
SMA9
SMA10
SMA11
SMA12
RSVD2

DDR_SDQS0
DDR_SDQS1
DDR_SDQS2
DDR_SDQS3
DDR_SDQS4
DDR_SDQS5
DDR_SDQS6
DDR_SDQS7
DDR_SDQS8

F26
C26
C23
B19
D12
C8
C5
E3
E15

SDQS0
SDQS1
SDQS2
SDQS3
SDQS4
SDQS5
SDQS6
SDQS7
SDQS8

G11
F11
G8

SWE#
SRAS#
SCAS#

DDR_CLK0
DDR_CLK0#
DDR_CLK1
DDR_CLK1#
DDR_CLK2
DDR_CLK2#
DDR_CLK3
DDR_CLK3#
DDR_CLK4
DDR_CLK4#
DDR_CLK5
DDR_CLK5#

J25
K25
G5
F5
G24
E24
G25
J24
G6
G7
K23
J23

SCK0
SCK#0
SCK1
SCK#1
SCK2
SCK#2
SCK3
SCK#3
SCK4
SCK#4
SCK5
SCK#5

9,10
9,10
10
10

DDR_CKE0
DDR_CKE1
DDR_CKE2
DDR_CKE3

G23
E22
H23
F23

SCKE0
SCKE1
SCKE2
SCKE3

9,10
9,10
10
10

DDR_SCS#0
DDR_SCS#1
DDR_SCS#2
DDR_SCS#3

E9
F7
F9
E7

SCS#0
SCS#1
SCS#2
SCS#3

9 DDR_SWE#
9 DDR_SRAS#
9 DDR_SCAS#

C

9
9
9
9
9
9
10
10
10
10
10
10

B

9 DDR_SBS0
9 DDR_SBS1

+1.25VS_SMVREF

+SDREF

2
R270
0_0805_5%

Odem

DDR_SMA0
DDR_SMA1
DDR_SMA2
DDR_SMA3
DDR_SMA4
DDR_SMA5
DDR_SMA6
DDR_SMA7
DDR_SMA8
DDR_SMA9
DDR_SMA10
DDR_SMA11
DDR_SMA12

G12
G13

SBS0
SBS1

J9
J21

SMVREF0
SMVREF1

SDQ0
SDQ1
SDQ2
SDQ3
SDQ4
SDQ5
SDQ6
SDQ7
SDQ8
SDQ9
SDQ10
SDQ11
SDQ12
SDQ13
SDQ14
SDQ15
SDQ16
SDQ17
SDQ18
SDQ19
SDQ20
SDQ21
SDQ22
SDQ23
SDQ24
SDQ25
SDQ26
SDQ27
SDQ28
SDQ29
SDQ30
SDQ31
SDQ32
SDQ33
SDQ34
SDQ35
SDQ36
SDQ37
SDQ38
SDQ39
SDQ40
SDQ41
SDQ42
SDQ43
SDQ44
SDQ45
SDQ46
SDQ47
SDQ48
SDQ49
SDQ50
SDQ51
SDQ52
SDQ53
SDQ54
SDQ55
SDQ56
SDQ57
SDQ58
SDQ59
SDQ60
SDQ61
SDQ62
SDQ63
SDQ64
SDQ65
SDQ66
SDQ67
SDQ68
SDQ69
SDQ70
SDQ71

MEMORY

1

C354
0.1U_0402_16V4Z

1

1

2

2

+1.25VS
C353
0.1U_0402_16V4Z 1

1
2DDR_RCOMPJ28
R275
30.1_0603_1%
G15

M_RCV#
C352
2 0.1U_0402_16V4Z
4,13
4

H_DPSLP#
H_DPWR#

G14
V8
Y8
AD26
AD27

SMRCOMP
RCVENIN#

G28
F27
C28
E28
H25
G27
F25
B28
E27
C27
B25
C25
B27
D27
D26
E25
D24
E23
C22
E21
C24
B23
D22
B21
C21
D20
C19
D18
C20
E19
C18
E17
E13
C12
B11
C10
B13
C13
C11
D10
E10
C9
D8
E8
E11
B9
B7
C7
C6
D6
D4
B3
E6
B5
C4
E4
C3
D3
F4
F3
B2
C2
E2
G4
C16
D16
B15
C14
B17
C17
C15
D14

D

DDR_SDQ0
DDR_SDQ1
DDR_SDQ2
DDR_SDQ3
DDR_SDQ4
DDR_SDQ5
DDR_SDQ6
DDR_SDQ7
DDR_SDQ8
DDR_SDQ9
DDR_SDQ10
DDR_SDQ11
DDR_SDQ12
DDR_SDQ13
DDR_SDQ14
DDR_SDQ15
DDR_SDQ16
DDR_SDQ17
DDR_SDQ18
DDR_SDQ19
DDR_SDQ20
DDR_SDQ21
DDR_SDQ22
DDR_SDQ23
DDR_SDQ24
DDR_SDQ25
DDR_SDQ26
DDR_SDQ27
DDR_SDQ28
DDR_SDQ29
DDR_SDQ30
DDR_SDQ31
DDR_SDQ32
DDR_SDQ33
DDR_SDQ34
DDR_SDQ35
DDR_SDQ36
DDR_SDQ37
DDR_SDQ38
DDR_SDQ39
DDR_SDQ40
DDR_SDQ41
DDR_SDQ42
DDR_SDQ43
DDR_SDQ44
DDR_SDQ45
DDR_SDQ46
DDR_SDQ47
DDR_SDQ48
DDR_SDQ49
DDR_SDQ50
DDR_SDQ51
DDR_SDQ52
DDR_SDQ53
DDR_SDQ54
DDR_SDQ55
DDR_SDQ56
DDR_SDQ57
DDR_SDQ58
DDR_SDQ59
DDR_SDQ60
DDR_SDQ61
DDR_SDQ62
DDR_SDQ63
DDR_CB0
DDR_CB1
DDR_CB2
DDR_CB3
DDR_CB4
DDR_CB5
DDR_CB6
DDR_CB7

C

B

DDR_CB0
DDR_CB1
DDR_CB2
DDR_CB3
DDR_CB4
DDR_CB5
DDR_CB6
DDR_CB7

9
9
9
9
9
9
9
9

RCVENOUT#
DPSLP#
DPWR#
NC0
NC1

RSTIN#
RSVD1
TESTIN#

J27
H27
H26 MCH_TEST# 1

PCIRST# 13,19,20,21,22,23,24,26

2

+1.5VS

R279
@4.7K_0402_5%

A

A

RG82P4300M_FCBGA593

Compal Electronics, Inc.
Title

Odem(2 of 3)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

Size
Document Number
Custom
DCL56
Date:

R ev
0.3

LA2231

Thursday, February 05, 2004

Sheet
1

7

of

45

5

4

3

2

1

+2.5V

U17D

D

+1.2VS

+1.8VS

R29
W29
AC29
AG29
U26
AA26
AE26
AJ25
AD23
AF23
R22
U22
W22
AA22
AB21
AD21

P17
N16
P15
R16
T15
U16
N14
P13
R14
U14

VCC0
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9

L29
L25
N26
N23
M22

VCCHL0
VCCHL1
VCCHL2
VCCHL3
VCCHL4

C

+VCCP

+2.5V

B

+1.8VS

A

1

2

2

AG23
AJ23
AE21
AG21
AJ21
AB20
AC19
AD20
AE19
AF20
AG19
AJ19
AB18
AD18
AF18
AB14
AB10
M8
T8
AB8

POWER
VCCP0
VCCP1
VCCP2
VCCP3
VCCP4
VCCP5
VCCP6
VCCP7
VCCP8
VCCP9
VCCP10
VCCP11
VCCP12
VCCP13
VCCP14
VCCP15
VCCP16
VCCP17
VCCP18
VCCP19

C29
G29
A25
D25
K26
D23
H24
K24
L23
A21
F22
H22
K22
D19
H20
A17
F18
H18
D15
F16
H16
A13
F14
H14
D11
H12
A9
F10
H10
D7
H8
K7
A5
E5
H5
J6
C1
G1

VCCSM0
VCCSM1
VCCSM2
VCCSM3
VCCSM4
VCCSM5
VCCSM6
VCCSM7
VCCSM8
VCCSM9
VCCSM10
VCCSM11
VCCSM12
VCCSM13
VCCSM14
VCCSM15
VCCSM16
VCCSM17
VCCSM18
VCCSM19
VCCSM20
VCCSM21
VCCSM22
VCCSM23
VCCSM24
VCCSM25
VCCSM26
VCCSM27
VCCSM28
VCCSM29
VCCSM30
VCCSM31
VCCSM32
VCCSM33
VCCSM34
VCCSM35
VCCSM36
VCCSM37

T17

VCCGA

T13

VCCHA

GND

+
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90

E29
J29
N29
U29
AA29
AE29
A27
K27
AJ27
E26
G26
J26
L26
R26
W26
AC26
AF25
A23
F24
L24
M23
AC23
AH23
D21
H21
J22
L22
N22
T22
V22
Y22
AB22
AC21
AD22
AF21
AG22
AH21
A19
F20
H19
AB19
AC20
AD19
AE20
AF19
AG20
AH19
D17
H17
N17
R17
U17
AB17
AC18
AE18
AF17
AG18
AJ17
A15
F15
H15
N15
P16
R15
T16
U15
AB15
AD16
AF15
AJ15
D13
E14
H13
N13
P14
R13
T14
U13
AB13
AD14
AF13
AJ13
A11
F12
H11
AB11
AD12
AF11
AJ11
D9
H9

RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9

G16
G10
G9
H7
G2
G3
H3

ETS#

+
C367

C348
C372

2
2
150U_D2_6.3VM

C342

2

2

0.1U_0402_16V4Z
1
1

C349
2

22U_1206_10V4Z

C371
2

C357

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

D

0.1U_0402_16V4Z
1
1

1
C358

C376

2
2
0.1U_0402_16V4Z

0.1U_0402_16V4Z
1
1

C375

C382

2
2
0.1U_0402_16V4Z

0.1U_0402_16V4Z
1
1

C381

C359

0.1U_0402_16V4Z
1
1

C374

2
2
0.1U_0402_16V4Z

C378

2
2
0.1U_0402_16V4Z

0.1U_0402_16V4Z
1
1

C379

C380

2
2
0.1U_0402_16V4Z

0.1U_0402_16V4Z
1

C373

C377

2
2
0.1U_0402_16V4Z

+1.8VS
0.1U_0402_16V4Z
1
1

1
C345

C343

2
2
10U_1206_10V4Z

0.1U_0402_16V4Z
1

C335

C339

2
2
0.1U_0402_16V4Z

+1.5VS_ODEM
10U_1206_10V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

1

1

1
+
C264
2

1
C297

2
150U_D2_6.3VM

C321

1
C305

2
2
10U_1206_10V4Z

C273

1
C288

2
2
0.1U_0402_16V4Z

C298

1
C304

2
2
0.1U_0402_16V4Z

C

C257
2
0.1U_0402_16V4Z

+1.2VS
150U_D2_6.3VM
1
1
+ C347
C300

1
+

C296

2
2
150U_D2_6.3VM

0.22U_0603_10V7K

0.01U_0402_16V7K 0.047U_0603_16V7K

1

1

1
C307

C306

2
2
2.2U_0805_16V4Z

1
C323

2
2
0.1U_0402_16V4Z

1
C308

C328

2
2
0.22U_0603_10V7K

+VCCP
0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

1

1

1
+ C254

1
C266

2
2
150U_D2_6.3VM

C265

1
C272

2
2
0.1U_0402_16V4Z

C282

1
C275

2
2
0.1U_0402_16V4Z

C256

1
C315

2
2
0.1U_0402_16V4Z

C276
B

2
0.1U_0402_16V4Z

A

1

H4

C325
10U_1206_10V4Z RG82P4300M_FCBGA593

4

C366

2

2

+2.5V

R277
10K_0402_5%

Compal Electronics, Inc.

R280
@1K_0402_5%

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Odem(3 of 3)
Size
Document Number
Custom

3

2

R ev
0.3

DCL56 LA2231

Date:
5

0.1U_0402_16V4Z
1

+2.5V

2

C313
0.1U_0402_16V4Z

1

Odem
VCCAGP0
VCCAGP1
VCCAGP2
VCCAGP3
VCCAGP4
VCCAGP5
VCCAGP6
VCCAGP7
VCCAGP8
VCCAGP9
VCCAGP10
VCCAGP11
VCCAGP12
VCCAGP13
VCCAGP14
VCCAGP15

1

+1.5VS_ODEM

22U_1206_10V4Z
1
1

150U_D2_6.3VM
1
1

1

Thursday, February 05, 2004

Sheet
1

8

of

45

5

4

RP53
DDR_SDQ0
DDR_SDQ3
DDR_SDQ2
DDR_SDQ7

1
2
3
4

DDR_DQ0
DDR_DQ3
DDR_DQ2
DDR_DQ7

8
7
6
5

DDR_SDQ32
DDR_SDQ37
DDR_SDQ36
DDR_SDQS4

DDR_SDQ6
DDR_SDQ8
DDR_SDQ13
DDR_SDQ9

1
2
3
4

DDR_DQ32
DDR_DQ37
DDR_DQ36
DDR_DQS4

8
7
6
5

+1.25VS_SDREF_R

DDR_DQ0
DDR_DQ3

RP58
DDR_DQ5
DDR_DQ1
DDR_DQS0
DDR_DQ4

8
7
6
5

DDR_SDQ33
DDR_SDQ38
DDR_SDQ34
DDR_SDQ39

1
2
3
4

DDR_SDQ35
DDR_SDQ44
DDR_SDQ40
DDR_SDQ41

1
2
3
4

10_8P4R_1206_5%

DDR_DQ33
DDR_DQ38
DDR_DQ34
DDR_DQ39

8
7
6
5

DDR_DQS0
DDR_DQ2
DDR_DQ7
DDR_DQ8

10_8P4R_1206_5%

D

RP54

10_8P4R_1206_5%
DDR_DQ12
DDR_DQ14
DDR_DQS1
DDR_DQ15

8
7
6
5

DDR_SDQ45
DDR_SDQ43
DDR_SDQ42
DDR_SDQS5

1
2
3
4

7
7

DDR_CLK0
DDR_CLK0#

DDR_DQ45
DDR_DQ43
DDR_DQ42
DDR_DQS5

8
7
6
5

DDR_DQ16
DDR_DQ20
DDR_DQS2
DDR_DQ17

10_8P4R_1206_5%

RP52

DDR_DQ21
DDR_DQ24

RP46

1
2
3
4

DDR_DQ11
DDR_DQ10
DDR_DQ16
DDR_DQ20

8
7
6
5

DDR_SDQ47
DDR_SDQ46
DDR_SDQ52
DDR_SDQ49

1
2
3
4

10_8P4R_1206_5%

DDR_DQ47
DDR_DQ46
DDR_DQ52
DDR_DQ49

8
7
6
5

DDR_DQ25
DDR_DQS3
DDR_DQ28
DDR_DQ29

10_8P4R_1206_5%

RP61
DDR_SDQ17
DDR_SDQS2
DDR_SDQ21
DDR_SDQ22

DDR_DQ9
DDR_DQ12

RP57

1
2
3
4

10_8P4R_1206_5%
DDR_SDQ11
DDR_SDQ10
DDR_SDQ16
DDR_SDQ20

DDR_DQ35
DDR_DQ44
DDR_DQ40
DDR_DQ41

8
7
6
5

10_8P4R_1206_5%

RP62
DDR_SDQ12
DDR_SDQ14
DDR_SDQS1
DDR_SDQ15

DDR_DQ13
DDR_DQS1

RP47
DDR_DQ6
DDR_DQ8
DDR_DQ13
DDR_DQ9

8
7
6
5

RP56

1
2
3
4

DDR_DQ17
DDR_DQS2
DDR_DQ21
DDR_DQ22

8
7
6
5

DDR_SDQ48
DDR_SDQS6
DDR_SDQ53
DDR_SDQ55

1
2
3
4

10_8P4R_1206_5%

DDR_DQ48
DDR_DQS6
DDR_DQ53
DDR_DQ55

8
7
6
5

DDR_F_CB0
DDR_F_CB1
DDR_DQS8
DDR_F_CB2

10_8P4R_1206_5%

C

DDR_F_CB3
RP51
DDR_SDQ18
DDR_SDQ19
DDR_SDQ23
DDR_SDQ24

1
2
3
4

DDR_DQ18
DDR_DQ19
DDR_DQ23
DDR_DQ24

8
7
6
5

RP45
DDR_SDQ50
DDR_SDQ54
DDR_SDQ51
DDR_SDQ63

10_8P4R_1206_5%

1
2
3
4

DDR_DQ50
DDR_DQ54
DDR_DQ51
DDR_DQ63

8
7
6
5

7 DDR_CLK2
7 DDR_CLK2#
7,10

DDR_CKE1

DDR_CKE1

DDR_SMA12
DDR_SMA9

10_8P4R_1206_5%
RP60
DDR_SDQ25
DDR_SDQ28
DDR_SDQ29
DDR_SDQ26

1
2
3
4

DDR_SDQS3
DDR_SDQ27
DDR_SDQ30
DDR_SDQ31

1
2
3
4

DDR_DQ25
DDR_DQ28
DDR_DQ29
DDR_DQ26

8
7
6
5

RP55

10_8P4R_1206_5%
RP50
DDR_DQS3
8
DDR_DQ27
7
DDR_DQ30
6
DDR_DQ31
5

DDR_SDQ58
DDR_SDQ59
DDR_SDQS7
DDR_SDQ57

1
2
3
4

DDR_SDQ56
DDR_SDQ62
DDR_SDQ61
DDR_SDQ60

1
2
3
4

10_8P4R_1206_5%

DDR_DQ58
DDR_DQ59
DDR_DQS7
DDR_DQ57

8
7
6
5

DDR_SMA7
DDR_SMA5
DDR_SMA3
DDR_SMA1

10_8P4R_1206_5%
RP44
DDR_DQ56
8
DDR_DQ62
7
DDR_DQ61
6
DDR_DQ60
5

DDR_SMA10
DDR_SBS0
DDR_SWE#
DDR_SCS#0

7,10 DDR_SCS#0

DDR_DQ32
DDR_DQ37

10_8P4R_1206_5%

DDR_DQS4
DDR_DQ36

RP59
DDR_CB5
DDR_CB4
DDR_CB1
DDR_CB0

1
2
3
4

DDR_F_CB5
DDR_F_CB4
DDR_F_CB1
DDR_F_CB0

8
7
6
5

DDR_DQ33
DDR_DQ44
RP20

10_8P4R_1206_5%
B

7
7

RP49
DDR_CB6
DDR_CB2
DDR_CB7
DDR_CB3

1
2
3
4

DDR_SRAS#
DDR_SBS1

DDR_SRAS#
DDR_SBS1

DDR_F_CB6
DDR_F_CB2
DDR_F_CB7
DDR_F_CB3

8
7
6
5

10_8P4R_1206_5%

4
3

DDR_F_SRAS#
DDR_F_SBS1

DDR_DQ40
DDR_DQS5

DDR_F_SRAS# 10
DDR_F_SBS1 10

DDR_DQ41
DDR_DQ45

10_4P2R_0404_5%
RP13
7

DDR_SBS0

DDR_SBS0
DDR_SMA10

RP19
DDR_SMA0
DDR_SMA2

1
2

1
2

4
3

DDR_F_SBS0
DDR_F_SMA10

DDR_F_SBS0 10
DDR_DQ52
DDR_DQ49

10_4P2R_0404_5%

1
2

4
3

DDR_F_SMA0
DDR_F_SMA2

DDR_DQS6
DDR_DQ48

RP18
DDR_SMA4
DDR_SMA6

10_4P2R_0404_5%

1
2

4
3

DDR_F_SMA4
DDR_F_SMA6

DDR_DQ53
DDR_DQ63

10_4P2R_0404_5%
DDR_DQ58
DDR_DQS7
RP14
RP17
DDR_SMA8
DDR_SMA11

1
2

4
3

DDR_F_SMA8
DDR_F_SMA11

7
7

DDR_SCAS#
DDR_SWE#

DDR_SCAS#
DDR_SWE#

1
2

RP10
DDR_SMA9
DDR_SMA12

RP12
1
2

4
3

DDR_F_SCAS#
DDR_F_SWE#

10_4P2R_0404_5%

10_4P2R_0404_5%
DDR_SMA1
DDR_SMA3

4
3

DDR_F_SMA1
DDR_F_SMA3

1
2

4
3

DDR_DQ59
DDR_DQ57

DDR_F_SCAS# 10
DDR_F_SWE# 10
10,12,13 SMB_DATA
10,12,13 SMB_CLK

+3VS

DDR_F_SMA9
DDR_F_SMA12

1

2

R331
10_0402_5%

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

VREF
VSS
DQ0
DQ1
VDD
DQS0
DQ2
VSS
DQ3
DQ8
VDD
DQ9
DQS1
VSS
DQ10
DQ11
VDD
CK0
CK0#
VSS

VREF
VSS
DQ4
DQ5
VDD
DM0
DQ6
VSS
DQ7
DQ12
VDD
DQ13
DM1
VSS
DQ14
DQ15
VDD
VDD
VSS
VSS

DQ16
DQ17
VDD
DQS2
DQ18
VSS
DQ19
DQ24
VDD
DQ25
DQS3
VSS
DQ26
DQ27
VDD
CB0
CB1
VSS
DQS8
CB2
VDD
CB3
DU
VSS
CK2
CK2#
VDD
CKE1
DU/A13
A12
A9
VSS
A7
A5
A3
A1
VDD
A10/AP
BA0
WE#
S0#
DU
VSS
DQ32
DQ33
VDD
DQS4
DQ34
VSS
DQ35
DQ40
VDD
DQ41
DQS5
VSS
DQ42
DQ43
VDD
VDD
VSS
VSS
DQ48
DQ49
VDD
DQS6
DQ50
VSS
DQ51
DQ56
VDD
DQ57
DQS7
VSS
DQ58
DQ59
VDD
SDA
SCL
VDD_SPD
VDD_ID

DQ20
DQ21
VDD
DM2
DQ22
VSS
DQ23
DQ28
VDD
DQ29
DM3
VSS
DQ30
DQ31
VDD
CB4
CB5
VSS
DM8
CB6
VDD
CB7
DU/RESET#
VSS
VSS
VDD
VDD
CKE0
DU/BA2
A11
A8
VSS
A6
A4
A2
A0
VDD
BA1
RAS#
CAS#
S1#
DU
VSS
DQ36
DQ37
VDD
DM4
DQ38
VSS
DQ39
DQ44
VDD
DQ45
DM5
VSS
DQ46
DQ47
VDD
CK1#
CK1
VSS
DQ52
DQ53
VDD
DM6
DQ54
VSS
DQ55
DQ60
VDD
DQ61
DM7
VSS
DQ62
DQ63
VDD
SA0
SA1
SA2
DU

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

1
DDR_DQ5
DDR_DQ1

2
R363
0_0805_5%

1

2

+SDREF

C431
0.1U_0402_16V4Z

DDR_DQ4
DDR_DQ6
DDR_DQ14
D

DDR_DQ15
DDR_DQ11
DDR_DQ10
DDR_SDQ[0..63]

DDR_SDQ[0..63] 7

DDR_DQ[0..63]

DDR_DQS[0..8]

DDR_DQ22
DDR_DQ18

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DDR_DQ[0..63] 10

DDR_DQS[0..8] 10

DDR_SDQS[0..8]

DDR_SDQS[0..8] 7

DDR_DQ19
DDR_CB[0..7]
DDR_DQ23
DDR_DQ26

DDR_CB[0..7] 7

DDR_F_CB[0..7]

DDR_F_CB[0..7] 10

DDR_DQ27
DDR_F_SMA[0..12]

DDR_F_SMA[0..12] 10

DDR_SMA[0..12]

DDR_DQ30
DDR_DQ31

DDR_SMA[0..12] 7

DDR_F_CB4
DDR_F_CB5
DDR_F_CB6
C

DDR_F_CB7

DDR_CKE0

DDR_CKE0 7,10

DDR_SMA11
DDR_SMA8
DDR_SMA6
DDR_SMA4
DDR_SMA2
DDR_SMA0
DDR_SBS1
DDR_SRAS#
DDR_SCAS#
DDR_SCS#1

DDR_SCS#1 7,10

DDR_DQ38
DDR_DQ34
DDR_DQ39
DDR_DQ35
DDR_DQ43
DDR_DQ42
B

DDR_DQ47
DDR_DQ46
DDR_CLK1# 7
DDR_CLK1 7
DDR_DQ55
DDR_DQ50
DDR_DQ54
DDR_DQ51
DDR_DQ56
DDR_DQ62
DDR_DQ61
DDR_DQ60

AMP1376409_REVERSE

10_4P2R_0404_5%

10_4P2R_0404_5%

DIMM0

A

DDR_SDQS8

1

+2.5V

JP25

10_8P4R_1206_5%

RP63
1
2
3
4

2

+2.5V

1
2
3
4

10_8P4R_1206_5%
DDR_SDQ5
DDR_SDQ1
DDR_SDQS0
DDR_SDQ4

3

RP48

DDR_DQS8

A

RP11
DDR_SMA5
DDR_SMA7

1
2

4
3

DDR_F_SMA5
DDR_F_SMA7

Compal Electronics, Inc.

10_4P2R_0404_5%

Title

DDR-SODIMM SLOT0
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

Size

Document Number

Rev
0.3

DCL56 LA2231
Date:

Sheet

Thursday, February 05, 2004
1

9

of

45

A

B

C

D

E

+2.5V
+1.25VS

+2.5V

+1.25VS
+1.25VS_SDREF_R
JP26

RP103
DDR_DQ0
DDR_DQ3

1
2

RP88
4
3

4
3

56_4P2R_0404_5%
RP99
DDR_DQ7
DDR_DQ8

1
2

4
3

1
2

4
3

1
2

DDR_DQ62
DDR_DQS7

56_4P2R_0404_5%

56_4P2R_0404_5%

RP86

RP65

4
3

56_4P2R_0404_5%

RP66
DDR_DQ25
DDR_DQ28

1
2

DDR_DQ31
DDR_DQ29

DDR_DQS0
DDR_DQ2

4
3

56_4P2R_0404_5%

DDR_DQ0
DDR_DQ3

1
2

DDR_DQ59
DDR_DQ61

DDR_DQ7
DDR_DQ8

56_4P2R_0404_5%

1

RP102
DDR_DQ5
DDR_DQ1

1
2

RP81
4
3

4
3

56_4P2R_0404_5%

4
3

RP100
1
2

4
3

4
3

4
3

4
3

4
3

4
3

56_4P2R_0404_5%

56_4P2R_0404_5%

4
3

4
3

4
3

4
3

56_4P2R_0404_5%

56_4P2R_0404_5%
RP84
4
3

RP89
4
3

56_4P2R_0404_5%

1
2

DDR_F_CB6
DDR_F_CB2

56_4P2R_0404_5%

DDR_DQ42
DDR_DQ41

4
3

1
2

DDR_F_SMA9
DDR_F_SMA12

DDR_F_CB3

7 DDR_CLK5
7 DDR_CLK5#
7

DDR_CKE3

DDR_DQS4
DDR_SCS#2

4
3

1
2

DDR_DQ47
DDR_DQ46

DDR_DQ52
DDR_DQ49

DDR_DQ48
DDR_DQ55

DDR_DQ50
DDR_DQS6

DDR_F_SMA7
DDR_F_SMA5
DDR_F_SMA3
DDR_F_SMA1

DDR_CKE2
DDR_F_SMA11

56_4P2R_0404_5%

4
3

1
2

DDR_F_SMA6
DDR_F_SMA7

9 DDR_F_SWE#
7
DDR_SCS#2

DDR_DQ32
DDR_DQ37
1
2

DDR_F_SMA5
DDR_F_SMA1

DDR_DQS4
DDR_DQ36

56_4P2R_0404_5%
DDR_DQ33
DDR_DQ44

4
3

1
2

DDR_F_SMA8
DDR_F_SMA3

DDR_DQ40
DDR_DQS5

56_4P2R_0404_5%
DDR_DQ41
DDR_DQ45

4
3

1
2

DDR_F_SBS1
DDR_F_SMA2

56_4P2R_0404_5%

RP69

RP29
DDR_DQ53
DDR_DQ54

DDR_DQ52
DDR_DQ49

4
3

1
2

DDR_SCS#3
DDR_F_SRAS#

56_4P2R_0404_5%

56_4P2R_0404_5%

RP68

RP30
1
2

DDR_DQ51
DDR_DQ63

DDR_DQS6
DDR_DQ48
DDR_DQ53
DDR_DQ63

4
3

56_4P2R_0404_5%

1
2

DDR_F_SBS0
DDR_DQ32

DDR_DQ58
DDR_DQS7

56_4P2R_0404_5%

RP21

DDR_DQ59
DDR_DQ57

RP33
1
2

DDR_CKE0
DDR_CKE1

4
3

56_4P2R_0404_5%

1
2

DDR_DQ36
DDR_SCS#0

56_4P2R_0404_5%

RP76

9,12,13 SMB_DATA
9,12,13 SMB_CLK
+3VS

RP23
1
2

DDR_DQS5
DDR_DQ45

4
3

56_4P2R_0404_5%

1
2

DDR_CKE3
DDR_DQS8

7,9
7,9

DDR_CKE1
DDR_SCS#0

DDR_CKE1
DDR_SCS#0

VREF
VSS
DQ4
DQ5
VDD
DM0
DQ6
VSS
DQ7
DQ12
VDD
DQ13
DM1
VSS
DQ14
DQ15
VDD
VDD
VSS
VSS

DQ16
DQ17
VDD
DQS2
DQ18
VSS
DQ19
DQ24
VDD
DQ25
DQS3
VSS
DQ26
DQ27
VDD
CB0
CB1
VSS
DQS8
CB2
VDD
CB3
DU
VSS
CK2
CK2#
VDD
CKE1
DU/A13
A12
A9
VSS
A7
A5
A3
A1
VDD
A10/AP
BA0
WE#
S0#
DU
VSS
DQ32
DQ33
VDD
DQS4
DQ34
VSS
DQ35
DQ40
VDD
DQ41
DQS5
VSS
DQ42
DQ43
VDD
VDD
VSS
VSS
DQ48
DQ49
VDD
DQS6
DQ50
VSS
DQ51
DQ56
VDD
DQ57
DQS7
VSS
DQ58
DQ59
VDD
SDA
SCL
VDD_SPD
VDD_ID

DQ20
DQ21
VDD
DM2
DQ22
VSS
DQ23
DQ28
VDD
DQ29
DM3
VSS
DQ30
DQ31
VDD
CB4
CB5
VSS
DM8
CB6
VDD
CB7
DU/RESET#
VSS
VSS
VDD
VDD
CKE0
DU/BA2
A11
A8
VSS
A6
A4
A2
A0
VDD
BA1
RAS#
CAS#
S1#
DU
VSS
DQ36
DQ37
VDD
DM4
DQ38
VSS
DQ39
DQ44
VDD
DQ45
DM5
VSS
DQ46
DQ47
VDD
CK1#
CK1
VSS
DQ52
DQ53
VDD
DM6
DQ54
VSS
DQ55
DQ60
VDD
DQ61
DM7
VSS
DQ62
DQ63
VDD
SA0
SA1
SA2
DU

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

2

C468
0.1U_0402_16V4Z

DDR_DQ4
DDR_DQ6
DDR_DQ14
1

DDR_DQ15
DDR_F_SMA[0..12]
DDR_DQ11
DDR_DQ10

DDR_F_SMA[0..12] 9

DDR_DQ[0..63]

DDR_DQ[0..63] 9

DDR_DQS[0..8]
DDR_DQS[0..8] 9
DDR_F_CB[0..7]

DDR_F_CB[0..7] 9

DDR_DQ22
DDR_DQ18
DDR_DQ19
DDR_DQ23
DDR_DQ26
DDR_DQ27
DDR_DQ30
DDR_DQ31
DDR_F_CB4
DDR_F_CB5
DDR_F_CB6
2

DDR_F_CB7

DDR_CKE2

DDR_CKE2 7

DDR_F_SMA11
DDR_F_SMA8
DDR_F_SMA6
DDR_F_SMA4
DDR_F_SMA2
DDR_F_SMA0
DDR_F_SBS1
DDR_F_SRAS#
DDR_F_SCAS#
DDR_SCS#3

DDR_F_SRAS# 9
DDR_F_SCAS# 9
DDR_SCS#3 7

DDR_DQ38
DDR_DQ34
DDR_DQ39
DDR_DQ35
DDR_DQ43
DDR_DQ42
3

DDR_DQ47
DDR_DQ46
DDR_CLK4# 7
DDR_CLK4 7
DDR_DQ55
DDR_DQ50
DDR_DQ54
DDR_DQ51
DDR_DQ56
DDR_DQ62
DDR_DQ61
DDR_DQ60
+3VS

4

DIMM1

4
3

1
2

DDR_F_SWE#

56_4P2R_0404_5%
RP31
DDR_F_SMA10
4
1
DDR_SCS#1
3
2

Compal Electronics, Inc.
Title

56_4P2R_0404_5%

DDR-SODIMM SLOT1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

1

DDR_DQ5
DDR_DQ1

AMP1376408_STANDARD

RP34
DDR_F_SBS0 9
DDR_F_SBS1 9
DDR_SCS#0 7,9
DDR_SCS#1 7,9
DDR_CKE0 7,9

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

VREF
VSS
DQ0
DQ1
VDD
DQS0
DQ2
VSS
DQ3
DQ8
VDD
DQ9
DQS1
VSS
DQ10
DQ11
VDD
CK0
CK0#
VSS

56_4P2R_0404_5%

4

DDR_F_SBS0
DDR_F_SBS1
DDR_SCS#0
DDR_SCS#1
DDR_CKE0

DDR_F_SMA10
DDR_F_SBS0
DDR_F_SWE#
DDR_SCS#2

56_4P2R_0404_5%

4
3

56_4P2R_0404_5%

1
2

DDR_CKE3
DDR_F_SMA12
DDR_F_SMA9

56_4P2R_0404_5%

RP28
1
2

4
3

DDR_DQS8
DDR_F_CB2

56_4P2R_0404_5%

RP26
1
2

4
3

DDR_F_CB0
DDR_F_CB1

RP27
1
2

4
3

DDR_DQ28
DDR_DQ29

DDR_F_CB7
DDR_F_CB3

RP25
1
2

4
3

56_4P2R_0404_5%

DDR_DQ25
DDR_DQS3

RP22
1
2

4
3

1
2

4
3

RP70
4
3

DDR_DQ26 1
DDR_DQS3 2

DDR_DQ43
DDR_DQ40

56_4P2R_0404_5%

RP93

DDR_DQ21
DDR_DQ24

DDR_F_CB5
DDR_F_CB1

RP24
1
2

4
3

DDR_DQS2
DDR_DQ17

RP83
1
2

RP71
4
3

DDR_DQ30
DDR_DQ27

56_4P2R_0404_5%

56_4P2R_0404_5%

RP94

1
2

4
3

RP72

56_4P2R_0404_5%

DDR_F_CB4 1
DDR_F_CB0 2

DDR_DQ33
DDR_DQ39

56_4P2R_0404_5%

RP91

DDR_DQ21 1
DDR_DQ22 2

4
3

RP73

56_4P2R_0404_5%

3

DDR_DQ38
DDR_DQ34

56_4P2R_0404_5%

RP90

DDR_DQ16
DDR_DQ20

RP82
1
2

4
3

1
2

7 DDR_CLK3
7 DDR_CLK3#

56_4P2R_0404_5%

RP32
4
3

DDR_DQS2 1
DDR_DQ17 2

4
3

56_4P2R_0404_5%

RP92

DDR_DQ18 1
DDR_DQ19 2

DDR_F_SMA0
DDR_F_SCAS#

DDR_DQ9
DDR_DQ12

RP85
1
2

4
3

56_4P2R_0404_5%

DDR_DQ23 1
DDR_DQ24 2

1
2

RP74
4
3

DDR_DQ16 1
DDR_DQ20 2

RP87

56_4P2R_0404_5%

RP96
DDR_DQ12 1
DDR_DQ13 2

56_4P2R_0404_5%

RP75

56_4P2R_0404_5%

DDR_DQ57
DDR_DQ60

RP80

56_4P2R_0404_5%

RP95
DDR_DQ15 1
DDR_DQ14 2

1
2

56_4P2R_0404_5%

RP78

56_4P2R_0404_5%
2

4
3

56_4P2R_0404_5%

RP98
DDR_DQ11 1
DDR_DQ10 2

DDR_DQ44
DDR_DQ35

RP79
4
3

DDR_DQ56
DDR_DQ58

56_4P2R_0404_5%

56_4P2R_0404_5%

RP97

1
2

RP64
1
2

4
3

56_4P2R_0404_5%
DDR_DQ9 1
DDR_DQS1 2

4
3

RP77
4
3

56_4P2R_0404_5%
DDR_DQ2
DDR_DQ6

DDR_F_SMA4
DDR_DQ37

56_4P2R_0404_5%

RP101
DDR_DQS0 1
DDR_DQ4 2

DDR_DQ13
DDR_DQS1

RP67
1
2

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

B

C

D

Size

Document Number

Rev
0.3

DCL56 LA2231
Date:

Sheet

Thursday, February 05, 2004
E

10

of

45

A

B

C

D

E

Layout note :
Distribute as close as possible
to DDR-SODIMM.

+2.5V

1
1

2

1
C456
0.1U_0402_16V4Z

2

1
C142
0.1U_0402_16V4Z

2

1
C457
0.1U_0402_16V4Z

2

1
C459
0.1U_0402_16V4Z

2

1
C153
0.1U_0402_16V4Z

2

1
C136
0.1U_0402_16V4Z

2

+2.5V

1

2

2

1
C461
0.1U_0402_16V4Z

2

1
C470
0.1U_0402_16V4Z

2

1
C141
0.1U_0402_16V4Z

2

1

C455
0.1U_0402_16V4Z

+2.5V

1
C463
0.1U_0402_16V4Z

1
C465
0.1U_0402_16V4Z

2

1
C462
0.1U_0402_16V4Z

2

1
C460
0.1U_0402_16V4Z

2

1
C154
0.1U_0402_16V4Z

2

1
C458
0.1U_0402_16V4Z

2

1
C157
0.1U_0402_16V4Z

1

+

+
2

C137
150U_D2_6.3VM

2

C138
150U_D2_6.3VM

Layout note :
Place one cap close to every 2 pull up resistors termination to
+1.25V

2

2

+1.25VS

1

2

1
C526
0.1U_0402_16V4Z

2

1
C525
0.1U_0402_16V4Z

2

1
C524
0.1U_0402_16V4Z

2

1
C522
0.1U_0402_16V4Z

2

1
C521
0.1U_0402_16V4Z

2

1
C519
0.1U_0402_16V4Z

2

1
C523
0.1U_0402_16V4Z

2

1
C520
0.1U_0402_16V4Z

2

1
C518
0.1U_0402_16V4Z

2

C517
0.1U_0402_16V4Z

+1.25VS

1

2

1
C516
0.1U_0402_16V4Z

2

1
C514
0.1U_0402_16V4Z

2

1
C515
0.1U_0402_16V4Z

2

1
C513
0.1U_0402_16V4Z

2

1
C512
0.1U_0402_16V4Z

2

1
C179
0.1U_0402_16V4Z

2

1
C173
0.1U_0402_16V4Z

2

1
C511
0.1U_0402_16V4Z

2

1
C180
0.1U_0402_16V4Z

2

C510
0.1U_0402_16V4Z

+1.25VS

1

3

2

1
C509
0.1U_0402_16V4Z

2

1
C508
0.1U_0402_16V4Z

2

1
C507
0.1U_0402_16V4Z

2

1
C504
0.1U_0402_16V4Z

2

1
C506
0.1U_0402_16V4Z

2

1
C503
0.1U_0402_16V4Z

2

1
C502
0.1U_0402_16V4Z

2

1
C501
0.1U_0402_16V4Z

2

1
C500
0.1U_0402_16V4Z

2

C499
0.1U_0402_16V4Z
3

+1.25VS

1

2

1
C498
0.1U_0402_16V4Z

2

1
C497
0.1U_0402_16V4Z

2

1
C492
0.1U_0402_16V4Z

2

1
C490
0.1U_0402_16V4Z

2

1
C182
0.1U_0402_16V4Z

2

1
C493
0.1U_0402_16V4Z

2

1
C186
0.1U_0402_16V4Z

2

1
C491
0.1U_0402_16V4Z

2

1
C177
0.1U_0402_16V4Z

2

C174
0.1U_0402_16V4Z

+1.25VS

1

2

1
C505
0.1U_0402_16V4Z

2

1
C494
0.1U_0402_16V4Z

2

1
C178
0.1U_0402_16V4Z

2

1
C176
0.1U_0402_16V4Z

2

1
C495
0.1U_0402_16V4Z

2

1
C496
0.1U_0402_16V4Z

2

1
C175
0.1U_0402_16V4Z

2

1
C184
0.1U_0402_16V4Z

2

1
C183
0.1U_0402_16V4Z

2

C185
0.1U_0402_16V4Z

+1.25VS

4

1

2

1
C487
0.1U_0402_16V4Z

2

1
C181
0.1U_0402_16V4Z

2

4

1
C489
0.1U_0402_16V4Z

2

C488
0.1U_0402_16V4Z

Compal Electronics, Inc.
Title

DDR SODIMM Decoupling
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

B

C

D

Size

Document Number

Rev
0.3

DCL56 LA2231
Date:

Sheet

Thursday, February 05, 2004
E

11

of

45

A

B

C

D

E

F

G

H

Clock Generator
SEL2

SEL1

0

0

0

0

0

1

0

1

SEL0

CPUCLKC[0..2]

CPUCLKT[0..2]

0

166.67

166.67

1

100.00

100.00

0

200.00

200.00

1

133.33

133.33

+3VS

+3V_CLK
L10
CHB2012U121_0805
Width=40 mils
1
2
L9
CHB2012U121_0805
1
1
2
2

1
C102
10U_1206_10V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

1

1

C106

1
C108

C110

2
2
0.1U_0402_16V4Z

1
C114

C111

2
2
0.1U_0402_16V4Z

1
C107

2
2
0.1U_0402_16V4Z

C104

C116

2
2
0.1U_0402_16V4Z
1

+3VS

1

1

1

XTALIN

2

2

XTAL_IN

1

+3VS

2

2

1

14,28 SLP_S1#
14
STP_PCI#
14,39 STP_CPU#

2

1
2
R131
10K_0402_5%

1

14,39 VGATE
+VCCP

2

S

Q17
2N7002_SOT23
+3VS

1

2
R113
10K_0402_5%

24 SDCLK_48M

25
34
53

PWR_DWN#
PCI_STOP#
CPU_STOP#

28

VTT_PWRGD#

43

VSSA

27

CPUCLKT2

45

C119
10U_1206_10V4Z

0.1U_0402_16V4Z
CLK_BCLK
1

CPU_CLKC2

44

CLK_BCLK#

1

CPUCLKT1

49

CLK_MCH

1

CPUCLKC1

48

CLK_MCH#

1

CPUCLKT0

52

CLK_ITP

1

MULT0

33
35

3V66_0
3V66_1/VCH_CLK

R117
2 475_0402_1%

42

IREF

1

R125
2 33_0402_5%

39

48MHZ_USB

1

R124
2 33_0402_5%

38

48MHZ_DOT

R92
2 33_0402_5%
2
R91
33_0402_5%

56

3

C100

1
1

R110
33_0402_5%
2

CLK_CPU_BCLK# 4

2
R103
33_0402_5%

CLK_MCH_BCLK 6
R101
49.9_0402_1%
1
2
1
2
R105
49.9_0402_1%

R104
33_0402_5%
2

2

CLK_MCH_BCLK# 6

2

CLK_CPU_ITP 4
R98
49.9_0402_1%
1
2
1
2
R100
49.9_0402_1%

R99
33_0402_5%
2

51

3V66_5

24

3V66_4
3V66_3
3V66_2

23
22
21

AGP_66M
MCH_66M
ICH_66M

1
1
1

2 R130 33_0402_5%
2 R128 33_0402_5%
2 R127 33_0402_5%

CLK_AGP_66M 17
CLK_MCH_66M 6
CLK_ICH_66M 13

7
6
5

PCI_ICH

1

2 R102 33_0402_5%

CLK_PCI_ICH 13

18
17
16
13
12
11
10

PCI_1394
PCI_SD
PCI_LAN
PCI_PCM
PCI_MINI
PCI_SIO
PCI_LPC

1
1
1
1
1
1
1

2
2
2
2
2
2
2

PCICLK6
PCICLK5
PCICLK4
PCICLK3
PCICLK2
PCICLK1
PCICLK0

REF

CLK_ITP#

CLK_CPU_BCLK 4
R107
49.9_0402_1%
2
2
R111
49.9_0402_1%

CPUCLKC0

PCICLK_F2
PCICLK_F1
PCICLK_F0

4
9
15
20
31
36
41
47

1

2
R108
33_0402_5%

R97
33_0402_5%

SDATA
SCLK

1

1
1

14 CLK_ICH_14M
26 CLK_14M_SIO

C109

SEL0
SEL1
SEL2

29
30

9,10,13 SMB_DATA
9,10,13 SMB_CLK

14 CLK_ICH_48M

1

XTAL_OUT

2

D

2
G

R129
0_0402_5%
1
2
R428
@56_0402_5%

3
54
55
40

+3VS

1
C118

GND_REF
GND_PCI_0
GND_PCI_1
GND_3V66_0
GND_3V66_1
GND_48MHZ
GND_IREF
GND_CPU

2

1

1

+3VS

3

R432
10K_0402_5%

2 R118
1K_0402_5%

1

+3VS

1

2

XTALOUT
2
C103
@10P_0402_50V8K

L11
CHB2012U121_0805
1
2

+3V_VDD

26

Y1
14.31818MHZ_20P_6X1430004201
R95
1K_0402_5%

R93
1K_0402_5%
1
2
1
2
R96
@1K_0402_5%

VDDA

2

R94
@1K_0402_5%

VDD_REF
VDD_PCI_0
VDD_PCI_1
VDD_3V66_0
VDD_3V66_1
VDD_48MHZ
VDD_CPU_0
VDD_CPU_1

U20
C101
@10P_0402_50V8K

1
8
14
19
32
37
46
50

1

1

CLK_CPU_ITP# 4

R123
R122
R116
R115
R112
R109
R106

33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%

CLK_PCI_1394 22
CLK_PCI_SD 24
CLK_PCI_LAN 21
CLK_PCI_PCM 19
CLK_PCI_MINI 23
CLK_PCI_SIO 26
CLK_PCI_LPC 28
1

C113
@10P_0402_50V8K 2

ICS950810CG_TSSOP56

2
2
@10P_0402_50V8K
@10P_0402_50V8K

1

3

1

2

2

C117
@10P_0402_50V8K

C115
@10P_0402_50V8K

4

4

Compal Electronics, Inc.
Title

Clock Generator
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

B

C

D

E

F

Size
B

Document Number

Rev
0.3

DCL56 LA2231

Date:

Thursday, February 05, 2004
G

Sheet

12
H

of

45

A

B

C

D

U18A

2

R324
10_0402_5%

1

2

C413
18P_0402_50V8K

1

CLK_ICH_66M

2

R330
@22_0402_5%

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

J2
K4
M4
N4

C/BE#0
C/BE#1
C/BE#2
C/BE#3

PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3
PCI_REQ#4

B1
A2
B3
C7
B6

REQ#0
REQ#1
REQ#2
REQ#3
REQ#4

PCI_GNT#0
PCI_GNT#1
PCI_GNT#2
PCI_GNT#3
PCI_GNT#4

C1
E6
A7
B7
D6

GNT#0
GNT#1
GNT#2
GNT#3
GNT#4

1
2

2

C423
@10P_0402_50V8K

19,21,22,23
19,21,22,23
19,21,22,23
19,21,22,23
22
23
19
21
23

PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3
PCI_REQ#4

22
23
19
21
23

PCI_GNT#0
PCI_GNT#1
PCI_GNT#2
PCI_GNT#3
PCI_GNT#4
12

3

+3VS

10
9
8
7
6

CLK_PCI_ICH

PCI_FRAME#
PCI_DEVSEL#
PCI _IRDY#

PCI_PIRQA#
PCI_PIRQB#
PCI_REQ#4
PCI_REQB#

PCI_PERR#
PCI_LOCK#
PCIRST#
PCI_SERR#
PCI_STOP#
PCI_TRDY#

7,19,20,21,22,23,24,26 PCIRST#
19,21,23 PCI_SERR#
19,21,22,23 PCI_STOP#
19,21,22,23 PCI_TRDY#

RP8
1
2
3
4
5

CLK_PCI_ICH

19,21,22,23 PCI_FRAME#
19,21,22,23 PCI_DEVSEL#
19,21,22,23 PCI_IRDY#
19,21,22,23 PCI_PAR
19,21,22,23 PCI_PERR#

PCI Pullups

PCI_PERR#
PCI_REQA#
PCI_STOP#
PCI_SERR#

PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3

PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3

+3VS

16
16

8.2K_10P8R_1206_5%

PCI_REQA#
PCI_REQB#
PIDERST#
SIDERST#

PIDERST#
SIDERST#

P5
F1
M3
L5
G1
L4
M2
W2
U5
K5
F3
F2
B5
A6
E8
C5

INTRUDER#
SMLINK0
SMLINK1
SMB_CLK
SMB_DATA
SMB_ALERT#/GPI11

SM I/F

CPU I/F

PCICLK
FRAME#
DEVSEL#
IRDY#
PAR
PERR#
LOCK#
PME#
PCIRST#
SERR#
STOP#
TRDY#
REQA#/GPI0
REQB#/GPI1/REQ5#
GNTA#/GPO16
GNTB#/GPO17/GNT5#

HUB I/F

1
2
3
4
5

+3VS

10
9
8
7
6

+3VS
PCI_PIRQC#
PCI_PIRQD#
SIRQ
PCI_LOCK#

LAN

8.2K_10P8R_1206_5%

HI0
HI1
HI2
HI3
HI4
HI5
HI6
HI7
HI8
HI9
HI10
HI11

Y22
AB23
U23
AA21
W21
V22
AB22
V21
Y23
U22
U21
W23
V23

L19
L20
M19
M21
P19
R19
T20
R20
P23
L22
N22
K21

CLK66

T21

HI_STB
HI_STB#

P21
N20

HICOMP
HUB_VREF
HUB_VSWING

R23
M23
R22

APICCLK
APICD0
APICD1
PIRQA#
PIRQB#
PIRQC#
PIRQD#
PIRQE#/GPI2
PIRQF#/GPI3
PIRQG#/GPI4
PIRQH#/GPI5
IRQ14
IRQ15
SERIRQ

J19
H19
K20
D5
C2
B4
A3
C8
D7
C3
C4
AC13
AA19
J22

EE_CS
EE_IN
EE_OUT
EE_SHCLK

D10
D11
A8
C12

LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
I/F LAN_TXD1
LAN_TXD2
LAN_CLK
LAN_RSTSYNC
LAN_RST#

A10
A9
A11
B10
C10
A12
C11
B11
Y5

EEPROM I/F

RP5
PCI _IRDY#
PCI_TRDY#
PCI_DEVSEL#
PCI_FRAME#

W6
AC3
AB1
AC4
AB4
AA5

INTRUDER#
SMLINK0
SMLINK1
SMB_CLK
SMB_DATA
ACIN

1

SMB_CLK 9,10,12
SMB_DATA 9,10,12
ACIN
28,34,35
+1.8VS

A20GATE
A20M#
DPSLP#
FERR#
IGNNE#
INIT#
INTR
NMI
CPU_PWRGOOD
RCIN#
SLP#
SMI#
STPCLK#

Interrupt I/F

1

CLK_PCI_ICH

ICH4

H5
J3
H3
K1
G5
J4
H4
J5
K2
G2
L1
G4
L2
H2
L3
F5
F4
N1
E5
N2
E3
N3
E4
M5
E2
P1
E1
P2
D3
R1
D2
P4

PCI I/F

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

PCI_AD[0..31]

19,21,22,23 PCI_AD[0..31]
1

R351
56_0402_5%

HUB_PD0
HUB_PD1
HUB_PD2
HUB_PD3
HUB_PD4
HUB_PD5
HUB_PD6
HUB_PD7
HUB_PD8
HUB_PD9
HUB_PD10
1

GATEA20 28
H_A20M# 4
H_DPSLP# 4,7
H_FERR# 4

H_FERR#

HUB_VREF

H_IGNNE# 4
H_INIT# 4
H_INTR
4
H_NMI
4
H_PWRGD 4
RC#
28
H_CPUSLP# 4
H_SMI#
4
H_STPCLK# 4

HUB_PD[0..10]

R81
150_0402_1%
HUB_VREF

C95
C97
C96
0.01U_0402_16V7K0.01U_0402_16V7K0.1U_0402_16V4Z
R82
150_0402_1%

HUB_PD[0..10] 6

Note:
R272,R273 placement
center of MCH and
ICH4M
2

R319
2 @56_0402_5%

CLK_ICH_66M

+3VS

CLK_ICH_66M 12
HUB_PSTRB 6
HUB_PSTRB# 6

HUB_RCOMP_ICH

SMB_CLK

1

SMB_DATA

1

SIDERST#

1

IRQ14

1

IRQ15

1

PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#

1
2
3
4

HUB_VREF

APICCLK
APICD0
APICD1
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#
IRQ14
IRQ15
SIRQ

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

IRQ14
IRQ15
SIRQ

17
22
19,23
21,23

16
16
19,24,26,28

2
R368
10K_0402_5%
2
R361
10K_0402_5%
R304
@8.2K_0402_5%
2
R370
8.2K_0402_5%
2
R350
8.2K_0402_5%
RP7
8
7
6
5
100K_8P4R_1206_5%

+RTCVCC
1

2
R298
@1K_0402_5%

+VCCP

1

H_FERR#

1

SMLINK0

1

SMLINK1

1

2
R345
56_0402_5%
HUB_RCOMP_ICH 1
2
R327
36.5_0402_1%

2
R347
10K_0402_5%

+3VALW

+3VS
RP6
PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3

R362
4.7K_0402_5%
2
R354
4.7K_0402_5%

+3V POWER

I

O

8

2
R318
0_0402_5%
4

1

1
9

OE#

PCIRST#

R314
10K_0402_5%

B_PCIRST# 16,17,28

10

PIDERST#
2
R308
@1K_0402_5%

R320
10K_0402_5%

2

2
U41C
SN74LVC125APWLE_TSSOP14

4

1

2

APICCLK
APICD0
APICD1

8.2K_8P4R_1206_5%

1

8
7
6
5

3

INTRUDER# 1
2
R343
100K_0402_5%

FW82801DBM_BGA421

1
2
3
4

+3VS

2

Compal Electronics, Inc.
Title

ICH4-M
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

B

C

Size

Document Number

Rev
0.3

DCL56 LA2231
Date:

Thursday, February 05, 2004
D

Sheet

13

of

45

A

B

C

D

+3VALW

5

D22

28

2

R332
0_0402_5%
IAC_BITCLK

IAC_SDATAI0
IAC_SDATAI1
ICH_AC_SDOUT
IC H_AC_SYNC

1

V_GATE

2
R338
1K_0402_5%

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_DRQ#0
LPC_DRQ#1
LPC_FRAME#

24,26,28 LPC_AD0
24,26,28 LPC_AD1
24,26,28 LPC_AD2
24,26,28 LPC_AD3
28 LPC_DRQ#0
26 LPC_DRQ#1
24,26,28 LPC_FRAME#

+3VS

SSMUXSEL
CPUPERF#
VGATE/VRMPWRGD

B8
C13
D13
A13
B13
D9
C9

AC_BITCLK
AC_RST#
AC_SDATAIN0
AC_SDATAIN1
AC_SDATAIN2
AC_SDATAOUT
AC_SYNC

T2
R4
T4
U2
U3
U4
T5

25
25
34
34
25
25
27
27
34
34
25
25

CPUPERF#

2
R346
8.2K_0402_5%

+3VS

2

PM_CLKRUN#

1

R369
10K_0402_5%

+3VS

1
3

USBP0+
USBP0USBP1+
USBP1USBP2+
USBP2USBP3+
USBP3USBP4+
USBP4USBP5+
USBP5-

IST

25 OVCUR#0
OVCUR#1
25 OVCUR#2

SPKR
2
R313
@1K_0402_5%

+3VS

OVCUR#1

LPC I/F

OVCUR#3
OVCUR#4

OVCUR#4
25 OVCUR#5

+3VS

ICH_AC_SDOUT
1
R306
@10K_0402_5%

USB_RBIAS

R300
22.6_0402_1%
1

AGP_BUSY#

R328
10K_0402_5%

1

2

+3VALW

USB_RBIAS
USB_RBIAS#

16 SIDEPWR
34 MBAY_DISABLE

10
9
8
7
6

+3VALW

GPIO32
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37
GPIO38
GPIO39
GPIO40
GPIO41
GPIO42
GPIO43

5

PDDREQ
PDDACK#
PDIOR#
PDIOW#
PIORDY

AA11
Y12
AC12
W12
AB12

PDDREQ
PDDACK#
PDIOR#
PDIOW#
PDIORDY

PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15

AB11
AC11
Y10
AA10
AA7
AB8
Y8
AA8
AB9
Y9
AC9
W9
AB10
W10
W11
Y11

PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15

SDA0
SDA1
SDA2
SDCS1#
SDCS3#

AA20
AC20
AC21
AB21
AC22

SDA0
SDA1
SDA2
SDCS1#
SDCS3#

SDDREQ
SDDACK#
SDIOR#
SDIOW#
SIORDY

AB18
AB19
Y18
AA18
AC19

SDDREQ
SDDACK#
SDIOR#
SDIOW#
SDIORDY

SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15

W17
AB17
W16
AC16
W15
AB15
W14
AA14
Y14
AC15
AA15
Y15
AB16
Y16
AA17
Y17

SDD0
SDD1
SDD2
SDD3
SDD4
SDD5
SDD6
SDD7
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15

USB I/F

RTCRST#

W7

RTC_RST#

Y6

VBIAS

AC7

RTCX1

RTCX2

AC6

RTCX2

SPKR

H23

MISC THRMTRIP#

W20

GPIO

EC_LID_OUT#
LLBATT#
SCI#

J23
F19

VBIAS

16
16
16
16
16

PDDREQ
PDDACK#
PDIOR#
PDIOW#
PDIORDY

16
16
16
16
16

SPKR

PDD[0..15]

1

RSMRST#

R352
10K_0402_5%
IAC_BITCLK
2
1
R305
@10K_0402_5%
RTCCLK
2
1
R353
@10K_0402_5%

R372
@330_0402_5%
1
2
2
B
1
2

+VCCP
SDA0
SDA1
SDA2
SDCS1#
SDCS3#

16
16
16
16
16

1

27,31 IAC_SDATAO

1

C383
@22P_0402_50V8J

1

1

2

2

SDDREQ
SDDACK#
SDIOR#
SDIOW#
SDIORDY

16
16
16
16
16

2

R303
33_0402_5%
C386
@22P_0402_50V8J

P

PDIORDY
2
R355
4.7K_0402_5%

+3VS

1

SDIORDY
2
R367
4.7K_0402_5%

E

Q36
@2SC2411K_SOT23

2

1 THERTRIP#
R341
56_0402_5%

THERMTRIP#

4 THERMTRIP#

CLK_ICH_14M
R317
@22_0402_5%

2

2

1

1

J1
JOPEN

2
R348
0_0402_5%

2

C418
0.1U_0402_16V4Z

CLK_ICH_48M

2R_VBIAS1
2
R136
1K_0402_5%
C135
0.047U_0603_16V7K

R310
@22_0402_5%

1

1
2
R134
10M_0603_5%
SPKR

1

32

THERTRIP#

OUT

C402
@10P_0402_50V8K

1
2
R334
180K_0402_5%

1
CLK_ICH_14M 12
CLK_ICH_48M 12

3

1

+RTCVCC

4

R301
33_0402_5%
2

1

C

C429
@1U_0805_10V6F
1
2
R342
56_0402_5%

+VCCP

1
2
R143
10M_0603_5%
X2

2

2

1
R142
@22M_0603_5%

C394
@10P_0402_50V8K

R137
@2.4M_0603_1%

FW82801DBM_BGA421

27,31 IAC_SYNC

+3VS
SDD[0..15] 16

2

32.768KHZ_12.5P_1TJS125DJ2A073

2

SYSRST#

PDD[0..15] 16

SDD[0..15]

10K_10P8R_1206_5%

4

4

O

SN74AHC1G08HDCK_TSSOP5

MAINPWON 35,37,38

CLK_ICH_14M
CLK_ICH_48M

CLK14
CLK48

RTCX1

CLOCK

4 ITP_DBRESET#
PDA0
PDA1
PDA2
PDCS1#
PDCS3#

NC

1
2
3
4
5

A23
B23

J20
G22
F20
G20
F21
H20
F23
H22
G23
H21
F22
E23

RP4
OVCUR#3
OVCUR#4
OVCUR#1

OC#0
OC#1
OC#2
OC#3
OC#4
OC#5

PDA0
PDA1
PDA2
PDCS1#
PDCS3#

2

2

B15
C14
A15
B14
A14
D14

AA13
AB13
W13
Y13
AB14

IDE I/F

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_DRQ#0
LPC_DRQ#1
LPC_FRAME#

USBP0+
USBP0USBP1+
USBP1USBP2+
USBP2USBP3+
USBP3USBP4+
USBP4USBP5+
USBP5-

PDA0
PDA1
PDA2
PDCS1#
PDCS3#

U37

R366
1
2
10K_0402_5% IN1
2 IN2

1

G

PM

AC97 I/F

C20
D20
A21
B21
C18
D18
A19
B19
C16
D16
A17
B17

USB_EN# 25
+3VS

+VCCP

1

C435
+3VALW
1U_0805_25V4Z
1
2

1

27,31 IAC_BITCLK
27,31 IAC_RST#
31 IAC_SDATAI0
27 IAC_SDATAI1

J21
Y20
V19

EC_SMI# 28
SCI#
28
EC_LID_OUT# 28
EC_FLASH# 29

2

2

12,39 VGATE

CPUPERF#
V_GATE
1

1

1

RTCCLK
SUS_STAT#
ATF_INT#

SUS_STAT#

R413
10K_0402_5%
2
1
EC_SMI#
SCI#
EC_LID_OUT#

EC_THRM# 28

2

17

R3
V4
V5
W3
V2
W1
W4

3

SLPS4#
SLPS5#

12,39 STP_CPU#
12
STP_PCI#

GPIO

GPI7
GPI8
GPI12
GPI13
GPIO25
GPIO27
GPIO28

1

RB751V_SOD323

1

EC_RIOUT#
RSMRST#

ICH4
AGPBUSY#
SYSRST#
BATLOW#
C3_STAT#
CLKRUN#
DPRSLPVR
PWRBTN#
PWROK
RI#
RSMRST#
SLP_S1#
SLP_S3#
SLP_S4#
SLP_S5#
STP_CPU#
STP_PCI#
SUS_CLK
SUS_STAT#/LPCPD#
THRM#

2

3

28 LLBATT#
17
C3_STAT#
19,23,26,28 PM_CLKRUN#
39 PM_DPRSLPVR
28 PWRBTN_OUT#
30 SYS_PWROK
28 EC_RIOUT#
28 RSMRST#
12,28 SLP_S1#
28,34
SLP_S3#

R2
Y3
AB2
T3
AC2
V20
AA1
AB6
Y1
AA6
W18
Y4
Y2
AA2
W19
Y21
AA4
AB3
V1

2

AGP_BUSY#
SYSRST#
LLBATT#
C3_STAT#
PM_CLKRUN#

AGP_BUSY#

ATF_INT#

2
R339
10K_0402_5%

1

17

2

SN74AHC1G08HDCK_TSSOP5

3

1

+3VS

U18B

NC

SLP_S5#

IN

O

1

+3VS

4

IN2

3

2

IN1

1

SLPS5#

U22

P

1

G

SLPS4#

IC H_AC_SYNC
4

ICH_AC_SDOUT
C131
12P_0402_50V8J

1

1

2

2

C130
12P_0402_50V8J

Compal Electronics, Inc.
Title

ICH4-M
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

B

C

Size

Document Number

Rev
0.3

DCL56 LA2231
Date:

Thursday, February 05, 2004
D

Sheet

14

of

45

B

C

D

E

F

+3VS
U18C

3

4

VCC3.3_0
VCC3.3_1
VCC3.3_2
VCC3.3_3
VCC3.3_4
VCC3.3_5
VCC3.3_6
VCC3.3_7
VCC3.3_8
VCC3.3_9
VCC3.3_10
VCC3.3_11
VCC3.3_12
VCC3.3_13
VCC3.3_14
VCC3.3_15
VCCSUS3.3_0
VCCSUS3.3_1
VCCSUS3.3_2
VCCSUS3.3_3
VCCSUS3.3_4
VCCSUS3.3_5
VCCSUS3.3_6
VCCSUS3.3_7
VCCSUS3.3_8
VCCSUS3.3_9

A5
AC17
AC8
B2
H18
H6
J1
J18
K6
M10
P12
P6
U1
V10
V16
V18

C420

C401

2
2
0.1U_0402_16V4Z

C410

C422

2
2
0.1U_0402_16V4Z

1

C434

C416

2
2
0.1U_0402_16V4Z

H

+3VS
0.1U_0402_16V4Z
1
1

1
C403
0.1U_0402_16V4Z

C390

2
2
0.1U_0402_16V4Z

2

0.1U_0402_16V4Z
1
1

1

C389
0.1U_0402_16V4Z

C397

C391

2
2
0.1U_0402_16V4Z

2

C396
0.1U_0402_16V4Z

+1.5VS
+1.5VS
+1.5VS
1

1

1
C406

1

C419
0.1U_0402_16V4Z

1

2
2
0.1U_0402_16V4Z

1

+3VALW

1

C415
C385
0.01U_0402_16V7K
2
2
0.1U_0402_16V4Z

C399
C398
0.1U_0402_16V4Z
2
2
0.1U_0402_16V4Z

+3VALW

E11
F10
F15
F16
F17
F18
K14
V7
V8
V9

+1.8VS

0.1U_0402_16V4Z
1
1

1
C393

C405

2
2
0.1U_0402_16V4Z

C395
0.1U_0402_16V4Z

2

1

+VCCP

1

1

C409

C414
0.1U_0402_16V4Z

1
C412

C428
0.1U_0402_16V4Z
2
2
0.1U_0402_16V4Z

2
2
0.1U_0402_16V4Z

+1.5VS

VCCSUS1.5_0
VCCSUS1.5_1
VCCSUS1.5_2
VCCSUS1.5_3
VCCSUS1.5_4
VCCSUS1.5_5
VCCSUS1.5_6
VCCSUS1.5_7

E12
E13
E20
F14
G18
R6
T6
U6

VCC5REF1
VCC5REF2

2

+3VALW +5VALW

VCC5REF

E15

VCCHI_0
VCCHI_1
VCCHI_2
VCCHI_3

L23
M14
P18
T22

VCC5REFSUS

+3VS

R311
1K_0402_5%

D19
1SS355_SOD323

E7
V6

VCC5REFSUS1

VCC_CPU_IO_0
VCC_CPU_IO_1
VCC_CPU_IO_2

+1.5VALW

2

R312
1K_0402_5%

D20
1SS355_SOD323
VCC5REF

1

VCC5REFSUS
+1.8VS

+5VS
1

K10
K12
K18
K22
P10
T18
U19
V14

2

VCC1.5_0
VCC1.5_1
VCC1.5_2
VCC1.5_3
VCC1.5_4
VCC1.5_5
VCC1.5_6
VCC1.5_7

2

POWER

1

GND

2

2

1

0.1U_0402_16V4Z
1
1

2

1

VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101

0.1U_0402_16V4Z
1
1

1

D22
E10
E14
E16
E17
E18
E19
E21
E22
F8
G19
G21
G3
G6
H1
J6
K11
K13
K19
K23
K3
L10
L11
L12
L13
L14
L21
M1
M11
M12
M13
M20
M22
N10
N11
N12
N13
N14
N19
N21
N23
N5
P11
P13
P20
P22
P3
R18
R21
R5
T1
T19
T23
U20
V15
V17
V3
W22
W5
W8
Y19
Y7
A16
A18
A20
A22
A4
AA12
AA16
AA22
AA3
AA9
AB20
AB7
AC1
AC10
AC14
AC18
AC23
AC5
B12
B16
B18
B20
B22
B9
C15
C17
C19
C21
C23
C6
D1
D12
D15
D17
D19
D21
D23
D4
D8
A1

+1.5VALW

+3VS

ICH4

G

1

A

1
C388
0.1U_0402_16V4Z

2

C392
0.1U_0402_16V4Z

+VCCP

AA23
P14
U18
+RTCVCC

VCCPLL

C22

VCCRTC

AB5

+1.5VS
+RTCVCC

VCCLAN3.3_0
VCCLAN3.3_1

E9
F9

+3VS

VCCLAN1.5_0
VCCLAN1.5_1

F6
F7

+1.5VS

C433
0.1U_0402_16V4Z

3

4

FW82801DBM_BGA421

Compal Electronics, Inc.
Title

ICH4-M
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

B

C

D

E

F

Size

Document Number

Rev
0.3

DCL56 LA2231
Date:

Thursday, February 05, 2004
G

Sheet

15
H

of

45

A

B

C

D

E

HDD Connector
14

PDD[0..15]

PDD[0..15]

+5VS

1

JP22

+5VS

1

PHDD_LED#

+5VS
R157
2
100K_0402_5%

1

A

2

B

3
R159
475_0402_1%
2

Placea caps. near HDD
CONN.

PDA2
PDCS3#
+5VS

PIDE_RESET#

U44
TC7SH08FU_SSOP5

+5VS

+5VS

R158
@10K_0402_5%

2

4

G

Y

5

PCSEL 1

PIDERST#

13,17,28 B_PCIRST#

13

PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15

1

14
14

1
1
C168
C171
10U_1206_10V4Z
10U_1206_10V4Z
C161
2
2
1U_0805_25V4Z
2

1

C156
1000P_0402_50V7K 2

2

SIDERST#

1

A

13,17,28 B_PCIRST#

2

B

13

1
C159
0.1U_0402_16V4Z

P

PDIORDY

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44

Y

4

SIDE_RESET#

G

PDDREQ

14
PDDREQ
14
PDIOW#
14
PDIOR#
14
PDIORDY
14
PDDACK#
13
IRQ14
14
PDA1
14
PDA0
14
PDCS1#
PHDD_LED#

28

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43

1

3

PIDE_RESET#
PDD7
PDD6
PDD5
PDD4
PDD3
PDD2
PDD1
PDD0

P

5

1

U45
TC7SH08FU_SSOP5

SUYIN_20002IFR044G204GL

2

2

Q22
SI3456DV-T1_TSOP6
+5VMOD
D

+5VALW

S

6
5
2
1

4

3

G

2

1

1

C149
4.7U_1206_16V6K

R138
1K_0402_5%

2

+12VALW

D
1

2
1
R140
100K_0402_5%
SDD[0..15] 14

S

3

SDD[0..15]

1

CD-ROM Connector

1

2

1

22K
22K

D

S Q20
2N7002_SOT23

3

1

2
R133
100K_0402_5%

3

+5VALW

3

14
JP16
31
31

14
14
2 R403
1
13
100K_0402_5%
14
14
14
SHDD_LED#

+5VS

28

INT_CD_L
CD_AGND

SDIOW#
SDIORDY
IRQ15
SDA1
SDA0
SDCS1#
+5VMOD

2
1
R402
475_0402_1%

SEC_CSEL

SIDE_RESET#
SDD7
SDD6
SDD5
SDD4
SDD3
SDD2
SDD1
SDD0

SHDD_LED#

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50

+5VMOD

1

SDDREQ 14
SDIOR# 14

W=80mils

1

1
C139

1

C143
1000P_0402_50V7K 2

SDDACK# 14
EXTID2
28
2
+5VMOD
R399
SDA2
14
100K_0402_5%
SDCS3# 14

2

3

SI3456DV: N CHANNEL
VGS: 4.5V, RDS: 65 mOHM
Id(MAX): 5.1A
VGS,+-20V

1

C148
1U_0805_25V4Z
2
2

C132
0.01U_0402_16V7K

2
G

Placea caps. near CDROM
CONN.

INT_CD_R 31
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15

CBLIDB

SIDEPWR

2
Q18
DTC124EK_SOT23

2 EXTIDE_EN#
G
Q19
2N7002_SOT23

C150
10U_1206_10V4Z

0.1U_0402_16V4Z

+5VMOD

FOXCONNQL11253-A606
4

4

Compal Electronics, Inc.
Title

IDE/CD-ROM Module
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

B

C

D

Size

Document Number

Rev
0.3

DCL56 LA2231
Date:

Sheet

Thursday, February 05, 2004
E

16

of

45

A

B

C

D

E

JP11
18
18
18
18

HSYNC
VSYNC
DDC_DATA
DDC_CLK

34
DVI_D0+
34
DVI_D026
PID0
34
DVI_CLK+
34
DVI_CLK26
PID1
34
DVI_D1+
34
DVI_D126
PID2
34
DVI_D2+
34
DVI_D226
PID3
34 DVI_DDC_DATA
34 DVI_DDC_CLK
13 PCI_PIRQA#

1

28
TP_DATA
28
TP_CLK
6 AGP_RBF#
6
AGP_WBF#
6
6

AGP_ADSTB1
AGP_ADSTB1#
AGP_AD30
AGP_AD28
AGP_AD27
AGP_AD22
AGP_C/BE#3
AGP_AD26
AGP_AD18
AGP_C/BE#2
AGP_AD16

6
AGP_STOP#
6
AGP_PAR
6 AGP_DEVSEL#
14
C3_STAT#

2

AGP_AD15
AGP_AD8
AGP_AD13
AGP_AD6
AGP_AD10
AGP_AD2
AGP_AD5
AGP_AD3
AGP_AD0
AGP_AD1

13,16,28 B_PCIRST#
+3VS
+5VS
+5V
+1.8VS

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120

AGP_SBA1
AGP_SBA0
AGP_ST0
AGP_ST2
AGP_SBA3
AGP_SBA2
AGP_ST1

R
G
B

18,34
18,34
18,34

LUMA
CRMA
COMPS

18,34
18,34
18,34

ENBKL 28
AGP_GNT# 6
AGP_REQ# 6
BKOFF# 28

B+

34
AGP_SBSTB# 6
AGP_SBSTB 6

AGP_C/BE#1
AGP_C/BE#0
AGP_AD9
AGP_AD11
AGP_AD14
AGP_AD7
AGP_AD12
AGP_AD4

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

+3VALWP
+5VALWP

AGP_SBA6
AGP_SBA7
AGP_SBA5
AGP_SBA4
AGP_AD31
AGP_AD29
AGP_AD24
AGP_AD19
AGP_AD20
AGP_AD25
AGP_AD21
AGP_AD23
AGP_AD17

M_SEN#

1

2 C105
0.1U_0805_50V7M

1
JP13

18

HPD

KSO3
KSO4
KSI0
KSO0
KSO1
KSO7
KSO2
KSO15
KSO6
KSO8
KSO13
KSO12
KSO11
KSO10

B+

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

INVT_PWM
DAC_BRIG
SUS_STAT#
VGA_VID

B+
SUSP#
19,28,29,33,38,41
INVT_PWM 28
DAC_BRIG 28
SUS_STAT# 14
VGA_VID 26

KSI2
KSO5
KSI3
KSO14
KSI7
KSI6
KSI5
KSI4
KSO9
KSI1

HEADER 2X20

AGP_FRAME# 6
AGP_TRDY# 6
AGP_IRDY# 6
+AGPREF
AGP_BUSY# 14

28
28

KSI[0..7]
KSO[0..15]

KSI[0..7]
KSO[0..15]

2

AGP_ADSTB0# 6
AGP_ADSTB0 6
CLK_AGP_66M 12
+1.5VS
+12V

HEADER 2X60

3

6

AGP_ST[0..2]

6

AGP_AD[0..31]

AGP_ST[0..2]

AGP_AD[0..31]
AGP_C/BE#[0..3]

6 AGP_C/BE#[0..3]

3

AGP_SBA[0..7]

6 AGP_SBA[0..7]

+1.5VS

+12V
1

1

+5VS

+3VS

1

1

C93
C89
C88
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
0.1U_0402_16V4Z

C87
0.1U_0402_16V4Z

+5V
+1.8VS
1
1

2

4

C92
0.1U_0402_16V4Z

2

C90
0.1U_0402_16V4Z
4

Compal Electronics, Inc.
Title

AGPConn.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

B

C

D

Size

Document Number

Rev
0.3

DCL56 LA2231
Date:

Sheet

Thursday, February 05, 2004
E

17

of

45

E

3

2

D11
@DAN217_SOT23

3

2

D14
@DAN217_SOT23
3

D12
@DAN217_SOT23
2

D

1

C

1

B

1

A

+3VS

1

COMPS

R14
2

R13

1
2
3
4
5
6
7
S CONN._SUYIN

1
R12

1

1
C17

2

COMPS

1

CRMA

17,34

CRMA

1

17,34

JP4

L5
1
2
FCM2012C-800_0805
L4
1
2
FCM2012C-800_0805
L6
1
2
FCM2012C-800_0805

LUMA

LUMA

2

17,34

1
C18

2

75_0402_1%
75_0402_1%
75_0402_1%

1

1
C16

2

1
C9

2

C10

2

82P_0402_50V8J
82P_0402_50V8J
82P_0402_50V8J

1

2

C11
2

82P_0402_50V8J
82P_0402_50V8J
82P_0402_50V8J

2

2

CRT Connector
FUSE_1A

1

2

@DAN217_SOT23

C191
0.1U_0402_16V4Z
JP1
CRT-15P

5
P

OE#

2

A
3
5

C2
8P_0402_50V8K

2

C3
8P_0402_50V8K

2

C1
8P_0402_50V8K

D DCD

1
2
L14
FCM2012C-800_0805

1

3

DDC_DATA

D DCC
1

1
2
L13
1
FCM2012C-800_0805

1
C192

C190

2

2

2

C194
100P_0402_50V8J

2

Q26
2N7002_SOT23
1

1

C193

1

2

1

2

R165
2.2K_0402_5%

R168
4.7K_0402_5%

DDC_DATA 17

3

C189
220P_0402_50V7K

3

DDC_CLK

DDC_CLK 17

Q25
2N7002_SOT23
220P_0402_50V7K

Y

4

CRT_HSYNC 34

68P_0402_50V8K
68P_0402_50V8K

DDCC
DDCD

34
34

CRT_VSYNC 34

1

P
2

2
R6
1K_0402_5%

U26
SN74AHCT1G125GW_SOT353-5

A
3

OE#

VSYNC

G

17

CRT_HSYNC

2

1

1

G

HSYNC

1

75_0402_1%
75_0402_1%

CRT_VSYNC

+CRT_VCC

17

1

1
75_0402_1%
3

C7
C6
8P_0402_50V8K
2
2 8P_0402_50V8K
8P_0402_50V8K

R167
4.7K_0402_5%

+3VS

R164
2.2K_0402_5%

2

C8
2

1

1

R9

1

2
G

R8

1

+CRT_VCC +CRT_VCC

S

R7

1

CRT_B

+3VS

D

1

CRT_G

2
G

B

CRT_R

S

17,34

1
2
L2
FCM2012C-800_0805
1
2
L1
FCM2012C-800_0805
1
2
L3
FCM2012C-800_0805
1

D

G

2

17,34

2

M_SEN#
R

2

17
17,34

6
11
1
7
12
2
8
13
3
9
14
4
10
15
5

1

3

2

3

2

RB491D

+CRT_VCC
2

1

2

D2
3

2

D3
@DAN217_SOT23
R163
5.6K_0402_5%

+R_CRT_VCC
F1
1
1

2

1

1

1

D10

2

1

+3VS +5VS
D1

2

@DAN217_SOT23
+3VS

Y

4

U1
SN74AHCT1G125GW_SOT353-5

4

4

Compal Electronics, Inc.
Title

AGPConn. & CRT
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

B

C

D

Size

Document Number

Rev
0.3

DCL56 LA2231
Date:

Sheet

Thursday, February 05, 2004
E

18

of

45

A

B

C

D

E

+3V
+3V

S1_VCC

0.1U_0402_16V4Z
1
1

1

C333
4.7U_0805_10V4Z

C303

1

1

1

2

C326
0.1U_0402_16V4Z
2

C317
C370
0.1U_0402_16V4Z 0.1U_0402_16V4Z
2
2
+3V

1

C346

0.1U_0402_16V4Z
1
1
C369

2
2
0.1U_0402_16V4Z

0.1U_0402_16V4Z
1
1

C269

C270

2
2
0.1U_0402_16V4Z

C368

C294
0.1U_0402_16V4Z
2

2
2
0.1U_0402_16V4Z

+3V

4

1

28
PCM_RI#
13,24,26,28 SIRQ
14,23,26,28 PM_CLKRUN#

CLK_PCI_PCM

1

20

CBRST#

CSTSCHG/BVD1
CCLKRUN#/WP

135
136

S1_BVD1
S1_WP

13

IDSEL

CBLOCK#/A19

103

S1_A19

60
61
64
65
67
68
69

MFUNC0
MFUNC1
MFUNC2
MFUNC3
MFUNC4
MFUNC5
MFUNC6

CINT#/READY

132

S1_RDY#

SPKOUT
CAUDIO/BVD2

62
134

PCM_SPK#
S1_BVD2

66

VCC/GRST#

CCD2#/CD2#
CCD1#/CD1#
CVS2/VS2#
CVS1/VS1#

137
75
117
131

S1_CD2#
S1_CD1#
S1_VS2
S1_VS1

2
2

63

RI_OUT#/PME#
SUSPEND#

S1_A[0..25]

C319
18P_0402_50V8K

S1_A[0..25] 20

S1_D[0..15]

S1_D[0..15] 20

3

S1_IOWR# 20
S1_IORD# 20
S1_OE#
S1_CE2#

20
20

S1_REG# 20
S1_CE1#

20

S1_RST

20

2

+3V

S1_WAIT# 20

R276

S1_INPACK# 20
S1_WE# 20
S1_A16
2
33_0402_5%

1

PCM_SPK#

2

R435
10K_0402_5%

S1_BVD1 20
S1_WP
20

S1_RDY# 20
PCM_SPK# 32
S1_BVD2 20
S1_CD2#
S1_CD1#
S1_VS2
S1_VS1

S1_CD2#
S1_CD1#

20
20
20
20

C561
1000P_0402_50V7K

CB1410_LQFP144
S1_D2
S1_A18
S1_D14

1
1

VCCI

59
70

6
22
42
58
78
94
114
130

R250
10_0402_5%

2 R247PCM_ID
100_0402_1%

138
122
102
86
50
30
14

S1_RST
S1_A23
S1_A15
S1_A22
S1_A21
S1_A20
S1_A14
S1_WAIT#
S1_A13
S1_INPACK#
S1_WE#
A16_CLK
1

RSVD/D14
RSVD/A18
RSVD/D2

1

VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7

119
111
110
109
107
105
104
133
101
123
106
108

PQFP 144
22.2 X 22.2 X 1.60

84
100
143

PCI_AD19

13,23 PCI_PIRQC#

126
90

CRST#/RESET
CFRAME#/A23
CIRDY#/A15
CTRDY#/A22
CDEVSEL#/A21
CSTOP#/A20
CPERR#/A14
CSERR#/WAIT#
CPAR/A13
CREQ#/INPACK#
CGNT#/WE#
CCLK/A16

20
28
29
31
32
33
34
35
36
1
2
21

2

VCCSK0
VCCSK1

RST#
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PERR#
SERR#
PAR
REQ#
GNT#
PCLK

7,13,20,21,22,23,24,26 PCIRST#
13,21,22,23 PCI_FRAME#
13,21,22,23 PCI_IRDY#
13,21,22,23 PCI_TRDY#
13,21,22,23 PCI_DEVSEL#
13,21,22,23 PCI_STOP#
13,21,22,23 PCI_PERR#
13,21,23 PCI_SERR#
13,21,22,23 PCI_PAR
1
2
13
PCI_REQ#2
R227
13
PCI_GNT#2
10K_0402_5%
12 CLK_PCI_PCM

D16
@RB751V_SOD323

44
18

S1_REG#
S1_A12
S1_A8
S1_CE1#

C/BE3#
C/BE2#
C/BE1#
C/BE0#

21,22,23,28 PCM_PME#

VCCP0
VCCP1

125
112
99
88

12
27
37
48

CLK_PCI_PCM

72
71

CC/BE3#/REG#
CC/BE2#/A12
CC/BE1#/A8
CC/BE0#/CE1#

PCI_C/BE#3
PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#0

1

17,28,29,33,38,41 SUSP#

S1_D10
S1_D9
S1_D1
S1_D8
S1_D0
S1_A0
S1_A1
S1_A2
S1_A3
S1_A4
S1_A5
S1_A6
S1_A25
S1_A7
S1_A24
S1_A17
S1_IOWR#
S1_A9
S1_IORD#
S1_A11
S1_OE#
S1_CE2#
S1_A10
S1_D15
S1_D7
S1_D13
S1_D6
S1_D12
S1_D5
S1_D11
S1_D4
S1_D3

GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8

+3V

144
142
141
140
139
129
128
127
124
121
120
118
116
115
113
98
96
97
93
95
92
91
89
87
85
82
83
80
81
77
79
76

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

13,21,22,23
13,21,22,23
13,21,22,23
13,21,22,23

2

CAD31/D10
CAD30/D9
CAD29/D1
CAD28/D8
CAD27/D0
CAD26/A0
CAD25/A1
CAD24/A2
CAD23/A3
CAD22/A4
CAD21/A5
CAD20/A6
CAD19/A25
CAD18/A7
CAD17/A24
CAD16/A17
CAD15/IOWR#
CAD14/A9
CAD13/IORD#
CAD12/A11
CAD11/OE#
CAD10/CE2#
CAD9/A10
CAD8/D15
CAD7/D7
CAD6/D13
CAD5/D6
CAD4/D12
CAD3/D5
CAD2/D11
CAD1/D4
CAD0/D3

3
4
5
7
8
9
10
11
15
16
17
19
23
24
25
26
38
39
40
41
43
45
46
47
49
51
52
53
54
55
56
57

3

VPPD1
VPPD0

VCCD1#
VCCD0#

PCI_AD[0..31]

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0

2

C271
0.1U_0402_16V4Z
U35

13,21,22,23 PCI_AD[0..31]

4

VPPD0
VPPD1
VCCD0#
VCCD1#

74
73

20
20
20
20

1

1

2

2

C562
1000P_0402_50V7K

Reserve for CB1410 B0 Version
1

Title

Compal Electronics, Inc.
PCMCIA controller ENE CB1410

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

B

C

D

Size

Document Number

Rev
0.3

DCL56 LA2231
Date:

Thursday, February 05, 2004

Sheet
E

19

of

45

A

B

C

D

E

PCMCIA Power Controller
+12V

S1_VCC

1
C71
0.1U_0402_16V4Z

1

1

U14
AVCC1
AVCC2
AVCC3

2
9

12V

13
12
11

2

1

C70
0.1U_0402_16V4Z
S1_VPP

S1_VPP

+5V

C76
0.01U_0402_16V7K

1
AVPP

1
C84
0.1U_0402_16V4Z

5
6

5V_1
5V_2

2

2
VCCD0#
VCCD1#
VPPD0
VPPD1
OC#

7

2

1
2
15
14

2

2

C78
4.7U_1206_16V6K

C69
1U_0805_25V4Z

VCCD0#
VCCD1#
VPPD0
VPPD1

8

1

19
19
19
19

19
19

+5V

1

1

2

2

C80
10U_1206_10V4Z

2

S1_A[0..25]
S1_D[0..15]

CardBus Socket
C123
0.1U_0402_16V4Z

1

1

2

2

JP15

C120
10U_1206_10V4Z
S1_D3
S1_D4
S1_D5
S1_D6
S1_D7
S1_CE1#
S1_A10
S1_OE#
S1_A11
S1_A9
S1_A8
S1_A13
S1_A14
S1_WE#
S1_RDY#

CBRST#
+3V

S1_A[0..25]
S1_D[0..15]

S1_VCC

TPS2211IDBR_SSOP16

16

C82
0.1U_0402_16V4Z

3.3V_1
3.3V_2

SHDN#

3
4

GND

+3V

1

10

1

19

S1_CE1#

19

S1_OE#

C85
10U_1206_10V4Z
19
19

S1_WE#
S1_RDY#
S1_VCC
S1_VPP

19

S1_WP

S1_A16
S1_A15
S1_A12
S1_A7
S1_A6
S1_A5
S1_A4
S1_A3
S1_A2
S1_A1
S1_A0
S1_D0
S1_D1
S1_D2
S1_WP

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
69
71
73
75
77
79
81
83

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
GND
GND
GND
GND
GND
GND
GND
GND

35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
GND
GND
GND
GND
GND
GND
GND
GND

35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
70
72
74
76
78
80
82
84

S1_CD1#
S1_D11
S1_D12
S1_D13
S1_D14
S1_D15
S1_CE2#
S1_VS1
S1_IORD#
S1_IOWR#
S1_A17
S1_A18
S1_A19
S1_A20
S1_A21

S1_CD1# 19

S1_CE2# 19
S1_VS1
19
S1_IORD# 19
S1_IOWR# 19

S1_A22
S1_A23
S1_A24
S1_A25
S1_VS2
S1_RST
S1_WAIT#
S1_INPACK#
S1_REG#
S1_BVD2
S1_BVD1
S1_D8
S1_D9
S1_D10
S1_CD2#

2

S1_VCC
S1_VPP

S1_VS2
19
S1_RST
19
S1_WAIT# 19
S1_INPACK# 19
S1_REG# 19
S1_BVD2 19
S1_BVD1 19

S1_CD2# 19

S1_VCC

3

3

FOXCONN_1CA41531-TC2

5

I

1
R288

2
22K_0402_5%

S1_WP

1
R289

2
22K_0402_5%

S1_OE#

1
R436

2
22K_0402_5%

S1_RST

1
R464

2
43K_0402_5%

S1_CE1#

1
R465

2
43K_0402_5%

S1_CE2#

1
R466

2
43K_0402_5%

U41B
O

6

CBRST#

CBRST#
1

7,13,19,21,22,23,24,26 PCIRST#

OE#

4

PCMRST# 28

S1_A23

SN74LVC125APWLE_TSSOP14

19

R394
10K_0402_5%

+3V POWER
2

Reserve for CB1410 B0 Version

+3V

4

4

Compal Electronics, Inc.
Title

CardBus Socket
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

B

C

D

Size

Document Number

Rev
0.3

DCL56 LA2231
Date:

Sheet

Thursday, February 05, 2004
E

20

of

45

5

4

3

2

1

+2.5VLAN
+3VALW

Note : Imax for VDD25 = 40mA
2.5V should be ready before
+3V is ready

For Wake on Lan from S4

19,22,23,28 LAN_PME#

57

PME#

7,13,19,20,22,23,24,26 PCIRST#

82

RST#

12 CLK_PCI_LAN

CLK_PCI_LAN 83

2

S

3

VDD
VDD
VDD
VDD
VDD
VDD

1
+3V_LAN_VDD

AVDD

75

+3V_LAN_VDD

T=20mil

2.5VLAN power generated by VCTRL.

LAN_EEDO
LAN_EEDI
LAN_EECLK
LAN_EECS

U5

TXD+
TXD-

72
71

LAN_TD+
LAN_TD-

RXIN+
RXIN-

68
67

LAN_RD+
LAN_RD-

X1

61

LAN_X1

R36
49.9_0402_1%

LAN_X2

X2

60
64

1

ISOLATE#

74

1

RTSET

65

1

RTT3

63

VCTRL

55

NC
NC
NC
NC
NC
NC
NC
NC
NC

7
35
40
52
53
54
69
76
78

GND
GND
GND
GND
GND
GND
GND
GND
GND

Power

1
2 R43
1K_0402_5%
R44
2
15K_0402_5%
2

+3VS

2

Place as close to
Magnetic

R57
5.6K_0402_5%

1

C37
0.1U_0402_16V4Z

2

R26
75_0402_1%

1
C48
0.1U_0402_16V4Z

C43
0.1U_0402_16V4Z

2

Q4
DTA114YKA_SOT23
1
1
2 T=10mil
R23
300_0603_5%

2
16
31
43
56
62
66
73
88

G

Amber LED-

C55
27P_0402_50V8J

1

2

C57
27P_0402_50V8J

PR4+

6

PR2-

5

PR3-

4

PR3+

RJ45_RX+

3

PR2+

RJ45_TX-

2

PR1-

RJ45_TX+

1

PR1+
Green LED-

9

Green LED+

VCC
NC
NC
GND

AT93C46-10SI-2.7_SO8

2

1

2

13

2

RJ45_GND

1

C68
0.1U_0402_16V4Z

LANGND

2

C21
1000P_1206_2KV7K

1

1
C31

2

+LANIO
0.1U_0402_16V4Z
1
1

1

A

14

SHLD1

R22
R20
75_0402_1% 75_0402_1%

LINK10_100#

34 LINK10_100#

SHLD2

AMP RJ45/RJ11 with LED

2

Q5
DTA114YKA_SOT23

15

1

CS
SK
DI
DO

8
7
6
5

R27
300_0603_5%

16

SHLD3

B

10
T=10mil

2

1

1
2
3
4

1

C

B

1

LAN_X2
25 MHz

1
10K

3

SHLD4
PR4-

7

E

D

1

11

RJ45_RX-

+LANIO

2

Amber LED+

ACTIVITY#

34 ACTIVITY#

U10

1

JP5

12

8

+LANIO

LAN_X1

C

RJ45_GND

Place as close to
LAN Chip

3

+LANIO

+LANIO

LAN_EECS
LAN_EECLK
LAN_EEDI
LAN_EEDO

R25
75_0402_1%

VCTRL

RTL8100BL_LQFP100

X1

RJ45_TX+
RJ45_TX-

Pulse H0013
R55
49.9_0402_1%

R53
49.9_0402_1%

RJ45_RX+
RJ45_RX-

16
15
14
13
12
11
10
9

RX+
RXCT
NC
NC
CT
TX+
TX-

2

R37
49.9_0402_1%

1

1

LAN_TD+
LAN_TD-

RD+
RDCT
NC
NC
CT
TD+
TD-

1

80
79
77

2
+LANIO
R67
5.6K_0402_5%

1
2
3
4
5
6
7
8

2

LED0
LED1
LED2

LAN_RD+
LAN_RD-

1

1
ACTIVITY#
LINK10_100#

LWAKE

2

2

50

C65
0.1U_0402_16V4Z

2
C58
0.1U_0402_16V4Z

1

AUX

2

2

46
47
48
49

2

1

C38
22U_1206_10V4Z 2

C54
C47
0.1U_0402_16V4Z
0.1U_0402_16V4Z 2

1

EEDO
EEDI
EESK
EECS

1

D

1
1

T=20mil

1

+2.5VLAN

1

R463
@0_1206_5%

2

Q54
SI2301DS_SOT23

AVDD

70

CLK

Q10
2SA1036K_SOT23

1 R39
+2.5VLAN
0_0805_5%
1 R62
+LANIO
0_0805_5%

47K

1
2

+3VALW

2

C

INTA#

+LANIO

2

T=20mil

10K

81

6
22
34
39
90
97

T=20mil

+3V_LAN_VDD

E

13,23 PCI_PIRQD#

C41
18P_0402_50V8K

+2.5V_LAN_VDD

59

47K

IDSEL

REQ#
GNT#

PCI_REQ#3
PCI_GNT#3

58

AVDD

Power

99

85
84

13
13

B

EN_WOL#

C/BE#0
C/BE#1
C/BE#2
C/BE#3

PERR#
SERR#

13,19,22,23 PCI_PERR#
13,19,23 PCI_SERR#

1

28

32
21
11
98

18
19

R40
10_0402_5%

AVDD25

C60
0.1U_0402_16V4Z

PAR
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#

13,19,22,23 PCI_PAR
13,19,22,23 PCI_FRAME#
13,19,22,23 PCI_IRDY#
13,19,22,23 PCI_TRDY#
13,19,22,23 PCI_DEVSEL#
13,19,22,23 PCI_STOP#

VCTRL 2

51
96

B

2 LAN_IDSEL
R41
100_0402_1%

VDD25
VDD25

20
12
13
14
15
17

CLK_PCI_LAN

2

PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

2

PCI_AD17 1

C40
0.1U_0402_16V4Z

2

PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3

2

2

13,19,22,23
13,19,22,23
13,19,22,23
13,19,22,23

45
44
42
41
38
37
36
33
30
29
28
27
26
25
24
23
10
9
8
5
4
3
1
100
95
94
93
92
91
89
87
86

PCI I/F
LAN I/F

C

2

U7
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

D

1
3

C64
0.1U_0402_16V4Z
PCI_AD[0..31]

13,19,22,23 PCI_AD[0..31]

1

C42

2
2
0.1U_0402_16V4Z

C39

0.1U_0402_16V4Z
1
1
C53

2
2
0.1U_0402_16V4Z

C61

2

C32
4.7U_0805_10V4Z

0.1U_0402_16V4Z

1
C67

2
2
0.1U_0402_16V4Z

C66
0.1U_0402_16V4Z

Termination plane should be copled
to chassis ground and also depends
on safety concern

Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

LAN RTL8100BL
Size
B

Document Number

Date:

Thursday, February 05, 2004

Rev
0.3

DCL56 LA2231
Sheet
1

21

of

45

A

5

4

3

2

1

+3VS
0.1U_0402_16V4Z
+3VS

1

+3V_1394

PCI_AD[0..31]

13,19,21,23 PCI_AD[0..31]

1

1

C218
+3VS

2

2

0.1U_0402_16V4Z

C222

1

1

C211

2

0.1U_0402_16V4Z

1

C234

2

0.1U_0402_16V4Z

C245

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

66
GNDATX1

A0
A1
A2
GND

8
7
6
5

VCC
WC
SCL
SDA

C227
0.1U_0402_16V4Z

0.1U_0402_16V4Z
D

80
62

GNDARX0
VDDARX1

61
72

GNDARX1
VDDARX2

65
86

GNDARX2

79

EECS
EEDO
SDA/EEDI
SCL/EECK

26
27
28
29

PME#
NC1
NC2

34
39
40

XCPS

60

C213

C203
C204
0.1U_0402_16V4Z
1
1
0.1U_0402_16V4Z

R173

54.9_0402_1%

54.9_0402_1%

C199
0.33U_0603_10V7K

R179

1

R208
1K_0402_5%

1

NC3
NC4
NC5
NC6
NC7
PHYRESET

81
82
83
84
85
55

2

XTPB1XTPB1+
XTPA1XTPA1+
XTPBIAS1

R209
1K_0402_5%

Note:These components need to close to chip pins.
R183
2 6.34K_0402_1%

1

C207
47P_0402_50V8J

1

74
75
76
77
78

R175
4.99K_0603_1%

2

1

XTPB1M
XTPB1P
XTPA1M
XTPA1P
XTPBIAS1

2

54.9_0402_1%

2

54.9_0402_1%

C201
270P_0402_25V8K
XTPB0XTPB0+
XTPA0XTPA0+
XTPBIAS0

C

+3VS

1394_PME# 19,21,23,28

63

R170
@54.9_0402_1%

R171
@54.9_0402_1%

1

2

XTPBIAS1
XTPA1+
XTPA1XTPB1+
XTPB1-

1394_TPA1+
1394_TPA11394_TPB1+
1394_TPB1-

1

C220
0.1U_0402_16V4Z

1

XO

1
24.576MHz_16P_3XG-24576-43E1

2

1

R169
C200
@4.99K_0603_1%
@270P_0402_25V8K

2

2

1

34
34
34
34

R177
@54.9_0402_1%

2

X3

B

2

R176
@54.9_0402_1%

+3VS

R197
1M_0402_5%

C198
@0.33U_0603_10V7K

2

2

2

1

5
6

JP3
SUYIN8004A-04G5T

1

1
EEDI_LAN
EECK_LAN

67
68
69
70
71

2

2

4
3
2
1

R178

XREXT

XI 1

1

R172

XTPBIAS0
XTPA0+
XTPA0XTPB0+
XTPB0-

XO
XI

2

2
R213
560_0402_5%

2

2

1
1
0.1U_0402_16V4Z

XTPB0M
XTPB0P
XTPA0M
XTPA0P
XTPBIAS0

C202
18P_0402_50V8K

C221
10P_0402_25V8K

1

1

GNDATX2
VDDARX0

0.1U_0402_16V4Z
2
2

2

VT6307S-CD_LQFP128

R210
4.7K_0402_5%

EECK_LAN
EEDI_LAN

2

87

1

VDDATX1

GNDATX0

VDDATX0

PVDD1
PVDD2

PGND2
PGND1

1

73

56

59

47
38

36
46

99
110
122
5
17
32
21
111
30

2

AT24C02N-10SC-2.7_SO8

VDDATX2

1

2

2

1

2

22
112
33
23
13
6
126
118
108
100
91
31

R174
10_0402_5%

XO

B

IDSEL
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PERR#
PAR
REQ#
GNT#
INTA#
PCIRST#
PCICLK

1
2
3
4

+3V_1394

58

1

2 R191
105
100_0402_1% 120
121
123
124
125
127
128
93
92
88
89
CLK_PCI_1394
90

XI

1

CBE0#
CBE1#
CBE2#
CBE3#

57

PCI_AD16
13,19,21,23 PCI_FRAME#
13,19,21,23 PCI_IRDY#
13,19,21,23 PCI_TRDY#
13,19,21,23 PCI_DEVSEL#
13,19,21,23 PCI_STOP#
13,19,21,23 PCI_PERR#
13,19,21,23 PCI_PAR
13
PCI_REQ#0
13
PCI_GNT#0
13 PCI_PIRQB#
7,13,19,20,21,23,24,26 PCIRST#
12 CLK_PCI_1394

IEEE 1394
VT6307S

NC21
NC20
NC19
NC18
NC17
NC16
NC15
NC14
NC13
NC12
I2CEEENA
NC11
NC10
NC9
NC8

12
1
119
104

PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3

2

1
C244

+3VS

C210

64
54
53
52
51
50
49
48
45
44
43
42
41
37
35

13,19,21,23
13,19,21,23
13,19,21,23
13,19,21,23

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

VSSC2
VSSC1
VSS9
VSS8
VSS7
VSS6
VSS5
VSS4
VSS3
VSS2
VSS1
RAMVSS

C

25
24
20
19
18
16
15
14
11
10
9
8
7
4
3
2
117
116
115
114
113
109
107
106
103
102
101
98
97
96
95
94

1
C246

U31

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDDC2
VDDC1
RAMVDD

U29
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

1
C247

2

L15
FCM2012C-800_0805

D

0.1U_0402_16V4Z

C214
10P_0402_25V8K

A

A

Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

IEEE-1394 VT6306
Size

Document Number

Rev
0.3

DCL56 LA2231

Custom
Date:
Thursday, February 05, 2004

Sheet
1

22

of

45

A

B

C

D

E

+3V

1

C122
0.1U_0402_16V4Z

5
WL_OFF#

1

A

28,30

KILL_SW#

2

B

U23
TC7SH08FU_SSOP5

4

1

G

Y
3

1

P

28

2

JP17
TIP

D7
RB751V_SOD323
1

+3V_MINI_1
+3VS

2

13,21 PCI_PIRQD#

1

R149
0_1206_5%

1

1

13

2

W=40mils

PCI_REQ#4

C187

C127
12 CLK_PCI_MINI
1000P_0402_50V7K
2
2
13
PCI_REQ#1
1000P_0402_50V7K

CLK_PCI_MINI

PCI_AD31
PCI_AD29

1

CLK_PCI_MINI
R132
10_0402_5%

1

27 WLAN_BT_DATA
13,19,21,22 PCI_C/BE#3

PCI_AD23

2

2

PCI_AD21
PCI_AD19

1

2

PCI_AD27
PCI_AD25
2 R434 @0_0402_5%

C125
18P_0402_50V8K

PCI_AD17
13,19,21,22 PCI_C/BE#2
13,19,21,22 PCI_IRDY#
14,19,26,28 PM_CLKRUN#
13,19,21 PCI_SERR#
13,19,21,22 PCI_PERR#
13,19,21,22 PCI_C/BE#1

PCI_AD14
PCI_AD12
PCI_AD10
PCI_AD8
PCI_AD7
PCI_AD5
PCI_AD3
W=30mils

+5VS

PCI_AD1

3

W=30mils

+5VS

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123

1
KEY
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123

2
KEY
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124

RING

+5VS
PCI_PIRQC# 13,19
PCI_GNT#4 13
+3V

1

PCI_AD28
PCI_AD26
PCI_AD24
PCI_AD18
1
2
R391
100_0402_1%
PCI_AD22
PCI_AD20

1

MINI_LAN_PME# 19,21,22,28
WLAN_BT_CLK 27
2

2 R433 @0_0402_5%
PCI_AD30

1
R135
0_0402_5%

PCIRST#

7,13,19,20,21,22,24,26

+3V_MINI_2

PCI_GNT#1 13

1
C529

1
2
+3VS
R408
0_1206_5%
C530
1000P_0402_50V7K

2
1000P_0402_50V7K

2

IDSEL : AD18
PCI_PAR 13,19,21,22

PCI_AD18
PCI_AD16

PCI_FRAME# 13,19,21,22
PCI_TRDY# 13,19,21,22
PCI_STOP# 13,19,21,22
PCI_DEVSEL# 13,19,21,22
PCI_AD15
PCI_AD13
PCI_AD11
PCI_AD9

+5VS

PCI_C/BE#0 13,19,21,22
PCI_AD6
PCI_AD4
PCI_AD2
PCI_AD0

1
C539
4.7U_0805_10V4Z

1

1
C535

2

2
2
0.1U_0402_16V4Z

W=40mils

+3V

1
C163
4.7U_0805_10V4Z

2

C538
1000P_0402_50V7K
3

+3V_MINI_2

+3V_MINI_1

Mini-PCI SLOT

13,19,21,22 PCI_AD[0..31]

2

W=30mils
1
2 R114
0_0402_5%
W=40mils
MINI_RST#
W=40mils

1

1
C121
0.1U_0402_16V4Z

1
C527

1

C532
1U_0603_10V6K
2
2
2
0.1U_0402_16V4Z 1000P_0402_50V7K

2

C531

PCI_AD[0..31]

+3V

1
C534
1U_0603_10V6K

4

Title

1

1
C537

2

2
2
0.1U_0402_16V4Z

C536
1000P_0402_50V7K

4

Compal Electronics, Inc.
Mini PCI Slot

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

B

C

D

Size
Document Number
Custom DCL56 LA2231
Date:

Thursday, February 05, 2004

Rev
0.3
Sheet
E

23

of

45

5

4

3

2

1

2

R87
1M_0402_5%

+3VS

+3VS
R84
1M_0402_5%

R02 ADD PULLUP AND PULLDOWN
1

2

+3VS

SDPWCTL#
C407
0.1U_0402_16V4Z

1

2

1
2
3
4

+3VS
C411
10U_1206_10V4Z

2

SDPWCTL#

U21

+SD3_VCC

GND
IN
IN
EN#

OUT
OUT
OUT
OC#

8
7
6
5

R429
@100K_0402_5%

D

SD_OVCUR#
R430

@0_0402_5%

C553

SDPWCTL#
SDLED
SCC4
SCC8
MSLED
MSPWCTL#
VSS
MSCLK
MS1
MS2
MS3
MS4

D

2 @4.7K_0402_5%
2 @4.7K_0402_5%

1
1

36
35
34
33
32
31
30
29
28
27
26
25

1

U43
R83
R88

2

1

1

+3VS
SDLED

TPS2041ADR_SO8

C554
4.7U_0805_10V4Z

0.1U_0402_16V4Z

+3VS
R89

+3VS

2 10_0402_5%
SD1
SD2
SD3
SD4
SD5

14,26,28 LPC_AD3
14,26,28 LPC_AD2
14,26,28 LPC_AD1
14,26,28 LPC_AD0
13,19,26,28 SIRQ

37
38
39
40
41
42
43
44
45
46
47
48

SDCLK
SD1
SD2
VDD3V
SD3
SD4
SD5
LAD3
LAD2
LAD1
LAD0
SERIRQ

MS5
XIN
XOUT
SCRST#
SCIO
SCCLK
SCPSNT
SCPWCTL#
SCLED
VDD
ADD_SEL
MMC_DET#

2 @4.7K_0402_5%
SDCLK_48M

1

24
23
22
21
20
19
18
17
16
15
14
13

+SD3_VCC

SDCLK_48M 12

1

1

1
R121

R431
300_0603_5%

2
@4.7K_0402_5%
2

R86

+5VS

2E/4E#
MMC_DET#

1

SD_CLK

D

C

1

SD_CLK

1
2
3
4
5
6
7
8
9
10
11
12

33,42

C

CLK_PCI_SD
SD_OVCUR#

+SD3_VCC

+3VS
+3VS
1

1

12 CLK_PCI_SD
14,26,28 LPC_FRAME#
7,13,19,20,21,22,23,26 PCIRST#

+5VS

R74
4.7K_0402_5%

1

1

2

CLK_PCI_SD

2

RP9
4.7K_8P4R_1206_5%

1
2
3
4

R126
10K_0402_5%

B

SUSP

W83L518D BSB_LQFP48

8
7
6
5

2

R85
@33_0402_5%

C99
@10P_0402_50V8K

SUSP
2
G
Q51
2N7002_SOT23

PCICLK
RESERVED
LFRAME#
lESET#
PME#
VSS
SCBC4
SCBC8
SCBRST#
SCBIO
SCBCLK
SCBPSNT

3

S

R120
10_0402_5%

HIGH

2E

LOW

4E

10

SD4
SD3

SD2
SD1

8
7
6
5
4
3
2
1

SD5

9

SD_CLK
+SD3_VCC

1

2

R326
10K_0402_5%

SDCLK_48M

MMC_DET#

1

C112
18P_0402_50V8K

2

2

2E/4E#

B

JP20
R323
@10K_0402_5%

MMC_DET# Wr_Pt_Vss
SD4
SD3
Vss2
SDCLK
Vdd
Vss1
SD2
SD1

Vss3
Vss4
Wr_Pt

11
12
13
14

R76
1K_0402_5%
1
2

SDLED

25

SD5
SD_SOCKET

R90
@33_0402_5%

R119

SD SOCKET

2

1M_0402_5%

C98
@10P_0402_50V8K
A

A

Compal Electronics, Inc.
Title

SD CARD Controller/Socket

5

4

3

2

Size
B

Document Number

DCL56 LA2231

Date:

Thursday, February 05, 2004

Rev
0.3
Sheet
1

24

of

45

A

B

C

D

E

USB_CS
+3V

2

2

USB_AS USB_BS
C15
470P_0402_50V7K

1

1

R30
R31
100K_0402_5%
100K_0402_5%

+5V

2

1

1

2

+
C28
150U_D2_6.3VM

1

1

U4

USBP2USBP2+

1
2
3
4

JP8

C34
@470P_0603_50V8J

1

1
2
3
4

USB2USB2+

2
2

C35
0.1U_0402_16V4Z

GND
IN
EN1#
EN2#

OVCUR#0

8
7
6
5

OC1#
OUT1
OUT2
OC2#

OVCUR#0 14
OVCUR#5 14

TPS2042ADR_SO8

2

SUYIN USB Connector 2569A-04G3T-B

1

1

2

C36
2 @470P_0603_50V8J

14

1

USB_EN#

2

USBEN#
R24
100K_0402_5%

1

R32
@0_0402_5%

2

14
14

R33
0_0603_5%
1
1
R38
0_0603_5%

USB_AS

USB_BS
+3V

1

2

R5
100K_0402_5%

R11
100K_0402_5%

+5V

2

2

USB_CS

1

+
C20
C13
150U_D2_6.3VM
2
2
470P_0402_50V7K

C29
470P_0402_50V7K

2

2

2

1

1

+
C33
150U_D2_6.3VM

1
1

U2

14
14

R185
0_0603_5%
1
1
R186
0_0603_5%

USBP0USBP0+

JP6

1
2
3
4

USB0USB0+

2
2

C23
@470P_0603_50V8J

1

1

2

2

10
12

VCC VCC
D0- D1D0+ D1+
VSS VSS

5
6
7
8

G2
G4

9
11

G1
G3

SUYIN_2522A-08G2T-KU_8P

C22
@470P_0603_50V8J

R184
0_0603_5%
1
1
R187
0_0603_5%

USB5USB5+

1

1

2

2

2
2

USBP5- 14
USBP5+ 14

1
2
3
4

1
C14
0.1U_0402_16V4Z

GND
IN
EN1#
EN2#

OC1#
OUT1
OUT2
OC2#

OVCUR#2

8
7
6
5

OVCUR#2 14

TPS2042ADR_SO8

2

C24
@470P_0603_50V8J
USBEN#

C25
@470P_0603_50V8J

JP23

2

2

2

+3VALW

3

R422
10K_0402_5%

R421
10K_0402_5%

8
7
6
5
4
3
2
1

3

ACES_85205-0800

2

B

B

2

B

2

1

1

1

R420
10K_0402_5%

8
7
6
5
4
3
2
1

30 PWR_SUSP_LED
30,34 PWR_LED
30 BATT_LOW_LED
30 BATT_CHGI_LED
30
WLLED
30
BTLED

+3VALW
+3VALW

PADS_LED#

28

NUMLED#

3

1

NUM_LED#

28

3

CAPSLED#

C

E

1

Q45
2SC2411K_SOT23

C

3

E

PADSLED#

C

E

28

1CAPS_LED#

Q47
2SC2411K_SOT23

Q46
2SC2411K_SOT23

JP9

Reserve For ABO

1
3
5
7
9
11
13
15
17
19

+3VALW
+5VS
+5VALW

1

+5VALW

2

R461
@100K_0402_5%

SCROLLED#

1
28

PADS_LED#
NUM_LED#
CAPS_LED#
SDLED

USER_BTN1# 28
USER_BTN2# 28
ON/OFFBTN# 30,34

HDD_LED# 29
CD_FDD_LED# 29
SDLED 24

SUYIN_80065A-020G2T
4

SDLED
D

3

4

2
4
6
8
10
12
14
16
18
20

S

Q52
@2N7002_SOT23

2
G

Title

Compal Electronics, Inc.
USB

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

B

C

D

Size
Document Number
Custom DCL56 LA2231
Date:

Thursday, February 05, 2004

Rev
0.3
Sheet
E

25

of

45

A

B

C

D

DTR#1
RTS#1
TXD1
CTS#1
RI#1
RXD1
DCD#1
DSR#1

SUPER I/O SMsC FDC47N217

DTR#1
RTS#1
TXD1
CTS#1
RI#1
RXD1
DCD#1
DSR#1

E

34
34
34
34
34
34
34
34
+3VS
RP37
DCD#1
RI#1
CTS#1
DSR#1

1

1
2
3
4

8
7
6
5

1

4.7K_8P4R_1206_5%

LAD0
LAD1
LAD2
LAD3

LPC_FRAME#
LPC_DRQ#1

15
16

LFRAME#
LDRQ#

17
18

PCI_RESET#
LPCPD#

7,13,19,20,21,22,23,24 PCIRST#
1
2
+3VS
R248 10K_0402_5%
14,19,23,28 PM_CLKRUN#
12 CLK_PCI_SIO
13,19,24,28 SIRQ
+3VS
12 CLK_14M_SIO
17
17
17
17
27

2

+3VS

1

CLK_PCI_SIO

1
R253
CLK_14M_SIO

2
10K_0402_5%

17 VGA_VID

2
R439 100K_0402_5%

+3VS

R226
R223
R222
R216

2 1K_0402_5%
2 10K_0402_5%
2
10K_0402_5%
2
10K_0402_5%

1
1
1
1

CLKRUN#
PCI_CLK
SER_IRQ
IO_PME#

9

PID0
PID1
PID2
PID3
BT_DET

PID0
PID1
PID2
PID3
BT_DET

19
20
21
6

CLK14

62
63
64
1
2
3
4
5

RXD1
TXD1
DSR#1
RTS#1
CTS#1
DTR#1
RI#1
DCD#1

IRRX2
IRTX2
IRMODE/IRRX3

37
38
39

IRRX

INIT#
SLCTIN#
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
SLCT
PE
BUSY
ACK#
ERROR#
ALF#
STROBE#

41
42
44
46
47
48
49
50
51
53
55
56
57
58
59
60
61

LPTINIT#
LPTSLCTIN#
LPD0
LPD1
LPD2
LPD3
LPD4
LPD5
LPD6
LPD7
LPTSLCT
LPTPE
LPTBUSY
LPTACK#
LPTERR#
LPTAFD#
LPTSTB#

VTR
VCC
VCC
VCC
VCC

7
11
26
45
54

SERIAL I/F

10
12
13
14

CLOCK

23
24
25
27
28
29
30
31
32
33
34
35
36
40

GPIO40
GPIO41
GPIO42
GPIO43
GPIO44
GPIO45
GPIO46
GPIO47
GPIO10
GPIO11/SYSOPT
GPIO12/IO_SMI#
GPIO13/IRQIN1
GPIO14/IRQIN2
GPIO23

8
22
43
52

VSS
VSS
VSS
VSS

RXD1
TXD1
DSR1#
RTS1#
CTS1#
DTR1#
RI1#
DCD1#

FIR

PARALLEL I/F

14,24,28 LPC_FRAME#
14 LPC_DRQ#1

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

GPIO

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

LPC I/F

U32
14,24,28
14,24,28
14,24,28
14,24,28

POWER

LPC47N217_STQFP64

R229
2 1K_0402_5%

1

+5V
JP27

IRRX
30
IRTXOUT 30
IRMODE 30

RXD1
TXD1
DSR#1
RTS#1
CTS#1
DTR#1
RI#1
DCD#1

LPTINIT# 27,34
LPTSLCTIN# 27,34
LPD0
27,34
LPD1
27,34
LPD2
27,34
LPD3
27,34
LPD4
27,34
LPD5
27,34
LPD6
27,34
LPD7
27,34
LPTSLCT 27,34
LPTPE
27,34
LPTBUSY 27,34
LPTACK# 27,34
LPTERR# 27,34
LPTAFD# 27,34
LPTSTB# 27,34

1
2
3
4
5
6
7
8
9
10

1
2
3
4
5
6
7
8
9
10

@96212-1011S

2

IRRX
1
2
R219
@1K_0402_5%
+3VS

C252
4.7U_0805_10V4Z

1

1

2

C316
2
0.1U_0402_16V4Z

1

1 C287
0.1U_0402_16V4Z

2 C253
2
0.1U_0402_16V4Z

Base I/O Address
* 0 = 02Eh
1 = 04Eh
3

3

CLK_14M_SIO
RP36
R252
@10_0402_5%

2

2

R246
10_0402_5%

1

2

+3VS

1

1

CLK_PCI_SIO

1
C302
18P_0402_50V8K

2

PID0
PID1
PID2
PID3

1
2
3
4

C324
@10P_0402_25V8K

8
7
6
5
100K_8P4R_1206_5%

4

4

Compal Electronics, Inc.
Title
PROPRIETARY NOTE

A

B

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
C

D

SUPER I/O
Document Number

Rev
0.3

DCL56 LA2231
Thursday, February 05, 2004

Sheet
E

26

of

45

JP10
31

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29

MOD_MIC

23 WLAN_BT_CLK
23 WLAN_BT_DATA
R61
1
2
+3V
L8
0_0402_5%
1
2 +3VS_MBC
+3VS
CHB1608B121_0603
14,31 IAC_SDATAO
14,31 IAC_RST#

MONO_OUT/PC_BEEP AUDIO_PWDN
GND
MONO_PHONE
AUXA_RIGHT
Bluetooth Enable
AUXA_LEFT
GND
CD_GND
+5V
CD_RIGHT
USB Data+
CD_LEFT
USB DataGND
PRIMARY DN
3.3Vaux
5Vd
GND
GND
3.3Vmain
AC97_SYNC
AC97_SDATA_OUT AC97_SDATA_IN1
AC97_RESET#
AC97_SDATA_IN0
GND
GND
AC97_MSTRCLK
AC97_BITCLK

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30

MDC_DN# 28
MD_SPK 31
L7
RFOFF# 28,30 CHB1608B121_0603
+5VS_MBC1
2
+5VS
USB3+ 1
2 R58 0_0603_5%
USBP3+ 14
USB3- 1
2 R60 0_0603_5%
USBP314
1 R63
2
+3VS
10K_0402_5%
BT_DET
BT_DET 26
IAC_SYNC 14,31
R64 2
1
0_0402_5%
1
2
IAC_SDATAI1 14
R65
R66
22_0402_5%
1
2
RFOFF#

ACES_88021-30

10K_0402_5%

MBC CONN.

1

R68

2

IAC_BITCLK 14,31

22_0402_5%
+3VS_MBC

+3V

1

2

+5VS_MBC

1
C56
1U_0805_25V4Z

2

1
C63
1U_0805_25V4Z

2

C62
1U_0805_25V4Z

+5V_PRN

PARALLEL PORT

10
9
8
7
6

LPTSLCT
LPTPE
LPTBUSY
LPTACK#
RP35

+5V_PRN

CP1

1
2
3
4
5

+5VS

R3
2.2K_0402_5%

AFD#/3M#
LPTERR#
LPTINIT#
LPTSLCTIN#

1
2
3
4

LPTSLCT
LPTPE
LPTBUSY
LPTACK#

4
3
2
1

220P_1206_8P4C_50V8K
CP2
5
6
7
8

F D0
F D1
F D2
F D3

1
2
3
4

220P_1206_8P4C_50V8K
CP4
8
7
6
5

F D4
F D5
F D6
F D7

1
2
3
4

220P_1206_8P4C_50V8K
CP3
8
7
6
5

2.7K_10P8R_1206_5%
+5V_PRN
26,34

LPTSTB#

F D4
F D5
F D6
F D7

LPTSTB#
AFD#/3M#

R4

26,34

LPTAFD#

26,34

LPTERR#

26,34

LPTINIT#

26,34 LPTSLCTIN#

1

R1
33_0402_5%
INIT#
2

1

R166
33_0402_5%
SLCTIN#
2

F D0
LPTERR#
F D1
INIT#
F D2
SLCTIN#
F D3
F D4
F D5

RP3
RP2
LPD0
LPD1
LPD2
LPD3

1
2
3
4

F D6
F D0
F D1
F D2
F D3

8
7
6
5

68_8P4R_1206_5%
LPD7
LPD6
LPD5
LPD4

2.7K_10P8R_1206_5%
+5V_PRN

RP1

1
2
3
4

F D3
F D2
F D1
F D0

8
7
6
5

F D7
F D6
F D5
F D4

F D7
26,34

LPTACK#

26,34

LPTBUSY

26,34

LPTPE

26,34

LPTSLCT

LPTACK#
LPTBUSY
LPTPE
LPTSLCT

1

33_0402_5%
R2

+5V_PRN

10
9
8
7
6

1

D4
RB420D_SOT23

AFD#/3M#
LPTERR#
LPTINIT#
LPTSLCTIN#

1
2
3
4
5

2

33_0402_5%

2
C4
220P_0402_50V7K

1
14
2
15
3
16
4
17
5
18
6
19
7
20
8
21
9
22
10
23
11
24
12
25
13

8
7
6
5

220P_1206_8P4C_50V8K

JP2
LPTCN-25

68_8P4R_1206_5%

26,34

LPD[0..7]

LPD[0..7]

Compal Electronics, Inc.
Title
PARALLEL/MDC PORT
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Size

Document Number
DCL56 LA2231

Date:

Thursday, February 05, 2004

Rev
0.3
Sheet

27

of

45

4

VR_ON
2
47K_0402_5%
SYSON
2
@10K_0402_5%
SUSP#
2
@10K_0402_5%

2

CLK_PCI_LPC

R307
10_0402_5%
1

1
R453
1
R294
1
R292

2

C

+3VALW

C400
18P_0402_50V8K

2

1

1

R286
100K_0402_5%

19,21,22,23 1394_PME#
19,21,22,23 PCM_PME#
19,21,22,23 MDM_PME#
19,21,22,23 LAN_PME#
19,21,22,23 MINI_LAN_PME#

R446
1

+3VALW

100K_0402_5%
PCI_PME#

ECAGND

BATT_TEMP
1
2
C424
0.01U_0402_16V7K

17
17
30
25

+3VALW

TP_CLK
TP_DATA
LID_SW#
USER_BTN2#

2

5
6

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15

49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68

KBSOUT0
KBSOUT1
KBSOUT2
KBSOUT3
KBSOUT4
KBSOUT5
KBSOUT6
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12
KBSOUT13
KBSOUT14
KBSOUT15

B

8
7
6
5

LID_SW#
USER_BTN1#
USER_BTN2#

PORTB

PORTD-1

105
106
107
108
109

TINT#
TCK
TDO
TDI
TMS

JTAG debug port

110
111
114
115
116
117
118
119

PSCLK1/IOPF0
PSDAT1/IOPF1
PSCLK2/IOPF2
PSDAT2/IOPF3
PSCLK3/IOPF4
PSDAT3/IOPF5
PSCLK4/IOPF6
PSDAT4/IOPF7

PS2 interface

PORTE

IOPC0
IOPC1/SCL2
IOPC2/SDA2
IOPC3/TA1
IOPC4/TB1/EXWINT22
IOPC5/TA2
IOPC6/TB2/EXWINT23
IOPC7/CLKOUT

168
169
170
171
172
175
176
1

IOPD0/RI1/EXWINT20
IOPD1/RI2/EXWINT21
IOPD2/EXWINT24/RESET2

26
29
30

IOPE4/SWIN
IOPE5/EXWINT40
IOPE6/LPCPD/EXWIN45
IOPE7/CLKRUN/EXWINT46

2
44
24
25

PORTH

C RY1

158

32KX1/32KCLKIN

C RY2

160

32KX2

33,42
SYSON
17,19,29,33,38,41 SUSP#
33,39,40,41 VR_ON
20
PCMRST#
14 RSMRST#
23,30 KILL_SW#
17
ENBKL
17
BKOFF#

10K_8P4R_1206_5%

+5VS

29

RP43
1
2
3
4
5

173
174
47

IOPM0/D8
IOPM1/D9
IOPM2/D10
IOPM3/D11
IOPM4/D12
IOPM5/D13
IOPM6/D14
IOPM7/D15

PORTK
PORTM

PORTL

SEL0#
SEL1#
CLK

TP_DATA
TP_CLK
+5VS

10K_10P8R_1206_5%

PC87591L-VPCN01 A2_LQFP176

+3V

1

L16 2
ECAGND
1
FBM-L11-160808-800LMT_0603

2

R316
100K_0402_5%

19

PCM_RI#

1

2

2
1
AD_BID1

RING#

ACIN

13,34,35

SLP_S3#

14,34

IOPJ0/RD
IOPJ1/WR0

150
151

FR D#

SELIO#

152

SELIO#

IOPD4
IOPD5
IOPD6
IOPD7

41
42
54
55
143
142
135
134
130
129
121
120

KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15

IOPL0/A16
IOPL1/A17
IOPL2/A18
IOPL3/A19
IOPL4/WR1#

113
112
104
103
48

KBA16
KBA17
KBA18

JP14

1
0_0402_5%
2
0_0402_5%
2
0_0402_5%

1
2
3
4
5
6
7
8
9
10

EC_TINIT#
EC_TCK
EC_TDO
EC_TDI
EC_TMS
EC_URXD
EC_UTXD
EC_USCLK

KBA0

1
2
3
4
5
6
7
8
9
10

KBA1
KBA2
KBA3
KBA4
KBA5

@96212-1011S

1
R302
1
R299
1
R296
1
R295
1
R293
1
R291

2
@1K_0402_5%
2
1K_0402_5%
2
@1K_0402_5%
2
1K_0402_5%
2
@1K_0402_5%
2
1K_0402_5%

I/O Address
BADDR1(KBA3) BADDR0(KBA2)

*

Data

Index

0

0

2E

2F

0

1

4E

4F

1

0

1

1

(HCFGBAH, HCFGBAL) (HCFGBAH, HCFGBAL)+1
B

FRD#
FWR#

29
29

SELIO#

29

Reserved

ENV0 (KBA0)
IRE
OBD
DEV
PROG

ENV1 (KBA1)

0
0
1
1

TRIS (KBA4)
0
0
0
0

0
1
0
1

SHBM(KBA5)=1: Enable shared memory with host BIOS
TRIS(KBA4)=1: While in IRE and OBD, float all the
signals for clip-on ISE use
C RY11
2 C RY2
R283
*
@20M_0603_5%

R282
0_0402_5%

KB910
R282

87591

0

120K

R283 no stuff
FSTCHG

36
C356

2
R449
1
R448
1
R447

2
+3VALW

+5VALW

NUMLED# 25
PADSLED# 25
CAPSLED# 25
SCROLLED# 25

IOPK0/A8
IOPK1/A9
IOPK2/A10
IOPK3/A11
IOPK4/A12
IOPK5/A13_BE0
IOPK6/A14_BE1
IOPK7/A15_CBRD

1
2
R454
100K_0402_5%
C

ON/OFF# 30
SLP_S5# 14
SHDD_LED# 16
PM_CLKRUN# 14,19,23,26

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

8.2K_0402_5%
2

For EC Tools

EC_THRM# 14
USER_BTN1# 25
RFOFF# 27,30

USER_BTN1#

R451

1

R321
@1K_0402_5%

B_PCIRST#

PWRBTN_OUT# 14
EC_SMB_CK2 4,34
EC_SMB_DA2 4,34
FAN1_TACH 30

PCI_PME#

AD_BID0

C559
@0.1U_0402_16V4Z

EC_SMB_CK1 29,38
EC_SMB_DA1 29,38
B_PCIRST# 13,16,17

EC_SMB_CK2
EC_SMB_DA2

R450
100K_0402_5%

10P_0402_25V8K

1

2

SCI#

20M

1
X4
2

C355
12P_0402_50V8J
A

14
32.768KHZ_12.5P_1TJS125DJ2A073

Compal Electronics, Inc.
Title

RING#
PROPRIETARY NOTE

R315
@0_0402_5%

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

EC PC87591
Size
Document Number
CustomDCL56 LA2231
Date:

5

+3VALW

R322
100K_0402_5%

2

A

96

10
9
8
7
6

FSEL#

148
149
155
156
3
4
27
28

EC_URXD
EC_UTXD
EC_USCLK
EC_SMB_CK1
EC_SMB_DA1
B_PCIRST#

138
139
140
141
144
145
146
147

PORTJ-2

GND1
GND2
GND3
GND4
GND5
GND6
GND7

PS1_CLK
PS1_DATA
PS2_CLK
PS2_DATA

FSEL#

SYSON
SUSP#

EXTID2

INVT_PWM 17
BEEP#
32

NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10

8
7
6
5

16

ACOFF
36
LLBATT# 14
EC_ON
30
EC_LID_OUT# 14
MDC_DN# 27

IOPI0/D0
IOPI1/D1
IOPI2/D2
IOPI3/D3
IOPI4/D4
IOPI5/D5
IOPI6/D6
IOPI7/D7

PORTD-2

17
35
46
122
159
167
137

1
2
3
4

IOPJ2/BST0
IOPJ3/BST1
IOPJ4/BST2
IOPJ5/PFS
IOPJ6/PLI
IOPJ7/BRKL_RSTO

INVT_PWM
FAN_PWM

IOPH0/A0/ENV0
IOPH1/A1/ENV1
IOPH2/A2/BADDR0
IOPH3/A3/BADDR1
IOPH4/A4/TRIS
IOPH5/A5/SHBM
IOPH6/A6
IOPH7/A7

PORTI

AGND

+5VALW
RP39

EXTID2

11
12
20
21
85
86
91
92
97
98

10K_8P4R_1206_5%

EC_SMB_DA2
EC_SMB_CK2
EC_SMB_DA1
EC_SMB_CK1

62
63
69
70
75
76

38

+3VALW

KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7

PORTJ-1

14
EC_SMI#
16 PHDD_LED#
23
WL_OFF#
14 EC_RIOUT#
21 EN_WOL#
12,14 SLP_S1#

6C/8C#

DAC_BRIG 17
EC_EN_FAN1 30
IREF
36
EC_EN_FAN2 30

124
125
126
127
128
131
132
133

RP40
8
7
6
5

32
33
36
37
38
39
40
43
153
154
162
163
164
165

PORTC

+3VALW
1
2
3
4

AD_BID0
AD_BID1
EXTID2

99
100
101
102

IOPB0/URXD
IOPB1/UTXD
IOPB2/USCLK
IOPB3/SCL1
IOPB4/SDA1
IOPB7/RING/PFAIL/RESET2

10K_8P4R_1206_5%

FSEL#
SELIO#
FR D#
EC_SMI#

D

BATT_OVP 36

1
Key matrix scan

RP42
1
2
3
4

1

IOPA0/PWM0
IOPA1/PWM1
IOPA2/PWM2
IOPA3/PWM3
IOPA4/PWM4
IOPA5/PWM5
IOPA6/PWM6
IOPA7/PWM7

PWM
or PORTA

KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7

PS1_CLK
PS1_DATA
PS2_CLK
PS2_DATA
TP_CLK
TP_DATA
LID_SW#
USER_BTN2#

161

GA20/IOPB5
KBRST/IOPB6

71
72
73
74
77
78
79
80

EC_TINIT#
EC_TCK
EC_TDO
EC_TDI
EC_TMS

DA0
DA1
DA2
DA3

DA output

IOPD3/ECSCI#

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

KSO[0..15]

1

G20
RCL#

GATEA20
RC#

KSI[0..7]

2

13
13

31
1
@0_0402_5%

KSO[0..15]

2

2
R445

SCI#

17

ADB[0..7]

1

14

KSI[0..7]

2

2

ECAGND

C558
0.1U_0402_16V4Z

17

KBA[0..18]

1

1

AD Input

ADB[0..7]

R452
100K_0402_5%

BATT_TEMP 38

2

C408
0.1U_0402_16V4Z

2

Host interface

81
82
83
84
87
88
89
90
93
94

4

C364
0.1U_0402_16V4Z

2

CLK_PCI_LPC
EC_RST#

AD0
AD1
AD2
AD3
IOPE0AD4
IOPE1/AD5
IOPE2/AD6
IOPE3/AD7
DP/AD8
DN/AD9

1

2
FBM-L11-160808-800LMT_0603

SERIRQ
LDRQ#
LFRAME#
LAD0
LAD1
LAD2
LAD3
LCLK
RESET1#
SMI#
PWUREQ#

KBA[0..18]

+3VALW

BATT_TEMP

IN

L17
1

7
8
9
15
14
13
10
18
19
22
23

1
2
R297 @0_0402_5%

1
+RTCVCC
0_0402_5%

OUT

13,19,24,26 SIRQ
14 LPC_DRQ#0
14,24,26 LPC_FRAME#
14,24,26 LPC_AD0
14,24,26 LPC_AD1
14,24,26 LPC_AD2
14,24,26 LPC_AD3
12 CLK_PCI_LPC
+3VALW
R444
47K_0402_5%

+3VALW

1

U36

2
R443

29
29

NC

+EC_AVCC

1

2

1000P_0402_50V7K

D

+RTCVCC

C387
0.1U_0402_16V4Z

1000P_0402_50V7K
2

2

0.1U_0402_16V4Z

C362

1
+3VALW
@0_0402_5%

NC

0.1U_0402_16V4Z

2

1

KB910 B1 mount R458, B2 mount R457
2
R442

3

2

C404

1

VBAT

2

1

C363

+EC_AVCC

95

1

1
C361

C384

+3VALW

1
0_0402_5%
1
@0_0402_5%
1

AVCC

2

1

+3VS

VCC1
VCC2
VCC3
VCC4
VCC5
VCC6

C421

2
R441
2
R440

+3VALW

VDD

1

0.1U_0402_16V4Z

2

34
45
123
136
157
166

+3VALW
0.1U_0402_16V4Z

3

16

5

4

3

2

Rev
0.3
Sheet

Thursday, February 05, 2004
1

28

of

45

+5VALW
C318
2 0.1U_0402_16V4Z

20

1

SELIO#

2

B

11
1

CP
MR

SN74LVC32APWLE_TSSOP14

1
2
R284
20K_0402_5%

+5VALW

1

VCC

LARST#

AA

3

O

2

14
B

O

SN74LVC32APWLE_TSSOP14

7

14
P

9

U33C

8

SN74LVC32APWLE_TSSOP14

SUSP#

+5VALW

17,19,28,33,38,41

2
G

C83
2 0.1U_0402_16V4Z

C59
2 0.1U_0402_16V4Z

12

3

1

EC_FLASH# 14

S

B

1
D

P

13

G

2
U33D
SN74LVC32APWLE_TSSOP14

1

A

O
7

FWE# 11

FWR#

U16

28

8
7
6
5

28,38 EC_SMB_CK1
28,38 EC_SMB_DA1

A0
A1
A2
GND

AT24C16N10SC-2.7_SO8

VCC
WE*
A17
A14
A13
A8
A9
A11
OE*
A10
CE*
DQ7
DQ6
DQ5
DQ4
DQ3

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17

FWE#
KBA17
KBA14
KBA13
KBA8
KBA9
KBA11
FR D#
KBA10
FSEL#
ADB7
ADB6
ADB5
ADB4
ADB3

+3VALW

1

NC
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
VSS

VCC
WP
SCL
SDA

1
2
3
4

R77
100K_0402_5%

2

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

R78
100K_0402_5%

Q35
2N7002_SOT23

U9
KBA18
KBA16
KBA15
KBA12
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2
KBA1
KBA0
ADB0
ADB1
ADB2

1

+5VALW

2

1

R278
100K_0402_5%

14

KBA[0..18]
ADB[0..7]

KBA[0..18]
ADB[0..7]

A

+3VALW

+3VALW

28
28

10
6

G

B

+3VALW

U33B

O
7

5

A

PWR_LED# 30
PWR_SUSP_LED# 30
BATT_LOW_LED# 30
BATT_CHGI_LED# 30
WL_LED 30
BT_LED# 30
HDD_LED# 25
CD_FDD_LED# 25

C360
1U_0805_25V4Z

+3VALW

4

U34
SN74HCT273PW_TSSOP20
2
5
6
9
12
15
16
19

P

SELIO#

7

28

U33A

Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7

G

A

D0
D1
D2
D3
D4
D5
D6
D7

P

1

G

2

KBA2

AA

3
4
7
8
13
14
17
18

GND

1
2
C350
0.1U_0402_16V4Z
14

1

+3VALW
R455
100K_0402_5%

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

10

+3VALW

FRD#

28

FSEL#

28

29F040/SST39VF040_PLCC

Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

BIOS & EXT. I/O PORT
Size
B

Document Number

Date:

Thursday, February 05, 2004

Rev
0.3

DCL56 LA2231
Sheet

29

of

45

A

B

C

D

E

+3VALW

RTC Battery

1

Power ON Circuit
BATT1

1

14

8

5

I

7

C441
1U_0805_25V4Z

1

1

1
3

0.1U_0402_16V4Z
1
2
8

R377
100K_0402_5%
EN_FAN
1

SN74LVC14APWLE_TSSOP14

3

C560

+IN

Fan Control circuit

-IN

1
R458

2
100_0402_1%

U47A
LM358A_SO8

4

R460
10K_0402_5%

Kill SWITCH

1

OUT

2

2

G

G
7

2
G Q16
2N7002_SOT23

+12V

12

O

1000P_0402_50V7K

P

P

14

U39F

I

SYS_PWROK 14

G

O
G

I

U39C
SN74LVC14APWLE_TSSOP14
O 6

22K

D

ON/OFFBTN#

S

P

14

P

2

9
2

2

22K

2

Q37
DTC124EK_SOT23

@STS-05

U39D
SN74LVC14APWLE_TSSOP14

D21
RLZ20A_LL34

2
1
2
R336
33K_0402_5%

1

4

R376
180K_0402_5%

13

3

+3V

1

13

+3V

+3V

EC_ON

EC_ON

1

C417

SW2

+3VS

O 11
+3V POWER

28

7

OE#

D24
BAS40-04_SOT23

35

1

R335
4.7K_0402_5%

CHGRTC

I

51ON#

DAN202U_SC70

1

+RTCVCC

U41D
SN74LVC125APWLE_TSSOP14

12

ON/OFF# 28

2

1

+3VALW

3
1

+3VALW

3

3

ON/OFFBTN#

25,34 ON/OFFBTN#

ML1220T13RE
LID_SWITCH

2

1

D6

4

D26
@DAN217_SOT23

Power BTN

RTCPWR

1

2

1

2

R287
100K_0402_5%

2

2

3

2

1

2

LID_SW#

LID_SW#

3

SW1
28

+12V
+5V

+3V

2

1

2

-IN

OUT

RFOFF# 27,28

R181
@13K_0603_1%

4

O
-IN

U28
@LMV321M5X_SOT23-5

SW3
1

2
R182
@7.32K _0402_1%

47K

2

PWR_LED# 29

29

D

S

10K

2
G

WL_LED

Q44
2N7002_SOT23

R16
240_0603_5%

E

C

FIR Module
R35
240_0603_5%

+3VS

1
1

2
25 PWR_SUSP_LED

PWR_LED 25,34
25

+3VS

WLLED

+5VALW

47K

C

B

BATT_CHGI_LED# 29

10K

29

47K

E
C50
10U_1206_10V4Z

2

BT_LED#

10K
Q53
DTA114YKA_SOT23
R75
240_0603_5%

C

1

1

2

2

26

IRRX

C52
0.1U_0402_16V4Z

U8
IRRX
IR_3VS

2
4
6
8

IRED_C
RXD
VCC
GND

BATT Low LED(Amber)
A

1
3
5
7

IRTXOUT
IRMODE
1

IRTXOUT
IRMODE
2
R42
@0_0402_5%

26
26

IR_VISHAY_TFDU6101E-TR4_8P

SD/MODE: SHUTDOWN MODE, HIGH ACTIVE
MODE: HIGH/LOW SPEED SELECT

Bluetooth LED(Blue)
R462
240_0603_5%

Compal Electronics, Inc.

2
25 BATT_LOW_LED

IRED_A
TXD
SD/MODE
MODE

4

2

R72
@240_0603_5%
2

1

B

1 1

1 1

C

3

Q12
DTA114YKA_SOT23

1

E

2
10K

4

E

2
Q14
@DTA114YKA_SOT23

IR_ANODE

2
R56
4.7_1206_5%

1

B

R54
47_1206_5%

3

3

+5VALW

47K

R59
4.7_1206_5%
2

2

+5VALW

29 BATT_LOW_LED#

3
1

3
47K

2

2

R69
@240_0603_5%

B
2

10K

C

Q9
DTA114YKA_SOT23

1 1

Q11
@DTA114YKA_SOT23

C
1 1

10K

R418
100K_0402_5%

B

2

29 PWR_SUSP_LED#

FAN1_TACH

3

Q2
DTA114YKA_SOT23
2

E

1

B

E

3

47K

28

Wireless LED(Amber)

1

Power LED(Green)

Suspend LED(Amber)

ACES_85205-0300

2

+5VALW

3

3

+5VALW

1 1

3

1
2
3

R196
10K_0402_5%

LM358A_SO8
+5VALW

JP7

+3V

DS-1200-02

7

FAN2

D13
1N4148_SOT23
Q3
@2SA1036K_SOT23

2

1

1

2
3

3 1

5
2

+IN

2
D15
1SS355_SOD323

E

C30
0.1U_0402_16V4Z
2

2

1

C205
@0.1U_0402_16V4Z

D5
@1N4148_SOT23

1

1

1
2
R412
@0_0402_5%

EN_FAN 1

2

P

KILL_SW# 23,28

G

2

28 EC_EN_FAN2

KILL_SW#

1

1 C12
10U_1206_10V4Z

2
B

1

1

6

2
R437
0_0402_5%
1
2
R438
@0_0402_5%

C

1

28 EC_EN_FAN1

1

2

3
3
+IN

2

7
5

Q28
FMMT619_SOT23

1
2
R457 @0_0402_5%

2

1

+5V
R411
100K_0402_5%

SN74LVC14APWLE_TSSOP14

U47B

C212 0.1U_0402_16V4Z
1

2

10

1

O

3

2
14
I

2

G

11

R28
@3.6K_0402_5%

+3V

D25
DAN217_SOT23

P

U39E

2
R459
8.2K_0402_5%

2

1

+3V

BATT_CHGI_LED 25

25

BATT Charge LED(Green)
B

Title

BTLED

Power OK/Reset/RTC battery/Lid Switch/Int. KB
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C

D

Size

Document Number

Rev
0.3

DCL56 LA2231
Date:

Sheet

Thursday, February 05, 2004
E

30

of

45

5

4

+5VS

AC97 Codec

3

+5VS

R740

U40

2

VIN

2

DELAY SENSE or ADJ

6

1

7

ERROR

CNOISE

1

GND

3

R400
150K_0603_1%
2

VOUT

5

MODE

Stuff

+VDDA

1

2

+VDDA

4

C480
0.1U_0402_16V4Z

8

SD

1

SI9182DH-AD_MSOP8

No-Stuff
C485
4.7U_0805_10V4Z

PROPRIETARY NOTE

14.318MHz External
24.576MHz Crystal
or External Colck

2

1

1

+AUD_VREF

C472
0.1U_0402_16V4Z

1

C484
4.7U_0805_10V4Z

1

2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

R401
51K_0603_1%

D

2

D

C133
0.1U_0402_16V4Z

1

1

2

2

C129
4.7U_0805_10V4Z

+AVDD_AC97
L18
+VDDA

1

2

CHB2012U170_0805

+3VS

1
C444
0.1U_0402_16V4Z

1

2

1
C475
10U_1206_10V4Z

2

1

2
R349
0_0805_5%

1

2
R344
0_0805_5%
2
R405
0_0805_5%

1
C432

2

C430
10U_1206_10V4Z

2

1

INT_CD_L

16

INT_CD_R

1
C452

2

CDROM_L

CDROM_R
2
1U_0603_10V6K

2
R382
2
R388

1

2

1

2
CD_L_R

1
20K_0402_5%
1
20K_0402_5%

CD_R_R
CD_GNA

0.01U_0402_16V7K 1

B

27

2 C439

32

2
1
R374
2.4K_0402_5%
2
1
R373
10K_0402_5%
32

MD_SPK

MIC

MIC

+AUD_VREF

C134
1
2

MONO_IN

2

14,27 IAC_RST#
14,27 IAC_SYNC

1

R356
100_0402_1%

32
SPDIF

1

34

1

1

9
DVDD2

DVDD1

36

MONO_OUT

37

VIDEO_R

TRUE_LOUT_L

39

LINE_IN_L

TRUE_LOUT_R

41

VIDEO_L

LINE_IN_R
BIT_CLK

6

SDATA_IN

8

XTL_IN

2

XTL_OUT

3

CD_L
CD_R

1

LINER

1
1
2

R359
22_0402_5%
1
2

1
2
R358
22_0402_5%

R360
@1M_0402_5% Y2
1

MIC1

PHONE
PC_BEEP

AFILT1

29

AFILT2

30

VREFOUT

28

VREF

27

VRDA

32

VRAD
DCVOL
VAUX
GPIO0
GPIO1

31
33
34
43
44

NC
AVSS1
AVSS2

40
26
42

RESET#
SYNC

2 R357
@10K_0402_5%

1

CD_GND

MIC2

LEFT

RIGHT
2 C453
4.7U_0805_10V4Z
2 C448
1U_0603_10V6K
1 C447
1000P_0402_50V7K
1
2 C425
@22P_0402_50V8J

2

LEFT

32

RIGHT

32

MOD_MIC 27

IAC_BITCLK 14,27

IAC_SDATAI0 14

C477
1 1000P_0402_50V7KNPO

2
1
C478
1000P_0402_50V7K

2

1

24.576MHz_16P_3XG-24576-43E1

1

1
R398
0_0402_5%

2

+AUD_VREF

2

SDATA_OUT

45
46

NC
XTLSEL

47

EAPD

48

SPDIFO

4
7

DVSS1
DVSS2

B

C426
C427
22P_0402_50V8J 22P_0402_50V8J
2
2

1
C476

1
C473

2
R397
@0_0402_5%

1

2

2

1

2

C482
4.7U_1206_16V6K

C481
1U_0603_10V6K
0.1U_0402_16V4Z

1 C479
@0.01U_0402_16V7K
1U_0603_10V6K

2

ALC202 E_LQFP48

2

2

2

LINE_OUT_R

R386
6.8K_0402_5%

R384
@0_0402_5%
A

1

R375
@0_0402_5%
R378
@0_0402_5%

CD_GNA

1

R385
20K_0402_5%

EAPD

LINE_OUT_L

AUX_R

1

2

CD_AGND

10
5

14,27 IAC_SDATAO

16

11

AUX_L

LINEL

2

16

1

1
6.8K_0402_5%
34 LINEIN_L
1
6.8K_0402_5%
34 LINEIN_R

1
35

1

2
R380
2
R389

2

C451
1 1000P_0402_50V7K
C464
2 1000P_0402_50V7K
C466
2 4.7U_0805_10V4Z

1

1
2
C548
0.1U_0402_16V4Z
C445
1U_0603_10V6K

2 C440
14
0.1U_0402_16V4Z
1
2 C124
15
0.1U_0402_16V4Z
1
2 C126
16
0.1U_0402_16V4Z
1
2HP_SENSE 17
C128 0.1U_0402_16V4Z
C140
23
@1U_0603_10V6K
C474
24
@1U_0603_10V6K
1
2 C443
18
1U_0603_10V6K
1
2 C454
20
1U_0603_10V6K
1
2 C449
19
1U_0603_10V6K
C_MIC
1
2 C467
21
1U_0603_10V6K
1
2
22
0.1U_0402_16V4Z
C438 C_MD_SPK
13
1U_0603_10V6K
12
1

0.1U_0402_16V4Z

2

C547
0.1U_0402_16V4Z
1
2

AVDD2

2 HP_SENSE
0_0402_5%

AVDD1

1
R456

32 NBA_PLUG

38

C

U38

25

C

A

Compal Electronics, Inc.
Title

AC97 Codec
Size
B
Date:
5

4

3

2

Document Number

Rev
0.3

DCL56 LA2231
Thursday, February 05, 2004

Sheet
1

31

of

45

A

B

C

D

E

+5VAMP
1

+5VAMP
W=40Mil

2

SHUTDOWN#

C167
4.7U_0805_10V4Z

D

1

2
G

RIGHT

1

1

1
+5VAMP

2

1

R152
1K_0603_5%

2

31

+5VAMP

1

1

+5VAMP

R395
@100K_0402_5%
2

1

D

2
G
Q39
S
@2N7002_SOT23

PR_HPSENSE# 34
1

SE/BTL#
2 C152
0.1U_0402_16V4Z
INTSPK_L2
INTSPK_R2

1

2

R404
100K_0402_5%

22
15
14
11
9
16
10
8

D

1

1 C145
0.47U_0603_16V4Z

1

C147
C146
0.47U_0603_16V4Z
2
2
2
0.47U_0603_16V4Z

S

3

1
12
13
24

1

2 NBA_PLUG
G
Q23
@2N7002_SOT23

2

1

+5VAMP

R145
@100K_0402_5%

2
R417
0_0402_5%

1

31

PVDD SHUTDOWN#
PVDD
SE/BTL#
VDD
PC-BEEP
BYPASS
PC-ENABLE LOUTVOLUME
ROUTLOUT+
LIN
ROUT+
RIN
LLINEIN
RLINEIN
GND
LHPIN
GND
RHPIN
GND
GND
CLK

2
2 R467
VOLAMP
3
R153 1
INTSPK_L1
4
2 @0_0603_5%
INTSPK_R1
R156 1
21
2 @0_0603_5%
5
1
2 C162
1
2 C545
0.47U_0603_16V4Z
0.47U_0603_16V4Z
23
6
1
2
1
2
C172
20
0.47U_0603_16V4Z
C546
0.47U_0603_16V4Z
17
2 C160
0.47U_0603_16V4Z
1
TPA0132
2 C169
0.47U_0603_16V4Z
C158
0.047U_0603_16V7K
1
2
C170
0.1U_0402_16V4Z

2
R155
1K_0603_5%

2

31

U25
7
18
19

1

34 LINEOUT_L
34 LINEOUT_R
LEFT

EAPD

3

@100K_0402_5%

2
R151
0_0402_5%

3

+5VAMP
1
2
L12
CHB2012U170_0805
1
2
L19
CHB2012U170_0805

+5VS

1

Q24
S
2N7002_SOT23

1

2

2

1

1

C155
0.1U_0402_16V4Z

R148
100K_0402_5%

1

2

2

R396
8.2K_0402_5%
VOLAMP

R390
1K_0402_5%

5

C483
150U_D2_6.3VM

1
2
3
4

47_0402_5%
1
2
R406
INTSPK_L1 1
2
1
2
R407
47_0402_5%
C486
150U_D2_6.3VM

INTSPK_R1 1

2

+

2

1

JP19
JP18
INTSPK_R1
INTSPK_R2
INTSPK_L1
INTSPK_L2

+

ACES_85205-0400

NBA_PLUG

31 NBA_PLUG

L20 1
2 INTSPK_R1-3
FBM-11-160808-700T
1
2 INTSPK_L1-3
L21
FBM-11-160808-700T
1

4
3
6
2
1

1

C533 C528
330P_0402_50V7K
2
2

PHONEJACK

330P_0402_50V7K

BEEP#
+3V

+3V

1

+VDDA

1

R371
10K_0402_5% 2

+3V POWER

2

1

2

E

Q38
2SC2411K_SOT23

MONO_IN
2
C436
1U_0603_10V6K

1
2

MONO_IN 31

R160
100K_0402_5%

R365
2.4K_0402_5%

Q40
2SC2411K_SOT23

E

2
C188
1U_0603_10V6K

R410
@2.2K_0402_5%

R409
2.2K_0402_5% JP21
5

+3V

MIC

MIC

1
2
L22
FBM-11-160808-700T

1

P

2
O
+3V POWER

2

1

C540
220P_0402_50V7K

PHONEJACK

2

R383
560_0402_5%
C450
1U_0603_10V6K

U39B
SN74LVC14APWLE_TSSOP14

4

1

I
7

4

1

1

SPKR

4

G

14

3

MICPHONE
JACK

3
6
2
1

14

31

EXT.

4

1

R381
560_0402_5%
C446
1U_0603_10V6K

2
B
3

1

PCM_SPK#

C
2
B

2

C
19

2

1

1

R161
18K_0402_5%
2

1
2
R162
18K_0402_5%

2

2

1

+AVDD_AC97

C437
10U_1206_10V4Z

1

1
2
R379
560_0402_5%
C442
1U_0603_10V6K

+3V POWER
C471
0.22U_0603_10V7K

3

U39A
SN74LVC14APWLE_TSSOP14
1
2
O 2

2

14
I

1

1

7

SN74LVC125APWLE_TSSOP14

P

R393
8.2K_0402_5%
1
2

+AVDD_AC97

1

1

3

R364
10K_0402_5%

2

3

C469
0.1U_0402_16V4Z

1

O

2

G

OE#

U41A

G

I

2

1

14
P
2

1

1

R392
100K_0402_5%

7

+3V
3

1

28

2

D23
RB751V_SOD323
2

R387
10K_0402_5%

Compal Electronics, Inc.
Title

AMP & Audio Jack
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

B

C

D

Size

Document Number

Rev
0.3

DCL56 LA2231
Date:

Sheet

Thursday, February 05, 2004
E

32

of

45

A

B

C

D

E

+12VALW

+5VALW

1

1

+5VALW to +5V Transfer
R188
100K_0402_5%

+5VALW

R73
10K_0402_5%

U27

SI4800 1N_SO8
SUSON

+5VALW

42
1
C208
2
10U_1206_10V4Z

1

28,42

D

S

Q8
1

2
G

SYSON

2N7002_SOT23

C209
300_0603_5%
2 0.1U_0402_16V4Z
D

S

2 SYSON#
G
Q29
2N7002_SOT23

1
C196

C195

2 10U_1206_10V4Z

2

SYSON#

SYSON#

2

+5VALW

22U_1206_10V4Z
1

4.7U_1206_16V6K

R189

+5VALW

1
C197

1

1

1
2
3
4

S1
S2
S3
G

3

0.01U_0402_16V7K
2
1M_0402_5%

S

D1
D2
D3
D4

2

2
G
Q27
2N7002_SOT23

3

SYSON#
1

1

8
7
6
5

C206

3

1

R180

1 2

1
1

D

2

2

+5V

R146
10K_0402_5%
2

+1.5VALW to +1.5VS Transfer
+3VALW to +3V Transfer

24,42

U6

C75

1

10U_1206_10V4Z
2
2
10U_1206_10V4Z

2

R70
300_0603_5%
22U_1206_10V4Z 0.1U_0402_16V4Z
2
2

SI4800 1N_SO8
C79

C73

1
C46
10U_1206_10V4Z

10U_1206_10V4Z

2

1

C45

1

2
2
10U_1206_10V4Z

SI4800 1N_SO8

2

C44

SYSON#
2
G
Q13
2N7002_SOT23

3

2N7002_SOT23

2

D
RUNON

S

S

Q7

C49
C51
R281
@300_0603_5%
22U_1206_10V4Z 0.1U_0402_16V4Z
2

10U_1206_10V4Z

D
SUSON

D

2
G

1

S

3

1

1

C77

2

1

1

1

1

C72

1
2
3
4

S1
S2
S3
G

1

2

D1
D2
D3
D4

SUSP#

17,19,28,29,38,41 SUSP#

1
2
3
4

S1
S2
S3
G

2

U13
8
7
6
5

D1
D2
D3
D4

1

8
7
6
5

1
+3V

1

+3VALW

SUSP

SUSP

+1.5VS

3

+1.5VALW

SUSP
2
G
Q30
@2N7002_SOT23

+12VALW

1

+12VALW

2

1M_0402_5%

3

1
3

+1.5VALW
+5V
R423
100K_0402_5%

1

D

2

SI4800 1N_SO8

1
1

2

C151

1

C144

3

D

S

S

C552

S

Q48
SI2302DS_SOT23

R425
120K_0402_5% 0.01U_0402_16V7K

+1.5VS_ODEM PJP32
+1.5VS
PAD-OPEN 2x2m
2
1

Q49
2N7002_SOT23

2
G

28,39,40,41 VR_ON

D

2
G

Q50
2N7002_SOT23

R139
4

22U_1206_10V4Z 0.1U_0402_16V4Z 300_0603_5%
2
2

1

S1
S2
S3
G

1

+3VALW to +3VS Transfer

C165
10U_1206_10V4Z

1

C164

D1
D2
D3
D4

1
2
3
4

3

+3VS
U24

22U_1206_10V4Z
2

1

+12V

2
G

8
7
6
5

Q31
SYSON#
2
G 2N7002_SOT23

S

100K_0402_5%

+3VALW

3

300_0603_5%

S

R424

D
RUNON

Q21
SUSP
2
G 2N7002_SOT23

Compal Electronics, Inc.

S

3

2
22U_1206_10V4Z

R34
C341
4.7U_1206_16V6K

3

1

Q6
2 SUSP
G 2N7002_SOT23

C5
4.7U_1206_16V6K

2

1

S

2

D

1

C166

D

C19
2 0.01U_0402_16V7K

+5VALW

1

2
2
G
Q32
2N7002_SOT23

C27
C26
300_0603_5%
0.1U_0402_16V4Z
2
2 22U_1206_10V4Z

D

4

+12V
1

2

R29

1

1

2

1
1

1

S

2

3

2
G
Q1
2N7002_SOT23

SI4800 1N_SO8
RUNON

1

SUSP

1
2
3
4

1

R15

S1
S2
S3
G

3

D

D1
D2
D3
D4

2

1

2
1

3

R249
100K_0402_5%

U3
8
7
6
5

Q33
NDS352AP P-CHANNEL_SOT23

R258
51K_0402_5%

3

R10
100K_0402_5%

2

1

1

+5VS

G

+5V
+5VALW

D

+12VALW

R71
100K_0402_5%

1

S

C340
0.1U_0402_16V4Z

+5VALW to +5VS Transfer

Title

DC/DC Circuit Interface
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
A

B

C

D

Document Number

Rev
0.3

DCL56 LA2231
Sheet

Thursday, February 05, 2004
E

33

of

45

5

CF1
1

4

CF4

CF6

1

1

CF8
1

CF3
1

3

2

1

CF7
1

SMDC40M80 SMDC40M80 SMDC40M80 SMDC40M80 SMDC40M80 SMDC40M80
+5VS
CF11
1

CF13

+5V

SMDC40M80 SMDC40M80 SMDC40M80 SMDC40M80 SMDC40M80 SMDC40M80
CF14

CF17

158
157

+5V
VIN_SPR

CF18
1

1

+12V

1

1
1

1
1

1
1

1

1

1

1

1

1

1

1

1

1

1

1
1

1

1
1

B

CF15

1

1

1

1

1

C

CF16

78
R201
79
2
1 DETEC1
+5V
SMDC40M80 SMDC40M80 SMDC40M80 SMDC40M80 SMDC40M80 SMDC40M80
@1K_0402_5% 80
+3V
C216
C219
VA_ON#
81
2
1
2
2 @0.1U_0402_16V4Z
R207
82
13,28,35
ACIN
@0_0603_5%
@1U_0603_10V6K
83
84
26
CTS#1
85
26
RTS#1
86
26
DSR#1
87
26
RI#1
FD4
FD1
FD6
FD3
FD5
FD2
88
26
DCD#1
89
1
1
1
1
1
1
26
RXD1
90
26
TXD1
FIDUCAL
FIDUCAL
FIDUCAL
FIDUCAL
FIDUCAL
FIDUCAL
91
26
DTR#1
92
93
26,27 LPTSLCTIN#
H5
H6
H13
H12
94
26,27 LPTINIT#
H_T315B354D165
H_T315B354D165
H_T315B354D165
H_T315B354D165
95
26,27 LPTERR#
96
26,27 LPTAFD#
97
26,27
LPTSLCT
98
26,27
LPTPE
99
26,27 LPTBUSY
100
26,27
LPTACK#
101
26,27
LPTSTB#
102
26,27
LPD7
H2
H3
H4
H1
H9
H16
H20
H23
103
26,27
LPD6
H_S354D118 H_S354D118 H_S354D118 H_S354D118 H_S354D118 H_S354D118 H_S354D118 H_S354D118
104
26,27
LPD5
105
26,27
LPD4
106
26,27
LPD3
107
26,27
LPD2
108
26,27
LPD1
109
26,27
LPD0
110
111
H22
H21
H14
H7
H11
H17
H19
112
H_S354D118 H_S354D118 H_S354D118 H_S354D173 H_S354D173 H_S354D173 H_S354D162
113
114
2
1
14
USBP1R192
@0_0603_5%
115
116
2
1
14
USBP1+
R193
@0_0603_5%
117
118
2
1
14
USBP4R194
@0_0603_5%
119
120
2
1
14
USBP4+
R195
@0_0603_5%
121
H15
H10
H8
H18
122
H_S354D173
H_S276D165
H_S276D165
H_O146X122D146X122N
123
124
125
32 PR_HPSENSE#
126
14 MBAY_DISABLE
127
31
SPDIF
128
1
2
R190
129
@0_0805_5%
130
131
31 LINEIN_L
132
31 LINEIN_R
133
134
32 LINEOUT_L
135
32 LINEOUT_R
136
137
138
2
1
22 1394_TPB1R202
@0_0603_5%
139
140
2
1
22 1394_TPB1+
R203
@0_0603_5%
141
142
2
1
22 1394_TPA1R204
@0_0603_5%
143
144
2
1
2
1
22 1394_TPA1+
R206
R205
@0_0603_5%
145
@20K_0402_5%
ACTIVITY#
146
21 ACTIVITY#
147
PREP
RJ45GND
148
149
150
1
2
2
1 R200
@75_0402_1%
151
152
153
C215
154
@2200P_0402_50V7K
1

D

CF12

C250
@0.1U_0402_16V4Z
2
1

JP24

1

P1
P2

G1
G2

156
155

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75
A76
A77

B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B67
B68
B69
B70
B71
B72
B73
B74
B75
B76
B77

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77

R220
@100K_0402_5%
2
+5VS

5

CF10
1

U30

ON/OFFBTN# 25,30

4

+3V
PWR_LED 25,30

P

CF9
1

A

1 1

G

CF2
1

B

2

Y

D

SLP_S3# 14,28

@TC7SH08FU_SSOP5

3

CF5
1

+3V

EC_SMB_DA2 4,28
EC_SMB_CK2 4,28
2
R52 2
R51 2
R50
2
R49 2
R48

1
1 @0_0603_5%
1 @0_0603_5%
@0_0603_5%
1
1 @0_0603_5%
@0_0603_5%

2
R47 2
R46 2
R45

1
1 @0_0603_5%
1 @0_0603_5%
@0_0603_5%

COMPS
CRMA
LUMA

17,18
17,18
17,18

1

CRT_VSYNC 18
CRT_HSYNC 18
DDCC
18
DDCD
18
HPD
17
B
G
R

1

C217
2
@1U_0603_10V6K

C251
2 @0.1U_0402_16V4Z

17,18
17,18
17,18

DVI_DDC_CLK 17
DVI_DDC_DATA 17
DVI_D2-

17

DVI_D2+

17

DVI_D1-

17

DVI_D1+

17

C

DVI_CLK- 17
DVI_CLK+ 17

DETEC2
2
LINK10_100#
RJ45GND

DVI_D0-

17

DVI_D0+

17

B

R214
@1K_0402_5%
1
+5V
LINK10_100# 21
2
1
1
R215@75_0402_1%

2

C248
@2200P_0402_50V7K

@JAE_WD-154S4V-VF

A

A

Compal Electronics, Inc.
Title

Skew Hole
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

Size

Document Number

Rev
0.3

DCL56 LA2231
Date:

Thursday, February 05, 2004

Sheet
1

34

of

45

A

B

C

D

PJP11
VS

1

VIN

4 G

PR1
2
1M_0603_1%

1

2

PU1A

2

PR5
2
22K_0603_5%

1

1

PC2

PC3

100P_0603_50V8J

+

2

-

PC6

1000P_0603_50V7K 100P_0603_50V8J

ACIN

13,28,34

PACIN

36,37

1

PACIN

1
PZD1

4
PR6
20K_0603_1%

2

1000P_0603_50V7K

3

1

1
PC5
2200PF_50V
PC4

2

PC1

2

2
SINGA 2DC-S026-B07_3P

2

5 G

1

1

1
2

1

1

2

2

4 G

PR4
2
10K_0603_5%

1

LM393M

1

1

1

PR7
10K

Vin Detector

RLZ4.3B_LL34

0.1UF_50V

2

2

2

1

3 G

PR2
10K_0603_5%

1

1

VS
PR3
84.5K_0603_1%

2

PCN1

VIN_SPR
PL27
CHC4532U800_1812

8

VIN

PL1
CHC4532U800_1812

2

2
SINGATRON 2DC-S026-I07

1

2
5 G

1

1

2

3 G

High 18.764 17.901 17.063
Low 17.745 16.903 16.038

RTCVREF

1

PR8
10K_0603_5%

3.3V

2

VIN

PD48

2

VSB

1

PD2
1N4148_SOD80

PR168
2
1K_1206_5%

PR10

1
RB751V_SOD323

1

PR9
2
1K_1206_5%

1

PD3

2

BATT+

1

1

@RB751V_SOD323

33_1206_5%

VS
+5VP

2

2

PZD2

1

D

3

2

PR154
2
10K_0603_5%

1

PD4

VIN

2

PR11
2
1K_1206_5%

1

PR13
2
1K_1206_5%

1
1

1
PR155
150K_0603_5%

PZD5

2

2

2

RLZ5.1B_LL34
PC120

PR15
2
10K_0603_5%

2
66.5K_0603_1%

2

300_0603_5%

2

1

PC13
10UF_1206_10V

36

ACON

PC12
1U_0805_25V4Z

2

1

0.1U_0603_16V7K

PD30 RB751V_SOD323

PC11
1000P_0603_50V7K

2

1

PC10
PZD4

RLZ16B_LL34

1

PR309

6

PR19

1

5

-

1

2

2

3

1

3

1

300_0603_5%

2

+

2

3.3V

PR22

2 1

7

2

1

1

PR308
CHGRTC

RB751V_SOD323
1

PR21
137K_0603_1%

634K_0603_1%

PC9
1000P_0603_50V8J

3

2

14,37,38 MAINPWON

S-81233SG (SOT-89)

PD29
2

PR20
1
2
34K_0603_1%

PR18
200_0805_5%

PU2

PR17
412K_1%

PU1B
LM393M

1
RTCVREF

PR16
1
1.5M_0603_5%

2

1

1

2

2
22K_0603_5%

1

0.01U_0603_50V7K

2

1

2

1

2

PC8
0.1U_0805_25V7K

VL

3

B+

1

51ON#

PC7
0.22U_1206_25V7K

2

2
30

1

G

PR12
100K_0603_5%
PR14
1

1
1N4148_SOD80

1

RLZ6.2C_LL34

2

2

S

CHGRTCP

PQ1
1 TP0610T_SOT23

VL

1

Precharge detector
D

1

2

+2.5V

(6A,240mils ,Via NO.= 12)

1

+1.25VP

PAD-OPEN 3x3m

2

+1.25VS

PAD-OPEN 3x3m

PJP3
+1.5VALWP

2

1

+1.5VALW

(2A,80mils ,Via NO.= 4)

PQ2
2
2N7002_SOT23
G

PR23
PACIN
1
47K_0603_5%

2

S

16.69
15.6

16.05
15.02

15.42
14.35

1

+2.5VP

AC ADAPTOR

PJP2

3

PJP1

PQ3
DTC115EUA_SC70

(1A,40mils ,Via NO.= 2)

PAD-OPEN 3x3m

2

+5VALWP

+1.8VSP

1

+1.8VS

(1A,40mils ,Via NO.= 2)

PAD-OPEN 3x3m
PJP6

PJP5
4

+12VALWP

2

1

+12VALW

(120mA,20mils ,Via NO.= 1)

+5VALW

(5A,200mils ,Via NO.= 10)

1

+1.2VSP

PAD-OPEN 2x2m

1

2

1

4

(2A,80mils ,Via NO.= 4)
Compal Electronics, Inc.

PJP26

PAD-OPEN 3x3m
PJP8
+3VALWP

+1.2VS

PAD-OPEN 3x3m

PJP7
+5VALWP

2

Precharge detector
AC ADAPTOR
6.33
6.12
5.92
5.227 5.09
4.85

3

PJP4

2

1

+1.05VALWP

2

+3VALW

(5A,200mils ,Via NO.= 10)

2

+VCCP

PAD-OPEN 3x3m

(1A,40mils ,Via NO.=2)

PAD-OPEN 3x3m
A

B

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY
Title
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
Size
Document Number
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
B
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
Date: Thursday, February 05, 2004
INC.

DCIN & DETECTOR
Rev

DCL56 LA2231

C

Sheet
D

0.3
35

of

45

A

B

C

D

P2
PZD7

2

8
7
6
5

2

PL2
FBM-L11-453215-900LMAT_1812
1
2

1

PQ6
SI4835DY

1

1
2
3

4.7UF_1206_25V

PC15
4.7UF_1206_25V

1

1

ACOFF#

1
1

PR31
10K

OUTC2 GND

23

3

+INE2

CS

22

1

4

-INE2 VCC(o)

21

5

FB2

OUT

20

6

VREF

VH

19

7

FB1

VCC

18

4
PQ7
FDS4435

2

100K

RLZ22B

2
PD50
1SS355

2

1

2

1

2

2

ACOFF

28

PC21
0.1UF_16V

2

2

1

2

1

PC22
2200PF_50V

2
PR36
10K

1

IREF=1.033*Icharge
IREF=0.5166~3.1V FOR 8 CELL

PR42
100K_1%

PR40 10K
2
1

PC25
0.1UF_16V

LXCHRG

8

-INE1

9

+INE1

10

17

RT
-INE3

16

OUTC1

FB3

15

11

OUTD

CTL

14

12

-INC1

+INC1

13

1

2

FSTCHG

2
PR37
68K

1

PL3
22UH_SPC-1205P-220A
1
2
1

2
PR41
47K

1

2

PC24
1500PF_50V

PR39
0.02_2010_1%

PD8
EC31QS04

PR43
47K

2

MB3887_SSOP24

BATT+

2

2

FOR 4 CELL

2

IREF=0.5166~1.55V

CC=0.5~3.0A
CV=16.8V(8 CELLS LI-ION)

28

1

2

IREF

1

PR38
158K_1%
1
2

PQ8
DTC114EK

PC23
0.1UF_0805_25V
1
2

1

2

PC19
PR35
4700PF_50V 10K

PC17
0.1UF_0805_25V
PC20
0.1UF_50V
1
2

100K

PC27
4.7UF_1206_25V
2
1

2

1

2
3

PR34
10K_1%

1

5
6
7
8

PR33
34K_1%

1
PC18
0.1UF_16V

ACON

28

PD49
1SS355

1

1

2

PC16
220PF_50V

2

24

+INC2

1

S

2

35

VIN

1

2
G

1

PQ9
2N7002

1

2

2
PR28 47K

PZD8

3
2
1

-INC2

2
1

PACIN

3

35,37

1

PU3

1
2

D

2

PR27 10K

2

PR30
150K

2

PR32
10K

1

1

2

PC235
0.1U_0805_25V7M

PR29
0

PD6
1SS355
ACOFF# 1

8
7
6
5
4

PR26
200K

2

PC14

1
2
3

4

4

2

1

PR25
@10K

B++

PC240
2200P_0603_50V7K

PR24
0.02_2512_1%

PC26
4.7UF_1206_25V
2
1

1

1
2
3
1

8
7
6
5

VIN

B+

PQ5
SI4835DY

1

PQ4
SI4835DY

Iadp=0~2.84A

P3

RLZ24B

2

1

OVP voltage : LI-MH
8 CELL : 17.7V--> BATT_OVP= 2.2V
2

1
PR44
95.3K_0.1%

3

(BAT_OVP=0.124 *VMB)

VMB

2

1
PR45
143K_0.1%

4.2V

1

PC244
22PF

PR46
340K_1%

1

2

PC28
0.1UF_50V

2

95.3K_0.1%

1

VS

3

PR290

P
1

BATT_OVP

PU4A
3

+

0
-

2

LM358A_SO8

PR51

1

2.2K

PC32
0.01UF_0603_50V7

PR52
105K_0.5%

4

2

2

PC31
@0.1UF_16V

2

4

1

1

4

G

28

2

8

PR47
402K_1%

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
INC.
A

B

C

Compal Electronics, Inc.
Title

CHARGER
Size

B
Date:

Document Number

Rev

DCL56 LA2231
Thursday, February 05, 2004
D

Sheet

0.3
36

of

45

A

B

C

D

PC35
0.1UF_0805_25V
BST51

1

1

PC40
10UF_1206_25V

1

PC39
@10UF_1206_25V

2

PC237
0.1U_0805_25V7M

1

PDH5

PQ82
SI4814DY

PR56
0

PDH51

2

8

1

7

2

3

6

4

5

2

PR61
10K

7

PC48
100PF

28

1

1

2
+5VALWP
PC49
4.7UF_1206_10V

VL

+

PC53
100PF

1

2

2

1

8

PR63
10.2K_1%

680PF

1

PR66
0

1
PU19
XC6202-SOT-89

2

1

2

2
PR64
10K_1%

PC50
+5VP

PR60
0.012_2512_1%

2.5VREF

1

RUN/ON3

PR59
2M

2

1

CSH5

1

1
2
1

PD11 3.57K_1%
EC31QS04

PACIN

PLX5

2

1
2
3
10
23

4
5
18
16
17
19
20
14
13
12
15
9
6
11

PC45
47PF

1

35,36

2

1

PR62

2

PC46
150UF_D_6.3V_FP
2
1

STEER
SECFB
BST5
PU5
DH5
LX3
LX5
DL3
DL5
PGND
MAX1631CAI-T_SSOP28
CSH5
CSH3
CSL5
CSL3
FB5
FB3
SEQ
SKIP#
REF
SHDN#
SYNC
RST#
TIME/ON5

2

CSH3

2

+

DH3

26
24

2

PR58
+3VALWP
0.012_2512_1%

BST3

27

PDL5

GND

1
PR57
1M

25

21

22

2

RLZ16B
PZD6

V+

2

1

1

10U_SDT-1205P-100-118_5A_20%

2

1

4

PD12
EC31QS04

PR67

2

PR68

1

10K_1%

VL

1

2

2

1

PDH3

1

47PF
PC44

1

10U_SPC-1205P-100

2

2
PT1

PR286
0_0603_5%

1

B+++

PC51
150UF_D_6.3V_FP

3

2

2

PC33
4.7UF_1206_25V

PC242
0.1U_0603_16V7K

PDL3

4

1

3

5

2

6

PL5

2
PC241
2200P_0603_50V7K

PC41
4.7UF_1206_10V

2

2

PLX3

1

7

2

8

2

PC42
0.1UF_0805_25V

1

VL

PR55
10_1206

1

PD9
EC11FS2

PDH31
1

PD10

1

PR54
0

PQ83 SI4814DY

PC38
0.1UF_0805_25V
1
2

DAP202U

2

VS
PR285
0_0603_5%

180P_0805_200V7K22_1206_5%
PC34
PR53

1

3

2

PC243
2200P_0603_50V7K

PC236
0.1U_0805_25V7M

PC37
10UF_1206_25V

2

1
1

BST31

2

B+++
PC36
@10UF_1206_25V
2
1

B+

1

FBM-L11-322513-151LMAT
PL4
2
1

GND

2

1000PF_16V

+5V Ipeak = 6.66A ~ 10A

MAINPWON 14,35,38

1

1

+3.3V Ipeak = 6.66A ~ 10A

2

Vin

Vout

3

47K_1%

PC54

2

3

+12VALWP

PC55
1UF_16V

3

38

SPOK

PC43
4.7U_1206_25V6K

4

4

Compal Electronics, Inc.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY
Title
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
Size
Document Number
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
B
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
Date: Thursday, February 05, 2004
INC.

5V/3.3V/12V

Rev

DCL56 LA2231

A

B

C

Sheet
D

0.3
37

of

45

A

B

C

VMB
PR70
100K

2

1
PR72
100

PH1 under CPU botten side :
CPU thermal protection at 82 degree C
Recovery at 48 degree C

PC56
1000PF_50V

PC57
0.01UF_0603_50V7

VL
VL

VS
PR73
1K

1

PC58
0.1UF_50V
6C/8C#

PR77
25.5K_1%
2

1

28

PR76
15K_1%

PR148
47K_1%

PU6A
LM393M

8

1

PH1
10K_1%

PR69
1K

2

PR75
47K_1%

2

2

1

2

1

2

@1K_1%

1

1

PR291
PR71
100

BATT+

+3VALWP

1

1

D

1

ALI/NIMH#
AB/I
TSA
EC_SMD1
EC_SMC1

2

1
2
3
4
5
6
7

2

PJP9
BTC-07GR1 7P

PL6
BLM41P600S_1806
2
1

+3VALWP

+

2

-

1

2

PD16
@BAS40-04

PD14
@BAS40-04

1

3

4

VL
PR79
100K_1%

BATT_TEMP 28

EC_SMB_DA1 28,29
2

+3VALWP

14,35,37 MAINPWON
PR80
100K_1%

EC_SMB_CK1 28,29

1

2

2

3

2

PR74
3.24K_1%
PC59
1000PF_50V

PD15
@BAS40-04

PC60
0.22UF_0805_16V

3

2

1

1

PR78
1K

1
1SS355
PD27

1

TM_REF1

3

PQ41
DTC115EK

2

+12VALWP
100K

2

PR300

PR302

PR303

PR301

1

1
3

@22.1K _0402_1%

PQ78
@2SC2412K

1

2
1

2

2
3

1

PR281
37

SPOK

2
PQ73
@DTC115EK

1

2

PR81
3.24K_1%

1

B+

100K
@EC10QS04
4

100K

3

1

17,19,28,29,33,41 SUSP#

2

-

PD47

2

@100K

SPOK

4

PD28

7

PQ71
@IRLML5103

2
PQ72
@DTC115EK

1
2
@SBAT_CON_2P

6

LM393M
+

3

PR280
@100K

1

1

@100K_TH11-3H103FT_0603_1% PD45
@1SS355

PFS1
@0.75A_24V_miniSMDM075/24

PJP27

PC62
0.22UF_0805_16V

2

PH3

5

1SS355

@DAN217

@34.8K_0603_1%

PU6B

1

PR298

47K_1%

SBAT_VCC

2

3

3
PC246
@0.1U_0603_16V

PR149

3

PR83
10K_1%

TM_REF2

PD51

1

PR297

PR82
47K_1%

1

PQ79
@2N7002
@10K_0402_5%
2
1

PH2
10K_1%

PR304
@57.6K _0402_1%

1

3

VL

1

2

2
PR299

VL
PQ77
@2SA1037K

2

@49.9K_0603_1%

3

@1.5K_1206_1%

@120_1206_1%

1

@22.1K _0402_1%

1

PH2 near main Battery CONN :
BAT. thermal protection at 73 degree C
Recovery at 50(51) degree C

2

2

2

2

100K

VSB

100K

Compal Electronics, Inc.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY
Title
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
Size
Document Number
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
B
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
Date: Thursday, February 05, 2004
INC.

100K

3

BATTERY CONN / OTP/1.2V
Rev

DCL56 LA2231

A

B

C

Sheet
D

0.3
38

of

45

A

B

C

D

E

F

G

H

CPU-CORE
B+

CPUB+

CLKEN

REG

27

DPSHIFT

26

1

1 PR192 2
261_0402

16

TPWRGD

DACREF

25

17

DPWRGD

DACREFFB

24

18

SD

COREFB

23

19

SS

VCC

22

20

CLAMP

GND

21

PC140
0.047uF

1

3K
3205_VCC

1 PR193

2

2.7_0402

ADP3205

@100K_0402

PR189

PR190
910K_0402
2

137_1%_0402

PR191
324_1%_0402

+3VS

PC247
@27UF_23V

PC248
100UF_25V

PC130
4.7UF_1206_25V

5
6
7
8

PC129
4.7UF_1206_25V

2

5
6
7
8

5
6
7
8

1

3
2
1

GND
7

2

2

+5VDRIVE

1
2

IN

SD

CPUB+

PD37

2

1

1SS355

PR196
0
BST

10

4

4

PQ55

PR199
DRVH

3

DRVLSD SW

4

DLY

9 1
8

2

@IR7811A

2.2

IR7811A
PQ56

DRVL

6

PU13
ADP3415

PQ57
@SI4362DY

PL16
0.56U_ETQP4R36WFC_24A_20%
2
1

PQ58
SI4362DY

4

PR203

PR200
2mR
1

2

PC151
2

3

PC145
4.7UF_1206_25V

PWRGD

15

29
28

PC144
4.7UF_1206_25V

14

CSRAMP

PR201
10

DPSLP

PC143
4.7UF_1206_25V

DPRSLP

13

PC148
2200PF_0603

12

PR306
@0_0402
PR186

1

30

PC239
0.1U_0805_25V7M

31

CS+

PD35
EC31QS04

3
2
1

CS1

DPRSET

5
6
7
8

BOOTSET

11

PC136
PD34
EC31QS04
22nF

3
2
1

10

+CPU_CORE
+CPU_CORE

1

PR211
0_0402

3
2
1

32

3
2
1

33

CS2

5
6
7
8

CS3

VREF

PQ54
SI4362DY

4

5
6
7
8

VID0

9

4

PC149
1UF_0805

8

3205_VCC

5
6
7
8

34

PR174
0

DRVLSD1

2

41 VCCP_PWGD

PR197
0

PR311

PR195
0
2

40 MCH_PWRGD

3205_SD#

VID1

1

PR214
0

28,33,40,41 VR_ON

7

PQ53
@SI4362DY

GND

12,14 VGATE

35

7

PR279
0

CLKEN#

PC138
0.01UF_0603_50V7

DRV1

0.56U_ETQP4R36WFC_24A_20%
PL15
PR175
2mR
2
1
2

ADP3415

PC162
4.7UF_0805_10V
VCC 5

2

VID2

6

PR188

PR277
0
PR278
0

14 PM_DPRSLPVR

6.81K_1%
12,14 STP_CPU#

6

PQ52
IR7811A

@IR7811A
DRVL

1

4

120K_0402

PR187

36

4
PQ51

PU11

PR202
0

4.12K_1%

DRVLSD2

2
2.2

2

DLY

3.9K_1%_0402

CPU_VID0

37

VID3

PC137

5

DRV2

5

10pF_0402

CPU_VID1

VID4

PR198
5.36K_1%_0402 PR194

5

DRVLSD3

VID5

4

PC150
0.1uF_10V_0402

CPU_VID2

39
38

10pF_0402

5

DRV3

3

470pF_0402

CPU_VID3

HYSSET

40

PC141

5

2

TSYNC

PC139

1

PR184
300K

PR183

300K

CPU_VID4

10nF_50V

2
PD36
1SS355
PR185

5

PSI

PC142

PR176
6.04K_1%
PR310
16K

CPU_VID5

PC161

5

1

0.1UF_10V_0402

20K_1%

PR276
0
PR172
23.7K_1%
PR173
0
PR177
0
PR179
0
PR180
0
PR181
0
PR182
0

PSI#

9 1
8

PR178
10

DRVLSD SW

4

PR171
5

PR170
DRVH

3

PC128
4.7UF_1206_25V

SD

10

PC133
2200PF_0603

2

0
BST

PC238
0.1U_0805_25V7M

IN

1

1

5
6
7
8

5

PR169

1

3205_SD#
PU12

1

1SS355

3
2
1

PC135
100P_0603_50V_V7

1

2

VCC

0_1206

PL14
KC-FBM-L11-322513-201LMAT
PC134
1UF_0805

PC127
4.7UF_0805_10V

PR284
+5VS

+5VDRIVE
PD33

PD38
EC31QS04

4

3

27nF

2.7

3
2
1

PC153
0.1UF_0805

PC152

3
2
1

3205_VCC

4.7UF_1206_16V

4

4

Compal Electronics, Inc.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY
Title
OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE
SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE
CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS
Size
Document Number
AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR
THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY
B
THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,
Date: Thursday, February 05, 2004

+VCC_H_CORE
Rev

DCL56 LA2231

A

B

C

D

E

F

G

Sheet

0.3
39
H

of

45

5

4

3

2

1

+1.5VALWPV/+1.2VSP

D

D

PC165
4.7U_1206_25V6K

PL18
FBM-L11-322513-201LMAT
1

+5VALWP

17

BOOT2

23

1

8

2

7

6

3

5

4

BOOT1

0_0603_5%

PR217
0_0603_5%

PR221
2.05K_0603_1%

5

UGATE1

4

PHASE1

PU16

PC171
4.7U_1206_25V6K

PC170
0.1U_0805_25V7M

PC176
0.1U_0805_25V7M

+1.2VSP
PL20
5UH_TPRH6D38_5R0-N
1
2

PR220
0_0603_5%

UGATE2

24

8

1

PHASE2

25

7

2

3

6

4

5

PR222
2.05K_0603_1%

ISL6225
7

ISEN1

ISEN2

22

2

LGATE1

LGATE2

27

3

PGND1

PGND2

26

9
10
8
15

VOUT1
VSEN1
EN1
PG1

VOUT2
VSEN2
EN2
PG2/REF

20
19
21
16

11

OCSET1

OCSET2

18

C

PQ66
SI4814DY
PC183
1.2NU_0603_50V7K

PC181
220UF_D_2V

28

PC174
1U_0805_50V7K
SOFT2

+

PR223
0_0603_5%
PR224
3.48K_0603_1%

PR230
@0_0603_5%

IS6225
PC186
@1000PF_50V

DDR

PR226
0_0603_5%

PC185
@1000P_0603_50V7K
PR227
@0_0603_5%

13

PR229
10K_0603_1%

PR219
0_0603_5%

GND

PR225
6.65K_0603_1%

VR_ON 28,33,39,41
PR287
1K_0603_5%

PR218
6
PQ65 SI4814DY

PC184
1.2NU_0603_50V7K

SOFT1

1

PC179
4.7U_0805_6.3V6K

2

PC178

220U_D_2V
2
1

+
+

PC175
0.1U_0805_25V7M

PL19
1.5UH_TPRH6D38_5R0-N
1
2

@220U_D_2V

1

+1.5VALWP

VIN

PC177
C

14

PC173
0.01U_0603_50V7K

VCC

PD41
2

3

DAP202U

1

PC168
@2.2U_0805_25V4Z

PC164
0.1U_0805_25V7M

12

PC169
2200P_0603_50V7K

PC167
2.2U_0805_10V6K

PR216
0_0603_5%

B+

2

4.7U_0805_6.3V6K
PC180

PC163
2200P_0603_50V7K

PR231
110K_0603_1%

PR228
10K_0603_1%

PR232
110K_0603_1%

B

B

VR_ON 28,33,39,41
+5VALWP

PR295
@0_0603_5%

PR233
0_0603_5%
+3VALWP

+5VALWP
PR234
0_0603_5%

PR235
47K_0603_5%

MCH_PWRGD 39

A

A

Compal Electronics, Inc.
Title

1.5V & 1.2V
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

Size

B

Document Number

Rev
0.3

DCL56 LA2231

Date: Thursday, February 05, 2004

Sheet
1

40

of

45

5

4

3

2

1

1

+2.5VP

PC250

+2.5VP
1

2

22U_1206_10V

+5VALWP2.5VREF

2

1

VSS

3

PC266
0.1U_0402_16V4Z

1

1
6

2

1
2

2

1

VTT

NE57814_HSO8
PC264
220U_B2_2.5VM

1

402K_0603_1%

PC268
10U_0805_10V4Z

PC267
0.1U_0402_16V4Z

+1.25VP
1
+
2

PC265
0.1U_0402_16V7K

1

2

1

2
1

1
2

D

2
G
RHU002N06_SOT323
PQ84

3

S

1

2
1

ExtRefIn

RefOut VttSense

+5VALWP

PR314
2

CM8562IS_PSOP8

VD

8

PC263
0.1U_0402_16V7K

(1.25V)

1U_0603_16V6K

4

PR315
100K_0603_1%

AGND

VTT

0.1U_0603_16V7K
PC253

REFEN

5

PC252
0.1U_0603_50V4Z

2

2

6

9

1

PR312
10_0603_1%

+
PC251

VCCA

VTT

4

PR313
300K_0603_0.5%

3

1

150U_D2_2V

PC254

2

+1.05VALWP

2

1

22U_1206_10V
PC262

PC261
22U_1206_10V

2

0_0603_1%

+2.5VP

D

1

7

5

2

AGND

STANDBY VDD

1

VFB

7

2

PGND

2

1

1

VIN

8

2

PR322
2

17,19,28,29,33,38 SUSP#

PU20
1

PR320
0_0402_5%

PU22

D

PQ85
DTC115EUA_SC70

2

VR_ON 28,33,39,40

C

3

C

2

PC255

1

+2.5VP

22U_1206_10V

+3VS

+5VALWP2.5VREF

PGND

8

VFB

AGND

7

2

PC260

3

VTT

VCCA

6

1

1U_0603_16V6K

4

VTT

REFEN

5

2
3

1
1

VCCP_PWGD 39

2

B

PR319
100K_0603_1%

2

PWDOUT

2

PC282
1000P_0603_50V7K

1

115K_0603_1%

VDDIN

VSS

1

+1.05VALWP

1

D

2
G
RHU002N06_SOT323
PQ86

3

S

1

2
1

1
PR317

PR332
2
0.1U_0603_16V7K
PC258

2
1

PC257
0.1U_0603_50V4Z

CM8562IS_PSOP8

300K_0603_0.5%

2
2

220U_D2_4V

PR335
47K_0603_5%

PU26
XC61CN0902MR

+5VALWP

2

1

+
PC256
B

PR316
10_0603_1%

1

AGND

VIN

2

9

+1.8VSP

1

PU21
1

DTC115EUA_SC70
2

SUSP#

17,19,28,29,33,38

3

PQ87

A

A

Compal Electronics, Inc.
Title

1.8V & 1.05V
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

Size

B

Document Number

Rev
0.3

DCL56 LA2231

Date: Thursday, February 05, 2004

Sheet
1

41

of

45

5

4

3

2

1

PL28
FBM-L11-322513-151LMAT_1210
+5VALWP

+2.5VP O.C.P. = 6.3A ~ 8.2A

1

1

PC273
1
2

1

PU23

VIN

D

PQ69
1
2
3
4

D1
G1
D1 S1/D2
G2 S1/D2
S2 S1/D2

8
7
6
5

SI4814DY_SO8
PD52

VCC

11

2

ILIM

1

PL25

EP10QY03
2

13

ISNS

12

PGND

9

VSEN

6

VOUT

5

PR324
0_0402_5%
2

3

EN

7

1

PR325
2K_0402_1%
1

1

SS
2

2
1

PC276
@560P_0603_50V7K

C

2

1

2
1

SYSON

2

28,33

PC275
0.1U_0402_10V6K

2

8

AGND

PGOOD

1
+
2

PC279
150U_D2_6.3VM

SW

0_0402_5%

2

10

PC274
0.1U_0603_25V7K

FPWM

1

LDRV

+2.5VP

PC278
1U_0805_25V4Z

14

1
SPC-5R0M

2

HDRV

2

PR329
18K_0603_1%

16

2

1
PR326
0_0402_5%
2
1

PR330
10K_0402_1%

PR323
1

15

1

BOOT

PC277
0.1U_0805_25V7K

PR331
110K_0603_1%
4
2
1

PR328
10_0603_5%

2

2
PC272
0.1U_0603_25V7K
2
1

PR327
10_1206_5%

1U_0805_25V4Z

PC271
10U_1206_25V6K

D

PC270
2200P_0402_50V7K
2
1

2

1

2
PC269
0.1U_0603_25V7K
2
1

1

B+

C

FAN5234QSCX_QSOP16

+2.5VP

PR336
10K_0603_0.5%

PC283
0.1U_0402_16V4Z

6

PU4B

PR337
10K_0603_0.5%

LM358A_SO8

1

5

-

PC284
0.1U_0402_16V4Z

1

2

2

PC285
10U_1206_10V4Z

+
0

1

7

2

+SDREF

1

2

(1.25V)

2

1

B

1

B

D
PQ89

PR338

1

2 @0_0402_5%

SUSP

PR339

1

2 0_0402_5%

SYSON# 33

S

24,33

3

2N7002_SOT23

2
G

A

A

Compal Electronics, Inc.
Title

2.5V & 1.25V
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

Size

B

Document Number

Rev
0.3

DCL56 LA2231

Date: Thursday, February 05, 2004

Sheet
1

42

of

45

5

4

3

2

Version change list (P.I.R. List)
Item
D

Fixed Issue

Reason for change

Rev.

PG#

Modify List

1

Page 1 of 1
for HW

VER

Phase

1.

IDE reset signal level error

Change signal level from 3V to 5V

P16

Delete D8,D9,R144,R147
Add U44,U45

DVT

2.

LED light not enough

Change VCC from +3VALW to +5VALW

P25

Add Q45,Q46,Q47
Add R420,R421,R422

DVT

3.

Change flash ROM size

Change from 4Mb to 8Mb

P29

Delete U9
Add U42

DVT

4.

Change flash ROM size

Change from 8Mb to 4Mb

P29

Delete U42, C549, R419, JP28
Add U9, C59

PVT

5.

Change USB Power

Change USB Power from +5VALW to +5V

P25

Change U2.2, U4.2 form +5VALW to +5V

D

PVT

C

B

C

Add R435 on PCM_SPK# and pull up to +3V

PVT

P20

Add R436 on S1_OE# to pull up to S1_VCC

PVT

Change FAN Connector

P30

Change FAN Connector JP7 from 4-Pin to
3-Pin

PVT

Add Bluetooth Detect Pin

P30

Add Bluetooth Detect Pin form Super
I/O GPIO20 to JP10 Pin20

PVT

6.

Noise when system boot

Change PCM_SPK# sequence

P19

7.

Some CF card can't read

Pull up S1_OE#

8.

Change FAN Connector

9.

Add Bluetooth Detect Pin

B

A

A

Compal Electronics, Inc.
Title

Note & Revision
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

4

3

2

Size

Document Number

Rev
0.3

DCL56 LA2231
Date:

Thursday, February 05, 2004

Sheet
1

43

of

45

5

4

3

2

Version change list (P.I.R. List)
Item
D

Fixed Issue

1

Reason for change

Rev.

change cpu core from two phase to one phase

PG#
39

Modify List

1

Page 1 of 1
for PWR

VER

Phase

1.delete
PC127,PU11,PD33,PR169,PR170,
PC134,PR174,PQ51,PQ52,PQ53,
PQ54,PC128,PC129,PC130,PC238,
PC133,PD34,PR175,PC136,PR178

DVT

D

2.add PR306:0, PQ76:SI4362,
PL28:0.6U
3.Change PR200 from 2m(CYNTEC) to 1m (DALE)
PC51 from 22nF to 33nF
PR190 from 620K to 910K
PR188 from 240k to 390k
PC143,PC144,PC145 from 4.7U from 10U
For new version FAN5236 &ISL6225, modify enable
function

2

40,41,42

C

3

modify for 3.3v to reduce power loss

4

modify 5V reference

5

modify charging current

37
37
35

modify bridge battery charging current

38

6

B

7

modify and to reduce 5VALWPS,3VALWPS output
recover edge voltage

8

modify precharge circuit

37

35

A

modify battery OVP:8 cell:2.2V

9

1. delete PR287, PR234, PR288, PR254, PR289, PR274
2. add PR295: 0, PR296: 0, PR297
3. change PC143,PC144,PC 145 from 4.7U to 10u

DVT
C

Change PC34 from 470PF to 180PF

DVT

change PR63 from 10k to 10.2k

DVT

Change PR22 from 200 to 300
Add
PR308 from 300

DVT

1. Add PR300:22.1K, PR301: 22.1K, PR302:442,
PR303:6.8K, PQ77:2SA1037K, PQ78: 2SC2412K,
PH3:100K ,PD51:DAN217, PQ79:
2N7002,PR299:49.9K, PR304 :57.6K, PC246:
0.1U, PR297:10K
2. Delete PD46

DVT

B

1.Change PD12 from EP10QY03 to EC10QS04
PD11 from EP10QY03 to EC10QS04
PU13(ADP3415 driver) VCC from +5VALWP
to +5VS
PU12(ADP3205 controller) VCC from
+3VALWP to+3VS
2.Delete PQ10,PQ11:SI4800DY,
PQ12,PQ13:SI4810DY, PC46,PC56
Add PQ82,PQ83:SI4814DY

DVT

1.Change PR17 from 150k to 412k
PR19 from 2.4M to 634K
PR20 from 10K to 34K
PR21 from 75K to 137K
2 Add PR309 :66.5K

DVT

A

1 change PR47 from 174k to 402k
Compal Electronics, Inc.

36
Title

6 cell 1.8V

PIR
Size

Document Number

Rev
0.3

DCL56 LA2231
Date:
5

4

3

2

Thursday, February 05, 2004

Sheet
1

44

of

45

5

4

3

2

Version change list (P.I.R. List)
Item
D

Fixed Issue

1

Reason for change

Rev.

change cpu core from two phase to one phase

PG#

Modify List

1

Page 2 of 2
for PWR

VER

Phase

1.ADD
PC127,PU11,PD33,PR169,PR170,
PC134,PR174,PQ51,PQ52,PQ53,
PQ54,PC128,PC129,PC130,PC238,
PC133,PD34,PR175,PC136,PR178

39

PVT

D

2.DELETE PR306:0, PQ76:SI4362,
PL28:0.6U
3.Change PR175,PR200 from 1m (DALE) TO
2m(CYNTEC), PC151,PC136 from 33nF to 22nF,
PR188 from 240k to 120k , ADD
PC128,PC129,PC130 : 4.7U
4.Change PR186 from 56 TO 137(Frequency from 300k to
250kHZ), 5. ChangePR188 from 240k to 120k(Vcore from
1.46 to 1.466v,vid code=1.468v when Io=0A), PR187 change
from 3.4k to 3.48k(Vboot=1.2v,and Vc4from0.741 to 0.752v)

C

1. ADD PR287, PR234, PR288, PR254, PR289, PR274 2.
3.ADD
40,41,42 DELETE PR295: 0, PR296: 0, PR297
PR287,PR288,PR289
4.Change PC174,PC198,PC222
FROM 0.01U TO 4.7U 16V

Change new version FAN5236d &ISL6225b to
ISL6225CA&FAN5236, modify enable function

2

C

3

modify FAN5236 RC feed back compasation

4

change cpu core cap to 6*4.7uF 1210 not
3*10uF due to 10uF cap height >2mm

39

modify bridge battery charging current:

38

40,41,42

PVT

PC183,PC184,PC207,PC208:FROM 0.01UF TO 1.2NF

PVT

PC128,PC129,PC130,PC143,PC144,PC145FROM
10UF TO 4.7UNF

PVT

change PR302 be120 1206,PR303 be1.5k 1206

PVT

change PR221,PR222,PR241,PR242 fom
1.27k(0603) to 1.05k(1206)

PVT

5
B

6

40,41

modify PU17,PU18 max current,OCP

7

36
modify charger CP point :from from 61.5W to 54W

8

39

modify and confirm PU12 Vref build time

B

PVT

change PR332 fom
21K(0603) to 26.1K(0603)
INCREASE PR310 10KB between PU12Vref(PIN9)
to PU12 VCC
add PFS1 0.75A/24V

FOR bridge battery safety, add PTC as protection

38

A

A

9

Compal Electronics, Inc.
Title

PIR
Size

Document Number

Rev
0.3

DCL56 LA2231
Date:
5

4

3

2

Thursday, February 05, 2004

Sheet
1

45

of

45

www.s-manuals.com



---

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Create Date                     : 2004:03:24 08:52:51Z
Modify Date                     : 2013:11:27 20:41:34+02:00
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