Compal LA 3301P Schematics. Www.s Manuals.com. R1.0 Schematics
User Manual: Compal LA-3301P - Schematics. Free.
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Page Count: 60
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
Cover Sheet
158Wednesday, March 07, 2007
Compal Electronics, Inc.
2007-03-07
BOM P/N :
PCB NO :
COMPAL CONFIDENTIAL
MODEL NAME :
IBQ00
M08 (UMA) Briscoe
uFCPGA Mobile Merom
Intel Crestline + ICH8M
REV : 1.0 (A00)
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
LA-3301P (DA80000771L)
45144631L01
PCB P/N: DA80000771L
BOM NO. 45144631L01
DAZ P/N:DAZZGX0010L
IBQ00
LS-3301P REV1
LED/B
PCB1
LS-3301P REV1 LED/B
IBQ00
LS-3302P REV1
IO/B
PCB1
LS-3302P I/O Board
Part Number Description
DA80000771L PCB ZGX LA-3301P
REV1 M/B UMA
MB PCB
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
Block Diagram
258Wednesday, February 14, 2007
Compal Electronics, Inc.
Clock Generator
DMI
Compal confidential
Model : IBQ00
Azalia Codec
Memory BUS
(DDR2)
+1.5V_RUN
100MHz
+1.8V_SUS 533 / 667MHz
PATA
MDC
CK505
STAC9205
Azalia I/F
LVDS
RJ11
D Moudle
+5V_MOD
+VDDA
+3.3V_RUN
BANK 0, 1, 2, 3, 4 ,5 ,6 ,7 ,8
DDRII-DIMM X2
+0.9V_DDR_VTT
+1.8V_SUS
Cable
+3.3V_SUS
CPU ITP Port
LVDS CONN
on M/B Board
+FAN1_VOUT
SATA
+3.3V_RUN
PWR Sequence
GUARDIAN III
EMC4001
Thermal
+3.3V_SUS
FAN
S-HDD
+5V_HDD
+1.05V_VCCP
DELL CONFIDENTIAL/PROPRIETARY
page 18
page 18
page6page 7
page 19
page 21,22,23,24
page 25 page 25 page 26
page 33
page 42
page 16,17
CRT CONN
page 20
LPC BUS
+3VRUN
33MHz
SMSC SIO
+3.3V_ALW
ECE5028
page 38
RGB
page 51
DVO
DVI Bridge
SI1362A
DVI
RGB
TV
DOCKING
BUFFER
page 35
DOCKING
PORT
page 36 page 30
PCI BUS
CardBus
OZ711 LQFP
+3VRUN 33MHz
IDSEL:AD17
(PIRQD#,GNT#1,REQ#1)
+3.3V_RUN
Mini Card2
+3.3V_WLAN
WLAN
+3.3V_RUN
Mini Card 1
PCI Express BUS
+1.5V_RUN+1.5V_RUN
page 28,29
GIGA Enthernet
+3.3V_LAN
RJ45
(+1.5V_RUN 100MHz)
BCM5755M
WWAN
page 34page 34
Bluetooth
USB[7]
48MHz
USB[9]
USB[6]
SC_USB
+3.3V_RUN
page 39
page 37
COM
+3.3V_SUS
ST M25P16
+3.3V_ALW
+RTC_CELL
MEC5025
page 39
SPI
Stick
page 40
Int.KBD &
Stick
page 40
+5V_RUN
Touch Pad
AMP & INT.
Speaker HeadPhone
& MIC Jack
+5V_RUN +3.3V_RUN
page 27 page 27
INT MIC
+VDDA
page 40
SPI
+5V_RUN
+5V_RUN
IO/B IO/B
+1.25V_RUN
uFCPGA CPU
INTEL
H_A#(3..35) H_D#(0..63)
Pentium-M
System Bus
FSB 800 MHz
1299pin BGA
Crestline
+1.8V_SUS
+VCC_CORE
+1.05V_VCCP
+1.5V_RUN
+1.05V_VCCP
478pin
Merom -4MB (Socket P)
+3.3V_RUN
+1.8V_RUN
page 7,8,9
page 10,11,12,13,14,15
INTEL
ICH8-M
676pin BGA
page 21,22,23,24
+1.05V_VCCP
+3.3V_RUN
+3.3V_SUS
+1.5V_RUN
USB0 : side pair top,
USB1 : side pair bottom
USB2 : Rear Left as viewed from the back,
USB3 Rear Right as viewed from the back
USB Ports X2
Smart Card
+5V_RUN
page 31
OZ77CR6
IO/Board
SLOT
+5V_SUS
USB[2,3]
USB Ports X2
+5V_SUS
page 32
USB[4]
USB[0,1] SIDE
REAR
IEEE1394
ECE1077
page 37 page 27
+3.3V_ALW
+3.3V_SUS
+RTC_CELL
page 30
PCI_PIRQA#
REQ#0
GNT#0
ME & LED
page 43
DC IN
page 44
Battery IN
page 44
3V / 5V /15V
page 45
page 46
1.8V / 0.9V/1.25V
page 47
1.5V / 1.05V
page 48
Vccore
page 49
Charger
page 50
Battery Select
Block Diagram
USB[5]
+2.5V_LAN
+1.2V_LAN
+1.25V_RUN
+3.3V_RUN
Biometric
page 40
Trough Cable
DOCK LPC BUS USB[8]
DOCK LPC BUS
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
Index and Config.
358Wednesday, February 14, 2007
Compal Electronics, Inc.
PIRQ
+1.05V_VCCP
PM TABLE
PCI DEVICE IDSEL
S0
PCI TABLE
S3
+3.3V_SUS
+5V_SUS
+5V_ALW
S5 S4/AC don't exist
+1.8V_RUN
+VCC_CORE
REQ#/GNT#
+5V_RUN
ON
power
plane
+3.3V_RUN
S5 S4/AC
+3.3V_ALW
State
+1.8V_SUS
OFFON
ON
ON
ON ON
OFF
OFF
OFF
OFFOFF
+0.9V_DDR_VTT
OZ711
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
2
3
1
4
USB PORT#
0
DESTINATION
6
5
7
ICH8-M
MINI CARD-2 WLAN
None
PCI EXPRESS
Lane 1
DESTINATION
Lane 2
Lane 3
Lane 4
+3.3V_RTC_LDO
+2.5V_RUN
REQ#1 / GNT#1AD17 PIRQD
AD24 REQ#0 / GNT#0
MINI CARD-1 WWAN
+1.5V_RUN
POWER STATES
S0 (Full ON) / M0
SLP
S3# SLP
S5#
HIGH
Signal
State
SLP
S4#
HIGH HIGH HIGH
S4
STATE# ALWAYS
PLANE
ON
M
PLANE
ON
SUS
PLANE RUN
PLANE CLOCKS
ON ON ON
S3 (Suspend to RAM) / M1 LOW HIGH HIGH HIGH ON ON ON ONOFF
S4 (Suspend to DISK) / M1 ON ON ON ONOFF
SLP
M#
HIGH
HIGH
LOW HIGH HIGH HIGHLOW
S5 (SOFT OFF) / M1 ON ON ON ONOFFLOW HIGH LOW HIGHLOW
S3 (Suspend to RAM) / M-OFF
S5 (SOFT OFF) / M-OFF
LOW HIGH HIGH HIGH LOW ON ONOFF OFF OFF
LOW LOW LOW LOW ON OFF OFF OFF OFF
LOW LOW LOW LOW LOW ON OFF OFF OFF OFF
S4 (Suspend to DISK) / M-OFF HIGH
8
9
+15V_ALW
PIRQADocking
Side Top
Side Bottom
Rear Left
Rear Right
Smart Card
Biometric
Card Bus
Bluetooth
Docking
WWAN
Lane 5
Lane 6
None
None
GIGA LAN
ECE 5028
1
2
3
4
None
None
None
None
+1.25V_RUN
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
Power Rail
458Wednesday, February 14, 2007
Compal Electronics, Inc.
+5V_SUS
BATTERY +PWR_SRC
ADAPTER
+VDDA
MAX9789A
FDS4435 +INV_PWR_SRC
RUN_ON
SI3456SI3456BDV
HDDC_EN#
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+5V_MOD
MODC_EN#
+VCC_CORE
ISL6236
+1.8V_SUS
RUNPWROK
ISL6260
CHARGER
DDR_ON
AUDIO_AVDD_ON
SUS_ON
+3.3V_ALW
ALWON
ISL6236
+15V_ALW
+5V_ALW
ALWON
SI3456BDV
ENAB_3VLAN
+3.3V_LAN
+3.3V_SUS
+5V_RUN
RUN_ON
+2.5V_LAN +1.2V_LAN
REGCTL_PNP12
REGCTL_PNP25
SI4810DY
RUN_ON
+3.3V_RUN
+5V_HDD
(Q24)
(PU11) (PU22)
+0.9V_DDR_VTT
TPS51100
(PU24)
0.9V_DDR_VTT_ON
+1.25V_RUN
M_ON
1.05V_RUN_ON
+1.05V_VCCP
SI3456BDV
+1.5V_RUN
1.5V_RUN_ON
ISL6236
(PU21)
+1.8VRUN
RUN_ON
(Q54)
(Q48)(Q56) (U37)
(PU20)
(Q69)
BCP69 MMJT9435T1G
(Q71)
(Q70)
(Q58)
SI4810DY
(Q52)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
SMBUS TOPOLOGY
558Wednesday, February 14, 2007
Compal Electronics, Inc.
MEC 5025
ICH8-M
INVERTER
ICH_SMBDATA
ICH_SMBCLK
SIO
PBAT_SMBCLK
PBAT_SMBDAT
CHARGER
AD19
AJ26
7
8
5
6
SMBUS Address [TBD]
CLK_SCLK
9
10
111
112
WWAN
SMBUS Address [TBD]
3032
SMBUS Address [TBD]
SBAT_SMBDAT
9
10 2'nd
BATTERY
3
4
SBAT_SMBCLK
100
99 THRM_SMBDAT
12
11
Intel LAN
C8C7
SMBUS Address [TBD]
(JLVDS)
LCD_SMBCLK
LCD_SMDATA
EMC4001
THRM_SMBCLK
+3.3V_SUS
2.2K
2.2K
4.7K
4.7K
2.2K
100 ohm
100 ohm
2.2K
+3.3V_ALW
8.2K
8.2K
SMBUS Address [TBD]
SMBUS Address [TBD]
2.2K
2.2K
100 ohm
100 ohm BATTERY
CONN
3
4SMBUS Address [TBD]
SMBUS Address [TBD]
32 30
5
6
SMBUS Address [TBD]
8.2K
DOCK_SMB_CLK
DOCK_SMB_DAT DOCKING
6
5
8.2K
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+5V_ALW
2N7002 MEM_SCLK
MEM_SDATA 195 DIMMA
SMBUS Address [TBD]
197
2N7002
+3.3V_RUN
2.2K
2.2K
DIMMB
SMBUS Address [TBD]
195
197
16
17
CKG_SMBDAT
CKG_SMBCLK CLK GEN SMBUS Address [TBD]
2N7002
2N7002
12
13
+3.3V_RUN
2.2K
2.2K
CLK_SDATA
WLAN
2N7002
2N7002
WLAN_SMBCLK
WLAN_SMBDATA
+3.3V_WLAN
2.2K
2.2K
CLK_SDATA
SMBUS Address [TBD]
Charger
10
9
CLK_SCLK@ 0
@ 0
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_CPU_ITP
CLK_CPU_ITP#
CLK_MCH_BCLK#
CLK_CPU_BCLK#
CLK_CPU_BCLK
CLK_ICH_14M
CLK_SIO_14M
MCH_DREFCLK#
MCH_DREFCLK
CLK_MCH_BCLK
CLK_PCI_ICH
CLK_PCI_PCM
PCI_PCM
PCI_LOM
CLK_XTAL_OUT
H_STP_PCI#
PGMODE
CLK_SCLK
CLK_SDATA
DOT96_SSC#
CPU_BCLK#
CLK_XTAL_IN
CLKREF
CLK_SDATA
DOT96#
MCH_BCLK
CLK_SCLK
PCI_LOM
H_STP_CPU#
CLK_PWRGD
CPU_BCLK
CPU_ITP
DOT96_SSC
PCI_ICH
DOT96
CPU_ITP#
MCH_BCLK#
PCI_ICH
+CK_VDD_REF
+CK_VDD_48
+CK_VDD_MAIN
+CK_VDD_A
+CK_VDD_REF
CLK_PCI_TPM
CLK_PCI_DOCK
CLK_PCI_5018
CLK_PCI_5025 PCI_PCM
PCI_DOCK
PCI_SIO
PCIE_MINI1
PCIE_MINI1#
CLK_PCIE_MINI1
CLK_PCIE_MINI1#
CLK_PCIE_MINI2
CLK_PCIE_MINI2#
PCIE_MINI2
PCIE_MINI2#
PCIE_ICH
CLK_PCIE_ICH#
CLK_PCIE_ICH
PCIE_ICH#
CLK_PCIE_LOM
PCIE_LOM#
PCIE_LOM
CLK_PCIE_LOM#
CLK_PCIE_SATA#
PCIE_SATA CLK_PCIE_SATA
PCIE_SATA#
CLK_MCH_3GPLL
CLK_MCH_3GPLL#MCH_3GPLL#
MCH_3GPLL
MINI1CLK_REQ#
MINI2CLK_REQ#
CLK_3GPLLREQ#
SATA_CLKREQ#
LOM_CLKREQ#
+CK_VDD_48
CLK_SMC_48M
CLK_ICH_48M FSA
FSC
FSA
CLK_SMC_48MCLK_ICH_48M
CLK_PCI_PCM
CLK_PCI_5025
CLK_PCI_5018
CLK_PCI_ICH
CLK_ICH_14M
CLK_SIO_14M
CLK_PCI_TPM
CLK_PCI_DOCK
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+CK_VDD_MAIN2
+CK_VDD_MAIN+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
CLK_MCH_BCLK# 10
CLK_MCH_BCLK 10
CLK_CPU_BCLK# 7
CLK_CPU_BCLK 7
DREF_SSCLK 10
DREF_SSCLK# 10
CLK_CPU_ITP 7
CLK_CPU_ITP# 7
CLK_ICH_14M23
CLK_SIO_14M38
MCH_DREFCLK10
MCH_DREFCLK#10
CLK_PCI_ICH21
CLK_PCI_PCM30
CLK_PWRGD23
H_STP_CPU# 23
H_STP_PCI# 23
CKG_SMBDAT39
CKG_SMBCLK39
CLK_PCI_TPM28
CLK_PCI_DOCK36
CLK_PCI_501838 CLK_PCI_502539
CLK_PCIE_MINI1 34
CLK_PCIE_MINI1# 34
MINI1CLK_REQ# 34
CLK_PCIE_MINI2 34
CLK_PCIE_MINI2# 34
MINI2CLK_REQ# 34
CLK_PCIE_ICH# 23
CLK_PCIE_ICH 23
CLK_PCIE_LOM 28
CLK_PCIE_LOM# 28
LOM_CLKREQ# 28
CLK_PCIE_SATA 22
CLK_PCIE_SATA# 22
SATA_CLKREQ# 23
CLK_MCH_3GPLL 10
CLK_MCH_3GPLL# 10
CLK_3GPLLREQ# 10
CLK_SMC_48M31 CLK_ICH_48M23
CPU_MCH_BSEL18,10
CPU_MCH_BSEL28,10
CPU_MCH_BSEL08,10
CLK_SDATA34
CLK_SCLK34
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
Clock Generator
658Monday, February 26, 2007
Compal Electronics, Inc.
Place crystal within
500 mils of CK410
Table : ICS954305AK
1
*
CLKSEL2 CLKSEL0CLKSEL1
FSC FSB FSA CPU
MHz SRC
MHz PCI
MHz
266
133
200
166
333
100
400
100
100
100
100
100
100
100
33.3
33.3
33.3
33.3
33.3
33.3
33.3
000
00
0
0
0
00
0
0
1
1
11
1
1
1
11
1
1
CPU_BSEL CPU_BSEL2(FSC) CPU_BSEL1(FSB)
133
166
0
0
0
1
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
FCTSEL1 PIN43 PIN44 PIN47 PIN48
0=UMA
1=DIS
DOT96T DOT96C 96/100M_T 96/100M_C
27M_out 27M SSout SRCT0 SRCC0
*
PGMODE
0
1
PIN 9
VTT_PWRGD#/PD
CKPWRGD/PD#
TME
0
1
PIN 32
Normal Operation
Trusted Mode Enabled
ITP_EN
0
1
PIN 37
Pin 5/6 as SRC_10
Pin 5/6 as CPU_ITP
*
*
200 100 33.3
Non-iAMT
Non-iAMT
Non-iAMT
Non-iAMT
0=UMA
1=Disc. GRFX down
C779
3.3P_0402_50V8C~D
@
1
2
R299 33_0402_5%~D
1 2
R317 33_0402_5%~D 1 2
R759
2.2_0603_5%~D
1 2
R270 33_0402_5%~D
1 2
R309 2.2K_0402_5%~D
1 2
C481
0.1U_0402_16V4Z~D
1
2
R267 33_0402_5%~D
1 2
R307 33_0402_5%~D
1 2
R293 33_0402_5%~D
1 2
R295
10K_0402_5%~D
@
1 2
R269 33_0402_5%~D
1 2
X1
14.31818MHz_20P_1BX14318CC1A~D
12
C478
4.7U_0603_6.3V4Z~D
1
2
R301 10K_0402_5%~D
1 2
C483
27P_0402_50V8J~D
12
R271
0_0402_5%~D
1 2
R306 33_0402_5%~D
1 2
C776
3.3P_0402_50V8C~D
@
1
2
C479
0.047U_0402_16V4Z~D
1
2
R279 33_0402_5%~D
1 2
R329
10K_0402_5%~D
@
12
C189
0.047U_0402_16V7K~D
1
2
G
D
S
Q35
2N7002W-7-F_SOT323-3~D
2
1 3
C475
0.1U_0402_16V4Z~D
1
2
R282 15_0402_5%~D
12
R311 33_0402_5%~D
1 2
R280 33_0402_5%~D
12
C774
3.3P_0402_50V8C~D
1
2
R274 33_0402_5%~D
1 2
C471
0.1U_0402_16V4Z~D
1
2
R304
10K_0402_5%~D
12
R281 33_0402_5%~D
1 2
R266
2.2K_0402_5%~D
12
R435
0_0402_5%~D
@
1 2
C474
0.1U_0402_16V4Z~D
1
2
R289 33_0402_5%~D
1 2
R277 33_0402_5%~D
12
R288 33_0402_5%~D
1 2
R596 33_0402_5%~D 12
R333 15_0402_5%~D 1 2
R284 15_0402_5%~D
1 2
R318
10K_0402_5%~D
@
12
C780
3.3P_0402_50V8C~D
@
1
2
R286 33_0402_5%~D 1 2
R287 33_0402_5%~D 1 2
R758 2.2_0603_5%~D 1 2
C480
10U_0805_10V4Z~D
1
2
C775
3.3P_0402_50V8C~D
@
1
2
L87
BLM21PG600SN1D_0805~D
1 2
R294 33_0402_5%~D
1 2
R310 10K_0402_5%~D
1 2
R291 33_0402_5%~D
12
R313 33_0402_5%~D
1 2
SLG8LP550
U28
SLG8LP550_QFN72~D
VDD_SRC
1
VDD_SRC
49
VDD_SRC
65
VDD_PCI
30
VDD_PCI
36
VDD_48
40
VDD_CPU
12
VDD_REF
18
USB_48MHz/FSLA
41
FSL_B/TEST_MODE
45
XTAL_OUT
19
XTAL_IN
20
VSS_PCI
31
PCICLK2/TME
32
REF_0/FSL_C/TEST_SEL
23
SMBDAT
17
SMBCLK
16
PCICLK_F0/ITP_EN
37
PGMODE
9
CPU_STP# 24
CPU_1 11
CPU_1# 10
CPU_ITP/SRC_10 6
PCICLK3
33
PCICLK4/FCT_SEL
34
CPU_0# 13
CPU_0 14
PCI_STP# 25
VSS_A 8
VDD_A 7
VSS_PCI
35
CPU_ITP#/SRC_10# 5
VSS_REF
21
VSS_CPU
15
VSS_SRC
4
VSS_48
42
VSS_SRC
68
DOT_96/27M
43
DOT_96#/27M_SS
44
CKPWRGD/PD#
39
REF_1
22 SRC_7 66
SRC_7# 67
SRC_8 70
SRC_8# 69
SRC_9 3
SRC_9# 2
SRC_1#/SATA# 51
LCD_CLK/SRC_0 47
SRC_2 52
SRC_4 58
SRC_1/SATA 50
CLKREQ_4# 57
SRC_2# 53
SRC_5# 61
SRC_4# 59
SRC_5 60
LCD_CLK#/SRC_0# 48
SRC_3# 56
SRC_3 55
SRC_6 63
SRC_6# 64
CLKREQ_6# 62
CLKREQ_8# 71
CLKREQ_9# 72
CLKREQ_1# 46
CLKREQ_5# 29
CLKREQ_3# 28
CLKREQ_2# 26
CLKREQ_7# 38
VDD_SRC
54
PCICLK1
27
THRM_PAD
73
THRM_PAD
76
THRM_PAD
74
THRM_PAD
75
R319
10K_0402_5%~D
12
R268 33_0402_5%~D
1 2
C477
0.1U_0402_16V4Z~D
1
2
C473
0.1U_0402_16V4Z~D
1
2
C484
33P_0402_50V8J~D
12
R315 10K_0402_5%~D
1 2
R298
10K_0402_5%~D
@
1 2
R285 15_0402_5%~D
1 2
R316 33_0402_5%~D 1 2
L28
BLM21PG600SN1D_0805~D
1 2
R275 15_0402_5%~D
1 2
C781
3.3P_0402_50V8C~D
@
1
2
R290
10K_0402_5%~D
1 2
C799
0.047U_0402_16V4Z~D
1
2
R760
1_0603_5%~D 1 2
R265
2.2K_0402_5%~D
12
R440
0_0402_5%~D
@ 1 2
C472
10U_0805_10V4Z~D
1
2
R273 15_0402_5%~D
12
C778
3.3P_0402_50V8C~D
@
1
2
C99
4.7U_0603_6.3V4Z~D
1
2
C777
3.3P_0402_50V8C~D
@
1
2
C476
0.1U_0402_16V4Z~D
1
2
R168 33_0402_5%~D
1 2
R419 475_0402_1%~D
1 2
R272 33_0402_5%~D
1 2
R391
10K_0402_5%~D
@
12
R314 8.2K_0402_5%~D
1 2
C708
3.3P_0402_50V8C~D
1
2
R297 10K_0402_5%~D
1 2
C785
3.3P_0402_50V8C~D
@
1
2
C482
0.1U_0402_16V4Z~D
1
2
R283 10K_0402_5%~D
1 2
G
D
S
Q34
2N7002W-7-F_SOT323-3~D
2
1 3
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ITP_TRST#
ITP_TCK
ITP_DBRESET#
H_THERMTRIP#
H_RESET#
H_INIT#
CLK_CPU_BCLK
H_HIT#
H_LOCK#
ITP_TRST#
H_INTR
H_ADS#
CLK_CPU_ITP
H_DRDY#
H_RS#1
ITP_BPM#3
H_BR0#
H_RESET#
ITP_TCK
H_SMI#
ITP_DBRESET#
H_STPCLK#
H_DEFER#
CLK_CPU_BCLK#
ITP_DBRESET#
H_ADSTB#1
EC_CPU_PROCHOT#
H_FERR#
ITP_BPM#0
ITP_BPM#1
H_RS#2
H_RESET#
ITP_TDO
H_TRDY#
H_NMI
ITP_BPM#4
H_BNR#
H_HITM#
CLK_CPU_ITP#
H_A20M#
H_IGNNE#
H_RS#0
H_DBSY#
ITP_TDO
H_IERR#
ITP_BPM#2
H_BPRI#
ITP_BPM#5
H_A#27
H_REQ#1
H_A#18
H_A#15
H_A#10
H_A#13
H_REQ#0
H_REQ#3
H_A#32
H_A#21
H_A#14
H_A#30
H_A#35
H_A#3
H_A#17
H_A#22
H_A#25
H_A#26
H_A#19
H_A#31
H_A#33
H_A#9
H_A#28
H_A#20
H_A#23
H_A#29
H_REQ#2
H_ADSTB#0
H_A#7
H_A#24
H_A#4
H_A#8
H_A#12
H_A#5
H_A#16
H_REQ#4
H_A#34
H_A#11
H_A#6
H_THERMTRIP#
H_THERMDA
H_THERMDC
ITP_TMS
ITP_TMS
ITP_TDI
ITP_TDI
+3.3V_SUS
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP
H_LOCK# 10
CLK_CPU_BCLK 6
H_THERMDA 18
H_INIT# 22
H_BNR# 10
H_IGNNE#22
H_A20M#22
H_DEFER# 10
H_SMI#22
H_RS#0 10
H_ADSTB#110
H_NMI22
H_TRDY# 10
H_BPRI# 10
H_DRDY# 10
H_HITM# 10
CLK_CPU_BCLK# 6
H_HIT# 10
H_FERR#22
CLK_CPU_ITP6
H_STPCLK#22
H_RS#2 10
ITP_DBRESET# 23,38
H_ADS# 10
H_RESET# 10
H_THERMTRIP# 18
H_INTR22
H_RS#1 10
CLK_CPU_ITP#6
H_BR0# 10
H_DBSY# 10
H_REQ#210 H_REQ#310
H_REQ#010
H_ADSTB#010
H_A#[3..35]10
H_REQ#410
H_REQ#110
H_THERMDC 18
EC_CPU_PROCHOT# 39
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
Merom Processor(1/2)
758Monday, February 26, 2007
Compal Electronics, Inc.
This shall place near CPU
Place near JITP
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
H_THERMDA, H_THERMDC routing together,
Trace width / Spacing = 10 / 10 mil
T48 PAD~D
R332
27_0402_1%~D
C486
0.1U_0402_16V4Z~D
@
1
2
R323
56_0402_5%~D
12
T49 PAD~D
JCPUD
TYCO_1-1674770-2_Merom~D
VSS[001]
A4
VSS[002]
A8
VSS[003]
A11
VSS[004]
A14
VSS[005]
A16
VSS[006]
A19
VSS[007]
A23
VSS[008]
AF2
VSS[009]
B6
VSS[010]
B8
VSS[011]
B11
VSS[012]
B13
VSS[013]
B16
VSS[014]
B19
VSS[015]
B21
VSS[016]
B24
VSS[017]
C5
VSS[018]
C8
VSS[019]
C11
VSS[020]
C14
VSS[021]
C16
VSS[022]
C19
VSS[023]
C2
VSS[024]
C22
VSS[025]
C25
VSS[026]
D1
VSS[027]
D4
VSS[028]
D8
VSS[029]
D11
VSS[030]
D13
VSS[031]
D16
VSS[032]
D19
VSS[033]
D23
VSS[034]
D26
VSS[035]
E3
VSS[036]
E6
VSS[037]
E8
VSS[038]
E11
VSS[039]
E14
VSS[040]
E16
VSS[041]
E19
VSS[042]
E21
VSS[043]
E24
VSS[044]
F5
VSS[045]
F8
VSS[046]
F11
VSS[047]
F13
VSS[048]
F16
VSS[049]
F19
VSS[050]
F2
VSS[051]
F22
VSS[052]
F25
VSS[053]
G4
VSS[054]
G1
VSS[055]
G23
VSS[056]
G26
VSS[057]
H3
VSS[058]
H6
VSS[059]
H21
VSS[060]
H24
VSS[061]
J2
VSS[062]
J5
VSS[063]
J22
VSS[064]
J25
VSS[065]
K1
VSS[066]
K4
VSS[067]
K23
VSS[082] P6
VSS[083] P21
VSS[084] P24
VSS[085] R2
VSS[086] R5
VSS[087] R22
VSS[088] R25
VSS[089] T1
VSS[090] T4
VSS[091] T23
VSS[092] T26
VSS[093] U3
VSS[094] U6
VSS[095] U21
VSS[096] U24
VSS[097] V2
VSS[098] V5
VSS[099] V22
VSS[100] V25
VSS[101] W1
VSS[102] W4
VSS[103] W23
VSS[104] W26
VSS[105] Y3
VSS[106] Y6
VSS[107] Y21
VSS[108] Y24
VSS[109] AA2
VSS[110] AA5
VSS[111] AA8
VSS[112] AA11
VSS[113] AA14
VSS[114] AA16
VSS[068]
K26
VSS[069]
L3
VSS[070]
L6
VSS[071]
L21
VSS[072]
L24
VSS[073]
M2
VSS[074]
M5
VSS[075]
M22
VSS[076]
M25
VSS[077]
N1
VSS[078]
N4
VSS[079]
N23
VSS[080]
N26
VSS[081]
P3
VSS[115] AA19
VSS[116] AA22
VSS[117] AA25
VSS[118] AB1
VSS[119] AB4
VSS[120] AB8
VSS[121] AB11
VSS[122] AB13
VSS[123] AB16
VSS[124] AB19
VSS[125] AB23
VSS[126] AB26
VSS[127] AC3
VSS[128] AC6
VSS[129] AC8
VSS[130] AC11
VSS[131] AC14
VSS[132] AC16
VSS[133] AC19
VSS[134] AC21
VSS[135] AC24
VSS[136] AD2
VSS[137] AD5
VSS[138] AD8
VSS[139] AD11
VSS[140] AD13
VSS[141] AD16
VSS[142] AD19
VSS[143] AD22
VSS[144] AD25
VSS[145] AE1
VSS[146] AE4
VSS[147] AE8
VSS[148] AE11
VSS[149] AE14
VSS[150] AE16
VSS[151] AE19
VSS[152] AE23
VSS[153] AE26
VSS[154] A2
VSS[155] AF6
VSS[156] AF8
VSS[157] AF11
VSS[158] AF13
VSS[159] AF16
VSS[160] AF19
VSS[161] AF21
VSS[162] A25
VSS[163] AF25
R321
22.6_0402_1%~D
1 2
R327
56_0402_5%~D
1 2 R328
39_0402_1%~D
ADDR GROUP 0
ADDR GROUP 1
CONTROLXDP/ITP SIGNALS
THERMAL
ICH
H CLK
RESERVED
JCPUA
TYCO_1-1674770-2_Merom~D
A[3]#
J4
A[4]#
L5
A[5]#
L4
A[6]#
K5
A[7]#
M3
A[8]#
N2
A[9]#
J1
A[10]#
N3
A[11]#
P5
A[12]#
P2
A[13]#
L2
A[14]#
P4
A[15]#
P1
A[16]#
R1
ADSTB[0]#
M1
REQ[0]#
K3
REQ[1]#
H2
REQ[2]#
K2
REQ[3]#
J3
REQ[4]#
L1
A[17]#
Y2
A[18]#
U5
A[19]#
R3
A[20]#
W6
A[21]#
U4
A[22]#
Y5
A[23]#
U1
A[24]#
R4
A[25]#
T5
A[26]#
T3
A[27]#
W2
A[28]#
W5
A[29]#
Y4
A[30]#
U2
A[31]#
V4
A[32]#
W3
A[33]#
AA4
A[34]#
AB2
A[35]#
AA3
ADSTB[1]#
V1
A20M#
A6
FERR#
A5
IGNNE#
C4
STPCLK#
D5
SMI#
A3
LINT0
C6
LINT1
B4
RSVD[01]
M4
RSVD[02]
N5
RSVD[03]
T2
RSVD[04]
V3
RSVD[05]
B2
RSVD[06]
C3
RSVD[07]
D2
RSVD[08]
D22
RSVD[09]
D3
RSVD[10]
F6
ADS# H1
BNR# E2
BPRI# G5
DEFER# H5
DRDY# F21
DBSY# E1
BR0# F1
IERR# D20
INIT# B3
LOCK# H4
RESET# C1
RS[0]# F3
RS[1]# F4
RS[2]# G3
HIT# G6
HITM# E4
BPM[0]# AD4
BPM[1]# AD3
BPM[2]# AD1
BPM[3]# AC4
PRDY# AC2
PREQ# AC1
TCK AC5
TDI AA6
TDO AB3
TMS AB5
TRDY# G2
TRST# AB6
DBR# C20
PROCHOT# D21
THERMTRIP# C7
THERMDA A24
THERMDC B25
BCLK[0] A22
BCLK[1] A21
R331
649_0402_1%~D
1 2
T51 PAD~D
R320
56_0402_5%~D
12
R324
150_0402_5%~D
1 2
T50 PAD~D
R330
150_0402_5%~D
C485
0.1U_0402_16V4Z~D
@
1
2
R326
51_0402_1%~D
T52 PAD~D
T47 PAD~D
JITP
MOLEX_52435-2891_28P~D@
TDI
1TMS
2TRST#
3NC1
4TCK
5NC2
6TDO
7BCLKN
8BCLKP
9GND0
10 FBO
11 RESET#
12 BPM5#
13
BPM4#
15
BPM3#
17
BPM2#
19
BPM1#
21
BPM0#
23 DBA#
24 DBR#
25 VTAP
26 VTT0
27 VTT1
28
GND1
14
GND2
16
GND3
18
GND4
20
GND5
22
GND6 29
GND7
30
C417
2200P_0402_50V7K~D
1
2
R325
51_0402_5%~D
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VSSSENSE
VCCSENSE
CPU_MCH_BSEL2
CPU_MCH_BSEL1
H_D#5
H_D#23
H_D#15
H_D#11
H_D#10
H_D#1
H_D#19
H_D#0
H_D#9
H_D#31
H_D#21
H_DSTBN#1
H_D#29
H_D#25
H_D#14
H_D#6
H_DSTBP#0
H_DSTBN#0
H_D#3
H_D#26
H_D#13
CPU_MCH_BSEL0
H_D#7
H_D#4
H_D#30
H_D#27
H_D#20
H_DINV#1
H_D#18
H_D#12
H_D#8
H_D#24
H_D#2
H_D#16
H_DINV#0
H_D#17
H_D#22
H_DSTBP#1
H_D#28
H_D#32
H_DSTBP#2
H_D#60
H_DINV#2
H_D#61
H_D#36
H_D#48
H_D#57
H_D#34
COMP3
COMP1
H_D#33
H_DINV#3
H_D#52
H_DPWR#
H_DSTBN#2
H_DSTBP#3
H_DPSLP#
H_D#59
H_D#46
H_D#55
H_D#53
H_D#40
H_D#39
H_PSI#
H_DSTBN#3
H_D#51
H_D#42
COMP0
H_D#58
H_D#49
H_D#45
H_CPUSLP#
H_D#47
H_D#37
H_D#63
H_D#43
H_PWRGOOD
H_D#62
H_D#54
H_D#44
H_D#41
H_D#56
H_D#50
H_D#38
COMP2
H_DPRSTP#
H_D#35
VID4
VID1
VSSSENSE
VID3
VID0
VID2
VID6
VCCSENSE
VID5TEST2
TEST3
TEST5
TEST6
TEST1
TEST4
TEST2
TEST1
TEST6 TEST3
TEST5
TEST4
+1.05V_VCCP
V_CPU_GTLREF
+VCC_CORE +VCC_CORE
+1.05V_VCCP
+1.5V_RUN
+VCC_CORE
V_CPU_GTLREF
H_D#[0..63]10
H_DINV#2 10
H_DINV#3 10
H_DSTBN#3 10
H_DSTBN#2 10
H_DSTBP#2 10
H_DSTBP#3 10
VCCSENSE 48
VSSSENSE 48
VID0 48
VID1 48
VID2 48
VID3 48
VID4 48
VID5 48
VID6 48
H_DPSLP# 22
H_PWRGOOD 22
H_CPUSLP# 10
H_DPWR# 10
H_DPRSTP# 10,22,48
H_PSI# 48
CPU_MCH_BSEL16,10 CPU_MCH_BSEL26,10
H_DSTBP#110
CPU_MCH_BSEL06,10
H_DSTBN#110
H_DINV#010
H_DSTBN#010
H_DINV#110
H_DSTBP#010
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
Merom Processor(2/2)
858Monday, February 26, 2007
Compal Electronics, Inc.
Resistor placed within 0.5" of
CPU pin.Trace should be at least
25 mils away from any other
toggling signal. COMP0, COMP2
trace should be 27.4 ohm.
COMP1, COMP3 should be 55
ohm.
Layout close CPU PIN AD26
55 ohm, 0.5 inch (max)
Place R342 and R343 near CPU
Route VCCSENSE and VSSSENSE trace at
27.4 ohms, 7 mils spacing and 1 inch (max)
Length match within 25 mils Z0=27.4 ohm
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
CRB was 270uF
For the purpose of testability, route these signals
through a ground referenced Z0 = 55ohm trace that
ends in a via that is near a GND via and is
accessible through an oscilloscope connection.
Place C close to the
CPU_TEST4 pin. Make sure
CPU_TEST4 routing is
reference to GND and away
from other noisy signal.
FSB
533
BCLK BSEL2 BSEL1 BSEL0
667
800
133
166
200
001
110
100
R342
100_0402_1%~D
1 2
R341
1K_0402_1%~D
12
C488
0.01U_0402_16V7K~D
1
2
JCPUC
TYCO_1-1674770-2_Merom~D
VCC[001]
A7
VCC[002]
A9
VCC[003]
A10
VCC[004]
A12
VCC[005]
A13
VCC[006]
A15
VCC[007]
A17
VCC[008]
A18
VCC[009]
A20
VCC[010]
B7
VCC[011]
B9
VCC[012]
B10
VCC[013]
B12
VCC[014]
B14
VCC[015]
B15
VCC[016]
B17
VCC[017]
B18
VCC[018]
B20
VCC[019]
C9
VCC[020]
C10
VCC[021]
C12
VCC[022]
C13
VCC[023]
C15
VCC[024]
C17
VCC[025]
C18
VCC[026]
D9
VCC[027]
D10
VCC[028]
D12
VCC[029]
D14
VCC[030]
D15
VCC[031]
D17
VCC[032]
D18
VCC[033]
E7
VCC[034]
E9
VCC[035]
E10
VCC[036]
E12
VCC[037]
E13
VCC[038]
E15
VCC[039]
E17
VCC[040]
E18
VCC[041]
E20
VCC[042]
F7
VCC[043]
F9
VCC[044]
F10
VCC[045]
F12
VCC[046]
F14
VCC[047]
F15
VCC[048]
F17
VCC[049]
F18
VCC[050]
F20
VCC[051]
AA7
VCC[052]
AA9
VCC[053]
AA10
VCC[054]
AA12
VCC[055]
AA13
VCC[056]
AA15
VCC[057]
AA17
VCC[058]
AA18
VCC[059]
AA20
VCC[060]
AB9
VCC[061]
AC10
VCC[062]
AB10
VCC[063]
AB12
VCC[064]
AB14
VCC[065]
AB15
VCC[066]
AB17
VCC[067]
AB18
VCC[068] AB20
VCC[069] AB7
VCC[070] AC7
VCC[071] AC9
VCC[072] AC12
VCC[073] AC13
VCC[074] AC15
VCC[075] AC17
VCC[076] AC18
VCC[077] AD7
VCC[078] AD9
VCC[079] AD10
VCC[080] AD12
VCC[081] AD14
VCC[082] AD15
VCC[083] AD17
VCC[084] AD18
VCC[085] AE9
VCC[086] AE10
VCC[087] AE12
VCC[088] AE13
VCC[089] AE15
VCC[090] AE17
VCC[091] AE18
VCC[092] AE20
VCC[093] AF9
VCC[094] AF10
VCC[095] AF12
VCC[096] AF14
VCC[097] AF15
VCC[098] AF17
VCC[099] AF18
VCC[100] AF20
VCCP[01] G21
VCCP[02] V6
VCCP[03] J6
VCCP[04] K6
VCCP[05] M6
VCCP[06] J21
VCCP[07] K21
VCCP[08] M21
VCCP[09] N21
VCCP[10] N6
VCCP[11] R21
VCCP[12] R6
VCCP[13] T21
VCCP[14] T6
VCCP[15] V21
VCCP[16] W21
VCCA[1] B26
VID[0] AD6
VID[1] AF5
VID[2] AE5
VID[3] AF4
VID[4] AE3
VID[5] AF3
VID[6] AE2
VCCSENSE AF7
VSSSENSE AE7
VCCA[2] C26
R339
54.9_0402_1%~D
12
R344
2K_0402_1%~D
12
C489
10U_0805_10V4Z~D
1
2
R394
0_0402_5%~D
@
1 2
R336
1K_0402_5%~D
@
1 2
R343
100_0402_1%~D
1 2
R337
54.9_0402_1%~D
12
C490
0.1U_0402_16V4Z~D
@1
2
T31PAD~D
+
C487
220U_D2_4VY_R15M~D
1
2
R338
27.4_0402_1%~D
12
R340
27.4_0402_1%~D
12
DATA GRP 0 DATA GRP 1
DATA GRP 2DATA GRP 3
MISC
JCPUB
TYCO_1-1674770-2_Merom~D
D[0]#
E22
D[1]#
F24
D[2]#
E26
D[3]#
G22
D[4]#
F23
D[5]#
G25
D[6]#
E25
D[7]#
E23
D[8]#
K24
D[9]#
G24
D[10]#
J24
D[11]#
J23
D[12]#
H22
D[13]#
F26
D[14]#
K22
D[15]#
H23
DSTBN[0]#
J26
DSTBP[0]#
H26
DINV[0]#
H25
D[16]#
N22
D[17]#
K25
D[18]#
P26
D[19]#
R23
D[20]#
L23
D[21]#
M24
D[22]#
L22
D[23]#
M23
D[24]#
P25
D[25]#
P23
D[26]#
P22
D[27]#
T24
D[28]#
R24
D[29]#
L25
D[30]#
T25
D[31]#
N25
DSTBN[1]#
L26
DSTBP[1]#
M26
DINV[1]#
N24
GTLREF
AD26
TSET1
C23
TEST2
D25
BSEL[0]
B22
BSEL[1]
B23
BSEL[2]
C21
D[32]# Y22
D[33]# AB24
D[34]# V24
D[35]# V26
D[36]# V23
D[37]# T22
D[38]# U25
D[39]# U23
D[40]# Y25
D[41]# W22
D[42]# Y23
D[43]# W24
D[44]# W25
D[45]# AA23
D[46]# AA24
D[47]# AB25
DSTBN[2]# Y26
DSTBP[2]# AA26
DINV[2]# U22
D[48]# AE24
D[49]# AD24
D[50]# AA21
D[51]# AB22
D[52]# AB21
D[53]# AC26
D[54]# AD20
D[55]# AE22
D[56]# AF23
D[57]# AC25
D[58]# AE21
D[59]# AD21
D[60]# AC22
D[61]# AD23
D[62]# AF22
D[63]# AC23
DSTBN[3]# AE25
DSTBP[3]# AF24
DINV[3]# AC20
COMP[0] R26
COMP[1] U26
COMP[2] AA1
COMP[3] Y1
DPRSTP# E5
DPSLP# B5
DPWR# D24
SLP# D7
PSI# AE6
PWRGOOD D6
TEST3
C24
TEST4
AF26
TEST5
AF1
TEST6
A26
T30PAD~D
R335
1K_0402_5%~D
@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.05V_VCCP
+VCC_CORE
+VCC_CORE
+VCC_CORE
+VCC_CORE
+VCC_CORE
+VCC_CORE
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
CPU Bypass
958Wednesday, February 14, 2007
Compal Electronics, Inc.
10uF 0805 X6S -> 85 degree C
High Frequence Decoupling
ESR <= 1.5m ohm
Capacitor > 1980uF
Near VCORE regulator.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Place these inside
socket cavity on L8
(North side
Secondary)
Place these inside
socket cavity on L8
(Sorth side
Secondary)
Place these inside
socket cavity on L8
(North side
Primary)
Place these inside
socket cavity on L8
(Sorth side
Primary)
South Side Secondary
Place these inside
socket cavity on L8
(North side
Secondary)
North Side Secondary
BITs WI97840
C256
0.1U_0402_10V7K~D
1
2
+
C365
220U_X_2VM_R7M~D
1
2
C331
10U_0805_4VAM~D
1
2
C51
10U_0805_4VAM~D
1
2
C65
10U_0805_4VAM~D
1
2
C66
10U_0805_4VAM~D
1
2
C225
10U_0805_4VAM~D
1
2
C69
10U_0805_4VAM~D
1
2
C64
10U_0805_4VAM~D
1
2
C870
0.1U_0402_10V7K~D
@
1
2
C55
10U_0805_4VAM~D
1
2
C333
10U_0805_4VAM~D
1
2
C335
10U_0805_4VAM~D
1
2
C250
0.1U_0402_10V7K~D
1
2
+
C338
220U_X_2VM_R7M~D
@
1
2
C227
10U_0805_4VAM~D
1
2
+
C177
220U_X_2VM_R7M~D
1
2
C871
0.1U_0402_10V7K~D
@
1
2
C67
10U_0805_4VAM~D
1
2
C229
10U_0805_4VAM~D
1
2
C332
10U_0805_4VAM~D
1
2
C222
10U_0805_4VAM~D
1
2
C872
0.1U_0402_10V7K~D
@
1
2
+
C178
220U_X_2VM_R7M~D
@
1
2
C224
10U_0805_4VAM~D
1
2
C312
0.1U_0402_10V7K~D
1
2
C293
0.1U_0402_10V7K~D
1
2
C364
10U_0805_4VAM~D
1
2
C336
10U_0805_4VAM~D
1
2
C363
10U_0805_4VAM~D
1
2
C873
0.1U_0402_10V7K~D
@
1
2
C68
10U_0805_4VAM~D
1
2
C185
10U_0805_4VAM~D
1
2
+
C366
220U_X_2VM_R7M~D
1
2
C334
10U_0805_4VAM~D
1
2
C264
0.1U_0402_10V7K~D
1
2
C330
10U_0805_4VAM~D
1
2
C53
10U_0805_4VAM~D
1
2
C329
10U_0805_4VAM~D
1
2
C310
0.1U_0402_10V7K~D
1
2
C226
10U_0805_4VAM~D
1
2
C52
10U_0805_4VAM~D
1
2
C223
10U_0805_4VAM~D
1
2
C50
10U_0805_4VAM~D
1
2
C228
10U_0805_4VAM~D
1
2
C54
10U_0805_4VAM~D
1
2
C190
10U_0805_4VAM~D
1
2
+
C179
220U_X_2VM_R7M~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PM_EXTTS#0
PM_EXTTS#1
THERMTRIP_MCH#
V_DDR_MCH_REF
DDR_CKE0_DIMMA
M_CLK_DDR#0
M_CLK_DDR#3
SMRCOMP#
M_ODT3
MCH_ICH_SYNC#
DDR_CS2_DIMMB#
DDR_CKE1_DIMMA
SMRCOMP_VOH
SMRCOMP_VOH
M_ODT2
M_CLK_DDR2
SMRCOMP_VOL
DDR_CS3_DIMMB#
DDR_CS1_DIMMA#
DDR_CKE3_DIMMB
M_CLK_DDR#2
M_CLK_DDR#1
M_CLK_DDR3
M_ODT1
SMRCOMP
M_ODT0
SMRCOMP_VOL
M_CLK_DDR1
DDR_CKE2_DIMMB
M_CLK_DDR0
CLK_3GPLLREQ#
DDR_CS0_DIMMA#
ICH_PWRGD
DPRSLPVR
CFG19
THERMTRIP_MCH#
PM_EXTTS#1
PLTRST1#_R
PM_EXTTS#0
CFG16
MCH_DREFCLK
CLK_MCH_3GPLL
MCH_DREFCLK#
CLK_MCH_3GPLL#
DREF_SSCLK
DREF_SSCLK#
SDVO_CTRLCLK
SDVO_CTRLDATA
H_DSTBP#1
H_DINV#1
H_DEFER#
H_A#30
H_A#8
H_D#57
H_D#53
H_D#40
H_D#35
H_D#17
H_HITM#
H_A#17
H_A#3
H_SCOMP
H_D#56
H_D#51
H_D#43
H_D#16
H_D#15
H_DBSY#
H_A#32
H_A#16
H_A#7
H_D#58
H_D#54
H_ADSTB#0
H_A#27
H_A#19
H_D#24
H_D#2
H_SWNG
H_LOCK#
H_A#21
H_RESET#
H_D#61
H_D#10
H_D#8
H_DSTBP#3
H_TRDY#
H_ADSTB#1
H_A#25
H_A#5
H_D#55
H_D#41
H_D#20
H_D#19
H_D#5
H_DINV#2
H_A#33
H_A#12
H_A#10
H_A#9
H_D#60
H_D#47
H_D#1
H_VREF
H_DSTBN#2
H_DRDY#
CLK_MCH_BCLK#
H_BNR#
H_A#18
H_A#11
H_A#6
H_D#63
H_D#48
H_D#36
H_D#32
H_D#13
H_RS#2
H_RS#0
H_D#59
H_D#49
H_D#39
H_D#34
H_D#23
H_D#9
H_D#0
H_REQ#3
H_DSTBP#2
H_BR0#
H_A#34
H_A#4
H_SWNG
H_D#46
H_D#27
H_D#18
H_D#12
H_DSTBN#0
H_HIT#
H_A#20
H_A#14
H_SCOMP#
H_D#30
H_D#25
H_DINV#3
H_BPRI#
H_A#29
H_A#22
H_A#15
H_D#38
H_D#33
H_D#31
H_D#26
H_REQ#2
H_D#21
H_D#14
H_D#4
H_DSTBN#3
H_DINV#0
H_A#35
H_A#28
H_CPUSLP#
H_RCOMP
H_D#52
H_D#37
H_D#3
H_RS#1
H_DSTBP#0
H_DSTBN#1
H_A#26
H_A#24
H_A#23
H_D#62
H_D#22
H_D#7
H_D#6
H_VREF
H_REQ#1
H_DPWR#
CLK_MCH_BCLK
H_A#31
H_D#50
H_D#28
H_REQ#4
H_REQ#0
H_ADS#
H_A#13
H_D#45
H_D#44
H_D#42
H_D#29
H_D#11
CL_CLK0
CL_DATA0
ICH_CL_PWROK
ICH_CL_RST0#
CL_VREF
CFG20
CFG5
H_DPRSTP#
CFG9
PM_BMBUSY#
DMI_MTX_IRX_N2
DMI_MTX_IRX_N1
DMI_MTX_IRX_N0
DMI_MTX_IRX_N3
DMI_MRX_ITX_N3
DMI_MRX_ITX_N1
DMI_MRX_ITX_N2
DMI_MRX_ITX_N0
DMI_MTX_IRX_P2
DMI_MTX_IRX_P3
DMI_MTX_IRX_P0
DMI_MTX_IRX_P1
DMI_MRX_ITX_P0
DMI_MRX_ITX_P3
DMI_MRX_ITX_P2
DMI_MRX_ITX_P1
PLTRST1#PLTRST1#_R
+1.05V_VCCP
+1.05V_VCCP+1.05V_VCCP
+3.3V_RUN
+1.05V_VCCP
+1.8V_SUS
+1.8V_SUS
+1.25V_RUN
V_DDR_MCH_REF
H_A#[3..35] 7
H_ADSTB#1 7
H_ADSTB#0 7
H_TRDY# 7
H_HIT# 7
H_LOCK# 7
H_DEFER# 7
H_BPRI# 7
H_BR0# 7
H_DPWR# 8
H_DRDY# 7
H_DBSY# 7
CLK_MCH_BCLK# 6
CLK_MCH_BCLK 6
H_BNR# 7
H_ADS# 7
H_DINV#1 8
H_DINV#0 8
H_DINV#2 8
H_DINV#3 8
H_HITM# 7
H_D#[0..63]8
H_RS#1 7
H_RS#2 7
H_RS#0 7
H_DSTBP#1 8
H_DSTBP#0 8
H_DSTBP#3 8
H_DSTBP#2 8
H_REQ#0 7
H_REQ#1 7
H_REQ#2 7
H_REQ#3 7
H_REQ#4 7
H_DSTBN#0 8
H_DSTBN#2 8
H_DSTBN#1 8
H_DSTBN#3 8
H_RESET#7 H_CPUSLP#8
CPU_MCH_BSEL2 6,8
M_CLK_DDR#116
DDR_CKE3_DIMMB17
CFG20 12
DDR_CKE2_DIMMB17
PM_EXTTS#0 16
M_CLK_DDR317
M_ODT317
DDR_CS1_DIMMA#16
PM_BMBUSY# 23
DDR_CKE1_DIMMA16
ICH_PWRGD 23,42
DDR_CS2_DIMMB#17
M_ODT116
M_CLK_DDR#016
DDR_CKE0_DIMMA16
CFG5 12
DPRSLPVR 23,48
M_CLK_DDR016
THERMTRIP_MCH# 18
M_CLK_DDR#217
DDR_CS0_DIMMA#16
DDR_CS3_DIMMB#17
M_ODT016
M_CLK_DDR217
CFG19 12
MCH_ICH_SYNC#23
CFG9 12
H_DPRSTP# 8,22,48
M_CLK_DDR116
CFG16 12
M_CLK_DDR#317
CLK_3GPLLREQ#6
M_ODT217
MCH_DREFCLK6
CLK_MCH_3GPLL6 CLK_MCH_3GPLL#6
MCH_DREFCLK#6
DREF_SSCLK6DREF_SSCLK#6
CPU_MCH_BSEL1 6,8
CPU_MCH_BSEL0 6,8
SDVO_CTRLCLK51 SDVO_CTRLDATA51
CL_CLK023 CL_DATA023 ICH_CL_PWROK23,39 ICH_CL_RST0#23
PM_EXTTS#1 17
DMI_MTX_IRX_N323 DMI_MTX_IRX_N223 DMI_MTX_IRX_N123 DMI_MTX_IRX_N023
DMI_MRX_ITX_N023
DMI_MRX_ITX_N223 DMI_MRX_ITX_N123
DMI_MRX_ITX_N323
DMI_MTX_IRX_P323
DMI_MTX_IRX_P123 DMI_MTX_IRX_P223
DMI_MTX_IRX_P023
DMI_MRX_ITX_P223 DMI_MRX_ITX_P323
DMI_MRX_ITX_P123 DMI_MRX_ITX_P023
SB_NB_PCIE_RST# 21
PLTRST1# 21,51
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
Crestline(1 of 6)
10 58Monday, February 26, 2007
Compal Electronics, Inc.
Layout Note:
H_RCOMP trace width
and spacing is 10/20
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
T71 PAD~D
R350
24.9_0402_1%~D
12
R358
56_0402_5%~D
1 2
T68 PAD~D
R355
1K_0402_1%~D
12
T75 PAD~D
C492
0.1U_0402_16V4Z~D
1
2
R352
10K_0402_5%~D
12
T70 PAD~D
T45PAD~D
T42PAD~D
T72 PAD~D
T63 PAD~D
T46PAD~D
R347
54.9_0402_1%~D
12
T69 PAD~D
RSVD CFG PM NC
DDR MUXINGCLKDMIGRAPHICS VIDMEMISC
U29B
LE88CLGM A0 QM20_FCBGA1299~D
RSVD1 P36
RSVD2 P37
RSVD3 R35
RSVD4 N35
RSVD5 AR12
RSVD6 AR13
RSVD7 AM12
RSVD8 AN13
RSVD9 J12
RSVD10 AR37
RSVD11 AM36
RSVD12 AL36
RSVD13 AM37
RSVD14 D20
TEST_1
A37
RSVD20 H10
RSVD21 B51
RSVD22 BJ20
RSVD23 BK22
RSVD24 BF19
RSVD25 BH20
RSVD26 BK18
RSVD27 BJ18
RSVD28 BF23
RSVD29 BG23
RSVD30 BC23
RSVD31 BD24
RSVD32 BH39
RSVD33 AW20
RSVD34 BK20
RSVD35 C48
RSVD36 D47
RSVD37 B44
RSVD38 C44
RSVD39 A35
RSVD40 B37
RSVD41 B36
RSVD42 B34
RSVD43 C34
TEST_2
R32
CFG_0 P27
CFG_1 N27
CFG_2 N24
CFG_3 C21
CFG_4 C23
CFG_5 F23
CFG_6 N23
CFG_7 G23
CFG_8 J20
CFG_9 C20
CFG_10 R24
CFG_11 L23
CFG_12 J23
CFG_13 E23
CFG_14 E20
CFG_15 K23
CFG_16 M20
CFG_17 M24
CFG_18 L32
CFG_19 N33
CFG_20 L35
PM_BM_BUSY# G41
PM_DPRSTP# L39
PM_EXT_TS#_0 L36
PM_EXT_TS#_1 J36
PWROK AW49
RSTIN# AV20
THERMTRIP# N20
DPRSLPVR G36
NC_1 BJ51
NC_2 BK51
NC_3 BK50
NC_4 BL50
NC_5 BL49
NC_6 BL3
NC_7 BL2
NC_8 BK1
NC_9 BJ1
NC_10 E1
NC_11 A5
NC_12 C51
NC_13 B50
NC_14 A50
NC_15 A49
NC_16 BK2
SM_CK_0
AV29
SM_CK_1
BB23
SM_CK_3
BA25
SM_CK_4
AV23
SM_CK#_0
AW30
SM_CK#_1
BA23
SM_CK#_3
AW25
SM_CK#_4
AW23
SM_CKE_0
BE29
SM_CKE_1
AY32
SM_CKE_3
BD39
SM_CKE_4
BG37
SM_CS#_0
BG20
SM_CS#_1
BK16
SM_CS#_2
BG16
SM_CS#_3
BE13
SM_ODT_0
BH18
SM_ODT_1
BJ15
SM_ODT_2
BJ14
SM_ODT_3
BE16
SM_RCOMP
BL15
SM_RCOMP#
BK14
SM_RCOMP_VOH
BK31
SM_RCOMP_VOL
BL31
SM_VREF_0
AR49
SM_VREF_1
AW4
DPLL_REF_CLK
B42
DPLL_REF_CLK#
C42
DPLL_REF_SSCLK
H48
DPLL_REF_SSCLK#
H47
PEG_CLK#
K45 PEG_CLK
K44
DMI_RXN_0
AN47
DMI_RXN_1
AJ38
DMI_RXN_2
AN42
DMI_RXN_3
AN46
DMI_RXP_0
AM47
DMI_RXP_1
AJ39
DMI_RXP_2
AN41
DMI_RXP_3
AN45
DMI_TXN_0
AJ46
DMI_TXN_1
AJ41
DMI_TXN_2
AM40
DMI_TXN_3
AM44
DMI_TXP_0
AJ47
DMI_TXP_1
AJ42
DMI_TXP_2
AM39
DMI_TXP_3
AM43
GFX_VID_0
E35
GFX_VID_1
A39
GFX_VID_2
C38
GFX_VID_3
B39
GFX_VR_EN
E36
CL_CLK
AM49
CL_DATA
AK50
CL_PWROK
AT43
CL_RST#
AN49
CL_VREF
AM50
SDVO_CTRL_CLK
H35
SDVO_CTRL_DATA
K36
CLK_REQ#
G39
ICH_SYNC#
G40
T67 PAD~D
T66 PAD~D
T43PAD~D
C496
0.1U_0402_16V4Z~D
1
2
R351
392_0402_1~D
12
HOST
U29A
LE88CLGM A0 QM20_FCBGA1299~D
H_D#_0
E2
H_D#_1
G2
H_D#_2
G7
H_D#_3
M6
H_D#_4
H7
H_D#_5
H3
H_D#_6
G4
H_D#_7
F3
H_D#_8
N8
H_D#_9
H2
H_D#_10
M10
H_D#_11
N12
H_D#_12
N9
H_D#_13
H5
H_D#_14
P13
H_D#_15
K9
H_D#_16
M2
H_D#_17
W10
H_D#_18
Y8
H_D#_19
V4
H_D#_20
M3
H_D#_21
J1
H_D#_22
N5
H_D#_23
N3
H_D#_24
W6
H_D#_25
W9
H_D#_26
N2
H_D#_27
Y7
H_D#_28
Y9
H_D#_29
P4
H_D#_30
W3
H_D#_31
N1
H_D#_32
AD12
H_D#_33
AE3
H_D#_34
AD9
H_D#_35
AC9
H_D#_36
AC7
H_D#_37
AC14
H_D#_38
AD11
H_D#_39
AC11
H_D#_40
AB2
H_D#_41
AD7
H_D#_42
AB1
H_D#_43
Y3
H_D#_44
AC6
H_D#_45
AE2
H_D#_46
AC5
H_D#_47
AG3
H_D#_48
AJ9
H_D#_49
AH8
H_D#_50
AJ14
H_D#_51
AE9
H_D#_52
AE11
H_D#_53
AH12
H_D#_54
AJ5
H_D#_55
AH5
H_D#_56
AJ6
H_D#_57
AE7
H_D#_58
AJ7
H_D#_59
AJ2
H_D#_60
AE5
H_D#_61
AJ3
H_D#_62
AH2
H_D#_63
AH13
H_SWING
B3
H_RCOMP
C2
H_SCOMP
W1
H_SCOMP#
W2
H_CPURST#
B6
H_CPUSLP#
E5
H_AVREF
B9
H_DVREF
A9
H_A#_3 J13
H_A#_4 B11
H_A#_5 C11
H_A#_6 M11
H_A#_7 C15
H_A#_8 F16
H_A#_9 L13
H_A#_10 G17
H_A#_11 C14
H_A#_12 K16
H_A#_13 B13
H_A#_14 L16
H_A#_15 J17
H_A#_16 B14
H_A#_17 K19
H_A#_18 P15
H_A#_19 R17
H_A#_20 B16
H_A#_21 H20
H_A#_22 L19
H_A#_23 D17
H_A#_24 M17
H_A#_25 N16
H_A#_26 J19
H_A#_27 B18
H_A#_28 E19
H_A#_29 B17
H_A#_30 B15
H_A#_31 E17
H_A#_32 C18
H_A#_33 A19
H_A#_34 B19
H_A#_35 N19
H_ADS# G12
H_ADSTB#_0 H17
H_ADSTB#_1 G20
H_BNR# C8
H_BPRI# E8
H_BREQ# F12
H_DEFER# D6
H_DBSY# C10
HPLL_CLK AM5
HPLL_CLK# AM7
H_DPWR# H8
H_DRDY# K7
H_HIT# E4
H_HITM# C6
H_LOCK# G10
H_TRDY# B7
H_DINV#_0 K5
H_DINV#_1 L2
H_DINV#_2 AD13
H_DINV#_3 AE13
H_DSTBN#_0 M7
H_DSTBN#_1 K3
H_DSTBN#_2 AD2
H_DSTBN#_3 AH11
H_DSTBP#_0 L7
H_DSTBP#_1 K2
H_DSTBP#_2 AC2
H_DSTBP#_3 AJ10
H_REQ#_0 M14
H_REQ#_1 E13
H_REQ#_2 A11
H_REQ#_3 H13
H_REQ#_4 B12
H_RS#_0 E12
H_RS#_1 D7
H_RS#_2 D8
T73 PAD~D
R349
1K_0402_1%~D
12
R346
20_0402_1%~D
1 2
C498
0.01U_0402_16V7K~D
1
2
R363
1K_0402_1%~D
12
R357
20K_0402_5%~D
12
R583
0_0402_5%~D
12
R348
54.9_0402_1%~D
12
R589
0_0402_5%~D@
12
R362
100_0402_1%~D
12
R345
20_0402_1%~D
1 2
R361
2K_0402_1%~D
12
C497
0.1U_0402_16V4Z~D
1
2
T65 PAD~D
R36
100_0402_5%~D
1 2
T64 PAD~D
C491
0.1U_0402_16V4Z~D
1
2
C494
0.01U_0402_16V7K~D
1
2
R359
3.01K_0402_1%~D
12
R354
10K_0402_5%~D
12
C495
2.2U_0603_6.3V6K~D
1
2
R353
1K_0402_1%~D
12
C499
2.2U_0603_6.3V6K~D
1
2
T44PAD~D
R774 0_0402_5%~D
12
T74 PAD~D
C493
0.1U_0402_16V4Z~D
1
2
R356
221_0402_1%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_B_WE#
SB_RCVEN#SA_RCVEN#
DDR_A_BS1
DDR_A_BS0
DDR_A_WE#
DDR_A_CAS#
DDR_A_MA1
DDR_A_DQS#3
DDR_A_DQS6
DDR_A_MA7
DDR_A_DM4
DDR_A_DQS#0
DDR_A_DM3
DDR_A_DM0
DDR_A_DQS#4
DDR_A_MA13
DDR_A_RAS#
DDR_A_MA2
DDR_A_DQS2
DDR_A_MA8
DDR_A_MA12
DDR_A_MA0
DDR_A_DQS0
DDR_A_DQS7
DDR_A_DM6
DDR_A_DQS#1
DDR_A_DQS#5
DDR_A_DM7
DDR_A_MA11
DDR_A_DQS#7
DDR_A_DQS#2
DDR_A_DQS4
DDR_A_MA5
DDR_A_MA4
DDR_A_DQS1
DDR_A_MA3
DDR_A_MA9
DDR_A_BS2
DDR_A_DM2
DDR_A_DM5
DDR_A_MA6
DDR_A_MA10
DDR_A_DQS#6
DDR_A_DQS5
DDR_A_DM1
DDR_A_DQS3
DDR_A_D53
DDR_A_D47
DDR_A_D41
DDR_A_D31
DDR_A_D18
DDR_A_D61
DDR_A_D30
DDR_A_D25
DDR_A_D24
DDR_A_D39
DDR_A_D37
DDR_A_D17
DDR_A_D20
DDR_A_D13
DDR_A_D11
DDR_A_D9
DDR_A_D51
DDR_A_D5
DDR_A_D26
DDR_A_D8
DDR_A_D60
DDR_A_D57
DDR_A_D48
DDR_A_D12
DDR_A_D35
DDR_A_D33
DDR_A_D40
DDR_A_D32
DDR_A_D7
DDR_A_D62
DDR_A_D58
DDR_A_D46
DDR_A_D43
DDR_A_D3
DDR_A_D23
DDR_A_D16
DDR_A_D6
DDR_A_D54
DDR_A_D42
DDR_A_D36
DDR_A_D34
DDR_A_D52
DDR_A_D45
DDR_A_D44
DDR_A_D19
DDR_A_D10
DDR_A_D4
DDR_A_D21
DDR_A_D0
DDR_A_D22
DDR_A_D56
DDR_A_D55
DDR_A_D28
DDR_A_D14
DDR_A_D63
DDR_A_D50
DDR_A_D38
DDR_A_D29
DDR_A_D27
DDR_A_D15
DDR_A_D59
DDR_A_D49
DDR_A_D2
DDR_A_D1
DDR_B_D62
DDR_B_D58
DDR_B_D24
DDR_B_D19
DDR_B_D48
DDR_B_D4
DDR_B_D8
DDR_B_D63
DDR_B_D50
DDR_B_D22
DDR_B_D20
DDR_B_D34
DDR_B_D40
DDR_B_D0
DDR_B_D42
DDR_B_D37
DDR_B_D23
DDR_B_D17
DDR_B_D1
DDR_B_D60
DDR_B_D38
DDR_B_D7
DDR_B_D51
DDR_B_D28
DDR_B_D25
DDR_B_D56
DDR_B_D31
DDR_B_D11
DDR_B_D52
DDR_B_D46
DDR_B_D45
DDR_B_D39
DDR_B_D21
DDR_B_D15
DDR_B_D61
DDR_B_D6
DDR_B_D55
DDR_B_D53
DDR_B_D43
DDR_B_D41
DDR_B_D35
DDR_B_D30
DDR_B_D9
DDR_B_D47
DDR_B_D36
DDR_B_D32
DDR_B_D3
DDR_B_D18
DDR_B_D14
DDR_B_D12
DDR_B_D57
DDR_B_D54
DDR_B_D49
DDR_B_D44
DDR_B_D33
DDR_B_D27
DDR_B_D10
DDR_B_D59
DDR_B_D5
DDR_B_D29
DDR_B_D26
DDR_B_D2
DDR_B_D16
DDR_B_D13
DDR_B_BS1
DDR_B_BS0
DDR_B_CAS#
DDR_B_BS2
DDR_B_DM7
DDR_B_DQS2
DDR_B_DQS#7
DDR_B_DM2
DDR_B_MA10
DDR_B_DQS#5
DDR_B_DQS#0
DDR_B_DM5
DDR_B_MA6
DDR_B_MA12
DDR_B_DQS#4
DDR_B_DM1
DDR_B_MA3
DDR_B_DQS#6
DDR_B_DQS4
DDR_B_MA2
DDR_B_DQS5
DDR_B_DM0
DDR_B_MA9
DDR_B_DQS#3
DDR_B_DM6
DDR_B_MA1
DDR_B_MA0
DDR_B_DQS#1
DDR_B_DM3
DDR_B_MA8
DDR_B_DQS1
DDR_B_RAS#
DDR_B_MA11
DDR_B_DQS3
DDR_B_MA13
DDR_B_DQS6
DDR_B_MA7
DDR_B_MA4
DDR_B_DM4
DDR_B_MA5
DDR_B_DQS#2
DDR_B_DQS7
DDR_B_DQS0
DDR_A_MA14 DDR_B_MA14
DDR_B_D[0..63] 17DDR_A_D[0..63] 16
DDR_B_BS217
DDR_B_DQS[0..7]17
DDR_B_CAS#17 DDR_B_RAS#17
DDR_B_MA[0..14]17
DDR_B_WE#17
DDR_B_DM[0..7]17
DDR_B_BS017 DDR_B_BS117
DDR_A_WE#16
DDR_A_BS016
DDR_A_DQS#[0..7]16
DDR_A_BS116
DDR_A_MA[0..14]16
DDR_A_BS216
DDR_A_RAS#16
DDR_A_DQS[0..7]16
DDR_A_CAS#16
DDR_B_DQS#[0..7]17
DDR_A_DM[0..7]16
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
Crestline(2 of 6)
11 58Monday, February 26, 2007
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
T11
T10
DDR SYSTEM MEMORY B
U29E
LE88CLGM A0 QM20_FCBGA1299~D
SB_DQ_0 AP49
SB_DQ_1 AR51
SB_DQ_2 AW50
SB_DQ_3 AW51
SB_DQ_4 AN51
SB_DQ_5 AN50
SB_DQ_6 AV50
SB_DQ_7 AV49
SB_DQ_8 BA50
SB_DQ_9 BB50
SB_DQ_10 BA49
SB_DQ_11 BE50
SB_DQ_12 BA51
SB_DQ_13 AY49
SB_DQ_14 BF50
SB_DQ_15 BF49
SB_DQ_16 BJ50
SB_DQ_17 BJ44
SB_DQ_18 BJ43
SB_DQ_19 BL43
SB_DQ_20 BK47
SB_DQ_21 BK49
SB_DQ_22 BK43
SB_DQ_23 BK42
SB_DQ_24 BJ41
SB_DQ_25 BL41
SB_DQ_26 BJ37
SB_DQ_27 BJ36
SB_DQ_28 BK41
SB_DQ_29 BJ40
SB_DQ_30 BL35
SB_DQ_31 BK37
SB_DQ_32 BK13
SB_DQ_33 BE11
SB_DQ_34 BK11
SB_DQ_35 BC11
SB_DQ_36 BC13
SB_DQ_37 BE12
SB_DQ_38 BC12
SB_DQ_39 BG12
SB_DQ_40 BJ10
SB_DQ_41 BL9
SB_DQ_42 BK5
SB_DQ_43 BL5
SB_DQ_44 BK9
SB_DQ_45 BK10
SB_DQ_46 BJ8
SB_DQ_47 BJ6
SB_DQ_48 BF4
SB_DQ_49 BH5
SB_DQ_50 BG1
SB_DQ_51 BC2
SB_DQ_52 BK3
SB_DQ_53 BE4
SB_DQ_54 BD3
SB_DQ_55 BJ2
SB_DQ_56 BA3
SB_DQ_57 BB3
SB_DQ_58 AR1
SB_DQ_59 AT3
SB_DQ_60 AY2
SB_DQ_61 AY3
SB_DQ_62 AU2
SB_DQ_63 AT2
SB_BS_0
AY17
SB_BS_1
BG18
SB_BS_2
BG36
SB_CAS#
BE17
SB_DM_0
AR50
SB_DM_1
BD49
SB_DM_2
BK45
SB_DM_3
BL39
SB_DM_4
BH12
SB_DM_5
BJ7
SB_DM_6
BF3
SB_DM_7
AW2
SB_DQS_0
AT50
SB_DQS_1
BD50
SB_DQS_2
BK46
SB_DQS_3
BK39
SB_DQS_4
BJ12
SB_DQS_5
BL7
SB_DQS_6
BE2
SB_DQS_7
AV2
SB_DQS#_0
AU50
SB_DQS#_1
BC50
SB_DQS#_2
BL45
SB_DQS#_3
BK38
SB_DQS#_4
BK12
SB_DQS#_5
BK7
SB_DQS#_6
BF2
SB_DQS#_7
AV3
SB_MA_0
BC18
SB_MA_1
BG28
SB_MA_2
BG25
SB_MA_3
AW17
SB_MA_4
BF25
SB_MA_5
BE25
SB_MA_6
BA29
SB_MA_7
BC28
SB_MA_8
AY28
SB_MA_9
BD37
SB_MA_10
BG17
SB_MA_11
BE37
SB_MA_12
BA39
SB_MA_13
BG13
SB_RAS#
AV16
SB_RCVEN#
AY18
SB_WE#
BC17
SB_MA_14
BE24
DDR SYSTEM MEMORY A
U29D
LE88CLGM A0 QM20_FCBGA1299~D
SA_DQ_0 AR43
SA_DQ_1 AW44
SA_DQ_2 BA45
SA_DQ_3 AY46
SA_DQ_4 AR41
SA_DQ_5 AR45
SA_DQ_6 AT42
SA_DQ_7 AW47
SA_DQ_8 BB45
SA_DQ_9 BF48
SA_DQ_10 BG47
SA_DQ_11 BJ45
SA_DQ_12 BB47
SA_DQ_13 BG50
SA_DQ_14 BH49
SA_DQ_15 BE45
SA_DQ_16 AW43
SA_DQ_17 BE44
SA_DQ_18 BG42
SA_DQ_19 BE40
SA_DQ_20 BF44
SA_DQ_21 BH45
SA_DQ_22 BG40
SA_DQ_23 BF40
SA_DQ_24 AR40
SA_DQ_25 AW40
SA_DQ_26 AT39
SA_DQ_27 AW36
SA_DQ_28 AW41
SA_DQ_29 AY41
SA_DQ_30 AV38
SA_DQ_31 AT38
SA_DQ_32 AV13
SA_DQ_33 AT13
SA_DQ_34 AW11
SA_DQ_35 AV11
SA_DQ_36 AU15
SA_DQ_37 AT11
SA_DQ_38 BA13
SA_DQ_39 BA11
SA_DQ_40 BE10
SA_DQ_41 BD10
SA_DQ_42 BD8
SA_DQ_43 AY9
SA_DQ_44 BG10
SA_DQ_45 AW9
SA_DQ_46 BD7
SA_DQ_47 BB9
SA_DQ_48 BB5
SA_DQ_49 AY7
SA_DQ_50 AT5
SA_DQ_51 AT7
SA_DQ_52 AY6
SA_DQ_53 BB7
SA_DQ_54 AR5
SA_DQ_55 AR8
SA_DQ_56 AR9
SA_DQ_57 AN3
SA_DQ_58 AM8
SA_DQ_59 AN10
SA_DQ_60 AT9
SA_DQ_61 AN9
SA_DQ_62 AM9
SA_DQ_63 AN11
SA_BS_0
BB19
SA_BS_1
BK19
SA_BS_2
BF29
SA_CAS#
BL17
SA_DM_0
AT45
SA_DM_1
BD44
SA_DM_2
BD42
SA_DM_3
AW38
SA_DM_4
AW13
SA_DM_5
BG8
SA_DM_6
AY5
SA_DM_7
AN6
SA_DQS_0
AT46
SA_DQS_1
BE48
SA_DQS_2
BB43
SA_DQS_3
BC37
SA_DQS_4
BB16
SA_DQS_5
BH6
SA_DQS_6
BB2
SA_DQS_7
AP3
SA_DQS#_0
AT47
SA_DQS#_1
BD47
SA_DQS#_2
BC41
SA_DQS#_3
BA37
SA_DQS#_4
BA16
SA_DQS#_5
BH7
SA_DQS#_6
BC1
SA_DQS#_7
AP2
SA_MA_0
BJ19
SA_MA_1
BD20
SA_MA_2
BK27
SA_MA_3
BH28
SA_MA_4
BL24
SA_MA_5
BK28
SA_MA_6
BJ27
SA_MA_7
BJ25
SA_MA_8
BL28
SA_MA_9
BA28
SA_MA_10
BC19
SA_MA_11
BE28
SA_MA_12
BG30
SA_MA_13
BJ16
SA_RAS#
BE18
SA_RCVEN#
AY20
SA_WE#
BA19
SA_MA_14
BJ29
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_DDC2
DAT_DDC2
TV_Y
CRT_IREF
ENVDD
TV_CVBS
L_IBG
PEGCOMP
BIA_PWM
CRT_VSYNC
G_CLK_DDC2
G_DAT_DDC2
PANEL_BKEN
LCD_DDCCLK
G_CLK_DDC2
LCD_DDCDATA
CRT_HSYNC
G_DAT_DDC2
TV_C
LCD_BCLK+_C
LCD_BCLK-_C
LCD_ACLK+_C
LCD_ACLK-_C
SDVOB_RED-_C
SDVOB_RED+_C
SDVOB_GREEN-_C
SDVOB_GREEN+_C
SDVOB_BLUE-_C
SDVOB_BLUE+_C
SDVOB_CLK+_C
SDVOB_CLK-_C
LCD_ACLK+_C
LCD_DDCCLK
LCD_DDCDATA
LCD_A0-
LCD_A1-
LCD_A2-
LCD_B0-
LCD_B1-
LCD_B2-
LCD_A0+
LCD_A1+
LCD_A2+
LCD_B0+
LCD_B1+
LCD_B2+
LCD_ACLK-_C
LCD_BCLK-_C
LCD_BCLK+_C
+3.3V_RUN
+VCC_PEG
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
CFG510
CFG1910
CFG910
CFG2010
CFG1610
DAT_DDC2 20,36
CLK_DDC2 20,36
CRT_BLU20,36
CRT_RED20,36
CRT_GRN20,36
PANEL_BKEN38
LCD_DDCDATA19
CRT_HSYNC20
LCD_DDCCLK19
ENVDD19
CRT_VSYNC20
LCD_A0-19
LCD_B1-19
LCD_B2+19
LCD_B0-19
LCD_B2-19
LCD_A2+19
LCD_A0+19 LCD_A1+19
LCD_B0+19 LCD_B1+19
LCD_A1-19 LCD_A2-19
TV_Y36 TV_C36
TV_CVBS36
SDVOB_RED- 51
SDVOB_RED+ 51
SDVOB_GREEN- 51
SDVOB_GREEN+ 51
SDVOB_BLUE- 51
SDVOB_BLUE+ 51
SDVOB_CLK- 51
SDVOB_CLK+ 51
SDVOB_INT- 51
SDVOB_INT+ 51
BIA_PWM19
LCD_ACLK- 19
LCD_ACLK+ 19
LCD_BCLK+ 19
LCD_BCLK- 19
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
Crestline(3 of 6)
12 58Monday, February 26, 2007
Compal Electronics, Inc.
CFG[18:19] have internal pulldown
CFG[3:17] have internal pullup
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
NO CONNECT FOR DISCRETE
Trace CRT_IREF should be at
least 20 miles away from any
other toggling signal.
CFG5
CFG16
CFG19
DMI X2 Select
PCI Express
Graphic Lane
FSB Dynamic
ODT Low=Dynamic ODT Disable
High=Dynamic ODT Enable(default)
DMI Lane
Reversal Low=Normal (default)
High=Lane Reversed
CFG20
High=SDVO and PCIEx1 are operating
simultaneously via PEG port
Low=Only SDVO or PCIEx1 is
operational (defaults)
SDVO/PCIE
Concurrent
Operation
SDVO_CRTL_DATA
Low=No SDVO Device Present
High=SDVO Device Present (default)
Low = DMI x 2
High = DMI x 4 (Default)
Strap Pin Table
Low = Reverse LaneCFG9
High = Normal Operation (Default)
Keep stub for
caps as small
as possible
R369 = 2.4k ohm value is
recommended per Intel
R688
0_0402_5%~D
1 2
C506 0.1U_0402_10V7K~D
1 2
R110 2.2K_0402_5%~D
1 2
G
D
S
Q36
BSS138_SOT23~D
2
13
R366
24.9_0402_1%~D
1 2
R380
150_0402_1%~D
1 2
C209 3.3P_0402_50V8C~D@1 2
R685
0_0402_5%~D
1 2
R374 4.02K_0402_1%~D @
1 2
R377
150_0402_1%~D
12
R383
2.2K_0402_5%~D
12
R382 1.3K_0402_1%~D
12
R686
0_0402_5%~D
1 2
C502 0.1U_0402_10V7K~D
1 2
R689
0_0402_5%~D
1 2
C43
3.3P_0402_50V8C~D
@1
2
C505 0.1U_0402_10V7K~D 1 2
R365 4.02K_0402_1%~D@
1 2
R378
150_0402_1%~D
1 2
C193 3.3P_0402_50V8C~D@1 2
R41 2.2K_0402_5%~D
1 2
G
D
S
Q37
BSS138_SOT23~D
2
13
C501 0.1U_0402_10V7K~D 1 2
R379
150_0402_1%~D
1 2
LVDS TV VGA
PCI-EXPRESS GRAPHICS
U29C
LE88CLGM A0 QM20_FCBGA1299~D
L_BKLT_CTRL
J40
L_BKLT_EN
H39
L_CTRL_CLK
E39
L_CTRL_DATA
E40
L_DDC_CLK
C37
L_DDC_DATA
D35
L_VDD_EN
K40
LVDS_IBG
L41
LVDS_VBG
L43
LVDS_VREFH
N41
LVDS_VREFL
N40
LVDSA_CLK#
D46
LVDSA_CLK
C45
LVDSB_CLK#
D44
LVDSB_CLK
E42
LVDSA_DATA#_0
G51
LVDSA_DATA#_1
E51
LVDSA_DATA#_2
F49
LVDSA_DATA_0
G50
LVDSA_DATA_1
E50
LVDSA_DATA_2
F48
LVDSB_DATA#_0
G44
LVDSB_DATA#_1
B47
LVDSB_DATA#_2
B45
LVDSB_DATA_0
E44
LVDSB_DATA_1
A47
LVDSB_DATA_2
A45
TVA_DAC
E27
TVB_DAC
G27
TVC_DAC
K27
TVA_RTN
F27
TVB_RTN
J27
TVC_RTN
L27
TV_DCONSEL_0
M35
TV_DCONSEL_1
P33
CRT_BLUE
H32
CRT_BLUE#
G32
CRT_GREEN
K29
CRT_GREEN#
J29
CRT_RED
F29
CRT_RED#
E29
CRT_DDC_CLK
K33
CRT_DDC_DATA
G35
CRT_HSYNC
F33
CRT_TVO_IREF
C32
CRT_VSYNC
E33
PEG_COMPI N43
PEG_COMPO M43
PEG_RX#_0 J51
PEG_RX#_1 L51
PEG_RX#_2 N47
PEG_RX#_3 T45
PEG_RX#_4 T50
PEG_RX#_5 U40
PEG_RX#_6 Y44
PEG_RX#_7 Y40
PEG_RX#_8 AB51
PEG_RX#_9 W49
PEG_RX#_10 AD44
PEG_RX#_11 AD40
PEG_RX#_12 AG46
PEG_RX#_13 AH49
PEG_RX#_14 AG45
PEG_RX#_15 AG41
PEG_RX_0 J50
PEG_RX_1 L50
PEG_RX_2 M47
PEG_RX_3 U44
PEG_RX_4 T49
PEG_RX_5 T41
PEG_RX_6 W45
PEG_RX_7 W41
PEG_RX_8 AB50
PEG_RX_9 Y48
PEG_RX_10 AC45
PEG_RX_11 AC41
PEG_RX_12 AH47
PEG_RX_13 AG49
PEG_RX_14 AH45
PEG_RX_15 AG42
PEG_TX#_0 N45
PEG_TX#_1 U39
PEG_TX#_2 U47
PEG_TX#_3 N51
PEG_TX#_4 R50
PEG_TX#_5 T42
PEG_TX#_6 Y43
PEG_TX#_7 W46
PEG_TX#_8 W38
PEG_TX#_9 AD39
PEG_TX#_10 AC46
PEG_TX#_11 AC49
PEG_TX#_12 AC42
PEG_TX#_13 AH39
PEG_TX#_14 AE49
PEG_TX#_15 AH44
PEG_TX_0 M45
PEG_TX_1 T38
PEG_TX_2 T46
PEG_TX_3 N50
PEG_TX_4 R51
PEG_TX_5 U43
PEG_TX_6 W42
PEG_TX_7 Y47
PEG_TX_8 Y39
PEG_TX_9 AC38
PEG_TX_10 AD47
PEG_TX_11 AC50
PEG_TX_12 AD43
PEG_TX_13 AG39
PEG_TX_14 AE50
PEG_TX_15 AH43
C181 3.3P_0402_50V8C~D@1 2
C196 3.3P_0402_50V8C~D@1 2
R375
150_0402_1%~D
12
R372 4.02K_0402_1%~D@
1 2
R687
0_0402_5%~D
@
12
C504 0.1U_0402_10V7K~D
1 2
C500 0.1U_0402_10V7K~D
1 2
R368 4.02K_0402_1%~D@
1 2
R384
2.2K_0402_5%~D
12
R373 4.02K_0402_1%~D@
1 2
C503 0.1U_0402_10V7K~D 1 2
C39
3.3P_0402_50V8C~D
@ 1
2
C207 3.3P_0402_50V8C~D@1 2
R369
3.3K_0402_1%~D
1 2
C192 3.3P_0402_50V8C~D@1 2
C507 0.1U_0402_10V7K~D 1 2
R376
150_0402_1%~D
12
R667
0_0402_5%~D
@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VCC_TX_LVDS
+3.3V_CRT_DAC
+VCC_TX_LVDS_R
+1.05V_VCCP
+1.25V_RUN
+1.25V_RUN_AXD
+1.25V_RUN
+VCC_TX_LVDS
+3.3V_RUN
+VCC_RXR_DMI
+VCC_PEG
+3.3V_RUN
+1.25V_RUN_DPLLA
+1.25V_RUN_DPLLB
+1.25V_RUN_HPLL
+1.25V_RUN_HPLL
+1.25V_RUN_DPLLB+1.25V_RUN_DPLLA
+1.25V_RUN
+1.25V_RUN+1.25V_RUN
+1.25V_RUN_MPLL
+1.25V_RUN
+1.25V_RUN_MPLL
+VCC_TX_LVDS
+3.3V_RUN
+VCC_PEG
+1.05V_VCCP
+1.25V_RUN_PEGPLL
+1.25V_RUN_PEGPLL+1.25V_RUN
+1.25V_RUN
+1.8V_RUN
+1.25V_RUN
+1.5V_RUN_TVDAC
+1.5V_RUN
+1.25V_RUN
+1.8V_SUS +1.8V_SM_CK
+VCC_TX_LVDS
+3.3V_RUN
+1.25V_RUN
+1.05V_VCCP
+1.05V_VCCP
+VCC_RXR_DMI
+3.3V_RUN+3.3V_RUN_TVDAC
+3.3V_RUN_TVDACB
+3.3V_RUN_TVDACC
+3.3V_RUN_TVDACB
+3.3V_RUN_TVDACC
+3.3V_RUN_DAC_BG
+3.3V_RUN_DAC_BG +3.3V_RUN
+1.5V_RUN_QDAC
+1.5V_RUN_QDAC
+3.3V_RUN_TVDACA
+3.3V_RUN_TVDACA
+1.25V_RUN_A_SM
+1.25V_RUN_SM_CK
+1.5V_RUN_TVDAC
+3.3V_RUN
+1.25V_RUN
+1.8V_SM_CK
+1.25V_RUN_PEGPLL
+1.8V_SUS
+1.8V_RUN
+1.8V_SUS
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
Crestline(4 of 6)
13 58Wednesday, March 07, 2007
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
40mA Max.
45mA Max.45mA Max.
40mA Max.
CRB 270uF
Non-iAMT
Place caps close
to VCC_AXF (Pin
A21, B21, B23)
C533,C534,C536,C545,C553,C579 are being
replaced by 0-ohm 0805 resistor
C722
0.022U_0402_16V7K~D
1
2
C575
22U_0805_6.3VAM~D
1
2
C541
0.1U_0402_16V4Z~D
1
2
R406
0_0805_5%~D
1 2
L40
10U_MLZ2012E100PTAIN_60mA_25%_0805~D
12
POWER
CRT PLL LVDS PEG SM
VTT
AXD
AXF
CLK
VTTLF
LVDS
TV/CRT
TV
DMI PEG
U29H
LE88CLGM A0 QM20_FCBGA1299~D
VCCSYNC J32
VCCA_CRT_DAC_1 A33
VCCA_CRT_DAC_2 B33
VCCA_DAC_BG A30
VSSA_DAC_BG B32
VCCA_DPLLA B49
VCCA_DPLLB H49
VCCA_HPLL AL2
VCCA_LVDS A41
VSSA_LVDS B41
VCCA_MPLL AM2
VCCA_PEG_BG K50
VSSA_PEG_BG K49
VCCA_PEG_PLL U51
VCCA_SM_1 AW18
VCCA_SM_2 AV19
VCCA_SM_3 AU19
VCCA_SM_4 AU18
VCCA_SM_5 AU17
VCCA_SM_7 AT22
VCCA_SM_8 AT21
VCCA_SM_9 AT19
VCCA_SM_10 AT18
VCCA_SM_11 AT17
VCCA_SM_NCTF_1 AR17
VCCA_SM_NCTF_2 AR16
VCCA_SM_CK_1 BC29
VCCA_SM_CK_2 BB29
VCCA_TVA_DAC_1 C25
VCCA_TVA_DAC_2 B25
VCCA_TVB_DAC_1 C27
VCCA_TVB_DAC_2 B27
VCCA_TVC_DAC_1 B28
VCCA_TVC_DAC_2 A28
VCCD_CRT M32
VCCD_TVDAC L29
VCCD_QDAC N28
VCCD_HPLL AN2
VCCD_PEG_PLL U48
VCCD_LVDS_1 J41
VCCD_LVDS_2 H42
VTT_1
U13
VTT_2
U12
VTT_3
U11
VTT_4
U9
VTT_5
U8
VTT_6
U7
VTT_7
U5
VTT_8
U3
VTT_9
U2
VTT_10
U1
VTT_11
T13
VTT_12
T11
VTT_13
T10
VTT_14
T9
VTT_15
T7
VTT_16
T6
VTT_17
T5
VTT_18
T3
VTT_19
T2
VTT_20
R3
VTT_21
R2
VTT_22
R1
VCC_AXD_1
AT23
VCC_AXD_2
AU28
VCC_AXD_3
AU24
VCC_AXD_4
AT29
VCC_AXD_5
AT25
VCC_AXF_1
B23
VCC_AXF_2
B21
VCC_AXF_3
A21
VCC_DMI
AJ50
VCC_SM_CK_1
BK24
VCC_SM_CK_2
BK23
VCC_SM_CK_3
BJ24
VCC_SM_CK_4
BJ23
VCC_TX_LVDS
A43
VCC_HV_1
C40
VCC_HV_2
B40
VCC_PEG_1
AD51
VCC_PEG_2
W50
VCC_PEG_3
W51
VCC_PEG_4
V49
VCC_PEG_5
V50
VCC_RXR_DMI_1
AH50
VCC_RXR_DMI_2
AH51
VTTLF1
A7
VTTLF2
F2
VTTLF3
AH1
VCC_AXD_6
AT30
VCC_AXD_NCTF
AR29
C546
0.1U_0402_16V4Z~D
1
2
C577
0.47U_0402_10V4Z~D
1
2
C720
0.022U_0402_16V7K~D
@
1
2
C559
1U_0603_10V4Z~D
1
2
C545
22n_0805_25V
1 2
3
R815
100_0603_5%~D
1 2
L32
BLM18PG181SN1_0603~D
12
C555
0.1U_0402_16V4Z~D
1
2
C565
1U_0603_10V4Z~D
1
2
L35
BLM21PG221SN1D_0805~D
1 2
C566
1U_0603_10V4Z~D
1
2
R116
0_0603_5%~D
@
12
C557
10U_0805_4VAM~D
1
2
C587
0.1U_0402_16V4Z~D
1
2
C539
0.1U_0402_16V4Z~D
1
2
+
C556
220U_D2_4VY_R15M~D
1
2
C538
0.1U_0402_16V4Z~D
1
2
+
C585
470U_D2_2.5VM_R15~D
1
2
C532
0.1U_0402_16V4Z~D
1
2
L34
BLM18PG181SN1_0603~D
12
R416
1_0603_5%~D
12
C552
1U_0603_10V4Z~D
1
2
C593
22U_0805_6.3VAM~D
1
2
C581
1U_0603_10V4Z~D
1
2
C573
0.1U_0402_16V4Z~D
1
2
C567
10U_0805_4VAM~D
12
C537
0.47U_0402_10V4Z~D
1
2
C561
22U_0805_6.3V6M~D
1
2
C571
0.1U_0402_16V4Z~D
1
2
C563
0.1U_0402_16V4Z~D
1
2
C543
4.7U_0603_6.3V6M~D
1
2
R579
0_0603_5%~D
@
1 2
C544
2.2U_0603_6.3V6K~D
1
2
C536
22n_0805_25V
1 2
3
C594
10U_0805_4VAM~D
12
C597
0.1U_0402_16V4Z~D
1
2
C568
0.1U_0402_16V4Z~D
1
2
C547
1000P_0402_50V7K~D
1
2
C578
0.47U_0402_10V4Z~D
1
2
L39
10U_MLZ2012E100PTAIN_60mA_25%_0805~D
12
R152
0_0603_5%~D
12
C584
0.1U_0402_16V4Z~D
1
2
+
C548
220U_D2_4VY_R15M~D
1
2
C551
22U_0805_6.3V6M~D
1
2
C553
22n_0805_25V
1 2
3
C723
0.022U_0402_16V7K~D
@
1
2
C549
10U_0805_4VAM~D
1
2
R408
0_0603_5%~D
1 2
+
C535
220U_D2_4VY_R15M~D
1
2
R578
0_0603_5%~D
1 2
+
C586
470U_D2_2.5VM_R15~D
1
2
C533
22n_0805_25V
1 2
3
C642
0.1U_0402_16V4Z~D
1
2
+
C595
220U_D2_4VY_R15M~D
1
2
C579
22n_0805_25V
1 2
3
L33
BLM18AG121SN1D_0603~D 12
C588
0.1U_0402_16V4Z~D
1
2
L30
BLM18PG181SN1_0603~D
12
C596
1000P_0402_50V7K~D
1
2
R417
10_0603_5%~D
1 2
C592
0.1U_0402_16V4Z~D
1
2
C576
0.47U_0402_10V4Z~D
1
2
L37
BLM18AG121SN1D_0603~D 12
C589
1U_0603_10V4Z~D
1
2
C574
0.1U_0402_16V4Z~D
1
2
+
C558
100U_D2E_6.3VM_R18M~D
1
2
C562
22U_0805_6.3V6M~D
1
2
C590
10U_0805_4VAM~D
1
2
C564
22U_0805_6.3V6M~D
1
2
L42
BLM18AG121SN1D_0603~D
12
C540
10U_0805_10V4Z~D
1
2
C560
4.7U_0603_6.3V6M~D
1
2
C591
0.1U_0402_16V4Z~D
1
2
L31
BLM18PG181SN1_0603~D
12
L38
BLM18AG121SN1D_0603~D 12
C572
22U_0805_6.3VAM~D
1
2
L29
BLM18PG181SN1_0603~D
12
R409
1_0402_5%~D
C570
0.1U_0402_16V4Z~D
1
2
C534
22n_0805_25V
1 2
3
D16
RB751V_SOD323~D
2 1
C554
0.1U_0402_16V4Z~D
1
2
C542
4.7U_0603_6.3V6M~D
1
2
C569
1U_0603_10V4Z~D
1
2
C550
0.1U_0402_16V4Z~D
1
2
L41
BLM18AG121SN1D_0603~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VCCSM_LF7
VCCSM_LF3
VCCSM_LF6
VCCSM_LF5
VCCSM_LF1
VCCSM_LF2
VCCSM_LF4
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP+1.05V_VCCP
+3.3V_RUN
+1.05V_VCCP
+1.05V_VCCP
+1.8V_SUS
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
Crestline(5 of 6)
14 58Wednesday, February 28, 2007
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Layout Note:
370 mils from edge
Layout Note:
Inside GMCH cavity.
Layout Note: Inside GMCH cavity.
Layout Note:
Place close to GMCH edge.
Layout Note:
Place C901 where
LVDS and DDR2 taps.
Layout Note:
Place on the edge Layout Note: Inside GMCH
cavity for VCC_AXG.
370 mils from edge.
Layout Note:
C627
1U_0402_6.3V4Z~D
1
2
C619
0.1U_0402_10V7K~D
1
2
C620
0.1U_0402_10V7K~D
1
2
C606
22U_0805_6.3V6M~D
1
2
C616
0.22U_0402_10V4Z~D
1
2
C612
0.1U_0402_10V7K~D
1
2
C617
0.22U_0402_10V4Z~D
1
2
C626
1U_0402_6.3V4Z~D
1
2
C618
0.1U_0402_10V7K~D
1
2
+
C602
220U_D2_4VY_R15M~D
1
2
D17
BAT54CW_SOT323~D
3
2
1
C600
10U_0805_10V4Z~D
1
2
C623
0.22U_0402_10V4Z~D
1
2
C611
0.1U_0402_10V7K~D
1
2
C621
0.1U_0402_10V7K~D
1
2
C614
0.1U_0402_10V7K~D
1
2
C625
0.47U_0402_10V4Z~D
1
2
C610
1U_0603_10V4Z~D
1
2
C622
0.1U_0402_10V7K~D
1
2
C624
0.22U_0402_10V4Z~D
1
2
+
C598
220U_D2_4VY_R15M~D
1
2
+
C599
220U_D2_4VY_R15M~D
1
2
C609
0.47U_0402_10V4Z~D
1
2
R420
10_0603_5%~D
1 2
C604
0.22U_0402_10V4Z~D
1
2
C607
22U_0805_6.3V6M~D
1
2
C613
0.22U_0402_10V4Z~D
1
2
POWER
VCC CORE
VCC SM VCC GFX
VCC GFX NCTFVCC SM LF
U29G
LE88CLGM A0 QM20_FCBGA1299~D
VCC_1
AT35
VCC_2
AT34
VCC_3
AH28
VCC_4
AC32
VCC_5
AC31
VCC_6
AK32
VCC_7
AJ31
VCC_8
AJ28
VCC_9
AH32
VCC_10
AH31
VCC_11
AH29
VCC_12
AF32
VCC_13
R30
VCC_SM_LF7 AT6
VCC_SM_LF6 AW8
VCC_SM_LF5 BD4
VCC_SM_LF4 BD17
VCC_SM_LF3 BE39
VCC_SM_LF2 BC39
VCC_SM_LF1 AW45
VCC_AXG_NCTF_83 Y31
VCC_AXG_NCTF_82 V29
VCC_SM_1
AU32
VCC_SM_2
AU33
VCC_SM_3
AU35
VCC_SM_4
AV33
VCC_SM_5
AW33
VCC_SM_6
AW35
VCC_SM_7
AY35
VCC_SM_8
BA32
VCC_SM_9
BA33
VCC_SM_10
BA35
VCC_SM_11
BB33
VCC_SM_12
BC32
VCC_SM_13
BC33
VCC_SM_14
BC35
VCC_SM_15
BD32
VCC_SM_16
BD35
VCC_SM_17
BE32
VCC_SM_18
BE33
VCC_SM_19
BE35
VCC_SM_20
BF33
VCC_SM_21
BF34
VCC_SM_22
BG32
VCC_SM_23
BG33
VCC_SM_24
BG35
VCC_SM_25
BH32
VCC_SM_26
BH34
VCC_SM_27
BH35
VCC_SM_28
BJ32
VCC_SM_29
BJ33
VCC_SM_30
BJ34
VCC_SM_31
BK32
VCC_SM_32
BK33
VCC_SM_33
BK34
VCC_SM_34
BK35
VCC_SM_35
BL33
VCC_SM_36
AU30
VCC_AXG_31
AH26
VCC_AXG_32
AD31
VCC_AXG_33
AJ20
VCC_AXG_34
AN14
VCC_AXG_1
R20
VCC_AXG_2
T14
VCC_AXG_3
W13
VCC_AXG_4
W14
VCC_AXG_5
Y12
VCC_AXG_6
AA20
VCC_AXG_7
AA23
VCC_AXG_8
AA26
VCC_AXG_9
AA28
VCC_AXG_10
AB21
VCC_AXG_11
AB24
VCC_AXG_12
AB29
VCC_AXG_13
AC20
VCC_AXG_14
AC21
VCC_AXG_15
AC23
VCC_AXG_16
AC24
VCC_AXG_17
AC26
VCC_AXG_18
AC28
VCC_AXG_19
AC29
VCC_AXG_20
AD20
VCC_AXG_21
AD23
VCC_AXG_22
AD24
VCC_AXG_23
AD28
VCC_AXG_24
AF21
VCC_AXG_25
AF26
VCC_AXG_26
AA31
VCC_AXG_27
AH20
VCC_AXG_28
AH21
VCC_AXG_29
AH23
VCC_AXG_30
AH24
VCC_AXG_NCTF_1 T17
VCC_AXG_NCTF_2 T18
VCC_AXG_NCTF_3 T19
VCC_AXG_NCTF_4 T21
VCC_AXG_NCTF_5 T22
VCC_AXG_NCTF_6 T23
VCC_AXG_NCTF_7 T25
VCC_AXG_NCTF_8 U15
VCC_AXG_NCTF_9 U16
VCC_AXG_NCTF_10 U17
VCC_AXG_NCTF_11 U19
VCC_AXG_NCTF_12 U20
VCC_AXG_NCTF_13 U21
VCC_AXG_NCTF_14 U23
VCC_AXG_NCTF_15 U26
VCC_AXG_NCTF_16 V16
VCC_AXG_NCTF_17 V17
VCC_AXG_NCTF_18 V19
VCC_AXG_NCTF_19 V20
VCC_AXG_NCTF_20 V21
VCC_AXG_NCTF_21 V23
VCC_AXG_NCTF_22 V24
VCC_AXG_NCTF_23 Y15
VCC_AXG_NCTF_24 Y16
VCC_AXG_NCTF_25 Y17
VCC_AXG_NCTF_26 Y19
VCC_AXG_NCTF_27 Y20
VCC_AXG_NCTF_28 Y21
VCC_AXG_NCTF_29 Y23
VCC_AXG_NCTF_30 Y24
VCC_AXG_NCTF_31 Y26
VCC_AXG_NCTF_32 Y28
VCC_AXG_NCTF_33 Y29
VCC_AXG_NCTF_34 AA16
VCC_AXG_NCTF_35 AA17
VCC_AXG_NCTF_36 AB16
VCC_AXG_NCTF_37 AB19
VCC_AXG_NCTF_38 AC16
VCC_AXG_NCTF_39 AC17
VCC_AXG_NCTF_40 AC19
VCC_AXG_NCTF_41 AD15
VCC_AXG_NCTF_42 AD16
VCC_AXG_NCTF_43 AD17
VCC_AXG_NCTF_44 AF16
VCC_AXG_NCTF_45 AF19
VCC_AXG_NCTF_46 AH15
VCC_AXG_NCTF_47 AH16
VCC_AXG_NCTF_48 AH17
VCC_AXG_NCTF_49 AH19
VCC_AXG_NCTF_50 AJ16
VCC_AXG_NCTF_51 AJ17
VCC_AXG_NCTF_52 AJ19
VCC_AXG_NCTF_53 AK16
VCC_AXG_NCTF_54 AK19
VCC_AXG_NCTF_55 AL16
VCC_AXG_NCTF_56 AL17
VCC_AXG_NCTF_57 AL19
VCC_AXG_NCTF_58 AL20
VCC_AXG_NCTF_59 AL21
VCC_AXG_NCTF_60 AL23
VCC_AXG_NCTF_61 AM15
VCC_AXG_NCTF_62 AM16
VCC_AXG_NCTF_63 AM19
VCC_AXG_NCTF_64 AM20
VCC_AXG_NCTF_65 AM21
VCC_AXG_NCTF_66 AM23
VCC_AXG_NCTF_67 AP15
VCC_AXG_NCTF_68 AP16
VCC_AXG_NCTF_69 AP17
VCC_AXG_NCTF_70 AP19
VCC_AXG_NCTF_71 AP20
VCC_AXG_NCTF_72 AP21
VCC_AXG_NCTF_73 AP23
VCC_AXG_NCTF_74 AP24
VCC_AXG_NCTF_75 AR20
VCC_AXG_NCTF_76 AR21
VCC_AXG_NCTF_77 AR23
VCC_AXG_NCTF_78 AR24
VCC_AXG_NCTF_79 AR26
VCC_AXG_NCTF_80 V26
VCC_AXG_NCTF_81 V28
C608
0.1U_0402_10V7K~D
1
2
C601
22U_0805_6.3VAM~D
1
2
C603
22U_0805_6.3VAM~D
1
2
+
C605
330U_D2E_2.5VM~D
1
2
POWER
U29F
LE88CLGM A0 QM20_FCBGA1299~D
VCC_NCTF_1
AB33
VCC_NCTF_2
AB36
VCC_NCTF_3
AB37
VCC_NCTF_4
AC33
VCC_NCTF_5
AC35
VCC_NCTF_6
AC36
VCC_NCTF_7
AD35
VCC_NCTF_8
AD36
VCC_NCTF_9
AF33
VCC_NCTF_10
AF36
VCC_NCTF_11
AH33
VCC_NCTF_12
AH35
VCC_NCTF_13
AH36
VCC_NCTF_14
AH37
VCC_NCTF_15
AJ33
VCC_NCTF_16
AJ35
VCC_NCTF_17
AK33
VCC_NCTF_18
AK35
VCC_NCTF_19
AK36
VCC_NCTF_20
AK37
VCC_NCTF_21
AD33
VCC_NCTF_22
AJ36
VCC_NCTF_23
AM35
VCC_NCTF_24
AL33
VCC_NCTF_25
AL35
VCC_NCTF_26
AA33
VCC_NCTF_27
AA35
VCC_NCTF_28
AA36
VCC_NCTF_29
AP35
VCC_NCTF_30
AP36
VCC_NCTF_31
AR35
VCC_NCTF_32
AR36
VCC_NCTF_33
Y32
VCC_NCTF_34
Y33
VCC_NCTF_35
Y35
VCC_NCTF_36
Y36
VCC_NCTF_37
Y37
VCC_NCTF_38
T30
VCC_NCTF_39
T34
VCC_NCTF_40
T35
VCC_NCTF_41
U29
VCC_NCTF_42
U31
VCC_NCTF_43
U32
VCC_NCTF_44
U33
VCC_NCTF_45
U35
VCC_NCTF_46
U36
VCC_NCTF_47
V32
VCC_NCTF_48
V33
VCC_NCTF_49
V36
VCC_NCTF_50
V37
VCC_AXM_1 AT33
VCC_AXM_2 AT31
VCC_AXM_3 AK29
VCC_AXM_4 AK24
VCC_AXM_5 AJ26
VCC_AXM_6 AK23
VCC_AXM_7 AJ23
VCC_AXM_NCTF_1
AL24
VCC_AXM_NCTF_2
AL26
VCC_AXM_NCTF_3
AL28
VCC_AXM_NCTF_4
AM26
VCC_AXM_NCTF_5
AM28
VCC_AXM_NCTF_6
AM29
VCC_AXM_NCTF_7
AM31
VCC_AXM_NCTF_8
AM32
VCC_AXM_NCTF_9
AM33
VCC_AXM_NCTF_10
AP29
VCC_AXM_NCTF_11
AP31
VCC_AXM_NCTF_12
AP32
VCC_AXM_NCTF_13
AP33
VCC_AXM_NCTF_14
AL29
VCC_AXM_NCTF_15
AL31
VCC_AXM_NCTF_16
AL32
VSS_NCTF_1 T27
VSS_NCTF_2 T37
VSS_NCTF_3 U24
VSS_NCTF_4 U28
VSS_NCTF_5 V31
VSS_NCTF_6 V35
VSS_NCTF_7 AA19
VSS_NCTF_8 AB17
VSS_NCTF_9 AB35
VSS_NCTF_10 AD19
VSS_NCTF_11 AD37
VSS_NCTF_12 AF17
VSS_NCTF_13 AF35
VSS_NCTF_14 AK17
VSS_NCTF_15 AM17
VSS_NCTF_16 AM24
VSS_NCTF_17 AP26
VSS_NCTF_18 AP28
VSS_NCTF_19 AR15
VSS_NCTF_20 AR19
VSS_NCTF_21 AR28
VSS_SCB1 A3
VSS_SCB2 B2
VSS_SCB3 C1
VSS_SCB4 BL1
VSS_SCB5 BL51
VCC_AXM_NCTF_17
AR31
VCC_AXM_NCTF_18
AR32
VCC_AXM_NCTF_19
AR33
VSS_SCB6 A51
C615
22U_0805_6.3V6M~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
Crestline(6 of 6)
15 58Wednesday, February 14, 2007
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
VSS
U29J
LE88CLGM A0 QM20_FCBGA1299~D
VSS_199
C46
VSS_200
C50
VSS_201
C7
VSS_202
D13
VSS_203
D24
VSS_204
D3
VSS_205
D32
VSS_206
D39
VSS_207
D45
VSS_208
D49
VSS_209
E10
VSS_210
E16
VSS_211
E24
VSS_212
E28
VSS_213
E32
VSS_214
E47
VSS_215
F19
VSS_216
F36
VSS_217
F4
VSS_218
F40
VSS_219
F50
VSS_220
G1
VSS_221
G13
VSS_222
G16
VSS_223
G19
VSS_224
G24
VSS_225
G28
VSS_226
G29
VSS_227
G33
VSS_228
G42
VSS_229
G45
VSS_230
G48
VSS_231
G8
VSS_232
H24
VSS_233
H28
VSS_234
H4
VSS_235
H45
VSS_236
J11
VSS_237
J16
VSS_238
J2
VSS_239
J24
VSS_240
J28
VSS_241
J33
VSS_242
J35
VSS_243
J39
VSS_245
K12
VSS_246
K47
VSS_247
K8
VSS_248
L1
VSS_249
L17
VSS_250
L20
VSS_251
L24
VSS_252
L28
VSS_253
L3
VSS_254
L33
VSS_255
L49
VSS_256
M28
VSS_257
M42
VSS_258
M46
VSS_259
M49
VSS_260
M5
VSS_261
M50
VSS_262
M9
VSS_263
N11
VSS_264
N14
VSS_265
N17
VSS_266
N29
VSS_267
N32
VSS_268
N36
VSS_269
N39
VSS_270
N44
VSS_271
N49
VSS_272
N7
VSS_273
P19
VSS_274
P2
VSS_275
P23
VSS_276
P3
VSS_277
P50
VSS_278
R49
VSS_279
T39
VSS_280
T43
VSS_281
T47
VSS_282
U41
VSS_283
U45
VSS_284
U50
VSS_285
V2
VSS_286
V3
VSS_287 W11
VSS_288 W39
VSS_289 W43
VSS_290 W47
VSS_291 W5
VSS_292 W7
VSS_293 Y13
VSS_294 Y2
VSS_295 Y41
VSS_296 Y45
VSS_297 Y49
VSS_298 Y5
VSS_299 Y50
VSS_300 Y11
VSS_301 P29
VSS_302 T29
VSS_303 T31
VSS_304 T33
VSS_305 R28
VSS_306 AA32
VSS_307 AB32
VSS_308 AD32
VSS_309 AF28
VSS_310 AF29
VSS_311 AT27
VSS_312 AV25
VSS_313 H50
VSS
U29I
LE88CLGM A0 QM20_FCBGA1299~D
VSS_1
A13
VSS_2
A15
VSS_3
A17
VSS_4
A24
VSS_5
AA21
VSS_6
AA24
VSS_7
AA29
VSS_8
AB20
VSS_9
AB23
VSS_10
AB26
VSS_11
AB28
VSS_12
AB31
VSS_13
AC10
VSS_14
AC13
VSS_15
AC3
VSS_16
AC39
VSS_17
AC43
VSS_18
AC47
VSS_19
AD1
VSS_20
AD21
VSS_21
AD26
VSS_22
AD29
VSS_23
AD3
VSS_24
AD41
VSS_25
AD45
VSS_26
AD49
VSS_27
AD5
VSS_28
AD50
VSS_29
AD8
VSS_30
AE10
VSS_31
AE14
VSS_32
AE6
VSS_33
AF20
VSS_34
AF23
VSS_35
AF24
VSS_36
AF31
VSS_37
AG2
VSS_38
AG38
VSS_39
AG43
VSS_40
AG47
VSS_41
AG50
VSS_42
AH3
VSS_43
AH40
VSS_44
AH41
VSS_45
AH7
VSS_46
AH9
VSS_47
AJ11
VSS_48
AJ13
VSS_49
AJ21
VSS_50
AJ24
VSS_51
AJ29
VSS_52
AJ32
VSS_53
AJ43
VSS_54
AJ45
VSS_55
AJ49
VSS_56
AK20
VSS_57
AK21
VSS_58
AK26
VSS_59
AK28
VSS_60
AK31
VSS_61
AK51
VSS_62
AL1
VSS_63
AM11
VSS_64
AM13
VSS_65
AM3
VSS_66
AM4
VSS_67
AM41
VSS_68
AM45
VSS_69
AN1
VSS_70
AN38
VSS_71
AN39
VSS_72
AN43
VSS_73
AN5
VSS_74
AN7
VSS_75
AP4
VSS_76
AP48
VSS_77
AP50
VSS_78
AR11
VSS_79
AR2
VSS_80
AR39
VSS_81
AR44
VSS_82
AR47
VSS_83
AR7
VSS_84
AT10
VSS_85
AT14
VSS_86
AT41
VSS_87
AT49
VSS_88
AU1
VSS_89
AU23
VSS_90
AU29
VSS_91
AU3
VSS_92
AU36
VSS_93
AU49
VSS_94
AU51
VSS_95
AV39
VSS_96
AV48
VSS_97
AW1
VSS_98
AW12
VSS_99
AW16
VSS_100 AW24
VSS_101 AW29
VSS_102 AW32
VSS_103 AW5
VSS_104 AW7
VSS_105 AY10
VSS_106 AY24
VSS_107 AY37
VSS_108 AY42
VSS_109 AY43
VSS_110 AY45
VSS_111 AY47
VSS_112 AY50
VSS_113 B10
VSS_114 B20
VSS_115 B24
VSS_116 B29
VSS_117 B30
VSS_118 B35
VSS_119 B38
VSS_120 B43
VSS_121 B46
VSS_122 B5
VSS_123 B8
VSS_124 BA1
VSS_125 BA17
VSS_126 BA18
VSS_127 BA2
VSS_128 BA24
VSS_129 BB12
VSS_130 BB25
VSS_131 BB40
VSS_132 BB44
VSS_133 BB49
VSS_134 BB8
VSS_135 BC16
VSS_136 BC24
VSS_137 BC25
VSS_138 BC36
VSS_139 BC40
VSS_140 BC51
VSS_141 BD13
VSS_142 BD2
VSS_143 BD28
VSS_144 BD45
VSS_145 BD48
VSS_146 BD5
VSS_147 BE1
VSS_148 BE19
VSS_149 BE23
VSS_150 BE30
VSS_151 BE42
VSS_152 BE51
VSS_153 BE8
VSS_154 BF12
VSS_155 BF16
VSS_156 BF36
VSS_157 BG19
VSS_158 BG2
VSS_159 BG24
VSS_160 BG29
VSS_161 BG39
VSS_162 BG48
VSS_163 BG5
VSS_164 BG51
VSS_165 BH17
VSS_166 BH30
VSS_167 BH44
VSS_168 BH46
VSS_169 BH8
VSS_170 BJ11
VSS_171 BJ13
VSS_172 BJ38
VSS_173 BJ4
VSS_174 BJ42
VSS_175 BJ46
VSS_176 BK15
VSS_177 BK17
VSS_178 BK25
VSS_179 BK29
VSS_180 BK36
VSS_181 BK40
VSS_182 BK44
VSS_183 BK6
VSS_184 BK8
VSS_185 BL11
VSS_186 BL13
VSS_187 BL19
VSS_188 BL22
VSS_189 BL37
VSS_190 BL47
VSS_191 C12
VSS_192 C16
VSS_193 C19
VSS_194 C28
VSS_195 C29
VSS_196 C33
VSS_197 C36
VSS_198 C41
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_MA11
V_DDR_MCH_REF
DDR_A_MA14
M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR#0
M_CLK_DDR#1
DDR_CKE1_DIMMA
DDR_CS0_DIMMA#
MEM_SCLK
DDR_A_MA1
DDR_A_MA10
DDR_A_MA3
DDR_A_MA9 DDR_A_MA7
DDR_A_MA12
DDR_A_MA5
DDR_A_WE#
DDR_A_D0
DDR_A_D3
DDR_A_D23
DDR_A_D22
DDR_A_D32
DDR_A_D60
DDR_A_D52
DDR_A_D58
DDR_A_DQS1
DDR_A_DQS0
DDR_A_DQS2
DDR_A_DM3
DDR_A_DM1
DDR_A_DM2
DDR_A_DQS4
DDR_A_DQS6
DDR_A_DQS7
MEM_SDATA
DDR_CKE0_DIMMA
DDR_A_MA8
DDR_CS1_DIMMA#
DDR_A_MA11
DDR_A_MA2
DDR_A_MA0
DDR_A_MA4
DDR_A_MA6
DDR_A_CAS#
DDR_A_BS1
DDR_A_RAS#
DDR_A_D15
DDR_A_D18
DDR_A_D19
DDR_A_D28
DDR_A_D38
DDR_A_D44
DDR_A_D50
DDR_A_D53
DDR_A_D63
DDR_A_DM6
DDR_A_DM4
DDR_A_DM5
DDR_A_DM7
DDR_A_MA13
DDR_A_DQS5
DDR_A_BS0
DDR_A_BS2
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS3
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
DDR_A_MA0
DDR_A_MA4
DDR_A_BS1
DDR_A_MA6
DDR_A_MA2
M_ODT0
M_ODT1
M_ODT0
DDR_A_MA13
DDR_A_MA7
DDR_A_DM0
DDR_CS0_DIMMA#
DDR_A_RAS#
DDR_A_D46
DDR_A_D34
DDR_A_D37
DDR_A_D36
DDR_A_D26
M_ODT1
DDR_CS1_DIMMA#
DDR_CKE0_DIMMA
DDR_A_MA10
DDR_A_BS0
DDR_A_WE#
DDR_A_CAS#
DDR_A_BS2
DDR_A_MA12
DDR_A_MA8
DDR_A_MA9
DDR_A_MA5
DDR_A_MA1
DDR_A_MA3
PM_EXTTS#0
DDR_A_D7
DDR_A_D4
DDR_A_D6
DDR_A_D1
DDR_A_D5
DDR_A_D2
DDR_A_D14DDR_A_D11
DDR_A_D10
DDR_A_D21 DDR_A_D20
DDR_A_D16
DDR_A_D17
DDR_A_D29 DDR_A_D24DDR_A_D25
DDR_A_D31
DDR_A_D27
DDR_A_D30
DDR_A_D35
DDR_A_D33
DDR_A_D39
DDR_A_D45
DDR_A_D40
DDR_A_D41
DDR_A_D43 DDR_A_D47
DDR_A_D42
DDR_A_D49 DDR_A_D48
DDR_A_D55DDR_A_D54
DDR_A_D51
DDR_A_D56 DDR_A_D61
DDR_A_D57
DDR_A_D59DDR_A_D62
DDR_A_D8
DDR_A_D13
DDR_A_D9
DDR_A_D12
DDR_CKE1_DIMMA
DDR_A_MA14
+1.8V_SUS +1.8V_SUS
+0.9V_DDR_VTT
+3.3V_RUN
+0.9V_DDR_VTT
+1.8V_SUS
V_DDR_MCH_REF
DDR_A_D[0..63]11
DDR_A_DQS[0..7]11
DDR_A_MA[0..14]11
DDR_A_DM[0..7]11
M_CLK_DDR0 10
M_CLK_DDR1 10
M_CLK_DDR#0 10
M_CLK_DDR#1 10
DDR_CKE1_DIMMA 10
DDR_CS0_DIMMA# 10
DDR_CKE0_DIMMA10
DDR_CS1_DIMMA#10
DDR_A_DQS#[0..7]11
M_ODT0 10
M_ODT110
DDR_A_BS1 11
DDR_A_WE#11 DDR_A_RAS# 11
DDR_A_CAS#11
DDR_A_BS011
DDR_A_BS211
PM_EXTTS#0 10
MEM_SCLK17,23 MEM_SDATA17,23
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
DDRII-SODIMM SLOT1
16 58Monday, February 26, 2007
Compal Electronics, Inc.
Layout Note:
Place these resistor
closely DIMM0,all
trace length
Max=1.3"
RESERVE
DIMMA
Layout Note:
Place near JDIM1
Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9V_DDR_VTT
Layout Note:
Place these resistor
closely DIMM0,all
trace length<750 mil
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
ON TOP SIDE
Non-iAMT
RN12
56_0404_4P2R_5%~D
14 23
C137
0.1U_0402_16V4Z~D
1
2
C707
0.1U_0402_16V4Z~D
1
2
RN8
56_0404_4P2R_5%~D
14 23
C139
0.1U_0402_16V4Z~D
1
2
C115
2.2U_0603_6.3V6K~D
1
2
C119
0.1U_0402_16V4Z~D
1
2
C136
0.1U_0402_16V4Z~D
1
2
C118
0.1U_0402_16V4Z~D
1
2
RN10
56_0404_4P2R_5%~D
14 23
C131
0.1U_0402_16V4Z~D
1
2
C109
0.1U_0402_16V4Z~D
1
2
RN4
56_0404_4P2R_5%~D
1 4
2 3
RN9
56_0404_4P2R_5%~D
1 4
2 3
C113
0.1U_0402_16V4Z~D
1
2
RN1
56_0404_4P2R_5%~D
1 4
2 3
RN3
56_0404_4P2R_5%~D
1 4
2 3
C140
0.1U_0402_16V4Z~D
1
2
C132
2.2U_0603_6.3V6K~D
1
2
RN13
56_0404_4P2R_5%~D
14 23
C116
2.2U_0603_6.3V6K~D
1
2
C105
0.1U_0402_16V4Z~D
1
2
R127 10K_0402_5%~D
1 2
C108
0.1U_0402_16V4Z~D
1
2
RN11
56_0404_4P2R_5%~D
14 23 R122 10K_0402_5%~D
1 2
RN5
56_0404_4P2R_5%~D
14 23
C133
2.2U_0603_6.3V6K~D
1
2
C130
0.1U_0402_16V4Z~D
1
2
C104
0.1U_0402_16V4Z~D
1
2
C138
0.1U_0402_16V4Z~D
1
2
RN7
56_0404_4P2R_5%~D
1 4
2 3
C437
2.2U_0603_6.3V6K~D
1
2
RN2
56_0404_4P2R_5%~D
1 4
2 3
C110
0.1U_0402_16V4Z~D
1
2
C141
0.1U_0402_16V4Z~D
1
2
R223
56_0402_5%~D
12
C112
0.1U_0402_16V4Z~D
1
2
C107
0.1U_0402_16V4Z~D
1
2
C106
0.1U_0402_16V4Z~D
1
2
RN6
56_0404_4P2R_5%~D
14 23
JDIM2
TYCO_1470815-2~D
VREF
1
VSS
3
DQ0
5
DQ1
7
VSS
9
DQS0#
11
DQS0
13
VSS
15
DQ2
17
DQ3
19
VSS
21
DQ8
23
DQ9
25
VSS
27
DQS1#
29
DQS1
31
VSS
33
DQ10
35
DQ11
37
VSS
39
VSS
41
DQ16
43
DQ17
45
VSS
47
DQS2#
49
DQS2
51
VSS
53
DQ18
55
DQ19
57
VSS
59
DQ24
61
DQ25
63
VSS
65
DM3
67
NC
69
VSS
71
DQ26
73
DQ27
75
VSS
77
CKE0
79
VDD
81
NC
83
BA2
85
VDD
87
A12
89
A9
91
A8
93
VDD
95
A5
97
A3
99
A1
101
VDD
103
A10/AP
105
BA0
107
WE#
109
VDD
111
CAS#
113
NC/S1#
115
VDD
117
NC/ODT1
119
VSS
121
DQ32
123
DQ33
125
VSS
127
DQS4#
129
DQS4
131
VSS
133
DQ34
135
DQ35
137
VSS
139
DQ40
141
DQ41
143
VSS 2
DQ4 4
DQ5 6
VSS 8
DM0 10
VSS 12
DQ6 14
DQ7 16
VSS 18
DQ12 20
DQ13 22
VSS 24
DM1 26
VSS 28
CK0 30
CK0# 32
VSS 34
DQ14 36
DQ15 38
VSS 40
VSS 42
DQ20 44
DQ21 46
VSS 48
NC 50
DM2 52
VSS 54
DQ22 56
DQ23 58
VSS 60
DQ28 62
DQ29 64
VSS 66
DQS3# 68
DQS3 70
VSS 72
DQ30 74
DQ31 76
VSS 78
NC/CKE1 80
VDD 82
NC/A15 84
NC/A14 86
VDD 88
A11 90
A7 92
A6 94
VDD 96
A4 98
A2 100
A0 102
VDD 104
BA1 106
RAS# 108
S0# 110
VDD 112
ODT0 114
NC/A13 116
VDD 118
NC 120
VSS 122
DQ36 124
DQ37 126
VSS 128
DM4 130
VSS 132
DQ38 134
DQ39 136
VSS 138
DQ44 140
DQ45 142
VSS 144
VSS
145
DM5
147
VSS
149
DQ42
151
DQ43
153
VSS
155
DQ48
157
DQ49
159
VSS
161
NC,TEST
163
VSS
165
DQS6#
167
DQS6
169
VSS
171
DQ50
173
DQ51
175
VSS
177
DQ56
179
DQ57
181
VSS
183
DM7
185
VSS
187
DQ58
189
DQ59
191
VSS
193
SDA
195
SCL
197
VDDSPD
199
DQS5# 146
DQS5 148
VSS 150
DQ46 152
DQ47 154
VSS 156
DQ52 158
DQ53 160
VSS 162
CK1 164
CK1# 166
VSS 168
DM6 170
VSS 172
DQ54 174
DQ55 176
VSS 178
DQ60 180
DQ61 182
VSS 184
DQS7# 186
DQS7 188
VSS 190
DQ62 192
DQ63 194
VSS 196
SAO 198
SA1 200
GND 202
GND
201
C117
2.2U_0603_6.3V6K~D
1
2
C114
2.2U_0603_6.3V6K~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_B_DQS#5
DDR_B_D55
DDR_B_D7
DDR_B_D62
DDR_B_D52
DDR_B_BS1
DDR_CKE3_DIMMB
DDR_B_D23
M_ODT3
DDR_CS3_DIMMB#
DDR_B_BS0
DDR_B_D6
DDR_B_D59
DDR_B_RAS#
DDR_B_MA4
DDR_B_DM2
DDR_B_MA9
DDR_B_DQS6
DDR_B_DM5
DDR_B_MA1
DDR_B_DQS#1
DDR_B_DQS#3
DDR_CKE2_DIMMB
DDR_B_D16
DDR_B_D8
DDR_B_D44
DDR_B_D38
M_ODT2
DDR_B_D31
DDR_B_D10
DDR_B_DM1
DDR_B_D34
V_DDR_MCH_REF
DDR_B_D54
DDR_B_DM4
DDR_B_MA0
DDR_B_DM0
DDR_B_DQS#4
DDR_B_CAS#
DDR_B_MA3
DDR_B_BS2
DDR_B_DQS5
DDR_B_DQS4
DDR_B_DQS1
DDR_B_DQS3
DDR_B_WE#
DDR_B_D15
DDR_B_DQS0
DDR_B_D63
DDR_B_D50
DDR_B_MA7
DDR_B_DQS2
DDR_B_D0
DDR_B_DM6
DDR_B_MA2
DDR_B_MA10
DDR_B_DM3
DDR_B_DQS#2
DDR_B_MA13
DDR_B_D3
DDR_B_D2
DDR_B_MA5
DDR_B_D19
DDR_B_DQS#0
DDR_B_DQS#7
DDR_B_DQS#6
DDR_CS2_DIMMB#
DDR_B_D9
DDR_B_D51
DDR_B_D37
DDR_B_MA11
DDR_B_D14
DDR_B_DQS7
DDR_B_D47
DDR_B_D58
DDR_B_DM7
DDR_B_MA6
DDR_B_MA12
DDR_B_D11
DDR_B_MA8
PM_EXTTS#1
DDR_B_MA7
M_ODT2
DDR_B_RAS#
DDR_CS2_DIMMB#
DDR_B_MA0
DDR_B_MA6
DDR_B_BS1
DDR_B_MA11
DDR_B_MA4
DDR_B_MA13
DDR_B_MA2
DDR_B_D45
DDR_B_D39DDR_B_D35
DDR_B_D30
DDR_B_D27
DDR_B_D22
DDR_B_D18
DDR_B_D21
DDR_B_D4DDR_B_D1 DDR_B_D5
DDR_CKE2_DIMMB
DDR_B_BS2
DDR_B_MA12
DDR_B_MA9
DDR_B_MA8
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1
DDR_B_MA10
DDR_B_BS0
DDR_B_WE#
DDR_B_CAS#
M_ODT3
DDR_CS3_DIMMB#
DDR_B_D13
DDR_B_D12
DDR_B_D20
DDR_B_D17
DDR_B_D24 DDR_B_D28
DDR_B_D25
DDR_B_D26
DDR_B_D29
DDR_B_D33DDR_B_D32
DDR_B_D36
DDR_B_D40
DDR_B_D41
DDR_B_D43DDR_B_D46
DDR_B_D42
DDR_B_D53
DDR_B_D61
DDR_B_D56
DDR_B_D60 DDR_B_D57
MEM_SCLK
MEM_SDATA
M_CLK_DDR#3
M_CLK_DDR3
M_CLK_DDR2
M_CLK_DDR#2
DDR_B_MA14
DDR_CKE3_DIMMB
DDR_B_MA14
DDR_B_D49 DDR_B_D48
+0.9V_DDR_VTT
+0.9V_DDR_VTT
+1.8V_SUS
+3.3V_RUN
+3.3V_RUN
+1.8V_SUS+1.8V_SUS V_DDR_MCH_REF
DDR_B_D[0..63]11
DDR_B_DQS[0..7]11
DDR_B_MA[0..14]11
DDR_B_DM[0..7]11
DDR_B_DQS#[0..7]11
DDR_B_CAS#11
M_ODT310
DDR_CKE3_DIMMB 10
DDR_B_WE#11
DDR_CKE2_DIMMB10
DDR_B_BS011 DDR_B_RAS# 11
DDR_B_BS1 11
DDR_B_BS211
M_ODT2 10
DDR_CS3_DIMMB#10
DDR_CS2_DIMMB# 10
MEM_SCLK16,23 MEM_SDATA16,23
PM_EXTTS#1 10
M_CLK_DDR3 10
M_CLK_DDR#3 10
M_CLK_DDR2 10
M_CLK_DDR#2 10
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
DDRII-SODIMM SLOT2
17 58Monday, February 26, 2007
Compal Electronics, Inc.
Layout Note:
Place these resistor
closely DIMM0,all
trace length<750 mil
Layout Note:
Place these resistor
closely DIMM0,all
trace length
Max=1.3"
Layout Note:
Place near JDIM2
Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9V_DDR_VTT
DELL CONFIDENTIAL/PROPRIETARY
DIMMB
STANDARD
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
ON BOTTOM SIDE
Non-iAMT
Non-iAMT
RN18
56_0404_4P2R_5%~D
1 4
2 3
C429
2.2U_0603_6.3V6K~D
1
2
C451
0.1U_0402_16V4Z~D
1
2
C431
0.1U_0402_16V4Z~D
1
2
RN14
56_0404_4P2R_5%~D
14 23
C406
0.1U_0402_16V4Z~D
1
2
C411
2.2U_0603_6.3V6K~D
1
2
C433
0.1U_0402_16V4Z~D
1
2
R243
10K_0402_5%~D
12
C407
0.1U_0402_16V4Z~D
1
2
RN16
56_0404_4P2R_5%~D
14 23
C438
2.2U_0603_6.3V6K~D
1
2
JDIM1
TYCO_1565917-4~D
VREF
1
VSS
3
DQ0
5
DQ1
7
VSS
9
DQS0#
11
DQS0
13
VSS
15
DQ2
17
DQ3
19
VSS
21
DQ8
23
DQ9
25
VSS
27
DQS1#
29
DQS1
31
VSS
33
DQ10
35
DQ11
37
VSS
39
VSS
41
DQ16
43
DQ17
45
VSS
47
DQS2#
49
DQS2
51
VSS
53
DQ18
55
DQ19
57
VSS
59
DQ24
61
DQ25
63
VSS
65
DM3
67
NC
69
VSS
71
DQ26
73
DQ27
75
VSS
77
CKE0
79
VDD
81
NC
83
BA2
85
VDD
87
A12
89
A9
91
A8
93
VDD
95
A5
97
A3
99
A1
101
VDD
103
A10/AP
105
BA0
107
WE#
109
VDD
111
CAS#
113
NC/S1#
115
VDD
117
NC/ODT1
119
VSS
121
DQ32
123
DQ33
125
VSS
127
DQS4#
129
DQS4
131
VSS
133
DQ34
135
DQ35
137
VSS
139
DQ40
141
DQ41
143
VSS 2
DQ4 4
DQ5 6
VSS 8
DM0 10
VSS 12
DQ6 14
DQ7 16
VSS 18
DQ12 20
DQ13 22
VSS 24
DM1 26
VSS 28
CK0 30
CK0# 32
VSS 34
DQ14 36
DQ15 38
VSS 40
VSS 42
DQ20 44
DQ21 46
VSS 48
NC 50
DM2 52
VSS 54
DQ22 56
DQ23 58
VSS 60
DQ28 62
DQ29 64
VSS 66
DQS3# 68
DQS3 70
VSS 72
DQ30 74
DQ31 76
VSS 78
NC/CKE1 80
VDD 82
NC/A15 84
NC/A14 86
VDD 88
A11 90
A7 92
A6 94
VDD 96
A4 98
A2 100
A0 102
VDD 104
BA1 106
RAS# 108
S0# 110
VDD 112
ODT0 114
NC/A13 116
VDD 118
NC 120
VSS 122
DQ36 124
DQ37 126
VSS 128
DM4 130
VSS 132
DQ38 134
DQ39 136
VSS 138
DQ44 140
DQ45 142
VSS 144
VSS
145
DM5
147
VSS
149
DQ42
151
DQ43
153
VSS
155
DQ48
157
DQ49
159
VSS
161
NC,TEST
163
VSS
165
DQS6#
167
DQS6
169
VSS
171
DQ50
173
DQ51
175
VSS
177
DQ56
179
DQ57
181
VSS
183
DM7
185
VSS
187
DQ58
189
DQ59
191
VSS
193
SDA
195
SCL
197
VDDSPD
199
DQS5# 146
DQS5 148
VSS 150
DQ46 152
DQ47 154
VSS 156
DQ52 158
DQ53 160
VSS 162
CK1 164
CK1# 166
VSS 168
DM6 170
VSS 172
DQ54 174
DQ55 176
VSS 178
DQ60 180
DQ61 182
VSS 184
DQS7# 186
DQS7 188
VSS 190
DQ62 192
DQ63 194
VSS 196
SAO 198
SA1 200
GND 202
GND
201
C434
0.1U_0402_16V4Z~D
1
2
RN17
56_0404_4P2R_5%~D
1 4
2 3
RN19
56_0404_4P2R_5%~D
14 23
C447
2.2U_0603_6.3V6K~D
1
2
C405
0.1U_0402_16V4Z~D
1
2
RN26
56_0404_4P2R_5%~D
1 4
2 3
RN20
56_0404_4P2R_5%~D
14 23
RN25
56_0404_4P2R_5%~D
1 4
2 3
C410
0.1U_0402_16V4Z~D
1
2
C408
0.1U_0402_16V4Z~D
1
2
RN15
56_0404_4P2R_5%~D
14 23
C454
0.1U_0402_16V4Z~D
1
2
C455
0.1U_0402_16V4Z~D
1
2
C412
2.2U_0603_6.3V6K~D
1
2
C450
0.1U_0402_16V4Z~D
1
2
C436
0.1U_0402_16V4Z~D
1
2
R312
56_0402_5%~D
12
C413
0.1U_0402_16V4Z~D
1
2
RN23
56_0404_4P2R_5%~D
1 4
2 3
C409
0.1U_0402_16V4Z~D
1
2
C452
0.1U_0402_16V4Z~D
1
2
RN22
56_0404_4P2R_5%~D
14 23
RN21
56_0404_4P2R_5%~D
14 23
RN24
56_0404_4P2R_5%~D
1 4
2 3
C440
2.2U_0603_6.3V6K~D
1
2
C453
0.1U_0402_16V4Z~D
1
2
C456
0.1U_0402_16V4Z~D
1
2
C414
0.1U_0402_16V4Z~D
1
2
C439
2.2U_0603_6.3V6K~D
1
2
R241
10K_0402_5%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FAN1_TACH_FB
+FAN1_VOUT
+FAN1_VOUT
ATF_INT#
MDC_RST_DIS#
SIO_GFX_PWR
5V_CAL_SIO#
VCP2
VCP2
+3VSUS_THRM
REM_DIODE1_N
THERMATRIP3#
AUDIO_AVDD_ON
REM_DIODE3_PREM_DIODE1_P
5V_CAL_SIO#
THERMATRIP2#
SIO_GFX_PWR
THERMATRIP2#
REM_DIODE4_P
THERMATRIP1#
+3V_LDOIN
REM_DIODE3_N
REM_DIODE4_N
MDC_RST_DIS#
LDO_SET
THERMATRIP1#
LDO_SET
THERMATRIP3#
+3.3V_RUN
+3.3V_SUS
+3.3V_SUS
+1.05V_VCCP
+1.05V_VCCP
+2.5V_RUN
+5V_RUN
+RTC_CELL
+3.3V_RUN
+3.3V_SUS
+RTC_CELL
+3.3V_SUS +3.3V_SUS
+3.3V_RUN
+3.3V_ALW
+3.3V_SUS
+2.5V_RUN
+3.3V_SUS
+3.3V_SUS
+5V_SUS
+3.3V_SUS
FAN1_TACH 39
ATF_INT# 38
THERMTRIP_SIO
THERMTRIP_MCH#10
H_THERMTRIP#7
THERM_STP# 45
2.5V_RUN_PWRGD 42
H_THERMDA7
H_THERMDC7
SUSPWROK42 POWER_SW# 39,40
ICH_PWRGD#42 ACAV_IN 39,49,50
THRM_SMBDAT39,49 THRM_SMBCLK39,49
PWR_MON 48
MDC_RST_DIS#33
AUDIO_AVDD_ON27
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
FAN & Thermal Sensor
18 58Wednesday, March 07, 2007
Compal Electronics, Inc.
FAN1 Control and Tachometer
Place under CPU
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Place C634 close to the
Guardian pins as possible
Place C633 close to the Q40 as possible
SMBUS ADDRESS : 2F
Place cap close to the
Guardian pins as possible. REM_DIODE3_N, REM_DIODE3_P routing together.
Trace width / Spacing = 10 / 10 mil
Q41 Place near the
bottom SODIMM
Diode circuit at DP4/DN4 is
used for skin temp sensor
(placed optimally between
CPU, MCH and MEM).
Voltage margining
circuit for LDO output.
For Vmargin, stuff
Ra=31.6K and Rb=30K.
Rb=1K for production
Ra
Rb
VSET = Tp-70
21
VSET=
R436+R438
R438 x 3.3V
=> Tp = 88.2 C
=0.865V
Place C650
close to Q41
Place C636 close to the Guardian pins as possible
This thermistor circuit is located near
Top side DDR connector.
JFAN1
MOLEX_53398-0371~D
1
1
2
2
3
3
E
B
C
Q19
MMST3904-7-F_SOT323-3~D
2
3 1
C650
2200P_0402_50V7K~D
@
1
2
C641
0.1U_0402_16V4Z~D
@
1
2
R424
10K_0402_5%~D
12
R438
118K_0402_1%~D
12
R773
10K_0402_5%~D
12
E
B
C
Q38
MMST3904-7-F_SOT323-3~D
2
3 1
C418
2200P_0402_50V7K~D
1
2
R485
31.6K_0402_1%~D
@
12
C632
0.1U_0402_16V4Z~D
1
2
C645
10U_0805_10V4Z~D
1
2
C648
0.1U_0402_16V4Z~D
1
2
C638
0.1U_0402_16V4Z~D
1
2
E
B
C
Q41
MMST3904-7-F_SOT323-3~D
2
3 1
C644
0.1U_0402_16V4Z~D
1
2
R434
7.5K_0402_5%~D
12
C628
0.1U_0402_16V4Z~D
1
2
R439
0_1210_5%~D
12
R772
10K_0603_1%_TSM1A103F34D3RZ~D
12
R433
8.2K_0402_5%~D
12
C637
0.1U_0402_16V4Z~D
1
2R430
10K_0402_5%~D
12
C639
0.1U_0402_16V4Z~D
1
2
R431
10K_0402_5%~D
@ 12
D19
RB751S40T1_SOD523-2~D
@
2 1
R437
1K_0402_5%~D
1 2
R428
49.9_0603_1%~D
1 2
C750
2200P_0402_50V7K~D
1
2
R96
10K_0402_5%~D
12
R425
2.2K_0402_5%~D
1 2
R194
10K_0402_5%~D
@
1 2
U31
EMC4001_QFN48~D
DP3 45
DN3 44
VCP1 43
ACAVAIL_CLR 4
VDD_5V 5
FAN_OUT
7
SMDATA
11
SMBCLK
12
VSS
34
GPIO1
10
GPIO2
13
3V_SUS
35
3V_PWROK#
16
THERMTRIP1#
17
THERMTRIP2#
18
THERMTRIP3#
19
ATF_INT# 20
RTC_PWR3V
21
GPIO3
14
GPIO4
15
VSUS_PWRGD
23
SYS_SHDN# 24
LDO_SHDN#/ADDR 27
LDO_SET 28
LDO_OUT 32
LDO_IN 30
LDO_OUT 31
LDO_IN 29
XEN
26
THERMTRIP_SIO 25
LDO_POK 33
GPIO6/FAN_DAC2
36
FAN_DAC1
39
DN2
40 DP2
41
DN1
37 DP1
38
POWER_SW# 3
VSET
42
VCP2 46
VDD_5V 6
VDD_3V 9
DN4 47
DP4 48
DN5 1
DP5 2
GPIO5
22
FAN_OUT
8
PAD_GND
49
C643
1U_0603_10V4Z~D
1
2
C633
2200P_0402_50V7K~D
@
1
2
C646
0.1U_0402_16V4Z~D
1
2
C647
10U_0805_10V4Z~D
1
2
R414
0_0402_5%~D
12
C636
470P_0402_50V7K~D
1
2
R426
8.2K_0402_5%~D
12
E
B
C
Q40
MMST3904-7-F_SOT323-3~D
2
3 1
C203
0.1U_0402_16V4Z~D
@
1
2
R441
1K_0402_1%~D
12
R423
8.2K_0402_5%~D
12
C634
2200P_0402_50V7K~D
1
2
C100
2200P_0402_50V7K~D
1
2
C630
22U_0805_6.3VAM~D
1
2
E
B
C
Q39
MMST3904-7-F_SOT323-3~D
2
3 1
C904
2200P_0402_50V7K~D
@
1
2
R771
2.21K_0603_1%~D
12
R427
2.2K_0402_5%~D
1 2
R436
332K_0402_1%~D
12
C640
10U_0805_10V4Z~D
@
1
2
C649
2200P_0402_50V7K~D
1
2
R196
10K_0402_5%~D
@
1 2
R429 1K_0402_5%~D
1 2
G
D
S
Q102
2N7002W-7-F_SOT323-3~D
2
13
R432 1K_0402_5%~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LCD_TST
LCD_A1-
LCD_A0+
LCD_A2-
LCD_A0-
LCD_A2+
LCD_A1+
LCD_ACLK+
LCD_ACLK-
LCD_BCLK+
LCD_B0+
LCD_B0-
LCD_B2-
LCD_B1-
LCD_B2+
LCD_BCLK-
LCD_B1+
LAMP_STAT#
+3.3V_RUN
+LCDVDD
+3.3V_RUN
+INV_PWR_SRC
+PWR_SRC
+INV_PWR_SRC
+5V_ALW
+LCDVDD
+LCDVDD +15V_ALW
+15V_ALW
+3.3V_RUN
RUN_ON37,39,41,42
LCD_TST 38
LCD_DDCCLK 12
LCD_DDCDATA 12
LCD_A0- 12
LCD_A0+ 12
LCD_A1- 12
LCD_A1+ 12
LCD_A2- 12
LCD_A2+ 12
LCD_ACLK- 12
LCD_ACLK+ 12
LCD_B0- 12
LCD_B0+ 12
LCD_B1- 12
LCD_B1+ 12
LCD_B2- 12
LCD_B2+ 12
LCD_BCLK- 12
LCD_BCLK+ 12
LCD_SMBDAT 39
LCD_SMBCLK 39
BIA_PWM 12
ENVDD12
LCD_VCC_TEST_EN39
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
Internal LVDS
19 58Wednesday, February 28, 2007
Compal Electronics, Inc.
FDS4435: P CHANNAL
40mil
40mil
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Populate R155 for platform
without DPST support. No
Stuff for Discrete DSPT
support due to back up
plan.
Populate R156 for DPST,
implementation only.
R808 0_0603_5%~D
1 2
R26
470_0402_5%~D
12
R810 0_0603_5%~D 1 2
C42
0.1U_0402_16V4Z~D
1
2
R25
100K_0402_5%~D
@
12
C176
0.1U_0402_16V4Z~D
1
2
C463
2200P_0402_50V7K~D
1
2
S
G
D
Q11
SI3456BDV-T1-E3_TSOP6~D
3
6
2
4 5
1
D24
BAT54CW_SOT323~D
3
2
1
T28 PAD~D
JLVDS
IPEX_20330-044E-11F~D
TXUCLKUT- 44
GND1 42
TXUOUT2+ 40
TXUOUT1- 38
GND3 36
TXUOUT0+ 34
TXLCLKOUT- 32
GND5 30
TXLOUT2+ 28
TXLOUT1- 26
GND7 24
TXLOUT0+ 22
PANEL_I2C_DAT 19
GND9 18
GND10 16
LCDVDD2 14
LCDPWR_SRC 12
LCDPWR_SRC 10
+5V_ALWF 3
PBAT_SMBCLK 6
GND13 4
FPBACK 8
TXUCLKUT+ 43
TXUOUT2- 41
GND2 39
TXUOUT1+ 37
TXUOUT0- 35
GND4 33
TXLCLKOUT+ 31
TXLOUT2- 29
GND6 27
TXLOUT1+ 25
TXLOUT0- 23
GND8 21
PANEL_I2C_CLK 20
VEDID 17
LCDVDD1 15
PNL_SLFTST 13
LCDPWR_SRC 11
GND11 9
LAMP_START 2
PBAT_SMBDAT 5
GND12 7
GND14 1
MGND1
45
MGND2
46
MGND3
47
MGND4
48
MGND5
49
MGND6
50
MGND7
51
NC
56
NC
57
MGND10
54
MGND11
55
MGND8
52
MGND9
53
R811 0_0603_5%~D
1 2
Q24
FDS4435BZ_SO8~D
4
7
8
6
5
1
2
3
Q7
DDTC124EUA-7-F_SOT323-3~D
I
2
O1
G
3
R153
100K_0402_5%~D
1 2
R23
100K_0402_5%~D
12
G
D
S
Q25
2N7002W-7-F_SOT323-3~D
2
1 3
C180
0.1U_0603_50V4Z~D
1
2
R24
100K_0402_5%~D
12
C427
0.1U_0603_50V4Z~D
1
2
R155
10K_0402_5%~D
@
12
C173
1000P_0402_50V7K~D
1
2
R156 0_0402_5%~D 1 2
R154
200K_0402_5%~D
12
C44
0.1U_0402_16V4Z~D
1
2
R809 0_0603_5%~D
1 2
G
D
S
Q8
2N7002W-7-F_SOT323-3~D
2
13
C45
0.1U_0402_16V4Z~D
1
2
G
D
S
Q9
2N7002W-7-F_SOT323-3~D
2
13
C174
0.1U_0603_50V4Z~D
1
2
C30
0.1U_0603_50V4Z~D
1
2
R527
0_0402_5%~D
@1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DAT_DDC2
CRT_GRN
CRT_BLU
CLK_DDC2
M_ID2#
JVGA_HS
BLUE
RED
GREEN
JVGA_VS
CRT_RED
+5V_RUN
+3.3V_RUN
CRT_VCC
+5V_RUN_SYNC
+5V_RUN
+5V_RUN_SYNC
CRT_RED12,36
CRT_VSYNC12
CLK_DDC212,36
CRT_GRN12,36
CRT_BLU12,36
CRT_HSYNC12
DAT_DDC212,36
VSYNC_R 36
HSYNC_R 36
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
CRT
20 58Monday, February 26, 2007
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
K1
Evaluate Package
A2
A1 K2
DA204U
R2
2.2K_0402_5%~D
1 2
C149
10P_0402_50V8J~D
@
1
2
R3
1K_0402_5%~D
@
12
R138
10_0402_5%~D
1 2
F3
0.12A_48V_NANOSMDC012F~D
@
12
R144
1K_0402_5%~D
1 2
U14
SN74AHCT1G125GW_SC70-5~D
A
2Y4
P5
G
3
OE# 1
C161
22P_0402_50V8J~D
@
1
2
C712
10P_0402_50V8J~D
@
1
2
R143
150_0402_1%~D
12
D8
SDM10U45-7_SOD523-2~D
21
C148
10P_0402_50V8J~D
@
1
2
L10
BLM18BB750SN1D_0603~D
1 2
JCRT
SUYIN_070915FR015S201CU~D
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
16
17
C162
22P_0402_50V8J~D
@
1
2
C151
0.01U_0402_16V7K~D
1
2
L1
BLM18AG121SN1D_0603~D
1 2
T5 PAD~D
C160
0.1U_0402_16V4Z~D
1
2
R146
10_0402_5%~D
1 2
L2
BLM18AG121SN1D_0603~D
1 2
D11
DA204U_SOT323~D
@
2
31
C719
10P_0402_50V8J~D
@
1
2
R792
0_1206_5%~D
12
R5
1K_0402_5%~D
@
12
U15
SN74AHCT1G125GW_SC70-5~D
A
2Y4
P5
G
3
OE# 1
C4
10P_0402_50V8J~D
1
2
R60
30_0402_1%~D
1 2
C5
10P_0402_50V8J~D
1
2
R59
30_0402_1%~D
1 2
L11
BLM18BB750SN1D_0603~D
1 2
D6
SDM10U45-7_SOD523-2~D
2 1
R142
150_0402_1%~D
12
R137
2.2K_0402_5%~D
1 2
L9
BLM18BB750SN1D_0603~D
1 2
D9
DA204U_SOT323~D
@
2
31
C147
10P_0402_50V8J~D
@
1
2
C165
22P_0402_50V8J~D
@
1
2
R141
150_0402_1%~D
12
D10
DA204U_SOT323~D
@
2
31
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_ICH_TERM
PCI_PIRQD#
PCI_DEVSEL#
PCI_TRDY#
PCI_FRAME#
PCI_STOP#
PCI_PLOCK#
PCI_IRDY#
PCI_PERR#
PCI_SERR#
PCI_PIRQA#
PCI_PIRQC#
PCI_PIRQB#
ICH_GPIO2_PIRQE#
PCI_REQ1#
PCI_RST#
PLTRST1#
PLTRST2#
PLTRST3#
PCI_PCIRST#
CLK_PCI_ICH
PCI_PLTRST#
ICH_SPI_CS1#
PCI_AD12
PCI_AD27
PCI_AD19
PCI_TRDY#
PCI_PLOCK#
PCI_IRDY#
PCI_GNT0#
PCI_AD22
PCI_C_BE2#
PCI_C_BE0#
PCI_GNT1#
PCI_AD17
PCI_AD14
PCI_AD11
PCI_DEVSEL#
CLK_PCI_ICH
PCI_AD31
PCI_AD5
PCI_STOP#
PCI_PIRQA#
PCI_AD29
PCI_PCIRST#
PCI_AD23
ICH_GPIO2_PIRQE#
PCI_FRAME#
PCI_REQ1#
PCI_AD25
PCI_AD7
PCI_AD4
ICH_PME#
PCI_AD18
PCI_AD0
PCI_PIRQC#
PCI_AD16
PCI_AD1 PCI_REQ0#
PCI_PIRQB#
PCI_AD21
PCI_AD10
PCI_AD8
PCI_AD3
PCI_AD2
PCI_PAR
PCI_AD6
PCI_SERR#
PCI_PERR#
PCI_AD28
PCI_AD26
PCI_AD24
PCI_AD13
PCI_AD9
PCI_PLTRST#
PCI_AD30
PCI_C_BE3#
PCI_C_BE1#
PCI_PIRQD#
PCI_AD20
PCI_AD15
SB_LOM_PCIE_RST#
SB_WWAN_PCIE_RST#
PCI_GNT3#
SB_LOM_PCIE_RST#
SB_WWAN_PCIE_RST#
PCI_GNT3#
SB_NB_PCIE_RST#
PCI_GNT0#
SB_WLAN_PCIE_RST#
SB_WLAN_PCIE_RST#
PCI_REQ0#
SB_NB_PCIE_RST#
+3.3V_RUN
+3.3V_SUS
+3.3V_RUN
+3.3V_SUS
+3.3V_SUS
+3.3V_SUS
PCI_C_BE1# 30,35
PCI_STOP# 30,35
PCI_AD[0..31]30,35
ICH_PME# 38
CLK_PCI_ICH 6
PCI_RST# 30,31,35
PLTRST1# 10,51
PLTRST2# 38,39
PLTRST3# 28,34
PCI_PIRQA#35
PCI_PERR# 30,35
PCI_DEVSEL# 30,35
PCI_GNT1# 30
PCI_REQ1# 30
PCI_IRDY# 30,35,36
PCI_C_BE2# 30,35
PCI_FRAME# 30,35,36
PCI_SERR# 30,35
PCI_PAR 30,35
PCI_GNT0# 35,36
PCI_REQ0# 36
PCI_C_BE0# 30,35
PCI_TRDY# 30,35
PCI_PLOCK# 35
PCI_C_BE3# 30,35
PCI_PIRQD#30
ICH_SPI_CS1#23
SB_WWAN_PCIE_RST# 34
SB_LOM_PCIE_RST# 28
SB_NB_PCIE_RST# 10
SB_WLAN_PCIE_RST# 34
PCIE_MCARD2_DET# 34
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
ICH8(1/4)
21 58Monday, February 26, 2007
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PCI
PCI_GNT0# SPI_CS1#
1
0
1
Boot BIOS Strap
LPC
SPI
Place closely pin U19.A9
*0
1
1
Boot BIOS Location
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
BIOS should not enable the internal
GPIO pull up resistor
Low = A16 swap override enabled.
High = Default.
PCI_GNT3#
A16 away override strap.
U33D
74VHC08MTCX_NL_TSSOP14~D
IN1
13
IN2
12 OUT 11
P14
G
7
R463
1K_0402_5%~D@
12
C651
0.1U_0402_16V4Z~D
R461 20K_0402_5%~D
1 2
R452 8.2K_0402_5%~D
1 2
U33C
74VHC08MTCX_NL_TSSOP14~D
IN1
10
IN2
9OUT 8
P14
G
7
R464
10_0402_5%~D@
1 2
R477
1K_0402_5%~D
@
12
T1 PAD~D
R449 8.2K_0402_5%~D
1 2
Interrupt I/F
PCI
U32B
ICH8M_BGA676~D
AD0
D20
AD1
E19
AD2
D19
AD3
A20
AD4
D17
AD5
A21
AD6
A19
AD7
C19
AD8
A18
AD9
B16
AD10
A12
AD11
E16
AD12
A14
AD13
G16
AD14
A15
AD15
B6
AD16
C11
AD17
A9
AD18
D11
AD19
B12
AD20
C12
AD21
D10
AD22
C7
AD23
F13
AD24
E11
AD25
E13
AD26
E12
AD27
D8
AD28
A6
AD29
E8
AD30
D6
AD31
A3
PIRQA#
F9
PIRQB#
B5
PIRQC#
C5
PIRQD#
A10
REQ0# A4
GNT0# D7
REQ1#/GPIO50 E18
GNT1#/GPIO51 C18
REQ2#/GPIO52 B19
GNT2#/GPIO53 F18
REQ3#/GPIO54 A11
GNT3#/GPIO55 C10
C/BE0# C17
C/BE1# E15
C/BE2# F16
C/BE3# E17
IRDY# C8
PAR D9
PCIRST# G6
DEVSEL# D16
PERR# A7
PLOCK# B7
SERR# F10
STOP# C16
TRDY# C9
FRAME# A17
PLTRST# AG24
PME# G7
PCICLK B10
PIRQE#/GPIO2 F8
PIRQF#/GPIO3 G11
PIRQG#/GPIO4 F12
PIRQH#/GPIO5 B3
U33B
74VHC08MTCX_NL_TSSOP14~D
IN1
4
IN2
5OUT 6
P14
G
7
C652
8.2P_0402_50V8J~D@
1
2
R458 8.2K_0402_5%~D
1 2
R460 20K_0402_5%~D
1 2
T2 PAD~D
R448 8.2K_0402_5%~D
1 2
R450 8.2K_0402_5%~D
1 2
R443 8.2K_0402_5%~D
1 2
R454 8.2K_0402_5%~D
1 2
R442 8.2K_0402_5%~D
1 2
R453 8.2K_0402_5%~D
1 2
R445 8.2K_0402_5%~D
1 2
R451 8.2K_0402_5%~D
1 2
R459 8.2K_0402_5%~D
1 2
R462
1K_0402_5%~D
12
R444 8.2K_0402_5%~D
1 2
R447 8.2K_0402_5%~D
1 2
R601 20K_0402_5%~D
1 2
R631 20K_0402_5%~D
1 2
R446 8.2K_0402_5%~D
1 2
U33A
74VHC08MTCX_NL_TSSOP14~D
IN1
1
IN2
2OUT 3
P14
G
7
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_FERR#
ICH_AZ_SYNC
ICH_AZ_RST#
ICH_AZ_SDOUT
ICH_AZ_BITCLK
IDE_IRQ
SIO_A20GATE
SIO_RCIN#
SATA_ACT#_R
ICH_AZ_MDC_SDIN1
ICH_AZ_BITCLK
ICH_INTVRMEN
ICH_RTCRST#
SATA_TX0-_N0
ICH_AZ_RST#
ICH_RTCX2
ICH_RTCX1
ICH_AZ_SYNC
ICH_AZ_CODEC_SDIN0
SATA_TX0+_P0
ICH_AZ_SDOUT
H_DPRSTP#
INTRUDER#
LAN100_SLP
IDE_DD8
IDE_IRQ
IDE_DD10
IDE_DD5
IDE_DDACK#
IDE_DD1
H_INTR
IDE_DD0
IDE_DCS1#
H_INIT#
H_IGNNE#
LPC_LFRAME#
LPC_LAD0
IDE_DIORDY
IDE_DA2
H_A20M#
LPC_LAD2
IDE_DD2
H_SMI#
IDE_DIOW#
IDE_DD9
IDE_DD6
H_DPSLP#
SIO_A20GATE
LPC_LAD1
IDE_DD3
SIO_RCIN#
IDE_DIOR#
IDE_DA1
IDE_DD11
H_STPCLK#
LPC_LAD3
IDE_DDREQ
IDE_DD14
IDE_DD13
IDE_DA0
H_NMI
H_PWRGOOD
IDE_DD12
IDE_DD7
IDE_DD4
H_FERR#
IDE_DCS3#
IDE_DD15
ICH_TP8
LPC_LDRQ1#
LPC_LDRQ0#
PSATA_IRX_DTX_P0_C
PSATA_IRX_DTX_N0_C
ICH_INTVRMEN LAN100_SLP
ICH_AZ_SDOUT
THRMTRIP_ICH#
CLK_PCIE_SATA
CLK_PCIE_SATA#
+RTC_CELL
+3.3V_RUN
+1.05V_VCCP
+3.3V_RUN
+1.05V_VCCP
+1.5V_RUN_PCIE_ICH
+RTC_CELL +RTC_CELL
+3.3V_RUN
+1.05V_VCCP
IDE_DDACK# 25
IDE_DIOR# 25
IDE_DIOW# 25
ICH_AZ_MDC_SDIN133
CLK_PCIE_SATA6
H_INTR 7
H_INIT# 7
H_DPSLP# 8
H_SMI# 7
H_IGNNE# 7
H_A20M# 7
H_NMI 7
H_STPCLK# 7
IDE_IRQ 25
SIO_RCIN# 39
IDE_DIORDY 25
IDE_DCS1# 25
ICH_AZ_CODEC_SDIN026
IDE_DCS3# 25
CLK_PCIE_SATA#6
ICH_AZ_CODEC_RST#26
ICH_AZ_CODEC_SYNC26
ICH_AZ_CODEC_SDOUT26
ICH_AZ_MDC_SYNC33
ICH_AZ_MDC_RST#33
ICH_AZ_MDC_SDOUT33
SIO_A20GATE 39
H_PWRGOOD 8
IDE_DA0 25
IDE_DA1 25
IDE_DA2 25
LPC_LAD0 28,38,39
LPC_LAD1 28,38,39
LPC_LAD2 28,38,39
LPC_LAD3 28,38,39
ICH_AZ_MDC_BITCLK33
ICH_AZ_CODEC_BITCLK26
LPC_LFRAME# 28,38,39
H_FERR# 7
H_DPRSTP# 8,10,48
IDE_DD[0..15] 25
IDE_DDREQ 25
SATA_ACT#_R43
LPC_LDRQ0# 38
LPC_LDRQ1# 38
PSATA_IRX_DTX_N0_C25
PSATA_ITX_DRX_N025
PSATA_ITX_DRX_P025
PSATA_IRX_DTX_P0_C25
ICH_RSVD 23
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
ICH8(2/4)
22 58Monday, February 26, 2007
Compal Electronics, Inc.
Package
9.6X4.06 mm
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Close to U19
Within 500 mils
XOR Chain Entrance Strap
DescriptionICH RSVD HDA SDOUT
RSVD
Enter XOR Chain
Normal Operation (Default)
Set PCIE port config bit 1
00
0
0
1
1
11
ICH8M Internal VR Enable Strap
(Internal VR for VccSus1.05, VccSus1.5, VccCL1.5)
Low = Internal VR Disabled
High = Internal VR Enabled(Default)
ICH_INTVRMEN ICH_LAN100_SLP Low = Internal VR Disabled
High = Internal VR Enabled(Default)
ICH8M LAN100 SLP Strap
(Internal VR for VccLAN1.05 and VccCL1.05)
C660
27P_0402_50V8J~D
1
2
R481 33_0402_5%~D
1 2
R484 33_0402_5%~D
1 2
R466
10K_0402_5%~D
12
R480
24.9_0402_1%~D
1 2
R386
1K_0402_5%~D
@
12
R487 33_0402_5%~D
1 2
R495 33_0402_5%~D
1 2
R468
56_0402_5%~D
12
R482
56_0402_5%~D
12
R478
0_0402_1%
@
12
R483 33_0402_5%~D
1 2
Y4
32.768K_12.5P_1TJS125DJ4A420P~D
1 4
2 3
R490 8.2K_0402_5%~D
1 2
R496
33_0402_5%~D
1 2
T12PAD~D
C654
15P_0402_50V8J~D
12
R493 33_0402_5%~D
1 2
C470
0.1U_0402_16V4Z~D
1
2
C659 3900P_0402_50V7K~D
12
C656
27P_0402_50V8J~D
12
R469
0_0402_5%~D
1 2
R465
10K_0402_5%~D
12
R491 24.9_0402_1%~D
1 2
R476
0_0402_5%~D
@
1 2
R474
56_0402_1%~D
@
12
R385
1K_0402_5%~D
@
12
C655
1U_0603_10V4Z~D
1 2
C653
15P_0402_50V8J~D
12
CMOS_CLR @SHORT PADS~D
1
122
R473
56_0402_1%~D
@
12
R467
10M_0402_5%~D
12
R470 20K_0402_5%~D
1 2
RTC
LPCCPU
LAN / GLAN
IHDA
SATA
IDE
U32A
ICH8M_BGA676~D
RTCX1
AG25
RTCX2
AF24
RTCRST#
AF23
INTRUDER#
AD22
INTVRMEN
AF25
LAN100_SLP
AD21
GLAN_CLK
B24
LAN_RSTSYNC
D22
LAN_RXD0
C21
LAN_RXD1
B21
LAN_RXD2
C22
LAN_TXD_0
D21
LAN_TXD_1
E20
LAN_TXD_2
C20
GLAN_DOCK#/GPIO13
AH21
GLAN_COMPI
D25
GLAN_COMPO
C25
HDA_BIT_CLK
AJ16
HDA_SYNC
AJ15
HDA_RST#
AE14
HDA_SDIN0
AJ17
HDA_SDIN1
AH17
HDA_SDIN2
AH15
HDA_SDIN3
AD13
HDA_SDOUT
AE13
HDA_DOCK_EN#/GPIO33
AE10
HDA_DOCK_RST#/GPIO34
AG14
SATALED#
AF10
SATA0RXN
AF6
SATA0RXP
AF5
SATA0TXN
AH5
SATA0TXP
AH6
SATA1RXN
AG3
SATA1RXP
AG4
SATA1TXN
AJ4
SATA1TXP
AJ3
SATA2RXN
AF2
SATA2RXP
AF1
SATA2TXN
AE4
SATA2TXP
AE3
SATA_CLKN
AB7
SATA_CLKP
AC6
SATARBIAS#
AG1
SATARBIAS
AG2
FWH0/LAD0 E5
FWH1/LAD1 F5
FWH2/LAD2 G8
FWH3/LAD3 F6
FWH4/LFRAME# C4
LDRQ0# G9
LDRQ1#/GPIO23 E6
A20GATE AF13
A20M# AG26
DPRSTP# AF26
DPSLP# AE26
FERR# AD24
CPUPWRGD/GPIO49 AG29
IGNNE# AF27
INIT# AE24
RCIN# AH14
INTR AC20
NMI AD23
SMI# AG28
STPCLK# AA24
THRMTRIP# AE27
TP8 AA23
DD0 V1
DD1 U2
DD2 V3
DD3 T1
DD4 V4
DD5 T5
DD6 AB2
DD7 T6
DD8 T3
DD9 R2
DD10 T4
DD11 V6
DD12 V5
DD13 U1
DD14 V2
DD15 U6
DA0 AA4
DA1 AA1
DA2 AB3
DCS1# Y6
DCS3# Y5
DIOR# W4
DIOW# W3
DDACK# Y2
IDEIRQ Y3
IORDY Y1
DDREQ W5
R472
332K_0402_1%~D
12
R475
332K_0402_1%~D
12
C658 3900P_0402_50V7K~D
12
R494 33_0402_5%~D
1 2
R471 1M_0402_5%~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
RSV_THRM#
USBRBIAS
ICH_EC_SPI_CLK
IRQ_SERIRQ
SIO_EXT_SMI#
ICH_PWRGD
CLK_ICH_48M
CLK_ICH_14M
CLK_ICH_14M
ICH_SMBDATA
SIO_PWRBTN#
SIO_SLP_S3#
ICH_SMBCLK
DPRSLPVR
SPKR
SIO_EXT_SMI#
ICH_SUSCLK
SIO_SLP_S5#
MCH_ICH_SYNC#
IDE_RST_MOD
SATA_CLKREQ#
CLK_PWRGD
ICH_RSMRST#
ICH_BATLOW#
RSVD_GPIO38
RSVD_GPIO39
CLK_ICH_48M
SATA0GP
ICH_EC_SPI_DIN
DMI_MRX_ITX_P3
DMI_MTX_IRX_P2
DMI_MRX_ITX_N3
DMI_MRX_ITX_P1
DMI_IRCOMP
DMI_MTX_IRX_N2
DMI_MTX_IRX_P0
DMI_MTX_IRX_P1
DMI_MRX_ITX_P0
DMI_MRX_ITX_P2
DMI_MRX_ITX_N1
DMI_MTX_IRX_P3
CLK_PCIE_ICH#
DMI_MTX_IRX_N1
DMI_MTX_IRX_N3
CLK_PCIE_ICH
DMI_MRX_ITX_N2
DMI_MRX_ITX_N0
DMI_MTX_IRX_N0
PCIE_ITX_WLANRX_P2
PCIE_IRX_WLANTX_P2
PCIE_IRX_WLANTX_N2
PCIE_ITX_WLANRX_N2
PCIE_ITX_WANRX_P1
PCIE_IRX_WANTX_P1
PCIE_IRX_WANTX_N1
PCIE_ITX_WANRX_N1
SPKR
USB_OC5#
USB_OC9#
USB_OC8#
USB_OC6#
USB_OC7#
USB_OC4#
USB_OC2_3#
USB_OC0_1#
USB_OC0_1#
USB_OC6#
USB_OC7#
USB_OC4#
USB_OC8#
USB_OC9#
USB_OC5#
USB_OC2_3#
USBP9-
USBP8-
USBP9+
USBP8+
USBP0+
USBP0-
USBP3+
USBP5+
USBP5-
USBP7-
USBP6-
USBP4-
USBP2+
USBP7+
USBP4+
USBP6+
USBP2-
USBP3-
USBP1-
USBP1+
ICH_CL_RST1#
ICH_SMLINK1
ICH_SMLINK0
RSVD_GPIO27
ICH_CL_PWROK
DPRSLPVR
ICH_CL_PWROK
ICH_PWRGD
ICH_RSMRST#
ICH_SMBDATA
ICH_SMBCLK
MEM_SDATA
MEM_SCLK
PCIE_RX6+/GLAN_RX+
GLAN_TXN_C
GLAN_TXP_C
PCIE_RX6-/GLAN_RX-
ICH_CL_RST1#
ICH_SMLINK0
ICH_RI#
SIO_EXT_SCI#
ICH_PCIE_WAKE#
ICH_SMBCLK
ICH_SMBDATA
CL_CLK0
ICH_CL_RST0#
CL_VREF0_ICH
CL_VREF0_ICH
CL_DATA0
RSVD_GPIO48
RSV_THRM#
PM_BMBUSY#
H_STP_CPU#
H_STP_PCI#
ITP_DBRESET#
CLKRUN#
ICH_RI#
ICH_TP7
CLKRUN#
IMVP_PWRGD
ICH_PCIE_WAKE#
IRQ_SERIRQ
RSVD_GPIO39
RSVD_GPIO38
RSVD_GPIO48
MCH_ICH_SYNC#
ICH_EC_SPI_DO
ICH_RSVD
ICH_SPI_CS1#
ICH_SPI_CS0#
IMVP_PWRGD
ICH_LAN_RST#
EC_ME_ALERT
EC_ME_ALERT
SIO_EXT_SCI#
LOM_ICH_SMBALERT#
LOM_ICH_SMBALERT#
ICH_SMLINK1
ICH_LAN_RST#
+3.3V_SUS
+3.3V_RUN
+1.5V_RUN_PCIE_ICH
+3.3V_RUN
+3.3V_SUS
+3.3V_RUN
+3.3V_RUN
+3.3V_SUS
+3.3V_SUS
+3.3V_RUN
+3.3V_RUN
CLK_PCIE_ICH# 6
CLK_PCIE_ICH 6
DMI_MTX_IRX_N0 10
DMI_MTX_IRX_N1 10
DMI_MTX_IRX_N2 10
DMI_MTX_IRX_N3 10
DMI_MTX_IRX_P0 10
DMI_MRX_ITX_N0 10
DMI_MRX_ITX_P0 10
DMI_MTX_IRX_P1 10
DMI_MRX_ITX_N1 10
DMI_MRX_ITX_P1 10
DMI_MTX_IRX_P2 10
DMI_MRX_ITX_N2 10
DMI_MRX_ITX_P2 10
DMI_MTX_IRX_P3 10
DMI_MRX_ITX_N3 10
DMI_MRX_ITX_P3 10
ICH_EC_SPI_CLK39
MCH_ICH_SYNC#10
ICH_SMBCLK28,34
H_STP_PCI#6
ICH_SMBDATA28,34
ICH_PWRGD 10,42
CLK_ICH_48M 6
SIO_PWRBTN# 39
CLK_ICH_14M 6
ICH_RSMRST# 39
SIO_SLP_S5# 39
H_STP_CPU#6
DPRSLPVR 10,48
CLK_PWRGD 6
SIO_SLP_S3# 39
SATA_CLKREQ#6
IMVP_PWRGD39,42,48
ITP_DBRESET#7,38
SPKR26
PM_BMBUSY#10
IRQ_SERIRQ28,30,38,39
IDE_RST_MOD25
SIO_EXT_SMI#39
CLKRUN#30,38,39
ICH_PCIE_WAKE#38
PCIE_ITX_WLANRX_N2_C34 PCIE_IRX_WLANTX_P234 PCIE_IRX_WLANTX_N234
PCIE_IRX_WANTX_P134 PCIE_IRX_WANTX_N134
PCIE_ITX_WLANRX_P2_C34
PCIE_ITX_WANRX_P1_C34
PCIE_ITX_WANRX_N1_C34
ICH_EC_SPI_DO39 ICH_EC_SPI_DIN39
USB_OC0_1#32
USB_OC2_3#32
USBP4+ 31
USBP5- 40
USBP3+ 32
USBP5+ 40
USBP4- 31
USBP3- 32
USBP2+ 32
USBP2- 32
USBP6+ 30
USBP6- 30
USBP1+ 32
USBP1- 32
USBP0- 32
USBP0+ 32
USBP7+ 40
USBP7- 40
USBP8+ 36
USBP8- 36
USBP9+ 34
USBP9- 34
USB_IDE#25
SIO_EXT_WAKE#38 ICH_CL_PWROK 10,39
MEM_SDATA 16,17
MEM_SCLK 16,17
PCIE_RX6-/GLAN_RX-28
PCIE_TX6-/GLAN_TX-28 PCIE_RX6+/GLAN_RX+28
PCIE_TX6+/GLAN_TX+28
CL_CLK0 10
ICH_CL_RST0# 10
CL_DATA0 10
ICH_RSVD22
ICH_SPI_CS0#39 ICH_SPI_CS1#21
PCIE_MCARD1_DET#34
USB_MCARD1_DET#34
USB_MCARD2_DET#34
SIO_EXT_SCI#39
LOM_SMB_ALERT#28,39
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
ICH8(3/4)
23 58Friday, March 02, 2007
Compal Electronics, Inc.
Place closely pin U19.B2
Place closely pin U19.AC1
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Within 500 mils
Within 500 mils
MiniWWAN (Mini Card 1)--->
MiniWLAN (Mini Card 2)--->
Low = Default
High = No Reboot
SPKR
No Reboot Strap
----->Blue Tooth
----->Card Bus
----->Smart Card
----->Rear Left
----->Side Bottom
----->Side Top
----->Rear Right
----->Biometric
----->Dock
----->WWAN
Non-iAMT
GIGA LAN --->
Non-iAMT
Non-iAMT
Option to " Disable "
clkrun. Pulling it
down
will keep the clks
running.
Filters are to supress
14MHz noise sourced
from the ICH
R533 22.6_0402_1%~D
1 2
R278
2.2K_0402_5%~D
12
R703 10K_0402_5%~D
1 2
R99
2.2K_0402_5%~D
12
R505
8.2K_0402_5%~D
12
R519
3.24K_0402_1%~D
12
R503 10K_0402_5%~D
@
1 2
R816
0_0603_5%~D
1 2
C668 0.1U_0402_10V7K~D
1 2
R499 2.2K_0402_5%~D
1 2
C661
4.7P_0402_50V8C~D@
1
2
C670 0.1U_0402_10V7K~D
1 2
C669 0.1U_0402_10V7K~D
1 2
R819 0_0603_5%~D
1 2
R521 1K_0402_5%~D
1 2
R705 10K_0402_5%~D
1 2
R834 10K_0402_5%~D
1 2
R793 0_0402_5%~D@1 2
R807 10K_0402_5%~D
1 2
R516 10K_0402_5%~D 1 2
R504 10K_0402_5%~D
12
R515 10K_0402_5%~D 1 2
R517 10K_0402_5%~D
1 2
R529 24.9_0402_1%~D
1 2
R510
10_0402_5%~D@
12
R523 10K_0402_5%~D
1 2
R115 1K_0402_5%~D@
1 2
R706 10K_0402_5%~D
1 2
R411 2.2K_0402_5%~D@
1 2
R502 10K_0402_5%~D
@
12
R524 10K_0402_5%~D@
1 2
R501 100K_0402_5%~D
1 2
R509 10K_0402_5%~D
1 2
R522
453_0402_1%~D
12
T13 PAD~D
R709 10K_0402_5%~D
1 2
C663
4.7P_0402_50V8C~D@
1
2
T86 PAD~D
R708 10K_0402_5%~D
1 2
R707 10K_0402_5%~D
1 2
R497 10K_0402_5%~D
12
PCI - Express
Direct Media Interface
SPI
USB
U32D
ICH8M_BGA676~D
PERN1
P27
PERP1
P26
PETN1
N29
PETP1
N28
PERN2
M27
PERP2
M26
PETN2
L29
PETP2
L28
PERN3
K27
PERP3
K26
PETN3
J29
PETP3
J28
PERN4
H27
PERP4
H26
PETN4
G29
PETP4
G28
PERN5
F27
PERP5
F26
PETN5
E29
PETP5
E28
PERN6/GLAN_RXN
D27
PERP6/GLAN_RXP
D26
PETN6/GLAN_TXN
C29
PETP6/GLAN_TXP
C28
SPI_CLK
C23
SPI_CS0#
B23
SPI_CS1#
E22
SPI_MOSI
D23
SPI_MISO
F21
OC0#
AJ19
OC1#/GPIO40
AG16
OC2#/GPIO41
AG15
OC3#/GPIO42
AE15
OC4#/GPIO43
AF15
OC5#/GPIO29
AG17
OC6#/GPIO30
AD12
OC7#/GPIO31
AJ18
OC8#
AD14
OC9#
AH18
DMI0RXN V27
DMI0RXP V26
DMI0TXN U29
DMI0TXP U28
DMI1RXN Y27
DMI1RXP Y26
DMI1TXN W29
DMI1TXP W28
DMI2RXN AB26
DMI2RXP AB25
DMI2TXN AA29
DMI2TXP AA28
DMI3RXN AD27
DMI3RXP AD26
DMI3TXN AC29
DMI3TXP AC28
DMI_CLKN T26
DMI_CLKP T25
DMI_ZCOMP Y23
DMI_IRCOMP Y24
USBP0N G3
USBP0P G2
USBP1N H5
USBP1P H4
USBP2N H2
USBP2P H1
USBP3N J3
USBP3P J2
USBP4N K5
USBP4P K4
USBP5N K2
USBP5P K1
USBP6N L3
USBP6P L2
USBP7N M5
USBP7P M4
USBP8N M2
USBP8P M1
USBP9N N3
USBP9P N2
USBRBIAS# F2
USBRBIAS F3
R531 15_0402_5%~D
1 2
R512 10K_0402_5%~D
1 2
G
D
S
Q27
2N7002W-7-F_SOT323-3~D
2
1 3
R528 10K_0402_5%~D
1 2
C876 47P_0402_50V8J~D
@
1
2
R690 8.2K_0402_5%~D
1 2
R818 0_0603_5%~D
1 2
R763 15_0402_5%~D
1 2
T24PAD~D
T15PAD~D
C667 0.1U_0402_10V7K~D
1 2
C662
0.1U_0402_16V4Z~D
1
2
G
D
S
Q21
2N7002W-7-F_SOT323-3~D
2
1 3
T3PAD~D
R820 4.7K_0603_5%~D 1 2
R702 10K_0402_5%~D
1 2
R530 15_0402_5%~D
1 2
C664 0.1U_0402_10V7K~D
1 2
R514 10K_0402_5%~D@1 2
R817 0_0603_5%~D
1 2
R42 1M_0402_1%~D
1 2
R518 8.2K_0402_5%~D
12
R498 2.2K_0402_5%~D
1 2
C874
47P_0402_50V8J~D
@
1
2
C875 47P_0402_50V8J~D
@
1
2
R520
10_0402_5%~D@
12
C878 47P_0402_50V8J~D
@
1
2
R506 10K_0402_5%~D
1 2
R704 10K_0402_5%~D
1 2
C666 0.1U_0402_10V7K~D
1 2
T14PAD~D
SMB
SYS / GPIOGPIOMISC
Controller Link Power MGT
clocks
SATA
GPIO
U32C
ICH8M_BGA676~D
SMBCLK
AJ26
SMBDATA
AD19
LINKALERT#
AG21
SMLINK0
AC17
SMLINK1
AE19
RI#
AF17
SUS_STAT#/LPCPD#
F4
SYS_RESET#
AD15
BMBUSY#/GPIO0
AG12
SMBALERT#/GPIO11
AG22
STP_PCI#/GPIO15
AE20
STP_CPU#/GPIO25
AG18
CLKRUN#/GPIO32
AH11
WAKE#
AE17
SERIRQ
AF12
THRM#
AC13
VRMPWRGD
AJ20
TP7
AJ22
TACH1/GPIO1
AJ8
TACH2/GPIO6
AJ9
TACH3/GPIO7
AH9
GPIO8
AE16
GPIO12
AC19
TACH0/GPIO17
AG8
GPIO18
AH12
GPIO20
AE11
SCLOCK/GPIO22
AG10
QRT_STATE0/GPIO27
AH25
QRT_STATE1/GPIO28
AD16
SATACLKREQ#/GPIO35
AG13
SLOAD/GPIO38
AF9
SDATAOUT0/GPIO39
AJ11
SDATAOUT1/GPIO48
AD10
SPKR
AD9
MCH_SYNC#
AJ13
TP3
AJ21
SATA0GP/GPIO21 AJ12
SATA1GP/GPIO19 AJ10
SATA2GP/GPIO36 AF11
SATA3GP/GPIO37 AG11
CLK14 AG9
CLK48 G5
SUSCLK D3
SLP_S3# AG23
SLP_S4# AF21
SLP_S5# AD18
S4_STATE#/GPIO26 AH27
PWROK AE23
DPRSLPVR/GPIO16 AJ14
BATLOW# AE21
PWRBTN# C2
LAN_RST# AH20
RSMRST# AG27
CK_PWRGD E1
CLPWROK E3
SLP_M# AJ25
CL_CLK0 F23
CL_CLK1 AE18
CL_DATA0 F22
CL_DATA1 AF19
CL_VREF0 D24
CL_VREF1 AH23
CL_RST# AJ23
MEM_LED/GPIO24 AJ27
ME_EC_ALERT/GPIO10 AJ24
EC_ME_ALERT/GPIO14 AF22
WOL_EN/GPIO9 AG19
C877 47P_0402_50V8J~D
@
1
2
R500
8.2K_0402_5%~D
12
R508
10_0402_5%~D
@
12
R532 15_0402_5%~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VCCSATAPLLR
ICH_V5REF_SUS
ICH_V5REF_RUN
TP_VCCLAN1.05_INT_ICH2
ICH_V5REF_SUS
+1.5V_RUN_PCIE_ICH
ICH_V5REF_RUN
TP_VCCLAN1.05_INT_ICH1
TP_VCCSUS1.05_INT_ICH1
TP_VCCSUS1.05_INT_ICH2
VCCSUS1_5_ICH_2
VCCSUS1_5_ICH_1
VCCCL1_05_ICH
+1.05V_VCCP
+3.3V_RUN+5V_RUN
+3.3V_SUS+5V_SUS
+1.25V_RUN
+1.05V_VCCP
+1.5V_RUN_PCIE_ICH
+1.5V_RUN
+3.3V_RUN
+3.3V_SUS
+3.3V_RUN
+RTC_CELL
+1.5V_RUN +1.5V_RUN_SATAPLL
+1.5V_RUN
+3.3V_RUN
+3.3V_RUN
+1.5V_RUN
+3.3V_RUN
+3.3V_SUS
+3.3V_SUS
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+1.5V_RUN
+1.5V_RUN_PCIE_ICH
+1.5V_RUN
+1.05V_VCCP
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
ICH8(4/4)
24 58Wednesday, February 14, 2007
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Non-iAMT
Non-iAMT
Non-iAMT
Place Cap as close
to A24 as possible
Non-iAMT
Non-iAMT
Non-iAMT
T17PAD~D
C704
0.1U_0402_16V4Z~D
1
2
C683
0.1U_0402_16V4Z~D
1
2
L43
BLM21PG600SN1D_0805~D
1 2
C690
1U_0603_10V4Z~D
1
2
D21
RB751V_SOD323~D
21
L45
10UH_LB2012T100MR_20%_0805~D
1 2
C680
0.01U_0402_16V7K~D
1
2
C677
22U_0805_6.3V6M~D
1
2
C689
10U_0805_4VAM~D
1
2
C701
0.022U_0402_16V7K~D
1
2
C673
0.1U_0402_16V4Z~D
1
2
R537
0_0603_5%~D
1 2
T22PAD~D
R182
10_0805_5%~D
1 2
C709
4.7U_0603_6.3V6M~D
1
2
C200
1U_0603_10V4Z~D
1
2
T20
C681
10U_0805_4VAM~D
1
2
C688
0.1U_0402_16V4Z~D
1
2
C695
0.1U_0402_16V4Z~D
1
2
C679
2.2U_0603_6.3V6K~D
1
2
C674
0.1U_0402_16V4Z~D
1
2
C675
0.1U_0402_16V4Z~D
1
2
+
C676
220U_D2_4VY_R15M~D
1
2
C705
0.1U_0402_16V4Z~D
1
2
L44
BLM18PG181SN1_0603~D
1 2
C672
0.1U_0402_16V4Z~D
1
2
C686
0.1U_0402_16V4Z~D
1
2
R536
10_0402_5%~D
12
D20
RB751V_SOD323~D
21
C682
22U_0805_6.3V6M~D
1
2
T21PAD~D
U32E
ICH8M_BGA676~D
VSS[001]
A23
VSS[002]
A5
VSS[003]
AA2
VSS[004]
AA7
VSS[005]
A25
VSS[006]
AB1
VSS[007]
AB24
VSS[008]
AC11
VSS[009]
AC14
VSS[010]
AC25
VSS[011]
AC26
VSS[012]
AC27
VSS[013]
AD17
VSS[014]
AD20
VSS[015]
AD28
VSS[016]
AD29
VSS[017]
AD3
VSS[018]
AD4
VSS[019]
AD6
VSS[020]
AE1
VSS[021]
AE12
VSS[022]
AE2
VSS[023]
AE22
VSS[024]
AD1
VSS[025]
AE25
VSS[026]
AE5
VSS[027]
AE6
VSS[028]
AE9
VSS[029]
AF14
VSS[030]
AF16
VSS[031]
AF18
VSS[032]
AF3
VSS[033]
AF4
VSS[034]
AG5
VSS[035]
AG6
VSS[036]
AH10
VSS[037]
AH13
VSS[038]
AH16
VSS[039]
AH19
VSS[040]
AH2
VSS[041]
AF28
VSS[042]
AH22
VSS[043]
AH24
VSS[044]
AH26
VSS[045]
AH3
VSS[046]
AH4
VSS[047]
AH8
VSS[048]
AJ5
VSS[049]
B11
VSS[050]
B14
VSS[051]
B17
VSS[052]
B2
VSS[053]
B20
VSS[054]
B22
VSS[055]
B8
VSS[056]
C24
VSS[057]
C26
VSS[058]
C27
VSS[059]
C6
VSS[060]
D12
VSS[061]
D15
VSS[062]
D18
VSS[063]
D2
VSS[064]
D4
VSS[065]
E21
VSS[066]
E24
VSS[067]
E4
VSS[068]
E9
VSS[069]
F15
VSS[070]
E23
VSS[071]
F28
VSS[072]
F29
VSS[073]
F7
VSS[074]
G1
VSS[075]
E2
VSS[076]
G10
VSS[077]
G13
VSS[078]
G19
VSS[079]
G23
VSS[080]
G25
VSS[081]
G26
VSS[082]
G27
VSS[083]
H25
VSS[084]
H28
VSS[085]
H29
VSS[086]
H3
VSS[087]
H6
VSS[088]
J1
VSS[089]
J25
VSS[090]
J26
VSS[091]
J27
VSS[092]
J4
VSS[093]
J5
VSS[094]
K23
VSS[095]
K28
VSS[096]
K29
VSS[097]
K3
VSS[098]
K6
VSS[099] K7
VSS[100] L1
VSS[101] L13
VSS[102] L15
VSS[103] L26
VSS[104] L27
VSS[105] L4
VSS[106] L5
VSS[107] M12
VSS[108] M13
VSS[109] M14
VSS[110] M15
VSS[111] M16
VSS[112] M17
VSS[113] M23
VSS[114] M28
VSS[115] M29
VSS[116] M3
VSS[117] N1
VSS[118] N11
VSS[119] N12
VSS[120] N13
VSS[121] N14
VSS[122] N15
VSS[123] N16
VSS[124] N17
VSS[125] N18
VSS[126] N26
VSS[127] N27
VSS[128] N4
VSS[129] N5
VSS[130] N6
VSS[131] P12
VSS[132] P13
VSS[133] P14
VSS[134] P15
VSS[135] P16
VSS[136] P17
VSS[137] P23
VSS[138] P28
VSS[139] P29
VSS[140] R11
VSS[141] R12
VSS[142] R13
VSS[143] R14
VSS[144] R15
VSS[145] R16
VSS[146] R17
VSS[147] R18
VSS[148] R28
VSS[149] R4
VSS[150] T12
VSS[151] T13
VSS[152] T14
VSS[153] T15
VSS[154] T16
VSS[155] T17
VSS[156] T2
VSS[157] U12
VSS[158] U13
VSS[159] U14
VSS[160] U15
VSS[161] U16
VSS[162] U17
VSS[163] U23
VSS[164] U26
VSS[165] U27
VSS[166] U3
VSS[167] U5
VSS[168] V13
VSS[169] V15
VSS[170] V28
VSS[171] V29
VSS[172] W2
VSS[173] W26
VSS[174] W27
VSS[175] Y28
VSS[176] Y29
VSS[177] Y4
VSS[178] AB4
VSS[179] AB23
VSS[180] AB5
VSS[181] AB6
VSS[182] AD5
VSS[183] U4
VSS[184] W24
VSS_NCTF[01] A1
VSS_NCTF[02] A2
VSS_NCTF[03] A28
VSS_NCTF[04] A29
VSS_NCTF[05] AH1
VSS_NCTF[06] AH29
VSS_NCTF[07] AJ1
VSS_NCTF[08] AJ2
VSS_NCTF[09] AJ28
VSS_NCTF[10] AJ29
VSS_NCTF[11] B1
VSS_NCTF[12] B29
T23
T18PAD~D
C700
0.1U_0402_16V4Z~D
1
2
C687
0.1U_0402_16V4Z~D
1
2
CORE
VCCP_CORE
IDEPCI
VCCPSUS
VCCPUSB
GLAN POWER
USB COREATX
ARX
VCCA3GP
U32F
ICH8M_BGA676~D
VCCRTC
AD25
V5REF[1]
A16
V5REF[2]
T7
V5REF_SUS
G4
VCC1_5_B[01]
AA25
VCC1_5_B[02]
AA26
VCC1_5_B[03]
AA27
VCC1_5_B[04]
AB27
VCC1_5_B[05]
AB28
VCC1_5_B[06]
AB29
VCC1_5_B[07]
D28
VCC1_5_B[08]
D29
VCC1_5_B[09]
E25
VCC1_5_B[10]
E26
VCC1_5_B[11]
E27
VCC1_5_B[12]
F24
VCC1_5_B[13]
F25
VCC1_5_B[14]
G24
VCC1_5_B[15]
H23
VCC1_5_B[16]
H24
VCC1_5_B[17]
J23
VCC1_5_B[18]
J24
VCC1_5_B[19]
K24
VCC1_5_B[20]
K25
VCC1_5_B[21]
L23
VCC1_5_B[22]
L24
VCC1_5_B[23]
L25
VCC1_5_B[24]
M24
VCC1_5_B[25]
M25
VCC1_5_B[26]
N23
VCC1_5_B[27]
N24
VCC1_5_B[28]
N25
VCC1_5_B[29]
P24
VCC1_5_B[30]
P25
VCC1_5_B[31]
R24
VCC1_5_B[32]
R25
VCC1_5_B[33]
R26
VCC1_5_B[34]
R27
VCC1_5_B[35]
T23
VCC1_5_B[36]
T24
VCC1_5_B[37]
T27
VCC1_5_B[38]
T28
VCC1_5_B[39]
T29
VCC1_5_B[40]
U24
VCC1_5_B[41]
U25
VCC1_5_B[42]
V23
VCC1_5_B[43]
V24
VCC1_5_B[44]
V25
VCC1_5_B[45]
W25
VCC1_5_B[46]
Y25
VCCSATAPLL
AJ6
VCC1_5_A[01]
AE7
VCC1_5_A[02]
AF7
VCC1_5_A[03]
AG7
VCC1_5_A[04]
AH7
VCC1_5_A[05]
AJ7
VCC1_5_A[06]
AC1
VCC1_5_A[07]
AC2
VCC1_5_A[08]
AC3
VCC1_5_A[09]
AC4
VCC1_5_A[10]
AC5
VCC1_5_A[11]
AC10
VCC1_5_A[12]
AC9
VCC1_5_A[13]
AA5
VCC1_5_A[14]
AA6
VCC1_5_A[15]
G12
VCC1_5_A[16]
G17
VCC1_5_A[17]
H7
VCC1_5_A[18]
AC7
VCC1_5_A[19]
AD7
VCCUSBPLL
D1
VCC1_5_A[20]
F1
VCC1_5_A[21]
L6
VCC1_5_A[22]
L7
VCC1_5_A[23]
M6
VCC1_5_A[24]
M7
VCC1_5_A[25]
W23
VCCLAN1_05[1]
F17
VCCLAN1_05[2]
G18
VCCLAN3_3[1]
F19
VCCLAN3_3[2]
G20
VCCGLANPLL
A24
VCCGLAN1_5[1]
A26
VCCGLAN1_5[2]
A27
VCCGLAN1_5[3]
B26
VCCGLAN1_5[4]
B27
VCCGLAN1_5[5]
B28
VCCGLAN3_3
B25
VCC1_05[01] A13
VCC1_05[02] B13
VCC1_05[03] C13
VCC1_05[04] C14
VCC1_05[05] D14
VCC1_05[06] E14
VCC1_05[07] F14
VCC1_05[08] G14
VCC1_05[09] L11
VCC1_05[10] L12
VCC1_05[11] L14
VCC1_05[12] L16
VCC1_05[13] L17
VCC1_05[14] L18
VCC1_05[15] M11
VCC1_05[16] M18
VCC1_05[17] P11
VCC1_05[18] P18
VCC1_05[19] T11
VCC1_05[20] T18
VCC1_05[21] U11
VCC1_05[22] U18
VCC1_05[23] V11
VCC1_05[24] V12
VCC1_05[25] V14
VCC1_05[26] V16
VCC1_05[27] V17
VCC1_05[28] V18
VCCDMIPLL R29
VCC_DMI[1] AE28
VCC_DMI[2] AE29
V_CPU_IO[1] AC23
V_CPU_IO[2] AC24
VCC3_3[01] AF29
VCC3_3[02] AD2
VCC3_3[03] AC8
VCC3_3[04] AD8
VCC3_3[05] AE8
VCC3_3[06] AF8
VCC3_3[07] AA3
VCC3_3[08] U7
VCC3_3[09] V7
VCC3_3[10] W1
VCC3_3[11] W6
VCC3_3[12] W7
VCC3_3[13] Y7
VCC3_3[14] A8
VCC3_3[15] B15
VCC3_3[16] B18
VCC3_3[17] B4
VCC3_3[18] B9
VCC3_3[19] C15
VCC3_3[20] D13
VCC3_3[21] D5
VCC3_3[22] E10
VCC3_3[23] E7
VCC3_3[24] F11
VCCHDA AC12
VCCSUSHDA AD11
VCCSUS1_05[1] J6
VCCSUS1_05[2] AF20
VCCSUS1_5[1] AC16
VCCSUS1_5[2] J7
VCCSUS3_3[01] C3
VCCSUS3_3[02] AC18
VCCSUS3_3[03] AC21
VCCSUS3_3[04] AC22
VCCSUS3_3[05] AG20
VCCSUS3_3[06] AH28
VCCSUS3_3[07] P6
VCCSUS3_3[08] P7
VCCSUS3_3[09] C1
VCCSUS3_3[10] N7
VCCSUS3_3[11] P1
VCCSUS3_3[12] P2
VCCSUS3_3[13] P3
VCCSUS3_3[14] P4
VCCSUS3_3[15] P5
VCCSUS3_3[16] R1
VCCSUS3_3[17] R3
VCCSUS3_3[18] R5
VCCSUS3_3[19] R6
VCCCL1_05 G22
VCCCL1_5 A22
VCCCL3_3[1] F20
VCCCL3_3[2] G21
C696
1U_0603_10V4Z~D
1
2
C698
0.1U_0402_16V4Z~D
1
2
C202
0.1U_0402_16V4Z~D
1
2
C678
22U_0805_6.3V6M~D
1
2
C684
4.7U_0603_6.3V6M~D
1
2
C702
0.022U_0402_16V7K~D
1
2
T19
R535
1_0603_1%~D
12
C694
0.1U_0402_16V4Z~D
1
2
C693
0.1U_0402_16V4Z~D
1
2
C703
0.1U_0402_16V4Z~D
1
2
C685
0.1U_0402_16V4Z~D
1
2
C699
0.1U_0402_16V4Z~D
1
2
C691
0.1U_0402_16V4Z~D
1
2
R534
100_0402_5%~D
12
C692
0.1U_0402_16V4Z~D
1
2
C671
0.1U_0402_16V4Z~D
1
2
D4
MMBD4148-7-F_SOT23-3~D
1
3
2
C697
1U_0603_10V4Z~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
IDE_RST_MOD
IDE_DD12
IDE_DD8
IDE_IRQ
IDE_DD11
IDE_DD13
IDE_DD14
IDE_DDREQ
IDE_DCS1#
IDE_DD10
IDE_DD3
IDE_DD0
IDE_DIOR#
IDE_DA1
IDE_DA2
IDE_DD7
IDE_DD6
IDE_DD4
IDE_DA0
IDE_DD9
IDE_DD2
IDE_DIOW#
IDE_DD15
IDE_DCS3#
MOD_RST
IDE_DD5
CSEL2
IDE_DD1
MODPRES#
PSATA_IRX_DTX_P0
USB_IDE#
PSATA_IRX_DTX_N0
SC_USBP+
SC_USBP-
PSATA_ITX_DRX_P0
PSATA_ITX_DRX_N0
IDE_DD[0..15]
IDE_DIORDY
HDD_EN_5V
IDE_DDACK#_R
MOD_EN
+3.3V_RUN
+3.3V_ALW
+5V_MOD
+5V_HDD +3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+5V_HDD
+5V_HDD
+15V_ALW +5V_ALW
+5V_RUN
+3.3V_ALW2
+5V_ALW
+15V_ALW
+5V_MOD
+3.3V_ALW2
IDE_DCS1# 22
IDE_DCS3#22
IDE_DD[0..15]22
IDE_DDREQ 22
IDE_IRQ 22
USB_IDE#23
IDE_RST_MOD23
MODPRES#38
SC_USBP+ 31
SC_USBP- 31
PSATA_ITX_DRX_P022 PSATA_ITX_DRX_N022
PSATA_IRX_DTX_N0_C22
PSATA_IRX_DTX_P0_C22
IDE_DA022
IDE_DA122
IDE_DA222
IDE_DDACK# 22
IDE_DIOR#22
IDE_DIOW#22
IDE_DIORDY 22
MODC_EN38
HDDC_EN38
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
DVD MODULE
25 58Monday, February 26, 2007
Compal Electronics, Inc.
1
3
6
2
DASP#
PDIAG#
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Pleace near HD CONN Main SATA +5V Default
close SATA connector
Pleace near HD CONN
WF1F068N1A
TOP VIEW
5
4
+5V_HDD Source
HDD PWR
Open
2
+5VMOD Source
DELL CONFIDENTIAL/PROPRIETARY
C469
0.1U_0402_16V4Z~D
1
2
R622
100K_0402_5%~D
12
R618
100K_0402_5%~D
12
C465
10U_0805_10V4Z~D
@
1
2
R627
100K_0402_5%~D
12
C262
0.1U_0402_16V4Z~D
1
2
C60
10U_0805_10V4Z~D
1
2
JSATA
TYCO_1775191-1_RV~D
GND1 23
GND2 24
GND
1
RX+
2
RX-
3
GND
4
TX-
5
TX+
6
GND
7
3.3V
8
3.3V
9
3.3V
10
GND
11
GND
12
GND
13
5V
14
5V
15
5V
16
GND
17
Reserved
18
GND
19
12V
20
12V
21
12V
22
R691
100K_0402_5%~D
12
R217
10K_0402_5%~D
1 2
R205
470_0402_5%~D
1 2
G
D
S
Q69
2N7002W-7-F_SOT323-3~D
2
13
R626
100K_0402_5%~D
12
JMOD
TYCO_1770530-1~D
8.3
11
2
2
33
4
4
55
6
6
77
8
8
99
10
10
11 11
12
12
13 13
14
14
15 15
16
16
17 17
18
18
19 19
20
20
21 21
22
22
23 23
24
24
25 25
26
26
27 27
28
28
29 29
30
30
31 31
32
32
33 33
34
34
35 35
36
36
37 37
38
38
39 39
40
40
41 41
42
42
43 43
44
44
45 45
46
46
47 47
48
48
49 49
50
50
51 51
52
52
53 53
54
54
55 55
56
56
57 57
58
58
59 59
60
60
61 61
62
62
63 63
64
64
65 65
66
66
67 67
68
68
G71
G72
G
69
G
70
R619
100K_0402_5%~D
12
C466
0.1U_0402_16V4Z~D
@
1
2
R206
4.7K_0402_5%~D
12
G
D
S
Q68
2N7002W-7-F_SOT323-3~D
2
13
C464
0.1U_0402_10V7K~D
@
1
2
C817
0.1U_0603_50V4Z~D
1
2
C461
3900P_0402_50V7K~D
12
R629
100K_0402_5%~D
12
C812
0.1U_0603_50V4Z~D
1
2
R230
100K_0402_5%~D
1 2
R209
56_0402_5%~D
1 2
G
D
S
Q57
2N7002W-7-F_SOT323-3~D
2
13
PJP2003
PAD-OPEN 4x4m@
1 2
C268
0.1U_0402_16V4Z~D
1
2
R692
100K_0402_5%~D
12
C211
0.01U_0402_16V7K~D
1
2
C813
10U_0805_10V4Z~D
1
2
R392 0_0402_5%~D 1 2
C818
10U_0805_10V4Z~D
1
2
C462
3900P_0402_50V7K~D
12
G
D
S
Q50
2N7002W-7-F_SOT323-3~D
2
13
C145
1000P_0402_50V7K~D
1
2
S
G
D
Q56
SI3456BDV-T1-E3_TSOP6~D
3
6
2
4 5
1
S
G
D
Q48
SI3456BDV-T1-E3_TSOP6~D
3
6
2
4 5
1
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
AUD_PC_BEEPBEEP1 BEEP2
AUD_SENSE_A
AUD_HP_NB_SENSE
AUD_SENSE_B
DOCK_HP_MUTE#
AUD_SPDIF_SHDN
ICH_AZ_CODEC_SDOUT
AUD_SENSE_A
ICH_AZ_CODEC_BITCLK
AUD_SENSE_B
AUD_SPDIF_OUT
AUD_LINE_OUT_L
AUD_LINE_OUT_R
DOCK_HP_MUTE#
ICH_AZ_CODEC_BITCLK
AUD_PC_BEEP
ICH_AZ_CODEC_SDOUT
AUD_EAPD
ICH_AC_SDIN0_R
+VDDA
+3.3V_RUN
+VDDA
+3.3V_RUN
VREFOUT
+VDDA
+VDDA
AUD_HP_OUT_L 27
BEEP39
SPKR23
AUD_EXT_MIC_L 27
AUD_EXT_MIC_R 27
AUD_HP_OUT_R 27
ICH_AZ_CODEC_RST#22
ICH_AZ_CODEC_SYNC22
ICH_AZ_CODEC_SDOUT22
ICH_AZ_CODEC_BITCLK22
ICH_AZ_CODEC_SDIN022
AUD_SPDIF_OUT36
DOCK_HP_MUTE# 38
AUD_EAPD27
AUD_MIC_SWITCH 27AUD_HP_NB_SENSE27,38
AUD_INT_MIC_IN 27
AUD_SPDIF_SHDN 38
AUD_LINE_OUT_R 27
AUD_LINE_OUT_L 27
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
Azalia (HD) Codec
26 58Monday, February 26, 2007
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
W=30 mil
Close to Pin 6
TRACE>15 mil
45
2
single gate TTL
31
U34 place as close to CODEC as possible
Close to Pin 5
C714
0.1U_0402_16V4Z~D
1
2
G
D
S
Q75
2N7002W-7-F_SOT323~D
2
13
C715
1U_0603_10V4Z~D
1
2
R711
20K_0402_1%~D
12
C782
0.1U_0402_16V4Z~D
@
1
2
R543
10K_0402_5%~D
12
R821
100K_0402_5%~D
1 2
R546 10K_0402_5%~D 12
C710
0.1U_0402_16V4Z~D
1
2
R544 33_0402_5%~D
1 2
R823
10K_0402_5%~D
12
G
D
S
Q74
2N7002W-7-F_SOT323~D
2
13
R540
20K_0402_5%~D
1 2
C726
1U_0603_10V4Z~D
1
2
C718
10U_0805_10V6K~D
@
1
2
R479
47_0402_5%~D
@
12
U34
74AHCT1G86GW_SOT353-5~D
B
1
A
2Y4
P5
G
3
R545
10_0402_5%~D
12
C713
1000P_0402_50V7K~D
1
2
C717
0.1U_0402_10V7K~D
1
2
C759
1000P_0402_50V7K~D
1
2
R542
5.11K_0402_1%~D
12
R541
10K_0402_5%~D
12
C724
10U_0805_10V4Z~D
1
2
STAC9205
QFN 7x7 & LQFP 9x9 colay footprint.
U35
STAC9205X5NBEB1XR_QFN48_COMON~D
HDA_SDO
5
HDA_BIT_CLK
6
HDA_SYNC
10
HDA_RST#
11
SPDIF _OUT
48
CAP2 33
AVDD1 25
AVSS2
42 AVSS1
26
SPDIF_ IN//GPIO0/EAPD
47
SENSE_A 13
HDA_SDI_CODEC
8
PORT_A_L 39
PORT_A_R 41
CD_L 18
CD_R 20
DMIC_CLK
46
VREFFILT 27
DVDD_CORE
1
DVSS
7
NC1
43
NC2
44
VOL_UP/DMIC0/GPIO1
2
VOL_DN/DMIC1/GPIO2
4
PC_BEEP 12
MONO_OUT 32
AVDD2 38
SENSE_B 34
VREFOUT_A 37
PORT_B_L 21
PORT_B_R 22
VREFOUT_B 28
PORT_C_L 23
PORT_C_R 24
VREFOUT_C 29
PORT_D_L 35
PORT_D_R 36
PORT_E_L 14
PORT_E_R 15
VREFOUT_E/GPIO4 31
PORT_F_L 16
PORT_F_R 17
VREFOUT_F/GPIO3 30
CD_GND 19
DVDD_CORE
9
DVDD_CORE/VPP
40
DVDD_IO
3
NC3
45
Thermal PAD GND
49
R547 10K_0402_5%~D 12
C172
10U_0805_10V4Z~D
@
1
2
C711
0.1U_0402_10V6K~D
1 2
C721
10P_0402_50V8J~D
1
2
C725
10U_0805_10V4Z~D
1
2
C716
0.1U_0402_16V4Z~D
1
2
R710
39.2K_0402_1%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
HP_SPK_R2HP_SPK_R1
HP_SPK_L1 HP_SPK_L2
MIC_L1
VREFOUT_R
MIC_R1
AUD_MIC_BIAS
AUD_MIC_BIAS
+5V_SPK+AMP
ADU_SPK_ENABLE#
AUD_GAIN1
AUD_GAIN2
C1N
HP_SPK_R1
C1P
HP_SPK_L1 AUD_GAIN1
INT_SPK_R2
INT_SPK_R1
AUD_GAIN2
INT_SPK_R2
SPKR_INR_C
HP_INL_C
HP_INR_C
ADU_SPK_ENABLE#
AUD_AMP_MUTE#
AUD_AMP_MUTE#
SET
REGEN
AUDIO_AVDD_ON
SPKR_INL_C INT_SPK_R1
AUD_HP_NB_SENSE
NB_MUTE#
AUD_EAPD
MIC_L2
MIC_R2
+5V_SPK+AMP
+5V_RUN +5V_SPK+AMP
VREFOUT
+3.3V_RUN
+VDDA
+VDDA
+VDDA
+5V_SPK+AMP
+VDDA
+5V_SPK+AMP
+3.3V_RUN
+5V_SPK+AMP
+VDDA
+5V_SPK+AMP
AUD_LINE_OUT_R26
AUD_HP_NB_SENSE26,38
AUD_MIC_SWITCH26
AUD_EXT_MIC_R26
AUD_EXT_MIC_L26
AUD_INT_MIC_IN 26
AUD_INT_MIC+32
AUD_INT_MIC-32
AUD_EAPD26
AUD_HP_OUT_L26
AUD_HP_OUT_R26
NB_MUTE#38
AUDIO_AVDD_ON 18
AUD_LINE_OUT_L26
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
AMP and PHONE JACK
27 58Wednesday, March 07, 2007
Compal Electronics, Inc.
Gain Setting
GAIN1 INPUTAV(inv)GAIN2
21.6dB
15.6dB
6dB
1
0
10dB
26K ohm
45K ohm
66K ohm
82K ohm
IMPEDANCE
11
0
0
0
*
1
Speaker Connector
15 mils trace
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
W=40mils
MINIMAM 150 mA
Place Close to Audio Chip Place Close to Audio Chip
For
TPA6040A,
pop
C304,depop
R584
For TPA6040A,pop C301,depop R585
For TPA6040A,pop
R714,depop R713
C783
0.1U_0402_16V4Z~D
1
2
C301
0.033U_1206_50V7K~D
@
1 2
R572
100K_0402_5%~D@
12
C758
1U_0603_10V4Z~D
12
C746
1U_0603_10V4Z~D
1
2
JAUDIO
FOX_JA9033L-B1N6-7F~D
1
2
3
4
5
6
7
8
C730
1U_0603_10V6K~D
1 2
R796 0_0402_5%~D
12
MAX9789A
U37
MAX9789A_TQFN32~D
PGND2
21 PGND1
5
CPVSS
13 PVSS
14
SPKR_INR
2
SET 1
REGEN 4
OUTL- 7
OUTL+ 6
OUTR- 19
OUTR+ 20
SPKR_INL
3
HP_INR
26
HP_INL
27
GAIN2 32
GAIN1 31
PVDD1 8
C1N
12
HPL 16
HPR 15
VOUT 29
C1P
10
CPGND
11
HPVDD
17
CPVDD
9
MUTE#
25
HP_EN
22
SPKR_EN#
23
BIAS
24
PVDD2 18
GND
28
VDD 30
EP
33
C734
100P_0402_50V8J~D
1
2
R580
0_0402_5%~D
1 2
C736
0.1U_0402_10V6K~D
1 2
R556
100K_0402_5%~D
12
L49
BLM18BD121SN1D_0603~D
12
R559
100K_0402_5%~D
12
C747
10U_0805_10V4Z~D
1
2
C744
1U_0603_10V4Z~D
1
2
C740
100P_0402_50V8J~D
@
1
2
R560
10K_0402_5%~D
1 2
C756
1U_0603_10V4Z~D
1
2
C96
47P_0402_50V8J~D
@
1
2
C727
10U_0805_10V4Z~D
1 2
C748 0.033U_1206_50V7K~D
12
R551
4.7K_0402_5%~D
12
C907
47P_0402_50V8J~D
@
1
2
C749 1U_1206_25V7K~D
1 2
C751 1U_1206_25V7K~D
1 2
R563
10K_0402_5%~D
1 2
R568
1K_0402_5%~D
12
U40
74AHCT1G08GW_SOT353-5~D
A
2
B
1
G
3
Y4
P5
C729
2.2U_0805_10V6K~D
12
C232
10P_0402_50V8J~D
@
1
2
C754
1U_0603_10V4Z~D
1
2
C905
47P_0402_50V8J~D
@
1
2
R562
20K_0402_1%~D
@
12
C733
0.1U_0805_25V7K~D
1 2
R712
100K_0402_5%~D
12
R573
100K_0402_5%~D
12
R565
100K_0402_5%~D
1 2
L47
BLM18BD601SN1D_0603~D
12
C728
1U_0603_10V6K~D
1 2
C742
1U_0603_10V4Z~D
1
2
R790
10_0402_5%~D
@
12
G
D
S
Q42
2N7002W-7-F_SOT323-3~D
2
13
C745
10U_0805_10V4Z~D
1
2
C752 1U_0603_10V4Z~D
12
C731
0.1U_0402_10V6K~D
1 2
R570
100K_0402_5%~D@
12
L48
BLM18BD601SN1D_0603~D
12
R569
100K_0402_5%~D
12
L50
BLM18BD121SN1D_0603~D
12
JSPK
MOLEX_53398-0271~D
1
1
2
2
C738
100P_0402_50V8J~D
1
2
R554
0_0402_5%~D
1 2
R553
1K_0402_5%~D
12
R561
20K_0402_1%~D
@
12
C755
1U_0603_10V4Z~D
1
2
JMIC
FOX_JA9033L-B1N6-7F~D
1
2
3
4
5
6
7
8
R552
4.7K_0402_5%~D
12
C304
0.033U_1206_50V7K~D
@
1
2
C757
1U_0603_10V4Z~D
1
2
C732
2.2U_0805_10V6K~D
1
2
R558
1K_0402_5%~D
12
R713
100K_0402_5%~D
12
C77 0.033U_1206_50V7K~D
12
R555
5.1_0402_1%~D
12
R822
1M_0402_1%~D
12
L51
BLM21PG600SN1D_0805~D
1 2
C737
2.2U_0805_10V6K~D
12
G
D
S
Q43
2N7002W-7-F_SOT323-3~D
2
13
R714
0_0402_5%~D
@ 1 2
R571
100K_0402_5%~D
1 2
R564
100K_0402_5%~D
12
R584
0_0402_5%~D
12
U36A
LM358DR2G_SOIC8~D
P8
IN+ 3
IN- 2
G
4
O
1
C739
100P_0402_50V8J~D
1
2
R567
100K_0402_5%~D
12
R797 0_0402_5%~D
12
U36B
LM358DR2G_SOIC8~D
P8
IN+
5
IN-
6
G
4
O7
R557
5.1_0402_1%~D
12
C753
10U_0805_10V4Z~D
1
2
C741
100P_0402_50V8J~D
@
1
2
C743
1U_0603_10V4Z~D
1
2
C906
47P_0402_50V8J~D
@
1
2
C735
100P_0402_50V8J~D
1
2
R566
1K_0402_5%~D
12
R585 0_0402_5%~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LOM_SI
LOM_CS#
CLK_PCIE_LOM#
GLAN_RXN_C
LAN_TX0+
LAN_TX3+
LPC_LAD3
LAN_TX3-
CLK_PCIE_LOM
GLAN_RXP_C
LOM_SCLK
LOM_ACTLED_YEL#
LAN_TX2+
NV_STRAP0
TPM_GPIO0
XTALI
LAN_TX1-
LOM_SI
LPC_LAD0
CLK_PCI_TPM
REGCTL_PNP25
IRQ_SERIRQ
LOM_SCLK
TPM_GPIO1
TPM_GPIO2
CLK_PCI_TPM
LOM_SO
LOM_SPD100LED_ORG#
LOM_CS#
LOM_SO
LPC_LAD1
LAN_TX0-
PCIE_WAKE#
LPC_LAD2 LAN_TX2-
XTALO
LOM_SPD10LED_GRN#
REGCTL_PNP12
LAN_TX1+
REGCTL_PNP25
REGCTL_PNP12
PHYTVCOI
LOM_LOW_PWR
GPIO1_SERIAL_DI
LOM_LOW_PWR GPIO2_SERIAL_DO
LOM_SMB_ALERT#
GPIO1_SERIAL_DI
PLTRST3#
LPC_LFRAME#
PLTRST3#LOM_RST_R#
+3.3V_LAN
+PCIE_PLLVDD
+AVDD
+3.3V_LAN
+GPHY_PLLVDD
+AVDDL
+GPHY_PLLVDD
+PCIE_PLLVDD
+PCIE_SDS_VDD
+1.2V_LAN
+BIASVDD
+XTALVDD
+2.5V_LAN
+AVDD
+2.5V_LAN
+1.2V_LAN
+AVDDL
+3.3V_LAN
+2.5V_LAN
+1.2V_LAN
+3.3V_LAN
+3.3V_RUN
+PCIE_SDS_VDD
+BIASVDD
+3.3V_LAN
+1.2V_LAN
+XTALVDD
+2.5V_LAN
+3.3V_LAN
+3.3V_LAN
+3.3V_LAN
+3.3V_LAN
+2.5V_LAN
+1.2V_LAN
+3.3V_LAN
+3.3V_LAN
+3.3V_LAN
+3.3V_LAN
+3.3V_ALW
LAN_TX3- 29
LAN_TX1- 29
LAN_TX3+ 29
LAN_TX2- 29
LAN_TX1+ 29
PCIE_RX6+/GLAN_RX+ 23
PCIE_RX6-/GLAN_RX- 23
LAN_TX2+ 29
LOM_ACTLED_YEL#29
LOM_SPD10LED_GRN#29 LOM_SPD100LED_ORG#29
CLK_PCI_TPM6
ICH_SMBCLK23,34 ICH_SMBDATA23,34
IRQ_SERIRQ23,30,38,39
LPC_LAD[0..3]22,38,39
LOM_TPM_EN#38
LOM_SUPER_IDDQ 38
LOM_CLKREQ# 6
CLK_PCIE_LOM 6
LAN_TX0+ 29
LOM_LOW_PWR 38
CLK_PCIE_LOM# 6
PCIE_TX6-/GLAN_TX- 23
LAN_TX0- 29
PCIE_WAKE# 34,38
PCIE_TX6+/GLAN_TX+ 23
LOM_CABLE_DETECT38
LOM_SMB_ALERT#23,39
LPC_LFRAME#22,38,39 PLTRST3#21,34
PLTRST3# 21,34
SB_LOM_PCIE_RST# 21
ENAB_3VLAN41
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
BCM5755M
28 58Monday, February 26, 2007
Compal Electronics, Inc.
1
C
4
MMJT9435
B
C
2
3
E
Layout Notice : 1.2V filter. Place as close
chip as possible.
Layout Notice : Place as close
chip as possible.
Layout Notice : No high
speed signal should be
routed near RDAC or on
adjacent layer to RDAC
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Place closely pin J8
R7, R9 are 1/2 W rating
Logic High Voltage must
be 0.7V to 2.75V
Need to ensure
crystal at least
300uW max power
drive-level
LOM_CABLE_DETECT goes to an input on a system microcontroller that can
poll this signal periodically and can de-assert the LOM_LOW_PWR when
LOM_CABLE_DETECT signal is high. Connect to an EC GPIOC defined by the
GPIO mapping.
Reserved for BCM5752
as back-up solution
Atmel AT45BCM021B
ST M45PE20
0
01
10
10
0
1
11
0
(Default)
SCLK
00
00Auto-Sense Mode 0 0
NV_STRAP1 NV_STRAP0 SO CS#SI
Place R666 as
close to the ASIC
as possible. Pad
is needed to
measure 125MHz
clock for
debugging
Monitor GPHY PLL Clk
R646, R648, R649 Reserved for
BCM5752 as back-up solution
DELL CONFIDENTIAL/PROPRIETARY
R657 4.7K_0402_5%~D@
1 2
C845
0.1U_0402_16V4Z~D
1
2
R659
200_0402_1%~D
12
C834
0.1U_0402_16V4Z~D
1
2
C842
0.1U_0402_16V4Z~D
1
2
S
G
D
Q44
SI3456BDV-T1-E3_TSOP6~D
3
6
245
1
C826
0.1U_0402_16V4Z~D
1
2
Q71
PBSS5540Z_SOT223-3~D
1
2 3
4
R646 10K_0402_5%~D
@
12
U44
M45PE20-VMN6TP_SO8~D
D1
C2
RESET# 3
S# 4
Q
8
VSS
7
VCC
6
W#
5
R649 10K_0402_5%~D
@
12
R5810_0402_5%~D
12
C830
0.1U_0402_16V4Z~D
1
2
C827
4.7U_0603_6.3V4Z~D
1
2
R421
4.7K_0402_5%~D
12
C847
0.1U_0402_16V4Z~D
1
2
C831
0.1U_0402_16V4Z~D
1
2
C860
0.1U_0402_16V4Z~D
1
2
C853
0.1U_0402_10V7K~D
1 2
C863
4.7U_0603_6.3V4Z~D
1
2
R670
4.7K_0402_5%~D
@
12
R663
4.7K_0402_5%~D
@1 2
C849
1000P_0402_50V7K~D
1
2
C859
4.7U_0603_6.3V4Z~D
1
2
C629
4.7U_0603_6.3V4Z~D
@
1
2
C846
10U_0805_10V4Z~D
1
2
C864
0.1U_0402_16V4Z~D
1
2
C858
47P_0402_50V8J~D
1
2
C843
10U_0805_10V4Z~D
1
2
R422
1K_0402_5%~D
1 2
C829
0.1U_0402_16V4Z~D
1
2
R644
2_1210_5%~D
12
C771
0.047U_0402_16V4Z~D
@
1
2
C857
4.7U_0603_6.3V4Z~D
1
2
R648 10K_0402_5%~D
@
12
C865
0.1U_0402_16V4Z~D
1
2
R647
20K_0402_5%~D
12
C854
22P_0402_50V8J~D
@
1
2
C855
4.7U_0603_6.3V4Z~D
1
2
R665
4.7K_0402_5%~D
@
12
C309
4.7U_0603_6.3V4Z~D
1
2
C851
0.1U_0402_10V7K~D
1 2
C848
0.1U_0402_16V4Z~D
1
2
L63
BK2125LM182-T_0805~D
12
C836
4.7U_0603_6.3V4Z~D
1
2
LPC/TPM
Media
GPIO
BCM5755M
PowerPCI-ETEST
LED
Bias
Clock
Control
Regulator
Control
SPI
SMBUS
U38A
BCM5755M_FBGA144~D
TRD3+ B11
TRD3- B12
TRD2+ C11
TRD2- C12
TRD1+ D11
TRD1- D12
TRD0+ E11
TRD0- E12
LCLK
J8
LAD0
J7
LAD1
L10
LAD2
J5
LAD3
K9
LFRAME
J9
LRESET
M10
SERIRQ
H7
GPIO0
H9
GPIO1_SERIAL_DI
H11
GPIO2_SERIAL_DO
C5
SMB_CLK
C8
SMB_DATA
C7
NC J1
NC M4
SI
E10 SCLK
C9
SO
D9
CS
C10
PERST B1
REGCTL12 J11
REGCTL25 M11
REGSEN25 M12
LINKLED
A9
SPD100LED
B9
SPD1000LED
A10
TRAFFICLED
B8
PCIE_TXDN M3
PCIE_TXDP L3
PCIE_RXDN L7
PCIE_RXDP M7
WAKE A4
REFCLK- L5
REFCLK+ M5
VAUXPRSNT B6
TCK B5
TDI F3
TDO B4
TMS E3
TRST D4
RDAC A8
XTALI
L9
XTALO
M9
REFCLK_SEL B3
LOW_PWR H4
REGSUP12 K12
REGSEN12 J12
EnergyDet
C4
GPHY_TVCOI C6
TPM_GPIO0
G4
TPM_GPIO2/TPM_STATUS
H3 TPM_GPIO1
J3
TPM_EN
J6 VMAINPRSNT G11
NV_STRAP1
M1 NV_STRAP0
M2
REGSUP25 L12
Super_Low_PWR K5
CLKREQ# F2
R653 4.7K_0402_5%~D@12
R656 0_0402_5%~D
1 2
C861
22P_0402_50V8J~D
1
2
C824
0.1U_0402_16V4Z~D
1
2
C772
0.047U_0402_16V4Z~D
@
1
2
L65
BK2125LM182-T_0805~D
12
R5820_0402_5%~D @
12
C840
0.1U_0402_16V4Z~D
1
2
C833
0.1U_0402_16V4Z~D
1
2
C838
0.1U_0402_16V4Z~D
1
2
R488
0_0402_5%~D@
1 2
R666 0_0402_5%~D@1 2
R658
4.7K_0402_5%~D
@
1 2
R643
2_1210_5%~D
12
R415
4.7K_0402_5%~D
12
C852
47P_0402_50V8J~D
1
2
U45
AT45BCM021B-SU_SO8~D
@
SI 1
SCK 2
RESET# 3
CS# 4
SO
8
GND
7
VCC
6
WP#
5
L66
BK1608LM182-T_0603~D
12
C850
47P_0402_50V8J~D
1
2
L88
BK1608LM182-T_0603~D
12
Y5
25MHZ_18PF_1BX25000CK1D~D
1 2
L67
BK1608LM182-T_0603~D
12
C856
47P_0402_50V8J~D
1
2
C832
0.1U_0402_16V4Z~D
1
2
C828
0.1U_0402_16V4Z~D
1
2
C862
22P_0402_50V8J~D
1
2
R650 1K_0402_5%~D
12
R664
4.7K_0402_5%~D
@
12
R669
1.13K_0402_1%~D
1 2
BCM5755M
Analog
power
PLL
GND
Digial power
BIAS
U38B
BCM5755M_FBGA144~D
VDDC_0
D5
VDDC_4
H5
VDDC_5
H6
VDDC_6
H8
VDDC_7
J4
VDDIO_3
F1
VDDIO_4
G10
VDDIO_5
J2
VDDIO_6
L1
VSS_4 E6
VSS_5 E7
VSS_6 E8
VSS_7 E9
VSS_8 F4
VSS_9 F5
VSS_10 F6
VSS_11 F7
VSS_12 F8
VSS_13 F9
VSS_14 G5
VSS_15 G6
VSS_16 G7
VSS_17 G8
VSS_18 L2
VSS_19 L6
VSS_20 M6
DC_7 D2
DC_8 D3
DC_9 E1
DC_10 G2
DC_11 H2
VDDC_3
D8 VDDC_2
D7 VDDC_1
D6
VSS_3 E5
VSS_2 E4
VSS_1 B10
VSS_0 B2
DC_18 L8
VDDP_0
A5
VDDP_1
G3
VDDP_2
L11
XTALVDD
H12
PCIE_SDSVDD
K4
AVDDL_0
F10
AVDDL_1
F11
AVDD_0
A11
AVDD_1
F12
PCIE_PLLVDD
K6
GPHY_PLLVDD
G12
BIASVDD
A12
DC_12 K1
DC_0 A1
DC_1 A6
DC_2 A7
DC_3 B7
DC_4 C1
DC_5 C3
DC_6 D1
DC_13 K2
DC_14 K3
DC_15 K7
DC_16 K8
DC_17 L4
NC_0 A2
NC_1 E2
NC_2 G1
NC_3 G9
NC_4 H1
NC_5 H10
NC_6 J10
NC_7 K10
NC_8 K11
VDDIO_0
A3
VDDIO_1
C2
VDDIO_2
D10
DC_19 M8
C825
4.7U_0603_6.3V4Z~D
1
2
R654
33_0402_5%~D
@
12
Q70
MBT35200MT1G_TSOP6~D
3
41
2
5
6
C837
0.1U_0402_16V4Z~D
1
2
C835
0.1U_0402_16V4Z~D
1
2
R652 1K_0402_5%~D
12 R276
39K_0402_5%~D
12
R651 0_0402_5%~D 12
C316
0.1U_0402_16V4Z~D
1
2
R655
4.7K_0402_5%~D
@
1 2
L68
BK1608LM182-T_0603~D
12
R661
4.7K_0402_5%~D
@1 2
L64
BK1608LM182-T_0603~D
12
C839
0.1U_0402_16V4Z~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DOCKED
LAN_TX0- LAN_TX0-R
LAN_TX0+ LAN_TX0+R
LAN_TX1- LAN_TX1-R
LAN_TX1+ LAN_TX1+R
LAN_TX2- LAN_TX2-R
LAN_TX2+ LAN_TX2+R
LAN_TX3- LAN_TX3-R
LAN_TX3+ LAN_TX3+R
SW_LAN_TX3+
SW_LAN_TX3-
SW_LAN_TX2+
SW_LAN_TX2-
SW_LAN_TX1+
SW_LAN_TX1-
SW_LAN_TX0+
SW_LAN_TX0-
DOCK_LAN_TX0-
DOCK_LAN_TX1-
DOCK_LAN_TX1+
LINK_LED100#
DOCK_LAN_TX0+
DOCK_LAN_TX2+
DOCK_LAN_TX3+
DOCK_LAN_TX3-
DOCK_LAN_TX2-
LOM_ACTLED_YEL#
LOM_SPD100LED_ORG#
LINK_LED10#
LINK_LED100#
LAN_LEDACT# LAN_ACTLED_YEL_R#
LED_10_GRN_R#
LED_100_ORG_R#
LAN_TX3-
LAN_TX3+
LAN_TX2-
LAN_TX2+
LAN_TX1+
LAN_TX0+
LAN_TX0-
LAN_TX1-
LOM_SPD10LED_GRN#
LINK_LED10#
LAN_LEDACT#
DOCK_LOM_SPD100LED_ORG#
DOCK_LOM_SPD10LED_GRN#
DOCK_LOM_ACTLED_YEL#
+3.3V_LAN
+3.3V_LAN
DOCKED36,38
LAN_TX0-28
LAN_TX0+28
LAN_TX1-28
LAN_TX1+28
LAN_TX2-28
LAN_TX2+28
LAN_TX3-28
LAN_TX3+28
LOM_ACTLED_YEL#28 LOM_SPD10LED_GRN#28 LOM_SPD100LED_ORG#28
DOCK_LAN_TX0- 36
DOCK_LAN_TX1- 36
DOCK_LAN_TX1+ 36
DOCK_LAN_TX0+ 36
DOCK_LAN_TX2+ 36
DOCK_LAN_TX3+ 36
DOCK_LAN_TX2- 36
DOCK_LAN_TX3- 36
SW_LAN_TX0+ 32
SW_LAN_TX0- 32
SW_LAN_TX1+ 32
SW_LAN_TX1- 32
SW_LAN_TX2+ 32
SW_LAN_TX2- 32
SW_LAN_TX3+ 32
SW_LAN_TX3- 32
LAN_ACTLED_YEL_R# 32
LED_10_GRN_R# 32
LED_100_ORG_R# 32
DOCK_LOM_ACTLED_YEL# 36
DOCK_LOM_SPD10LED_GRN# 36
DOCK_LOM_SPD100LED_ORG# 36
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
LAN TRANSFOMER
29 58Monday, February 26, 2007
Compal Electronics, Inc.
TO
DOCK
FROM NIC DOCKED 1: TO DOCK
0: TO RJ45
LAN ANALOG
SWITCH
Layout Notice : Place bead as
close PI3L500 as possible
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Layout Notice : Place
termination as close as
ASIC as possible
The resistors need at
least 1/16W
DELL CONFIDENTIAL/PROPRIETARY
L69 36NH_0603CS-360EJTS_5%_0603~D
1 2
R673 49.9_0402_1%~D@
1 2
R683
110_0402_5%~D
1 2
R677 49.9_0402_1%~D@
1 2
C867 0.1U_0402_16V4Z~D @ 1 2
R684
200_0402_5%~D
1 2
R682
150_0402_5%~D
1 2
C868 0.1U_0402_16V4Z~D@ 1 2
U46
PI3L500-AZFEX_TQFN56~D
SEL
17
A0
2
A1
3
A2
7
A3
8
A4
11
A5
12
A6
14
0B1 48
0B2 46
1B1 47
1B2 45
2B1 43
2B2 41
3B1 42
3B2 40
4B1 37
4B2 35
5B1 36
5B2 34
6B1 32
6B2 30
7B1 31
7B2 29
A7
15
LED0
19
LED1
20
LED2
54
0LED1 22
0LED2 25
1LED1 23
1LED2 26
2LED1 52
2LED2 51
PAD_GND
57
VDD0 4
VDD1 10
VDD2 18
VDD3 27
VDD4 38
VDD5 50
VDD6 56
GND0
1
GND1
6
GND2
9
GND3
13
GND4
16
GND5
21
GND6
24
GND7
28
GND8
33
GND9
39
GND10
44
GND11
49
GND12
53
GND13
55
NC
5
L75 36NH_0603CS-360EJTS_5%_0603~D
1 2
L70 36NH_0603CS-360EJTS_5%_0603~D
1 2
L76 36NH_0603CS-360EJTS_5%_0603~D
1 2
R680
10K_0402_5%~D
@
12
R672 49.9_0402_1%~D@
1 2
R681
10K_0402_5%~D
@
12
L71 36NH_0603CS-360EJTS_5%_0603~D
1 2
R678 49.9_0402_1%~D@
1 2
L74 36NH_0603CS-360EJTS_5%_0603~D
1 2
R674 49.9_0402_1%~D@
1 2
L72 36NH_0603CS-360EJTS_5%_0603~D
1 2
R675 49.9_0402_1%~D@
1 2
C866 0.1U_0402_16V4Z~D@1 2
R676 49.9_0402_1%~D@
1 2
L73 36NH_0603CS-360EJTS_5%_0603~D
1 2
C869 0.1U_0402_16V4Z~D@1 2
R671 49.9_0402_1%~D @
1 2
R679
10K_0402_5%~D
@
12
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CBS_CCLK
PCI_AD17
PCI_AD4
PCI_RST#
PCI_C_BE0#
PCI_IRDY#
PCI_AD8
CBS_RSVD/D2
CBS_CGNT#
CBS_CSTSCHNG
CBS_CSERR#
CBS_CPAR
CBS_CC/BE1#
CBS_CSTOP#
CBS_CC/BE0#
CBS_CPERR#
PCI_C_BE2#
PCI_AD9
PCI_AD18
PCI_AD24
PCI_AD31
PCI_DEVSEL#
PCI_C_BE1#
PCI_AD14
PCI_AD23
PCI_AD25
PCI_AD0
PCI_AD3
PCI_AD29
CLK_PCI_PCM
PCI_AD20
PCI_AD7
PCI_PIRQD#
PCI_C_BE3#
PCI_AD30
PCI_PAR
PCI_TRDY#
PCI_AD22
PCI_AD6
PCI_AD19
CBS_CCD1#
CBS_CVS2
CBS_IDSEL
PCI_AD2
PCI_FRAME#
PCI_AD27
CBS_CDEVSEL#
PCI_AD5
CBS_CBLOCK#
CBS_CC/BE2#
CBS_CCD2#
PCI_AD11
PCI_AD10
PCI_AD12
PCI_AD26
PCI_AD1
PCI_AD13
CBS_CREQ#
CBS_CC/BE3#
CBS_RSVD/A18
CBS_CFRAME#
CLKRUN#
CBS_CTRDY#
PCI_AD16
CBS_CINT#
CBS_CCLKRUN#
CBS_CRST#
CBS_CVS1
PCI_AD17
PCI_AD28
CBS_CIRDY#
PCI_GNT1#
PCI_AD15
PCI_AD21
PCI_STOP#
PCI_PERR#
PCI_REQ1#
IRQ_SERIRQ
CBS_CAD7
CBS_CAD1
CBS_CAD25
CBS_CAD0
CBS_CAD2
CBS_CAD28
CBS_CAD21
CBS_CAD9
CBS_CAD30
CBS_CAD31
CBS_CAD20
CBS_CAD12
CBS_CAD27
CBS_CAD4
CBS_CAD10
CBS_CAD18
CBS_CAD8
CBS_CAD11
CBS_CAD29
CBS_CAD24
CBS_CAD3
CBS_CAD15
CBS_CAD26
CBS_CAD23
CBS_CAD22
CBS_CAD19
CBS_CAD17
CBS_CAD16
CBS_CAD14
CBS_CAD13
CBS_CAD6
CBS_CAD5
CLK_PCI_PCM
CBS_CAD0
CBS_CINT#
CBS_CAD5
CBS_CAD3
CBS_CAD1
CBS_CCLK
CBS_CCLKRUN#
CBS_CAD11
CBS_CAD9
CBS_CAD7
CBS_CAD14
CBS_CAD21
CBS_CAD20
CBS_CAD18
CBS_CAD12
CBS_CAD22
CBS_CAD25
CBS_CAD24
CBS_CAD27
CBS_CAD23
CBS_CAD26
CBS_CC/BE2#
CBS_CC/BE1#
CBS_CC/BE0#
CBS_CAD29
CBS_CPAR
CBS_CIRDY#
CBS_RSVD/D2
CBS_CPERR#
CBS_CGNT#
CBS_RSVD/D14
CBS_CAD2
CBS_CCD1#
CBS_CAD4
CBS_CAD6
CBS_CAD8
CBS_CVS1
CBS_CAD15
CBS_CAD13
CBS_CAD13
CBS_CAD10
CBS_CCD2#
CBS_CAD30
CBS_CAD31
CBS_CSTSCHNG
CBS_CAD28
CBS_CRST#
CBS_CC/BE3#
CBS_CSERR#
CBS_CREQ#
CBS_CVS2
CBS_CAD17
CBS_CAD19
CBS_CTRDY#
CBS_CFRAME#
CBS_CSTOP#
CBS_CDEVSEL#
CBS_CBLOCK#
CBS_CAD16
CBS_RSVD/A18
USBP6-
CBS_RSVD/D14
PCI_SERR#
PCI_RST#
CLK_PCI_PCM
TPA0-
TPBIAS0
TPA0+
TPB0+
TPB0-
CBS_CAD15
USBP6+
TPB0_D+
TPA0_D-
TPA0_D+
TPB0_D-
+3.3V_RUN
+5V_RUN +3.3V_RUN
+CBS_VCC
+CBS_VCC +CBS_VCC
+3.3V_RUN
+OZ1.8V_RUN
SYS_PME#35,38
PCI_PIRQD#21
IRQ_SERIRQ23,28,38,39
CLKRUN#23,38,39
PCI_AD[0..31]21,35
PCI_C_BE3#21,35
PCI_C_BE1#21,35 PCI_C_BE0#21,35
PCI_C_BE2#21,35
PCI_PAR21,35
PCI_PERR#21,35
PCI_REQ1#21 PCI_GNT1#21 PCI_RST#21,31,35
CLK_PCI_PCM6
PCI_DEVSEL#21,35 PCI_FRAME#21,35,36 PCI_IRDY#21,35,36 PCI_TRDY#21,35 PCI_STOP#21,35
USBP6- 23
PCI_SERR#21,35
USBP6+ 23
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
Cardbus and 1394 OZ711EZ1 Controller
30 58Monday, February 26, 2007
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Place closely pin 45
Layout Note: Place close to 1394 connector
Ground pin 129 exposed die pad, dimension
5.72mm x 5.72mm, should connect to PCB solder
pad of same dimension DELL CONFIDENTIAL/PROPRIETARY
L61 DLW21SN121SQ2_0805~D@
1
1
4
433
22
R603
5.9K_0402_1%~D
1 2
R615
100_0402_5%~D
1 2
C791
0.1U_0402_16V4Z~D
1
2
OZ711EZ1
U42
OZ711EZ1TN C_E-LQFP128_16X16~D
CORE_3.3
11
CORE_3.3
97
PCI_VCC
26
PCI_VCC
56
CORE_3.3A
65
CORE_3.3A
68
CORE_3.3A
73
CORE_1.8 16
CORE_1.8 82
EPSI 8
AD31
19
AD30
20
AD29
21
AD28
22
AD27
23
AD26
24
AD25
25
AD24
27
AD23
29
AD22
30
AD21
31
AD20
32
AD19
34
AD18
35
AD17
36
AD16
37
AD15
47
AD14
48
AD13
49
AD12
50
AD11
51
AD10
52
AD9
53
AD8
54
AD7
57
AD6
58
AD5
59
AD4
60
AD3
61
AD2
62
AD1
63
AD0
64
C/BE3#
28
C/BE2#
38
C/BE1#
46
C/BE0#
55
IDSEL
9
PCI_CLK
45
DEVSEL#
42
FRAME#
39
IRDY#
40
TRDY#
41
STOP#
43
PAR
44
REQ#
17
GNT#
18
PCI_RST#
5
PME#
7
SERIRQ
6
GND
33
GND
108
REF 72
XI 74
XO 75
BIAS 71
TPA+ 70
TPA- 69
TPB+ 67
TPB- 66
CAD31 3
CAD30 1
CAD29 128
CAD28 127
CAD27 126
CAD26 125
CAD25 124
CAD24 122
CAD23 120
CAD22 118
CAD21 116
CAD20 115
CAD19 114
CAD18 113
CAD17 112
CAD16 96
CAD15 94
CAD14 93
CAD13 92
CAD12 91
CAD11 90
CAD10 89
CAD9 88
CAD8 87
CAD7 84
CAD6 83
CAD5 81
CAD4 80
CAD3 79
CAD2 78
CAD1 77
CAD0 76
CCLK 106
CFRAME# 110
CIRDY# 109
CTRDY# 107
CDEVSEL# 105
CSTOP# 103
CPAR 98
CPERR# 100
CSERR# 119
CREQ# 121
CGNT# 102
CINT# 104
CBLOCK# 101
CCLKRUN# 4
CRST# 117
R2_D2 2
R2_D14 85
R2_A18 99
CVS1 12
CVS2 15
CCD1# 10
CCD2# 14
CSTSCHG 13
CC/BE3# 123
CC/BE2# 111
CC/BE1# 95
CC/BE0# 86
GND
129
R610
10_0402_5%~D
@
12
R602 33_0402_5%~D
L60
BLM18AG121SN1D_0603~D
1 2
C800
0.1U_0402_16V4Z~D
1
2
C808
4.7P_0402_50V8C~D
@
1
2
R604
0_0402_5%~D
1 2
C793
4.7U_0603_6.3V4Z~D
1
2
C795
0.1U_0402_16V4Z~D
1
2
R114 0_0402_5%~D 1 2
C792
0.1U_0402_16V4Z~D
1
2
C804
0.1U_0402_16V4Z~D
1
2
R609
56.2_0402_1%~D
12
R608
56.2_0402_1%~D
12
C810
0.1U_0402_16V4Z~D
1
2
C823
12P_0402_50V8J~D
1 2
C798
0.1U_0402_16V4Z~D
1
2
C797
4.7U_0603_6.3V4Z~D
1
2
C807
1U_0603_10V4Z~D
1
2
JCBUS
TYCO_1734648-1~D
GND1
1
A_CAD0
2
A_CAD1
3
A_CAD3
4
A_CAD5
5
A_CAD7
6
A_PCI_C/BE0#
7
GND2
8
A_CAD9
9
A_CAD11
10
A_CAD12
11
GND3
12
A_CAD14
13
A_PCI_C/BE1#
14
A_CPAR
15
GND4
16
A_CPERR#
17
A_CGNT#
18
A_CINT#
19
+AVCC0
20
+AVPP0
21
A_CCLK
22
A_CIRDY
23
A_PCI_C/BE2#
24
GND5
27
A_CAD18
25
A_CAD20
26
A_CAD21
28
A_CAD22
29
GND6
32
A_CAD23
30
A_CAD24
31
A_CAD25
33
A_CAD26
34
GND7
36 A_CAD27
35
A_CAD29
37
CB_A_D2
38
A_CCLKRUN#
39
GND8
40
A_CCD1# 42
A_CAD2 43
A_CAD4 44
A_CAD6 45
GND10 48
CB_A_D14 46
A_CAD8 47
A_CAD10 49
A_CVS1 50
GND11 52
A_CAD13 51
A_CAD15 53
A_CAD16 54
CB_A_A18 55
GND12 56
A_CBLOCK# 57
A_CSTOP# 58
A_CDEVSEL# 59
+AVCC1 60
+AVPP1 61
A_CTRDY# 62
A_CFRAME# 63
A_CAD17 64
GND13 67
A_CAD19 65
A_CVS2 66
A_CRST# 68
A_CSERR# 69
GND14 72
A_CREQ# 70
A_PCI_C/BE3# 71
A_CAUDIO 73
A_CSTSCHG 74
GND15 76
A_CAD28 75
A_CAD30 77
A_CAD31 78
A_CCD2# 79
GND9 41
GND16 80
C796
0.1U_0402_16V4Z~D
1
2
R614 0_0402_5%~D
L62 DLW21SN121SQ2_0805~D@
1
1
4
433
22
X2 24.576MHz_16P_1BG24576CKIA~D
1 2
C790
4.7U_0603_6.3V4Z~D
1
2
R642
56.2_0402_1%~D
12
R613
5.11K_0402_1%~D
1 2
U41
OZ2532SN_SSOP20~D
CLK
2
PERR#
7
SERR#
8
RST#
10
CLKRUN#
6
INTA#
3
SKT_LED
9
1.8VOUT
19
EPSI
1
GND
20
+5V 16
+5V 15
+3.3V 18
+3.3V 17
VCC/VPP 5
VCC/VPP 4
USB_A0 14
USB_B0 13
USB_A1 12
USB_B1 11
C806
12P_0402_50V8J~D
1 2
C809
0.1U_0402_16V4Z~D
1
2
C794
4.7U_0603_6.3V4Z~D
1
2
C803
0.1U_0402_16V4Z~D
1
2
J1394
TYCO_2-1775815-2~D
TPA+
4
TPA-
3
TPB+
2
TPB-
1
GND 5
GND 6
GND 7
GND 8
R611
0_0402_5%~D
1 2
R607
56.2_0402_1%~D
12
R612
0_0402_5%~D
1 2
C801
0.1U_0402_16V4Z~D
1
2
C805
270P_0402_50V7K~D
1
2
C802
4.7U_0603_6.3V4Z~D
1
2
R606
0_0402_5%~D
1 2
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_SMC_48M
MD0
PCI_RST#
CLK_SMC_48M
USBP4-
USBP4+
SC_CLK
SC_DET#
SCCD-
SCCD+
SC_IO
+SC_PWR
SC_RST#
SC_C4 SCCD+
SCCD-
+5V_RUN
+SC_PWR
+3.3V_RUN
+3.3V_RUN
CLK_SMC_48M6
PCI_RST#21,30,35
USBP4-23 USBP4+23
SC_USBP+25 SC_USBP-25
SC_DET# 38
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
Smart Card OZ77CR6
31 58Monday, February 26, 2007
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
USB SMARTCARD READER.
& USB SMARTCARDS ARE SUPPORTED.
TYPE A (5V), B (3V), AB (5V/3V)
Place closely pin 3
R126 33_0402_5%~D
12
R257
15K_0402_5%~D
12
C448
0.1U_0402_16V4Z~D
1
2
C446
4.7U_0603_6.3V4Z~D
1
2
C91
0.1U_0402_16V4Z~D
1
2
R259
4.7K_0402_5%~D
12
R296
15K_0402_5%~D
12
R263
10K_0402_5%~D
12
R130 220_0402_5%~D
12
T40PAD~D
R252
1.5K_0402_1%~D
12
R256
15K_0402_5%~D
12
C129
1U_0603_10V4Z~D
1
2
T41PAD~D
C441
4.7U_0603_6.3V4Z~D
1
2
R255
15K_0402_5%~D
12
R125 220_0402_5%~D
12
C432
4.7P_0402_50V8C~D
@1
2
C435
0.1U_0402_16V4Z~D
1
2
R264
15K_0402_5%~D
12
C428
4.7U_0603_6.3V4Z~D
1
2
C442
0.1U_0402_16V4Z~D
1
2
U26
OZ77CR6LN_QFN32~D
VCC5V_IN0
5
VCC5V_IN1
28
UPD-
17
UPD+
16
RST#
12
NC2 30
NC3 31
XI/48M_IN
3
XO
4
MODE0/LED#
32
MODE1
1
MODE2
2GND1 11
GND2 26
GND0 9
3V_CPR 29
DPD-
19
DPD+
18
EGATED- 21
EGATED+ 20
SC_VCC 27
SC_RST# 24
SC_CLK 23
SC_C4 22
SC_IO 25
SC_DET# 13
3.3VCC
8
NC1 7
RFIO1
15 RFIO0
14
VR_CPR0 6
VR_CPR1 10
C425
1U_0603_10V4Z~D
1 2
R258
10_0402_5%~D
@
12
C305 1U_0603_10V4Z~D
1 2
R260 220_0402_5%~D
12
R129
47K_0402_5%~D
12
R251
15K_0402_5%~D
12
C443
0.1U_0402_16V4Z~D
1
2
JSC
MOLEX_52207-1085~D
1
12
23
34
45
56
67
78
89
910
10
GND
11 GND
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LED_10_GRN_R#
LED_100_ORG_R#
LAN_ACTLED_YEL_R#
SW_LAN_TX0+
SW_LAN_TX1+
SW_LAN_TX1-
SW_LAN_TX0-
SW_LAN_TX2+
SW_LAN_TX3-
SW_LAN_TX3+
SW_LAN_TX2-
USBP2_D+
USBP2_D-
USBP3_D-
USBP3_D+
HDD_LED
USBP1-
USBP1+
BATT_GREEN_LED
BATT_AMBER_LED
BREATH_GREEN_LED
R_BT_ACT
R_MPCI_ACT
USBP0-
USBP0+
USBP0+
USBP0-
USBP1+
USBP1-
USB_OC2_3#
USB_OC0_1#
USB_SIDE_EN#
USB_BACK_EN#
USBP2+
USBP3-
USBP3+
USBP2-
USBP2_D+
USBP3_D-
USBP3_D+
USBP2_D-
+USB_BACK_PWR
+USB_BACK_PWR
+5V_ALW
+5V_ALW
+USB_SIDE_PWR
+3.3V_LAN
+USB_SIDE_PWR
+2.5V_LAN
+USB_SIDE_PWR +USB_BACK_PWR
USB_OC2_3# 23
USB_OC0_1# 23
SW_LAN_TX2+ 29
SW_LAN_TX2- 29
SW_LAN_TX3+ 29
SW_LAN_TX3- 29
LED_10_GRN_R# 29
LED_100_ORG_R# 29
LAN_ACTLED_YEL_R# 29
SW_LAN_TX0+ 29
SW_LAN_TX0- 29
SW_LAN_TX1+ 29
SW_LAN_TX1- 29
HDD_LED 43
USBP1-23 USBP1+23
BATT_GREEN_LED43 BATT_AMBER_LED43 R_BT_ACT43 R_MPCI_ACT43
BREATH_GREEN_LED43
USBP0-23 USBP0+23
AUD_INT_MIC+27 AUD_INT_MIC-27
USB_SIDE_EN#38
USB_BACK_EN#38
USBP3+23
USBP3-23
USBP2+23
USBP2-23
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
USB 2.0 Port
32 58Monday, February 26, 2007
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Rear USB Ports
Place ESD diodes as close as USB connector.
USB Port
U16
IP4220CZ6_SO6~D
@
D2+ 4
D1- 6
VCC 5
D1+
1
GND
2
D2-
3
R149
0_0402_5%~D
1 2
C169
0.1U_0402_16V4Z~D
1
2
PJP3
PAD-OPEN1x1m
1 2
L13 DLW21SN900SQ2_0805~D@
1
1
4
433
22
C170
10U_0805_10V4Z~D
@
1
2
FUSE5
L0603
@
1 2
R148
0_0402_5%~D
1 2
L12 DLW21SN900SQ2_0805~D@
1
1
4
433
22
+
C168
150U_D2_6.3VM~D
1
2
C8
0.1U_0402_16V4Z~D
1
2
JUSB1
FOX_UB9112C-SB201-4F~D
A_VCC
1
A_D-
2
A_D+
3
A_GND
4
B_VCC
5
B_D-
6
B_D+
7
B_GND
8
G1
9
G2
10
G3
11
G4
12
R147
0_0402_5%~D
1 2
R150
0_0402_5%~D
1 2
PJP4
PAD-OPEN1x1m
1 2
U2
IP4220CZ6_SO6~D
@
D2+ 4
D1- 6
VCC 5
D1+
1
GND
2
D2-
3
FUSE2
LF453
@
1 2
C3
0.1U_0402_16V4Z~D
1
2
C1
10U_0805_10V4Z~D
@
1
2
U1
TPS2062DR_SO8~D
GND
1
IN
2
EN1#
3
EN2#
4
OC1# 8
OUT1 7
OUT2 6
OC2# 5
FUSE4
L0603
@
1 2
C2
0.1U_0402_16V4Z~D
1
2
C9
0.1U_0402_16V4Z~D
1
2
JIO
TYCO_3-1775014-0~D
1
122
3
344
5
566
7
788
9
910 10
12 12
14 14
11
11
13
13
15
15 16 16
17
17 18 18
19
19 20 20
21
21 22 22
23
23 24 24
25
25 26 26
27
27
29
29 28 28
30 30
GND
31
GND
32
GND
33
GND 34
GND 35
GND 36
U4
TPS2062DR_SO8~D
GND
1
IN
2
EN1#
3
EN2#
4
OC1# 8
OUT1 7
OUT2 6
OC2# 5
FUSE1
LF453
@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ICH_AZ_MDC_BITCLK
ICH_AZ_MDC_SYNC
ICH_AZ_MDC_SDOUT
ICH_AC_SDOUT_MDCTERM
ICH_AZ_MDC_SDOUT
MDC_AC_BITCLK_TERM
MDC_SDIN
ICH_AZ_MDC_BITCLK
ICH_RST_MDC_R#
ICH_RST_MDC_R#
+3.3V_SUS
+5V_SUS
ICH_AZ_MDC_SYNC22
ICH_AZ_MDC_SDIN122
ICH_AZ_MDC_BITCLK22
ICH_AZ_MDC_SDOUT22
MDC_RST_DIS#18
ICH_AZ_MDC_RST#22
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
BT PORT and MDC
33 58Monday, February 26, 2007
Compal Electronics, Inc.
1
3
5
7
9
11 12
10
8
6
4
2
GND
IAC_SDATA0
IAC_SYNC
IAC_SDATAIN
IAC_RESET#
RES
RES
3.3V
GND
GND
IAC_BITCLK
GND
New MDC connector.
W=20 mil
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
R124
10_0402_5%~D@
1 2
G
D
S
Q31
BSS138W-7-F_SOT323~D
2
1 3
R239
10K_0402_5%~D
12
C126
4.7U_0603_6.3V4Z~D
1
2
C125
0.1U_0402_16V4Z~D
1
2
C128
10P_0402_50V8J~D
1
2
R233
100K_0402_5%~D
12
C127
10P_0402_50V8J~D
@
1
2
R123
10_0402_5%~D
1 2
Connector for MDC Rev1.5
JMDC
TYCO_1-1775149-2~D
GND1
1
IAC_SDATA_OUT
3
GND2
5
IAC_SYNC
7
IAC_SDATA_IN
9
IAC_RESET#
11
RES0 2
RES1 4
3.3V 6
GND3 8
GND4 10
IAC_BITCLK 12
GND
13
GND
14
GND
15
GND
16
GND
17
GND
18
R235
0_0402_5%~D
@
1 2
R128
33_0402_5%~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USBP9_D+
ICH_SMBCLK
USBP9_D-
ICH_SMBDATA
WWAN_RADIO_DIS#
WLAN_SMBCLK
LED_WLAN_OUT#
PCIE_IRX_WLANTX_N2
PCIE_IRX_WLANTX_P2
PCIE_ITX_WLANRX_N2_C
PCIE_ITX_WLANRX_P2_C WLAN_SMBDATA
WLAN_RADIO_DIS#_R PLTRST3#
UIM_DATA
UIM_CLK
UIM_VPP
PCIE_IRX_WANTX_N1
PCIE_IRX_WANTX_P1
PCIE_ITX_WANRX_N1_C
PCIE_ITX_WANRX_P1_C
CLK_PCIE_MINI1#
CLK_PCIE_MINI1
MINI1CLK_REQ#
PLTRST3#
PCIE_WAKE#
UIM_RESET
HOST_DEBUG_RX
8051_TX
8051_RX
UIM_RESET
UIM_CLK UIM_VPP
UIM_DATA
UIM_VPP
UIM_DATA
UIM_RESET
UIM_CLK
PCIE_MCARD2_DET#
USBP9_D-
USBP9_D+
WLAN_RADIO_DIS#_R
SB_WWAN_PCIE_RST#
PLTRST3#_R
SB_WLAN_PCIE_RST#
HOST_DEBUG_TX
WLAN_PLTRST3#_R
WLAN_SMBCLK
WLAN_SMBDATA
+3.3V_RUN
+3.3V_RUN+3.3V_RUN
+3.3V_WLAN
+1.5V_RUN
+3.3V_WLAN
+SIM_PWR
+1.5V_RUN
+1.5V_RUN
+1.5V_RUN
+3.3V_RUN
+SIM_PWR
+3.3V_RUN +3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+PWR_SRC +3.3V_WLAN
+3.3V_ALW
+SIM_PWR
+3.3V_WLAN
+3.3V_WLAN
ICH_SMBCLK 23,28
ICH_SMBDATA 23,28
CLK_PCIE_MINI26
COEX1_BT_ACTIVE40 COEX2_WLAN_ACTIVE40
CLK_PCIE_MINI2#6
PCIE_IRX_WLANTX_N223 PCIE_IRX_WLANTX_P223
MINI2CLK_REQ#6
PCIE_ITX_WLANRX_N2_C23 PCIE_ITX_WLANRX_P2_C23
PCIE_IRX_WANTX_N123 PCIE_IRX_WANTX_P123
PCIE_ITX_WANRX_N1_C23 PCIE_ITX_WANRX_P1_C23
CLK_PCIE_MINI16CLK_PCIE_MINI1#6
MINI1CLK_REQ#6
PLTRST3# 21,28
PCIE_WAKE#28,38
PCIE_WAKE#28,38
WWAN_RADIO_DIS# 38
LED_WLAN_OUT# 43
BT_ACTIVE 40,43
PLTRST3# 21,28
HOST_DEBUG_TX 39
HOST_DEBUG_RX39 8051_TX39
8051_RX 39
PCIE_MCARD2_DET#21
PCIE_MCARD1_DET#23 USB_MCARD1_DET# 23
WLAN_3V_ENABLE39
WLAN_RADIO_DIS#38
USBP9-23
USBP9+23
SB_WWAN_PCIE_RST#21
USB_MCARD2_DET# 23
SB_WLAN_PCIE_RST#21
CLK_SDATA 6
CLK_SCLK 6
ICH_SMBCLK 23,28
ICH_SMBDATA 23,28
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
Mini Card
34 58Monday, February 26, 2007
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+-9%
+3.3Vaux
+3.3V
Voltage
Tolerance
+1.5V
+-9%
+-5%
PWR
Rail
Primary Power Aux Power
Peak Normal Normal
1000 750
330
500
250
375
250 (Wake enable)
5 (Not wake enable)
NA
Mini WWAN
Mini WLAN
Mini-Card Latch
Mini-Card Latch
JSIM
SUYIN_254020MA006G502ZL~D
VCC
1
RST
2
CLK
3
GND 4
VPP 5
I/O 6
NC 8
NC
7
C15
0.047U_0402_16V4Z~D
1
2
C166
0.047U_0402_16V4Z~D
1
2
C270
4700P_0402_25V7K~D
1
2
S
G
D
Q94
SI3456BDV-T1-E3_TSOP6~D
3
6
245
1
R660
0_0402_5%~D @ 1 2
C16
0.1U_0402_16V4Z~D
@
1
2
U53
SRV05-4.TCT_SOT23-6~D
2
3
1
4
6
5
C123
33P_0402_50V8J~D
1
2
G
D
S
Q45
2N7002W-7-F_SOT323-3~D
@
2
13
R550 100K_0402_5%~D 1 2
JMINI1
TYCO_1775838-1~D
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
GND1
53
22
44
66
88
10 10
12 12
14 14
16 16
18 18
20 20
22 22
24 24
26 26
28 28
30 30
32 32
34 34
36 36
38 38
40 40
42 42
44 44
46 46
48 48
50 50
52 52
GND2 54
L8 DLW21SN900SQ2_0805~D
@
1
1
4
433
22
R784
100K_0402_5%~D
12
R782
470K_0402_5%~D
12
C41
0.047U_0402_16V4Z~D
1
2
C111
22U_0805_6.3VAM~D
1
2
+
C445
330U_D2E_6.3VM_R25~D
1
2
R121
0_0402_5%~D
1 2
R549 100K_0402_5%~D
1 2
G
D
S
Q95
2N7002W-7-F_SOT323-3~D
2
13
C163
4.7U_0603_6.3V4Z~D
1
2
JCLIP2
TYCO_1775837-1~D
GND1
1
GND2
2
GND3
3
GND4
4
C449
0.047U_0402_16V4Z~D
1
2
JCLIP1
TYCO_1775837-1~D
GND1
1
GND2
2
GND3
3
GND4
4
R18
0_0402_5%~D
@
1 2
C36
0.1U_0402_16V4Z~D
1
2
C773
33P_0402_50V8J~D
1
2
R11 0_0402_5%~D@1 2
C444
33P_0402_50V8J~D
1
2
C121
33P_0402_50V8J~D
1
2
C164
0.1U_0402_16V4Z~D
1
2
C120
0.047U_0402_16V4Z~D
1
2
R597
0_0402_5%~D
12
D1
RB751S40T1_SOD523-2~D
21
R91 0_0402_5%~D
1 2
R120
0_0402_5%~D
1 2
C34
0.047U_0402_16V4Z~D
1
2
R574
100K_0402_5%~D
12
R548
100K_0402_5%~D
1 2
R640
2.2K_0402_5%~D
12
R598
0_0402_5%~D
@
12
T16 PAD~D
R599
0_0402_5%~D
@
12
R786
100K_0402_5%~D
12
R785
100K_0402_5%~D
12
R27 0_0402_5%~D
1 2
G
D
S
Q96
2N7002W-7-F_SOT323-3~D
2
13
C416
0.047U_0402_16V4Z~D
1
2
R645
2.2K_0402_5%~D
12
R600
0_0402_5%~D
12
C124
33P_0402_50V8J~D
1
2
G
D
S
Q46
2N7002W-7-F_SOT323-3~D
@
2
13
+
C283
330U_D2E_6.3VM_R25~D
1
2
C459
1U_0603_10V4Z~D
1
2
R783
200K_0402_5%~D
12
C122
33P_0402_50V8J~D
1
2
JMINI2
TYCO_1775838-1~D
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
GND1
53
22
44
66
88
10 10
12 12
14 14
16 16
18 18
20 20
22 22
24 24
26 26
28 28
30 30
32 32
34 34
36 36
38 38
40 40
42 42
44 44
46 46
48 48
50 50
52 52
GND2 54
R662
0_0402_5%~D
@
1 2
C460
33P_0402_50V8J~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
QUIETE#
DOCK_PCI_EN#
QBUFEN#
DOCK_SERR#
DOCK_LOCK#
PCI_C_BE3#
PCI_SERR#
DOCK_C_BE2#
PCI_PLOCK#
PCI_PIRQA#
PCI_AD24
DOCK_TRDY#
DOCK_PCIRST#
PCI_C_BE1# DOCK_C_BE0#
PCI_PERR#
PCI_PAR
PCI_C_BE0#
DOCK_SPME#
PCI_STOP#
DOCK_GNT0#
DOCK_PAR
DOCK_STOP#
DOCK_PIRQA#
PCI_TRDY#
SYS_PME# DOCK_C_BE3#
DOCK_DEVSEL#
PCI_IRDY#
PCI_C_BE2#
DOCK_IRDY#
PCI_FRAME#
DOCK_PCI_IDSEL
DOCK_PERR#
DOCK_FRAME#
PCI_DEVSEL#
DOCK_C_BE1#
PCI_GNT0#
PCI_RST#
PCI_AD22
+VCC_QBUFD
PCI_AD26
PCI_AD15
PCI_AD16
PCI_AD30
PCI_AD28
PCI_AD25
PCI_AD18
PCI_AD2
PCI_AD5
PCI_AD20
PCI_AD10
PCI_AD7
PCI_AD31
PCI_AD17
PCI_AD24
PCI_AD1
PCI_AD29
PCI_AD14
PCI_AD4
PCI_AD21
PCI_AD23
PCI_AD27
PCI_AD3
PCI_AD8
PCI_AD0
PCI_AD9
PCI_AD19
PCI_AD6
PCI_AD11
PCI_AD12
PCI_AD13
DOCK_AD30
DOCK_AD27
DOCK_AD18
DOCK_AD24
DOCK_AD23
DOCK_AD14
DOCK_AD6
DOCK_AD3
DOCK_AD2
DOCK_AD13
DOCK_AD26
DOCK_AD0
DOCK_AD15
DOCK_AD11
DOCK_AD1
DOCK_AD28
DOCK_AD8
DOCK_AD21
DOCK_AD25
DOCK_AD10
DOCK_AD19
DOCK_AD16
DOCK_AD22
DOCK_AD31
DOCK_AD7
DOCK_AD5
DOCK_AD20
DOCK_AD17
DOCK_AD9
DOCK_AD12
DOCK_AD29
DOCK_AD4
QUIETE#
QUIETE#
+3.3V_RUN
+5V_RUN +VCC_QBUF
DOCK_PCI_EN#36
QBUFEN#38
DOCK_PAR 36
PCI_TRDY#21,30
PCI_FRAME#21,30,36
DOCK_C_BE1# 36
SYS_PME#30,38
DOCK_TRDY# 36
PCI_DEVSEL#21,30
DOCK_GNT0# 36
DOCK_C_BE0# 36
PCI_PIRQA#21
DOCK_IRDY# 36
PCI_GNT0#21,36
DOCK_DEVSEL# 36
PCI_C_BE3#21,30
DOCK_LOCK# 36
PCI_C_BE1#21,30 DOCK_C_BE2# 36
DOCK_FRAME# 36
PCI_PERR#21,30
PCI_PAR21,30
DOCK_PERR# 36
PCI_RST#21,30,31
PCI_STOP#21,30
DOCK_SPME# 36
PCI_C_BE2#21,30
DOCK_PIRQA# 36
DOCK_SERR# 36
PCI_IRDY#21,30,36
PCI_SERR#21,30
PCI_PLOCK#21
DOCK_PCI_IDSEL 36
PCI_C_BE0#21,30
DOCK_PCIRST# 36
DOCK_STOP# 36
DOCK_C_BE3# 36
PCI_AD[0..31]21,30
DOCK_AD[0..31] 36
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
DOCKING BUFFER
35 58Monday, February 26, 2007
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
C26
0.1U_0402_16V4Z~D
1 2
C33
0.047U_0402_16V4Z~D
1
2
C35
0.1U_0402_16V4Z~D
1
2
D3
RB751S40T1_SOD523-2~D
2 1
R19
1K_0402_5%~D
12
R22
100K_0402_5%~D
1 2
U5
TC7SH32FU_SSOP5~D
INB
1
INA
2O4
P5
G
3
U19
PI5C34X2245BE_BQSOP80~D
NC1
1
A1
2
A2
3
A3
4
A4
5
A5
6
A6
7
A7
8
A8
9
GND1
10
NC2
11
A9
12
A10
13
A11
14
A12
15
A13
16
A14
17
A15
18
A16
19
GND2
20
NC3
21
A17
22
A18
23
A19
24
A20
25
A21
26
A22
27
A23
28
A24
29
GND3
30
NC4
31
A25
32
A26
33
A27
34
A28
35
A29
36
A30
37
A31
38
A32
39
GND4
40
VCC4 80
OE1# 79
B1 78
B2 77
B3 76
B4 75
B5 74
B6 73
B7 72
B8 71
VCC3 70
OE2# 69
B9 68
B10 67
B11 66
B12 65
B13 64
B14 63
B15 62
B16 61
VCC2 60
OE3# 59
B17 58
B18 57
B19 56
B20 55
B21 54
B22 53
B23 52
B24 51
VCC1 50
OE4# 49
B25 48
B26 47
B27 46
B28 45
B29 44
B30 43
B31 42
B32 41
C29
0.1U_0402_16V4Z~D
1 2
U18
PI5C162861BE_BQSOP48~D
A0
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10
A9
11
A10
14
A11
15
A12
16
A13
17
A14
18
A15
19
B0 46
B1 45
B2 44
B3 43
B4 42
B5 41
B6 40
B7 39
B8 38
B9 37
B10 34
B11 33
B12 32
B13 31
B14 30
B15 29
GND1 12
GND2 24
NC1
1
NC2
13
OE1
47
OE2
35 VCC2 48
VCC1 36
A16
20
A17
21
A18
22
A19
23
B16 28
B17 27
B18 26
B19 25
C32
0.1U_0402_16V4Z~D
1
2
C31
0.047U_0402_16V4Z~D
1 2
C28
0.1U_0402_16V4Z~D
1
2
D2
RB751S40T1_SOD523-2~D
2 1
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DOCK_AD28
DOCK_AD13
DOCK_AD22
DOCK_OWNS_PCI
DOCK_SMB_ALERT#
DOCK_AD31
TV_Y
TV_C
DOCK_C_BE2#
DOCK_AD30
DOCK_AD8
CRT_RED
DOCK_AD4
DOCK_AD23
DOCK_AD11
PCI_IRDY#
DOCK_AD16
DOCK_AD0
DOCK_AD10
Z3306
DOCK_AD11
DOCK_AD0
DOCK_AD19
DOCK_AD5
DOCK_AD3
DOCK_AD7
DOCK_AD31
DOCK_AD9
DOCK_AD4
DOCK_TRDY#
DOCK_AD26
PCI_GNT0#
DOCK_AD6
D_LAD2
DOCK_C_BE0#
TV_CVBS
DOCK_AD14
DOCK_AD18
DOCK_C_BE1#
DOCK_AD20
DOCK_AD12
DOCK_AD6
DOCK_AD30
PCI_FRAME#
G_DOC_PWRSRC
DOCK_AD2
DOCK_AD7
TV_Y
DOCK_OWNS_PCI
DOCK_AD29
R_PIDEACT
DOCK_AD8
DOCK_TIP
DOCK_AD14
DOCK_AD10
DOCK_AD2
DOCK_AD27
DOCK_AD25
DOCK_AD17
CRT_RED
+DC_IN
DOCK_C_BE3#
DOCK_AD17
DOCK_AD25
TV_CVBS
DOCK_AD24
Z3305
DOCK_AD20
DOCK_AD16
DOCK_RING
DOCK_AD15
TV_C
DOCK_AD21
DOCK_AD18
DOCK_AD28 DOCK_AD1
CRT_BLU
DOCK_AD21
D_LAD0
DOCK_AD19
DOCK_PWR_EN
DOCK_AD13
DOCK_AD5
DOCK_AD27
CRT_GRN
DOCK_AD12
DOCK_STOP#
Z3307
DOCK_AD22
DOCK_PCIRST#
DOCK_AD15
DOCK_PERR#
CRT_GRN
DOCK_AD29
D_LAD1
DOCK_AD1
DOCK_AD23
DOCK_AD24
CRT_BLU
D_LAD3
DOCK_AD9
DOCK_AD3
Z3308
DOCK_RING
DOCK_TIP
DOCK_DET#
USBP8-
USBP8+
CLK_PCI_DOCK
PCI_REQ0#
DOCK_AD26
VSYNC_R
HSYNC_R
TV_C
TV_CVBS
TV_Y
AUD_SPDIF_OUT
DOCK_DET# DOCK_DET#
+3.3V_SUS
+PWR_SRC
+3.3V_ALW
+3.3V_RUN
+DOCK_PWR_SRC
+3.3V_RUN
+DOCK_PWR_SRC
+3.3V_RUN
+2.5V_LAN
+5V_ALW
+DC_IN
DOCK_FRAME#35
DAT_KBD 39
DOCK_TRDY# 35
DOCK_LAN_TX3+ 29
CLK_PCI_DOCK6
CRT_BLU12,20
CLK_KBD 39
DOCK_AD[0..31] 35
DOCK_LAN_TX3- 29
CRT_GRN12,20
CRT_RED12,20
DOCK_SMB_PME# 38
DOCK_GNT0# 35
DVI_TX0-51
D_LFRAME# 38
DOCK_IRDY# 35
DVI_DETECT 51
PCI_GNT0#21,35
DOCK_PSID44
DOCK_DEVSEL# 35
DVI_TX0+51
DVI_SDATA 51
PCI_FRAME#21,30,35
DVI_CLK+51
DVI_SCLK 51
PCI_IRDY#21,30,35
DVI_TX1-51
D_DLRQ1# 38 D_LAD0 38
DVI_TX1+51
DOCK_C_BE3# 35
DOCK_LOCK#35
DAT_DOCK39
DOCK_SMB_DAT39
DOCK_PCI_IDSEL 35
TV_CVBS12
DOCK_PAR35
DOCK_LOM_SPD100LED_ORG#29
DOCK_C_BE2#35
AUD_SPDIF_OUT26
DOCK_LAN_TX0-29
CLK_DOCK39
D_LAD138
DVI_CLK-51
D_LAD238
D_SERIRQ 38
TV_Y12
DOCK_LAN_TX1-29
DVI_TX2-51
R_PIDEACT 43
DOCK_SMB_ALERT# 39
DOCK_PCIRST# 35
DOCK_SMB_CLK39
D_LAD338
DOCK_LOM_ACTLED_YEL# 29
DOCK_C_BE0# 35
TV_C12
DOCK_PERR# 35
D_CLKRUN# 38
DOCK_STOP# 35
DOCK_PCI_EN#35
DOCK_SERR#35
DVI_TX2+51
DOCK_C_BE1# 35
DOCK_LAN_TX2+ 29
DOCK_PIRQA#35
DOCK_LAN_TX0+29
DOCK_SPME#35
DOCK_LAN_TX1+29
DOCK_LAN_TX2- 29
DOCK_PWR_EN38
DOCK_LOM_SPD10LED_GRN#29
DAT_DDC2 12,20
CLK_DDC2 12,20
DOCKED 29,38
PCI_REQ0# 21
HSYNC_R 20
VSYNC_R 20
USBP8- 23
USBP8+ 23
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
DOCKING CONN
36 58Tuesday, February 27, 2007
Compal Electronics, Inc.
PLACE TERMINATIONS CLOSE TO DOCK CONNECTOR
self power dock
NB
PWR_SRC
no power dock
DVI_TX4-
DVI_TX4+
DVI_TX3+
DVI_TX3-
DVI_TX5+
DVI_TX5-
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
U7
74AHC1G08GW_SOT353-5~D
IN1
1
IN2
2
G
3
O4
P5
C267
10P_0402_50V8J~D
@
1
2
R17
100K_0402_5%~D
12
R16
100K_0402_5%~D
1 2
U13
74AHC1G08GW_SOT353-5~D
IN1
1
IN2
2
G3
O4
P
5
R7
0_0402_5%~D@
1 2
R12 150_0402_1%~D 1 2
C40
0.1U_0402_16V4Z~D
1
2
JDOCKB
TYCO_2-1612415-1~D
S137
137
S138
138
S139
139
S140
140
S141
141
S142
142
S143
143
S144
144
S145
145
S146
146
S147
147
S148
148
S149
149
S150
150
S151
151
S152
152
S153
153
S154
154
S155
155
S156
156
S157
157
S158
158
S159
159
S160
160
S161
161
S162
162
S163
163
S164
164
S165
165
S166
166
S167
167
S168
168
S169
169
S170
170
S171
171
S172
172
S173
173
S174
174
S175
175
S176
176
S177
177
S178
178
S179
179
S180
180
S181
181
S182
182
S183
183
S184
184
S185
185
S186
186
S187
187
S188
188
S189
189
S190
190
S205 205
S206 206
S207 207
S208 208
S209 209
S210 210
S211 211
S212 212
S213 213
S214 214
S215 215
S216 216
S217 217
S218 218
S220 220
S222 222
S223 223
S224 224
S225 225
S226 226
S227 227
S228 228
S229 229
S230 230
S231 231
S232 232
S233 233
S234 234
S235 235
S236 236
S237 237
S238 238
S239 239
S240 240
S241 241
S242 242
S243 243
S244 244
S245 245
S246 246
S247 247
S248 248
S250 250
S252 252
S253 253
S254 254
S255 255
S256 256
S257 257
S258 258
S259 259
S193
193
S194
194
S195
195
S196
196
M204
204
Q3
DDTC144EUA-7-F_SOT323-3~D
2
13
C37
0.1U_0402_16V4Z~D
1
2
C21
0.01U_0402_16V7K~D
12
C11
0.47U_0805_25V7K~D
1
2
R8
100K_0402_5%~D
1 2
R13 150_0402_1%~D 1 2
C38
0.1U_0402_16V4Z~D
1 2
R4
100K_0402_5%~D
1 2
JDOCKA
TYCO_2-1612415-1~D
S1
1
S2
2
S3
3
S4
4
S5
5
S6
6
S7
7
S8
8
S9
9
S10
10
S11
11
S12
12
S13
13
S15
15
S17
17
S18
18
S19
19
S20
20
S21
21
S22
22
S23
23
S24
24
S25
25
S26
26
S27
27
S28
28
S29
29
S30
30
S31
31
S32
32
S33
33
S34
34
S35
35
S36
36
S37
37
S38
38
S39
39
S40
40
S41
41
S42
42
S43
43
S45
45
S47
47
S48
48
S49
49
S50
50
S51
51
S52
52
S53
53
S54
54
S55
55
S69 69
S70 70
S71 71
S72 72
S73 73
S74 74
S75 75
S76 76
S77 77
S78 78
S79 79
S80 80
S81 81
S82 82
S83 83
S84 84
S85 85
S86 86
S87 87
S88 88
S89 89
S90 90
S91 91
S92 92
S93 93
S94 94
S95 95
S96 96
S97 97
S98 98
S99 99
S100 100
S101 101
S102 102
S103 103
S104 104
S105 105
S106 106
S107 107
S108 108
S109 109
S110 110
S111 111
S112 112
S113 113
S114 114
S115 115
S116 116
S117 117
S118 118
S119 119
S120 120
S121 121
S122 122
S125 125
S126 126
S127 127
S128 128
M136 136
R791
10_0402_5%~D
@
12
JWIRE
MOLEX_53398-0471~D
1
1
2
2
3
3
4
4
C150
0.1U_0402_10V7K~D
12
C22
0.01U_0402_16V7K~D
12
JDOCKC
TYCO_2-1612415-1~D
P1
P1
P2
P2
P3
P3
P4
P4
P5 P5
P6 P6
P7 P7
P8 P8
MH1
MH1 MH2 MH2
SHLD5
MH9
SHLD1
MH5
SHLD2
MH6
SHLD3 MH7
SHLD6
MH10
SHLD4 MH8
SHLD7 MH11
SHLD8 MH12
MH14 MH14
MH16 MH16
MH13
MH13
MH15
MH15
R20
10_0402_5%~D
@
12
U6
NC7SZ04P5X_NL_SC70-5~D
A
2Y4
P5
NC 1
G
3
C24
0.01U_0402_16V7K~D
1 2
C25
4.7P_0402_50V8C~D
@
1
2
G
D
S
Q2
2N7002W-7-F_SOT323-3~D
2
13
Q6
FDS4435BZ_SO8~D
4
7
8
6
5
1
2
3
R10
200K_0402_5%~D
1 2
C14
1000P_0402_50V7K~D
1
2
C20
0.1U_0603_50V4Z~D
1
2
U8
74AHC1G08GW_SOT353-5~D
IN1
1
IN2
2
G
3
O4
P5
C18
1000P_0402_50V7K~D
1
2
C13
0.1U_0603_50V4Z~D
1
2
C23
0.01U_0402_16V7K~D
1 2 R14 150_0402_1%~D 1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
RTS0
TXD0#
DTR0
RXD0#
DSR0
CTS0
TXD0
3243C1-
3243C1+
RI0
DCD0
CTS0#
RTS0#
DSR0#
DCD0#
DTR0#
3243C2+
3243C2-
RXD0
3243V+
3243V-
RI0
RXD0#
DTR0
RTS0
TXD0#
DCD0
CTS0
DSR0
RI0#
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
BC_A_DAT
BC_A_CLK
BC_A_INT#
+3.3V_SUS
+3.3V_SUS
+3.3V_ALW
+3.3V_ALW
DSR0#38
DTR0#38
TXD038 RTS0#38
DCD0#38
RXD038 CTS0#38
RUN_ON19,39,41,42
RI0#38
KSI[0..7] 40
KSO[0..17] 40
BC_A_DAT39
BC_A_CLK39
BC_A_INT#39 KYBD_DET# 40
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
Serial & FIR
37 58Monday, February 26, 2007
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
C159
270P_0402_50V7K~D
1
2
U3
MAX3243ECUI+T_TSSOP28~D
V- 3
VCC 26
FORCEOFF#
22
C1+
28
V+ 27
C1-
24
C2+
1
C2-
2
FORCEON
23
GND 25
T1OUT 9
T2OUT 10
T3OUT 11
R1IN 4
R2IN 5
R3IN 6
R4IN 7
R5IN 8
T1IN
14
T2IN
13
T3IN
12
R1OUT
19
R2OUT
18
R3OUT
17
R4OUT
16
R5OUT
15
R2OUTB
20
INVALID# 21
C6
0.1U_0402_10V7K~D
1 2
C7
0.47U_0402_10V4Z~D
1 2
C167
0.1U_0402_16V4Z~D
1
2
C153
270P_0402_50V7K~D
1
2
R28
1K_0402_5%~D
12
C154
270P_0402_50V7K~D
1
2
C155
270P_0402_50V7K~D
1
2
JSIO
SUYIN_070921MR009S203BR~D
DCD0
1
DSR0
6
RXD0#
2
RTS0F
7
TXD0F#
3
CTS0
8
DTR0F
4
RI0
9
GND0
5
GND1
10
GND2
11
C10
0.47U_0402_10V4Z~D
1 2
C156
270P_0402_50V7K~D
1
2
C158
270P_0402_50V7K~D
1
2
C152
270P_0402_50V7K~D
1
2
C157
270P_0402_50V7K~D
1
2
C12
0.1U_0402_10V7K~D
1 2
R131
100K_0402_5%~D
@
12
ECE1077
U39
ECE1077-FZG_QFN40~D
KSO0 9
KSO1 11
KSO2 12
KSO3 13
KSO4 14
KSO5 15
KSO6 16
KSO7 17
KSO8 18
KSO9 19
KSO10 20
KSO11 21
KSO13 23
KSO14 24
KSO15 25
KSO16/GPIO_0 26
KSO17/GPIO_1 27
KSO18/GPIO_2 28
KSO19/GPIO_3 29
KSO12 22
KSI0 1
KSI1 2
KSI2 3
KSI3 4
KSI4 5
KSI5 6
KSI6 7
KSI7 8
KSO20/GPIO_4 31
KSO21/GPIO_5 32
KSO22/GPIO_6 33
TEST_PIN
40
GND_PAD
41
NC3
39
BC_DATA
34
BC_CLK
35
BC_INT#
36
VCC1
30
VCC1
10
NC1
37
NC2
38
C171
0.1U_0402_16V4Z~D
1
2
C175
0.1U_0402_16V4Z~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SIO_VDDA
PCIE_WAKE#
CHIPSET_ID
D_CLKRUN#
D_SERIRQ
D_DLRQ1#
SYS_PME#
IMVP6_PROCHOT#
LID_CL#
PANEL_BKEN
CLK_PCI_5018
REG_EN
HDDC_EN
1.05V_RUN_ON
ITP_DBRESET#_R
D_LAD3
LPC_LDRQ1#
CTS0#
ADAPT_TRIP_SET
DOCK_PWR_EN
D_DLRQ1#
CLKRUN#
VGA_IDENTIFY SC_DET#
NB_MUTE#
D_LFRAME#
PLTRST2#
RXD0
CHG_SBATT
LOM_SUPER_IDDQ
ICH_PCIE_WAKE#
LID_CL_SIO#
RTS0#
BC_CLK
BT_RADIO_DIS#
LCD_TST
RBIAS
D_LAD1
DTR0#
ATF_INT#
AUD_HP_NB_SENSE
ADAPT_OC
D_LAD2
LPC_LAD3
LOM_LOW_PWR
LPC_LAD1
SBAT_PRES#
RUNPWROK
MODPRES#
DOCK_HP_MUTE#
PSID_DISABLE#
WIRELESS_ON/OFF#
MODC_EN
D_CLKRUN#
TXD0
BID1
CLK_SIO_14M
QBUFEN#
LPC_LAD2
PCIE_WAKE#
SYS_PME#
BID1
CHIPSET_ID
LOM_TPM_EN#
LED_MASK#
DOCKED
WLAN_RADIO_DIS#
AUD_SPDIF_SHDN
LPC_LDRQ0#
LPC_LFRAME#
D_SERIRQ
IRQ_SERIRQ
USB_BACK_EN#
LID_CL_SIO#
BC_INT#
BID0
DOCK_SMB_PME#
USB_SIDE_EN#
LPC_LAD0
DCD0#
VGA_IDENTIFY
PANEL_BKEN
RI0#
BID0
ICH_PME#
CLK_PCI_5018
D_LAD0
CHG_PBATT
PBAT_PRES#
CLK_SIO_14M
WWAN_RADIO_DIS#
DSR0#
BC_DAT
DOCK_SMB_PME#
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_SUS
+3.3V_ALW
+3.3V_ALW
+3.3V_RUN
+3.3V_RUN
+3.3V_ALW
+5V_ALW
LPC_LAD[0..3] 22,28,39
PLTRST2# 21,39
CLK_PCI_5018 6
CLKRUN# 23,30,39
IRQ_SERIRQ 23,28,30,39
LPC_LFRAME# 22,28,39
LPC_LDRQ1# 22
LPC_LDRQ0# 22
CLK_SIO_14M 6
D_DLRQ1# 36
D_LAD1 36
D_LAD2 36
D_LAD3 36
D_LAD0 36
D_LFRAME# 36
D_CLKRUN# 36
D_SERIRQ 36
RUNPWROK 39,42,48
DSR0#37
RXD037 TXD037
DTR0#37 CTS0#37
RI0#37
RTS0#37
DCD0#37
BC_INT#39 BC_DAT39
LED_MASK#43
LCD_TST 19
ATF_INT#18
DOCK_PWR_EN36
NB_MUTE#27
PSID_DISABLE#44
DOCK_SMB_PME#36
AUD_HP_NB_SENSE26,27
USB_BACK_EN#32
PBAT_PRES#44 SBAT_PRES#44,50
SYS_PME#30,35PCIE_WAKE#28,34
CHG_PBATT50 CHG_SBATT50 PBAT_DSCHG50
LOM_SUPER_IDDQ28 LOM_TPM_EN#28
LOM_LOW_PWR28
ICH_PCIE_WAKE#23
SC_DET#31
ICH_PME#21
WLAN_RADIO_DIS#34
WIRELESS_ON/OFF#43 BT_RADIO_DIS#40
5V_3V_1.8V_1.25V_RUN_PWRGD42
MODPRES#25
MODC_EN25 HDDC_EN25
USB_SIDE_EN#32
QBUFEN#35
ADAPT_OC49
ADAPT_TRIP_SET49
PANEL_BKEN12 DOCKED29,36
AUD_SPDIF_SHDN26 DOCK_HP_MUTE#26
1.05V_RUN_ON47
LID_CL# 40
WWAN_RADIO_DIS#34
LOM_CABLE_DETECT28
SIO_EXT_WAKE#23
IMVP6_PROCHOT#48
BC_CLK39
ITP_DBRESET#7,23
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
ECE5028
38 58Monday, February 26, 2007
Compal Electronics, Inc.
Route RBIAS and its
return to pin 128 very
short.
TEST_PIN is a No Connect
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Place closely pin 64
0 = UMA
1 = Discrete Gfx
BID0
X00
REV BID1
00
Place closely pin 56
X01 0 1
X02 01
X03 1 1
A00 0 0
R814
0_0603_5%~D
1 2
R106 10K_0402_5%~D 1 2
C401
0.1U_0402_16V4Z~D
@
1
2
R308 0_0402_5%~D 1 2
R221
10K_0402_5%~D
@
12
R112
10K_0402_5%~D
12
R247 10K_0402_5%~D
1 2
R240
10_0402_5%~D
@
12
R1 100K_0402_5%~D
1 2
R95
1M_0402_5%~D
12
C90
0.1U_0402_16V4Z~D
@
1
2
R237
100K_0402_5%~D
12
R245 10K_0402_5%~D
1 2
R232 100K_0402_5%~D
12
C415
4.7P_0402_50V8C~D
@
1
2
LPC
DLPC
USB
GPIO
ECE5028-NU
CLK
TEST
(ECE5018)
U25
ECE5028-NU_VTQFP128_14X14~D
GPIOA[0]
97
GPIOA[1]
98
GPIOA[2]
99
GPIOA[3]
100
GPIOA[4]
101
GPIOA[5]
102
GPIOA[6]
103
GPIOA[7]
104
VCC1(VDDA33) 8
GPIOK[7](VSS) 23
GPIOJ[7](VDDA33) 14
VSS 51
GPIOK[4](VDDA33) 20
VSS 36
GPIOH[0]
24
GPIOH[1]
25
GPIOH[4]
26
GPIOH[5]
27
BC_INT#
58
BC_DAT
59
BC_CLK
60
VCC1 34
GPIOE[0]/RXD
1
GPIOE[1]/TXD
2
GPIOE[2]/RTS#
3
GPIOE[3]/DSR#
4
GPIOE[4]/CTS#
5
GPIOE[5]/DTR#
84
GPIOE[6]/RI#
83
GPIOE[7]/DCD#
6
CLKRUN# 37
DCLK_RUN# 38
SER_IRQ 39
DSER_IRQ 40
LRESET# 41
LFRAME# 42
DLFRAME# 43
LDRQ1# 44
DLDRQ1# 45
LDRQ0# 46
LAD3 47
DLAD3 48
LAD2 49
DLAD2 50
LAD1 52
VCC1 57
DLAD1 53
LAD0 54
DLAD0 55
PCICLK 56
GPIOB[0]/INIT#
65
GPIOB[1]/SLCTIN#
66
GPIOC[2]/SCLT
67
GPIOC[3]/PE
68
GPIOC[4]/BUSY
69
GPIOC[5]/ACK#
70
GPIOC[6]/ERROR#
71
GPIOC[7]/ALF#
73
GPIOD[0]/STROBE#
74
GPIOC[1]/PD7
75
GPIOC[0]/PD6
76
GPIOB[7]/PD5
77
GPIOB[6]/PD4
78
GPIOB[5]/PD3
79
GPIOB[4]/PD2
80
GPIOB[3]/PD1
81
GPIOB[2]/PD0
82
CLKI (14.318 MHz) 64
GPIOD[1]
61
GPIOD[2]
62
GPIOD[3]/VBUS_DET
63
CAP_LDO 86
VCC1 85
VSS 96
GPIOD[4]/OCS1_N
28
GPIOD[5]/OCS2_N
29
GPIOD[6]/OCS3_N
30
GPIOD[7]/OCS4_N
31
GPIOH[6]
32
GPIOH[7]
33
GPIOG[0]
88
GPIOG[1]
89
GPIOG[2]
90
GPIOG[3]
91
GPIOG[4]
92
GPIOG[5]
93
GPIOG[6]
94
GPIOG[7]
95
SYSOPT1/GPIOH[2]
106
SYSOPT0/GPIOH[3]
107
VCC1 108
GPIOF[7]
109
GPIOF[6]
110
GPIOF[5]
111
GPIOF[4]
112
IRTX
113
IRRX
114
GPIOF[3]/IRMODE/IRRX3B
115
GPIOF[2]/IRTX2
116
GPIOF[1]/IRRX2
117
GPIOF[0]/IRMODE/IRRX3A
118
GPIOI[1](VCC1) 119
GPIOI[2](VDD18) 120
VSS 17
GPIOI[3](XTAL2) 122
GPIOI[4](XTAL1/CLKIN) 123
GPIOI[5](VDDA18PLL) 124
GPIOI[6](VDDA33PLL) 125
GPIOI[7](ATEST) 126
GPIOJ[0](RBIAS) 127
GPIOJ[4](VSS) 11
GPIOJ[1](VSS) 128
VSS 121
VSS 87
VSS 72
GPIOJ[2](USBDP0) 9
GPIOJ[3](USBDN0) 10
GPIOJ[6](USBDP1) 13
GPIOJ[5](USBDN1) 12
GPIOK[0](USBDP2) 15
GPIOK[1](USBDN2) 16
GPIOK[3](USBDP3) 19
GPIOK[2](USBDN3) 18
GPIOK[5](USBDP4) 21
GPIOK[6](USBDN4) 22
PWRGD 7
OUT65 105
TEST_PIN 35
C93
4.7U_0603_6.3V4Z~D
@
1
2
C97
4.7U_0603_6.3V4Z~D
@
1
2
C89
4.7U_0603_6.3V4Z~D
@
1
2
C98
0.1U_0402_16V4Z~D
1
2
R227
12K_0402_1%~D
@
12
R220
100K_0402_5%~D
12
C101
0.1U_0402_16V4Z~D
1
2
R250
10K_0402_5%~D
12
R238
10K_0402_5%~D
@
1 2
C92
4.7U_0603_6.3V4Z~D
@
1
2
R107
10K_0402_5%~D
@
1 2
R806 0_0402_5%~D@1 2
R236 10K_0402_5%~D
1 2
C421
4.7U_0603_6.3V4Z~D
1
2
C88
0.1U_0402_16V4Z~D
@
1
2
R246
10_0402_5%~D
@
12
R248 10K_0402_5%~D
1 2
R242 0_0402_5%~D
1 2
R231 100K_0402_5%~D
12
C403
0.1U_0402_16V4Z~D
1
2
R108
10K_0402_5%~D
@
1 2
C94
0.1U_0402_16V4Z~D
1
2
C420
0.1U_0402_10V7K~D
1
2
R94
10_0402_5%~D
12
C402
4.7P_0402_50V8C~D
@
1
2
C84
0.047U_0402_16V4Z~D
1
2
C95
0.1U_0402_16V4Z~D
1
2
R109 10K_0402_5%~D 1 2
R72
10K_0402_5%~D
@1 2
R234 100K_0402_5%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_KBD
DAT_KBD
CLK_DOCK
DAT_DOCK
SIO_EXT_SMI#
BAT1_LED#
MEC5004_XTAL1
RUNPWROK
MEC5004_XTAL2
CLK_KBD
NUM_LED#
SNIFFER_GREEN#
PBAT_SMBCLK
ICH_EC_SPI_CLK
SIO_A20GATE
RESET_OUT#
FAN1_TACH
SFPI_EN
MEC5004_XTAL1
DAT_TP_SIO
SCRL_LED#
FWP#
SIO_RCIN#
FWP#
CLK_TP_SIO
BREATH_LED
BC_INT#
PBAT_SMBDAT
CLK_DOCK
ACAV_IN
ALWON
DAT_DOCK
DAT_KBD
CAP_LED#
DEBUG_ENABLE#
0.9V_DDR_VTT_ON
LCD_VCC_TEST_EN
BAT2_LED#
POWER_SW_IN#
SNIFFER_PWR_SW#
BC_DAT
BC_CLK
SBAT_SMBCLK
SBAT_SMBDAT
DOCK_SMB_DAT
LOM_SMB_ALERT#
POWER_SW_IN# POWER_SW#
POWER_SW_IN1#
POWER_SW_IN1#
DEBUG_ENABLE#
SIO_PWRBTN#
SNIFFER_YELLOW#
SIO_SPI_CS#
DOCK_SMB_DAT
DOCK_SMB_CLK
MEC5004_XTAL2
MEC5004_XOSEL
EC_FLASH_SPI_DIN
ICH_EC_SPI_DO
ICH_EC_SPI_DIN
8051_RX
8051_TX
SPI_CS0#
EC_FLASH_SPI_DIN
EC_FLASH_SPI_DO
EC_FLASH_SPI_CLK
BC_A_DAT
BC_A_CLK
BC_A_INT#
AUX_ON
SUS_ON
RUN_ON
1.05V_1.25V_M_PWRGD
CKG_SMBDAT
CKG_SMBCLK
1.8V_SUS_PWRGD
ICH_CL_PWROK
TP_DET#
3.3V_RUN_ON
SIO_SLP_S3#
SIO_SLP_S5# LCD_SMBCLK
LCD_SMBDAT
DOCK_SMB_CLK
LCD_SMBCLK
LCD_SMBDAT
1.5V_RUN_ON
1.25V_RUN_ON
THRM_SMBDAT
THRM_SMBCLK
HOST_DEBUG_TX
HOST_DEBUG_RX
SNIFFER_GREEN#
SNIFFER_YELLOW#
CKG_SMBDAT
CKG_SMBCLK
SBAT_SMBDAT
SBAT_SMBCLK
PBAT_SMBDAT
PBAT_SMBCLK
3.3V_M_PWRGD
M_ON
ICH_RSMRST#
SIO_SLP_M#
PLTRST2#
IRQ_SERIRQ
LPC_LAD2
CLK_PCI_5025
CLKRUN#
LPC_LAD0
LPC_LFRAME#
CLK_PCI_5025
LPC_LAD3
LPC_LAD1
SIO_SPI_CS# SPI_CS0#
EC_FLASH_SPI_DO
EC_FLASH_SPI_CLK
SUS_ON
M_ON
RUN_ON
HOST_DEBUG_RX
SNIFFER_RTC_GPO
RSV_1.25V_GFX_PCIE_ON
MEC_TEST_PIN
DOCK_SMB_ALERT#
IMVP_PWRGD
SIO_EXT_SCI#
DDR_ON
EC_CPU_PROCHOT#
AC_OFF
DDR_ON
BC_DAT
PS_ID
BEEP
AUX_ON
AC_OFF
LOM_SMB_ALERT#
ALW_PWRGD_3V_5V
ATI_ Intel_IDENTIFY
ATI_ Intel_IDENTIFY
DOCK_SMB_ALERT#
SFPI_EN
+3.3V_ALW
+3.3V_ALW
+RTC_CELL
+5V_RUN
+3.3V_ALW
+5V_ALW
+RTC_CELL
+RTC_CELL
+3.3V_SUS
+3.3V_SUS
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW +3.3V_LAN
+3.3V_ALW
BAT1_LED# 43
BAT2_LED# 43
RESET_OUT# 42
RUNPWROK 38,42,48
ACAV_IN 18,49,50
CLK_TP_SIO40 DAT_TP_SIO40
ALWON 45
BREATH_LED 43
FAN1_TACH 18
SBAT_SMBCLK 44
SIO_A20GATE22
CLK_KBD36 DAT_KBD36
DAT_DOCK36 CLK_DOCK36
ICH_EC_SPI_CLK23
SIO_EXT_SMI# 23
BC_INT#38 BC_DAT38
SNIFFER_GREEN#43
PBAT_SMBCLK 44
PBAT_SMBDAT 44
LCD_VCC_TEST_EN 19
SIO_RCIN# 22
SCRL_LED# 43
CAP_LED# 43
NUM_LED# 43
0.9V_DDR_VTT_ON 46
SBAT_SMBDAT 44
DOCK_SMB_DAT 36
LOM_SMB_ALERT# 23,28
POWER_SW# 18,40
SIO_PWRBTN#23
SNIFFER_YELLOW#43
ICH_EC_SPI_DIN23 ICH_EC_SPI_DO23
8051_TX34 8051_RX34
BC_A_DAT37 BC_A_CLK37
BC_A_INT#37
AUX_ON41 SUS_ON41,42 RUN_ON19,37,41,42
CKG_SMBDAT6CKG_SMBCLK6
1.8V_SUS_PWRGD46
ICH_CL_PWROK10,23
TP_DET#40
3.3V_RUN_ON41
SIO_SLP_S3#23 SIO_SLP_S5#23
DOCK_SMB_CLK 36
LCD_SMBCLK 19
LCD_SMBDAT 19
1.5V_RUN_ON 47
1.25V_RUN_ON 46
THRM_SMBCLK 18,49
THRM_SMBDAT 18,49
IMVP_VR_ON 48
3.3V_SUS_ON 41
HOST_DEBUG_TX 34
HOST_DEBUG_RX 34
SNIFFER_PWR_SW# 43
LPC_LAD022,28,38 LPC_LAD122,28,38
CLK_PCI_50256
IRQ_SERIRQ23,28,30,38
LPC_LAD322,28,38
PLTRST2#21,38
CLKRUN#23,30,38
LPC_LFRAME#22,28,38
LPC_LAD222,28,38
ICH_SPI_CS0#23
DOCK_SMB_ALERT# 36
IMVP_PWRGD 23,42,48
SIO_EXT_SCI# 23
WLAN_3V_ENABLE 34
DDR_ON46
EC_CPU_PROCHOT#7
AC_OFF44
ICH_RSMRST#23
BC_CLK38
PS_ID 44
BEEP 26
ALW_PWRGD_3V_5V45
Title
Size Document Number Re v
Date: Sheet of
LA-3301P
1.0
EMC5025
39 58Thursday, March 01, 2007
Compal Electronics, Inc.
32 KHz Clock
Same as Laguna
Place closely pin 58
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Bat2 = Amber LED
Bat1 = Green LED
Flash write protect bottom 4K
of internal bootblock flash
low=write protected
20mA drive pins
200 MIL SO8
Flash ROM
R1752 no stuff when doing
flash recovery
M_ON
R238
1.05V_1.25V_M_PWRGD
SIO_SLP_M#
LOM_CABLE_DETECT
LOM_LOW_PWR
LOM_SUPER_IDDQ
Pin24 of 5025
Pin23 of 5025
Pin15 of 5025
Pin24 of 5025
Pin37 of 5025
Pin25 of 5025
NC
NC
NC
NC
NC
NC
NC
NC
NC
Refer to UMA
Refer to UMA
Refer to UMA
Net & Part AMT Intel Non-AMT Broacom
3.3V_M_PWRGD
CH_RSMRST#
Layout Note:
Non-iAMT
Non-iAMT Non-iAMT
Populate
for flash
corruption
issue.
1=Flash Recovery Enabled
0=Flash Recovery Disabled
Place R84 within 500 mils from SPI flash.
Place R398 & R399 within 500 mils of the
MEC5025.
R63 2.2K_0402_5%~D
1 2
R75 2.2K_0402_5%~D
1 2
R399
15_0402_5%~D
1 2
R210
10K_0402_5%~D
1 2
R222
0_0402_5%~D
12
R213
10K_0402_5%~D
12
R105 2.2K_0402_5%~D
1 2
C146
0.1U_0402_16V4Z~D
@
1 2
C82
0.1U_0402_16V4Z~D
1
2
R87 4.7K_0402_5%~D
1 2
R176 0_0402_5%~D
1 2
T38 PAD~D
R401 100K_0402_5%~D
1 2
R88 4.7K_0402_5%~D
1 2
C75
0.1U_0402_16V4Z~D
1
2
C80
0.1U_0402_16V4Z~D
12
C81
4.7P_0402_50V8C~D
@
1
2
R789 2.7K_0402_5%~D@
1 2
T34PAD~D
C368
1U_0603_10V4Z~D
1
2
R104 100K_0402_5%~D@
1 2
L24
BLM18AG121SN1D_0603~D
12
R395
1M_0402_5%~D
12
R70
0_0402_5%~D
1 2
T88 PAD~D
R788 2.7K_0402_5%~D
1 2
C385
22P_0402_50V8J~D
1
2
C79
0.1U_0402_16V4Z~D
1
2
R84
15_0402_5%~D
1 2
R86 4.7K_0402_5%~D
1 2
L6
BLM18AG121SN1D_0603~D
1 2
C83
0.1U_0402_16V4Z~D
1
2
R83
10_0402_5%~D
@
12
R400 1M_0402_5%~D
1 2
JDEBUG
Molex_53261
@
11
22
33
55
44
R218
10K_0402_5%~D
12
R219
10K_0402_5%~D
12
T36PAD~D
R101 0_0402_5%~D
1 2
R67 8.2K_0402_5%~D
12
R65 4.7K_0402_5%~D
1 2
R85 4.7K_0402_5%~D
1 2
U22
MEC5025-NU_VTQFP128~D
KSO17/GPIOA1/AB1H_DATA
12
KSO16/GPIOA0/AB1H_CLK
13
GPIO5/KSO15
14
GPIO4/KSO14
15
KSO13/GPIO18
16
KSO12/OUT8
17
KSO11/GPIOC7
18
KSO10/GPIOC6
19
KSO9/GPIOC5
20
KSO8/GPIOC4
23
KSO7/GPIO3
24
KSO6/GPIO2
25
KSO5/GPIO1
27
KSO4/GPIO0
28
KSO3/GPIOC3
29
KSO2/GPIOC2
30
KSO1/GPIOC1
31
KSO0/GPIOC0
32
KSI7/GPIO19
33
KSI6/GPIO17
34
KSI5/GPIO10
35
KSI4/GPIO9
36
KSI3/GPIO8
37
KSI2/GPIO7/BC_A_INT#
38
KSI1/GPIO6/BC_A_DAT
39
KSI0/SGPIO30/BC_A_CLK
40
SGPIO34/A20M
92
OUT5/KBRST
50
GPIO94/IMCLK
75
GPIO95/IMDAT
76
KCLK
77
KDAT
78
GPIOA6/EMCLK
79
GPIOA7/EMDAT
80
GPIO20/PS2CLK/8051RX
81
GPIO21/PS2DAT/8051TX
82
LRESET#
57
PCICLK
58
LFRAME#
59
LAD0
60
LAD1
61
LAD2
62
LAD3
63
CLKRUN#
64
SER_IRQ
56
HSTCLK
102
HSTDATAIN
105
HSTDATAOUT
107
FLCLK
103
FLDATAIN
106
FLDATAOUT
108
GPIO80
109
GPIO81
110
BC_CLK
87
BC_DAT
86
BC_INT#
85
XTAL1
122
XTAL2
124
XOSEL
123
VCC0 121
VCC1 21
VCC1 44
VCC1 65
VCC1 83
VCC1 116
nFWP 84
GPIOA3/WINDMON 73
GPIO83/32KHZ_OUT 117
PWRGD 49
nRESET_OUT/OUT6 53
TEST_PIN 72
AGND
125
VR_CAP
22
VSS_PLL
101
VCC_PLL
104
ALWON 120
POWER_ SW_IN2#/GPIO23 119
POWER_ SW_IN1#/GPIO22 126
POWER_ SW_IN0# 127
ACAV_IN 128
BGPO0/GPIOA5 118
AB1B_CLK/GPIOA4 8
AB1B_DATA/GPIOA2 7
AB1A_CLK 6
AB1A_DATA 5
GPIO11/AB2_DATA 93
GPIO12/AB2_CLK 94
GPIO13/AB1G_DATA 95
GPIO14/AB1G_CLK 96
GPIO87/AB1C_DATA 111
GPIO86/AB1C_CLK 112
GPIO85/AB1D_DATA 9
GPIO84/AB1D_CLK 10
GPIO93/AB1F_DATA 97
GPIO92/AB1F_CLK 98
GPIO91/AB1E_DATA 99
GPIO90/AB1E_CLK 100
GPIO82/FAN_TACH3 43
GPIO16/FAN_TACH2 42
GPIO15/FAN_TACH1 41
OUT2/PWM3 48
OUT9/PWM2 47
OUT11/PWM1 46
OUT10/PWM0 45
nEC_SCI/SPDIN2 66
SGPIO45/MSDATA/SPDOUT2 55
SGPIO44/MSCLK/SPCLK2 54
SGPIO46/SPDIN1 69
SGPIO47/SPDOUT1 68
SGPIO31/TIN1/SPCLK1 67
SYSOPT0/SGPIO32/LPC_TX 70
SYSOPT1/SGPIO33/LPC_RX 71
SGPIO40 91
SGPIO41 90
SGPIO42 89
SGPIO43 4
SGPIO35 1
SGPIO36 (SFPI_EN) 2
SGPIO37 3
GPIO96/TOUT1 52
OUT7/nSMI 11
nPWR_LED 115
nBAT_LED 114
VSS
26
VSS
51
VSS
74
VSS
88
VSS
113
T33PAD~D
R76
1K_0402_5%~D
12
Y1
32.768K_12.5P_1TJS125DJ4A420P~D
14
23
R93
100K_0402_5%~D
12
L3
BLM18AG121SN1D_0603~D
1 2
C74
4.7U_0603_6.3V4Z~D
1
2
R396
15_0402_5%~D
@
1 2
R64 4.7K_0402_5%~D
1 2
R214 0_0402_5%~D
12
U23
M25P16-VMW6TP_SO8~D
CS#
1
SO
2
WP#
3
GND
4
VCC 8
HOLD# 7
SCLK 6
SI 5
R387 2.7K_0402_5%~D
12
R162 8.2K_0402_5%~D
1 2
R794 10K_0402_5%~D
12
T39 PAD~D
R92
100K_0402_5%~D
@
12
T87 PAD~D
R80
1K_0402_5%~D
12
R730 4.7K_0402_5%~D
1 2
R81 2.2K_0402_5%~D
1 2
R397
0_0402_5%~D
1 2
C379
33P_0402_50V8J~D
1
2
R389 2.7K_0402_5%~D
12
C369
0.1U_0402_16V4Z~D
1
2
C398
0.1U_0402_16V4Z~D
1 2
U30
74AHC1G08GW_SOT353-5~D
@
IN1
1
IN2
2
G
3
O4
P5
T37 PAD~D
R111 2.2K_0402_5%~D
1 2
R388 1M_0402_5%~D
12
T35PAD~D
R69 100K_0402_5%~D
12
R77 100K_0402_5%~D@
1 2
R66 8.2K_0402_5%~D
12
EC_FLASH_PAD
@SHORT PADS~D
11
2
2
R161 8.2K_0402_5%~D
1 2
C76
10U_0805_10V4Z~D
1
2
R90
10K_0402_5%~D
12
R62 2.2K_0402_5%~D
1 2
R398
15_0402_5%~D
1 2
R526 100K_0402_5%~D
1 2
R211
100K_0402_5%~D
12
R100
10K_0402_5%~D
12
R795
0_0402_5%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
KSO4
KSI0
KSO13
KSO11
KSO14
KSO12
KSI5
KSO5
KSO0
KSO3
KSO7
KSO9
KSI2
KSO8
KSO2
KSI6
KSI4
KSI3
KSO1
KSO15
KSO10
KSI7
KSO6
KSI1
KSI6
KSI7
DAT_TP_SIO
CLK_TP_SIO
TP_DATA
KSO16
KSO17
KSO17
R_CAP_LED#
R_SCRL_LED#
R_NUM_LED#
POWER_SW#
KSO10
KSO11
KSO9
KSO14
KSO13
KSO15
KSO16
KSO12
KSO0
KSO2
KSO1
KSO3
KSO8
KSO6
KSO7
KSO4
KSO5
KSI0
KSI3
KSI1
KSI5
KSI2
KSI4
COEX3
USBP7-
SP_V+
SP_Y
COEX2_WLAN_ACTIVE SP_GND
TP_DATA
SP_X
TP_CLK
USBP7+ BT_RADIO_DIS#
TP_CLK
USBP5_D-
USBP5_D+
USBP5_D+
USBP5_D-
KYBD_DET#
SP_Y
SP_V+
SP_X
SP_GND
SP_Y
SP_V+
SP_X
SP_GND
POWER_SW#
+5V_RUN
+3.3V_ALW
+3.3V_RUN
+3.3V_ALW
+3.3V_RUN
+5V_RUN
+3.3V_ALW
+3.3V_RUN
KSI[0..7]37
KSO[0..17]37
R_SCRL_LED#43
CLK_TP_SIO 39
DAT_TP_SIO 39
POWER_SW#18,39 R_NUM_LED#43 R_CAP_LED#43
LID_CL#38
BT_RADIO_DIS# 38
COEX2_WLAN_ACTIVE34
USBP7+23
COEX1_BT_ACTIVE34
USBP7-23
BT_ACTIVE 34,43
KYBD_DET#37
USBP5+23
USBP5-23
TP_DET#39
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
INT KB
40 58Monday, February 26, 2007
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Touch PAD
Power Switch
C397100P_0402_50V8J~D
@
1
2
R407
0_0402_5%~D
1 2
C426
0.1U_0402_16V4Z~D
1
2
C387100P_0402_50V8J~D
@
1
2
R228
4.7K_0402_5%~D
12
R249
10K_0402_5%~D
12
R410
0_0402_5%~D
1 2
C395100P_0402_50V8J~D
@
1
2
C396100P_0402_50V8J~D
@
1
2
Part Number Description
SP070007V0L S SOCKET TYCO 1770551-1
10P H5.9 SMART
SM CARD BODY
C87
10P_0402_50V8J~D
1
2
PWR_SW
@SHORT PADS~D
1
122
L4
DLW21SN900SQ2_0805~D
@
1
1
4
433
22
C392100P_0402_50V8J~D
@
1
2
C374100P_0402_50V8J~D
@
1
2
C394100P_0402_50V8J~D
@
1
2
C103
100P_0402_50V8J~D
1
2
Part Number Description
DC02000870L H-CONN SET ZJX
MB-LCD 14 WXGA+(-2ch)
LVDS cable
R119
10K_0402_5%~D
12
L26
BLM18AG601SN1D_0603~D
1 2
Part Number Description
PK230003Q0L SPK PACK ZJX 2.0W 4 OHM FG
Speak
C381100P_0402_50V8J~D
@
1
2
C389100P_0402_50V8J~D
@
1
2
C400
10P_0402_50V8J~D
1
2
C373100P_0402_50V8J~D
@
1
2
C424
0.1U_0402_16V4Z~D
1
2
D38
DA204U_SOT323~D
@
2
31
C372100P_0402_50V8J~D
@
1
2
C367
100P_0402_50V8J~D
@
1
2
C382100P_0402_50V8J~D
@
1
2
D40
DA204U_SOT323~D
@
2
31
C86
10P_0402_50V8J~D
1
2
T4 PAD~D
R575
100K_0402_5%~D
12
C377100P_0402_50V8J~D
@
1
2
C391100P_0402_50V8J~D
@
1
2
C386100P_0402_50V8J~D
@
1
2
C376100P_0402_50V8J~D
@
1
2
JKYBRD
FOX_GS12403-0001K-8F~D
1
1
3
3
5
5
7
7
11
11
9
9
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
2
2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
18
18
20
20
22
22
24
24
26
26
28
28
30
30
31
31
32
32
33
33
34
34
35 35
36 36
37 37
38 38
39 39
40 40
GND 41
GND 42
Part Number Description
DC020003Y0L H-CONN SET ZJX MB-LCD
14 WXGA+(-1ch)
LVDS cable
Part Number Description
DC02000840L H-CONN SET ZJX
MB-B/T-TP-FP
T/P wire set cable
C383100P_0402_50V8J~D
@
1
2
C378100P_0402_50V8J~D
@
1
2
D39
DA204U_SOT323~D
@
2
31
C419
33P_0402_50V8J~D
1
2
C423
0.1U_0402_16V4Z~D
1
2
D37
DA204U_SOT323~D
@
2
31
C390100P_0402_50V8J~D
@
1
2
C78100P_0402_50V8J~D
@
1
2
L25
BLM18AG601SN1D_0603~D
1 2
R229
4.7K_0402_5%~D
12
Part Number Description
GC20323MX00 BATT CR2032 3V
220MAH MAXELL
RTC BATT
C430
0.1U_0402_16V4Z~D
1
2
C399
10P_0402_50V8J~D
1
2
C380100P_0402_50V8J~D
@
1
2
JTPAD
FOX_HT1315F-P2~D
1
122
3
344
5
566
88
10 10
12 12
14 14
16 16
18 18
20 20
22 22
24 24
26 26
28 28
30 30
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
G1
31 G2 32
C371100P_0402_50V8J~D
@
1
2
C375100P_0402_50V8J~D
@
1
2
C384100P_0402_50V8J~D
@
1
2
C393100P_0402_50V8J~D
@
1
2
Part Number Description
DC28A000800 FAN SET DAQ20 DC5V AB7405HB-HB3 ADDA
FAN
Part Number Description
DC02000CS0L H-CONN SET ZGX
MB-MDC
MDC wire set cable
Part Number Description
DC000001Q0L PCMCIA TYCO
1759096-1
PCMCIA BODY
C388100P_0402_50V8J~D
@
1
2
C102
0.1U_0402_16V4Z~D
1
2
C210
0.047U_0402_16V4Z~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SUS_ENABLE
N21917830
SUS_ON_5V#
RUN_ON_5V#
RUN_ON_5V#SUS_ON_5V#
+15V_ALW
+3.3V_ALW2 +5V_ALW
+5V_RUN
+15V_ALW
+3.3V_ALW2
+PWR_SRC+PWR_SRC
+5V_ALW +5V_SUS
+3.3V_RUN
+3.3V_ALW
+3.3V_ALW2
+15V_ALW
+3.3V_ALW2
+15V_ALW +3.3V_ALW +3.3V_SUS
+1.8V_RUN+1.8V_SUS
+1.5V_RUN +0.9V_DDR_VTT+3.3V_RUN+5V_RUN +1.8V_RUN +1.25V_RUN+1.8V_SUS +5V_SUS +3.3V_SUS
RUN_ON19,37,39,42
SUS_ON39,42
ENAB_3VLAN 28
AUX_ON39
3.3V_RUN_ON39
3.3V_SUS_ON39
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
POWER CONTROL
41 58Monday, February 26, 2007
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DC/DC Interface
+5VSUS Source
+5VRUN Source
+3.3V_RUN Source
+3VSUS Source
+1.8V_RUN Source
Discharg Circuit
R641
100K_0402_5%~D
12
R625
20K_0402_5%~D
12
R765
100K_0402_5%~D
12
C208
4700P_0402_25V7K~D
1
2
C819
10U_0805_10V4Z~D
1
2
G
D
S
Q51
2N7002W-7-F_SOT323-3~D
2
13
R113
1K_0402_5%~D
@
12
S
G
D
Q80
SI3456BDV-T1-E3_TSOP6~D
3
6
245
1
R699
100K_0402_5%~D
12
C143
10U_0805_10V4Z~D
1
2
C195
4700P_0402_25V7K~D
@
1
2
G
D
S
Q49
2N7002W-7-F_SOT323-3~D
2
13
C815
2200P_0402_50V7K~D
1
2
C811
10U_0805_10V4Z~D
1
2
R729
1K_0402_5%~D
@
12
C194
0.047U_0402_16V4Z~D
@
1
2
R630
20K_0402_5%~D
12
G
D
S
Q61
2N7002W-7-F_SOT323-3~D
@
2
13
G
D
S
Q91
2N7002W-7-F_SOT323-3~D
@
2
13
R623
100K_0402_5%~D
12
R413
0_0402_5%~D
1 2
R305
0_0402_5%~D
1 2
C144
470P_0402_50V7K~D
@
1
2
R628
20K_0402_5%~D
12
R633
1K_0402_5%~D
@
12
R624
100K_0402_5%~D
12
R636
1K_0402_5%~D
@
12
R766
100K_0402_5%~D
12
C816
10U_0805_10V4Z~D
1
2
G
D
S
Q55
2N7002W-7-F_SOT323-3~D
2
13
R117
1K_0402_5%~D
@
12
R764
100K_0402_5%~D
12
R151
75_0603_5%~D
@
12
G
D
S
Q88
2N7002W-7-F_SOT323-3~D
2
13
G
D
S
Q53
2N7002W-7-F_SOT323-3~D
2
13
G
D
S
Q87
2N7002W-7-F_SOT323-3~D
2
13
Q10
SI4810DY-T1-E3_SO8~D
@
36
5
7
82
4
1
G
D
S
Q90
2N7002W-7-F_SOT323-3~D
2
13
R635
1K_0402_5%~D
@
12
D35
RB751V_SOD323~D
@
21
Q52
SI4810BDY-T1-E3_SO8~D
36
5
7
82
4
1
G
D
S
Q64
2N7002W-7-F_SOT323-3~D
@
2
13
G
D
S
Q81
2N7002W-7-F_SOT323-3~D
@
2
13
Q54
SI4336DY-T1-E3_SO8~D
36
5
7
82
4
1
C142
4700P_0402_25V7K~D
@
1
2
R700
470K_0402_5%~D
12
C814
10U_0805_10V4Z~D
1
2
G
D
S
Q63
2N7002W-7-F_SOT323-3~D
@
2
13
G
D
S
Q92
2N7002W-7-F_SOT323-3~D
@
2
13
R701
200K_0402_5%~D
12
D36
RB751V_SOD323~D
@
21
R621
100K_0402_5%~D
12
G
D
S
Q89
2N7002W-7-F_SOT323-3~D
2
13
G
D
S
Q73
2N7002W-7-F_SOT323-3~D
2
13
G
D
S
Q72
2N7002W-7-F_SOT323-3~D
2
13
G
D
S
Q62
2N7002W-7-F_SOT323-3~D
@
2
13
G
D
S
Q30
2N7002W-7-F_SOT323-3~D
@
2
13
Q47
SI4810BDY-T1-E3_SO8~D
36
5
7
82
4
1
R762
20K_0402_5%~D
12
R118
1K_0402_5%~D
@
12
R620
20K_0402_5%~D
12
G
D
S
Q93
2N7002W-7-F_SOT323-3~D
@
2
13
R698
100K_0402_5%~D
12
R617
100K_0402_5%~D
12
R634
1K_0402_5%~D
@
12
Q58
SI4336DY-T1-E3_SO8~D
36
5
7
82
4
1
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
RUNPWROK
3VRUNRC
Z4012
COINCELL
RESET_OUT#
IMVP_PWRGD
ICH_PWRGD#
+3.3V_ALW
+3.3V_SUS
+3.3V_ALW
+3.3V_ALW
+COINCELL
+RTC_CELL
+3.3V_ALW
+3.3V_ALW
+COINCELL
+3.3V_SUS
+3.3V_ALW
+5V_RUN
+1.8V_RUN
+3.3V_RUN
+5V_ALW
+1.8V_SUS
+3.3V_ALW
+3.3V_ALW+3.3V_ALW
+5V_ALW
+3.3V_SUS
+5V_SUS
+3.3V_RTC_LDO
+3.3V_ALW
RUN_ON19,37,39,41
SUSPWROK 18
RUNPWROK 38,39,48
SUS_ON39,41
1.5V_RUN_PWRGD47
2.5V_RUN_PWRGD18
1.05V_RUN_PWRGD47
ICH_PWRGD 10,23
ICH_PWRGD# 18
IMVP_PWRGD23,39,48
RESET_OUT#39
5V_3V_1.8V_1.25V_RUN_PWRGD 38
3.3V_5V_SUS_PWRGD
1.25V_RUN_PWRGD46
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
Power Good
42 58Monday, February 26, 2007
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
COIN RTC Battery
Non-iAMT
C27
2200P_0402_50V7K~D
1
2
U12B
74LVC3G14DC_VSSOP8~D
P8
A
6Y2
G
4
C457
0.1U_0402_16V4Z~D
1
2
D23
RB751V_SOD323~D
2 1
JCOIN
MOLEX_53398-0271~D
1
1
2
2
U27A
74VHC08MTCX_NL_TSSOP14~D
IN1
1
IN2
2OUT 3
P14
G
7
R136
200K_0402_5%~D
12
U27C
74VHC08MTCX_NL_TSSOP14~D
IN1
10
IN2
9OUT 8
P14
G
7
R159
10K_0402_5%~D
1 2
R79
100K_0402_5%~D
12
E
B
C
Q84
MMST3904-7-F_SOT323-3~D
2
3 1
E
B
C
Q86
MMST3904-7-F_SOT323-3~D
2
3 1
C199
0.1U_0402_16V4Z~D
1
2
R418
0_0402_5%~D
1 2
R134
4.7K_0402_5%~D
1 2
C49
0.1U_0402_16V4Z~D
1
2
R164
4.7K_0402_5%~D
1 2
C
B
E
Q79
MMBT3906WT1G_SC70-3~D
1
2
3
U12C
74LVC3G14DC_VSSOP8~D
P8
A
3Y5
G
4
R132
20K_0402_5%~D
12
D32
RB751V_SOD323~D
2 1
R208 0_0402_5%~D
12
D27
RB751V_SOD323~D
2 1
C19
2200P_0402_50V7K~D
1
2
U27B
74VHC08MTCX_NL_TSSOP14~D
IN1
4
IN2
5OUT 6
P14
G
7
C134
0.01U_0402_16V7K~D
1
2
R367
10K_0402_5%~D
1 2
G
D
S
Q17
2N7002W-7-F_SOT323-3~D
2
13
R139
200K_0402_5%~D
12
R486 0_0402_5%~D
1 2
C404
2200P_0402_50V7K~D
1
2
C
B
E
Q26
MMBT3906WT1G_SC70-3~D
1
2
3
C370
1U_0603_10V4Z~D
1
2
C
B
E
Q78
MMBT3906WT1G_SC70-3~D
1
2
3
U27D
74VHC08MTCX_NL_TSSOP14~D
IN1
13
IN2
12 OUT 11
P14
G
7
C17
2200P_0402_50V7K~D
1
2
C422
2200P_0402_50V7K~D
1
2
R158
200K_0402_5%~D
12
C186
0.1U_0402_16V4Z~D
1 2
R616
200K_0402_5%~D
12
R157
200K_0402_5%~D
12
C135
0.1U_0402_16V4Z~D
1 2
R364
10K_0402_5%~D
1 2
D26
RB751V_SOD323~D
2 1
D33
RB751V_SOD323~D
2 1
E
B
C
Q85
MMST3904-7-F_SOT323-3~D
2
3 1
U12A
74LVC3G14DC_VSSOP8~D
P8
A
1Y7
G
4
D13
BAT54CW_SOT323~D
3
2
1
C458
0.1U_0402_16V4Z~D
1 2
D25
RB751V_SOD323~D
2 1
D31
RB751V_SOD323~D
2 1
R160
10K_0402_5%~D
1 2
R135
200K_0402_5%~D
12
R207 0_0402_5%~D
12
R68
200K_0402_5%~D
12
C
B
E
Q20
MMBT3906WT1G_SC70-3~D
1
2
3
R334
10K_0402_5%~D
1 2
R82
200K_0402_5%~D
12
C47
0.1U_0402_16V4Z~D
1
2
R133
4.7K_0402_5%~D
1 2
R216 0_0402_5%~D@12
C46
0.1U_0402_16V4Z~D
1
2
C
B
E
Q77
MMBT3906WT1G_SC70-3~D
1
2
3
R21
1K_0402_5%~D
12
U48A
74LVC3G14DC_VSSOP8~D
P8
A
1Y7
G
4
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BATT_GREEN_LED
BAT1_LED#
R_CAP_LED#
R_NUM_LED#
R_SCRL_LED#
R_MPCI_ACT
BAT2_LED#
BATT_AMBER_LED
R_BT_ACT
SNIFFER_GREEN#
SNIFFER_YELLOW#
SNIFFER_G
SNIFFER_Y
BT_ACTIVE
SATA_ACT#_R SATA_ACT#
+3.3V_ALW
+3.3V_RUN
+3.3V_ALW
+5V_RUN
+3.3V_SUS
+3.3V_SUS
+3.3V_RUN
+3.3V_ALW
+3.3V_RUN+RTC_CELL
+3.3V_RUN
+3.3V_SUS
+3.3V_RUN
+3.3V_WLAN
BAT1_LED#39
SCRL_LED#39
CAP_LED#39
NUM_LED#39
LED_WLAN_OUT#34
BAT2_LED#39
BATT_GREEN_LED 32
BATT_AMBER_LED 32
R_MPCI_ACT 32
R_SCRL_LED# 40
R_NUM_LED# 40
R_CAP_LED# 40
R_BT_ACT 32
SNIFFER_GREEN#39
SNIFFER_YELLOW#39
BT_ACTIVE34,40
R_PIDEACT 36
HDD_LED 32
LED_MASK#38
SATA_ACT#_R22
LED_MASK#38
WIRELESS_ON/OFF#38
SNIFFER_PWR_SW#39
BREATH_GREEN_LED 32
BREATH_LED39
Title
Size Document Number Re v
Date: Sheet of
LA-3301P
1.0
PAD and Standoff
43 58Monday, February 26, 2007
Compal Electronics, Inc.
Fiducial Mark
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
EMI CLIP
This circuit is
only needed if the
platform has the
SNIFFER.
H9
@H_C236B315D110
1
CLIP4
EMI_CLIP
GND 1
CLIP3
EMI_CLIP
GND
1
R225
330_0402_5%~D
12
R15
150_0402_5%~D
1 2
Q22
PDTA114EU_SC70-3~D
2
1 3
FD2
FIDUCIAL MARK~D
1
R102
100K_0402_5%~D
12
FD9
FIDUCIAL MARK~D
1
H17
@H_C217B276D98
1
R180
100K_0402_5%~D
12
FD21
FIDUCIAL MARK~D
1
H26
@H_C472D376
1
Y
G
D14
12-22AUYSYGC/530-A2/TR8_G/Y~D
3
21
CLIP6
EMI_CLIP
GND 1
H16
@H_C217B276D98
1
CLIP5
EMI_CLIP
GND
1
FD11
FIDUCIAL MARK~D
1
FD6
FIDUCIAL MARK~D
1
CLIP2
EMI_CLIP
GND
1
R71
100_0402_5%~D
1 2
H7
@H_C236B315D110
1
G
D
S
Q23
BSS138W-7-F_SOT323~D
2
13
H27
@H_C472D431X376
1
R9
220_0402_5%~D
1 2
Q1
PDTA114EU_SC70-3~D
2
1 3
Q4
PDTA114EU_SC70-3~D
2
1 3
R140
0_0402_5%~D @
1 2
H14
@H_C291B236D118
1
R145
330_0402_5%~D
1 2
U43
NC7SZ04P5X_NL_SC70-5~D
A
2Y4
P5
NC 1
G
3
R262 220_0402_5%~D
1 2
JSNIFF
1BS008-13130-7F_4P~D
1
1
2
2
3
3
4
4
5
566
H18
@H_C217D91
1
FD12
FIDUCIAL MARK~D
1
R226
330_0402_5%~D
12
FD3
FIDUCIAL MARK~D
1
Q32
PDTA114EU_SC70-3~D
2
1 3
H5
@H_C236B315D110
1
H15
@H_C295D118
1
Q28
PDTA114EU_SC70-3~D
2
1 3
R179
0_0402_5%~D
1 2
H19
@H_C217D91
1
H29
@H_O115X31D115X31N
1
R639
10K_0402_5%~D
1 2
H11
@H_C315B236D118
1
FD10
FIDUCIAL MARK~D
1
H6
@H_C236B256D110
1
FD15
FIDUCIAL MARK~D
1
R74
10K_0402_5%~D
1 2
H8
@H_C217B276D98
1
FD19
FIDUCIAL MARK~D
1
G
D
S
Q29
BSS138W-7-F_SOT323~D
2
13
H12
@H_C315D118
1
FD18
FIDUCIAL MARK~D
1
R224
330_0402_5%~D
12
H28
@H_O115X31D115X31N
1
R261 220_0402_5%~D
1 2
FD5
FIDUCIAL MARK~D
1
H10
@H_C236B315D110
1
FD13
FIDUCIAL MARK~D
1
C
B
E
Q18
MMBT3906WT1G_SC70-3~D
1
2
3
FD8
FIDUCIAL MARK~D
1
R181
100K_0402_5%~D
@
12
FD4
FIDUCIAL MARK~D
1
Q33
PDTA114EU_SC70-3~D
2
1 3
R97
10K_0402_5%~D
@
12
C
B
E
Q5
MMBT3906WT1G_SC70-3~D
1
2
3
R212
1K_0402_5%~D
1 2
CLIP1
EMI_CLIP
GND 1
R638
47K_0402_5%~D
12
H3
@H_C315D110
1
FD17
FIDUCIAL MARK~D
1
R78
10K_0402_5%~D
12
R6
220_0402_5%~D
1 2
H30
@H_O115X31D115X31N
1
FD7
FIDUCIAL MARK~D
1
FD25
FIDUCIAL MARK~D
1
FD1
FIDUCIAL MARK~D
1
FD20
FIDUCIAL MARK~D
1
H1
H_C146B217D91
1
H2
H_C146B217D91
1
FD16
FIDUCIAL MARK~D
1
FD14
FIDUCIAL MARK~D
1
H13
@H_C315D118
1
H4
H_C256B63D47
1
H20
@H_C217B276D98
1
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+DC_IN
-DCIN_JACK
Z4301
Z4302
Z4303
Z4304
Z4305
Z4306
+DCIN_JACK
+3.3V_ALW
+5V_ALW
+5V_ALW
+DC_IN_SS
+5V_ALW
PBATT+
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
SBATT+
+DC_IN
PS_ID 39
PSID_DISABLE# 38
PBAT_PRES# 38
PBAT_SMBDAT 39
PBAT_ALARM#
PBAT_SMBCLK 39
SBAT_ALARM#
SBAT_PRES# 38,50
SBAT_SMBDAT 39
SBAT_SMBCLK 39
DOCK_PSID36
AC_OFF39
Title
Size Document Number Re v
Date: Sheet of
LA-3301P
0.0
+DCIN
44 58Monday, February 26, 2007
Compal Electronics, Inc.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
THESE CAPS MUST BE
NEXT TO JCHG
DC_IN+ Source
Z-series AC Adaptor
Connctor
ESD Diodes
Secondary Battery Connector
ESD Diodes
Primary Battery Connector
GPIO Input from EC
PD11 DA204U_SOT323~D @
2
3
1
PC4
0.1U_0603_25V7K~D
12
PBATT1
SUYIN_200277MR009G506ZR~D
BATT1+ 1
SMB_CLK 3
SMB_DAT 4
BATT_PRES# 5
SYSPRES# 6
BATT2- 9
GND
10
GND
11
BATT2+ 2
BATT_VOLT 7
BATT1- 8
PR6
100K_0402_1%~D
1 2
PQ3
FDS6679AZ_SO8~D
3 6
5
7
8
2
4
1
PR495
0_0402_5%~D
@
12
PC231
2200P_0402_50V7K~D
12
PR10
15K_0402_1%~D
1 2
PD45
DA204U_SOT323~D @
2
3
1
PR184
33_0402_5%~D
1 2
PJP60
PAD-OPEN 4x4m
1 2
PD44
DA204U_SOT323~D @
2
3
1
PC230
0.1U_0603_25V7K~D
12
PJP1
TYCO_1734077-1~D
BATT1+ 1
SMB_CLK 3
SMB_DAT 4
BATT_PRES# 5
SYSPRES# 6
BATT2- 9
GND
10
GND
11
BATT2+ 2
BATT_VOLT 7
BATT1- 8
TYCO_1566065-2~D
PJPDC1
Low_PWR 1
DC+_1 2
DC+_2 3
DC-_1 4
DC-_2 5
GND_1
6
GND_2
7
GND_3
8
GND_4
9
MH1
MH2
E
B
C
PQ2
MMST3904-7-F_SOT323~D
2
3 1
PD41
DA204U_SOT323~D
@
2
3
1
PL6
FBMA-L18-453215-900LMA90T_1812~D
1 2
PR303
100_0402_5%~D
1 2
PD10
DA204U_SOT323~D @
2
3
1
PR23
100_0402_5%~D
1 2
PC2
0.47U_0805_25V7K~D
1 2
PD9
DA204U_SOT323~D @
2
3
1
G
D
S
PQ1
FDV301N_SOT23~D
2
1 3
PD59
VZ0603M260APT_0603
@
1
2
PR12
4.7K_0805_5%~D
12
PR2
2.2K_0402_5%~D
1 2
PC9
0.1U_0603_25V7K~D
12
PD43
DA204U_SOT323~D @
2
3
1
PR299
10K_0402_5%~D @
1 2
PR7
10K_0402_1%~D
12
PC6
10U_1206_25V6M~D
12
PR20
100_0402_5%~D
1 2
PR302
100_0402_5%~D
1 2
PQ100A
IMD2AT-108_SC74-6~D
@
5
16
PD42
DA204U_SOT323~D @
2
3
1
PQ100B
IMD2AT-108_SC74-6~D
@
2
43
PD2
DA204U_SOT323~D
2
3
1
PR304
100_0402_5%~D
1 2
PR11
240K_0402_5%~D
12
PC3
0.1U_0603_25V7K~D
12
PD53
SM24_SOT23
@
2
3
1
PR13
47K_0402_1%~D
12
PR300
10K_0402_5%~D
12
PL1
BLM18BD102SN1D_0603~D
12
PR22
100_0402_5%~D
1 2
PJP61
PAD-OPEN 4x4m
1 2
PR19
10K_0402_1%~D
12
PC5
0.1U_0603_25V7K~D
12
PL2
FBMJ4516HS720NT 1806~D
1 2
PR301
100_0402_5%~D
1 2
PD12
DA204U_SOT323~D @
2
3
1
PC397
0.1U_0603_25V7K~D
@
12
PL32
FBMA-L18-453215-900LMA90T_1812~D
1 2
PD58
VZ0603M260APT_0603
@
1
2
PC10
2200P_0402_50V7K~D
12
PL34
FBMJ4516HS720NT 1806~D
1 2
PR21
100_0402_5%~D
1 2
PR346
0_0402_5%~D
@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+5V_ALW_BOOT
+5V_ALW_UGATE
+3.3V_ALW_LGATE
+3.3V_ALW_UGATE
+3.3V_ALW_PHASE
EN_3V_5VEN_3V_5V
POK2
POK2
+3.3V_ALW_BOOT
+5V_ALW_LGATE
EN_3V_5V
+5V_ALW_PHASE
+15V_ALWP
POK1
+5V_ALWP
POK1
+3.3V_ALWP
+PWR_SRC
+5V_ALWP
+5V_VCC1
+3.3V_ALWP
+3.3V_ALWP
+15V_ALW
+5V_ALW
+5V_ALWP
+3.3V_ALW
+5V_ALW2
+5V_ALWP
GNDA_3V5V
GNDA_3V5V
GNDA_3V5V
GNDA_3V5V
GNDA_3V5V
GNDA_3V5V
GNDA_3V5V
+3.3V_ALWP
GNDA_3V5V
+5V_ALW2
+DC1_PWR_SRC
GNDA_3V5V
GNDA_3V5V
GNDA_3V5V
GNDA_3V5V
+3.3V_ALW2
ALWON39
THERM_STP#18
ALW_PWRGD_3V_5V 39
Title
Size Document Number Re v
Date: Sheet of
LA-3301P
0.0
DC/DC +3V/ +5V
45 58Monday, February 26, 2007
Compal Electronics, Inc.
+3.3V_ALWP/ +5V_ALWP/ +5V_ALW2 / +15V_ALWP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
5 Volt +/-5%
Thermal Design Current:6.2A
Peck current: 8.8A
OCP min: 9.05A
3.3 Volt +/-5%
Thermal Design Current: 8.6A
Peak current: 12.3A
OCP min:13.08A
(100mA,20mils ,Via NO.=1)
PC286
0.1U_0603_25V7K~D
1 2
PC292
0.1U_0402_10V7K~D
12
PC285
0.1U_0603_25V7K~D
12
PR382
267K_0402_1%~D
1 2
PR391
100K_0402_1%~D
1 2
PR380
0_0402_5%~D
1 2
PR385
0_0402_5%~D
12
PR392
2K_0402_5%~D
12
PJP33
PAD-OPEN 4x4m
1 2
PR386
1_0603_5%~D
1 2
PR376
10_0603_5%~D
@
12
PR389
0_0402_5%~D
@
12
PR383
150K_0402_1%~D
1 2
PQ84
FDS6676AS_NL_SO8~D
4
7
8
6
5
1
2
3
PR393
0_0402_5%~D
12
PR500
0_0402_5%~D
@
1 2
PR517 0_0402_5%~D
12
PC283
1U_0603_10V6K~D
12
PC287
0.1U_0603_25V7K~D
12
PL37
3.0U_HMP1362-3R0-R_17A~D
12
PL36
4.7U_HMU1356-4R7-R_10A~D
1 2
PR375
0_0805_5%
1 2
PR499
0_0402_5%~D
12
PC386
0.1U_0402_10V7K~D
@
12
PC288
0.1U_0603_25V7K~D
12
PR394
200K_0402_5%
1 2
PJP37
PAD-OPEN 4x4m
1 2
PR397
200K_0402_1%~D
12
PC274
2200P_0402_50V7K~D
12
PC295
0.1U_0603_25V7K~D
1 2
PC275
0.1U_0805_50V7K
12
PR384
0_0402_5%~D
@
1 2
PR379
0_0402_5%~D@
1 2
+
PC289
330U_D3L_6.3VM_R25~D
1
2
PR390
100K_0402_1%~D
@
1 2
PC280
10U_1206_25V6M~D
12
PC294
0.1U_0603_25V7K~D
12
PR395
0_0402_5%~D
12
PC278
2200P_0402_50V7K~D
12
PR388
0_0402_5%~D
1 2
PQ82
FDS8880_NL_SO8~D
S
3D6
D5
D7
D8
S
2
G4
S
1
PR398
39.2K_0402_1%~D
1 2
PR387
1_0603_5%~D
1 2
PD56
BAT54SW-7-F_SOT323-3~D
2
31
PJP35
PAD-OPEN1x1m
12
PC281
10U_1206_25V6M~D
12
PD57
BAT54CW_SOT323~D
3
2
1
PD55
BAT54SW-7-F_SOT323-3~D
2
31
PC296
0.1U_0603_25V7K~D
12
PC282
4.7U_0805_6.3V6K
12
PC385
0.1U_0402_10V7K~D
@
12
PR501
0_0402_5%~D
@
12
PC284
0.1U_0603_25V7K~D
12
PC276
10U_1206_25V6M~D
12
PQ83
BSC079N03S G_PG-TDSON-8~D
S
3
S
2
G
4
S
1
D5
PC291
0.1U_0402_10V7K~D
12
PU20
ISL6236IRZA_QFN32~D
REF 1
TON 2
VCC 3
EN_LDO 4
VREF3 5
VIN 6
LDO 7
LDOREFIN 8
BYP
9
OUT1
10
FB1
11
ILIM1
12
POK1
13
EN1
14
UGATE1
15
PHASE1
16
BOOT1
17
LGATE1
18
PVCC
19
SECFB
20
GND
21
PGND
22
LGATE2
23
BOOT2
24
PHASE2 25
UGATE2 26
EN2 27
POK2 28
SKIP# 29
OUT2 30
ILIM2 31
REFIN2 32
PAD
33
PC277
10U_1206_25V6M~D
12
PC293
0.1U_0603_25V7K~D
1 2
PJP63
PAD-OPEN1x1m
1 2
PJP34
PAD-OPEN1x1m
1 2
PC279
0.1U_0805_50V7K
12
PJP36
PAD-OPEN 4x4m
1 2
+
PC290
330U_D3L_6.3VM_R25~D
1
2
PR374
0_0805_5%
1 2
PQ85
FDS6676AS_NL_SO8~D
4
7
8
6
5
1
2
3
PC403
1U_0603_10V6K~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
1.25V_LGATE
1.8V_LGATE
1.8V_PHASE 1.25V_UGATE
VGA_ISL6236_REF
1.25V_PHASE
+1P8V_1P23V_PWRSRC
1.8V_UGATE
+1.8V_SUSP
GNDA_DC2
+5V_VCC3
GNDA_DC2
+5V_VCC3
+PWR_SRC
GNDA_DC2
GNDA_DC2
GNDA_DC2
GNDA_DC2
+0.9V_P
GNDA_DC2
+5V_ALW
+3.3V_ALW
+1.8V_SUS
GNDA_DC2
+1.25V_RUNP
+5V_ALW
GND
+3.3V_SUS
+1.8V_SUSP +1.8V_SUS
+0.9V_P +0.9V_DDR_VTT
+1.25V_RUNP +1.25V_RUN
+3.3V_ALW
V_DDR_MCH_REF
GNDA_DC2GNDA_DC2
DDR_ON39
1.25V_RUN_PWRGD 42
0.9V_DDR_VTT_ON39
DDR_ON39
1.25V_RUN_ON 39
1.8V_SUS_PWRGD39
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
0.0
P47-PWR_1.25V/1.8V/LDO Vtt 0.9V
46 58Monday, February 26, 2007
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Place these CAPs
close to FETs Place these CAPs
close to FETs
1.8V/1.25V/0.9V VTT
1.25 Volt +/-5%
Thermal Design Current: 1A
Peak current: 1.4A
OCP min:1.72A
PGND and GND sholud be tied
together at one point near the GND Pin
1.8 Volt +/-5%
Thermal Design Current: 5.7A
Peak current: 8.1A
OCP min:8.6A
0.9 Volt +/-5%
Thermal Design Current: 0.7A
Peak current: 1A
PR433
17.4K_0402_1%~D
12
PC335
0.1U_0402_10V7K~D
12
PC333
0.1U_0402_10V7K~D
12
PL43
3.3UH_MPL73-3R3_6A_20%~D
12
PJP50
PAD-OPEN 2x2m~D
2 1
PQ92
FDS6676AS_NL_SO8~D 4
7
8
6
5
1
2
3
PR429
1_0603_5%~D
1 2
PR431
100K_0402_1%~D
@
12
PR518
0_0402_5%~D
1 2
PC406
0.1U_0402_10V7K~D
@ 12
PC338
1U_0603_10V6K~D
12
PC405
0.1U_0402_10V7K~D
@
12
PC322
10U_1206_25V6M~D
12
PR425
51.1K_0402_1%~D
1 2
PC318
10U_1206_25V6M~D
12
PC323
10U_1206_25V6M~D
12
PJP49
PAD-OPEN 4x4m
1 2
PR434
20K_0402_5%~D
1 2
PC343
10U_0805_6.3V6M~D
1 2
PC345
1U_0603_10V6K~D
1 2
PQ90
FDS8880_NL_SO8~D
S
3D6
D5
D7
D8
S
2
G4
S
1
PC410
0.1U_0603_25V7K~D
12
PR432
10_0603_5%~D
@
12
PR419
0_0805_5%
@
1 2
PC319
10U_1206_25V6M~D
12
PC401
1000P_0402_50V7K~D
@
12
PR426
130K_0402_1%~D
1 2
PC339
1U_0603_10V6K~D
12
+
PC334
220U_D2E_2.5VM_R15~D
1
2
PR423
0_0402_5%~D
@
1 2 PQ91
FDS6982AS_NL_SO8~D
S2
1
G2
2
S1 3
G1
4
D2 8
D2 7
D1 6
D1 5
PJP47
PAD-OPEN 2x2m~D
2 1
PR430
0_0603_5%~D
1 2
PJP48
PAD-OPEN 4x4m
1 2
PC348
10U_0805_6.3V6M~D
1 2
PC320
0.1U_0603_25V7K~D
12
PR428
27.4K_0603_1%~D
12
+
PC332
330U_D2E_2.5VM_R15~D
1
2
PR420
0_0402_5%~D
@
1 2
PU22
ISL6236IRZA_QFN32~D
REF 1
TON 2
VCC 3
EN_LDO 4
VREF3 5
VIN 6
LDO 7
LDOREFIN 8
BYP
9
OUT1
10
FB1
11
ILIM1
12
POK1
13
EN1
14
UGATE1
15
PHASE1
16
BOOT1
17
LGATE1
18
PVCC
19
SECFB
20
GND
21
PGND
22
LGATE2
23
BOOT2
24
PHASE2 25
UGATE2 26
EN2 27
POK2 28
SKIP# 29
OUT2 30
ILIM2 31
REFIN2 32
PAD
33
PR424
16.9K_0402_1%~D
1 2
PR418
0_0805_5%
1 2
PR484
100K_0402_1%~D
12
PR421
0_0402_5%~D
1 2
PU24
TPS51100DGQRG4_MSOP10~D
GND 8
VTTREF 6
S3
7
VTTSNS 5
VDDQSNS
1
VLDOIN
2
VTT 3
PGND 4
S5
9
VIN
10
BP 11
PC342
10U_0805_6.3V6M~D
1 2
PC324
0.1U_0603_25V7K~D
12
+
PC331
330U_D2E_2.5VM_R15~D
1
2
PC325
2200P_0402_50V7K~D
12
PC326
0.1U_0603_25V7K~D
1 2
PC321
2200P_0402_50V7K~D
12
PR422
10K_0402_1%~D
1 2
PC329
0.1U_0603_25V7K~D
12
PJP44
PAD-OPEN 4x4m
1 2
PC337
0.1U_0603_25V7K~D
1 2
PC336
0.1U_0603_25V7K~D
1 2
PR427
0_0402_5%~D
1 2
PJP45
PAD-OPEN1x1m
12
PJP66
PAD-OPEN 4x4m
1 2
PL42
1.4UH_HMU1350-1R4PF_15A_20%~D
1 2
3
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
1.05V_UGATE
1.05V_LGATE
1.5V_UGATE
1.5V_LGATE
EN1 EN2
POK2POK1
POK2
1.5V_PHASE
POK1
EN1
EN2
REF
1.05V_PHASE
REFIN2_1_05
+1.5V_RUN_P +1.5V_RUN
+5V_ALW
+1.5V_RUN_P
+1.05V_VCCP_P
+1.05V_VCCP_P +1.05V_VCCP
+5V_VCC2
+5V_VCC2
+3.3V_SUS
+PWR_SRC
GNDA_1P5V_1P05V
GNDA_1P5V_1P05V
GNDA_1P5V_1P05V
GNDA_1P5V_1P05V
GNDA_1P5V_1P05V
GNDA_1P5V_1P05V
+DC2_PWR_SRC
GNDA_1P5V_1P05V
GNDA_1P5V_1P05V
GNDA_1P5V_1P05V
GNDA_1P5V_1P05V
GNDA_1P5V_1P05V
GNDA_1P5V_1P05V
+3.3V_RTC_LDO
1.05V_RUN_PWRGD 42
1.5V_RUN_PWRGD 42
1.05V_RUN_ON 38
1.5V_RUN_ON 39
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
0.0
+1.5V_RUN / +1.05V_VCCP
47 58Monday, February 26, 2007
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+1.5V_RUN / +1.05V_VCCP / +3.3V_ALW / +3.3V_RTC_LDO
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
1.5 Volt +/-5%
Thermal Design Current: 2A
Peak current: 2.8A
OCP min: 2.83A
1.05 Volt +/-5%
Thermal Design Current: 10.8A
Peack current: 15.3A
OCP min: 16.4A
OK to Short if CAD
System can Support
DELL CONFIDENTIAL/PROPRIETARY
PR497
0_0402_5%~D
1 2
PR504
0_0402_5%~D@
12
+
PC312
330U_D2E_2.5VM_R9
1
2
PC301
10U_1206_25V6M~D
12
PC387
0.1U_0402_10V7K~D
@
12
PC297
10U_1206_25V6M~D
12
PC304
2200P_0402_50V7K~D
12
PJP42
PAD-OPEN 4x4m
1 2
PL39
0.88UH_MPC1040LR88_17A_20%~D
1 2
+
PC309
330U_D2E_2.5VM_R9
1
2
PC303
0.1U_0603_25V7K~D
12
PR409
0_0402_5%~D
@
1 2
PR399
0_0805_5%~D
1 2
PJP39
PAD-OPEN 4x4m
1 2
PC302
10U_1206_25V6M~D
12
PR496
0_0402_5%~D
1 2
PC315
0.1U_0603_25V7K~D
1 2
PR408
100K_0402_1%~D
1 2
PC317
1U_0603_10V6K~D
12
+
PC310
330U_D2E_2.5VM_R9
1
2
PC300
2200P_0402_50V7K~D
12
PR400
0_0805_5%~D
1 2
PJP40
PAD-OPEN 4x4m
1 2
PC306
0.1U_0603_25V7K~D
1 2
PC308
0.01U_0402_25V7K~D
12
PL40
3.3UH_MPL73-3R3_6A_20%~D
12
PR478
0_0402_5%~D
1 2
PR519 0_0402_5%~D
12
PC311
10U_1206_6.3V7K
12
PC314
0.1U_0603_25V7K~D
1 2
PR416
100K_0402_1%~D
@
1 2
PQ86
SI4682DY-T1-E3_SO8~D
S
1S
2S
3G
4
D8
D7
D6
D5
PC388
0.1U_0402_10V7K~D
1 2
PR411
1_0603_5%~D
1 2
PR415
100K_0402_1%~D
@
12
PR413
10_0603_5%~D
@
12
PC316
1U_0603_10V6K~D
12
PQ89
SI4810BDY-T1-E3_SO8~D
S
3D6
D5
D7
D8
S
2
G4
S
1
PR401
0_0402_5%~D
1 2
PU21
ISL6236IRZA_QFN32~D
REF 1
TON 2
VCC 3
EN_LDO 4
VREF3 5
VIN 6
LDO 7
LDOREFIN 8
BYP
9
OUT1
10
FB1
11
ILIM1
12
POK1
13
EN1
14
UGATE1
15
PHASE1
16
BOOT1
17
LGATE1
18
PVCC
19
SECFB
20
GND
21
PGND
22
LGATE2
23
BOOT2
24
PHASE2 25
UGATE2 26
EN2 27
POK2 28
SKIP# 29
OUT2 30
ILIM2 31
REFIN2 32
PAD
33
PJP38
PAD-OPEN 4x4m
1 2
PR410
0_0402_5%~D
@
1 2
PQ88
SI4362DY-T1-E3_SO8~D
3 6
5
7
8
2
4
1
PC299
0.1U_0603_25V7K~D
12
PR503
0_0402_5%~D
@
12
PR407 249K_0402_1%~D
1 2
PR405
0_0402_5%~D@
1 2
PC404
0.1U_0402_10V7K~D
@
12
PC389
0.1U_0402_10V7K~D
1 2
PJP41
PAD-OPEN1x1m
12
PJP43
PAD-OPEN 4x4m
1 2
PQ87
SI4800BDY-T1_SO8~D
3 6
5
7
8
2
4
1
PC313
10U_1206_6.3V7K
12
PR412
1_0603_5%~D
1 2
PC305
0.1U_0603_25V7K~D
1 2
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
H H
G G
F F
E E
D D
C C
B B
A A
VO
UGATE1
UGATE2
UGATE3
VSUM
VO
VSUM
VSUM
VO
PHASE2
VO
VSUM
PHASE1
PHASE3
LGATE1
LGATE2
LGATE3
+5V_ALW
+5V_ALW
+CPU_PWR_SRC
+5V_ALW
+3.3V_RUN
+5V_ALW
GNDA_VCORE
GNDA_VCORE
GNDA_VCORE
GNDA_VCORE
GNDA_VCORE
GNDA_VCORE
GNDA_VCORE
GNDA_VCORE
+VCC_CORE
+CPU_PWR_SRC
+CPU_PWR_SRC
+VCC_CORE
+CPU_PWR_SRC
+VCC_CORE
+PWR_SRC
GNDA_VCORE
CLK_ENABLE#
GNDA_VCORE
VID08VID18VID28
VID48VID38
VID58VID68
H_DPRSTP#8,10,22
DPRSLPVR10,23
H_PSI#8
RUNPWROK38,39,42
VSSSENSE8
IMVP_PWRGD 23,39,42
IMVP6_PROCHOT#38
PWR_MON18
VCCSENSE8
IMVP_VR_ON39
PWR_MON 18
Title
Size Document Number Re v
Date: Sheet of
LA-3301P
0.0
+VCORE
48 58Monday, February 26, 2007
Compal Electronics, Inc.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
Iccmax=44A
I_TDC=35A
OCP=65A, Intel spec=50A
PR232
10_0402_1%~D
1 2
PR261
2.43K_0402_1%~D
12
PR482
30K_0402_5%~D
@
12
PR254 0_0402_5%~D@
12
PR513
0_0402_5%~D
12
PC179
0.22U_0603_10V7K~D
1 2
PC178
1U_0603_10V6K~D
12
PR258
1.69K_0402_1%~D
12
PH3
10KB_0603_1%_ERTJ1VG103FA~D
@
12
PQ61
FDS7088SN3_SO8~D
G
2
D3
S
1
PR243
0_0402_5%~D
12
PQ57
IRF7821TRPBF_SO8~D
G
4S
3S
2S
1
D5
D6
D7
D8
PC213 1000P_0402_50V7K~D
12
PC250
1500P_0402_50V7K~D
1 2
PR270
7.68K_0805_1%~D
1 2
PC246
1500P_0603_25V7K~D
@
12
PR329
10_0402_1%~D
1 2
PU16
ISL6208CRZ-T_QFN8~D
BOOT 1
FCCM
6
VCC
5
PWM
2
LGATE 4
GND
3
PHASE 7
UGATE 8
PR264
6.34K_0402_1%~D
12
PC392
0.1U_0402_16V7K~D
@
1
2
PH2
6.8KB_0603_5%_ERTJ1VR682J~D
12
PR263
4.53K_0402_1%~D
12
PL44
FBMA-L18-453215-900LMA90T_1812~D
@
1 2
PC260
0.1U_0402_16V7K~D
@
1
2
PC214 1000P_0402_50V7K~D
12
PC391
1U_0603_10V6K~D
1 2
PR330
10K_0402_1%~D
1 2
PR269
10K_0402_1%~D
1 2
PR267
10.5K_0402_1%
12
PJP31
PAD-OPEN 4x4m
1 2
PR268
1K_0402_1%~D
12
PR290
0_0603_5%~D
12
PC272
10U_1206_25V6M~D
12
PC271
10U_1206_25V6M~D
12
PR259
82.5K_0402_1%~D
12
PR252
10K_0402_5%~D
12
PC182
1U_0603_10V6K~D
12
PR242
0_0402_5%~D
12
PC180
0.01U_0402_25V7K~D
12
PQ56
FDS7088SN3_SO8~D
G
2
D3
S
1
PC270
10U_1206_25V6M~D
12
PC181
0.22U_0603_10V7K~D
12
PR230
10K_0402_1%~D
1 2
PQ42
IRF7821TRPBF_SO8~D
G
4S
3S
2S
1
D5
D6
D7
D8
PC409
2200P_0402_50V7K~D
@
12
PR260
11.5K_0402_1%~D
12
PC198
0.22U_0603_10V7K~D
1 2
PC240
2200P_0402_50V7K~D
12
PC176
10U_1206_25V6M~D
12
PC190
680P_0402_50V7K~D
1 2
PR262
0_0603_5%~D
12
PC249
0.1U_0603_25V7K~D
12
PR228
10_0603_5%~D
1 2
PQ50
IRF7821TRPBF_SO8~D
G
4S
3S
2S
1
D5
D6
D7
D8
PR257
332_0402_1%~D
12
PC229
0.01U_0402_16V7K~D
1
2
PC196
1U_0603_10V6K~D
12
PC248
1500P_0603_25V7K~D
@
12
PR241
0_0402_5%~D
12
PR266
15K_0402_1%~D
12
PC412
4700P_0402_25V7K~D
@
12
PR240
0_0402_5%~D
12
PC239
0.1U_0603_25V7K~D
12
PC223
0.1U_0603_25V7K~D
12
PR239
0_0402_5%~D
12
PR508
226K_0402_1%~D
@
12
PR231
7.68K_0805_1%~D
1 2
PC193
10U_1206_25V6M~D
12
PR249
0_0402_5%~D
12
PR479
0_0402_5%~D
@
12
PR487
0_0402_5%~D
12
PC215
0.033U_0402_16V7K~D
1 2
PR515
0_0402_5%~D
12
PU10
ISL6208CRZ-T_QFN8~D
BOOT 1
FCCM
6
VCC
5
PWM
2
LGATE 4
GND
3
PHASE 7
UGATE 8
PL33
0.45UH_ETQP4LR45XFC_25A_20%~D
1
3
4
2
PR485
13K_0402_5%~D
@
12
+
PC380
100U_25V_M~D
1
2
PC411
4700P_0402_25V7K~D
@
12
PC187
0.015U_0402_16V7K~D
12
PR233
10_0603_5%~D
1 2
PR509 0_0402_5%~D
12
PR284
0_0402_5%~D
@
12
PR271
10_0402_1%~D
1 2
PR248
499_0402_1%~D
12
PU11
ISL6260CCRZ_QFN40~D
VW
8
PMON
2
PSI#
1
DPRSLPVR
36
DPRSTP#
37
VID6
34 VID5
33
RTN
13
FB
10
COMP
9
VSS 19
VDIFF
11
DFB
15
VO
16
ISEN3 21
OCSET 7
PWM3 25
FCCM 24
CLK_EN#
38
VR_TT#
4
RBIAS
3
NTC
5
SOFT
6
VID0
28
VID1
29
VID2
30
VID3
31
VID4
32
3V3 39
VSUM 17
VSEN
12
VR_ON
35
PWM1 27
ISEN2 22
ISEN1 23
PWM2 26
DROOP
14
VDD 20
VIN 18
PGOOD 40
GND
41
PU13
ISL6208CRZ-T_QFN8~D
BOOT 1
FCCM
6
VCC
5
PWM
2
LGATE 4
GND
3
PHASE 7
UGATE 8
PC200
0.22U_0603_10V7K~D
12
PC227
0.1U_0603_25V7K~D
12
PC413
0.01U_0402_16V7K~D
1
2
PR331
7.68K_0805_1%~D
1 2
PR481
0_0402_5%~D
@
12
PL29
0.45UH_ETQP4LR45XFC_25A_20%~D
1
3
4
2
PC243
0.22U_0603_10V7K~D
12
PC195
220P_0402_50V8J~D
1 2
PC201
330P_0402_50V7K~D
12
PR245
0_0402_5%~D
12
PR229
0_0603_5%~D
12
PR486
4.99K_0402_1%@
12
PQ60
FDS7088SN3_SO8~D
G
2
D3
S
1
PH1
470KB_0402_5%_NCP15WM474J03RB~D
@
12
PJP30
PAD-OPEN 4x4m
1 2
PR287
0_0603_5%~D
12
PC197
1000P_0402_50V7K~D
12
PC191
0.33U_0603_10V7K
1
2
PR238
147K_0402_1%~D
12
PC241
1U_0603_10V6K~D
12
PC228
2200P_0402_50V7K~D
12
PC247
1500P_0603_25V7K~D
@
12
PC224
2200P_0402_50V7K~D
12
PR234
1.91K_0603_1%~D
1 2
PR514
0_0402_5%~D
12
PR512
0_0402_5%~D
12
PR328
0_0603_5%~D
12
PR244
0_0402_5%~D
12
PR480
0_0402_5%~D
@
12
PL31
0.45UH_ETQP4LR45XFC_25A_20%~D
1
3
4
2
PC242
0.22U_0603_10V7K~D
1 2
PR516
1K_0402_1%~D
12
PC177
10U_1206_25V6M~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ISL88731_ICM
ISL88731_VREF
ISL88731_VDDP
CHG_LGATE
ISL88731_VDDP
CHG_UGATE
+VCHGR_L
ISL88731_VREF
ISL88731_ICM
+VCHGR_B
+VCHGR
+DC_IN_SS
+5V_ALW
CHAGER_SRC
+SDC_IN
+5V_ALW +3.3V_ALW
+5V_ALW
+5V_ALW
+VCHGR
GNDA_CHG
GNDA_CHG
GNDA_CHG
GNDA_CHG
GNDA_CHG
GNDA_CHG
GNDA_CHG GNDA_CHG
GNDA_CHG GNDA_CHG GNDA_CHG GNDA_CHG
GNDA_CHG GNDA_CHG GNDA_CHG
GNDA_CHG GNDA_CHG
GNDA_CHG
GNDA_CHG
GNDA_CHG
+5V_ALW
ACAV_IN18,39,50
ADAPT_OC 38
ADAPT_TRIP_SET38
THRM_SMBDAT18,39
THRM_SMBCLK18,39
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
0.0
Charger
49 58Monday, February 26, 2007
Compal Electronics, Inc.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
+DC_IN discharge path
Vin Detector
High 17.9 V
Low 17.24 V
Maximum charging current is 6.24A
PC112
0.1U_0603_25V7K~D
12
PR363
13K_0402_1%
12
PR150
16.2K_0402_1%~D
@
12
PC127
2200P_0402_50V7K~D
@
12
PC384
0.22U_0402_6.3V6K
1 2
PR362
57.6K_0402_1%~D
12
PU19A
LM393DR_SO8~D
IN+
3
IN-
2
O1
P
8G4
1SS355_SOD323~D
PD54
@
21
PR368
0_0603_5%~D
1 2
PC212
0.01U_0402_25V7K~D
@
12
PR149
10K_0402_1%~D
12
PC258
0.01U_0402_25V7K~D
12
PC99
10U_1206_25V6M~D
12
PC114
10U_1206_25V6M~D
12
PD40
RB751V_SOD323~D
@
2 1
PC120
0.1U_0402_10V7K~D
@
12
PC253
220P_0402_50V7K~D
@
12
PC128
0.1U_0603_25V7K~D
@
12
PC254
0.1U_0402_25V7K~D
12
PR473
10_0402_1%~D
12
PR138
0.01_2512_1%~D
4
2
1
3
PC256
100P_0402_50V8K
12
PC379
10U_1206_25V6M~D
12
PC122
1U_0603_10V6K~D
@
12
PR145
0.01_2512_1%~D
4
2
1
3
PR475
33.2K_0402_1%~D
@
1 2
PR361
8.45K_0402_5%~D
1 2
PR341
15.8K_0402_1%~D
12
PC121
0.1U_0402_10V7K~D
@
12
G
D
S
PQ81
RHU002N06_SOT323
2
13
PC119
0.01U_0402_25V7K~D
12
PJP65
PAD-OPEN1x1m
1 2
PC106
10U_1206_25V6M~D
12
PR373
1K_0603_1%~D
@
12
PU19B
LM393DR_SO8~D
IN+
5
IN-
6O7
P8
G
4
PC110
0.01U_0402_25V7K~D
12
PC221
0.1U_0402_10V7K~D
12
PU8
ISL88731_TQFN28~D
UGATE 24
CSOP 18
PHASE 23
VFB 15
SDA
9
ICM
8
NC 1
DCIN
22
ACIN
2
VDDSMB
11
SCL
10
ACOK
13
NC
14
BOOT 25
NC 16
ICOMP
4
VDDP 21
VCC 26
CSSP 28
CSON 17
PGND 19
LGATE 20
VCOMP
6
NC
5
CSSN 27
VREF
3
NC
7
GND
12
GND
29
PR472
10_0402_1%~D
12
PC113
10U_1206_25V6M~D
12
PR364
105_0402_1%~D
12
PC257
100P_0402_50V8K
12
PJP62
PAD-OPEN 4x4m
1 2
PC104
0.1U_0603_25V7K~D
12
PL20
5.6U_HMU1356-5R6_8.8A_20%~D
12
PR275
0_0603_5%~D
1 2
PQ75
SI4800BDY-T1_SO8~D
3 6
5
7
8
2
4
1
PR366
100K_0402_1%~D
12
PC259
10P_0402_50V8J~D
@
12
PC267
3300PF_0402_50V7K~D
@
12
PR274
33_0603_1%~D
1 2
PC103
2200P_0402_50V7K~D
12
PC118
0.01U_0402_25V7K~D
12
PR474
1K_0402_5%~D
@
12
PC204
1U_0603_10V6K~D
1 2
PQ79
SI4800BDY-T1_SO8~D
3 6
5
7
8
2
4
1
PC202
1U_0603_10V6K~D
1 2
PC102
1U_0805_25V4Z~D
12
PR360
0_0603_1%~D
12
PR148
2.2K_0402_5%~D
12
PC255
100P_0402_50V8K
12
PR143
49.9K_0402_1%~D
12
PC105
10U_1206_25V6M~D
12
PC393
0.01U_0402_25V7K~D
12
PR146
0_0402_5%~D
1 2
PR367
100K_0402_5%~D
12
PC203
0.1U_0603_25V7K~D
12
PC383
0.22U_0402_6.3V6K
1 2
PR365
1M_0402_1%~D
1 2
PR142
215K_0402_1%
1 2
PQ76
SI4810BDY-T1-E3_SO8~D
S
3D6
D5
D7
D8
S
2
G
4
S
1
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PBAT_G
CHG_PBAT_N
CHG_PBATT_N
CHG_SBATT_N
CHG_SBATT_N
CHG_SBAT
SBAT_G
CHG_PBAT
CHG_SBAT_N
+SDC_IN
+VCHGR
+PWR_SRC
+VCHGR
+PWR_SRC
PBATT+
PBATT+
SBATT+
+3.3V_ALW
+3.3V_ALW +3.3V_ALW
SBATT+
PBATT+
CHG_PBATT38
CHG_SBATT38
ACAV_IN18,39,49
SBAT_PRES#38,44
PBAT_DSCHG38
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
0.0
Selector
50 58Wednesday, February 28, 2007
Compal Electronics, Inc.
+DC_IN discharge path
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
G
D
S
PQ74
RHU002N06_SOT323
2
13
G
D
S
PQ64
RHU002N06_SOT323
2
13
G
D
S
PQ68
RHU002N06_SOT323
2
1 3
PQ70
SI4835BDY-T1-E3_SO8~D
36
5
7
82
4
1
PR319
47K_0402_1%~D
1 2
G
D
S
PQ73
RHU002N06_SOT323
2
13
PQ71
SI4835BDY-T1-E3_SO8~D
36
5
7
82
4
1
PQ69
SI4835BDY-T1-E3_SO8~D
3 6
5
7
8
2
4
1
PQ62
SI4835BDY-T1-E3_SO8~D
36
5
7
82
4
1
PU15
TC7SH32FU_SSOP5~D
I0
2
I1
1O4
P5
G
3
PC234
0.1U_0603_25V7K~D
1 2
PR324
10K_0402_5%~D
1 2
PR305
10K_0402_5%~D
1 2
G
D
S
PQ63
RHU002N06_SOT323
2
13
PR318
33K_0402_5%~D
1 2
PR320
470K_0402_5%~D
12
PD50
RB715F_SOT323
2
31
PD47
B540C~D
2 1
+
PC382
100U_25V_M~D
1
2
PR312
10K_0402_5%~D
12
PC232
2200P_0402_50V7K~D
12
PR321
147K_0402_1%~D
1 2
PU14B
LM393DR_SO8~D
IN+
5
IN-
6O7
P8
G
4
PR310
100K_0402_5%~D
12
PR317
10K_0402_5%~D
12
PQ72
SI4835BDY-T1-E3_SO8~D
3 6
5
7
8
2
4
1
PD51
RB715F_SOT323
2
3
1
PR308
100K_0402_5%~D
@
12
PR326
32.4K_0402_1%~D
1 2
PR322
100K_0402_5%~D
1 2
PR325
100K_0402_5%~D
1 2
PR311
33K_0402_5%~D
1 2
PC236
0.1U_0603_25V7K~D
@
1 2
PQ66
SI4835BDY-T1-E3_SO8~D
36
5
7
82
4
1
PR323
42.2K_0402_1%~D
1 2
PR306
10K_0402_5%~D
12
PD48
RB715F_SOT323
2
31
FDS4935BZ_SO8~D
PQ65
G2 2
D2
8
S1 3
D1
5
S2 1
D2
7
G1 4
D1
6
PU14A
LM393DR_SO8~D
IN+
3
IN-
2O1
P8
G
4
PR307
100K_0402_5%~D
12
PC233
0.1U_0603_25V7K~D
12
PR309
10K_0402_5%~D
12
PC237
0.1U_0603_25V7K~D
1 2
PR314
470K_0402_5%~D
1 2
PR313
100K_0402_5%~D
12
PC235
0.1U_0603_25V7K~D
1 2
PR315
470K_0402_5%~D
12
+
PC381
100U_25V_M~D
1
2
PR316
47K_0402_1%~D
1 2
PD49
B540C~D
2 1
G
D
S
PQ67
RHU002N06_SOT323
2
13
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SDVOB_GREEN+
DVI_TX2+
SDVOB_BLUE+
INT-
SDVOB_RED-
DVI_TX2-
+VSWING
DVI_SCLK
DVI_TX1-
DVI_TX0-
DVI_CLK+
SDVOB_BLUE-
DVI_TX1+
DVI_CLK-
SDVOB_GREEN-
DVI_TX0+
INT+
DVI_SDATA
SDVOB_RED+
DVI_TX2-
DVI_TX1-
DVI_TX0+
DVI_TX0-
DVI_CLK+
DVI_CLK-
+VCC
+SPVCC
+SVCC
+PVCC1
+PVCC2
+AVCC
DVI_TX2+
DVI_TX1+
SDVO_CTRLCLK
SDVO_CTRLDATA
+1.8V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+AVCC
+3.3V_RUN
+5V_RUN
+1.8V_RUN
+AVCC
+3.3V_RUN
SDVOB_BLUE+12
SDVOB_INT+12 SDVOB_INT-12
SDVOB_RED+12 SDVOB_RED-12
PLTRST1#10,21
SDVOB_CLK+12
SDVOB_GREEN+12
SDVOB_CLK-12
SDVOB_GREEN-12
DVI_DETECT36
SDVOB_BLUE-12
SDVO_CTRLDATA 10
SDVO_CTRLCLK 10
DVI_SDATA 36
DVI_SCLK 36
DVI_TX2+ 36
DVI_TX2- 36
DVI_TX1+ 36
DVI_TX1- 36
DVI_TX0- 36
DVI_TX0+ 36
DVI_CLK- 36
DVI_CLK+ 36
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
Internal LVDS
51 58Monday, February 26, 2007
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
A1 LOW: Address = 0x70
HIGH: Address = 0x72
SDVO_CTRLCLK, SDVO_CTRLDATA
level is 2.5V
C977
1000P_0402_50V7K~D
@
1
2
R723
1K_0402_5%~D
1 2
R412
0_0402_5%~D
1 2
C998
0.1U_0402_16V4Z~D
1
2
L79
BLM18PG181SN1_0603~D
12
R720
2.2K_0402_5%~D
12
C971
0.1U_0402_16V4Z~D
12
C974
10U_0805_10V4Z~D
1
2
C979
0.1U_0402_16V4Z~D
1
2
C996
100P_0402_50V8J~D
@
1
2
L82
BLM18PG181SN1_0603~D
12
R718
110_0402_1%~D
1 2
C978
0.1U_0402_16V4Z~D
1
2
C968
0.1U_0402_16V4Z~D
12
R719
2.2K_0402_5%~D
12
L80
BLM18PG181SN1_0603~D
12
C976
100P_0402_50V8J~D
@
1
2
R715
110_0402_1%~D
1 2
C995
10U_0805_10V4Z~D
1
2
C980
0.1U_0402_16V4Z~D
1
2
R716
110_0402_1%~D
1 2
C972
0.1U_0402_16V4Z~D
1
2
C986
10U_0805_10V4Z~D
1
2
L81
BLM18PG181SN1_0603~D
12
C982
10U_0805_10V4Z~D
1
2
C999 0.1U_0402_10V7K~D
1 2
C973
0.1U_0402_16V4Z~D
1
2
C970
0.1U_0402_16V4Z~D
12
C989
0.1U_0402_16V4Z~D
1
2
R717
110_0402_1%~D
1 2
U47
SII1362ACTU_LQFP48~D
HTPLG
29
PGND2
27
SDI+
32
SDI-
33
EXT_RES
35
SDADDC 9
SCLDDC 8
SDSCL 5
SDSDA 4
SDR+
37
SDR-
38
SDG+
40
SDG-
41
SDB+
43
SDB-
44
SDC+
46
SDC-
47
SPGND
3
RESET#
2
PVCC2 26
EXT_SWING
25
PVCC1 11
VCC 10
VCC 34
AGND
12
VCC 28
OVCC 1
AVCC 15
AVCC 21
SVCC 36
SVCC 42
SPVCC 48
GND
7
TEST
30
GND
31
SGND
39
SGND
45
AGND
18
AGND
24
A1 6
TXC- 13
TXC+ 14
TX0- 16
TX0+ 17
TX1- 19
TX1+ 20
TX2- 22
TX2+ 23
R813
16.5K_0402_1%~D
12
C994 0.1U_0402_10V7K~D
1 2
C975
10U_0805_10V4Z~D
1
2
L77
BLM18PG181SN1_0603~D
12
C984
100P_0402_50V8J~D
@
1
2
R724
1K_0402_5%~D
12
C993
0.1U_0402_16V4Z~D
1
2
L78
BLM18PG181SN1_0603~D
12
C983
1000P_0402_50V7K~D
@
1
2
R812
16.5K_0402_1%~D
12
C985
0.1U_0402_16V4Z~D
1
2
C987
100P_0402_50V8J~D
@
1
2
C969
0.1U_0402_16V4Z~D
12
R253
5.23K_0402_1%~D
12
C991
0.1U_0402_16V4Z~D
1
2
R721 220_0402_5%~D
12
C990
10U_0805_10V4Z~D
1
2
C992
0.1U_0402_16V4Z~D
1
2
C981
10U_0805_10V4Z~D
1
2
C988
1000P_0402_50V7K~D
@
1
2
C997
1000P_0402_50V7K~D
@
1
2
R722 1K_0402_5%~D@ 1 2
R254
5.23K_0402_1%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
Changed-List History
52 58Wednesday, February 14, 2007
Compal Electronics, Inc.
Version Change List ( P. I. R. List )
Item Issue DescriptionDate Request
Owner Solution Description Rev.Page#
1
Title
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
08/2/200638 HW Compal BID change to X01 Pop R108, depop R106 X01
HW18 X01Change Q102, to SOT323 packageChange SOT23 package to SOT323 packageCompal08/10/20062
73 08/21/2006 Compal BITS issue WI86517 (S5 state back driver issue) Change R324 pin1 connect from +3.3V_ALW to +3.3V_SUS
4 08/21/2006 Compal Bits issue WI84312 (Derating issue) Change R151 from 30 ohm to 75 ohm
HW
HW
X01
X01
5 23 08/21/2006 Compal Bits issue WI86509 Populate R761 and change value from 100k to 10k.
Change R761 pin1 connect from +3.3V_ALW to +3.3V_SUS
HW X01
41
6 12 08/21/2006 Compal Bits issue WI86510 Remove R390, R393. Connect LCTLA_CLK and LCTLB_DATA to
GND
HW X01
739 08/21/2006 Compal Bits issue WI86511 Add R401 (100K) for signal BC_DAT pull up to +3.3V_ALWHW X01
8 Bits issue WI86512Compal08/21/200637 X01Change R131 to no-stuff and from 4.7k to 100k per SMSC HW
9 23 08/21/2006 Compal Bits issue WI86516 R509 PU for SIO_EXT_SMI# change from +3.3V_ALW to
+3.3V_SUS to prevent backdrive through the ICH in S4/S5
HW X01
10 08/21/2006 Compal Bits issue WI86518 Swap PSID GPIO from ECE5018 pin 71 with MEC5025
ITP_DBRESET#/HDT_RESET# pin 55
HW X0138,39
11 08/21/2006 Compal Bits issue WI86531 Move BEEP (ECE5018 GPIOB[6]) to SGPIO46 of MEC502538,39 HW X01
Bits issue WI86752Compal08/21/2006
12 X01Change pull-up rail for R773 from +5V_SUS to +3.3V_SUSHW18
08/30/2006 Compal Bits issue WI86530
13 21 HW Move SB_NB_PCIE_RST# to GPIO4/PIRQG# pinF12 per M08
design, add R631 (20K ohm) for pull down X01
09/7/2006 Compal Bits issue WI86529
14 21 HW X01
Move SB_WLAN_PCIE_RST# to GPIO3/PIRQF# U32 pin G11 per
M08 direction, add test point T1 on pin F18
09/7/2006 Compal Bits issue WI86376. Due to increase in number of
payloads the BIOS is carrying
15 39 HW X01
Change U23 from ( ST M25P80 8M bit ) to ) MXIC
MX25L1605AM2C 16M bit )
09/11/2006
Change Q5 to MMBT3906WT1G, R15 to 150 ohm. Add R638 on
LED_WLAN_OUT# pull up to +3.3V_WLAN. Add R639 (10K ohm)
in series on LED_WLAN_OUT#
16 43 Compal Bits issue WI90535 X01HW
09/14/2006 Remove ITP port and just keep ITP test point 17 7 Compal Briscoe ESD/EMI Improvement Requests on PT X01HW
18 43 HW 09/14/2006 X01Remove R73, R178, C192, and C193Compal Bits issue WI90709
19 34 HW 09/14/2006 X01
Add SMBus isolation circuit for WLAN,
R640,R645,R660,R662,Q45,Q46
Compal Bits issue WI90705
20 34 HW 09/14/2006 JMINI1 connect to +3.3V_RUN. Removed C427 X01Compal Bits issue WI90691
21 12 HW 09/14/2006 X01
Add C181,C192,C193,C196,C207,C209,R667,R685,R686,
R687,R688 cross LVDS signals
Compal Shunt caps on LVDS for improving WWAN
22 27 HW 09/14/2006 Compal Bits issue WI90516 Remove C759 from mic amp bias circuit X01
2623 Populate R541to cut BEEP level in halfBits issue WI9048709/14/2006 CompalHW X01
24 43 09/14/2006 Compal Bits issue WI89631 populate EMI Clips Clip1, Clip2, Clip3, Clip4, Clip5,
Clip6
HW X01
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
Changed-List History
53 58Wednesday, February 14, 2007
Compal Electronics, Inc.
Version Change List ( P. I. R. List )
Item Issue DescriptionDate Request
Owner Solution Description Rev.Page#
25
Title
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
09/14/200623 HW Compal Bits issue WI89409 No stuff R516, add R690 (8.2K ohm) for pull up ICH8 pin
AF22 to +3.3V_SUS X01
25 HW Add Q68, Q69, R691, R692 for HDDC_EN and MODC_EN
circuits
26 09/14/2006 Compal Bits issue WI89407 X01
27 41 HW 09/14/2006 Change connect R765 pin1, R623 pin1, R621 pin1, R766
pin1 from +5V_ALW to +5V_ALW2
Compal Bits issue WI89394 X01
28 37,39 HW 09/14/2006 Change R387,R389 from 1M to 2.7K. Add R778,R779 for
AUX_ON,AC_OFF
Compal Bits issue WI89379 X01
09/15/20063429 X01No stuff C16Bits issue WI90698CompalHW
Change R730 from 100K to 4.7K ohm3930 X01Bits issue WI92249Compal09/15/2006HW
31 34 Bits issue WI92288,WI90714 X01HW 09/15/2006 Compal
32 EMI solutions Populate RS232 C152,153,154,155,156,157,158,159. Resume
ICH_AZ_MDC_BITCLK C656,R123,C128. Add R790,R791,C232,
C267. Change L63,L65 from 0603size to 0805size. Add
C309,C316 for LOM. Add C427,C463 for LVDS. Add fuse F3,
R792 for CRT. Populate C660, R545 (10 ohm),C721 (10P)
X0137,22,
33,28,
19,20
HW 09/15/2006 Compal
33 23,36 HW Bits issue WI92298 Move SIO_EXT_SCI# from to ICH8 GPIO11/SMBALERT# pin AG22
to GPO12 pin AC19. Remove D22 and R761 and net DOCK_DET# X0109/18/2006 Compal
2334
X01
ICH8 Pin AG22 tie to LOM_ICH_SMBALERT#. Add R793 (0 ohm)
series on LOM_ICH_SMBALERT# and LOM_SMB_ALERT#. Change
R730 pull up rail from +3.3V_ALW to +3.3V_LAN. Add R807
pull up to +3.3V_SUS for LOM_ICH_SMBALERT#
Bits issue WI9229909/18/2006HW Compal
35 X01
Move ALW_PWRGD_3V_5V from MEC5025 pin 18 to MEC5025
pin 29. Remove 3.3V_5V_SUS_PWRGD from MEC5025 pin 29
39 HW 09/18/2006 Compal Bits issue WI92301
36 X01
Swap DOCK_SMB_PME and DOCK_SMB_ALERT# from MEC5025 pin3
and ECE5028 pin76
09/18/2006HW38,39 Bits issue WI92305Compal
37 X01
Removed 3.3V_LAN_PWRGD from MEC5025 KSO15/GPIO5.
Remove U52,Q83,D29,R89,R98,R381,C784,C182,C183,C184
39,42 HW 09/18/2006 Compal Bits issue WI92308
38 Compal39 HW 09/18/2006 X01Add R795 (0 ohm) pull down for MEC5025 pin 14Bits issue WI92312
R660 and R662 connected to CLK_SCLK and CLK_SDATA.
Compal2939 X01
Populate R671~R678 and C866~C869. Change L69~L76 from
24NH to 36NH inductor
EMI issue09/19/2006HW
40 CompalHW27 X01Add R796,R797 (0ohm) between L47/L48 and C728/C730Bits issue WI9051009/19/2006
41 HW Compal6 09/20/2006 Bits issue WI93162 NC JITP pin 1,2,3,5,7,11,12,13,15,17,19,21,23. Add test
point T47~T52 for ITP_BPM#0~ITP_BPM#5. Remove R322 X01
X01
Change R669 to from 1.15K to 1.13K. Depop C771 & C772.
Change C861 and C862 to 22pF
Bits issue WI92858HW Compal09/20/20062842
HW Bits issue WI92857 Add no-stuff series 0-ohm for ITP_DBRESET# on ECE5028
43 38 X0109/20/2006 Compal
HW
44 WWAN noise issue Add R808,R809,R810,R811 series for LCD_DDCCLK,
LCD_DDCDATA, LCD_SMBCLK, LCD_SMBDAT
19 09/20/2006 Compal X01
Remove R586 and make JMDC pin2 NCBits issue WI93157HW X01Compal09/21/20063345
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
Changed-List History
54 58Wednesday, February 14, 2007
Compal Electronics, Inc.
Version Change List ( P. I. R. List )
Item Issue DescriptionDate Request
Owner Solution Description Rev.Page# Title
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
HW46 Bits issue WI93158 Depop Q45, Q4634 09/21/2006 Compal X01
47 HW Bits issue WI93586 Add R812,R813 (9.09K ohm) and chagne R253,R254 to 2.94K
ohm for SDVO_CTRLCLK /DAT voltage divider
51 09/22/2006 Compal X01
HW C484 change to 33pF, C861/C862 change to 22pF Bits issue WI9340348 X01Compal09/25/20066
49 HW Bits issue DF86424 No Populate C866-C869/R671-R678
29 09/26/2006 Compal X01
50 HW EMI request Add D37-D40 for stick point signals
40 09/26/2006 Compal X01
51 32 HW EMI request Add FUSE4,FUSE509/27/2006 Compal X01
52 18 HW Bits issue WI94892 Populate R771, C750, R772, Q102, R77310/05/2006 Compal X01
53 30 HW 10/05/2006 Compal Bits issue WI95910 Change R603 from 6.2k to 5.9k.
Change C805 from 820pF to 270pF X01
54 10/05/2006
No stuff R227, R221, C89, C93, C97, c401, C92, r72,
C90, C88. Change R369 to 3.3K 1%. No stuff C775-C781,
C785. No stuff R514 (no iAMT). Populate R515.
38,23
12,27,6 HW Compal Bits issue WI95932 X01
HW55 Dell10/14/2006 Bits issue WI97539 Added signal DOCK_DET# to JDOCKBpin137, pin205 and
Q3pin2 X0236
HW 10/17/2006 Dell Bits issue WI97840 Add 0.1 uf (0402) caps on +Vcc_Core to Gnd. Four
total, bottom of board. (C870 ~ C873)
56 9 X02
HW 10/18/2006 Dell Bits issue WI98222 (Change for ASF2.0 due to ICH8M errata )2357 1. No stuff R502, R503
2. Connect the pad of R503.2 to the pad of R498.2
3. Connect the pad of R502.1 to the pad of R499.2
X02
Board ID Changed to X02Dell10/24/2006HW3858 Populated R106, R107. Depopulated R108, R109. X02
HW 10/27/2006 Dell Bits issue WI100037. Intel CRT noise issue59 13 Change L36 to 100 ohm resistor and change C722 to 22nF.
Replace C569 with a 0603 1uF cap X02
HW 10/30/2006 Dell60 23 Bits issue WI100049 X02
61 51 HW 11/2/2006 Dell Bits issue WI100826 Change Change R812, R813 from 9.09K_1% to 13.7K_1%.
Change R253, R254 from 2.94K_1% to 4.32K_1% X02
62 28 HW 11/7/2006 Dell Bits issue WI102451 Change L64,L66,L67,L68 from BLM18AG601SN1D to
BK1608LM182. Change R668 to L88 BK1608LM182.Change L63,
L65 from BLM21AG601SN1D to BK2125LM182. Chagne
C850,C852,C856,C858 to 47pF caps. Change C849 to 1000pF.
Populate C863, C864
X02
63 6,23,34 HW 11/8/2006 Dell Bits issue WI103311 Change R309 from 8.2K to 2.2K. No stuff R820.
No stuff R550 X02
64 2 HW 11/8/2006 Dell Correct Block diagram Correct block diagram X02
65 39 HW 11/14/2006 Dell Bits issue WI103986 Change C379 from 22pF to 33pF per KDS X'tal report X02
Add R816,C874 for USB_IDE#. R817,C875 for SIO_EXT_WAKE#.
R819,C876 for PCIE_MCARD1_DET#. R820,C878 for
USB_MCARD1_DET#. R818,C877 for USB_MCARD2_DET#. Remove
net RSVD_GPIO6 and R513
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
Changed-List History
55 58Wednesday, March 07, 2007
Compal Electronics, Inc.
Version Change List ( P. I. R. List )
Item Issue DescriptionDate Request
Owner Solution Description Rev.Page# Title
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
HW89 Bits issue WI125145.DPST enablement for UMA Populate R156 (0_0402_5%)19 2/28/2007 Compal A00
90 HW Bits issue WI125577 Populate R92. Depop R9339 3/1/2007 Compal A00
91 HW Bits issue WI125883 Add note "C533,C534,C536,C545,C553,C579 are being
replaced by 0-ohm 0805 resistor" on page 13
13 3/1/2007 Compal A00
92 HW Bits issue WI12729718 3/7/2007 Compal Populate R441 A00
93 27 HW A00Change U40 from 74AHC1G08 to 74AHCT1G083/7/2007 Dell Bits issue WI127300
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
1.0
Changed-List History
55 58Wednesday, February 28, 2007
Compal Electronics, Inc.
Version Change List ( P. I. R. List )
Item Issue DescriptionDate Request
Owner Solution Description Rev.Page# Title
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
HW66 Bits issue WI105207 Change net name from +5V_ALW2 to +3.3V_ALW2 at R618.1,
R626.1, R623.1, R621.1, R766.1, R765.1
25,41 11/20/2006 Compal X03
38,39 HW 11/21/2006 Dell Change R794 pin1 from +5V_ALW to +3.3V_ALW.
Change R245 pin1 from +3.3V_ALW to +5V_ALW X0367 Bits issue WI105754
Add 100kohm resistor R721 between U35 pin 40 and
+3.3V_RUN and 1000pF cap C759
Dell11/21/2006HW26 X03
Bits issue WI105758. Updates for potential Back Drive 68
Change R253, R254 from 2.94K_1% to 5.23K_1%.
Change R812, R813 from 9.09K_1% to 16.5K_1%
51 HW 12/1/2006 Dell X03
69 Bits issue WI100826
21,23,34 Please populate R820 with a 4.7k-ohm resistor. Move
signal PCIE_MCARD2_DET# from ICH8m GPIO20 pinAE11 to
PIRQH#/GPIO5 pinB3. Delete R457 and net
ICH_GPIO5_PIRQH#. Populate R550
HW 12/1/2006 Dell X03
70 Bits issue WI106999
41 HW Populate C208
12/1/2006 Dell X0371 Bits issue WI107466. +2.5V_LAN in-rush current test fai.
72 27 HW 12/6/2006 Dell Bits issue WI107896 Change R554 from 10K to 0 ohm X03
Dell12/6/2006HW36,3873 X03Change net DOCK_SMB_PME to DOCK_SMB_PME#Bits issue WI108259. Per M08 GPIO map rev A15 Change list
HW 12/6/2006 Dell74 9 Bits issue WI108223 Change C177,C179,C178,C366,C338,C365 to
EEFSX0D221E7 220uF X03
HW75 38 12/11/2006 Dell Change Board ID from X02 to X03 Populate R108, Depop R106 X03
Bits issue WI110179Dell12/14/2006HW3976 X03
Add EC_FLASH_PAD pin1 connect to +3.3V_ALW,pin2 connect
to R76 pin1 and R80 pin1
77 27 HW 12/15/2006 Dell Bits issue WI110158 Add R822 (1M_0402) from Pin 10 (C1P) pin of MAX9789A
to ground X03
79 26 HW 12/18/2006 Dell Bits issue WI110749 Add R823 (10K_0402) to ground on pin 47 of STAC9205
(U37) X03
80 29 HW 12/20/2006 Dell Bits issue WI111288 Change R683 from 150ohms to 110 ohms, R684from
150ohms to 200ohms X03
78 13,14 HW 12/15/2006 Dell Bits issue WI109712 Change C544,C560,C615,C551,C564,C593 to X6S SPEC X03
Dell12/25/200681 X03
Change C500~C507,C664,C666~C670,C851,C853,C994,C999
from 0.1uF Y5V to 0.1uF X7R
Change AC Coupling Cap SPEC for PCIEHW
12,23
28
Dell82 1/26/2007 Bits issue WI115658. M08 GPIO map rev A16 change Change ECE5028 GPIOF4 from BID2 to CHIPSET_ID. A0038 HW
83 1/26/2007 Dell Change BID to from X03 to A00 A00Depop R107,R108. Populate R106,R10938 HW
84 2/12/2007 Dell Bits issue WI121957 A0023 HW Add R834 (1M_0402_1%) for ICH_LAN_RST#
85 27 2/12/2007 Dell Bits issue WI121438 A00HW Change R565 from 10K to 100k ohm
A00Bits issue DF116813Dell2/12/20074186 Depop C194, changed C815 from 4700pF to 2200pFHW
13 2/27/2007 Dell Bits issue WI109712. Because can't find 2nd source A0087 HW Change C560 and (C615, C551, C564) Back to X5R
23 2/27/2007 Dell88 HW Bits issue WI125173. Per Intel's latest recommendation Change R834 from 1M to 10K A00
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
0.6
Changed-List History 1
56 58Wednesday, February 28, 2007
Version Change List ( P. I. R. List )
Item Issue DescriptionDate Request
Owner Solution Description Rev.Page#
10.1
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
2PWR
3PWR
4PWR
5
PWR
6
7
8
9
10
11
12
13
14
15
48/50 Elick change the AL CAP to 2000hr change PC380 from SF10004M08L to SF000000S8L.
change PC381 from SF10004M08L to SF000000S8L.
change PC382 from SF10004M08L to SF000000S8L.
45 BITS-WI91007
change to correct part for 15ALW.
change to PSL of DELL
change PD55 from SCSB717F08L to SCS00001U8L.
change PD56 from SCSB717F08L to SCS00001U8L.
48
44
44 PWR
change PH2 from SL20000030L to SL200000F8L
change PL1 from SM01001680L to SM010008U0L.
change PL2 from SM01001418L to SM010009C8L.
change PL34 from SM01001418L to SM010009C8L.
LA-3301P
0.1
0.1
0.1
0.1
DELL
DELL
DELL
DELL
BITS-WI89364
The 0.9V_DDR_VTT_PWRGD net is not used at
the MEC5025.
The 0.9V_DDR_VTT_PWRGD net should be no
connect at the MEC5025 pin 73.
46 remove PR437, PR438, PR441, PQ93 and PQ94.
DELLPWR
BITS-WI90985
following DELL rule Change PC285 pin 2 pad connection
from PGND to AGND.
45 PWR DELL
0.1
0.1
0.1
BITS-WI90999
Change PQ83 from FDS8880 to
BSC079N03SG PPAK
Change PQ83 from SB000004U8L to SB000004D8L.
DELLPWR45
BITS-WI91012
change to correct current limits Change PR383 from 124k(SD03412438L) to
150K(SD03415038L).
Change PR382 from 187k(SD03418738L) to
226K(SD03422638L).
45 PWR DELL
BITS-WI91287
following DELL rule Depopulate PR415 and PR416 resistors.DELL9/14PWR
47
9/14
9/14
9/14
9/14
9/14
9/14
9/14
9/14
9/14
0.1
0.1
BITS-WI91288
Change PQ86 from SI4392DY to SI4682DY. change PQ86 from SB54392008L to SB000006N0L 0.1
47 PWR 9/14 DELL
BITS-WI91291
be compliant with the reference schematic. Change PR274 from 4.7 ohm(SD000006T8L) to 33 ohm(SD014330A8L).
Populate PR373 and PD54. 0.1
DELL9/14PWR49
BITS-WI91374
following DELL rule Change PR408 from 75K(SD03475028L) to 82.5K(SD00000278L). 0.1
DELL9/14PWR47
BITS-WI91672
Change in 1.25V_RUN_PWRGD circuit. Change the node name connected to pin 2 of PR431from +3.3V_ALW
to +3.3V_SUS.
Depopulate PR431.
46 PWR 9/14 DELL 0.1
BITS-WI91689
DC IN schematic changes.
Change PL1 from SM01001680L to SM010008U0L.
Change PQ100 from SI2301BDS(SB923010020) to
PQ100A depopulated IMD2A(SB000009N8L).
Change PQ101 from SI2301BDS(SB923010020) to
PQ100B depopulated IMD2A(SB000009N8L).
Change PR12 from 10K,0603(SD01310028L) to 4.7K,0805(SD00247018L).
DELL9/14PWR44
0.1
change to PSL of DELL
change to PSL of DELL
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
0.6
Changed-List History 2
Wednesday, February 28, 2007
Version Change List ( P. I. R. List )
Item Issue DescriptionDate Request
Owner Solution Description Rev.Page# Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
18 PWR
19
20
16 PWR
17 PWR
21
22
23
24
25
27
28
46 9/15 DELL BITS-WI92156
correct the current limit on 1.25V
output change PR425 from 39.2K(SD03439228L) to 51.1K (SD03451128L) 0.1
46 9/15 DELL BITS-WI91655
Add 0.1uF connected to the pins 1 and 2
of PU24
Add PC410(SE042104K8L). One pad connected to the pins 1 and 2 of PU24 .
The other pad is connected to PGND. 0.1
46 9/15 DELL
BITS-WI91929
correct the current limit on 1.8V
output change PR426 from 110K(SD03411038L) to 130K (SD03413038L) 0.1
48 PWR 9/18 DELL
BITS-WI92465
improve transients at load dump.
and reduce jittering.
Add depopulate PR516(SD03410018L) and depopulate PC413(SE076103K8L)
between pin 9 of PU11 and AGND.
Add depopulated PC411(SE075472K8L),4700pF between pin 14 of PU11 and AGND .
Add depopulated PC412(SE075472K8L),4700pF between pin 15 of PU11 and AGND
0.1
44 PWR 9/21 DELL 0.1
BITS-WI91689
change PL1 from BK1608HM to BLM18BD102SN1D. change PL1 from SM010008U0L to SM010007C8L.
48/50 PWR 9/21 DELL
BITS-WI87563
change populate PC380 from 25CE100AX
to 25CE100LS
change PC381 from 25CE100AX to 25CE100LS
change PC382 from 25CE100AX to 25CE100LS
change populate PC380 from SF000000S8L to SF000000T8L.
change PC381 from SF000000S8L to SF000000T8L.
change PC382 from SF000000S8L to SF000000T8L. 0.1
62 62
49
49
49
49
PWR
PWR
PWR
PWR
9/29
9/29
9/29
9/29
DELL
DELL
DELL
DELL
match Maxim's response time of ICM input
to comparator. change PR361 from 0 Ohm (SD02800008L) to 8.45K (SD00000068L).
change PC254 from 0.01uF 25V (SE068103K8L) to 0.1uF 16V (SE076104K8L). 0.1
ICM is voltage source and does not
need this component. depopulate PR150. 0.1
Increase BW from 20kHz to 25kHz while
maintaining 80degrees phase margin. change PR148 from 4.7K (SD03447018L) to 10K (SD03410028L). 0.1
following DELL rule depopulate PD54 and PR373 0.1
26
45,46,47 PWR 10/27 DELL
BITS-WI99902
This is to add an optional ultrasonic mode
in case the regulators experience an audible
noise.
Add PR517(SD02800008L) between pin 29 of PU20 and AGND .
Add PR518(SD02800008L) between pin 29 of PU22 and AGND .
Add PR519(SD02800008L) between pin 29 of PU21 and AGND . 0.2
0.2
Add bead to connect +PWR_SRC to
+CPU_PWR_SRC Add PL44(SM01002078L) to parallel PJP30.10/27 DELL
PWR
48
10/3146 PWR DELL BITS-WI100140
Change PR429 from 0 ohm to 1 ohm change PR429 from 0 Ohm (SD01300008L ) to 1 Ohm(SD013100B8L). 0.2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
LA-3301P
0.6
Changed-List History 3
58 58Wednesday, February 28, 2007
Version Change List ( P. I. R. List )
Item Issue DescriptionDate Request
Owner Solution Description Rev.Page# Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
DELL29 49 PWR 11/16
BITS: WI102613
Change PR148 from 10K_0402_1% to 2.2K_0402
_5% change PR148 from 10K 0402 1% (SD03410028L ) to 2.2k 0402 5%(SD02822018L) 0.3
30 45 PWR 11/20 DELL
BITS-WI105401
Add node name +3.3V_ALW2 for the trace
connected to the pin 5 (VREF3) of PU20.
Populate PC285 with 0.1uF cap.
Add node name +3.3V_ALW2 between pin5 of PU20 and PC285.
Populate PC285. 0.3
31 49 PWR 12/06 DELL
BITS-WI106278
make sure that PC113, PC114 and PC379 are
X5R/X75 caps, need to stuff PC379. change PC379 is populated. 0.3
32 48 PWR 12/06 DELL
BITS-WI108223
Change PC187 from 10nF to 15nF.
Change PR258 from 2.21K to 1.69K.
Populate PR516 with 1K resistor.
Populate C413 with 0.01uF.
change PR187 from 10nF(SE076103K8L) to 15nF(SE076153K8L).
change PR258 from 2.21K(SD03422118L) to 1.69K(SD00000JB8L).
populate PC413.
populate PR516.
0.3
33 49 PWR 01/25 ELICK change to new part number for PSL
change PR138 from SD021100D8L to SD021100D3L(S RES 1W .01 +-1% 2512
FOR M08 PROJECTS)
change PR145 from SD021100D8L to SD021100D3L(S RES 1W .01 +-1% 2512
FOR M08 PROJECTS)
0.4
34
35
45/47 PWR 02/05 DELL BITS-WI119945
Increase current limits for 3.3V and 1.5V
regulators.
change PR382 from 226K to 267k (SD02822018L).
Change PR408 from 82.5K to 100K(SD03410038L).
0.4
additional 1206 resistor on +VCHGR for
Maxim solution. add an unpopulation PR520 (1.8K 1206 1%(SD00000JN8L))between
+VCHGR to PGND.
DELL02/06PWR49
36 0.4
49 PWR 02/12 DELL delete 1206 resistor on +VCHGR
not to implement for Maxim solution.
delete
not to
delete an unpopulate PR520 (1.8K 1206 1%(SD00000JN8L))between
+VCHGR to PGND.
0.4
