Compal LA 3451P Schematics. Www.s Manuals.com. R0.1 Schematics

User Manual: Notebook Lenovo 3000 N200 - Service manuals and Schematics, Disassembly / Assembly. Free.

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Page Count: 49

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Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

IGT30 LA-3571P

0.1

Cover Sheet

Custom

147

Monday, December 25, 2006

2006/08/04 2006/10/06

Compal Electronics, Inc.

REV:0.1

Compal confidential

Schematics Document

Mobile Merom uFCPGA with Intel

Crestline_GM/PM+ICH8-M core logic

IGT30

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

IGT30 LA-3571P

0.1

Block Diagram

Custom

247Monday, December 25, 2006

2006/08/04 2006/10/06

Compal Electronics, Inc.

File Name : LA-3451P

Compal confidential

USB conn X4

BlueTooth Conn

CMOS Camera

ALC 262H

Audio Codec

MODEM

Ver 1.5

AMP&Audio Jack

*1394 CONN

*DC JACK

*TVOUT CONN

*USB CONN

*SWITCH

SUB Board

*RJ45 CONN

*RJ11 CONN

*MIC IN JACK

*HP OUT JACK

*LED

*SWITCH

MMC/MS/MS-Pro

LPC BUS

PCI BUS

CRT & TV OUT

AZALIA

3.3V / 33 MHz

RJ45 CONN

BCM5906 BCM5787

10/100/1G LAN

Int.KBD

ENE KB925/KB926

Touch Pad

BIOS

BANK 0, 1, 2, 3

DDR2-SO-DIMM X2

DDR2 -667

Dual Channel

USB2.0

1394+Card Reader

RICOH R5C832

Card reader(XD/SD

1394 Conn

LVDS

Connector

SATA

ATA100

EC

LVDS I/F

Finger printer

page17

page16

page27

page27

page26

page26

page26

page32,36

page33

page32

page34

page32

page31

page28

page36

page36

page29

page30

page 28

page 13,14

ICS9LPRS355

Clock Gen.

page15

page4,5,6

page19,20,21,22

page7,8,9,10,11,12

Mobile Merom

uFCPGA-478 CPU

FSB

667/800MHz

H_A#(3..35)

H_D#(0..63)

PCBGA 1299

Intel Crestline GMCH

DMI

mBGA-676

Intel ICH8-M

C-Line

page23

page23

SATA HDD

Connector

PATA CDROM

Connector

USB 3G

page31

PCI-E BUS

page28

PCI Express

Mini card Slot

LEDs Board

TP Board

USB Board

Nvidia N8M

HD SD)

LVDS

Connector

PCI-E X16

LEFT SWITCH Board

ZZZ1

14W_PCB

A

A

1 1

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

IGT30 LA-3571P

0.1

Notes List

Custom

347Monday, December 25, 2006

2006/08/04 2006/10/06

Compal Electronics, Inc.

O MEANS ON

X MEANS OFF

S3 : STR

S4 : STD

S5 : SOFT OFF

Smart Battery

0001 011X b

EC SM Bus1 address

Device

1101 001Xb

ICH8 SM Bus address

Address

Device

Clock Generator

( ICS954226)

Address

Address

DDRII DIMM0

1010 000Xb

DDRII DIMM1

1010 010Xb

1010 000X b

EC SM Bus2 address

Device

EEPROM(24C16/02)

1001 100X b

0

External PCI Devices

Device IDSEL# REQ#/GNT# Interrupts

1394 PIRQG/H

AD22

ADM1032

Vcc 3.3V +/- 5%

100K +/- 5%Ra

Board ID

Rb V min

0

1

2

3

0

8.2K +/- 5%

0 V

0.216 V 0.250 V 0.289 V

0.436 V

0.712 V

0.503 V

0.819 V

0.538 V

0.875 V

AD_BID

Vtyp

AD_BID

V

AD_BID

max

18K +/- 5%

33K +/- 5%

56K +/- 5%

100K +/- 5%

200K +/- 5%

3.300 V

0 V 0 V

4

5

6

7NC

1.036 V

1.453 V 1.650 V 1.759 V

1.935 V

2.500 V

2.200 V

3.300 V

2.341 V

1.185 V 1.264 V

SKU ID Table

NC FOR ALL@

UMA@

VGA@

BCM5787

BCM5906

GIGA@

100@

Internal 965GM

MARK FUNCTION

BOM Structure USB PORT LIST

*

O

X

+0.9V

Voltage Rails

S3

+3VS

X

X

+3VALW

+5VS

O

+2.5VS

+CPU_CORE

+1.8VS

OO

X

XX

+VCCP

power

plane

CLOCK

O

O

O

X

X

LDO5

O

O

O

O

X

S5 S4/ Battery only

XXX

+5V

O MEANS ON X MEANS OFF

+VGA_CORE

+1.25VS

+B

LDO3

State

+1.5VS

+1.8V

S5 S4/AC & Battery

don't exist

S5 S4/AC

+5VALW

S0

O

O

Address

WIRELESS

BT(HDL20)

4

5

6

RIGHT SIDE

RIGHT SIDE

CMOS

3

PORT DEVICE

0

1

2

LEFT SIDE

7

NEW CARD

8

93G

965PM + Ext VGA

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

XDP_DBRESET#

XDP_TDI

XDP_TMS

XDP_TCK

XDP_TDO

XDP_BPM#5

XDP_HOOK1

EC_SMB_DA2

H_THERMDC

THERM#EC_SMB_CK2

H_PROCHOT# OCP#

THERM_SCI#

+VCC_FAN1

EN_FAN1

+VCC_FAN1

H_A#17

H_A#24

H_REQ#2

H_IGNNE#

H_A#12

H_A#6

H_A#11

H_A#32

H_A#20

H_A#15

H_A#5

H_REQ#4

H_REQ#1

H_A#22

H_A#10

H_STPCLK#

H_A20M#

H_ADSTB#0

H_A#25

H_A#18

H_A#34

H_NMI

H_A#3

H_A#26

H_REQ#0

H_REQ#3

H_A#14

H_A#30

H_A#7

H_A#4

H_A#35

H_A#33

H_A#8

H_A#13

H_SMI#

H_A#19

H_A#9

H_A#27

H_ADSTB#1

H_A#31

H_FERR#

H_A#21

H_A#29

H_INTR

H_A#16

H_A#23

H_A#28

H_HIT#

H_INIT#

H_TRDY#

CLK_CPU_BCLK

XDP_TDI

H_RESET#

H_THERMDC

XDP_BPM#4

H_THERMTRIP#

XDP_BPM#5

H_ADS#

H_HITM#

H_RS#1

CLK_CPU_BCLK#

XDP_TCK

H_THERMDA

XDP_BPM#2

XDP_TRST#

H_BPRI#

H_LOCK#

H_RS#2

H_IERR#

XDP_BPM#0

XDP_BPM#3

XDP_TDO

XDP_TMS

H_THERMDA

H_BR0#

XDP_BPM#1

H_DBSY#

H_RS#0

H_PROCHOT#

H_DEFER#

XDP_DBRESET#

H_BNR#

H_DRDY#

XDP_TRST#

EC_SMB_DA233

EC_SMB_CK233

EC_THERM# 21,33

OCP# 21

FAN_SPEED133

EN_FAN133

H_REQ#37

H_A#[17..35]7

H_A#[3..16]7

H_INTR20

H_ADSTB#17

H_REQ#17

H_FERR#20 H_A20M#20

H_NMI20

H_REQ#27

H_IGNNE#20

H_REQ#47

H_SMI#20

H_ADSTB#07

H_STPCLK#20

H_REQ#07

CLK_CPU_BCLK 15

H_ADS# 7

H_RESET# 7

H_LOCK# 7

H_TRDY# 7

H_PROCHOT# 45

XDP_DBRESET# 21

H_BNR# 7

H_RS#0 7

H_DRDY# 7

H_DEFER# 7

H_HIT# 7

CLK_CPU_BCLK# 15

H_BPRI# 7

H_RS#1 7

H_HITM# 7

H_THERMTRIP# 7,20

H_BR0# 7

H_RS#2 7

H_INIT# 20

H_DBSY# 7

+3VS

+VCCP

+3VS

+3VS

+VCCP

+5VS

+3VS

+5VS

+VCCP

+VCCP

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

IGT30 LA-3571P

0.1

Merom(1/3)-AGTL+/XDP

Custom

447Monday, December 25, 2006

2006/08/04 2006/10/06

Compal Electronics, Inc.

XDP Reserve

Address:100_1100

Check : to sb

40mil

FAN1 Conn

H_THERMDA, H_THERMDC routing together,

Trace width / Spacing = 10 / 10 mil

T17

R87 56_0402_5%

12

T14

U23

G993P1UF_SOP8

VEN

1

VIN

2

GND 5

GND 6

GND 8

VO

3

VSET

4

GND 7

R442 0_0402_5%@12

U24

G781F_SOP8

VDD1 1

ALERT# 6

THERM# 4

GND 5

D+

2

D-

3

SCLK

8

SDATA

7

R161 54.9_0402_1%@

1 2

R157 1K_0402_5%@

1 2

T11

C535

0.1U_0402_16V4Z

1 2

C529

1000P_0402_50V7K

1 2

T12

T7

R44810K_0402_5% 12

D17

1SS355_SOD323@

12

R155 560_0402_5%

1 2

R163 54.9_0402_1%@

1 2

D18

1N4148_SOT23@

1 2

T9

R156 27_0402_5%

1 2

R158 150_0402_1%

1 2

ADDR GROUP 0 ADDR GROUP 1

CONTROL

XDP/ITP SIGNALS

H CLK

THERMAL

RESERVED

ICH

JP1A

Merom Ball-out Rev 1a

ME@

A[10]#

N3

A[11]#

P5

A[12]#

P2

A[13]#

L2

A[14]#

P4

A[15]#

P1

A[16]#

R1

A[17]#

Y2

A[18]#

U5

A[19]#

R3

A[20]#

W6

A[21]#

U4

A[22]#

Y5

A[23]#

U1

A[24]#

R4

A[25]#

T5

A[26]#

T3

A[27]#

W2

A[28]#

W5

A[29]#

Y4

A[3]#

J4

A[30]#

U2

A[31]#

V4

RSVD[01]

M4

RSVD[02]

N5

RSVD[03]

T2

RSVD[04]

V3

RSVD[05]

B2

RSVD[06]

C3

RSVD[07]

D2

RSVD[08]

D22

A[4]#

L5

A[5]#

L4

A[6]#

K5

A[7]#

M3

A[8]#

N2

A[9]#

J1

A20M#

A6

ADS# H1

ADSTB[0]#

M1

ADSTB[1]#

V1

RSVD[09]

D3

BCLK[0] A22

BCLK[1] A21

BNR# E2

BPM[0]# AD4

BPM[1]# AD3

BPM[2]# AD1

BPM[3]# AC4

BPRI# G5

BR0# F1

DBR# C20

DBSY# E1

DEFER# H5

DRDY# F21

FERR#

A5

HIT# G6

HITM# E4

IERR# D20

IGNNE#

C4

INIT# B3

LINT0

C6

LINT1

B4

LOCK# H4

PRDY# AC2

PREQ# AC1

PROCHOT# D21

REQ[0]#

K3

REQ[1]#

H2

REQ[2]#

K2

REQ[3]#

J3

REQ[4]#

L1

RESET# C1

RS[0]# F3

RS[1]# F4

RS[2]# G3

SMI#

A3

STPCLK#

D5

TCK AC5

TDI AA6

TDO AB3

THERMTRIP# C7

THERMDA A24

THERMDC B25

TMS AB5

TRDY# G2

TRST# AB6

A[32]#

W3

A[33]#

AA4

A[34]#

AB2

A[35]#

AA3

RSVD[10]

F6

JP61

ACES_85205-03001

ME@

1

2

3

R445

10K_0402_5%

1 2

E

B

C

Q4

MMBT3904_SOT23

@

2

3 1

R427

10K_0402_5%

12

T6

C531

1000P_0402_50V7K

1

2

T16

R159 39_0402_1%

1 2

T15

R85

56_0402_5%@

12

R92

56_0402_5%

12

T5

C528 10U_1206_16V4Z 1 2

C536

2200P_0402_50V7K

1 2

C532

10U_1206_16V4Z

1 2

R162 54.9_0402_1%

1 2

T13

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

TEST4

H_D#4

H_D#14

H_D#10

H_D#9

H_D#3

H_D#13

H_D#6

H_D#2

H_D#8

H_D#12

H_D#1

H_D#5

H_D#7

H_D#11

H_D#0

H_D#15

H_D#27

H_D#25

H_D#31

H_D#24

H_D#20

H_D#30

H_D#23

H_D#19

H_D#29

H_D#16

H_D#18

H_D#22

H_D#26

H_D#28

H_D#17

H_D#21

H_D#35

H_D#46

H_D#47

H_D#37

H_D#34

H_D#41

H_D#45

H_D#43

H_D#33

H_D#39

H_D#40

H_D#44

H_D#32

H_DINV#0

H_DINV#1

H_D#42

H_D#38

H_D#36

H_DINV#3

H_DINV#2

H_DSTBN#2

H_DSTBP#2

H_DSTBP#1

H_DSTBN#1

H_DSTBP#0

H_DSTBN#0

H_DSTBN#3

H_DSTBP#3

H_D#48

H_D#56

H_D#52

H_D#59

H_D#63

H_D#55

H_D#51

H_D#62

H_D#58

H_D#54

H_D#50

H_D#57

H_D#61

H_D#53

H_D#49

H_D#60

COMP0

COMP2

COMP3

COMP1

CPU_BSEL2

CPU_BSEL1

CPU_BSEL0 H_PWRGOOD

H_CPUSLP#

H_DPSLP#

H_DPRSTP#

H_PSI#

H_DPWR#

+CPU_GTLREF

+CPU_GTLREF

TEST1

TEST2

VSSSENSE

VCCSENSE

VSSSENSE

VCCSENSE

TEST3

TEST5

TEST6

VCCSENSE 45

VSSSENSE 45

H_D#[0..15]7

H_DSTBN#07H_DSTBP#07 H_DINV#07H_D#[16..31]7

H_DSTBN#17H_DSTBP#17 H_DINV#17

CPU_BSEL015 CPU_BSEL115 CPU_BSEL215

H_D#[32..47] 7

H_DSTBN#2 7

H_DSTBP#2 7

H_DINV#2 7

H_D#[48..63] 7

H_DSTBN#3 7

H_DSTBP#3 7

H_DINV#3 7

H_DPRSTP# 7,20,45

H_DPSLP# 20

H_CPUSLP# 7

H_DPWR# 7

H_PWRGOOD 20

H_PSI# 45

CPU_VID0 45

CPU_VID1 45

CPU_VID2 45

CPU_VID3 45

CPU_VID4 45

CPU_VID5 45

CPU_VID6 45

+VCCP

+VCCP

+1.5VS

+CPU_CORE

+CPU_CORE+CPU_CORE

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

IGT30 LA-3571P

0.1

Merom(2/3)-AGTL+/PWR

Custom

547Monday, December 25, 2006

2006/08/04 2006/10/06

Compal Electronics, Inc.

Close to CPU pin AD26

within 500mils.

CPU_BSEL CPU_BSEL2 CPU_BSEL1

166

200

01

0

1

Resistor placed within

0.5" of CPU pin.Trace

should be at least 25

mils away from any other

toggling signal.

COMP[0,2] trace width is

18 mils. COMP[1,3] trace

width is 4 mils.

Length match within 25 mils.

The trace width/space/other is

20/7/25.

CPU_BSEL0

1

0

Close to CPU pin

within 500mils.

For testing purpose only

layout note: Route TEST3 & TEST5 traces on ground referenced layer to the TPs

Near pin B26

R93 1K_0402_5%@

1 2

C238

0.01U_0402_16V7K

1

2

R164 0_0402_5%

12

C231

10U_0805_10V4Z

1

2

R486

100_0402_1%

1 2

R91 0_0402_5%

12

JP1C

Merom Ball-out Rev 1a

.

ME@

VCC[001]

A7

VCC[002]

A9

VCC[003]

A10

VCC[004]

A12

VCC[005]

A13

VCC[006]

A15

VCC[007]

A17

VCC[008]

A18

VCC[009]

A20

VCC[010]

B7

VCC[011]

B9

VCC[012]

B10

VCC[013]

B12

VCC[014]

B14

VCC[015]

B15

VCC[016]

B17

VCC[017]

B18

VCC[018]

B20

VCC[019]

C9

VCC[020]

C10

VCC[021]

C12

VCC[022]

C13

VCC[023]

C15

VCC[024]

C17

VCC[025]

C18

VCC[026]

D9

VCC[027]

D10

VCC[028]

D12

VCC[029]

D14

VCC[030]

D15

VCC[031]

D17

VCC[032]

D18

VCC[033]

E7

VCC[034]

E9

VCC[035]

E10

VCC[036]

E12

VCC[037]

E13

VCC[038]

E15

VCC[039]

E17

VCC[040]

E18

VCC[041]

E20

VCC[042]

F7

VCC[043]

F9

VCC[044]

F10

VCC[045]

F12

VCC[046]

F14

VCC[047]

F15

VCC[048]

F17

VCC[049]

F18

VCC[050]

F20

VCC[051]

AA7

VCC[052]

AA9

VCC[053]

AA10

VCC[054]

AA12

VCC[055]

AA13

VCC[056]

AA15

VCC[057]

AA17

VCC[058]

AA18

VCC[059]

AA20

VCC[060]

AB9

VCC[061]

AC10

VCC[062]

AB10

VCC[063]

AB12

VCC[064]

AB14

VCC[065]

AB15

VCC[066]

AB17

VCC[067]

AB18

VCC[068] AB20

VCC[069] AB7

VCC[070] AC7

VCC[071] AC9

VCC[072] AC12

VCC[073] AC13

VCC[074] AC15

VCC[075] AC17

VCC[076] AC18

VCC[077] AD7

VCC[078] AD9

VCC[079] AD10

VCC[080] AD12

VCC[081] AD14

VCC[082] AD15

VCC[083] AD17

VCC[084] AD18

VCC[085] AE9

VCC[086] AE10

VCC[087] AE12

VCC[088] AE13

VCC[089] AE15

VCC[090] AE17

VCC[091] AE18

VCC[092] AE20

VCC[093] AF9

VCC[094] AF10

VCC[095] AF12

VCC[096] AF14

VCC[097] AF15

VCC[098] AF17

VCC[099] AF18

VCC[100] AF20

VCCA[01] B26

VCCP[03] J6

VCCP[04] K6

VCCP[05] M6

VCCP[06] J21

VCCP[07] K21

VCCP[08] M21

VCCP[09] N21

VCCP[10] N6

VCCP[11] R21

VCCP[12] R6

VCCP[13] T21

VCCP[14] T6

VCCP[15] V21

VCCP[16] W21

VCCSENSE AF7

VID[0] AD6

VID[1] AF5

VID[2] AE5

VID[3] AF4

VID[4] AE3

VID[5] AF3

VID[6] AE2

VSSSENSE AE7

VCCA[02] C26

VCCP[01] G21

VCCP[02] V6

T4

R95

2K_0402_1%

12

R96

54.9_0402_1%

12

C237 0.1U_0402_16V4Z@

1 2

T8

R483

100_0402_1%

1 2

R153

27.4_0402_1%

12

T3

+

C214

330U_D2E_2.5VM_R7

1

2

DATA GRP 0 DATA GRP 1

DATA GRP 2DATA GRP 3

MISC

JP1B

Merom Ball-out Rev 1a

ME@

COMP[0] R26

COMP[1] U26

COMP[2] AA1

COMP[3] Y1

D[0]#

E22

D[1]#

F24

D[10]#

J24

D[11]#

J23

D[12]#

H22

D[13]#

F26

D[14]#

K22

D[15]#

H23

D[16]#

N22

D[17]#

K25

D[18]#

P26

D[19]#

R23

D[2]#

E26

D[20]#

L23

D[21]#

M24

D[22]#

L22

D[23]#

M23

D[24]#

P25

D[25]#

P23

D[26]#

P22

D[27]#

T24

D[28]#

R24

D[29]#

L25

D[3]#

G22

D[30]#

T25

D[31]#

N25

D[32]# Y22

D[33]# AB24

D[34]# V24

D[35]# V26

D[36]# V23

D[37]# T22

D[38]# U25

D[39]# U23

D[4]#

F23

D[40]# Y25

D[41]# W22

D[42]# Y23

D[43]# W24

D[44]# W25

D[45]# AA23

D[46]# AA24

D[47]# AB25

D[48]# AE24

D[49]# AD24

D[5]#

G25

D[50]# AA21

D[51]# AB22

D[52]# AB21

D[53]# AC26

D[54]# AD20

D[55]# AE22

D[56]# AF23

D[57]# AC25

D[58]# AE21

D[59]# AD21

D[6]#

E25

D[60]# AC22

D[61]# AD23

D[62]# AF22

D[63]# AC23

D[7]#

E23

D[8]#

K24

D[9]#

G24

TEST5

AF1

DINV[0]#

H25

DINV[1]#

N24

DINV[2]# U22

DINV[3]# AC20

DPRSTP# E5

DPSLP# B5

DPWR# D24

DSTBN[0]#

J26

DSTBN[1]#

L26

DSTBN[2]# Y26

DSTBN[3]# AE25

DSTBP[0]#

H26

DSTBP[1]#

M26

DSTBP[2]# AA26

DSTBP[3]# AF24

GTLREF

AD26

PSI# AE6

PWRGOOD D6

SLP# D7

TEST3

C24

BSEL[0]

B22

BSEL[1]

B23

BSEL[2]

C21

TEST2

D25

TEST4

AF26

TEST6

A26

TEST1

C23

R89

1K_0402_1%

12

R97

27.4_0402_1%

12

R154

54.9_0402_1%

12

R94 1K_0402_5%@

1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+VCCP

+CPU_CORE

+CPU_CORE

+CPU_CORE

+CPU_CORE

+CPU_CORE

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

IGT30 LA-3571P

0.1

Merom(3/3)-GND&Bypass

Custom

647Monday, December 25, 2006

2006/08/04 2006/10/06

Compal Electronics, Inc.

Place these inside

socket cavity on L8

(North side

Secondary)

ESR <= 1.5m ohm

Capacitor > 1980uF

Mid Frequence Decoupling

North Side Secondary

Place these capacitors on L8

(North side,Secondary Layer)

Place these capacitors on L8

(North side,Secondary Layer)

Place these capacitors on L8

(Sorth side,Secondary Layer)

Place these capacitors on L8

(Sorth side,Secondary Layer)

South Side Secondary

+

C562

330U_V_2.5VK_R9

1

2

C315

10U_0805_6.3V6M

1

2

C296

10U_0805_6.3V6M

1

2

C288

10U_0805_6.3V6M

1

2

C327

10U_0805_6.3V6M

1

2

+

C229

220U_D2_4VM

1

2

C547

10U_0805_6.3V6M

1

2

C289

10U_0805_6.3V6M

1

2

C268

10U_0805_6.3V6M

1

2

C545

10U_0805_6.3V6M

1

2

C328

10U_0805_6.3V6M

1

2

C546

10U_0805_6.3V6M

1

2

C543

10U_0805_6.3V6M

1

2

C287

10U_0805_6.3V6M

1

2

C321

10U_0805_6.3V6M

1

2

C298

10U_0805_6.3V6M

1

2

C292

10U_0805_6.3V6M

1

2

C551

10U_0805_6.3V6M

1

2

+

C312

330U_V_2.5VK_R9

@

1

2

C322

10U_0805_6.3V6M

1

2

C563

10U_0805_6.3V6M

1

2

+

C557

330U_V_2.5VK_R9

1

2

C323

0.1U_0402_16V4Z

1

2

C271

0.1U_0402_16V4Z

1

2

+

C313

330U_V_2.5VK_R9

@

1

2

+

C548

330U_V_2.5VK_R9

1

2

C295

10U_0805_6.3V6M

1

2

C542

10U_0805_6.3V6M

1

2

C314

10U_0805_6.3V6M

1

2

C325

0.1U_0402_16V4Z

1

2

C297

10U_0805_6.3V6M

1

2

C559

10U_0805_6.3V6M

1

2

C554

10U_0805_6.3V6M

1

2

+

C561

330U_V_2.5VK_R9

1

2

C564

10U_0805_6.3V6M

1

2

C291

10U_0805_6.3V6M

1

2

C285

10U_0805_6.3V6M

1

2

C558

10U_0805_6.3V6M

1

2

C324

0.1U_0402_16V4Z

1

2

C272

0.1U_0402_16V4Z

1

2

C273

0.1U_0402_16V4Z

1

2

C549

10U_0805_6.3V6M

1

2

JP1D

Merom Ball-out Rev 1a

.

VSS[082] P6

VSS[148] AE11

VSS[002]

A8

VSS[003]

A11

VSS[004]

A14

VSS[005]

A16

VSS[006]

A19

VSS[007]

A23

VSS[008]

AF2

VSS[009]

B6

VSS[010]

B8

VSS[011]

B11

VSS[012]

B13

VSS[013]

B16

VSS[014]

B19

VSS[015]

B21

VSS[016]

B24

VSS[017]

C5

VSS[018]

C8

VSS[019]

C11

VSS[020]

C14

VSS[021]

C16

VSS[022]

C19

VSS[023]

C2

VSS[024]

C22

VSS[025]

C25

VSS[026]

D1

VSS[027]

D4

VSS[028]

D8

VSS[029]

D11

VSS[030]

D13

VSS[031]

D16

VSS[032]

D19

VSS[033]

D23

VSS[034]

D26

VSS[035]

E3

VSS[036]

E6

VSS[037]

E8

VSS[038]

E11

VSS[039]

E14

VSS[040]

E16

VSS[041]

E19

VSS[042]

E21

VSS[043]

E24

VSS[044]

F5

VSS[045]

F8

VSS[046]

F11

VSS[047]

F13

VSS[048]

F16

VSS[049]

F19

VSS[050]

F2

VSS[051]

F22

VSS[052]

F25

VSS[053]

G4

VSS[054]

G1

VSS[055]

G23

VSS[056]

G26

VSS[057]

H3

VSS[058]

H6

VSS[059]

H21

VSS[060]

H24

VSS[061]

J2

VSS[062]

J5

VSS[063]

J22

VSS[064]

J25

VSS[065]

K1

VSS[066]

K4

VSS[067]

K23

VSS[068]

K26

VSS[069]

L3

VSS[070]

L6

VSS[071]

L21

VSS[072]

L24

VSS[073]

M2

VSS[074]

M5

VSS[075]

M22

VSS[076]

M25

VSS[077]

N1

VSS[078]

N4

VSS[079]

N23

VSS[080]

N26

VSS[081]

P3 VSS[162] A25

VSS[161] AF21

VSS[160] AF19

VSS[159] AF16

VSS[158] AF13

VSS[157] AF11

VSS[156] AF8

VSS[155] AF6

VSS[154] A2

VSS[153] AE26

VSS[152] AE23

VSS[151] AE19

VSS[083] P21

VSS[084] P24

VSS[085] R2

VSS[086] R5

VSS[087] R22

VSS[088] R25

VSS[089] T1

VSS[090] T4

VSS[091] T23

VSS[092] T26

VSS[093] U3

VSS[094] U6

VSS[095] U21

VSS[096] U24

VSS[097] V2

VSS[098] V5

VSS[099] V22

VSS[100] V25

VSS[101] W1

VSS[102] W4

VSS[103] W23

VSS[104] W26

VSS[105] Y3

VSS[107] Y21

VSS[108] Y24

VSS[109] AA2

VSS[110] AA5

VSS[111] AA8

VSS[112] AA11

VSS[113] AA14

VSS[114] AA16

VSS[115] AA19

VSS[116] AA22

VSS[117] AA25

VSS[118] AB1

VSS[119] AB4

VSS[120] AB8

VSS[121] AB11

VSS[122] AB13

VSS[123] AB16

VSS[124] AB19

VSS[125] AB23

VSS[126] AB26

VSS[127] AC3

VSS[128] AC6

VSS[129] AC8

VSS[130] AC11

VSS[131] AC14

VSS[132] AC16

VSS[133] AC19

VSS[134] AC21

VSS[135] AC24

VSS[136] AD2

VSS[137] AD5

VSS[138] AD8

VSS[139] AD11

VSS[140] AD13

VSS[141] AD16

VSS[142] AD19

VSS[143] AD22

VSS[144] AD25

VSS[145] AE1

VSS[146] AE4

VSS[106] Y6

VSS[001]

A4

VSS[149] AE14

VSS[150] AE16

VSS[147] AE8

VSS[163] AF25

C286

10U_0805_6.3V6M

1

2

C555

10U_0805_6.3V6M

1

2

C267

10U_0805_6.3V6M

1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

H_SWNGH_VREF

PM_EXTTS#0

PM_EXTTS#1

DDR_CKE0_DIMMA

DDR_CKE1_DIMMA

DDR_CKE3_DIMMB

DDR_CS1_DIMMA#

DDR_CKE2_DIMMB

DDR_CS0_DIMMA#

DDR_CS3_DIMMB#

DDR_CS2_DIMMB#

CLK_MCH_3GPLL#

CLK_MCH_3GPLL

PLT_RST#_R

M_CLK_DDR3

M_CLK_DDR#0

M_CLK_DDR#1

M_CLK_DDR#2

M_CLK_DDR#3

M_CLK_DDR2

M_CLK_DDR0

M_CLK_DDR1

SMRCOMP_VOH

SMRCOMP_VOL

M_ODT1

SMRCOMP#

M_ODT3

M_ODT0

M_ODT2

SMRCOMP

+DDR_MCH_REF

SMRCOMP_VOL

SMRCOMP_VOH

MCH_SSCDREFCLK

MCH_SSCDREFCLK#

CLK_MCH_DREFCLK

CLK_MCH_DREFCLK#

CFG10

CFG11

CFG7

CFG5

CFG13

CFG9

CFG18

CFG16

CFG19

CFG12

CFG6

CFG20

MCH_CLKSEL0

MCH_CLKSEL1

MCH_CLKSEL2

MCH_ICH_SYNC#

CLKREQ_3GPLL#

H_DPRSTP#

DPRSLPVR

PM_EXTTS#1

PM_BMBUSY#

H_THERMTRIP#

PM_EXTTS#0

PLT_RST#_R

CL_CLK0

CL_DATA0

CL_RST#

+DDR_MCH_REF

H_SCOMP#

H_DSTBP#0

H_DSTBN#1

H_D#39

H_D#37

H_D#34

H_D#22

H_D#12

H_D#11

H_ADSTB#0

H_A#24

H_A#10

H_RS#0

H_DSTBN#0H_D#58

H_D#54

H_D#4

H_D#13

H_D#20

H_ADSTB#1

H_A#7

H_A#3

H_A#11

H_DSTBP#2

H_D#6

H_D#25

H_D#1

H_A#16

H_REQ#0

H_D#44

H_A#19

H_A#17

H_RCOMP

H_A#35

H_DSTBP#1

H_D#43

H_D#35

H_REQ#3

H_BNR#

H_A#13

H_CPUSLP#

H_SWNG

H_HITM#

H_DSTBN#3

H_DINV#1

H_D#62

H_D#57

H_D#56

H_D#60

H_A#14

H_RCOMP

H_VREF

H_HIT#

H_D#38

H_D#17

H_A#31

H_DPWR#

H_D#32

H_D#50

H_D#10

H_A#20

H_A#12

H_A#33

H_DSTBP#3

H_DINV#3

H_D#59

H_D#5

H_D#33

H_REQ#4

H_DEFER#

H_D#55

H_D#47

H_D#45

H_D#28

H_D#27

H_D#19

H_D#16

CLK_MCH_BCLK#

H_A#9

H_A#6

H_D#49

H_D#15

H_D#40

H_REQ#2

H_D#0

H_BR0#

H_A#27

H_A#22

H_A#15

H_A#34

H_A#32

H_REQ#1

H_LOCK#

H_DRDY#

H_DINV#0

H_D#61

H_D#26

H_D#23

H_A#8

H_A#25

H_RS#2

H_D#7

H_D#14

H_D#8

H_D#30

CLK_MCH_BCLK

H_A#28

H_RS#1

H_TRDY#

H_DSTBN#2

H_D#63

H_D#52

H_D#48

H_D#36

H_D#31

H_D#29

H_A#4

H_A#30

H_A#29

H_DINV#2

H_D#41

H_D#24

H_D#21

H_D#18

H_D#9

H_BPRI#

H_ADS#

H_A#5

H_A#23

H_D#53

H_D#46

H_D#42

H_DBSY#

H_A#21

H_A#18

H_SCOMP

H_D#51

H_D#3

H_D#2

H_A#26

H_RESET#

DMI_TXN0

DMI_TXN1

DMI_TXN2

DMI_TXN3

DMI_TXP0

DMI_TXP1

DMI_TXP2

DMI_TXP3

DMI_RXN0

DMI_RXN1

DMI_RXN2

DMI_RXN3

DMI_RXP0

DMI_RXP1

DMI_RXP2

DMI_RXP3

CL_VREF

PM_POK_R PM_POK_R

CLKREQ_3GPLL#

+DDR_MCH_REF

H_D#[0..63]5

H_CPUSLP#5

H_DINV#0 5

H_DINV#1 5

H_DINV#2 5

H_DINV#3 5

H_DSTBN#0 5

H_DSTBN#1 5

H_DSTBN#2 5

H_DSTBN#3 5

H_DSTBP#0 5

H_DSTBP#1 5

H_DSTBP#2 5

H_DSTBP#3 5

DDR_CKE0_DIMMA 13

DDR_CKE1_DIMMA 13

DDR_CKE2_DIMMB 14

DDR_CKE3_DIMMB 14

DDR_CS0_DIMMA# 13

DDR_CS1_DIMMA# 13

DDR_CS2_DIMMB# 14

DDR_CS3_DIMMB# 14

CLK_MCH_3GPLL 15

CLK_MCH_3GPLL# 15

PLT_RST#18,19,21,23,24,26,27

H_A#[3..35] 4

H_ADS# 4

H_ADSTB#1 4

H_ADSTB#0 4

H_BPRI# 4

H_BNR# 4

H_DEFER# 4

H_BR0# 4

H_DBSY# 4

CLK_MCH_BCLK 15

CLK_MCH_BCLK# 15

H_DPWR# 5

H_DRDY# 4

H_HIT# 4

H_HITM# 4

H_LOCK# 4

H_TRDY# 4

M_CLK_DDR0 13

M_CLK_DDR1 13

M_CLK_DDR2 14

M_CLK_DDR3 14

M_CLK_DDR#0 13

M_CLK_DDR#1 13

M_CLK_DDR#2 14

M_CLK_DDR#3 14

M_ODT0 13

M_ODT1 13

M_ODT2 14

M_ODT3 14

MCH_SSCDREFCLK 15

MCH_SSCDREFCLK# 15

MCH_CLKSEL015 MCH_CLKSEL115 MCH_CLKSEL215

CFG59

CFG99

CFG11

CFG10

CFG6

CFG79

CFG139CFG129

CFG169

CFG18

CFG209CFG199

DMI_TXP0 21

DMI_RXN0 21

DMI_RXP0 21

DMI_TXN0 21

CLKREQ_3GPLL# 15

MCH_ICH_SYNC# 21

PM_BMBUSY#21

DPRSLPVR21,45

H_THERMTRIP#4,20

H_DPRSTP#5,20,45 PM_EXTTS#013

CL_CLK0 21

CL_DATA0 21

CL_RST# 21

H_RS#2 4

H_REQ#3 4

H_RS#1 4

H_RESET#4

H_REQ#2 4

H_RS#0 4

H_REQ#1 4

H_REQ#4 4

H_REQ#0 4

DMI_TXN1 21

DMI_TXN2 21

DMI_TXN3 21

DMI_TXP1 21

DMI_TXP2 21

DMI_TXP3 21

DMI_RXN1 21

DMI_RXN2 21

DMI_RXN3 21

DMI_RXP1 21

DMI_RXP2 21

DMI_RXP3 21

PM_EXTTS#114

ICH_POK21,33

VGATE21,45

CFG89

CLK_MCH_DREFCLK 15

CLK_MCH_DREFCLK# 15

DDR_A_MA1413 DDR_B_MA1414

M_PWROK 21

+VCCP

+VCCP

+VCCP

+3VS

+1.8V

+1.8V

+1.8V

+1.25VS

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

IGT30 LA-3571P

0.1

CRESTLINE(1/6)-AGTL+/DMI/DDR2

Custom

747Monday, December 25, 2006

2006/08/04 2006/10/06

Compal Electronics, Inc.

Layout Note:

H_RCOMP / H_VREF / H_SWNG

trace width and spacing is 10/20

Layout Note:

V_DDR_MCH_REF

trace width and

spacing is 20/20.

NA lead free

Near B3 pinwithin 100 mils from NB

layout note:

Route H_SCOMP and H_SCOMP# with trace width, spacing and impedance (55 ohm) same as FSB data traces

0309 add

For Calero: 80.6ohm

For Crestline: 20ohm

Check : different from hdl00

For AMT function

R436 0_0402_5%

12

C83

0.01U_0402_25V7K

1

2

R16

221_0603_1%

12

R68

1K_0402_1%

12

C91

2.2U_0603_10V6K

1

2

R67 1K_0402_1%

12

C23

0.1U_0402_16V4Z

1

2

R64 10K_0402_5%

1 2

R47

20K_0402_5%

12

R449 100_0402_5%

1 2

R399

24.9_0402_1%

12

R15

54.9_0402_1%

12

R423

0_0402_5%

12

R71

1K_0402_1%

12

R38

3.01K_0402_1%

12

R31

1K_0402_1%

12

R75

392_0402_1%

12

R412

2K_0402_1%

12

R18

54.9_0402_1%

12

HOST

U22A

CRESTLINE_1p0

H_A#_10 G17

H_A#_11 C14

H_A#_12 K16

H_A#_13 B13

H_A#_14 L16

H_A#_15 J17

H_A#_16 B14

H_A#_17 K19

H_A#_18 P15

H_A#_19 R17

H_A#_20 B16

H_A#_21 H20

H_A#_22 L19

H_A#_23 D17

H_A#_24 M17

H_A#_25 N16

H_A#_26 J19

H_A#_27 B18

H_A#_28 E19

H_A#_29 B17

H_A#_3 J13

H_A#_30 B15

H_A#_31 E17

H_A#_4 B11

H_A#_5 C11

H_A#_6 M11

H_A#_7 C15

H_A#_8 F16

H_A#_9 L13

H_ADS# G12

H_ADSTB#_0 H17

H_ADSTB#_1 G20

H_BNR# C8

H_BPRI# E8

H_BREQ# F12

HPLL_CLK# AM7

H_CPURST#

B6

HPLL_CLK AM5

H_D#_0

E2

H_REQ#_2 A11

H_REQ#_3 H13

H_D#_1

G2

H_D#_10

M10

H_D#_20

M3

H_D#_30

W3

H_D#_40

AB2

H_D#_50

AJ14

H_D#_60

AE5

H_D#_8

N8

H_D#_9

H2

H_DBSY# C10

H_D#_11

N12

H_D#_12

N9

H_D#_13

H5

H_D#_14

P13

H_D#_15

K9

H_D#_16

M2

H_D#_17

W10

H_D#_18

Y8

H_D#_19

V4

H_D#_2

G7

H_D#_21

J1

H_D#_22

N5

H_D#_23

N3

H_D#_24

W6

H_D#_25

W9

H_D#_26

N2

H_D#_27

Y7

H_D#_28

Y9

H_D#_29

P4

H_D#_3

M6

H_D#_31

N1

H_D#_32

AD12

H_D#_33

AE3

H_D#_34

AD9

H_D#_35

AC9

H_D#_36

AC7

H_D#_37

AC14

H_D#_38

AD11

H_D#_39

AC11

H_D#_4

H7

H_D#_41

AD7

H_D#_42

AB1

H_D#_43

Y3

H_D#_44

AC6

H_D#_45

AE2

H_D#_46

AC5

H_D#_47

AG3

H_D#_48

AJ9

H_D#_49

AH8

H_D#_5

H3

H_D#_51

AE9

H_D#_52

AE11

H_D#_53

AH12

H_D#_54

AJ5

H_D#_55

AH5

H_D#_56

AJ6

H_D#_57

AE7

H_D#_58

AJ7

H_D#_59

AJ2

H_D#_6

G4

H_D#_61

AJ3

H_D#_62

AH2

H_D#_63

AH13

H_D#_7

F3

H_DEFER# D6

H_DINV#_0 K5

H_DINV#_1 L2

H_DINV#_2 AD13

H_DINV#_3 AE13

H_DPWR# H8

H_DRDY# K7

H_DSTBN#_0 M7

H_DSTBN#_1 K3

H_DSTBN#_2 AD2

H_DSTBN#_3 AH11

H_DSTBP#_0 L7

H_DSTBP#_1 K2

H_DSTBP#_2 AC2

H_DSTBP#_3 AJ10

H_SCOMP

W1

H_AVREF

B9

H_DVREF

A9

H_TRDY# B7

H_HIT# E4

H_HITM# C6

H_LOCK# G10

H_REQ#_0 M14

H_REQ#_1 E13

H_REQ#_4 B12

H_A#_32 C18

H_A#_33 A19

H_A#_34 B19

H_A#_35 N19

H_SWING

B3

H_CPUSLP#

E5

H_RCOMP

C2

H_RS#_0 E12

H_RS#_1 D7

H_RS#_2 D8

H_SCOMP#

W2

C167

0.1U_0402_16V4Z

1

2

R17

100_0402_1%

12

C84

0.01U_0402_25V7K

1

2

R63

10K_0402_5%

12

R438 0_0402_5%@

12

C73

2.2U_0603_10V6K

1

2

PM

MISC

NC

DDR MUXINGCLK

DMI

CFGRSVD

GRAPHICS VID

ME

U22B

CRESTLINE_1p0

SM_CK_0 AV29

SM_CK_1 BB23

RSVD28

BF23

SM_CK_3 BA25

SM_CK#_0 AW30

SM_CK#_1 BA23

RSVD29

BG23

SM_CK#_3 AW25

SM_CKE_0 BE29

SM_CKE_1 AY32

SM_CKE_3 BD39

SM_CKE_4 BG37

SM_CS#_0 BG20

SM_CS#_1 BK16

SM_CS#_2 BG16

SM_CS#_3 BE13

RSVD34

BH39

SM_ODT_0 BH18

SM_ODT_1 BJ15

SM_ODT_2 BJ14

SM_ODT_3 BE16

SM_RCOMP BL15

SM_RCOMP# BK14

SM_VREF_0 AR49

SM_VREF_1 AW4

CFG_18

L32

CFG_19

N33

CFG_2

N24

CFG_0

P27

CFG_1

N27

CFG_20

L35

CFG_3

C21

CFG_4

C23

CFG_5

F23

CFG_6

N23

CFG_7

G23

CFG_8

J20

CFG_9

C20

CFG_10

R24

CFG_11

L23

CFG_12

J23

CFG_13

E23

CFG_14

E20

CFG_15

K23

CFG_16

M20

CFG_17

M24

PM_BM_BUSY#

G41

PM_EXT_TS#_0

L36

PM_EXT_TS#_1

J36

PWROK

AW49

RSTIN#

AV20

DPLL_REF_CLK B42

DPLL_REF_CLK# C42

DPLL_REF_SSCLK H48

DPLL_REF_SSCLK# H47

DMI_RXN_0 AN47

DMI_RXN_1 AJ38

DMI_RXN_2 AN42

DMI_RXN_3 AN46

DMI_RXP_0 AM47

DMI_RXP_1 AJ39

DMI_RXP_2 AN41

DMI_RXP_3 AN45

DMI_TXN_0 AJ46

DMI_TXN_1 AJ41

DMI_TXN_2 AM40

DMI_TXN_3 AM44

DMI_TXP_0 AJ47

DMI_TXP_1 AJ42

DMI_TXP_2 AM39

DMI_TXP_3 AM43

RSVD10

AR37

RSVD12

AL36 RSVD11

AM36

RSVD13

AM37

RSVD22

BJ20

RSVD23

BK22

RSVD24

BF19

RSVD25

BH20

RSVD26

BK18

PM_DPRSTP#

L39

SM_CK_4 AV23

SM_CK#_4 AW23

RSVD30

BC23

RSVD31

BD24

RSVD35

AW20

RSVD36

BK20

RSVD5

AR12

RSVD6

AR13

RSVD7

AM12

RSVD8

AN13

RSVD1

P36

RSVD2

P37

RSVD3

R35

RSVD4

N35

GFX_VID_0 E35

GFX_VID_1 A39

GFX_VID_2 C38

GFX_VID_3 B39

GFX_VR_EN E36

RSVD27

BJ18

SM_RCOMP_VOH BK31

SM_RCOMP_VOL BL31

THERMTRIP#

N20

DPRSLPVR

G36

RSVD9

J12

CL_CLK AM49

CL_DATA AK50

CL_PWROK AT43

CL_RST# AN49

CL_VREF AM50

RSVD37

C48

RSVD38

D47

RSVD39

B44

RSVD40

C44

RSVD32

BJ29

RSVD33

BE24

RSVD21

B51

NC_1

BJ51

NC_2

BK51

NC_3

BK50

NC_4

BL50

NC_5

BL49

NC_6

BL3

NC_7

BL2

NC_8

BK1

NC_9

BJ1

NC_10

E1

NC_11

A5

NC_12

C51

NC_13

B50

NC_14

A50

NC_15

A49

SDVO_CTRL_CLK H35

SDVO_CTRL_DATA K36

CLK_REQ# G39

RSVD14

D20

ICH_SYNC# G40

RSVD20

H10

RSVD41

A35

RSVD42

B37

RSVD43

B36

RSVD44

B34

RSVD45

C34 PEG_CLK# K45

PEG_CLK K44

TEST_1 A37

NC_16

BK2 TEST_2 R32

R57 10K_0402_5%

1 2

C15

0.1U_0402_16V4Z

1

2

R45

1K_0402_1%

12

C161

0.1U_0402_16V4Z

1

2

R23 20_0402_1%

12

R411

1K_0402_1%

12

R22 20_0402_1%

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DDR_B_DQS#6

DDR_B_D63

DDR_B_D48

DDR_A_MA8

DDR_A_MA5

DDR_A_DQS#1

DDR_A_CAS#

DDR_A_BS#0

DDR_A_D6

DDR_A_D52

DDR_A_D35

DDR_A_D27

DDR_A_D26

DDR_A_D16 DDR_B_DQS0

DDR_B_DM5

DDR_B_D60

DDR_B_D53

DDR_B_D20

DDR_B_D17

DDR_B_D11

DDR_B_D10

DDR_A_MA12

DDR_A_DQS#5

DDR_A_DM7

DDR_A_D55

DDR_A_D5

DDR_A_D45

DDR_A_D29

DDR_A_D1

DDR_B_DQS7

DDR_B_CAS#

DDR_B_D62

DDR_B_D19

DDR_A_MA13

DDR_A_DQS5

DDR_A_DM6

DDR_A_BS#1

DDR_A_D48

DDR_A_D44

DDR_A_D20

DDR_A_D14

DDR_B_MA5

DDR_B_DQS#0

DDR_B_BS#0

DDR_B_D50

DDR_B_D41

DDR_B_D23

DDR_A_D47

DDR_A_D39

DDR_A_D31

DDR_B_WE#

DDR_B_MA1

DDR_B_DM2

DDR_B_DM0

DDR_B_D33

DDR_B_D24

DDR_A_MA4

DDR_A_DQS7

DDR_A_D40

DDR_A_D38

DDR_A_D37

DDR_A_D2

DDR_B_MA7

DDR_B_MA13

DDR_B_D55

DDR_B_D32

DDR_B_D29

DDR_B_D28

DDR_B_D21

DDR_A_MA11

DDR_A_DQS#4

DDR_A_DQS#0

DDR_A_DM5

DDR_A_BS#2

DDR_A_D63

DDR_A_D50

DDR_A_D19

DDR_A_D17

DDR_B_D8

DDR_B_D61

DDR_A_DQS4

DDR_A_DM4

DDR_A_D62

DDR_A_D54

DDR_A_D36

DDR_A_D11

DDR_B_DQS#5

DDR_B_DQS#3

DDR_B_DQS4

DDR_B_BS#2

DDR_B_D54

DDR_B_D52

DDR_B_D25

DDR_A_MA6

DDR_A_MA2

DDR_A_D9

DDR_A_D4

SB_RCVEN#

DDR_B_MA8

DDR_B_DQS6

DDR_B_DQS5

DDR_B_DM4

DDR_B_DM3

DDR_B_D5

DDR_B_D34

DDR_B_D14

DDR_B_D0

DDR_A_MA3

DDR_A_MA0

DDR_A_D34

DDR_A_D18

DDR_B_MA2

DDR_B_MA10DDR_B_D42

DDR_B_D39

DDR_B_D38

DDR_B_D36

DDR_A_RAS#

DDR_A_MA10

DDR_A_DQS#3

DDR_A_D60

DDR_A_D46

DDR_A_D42

DDR_A_D28

DDR_B_MA4

DDR_B_D7

DDR_B_D6

DDR_B_D46

DDR_B_D30

DDR_B_D18DDR_A_DQS3

DDR_A_DQS0

DDR_A_DM0

DDR_A_D59

DDR_A_D58

DDR_A_D15

DDR_B_DM6

DDR_B_D57

DDR_B_D4

DDR_B_D35

DDR_B_D27

DDR_B_D2

DDR_B_D1

DDR_A_MA1

DDR_A_D43

DDR_A_D41

DDR_A_D24

DDR_B_MA9

DDR_B_MA12

DDR_B_MA11

DDR_B_DQS3

DDR_B_DQS2

DDR_B_DM1

DDR_B_D56

DDR_B_D37

DDR_B_D16

DDR_B_D12

DDR_A_WE#

DDR_A_DQS1

DDR_A_D51

DDR_A_D22

DDR_A_D12

DDR_A_D0

DDR_B_DQS#2

DDR_B_DQS#1

DDR_B_D59

DDR_B_D51

DDR_B_D47

DDR_A_MA9

DDR_A_DQS#2

DDR_A_DQS2

DDR_A_D7

DDR_A_D61

DDR_A_D56

DDR_A_D32

DDR_A_D30

DDR_A_D21

DDR_B_RAS#

DDR_B_BS#1

DDR_B_D9

DDR_B_D45

DDR_B_D43

DDR_B_D40

DDR_B_D15

DDR_A_DQS#6

DDR_A_DM2

DDR_A_D53

DDR_A_D49

DDR_A_D10

DDR_B_MA0

DDR_B_DQS#7

DDR_B_D58

DDR_B_D44

DDR_B_D3

DDR_B_D13

DDR_A_MA7

DDR_A_DQS#7

DDR_A_DQS6

DDR_A_DM3

DDR_A_DM1

DDR_A_D8

DDR_A_D57

DDR_B_MA6

DDR_B_MA3

DDR_B_DQS#4

DDR_B_DQS1

DDR_B_DM7

DDR_B_D49

DDR_B_D31

DDR_B_D26

DDR_B_D22

SA_RCVEN#

DDR_A_D33

DDR_A_D3

DDR_A_D25

DDR_A_D23

DDR_A_D13

DDR_A_BS#0 13

DDR_A_BS#1 13

DDR_A_BS#2 13

DDR_A_DQS[0..7] 13

DDR_A_DQS#[0..7] 13

DDR_A_MA[0..13] 13

DDR_A_RAS# 13

DDR_A_D[0..63]13

DDR_B_BS#0 14

DDR_B_BS#1 14

DDR_B_BS#2 14

DDR_B_DM[0..7] 14

DDR_B_DQS[0..7] 14

DDR_B_DQS#[0..7] 14

DDR_B_MA[0..13] 14

DDR_B_RAS# 14

DDR_B_D[0..63]14

DDR_A_DM[0..7] 13

DDR_A_CAS# 13 DDR_B_CAS# 14

DDR_A_WE# 13

DDR_B_WE# 14

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

IGT30 LA-3571P

0.1

CRESTLINE((2/6)-DDR2 A/B CH

Custom

847Monday, December 25, 2006

2006/08/04 2006/10/06

Compal Electronics, Inc.

T1

DDR SYSTEM MEMORY B

U22E

CRESTLINE_1p0

SB_DQ_0

AP49

SB_DQ_1

AR51

SB_DQ_10

BA49

SB_DQ_11

BE50

SB_DQ_12

BA51

SB_DQ_13

AY49

SB_DQ_14

BF50

SB_DQ_15

BF49

SB_DQ_16

BJ50

SB_DQ_17

BJ44

SB_DQ_18

BJ43

SB_DQ_19

BL43

SB_DQ_2

AW50

SB_DQ_20

BK47

SB_DQ_21

BK49

SB_DQ_22

BK43

SB_DQ_23

BK42

SB_DQ_24

BJ41

SB_DQ_25

BL41

SB_DQ_26

BJ37

SB_DQ_27

BJ36

SB_DQ_28

BK41

SB_DQ_29

BJ40

SB_DQ_3

AW51

SB_DQ_30

BL35

SB_DQ_31

BK37

SB_DQ_32

BK13

SB_DQ_33

BE11

SB_DQ_34

BK11

SB_DQ_35

BC11

SB_DQ_36

BC13

SB_DQ_37

BE12

SB_DQ_38

BC12

SB_DQ_39

BG12

SB_DQ_4

AN51

SB_DQ_40

BJ10

SB_DQ_41

BL9

SB_DQ_42

BK5

SB_DQ_43

BL5

SB_DQ_44

BK9

SB_DQ_45

BK10

SB_DQ_46

BJ8

SB_DQ_47

BJ6

SB_DQ_48

BF4

SB_DQ_49

BH5

SB_DQ_5

AN50

SB_DQ_50

BG1

SB_DQ_51

BC2

SB_DQ_52

BK3

SB_DQ_53

BE4

SB_DQ_54

BD3

SB_DQ_55

BJ2

SB_DQ_56

BA3

SB_DQ_57

BB3

SB_DQ_58

AR1

SB_DQ_59

AT3

SB_DQ_6

AV50

SB_DQ_60

AY2

SB_DQ_61

AY3

SB_DQ_62

AU2

SB_DQ_63

AT2

SB_DQ_7

AV49

SB_DQ_8

BA50

SB_DQ_9

BB50

SB_BS_0 AY17

SB_BS_1 BG18

SB_BS_2 BG36

SB_CAS# BE17

SB_DM_0 AR50

SB_DM_1 BD49

SB_DM_2 BK45

SB_DM_3 BL39

SB_DM_4 BH12

SB_DM_5 BJ7

SB_DM_6 BF3

SB_DM_7 AW2

SB_DQS_0 AT50

SB_DQS_1 BD50

SB_DQS_2 BK46

SB_DQS_3 BK39

SB_DQS_4 BJ12

SB_DQS_5 BL7

SB_DQS_6 BE2

SB_DQS_7 AV2

SB_DQS#_0 AU50

SB_DQS#_1 BC50

SB_DQS#_2 BL45

SB_DQS#_3 BK38

SB_DQS#_4 BK12

SB_DQS#_5 BK7

SB_DQS#_6 BF2

SB_DQS#_7 AV3

SB_MA_0 BC18

SB_MA_1 BG28

SB_MA_10 BG17

SB_MA_11 BE37

SB_MA_12 BA39

SB_MA_13 BG13

SB_MA_2 BG25

SB_MA_3 AW17

SB_MA_4 BF25

SB_MA_5 BE25

SB_MA_6 BA29

SB_MA_7 BC28

SB_MA_8 AY28

SB_MA_9 BD37

SB_RAS# AV16

SB_RCVEN# AY18

SB_WE# BC17

DDR SYSTEM MEMORY A

U22D

CRESTLINE_1p0

SA_DQ_0

AR43

SA_DQ_1

AW44

SA_DQ_10

BG47

SA_DQ_11

BJ45

SA_DQ_12

BB47

SA_DQ_13

BG50

SA_DQ_14

BH49

SA_DQ_15

BE45

SA_DQ_16

AW43

SA_DQ_17

BE44

SA_DQ_18

BG42

SA_DQ_19

BE40

SA_DQ_2

BA45

SA_DQ_20

BF44

SA_DQ_21

BH45

SA_DQ_22

BG40

SA_DQ_23

BF40

SA_DQ_24

AR40

SA_DQ_25

AW40

SA_DQ_26

AT39

SA_DQ_27

AW36

SA_DQ_28

AW41

SA_DQ_29

AY41

SA_DQ_3

AY46

SA_DQ_30

AV38

SA_DQ_31

AT38

SA_DQ_32

AV13

SA_DQ_33

AT13

SA_DQ_34

AW11

SA_DQ_35

AV11

SA_DQ_36

AU15

SA_DQ_37

AT11

SA_DQ_38

BA13

SA_DQ_39

BA11

SA_DQ_4

AR41

SA_DQ_40

BE10

SA_DQ_41

BD10

SA_DQ_42

BD8

SA_DQ_43

AY9

SA_DQ_44

BG10

SA_DQ_45

AW9

SA_DQ_46

BD7

SA_DQ_47

BB9

SA_DQ_48

BB5

SA_DQ_49

AY7

SA_DQ_5

AR45

SA_DQ_50

AT5

SA_DQ_51

AT7

SA_DQ_52

AY6

SA_DQ_53

BB7

SA_DQ_54

AR5

SA_DQ_55

AR8

SA_DQ_56

AR9

SA_DQ_57

AN3

SA_DQ_58

AM8

SA_DQ_59

AN10

SA_DQ_6

AT42

SA_DQ_60

AT9

SA_DQ_61

AN9

SA_DQ_62

AM9

SA_DQ_63

AN11

SA_DQ_7

AW47

SA_DQ_8

BB45

SA_DQ_9

BF48

SA_BS_0 BB19

SA_BS_1 BK19

SA_BS_2 BF29

SA_CAS# BL17

SA_DM_0 AT45

SA_DM_1 BD44

SA_DM_2 BD42

SA_DM_3 AW38

SA_DM_4 AW13

SA_DM_5 BG8

SA_DM_6 AY5

SA_DQS_0 AT46

SA_DQS_1 BE48

SA_DQS_2 BB43

SA_DQS_3 BC37

SA_DQS_4 BB16

SA_DQS_5 BH6

SA_DQS_6 BB2

SA_DQS_7 AP3

SA_DM_7 AN6

SA_DQS#_0 AT47

SA_DQS#_1 BD47

SA_DQS#_2 BC41

SA_DQS#_3 BA37

SA_DQS#_4 BA16

SA_DQS#_5 BH7

SA_DQS#_6 BC1

SA_DQS#_7 AP2

SA_MA_0 BJ19

SA_MA_1 BD20

SA_MA_10 BC19

SA_MA_11 BE28

SA_MA_12 BG30

SA_MA_13 BJ16

SA_MA_2 BK27

SA_MA_3 BH28

SA_MA_4 BL24

SA_MA_5 BK28

SA_MA_6 BJ27

SA_MA_7 BJ25

SA_MA_8 BL28

SA_MA_9 BA28

SA_RAS# BE18

SA_RCVEN# AY20

SA_WE# BA19

T2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

HSYNC_R

VSYNC_R

LVDSB1+

LVDSB1-

LVDSBC+

LVDSBC-

LVDSA0+

LVDSA0-

LVDSAC-

LVDSAC+

LVDSA2-

LVDSA2+

LVDSB2+

LVDSB2-

LVDSA1-

LVDSA1+

LVDSB0+

LVDSB0-

TV_COMPS

TV_LUMA

TV_CRMA

CRT_R

CRT_G

CRT_B

CRT_G

CRT_B

CRT_R

CRT_VSYNC

CRT_HSYNC 3VDDCDA

3VDDCCL

GMCH_LVDDEN

GMCH_ENBKL

EDID_DAT_LCD

EDID_CLK_LCD

PEG_RXN13

PEG_RXN14

PEG_RXN0

PEG_RXN1

PEG_RXN3

PEG_RXN4

PEG_RXN6

PEG_RXP2

PEG_RXP3

PEG_RXP5

PEG_RXP6

PEG_RXP8

PEG_RXP9

PEG_RXP11

PEG_RXP12

PEG_RXP14

PEG_RXP15

PEG_RXN9

PEG_RXN12

PEG_RXN15

PEG_RXN2

PEG_RXN5

PEG_RXP0

PEG_RXP1

PEG_RXP4

PEG_RXP7

PEG_RXP10

PEG_RXP13

PEGCOMP

PEG_RXN7

PEG_RXN8

PEG_RXN10

PEG_RXN11

PEG_TXP15

PEG_TXP14

PEG_TXP13

PEG_TXP12

PEG_TXP8

PEG_TXP9

PEG_TXP10

PEG_TXP11

PEG_TXP4

PEG_TXP5

PEG_TXP6

PEG_TXP7

PEG_TXP0

PEG_TXP1

PEG_TXP2

PEG_TXP3

PEG_M_TXP5

PEG_M_TXP4

PEG_M_TXP3

PEG_M_TXP10

PEG_M_TXP6

PEG_M_TXP2

PEG_M_TXP7

PEG_M_TXP12

PEG_M_TXP9

PEG_M_TXP11

PEG_M_TXP8

PEG_M_TXP14

PEG_M_TXP1

PEG_M_TXP15

PEG_M_TXP0

PEG_M_TXP13

PEG_M_TXN4

PEG_M_TXN3

PEG_M_TXN6

PEG_M_TXN9

PEG_M_TXN10

PEG_M_TXN7

PEG_M_TXN12

PEG_M_TXN14

PEG_M_TXN15

PEG_M_TXN1

PEG_M_TXN0

PEG_TXN5

PEG_TXN11

PEG_M_TXN5

PEG_M_TXN2

PEG_M_TXN8

PEG_M_TXN13

PEG_M_TXN11

PEG_TXN12

PEG_TXN13

PEG_TXN10

PEG_TXN14

PEG_TXN4

PEG_TXN6

PEG_TXN1

PEG_TXN0

PEG_TXN15

PEG_TXN7

PEG_TXN8

PEG_TXN2

PEG_TXN3

PEG_TXN9

TV_LUMA

TV_CRMA

TV_COMPS

EDID_CLK_LCD

EDID_DAT_LCD

LVDSB1+37

LVDSB1-37

LVDSA0+37

LVDSA0-37

LVDSAC+37 LVDSAC-37

LVDSA2-37

LVDSA2+37

LVDSB2-37

LVDSB2+37

LVDSA1-37

LVDSA1+37

LVDSB0-37

LVDSB0+37

LVDSBC-37 LVDSBC+37

TV_COMPS17 TV_LUMA17 TV_CRMA17

CRT_R17

CRT_G17

CRT_B17

CRT_HSYNC17

CRT_VSYNC17

3VDDCDA17 3VDDCCL17

GMCH_ENBKL16

GMCH_LVDDEN16

PEG_RXP[0..15] 18

PEG_RXN[0..15] 18

PEG_M_TXP[0..15] 18

PEG_M_TXN[0..15] 18

CFG137

CFG77

CFG87

CFG57

CFG167

CFG197

CFG97

CFG207

CFG127

EDID_CLK_LCD37 EDID_DAT_LCD37

+3VS

+3VS

+3VS

+3VS

+VCC_PEG

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

IGT30 LA-3571P

0.1

CRESTLINE((3/6)-VGA/LVDS/TV

Custom

947Monday, December 25, 2006

2006/08/04 2006/10/06

Compal Electronics, Inc.

For Calero: 255ohm

For Crestline:1.3kohm

For Calero: 1.5Kohm

For Crestline:2.4kohm

PEGCOMP trace width

and spacing is 20/25 mils.

CFG9

CFG[17:3] have internal pull up

CFG[19:18] have internal pull down

Strap Pin Table

CFG[15:14] Reserved

Reserved

Reserved

CFG[2:0] FSB Freq select

(PCIE Graphics Lane Reversal)

1 = Low Power mode

0 = Normal mode

0 = Reverse Lane

1 = Reverse Lane

*

01 = XOR Mode Enabled

10 = All Z Mode Enabled

11 = Normal Operation

010 = FSB 800MHz

011 = FSB 667MHz

Others = Reserved

(Lane number in Order)

CFG[18:17] Reserved

SDVO_CTRLDATA

1 = PCIE/SDVO are operating simu.

*

*

*

*

00 = Reserved

0 = DMI x 2

*

0 = Disabled

*

(Default)

0 = No SDVO Device Present

0 = Normal Operation

1 = SDVO Device Present

1 = Enabled

CFG8 (Low power PCIE)

CFG[13:12] (XOR/ALLZ)

CFG[11:10]

CFG20 (PCIE/SDVO concurrent)

CFG7 (CPU Strap)

CFG6

CFG16 (FSB Dynamic ODT)

CFG19 (DMI Lane Reversal)

CFG5 (DMI select)

1 = Mobile CPU

0 = Reserved

1 = DMI x 4

1 = Normal Operation

*

0 = Only PCIE or SDVO is operational.

*

R62 2.4K_0402_1% 12

R59

2.2K_0402_5%

UMA@

12

R66

24.9_0402_1%

1 2

C243 0.1U_0402_16V4ZVGA@

R27 4.02K_0402_1%@

1 2

C279 0.1U_0402_16V4ZVGA@

C223 0.1U_0402_16V4ZVGA@

C239 0.1U_0402_16V4ZVGA@

R415 150_0603_1%UMA@

12

C258 0.1U_0402_16V4ZVGA@

R429 10K_0402_5%

1 2

C264 0.1U_0402_16V4ZVGA@

C242 0.1U_0402_16V4ZVGA@

R413 4.02K_0402_1%@

1 2

C233 0.1U_0402_16V4ZVGA@

R32 4.02K_0402_1%@

1 2

R419 150_0603_1%UMA@

12

R33 4.02K_0402_1%@

1 2

R422 39_0402_1%

1 2

C261 0.1U_0402_16V4ZVGA@

C282 0.1U_0402_16V4ZVGA@

C218 0.1U_0402_16V4ZVGA@

R25 4.02K_0402_1%@

1 2

C221 0.1U_0402_16V4ZVGA@

C257 0.1U_0402_16V4ZVGA@

R424 39_0402_1%

1 2 C256 0.1U_0402_16V4ZVGA@

C278 0.1U_0402_16V4ZVGA@

C263 0.1U_0402_16V4ZVGA@

C235 0.1U_0402_16V4ZVGA@

C262 0.1U_0402_16V4ZVGA@

R414 150_0603_1%UMA@

12

C284 0.1U_0402_16V4ZVGA@

R425 10K_0402_5%

1 2

R55 4.02K_0402_1%@

1 2

C222 0.1U_0402_16V4ZVGA@

C241 0.1U_0402_16V4ZVGA@

C234 0.1U_0402_16V4ZVGA@

C224 0.1U_0402_16V4ZVGA@

R29 4.02K_0402_1%@

1 2

C217 0.1U_0402_16V4ZVGA@

C236 0.1U_0402_16V4ZVGA@

C276 0.1U_0402_16V4ZVGA@

C259 0.1U_0402_16V4ZVGA@

R421 150_0603_1%UMA@

12

C283 0.1U_0402_16V4ZVGA@

C277 0.1U_0402_16V4ZVGA@

R26 4.02K_0402_1%@

1 2

C281 0.1U_0402_16V4ZVGA@

R418 150_0603_1%UMA@

12

R52 2.2K_0402_5%

1 2

LVDS

PCI-EXPRESS GRAPHICS

TV VGA

U22C

CRESTLINE_1p0

PEG_COMPI N43

PEG_COMPO M43

PEG_RX#_0 J51

PEG_RX#_1 L51

PEG_RX#_2 N47

PEG_RX#_3 T45

PEG_RX#_4 T50

PEG_RX#_5 U40

PEG_RX#_6 Y44

PEG_RX#_7 Y40

PEG_RX#_8 AB51

PEG_RX#_9 W49

PEG_RX#_10 AD44

PEG_RX#_11 AD40

PEG_RX#_12 AG46

PEG_RX#_13 AH49

PEG_RX#_14 AG45

PEG_RX#_15 AG41

PEG_RX_0 J50

PEG_RX_1 L50

PEG_RX_2 M47

PEG_RX_3 U44

PEG_RX_4 T49

PEG_RX_5 T41

PEG_RX_6 W45

PEG_RX_7 W41

PEG_RX_8 AB50

PEG_RX_9 Y48

PEG_RX_10 AC45

PEG_RX_11 AC41

PEG_RX_12 AH47

PEG_RX_13 AG49

PEG_RX_14 AH45

PEG_RX_15 AG42

PEG_TX#_0 N45

PEG_TX#_10 AC46

PEG_TX#_3 N51

PEG_TX#_4 R50

PEG_TX#_5 T42

PEG_TX#_6 Y43

PEG_TX#_7 W46

PEG_TX#_8 W38

PEG_TX#_9 AD39

PEG_TX#_1 U39

PEG_TX#_11 AC49

PEG_TX#_12 AC42

PEG_TX#_13 AH39

PEG_TX#_14 AE49

PEG_TX#_15 AH44

PEG_TX#_2 U47

PEG_TX_0 M45

PEG_TX_1 T38

PEG_TX_2 T46

PEG_TX_3 N50

PEG_TX_4 R51

PEG_TX_5 U43

PEG_TX_6 W42

PEG_TX_7 Y47

PEG_TX_8 Y39

PEG_TX_9 AC38

PEG_TX_10 AD47

PEG_TX_11 AC50

PEG_TX_12 AD43

PEG_TX_13 AG39

PEG_TX_14 AE50

PEG_TX_15 AH43

L_CTRL_CLK

E39

L_CTRL_DATA

E40

L_DDC_CLK

C37

L_DDC_DATA

D35

L_VDD_EN

K40

LVDS_IBG

L41

LVDS_VBG

L43

LVDS_VREFH

N41

LVDS_VREFL

N40

LVDSA_CLK#

D46

LVDSA_CLK

C45

LVDSA_DATA#_0

G51

LVDSA_DATA#_1

E51

LVDSA_DATA#_2

F49

LVDSA_DATA_1

E50

LVDSA_DATA_2

F48

LVDSB_CLK#

D44

LVDSB_CLK

E42

LVDSB_DATA#_0

G44

LVDSB_DATA#_1

B47

LVDSB_DATA#_2

B45

LVDSB_DATA_1

A47

LVDSB_DATA_2

A45

L_BKLT_EN

H39

TVA_DAC

E27

TVB_DAC

G27

TVC_DAC

K27

TVA_RTN

F27

TVB_RTN

J27

TVC_RTN

L27

CRT_BLUE

H32

CRT_BLUE#

G32

CRT_DDC_CLK

K33

CRT_DDC_DATA

G35

CRT_GREEN

K29

CRT_GREEN#

J29

CRT_HSYNC

F33

CRT_TVO_IREF

C32

CRT_RED

F29

CRT_RED#

E29

CRT_VSYNC

E33

LVDSA_DATA_0

G50

LVDSB_DATA_0

E44

L_BKLT_CTRL

J40

TV_DCONSEL_0

M35

TV_DCONSEL_1

P33

R56

2.2K_0402_5%

UMA@

12

R416 150_0603_1%UMA@

12

R417

1.3K_0402_1%

12

C225 0.1U_0402_16V4ZVGA@

C219 0.1U_0402_16V4ZVGA@

R58 4.02K_0402_1%@

1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+1.25VS_A_SM

+VCCP

+V1.25VS_AXF

+1.25VS

+1.25VS_DMI

+1.8V_SM_CK

+3VS_HV

+VCC_PEG

+1.25VS_PEGPLL

+1.25VS

+1.25VS_AXD

+1.25VS_A_SM_CK

+3VS_PEG_BG

+3VS

+1.8V_TXLVDS

+3VS +3VS_DAC_BG

+3VS +3VS_DAC_CRT

+3VS

+3VS_TVDACA

+3VS

+3VS_TVDACB

+3VS

+3VS_TVDACC

+1.8V

+1.8V_LVDS

+1.5VS

+1.5VS_QDAC

+3VS_TVDACA

+3VS_TVDACB

+3VS_TVDACC

+1.25VS_PEGPLL

+1.25VS_HPLL

+1.5VS_TVDAC

+1.8V_LVDS

+1.5VS_QDAC

+1.8V_TXLVDS

+1.25VS_MPLL

+1.25VS_DPLLB

+1.25VS_HPLL

+1.25VS_DPLLA

+3VS_DAC_BG

VCCSYNC

+3VS

+3VS_DAC_CRT

+1.8V_TXLVDS

+1.8V

+1.25VS_HPLL

+1.25VS

+1.25VS_MPLL

+1.25VS

+VCC_PEG

+VCCP

+1.25VS

+1.25VS_PEGPLL +1.25VS

+1.25VS

+V1.25VS_AXF

+1.25VS

+1.25VS_DMI +1.8V

+1.8V_SM_CK

+1.25VS_DPLLA

+1.25VS_DPLLB

+1.25VS

+1.25VS

+1.5VS

+1.5VS_TVDAC

+VCCP

+3VS

+VCCP_D

+3VS_HV

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

IGT30 LA-3571P

0.1

CRESTLINE(4/6)-PWR

Custom

10 47Monday, December 25, 2006

2006/08/04 2006/10/06

Compal Electronics, Inc.

20 mils

40 mils

20mils

0316 add

0316 add

0316 add

0316 add

0317 change value

0317 change value

0316 add

04/10 no stuff

04/10 stuff

C165

0.1U_0402_16V4Z

1

2

R36

0_0603_5%

UMA@

12

C55

22U_0805_6.3V4Z

1

2

C94

0.1U_0402_16V4Z

1

2

C77

1U_0603_10V4Z

1

2

C14

0.47U_0603_10V7K

1

2

C138

2.2U_0805_16V4Z

1

2

C117

0.1U_0402_16V4Z

UMA@

1

2

C96

0.1U_0402_16V4Z

UMA@

1

2

C13

0.1U_0402_16V4Z

1

2

+

C199

220U_D2_4VM

1

2

R435

0_0805_5%

@

12

C58

0.022U_0402_16V7K

UMA@

1

2

R428

0_0402_5%

12

C66

0.022U_0402_16V7K

UMA@

1

2

R433

10U_FLC-453232-100K_0.25A_10%

1 2

R37

0_0603_5%

12

C116

0.022U_0402_16V7K

UMA@

1

2

R74

0_0603_5%

UMA@

12

+

C8

150U_D_6.3VM

1

2

C11

0.1U_0402_16V4Z

1

2

C54

0_0402_5%

VGA@

U22

PM

VGA@

C534

10U_0805_10V4Z

1

2

R49

0_0603_5%

UMA@

12

C533

10U_0805_10V6K

1

2

C54

0.1U_0402_16V4Z

UMA@

1

2

R39

0_0603_5%

UMA@

1 2

C82

0.1U_0402_16V4Z

1

2

R431

10U_FLC-453232-100K_0.25A_10%

1 2

C152

1U_0603_10V4Z

UMA@

1

2

R43

0_0603_5%

UMA@

12

C46

0.1U_0402_16V4Z

UMA@

1

2

R398

MBK2012121YZF_0805

12

+

C198

330U_D2E_2.5VM_R7

1

2

C525

10U_0805_10V4Z

1

2

R35

0_0603_5%

UMA@

12

C117

0_0402_5%

VGA@

C34

1U_0603_10V4Z

1

2

C164

0.1U_0402_16V4Z

1

2

C135

0.47U_0603_10V7K

1

2

C158

1000P_0402_50V7K

UMA@

1

2

C92

4.7U_0805_10V4Z

1

2

C65

0_0402_5%

VGA@

R21

0_0805_5%

1 2

R24

0_0603_5%

1 2

C12

0.47U_0603_10V7K

1

2

C129

4.7U_0805_10V4Z

1

2

C76

0.022U_0402_16V7K

UMA@

1

2

L4

BLM18PG121SN1D_0603

12

C65

0.1U_0402_16V4Z

UMA@

1

2

C168

0.1U_0402_16V4Z

1

2

C166

0.1U_0402_16V4Z

1

2

D16

CH751H-40PT_SOD323-2

2 1

R69

0_0603_5%

UMA@

12

C64

0.1U_0402_16V4Z

UMA@

1

2

C179

10U_0805_10V4Z

1

2

C152

0_0603_5%

VGA@

C139

0.1U_0402_16V4Z

1

2

+

C181

220U_D2_4VM

1

2

C36

10U_0805_10V4Z

1

2

R54

0_0603_5%

UMA@

1 2

R73

0_0603_5%

1 2

C155

10U_0805_10V6K

UMA@

1

2

C24

4.7U_0805_10V4Z

1

2

R72

0_0603_5%

12

C524

10U_0805_10V4Z

1

2

R28

0_0805_5%

1 2

C78

0.022U_0402_16V7K

1

2

C29

4.7U_0805_6.3V6K

1

2

C79

0.1U_0402_16V4Z

1

2

C21

0.47U_0603_10V7K

1

2

C75

1U_0402_6.3V4Z

1

2

C87

10U_0805_10V6K

1

2

C28

22U_0805_6.3V4Z

1

2

R397

MBK2012121YZF_0805

12

R34

0_0805_5%

1 2

+

C156

220U_D2_4VM_R15

UMA@

1

2

R41

0_0805_5%

1 2

C158

0_0402_5%

VGA@

C43

0.1U_0402_16V4Z

1

2

C163

0.1U_0402_16V4Z

1

2

C49

22U_0805_6.3V4Z

1

2

POWER

CRTPLLA PEGA SMTV

D TV/CRTLVDS

VTTLF

PEG SM CK AXD

AXF

VTT

DMI

HV

A CK A LVDS

U22H

CRESTLINE_1p0

VTT_19 T2

VTT_20 R3

VTT_21 R2

VTT_22 R1

VCCD_CRT

M32

VCCA_PEG_BG

K50

VCCA_PEG_PLL

U51

VCCA_CRT_DAC_1

A33

VCCA_CRT_DAC_2

B33

VCCA_DPLLA

B49

VCCA_DPLLB

H49

VCCA_HPLL

AL2

VCCA_LVDS

A41

VCCA_MPLL

AM2

VCCA_TVA_DAC_1

C25

VCCA_TVA_DAC_2

B25

VCCA_TVB_DAC_1

C27

VCCA_TVB_DAC_2

B27

VCCA_TVC_DAC_1

B28

VCCA_TVC_DAC_2

A28

VCCD_PEG_PLL

U48

VTT_15 T7

VTT_16 T6

VTT_17 T5

VTT_18 T3

VTT_12 T11

VTT_13 T10

VTT_14 T9

VCCSYNC

J32

VCCD_HPLL

AN2

VTT_1 U13

VTT_2 U12

VTT_4 U9

VTT_5 U8

VTT_6 U7

VTT_7 U5

VTT_8 U3

VTT_9 U2

VTT_10 U1

VTT_11 T13

VTT_3 U11

VCCA_SM_CK_1

BC29

VCCA_SM_CK_2

BB29

VCCA_DAC_BG

A30

VCCD_TVDAC

L29

VTTLF1 A7

VTTLF2 F2

VTTLF3 AH1

VCC_RXR_DMI_1 AH50

VCC_RXR_DMI_2 AH51

VCC_SM_CK_1 BK24

VCC_SM_CK_2 BK23

VCC_SM_CK_3 BJ24

VCC_SM_CK_4 BJ23

VCCD_LVDS_1

J41

VCCD_QDAC

N28

VCC_AXD_2 AU28

VCC_AXD_3 AU24

VCC_AXD_5 AT25

VCC_AXF_1 B23

VCC_AXF_2 B21

VCC_AXF_3 A21

VCCA_SM_1

AW18

VCCA_SM_2

AV19

VCCA_SM_3

AU19

VCCA_SM_4

AU18

VCCA_SM_5

AU17

VCCA_SM_7

AT22

VCCA_SM_8

AT21

VCCA_SM_9

AT19

VCC_DMI AJ50

VCC_TX_LVDS A43

VSSA_DAC_BG

B32

VSSA_LVDS

B41

VSSA_PEG_BG

K49

VCC_HV_1 C40

VCC_HV_2 B40

VCC_PEG_1 AD51

VCCA_SM_10

AT18

VCCA_SM_11

AT17

VCCA_SM_NCTF_1

AR17

VCCA_SM_NCTF_2

AR16

VCCD_LVDS_2

H42

VCC_PEG_2 W50

VCC_PEG_3 W51

VCC_PEG_4 V49

VCC_PEG_5 V50

VCC_AXD_NCTF AR29

VCC_AXD_4 AT29

VCC_AXD_6 AT30

VCC_AXD_1 AT23

R51

0_0603_5%

12

C56

0.022U_0402_16V7K

UMA@

1

2

R426

10_0402_5%

12

C38

1U_0603_10V4Z

1

2

C64

0_0402_5%

VGA@

C47

22U_0805_6.3V4Z

1

2

C97

0.022U_0402_16V7K

UMA@

1

2

R76

0_0805_5%

12

C154

1000P_0402_50V7K

1

2

C96

0_0402_5%

VGA@

C68

1U_0603_10V4Z

1

2

C58

0_0402_5%

VGA@

C162

10U_0805_10V4Z

1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

VCCSM_LF1

VCCSM_LF7

VCCSM_LF2

VCCSM_LF3

VCCSM_LF6

VCCSM_LF4

VCCSM_LF5

+VCCP

+VCCP

+VCCGFX

+1.8V

+VCCGFX

+VCCP +VCCP

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

IGT30 LA-3571P

0.1

CRESTLINE((5/6)-PWR/GND

Custom

11 47Monday, December 25, 2006

2006/08/04 2006/10/06

Compal Electronics, Inc.

Check : power

C53

0.1U_0402_16V4Z

1

2

C133 0.47U_0402_6.3V6K

1

2

C159 1U_0603_10V4Z

1

2

R53

0_0603_5%

1 2

C111

0.22U_0402_10V4Z

1

2

C122

0.22U_0402_10V4Z

1

2

C26

10U_0805_10V4Z

1

2

+

C125

330U_D2E_2.5VM_R7

1

2

C86

0.1U_0402_16V4Z

1

2

C114

22U_0805_6.3V4Z

1

2

C18 0.22U_0603_10V7K

1

2

C88

0.22U_0402_10V4Z

1

2

C17

0.1U_0402_16V4Z

1

2

C126

10U_0805_10V4Z

1

2

C19 0.1U_0402_16V4Z

1

2

+

C211

220U_D2_4VM_R15

1

2

C39

4.7U_0603_6.3V6K

1

2

C22 0.1U_0402_16V4Z

1

2

C16

0.22U_0402_10V4Z

1

2

C99

0.01U_0402_16V7K

1

2

C48

1U_0603_10V4Z

1

2

C143

22U_0805_6.3V4Z

1

2

C51

0.1U_0402_16V4Z

1

2

C45

10U_0805_10V4Z

1

2

C145 1U_0603_10V4Z

1

2

+

C9

330U_D2E_2.5VM_R7

1

2

C52

0.1U_0402_16V4Z

1

2

C27

10U_0805_10V4Z

1

2

C37

0.1U_0402_16V4Z

1

2

POWER

VCC CORE

VCC SMVCC GFX

VCC GFX NCTF

VCC SM LF

U22G

CRESTLINE_1p0

VCC_5

AC32

VCC_6

AK32

VCC_7

AJ31

VCC_8

AJ28

VCC_9

AH32

VCC_10

AH31

VCC_11

AH29

VCC_12

AF32

VCC_2

AT34

VCC_4

AC31

VCC_SM_10

BA35

VCC_SM_20

BF33

VCC_SM_30

BJ34

VCC_SM_6

AW35

VCC_SM_7

AY35

VCC_SM_8

BA32

VCC_SM_9

BA33

VCC_SM_11

BB33

VCC_SM_12

BC32

VCC_SM_13

BC33

VCC_SM_14

BC35

VCC_SM_15

BD32

VCC_SM_16

BD35

VCC_SM_17

BE32

VCC_SM_18

BE33

VCC_SM_19

BE35

VCC_SM_2

AU33

VCC_SM_21

BF34

VCC_SM_22

BG32

VCC_SM_23

BG33

VCC_SM_24

BG35

VCC_SM_25

BH32

VCC_SM_26

BH34

VCC_SM_27

BH35

VCC_SM_28

BJ32

VCC_SM_29

BJ33

VCC_SM_3

AU35

VCC_SM_31

BK32

VCC_SM_32

BK33

VCC_SM_33

BK34

VCC_SM_34

BK35

VCC_AXG_NCTF_10 U17

VCC_AXG_NCTF_11 U19

VCC_AXG_NCTF_12 U20

VCC_AXG_NCTF_13 U21

VCC_AXG_NCTF_14 U23

VCC_AXG_NCTF_15 U26

VCC_AXG_NCTF_16 V16

VCC_AXG_NCTF_17 V17

VCC_AXG_NCTF_18 V19

VCC_AXG_NCTF_19 V20

VCC_AXG_NCTF_2 T18

VCC_AXG_NCTF_20 V21

VCC_AXG_NCTF_21 V23

VCC_AXG_NCTF_22 V24

VCC_AXG_NCTF_23 Y15

VCC_AXG_NCTF_24 Y16

VCC_AXG_NCTF_25 Y17

VCC_AXG_NCTF_26 Y19

VCC_AXG_NCTF_27 Y20

VCC_AXG_NCTF_28 Y21

VCC_AXG_NCTF_29 Y23

VCC_AXG_NCTF_3 T19

VCC_AXG_NCTF_30 Y24

VCC_AXG_NCTF_31 Y26

VCC_AXG_NCTF_32 Y28

VCC_AXG_NCTF_33 Y29

VCC_AXG_NCTF_34 AA16

VCC_AXG_NCTF_35 AA17

VCC_AXG_NCTF_36 AB16

VCC_AXG_NCTF_37 AB19

VCC_AXG_NCTF_38 AC16

VCC_AXG_NCTF_39 AC17

VCC_AXG_NCTF_4 T21

VCC_AXG_NCTF_40 AC19

VCC_AXG_NCTF_41 AD15

VCC_AXG_NCTF_42 AD16

VCC_AXG_NCTF_43 AD17

VCC_AXG_NCTF_44 AF16

VCC_AXG_NCTF_45 AF19

VCC_AXG_NCTF_46 AH15

VCC_AXG_NCTF_47 AH16

VCC_AXG_NCTF_48 AH17

VCC_AXG_NCTF_49 AH19

VCC_AXG_NCTF_5 T22

VCC_AXG_NCTF_50 AJ16

VCC_AXG_NCTF_51 AJ17

VCC_AXG_NCTF_52 AJ19

VCC_AXG_NCTF_53 AK16

VCC_AXG_NCTF_54 AK19

VCC_AXG_NCTF_55 AL16

VCC_AXG_NCTF_56 AL17

VCC_AXG_NCTF_57 AL19

VCC_AXG_NCTF_58 AL20

VCC_AXG_NCTF_59 AL21

VCC_AXG_NCTF_6 T23

VCC_AXG_NCTF_60 AL23

VCC_AXG_NCTF_61 AM15

VCC_AXG_NCTF_62 AM16

VCC_AXG_NCTF_63 AM19

VCC_AXG_NCTF_65 AM21

VCC_AXG_NCTF_66 AM23

VCC_AXG_NCTF_67 AP15

VCC_AXG_NCTF_68 AP16

VCC_AXG_NCTF_69 AP17

VCC_AXG_NCTF_7 T25

VCC_AXG_NCTF_70 AP19

VCC_AXG_NCTF_71 AP20

VCC_AXG_NCTF_72 AP21

VCC_AXG_NCTF_8 U15

VCC_AXG_NCTF_9 U16

VCC_SM_35

BL33

VCC_SM_4

AV33

VCC_SM_5

AW33

VCC_AXG_NCTF_1 T17

VCC_1

AT35

VCC_SM_1

AU32

VCC_AXG_1

R20

VCC_AXG_2

T14

VCC_AXG_3

W13

VCC_AXG_4

W14

VCC_AXG_5

Y12

VCC_AXG_6

AA20

VCC_AXG_7

AA23

VCC_AXG_8

AA26

VCC_AXG_9

AA28

VCC_AXG_10

AB21

VCC_AXG_11

AB24

VCC_AXG_12

AB29

VCC_AXG_13

AC20

VCC_AXG_14

AC21

VCC_AXG_15

AC23

VCC_AXG_16

AC24

VCC_AXG_17

AC26

VCC_AXG_18

AC28

VCC_AXG_19

AC29

VCC_AXG_20

AD20

VCC_AXG_21

AD23

VCC_AXG_22

AD24

VCC_AXG_23

AD28

VCC_AXG_24

AF21

VCC_AXG_25

AF26

VCC_AXG_27

AH20

VCC_AXG_28

AH21

VCC_AXG_29

AH23

VCC_AXG_30

AH24

VCC_AXG_NCTF_73 AP23

VCC_AXG_NCTF_74 AP24

VCC_AXG_NCTF_75 AR20

VCC_AXG_NCTF_76 AR21

VCC_AXG_NCTF_77 AR23

VCC_AXG_NCTF_78 AR24

VCC_AXG_NCTF_79 AR26

VCC_13

R30

VCC_AXG_31

AH26

VCC_AXG_33

AJ20

VCC_AXG_34

AN14

VCC_SM_LF1 AW45

VCC_SM_LF2 BC39

VCC_SM_LF3 BE39

VCC_SM_LF4 BD17

VCC_SM_LF5 BD4

VCC_SM_LF6 AW8

VCC_SM_LF7 AT6

VCC_AXG_26

AA31

VCC_AXG_32

AD31

VCC_3

AH28

VCC_AXG_NCTF_64 AM20

VCC_SM_36

AU30

VCC_AXG_NCTF_80 V26

VCC_AXG_NCTF_81 V28

VCC_AXG_NCTF_82 V29

VCC_AXG_NCTF_83 Y31

C33

0.22U_0402_10V4Z

1

2

POWER

VCC NCTF

VSS NCTF

VSS SCBVCC AXM

VCC AXM NCTF

U22F

CRESTLINE_1p0

VCC_NCTF_1

AB33

VCC_NCTF_20

AK37

VCC_NCTF_29

AP35

VCC_NCTF_42

U31

VCC_NCTF_9

AF33

VCC_NCTF_10

AF36

VCC_NCTF_11

AH33

VCC_NCTF_12

AH35

VCC_NCTF_13

AH36

VCC_NCTF_14

AH37

VCC_NCTF_15

AJ33

VCC_NCTF_17

AK33

VCC_NCTF_18

AK35

VCC_NCTF_19

AK36

VCC_NCTF_2

AB36

VCC_NCTF_24

AL33

VCC_NCTF_25

AL35

VCC_NCTF_3

AB37

VCC_NCTF_30

AP36

VCC_NCTF_31

AR35

VCC_NCTF_32

AR36

VCC_NCTF_38

T30

VCC_NCTF_39

T34

VCC_NCTF_40

T35

VCC_NCTF_41

U29

VCC_NCTF_4

AC33

VCC_NCTF_43

U32

VCC_NCTF_44

U33

VCC_NCTF_45

U35

VCC_NCTF_46

U36

VCC_NCTF_48

V33

VCC_NCTF_49

V36

VCC_NCTF_50

V37

VCC_NCTF_5

AC35

VCC_NCTF_6

AC36

VCC_NCTF_7

AD35

VSS_NCTF_1 T27

VSS_NCTF_2 T37

VSS_NCTF_3 U24

VSS_NCTF_4 U28

VSS_NCTF_5 V31

VSS_NCTF_6 V35

VSS_NCTF_8 AB17

VSS_NCTF_9 AB35

VSS_NCTF_10 AD19

VCC_NCTF_8

AD36

VSS_NCTF_7 AA19

VSS_NCTF_11 AD37

VSS_NCTF_12 AF17

VSS_NCTF_14 AK17

VSS_NCTF_16 AM24

VSS_NCTF_17 AP26

VSS_NCTF_19 AR15

VSS_NCTF_20 AR19

VSS_NCTF_21 AR28

VCC_NCTF_33

Y32

VCC_AXM_4 AK24

VCC_AXM_5 AK23

VCC_AXM_6 AJ26

VCC_AXM_7 AJ23

VCC_AXM_NCTF_1

AL24

VCC_AXM_NCTF_2

AL26

VCC_AXM_NCTF_3

AL28

VCC_AXM_NCTF_4

AM26

VCC_AXM_NCTF_5

AM28

VCC_AXM_NCTF_6

AM29

VCC_AXM_NCTF_7

AM31

VCC_AXM_NCTF_10

AP29

VCC_AXM_NCTF_11

AP31

VCC_AXM_NCTF_17

AR31

VCC_NCTF_34

Y33

VCC_NCTF_35

Y35

VCC_NCTF_36

Y36

VCC_NCTF_37

Y37 VSS_SCB1 A3

VSS_SCB2 B2

VSS_SCB3 C1

VSS_SCB4 BL1

VSS_SCB5 BL51

VSS_SCB6 A51

VCC_NCTF_26

AA33

VCC_NCTF_27

AA35

VCC_NCTF_28

AA36

VCC_NCTF_16

AJ35

VCC_NCTF_21

AD33

VSS_NCTF_13 AF35

VCC_NCTF_22

AJ36

VCC_AXM_3 AK29

VCC_AXM_NCTF_14

AL29

VCC_AXM_NCTF_15

AL31

VCC_AXM_NCTF_16

AL32

VSS_NCTF_15 AM17

VCC_AXM_NCTF_8

AM32

VCC_AXM_NCTF_9

AM33

VCC_NCTF_23

AM35

VSS_NCTF_18 AP28

VCC_AXM_NCTF_12

AP32

VCC_AXM_NCTF_13

AP33

VCC_AXM_NCTF_18

AR32

VCC_AXM_NCTF_19

AR33

VCC_AXM_2 AT31

VCC_AXM_1 AT33

VCC_NCTF_47

V32

C151

22U_0805_6.3V4Z

1

2

C35 0.22U_0603_10V7K

1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

IGT30 LA-3571P

0.1

CRESTLINE((6/6)-PWR/GND

Custom

12 47Monday, December 25, 2006

2006/08/04 2006/10/06

Compal Electronics, Inc.

VSS

U22J

CRESTLINE_1p0

VSS_199

C46

VSS_200

C50

VSS_201

C7

VSS_202

D13

VSS_203

D24

VSS_204

D3

VSS_205

D32

VSS_206

D39

VSS_207

D45

VSS_208

D49

VSS_209

E10

VSS_210

E16

VSS_211

E24

VSS_212

E28

VSS_213

E32

VSS_214

E47

VSS_215

F19

VSS_216

F36

VSS_217

F4

VSS_218

F40

VSS_219

F50

VSS_220

G1

VSS_221

G13

VSS_222

G16

VSS_223

G19

VSS_224

G24

VSS_225

G28

VSS_226

G29

VSS_227

G33

VSS_228

G42

VSS_229

G45

VSS_230

G48

VSS_231

G8

VSS_232

H24

VSS_233

H28

VSS_234

H4

VSS_235

H45

VSS_236

J11

VSS_237

J16

VSS_238

J2

VSS_239

J24

VSS_240

J28

VSS_241

J33

VSS_242

J35

VSS_243

J39

VSS_245

K12

VSS_246

K47

VSS_247

K8

VSS_248

L1

VSS_249

L17

VSS_250

L20

VSS_251

L24

VSS_252

L28

VSS_253

L3

VSS_254

L33

VSS_255

L49

VSS_256

M28

VSS_257

M42

VSS_258

M46

VSS_259

M49

VSS_260

M5

VSS_261

M50

VSS_262

M9

VSS_263

N11

VSS_264

N14

VSS_265

N17

VSS_266

N29

VSS_267

N32

VSS_268

N36

VSS_269

N39

VSS_270

N44

VSS_271

N49

VSS_272

N7

VSS_273

P19

VSS_274

P2

VSS_275

P23

VSS_276

P3

VSS_277

P50

VSS_278

R49

VSS_279

T39

VSS_280

T43

VSS_281

T47

VSS_282

U41

VSS_283

U45

VSS_284

U50

VSS_287 W11

VSS_288 W39

VSS_289 W43

VSS_290 W47

VSS_291 W5

VSS_292 W7

VSS_293 Y13

VSS_294 Y2

VSS_295 Y41

VSS_285

V2

VSS_286

V3

VSS_296 Y45

VSS_297 Y49

VSS_298 Y5

VSS_299 Y50

VSS_300 Y11

VSS_301 P29

VSS_302 T29

VSS_303 T31

VSS_304 T33

VSS_305 R28

VSS_306 AA32

VSS_307 AB32

VSS_308 AD32

VSS_309 AF28

VSS_310 AF29

VSS_311 AT27

VSS_312 AV25

VSS_313 H50

VSS

U22I

CRESTLINE_1p0

VSS_1

A13

VSS_198 C41

VSS_2

A15

VSS_3

A17

VSS_4

A24

VSS_5

AA21

VSS_6

AA24

VSS_7

AA29

VSS_8

AB20

VSS_9

AB23

VSS_10

AB26

VSS_11

AB28

VSS_12

AB31

VSS_13

AC10

VSS_14

AC13

VSS_15

AC3

VSS_16

AC39

VSS_17

AC43

VSS_19

AD1

VSS_20

AD21

VSS_21

AD26

VSS_22

AD29

VSS_23

AD3

VSS_24

AD41

VSS_25

AD45

VSS_26

AD49

VSS_27

AD5

VSS_28

AD50

VSS_29

AD8

VSS_30

AE10

VSS_31

AE14

VSS_32

AE6

VSS_33

AF20

VSS_34

AF23

VSS_35

AF24

VSS_36

AF31

VSS_37

AG2

VSS_38

AG38

VSS_39

AG43

VSS_40

AG47

VSS_41

AG50

VSS_42

AH3

VSS_43

AH40

VSS_44

AH41

VSS_45

AH7

VSS_46

AH9

VSS_47

AJ11

VSS_48

AJ13

VSS_49

AJ21

VSS_50

AJ24

VSS_51

AJ29

VSS_52

AJ32

VSS_53

AJ43

VSS_54

AJ45

VSS_55

AJ49

VSS_56

AK20

VSS_57

AK21

VSS_58

AK26

VSS_59

AK28

VSS_60

AK31

VSS_61

AK51

VSS_62

AL1

VSS_63

AM11

VSS_64

AM13

VSS_65

AM3

VSS_66

AM4

VSS_67

AM41

VSS_68

AM45

VSS_69

AN1

VSS_70

AN38

VSS_71

AN39

VSS_72

AN43

VSS_73

AN5

VSS_74

AN7

VSS_75

AP4

VSS_76

AP48

VSS_77

AP50

VSS_78

AR11

VSS_79

AR2

VSS_80

AR39

VSS_81

AR44

VSS_82

AR47

VSS_83

AR7

VSS_84

AT10

VSS_85

AT14

VSS_86

AT41

VSS_87

AT49

VSS_97

AW1

VSS_100 AW24

VSS_101 AW29

VSS_102 AW32

VSS_103 AW5

VSS_104 AW7

VSS_105 AY10

VSS_106 AY24

VSS_107 AY37

VSS_108 AY42

VSS_109 AY43

VSS_110 AY45

VSS_111 AY47

VSS_112 AY50

VSS_113 B10

VSS_114 B20

VSS_115 B24

VSS_116 B29

VSS_117 B30

VSS_118 B35

VSS_119 B38

VSS_120 B43

VSS_121 B46

VSS_122 B5

VSS_123 B8

VSS_124 BA1

VSS_125 BA17

VSS_126 BA18

VSS_127 BA2

VSS_128 BA24

VSS_129 BB12

VSS_130 BB25

VSS_131 BB40

VSS_132 BB44

VSS_133 BB49

VSS_134 BB8

VSS_135 BC16

VSS_136 BC24

VSS_137 BC25

VSS_138 BC36

VSS_139 BC40

VSS_140 BC51

VSS_141 BD13

VSS_142 BD2

VSS_143 BD28

VSS_144 BD45

VSS_145 BD48

VSS_146 BD5

VSS_147 BE1

VSS_148 BE19

VSS_149 BE23

VSS_150 BE30

VSS_151 BE42

VSS_152 BE51

VSS_153 BE8

VSS_154 BF12

VSS_155 BF16

VSS_156 BF36

VSS_157 BG19

VSS_158 BG2

VSS_159 BG24

VSS_160 BG29

VSS_161 BG39

VSS_162 BG48

VSS_163 BG5

VSS_164 BG51

VSS_165 BH17

VSS_166 BH30

VSS_167 BH44

VSS_168 BH46

VSS_169 BH8

VSS_170 BJ11

VSS_171 BJ13

VSS_172 BJ38

VSS_173 BJ4

VSS_174 BJ42

VSS_175 BJ46

VSS_176 BK15

VSS_177 BK17

VSS_178 BK25

VSS_179 BK29

VSS_88

AU1

VSS_89

AU23

VSS_90

AU29

VSS_91

AU3

VSS_92

AU36

VSS_93

AU49

VSS_94

AU51

VSS_95

AV39

VSS_96

AV48

VSS_99

AW16 VSS_98

AW12

VSS_180 BK36

VSS_182 BK44

VSS_184 BK8

VSS_186 BL13

VSS_188 BL22

VSS_18

AC47

VSS_191 C12

VSS_193 C19

VSS_195 C29

VSS_197 C36

VSS_181 BK40

VSS_183 BK6

VSS_185 BL11

VSS_187 BL19

VSS_189 BL37

VSS_190 BL47

VSS_192 C16

VSS_194 C28

VSS_196 C33

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DDR_A_MA11

+DDR_MCH_REF1

DDR_CKE1_DIMMA

M_CLK_DDR0

M_CLK_DDR1

M_CLK_DDR#0

M_CLK_DDR#1

DDR_CKE1_DIMMA

DDR_CS0_DIMMA#

CLK_SMBCLK

DDR_A_MA1

DDR_A_MA10

DDR_A_MA3

DDR_A_MA9 DDR_A_MA7

DDR_A_MA12

DDR_A_MA5

DDR_A_WE#

DDR_A_D8

DDR_A_D17

DDR_A_D16

DDR_A_D27

DDR_A_D26

DDR_A_DQS1

DDR_A_DQS0

DDR_A_DQS2

DDR_A_DM3

DDR_A_DM1

DDR_A_DM2

DDR_A_DM0

DDR_A_DQS4

DDR_A_DQS6

DDR_A_DQS7

CLK_SMBDATA

DDR_CKE0_DIMMA

DDR_A_MA8

DDR_CS1_DIMMA#

DDR_A_MA11

DDR_A_MA2

DDR_A_MA0

DDR_A_MA4

DDR_A_MA6

DDR_A_CAS#

DDR_A_BS#1

DDR_A_RAS#

DDR_A_D20

DDR_A_D21

DDR_A_D53

DDR_A_D52

DDR_A_D55

DDR_A_DM6

DDR_A_DM4

DDR_A_DM5

DDR_A_DM7

DDR_A_MA13

DDR_A_DQS5

DDR_A_BS#0

DDR_A_BS#2

DDR_A_DQS#0

DDR_A_DQS#1

DDR_A_DQS#2

DDR_A_DQS3

DDR_A_DQS#3

DDR_A_DQS#4

DDR_A_DQS#5

DDR_A_DQS#6

DDR_A_DQS#7

DDR_A_MA6

M_ODT1

DDR_A_MA7

M_ODT0

DDR_A_D51DDR_A_D54

DDR_A_D50

DDR_A_D49

DDR_A_D48

DDR_A_D42

DDR_A_D35

DDR_A_D22

DDR_A_D23

DDR_A_D12

DDR_A_D13

DDR_A_D15 DDR_A_D10

DDR_A_D9 DDR_A_D11

DDR_A_D14

DDR_A_D0

DDR_A_D1

DDR_A_D3

DDR_A_D2

DDR_A_D4

DDR_A_D5

DDR_A_D6

DDR_A_D7

DDR_A_D18

DDR_A_D19

DDR_A_D31

DDR_A_D30

DDR_A_D28DDR_A_D29 DDR_A_D25DDR_A_D24

DDR_A_D32

DDR_A_D33

DDR_A_D39

DDR_A_D38 DDR_A_D34

DDR_A_D44

DDR_A_D40 DDR_A_D45

DDR_A_D41

DDR_A_D43

DDR_A_D46 DDR_A_D47

DDR_A_D60

DDR_A_D61 DDR_A_D57

DDR_A_D56

DDR_A_D58 DDR_A_D63

DDR_A_D59 DDR_A_D62

DDR_A_MA3

DDR_A_MA8

DDR_A_MA1

DDR_A_MA5

DDR_A_BS#0

DDR_CS1_DIMMA#

DDR_A_MA10

M_ODT1

DDR_A_CAS#

DDR_A_WE# DDR_CS0_DIMMA#

DDR_A_RAS#

M_ODT0

DDR_A_MA13

DDR_A_BS#2

DDR_A_MA9

DDR_A_MA12

DDR_CKE0_DIMMA

DDR_A_MA0

DDR_A_MA4

DDR_A_BS#1

DDR_A_MA2

+DDR_MCH_REF1

DDR_A_MA14

DDR_A_MA14

DDR_A_D36

DDR_A_D37

EC_RX_P80_CLK EC_RX_P80_CLK_R

DDR_A_DQS#[0..7]8

DDR_A_DQS[0..7]8

DDR_A_D[0..63]8

DDR_A_DM[0..7]8

DDR_A_MA[0..13]8

DDR_CKE0_DIMMA7

DDR_A_BS#28

DDR_A_BS#08

DDR_A_WE#8

DDR_A_CAS#8

M_ODT17

DDR_CS1_DIMMA#7

M_CLK_DDR0 7

M_CLK_DDR#0 7

DDR_CKE1_DIMMA 7

DDR_A_BS#1 8

DDR_A_RAS# 8

DDR_CS0_DIMMA# 7

M_CLK_DDR#1 7

M_ODT0 7

+DDR_MCH_REF1 14

CLK_SMBDATA14,15 CLK_SMBCLK14,15

M_CLK_DDR1 7

PM_EXTTS#0 7

+DDR_MCH_REF114

EC_TX_P80_DATA14,33

EC_RX_P80_CLK14,33 DDR_A_MA14 7

EC_RX_P80_CLK_R14

+1.8V

+3VS

+1.8V

+1.8V

+0.9VS

+1.8V

+0.9VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

IGT30 LA-3571P

0.1

DDRII-SODIMM SLOT1

Custom

13 47Monday, December 25, 2006

2006/08/04 2006/10/06

Compal Electronics, Inc.

Layout Note:

Place these resistor

closely JP41,all

trace length Max=1.5"

Layout Note:

Place near JP41

Layout Note:

Place one cap close to every 2 pullup

resistors terminated to +0.9VS

SO-DIMM A

Top side

Layout Note:

+DDR_MCH_REF

trace width and

spacing is 20/20.

R19 0_0402_5%

1 2

C93

0.1U_0402_16V4Z

1

2

C127

0.1U_0402_16V4Z

1

2

C153

2.2U_0805_16V4Z

1

2

C59

0.1U_0402_16V4Z

1

2

C146

0.1U_0402_16V4Z

1

2

RP2

56_0804_8P4R_5%

18 27 36 45

RP9

56_0804_8P4R_5%

18 27 36 45

RP7

56_0804_8P4R_5%

1 8

2 7

3 6

4 5

C63

0.1U_0402_16V4Z

1

2

C115

0.1U_0402_16V4Z

1

2

C132

0.1U_0402_16V4Z

1

2

R14

10K_0402_5%

12

C67

0.1U_0402_16V4Z

1

2

R42 56_0402_5%

1 2

R13

10K_0402_5%

12

C98

0.1U_0402_16V4Z

1

2

C148

2.2U_0805_16V4Z

1

2

C254

0.1U_0402_16V4Z

1

2

RP11

56_0804_8P4R_5%

1 8

2 7

3 6

4 5

+

C25

470U_D2_2.5VM_R15

1

2

C141

0.1U_0402_16V4Z

1

2

JP3

FOX_ASOA426-M2RN-7F

ME@

VREF

1

VSS

3

DQ0

5

DQ1

7

VSS

9

DQS0#

11

DQS0

13

VSS

15

DQ2

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

VSS

41

DQ16

43

DQ17

45

VSS

47

DQS2#

49

DQS2

51

VSS

53

DQ18

55

DQ19

57

VSS

59

DQ24

61

DQ25

63

VSS

65

DM3

67

NC

69

VSS

71

DQ26

73

DQ27

75

VSS

77

CKE0

79

VDD

81

NC

83

BA2

85

VDD

87

A12

89

A9

91

A8

93

VDD

95

A5

97

A3

99

A1

101

VDD

103

A10/AP

105

BA0

107

WE#

109

VDD

111

CAS#

113

NC/S1#

115

VDD

117

NC/ODT1

119

VSS

121

DQ32

123

DQ33

125

VSS

127

DQS4#

129

DQS4

131

VSS

133

DQ34

135

DQ35

137

VSS

139

DQ40

141

DQ41

143

VSS

145

DM5

147

VSS

149

DQ42

151

DQ43

153

VSS

155

DQ48

157

DQ49

159

VSS

161

NC,TEST

163

VSS

165

DQS6#

167

DQS6

169

VSS

171

DQ50

173

DQ51

175

VSS

177

DQ56

179

DQ57

181

VSS

183

DM7

185

VSS

187

DQ58

189

DQ59

191

VSS

193

SDA

195

SCL

197

VDDSPD

199

VSS 2

DQ4 4

DQ5 6

VSS 8

DM0 10

VSS 12

DQ6 14

DQ7 16

VSS 18

DQ12 20

DQ13 22

VSS 24

DM1 26

VSS 28

CK0 30

CK0# 32

VSS 34

DQ14 36

DQ15 38

VSS 40

VSS 42

DQ20 44

DQ21 46

VSS 48

NC 50

DM2 52

VSS 54

DQ22 56

DQ23 58

VSS 60

DQ28 62

DQ29 64

VSS 66

DQS3# 68

DQS3 70

VSS 72

DQ30 74

DQ31 76

VSS 78

NC/CKE1 80

VDD 82

NC/A15 84

NC/A14 86

VDD 88

A11 90

A7 92

A6 94

VDD 96

A4 98

A2 100

A0 102

VDD 104

BA1 106

RAS# 108

S0# 110

VDD 112

ODT0 114

NC/A13 116

VDD 118

NC 120

VSS 122

DQ36 124

DQ37 126

VSS 128

DM4 130

VSS 132

DQ38 134

DQ39 136

VSS 138

DQ44 140

DQ45 142

VSS 144

DQS5# 146

DQS5 148

VSS 150

DQ46 152

DQ47 154

VSS 156

DQ52 158

DQ53 160

VSS 162

CK1 164

CK1# 166

VSS 168

DM6 170

VSS 172

DQ54 174

DQ55 176

VSS 178

DQ60 180

DQ61 182

VSS 184

DQS7# 186

DQS7 188

VSS 190

DQ62 192

DQ63 194

VSS 196

SA0 198

SA1 200

RP1

56_0804_8P4R_5%

1 8

2 7

3 6

4 5

C251

0.1U_0402_16V4Z

1

2

C6

0.1U_0402_16V4Z

1

2

R112

100_0402_1%

12

C123

0.1U_0402_16V4Z

1

2

C119

0.1U_0402_16V4Z

1

2

R113

100_0402_1%

12

C71

0.1U_0402_16V4Z

1

2

C112

0.1U_0402_16V4Z

1

2

C74

0.1U_0402_16V4Z

1

2

C41

2.2U_0805_16V4Z

1

2

C134

0.1U_0402_16V4Z

1

2

R46 56_0402_5%

1 2

RP6

56_0804_8P4R_5%

18 27 36 45

C42

2.2U_0805_16V4Z

1

2

C253

2.2U_0805_16V4Z

1

2

C144

2.2U_0805_16V4Z

1

2

R61 56_0402_5%

1 2

C85

0.1U_0402_16V4Z

1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DDR_B_BS#2

DDR_CKE2_DIMMB

DDR_B_MA9

DDR_B_MA12

DDR_B_MA7

DDR_B_MA6

DDR_CKE3_DIMMB

DDR_B_MA11

M_ODT2

DDR_B_MA13

DDR_B_RAS#

DDR_CS2_DIMMB#DDR_CS3_DIMMB#

M_ODT3

DDR_B_BS#0

DDR_B_MA10

DDR_B_MA8

DDR_B_CAS#

DDR_B_WE#

DDR_B_MA4

DDR_B_BS#1

DDR_B_MA2

DDR_B_MA0

DDR_B_MA1

DDR_B_MA5

DDR_B_MA3

DDR_B_MA14

DDR_B_D54DDR_B_D51

DDR_B_D49

DDR_B_DM4

DDR_B_D12

DDR_B_D33

DDR_CS3_DIMMB#

DDR_B_D11

DDR_B_D52

DDR_B_MA10

DDR_B_D55

DDR_B_D44

DDR_B_D40

DDR_CKE2_DIMMB

DDR_B_D10

DDR_B_D63

M_CLK_DDR#2

DDR_B_D47

DDR_B_D56

DDR_B_DM5

DDR_B_D27

DDR_B_DQS#3

DDR_B_D22

DDR_B_D41

DDR_B_MA8

DDR_B_BS#2

DDR_B_D3

DDR_B_D1

CLK_SMBDATA

DDR_B_D39

DDR_B_D36

M_CLK_DDR#3

DDR_B_MA1

DDR_B_DQS#2

DDR_B_D0

DDR_B_D60

DDR_B_DM6

DDR_B_D48

DDR_B_D43

DDR_B_D16

DDR_B_D5

M_ODT3

DDR_B_BS#0

DDR_B_D62

M_CLK_DDR2

DDR_CS2_DIMMB#

DDR_B_MA7

DDR_B_D6

DDR_B_D4

DDR_B_D53

DDR_B_MA4

DDR_B_MA11

DDR_B_D29

DDR_B_D23

DDR_B_D15

DDR_B_MA12

DDR_B_D30

DDR_B_DM3

DDR_B_D9

DDR_B_D8

DDR_B_DQS#0

EC_RX_P80_CLK_R

DDR_B_MA6

DDR_B_MA14

M_CLK_DDR3

DDR_B_D7

DDR_B_DM0

DDR_B_D50

DDR_B_D42

M_ODT2

DDR_B_D26

DDR_B_DQS4

DDR_B_D17

DDR_B_D2

DDR_B_D57

DDR_B_D34

DDR_B_DQS#4

DDR_B_WE#

DDR_B_D18

DDR_B_DQS2

DDR_B_DQS#5

DDR_B_DQS#6

DDR_B_MA13

DDR_B_RAS#

DDR_B_BS#1

DDR_B_MA0

DDR_CKE3_DIMMB

DDR_B_D35

DDR_B_D31

DDR_B_DQS1

DDR_B_DQS#7

DDR_B_DQS5

DDR_B_D59

DDR_B_D61

DDR_B_CAS#

DDR_B_D20

DDR_B_DQS7

DDR_B_D46

CLK_SMBCLK

DDR_B_DQS6

DDR_B_D38

DDR_B_D37

DDR_B_D21

DDR_B_D14

DDR_B_D13

DDR_B_D19

+DDR_MCH_REF1

DDR_B_D24

DDR_B_MA5 DDR_B_MA2

DDR_B_DQS3

DDR_B_DM1

DDR_B_MA3

DDR_B_MA9

DDR_B_D25

DDR_B_DQS0

DDR_B_D58

DDR_B_DM7

DDR_B_D45

DDR_B_DM2

DDR_B_D32

DDR_B_D28

DDR_B_DQS#1

DDR_B_DQS#[0..7]8

DDR_B_DQS[0..7]8

DDR_B_D[0..63]8

DDR_B_MA[0..13]8

DDR_B_DM[0..7]8

DDR_CKE3_DIMMB 7

DDR_CS2_DIMMB# 7

+DDR_MCH_REF1 13

CLK_SMBCLK13,15CLK_SMBDATA13,15

DDR_B_WE#8

DDR_B_BS#1 8

DDR_B_RAS# 8

DDR_B_CAS#8

M_ODT37

DDR_CKE2_DIMMB7

DDR_CS3_DIMMB#7

DDR_B_BS#28

DDR_B_BS#08

M_ODT2 7

M_CLK_DDR2 7

M_CLK_DDR#2 7

M_CLK_DDR3 7

M_CLK_DDR#3 7

PM_EXTTS#1 7

EC_TX_P80_DATA13,33

EC_RX_P80_CLK13,33 DDR_B_MA14 7

EC_RX_P80_CLK_R13

+1.8V

+3VS

+3VS

+1.8V

+1.8V

+0.9VS

+0.9VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

IGT30 LA-3571P

0.1

DDRII-SODIMM SLOT2

14 47Monday, December 25, 2006

2006/08/04 2006/10/06

Compal Electronics, Inc.

SO-DIMM B

Layout Note:

Place near JP42

Layout Note:

Place one cap close to every 2 pullup

resistors terminated to +0.9VS

Layout Note:

Place these resistor

closely JP42,all

trace length Max=1.5"

+

C81

470U_D2_2.5VM_R15

1

2

C249

0.1U_0402_16V4Z

1

2

RP4

56_0804_8P4R_5%

1 8

2 7

3 6

4 5

RP12

56_0804_8P4R_5%

1 8

2 7

3 6

4 5

RP13

56_0804_8P4R_5%

18 27 36 45

R396

10K_0402_5%

12

C118

0.1U_0402_16V4Z

1

2

RP5

56_0804_8P4R_5%

1 8

2 7

3 6

4 5

C136

0.1U_0402_16V4Z

1

2

R44 56_0402_5%

1 2

C157

2.2U_0805_16V4Z

1

2

C7

0.1U_0402_16V4Z

1

2

C62

0.1U_0402_16V4Z

1

2

R395

10K_0402_5%

1 2

C32

2.2U_0805_16V4Z

1

2

C149

2.2U_0805_16V4Z

1

2

JP4

FOX_AS0A426-MARG-7F

VREF

1

VSS

3

DQ0

5

DQ1

7

VSS

9

DQS0#

11

DQS0

13

VSS

15

DQ2

17

DQ3

19

VSS

21

DQ8

23

DQ9

25

VSS

27

DQS1#

29

DQS1

31

VSS

33

DQ10

35

DQ11

37

VSS

39

VSS

41

DQ16

43

DQ17

45

VSS

47

DQS2#

49

DQS2

51

VSS

53

DQ18

55

DQ19

57

VSS

59

DQ24

61

DQ25

63

VSS

65

DM3

67

NC

69

VSS

71

DQ26

73

DQ27

75

VSS

77

CKE0

79

VDD

81

NC

83

BA2

85

VDD

87

A12

89

A9

91

A8

93

VDD

95

A5

97

A3

99

A1

101

VDD

103

A10/AP

105

BA0

107

WE#

109

VDD

111

CAS#

113

NC/S1#

115

VDD

117

NC/ODT1

119

VSS

121

DQ32

123

DQ33

125

VSS

127

DQS4#

129

DQS4

131

VSS

133

DQ34

135

DQ35

137

VSS

139

DQ40

141

DQ41

143

VSS 2

DQ4 4

DQ5 6

VSS 8

DM0 10

VSS 12

DQ6 14

DQ7 16

VSS 18

DQ12 20

DQ13 22

VSS 24

DM1 26

VSS 28

CK0 30

CK0# 32

VSS 34

DQ14 36

DQ15 38

VSS 40

VSS 42

DQ20 44

DQ21 46

VSS 48

NC 50

DM2 52

VSS 54

DQ22 56

DQ23 58

VSS 60

DQ28 62

DQ29 64

VSS 66

DQS3# 68

DQS3 70

VSS 72

DQ30 74

DQ31 76

VSS 78

NC/CKE1 80

VDD 82

NC/A15 84

NC/A14 86

VDD 88

A11 90

A7 92

A6 94

VDD 96

A4 98

A2 100

A0 102

VDD 104

BA1 106

RAS# 108

S0# 110

VDD 112

ODT0 114

NC/A13 116

VDD 118

NC 120

VSS 122

DQ36 124

DQ37 126

VSS 128

DM4 130

VSS 132

DQ38 134

DQ39 136

VSS 138

DQ44 140

DQ45 142

VSS 144

VSS

145

DM5

147

VSS

149

DQ42

151

DQ43

153

VSS

155

DQ48

157

DQ49

159

VSS

161

NC,TEST

163

VSS

165

DQS6#

167

DQS6

169

VSS

171

DQ50

173

DQ51

175

VSS

177

DQ56

179

DQ57

181

VSS

183

DM7

185

VSS

187

DQ58

189

DQ59

191

VSS

193

SDA

195

SCL

197

VDDSPD

199

DQS5# 146

DQS5 148

VSS 150

DQ46 152

DQ47 154

VSS 156

DQ52 158

DQ53 160

VSS 162

CK1 164

CK1# 166

VSS 168

DM6 170

VSS 172

DQ54 174

DQ55 176

VSS 178

DQ60 180

DQ61 182

VSS 184

DQS7# 186

DQS7 188

VSS 190

DQ62 192

DQ63 194

VSS 196

SAO 198

SA1 200

C147

0.1U_0402_16V4Z

1

2

C124

0.1U_0402_16V4Z

1

2

C121

0.1U_0402_16V4Z

1

2

C128

0.1U_0402_16V4Z

1

2

C72

0.1U_0402_16V4Z

1

2

C142

0.1U_0402_16V4Z

1

2

C31

2.2U_0805_16V4Z

1

2

C69

0.1U_0402_16V4Z

1

2

C137

0.1U_0402_16V4Z

1

2

C44

2.2U_0805_16V4Z

1

2

C61

0.1U_0402_16V4Z

1

2

C255

2.2U_0805_16V4Z

1

2

C95

0.1U_0402_16V4Z

1

2

RP8

56_0804_8P4R_5%

18 27 36 45

C57

0.1U_0402_16V4Z

1

2

RP3

56_0804_8P4R_5%

18 27 36 45

C89

0.1U_0402_16V4Z

1

2

R65 56_0402_5%

1 2

C113

0.1U_0402_16V4Z

1

2

C131

0.1U_0402_16V4Z

1

2

R48 56_0402_5%

1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

FSC

FSA

FSB

R_PCIE_SATA

R_PCIE_SATA#

CLK_SMBCLK

CLK_XTAL_IN

CLK_XTAL_OUT

CLK_SMBDATA

FSB

FSA

R_CPU_BCLK

R_CPU_BCLK#

R_MCH_BCLK

R_MCH_BCLK#

R_CPU_XDP

R_CPU_XDP#

R_CLK_PCIE_MCard

R_CLK_PCIE_MCard#

R_MCH_3GPLL

R_MCH_3GPLL#

R_PCIE_ICH

R_PCIE_ICH#

ITP_EN 27_SEL

ITP_EN

PCI2_TME

PCI2_TME

FSC

PCI_CLK1

27_SEL

PCI_CLK3 CLKREQ#_H

CLKREQ_MCARD#R

CLK_48M_ICH

CLK_14M_ICH

CLK_PCI_ICH

CLK_14M_SIO

CLK_PCI_LPC

CLK_PCI_DB

CLK_PCI_1394

R_PCIE_NC1

R_PCIE_NC1#

R_PCIE_LAN#

R_PCIE_LAN

CLKREQ_LAN#R

R_MCH_DREFCLK

R_MCH_DREFCLK#

R_SSCDREFCLK

R_SSCDREFCLK#

CLK_SMBDATA

CLK_SMBCLK

CLK_XTAL_OUT

CLK_XTAL_IN

CPU_BSEL25

MCH_CLKSEL2 7

CPU_BSEL15

MCH_CLKSEL1 7

CPU_BSEL05

MCH_CLKSEL0 7

H_STP_PCI# 21

H_STP_CPU# 21

CLK_SMBCLK 13,14

CLK_CPU_BCLK# 4

CLK_CPU_BCLK 4

CLK_PCIE_LAN# 24

CLK_PCIE_LAN 24

CLK_SMBDATA 13,14

CLK_PCIE_SATA 20

CLK_PCIE_SATA# 20

CLK_14M_ICH21

CLK_48M_ICH21

CK_PWRGD 21

CLK_PCIE_MCARD# 27

CLK_PCIE_MCARD 27

CLK_14M_SIO32

CLKREQ_3GPLL#7

CLKSATAREQ#21

CLKREQ_MCARD# 27

CLKREQ_NC1# 26

CLK_PCI_ICH19

MCH_SSCDREFCLK 7

MCH_SSCDREFCLK# 7

CLK_MCH_DREFCLK 7

CLK_MCH_DREFCLK# 7

CLK_PCIE_ICH 21

CLK_PCIE_ICH# 21

CLK_MCH_3GPLL 7

CLK_MCH_3GPLL# 7

CLK_PCI_139428

CLK_PCI_LPC33

CLK_PCI_DB32

CLK_PCIE_NC1 26

CLK_PCIE_NC1# 26

CLK_PCIE_MCARD1# 27

CLK_PCIE_MCARD1 27

CLKREQ_LAN# 24

CLK_PCIE_VGA# 18

CLK_PCIE_VGA 18

CLK_27M_VGA# 18

CLK_27M_VGA 18

ICH_SMBDATA21,26,27

ICH_SMBCLK21,26,27

CLK_MCH_BCLK 7

CLK_MCH_BCLK# 7

+VCCP

+VCCP

+VCCP

+3VS_CK505

+3VS_CK505 +3VS_CK505 +3VS_CK505

+3VS_CK505

+3VS

+1.25VS_CK505

+1.25VS

+1.25VS_CK505

+1.25VS_CK505

+3VS

+3VS

+3VS

+3VS

+3VS_CK505

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

IGT30 LA-3571P

0.1

Clock generator

15 47Monday, December 25, 2006

2006/08/04 2006/10/06

Compal Electronics, Inc.

Stuff

Stuff

FSB Frequency Selet:

No Stuff

No Stuff

667MHz

CPU Driven

No Stuff

Stuff

800MHz

*

(Default)

1

1000

CLKSEL1

100

1

PCI

MHz

200

0

SRC

MHz

33.3

CPU

MHz

CLKSEL2

33.30

FSLA

CLKSEL0

166

FSLC

1

FSLB

Place close to U41

1= Enable SRC0 & 27MHz

For ITP_EN, 0 =SRC8/SRC8#; 1 = ITP/ITP#

For 27_SEL, 0 = Enable DOT96 & SRC1,

For PCI2_EN, 0 = Overclocking of CPU and SRC Allowed

1 = Overclocking of CPU and SRC NOT allowed

R919 R940 R956

R914 R921 R930 R943 R954R949

R943R949

Routing the trace at least 10mil

ICS9LPRS365/SA00001GT00

R919 R940 R956

R919 R940 R956

R959 R930 R914

R921

R959 R930 R921

R943R949 R914

C299 4.7P_0402_50V8C@

12

R185 10K_0402_5%@

1 2

R144 0_0402_5%

1 2

R129 0_0402_5%

1 2

R172 0_0402_5%

1 2

R134 0_0402_5%VGA@

1 2

R177 0_0402_5%

1 2

R472

56_0402_5%

@

1 2

R13933_0402_5%

1 2

C341

0.1U_0402_16V4Z

1

2

R174 0_0402_5%

1 2

R145 0_0402_5%

1 2

R176 0_0402_5%

1 2

R178 0_0402_5%

1 2

R468

1K_0402_5%

1 2

R458

10K_0402_5%

1 2

R141 0_0402_5%UMA@

1 2

R136 0_0402_5%UMA@

1 2

R464

10K_0402_5%

VGA@

1 2

R16922_0402_5%

1 2

R152

2.2K_0402_5%

C344

0.1U_0402_16V4Z

1

2

R476

1K_0402_5%

1 2

C334

0.1U_0402_16V4Z

1

2

R515 10K_0402_5%

1 2

R146 0_0402_5%

1 2

R478

2.2K_0402_5%

12

C342

0.1U_0402_16V4Z

1

2

R482

0_0402_5%@

1 2

R126 0_0402_5%

1 2

R125 0_1206_5%

1 2

C317 4.7P_0402_50V8C@

12

R16822_0402_5%

1 2

R12233_0402_5%

1 2

R182 0_0402_5%

1 2

R128 0_0402_5%

1 2

C329

10U_0805_10V4Z

1

2

R13733_0402_5%

1 2

R148 475_0402_1%

12

R121475_0402_1%

1 2

R13833_0402_5%

1 2

R167 475_0402_1%

12

C318 4.7P_0402_50V8C@

12

R147 10K_0402_5%

1 2

R133 0_0402_5%VGA@

1 2

C346 4.7P_0402_50V8C@

12

R484

1K_0402_5%

1 2

R462

10K_0402_5%

1 2

C333

0.1U_0402_16V4Z

1

2

G

D

S

Q9

2N7002_SOT23

2

1 3

R481

0_0402_5%@

12

R135 0_0402_5%UMA@

1 2

R471

0_0402_5%

1 2

R149 0_1206_5%

1 2

R12333_0402_5%

1 2

* Internal Pull-Up Resistor

** Internal Pull-Down Resistor

U3

SLG8SP510_TSSOP64

X1

60

X2

59

USB_48MHZ/FSLA

10

GND

19

VDDPLL3

16

PCI1/CR#_B

3

FSLB/TEST MODE

57

PCI3

5

VDDSRC_IO

26

SDATA 63

GND48

11

VDD48

9

PCI2/TME

4

SRC6 41

SRC7#/CR#_E 43

PCI_STOP# 38

GNDSRC

23

GNDCPU

52

SRC7/CR#_F 44

SRC9# 31

SRC8#/ITP# 46

SRC8/ITP 47

SRC10# 35

CPU0 54

PCI0/CR#_A

1

PCI4/27_Select

6

VDDSRC_IO

36

VDDPLL3_IO

20 VDD96_IO

12

VDD_PCI

2

GNDSRC

42

GND

15

SCLK 64

NC 48

GNDPCI

8

CPU_STOP# 37

PCIF5/ITP_EN

7

SRC9 30

CPU1#_F 50

SRC11#/CR#_G 32

SRC11/CR#_H 33

REF0/FSLC/TEST_SEL

62

CPU0# 53

CPU1_F 51

VDDREF

61

GNDREF

58

VDDSRC_IO

45

SRC10 34

VDDCPU_IO

49

SRC4# 28

SRC1/SE1/27MHz_NonSS 17

SRC2/SATA 21

SRC2#/SATA# 22

VDDCPU

55

GNDSRC

29

SRC1#/SE2/27MHz_SS 18

SRC0/DOT96 13

SRC3/CR#_C 24

SRC3#/CR#_D 25

SRC6# 40

SRC4 27

VDDSRC

39

SRC0/DOT96# 14

CK_PWRGD/PD# 56

C347 27P_0402_50V8J

Y1

14.31818MHZ_16PF_DSX840GA

12

C339

0.1U_0402_16V4Z

1

2

C343

0.1U_0402_16V4Z

1

2

R132 0_0402_5%VGA@

1 2

R459

10K_0402_5%

@

1 2

R166 10K_0402_5%

1 2

C332

0.1U_0402_16V4Z

1

2

R485

1K_0402_5%

1 2

R487 10K_0402_5%@

12

R131 0_0402_5%VGA@

1 2

C316 5P_0402_50V8C@

12

R461

10K_0402_5%

UMA@

1 2

C319

10U_0805_10V4Z

1

2

R465

10K_0402_5%

@

1 2

C345 4.7P_0402_50V8C@

12

C348 27P_0402_50V8J

R475

0_0402_5%

12

R124475_0402_1%

1 2

R469

1K_0402_5%@

12

R175 0_0402_5%

1 2

R179 0_0402_5%

1 2

R184 475_0402_1%

12

R127 0_0402_5%

1 2

R165

2.2K_0402_5%

C326

10U_0805_10V4Z

1

2

G

D

S

Q12

2N7002_SOT23

2

1 3

R173 0_0402_5%

1 2

R473

1K_0402_5%@

1 2

R467

2.2K_0402_5%

12

R143 0_0402_5%

1 2

C311 4.7P_0402_50V8C@

12

C335

0.1U_0402_16V4Z

1

2

R181 0_0402_5%

1 2

C331

0.1U_0402_16V4Z

1

2

R142 0_0402_5%UMA@

1 2

R479

0_0402_5%@

1 2

A

A

B

B

C

C

D

D

E

E

F

F

G

G

H

H

1 1

2 2

3 3

4 4

+LCDVDD_R

DISPOFF#

DISPOFF#

GMCH_ENBKL9

BKOFF#33

GMCH_LVDDEN9

DAC_BRIG33

INVT_PWM33

G7X_ENBKL18

ENBKL33

+3VS

INVPWR_B+B+

+3VS

+LCDVDD

+LCDVDD

+5VALW

INVPWR_B+

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

IGT30 LA-3571P

0.1

LVDS Connector

Custom

16 47Monday, December 25, 2006

2006/08/04 2006/10/06

Compal Electronics, Inc.

C232

4.7U_0805_10V4Z

UMA@

1

2

R886

0_0805_5%

1 2

L14 0_0805_5%

1 2

L13 0_0805_5%@1 2

D3

CH751H-40_SC76@

21

D2

CH751H-40_SC76

21

C527

68P_0402_50V8K

12

C526

0.1U_0603_50V4Z

12

C215

0.047U_0402_16V4Z

UMA@

1

2

G

D

S

Q3

AO3413_SOT23

UMA@

2

1 3

G

D

S

Q27

2N7002_SOT23

UMA@

2

13

Q28

DTC124EK_SC59

UMA@

2

13

R118

0_0402_5%VGA@ 12

JP40

MOLEX_53780-0790

1

2

3

4

5

6

7

R669

2.2K_0402_5%

VGA@

R117

0_0402_5%UMA@ 12

R119

100K_0402_5%

UMA@

1 2

R116

4.7K_0402_5%

1 2

R849 10K_0402_5%

UMA@

1 2

R446

100_0402_1%

UMA@

12

R452

100K_0402_5%

UMA@

1 2

C212

0.1U_0402_16V4Z

UMA@

1

2

R434

100K_0402_5%

UMA@

1 2

R437

0_0402_5%UMA@ 12

C213

4.7U_0805_10V4Z

UMA@

1

2

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

DDCDA

DDCCL

VSYNC

HSYNC

B

R

G

COMP

LUMA

CRMA

RED

GREEN

BLUE

JVGA_VS

JVGA_HS

VGA_DDC_DAT

VGA_DDC_CLK

PIN4

CRT_R9

CRT_G9

CRT_B9

CARD_VGA_R18

CARD_HSYNC18

CRT_HSYNC9

CRT_VSYNC9

CARD_VSYNC18

TV_LUMA9

TV_CRMA9

TV_COMPS9

CARD_LUMA18

CARD_CRMA18

CARD_COMP18

CARD_VGA_G18

CARD_VGA_B18

3VDDCDA9

3VDDCCL9

CARD_DDCDATA18 CARD_DDCCLK18 VGA_DDC_DAT

JVGA_HS

BLUE

JVGA_VS

VGA_DDC_CLK

GREEN

RED

CRMA

COMP

LUMA

+3VS+3VS

+CRT_VCC

+5VS +CRT_VCC

+CRT_VCC

+CRT_VCC

+CRT_VCC+CRT_VCC

+CRT_VCC+CRT_VCC

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

IGT30 LA-3571P

0.1

CRT & TVout Connector

Custom

17 47Monday, December 25, 2006

2006/08/04 2006/10/06

Compal Electronics, Inc.

Pop when with internal graphics

TV-OUT Conn.

CRT Conn.

Pop when with internal graphics

Pop when with internal graphics

PIN ASSIGMENT

D-SUB SVIDEO

PINPIN

1

2

3

4

5

6

7

8

FUNCTION FUNCTION

9

10

1

2

3

4

5

6

+CRT_VCC

RED

GND

GREEN

GND

BLUE

GND

VSYNC

GND

HSYNC

1

4

2

3

5

6

NC

CVBS

GND

LUMA

GND

CRMA1

2

3

4

11

6

7

8

9

10

15

12

13

14

SM_CLK

SM_DAT

SENSE

PIN4

13

12

14

11

DSUB

S-VIDEO

VGA I/O PORT Connector

MSEMS#

L58 CHB1608B121_0603

1 2

R441 0_0402_5%

UMA@

1 2

R1

1K_0402_5%

12

R81 0_0402_5%

VGA@

12

R88 0_0402_5%VGA@12

C800

0.01U_0402_25V4Z

1

2

R6

150_0402_1%

12

R82 0_0402_5%

VGA@

12

R98 0_0402_5%@12

R853

1K_0402_5%

12

R79 0_0402_5%VGA@12

R83 0_0402_5%

VGA@

12

C4

0.1U_0402_16V4Z

1

2

C1

22P_0402_50V8J

@

1

2

L59 CHB1608B121_0603

1 2

L55

BK1608LL121-T 0603

1 2

C846

82P_0402_50V8J

1

2

R443 39_0402_5%

UMA@

1 2

R851

2.2K_0402_5%

1 2

C849

82P_0402_50V8J

1

2

R447 0_0402_5%

UMA@

12

R444 0_0402_5%

UMA@

1 2

G

D

S

Q2

2N7002_SOT23

2

13

D31

RB751V_SOD323

21

R3

150_0402_1%

12

R2

150_0402_1%

12

R77 0_0402_5%

VGA@12

U1

74AHCT1G125GW_SOT353-5

A

2Y4

OE# 1

G

3P5

R12

2.2K_0402_5%

12

C851

22P_0402_50V8J

1

2

U2

74AHCT1G125GW_SOT353-5

A

2Y4

OE# 1

G

3P5

R451 0_0402_5%

UMA@

12

JP72

ACES_87213-1400

ME@

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

16 16

15 15

R453 0_0402_5%

UMA@

12

R4

150_0402_1%

12

R8

2.2K_0402_5%

12

L52

FLM1608081R8K_0603

1 2

C848

82P_0402_50V8J

1

2

L53

FLM1608081R8K_0603

1 2

C852

22P_0402_50V8J

1

2

C845

82P_0402_50V8J

1

2

C2

22P_0402_50V8J

@

1

2

L57

BK1608LL121-T 0603

1 2

C847

82P_0402_50V8J

@

1

2

R84 0_0402_5%

VGA@

12

R454 0_0402_5%UMA@

12

C853

22P_0402_50V8J

1

2

R456 0_0402_5%@12

R86 0_0402_5%VGA@12

C3

22P_0402_50V8J

@

1

2

R455 0_0402_5%UMA@

12

JP71

MOLEX_53780-0670

ME@

1

1

2

2

3

3

4

4

5

5

6

6

G1 7

G2 8

C850

82P_0402_50V8J

@

1

2

R5

150_0402_1%

12

G

D

S

Q1

2N7002_SOT23

2

13

R439 39_0402_5%

UMA@

1 2

R850

2.2K_0402_5%

1 2

C801

0.1U_0402_16V4Z

1

2

R852

1K_0402_5%

12

R78 0_0402_5%

VGA@

12

L54

FLM1608081R8K_0603 @

1 2

R7

150_0402_1%

@

12

C5

0.1U_0402_16V4Z

1

2

L56

BK1608LL121-T 0603

1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PEG_RXP[0..15]

PEG_RXN[0..15]

PEG_M_TXP[0..15]

PEG_M_TXN[0..15]

PEG_M_TXN12

PEG_M_TXP12

PEG_M_TXN14

PEG_M_TXP14

PEG_M_TXP0

PEG_M_TXN4

PEG_M_TXP4

PEG_M_TXP6

PEG_M_TXN6

PEG_M_TXN0

PEG_M_TXP2

PEG_M_TXN2

PEG_M_TXP8

PEG_M_TXN8

PEG_M_TXP10

PEG_M_TXN10

PEG_M_TXP11

PEG_M_TXN11

PEG_M_TXN13

PEG_M_TXP13

PEG_M_TXN15

PEG_M_TXP15

PEG_M_TXN1

PEG_M_TXP1

PEG_M_TXP3

PEG_M_TXN3

PEG_M_TXN5

PEG_M_TXP5

PEG_M_TXN7

PEG_M_TXP7

PEG_M_TXN9

PEG_M_TXP9

PEG_RXN2

PEG_RXP2

PEG_RXP0

PEG_RXN0

PEG_RXN4

PEG_RXP4

PEG_RXN6

PEG_RXP6

PEG_RXP8

PEG_RXN8

PEG_RXN10

PEG_RXP10

PEG_RXN12

SUSP#

PEG_RXP12

PEG_RXN14

PEG_RXP14

PEG_RXN1

PEG_RXP1

PEG_RXP3

PEG_RXN3

PEG_RXN5

PEG_RXP5

PEG_RXN7

PEG_RXP7

PEG_RXN9

PEG_RXP9

PEG_RXN11

PEG_RXP11

PEG_RXN13

PEG_RXP13

PEG_RXP15

PEG_RXN15

G7X_THER_ALERT#

PEG_RXP[0:15] 9

PEG_M_TXP[0..15] 9

PEG_M_TXN[0..15] 9

PEG_RXN[0:15] 9

CLK_PCIE_VGA15CLK_PCIE_VGA#15 SUSP# 23,26,28,29,33,35,42,43,44

CARD_CRMA 17

CARD_LUMA 17

CARD_COMP 17

CARD_VGA_B17

CARD_VGA_G17

CARD_VGA_R17

CARD_HSYNC17

CARD_VSYNC17

CARD_DDCCLK17 CARD_DDCDATA17 PLT_RST# 7,19,21,23,24,26,27

G7X_ENBKL 16

VGA_THER_ALERT# 21

CLK_27M_VGA 15

CLK_27M_VGA# 15

+2.5VS+5VS

+3VS

B+

+1.8VS

+3VS +5VS

+1.5VS

+2.5VS

Title

Size Document Number Rev

Date: Sheet of

IGT30 LA-3571P

0.1

VGA/B connector

18 47Monday, December 25, 2006

Compal Electronics, Inc.

Custom

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAX. 655mA @ 3.3V

MAX. 130mA @ 2.5V

MAX. 4.06A @ 1.8V

C228

0.1U_0402_16V4Z

VGA@

1

2

C227

0.047U_0402_16V4Z

VGA@

1

2

JP7

ACES_88363-08001

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

26

26

27

27

28

28

29

29

30

30

31

31

32

32

33

33

34

34

35

35

36

36

37

37

38

38

39

39

40

40

41 41

42 42

43 43

44 44

45 45

46 46

47 47

48 48

49 49

50 50

51 51

52 52

53 53

54 54

55 55

56 56

57 57

58 58

59 59

60 60

61 61

62 62

63 63

64 64

65 65

66 66

67 67

68 68

69 69

70 70

71 71

72 72

73 73

74 74

75 75

76 76

77 77

78 78

79 79

80 80

C226

0.047U_0402_16V4Z

VGA@

1

2

JP8

ACES_88363-08001

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

26

26

27

27

28

28

29

29

30

30

31

31

32

32

33

33

34

34

35

35

36

36

37

37

38

38

39

39

40

40

41 41

42 42

43 43

44 44

45 45

46 46

47 47

48 48

49 49

50 50

51 51

52 52

53 53

54 54

55 55

56 56

57 57

58 58

59 59

60 60

61 61

62 62

63 63

64 64

65 65

66 66

67 67

68 68

69 69

70 70

71 71

72 72

73 73

74 74

75 75

76 76

77 77

78 78

79 79

80 80

C216

0.1U_0402_16V4Z

VGA@

1

2

C248

0.1U_0402_16V4Z

VGA@

1

2

C252

0.1U_0402_16V4Z

VGA@

1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

SB_SPI_CS#1PCI_GNT0#

PCI_REQ2#

PCI_REQ3#

PCI_PIRQD#

PCI_DEVSEL#

PCI_TRDY#

PCI_FRAME#

PCI_STOP#

PCI_PLOCK#

PCI_IRDY#

PCI_PERR#

PCI_SERR#

PCI_PIRQA#

PCI_PIRQC#

PCI_PIRQB#

PCI_REQ0#

PCI_REQ1#

PLT_RST#

PCI_PLTRST#

PCI_RST#

PCI_PIRQB#

PCI_GNT0#

PCI_AD16

PCI_AD8

PCI_DEVSEL#

PCI_AD19

PCI_AD3

PCI_CBE#0

PCI_REQ3#

PCI_AD5

PCI_AD28

PCI_AD10

PCI_AD4

PCI_STOP#

PCI_REQ1#

PCI_AD30

PCI_CBE#1

PCI_AD25

PCI_AD22

PCI_AD7

PCI_PIRQA#

PCI_PLTRST#

PCI_FRAME#

PCI_PCIRST#

PCI_AD24

PCI_AD12

PCI_AD1 PCI_REQ0#

PCI_AD13

PCI_AD11

PCI_AD0

PCI_CBE#2

PCI_AD21

PCI_AD18

PCI_IRDY#

PCI_CBE#3

PCI_AD26

PCI_AD23

CLK_PCI_ICH

PCI_PIRQD#

PCI_AD2

PCI_TRDY#

PCI_SERR#

PCI_GNT2#

PCI_AD15

PCI_GNT3#

PCI_PAR

PCI_AD31

PCI_AD27

PCI_AD20

PCI_AD6

CLK_PCI_ICH

PCI_PCIRST#

PCI_PERR#

PCI_GNT3#

PCI_REQ2#

PCI_AD29

PCI_AD17

PCI_AD14

PCI_AD9

PCI_PIRQC#

PCI_PLOCK#

PCI_PME#

PCI_PIRQG#

PCI_PIRQF#

PCI_PIRQE#

PCI_PIRQH#

PCI_PIRQE#

PCI_PIRQF#

PCI_PIRQG#

PCI_PIRQH#

PCI_GNT1#

PCI_AD[0..31]28

PCI_CBE#0 28

PCI_CBE#1 28

PCI_CBE#2 28

PCI_CBE#3 24,28

PCI_RST# 28,32,33

PLT_RST# 7,18,21,23,24,26,27

SB_SPI_CS#121

PCI_IRDY# 28

PCI_FRAME# 28

PCI_PERR# 28

PCI_PME# 33

PCI_TRDY# 28

PCI_DEVSEL# 28

PCI_STOP# 28

PCI_PAR 28

CLK_PCI_ICH 15

PCI_SERR# 28

PCI_PIRQG# 28

PCI_PIRQH# 28

PCI_REQ0# 28

PCI_GNT0# 28

+3VS

+3VS

+3V_SB

+3VALW

+3V_SB

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

IGT30 LA-3571P

0.1

ICH8(1/4)-PCI/INT

19 47Monday, December 25, 2006

2006/08/04 2006/10/06

Compal Electronics, Inc.

0

1

1

Boot BIOS Location

PCI

PCI_GNT0# SPI_CS#1

0

1

Boot BIOS Strap

*

LPC

SPI

Place closely pin B10

A16 swap override Strap

PCI_GNT3# Low= A16 swap override Enble

High= Default *

1

R536 8.2K_0402_5%

1 2

R219 8.2K_0402_5%

1 2

R283

100K_0402_5%

12

R528 8.2K_0402_5%

1 2

C383

8.2P_0402_50V@

1

2

R585 8.2K_0402_5%

1 2

R225

10_0402_5%@

1 2

R272 8.2K_0402_5%

1 2

U11

TC7SH08FU_SSOP5@

B

1

A

2Y4

P5

G

3

R188

100K_0402_5%

12

PCI

Interrupt I/F

U28B

ICH8M REV 1.0

AD0

D20

AD1

E19

AD2

D19

AD3

A20

AD4

D17

AD5

A21

AD6

A19

AD7

C19

AD8

A18

AD9

B16

AD10

A12

AD11

E16

AD12

A14

AD13

G16

AD14

A15

AD15

B6

AD16

C11

AD17

A9

AD18

D11

AD19

B12

AD20

C12

AD21

D10

AD22

C7

AD23

F13

AD24

E11

AD25

E13

AD26

E12

AD27

D8

AD28

A6

AD29

E8

AD30

D6

AD31

A3

REQ0# A4

GNT0# D7

REQ1#/GPIO50 E18

GNT1#/GPIO51 C18

REQ2#/GPIO52 B19

GNT2#/GPIO53 F18

REQ3#/GPIO54 A11

GNT3#/GPIO55 C10

C/BE0# C17

C/BE1# E15

C/BE2# F16

C/BE3# E17

IRDY# C8

PAR D9

PCIRST# G6

DEVSEL# D16

PERR# A7

PLOCK# B7

SERR# F10

STOP# C16

TRDY# C9

FRAME# A17

PLTRST# AG24

PCICLK B10

PME# G7

PIRQA#

F9

PIRQB#

B5

PIRQC#

C5

PIRQD#

A10 PIRQH#/GPIO5 B3

PIRQG#/GPIO4 F12

PIRQF#/GPIO3 G11

PIRQE#/GPIO2 F8

R189

0_0402_5%

12

R199 8.2K_0402_5%

1 2

R214

1K_0402_5%@

12

R539 8.2K_0402_5%

1 2

R226 8.2K_0402_5%

1 2

R195 8.2K_0402_5%

@

1 2

R253 8.2K_0402_5%

1 2

R524 8.2K_0402_5%

1 2

R289

0_0402_5%

12

R254 8.2K_0402_5%

1 2

R532 8.2K_0402_5%

1 2

R234

1K_0402_5%

@

12

U5

TC7SH08FU_SSOP5@

B

1

A

2Y4

P5

G

3

R233 8.2K_0402_5%

1 2

R592 8.2K_0402_5%

1 2

R216 8.2K_0402_5%

1 2

R549 8.2K_0402_5%

1 2

R244 8.2K_0402_5%

1 2

R217 8.2K_0402_5%

1 2

R544 8.2K_0402_5%

1 2

R286

1K_0402_5%@

12

R235 8.2K_0402_5%

1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

H_INIT#

H_IGNNE#

H_NMI

H_STPCLK#

H_DPRSTP#H_DPRSTP_R#

H_SMI#

H_FERR#

H_PWRGOOD

KB_RST#

H_FERR#

GATEA20

H_DPRSTP#

H_DPSLP#SM_INTRUDER#

ICH_INTVRMEN

LAN100_SLP

GLAN_COMP

CLK_PCIE_SATA#

CLK_PCIE_SATA

LPC_AD0

LPC_AD3

LPC_AD2

LPC_AD1

LPC_FRAME#

LPC_DRQ0#

H_A20M#

GATEA20

H_INTR

KB_RST#

PD_D14

PD_D15

PD_D13

PD_D10

PD_D12

PD_D11

PD_D9

PD_D6

PD_D8

PD_D7

PD_D4

PD_D5

PD_D3

PD_D2

PD_D1

PD_D0

PD_A1

PD_A2

PD_A0

PD_CS#1

PD_CS#3

PD_IORDY

HDA_SDOUT_AUDIO

ICH_RTCRST#

LAN100_SLP

ICH_INTVRMEN

SM_INTRUDER#

THRMTRIP_ICH#

PD_IOR#

PD_IOW#

PD_DACK#

PD_IRQ

PD_IORDY

PD_DREQ

PSATA_ITX_DRX_P0_C

PSATA_ITX_DRX_N0_C

PSATA_IRX_DTX_P0_C

PSATA_IRX_DTX_N0_C

PSATA_ITX_DRX_P0_C

PSATA_ITX_DRX_N0_C

PSATA_ITX_DRX_P0

PSATA_ITX_DRX_N0

SATA_LED#

ICH_AC_SDIN1

HDA_RST_R#

HDA_SYNC_R

ICH_AC_SDIN0

HDA_BITCLK_R

HDA_SYNC_R

HDA_RST_R#

HDA_SDOUT_R

HDA_BITCLK_R

PD_IRQ

HDA_SDOUT_R

SATA_LED#

IDERST_CD#

KILL_MDC#

ICH_RTCX2

ICH_RTCX1

H_DPSLP# 5

H_DPRSTP# 5,7,45

H_PWRGOOD 5

H_IGNNE# 4

H_INIT# 4

H_NMI 4

H_SMI# 4

H_STPCLK# 4

H_THERMTRIP# 4,7

CLK_PCIE_SATA#15 CLK_PCIE_SATA15

LPC_AD[0..3] 32,33

LPC_FRAME# 32,33

LPC_DRQ#0 32

H_A20M# 4

GATEA20 33

H_INTR 4

KB_RST# 33

PD_D[0..15] 23

PD_A0 23

PD_A1 23

PD_A2 23

PD_CS#1 23

PD_CS#3 23

PD_IOR# 23

PD_IOW# 23

PD_DACK# 23

PD_IRQ 23

PD_IORDY 23

PD_DREQ 23

PSATA_IRX_DTX_N0_C23 PSATA_IRX_DTX_P0_C23

PSATA_ITX_DRX_N023

PSATA_ITX_DRX_P023

SATA_LED#36

HDA_SYNC_MDC27 HDA_BITCLK_MDC27

HDA_SDIN127 HDA_SDIN029

HDA_RST_MDC#27

HDA_SDOUT_AUDIO29

HDA_SYNC_AUDIO29

HDA_BITCLK_AUDIO29

HDA_RST_AUDIO#29

HDA_SDOUT_MDC27

H_FERR# 4

IDERST_CD#23 KILL_MDC#27

+3VS

+VCCP

+VCCP

+RTCVCC

+RTCVCC

+1.5VS

+3VS

+3VS

+CHGRTC

+RTCVCC

BATT1.1

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

IGT30 LA-3571P

0.1

ICH8(2/4)_LAN,HD,IDE,LPC

Custom

20 47Monday, December 25, 2006

2006/08/04 2006/10/06

Compal Electronics, Inc.

Within 500 mils

XOR CHAIN ENTRANCE STRAP:RSVD

placed within 2" from ICH8M

within 2" from R1557

Close to ICH

+-

W=20mils

ICH8M Internal VR Enable Strap

(Internal VR for VccSus1.05, VccSus1.5, VccCL1.5)

LAN100_SLP

ICH_INTVRMEN

Low = Internal VR Disabled

High = Internal VR Enabled(Default)

R517

24.9_0402_1%

1 2

R616 24.9_0402_1%

1 2

BATT1

ML1220T13RE

45@

1 2

RTCLAN / GLAN

IHDA

SATA

IDE

LPCCPU

U28A

ICH8M REV 1.0

RTCX1

AG25

RTCX2

AF24

INTVRMEN

AF25

INTRUDER#

AD22

GLAN_CLK

B24

LAN_RSTSYNC

D22

LAN_RXD0

C21

LAN_RXD1

B21

LAN_RXD2

C22

LAN_TXD0

D21

LAN_TXD1

E20

LAN_TXD2

C20

HDA_BIT_CLK

AJ16

HDA_SYNC

AJ15

HDA_RST#

AE14

HDA_SDIN0

AJ17

HDA_SDIN1

AH17

HDA_SDIN2

AH15

HDA_SDOUT

AE13

SATALED#

AF10

SATA0RXN

AF6

SATA0RXP

AF5

SATA0TXN

AH5

SATA0TXP

AH6

SATA1RXN

AG3

SATA1RXP

AG4

SATA1TXN

AJ4

SATA1TXP

AJ3

SATA_CLKN

AB7

SATA_CLKP

AC6

SATARBIAS#

AG1

SATARBIAS

AG2

DA0 AA4

DA1 AA1

DA2 AB3

DCS1# Y6

DCS3# Y5

DD0 V1

DD1 U2

DD2 V3

DD3 T1

DD4 V4

DD5 T5

DD6 AB2

DD7 T6

DD8 T3

DD9 R2

DD10 T4

DD11 V6

DD12 V5

DD13 U1

DD14 V2

DD15 U6

DDREQ W5

IORDY Y1

IDEIRQ Y3

DDACK# Y2

DIOW# W3

DIOR# W4

FWH0/LAD0 E5

FWH1/LAD1 F5

FWH2/LAD2 G8

FWH3/LAD3 F6

LDRQ0# G9

LDRQ1#/GPIO23 E6

FWH4/LFRAME# C4

A20GATE AF13

A20M# AG26

DPRSTP# AF26

DPSLP# AE26

FERR# AD24

CPUPWRGD/GPIO49 AG29

IGNNE# AF27

INIT# AE24

INTR AC20

RCIN# AH14

SMI# AG28

NMI AD23

STPCLK# AA24

THRMTRIP# AE27

RTCRST#

AF23

GLAN_DOCK#/GPIO13

AH21

GLAN_COMPO

C25 GLAN_COMPI

D25

HDA_SDIN3

AD13

SATA2TXN

AE4

SATA2RXN

AF2

SATA2TXP

AE3

SATA2RXP

AF1

TP8 AA23

HDA_DOCK_EN#/GPIO33

AE10

HDA_DOCK_RST#/GPIO34

AG14

LAN100_SLP

AD21

C394

27P_0402_50V8J

@

1

2

Y3

32.768KHZ_12.5P_1TJS125BJ2A251

OUT 4

IN 1

NC

3

NC

2

R249

100_0603_1%

1 2

C623

1U_0603_10V4Z

1

2

D8

RB751V_SOD323

21

R251

10K_0402_5%

12

C584 3900P_0402_50V7K

1 2

R565 33_0402_5%

1 2

R548 33_0402_5%

1 2

C651 15P_0402_50V8J

R287 330K_0402_1%

1 2

R295 1M_0402_5%

1 2

R329 24_0402_1%

1 2

C659 15P_0402_50V8J

R614

10M_0402_5%

12

R22710K_0402_5% 12

R547 33_0402_5%

1 2

R299

56_0402_5%

12

R324

56_0402_5%

@

12

R331

56_0402_5%

@

12

R196 8.2K_0402_5%

1 2

R564 33_0402_5%

1 2

C396

0.1U_0402_16V4Z

1

2

R319 330K_0402_1%

1 2

R553 33_0402_5%

1 2

R543 1K_0402_5%@

12

R247

10K_0402_5%

12

R556 33_0402_5%

1 2

R552 33_0402_5%

1 2

R327 0_0402_5%

12

C582 3900P_0402_50V7K

1 2

R328

56_0402_5%

12

R557 33_0402_5%

1 2

R192 4.7K_0402_5%

1 2

CLRP1

2MM

21

R576 20K_0402_5%

1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

CL_CLK0

CL_DATA0

CL_VREF0_ICH

CL_VREF1_ICH

CL_RST#

MCH_ICH_SYNC#

DPRSLPVR

SIRQ

ICH_PCIE_WAKE#

XDP_DBRESET#

PM_BMBUSY#

H_STP_PCI#

ICH_SUSCLK

OCP#

ICH_LOW_BAT#

LINKALERT#

OCP#

LINKALERT#

ICH_SMB_CLK

ME__EC_DATA1

ICH_RI#

ICH_RI#

PCI_CLKRUN#

SIRQ

EC_THERM#

VRMPWRGD

SST_CTL

SB_SPKR

ICH_RSVD

CLK_48M_ICH

CLK_14M_ICH

SLP_S4#

SLP_S5#

SLP_S3#

ICH_POK

CLK_14M_ICHCLK_48M_ICH

CPUSB#

USB_OC#6

USB_OC#8

USB_OC#9

USB_OC#7

CLK_PCIE_ICH

CLK_PCIE_ICH#

DMI_IRCOMP

USB20_N0

USB20_N1

USB20_P1

USB20_P0

USB20_N6

USB20_P6

USB20_P3

USB20_N4

USB20_N3

USB20_P4

USB20_N5

USB20_P5

USBRBIAS

DPRSLPVR

VGA_THER_ALERT#

USB_OC#5

USB_OC#0

ICH_LOW_BAT#

EC_THERM#

M_PWROK

DMI_TXN0

DMI_TXN1

DMI_TXN2

DMI_TXN3

DMI_TXP0

DMI_TXP1

DMI_TXP2

DMI_TXP3

DMI_RXN0

DMI_RXN1

DMI_RXN2

DMI_RXN3

DMI_RXP0

DMI_RXP1

DMI_RXP2

DMI_RXP3

USB20_P8

USB20_N9

USB20_P9

USB20_N8

PCI_CLKRUN#

ICH_RSVD

R_STP_CPU#

ICH_PCIE_WAKE#

XDP_DBRESET#

CLKSATAREQ#

VRMPWRGD

ME__EC_CLK1

SB_SPKR

ICH_SMB_DATA

PBTN_OUT#

EC_RSMRST#REC_RSMRST#R

CK_PWRGD_R CK_PWRGD

USB_OC#7

USB_OC#4

USB_OC#5

USB_OC#6

USB_OC#0

USB_OC#2

USB_OC#3

SB_SPI_CS#1

PCIE_RXP2

PCIE_C_TXP2

PCIE_RXN2

PCIE_C_TXN2

PCIE_C_TXP1

PCIE_RXN1

PCIE_C_TXN1

PCIE_RXP1

CLKSATAREQ#

USB_OC#9

USB_OC#8

USB_OC#3

USB20_N7

USB20_P7

PCIE_RXP3

PCIE_C_TXP3

PCIE_RXN3

PCIE_C_TXN3

USB20_P2

USB20_N2

EC_SMI#

EC_SCI#

EC_FLASH#

EC_RSMRST#R

CL_RST#

WOL_EN

GPIO39

GPIO48

CPUSB#

PCIE_C_TXP4

PCIE_RXN4

PCIE_C_TXN4

PCIE_RXP4

USB_OC#4

USB_OC#2

GPIO39

WOL_EN

GPIO48

M_PWROK

XDP_DBRESET#4

PM_BMBUSY#7

H_STP_PCI#15 H_STP_CPU#15

ICH_PCIE_WAKE#24,26,27

OCP#4

DMI_RXP0 7

DMI_RXN0 7

DMI_TXP0 7

DMI_TXN0 7

CL_CLK0 7

CL_DATA0 7

CL_RST# 7

MCH_ICH_SYNC#7

DPRSLPVR 7,45

SIRQ28,32,33

EC_THERM#4,33

SB_SPKR29

CLK_48M_ICH 15

CLK_14M_ICH 15

SLP_S3# 33

ICH_POK 7,33

CLK_PCIE_ICH# 15

CLK_PCIE_ICH 15

USB20_N1 27

USB20_P1 27

USB20_N0 31

USB20_P0 31

USB20_N6

USB20_P6

USB20_N3 36

USB20_P3 36

USB20_N4 37

USB20_P4 37

USB20_N5 26

USB20_P5 26

CLKSATAREQ#15

DMI_RXP1 7

DMI_RXN1 7

DMI_TXP1 7

DMI_TXN1 7

DMI_RXP2 7

DMI_RXN2 7

DMI_TXP2 7

DMI_TXN2 7

DMI_RXP3 7

DMI_RXN3 7

DMI_TXP3 7

DMI_TXN3 7

USB20_N9 27

USB20_P9 27

USB20_N8

USB20_P8

PCI_CLKRUN#28,33

VGATE7,45 PLT_RST# 7,18,19,23,24,26,27

SLP_S5# 33

PBTN_OUT# 33

CK_PWRGD 15

USB_OC#031

USB_OC#237

USB_OC#437

USB_OC#6

PCIE_RXN227

PCIE_TXN227 PCIE_TXP227

PCIE_RXP227

PCIE_RXN127

PCIE_TXN127 PCIE_TXP127

PCIE_RXP127

USB_OC#8

USB20_N7 27

USB20_P7 27

PCIE_RXN326

PCIE_TXN326 PCIE_TXP326

PCIE_RXP326

USB20_P2 37

USB20_N2 37

SB_SPI_CS#119

EC_SMI#33

EC_LID_OUT#33

EC_SCI#33

EC_FLASH#

SB_INT_FLASH_SEL#

VGA_THER_ALERT#18

EC_RSMRST#33

CLK_ENABLE#45

ICH_SMBDATA15,26,27 ICH_SMBCLK15,26,27

CPUSB#26

PCIE_RXN424

PCIE_TXN424 PCIE_TXP424

PCIE_RXP424

WOL_EN

SLP_S4# 33

M_PWROK 7

ACIN 33,39

+3VS

+3VS

+1.5VS

+3VS

+3VS

+3VS

+3VS

+3V_SB

+3V_SB

+3V_SB

+3V_SB

+3V_SB

+3V_SB

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

IGT30 LA-3571P

0.1

ICH8(3/4)_PM,USB,GPIO

Custom

21 47Monday, December 25, 2006

2006/08/04 2006/10/06

Compal Electronics, Inc.

Place closely pin AG9Place closely pin G5

Within 500 mils

Within 500 mils

0316 change design

0320 add

low-->default

High -->No boot

V

NEW CARD

WLAN

TV TUNER

BT(HDL20)

4

5

6

RIGHT SIDE

RIGHT SIDE

CMOS

3

PORT DEVICE

0

1

2

LEFT SIDE

7

USB PORT LIST

NEW CARD

8

93G

RSMRST circuit

LAN

WIRELESS

R278

10K_0402_5%

@

1 2

C6740.1U_0402_16V7K

R242 8.2K_0402_5%

1 2

R274

10K_0402_5%

1 2

C

B

E

Q35

MMBT3906_SOT23@

1

2

3

C644

0.1U_0402_16V4Z

@

1

2

R258 10K_0402_5%

12

R322

2.2K_0402_5%

12

R271 1K_0402_5%

1 2

R588 0_0402_5%@

1 2

RP16

10K_1206_8P4R_5%

18 27 36 45

R499 22.6_0402_1%

1 2

R246 100K_0402_5%

1 2

R593 3.24K_0402_1%@

1 2

R229 10K_0402_5%

1 2

C6760.1U_0402_16V7K

D23A

BAV99DW-7_SOT363

1

2

6

R624 4.7K_0402_5%@

1 2

R284 10K_0402_5%

1 2

R628

2.2K_0402_5%@

1 2

PCI-Express

Direct Media Interface

USB

SPI

U28D

ICH8M REV 1.0

PERN1

P27

PERP1

P26

PETN1

N29

PETP1

N28

PERN2

M27

PERP2

M26

PETN2

L29

PETP2

L28

PERN3

K27

PERP3

K26

PETN3

J29

PETP3

J28

PERN4

H27

PERP4

H26

PETN4

G29

PETP4

G28

PERN5

F27

PERP5

F26

PETN5

E29

PETP5

E28

PERN6/GLAN_RXN

D27

PERP6/GLAN_RXP

D26

PETN6/GLAN_TXN

C29

PETP6/GLAN_TXP

C28

DMI0RXN V27

DMI0RXP V26

DMI0TXN U29

DMI0TXP U28

DMI1RXN Y27

DMI1RXP Y26

DMI1TXN W29

DMI1TXP W28

DMI2RXN AB26

DMI2RXP AB25

DMI2TXN AA29

DMI2TXP AA28

DMI3RXN AD27

DMI3RXP AD26

DMI3TXN AC29

DMI3TXP AC28

DMI_CLKN T26

DMI_CLKP T25

DMI_ZCOMP Y23

DMI_IRCOMP Y24

OC0#

AJ19

OC1#/GPIO40

AG16

OC2#/GPIO41

AG15

OC3#/GPIO42

AE15

OC4#/GPIO43

AF15

OC5#/GPIO29

AG17

OC6#/GPIO30

AD12

OC7#/GPIO31

AJ18

USBP0N G3

USBP0P G2

USBP1N H5

USBP1P H4

USBP2N H2

USBP2P H1

USBP3N J3

USBP3P J2

USBP4N K5

USBP4P K4

USBP5N K2

USBP5P K1

USBP6N L3

USBP6P L2

USBP7N M5

USBP7P M4

USBRBIAS# F2

USBRBIAS F3

SPI_CLK

C23

SPI_CS0#

B23

SPI_CS1#

E22

SPI_MOSI

D23

SPI_MISO

F21

OC8#

AD14

OC9#

AH18

USBP8P M1

USBP8N M2

USBP9N N3

USBP9P N2

R193

10_0402_5%@

12

R222 10K_0402_5%@

1 2

R884 100_0402_5%

1 2

R325 10K_0402_5%

1 2

R432 10K_0402_5%

1 2

C6780.1U_0402_16V7K

R232 10K_0402_5%

1 2

R583

10K_0402_5%

1 2

R273 10K_0402_5%

1 2

R265 10K_0402_5%

1 2

R626

2.2K_0402_5%@

1 2

C6790.1U_0402_16V7K

R318 0_0402_5%@

1 2

R296 24.9_0402_1%

1 2

R589 0_0402_5%

1 2

R591 1K_0402_5%@12

SATA

SMB

SYS

GPIO

GPIO

GPIO

Clocks

Power MGTController Link

MISC

U28C

ICH8M REV 1.0

SATA0GP/GPIO21 AJ12

SATA1GP/GPIO19 AJ10

SATA2GP/GPIO36 AF11

SATA3GP/GPIO37 AG11

SMBCLK

AJ26

SMBDATA

AD19

LINKALERT#

AG21

SMLINK0

AC17

SMLINK1

AE19

SUS_STAT#/LPCPD#

F4

SYS_RESET#

AD15

BMBUSY#/GPIO0

AG12

TACH1/GPIO1

AJ8

TACH2/GPIO6

AJ9

TACH3/GPIO7

AH9

GPIO8

AE16

GPIO12

AC19

SMBALERT#/GPIO11

AG22

TACH0/GPIO17

AG8

GPIO18

AH12

SCLOCK/GPIO22

AG10

SATACLKREQ#/GPIO35

AG13

STP_PCI#/GPIO15

AE20

STP_CPU#/GPIO25

AG18

SLOAD/GPIO38

AF9

SDATAOUT0/GPIO39

AJ11

CLKRUN#/GPIO32

AH11

SDATAOUT1/GPIO48

AD10

WAKE#

AE17

SERIRQ

AF12

THRM#

AC13

VRMPWRGD

AJ20

CLK14 AG9

CLK48 G5

SUSCLK D3

SLP_S3# AG23

SLP_S4# AF21

SLP_S5# AD18

PWROK AE23

DPRSLPVR/GPIO16 AJ14

BATLOW# AE21

PWRBTN# C2

LAN_RST# AH20

RSMRST# AG27

RI#

AF17

S4_STATE#/GPIO26 AH27

QRT_STATE0/GPIO27

AH25

QRT_STATE1/GPIO28

AD16

TP7

AJ22

CK_PWRGD E1

CLPWROK E3

SLP_M# AJ25

GPIO20

AE11 CL_CLK0 F23

CL_CLK1 AE18

CL_DATA0 F22

CL_DATA1 AF19

CL_VREF0 D24

CL_VREF1 AH23

CL_RST# AJ23

ME_EC_ALERT/GPIO10 AJ24

WOL_EN/GPIO9 AG19

EC_ME_ALERT/GPIO14 AF22

MEM_LED/GPIO24 AJ27

SPKR

AD9

TP3

AJ21

MCH_SYNC#

AJ13

R582

330_0402_5%@

1 2

C6770.1U_0402_16V7K

C385

4.7P_0402_50V8C@

1

2

R584 0_0402_5%@12

C349

4.7P_0402_50V8C@

1

2

R542 10K_0402_5%

1 2

G

D

S

Q32

RHU002N06_SOT323@

2

13

RP14

10K_1206_8P4R_5%

18 27 36 45

R314

453_0402_1%

@

12

R228

10_0402_5%@

12

R323 0_0402_5%

1 2

T18 PAD

R291 8.2K_0402_5%

12

R252 10K_0402_5%

1 2

R511 0_0402_5%

1 2

R292

10K_0402_5%

1 2

R313 3.24K_0402_1%@

1 2

R248 10K_0402_5%

12

R277 0_0402_5%

1 2

T31PAD

T24PAD

R264

10K_0402_5%

1 2

R243 10K_0402_5%

1 2

R237 8.2K_0402_5%

@1 2

R245 10K_0402_5%

1 2

R236

8.2K_0402_5%

1 2

C419

0.1U_0402_16V4Z

@

1

2

D23B

BAV99DW-7_SOT363

4

5

3

R621

0_0402_5%

1 2

C6750.1U_0402_16V7K

R269

2.2K_0402_5%

12

C6720.1U_0402_16V7K

R594

453_0402_1%

@

12

C6730.1U_0402_16V7K

R257 10K_0402_5%

1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

ICH_V5REF_SUS

VCCSUS1_5_ICH_2

VCCSUS1_5_ICH_1

VCCCL1_05_ICH

VCC_LAN1_05_INT_ICH_1

VCC_LAN1_05_INT_ICH_2

ICH_V5REF_RUN

ICH_V5REF_RUN

ICH_V5REF_SUS

+VCCP

+1.25VS

+VCCP

+3VS

+3VS

+RTCVCC

+1.5VS

+3VS

+3VS

+3VS

+3VS

+3VS

+1.5VS

+1.5VS

+1.5VS

+1.5VS

+1.5VS

+3VS

+3VS

+1.5VS

+1.5VS

+5VS +3VS

+3VALW+5VALW

+1.5VS

+1.5VS

+3V_SB

+3V_SB

+3V_SB

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

IGT30 LA-3571P

0.1

ICH8(4/4)_POWER&GND

Custom

22 47Monday, December 25, 2006

2006/08/04 2006/10/06

Compal Electronics, Inc.

(SATA)

(DMI)

40 mils

20 mils

20 mils

20 mils

C428

10U_0805_6.3V6M

1

2

C416

0.1U_0402_16V4Z

1

2

C423

0.1U_0402_16V4Z

1

2

C411

0.1U_0402_16V4Z

1

2

C367

0.1U_0402_16V4Z

1

2

C645

1U_0603_10V4Z@

1

2

C395

0.1U_0402_16V4Z

1

2

C418

10U_0805_6.3V6M

1

2

C399

4.7U_0603_6.3V6M

1

2

C386 0.1U_0402_16V4Z

1

2

+

C429

220U_D2_4VM

1

2

C436 10U_0805_6.3V6M

1

2

R618

CHB1608U301_0603

1 2

C368

0.1U_0402_16V4Z

1

2

C354

0.1U_0402_16V4Z

1

2

C353

0.1U_0402_16V4Z

1

2

C424

0.1U_0402_16V4Z

1

2

T26

R218

CHB1608U301_0603

1 2

C426

2.2U_0603_6.3V4Z

1

2

C433

0.01U_0402_16V7K

1

2

R187

10_0402_5%

12

C352

0.1U_0402_16V4Z

1

2

C357

0.1U_0402_16V4Z

1

2

CORE

VCCA3GP ATXARX

IDE

USB CORE

PCI

GLAN POWER

VCCP_COREVCCPSUSVCCPUSB

U28F

ICH8M REV 1.0

V5REF[1]

A16

V5REF[2]

T7

V5REF_SUS

G4

VCC1_5_B[01]

AA25

VCC1_5_B[02]

AA26

VCC1_5_B[03]

AA27

VCC1_5_B[04]

AB27

VCC1_5_B[05]

AB28

VCC1_5_B[06]

AB29

VCC1_5_B[07]

D28

VCC1_5_B[08]

D29

VCC1_5_B[09]

E25

VCC1_5_B[10]

E26

VCC1_5_B[11]

E27

VCC1_5_B[12]

F24

VCC1_5_B[13]

F25

VCC1_5_B[14]

G24

VCC1_5_B[15]

H23

VCC1_5_B[16]

H24

VCC1_5_B[17]

J23

VCC1_5_B[18]

J24

VCC1_5_B[19]

K24

VCC1_5_B[20]

K25

VCC1_5_B[21]

L23

VCC1_5_B[22]

L24

VCC1_5_B[23]

L25

VCC1_5_B[24]

M24

VCC1_5_B[25]

M25

VCC1_5_B[26]

N23

VCC1_5_B[27]

N24

VCC1_5_B[28]

N25

VCC1_5_B[29]

P24

VCC1_5_B[30]

P25

VCC1_5_B[31]

R24

VCC1_5_B[32]

R25

VCC1_5_B[33]

R26

VCC1_5_B[34]

R27

VCC1_5_B[35]

T23

VCC1_5_B[36]

T24

VCC1_5_B[37]

T27

VCC1_5_B[38]

T28

VCC1_5_B[39]

T29

VCC1_5_B[40]

U24

VCC3_3[01] AF29

VCCDMIPLL R29

VCC1_5_A[01]

AE7

VCC1_5_A[02]

AF7

VCC1_5_A[03]

AG7

VCC1_5_A[04]

AH7

VCC1_5_A[05]

AJ7

VCCSATAPLL

AJ6

VCC3_3[02] AD2

VCC1_5_A[06]

AC1

VCC1_5_A[07]

AC2

VCC1_5_A[08]

AC3

VCC1_5_A[09]

AC4

VCC1_5_A[10]

AC5

VCCUSBPLL

D1

VCCLAN1_05[1]

F17

VCCLAN1_05[2]

G18

VCC1_05[01] A13

VCC1_05[02] B13

VCC1_05[03] C13

VCC1_05[04] C14

VCC1_05[05] D14

VCC1_05[06] E14

VCC1_05[07] F14

VCC1_05[08] G14

VCC1_05[09] L11

VCC1_05[10] L12

VCC1_05[11] L14

VCC1_05[12] L16

VCC1_05[13] L17

VCC1_05[14] L18

VCC1_05[15] M11

VCC1_05[16] M18

VCC1_05[17] P11

VCC1_05[18] P18

VCC1_05[19] T11

VCC1_05[20] T18

VCCLAN3_3[1]

F19

VCCLAN3_3[2]

G20

VCCHDA AC12

VCCSUSHDA AD11

V_CPU_IO[1] AC23

V_CPU_IO[2] AC24

VCC3_3[07] AA3

VCC3_3[08] U7

VCC3_3[09] V7

VCC3_3[10] W1

VCC3_3[11] W6

VCC3_3[12] W7

VCC3_3[13] Y7

VCC3_3[15] B15

VCC3_3[16] B18

VCC3_3[17] B4

VCC3_3[18] B9

VCC3_3[19] C15

VCC3_3[20] D13

VCC3_3[21] D5

VCC3_3[22] E10

VCC3_3[23] E7

VCC3_3[24] F11

VCCRTC

AD25

VCCSUS3_3[02] AC18

VCCSUS3_3[03] AC21

VCCSUS3_3[04] AC22

VCCSUS3_3[05] AG20

VCCSUS3_3[06] AH28

VCCSUS3_3[07] P6

VCCSUS3_3[08] P7

VCCSUS3_3[09] C1

VCCSUS3_3[10] N7

VCCSUS3_3[11] P1

VCCSUS3_3[12] P2

VCCSUS3_3[13] P3

VCCSUS3_3[14] P4

VCCSUS3_3[15] P5

VCCSUS3_3[16] R1

VCCSUS3_3[17] R3

VCCSUS3_3[18] R5

VCC1_5_A[11]

AC10

VCC1_5_A[12]

AC9

VCC1_5_A[13]

AA5

VCC1_5_A[14]

AA6

VCC1_5_A[15]

G12

VCC1_5_A[16]

G17

VCCSUS1_05[1] J6

VCCSUS1_05[2] AF20

VCC1_5_A[20]

F1

VCC1_5_A[21]

L6

VCC1_5_A[22]

L7

VCC1_5_A[23]

M6

VCC1_5_A[24]

M7

VCCSUS3_3[01] C3

VCC3_3[14] A8

VCC1_5_A[25]

W23

VCC1_05[22] U18

VCC1_05[27] V17

VCC1_05[25] V14

VCC1_05[23] V11

VCC1_05[21] U11

VCC1_05[28] V18

VCC1_05[26] V16

VCC1_05[24] V12

VCCGLAN1_5[4]

B27

VCCGLAN1_5[2]

A27

VCCGLAN1_5[5]

B28

VCCGLAN1_5[3]

B26

VCCGLAN1_5[1]

A26

VCCGLAN3_3

B25

VCCGLANPLL

A24

VCC3_3[06] AF8

VCC3_3[03] AC8

VCC3_3[05] AE8

VCC3_3[04] AD8

VCCSUS3_3[19] R6

VCC1_5_A[17]

H7

VCCSUS1_5[1] AC16

VCC1_5_A[19]

AD7 VCC1_5_A[18]

AC7

VCCSUS1_5[2] J7

VCC_DMI[2] AE29

VCC_DMI[1] AE28

VCCCL1_05 G22

VCCCL3_3[2] G21

VCCCL3_3[1] F20

VCCCL1_5 A22

VCC1_5_B[45]

W25

VCC1_5_B[43]

V24

VCC1_5_B[41]

U25

VCC1_5_B[46]

Y25

VCC1_5_B[44]

V25

VCC1_5_B[42]

V23

C351

1U_0603_10V4Z

1

2

R293

CHB1608U301_0603

1 2

R615

CHB1608U301_0603

1 2

R572

100_0402_5%

12

C421

0.1U_0402_16V4Z

1

2

C681

22U_0805_6.3V4Z

1

2

C387

0.1U_0402_16V4Z

1

2

D22

CH751H-40_SC76

21

C358

1U_0603_10V4Z

1

2

U28E

ICH8M REV 1.0

VSS[001]

A23

VSS[002]

A5

VSS[003]

AA2

VSS[004]

AA7

VSS[005]

A25

VSS[006]

AB1

VSS[007]

AB24

VSS[008]

AC11

VSS[009]

AC14

VSS[010]

AC25

VSS[011]

AC26

VSS[012]

AC27

VSS[013]

AD17

VSS[014]

AD20

VSS[015]

AD28

VSS[016]

AD29

VSS[017]

AD3

VSS[018]

AD4

VSS[019]

AD6

VSS[020]

AE1

VSS[021]

AE12

VSS[022]

AE2

VSS[023]

AE22

VSS[024]

AD1

VSS[025]

AE25

VSS[026]

AE5

VSS[027]

AE6

VSS[028]

AE9

VSS[029]

AF14

VSS[030]

AF16

VSS[031]

AF18

VSS[032]

AF3

VSS[033]

AF4

VSS[034]

AG5

VSS[035]

AG6

VSS[036]

AH10

VSS[037]

AH13

VSS[038]

AH16

VSS[039]

AH19

VSS[040]

AH2

VSS[041]

AF28

VSS[042]

AH22

VSS[043]

AH24

VSS[044]

AH26

VSS[045]

AH3

VSS[046]

AH4

VSS[047]

AH8

VSS[048]

AJ5

VSS[049]

B11

VSS[050]

B14

VSS[051]

B17

VSS[052]

B2

VSS[053]

B20

VSS[054]

B22

VSS[055]

B8

VSS[056]

C24

VSS[057]

C26

VSS[058]

C27

VSS[059]

C6

VSS[060]

D12

VSS[061]

D15

VSS[062]

D18

VSS[063]

D2

VSS[064]

D4

VSS[065]

E21

VSS[066]

E24

VSS[067]

E4

VSS[068]

E9

VSS[069]

F15

VSS[070]

E23

VSS[071]

F28

VSS[072]

F29

VSS[073]

F7

VSS[074]

G1

VSS[075]

E2

VSS[076]

G10

VSS[077]

G13

VSS[078]

G19

VSS[079]

G23

VSS[080]

G25

VSS[081]

G26

VSS[082]

G27

VSS[083]

H25

VSS[084]

H28

VSS[085]

H29

VSS[086]

H3

VSS[087]

H6

VSS[088]

J1

VSS[089]

J25

VSS[090]

J26

VSS[091]

J27

VSS[092]

J4

VSS[093]

J5

VSS[094]

K23

VSS[095]

K28

VSS[096]

K29

VSS[097]

K3

VSS[099] K7

VSS[100] L1

VSS[101] L13

VSS[102] L15

VSS[103] L26

VSS[104] L27

VSS[105] L4

VSS[106] L5

VSS[107] M12

VSS[108] M13

VSS[109] M14

VSS[110] M15

VSS[111] M16

VSS[112] M17

VSS[113] M23

VSS[114] M28

VSS[115] M29

VSS[116] M3

VSS[117] N1

VSS[118] N11

VSS[119] N12

VSS[120] N13

VSS[121] N14

VSS[122] N15

VSS[123] N16

VSS[124] N17

VSS[125] N18

VSS[126] N26

VSS[127] N27

VSS[128] N4

VSS[129] N5

VSS[130] N6

VSS[131] P12

VSS[132] P13

VSS[133] P14

VSS[134] P15

VSS[135] P16

VSS[136] P17

VSS[137] P23

VSS[138] P28

VSS[139] P29

VSS[140] R11

VSS[141] R12

VSS[142] R13

VSS[143] R14

VSS[144] R15

VSS[145] R16

VSS[146] R17

VSS[147] R18

VSS[148] R28

VSS[149] R4

VSS[150] T12

VSS[151] T13

VSS[152] T14

VSS[153] T15

VSS[154] T16

VSS[155] T17

VSS[156] T2

VSS[157] U12

VSS[158] U13

VSS[159] U14

VSS[160] U15

VSS[161] U16

VSS[162] U17

VSS[163] U23

VSS[164] U26

VSS[165] U27

VSS[166] U3

VSS[167] U5

VSS[168] V13

VSS[169] V15

VSS[170] V28

VSS[171] V29

VSS[172] W2

VSS[173] W26

VSS[174] W27

VSS[175] Y28

VSS[176] Y29

VSS[177] Y4

VSS[178] AB4

VSS_NCTF[01] A1

VSS_NCTF[02] A2

VSS_NCTF[03] A28

VSS_NCTF[04] A29

VSS_NCTF[05] AH1

VSS_NCTF[06] AH29

VSS_NCTF[07] AJ1

VSS_NCTF[08] AJ2

VSS_NCTF[09] AJ28

VSS_NCTF[10] AJ29

VSS_NCTF[11] B1

VSS_NCTF[12] B29

VSS[179] AB23

VSS[180] AB5

VSS[181] AB6

VSS[182] AD5

VSS[183] U4

VSS[098]

K6

VSS[184] W24

T25

T21

T27

T22

C359

0.1U_0402_16V4Z

1

2

C372

1U_0603_10V4Z

1

2

C362

10U_0805_6.3V6M

1

2

C366

0.1U_0402_16V4Z

1

2

T19

C356

4.7U_0603_6.3V6K

1

2

C627

0.1U_0402_16V4Z

1

2

C434

0.1U_0402_16V4Z

1

2

C653

2.2U_0603_10V6K

1

2

C655

10U_0805_6.3V6M

1

2

R332

CHB1608U301_0603

1 2

T23

D4

CH751H-40_SC76

21

C414

0.1U_0402_16V4Z

1

2

C663

4.7U_0805_10V4Z

1

2

C376

0.1U_0402_16V4Z

1

2

C412

0.1U_0402_16V7K

1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PD_A2

PD_DREQ

PSATA_ITX_DRX_N0

PSATA_ITX_DRX_P0

PSATA_IRX_DTX_P0

PD_D[0..15]

PD_A0

PD_A1

PD_IRQ

PD_IOW#

PD_IORDY PD_DACK#

PDIAG#

PRI_CSEL

PD_D14

PD_D15

PD_D13

PD_D10

PD_D12

PD_D11

PD_D9

PD_D6

PD_D8

PD_D7

PD_D4

PD_D5

PD_D3

PD_D2

PD_D0

PD_D1

+3VS_SATA

+5VS_SATA

PSATA_IRX_DTX_N0

PD_A[0..2]

ODD_LED#

CD_PLAY

SUSP#

PLAY_MODE

SD_IDERST#

PLT_RST# SIDE_RST#

PCMRST#

PLT_RST#

G_PCI_RST#

SW_IDE_SDCS3#

SW_IDE_SDCS1#

PD_IORDY20 PD_IOW#20 ODD_IOR#

PSATA_IRX_DTX_N0_C20

PSATA_ITX_DRX_P020

PSATA_IRX_DTX_P0_C20

PSATA_ITX_DRX_N020

PD_D[0..15] 20

ODD_LED#36

PD_DACK# 20

PD_DREQ 20

SW_IDE_SDCS1# SW_IDE_SDCS3#

PD_A[0..2] 20

INT_CD_L29,31 INT_CD_R 29,31

CD_AGND29

PD_IRQ20

SIDE_RST#

CD_PLAY29,33

PLAY_MODE 30

SUSP#18,26,28,29,33,35,42,43,44

SIDE_RST#

PCMRST#33

IDERST_CD#20

PD_IOR#20 ODD_IOR#

PLT_RST#7,18,19,21,24,26,27

PD_CS#120

PD_CS#320

SW_IDE_SDCS1#

SW_IDE_SDCS3#

CD_PLAY 29,33

+5VCD

+5VCD

+5VCD

+5VCD

+3VS

+3VS

+5VS

+3VS

+5VCD

+5VALW

+5VALW

+5VS

+3VALW+3VS +5VCD

+5VS

+3VALW +3VS

+5VCD

+5VCD

+3VALW

+5VS +5VS_SATA

+VSB

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

IGT30 LA-3571P

0.1

HDD & CDROM

Custom

23 47Monday, December 25, 2006

2006/08/04 2006/10/06

Compal Electronics, Inc.

Pleace near HD CONN

Main SATA +5V Default

80 mil 80 mil

VCC= +3VALW

VCC= +3VALW

U74

TC7SH08FU_SSOP5

B

1

A

2Y4

P5

G

3

U55C

SN74LVC125APWLE_TSSOP14

SWDJ@

I

9O8

OE# 10

R463 100K_0402_5%

1 2

U55A

SN74LVC125APWLE_TSSOP14

SWDJ@

I

2O3

OE# 1

P14

G

7

R771

10K_0402_5%

12

R785

10K_0402_5%

SWDJ@

12

C432 3900P_0402_50V7K

12

C844

0.1U_0402_16V4Z

SWDJ@

R837 0_0402_5%

NOSWDJ@

1 2

C842

0.1U_0402_16V4Z

SWDJ@

1

2

Q92

DTC124EK_SC59

SWDJ@

2

13

R838 0_0805_5%

NOSWDJ@

1 2

C839 0.1U_0402_16V4Z

SWDJ@

1 2

R844 0_0402_5%

NOSWDJ@

1 2

R772

10K_0402_5%

SWDJ@

12

R355 0_0805_5%

NOSWDJ@

1 2

R782

10K_0402_5%

SWDJ@

12

JP9

ALLTO_C16616-122A3-L_NR

GND

1

A+

2

A-

3

GND

4

B-

5

B+

6

GND

7

V33

8

V33

9

V33

10

GND

11

GND

12

GND

13

V5

14

V5

15

V5

16

GND

17

Reserved

18

GND

19

V12

20

V12

21

V12

22

R840 0_0402_5%

NOSWDJ@

1 2

C462

1000P_0402_50V7K

1

2

S

GD

Q90

SI3456BDV-T1-E3_TSOP6

SWDJ@

3

6

245

1

U70

74LVC1G125GW_SOT3535

SWDJ@

I

2O4

P5

G

3

OE# 1

U55B

SN74LVC125APWLE_TSSOP14

SWDJ@

I

5O6

OE# 4

U55D

SN74LVC125APWLE_TSSOP14

SWDJ@

I

12 O11

OE# 13

C843

1U_0603_10V4Z

SWDJ@

1 2

C461

0.1U_0402_16V4Z

1

2

Q85

DTC124EK_SC59

SWDJ@

2

13

C841

10U_0805_10V4Z

SWDJ@

1

2

C449

1U_0603_10V4Z@

1

2

R896

10K_0402_5%

SWDJ@

12

R341 0_0805_5%@

1 2

R773

10K_0402_5%

SWDJ@

1 2

R774 240K_0402_5%

SWDJ@

1 2

C467

22U_1206_6.3V6M

1

2

C446

0.1U_0402_16V4Z

@

1

2

C840

10U_0805_10V4Z

SWDJ@

1

2

C553 0.1U_0402_16V4Z

12

R843 0_0402_5%

NOSWDJ@

1 2

R466

10K_0402_5%

12

R783

10K_0402_5%

SWDJ@

12

C441

22U_1206_6.3V6M

@

1

2

C552

1U_0603_10V4Z

1

2

JP10

OCTEK_CDR-50DY1G

ME@

1

122

3

344

5

566

7

788

9

910 10

11

11 12 12

13

13 14 14

15

15 16 16

17

17 18 18

19

19 20 20

21

21 22 22

23

23 24 24

25

25 26 26

27

27 28 28

29

29 30 30

31

31 32 32

33

33 34 34

35

35 36 36

37

37 38 38

39

39 40 40

41

41 42 42

43

43 44 44

45

45 46 46

47

47 48 48

49

49 50 50

C435 3900P_0402_50V7K

12

G

D

S

Q80

SI2301BDS_SOT23

SWDJ@

2

13

G

D

S

Q87

2N7002_SOT23

SWDJ@

2

13

C445

1000P_0402_50V7K

@

1

2

C444

0.1U_0402_16V4Z@

1

2

R845

33_0402_5%

SWDJ@

C463

0.1U_0402_16V4Z

1

2

R457

470_0402_5%

1 2

C472

1U_0603_10V4Z

1

2

R839

8.2K_0402_5%

NOSWDJ@

Q86

DTC124EK_SC59

SWDJ@

2

13

R857 0_0402_5%

@

1 2

C556

10U_0805_10V4Z

1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

LAN_CLK

CTL25

SI

XTALI

XTALO

LAN_WP

CTL12

CTL12

LAN_WP

LAN_DATA

LAN_CLK

CTL25

+LAN_BIASVDD

+LAN_BIASVDD

PCIE_MRX_C_LTX_P4

PCIE_MRX_C_LTX_N4

LAN_TX0+

LAN_RX1-

LAN_TX2-

LAN_TX0-

LAN_TX3-

LAN_TX2+

LAN_TX3+

LAN_RX1+

XTALI

XTALO

GPIO2

CS#

LAN_CLK

LAN_DATA

SI

CS#

EN_WOL

CLK_PCIE_LAN#15

PCI_CBE#319,28

PCIE_RXP421

CLK_PCIE_LAN15

PCIE_TXP421

PCIE_RXN421

LAN_TX0- 25

PCIE_TXN421

LAN_RX1- 25

ICH_PCIE_WAKE#21,26,27

LAN_TX2- 25

LAN_TX0+ 25

LAN_TX2+ 25

LAN_RX1+ 25

LAN_TX3- 25

LAN_TX3+ 25

PLT_RST#7,18,19,21,23,26,27

CLKREQ_LAN#15

LINKLED# 25

ACTIVITY# 25

EN_WOL33

+3V_LAN

+2.5V_LAN

+1.2V_LAN

+3V_LAN

+3VALW

+AVDDL

+PCIE_PLLVDD

+PCIE_VDD

+GPHY_PLLVDD

+1.2V_LAN

+XTALVDD

+2.5V_LAN

+LAN_AVDD

+2.5V_LAN

+PCIE_VDD

+1.2V_LAN

+3V_LAN

+3V_LAN

+2.5V_LAN

+3V_LAN

+XTALVDD

+1.2V_LAN

+PCIE_PLLVDD

+AVDDL

+GPHY_PLLVDD

+LAN_AVDD

+3VS

+3V_LAN

+3VS

+3V_LAN

+3V_LAN

+3V_LAN

+VSB

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

IGT30 LA-3571P

0.1

BCM5787MKML

Custom

24 47Monday, December 25, 2006

2006/08/04 2006/10/06

(CLKREQ#) and (ENERGY_DET) are

only supported in BCM5787M

Layout Notice : Filter place as close

chip as possible.

Notice : 4.7u 6.3V capactor Thickness 1.25mm

Layout Notice : Place as close

chip as possible.

Layout Notice : Filter place as close

chip as possible.

Layout Notice : Place as close

chip as possible.

Layout Notice : 1.2V filter. Place as close

chip as possible.

R551 47K_0402_5%@

1 2

C596

0.1U_0402_16V7K

S

GD

Q34

SI3456BDV-T1-E3_TSOP6

3

6

245

1

Q33

MMJT9435T1G_SOT223

1

2 3

4

C877

0.1U_0603_25V7K

1

2

C583

0.1U_0402_16V4Z

1

2

C613

0.1U_0402_16V4Z

1

2

C617

0.1U_0402_16V4Z

1

2

C572

0.1U_0402_16V4Z

1

2

Y2

25MHZ_16P_XSL025000FK1H

1 2

C654 0.1U_0402_16V4Z

1 2

C634

0.1U_0402_16V4Z

1

2

C635

4.7U_0805_6.3V6K

1

2

R537 0_0402_5%@

1 2

Q31

MBT35200MT1G_TSOP6

3

41

2

5

6

C661

10U_0805_10V4Z

1

2

C589

0.1U_0402_16V4Z

21.5

1

2

L21 FBM-L11-160808-601LMT_0603

12

C611

0.1U_0402_16V4Z

1

2

C631

0.1U_0402_16V4Z

1

2

R522 0_0402_5%@

1 2

L23

FBM-L11-321611-260-LMT_1206

@

1 2

C612

27P_0402_50V8J

1

2

C577

0.1U_0402_16V4Z

1

2

C628

0.1U_0402_16V4Z

1

2

R516 0_0402_5%@

1 2

R566 1K_0402_5%

1 2

R488

4.7K_0402_5%

12

C648

10U_0805_10V4Z

1

2

C591

0.1U_0402_16V4Z

1

2

R519 4.7K_0402_5%@

1 2

C625

0.1U_0402_16V4Z

1

2

C581

27P_0402_50V8J

1

2

R587 1.24K_0402_1%

GIGA@

12

R526 4.7K_0402_5%

1 2

C568

4.7U_0805_6.3V6K

1

2

C597

0.1U_0402_16V4Z

1

2

C567

0.1U_0402_16V4Z

1 2

R587

1K_0402_1%

100@

R512 0_0402_5%@

1 2

R538 200_0603_1%

21.5

12

C585

0.1U_0402_16V4Z

1

2

C641

0.1U_0402_16V4Z

1

2

C575

0.1U_0402_16V4Z

1

2

L15

FBM-L11-160808-601LMT_0603

12

R489

4.7K_0402_5%

12

U31

BCM5787MKML_QFN68

GIGA@

U27

AT24C02_SO8

A0 1

A1 2

NC 3

GND 4

VCC

8

WP

7

SCL

6

SDA

5

C633

0.1U_0402_16V4Z

1

2

C629

4.7U_0805_6.3V6K

1

2

R518 4.7K_0402_5%@

1 2

G

D

S

Q93

2N7002_SOT23

2

13

C576

0.1U_0402_16V4Z

1

2

C632

0.1U_0402_16V4Z 1

2

L16 FBM-L11-160808-601LMT_0603

12

L22

FBM-L11-160808-601LMT_0603

12

C636

4.7U_0805_6.3V6K 1

2

C642

0.1U_0402_16V4Z

1

2

C619

0.1U_0402_16V4Z

1

2

R514 0_0402_5%@

1 2

C624

4.7U_0805_6.3V6K 1

2

U31

100@

VDDIO 6

VDDIO 15

VDDIO 19

VDDIO 56

VDDIO 61

VDDP 17

VDDP 68

VDDC 5

VDDC 13

VDDC 20

VDDC 34

VDDC 55

VDDC 60

VMAIN_PRSNT

53

XTALI

21

XTALO

22

XTALVDD 23

VAUX_PRSNT

54

UART_MODE

9

AVDD 38

AVDD 45

AVDD 52

AVDDL 39

AVDDL 44

AVDDL 46

AVDDL 51

BIASVDD 36

PCIE_PLLVDD 30

PCIE_VDD 27

PCIE_VDD 33

CLKREQ

11

CS 62

ENERGY_DET

59

GPHY_PLLVDD

35

GPIO_0(SERIAL_DO)

4

GPIO_1(SERIAL_DI)

7

GPIO_2

8

LINKLED 2

LOW PWR

3

PCIE_REFCLK_N

28

PCIE_REFCLK_P

29

PCIE_RXD_N

32

PCIE_RXD_P

31

PCIE_TXD_N

25

PCIE_TXD_P

26

PERST

10

WAKE

12

RDAC 37

REG_GND

16

REGCTL12 14

REGCTL25 18

SCLK(EECLK) 65

SI 63

SMB_CLK

58

SMB_DATA

57

SO(EEDATA) 64

SPD1000LED 67

SPD100LED 1

TRAFFICLED 66

TRD0_N 41

TRD0_P 40

TRD1_N 42

TRD1_P 43

TRD2_N 48

TRD2_P 47

TRD3_N 49

TRD3_P 50

PCIE_GND

24

GND

69

R567 1K_0402_5%

1 2

L19 FBM-L11-160808-601LMT_0603

12

R902

33K_0402_5%

12

L17 FBM-L11-160808-601LMT_0603

12

R513 0_0402_5%

1 2

C598

0.1U_0402_16V7K

L18

FBM-L11-160808-601LMT_0603

12

C656 4.7U_0805_10V4Z

1 2

R533 4.7K_0402_5%GIGA@

12

R546 47K_0402_5%@

1 2

R521 0_0402_5%

1 2

C639

10U_0805_10V4Z

1

2

R534 4.7K_0402_5%GIGA@

1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

TCT

MDO0+

MDO0-

MDO1-

MDO1+

MCT1

MCT0

RJ45_PR

LAN_TX0+

LAN_RX1-

LAN_TX2-

LAN_TX0-

LAN_TX3-

LAN_TX2+

LAN_TX3+

LAN_RX1+

MDO3+

MCT0

MDO0+

MDO1+

MCT1

TCT

MDO1-

MDO3-

MDO0-

MDO2+

MDO2-

LAN_TX0-

LAN_TX0+

LAN_RX1-

LAN_RX1+

LAN_TX2-

LAN_TX2+

LAN_TX3+

LAN_TX3-

LAN_RX1+

LAN_RX1-

LAN_TX0-

LAN_TX0+

RJ_TIP

RJ_RING

MDO1+

MDO0-

MDO2+

MDO0+

MDO3-

MDO3+

MDO2-

MDO1-

RJ45_PR

RJ_RING

RJ_TIP

LAN_TX0-24

LAN_RX1-24

LAN_TX2-24

LAN_TX0+24

LAN_TX2+24

LAN_RX1+24

LAN_TX3-24 LAN_TX3+24

MDO0+

MDO0-

MDO1+

MDO2+

MDO2-

MDO1-

MDO3+

MDO3-

RJ45_PR

LINKLED#24

ACTIVITY#24

+2.5V_LAN

+3V_LAN

+3V_LAN

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

IGT30 LA-3571P

0.1

LAN CONTROLLER

Custom

25 47Monday, December 25, 2006

2006/08/04 2006/10/06

Compal Electronics, Inc.

near LAN controller

RJ11+RJ45 CONN

MDC CONN

R787

FBMA-L11-160808-181LMA15T

12

C804

4.7U_0805_10V4Z

1

2

R531 49.9_0402_1%100@ 12

C881

220P_0402_25V8J

1

2

R569

75_0402_5% 12

C882

220P_0402_25V8J

1

2

R909 330_0402_5%

12

R545 49.9_0402_1%100@ 12

C803

1000P_1206_2KV7K

1 2

R579 49.9_0402_1%@

12

R523

FBM-L11-160808-601LMT_0603

12

R581 49.9_0402_1%@

12

U29

0.5u_24HST1041A-2GIGA@

TCT1

1TD1+

2TD1-

3

TCT2

4TD2+

5TD2-

6MX2- 19

MX2+ 20

MCT2 21

MX1- 22

MX1+ 23

MCT1 24

TCT3

7TD3+

8TD3-

9

TCT4

10 TD4+

11 TD4-

12

MCT3 18

MX3+ 17

MX3- 16

MCT4 15

MX4+ 14

MX4- 13

C637 0.01U_0402_16V7K@

12

C571 0.01U_0402_16V7K

100@

12

C587 0.1U_0402_16V4Z

GIGA@

1 2

U32

NS0013_16P

100@

RD+

1RD-

2CT

3

CT

6TD+

7TD-

8TX- 9

TX+ 10

CT 11

CT 14

RX- 15

RX+ 16

C615 0.01U_0402_16V7K@

12

R541 49.9_0402_1%100@ 12

C802

0.1U_0402_16V4Z

1

2

R529

75_0402_5% GIGA@

12

C592 0.01U_0402_16V7K

100@

12

R527 49.9_0402_1%100@ 12

R568 49.9_0402_1%@

12

C622 0.1U_0402_16V4Z

GIGA@

1 2

R558 49.9_0402_1%@

12

RJ45

RJ11

JP73

ALLTO_C100B6-110A4-L

TX2-

5

TX2+

4

RX2+

7

RX2-

8

TX1+

1

TX1-

2

RX1+

3

RX1-

6

SGND2

16 SGND1

15

RJ11_1

9

RJ11_2

10

VDD

11

GND

12

VDD

13

GND

14

R575

75_0402_5% 12

R910 330_0402_5%

12

C578 0.1U_0402_16V4Z

GIGA@

1 2

R786 FBMA-L11-160808-181LMA15T

12

C579 0.01U_0402_16V7K

100@

12

C573 0.01U_0402_16V7K

100@

12

C599 0.1U_0402_16V4Z

GIGA@

1 2

JP74

EDL71_MDC

1

2

R525

75_0402_5% GIGA@

12

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

CLKREQ_NC1#

PCIE_PME#_R

PERST#

CPUSB#

CPUSB#

USB20_N5

USB20_P5

PCIE_TXP3

PCIE_RXN3

USB5-

PCIE_RXP3

PCIE_TXN3

CLK_PCIE_NC1#

CLK_PCIE_NC1

ICH_SMBCLK

ICH_SMBDATA

USB5+

CPUSB#

SUSP#

PERST#

PLT_RST#

SYSON

CLK_PCIE_NC1#15 CLK_PCIE_NC115

ICH_PCIE_WAKE#21,24,27

ICH_SMBDATA15,21,27 ICH_SMBCLK15,21,27

USB20_P521 USB20_N521

PCIE_TXN321 PCIE_TXP321

PCIE_RXP321 PCIE_RXN321

CLKREQ_NC1#15

PLT_RST#7,18,19,21,23,24,27

SUSP#18,23,28,29,33,35,42,43,44

CPUSB#21

SYSON33,35,42

CPUSB#21

+3VS_PEC

+1.5VS_PEC

+3V_PEC

+1.5VS_PEC

+3VS_PEC

+1.5VS_PEC

+3V_PEC

+1.5VS

+3VALW

+3VS

+1.5VS_PEC

+3VS_PEC

+3V_PEC

+3VALW

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

IGT30 LA-3571P 0.1

CardBus Socket

Custom

26 47

Monday, December 25, 2006

2006/08/04 2006/10/06

Compal Electronics, Inc.

Express Card Power Switch

C373

0.1U_0402_16V4Z

1

2

C375 0.1U_0402_16V4Z

12

C392

4.7U_0805_10V4Z

1

2

C365

4.7U_0805_10V4Z

1

2

R211 100K_0402_5%

12

R266

0_0402_5%

1 2

C389 0.1U_0402_16V4Z

12

JP53

FOX_1CH4110C

GND

1

USB_D-

2

USB_D+

3

CPUSB#

4

RSV

5

RSV

6

SMB_CLK

7

SMB_DATA

8

+1.5V

9

+1.5V

10

WAKE#

11

+3.3VAUX

12

PERST#

13

+3.3V

14

+3.3V

15

CLKREQ#

16

CPPE#

17

REFCLK-

18

REFCLK+

19

GND

20

PERn0

21

PERp0

22

GND

23

PETn0

24

PETp0

25

GND

26

GND

27

GND

28

U8

R5538_QFN20

3.3Vin

2

3.3Vin

43.3Vout 3

3.3Vout 5

SYSRST#

6

SHDN#

20

STBY#

1

PERST# 8

OC# 19

RCLKEN

18

AUX_IN

17 AUX_OUT 15

CPPE#

10

CPUSB#

9

NC 16

GND 7

1.5Vin

12

1.5Vin

14 1.5Vout 11

1.5Vout 13

R315

0_0402_5%

1 2

R259 0_0402_5%

1 2

C378 0.1U_0402_16V4Z

12

C384

0.1U_0402_16V4Z

1

2

C371

0.1U_0402_16V4Z

1

2

C361

4.7U_0805_10V4Z

1

2

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

CLK_PCIE_MCARD

PLT_RST#

ICH_SMBCLK

ICH_SMBDATA

BT_AVTIVE

WLAN_AVTIVE

CLK_PCIE_MCARD#

USB20_P7

USB20_N7

WLAN_AVTIVE

BT_AVTIVE

RF_OFF2

BTONLED

BTON_LED2

CLK_PCIE_MCARD1

CLK_PCIE_MCARD1#

PLT_RST#

ICH_SMBCLK

ICH_SMBDATA

BT_AVTIVE

WLAN_AVTIVE

PCIE_TXP1

PCIE_RXN1

PCIE_RXP1

PCIE_TXN1

AZ_SDIN3

AZ_SYNC

ICH_PCIE_WAKE#21,24,26

PCIE_RXN221 PCIE_RXP221

PCIE_TXN221 PCIE_TXP221

CLK_PCIE_MCARD15

ICH_SMBDATA 15,21,26

ICH_SMBCLK 15,21,26

PLT_RST# 7,18,19,21,23,24,26

WIRELESS_LED# 36

RF_OFF# 33

HDA_BITCLK_MDC 20

HDA_SDOUT_MDC20

HDA_RST_MDC#20

HDA_SYNC_MDC20

CLK_PCIE_MCARD#15

CLKREQ_MCARD#15

KILL_MDC#20

USB20_N721 USB20_P721

BT_OFF#33

BTONLED36

USB20_N9 21

USB20_P9 21

ICH_PCIE_WAKE#21,24,26

CLK_PCIE_MCARD115

ICH_SMBDATA 15,21,26

ICH_SMBCLK 15,21,26

PLT_RST# 7,18,19,21,23,24,26

CLK_PCIE_MCARD1#15

CLKREQ_MCARD1#

USB20_N1 21

USB20_P1 21

RF_OFF# 33

PCIE_TXN121 PCIE_TXP121

PCIE_RXP121 PCIE_RXN121

HDA_SDIN120

3G_LED# 36

+3VS

+1.5VS

+3VS

+5VS

+3VS_BT2

+3VS

+1.5VS

+3VALW

+3VALW

+3VALW

+3VS

+3VS

+3V_SB

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

IGT30 LA-3571P

0.1

Mini Card / MDC CONN

Custom

27 47Monday, December 25, 2006

2006/08/04 2006/10/06

Compal Electronics, Inc.

Mini-Express Card(Slot 1-WLAN)

MDC CONN.

Mini-Express Card(Slot 2-3G)

BT MODULE CONN.

C669

0.1U_0402_16V4Z

1

2

R561 0_0402_5%@

12

JP17

ACES_88012-1207

ME@

1

1

3

3

5

5

7

7

9

9

11

11

22

44

66

88

10 10

12 12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

Q13

DTC124EK_SC59

2

13

R595 0_0402_5%

12

C588

10P_0402_50V8J

@

1

2

G

D

S

Q8

AO3413_SOT23

2

13

JP55

FOX_AS0B226-S56N-7F

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39

41

41

43

43

45

45

47

47

49

49

51

51

GND1

53

22

44

66

88

10 10

12 12

14 14

16 16

18 18

20 20

22 22

24 24

26 26

28 28

30 30

32 32

34 34

36 36

38 38

40 40

42 42

44 44

46 46

48 48

50 50

52 52

GND2 54

R151

10K_0402_5%

12

C337

0.1U_0402_16V4Z

12

R497 33_0402_5%

1 2

R555 0_0402_5%@

12

C682

0.1U_0402_16V4Z

1

2

JP56

MOLEX_53780-0870

ME@

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

GND1

9

GND2

10

C586

1U_0805_25V4Z

1 2

JP54

FOX_AS0B226-S56N-7F

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39

41

41

43

43

45

45

47

47

49

49

51

51

GND1

53

22

44

66

88

10 10

12 12

14 14

16 16

18 18

20 20

22 22

24 24

26 26

28 28

30 30

32 32

34 34

36 36

38 38

40 40

42 42

44 44

46 46

48 48

50 50

52 52

GND2 54

R598 0_0402_5%@

12

R899

0_0603_5%

12

R496

10K_0402_1%

12

C683

0.1U_0402_16V4Z

1

2

D21

DAP202U_SOT323

2

31R535

10_0402_5%

@

12

R498 0_0402_5%@

12

Q11

DTC124EK_SC59 2

13

R636 0_0402_5%@

12

R635 0_0402_5%@

12

R171

10K_0402_1%

12

C684

0.1U_0402_16V4Z

1

2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PCI_AD29

PCI_AD30

PCI_AD28

PCI_AD31

PCI_AD26

PCI_AD25

PCI_AD27

PCI_AD22

PCI_AD23

PCI_AD20

PCI_AD24

PCI_AD21

PCI_AD18

PCI_AD17

PCI_AD19

PCI_AD14

PCI_AD16

PCI_AD13

PCI_AD15

PCI_AD12

PCI_AD11

PCI_AD10

PCI_AD9

PCI_AD7

PCI_AD6

PCI_AD8

PCI_AD4

PCI_AD5

PCI_AD1

PCI_AD2

PCI_AD3

PCI_AD0

PCI_PAR

PCI_FRAME#

PCI_STOP#

PCI_DEVSEL#

PCI_TRDY#

PCI_IRDY#

PCI_AD22 CBS_IDSEL

PCI_REQ0#

PCI_GNT0#

PCI_PERR#

PCI_SERR#

CBS_GRST#

CLK_PCI_1394

CBS_GRST#

R5C832XI

IEEE1394_TPAN0

R5C832XO

R5_PME#

IEEE1394_TPAP0

IEEE1394_TPAN0

IEEE1394_TPBP0

IEEE1394_TPBN0

IEEE1394_TPBIAS0

R5C832XI

R5C832XO

MSEN

XDEN MSEN

UDIO3

UDIO4

UDIO3

UDIO4

XDALE

XDD7

SDCD#_XDCD0#

SDDATA0_MSDATA0

SDDATA2_MSDATA2

MSCD#_XDCD1

XDWP#

SDDATA3_MSDATA3

SDCMD_MSBS

SDPWR0_MSPWR_XDPWR

XDD4

SDWP#_XDRB#

SDDATA1_MSDATA1

XDCLE

SDCLK_MSCLK

XD_CE#

XDD6

XDD5

SDPWR0_MSPWR_XDPWR

3IN1_LED#

TP_MSEXTCK

TP_UDIO1

SIRQ

TP_UDIO2

UDIO5

+3V_PHY

SDCD#_XDCD0# XDCD#

SD_MSDATA1

SD_MSDATA2

PCI_CBE#0

PCI_CBE#1

PCI_CBE#3

PCI_CBE#2

Z3008

IEEE1394_TPBIAS0

IEEE1394_TPAP0

IEEE1394_TPBP0

IEEE1394_TPBN0

UDIO5

XDEN

SDDATA1_MSDATA1

SDDATA2_MSDATA2

XDCD#

MSCD#_XDCD1

SDCD#_XDCD0#

PCI_AD[0..31]19

PCI_PAR19 PCI_FRAME#19 PCI_TRDY#19 PCI_IRDY#19 PCI_STOP#19 PCI_DEVSEL#19

PCI_PERR#19 PCI_SERR#19

PCI_GNT0#19 PCI_REQ0#19

PCI_CLKRUN#21,33 R5_PME#33 PCI_PIRQG#19 PCI_PIRQH#19

CLK_PCI_139415 PCI_RST#19,32,33

SIRQ 21,32,33

PCI_CBE#019 PCI_CBE#119 PCI_CBE#219 PCI_CBE#319,24

3IN1_LED#

SUSP#18,23,26,29,33,35,42,43,44

SDDATA0_MSDATA0 37

SDDATA3_MSDATA3 37

XDD4 37

XDD5 37

XDD6 37

XDD7 37

SDWP#_XDRB# 37

SDCMD_MSBS 37

XDWP# 37

XDALE 37

SDCD#_XDCD0# 37

XD_CE# 37

XDCLE 37

MSCD#_XDCD1 37

SDCLK_MSCLK 37

SD_MSDATA1 37

SD_MSDATA2 37

XDCD# 37

SDDATA1_MSDATA1 37

SDDATA2_MSDATA2 37

+3VS

+3VS +VCC_4IN1 +VCC_4IN1

+3VS

+3VS

+3VS

+3VS

+3VS

+3V_PHY

+VCC_4IN1_XD

+VCC_4IN1

+3VS

+5VS

Title

Size Document Number R ev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

IGT30 LA-3571P

0.1

1394+3 in 1 Card

Custom

28 47Monday, December 25, 2006

2006/08/04 2006/10/06

Compal Electronics, Inc.

Layout Note: Place close to R5C832

Layout Note: Shield GND for

IEEE1394_TPA and TPB

Layout Note: Place close to R5C832

and Shield GND for SD_CLK

Layout Note: Place close to R5C832

and Shield GND for SDCLK_MSCLK

MDIO

PIN Name

MDIO00

MDIO01

MDIO02

MDIO03

MDIO04

MDIO05

MDIO06

MDIO07

MDIO08

SD Card

PIN Name

SDCD#

SDWP#

SDPWR0

SDPWR1

SDLED#

SDCCMD

MDIO09 SDCCLK

MDIO10

MDIO11

MDIO12

MDIO13

MDIO14

MDIO15

MDIO16

MDIO17

MDIO18

MDIO19

SDCDAT0

SDCDAT1

SDCDAT2

SDCDAT3

MMC Card

PIN Name

MMCDAT

MMCCMD

MMCCLK

MMCCD#

MMCPWR

MMCLED#

MS Card

PIN Name

MSCD#

MSWR

MSLED#

MSEXTCK

MSCDAT0

MSCDAT1

MSCDAT2

MSCDAT3

MSBS

MSCCLK

XD Card

PIN Name

XDCDAT0

XDCDAT1

XDCDAT2

XDCDAT3

XDCDAT4

XDCDAT5

XDCDAT6

XDCDAT7

XDCLE

XDALE

XDCD0#

XDCD1#

XDWP#

XDPWR

XDR/B#

XDLED#

XDWE#

XDCE#

XDRE#

Layout Note: Shield GND for

CBS_CCLK_INTERNAL and CBS_CCLK

SD,MMC,MS,XD muti-function pin define

Solve MS Duo Adaptor short problem

40mil

MSEN XDENUDIO3 UDIO4

Pull-up

Function

Pull-upPull-up Enable

SD,XD,MS,MMC Card

Pull-up

Function set pin define

R5C832

U18

R5C832_TQFP128~D

AD31

125

AD30

126

AD29

127

AD28

1

AD27

2

AD26

3

AD25

5

AD24

6

AD23

9

AD22

11

AD21

12

AD20

14

AD19

15

AD18

17

AD17

18

AD16

19

AD15

36

AD14

37

AD13

38

AD12

39

AD11

40

AD10

42

AD9

43

AD8

44

AD7

46

AD6

47

AD5

48

AD4

49

AD3

50

AD2

51

AD1

52

AD0

53

VCC_PCI3V 10

VCC_PCI3V 20

VCC_RIN 61

VCC_ROUT 16

VCC_ROUT 34

VCC_3V 67

VCC_MD3V 86

AVCC_PHY3V 98

AVCC_PHY3V 106

AVCC_PHY3V 110

TPBIAS0 113

MDIO00 80

MDIO03 77

MDIO04 76

MDIO05 75

MDIO06 74

MDIO07 73

MDIO10 82

MDIO11 81

MDIO12 93

MDIO13 90

FIL0 96

VREF 100

REXT 101

MDIO08 88

MDIO09 84

MDIO01 79

MDIO02 78

MDIO14 91

MDIO15 89

MDIO16 92

MDIO17 87

MDIO18 85

MDIO19 83

C/BE3#

7

C/BE2#

21

C/BE1#

35

C/BE0#

45

PAR

33

FRAME#

23

TRDY#

25

IRDY#

24

STOP#

29

DEVSEL#

26

IDSEL

8

PERR#

30

SERR#

31

NC

97

TEST

66 HWSPND#

69

INTA#

115

INTB#

116

PCICLK

121

PCIRST#

119

GBRST#

71

CLKRUN#

117

PME#

70

REQ#

124

GNT#

123

AGND

99 AGND

102 AGND

103

GND 4

GND 13

GND 22

GND 28

UDIO0/SERIRQ# 72

UDIO1 60

UDIO2 56

UDIO3 65

UDIO4 59

UDIO5 57

XI 94

XO 95

MSEN 58

XDEN 55

AGND

107 AGND

111

GND 54

GND 62

GND 63

GND 68

GND 118

GND 122

VCC_PCI3V 32

VCC_PCI3V 27

VCC_PCI3V 41

VCC_ROUT 114

VCC_ROUT 64

VCC_ROUT 120

VCC_PCI3V 128

AVCC_PHY3V 112

TPAP0 109

TPAN0 108

TPBP0 105

TPBN0 104

C711

0.1U_0402_16V4Z

1

2

C714

22U_0805_6.3V6M

1

2

R634 10K_0402_5%@

1 2

T28PAD

C496

270P_0402_50V7K

1

2

T29PAD

C495

4.7P_0402_50V8C

@

1

2

R381

5.1K_0402_1%

12

R656

10K_0603_1%

1 2

R627 10K_0402_5%@

1 2

R629 0_0402_5%

12

C447

0.47U_0603_16V4Z

1

2

C671

0.1U_0402_16V4Z

1

2

G

D

S

Q38

2N7002_SOT23

@

2

1 3

C713

1000P_0402_50V7K

1

2

C487

0.01U_0402_16V7K

1

2

R344 100K_0402_5%

1 2

R631 0_0805_5%

1 2

U38

RT9701CB_SOT25

VIN

3

VIN/CE

4VOUT 1

VOUT 5

GND

2

R367

56.2_0402_1%

1 2

C452

0.01U_0402_16V7K

1

2

R349 0_0402_5%@

1 2

G

D

S

Q42

2N7002_SOT23

@

2

1 3

G

D

S

Q41

2N7002_SOT23

@

2

13

X2

24.576MHz_16P_1BG24576CKIA

1 2

C492

0.47U_0603_16V4Z

1

2

G

D

S

Q39

2N7002_SOT23

@

2

1 3

R366

56.2_0402_1%

1 2

C448

10U_0805_4VAM

1

2

R374

56.2_0402_1%

1 2

C665

0.1U_0402_16V4Z

1

2

C477

0.01U_0402_16V7K

1

2

C451

0.01U_0402_16V7K

1

2

R619

150K_0402_5%

12

C494

0.01U_0402_16V7K

1

2

C469

10U_0805_4VAM

1

2

R347 10K_0402_5%

1 2

C481

0.01U_0402_16V7K

1

2

R365

10_0402_5%

@

12

C499

0.33U_0603_16V4Z

1

2

C668

10U_1206_6.3V6M

1

2

R363 100_0402_5%

1 2

C699

0.1U_0402_16V4Z

1

2

C485

15P_0603_50V8J

1 2

R659 10K_0402_5%@

1 2

R342 10K_0402_5%

1 2

R351 10K_0402_5%

1 2

L25

BLM21A601SPT_0805

1 2

R658 0_0402_5%

1 2

R353

100K_0402_5%

12

R343 10K_0402_5%

1 2

D24

DAN202U_SC70

2

31

G

D

S

Q36

2N7002_SOT23

@

2

13

C455

0.1U_0402_16V4Z

1

2

R345 10K_0402_5%

1 2

C664

1U_0603_10V4Z

1

2

R375

56.2_0402_1%

1 2

C493

0.01U_0402_16V7K

1

2

JP13

SUYIN_020115FB004S512ZL

ME@

TPB-

1

TPB+

2

TPA-

3

TPA+

4

GND 5

GND 6

GND 7

GND 8

C657

10U_0805_4VAM

1

2

C466

1U_0603_10V6K

1

2

R637 0_0402_5%

12

C489 0.01U_0402_16V7K

1 2

C482

0.01U_0402_16V7K

1

2

C712

1000P_0402_50V7K

1

2

C488

15P_0603_50V8J

1 2

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

MIC

LINE_OUTR

LINE_OUTL

HDA_BITCLK_AUDIO

HDA_SDIN0

EAPD

EAPD

MONO_IN1 MONO_IN

LINE_OUTL

LINE_OUTR

EAPD

C_LINE_OUTL

C_LINE_OUTR

CD_R_R

CD_R_L

CD_GNA

AMP_LEFT

AMP_RIGHT

INT_CD_L

INT_CD_R

EC_IDERST

LINE_OUTL AMP_LEFT

LINE_OUTR AMP_RIGHT

EC_IDERST1

EC_IDERST

SUSP#

CD_GNACD_AGND

EC_IDERST1

CD_GNDA

CD_RC_R

C_LINE_OUTR

MONO_IN

CD_RC_L

GNDA

C_LINE_OUTL

GNDA

GNDA

C_MIC

250_SDIN

MIC30

LINE_OUTL

LINE_OUTR

HDA_BITCLK_AUDIO 20

HDA_SDIN0 20

HP_L30

HP_R30

INT_MIC_L30,36

HDA_RST_AUDIO#20

JACK_PLUG_MIC37

HDA_SYNC_AUDIO20

HDA_SDOUT_AUDIO20

EAPD33

BEEP#33

SB_SPKR21

SPDIF37 LFE_OUT 31

LFE_OUT 31

INT_CD_L23,31

INT_CD_R23,31

AMP_RIGHT 30

AMP_LEFT 30

EC_IDERST33

SUSP# 18,23,26,28,33,35,42,43,44

CD_GNA

CD_AGND23

INT_MIC_R30,36

EC_IDERST131

JACK_PLUG_CODEC 37

CD_PLAY23,33

+MIC1_VREFO_L

+MIC2_VREFO

+VDDC

+VDDA

+AVDD_AC97 +3VS

+AUD_VREF

+VDDA

+VDDA

+VDDA

+VDDA

+5VS

+MIC1_VREFO_L+MIC2_VREFO +AUD_VREF

+5VALW

+5VALW

+5VAMP

+5VAMP

+5VALW

+5VAMP

+5VALW

+5VAMP

+5VALW

+5VS

+5VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

IGT30 LA-3571P

0.1

ALC861 VD Codec

Custom

29 47Monday, December 25, 2006

2006/08/04 2006/10/06

Compal Electronics, Inc.

10mil

10mil

10mil

AC97 Codec

60mil

4.85V

(output = 250 mA)

28.7K for Module Design (VDDA = 4.702)

40mil

GND GNDA

PC Beep for DOS mode

10mil10mil

ALC262

ALC861D

SUB WOOFER SUPPORT

10mil

DIRECT PLAY PATH

POWER ON PATH

SWDJ

C692

10U_0805_10V4Z

1

2

C689 1U_0603_10V4Z

12

R793 20K_0402_5%

12

C454

1U_0603_10V4Z

12

C695 680P_0402_50V7K

R805 0_0402_5%

SWDJ@

1 2

U41

ALC262-GR_LQFP48-N

LINE2_L

14

LINE2_R

15

MIC2_R

17

MIC2_L

16

LINE1_L

23

LINE1_R

24

CD_L

18

CD_R

20

CD_GND

19

MIC1_L

21

MIC1_R

22

SENSE A

13

PC_BEEP

12

LINE_OUT_L 35

LINE_OUT_R 36

MONO_O 37

RESET#

11

SYNC

10

BIT_CLK 6

SDATA_OUT

5

SDATA_IN 8

GPIO2 2

GPIO3 3

LINE1_VREFO 29

MIC2_VREFO 30

MIC1_VREFO_L 28

VREF 27

DVDD1 1

DVDD2 9

AVDD1 25

AVDD2 38

MIC1_VREFO_R 32

NC

46

SPDIFI/EAPD

47

SPDIFO

48

DVSS1

4

DVSS2

7

LINE2_VREFO 31

DCVOL 33

SENSE B 34

GPIO0 43

GPIO1 44

NC

45

LFILT 40

AVSS1 26

AVSS2 42

HP_OUT_L 39

HP_OUT_R 41

R382 39.2K_0402_1%

12

R644 22_0402_5%

1 2

C805

1U_0603_10V4Z

SWDJ@

1 2

C694 680P_0402_50V7K

C691 2.2U_0603_6.3V6K

1 2

C813 1U_0603_10V4Z861@

1 2

R803

10K_0402_5%

SWDJ@

1 2

C688

0.1U_0402_16V4Z

1

2

R800

10_0402_5%

1 2

C719 10U_0805_10V4Z

12

U71C

SN74HCT4066PW_TSSOP14

SWDJ@

A

4B3

P14

G

7

C

5

C

BE

Q26

2SC2411K_SC59

1

2

3

R356

10K_0402_5%@

12

R790

1M_0402_5%

SWDJ@

12

R648

10K_0402_1%

12

C698 2.2U_0603_6.3V6K

1 2

R643 33_0402_5%

1 2

R789

1M_0402_5%

SWDJ@

12

C511

1U_0603_10V4Z

@

1

2

R654

51K_0603_1%

12

C721 1U_0603_10V4Z

1 2

G

D

S

Q43

2N7002_SOT23

2

13

L29

KC FBM-L11-201209-221LMAT_0805

1 2

R647 20K_0402_1%

1 2

C687

0.1U_0402_16V4Z

1

2

C693 2.2U_0603_6.3V6K

1 2

C724

10U_1206_10V4Z

1

2

C732

1U_0603_10V4Z

@

1

2

R900 100_0402_5%

NOSWDJ@

1 2

C808 1U_0402_6.3V4Z

1 2

R641 0_0402_5%

1 2

C722 1U_0603_10V4Z

1 2

U71B

SN74HCT4066PW_TSSOP14

SWDJ@

A

11 B10

P14

G

7

C

12

R354 22_0402_5%@

1 2

R357

10K_0402_1%

12

C806

1U_0603_10V4Z

SWDJ@

1 2

C685 470P_0402_50V8J

1 2

G

D

S

Q81

2N7002_SOT23

SWDJ@

2

13

R645

10K_0402_1%

12

R848 10K_0402_5%

12

R373 0_0402_5%

1 2

U71A

SN74HCT4066PW_TSSOP14

SWDJ@

A

1B2

P14

G

7

C

13

R802 0_0402_5%

NOSWDJ@

1 2

R905

10K_0402_1%

SWDJ@

12

L31

KC FBM-L11-201209-221LMAT_0805

1 2

R799

1M_0402_5%

SWDJ@

12

R791

1M_0402_5%

SWDJ@

12

R352

560_0402_5%

1 2

C498

0.1U_0402_16V4Z

@

1

2

R801

1M_0402_5%

SWDJ@

12

R798 0_0402_5%

NOSWDJ@

1 2

R639 0_0402_5%

1 2

R383 0_0402_5%

1 2

G

D

S

Q96

2N7002_SOT23

SWDJ@

2

13

R797

1M_0402_5%

SWDJ@

12

U71D

SN74HCT4066PW_TSSOP14

SWDJ@

A

8B9

P14

G

7

C

6

R804 0_0402_5%

@

1 2

R646 20K_0402_5%

1 2

R788

1M_0402_5%

SWDJ@

12

C479 1U_0603_10V4Z

1 2

L24 CHB1608U301_0603@

1 2

R358

10K_0402_1%

12

C812 1U_0603_10V4Z861@

1 2

C728

0.1U_0402_16V4Z

@

1

2

R655

150K_0603_1%

1 2

C716

0.1U_0402_16V4Z

1

2

R364

20K_0402_1%

1 2

C453

0.1U_0402_16V4Z@

1

2

R348

560_0402_5%

1 2

C807 1U_0603_10V4Z

1 2

R379 10K_0402_5%@

1 2

U42

SI9182DH-AD_MSOP8

VIN

4

SD

8

VOUT 5

GND 3

SENSE or ADJ 6

ERROR

7CNOISE 1

DELAY

2

C810 1U_0603_10V4Z

1 2

C484 1U_0603_10V4Z

1 2

C733

1U_0603_10V4Z

@

1

2

R794 20K_0402_5%

12

C809 1U_0402_6.3V4Z

1 2

C458 22P_0402_50V8J@

1 2

C811

0.1U_0402_16V4Z

SWDJ@

12

R642 20K_0402_5%

1 2

C717

0.1U_0402_16V4Z

1

2

R638

CHB1608U301_0603

1 2

R795 20K_0402_5%

12

D11

RB751V_SOD323

2 1

R796

1M_0402_5%

SWDJ@

12

R657 0_0402_5%

1 2

C734

10U_0805_10V4Z

1

2

C718

10U_0805_10V4Z

1

2

R847

10K_0402_5%

12

C725

0.1U_0402_16V4Z

@

1

2

C459

1U_0603_10V4Z

12

L26

CHB1608U301_0603

1 2

C726 1000P_0402_50V7K@

1 2

C697

0.1U_0402_16V4Z

1

2

C686

10U_0805_10V4Z

1

2

R792 20K_0402_5%

12

C473

1U_0603_10V4Z

12

C727 1000P_0402_50V7K@

1 2

C715 2.2U_0603_6.3V6K

1 2

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

SPKR+O

SPKR-O

SPKL+O

SPKL-OSPKL-

SPKR-

SPKR+

SPKL+

HP_CL+

HP_CR+

JACK_PLUG

PR

PL

VOLMAX

VOL_AMP

LIN

RIN

AMP_OFF# EC_MUTE#

HP_OUTL

HP_OUTR

GNDAGNDA

SPKL+O

SPKL-O

SPKR+O

SPKR-O

MUTE_AMP

HP_OUTR

HP_OUTL

GNDA

BTL#

PLAY_MODE

EC_MUTE#

BTL#

PR 37

PL 37

JACK_PLUG 33,37

MIC29 EXT_MIC 37 INT_MIC_R 29,36

EC_MUTE#31,33

HP_L29

HP_R29

INT_MIC_L 29,36

SPKL+O 31

SPKR+O 31

HP_L_SWDJ31

HP_R_SWDJ31

VOLUME31,33

PLAY_MODE 23

AMP_LEFT29

AMP_RIGHT29

JACKCTL33

BTL# 31

+5VAMP

+3VALW

+MIC1_VREFO_L +MIC2_VREFO

+5VAMP

+3VS

+3VS

+MIC2_VREFO

+5VALW +5VAMP

+5VAMP

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

IGT30 LA-3571P

0.1

AMP & Audio Jack

Custom

30 47Tuesday, December 26, 2006

2006/08/04 2006/10/06

Compal Electronics, Inc.

W=40mil

HEADPHONE

INT MICEXT MIC

(0.65V -> 10dB)

Reserve the 0 ohm resistor.

for voltage filtering

RST

EC_MUTE 12sec

DOS mode

DOS mode Window mode

RST

EC_MUTE 12sec

Driver initial

DOS mode

ACPI

INT MIC

L12 FBM-11-160808-601-T_0603

1 2

U19

APA2068KAI-TRL_SOP16

VOLUME

7

LOUT+ 11

ROUT+ 14

LIN-

6

RIN-

3

VDD

10

GND 5

MUTE 1

VOLMAX

8ROUT- 16

LOUT- 9

BYPASS

4

SE/BTL#

13

SHUTDOWN# 2

GND 12

VDD

15

C486 1U_0603_10V4Z

1 2 L28 FBMA-L11-160808-121LMT_0603

1 2

R652 0_0402_5%

NOSWDJ@

1 2

S

G

D

Q89

SI3445DV_TSOP6

3

6

2

4 5

1

C244

47P_0402_50V8J@

1

2

R361

0_0603_5%

12

C729

47P_0402_50V8J

1

2

R667

3K_0402_5%

12

U17

MAX4411ETP+T_TQFN20~N

C1P

1

PGND

2

C1N

3

NC-4 4

PVss

5

NC-6 6

SVss

7

NC-8 8

OUTL 9

SVDD 10

INR

15

SHDNR#

14

INL

13

NC-12 12

OUTR 11

NC-20 20

PVDD 19

SHDNL#

18

SGND

17

NC-16 16

C866

10U_0805_10V4Z

1

2

R653

10K_0402_5%

SWDJ@

12

R359 0_0402_5%

NOSWDJ@

1 2

C474

0.1U_0402_16V4Z

1

2

C696

1U_0603_10V4Z

1

2

R362

10K_0402_5%

@

1 2

R369

1.5K_0402_1%

NOSWDJ@

12

C491

4.7U_0805_10V4Z

1

2

R666

1K_0402_5%

12

C245

47P_0402_50V8J@

1

2

C497

47P_0402_50V8J

1

2

L11 0_0603_5%

1 2

G

D

S

Q99

2N7002_SOT23

SWDJ@

2

13

R368

10K_0402_5%

NOSWDJ@

1 2

R371 10K_0402_5%

1 2

R372 0_0402_5%

1 2

C865

10U_0805_10V4Z

1

2

R663 47_0402_5%

1 2

R914

10K_0402_5%

SWDJ@

1 2

D39 RB751V_SOD323

SWDJ@

21

R376 10K_0402_5%

1 2

L9 0_0603_5%

1 2

R377 0_0402_5%

1 2

R662 47_0402_5%

1 2

C483

4.7U_0805_10V4Z

1

2

JP20

E&T_3802-E04N-01R

1

1

2

2

3

3

4

4

G1

5

G1

6

C856

47P_0402_50V8J

1

2

R868 0_0402_5%

SWDJ@

1 2

C478

1U_0603_10V4Z

1

2

R665

1K_0402_5%

12

C247

47P_0402_50V8J@

1

2

C731

47P_0402_50V8J

1

2

C246

47P_0402_50V8J@

1

2

R378 10K_0402_5%

1 2

C867

0.1U_0402_16V4Z

1

2

R664

3K_0402_5%

12

C723

47P_0402_50V8J

1

2

L7 0_0603_5%

1 2

L27 FBMA-L11-160808-121LMT_0603

1 2

R854

3K_0402_5%

12

L8 0_0603_5%

1 2

USB_ON

EC_IDERST1

MUTE_AMP_1

WIN2

AMP_OFF#1 EC_MUTE#

VOLMAX

VOL_AMP

WOOFER+

WOOFER-WOOF-

WOFF+

WIN1

BTL#

MIX_OUT

MIX_OUT

WOOFER+

WOOFER- WO+

WO-

MIX_OUTLFE_OUT

+AUD_VREF_LF

LFE_OUT

EC_IDERST1

USB_OC#0 21

USB_ON33,37

USB20_P021 USB20_N021

LFE_OUT 29

EC_IDERST129

HP_L_SWDJ 30

HP_R_SWDJ 30

SPKL+O30

SPKR+O30

VOLUME30,33

LFE_OUT29

EC_MUTE# 30,33

INT_CD_L23,29

INT_CD_R23,29

BTL#30

+USB_VCCA

+USB_VCCA

+5VALW

+5VALW

+5VALW

+5VAMP

+5VALW

+5VAMP

+5VALW

+5VAMP

+5VAMP

+3VALW

+5VAMP

+5VAMP

+5VAMP

+5VAMP

+AUD_VREF_LF

+AUD_VREF_LF

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

IGT30 LA-3571P

0.1

Bluetooth & USB CONN.

Custom

31 47Tuesday, December 26, 2006

2006/08/04 2006/10/06

Compal Electronics, Inc.

USB Port

For EMI

DIRECT PLAY PATH

POWER ON PATH

SWDJ

(0.65V -> 10dB) W=40mil

SubWoofer Conn.

30mil

WOOFER@

10mil

20mil

Fc(LPF)= 1.5KHz

Gain = 3.1dB

SUBWOOFER (Reserved for C38)

C817 0.1U_0402_16V4Z

1 2

C863

1U_0603_10V4Z

SWDJ@

1 2

U75A

SN74HCT4066PW_TSSOP14

SWDJ@

A

1B2

P14

G

7

C

13

R863

1M_0402_5%

SWDJ@

12

R879 10K_0402_5%

@

1 2

C872

4.7U_0805_10V4Z

1

2

R861

1M_0402_5%

SWDJ@

12

L51 FBMA-L11-160808-700LMT_0603

1 2

R875 0_0402_5%

1 2

R864

1M_0402_5%

SWDJ@

12

C860

1U_0603_10V4Z

SWDJ@

1 2

C864

1U_0603_10V4Z

SWDJ@

1 2

R858

1M_0402_5%

SWDJ@

12

D1

PSOT24C_SOT23@

2

3

1

R880 0_0402_5%

1 2

U76

APA2068KAI-TRL_SOP16

VOLUME

7

LOUT+ 11

ROUT+ 14

LIN-

6

RIN-

3

VDD

10

GND 5

MUTE 1

VOLMAX

8ROUT- 16

LOUT- 9

BYPASS

4

SE/BTL#

13

SHUTDOWN# 2

GND 12

VDD

15

U75D

SN74HCT4066PW_TSSOP14

SWDJ@

A

8B9

P14

G

7

C

6

R871

1.5K_0402_1%

NOSWDJ@

12

C818

1U_0603_10V4Z

1 2

R810

100K_0402_5%

12

C820

0.1U_0603_50V4Z 1

2

JP21

SUYIN_020173MR004S558ZL

ME@

1

1

2

2

3

3

4

4

GND

5

GND

6

GND

7

GND

8

R860

1M_0402_5%

SWDJ@

12

R872

10K_0402_5%

@

1 2

R808

100K_0402_5%

1 2

C821 100P_0402_50V8J

@

1 2

R882

0_0402_5%

@

1 2

C862

0.1U_0402_16V4Z

SWDJ@

12

L60 0_0603_5%

1 2

U75B

SN74HCT4066PW_TSSOP14

SWDJ@

A

11 B10

P14

G

7

C

12

R862 0_0402_5%

@

1 2

R869

10K_0402_5%

NOSWDJ@

1 2

C861

1U_0603_10V4ZSWDJ@

1 2

R809

100K_0402_5%

12

R876

0_0402_5%

@

1 2

C338 0.1U_0402_16V4Z

12

R811

100K_0402_5%

12

C871

1U_0603_10V4Z

SWDJ@

1 2

R865 0_0402_5%

@

1 2

U72A

TLV2462CDR_SO8

+

3

-

2O1

P8

G

4

C814 1U_0603_10V4Z

1 2

R859

1M_0402_5%

SWDJ@

12

C870

1U_0603_10V4Z

SWDJ@

1 2

C822

1U_0603_10V4Z

1

2

R877 0_0402_5%

1 2

JP75

MOLEX_53780-0270

ME@

1

1

2

2

GND

3

GND

4

R807

560_0402_5%

12

R917

0_0402_5% SWDJ@

1 2

R874 10K_0402_5%

1 2

R873

0_0402_5% SWDJ@

1 2

R881

0_0402_5% SWDJ@

1 2

U4

G545C1P1U_SO8

GND

1

IN

2

FLG 5

OUT 6

OUT 8

IN

3

EN#

4

OUT 7

R806

560_0402_5%

12

C816 0.1U_0603_50V4Z

1 2

C336

1000P_0402_50V7K@

1

2

U75C

SN74HCT4066PW_TSSOP14

SWDJ@

A

4B3

P14

G

7

C

5

C868

0.1U_0402_16V4Z

1

2

U72B

TLV2462CDR_SO8

+

5

-

6O7

P8

G

4

+

C565

150U_D_6.3VM

1

2

C266

0.1U_0402_16V4Z

1

2

L50 FBMA-L11-160808-700LMT_0603

1 2

R870 0_0402_5%

SWDJ@

1 2

C275

1000P_0402_50V7K

1

2

C815 1U_0603_10V4Z

1 2

C869

4.7U_0805_10V4Z

1

2

L61 0_0603_5%

1 2

C819

0.22U_0603_10V7K

12

R878 0_0402_5%

NOSWDJ@

1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PCI_RST#

LPC_AD0

LPC_AD3

LPC_DRQ#0

LPC_FRAME#

LPC_AD2

LPC_AD1

SIRQ

ON/OFF

EC_ON

LPC_AD[0..3]

ON/OFFBTN#

KSI[0..7]

KSO[0..15]

KSI4

KSO1

KSO6

KSI0

KSI3

KSI7

KSI1

KSO12

KSO13

KSO3

KSO7

KSI6

KSO0

KSO9

KSO10

KSO4

KSO2

KSO5

KSO15

KSO11

KSI2

KSO14

KSO8

KSI5

51ON#

KSI7

KSI1

KSO9

KSI6

KSO6

KSO12

KSO13

KSO3

KSO7

KSO10

KSO4

KSO2

KSO15

KSO11

KSO14

KSO8

KSI4

KSO0

KSI2

KSI5

KSI3

KSO5

KSI0

KSO1

RCIRRX

PCI_RST# 19,28,33

LPC_DRQ#0 20

LPC_AD[0..3] 20,33

CLK_PCI_DB 15

SIRQ 21,28,33

LPC_FRAME# 20,33

EC_ON33,40

ON/OFF# 33

51ON# 36,39

CLK_14M_SIO 15

KSO[0..15] 33

KSI[0..7] 33,36

ON/OFFBTN#36

KILL_SW#33

RCIRRX33

+3VS

+5VS

+3VALW

+3VALW

+5VS

+5VALW

+3VS

+3VALW

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

IGT30 LA-3571P

0.1

KBD,ON/OFF,T/P,LED/B,DEBUG

Custom

32 47Monday, December 25, 2006

2006/08/04 2006/10/06

Compal Electronics, Inc.

FOR LPC SIO DEBUG PORT

Power BTN

INT_KBD CONN.( TYPE "D" KB)

CIR

KILL_SW#

Kill Switch

R622

10K_0402_5%

12

C185 100P_0402_50V8J@1 2

R255

100K_0402_5%

12

C182 100P_0402_50V8J@1 2

C193 100P_0402_50V8J@1 2

SW1

SMT1-05_4P

3

2

1

4

5

6

R817 100_0603_5%

TV@

1 2

Q18

DTC124EK_SC59

2

13

C175 100P_0402_50V8J@1 2

C826

4.7U_0805_10V4Z

1

2

C187 100P_0402_50V8J@1 2

C186 100P_0402_50V8J@1 2

G

D

S

Q19

2N7002_SOT23

2

13

SW3

1BS003-1211L_3P

1

1

2

2

3

3

C379

1000P_0402_50V7K

1

2

IR1

IRM-V538/TR1_3P

TV@

VCC

2

Vout

1

GND

4

GND

3

C174 100P_0402_50V8J@1 2

JP58

ACES_85201-2005

ME@

11

22

33

44

55

66

77

88

99

10 10

11 11

12 12

13 13

14 14

16 16

17 17

18 18

15 15

20 20

19 19

C169 100P_0402_50V8J@1 2

C178 100P_0402_50V8J@1 2

C194 100P_0402_50V8J@1 2

SW2

SMT1-05_4P

3

2

1

4

5

6

R261 33K_0402_5%

1 2

R818 100_0603_5%

@

1 2

R816 10K_0402_5%

1 2

C827

22P_0402_50V8J

TV@

1

2

C184 100P_0402_50V8J@1 2

C196 100P_0402_50V8J@1 2

C189 100P_0402_50V8J@1 2

D6

RLZ20A_LL34

12

D7

DAN202U_SC70

2

3

1

JP26

ACES_85202-2405

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

C191 100P_0402_50V8J@1 2

C197 100P_0402_50V8J@1 2

C177 100P_0402_50V8J@1 2

R819

33_0402_5%

TV@

1 2

C176 100P_0402_50V8J@1 2

C171 100P_0402_50V8J@1 2

C195 100P_0402_50V8J@1 2

C173 100P_0402_50V8J@1 2

C192 100P_0402_50V8J@1 2

R256

4.7K_0402_5%

12

C183 100P_0402_50V8J@1 2

R888

100_0603_5%

NOTV@

1 2

C188 100P_0402_50V8J@1 2

C172 100P_0402_50V8J@1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

EC_RST#

KSO3

KSI[0..7]

KSO[0..15]

EC_PME#

KSO17

EC_SMB_DA1

EC_SMB_CK1

EC_SMB_DA2

EC_SMB_CK2

EC_TX_P80_DATA

EC_RX_P80_CLK

ICH_POK

TP_DATA

XCLKI

ECAGND

BRD_ID

ECAGND

EC_MUTE#

XCLKO

TP_CLK

ICH_POK_EC

ACOFF

FAN_SPEED1

ENLAN1

KSO17

KSO3

KSO0

KSO1

KSO2

KSO4

KSO5

KSO6

KSO7

KSO8

KSO9

KSO10

KSO11

KSO12

KSO13

KSO14

KSO15

KSO16

EC_SMB_DA2

EC_SMB_CK1

EC_SMB_DA1

EC_SMB_CK2

PM_SLP_S5#

EC_SMI#

SUSP#

PBTN_OUT#

BATT_TEMP

FSEL#SPICS#

IREF

DAC_BRIG

EN_FAN1

BATT_OVP

TP_DATA

TP_CLK

BRD_ID

LPC_AD2

LPC_AD1

LPC_AD3

LPC_AD0

LID_SWITCH#

EC_LID_OUT#

EC_SCI#

CHARGE_LED0#

CHARGE_LED1#

CAPS_LED#

EC_TX_P80_DATA

EC_RX_P80_CLK

SYSON

XCLKO

ECAGND

XCLKI

FWR#SPI_SI

FRD#SPI_SO

EC_THERM#

EC_ON

SPI_PULLDOWN

BKOFF#

KSI0

SPI_CLK

EC_PME#

INVT_PWM

KSI1

KSI2

KSI3

KSI4

KSI5

KSI6

KSI7

BEEP#KB_RST#R

BATT_TEMP

JACK_DETECT

CHIP_ID

CHIP_ID

PCI_CLKRUN#21,28

CLK_PCI_LPC15

KB_RST#20

KSO[0..15]32

R5_PME#28

KSI[0..7]32,36

PCI_PME#19

ECAGND

EC_RST#

MODE_LED#36

EN_WOL 24

EN_WOL 24

USB_ON 31,37

ICH_POK 7,21

USB_ON31,37

JACK_PLUG 37

CMOS_OFF# 36

EC_SMB_CK134,46

EC_SMB_DA24

EC_SMB_DA134,46 EC_SMB_CK24

NUM_LED#36 PWR_LED#36

SLP_S3#21 SLP_S5#21 EC_SMI#21

SUSP#18,23,26,28,29,35,42,43,44

PBTN_OUT#21

GATEA2020

SIRQ21,28,32

LPC_FRAME#20,32

LPC_AD220,32 LPC_AD120,32

LPC_AD320,32

LPC_AD020,32

PCI_RST#19,28,32

EC_SCI#21

EC_RX_P80_CLK13,14 EC_TX_P80_DATA13,14

BATT_OVP 40

DAC_BRIG 16

FSEL#SPICS# 34

BATT_TEMP 46

EN_FAN1 4

IREF 40

TP_DATA 37

TP_CLK 37

CHARGE_LED1# 36

CAPS_LED# 36

CHARGE_LED0# 36

SYSON 26,35,42

EC_RSMRST# 21

EC_THERM#4,21 EC_PME#

EC_ON 32,40

ACIN 21,39

VR_ON 45

FSTCHG 40

RF_OFF# 27

ON/OFF#32

BKOFF# 16

SPI_CLK 34

INVT_PWM 16

BEEP# 29

ACOFF 39,40

FAN_SPEED14

LID_SWITCH#36

EC_LID_OUT# 21

ECAGND

TP_LOCK_LED# 36

EC_SWI#

MODE# 36

SLP_S4# 21

FWR#SPI_SI 34

FRD#SPI_SO 34

EAPD 29

BT_OFF# 27

CD_PLAY 23,29

SCROLL_LED# 36

RCIRRX 32

KILL_SW# 32

ENBKL 16

KSO1636 KSO1736

XCLKI

XCLKO

NOVO_IN# 36

EC_MUTE# 30,31

PCMRST# 23

ADP_I 40

BRD_ID

JACKCTL30

VOLUME 30,31

EC_IDERST 29

BATT_IN 46

STB_SB# 35

+3VALW

+3VALW

+3VALW +EC_AVCC

+3VALW

+5VALW

+3VS

+3VALW

+3VS

+3VALW

+5VS

+3VS

+EC_AVCC

+3VALW

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

IGT30 LA-3571P 0.1

ENE-KB925

Custom

33 47

Tuesday, December 26, 2006

2006/08/04 2006/10/06

Compal Electronics, Inc.

ISP MODE SUPPOR

EC DEBUG PORT

VabR578(Rb)

5

4

3

2

1

Analog Board ID definition,

Please see page 3.

0

BRD ID

KB925 SPI STRAP PIN

8.2K

0

R119(Ra)=100K Ohm

ID

7

62.20V

1.65V

1.19V

0.82V

0.50V

0.25V

0V

NC

200K

100K

56K

R03 (PVT)

33K

R01 (EVT)

18K

R02 (DVT)

3.30V

R10A (MP)

R223 0_0402_5%@

1 2

C397

1000P_0402_50V7K

1

2

C415

100P_0402_50V8J@

1

2

JP59

ACES_85205-0400

ME@

1

1

2

2

3

3

4

4

C417

100P_0402_50V8J@

1

2

R311 10K_0402_5%@

1 2

R317 4.7K_0402_5%

1 2

R279

10K_0402_5%

1 2

C437

0.1U_0402_16V4Z

1

2

RB751V_SOD323

D9

2 1

C431

0.1U_0402_16V4Z

1

2

R893 0_0402_5%

1 2

R338

20M_0603_5%@1 2

C381 0.01U_0402_16V7K

12

R294

0_0402_5%

@

1 2

R574

100K_0402_1%

1 2

C439

0.1U_0402_16V4Z

1

2

C443

15P_0402_50V8J

C398

0.1U_0402_16V4Z

1

2

C621

0.1U_0402_16V4Z

1

2

R276 4.7K_0402_5%

1 2

LPC & MISC

Int. K/B

Matrix

SM Bus

GPIO

GPIO

AD Input

PWM Output

DA Output

PS2 Interface

SPI Device Interface

SPI Flash ROM

GPO

GPI

U20

KB926QFA1_LQFP128

GA20/GPIO00

1

KBRST#/GPIO01

2

SERIRQ#

3

LFRAME#

4

LAD3

5

PM_SLP_S3#/GPIO04

6

LAD2

7

LAD1

8

VCC 9

LAD0

10

GND

11

PCICLK

12

PCIRST#/GPIO05

13

PM_SLP_S5#/GPIO07

14

EC_SMI#/GPIO08

15

LID_SW#/GPIO0A

16

SUSP#/GPIO0B

17

PBTN_OUT#/GPIO0C

18

EC_PME#/GPIO0D

19

SCI#/GPIO0E

20

INVT_PWM/PWM1/GPIO0F 21

VCC 22

BEEP#/PWM2/GPIO10 23

GND

24

EC_THERM#/GPIO11

25

FANPWM1/GPIO12 26

ACOFF/FANPWM2/GPIO13 27

FAN_SPEED1/FANFB1/GPIO14

28

FANFB2/GPIO15

29

EC_TX/GPIO16

30

EC_RX/GPIO17

31

ON_OFF/GPIO18

32

VCC 33

PWR_LED#/GPIO19

34

GND

35

NUMLED#/GPIO1A

36

ECRST#

37

CLKRUN#/GPIO1D

38

KSO0/GPIO20

39

KSO1/GPIO21

40

KSO2/GPIO22

41

KSO3/GPIO23

42

KSO4/GPIO24

43

KSO5/GPIO25

44

KSO6/GPIO26

45

KSO7/GPIO27

46

KSO8/GPIO28

47

KSO9/GPIO29

48

KSO10/GPIO2A

49

KSO11/GPIO2B

50

KSO12/GPIO2C

51

KSO13/GPIO2D

52

KSO14/GPIO2E

53

KSO15/GPIO2F

54

KSI0/GPIO30

55

KSI1/GPIO31

56

KSI2/GPIO32

57

KSI3/GPIO33

58

KSI4/GPIO34

59

KSI5/GPIO35

60

KSI6/GPIO36

61

KSI7/GPIO37

62

BATT_TEMP/AD0/GPIO38 63

BATT_OVP/AD1/GPIO39 64

ADP_I/AD2/GPIO3A 65

AD3/GPIO3B 66

AVCC 67

DAC_BRIG/DA0/GPIO3C 68

AGND

69

EN_DFAN1/DA1/GPIO3D 70

IREF/DA2/GPIO3E 71

DA3/GPIO3F 72

CIR_RX/GPIO40 73

CIR_RLC_TX/GPIO41 74

AD4/GPIO42 75

SELIO2#/AD5/GPIO43 76

SCL1/GPIO44

77

SDA1/GPIO45

78

SCL2/GPIO46

79

SDA2/GPIO47

80

KSO16/GPIO48

81

KSO17/GPIO49

82

PSCLK1/GPIO4A 83

PSDAT1/GPIO4B 84

PSCLK2/GPIO4C 85

PSDAT2/GPIO4D 86

TP_CLK/PSCLK3/GPIO4E 87

TP_DATA/PSDAT3/GPIO4F 88

FSTCHG/SELIO#/GPIO50 89

BATT_CHGI_LED#/GPIO52 90

CAPS_LED#/GPIO53 91

BATT_LOW_LED#/GPIO54 92

SUSP_LED#/GPIO55 93

GND

94

SYSON/GPIO56 95

VCC 96

SDICS#/GPXOA00 97

SDICLK/GPXOA01 98

SDIDO/GPXOA02 99

EC_RSMRST#/GPXO03 100

EC_LID_OUT#/GPXO04 101

EC_ON/GPXO05 102

EC_SWI#/GPXO06 103

ICH_PWROK/GPXO06 104

BKOFF#/GPXO08 105

WL_OFF#/GPXO09 106

GPXO10 107

GPXO11 108

SDIDI/GPXID0 109

PM_SLP_S4#/GPXID1 110

VCC 111

ENBKL/GPXID2 112

GND

113

GPXID3 114

GPXID4 115

GPXID5 116

GPXID6 117

GPXID7 118

SPIDI/RD# 119

SPIDO/WR# 120

VR_ON/XCLK32K/GPIO57 121

XCLK1

122

XCLK0

123 V18R 124

VCC 125

SPICLK/GPIO58 126

AC_IN/GPIO59 127

SPICS# 128

R231 4.7K_0402_5%@

12

R321 4.7K_0402_5%

1 2

C425

1000P_0402_50V7K

1

2

R578

56K_0402_5%

1 2

R915

100K_0402_1%

UMA@

1 2

R336 4.7K_0402_5%

1 2

C413

1000P_0402_50V7K

1

2

R281 0_0402_5%

1 2

X1

32.768KHZ_12.5P_1TJS125BJ2A251

OUT 4

IN 1

NC

3

NC

2

R855 10K_0402_5%

@

1 2

R285 0_0402_5%@

1 2

L6 FBM-11-160808-601-T_0603

1 2

C422

22P_0402_50V8J@

12

R897 10K_0402_5%

1 2

R224 47K_0402_5%

1 2

R275 4.7K_0402_5%

1 2

L5

FBM-11-160808-601-T_0603

1 2

R883 0_0402_5%

1 2

C382

0.1U_0402_16V4Z

1

2

C442

15P_0402_50V8J

R916

10K_0402_5%

VGA@

1 2

R898

0_0402_5%

1 2

R282 4.7K_0402_5%

1 2

C377

0.1U_0402_16V4Z

1

2

R288 4.7K_0402_5%

1 2

R298 10K_0402_5%@

1 2

R312 10_0402_5%@12

RB751V_SOD323D37

@

21

SPI_SIFWR#SPI_SI

SPI_CLK

SPI_SO

FSEL#SPICS#

SPI_CLK_R

SPI_CS#

SPI_SO

SPI_SI

SPI_CLK_R

SPI_CS#

SPI_CLK_R

EC_SMB_CK133,46 EC_SMB_DA133,46

FWR#SPI_SI33

FSEL#SPICS#33

SPI_CLK33

FRD#SPI_SO 33

+5VALW

+5VALW

+3VALW

+3VALW

+3VALW

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

IGT30 LA-3571P

0.1

BIOS & EC I/O Port

Custom

34 47Monday, December 25, 2006

2006/08/04 2006/10/06

Compal Electronics, Inc.

SPI Flash (8Mb*1)

20mils

C879

22P_0402_50V8J

1

2

R617 15_0402_5%

12

U7

AT24C16AN-10SU-2.7_SO8

A0 1

A1 2

SDA

5SCL

6

VCC

8

A2 3

GND 4

WP

7

C364

0.1U_0402_16V4Z

1 2 R215

100K_0402_1%

12

R221

100K_0402_1%

12

C658

0.1U_0402_16V4Z

1 2

R611 15_0402_5%

12

JP11

E&T_2941-G08N-00E~D

ME@

1

122

3

344

5

566

7

788

R885

10K_0402_5%

1 2

R670 15_0402_5%

12

U36

SST25LF080A_SO8-200mil

S

1

VCC

8

Q2

HOLD

7

VSS 4

D

5

C

6

W

3

R613 15_0402_5%

12

R908 33_0402_5% 12

A

A

B

B

C

C

D

D

E

E

F

F

G

G

H

H

I

I

J

J

1 1

2 2

3 3

4 4

5 5

6 6

7 7

8 8

SUSPSYSON

SUSP

SUSP

SUSP

SYSON#

SUSPSUSP

SUSP

RUNON

RUNON

SUSP

RUNON

SUSP

STB_SB#

SUSP

SYSON26,33,42

SUSP#18,23,26,28,29,33,42,43,44

SUSP43

SYSON#

STB_SB#33

+5VALW

+5VALW

+3VALW +3VS

+2.5VS+1.8V

+0.9VS

+5VS

+VSB

+5VALW +5VS

+1.8V +1.8VS

+1.8VS

+VSB

+VSB

+3VS

+1.25VS

RTCVREF

+VSB

+3VALW +3V_SB

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

IGT30 LA-3571P

0.1

DC/DC Circuit

Custom

35 47Monday, December 25, 2006

2006/08/04 2006/10/06

Compal Electronics, Inc.

+5VALW to +5VS Transfer

+3VALW to +3VS Transfer

+1.8V to +1.8VS Transfer

C537

10U_0805_10V4Z

VGA@

1

2

R625

33K_0402_5%

12

G

D

S

Q29

2N7002_SOT23

2

13

C471

0.1U_0402_16V4Z

1

2

C538

0.1U_0402_16V4Z

VGA@

1

2

R339

47K_0402_5%

12

C662

10U_0805_10V4Z

1

2

U16

SI4800DY_SO8

S1

S2

S3

G4

D

8

D

7

D

6

D

5

R495

470_0402_5%

12

G

D

S

Q94

2N7002_SOT23 @

2

13

G

D

S

Q23

2N7002_SOT23

2

13

G

D

S

Q16

2N7002_SOT23

2

13

Q14

DTC124EK_SC59

2

13

C468

10U_0805_10V4Z

1

2

G

D

S

Q6

2N7002_SOT23

2

13

R186

470_0402_5%

12

R903

33K_0402_5%

@

12

R183

10K_0402_5%

@

12

C539

10U_0805_10V4Z

VGA@

1

2

G

D

S

Q5

2N7002_SOT23

VGA@

2

13

J1

PAD-OPEN 3x3m

@

1 2

R856

10K_0402_5%

12

R623 0_0402_5%@

1 2

G

D

S

Q7

2N7002_SOT23

VGA@

2

13

G

D

S

Q37

2N7002_SOT23

2

13

R115

47K_0402_5%

VGA@

1 2

R99

470_0402_5%

VGA@

12

C876

10U_0805_10V4Z

1

2

C875

0.1U_0603_25V7K

@ 1

2

G

D

S

Q25

2N7002_SOT23

2

13

R111

470_0402_5%

12

U37

SI4800DY_SO8

S1

S2

S3

G4

D

8

D

7

D

6

D

5

R114 0_0402_5%@

1 2

R326

470_0402_5%

12

C874

0.1U_0402_16V4Z

1

2

C652

0.1U_0402_16V4Z

1

2

C457

0.1U_0603_25V7K

1

2

C666

0.1U_0603_25V7K

1

2

G

D

S

Q15

2N7002_SOT23

2

13

R191

470_0402_5%

12

Q24

DTC124EK_SC59

2

13

G

D

S

Q22

2N7002_SOT23

2

13

C269

0.1U_0603_25V7K

VGA@

1

2

U25

SI4800DY_SO8

VGA@

S1

S2

S3

G4

D

8

D

7

D

6

D

5

C465

10U_0805_10V4Z 1

2

R333

470_0402_5%

12

U77

SI4800DY_SO8

@

S1

S2

S3

G4

D

8

D

7

D

6

D

5

C667

10U_0805_10V4Z

1

2

R346

22K_0402_5%

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

USB20_N3

USB20_P3

NOVO_BTN#

51ON#

NOVO_BTN# NOVO_IN#

KSO16

KSI1

KSI0

CHARGE_LED1#

CHARGE_LED0#

BTONLED

PWR_LED#

KSO17

DJ_ON

CMOS1

LID_SWITCH# 33

USB20_N321 USB20_P321

KSO1633

51ON# 32,39

NOVO_IN# 33

KSI132,33 KSI032,33 KSO1733 KSI232,33

ON/OFFBTN#32

CHARGE_LED0#33

CHARGE_LED1#33

BTONLED27

PWR_LED#33

WIRELESS_LED#27

3G_LED#27

ODD_LED#23

SATA_LED#20

NUM_LED#33 CAPS_LED#33

SCROLL_LED#33

MODE#33

51ON#32,39

KSO1733 KSO1633 KSI432,33 KSI332,33

INT_MIC_L29,30

INT_MIC_R29,30

MODE_LED#33

TP_LOCK_LED#33

CMOS_OFF#33

+3VALW

+3VALW

+5VS +VCC5_LED+5VALW

+3VALW

+5VALW

+5VALW

+5VS

+3VS

+3VS

+3VS

+5VS

+5VS

+3VALW

+3VALW

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

IGT30 LA-3571P

0.1

INDICATE LED

Custom

36 47Monday, December 25, 2006

2006/08/04 2006/10/06

Compal Electronics, Inc.

CMOS Camera Conn

NOVA_BTN#

Function

KEY Matrix

KSI0

KSI1

KO16 KO17

DW-UP DW-DOWN

DW-ENTER MUTE

Right Switch BD

Dial Wheel

STATUS

AC

Chargin

Low BATT

Blinking Blue

BLUE

Amber

NOVO BTN

C839, C841, C842 For EMI Solution

Left Switch BD(AUDIO DJ)

Blue

Amber

STATUS

AC

Chargin

Low BATT

Blinking Blue

BLUE

Amber

Blue : Power On,

Blinking Blue : Suspend

Wireless / Bluetooth LED

LED Indicator ON M/B

BBB

Amber

Blue

AA

123

( 1 )

( 2 )

( 3 )

BATT_CHG_LED#

BATT_LOW_LED#

CD-ROM

HDD

R392

47K_0402_5%

1 2

C519

0.1U_0402_16V4Z

1

2

G

D

S

Q97

AO3413_SOT23

CMOS@

2

13

R828 0_0402_5%

@

1 2

C830

1000P_0402_50V7K

1 2

R820 150_0402_5%

1 2

R832 220_0402_5%

1 2

LED4

HT-191NB5-DT_BLUE_0603~D

1 2

R391 0_0402_5%

1 2

R907

10K_0402_1%

CMOS@

12

C835

0.1U_0402_16V4Z

1

2

R836470_0402_5%

1 2

R831

100K_0402_5%

@

12

R912

0_0805_5%

1 2

LED1

HT-297UD/NB_BLUE/AMB_0603

21

34

D26

RB751V_SOD323

21

R830

100K_0402_5%

@

12

JP77

ACES_87151-16071

1

1

G17 17

G18 18

2

23

34

45

56

67

78

89

910

10 11

11 12

12 13

13 14

14 15

15 16

16

LED3

HT-191NB5-DT_BLUE_0603~D

1 2

D34 CH751H-40_SC76

21

R833 220_0402_5%

1 2

R887 220_0402_5%

1 2

R393

0_0402_5% 12

U21

A3212ELHLT-T_SOT23W-3

VDD 2

OUTPUT 3

GND

1

C523

0.1U_0402_10V6K

1

2

R823 220_0402_5%

1 2

C8340.1U_0402_16V4Z

1

2

D38

DAN202U_SC70

2

31

R906

0_0805_5%

NOCMOS@

1 2

C521

10P_0402_25V8K

1

2

R661 200_0402_5%

12

R913 150_0402_5%

1 2

D36

DAN202U_SC70

2

3

1

JP42

ACES_88266-05001

ME@

GND2

7GND1

6

1

1

2

2

3

3

4

4

5

5

D35 CH751H-40_SC76

21

JP76

MOLEX_53780-1270

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

GND

13

GND

14

R827 0_0402_5%

1 2

R394

0_0402_5%

12

R835

100K_0402_5%

12

R822 150_0402_5%

1 2

LED5

HT-191NB5-DT_BLUE_0603~D

1 2

R824 150_0402_5%

1 2

R834 220_0402_5%

1 2

Q98

DTC124EK_SC59

CMOS@

2

13

R904

100K_0402_5%

12

R668

100K_0402_5%

12

C880

10U_0805_10V4Z

1

2

R821 220_0402_5%

1 2

LED2

HT-297UD/NB_BLUE/AMB_0603

21

34

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

EDID_DAT_LCD

EDID_CLK_LCD

LVDSBC+

LVDSBC-

LVDSB0+

LVDSB0-

LVDSB1+

LVDSB1-

LVDSB2+

LVDSB2-LVDSA2-

LVDSA2+

LVDSA1-

LVDSA1+

LVDSA0+

LVDSA0-

LVDSAC+

LVDSAC-

JACK_PLUG

PL

PR

SDCLK_MSCLKXDCD#

MSCD#_XDCD1

XDWP#

SDWP#_XDRB#

XD_CE#

SDDATA0_MSDATA0

SDDATA3_MSDATA3

SDCMD_MSBS

SDCLK_MSCLK

XDD7

XDD4

XDCLE

XDD6

XDD5

XDALE

SDDATA0_MSDATA0

SD_MSDATA1

SDDATA3_MSDATA3

SD_MSDATA2

SDDATA0_MSDATA0

SDDATA3_MSDATA3

SDCMD_MSBS

SDCD#_XDCD0#

SDWP#_XDRB#

SDCMD_MSBS

MSCLK

SDCLK_MSCLKSDCLK

SDDATA2_MSDATA2

SDDATA1_MSDATA1

SDDATA1_MSDATA1

SDDATA2_MSDATA2

USB_ON

USB20_N4

USB20_P4

EXT_MIC

JACK_PLUG_MIC

SPDIF

PL

PR

TP_DATA

TP_CLK

JACK_PLUG

USB20_P2

USB20_N2

JACK_PLUG_MIC

EXT_MICSPDIF

EDID_CLK_LCD 9

EDID_DAT_LCD 9

LVDSB0- 9

LVDSB1+ 9

LVDSB0+ 9

LVDSB1- 9

LVDSB2- 9

LVDSBC- 9

LVDSB2+ 9

LVDSBC+ 9

LVDSA2-9 LVDSA2+9

LVDSA1-9

LVDSA1+9

LVDSA0+9

LVDSA0-9

LVDSAC+9

LVDSAC-9

USB_OC#2 21

USB_OC#4 21

SDDATA0_MSDATA0 28

SD_MSDATA1 28

SD_MSDATA2 28

SDDATA3_MSDATA3 28

SDDATA0_MSDATA0 28

SDDATA3_MSDATA3 28

SDDATA0_MSDATA028

SDDATA3_MSDATA328 XDD428 XDD528 XDD628 XDD728 SDCMD_MSBS 28

SDCD#_XDCD0# 28

SDCMD_MSBS 28

MSCD#_XDCD1 28

SDWP#_XDRB#28

SDCMD_MSBS28 XDWP#28 XDALE28

XD_CE#28 XDCLE28

SDCLK_MSCLK 28

SDWP#_XDRB# 28

XDCD#28

SDDATA1_MSDATA1 28

SDDATA2_MSDATA2 28

SDDATA1_MSDATA128 SDDATA2_MSDATA228

USB_ON31,33

EXT_MIC30

JACK_PLUG_MIC29 SPDIF29

PL30

PR30

TP_DATA 33

TP_CLK 33

JACK_PLUG33

JACK_PLUG_CODEC29 USB20_P421 USB20_N421

USB20_N221 USB20_P221

+LCDVDD +3VS

+USB_VCCB

+USB_VCCB

+VCC_4IN1_XD +VCC_4IN1

+5VALW

+5VS

+3VALW

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

IGT30 LA-3571P

0.1

INDICATE LED

Custom

37 47Monday, December 25, 2006

2006/08/04 2006/10/06

Compal Electronics, Inc.

(60 MIL)

UMA LCD/PANEL Conn.

Audio Jack/USB Conn.

4 in 1 Card Reader

T/P Board

C512

470P_0402_50V8J

1 2

JP6

ACES_88107-30001

ME@

GND

31 GND 32

1

116 16

2

217 17

3

318 18

4

419 19

5

520 20

6

621 21

7

722 22

8

823 23

9

924 24

10

10 25 25

11

11 26 26

12

12 27 27

13

13 28 28

14

14 29 29

15

15 30 30

C515

470P_0402_50V8J

1 2

R895 0_0402_5%

NOSWDJ@

1 2

C878

470P_0402_50V8J

1 2

R649 22_0402_5%

1 2

JP70

ACES_87151-0807G

ME@

11

22

33

44

55

66

77

88

9

9

10

10

C

BE

Q91

MMBT3906_SOT23

SWDJ@

1

2

3

C837

0.1U_0402_16V4Z

1

2

R894

2.2K_0402_5%

SWDJ@

12

4 IN 1 CONN

JP12

TAITW_R012-210-LR

XD-WP

31

XD-D4

37

MS-DATA3 7

MS-DATA0 4

SD-DAT2 11

SD-DAT0 19

SD-CMD 13

MS-DATA1 3

XD-D6

39 SD-DAT3 12

SD-DAT1 20

SD-GND 17

XD-ALE

29

XD-D0

33

SD_CLK 16

XD-D2

35

SD-WP-COM 44

MS-INS 6

MS-DATA2 5

MS-SCLK 8

XD-RE

26

MS-BS 2

XD-D5

38

MS-GND 10

XD-D7

40

XD-D1

34

XD-CE

27

XD-R/B

25

XD-D3

36

SD-GND 14

XD-WE

30

MS-VCC 9

XD-GND

32

XD-CLE

28

XD-GND

24

SD-VCC 15

SD-CD-COM 22

XD-VCC

41

XD-CD

23

SD-CD-SW 21

SD-WP-SW 43

MS-GND 1

N.C.

18

N.C.

42

SHIELD GND

45

SHIELD GND

46

C513

470P_0402_50V8J

1 2

C517 0.1U_0402_16V7K

@

C514

470P_0402_50V8J

1 2

+

C836

150U_D_6.3VM

1

2

JP27

ACES_87213-2000

ME@

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

R651 22_0402_5%

1 2

U15

G545A1P1U_SO8

GND

1

IN

2

FLG 5

OUT 6

OUT 8

IN

3

EN#

4

OUT 7

C476

1000P_0402_50V7K@

1

2

C838

1000P_0402_50V7K

1

2

C516

470P_0402_50V8J

1 2

C518 0.1U_0402_16V7K

@

C464 0.1U_0402_16V4Z

12

A

A

B

B

C

C

D

D

E

E

F

F

G

G

H

H

I

I

J

J

1 1

2 2

3 3

4 4

5 5

6 6

7 7

8 8

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

IGT30 LA-3571P

0.1

Hole

Custom

38 47Monday, December 25, 2006

2006/08/04 2006/10/06

Compal Electronics, Inc.

EC

ICH_POK

NB

PWROK

IMVP VGATE

VRMPWRGD

ICH8

VR_ON

CK_PWRGD

CK505

PWROK

FD2

1

FM9

1

H28

HOLEA

1

H2

HOLEA

1

H3

HOLEA

1

H30

HOLEA

1

H31

HOLEA

1

FD4

1

FM2

1

H6

HOLEA

1

FD5

1

H17

HOLEA

1

H25

HOLEA

1

H5

HOLEA

1

FM7

1

H23

HOLEA

1

H27

HOLEA

1

H19

HOLEA

1

H8

HOLEA

1

H24

HOLEA

1

H11

HOLEA

1

FM1

1

H9

HOLEA

1

FM4

1

H1

HOLEA

1

H21

HOLEA

1

H4

HOLEA

1

FD3

1

H29

HOLEA

1

H7

HOLEA

1

H18

HOLEA

1

FD1

1

FM5

1

FM6

1

H26

HOLEA

1

H12

HOLEA

1

FM11

1

H13

HOLEA

1

FM3

1

M2

HOLEA

1

CL1

CLIP

1

FM8

1

H15

HOLEA

1

FD6

1

H16

HOLEA

1

H14

HOLEA

1

A

A

B

B

C

C

D

D

1 1

2 2

3 3

4 4

PRG++

CHGRTCP

PACIN

ACOFF33,40

ACON40

MAINPWON41,46

PACIN 40

51ON#32,36

PACIN 40

ACIN 21,33

PRECHG40

+CHGRTC

B+

RTCVREF

VIN

VL

VS

+5VALWP

RTCVREF

BATT+

VIN

VIN

RTCVREF

VS

VIN

ADPIN

VS

VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

0.1

DCIN/DETECTOR

B

39 47Monday, December 25, 2006

2006/08/04 2006/10/06

Compal Electronics, Inc.

3.3V

Precharge detector

Min. typ. Max.

H-->L 13.843V 14.247V 14.636V

L-->H 14.936V 15.381V 15.814V

ACIN BATT ONLY

L-->H 7.196V 7.349V 7.505V

Precharge detector

Min. typ. Max.

H-->L 6.138V 6.214V 6.359V

Vin Detector

High 18.135 17.566 17.011

Low 14.866 14.355 14.063

3.3V

PD5

RLS4148_LLDS2

12

PR11

10K_0402_5%

1 2

PR15

10K_0402_1%

12

PU2

G920AT24U_SOT89

IN 2

GND

1

OUT

3

PR7

100K_0402_5%

12

PR20

68_1206_5%

12

PC12

0.22U_1206_25V7K

12

PR13

100K_0402_5%

12

PR9

10K_0805_5%

12

PD4

RLS4148_LLDS2

1 2

PQ3

DTC115EUA_SC70-3

2

13

PR4

1K_1206_5%

1 2

PD1

RLZ24B_LL34

12

PQ4

TP0610K-T1-E3_SOT23

2

13

PU1B

LM393DT_SO8

+5

-6

O

7

P8

G

4

PC1

560P_0402_50V7K

12

PR8

1K_1206_5%

1 2

PR3

1K_1206_5%

1 2

PC7

0.01U_0402_25V7K

12

PC6

0.1U_0402_16V7K

12

PC9

1000P_0402_50V7K

12

PR30

66.5K_0402_1%

@

12

PR10

82.5K_0402_1%

12

PC2

100P_0402_50V8J

12

PR28

10K_0402_5%

12

PC8

0.1U_0603_25V7K

12

PR16

10K_0402_1%

12

PR6

100K_0402_5%

12

PR23

200_0805_5%

12

PR26

100K_0402_5%

12

PQ1

TP0610K-T1-E3_SOT23

2

13

PR14

24.9K_0402_1%

12

PC11

4.7U_0805_6.3V6K

12

PD2

RLS4148_LLDS2

12

PR276

68_1206_5%

12

PR27

22K_0402_1%

1 2

PC4

560P_0402_50V7K

12

PQ2

DTC115EUA_SC70-3

2

13

PJP1

JST_B4B-EH-A(LF)(SN)@

11

33

44

22

PD6

RB715F_SOT323

2

31

PR18

499K_0402_1%

12

PQ6

DTC115EUA_SC70-3

2

13

PC13

0.1U_0603_25V7K

12

PC131

0.01U_0402_25V7K@

1 2

PR25

499K_0402_1%

12

PR29

47K_0402_5%

12

PR175

10K_0402_1%@

1 2

PU1A

LM393DT_SO8

+

3

-

2O1

P8

G

4

PC191

0.01U_0402_25V7K

12

PR12

215K_0402_1%

1 2

PC3

100P_0402_50V8J

12

PR271

200K_0402_1%

12

PR19

100K_0402_1%

12

PC10

1U_0805_25V4Z

12

PR5

1M_0402_1%

1 2

PR21

560_0603_5%

1 2

PR17

2.2M_0402_5%

12

PR22

560_0603_5%

1 2

PR24

205K_0402_1%

12

PR2

1K_1206_5%

1 2

PR1

10_1206_5%

12

PL2

HCB4532KF-800T90_1812

1 2

PD3

RLZ4.3B_LL34

12

PC5

0.068U_0603_25V7M

12

G

D

S

PQ5

RHU002N06_SOT323

2

13

PF1

12A_65V_451012MRL

2 1

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

MB39A126

MB39A126

LXCHRG

CS

CS

MB39A126

ACON

ACON39

BATT_OVP33

IREF 33

FSTCHG33

PRECHG 39

ADP_I33

ACOFF33,39

FSTCHG 33

EC_ON 32,33

ACON 39

PACIN39

PACIN 39

ACOFF 33,39

B+

CHG_B+

VIN

BATT+

P2

BATT+

VS

P3

VIN

+3VALWP

VS

BATT+

VIN

P3

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

0.1

CHARGER

B

40 47Monday, December 25, 2006

2006/08/04 2006/10/06

Compal Electronics, Inc.

Charger

Charge voltage

3S CC-CV MODE : 12.6V

SEL is L

IREF=0.574~2.56V

CC=2.746A

(100K/(100K+133K))*2.56V=1.0985V

1.098/(20*0.02)=2.746A

CP Point=2.8A

5V*(10K/(34.8K+10K))=1.116V

1.116V/(20*0.02)=2.8A

Fosc=14100/Rt=14100/47=300KHz

BATT-OVP=0.1112*BATT+

LI-3S :13.5V----BATT-OVP=1.5V

A/D

A/D

65W: PR54=34.8K

90W: PR54=21.0K

CP mode

65W: 2.8A

90W: 4.0A

PR53

10K_0402_1%

12

PR58

56.2K_0402_1%

1 2

PD23

1SS355TE-17_SOD323-2

1 2

PC41

47P_0402_50V8J

1 2

PR63

100K_0402_1%

12

PQ10

AO4407_SO8

3 6

5

7

8

2

4

1

PC32

0.1U_0603_25V7K

1 2

PQ15

DTC115EUA_SC70-3

2

13

PC23

4.7U_1206_25V6K

12

PR278

0_0402_5%

@

1 2

PC30

0.1U_0603_25V7K

1 2

PQ9

AO4407_SO8

36

5

7

82

4

1

PC28

4700P_0402_25V7K

1 2

PR72

105K_0402_1%

12

PQ40

DTC115EUA_SC70-3

2

13

PR68

340K_0402_1%

12

PC38

10U_1206_25VAK

12

PC36

10U_1206_25VAK

12

G

D

S

PQ49

RHU002N06_SOT323-3

2

13

PC39

0.01U_0402_25V7K

12

PC42

0.01U_0402_25V7K

12

PD34

1SS355TE-17_SOD323-2

1 2

PJ12

PAD-OPEN 3x3m

1 2

PC26

2200P_0402_50V7K

12

PR67

47K_0402_5%

12

PQ14

DTC115EUA_SC70-3

2

13

PL4

FBMA-L11-322513-201LMA40T_1210

1 2

PD26 RB751V-40TE17_SOD323-2

1 2

PU4

MB39A126PFV-ER_SSOP24

-INC2

1

OUTC2

2

+INE2

3

-INE2

4

+INC2 24

GND 23

CS 22

VCC 21

ACOK

5

VREF

6

ACIN

7

-INE1

8

+INE1

9

OUTC1

10

SEL

11

-INC1

12

OUT 20

VH 19

XACOK 18

RT 17

-INE3 16

FB123 15

CTL 14

+INC1 13

PR52

100K_0402_1%

12

PC31

0.01U_0402_25V7K

12

PR47

47K_0402_5%

12

PR65

0_0402_5%

12

PR51

10K_0402_1%

1 2

PC24

4.7U_1206_25V6K

12

PU12A

LM358DR_SO8

+3

-2

0

1

P8

G

4

PQ11

AO4407_SO8

3 6

5

7

8

2

4

1

47K

47K

PQ41

DTA144EUA_SC70

2

1 3

PR110

10K_0402_5%

12

PR50

10K_0402_1%

1 2

PR336

200K_0402_1%

1 2

EC31QS04

PD11

12

PR55

150K_0402_1%

12

PR272

100K_0402_1%

1 2

PQ13

AO4407_SO8

36

5

7

82

4

1

PR45

0.02_2512_1%

1 2

PL5

16UH_LF919AS-160M=P3_3.7A_20%

1 2

PQ18

DTC115EUA_SC70-3

2

13

PD25 RB751V-40TE17_SOD323-2

1 2

PQ48

DTC115EUA_SC70-3

2

13

PR48

47K_0402_1%

1 2

PC243

0.1U_0603_25V7K

12

PC33

0.22U_0603_16V7K

12

PC25

0.1U_0603_25V7K

12

PC133

0.22U_0603_16V7K

1 2

PR60

133K_0402_1%

1 2

PC43

0.01U_0402_25V7K

12

PC29

0.22U_0603_16V7K

1 2

EC31QS04

PD10

12

PU12B

LM358DR_SO8

+5

-6

0

7

P8

G

4

G

D

S

PQ17

RHU002N06_SOT323

2

13

PR49

0_0402_5%

12

PR56

0.02_2512_1%

1 2

PR46

200K_0402_1%

12

PR61

10K_0402_1%

12

PQ39

AO4407_SO8

36

5

7

82

4

1

PR62

33K_0402_1%

1 2

PQ19

DTC115EUA_SC70-3

2

13

PR54

34.8K_0402_1%

12

PR273

10K_0402_1%

12

G

D

S

PQ16

RHU002N06_SOT323

2

13

PR69

499K_0402_1%

12

PC34

2200P_0402_50V7K

1 2

PC35

1500P_0603_50V7K

1 2

PR66

3K_0402_1%

1 2

PR337

100K_0402_5%

1 2

PC40

10P_0402_50V8J

1 2

47K

47K

PQ12

DTA144EUA_SC70

2

1 3

PC37

10U_1206_25VAK

12

PR57

1K_0402_1%

1 2

PR277

10K_0402_1%

12

PC27

0.1U_0603_25V7K

12

A

A

B

B

C

C

D

D

1 1

2 2

3 3

4 4

BST3B

2VREF_8734

LX5

DH5

BST5A

BST3A DH3

BST5B

3HG

DL3

LX3

DL5

5HG MAX8734_B++

MAINPWON39,46

SPOK 46

+3VALWP

VL

+5VALWP

B+

VL

2VREF_8734

MAX8734_B++

MAX8743_B+

MAX8743_B+

MAX8743_B+

VL

VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

0.1

+5VALWP/+3VALWP

Custom

41 47Monday, December 25, 2006

2006/08/04 2006/10/06

Compal Electronics, Inc.

PC51

10U_1206_25VAK

12

+

PC56

150U_V_6.3VM_R18

1

2

PC53

1U_0603_6.3V6M

12

PC46

0.1U_0603_25V7K

1 2

PQ29

SI4810BDY-T1-E3_SO8

S

1

S

2

S

3

G

4

D8

D7

D6

D5

+

PC58

150U_V_6.3VM_R18

1

2

PR93

0_0402_5%

1 2

PR83

499K_0402_1%

1 2

PR324

0_0402_5%

1 2

PC60

4.7U_0805_6.3V6K

12

PQ20

SI4800BDY-T1-E3_SO8

S

1S

2S

3G

4

D8

D7

D6

D5

PR77

4.7_1206_5%

@

12

PR81

200K_0402_1%

1 2

PQ21

SI4800BDY-T1-E3_SO8

S

1

S

2

S

3

G

4

D8

D7

D6

D5

PL6

FBMA-L11-322513-201LMA40T_1210

1 2

PC49

0.1U_0402_16V7K

12

PC55

0.1U_0603_25V7K

12

PR88

47K_0402_5%

1 2

PL8

4.7UH_PCMC063T-4R7MN_5.5A_20%

1 2

PR76

4.7_1206_5%

12

PC227

0.047U_0603_25V7M

12

PR75

47_0402_5%

1 2

PR87

0_0402_5%

1 2

PR90

3.57K_0402_1%@

1 2

PC59

0.22U_0603_16V7K

12

PQ30

SI4810BDY-T1-E3_SO8

S

1S

2S

3G

4

D8

D7

D6

D5

PR86

0_0402_5%@

1 2

PC47

2200P_0402_50V7K

12

PR322

0_0402_5%

12

PR323

806K_0603_1%

12

PR280 0_0402_5%

12

PR80

118K_0402_1%

1 2

PC54

4.7U_0805_6.3V6K

12

PC45

0.1U_0603_25V7K

1 2

PC48

10U_1206_25VAK

12

PR82

0_0402_5%

1 2

PR85

10.2K_0402_1%

@

1 2

PC57

0.047U_0603_16V7K@

12

PR94

47K_0402_5%@

1 2

PR79

0_0402_5%

1 2

PR78

0_0402_5%

1 2

PR84

499K_0402_1%

1 2

PZD1

RLZ5.1B_LL34

1 2

PR89

0_0402_5%

12

PR74

0_0402_5%

1 2

PC50

2200P_0402_50V7K

12

PC52

4.7U_1206_25V6K

12

PU6

MAX8734AEEI+_QSOP28

LX5

15

DL5

19

BST5

14

DH5

16

OUT5

21

FB5

9

SHDN#

6

ON5

4

GND

23

ILIM5 11

DH3 26

LX3 27

TON 13

DL3 24

OUT3 22

FB3 7

PGOOD 2

SKIP#

12

ON3

3

REF

8

PRO#

10 VCC 17

V+ 20

ILIM3 5

BST3 28

LDO3

25

LD05 18

N.C.

1

PC61

0.047U_0603_16V7K@

12

PD13

CHP202UPT_SOT323-3

2

3

1

PR92

0_0402_5%

1 2

PL7

4.7UH_PCMC063T-4R7MN_5.5A_20%

1 2

PR91

100K_0402_5%

1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DL_1.05V

1.05VS1N

1.05VS1P

DH_1.05V_1

1.8VS2N

1.8VSET

BST_1.05V

LX1.05V

BST_1.8V

1.8VS2P

1.05VS1N

1.8VS2P

1.05VS1P

1.8VSET

DL_1.8V

LX_1.8V

DH_1.8V_1 DH_1.8V_2

DH_1.05V_2

1.8VS2N

1.05SET

SYSON26,33,35

SUSP#18,23,26,28,29,33,35,43,44

+5VALWP

+1.8VP

+1.05VSP

+5VALWP

OZ813_B+

OZ813_B+

B+

+5VALWP

+3VALWP

+3VALWP

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

0.1

1.05VSP/1.8VP

Custom

42 47

Monday, December 25, 2006

2006/08/04 2006/10/06

Compal Electronics, Inc.

PR269

0_0402_5%

1 2

PC65

1000P_0402_50V7K

12

PL10

2.2UH_MPL73-2R2_8A_20%

1 2

PR266

0_0402_5%

12

PR106

150K_0402_1%

1 2

PC75

0.01U_0402_25V7K

12

PR98

30K_0402_1%

1 2

PC68

4700P_0402_25V7K

1 2

PR95

51_0402_1%

12

PL11

1UH_PCMB103E-1R0MS_20A_20%

1 2

PR103

24K_0402_1%

@

1 2

PR97

100K_0402_1%

1 2

PC69

22P_0402_50V8J

12

PQ22

SI4800BDY-T1-E3_SO8

S

1S

2S

3G

4

D8

D7

D6

D5

PR262

0_0402_5%@

1 2

PC70

4700P_0402_25V7K

12

PR179

33K_0402_1%

12

PC156

2.2U_0603_6.3V6K

12

PR107

51_0402_1%

12

PC132

1U_0402_6.3V6K

12

+

PC229

220U_D2_4VM_R15

1

2

PC67

0.1U_0603_25V7K

12

PQ24

SI4684DY-T1-E3_SO8

S

1S

2S

3G

4

D8

D7

D6

D5

PC230

4.7U_0805_6.3V6K

12

+

PC78

220U_D2_4VM_R15

1

2

PU7

OZ813LN_QFN24

ON/SKIP2

1

VIN

2

VREF

3

TSET

4

VDDA

5

ON/SKIP1

6

VSET1

7

CS1N

8

CS1P

9

PGD1

10

LX1

11

HDR1

12

BST1 13

LDR1 14

GDNP 15

VDDP 16

LDR2 17

BST2 18

HDR2 19

LX2 20

PGD2 21

CS2P 22

CS2N 23

VSET2 24

GNDA 25

PC76

0.1U_0603_25V7K

12

PC184

0.01U_0402_25V7K

@

12

PC228

4.7U_0805_6.3V6K

12

PR109

300K_0402_1%@

1 2

PC74

1U_0603_6.3V6M

12

PR101

0_0402_5%

12

PR333

10.5K_0402_1%

12

PR105

75K_0402_1%

1 2

PR99

22_0402_1%

1 2

PC63

10U_1206_25VAK

12

PC72

0.022U_0402_16V7K

12

PC82

4700P_0402_25V7K

12

PR104

100K_0402_1%

1 2

PR270

0_0402_5%

12

+

PC66

220U_D2_4VM_R15

1

2

PD16

RB751V-40TE17_SOD323-2

1 2

PR263

0_0402_5%

@

1 2

PR172

61.9K_0402_1%

1 2

PD17

RB751V-40TE17_SOD323-2

1 2

PC81

22P_0402_50V8J

12

PL9

FBMA-L11-322513-201LMA40T_1210

1 2

PC80

4700P_0402_25V7K

12

PC73

0.1U_0603_25V7K

12

PC71

1U_0603_6.3V6M

12

PC79

10U_1206_25VAK

12

PR108

100K_0402_1%

1 2

PR100

1K_0402_1%

1 2

PQ23

SI4810BDY-T1-E3_SO8

S

1S

2S

3G

4

D8

D7

D6

D5

PC77

1000P_0402_50V7K

12

PQ31

IRF7836PBF_SO8

3 6

5

7

8

2

4

1

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

LX_1.5

+1.5VSP

DL_1.5

DH_1.5ADH_1.5

BST_1.5

SUSP#

8

,29,33,35,42,44

SUSP35

SUSP#18,23,26,28,29,33,35,42,44

+3VS

+2.5VSP

+5VS

+3VALWP

+0.9VSP

+1.8VP

+1.5VSP

+5VALWP

B+

+5VALWP

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

0.1

+1.5VSP/+0.9VSP/+2.5VSP

Custom

43 47

Monday, December 25, 2006

2006/08/04 2006/10/06

Compal Electronics, Inc.

VFB=0.5V

PR283

3K_0402_1%

1 2

+

PC88

220U_D2_4VM_R15

1

2

PC193

10U_1206_25VAK

12

PJ9

JUMP_43X118

11

2

2

PU9

G2992F1U_SO8

VOUT

4

NC 5

GND

2

VREF

3

VIN

1VCNTL 6

NC 7

NC 8

TP 9

PR282

10_0402_5%

12

PR334

470K_0402_1%

12

PC96

22U_1206_6.3V6M

12

PC103

1U_0402_6.3V6K

12

PQ27

SI4810BDY-T1-E3_SO8

S

1S

2S

3G

4

D8

D7

D6

D5

PL12

FBMA-L11-322513-201LMA40T_1210

12

PR287

18.2K_0402_1%

1 2

PC194

1U_0402_6.3V6K

12

PR288

10.7K_0402_1%

12

PC200

1U_0603_6.3V6M

12

PQ26

SI4800BDY-T1-E3_SO8

S

1S

2S

3G

4

D8

D7

D6

D5

PR281

1M_0402_5%

12

PC93

1U_0603_6.3V6M

12

PD21

RB751V-40TE17_SOD323-2

1 2

PC97

22U_1206_6.3V6M

12

PR124

1K_0402_1%

12

PC94

22U_1206_6.3V6M

12

PR120

1K_0402_1%

12

PL13

3.3UH_MPL73-3R3_6A_20%

1 2

PC95

1U_0603_6.3V6M

12

PR121

2.2K_0402_1%

1 2

PR125

1K_0402_1%

12

PC192

2200P_0402_50V7K

12

PR122

2.15K_0402_1%

12

PU10

APL5912-KAC-TRL_SO8

GND

1

VOUT 4

POK

7

EN

8

VCNTL 6

VIN 5

VOUT 3

FB 2

VIN 9

PR123

10K_0402_1%

12

PC195

0.1U_0603_25V7K

12

PR284

21.5K_0402_1%

12

PC231

4.7U_0805_6.3V6K

12

PR285

0_0402_5%

1 2

PJ10

JUMP_43X79

11

2

2

PC101

0.1U_0402_16V7K

12

PC198

1U_0603_6.3V6M

12

PC99

0.01U_0402_25V7K

12

PC199

1000P_0402_50V7K

12

G

D

S

PQ28

RHU002N06_SOT323

2

13

PC197

0.1U_0402_16V7K@

12

PR286

470K_0402_1%@

12

PC102

22U_1206_6.3V6M

12

PU13

SC411MLTRT_MLPQ16_4X4

FB

3

PGD

4

VOUT

1

VCCA

2

NC

5

VSSA

6

VDDP 9

BST 13

DH 12

PGND

7

DL

8

LX 11

ILIM 10

NC 14

EN/PSV 15

TON 16

TPAD

17

PC100

1U_0402_6.3V6K

12

PC196

33P_0402_50V8J

12

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DL_1.25

LX_1.25

+1.25VSP

DH_1.25ADH_1.25

BST_1.25

SUSP#18,23,26,28,29,33,35,42,43

+3VALWP

+5VALW

+3VALW

+5VALWP

+1.8VP +1.8V

+0.9VS

+0.9VSP

+VCCP

+1.05VSP

+1.5VS+1.5VSP

+VSBP +VSB

+2.5VS

+2.5VSP

+VCCGFX

+1.25VSP +1.25VS

+1.25VSP

+5VALWP

B+

+VCCP

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

0.1

1.25VSP

Custom

44 47

Monday, December 25, 2006

2006/08/04 2006/10/06

Compal Electronics, Inc.

VFB=0.5V

UMA PR313

Discrete PR309

PJ2

PAD-OPEN 3x3m@

1 2

PD22

RB751V-40TE17_SOD323-2

1 2

PQ44

SI4800BDY-T1-E3_SO8

S

1S

2S

3G

4

D8

D7

D6

D5

PU16

SC411MLTRT_MLPQ16_4X4

FB

3

PGD

4

VOUT

1

VCCA

2

NC

5

VSSA

6

VDDP 9

BST 13

DH 12

PGND

7

DL

8

LX 11

ILIM 10

NC 14

EN/PSV 15

TON 16

TPAD

17

PR335

470K_0402_1%

12

PR325

1M_0402_5%

12

PC239

1U_0603_6.3V6M

12

PC241

1U_0603_6.3V6M

12

PR313

0_1206_5%

12

PR326

10_0402_5%

12

PC236

33P_0402_50V8J

12

PJ7

PAD-OPEN 3x3m@

1 2

PC237

4.7U_0805_6.3V6K

12

PR328

15.4K_0402_1%

12

PR331

12.7K_0402_1%

1 2

PC233

10U_1206_25VAK

12

PJ1

PAD-OPEN 3x3m@

1 2

PJ6

PAD-OPEN 3x3m@

1 2

PQ46

SI4810BDY-T1-E3_SO8

S

1S

2S

3G

4

D8

D7

D6

D5

PC240

1000P_0402_50V7K

12

PL19

4.7UH_PCMC063T-4R7MN_5.5A_20%

1 2

PC234

0.1U_0402_16V7K@

12

PR329

0_0402_5%

1 2

PJ19

PAD-OPEN 3x3m@

1 2

PC232

2200P_0402_50V7K

12

PJ8

JUMP_43X39@

1

122

PL17

FBMA-L11-322513-201LMA40T_1210

1 2

PR332

10.2K_0402_1%

12

PR309

0_1206_5%@

12

PC235

0.1U_0603_25V7K

12

+

PC219

220U_D2_4VM_R15

1

2

PR327

0_0402_5%

1 2

PJ4

JUMP_43X39@

1

122

PJ11

JUMP_43X39@

1

122

PJ3

PAD-OPEN 3x3m@

1 2

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

VCC

BST1_CPU BSTM1_CPU

BSTM2_CPU

CCI_CPU

DH1__CPU

5VS1

CSP1__CPU

CSP2_CPU

CSN2__CPU

CSN1_CPU

FB_CPU

+CPU_CORE

DH2_CPU

BST2_CPU

DL1__CPU

LX2_CPU

DL2__CPU

DL2__CPU

CPU_VCC_SENSE

DL1__CPU

LX1__CPU

CPU_VID65

CPU_VID05

CPU_VID15

CPU_VID25

CPU_VID35

CPU_VID45

CPU_VID55

CLK_ENABLE#21

H_PROCHOT#4

VR_ON33

DPRSLPVR7,21

H_PSI#5

VGATE7,21

H_DPRSTP#5,7,20

VCCSENSE5

VSSSENSE5

CPU_POUT

+5VS

CPU_B+

CPU_B+

+CPU_CORE

B+

+3VS

+3VS

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

0.1

+CPU_CORE

Custom

45 47Monday, December 25, 2006

2006/08/04 2006/10/06

Compal Electronics, Inc.

NTC

NTC

NTC

A/D

PC190

180P_0402_50V8J

12

PR219 0_0402_5%

12

PC165

1U_0603_6.3V6M

1 2

PC176

10U_1206_25VAK

12

PR260

0_0402_5%

1 2

PC161

10U_1206_25VAK

12

PL14

FBMA-L11-322513-201LMA40T_1210

12

PR244

0_0402_5%

1 2

PR314

0_0402_5%

1 2

PR247

0_0402_5%

1 2

PC169

0.22U_0603_16V7K

1 2

PR235

0_0402_5%

1 2

PC171

0.022U_0402_16V7K@

1 2

PC177

10U_1206_25VAK

12

PC172

4700P_0402_25V7K

1 2

PC166

0.22U_0603_16V7K

1 2

PL15

P_0.36H_ETQP4LR36WFC_24A_20%

12

PR233 499_0402_1%

1 2

PR253

0_0402_5%@

1 2

+

PC242

100U_25V_M

1

2

PR254

10K_0402_5%@

1 2

PR227 0_0402_5%

12

PR241

10K_0402_1%

1 2

PQ34

IRF7836PBF_SO8

3 6

5

7

8

2

4

1

PQ32

SI7686DP-T1-E3_SO8

3 5

2

4

1

PR239

2.2_0402_5%

1 2

PR216

200K_0402_5%

12

PC167

470P_0603_50V7K

12

PC178

10U_1206_25VAK

12

PR236 0_0402_5%

1 2

PR221 0_0402_5%

12

PR245

3K_0603_1%@

1 2

PC180

2200P_0402_50V7K

12

PC181

0.1U_0402_16V7K@

1 2

PR274

0_0402_5%

1 2

PC187

180P_0402_50V8J

12

PR217

13K_0402_5%

1 2

PC189

180P_0402_50V8J

12

PR230

3.48K_0402_1%

1 2

PR232 71.5K_0402_1%

12

PC159

10U_1206_25VAK

12

PU11

MAX8770GTL+_TQFN40

FB 12

CSP2 14

GND 18

CCV

9

CCI 10

REF

11

CSP1 17

CSN2 15

CSN1 16

CLKEN

1

BST2 20

GNDS 13

DPRSTP

40

D2

33

D1

32

D0

31 BST1 30

Vcc

19

TIME

7

THRM

6

VRHOT

5

POUT

4

PSI

3

PWRGD

2

TON 8

PGND2 23

VDD 25

DL2 24

DL1 26

DH2 21

PGND1 27

D6

37

D4

35

D5

36

D3

34

LX2 22

LX1 28

DH1 29

DPRSLPVR

39

SHDN

38

PR246

3K_0603_1%

@

1 2

PQ35

SI7686DP-T1-E3_SO8

3 5

2

4

1

+

PC158

100U_25V_M

1

2

PR257

2.1K_0603_1%

12

PR243

100_0402_5%

1 2

PR250

10K_0402_5%

@

1 2

PR255

10_0402_5%

12

PR251

100_0402_5%

1 2

PC164

2.2U_0603_6.3V6K

1 2

PC170 0.22U_0603_16V7K

1 2

PC188

180P_0402_50V8J

12

PR222 0_0402_5%

12

PR226

2.1K_0603_1%

1 2

PC163

2200P_0402_50V7K

12

PR242

3.65K_0402_1%

1 2

PR249

0_0402_5%

1 2

PC179

0.1U_0603_25V7K

12

PC175

0.22U_0603_16V7K

12

PR275

0_0402_5%

1 2

PR252

56_0402_5%

12

PQ37

IRF7836PBF_SO8

3 6

5

7

8

2

4

1

PR231

10KB_0603_5%_ERTJ1VR103J

1 2

PL16

P_0.36H_ETQP4LR36WFC_24A_20%

12

PR238

3K_0603_1%@

1 2

PC174

4700P_0402_25V7K

1 2

PC182

470P_0603_50V7K

12

PC157

0.01U_0402_25V7K

12

PR229

10_0402_5%

12

PR218

100K_0402_5%

1 2

PC168470P_0402_50V7K

12

PR240

2K_0402_1%

1 2

PR228 0_0402_5%

1 2

PQ33

IRF7836PBF_SO8

3 6

5

7

8

2

4

1

PR223 0_0402_5%

12

PR214

0_1206_5%

12

PR248

20K_0402_1%

1 2

PR259

10KB_0603_5%_ERTJ1VR103J

1 2

PQ36

IRF7836PBF_SO8

3 6

5

7

8

2

4

1

PR220

2.2_0402_5%

1 2

PR224

6.8_1206_5%

12

PR234 0_0402_5%

1 2

PC173

470P_0402_50V7K

1 2

PR215

10_0402_5%

12

PR225 0_0402_5%

12

PR258

3.48K_0402_1%

1 2

PC160

10U_1206_25VAK

12

PC183

0.22U_0603_16V7K

1 2

PR256

6.8_1206_5%

12

PR237

0_0402_5%

1 2

PC162

0.1U_0603_25V7K

12

A

A

B

B

C

C

D

D

1 1

2 2

3 3

4 4

TS_A

EC_SMDA

BATT_S1

AB/I

ALI/NIMH#

EC_SMCA

N72 OTPFB2

N71

OTP

OTPREF2

SPOK41

BATT_TEMP 33

EC_SMB_CK1 33,34

ALI/MH#

MAINPWON39,41

EC_SMB_DA1 33,34

BATT_TEMP33

BATT_IN 33

B+ +VSBP

VL

BATT+

+3VALWP

BATT++

+3VALWP

VSVL

VL

VL

VS +3VALWP +3VALWP

RTCVREF

Title

Size Document Number Rev

Date: Sheet of

Security Classification

Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

Deciphered Date

0.1

BATTERY CONN. / OTP

B

46 47Monday, December 25, 2006

2006/08/04 2006/10/06

Compal Electronics, Inc.

Recovery at 45 degree C

CPU thermal protection at 84 degree C

PH1 under CPU botten side :

CPU

A/D

PJP2

ALLTO_C103D6-10701-L

@

11

33

44

55

66

22

77

PQ7

TP0610K-T1-E3_SOT23

2

13

PC21

0.1U_0603_25V7K

12

PC16

0.01U_0402_25V7K

12

PR318

215K_0603_1%

1 2

PR178

47K_0402_5%

1 2

PR342

470K_0402_1%

1 2

PC225

1000P_0402_50V7K

12

PR36

6.49K_0402_1%

1 2

PR319

100K_0402_1%

1 2

PR320

24.3K_0603_1%

12

PC14

1000P_0402_50V7K

12

PR31

100_0402_1%

12

PR176

1K_0402_1%

12

PR42

22K_0402_1%

1 2

PC224

0.1U_0603_25V7K

1 2

PR321

100K_0402_1%

1 2

PC226

0.22U_0603_16V7K

12

PC15

1000P_0402_50V7K

12

PC244

1000P_0402_50V7K@

12

PU15A

LM393DT_SO8

+

3

-

2O1

P8

G

4

PR44

0_0402_5%

1 2

G

D

S

PQ50

RHU002N06_SOT323

2

13

PR315

470K_0402_1%

1 2

PL3

HCB4532KF-800T90_1812

1 2

PR340

470K_0402_1%

1 2

PR35

100_0402_1%

12

PR339

30K_0402_1%

12

G

D

S

PQ8

RHU002N06_SOT323

2

13

PC22

0.1U_0402_16V7K

12

PH1

100K_0603_1%_TH11-4H104FT

12

PR338

470K_0402_1%

12

PC20

0.22U_1206_25V7K

12

PR177

1K_0402_1%

1 2

PR317

0_0402_5%

1 2

PR38

1K_0402_1%

12

G

D

S

PQ47

RHU002N06_SOT323

2

13

PR41

100K_0402_5%

12

PR316

470K_0402_1%

1 2

PF2

12A_65V_451012MRL

2 1

PR43

100K_0402_5%

1 2

PR341

470K_0402_1%

1 2

PC245

1000P_0402_50V7K

12

PU15B

LM393DT_SO8

+

5

-

6O7

P8

G

4

A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

Title

Size Document Number Rev

Date: Sheet of

POWER PIR

47 47Monday, December 25, 2006

Compal Electronics, Inc.

Version change list (P.I.R. List) Page 1 of 1

Rev. PG# Modify List B.Ver# PhaseFixed IssueItem

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

1Improve CPU input capcaity noise issue Advence CPU input capacity PC24245

2

3

Decrease S5 power consumption. 40

45

Delete PR59

、

PR64.

ADD PD19 PD

、

20.

Protect battery discharge mos damage

when plug 15V adapter.

Delete PD12.

ADD PD21 PD22 PR250 PQ50 PC198..

、、 、、

4Improve 1.8v transient response. 42 Change PL10 to 2.2u, PR98 to 30k_0402_1%

5Adjust power sequence.

42 For adjust +1.8VP, Change PR179 to 33k_0402_1% and add PC132 1u_0402_6.3v

43

For adjust +1.5VSP, Change PR283 to 3k_0402_1% and add PC194 1u_0402_6.3v

For adjust +2.5VSP, Change PR121 to 2.2k_0402_1% and add PC100 1u_0402_6.3v

For adjust +0.9VSP, Change PR123 to 10k_0402_1% and add PC103 1u_0402_6.3v

6For improve EPA 46 Add PR338, PR339, PR340, PR341, PR342, PC244, PC245, PQ50

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title

Size Document Number Rev

Date: Sheet of

POWER PIR

48 48Tuesday, December 26, 2006

Compal Electronics, Inc.

1Add Energize star function Add C(874~876),R903,J1,Q94,U7735

Version change list (P.I.R. List) Page 1 of 1

Rev. PG# Modify List B.Ver# PhaseFixed IssueItem

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

A2

2Modify LAN chip power control A2 24 Add C877,R902,Q93

3Fixed Speaker no function A2 37 Change Q91 form SI2301BDS to MMBT3906, Del R895

4Fixed SWDJ function can't work A2 36 Add R904

5Add R905,Q9629A2Fixed Audio Codec can't work

6Fixed USB Port4 can't work A2 27 Swap USB_N4 & USB_P4

7Fixed EMI issue A2 32 37 Add R908,C878,C879

8Fixed SWDJ mode EC_MUTE# ISSUE

9Fixed CMOS noise B 36 Add R912,C880

10 Fixed EMI B 25 Add C881,C882

11

B 30 Add D39,Q99,R914

Add chipset id B 33 Add R915,R916

12 Fix SWDJ Subwoofer issue B 31 Add R917

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