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Compal_LA-4861P

User Manual: Motherboard Compal LA-4861P KAWG0 - Schematics. Free.

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A

B

C

D

E

ZZZ1

1

1

PCB

Compal Confidential

2

2

KAWG0 Schematics Document
AMD S1g1 / RS690MC / SB600
2009 / 04 / 09
Rev:1.0

3

3

4

4

Compal Secret Data

Security Classification
2005/05/09

Issued Date

Deciphered Date

2009/06/11

Title

Compal Electronics, Inc.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

A

B

C

D

SCHEMATIC,MB A4861

Friday, April 10, 2009

Rev
D

401650
Sheet
E

1

of

46

5

4

3

2

1

Compal confidential
Project Code: KAWG0
File Name : LA-4861P

Thermal Sensor
ADM1032ARM

Clock Generator
ICS951462

page 8

D

AMD S1g1 CPU
638P PGA

DDRII

533/667

DDRII-SO-DIMM X2
page 10,11

page 6,7,8,9

Dual Channel

page 17

D

H_A#(3..31)

H_D#(0..63)
HT 16x16 1000MHZ

CRT

SIG1 : 35mm x 35mm x (2.20mm+2.11mm) 638pin
AM2 : 40mm x 40mm x (4.56mm+2.11mm) 940pin

ATI-RS690MC

page 24

465 BGA
LCD CONN

RS485 : 21mm x 21mm (19.2mm x 19.2mm) x2.33mm 465pin
RS690 : 21mm x 21mm (19.2mm x 19.2mm) x2.33mm 465pin

page 12,13,14,15,16

page 25

SB460 : 27mm x 27mm (21.6mm x 21.6mm) x2.33mm 549pin
SB600 : 23mm x 23mm (21.6mm x 21.6mm) x2.33mm 549pin

A-Link Express
4 x PCIE

PCIE X1

USB 2.0
C

C

Mini card
WLAN

ATI-SB600

10/100 LAN
AR8114

page 31

BT Conn

Camera

page 38

USB conn
X2

CardReader
RT5159

549 BGA

page 26

HD Audio

HDA Codec
ALC272

page 18,19,20,21,22

page 39

AMP & Audio Jack

TPA6017

page 40

MDC Conn.
page 41

RJ45 CONN

HeadPhone
Out

page 27

SATA0

HDD Conn.
page 23

LPC BUS

MIC In

B

B

SATA2
ODD Conn.
page 23

ENE KB926
Ver:D2

Power On/Off CKT / LID switch / Power OK CKT

page 28

page 37

Second HDD/ODD

DC/DC Interface CKT.

CIR/LED

RTC CKT.

page 41

page 38

page 18

Int. KBD
page 29

Touch Pad
CONN. page

Power Circuit DC/DC

29

SPI BIOS

SATA1

HDD Conn.

SATA3

ODD Conn.

page 30

page 42~48

A

A

2005/03/08

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2009/06/11

Deciphered Date

Title

SCHEMATIC,MB A4861

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

Rev
D

401650

Tuesday, April 14, 2009

Sheet
1

2

of

46

5

4

3

2

SIGNAL

STATE

Voltage Rails

D

Full ON

1

SLP_S1# SLP_S3# SLP_S4# SLP_S5#

+VALW

+V

+VS

HIGH

HIGH

HIGH

HIGH

ON

ON

ON

Clock
ON

Power Plane

Description

S1

S3

S5

S1(Power On Suspend)

LOW

HIGH

HIGH

HIGH

ON

ON

ON

LOW

VIN

Adapter power supply (19V)

N/A

N/A

N/A

S3 (Suspend to RAM)

LOW

LOW

HIGH

HIGH

ON

ON

OFF

OFF

B+

AC or battery power rail for power circuit.

N/A

N/A

N/A

+CPU_CORE

Core voltage for CPU

ON

OFF

OFF

S4 (Suspend to Disk)

LOW

LOW

LOW

HIGH

ON

OFF

OFF

OFF

+0.9V

0.9V switched power rail for DDR terminator

ON

ON

OFF

S5 (Soft OFF)

LOW

LOW

LOW

LOW

ON

OFF

OFF

OFF

+1.2V_HT

1.2V switched power rail

ON

OFF

OFF

+1.5VS

1.5V switched power rail

ON

OFF

OFF

+1.8VALW

1.8V always on power rail

ON

ON

ON*

+1.8V

1.8V power rail for DDR

ON

ON

OFF

+1.8VS

1.8V switched power rail

ON

OFF

OFF

Vcc
Ra/Rc/Re

+2.5VS

2.5V switched power rail

ON

OFF

OFF

Board ID

+3VALW

3.3V always on power rail

ON

ON

ON*

+3VS

3.3V switched power rail

ON

OFF

OFF

+5VALW

5V always on power rail

ON

ON

ON*

+5VS

5V switched power rail

ON

OFF

OFF

+VSB

VSB always on power rail

ON

ON

ON*

+RTCVCC

RTC power

ON

ON

ON

0
1
2
3
4
5
6
7

D

Board ID / SKU ID Table for AD channel

C

Board ID
0
1
2
3
4
5
6
7

External PCI Devices
IDSEL#

REQ#/GNT#

V AD_BID min
0 V
0.216 V
0.436 V
0.712 V
1.036 V
1.453 V
1.935 V
2.500 V

V AD_BID typ
0 V
0.250 V
0.503 V
0.819 V
1.185 V
1.650 V
2.200 V
3.300 V

V AD_BID max
0 V
0.289 V
0.538 V
0.875 V
1.264 V
1.759 V
2.341 V
3.300 V

C

BOARD ID Table

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

Device

3.3V +/- 5%
100K +/- 5%
Rb / Rd / Rf
0
8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%
NC

Interrupts

BTO Option Table

PCB Revision
0.1
0.2
0.3
1.0

BTO Item
NC Function
10/100 Lan
GIGA Lan
17" ID
15" ID

BOM Structure
NC@
8114@
8132@
17@
15@

B

B

EC SM Bus1 address
Device

Address

Smart Battery

0001 011X b

Device
ADM1032

SB600 SM Bus 1 address

A

EC SM Bus2 address

Device

Address

Clock Generator
(ICS951462)

1101 001Xb

DDR DIMM0

1001 000Xb

DDR DIMM2

1001 010Xb

SKU ID Table

Address

SKU ID
0
1
2
3
4
5
6
7

1001 100X b

SB600 SM Bus 2 address
Device

SKU

Address

New Card
A

Wireless Lan

2005/03/08

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2009/06/11

Deciphered Date

Title

SCHEMATIC,MB A4861

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

Rev
D

401650

Tuesday, April 14, 2009

Sheet
1

3

of

46

5

4

3

2

1

DIMMA

DDR_A_CLK[1..2]

D

D

CPU
S1G1 SOCKET

200MHZ

H_CLKI[1:0]

C

Host Bus

DIMMB

CPU CLK

DDR_B_CLK[1..2]

H_CLKO[1:0]

C

SBLINK_CLK
100MHZ
NBSRC_CLK

14.31818MHz

100MHZ

EXTERNAL
CLK GEN.
ICS951462

ATI NB
RS690

HTREFCLK
66MHZ
NB_OSC
14.318MHZ

B

B

SB_OSCIN
CLK_PCIE_LAN

100MHZ

100MHZ

CLK_PCIE_MINI

14.318MHZ

SBSRC_CLKP
100MHZ

ATI SB
SB600
CLK_PCI_LPC

CLK_48M_USB
48MHZ

Mini PCI Socket
Mini card

LAN
Atheros
AR8114

33MHZ

EC
ENE
KB926D2

32.768K Hz
25M Hz

32.768K Hz

A

A

2005/10/10

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2009/06/11

Deciphered Date

Title

SCHEMATIC,MB A4861

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

Rev
D

401650

Tuesday, April 14, 2009

Sheet
1

4

of

46

5

4

3

2

1

AMD S1G1 socket
LDO Regulator
CM8562IS
BATTERY
CHARGER
MAX1908ETI

BATTERY
11.1V
2.2Ah/6-cell

B+

CPU_B+

+2.5VS

+CPU_CORE

CPU core
PWM
MAX8774GTL

VDDA

2.5V

250mA

VDD

0.9V
0.95V 18.89A

+1.8V

VDDIO

1.8V

3A

+0.9V

VTT

0.9V

750mA

VLDT

1.2V

0.5A

+CPU_CORE

CPU

D

D

+1.2VALW

MOSFET
SI4856ADY

+1.2V_HT

+1.2V_HT
+1.2V_HT

AC ADAPTOR
19V 65W

B+

+1.2VALW
+1.8VALW
PWM
ISL6227CAZ-T

+1.2VALW
DDRII SODIMMX2
+1.8VALW

+1.8V

+1.8V
+1.8V

MOSFET
SI4856ADY

+0.9V

MOSFET
SI4856ADY

+1.8VS

VDD_MEM 1.8V

6.08A

VTT_MEM

0.5A

+1.8VS

0.9V

RS690MC
5A

VDD_CORE
LDO Regulator
APL5331KAC
C

B+

+3VALW

MOSFET
SI4800BDY

+3VS

+3VALW

+5VALW

+5VS

SWITCH
SI4800BDY

2.5A

VDDA_12

+0.9V

+1.8VALW

+3VALW
+5VALW
PWM
MAX8734AEEI

SYSTEM
MEMORY

VDD_HT

800mA 1.2V

VDD_PLL

50mA

PLLVDD12

70mA

AVDDQ

150mA

AVDDDI

150mA

VDD_18

200mA

VDDR

100mA

LPVDD

20mA

LVDDR18D

150mA

PLLVDD18

150mA

HTPVDD

200mA

AVDD

100mA

C

NB
1.8V

VDDR3

70mA 3.3V

LVDDR33

180mA

+5VALW
SB600
B

+4.75V
LDO Regulator
CM8562IS

FAN Control
APL5605

LDO Regulator
G9191

500mA

S5_1.2V

80mA

B

AVDDCK_1.2V 40mA

+5VS 500mA

+1.5V

VDD

USB Power
Switch
G528

PCIE_PVDD

35mA

PCIE_VDDR

450mA 1.2V

AVDD_SATA

300mA

PLLVDD_SATA 65mA
USB_PHY_1.2V 90mA

+5V
+3VS
+3VALW

VDDQ

150mA

S5_3.3V

15mA

AVDDCK_3.3V 10mA
XTLVDD_SATA 5mA
AVDDC

LCD panel
15.6"
A

B+ 300mA
+3.3 350mA

Mini Card
+1.5VS 500mA
+3.3VS 1A
+3.3VALW 330mA

Realtek
RTS5159
+3.3VS 300mA

EC
ENE KB926

Audio Codec
ALC272

+3.3VS 3mA

+4.75V 45mA

+3.3VALW 30mA

+3.3VS 25mA

Audio AMP
TPA6017A2
+5V 25mA

LAN
Atheros AR8114
+3.3V 201mA

CLOCK GEN
ICS951462

USB X2

SATA

+3.3V 400mA

+5V
Dual
1.5A

+5V 3A
+3.3V

2005/10/10

CPU_PWR

3

2.5~
3.3V

A

Compal Electronics, Inc.
2009/06/11

Deciphered Date

Title

SCHEMATIC,MB A4861

Date:

4

10mA 1.8V

VBAT

RTC
Bettary

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

3.3V

15mA

AVDD TX/RX 0.5A

Compal Secret Data

Security Classification
Issued Date

SB

2

Rev
D

401650

Tuesday, April 14, 2009

Sheet
1

5

of

46

5

D

4

12 H_CADIP[0..15]
12 H_CADIN[0..15]

3

H_CADIP[0..15]

H_CADOP[0..15]

H_CADIN[0..15]

H_CADON[0..15]

2

H_CADOP[0..15]

12

H_CADON[0..15]

12

1

D

+1.2V_HT
JCPU1A

12
12
12
12

H_CLKIP1
H_CLKIN1
H_CLKIP0
H_CLKIN0

J5
K5
J3
J2

L0_CLKIN_H1
L0_CLKIN_L1
L0_CLKIN_H0
L0_CLKIN_L0

L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CLKOUT_H0
L0_CLKOUT_L0

Y4
Y3
Y1
W1

P3
P4

L0_CTLIN_H1
L0_CTLIN_L1

L0_CTLOUT_H1
L0_CTLOUT_L1

T5
R5

N1
P1

L0_CTLIN_H0
L0_CTLIN_L0

L0_CTLOUT_H0
L0_CTLOUT_L0

R2
R3

2
4.7U_0805_10V4Z

FAN1 Conn

+5VS
C92
1

U1
1
2
3
4

+VCC_FAN1
28

EN_DFAN1

1
R733

2
0_0402_5% 1

2

C760

EN
VIN
VOUT
VSET

12
12

+3VS

@ 0.01U_0402_16V7K

H_CTLIP0
H_CTLIN0

H_CTLIP0
H_CTLIN0

@D4
@
D4 BAS16_SOT23-3
1
2
C97
10U_0805_10V4Z
1
2

APL5607KI-TRG_SO8

40mil
28

1

H_CLKOP1
H_CLKON1
H_CLKOP0
H_CLKON0

1
2
3

C91
1000P_0402_50V7K

CONN@
ACES_85205-03001

2

12
12
12
12

LDO FAN

+3VS

R40
10K_0402_5%
@
28

H_CTLOP0
H_CTLON0

JP12

+VCC_FAN1

FAN_SPEED1

FANPWM

JP38
+VCC_FAN1

1
2
3
4

FANPWN

H_CTLOP0 12
H_CTLON0 12

1
2
3
4

CONN@
ACES_85205-0400

FOX_PZ63823-284S-41F
CONN@
Athlon 64 S1
Processor Socket

B

C

C96
1000P_0402_50V7K
1
2

R37
10K_0402_5%

2

1 51_0402_1%
1 51_0402_1%

2
2

8
7
6
5

GND
GND
GND
GND

+1.2V_HT
R2
R3

D13
1SS355_SOD323-2

@
R247
0_0603_5%
@

Reserve when PVT
for cos down

+5VS

10U_0805_10V4Z
2

1

H_CADOP15
H_CADON15
H_CADOP14
H_CADON14
H_CADOP13
H_CADON13
H_CADOP12
H_CADON12
H_CADOP11
H_CADON11
H_CADOP10
H_CADON10
H_CADOP9
H_CADON9
H_CADOP8
H_CADON8
H_CADOP7
H_CADON7
H_CADOP6
H_CADON6
H_CADOP5
H_CADON5
H_CADOP4
H_CADON4
H_CADOP3
H_CADON3
H_CADOP2
H_CADON2
H_CADOP1
H_CADON1
H_CADOP0
H_CADON0

2

T4
T3
V5
U5
V4
V3
Y5
W5
AB5
AA5
AB4
AB3
AD5
AC5
AD4
AD3
T1
R1
U2
U3
V1
U1
W2
W3
AA2
AA3
AB1
AA1
AC2
AC3
AD1
AC1

1

1

L0_CADOUT_H15
L0_CADOUT_L15
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H0
L0_CADOUT_L0

C84

2

L0_CADIN_H15
L0_CADIN_L15
L0_CADIN_H14
L0_CADIN_L14
L0_CADIN_H13
L0_CADIN_L13
L0_CADIN_H12
L0_CADIN_L12
L0_CADIN_H11
L0_CADIN_L11
L0_CADIN_H10
L0_CADIN_L10
L0_CADIN_H9
L0_CADIN_L9
L0_CADIN_H8
L0_CADIN_L8
L0_CADIN_H7
L0_CADIN_L7
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H5
L0_CADIN_L5
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_H2
L0_CADIN_L2
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H0
L0_CADIN_L0

AE5
AE4
AE3
AE2

2

N5
P5
M3
M4
L5
M5
K3
K4
H3
H4
G5
H5
F3
F4
E5
F5
N3
N2
L1
M1
L3
L2
J1
K1
G1
H1
G3
G2
E1
F1
E3
E2

VLDT_B3
VLDT_B2
VLDT_B1
VLDT_B0

1

C

VLDT_A3
VLDT_A2
VLDT_A1
VLDT_A0

1

H_CADIP15
H_CADIN15
H_CADIP14
H_CADIN14
H_CADIP13
H_CADIN13
H_CADIP12
H_CADIN12
H_CADIP11
H_CADIN11
H_CADIP10
H_CADIN10
H_CADIP9
H_CADIN9
H_CADIP8
H_CADIN8
H_CADIP7
H_CADIN7
H_CADIP6
H_CADIN6
H_CADIP5
H_CADIN5
H_CADIP4
H_CADIN4
H_CADIP3
H_CADIN3
H_CADIP2
H_CADIN2
H_CADIP1
H_CADIN1
H_CADIP0
H_CADIN0

D4
D3
D2
D1

HTT Interface

VLDT=500mA

PWM FAN

B

AMD : 49.9 1%
ATI : 51 1%

+1.2V_HT

VLDT CAP.

250 mil

1

2

C86
4.7U_0805_10V4Z

1

2

C82
4.7U_0805_10V4Z

1

2

C90
0.22U_0603_16V4Z

1

2

C89
0.22U_0603_16V4Z

1

C83
180P_0402_50V8J

2

1

C85
180P_0402_50V8J

2

Near CPU Socket
A

A

Compal Secret Data

Security Classification
2007/5/18

Issued Date

2009/06/11

Deciphered Date

Title

Compal Electronics, Inc.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

SCHEMATIC,MB A4861
Rev
D

401650
Sheet

Tuesday, April 14, 2009
1

6

of

46

A

B

C

D

E

Processor DDR2 Memory Interface
11 DDR_B_D[63..0]

2
R4
1K_0402_1%

1

2

1

2

C100
1000P_0402_50V7K

1

R5
1K_0402_1%

C16
0.1U_0402_16V4Z

2

1

+CPU_M_VREF

+CPU_M_VREF
JCPU1B

VTT_SENSE

TP1

+1.8V

3

10
10
10
10
11
11
11
11

R7
R6

1
2

2
1 39.2_0402_1%
39.2_0402_1%

DDR_CS3_DIMMA#
DDR_CS2_DIMMA#
DDR_CS1_DIMMA#
DDR_CS0_DIMMA#
DDR_CS3_DIMMB#
DDR_CS2_DIMMB#
DDR_CS1_DIMMB#
DDR_CS0_DIMMB#

11 DDR_CKE1_DIMMB
11 DDR_CKE0_DIMMB
10 DDR_CKE1_DIMMA
10 DDR_CKE0_DIMMA
10 DDR_A_MA[15..0]

2

Y10

M_ZN AE10
M_ZP AF10

DDR_CS3_DIMMA#
DDR_CS2_DIMMA#
DDR_CS1_DIMMA#
DDR_CS0_DIMMA#

V19
J22
V22
T19

+0.9V
VTT1
VTT2
VTT3
VTT4
VTT5
VTT6
VTT7
VTT8
VTT9

D10
C10
B10
AD10
W10
AC10
AB10
AA10
A10

MA0_CLK_H2
MA0_CLK_L2
MA0_CLK_H1
MA0_CLK_L1

Y16
AA16
E16
F16

DDR_A_CLK2
DDR_A_CLK#2
DDR_A_CLK1
DDR_A_CLK#1

AF18
AF17
A17
A18

DDR_B_CLK2
DDR_B_CLK#2
DDR_B_CLK1
DDR_B_CLK#1

MB0_ODT1
MB0_ODT0
MA0_ODT1
MA0_ODT0

W23
W26
V20
U19

DDR_B_ODT1
DDR_B_ODT0
DDR_A_ODT1
DDR_A_ODT0

MB_ADD15
MB_ADD14
MB_ADD13
MB_ADD12
MB_ADD11
MB_ADD10
MB_ADD9
MB_ADD8
MB_ADD7
MB_ADD6
MB_ADD5
MB_ADD4
MB_ADD3
MB_ADD2
MB_ADD1
MB_ADD0

J25
J26
W25
L23
L25
U25
L24
M26
L26
N23
N24
N25
N26
P24
P26
T24

DDR_B_MA15
DDR_B_MA14
DDR_B_MA13
DDR_B_MA12
DDR_B_MA11
DDR_B_MA10
DDR_B_MA9
DDR_B_MA8
DDR_B_MA7
DDR_B_MA6
DDR_B_MA5
DDR_B_MA4
DDR_B_MA3
DDR_B_MA2
DDR_B_MA1
DDR_B_MA0

M_VREF
VTT_SENSE
M_ZN
M_ZP

MA0_CS_L3
MA0_CS_L2
MA0_CS_L1
MA0_CS_L0

DDRII Cmd/Ctrl//Clk

W17

DDR_A_CLK2
DDR_A_CLK#2
DDR_A_CLK1
DDR_A_CLK#1

10
10
10
10

DDR_B_CLK2
DDR_B_CLK#2
DDR_B_CLK1
DDR_B_CLK#1

11
11
11
11

DDR_CS3_DIMMB#
DDR_CS2_DIMMB#
DDR_CS1_DIMMB#
DDR_CS0_DIMMB#

Y26
J24
W24
U23

MB0_CS_L3
MB0_CS_L2
MB0_CS_L1
MB0_CS_L0

DDR_CKE1_DIMMB
DDR_CKE0_DIMMB
DDR_CKE1_DIMMA
DDR_CKE0_DIMMA

H26
J23
J20
J21

MB_CKE1
MB_CKE0
MA_CKE1
MA_CKE0

DDR_A_MA15
DDR_A_MA14
DDR_A_MA13
DDR_A_MA12
DDR_A_MA11
DDR_A_MA10
DDR_A_MA9
DDR_A_MA8
DDR_A_MA7
DDR_A_MA6
DDR_A_MA5
DDR_A_MA4
DDR_A_MA3
DDR_A_MA2
DDR_A_MA1
DDR_A_MA0

K19
K20
V24
K24
L20
R19
L19
L22
L21
M19
M20
M24
M22
N22
N21
R21

MA_ADD15
MA_ADD14
MA_ADD13
MA_ADD12
MA_ADD11
MA_ADD10
MA_ADD9
MA_ADD8
MA_ADD7
MA_ADD6
MA_ADD5
MA_ADD4
MA_ADD3
MA_ADD2
MA_ADD1
MA_ADD0

DDR_A_BS#2
DDR_A_BS#1
DDR_A_BS#0

K22
R20
T22

MA_BANK2
MA_BANK1
MA_BANK0

MB_BANK2
MB_BANK1
MB_BANK0

K26 DDR_B_BS#2
T26 DDR_B_BS#1
U26 DDR_B_BS#0

DDR_B_BS#2 11
DDR_B_BS#1 11
DDR_B_BS#0 11

DDR_A_RAS#
DDR_A_CAS#
DDR_A_WE#

T20
U20
U21

MA_RAS_L
MA_CAS_L
MA_WE_L

MB_RAS_L
MB_CAS_L
MB_WE_L

U24 DDR_B_RAS#
V26 DDR_B_CAS#
U22 DDR_B_WE#

DDR_B_RAS# 11
DDR_B_CAS# 11
DDR_B_WE# 11

10 DDR_A_BS#2
10 DDR_A_BS#1
10 DDR_A_BS#0
10 DDR_A_RAS#
10 DDR_A_CAS#
10 DDR_A_WE#

MB0_CLK_H2
MB0_CLK_L2
MB0_CLK_H1
MB0_CLK_L1

DDR_B_ODT1 11
DDR_B_ODT0 11
DDR_A_ODT1 10
DDR_A_ODT0 10
DDR_B_MA[15..0]

11

11 DDR_B_DM[7..0]

CONN@ FOX_PZ63823-284S-41F
Athlon 64 S1
Processor
Socket

11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11

PLACE CLOSE TO PROCESSOR
WITHIN 1.5 INCH
DDR_A_CLK2

DDR_B_CLK2
1

DDR_A_CLK#2

2

1
C102
1.5P_0402_50V8C

2

DDR_B_CLK#2

DDR_A_CLK1

DDR_A_CLK#1

2

AD11
AF11
AF14
AE14
Y11
AB11
AC12
AF13
AF15
AF16
AC18
AF19
AD14
AC14
AE18
AD18
AD20
AC20
AF23
AF24
AF20
AE20
AD22
AC22
AE25
AD26
AA25
AA26
AE24
AD24
AA23
AA24
G24
G23
D26
C26
G26
G25
E24
E23
C24
B24
C20
B20
C25
D24
A21
D20
D18
C18
D14
C14
A20
A19
A16
A15
A13
D12
E11
G11
B14
A14
A11
C11

MB_DATA63
MB_DATA62
MB_DATA61
MB_DATA60
MB_DATA59
MB_DATA58
MB_DATA57
MB_DATA56
MB_DATA55
MB_DATA54
MB_DATA53
MB_DATA52
MB_DATA51
MB_DATA50
MB_DATA49
MB_DATA48
MB_DATA47
MB_DATA46
MB_DATA45
MB_DATA44
MB_DATA43
MB_DATA42
MB_DATA41
MB_DATA40
MB_DATA39
MB_DATA38
MB_DATA37
MB_DATA36
MB_DATA35
MB_DATA34
MB_DATA33
MB_DATA32
MB_DATA31
MB_DATA30
MB_DATA29
MB_DATA28
MB_DATA27
MB_DATA26
MB_DATA25
MB_DATA24
MB_DATA23
MB_DATA22
MB_DATA21
MB_DATA20
MB_DATA19
MB_DATA18
MB_DATA17
MB_DATA16
MB_DATA15
MB_DATA14
MB_DATA13
MB_DATA12
MB_DATA11
MB_DATA10
MB_DATA9
MB_DATA8
MB_DATA7
MB_DATA6
MB_DATA5
MB_DATA4
MB_DATA3
MB_DATA2
MB_DATA1
MB_DATA0

DDR_B_DM7
DDR_B_DM6
DDR_B_DM5
DDR_B_DM4
DDR_B_DM3
DDR_B_DM2
DDR_B_DM1
DDR_B_DM0

AD12
AC16
AE22
AB26
E25
A22
B16
A12

MB_DM7
MB_DM6
MB_DM5
MB_DM4
MB_DM3
MB_DM2
MB_DM1
MB_DM0

DDR_B_DQS7
DDR_B_DQS#7
DDR_B_DQS6
DDR_B_DQS#6
DDR_B_DQS5
DDR_B_DQS#5
DDR_B_DQS4
DDR_B_DQS#4
DDR_B_DQS3
DDR_B_DQS#3
DDR_B_DQS2
DDR_B_DQS#2
DDR_B_DQS1
DDR_B_DQS#1
DDR_B_DQS0
DDR_B_DQS#0

AF12
AE12
AE16
AD16
AF21
AF22
AC25
AC26
F26
E26
A24
A23
D16
C16
C12
B12

MB_DQS_H7
MB_DQS_L7
MB_DQS_H6
MB_DQS_L6
MB_DQS_H5
MB_DQS_L5
MB_DQS_H4
MB_DQS_L4
MB_DQS_H3
MB_DQS_L3
MB_DQS_H2
MB_DQS_L2
MB_DQS_H1
MB_DQS_L1
MB_DQS_H0
MB_DQS_L0

MA_DATA63
MA_DATA62
MA_DATA61
MA_DATA60
MA_DATA59
MA_DATA58
MA_DATA57
MA_DATA56
MA_DATA55
MA_DATA54
MA_DATA53
MA_DATA52
MA_DATA51
MA_DATA50
MA_DATA49
MA_DATA48
MA_DATA47
MA_DATA46
MA_DATA45
MA_DATA44
MA_DATA43
MA_DATA42
MA_DATA41
MA_DATA40
MA_DATA39
MA_DATA38
MA_DATA37
MA_DATA36
MA_DATA35
MA_DATA34
MA_DATA33
MA_DATA32
MA_DATA31
MA_DATA30
MA_DATA29
MA_DATA28
MA_DATA27
MA_DATA26
MA_DATA25
MA_DATA24
MA_DATA23
MA_DATA22
MA_DATA21
MA_DATA20
MA_DATA19
MA_DATA18
MA_DATA17
MA_DATA16
MA_DATA15
MA_DATA14
MA_DATA13
MA_DATA12
MA_DATA11
MA_DATA10
MA_DATA9
MA_DATA8
MA_DATA7
MA_DATA6
MA_DATA5
MA_DATA4
MA_DATA3
MA_DATA2
MA_DATA1
MA_DATA0

AA12
AB12
AA14
AB14
W11
Y12
AD13
AB13
AD15
AB15
AB17
Y17
Y14
W14
W16
AD17
Y18
AD19
AD21
AB21
AB18
AA18
AA20
Y20
AA22
Y22
W21
W22
AA21
AB22
AB24
Y24
H22
H20
E22
E21
J19
H24
F22
F20
C23
B22
F18
E18
E20
D22
C19
G18
G17
C17
F14
E14
H17
E17
E15
H15
E13
C13
H12
H11
G14
H14
F12
G12

DDR_A_D63
DDR_A_D62
DDR_A_D61
DDR_A_D60
DDR_A_D59
DDR_A_D58
DDR_A_D57
DDR_A_D56
DDR_A_D55
DDR_A_D54
DDR_A_D53
DDR_A_D52
DDR_A_D51
DDR_A_D50
DDR_A_D49
DDR_A_D48
DDR_A_D47
DDR_A_D46
DDR_A_D45
DDR_A_D44
DDR_A_D43
DDR_A_D42
DDR_A_D41
DDR_A_D40
DDR_A_D39
DDR_A_D38
DDR_A_D37
DDR_A_D36
DDR_A_D35
DDR_A_D34
DDR_A_D33
DDR_A_D32
DDR_A_D31
DDR_A_D30
DDR_A_D29
DDR_A_D28
DDR_A_D27
DDR_A_D26
DDR_A_D25
DDR_A_D24
DDR_A_D23
DDR_A_D22
DDR_A_D21
DDR_A_D20
DDR_A_D19
DDR_A_D18
DDR_A_D17
DDR_A_D16
DDR_A_D15
DDR_A_D14
DDR_A_D13
DDR_A_D12
DDR_A_D11
DDR_A_D10
DDR_A_D9
DDR_A_D8
DDR_A_D7
DDR_A_D6
DDR_A_D5
DDR_A_D4
DDR_A_D3
DDR_A_D2
DDR_A_D1
DDR_A_D0

MA_DM7
MA_DM6
MA_DM5
MA_DM4
MA_DM3
MA_DM2
MA_DM1
MA_DM0

Y13
AB16
Y19
AC24
F24
E19
C15
E12

DDR_A_DM7
DDR_A_DM6
DDR_A_DM5
DDR_A_DM4
DDR_A_DM3
DDR_A_DM2
DDR_A_DM1
DDR_A_DM0

MA_DQS_H7
MA_DQS_L7
MA_DQS_H6
MA_DQS_L6
MA_DQS_H5
MA_DQS_L5
MA_DQS_H4
MA_DQS_L4
MA_DQS_H3
MA_DQS_L3
MA_DQS_H2
MA_DQS_L2
MA_DQS_H1
MA_DQS_L1
MA_DQS_H0
MA_DQS_L0

W12
W13
Y15
W15
AB19
AB20
AD23
AC23
G22
G21
C22
C21
G16
G15
G13
H13

DDR_A_DQS7
DDR_A_DQS#7
DDR_A_DQS6
DDR_A_DQS#6
DDR_A_DQS5
DDR_A_DQS#5
DDR_A_DQS4
DDR_A_DQS#4
DDR_A_DQS3
DDR_A_DQS#3
DDR_A_DQS2
DDR_A_DQS#2
DDR_A_DQS1
DDR_A_DQS#1
DDR_A_DQS0
DDR_A_DQS#0

DDR_A_D[63..0]

4

3

DDR_A_DM[7..0]

DDR_A_DQS7
DDR_A_DQS#7
DDR_A_DQS6
DDR_A_DQS#6
DDR_A_DQS5
DDR_A_DQS#5
DDR_A_DQS4
DDR_A_DQS#4
DDR_A_DQS3
DDR_A_DQS#3
DDR_A_DQS2
DDR_A_DQS#2
DDR_A_DQS1
DDR_A_DQS#1
DDR_A_DQS0
DDR_A_DQS#0

10

2

10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10

Athlon 64 S1
Processor Socket

1
C104
1.5P_0402_50V8C

2

DDR_B_CLK#1

C105
1.5P_0402_50V8C
1

Compal Secret Data

Security Classification
2007/5/18

Issued Date

2009/06/11

Deciphered Date

Title

Compal Electronics, Inc.
SCHEMATIC,MB A4861

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
401650
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

A

10

CONN@ FOX_PZ63823-284S-41F

DDR_B_CLK1
1

1

C17
1.5P_0402_50V8C

DDR_B_DQS7
DDR_B_DQS#7
DDR_B_DQS6
DDR_B_DQS#6
DDR_B_DQS5
DDR_B_DQS#5
DDR_B_DQS4
DDR_B_DQS#4
DDR_B_DQS3
DDR_B_DQS#3
DDR_B_DQS2
DDR_B_DQS#2
DDR_B_DQS1
DDR_B_DQS#1
DDR_B_DQS0
DDR_B_DQS#0

JCPU1C
DDR_B_D63
DDR_B_D62
DDR_B_D61
DDR_B_D60
DDR_B_D59
DDR_B_D58
DDR_B_D57
DDR_B_D56
DDR_B_D55
DDR_B_D54
DDR_B_D53
DDR_B_D52
DDR_B_D51
DDR_B_D50
DDR_B_D49
DDR_B_D48
DDR_B_D47
DDR_B_D46
DDR_B_D45
DDR_B_D44
DDR_B_D43
DDR_B_D42
DDR_B_D41
DDR_B_D40
DDR_B_D39
DDR_B_D38
DDR_B_D37
DDR_B_D36
DDR_B_D35
DDR_B_D34
DDR_B_D33
DDR_B_D32
DDR_B_D31
DDR_B_D30
DDR_B_D29
DDR_B_D28
DDR_B_D27
DDR_B_D26
DDR_B_D25
DDR_B_D24
DDR_B_D23
DDR_B_D22
DDR_B_D21
DDR_B_D20
DDR_B_D19
DDR_B_D18
DDR_B_D17
DDR_B_D16
DDR_B_D15
DDR_B_D14
DDR_B_D13
DDR_B_D12
DDR_B_D11
DDR_B_D10
DDR_B_D9
DDR_B_D8
DDR_B_D7
DDR_B_D6
DDR_B_D5
DDR_B_D4
DDR_B_D3
DDR_B_D2
DDR_B_D1
DDR_B_D0

DDRII Data

+1.8V
4

B

C

D

Rev
D
Sheet

Friday, April 10, 2009
E

7

of

46

5

4

C116

C118

2
4.7U_0805_10V4Z

2

2

C22
0.22U_0603_16V4Z

+1.8V
JCPU1D

2

LDT_RST#
CPU_PWRGD
LDT_STOP#

A:PA_IXP600AD12
LDT_STOP#
R13

2

14,17 LDT_STOP#
R23
680_0402_5%

R61
R16

+1.2V_HT

CPU_SIC
1
300_0402_5%

2

1
1

B7
A7
F10

F6
E6

1

44 CPU_VCC_SENSE
44 CPU_VSS_SENSE
TP26

LDT_RST#
2

LDT_RST#

W9
Y9

TP3

R21
680_0402_5%

CPUCLK

2 3900P_0402_50V7K

1
C109

1

16

CPU_CLKIN_SC_P
CPU_CLKIN_SC_N

1

R22
169_0402_1%
2

A:PA_IXP600AD12
16

CPUCLK#

C23

1

2
3900P_0402_50V7K

A9
A8

C119
0.1U_0402_16V4Z
1
2

2200P_0402_50V7K

1
2

VDD

CPU_THERMDA

2

CPU_THERMDC

3

D-

4

THERM#

D+

SCLK

8

TMS
TCK
TRST_L
TDI

E9
E8
G9
H10
AA7
C2
D7
E7
F7
C7
AC8

TEST25_H
TEST25_L
TEST19
TEST18
TEST13
TEST9
TEST17
TEST16
TEST15
TEST14
TEST12

C3
AA6
W7
W8
Y6
AB6

TEST7
TEST6
THERMDC
THERMDA
TEST3
TEST2

P20
P19
N20
N19

RSVD0
RSVD1
RSVD2
RSVD3

SDATA

7

ALERT#

6

GND

5

EC_SMB_CK2 28
EC_SMB_DA2 28

ADM1032ARMZ-2REEL_MSOP8
R26
R25
P22
R22

F75383M_MSOP8
B

SMBus Address: 1001110X (b)

CPU_VID1
CPU_PRESENT#

PSI_L

A5
C6
A6
A4
C5
B5

CPU_VID5
CPU_VID4
CPU_VID3
CPU_VID2
CPU_VID1
CPU_VID0

44
44
44
44
44
44

CPU_TEST21_SCANEN

PSI_L

RSVD4
RSVD5
RSVD6
RSVD7

DBREQ_L

E10

CPU_DBREQ#

TDO

AE9

CPU_TDO

TEST29_H
TEST29_L

1
R24
1
R64
1
R27

2
300_0402_5%
2
1K_0402_5%
2
300_0402_5%

1
R47

2
300_0402_5%

VID1: For compatibility
with future processors

D

AC6 CPU_PRESENT#
A3

44

+1.8V

CLKIN_H
CLKIN_L

AA9
AC9
AD9
AF9

CPU_THERMDC
CPU_THERMDA

CPU_THERMTRIP#_R
CPU_PROCHOT#_1.8

VDDIO_FB_H
VDDIO_FB_L

CPU_TMS
CPU_TCK
CPU_TRST#
CPU_TDI

U3

1

CPU_PRESENT_L
VDD_FB_H
VDD_FB_L

DBRDY

+3VS

C120

HTREF1
HTREF0

G10

TP5
TP30
TP8
TP28
TP31

AF6
AC7

CPU_TEST26_BURNIN#
VID5
VID4
VID3
VID2
VID1
VID0

SIC
SID

CPU_DBRDY

CPU_TEST25_H_BYPASSCLK_H
CPU_TEST25_L_BYPASSCLK_L
CPU_TEST19_PLLTEST0
CPU_TEST18_PLLTEST1

C

THERMTRIP_L
PROCHOT_L

RESET_L
PWROK
LDTSTOP_L

R61&R16 close to CPU within 1"

A:PA_IXP600AD12

17

AF4
AF5

2 44.2_0402_1% CPU_HTREF1 P6
2 44.2_0402_1% CPU_HTREF0 R6

VDDA2
VDDA1

C9
C8

CPU_TEST29_H_FBCLKOUT_P
CPU_TEST29_L_FBCLKOUT_N

2
R65

CPU_TEST25_H_BYPASSCLK_H
1
510_0402_5%

2
R68
2
R69
2
R66

CPU_TEST25_L_BYPASSCLK_L
1
510_0402_5%
CPU_TEST19_PLLTEST0
1
300_0402_5%
CPU_TEST18_PLLTEST1
1
300_0402_5%

R53
80.6_0402_1%
1
2

C

ROUTE AS 80 Ohm DIFFERENTIAL PAIR
PLACE IT CLOSE TO CPU WITHIN 1"
TEST24
TEST23
TEST22
TEST21
TEST20

AE7
AD7
AE8
AB8
AF7

TEST28_H
TEST28_L
TEST27
TEST26
TEST10
TEST8

J7
H8
AF8
AE6
K8
C4

RSVD8
RSVD9

H16
B18

RSVD10
RSVD11

B3
C1

RSVD12
RSVD13
RSVD14

H6
G6
D5

RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20

R24
W18
R23
AA8
H18
H19

TP6
TP7
TP9
CPU_TEST21_SCANEN
TP29

CPU_TEST26_BURNIN#

+1.8V
+3VALW
+1.8V

+3VALW
1

F8
F9

R18
1K_0402_5%

R8
300_0402_5%

R25
@ 1K_0402_5%
B

@

Q2
MMBT3904_NL_SOT23-3
1
MAINPWON 39,41
C

3

C

3

2

2
CPU_THERMTRIP#_R

E

Q3
1H_THERMTRIP#

E

FOX_PZ63823-284S-41F
CONN@

B

10K_0402_5%

B

R17
2 2

R54
680_0402_5%

1

1

D

1

+
2

2

CPU_PWRGD

17 CPU_PWRGD

+2.5VDDA
VDDA=300mA
L4
3300P_0402_50V7K
1
2
FCM2012CF-800T06_2P
1
1
1

2

1

C113
150U_D2_6.3VM

1

1

A:Need to re-Link "SGN00000200"

2

MISC

+2.5VS

3

MMBT3904_NL_SOT23-3
H_THERMTRIP# 17

+1.8V

AMD: suggest DBREQ need pull high

1

1

@

R20
@ 4.7K_0402_5%

+3VS

2
CPU_PROCHOT#_1.8

5
P
4

U51
NC7SZ08P5X_NL_SC70-5

@ SAMTEC_ASP-68200-07

B

2

A

1

Y
G

HDT_RST#

2

R52
300_0402_5%

2

2

1

10K_0402_5%

Q4
3
1
@ MMBT3904_NL_SOT23-3

EC_THERM# 18,28
A

LDT_RST#
SB_PWROK 17,28,33

3

2
4
6
8
10
12
14
16
18
20
22
24
26

C

NOTE: HDT TERMINATION IS REQUIRED
FOR REV. Ax SILICON ONLY.

1
3
5
7
9
11
13
15
17
19
21
23

R19

E

A

+3VS
+1.8V

JP3

B

CPU_DBREQ#
CPU_DBRDY
CPU_TCK
CPU_TMS
CPU_TDI
CPU_TRST#
CPU_TDO

2
1
@ 220_0402_5% R33
2
1
@ 220_0402_5% R38
2
1
@ 220_0402_5% R34
2
1
@ 220_0402_5% R35
2
1
220_0402_5% R36

+1.8V

HDT Connector

2007/5/18

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2009/06/11

Deciphered Date

Title

SCHEMATIC,MB A4861

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev
D

401650

Date:

5

4

3

2

Sheet

Friday, April 10, 2009
1

8

of

46

5

4

3

2

1

VDD(+CPU_CORE) decoupling.
D

1

+

+

C26
330U_D2E_2.5VM_R9M

2

2

1

1

+

C32
330U_D2E_2.5VM_R9M
@

C27
330U_D2E_2.5VM_R9M

2

1

+ C28
330U_D2E_2.5VM_R9M
2

1

+

+
C29
330U_D2E_2.5VM_R9M

2

2

C30
330U_D2E_2.5VM_R9M
@

Near CPU Socket
+CPU_CORE

1

C33
22U_0805_6.3V6M

2

1

C36
22U_0805_6.3V6M

2

1

C34
22U_0805_6.3V6M

2

+CPU_CORE

1

1

C35
22U_0805_6.3V6M

2

1

1

C151
0.22U_0603_16V4Z

C178
22U_0805_6.3V6M

2

+CPU_CORE

C129
0.22U_0603_16V4Z

1

1

C41
22U_0805_6.3V6M

2

1

C190
22U_0805_6.3V6M

2

1

C39
22U_0805_6.3V6M

2

1

C128
22U_0805_6.3V6M

2

+CPU_CORE

1

C122
0.01U_0402_25V7K

C47
180P_0402_50V8J

C

2

2

2

2

Under CPU Socket

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VDD23
VDD24
VDD25
VDD26
VDD27
VDD28
VDD29
VDD30
VDD31
VDD32
VDD33
VDD34
VDD35
VDD36
VDD37
VDD38
VDD39
VDD40
VDD41
VDD42

Power

JCPU1E
AC4
AD2
G4
H2
J9
J11
J13
K6
K10
K12
K14
L4
L7
L9
L11
L13
M2
M6
M8
M10
N7
N9
N11
P8
P10
R4
R7
R9
R11
T2
T6
T8
T10
T12
T14
U7
U9
U11
U13
V6
V8
V10

+CPU_CORE

1

AA4
AA11
AA13
AA15
AA17
AA19
AB2
AB7
AB9
AB23
AB25
AC11
AC13
AC15
AC17
AC19
AC21
AD6
AD8
AD25
AE11
AE13
AE15
AE17
AE19
AE21
AE23
B4
B6
B8
B9
B11
B13
B15
B17
B19
B21
B23
B25
D6
D8
D9
D11
D13
D15
D17
D19
D21
D23
D25
E4
F2
F11
F13
F15
F17
F19
F21
F23
F25
H7
H9
H21
H23
J4

+CPU_CORE
VDD43
VDD44
VDD45
VDD46
VDD47
VDD48
VDD49
VDD50
VDD51
VDD52
VDD53
VDD54

V12
V14
W4
Y2
J15
K16
L15
M16
P16
T16
U15
V16

VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO6
VDDIO7
VDDIO8
VDDIO9
VDDIO10
VDDIO11
VDDIO12
VDDIO13
VDDIO14
VDDIO15
VDDIO16
VDDIO17
VDDIO18
VDDIO19
VDDIO20
VDDIO21
VDDIO22
VDDIO23
VDDIO24
VDDIO25
VDDIO26
VDDIO27

H25
J17
K18
K21
K23
K25
L17
M18
M21
M23
M25
N17
P18
P21
P23
P25
R17
T18
T21
T23
T25
U17
V18
V21
V23
V25
Y25

+1.8V

FOX_PZ63823-284S-41F
CONN@

VDDIO decoupling.

Athlon 64 S1
Processor Socket

+1.8V
+1.8V

1

C170
22U_0805_6.3V6M

2

1

1

C181
22U_0805_6.3V6M

2

C124
0.22U_0603_16V4Z

2

1

C147
0.22U_0603_16V4Z

2

+1.8V

150U_D2_6.3VM

C157
0.22U_0603_16V4Z

C182
0.22U_0603_16V4Z

2

C68
0.22U_0603_16V4Z

2

+1.8V

1

C188
0.22U_0603_16V4Z

+1.8V

C175
0.01U_0402_25V7K

2

1

1

C159
0.01U_0402_25V7K

2

1

180PF Qt'y follow the distance between
CPU socket and DIMM0. <2.5inch>
1

C189
180P_0402_50V8J

2

1

C136
180P_0402_50V8J

2

C156
180P_0402_50V8J

2

A

2

1

2

C155
4.7U_0805_10V4Z

C76
4.7U_0805_10V4Z

2

1
C167
4.7U_0805_10V4Z

2

1
C187
4.7U_0805_10V4Z

2

+
C132
4.7U_0805_10V4Z

2

1

C146
4.7U_0805_10V4Z

2

C158
180P_0402_50V8J

1

C184
0.22U_0603_16V4Z

2

1

C173
0.22U_0603_16V4Z

2

1

C72
1000P_0402_50V7K

2

1

C145
1000P_0402_50V7K

2

1

1

C180
180P_0402_50V8J

2

C121
180P_0402_50V8J

2

Near CPU Socket Right side.
+0.9V

1
1
1

2

+0.9V

+1.8V

1

B

C: Change to NBO CAP

2

2
1

1
C66 +

Between CPU Socket and DIMM

2

C

Near Power Supply

VTT decoupling.

B

1

D

Athlon 64 S1
Processor Socket

+0.9V

1

J6
J8
J10
J12
J14
J16
J18
K2
K7
K9
K11
K13
K15
K17
L6
L8
L10
L12
L14
L16
L18
M7
M9
M11
M17
N4
N8
N10
N16
N18
P2
P7
P9
P11
P17
R8
R10
R16
R18
T7
T9
T11
T13
T15
T17
U4
U6
U8
U10
U12
U14
U16
U18
V2
V7
V9
V11
V13
V15
V17
W6
Y21
Y23
N6

VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129

FOX_PZ63823-284S-41F
CONN@

Under CPU Socket

1

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65

Ground

JCPU1F
+CPU_CORE

C73
4.7U_0805_10V4Z

2

1

C70
4.7U_0805_10V4Z

2

1

2

C127
0.22U_0603_16V4Z

1

C185
0.22U_0603_16V4Z

2

1

C164
1000P_0402_50V7K

2

1

C163
1000P_0402_50V7K

2

1

1

C152
180P_0402_50V8J

2

C179
180P_0402_50V8J

2

C162
220U_D2_4VM_R15

A

Near CPU Socket Left side.

2007/5/18

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2009/06/11

Deciphered Date

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SCHEMATIC,MB A4861
Rev
D

401650

Date:

5

4

3

2

Sheet

Friday, April 10, 2009
1

9

of

46

4

3

+DIMM_VREF

DDR_A_D2
DDR_A_D3
DDR_A_D8
DDR_A_D9
DDR_A_DQS#1
DDR_A_DQS1
DDR_A_D10
DDR_A_D11

DDR_A_D16
DDR_A_D17
DDR_A_DQS#2
DDR_A_DQS2
DDR_A_D18
DDR_A_D19
DDR_A_D24
DDR_A_D25
C

DDR_A_DM3
DDR_A_D26
DDR_A_D27
7 DDR_CKE0_DIMMA
7 DDR_CS2_DIMMA#
7 DDR_A_BS#2

DDR_CKE0_DIMMA
DDR_CS2_DIMMA#
DDR_A_BS#2
DDR_A_MA12
DDR_A_MA9
DDR_A_MA8
DDR_A_MA5
DDR_A_MA3
DDR_A_MA1
DDR_A_MA10
DDR_A_BS#0
DDR_A_WE#

7 DDR_A_BS#0
7 DDR_A_WE#
7 DDR_A_CAS#
7 DDR_CS1_DIMMA#

DDR_A_CAS#
DDR_CS1_DIMMA#
DDR_A_ODT1

7 DDR_A_ODT1

DDR_A_D32
DDR_A_D33
B

DDR_A_DQS#4
DDR_A_DQS4
DDR_A_D34
DDR_A_D35
DDR_A_D40
DDR_A_D41
DDR_A_DM5
DDR_A_D42
DDR_A_D43
DDR_A_D48
DDR_A_D49

DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D50
DDR_A_D51
DDR_A_D56
DDR_A_D57
DDR_A_DM7
A

DDR_A_D58
DDR_A_D59
11,16,18,31 SB_CK_SDAT
11,16,18,31 SB_CK_SCLK

SB_CK_SDAT
SB_CK_SCLK
+3VS
1

2

C448
0.1U_0402_16V4Z

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
203

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS

VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
GND

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
204

VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1
GND

DDR_A_D4
DDR_A_D5
DDR_A_DM0
DDR_A_D6
DDR_A_D7
DDR_A_D12
DDR_A_D13

2

1

2

DDR_A_CLK1
DDR_A_CLK#1

1
C139

1
C192
1
C88

2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z

1
C117
1
C144

2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z

1
C114
1
C95

2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z

DDR_A_MA1
DDR_A_MA10
DDR_A_BS#0

47_0804_8P4R_5%
RP5
8
1
7
2
6
3
5
4

1
C193
1
C125

2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z

DDR_A_WE#
DDR_A_CAS#
DDR_CS1_DIMMA#
DDR_A_ODT1

47_0804_8P4R_5%
RP6
8
1
7
2
6
3
5
4

1
C103
1
C99

2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z

DDR_A_RAS#
DDR_A_ODT0
DDR_A_MA13
DDR_CS3_DIMMA#

47_0804_8P4R_5%
RP7
8
1
7
2
6
3
5
4

1
C107
1
C98

2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z

47_0804_8P4R_5%
RP8
8
1
7
2
6
3
5
4

1
C101
1
C191

2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z

DDR_CKE0_DIMMA
DDR_CS2_DIMMA#
DDR_A_BS#2
DDR_A_MA12

R397

DDR_A_MA4
DDR_A_MA0
DDR_A_BS#1
DDR_CS0_DIMMA#

DDR_A_CLK1 7
DDR_A_CLK#1 7

DDR_A_D20
DDR_A_D21
DDR_A_DM2

DDR_A_MA9
DDR_A_MA8
DDR_A_MA5
DDR_A_MA3
DDR_A_D[0..63]

7 DDR_A_D[0..63]

DDR_A_DM[0..7]

7 DDR_A_DM[0..7]

DDR_A_DQS[0..7]

7 DDR_A_DQS[0..7]

DDR_A_D22
DDR_A_D23

7 DDR_A_MA[0..15]

DDR_A_D28
DDR_A_D29

7 DDR_A_DQS#[0..7]

DDR_A_MA[0..15]
DDR_A_DQS#[0..7]

DDR_A_DQS#3
DDR_A_DQS3
DDR_A_D30
DDR_A_D31
DDR_CKE1_DIMMA

DDR_CKE1_DIMMA 7

DDR_A_MA15
DDR_A_MA14
DDR_A_MA11
DDR_A_MA7
DDR_A_MA6

DDR_CKE1_DIMMA
DDR_A_MA15
DDR_A_MA14

DDR_A_MA4
DDR_A_MA2
DDR_A_MA0

8
7
6
5

1
2
3
4

C81

47_0804_8P4R_5%
RP2
8
1
7
2
6
3
5
4

1

D

47_0804_8P4R_5%
RP3
8
1
7
2
6
3
5
4
47_0804_8P4R_5%
RP4
8
1
7
2
6
3
5
4

C

47_0804_8P4R_5%
DDR_A_BS#1
DDR_A_RAS#
DDR_CS0_DIMMA#
DDR_A_ODT0
DDR_A_MA13
DDR_CS3_DIMMA#

DDR_A_BS#1 7
DDR_A_RAS# 7
DDR_CS0_DIMMA# 7
DDR_A_ODT0 7
DDR_CS3_DIMMA# 7

DDR_A_D36
DDR_A_D37
B

DDR_A_DM4
DDR_A_D38
DDR_A_D39
DDR_A_D44
DDR_A_D45
DDR_A_DQS#5
DDR_A_DQS5
DDR_A_D46
DDR_A_D47
DDR_A_D52
DDR_A_D53
DDR_A_CLK2
DDR_A_CLK#2

DDR_A_CLK2 7
DDR_A_CLK#2 7

DDR_A_DM6
DDR_A_D54
DDR_A_D55
DDR_A_D60
DDR_A_D61
DDR_A_DQS#7
DDR_A_DQS7

A

DDR_A_D62
DDR_A_D63
R12
R10

1
1

2 10K_0402_5%
2 10K_0402_5%

Compal Electronics, Inc.

Compal Secret Data

Security Classification
Issued Date

4

1K_0402_1%

2
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z

DDR_A_D14
DDR_A_D15

FOX_AS0A426-M2RN-7F
CONN@

JAWD0 used

RP1
DDR_A_MA11
DDR_A_MA7
DDR_A_MA6
DDR_A_MA2

1K_0402_1%

DDR_A_DM1

DIMM1 REV H:5.2mm (BOT)
5

1

+1.8V

+0.9V
R398

2

DDR_A_DQS#0
DDR_A_DQS0

VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS

4.7U_0805_10V4Z

D

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

C503

DDR_A_D0
DDR_A_D1

C507

0.1U_0402_16V4Z

JDIMM2

1

+1.8V

1

+1.8V

2

+1.8V

2

1

5

2005/10/11

2009/06/11

Deciphered Date

Title

SCHEMATIC,MB A4861

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

3

2

Rev
D

401650
Sheet

Tuesday, April 14, 2009
1

10

of

46

5

4

3

+1.8V

+1.8V

2

1

+DIMM_VREF
+1.8V

+0.9V
RP9

DDR_B_D8
DDR_B_D9
DDR_B_DQS#1
DDR_B_DQS1
DDR_B_D10
DDR_B_D11

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

DDR_B_D4
DDR_B_D5
DDR_B_DM0
DDR_B_D6
DDR_B_D7

1

2

1

C198

DDR_B_D2
DDR_B_D3

VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS

C202

DDR_B_DQS#0
DDR_B_DQS0

VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS

0.1U_0402_16V4Z

D

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

4.7U_0805_10V4Z

JDIMM1
DDR_B_D0
DDR_B_D1

DDR_B_MA2
DDR_B_MA0
DDR_B_BS#1
DDR_B_RAS#

8
7
6
5

1
2
3
4

2
C196
1
C209

1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z

2
C197
1
C211

1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z

2
C205
1
C213

1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z

2
C199
1
C200

1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z

2
C206
1
C201

1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z

47_0804_8P4R_5%

2

D

RP10
DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
DDR_B_MA4

DDR_B_D12
DDR_B_D13

8
7
6
5

1
2
3
4

47_0804_8P4R_5%
DDR_B_DM1
RP11
DDR_B_CLK1
DDR_B_CLK#1

DDR_B_CLK1 7
DDR_B_CLK#1 7

DDR_CS2_DIMMB#
DDR_B_BS#2
DDR_CKE0_DIMMB

DDR_B_D14
DDR_B_D15

8
7
6
5

1
2
3
4

47_0804_8P4R_5%
RP12

DDR_B_D16
DDR_B_D17
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_D18
DDR_B_D19
DDR_B_D24
DDR_B_D25
C

DDR_B_DM3
DDR_B_D26
DDR_B_D27
7 DDR_CKE0_DIMMB
7 DDR_CS2_DIMMB#
7 DDR_B_BS#2

DDR_CKE0_DIMMB
DDR_CS2_DIMMB#
DDR_B_BS#2
DDR_B_MA12
DDR_B_MA9
DDR_B_MA8
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1
DDR_B_MA10
DDR_B_BS#0
DDR_B_WE#

7 DDR_B_BS#0
7 DDR_B_WE#
7 DDR_B_CAS#
7 DDR_CS1_DIMMB#

DDR_B_CAS#
DDR_CS1_DIMMB#
DDR_B_ODT1

7 DDR_B_ODT1

DDR_B_D32
DDR_B_D33
B

DDR_B_DQS#4
DDR_B_DQS4
DDR_B_D34
DDR_B_D35
DDR_B_D40
DDR_B_D41
DDR_B_DM5
DDR_B_D42
DDR_B_D43
DDR_B_D48
DDR_B_D49

DDR_B_DQS#6
DDR_B_DQS6
DDR_B_D50
DDR_B_D51
DDR_B_D56
DDR_B_D57
DDR_B_DM7
A

DDR_B_D58
DDR_B_D59
10,16,18,31 SB_CK_SDAT
10,16,18,31 SB_CK_SCLK

SB_CK_SDAT
SB_CK_SCLK
+3VS
1

2

C21
0.1U_0402_16V4Z

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201

VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
GND

VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1
GND

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202

DDR_B_MA5
DDR_B_MA8
DDR_B_MA9
DDR_B_MA12

DDR_B_D20
DDR_B_D21
DDR_B_DM2

7 DDR_B_DM[0..7]

DDR_B_D28
DDR_B_D29

7 DDR_B_DQS[0..7]
7 DDR_B_MA[0..15]

DDR_B_DQS#3
DDR_B_DQS3

7 DDR_B_DQS#[0..7]

4

47_0804_8P4R_5%

DDR_B_DM[0..7]

RP13
DDR_B_BS#0
DDR_B_MA10
DDR_B_MA1
DDR_B_MA3

DDR_B_DQS[0..7]
DDR_B_MA[0..15]
DDR_B_DQS#[0..7]

8
7
6
5

1
2
3
4

C

47_0804_8P4R_5%

DDR_B_D30
DDR_B_D31
DDR_CKE1_DIMMB

DDR_B_ODT1
DDR_CS1_DIMMB#
DDR_B_CAS#
DDR_B_WE#

DDR_CKE1_DIMMB 7

DDR_B_MA15
DDR_B_MA14

8
7
6
5

1
2
3
4

2
C210
1
C208

1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z

2
C194
1
C207

1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z

2
C212
1
C195

1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z

47_0804_8P4R_5%
RP15

DDR_B_MA11
DDR_B_MA7
DDR_B_MA6

DDR_CS0_DIMMB#
DDR_B_ODT0
DDR_B_MA13
DDR_CS3_DIMMB#

DDR_B_MA4
DDR_B_MA2
DDR_B_MA0

8
7
6
5

1
2
3
4

47_0804_8P4R_5%
RP16

DDR_B_BS#1
DDR_B_RAS#
DDR_CS0_DIMMB#
DDR_B_ODT0
DDR_B_MA13
DDR_CS3_DIMMB#

DDR_B_BS#1 7
DDR_B_RAS# 7
DDR_CS0_DIMMB# 7

DDR_CKE1_DIMMB
DDR_B_MA15
DDR_B_MA14

DDR_B_ODT0 7

8
7
6
5

1
2
3
4

47_0804_8P4R_5%

DDR_CS3_DIMMB# 7

DDR_B_D36
DDR_B_D37
B

DDR_B_DM4
DDR_B_D38
DDR_B_D39
DDR_B_D44
DDR_B_D45
DDR_B_DQS#5
DDR_B_DQS5
DDR_B_D46
DDR_B_D47
DDR_B_D52
DDR_B_D53
DDR_B_CLK2
DDR_B_CLK#2

DDR_B_CLK2 7
DDR_B_CLK#2 7

DDR_B_DM6
DDR_B_D54
DDR_B_D55
DDR_B_D60
DDR_B_D61
DDR_B_DQS#7
DDR_B_DQS7

A

DDR_B_D62
DDR_B_D63
R11
R9

1
1

2 10K_0402_5%
2 10K_0402_5%

+3VS

DIMM2 REV H:9.2mm (BOT)
5

1
2
3
4

RP14

FOX_AS0A426-MARG-7F
CONN@

JAWD0 used

DDR_B_D[0..63]

7 DDR_B_D[0..63]

DDR_B_D22
DDR_B_D23

8
7
6
5

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2005/10/11

2009/06/11

Deciphered Date

Title

SCHEMATIC,MB A4861

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

3

2

Rev
D

401650
Sheet

Tuesday, April 14, 2009
1

11

of

46

5

4

3

2

1

U39A

C

6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6

H_CADOP15
H_CADON15
H_CADOP14
H_CADON14
H_CADOP13
H_CADON13
H_CADOP12
H_CADON12
H_CADOP11
H_CADON11
H_CADOP10
H_CADON10
H_CADOP9
H_CADON9
H_CADOP8
H_CADON8

6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6

H_CADOP7
H_CADON7
H_CADOP6
H_CADON6
H_CADOP5
H_CADON5
H_CADOP4
H_CADON4
H_CADOP3
H_CADON3
H_CADOP2
H_CADON2
H_CADOP1
H_CADON1
H_CADOP0
H_CADON0

6
6

H_CLKOP1
H_CLKON1

6
6

H_CLKOP0
H_CLKON0

6
6

H_CTLOP0
H_CTLON0

+VDDHT_PKG

R382 1
R380 1

H_CADOP15
H_CADON15
H_CADOP14
H_CADON14
H_CADOP13
H_CADON13
H_CADOP12
H_CADON12
H_CADOP11
H_CADON11
H_CADOP10
H_CADON10
H_CADOP9
H_CADON9
H_CADOP8
H_CADON8

R19
R18
R21
R22
U22
U21
U18
U19
W19
W20
AC21
AB22
AB20
AA20
AA19
Y19

HT_RXCAD15P
HT_RXCAD15N
HT_RXCAD14P
HT_RXCAD14N
HT_RXCAD13P
HT_RXCAD13N
HT_RXCAD12P
HT_RXCAD12N
HT_RXCAD11P
HT_RXCAD11N
HT_RXCAD10P
HT_RXCAD10N
HT_RXCAD9P
HT_RXCAD9N
HT_RXCAD8P
HT_RXCAD8N

H_CADOP7
H_CADON7
H_CADOP6
H_CADON6
H_CADOP5
H_CADON5
H_CADOP4
H_CADON4
H_CADOP3
H_CADON3
H_CADOP2
H_CADON2
H_CADOP1
H_CADON1
H_CADOP0
H_CADON0

T24
R25
U25
U24
V23
U23
V24
V25
AA25
AA24
AB23
AA23
AB24
AB25
AC24
AC25

HT_RXCAD7P
HT_RXCAD7N
HT_RXCAD6P
HT_RXCAD6N
HT_RXCAD5P
HT_RXCAD5N
HT_RXCAD4P
HT_RXCAD4N
HT_RXCAD3P
HT_RXCAD3N
HT_RXCAD2P
HT_RXCAD2N
HT_RXCAD1P
HT_RXCAD1N
HT_RXCAD0P
HT_RXCAD0N

H_CLKOP1
H_CLKON1

W21
W22

HT_RXCLK1P
HT_RXCLK1N

H_CLKOP0
H_CLKON0

Y24
W25

H_CTLOP0
H_CTLON0

P24
P25

HT_RXCTLP
HT_RXCTLN

A24
C24

HT_RXCALP
HT_RXCALN

2 49.9_0402_1%
2 49.9_0402_1%

HT_RXCALP
HT_RXCALN

HT_RXCLK0P
HT_RXCLK0N

PART 1 OF 5

HYPER TRANSPORT I/F

D

HT_TXCAD15P
HT_TXCAD15N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD9P
HT_TXCAD9N
HT_TXCAD8P
HT_TXCAD8N

P21
P22
P18
P19
M22
M21
M18
M19
L18
L19
G22
G21
J20
J21
F21
F22

H_CADIP15
H_CADIN15
H_CADIP14
H_CADIN14
H_CADIP13
H_CADIN13
H_CADIP12
H_CADIN12
H_CADIP11
H_CADIN11
H_CADIP10
H_CADIN10
H_CADIP9
H_CADIN9
H_CADIP8
H_CADIN8

HT_TXCAD7P
HT_TXCAD7N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD0P
HT_TXCAD0N

N24
N25
L25
M24
K25
K24
J23
K23
G25
H24
F25
F24
E23
F23
E24
E25

H_CADIP7
H_CADIN7
H_CADIP6
H_CADIN6
H_CADIP5
H_CADIN5
H_CADIP4
H_CADIN4
H_CADIP3
H_CADIN3
H_CADIP2
H_CADIN2
H_CADIP1
H_CADIN1
H_CADIP0
H_CADIN0

HT_TXCLK1P
HT_TXCLK1N

L21
L22

H_CLKIP1
H_CLKIN1

HT_TXCLK0P
HT_TXCLK0N

J24
J25

H_CLKIP0
H_CLKIN0

HT_TXCTLP
HT_TXCTLN

N23
P23

H_CTLIP0
H_CTLIN0

HT_TXCALP
HT_TXCALN

C25
D24

HT_TXCALP
HT_TXCALN

H_CADIP15
H_CADIN15
H_CADIP14
H_CADIN14
H_CADIP13
H_CADIN13
H_CADIP12
H_CADIN12
H_CADIP11
H_CADIN11
H_CADIP10
H_CADIN10
H_CADIP9
H_CADIN9
H_CADIP8
H_CADIN8

6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6

H_CADIP7
H_CADIN7
H_CADIP6
H_CADIN6
H_CADIP5
H_CADIN5
H_CADIP4
H_CADIN4
H_CADIP3
H_CADIN3
H_CADIP2
H_CADIN2
H_CADIP1
H_CADIN1
H_CADIP0
H_CADIN0

6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6

D

C

H_CLKIP1 6
H_CLKIN1 6
H_CLKIP0 6
H_CLKIN0 6
H_CTLIP0 6
H_CTLIN0 6
1 R379
2
100_0402_1%

216MQA6AVA11FG_FCBGA465_RS690M

RS690MC : SA00001I480 / S IC 216LQA6AVA12FG RS690MC BGA 465P 0FA

B

B

A

A

2005/03/08

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2009/06/11

Deciphered Date

Title

SCHEMATIC,MB A4861

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

Rev
D

401650
Sheet

Tuesday, April 14, 2009
1

12

of

46

5

4

3

2

1

U39B

WLAN

PCIE_MRX_PTX_P2
PCIE_MRX_PTX_N2

31 PCIE_MRX_PTX_P2
31 PCIE_MRX_PTX_N2

LAN

25 PCIE_MRX_C_PTX_P3
25 PCIE_MRX_C_PTX_N3
17 A_MRX_STX_P2
17 A_MRX_STX_N2

C

A-Link

17 A_MRX_STX_P3
17 A_MRX_STX_N3

17 A_MRX_STX_P0
17 A_MRX_STX_N0
17 A_MRX_STX_P1
17 A_MRX_STX_N1

GFX_RX0P
GFX_RX0N
GFX_RX1P
GFX_RX1N
GFX_RX2P
GFX_RX2N
GFX_RX3P
GFX_RX3N
GFX_RX4P
GFX_RX4N
GFX_RX5P
GFX_RX5N
GFX_RX6P
GFX_RX6N
GFX_RX7P
GFX_RX7N
GFX_RX8P
GFX_RX8N
GFX_RX9P
GFX_RX9N
GFX_RX10P
GFX_RX10N
GFX_RX11P
GFX_RX11N
GFX_RX12P
GFX_RX12N
GFX_RX13P
GFX_RX13N
GFX_RX14P
GFX_RX14N
GFX_RX15P
GFX_RX15N

Y7
AA7

GPP_RX2P
GPP_RX2N

PART 2 OF 5

PCIE GFX I/F

D

G5
G4
J8
J7
J4
J5
L8
L7
L4
L5
M8
M7
M4
M5
P8
P7
P4
P5
R4
R5
R7
R8
U4
U5
W4
W5
Y4
Y5
V9
W9
AB7
AB6

GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N

J1
H2
K2
K1
K3
L3
L1
L2
N2
N1
P2
P1
P3
R3
R1
R2
T2
U1
V2
V1
V3
W3
W1
W2
Y2
AA1
AA2
AB2
AB1
AC1
AE3
AE4

GPP_TX2P
GPP_TX2N

AD4
AE5

PCIE_MTX_PRX_P2
PCIE_MTX_PRX_N2

C457 1
C458 1

2 0.1U_0402_16V7K
2 0.1U_0402_16V7K

PCIE_MTX_C_PRX_P2
PCIE_MTX_C_PRX_N2

GPP_TX3P
GPP_TX3N

AD5
AD6

PCIE_MTX_PRX_P3
PCIE_MTX_PRX_N3

C466 1
C467 1

2 0.1U_0402_16V7K
2 0.1U_0402_16V7K

PCIE_MTX_C_PRX_P3
PCIE_MTX_C_PRX_N3

D

PCIE_MRX_C_PTX_P3
PCIE_MRX_C_PTX_N3

AB9
AA9

GPP_RX3P
GPP_RX3N

A_MRX_STX_P2
A_MRX_STX_N2

W11
W12

GPP_RX0P(SB_RX2P)
GPP_RX0N(SB_RX2N)

GPP_TX0P(SB_TX2P)
GPP_TX0N(SB_TX2N)

AD8
AE8

A_MTX_SRX_P2
A_MTX_SRX_N2

C659 1
C660 1

2 0.1U_0402_16V7K
2 0.1U_0402_16V7K

A_MTX_C_SRX_P2
A_MTX_C_SRX_N2

A_MRX_STX_P3
A_MRX_STX_N3

AA11
AB11

GPP_RX1P(SB_RX3P)
GPP_RX1N(SB_RX3N)

GPP_TX1P(SB_TX3P)
GPP_TX1N(SB_TX3N)

AD7
AE7

A_MTX_SRX_P3
A_MTX_SRX_N3

C661 1
C662 1

2 0.1U_0402_16V7K
2 0.1U_0402_16V7K

A_MTX_C_SRX_P3
A_MTX_C_SRX_N3

A_MRX_STX_P0
A_MRX_STX_N0

W14
W15

SB_RX0P
SB_RX0N

SB_TX0P
SB_TX0N

AE9
AD10

A_MTX_SRX_P0
A_MTX_SRX_N0

C465 1
C464 1

2 0.1U_0402_16V7K
2 0.1U_0402_16V7K

A_MTX_C_SRX_P0
A_MTX_C_SRX_N0

A_MRX_STX_P1
A_MRX_STX_N1

AB12
AA12

SB_RX1P
SB_RX1N

SB_TX1P
SB_TX1N

AC8
AD9

A_MTX_SRX_P1
A_MTX_SRX_N1

C468 1
C469 1

2 0.1U_0402_16V7K
2 0.1U_0402_16V7K

A_MTX_C_SRX_P1
A_MTX_C_SRX_N1

AD11
AE11

R375 1
R376 1

AA14, AB14 NC
for RS690

AA14
AB14

PCIE I/F GPP

PCIE I/F SB

PCE_ISET(NC)
PCE_TXISET(NC)

PCE_PCAL(PCE_CALRP)
PCE_NCAL(PCE_CALRN)

2
2

562_0402_1%
2K_0402_1%

PCIE_MTX_C_PRX_P2 31
PCIE_MTX_C_PRX_N2 31

WLAN

PCIE_MTX_C_PRX_P3 25
PCIE_MTX_C_PRX_N3 25

LAN

A_MTX_C_SRX_P2 17
A_MTX_C_SRX_N2 17

C

A_MTX_C_SRX_P3 17
A_MTX_C_SRX_N3 17

A-Link

A_MTX_C_SRX_P0 17
A_MTX_C_SRX_N0 17
A_MTX_C_SRX_P1 17
A_MTX_C_SRX_N1 17

+VDDA12_PKG2

R375: 150 Ohm FOR RS485
562 Ohm FOR RS690

216MQA6AVA11FG_FCBGA465_RS690M

R376: 82.5 Ohm FOR RS485
2KOhm FOR RS690

RS690MC : SA00001I480 / S IC 216LQA6AVA12FG RS690MC BGA 465P 0FA

B

B

A

A

Compal Secret Data

Security Classification
2005/03/08

Issued Date

2009/06/11

Deciphered Date

Title

Compal Electronics, Inc.
SCHEMATIC,MB A4861

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

Rev
D

401650
Sheet

Tuesday, April 14, 2009
1

13

of

46

5

4

3

+3VS
+1.8VS
L52
1
2
MBK2012121YZF_2P 1
10U_0805_10V4Z

2

2

2

23 VGA_CRT_VSYNC
23 VGA_CRT_HSYNC
AVSSQ_GND

R386

2

B21

RSET

1

715_0402_1%

B6
A6

23 VGA_DDC_CLK
23 VGA_DDC_DATA

PLLVDD18=150mA A10

+NB_PLLVDD

R46
1K_0402_5%

B10

HTPVDD=200mA B24

+NB_HTPVDD

B25

17 ALLOW_LDTSTOP
R383 2
16

HTREFCLK

16

NB_OSC

1 10K_0402_5%

SYSRESET#
POWERGOOD
LDTSTOP#
ALLOW_LDTSTOP

C23
B23

HTTSTCLK
HTREFCLK

C2
C691
1U_0402_6.3V4Z

A12 solved

B11
A11

+PLLVDD12

PLLVDD12=70mA
F2
E1

GFX_CLKP
GFX_CLKN

G1
G2

SB_CLKP
SB_CLKN

D6
D7
C8
C7
B8
A8

DFT_GPIO0
DFT_GPIO1
DFT_GPIO2
DFT_GPIO3
DFT_GPIO4
DFT_GPIO5

RS690 A11: This clock is needed even if External Graphic slot is not supported
16 SBLINK_CLKP
16 SBLINK_CLKN

C763
0.1U_0402_16V4Z

LVDS_ENVDD

2

B

1
R746

1

A

G

Y

4

ENVDD

U48
NC7SZ08P5X_NL_SC70-5

3

2
2.2K_0402_5%

P

5

R73
R78
R60
R57
R58
R59

1
1
1
1
1
1

2
2
2
2
2
2

@ 2.7K_0402_5%
@ 2.7K_0402_5%
@ 2.7K_0402_5%
@ 2.7K_0402_5%
@ 2.7K_0402_5%
@ 2.7K_0402_5%

EDID_LCD_CLK
EDID_LCD_DAT

24 EDID_LCD_CLK
24 EDID_LCD_DAT

NB_PWROK

DFT_GPIO0
DFT_GPIO1
DFT_GPIO2
DFT_GPIO3
DFT_GPIO4
DFT_GPIO5

5

B

Y

4

ENBKL

DDC_DATA

U49
NC7SZ08P5X_NL_SC70-5

R377
4.7K_0402_5%

@ 0_0402_5%
2

ENVDD

24

R745
1

@ 0_0402_5%
2

ENBKL

28

R540 1

+3VS
R49

2

1 4.7K_0402_5%

EDID_LCD_CLK

R51

2

1 4.7K_0402_5%

EDID_LCD_DAT

R50

2

@

1 4.7K_0402_5%

DDC_DATA

R576 1

2 4.7K_0402_5%

VGA_DDC_CLK

R575 1

2 4.7K_0402_5%

VGA_DDC_DATA

2 10K_0402_5%

STRP_DATA

R41

1

R39

1

@

2 10K_0402_5%

LVDDR18D_1
LVDDR18D_2
LVDDR18A_1(LVDDR33_1)
LVDDR18A_2(LVDDR33_2)
LVSSR1
LVSSR3
LVSSR5
LVSSR6
LVSSR7
LVSSR8

A16
A14
D12
C19
C15
C16

LVSSR12
LVSSR13

F14
F15

LVDS_DIGON
LVDS_BLON
LVDS_BLEN

E12
G12
F12

BMREQ#
I2C_CLK
I2C_DATA
THERMALDIODE_P
THERMALDIODE_N
TMDS_HPD
DDC_DATA
TESTMODE
STRP_DATA

DVO_D0(GPP_TX0P)
DVO_D1(GPP_TX0N)
DVO_D2(DEBUG6)
DVO_D3(GPP_RX0P)
DVO_D4(GPP_RX0N)
DVO_D5(DEBUG9)
DVO_D6(DEBUG10)
DVO_D7(GPP_TX1N)
DVO_D8(GPP_TX1P)
DVO_D9(GPP_RX1N)
DVO_D10(GPP_RX1P)
DVO_D11(DEBUG15)
DVO_VSYNC(DEBUG0)
DVO_DE(DEBUG2)
DVO_HSYNC(DEBUG1)
DVO_IDCKP(DEBUG14)
DVO_IDCKN(DEBUG13)

PULL HIGH
(internally
pulled high)

2 0_0805_5%

AVSSQ_GND
R541 1

2 0_0805_5%

Memory
side port
available

LPVSS_GND
R542 1

RS690
DFT_GPIO1

Memory
side port
not available
DEFAULT

PULL
LOW

2

+NB_LPVDDR18A

1
L57

+3VS

L55
+1.8VS

LPVSS_GND

2
MBK2012121YZF_2P

LVDDR33=180mA

C

C491

C171

1

2

1

2

C176

1

C481

2

1

C131

2

1

2

LVDS_ENVDD
LVDS_ENBKL
TP4 PAD

1

C497

2

LVSSR_GND

AD14 PCIE_MTX_PRX_P0 C527 1
C528 1
AD15 PCIE_MTX_PRX_N0
AE15
AD16
AE16
AC17
AD18
AE19
AD19
AE20
AD20
AE21
AD13
AC13
AE13
AE17
AD17

+1.8VS

2 0.1U_0402_16V7K
2 0.1U_0402_16V7K

PCIE_MTX_C_PRX_P0 30
PCIE_MTX_C_PRX_N0 30

NewCard

PCIE_MRX_C_PTX_P0 30
PCIE_MRX_C_PTX_N0 30

B

RS690MC : SA00001I480 / S IC
216LQA6AVA12FG RS690MC BGA
465P 0FA

Bypass the loading
of EEPROM straps
and use Hardware
default values
DEFAULT

I2C Master can
load strap values
from EEPROM if
connected, or use
default values if
not connected

DFT_GPIO[4:2]

RS690 only

These pin straps are used to configure PCI-E GPP mode:
DEFAULT

111: register defined (register default to Config E)
110: 4-0-0-0-0 Config A
101: 4-4 Config B
100: 4-2-2 Config C
010: 4-1-1-1-1 Config E
011: 4-2-1-1 Config D

Enable debug bus via the memory
IO pads, if available in the package
use default values

DEFAULT

others: register defined (register default to Config E)
A

use the memory data bus
to output the debug bus

Compal Secret Data
2005/03/08

Issued Date
LVSSR_GND

2009/06/11

Deciphered Date

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

4

DFT_GPIO5

2 0_0805_5%

Security Classification
STRP_DATA set PowerPlay
mode PWM output: won't
support

5

2
2
1U_0603_10V4Z

+NB_LPVDDR18D

24
24
24
L54
24
1
2
MBK2012121YZF_2P
C177
4.7U_0805_10V4Z

216MQA6AVA11FG_FCBGA465_RS690M

DFT_GPIO0

A

D14
E14
A12
B12
C12
C13

LVDS_TXLCKP
LVDS_TXLCKN
LVDS_TXUCKP
LVDS_TXUCKN
1
1
1
+NB_LPVDD
C154
C172
0.1U_0402_16V4Z

TZ

2

R744
LVDS_ENVDD
1
LVDS_ENBKL

STRP_DATA

1

A

C14
B3
C3
A3

P

1

2
2.2K_0402_5%

3

1
R747

B

G

LVDS_ENBKL

2

B2
A2
B4
AA15
AB15

LPVDD
LPVSS

TVCLKIN
OSCIN
OSCOUT(PLLVDD12)

LVDS_TXLCKP
LVDS_TXLCKN
LVDS_TXUCKP
LVDS_TXUCKN

24
24
24
24
24
24

4.7U_0805_10V4Z

0_0402_5%
LDT_STOP#_NB

E15
D15
H15
G15

LVDS_TXUP0
LVDS_TXUN0
LVDS_TXUP1
LVDS_TXUN1
LVDS_TXUP2
LVDS_TXUN2

D

TX

1U_0603_10V4Z

2

TXCLK_LP
TXCLK_LN
TXCLK_UP
TXCLK_UN

24
24
24
24
24
24

0.1U_0402_16V4Z

1

LVDS_TXUP0
LVDS_TXUN0
LVDS_TXUP1
LVDS_TXUN1
LVDS_TXUP2
LVDS_TXUN2

LVDS_TXLP0
LVDS_TXLN0
LVDS_TXLP1
LVDS_TXLN1
LVDS_TXLP2
LVDS_TXLN2

0.1U_0402_16V4Z

R62

16 NBSRC_CLKP
16 NBSRC_CLKN

+3VS

HTPVDD
HTPVSS

C10
C11
C5
B5

A15
B16
C17
C18
B17
A17
A18
B18

4.7U_0805_10V4Z

18,25,28,30,31 NB_RST#
28,33 NB_PWROK

1

2

PLLVDD(PLLVDD18)
PLLVSS

TXOUT_U0P
TXOUT_U0N
TXOUT_U1P
TXOUT_U1N
TXOUT_U2P
TXOUT_U2N
TXOUT_U3P
TXOUT_U3N

1U_0603_10V4Z

Q27
1

C

3

MMBT3904_NL_SOT23-3

+PLLVDD12

2

DACSCL
DACSDA

LVDS_TXLP0
LVDS_TXLN0
LVDS_TXLP1
LVDS_TXLN1
LVDS_TXLP2
LVDS_TXLN2

2

AMD review: use
AVSSQ_GND (1006)

LVTM

R74

CRT/TVOUT

RED
GREEN
BLUE
DACVSYNC
DACHSYNC

B14
B15
B13
A13
H14
G14
D17
E17

1

1 10K_0402_5%

PLLVDD12=70mA
1

VGA_CRT_VSYNC
VGA_CRT_HSYNC

E19
F19
G19
C6
A5

TXOUT_L0P
TXOUT_L0N
TXOUT_L1P
TXOUT_L1N
TXOUT_L2P
TXOUT_L2N
TXOUT_L3P
TXOUT_L3N

MBK2012121YZF_2P

+1.8VS

1

R568

4.7U_0805_10V4Z

E

+1.2V_HT

C690
2.2U_0603_6.3V4Z

C
Y
COMP

2

2

150_0402_1%

2

R76

+3VS

8,17 LDT_STOP#

1
2
MBC1608121YZF_0603

AVDDQ
AVSSQ

AVSSQ_GND

C488

1U_0603_10V4Z

L70

A21
A22
C21
C20
D19

B

10U_0805_10V4Z

1

C498

150_0402_1%

150_0402_1%

1
2
MBK2012121YZF_2P

R75

PART 3 OF 5

PLL PWR

CRT_R
CRT_G
CRT_B

CRT_R
CRT_G
CRT_B

AVDD1
AVDD2
AVSSN1
AVSSN2
AVDDDI
AVSSDI

PM

23
23
23

L56

2

AVDDQ=200mA

R74~R76 CLOSE TO NB

+NB_HTPVDD

1

AVDD=250mA

2.2U_0805_10V6K

4.7U_0805_10V4Z

+1.8VS

C493

2

B22
C22
G17
H17
A20
B20

CLOCKs

2

1U_0603_10V4Z

1

2
+NB_AVDDQ

C492

2

2

1U_0603_10V4Z

1

1

+NB_AVDDDI

+

2

C485

1

2

MBK2012121YZF_2P
2
1
1
C490
C496

1

2

2

10U_0805_10V4Z

1

C

4.7U_0805_10V4Z

MIS.
DVO

AVSSQ_GND

1
2
MBK2012121YZF_2P
1
1
C499
+
@

@

2

U39C
L44
1
C186
150U_D2_6.3VM

150U_D2_6.3VM

2

C487

+1.8VS

+NB_PLLVDD

2

1

C483

1U_0603_10V4Z

L53

C183

AVDD=100mA
1

1U_0603_10V4Z

C484

1

D

2

1

2

@

2.2U_0805_10V6K
1
C495 C489

1

+NB_AVDD

L43
1
2
MBK2012121YZF_2P

+NB_AVDDQ

2

3

2

Compal Electronics, Inc.
SCHEMATIC,MB A4861
Document Number

Rev
D

401650
Sheet

Tuesday, April 14, 2009
1

14

of

46

5

4

3

2

1

+1.2V_HT
+1.2V_HT

2
1
FBMA-L11-201209-221LMA30T_0805

D

L64
2
1
FBMA-L11-201209-221LMA30T_0805
+VDDA12

1

C37

2

1

C46

1

C54

C50

2
2
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
+VDD18

+1.8VS

VDD_HT=800mA

2

L2
1
2
MBC1608121YZF_0603
C141

1U_0402_6.3V4Z
1
C142

1

2.2U_0805_10V6K 2

C123

2

2
1U_0402_6.3V4Z
+VDDA12

+1.2V_HT
L58

+3VS
L3
1
2
MBC1608121YZF_0603

1

10U_0805_10V4Z

C

1
1 2
FBMA-L11-201209-221LMA30T_0805
+
C25
150U_D2_6.3VM
2

C44

2

1

C40

C459

1

C460

1

C462

1

C456

1

C161

2

L1
1
2
MBK2012121YZF_2P
1U_0402_6.3V4Z

+VDDA12

1

VDD12=2.5A

2

C160

VDDR=100mA

4.7U_0805_10V4Z

1

2

1

C38

C42

D11
E11

VDDR3_1
VDDR3_2

AC12
AD12
AE12

D22
M1
AC11

+VDDHT_PKG
+VDDA12_PKG1
+VDDA12_PKG2

+VDDPLL

4.7U_0805_10V4Z

2
RS485: 0 Ohm RESISTOR
RS690: 220 Ohm 500mA FERRITE BEAD

C140

1

2

VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDDC_23
VDDC_24
VDDC_25
VDDC_26
VDDC_27
VDDC_28
VDDC_29
VDDC_30
VDDC_31
VDDC_32

VDD_DVO1(VDDR_1)
VDD_DVO2(VDDR_2)
VDD_DVO3(VDDR_3)
VDDA12(VDDPLL_1)
VDDA12(VDDPLL_2)
VSSA12(VSSPLL_1)
VSSA12(VSSPLL_2)
VDDHT_PKG
VDDA12_PKG1
VDDA12_PKG2

B1
C1
D1
D2
D3
E2
E3
F4
E6
G7
L9
M9

1

1

C110

C130

1

C112

1

1

C93

1

C106

C75

+
2

2

2

2

10U_0805_10V4Z

2

10U_0805_10V4Z
2

150U_D2_6.3VM

1U_0402_6.3V4Z
1U_0402_6.3V4Z
+1.2V_HT

VDDC=5A
A4
A7
A9
A19
B9
B19
C9
D9
D20
G20
H11
J11
J19
L11
L13
L15
L17
M12
M14
N11
N13
N15
P12
P14
P17
R11
R13
R15
U11
U12
U14
U15

1

C115

1

C126

1

C87

1

C94

1

C60

2
2
2
2
2
10U_0805_10V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
10U_0805_10V4Z
1U_0402_6.3V4Z
1
1
1
C108
C138
C135

1

1

2

C79
1U_0402_6.3V4Z

2
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z

C24

1
C31
10U_0805_10V4Z
150U_D2_6.3VM
2
2
+

RS690MC : SA00001I480 / S IC 216LQA6AVA12FG RS690MC BGA 465P 0FA

C168

C134
10U_0805_10V4Z

2

1U_0402_6.3V4Z

VDDA12=2.5A
VDDA12_1
VDDA12_2
VDDA12_3
VDDA12_4
VDDA12_5
VDDA12_6
VDDA12_7
VDDA12_8
VDDA12_9
VDDA12_10
VDDA12_11
VDDA12_12

216MQA6AVA11FG_FCBGA465_RS690M

+VDDA12_PKG1
1

1

VDD18_1
VDD18_2

4 OF 5

VDDA18_1(VDDA12_13)
VDDA18_2(VDDA12_14)
VDDA18_3(VDDA12_15)
VDDA18_4(VDDA12_16)
VDDA18_5(VDDA12_17)
VDDA18_6(VDDA12_18)
VDDA18_7(VDDA12_19)
VDDA18_8(VDDA12_20)

E7
F7
F9
G9

1
C43

VDD_HT1 PART
VDD_HT2
VDD_HT3
VDD_HT4
VDD_HT5
VDD_HT6
VDD_HT7
VDD_HT8
VDD_HT9
VDD_HT10
VDD_HT11
VDD_HT12
VDD_HT13
VDD_HT14
VDD_HT15

AB3
AB4
AC3
AD2
AE1
AE2
U7
W7

VDD12=50mA

2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z

L76
1
2
MBC1608121YZF_0603

B

J14
J15

C461

+VDDR
+1.8VS

VDD18=200mA

2
2
2
2
2
2
10U_0805_10V4Z 1U_0402_6.3V4Z 1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
+VDDR3
VDDR3=70mA
1

1U_0402_6.3V4Z

1

1

AA17
AB17
AB19
AC18
AC19
AC20
AD21
AD22
AD23
AD24
AE23
AE24
AE25
W17
Y17

1U_0402_6.3V4Z

10U_0805_10V4Z

1

U39D

1U_0402_6.3V4Z
1
1
C49
C48

POWER

+VDD_HT

U39E
D

A25
F11
D23
E9
G11
Y23
P11
R24
AE18
M15
J22
G23
J12
L12
L14
L20
L23
M11
M20
M23
M25
N12
N14

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23

L24
P13
P20
P15
R12
R14
R20
W23
Y25
AD25
U20
H25
W24
Y22
AC23
D25
G24
AC14

VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42

AC22
R23
C4
AE22
T23
T25
AE14
R17
H23
M17
A23
AC15
F17
D4

VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57

M13
AC16
H12
B7

VSS59
VSS60
VSS61
VSS62

PAR 5 OF 5

GROUND

L59
2
1
FBMA-L11-201209-221LMA30T_0805
L60
2
1
FBMA-L11-201209-221LMA30T_0805

L63

VSSA2
VSSA3
VSSA4
VSSA5
VSSA6
VSSA7
VSSA8
VSSA9
VSSA10
VSSA11

V12
V11
V14
F3
V15
A1
H1
G3
J2
H3

VSSA13

J6

VSSA15
VSSA16
VSSA17
VSSA18
VSSA19
VSSA20
VSSA21
VSSA22

F1
L6
M2
M6
J3
P6
T1
N3

VSSA24
VSSA25
VSSA26
VSSA27
VSSA28

R6
U2
T3
U3
U6

VSSA30

Y1

VSSA32
VSSA33
VSSA34
VSSA35
VSSA36
VSSA93
VSSA94
VSSA95
VSSA37
VSSA38
VSSA39
VSSA40
VSSA41
VSSA42
VSSA43
VSSA44
VSSA45
VSSA46
VSSA47
VSSA48
VSSA49
VSSA50
VSSA51

W6
AC2
Y3
Y9
Y11
Y12
Y14
AA3
R9
AD1
AC5
AC6
AC7
AD3
AC9
AC10
G6
Y15
AC4
P9
AE6
AE10
M3

C

B

216MQA6AVA11FG_FCBGA465_RS690M

+1.2V_HT
+1.2V_HT

+1.8VS

+1.2VALW

C353

C350
2

2

1

1

0.1U_0402_16V4Z

0.1U_0402_16V4Z
+1.2V_HT

+1.2VALW

+1.2V_HT

+3VS

C352
2

C354

1

2

0.1U_0402_16V4Z

1

0.1U_0402_16V4Z

EMI

A

A

Compal Secret Data

Security Classification
2005/10/10

Issued Date

2009/06/11

Deciphered Date

Title

Compal Electronics, Inc.
SCHEMATIC,MB A4861

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

Rev
D

401650
Sheet

Tuesday, April 14, 2009
1

15

of

46

5

4

3

2

1

+3VS
+CLK_VDD
L8
1
2
MBK2012121YZF_2P

CLK_VDD=500mA
10U_0805_10V4Z

1

C272

1

1

C263

1

C276

C268

+3VS
1

1

C259

1

C254

C248

1

2
2

2

2

2

2

2

2

2

2
1

0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z

1- PLACE ALL SERIAL TERMINATION
RESISTORS CLOSE TO U40

L10
1
2
MBK2012121YZF_2P

CLK_VDDA=50mA

CLK_VDDA

C279

1

C261
0.1U_0402_16V4Z

2

C260
10U_0805_10V4Z
D

+3VS
+CLK_VDD

L9
CLK_VDD48=50mA
1
2
MBK2012121YZF_2P
1
C252

2

Parallel Resonance Crystal
C511 1

R412
@

2

CLK_X1

2

1

Y5

1M_0402_5%
C510 1
2
2
14.31818MHz_20P_1BX14318BE1A
R417
27P_0402_50V8J
1

R415
10K_0402_5%

C

2

2

27P_0402_50V8J

1

+3VS

SB_CK_SCLK
SB_CK_SDAT

10,11,18,31 SB_CK_SCLK
10,11,18,31 SB_CK_SDAT

R425 1
R431 1

1

53
15
22
29
45
8
38
1
58

GNDCPU
GNDSRC
GNDSRC
GNDSRC
GNDSRC
GND48
GNDATIG
GNDREF
GNDHTT

3
CLK_X2

4

X2

0_0402_5%

2 0_0402_5%
2 0_0402_5%

11
61

RESET_IN#
NC

9
10

SMBCLK
SMBDAT

2

48

Ioh = 5 * Iref
(2.32mA)

X1

R433
475_0402_1%
1

Voh = 0.71V @ 60 ohm

IREF

56
55
52
51

SRCCLKT6
SRCCLKC6
ATIGCLKT0
ATIGCLKC0
ATIGCLKT1
ATIGCLKC1
ATIGCLKT2
ATIGCLKC2
ATIGCLKT3
ATIGCLKC3
SRCCLKT5
SRCCLKC5
SRCCLKT4
SRCCLKC4
SRCCLKT3
SRCCLKC3
SRCCLKT2
SRCCLKC2
SRCCLKT0
SRCCLKC0
SRCCLKT1
SRCCLKC1
SRCCLKT7
SRCCLKC7

16
17
41
40
37
36
35
34
30
31
18
19
20
21
24
25
26
27
47
46
43
42
12
13

CLKREQA#
CLKREQB#
CLKREQC#

57
32
33

48MHz_1
48MHz_0

7
6

FS1/REF1
FS0/REF0
FS2/REF2
HTTCLK0

63
64
62
59

CPUCLK 8
CPUCLK# 8

47.5_0402_1%
SBLINK_CLKP_R
SBLINK_CLKN_R
NBSRC_CLKP_R
NBSRC_CLKN_R

R435
R437
R450
R456

1
1
1
1

2
2
2
2

33_0402_1%
33_0402_1%
33_0402_1%
33_0402_1%

SBLINK_CLKP
SBLINK_CLKN
NBSRC_CLKP
NBSRC_CLKN

SBLINK_CLKP
SBLINK_CLKN
NBSRC_CLKP
NBSRC_CLKN

14
14
14
14

PCI-E A-LINK
PCI-E GFX

RS690 A11: This clock is needed even if External Graphic slot is not supported

SBSRC_CLKP_R
SBSRC_CLKN_R

R443 1
R449 1

2 33_0402_1%
2 33_0402_1%

CLK_PCIE_CARD_R
CLK_PCIE_CARD#_R
CLK_PCIE_LAN_R
CLK_PCIE_LAN#_R
CLK_PCIE_MINI2_R
CLK_PCIE_MINI2#_R

R651
R682
R637
R638
R438
R444

2
2
2
2
2
2

R459 1
R461 1

1
1
1
1
1
1

2 0_0402_5%
2 0_0402_5%

CLK_SD_48M_R
CLK_48M_USB_R

SBSRC_CLKP 17
SBSRC_CLKN 17

33_0402_1%
33_0402_1%
33_0402_1%
33_0402_1%
33_0402_1%
33_0402_1%

CLK_PCIE_CARD 30
CLK_PCIE_CARD# 30
CLK_PCIE_LAN 25
CLK_PCIE_LAN# 25
CLK_PCIE_MINI2 31
CLK_PCIE_MINI2# 31

EXP_CLKREQ# 30
MINI2_CLKREQ# 31

R421 1
R416 1

+CLK_VDD

2 33_0402_1%
2 33_0402_1%
1
C861

CLK_SD_48M 27
CLK_USB_48M 18

2
22P_0402_50V8J
@

R402

EMI

R404 1
R403 1
R413 1

ICS951462AGLFT_TSSOP64

C

NewCard
LAN
WLAN

2.2K_0402_5%
R401

R409

2.2K_0402_5%

2 8.2K_0402_5%
2 8.2K_0402_5%
2 8.2K_0402_5%

2.2K_0402_5%

SB_OSCIN_R

R407 1

2 33_0402_1%

SB_OSCIN 18

NB_OSCIN_R

R418 1

2 33_0402_1%

NB_OSC

HTREFCLK_R

R419 1

2 33_0402_1%

HTREFCLK 14

R400 2
R399 2
R410 2

1 @ 0_0402_5%
1 @ 0_0402_5%
1 @ 0_0402_5%

B

14

1

B

PCI-E A-LINK

1

2.2U_0805_10V6K

CLK_VDDREF

CLK_VDDREF=50mA

CPUCLK8T0
CPUCLK8C0
CPUCLK8T1
CPUCLK8C1

R427
261_0402_1%
1
2

47.5_0402_1%
CPUCLK_EXT_R R423 1
2
CPUCLK#_EXT_R R429 1
2

2

1

C246

50
49

1

CLK_VDD48

VDDA
GNDA

2

2

L6
1
2
MBK2012121YZF_2P

VDDCPU
VDDSRC
VDDSRC
VDDSRC
VDDSRC
VDD48
VDDATIG
VDDREF
VDDHTT

1

+3VS

2.2U_0805_10V6K

U40
54
14
23
28
44
5
39
2
60

2

2- PUT DECOUPLING CAPS CLOSE TO U40
POWER PIN

1 R445
2
49.9_0402_1%
1 R439
2
49.9_0402_1%
1 R458
2
49.9_0402_1%
1 R453
2
49.9_0402_1%
1 R448
2
49.9_0402_1%
1 R442
2
49.9_0402_1%
1 R452
2
49.9_0402_1%
1 R446
2
49.9_0402_1%
1 R457
2
49.9_0402_1%
1 R451
2
49.9_0402_1%
1 R436
2
49.9_0402_1%
1 R434
2
49.9_0402_1%

D

1

C277

R420
49.9_0402_1%
2

EXT CLK FREQUENCY SELECT TABLE(MHZ)
FS2 FS1 FS0

CPU

SRCCLK HTT
[2:1]

0

0

0

Hi-Z

100.00

0

0

1

X

0

1

0

180.00

0

1

1

1

0

1

0

1

1

COMMENT

PCI

USB

Hi-Z

Hi-Z

48.00

Reserved

100.00

X/3

X/6

48.00

Reserved

100.00

60.00

30.00

48.00

Reserved

220.00

100.00

36.56

73.12

48.00

Reserved

0

100.00

100.00

66.66

33.33

48.00

Reserved

1

133.33

100.00

66.66

33.33

48.00

Reserved

1

200.00

100.00

66.66

33.33

48.00

Normal ATHLON64 operation

+3VS

R645
1

10K_0402_5%
2

R647
MINI2_CLKREQ#
1

10K_0402_5%
2

EXP_CLKREQ#

A

A

Compal Secret Data

Security Classification
2005/03/08

Issued Date

2009/06/11

Deciphered Date

Title

Compal Electronics, Inc.
SCHEMATIC,MB A4861

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

Rev
D

401650
Sheet

Tuesday, April 14, 2009
1

16

of

46

5

4

3

2

1

U18A

1
1
1
1
1

A_MRX_C_STX_P0
A_MRX_C_STX_N0
A_MRX_C_STX_P1
A_MRX_C_STX_N1
A_MRX_C_STX_P2
A_MRX_C_STX_N2
A_MRX_C_STX_P3
A_MRX_C_STX_N3

A_MTX_C_SRX_P0
A_MTX_C_SRX_N0
A_MTX_C_SRX_P1
A_MTX_C_SRX_N1
A_MTX_C_SRX_P2
A_MTX_C_SRX_N2
A_MTX_C_SRX_P3
A_MTX_C_SRX_N3

A_MTX_C_SRX_P0
A_MTX_C_SRX_N0
A_MTX_C_SRX_P1
A_MTX_C_SRX_N1
A_MTX_C_SRX_P2
A_MTX_C_SRX_N2
A_MTX_C_SRX_P3
A_MTX_C_SRX_N3
+PCIE_VDDR

E29
E28

PCIE_CALRP
PCIE_CALRN

2 0_0402_5%

E27

PCIE_CALI

2

0_0402_5%

AC26
W26
W24
W25
AA24
AA23
AA22
AA26
Y27
AA25
AH9
B24
W23
AC25

2
R701

@

2
R470

@

PBTN_OUT#
1
1K_0402_1%

8

PM_SLP_S3#
1
4.7K_0402_5%

2
R184

@

PM_SLP_S5#
1
4.7K_0402_5%

2
R465

@

S3_STATE_R
1
10K_0402_5%

2
R267

@

EC_SWI#
1
10K_0402_5%

28

S3_STATE

2

OUT

4

2

NC

IN

1

32.768KHZ_12.5P_MC-306

1

R218
20M_0603_5%

28

SERIRQ

SERIRQ

PCI_PME#/GEVENT4#
RI#/EXTEVNT0#
SLP_S3#
SLP_S5#
PWR_BTN#
PWR_GOOD
SUS_STAT#
TEST0
TEST1
TEST2
S3_STATE/GEVENT5#
SYS_RESET#/GPM7#
WAKE#/GEVENT8#
BLINK/GPM6#
SMBALERT#/THRMTRIP#/GEVENT2#

D7
C25
AF26
AG26

LPC_PME#/GEVENT3#
LPC_SMI#/EXTEVNT1#
GA20IN
KBRST#

AG24
AG25
AH24
AH25
AF24
AJ24
AH26
W22
AF23

LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ0#
LDRQ1#/GNT5#/GPIO68
BMREQ#/REQ5#/GPIO65
SERIRQ

32K_X1

D2

2

32K_X2

C1

AD0/ROMA18
AD1/ROMA17
AD2/ROMA16
AD3/ROMA15
AD4/ROMA14
AD5/ROMA13
AD6/ROMA12
AD7/ROMA11
AD8/ROMA9
AD9/ROMA8
AD10/ROMA7
AD11/ROMA6
AD12/ROMA5
AD13/ROMA4
AD14/ROMA3
AD15/ROMA2
AD16/ROMD0
AD17/ROMD1
AD18/ROMD2
AD19/ROMD3
AD20/ROMD4
AD21/ROMD5
AD22/ROMD6
AD23/ROMD7
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
CBE0#/ROMA10
CBE1#/ROMA1
CBE2#/ROMWE#
CBE3#
FRAME#
DEVSEL#/ROMA0
IRDY#
TRDY#/ROMOE#
PAR/ROMA19
STOP#
PERR#
SERR#
REQ0#
REQ1#
REQ2#
REQ3#/GPIO70
REQ4#/GPIO71
GNT0#
GNT1#
GNT2#
GNT3#/GPIO72
GNT4#/GPIO73
CLKRUN#
LOCK#

CPU_PG/LDT_PG
INTR/LINT0
NMI/LINT1
INIT#
SMI#
SLP#/LDT_STP#
IGNNE#/SIC
A20M#/SID
FERR#
STPCLK#/ALLOW_LDTSTP
CPU_STP#/DPSLP_3V#
DPSLP_OD#/GPIO37
DPRSLPVR
LDT_RST#/DPRSTP#/PROCHOT#

X1

1

NC

AJ9

INTE#/GPIO33
INTF#/GPIO34
INTG#/GPIO35
INTH#/GPIO36

XTAL

3

18P_0402_50V8J

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#

2

Y3

EC_GA20
EC_KBRST#

EC_GA20
EC_KBRST#

A3
B2
F7
A5
E3
B5
B3
G9
E9
F9
D9
F4
E7
C2
G7

PCIRST#

LPC

C314

1

H_THERMTRIP#

28
LPC_AD0
28
LPC_AD1
28
LPC_AD2
28
LPC_AD3
28 LPC_FRAME#

1 R244

18P_0402_50V8J
B

SB_TEST0
SB_TEST1
SB_TEST2
S3_STATE_R
2
1
R577 @
0_0402_5%
SB_PCIE_WAKE#

8 H_THERMTRIP#

28
28

@

EC_SWI#
EC_SCI#
PM_SLP_S3#
PM_SLP_S5#
PBTN_OUT#
SB_PWROK

28
EC_SWI#
28
EC_SCI#
28 PM_SLP_S3#
28 PM_SLP_S5#
28 PBTN_OUT#
8,28,33 SB_PWROK

EC_SCI#
1
10K_0402_5%

20M_0603_5% 2

ALLOW_LDTSTOP

LDT_RST#

30,31 SB_PCIE_WAKE#

2
R571

LDT_STOP#

14 ALLOW_LDTSTOP

C

PCIE_RX0P
PCIE_RX0N
PCIE_RX1P
PCIE_RX1N
PCIE_RX2P
PCIE_RX2N
PCIE_RX3P
PCIE_RX3N

2 562_0402_1%
2 2.05K_0402_1%

8,14 LDT_STOP#

SB_PCIE_WAKE#
1
10K_0402_5%

T25
T26
T22
T23
M25
M26
M22
M23

R136 1

+3VALW

2
R466

PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N

R137 1
R138 1

R440 1

8 CPU_PWRGD

P29
P28
M29
M28
K29
K28
H29
H28

PCI CLKS

2 0.1U_0402_16V7K
2 0.1U_0402_16V7K
2 0.1U_0402_16V7K
2 0.1U_0402_16V7K
2 0.1U_0402_16V7K
2 0.1U_0402_16V7K
2 0.1U_0402_16V7K
2 0.1U_0402_16V7K

PCI INTERFACE

ALLOW_LDTSTOP
1
1K_0402_5%

+1.8VS

1
1

CPU

2
R691

13
13
13
13
13
13
13
13

1

U2
T2
U1
V2
W3
U3
V1
T1

ACPI / WAKE UP EVENTS

SB_TEST0
2
@ 2.2K_0402_5%
SB_TEST1
2
@ 2.2K_0402_5%
SB_TEST2
2
@ 2.2K_0402_5%

C509
C508
C216
C217
C663
C664
C665
C666

PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
PCICLK6
SPDIF_OUT/PCICLK7/GPIO41

X2

C307

RTC

D

1
R692
1
R693
1
R694

A_MRX_STX_P0
A_MRX_STX_N0
A_MRX_STX_P1
A_MRX_STX_N1
A_MRX_STX_P2
A_MRX_STX_N2
A_MRX_STX_P3
A_MRX_STX_N3

A_MRX_STX_P0
A_MRX_STX_N0
A_MRX_STX_P1
A_MRX_STX_N1
A_MRX_STX_P2
A_MRX_STX_N2
A_MRX_STX_P3
A_MRX_STX_N3

PCI EXPRESS INTERFACE

13
13
13
13
13
13
13
13

+3VALW

PCIE_RCLKP
PCIE_RCLKN

W7
Y1
W8
W5
AA5
Y3
AA6
AC5
AA7
AC3
AC7
AJ7
AD4
AB11
AE6
AC9
AA3
AJ4
AB1
AH4
AB2
AJ3
AB3
AH3
AC1
AH2
AC2
AH1
AD2
AG2
AD1
AG1
AB9
AF9
AJ5
AG3
AA2
AH6
AG5
AA1
AF7
Y2
AG8
AC11
AJ8
AE2
AG9
AH8
AH5
AD11
AF2
AH7
AB12
AG4
AG7
AF6

CLK_PCI_CLK0
CLK_PCI_CLK1

CLK_PCI_CLK0 21
CLK_PCI_CLK1 21

CLK_PCI_CLK4
R121 1

CLK_PCI_CLK1

CLK_PCI_CLK4 21

@

R255 1

2 22_0402_5%

CLK_PCI_LPC 28

CLK_PCI_CLK6 21

2 10K_0402_5%

D

PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28

PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28

21
21
21
21
21
21
C

TP32

TP33
PM_CLKRUN#

+3VS

PM_CLKRUN# 28

@
PM_CLKRUN#

R120 1

2 10K_0402_5%

AD3
AF1
AF4
AF3

RTCCLK
RTC_IRQ#/GPIO69

D3
F5

VBAT
RTC_GND

E1
D1

218S6ECLA13FG_FCBGA548_SB600

SB600 : SA00001DUD0 / S IC 218S6ECLA21FG SB600 FCBGA 549P 0FA

B

+RTCBATT

RTC_CLK 21
RTC_IRQ# 21
VBAT_IN

1

C322

1
1

SB600 SB
J24
J25

16 SBSRC_CLKP
16 SBSRC_CLKN

C315
0.1U_0402_16V4Z
2
2
1U_0402_6.3V4Z

D7
BAS40-04_SOT23-3

@

1

R240
2

10K_0603_5%

1

510_0402_5%

close to RAM door

2

2
R764

3

+RTCVCC

+CHGRTC

1

1

C317
4.7U_0805_10V4Z

2

@

2

C327
0.1U_0402_16V4Z

RTC Battery

A

Compal Secret Data

Security Classification
Issued Date

2005/03/08

Deciphered Date

2009/06/11

Title

Compal Electronics, Inc.
SCHEMATIC,MB A4861

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

A

Rev
D

401650
Sheet

Tuesday, April 14, 2009
1

17

of

46

5

4

3

2

1

NOTE:

1
1

2 C564
C565
2 C583
C584
2
2 C670
C667
2
2 C585
C586
2

SATA_DTX_SRX_P0
SATA_DTX_SRX_N0
SATA_DTX_SRX_P1
SATA_DTX_SRX_N1
SATA_DTX_SRX_P2
SATA_DTX_SRX_N2
SATA_DTX_SRX_P3
SATA_DTX_SRX_N3

2
1
1
1

R462 2
R146
+3VS

1

10K_0402_5%
2

1 1K_0402_1%

SATA_CAL

2 C544
2.2U_0603_6.3V4Z

1
@

C297
SATA_X1
1

1

2

34

2
R143

SATA_LED#

10P_0402_50V8J
Y2
25MHZ_20P
C295

A_RST# R178 1
28
RSMRST#
16
SB_OSCIN

SATA_RX0+
SATA_RX0SATA_RX1+
SATA_RX1SATA_RX2+
SATA_RX2SATA_RX3+
SATA_RX3-

AF12

SATA_CAL

SATA_X1

AD16

SATA_X1

SATA_X2

AD18

SATA_X2

SATA_ACT#

AC12

SATA_ACT#/GPIO67

AG10
E2
B23

A_RST#
RSMRST#
14M_OSC

SATA ACTIVITY LED
A_RST#_R

2 33_0402_5%
RSMRST#
SB_OSCIN

2

2

10M_0402_5%

1
0_0402_5%

AJ20
AH20
AJ17
AH17
AJ16
AH16
AJ13
AH12

SATA_X2

1

2

CLK_USB_48M

16 CLK_USB_48M

10P_0402_50V8J

R164

2

1
11.8K_0402_1%

C

+3VALW

C305

Camera

1
5

Y
A

NB_RST#

4

NewCard

USB20_P9
USB20_N9
USB20_P8
USB20_N8
USB20_P7
USB20_N7

USB20_P9
USB20_N9
USB20_P8
USB20_N8
USB20_P7
USB20_N7

NB_RST# 14,25,28,30,31

2

3

1

1

B

P

2

Card Reader

24
24
27
27
30
30

R182

R570

WLAN

1
B

@

2
2
2
2

1
1
1
1

@ 10K_0402_5%
@ 10K_0402_5%
@ 10K_0402_5%
@ 10K_0402_5%

32

USB_OC#0

32

USB_OC#2

USB CONN

32
32

USB20_P2
USB20_N2

USB20_P2
USB20_N2

USB CONN

32
32

USB20_P0
USB20_N0

USB20_P0
USB20_N0
USB_OC#0
USB_OC#2

R506 2

28 EC_LID_OUT#

ACZ_SDIN0
ACZ_SDIN1
ACZ_SDIN2
SB_AC_BITCLK

30
28

CRT_DET

35

SB_SPKR

1
1
1
1
1

@ 10K_0402_5%
@ 10K_0402_5%
@ 10K_0402_5%
@ 10K_0402_5%
@ 10K_0402_5%

SB_AZ_RST#
SB_AZ_SYNC
SB_AZ_SDOUT
SB_AZ_BITCLK
SB_AC_RST#

R578

2

@

1
R463 @

1

10K_0402_5%

2
0_0402_5%

SB_CK_SCLK
SB_CK_SDAT

10,11,16,31 SB_CK_SCLK
10,11,16,31 SB_CK_SDAT
30 SB_CK_SCLK1
30 SB_CK_SDAT1

A14

USB_RCOMP

A10
A11

USB_ATEST0
USB_ATEST1

H12
G12
E12
D12
E14
D14
G14
H14
D16
E16
D18
E18
G16
H16
G18
H18
D19
E19
G19
H19

USB_HSDP9+
USB_HSDM9USB_HSDP8+
USB_HSDM8USB_HSDP7+
USB_HSDM7USB_HSDP6+
USB_HSDM6USB_HSDP5+
USB_HSDM5USB_HSDP4+
USB_HSDM4USB_HSDP3+
USB_HSDM3USB_HSDP2+
USB_HSDM2USB_HSDP1+
USB_HSDM1USB_HSDP0+
USB_HSDM0-

A8
B8
C7
C8
A6
B6
B4
C4
C5
C6

USB_OC0#/GPM0#
USB_OC1#/GPM1#
USB_OC2#/GPM2#
USB_OC3#/GPM3#
USB_OC4#/GPM4#
USB_OC5#/DDR3_RST#/GPM5#
USB_OC6#/GEVENT6#
USB_OC7#/GEVENT7#
USB_OC8#/AZ_DOCK_RST#/GPM8#
USB_OC9#/SLP_S2/GPM9#

A27
A26
B26
B27
D23
B29
A23
C26
D26
C28
A4

SSMUXSEL/SATA_IS3#/GPIO0
ROM_CS#/GPIO1
SPKR/GPIO2
SMARTVOLT/SATA_IS2#/GPIO4
SHUTDOWN#/GPIO5
GHI#/SATA_IS1#/GPIO6
WD_PWRGD/GPIO7
DDC1_SDA/GPIO8
DDC1_SCL/GPIO9
SATA_IS0#/GPIO10
LLB#/GPIO66

C27
B28

SCL0/GPOC0#
SDA0/GPOC1#

C3
F3

SCL1/GPOC2#
SDA1/GPOC3#

GPIO/ SMBUS

2
2
2
2
2

USB_OC#4
CP_PE#
EC_SMI#

CP_PE#
EC_SMI#

SB600 A21 and newer: Made provision for an external
10-kohm 5% pull-down resistor, not installed by default.
R298
R296
R294
R333
R489

1 0_0402_5%

USBCLK

IDE_IORDY
IDE_IRQ
IDE_A0
IDE_A1
IDE_A2
IDE_DACK#
IDE_DRQ
IDE_IOR#
IDE_IOW#
IDE_CS1#
IDE_CS3#

AB29
AA28
AA29
AB27
Y28
AB28
AC27
AC29
AC28
W28
W27

IDE_D0/GPIO15
IDE_D1/GPIO16
IDE_D2/GPIO17
IDE_D3/GPIO18
IDE_D4/GPIO19
IDE_D5/GPIO20
IDE_D6/GPIO21
IDE_D7/GPIO22
IDE_D8/GPIO23
IDE_D9/GPIO24
IDE_D10/GPIO25
IDE_D11/GPIO26
IDE_D12/GPIO27
IDE_D13/GPIO28
IDE_D14/GPIO29
IDE_D15/GPIO30

AD28
AD26
AE29
AF27
AG29
AH28
AJ28
AJ27
AH27
AG27
AG28
AF28
AF29
AE28
AD25
AD29

SPI_DI/GPIO12
SPI_DO/GPIO11
SPI_CLK/GPIO47
SPI_HOLD#/GPIO31
SPI_CS#/GPIO32

J3
J6
G3
G2
G6

LAN_RST#/GPIO13
ROM_RST#/GPIO14

C23
G5

2
@

@

CRT_DET

23

D

2
G

CRT_DET#

Q38

S

+3VS

1 10K_0402_5%

EC_THERM#

R424 2

1 2.2K_0402_5%

SB_CK_SCLK

R430 2

1 2.2K_0402_5%

SB_CK_SDAT

R180 2

@

C

+3VALW

M4
T3
V4

R464

2 @

1 10K_0402_5% EC_SMI#

R44

2 @

1 10K_0402_5% USB_OC#0

FANIN0/GPIO50
FANIN1/GPIO51
FANIN2/GPIO52

N3
P2
W4

R45

2 @

1 10K_0402_5% USB_OC#2

R70

2

1 2.2K_0402_5% SB_CK_SCLK1

TEMP_COMM
TEMPIN0/GPIO61
TEMPIN1/GPIO62
TEMPIN2/GPIO63
TEMPIN3/TALERT#/GPIO64

P5
P7
P8
T8
T7

R71

2

1 2.2K_0402_5% SB_CK_SDAT1

VIN0/GPIO53
VIN1/GPIO54
VIN2/GPIO55
VIN3/GPIO56
VIN4/GPIO57
VIN5/GPIO58
VIN6/GPIO59
VIN7/GPIO60

V5
L7
M8
V6
M6
P4
M7
V7

AZ_BITCLK
AZ_SDOUT
AZ_SDIN3/GPIO46
AZ_SYNC
AZ_RST#

N2
M2
K2
L3
K3

SB_AZ_BITCLK
SB_AZ_SDOUT

L1
L2
L4
J2
J4
M3
L5

SB_AC_BITCLK
SB_AC_SDOUT
ACZ_SDIN0
ACZ_SDIN1
ACZ_SDIN2

AC_BITCLK/GPIO38
AC_SDOUT/GPIO39
ACZ_SDIN0/GPIO42
ACZ_SDIN1/GPIO43
ACZ_SDIN2/GPIO44
AC_SYNC/GPIO40
AC_RST#/GPIO45
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8

D

High: CRT Plugged

@ 2N7002_SOT23-3

FANOUT0/GPIO3
FANOUT1/GPIO48
FANOUT2/GPIO49

USB OC

R474
R358
R485
R334

1
33_0402_5%

USB20_P4
USB20_N4

USB20_P4
USB20_N4

2

@ 47K_0402_5%
8.2K_0402_5%2
R179

31
31

A17

USB INTERFACE

0.1U_0402_16V4Z
A_RST#

U12
NC7SZ08P5X_NL_SC70-5

G

2

SB600 SB

OSC / RST

R176

1

SATA_TX0+
SATA_TX0SATA_TX1+
SATA_TX1SATA_TX2+
SATA_TX2SATA_TX3+
SATA_TX3-

1

1

AH21
AJ21
AH18
AJ18
AH13
AH14
AJ11
AH11

3

1

SATA_STX_DRX_P0
SATA_STX_DRX_N0
SATA_STX_DRX_P1
SATA_STX_DRX_N1
SATA_STX_DRX_P2
SATA_STX_DRX_N2
SATA_STX_DRX_P3
SATA_STX_DRX_N3

P-ATA 66/100

0.01U_0402_16V7K
0.01U_0402_16V7K 1
0.01U_0402_16V7K
0.01U_0402_16V7K 1
0.01U_0402_16V7K
0.01U_0402_16V7K 1
0.01U_0402_16V7K
0.01U_0402_16V7K 1

2 C554
C556
2 C576
C578
2
2 C668
C669
2
2 C581
C582
2
2

SPI ROM

SATA_DTX_C_SRX_P0
SATA_DTX_C_SRX_N0
SATA_DTX_C_SRX_P1
SATA_DTX_C_SRX_N1
SATA_DTX_C_SRX_P2
SATA_DTX_C_SRX_N2
SATA_DTX_C_SRX_P3
SATA_DTX_C_SRX_N3

1

AZALIA

SATA_DTX_C_SRX_P0
SATA_DTX_C_SRX_N0
SATA_DTX_C_SRX_P1
SATA_DTX_C_SRX_N1
SATA_DTX_C_SRX_P2
SATA_DTX_C_SRX_N2
SATA_DTX_C_SRX_P3
SATA_DTX_C_SRX_N3

0.01U_0402_16V7K
0.01U_0402_16V7K 1
0.01U_0402_16V7K
0.01U_0402_16V7K 1
0.01U_0402_16V7K
0.01U_0402_16V7K 1
0.01U_0402_16V7K
0.01U_0402_16V7K 1

HW MONITOR

22
22
22
22
22
22
22
22

SATA_STX_C_DRX_P0
SATA_STX_C_DRX_N0
SATA_STX_C_DRX_P1
SATA_STX_C_DRX_N1
SATA_STX_C_DRX_P2
SATA_STX_C_DRX_N2
SATA_STX_C_DRX_P3
SATA_STX_C_DRX_N3

AC97

SATA_STX_C_DRX_P0
SATA_STX_C_DRX_N0
SATA_STX_C_DRX_P1
SATA_STX_C_DRX_N1
SATA_STX_C_DRX_P2
SATA_STX_C_DRX_N2
SATA_STX_C_DRX_P3
SATA_STX_C_DRX_N3

SERIAL ATA

PORT0 : MAIN HDD
PORT1 : SECOND HDD
PORT2 : MAIN ODD
PORT3 : SECOND ODD

22
22
22
22
22
22
22
22

1

R742
10K_0402_5%
1
2

U18B

D

+3VS

+3VALW

PLACE SATA AC COUPLING
CAPS CLOSE TO CONN.

R635
10K_0402_5%

R462 IS 1K 1% FOR
25MHz XTAL, 4.99K 1%
FOR 100MHz INTERNAL
CLOCK

EC_THERM#

EC_THERM# 8,28

B

SB_AZ_SYNC
SB_AZ_RST#

SB_AC_SDOUT 21
ACZ_SDIN0 35
ACZ_SDIN1 34

SB_AC_RST#

E23
AC21
AD7
AE7
AA4
T4
D4
AB19

218S6ECLA13FG_FCBGA548_SB600

A

35

AZ_BITCLK

R482 2

1 33_0402_5%

34

AC_BITCLK

R234 2

1 33_0402_5%

35

AZ_SYNC

R505 2

1 33_0402_5%

34

AC_SYNC

R236 2

1 33_0402_5%

35

AZ_RST#

R175 2

1 33_0402_5%

34

AC_RST#

R483 2

1 33_0402_5%

35

AZ_SDOUT

R235 2

1 33_0402_5%

AC_SDOUT

R233 2

1 33_0402_5%

34

SB_AZ_BITCLK

SB600 : SA00001DUD0 / S IC 218S6ECLA21FG SB600 FCBGA 549P 0FA
A

SB_AZ_SYNC

SB_AZ_RST#

2005/03/08

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
SB_AZ_SDOUT

2009/06/11

Deciphered Date

Title

SCHEMATIC,MB A4861

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

Rev
D

401650
Sheet

Tuesday, April 14, 2009
1

18

of

46

5

4

3

2

1

XTLVDD_ATA
+3VS

+1.2V_HT
PLLVDD_ATA
L47
1

MBC1608121YZF_0603
2

L13
C534
1U_0402_6.3V4Z

D

+1.2V_HT

1

1U_0402_6.3V4Z

2

1
2
MBC1608121YZF_0603
1U_0402_6.3V4Z

1

C534 CLOSE TO THE
BALL OF U18

C293

2

1

C291

2
D

AVDD_SATA
L45
2
1
FBMA-L11-201209-221LMA30T_0805

U18D
1

C539

1

1

C529

C522

1

1

C543

22U_0805_6.3V6M
2
2
2
2
0.1U_0402_16V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z

2

65mA

C524

PLLVDD_ATA

1U_0402_6.3V4Z

+3VALW

AVDD_USB
L46
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1U_0402_6.3V4Z
2
1
FBMA-L11-201209-221LMA30T_0805
1
1
1
1
1
1
C545
C525
C284
C546
C537
C542
C535

AVDDTX=250mA
1

1

2
2
2
2
2
2
2
0.1U_0402_16V4Z
1U_0402_6.3V4Z 10U_0805_10V4Z

+3VALW

C292

22U_0805_6.3V6M

1

C294

2

1

C286

2
2.2U_0603_6.3V4Z

PLACE C286 AND
C294 CLOSE TO
U18

90mA

2
0.1U_0402_16V4Z
+1.2VALW

+3VS

V5_VREF

1
1K_0402_5%

D6
CH751H-40_SC76
2
1

2

AVDDC

A13

AVSSC

A18
A19
B19
B20
B21

USB_PHY_1.2V_1
USB_PHY_1.2V_2
USB_PHY_1.2V_3
USB_PHY_1.2V_4
USB_PHY_1.2V_5

1mA

+AVDDCK_3.3V
C298

+AVDDCK_1.2V

N1

AVDD

M1

AVSS

HW Monitor PWR

10mA

AA27

CPU_PWR

5mA

AE11

V5_VREF

10mA

A24

AVDDCK_3.3V

40mA

A22

AVDDCK_1.2V

B22

AVSSCK

1 1U_0402_6.3V4Z

Special PWR/GND

+1.8VS
R173 2

A12

15mA

C520 0.1U_0402_16V4Z
2
1

+5VS

AVDDTX_0
AVDDTX_1
AVDDTX_2
AVDDTX_3
AVDDTX_4
AVDDRX_0
AVDDRX_1
AVDDRX_2
AVDDRX_3
AVDDRX_4

1

+AVDD

B

B9
B11
B13
B16
B18
A9
B10
B12
B14
B17

USB PHY Digi. PWR

1U_0402_6.3V4Z

AVDDRX=250mA

C533

Change L12 from SM010014500 as
SM010014520 (2006/08/31)

+3.3V_AVDDC

L12
1
2
MBC1608121YZF_0603

AVDD_SATA_1
AVDD_SATA_2
AVDD_SATA_3
AVDD_SATA_4
AVDD_SATA_5
AVDD_SATA_6
AVDD_SATA_7
AVDD_SATA_8
AVDD_SATA_9
AVDD_SATA_10
AVDD_SATA_11
AVDD_SATA_12
AVDD_SATA_13
AVDD_SATA_14
AVDD_SATA_15

USB Analog PWR

2

XTLVDD_SATA

AE14
AE16
AE18
AE19
AF19
AF21
AG22
AG23
AH22
AH23
AJ12
AJ14
AJ19
AJ22
AJ23

AVSS_SATA_1
AVSS_SATA_2
AVSS_SATA_3
AVSS_SATA_4
AVSS_SATA_5
AVSS_SATA_6
AVSS_SATA_7
AVSS_SATA_8
AVSS_SATA_9
AVSS_SATA_10
AVSS_SATA_11
AVSS_SATA_12
AVSS_SATA_13
AVSS_SATA_14
AVSS_SATA_15
AVSS_SATA_16
AVSS_SATA_17
AVSS_SATA_18
AVSS_SATA_19
AVSS_SATA_20
AVSS_SATA_21
AVSS_SATA_22
AVSS_SATA_23
AVSS_SATA_24
AVSS_SATA_25
AVSS_SATA_26
AVSS_SATA_27

SATA Analog PWR

Change L46 from SM010014500 as
SM010014520 (2006/08/31)

0.1U_0402_16V4Z

AC16

300mA
AVDD_SATA

C

PLLVDD_SATA_1
PLLVDD_SATA_2

5mA
XTLVDD_ATA

SB600 SB

AD14
AJ10

AVSS_USB_1
AVSS_USB_2
AVSS_USB_3
AVSS_USB_4
AVSS_USB_5
AVSS_USB_6
AVSS_USB_7
AVSS_USB_8
AVSS_USB_9
AVSS_USB_10
AVSS_USB_11
AVSS_USB_12
AVSS_USB_13
AVSS_USB_14
AVSS_USB_15
AVSS_USB_16
AVSS_USB_17
AVSS_USB_18
AVSS_USB_19
AVSS_USB_20
AVSS_USB_21
AVSS_USB_22
AVSS_USB_23
AVSS_USB_24
AVSS_USB_25
AVSS_USB_26
AVSS_USB_27
AVSS_USB_28
AVSS_USB_29
AVSS_USB_30
AVSS_USB_31
AVSS_USB_32
AVSS_USB_33

AB14
AB16
AB18
AC14
AC18
AC19
AD12
AD19
AD21
AE12
AE21
AF11
AF14
AF16
AF18
AG11
AG12
AG13
AG14
AG16
AG17
AG18
AG19
AG20
AG21
AH10
AH19

C

A16
C9
C10
C11
C12
C13
C14
C16
C17
C18
C19
C20
D11
D21
E11
E21
F11
F12
F14
F16
F18
F19
F21
G11
G21
H11
H21
J11
J12
J14
J16
J18
J19

B

218S6ECLA13FG_FCBGA548_SB600

SB600 : SA00001DUD0 / S IC 218S6ECLA21FG SB600 FCBGA 549P 0FA
For AMD recommend change to +3.3V_S5
+1.2VALW
C361
C364
C365
C367

2
2
2
2

1
1
1
1

1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z

+3VALW

L71
1
2
@ MBC1608121YZF_0603
C694 1
@
C697 1
@

A

+3VS
+AVDD

2

2.2U_0603_6.3V4Z

2

0.1U_0402_16V4Z

L72
1
2
MBC1608121YZF_0603
C692 1

2 2.2U_0603_6.3V4Z

C695 1

2

+AVDDCK_3.3V

0.1U_0402_16V4Z

GND to B22

GND to M1

C693 1

2 2.2U_0603_6.3V4Z

C696 1

2

2005/03/08

0.1U_0402_16V4Z

Title

SCHEMATIC,MB A4861

Date:

4

3

A

Compal Electronics, Inc.
2009/06/11

Deciphered Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

+AVDDCK_1.2V

GND to B22

Compal Secret Data

Security Classification
Issued Date

L73
1
2
MBC1608121YZF_0603

+1.2V_HT

2

Rev
D

401650
Sheet

Tuesday, April 14, 2009
1

19

of

46

5

4

3

2

+1.2VALW

1

+3VS
U18C

150mA
C750
C752
C753
C751
C754

2
2
2
2
2

1
1
1
1
1
@

D

+3VS

+3VALW

1

1
1

+ C513
2

C521

1

C526

1

C523

1

C518

1

C519

1

C555

1

C558

1

C517
C563
2 22U_0805_6.3V6M
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z

220U_D2_4VM_R15
2
2
2
2
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z

+1.2VS_SB_VDD

500mA

C

L74
2
1
FBMA-L11-201209-221LMA30T_0805

+1.2V_HT

+1.2VS_SB_VDD

+3VALW

15mA
C698

1

2

22U_0805_6.3V6M

C699
C700
C701
C702
C703

1
1
1
1
1

2
2
2
2
2

1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z

C704

1

2

0.1U_0402_16V4Z

+1.2VALW

S5_3.3V_1
S5_3.3V_2
S5_3.3V_3
S5_3.3V_4
S5_3.3V_5
S5_3.3V_6

G4
H1
H2
H3

S5_1.2V_1
S5_1.2V_2
S5_1.2V_3
S5_1.2V_4

450mA
+PCIE_VDDR

+1.2VS_SB_VDD

+PCIE_VDDR
L7
1
2
MBK2012121YZF_2P
B

22U_0805_6.3V6M
1
1
C530
C515
2
22U_0805_6.3V6M

2

1U_0603_10V6K
1
1
C516
C512

2
1U_0603_10V6K

2

2
1U_0603_10V6K

L75
2
1
MBK2012601YZF_2P

+1.2VS_SB_VDD
C705 1
C706 1

2
2

0.1U_0402_16V4Z
1
1
C247
C250
2

1

2

C514

F27
F28
F29
G26
G27
G28
G29
J27
J29
L25
L26
L29
N29

PCIE_VDDR_1
PCIE_VDDR_2
PCIE_VDDR_3
PCIE_VDDR_4
PCIE_VDDR_5
PCIE_VDDR_6
PCIE_VDDR_7
PCIE_VDDR_8
PCIE_VDDR_9
PCIE_VDDR_10
PCIE_VDDR_11
PCIE_VDDR_12
PCIE_VDDR_13

U29

PCIE_PVDD

U28

PCIE_PVSS

V29
V28
V27
V26
V25
V24
V23
V22
U27
T29
T28
T27
T24
T21
P27

PCIE_VSS_42
PCIE_VSS_41
PCIE_VSS_40
PCIE_VSS_39
PCIE_VSS_38
PCIE_VSS_37
PCIE_VSS_36
PCIE_VSS_35
PCIE_VSS_34
PCIE_VSS_33
PCIE_VSS_32
PCIE_VSS_31
PCIE_VSS_30
PCIE_VSS_29
PCIE_VSS_28

35mA

0.1U_0402_16V4Z

+PCIE_PVDD

+PCIE_PVDD

1U_0402_6.3V4Z
22U_0805_6.3V6M

GND to U28

PCIE Analog PWR

Delay PCIE_VDDR / PCIE_PVDD
Add C530 to 22u
PA_SB600AT4

VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
3.3V Standby PWR VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
1.2V Standby PWR VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57

POWER

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDD_10
VDD_11
VDD_12

A2
A7
F1
J5
J7
K1

80mA

SB600 SB

Core PWR

M13
M17
N12
N15
N18
R13
R17
U12
U15
U18
V13
V17

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VDDQ_10
VDDQ_11
VDDQ_12
VDDQ_13
VDDQ_14
VDDQ_15
VDDQ_16
VDDQ_17
VDDQ_18
VDDQ_19
VDDQ_20
VDDQ_21
VDDQ_22
VDDQ_23
VDDQ_24
VDDQ_25
VDDQ_26
VDDQ_27
VDDQ_28

3.3V I/O PWR

A25
A28
C29
D24
L9
L21
M5
P3
P9
T5
V9
W2
W6
W21
W29
AA12
AA16
AA19
AC4
AC23
AD27
AE1
AE9
AE23
AH29
AJ2
AJ6
AJ26

0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
10U_0805_10V4Z

PCIE_VSS_1
PCIE_VSS_2
PCIE_VSS_3
PCIE_VSS_4
PCIE_VSS_5
PCIE_VSS_6
PCIE_VSS_7
PCIE_VSS_8
PCIE_VSS_9
PCIE_VSS_10
PCIE_VSS_11
PCIE_VSS_12
PCIE_VSS_13
PCIE_VSS_14
PCIE_VSS_15
PCIE_VSS_16
PCIE_VSS_17
PCIE_VSS_18
PCIE_VSS_19
PCIE_VSS_20
PCIE_VSS_21
PCIE_VSS_22
PCIE_VSS_23
PCIE_VSS_24
PCIE_VSS_25
PCIE_VSS_26
PCIE_VSS_27

A20
A21
A29
B1
B7
B25
C21
C22
C24
D6
E24
F2
F23
G1
J1
J8
L6
L8
M9
M12
M15
M18
N13
N17
P1
P6
P21
R12
R15
R18
T6
T9
U13
U17
V3
V8
V12
V15
V18
V21
W1
W9
Y29
AA11
AA14
AA18
AC6
AC24
AD9
AD23
AE3
AE27
AG6
AJ1
AJ25
AJ29

D

C

D27
D28
D29
F26
G23
G24
G25
H27
J23
J26
J28
K27
L22
L23
L24
L27
L28
M21
M24
M27
N27
N28
P22
P23
P24
P25
P26

B

218S6ECLA13FG_FCBGA548_SB600

SB600 : SA00001DUD0 / S IC 218S6ECLA21FG SB600 FCBGA 549P 0FA
A

A

2005/03/08

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2009/06/11

Deciphered Date

Title

SCHEMATIC,MB A4861

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

Rev
D

401650
Sheet

Tuesday, April 14, 2009
1

20

of

46

5

4

3

2

REQUIRED STRAPS

Internal RTC: Not connected. *
External RTC: Connected to IRQ# pin on external RTC.
External RTC supports S5 wake capability (from S5
power rail or battery).

SB600 HAS 15K INTERNAL PD FOR AC_SDATA_OUT,
15K PU FOR RTC_CLK, EXTERNAL PU/PD IS
NOT REQUIRED; FOR SB460, EXTERNAL PU/PD ARE
REQUIRED
+3VS

+3VS

+3VS

1

1

+3VALW
1

+3VS

1

+3VALW

1

+3VS

D

1

D

@
10K_0402_5%
R497
10K_0402_5%

2

R496
10K_0402_5%
@

17

RTC_IRQ#

1

2

R248
10K_0402_5%
2

2

2

18 SB_AC_SDOUT
17 RTC_CLK
CLK_PCI_CLK4
CLK_PCI_CLK6
CLK_PCI_CLK0
CLK_PCI_CLK1

R249
10K_0402_5%
@
2

1

R473
R202
10K_0402_5%
@

2

R499
2.2K_0402_5%
@

17
17
17
17

1

R469

2

1

10K_0402_5%
R492
10K_0402_5%
@

2

R504
10K_0402_5%
2

R245
10K_0402_5%
2

2

R494
10K_0402_5%
@

1

1

1

@

C

C

AC_SDOUT RTC_CLK
USE
DEBUG
STRAPS

PULL
HIGH

INTERNAL
RTC

PCI_CLK4
USE INT.
PLL48

PCI_CLK6

PCI_CLK0

CPU IF=K8

ROM TYPE:

DEFAULT
DEFAULT

IGNORE
DEBUG
STRAPS

PULL
LOW

DEFAULT

EXTERNAL
RTC

PCI_CLK1

H, H = PCI ROM
H, L = SPI ROM

USE EXT.
48MHZ

CPU IF=P4

L, H = LPC ROM

DEFAULT

L, L = FWH ROM

DEFAULT

DEBUG STRAPS
SB600 HAS 15K INTERNAL PU FOR PCI_AD[28:23]

PULL
HIGH

PULL
LOW

1

1

R195
2.2K_0402_5%
@

2

R242
2.2K_0402_5%
@

PCI_AD27

PCI_AD26

PCI_AD25

PCI_AD24

PCI_AD23

USE
LONG
RESET

USE
LONG
RESET

USE PCI
PLL

USE ACPI
BCLK

USE IDE
PLL

USE DEFAULT
PCIE STRAPS

BOOTFAILTIMER
DISABLED

DEFAULT

DEFAULT

DEFAULT

DEFAULT

DEFAULT

DEFAULT

DEFAULT

USE
SHORT
RESET

USE
SHORT
RESET

BYPASS
PCI PLL

BYPASS
ACPI
BCLK

BYPASS IDE
PLL

USE EEPROM
PCIE STRAPS

BOOTFAILTIMER
ENABLED

SB460 ONLY

2.2K IF USED FOR SB600.
10K IF USED FOR SB460.

2

1
R190
2.2K_0402_5%
@
2

R222
2.2K_0402_5%
@
2

IDE_DACK# PCI_AD28

R213
2.2K_0402_5%
@
2

2

R217
2.2K_0402_5%
@

1

B

1

B

PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
1

17
17
17
17
17
17

SB600 ONLY

NOTE: FOR
SB460,
PCI_AD23 IS
RESERVED

SB600 ONLY

A

A

Compal Secret Data

Security Classification
2005/03/08

Issued Date

2009/06/11

Deciphered Date

Title

Compal Electronics, Inc.
SCHEMATIC,MB A4861

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

Rev
D

401650
Sheet

Tuesday, April 14, 2009
1

21

of

46

5

4

3

+5VS

2

1

+3VS
+5VS

Placea caps. near ODD CONN.

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

C360
10U_0805_10V4Z
D

1

C363

2

C366

2

1

1

C351

C349

1

1

C347

C346

1
1

C368

2

0.1U_0402_16V4Z

2

10U_0805_10V4Z

2

1000P_0402_50V7K

2

2

1

C150

10U_0805_10V4Z

2

2
1U_0402_6.3V4Z

1000P_0402_50V7K

1
C148

C153

2

0.1U_0402_16V4Z

1

2

C149
D

2
1000P_0402_50V7K

SATA HDD CONN

SATA ODD CONN

JSATA2
SATA_STX_C_DRX_P0
SATA_STX_C_DRX_N0

18 SATA_STX_C_DRX_P0
18 SATA_STX_C_DRX_N0

SATA_DTX_C_SRX_N0
SATA_DTX_C_SRX_P0

18 SATA_DTX_C_SRX_N0
18 SATA_DTX_C_SRX_P0

1
2
3
4
5
6
7

JSATA1

GND
HTX+
HTXGND
HRXHRX+
GND

18 SATA_STX_C_DRX_P2
18 SATA_STX_C_DRX_N2

+5VS
1

C370
@

R544

1

2

0_0805_5%
C

R545

1

+5VS

SATA_DTX_C_SRX_N2
SATA_DTX_C_SRX_P2

18 SATA_DTX_C_SRX_N2
18 SATA_DTX_C_SRX_P2

+

+3VS

SATA_STX_C_DRX_P2
SATA_STX_C_DRX_N2

2

0_0805_5%

8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

VCC3.3
VCC3.3
VCC3.3
GND
GND
GND
VCC5
VCC5
VCC5
GND
RESERVED
GND
VCC12
VCC12
GND
VCC12
GND

2

150U_D2_6.3VM

1
R617

2
@ 1K_0402_1%
+5VS

Close to SATA HDD

1
2
3
4
5
6
7

GND
A+
AGND
BB+
GND

8
9
10
11
12
13

DP
+5V
+5V
MD
GND
GND

C

GND
GND

15
14

SANTA_206401-1_13P
CONN@

KALA0 used
24
23

OCTEK_SAT-22SU1G_NR
CONN@

KALA0 used

JP2

18 SATA_DTX_C_SRX_N1
18 SATA_DTX_C_SRX_P1
18 SATA_STX_C_DRX_P3
18 SATA_STX_C_DRX_N3
18 SATA_DTX_C_SRX_N3
18 SATA_DTX_C_SRX_P3

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30

31
32
33
34
35
36

Second ODD

18 SATA_STX_C_DRX_P1
18 SATA_STX_C_DRX_N1

GND
GND
GND
GND
GND
GND

Second HDD
B

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30

+5VS

B

+3VS

ACES_88018-304G
CONN@

+5VS

+3VS
0.1U_0402_16V4Z

1

1

C574

2

1

C577

2

1000P_0402_50V7K

A

0.1U_0402_16V4Z

1

C579

2

C580

2

10U_0805_10V4Z

0.1U_0402_16V4Z

1

C572

2
1000P_0402_50V7K

1

2

C573

1

C571

2
10U_0805_10V4Z

A

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2005/03/08

Issued Date

Deciphered Date

2009/06/11

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

SCHEMATIC,MB A4861
Document Number

Rev
D

401650
Tuesday, April 14, 2009

Sheet
1

22

of

46

A

B

C

D

E

+5VS

+R_CRT_VCC

2

1

1

1.1A_6VDC_FUSE
1

C407
0.1U_0402_16V4Z

3

2

3

2

3

W=40mils

2

RB491D_SC59-3

2

+CRT_VCC

W=40mils
F1

D17

1

1

CRT Connector

1

D18
D19
D20
@
@
@
DAN217_SC59 DAN217_SC59 DAN217_SC59

2

+5VS

1

1

2

150_0402_1%

R338

2

R339

1

R340

1

C408

1

C412

C414

C413

150_0402_1% 2 8P_0402_50V8D 2 8P_0402_50V8D 2 8P_0402_50V8D

1

1
C410

6P_0402_50V8D
2

1

6P_0402_50V8D
2

2

C409
6P_0402_50V8D
C406
100P_0402_50V8J

+CRT_VCC

CRT_HSYNC

2

0_0402_5%

2

A

1
L37

2
MBC1608121YZF_0603

VSYNC_L

Y

1

D_CRT_HSYNC
C424

2

74AHCT1G125GW_SOT353-5
+CRT_VCC
2
0.1U_0402_16V4Z

1
R356

CRT_VSYNC

2

0_0402_5%

2

CRT_DET# 18

68P_0402_50V8J
2
D_DDC_CLK
1

A

1

5
2

R636
100K_0402_5%

C422
68P_0402_50V8J

2

U35
Y

4

D_CRT_VSYNC

+CRT_VCC

G

VGA_CRT_VSYNC

3

14 VGA_CRT_VSYNC

1
C423

2
P

1
C433

OE#

2

1

C411
4

CONN@

D_DDC_DATA

U36

G

1
R354

3

VGA_CRT_HSYNC

HSYNC_L

10P_0402_50V8J

14 VGA_CRT_HSYNC

1
10K_0402_5%

2
MBC1608121YZF_0603

10P_0402_50V8J

P

5

2
R360
1

2
0.1U_0402_16V4Z

OE#

1
C434

1
L38

16

150_0402_1%

KAW60 used
SUYIN_070549FR015S208CR

17

CRT_B

2

CRT_B

1

14

CRT_G

JCRT1
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5

1

CRT_G

2

14

L32
1
2 CRT_R_L
FCM2012CF-800T06_2P
L34
1
2 CRT_G_L
FCM2012CF-800T06_2P
L33
1
2 CRT_B_L
FCM2012CF-800T06_2P

CRT_R

1

CRT_R

1

14

74AHCT1G125GW_SOT353-5

Close to Conn side
+CRT_VCC

1

1

+3VS

R77

R72

1

3
S

D_DDC_DATA

D

2

2
G

6.8K_0402_5%
2

6.8K_0402_5%

3
S

3

1
D

D_DDC_CLK

VGA_DDC_DATA 14
2
G

Q50
BSH111 1N_SOT23-3

3

VGA_DDC_CLK 14

Q51
BSH111 1N_SOT23-3

4

4

2005/03/08

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

Deciphered Date

2009/06/11

Title

SCHEMATIC,MB A4861

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

A

B

C

D

Rev
D

401650

Tuesday, April 14, 2009

Sheet
E

23

of

46

5

4

3

2

1

LCD POWER CIRCUIT
D

D

+3VS
+LCDVDD

+3VALW

2

2

W=60mils
3

1

100K_0402_5%

2

3

1
1K_0402_5%
1

1

JLVDS1

W=60mils

C431
2 0.047U_0402_16V7K

1

+LCDVDD

+3VS
14 EDID_LCD_CLK
14 EDID_LCD_DAT

2

2N7002_SOT23-3

1

C415
4.7U_0805_10V4Z

42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2

+INVPWR_B+

+LCDVDD

@ 100K_0402_5%

1

S

Q25

Q23
AO3413_SOT23-3

2
G

R345
10K_0402_5%

2

0.1U_0402_16V4Z

LVDS_TXUP1
LVDS_TXUN1

14 LVDS_TXUP1
14 LVDS_TXUN1

LVDS_TXUP2
LVDS_TXUN2

14 LVDS_TXUP2
14 LVDS_TXUN2

LVDS_TXUCKN
LVDS_TXUCKP

14 LVDS_TXUCKN
14 LVDS_TXUCKP
18
18

R759 1
R760 1

USB20_N9
USB20_P9

EDID_LCD_CLK
EDID_LCD_DAT
LVDS_TXUN0
LVDS_TXUP0

14 LVDS_TXUN0
14 LVDS_TXUP0

C420

2

C

1
ENVDD

ENVDD

3

R347
D

2

1

2
R278

G

2
G
S

14

LCD/PANEL CONN.

@ 4.7U_0805_10V4Z

R348

D

2N7002_SOT23-3

C77

D

Q22

1 2

R274
300_0603_5%

S

1

1

2 0_0402_5%
2 0_0402_5%

USB20_CMOS_N9
USB20_CMOS_P9

1
@

4
1

3

3

2

2

41
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1

GND
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1

ACES_88242-4001
CONN@

L77

4

GND
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2

KALA0 used

DAC_BRIG
INVT_PWM
DISPOFF#

DAC_BRIG 28
INVT_PWM 28
+LCDVDD

LVDS_TXLN0
LVDS_TXLP0

LVDS_TXLN0 14
LVDS_TXLP0 14

LVDS_TXLN1
LVDS_TXLP1

LVDS_TXLN1 14
LVDS_TXLP1 14

LVDS_TXLP2
LVDS_TXLN2
LVDS_TXLCKN
LVDS_TXLCKP
R761 1
R762 1

C

LVDS_TXLP2 14
LVDS_TXLN2 14
LVDS_TXLCKN 14
LVDS_TXLCKP 14

2 0_0603_5%
2 0_0603_5%

@

+3VS
+3VALW

1
C768 0.1U_0402_16V4Z
2

WCM2012F2S-900T04_0805

+INVPWR_B+
B

L20 2
1
FBMA-L11-201209-221LMA30T_0805

W=40mils

+3VS

1

R1
C426
@ 0.1U_0402_16V4Z

C379

4.7K_0402_5%
28

BKOFF#

BKOFF#

1

D2
2 RB751V_SOD323

2

2

B

B+

L15 2
1
FBMA-L11-201209-221LMA30T_0805

1

+3VS

1

1

C362

680P_0402_50V7K 68P_0402_50V8J
2
2

DISPOFF#

+LCDVDD

1

INVT_PWM

1

D21
BAS16_SOT23-3
@

2

2

C416
1U_0402_6.3V4Z
@

DAC_BRIG

C371 1

2 220P_0402_50V7K

INVT_PWM

C372 1

2 220P_0402_50V7K

C377 1

2 220P_0402_50V7K

DISPOFF#

1

2

C383
10U_0805_10V4Z

1

2

C382
0.1U_0402_16V4Z

A

A

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2005/03/08

Issued Date

Deciphered Date

2009/06/11

Title

SCHEMATIC,MB A4861

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

Rev
D

401650

Tuesday, April 14, 2009

Sheet
1

24

of

46

5

4

3

2

+3V_LAN

1 8114@ 2
R820
0_0603_5%

C932

2
4.7UH_1008HC-472EJFS-A_5%_1008

0.1U_0402_16V4Z

R821

2

Place Close to Chip

R822

4.7K_0402_1%

2

+AVDD_CEN

1

1

1

+1.8_VDD/LX

4.7K_0402_1%

2

1
L88 8132@

U84
R8441

2 0_0603_5%
1

C933

D

4.7U_0805_10V4Z
8132@

1

+3V_LAN

+2.5V_VDDH/VDD17 1
+2.5V_VDDH
1
2
2
R824 8132@ 0_0603_5%
R825 8114@ 0_0603_5%
C934

1
2
3
4

0.1U_0402_16V4Z
2 8132@

A0
A1
A2
GND

VCC
WP
SCL
SDA

8
7
6
5

TWSI_SCL
TWSI_SDA

LAN_MIDI0+ R843 2

1 49.9_0402_1%

LAN_MIDI0-

R845 2

1 49.9_0402_1%

LAN_MIDI1+ R846 2

1 49.9_0402_1%

LAN_MIDI1-

1 49.9_0402_1%

R847 2

C978 1

2 0.1U_0402_16V4Z

C979 1

2 0.1U_0402_16V4Z
D

AT24C02BN-SH-T_SO8
@
U85

1
R829

+2.5V_VDDH/VDD17

6

VDDHO

CTR12

5

CTR12

3
4

PERSTn
WAKEn

2
4.7K_0402_5%

16 CLK_PCIE_LAN#

RX_P
RX_N

PCIE_MRX_PTX_P3 38

TX_P

PCIE_MRX_PTX_N3 37

TX_N

2
C940
2
C943

1
1

0.1U_0402_16V7K
0.1U_0402_16V7K

LAN_X1
LAN_X2

2

LAN_X2

25MHZ_20P

2
1
R831 2.37K_0402_1%

1

C946
27P_0402_50V8J

2

REFCLKN

44

Y8

1

40

13 PCIE_MTX_C_PRX_P3

Place Close to Chip

2

REFCLKP

13 PCIE_MTX_C_PRX_N3

13 PCIE_MRX_C_PTX_N3

1

VBG1P18V

43

13 PCIE_MRX_C_PTX_P3

LAN_X1

7
41

C947
27P_0402_50V8J

TWSI_CLK
TWSI_DATA

29
30

LED_ACTn
LED_10_100n

47
48

LED_DUPLEXn

27

TRXP0
TRXN0
TRXP1
TRXN1

13
14
17
18

AVDDL_REG
AVDDL/AVDDL_REG

11
42

TWSI_SCL
TWSI_SDA
LAN_ACTIVITY#
LAN_LINK#

LAN_ACTIVITY# 26
LAN_LINK# 26

LAN_MIDI0+
LAN_MIDI0LAN_MIDI1+
LAN_MIDI1-

LAN_MIDI0+
LAN_MIDI0LAN_MIDI1+
LAN_MIDI1-

26
26
26
26

Layout Notice : Close to chip

AVDDVCO1
AVDDVCO2

+3V_LAN

s
o
r
e
h
t
A

8114@
2
1
C937
1000P_0402_50V7K
2
1
C938
0.1U_0402_16V7K
2
1
C939
0.1U_0402_16V7K

16 CLK_PCIE_LAN

C

VDD33

14,18,28,30,31 NB_RST#

28 EC_PME#
+3V_LAN

VDD18O

2

AR8114A 10/100 LAN

9
10

XTLO
XTLI

31
33

SMCLK
SMDATA

12
34

RBIAS
TESTMODE

49

GND

DVDDL0
DVDDL1
DVDDL2
DVDDL3

28
32
45
46

+1.2_DVDDL

AVDDL0
AVDDL1
AVDDL2
AVDDL3
AVDDL4

8
16
22
36
39

+1.2_AVDDL

AVDDH0
AVDDH1
AVDDH2

15
19
25

+2.5V_VDDH

NC_0
NC_1
NC_2
NC_3
NC_4
NC_5

20
21
23
24
26
35

1
R830

+3VALW

C944

1
C948
0.1U_0402_16V4Z
8114@

8114@
2
2
2
2
C983
C954
1U_0603_10V4Z 0.1U_0402_16V4Z

AVDDVCO1

2 0_0805_5%

AVDDVCO2

2

+2.5V_VDDH

C958
0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

2

1 8132@ 2+2.5V_VDDH
R833
0_0402_5%

R832
10K_0402_1%
8114@

Q73

CTR12

4
2

2

C949
0.1U_0402_16V4Z
8132@
B

C952
0.1U_0402_16V4Z

C960
0.1U_0402_16V4Z
1
1
1

Place Close to Pin8、16、22、36、39
C984
C963
C965
+1.2_AVDDL 1U_0603_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
1
1
1
1
1
1

2
2
C959
1U_0603_10V4Z

2

0.1U_0402_16V4Z

2

8114@

2
2
2
2
C962
C964
0.1U_0402_16V4Z 0.1U_0402_16V4Z

2005/07/29

Issued Date

Deciphered Date

Title

Date:

3

0.1U_0402_16V4Z

Compal Electronics, Inc.
2009/06/11

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4

2

A

Compal Secret Data

Security Classification

C966

C961
8132@

If overclocking, R638, L30 stuffed and R637 removed.
If not overclocking, R637, L30 suffed and R638 removed.
AR8132:L30=0ohm,C856=0.1uF. remove C857

5

2

@

1

A

C

1

2
+1.2_DVDDL

C953
C955
0.1U_0402_16V4Z 0.1U_0402_16V4Z
1
1
1
1
1

Place Close to Pin15、19、25
R546 1

2

1

8132@
0_0603_5%
2
1
1
C956
1000P_0402_50V7K
C957
1U_0603_10V4Z
2
2

C945

1

Place Close to Pin 28、32、45、46

R835
1

2

1

NJT4030PT1G_SOT223
8114@
+1.2_AVDDL
1
1
C950
C951
10U_0805_10V4Z
0.1U_0402_16V4Z
8114@
8114@
2
2

+1.2_AVDDL

1
2
R834
0_0603_5%

C942

+3V_LAN

For AR8131V1

+1.2_DVDDL

1

0.1U_0402_16V4Z

change AR8132-AL1E for pre-PVT

L89
FBMA-L11-201209-221LMA30T_0805
1
2
8114@

C941

4.7U_0805_10V4Z

AR8114-AL1E_QFN48_6X6

B

0.1U_0402_16V4Z

2
0_1206_5%

1

1 0.1U_0402_16V7K

8132@

1

+3V_LAN

8114@
C935 2
1 1U_0603_10V4Z
C982 2

+1.8_VDD/LX

1
8114@ 1U_0603_10V4Z

3

2
C936

2

SCHEMATIC,MB A4861
Document Number

Rev
D

401650
Friday, April 10, 2009

Sheet
1

25

of

46

5

4

3

2

1

+AVDD_CEN

2

C967
1
2
220P_0402_50V7K
R836
0_0603_5%

JRJ1

1

D

25
25

LAN_MIDI0+
LAN_MIDI0-

LAN_MIDI0+
LAN_MIDI0-

25
25

1
2
3
4
5
6
7
8

LAN_MIDI1+
LAN_MIDI1-

LAN_MIDI1+
LAN_MIDI1-

RD+
RDCT
NC
NC
CT
TD+
TD-

2
R837

25 LAN_ACTIVITY#

T1
RX+
RXCT
NC
NC
CT
TX+
TX-

1
R14

RJ45_MIDI0+
RJ45_MIDI0-

16
15
14
13
12
11
10
9

1 LAN_ACTIVITY#_R
510_0402_5%

2
5.1K_0402_5%

12

Amber LED+

11

Amber LED-

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

RJ45_MIDI1+

3

PR2+

RJ45_MIDI0-

2

PR1-

RJ45_MIDI0+

1

PR1+

RJ45_MIDI1RJ45_MIDI1+
RJ45_MIDI1-

R840
75_0402_1%

1

1

C969

25

C970

+3V_LAN

2
R838

LAN_LINK#

LAN_LINK#

10

2

SHLD1

15

SHLD2

14

SHLD1

13

Green LED+
FOX_JM36113-L2R8-7F
CONN@

1

0.1U_0402_16V4Z

SHLD2

Green LED-

9

1
510_0402_5%

RJ45_GND

0.1U_0402_16V4Z
2

2

2

R839
75_0402_1%
2

LAN_TCT

1

1

350uH_NS0013LF

D

16

C968
220P_0402_50V7K

C

C

RJ45_GND

1

LANGND
1

2

C973
1000P_1206_2KV7K

1
C974
2

2

C975
4.7U_0805_10V4Z

0.1U_0402_16V4Z

LAN_LINK#

2

LAN_ACTIVITY#_R
3

LAN_ACTIVITY#_R
1
2
C976
@ 68P_0402_50V8J

D16
@
LAN_LINK#

H18
H_3P4

PJDLC05_SOT23-3

1

@

1

1

1

1

@

C977
@ 68P_0402_50V8J

H17
H_3P4
@

B

1

@

@

H22
H_3P3
@

H27
H_2P8
@

1

@

H12
H_3P3

1

H3
H_3P3

@

1

@

1

1

@

H23
H_3P4

H6
H_2P8

H2
H_3P3

@

H24
H_3P4

2

H16
H_4P2
@

1

@

H20
H_3P4
@

H25
H_3P4
@

1

@

1

1
1

@

H8
H_4P0N
@

H26
H_3P4

H4
H_3P4

1

@

@

H21
H_4P6X4P0N

FD2
@

FIDUCIAL_C40M80

1

1

FD1

A

@

FD3
@

FIDUCIAL_C40M80

FD4
@

FIDUCIAL_C40M80

1

1

@

1

H15
H_4P2

1

@

H10
H_4P2

1

1

1

@

H5
H_2P8

A

H19
H_3P4

H9
H_3P4

H11
H_4P2

1

1

@

H7
H_3P4

1

B

H14
H_3P4

1

1

H1
H_3P4

1

Compal Secret Data

Security Classification
2005/03/08

Issued Date

@

2009/06/11

Deciphered Date

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

FIDUCIAL_C40M80

Date:

5

Compal Electronics, Inc.
SCHEMATIC,MB A4861

4

3

2

Rev
D

401650
Sheet

Tuesday, April 14, 2009
1

26

of

46

5

4

3

2
R675

2

1

1
0_0402_5%

U77

+3VS
+3VS

D

+3V_CARD

@
1
2
R548
0_0805_5%
1
2
R547
0_0805_5%

+3VALW

2
C851

+XDPWR_SDPWR_MSPWR

C852

1 C853

1
@

2

0.1U_0402_16V4Z
RST#
MODE_SEL
XTLO
XTLI

2

2

4.7U_0603_6.3V6K

R674
100K_0402_5%

18
18
34

1

@

1
R335

1
0.1U_0402_16V4Z

RST#
2
0_0402_5%

USB20_N8
USB20_P8

USB20_N8
USB20_P8
5IN1_LED#

1
3
7
9
11
33

AV_PLL
NC
NC
CARD_3V3
D3V3
D3V3

8
44
45
47
48

3V3_IN
RST#
MODE_SEL
XTLO
XTLI

4
5
14

DM
DP
GPIO0

1

2

C854
1U_0402_6.3V4Z

1

MODE_SEL

1

R680
0_0402_5%

2
2

@ C855
47P_0402_50V8J

2

RREF

12
32

DGND
DGND

6
46

AGND
AGND

1
R676

CLK_SD_48M

R678
6.19K_0402_1%

2
0_0402_5%

1

1
C856

2

XD_CLE_SP19
XD_CE#_SP18
XD_ALE_SP17
SD_DAT2/XD_RE#_SP16
SD_DAT3/XD_WE#_SP15
XD_RDY_SP14
SD_DAT4/XD_WP#/MS_D7_SP13
SD_DAT5/XD_D0/MS_D6_SP12
SD_CLK/XD_D1/MS_CLK_SP11
SD_DAT6/XD_D7/MS_D3_SP10
MS_INS#_SP9
SD_DAT7/XD_D2/MS_D2_SP8
SD_DAT0/XD_D6/MS_D0_SP7
SD_DAT1/XD_D3/MS_D1_SP6
XD_D5_SP5
XD_D4/SD_DAT1_SP4
SD_CD#_SP3
SD_WP_SP2
XD_CD#_SP1
EEDI

43
42
41
40
39
38
37
35
34
31
29
28
27
26
25
23
21
20
19
18

XTAL_CTR
MS_D5

13
24

EEDO
EECS
EESK
SD_CMD

15
16
17
36

1
C860

2
1U_0402_6.3V4Z
D

XDCLE
XDCE#
XDALE
SDDAT2_XDRE#
SDDAT3_XDWE#
XD_RDY
SDDAT4_XDWP#_MSD7
SDDAT5_XDD0_MSD6
SDCLK_XDD1_MSCLK_L
SDDAT6_XDD7_MSD3
MS_INS#
SDDAT7_XDD2_MSD2
SDDAT0_XDD6_MSD0
SDDAT1_XDD3_MSD1
XDD5_MSBS
XDD4_SDDAT1
SDCD
SDWP
XDCD
XTAL_CTR

2
R681

2
R671

1
0_0603_5%

SDCLK_XDD1_MSCLK
1
0_0402_5%

XTAL_CTR
If Open , use 12MHz. crystal
If Pull high , use CLKGEN 48MHz.

+3VS

C

SD_CMD

1

RTS5159-GR_LQFP48_7X7
R672
0_0402_5%

@ Y7
12MHZ_16PF_6X12000012

2
C858

2

1

XTLI

2
6P_0402_50V8D

R673
10_0402_5%

1

@

1

16

10
22
30

2

2

C

VREG
MS_D4
NC

10P_0402_50V8J
@
1
2
C857
6P_0402_50V8D

XTLO

EMI
+CARDPWR
+CARDPWR
B

+CARDPWR

3

1
C477

Close to CLK_SD_48M via

2

1

1

C342
C480
0.1U_0402_16V4Z
2
2

10U_0805_10V4Z

0.1U_0402_16V4Z

+XDPWR_SDPWR_MSPWR
+CARDPWR

0.1U_0402_16V4Z

2

1
R318

EMI

32
10
9
8
7
6
5
4

XD-D0
XD-D1
XD-D2
XD-D3
XD-D4
XD-D5
XD-D6
XD-D7

SDDAT3_XDWE#
SDDAT4_XDWP#_MSD7
XDALE
XDCD
XD_RDY
SDDAT2_XDRE#
XDCE#
XDCLE

34
33
35
40
39
38
37
36

XD-WE
XD-WP
XD-ALE
XD-CD
XD-R/B
XD-RE
XD-CE
XD-CLE

11
31

7IN1 GND
7IN1 GND

2
0_0603_5%

2

41
42

1
A

R295
100K_0402_5%

7 IN 1 CONN

21
28

SD_CLK
SD-DAT0
SD-DAT1
SD-DAT2
SD-DAT3
SD-DAT4
SD-DAT5
SD-DAT6
SD-DAT7
SD-CMD
SD-CD-SW

20
14
12
30
29
27
23
18
16
25
1

SD-WP-SW

2

MS-SCLK
MS-DATA0
MS-DATA1
MS-DATA2
MS-DATA3
MS-INS
MS-BS

26
17
15
19
24
22
13

SDCLK_XDD1_MSCLK
SDDAT0_XDD6_MSD0
XDD4_SDDAT1
SDDAT2_XDRE#
SDDAT3_XDWE#
SDDAT4_XDWP#_MSD7
SDDAT5_XDD0_MSD6
SDDAT6_XDD7_MSD3
SDDAT7_XDD2_MSD2
SD_CMD
SDCD
SDWP
SDCLK_XDD1_MSCLK
SDDAT0_XDD6_MSD0
SDDAT1_XDD3_MSD1
SDDAT7_XDD2_MSD2
SDDAT6_XDD7_MSD3
MS_INS#
XDD5_MSBS

1

C862

@

2

22P_0402_50V8J

7IN1 GND
7IN1 GND
TAITW_R015-B10-LM
CONN@

C348
0.1U_0402_16V4Z

SD-VCC
MS-VCC

A

JAWD0 used

1

2

XD-VCC

SDDAT5_XDD0_MSD6
SDCLK_XDD1_MSCLK
SDDAT7_XDD2_MSD2
SDDAT1_XDD3_MSD1
XDD4_SDDAT1
XDD5_MSBS
SDDAT0_XDD6_MSD0
SDDAT6_XDD7_MSD3

+5VS

1 C859

B

JREAD1

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2005/07/29

Issued Date

Deciphered Date

2009/06/11

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

SCHEMATIC,MB A4861
Document Number

Rev
D

401650
Tuesday, April 14, 2009

Sheet
1

27

of

46

5

4

3

2

1

+3VALW

C566

55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82

KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
KSI4/GPIO34
KSI5/GPIO35
KSI6/GPIO36
KSI7/GPIO37
KSO0/GPIO20
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
KSO4/GPIO24
KSO5/GPIO25 Int. K/B
KSO6/GPIO26 Matrix
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
KSO16/GPIO48
KSO17/GPIO49

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

77
78
79
80

SCL1/GPIO44
SDA1/GPIO45
SCL2/GPIO46
SDA2/GPIO47

C

R514 2

1 10K_0402_5%

EC_PME#

R729 1

2 2.2K_0402_5% EC_SMB_CK1

R730 1

2 2.2K_0402_5%

EC_SMB_DA1

R634 2

@

1 47K_0402_5%

KSO1

R639 2

@

1 47K_0402_5%

KSO2

EC test-mode issue
+3VS
2.2K_0402_5%
EC_SMB_CK2
2
EC_SMB_DA2
2
2.2K_0402_5%

41
41
8
8

+5VS

B

1 TP_CLK
R208
1 TP_DATA
R207

2
4.7K_0402_5%
2
4.7K_0402_5%

1
R519

17 PM_SLP_S3#
17 PM_SLP_S5#
18
EC_SMI#
34
LID_SW#
30,37,42 SUSP#
17 PBTN_OUT#
25
EC_PME#

ENBKL

2

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

6 FAN_SPEED1
33,37 VLDT_EN

10K_0402_5%

33
ON/OFF
34 PWR_SUSP_LED
34
NUM_LED#

R460
1

@

EC_CRY1
EC_CRY2

EC_CRY1

4

IN

OUT
NC

2

15P_0402_50V8J
2

NC

1

1

C343

122
123

67
PSCLK1/GPIO4A
PSDAT1/GPIO4B
PSCLK2/GPIO4C
PSDAT2/GPIO4D
TP_CLK/PSCLK3/GPIO4E
TP_DATA/PSDAT3/GPIO4F
SDICS#/GPXOA00
SDICLK/GPXOA01
SDIDO/GPXOA02
SDIDI/GPXID0

1
2
3
4

INVT_PWM 24
BEEP#
35
FANPWM 6
ACOFF 40
BATT_TEMP
BATT_OVP
AD_BID0

SPIDI/RD#
SPIDO/WR#
SPICLK/GPIO58
SPICS#

119
120
126
128

CIR_RX/GPIO40
CIR_RLC_TX/GPIO41
FSTCHG/SELIO#/GPIO50
BATT_CHGI_LED#/GPIO52
CAPS_LED#/GPIO53
BATT_LOW_LED#/GPIO54
SUSP_LED#/GPIO55
SYSON/GPIO56
VR_ON/XCLK32K/GPIO57
AC_IN/GPIO59

73
74
89
90
91
92
93
95
121
127

EC_RSMRST#/GPXO03
EC_LID_OUT#/GPXO04
EC_ON/GPXO05
EC_SWI#/GPXO06
ICH_PWROK/GPXO06
GPO
BKOFF#/GPXO08
WL_OFF#/GPXO09
GPXO10
GPXO11

100
101
102
103
104
105
106
107
108

PM_SLP_S4#/GPXID1
ENBKL/GPXID2
GPXID3
GPXID4
GPXID5
GPXID6
GPXID7

110
112
114
115
116
117
118

V18R

124

SPI Flash ROM

GPIO
SM Bus

GPI

KB926QFD2_LQFP128_14X14

20mil

EC_RSMRST#

TP_CLK
TP_DATA

@ C762
0.1U_0402_16V4Z

TP_CLK 29
TP_DATA 29

2

B

1

A

U45

Y

RSMRST#

4

@ NC7SZ08P5X_NL_SC70-5

1

TP_LOCK_LED# 34

RSMRST# 18
C

R657
10K_0402_5%

R740
@

2

10K_0402_5%

ID_15_17
S3_STATE
VGATE

S3_STATE 17
VGATE
44
EC_SI_SPI_SO 30
EC_SO_SPI_SI 30
EC_SPICLK 30
EC_SPICS#/FSEL# 30
3S/4S#
40
WL_OFF# 31
FSTCHG 40
BATT_GRN_LED# 34
CAPS_LED# 34
BATT_AMB_LED# 34
PWR_LED 34
SYSON
30,37,43
VR_ON 44
ACIN
37,38,40

FSTCHG

ACIN

ID DETECT
High : for 15"
Low : for 17"
+3VALW

ID_15_17
R186
R543

2
2

1
100K_0402_5%
1
17@ 100K_0402_5%
15@

B

EC_RSMRST#

SB_PWRGD

EC_LID_OUT# 18
EC_ON
33
EC_SWI# 17
BKOFF#

24

R219

Ra

EC_MUTE#

Analog Board ID definition,
Please see page 3.

+3VALW

@
100K_0402_5%

EC_MUTE# 36

ENBKL
EAPD

14
35

AD_BID0
R215

Rb

NB_PWRGD

8.2K_0402_5%

1

2

C306
0.1U_0402_16V4Z

65W/90W# 40

1

2

C674
4.7U_0805_10V4Z

NB_PWRGD

R658
2

0_0402_5%
1

NB_PWROK 14,33

SB_PWRGD

R652
2

0_0402_5%
1

SB_PWROK 8,17,33

Deciphered Date

A

Compal Electronics, Inc.

Compal Secret Data
2007/5/18

Issued Date

R656
2 0_0402_5%
+3VALW

DAC_BRIG 24
EN_DFAN1 6
IREF
40
CALIBRATE# 40

TP_LOCK_LED#

E51RXD_P80CLK 31
E51TXD_P80DATA 31

BATT_TEMP 41
BATT_OVP 40
ADP_I
40

L69

Security Classification

E51RXD_P80CLK
E51TXD_P80DATA

ACES_85205-0400
CONN@

ECAGND 1
2
FBMA-L11-160808-800LMT_0603

15P_0402_50V8J
2

1
2
3
4

1

SPI Device Interface

Chagne to D3 version

Y1

83
84
85
86
87
88
97
98
99
109

XCLK1
XCLK0

1

2009/06/11

Title

SCHEMATIC,MB A4861

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Tuesday, April 14, 2009
Date:

32.768KHZ_12.5P_MC-306

5

68
70
71
72

PS2 Interface

PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08
LID_SW#/GPIO0A
SUSP#/GPIO0B
PBTN_OUT#/GPIO0C
GPIO
EC_PME#/GPIO0D
EC_THERM#/GPIO11
FAN_SPEED1/FANFB1/GPIO14
FANFB2/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
ON_OFF/GPIO18
PWR_LED#/GPIO19
NUMLED#/GPIO1A

EC_CRY2

3

C344

A

6
14
15
16
17
18
19
EC_THERM#_R
25
28
29
E51TXD_P80DATA 30
E51RXD_P80CLK 31
32
34
36

0_0402_5%
EC_THERM#_R
2

DAC_BRIG/DA0/GPIO3C
EN_DFAN1/DA1/GPIO3D
IREF/DA2/GPIO3E
DA3/GPIO3F

GND
GND
GND
GND
GND

8,18 EC_THERM#

63
64
65
66
75
76

11
24
35
94
113

R731
1
1
R732

21
23
26
27

BATT_TEMP/AD0/GPIO38
BATT_OVP/AD1/GPIO39
ADP_I/AD2/GPIO3A
Input
AD3/GPIO3B
AD4/GPIO42
SELIO2#/AD5/GPIO43

DA Output

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17

+3VALW

JP37

PWM Output

PCICLK
PCIRST#/GPIO05
ECRST#
SCI#/GPIO0E
CLKRUN#/GPIO1D

D

Place on MiniCard

1

ECRST#

17
EC_SCI#
17 PM_CLKRUN#

For EC Tools

2

1
0.1U_0402_16V4Z

100P_0402_50V8J
+3VALW

INVT_PWM/PWM1/GPIO0F
BEEP#/PWM2/GPIO10
FANPWM1/GPIO12
ACOFF/FANPWM2/GPIO13

AD

2

5

12
13
37
20
38

C676 1

P

2
C549

47K_0402_5%
ECRST#
1

100P_0402_50V8J

ACIN

2

R632
2

100P_0402_50V8J

2

G

17 CLK_PCI_LPC
14,18,25,30,31 NB_RST#

+3VALW

GA20/GPIO00
KBRST#/GPIO01
SERIRQ#
LFRAME#
LAD3
LAD2
LAD1
LAD0 LPC & MISC

2

C673 1

3

1
2
3
4
5
7
8
10

C672 1

BATT_TEMP

1

17
EC_GA20
17 EC_KBRST#
17
SERIRQ
17 LPC_FRAME#
17
LPC_AD3
17
LPC_AD2
17
LPC_AD1
17
LPC_AD0

BATT_OVP

1

2

KSO[0..17]

0.1U_0402_16V4Z

AVCC

KSO[0..17]

2

AGND

29,34

U27

69

1
C689
@ 22P_0402_50V8J

9
22
33
96
111
125

KSI[0..7]

KSI[0..7]

VCC
VCC
VCC
VCC
VCC
VCC

29,34

2

D

R633
@ 10_0402_5%

Please close to EC pin

1

C561
1000P_0402_50V7K
ECAGND

C568
1000P_0402_50V7K
1
1

1

CLK_PCI_LPC

C557

2
2
0.1U_0402_16V4Z

2

C476

2
2
0.1U_0402_16V4Z

L48
1
2 +EC_VCCA
FBMA-L11-160808-800LMT_0603

2

2

0.1U_0402_16V4Z
1
2

1

0.1U_0402_16V4Z
1 C567
1
C569

1

Rev
D

401650

4

3

2

Sheet
1

28

of

46

For 17"

For 15"

BTN_L

4

BTN_R

SW3
15@ SMT1-05-A_4P
3
1

2

4

TP_CLK

BTN_R

TP_DATA

BTN_L

2

3

2
5
6

2
5
6

4

Right

3

BTN_R

2
5
6

4

Left
SW2
15@ SMT1-05-A_4P
3
1

5
6

BTN_L

Right
SW5
17@ SMT1-05-A_4P
3
1

2

Left
SW4
17@ SMT1-05-A_4P
3
1

D15
C174 1

2

100P_0402_50V8J

2

100P_0402_50V8J

D14
PJDLC05_SOT23-3

PJDLC05_SOT23-3

1

C169 1

TP_CLK

1

TP_DATA

Change to SCA00000200

To TP/B Conn.
JTP1
+5VS
28
28

TP_CLK
TP_DATA

+5VS

6
5
4
3
2
1

TP_CLK
TP_DATA
BTN_L
BTN_R

C137
0.1U_0402_16V4Z

ACES_85201-0605
CONN@

KALA0 used

KSI[0..7]

INT_KBD Conn.

KSI[0..7]

KSO[0..17]

KB1 for 15"
KB2 for 17"

28,34

KSO[0..17] 28,34

JKB1

(Left)
KSO15

C243 1

2

100P_0402_50V8J

KSO7

C231 1

2

100P_0402_50V8J

KSO14

C242 1

2

100P_0402_50V8J

KSO6

C230 1

2

100P_0402_50V8J

KSO13

C241 1

2

100P_0402_50V8J

KSO5

C229 1

2

100P_0402_50V8J

KSO12

C240 1

2

100P_0402_50V8J

KSO4

C228 1

2

100P_0402_50V8J

KSI0

C239 1

2

100P_0402_50V8J

KSO3

C227 1

2

100P_0402_50V8J

KSO11

C238 1

2

100P_0402_50V8J

KSI4

C226 1

2

100P_0402_50V8J

KSO10

C237 1

2

100P_0402_50V8J

KSO2

C225 1

2

100P_0402_50V8J

KSI1

C236 1

2

100P_0402_50V8J

KSO1

C224 1

2

100P_0402_50V8J

KSI2

C235 1

2

100P_0402_50V8J

KSO0

C223 1

2

100P_0402_50V8J

KSO9

C234 1

2

100P_0402_50V8J

KSI5

C222 1

2

100P_0402_50V8J

KSI3

C233 1

2

100P_0402_50V8J

KSI6

C221 1

2

100P_0402_50V8J

KSO8

C232 1

2

100P_0402_50V8J

KSI7

C220 1

2

100P_0402_50V8J

KSO16

C245 1

2

100P_0402_50V8J

KSO17

C244 1

2

100P_0402_50V8J

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

(Right)

26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

KSO0 G2
KSO1 G1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

ACES_88747-2601
CONN@

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

(Right)

26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

KSO0 G2
KSO1 G1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

28
27

ACES_88747-2601
CONN@

Compal Electronics, Inc.

Compal Secret Data

Security Classification
Issued Date

JKB2

(Left)
28
27

2005/03/08

Deciphered Date

2009/06/11

Title

SCHEMATIC,MB A4861

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Tuesday, April 14, 2009

Rev
D

401650
Sheet

29

of

46

+3VALW

1
R618

C675 1

2
0_0603_5%

2 0.1U_0402_16V4Z

+SPI_VCC
U17
28 EC_SPICS#/FSEL#
+3VALW

2
R619 2
R621

1
SPI_WP#
1
3
1 4.7K_0402_5% SPI_HOLD# 7
4.7K_0402_5%
4

CE#
WP#
HOLD#
VSS

8
6
5
2

VDD
SCK
SI
SO

EC_SPICLK_R
R620 1
EC_SO_SPI_SI_R R622 1
EC_SI_SPI_SO_R R623 1

2 0_0402_5%
2 0_0402_5%
2 0_0402_5%

EC_SPICLK 28
EC_SO_SPI_SI 28
EC_SI_SPI_SO 28

MX25L8005M2C-15G_SOP8

SA00000XT00 : S IC FL 8M MX25L8005M2C-15G SOP 8P
ENE suggestion SPI Frequency over 66MHz
SST: 50MHz
MXIC: 70MHz
ST: 40MHz

R257
EC_SPICLK

1

C296
1
2

2

@ 22_0402_5%

@ 10P_0402_50V8J

ONLY MXIC used in this project (66MHz)
U44
EC_SPICS#/FSEL#
SPI_WP#
SPI_HOLD#

1
3
7
4

CS#
WP#
HOLD#
GND

+SPI_VCC
EC_SPICLK_R
EC_SO_SPI_SI
EC_SI_SPI_SO

8
6
5
2

VCC
SCLK
SI
SO

MX25L512AMC-12G_SO8
@

Reserved for BIOS simulator.
Footprint SO8

SPI ROM Footprint 150mil

New Card Power Switch
U14

3
5

SYSRST#

AUX_OUT

15

OC#

19

SYSON

20

SHDN#

PERST#

SUSP#

1

STBY#

NC

CP_PE#
10
(Internal Pull High to AUXIN)
CP_USB#
9
(Internal Pull High to AUXIN)
RCLKEN1
18

CPPE#
CPUSB#

GND
Thermal_Pad

8

+3VS_CARD

40mil
+3VALW_CARD

1

18
18

USB20_N7
USB20_P7

CP_USB#

17,31 SB_PCIE_WAKE#
+3VALW_CARD

16
7

PERST1#

+3VS_CARD

+3VS

CLKREQ1#
CP_PE#

21
+3VS

G577NSR91U_TQFN20_4x4

1

R221
10K_0402_5%
CLKREQ1#
NC@

1
1
C310
C300
NC@
NC@
10U_0805_10V4Z
10U_0805_10V4Z
2
2

1

18 SB_CK_SCLK1
18 SB_CK_SDAT1
+1.5VS_CARD

RCLKEN

+3VALW

1
C282
NC@
NC@
10U_0805_10V4Z
2
2
0.1U_0402_16V4Z
C281

PERST1#

NC@

+3VS

JEXP1

Imax = 0.75A

1
1
1
C299
C304
C303
NC@
NC@
NC@
NC@
10U_0805_10V4Z
10U_0805_10V4Z
2
2
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C301

5

AUX_IN

60mils

+1.5VS

1
C283
NC@
10U_0805_10V4Z
2

RCLKEN1 2
G
NC@

2

B

1

A

D

Q31 NC7SZ32P5X_NL_SC70-5

18 CP_PE#
16 CLK_PCIE_CARD#
16 CLK_PCIE_CARD

C309

0.1U_0402_16V4Z
2 NC@

14 PCIE_MRX_C_PTX_N0
14 PCIE_MRX_C_PTX_P0

U16

G Vcc

6

3.3Vout
3.3Vout

Imax = 1.35A

1

SUSP#

17

NB_RST#

3.3Vin
3.3Vin

Imax = 0.275A

+1.5VS_CARD

+1.5VS_CARD

2

SYSON

28,37,42

+3VALW

11
13

1

28,37,43

2
4

1.5Vout
1.5Vout

Y

4

EXP_CLKREQ# 16

14 PCIE_MTX_C_PRX_N0
14 PCIE_MTX_C_PRX_P0

NC@

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28

2N7002_SOT23-3

3

4,18,25,28,31 NB_RST#

+3VS

1.5Vin
1.5Vin

+3VS_CARD

3

12
14

+1.5VS

New Card Socket (Left/TOP)
+3VALW_CARD

40mil

GND
USB_DUSB_D+
CPUSB#
RSV
RSV
SMB_CLK
SMB_DATA
+1.5V
+1.5V
WAKE#
+3.3VAUX
PERST#
+3.3V
+3.3V
CLKREQ#
CPPE#
REFCLKREFCLK+
GND
PERn0
PERp0
GND
PETn0
PETp0
GND
GND
GND

GND
GND

29
30

FOX_1CH4110C_LT
CONN@

S

Don't Connect to GND
2008/02/22

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2005/03/08

Deciphered Date

2009/06/11

Title

SCHEMATIC,MB A4861

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

Rev
D

401650

Tuesday, April 14, 2009

Sheet

30

of

46

A

B

C

D

E

1

1

+3VS_WLAN

1

2

+1.5VS

1

C442
4.7U_0805_10V4Z

2

1

C441
0.1U_0402_16V4Z

2

+3VALW

1

C439
4.7U_0805_10V4Z

2

1

C438
0.1U_0402_16V4Z

1

C440
0.1U_0402_16V4Z

2

2

C437
0.1U_0402_16V4Z

For Wireless LAN

16 MINI2_CLKREQ#
16 CLK_PCIE_MINI2#
16 CLK_PCIE_MINI2

2

13 PCIE_MRX_PTX_N2
13 PCIE_MRX_PTX_P2
13 PCIE_MTX_C_PRX_N2
13 PCIE_MTX_C_PRX_P2
+3VS_WLAN

E51TXD_P80DATA
E51RXD_P80CLK

R654 1

2 0_0402_5% E51TXD_P80DATA_R

17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

1
3
5
7
9
11
13
15

2
4
6
8
10
12
14
16

17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

R487 1

2 0_1206_5%

+3VS

+3VS_WLAN
+1.5VS

2

Mini Card Power Rating
R655 0_0402_5%
WL_OFF#_R 1
2
NB_RST#
R246 1
2 0_0603_5%
R243 1
2 0_0603_5%
@

Power
WL_OFF# 28
NB_RST# 14,18,25,28,30
+3VS
+3VALW

SB_CK_SCLK 10,11,16,18
SB_CK_SDAT 10,11,16,18

Primary Power (mA)

Auxiliary Power (mA)
Normal

Peak

Normal

+3VS

1000

750

+3VALW

330

250

250 (wake enable)

+1.5VS

500

375

5 (Not wake enable)

USB20_N4 18
USB20_P4 18
(MINI1_LED#)

1

2

WL_ON_LED# 34

R752 0_0402_5%
R550
@100K_0402_5%

G1
G2
G3
G3

28 E51TXD_P80DATA
28 E51RXD_P80CLK

+3VS_WLAN

JMINI2
1
3
5
7
9
11
13
15

53
54
55
56

For MINICARD Port80 Debug

2

17,30 SB_PCIE_WAKE#

0_0402_5%
2

1

R653
1
@

FOX_AS0B226-S99N-7F
CONN@

+3VALW

H:9.9mm
3

3

4

4

2005/06/20

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2009/06/11

Deciphered Date

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

A

B

C

D

SCHEMATIC,MB A4861
Document Number

Rev
D

401650
Sheet

Friday, April 10, 2009
E

31

of

46

A

B

C

D

E

1

1

USB CONN. 1 & 2
+USB_VCCA

+USB_VCCA

W=80mils

W=80mils

1
+

1
1

C478

+

C474

1

C1

C2

@
2

150U_D_6.3VM

2

470P_0402_50V7K

2

150U_D_6.3VM

2

470P_0402_50V7K

JUSB1
18
18

USB20_N0
USB20_P0

USB20_N0
USB20_P0

R598 1
R600 1

@
@

2 0_0402_5%
2 0_0402_5%

USB20_N0_R
USB20_P0_R

L67
4
1

4

3

3

1

2

2

WCM2012F2S-900T04_0805

JUSB2

1
2
3
4

VCC
DD+
GND

5
6
7
8

GND1
GND2
GND3
GND4

18
18

USB20_N2
USB20_P2

USB20_N2
USB20_P2

R599 1
R601 1

@
@

2 0_0402_5%
2 0_0402_5%

USB20_N2_R
USB20_P2_R

L68
4

SUYIN_020173MR004G565ZR
CONN@
KALA0 used

1

4

3

3

1

2

2

1
2
3
4

VCC
DD+
GND

5
6
7
8

GND1
GND2
GND3
GND4

SUYIN_020173MR004G565ZR
CONN@
KALA0 used

WCM2012F2S-900T04_0805

2

2

D31
USB20_N0_R

1

+3VALW

+5VALW
U4

C111

1

GND
IN
IN
EN#

8
7
6
5

USB20_P2_R
R171
1

2
R677

10K_0402_5%
2
1

2
2

37,42

CH3

5

Vp

CH2

3

Vn

2

CH1

1

USB20_N2_R

100K_0402_5%
OUT
OUT
OUT
FLG

TPS2061DRG4_SO8
4.7U_0805_10V4Z

+USB_VCCA

2

1
2
3
4

Check net connect
when DVT

R42

+USB_VCCA

6

1
0_0402_5%

USB_OC#2 18

4

CH4

USB20_P0_R

CM1293-04SO_SOT23-6

USB_OC#0 18
C133
0.1U_0402_16V4Z

SYSON#

3

3

4

4

2005/06/20

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2009/06/11

Deciphered Date

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

A

B

C

D

SCHEMATIC,MB A4861
Document Number

Rev
D

401650
Sheet

Friday, April 10, 2009
E

32

of

46

A

B

+3VS

+3VALW

C203
1U_0603_10V4Z

E

+3VALW

+3VALW

I

7

2

2

C204

U10B
SN74LVC14APWR_TSSOP14

O 10
+3V POWER

13

14
I
G

11

P

P

4

U10F
SN74LVC14APWR_TSSOP14
R104
10_0402_5%
1
2
O 12
@
+3V POWER

@
1U_0805_16V7K

I

14
O

6

9

I

7

O

2

8

@

1

R113
180K_0402_5%

7

G

5

NB_PWROK 14,28

U10D
SN74LVC14APWR_TSSOP14

G

2

R109
10_0402_5%

R108
10_0402_5%
1
2
@

P

P
@

1

R105
100K_0402_5%

1

+3VALW

14

+3VALW

1

SB_PWROK 8,17,28

7

O

G

I

U10E
SN74LVC14APWR_TSSOP14

7

3

G

O 2
+3V POWER

7

I

14

14

R112
100K_0402_1%

P

P
1

1
R106
10K_0402_5%

+3VALW

2

14

U10A
SN74LVC14APWR_TSSOP14

G

28,37 VLDT_EN

R100 47K_0402_1%
VLDT_EN
1
2

D

R111
10K_0402_5%
@

D5
BAS16_SOT23-3
@
1

+3VALW

1

Power ON Circuit

C

U10C
SN74LVC14APWR_TSSOP14

2

2

note:T1 minimum 15ms,T2 minimum 33ms/maximum 500ms,
SUSP# goes to low after SB_PWRGD goes to low for power
down.
T1

TOP Side
2

@

+3VALW

2

Power Button

@

2

NB_PWRGD

R281

1

R766 10K_0603_5%

SB_PWRGD

100K_0402_5%

T2

1

Bottom Side

D10

SUSP#
2

ON/OFFBTN#

34 ON/OFFBTN#

VLDT_EN

1

R765 10K_0603_5%

ON/OFF

1

28

51ON#

3

51ON#

+1.8VS

38

DAN202UT106_SC70-3
3

1

3

2

2

1

4

EC_ON

EC_ON

6
5

28

D

2
G
R290
10K_0402_5%

C358
1000P_0402_50V7K

D11
RLZ20A_LL34

2

1

ON/OFFBTN#

Q17
2N7002_SOT23

3

SW10
SMT1-05-A_4P
1
3

S

MP would remove

4

4

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2005/03/08

Issued Date

Deciphered Date

2009/06/11

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

A

B

C

D

SCHEMATIC,MB A4861
Document Number

Rev
D

401650
Tuesday, April 14, 2009

Sheet
E

33

of

46

PWR_LED#

3

MDC Conn.
JMDC1
Q68B
2N7002DW-T/R7_SOT363-6

5

PWR_LED

18

AC_SDOUT

R291

18
18
18

AC_SYNC
ACZ_SDIN1
AC_RST#

R357 1
AC_RST#

AC_SYNC
2 33_0402_5%

GND1
RES0
IAC_SDATA_OUT
RES1
GND2
3.3V
IAC_SYNC
GND3
IAC_SDATA_IN
GND4
IAC_RESET#
IAC_BITCLK

R254
1

2
4
6
8
10
12

0_0402_5%
2

+3VALW
+3VALW

20mil
AC_BITCLK

1

AC_BITCLK 18

1

2

100K_0402_5%

1
3
5
7
9
11

AC_SDOUT

4

1

28

2

ACES_88018-124G
CONN@

1

6

Connector for MDC Rev1.5

2

Q68A
2N7002DW-T/R7_SOT363-6

2

1U_0603_10V4Z

0_0402_5%
C432
22P_0402_50V8J

For EMI

1

1

28 PWR_SUSP_LED

C3

R256

GND
GND
GND
GND
GND
GND
13
14
15
16
17
18

PWR_SUSP_LED#

2

R292

2

100K_0402_5%

To PWR LED/B

LED1

R250 1.2K_0402_5%
1
2
4

YG

1

PWR_LED#

3

PWR_SUSP_LED#

+5VS +3VALW +5VALW

A

HT-297UD/CB BLUE/AMB

HARVATEK
LED2
+5VALW

R253 1K_0402_5%
1
2
2

+5VALW

R252 1.2K_0402_5%
1
2
4

+3VS

JP14

YG

1

BATT_GRN_LED#

A

3

BATT_AMB_LED#

HT-297UD/CB BLUE/AMB

HARVATEK

BLUE/AMB LED

BATT_GRN_LED# 28
BATT_AMB_LED# 28

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

+5VALW

LID_SW#
TP_LOCK_LED#
KSO0
KSI2
PWR_SUSP_LED#
PWR_LED#
ON/OFFBTN#
KSI1
WL_ON_LED#
MEDIA_LED#
NUM_LED#
CAPS_LED#

LID_SW# 28
TP_LOCK_LED# 28
KSO0
28,29
KSI2
28,29

+5VS

+3VS

+3VALW

C435

C436

C444

C445

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

ON/OFFBTN# 33
KSI1
28,29
WL_ON_LED# 31
NUM_LED# 28
CAPS_LED# 28

ACES_85201-20051
CONN@
+3VS

KSO0
2

+5VALW

R251 1K_0402_5%
1
2
2

KSI1

WL_BTN#

KSI2

TP_LOCK_BTN#
MEDIA_LED#

KSI3
KSI4

1

5IN1_LED# 27

3

4

SATA_LED# 18

Q67B
2N7002DW-T/R7_SOT363-6

KSI5

Q67A
2N7002DW-T/R7_SOT363-6

6

5

+5VS

+3VS

KSI6

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2005/06/20

Deciphered Date

2009/06/11

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

SCHEMATIC,MB A4861
Document Number

Rev
D

401650
Friday, April 10, 2009

Sheet

34

of

46

A

B

C

D

E

F

G

H

1

+VDDA

1
R784

R783
10K_0402_5%

1

2

+5VAMP

C898

1

2
1U_0402_6.3V4Z

L80 1
2
FBMA-L11-201209-221LMA30T_0805

+5VS

R785
10K_0402_5%

1

1

L81 1
2
FBMA-L11-201209-221LMA30T_0805

1

C899

C902
1
1U_0402_6.3V4Z

MONO_IN

C900
0.1U_0402_16V4Z

40mil

1

IN

2

GND

3

SHDN

OUT

5

BYP

4

+VDDA

@ G9191-475T1U_SOT23-5

HD Audio Codec

4.75V
1

1
2
C901
0.01U_0402_25V7K

(output = 300 mA)

1

2

2

U81

60mil

0.1U_0402_16V4Z

2
2

2
0_0805_5%

C903 1
1U_0402_6.3V4Z

2

1

R787

C
2

E

2

1

R788

2

560_0402_5%

1

C904 1
1U_0402_6.3V4Z

1

SB_SPKR

3

560_0402_5%

18

1
2
Q72
R786
2.4K_0402_1%
2SC2411KT146_SOT23-3

2
B

D37
RB751V_SOD323
L82
MBK1608121YZF_0603
1
2

2

2

R789
10K_0402_5%

10mil

1
+AVDD_HDA

1

10U_0805_10V4Z

C912

2

1

2

MIC2_C_L
16
4.7U_0805_6.3V6K
MIC2_C_R
17
4.7U_0805_6.3V6K
23

9

MIC2_VREFO

LOUT1_L

35

AMP_LEFT

LINE2_R

LOUT_R

36

AMP_RIGHT

MIC2_L

LOUT2_L

39

MIC2_R

LOUT2_R

41

LINE1_L

SPDIFO2

45

DMIC_CLK1/2

46

LINE2_L

24

LINE1_R

18

LINE1_VREFO

NC

43

20

LINE2_VREFO

DMIC_CLK3/4

44

AMP_LEFT 36
AMP_RIGHT 36

R790
2.2K_0402_5%

15mil

JMIC2

INT_MIC_R

3

C911

1

1

U82

DVDD

2
0.1U_0402_16V4Z

DVDD_IO

2

2

INT_MIC

2

2

2

15
R791 1K_0402_1%
2
1

2

+3VS

C907

0.1U_0402_16V4Z

14

INT_MIC_R

1

C906

C910
38

C908
10U_0805_10V4Z

1

C905

2

25

2

0.1U_0402_16V4Z
1
1
C909

AVDD2

L83 1
2
FBM-L11-160808-800LMT_0603

40mil

AVDD1

+VDDA

+3VS_DVDD

0.1U_0402_16V4Z

R794 2
R795 2

36 MIC_PLUG#
36 HP_PLUG#

18

AZ_SYNC

18

AZ_SDOUT

10
5

SENSE_A
SENSE_B

1 20K_0402_1%
1 5.11K_0402_1%
28

11

AZ_RST#

1
R796

EAPD

update this table

2
0_0402_5%

SENSE A

Impedance

PCBEEP_IN

PORT-A (PIN 39, 41)

20K

PORT-B (PIN 21, 22)

10K

PORT-C (PIN 23, 24)

5.1K

PORT-D (PIN 35, 36)

39.2K

PORT-E (PIN 14, 15)

20K

PORT-F (PIN 16, 17)

10K

PORT-G (PIN 43, 44)

5.1K

PORT-H (PIN 45, 46)

AZ_BITCLK 18

37

CBP

29

CPVEE

31

MIC1_VREFO

28

HPOUT_R

32

SYNC
SDATA_OUT

47

EAPD
SPDIFO1

CBN

30

VREF

27

JDREF

40

HPOUT_L

33

AVSS1
AVSS2

26
42

DVSS1
DVSS2

1
R793

2
33_0402_5%

3

2.2U_0402_6.3V6M
C917 1

2

10mil

1
MIC1_VREFO_L

HP_RIGHT

CODEC_VREF

2

C918
2.2U_0402_6.3V6M

1

2

1

2

Change to ALC272X
DGND

AGND

HP_LEFT 36

1
R798

2
0_0805_5%

1
R799

2
0_0805_5%

1
R800

2
0_0805_5%

1
R801

2
0_0805_5%

1
R802

2
0_0805_5%

1
R803

2
0_0805_5%

GND

GNDA

GND

2007/09/20

2009/06/11

Deciphered Date

Title

SCHEMATIC,MB A4861
Document Number

C

D

E

F

Rev
D

401650

Date:

B

4

GNDA

Compal Electronics, Inc.

Compal Secret Data

Security Classification
Issued Date

HP_RIGHT 36

HP_LEFT

10mil

HP_LEFT

ALC272-VA2-GR_LQFP48_7X7

HP_RIGHT

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

G1
G2

ACZ_SDIN0 18

4

SENSE B

3
4

ACES_88266-02001
CONN@

1

8

RESET#

Codec Signals

39.2K

SDATA_IN
MONO_OUT

GPIO0/DMIC_DATA1/2
GPIO1/DMIC_DATA3/4
SENSE A
SENSE B

4
7

Sense Pin

MIC1_R

2
3
13
34

48

6

1
2

MIC1_L

C920

18

BITCLK

C913

@
220P_0402_50V7K
2
SM05T1G_SOT23-3

For EMI

0.1U_0402_16V4Z

3

2

MIC2_VREFO

10U_0805_10V4Z

C916

1

MIC1_C_L
21
4.7U_0805_6.3V6K
MIC1_C_R
22
4.7U_0805_6.3V6K
MONO_IN
12

C919

MIC1_R

2

1

MIC1_R

1

R797

36

C915

20K_0402_1%

MIC1_L

D38

1

2 C914
22P_0402_50V8J

2
1
0_0402_5%

2

19

MIC2_VREFO
MIC1_L

36

1
R792

1
2
2

BEEP#

1

28

Friday, April 10, 2009
G

Sheet

35
H

of

46

B

C

D

E

+5VAMP

Int. Speaker Conn.

0.1U_0402_16V4Z

1
C921
10U_0805_10V4Z

1
C922
SPKL+
SPKL-

2

R804 1
R805 1

2 0_0603_5%
2 0_0603_5%
D39

1

2
1
3900P_0402_50V7K R808

C925 1

AMP_LEFT

C971

1

2
1
3900P_0402_50V7K R813

2 0.47U_0603_10V7K

AMP_C_LEFT
2
0_0603_5%

9

5

GAIN1

ROUT+

18

SPKR+

ROUT-

14

SPKR-

LOUT+

4

SPKL+

8

SPKL-

RIN-

1
2

@ R811
100K_0402_5%

R810 1
R807 1

2 0_0603_5%
2 0_0603_5%

20mil

SPK_R+
SPK_R-

D40
@

LOUT-

Left

JSPK2
SPKR+
SPKR-

R812
100K_0402_5%

LIN+

LIN-

G1
G2

For EMI, Change to Bead
SM010012010 (footprint no change)
1

GAIN0

3

1

2

GAIN1

3
4

1
2

1
2

3
4

G1
G2

Right

ACES_88266-02001
CONN@

PJDLC05_SOT23-3

1

35

AMP_C_RIGHT 17
2
0_0603_5%

GAIN0

3

C924

RIN+

1
2

ACES_88266-02001
CONN@

PJDLC05_SOT23-3

2

AMP_RIGHT

7

2

35

2 0.47U_0603_10V7K

@

@ R806
100K_0402_5%

2

VDD
PVDD1
PVDD2

R809
100K_0402_5%

1
2

1

16
15
6

1

+5VAMP

C923 1

SPK_L+
SPK_L3

20mil
10 dB
U83

1

JSPK1

2

2

1

2

A

2

2

EC_MUTE#

EC_MUTE#

19

SHUTDOWN

12

BYPASS

10

Keep 10 mil width
2

1

C927
0.47U_0603_10V7K

LINE Out/Headphone Out

21
20
13
11
1

GND5
GND1
GND2
GND3
GND4

28

NC

TPA6017A2_TSSOP20

JHP1
8
7
2

C928

HP_RIGHT

HP_RIGHT

35

HP_LEFT

HP_LEFT

1
R814
1
R815

HPOUT_R_1 1
2
56.2_0402_1%
L84
HPOUT_L_1 1
2
56.2_0402_1%
L85

C929

330P_0402_50V7K 330P_0402_50V7K
1
1

20mil
35

2

35

HP_PLUG#

HP_PLUG#

4

HPOUT_R_2

2
FBM-11-160808-700T_0603
2
FBM-11-160808-700T_0603

5

3
6
2
1

HPOUT_L_2

SINGA_2SJ-E351-S03
CONN@

MIC1_VREFO_L

MIC1_VREFO_L

2

3

2

3

MIC JACK

35

MIC1_R

35

MIC1_L

1
R818
1
R819

2
1K_0603_1%
2
1K_0603_1%

1
L86
1
L87

35

R817
4.7K_0402_5%

2 FBM-11-160808-700T_0603

1

2

MIC_PLUG# 5

MIC_PLUG#

MIC2_R_1

3
6
2
1

MIC2_L_1

2 FBM-11-160808-700T_0603

C930
220P_0402_50V7K

JMIC1
8
7

4
2

2

R816
4.7K_0402_5%

RB751V_SOD323
D42
1 1

1 1

RB751V_SOD323
D41

1
C931
220P_0402_50V7K

SINGA_2SJ-E351-S01
CONN@

2

(HDA Jack)

4

4

2007/09/20

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2009/06/11

Deciphered Date

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

A

B

C

D

SCHEMATIC,MB A4861
Document Number

Rev
D

401650
Sheet

Friday, April 10, 2009
E

36

of

46

A

B

C

D

E

+5VALW

+3VALW TO +3VS

2

+5VALW TO +5VS

+3VS

R167
10K_0402_5%
+5VALW

S
S
S
G

2

1
2
3
4

1
R562

2

1U_0603_10V4Z
R508
100K_0402_5%
1
2

5VS_GATE
2
20K_0402_1%

+VSB

S

SUSP
2
G
2N7002_SOT23-3

2

2

1

C166
10U_0805_10V4Z

2

1

C165
1U_0603_10V4Z

28,30,42

0_0402_5%
5VS_GATE
2

D

S

Q12

2
G

SUSP#

1

2N7002_SOT23

R586
10K_0402_5%
R728
1

C658
0.1U_0603_25V7K

1

R500
@

3

1

100K_0402_5%

D
C570
0.1U_0603_25V7K

1

2

1

2

10U_0805_10V4Z

1

2

C560

SUSP

1
2
3
4

C143
4.7U_0805_10V4Z

2
Q29

S
S
S
G

AO4468_SO8

1

AO4468_SO8

1

D
D
D
D

1

D
D
D
D

8
7
6
5

3

8
7
6
5

1

10U_0805_10V4Z

U7
C562

1

U41

1

C559

2

1

+3VALW

+5VS

S

Q58

2

D

2
G

2006/2/22 Add C658 0.1uF

R31
10K_0402_5%

2N7002_SOT23

+1.8VS
U46

10U_0805_10V4Z

2

1U_0603_10V4Z

AO4430_SOIC8

C443
4.7U_0805_10V4Z

1

+VSB
+5VALW

D

Q63

S

VLDT_EN#
2
G
2N7002_SOT23-3

C759
0.1U_0603_25V7K 2

3

D

S

2
G

Q64
2N7002_SOT23-3

R725
10K_0402_5%

1

2

1

2
4.7U_0805_10V4Z

5VS_GATE

1
2
R699
33K_0402_5%

1

C758

2 R563
60.4K_0402_1%

1

R698
470_0805_5%

10U_0805_10V4Z

2

2

2

1
2
3
4

S
S
S
G

VLDT_EN#
C632
0.1U_0603_25V7K

R700
33K_0402_5%

2

12/30 Change R563 to 60.4K

VLDT_EN

VLDT_EN

1

2N7002_SOT23

R726
100K_0402_5%

2

3

2

2

2

3

S

1
D

2SUSP
G
Q15
2N7002_SOT23

S

3

D

2 SUSP
G
Q14
2N7002_SOT23

R181
470_0402_5%

1

1
1

1
S

+5VS

R270
470_0402_5%

D

2 SYSON#
G
Q6
2N7002_SOT23

3

S

R224
470_0402_5%

1

1
D

2 SUSP
G
Q36
2N7002_SOT23

3

S

R26
470_0402_5%

1

1

R588
470_0402_5%

D

2 SUSP
G
Q35
2N7002_SOT23

Q65
2N7002_SOT23

+1.8VS

+3VS

2

2

S

3

3

D

2 SYSON#
G
Q34
2N7002_SOT23

+1.8V

1

1
1

1
1

D

S

R587
470_0402_5%

3

2

+1.5VS

R604
470_0402_5%

S

2
G

S

Q66

Near PU12

+2.5VS

2

Near PU8
+0.9V

3

ACIN
3

D

D

2
G

1

28,33

1

1

D
D
D
D

C757

1

8
7
6
5

C446

2

1

1

C447

1U_0603_10V4Z

1

1

AO4430_SOIC8

2

1

C756

3

1
2
3
4

2

2

1
S
S
S
G

1

D
D
D
D

S

Q5

R589
100K_0402_5%

2

U37

8
7
6
5

D

2
G

+1.8V
+1.2VALW

1
SYSON

SYSON

1

2

28,30,43

+1.2V_HT

+1.8V TO +1.8VS

SYSON#

SYSON#

3

32,42

+1.2VALW TO +1.2V_HT

1

2N7002_SOT23-3
@

3

ACIN

ACIN

1
28,38,40

3

+5VALW

2 SUSP
G
Q10
2N7002_SOT23

4

4

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2005/03/08

Issued Date

Deciphered Date

2009/06/11

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

A

B

C

D

SCHEMATIC,MB A4861
Document Number

Rev
D

401650
Tuesday, April 14, 2009

Sheet
E

37

of

46

A

B

C

D

DC231000500
VIN
1

1

VS

@ PR3
10K_0402_5%

PR4
84.5K_0402_1%

2
1

2

2

PR9
10K_0402_5%
1
2

-

PC5
1000P_0402_50V7K

RTCVREF

+

PBJ1

2

+RTCBATT

1

Vin Dectector
Min.
Typ
H-->L 16.976V 17.525V
L-->H 17.430V 17.901V

+RTCBATT

ML1220T13RE
45@

2

1

1

2

2

3

-

PR7
20K_0402_1%

8

PR6
22K_0402_5%
1
2

PC6
0.1U_0603_25V7K
2
1

1

+

0

PU1A
LM358DT_SO8
PD3
GLZ4.3B_LL34-2

2

PR8
10K_0402_5%

P

PR160
10K_0402_5%
1
2 1

G

28,37,40 ACIN

2

@ PD1
RLZ24B_LL34

PR5
0_0402_5%
1
2

2

1 2

560P_0402_50V7K

PC4
2
1

12P_0402_50V8J

PC3
2
1

12P_0402_50V8J

2

PC2
2
1

560P_0402_50V7K

3

PC1
1

G
G
1

VIN
@ PR2
10_1206_5%

2

4

1

PR1
1M_0402_5%
1
2

VIN

PL1
SMB3025500YA_2P
1
2

1

ADPIN

1

PJP1
SINGA_2DC-G756I200

Max.
17.728V
18.384V

2

2

VIN
PD4
LL4148_LL34-2

2

1

+3VALW

2

+1.5VSP

2

1

1

+1.5VS

JUMP_43X118

PJ3

2

+5VALWP

1

2

2

PJ4

1

1

+5VALW

2

+0.9VP

JUMP_43X118

VS

2

1

1

+0.9V

JUMP_43X79

33

PC8
0.1U_0603_25V7K

3

PJ5

2

+VSBP

2

2

2

PR14
22K_0402_1%
1
2

51ON#

PC7
0.22U_1206_25V7K

2

PR13
100K_0402_1%

3

1

1

1

3

1

PR11
68_1206_5%

2
N1

PJ2

1

JUMP_43X118

PR10
68_1206_5%
PQ1
TP0610K-T1-E3_SOT23-3
PR12
200_0603_5%
CHGRTCP 1
2

2

1

1

BATT+

PJ1

+3VALWP

PD5
LL4148_LL34-2
2
1

2

PJ6

1

1

+VSB

+1.8VP

2

PJ7

1
OUT

2

IN
GND

PC9
10U_0805_10V4Z

2

1

+1.2VALW

+1.2VALWP

2

JUMP_43X118

2

+1.2VALW

1

1

JUMP_43X118

PJ10

2

N2

2

+2.5VSP
1

3

PJ8

1

PR15
200_0603_5%

PU2
G920AT24U_SOT89-3

3.3V

2

1

2

1

1

+2.5VS

JUMP_43X118
PC10
1U_0805_25V4Z

2

PR17
560_0603_5%
1
2

1

+CHGRTC

PR16
560_0603_5%
1
2

2

+1.8V

1

1

JUMP_43X118

JUMP_43X39

+1.2VALWP

RTCVREF

2

4

4

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2008/06/11

Deciphered Date

2009/06/11

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

A

B

C

SCHEMATIC,MB A4861
Document Number

Rev
D

401650
Sheet

Tuesday, April 14, 2009
D

38

of

46

A

B

C

D

ISL6237_B+

ISL6237_B+

3
2
1

25

PHASE2

PHASE1

16

LX5

23

LGATE2

LGATE1

18

DL5

PGND

22

OUT1

10

FB1

11

BYP

9

SKIP

29

1
2
3

2

3
2
1

LX3

4

DL3

FB3
@ PR25
10K_0402_1%

1

VL

30

OUT2

32

REFIN2

2VREF_ISL6237
1
PC31

2

1

20

PR29
100K_0402_1%
1
2

LDOREFIN

@ PR27
2

POK1

13

14

EN1

ILIM1

12

ILM1

PR31
330K_0402_1%
2
1

27

EN2

ILIM2

31

ILIM2

2

GND
21

TON
2
1

NC
5

SPOK

PU3
ISL6237IRZ-T_QFN32_5X5

PR36
0_0402_5%

PC20
2200P_0402_50V7K
2
1

41,43

1

3

PR32
330K_0402_1%

+5VALWP Ipeak=8.444A ; Imax=5.91A
Choke DCRmax=60m ohm, DCRtyp=54m ohm
Rds(on)=18m ohm(max) ; Rds(on)=15m ohm(typical)
Vlimit=(5E-06 * 330K)/10=165mV
Ilimit=165mV/18m ~ 165mV/15m
=9.167A ~ 11A
Iocp=Ilimit+Delta I/2
=10.147A ~ 11.980A
Delta I=1.96A (Freq=400KHz)

2VREF_ISL6237 2

1
2

3

2

1

1

PC34
0.047U_0603_16V7K

MAINPWON

@ PR38
47K_0402_5%
1
2

1

PR37
0_0402_5%
2

2VREF_ISL6237 1

2

2

@ PR33
0_0402_5%

PR35
806K_0603_1%

8,41

EN_LDO

PC33
1U_0603_10V6K
1
2

2
PR34
0_0402_5%
2

VL

VL

0_0402_5%
2

28

2
1

PC32
0.22U_0603_25V7K

0_0402_5%
1

POK2

1

PD7
1SS355_SOD323-2

2

REF

NC

4

PR30
200K_0402_5%
1
2

1

3

+ PC30
330U_6.3V_M

2

FB5

PR28
1
PD6
GLZ5.1B_LL34-2
1
2

1

0.22U_0603_10V7K

8

+3.3VALWP Ipeak=8.444A ; Imax=5.91A
Choke DCRmax=60m ohm, DCRtyp=54m ohm
Rds(on)=18m ohm(max) ; Rds(on)=15m ohm(typical)
Vlimit=(5E-06 * 330K)/10=165mV
Ilimit=165mV/18m ~ 165mV/15m
=9.167A ~ 11A
VS
Iocp=Ilimit+Delta I/2
=10.134A ~ 11.967A
Delta I=1.934A (Freq=300KHz)

PR24
63.4K_0402_1%
2

PC27
0.1U_0603_25V7K

PC26
0.1U_0603_25V7K

PQ5
AO4712_SO8

1

DH5
PR21 2.2_0603_5%
BST5A 2
1

PR26
10K_0402_1%
1
2

17

PR23
4.7_1206_5%
2
1

15

BOOT1

PL4
10UH_MSCDRI-104A-100M-E_4.6A_20%
2
1

PC29
680P_0402_50V7K
2
1

UGATE1

5
6
7
8

7

3

PC24
1U_0603_10V6K
1
2

19

2

BOOT2

LDO

UGATE2

24

PVCC

PC19
4.7U_1206_25V6K
2
1

PC23
4.7U_0805_6.3V6K
2
1

PC22
1U_0603_10V6K
1
2

26

VCC

VIN

TP

1

+5VALWP

1

2

DH3
PR20
2
1 BST3A
2.2_0603_5%

33

PQ3
AO4466_SO8
4

2

2

PC28
680P_0402_50V7K

2
6

1

1

4

1

2

VL

1
2
3
PQ4
AO4712_SO8

2

PR22
0_0402_5%

+

PC25
330U_6.3V_M


8
7
6
5

1
PR19
4.7_1206_5%

2
1

PC21
0.1U_0603_25V7K

1

PQ2
AO4466_SO8
4

PL5
10UH_MSCDRI-104A-100M-E_4.6A_20%
1
2

+3VALWP

PC18
4.7U_1206_25V6K
2
1

8
7
6
5

5
6
7
8

PC17
2200P_0402_50V7K
2
1

2

@ PC203
680P_0402_50V7K

PC16
4.7U_1206_25V6K
2
1

1

1

B+

PR18
0_0805_5%
1
2
PC15
4.7U_1206_25V6K
2
1

PJ17
JUMP_43X118
2 2
1 1

@ PC35
0.047U_0402_16V7K

PQ6
TP0610K-T1-E3_SOT23-3

2

4

1

4

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2008/06/11

Deciphered Date

2009/06/11

Title

SCHEMATIC,MB A4861

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

A

B

C

401650Sheet
Tuesday, April 14, 2009
D

Rev
D
39

of

46

A

B

C

D

E

B+

26

DH_CHG

PH

25

LX_CHG
PD8
2

ACOP

8

AGND

LODRV
PGND

22

LEARN

21

CELLS

20

CELLS

19

SE_CHG+

18

SE_CHG-

BAT

17

TP

29

VADJ

BATDRV

16

SRSET

15

PR56
10_0603_5%
1
2

IADAPT
PR58
340K_0402_1%

2

1

3
2
1
2

1

ACIN
@ PQ14
2N7002W-T/R7_SOT323-3
S

VADJ

2

24751_VREF

PR70
210K_0402_0.1%
1
D
@ PQ18
2N7002W-T/R7_SOT323-3

2
G

28

S

1
@PC63
@PC63
1000P_0402_50V7K

4.0V

PR72
100K_0402_5%
1

2

@ PR69
100K_0402_1%

3

Charger ADJ

28,37,38

D

2
G
3

@ PR66
0_0402_5%
1

2

S
PQ17
SSM3K7002F_SC59-3

1

2

3

1

3

ACGOOD#

CHGEN#
D

S

PQ19
2N7002W-T/R7_SOT323-3

2
G

FSTCHG

1
2

3

1

2
REGN

2
G

Calibrate#

4

L=0

S

4.2V

1.8755V

4.3V

2.8132V

4.35V

H=3.3V

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2008/06/11

Issued Date

2009/06/11

Deciphered Date

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

A

PR244
100K_0402_5%
1
2

1
@ PQ16
SI2301BDS-T1-E3_SOT23-3

PQ15
SSM3K7002F_SC59-3

1
1

D

65W/90W#

CP setting

2

@ PR64
887K_0402_1%

2

S

2
G

3

@ PR59
100K_0402_1%

2

D

1
2

PR75
100K_0402_1%

4

2
G
PQ20
2N7002W-T/R7_SOT323-3

24751_VREF
2

PR71
499K_0402_0.1%
2
1

1

D

@ PR61
0_0402_5%
1

28

PQ13_GATE

3

PR63
200K_0402_1%
2
1
1

PC61
0.1U_0402_16V7K
ACOFF
1
2

ADP_I

28 CALIBRATE#

28

2

2
1

ACSET

PR74
100K_0402_1%

24751_VREF
RTCVREF

24751_VREF

PR62
100K_0402_1%
2
1

2
2
PR73
64.9K_0402_1%
24751_VREF 1
2

IREF=0.7748*Icharge

G

PR67
105K_0402_1%

1

4

1

6
PC62
0.01U_0402_25V7K

8

5

-

IREF=((100k/(100K+17.4K))/3.3)*(0.1/0.02)=Icharge

@PC58
@PC58
0.01U_0402_25V7K

D

+

Icharge=(Vsrset/Vdac)*(0.1/PR46)
IREF 28

S

P

28 BATT_OVP

PU1B
LM358DT_SO8
7 0

G

PR65
10K_0402_1%
1
2

24751_VREF
PR60
499K_0402_1%

2

CP POINT=(1.436V/3.3V)*(0.1/0.015)=2.901A

PR68
340K_0402_1%
2
1

2

Vacset=3.3*(50K/(50K+64.9K))=1.436V

PC59
100P_0402_50V8J

1

1

65W adapter R=(100K*100K)/(100K+100K)=50K

PC60
0.01U_0402_25V7K

CP point=Iadapter*85%

BQ24751ARHDR_QFN28_5X5

2

CP Point Setting

PR57
100K_0402_1%
2

1

SRSET

PR55
17.4K_0402_1%
2
1

2

14

Icharge Setting

For 2200mA, Icharge=0.8C=0.8*2*2.2=3.52A

ICHG setting

1

ACGOOD

3

/BATDRV

13

1

VMB

Per cell=3.5V

VS

PC57
0.1U_0603_25V7K

2

ACGOOD#

BATT-OVP=0.1112*VMB

PC54
0.1U_0603_25V7K

1

12

ACSET

2

1
2

VADJ

SRP
SRN

1

PQ13
SI2301BDS-T1-E3_SOT23-3

1

LI-3S :13.5V----BATT-OVP=1.5012V

VDAC

PC53
0.1U_0603_25V7K

1

2

D

PC56
0.1U_0603_25V7K

11

G

PQ13_GATE

BATT-OVP=0.1112*VMB

VREF

2

3

S

LI-4S :18.0V----BATT-OVP=2.001V

24751_VREF 10

2

28

1

1

PC55
1U_0603_10V6K
PR53
100K_0402_1%
1
2

Fsw : 300KHz

PC52
0.1U_0402_16V7K
1
2

1
24751_VREF

Cells selector

Input UVP : 17.26V

PC50
680P_0402_50V7K

2

3

ACOFF

PR52
54.9K_0402_1%

Input OVP : 22.3V

BATT+

1

9

3

PR48
4.7_1206_5%

DL_CHG

23

2
28

4

2

PQ11
AO4466_SO8

4

OVPSET

S

3

PC49
1U_0603_10V6K

1

OVPSET

1

2
1

PR51
340K_0402_1%

PC47
10U_1206_25V6M

24

2

PC51
0.47U_0603_16V7K
7
1
2

2

1

ACSET

2

1

1

4 Cell

PR50
0_0402_5%
1
2

@ PQ12
2N7002W-T/R7_SOT323-3
2
3S/4S#
G

D

6

REGN

CELLS

2

ACSET

1

2

VREF
@ PR49
@PR49
100K_0402_1%

PR47
54.9K_0402_1%

3 Cell

1

1

REGN

2

GND

2

CELLS

1

LL4148_LL34-2
PC46
0.1U_0603_25V7K

2

Place close to back to back MOS

PR46
0.02_2512_1%

PL6
10UH_PCMB104T-100MS_6A_20%
1
2

1

ACDRV
ACDET

PC48
10U_1206_25V6M

HIDRV

PC137
10U_1206_25V6M
2
1

ACN
ACP

4

1

2
3
4
5

/BATDRV

PQ10
AO4466_SO8

4

1

PQ9
AO4407A_SO8

2

ACN
ACP
ACDRV

2

PR41
100K_0402_1%

5
6
7
8

PR44
2.2_0603_5%
1
2

PC36
0.01U_0402_25V7K

2

BTST

1

27

PC39
2200P_0402_25V7K

BTST

1

PC45
0.1U_0805_25V7K
1
2

PC38
4.7U_1206_25V6K

2
PVCC

1

28

1

CHGEN

PC43
0.1U_0603_25V7K

RLZ24B_LL34

1

PVCC

PU4
1

ACDET

24751_VREF

CHG_B+

1

3
2
1

@PD11
@
PD11
1

1

JUMP_43X118
CHGEN#

2

PC42
0.1U_0603_25V7K

2

PC37
4.7U_1206_25V6K

2

5
6
7
8

3

5
6
7
8

4

2

1

2
2
2

1

PR45
340K_0402_1%
PC44
2.2U_0805_25V6K

PJ11
1

PC41
0.1U_0402_16V7K
1
2

2

2

1

8
7
6
5

1

PC40
0.01U_0402_25V7K

4
2

2
1
PR43
3.3_1210_5%

1
2
3

PR39
0.015_2512_1%

4

1
2
3

PR42
100K_0402_1%

1

8
7
6
5

PR40
3.3_1210_5%
1

PQ8
AO4407A_SO8

3
2
1

PQ7
AO4407A_SO8

VIN

B

C

D

SCHEMATIC,MB A4861
Document Number

Rev
D

401650
Sheet

Tuesday, April 14, 2009
E

40

of

46

A

B

C

D

PH1 under CPU botten side :
CPU thermal protection at 92 degree C
VL
VL

1

1

VL

2

VMB
PR76
47K_0402_1%

1

PR77
47K_0402_1%
1
2

TM_REF1

2

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

2

1

1

2

LL4148_LL34-2

2

PR84
100K_0402_1%

PH2 near main Battery CONN :
BAT. thermal protection at 75 degree C
EC_SMDA
VL

2

EC_SMCA

1

3

O

PU5A
LM393DG_SO8

2

EC_SMB_DA1 28

2

-

PR82
100K_0402_1%
2
1
VL

EC_SMB_CK1 28
PJP3

2

PD9

3

BATT_TEMP 28

1

+

1

2

1

1

2
2

PC68
1000P_0402_50V7K

1

1

PR85
1K_0402_1%

2

+3VALWP

PR81
13.3K_0402_1%

PC67
0.22U_0603_16V7K

2
1

PR80
100_0402_1%

1

PR79
100_0402_1%

3

4

PR83
6.49K_0402_1%
2
1

PQ21
DTC115EUA_SC70-3

8

PR78
11.3K_0402_1%
1
2

P

PC66
0.01U_0402_25V7K

G

2

PC65
1000P_0402_50V7K

MAINPWON 8,39

1

PC64
0.1U_0603_25V7K

1

PH1
100K_0603_1%_TSM1A104F4361RZ

1

BATT+

2

1
2

EC_SMCA
EC_SMDA

1

PL7
SMB3025500YA_2P
1
2

BATT_S1

2

1
2
3
4
5
6
7
8
9

2

1
2
3
4
5
6
7
8
9

2

PJP2
SUYIN_250133MR007G115ZL

@ PR86
47K_0402_1%
@ PR87
47K_0402_1%
1
2

1

PQ22
TP0610K-T1-E3_SOT23-3

3

@ PR91
22.1K_0402_1%

-

7

PU5B
LM393DG_SO8

2

2

@ PC71
0.22U_0603_16V7K

@ PD10
LL4148_LL34-2
2
1

P
O

1

6

+

G

5
TM_REF1

1

@

8

@ PR89
6.49K_0402_1%
1
2

2

1
2

@

VL

2

+VSBP

1
PC70
0.1U_0603_25V7K

2

PR90
22K_0402_1%
1
2

VL

2

PR88
100K_0402_1%

3

2

1

1

B+

PC69
0.22U_1206_25V7K

@ PH2
100K_0603_1%_TH11-4H104FT

4

3

1

VL

SUYIN_200109MS020G209ZR

1

S

PQ23
2N7002W-T/R7_SOT323-3

2
G

2
4

D

3

PR93
0_0402_5%
2

1

39,43 SPOK

1

PC72
0.1U_0402_16V7K

1

PR92
100K_0402_1%

@

4

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2008/06/11

Deciphered Date

2009/06/11

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

A

B

C

SCHEMATIC,MB A4861
Document Number

Rev
D

401650
Sheet

Tuesday, April 14, 2009
D

41

of

46

5

4

3

2

1

1

+1.8V

2

1

PJ12
JUMP_43X79
D

PU6
VCNTL

2

GND

NC

5

3

REFEN

NC

7

4

VOUT

NC

8

GND

9

+3VALW
1

VIN

6

2

2

PR94
1K_0402_1%

1

PC73
4.7U_0805_6.3V6K

1

1

2

2

D

PC74
1U_0402_6.3V6K

2
2

@PC77
@
PC77
0.1U_0402_16V7K

+0.9VP
1

PR96
1K_0402_1%

PC76
10U_0805_6.3V6M

2

S

PC75
0.1U_0402_16V7K
2
1

D

1

@ PQ24
2N7002W-T/R7_SOT323-3
2
G

1

@PR95
@
PR95
0_0402_5%
1
2

1

32,37 SYSON#

3

RT9173DPSP_SO8

PU7
APL5508-25DC-TRL_SOT89-3
C

C

IN

OUT

3

+2.5VSP
1

2

+3VS

1

@ PR98
150_1206_5%
2

1
PC79
4.7U_0805_6.3V6K

2

2

1

GND
PC78
1U_0402_6.3V6K

+1.8V

2

PJ14
JUMP_43X79
PC83
1U_0402_6.3V6K

B

5
4

VOUT

3

FB

2

VIN

9

PC84
4.7U_0805_6.3V6K

+1.5VSP
1

1

2

PC87
22U_0805_6.3V6M

2

2

PU8
APL5915KAI-TRL_SO8

PC85
0.01U_0402_25V7K

1

2

PR102
1.54K_0402_1%

2

PC86
0.1U_0402_16V7K

GND

EN

1

8
1

1
PR103
47K_0402_5%

VIN
VOUT

1

PR101
100K_0402_5%
1
2

28,30,37 SUSP#

POK

2

7

VCNTL

1

6

2

B

2

1

1

1

+5VALW

2

PR104
1.74K_0402_1%

A

A

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2008/06/11

2009/06/11

Deciphered Date

Title

SCHEMATIC,MB A4861

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

Rev
D

401650

Tuesday, April 14, 2009

Sheet
1

42

of

46

5

4

3

2

1

PJ15
JUMP_43X118
2 2
1 1

B+

PR107
0_0402_5%
1
2

1

2
PQ25
AO4466_SO8

D

1
5
6
7
8

TPS51117RGYR_QFN14_3.5x3.5

2
1

DL_1.8V

PC92
4.7U_0805_10V6K

+

PC91
330U_6.3V_M

2

@ PC171
680P_0402_50V7K

2

9

PQ26
FDS6670AS_NL_SO8
4 G

2

7

@ PC93
47P_0402_50V8J
1
2

DRVL

+1.8VP

1

@ PR201
4.7_1206_5%

D
D
D
D

V5DRV

10

+5VALW

S
S
S

11

3
2
1

14

12

PL8
1.8UH_MSCDRI-104A-1R8N-E_9.5A_30%
1
2

1

PGOOD

LX_1.8V

LL
TRIP

VFB=0.75V

2

VFB

6

DH_1.8V

1

5

DRVH

13

PR110
17.8K_0402_1%

V5FILT

PGND

4

8

VOUT

VBST

TP

1
EN_PSV

TON

3

BST_1.8V

PR108
PC90
0_0603_5%
0.1U_0603_25V7K
1
2BST_1.8V-1 1
2

2

PC94
1U_0603_10V6K

2

GND

PR109
0_0603_5%
1
2

15

PU9
@PC89
@PC89
0.1U_0402_16V7K

1

+5VALW

2

VFB=0.75V
Vo=VFB*(1+PR111/PR112)=0.75*(1+14K/10K)=1.8V
Rton=267K=>Faw=297KHz

Cout ESR=15m ohm
Ipeak=11.96A, Imax=8.372A, Iocp=14.352A
Delta I=((19-1.8)*(1.8/19))/(L*Fsw)
((19-1.8)*(1.8/19))/(1.8u*297000)=3.048A
=>1/2DeltaI=1.524A

PR111
14K_0402_1%
1
2
C

1

C

@ PC204
680P_0402_50V7K

3
2
1

28,30,37 SYSON

1

D

PR200
0_0603_5%
1
2 4

PR106
267K_0402_1%
1
2

PC88
4.7U_1206_25V6K

2

1

5
6
7
8

1.8_51117_B+

2

PR112
10K_0402_1%

Rtrip=17.8K
Iocp=13.04A~21.41A

PJ16
JUMP_43X118
2 2
1 1

B+
1
2

B

PQ27
AO4466_SO8

4

S
S
S

1
+

@ PC172
680P_0402_50V7K

PC98
330U_D2E_6.3VM_R25M

2

TPS51117RGYR_QFN14_3.5x3.5

3
2
1

2

DL_1.2V

1

9

2

DRVL

+1.2VALWP

1

V5DRV

10

+5VALW

PQ28
FDS6670AS_NL_SO8
4 G

1 2

11

5
6
7
8

TRIP

@ PR203
4.7_1206_5%

D
D
D
D

LX_1.2V

PR118
17.8K_0402_1%

VBST

12

1

PGOOD

PGND

VFB

6

VFB=0.75V

8

5

14

15
TP

1

V5FILT

13

LL

PL9
1UH_PCMB103E-1R0MS_20A_20%
1
2

PC99
4.7U_0805_10V6K

A

PR119
6.34K_0402_1%
1
2

1

PC101
1U_0603_10V6K

4

DRVH

DH_1.2V

PR116
PC97
0_0603_5%
0.1U_0603_25V7K
1
2BST_1.2V-1 1
2

2

Cout ESR=15m ohm
Ipeak=10.80A, Imax=7.56A, Iocp=12.96A
Delta I=((19-1.2)*(1.2/19))/(L*Fsw)
((19-1.2)*(1.2/19))/(1.8u*298000)=2.10A
=>1/2DeltaI=1.05A

PR120
10K_0402_1%

Compal Electronics, Inc.

Compal Secret Data

Security Classification

Rtrip=17.8K
Iocp=12.75A~20.83A
2

A

VOUT

BST_1.2V

2

1

@ PC100
47P_0402_50V8J
1
2

TON

3

GND

PR117
0_0603_5%
1
2

2

EN_PSV

@PC96
@PC96
0.1U_0402_16V7K

7

2

PU10

VFB=0.75V
Vo=VFB*(1+PR119/PR120)=0.75*(1+6.04K/10K)=1.203V
Rton=267K=>Fsw=298KHz

+5VALW

@ PC205
680P_0402_50V7K

3
2
1

PR115
0_0402_5%
1
2

1

39,41 SPOK

PR202
0_0603_5%
1
2

PR114
267K_0402_1%
1
2

B

PC95
4.7U_1206_25V6K

2

1

5
6
7
8

1.2_51117_B+

2008/06/11

Issued Date

Deciphered Date

2009/06/11

Title

SCHEMATIC,MB A4861

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

Rev
D

401650

Tuesday, April 14, 2009

Sheet
1

43

of

46

3

24

COMP

8

FB

PHASE2

23

9

VDIFF

UGATE2

22

10

VSEN

BOOT2

21

41

GND PAD

ISEN1

PC175
10U_1206_25V6M

2
1

PC174
10U_1206_25V6M
1
2

2

2

5
6
7
8

2
1

PC191
10U_1206_25V6M

3
2
1

PC190
10U_1206_25V6M

5

2
1

1

2

1

LG_CPU2

Rn

PC199
680P_0603_50V8J

3
2
1

2
PR243
10K_0402_1%

PC198
0.22U_0603_16V7K
1
2

CPU_ISEN2

B

1

4

2
PR240
1_0402_5%

1
2
PR237
4.7_1206_5%

PC197
1U_0402_6.3V6K
2
1

PQ34
AO4456_SO8

4

+CPU_CORE

1

5
6
7
8

5
6
7
8
PQ33
AO4456_SO8

1
2
PR238
3.65K_0805_1%
1
2
PR239
10K_0402_1%

ISEN2

PR233
10_0402_5%
2

2
PR235
10_0603_5%

Rs
VSUM

PL12
0.36UH_PCMC104T-R36MN1R17_30A_20%
1
2

PHASE_CPU2

1

2

VSUM

PC196
0.01U_0402_50V7K
1
2

Vdroop=Vn/Rdroop1*(Rdroop1+Rdroop2)
=Vn*(1+(Rdroop2/Rdroop1))
=Vn*(1+(PR231/PR230))
=Vn*G2

Close to Phase1 Choke PL11
PH3
10K_0603_5%_TSM1A103J4302RE

PC194
0.022U_0402_16V7K
1
2

Rn=(PR241+PH3)//(PR236)=5.875k, Rseuq=Rs/2=1.825K
Vdcrequ=Io*(DCR/2),
Vn=Vdcrequ*(Rn/(Rsequ+Rn))
=Io*(DCR/2)*(Rn/(Rsequ+Rn))
=Io*(DCR/2)*G1

PC193
0.22U_0402_6.3V6K
1
2

PR234
0_0402_5%

4

+5VS

1

1
PC195
0.22U_0402_6.3V6K
1
2

8 CPU_VSS_SENSE

PQ32
SI7686DP-T1-E3_SO8

B+
VCC_PRM

C

VCC_PRM

1

1

@
@P

B

2

PR225
2.2_0603_1%

CPU_ISEN2

PR241
2.61K_0402_1%
1
2

PR232
10_0402_5%
1
2

PR236
11K_0402_1%
1
2

2

平行線from output Bulk Cap

CPU_ISEN2

CPU_ISEN1

UG_CPU2
2

CPU_ISEN1
PC189
180P_0402_50V8J
1
2
PR230
PR231
1K_0402_1%
1.4K_0402_1%
2
1
1
2

PC180
0.22U_0603_16V7K
1
2

CPU_B+

20

19

VDD
18

GND
17

VSUM

VIN
16

15

VO

DFB
13

DROOP

PU11
ISL6264CRZ-T_QFN40_6X6

PC202
2200P_0402_50V7K
2
1

VID0

VID1

VID2

VID3

VID4

VW

7

PC182
4.7U_0603_6.3V6K

PR242
10K_0402_1%
1

PGND2

6

+5VS

1

2
PR222
1_0402_5%

LGATE2

25

2

+CPU_CORE

1

26

LG_CPU1
PR223 0_0402_5%
2
1

1
2
PR220
3.65K_0805_1%
1
2
PR221
10K_0402_1%

PVCC

1
2
PR219
4.7_1206_5%

LGATE1

27

1

28

4

2

PGND1

4

PC183
680P_0603_50V8J

29

PQ31
AO4456_SO8

3
2
1

PHASE1

PQ30
AO4456_SO8

PC188
0.22U_0603_25V7K

1

+CPU_CORE

1
PR228
0_0402_5%

PC201
220U_25V_M

3
2
1
32

33

34

35

36

31

30

3
2
1

OCSET

VID5

PSI_L

5
6
7
8
SOFT

5

UGATE1

3
2
1

OFS

4

+
2

2

3

1

PL11
0.36UH_PCMC104T-R36MN1R17_30A_20%
1
2

PHASE_CPU1

BOOT1

RBIAS

VR_ON

2

@PC186
@
PC186
0.068U_0402_16V7K

PC192
C192
1000P_0402_50V7K

2

PR229
10_0402_5%
2
1

4

D

B+

UG_CPU1

@
@P

8 CPU_VCC_SENSE

PC176
0.22U_0603_25V7K

1

2
1
PR207
2.2_0603_1%

5

1
PR205
2
0_0402_5%
2
0_0402_5%
2
0_0402_5%
2
0_0402_5%
1
0_0402_5%
2
0_0402_5%
38

37

39

40
PGOOD

SET

12

PC185
1000P_0402_50V7K
1
2

1

11

PC187
C187
1000P_0402_50V7K
1
2

PR227
255_0402_1%
1
2

PQ29
SI7686DP-T1-E3_SO8

@
@P

RTN

PC181
470P_0402_50V7K
1
2
PC184
220P_0402_50V8J
1
2

2

PR224
97.6K_0402_1%
1
2

PR226
1K_0402_1%
2
1

1
PR211
1
PR213
1
PR245
1
PR214
2
PR208
1
PR209

1
2
PR210
10K_0402_5%

PR215
150K_0402_1%
1
2

PR218
36.5K_0402_1%
1
2

PR217
4.02K_0402_1%
1
2
PC179
0.047U_0402_16V7K
1
2

@
@P

1

C

PR216
6.81K_0402_1%
1
2
PC178
C178
1000P_0402_50V7K
1
2

PC177
1000P_0402_50V7K
1
2

VCC_PRM

1
2
PR212
R212
10K_0402_5%
PR206
1

+3VS

CPU_B+

CPU_VID1 8
CPU_VID0 8

0_0402_5%
2

VGATE

PL10
FBMA-L18-453215-900LMA90T_1812
1
2

CPU_VID2 8
PC200
2200P_0402_50V7K
2
1

1

28

CPU_VID3 8

2
0_0402_5%

2

CPU_VID4 8

PR204
10K_0402_5%

D

1

CPU_VID5 8

8

PSI_L

+3VS

2

28

VR_ON

4

14

5

CPU_ISEN1
VCC_PRM

VSUM

=>Vdroop=Vn*(1+(PR231/PR230))=Io*Rdroop
=>Io*(DCR/2)*G1*G2=Io*Rdroop
=>Rdroop=1.007m ohm

A

Iocp_min*Rdroop>Rocset*10uA
=>25A*1.007m ohm>Rocset*10uA
=>choose Rocset=2.74K
=>Iocp_min*1.007m ohm>2.74K*10u
=Iocp_min>27.209A

A

Iocp_max*Rdroop>Rocset*10.4uA
=>Icop_max>28.297A
Iocp=~27.209A~28.297A

2008/06/11

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

Deciphered Date

2009/06/11

Title

SCHEMATIC,MB A4861

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

Rev
D

401650
Sheet

Tuesday, April 14, 2009
1

44

of

46

5

4

3

2

Version change list (P.I.R. List)
Item
D

1
2
3

C

B

Fixed Issue

Reason for change

Customer changed CPU to TF36/38.

TF36/38 is 31W CPU, must change MOS to 1H2L.

Change CP OCP setting.

TF36/38 CPU OCP setting change.

S3 Mode issue.

Because APL5915 has 0.4V enable voltage, so add
PR103 to pull down enable voltage when system in
S3 mode

Rev.

PG#

0.1

44

0.1

44

0.1

42

Modify List

1

Page 1 of 1
for PWR

Date

Add PQ31 and PQ34 SB000009F80( S TR AO4456 1N SO8)

Phase

08, 11/13

to DVT

Change PR198 to SD034402180(S RES 1/16W 4.02K 0402 1%)08, 11/13

to DVT

Add PR103 SD028470280( S RES 1/16W 47K 0402 5%)

08, 11/13

to DVT

08, 11/17

to DVT

08, 11/17

to DVT

08, 11/17

to DVT

4

AMD issue.

AMD request add 1.2V to 1.22V for chipset.

0.1

43

5

EMI issue.

EMI request add charger snubber.

0.1

40

6

Cost issue.

Cost issue.

0.1

44

7

Support charge voltage.

Support charge voltage.

0.1

40

Delete PQ18 SB000006800(S TR 2N7002W T/R7 1N SOT-323) 08, 11/26

to DVT

8

Support charge voltage.

Support charge voltage.

0.1

40

Delete PQ16 SB923010020(S TR SI2301BDS-T1-E3 1P SOT23)08, 11/26

to DVT

9

Support charge voltage.

Support charge voltage.

0.1

40

Delete PR66 SD028000080(S RES 1/16W 0 0402 5%)

08, 11/26

to DVT

10

Support charge voltage.

Support charge voltage.

0.1

40

Delete PR69 SD034100380(S RES 1/16W 100K 0402 1%)

08, 11/26

to DVT

11

Support charge voltage.

Support charge voltage.

0.1

40

Delete PC63 SE074102K80(S CER CAP 1000P 50V K X7R 0402)
08, 11/26

to DVT

12

Support charge voltage.

Support charge voltage.

0.1

40

Add PR70 SD034210380(S RES 1/16W 210K 0402 1%)

08, 11/26

to DVT

Support charge voltage.

Support charge voltage.

0.1

40

13

Change PR119 from SD034604180 to SD034634180.
Add PR48 SD001470B80(S RES 1/4W 4.7 +-5% 1206)
Add

PC50 SE074681K80(S CER CAP 680P 50V K X7R 0402)

Change PC201 from SF000000G80(S ELE CAP 220U 25V M
HA0 MVY) to SF22004M210(S ELE CAP 220U 25V M
8X10.2 CE-AX)

D

C

B

Add PR71 SD034499380(S RES 1/16W 499K 0402 1%)

08, 11/26

to DVT

14
15
16
17
18
A

A

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2008/06/11

Deciphered Date

2009/06/11

Title

SCHEMATIC,MB A4861

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

Rev
D

401650

Tuesday, April 14, 2009

Sheet
1

45

of

46

5

4

3

2

1

Version change list (P.I.R. List) for HW
Item
1
D

Rev.

PG#

Item

P06

26

P25

27

P25

28

Reason for change

Modify List

PG#

PVT

P35

PVT

P28

PVT

P25

Circuit issue

Add R677

DVT

P32

29

Material Change

5

RT5159 ID issue

Pop R680 to 0_0402_5%

DVT

P27

30

BOM change

Del D13,D4

6

[EMI] Camera
co-layout choke

Change R759,R760 to 0_0402
DVT
Reserve L77

P24

31

ESD Cost down

[Cost Down] audio LDO

Reserve U81
Pop784

P35

32

ESD Cost down

Change D15 to SCA00000200

Pre-PVT

33

BOM change

Change R251,R253 to 1K

Pre-PVT

Change U1 to APL5607

Material Change

Change U85 to AR8132

3

8132 issue, OS
black screen

Change L90 to R546
(0_0805)

DVT
DVT
DVT

DVT

8

RT5159 unkow issue

Reserve R548, pop R547

DVT

P27

9

[ESD]

Pop D39,D40

DVT

P36

10

[ESD]

Pop D14,D15

DVT

P36

11

[ESD]

Pop D16

DVT

P29

12

[EMI]

Reserve C859 for EMI

DVT

P27

13

Modify PWR Sequence

Reserve R104,R108
Pop R658,R652

DVT

P34
P28

14

[EMI]

Reserve C861 for EMI

DVT

P16

15

Material Change

Change JRJ1 type

DVT

P26

DVT

P36

Material Change
Material Change
Material Change

ALC272X-GR

Rev.

4

Material Change

2

16

B

Modify List

Change U82 to
(SA00002CI20)
Change U27 to
(SA00001J580)
Change U85 to
(SA000034V00)
Change U85 to
(SA000036Y00)

7

C

Reason for change

KB926QFD3

D

AR8132M-AL1E
AR8132-AL1E

Del D16,D39,D40

Pre-PVT

P25

Pre-PVT

P06

Pre-PVT

C

17

[EMI]

18

[EMI]

Change C924,C971 to
3900pF_0402
Reserve
C350,C352,C353,C354
Pop R673 to 10ohm_0402
Pop C858 to 10pF_0402

19

[EMI]

Pop C859 to 0.1uF_0402

Material Change

20

[EMI]

21

Material Change

22

Material Change

23

Material Change

24

Circuit Change

25

Material Change

DVT

P15

PVT

P27

PVT

P27

Pop C350,C352,C353,C354 to
PVT
0.1uF_0402
Change R251,R253 to 1.1Kohm
Change R250,R252 to 1.2Kohm PVT
Change Y2 footprint to
correct
Only cChange R810,R807 P/N
to SM010012010
Reserve PWN FAN function.
Add R247,R40,JP38
Change R814,R815 to
56.2ohm_0402

P15
B

P34

PVT

P18

PVT

P36

PVT

P06

PVT

P36

A

A

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2005/03/08

Issued Date

Deciphered Date

2009/06/11

Title

SCHEMATIC,MB A4861

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

Tuesday, April 14, 2009

Rev
D

401650
Sheet
1

46

of

46

www.s-manuals.com



---

Source Exif Data:

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XMP Toolkit                     : Adobe XMP Core 4.0-c316 44.253921, Sun Oct 01 2006 17:14:39
Producer                        : Acrobat Distiller 6.0 (Windows)
Modify Date                     : 2012:11:25 12:22:52+02:00
Create Date                     : 2009:04:14 10:23:18+08:00
Metadata Date                   : 2012:11:25 12:22:52+02:00
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Title                           : Compal LA-4861P - Schematics. www.s-manuals.com.
Creator                         : 
Subject                         : Compal LA-4861P - Schematics. www.s-manuals.com.
Page Count                      : 47
Keywords                        : Compal, LA-4861P, -, Schematics., www.s-manuals.com.

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