Compal LA 7521P, 7522P Schematics. Www.s Manuals.com. 7521p R0.2, R0.1 Schematics
User Manual: Motherboard Compal LA-7521P PCA70 - Schematics. Free.
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Page Count: 65
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Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
PCA70 LA-7521P M/B
0.1
Cover Page
Custom
164Tuesday, April 12, 2011
2010/10/1 2011/11/01
Compal Electronics, Inc.
Tuesday, April 12, 2011 Rev 0.2
Intel Processor(Sandy Bridge) / PCH(Cougar Point)
PCA70/61
LA-7521P Schematic
REV 0.2
Sugar Bay
LA-7522P REV 0.1
A
A
B
B
C
C
D
D
E
E
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Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
PCA70 LA-7521P M/B
0.1
Block Diagram
264Tuesday, April 12, 2011
2010/10/1 2011/11/01
Compal Electronics, Inc.
Touch Panel
Intel CPU
Sandy Bridge
Desktop
LGA1155
204pin DDRIII-SO-DIMM X2
1.5V DDRIII 1066/1333 MT/s
Memory BUS(DDRIII)
FCBGA-942
Intel PCH
Cougar Point
H61
Dual Channel
SATA port 0
HD Audio
USB 2.0 X 6
PCI-Express 16X
DMI X4
PCIe 1x
5GT/s
USB-Port 2
USB-Port 0 USB-Port 1
PCIe 1x
RJ45
LAN
RTL8111E 10/100/1G
FDI X8
2.7GT/s
2 ch. LVDS
Conn.
PCIe 1x
HDMI IN conn.
Scale
HDMI
RTD2482D
USB-Port 5
& eSATA
USB-Port 4
USB 3.0
0.3MP CAM (1.3M reserve)
w/ DMic & ALS
SATA port 1
SPI ROM
PCIe Mini Card
WLAN
USB 2.0 X2 (reserve)
D-sub IN conn.
RGB
SPI
PCI-E
USB 2.0
DDPC
PCIe 1x
VGA Chip
NV N12P-GV
NV N12P-GS(default)
DDR3 VRAM
512M/1GB(GV)
1GB/2GB(GS)
LVDS I/F
Card reader IC
(SD/MMC/SDHC)
JMB3853 in 1 CardReader
conn.
SPI
SPI ROM
EC
ENE KB930
CIR
LPC BUS
3.5" SATA HDD Conn.
SATA ODD Conn.
ASM1042
TV Tuner Card
USB3.0 Controller
2.5mm jack
for 10W woofer
SPK AMP
ALC663
5.1ch HDA Audio Codec
HP/SPDIF JackSPK AMP
6W SPK *2
Conn
EUA2113
L1
H1
HDMI OUT conn.
DDPD
MIC Jack
C C
H1L1
C C
SATA port 4
USB 2.0
D-Mic.
EUA2113
USB-Port 3
C C
LFEOUT
FRONT
HPOUT
HDMI
(IFPC)
HDMI(IFPE)
SPDIFOUT
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Re v
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
PCA70 LA-7521P M/B
0.1
Power Tree
364Tuesday, April 12, 2011
2010/10/1 2011/11/01
Compal Electronics, Inc.
HDMI-IN Mini Card x2
PU9
TPS51212DSCR
+1.05VSP
JUMP +1.05VS_VPCH
+1.8VS
+3VS
PU6
TPS51212DSCR
+1.05VS_VCCIOP
+CPU_CORE
JUMP
JUMP
+GFX_CORE
Intel Gougar Point
+1.05VS_VCCIO
PCH
PU5
APL5610CI
+1.8VS
VGA
N12P-GT-A1
+VCCSAP +VCCSA
JUMP
Bead VIN PU11~PU15
NCP5911MNTBG
+CPU_CORE
+GFX_CORE
+5VALW
+5VALW
CRT-IN
eSATA/USB
Conn.
+USB_VCCC
U83
+5VALW
U34
U33
+USB_VCCB
+USB_VCCA
U46
+1.05VS_VCCIO
+USB30_VCCA
+5VALW
+1.05VS_VPCH
AP4800BGM
Q61 +5VS
+LCDVDD
+5VS
FAN2
FAN3
+5VS
+12VS
AP4800BGM
Q60
+3VS
APL5930KAI
PU6 +1.8VSP
MOS
+3VALW
Conn
+3VS
JUMP
+1.8VS
AP4800BGM
U63 +1.05VGS
+1.05VGS
PU7
TPS51212DSCR
+1.5VP JUMP +1.5V
APL5930KAI
PU6
+0.75VP
JUMP
+0.75VS
AP4800BGM
U65
+1.5VGS
+1.5VGS
VRAM X 8
+1.5VGS
MOS
+1.5VS +3VS
MOS
PU3
TPS54331DR
+12VALWP
JUMP
+12VALW
AMP X 2
EUA2113
MOS +12VS
+12VS
LCD
Converter
B+
PU16
TPS51212DSCR
+3VS
JUMP
+VGA_COREP +VGA_CORE
+VGA_CORE
MOS +3VGS
+3VS
U23
+3VALW
PU19
APL5930KAI
+1.5V
+1.2VUSB
HDMI-OUT
+5VS
+12VS
Touchscreen
+5VS
SATA ODD
+5VS
Bluetooth
+3VS
CAM
+3VS
Scaler
MOS
Audio codec
ALC663
+3VS+5VS
USB2.0 X 3
USB3.0 X 2
+3VS1.5VS
B+
MOS
B-CAS
+5VS_L_BCAS
SW&Power/B
LVDS
ASM1442
+3VS
Media card
controller
JMB385
+3VS
+3VALW
+5VS
+VCCSA
CIR
+3VS
1.5V
LVDS CONNRTD2482D
+5VS
+5VALW
DDR3 SODIMM X 4
JDCIN1
RTC
Battery
+RTCVCC
JUMP 8205_B+ PU2
RT8205EGQW
+5VALWP
+3VALWP
JUMP
EC
JUMP
KB930
+3VALW
+5VALW
+3VALW
+1.5V
+0.75VS
+3VALW
Scaler USB3.0
ASM1042
Intel Sandy Bridge
+1.2VUSB+3V_SCA
FAN1
SATA HDD
CPU
+1.2V_SCA
LAN
RTL8111E
+3V_LAN
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
PCA70 LA-7521P M/B
0.1
Notes List
Custom
464Tuesday, April 12, 2011
2010/10/1 2011/11/01
Compal Electronics, Inc.
Voltage Rails
1010 000X b
PCH SM Bus Address
1010 010X b
HEX
DDR(JDDRL2)
Address
DDR(JDDRH1)
Device
+3VS
HEX Address
EC SM Bus2 Address
DevicePower Power
+3VS
5V always on power rail once AC plug in+5VALW
+5VS 5V switched power rail OFF OFF
ON ON ON
+3VGS ON OFF OFF
ON OFF OFF+VGA_CORE
ON OFF OFF
+1.05VGS
3.3V power rail for GPU
1.05VS switched power rail for GPU
1.5VS power rail for GPU and VRAM
1.5V power rail for DDRIII
ON
OFF
OFF
+0.75VS 0.75V power rail for DDR terminator
+RTCVCC RTC power
+1.5VS
+1.8VS 1.8V switched power rail
+3VS
+3VALW 3.3V always on power rail once AC plug in
3.3V switched power rail
ONON
ON
ON OFF
1.5V switched power rail
+CPU_CORE
+1.5VGS
Core voltage for CPU
OFF
ON
ON OFF
ON
ON OFF OFF
+3V_LAN 3.3V power rail for LAN ON ON
S0 S3 S5
ON
ON
ON
OFF
Power Plane Description
OFF
OFF
+1.5V
ON
ON
OFF
OFF
ON OFF OFF
Graphics power rail for GPU
ON OFF+GFX_CORE Graphics voltage for CPU
+1.05VS_VCCIO 1.05V power rail for CPU
OFF
OFF
Disabled on H61
Disabled on H61
Co-lay w/USB30 PORT1
USB 2.0 USB 1.1 Port
USB Conn 6
USB Conn 4
USB Conn 3
eSATA+USB Conn
Touch Screen
Web Camera
Blue Tooth
Mini Card(TV Tuner)
0
1
2
3
4
5
6
7
8
9
10
11
12
13
UHCI0
UHCI1
UHCI2
UHCI3
UHCI4
UHCI5
UHCI6
EHCI1
EHCI2
USB Port Table
Co-lay w/USB30 PORT0
Disabled on H61
Disabled on H61
DIS@DISCRETE ONLY
Unpop @
BCAS TV@
GS@VGA-N12P-GS
UMA Only UMA@
BOM Structure Table
BTO Item BOM Structure
GV@VGA-N12P-GV
USB30 USB30@
UMA
SKU ID(Project) Table
Project
_ID2
(GPIO69)
Project
_ID1
(GPIO70)
Project
_ID0
(GPIO71)
00 0
SKU
0
0
0
0
1
1
01 1
10 0
10 1 X
11 0 X
X11 1
DIS-Hynix
HEX
VGA Ext. thermal sensor
AddressDevicePower
PCH SML1 Bus Address
1001_1010b
Scaler
D-sub IN VGAIN@
HDMI OUT HDMIO@
HDMI OUT from DIS HDMIOD@
HDMI OUT from UMA HDMIOU@
VRAM select X76@
VGA w/o Senergy DISO@
VRAM 1G Hynix
X7630488L01 X76_HY1G@
VRAM 1G Samsung
X7630488L02 X76_SAM1G@
GPIO69_H@
GPIO70_H@
GPIO71_H@
GPIO69_L@
GPIO70_L@
GPIO71_L@
SKU IO Select
UMA@ USB30@ GPIO69_L@ GPIO70_L@ GPIO71_L@
GS@ DIS@ USB30@ VGAIN@ HDMIO@ HDMIOD@ DISO@
GPIO69_L@ GPIO70_L@ GPIO71_H@
ME components CONN@
USB20@No USB30 SKU
4319D588L03
4319D588L04
SLP_S5# +VALW
ON
ON
ON
ON
ON
ON
+VS
S4 (Suspend to Disk)
HIGH HIGH HIGH
HIGHHIGHHIGH
LOW
LOW LOW
LOWLOWLOW OFF
OFF
OFF
S1(Power On Suspend)
Full ON
SIGNAL
STATE
OFF
HIGH
HIGH
HIGH
S5 (Soft OFF)
S3 (Suspend to RAM)
SLP_S3# SLP_S4#
ODD
Port Device
NC
eSATA+USB Conn
0
1
2
3
4
5
SATA Port Table
HDD
6G
3G
Disabled on H61
Disabled on H61
Device
HDMI IN HDMIIN@
HDMIIN@
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
Adapter power supply (19V)
AC power rail for power circuit.
N/A
N/A
VIN
B+
N/A
N/A
N/A
N/A
ON
ON OFF
+1.05VS_VPCH 1.05V power rail for PCH
+VCCSA ON OFF OFFSystem Agent core voltage for CPU
OFF
+3V_SCA 3.3V switched power rail for scaler ON
1.2V switched power rail for scaler ON
N/A N/A
+1.2V_SCA N/AN/A
+1.2V_USB 1.2V power rail for USB3.0 OFFON OFF
5V switched power rail for panel+LCDVDD ON N/A N/A
+12VALW 12V always on power rail once AC plug in
+12VS 5V switched power rail OFF OFF
ON
ON
N/A N/A
1001_1110bVGA Int. thermal sensor
(defaulta)
0000_0101b
OFF
6LOCB@LA-7521P 6 Layer PCB
LA-7522P 8 Layer PCB 8LPCB@
UMA
HDMIIN@UMA@ USB30@ VGAIN@ HDMIO@ HDMIOU@ DEBUG@
GPIO69_L@ GPIO71_L@
X76_HY1G@
GPIO70_H@
4319D588L05
Card reader
LAN
DevicePort
4
3
2
1
TV
WLAN
NC
PCIE Port Table
5
6
7
Disabled on H61
Disabled on H61
8
USB30
0.2
*
BOARD ID Table
Board
ID
0
1
2
3
4
PCB
Revision
0.1
4319D588L11
DIS-Hynix
HDMIIN@GV@ DIS@ USB30@ VGAIN@ HDMIO@ HDMIOD@ DISO@
GPIO69_L@ GPIO71_H@
8LPCB@
8LPCB@
8LPCB@
6LOCB@
HDMIIN@UMA@ USB20@ VGAIN@ HDMIO@ HDMIOU@ DEBUG@
GPIO71_L@6LOCB@
GPIO70_H@
GPIO69_H@ GPIO70_L@
4319D588L12
UMA
USB30 w/o HDMI
Project
PCA70
PCA61
USB30 w/ HDMI
USB30 w/ HDMI
USB30 w/ HDMI
USB20 w/ HDMI
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
XDP_TDO_R
XDP_TCK_R
XDP_TRST#_R
XDP_TMS_R
XDP_TDI_R
TP_SKTOCC#
H_PM_SYNC
H_PECI
CLK_CPU_DMI#
XDP_DBRESET#_R
H_THERMTRIP#_R
XDP_TMS_R
PM_DRAM_PWRGD_R
XDP_TDO_R
XDP_TDI_R
H_SNB_IVB#
XDP_TCK_R
BUF_CPU_RST#
H_CATERR#
CLK_CPU_DMI
H_PWRGOOD
XDP_TRST#_R
H_PROCHOT#_R
CLK_BCLK_ITP
CLK_BCLK_ITP#
PM_DRAM_PWRGD_R
BUFO_CPU_RST# BUF_CPU_RST#
H_PWRGOOD
XDP_DBRESET#
H_PM_SYNC
H_PROCHOT#_R
H_SNB_IVB#
H_PECI
PLT_RST#
DRAMPWROK[15]
SUSP[51,57]
H_SNB_IVB#[18]
H_PROCHOT#[49]
H_PECI[18,49]
H_PM_SYNC[15]
H_THERMTRIP#[18]
H_PWRGOOD[18]
XDP_DBRESET# [15]
CLK_CPU_DMI# [14]
CLK_CPU_DMI [14]
SM_DRAMRST# [11,12]
CLK_BCLK_ITP# [14]
CLK_BCLK_ITP [14]
PLT_RST#[17,22,45,49]
+3VS
+1.5V
+3VS
+1.05VS_VCCIO
+1.05VS_VCCIO
+1.05VS_VCCIO
+1.05VS_VCCIO
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
PCA70 LA-7521P M/B
0.1
Sandy Bridge_JTAG/XDP/FAN
Custom
564Tuesday, April 12, 2011
2010/10/1 2011/11/01
Compal Electronics, Inc.
PU/PD for JTAG signals
PROC_SELECT#
100 MHz
120 MHz
PECI 10mil spacing and
Max Length < 15"
Place C2 close to CPU J40 as
close as possible.
R12 follow CDB R42PR add
0ohm serial resistor
R14 follow CDB R34PR add
0ohm serial resistor
Change Buffered Reset to 1G07(Buffer with open-drain output) 10/7
Close to CPU side
ESD request Close to CPU as possible
C20.1U_0402_16V4Z 1 2
C1594 0.1U_0402_16V4Z
1 2
C1592 0.1U_0402_16V4Z
1 2
U2
SN74LVC1G07DCKR_SC70-5
NC
1
A
2
G
3
Y4
P5
R35
39_0402_5%
@
12
C1591 0.1U_0402_16V4Z
1 2
C6
0.1U_0402_16V4Z
1
2
T1PAD
C1612
0.1U_0402_16V4Z 1
2
R4 51_0402_5%
12
R43
43_0402_1%
1 2
G
D
S
Q1
SSM3K7002BF 1N SC59-3
@
2
13
R8 51_0402_5%
12
R1 51_0402_5%
12
R14 0_0402_5%
1 2
R3 51_0402_5%
12
R42
75_0402_5%
12
R1310K_0402_5% 12
CLOCKS
MISCTHERMALPWR MANAGEMENT
DDR3
MISC
JTAG & BPM
JCPU1B
Sandy Bridge_rPGA_Rev1p0
SM_DRAMRST# AW18
BCLK#[0] W1
BCLK[0] W2
BCLK_ITP# D40
BCLK_ITP C40
CATERR#
E37
PECI
J35
PROCHOT#
H34
THERMTRIP#
G35
SM_DRAMPWROK
AJ19
RESET#
F36
PRDY# K38
PREQ# K40
TCK M40
TMS L38
TRST# J39
TDI L40
TDO L39
DBR# E39
BPM#[0] H40
BPM#[1] H38
BPM#[2] G38
BPM#[3] G40
BPM#[4] G39
BPM#[5] F38
BPM#[6] E40
BPM#[7] F40
PM_SYNC
E38
SKTOCC#
AJ33
PROC_SEL
K32
UNCOREPWRGOOD
J40
R6 51_0402_5%
12
R33
200_0402_5%
12
C1593 0.1U_0402_16V4Z
1 2
C3
0.1U_0402_16V4Z
@
1
2
C1
1000P_0402_50V7K
@
1
2
R44
0_0402_5%
@
12
R23 0_0402_5%@
1 2
R12 0_0402_5%@12
R22 10K_0402_5%
12
R24
130_0402_5%
1 2
R1070
1K_0402_5%
@
12
R2 51_0402_5%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FDI_COMP
PEG_COMP
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3
DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_PTX_CRX_N2
DMI_PTX_CRX_N1
DMI_PTX_CRX_N0
DMI_PTX_CRX_N3
DMI_PTX_CRX_P2
DMI_PTX_CRX_P3
DMI_PTX_CRX_P0
DMI_PTX_CRX_P1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
FDI_FSYNC1
FDI_FSYNC0
FDI_LSYNC0
FDI_INT
FDI_LSYNC1
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_INT
FDI_LSYNC1
PCIE_CTX_C_GRX_N7
PCIE_CTX_C_GRX_N1
PCIE_CTX_C_GRX_N2
PCIE_CTX_C_GRX_N4
PCIE_CTX_C_GRX_N8
PCIE_CTX_C_GRX_N10
PCIE_CTX_C_GRX_N0
PCIE_CTX_C_GRX_N9
PCIE_CTX_C_GRX_N5
PCIE_CTX_C_GRX_N3
PCIE_CTX_C_GRX_N12
PCIE_CTX_C_GRX_N14
PCIE_CTX_C_GRX_N6
PCIE_CTX_C_GRX_N11
PCIE_CTX_C_GRX_N15
PCIE_CTX_C_GRX_N13
PCIE_CTX_C_GRX_P7
PCIE_CTX_C_GRX_P1
PCIE_CTX_C_GRX_P2
PCIE_CTX_C_GRX_P5
PCIE_CTX_C_GRX_P4
PCIE_CTX_C_GRX_P0
PCIE_CTX_C_GRX_P3
PCIE_CTX_C_GRX_P15
PCIE_CTX_C_GRX_P9
PCIE_CTX_C_GRX_P6
PCIE_CTX_C_GRX_P10
PCIE_CTX_C_GRX_P11
PCIE_CTX_C_GRX_P8
PCIE_CTX_C_GRX_P12
PCIE_CTX_C_GRX_P13
PCIE_CTX_C_GRX_P14
PCIE_CTX_GRX_N2
PCIE_CTX_GRX_N1
PCIE_CTX_GRX_N0
PCIE_CTX_GRX_N4
PCIE_CTX_GRX_N7
PCIE_CTX_GRX_N3
PCIE_CTX_GRX_N5
PCIE_CTX_GRX_N8
PCIE_CTX_GRX_N9
PCIE_CTX_GRX_N10
PCIE_CTX_GRX_N6
PCIE_CTX_GRX_N11
PCIE_CTX_GRX_N12
PCIE_CTX_GRX_N15
PCIE_CTX_GRX_N14
PCIE_CTX_GRX_N13
PCIE_CTX_GRX_P1
PCIE_CTX_GRX_P7
PCIE_CTX_GRX_P2
PCIE_CTX_GRX_P3
PCIE_CTX_GRX_P0
PCIE_CTX_GRX_P4
PCIE_CTX_GRX_P5
PCIE_CTX_GRX_P8
PCIE_CTX_GRX_P11
PCIE_CTX_GRX_P10
PCIE_CTX_GRX_P9
PCIE_CTX_GRX_P6
PCIE_CTX_GRX_P15
PCIE_CTX_GRX_P14
PCIE_CTX_GRX_P13
PCIE_CTX_GRX_P12
PCIE_GTX_C_CRX_N2
PCIE_GTX_C_CRX_N1
PCIE_GTX_C_CRX_N0
PCIE_GTX_C_CRX_N4
PCIE_GTX_C_CRX_N7
PCIE_GTX_C_CRX_N3
PCIE_GTX_C_CRX_N5
PCIE_GTX_C_CRX_N8
PCIE_GTX_C_CRX_N9
PCIE_GTX_C_CRX_N10
PCIE_GTX_C_CRX_N6
PCIE_GTX_C_CRX_N11
PCIE_GTX_C_CRX_N12
PCIE_GTX_C_CRX_N15
PCIE_GTX_C_CRX_N14
PCIE_GTX_C_CRX_N13
PCIE_GTX_C_CRX_P1
PCIE_GTX_C_CRX_P7
PCIE_GTX_C_CRX_P2
PCIE_GTX_C_CRX_P3
PCIE_GTX_C_CRX_P0
PCIE_GTX_C_CRX_P4
PCIE_GTX_C_CRX_P5
PCIE_GTX_C_CRX_P8
PCIE_GTX_C_CRX_P11
PCIE_GTX_C_CRX_P10
PCIE_GTX_C_CRX_P9
PCIE_GTX_C_CRX_P6
PCIE_GTX_C_CRX_P14
PCIE_GTX_C_CRX_P15
PCIE_GTX_C_CRX_P13
PCIE_GTX_C_CRX_P12
PCIE_CTX_C_GRX_N[0..15] [22]
PCIE_CTX_C_GRX_P[0..15] [22]
PCIE_GTX_C_CRX_N[0..15] [22]
PCIE_GTX_C_CRX_P[0..15] [22]
DMI_PTX_CRX_P3[15] DMI_PTX_CRX_P2[15] DMI_PTX_CRX_P1[15] DMI_PTX_CRX_P0[15]
DMI_PTX_CRX_N3[15] DMI_PTX_CRX_N2[15] DMI_PTX_CRX_N1[15] DMI_PTX_CRX_N0[15]
DMI_CTX_PRX_P3[15] DMI_CTX_PRX_P2[15] DMI_CTX_PRX_P1[15] DMI_CTX_PRX_P0[15]
DMI_CTX_PRX_N3[15] DMI_CTX_PRX_N2[15] DMI_CTX_PRX_N1[15] DMI_CTX_PRX_N0[15]
FDI_CTX_PRX_N0[15] FDI_CTX_PRX_N1[15] FDI_CTX_PRX_N2[15] FDI_CTX_PRX_N3[15] FDI_CTX_PRX_N4[15] FDI_CTX_PRX_N5[15] FDI_CTX_PRX_N6[15] FDI_CTX_PRX_N7[15]
FDI_CTX_PRX_P0[15] FDI_CTX_PRX_P1[15] FDI_CTX_PRX_P2[15] FDI_CTX_PRX_P3[15] FDI_CTX_PRX_P4[15] FDI_CTX_PRX_P5[15] FDI_CTX_PRX_P6[15] FDI_CTX_PRX_P7[15]
FDI_FSYNC0[15] FDI_FSYNC1[15]
FDI_INT[15]
FDI_LSYNC0[15] FDI_LSYNC1[15]
+1.05VS_VCCIO
+1.05VS_VCCIO
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
PCA70 LA-7521P M/B
0.1
Sandy Bridge_DMI/PEG/FDI
Custom
664Tuesday, April 12, 2011
2010/10/1 2011/11/01
Compal Electronics, Inc.
Typ- suggest 220nF. The change in AC capacitor
value from 100nF to 220nF is to enable
compatibility with future platforms having PCIE
Gen3 (8GT/s)
PEG_ICOMPI and RCOMPO signals should be shorted and routed with
- max length = 500 mils
- typical impedance = 43 m ohm (4 mils/15mils)
PEG_ICOMPO signals should be routed with
- max length = 500 mils
- typical impedance = 14.5 m ohm (12 mils/15mils)
SHORT B4 & C4 TOGETHER, ROUTE AS A SINGLETRACE TO R?
ROUTE B5 TO R? AS A SEPERATE TRACE
Close to CPU
FDI_COMP signals should be shorted
near balls and routed with width
10mils, length<250mils.
Intel confirm
pull high is
correct
7/20 PE_RX[0~3]/PE_RX#[0~3]
PE_TX[0~3]/PE_TX#[0~3] only
use on Server/Workstation.
Leverage LA-6831 and
LA6951(B520) used 1000P
connect to GND to
substitute for 1K ohm PD
resistor.
R50 1K_0402_5%
@
1 2
C25 0.1U_0402_16V7KDIS@
1 2
C16 0.1U_0402_16V7KDIS@
1 2
C30 0.1U_0402_16V7KDIS@
1 2
C27 0.1U_0402_16V7KDIS@
1 2
R47 1K_0402_5%
@
1 2
R45
24.9_0402_1%
12
C34 0.1U_0402_16V7KDIS@
1 2
C38 0.1U_0402_16V7KDIS@
1 2
C7 0.1U_0402_16V7KDIS@
1 2
C8 0.1U_0402_16V7KDIS@
1 2
R49 1K_0402_5%
@
1 2
C36 0.1U_0402_16V7KDIS@
1 2
C11 0.1U_0402_16V7KDIS@
1 2
R51 1K_0402_5%
@
1 2
C21 0.1U_0402_16V7KDIS@
1 2
C13 0.1U_0402_16V7KDIS@
1 2
C20 0.1U_0402_16V7KDIS@
1 2
R46 24.9_0402_1%
1 2
C28 0.1U_0402_16V7KDIS@
1 2
C12 0.1U_0402_16V7KDIS@
1 2
C33 0.1U_0402_16V7KDIS@
1 2
C18 0.1U_0402_16V7KDIS@
1 2
C9 0.1U_0402_16V7KDIS@
1 2
C17 0.1U_0402_16V7KDIS@
1 2
PCI EXPRESS* - GRAPHICS
DMI
Intel(R) FDI
PCI-EXPRESS
JCPU1A
Sandy Bridge_rPGA_Rev1p0
DMI_RX#[0]
W4
DMI_RX#[1]
V4
DMI_RX#[2]
Y4
DMI_RX#[3]
AA5
DMI_RX[0]
W5
DMI_RX[1]
V3
DMI_RX[2]
Y3
DMI_RX[3]
AA4
DMI_TX#[0]
V6
DMI_TX#[1]
W8
DMI_TX#[2]
Y7
DMI_TX#[3]
AA8
DMI_TX[0]
V7
DMI_TX[1]
W7
DMI_TX[3]
AA7 DMI_TX[2]
Y6
FDI_TX#[0]
AC7
FDI_TX#[1]
AC3
FDI_TX#[2]
AD1
FDI_TX#[3]
AD3
FDI_TX#[4]
AD6
FDI_TX#[5]
AE8
FDI_TX#[6]
AF2
FDI_TX#[7]
AG1
FDI_TX[0]
AC8
FDI_TX[1]
AC2
FDI_TX[2]
AD2
FDI_TX[3]
AD4
FDI_TX[4]
AD7
FDI_TX[5]
AE7
FDI_TX[6]
AF3
FDI_TX[7]
AG2
FDI_FSYNC[0]
AC5
FDI_FSYNC[1]
AE5
FDI_INT
AG3
FDI_LSYNC[0]
AC4
FDI_LSYNC[1]
AE4
PEG_COMPI B4
PEG_ICOMPO B5
PEG_RCOMPO C4
PEG_RX#[0] B12
PEG_RX#[1] D11
PEG_RX#[2] C9
PEG_RX#[3] E9
PEG_RX#[4] B7
PEG_RX#[5] C5
PEG_RX#[6] A6
PEG_RX#[7] E1
PEG_RX#[8] F3
PEG_RX#[9] G1
PEG_RX#[10] H4
PEG_RX#[11] J2
PEG_RX#[12] K4
PEG_RX#[13] L2
PEG_RX#[14] M4
PEG_RX#[15] N2
PEG_RX[0] B11
PEG_RX[1] D12
PEG_RX[2] C10
PEG_RX[3] E10
PEG_RX[4] B8
PEG_RX[5] C6
PEG_RX[6] A5
PEG_RX[7] E2
PEG_RX[8] F4
PEG_RX[9] G2
PEG_RX[10] H3
PEG_RX[11] J1
PEG_RX[12] K3
PEG_RX[13] L1
PEG_RX[14] M3
PEG_RX[15] N1
PEG_TX#[0] C14
PEG_TX#[1] E13
PEG_TX#[2] G13
PEG_TX#[3] F11
PEG_TX#[4] J13
PEG_TX#[5] D7
PEG_TX#[6] C3
PEG_TX#[7] E5
PEG_TX#[8] F7
PEG_TX#[9] G9
PEG_TX#[10] G6
PEG_TX#[11] K8
PEG_TX#[12] J6
PEG_TX#[13] M7
PEG_TX#[14] L5
PEG_TX#[15] N6
PEG_TX[0] C13
PEG_TX[1] E14
PEG_TX[2] G14
PEG_TX[3] F12
PEG_TX[4] J14
PEG_TX[5] D8
PEG_TX[6] D3
PEG_TX[7] E6
PEG_TX[8] F8
PEG_TX[9] G10
PEG_TX[10] G5
PEG_TX[11] K7
PEG_TX[12] J5
PEG_TX[13] M8
PEG_TX[14] L6
PEG_TX[15] N5
PE_RX[3]
U2
PE_RX#[0]
P4
PE_TX[0]
P8
PE_TX[1]
T7
PE_TX[2]
R6
PE_TX[3]
U5
PE_TX#[0]
P7
PE_TX#[1]
T8
PE_TX#[2]
R5
PE_TX#[3]
U6
PE_RX[0]
P3
PE_RX[2]
T4 PE_RX[1]
R2
PE_RX#[1]
R1
PE_RX#[2]
T3
PE_RX#[3]
U1
FDI_COMPIO
AE2
FDI_ICOMPO
AE1
C37 0.1U_0402_16V7KDIS@
1 2
C19 0.1U_0402_16V7KDIS@
1 2
R48 1K_0402_5%
@
1 2
C10 0.1U_0402_16V7KDIS@
1 2
C24 0.1U_0402_16V7KDIS@
1 2
C35 0.1U_0402_16V7KDIS@
1 2
C31 0.1U_0402_16V7KDIS@
1 2
C15 0.1U_0402_16V7KDIS@
1 2
C22 0.1U_0402_16V7KDIS@
1 2
C23 0.1U_0402_16V7KDIS@
1 2
C14 0.1U_0402_16V7KDIS@
1 2
C29 0.1U_0402_16V7KDIS@
1 2
C32 0.1U_0402_16V7KDIS@
1 2
C26 0.1U_0402_16V7KDIS@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_DQS2
DDR_A_DQS#0
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
DDR_A_DQS4
DDR_A_DQS#1
DDR_A_DQS#3
DDR_A_DQS#2
DDR_A_DQS#5
DDR_A_DQS#4
DDR_A_DQS#6
DDR_A_DQS#7
DDR_A_MA15
DDRA_SCS0# DDRB_SCS0#
DDRB_SCS1#
DDRA_CLK1# DDRB_CLK1#
DDRB_CLK0#
DDRA_CLK0
DDRA_CKE1 DDRB_CKE1
DDRB_CKE0
DDRA_CLK0#
DDRA_ODT1
DDRA_ODT0 DDRB_ODT0
DDRB_ODT1
DDRA_SCS1#
DDRA_CLK1 DDRB_CLK1
DDR_B_DQS7
DDR_B_DQS0
DDR_B_DQS5
DDR_B_DQS1
DDR_B_DQS4
DDR_B_DQS3
DDR_B_DQS6
DDR_B_DQS2
DDR_B_DQS#1
DDR_B_DQS#5
DDR_B_DQS#7
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#0
DDR_B_DQS#6
DDR_B_DQS#2
DDR_B_MA2
DDR_B_MA3
DDR_B_MA10
DDR_B_MA11
DDR_B_MA8
DDR_B_MA9
DDR_B_MA0
DDR_B_MA1
DDR_B_MA6
DDR_B_MA7
DDR_B_MA4
DDR_B_MA5
DDR_B_MA14
DDR_B_MA12
DDR_B_MA13
DDR_B_D32
DDR_B_D33
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D48
DDR_B_D49
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D50
DDR_B_D51
DDR_B_D56
DDR_B_D57
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
DDR_B_D58
DDR_B_D59
DDR_B_D34
DDR_B_D35
DDR_B_D40
DDR_B_D41
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_MA15
DDR_B_D42
DDR_B_D43
DDR_B_D0
DDR_B_D1
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_WE#
DDR_B_D7
DDR_B_D16
DDR_B_D17
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D18
DDR_B_D19
DDR_B_D24
DDR_B_D25
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D26
DDR_B_D27
DDR_B_D2
DDR_B_D3
DDR_B_D8
DDR_B_D9
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D10
DDR_B_D11
DDR_B_BS2
DDR_B_BS1
DDR_B_BS0
DDRA_CKE0
DDR_B_RAS#
DDR_B_CAS#
DDRB_CLK0
DDR_A_MA14
DDR_A_MA0
DDR_A_MA1
DDR_A_MA4
DDR_A_MA2
DDR_A_MA3
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA12
DDR_A_MA13
DDR_A_MA11
DDR_A_MA10
DDR_A_DQS1
DDR_A_DQS3
DDR_A_DQS0
DDR_A_BS2
DDR_A_BS1
DDR_A_BS0
DDR_A_WE#
DDR_A_RAS#
DDR_A_CAS#
DDR_A_D18
DDR_A_D11
DDR_A_D58
DDR_A_D4
DDR_A_D21
DDR_A_D24
DDR_A_D12
DDR_A_D55
DDR_A_D45
DDR_A_D8
DDR_A_D22
DDR_A_D49
DDR_A_D33
DDR_A_D6
DDR_A_D61
DDR_A_D7
DDR_A_D19
DDR_A_D31
DDR_A_D5
DDR_A_D0
DDR_A_D25
DDR_A_D13
DDR_A_D47
DDR_A_D23
DDR_A_D40
DDR_A_D34
DDR_A_D50
DDR_A_D36
DDR_A_D38
DDR_A_D27
DDR_A_D9
DDR_A_D26
DDR_A_D56
DDR_A_D1
DDR_A_D16
DDR_A_D41
DDR_A_D3
DDR_A_D51
DDR_A_D28
DDR_A_D62
DDR_A_D37
DDR_A_D39
DDR_A_D53
DDR_A_D30
DDR_A_D52
DDR_A_D20
DDR_A_D10
DDR_A_D2
DDR_A_D43
DDR_A_D17
DDR_A_D57
DDR_A_D54
DDR_A_D15
DDR_A_D29
DDR_A_D42
DDR_A_D44
DDR_A_D48
DDR_A_D32
DDR_A_D63
DDR_A_D35
DDR_A_D46
DDR_A_D59
DDR_A_D60
DDR_A_D14
DDRA_CLK0 [11] DDRB_CLK0 [12]
DDRA_CLK1 [11]
DDRA_CLK0# [11]
DDRB_CLK1 [12]
DDRA_CLK1# [11] DDRB_CLK1# [12]
DDRB_CLK0# [12]
DDRA_CKE0 [11] DDRB_CKE0 [12]
DDRA_CKE1 [11]
DDRA_SCS0# [11]
DDRB_CKE1 [12]
DDRA_SCS1# [11] DDRB_SCS1# [12]
DDRB_SCS0# [12]
DDRA_ODT0 [11] DDRB_ODT0 [12]
DDRA_ODT1 [11] DDRB_ODT1 [12]
DDR_B_MA[0..15] [12]
DDR_B_DQS#[0..7] [12]
DDR_B_DQS[0..7] [12]
DDR_B_D[0..63][12]
DDR_A_MA[0..15] [11]
DDR_A_DQS[0..7] [11]
DDR_A_DQS#[0..7] [11]
DDR_A_D[0..63][11]
DDR_A_BS0[11] DDR_A_BS1[11] DDR_A_BS2[11]
DDR_A_CAS#[11] DDR_A_RAS#[11] DDR_A_WE#[11]
DDR_B_BS0[12] DDR_B_BS1[12] DDR_B_BS2[12]
DDR_B_RAS#[12] DDR_B_WE#[12]
DDR_B_CAS#[12]
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
PCA70 LA-7521P M/B
0.1
Sandy Bridge_DDR3
Custom
764Tuesday, April 12, 2011
2010/10/1 2011/11/01
Compal Electronics, Inc.
DDR SYSTEM MEMORY B
JCPU1D
Sandy Bridge_rPGA_Rev1p0
SB_BS[0]
AP23
SB_BS[1]
AM24
SB_BS[2]
AW17
SB_CAS#
AK25
SB_RAS#
AP24
SB_WE#
AR25
SB_CK[0] AL21
SB_CK[1] AL20
SB_CK#[0] AL22
SB_CK#[1] AK20
SB_CKE[0] AU16
SB_CKE[1] AY15
SB_ODT[0] AL26
SB_ODT[1] AP26
SB_DQS[4] AN29
SB_DQS#[4] AN28
SB_DQS[5] AP33
SB_DQS#[5] AR33
SB_DQS[6] AL33
SB_DQS#[6] AM33
SB_DQS[7] AG35
SB_DQS#[7] AG34
SB_DQS[0] AH7
SB_DQS#[0] AH6
SB_DQS[1] AM8
SB_DQS#[1] AL8
SB_DQS[2] AR8
SB_DQS#[2] AP8
SB_DQS[3] AN13
SB_DQS#[3] AN12
SB_MA[0] AK24
SB_MA[1] AM20
SB_MA[2] AM19
SB_MA[3] AK18
SB_MA[4] AP19
SB_MA[5] AP18
SB_MA[6] AM18
SB_MA[7] AL18
SB_MA[8] AN18
SB_MA[9] AY17
SB_MA[10] AN23
SB_MA[11] AU17
SB_MA[12] AT18
SB_MA[13] AR26
SB_MA[14] AY16
SB_MA[15] AV16
SB_DQ[0]
AG7
SB_DQ[1]
AG8
SB_DQ[2]
AJ9
SB_DQ[3]
AJ8
SB_DQ[4]
AG5
SB_DQ[5]
AG6
SB_DQ[6]
AJ6
SB_DQ[7]
AJ7
SB_DQ[8]
AL7
SB_DQ[9]
AM7
SB_DQ[10]
AM10
SB_DQ[11]
AL10
SB_DQ[12]
AL6
SB_DQ[13]
AM6
SB_DQ[14]
AL9
SB_DQ[15]
AM9
SB_DQ[16]
AP7
SB_DQ[17]
AR7
SB_DQ[18]
AP10
SB_DQ[19]
AR10
SB_DQ[20]
AP6
SB_DQ[21]
AR6
SB_DQ[22]
AP9
SB_DQ[23]
AR9
SB_DQ[24]
AM12
SB_DQ[25]
AM13
SB_DQ[26]
AR13
SB_DQ[27]
AP13
SB_DQ[28]
AL12
SB_DQ[29]
AL13
SB_DQ[30]
AR12
SB_DQ[31]
AP12
SB_DQ[32]
AR28
SB_DQ[33]
AR29
SB_DQ[34]
AL28
SB_DQ[35]
AL29
SB_DQ[36]
AP28
SB_DQ[37]
AP29
SB_DQ[38]
AM28
SB_DQ[39]
AM29
SB_DQ[40]
AP32
SB_DQ[41]
AP31
SB_DQ[42]
AP35
SB_DQ[43]
AP34
SB_DQ[44]
AR32
SB_DQ[45]
AR31
SB_DQ[46]
AR35
SB_DQ[47]
AR34
SB_DQ[48]
AM32
SB_DQ[49]
AM31
SB_DQ[50]
AL35
SB_DQ[51]
AL32
SB_DQ[52]
AM34
SB_DQ[53]
AL31
SB_DQ[54]
AM35
SB_DQ[55]
AL34
SB_DQ[56]
AH35
SB_DQ[57]
AH34
SB_DQ[58]
AE34
SB_DQ[59]
AE35
SB_DQ[60]
AJ35
SB_DQ[61]
AJ34
SB_DQ[62]
AF33
SB_DQ[63]
AF35
SB_CK[2] AL23
SB_CK#[2] AM22
SB_CKE[2] AW15
SB_CK[3] AP21
SB_CK#[3] AN21
SB_CKE[3] AV15
SB_CS#[0] AN25
SB_CS#[1] AN26
SB_CS#[2] AL25
SB_CS#[3] AT26
SB_ODT[2] AM26
SB_ODT[3] AK26
SB_ECC_CB[0] AL16
SB_ECC_CB[1] AM16
SB_ECC_CB[2] AP16
SB_ECC_CB[3] AR16
SB_ECC_CB[4] AL15
SB_ECC_CB[5] AM15
SB_ECC_CB[6] AR15
SB_ECC_CB[7] AP15
SB_DQS[8] AN16
SB_DQS#[8] AN15
DDR SYSTEM MEMORY A
JCPU1C
Sandy Bridge_rPGA_Rev1p0
SA_BS[0]
AY29
SA_BS[1]
AW28
SA_BS[2]
AV20
SA_CAS#
AV30
SA_RAS#
AU28
SA_WE#
AW29
SA_CK[0] AY25
SA_CK[1] AU24
SA_CK#[0] AW25
SA_CK#[1] AU25
SA_CKE[0] AV19
SA_CKE[1] AT19
SA_CS#[0] AU29
SA_CS#[1] AV32
SA_ODT[0] AV31
SA_ODT[1] AU32
SA_DQS[0] AK3
SA_DQS#[0] AK2
SA_DQS[1] AP3
SA_DQS#[1] AP2
SA_DQS[2] AW4
SA_DQS#[2] AV4
SA_DQS[3] AV8
SA_DQS#[3] AW8
SA_DQS[4] AV37
SA_DQS#[4] AV36
SA_DQS[5] AP38
SA_DQS#[5] AP39
SA_DQS[6] AK38
SA_DQS#[6] AK39
SA_DQS[7] AF38
SA_DQS#[7] AF39
SA_MA[0] AV27
SA_MA[1] AY24
SA_MA[2] AW24
SA_MA[3] AW23
SA_MA[4] AV23
SA_MA[5] AT24
SA_MA[6] AT23
SA_MA[7] AU22
SA_MA[8] AV22
SA_MA[9] AT22
SA_MA[10] AV28
SA_MA[11] AU21
SA_MA[12] AT21
SA_MA[13] AW32
SA_MA[14] AU20
SA_MA[15] AT20
SA_DQ[0]
AJ3
SA_DQ[1]
AJ4
SA_DQ[2]
AL3
SA_DQ[3]
AL4
SA_DQ[4]
AJ2
SA_DQ[5]
AJ1
SA_DQ[6]
AL2
SA_DQ[7]
AL1
SA_DQ[8]
AN1
SA_DQ[9]
AN4
SA_DQ[10]
AR3
SA_DQ[11]
AR4
SA_DQ[12]
AN2
SA_DQ[13]
AN3
SA_DQ[14]
AR2
SA_DQ[15]
AR1
SA_DQ[16]
AV2
SA_DQ[17]
AW3
SA_DQ[18]
AV5
SA_DQ[19]
AW5
SA_DQ[20]
AU2
SA_DQ[21]
AU3
SA_DQ[22]
AU5
SA_DQ[23]
AY5
SA_DQ[24]
AY7
SA_DQ[25]
AU7
SA_DQ[26]
AV9
SA_DQ[27]
AU9
SA_DQ[28]
AV7
SA_DQ[29]
AW7
SA_DQ[30]
AW9
SA_DQ[31]
AY9
SA_DQ[32]
AU35
SA_DQ[33]
AW37
SA_DQ[34]
AU39
SA_DQ[35]
AU36
SA_DQ[36]
AW35
SA_DQ[37]
AY36
SA_DQ[38]
AU38
SA_DQ[39]
AU37
SA_DQ[40]
AR40
SA_DQ[41]
AR37
SA_DQ[42]
AN38
SA_DQ[43]
AN37
SA_DQ[44]
AR39
SA_DQ[45]
AR38
SA_DQ[46]
AN39
SA_DQ[47]
AN40
SA_DQ[48]
AL40
SA_DQ[49]
AL37
SA_DQ[50]
AJ38
SA_DQ[51]
AJ37
SA_DQ[52]
AL39
SA_DQ[53]
AL38
SA_DQ[54]
AJ39
SA_DQ[55]
AJ40
SA_DQ[56]
AG40
SA_DQ[57]
AG37
SA_DQ[58]
AE38
SA_DQ[59]
AE37
SA_DQ[60]
AG39
SA_DQ[61]
AG38
SA_DQ[62]
AE39
SA_DQ[63]
AE40
SA_CK[2] AW27
SA_CK#[2] AY27
SA_CK[3] AV26
SA_CK#[3] AW26
SA_CKE[2] AU18
SA_CKE[3] AV18
SA_CS#[2] AW30
SA_CS#[3] AU33
SA_ODT[2] AU30
SA_ODT[3] AW33
SA_DQS#[8] AV12
SA_DQS[8] AV13
SA_ECC_CB[0] AU12
SA_ECC_CB[1] AU14
SA_ECC_CB[2] AW13
SA_ECC_CB[3] AY13
SA_ECC_CB[4] AU13
SA_ECC_CB[5] AU11
SA_ECC_CB[6] AY12
SA_ECC_CB[7] AW12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_CPU_SVIDALRT#
VCCIO_SENSE
VR_SVID_DAT_R
VR_SVID_CLK_R
VR_SVID_DAT [58]
VR_SVID_CLK [58]
VR_SVID_ALRT# [58]
VCCSENSE [58]
VSSSENSE [58]
VCCIO_SENSE [54]
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
+1.05VS_VCCIO
+1.05VS_VCCIO
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
PCA70 LA-7521P M/B
0.1
Sandy Bridge_POWER-1
Custom
864Tuesday, April 12, 2011
2010/10/1 2011/11/01
Compal Electronics, Inc.
76A (Quad Core 65W) 8.5A
Bottom Socket Edge
14 pcs in TOP and 4pcs in BOT Socket Cavity
VSS_SENSE_VCCIO
+CPU_CORE Decoupling:
5X 560U (4m ohm), 2X330U, 18X 22U
TOP Socket Cavity
Pull high resistor close to CPU
SVID signal 50 ohm impedance
spacing >12mil length 3-6"
HR's R52=130 ohm
SB CRB suggst 110ohm
TOP Socket Edge
+1.05VS_VCCP Decoupling:
3X 560U (6m ohm), 9X 22U
C68
22U_0805_6.3V6M
1
2
C41
22U_0805_6.3V6M
1
2
+
C55
330U_D2_2V_Y
@
1
2
+
C51
560U_2.5V_M
1
2
POWER
CORE SUPPLY
PEG AND DDR
SENSE LINES SVID
JCPU1F
Sandy Bridge_rPGA_Rev1p0
VCC_SENSE A36
VSS_SENSE B36
VIDALERT# A37
VIDSCLK C37
VIDSOUT B37
VSSIO_SENSE AB3
VCC1
A12
VCC2
A13
VCC3
A14
VCC4
A15
VCC5
A16
VCC6
A18
VCC7
A24
VCC8
A25
VCC9
A27
VCC10
A28
VCC11
B15
VCC12
B16
VCC13
B18
VCC14
B24
VCC15
B25
VCC16
B27
VCC17
B28
VCC18
B30
VCC19
B31
VCC20
B33
VCC21
B34
VCC22
C15
VCC23
C16
VCC24
C18
VCC25
C19
VCC26
C21
VCC27
C22
VCC28
C24
VCC29
C25
VCC30
C27
VCC31
C28
VCC32
C30
VCC33
C31
VCC34
C33
VCC35
C34
VCC36
C36
VCC37
D13
VCC38
D14
VCC39
D15
VCC40
D16
VCC41
D18
VCC42
D19
VCC43
D21
VCC44
D22
VCC45
D24
VCC46
D25
VCC47
D27
VCC48
D28
VCC49
D30
VCC50
D31
VCC51
D33
VCC52
D34
VCC53
D35
VCC54
D36
VCC55
E15
VCC56
E16
VCC57
E18
VCC58
E19
VCC59
E21
VCC60
E22
VCC61
E24
VCC62
E25
VCC63
E27
VCC64
E28
VCC65
E30
VCC66
E31
VCC67
E33
VCC68
E34
VCC69
E35
VCC70
F15
VCC71
F16
VCC72
F18
VCC73
F19
VCC74
F21
VCC75
F22
VCC76
F24
VCC77
F25
VCC78
F27
VCC79
F28
VCC80
F30
VCC81
F31
VCC82
F32
VCC83
F33
VCC84
F34
VCC85
G15
VCC86
G16
VCC87
G18
VCC88
G19
VCC89
G21
VCC90
G22
VCC91
G24
VCC92
G25
VCC93
G27
VCC94
G28
VCC95
G30
VCC96
G31
VCC97
G32
VCC98
G33
VCC99
H13
VCC100
H14
VCCIO1 A11
VCCIO12 AK15
VCCIO18 AK29
VCCIO19 AK30
VCCIO20 B9
VCCIO21 D10
VCCIO22 D6
VCCIO23 E3
VCCIO24 E4
VCCIO2 A7
VCCIO3 AA3
VCCIO4 AB8
VCCIO5 AF8
VCCIO6 AG33
VCCIO7 AJ16
VCCIO8 AJ17
VCCIO9 AJ26
VCCIO10 AJ28
VCCIO11 AJ32
VCCIO13 AK17
VCCIO14 AK19
VCCIO15 AK21
VCCIO16 AK23
VCCIO17 AK27
VCCIO25 G3
VCCIO32 L4
VCCIO33 L7
VCCIO34 M13
VCCIO35 N3
VCCIO36 N4
VCCIO37 N7
VCCIO38 R3
VCCIO39 R4
VCCIO26 G4
VCCIO27 J3
VCCIO28 J4
VCCIO29 J7
VCCIO30 J8
VCCIO31 L3
VCCIO_SENSE AB4
VCCIO40 R7
VCCIO41 U3
VCCIO42 U4
VCCIO43 U7
VCCIO44 V8
VCCIO45 W3
VCC112
H31
VCC101
H15
VCC102
H16
VCC103
H18
VCC104
H19
VCC105
H21
VCC106
H22
VCC107
H24
VCC108
H25
VCC109
H27
VCC110
H28
VCC111
H30
VCC121 J24
VCC122 J25
VCC123 J27
VCC124 J28
VCC125 J30
VCC126 K15
VCC127 K16
VCC128 K18
VCC129 K19
VCC131 K22
VCC132 K24
VCC133 K25
VCC134 K27
VCC135 K28
VCC136 K30
VCC137 L13
VCC138 L14
VCC139 L15
VCC140 L16
VCC141 L18
VCC142 L19
VCC143 L21
VCC144 L22
VCC145 L24
VCC146 L25
VCC147 L27
VCC148 L28
VCC149 L30
VCC150 M14
VCC151 M15
VCC152 M16
VCC153 M18
VCC154 M19
VCC155 M21
VCC156 M22
VCC157 M24
VCC158 M25
VCC159 M27
VCC160 M28
VCC161 M30
VCC119
J21 VCC118
J19 VCC117
J18 VCC116
J16 VCC115
J15 VCC114
J12 VCC113
H32
VCC120
J22
VCC130 K21
+
C56
330U_D2_2V_Y
@
1
2
R52
110_0402_5%
12
C75
22U_0805_6.3V6M
1
2
C39
22U_0805_6.3V6M
1
2
C63
22U_0805_6.3V6M
1
2
R1037 0_0402_5%
1 2
C70
22U_0805_6.3V6M
1
2
+
C53
560U_2.5V_M
1
2
R1038 0_0402_5%
1 2
C72
22U_0805_6.3V6M
1
2
C46
22U_0805_6.3V6M
1
2
C44
22U_0805_6.3V6M
1
2
C61
22U_0805_6.3V6M
1
2
C47
22U_0805_6.3V6M
1
2
C62
22U_0805_6.3V6M
1
2
C43
22U_0805_6.3V6M
1
2
C76
22U_0805_6.3V6M
1
2
R54
75_0402_5%
12
+
C48
560U_2.5V_M
1
2
C77
22U_0805_6.3V6M
1
2
C71
22U_0805_6.3V6M
1
2
C60
22U_0805_6.3V6M
1
2
+
C52
560U_2.5V_M
1
2
R55 43_0402_1%
1 2
+
C58
330U_D2_2VM_R6M
1
2 3
C45
22U_0805_6.3V6M
1
2
C73
22U_0805_6.3V6M
1
2
R53
90.9_0402_1%
@
12
C69
22U_0805_6.3V6M
1
2
+
C49
560U_2.5V_M
1
2
C66
22U_0805_6.3V6M
1
2
C64
22U_0805_6.3V6M
1
2
C40
22U_0805_6.3V6M
1
2
C42
22U_0805_6.3V6M
1
2
+
C59
560U_2.5V_M
1
2
C65
22U_0805_6.3V6M
1
2
+
C50
560U_2.5V_M
1
2
C67
22U_0805_6.3V6M
1
2
C74
22U_0805_6.3V6M
1
2
R56
100_0402_1%
12
+
C54
560U_2.5V_M
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+V_SM_VREF
+VREF_DQB_R
+VREF_DQA_R
VCCSA_SENSE [56]
VCC_AXG_SENSE [58]
VSS_AXG_SENSE [58]
VCCSAP_VID1 [56]
+VCCSA
+GFX_CORE
+1.8VS
+VREF_DQA
+VREF_DQB
+1.5V
+1.5V
+1.8VS_VCCPLL
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
PCA70 LA-7521P M/B
0.1
Sandy Bridge_POWER-2
Custom
964Tuesday, April 12, 2011
2010/10/1 2011/11/01
Compal Electronics, Inc.
+V_SM_VREF should
have 20 mil trace width
4.75A
35A
8.8A
Bottom
Socket
Edge
Bottom Socket Edge
Top Socket Cavity
1.5A
TOP Socket Cavity
+VCCSAVCCSA_VID1
0
1
0.925 V
0.85 V
+GFX_CORE Decoupling:
2X 470U (4m ohm), 12X 22U
+VCCSA Decoupling:
1X 560U, 2X 10U
+1.5V Decoupling:
3X 330U , 9X 22U
VCCPLL Decoupling:
1X 220U, 2X 10U (Default)
R66,R67 should place close to DIMM for
minimum stubs trace
Top Socket Edge
C90
22U_0805_6.3V6M
1
2
C86
0.1U_0402_16V4Z
1
2
C106
10U_0805_10V6K
1
2
C84
22U_0805_6.3V6M
UMA@1
2
C95
22U_0805_6.3V6M
1
2
C102
10U_0805_10V6K
1
2
C94
22U_0805_6.3V6M
1
2
R66 0_0402_5%
1 2
C108 0.1U_0402_16V4Z
1
2
+
C89
330U_D2_2VM_R6M
@
1
2
R62
100_0402_1%
12
+
C88
330U_D2_2VM_R6M
1
2
R65 0_0805_5%
12
+
C80
330U_D2_2VM_R6M
@
1
2
C107
10U_0805_10V6K
@
1
2
C85
22U_0805_6.3V6M
UMA@1
2
C98
22U_0805_6.3V6M
@
1
2
C100
22U_0805_6.3V6M
UMA@1
2
C97
22U_0805_6.3V6M
@
1
2
POWER
GRAPHICS
SENSE
LINES
1.8V RAIL
SA RAIL
VREFMISC DDR3 -1.5V RAILS
JCPU1G
Sandy Bridge_rPGA_Rev1p0
SM_VREF AJ22
VSSAXG_SENSE M32
VCCAXG1
AB33
VCCAXG2
AB34
VCCAXG3
AB35
VCCAXG4
AB36
VCCAXG5
AB37
VCCAXG6
AB38
VCCAXG7
AB39
VCCAXG8
AB40
VCCAXG9
AC33
VCCAXG10
AC34
VCCAXG11
AC35
VCCAXG12
AC36
VCCAXG13
AC37
VCCAXG14
AC38
VCCAXG15
AC39
VCCAXG16
AC40
VCCAXG17
T33
VCCAXG18
T34
VCCAXG19
T35
VCCAXG20
T36
VCCAXG21
T37
VCCAXG22
T38
VCCAXG23
T39
VCCAXG24
T40
VCCAXG25
U33
VCCAXG26
U34
VCCAXG27
U35
VCCAXG28
U36
VCCAXG29
U37
VCCAXG30
U38
VCCAXG31
U39
VCCAXG32
U40
VCCAXG33
W33
VCCAXG34
W34
VCCAXG35
W35
VCCAXG36
W36
VCCAXG37
W37
VCCAXG38
W38
VCCAXG39
Y33
VCCAXG40
Y34
VCCAXG41
Y35
VCCAXG42
Y36
VCCAXG43
Y37
VCCAXG44
Y38
VDDQ11 AU19
VDDQ12 AU23
VDDQ13 AU27
VDDQ14 AU31
VDDQ15 AV21
VDDQ1 AJ13
VDDQ2 AJ14
VDDQ3 AJ20
VDDQ4 AJ23
VDDQ5 AJ24
VDDQ6 AR20
VDDQ7 AR21
VDDQ8 AR22
VDDQ9 AR23
VDDQ10 AR24
VCCPLL1
AK11
VCCPLL2
AK12
VCCSA1 H10
VCCSA2 H11
VCCSA3 H12
VCCSA4 J10
VCCSA5 K10
VCCSA6 K11
VCCSA7 L11
VCCSA8 L12
VCCSA_SENSE T2
FC_AH4 AH4
FC_AH1 AH1
VCCAXG_SENSE L32
VDDQ16 AV24
VDDQ17 AV25
VDDQ18 AV29
VDDQ19 AV33
VDDQ20 AW31
VDDQ21 AY23
VDDQ22 AY26
VDDQ23 AY28
VCCSA9 M10
VCCSA10 M11
VCCSA11 M12
VCCSA_VID P34
C101
10U_0805_10V6K
1
2
C83
22U_0805_6.3V6M
UMA@
1
2
C109 0.1U_0402_16V4Z
1
2
R61
100_0402_1%
12
C91
22U_0805_6.3V6M
1
2
C92
22U_0805_6.3V6M
1
2
+
C81
560U_2.5V_M
UMA@
1
2
+
C79
560U_2.5V_M
UMA@
1
2
C99
22U_0805_6.3V6M
UMA@1
2
C82
22U_0805_6.3V6M
UMA@
1
2
C103
10U_0805_10V6K
@
1
2
+
C105
220U_6.3V_M
1
2
C93
22U_0805_6.3V6M
1
2
C96
22U_0805_6.3V6M
@
1
2
+
C104
560U_2.5V_M
1
2
+
C1588
330U_D2_2VM_R6M
UMA@
1
2
+
C78
330U_D2_2VM_R6M
@
1
2
+
C87
330U_D2_2VM_R6M
1
2
R67 0_0402_5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CFG13
CFG11
CFG10
CFG1
CFG12
CFG17
CFG16
CFG15
CFG14
CFG5
CFG4
CFG3
CFG0
CFG2
CFG9
CFG8
CFG7
CFG6 CFG5
CFG3
CFG2
CFG6
VCCIO_SEL [54]
+5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
PCA70 LA-7521P M/B
0.1
Sandy Bridge_GND/RSVD/CFG
Custom
10 64Tuesday, April 12, 2011
2010/10/1 2011/11/01
Compal Electronics, Inc.
10: 2x8 PCI Express
PCIE Port Bifurcation Straps
CFG[6:5]
11: 1x16 PCI Express (Default)
CFG Straps for Processor
00: 1 x 8, 2 x 4 : PCI Express
01: Reserved
PEG Static x16 Lane Numbering Reversal.
1: Normal Operation
0:Lane numbers Reversed
CFG2
*
*
PEG Static x4 Lane Numbering Reversal.
1: Normal Operation
CFG3
*
0:Lane numbers Reversed
(CFG[17:0] internal pull high to VCCIO)
1.00V
VCCIO_SEL
0
1
VCCIO
1.05V
Reserve for PW
T19 PAD
T25 PAD
R1664
0_0402_5%
1 2
VSS
JCPU1H
Sandy Bridge_rPGA_Rev1p0
VSS1
A17
VSS2
A23
VSS3
A26
VSS4
A29
VSS5
A35
VSS6
AA33
VSS7
AA34
VSS8
AA35
VSS9
AA36
VSS10
AA37
VSS11
AA38
VSS12
AA6
VSS13
AB5
VSS14
AC1
VSS15
AC6
VSS16
AD33
VSS17
AD36
VSS18
AD38
VSS19
AD39
VSS20
AD40
VSS21
AD5
VSS22
AD8
VSS23
AE3
VSS24
AE33
VSS25
AE36
VSS26
AF1
VSS27
AF34
VSS28
AF36
VSS29
AF37
VSS30
AF40
VSS31
AF5
VSS32
AF6
VSS33
AF7
VSS34
AG36
VSS35
AH2
VSS36
AH3
VSS37
AH33
VSS38
AH36
VSS39
AH37
VSS40
AH38
VSS41
AH39
VSS42
AH40
VSS43
AH5
VSS44
AH8
VSS45
AJ12
VSS46
AJ15
VSS47
AJ18
VSS48
AJ21
VSS49
AJ25
VSS50
AJ27
VSS51
AJ36
VSS52
AJ5
VSS53
AK1
VSS54
AK10
VSS55
AK13
VSS56
AK14
VSS57
AK16
VSS58
AK22
VSS59
AK28
VSS60
AK31
VSS61
AK32
VSS62
AK33
VSS63
AK34
VSS64
AK35
VSS65
AK36
VSS66
AK37
VSS67
AK4
VSS68
AK40
VSS69
AK5
VSS70
AK6
VSS71
AK7
VSS72
AK8
VSS73
AK9
VSS74
AL11
VSS75
AL14
VSS76
AL17
VSS77
AL19
VSS78
AL24
VSS79
AL27
VSS80
AL30
VSS81
AL36
VSS82
AL5
VSS83
AM1
VSS84
AM11
VSS85
AM14
VSS86
AM17
VSS87
AM2
VSS88
AM21
VSS89
AM23
VSS90
AM25
VSS91
AM27
VSS92
AM3
VSS93
AM30
VSS94
AM36
VSS95
AM37
VSS96
AM38
VSS97
AM39
VSS98
AM4
VSS99
AM40
VSS100
AM5
VSS101 AN10
VSS102 AN11
VSS103 AN14
VSS104 AN17
VSS105 AN19
VSS106 AN22
VSS107 AN24
VSS108 AN27
VSS109 AN30
VSS110 AN31
VSS111 AN32
VSS112 AN33
VSS113 AN34
VSS114 AN35
VSS115 AN36
VSS116 AN5
VSS117 AN6
VSS118 AN7
VSS119 AN8
VSS120 AN9
VSS121 AP1
VSS122 AP11
VSS123 AP14
VSS124 AP17
VSS125 AP22
VSS126 AP25
VSS127 AP27
VSS128 AP30
VSS129 AP36
VSS130 AP37
VSS131 AP4
VSS132 AP40
VSS133 AP5
VSS134 AR11
VSS135 AR14
VSS136 AR17
VSS137 AR18
VSS138 AR19
VSS139 AR27
VSS140 AR30
VSS141 AR36
VSS142 AR5
VSS143 AT1
VSS144 AT10
VSS145 AT12
VSS146 AT13
VSS147 AT15
VSS148 AT16
VSS149 AT17
VSS150 AT2
VSS151 AT25
VSS152 AT27
VSS153 AT28
VSS154 AT29
VSS155 AT3
VSS156 AT30
VSS157 AT31
VSS158 AT32
VSS159 AT33
VSS160 AT34
VSS161 AT35
VSS162 AT36
VSS163 AT37
VSS164 AT38
VSS165 AT39
VSS166 AT4
VSS167 AT40
VSS168 AT5
VSS169 AT6
VSS170 AT7
VSS171 AT8
VSS172 AT9
VSS173 AU1
VSS174 AU15
VSS175 AU26
VSS176 AU34
VSS177 AU4
VSS178 AU6
VSS179 AU8
VSS180 AV10
VSS181 AV11
VSS182 AV14
VSS183 AV17
VSS184 AV3
VSS185 AV35
VSS186 AV38
VSS187 AV6
VSS188 AW10
VSS189 AW11
VSS190 AW14
VSS191 AW16
VSS192 AW36
VSS193 AW6
VSS194 AY11
VSS195 AY14
VSS196 AY18
VSS197 AY35
VSS198 AY4
VSS199 AY6
VSS200 AY8
T21 PAD
T26 PAD
T20 PAD
T22 PAD
T23 PAD
T15 PAD
T24 PAD
T16 PAD
VSS
JCPU1I
Sandy Bridge_rPGA_Rev1p0
VSS201
B10
VSS202
B13
VSS203
B14
VSS204
B17
VSS205
B23
VSS206
B26
VSS207
B29
VSS208
B32
VSS209
B35
VSS210
B38
VSS211
B6
VSS212
C11
VSS213
C12
VSS214
C17
VSS215
C20
VSS216
C23
VSS217
C26
VSS218
C29
VSS219
C32
VSS220
C35
VSS221
C7
VSS222
C8
VSS223
D17
VSS224
D2
VSS225
D20
VSS226
D23
VSS227
D26
VSS228
D29
VSS229
D32
VSS230
D37
VSS231
D39
VSS232
D4
VSS233
D5
VSS234
D9
VSS235
E11
VSS236
E12
VSS237
E17
VSS238
E20
VSS239
E23
VSS240
E26
VSS241
E29
VSS242
E32
VSS243
E36
VSS244
E7
VSS245
E8
VSS246
F1
VSS247
F10
VSS248
F13
VSS249
F14
VSS250
F17
VSS251
F2
VSS252
F20
VSS253
F23
VSS254
F26
VSS255
F29
VSS256
F35
VSS257
F37
VSS258
F39
VSS259
F5
VSS260
F6
VSS261
F9
VSS262
G11
VSS263
G12
VSS264
G17
VSS265
G20
VSS266
G23
VSS267
G26
VSS268
G29
VSS269
G34
VSS270
G7
VSS271
G8
VSS272
H1
VSS273
H17
VSS274
H2
VSS275
H20
VSS276
H23
VSS277
H26
VSS278
H29
VSS279
H33
VSS280
H35
VSS281
H37
VSS282
H39
VSS283
H5
VSS284
H6
VSS285
H9
VSS286
J11
VSS287
J17
VSS288
J20
VSS289
J23
VSS290
J26
VSS291
J29
VSS292
J32
VSS293
K1
VSS294
K12
VSS295
K13
VSS296
K14
VSS297
K17
VSS298
K2
VSS299
K20
VSS300
K23
VSS301 K26
VSS302 K29
VSS303 K33
VSS304 K35
VSS305 K37
VSS306 K39
VSS307 K5
VSS308 K6
VSS309 L10
VSS310 L17
VSS311 L20
VSS312 L23
VSS313 L26
VSS314 L29
VSS315 L8
VSS316 M1
VSS317 M17
VSS318 M2
VSS319 M20
VSS320 M23
VSS321 M26
VSS322 M29
VSS323 M33
VSS324 M35
VSS325 M37
VSS326 M39
VSS327 M5
VSS328 M6
VSS329 M9
VSS330 N8
VSS331 P1
VSS332 P2
VSS333 P36
VSS334 P38
VSS335 P40
VSS336 P5
VSS337 P6
VSS338 R33
VSS339 R35
VSS340 R37
VSS341 R39
VSS342 R8
VSS343 T1
VSS344 T5
VSS345 T6
VSS346 U8
VSS347 V1
VSS348 V2
VSS349 V33
VSS350 V34
VSS351 V35
VSS352 V36
VSS353 V37
VSS354 V38
VSS355 V39
VSS356 V40
VSS357 V5
VSS358 W6
VSS359 Y5
VSS360 Y8
VSS_NCTF1 A4
VSS_NCTF2 AV39
VSS_NCTF3 AY37
VSS_NCTF4 B3
T18 PAD
R1576
10K_0402_1%
1 2
R71 1K_0402_1%@1 2
RESERVED
JCPU1E
Sandy Bridge_rPGA_Rev1p0
CFG[0]
H36
CFG[1]
J36
CFG[2]
J37
CFG[3]
K36
CFG[4]
L36
CFG[5]
N35
CFG[6]
L37
CFG[7]
M36
CFG[8]
J38
CFG[9]
L35
CFG[10]
M38
CFG[11]
N36
CFG[12]
N38
CFG[13]
N39
CFG[14]
N37
CFG[15]
N40
CFG[16]
G37
CFG[17]
G36
RSVD26
J9
RSVD36
P35
RSVD46
K31
RSVD_NCTF1 AV1
RSVD_NCTF2 AW2
RSVD_NCTF3 AY3
RSVD_NCTF4 B39
RSVD27
K34
RSVD16
AV34 RSVD15
AU10
RSVD17
AW34
RSVD18
AY10
RSVD20
C39 RSVD19
C38
RSVD22
H7 RSVD21
D38
RSVD23
H8
RSVD24
J33
RSVD6
AG4
RSVD7
AJ11
RSVD8
AJ29
RSVD9
AJ30
RSVD11
AN20
RSVD12
AP20
RSVD13
AT11
RSVD14
AT14
RSVD25
J34
RSVD10
AJ31
RSVD5
AF4
VCCIO_SEL P33
RSVD1
AB6
RSVD2
AB7
RSVD3
AD37
RSVD4
AE6
RSVD28
K9
RSVD29
L31
RSVD30
L33
RSVD31
L34
RSVD32
L9
RSVD33
M34
RSVD34
N33
RSVD35
N34
RSVD37
P37
RSVD38
P39
RSVD39
R34
RSVD40
R36
RSVD41
R38
RSVD42
R40
RSVD43
J31
RSVD44
AD34
RSVD45
AD35
NCTF1 A38
NCTF2 AU40
NCTF3 AW38
NCTF4 C2
NCTF5 D1
R74 1K_0402_1%@1 2
T236PAD
T27 PAD
R1577
5.1K_0402_1%
1 2
R73 1K_0402_1%@1 2
R70 1K_0402_1%
1 2
T17 PAD
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_D3
DDR_A_D18
DDR_A_D27
DDR_A_MA3
DDR_A_D41
DDR_A_D30
DDR_A_MA7
DDR_A_RAS#
DDR_A_D1 DDR_A_D5
DDR_A_DQS0
DDR_A_D12
DDR_A_D24
DDR_A_DQS3
DDR_A_D62
DDR_A_BS2
DDR_A_D43
DDR_A_DQS6
DDR_A_D46
DDR_A_BS0
DDR_A_MA13
DDR_A_D40
DDR_A_D51
DDR_A_D59
DDR_A_D22
DDR_A_D28
DDR_A_BS1
DDR_A_D37
DDR_A_D45
DDR_A_D53
DDR_A_D26
DDR_A_MA5
DDR_A_CAS#
DDR_A_D35
DDR_A_MA15
DDR_A_MA6
DDR_A_MA2
DDR_A_D47
DDR_A_D52
DDR_A_DQS#5
DDR_A_D25
DDR_A_D49
DDR_A_D56
DDR_A_D57
DDR_A_DQS1
DDR_A_D20
DDR_A_MA8
DDR_A_D34
DDR_A_MA4
DDR_A_D60
DDR_A_D32
DDR_A_DQS4
DDR_A_D29
DDR_A_MA14
DDR_A_D38
DDR_A_D61
PM_SMBDATA
DDR_A_D0
DDR_A_D19
DDR_A_MA10
DDR_A_D58
DDR_A_D21
DDR_A_D31
+VREF_DQA
DDR_A_MA1
DDR_A_WE#
DDR_A_D23
DDR_A_D36
DDR_A_D54
PM_SMBCLK
DDR_A_D8 DDR_A_D13
DDR_A_D48
DDR_A_D55
DDR_A_DQS#1
DDR_A_D11
DDR_A_D16
DDR_A_D50
DDR_A_D14
DDR_A_D17
DDR_A_DQS2
DDR_A_D33
DDR_A_DQS#4
DDR_A_DQS#3
DDR_A_MA0
DDR_A_D39
DDR_A_DQS7
DDR_A_D7
DDR_A_D15
DDR_A_DQS#6
DDR_A_D44
DDR_A_DQS5
DDR_A_D63
DDR_A_D9
DDR_A_D4
DDR_A_MA12
DDR_A_D42
DDR_A_D2
DDR_A_D10
DDR_A_DQS#0
DDR_A_D6
DDR_A_DQS#2
DDR_A_MA9
DDR_A_MA11
DDR_A_DQS#7
SM_DRAMRST#
DDRA_CKE0 DDRA_CKE1
DDRA_ODT0
DDRA_ODT1
DDRA_SCS0#
DDRA_SCS1#
DDRA_CLK0# DDRA_CLK1#
DDRA_CLK1DDRA_CLK0
+VREF_CAA
DDR_A_DQS#[0..7][7]
DDR_A_DQS[0..7][7]
DDR_A_D[0..63][7]
DDR_A_MA[0..15][7]
DDRA_CKE1 [7]DDRA_CKE0[7]
DDRA_ODT1 [7]
DDRA_ODT0 [7]
DDRA_SCS0# [7]
DDRA_SCS1#[7]
DDRA_CLK0#[7]
DDRA_CLK1 [7]
DDRA_CLK0[7] DDRA_CLK1# [7]
DDR_A_BS1 [7]
DDR_A_BS2[7]
DDR_A_BS0[7]
DDR_A_WE#[7]DDR_A_CAS#[7]
DDR_A_RAS# [7]
PM_SMBDATA [12,14,40]
PM_SMBCLK [12,14,40]
SM_DRAMRST# [5,12]
+1.5V
+1.5V
+1.5V
+3VS
+0.75VS
+1.5V
+0.75VS
+1.5V +1.5V
+0.75VS
+VREF_DQA
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
PCA70 LA-7521P M/B
0.1
DDRIII-SODIMMA
Custom
11 64Tuesday, April 12, 2011
2010/10/1 2011/11/01
Compal Electronics, Inc.
Layout Note:
Place near JDDRL1.203 and 204
Close to JDDRL.1
Layout Note:
Place near JDDRL1 Layout Note: Place these 4 Caps near
Command and Control signals of JDDRL1
close to JDDRL1.126
CHA SO-DIMM 0(A0)
C115
2.2U_0603_6.3V6K
1
2
C134 10U_0805_6.3V6M
1 2
C147 10U_0805_6.3V6M
1 2
C151 10U_0805_6.3V6M
1 2
C150 0.1U_0402_16V4Z
1 2
C139 1U_0402_6.3V6K
1 2
+
C143 390U_2.5V_M_R10
1 2
C137
2.2U_0603_6.3V6K
1
2
C145 10U_0805_6.3V6M
1 2
C148 0.1U_0402_16V4Z
1 2
R91
1K_0402_1%
1 2
C138
0.1U_0402_16V4Z
1
2
R98
10K_0402_5%
12
C136 1U_0402_6.3V6K
1 2
C153 10U_0805_6.3V6M
1 2
C154
2.2U_0603_6.3V6K
1
2
C144 0.1U_0402_16V4Z
1 2
C135 1U_0402_6.3V6K
1 2
C140 1U_0402_6.3V6K
1 2
C155
0.1U_0402_16V4Z
1
2
C152 10U_0805_6.3V6M
1 2
C146 0.1U_0402_16V4Z
1 2
C149 10U_0805_6.3V6M
1 2
C114
0.1U_0402_16V4Z
1
2
R97 10K_0402_5%
1 2
R94
1K_0402_1%
12
JDDRL2
TYCO_2-2013290-1
CONN@
VREF_DQ
1VSS1 2
VSS2
3DQ4 4
DQ0
5DQ5 6
DQ1
7VSS3 8
VSS4
9DQS#0 10
DM0
11 DQS0 12
VSS5
13 VSS6 14
DQ2
15 DQ6 16
DQ3
17 DQ7 18
VSS7
19 VSS8 20
DQ8
21 DQ12 22
DQ9
23 DQ13 24
VSS9
25 VSS10 26
DQS#1
27 DM1 28
DQS1
29 RESET# 30
VSS11
31 VSS12 32
DQ10
33 DQ14 34
DQ11
35 DQ15 36
VSS13
37 VSS14 38
DQ16
39 DQ20 40
DQ17
41 DQ21 42
VSS15
43 VSS16 44
DQS#2
45 DM2 46
DQS2
47 VSS17 48
VSS18
49 DQ22 50
DQ18
51 DQ23 52
DQ19
53 VSS19 54
VSS20
55 DQ28 56
DQ24
57 DQ29 58
DQ25
59 VSS21 60
VSS22
61 DQS#3 62
DM3
63 DQS3 64
VSS23
65 VSS24 66
DQ26
67 DQ30 68
DQ27
69 DQ31 70
VSS25
71 VSS26 72
A12/BC#
83 A11 84
A9
85 A7 86
VDD5
87 VDD6 88
A8
89 A6 90
CKE0
73 CKE1 74
VDD1
75 VDD2 76
NC1
77 A15 78
BA2
79 A14 80
VDD3
81 VDD4 82
A5
91 A4 92
VDD7
93 VDD8 94
A3
95 A2 96
A1
97 A0 98
VDD9
99 VDD10 100
CK0
101 CK1 102
CK0#
103 CK1# 104
VDD11
105 VDD12 106
A10/AP
107 BA1 108
BA0
109 RAS# 110
VDD13
111 VDD14 112
WE#
113 S0# 114
CAS#
115 ODT0 116
VDD15
117 VDD16 118
A13
119 ODT1 120
S1#
121 NC2 122
VDD17
123 VDD18 124
NCTEST
125 VREF_CA 126
VSS27
127 VSS28 128
DQ32
129 DQ36 130
DQ33
131 DQ37 132
VSS29
133 VSS30 134
DQS#4
135 DM4 136
DQS4
137 VSS31 138
VSS32
139 DQ38 140
DQ34
141 DQ39 142
DQ35
143 VSS33 144
VSS34
145 DQ44 146
DQ40
147 DQ45 148
DQ41
149 VSS35 150
VSS36
151 DQS#5 152
DM5
153 DQS5 154
VSS37
155 VSS38 156
DQ42
157 DQ46 158
DQ43
159 DQ47 160
VSS39
161 VSS40 162
DQ48
163 DQ52 164
DQ49
165 DQ53 166
VSS41
167 VSS42 168
DQS#6
169 DM6 170
DQS6
171 VSS43 172
VSS44
173 DQ54 174
DQ50
175 DQ55 176
DQ51
177 VSS45 178
VSS46
179 DQ60 180
DQ56
181 DQ61 182
DQ57
183 VSS47 184
VSS48
185 DQS#7 186
DM7
187 DQS7 188
VSS49
189 VSS50 190
DQ58
191 DQ62 192
DQ59
193 DQ63 194
VSS51
195 VSS52 196
SA0
197 EVENT# 198
VDDSPD
199 SDA 200
SA1
201 SCL 202
VTT1
203 VTT2 204
G1
205 G2 206
R96
1K_0402_1%
12
R93
1K_0402_1%
12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
DDR_B_D26
DDR_B_D25
DDR_B_D37
DDR_B_DQS#6
DDR_B_D43
DDR_B_MA12
DDR_B_D8
PM_SMBCLK
DDR_B_D1
DDR_B_BS1
DDR_B_D48
DDR_B_DQS#0
DDR_B_D15
DDR_B_D30
DDR_B_D38
DDR_B_D52
DDR_B_D53
DDR_B_D20
DDR_B_D17
DDR_B_BS2
DDR_B_MA6
DDR_B_D23
DDR_B_D9
DDR_B_D47
DDR_B_MA10
DDR_B_MA15
DDR_B_D18
DDR_B_DQS#3
DDR_B_D46
DDR_B_D16
DDR_B_DQS#4
DDR_B_D35
DDR_B_D56
DDR_B_MA4
DDR_B_MA11
DDR_B_D29
DDR_B_D13
DDR_B_D0
DDR_B_D41
DDR_B_D21
DDR_B_MA7
DDR_B_D63
DDR_B_D32
DDR_B_D19
SM_DRAMRST#
DDR_B_DQS#1
DDR_B_MA3
DDR_B_D24
DDR_B_CAS#
DDR_B_MA8
DDR_B_MA14
DDR_B_DQS3
DDR_B_D57 DDR_B_DQS#7
DDR_B_D45
DDR_B_D44
DDR_B_BS0
DDR_B_D49
DDR_B_MA13
DDR_B_MA9
DDR_B_D2
DDR_B_DQS0
DDR_B_D61
DDR_B_D11
DDR_B_D36
DDR_B_MA1 DDR_B_MA2
DDR_B_D31
DDR_B_DQS5
DDR_B_DQS7
DDR_B_D3
DDR_B_D4
DDR_B_D6
DDR_B_D5
DDR_B_D34
DDR_B_MA5
DDR_B_MA0
DDR_B_D28
DDR_B_D58 DDR_B_D62
DDR_B_DQS6
DDR_B_D42
DDR_B_DQS#5
DDR_B_D39
DDR_B_D60
DDR_B_DQS1
DDR_B_D10
DDR_B_D40
DDR_B_D12
DDR_B_D22
DDR_B_DQS2
DDR_B_DQS#2
DDR_B_D7
DDR_B_RAS#
DDR_B_DQS4
PM_SMBDATA
DDR_B_D14
DDR_B_D33
DDR_B_D59
DDR_B_D27
DDR_B_WE#
DDR_B_D50
DDR_B_D55
DDR_B_D54 DDR_B_D51
DDRB_CKE1DDRB_CKE0
DDRB_ODT0
DDRB_ODT1
DDRB_SCS0#
DDRB_SCS1#
DDRB_CLK0# DDRB_CLK1#
DDRB_CLK0 DDRB_CLK1
+VREF_CAB
DDR_B_DQS#[0..7][7]
DDR_B_DQS[0..7][7]
DDR_B_D[0..63][7]
DDR_B_MA[0..15][7]
DDRB_CKE1 [7]DDRB_CKE0[7]
DDRB_ODT1 [7]
DDRB_ODT0 [7]
DDRB_SCS1#[7]
DDRB_SCS0# [7]
DDRB_CLK1# [7]
DDRB_CLK0#[7] DDRB_CLK0[7] DDRB_CLK1 [7]
DDR_B_WE#[7]
DDR_B_BS1 [7]
DDR_B_BS2[7]
DDR_B_BS0[7] DDR_B_RAS# [7]
DDR_B_CAS#[7]
PM_SMBDATA [11,14,40]
PM_SMBCLK [11,14,40]
SM_DRAMRST# [5,11]
+1.5V
+1.5V
+1.5V
+0.75VS
+1.5V
+1.5V
+3VS
+1.5V+VREF_DQB
+0.75VS +0.75VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
PCA70 LA-7521P M/B
0.1
DDRIII-SODIMM B
Custom
12 64Tuesday, April 12, 2011
2010/10/1 2011/11/01
Compal Electronics, Inc.
Layout Note: Place these 4 Caps near
Command and Control signals of JDDRL2
Layout Note:
Place near JDDRL2
Layout Note:
Place near JDDRL2.203 and 204
Close to JDDRL2.1
Close to JDDRL2.126
CHB SO-DIMM 0(A4)
C197 10U_0805_6.3V6M
1 2
C184 1U_0402_6.3V6K
1 2
R108
10K_0402_5%
1 2
C198
2.2U_0603_6.3V6K
1
2
C194 0.1U_0402_16V4Z
1 2
C159
0.1U_0402_16V4Z
1
2
C195 10U_0805_6.3V6M
1 2
C193 10U_0805_6.3V6M
1 2
C199
0.1U_0402_16V4Z
1
2
C191 10U_0805_6.3V6M
1 2
C180
2.2U_0603_6.3V6K
1
2
JDDRH1
TYCO_2-2013311-1
@
VREF_DQ
1VSS1 2
VSS2
3DQ4 4
DQ0
5DQ5 6
DQ1
7VSS3 8
VSS4
9DQS#0 10
DM0
11 DQS0 12
VSS5
13 VSS6 14
DQ2
15 DQ6 16
DQ3
17 DQ7 18
VSS7
19 VSS8 20
DQ8
21 DQ12 22
DQ9
23 DQ13 24
VSS9
25 VSS10 26
DQS#1
27 DM1 28
DQS1
29 RESET# 30
VSS11
31 VSS12 32
DQ10
33 DQ14 34
DQ11
35 DQ15 36
VSS13
37 VSS14 38
DQ16
39 DQ20 40
DQ17
41 DQ21 42
VSS15
43 VSS16 44
DQS#2
45 DM2 46
DQS2
47 VSS17 48
VSS18
49 DQ22 50
DQ18
51 DQ23 52
DQ19
53 VSS19 54
VSS20
55 DQ28 56
DQ24
57 DQ29 58
DQ25
59 VSS21 60
VSS22
61 DQS#3 62
DM3
63 DQS3 64
VSS23
65 VSS24 66
DQ26
67 DQ30 68
DQ27
69 DQ31 70
VSS25
71 VSS26 72
A12/BC#
83 A11 84
A9
85 A7 86
VDD5
87 VDD6 88
A8
89 A6 90
CKE0
73 CKE1 74
VDD1
75 VDD2 76
NC1
77 A15 78
BA2
79 A14 80
VDD3
81 VDD4 82
A5
91 A4 92
VDD7
93 VDD8 94
A3
95 A2 96
A1
97 A0 98
VDD9
99 VDD10 100
CK0
101 CK1 102
CK0#
103 CK1# 104
VDD11
105 VDD12 106
A10/AP
107 BA1 108
BA0
109 RAS# 110
VDD13
111 VDD14 112
WE#
113 S0# 114
CAS#
115 ODT0 116
VDD15
117 VDD16 118
A13
119 ODT1 120
S1#
121 NC2 122
VDD17
123 VDD18 124
NCTEST
125 VREF_CA 126
VSS27
127 VSS28 128
DQ32
129 DQ36 130
DQ33
131 DQ37 132
VSS29
133 VSS30 134
DQS#4
135 DM4 136
DQS4
137 VSS31 138
VSS32
139 DQ38 140
DQ34
141 DQ39 142
DQ35
143 VSS33 144
VSS34
145 DQ44 146
DQ40
147 DQ45 148
DQ41
149 VSS35 150
VSS36
151 DQS#5 152
DM5
153 DQS5 154
VSS37
155 VSS38 156
DQ42
157 DQ46 158
DQ43
159 DQ47 160
VSS39
161 VSS40 162
DQ48
163 DQ52 164
DQ49
165 DQ53 166
VSS41
167 VSS42 168
DQS#6
169 DM6 170
DQS6
171 VSS43 172
VSS44
173 DQ54 174
DQ50
175 DQ55 176
DQ51
177 VSS45 178
VSS46
179 DQ60 180
DQ56
181 DQ61 182
DQ57
183 VSS47 184
VSS48
185 DQS#7 186
DM7
187 DQS7 188
VSS49
189 VSS50 190
DQ58
191 DQ62 192
DQ59
193 DQ63 194
VSS51
195 VSS52 196
SA0
197 EVENT# 198
VDDSPD
199 SDA 200
SA1
201 SCL 202
VTT1
203 VTT2 204
G1
205 G2 206
C183 1U_0402_6.3V6K
1 2
C196 10U_0805_6.3V6M
1 2
C178 10U_0805_6.3V6M
1 2
C158
2.2U_0603_6.3V6K
1
2
C192 0.1U_0402_16V4Z
1 2
C189 10U_0805_6.3V6M
1 2
R103
1K_0402_1%
12
C179 1U_0402_6.3V6K
1 2
R101
1K_0402_1%
1 2
+
C187 390U_2.5V_M_R10
1 2
C188 0.1U_0402_16V4Z
1 2
C182 1U_0402_6.3V6K
1 2
C181
0.1U_0402_16V4Z
1
2
R106
1K_0402_1%
12
R107 10K_0402_5%
1 2
R104
1K_0402_1%
12
C190 0.1U_0402_16V4Z
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SATA_PTX_DRX_N0
SATA_PTX_DRX_P0
SATA_PRX_C_DTX_P0
SATA_PRX_C_DTX_N0
SM_INTRUDER#
RBIAS_SATA3
SATA3_COMP
PCH_SPIDI
PCH_SPIDO
PCH_SPICS#
LPC_AD0
LPC_AD1
LPC_AD2
SATA_LED#
LPC_AD3
LPC_FRAME#
SATAICOMP
PCH_JTAG_TCK
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_SRTCRST#
PCH_RTCX2
PCH_RTCRST#
SM_INTRUDER#
PCH_INTVRMEN
AZ_SYNC
PCH_SPICLK
AZ_SDIN0_HD
AZ_SDOUT
SERIRQ
PCH_SPKR
PCH_RTCX1
PCH_SRTCRST#
PCH_RTCRST#
AZ_BITCLK
AZ_RST#
PCH_SPKR
SERIRQ
SATA_LED#
CR_WAKE#
GPIO19
PCH_GPIO13
PCH_JTAG_TCK
PCH_JTAG_TMS PCH_JTAG_TDO PCH_JTAG_TDI
PCH_SPIDI
PCH_SPICLK
PCH_SPICS#
PCH_SPIDO
DI
CLK
CS#
DO
SATA_PTX_DRX_P1
SATA_PRX_C_DTX_N1
SATA_PRX_C_DTX_P1
SATA_PTX_DRX_N1
CS#
CLK
CLK
DO
DI
AZ_SYNC_R
AZ_SYNC
PCH_GPIO33
PCH_GPIO33
PCH_GPIO13
GPIO19
PWRME_CTRL# AZ_SDOUT
PCH_INTVRMEN
SATA_PTX_DRX_P4
SATA_PRX_C_DTX_N4
SATA_PRX_C_DTX_P4
SATA_PTX_DRX_N4
CR_WAKE#
SATA_PRX_C_DTX_P0 [41]
SATA_PRX_C_DTX_N0 [41]
LPC_AD0 [49]
LPC_AD1 [49]
LPC_AD2 [49]
LPC_AD3 [49]
LPC_FRAME# [49]
SERIRQ [49]
SATA_LED# [50]
AZ_BITCLK_HD[47]
AZ_RST_HD#[47]
AZ_SDIN0_HD[47]
PCH_SPKR[47]
AZ_SDOUT_HD[47]
SATA_PTX_C_DRX_P0 [41]
SATA_PTX_C_DRX_N0 [41]
SATA_PTX_C_DRX_N1 [41]
SATA_PTX_C_DRX_P1 [41]
SATA_PRX_C_DTX_N1 [41]
SATA_PRX_C_DTX_P1 [41]
AZ_SYNC_HD[47]
PWRME_CTRL#[49]
SATA_PTX_C_DRX_N4 [40]
SATA_PTX_C_DRX_P4 [40]
SATA_PRX_C_DTX_N4 [40]
SATA_PRX_C_DTX_P4 [40]
CR_WAKE# [44]
+3VALW
+RTCVCC
+1.05VS_VPCH
+RTCVCC
+3VS
+3VS
+3VS
+RTCVCC
+RTCBATT
+3VALW +3VALW+3VALW
+5VS
+3VALW
+3VS
+1.05VS_VPCH
+3VALW
+RTCVCC
+3VALW
+3VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
PCA70 LA-7521P M/B
0.1
PCH_HDA/JTAG/SATA/SPI/LPC
Custom
13 64Tuesday, April 12, 2011
2010/10/1 2011/11/01
Compal Electronics, Inc.
HDD
Integrated SUS 1.05V VRM Enable
PCH_INTVRMEN
High - Enable Internal VRs
(must be always pulled high)
CMOS Setting, near DDR Door
iME Setting.
*
SATA port2 and port3 are disabled on H61
ODD
4M Byte
Socket: SP07000F500/SP07000H900
for EMI
Please close to U2 PCH
No mention on SB PDG
but HR mention on PDG
reserve for
Potential Leakage Concern
*
This signal has a weak internal pull down
H=>On Die PLL is supplied by 1.5V (mobile)
L=>On Die PLL is supplied by 1.8V (DT)
Need to pull high for Huron River platform
HDA_SYNC
RC Delay 18~25mS
RC Delay 18~25mS
High = Enabled (No Reboot)
Low = Disabled (Default)
Place R128 and R130 within 500
mils of the PCH. Avoid routing
next to clock pins.
PCH_SPKR
HDA_SDO
ME debug mode,
this signal has a weak internal pull down
Low = Disable (default)
High = Enable (flash descriptor security overide)
*
C212
0.1U_0402_16V4Z
1
2
R137
10_0402_5%
@
12
RTCIHDA
SATA
LPC
SPI JTAG
SATA 6G
U4A
BD82CPDS-QMZP-B0_FCBGA942
RTCX1
BR39
RTCX2
BN39
INTVRMEN
BN41
INTRUDER#
BM38
HDA_BCLK
BU22
HDA_SYNC
BP23
HDA_RST#
BC22
HDA_SDIN0
BD22
HDA_SDIN1
BF22
HDA_SDIN2
BK22
HDA_SDO
BT23
SATALED# BF57
FWH0 / LAD0 BK15
FWH1 / LAD1 BJ17
FWH2 / LAD2 BJ20
FWH3 / LAD3 BG20
LDRQ1# / GPIO23 BA20
FWH4 / LFRAME# BG17
LDRQ0# BK17
RTCRST#
BT41
HDA_SDIN3
BJ22
HDA_DOCK_EN# / GPIO33
BC25
HDA_DOCK_RST# / GPIO13
BA25
SRTCRST#
BN37
SATA0RXN AC56
SATA0RXP AB55
SATA0TXN AE46
SATA0TXP AE44
SATA1RXN AA53
SATA1RXP AA56
SATA1TXN AG49
SATA1TXP AG47
SATA2RXN AL50
SATA2RXP AL49
SATA2TXN AL56
SATA2TXP AL53
SATA3RXN AN46
SATA3RXP AN44
SATA3TXN AN56
SATA3TXP AM55
SATA4RXN AN49
SATA4RXP AN50
SATA4TXN AT50
SATA4TXP AT49
SATA5RXN AT46
SATA5RXP AT44
SATA5TXN AV50
SATA5TXP AV49
SATAICOMPI AJ55
SPI_CLK
AR54
SPI_CS0#
AT57
SPI_CS1#
AR56
SPI_MOSI
AU53
SPI_MISO
AT55
SATA0GP / GPIO21 BC54
SATA1GP / GPIO19 AY52
JTAG_TCK
BA43
JTAG_TMS
BC50
JTAG_TDI
BC52
JTAG_TDO
BF47
SERIRQ AV52
SPKR
BE56
SATAICOMPO AJ53
SATA3COMPI AE54
SATA3RCOMPO AE52
SATA3RBIAS AC52
R1039
1K_0402_5%
12
Y1
32.768KHZ_12.5PF_Q13MC14610002
OSC 4
OSC 1
NC
3
NC
2
R121 1M_0402_5%
1 2
R144 0_0402_5%
1 2
C203
1U_0402_6.3V6K
1 2
R151
100_0402_1%
12
R126 10K_0402_5%
1 2
R147
200_0402_5%
@
12
C1391 0.01U_0402_25V7K
1 2
C206 0.01U_0402_25V7K
1 2
R122 390K_0402_5%
1 2
R128 37.4_0402_1%
1 2
R124 1K_0402_5%
@12
C214
10P_0402_50V8J
@
1
2
R111
20K_0402_5%
1 2
R136 1K_0402_5%@12
JME1 CONN@
1 2
R149
200_0402_5%
@
1 2
R120 33_0402_5%
1 2
R116 10K_0402_5%
12
R112 10K_0402_5%
12
C1390 0.01U_0402_25V7K
1 2
R139 33_0402_5%
1 2
R143 0_0402_5%
1 2
R118 33_0402_5%
1 2
R148
200_0402_5%
@
12
R132 750_0402_1%
1 2
R131 1K_0402_5%
@
1 2
JCOMS1 CONN@
1 2
G
D
S
Q2
BSS138LT1G_SOT23-3
@
2
13
R146 0_0402_5%
1 2
C207 0.01U_0402_25V7K
1 2
R145 0_0402_5%
1 2
R154 51_0402_1%
1 2
R129 0_0402_5%@
1 2
R125 33_0402_5%
1 2
R114 10K_0402_5%
12
R140 0_0402_5%
1 2
C208 0.01U_0402_25V7K
1 2
R115
20K_0402_5%
1 2
R152
100_0402_1%
12
D1
DAN202UT106_SC70-3
2
3
1
R117 10K_0402_5%
1 2
R133 10K_0402_5%
1 2
C202 15P_0402_50V8J
12
C205
1U_0402_6.3V6K
1 2
R134 1K_0402_5%@
1 2
R130 49.9_0402_1%
1 2
C210
0.1U_0402_16V4Z
1
2
C204 15P_0402_50V8J
12
U6
W25Q32BVSSIG_SO8
CS#
1
DO
2
WP#
3
GND
4
VCC 8
HOLD# 7
CLK 6
DI 5
C209 0.01U_0402_25V7K
1 2
R153
100_0402_1%
1 2
R113
10M_0402_5%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCH_GPIO60
PCH_CLK_DMI#
PCH_CLK_DMI
CLK_14M_PCH
CLKIN_GND1#
CLK_DOT#
CLK_SATA
CLK_SATA#
CLKIN_GND1
CLK_DOT
PCH_SMLDATA0
PCH_GPIO11
PCH_SMBCLK
PCH_SMBDATA
PCH_SMLCLK1
PCH_SMLDATA1
PCH_GPIO74
PCH_GPIO74
PCH_GPIO60
PCH_GPIO11
CLK_PCILOOP
PCH_X1 PCH_X2
CLK_FLEX0
PCH_SMLDATA0
PCH_SMBDATA
PCH_SMLDATA1
PCH_X1
PCH_X2
CLK_DOT#
CLK_DOT
CLK_SATA#
CLK_SATA
XCLK_RCOMP
CLK_PCILOOP
CLK_14M_PCH
CLK_DPLL#
CLK_DPLL
PCH_CLK_DMI#
PCH_CLK_DMI
CLK_CPU_DMI
CLK_CPU_DMI#
CLKIN_GND1#
CLKIN_GND1
CLKIN_GND0
CLKIN_GND0#
CLKIN_GND0
CLKIN_GND0#
CLK_PCIE_VGA#_R
CLK_PCIE_VGA_R
PCH_SMLCLK1
CLK_TV_R
CLK_TV#_R
CLK_USB30_R
CLK_USB30#_R
PCIE_PTX_USBRX_N2
PCIE_PRX_C_USBTX_P2
PCIE_PRX_C_USBTX_N2
PCIE_PTX_USBRX_P2
PCIE_PRX_TVTX_N4
PCIE_PTX_TVRX_N4
PCIE_PRX_TVTX_P4
PCIE_PTX_TVRX_P4
PCH_SMLCLK0
PCH_SMLCLK0
CLK_FLEX1
CLK_FLEX2
CLK_FLEX3
PCH_SMBCLK
CLK_CPU_ITP#
CLK_CPU_ITP
CLKREQ_LAN#_R
CLK_LAN_R
CLK_LAN#_R
CLK_WLAN#_R
CLK_WLAN_R
CLKREQ_WLAN#_R
PCIE_PTX_LANRX_P6
PCIE_PRX_C_LANTX_P6
PCIE_PTX_LANRX_N6
PCIE_PRX_C_LANTX_N6
PCIE_PTX_WLANRX_P3
PCIE_PRX_WLANTX_N3
PCIE_PRX_WLANTX_P3
PCIE_PTX_WLANRX_N3
PCIE_PTX_CRRX_P5
PCIE_PRX_C_RTX_N5
PCIE_PRX_C_RTX_P5
PCIE_PTX_CRRX_N5
CLK_CR#_R
CLK_CR_R
CLKREQ_WLAN#_R
PM_SMBDATA [11,12,40]
PM_SMBCLK [11,12,40]
EC_SMB_DA2 [23,49,52]
EC_SMB_CK2 [23,49,52]
CLK_PCILOOP [17]
CLK_CPU_DMI [5]
CLK_CPU_DMI# [5]
CLK_PCIE_VGA [22]
CLK_PCIE_VGA# [22]
CLK_TV[42] CLK_TV#[42]
CLK_USB30[45] CLK_USB30#[45]
PCIE_PTX_C_USBRX_N2[45]
PCIE_PRX_C_USBTX_P2[45] PCIE_PRX_C_USBTX_N2[45]
PCIE_PTX_C_USBRX_P2[45]
PCIE_PTX_C_TVRX_N4[42]
PCIE_PRX_TVTX_N4[42]
PCIE_PTX_C_TVRX_P4[42]
PCIE_PRX_TVTX_P4[42]
CLK_BCLK_ITP#[5] CLK_BCLK_ITP[5]
CLKREQ_LAN#[43]
CLK_LAN#[43] CLK_LAN[43]
CLKREQ_WLAN#[42]
CLK_WLAN#[42] CLK_WLAN[42]
PCIE_PTX_C_LANRX_P6[43] PCIE_PTX_C_LANRX_N6[43]
PCIE_PRX_C_LANTX_N6[43] PCIE_PRX_C_LANTX_P6[43]
PCIE_PTX_C_WLANRX_N3[42]
PCIE_PRX_WLANTX_N3[42]
PCIE_PTX_C_WLANRX_P3[42]
PCIE_PRX_WLANTX_P3[42]
PCIE_PTX_C_CRRX_N5[44]
PCIE_PRX_C_RTX_N5[44]
PCIE_PTX_C_CRRX_P5[44]
PCIE_PRX_C_RTX_P5[44]
CLK_CR#[44] CLK_CR[44]
+3VALW
+3VALW +3VS
+3VS+3VALW
+3VS
+1.05VS_VPCH
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
PCA70 LA-7521P M/B
0.1
PCH_PCI-E/SMBUS/CLK
Custom
14 64Tuesday, April 12, 2011
2010/10/1 2011/11/01
Compal Electronics, Inc.
CLKIN_GND1_N
CLKIN_GND1_P
For EMI
USB30
Control Link only for support Intel IAMT.
VGA
From Clock Gen.
not using eDP level NC
PCI-E port7 and port8 are disabled on H61
TV
USB30
LAN
TV
Close to PCH side
LAN
WLAN
WLAN
Card reader
Card Reader
R179 10K_0402_5%
1 2
C218 0.1U_0402_16V7K
1 2
R176 10K_0402_5%
1 2
R159 2.2K_0402_5%
12
T65 PAD
R7 0_0402_5%@12
R156 2.2K_0402_5%
12
C220 0.1U_0402_16V7K
12
R162 2.2K_0402_5%
12
R165 0_0402_5%
1 2
C223 0.1U_0402_16V7K
1 2
R169 0_0402_5%
1 2
C227 0.1U_0402_16V7K
12
R193 10_0402_5%
@12
Q5B
2N7002KDWH_SOT363-6
3 4
5
R166 2.2K_0402_5%
12
T176 PAD
T177 PAD
R157 4.7K_0402_5%
Q4B
2N7002KDWH_SOT363-6
3 4
5
R186 0_0402_5%
1 2
R200 10K_0402_5%
1 2
R194 90.9_0402_1%
1 2
C230
27P_0402_50V8J
1
2
C224 0.1U_0402_16V7K
12
R161 10K_0402_5%
1 2
Q5A
2N7002KDWH_SOT363-6
6 1
2
C221 0.1U_0402_16V7K
12
R158 4.7K_0402_5%
R180 0_0402_5%
1 2
R185 10K_0402_5%
1 2
R183 10K_0402_5%
1 2
R192 0_0402_5%@1 2
R184 0_0402_5%
1 2
R190 0_0402_5%
1 2
R187 10K_0402_5%
1 2
T252 PAD
R177 10K_0402_5%
1 2
T178 PAD
R155 2.2K_0402_5%
12
C225 0.1U_0402_16V7K
12
R174 10K_0402_5%
1 2
R191 0_0402_5%
1 2
T66 PAD
R163 10K_0402_5%
1 2
Q4A
2N7002KDWH_SOT363-6
6 1
2
R164 2.2K_0402_5%
12
R189 10K_0402_5%
1 2
R181 10K_0402_5%
1 2
R178 0_0402_5%
1 2
R167 0_0402_5%
1 2
C219 0.1U_0402_16V7K
1 2
R198 1M_0402_5%
12
C222 0.1U_0402_16V7K
1 2
R168 0_0402_5%
1 2
R5 0_0402_5%@12
C226 0.1U_0402_16V7K
12
R182 10K_0402_5%
1 2
Y2
25MHZ_20PF_X5H025000DK1H
1 2
R160 2.2K_0402_5%
12
PCI-E*
CLOCKS
FLEX CLOCKS
SMBUSController
Link
U4B
BD82CPDS-QMZP-B0_FCBGA942
PERN1
J20
PERP1
L20
PERN2
P20
PERP2
R20
PERN3
H17
PERP3
J17
PERN4
P17
PERP4
M17
PERN5
N15
PERP5
M15
PERN6
J15
PERP6
L15
PERN7
J12
PERP7
H12
PERN8
H10
PERP8
J10
PETN1
F25
PETP1
F23
PETN2
C22
PETP2
A22
PETN3
E21
PETP3
B21
PETN4
F18
PETP4
E17
PETN5
B17
PETP5
C16
PETN6
A16
PETP6
B15
PETN7
F15
PETP7
F13
PETN8
B13
PETP8
D13
CLKOUT_PCIE0N
AE6
CLKOUT_PCIE0P
AC6
CLKOUT_PCIE1N
AA5
CLKOUT_PCIE1P
W5
CLKOUT_PCIE2N
AB12
CLKOUT_PCIE2P
AB14
CLKOUT_PCIE3N
AB9
CLKOUT_PCIE3P
AB8
CLKOUT_PCIE4N
Y9
CLKOUT_PCIE4P
Y8
CLKOUT_PCIE5N
AF3
CLKOUT_PCIE5P
AG2
CLKIN_GND1_N R27
CLKIN_GND1_P P27
CLKIN_DMI_N P33
CLKIN_DMI_P R33
CLKIN_DOT_96N BD38
CLKIN_DOT_96P BF38
CLKIN_SATA_N AF55
CLKIN_SATA_P AG56
XTAL25_IN AJ3
XTAL25_OUT AJ5
REFCLK14IN AN8
CLKIN_PCILOOPBACK BD15
CLKOUT_PEG_A_N AG8
CLKOUT_PEG_A_P AG9
PCIECLKRQ2# / GPIO20
AV43
PCIECLKRQ5# / GPIO44
BL54
CLKOUTFLEX0 / GPIO64 AT9
CLKOUTFLEX1 / GPIO65 BA5
CLKOUTFLEX2 / GPIO66 AW5
CLKOUTFLEX3 / GPIO67 BA2
CLKOUT_DMI_N P31
CLKOUT_DMI_P R31
CLKOUT_PEG_B_P
AE11 CLKOUT_PEG_B_N
AE12
XCLK_RCOMP AL2
CLKOUT_DP_P M55
CLKOUT_DP_N N56
CLKOUT_PCIE6N
AB3
CLKOUT_PCIE6P
AA2
PCIECLKRQ7# / GPIO46
BP55
CLKOUT_PCIE7N
AE2
CLKOUT_PCIE7P
AF1
CLKOUT_ITPXDP_N
R52
CLKOUT_ITPXDP_P
N52
SMBALERT# / GPIO11 BN49
SMBCLK BT47
SMBDATA BR49
SML0ALERT# / GPIO60 BU49
SML0CLK BT51
SML0DATA BM50
SML1ALERT# / PCHHOT# / GPIO74 BR46
SML1CLK / GPIO58 BJ46
SML1DATA / GPIO75 BK46
CL_CLK1 BA50
CL_DATA1 BF50
CL_RST1# BF49
PCIECLKRQ6# / GPIO45
AV44
CLKIN_GND0_N W53
CLKIN_GND0_P V52
C228 22P_0402_50V8J
@
12
R173 0_0402_5%
1 2
R175 0_0402_5%@1 2
C229
27P_0402_50V8J
1
2
R188 10K_0402_5%
1 2
R172 0_0402_5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
RBIAS_CPY
EC_SWI#_R
PM_PWROK
SUSWARN#_R
PCIE_WAKE#
PBTN_OUT#_R
PCH_RSMRST#_R
DMI_CTX_PRX_N2
DMI_PTX_CRX_N2
DMI_PTX_CRX_N0
DMI_PTX_CRX_N1
DMI_PTX_CRX_N3
DMI_PTX_CRX_P0
DMI_PTX_CRX_P2
DMI_CTX_PRX_N0
DMI_PTX_CRX_P1
DMI_CTX_PRX_N1
DMI_PTX_CRX_P3
DMI_CTX_PRX_P2
DMI_CTX_PRX_P1
DMI_CTX_PRX_N3
DMI_CTX_PRX_P3
DMI_CTX_PRX_P0
DMI_COMP
XDP_DBRESET#
DRAMPWROK
EC_SWI#_R
PCH_GPIO72
PM_SLP_S5#
PM_SLP_S4#
SUS_STAT#
PM_SLP_S3#
H_PM_SYNC
SUSACK#
DSWVREN
PCH_DPWROK
SUSCLK_P
DSWVREN
PCIE_WAKE#
PM_SLP_SUS#
SUSWARN#_RSUSACK#
PM_PWROK
SUSWARN#_R
PCH_GPIO72
PM_CLKRUN#
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N6
FDI_CTX_PRX_N5
FDI_CTX_PRX_P1
FDI_CTX_PRX_N7
FDI_CTX_PRX_P0
FDI_CTX_PRX_P3
FDI_CTX_PRX_P2
FDI_CTX_PRX_P6
FDI_CTX_PRX_P5
FDI_CTX_PRX_P4
FDI_CTX_PRX_P7
FDI_INT
FDI_FSYNC1
FDI_FSYNC0
FDI_LSYNC1
FDI_LSYNC0
PCH_RSMRST#
PCH_RSMRST#PCH_DPWROK
PM_SLP_A#
PCH_GPIO29
SYS_PWROK
PCH_GPIO29
PCH_GPIO31
PWROK_R
H_PM_SYNC
PM_CLKRUN#
PBTN_OUT#[49]
XDP_DBRESET#[5]
PM_SLP_S5# [49]
H_PM_SYNC [5]
PM_SLP_S4# [49]
PM_SLP_S3# [49]
PCIE_WAKE# [42,43,45]
DMI_CTX_PRX_P0[6]
DMI_CTX_PRX_N1[6]
DMI_PTX_CRX_N1[6]
DMI_PTX_CRX_P1[6]
DMI_CTX_PRX_N0[6]
DMI_CTX_PRX_P3[6]
DMI_PTX_CRX_P3[6]
DMI_PTX_CRX_P0[6]
DMI_PTX_CRX_N0[6]
DMI_CTX_PRX_N3[6]
DMI_CTX_PRX_P2[6]
DMI_PTX_CRX_N3[6]
DMI_CTX_PRX_P1[6]
DMI_CTX_PRX_N2[6]
DMI_PTX_CRX_N2[6]
DMI_PTX_CRX_P2[6]
DRAMPWROK[5]
VGATE[49,58]
SYS_PWROK
SUSWARN#[49]
FDI_CTX_PRX_N0 [6]
FDI_CTX_PRX_N1 [6]
FDI_CTX_PRX_N3 [6]
FDI_CTX_PRX_N2 [6]
FDI_CTX_PRX_N5 [6]
FDI_CTX_PRX_N4 [6]
FDI_CTX_PRX_N7 [6]
FDI_CTX_PRX_N6 [6]
FDI_CTX_PRX_P1 [6]
FDI_CTX_PRX_P0 [6]
FDI_CTX_PRX_P3 [6]
FDI_CTX_PRX_P2 [6]
FDI_CTX_PRX_P4 [6]
FDI_CTX_PRX_P5 [6]
FDI_CTX_PRX_P7 [6]
FDI_CTX_PRX_P6 [6]
FDI_INT [6]
FDI_FSYNC0 [6]
FDI_LSYNC0 [6]
FDI_FSYNC1 [6]
FDI_LSYNC1 [6]
PCH_RSMRST#[49]
PM_PWROK[49]
EC_SWI#[49]
+3VS
+3VALW
+3VS
+RTCVCC
+3VALW
+3VALW
+1.05VS_VPCH
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
PCA70 LA-7521P M/B
0.1
PCH_DMI/FDI/PM
Custom
15 64Tuesday, April 12, 2011
2010/10/1 2011/11/01
Compal Electronics, Inc.
DSWVREN - Internal Deep Sleep 1.05V regulator
H
：
Enable
LGDisable
*
Stuff R137 if EC does not want to
involve in the handshake mechanism
for the DeepSX state entry and exit
Stuff R222 if do not support DeepSX state
32.768 KHz
PCH_GPIO29 default GPI
PU to +3VALW base on module design.
ESD request Close to U4.F55
R210 49.9_0402_1%
1 2
T69 PAD
R206 10K_0402_5%
12
R208 10K_0402_5%
12
R1064 0_0402_5%
@
1 2
R220 10K_0402_5%
12
R204 10K_0402_5%
12
R205 10K_0402_5%
12
R215 0_0402_5%@1 2
DMI
FDI
System Power Management
U4C
BD82CPDS-QMZP-B0_FCBGA942
DMI0RXN
D33
DMI1RXN
A36
DMI2RXN
B37
DMI3RXN
E37
DMI0RXP
B33
DMI1RXP
B35
DMI2RXP
C36
DMI3RXP
F38
DMI0TXN
J36
DMI1TXN
P38
DMI2TXN
H38
DMI3TXN
M41
DMI0TXP
H36
DMI1TXP
R38
DMI2TXP
J38
DMI3TXP
P41
DMI_ZCOMP
E31
DMI_IRCOMP
B31
FDI_RXN0 C42
FDI_RXN1 F45
FDI_RXN2 H41
FDI_RXN3 C46
FDI_RXN4 B45
FDI_RXN5 B47
FDI_RXN6 J43
FDI_RXN7 M43
FDI_RXP0 B43
FDI_RXP1 F43
FDI_RXP2 J41
FDI_RXP3 D47
FDI_RXP4 A46
FDI_RXP5 C49
FDI_RXP6 H43
FDI_RXP7 P43
FDI_FSYNC0 B51
FDI_FSYNC1 C52
FDI_LSYNC0 E49
FDI_LSYNC1 D51
FDI_INT H46
PMSYNCH F55
SLP_SUS# BD43
SLP_S3# BM53
SLP_S4# BN52
SLP_S5# / GPIO63 BH50
SYS_RESET#
BE52
SYS_PWROK
BJ53
PWRBTN#
BT43
RI#
BJ48
WAKE# BC44
SUS_STAT# / GPIO61 BN54
SUSCLK / GPIO62 BA47
GPIO31
BG43
BATLOW# / GPIO72
AV46
PWROK
BJ38
CLKRUN# / GPIO32 BC56
SUSWARN# / SUS_PWR_DN_ACK / GPIO30
BU46
RSMRST#
BK38
DRAMPWROK
BG46
SLP_LAN# / GPIO29 BH49
APWROK
BC46
DPWROK BT37
DMI2RBIAS
A32
SLP_A# BC41
DSWVRMEN BR42
SUSACK#
BP45
C1595 0.1U_0402_16V4Z
1 2
R221 1K_0402_5%
1 2
R222 10K_0402_5%
1 2
R212 750_0402_1%
1 2
R219 0_0402_5%
@
1 2
T71 PAD
R217 0_0402_5%
@12
R218 8.2K_0402_5%
@
1 2
T253 PAD
C231
0.1U_0402_16V4Z
1 2
R209 10K_0402_5%
12
U9
SN74AHC1G08DCKR_SC70-5
IN1
1
IN2
2
G
3
O4
P5
R211
10K_0402_5%
12
R1063 0_0402_5%
@
1 2
R207 0_0402_5%@1 2
R1009 0_0402_5%
1 2
T70 PAD
R213 390K_0402_5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CRT_IREF
UMA_ENBKL
UMA_HDMI_DATA
DDPC_HDP
HDMI_HPD
PCH_PWM
UMA_ENVDD
UMA_HDMI_TX2-
UMA_HDMI_TX0-
UMA_HDMI_TXC-
UMA_HDMI_TX1+
UMA_HDMI_TX0+
UMA_HDMI_TXC
UMA_HDMI_TX2+
UMA_HDMI_TX1-
DDPB_AUXP
DDPB_AUXN
DDPC_HDP
PCH_HDMI_DATA
PCH_HDMI_CLK
UMA_CRT_R
UMA_CRT_B
UMA_CRT_G
UMA_CRT_HSYNC
UMA_CRT_VSYNC
UMA_CRT_DATA
UMA_CRT_CLK
UMA_HDMI_CLK
DDPC_AUXP
DDPC_AUXN
DDPD_HDP
DDPD_AUXP
PCH_HDMIOUT_CLK
DDPD_AUXN
PCH_HDMIOUT_DATA
DDPD_HDP
PCH_HDMI_CLK [36]
PCH_HDMI_DATA [36]
DDPC_HDP [36]
PCH_HDMI_TX2- [36]
PCH_HDMI_TX0- [36]
PCH_HDMI_CLK+ [36]
PCH_HDMI_TX0+ [36]
PCH_HDMI_TX1- [36]
PCH_HDMI_TX1+ [36]
PCH_HDMI_TX2+ [36]
PCH_HDMI_CLK- [36]
UMA_ENBKL[49]
PCH_HDMIOUT_TX2- [38]
PCH_HDMIOUT_TX0- [38]
PCH_HDMIOUT_CLK+ [38]
PCH_HDMIOUT_TX0+ [38]
PCH_HDMIOUT_TX1- [38]
PCH_HDMIOUT_TX1+ [38]
PCH_HDMIOUT_TX2+ [38]
PCH_HDMIOUT_CLK- [38]
PCH_HDMIOUT_CLK [38]
PCH_HDMIOUT_DATA [38]
DDPD_HDP [38]
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
PCA70 LA-7521P M/B
0.1
PCH_CRT/LVDS/HDMI
Custom
16 64Tuesday, April 12, 2011
2010/10/1 2011/11/01
Compal Electronics, Inc.
HDMI
(To Scale)
For debug only
NOTE:PCH adds support for panel power sequencing required for
embedded DisplayPort support. L_VDDEN, L_BKLTEN and L_BKLTCTL pins are
added on the PCH for panel power sequencing. It is important to note that a 6
layer board design may be required to access these pins on the PCH package
in a fully featured platform design.
HDMI OUT
(To Conn.)
T201PAD
T92PAD
T76 PAD
T106 PAD
T221PAD
T91 PAD T90PAD
T232 PAD
T104PAD
T78 PAD
T203PAD
T120 PAD
R243 100K_0402_5%
DIS@
1 2
T77 PAD
T83 PAD
T100PAD
T233 PAD
T75 PAD
T84 PAD
T95 PAD
T109 PAD
T200PAD
R1586 100K_0402_5%
1 2
T85 PAD
T199PAD
T73 PAD
T80 PAD
T234 PAD
T202PAD
T86 PAD
T99 PAD
T89 PAD
T204PAD
T117 PAD
T103 PAD
T118 PAD
T113 PAD
T74 PAD
T119 PAD
T112 PAD
T229 PAD
T235 PAD
T115 PAD
T107 PAD
Digital Display Interface
CRT RSVD
U4D
BD82CPDS-QMZP-B0_FCBGA942
L_BKLTCTL
AG12
L_BKLTEN
AG18
L_VDD_EN
AG17
DDPB_0N R12
DDPB_1N M12
DDPD_2N C9
DDPD_3N B11
DDPB_2N K8
DDPB_3N M3
DDPC_0N J3
DDPC_1N G4
DDPC_2N F5
DDPC_3N E2
DDPD_0N B5
DDPD_1N D7
DDPB_0P R14
DDPB_1P M11
DDPD_2P B7
DDPD_3P E11
DDPB_2P H8
DDPB_3P L5
DDPC_1P G2
DDPC_0P L2
DDPC_2P F3
DDPC_3P E4
DDPD_0P D5
DDPD_1P C6
CRT_BLUE
AM1
CRT_DDC_CLK
AW3
CRT_DDC_DATA
AW1
CRT_GREEN
AN2
CRT_HSYNC
AR4
CRT_IRTN
AM6
CRT_RED
AN6
CRT_VSYNC
AR2
DAC_IREF
AT3
SDVO_CTRLCLK AL15
SDVO_CTRLDATA AL17
DDPC_CTRLCLK AL12
DDPC_CTRLDATA AL14
DDPD_CTRLCLK AL9
DDPD_CTRLDATA AL8
DDPB_AUXN R9
DDPC_AUXN U12
DDPD_AUXN R6
DDPB_AUXP R8
DDPC_AUXP U14
DDPD_AUXP N6
DDPB_HPD T1
DDPC_HPD N2
DDPD_HPD M1
SDVO_TVCLKINP U8
SDVO_TVCLKINN U9
SDVO_STALLP W3
SDVO_STALLN U5
SDVO_INTP U2
SDVO_INTN T3
TP1
P22
TP2
L31
TP3
L33
TP4
M38
TP5
L36
TP6
Y18
TP7
Y17
TP8
AB18
TP9
AB17
TP10
BM46
TP11
BA27
TP12
BC49
TP13
AE49
TP14
AE41
TP15
AE43
TP16
AE50
TP17
BA36
TP18
AY36
TP19
Y14
TP20
Y12
TP21
H31
TP22
J27
TP23
J25
TP24
L22
TP25
J31
TP26
L27
TP27
L25
TP28
J22
TP29
C29
TP30
F28
TP31
C26
TP32
B25
TP33
E29
TP34
E27
TP35
B27
TP36
D25
R242 100K_0402_5%
UMA@
12
R246 1K_0402_0.5%
12
T97 PAD
T102PAD
T111 PAD
T105 PAD
T93 PAD
T98PAD
T230 PAD
T94PAD
T205PAD
T121 PAD
T82 PAD
T88 PAD
T96PAD
T116 PAD
T101 PAD
T231 PAD
T108 PAD
T220PAD
T114 PAD
T110 PAD
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCH_GNT1#
PCH_GNT3#
PCH_GPIO2
PCH_GPIO3
PCH_GPIO4
PCI_PME#
USBBIAS
USB20_P2
USB20_N2
USB20_P4
USB20_N4
USB20_N0
USB20_P1
USB20_P0
USB20_N1
USB20_N5
USB20_P5
USB20_P9
USB20_N9
USB20_N8
USB20_P8
USB20_P11
USB20_N11
USB20_P10
USB20_N10
USB_OCI
USB_OCI
USB20_P3
USB20_N3
PCH_GNT2#
PCH_PLT_RST#
DGPU_HOLD_RST#
PCH_GPIO52
DGPU_PWR_EN
PCI_PIRQD#
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQC#
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQD#
PCH_REQ0#
PCH_REQ0#
PCH_GNT0#
PCI_PERR#
PCI_SERR#
PCI_TRDY#
PCI_IRDY#
PCI_PLOCK#
PCI_DEVSEL#
PCI_FRAME#
PCI_STOP#
PCI_IRDY#
PCI_DEVSEL#
PCI_FRAME#
PCI_TRDY#
PCI_SERR#
PCI_STOP#
PCI_PERR#
PCI_PLOCK#
PAR
USB_OC#4
CLK_PCILOOP_R
CLK_PCI_EC_R
PLT_RST#
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#5
USB_OC#6
USB_OC#7
USB_OC#5
USB_OC#6
USB_OC#7
USB_OC#1
PCH_PLT_RST#
DGPU_HOLD_RST#
PCH_GPIO52
PCH_GPIO4
DGPU_PWR_EN
PCH_GPIO2
CR_CPPE#
PCH_GPIO3
CR_CPPE#
USB_OC#4
USB_OC#2
USB_OC#3
USB20_P2 [50]
USB20_N2 [50]
USB20_N4 [40]
USB20_P4 [40]
USB20_P1 [46]
USB20_N1 [46]
USB20_P5 [41]
USB20_N5 [41]
USB20_P0 [46]
USB20_N0 [46]
USB20_N8 [41]
USB20_P8 [41]
USB20_N10 [42]
USB20_P10 [42]
USB20_P3 [50]
USB20_N3 [50]
USB20_N9 [41]
USB20_P9 [41]
CLK_PCILOOP[14] CLK_PCI_EC[49]
PLT_RST# [5,22,45,49]
PLT_A_RST# [42,43,44]
DGPU_PWR_EN[26,60]
DGPU_HOLD_RST#[22]
CR_CPPE#[44]
USB_OCI [45,46]
USB_OC#2 [40,41]
USB_OC#4 [41]
+3VS
+3VALW
+3VS
+3VS
+3VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
PCA70 LA-7521P M/B
0.1
PCH_PCI/USB/NAND
Custom
17 64Tuesday, April 12, 2011
2010/10/1 2011/11/01
Compal Electronics, Inc.
GPIO19 Boot BIOS Loaction
01
PCH_GNT1#
1
SPI
PCI
LPC
Boot BIOS Strap
11
0
00
Reserved
*
Touch
USB PORT9 CONN3
USB PORT8 CONN4
USB PORT5 CONN6
EHCI 1
EHCI 2
Int. Camera
TV Tuner #1
Layout Note:USB_BIAS WITH
LENGTH NO MORE THAN 500
MILS TO RESISTOR.
USB port6 and port7 are disabled on H61
eSATA+USB
Intel confirm GPIO19 is correct.
Reserve for USB30 PORT0@ CONN2
Reserve for USB30 PORT1@ CONN1
Reserve
USB port12 and port13 are disabled on H61
USB30 PORT 0,1
Have internal PU
PCI PU resistor
For CR D3E wake up reserve
USB PORT 4,5
USB PORT 8,9
R255 8.2K_0402_5%
1 2
R260 8.2K_0402_5%
1 2
R270 8.2K_0402_5%
1 2
R256 8.2K_0402_5%
1 2
R263 8.2K_0402_5%
1 2
R264 8.2K_0402_5%
1 2
R285 10K_0402_5%
1 2
R1011 10K_0402_5%
1 2
T122PAD
R277 8.2K_0402_5%
1 2
USB PCI
U4E
BD82CPDS-QMZP-B0_FCBGA942
PIRQA#
BK10
PIRQB#
BJ5
PIRQC#
BM15
PIRQD#
BP5
REQ1# / GPIO50
BT5
REQ2# / GPIO52
BK8
REQ3# / GPIO54
AV11
GNT1# / GPIO51
AV8
GNT2# / GPIO53
BU12
GNT3# / GPIO55
BE2
PIRQE# / GPIO2
BN9
PIRQF# / GPIO3
AV9
PIRQG# / GPIO4
BT15
PIRQH# / GPIO5
BR4
USBP0N BF36
USBP0P BD36
USBP1N BC33
USBP1P BA33
USBP2N BM33
USBP2P BM35
USBP3N BT33
USBP3P BU32
USBP4N BR32
USBP4P BT31
USBP5N BN29
USBP5P BM30
USBP6N BK33
USBP6P BJ33
USBP7N BF31
USBP7P BD31
USBP8N BN27
USBP8P BR29
USBP9N BR26
USBP9P BT27
USBP10N BK25
USBP10P BJ25
USBP11N BJ31
USBP11P BK31
USBP12N BF27
USBP12P BD27
USBP13N BJ27
USBP13P BK27
PME#
AV15
CLKOUT_PCI0
AT11
CLKOUT_PCI1
AN14
CLKOUT_PCI2
AT12
USBRBIAS# BP25
USBRBIAS BM25
OC0# / GPIO59 BM43
OC1# / GPIO40 BD41
OC2# / GPIO41 BG41
OC3# / GPIO42 BK43
OC4# / GPIO43 BP43
OC5# / GPIO9 BJ41
OC6# / GPIO10 BT45
OC7# / GPIO14 BM45
CLKOUT_PCI4
AT14 CLKOUT_PCI3
AT17
PLTRST#
BK48
AD0
BF15
AD1
BF17
AD2
BT7
AD3
BT13
AD4
BG12
AD5
BN11
AD6
BJ12
AD7
BU9
AD8
BR12
AD9
BJ3
AD10
BR9
AD11
BJ10
AD12
BM8
AD13
BF3
AD14
BN2
AD15
BE4
AD16
BE6
AD17
BG15
AD18
BC6
AD19
BT11
AD20
BA14
AD21
BL2
AD22
BC4
AD23
BL4
AD24
BC2
AD25
BM13
AD26
BA9
AD27
BF9
AD28
BA8
AD29
BF8
AD30
AV17
AD31
BK12
C/BE0#
BN4
C/BE1#
BP7
C/BE2#
BG2
C/BE3#
BP13
DEVSEL# BH9
FRAME# BC11
IRDY# BF11
TRDY# BC8
STOP# BC12
PAR BH8
PCIRST# AV14
PERR# BM3
REQ0#
BG5
GNT0#
BA15
SERR# BR6
PLOCK# BA17
R250
0_0402_5%
@
1 2
C1047
0.1U_0402_16V4Z
1
2
T196 PAD
T254
PAD
R271 8.2K_0402_5%
1 2
R279 8.2K_0402_5%
1 2
R280 22.6_0402_1%
1 2
R272 8.2K_0402_5%
1 2
U57
NC7SZ08P5X_NL_SC70-5
B
2
A
1Y4
P5
G
3
R278 8.2K_0402_5%
1 2
R257
100K_0402_5%
12
T123PAD
U10
NC7SZ08P5X_NL_SC70-5
B
2
A
1Y4
P5
G
3
R28222_0402_5% 1 2
R284 10K_0402_5%
1 2
T181 PAD
C1048
0.1U_0402_16V4Z
1
2
T180 PAD
R266 8.2K_0402_5%
1 2
T195 PAD T255
PAD
T198 PAD
R287 10K_0402_5%
1 2
R267 8.2K_0402_5%
1 2
R269 8.2K_0402_5%
1 2
R1012 10K_0402_5%
1 2
T179 PAD
R261 8.2K_0402_5%
1 2
R262 8.2K_0402_5%
1 2
R288 10K_0402_5%
1 2
R254 8.2K_0402_5%
1 2
T197 PAD
R28122_0402_5% 1 2
R283 10K_0402_5%
1 2
R276 8.2K_0402_5%
1 2
R253 8.2K_0402_5%
1 2
R259 8.2K_0402_5%
1 2
R286 10K_0402_5%
1 2
R1067
100K_0402_5%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCH_GPIO37
GATEA20
PCH_GPIO1
PCH_GPIO15
USB30_SMI#_R
PCH_GPIO22
KB_RST#
PCH_GPIO28
PCH_GPIO36
EC_SMI#
PCH_GPIO12
EC_SCI#
PCH_PECI_R
PCH_GPIO28 PCH_GPIO38
VGA_PWROK_R
BT_LED#
PCH_GPIO71
PCH_GPIO16
PCH_GPIO34
PCH_GPIO35
PCH_GPIO57
PCH_GPIO49
ISDBT_DET
KB_RST#
GATEA20
BT_LED#PCH_GPIO0
PCH_GPIO70
PCH_GPIO69
NV_CLE
PCH_GPIO39
PCH_GPIO27
ISDBT_DET
PCH_GPIO69 PCH_GPIO70 PCH_GPIO71
PCH_GPIO36
PCH_GPIO37
PCH_GPIO27
EC_SMI# PCH_GPIO35
PCH_GPIO49
PCH_GPIO0
PCH_GPIO22
USB30_SMI#_R
PCH_GPIO1
EC_SCI#
PCH_GPIO16
PCH_GPIO34
PCH_GPIO39
VGA_PWROK_R
PCH_GPIO38
PCH_GPIO15
PCH_GPIO12
PCH_GPIO57
H_PWRGOOD
NV_CLE
GATEA20
H_PWRGOOD
H_PWRGOOD [5]
H_THERMTRIP# [5]
KB_RST# [49]
EC_SMI#[49]
EC_SCI#[49]
H_PECI [5,49]
ISDBT_DET[42]
GATEA20 [49]
H_SNB_IVB# [5]
VGA_PWROK[60]
BT_LED# [49]
USB30_SMI#[45]
DGPU_HPD_INT#[38]
+3VS
+1.8VS
+3VALW
+3VS
+3VS +3VS +3VS
+3VALW
+3VALW
+3VALW +3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
PCA70 LA-7521P M/B
0.1
PCH_CPU/GPIO
Custom
18 64Tuesday, April 12, 2011
2010/10/1 2011/11/01
Compal Electronics, Inc.
*
On-Die PLL Voltage Regulator
H: Enable
L: Disable
GPIO28
Set to VSS when LOW
Set to VCC when HIGH
DMI & FDI Termination Voltage
NV_CLE
Note:Place R329 close to U1.R47
and <=100 mils
For OPT
Internal Pull Down
ISDBT_DET
1
1
1
11
1
1
1
1
1
x
1
x
1
x
x
x
x
x
x
00
00
0
0
0
SKU1
00
00
0
00
00
00
Project ID GPIO70
0GPIO71GPIO69
1
1
1 1
1
PROJECT ID TABLE
In Deep Sleep Power Well. Unmuxed.
Defaults to GPI.
Not used Weak pull-up 10k
Ω
to VccDSW3_3
-->Check list1.5 P402.
PD to GND for Huron River!!
SATA2GP/GPIO36 & SATA3GP/GPIO37Sampled at
Rising edge of PWROK.Weak internal pull-down.
(weak internal pull-down is disabled
after PLTRST# de-asserts)
NOTE: This signal should NOT be
pulled high when strap is sampled
Integrated clock enable functionality
is achieved by soft-strap
The current default is clock enable
*
Integrated Clock Chip Enable (Removed)
H: Disable
L: Enable
GPIO8
SKU2
SKU3
SKU4
ESD request Close to U4.R47
ESD request Close to U4.BB57
R299 10K_0402_5%
1 2
R315 10K_0402_5%
1 2 R1033
10K_0402_5%
GPIO70_H@
12
R1071 10K_0402_5%
1 2
R1030 2.2K_0402_5%
12
C1613
0.1U_0402_16V4Z
1
2
R326
47K_0402_5%
@
1 2
R1101 0_0402_5%
1 2
C1596 0.1U_0402_16V4Z
1 2
R325 10K_0402_5%
12
R310 10K_0402_5%
1 2
C243
0.1U_0402_16V4Z
@
1
2
R330
1K_0402_5%
@
1 2
R328
2.2K_0402_5%
12
R303 10K_0402_5%
1 2
R1032
10K_0402_5%
GPIO69_L@
12
CPU/MISC
NCTF
GPIO
U4F
BD82CPDS-QMZP-B0_FCBGA942
GPIO27
BJ43
GPIO28
BJ55
GPIO24 / MEM_LED
BP53
GPIO57
BT53
LAN_PHY_PWR_CTRL / GPIO12
BK50
VSS_NCTF[1]
A4
VSS_NCTF[2]
A6
VSS_NCTF[3]
B2
VSS_NCTF[4]
BM1
VSS_NCTF[5]
BM57
VSS_NCTF[6]
BP1
VSS_NCTF[7]
BP57
VSS_NCTF[8]
BT2
VSS_NCTF[9]
BU4
VSS_NCTF[10]
BU52
VSS_NCTF[11]
BU54
VSS_NCTF[12]
BU6
TACH2 / GPIO6
BA22
TACH0 / GPIO17
BT17
TACH3 / GPIO7
BR16
SATA3GP / GPIO37
BG53
SATA5GP / GPIO49
BA56
SCLOCK / GPIO22
BA53
SLOAD / GPIO38
BE54
SDATAOUT0 / GPIO39
BF55
SDATAOUT1 / GPIO48
AW53
PROCPWRGD D53
RCIN# BG56
PECI H48
THRMTRIP# E56
GPIO8
BP51
BMBUSY# / GPIO0
AW55
GPIO15
BM55
TACH1 / GPIO1
BR19
SATA2GP / GPIO36
BB55
INIT3_3V# BN56
STP_PCI# / GPIO34
BL56
GPIO35 / NMI#
BJ57
SATA4GP / GPIO16
AU56
A20GATE BB57
TACH4 / GPIO68 BU16
TACH6 / GPIO70 BN17
TACH7 / GPIO71 BP15
TACH5 / GPIO69 BM18
TS_VSS4 D57
TS_VSS3 F57
TS_VSS2 A52
TS_VSS1 A54
NC_1 AY20
VSS_NCTF[13]
D1
VSS_NCTF[14]
F1
DF_TVS R47
RESERVED [29] M48
RESERVED [28] K50
RESERVED [27] K49
RESERVED [26] AB46
RESERVED [25] G56
RESERVED [22] AB50
RESERVED [21] Y50
RESERVED [14] AB49
RESERVED [13] AB44
RESERVED [12] U49
RESERVED [11] R44
RESERVED [10] U50
RESERVED [9] U46
RESERVED [8] U44
RESERVED [7] H50
RESERVED [20] K46
RESERVED [19] L56
RESERVED [18] J55
RESERVED [17] F53
RESERVED [16] H52
RESERVED [15] E52
RESERVED [24] Y44
RESERVED [23] L53
RESERVED [6] Y41
RESERVED [5] R50
RESERVED [4] M50
RESERVED [3] M49
RESERVED [2] U43
RESERVED [1] J57
PWM0 BN21
PWM1 BT21
PWM2 BM20
PWM3 BN19
SST BC43
R317 10K_0402_5%
1 2
R296 1K_0402_5%
12
R297 10K_0402_5%
1 2
R301 10K_0402_5%
1 2
R305
1K_0402_5%
12
R307 10K_0402_5%
1 2
R329 1K_0402_5%
12
R308 10K_0402_5%
1 2
R331
1K_0402_5%
@
1 2
R312 10K_0402_5%
1 2
R298 10K_0402_5%
1 2
R1034
10K_0402_5%
GPIO70_L@
12
R318 10K_0402_5%
1 2
R1068 10K_0402_5%
1 2
R300
10K_0402_5%
12
R1031
10K_0402_5%
GPIO69_H@
12
T126PAD
R320
10K_0402_5%
1 2
R1036
10K_0402_5%
GPIO71_L@
12
R1035
10K_0402_5%
GPIO71_H@
12
R1072 10K_0402_5%
1 2
R321 10K_0402_5%
1 2
R1647 0_0402_5%@1 2
R319 10K_0402_5%
1 2
R311 10K_0402_5%
1 2
R306 0_0402_5%
@
1 2
C1597 0.1U_0402_16V4Z
1 2
R1065 0_0402_5%
@
1 2
C1598 0.1U_0402_16V4Z
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.05VS_VCCAPLL_FDI
+VCCP_VCCDMI
+VCCAPLLEXP
+VCCAPLL_CPY_PCH
+VCCACLK
+VCCSATAPLL
+1.05VS_VCCDIFFCLKN
+1.05VS_VPCH
+1.05VS_SSCVCC
+1.05VS_VCCASW
+VCCDPLL_CPY
+VCCP_VCCDMI
+VCCAPLLEXP
+VCCAPLL_CPY_PCH
+VCCSATAPLL
+1.05VS_VCCDIFFCLKN
+1.05VS_VPCH +1.05VS_VPCH
+1.05VS_VPCH
+1.05VS_VPCH
+1.05VS_VPCH
+1.05VS_VPCH
+1.05VS_VPCH
+1.05VS_VPCH
+1.05VS_VPCH
+1.05VS_VPCH
+1.05VS_VPCH
+1.05VS_VPCH
+1.05VS_VPCH
+1.05VS_VPCH
+1.05VS_VPCH
+1.05VS_VPCH
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
PCA70 LA-7521P M/B
0.1
PCH_POWER-1
Custom
19 64Tuesday, April 12, 2011
2010/10/1 2011/11/01
Compal Electronics, Inc.
3.3
1.05
1.05
1.05
V_PROC_IO
V5REF
V5REF_SUS
VCC3_3
VCCADAC
VCCADPLLA
VCCADPLLB
Voltage Rail
VCCCORE
VCCDMI
1.05
5
3.3
5
Voltage
S0 Iccmax
Current (A)
1.05
1.05VCCIO
1.05VCCASW
3.3VCCSPI
3.3VCCDSW
1.8VCCDFTERM
3.3VCCRTC
6 uA
3.3VCCSUS3_3
3.3 / 1.5VCCSusHDA
VCCVRM 1.5
1.05VCCCLKDMI
20mA
68mA
1600mA
4070mA
VCCSSC 1.05
20mA
VCCDIFFCLKN 1.05
PCH Power Rail Table
200mA
57mA
159mA
Near AJ20
Note:+VCCP_VCCDMI trace need to be at
least 20 mils width with full VSS/VCC
reference plane)
1610mA
100mA
100mA
55mA
105mA
1mA
10mA
409mA
1mA
1mA
3mA
97mA
Near B53
Near A19
This pin can be left as NC if
On-Die VR is enabled (Default)
PLL
Near U56
Near AC20
Near Y20
Near AE15
L6 10UH_LB2012T100MR_20%@12
C305
10U_0603_6.3V6M
@1
2
C246
1U_0402_6.3V6K
1
2
C247
1U_0402_6.3V6K
1
2
R348 0_0603_5%@
12
C253
1U_0402_6.3V6K
1
2
R337
0_0805_5%
@
1 2
C308
10U_0603_6.3V6M
1
2
C304
1U_0402_6.3V6K
1
2
C259
10U_0603_6.3V6M
@1
2
C263 1U_0402_6.3V6K@
1 2
C297
1U_0402_6.3V6K
1
2
R353
0_0805_5%
@
1 2
C303
10U_0603_6.3V6M
1
2
R352 0_0603_5%@1 2
C260
1U_0402_6.3V6K
1
2
L1 1UH_LB2012T1R0M_20%@1 2
C251
10U_0603_6.3V6M
@1
2
C257
1U_0402_6.3V6K
1
2
L3 10UH_LB2012T100MR_20%@
1 2
C306
1U_0402_6.3V6K
1
2
C275
10U_0603_6.3V6M
@1
2
POWER
U4G
BD82CPDS-QMZP-B0_FCBGA942
VCCIO_24
F20
VCCIO_25
F30
VCCIO_26
V25
VCCIO_27
V27
VCCIO_28
V31
VCCIO_29
V33
VCCIO_30
Y24
VCCIO_31
Y26
VCCIO_32
Y30
VCCIO_33
Y32
VCCIO_34
Y34
VCCIO_22
AA34
VCCIO_23
AA36
VCCIO_35
V22
VCCIO_36
Y20
VCCIO_37
Y22
VCCDMI_2
B41
VCCDMI_1
E41
VCCIO_8
AL40
VCCIO_9
AN40
VCCIO_10
AN41
VCCIO_20
AG38
VCCIO_21
AG40
VCCIO_7
AG41
VCCAPLLSATA
U56
VCCIO_19
BA38
VCCAPLLEXP
B53
VCCAFDIPLL
C54
VCCACLK
AL5
VCCAPLLDMI2
A19
VCCCORE_1 AC24
VCCCORE_2 AC26
VCCCORE_3 AC28
VCCCORE_4 AC30
VCCCORE_5 AC32
VCCCORE_6 AE24
VCCCORE_7 AE28
VCCCORE_8 AE30
VCCCORE_9 AE32
VCCCORE_10 AE34
VCCCORE_11 AE36
VCCCORE_12 AG32
VCCCORE_13 AG34
VCCCORE_14 AJ32
VCCCORE_15 AJ34
VCCCORE_16 AJ36
VCCCORE_17 AL32
VCCCORE_18 AL34
VCCCORE_19 AN32
VCCCORE_20 AN34
VCCCORE_21 AR32
VCCCORE_22 AR34
VCCASW_4 AG24
VCCASW_5 AG26
VCCASW_6 AG28
VCCASW_7 AJ24
VCCASW_8 AJ26
VCCASW_9 AJ28
VCCASW_10 AL24
VCCASW_11 AL28
VCCASW_12 AN22
VCCASW_13 AN24
VCCASW_14 AN26
VCCASW_15 AN28
VCCASW_16 AR24
VCCASW_17 AR26
VCCASW_18 AR28
VCCASW_19 AR30
VCCASW_20 AR36
VCCASW_21 AR38
VCCASW_22 AU30
VCCASW_23 AU36
VCCASW_3 AU34
VCCASW_2 AV36
VCCASW_1 AU32
VCCDIFFCLKN_1 AE15
VCCDIFFCLKN_2 AE17
VCCDIFFCLKN_3 AG15
VCCCLKDMI AJ20
VCCIO_18 AE40
VCCSSC_1 AC20
VCCSSC_2 AE20
VCCIO_1 AV24
VCCIO_2 AV26
VCCIO_3 AY25
VCCIO_4 AY27
VCCIO_13 V36
VCCIO_12 Y36
VCCIO_11 AJ38
VCCIO_14 Y28
C283
1U_0402_6.3V6K
1
2
C252
1U_0402_6.3V6K
@
1
2
C258
10U_0603_6.3V6M
1
2
R342 0_0603_5%@12
C250
1U_0402_6.3V6K
1
2
C254
1U_0402_6.3V6K
1
2
C299
1U_0402_6.3V6K
1
2
R368
0_0603_5%
@
1 2
C284
1U_0402_6.3V6K
1
2
C302
1U_0402_6.3V6K
1
2
C255
1U_0402_6.3V6K
1
2
C244
10U_0603_6.3V6M
1
2
C245
1U_0402_6.3V6K
1
2
R367 0_0603_5%@
1 2
C281
10U_0805_10V4Z
1
2
C307
1U_0402_6.3V6K
1
2
C276
1U_0402_6.3V6K
@
1
2
C282
1U_0402_6.3V6K
1
2
C256
1U_0402_6.3V6K
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.05VS_VCCADPLLA
+1.05VS_VCCADPLLB
+VCCSST
+RTCVCC
+VCCSUSHDA
+3VS_VCCSPI
+VCCA_DAC
+1.05VS_VCCADPLLB
+1.05VS_VCCADPLLA
+VCCAFDI_VRM
+VCCDSW
+V_CPU_IO
+RTCVCC
+VCCRTCEXT
+VCCDCPSUS
+PCH_V5REF_RUN
+PCH_V5REF_SUS
+VCCSUS
+VCCSUS
+PCH_V5REF_RUN
+PCH_V5REF_SUS
+RTCVCC
+3VALW
+3VS
+3VALW +3VS
+3VS
+1.8VS
+1.8VS
+3VS
+3VS
+3VALW
+3VALW
+RTCVCC
+5VS +3VS
+3VALW
+1.05VS_VPCH
+1.05VS_VPCH
+1.05VS_VPCH
+5VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
PCA70 LA-7521P M/B
0.1
PCH_POWER-2
Custom
20 64Tuesday, April 12, 2011
2010/10/1 2011/11/01
Compal Electronics, Inc.
Layout Note:
Close to AB1,AC2< 100 mil
Filter no need if int. GFx diisabled
L6,L7 (10uH inductor, 120mA)
Near BA46
Layout Note:
Close to AT1< 100 mil
Near T55
Near AV40
Near A39
Near BR54
Near Al38
Near A12
Near AU20
Near BD17Near BC17
Near AV30 Near U31Near BT35
B520 not connect?
Near BF1
PLACE REF5V CIRCUITRY NEAR PCH
Intel suggest
100ohm+1uF
PLACE REF5V CIRCUITRY NEAR PCH
Near BT25
Near BU42
Connect VCCVRM to
--> 1.8V for DT
--> 1.5V for Mobile
C314
0.1U_0402_10V7K
1
2
L4
10UH_LB2012T100MR_20%
1 2
R1069
100_0402_5%
12
C249
1U_0402_6.3V6K
1
2
C274
0.1U_0402_10V7K
@
1
2
C295
1U_0402_6.3V6K
1
2
C287
1U_0402_6.3V6K
1
2
R332
1_0603_5%
12
C272 0.1U_0402_10V7K
1 2
R335
0_0603_5%
1 2
C286
0.1U_0402_10V7K
1
2
C317
0.1U_0402_10V7K
1
2
C277
1U_0402_6.3V6K
12
L5
10UH_LB2012T100MR_20%
1 2
POWER
USB
U4J
BD82CPDS-QMZP-B0_FCBGA942
V5REF
BF1
V5REF_SUS
BT25
VCCSUSHDA
AV28
VCC3_3_9
AU20
VCC3_3_10
AV20
VCC3_3_7
AU22
VCCSPI
AN52
VCCADAC
AT1
VCCADPLLA
AB1
VCCADPLLB
AC2
VCCVRM_1 AJ1
VCCVRM_4 R2
VCCVRM_3 R54
VCCVRM_2 R56
VCCPNAND_01 T55
VCCPNAND_02 T57
VCC3_3_5 AL38
VCC3_3_6 AN38
VCC3_3_2 BC17
VCC3_3_3 BD17
VCC3_3_4 BD20
VCC3_3_8 A12
VCC3_3_1 AF57
VCCSUS3_3_11 BT35
VCCSUS3_3_2 AV30
VCCSUS3_3_3 AV32
VCCSUS3_3_4 AY31
VCCSUS3_3_5 AY33
VCCSUS3_3_6 BJ36
VCCSUS3_3_7 BK36
VCCSUS3_3_8 BM36
VCCSUS3_3_9 AT40
VCCSUS3_3_10 AU38
VCCSUS3_3_1 U31
VCCDSW3_3 AV40
V_PROC_IO D55
V_PROC_IO_NCTF B56
DCPSUS_3 A39
DCPSUS_1 AA32
VCCRTC BU42
DCPRTC BR54
DCPRTC_NCTF BT56
DCPSUS_2 AT41
DCPSUSBYP AV41
DCPSST BA46
C278
0.1U_0402_10V7K
1
2
R350 0_0603_5%@1 2
C315
1U_0402_6.3V6K
1
2
C316
1U_0402_6.3V6K
1
2
D6
RB751V40_SC76-2
1 2
R373
0_0603_5%
@
1 2
R351
100_0402_5%
12
+
C293
220U_B2_2.5VM_R15
1
2
C279
0.1U_0402_10V7K
1
2
R371
0_0603_5%
@
1 2
C312
4.7U_0603_6.3V6K
1
2
C298
0.1U_0402_10V7K
1
2
C313
0.1U_0402_10V7K
1
2
R3440_0805_5% @
12
C290
0.1U_0402_10V7K
1
2
C271
1U_0402_6.3V6K
12
C318
0.1U_0402_16V4Z
1
2
C285
0.1U_0402_10V7K
1
2
R3430_0805_5%
12
C288
2.2U_0603_10V6K
1
2
C294
1U_0402_6.3V6K
1
2
C291
1U_0402_6.3V6K
1
2
R360
0_0603_5%
@
1 2
C300
0.1U_0402_10V7K
1 2
C264
1U_0402_6.3V6K
1
2
+
C248
220U_6.3V_M @
1
2
D5
RB751V40_SC76-2
1 2
C280 0.1U_0402_10V7K
1 2
+
C292
220U_B2_2.5VM_R15
1
2
C262
0.1U_0402_10V7K
1 2
C309
0.1U_0402_10V7K
1
2
R374
0_0603_5%
@
1 2
C289
0.1U_0402_10V7K
1
2
C296
0.1U_0402_10V7K
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
PCA70 LA-7521P M/B
0.1
PCH_GND
Custom
21 64Tuesday, April 12, 2011
2010/10/1 2011/11/01
Compal Electronics, Inc.
U4I
BD82CPDS-QMZP-B0_FCBGA942
VSS[159]
BM12
VSS[160]
BM16
VSS[161]
BM22
VSS[162]
BM23
VSS[163]
BM26
VSS[164]
BM28
VSS[165]
BM32
VSS[166]
BM40
VSS[167]
BM42
VSS[168]
BM48
VSS[169]
BM5
VSS[170]
BN31
VSS[171]
BN47
VSS[173]
BP3
VSS[174]
BP33
VSS[175]
BP35
VSS[176]
BR22
VSS[177]
BR52
VSS[178]
BU19
VSS[179]
BU26
VSS[180]
BU29
VSS[181]
BU36
VSS[182]
BU39
VSS[183]
C19
VSS[184]
C32
VSS[185]
C39
VSS[186]
C4
VSS[187]
D15
VSS[188]
D23
VSS[189]
D3
VSS[190]
D35
VSS[191]
D43
VSS[192]
D45
VSS[193]
E19
VSS[194]
E39
VSS[195]
E54
VSS[196]
E6
VSS[197]
E9
VSS[198]
F10
VSS[199]
F12
VSS[200]
F16
VSS[201]
F22
VSS[202]
F26
VSS[203]
F32
VSS[204]
F33
VSS[205]
F35
VSS[206]
F36
VSS[207]
F40
VSS[208]
F42
VSS[209]
F46
VSS[210]
F48
VSS[211]
F50
VSS[212]
F8
VSS[213]
G54
VSS[214]
H15
VSS[215]
H20
VSS[216]
H22
VSS[217]
H25
VSS[218]
H27
VSS[219]
H33
VSS[220]
H6
VSS[222]
J33
VSS[223]
J46
VSS[224]
J48
VSS[225]
J5
VSS[226]
J53
VSS[227]
K52
VSS[228]
K6
VSS[229]
K9
VSS[230]
L12
VSS[231]
L17
VSS[232]
L38
VSS[233]
L41
VSS[234]
L43
VSS[235]
M20
VSS[236]
M22
VSS[237]
M25
VSS[264] U20
VSS[265] U22
VSS[266] U25
VSS[267] U27
VSS[268] U33
VSS[269] U36
VSS[270] U38
VSS[271] U41
VSS[272] U47
VSS[273] U53
VSS[274] V20
VSS[275] V38
VSS[276] V6
VSS[277] W1
VSS[278] W55
VSS[279] W57
VSS[280] Y11
VSS[281] Y15
VSS[282] Y38
VSS[283] Y40
VSS[284] Y43
VSS[285] Y46
VSS[286] Y47
VSS[288] Y52
VSS[289] Y6
VSS[290] AL43
VSS[291] AL44
VSS[292] R36
VSS[293] P36
VSS[294] R25
VSS[295] P25
VSS[238]
M27
VSS[239]
M31
VSS[240]
M33
VSS[241]
M36
VSS[242]
M46
VSS[243]
M52
VSS[244]
M57
VSS[245]
M6
VSS[246]
M8
VSS[247]
M9
VSS[248]
N4
VSS[249]
N54
VSS[250]
R11
VSS[251]
R15
VSS[287] Y49
VSS[252]
R17
VSS[253]
R22
VSS[254]
R4
VSS[255]
R41
VSS[256]
R43
VSS[257]
R46
VSS[258]
R49
VSS[262] U15
VSS[263] U17
VSS[259] T52
VSS[260] T6
VSS[261] U11
VSS[172]
BN6
VSS[221]
J1
VSSADAC AU2
U4H
BD82CPDS-QMZP-B0_FCBGA942
VSS[1]
BR36
VSS[2]
C12
VSS[3]
AY22
VSS[5]
A29
VSS[6]
A42
VSS[7]
A49
VSS[8]
A9
VSS[9]
AA20
VSS[10]
AA22
VSS[11]
AA24
VSS[12]
AA26
VSS[13]
AA28
VSS[14]
AA30
VSS[15]
AA38
VSS[16]
AB11
VSS[17]
AB15
VSS[18]
AB40
VSS[19]
AB41
VSS[20]
AB43
VSS[21]
AB47
VSS[22]
AB52
VSS[23]
AB57
VSS[24]
AB6
VSS[25]
AC22
VSS[26]
AC34
VSS[27]
AC36
VSS[28]
AC38
VSS[29]
AC4
VSS[30]
AC54
VSS[31]
AE14
VSS[33]
AE22
VSS[34]
AE26
VSS[35]
AE38
VSS[36]
AE4
VSS[37]
AE47
VSS[38]
AE8
VSS[39]
AE9
VSS[43]
AG14
VSS[44]
AG20
VSS[46]
AG30
VSS[47]
AG36
VSS[48]
AG43
VSS[49]
AG44
VSS[50]
AG46
VSS[51]
AG5
VSS[52]
AG50
VSS[53]
AG53
VSS[54]
AH52
VSS[55]
AH6
VSS[56]
AJ22
VSS[57]
AJ30
VSS[59]
AK52
VSS[60]
AK6
VSS[61]
AL11
VSS[62]
AL18
VSS[63]
AL20
VSS[64]
AL22
VSS[65]
AL26
VSS[66]
AL30
VSS[67]
AL36
VSS[68]
AL41
VSS[69]
AL46
VSS[70]
AL47
VSS[71]
AM3
VSS[72]
AM52
VSS[73]
AM57
VSS[76]
AN15
VSS[77]
AN17
VSS[78]
AN18
VSS[79]
AN20
VSS[80] AN30
VSS[81] AN36
VSS[82] AN4
VSS[83] AN43
VSS[84] AN47
VSS[85] AN54
VSS[86] AN9
VSS[87] AR20
VSS[88] AR22
VSS[89] AR52
VSS[90] AR6
VSS[91] AT15
VSS[92] AT18
VSS[93] AT43
VSS[96] AT6
VSS[97] AT8
VSS[98] AU24
VSS[99] AU26
VSS[100] AU28
VSS[102] AV12
VSS[103] AV18
VSS[104] AV22
VSS[105] AV34
VSS[106] AV38
VSS[107] AV47
VSS[108] AV6
VSS[109] AW57
VSS[110] AY38
VSS[111] AY6
VSS[112] B23
VSS[113] BA11
VSS[114] BA12
VSS[116] BA41
VSS[117] BA44
VSS[118] BA49
VSS[119] BB1
VSS[120] BB3
VSS[121] BB52
VSS[122] BB6
VSS[123] BC14
VSS[124] BC15
VSS[125] BC20
VSS[126] BC27
VSS[127] BC31
VSS[128] BC36
VSS[131] BC9
VSS[132] BD25
VSS[133] BD33
VSS[134] BF12
VSS[135] BF20
VSS[136] BF25
VSS[137] BF33
VSS[138] BF41
VSS[139] BF43
VSS[140] BF46
VSS[141] BF52
VSS[142] BF6
VSS[143] BG22
VSS[144] BG25
VSS[145] BG27
VSS[146] BG31
VSS[147] BG33
VSS[148] BG36
VSS[149] BG38
VSS[150] BH52
VSS[151] BH6
VSS[152] BJ1
VSS[153] BJ15
VSS[154] BK20
VSS[155] BK41
VSS[156] BK52
VSS[157] BK6
VSS[158] BM10
VSS[40]
AF52
VSS[42]
AG11
VSS[45]
AG22
VSS[115] BA31
VSS[0]
AE56
VSS[58]
AJ57
VSS[32]
AE18
VSS[4]
A26
VSS[74]
AN11
VSS[75]
AN12
VSS[41]
AF6
VSS[129] BC38
VSS[130] BC47
VSS[101] AU5
VSS[95] AT52
VSS[94] AT47
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PLTRST_VGA#
CLK_REQ_GPU#
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT#
+DACB_VDD
+DACA_VDD
DACA_RSET
+DACA_VREF
VGA_EDID_DATA
VGA_EDID_CLK
XTALIN
XTALSSIN
XTALOUT
+PLLVDD
VGA_LCD_PWM
VGA_BKOFF#_R
VGA_ENVDD
GPU_VID0
HDCP_SDA
HDCP_SCL
AC DETECT
GPU_VID1
I2CB_SCL
I2CB_SDA
XTAL_OUT
XTALIN XTAL_OUT
VGA_SHDMI_HPD
VGA_CRT_CLK
VGA_CRT_DATA
VGA_CRT_VSYNC
VGA_CRT_HSYNC
VGA_CRT_G
VGA_CRT_B
VGA_CRT_R
PCIE_CTX_C_GRX_N[0..15]
PCIE_CTX_C_GRX_P[0..15]
PCIE_GTX_C_CRX_P[0..15]
PCIE_GTX_C_CRX_N[0..15]
GPU_VID0
OVERTEMP ALERT
VGA_SHDMI_HPD
PCIE_CTX_C_GRX_N1
PCIE_CTX_C_GRX_P1
PCIE_CTX_C_GRX_N9
PCIE_CTX_C_GRX_P9
PCIE_CTX_C_GRX_N2
PCIE_CTX_C_GRX_P2
PCIE_CTX_C_GRX_N10
PCIE_CTX_C_GRX_P10
PCIE_CTX_C_GRX_N3
PCIE_CTX_C_GRX_P3
PCIE_CTX_C_GRX_N11
PCIE_CTX_C_GRX_P11
PCIE_CTX_C_GRX_N4
PCIE_CTX_C_GRX_P4
PCIE_CTX_C_GRX_N12
PCIE_CTX_C_GRX_P12
PCIE_CTX_C_GRX_P5
PCIE_CTX_C_GRX_N5
PCIE_CTX_C_GRX_N8
PCIE_CTX_C_GRX_P8
PCIE_CTX_C_GRX_N13
PCIE_CTX_C_GRX_P13
PCIE_CTX_C_GRX_N6
PCIE_CTX_C_GRX_P6
PCIE_CTX_C_GRX_N14
PCIE_CTX_C_GRX_P14
PCIE_CTX_C_GRX_P7
PCIE_CTX_C_GRX_N7
PCIE_CTX_C_GRX_P15
PCIE_CTX_C_GRX_N15
PCIE_CTX_C_GRX_P0
PCIE_CTX_C_GRX_N0
PCIE_GTX_CRX_P2
PCIE_GTX_CRX_N2
PCIE_GTX_C_CRX_P2
PCIE_GTX_C_CRX_N2
PCIE_GTX_CRX_P5
PCIE_GTX_CRX_N5
PCIE_GTX_C_CRX_P5
PCIE_GTX_C_CRX_N5
PCIE_GTX_CRX_P1
PCIE_GTX_CRX_N1
PCIE_GTX_C_CRX_P1
PCIE_GTX_C_CRX_N1
PCIE_GTX_CRX_P4
PCIE_GTX_CRX_N4
PCIE_GTX_C_CRX_P4
PCIE_GTX_C_CRX_N4
PCIE_GTX_CRX_P8
PCIE_GTX_CRX_N8
PCIE_GTX_C_CRX_P8
PCIE_GTX_C_CRX_N8
PCIE_GTX_CRX_P6
PCIE_GTX_CRX_N6
PCIE_GTX_C_CRX_P6
PCIE_GTX_C_CRX_N6
PCIE_GTX_CRX_P12
PCIE_GTX_CRX_N12
PCIE_GTX_C_CRX_P12
PCIE_GTX_C_CRX_N12
PCIE_GTX_CRX_P7
PCIE_GTX_CRX_N7
PCIE_GTX_C_CRX_P7
PCIE_GTX_C_CRX_N7
PCIE_GTX_CRX_P10
PCIE_GTX_CRX_N10
PCIE_GTX_C_CRX_P10
PCIE_GTX_C_CRX_N10
PCIE_GTX_CRX_P9
PCIE_GTX_CRX_N9
PCIE_GTX_C_CRX_P9
PCIE_GTX_C_CRX_N9
PCIE_GTX_CRX_P14
PCIE_GTX_CRX_N14
PCIE_GTX_C_CRX_P14
PCIE_GTX_C_CRX_N14 PCIE_GTX_CRX_P15
PCIE_GTX_CRX_N15
PCIE_GTX_C_CRX_P15
PCIE_GTX_C_CRX_N15
PCIE_GTX_CRX_P0
PCIE_GTX_CRX_N0
PCIE_GTX_C_CRX_P0
PCIE_GTX_C_CRX_N0
PCIE_GTX_CRX_P13
PCIE_GTX_CRX_N13
PCIE_GTX_C_CRX_P13
PCIE_GTX_C_CRX_N13
PCIE_GTX_CRX_P3
PCIE_GTX_CRX_N3
PCIE_GTX_C_CRX_P3
PCIE_GTX_C_CRX_N3
PCIE_GTX_CRX_N11
PCIE_GTX_CRX_P11PCIE_GTX_C_CRX_P11
PCIE_GTX_C_CRX_N11
PLTRST_VGA#
GPU_VID1
VGA_LCD_PWM
VGA_ENVDD
VGA_BKOFF#_R
GPU_VID0 [60]
GPU_VID1 [60]
CLK_PCIE_VGA[14]CLK_PCIE_VGA#[14]
PCIE_GTX_C_CRX_P[0..15][6]
PCIE_GTX_C_CRX_N[0..15][6]
PCIE_CTX_C_GRX_P[0..15][6]
PCIE_CTX_C_GRX_N[0..15][6]
VGA_ENVDD [35]
VGA_LCD_PWM [35]
VGA_BKOFF#_R [49]
THERM#_VGA_R [23]
SMB_DATA_GPU[23] SMB_CLK_GPU[23]
VGA_HDMIOUT_HPD [38]
VGA_SHDMI_HPD [36]
PLT_RST#[5,17,45,49]
DGPU_HOLD_RST#[17]
+3VGS
+3VGS
+3VGS
+3VGS
+3VGS
+3VS
+1.05VGS
Title
Size Document Number R ev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
PCA70 LA-7521P M/B
0.1
VGA_PCIE/DAC/GPIO
22 64Tuesday, April 12, 2011
2009/01/01 2010/01/01
Compal Electronics, Inc.
120mA
CRT
60mA
45mA
45mA
LVDS
Close to GPU
(Reserve for debug)
PCI-Express Gen2 x16 Interface
CRT
IFPAB HOTPLUG DETECT
IFPC HOTPLUG DETECT
NVVDD ALTV0
NVVDD ALTV1
PANEL BACKLIGHT ENABLE
PANEL POWER ENABLE
PANEL BACKLIGHT PWM
RESERVED
FB_VREF CONTROL
THERMAL ALERT
OVERTEMP ALERT
FBVDDQ ALTV
LOAD STEP UP
LOAD STEP DOWN
AC DETECT
FAN TACH IN
FAN PWM OUT
IFPE HOTPLUG DETECT
IFPD HOTPLUG DETECT
RESERVED
RESERVED
IFPF HOTPLUG DETECT
RESERVED
GPIO Description
GPIO0
GPIO1
GPIO2
GPIO3
RESERVED
RESERVED
IN
IN
OUT
OUT
OUT
OUT
OUT
OUT
IN/OUT
OUT
OUT
OUT
IN
OUT
OUT
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
N/A
N/A
HIGH
HIGH
HIGH
HIGH
HIGH
HIGH
LOW
LOW
HIGH
HIGH
N/A
LOW
HIGH
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21
GPIO22
GPIO23
GPIO24
ACTIVE
I/OGPIO USAGE
(Reserve for debug)
150mA
C1095 0.1U_0402_10V7KDIS@
1 2
R1130 10M_0402_5%
@
1 2
R1121
124_0402_1%
DIS@
12
C1097 0.1U_0402_10V7KDIS@
1 2
C1108
10U_0603_6.3V6M
DIS@
1
2
R1118
150_0402_1%
DIS@
1 2
Y8
27MHZ_16PF_X5H027000FG1H
DIS@
1 2
R11242.2K_0402_5% DIS@
1 2
C1083 0.1U_0402_10V7KDIS@
1 2
C1088 0.1U_0402_10V7KDIS@
1 2
R1625
100_0402_1%
DIS@
1 2
C1087 0.1U_0402_10V7KDIS@
1 2
R11232.2K_0402_5% DIS@
1 2
C1111
0.1U_0402_16V4Z
DIS@
1
2
C1104 0.1U_0402_10V7KDIS@
1 2
R1113
2.49K_0402_1%
DIS@
1 2
C1075 0.1U_0402_10V7KDIS@
1 2
R1109 100K_0402_5%DIS@
1 2
C1110
0.1U_0402_16V4Z
DIS@
1
2
L70
MMZ1608D301BT_0603
DIS@
1 2
C1077 0.1U_0402_10V7KDIS@
1 2
L69
BLM18PG330SN1D_0603
DIS@
1 2
C1092 0.1U_0402_10V7KDIS@
1 2
U95
NC7SZ08P5X_NL_SC70-5 DIS@
B
2
A
1Y4
P5
G
3
R1517 100K_0402_5%DIS@
1 2
C1117
4.7U_0603_6.3V6K
DIS@
1
2
R11222.2K_0402_5% DIS@
1 2
C1096 0.1U_0402_10V7KDIS@
1 2
C1121
18P_0402_50V8J
DIS@
1
2
C1119
1U_0402_6.3V6K
DIS@
1
2
C1080 0.1U_0402_10V7KDIS@
1 2
C1109
0.1U_0402_16V4Z
DIS@
1
2
C1115
0.1U_0402_16V4Z
DIS@
1
2
C1120
18P_0402_50V8J
DIS@
1
2
C1103 0.1U_0402_10V7KDIS@
1 2
R1626
100K_0402_5%
DIS@
12
R11262.2K_0402_5% DIS@
1 2
C1094 0.1U_0402_10V7KDIS@
1 2
R1112 10K_0402_5%DIS@
1 2
C1102 0.1U_0402_10V7KDIS@
1 2
R1116
10K_0402_5%
DIS@
12
R1650 10K_0402_5%DIS@
1 2
C1098 0.1U_0402_10V7KDIS@
1 2
R1111 10K_0402_5%DIS@
1 2
R1651 10K_0402_5%DIS@
1 2
R1115
150_0402_1%
DIS@
1 2
C1114
0.1U_0402_16V4Z
DIS@
1
2
C1079 0.1U_0402_10V7KDIS@
1 2
C1099 0.1U_0402_10V7KDIS@
1 2
C1118
0.1U_0402_16V4Z
DIS@
1
2
C1084 0.1U_0402_10V7KDIS@
1 2
R1110
200_0402_1%
DIS@
1 2
C1107
10U_0603_6.3V6M
DIS@
1
2
C1076 0.1U_0402_10V7KDIS@
1 2
R11192.2K_0402_5% DIS@
12
R1114
150_0402_1%
DIS@
1 2
T215
R1108 10K_0402_5% DIS@
1 2
C1090 0.1U_0402_10V7KDIS@
1 2
R1127
10K_0402_5%
DIS@
12
C1089 0.1U_0402_10V7KDIS@
1 2
R11252.2K_0402_5% DIS@
1 2
R1652 10K_0402_5%DIS@
1 2
C1101 0.1U_0402_10V7KDIS@
1 2
C1105 0.1U_0402_10V7KDIS@
1 2
R11202.2K_0402_5% DIS@
12
T214
C1093 0.1U_0402_10V7KDIS@
1 2
C1116
4.7U_0603_6.3V6K
DIS@
1
2
R1519 100K_0402_5%DIS@
1 2
C1081 0.1U_0402_10V7KDIS@
1 2
R1520 100K_0402_5%
DIS@
1 2
C1085 0.1U_0402_10V7KDIS@
1 2
R1117
10K_0402_5%
DIS@
12
C1106 0.1U_0402_10V7KDIS@
1 2
C1091 0.1U_0402_10V7KDIS@
1 2
R1518 100K_0402_5%DIS@
1 2
R11282.2K_0402_5% DIS@
1 2
C1078 0.1U_0402_10V7KDIS@
1 2
C1112
0.1U_0402_16V4Z
DIS@
1
2
C1100 0.1U_0402_10V7KDIS@
1 2
DVO
PCI EXPRESS
CLK
Part 1 of 7
DACs
I2C
GPIO
U58A
N12P-GS-A1_BGA_973P GS@
PEX_RX0
AP17
PEX_RX0_N
AN17
PEX_RX1
AN19
PEX_RX1_N
AP19
PEX_RX2
AR19
PEX_RX2_N
AR20
PEX_RX3
AP20
PEX_RX3_N
AN20
PEX_RX4
AN22
PEX_RX4_N
AP22
PEX_RX5
AR22
PEX_RX5_N
AR23
PEX_RX6
AP23
PEX_RX6_N
AN23
PEX_RX7
AN25
PEX_RX7_N
AP25
PEX_RX8
AR25
PEX_RX8_N
AR26
PEX_RX9
AP26
PEX_RX9_N
AN26
PEX_RX10
AN28
PEX_RX10_N
AP28
PEX_RX11
AR28
PEX_RX11_N
AR29
PEX_RX12
AP29
PEX_RX12_N
AN29
PEX_RX13
AN31
PEX_RX13_N
AP31
PEX_RX14
AR31
PEX_RX14_N
AR32
PEX_RX15
AR34
PEX_RX15_N
AP34
PEX_TX0
AL17
PEX_TX0_N
AM17
PEX_TX1
AM18
PEX_TX1_N
AM19
PEX_TX2
AL19
PEX_TX2_N
AK19
PEX_TX3
AL20
PEX_TX3_N
AM20
PEX_TX4
AM21
PEX_TX4_N
AM22
PEX_TX5
AL22
PEX_TX5_N
AK22
PEX_TX6
AL23
PEX_TX6_N
AM23
PEX_TX7
AM24
PEX_TX7_N
AM25
PEX_TX8
AL25
PEX_TX8_N
AK25
PEX_TX9
AL26
PEX_TX9_N
AM26
PEX_TX10
AM27
PEX_TX10_N
AM28
PEX_TX11
AL28
PEX_TX11_N
AK28
PEX_TX12
AK29
PEX_TX12_N
AL29
PEX_TX13
AM29
PEX_TX13_N
AM30
PEX_TX14
AM31
PEX_TX14_N
AM32
PEX_TX15
AN32
PEX_TX15_N
AP32
PEX_REFCLK
AR16
PEX_REFCLK_N
AR17
PEX_RST_N
AM16
XTAL_IN
B1
XTAL_OUT
B2
XTAL_OUTBUFF
D1
XTAL_SSIN
D2
GPIO0 K1
GPIO1 K2
GPIO2 K3
GPIO3 H3
GPIO4 H2
GPIO5 H1
GPIO6 H4
GPIO7 H5
GPIO8 H6
GPIO9 J7
GPIO10 K4
GPIO11 K5
GPIO12 H7
MIOA_D0_NC N1
MIOA_D1_NC P4
MIOA_D2_NC P1
MIOA_D3_NC P2
MIOA_D4_NC P3
MIOA_D5_NC T3
MIOA_D6_NC T2
MIOA_D7_NC T1
MIOA_D8_NC U4
MIOA_D9_NC U1
MIOA_D10_NC U2
MIOA_D11_NC U3
MIOA_HSYNC_NC N3
MIOA_VSYNC_NC L3
MIOA_CLKOUT_NC R4
MIOA_CLKOUT_NC_N T4
MIOB_HSYNC_NC W1
MIOB_VSYNC_NC W2
MIOB_DE_NC Y5
MIOB_CTL3_NC W3
MIOB_CLKIN_NC AE1
MIOB_CLKOUT_NC V4
MIOB_CLKOUT_NC_N W4
MIOB_VREF_NC AF1
DACA_HSYNC AM13
DACA_VSYNC AL13
DACA_RED AM15
DACA_BLUE AL14
DACA_GREEN AM14
DACA_RSET AK13
DACA_VREF AK12
PEX_TSTCLK_OUT
AJ17
PEX_TSTCLK_OUT_N
AJ18
I2CS_SDA
E1
I2CA_SCL
G1
I2CA_SDA
G4
I2CB_SCL
G3
I2CB_SDA
G2
I2CC_SCL
E3
I2CC_SDA
E4
GPIO13 J4
GPIO14 J6
I2CS_SCL
E2
GPIO15 L1
GPIO16 L2
GPIO17 L4
GPIO18 M4
GPIO19 L7
GPIO20 L5
GPIO21 K6
GPIO22 L6
GPIO23 M6
MIOA_D12_NC R6
MIOA_D13_NC T6
MIOA_D14_NC N6
MIOA_CLKIN_NC N4
MIOB_D14_NC Y6
PEX_TERMP
AG21
I2CH_SCL
F6
I2CH_SDA
G6
DACB_RED AK4
DACB_GREEN AL4
DACB_BLUE AJ4
DACB_VREF AK6
DACB_RSET AH7
PEX_CLKREQ_N
AR13
DACB_HSYNC AM1
DACB_VSYNC AM2
MIOB_D0_NC Y1
MIOB_D1_NC Y2
MIOB_D2_NC Y3
MIOB_D3_NC AB3
MIOB_D4_NC AB2
MIOB_D5_NC AB1
MIOB_D6_NC AC4
MIOB_D7_NC AC1
MIOB_D8_NC AC2
MIOB_D9_NC AC3
MIOBD_10_NC AE3
MIOB_D11_NC AE2
MIOB_D12_NC U6
MIOB_D13_NC W6
MIOACAL_PD_VDDQ_NC U5
MIOBCAL_PD_VDDQ_NC AA7
MIOACAL_PU_GND_NC T5
MIOBCAL_PU_GND_NC AA6
MIOA_DE_NC N2
MIOA_CTL3_NC P5
MIOA_VREF_NC N5
PLLVDD
AE9
SP_PLLVDD
AF9
VID_PLLVDD
AD9
DACA_VDD AJ12
DACB_VDD AG7
GPIO24 M7
C1082 0.1U_0402_10V7KDIS@
1 2
C1086 0.1U_0402_10V7KDIS@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ROM_SI
ROM_SO
ROM_SCLK
TESTMODE
ROM_CS#
THERM_D+
THERM_D-
THERM_D+
THERM_D-
SMB_CLK_GPU
SMB_DATA_GPU
SMB_DATA_GPU
SMB_CLK_GPU
ROM_CS# ROM_SCLKSPI_WP#_VGA
SPI_HOLD#_VGA ROM_SO
ROM_SI
VPGOOD
STRAP_REF2
STRAP3
STRAP4
ROM_SI [33]
ROM_SO [33]
ROM_SCLK [33]
STRAP0[33] STRAP1[33] STRAP2[33]
VGA_SENSE [60]
EC_SMB_CK2 [14,49,52]
EC_SMB_DA2 [14,49,52]
SMB_DATA_GPU [22]
SMB_CLK_GPU [22]
THERM#_VGA_R [22]
GND_SENSE [60]
STRAP4 [33]
STRAP3 [33]
+3VGS
+3VGS
+3VGS
+3VGS
+3VGS
+3VGS
+3VGS
+3VGS
+3VGS
+3VGS
VGA_HDMI_ETXC-[38]
VGA_HDMI_ETXD2+[38] VGA_HDMI_ETXD2-[38] VGA_HDMI_ETXD1+[38] VGA_HDMI_ETXD1-[38] VGA_HDMI_ETXD0+[38] VGA_HDMI_ETXD0-[38] VGA_HDMI_ETXC+[38]
VGA_HDMI_ECLK[38]VGA_HDMI_EDATA[38]
VGA_SHDMI_ETXC-[36]
VGA_SHDMI_ETXD2+[36] VGA_SHDMI_ETXD2-[36] VGA_SHDMI_ETXD1+[36] VGA_SHDMI_ETXD1-[36] VGA_SHDMI_ETXD0+[36] VGA_SHDMI_ETXD0-[36] VGA_SHDMI_ETXC+[36]
VGA_SHDMI_ECLK[36]VGA_SHDMI_EDATA[36]
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
PCA70 LA-7521P M/B
0.1
VGA_LVDS/HDMI/THERM/eDP
23 64Tuesday, April 12, 2011
2009/01/01 2010/01/01
Compal Electronics, Inc.
Address: 0x9A H
External VGA Thermal Sensor
To EC
To VGA
Internal Thermal Sensor
Address: 0x9E H
LinkA
LinkD
LinkB
LinkE
LinkF
LinkC
LVDS(Single Link or Dual Link
with IFPB)
LVDS(Dual Link with IFPA)
Display Port/DVI(Dual Link with IFPE)
Display Port/DVI(Single Link
or Dual Link with IFPF))/HDMI
Display Port/eDP
Display Port/HDMI
Display Interface Support
Channel A Channel B
To HDMI OUT
To HDMI OUT
Reserve VBIOS for NV suggest (1Mbit)
if unuse this pin , pull down 36k
For GB2-128 & GB2b-128 colayout....
R1143 40.2K_0402_1%DIS@
1 2
R1140
10K_0402_5%
DIS@
12
T217
R1646 40.2K_0402_1%
GV@
1 2
T219
R1136
2.2K_0402_5%
DIS@
1 2
R1139 2.2K_0402_5% DIS@
1 2
C1123
2200P_0402_50V7K
@
1 2
R379
10K_0402_5%
@
12
Q75B
2N7002KDWH_SOT363-6
DIS@
34
5
R1138 2.2K_0402_5% DIS@
1 2
R1134
100K_0402_5%
DIS@
1 2
R750 4.7K_0402_5%
@
1 2
R1144
10K_0402_5%
DIS@
1 2
R1141 10K_0402_5%
DIS@
1 2
T218
C1122 0.1U_0402_16V4Z@
12
U54
MX25L1005AMC-12G_SOP8
@
CE#
1
SO 2
WP#
3
VSS
4SI 5
SCK 6
HOLD#
7
VDD 8
R1145 40.2K_0402_1%DIS@
1 2
T216
R1579 2.2K_0402_5% DIS@
1 2
R1135
2.2K_0402_5%
DIS@
1 2
Part 4 of 7
LVDS/TMDS
NC
GENERAL
SERIAL
TEST
U58D
N12P-GS-A1_BGA_973P GS@
IFPA_TXC_N
AM12 IFPA_TXC
AM11 NC_0 A2
NC_1 A7
NC_2 B7
NC_3 C5
NC_4 C7
NC_5 D5
NC_6 D6
NC_7 D7
NC_8 E5
NC_9 E7
NC_10 F4
NC_11 G5
NC_12 H32
IFPA_TXD0
AM8
IFPA_TXD0_N
AL8
IFPA_TXD1
AM10
IFPA_TXD1_N
AM9
IFPA_TXD2
AK10
IFPA_TXD2_N
AL10
IFPA_TXD3
AK11
IFPA_TXD3_N
AL11
IFPB_TXC
AP13
IFPB_TXC_N
AN13
IFPB_TXD4
AN8
IFPB_TXD4_N
AP8
IFPB_TXD5
AP10
IFPB_TXD5_N
AN10
IFPB_TXD6
AR11
IFPB_TXD6_N
AR10
IFPB_TXD7
AN11
IFPB_TXD7_N
AP11
IFPC_L0
AM7
IFPC_L0_N
AM6
IFPC_L1
AL5
IFPC_L1_N
AM5
IFPC_L2
AM3
IFPC_L2_N
AM4
IFPC_L3
AP1
IFPC_L3_N
AR2
IFPD_L0
AR8
IFPD_L0_N
AR7
IFPD_L1
AP7
IFPD_L1_N
AN7
NC_13 J25
NC_14 J26
NC_15 P6
IFPD_L2_N
AP5
IFPD_L3_N
AR4
IFPD_L2
AN5
IFPD_L3
AR5
IFPE_L0
AH6
IFPE_L0_N
AH5
IFPE_L1
AH4
IFPE_L1_N
AG4
IFPE_L2
AF4
IFPE_L2_N
AF5
IFPE_L3
AE6
IFPE_L3_N
AE5
IFPF_L0
AL2
IFPF_L0_N
AL3
IFPF_L1
AJ3
IFPF_L1_N
AJ2
IFPF_L2
AJ1
IFPF_L2_N
AH1
IFPF_L3
AH2
IFPF_L3_N
AH3
NC_16 U7
NC_17 V6
NC_18 Y4
NC_19 AA4
NC_20 AB4
NC_21 AB7
NC_22 AC5
NC_23 AD6
NC_24 AF6
NC_25 AG6
NC_26 AG20
NC_27 AJ5
NC_28 AK15
NC_29 AL7
STRAP0
W5
STRAP1
W7
STRAP2
V7
CEC
AB5
THERMDP B5
THERMDN B4
NC/SPDIF_NC A5
ROM_CS_N C3
ROM_SI D3
ROM_SO C4
ROM_SCLK D4
IFPF_AUX_I2CZ_SCL
AF3
IFPF_AUX_I2CZ_SDA_N
AF2
IFPE_AUX_I2CY_SCL
AE4
IFPE_AUX_I2CY_SDA_N
AD4
IFPD_AUX_I2CX_SCL
AP4
IFPD_AUX_I2CX_SDA_N
AN4
IFPC_AUX_I2CW_SCL
AP2
IFPC_AUX_I2CW_SDA_N
AN3
VDD_SENSE_0 D35
VDD_SENSE_1 P7
VDD_SENSE_2 AD20
GND_SENSE_0 AD19
GND_SENSE_1 E35
GND_SENSE_2 R7
BUFRST_N
A4
MULTI_STRAP_REF0_GND N9
MULTI_STRAP_REF1_GND M9
TESTMODE AP35
JTAG_TCK AP14
JTAG_TDI AN14
JTAG_TDO AN16
JTAG_TMS AR14
JTAG_TRST_N AP16
R1643 10K_0402_5%
GV@
1 2
R754 4.7K_0402_5%
@
1 2
R1578 2.2K_0402_5% DIS@
1 2
Q75A
2N7002KDWH_SOT363-6
DIS@
61
2
C1447
0.1U_0402_16V4Z
@
1
2
U60
ADM1032ARMZ-2REEL_MSOP8
@
VDD
1
ALERT# 6
THERM#
4GND 5
D+
2
D-
3
SCLK 8
SDATA 7
R1627 36K_0402_1%DIS@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VGA_CORE+VGA_CORE
+VGA_CORE
+VGA_CORE
+VGA_CORE
+VGA_CORE
+VGA_CORE
+VGA_CORE
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
PCA70 LA-7521P M/B
0.1
VGA_VGA CORE
24 64Tuesday, April 12, 2011
2009/01/01 2010/01/01
Compal Electronics, Inc.
41A for N12P-GS
C1147
0.022U_0402_25V7K
DIS@
1
2
C1148
0.022U_0402_25V7K
DIS@
1
2
+
C1129
330U_2.5V_M_R17
DIS@
1
2
C1137
0.01U_0402_25V7K
DIS@
1
2
C1128
22U_0603_6.3V6M
DIS@
1
2
C1136
0.01U_0402_25V7K
DIS@
1
2
C1133
0.01U_0402_25V7K
DIS@
1
2
C1150
1U_0402_6.3V6K
DIS@
1
2
C1145
0.1U_0402_16V7K
DIS@
1
2
C1151
4.7U_0603_6.3V6K
DIS@
1
2
C1138
0.01U_0402_25V7K
DIS@
1
2
C1135
0.01U_0402_25V7K
DIS@
1
2
+
C1130
330U_2.5V_M_R17
DIS@
1
2
C1143
0.047U_0402_25V6K
DIS@
1
2
C1127
22U_0603_6.3V6M
DIS@
1
2
C1141
0.022U_0402_25V7K
DIS@
1
2
C1134
0.01U_0402_25V7K
DIS@
1
2
C1139
0.022U_0402_25V7K
DIS@
1
2
C1146
0.1U_0402_16V7K
DIS@
1
2
C1152
10U_0603_6.3V6M
DIS@
1
2
C1154
22U_0805_6.3V6M
DIS@
1
2
C1131
0.01U_0402_25V7K
DIS@
1
2
C1142
0.047U_0402_25V6K
DIS@
1
2
C1144
0.047U_0402_25V6K
DIS@
1
2
C1126
22U_0603_6.3V6M
DIS@
1
2
POWER
Part 7 of 7
U58G
N12P-GS-A1_BGA_973P GS@
VDD_0
AB11
VDD_1
AB13
VDD_2
AB15
VDD_3
AB17
VDD_4
AB19
VDD_5
AB21
VDD_6
AB23
VDD_7
AB25
VDD_8
AC11
VDD_9
AC12
VDD_10
AC13
VDD_11
AC14
VDD_12
AC15
VDD_13
AC16
VDD_14
AC17
VDD_15
AC18
VDD_16
AC19
VDD_17
AC20
VDD_18
AC21
VDD_19
AC22
VDD_20
AC23
VDD_21
AC24
VDD_22
AC25
VDD_23
AD12
VDD_24
AD14
VDD_25
AD16
VDD_26
AD18
VDD_27
AD22
VDD_28
AD24
VDD_29
L11
VDD_30
L12
VDD_31
L13
VDD_32
L14
VDD_33
L15
VDD_34
L16
VDD_35
L17
VDD_36
L18
VDD_37
L19
VDD_38
L20
VDD_39
L21
VDD_40
L22
VDD_41
L23
VDD_42
L24
VDD_43
L25
VDD_44
M12
VDD_45
M14
VDD_46
M16
VDD_47
M18
VDD_48
M20
VDD_49
M22
VDD_50
M24
VDD_51
P11
VDD_52
P13
VDD_53
P15
VDD_54
P17
VDD_55
P19
VDD_81 V11
VDD_82 V13
VDD_83 V15
VDD_84 V17
VDD_85 V19
VDD_86 V21
VDD_87 V23
VDD_88 V25
VDD_89 W11
VDD_90 W12
VDD_91 W13
VDD_92 W14
VDD_93 W15
VDD_94 W16
VDD_95 W17
VDD_96 W18
VDD_97 W19
VDD_98 W20
VDD_99 W21
VDD_100 W22
VDD_101 W23
VDD_102 W24
VDD_103 W25
VDD_104 Y12
VDD_105 Y14
VDD_106 Y16
VDD_107 Y18
VDD_108 Y20
VDD_109 Y22
VDD_110 Y24
VDD_58 P25
VDD_59 R11
VDD_60 R12
VDD_61 R13
VDD_62 R14
VDD_63 R15
VDD_64 R16
VDD_65 R17
VDD_66 R18
VDD_67 R19
VDD_68 R20
VDD_69 R21
VDD_70 R22
VDD_71 R23
VDD_72 R24
VDD_73 R25
VDD_74 T12
VDD_75 T14
VDD_76 T16
VDD_77 T18
VDD_78 T20
VDD_79 T22
VDD_80 T24
VDD_56 P21
VDD_57 P23
C1132
0.01U_0402_25V7K
DIS@
1
2
C1149
0.022U_0402_25V7K
DIS@
1
2
C1153
10U_0603_6.3V6M
DIS@
1
2
C1140
0.022U_0402_25V7K
DIS@
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+IFPEF_PLLVDD
+PEX_SVDD_3V3
+PEX_PLLVDD
+IFPC_PLLVDD
+IFPC_IOVDD
+IFPE_IOVDD
+IFPC_IOVDD
+IFPC_PLLVDD
+IFPEF_PLLVDD
+IFPE_IOVDD
+3VGS
+3VGS
+3VGS
+3VGS
+1.5VGS
+1.5VGS
+1.05VGS
+1.05VGS
+1.05VGS
+1.05VGS
+1.05VGS
+1.05VGS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
PCA70 LA-7521P M/B
0.1
VGA_POWER
25 64Tuesday, April 12, 2011
2009/01/01 2010/01/01
Compal Electronics, Inc.
2500mA
120mA
7.2A
120mA
120mA
220mA
220mA
220mA
285mA
285mA
285mA
285mA
close to Pin AE7close to Pin AD7
close to Pin AK8 close to Pin AJ8
close to Pin AJ9 close to Pin AC6
C1225
1U_0402_6.3V6K
DISO@
1
2
C1159
0.1U_0402_16V4Z
DIS@
1
2
R1636
10K_0402_5%
OPT@
12
C1224
0.1U_0402_16V4Z
DISO@
1
2
R1654 1K_0402_1%
DIS@
1 2
C1166
10U_0603_6.3V6M
DIS@
1
2
C1161
0.1U_0402_16V4Z
DIS@
1
2
C1200
0.1U_0402_16V4Z
DIS@
1
2
R1635
10K_0402_5%
OPT@
12
C1187
1U_0402_6.3V6K
DIS@
1
2
C1176
0.1U_0402_16V4Z
DIS@
1
2
R1634
10K_0402_5%
DIS@
12
C1208
4.7U_0603_6.3V6K
DIS@
1
2
L77
BLM18PG181SN1D_0603
DISO@
12
C1212
0.1U_0402_16V4Z
DIS@
1
2
C1186
1U_0402_6.3V6K
DIS@
1
2
C1172
1U_0402_6.3V6K
DIS@
1
2
C1163
1U_0402_6.3V6K
DIS@
1
2
C1193
0.1U_0402_16V4Z
DIS@
1
2
C1157
4.7U_0603_6.3V6K
DIS@
1
2
C1162
0.1U_0402_16V4Z
DIS@
1
2
C1179
0.1U_0402_16V4Z
DIS@
1
2
R1147 1K_0402_1%DIS@
1 2
C1180
0.1U_0402_16V4Z
DIS@
1
2
C1155
4.7U_0603_6.3V6K
DIS@
1
2
C1211
0.1U_0402_16V4Z
DIS@
1
2
C1171
1U_0402_6.3V6K
DIS@
1
2
C1215
1U_0402_6.3V6K
DISO@
1
2
C1210
1U_0402_6.3V6K
DIS@
1
2
C1228
4.7U_0603_6.3V6K
DISO@
1
2
R1653 0_0603_5%@
12
C1175
22U_0805_6.3V6M
DIS@
1
2
R1632
0_0603_5%
@
1 2
C1203
1U_0402_6.3V6K
DIS@
1
2
C1216
0.1U_0402_16V4Z
DISO@
1
2
L71 MBC1608121YZF_0603
DIS@
12
C1194
4.7U_0603_6.3V6K
DIS@
1
2
C1178
0.1U_0402_16V4Z
DIS@
1
2
C1223
0.1U_0402_16V4Z
DISO@
1
2
C1202
0.1U_0402_16V4Z
DIS@
1
2
R1630 0_0603_5%
DIS@
12
C1174
10U_0603_6.3V6M
DIS@
1
2
C1158
1U_0402_6.3V6K
DIS@
1
2
L75
BLM18PG181SN1D_0603
DISO@
12
R1629 10K_0402_5%DIS@
1 2
C1209
0.1U_0402_16V4Z
DIS@
1
2
R1148 1K_0402_1%
@
1 2
C1156
1U_0402_6.3V6K
DIS@
1
2
C1222
4.7U_0603_6.3V6K
DISO@
1
2
C1182
0.1U_0402_16V4Z
DIS@
1
2
R1149 1K_0402_1%DIS@
1 2
Part 5 of 7
POWER
U58E
N12P-GS-A1_BGA_973P GS@
PEX_IOVDDQ_0 AG11
PEX_IOVDDQ_1 AG12
PEX_IOVDDQ_2 AG13
PEX_IOVDDQ_3 AG15
PEX_IOVDDQ_4 AG16
PEX_IOVDDQ_5 AG17
PEX_IOVDDQ_6 AG18
PEX_IOVDDQ_7 AG22
PEX_IOVDDQ_8 AG23
PEX_IOVDDQ_9 AG24
PEX_IOVDDQ_10 AG25
PEX_IOVDDQ_11 AG26
PEX_IOVDDQ_12 AJ14
PEX_IOVDDQ_13 AJ15
PEX_IOVDDQ_14 AJ19
PEX_IOVDDQ_15 AJ21
PEX_IOVDDQ_16 AJ22
PEX_IOVDDQ_17 AJ24
PEX_IOVDDQ_18 AJ25
PEX_IOVDDQ_19 AJ27
PEX_IOVDDQ_20 AK18
PEX_IOVDDQ_21 AK20
PEX_IOVDDQ_22 AK23
PEX_IOVDDQ_23 AK26
PEX_IOVDDQ_24 AL16
IFPA_IOVDD
AG9
IFPB_IOVDD
AG10
IFPC_IOVDD
AJ8
IFPD_IOVDD
AK8
IFPE_IOVDD
AE7
IFPF_IOVDD
AD7
IFPAB_PLLVDD
AK9
IFPC_PLLVDD
AJ9
IFPEF_PLLVDD
AJ6
IFPD_PLLVDD
AC6
FBVDDQ_0
J23
FBVDDQ_1
J24
FBVDDQ_2
J29
FBVDDQ_3
AA27
FBVDDQ_4
AA29
FBVDDQ_5
AA31
FBVDDQ_6
AB27
FBVDDQ_7
AB29
FBVDDQ_8
AC27
FBVDDQ_9
AD27
FBVDDQ_10
AE27
FBVDDQ_11
AJ28
FBVDDQ_12
B18
FBVDDQ_13
E21
FBVDDQ_14
G17
FBVDDQ_15
G18
FBVDDQ_16
G22
FBVDDQ_17
G8
FBVDDQ_18
G9
FBVDDQ_19
H29
FBVDDQ_20
J14
FBVDDQ_21
J15
FBVDDQ_22
J16
FBVDDQ_23
J17
FBVDDQ_24
J20
FBVDDQ_25
J21
FBVDDQ_26
J22
FBVDDQ_27
N27
FBVDDQ_28
P27 PEX_IOVDD_0 AK16
PEX_IOVDD_1 AK17
PEX_IOVDD_2 AK21
PEX_IOVDD_3 AK24
PEX_IOVDD_4 AK27
FBVDDQ_29
R27
FBVDDQ_30
T27
FBVDDQ_31
U27
FBVDDQ_32
U29
FBVDDQ_33
V27
FBVDDQ_34
V29
FBVDDQ_35
V34
FBVDDQ_36
W27
FBVDDQ_37
Y27
PEX_SVDD_3V3 AG19
PEX_SVDD_3V3_NC F7
VDD33_0 J10
VDD33_1 J11
VDD33_2 J12
VDD33_3 J13
VDD33_4 J9
PEX_PLLVDD AG14
MIOA_VDDQ_NC_0 P9
MIOA_VDDQ_NC_1 R9
MIOA_VDDQ_NC_2 T9
MIOA_VDDQ_NC_3 U9
MIOB_VDDQ_NC_0 AA9
MIOB_VDDQ_NC_1 AB9
MIOB_VDDQ_NC_2 W9
MIOB_VDDQ_NC_3 Y9
IFPAB_RSET
AJ11
IFPC_RSET
AK7
IFPD_RSET
AB6
IFPEF_RSET
AL1
C1164
1U_0402_6.3V6K
DIS@
1
2
R1655 1K_0402_1%
DIS@
1 2
C1167
22U_0805_6.3V6M
DIS@
1
2
C1217
0.1U_0402_16V4Z
DISO@
1
2
C1169
0.1U_0402_16V4Z
DIS@
1
2
C1173
4.7U_0603_6.3V6K
DIS@
1
2
C1201
0.1U_0402_16V4Z
DIS@
1
2
R1628
10K_0402_5%
OPT@
12
R1637
10K_0402_5%
OPT@
12
C1229
0.1U_0402_16V4Z
DISO@
1
2
L74
BLM18PG181SN1D_0603
DIS@
12
R1633
10K_0402_5%
DIS@
12
C1170
0.1U_0402_16V4Z
DIS@
1
2
L76
BLM18PG181SN1D_0603
DISO@
12
C1177
0.1U_0402_16V4Z
DIS@
1
2
C1214
4.7U_0603_6.3V6K
DISO@
1
2
R1146 1K_0402_1%DIS@
1 2
R1631 10K_0402_5%DIS@
1 2
C1185
4.7U_0603_6.3V6K
DIS@
1
2
C1181
0.1U_0402_16V4Z
DIS@
1
2
C1213
0.1U_0402_16V4Z
DISO@
1
2
C1231
0.1U_0402_16V4Z
DISO@
1
2
C1230
0.1U_0402_16V4Z
DISO@
1
2
C1204
4.7U_0603_6.3V6K
DIS@
1
2
C1226
0.1U_0402_16V4Z
DISO@
1
2
C1165
4.7U_0603_6.3V6K
DIS@
1
2
C1183
0.1U_0402_16V4Z
DIS@
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DGPU_PWR_EN#
DGPU_PWR_EN
DGPU_PWR_EN#
DGPU_PWR_EN#
DGPU_PWR_EN#
DGPU_PWR_EN#
DGPU_PWR_EN#
DGPU_PWR_EN
DGPU_PWR_EN[17,60]
+3VS +3VGS
+3VS
+1.5V +1.5VGS
+1.05VS_VPCH +1.05VGS
+12VS
+12VS
+3VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
PCA70 LA-7521P M/B
0.1
VGA_GND/POWER
26 64Tuesday, April 12, 2011
2009/01/01 2010/01/01
Compal Electronics, Inc.
+3.3VS TO +3.3VGS
+1.5V TO +1.5VGS
+1.05VS_VCCIO TO +1.05VGS
Power Sequence of N12P_GS/GE,N12M_GE
+VGA_CORE
+1.5VGS
+1.05VGS
+1.8VGS
DGPU_PWR_EN
+3VGS
NVVDD
FBVDDQ
IFPAB_IOVDD
PEX_VDD
VDD33
C1235
10U_0805_10V6K
DIS@
1
2
Q77A
2N7002KDWH_SOT363-6
DIS@
61
2
R1156
0_0402_5%
DIS@
1 2
R1154
49.9K_0402_1%
DIS@
1 2
R1151
470_0603_5%
DIS@
12
C1245
10U_0805_10V6K
DIS@
1
2
Q77B
2N7002KDWH_SOT363-6
DIS@
34
5
R1164
150K_0402_1%
DIS@
1 2
C1244
10U_0805_10V6K
DIS@
1
2
R1153
20K_0402_5%
DIS@
C1237
0.1U_0603_25V7K
DIS@
1
2
GND
Part 6 of 7
U58F
N12P-GS-A1_BGA_973P GS@
GND_0
B3
GND_1
B6
GND_2
B9
GND_3
B12
GND_4
B15
GND_5
B21
GND_6
B24
GND_7
B27
GND_8
B30
GND_9
B33
GND_10
C2
GND_11
C34
GND_12
E6
GND_13
E9
GND_14
E12
GND_15
E15
GND_16
E18
GND_17
E24
GND_18
E27
GND_19
E30
GND_20
F2
GND_21
F31
GND_22
F34
GND_23
F5
GND_24
J2
GND_25
J5
GND_26
J31
GND_27
J34
GND_28
K9
GND_29
L9
GND_30
M2
GND_31
M5
GND_32
M11
GND_33
M13
GND_34
M15
GND_35
M17
GND_36
M19
GND_37
M21
GND_38
M23
GND_39
M25
GND_40
M31
GND_41
M34
GND_42
N11
GND_43
N12
GND_44
N13
GND_45
N14
GND_46
N15
GND_47
N16
GND_48
N17
GND_49
N18
GND_50
N19
GND_51
N20
GND_52
N21
GND_53
N22
GND_54
N23
GND_55
N24
GND_56
N25
GND_57
P12
GND_58
P14
GND_59
P16
GND_60
P18
GND_61
P20
GND_62
P22
GND_63
P24
GND_64
R2
GND_65
R5
GND_66
R31
GND_67
R34
GND_68
T11
GND_69
T13
GND_70
T15
GND_71
T17
GND_72
T19
GND_73
T21
GND_74
T23
GND_75
T25
GND_76
U11
GND_77
U12
GND_78
U13
GND_79
U14
GND_80
U15
GND_81
U16
GND_82
U17
GND_83
U18
GND_84
U19
GND_85
U20
GND_86
U21
GND_87
U22
GND_88
U23
GND_89
U24
GND_90
U25
GND_102 Y11
GND_103 Y13
GND_104 Y15
GND_105 Y17
GND_106 Y19
GND_107 Y21
GND_108 Y23
GND_109 Y25
GND_110 AA2
GND_111 AA5
GND_112 AA11
GND_113 AA12
GND_114 AA13
GND_115 AA14
GND_116 AA15
GND_117 AA16
GND_118 AA17
GND_119 AA18
GND_120 AA19
GND_121 AA20
GND_122 AA21
GND_123 AA22
GND_124 AA23
GND_125 AA24
GND_126 AA25
GND_127 AA34
GND_128 AB12
GND_129 AB14
GND_130 AB16
GND_131 AB18
GND_132 AB20
GND_133 AB22
GND_134 AB24
GND_135 AC9
GND_136 AD2
GND_137 AD5
GND_138 AD11
GND_139 AD13
GND_140 AD15
GND_141 AD17
GND_142 AD21
GND_143 AD23
GND_144 AD25
GND_145 AD31
GND_146 AD34
GND_147 AE11
GND_148 AE12
GND_149 AE13
GND_150 AE14
GND_151 AE15
GND_152 AE16
GND_153 AE17
GND_154 AE18
GND_155 AE19
GND_156 AE20
GND_157 AE21
GND_158 AE22
GND_159 AE23
GND_160 AE24
GND_161 AE25
GND_162 AG2
GND_163 AG5
GND_164 AG31
GND_165 AG34
GND_166 AK2
GND_167 AK5
GND_168 AK14
GND_169 AK31
GND_170 AK34
GND_171 AL6
GND_172 AL9
GND_173 AL12
GND_174 AL15
GND_175 AL18
GND_176 AL21
GND_177 AL24
GND_178 AL27
GND_179 AL30
GND_180 AN2
GND_91
V2
GND_92
V5
GND_93
V9
GND_94
V12
GND_95
V14
GND_96
V16
GND_101 V31
GND_181 AN34
GND_182 AP3
GND_183 AP6
GND_184 AP9
GND_185 AP12
GND_186 AP15
GND_187 AP18
GND_188 AP21
GND_189 AP24
GND_190 AP27
GND_191 AP30
GND_192 AP33
GND_97 V18
GND_98 V20
GND_99 V22
GND_100 V24
C1238
0.1U_0603_25V7K
DIS@
1
2
C1236
1U_0603_10V6K
DIS@
1
2
C1233
1U_0603_10V6K
DIS@
1
2
R1160
100K_0402_5%
DIS@
12
Q85A
2N7002KDWH_SOT363-6
DIS@
61
2
C1247
0.1U_0603_25V7K
DIS@
1
2
U65
AP4800BGM-HF_SO8
DIS@
S1
S2
S3
G4
D
8
D
7
D
6
D
5
Q85B
2N7002KDWH_SOT363-6
DIS@
34
5
R1152
470_0603_5%
DIS@
12
G
D
S
Q76
SI2301BDS-T1-E3_SOT23-3
DIS@
2
13
C1232
10U_0603_6.3V6M
DIS@
1
2
R1165
0_0402_5%
DIS@
1 2
C1246
1U_0603_10V6K
DIS@
1
2
C1234
10U_0805_10V6K
DIS@
1
2
Q89A
2N7002KDWH_SOT363-6
DIS@
61
2
Q84
DTC124EKAT146_SC59-3
DIS@
IN
2
OUT 1
GND
3
C1243
0.1U_0603_25V7K
DIS@
1
2
U63
AP4800BGM-HF_SO8
DIS@
S1
S2
S3
G4
D
8
D
7
D
6
D
5
R1163
470_0603_5%
DIS@
12
R1155
10K_0402_5%
DIS@
12
Q89B
2N7002KDWH_SOT363-6
DIS@
34
5
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MDA50
MDA59
MDA16
MDA47
MDA22
MDA24
MDA40
MDA18
MDA11
MDA7
MDA30
MDA46
MDA55
MDA17
MDA1
MDA58
MDA53
MDA26
MDA14
MDA49
MDA52
MDA45
MDA21
MDA43
MDA23
MDA3
MDA5
MDA15
MDA25
MDA60
MDA61
MDA41
MDA4
MDA2
MDA56
MDA57
MDA13
MDA6
MDA44
MDA33
MDA54
MDA32
MDA20
MDA27
MDA36
MDA10
MDA51
MDA19
MDA38
MDA9
MDA48
MDA12
MDA34
MDA28
MDA62
MDA8
MDA37
MDA63
MDA31
MDA35
MDA29
MDA0
MDA42
MDA39
MDA[0..63]
+FB_VREF
CMDA22
CMDA25
CMDA24
CMDA21
CMDA11
CMDA6
CMDA9
CMDA8
CMDA4
CMDA14
CMDA5
CMDA10
CMDA12
CMDA13
CMDA7
CMDA27
CMDA30
CMDA29
CMDA28
CMDA26
+FB_VREF
+FB_AVDD1
+FB_AVDD1
DQMA4
DQMA0
DQMA1
DQMA2
DQMA3
DQMA5
DQMA6
DQMA7
DQSA#2
DQSA#4
DQSA#5
DQSA#6
DQSA#7
DQSA#0
DQSA#1
DQSA#3
DQSA0
DQSA1
DQSA3
DQSA2
DQSA4
DQSA5
DQSA6
DQSA7
CMDA15
CMDA23
+FB_AVDD0
+FB_AVDD0
CMDA0 [29]
CMDA2 [29]
CMDA3 [29]
CMDA4 [29,30]
CMDA5 [29,30]
CMDA6 [29,30]
CMDA8 [29,30]
CMDA9 [29,30]
CMDA14 [29,30]
CMDA20 [29,30]
CMDA18 [30]
CMDA16 [30]
CMDA19 [30]
CMDA10 [29,30]
CMDA11 [29,30]
CMDA12 [29,30]
CMDA21 [29,30]
CMDA24 [29,30]
CMDA25 [29,30]
CMDA22 [29,30]
CMDA13 [29,30]
CMDA7 [29,30]
CMDA26 [29,30]
CMDA29 [29,30]
CMDA30 [29,30]
CMDA27 [29,30]
CMDA28 [29,30]
CMDA15 [29,30]
CMDA23 [29,30]
CLKA0 [29]
CLKA0# [29]
CLKA1 [30]
CLKA1# [30]
MDA[0..63][29,30]
DQMA0 [29]
DQMA1 [29]
DQMA2 [29]
DQMA3 [29]
DQMA4 [30]
DQMA5 [30]
DQMA6 [30]
DQMA7 [30]
DQSA#0 [29]
DQSA#1 [29]
DQSA#2 [29]
DQSA#3 [29]
DQSA#4 [30]
DQSA#5 [30]
DQSA#6 [30]
DQSA#7 [30]
DQSA0 [29]
DQSA1 [29]
DQSA2 [29]
DQSA3 [29]
DQSA4 [30]
DQSA5 [30]
DQSA6 [30]
DQSA7 [30]
+1.05VGS
+1.5VGS
+1.5VGS
+1.05VGS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
PCA70 LA-7521P M/B
0.1
VGA_MEM Interface A
27 64Tuesday, April 12, 2011
2009/01/01 2010/01/01
Compal Electronics, Inc.
200mA
12mil
100mA
C1255
1U_0402_6.3V6K
DIS@
1
2
MEMORY INTERFACE
A
Part 2 of 7
U58B
N12P-GS-A1_BGA_973P GS@
FBA_D0
L32
FBA_D1
N33
FBA_D2
L33
FBA_D3
N34
FBA_D4
N35
FBA_D5
P35
FBA_D6
P33
FBA_D7
P34
FBA_D8
K35
FBA_D9
K33
FBA_D10
K34
FBA_D11
H33
FBA_D12
G34
FBA_D13
G33
FBA_D14
E34
FBA_D15
E33
FBA_D16
G31
FBA_D17
F30
FBA_D18
G30
FBA_D19
G32
FBA_D20
K30
FBA_D21
K32
FBA_D22
H30
FBA_D23
K31
FBA_D24
L31
FBA_D25
L30
FBA_D26
M32
FBA_D27
N30
FBA_D28
M30
FBA_D29
P31
FBA_D30
R32
FBA_D31
R30
FBA_D32
AG30
FBA_D33
AG32
FBA_D34
AH31
FBA_D35
AF31
FBA_D36
AF30
FBA_D37
AE30
FBA_D38
AC32
FBA_D39
AD30
FBA_D40
AN33
FBA_D41
AL31
FBA_D42
AM33
FBA_D43
AL33
FBA_D44
AK30
FBA_D45
AK32
FBA_D46
AJ30
FBA_D47
AH30
FBA_D48
AH33
FBA_D49
AH35
FBA_D50
AH34
FBA_D51
AH32
FBA_D52
AJ33
FBA_D53
AL35
FBA_D54
AM34
FBA_D55
AM35
FBA_D56
AF33
FBA_D57
AE32
FBA_D58
AF34
FBA_D59
AE35
FBA_D60
AE34
FBA_D61
AE33
FBA_D62
AB32
FBA_D63
AC35
FBA_CMD3 V32
FBA_CMD8 W31
FBA_CMD2 U31
FBA_CMD21 Y32
FBA_CMD24 AB35
FBA_CMD23 AB34
FBA_CMD26 W35
FBA_CMD7 W33
FBA_CMD15 W30
FBA_CMD13 T34
FBA_CMD4 T35
FBA_CMD18 AB31
FBA_CMD29 Y30
FBA_CMD27 Y34
FBA_CMD6 W32
FBA_CMD17 AA30
FBA_CMD19 AA32
FBA_CMD22 Y33
FBA_CMD12 U32
FBA_CMD28 Y31
FBA_CMD10 U34
FBA_CMD25 Y35
FBA_CMD9 W34
FBA_CMD1 V30
FBA_CMD11 U35
FBA_CMD0 U30
FBA_CMD5 U33
FBA_DQM0 P32
FBA_DQM1 H34
FBA_DQM2 J30
FBA_DQM3 P30
FBA_DQM4 AF32
FBA_DQM5 AL32
FBA_DQM6 AL34
FBA_DQM7 AF35
FBA_DQS_RN0 L35
FBA_DQS_RN1 G35
FBA_DQS_RN2 H31
FBA_DQS_RN3 N32
FBA_DQS_RN4 AD32
FBA_DQS_RN5 AJ31
FBA_DQS_RN6 AJ35
FBA_DQS_RN7 AC34
FBA_DQS_WP0 L34
FBA_DQS_WP1 H35
FBA_DQS_WP2 J32
FBA_DQS_WP3 N31
FBA_DQS_WP4 AE31
FBA_DQS_WP5 AJ32
FBA_DQS_WP6 AJ34
FBA_DQS_WP7 AC33
FBA_CLK0 T32
FBA_CLK0_N T31
FBA_CLK1 AC31
FBA_CLK1_N AC30
FBA_CMD16 AB30
FBA_CMD20 AB33
FBA_CMD14 T33
FBA_CMD30 W29
FB_DLLAVDD_0
AG27
FB_PLLAVDD_0
AF27
FB_VREF_NC
J27
FBA_DEBUG0
T30
FB_DLLAVDD_1
J19
FB_PLLAVDD_1
J18
FBA_DEBUG1
T29
FBA_CMD31 Y29
FBA_WCK0 P29
FBA_WCK0_N R29
FBA_WCK1 L29
FBA_WCK1_N M29
FBA_WCK2 AG29
FBA_WCK2_N AH29
FBA_WCK3 AD29
FBA_WCK3_N AE29
C1253
10U_0603_6.3V6M
DIS@
1
2
C1250
10U_0603_6.3V6M
DIS@
1
2
L78
BLM18PG330SN1D_0603
DIS@
1 2
C1248
0.01U_0402_25V7K
@
1
2
C1256
0.1U_0402_16V4Z
DIS@
1
2
L79
BLM18PG330SN1D_0603
DIS@
1 2
R1167
1.1K_0402_1%
@
12
R1166
1.1K_0402_1%
@
12
C1249
10U_0603_6.3V6M
DIS@
1
2
C1252
0.1U_0402_16V4Z
DIS@
1
2
C1254
10U_0603_6.3V6M
DIS@
1
2
C1251
1U_0402_6.3V6K
DIS@
1
2
R1169 10K_0402_5%
DIS@
12
R1168 60.4_0402_1%
DIS@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MDB24
MDB25
MDB26
MDB27
MDB28
MDB29
MDB30
MDB31
MDB16
MDB18
MDB11
MDB7
MDB17
MDB1
MDB14
MDB3
MDB5
MDB15
MDB4
MDB2
MDB13
MDB6
MDB10
MDB9
MDB12
MDB8
MDB0
MDB32
MDB33
MDB34
MDB35
MDB36
MDB37
MDB38
MDB39
MDB40
MDB41
MDB42
MDB43
MDB44
MDB45
MDB46
MDB47
MDB48
MDB49
MDB50
MDB51
MDB52
MDB53
MDB54
MDB55
MDB56
MDB19
MDB57
MDB58
MDB20
MDB59
MDB21
MDB60
MDB22
MDB61
MDB23
MDB62
MDB63
MDB[0..63]
CMDB24
CMDB29
CMDB25
CMDB30
CMDB23
CMDB27
CMDB9
CMDB26
CMDB6
CMDB11
CMDB7
CMDB15
CMDB22
CMDB5
CMDB8
CMDB13
CMDB12
CMDB4
CMDB28
CMDB21
CMDB10
CMDB14
DQMB4
DQMB0
DQMB1
DQMB2
DQMB3
DQMB5
DQMB6
DQMB7
DQSB#0
DQSB#1
DQSB#2
DQSB#3
DQSB#4
DQSB#5
DQSB#6
DQSB#7
DQSB6
DQSB7
DQSB0
DQSB1
DQSB2
DQSB3
DQSB4
DQSB5
MDB[0..63][31,32]
CMDB3 [31]
CMDB8 [31,32]
CMDB2 [31]
CMDB21 [31,32]
CMDB24 [31,32]
CMDB23 [31,32]
CMDB26 [31,32]
CMDB7 [31,32]
CMDB15 [31,32]
CMDB13 [31,32]
CMDB4 [31,32]
CMDB18 [32]
CMDB29 [31,32]
CMDB27 [31,32]
CMDB6 [31,32]
CMDB19 [32]
CMDB22 [31,32]
CMDB12 [31,32]
CMDB28 [31,32]
CMDB10 [31,32]
CMDB25 [31,32]
CMDB9 [31,32]
CMDB11 [31,32]
CMDB0 [31]
CMDB5 [31,32]
CMDB16 [32]
CMDB20 [31,32]
CMDB14 [31,32]
CMDB30 [31,32]
CLKB1# [32]
CLKB1 [32]
CLKB0 [31]
CLKB0# [31]
DQMB0 [31]
DQMB1 [31]
DQMB2 [31]
DQMB3 [31]
DQMB4 [32]
DQMB5 [32]
DQMB6 [32]
DQMB7 [32]
DQSB#0 [31]
DQSB#1 [31]
DQSB#2 [31]
DQSB#3 [31]
DQSB#4 [32]
DQSB#5 [32]
DQSB#6 [32]
DQSB#7 [32]
DQSB0 [31]
DQSB1 [31]
DQSB2 [31]
DQSB3 [31]
DQSB4 [32]
DQSB5 [32]
DQSB6 [32]
DQSB7 [32]
+1.5VGS
+1.5VGS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
PCA70 LA-7521P M/B
0.1
VGA_MEM Interface C
28 64Tuesday, April 12, 2011
2009/01/01 2010/01/01
Compal Electronics, Inc.
MEMORY INTERFACE C
Part 3 of 7
U58C
N12P-GS-A1_BGA_973P GS@
FBC_D0
B13
FBC_D1
D13
FBC_D2
A13
FBC_D3
A14
FBC_D4
C16
FBC_D5
B16
FBC_D6
A17
FBC_D7
D16
FBC_D8
C13
FBC_D9
B11
FBC_D10
C11
FBC_D11
A11
FBC_D12
C10
FBC_D13
C8
FBC_D14
B8
FBC_D15
A8
FBC_D16
E8
FBC_D17
F8
FBC_D18
F10
FBC_D19
F9
FBC_D20
F12
FBC_D21
D8
FBC_D22
D11
FBC_D23
E11
FBC_D24
D12
FBC_D25
E13
FBC_D26
F13
FBC_D27
F14
FBC_D28
F15
FBC_D29
E16
FBC_D30
F16
FBC_D31
F17
FBC_D32
D29
FBC_D33
F27
FBC_D34
F28
FBC_D35
E28
FBC_D36
D26
FBC_D37
F25
FBC_D38
D24
FBC_D39
E25
FBC_D40
E32
FBC_D41
F32
FBC_D42
D33
FBC_D43
E31
FBC_D44
C33
FBC_D45
F29
FBC_D46
D30
FBC_D47
E29
FBC_D48
B29
FBC_D49
C31
FBC_D50
C29
FBC_D51
B31
FBC_D52
C32
FBC_D53
B32
FBC_D54
B35
FBC_D55
B34
FBC_D56
A29
FBC_D57
B28
FBC_D58
A28
FBC_D59
C28
FBC_D60
C26
FBC_D61
D25
FBC_D62
B25
FBC_D63
A25
FBC_CMD3 C17
FBC_CMD8 B19
FBC_CMD2 D18
FBC_CMD21 F21
FBC_CMD24 A23
FBC_CMD23 D21
FBC_CMD26 B23
FBC_CMD7 E20
FBC_CMD15 G21
FBC_CMD13 F20
FBC_CMD4 F19
FBC_CMD18 F23
FBC_CMD29 A22
FBC_CMD27 C22
FBC_CMD6 B17
FBC_CMD17 F24
FBC_CMD19 C25
FBC_CMD22 E22
FBC_CMD12 C20
FBC_CMD28 B22
FBC_CMD10 A19
FBC_CMD25 D22
FBC_CMD9 D20
FBC_CMD1 E19
FBC_CMD11 D19
FBC_CMD0 F18
FBC_CMD5 C19
FBC_DQM0 A16
FBC_DQM1 D10
FBC_DQM2 F11
FBC_DQM3 D15
FBC_DQM4 D27
FBC_DQM5 D34
FBC_DQM6 A34
FBC_DQM7 D28
FBC_DQS_RN0 B14
FBC_DQS_RN1 B10
FBC_DQS_RN2 D9
FBC_DQS_RN3 E14
FBC_DQS_RN4 F26
FBC_DQS_RN5 D31
FBC_DQS_RN6 A31
FBC_DQS_RN7 A26
FBC_DQS_WP0 C14
FBC_DQS_WP1 A10
FBC_DQS_WP2 E10
FBC_DQS_WP3 D14
FBC_DQS_WP4 E26
FBC_DQS_WP5 D32
FBC_DQS_WP6 A32
FBC_DQS_WP7 B26
FBC_CLK0 E17
FBC_CLK0_N D17
FBC_CLK1 D23
FBC_CLK1_N E23
FBC_CMD16 F22
FBC_CMD20 C23
FBC_CMD14 B20
FBC_CMD30 A20
FBCAL_PU_GND
L27
FBCAL_TERM_GND
M27
FBCAL_PD_VDDQ
K27
FBC_DEBUG0
G19
FBB_DEBUG1
G16
FBC_CMD31 G20
FBC_WCK0 G14
FBC_WCK0_N G15
FBC_WCK1 G11
FBC_WCK1_N G12
FBC_WCK2 G27
FBC_WCK2_N G28
FBC_WCK3 G24
FBC_WCK3_N G25
R1170 40.2_0402_1% DIS@
1 2
R1173 60.4_0402_1%
DIS@
12
R1171 40.2_0402_1% DIS@
1 2
R1174 10K_0402_5%
DIS@
12
R1172 60.4_0402_1% DIS@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DQSA#1
DQSA1
DQMA1
CLKA0#
CLKA0
DQSA#0
DQMA0
DQSA0
CLKA0#
CLKA0
CMDA20
CMDA3
+FBA_VREFCA0
CMDA3
CMDA20
+FBA_VREFCA0
MDA3
MDA2
MDA7
MDA5
MDA4
MDA6
MDA0
MDA1
MDA13
MDA9
MDA15
MDA14
MDA12
MDA11
MDA10
MDA8
MDA30
MDA28
MDA24
MDA27
MDA29
MDA26
MDA31
MDA25
MDA22
MDA21
MDA20
MDA23
DQMA3
DQSA3
DQSA#3 DQSA#2
DQSA2
DQMA2
MDA16
MDA17
MDA19
MDA18
CMDA7
CMDA30
CMDA14
CMDA5
CMDA9
CMDA22
CMDA10
CMDA25
CMDA12
CMDA26
CMDA21
CMDA8
CMDA24
CMDA6
CMDA23
CMDA4
CMDA13
CMDA29
CMDA27
CMDA0
CMDA11
CMDA28
CMDA15
CMDA2
CMDA7
CMDA30
CMDA14
CMDA5
CMDA9
CMDA22
CMDA10
CMDA25
CMDA12
CMDA26
CMDA21
CMDA8
CMDA24
CMDA6
CMDA23
CMDA4
CMDA13
CMDA29
CMDA27
CMDA0
CMDA11
CMDA28
CMDA15
CMDA2
CLKA0
CLKA0#
+FBA_VREFDQ0
+FBA_VREFDQ0 +FBA_VREFCA0
+FBA_VREFDQ0 DQSA#[7..0] [27,30]
DQSA[7..0] [27,30]
DQMA[7..0] [27,30]
CMDA[30..0] [27,30]
CLKA0[27] CLKA0#[27]
MDA[0..63] [27,30]
DQMA0[27] DQMA1[27] DQMA2[27]
DQMA3[27]
DQSA#0[27] DQSA#1[27] DQSA#2[27]
DQSA#3[27]
DQSA0[27] DQSA1[27] DQSA2[27]
DQSA3[27]
+1.5VGS
+1.5VGS +1.5VGS +1.5VGS
+1.5VGS+1.5VGS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
PCA70 LA-7521P M/B
0.1
VGA_VRAM_A Lower
29 64Tuesday, April 12, 2011
2009/01/01 2010/01/01
Compal Electronics, Inc.
Memory Partition A - Lower 32 bits
Group0
Group1
Group3
Group2
GB2-128
Mode E - Mirror Mode Mapping
A11
CMD16
CMD17
CMD18
CMD19
CMD20
CMD21
CMD22
CMD23
A7
A5
WE#
A2
A10
BA1
A5
CS1#_H
RAS#
A6
A0
A9
A8
BA1
BA2
A7
A13
A10
A11
CMD30
CMD24
CMD25
CMD26
CMD27
CMD28
CMD29
BA2
A13
CAS#CMD15
A4
DATA Bus
Address
A3
A15
32..63
A3
A0
A2
0..31
A1
CS0#_L
WE#
BA0
A8
CMD0
CKE_L
A6
CMD1
ODT_L
CMD2
CMD3
A12
A1
A9
CMD4
CMD5
CMD6
CMD7
A4
CAS#
CMD8
CMD9
CMD10
CMD11
CMD12
CMD13
CMD14
CS0#_H
BA0
CKE_H
ODT_H
A14
RST
CS1#_L
RAS#
A14
A15
RST
A12
64Mx1664Mx16
R1178
1.1K_0402_1%
DIS@
12
C1263
0.1U_0402_16V4Z
DIS@
1
2
R1175
1.1K_0402_1%
DIS@
12
C1264
0.1U_0402_16V4Z
DIS@
1
2
R1179
10K_0402_5%
DIS@
1 2
C1266
0.1U_0402_16V4Z
DIS@
1
2
C1270
0.1U_0402_16V4Z
DIS@
1
2
C1272
0.1U_0402_16V4Z
DIS@
1
2
R1183
80.6_0402_1%
DIS@
1 2
C1268
1U_0402_6.3V6K
DIS@
1
2
C1269
0.1U_0402_16V4Z
DIS@
1
2
R1177
1.1K_0402_1%
DIS@
12
C1267
1U_0402_6.3V6K
DIS@
1
2
C1265
0.1U_0402_16V4Z
DIS@
1
2
C1260
1U_0402_6.3V6K
DIS@
1
2
C1273
0.1U_0402_16V4Z
DIS@
1
2
96-BALL
SDRAM DDR3
U66
K4W1G1646G-BC11_FBGA96
X76@
WE
L3
RAS
J3
CAS
K3
CS/CS0
L2
CKE/CKE0
K9
CK
J7
CK
K7
DQSU
B7
BA0
M2
BA1
N8
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
VSSQ D1
VSS A9
VSS E1
VSS B3
NC/ODT1
J1
VDD B2
VDD D9
VDDQ A1
VDDQ A8
VDDQ C1
VDDQ C9
NC/CS1
L1
NC/CE1
J9
VDDQ E9
ZQ/ZQ0
L8
RESET
T2
DQSL
F3
DMU
D3 DML
E7
VSSQ B1
VSSQ B9
VSSQ D8
VSSQ E2
DQSU
C7
VSSQ E8
DQSL
G3
VDDQ F1
VSSQ F9
VSSQ G1
VDDQ H2
VDDQ H9
VSSQ G9
VREFCA
M8
VSS G8
VDD G7
ODT/ODT0
K1
A0
N3
A1
P7
VDD K2
A12
N7
VSS J2
VDD K8
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
DQU0 D7
A13
T3
A14
T7
A15/BA3
M7
BA2
M3
VREFDQ
H1
NCZQ1
L9
VDD N1
VDD N9
VDD R1
VDD R9
VSS J8
VSS M1
VSS M9
VSS P1
VSS P9
VSS T1
VSS T9
VDDQ D2
96-BALL
SDRAM DDR3
U67
K4W1G1646G-BC11_FBGA96
X76@
WE
L3
RAS
J3
CAS
K3
CS/CS0
L2
CKE/CKE0
K9
CK
J7
CK
K7
DQSU
B7
BA0
M2
BA1
N8
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
VSSQ D1
VSS A9
VSS E1
VSS B3
NC/ODT1
J1
VDD B2
VDD D9
VDDQ A1
VDDQ A8
VDDQ C1
VDDQ C9
NC/CS1
L1
NC/CE1
J9
VDDQ E9
ZQ/ZQ0
L8
RESET
T2
DQSL
F3
DMU
D3 DML
E7
VSSQ B1
VSSQ B9
VSSQ D8
VSSQ E2
DQSU
C7
VSSQ E8
DQSL
G3
VDDQ F1
VSSQ F9
VSSQ G1
VDDQ H2
VDDQ H9
VSSQ G9
VREFCA
M8
VSS G8
VDD G7
ODT/ODT0
K1
A0
N3
A1
P7
VDD K2
A12
N7
VSS J2
VDD K8
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
DQU0 D7
A13
T3
A14
T7
A15/BA3
M7
BA2
M3
VREFDQ
H1
NCZQ1
L9
VDD N1
VDD N9
VDD R1
VDD R9
VSS J8
VSS M1
VSS M9
VSS P1
VSS P9
VSS T1
VSS T9
VDDQ D2
R1181
80.6_0402_1%
DIS@
1 2
C1259
0.01U_0402_25V7K
@
1
2
C1258
0.01U_0402_25V7K
DIS@
1
2
R1180
10K_0402_5%
DIS@
1 2
C1271
0.1U_0402_16V4Z
DIS@
1
2
R1182
160_0402_1%
@
12
R1176
1.1K_0402_1%
DIS@
12
C1261
1U_0402_6.3V6K
DIS@
1
2
C1262
0.1U_0402_16V4Z
DIS@
1
2
R1185
243_0402_1%
DIS@
12
R1186
243_0402_1%
DIS@
12
C1257
0.01U_0402_25V7K
DIS@
1
2
R1184
10K_0402_5%
DIS@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DQSA4
DQMA4
DQSA#4
DQSA#5
DQMA5
DQSA5
CLKA1#
CLKA1
DQSA#6
DQSA6
DQMA7
DQSA7
DQSA#7
DQMA6
CLKA1#
CLKA1
+FBA_VREFDQ1
+FBA_VREFCA1
CMDA16
CMDA20 CMDA20
CMDA16
MDA42
MDA38
MDA47
MDA39
MDA33
MDA44
MDA37
MDA46
MDA40
MDA32
MDA34
MDA35
MDA36
MDA43
MDA51
MDA59
MDA54
MDA58
MDA56
MDA50
MDA55
MDA61
MDA52
MDA62
MDA49
MDA48
MDA57
MDA60
MDA53
MDA63
CMDA9
CMDA27
CMDA12
CMDA21
CMDA7
CMDA26
CMDA24
CMDA28
CMDA14
CMDA22
CMDA5
CMDA8
CMDA10
CMDA13
CMDA4
CMDA23
CMDA30
CMDA6
CMDA29
CMDA11
CMDA18
CMDA19
CMDA25
CMDA15
CMDA9
CMDA27
CMDA12
CMDA21
CMDA7
CMDA26
CMDA24
CMDA28
CMDA14
CMDA22
CMDA5
CMDA8
CMDA10
CMDA13
CMDA4
CMDA23
CMDA30
CMDA6
CMDA29
CMDA11
CMDA18
CMDA25
CMDA15
+FBA_VREFDQ1
+FBA_VREFCA1
+FBA_VREFDQ1
+FBA_VREFCA1
CLKA1
CLKA1#
MDA41
MDA45
CMDA19
DQSA#[7..0] [27,29]
DQSA[7..0] [27,29]
DQMA[7..0] [27,29]
CMDA[30..0] [27,29]
CLKA1#[27] CLKA1[27]
MDA[0..63] [27,29]
DQMA4[27] DQMA5[27] DQMA6[27] DQMA7[27]
DQSA#4[27] DQSA#5[27] DQSA#6[27] DQSA#7[27]
DQSA4[27] DQSA5[27] DQSA6[27] DQSA7[27]
+1.5VGS
+1.5VGS +1.5VGS +1.5VGS
+1.5VGS +1.5VGS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
PCA70 LA-7521P M/B
0.1
VGA_VRAM_A Upper
30 64Tuesday, April 12, 2011
2009/01/01 2010/01/01
Compal Electronics, Inc.
Memory Partition A - Upper 32 bits
Group4
Group5
Group7
Group6
GB2-128
Mode E - Mirror Mode Mapping
A11
CMD16
CMD17
CMD18
CMD19
CMD20
CMD21
CMD22
CMD23
A7
A5
WE#
A2
A10
BA1
A5
CS1#_H
RAS#
A6
A0
A9
A8
BA1
BA2
A7
A13
A10
A11
CMD30
CMD24
CMD25
CMD26
CMD27
CMD28
CMD29
BA2
A13
CAS#CMD15
A4
DATA Bus
Address
A3
A15
32..63
A3
A0
A2
0..31
A1
CS0#_L
WE#
BA0
A8
CMD0
CKE_L
A6
CMD1
ODT_L
CMD2
CMD3
A12
A1
A9
CMD4
CMD5
CMD6
CMD7
A4
CAS#
CMD8
CMD9
CMD10
CMD11
CMD12
CMD13
CMD14
CS0#_H
BA0
CKE_H
ODT_H
A14
RST
CS1#_L
RAS#
A14
A15
RST
A12
64Mx1664Mx16
C1282
0.1U_0402_16V4Z
DIS@
1
2
R1197
243_0402_1%
DIS@
12
R1196
243_0402_1%
DIS@
12
C1275
0.01U_0402_25V7K
DIS@
1
2
R1191
10K_0402_5%
DIS@
1 2
C1274
0.01U_0402_25V7K
DIS@
1
2
C1283
0.1U_0402_16V4Z
DIS@
1
2
C1279
0.1U_0402_16V4Z
DIS@
1
2
R1187
1.1K_0402_1%
DIS@
12
R1188
1.1K_0402_1%
DIS@
12
C1288
0.1U_0402_16V4Z
DIS@
1
2
R1189
1.1K_0402_1%
DIS@
12
C1281
0.1U_0402_16V4Z
DIS@
1
2
C1280
0.1U_0402_16V4Z
DIS@
1
2
C1284
1U_0402_6.3V6K
DIS@
1
2
R1193
80.6_0402_1%
DIS@
1 2
C1278
1U_0402_6.3V6K
DIS@
1
2
R1195
80.6_0402_1%
DIS@
1 2
C1276
0.01U_0402_25V7K
@
1
2
R1194
160_0402_1%
@
12
96-BALL
SDRAM DDR3
U69
K4W1G1646G-BC11_FBGA96
X76@
WE
L3
RAS
J3
CAS
K3
CS/CS0
L2
CKE/CKE0
K9
CK
J7
CK
K7
DQSU
B7
BA0
M2
BA1
N8
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
VSSQ D1
VSS A9
VSS E1
VSS B3
NC/ODT1
J1
VDD B2
VDD D9
VDDQ A1
VDDQ A8
VDDQ C1
VDDQ C9
NC/CS1
L1
NC/CE1
J9
VDDQ E9
ZQ/ZQ0
L8
RESET
T2
DQSL
F3
DMU
D3 DML
E7
VSSQ B1
VSSQ B9
VSSQ D8
VSSQ E2
DQSU
C7
VSSQ E8
DQSL
G3
VDDQ F1
VSSQ F9
VSSQ G1
VDDQ H2
VDDQ H9
VSSQ G9
VREFCA
M8
VSS G8
VDD G7
ODT/ODT0
K1
A0
N3
A1
P7
VDD K2
A12
N7
VSS J2
VDD K8
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
DQU0 D7
A13
T3
A14
T7
A15/BA3
M7
BA2
M3
VREFDQ
H1
NCZQ1
L9
VDD N1
VDD N9
VDD R1
VDD R9
VSS J8
VSS M1
VSS M9
VSS P1
VSS P9
VSS T1
VSS T9
VDDQ D2
96-BALL
SDRAM DDR3
U68
K4W1G1646G-BC11_FBGA96
X76@
WE
L3
RAS
J3
CAS
K3
CS/CS0
L2
CKE/CKE0
K9
CK
J7
CK
K7
DQSU
B7
BA0
M2
BA1
N8
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
VSSQ D1
VSS A9
VSS E1
VSS B3
NC/ODT1
J1
VDD B2
VDD D9
VDDQ A1
VDDQ A8
VDDQ C1
VDDQ C9
NC/CS1
L1
NC/CE1
J9
VDDQ E9
ZQ/ZQ0
L8
RESET
T2
DQSL
F3
DMU
D3 DML
E7
VSSQ B1
VSSQ B9
VSSQ D8
VSSQ E2
DQSU
C7
VSSQ E8
DQSL
G3
VDDQ F1
VSSQ F9
VSSQ G1
VDDQ H2
VDDQ H9
VSSQ G9
VREFCA
M8
VSS G8
VDD G7
ODT/ODT0
K1
A0
N3
A1
P7
VDD K2
A12
N7
VSS J2
VDD K8
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
DQU0 D7
A13
T3
A14
T7
A15/BA3
M7
BA2
M3
VREFDQ
H1
NCZQ1
L9
VDD N1
VDD N9
VDD R1
VDD R9
VSS J8
VSS M1
VSS M9
VSS P1
VSS P9
VSS T1
VSS T9
VDDQ D2
R1190
1.1K_0402_1%
DIS@
12
C1285
1U_0402_6.3V6K
DIS@
1
2
C1277
1U_0402_6.3V6K
DIS@
1
2
C1290
0.1U_0402_16V4Z
DIS@
1
2
C1287
0.1U_0402_16V4Z
DIS@
1
2
C1286
0.1U_0402_16V4Z
DIS@
1
2
R1192
10K_0402_5%
DIS@
1 2
C1289
0.1U_0402_16V4Z
DIS@
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLKB0#
CMDB20
CMDB3
CLKB0
CMDB20
DQMB2
DQSB#1
DQSB#2
DQSB2
DQSB1
DQMB1
CLKB0#
CMDB3
CLKB0
+FBA_VREFCA2
MDB19
MDB23
MDB18
MDB20
MDB16
MDB17
MDB22
MDB21
MDB12
MDB9
MDB15
MDB13
MDB14
MDB11
MDB10
MDB8
MDB30
MDB25
MDB28
MDB27
DQSB#3
DQMB3
DQSB3
DQSB#0
DQSB0
DQMB0
MDB0
MDB6
MDB5
MDB4
MDB3
MDB2
MDB7
MDB1
MDB29
MDB31
MDB24
MDB26
CMDB7
CMDB5
CMDB14
CMDB30
CMDB22
CMDB9
CMDB12
CMDB25
CMDB10
CMDB26
CMDB23
CMDB6
CMDB24
CMDB8
CMDB21
CMDB4
CMDB13
CMDB29
CMDB27
CMDB0
CMDB11
CMDB28
CMDB15
CMDB2
CMDB7
CMDB5
CMDB14
CMDB30
CMDB22
CMDB9
CMDB12
CMDB25
CMDB10
CMDB26
CMDB23
CMDB6
CMDB24
CMDB8
CMDB21
CMDB4
CMDB13
CMDB29
CMDB27
CMDB0
CMDB11
CMDB28
CMDB15
CMDB2
CLKB0
CLKB0#
+FBA_VREFDQ2
+FBA_VREFCA2
+FBA_VREFDQ2 +FBA_VREFCA2
+FBA_VREFDQ2
CLKB0[28] CLKB0#[28]
DQSB#[7..0] [28,32]
DQSB[7..0] [28,32]
DQMB[7..0] [28,32]
CMDB[30..0] [28,32]
MDB[0..63] [28,32]
DQMB0[28] DQMB1[28] DQMB2[28]
DQMB3[28]
DQSB#1[28] DQSB#2[28]
DQSB#3[28] DQSB#0[28]
DQSB0[28] DQSB1[28] DQSB2[28]
DQSB3[28]
+1.5VGS
+1.5VGS
+1.5VGS +1.5VGS
+1.5VGS+1.5VGS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
PCA70 LA-7521P M/B
0.1
VGA_VRAM_C Lower
Custom
31 64Tuesday, April 12, 2011
2009/01/01 2010/01/01
Compal Electronics, Inc.
Memory Partition C - Lower 32 bits
Group2
Group1
Group0
Group3
A11
CMD16
CMD17
CMD18
CMD19
CMD20
CMD21
CMD22
CMD23
A7
A5
WE#
A2
A10
BA1
A5
CS1#_H
RAS#
A6
A0
A9
A8
BA1
BA2
A7
A13
A10
A11
CMD30
CMD24
CMD25
CMD26
CMD27
CMD28
CMD29
BA2
A13
CAS#CMD15
A4
DATA Bus
Address
A3
A15
32..63
A3
A0
A2
0..31
A1
CS0#_L
WE#
BA0
A8
CMD0
CKE_L
A6
CMD1
ODT_L
CMD2
CMD3
A12
A1
A9
CMD4
CMD5
CMD6
CMD7
A4
CAS#
CMD8
CMD9
CMD10
CMD11
CMD12
CMD13
CMD14
CS0#_H
BA0
CKE_H
ODT_H
A14
RST
CS1#_L
RAS#
Mode E - Mirror Mode Mapping
A14
A15
RST
A12
GB2-128
64Mx1664Mx16
C1291
0.01U_0402_25V7K
GS@
1
2
C1306
0.1U_0402_16V4Z
GS@
1
2
R1199
1.1K_0402_1%
GS@
12
C1296
0.1U_0402_16V4Z
GS@
1
2
C1297
0.1U_0402_16V4Z
GS@
1
2
C1294
1U_0402_6.3V6K
GS@
1
2
C1305
0.1U_0402_16V4Z
GS@
1
2
C1303
0.1U_0402_16V4Z
GS@
1
2
R1204 80.6_0402_1%
GS@
1 2
C1304
0.1U_0402_16V4Z
GS@
1
2
R1209
243_0402_1%
GS@
12
C1302
1U_0402_6.3V6K
GS@
1
2
C1292
0.01U_0402_25V7K
GS@
1
2
C1300
0.1U_0402_16V4Z
GS@
1
2
R1205
160_0402_1%
@
12
R1207
10K_0402_5%
GS@
12
96-BALL
SDRAM DDR3
U70
K4W1G1646G-BC11_FBGA96
X76@
WE
L3
RAS
J3
CAS
K3
CS/CS0
L2
CKE/CKE0
K9
CK
J7
CK
K7
DQSU
B7
BA0
M2
BA1
N8
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
VSSQ D1
VSS A9
VSS E1
VSS B3
NC/ODT1
J1
VDD B2
VDD D9
VDDQ A1
VDDQ A8
VDDQ C1
VDDQ C9
NC/CS1
L1
NC/CE1
J9
VDDQ E9
ZQ/ZQ0
L8
RESET
T2
DQSL
F3
DMU
D3 DML
E7
VSSQ B1
VSSQ B9
VSSQ D8
VSSQ E2
DQSU
C7
VSSQ E8
DQSL
G3
VDDQ F1
VSSQ F9
VSSQ G1
VDDQ H2
VDDQ H9
VSSQ G9
VREFCA
M8
VSS G8
VDD G7
ODT/ODT0
K1
A0
N3
A1
P7
VDD K2
A12
N7
VSS J2
VDD K8
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
DQU0 D7
A13
T3
A14
T7
A15/BA3
M7
BA2
M3
VREFDQ
H1
NCZQ1
L9
VDD N1
VDD N9
VDD R1
VDD R9
VSS J8
VSS M1
VSS M9
VSS P1
VSS P9
VSS T1
VSS T9
VDDQ D2
R1206 80.6_0402_1%
GS@
1 2
R1208
243_0402_1%
GS@
12
R1200
1.1K_0402_1%
GS@
12
R1198
1.1K_0402_1%
GS@
12
C1295
1U_0402_6.3V6K
GS@
1
2
C1298
0.1U_0402_16V4Z
GS@
1
2
C1307
0.1U_0402_16V4Z
GS@
1
2
R1201
1.1K_0402_1%
GS@
12
C1299
0.1U_0402_16V4Z
GS@
1
2
C1301
1U_0402_6.3V6K
GS@
1
2
96-BALL
SDRAM DDR3
U71
K4W1G1646G-BC11_FBGA96
X76@
WE
L3
RAS
J3
CAS
K3
CS/CS0
L2
CKE/CKE0
K9
CK
J7
CK
K7
DQSU
B7
BA0
M2
BA1
N8
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
VSSQ D1
VSS A9
VSS E1
VSS B3
NC/ODT1
J1
VDD B2
VDD D9
VDDQ A1
VDDQ A8
VDDQ C1
VDDQ C9
NC/CS1
L1
NC/CE1
J9
VDDQ E9
ZQ/ZQ0
L8
RESET
T2
DQSL
F3
DMU
D3 DML
E7
VSSQ B1
VSSQ B9
VSSQ D8
VSSQ E2
DQSU
C7
VSSQ E8
DQSL
G3
VDDQ F1
VSSQ F9
VSSQ G1
VDDQ H2
VDDQ H9
VSSQ G9
VREFCA
M8
VSS G8
VDD G7
ODT/ODT0
K1
A0
N3
A1
P7
VDD K2
A12
N7
VSS J2
VDD K8
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
DQU0 D7
A13
T3
A14
T7
A15/BA3
M7
BA2
M3
VREFDQ
H1
NCZQ1
L9
VDD N1
VDD N9
VDD R1
VDD R9
VSS J8
VSS M1
VSS M9
VSS P1
VSS P9
VSS T1
VSS T9
VDDQ D2
C1293
0.01U_0402_25V7K
@
1
2
R1203
10K_0402_5%
GS@
12
R1202
10K_0402_5%
GS@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CMDB20
CMDB16
DQSB4
DQMB4
DQSB#4
DQSB#5
DQMB5
DQSB5
CLKB1#
CLKB1
+FBA_VREFCA3
+FBA_VREFDQ3
CLKB1#
CLKB1
CMDB20
CMDB16
MDB42
MDB43
MDB35
MDB45
MDB41
MDB40
MDB44
MDB63
MDB56
MDB62
MDB58
MDB57
MDB60
MDB61
MDB59
MDB48
DQSB#7
DQSB7
DQMB7
DQSB6
DQMB6
DQSB#6
MDB50
MDB49
MDB51
MDB52
MDB55
MDB53
MDB54
MDB38
MDB39
MDB36
MDB37
MDB32
MDB33
MDB34
MDB46
MDB47
CMDB9
CMDB27
CMDB12
CMDB21
CMDB7
CMDB26
CMDB24
CMDB28
CMDB14
CMDB22
CMDB5
CMDB8
CMDB10
CMDB13
CMDB4
CMDB23
CMDB30
CMDB6
CMDB29
CMDB11
CMDB18
CMDB19
CMDB25
CMDB15
CMDB9
CMDB27
CMDB12
CMDB21
CMDB7
CMDB26
CMDB24
CMDB28
CMDB14
CMDB22
CMDB5
CMDB8
CMDB10
CMDB13
CMDB4
CMDB23
CMDB30
CMDB6
CMDB29
CMDB11
CMDB18
CMDB15
+FBA_VREFDQ3
+FBA_VREFCA3
+FBA_VREFCA3
+FBA_VREFDQ3
CLKB1
CLKB1#
CMDB25
CMDB19
CLKB1#[28] CLKB1[28]
DQSB#[7..0] [28,31]
DQSB[7..0] [28,31]
DQMB[7..0] [28,31]
CMDB[30..0] [28,31]
MDB[0..63] [28,31]
DQMB4[28] DQMB5[28] DQMB6[28] DQMB7[28]
DQSB#4[28] DQSB#5[28] DQSB#6[28] DQSB#7[28]
DQSB4[28] DQSB5[28] DQSB6[28] DQSB7[28]
+1.5VGS
+1.5VGS +1.5VGS +1.5VGS
+1.5VGS+1.5VGS
+1.5VGS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
PCA70 LA-7521P M/B
0.1
VGA_VRAM_C Upper
Custom
32 64Tuesday, April 12, 2011
2009/01/01 2010/01/01
Compal Electronics, Inc.
Memory Partition C - Upper 32 bits
Group4
Group5
Group7
Group6
A11
CMD16
CMD17
CMD18
CMD19
CMD20
CMD21
CMD22
CMD23
A7
A5
WE#
A2
A10
BA1
A5
CS1#_H
RAS#
A6
A0
A9
A8
BA1
BA2
A7
A13
A10
A11
CMD30
CMD24
CMD25
CMD26
CMD27
CMD28
CMD29
BA2
A13
CAS#CMD15
A4
DATA Bus
Address
A3
A15
32..63
A3
A0
A2
0..31
A1
CS0#_L
WE#
BA0
A8
CMD0
CKE_L
A6
CMD1
ODT_L
CMD2
CMD3
A12
A1
A9
CMD4
CMD5
CMD6
CMD7
A4
CAS#
CMD8
CMD9
CMD10
CMD11
CMD12
CMD13
CMD14
CS0#_H
BA0
CKE_H
ODT_H
A14
RST
CS1#_L
RAS#
Mode E - Mirror Mode Mapping
A14
A15
RST
A12
GB2-128
64Mx1664Mx16
R1215
10K_0402_5%
GS@
1 2
R1210
1.1K_0402_1%
GS@
12
C1317
0.1U_0402_16V4Z
GS@
1
2
96-BALL
SDRAM DDR3
U72
K4W1G1646G-BC11_FBGA96
X76@
WE
L3
RAS
J3
CAS
K3
CS/CS0
L2
CKE/CKE0
K9
CK
J7
CK
K7
DQSU
B7
BA0
M2
BA1
N8
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
VSSQ D1
VSS A9
VSS E1
VSS B3
NC/ODT1
J1
VDD B2
VDD D9
VDDQ A1
VDDQ A8
VDDQ C1
VDDQ C9
NC/CS1
L1
NC/CE1
J9
VDDQ E9
ZQ/ZQ0
L8
RESET
T2
DQSL
F3
DMU
D3 DML
E7
VSSQ B1
VSSQ B9
VSSQ D8
VSSQ E2
DQSU
C7
VSSQ E8
DQSL
G3
VDDQ F1
VSSQ F9
VSSQ G1
VDDQ H2
VDDQ H9
VSSQ G9
VREFCA
M8
VSS G8
VDD G7
ODT/ODT0
K1
A0
N3
A1
P7
VDD K2
A12
N7
VSS J2
VDD K8
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
DQU0 D7
A13
T3
A14
T7
A15/BA3
M7
BA2
M3
VREFDQ
H1
NCZQ1
L9
VDD N1
VDD N9
VDD R1
VDD R9
VSS J8
VSS M1
VSS M9
VSS P1
VSS P9
VSS T1
VSS T9
VDDQ D2
C1318
0.1U_0402_16V4Z
GS@
1
2
C1309
0.01U_0402_25V7K
GS@
1
2
C1308
0.01U_0402_25V7K
GS@
1
2
C1323
0.1U_0402_16V4Z
GS@
1
2
R1212
1.1K_0402_1%
GS@
12
C1316
0.1U_0402_16V4Z
GS@
1
2
96-BALL
SDRAM DDR3
U73
K4W1G1646G-BC11_FBGA96
X76@
WE
L3
RAS
J3
CAS
K3
CS/CS0
L2
CKE/CKE0
K9
CK
J7
CK
K7
DQSU
B7
BA0
M2
BA1
N8
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
VSSQ D1
VSS A9
VSS E1
VSS B3
NC/ODT1
J1
VDD B2
VDD D9
VDDQ A1
VDDQ A8
VDDQ C1
VDDQ C9
NC/CS1
L1
NC/CE1
J9
VDDQ E9
ZQ/ZQ0
L8
RESET
T2
DQSL
F3
DMU
D3 DML
E7
VSSQ B1
VSSQ B9
VSSQ D8
VSSQ E2
DQSU
C7
VSSQ E8
DQSL
G3
VDDQ F1
VSSQ F9
VSSQ G1
VDDQ H2
VDDQ H9
VSSQ G9
VREFCA
M8
VSS G8
VDD G7
ODT/ODT0
K1
A0
N3
A1
P7
VDD K2
A12
N7
VSS J2
VDD K8
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
DQU0 D7
A13
T3
A14
T7
A15/BA3
M7
BA2
M3
VREFDQ
H1
NCZQ1
L9
VDD N1
VDD N9
VDD R1
VDD R9
VSS J8
VSS M1
VSS M9
VSS P1
VSS P9
VSS T1
VSS T9
VDDQ D2
R1214
10K_0402_5%
GS@
1 2
R1219
243_0402_1%
GS@
12
C1324
0.1U_0402_16V4Z
GS@
1
2
C1313
1U_0402_6.3V6K
GS@
1
2
R1217
80.6_0402_1%
GS@
1 2
C1314
0.1U_0402_16V4Z
GS@
1
2
C1319
1U_0402_6.3V6K
GS@
1
2
C1321
0.1U_0402_16V4Z
GS@
1
2
R1220
243_0402_1%
GS@
12
C1322
0.1U_0402_16V4Z
GS@
1
2
C1320
1U_0402_6.3V6K
GS@
1
2
C1325
0.1U_0402_16V4Z
GS@
1
2
R1216
160_0402_1%
@
12
+
C1311
330U_2.5V_M_R17
GS@
1
2
C1310
0.01U_0402_25V7K
@
1
2
C1312
1U_0402_6.3V6K
GS@
1
2
C1315
0.1U_0402_16V4Z
GS@
1
2
R1213
1.1K_0402_1%
GS@
12
R1218
80.6_0402_1%
GS@
1 2
R1211
1.1K_0402_1%
GS@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
STRAP4
STRAP3
STRAP0[23] STRAP1[23] STRAP2[23]
ROM_SI[23] ROM_SO[23]
ROM_SCLK[23]
STRAP4[23]
STRAP3[23]
+3VGS
+3VGS
+3VGS
+3VGS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
PCA70 LA-7521P M/B
0.1
VGA_MSIC
Custom
33 64Tuesday, April 12, 2011
2009/01/01 2010/01/01
Compal Electronics, Inc.
Resistor Values
Pull-up to +3VGS
5K
1000
10K
15K
20K
25K
30K
35K
45K
Pull-down to Gnd
1001
1010
1011
1100
1101
1110
1111
0000
0001
0010
0011
0100
0101
0110
0111
Power
Rail
+3VGS
ROM_SCLK
Logical
Strapping Bit3 Logical
Strapping Bit2
SLOT_CLK_CFG
Logical
Strapping Bit0
SUB_VENDOR
PEX_PLL_EN_TERM
RAMCFG[0]
ROM_SI
RAMCFG[1]RAMCFG[3] RAMCFG[2]
VGA_DEVICESMB_ALT_ADDR
PCI_DEVID[4]
XCLK_417
ROM_SO
FB_0_BAR_SIZE
Logical
Strapping Bit1
Physical
Strapping pin
SUB_VENDOR
0
1
No VBIOS ROM (Default)
BIOS ROM is present
XCLK_417
0
1
277MHz (Default)
Reserved
FB_0_BAR_SIZE
0
1
256MB (Default)
Reserved
1000-1100
Customer defined
3GIO_PADCFG[3:0]
0110
Notebook Default
PEX_PLL_EN_TERM
0
1
Disable (Default)
Enable
SLOT_CLOCK_CFG
GPU and MCH don't share a common reference clock
GPU and MCH share a common reference clock (Default)
0
1
SMBUS_ALT_ADDR
0
1
0x9E (Default)
0x9C (Multi-GPU usage)
VGA_DEVICE
0
1
3D Device
VGA Device (Default)
+3VGS
+3VGS
0000
User [3:0]
EDID is used
1111
RESERVED
1920x1080
+3VGS
USER[0]USER[1]USER[2]
3GIO_PADCFG[0]3GIO_PADCFG[1]3GIO_PADCFG[2]
PCI_DEVID[0]PCI_DEVID[1]PCI_DEVID[2]
+3VGS
STRAP0
STRAP1
STRAP2
PCI_DEVID[3]
+3VGS USER[3]
3GIO_PADCFG[3]
PCI_DEVID[5]
GS
GV
GS
GV FB[1] FB[0]
STRAP3
STRAP4
+3VGS
+3VGS
SOR3_EXPOSED SOR2_EXPOSED SOR1_EXPOSED SOR0_EXPOSED
RESERVED RESERVED
PCIE_MAX_SPEED DP_PLL_VDD33V
PCIE_MAX_SPEED
1
Default
DP_PLL_VDD33V
Default
0
R1221
PU 45K R1226
PD 25K R453
PD 15K R1231
PD 10K R1229
PU 15K
R1221
PU 45K R1226
PD 25K R378
PD 20K R1231
PD 10K
64M* 16* 8
1GB
64M* 16* 8
1GB
900 MHz
900 MHz
strap0 strap1 strap2 ROM_SI ROM_SO ROM_SCLKMemory Size
Frenq. strap3 strap4
NC
NC
NC
NC
GPU
N12P-GS
N12P-GS
Hynix (0x2)
H5TQ1G63DFR-11C
SA000041S60
Samsung (0x3)
K4W1G1646G-BC11
SA00004GS30
Memory Config
R1642
PU 15K
R1221
PU 45K R1226
PD 5K R1228
PU 10K
R1221
PU 45K R1228
PU 10K
64M* 16* 4
512MB
64M* 16* 4
512MB
N12P-GV
N12P-GV
Hynix (0x2)
H5TQ1G63DFR-11C
SA000041S60
Samsung (0x3)
K4W1G1646G-BC11
SA00004GS30
1111
1111
R378
PD 15K
R378
PD 20K
900 MHz
900 MHz
1111
1111
0100
0100
1010
1010
R1642
PU 15K
0001
0001
1001
1001
1010
1010
1000
R1229
PU 15K
R1229
PU 5K
R1229
PU 5K
0010
0010
0011
0011
0000
R1235
PD 5K
0000
0000
0000
R1235
PD 5K
R1235
PD 5K
R1235
PD 5K
0000
R1235
PD 5K R1642
PU 15K
R1221
PU 45K R1228
PU 10K
R378
PD 35K
1111 1010 1001 R1229
PU 5K
0110
128M* 16* 4
1GB
N12P-GV
800 MHz
0000
R1226
PD 5K
0000
R1226
PD 5K
0000
R1644
PD 20K
0011
0011
R1644
PD 20K
0011
R1644
PD 20K
1000
1000Hynix (0x6)
H5TQ2G63BFR-12C
SA00003VS30
PCI_DEVID[5..0]GPU
N12P-GV-B 0x1050
0x0DF4
DeviceID
N12P-GS
Package
GB2-128
GB2b-128 (..0101 0000)
(..1111 0100)
R1221
45.3K_0402_1%
DIS@
1 2
R1645
15K_0402_5%
@
1 2
R1222
34.8K_0402_1%
@
1 2
R1642
15K_0402_1%
GV@
1 2
R378
34.8K_0402_1%
X76@
R1229
15K_0402_1%
GS@
1 2
R378
15K_0402_1%
X76@
1 2
R1227
4.99K_0402_1%
@
1 2
R1229
4.99K_0402_1%
GV@
R1641
10K_0402_5%
@
1 2
R1231
10K_0402_1%
GS@
1 2
R869
45.3K_0402_1%
1 2
R1226
24.9K_0402_1%
GS@
1 2
R1644
20K_0402_5%
GV@
1 2
R1224
45.3K_0402_1%
@
1 2
R1228
10K_0402_1%
GV@
1 2
R1226
4.99K_0402_1%
GV@
R1235
4.99K_0402_1%
DIS@
1 2
R1232
15K_0402_1%
@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
EESCL
EESDA
WP_PRO
XO
+1.2V_SCA_L
S_HDMI_DATA_R
HDMI_TV_SDATA_R
TXO3+
TXE1+
TXEC-
HDMI_CABLE_DET#_D
HDMI_CK+
TXE2+
SDIN
I2C_INT_SCR_R
FLASH_WP
S_DIS/UMA
TXO2+
XO
S_RESETB
SDOUT
TXE2-
XI
HDCP_DAT
S_ENVDD
HDMI_D0-
+1.2V_SCA_ADC
TXO0-
TXE3-
TXE3+
AD1_R
HDMI_D1+
HDMI_D0+
S_BKOFF
HDCP_CLK
LED1
S_INVT_PWM
TXOC+
HDMI_CK-
HDMI_D1-
TXO1-
HDMI_D2+
XI
S_HDMI_CLK_R
CE
S_BKOFF
S_AMP_PD#
S_LINE_OUTR_R
HDMI_TV_HPD
TXO1+
TXO0+
TXOC-
TXEC+
TMDS_REXT
S_CLK
TXO2-
HDMI_TV_SCLK_R
WP_PRO
TXE0+
TXO3-
TXE1-
+AD_VDD
LED2
TXE0-
AD2_R
HDMI_D2-
SDOUT S_CLKS_CLK_R SDIN
CE
FLASH_WP
S_DIS/UMA
VGA_IN_DET#_D
PNL_STAT2
PNL_STAT
EESDA
EESCL
HDMI_C_TX0+
HDMI_C_TX2-
HDMI_C_TX2+
HDMI_C_TX1-
HDMI_C_TX0-
HDMI_C_TX1+
HDMI_C_CLK+
HDMI_C_CLK-
S_BKOFF#
S_LINE_OUTL_R
S_HP_OUT_R_R
S_HP_OUT_L_R
S_BKOFF# [49]
S_INVT_PWM [35]
EC_SMB_DA1 [49]
I2C_INT_SCR [49]
HDMI_CABLE_DET# [37,49]
EC_SMB_CK1 [49]
S_LINE_OUTR[48] S_LINE_OUTL[48]
TXE0- [35]
TXE3+ [35]
TXE3- [35]
TXEC- [35]
TXE2+ [35]
TXE2- [35]
TXE1+ [35]
TXE1- [35]
TXE0+ [35]
TXOC+ [35]
TXO3- [35]
TXO3+ [35]
TXO1- [35]
TXO0+ [35]
TXOC- [35]
TXO0- [35]
TXEC+ [35]
TXO2+ [35]
TXO2- [35]
HDMI_TV_SDATA [37]
HDMI_TV_SCLK [37]
VGA_RED_IN[40]
S_HDMI_CLK [36]
HP_DET# [47,49]
HDMI_TV_HPD [37]
HDMI_HPD_LS [36]
SCALER_ON#[49]
TXO1+ [35]
HDMI_D0-[37]
VGA_VSYNC_IIN[40]
VGA_GND_BLUE[40]
S_AMP_PD# [49]
AD2[49]
HDMI_CK+[37]
S_HP_OUT_R[47]
VGA_GND_RED[40]
HDMI_D2+[37]
VGA_BLUE_IN[40]
HDMI_D1-[37]
HDMI_D2-[37] HDMI_D1+[37]
HDMI_CK-[37]
VGA_HSYNC_IN[40]
VGA_SOG[40]
S_HP_OUT_L[47]
VGA_GND_GREEN[40] VGA_GREEN_IN[40]
HDMI_D0+[37]
AD1[49]
S_ENVDD[49]
S_HDMI_DATA [36]
PNL_STAT2 [49]
VGA_IN_DET# [40,49]
PNL_STAT [47,48,49]
HDMI_C_TX0-[36] HDMI_C_TX0+[36] HDMI_C_TX1-[36] HDMI_C_TX1+[36] HDMI_C_TX2-[36] HDMI_C_TX2+[36] HDMI_C_CLK+[36] HDMI_C_CLK-[36]
HDMI_STAT [49]
CRT_DDC_CLK_IN[40] CRT_DDC_DAT_IN[40]
+3V_SCA +3V_SCA
+3V_SCA
+3V_SCA
+3V_SCA
+3V_SCA
+3V_SCA
+3V_SCA
+3V_SCA
+3V_SCA
+3V_SCA
+3V_SCA
+3V_SCA
+1.2V_SCA
+3V_SCA_R
+3VALW
+3V_SCA_R +3V_SCA_R+1.2V_SCA
+AD_VDD
+1.2V_SCA
+3V_SCA
+1.2V_SCA
+AD_VDD
+1.2V_SCA
+3V_SCA
+3V_SCA
+3V_SCA
+3V_SCA
+3VS
+3V_SCA
+3VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
PCA70 LA-7521P M/B
0.1
Scaler RTD2472/82D
34 64Tuesday, April 12, 2011
2010/10/1 2011/11/01
Compal Electronics, Inc.
FOR OSD/HDCP Parameter Value
MP change from 0ohm for EMI
HDMI_STAT
High: OSD OFF
Low : OSD ON
88mA
HDMI Port0 HPD
58mA
PCH
HDMI-IN
0.67mA
For Port0
For Port1
HDMI-Port0
HDMI-Port1
To HP Out
EXTERNAL
HDMI-IN
LVDS
INTERNAL
HDMI
DVT add test point
for Scalar dubug.
DVT add Pull high for PNL_STAT,
HDMI_CABLE_DET
change to 75 ohm for HDCP protect.
MP for S5 HDMI_IN no function.
EXTERNAL
D-Sub-IN
116mA
To AMP Input
To AMP SPK Enable pin
close to U55( Scaler)
To EC ADC
pre-MP Scaler power soft start
PVT change to KBC control
for EUP S5 over 1W
151mA
+1.2VALW=1+R533/R535
+3V TO +1.2VALW
600mA
FOR Scalar Firmware Code
For EMI
PVT for DIS/UMA FW control.
Mode
PC
HDMI
VGA
PNL_STAT PNL_STAT2
0
1
1
0
0
0
C528
10PF_0402_50V9
@
1
2
R536 0_0402_5%@1 2
R10414.7K_0402_5%
12
R5184.7K_0402_5%
12
D9 RB751V40_SC76-2
12
C539
0.1U_0402_16V4Z
1
2
D37 RB751V40_SC76-2
12
U26
AT24C16AN-10SI-2.7_SO8
A0
1
A1
2
SDA 5
SCL 6
VCC 8
A2
3
GND
4
WP 7
R525 10K_0402_5%
DIS@
12
C529
10U_0603_6.3V6M
1
2
C531
1U_0402_6.3V6K
1
2
C537
0.1U_0402_16V4Z
1 2
C525 1U_0402_6.3V6K
1 2
U24
W25X10BVSNIG_SO8
CS#
1
DO(IO1)
2
WP#(IO2)
3
GND
4
VCC 8
HOLD#(IO3) 7
CLK 6
DI(IO0) 5
R526
4.7K_0402_5%
12
R551
0_0402_5%
@
1 2
R1073
4.7K_0402_5%
12
T172
@
R505 100_0402_1%
1 2
R538 4.7K_0402_5%
1 2
C532
0.1U_0402_16V4Z
1
2
R528 47_0402_5%
1 2
C547
10U_0603_6.3V6M
1
2
T168
R550
560_0402_5%
1 2
C1056
0.1U_0402_16V4Z
@
1
2
R547
4.7K_0402_5%
12
C524
1U_0402_6.3V6K
12
C534
0.1U_0402_16V4Z
1
2
R1045
4.7K_0402_5%
@
12
C522
0.1U_0402_16V4Z
1
2
U23
G9141P11U_SO8
SHDN
1
IN
2
GND 5
GND 6
GND 8
OUT
3
SET
4
GND 7
C526
10U_0603_6.3V6M
1
2
R534 0_0402_5%@1 2
Y4
27MHZ_16PF_X5H027000FG1H
2 1
R510 0_0402_5%
1 2
C527
4.7U_0603_10V6K
1
2
R5194.7K_0402_5%
12
U25
RTD2472D-GR_LQFP128_20X14
DP_VDD/TMDS_VDD
1
TMDS_REXT
2
LANE0P/RX2P_0
3
LANE0N/RX2N_0
4
LANE1P/RX1P_0
5
LANE1N/RX1N_0
6
LANE2P/RX0P_0
7
LANE2N/RX0N_0
8
LANE3P/RXCP_0
9
LANE3N/RXCN_0
10
DP_GND/TMDS_GND
11
LANE0P/RX2P_1
12
LANE0N/RX2N_1
13
LANE1P/RX1P_1
14
LANE1N/RX1N_1
15
LANE2P/RX0P_1
16
LANE2N/RX0N_1
17
LANE3P/RXCP_1
18
LANE3N/RXCN_1
19
DP_VDD/TMDS_VDD2
20
AVS0
21
AHS0
22
ADC_VDD
23
B0-
24
B0+
25
G0-
26
G0+
27
SOG0
28
R0-
29
R0+
30
GPI/B1- / V8_7
31
GPI/B1+ / V8_6
32
ADC_GND
38
GPI/R1+/V8_1
37 GPI/R1-/V8_2
36 GPI/SOG1 / V8_3
35 GPI/G1+ / V8_4
34 GPI/G1- / V8_5
33
AUDIO_SOUTL/V8_3/SCK/GPIO
45 SPDIF3/AUDIO_REF/V8_4/WS/GPIO
44
A-ADC0/VCLK/GPIO
50
A-ADC1/GPIO
51
A-ADC2/GPIO
52
A-ADC3/GPIO
53
A-ADC4/GPIO
54
TCON[0][5]/BADC0/PWM1/PWM5/GPIO
55
TCON[1][4]/B-ADC1/IICSCL/GPIO
56
V8_7/GPIO
41
TCON[9][11]/B-ADC2/IICSDA/GPIO
57
TCON[7][10]/DDCSCL1/GPIO
58
TCON[3][5]/DDCSDA1/GPIO
59
VCCK
60
PGND
61
PVCC 62
AUDIO_HOUTL/V8_1/SD0/GPIO
47
AUDIO_HOUTR/V8 _0/PWM0/GPIO
48
LINE_INL/V8_6/IICSCL/GPIO
42
AUDIO_SOUTR/V8_2/MCK/GPIO
46
PVCC 84
PGND
85
LINE_INR/V8_5/IICSDA/GPIO
43
VCLK/AVS1
40
LS_ADC_VDD
49
GPI/V8_0/AHS1
39
PVCC 106
PGND
107
VCCK 120
WS/TCON[7][1]/GPIO/PWM1/BB3P 65
ABLU7/SCK/TCON[4][2]/GPIO/BB3N 66
ABLU6/MCK/TCON[5][9]/GPIO/BB2P 67
ABLU5/SD0/SPDIF0/TCON[13][3]/GPIO/BB2N 68
ABLU4/SPDIF1/SD1/TCON[ 7][3]/GPIO/IICSCL/BB1P 69
ABLU3/SPDIF2/SD2/TCON[ 9][11]/GPIO/IICSDA/BB1N 70
ABLU2/SPDIF3/SD3/TCON[10][8]/GPIO/PWM1/PWM5/BCLKP 71
TCON[6][12]/GPIO/PWM3/BCLKN 72
TCON[1][8]/PWM2/GPIO 63
SD0/SPDIF0/TCON[0][7]/GPIO/IrDA 64
ABLU1/ GPIO/ABLU7/TXO3+_8b/TXO4+_10b/BG3P 74
ABLU0/ GPIO/ABLU6/TXO3-_8b/TXO4-_10b/BG3N 75
AGRN7/GPIO/ABLU5/TXOC+_8b/TXO3+_10b/BG2P 76
AGRN6/GPIO/ABLU4/TXOC-_8b/TXO3-_10b/BG2N 77
AGRN5/GPIO/ABLU3/TXO2+_8b/TXOC+_10b/BG1P 78
AGRN4/GPIO/ABLU2/TXO2-_8b/TXOC-_10b/BG1N 79
AGRN3/GPIO/AGRN7/TXO1+_8b/TXO2+_10b/BR3P 80
AGRN2/GPIO/AGRN6/TXO1-_8b/TXO2-_10b/BR3N 81
AGRN1/GPIO/AGRN5/TXO0+_8b/TXO1+_10b/BR2P 82
AGRN0/GPIO/AGRN4/TXO0-_8b/TXO1-_10b/BR2N 83
ARED7/AGRN3/TXE3+_8b/TXO0+_10b/BR1P 86
ARED6/AGRN2/TXE3-_8b/TXO0-_10b/BR1N 87
ARED5/ARED7/TXEC+_8b/TXE4+_10b/AB3P 88
ARED4/ARED6/TXEC-_8b/TXE4+_10b/AB3N 89
ARED3/ARED5/TXE2+_8b/TXE3+_10b/AB2P 90
ARED2/ARED4/TXE2-_8b/TXE3-_10b/AB2N 91
ARED1/ARED3/TXE1+_8b/TXEC+_10b/AB1P 92
ARED0/ARED2/TXE1-_8b/TXEC-_10b/AB1N 93
DENA/TXE0+_8b/TXE2+_10b/ACLKP 94
DHS/TXE0-_8b/TXE2-_10b/ACLKN 95
DCLK/GPIO/PWM0/TXE1+_10b/AG3P 96
DVS/GPIO/PWM1/TXE1-_10b/AG3N 97
GPIO/PWM2/TXE0+_10b/AG2P 98
GPIO/PWM3/TCON[11][6]/TXE0-_10b/AG2N 99
GPIO/PWM4/TCON[12][3]/AG1P 100
GPIO/PWM5/TCON[0]/AG1N 101
SD3/ SPDIF3/TCON[10]/GPIO/PWM0/AR3P 102
SD2/SPDIF2/TCON[8]/GPIO/IICSCL/PWM1/AR3N 103
SD1/SPDIF1/TCON[5]/GPIO/IRQ/IICSDA/AR2P 104
SD0 / SPDIF0 / TCON[9] / GPIO / AR2N 105
MCK/TCON[7]/GPIO/AR1P 108
SCK/TCON[3]/GPIO/AR1N 109
WS/TCON[6]/GPIO/SDT 110
SD0/SPDIF0/TCON[4]/GPIO/SPDIF1 111
SD1/ SPDIF1/TCON[9]/GPIO/WS 112
SD2/SPDIF2/TCON[1][11]/GPIO/IrDA/SCK 113
SD3/SPDIF3/TCON[13]/GPIO/VCLK/MCK 114
SPI_SCLK/SeriesData 115
SI/MCU_SCLK 116
SO/SCSB 117
CEB/IRQB 118
GPIO/PWM5/SPDIF1 119
VCCK 73
DDCSCL3/GPIO/AUX-CH_P1 121
DDCSDA3/GPIO/AUX-CH_N1 122
DDCSDA2/GPIO/AUX-CH_N0 123
DDCSCL2/GPIO/AUX-CH_P0 124
RESETB 125
CEC/GPIO/PWM1/SPDIF2 126
XO 127
XI 128
Thermal pad 129
R5204.7K_0402_5%
12
T170
R1046
4.7K_0402_5%
@
12
R513
4.7K_0402_5%
12
R539 4.7K_0402_5%
1 2
R537 0_0402_5%@1 2
R523 6.2K_0402_5%@
1 2
C546
0.1U_0402_16V4Z
1
2
R506
0_0805_5%
@
12
R530 0_0402_5%
1 2
T171
R521 6.2K_0402_5%
1 2
C542
0.1U_0402_16V4Z
1 2
C540
10U_0603_6.3V6M
1 2
R531
0_0402_5%
12
R509 22_0402_5%
1 2
C545 22P_0402_50V8J
12
R1053
4.7K_0402_5%
1 2
R5174.7K_0402_5%
12
C541
0.1U_0402_16V4Z
@
1
2
C544
0.1U_0402_16V4Z
1
2
R514
4.7K_0402_5%
12
T169
R544 0_0402_5%
1 2
R5164.7K_0402_5%
12
R507
20_0402_1%
1 2
R543 75_0402_1%
R1048 4.7K_0402_5%
1 2
L29
BLM18PG181SN1D_0603
1 2
C535
0.1U_0402_16V4Z
1 2
R542 0_0402_5%@1 2
C533
10U_0603_6.3V6M
1
2
R508 22_0402_5%
1 2
C536
0.1U_0402_16V4Z
1
2
C530
1U_0402_6.3V6K
1
2
R10404.7K_0402_5%
12
R511 22_0402_5%
1 2
G
D
S
Q31
SSM3K7002BF 1N SC59-3
2
13
C523
0.1U_0402_16V4Z 1
2
R548
4.7K_0402_5%
12
T207
R10424.7K_0402_5%
12
R504
10K_0402_5%
12
C1055
0.1U_0402_16V4Z
@
1
2
C538
10U_0603_6.3V6M
1
2
C548 22P_0402_50V8J
12
T208
R527 10K_0402_5%
UMA@
12
R512 22_0402_5%
1 2
R529 0_0402_5%
1 2
R515
100_0402_1%
1 2
R532 4.7K_0402_5%
1 2
C543
10U_0603_6.3V6M
@
1
2
L28
BLM18PG181SN1D_0603
1 2
R1047 4.7K_0402_5%
1 2
R552
1M_0402_5%
@
12
G
D
S
Q46
PMV65XP 1P SOT23 TMOS
2
1 3
R545 4.7K_0402_5%@1 2
R541 75_0402_1%
R546 0_0402_5%
1 2
R540 0_0402_5%@1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
TXE3-
TXO1-
TXO2+
TXOC-
TXOC+
TXE2+
TXEC+
TXE3+
TXO2-
TXO1+
TXO0-
TXO0+
TXO3-
TXO3+
TXEC-
TXE2-
TXE0+
TXE0-
TXE1+
LCD_PWM
TXE1-
LCD_BKOFF#
LCD_PWM
LCD_BKOFF#
TXOC+
TXO3+
TXE2+
TXEC+
TXE3+
TXE0+TXE0-
TXO0-
TXO1-
TXO2-
TXE1-
TXO0+
TXO1+
TXO2+
TXOC-
TXO3-
TXE1+
TXE2-
TXEC-
TXE3-
BKOFF#[49]
INVT_PWM[49]
S_INVT_PWM[34]
EC_ENVDD[49]
VGA_ENVDD[22]
VGA_LCD_PWM[22]
TXE0+[34]
TXE1-[34]
TXE0-[34]
TXE2-[34]
TXE1+[34]
TXEC+[34]
TXE2+[34]
TXEC-[34]
TXE3-[34]
TXO0+[34]
TXE3+[34]
TXO1+[34]
TXO2-[34]
TXO0-[34]
TXO1-[34]
TXOC+[34] TXOC-[34]
TXO3-[34]
TXO2+[34]
TXO3+[34]
+LCDVDD +5VALW
+LCDVDD
+5VALW
+LCDVDD +LCDVDD
INVPWR_B+ B+
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
PCA70 LA-7521P M/B
0.1
LVDS
Custom
35 64Tuesday, April 12, 2011
2010/10/1 2011/11/01
Compal Electronics, Inc.
For Scaler LVDS Conn.
EC
EC
Scaler
PVT change from 100k to 1.5M for EA.
120mil
120mil
EC
VGA
VGA
Converter
463mA
Q32A
2N7002KDWH_SOT363-6
61
2
C557
680P_0402_50V7K
@
1
2
R586 0_0402_5%
1 2
R594 0_0402_5%@
1 2
R555
100_0805_5%
12
C554
0.1U_0402_16V4Z
1
2
R591 0_0402_5%
1 2
C556
680P_0402_50V7K
12
C551
0.1U_0402_16V4Z
1
2
C553
0.1U_0402_16V4Z
1
2
C550
4.7U_0603_10V6K
1
2
L30
FBMA-L11-201209-221LMA30T_0805
1 2
C552
680P_0402_50V7K
1
2
JCON1
ACES_50224-01201-001
CONN@
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
GND1
13
GND2
14
G
D
S
Q33
PMV65XP 1P SOT23 TMOS
2
1 3
R570
100K_0402_5%
12
R563
1.5M_0402_5%
1 2
R1049
100K_0402_5%
12
R1050 0_0402_5%@
1 2
Q32B
2N7002KDWH_SOT363-6
34
5
R1044 0_0402_5%
@
1 2
R567 0_0402_5%
1 2
JLVDS1
ACES_50255-03001-001
CONN@
11
2
2
33
4
4
55
6
6
77
8
8
99
10
10
11 11
12
12
13 13
14
14
15 15
16
16
17 17
18
18
19 19
20
20
21 21
22
22
23 23
24
24
25 25
26
26
27 27
28
28
29 29
30
30
31 31
32
32
C549
1000P_0402_50V7K
1
2
C555
680P_0402_50V7K
1
2
R556
1M_0402_5%
1 2
A
A
B
B
C
C
D
D
E
E
F
F
G
G
H
H
1 1
2 2
3 3
4 4
HDMI_C_TX1+
HDMI_C_TX1-
HDMI_C_TX0-
HDMI_C_TX0+
HDMI_C_TX2-
HDMI_C_TX2+
HDMI_C_CLK-
HDMI_C_CLK+
PCH_HDMI_CLK
PCH_HDMI_DATA
S_HDMI_CLK
S_HDMI_DATA
HDMI_HPD_LSDDPC_HDP
PCH_HDMI_CLK+
PCH_HDMI_TX2+
PCH_HDMI_CLK-
PCH_HDMI_TX2-
PCH_HDMI_TX1+
PCH_HDMI_TX1-
PCH_HDMI_TX0+
PCH_HDMI_TX0-
VGA_SHDMI_ETXC+
VGA_SHDMI_ETXD2+
VGA_SHDMI_ETXD1-
VGA_SHDMI_ETXC-
VGA_SHDMI_ETXD2-
VGA_SHDMI_ETXD1+
VGA_SHDMI_ETXD0+
VGA_SHDMI_ETXD0-
VGA_SHDMI_HPD
HDMI_C_TX1+
HDMI_C_CLK-
HDMI_C_TX0+
HDMI_C_TX2+
HDMI_C_CLK+
HDMI_C_TX2-
HDMI_C_TX1-
HDMI_C_TX0-
PCH_HDMI_DATA[16]
PCH_HDMI_CLK[16]
S_HDMI_DATA [34]
S_HDMI_CLK [34]
HDMI_HPD_LS [34]
DDPC_HDP[16]
PCH_HDMI_TX2+[16] PCH_HDMI_TX2-[16]
PCH_HDMI_TX1+[16] PCH_HDMI_TX1-[16]
PCH_HDMI_CLK+[16] PCH_HDMI_CLK-[16]
PCH_HDMI_TX0+[16] PCH_HDMI_TX0-[16]
HDMI_C_TX1- [34]
HDMI_C_TX0+ [34]
HDMI_C_CLK- [34]
HDMI_C_CLK+ [34]
HDMI_C_TX2- [34]
HDMI_C_TX1+ [34]
HDMI_C_TX2+ [34]
HDMI_C_TX0- [34]
VGA_SHDMI_ETXD2+[23] VGA_SHDMI_ETXD2-[23]
VGA_SHDMI_ETXD1+[23] VGA_SHDMI_ETXD1-[23]
VGA_SHDMI_ETXC-[23]
VGA_SHDMI_ETXD0+[23] VGA_SHDMI_ETXD0-[23]
VGA_SHDMI_ETXC+[23]
VGA_SHDMI_HPD[22]
+3VS+3VS +5VS
+3VS
VGA_SHDMI_ECLK[23]
VGA_SHDMI_EDATA[23]
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
PCA70 LA-7521P M/B
0.1
HDMI Level Shift Scaler
Custom
36 64Tuesday, April 12, 2011
2010/10/1 2011/11/01
Compal Electronics, Inc.
pull down for HDMI 1.3 standard, remove in PVT phase.
DIS only
UMA only
INTEL use 680 Ohm for terminationn NV use 499 Ohm for terminationn
C1565 0.1U_0402_10V7KUMA@ 1 2
R1584
0_0402_5%
DIS@ 1 2
C1558 0.1U_0402_10V7KDIS@ 1 2
R636 680_0402_5%
UMA@
R638
499_0402_5%
DIS@
C1563 0.1U_0402_10V7KDIS@ 1 2
R1582 0_0402_5% UMA@
1 2
C1566 0.1U_0402_10V7KUMA@ 1 2
R643 680_0402_5%
UMA@
C1556 0.1U_0402_10V7KDIS@ 1 2
R637 680_0402_5%
UMA@
R617
2.2K_0402_5%
UMA@
12
Q35B
2N7002KDW_SOT363-6
3
5
4
C1559 0.1U_0402_10V7KDIS@ 1 2
C1567 0.1U_0402_10V7KUMA@ 1 2
R642 680_0402_5%
UMA@
Q35A
2N7002KDW_SOT363-6
61
2
R638 680_0402_5%
UMA@
R640 680_0402_5%
UMA@
C1568 0.1U_0402_10V7KUMA@ 1 2 R642
499_0402_5%
DIS@
R1583 0_0402_5% DIS@
1 2
C1560 0.1U_0402_10V7KDIS@ 1 2
G
D
S
Q36
SSM3K7002BF 1N SC59-3
UMA@
2
13
R618
2.2K_0402_5%
UMA@
12
R643
499_0402_5%
DIS@
C1569 0.1U_0402_10V7KUMA@ 1 2
R619
4.7K_0402_5%
1 2
R639
499_0402_5%
DIS@
R1581 0_0402_5% DIS@
1 2
R635 680_0402_5%
UMA@
C1561 0.1U_0402_10V7KDIS@ 1 2
R640
499_0402_5%
DIS@
C1570 0.1U_0402_10V7KUMA@ 1 2
R639 680_0402_5%
UMA@
R1580 0_0402_5% UMA@
1 2
R635
499_0402_5%
DIS@
C1557 0.1U_0402_10V7KDIS@ 1 2
C1571 0.1U_0402_10V7KUMA@ 1 2
C1564 0.1U_0402_10V7KUMA@ 1 2
C1562 0.1U_0402_10V7KDIS@ 1 2
R636
499_0402_5%
DIS@
R641
0_0402_5%
UMA@ 1 2
R620
4.7K_0402_5%
1 2
R637
499_0402_5%
DIS@
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
HDMI_R_D1- HDMI_R_D1+
HDMI_R_D1+
HDMI_R_CK-
HDMI_R_D0-
HDMI_R_D0+
HDMI_R_D2-
HDMI_TV_HPD
HDMI_R_D2+
HDMI_R_D2-
HDMI_R_D0+
HDMI_R_D0-
HDMI_R_CK+
HDMI_R_CK-
HDMI_R_D2+
HDMI_R_D0+
HDMI_R_CK-
HDMI_TV_SCLK
HDMI_TV_HPD
HDMI_R_D1+
HDMI_R_D0-
HDMI_R_D1-
HDMI_CABLE_DET#
HDMI_R_D2-
HDMI_R_D2+
HDMI_CABLE_DET#
HDMI_R_D1- HDMI_R_D2-
HDMI_R_CK+
HDMI_R_D1-
HDMI_TV_SDATA
HDMI_R_CK+
HDMI_R_D1+
HDMI_R_CK-
HDMI_R_D2+
HDMI_R_D0-
HDMI_R_D0+
HDMI_R_CK+
HDMI_TV_HPD
HDMI_TV_HPD[34]
HDMI_D0+[34]
HDMI_CK-[34]
HDMI_D2+[34]
HDMI_D2-[34]
HDMI_TV_SCLK[34] HDMI_TV_SDATA[34]
HDMI_CK+[34]
HDMI_D1-[34]
HDMI_CABLE_DET# [34,49]
HDMI_D1+[34]
HDMI_D0-[34]
+HDMI_5V_IN
+5VALW
+HDMI_EDID_5V
+HDMI_EDID_5V
+HDMI_5V_IN
+HDMI_EDID_5V
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
PCA70 LA-7521P M/B
0.1
HDMI-IN
Custom
37 64Tuesday, April 12, 2011
2010/10/1 2011/11/01
Compal Electronics, Inc.
(Cj=5pF)
DVT Scaler request
HDMI-in Connector
R673
0_0402_5%
HDMIIN@
1 2
C580
0.1U_0402_16V4Z
HDMIIN@
1
2
D16
RB491D_SOT23
HDMIIN@
21
D21
PJDLC05C_SOT23-3
HDMIIN@
2
3
1
R685
0_0402_5%
HDMIIN@
1 2
C581
0.1U_0402_16V4Z
HDMIIN@
1
2
R679
4.7K_0402_5%
HDMIIN@
D20
PJDLC05C_SOT23-3
HDMIIN@
2
3
1
R674
1K_0402_1%
HDMIIN@
12
F2
1.1A_6V_SMD1812P110TF
HDMIIN@
21
R683
0_0402_5%
HDMIIN@
1 2
8
7
65
4
3
2
1
9
10
D18
YSCLAMP0524P_SLP2510P8-10-9
HDMIIN@
4
5
1
6
2
7
3
9
8
R676
0_0402_5%
HDMIIN@
1 2
8
7
65
4
3
2
1
9
10
D19
YSCLAMP0524P_SLP2510P8-10-9
HDMIIN@
4
5
1
6
2
7
3
9
8
R680
4.7K_0402_5%
HDMIIN@
R677
0_0402_5%
HDMIIN@
1 2
L34
WCM-2012-900T_0805
@
1
1
4
433
22
L37
WCM-2012-900T_0805
@
1
1
4
433
22
L36
WCM-2012-900T_0805
@
1
1
4
433
22
L35
WCM-2012-900T_0805
@
1
1
4
433
22
R684
0_0402_5%
HDMIIN@
1 2
D15
RB491D_SOT23
HDMIIN@
2 1
R678
0_0402_5%
HDMIIN@
1 2 JHDMI1
SUYIN_100042GR019M12RZR
CONN@
D2+
1
GND 2
D2-
3D1+
4
GND 5
D1-
6D0+
7
GND 8
D0-
9CK+
10
GND 11
CK-
12
CEC 13
Reserved 14
SCL
15 SDA
16
DDC/CEC_GND 17
+5V
18
HP_DET
19
GND 20
GND 21
GND 22
GND 23
R681
0_0402_5%
HDMIIN@
1 2
A
A
B
B
C
C
D
D
E
E
F
F
G
G
H
H
1 1
2 2
3 3
4 4
PCH_HDMIOUT_CLK
PCH_HDMIOUT_DATA
HDMIOUT_TX2+
HDMIOUT_TX2-
HDMIOUT_TX1+
HDMIOUT_TX1-
HDMIOUT_CLK+
HDMIOUT_CLK-
HDMIOUT_TX0+
HDMIOUT_TX0-
HDMIOUT_TX2+
HDMIOUT_TX2-
HDMIOUT_TX1+
HDMIOUT_TX1-
HDMIOUT_CLK+
HDMIOUT_CLK-
HDMIOUT_TX0+
HDMIOUT_TX0-
PCH_HDMIOUT_CLK+
PCH_HDMIOUT_TX1-
PCH_HDMIOUT_TX2+
PCH_HDMIOUT_TX2-
PCH_HDMIOUT_CLK-
PCH_HDMIOUT_TX0-
PCH_HDMIOUT_TX0+
PCH_HDMIOUT_TX1+
HDMIOUT_SDATA
HDMIOUT_SCLK
HDMIOUT_HPD_R
HDMIOUT_HPD_R
PCH_HDMIOUT_DATA[16]
PCH_HDMIOUT_CLK[16]
VGA_HDMI_ETXD2+[23] VGA_HDMI_ETXD2-[23]
VGA_HDMI_ETXD1+[23] VGA_HDMI_ETXD1-[23]
VGA_HDMI_ETXC-[23]
VGA_HDMI_ETXD0+[23] VGA_HDMI_ETXD0-[23]
VGA_HDMI_ETXC+[23]
HDMIOUT_TX0- [39]
HDMIOUT_TX1+ [39]
HDMIOUT_TX2+ [39]
HDMIOUT_TX2- [39]
HDMIOUT_CLK+ [39]
HDMIOUT_CLK- [39]
HDMIOUT_TX0+ [39]
HDMIOUT_TX1- [39]
PCH_HDMIOUT_TX2+[16] PCH_HDMIOUT_TX2-[16]
PCH_HDMIOUT_TX1+[16] PCH_HDMIOUT_TX1-[16]
PCH_HDMIOUT_CLK+[16] PCH_HDMIOUT_CLK-[16]
PCH_HDMIOUT_TX0+[16] PCH_HDMIOUT_TX0-[16]
HDMIOUT_SDATA [39]
HDMIOUT_SCLK [39]
HDMIOUT_HPD_R [39]
DDPD_HDP[16]DGPU_HPD_INT#[18]
VGA_HDMIOUT_HPD[22]
+3VS
+3VS
+3VS +HDMIOUT_EDID_5V
+3VS
+3VGS
VGA_HDMI_ECLK[23]
VGA_HDMI_EDATA[23]
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
PCA70 LA-7521P M/B
0.1
HDMI-OUT Level Shift
Custom
38 64Tuesday, April 12, 2011
2010/10/1 2011/11/01
Compal Electronics, Inc.
pull down for HDMI 1.3 standard, remove in PVT phase.
DIS only
UMA only
UMA onlyDIS only
INTEL use 680 Ohm for terminationn
NV use 499 Ohm for terminationn
R1597
10K_0402_5%
HDMIOD@
1 2
R1498 0_0402_5%HDMIOD@ 1 2
C1583 0.1U_0402_10V7KHDMIOU@ 1 2
R1464
2.2K_0402_5%
HDMIO@
12
R1494 0_0402_5%HDMIOU@ 1 2
C1575 0.1U_0402_10V7KHDMIOD@ 1 2
G
D
S
Q93
SSM3K7002BF 1N SC59-3
HDMIO@
2
13
C1584 0.1U_0402_10V7KHDMIOU@ 1 2
C1576 0.1U_0402_10V7KHDMIOD@ 1 2
R1512 0_0402_5%HDMIOD@ 1 2
R1593
499_0402_5%
HDMIOD@
R1594 680_0402_5%
HDMIOU@
Q94B
2N7002KDW_SOT363-6
HDMIO@
3
5
4
C1585 0.1U_0402_10V7KHDMIOU@ 1 2
R1595
100K_0402_5%
HDMIOD@
1 2
R1594
499_0402_5%
HDMIOD@
C1577 0.1U_0402_10V7KHDMIOD@ 1 2
R1593 680_0402_5%
HDMIOU@
R1596
1M_0402_5%
HDMIOU@
12
Q94A
2N7002KDW_SOT363-6
HDMIO@
61
2
C1586 0.1U_0402_10V7KHDMIOU@ 1 2
R1591
499_0402_5%
HDMIOD@
EB
C
Q95
MMBT3904_SOT23-3
HDMIOD@
2
3 1
R1508 0_0402_5%HDMIOU@ 1 2
C1578 0.1U_0402_10V7KHDMIOD@ 1 2
R1592
499_0402_5%
HDMIOD@
R1486
2.2K_0402_5%
HDMIOU@
12
C1529
220P_0402_25V8J
HDMIOU@
1
2
R1588 680_0402_5%
HDMIOU@
C1587 0.1U_0402_10V7KHDMIOU@ 1 2
R1587
499_0402_5%
HDMIOD@
C1579 0.1U_0402_10V7KHDMIOD@ 1 2
C1580 0.1U_0402_10V7KHDMIOU@ 1 2
R1598
100K_0402_5%
HDMIOU@
12
R1590 680_0402_5%
HDMIOU@
R1588
499_0402_5%
HDMIOD@
R1589 680_0402_5%
HDMIOU@
C1572 0.1U_0402_10V7KHDMIOD@ 1 2
G
D
S
Q96
SSM3K7002F_SC59-3
HDMIOD@
2
1 3
C1581 0.1U_0402_10V7KHDMIOU@ 1 2
R1589
499_0402_5%
HDMIOD@
R1587 680_0402_5%
HDMIOU@
C1573 0.1U_0402_10V7KHDMIOD@ 1 2
R1592 680_0402_5%
HDMIOU@
R1590
499_0402_5%
HDMIOD@
G
D
S
Q97
SSM3K7002F_SC59-3
HDMIOU@
2
13
C1582 0.1U_0402_10V7KHDMIOU@ 1 2
R1487
2.2K_0402_5%
HDMIOU@
12
R1463
2.2K_0402_5%
HDMIO@
12
C1574 0.1U_0402_10V7KHDMIOD@ 1 2
R1591 680_0402_5%
HDMIOU@
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
HDMIOUT_R_D2+
HDMIOUT_R_D1-
HDMIOUT_R_CK-
HDMIOUT_R_D1+
HDMIOUT_R_D0+
HDMIOUT_R_D0-
HDMIOUT_R_D2-
HDMIOUT_R_CK+
HDMIOUT_SCLK
HDMIOUT_SDATA
HDMIOUT_HPD_R
HDMIOUT_HPD_R
HDMIOUT_TX2+
HDMIOUT_TX2-
HDMIOUT_TX1+
HDMIOUT_TX1-
HDMIOUT_CLK+
HDMIOUT_CLK-
HDMIOUT_TX0+
HDMIOUT_TX0-
HDMIOUT_CLK+
HDMIOUT_CLK-
HDMIOUT_TX0+
HDMIOUT_TX0-
HDMIOUT_TX1+
HDMIOUT_TX1-
HDMIOUT_TX2+
HDMIOUT_TX2-
HDMIOUT_R_D0-
HDMIOUT_R_CK+
HDMIOUT_R_CK-
HDMIOUT_R_D2+
HDMIOUT_R_D0+
HDMIOUT_R_D2-
HDMIOUT_R_D1-
HDMIOUT_R_D1+
HDMIOUT_R_CK-
HDMIOUT_R_CK+
HDMIOUT_R_D0-
HDMIOUT_R_D0+
HDMIOUT_R_D2+
HDMIOUT_R_D2-
HDMIOUT_R_D1-
HDMIOUT_R_D1+
HDMIOUT_R_CK-
HDMIOUT_R_CK+
HDMIOUT_R_D0-
HDMIOUT_R_D0+
HDMIOUT_R_D2+
HDMIOUT_R_D2-
HDMIOUT_R_D1-
HDMIOUT_R_D1+
HDMIOUT_TX2+[38] HDMIOUT_TX2-[38]
HDMIOUT_TX1+[38] HDMIOUT_TX1-[38]
HDMIOUT_CLK-[38]
HDMIOUT_TX0+[38] HDMIOUT_TX0-[38]
HDMIOUT_CLK+[38]
HDMIOUT_SDATA[38] HDMIOUT_SCLK[38]HDMIOUT_HPD_R[38]
+HDMIOUT_EDID_5V
+5VS
+HDMIOUT_EDID_5V
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
PCA70 LA-7521P M/B
0.1
HDMI-OUT
Custom
39 64Tuesday, April 12, 2011
2010/10/1 2011/11/01
Compal Electronics, Inc.
(Cj=5pF)
HDMI-OUT Connector
C1434
0.1U_0402_16V4Z
HDMIO@
1
2
D56
PJDLC05C_SOT23-3
HDMIO@
2
3
1
8
7
65
4
3
2
1
9
10
D57
YSCLAMP0524P_SLP2510P8-10-9
HDMIO@
4
5
1
6
2
7
3
9
8
L95
WCM-2012-900T_0805
HDMIO@
1
1
4
433
22
JHDMI2
SUYIN_100042GR019M12RZR
CONN@
D2+
1
GND 2
D2-
3D1+
4
GND 5
D1-
6D0+
7
GND 8
D0-
9CK+
10
GND 11
CK-
12
CEC 13
Reserved 14
SCL
15 SDA
16
DDC/CEC_GND 17
+5V
18
HP_DET
19
GND 20
GND 21
GND 22
GND 23
R1472
0_0402_5%
@
1 2
R1470
0_0402_5%
@
1 2
R1466
0_0402_5%
@
1 2
L92
WCM-2012-900T_0805
HDMIO@
1
1
4
433
22
L93
WCM-2012-900T_0805
HDMIO@
1
1
4
433
22
R1471
0_0402_5%
@
1 2
R1468
0_0402_5%
@
1 2
R1465
0_0402_5%
@
1 2
D58
PJDLC05C_SOT23-3
HDMIO@
2
3
1
8
7
65
4
3
2
1
9
10
D59
YSCLAMP0524P_SLP2510P8-10-9
HDMIO@
4
5
1
6
2
7
3
9
8
R1467
0_0402_5%
@
1 2
L94
WCM-2012-900T_0805
HDMIO@
1
1
4
433
22
F1
1.1A_6V_SMD1812P110TF
HDMIO@
21
D55
RB491D_SOT23
HDMIO@
2 1
R1469
0_0402_5%
@
1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
RED_IN
GREEN_IN
JVGA_HS
JVGA_VS
BLUE_IN
RED_IN_B
VGA_GNDR
RED_IN_RRED_IN
GREEN_IN_B GREEN_IN_R
VGA_GNDG
GREEN_IN
BLUE_IN_B
VGA_GNDB
BLUE_IN
VGA_SOG_R
VGA_DDC_CLK_IN
JVGA_HS
JVGA_VS
VGA_DDC_DAT_IN
BLUE_IN_R
USB1_EN#
USB20_N4_R SATA_PRX_DTX_N4
SATA_PRX_DTX_P4
USB20_P4_R
CRT_DDC_DAT_IN
CRT_DDC_CLK_IN
VGA_DDC_DAT_IN
VGA_DDC_CLK_IN
NC_CRT
VGA_GND_RED [34]
VGA_RED_IN [34]
VGA_GND_GREEN [34]
VGA_GREEN_IN [34]
VGA_BLUE_IN [34]
VGA_GND_BLUE [34]
VGA_SOG [34]
VGA_VSYNC_IIN [34]
VGA_HSYNC_IN [34]
VGA_IN_DET# [34,49]
USB_OC#2 [17,41]USB1_EN#[41,49]
SATA_PRX_C_DTX_N4[13]
SATA_PRX_C_DTX_P4[13]
SATA_PTX_C_DRX_N4[13]
SATA_PTX_C_DRX_P4[13]
CRT_DDC_DAT_IN [34]
CRT_DDC_CLK_IN [34]
USB20_N4[17]
USB20_P4[17]
PM_SMBDATA[11,12,14]
PM_SMBCLK[11,12,14]
SCFW_UPDATE#[49]
+3VS
+3VS
+3VS
+5VALW
+VGA_5V
+VGA_5V_IN
+5VALW +USB_VCCC
+3VALW
+USB_VCCC
+USB_VCCC
+VGA_5V
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
CRT-IN Connector
Custom
40 64Tuesday, April 12, 2011
2010/10/1 2011/11/01
Compal Electronics, Inc.
PCA70 LA-7521P M/B
For EMI
W=60mils
2.5A
Place closely JUSB5.1
Scaler FW update
R655
75_0402_1%
VGAIN@
12
R656
100_0603_1%
VGAIN@
1 2
R652
1M_0402_5%
@
12
C570
5P_0402_50V8C
VGAIN@
1
2
JSATA1
TAIWI_EU091-117CRL-TW
CONN@
B-
9
B+
10
GND 14
GND 15
VBUS
1
D-
2
D+
3
GND
5
A-
7
A+
6
GND
4
GND 12
GND 13
GND 8
GND 11
R666
100_0402_1%
VGAIN@
1 2
R669
2K_0402_5%
VGAIN@
12
Q100A 2N7002KDWH_SOT363-6
61
2
R696 0_0402_5% @
1 2
R659
100_0603_1%
VGAIN@
1 2
R657
100_0603_1%
VGAIN@
1 2
L33
FCM1608KF-110T05 0603
VGAIN@
1 2
R648 4.7K_0402_5%
1 2
G
D
S
Q107
SSM3K7002BF 1N SC59-3
@
2
13
U30
BAV99_SOT23-3
VGAIN@
2
31
R658
75_0402_1%
VGAIN@
12
U83
AP2301SG-13 SO 8P
FLG 5
VIN
3VOUT 6
GND
1
EN
4
VOUT 7
VIN
2VOUT 8
R654
100_0603_1%
VGAIN@
1 2
R695 0_0402_5% @
1 2
C579
22P_0402_50V8J
VGAIN@
1
2
R651
1K_0402_5%
VGAIN@
1 2
D14
PSOT24C_SOT23-3
VGAIN@
2
3
1
C574
0.1U_0402_16V4Z
VGAIN@
1
2
L41
WCM-2012-900T_0805
1
122
33
4
4
C1393 1000P_0402_50V7K
12
C1399 0.01U_0402_25V7K
1 2
R1615 0_0402_5%
12
R647 4.7K_0402_5%
1 2
D13
PSOT24C_SOT23-3
VGAIN@
2
3
1
R646
75_0402_1%
VGAIN@
12
U29
BAV99_SOT23-3
VGAIN@
2
31
C578
22P_0402_50V8J
VGAIN@ 1
2
D10
PSOT24C_SOT23-3
VGAIN@
2
3
1
C1395
0.1U_0402_25V6
1
2
D25
PJDLC05C_SOT23-3
2
3
1
C575
5P_0402_50V8C
VGAIN@
1
2
T256 PAD
C569
100P_0402_50V8J
VGAIN@
1
2
C565
0.1U_0402_25V6
VGAIN@
1 2
R650 100_0402_1%
1 2
C571
0.1U_0402_25V6
VGAIN@
1 2
C1397
4.7U_0603_10V6K
1
2
C566
0.047U_0402_16V7K
VGAIN@
1 2
C1398 0.01U_0402_25V7K
1 2
C564
5P_0402_50V8C
VGAIN@
1
2
C577
0.047U_0402_16V7K
VGAIN@
1 2
R1614 4.7K_0402_5%@
1 2
R653 100_0402_1%
1 2
R649
100_0603_1%
VGAIN@
1 2
D12
RB491D_SOT23
VGAIN@
2 1
C572
0.047U_0402_16V7K
VGAIN@
1 2
+
C1394
150U_B2_6.3VM_R35M
1
2
C567
0.022U_0402_25V7K
VGAIN@
1 2
Q100B 2N7002KDWH_SOT363-6
34
5
R645
100_0603_1%
VGAIN@
1 2
R670
2K_0402_5%
VGAIN@
12
L31
FCM1608KF-110T05 0603
VGAIN@
1 2
C563
0.047U_0402_16V7K
VGAIN@
1 2
C1396
4.7U_0603_10V6K
1
2
R1616 100K_0402_5%
12
L32
FCM1608KF-110T05 0603
VGAIN@
1 2
R668
100_0402_1%
VGAIN@
1 2
C568
0.047U_0402_16V7K
VGAIN@
1 2
G
G
JCRT1
CH_13-12201527CP
CONN@
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
16
17
U28
BAV99_SOT23-3
VGAIN@
2
31
R1414
100K_0402_5%
1 2
C576
0.1U_0402_25V6
VGAIN@
1 2
D11
RB491D_SOT23
VGAIN@
2 1 C573
0.047U_0402_16V7K
VGAIN@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SATA_PTX_C_DRX_P0
SATA_PTX_C_DRX_N0
SATA_PRX_DTX_N0
SATA_PRX_DTX_P0
USB1_EN#
USB20_N5_R
USB20_P5_R
USB1_EN#
SATA_PTX_C_DRX_P1
USB20_P9_R
SATA_PRX_DTX_N1
SATA_PRX_DTX_P1
SATA_PTX_C_DRX_N1
USB20_N9_R
USB20_P8_R
USB20_N8_R
SATA_PTX_C_DRX_P0 [13]
SATA_PTX_C_DRX_N0 [13]
SATA_PRX_C_DTX_N0 [13]
SATA_PRX_C_DTX_P0 [13]
USB_OC#4 [17]
USB_OC#2 [17,40]
USB1_EN#[40,49]
SATA_PTX_C_DRX_P1 [13]
SATA_PTX_C_DRX_N1 [13]
SATA_PRX_C_DTX_N1 [13]
SATA_PRX_C_DTX_P1 [13]
USB20_P5[17]
USB20_N5[17]
USB20_N8[17]
USB20_P8[17]
USB20_N9[17]
USB20_P9[17]
+5VALW
+5VALW
+USB_VCCA
+USB_VCCB
+3VALW
+USB_VCCB +USB_VCCA
+USB_VCCA +USB_VCCA
+12VS
+5VS
+USB_VCCB +USB_VCCA
+5VS
+5VS+5VS
+12VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
PCA70 LA-7521P M/B
0.1
SATA-HDD/ODD/USB
41 64Tuesday, April 12, 2011
2010/10/1 2011/11/01
Compal Electronics, Inc.
Place closely JHDD SATA CONN.
SATA HDD Conn. SATA ODD Conn
1.2A
W=60mils
2.5A
For EMI
1.1A
Place components closely ODD CONN.
Close to JHDD
For EMI
W=60mils
2.5A
Near CONN side.
Place C669,C670 closely USB CONN.
Place closely JUSB3.1 Place closely JUSB6.1
Place closely JUSB4.1
C606
4.7U_0603_10V6K
1
2
C595
10U_0805_10V4Z
1
2
R689 0_0402_5%
@
1 2
D22
PJDLC05C_SOT23-3
2
3
1
L38
WCM-2012-900T_0805
1
122
33
4
4
U34
AP2301SG-13 SO 8P
FLG 5
VIN
3VOUT 6
GND
1
EN
4
VOUT 7
VIN
2VOUT 8
R694 0_0402_5%
@
1 2
+
C600
150U_B2_6.3VM_R35M
1
2
L40
WCM-2012-900T_0805
1
122
33
4
4
C597
0.1U_0402_16V4Z
1
2
R690 0_0402_5%
@
1 2
JUSB4
ACON_UAS2C-4K1921
CONN@
VCC
1
D-
2
D+
3
GND
4
GND 5
GND 6
C587
0.1U_0402_25V6
1
2
C1070
0.1U_0402_25V6
1
2
R693 0_0402_5%
@
1 2
U33
AP2301SG-13 SO 8P
FLG 5
VIN
3VOUT 6
GND
1
EN
4
VOUT 7
VIN
2VOUT 8
R688
100K_0402_5%
1 2
C593 0.01U_0402_25V7K
1 2
JUSB6
ACON_UAS2C-4K1921
CONN@
VCC
1
D-
2
D+
3
GND
4
GND 5
GND 6
D23
PJDLC05C_SOT23-3
2
3
1
D24
PJDLC05C_SOT23-3
2
3
1
C582
10U_0805_10V4Z
1
2
C598
0.1U_0402_16V4Z
1
2
C1073
4.7U_0603_10V6K
1
2
C591 0.01U_0402_25V7K
1 2
C585
0.1U_0402_16V4Z
1
2
JHDD1
ACES_50224-01201-001
CONN@
11
22
33
44
55
66
77
88
99
10 10
11 11
12 12
GND1 13
GND2 14
C5920.01U_0402_25V7K
1 2
C599 1000P_0402_50V7K
12
C5900.01U_0402_25V7K
1 2
C588
0.1U_0402_25V6
1
2
JODD1
ACES_50224-01001-001
CONN@
11
22
33
44
GND1 11
GND2 12
55
66
77
88
99
10 10
JUSB3
ACON_UAS2C-4K1921
CONN@
VCC
1
D-
2
D+
3
GND
4
GND 5
GND 6
C584
0.1U_0402_16V4Z
1
2
C1068
0.1U_0402_25V6
1
2
C586
10U_0805_25V6K
1
2
R692 0_0402_5%
@
1 2
R691 0_0402_5%
@
1 2
L39
WCM-2012-900T_0805
1
122
33
4
4
C1074
4.7U_0603_10V6K
1
2
C594
10U_0805_10V4Z
1
2
C603 1000P_0402_50V7K
12
C596
1U_0603_10V6K
@
1
2
+
C601
150U_B2_6.3VM_R35M
1
2
+
C604
150U_B2_6.3VM_R35M
1
2
C589
0.1U_0402_25V6
1
2
C583
0.1U_0402_16V4Z
1
2
C602
4.7U_0603_10V6K
1
2
C1067
0.1U_0402_25V6
1
2
PLT_A_RST#
BT_COEX2
BCCDET
B_XBCCLK SIM_CLK
BCIO SIM_DATA
COMMON BCIO
B_BCRST SIM_RESET
BCIO
CPLGP1
BCPWON
BCRSTM
XBCLKM
B_R_BCRST
B_R_XBCCLK
B_BCRST
B_XBCCLK
BT_COEX1
CPLGP1
+3VS_MINI_R
TMPTU2_SXP_R
USB20_P10_R
XBCLKM
TMPTU1_SXP_R
PLT_A_RST#
USB20_N10_R
TV_CLKREQ#
BCCDET
SIM_RESET
SIM_DATA
SIM_VCC
SIM_CLK
BCRSTM BCPWON
SIM_DET COMMON
+VCC_SIM
DET2 SIM_CLKSIM_DATA
SIM_VCC
SIM_DET
SIM_RESET
+VCC_SIM
+VCC_SIMDET1
CLKREQ_WLAN#[14]
CLK_WLAN#[14] CLK_WLAN[14]
PCIE_PRX_WLANTX_P3[14] PCIE_PRX_WLANTX_N3[14]
PCIE_PTX_C_WLANRX_N3[14] PCIE_PTX_C_WLANRX_P3[14]
PLT_A_RST# [17,43,44]
E51_TXD[49] E51_RXD[49]
PCIE_WAKE#[15,43,45]
PCIE_PTX_C_TVRX_N4[14] PCIE_PTX_C_TVRX_P4[14]
ISDBT_DET [18]
PCIE_PRX_TVTX_P4[14] PCIE_PRX_TVTX_N4[14]
CLK_TV#[14] CLK_TV[14]
PCIE_WAKE#[15,43,45]
WLAN_LED# [49]
E51_TXD[49] E51_RXD[49]
TMPTU1_SXP [49]TMPTU2_SXP[49]
USB20_N10 [17]
USB20_P10 [17]
WL_OFF# [49]
+3VS
+1.5VS +1.5VS_WLAN
+3VS +1.5VS
+1.5VS_WLAN
+5VS_L_BCAS
+5VS_L_BCAS
+5VS
+5VALW
+5VS_L_BCAS
+5VS_L_BCAS
+5VS_BCAS +5VS_L_BCAS
+5VS
+3VS
+3VS
+3VS
+3VS
+3VS
+1.5VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
PCA70 LA-7521P M/B
0.1
PCIe-WLAN/TV_B-CAS
42 64
Tuesday, April 12, 2011
2010/10/1 2011/11/01
For SED
For SED
Slot 1 Half PCIe Mini Card-WLAN/ WiMax
40 mils
For AW-NE139H
Max 2.38W Max 0.5A
Debug card using
WLAN/ WiFi
Add BCCDET pull down
Inrush current = 0A
B-CAS Circuit
Mini Card Slot 2---TV tuner Currecnt: 3.3 : 1000mA, 1.5: 500mA
20mA Max
Debug card using
R722
47K_0402_5%
TV@
12
R737
10K_0402_5%
TV@
12
R725 0_0603_5%
@
1 2
R733 100_0402_5%
TV@
1 2
R702 0_0402_5%
@
1 2
C617
39P_0402_50V8J
1
2
LCN_CAF98-06206-S100
JSIM1
CONN@
VCC 1
RST 2
CLK 3
GND
4
VPP
5
I/O
6
GND0 8
GND1 9
DET
7
C624
0.1U_0402_16V4Z
1
2
C622
4.7U_0603_6.3V6K
1
2
E
C
B
Q40
BCW68GLT1G PNP SOT23-3
TV@
2
31
C621
0.1U_0402_16V4Z
1
2
R717 0_0402_5%@1 2
R713 0_0402_5%
@
1 2
C611
4.7U_0603_10V6K
1
2
R724
2.2K_0402_5%
TV@
12
L42
FBMA-L11-201209-221LMA30T_0805
TV@
1 2
R730 0_0402_5%
@
1 2
C609
0.01U_0402_25V7K
1
2
R707 0_0402_5%
1 2
R727 0_0402_5%
@
1 2
C607 39P_0402_50V8J
1 2
G
D
S
Q39
SSM3K7002BF 1N SC59-3
TV@
2
13
R708 0_0402_5%
1 2
R715 0_0402_5%
@
1 2
R1441 0_0402_5%
1 2
C614
0.1U_0402_16V4Z
@1
2
R736
10K_0402_5%
TV@
1 2
C629
1U_0402_6.3V6K
TV@
1
2
C625
4.7U_0603_6.3V6K
1
2
C623
0.01U_0402_16V7K
1
2
C619
0.1U_0402_16V7K
TV@
1
2
R1440 0_0402_5%
1 2
C616
47P_0402_50V8J
@
12
C612
47P_0402_50V8J
@
12
R723
10K_0402_5%
TV@
12
R728 100_0402_5%
TV@
1 2
G
D
S
Q41
SSM3K7002BF 1N SC59-3
TV@
2
13
R698 0_0603_5%@
1 2
G
D
S
Q38
AO3413_SOT23-3
TV@
2
1 3
T182PAD@
R732 0_0402_5%
@
1 2
C620
0.01U_0402_16V7K
1
2
U36
SN74AHC1G08DCKR_SC70-5
TV@
IN1
1
IN2
2
G
3
O4
P5
C610
0.1U_0402_16V4Z
1
2
R734 0_0402_5%
@
1 2
R721
100K_0402_5%
TV@
12
R714
0_0603_5%
@1 2
C627
0.01U_0402_25V7K
TV@
1
2
U35
SN74AHC1G08DCKR_SC70-5
TV@
IN1
1
IN2
2
G
3
O4
P5
C630
4.7U_0603_6.3V6K
TV@
1
2
C626 0.1U_0402_16V7K
1
2
R1098
100K_0402_5%
1 2
T173PAD@
R731 0_0402_5%
1 2
R735
10K_0402_5%
TV@
1 2
R704 0_0402_5%
1 2
R705 0_0402_5%@1 2
R729 0_0402_5%
1 2
R718 470_0402_5%
@
1 2
R738
1.5K_0402_5%
TV@
1 2
C615
4.7U_0603_10V6K
@1
2
C613
0.01U_0402_25V7K
@1
2
JMINI1
BELLW_80003-8041
CONN@
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
GND1
53
22
44
66
88
10 10
12 12
14 14
16 16
18 18
20 20
22 22
24 24
26 26
28 28
30 30
32 32
34 34
36 36
38 38
40 40
42 42
44 44
46 46
48 48
50 50
52 52
GND2 54
T183PAD@
R701
0_0402_5%
@
1 2
R697 0_0603_5%@
1 2
R726 0_0603_5%
1 2
C618
39P_0402_50V8J
1
2
JWLAN1
BELLW_80003-1021
CONN@
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
GND1
53
22
44
66
88
10 10
12 12
14 14
16 16
18 18
20 20
22 22
24 24
26 26
28 28
30 30
32 32
34 34
36 36
38 38
40 40
42 42
44 44
46 46
48 48
50 50
52 52
GND2 54
C608 39P_0402_50V8J
1 2
R716 0_0402_5%@
1 2
C628
0.1U_0402_16V4Z
TV@
1
2
R709 0_0603_5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+LAN_REGOUT
RJ45_MIDI3-
RJ45_MIDI1+
RJ45_MIDI2-
RJ45_MIDI0+
RJ45_MIDI0-
RJ45_MIDI3+
LAN_MDI0-
LAN_MDI2- RJ45_MIDI2+
RJ45_MIDI1-
LAN_MDI3+
LAN_MDI2+
LAN_MDI0+
LAN_MDI3-
LAN_MDI1+
LAN_MDI1-
PCIE_PTX_C_LANRX_P6
PCIE_PTX_C_LANRX_N6
ISOLATE#
PCIE_PRX_LANTX_P6
PCIE_PRX_LANTX_N6
LAN_MDI1+
LAN_MDI1-
LAN_MDI2-
LAN_MDI3+
LAN_MDI3-
LAN_MDI0-
LAN_MDI0+
LAN_EECS
CLKREQ_LAN#
CLK_LAN#
CLK_LAN
MCT1
MCT2
LAN_SMBALERT
MCT3
LAN_X2
LAN_X1
PCIE_WAKE#
LAN_EEDI
MCT4
LAN_SMBDATA
LAN_MDI2+
ENSWREG
RJ45_MIDI0-
RJ45_MIDI0+
RJ45_MIDI2+
RJ45_MIDI2-
RJ45_MIDI1-
RJ45_MIDI3+
RJ45_MIDI3-
RJ45_MIDI1+
ENSWREG
PLT_A_RST#
MCT4
MCT1
MCT2
MCT3
LAN_MDI0- LAN_MDI3+
LAN_MDI0+ LAN_MDI3-
LAN_MDI1+
LAN_MDI1- LAN_MDI2+
LAN_MDI2-
MCT1
MCT2
MCT3
MCT4
LAN_X1
LAN_X2
PLT_RST#_LAN
RJ45_GND LANGND
PCIE_PTX_C_LANRX_N6[14] PCIE_PTX_C_LANRX_P6[14]
PCIE_PRX_C_LANTX_P6[14]
PCIE_PRX_C_LANTX_N6[14]
CLK_LAN#[14] CLK_LAN[14]
PLT_A_RST#[17,42,44]
CLKREQ_LAN#[14]
PCIE_WAKE#[15,42,45]
WOL_EN#[49]
+LAN_EVDD10
+LAN_VDD10
+3V_LAN
+LAN_VDDREG
+3V_LAN
+LAN_VDD10
+3VALW+3VALW
+3V_LAN
+3V_LAN +LAN_VDD10
+3V_LAN
+3VS
+3V_LAN +LAN_VDDREG +LAN_EVDD10+LAN_VDD10
+LAN_VDD10
+3V_LAN
+3V_LAN
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
PCIe-LAN-RTL8111E
Custom
43 64Tuesday, April 12, 2011
2010/10/1 2011/11/01
Compal Electronics, Inc.
Power ( Decoupling Cap. )
WOL circuit (Connect +3V_LAN to +3VALW)
Vgs=-4.5V,Id=3A,Rds<97mohm
+3V_LAN rising time (10%~90%) need > 1ms and <100ms.
60 mils
Place C719 colse
to LAN chip
Close to Pin 34,35
Close to Pin 21
Pin26 assert Low,
RTL8111E will
be isolated with
PCIe I/F bus
Layout Note: L46 must be
within 200mil to Pin36,
C705 & C706 must be within
200mil to L46
SPEC:
3.3V, 70mA (Max)
1.05V, 300mA (Max)
C688, C690, C692, C694 close to Pin 27,39,47,48
C696, C698 close to Pin 12,42
C689, C691,C693 close to pin 13,29,45, respectively
C695 close to pin 3, respectively
C697,C699,C700 close to pin 6,9,41, respectively
Pin14
RTL8105E
NC
1K ohm PU
RTL8111E
Pin15
Pin38
NC
NC 10K ohm PD
LAN Conn.
R751
RTL8105E-VC
RTL8111E-VB
PWM Mode
0 ohm
(Pull High)
RTL8105E-VC
LDO Mode
R753
NC
NC 0 ohm
(Pull Down)
EMI surge solution for CCC (China Compulsory Certification).
Footprint need update
20mil
NC
Crystal
C662
0.1U_0402_16V7K
1
2
C651
0.1U_0402_16V4Z
1
2
C648
1U_0402_6.3V6K
1
2
C656 1000P_0402_50V7K
1 2 R752 75_0805_1%
1 2
C643 0.1U_0402_16V4Z
1 2
C647
0.1U_0402_16V4Z
1
2
C637 0.1U_0402_16V4Z
1 2
R756 75_0805_1%
1 2
C636 0.1U_0402_16V4Z
1 2
C631 0.1U_0402_16V7K
1 2
D63 B88069X9231T203_4P5X3P2-2
1 2
C659 1000P_0402_50V7K
1 2
U37
RTL8111E-VL-CGT_QFN48_6X6
PERSTB
25
HSOP
22
HSON
23
HSIP
17
HSIN
18
REFCLK_P
19
REFCLK_N
20 NC/MDIP2 7
NC/MDIN2 8
NC/MDIP3 10
NC/MDIN3 11
LED3/EEDO 31
LED1/EESK 37
EECS 30
LED0 40
MDIN1 5
MDIP1 4
MDIN0 2
MDIP0 1
RSET
46
LANWAKEB
28
ISOLATEB
26
CKXTAL1
43
CKXTAL2
44
AVDD10 3
EVDD10 21
DVDD10 29
DVDD10 41
VDDREG
34
ENSWREG
33
DVDD33 27
DVDD33 39
AVDD33 12
DVDD10 13
AVDD33 42
CLKREQB
16
EEDI 32
AVDD33 47
AVDD33 48
AVDD10 6
AVDD10 9
AVDD10 45
NC/SMBCLK
14
NC/SMBDATA
15
GPO/SMBALERT
38
GND
24
PGND
49 REGOUT 36
VDDREG
35
C664
4.7U_0603_10V6K
@
1
2
C641 0.1U_0402_16V4Z
1 2
C663
0.01U_0402_25V7K 1
2
C649
0.1U_0402_16V4Z
1
2
R753
0_0402_5%
@
12
C657
27P_0402_50V8J
1
2
D52
RCLAMP3304N.TCT_SLP2626P10-10
1
1
2
2
3
3
4
4
5
566
77
88
99
10 10
GND
11
R759 47K_0402_5%
1 2
R742 1K_0402_5%
1 2
C1607
1000P_1808_3KV7K
1 2
R739 10K_0402_5%
1 2
C645 0.1U_0402_16V4Z
1 2
C1611
4.7U_0603_6.3V6K
1
2
D64 B88069X9231T203_4P5X3P2-2
1 2
C635 0.1U_0402_16V4Z
1 2
C639 0.1U_0402_16V4Z
1 2
R740 10K_0402_5%
1 2 C633 0.1U_0402_16V4Z
1 2
C661 1000P_0402_50V7K
1 2
C642 0.1U_0402_16V4Z
1 2
C1609
4.7U_0603_6.3V6K
1
2
C632 0.1U_0402_16V7K
1 2
C1610
0.1U_0402_16V4Z
1
2
JLAN1
SANTA_130455-1
CONN@
PR1-
2
PR1+
1
PR2+
3
PR3+
4
PR3-
5
PR2-
6
PR4+
7
PR4-
8
GND 9
GND 10
R748 2.49K_0402_1%
1 2
D53 B88069X9231T203_4P5X3P2-2
1 2
C650
4.7U_0603_6.3V6K
1
2
R745 1K_0402_5%
1 2
R755 75_0805_1%
1 2
C644 0.1U_0402_16V4Z
1 2
Y5
25MHZ_20PF_X5H025000DK1H
1 2
C1608
0.1U_0402_16V4Z
1
2
C638 0.1U_0402_16V4Z
1 2
D54 B88069X9231T203_4P5X3P2-2
1 2
D51
RCLAMP3304N.TCT_SLP2626P10-10
1
1
2
2
3
3
4
4
5
566
77
88
99
10 10
GND
11
C646
4.7U_0603_6.3V6K
1
2
U38
LG-2446S-1
TCT1
1
TD1+
2
TD1-
3
TCT2
4
TD2+
5
TD2-
6MX2- 19
MX2+ 20
MCT2 21
MX1- 22
MX1+ 23
MCT1 24
TCT3
7
TD3+
8
TD3-
9
TCT4
10
TD4+
11
TD4-
12
MCT3 18
MX3+ 17
MX3- 16
MCT4 15
MX4+ 14
MX4- 13
C634 0.1U_0402_16V4Z
1 2
R751
0_0402_5%
12
R747 0_0603_5%
1 2
R758
100K_0402_5%
12
R757 75_0805_1%
1 2
C640 0.1U_0402_16V4Z
1 2
C658
27P_0402_50V8J
1
2
R1014 0_0402_5%@1 2
C666
0.01U_0402_25V7K
1
2
R746 0_0603_5%
1 2
L43
2.2UH +-5% NLC252018T-2R2J-N
1 2
R744 10K_0402_5%
1 2
G
D
S
Q42
PMV65XP 1P SOT23 TMOS
2
1 3
C665
1U_0402_6.3V6K
1
2
C660 1000P_0402_50V7K
1 2
R741 10K_0402_5%
1 2
R743
15K_0402_5%
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
XDCD1#_MSCD#
XDCD0#_SDCD#
XD_CLE
MC_PWREN#
XD_ALE
XD_SD_MS_D0
XD_SD_MS_D1
XD_SD_MS_D2
XD_SD_MS_D3
SDCMD_MSBS_XDWE#
XDWP_SDWP
XD_CLE
CPPE#
XDWP_SDWP
XD_ALE
PCIE_PRX_RTX_P5
PCIE_PTX_C_CRRX_N5
PCIE_PTX_C_CRRX_P5
APREXT
XDCE_SDCLK_MSCLK_R
XDCD2#
XDCD0#_SDCD#
XDCD2#
XDCD1#_MSCD#
XDCD0#_SDCD#
XDCE_SDCLK_MSCLK
SDCMD_MSBS_XDWE#
PCIE_PRX_RTX_N5
CPPE#
XDCE_SDCLK_MSCLK SDCLK
SDDAT3XD_SD_MS_D3
SDDAT1XD_SD_MS_D1 SDDAT0XD_SD_MS_D0
SDCMDSDCMD_MSBS_XDWE#
SDCDXDCD0#_SDCD#
SDDAT2XD_SD_MS_D2
SDWPXDWP_SDWP
PLT_RST#_CR
PLT_A_RST#[17,42,43]
CLK_CR#[14] CLK_CR[14]
PCIE_PRX_C_RTX_P5[14]
PCIE_PTX_C_CRRX_P5[14]
PCIE_PRX_C_RTX_N5[14]
PCIE_PTX_C_CRRX_N5[14]
CR_CPPE#[17]
CR_WAKE#[13]
+3VS
+1.8VS_APVDD
+1.8VS_APVDD
+1.8VS_APVDD
+3VS
+3VS +3VS_CR
+3VS_CR
+3VS_CR
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
PCA70 LA-7521P M/B
0.1
JMB385 Media Card Controller
Custom
44 64Tuesday, April 12, 2011
2010/10/1 2011/11/01
Compal Electronics, Inc.
15mil
40mil
40mil
40 mil
C670 close to pin19,20
C671 close to pin 44 C672 close to pin 18
C673 close to pin 37 C674 close to pin 10
C675~C677 close to pin 5
15mil
3 IN 1 Card Reader CONN
All DATA spacing=8mil, CLK spacing=15mil
D26
RB751V-40_SOD323-2
21
R7840_0402_5%
12
C687
0.1U_0402_16V4Z
1
2
C678 0.1U_0402_16V7K
1 2
R7850_0402_5%
12
R768 200K_0402_5%
1 2
R762 1K_0402_5%
1 2
R769 22_0402_5%
1 2
C680
22P_0402_50V8J
@
1
2
C675
0.1U_0402_16V4Z
1
2
C679 0.1U_0402_16V7K
1 2
R7740_0402_5%
12
R7760_0402_5%
12
C688
0.1U_0402_16V4Z
1
2
C686
10U_0603_6.3V6M
1
2
C682
0.1U_0402_10V7K
1
2
R771
0_0805_5%
@
1 2
R760 10K_0402_5%
1 2
R767 9.1K_0603_5%
1 2
C673
0.1U_0402_16V4Z
1
2
R7810_0402_5%
12
C683 0.1U_0402_10V7K@1 2
R765 1K_0402_5%
1 2
C677
10U_0603_6.3V6M
1
2
JMB385
U43
JMB385-LGEZ0C_LQFP48_7X7
XRSTN
1
XTEST
2
APCLKN
3
APCLKP
4APVDD 5
APGND 6
APREXT
7
APRXP
8APRXN
9
APV18 10
APTXN
11
APTXP
12
CPPE_N
13
CR1_CD2N
14
CR1_CD1N
15
CR1_CD0N/WAKEN
16
CR1_PCTLN
17
DV18 18
DV33 19
DV33 20
CR1_LEDN
21
MDIO14 22
MDIO13 23
GND 24
MDIO12 25
MDIO11 26
MDIO10 27
MDIO9 28
MDIO8 29
NC 30
GND 31
GND 32
GND 33
NC 34
NC 35
NC 36
DV18 37
NC 38
SEEDAT
39
MDIO7 40
MDIO6 41
MDIO5 42
MDIO4 43
DV33 44
MDIO3 45
MDIO2 46
MDIO1 47
MDIO0 48
R770 100_0402_5%
1 2
C670
0.1U_0402_16V4Z
1
2
R7730_0402_5%
12
R764 1K_0402_5%
1 2
JSD1
TAITW_PSDBTC-09GLBS1N14N0
CONN@
CMD
2
DAT3
1
DAT1
8
DAT2
9
CLK
5
VSS1
3
VSS2
6
WP
10 CD
11
VDD
4
DAT0
7
GND 12
GND 13
C671
0.1U_0402_16V4Z
1
2
C674
0.1U_0402_16V4Z
1
2
C672
10U_0603_6.3V6M
1
2
R763 10K_0402_5%
1 2
R772 0_0402_5%@1 2
R7860_0402_5%
12
R7870_0402_5%
12
R766 1K_0402_5%
1 2
C676
1000P_0402_50V7K
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USB_GPIO1
USB_GPIO2
USB_PESEL
USB_PEPWRDET
USB_SPISCK
USB_SPISI
USB_SPICS#
USB_SPISO
U2DN_A
U2DP_A
USB_PPON_A
USB_TEST_EN
USB_GPIO0
USB_PE_REXT
PCIE_DTX_PRX_N2
PCIE_DTX_PRX_P2
USB30_XT1
USB30_XT2
U3RXDP_A
U3RXDN_A
U3TXDP_A_C
USB_UREXT
U3TXDN_A_C
USB_GPIO1
USB30_SMI#
USB_GPIO2
USB_PESEL
CLKREQ_USB30#
USB30_SMI#
USB_GPIO0
+VDD12U
USB_TEST_EN
USB_PEPWRDET
+VDD33U
+VDD12U
USB_PORST#USB_PORST#_R
USB_PESEL
USB_PEPWRDET
USB_TEST_EN
CLKREQ_USB30#
+USB_3V3
USB_PORST#_R
USB_SPISO
USB_SPISI
USB_SPISCK
USB_SPICS#
+VDD33U
USB_PPON_A
USB_PE_REXT
USB_OCI
USB30_XT1
USB30_XT2
USB_UREXT
U3TXDN_B_C
U3TXDP_B_C
U3RXDN_B
U3RXDP_B
U2DN_B
U2DP_B
PLT_RST#_USB30
USB_OCI
+USB_1V2
+USB_1V2
USB30_SMI#[18]
PCIE_PTX_C_USBRX_P2 [14]
PCIE_PTX_C_USBRX_N2 [14]
CLK_USB30 [14]
CLK_USB30# [14]
PCIE_PRX_C_USBTX_N2 [14]
PCIE_PRX_C_USBTX_P2 [14]
U3RXDN_A [46]
U3RXDP_A [46]
U3RXDN_B [46]
U3RXDP_B [46]
U3TXDN_A_C [46]
U3TXDP_A_C [46]
U3TXDN_B_C [46]
U3TXDP_B_C [46]
PCIE_WAKE#[15,42,43] USB_PPON_A[46]
USB_OCI[17,46]
PLT_RST#[5,17,22,49]
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS +5VS
+3VS
+3VS
+VDD12U
+VDD12U
+VDD33U
+VDD12U
+VDD33U
+VDD12U
+VDD33U
+1.2VUSB
+1.2VUSB+1.2VUSB
+1.2VUSB
+1.2VUSB
+3VS
+1.2VUSB
U2DN_A[46] U2DP_A[46]
U2DN_B[46] U2DP_B[46]
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
PCA70 LA-7521P M/B
0.2
USB3.0
Custom
45 64Tuesday, April 12, 2011
2010/10/1 2011/11/01
Compal Electronics, Inc.
R809 R826
Mount
Mount
D3 Hot
For WAKE Function
USB_PEPWRDET
D3 Cold @
@
Close to ASM1042
USB_PESEL
R808 R825
Mount
Mount
Other applaction
Express Card/Mini Card
@
@
Power Sequence
update PEPWRDET at D3
hot mode pull low
T175PAD@
L45
FBMA-L11-201209-221LMA30T_0805
USB30@
1 2
R834 4.7K_0402_5%
USB30@
12
Y6
20MHZ_12PF_X5H020000FC1H-X
USB30@
1 2
C697 0.1U_0402_16V7K USB30@
12
R816
2.2K_0402_5%
@
1 2
R840 4.7K_0402_5%@12
R826 4.7K_0402_5%USB30@ 1 2
R814 4.7K_0402_5% @
1 2
C720
0.1U_0402_16V4Z
USB30@
1
2
C693 0.1U_0402_16V4Z
@
1 2
R830 10K_0402_5%
USB30@
1 2
R810 100K_0402_5% @
1 2
R811 4.7K_0402_5%@1 2
C727
0.1U_0402_16V4Z
USB30@
1
2
R817
2.2K_0402_5%
USB30@
1 2
C700
0.1U_0402_16V4Z
@
1
2
R1665 0_0402_5%USB30@
1 2
R809 4.7K_0402_5%@1 2
R808 4.7K_0402_5%USB30@ 1 2
C715
0.1U_0402_16V4Z
USB30@
1
2
R825 4.7K_0402_5%@1 2
C716
0.1U_0402_16V4Z
USB30@
1
2
C696 0.1U_0402_16V7K USB30@
12
L46
FBMA-L11-201209-221LMA30T_0805
USB30@
1 2
R821 4.7K_0402_5%@1 2
G
D
S
Q43
SSM3K7002FU_SC70-3
USB30@
2
13
C698 1U_0402_6.3V6K
USB30@
12
U45
MX25L5121EMC-20G SOP 8P
USB30@
CS#
1
SO 2
WP#
3
GND
4SI 5
SCLK 6
HOLD#
7
VCC 8
R824 12.1K_0402_1% USB30@
1 2
R823 4.7K_0402_5%@1 2
C708
0.1U_0402_16V4Z
USB30@
1
2
C722
0.1U_0402_16V4Z
USB30@
1
2
C691
15P_0402_50V8J
USB30@ 1
2
R835 0_0402_5%
USB30@
1 2
R822 12.1K_0402_1% USB30@
1 2
C718
0.1U_0402_16V4Z
USB30@
1
2
C735
0.1U_0402_16V4Z
USB30@
1
2
C692 22P_0402_50V8J
@
12
R844
4.7K_0402_5%
USB30@
12
R828 4.7K_0402_5%USB30@ 1 2
T184 PAD@
E
B
C
Q45
MMBT3904_SOT23-3
USB30@
2
3 1
C732
0.1U_0402_16V4Z
USB30@
1
2
R829 4.7K_0402_5%@1 2
C725
0.1U_0402_16V4Z
USB30@
1
2
R1017 0_0402_5%
USB30@
1 2
R843
4.7K_0402_5%
USB30@
12
R818 4.7K_0402_5%@1 2
R838 0_0402_5%
USB30@
1 2
(TQFN 64)
ASM1042
U44
ASM1042_TQFN64_9X9
USB30@
GPIO1
1
SMI#
2
GPIO2
3
PE_SEL
4
U3RXN_B 37
GNDA1 38
U3TXP_B 39
U3TXN_B 40
VCC33U 41
UREXT 42
U3TXP_A 43
U3TXN_A 44
GNDA2 45
U3RXP_A 46
U3RXN_A 47
VDD12U_2 48
U3RXP_B 36
VDD12U_1 35
VSUS12_2 34
GND2 33
VCC12_4 49
PE_CLKP 50
PE_CLKN 51
XO 52
XI 53
VDD12P 54
PE_RXP 55
PE_RXN 56
GNDA3 57
PE_TXP 58
PE_TXN 59
VCC33P 60
PE_REXT 61
VCC12_3 62
GND3 63
GPIO0 64
PE_PWRDET
5
PE_CLKREQ#
6
VCC33_1
7
SPI_CLK
8
SPI_DO
9
SPI_CS#
10
SPI_DI
11
GND1
12
PORST#
13
UART_RX
14
UART_TX
15
VCC12_1
16
VCC12_2
32
U2DN_B
17
U2DP_B
18
VSUS33_1
19
VSUS12_1
20
U2DN_A
21
U2DP_A
22
VSUS33_2
23
PE_WAKE#
24
PPON_A
25
PPON_B
26
OCI_A#
27
OCI_B#
28
PE_RST#
29
TEST_EN
30
VCC33_2
31
GND4 65
C707
0.1U_0402_16V4Z
USB30@ 1
2
C733
0.1U_0402_16V4Z
USB30@
1
2
C690 22P_0402_50V8J
@
12
C1614
0.1U_0402_16V4Z
1
2
C721
0.1U_0402_16V4Z
USB30@
1
2
C734
0.1U_0402_16V4Z
USB30@
1
2
C730
0.1U_0402_16V4Z
USB30@
1
2
R815
2.2K_0402_5%
USB30@
1 2
R839 0_0402_5%
USB30@
R1018 0_0402_5%
USB30@
1 2
R827 4.7K_0402_5%@1 2
T174PAD@
C724
0.1U_0402_16V4Z
USB30@
1
2
C723
0.1U_0402_16V4Z
USB30@
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
U3RXDN_A_R_0
U3RXDP_A_R_0
USB20_P1_L
USB20_N1_L
USB20_P1_R
U3TXDN_B_R
U3TXDP_B_R
U3TXDN_B
U3TXDP_B
USB20_N0_R
USB20_N1_R
USB20_P0_L
USB20_N0_L
USB20_P0_R
U3RXDN_B_R_1
U3RXDP_B_R_1
U3TXDP_A_R
U3TXDN_A_RU3TXDN_A
U3TXDP_A USB20_N1_L
USB20_P1_L
USB20_P0_L
USB20_N0_L
USB20_N1_L USB20_P1_L
USB20_P0_LUSB20_N0_L
USB_PPON_A#
USB_PPON_A
USB_PPON_A# USB_OCI
U3RXDN_A_R_0
U3RXDP_A_R_0 U3RXDP_A_R_0
U3RXDN_A_R_0
U3TXDN_A_R
U3TXDP_A_R
U3TXDN_A_R
U3TXDP_A_R
U3TXDN_B_R
U3TXDP_B_R U3TXDP_B_R
U3TXDN_B_R
U3RXDP_B_R_1
U3RXDN_B_R_1 U3RXDN_B_R_1
U3RXDP_B_R_1
U3TXDP_A_C[45]
U3TXDN_A_C[45]
U3RXDN_A[45]
U3RXDP_A[45]
U3TXDN_B_C[45]
U3RXDN_B[45]
U3RXDP_B[45]
U3TXDP_B_C[45]
USB_OCI[17,45]
USB2_EN# [49]
USB_PPON_A[45]
USB20_P0[17]
USB20_N0[17]
USB20_P1[17]
USB20_N1[17]
+USB30_VCCA
+USB30_VCCA
+USB30_VCCA
+USB30_VCCA
+USB30_VCCA
+USB30_VCCA
+USB30_VCCA
+USB30_VCCA
+5VALW +USB30_VCCA
+3VALW
U2DN_B[45]
U2DP_B[45]
U2DN_A[45]
U2DP_A[45]
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
PCA70 LA-7521P M/B
0.1
USB3.0 CONN
46 64
Tuesday, April 12, 2011
2010/10/1 2011/11/01
USB3.0 Port A
Connector
W=60mils
W=60mils
must to close to JUSB1
must to close to JUSB2
USB2.0 Connector
Co-lay with JUSB1
When USB30 not used
USB2.0 Connector
Co-lay with JUSB2
When USB30 not used
For USB2.0 ESD diode
For USB3.0 ESD diode
For USB2.0 ESD diode
For USB3.0 ESD diode
Place closely JUSB1.1
Place closely JUSB2.1
Layout placement as
close as possable
Layout placement as
close as possable
USB3.0 Port B
Connector
W=60mils
2.5A
R888 0_0402_5% @
1 2
C711
0.1U_0402_16V4Z
1
2
R879 0_0402_5% @
1 2
C768 0.1U_0402_16V7KUSB30@ 12
L53
WCM-2012-900T_0805
USB30@
1
122
33
4
4
R891 0_0402_5% @
1 2
L54
WCM-2012-900T_0805
USB30@
1
122
33
4
4
L49
WCM-2012-900T_0805
USB30@
1
122
33
4
4
R896 0_0402_5% @
1 2
R882 0_0402_5%USB20@ 1 2
R883 0_0402_5%USB30@ 1 2
C769 0.1U_0402_16V7KUSB30@ 12
L52
WCM-2012-900T_0805
USB30@
1
122
33
4
4
U46
RT9715BGS_SO8
FLG 5
VIN
3VOUT 6
GND
1
EN
4
VOUT 7
VIN
2VOUT 8
G
D
S
Q49
SSM3K7002FU_SC70-3
USB30@
2
13
D28
PJUSB208H_SOT23-6
I/O1 1
REF1 2
I/O2 3
I/O3
4
REF2
5
I/O4
6
+
C766
150U_B2_6.3VM_R35M
1
2
R881 0_0402_5%USB30@ 1 2
R885 0_0402_5% @
1 2
R1019
0_0402_5%
USB20@
1 2
R901 0_0402_5% @
1 2
R880 0_0402_5%USB20@ 1 2
JUSB7
OCTEK_USB-04APEB
CONN@
1
1
2
2
3
3
4
4
GND
5
GND
6
GND
7
GND
8
R1020
100K_0402_5%
12
JUSB2
OCTEK_USB-09EAEB
CONN@
SSTX-
8
SSTX+
9
GND 10
GND 11
GND 12
GND 13
VBUS
1
D-
2
D+
3
GND
4
SSRX-
5
SSRX+
6
GND
7
R897 0_0402_5% @
1 2
C767 0.1U_0402_16V7KUSB30@ 12
L51
WCM-2012-900T_0805
USB30@
1
122
33
4
4
R890 0_0402_5% @
1 2
D27
PJUSB208H_SOT23-6
I/O1 1
REF1 2
I/O2 3
I/O3
4
REF2
5
I/O4
6
JUSB1
OCTEK_USB-09EAEB
CONN@
SSTX-
8
SSTX+
9
GND 10
GND 11
GND 12
GND 13
VBUS
1
D-
2
D+
3
GND
4
SSRX-
5
SSRX+
6
GND
7
JUSB8
OCTEK_USB-04APEB
CONN@
1
1
2
2
3
3
4
4
GND
5
GND
6
GND
7
GND
8
+
C765
150U_B2_6.3VM_R35M
1
2
C710
4.7U_0805_10V4Z
@
1
2
L50
WCM-2012-900T_0805
USB30@
1
122
33
4
4
C770 0.1U_0402_16V7KUSB30@ 12
8
7
65
4
3
2
1
9
10
D38
YSCLAMP0524P_SLP2510P8-10-9
USB30@
4
5
1
6
2
7
3
9
8
R889 0_0402_5% @
1 2
R895 0_0402_5%USB30@ 1 2
C713
1U_0603_10V6K
1
2
R892 0_0402_5%USB20@ 1 2
R893 0_0402_5%USB30@ 1 2
R902 0_0402_5% @
1 2
R884 0_0402_5% @
1 2
8
7
65
4
3
2
1
9
10
D39
YSCLAMP0524P_SLP2510P8-10-9
USB30@
4
5
1
6
2
7
3
9
8
C712
1000P_0402_50V7K
1
2
R894 0_0402_5%USB20@ 1 2
C1072
0.1U_0402_25V6
1
2
R900 0_0402_5% @
1 2
C1071
0.1U_0402_25V6
1
2
A
A
B
B
C
C
D
D
E
E
F
F
G
G
H
H
1 1
2 2
3 3
4 4
MONO_INMONO_IN_1
CBP
CBN
MIC1_L_C
MIC1_R_C
MIC1_L
MONO_IN
SENSEAMIC_SENSE#
HP_DET#
AMP_LEFT_L
AMP_LEFT_R
HP_RIGHT
HDA_SDIN0_AUDIO
+VREF
MIC_SENSE#
MIC1_L_R
MIC1_R_R
MIC1_L MIC1_L_R1
MIC1_R_R1
AMP_WOOFER_R
INT_DMIC_CLK_R
MIC1_R
MIC1_R
HP_L_0 PL
PRHP_R_0
PL
PR
SENSEB
WOOFER_DET#_Q
HP_R_1
WOOFER_DET#_Q
HP_DET#
HP_LEFT
HP_RIGHT HP_L
HP_R
HP_L_1
HP_LEFT
AMP_LEFT [48]
AMP_RIGHT [48]
AMP_WOOFER [48]
EC_BEEP#[49]
PCH_SPKR[13]
AZ_BITCLK_HD [13]
AZ_SDIN0_HD [13]
AZ_SDOUT_HD[13]
AZ_SYNC_HD[13]
INT_DMIC_DATA[50]
EAPD[49]
INT_DMIC_CLK[50]
AZ_RST_HD#[13]
HP_DET#[34,49]
HP_MUTE[49]
CODEC_MUTE#[49]
WOOFER_PD#[48,49]
PNL_STAT[34,48,49]
S_HP_OUT_L[34]
S_HP_OUT_R[34]
+AVDD_HDA
+3VS
+3VS
+3VS_VDD
+AVDD_HDA +3VS_VDD
+MIC1_VREFO
+MIC1_VREFO
+5VS
+5VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
PCA70 LA-7521P M/B
0.1
HDA-ALC272/HP/MIC
47 64
Tuesday, April 12, 2011
2010/10/1 2011/11/01
HP-OUT (PIN 32, 33)
15mil40mil
SENSE A 20K
5.1K
SENSE B
MIC1 (PIN 21, 22)
Sense Pin Impedance Codec Signals
For ESD and EMI
Place close to Codec
(Place close to PIN25)
(Place close to PIN38)
(Place close to PIN1)
(Place close to PIN9)
GND GNDA
4.75V
(output = 300 mA)
60mil 40mil
10mil
HP JACK
MIC JACK
PCI Beep
EC Beep
Change to AGND for
high frequency noise
issue
For EMI
10K
5.1K
39.2K
LINE1 (PIN 23, 24)
FRONT (PIN 35, 36)
SURR (PIN 39, 41)
10K
20K
39.2K
LFE (PIN 44)
MIC2 (PIN 16, 17)
LINE2 (PIN 14, 15)
LFE+HP-OUT10K//5.1K
0:PC MODE
1:HDMI MODE
C1468
220P_0402_50V7K
1
2
L98
MBK1608121YZF_0603
12
R1527
0_0402_5%
1 2
C1453
0.1U_0402_16V7K
1
2
R1536
56.2_0603_1%
1 2
R1661 0_0603_5%@1 2
R1523
0_0402_5%
1 2
C1458
0.1U_0402_16V7K
1
2
C1481 0.1U_0402_16V4Z<EMI> 1 2
D67
PJDLC05C_SOT23-3
2
3
1
L103
FBMA-L11-160808-700LMT_2P
1 2
L114 FBMA-L10-160808-301LMT_2P
1 2
C1449
0.1U_0402_16V4Z
1
2
G
D
S
Q104
SSM3K7002BF 1N SC59-3
2
13
C1469
220P_0402_50V7K
1
2
C1471
27P_0402_50V8J
@
1
2
L100
BLM15AG121SN1D_L0402_2P
1 2
C1470
0.01U_0402_25V7K
@
1
2
R1540 0_0603_5%
1 2
C1476
330P_0402_50V7K
1
2
C1456
0.1U_0402_16V4Z
1
2
C1459
10U_0805_10V6K
@
1
2
R1525
4.7K_0402_5%
12
L101
BLM15AG121SN1D_L0402_2P
1 2
R1666
0_0402_5%
1 2
R1526
4.7K_0402_5%
12
C1450
0.1U_0402_16V4Z
1
2
JHP1
SINGA_2SJ-0960-D11
CONN@
1
2
3
4
5
6
C1478 2.2U_0603_6.3V6K
1 2
C1603
1U_0603_25V6K
12
L102
FBMA-L11-160808-700LMT_2P
1 2
E
B
C
Q92
BC847B_SOT23-3
@
2
3 1
C1474
2.2U_0603_6.3V6K
1
2
R1535
20K_0402_1%
12
C1465 4.7U_0805_25V6-K
1 2
C1460
0.1U_0402_16V7K
1
2
C1473
0.1U_0402_16V7K
1
2
R852
4.7K_0402_5%
12
R1522 47K_0402_5%
1 2
R1531
33_0402_5%
1 2
R15345.1K_0402_1% 1 2
C1448 0.1U_0402_16V4Z
1 2
C1464
2.2U_0805_25V6K 1 2
R1530
4.7K_0402_5%
@
12
C1477
330P_0402_50V7K
1
2
R1545
100_0402_5%
@
U97
TS5A23157RSER_QFN10_2X1P5
IN1
1
NO1
2
GND 3
NO2
4
IN2
5
COM2 6
NC2
7
V+ 8
NC1
9
COM1 10
R153320K_0402_1% 12
R1537
56.2_0603_1%
1 2
D66
CH751H-40PT_SOD323-2
21
R163810K_0402_1%1 2
JMIC1
SINGA_2SJ-0960-D11
CONN@
1
2
3
4
5
6
D60
PJDLC05C_SOT23-3
2
3
1
C1604
1U_0603_25V6K
@
12
R1639 22_0402_5%@
1 2
U86
G9191-475T1U_SOT23-5
IN
1
GND
2
SHDN
3
OUT 5
BYP 4
L97
FBMA-L11-160808-800LMT_0603
@
1 2
C1451
0.01U_0402_25V7K
@
1 2
C1479 2.2U_0603_6.3V6K
1 2
R1546
100_0402_5%
@
R1521 47K_0402_5%
1 2
C1454
10U_0805_10V6K
1
2
E
B
C
Q91
BC847B_SOT23-3
@
2
3 1
R1529 1K_0402_5%
12
R1528 1K_0402_5%
12
C1466 22P_0402_50V8J
1 2
C1461
2.2U_0805_25V6K1 2
R1660 0_0603_5%@1 2
C1482 0.1U_0402_16V4Z<EMI> 1 2
C1452
10U_0805_10V6K
1
2
C1455
0.1U_0402_16V7K
1
2
R1659 0_0603_5%
1 2
C1457
10U_0805_10V6K
1
2
U87
ALC663-GR_LQFP48_7X7
LINE2-L
14
LINE2-R
15
MIC2_R
17
MIC2_L
16
DVSS
4
GPIO1
3
CBP
29
CBN
30
CPVEE
31
MIC1_L
21
MIC1_R
22
SENSE A
13
PCBEEP-IN
12
FRONT_L 35
FRONT_R 36
MIC2-VREFO 19
RESET#
11
SYNC
10
BITCLK 6
SDATA_OUT
5
SDATA_IN 8
SPDIFO2
45
DMIC_CLK1/2
46
LINE1-L 23
MIC1-VREFO 28
LINE2-VREFO 20
VREF 27
DVDD 1
DVDD_IO 9
AVDD1 25
AVDD2 38
LINE1-VREFO 18
HPOUT-R 32
EAPD
47
SPDIFO1
48
GPIO0/DMIC_DATA1/2
2
DVSS
7
LINE1-R 24
MONO-OUT 37
SENSE B
34
CENTER 43
LFE 44
HPOUT-L 33
JDREF 40
AVSS1 26
AVSS2 42
SURR_L 39
SURR_R 41
D65
CH751H-40PT_SOD323-2
21
C1467 4.7U_0805_25V6-K
1 2
R1542 0_0603_5%
1 2
R1543 0_0603_5%
1 2
R1524
0_0402_5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+12V1_PVCC
SPKL+
BSPR
AMP_PD#_R
GIN0
AMP_L_C
PLIMIT
OUTPR
GIN1
+12V1_AVCC BSPL
OUTNR
GIN1GIN0
OUTNL
BSNR
BSNL
SPKL-OUTNL
OUTPL
SPKR+
SPKR-
OUTPR
OUTNR
+12V1_AVCC
OUTPL
AMP_R_C
+GVDD
+12V2_PVCC
AMP_PD1#_R
GIN0_W
PLIMIT_WGIN1_W
+12V2_AVCC
SWOOFER
AMP_W
+GVDD1
OUTL_W SPKW-
SPKW+
GIN1_WGIN0_W
SWOOFER
OUTR_W
+12V2_AVCC
SPKW+
SPKR+
SPKR-
SPKL-
SPKL+
BSPR_W
BSPL_W
WOOFER_DET
WOOFER_DET
WOOFER_DETWOOFER_ID
SPKW-
WOOFER_ID
AMP_L
AMP_R
BSPL
BSNL
BSPR
BSNR
AMP_PD#[49]
AMP_WOOFER[47]
WOOFER_PD#[47,49]
S_LINE_OUTL[34]
S_LINE_OUTR[34]
WOOFER_DET# [49]
WOOFER_ID[49]
AMP_LEFT[47]
S_LINE_OUTL[34]
S_LINE_OUTR[34] AMP_RIGHT[47]
PNL_STAT[34,47,49]
+12V1_PVCC
+12V1_PVCC
+GVDD
+GVDD
+12V2_PVCC
+12V2_PVCC
+GVDD1 +GVDD1
+12VALW
+12VALW +3VALW
+12VALW
+12VALW
+3VALW
+12VALW +12VALW +3VALW
+12VALW
+3VALW
+5VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
PCA70 LA-7521P M/B
1.0
AMP & Audio Jack
Custom
64Tuesday, April 12, 2011
2010/04/14 2011/04/14
Compal Electronics, Inc.
48
Close to U90
Pin27,28
Close to U90
Pin15,16
5A/120ohm/100MHz
5A/120ohm/100MHz
5A/120ohm/100MHz
5A/120ohm/100MHz
Speaker Conn.
Close to U91
Pin27,28
Close to U91
Pin15,16
5A/120ohm/100MHz
5A/120ohm/100MHz
Woofer Conn.
0
0
GAIN1 GAIN0
1
10
0
11
20dB
26dB
32dB
60Kohm
36dB
30Kohm
15Kohm
AV(inv) INPUT
IMPEDANCE
9Kohm
TPA3113 for Speaker TPA3113 for Woofer
Close to U94
Pin8
0:PC MODE
1:HDMI MODE
EMI request Close to U4.BB57
C1550
10U_1206_25V6M
1
2
C1515 0.22U_0402_10V6K
1 2
R1668
100K_0402_5%
1 2
C1487
1U_0603_25V6K
12
C1617 1000P_0603_50V7K@1 2
R1624
0_0402_5%
@
1 2
C1492
0.22U_0603_25V7K
1 2
R1565 10_0603_5%
1 2
C1508
470P_0805_50V8J
1
2
C1511
1U_0603_25V6K
12
R1550
10_1206_5%
12
+
C1517
220U_16V_M
1
2
R1658
10K_0402_1%
1 2
C1516 0.22U_0402_10V6K
1 2
R1549
28.7K_0402_1%
@
12
R1618
16.2K_0402_1%
1 2
R1619
2.05K_0402_1%
1 2
R1568 20.5K_0402_1%
1 2
C1523
1U_0603_25V6K
12
C1501
1U_0603_25V6K
12
C1524
1U_0603_25V6K
12
C1503
1U_0603_25V6K
12
R1657
1M_0402_5%
1 2
R1560
10_1206_5%
12
R1569
0_0402_5%
1 2
C1502
1U_0603_25V6K
12
U94A
TLV272IDR SOIC 8P
+IN
3
-IN
2OUT 1
P8
G
4
C1526
1U_0603_25V6K
12
C1544 0.1U_0402_16V7K
1 2
C1504
470P_0805_50V8J
1
2
R1557
100K_0402_1%
@
1 2
R1667
100K_0402_5%
1 2
C1615 1000P_0603_50V7K@1 2
R1554
100K_0402_5%
12
L107
HCB2012KF-121T50_0805
1 2
C1618 1000P_0603_50V7K@1 2
C1500
1U_0603_25V6K
12
C1491 0.22U_0402_10V6K
1 2
L113
HCB2012KF-121T50_0805
1 2
R1552
0_0402_5%
1 2
C1513
1000P_0603_50V7K
1
2
C1514 0.22U_0402_10V6K
1 2
R1556
100K_0402_1%
@
1 2
C1509
1000P_0603_50V7K
1
2
C1510
0.47U_0603_16V7K
1
2
C1551
0.1U_0402_16V7K
1
2
C1505
1000P_0603_50V7K
1
2
L106
FBMA-L11-160808-121LMA30T_0805
1 2
R1563
100K_0402_1%
1 2
R1555
10_1206_5%
12
C1506
1U_0603_25V6K
12
C1545 0.22U_0603_25V7K
1 2
L104
HCB2012KF-121T50_0805
1 2
C1489
0.22U_0603_25V7K
1 2
R1547 10_0603_5%
1 2
C1548
0.033U_0402_16V7K
12
C1547
0.22U_0402_10V6K
1 2
D68
PJSOT24CH_SOT23-3
1
2
3
C1519
1U_0603_25V6K
12
C1496
1000P_0603_50V7K
1
2
C1494 0.22U_0402_10V6K
1 2
D62
PJSOT24CH_SOT23-3
1
2
3
R1663
0_0402_5%
1 2
C1554
0.1U_0402_16V7K
1 2
C1485
470P_0805_50V8J
1
2
C1507
1U_0603_25V6K
12
R1572
100K_0402_5%
12
R1548
10_1206_5%
12
L110
HCB2012KF-121T50_0805
1 2
R1617
1.91K_0402_1%
1 2
U96
TS5A23157RSER_QFN10_2X1P5
IN1
1
NO1
2
GND 3
NO2
4
IN2
5
COM2 6
NC2
7
V+ 8
NC1
9
COM1 10
C1522
1000P_0603_50V7K
1
2
C1512
470P_0805_50V8J
1
2
C1549
0.01U_0402_25V7K
1
2
L105
HCB2012KF-121T50_0805
1 2
R1640 10K_0402_5%
1 2
R1564
100K_0402_1%
1 2
JWOFER1
SINGA_2SJ2270-000111
CONN@
2
3
4
6
5
1
7
R1561
100K_0402_1%
1 2
G
D
S
Q106
SSM3K7002BF 1N SC59-3
2
13
U94B
TLV272IDR SOIC 8P
+IN
5
-IN
6OUT 7
C1495
470P_0805_50V8J
1
2
C1497 0.22U_0402_10V6K
1 2
C1520
0.47U_0603_16V7K
1
2
R1559
100K_0402_1%
@
1 2
C1498
0.22U_0603_25V7K
1 2
D69
PJSOT24CH_SOT23-3
1
2
3
R1553
10K_0402_1%
12
R1562
100K_0402_1%
1 2
R1570
10K_0402_1%
12
U91
TPA3113D2PWPR_HTSSOP28
SD#
1
FAULT#
2
LINP
3
LINN
4
GAIN0
5
GAIN1
6
AVCC
7
AGND 8
GVDD 9
PLIMIT 10
RINN
11
RINP
12
NC
13
PBTL 14
PVCCR
15
PVCCR
16
BSPR 17
OUTPR 18
PGND 19
OUTNR 20
BSNR 21
BSNL 22
OUTNL 23
PGND 24
OUTPL 25
BSPL 26
PVCCL
27
PVCCL
28
GND
29
C1484
0.22U_0603_25V7K
1 2
L111
FBMA-L11-160808-121LMA30T_0805
1 2
C1606 0.22U_0402_10V6K
1 2
R1567
100K_0402_5%
@
1 2
C1518
1U_0603_25V6K
12
C1616 1000P_0603_50V7K@1 2
R1620
22.6K_0402_1%
1 2
C1590
1U_0603_25V6K
@
12
R1558
100K_0402_1%
@
1 2
C1521
470P_0805_50V8J
1
2
C1486
1000P_0603_50V7K
1
2
R1551
100K_0402_5%
@
1 2
U90
TPA3113D2PWPR_HTSSOP28
SD#
1
FAULT#
2
LINP
3
LINN
4
GAIN0
5
GAIN1
6
AVCC
7
AGND 8
GVDD 9
PLIMIT 10
RINN
11
RINP
12
NC
13
PBTL 14
PVCCR
15
PVCCR
16
BSPR 17
OUTPR 18
PGND 19
OUTNR 20
BSNR 21
BSNL 22
OUTNL 23
PGND 24
OUTPL 25
BSPL 26
PVCCL
27
PVCCL
28
GND
29
R1566
10_1206_5%
12
C1525
1U_0603_25V6K
12
C1605 0.22U_0402_10V6K
1 2
L108
HCB2012KF-121T50_0805
1 2
R1571
10_1206_5%
12
C1490 0.22U_0402_10V6K
1 2
C1546
0.22U_0402_10V6K
1 2
JSPK1
ACES_50228-00471-001
CONN@
1
1
2
2
3
3
4
4
G1
5
G2
6
R1621
10K_0402_1%
@
1 2
+
C1499
220U_16V_M
1
2
C1589
1U_0603_25V6K
12
D61
PJSOT24CH_SOT23-3
1
2
3
R1622
0_0402_5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_PCI_EC
ECRST#
EC_SMB_DA1
EC_SMB_CK1
EC_BEEP#
LPC_AD1
SERIRQ
KB_RST#
LPC_AD0
GATEA20
LPC_FRAME#
LPC_AD3
LPC_AD2
PLT_RST#
SPI_CLK
SPI_CS#
EN_DFAN2
PCH_RSMRST#
USB1_EN#
EC_SI_SPI_SO
EC_SO_SPI_SI
BKOFF#
SYSON
CLK_PCI_EC
ECRST#
PM_SLP_S3#
FAN_SPEED1
E51_TXD
ON/OFF
CRY1
EC_SMB_DA2
EC_SMI#
EC_SCI#
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
CRY2
CRY2CRY1
EC_SMB_CK2
EC_SMB_DA2
+EC_V18R
SUSP#
PBTN_OUT#
VGATE
PM_PWROK
SUSWARN#
KSO2
E51_RXD
VR_ON
E51_TXD
SYSON
TMPTU2_SXP
TMPTU1_SXP
SUSP#
PWRME_CTRL#
WOL_EN#
INVT_PWM
HP_MUTE
VR_ON
EC_PECI
HDMI_CABLE_DET#
H_PROCHOT#_EC
SCALER_ON#
H_PROCHOT#_EC
S_BKOFF#
SPI_CLK
SPI_CS#
SPI_CLK
EC_SO_SPI_SI EC_SI_SPI_SO
I2C_INT_SCR
AD_BID
AD_BID
EC_ENVDD
HP_DET#_EC
KSO1
BT_LED#
WLAN_LED#
KSO3
WOOFER_PD#
KSI4
KSI5
KSI6
KSI7
VGA_UMA_BKOFF#
EN_DFAN1
FAN_SPEED2
CODEC_MUTE#
WOOFER_DET#
SCFW_UPDATE#
PNL_STAT
HDMI_STAT
AMP_PD#AMP_PD#_EC0
PWR_ON_LED
S_ENVDD_R
VR_ON
EC_PECI
GATEA20
EC_BEEP# [47]
GATEA20[18]
LPC_AD2[13] LPC_AD1[13] LPC_AD0[13]
LPC_FRAME#[13]
KB_RST#[18]
LPC_AD3[13]
PLT_RST#[5,17,22,45]
BKOFF# [35]
SYSON [57]
EN_DFAN2 [51]
CLK_PCI_EC[17]
EC_SMB_DA1[34] EC_SMB_CK1[34]
EC_SMI#[18]
EC_SCI#[18]
EC_SMB_DA2[14,23,52] EC_SMB_CK2[14,23,52]
FAN_SPEED1[51]
PM_SLP_S3#[15]
E51_TXD[42]
ON/OFF[50]
PM_PWROK [15]
SERIRQ[13]
E51_RXD[42]
USB1_EN# [40,41]
VGATE [15,58]
PCH_RSMRST# [15]
PBTN_OUT# [15]
SUSP# [51,54,55,56,57]
VR_ON [58]
PWRME_CTRL# [13]
SUSWARN#[15]
WOL_EN# [43]
INVT_PWM[35]
HP_MUTE [47]
H_PROCHOT# [5]
VR_HOT#[58]
H_PECI [5,18]
HDMI_CABLE_DET# [34,37]
TMPTU2_SXP [42]
TMPTU1_SXP [42]
AD2 [34]
AD1 [34]
EC_ENVDD[35]
SCALER_ON# [34]
PM_SLP_S5#[15]
PM_SLP_S4# [15]
CIR_IN [50]
EAPD [47]
I2C_INT_SCR [34]
S_ENVDD[34]
VGA_IN_DET# [34,40]
EC_SWI# [15]
USB2_EN# [46]
WL_OFF# [42]
HP_DET#[34,47]
S_AMP_PD# [34]
PNL_STAT2 [34]
S_BKOFF# [34]
VGA_BKOFF#_R[22]
UMA_ENBKL[16]
CPU_OT [52,53]
BT_LED#[18] WLAN_LED#[42]
WOOFER_PD#[47,48]
EN_DFAN1 [51]
FAN_SPEED2[51]
VCCSA_PG[56] CODEC_MUTE#[47] WOOFER_DET#[48]
AD1_KBC [50]
SCFW_UPDATE#[40]
WOOFER_ID[48]
PNL_STAT [34,47,48]
HDMI_STAT [34]
PWR_ON_LED[50]
AMP_PD# [48]
+3VS
+3VS
+3VALW +3VALW
+3VALW
+3VALW
+3VALW
+3VALW
+3VALW
+3VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
PCA70 LA-7521P M/B
0.1
LPC-EC-KB930
49 64
Tuesday, April 12, 2011
2010/10/1 2011/11/01
Compal Electronics, Inc.
to avoid EC entry ENE test mode
TV tuner
temperature
For EMI
HP de-pop for scaler output.
For EMI
SPI Flash (256KB)
20mils
Rb
Ra
VGA
PCH
ESD request Close to U51.121
ESD request Close to U51.74
ESD request Close to U51.1
C818 0.1U_0402_16V4Z
12
R957 2.2K_0402_5%
1 2
C1601 0.1U_0402_16V4Z
1 2
R964
10_0402_5%
1 2
R1662
0_0402_5%
1 2
C813
0.1U_0402_16V4Z
1
2
R958 2.2K_0402_5%
1 2
Y7
32.768KHZ_12.5PF_Q13MC14610002
OSC 4
OSC 1
NC
3
NC
2
C816
47P_0402_50V8J
12
R948 10K_0402_5%
12
C1600 0.1U_0402_16V4Z
1 2
R951
100K_0402_5%
1 2
R953
8.2K_0603_1%
1 2
R942 10K_0402_5%
1 2
T224
C812
0.1U_0402_16V4Z
1
2
U52
EN25F20-100GCP SOP 8P
S
1
VCC
8
Q2
HOLD
7
VSS 4
D
5
C
6
W
3
R1051 0_0402_5%
DIS@
1 2
T225
R954 43_0402_1%
1 2
R956 2.2K_0402_5%
1 2
R941
10_0402_5%
@
12
R945
47K_0402_5%
12
R959 0_0402_5%@1 2
T227
G
D
S
Q57
2N7002K_SOT23
2
13
R943 10K_0402_5%
1 2
LPC & MISC
Int. K/B
Matrix
SM Bus
GPIO
GPIO
AD Input
PWM Output
DA Output
PS2 Interface
SPI Device I/F
SPI Flash ROM
GPO
GPI
U51
KB930QF-A1_LQFP128_14X14
GATEA20/GPIO00
1
KBRST#/GPIO01
2
SERIRQ#
3
LPC_FRAME#/LFRAME#
4
LPC_AD3/LAD3
5
PM_SLP_S3#/GPIO04
6
LPC_AD2/LAD2
7
LPC_AD1/LAD1
8
VCC 9
LPC_AD0/LAD0
10
GND
11
CLK_PCI_EC/PCICLK
12
PCIRST#/GPIO05
13
PM_SLP_S5#/GPIO07
14
EC_SMI#/GPIO08
15
GPIO0A
16
GPIO0B
17
GPIO0C
18
SUS_PWR_DN_ACK/GPIO0D
19
EC_SCI#/GPIO0E
20
PWM0/GPIO0F 21
VCC 22
BEEP#/PWM1/GPIO10 23
GND
24
INVT_PWM/PWM2/GPIO11
25
FANPWM0/GPIO12 26
ACOFF/FANPWM1/GPIO13 27
FAN_SPEED1/FANFB0/GPIO14
28
FANFB1/GPIO15
29
EC_TX/GPIO16
30
EC_RX/GPIO17
31
ON_OFF/GPIO18
32
VCC 33
SUSP_LED#/GPIO19
34
GND
35
NUM_LED#/GPIO1A
36
EC_RST#/ECRST#
37
CLKRUN#/GPIO1D
38
KSO0/GPIO20
39
KSO1/GPIO21
40
KSO2/GPIO22
41
KSO3/GPIO23
42
KSO4/GPIO24
43
KSO5/GPIO25
44
KSO6/GPIO26
45
KSO7/GPIO27
46
KSO8/GPIO28
47
KSO9/GPIO29
48
KSO10/GPIO2A
49
KSO11/GPIO2B
50
KSO12/GPIO2C
51
KSO13/GPIO2D
52
KSO14/GPIO2E
53
KSO15/GPIO2F
54
KSI0/GPIO30
55
KSI1/GPIO31
56
KSI2/GPIO32
57
KSI3/GPIO33
58
KSI4/GPIO34
59
KSI5/GPIO35
60
KSI6/GPIO36
61
KSI7/GPIO37
62
BATT_TEMP/AD0/GPI38 63
BATT_OVP/AD1/GPI39 64
ADP_I/AD2/GPI3A 65
AD3/GPI3B 66
AVCC 67
DAC_BRIG/DA0/GPO3C 68
AGND
69
EN_DFAN1/DA1/GPO3D 70
IREF/DA2/GPO3E 71
DA3/GPO3F 72
GPIO40 73
H_PECI/GPIO41 74
AD4/GPI42 75
AD5/GPI43 76
EC_SMB_CK1/SCL0/GPIO44
77
EC_SMB_DA1/SDA0/GPIO45
78
EC_SMB_CK2/SCL1/GPIO46
79
EC_SMB_DA2/SDA1/GPIO47
80
KSO16/GPIO48
81
KSO17/GPIO49
82
EC_MUTE#/PSCLK1/GPIO4A 83
USB_EN#/PSDAT1/GPIO4B 84
CAP_INT#/PSCLK2/GPIO4C 85
PSDAT2/GPIO4D 86
TP_CLK/PSCLK3/GPIO4E 87
TP_DATA/PSDAT3/GPIO4F 88
FSTCHG/GPIO50 89
BATT_CHG_LED#/GPIO52 90
CAPS_LED#/GPIO53 91
BATT_LOW_LED#/GPIO54 92
PWR_LED#/GPIO55 93
GND
94
SYSON/GPIO56 95
VCC 96
SDICS#/GPXIOA00 97
WOL_EN/SDICLK/GPXIOA01 98
ME_EN/SDIMOSI/GPXIOA02 99
EC_RSMRST#/GPXIOA03 100
EC_LID_OUT#/GPXIOA04 101
EC_ON/GPXIOA05 102
EC_SWI#/GPXIOA06 103
ICH_PWROK/GPXIOA07 104
BKOFF#/GPXIOA08 105
RF_OFF#/GPXIOA09 106
GPXIOA10 107
GPXIOA11 108
LID_SW#/GPXIOD00 109
PM_SLP_S4#/GPXIOD01 110
VCC 111
ENBKL/GPXIOD02 112
GND
113
EAPD/GPXIOD03 114
EC_THERM#/GPXIOD04 115
SUSP#/GPXIOD05 116
PBTN_OUT#/GPXIOD06 117
EC_PME#/GPXIOD07 118
SPIDI/MISO 119
SPIDO/MOSI 120
VR_ON/XCLK32K/GPIO57 121
XCLK1
122
XCLK0
123 V18R 124
VCC 125
SPICLK/GPIO58 126
AC_IN/GPIO59 127
SPICS# 128
C824
18P_0402_50V8J
1
2
R955 2.2K_0402_5%
1 2
C821
4.7U_0603_10V6K
1
2
T226
R961 100K_0402_5%
1 2
C825
18P_0402_50V8J
1
2
C810
0.1U_0402_16V4Z
1
2
C809
0.1U_0402_16V4Z
1 2
C822
0.1U_0402_16V4Z
1
2
C817
22P_0402_50V8J
@
1
2
C814
1000P_0402_50V7K
1
2
C1599 0.1U_0402_16V4Z
1 2
R950 47K_0402_5% 1 2
R940
0_0402_5%
12
C815
1000P_0402_50V7K
1
2
T228
R944 4.7K_0402_5%
1 2
R962
10M_0402_5%
1 2
C811
0.1U_0402_16V4Z
1
2
C823 10P_0402_50V8J
1 2
R1103 10K_0402_5%
12
R1052 0_0402_5%
@
1 2
R949 47K_0402_5% 1 2
R946 10K_0402_5%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ON/OFFBTN#
USB20_N2
USB20_P2
INT_DMIC_DATA
USB20_N3
USB20_P3
INT_DMIC_CLK
USB20_P2USB20_N2
USB20_N3 USB20_P3
INT_DMIC_CLKINT_DMIC_DATA
SATA_LED#
SATA_LED#
PWR_ON_LED
PWR_ON_LED
ON/OFFBTN#
ON/OFFBTN#
ON/OFF [49]
INT_DMIC_CLK[47]
CIR_IN[49]
INT_DMIC_DATA[47]
USB20_P2[17] USB20_N2[17]
USB20_P3[17] USB20_N3[17]
AD1_KBC[49] SATA_LED#[13]
PWR_ON_LED[49]
+3VS +3VS_CAM +3VS_CAM
+5VS
+5VS
+3VS
+3VALW
+3VALW
+3VALW
+3VS
+3VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
PCA70 LA-7521P M/B
0.1
PWR/Cap./TP/LED/LP/LS/Screw
50 64
Tuesday, April 12, 2011
2010/10/1 2011/11/01
TOP side
BTM side
For debug
Power Button
For EMI request
CAP Button/B Connector
Touchscreen
ISPD
CAM
CIR
PVT EMI request.
PCB Fedical Mark PAD
Screw Hole
Reserve for EMI.
1st 2nd
ZZZ1
PCB LA-7521P
6LPCB@
U72
H5TQ1G63DFR-11C
X76@
H11 H_3P3
@
1
H28 H_3P8N
@
1
H21 H_3P8
@
1
FD3
@
1
C1062 470P_0402_50V7K
12
D40
PJUSB208H_SOT23-6
@
I/O1 1
REF1 2
I/O2 3
I/O3
4
REF2
5
I/O4
6
C829
1000P_0402_50V7K
@
1
2
R973
0_0603_5%
@
1 2
H23 H_4P3X3P8
@
1
ZZZ2
X76
Part Number = X7630488L01
X76_HY1G@
FD1
@
1
H3 H_3P3
@
1
JSW1
ACES_50228-01071-001
CONN@
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
G12 12
G11 11
9
9
10
10
U67
H5TQ1G63DFR-11C
X76@
H7 H_3P3
@
1
C1064 1000P_0402_50V7K@
12
ZZZ3
X76
Part Number = X7630488L02
X76_SAM1G@
C1555
0.1U_0402_16V7K
1
2
C1602 470P_0402_50V7K
12
C826
0.1U_0402_25V6
@
1
2
H9 H_3P3
@
1
D33
BAV70W_SOT323-3
1
2
3
U66
H5TQ1G63DFR-11C
X76@
H16 H_4P5
@
1
H10 H_3P3
@
1
R967 100K_0402_5%
1 2
U58
N12P-GV-B-A1_FCBGA_973P
GV@
H6 H_3P3
@
1
H30 H_3P8N
@
1
U68
H5TQ1G63DFR-11C
X76@
H4 H_3P3
@
1
H12 H_3P3
@
1
FD2
@
1
C828
0.1U_0402_16V7K
1
2
FD4
@
1
JTCS1
ACES_50224-00501-001
CONN@
1
1
2
2
3
3
4
4
5
5
GND 6
GND 7
SW3
SMT1-05-A_4P
3
2
1
4
5
6
H20 H_4P5
@
1
H17 H_4P5
@
1
U69
H5TQ1G63DFR-11C
X76@
H8 H_3P3
@
1
JCIR1
ACES_50228-00471-001
CONN@
1
1
2
2
3
3
4
4
G1
5
G2
6
H1 H_3P3
@
1
H15 H_4P5
@
1
JCAM1
ACES_50228-0067N-001
CONN@
1
1
2
2
3
3
4
4
5
5
6
6
GND
7
GND
8
U70
H5TQ1G63DFR-11C
X76@
C827
1U_0402_6.3V6K
1
2
U73
H5TQ1G63DFR-11C
X76@
D41
PJUSB208H_SOT23-6
@
I/O1 1
REF1 2
I/O2 3
I/O3
4
REF2
5
I/O4
6
H2 H_3P3
@
1
H18 H_4P5
@
1
H29 H_3P8N
@
1
U71
H5TQ1G63DFR-11C
X76@
H5 H_3P3
@
1
ZZZ4
PCB LA-7522P
8LPCB@
H14 H_4P5
@
1
H19 H_4P5
@
1
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
SUSP SUSP
SUSP
SUSP
SUSP
SUSP#
SUSPSUSP
+FAN1
+FAN1
SUSP
+FAN2
+FAN2
1.5VS_GATE
SUSP
SUSP#
SUSP#[49,54,55,56,57]
SUSP[5,57]
EN_DFAN1[49]
FAN_SPEED1 [49]
EN_DFAN2[49]
FAN_SPEED2 [49]
+3VALW +3VS +5VALW +5VS
+0.75VS
+5VALW
+5VS
+1.8VS
+12VALW +12VS
+1.05VS_VCCIO
+12VALW
+12VALW
+12VALW
+3VS
+12VS
+1.05VS_VPCH
+3VS
+12VS
+5VALW
+1.5V +1.5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
PCA70 LA-7521P M/B
0.1
DC-DC INTERFACE
51 64
Tuesday, April 12, 2011
2010/10/1 2011/11/01
+3VALW TO +3VS
Compal Electronics, Inc.
+5VALW TO +5VS
Vgs=10V,Id=9A,Rds=18.5mohm Vgs=10V,Id=9A,Rds=18.5mohm
For EMI
Discharge circuit
+1.5V to +1.5VS
+12V1 TO +12VS (PMOS)
Vgs=20V,Id=15A,Rds=7mohm
20mil
1A
20mil
20mil
1A
20mil
FAN Control Circuit
JFAN1
ACES_50273-0030N-001
CONN@
1
1
2
2
3
3
GND
4
GND
5
R985
330K_0402_5%
12
C1533
10U_0805_10V6K
1
2
C833
4.7U_0603_10V6K
1
2
G
D
S
Q98
SSM3K7002BF 1N SC59-3
2
13
C834
1U_0603_10V6K
1
2
Q74A
2N7002KDWH_SOT363-6
61
2
C838
0.1U_0402_16V4Z
@
1
2
Q65B
2N7002KDWH_SOT363-6
34
5
C110
4.7U_0805_25V6-K
12
Q74B
2N7002KDWH_SOT363-6
34
5
C1534
0.01U_0402_25V7K
@
1
2
R984
100K_0402_5%
1 2
G
D
S
Q73
SSM3K7002BF 1N SC59-3
2
13
C843
0.01U_0402_25V7K
1
2
G
D
S
Q71
SSM3K7002BF 1N SC59-3
2
13
U3
G9941F11U_SO8
VOUT
1
VIN
2
VEN
3
VSET
4
GND 5
GND 6
GND 7
GND 8
Thermal Pad 9
C844
4.7U_0603_10V6K
1
2
R1028
20K_0402_5%
12
Q64B
2N7002KDWH_SOT363-6
34
5
C8404.7U_0603_10V6K
1
2
R90 10K_0402_5%
12
C1532
1000P_0402_50V7K
@
1
2
Q65A
2N7002KDWH_SOT363-6
61
2
R982
47K_0402_5%
1 2
R991
22_0805_5%
1 2
R88
143K_0402_1%
1 2
C836
1U_0402_6.3V6K
1
2
G
D
S
Q68
SSM3K7002BF 1N SC59-3
2
13
R986
200K_0402_5%
@
12
R983
47K_0402_5%
1 2
R980
470_0805_5%
1 2
G
D
S
Q63
SSM3K7002BF 1N SC59-3
2
13
R1602
100K_0402_5%
1 2
C112
10U_0805_10V6K
1
2
JFAN2
ACES_50273-0030N-001
CONN@
1
1
2
2
3
3
GND
4
GND
5
C845
0.1U_0402_25V6
1
2
C837
4.7U_0603_10V6K
1
2
C1005
1U_0603_25V6K
12
R990
100K_0402_5%
1 2
Q105
AO4423_SO8
S
1
S
2
S
3
G
4
D8
D7
D6
D5
C113
0.01U_0402_25V7K
@
1
2
C839
0.1U_0402_16V4Z
@
1
2
Q66B
2N7002KDWH_SOT363-6
34
5
Q60
AP4800BGM-HF_SO8
S1
S2
S3
G4
D
8
D
7
D
6
D
5
R981
470_0805_5%
1 2
C1531
4.7U_0805_25V6-K
12
Q61
AP4800BGM-HF_SO8
S1
S2
S3
G4
D
8
D
7
D
6
D
5
C111
1000P_0402_50V7K
@
1
2
R979
470_0805_5%
1 2
Q66A
2N7002KDWH_SOT363-6
61
2
C8424.7U_0603_10V6K
1
2
R1603 10K_0402_5%
12
C835
4.7U_0603_10V6K
1
2
R978
470_0805_5%
1 2
U92
G9941F11U_SO8
VOUT
1
VIN
2
VEN
3
VSET
4
GND 5
GND 6
GND 7
GND 8
Thermal Pad 9
R987
47K_0402_5%
1 2
C841
0.022U_0402_25V7K
1
2
R89
100K_0402_5%
1 2
R1027
470_0603_5%
1 2
R992
470_0805_5%
1 2
C832
1U_0402_6.3V6K
1
2
Q62
AP2301GN-HF_SOT23-3
2
3 1
R1604
470_0805_5%
1 2
R1601
143K_0402_1%
1 2
C1006
0.1U_0603_25V7K
1
2
Q64A
2N7002KDWH_SOT363-6
61
2
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
DC_IN_S1
EC_SMB_DA2
EC_SMB_CK2
VIN_A1
VIN_A0VIN-
VIN+
VIN_A0
VIN_A1
VIN-VIN+
CPU_OT[49,53]
EC_SMB_DA2 [14,23,49]
EC_SMB_CK2 [14,23,49]
VL
+RTCBATT
B+
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
PCA70 LA-7521P M/B
0.1
P51_PWR_DC-IN
52 64
Tuesday, April 12, 2011
2010/10/1 2011/11/01
Compal Electronics, Inc.
Ventura for CPU side
slave address : 1000001
please placemnet near R-sense
Current sense solution 2
JBATT1
LOTES_AAA-BAT-054-K01
CONN@
+
1-2
PR153
0.01_2512_1%
1
3
4
2
PR830 0_0402_5%
1 2
PR831
0_0402_5%
1 2
PR832
0_0402_5%
1 2
PR3
9.53K_0402_1%
@
1 2
PC4
100P_0402_50V8J
12
PR834 0_0402_5%
12
PC3
100P_0402_50V8J
12
PH1
100K_0402_1%_NCP15WF104F03RC
@
12
JDCIN1
ACES_88299-0610
CONN@
11
22
33
44
55
66
GND 7
GND 8
PL1
SMB3025500YA_2P
1 2
PU1
G718TM1U_SOT23-8
@
RHYST2 5
OT1
3
OT2
4
GND
2
VCC
1
TMSNS2 6
RHYST1 7
TMSNS1 8
PC1
.1U_0402_16V7K
@
12
PC805
0.1U_0402_16V7K
1
2
PC113
0.1U_0402_25V6
12
PU803
HPA00900AIDCNR_SOT23-8
VIN+
1
SCL 5
VIN-
2
VS
4SDA 6
A0 7
GND
3
A1 8
PC2
220P_0402_50V7K
12
PR838 0_0402_5%
1 2
PR1
20.5K_0402_1%
@
12
PR836
0_0402_5%
@
1 2
PR2
10K_0402_1%
@
1 2
PC5
220P_0402_50V7K
12
PC806
0.1U_0402_16V7K
1
2
PR841
0_0402_5%
@
1 2
PC114
0.1U_0402_25V6
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BST_5V
LX_5V
BST5ABST3A
FB5
UG_5V
BST_3V
ENTRIP2
LG_5V
LX_3V
LG_3V
UG_3V
FB3
ENTRIP1
SPOK [61]
CPU_OT[49,52]
8205_B+
+5VALWP
+3VALWP
8205_B+
8205_B+
2VREF_8205
B+
+3VLP
2VREF_8205
VL
B+
+3VALWP +3VALW
+5VALW+5VALWP
+3VALWP
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
PCA70 LA-7521P M/B
0.1
P52-PWR-+3VALW/+5VALW
53 64
Tuesday, April 12, 2011
2010/10/1 2011/11/01
Compal Electronics, Inc.
+5VALWP
Ipeak=7.376A ; 1.2Ipeak=8.85A; Imax=5.16A
f=300KHz, L=4.7UH,Rentrip=174k ohm
Rdson=15~18m ohm
1/2Delta I = 1/2 *(19-5)*(5/19)/(300KHz*4.7UH)=1.306A
Vlimit=10*(10^-6)*174Kohm/10=0.174V
Ilimit=0.174/(18m*1.2)~0.174/(15m)=8.055~11.6A
Iocp=9.361~12.906A (9.361>8.85 -> OK)
TONSEL=VREF (1)SMPS1=300KHZ (+5VALWP)
(2)SMPS2=375KHZ(+3VALWP)
+3.3VALWP
Ipeak=5.71A ; 1.2Ipeak=6.852A; Imax=3.997A
f=375KHz, L=4.7UH
Rdson=15~18m ohm
1/2Delta I = 1/2 *(19-3.3)*(3.3/19)/(375KHz*4.7UH)=0.773A
Vlimit=10*10^-6*110Kohm/10=0.11V
Ilimit=0.11/(18m*1.2)~0.11/(15m)=6.34A~9.13A
Iocp=7.113A~10.073A (7.113A>6.852A -> ok) -DVT-
PC6
1U_0603_10V6K
12
+
PC15
330U_6.3V_M
1
2
+
PC14
330U_6.3V_M
1
2
PR16
174K_0402_1%
1 2
PC13
.1U_0402_16V7K
1 2
PQ2
SIS412DN-T1-GE3_POWERPAK8-5
4
5
1
2
3
PR13
20K_0402_1%
1 2
PC17
680P_0603_50V7K
@
12
PR15
110K_0402_1%
1 2
PJ402
JUMP_43X118@
11
2
2
PQ26
SIS412DN-T1-GE3_POWERPAK8-5
4
5
1
2
3
PJ403
JUMP_43X118@
11
2
2
PC18
1U_0402_6.3V6K
12
PJ8
JUMP_43X118@
11
2
2
PC16
680P_0603_50V7K
@
12
PC19
4.7U_0805_10V6K
12
PC76
1U_0603_25V6K
12
PC8
10U_1206_25V6M
12
PC7
2200P_0402_50V7K
12
PR21
499K_0402_1%
1 2
PR18
0_0603_5%
1 2
PR11
30K_0402_1%
1 2
PQ25
SI7716ADN-T1-GE3_POWERPAK8-5
4
5
1
2
3
PC11
2200P_0402_50V7K
12
PC20
0.1U_0603_25V7K
12
PR20
4.7_1206_5%
@
12
PC12
.1U_0402_16V7K
1 2
PR10
13K_0402_1%
1 2
PL3
4.7UH_PCMC063T-4R7MN_5.5A_20%
1 2
PU2
RT8205EGQW_WQFN24_4X4
FB1 2
REF 3
VO1 24
ENTRIP1 1
TONSEL 4
FB2 5
SKIPSEL
14
NC
18
VREG5
17
VO2
7
VREG3
8
VIN
16
GND
15
UGATE1 21
BOOT1 22
ENTRIP2 6
PGOOD 23
PHASE1 20
LGATE1 19
EN
13
BOOT2
9
UGATE2
10
PHASE2
11
LGATE2
12
P PAD
25
PC10
4.7U_0805_10V6K
12
PR19
4.7_1206_5%
@
12
PQ7
SI7716ADN-T1-GE3_POWERPAK8-5
4
5
1
2
3
PR202
10K_0402_1%
12
PR24
0_0402_5%
@
1 2
PL2
4.7UH_PCMC063T-4R7MN_5.5A_20%
1 2
PR12
20K_0402_1%
1 2
PR22
100K_0402_1%
12
PC9
10U_1206_25V6M
12
PR17
0_0603_5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SW_VCCIO
UG_VCCIO
LG_VCCIO
TRIP_VCCIO
EN_VCCIO
FB_VCCIO
BST_VCCIO
RF_VCCIO
+1.05Vin_VCCIO
SUSP#[49,51,55,56,57]
VCCIO_SENSE [8]
VCCIO_SEL [10]
B+
+1.05VS_VCCIOP
+1.05VS_VCCIOP +1.05VS_VCCIO
+5VALW
+1.05VS_VPCH
+1.05VSP
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
+1.05VSP
54 64
Tuesday, April 12, 2011
2009/11/13 2009/04/28
Compal Electronics, Inc.
PCA60/70 LA-7001P M/B
(17A,680mils ,Via NO.=34)
VCCIO_SELECT +VCCIO
0
1
1V
1.05V
Cout ESR=10m ohm Rdson(max)=4.8 mohm Rdson(typ)=3.8 mohm.
Ipeak=17.3A, Imax=12.11A, Iocp=1.2*Ipeak=20.76A
Delta I=((19-1.05)*(1.05/19))/(L*Fsw)=3.42A
=>1/2Delta I=1.71A
Vtrip=Itrip*Rtrip, Iocp=Vtrip/(8*Rds(on))
Iocpmax=((102K*11uA)/(8*0.0038))+1.71A=38.617A
Iocpmin=((102K*9uA)/(8*0.0048))+1.71A=25.616A
Iocp=25.616A~38.617A
<Vo=1.05V> VFB=0.7V
V=0.7*(1+5.1K/10.1958K)=1.05V
Fsw=290KHz
Cout ESR=10m ohm Rdson(max)=4.8 mohm Rdson(typ)=3.8 mohm.
Ipeak=17.3A, Imax=12.11A, Iocp=1.2*Ipeak=20.76A
Delta I=((19-1.0)*(1.0/19))/(L*Fsw)=3.266A
=>1/2Delta I=1.633A
Vtrip=Itrip*Rtrip, Iocp=Vtrip/(8*Rds(on))
Iocpmax=((102K*11uA)/(8*0.0038))+1.633A=38.54A
Iocpmin=((102K*9uA)/(8*0.0048))+1.633A=25.539A
Iocp=25.539A~38.54A
<Vo=1.0V> VFB=0.7V
V=0.7*(1+5.1K/11.8K)=1.0V
Fsw=290KHz
Vtrip range ==> 0.2V ~ 3V
PJ31
JUMP_43X118
@
11
2
2
PC44
680P_0603_50V7K
@
12
PR44
5.1K_0402_1%
12
PR165
75K_0402_1%
1 2
PL6
1.0UH_PCMC104T-1R0MN_20A_20%
1 2
PR43
470K_0402_5%
12
PJ10
JUMP_43X118
@
11
2
2
PC40
0.1U_0402_16V7K
12
PC38
4.7U_0805_25V6-K
12
PR41
4.7_1206_5%
@
12
G
D
S
PQ40
SSM3K7002FU_SC70-3
2
13
PR39
102K_0402_1%
1 2
PR46
11.8K_0402_1%
1 2
PJ5
JUMP_43X118
@
11
2
2
PR42
0_0402_5%
1 2
PR40
0_0402_5%
1 2
PC36
4.7U_0805_25V6-K
12
PQ6
TPCA8059-H_SOP-ADV8-5
3 5
2
4
1
PC39
0.22U_0603_25V7K
1 2
PC37
4.7U_0805_25V6-K
12
PJ7
JUMP_43X118
@
11
2
2
PR38
0_0603_5%
1 2
PQ5
TPCA8065-H_PPAK56-8-5
4
5
1
2
3
PJ12
JUMP_43X118
@
11
2
2
+
PC42
560U_2.5V_M
1
2
PR45
10_0402_5%
12
PC41
1U_0603_6.3V6M
12
PU6
TPS51212DSCR_SON10_3X3
EN
3
TRIP
2
V5IN 7
DRVH 9
SW 8
DRVL 6
VBST 10
RF
5
VFB
4
PGOOD
1
TP 11
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SW_1.05V
UG_1.05V
LG_1.05V
TRIP_1.05V
EN_1.05V
FB_1.05V
BST_1.05V
RF_1.05V
+1.05Vin
SUSP#[49,51,54,56,57]
B+
+1.05VSP
+5VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
PCA70 LA-7521P M/B
0.1
P54_PWR-+1.05VSP
55 64
Tuesday, April 12, 2011
2010/10/1 2011/11/01
Compal Electronics, Inc.
Cout ESR=10m ohm Rdson(max)=5.6 mohm Rdson(typ)=4.5 mohm.
Ipeak=7.3A, Imax=5.11A, Iocp=1.2*Ipeak=8.76A
Delta I=((19-1.05)*(1.05/19))/(L*Fsw)=3.42A
=>1/2Delta I=1.71A
Vtrip=Itrip*Rtrip, Iocp=Vtrip/(8*Rds(on))
Iocpmax=((78.7K*11uA)/(8*0.0045))+1.71A=25.75A
Iocpmin=((78.7K*9uA)/(8*0.0056*1.3))+1.71A=13.871A
Iocp=13.871A~25.75A
<Vo=1.05V> VFB=0.7V
V=0.7*(1+5.1K/10.2K)=1.05V
Fsw=290KHz
Vtrip range ==> 0.2V ~ 3V
PR164
4.7_1206_5%
@
12
PC146
0.1U_0402_16V7K
Maho@
12
PR156
0_0402_5%
Maho@
1 2
PQ38
AO4406AL_SO8
Maho@
4
7
8
6
5
1
2
3
PC148
4.7U_0805_25V6-K
Maho@
12
PL15
1.0UH_PCMC104T-1R0MN_20A_20%
Maho@
1 2
PR170
10.2K_0402_1%
Maho@
1 2
PQ39
AO4456_SO8
Maho@
3 6
5
7
8
2
4
1
PC147
4.7U_0805_25V6-K
Maho@
12
PC144
1U_0603_6.3V6M
Maho@
12
+
PC135
330U_6.3V_M
Maho@
1
2
PR167
0_0603_5%
Maho@
1 2
PC136
4.7U_0805_25V6-K
Maho@
12
PC145
0.22U_0603_25V7K
Maho@
1 2
PR169
470K_0402_5%
Maho@
12
PR166
5.1K_0402_1%
Maho@
12
PU9
TPS51212DSCR_SON10_3X3
Maho@
EN
3
TRIP
2
V5IN 7
DRVH 9
SW 8
DRVL 6
VBST 10
RF
5
VFB
4
PGOOD
1
TP 11
PJ34
JUMP_43X118
@
11
2
2
PR157
78.7K_0402_1%
Maho@
1 2
PC134
680P_0603_50V7K
@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VCCSA_SENSE [9]
VCCSA_PG [49]
VCCSAP_VID1[9]
SUSP#[49,51,54,55,57]
+VCCSAP
+5VALW +1.05VS_VCCIO
+3VALW
+3VALW
+3VALW
+1.8VSP +1.8VS
+VCCSAP +VCCSA
+3VALW
+1.8VSP
+5VALW
SUSP#[49,51,54,55,57]
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
+VCCSA/+1.8VSP
Custom
56 64Tuesday, April 12, 2011
2010/01/25 2009/04/28
Ipeak=8.8A
Imax=6.2A
Toatal Capacitor ??u
ESR=15mohm
VCCSA_VID +VCCSAP
0
1
0.925V
0.85V
PCA60/70 LA-7001P M/B
3.3A,140mils ,Via NO.= 7
(6A,240mils ,Via NO.= 12)
Vo=0.8(1+Rt/Rb)=1.827 V
FB=0.8V
Ipeak=1.26A, Imax=0.882A
Vout=0.8(1+Rt/Rb)
PR28
0_0402_5%
12
PJ27
JUMP_43X79
@
1
122
PR30
10_0402_5%
12
PR37
1K_0402_1%
12
PR34
10K_0402_1%
12
PC29
4.7U_0805_6.3V6K
12
PR29
4.7K_0402_1%
1 2
PQ3
IRF8736TRPBF_SO8
4
7
8
6
5
1
2
3
PR36
10K_0402_1%
1 2
PC31
.1U_0402_16V7K
@
12
PJ6
JUMP_43X79@
11
2
2
PR47
1.54K_0402_1%
12
PC27
1U_0402_6.3V6K
12
PR70
47K_0402_5%@
1 2
G
D
S
PQ4A
DMN66D0LDW-7_SOT363-6
2
61
PR31
49.9K_0402_1%
12
PR25
0_0402_5%
1 2
G
D
S
PQ4B
DMN66D0LDW-7_SOT363-6
5
34
PC35
.1U_0402_16V7K
12
PR27
10K_0402_1%
1 2
PJ3
JUMP_43X118
@
11
2
2
PU5
APL5610CI-TRG_SOT23-6
GND
2
EN
1
FB
3POK 4
DRV 5
VCC 6
+
PC32
330U_6.3V_M
1
2
PC52
.1U_0402_16V7K
@
12
PC63
4.7U_0805_6.3V6K
12
PJ30
JUMP_43X118
@
11
2
2
PU4
APL5930KAI-TRG_SO8
VIN
9
EN
8
VCNTL
6
VIN
5
POK
7
GND
1
FB 2
VOUT 4
VOUT 3
PC43
0.01U_0402_25V7K
12
PC33
47P_0402_50V8J
1 2
PR26
0_0402_5%
1 2
PR35
10K_0402_1%
1 2
PC30
4.7U_0805_10V6K
12
PC58
22U_0805_6.3V6M
12
PC28
4.7U_0805_6.3V6K
12
PR82
1.2K_0402_1%
12
PR32
75K_0402_1%
12
PC34
.1U_0402_16V7K
12
PR33
10K_0402_1%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SW_1.5V
UG_1.5V
LG_1.5V
TRIP_1.5V
EN_1.5V
FB_1.5V
BST_1.5V
RF_1.5V
+1.5Vin
SUSP#
SUSP#
SYSON[49]
SUSP[5,51]
SUSP#[49,51,54,55,56]
SUSP#[49,51,54,55,56]
+1.5VP
+1.5V
+3VALW
+0.75VP
+1.5V
+1.5V
+1.5VP
+0.75VP +0.75VS
+1.2VUSB
B+
+5VALW
+5VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
1.5VP/+1.2VALWP/+0.75VS
Custom
57 64Tuesday, April 12, 2011
2010/01/25 2009/04/28
Ipeak=10.24A Imax=7.168A
Iocp >=1.2*Ipeak=12.288A
<Vo=1.5V> VFB=0.7V
Vo=VFB*(1+Rtop/Rdown)=1.505V
Fsw=290 KHz
Cout ESR=15m ohm Rdson(max)=5.6m ohm, Rdson(typ)=4.5 mohm
Delta I=((19-1.5)*(1.5/19))/(1u*290 K)=4.764 A
=>1/2DeltaI=2.382A
Vtrip=Itrip*Rtrip, Iocp=Vtrip/(8*Rds(on))
Iocpmax=((76.8K*11uA)/(8*0.0045))+2.382A=25.848A
Iocpmin=((76.8K*9uA)/(8*0.0056*1.3))+2.382A=14.25A
Iocp=14.25A~25.48A
Imax=1.4A
Ipeak=2A
Compal Electronics, Inc.
PCA60/70 LA-7001P M/B
Imax=0.39A
Ipeak=0.558A
(12A,480mils ,Via NO.= 24)
(2A,80mils ,Via NO.= 4)
Vtrip range ==> 0.2V ~ 3V
PJ20
JUMP_43X118
1
122
PU7
TPS51212DSCR_SON10_3X3
EN
3
TRIP
2
V5IN 7
DRVH 9
SW 8
DRVL 6
VBST 10
RF
5
VFB
4
PGOOD
1
TP 11
PC162
0.1U_0603_25V7K
@
12
PJ33
JUMP_43X79
11
2
2
PC158
0.01U_0402_25V7K
12
PC56
1U_0603_6.3V6M
12
PL7
1.0UH_PCMC104T-1R0MN_20A_20%
1 2
PC51
1U_0603_6.3V6M
12
PC60
10U_0805_6.3V6M
12
PC47
4.7U_0805_25V6-K
12
PJ9
JUMP_43X79
@
1
122
PJ38
JUMP_43X79
@
11
2
2
PJ23
JUMP_43X118
1
122
PU8
APL5336KAI-TRL_SOP8P8
NC 5
VREF
3
VOUT
4
GND
2
VIN
1
VCNTL 6
NC 7
NC 8
TP 9
PR52
470K_0402_5%
12
PR50
0_0402_5%
1 2
PC45
4.7U_0805_25V6-K
12
G
D
S
PQ10
SSM3K7002FU_SC70-3
2
13
PU19
APL5930KAI-TRG_SO8
VIN
9
EN
8
VCNTL
6
VIN
5
POK
7
GND
1
FB 2
VOUT 4
VOUT 3
PR212
12K_0402_1%
12
PC46
4.7U_0805_25V6-K
12
PR56
0_0402_5%
1 2
PC159
22U_0805_6.3V6M
12
PR210
0_0402_5%
1 2
PR48
0_0603_5%
1 2
+
PC53
330U_6.3V_M
1
2
PR49
143K_0402_1%
1 2
PR213
47K_0402_5%@
12
PJ32
JUMP_43X118
11
2
2
PR55
1K_0402_1%
12
PC61
0.1U_0402_16V7K
12
PR54
11.5K_0402_1%
1 2
PR51
4.7_1206_5%
12
PC54
680P_0603_50V7K
12
PC160
1U_0402_6.3V6K
12
PC50
0.1U_0402_16V7K
12
PQ9
FDMC7692S_MLP8-5
4
5
1
2
3
PC49
0.22U_0603_25V7K
1 2
PC59
0.1U_0402_16V7K
12
PC48
4.7U_0805_25V6-K
12
PC161
4.7U_0805_6.3V6K
12
PR53
10K_0402_1%
1 2
PQ8
SIS412DN-T1-GE3_POWERPAK8-5
4
5
1
2
3
PR214
0_0402_5%
@
1 2
PR59
1K_0402_1%
12
PC55
4.7U_0805_6.3V6K
12
PR211
24K_0402_1%
12
A
A
B
B
C
C
D
D
E
E
F
F
G
G
H
H
1 1
2 2
3 3
4 4
TSENSE
TSENSE
TSENSEA
TSENSEATSENSEA
FBA
DIFFOUTA
DIFFOUTA
CSCOMOA
CSNA_A
CSCOMOA
CSSUMA CSPA
CSSUMA
CSPA
CSN1
CSP1
CSN3
CSP3
CSN2
CSP2
CSREF
CSN1
CSN2
CSN3
CSSUM CSP1
CSP2
CSP3
CSCOMP
CSCOMP
CSSUM
DIFFOUT
DIFFOUT
PWM2 PWMA
PWM1
FBA
CSNA_A
CSP4
CSP4
CSN4
IMAX
IMAX
PWM3
VR_ON_R
VR_ON_R
VSSSENSE[8]
VCCSENSE[8]
VR_HOT#[49]
VR_SVID_DAT[8]
VR_SVID_CLK[8]
VR_SVID_ALRT#[8]
VGATE[15,49]
VR_ON[49]
VSS_AXG_SENSE[9]
VCC_AXG_SENSE[9]
+CPU_CORE
+5VALW
Vin
+GFX_CORE
+1.05VS_VCCIO
+3VS
+5VALW
+1.05VS_VCCIO
+1.05VS_VCCIO
CSPA [59]
CSNA [59]
CSP1 [59]
CSN1 [59]
CSP3 [59]
CSN3 [59]
CSP2 [59]
CSN2 [59]
PWMA [59]
PWM2 [59]
PWM3 [59]
PWM1 [59]
DRVON [59]
CSN4 [59]
CSP4 [59]
PWM4 [59]
Title
Size Document Number Re v
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
CPU_CORE_1
C
58 64Tuesday, April 12, 2011
2010/01/25 2009/04/28
VCORE
VBOOT
SET AT
0V
V_GT
IMAX SET
AT 35A
PWM
ADDRESS
VCORE
IMAX SET
AT 112A
Compal Electronics, Inc.
PCA60/70 LA-7001P M/B
VCORE
IMAX SET
AT 75A
GFX OCP:42A
CPU CORE OCP: 90A-----65W
136A----95W
VCORE
VBOOT
SET AT
0V
65W CPU IMAX=75A
95W CPU IMAX=112A
Iout_MAX=35A
ESD request Close to PU10.9
PR111
24K_0402_1%UMA@
12
PR89 0_0402_5%
1 2
PR122
10_0402_1%
UMA@
12
PR87
100_0402_1%
1 2
PR96
8.25K_0402_1%
12
PR73
1K_0402_1%
12
PC73
4700P_0402_25V7K
12
PR125 1K_0402_1%UMA@
1 2
PH3
100K_0402_1%_NCP15WF104F03RC
1 2
PC84
0.1U_0402_25V6
UMA@
12
PC95
220P_0402_50V8J
UMA@
1 2
PR120
1K_0402_1%
UMA@
1 2
PR64 165K_0402_1%
12
PR176 0_0402_5%DIS@
12
PC87
1000P_0402_50V8-J
UMA@
12
PR121 1.82K_0402_1%UMA@
1 2
PR71
1K_0402_1%
1 2
PR103
0_0402_5%
DIS@
PR97 10K_0402_1%
1 2
PR124
3.3K_0402_1%
UMA@
12
PR174
59K_0402_1%
65W@
12
PR90 6.98K_0402_1%
1 2
PR128
165K_0402_1%
UMA@
12
PC83 0.01U_0402_50V7K
1 2
PR67
47_0402_1%
1 2
PC90
10P_0402_50V8JUMA@
1 2
PC98
1200P_0402_50V7K
UMA@
1 2
PR181
0_0402_5%
95W@
1 2
PR116
1.24K_0402_1%
UMA@
1 2
PR74 4.7K_0402_1%
12
PR98 0_0402_5%
1 2
PC807 0.1U_0402_16V4Z
1 2
PC68 1200P_0402_50V7K
1 2
PR119
10K_0402_1%
65W@
12
PC74
0.1U_0402_25V6K
1 2
PR103
8.25K_0402_1%
UMA@
12
PR114
412_0402_1%
UMA@
1 2
PR62
95.3K_0603_1%
12
PC69
10P_0402_50V8J
1 2
PR127
75K_0402_1%
UMA@
12
PU10
NCP6131S52MNR2G_QFN52_6X6
65W@
PR177
0_0402_5%
DIS@
1 2
PR112
0_0402_5%
UMA@
1 2
PR69
36.5K_0402_1%
95W@
PR107
100_0402_1%
UMA@
1 2
PC72
1500P_0402_50V7K
1 2
PU10
NCP6151S52MNR2G_QFN52_6X6
95W@
VR_HOT#
3
SDIO
4
VSP
1
TSENSE
2
SCLK
5
ALERT#
6
VR_RDYA
8
COMPA
19
DIFFOUTA
17
VSPA
15
CSCOMPA
22
FBA
16
VSNA
14
VRMP
12
ROSC
11
VR_RDY
7
VCC
10
DROOPA
21
IOUTA
23
ILIMA
20
TRBSTA
18
ENABLE
9
CSSUMA
24
TSENSEA
13
CSPA
25
CSNA
26
VBOOTA 27
PWMA/IMAXA 28
PWM4 29
PWM2/VBOOT 30
PWM3/IMAX 31
PWM1/ADDR 32
DRON 33
CSP1 34
CSN1 35
CSP3 36
CSN3 37
CSP2 38
CSN2 39
CSP4 41
CSREF 42
IOUT 43
CSSUM 44
CSCOMP 45
DROOP 46
ILIM 47
COMP 48
FB 49
TRBST 50
VSN 51
DIFFOUT 52
FLAG / GND 53
CSN4 40
PR100 9.09K_0402_1%
1 2
PH5
220K_0402_5%_ERTJ0EV224J
UMA@
12
PR104
10K_0402_1% UMA@
1 2
PR110 6.98K_0402_1%
UMA@
1 2
PR119
88.7K_0402_1%
95W@
PC97
680P_0402_50V7K
UMA@
1 2
PR1010_0402_5%
DIS@
12
PR121
0_0402_5%
DIS@
PR77
412_0402_1%
1 2
PR15410_0402_1%
95W@
12
PC91
.1U_0402_16V7K
UMA@
12
PC133
0.047U_0402_16V7K
95W@
12
PR79
2.8K_0402_1%
1 2
PC79
0.047U_0402_16V7K
12
PR66
95.3K_0603_1%
12
PR88 51_0402_5%
1 2
PR185
0_0402_5%
65W@
1 2
PC86
0.047U_0402_16V7K
UMA@
12
PR109
887_0402_1%
UMA@
12
PR69 24K_0402_1%
65W@
12
PR85
100_0402_1%
1 2
PC81
0.1U_0402_25V6
12
PR151
6.98K_0402_1%
95W@
1 2
PR129
39.2K_0603_1%
UMA@
12
PC75
1000P_0402_50V8-J
1 2
PR105
10K_0402_1%
95W@
12
PR115
4.02K_0402_1%
UMA@
1 2
PC89
4700P_0402_25V7K
UMA@
12
PR179
0_0402_5%
DIS@
1 2
PC71
4700P_0402_25V7K
1 2
PR180
0_0402_5%
UMA@
1 2
PR78
8.2K_0402_1%
12
PR63 75K_0402_1%
12
PR92 110_0402_1%
1 2
PR68
5.49K_0402_1%
1 2
PR83 24K_0402_1%
65W@
1 2
PR111
0_0402_5%
DIS@
PC82 1U_0603_6.3V6M
1 2
PC94
820P_0402_50V7K
UMA@
1 2
PR81 10_0402_1%
12
PR99 2.2_0603_5%
1 2
PR184
0_0402_5%
65W@
1 2
PR178
0_0402_5%
DIS@
12
PC93
4700P_0402_25V7K
UMA@
12
PC92 820P_0402_50V7K
UMA@
12
PR175
0_0402_5%
DIS@
12
PC65 470P_0402_50V7K
1 2
PR107
0_0402_5%
DIS@
PR126
47_0402_1%
UMA@
1 2
PC78
0.047U_0402_16V7K
12
PR171
0_0402_5% 95W@
1 2
PC70
820P_0402_50V7K
1 2
PR83
24.3K_0402_1%
95W@
PR91 6.98K_0402_1%
1 2
PR86
0_0402_5%
1 2
PR95 6.98K_0402_1%
1 2
PC67
1000P_0402_50V7K
1 2
PR102 1K_0402_1%
1 2
PR117
26.7K_0402_1%
1 2
PR106
27.4K_0402_1%
UMA@
12
PC85
1000P_0402_50V8-J
UMA@
1 2
PR118
10K_0402_1%
12
PC77
1000P_0402_50V8-J
12
PR65
95.3K_0603_1%
12
PR72
10_0402_1%
12
PC80
0.047U_0402_16V7K
12
PH2
220K_0402_5%_ERTJ0EV224J
12
PR80
1.5K_0402_1%
1 2
PR152
95.3K_0603_1%
95W@
12
PR76 10_0402_1%
12
PC88
2200P_0402_50V7K
UMA@
12
PR93 54.9_0402_1%
1 2
PH4
100K_0402_1%_NCP15WF104F03RC
UMA@
1 2
PR108
0_0402_5%
1 2
PR75 10_0402_1%
12
PC66
220P_0402_50V8J
1 2
PR113
100_0402_1%
UMA@
1 2
PR94 75_0402_1%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LX_CPU1
DL_CPU1
DH_CPU1
LX_CPU2
DL_CPU2
DH_CPU2
LX_CPU3
DL_CPU3
DH_CPU3
LX_GFX
DL_GFX
DH_GFX
DH_CPU2
DH_CPU1
DH_CPU3
LX_CPU4
DL_CPU4
DH_CPU4
DH_CPU4
+CPU_CORE
+CPU_CORE
+CPU_CORE
+GFX_CORE VIN
VIN
VIN
VIN
VIN
B+
+5VALW
+5VALW
+5VALW
+5VALW
+CPU_CORE
VIN
+5VALW
CSP1[58] CSN1[58]
CSP2[58] CSN2[58]
CSP3[58] CSN3[58]
CSPA[58]
CSNA[58]
PWM1[58] PWM2[58]
PWM3[58]
PWMA[58]
DRVON[58]
DRVON [58]
DRVON [58]
DRVON [58]
CSP4[58] CSN4[58]
PWM4[58]
DRVON [58]
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
CPU_CORE_2
Custom
59 64Tuesday, April 12, 2011
2010/01/25 2009/04/28
Compal Electronics, Inc.
PC109
0.22U_0603_25V7K
1 2
PC152
1000P_0603_50V7K
95W@
12
PL11
0.36UH_VMPI1004AR-R36M-Z03_30A_20%
95W@
1
3
4
2
PR183
4.7_1206_5%
95W@
1 2
PQ16
TPCA8059-H_PPAK56-8-5
4
5
1
2
3
PR143 49.9_0402_1%
UMA@
12
PC111
10U_1206_25V6M
12
PC108
1U_0603_25V6K
12
PR130
2.2_0603_1%
1 2
PC151
1000P_0603_50V7K
12
PC103
0.22U_0603_25V7K
1 2
PR132 4.02K_0402_1%
95W@
12
PQ14
TPCA8065-H_PPAK56-8-5
4
5
1
2
3
PQ23
TPCA8059-H_PPAK56-8-5
4
5
1
2
3
PL8
0.36UH_VMPI1004AR-R36M-Z03_30A_20%
1
3
4
2
PC119
0.22U_0603_25V7K
UMA@
1 2
PQ22
TPCA8059-H_PPAK56-8-5
4
5
1
2
3
PC127
1U_0603_25V6K
UMA@
12
PQ19
TPCA8059-H_PPAK56-8-5
4
5
1
2
3
PR131
2.2_0603_1%
1 2
PC99
0.22U_0603_25V7K
1 2
PQ36
TPCA8065-H_PPAK56-8-5
@
4
5
1
2
3
PQ20
TPCA8065-H_PPAK56-8-5
4
5
1
2
3
PC102
10U_1206_25V6M
12
PR149 4.02K_0402_1%
95W@
12
+
PC126
68U_25V_M
1
2
PR150
2.2_0603_1%
95W@
12
PR132
2.74K_0402_1%
65W@
PR135
2.2_0603_1%
12
PU14
NCP5911MNTBG_DFN8-9
95W@
DRVL 5
EN
3
VCC
4
PWM
2
BST
1
GND 6
SW 7
DRVH 8
FLAG 9
PQ28
TPCA8065-H_PPAK56-8-5
UMA@
4
5
1
2
3
PQ31
TPCA8059-H_PPAK56-8-5
UMA@
4
5
1
2
3
PC106
10U_1206_25V6M
12
PQ37
TPCA8065-H_PPAK56-8-5
95W@
4
5
1
2
3
PQ13
TPCA8065-H_PPAK56-8-5
@
4
5
1
2
3
PC130
10U_1206_25V6M
12
PR172
4.7_1206_5%
1 2
PC149
1000P_0603_50V7K
12
PQ21
TPCA8065-H_PPAK56-8-5
@
4
5
1
2
3
PU15
NCP5911MNTBG_DFN8-9
UMA@
DRVL 5
EN
3
VCC
4
PWM
2
BST
1
GND 6
SW 7
DRVH 8
FLAG 9
PC132
1U_0603_25V6K
95W@
12
PC122
10U_1206_25V6M
12
PQ34
TPCA8059-H_PPAK56-8-5
95W@
4
5
1
2
3
PL14
HCB4532KF-800T90_1812
1 2
PQ30
TPCA8059-H_PPAK56-8-5
UMA@
4
5
1
2
3
PQ17
TPCA8059-H_PPAK56-8-5
4
5
1
2
3
PL10
0.36UH_VMPI1004AR-R36M-Z03_30A_20%
1
3
4
2
PR148
2.2_0603_1%
95W@
1 2
PC100
1U_0603_25V6K
12
PC118
10U_1206_25V6M
12
PC107
1U_0603_25V6K
12
PC150
1000P_0603_50V7K
12
PC121
10U_1206_25V6M
12
PR136
2.2_0603_1%
1 2
PC101
10U_1206_25V6M
12
PQ18
TPCA8059-H_PPAK56-8-5
4
5
1
2
3
+
PC125
68U_25V_M
1
2
PC120
1U_0603_25V6K
UMA@
12
PR133
2.2_0603_1%
12
PL9
0.36UH_VMPI1004AR-R36M-Z03_30A_20%
1
3
4
2
PQ12
TPCA8065-H_PPAK56-8-5
4
5
1
2
3
PR182
4.7_1206_5%
1 2
PC110
1U_0603_25V6K
12
PC123
10U_1206_25V6M
12
PQ29
TPCA8059-H_PPAK56-8-5
95W@
4
5
1
2
3
PU13
NCP5911MNTBG_DFN8-9
DRVL 5
EN
3
VCC
4
PWM
2
BST
1
GND 6
SW 7
DRVH 8
FLAG 9
PR138
2.2_0603_1%
12
+
PC153
68U_25V_M
1
2
PC117
1U_0603_25V6K
12
PL12
HCB4532KF-800T90_1812
1 2
PC112
10U_1206_25V6M
12
PR134 4.02K_0402_1%
95W@
12
PR137 4.02K_0402_1%
95W@
12
PC105
10U_1206_25V6M
12
PR173
4.7_1206_5%
1 2
PC104
1U_0603_25V6K
12
PC131
0.22U_0603_25V7K
95W@
1 2
PU12
NCP5911MNTBG_DFN8-9
DRVL 5
EN
3
VCC
4
PWM
2
BST
1
GND 6
SW 7
DRVH 8
FLAG 9
PR134
2.74K_0402_1%
65W@
PU11
NCP5911MNTBG_DFN8-9
DRVL 5
EN
3
VCC
4
PWM
2
BST
1
GND 6
SW 7
DRVH 8
FLAG 9
PR144
2.2_0603_1%
UMA@
12
+
PC124
68U_25V_M
1
2
PC129
1U_0603_25V6K
95W@
12
PQ15
TPCA8065-H_PPAK56-8-5
@
4
5
1
2
3
PR137
2.74K_0402_1%
65W@
PL13
0.36UH_VMPI1004AR-R36M-Z03_30A_20%
UMA@
1
3
4
2
PR142
2.2_0603_1%
UMA@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
UG_VGA
SW_VGA
UG_VGA
LG_VGA
TRIP_VGA
EN_VGA
FB_VGA
BST_VGA
RF_VGA
+VGA_Vin
GND_SENSE[23]
VGA_SENSE [23]
GPU_VID1 [22]
GPU_VID0 [22]
VGA_PWROK[18]
DGPU_PWR_EN[17,26]
B+
+5VALW
+VGA_CORE
+3VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
VGA_CORE
Custom
60 64Tuesday, April 12, 2011
2010/01/25 2009/04/28
Compal Electronics, Inc.
PCA60/70 LA-7001P M/B
(Default)
ESR=10m ohm
1.00
1
0
01
0 0 0.825V
GPU_VID1
1
NVIDIA/N12P-GS
1
GPU_VID0
0.85
0.975
Vtrip range ==> 0.2V ~ 3V
Cout ESR=12m ohm Rdson(max)=3.2 mohm Rdson(typ)=2.6 mohm.
Ipeak=41.02A, Imax=28.714A, Iocp=43A
Delta I=((19-0.9)*(0.9/19))/(L*Fsw)=6.8A
=>1/2Delta I=3.4A
choose Rcs=75K
Iocpmax=((75K*11uA)/0.0013)+3.4A=75.52A
Iocpmin=((75K*9uA)/(0.0016*1.35))+3.4A=48.42A
Iocp=48.42A~75.52A
VFB=0.7V
V=0.7*(1+Rtop/Rbottom)
Fsw=350KHz
N12P-GS Performance Mode
PR160
0_0402_5%
DIS@
1 2
PQ35
TPCA8057-H_PPAK56-8-5
DIS@
4
5
1
2
3
PR58
10_0402_5%
DIS@
12
PR234
10K_0402_1%
DIS@
12
PC57
0.22U_0603_25V7K
DIS@
1 2
PQ32
TPCA8057-H_PPAK56-8-5
DIS@
4
5
1
2
3
PR61
16K_0402_1%
DIS@
1 2
PC178
4700P_0402_16V7K
DIS@
12
PC137
10U_1206_25V6M
DIS@
12
PC62
1U_0603_6.3V6M
DIS@
12
PR235
100K_0402_5%
DIS@
12
PL21
HCB4532KF-800T90_1812
DIS@
12
PR163
10_0402_5%
DIS@
12
PR231
82K_0402_1%
DIS@
12
PR226
10K_0402_1%
DIS@
12
PC139
10U_1206_25V6M
DIS@
12
PR60
53.6K_0402_1%
DIS@
1 2
PR162
470K_0402_5%
DIS@
12
PC140
0.1U_0402_16V7K
DIS@
12
PR233
10K_0402_1%
DIS@
12
PR159
4.7_1206_5%
@
12
PR161
2.2_0603_5%
DIS@
1 2
PC142
10U_1206_25V6M
DIS@
12
G
D
S
PQ47A
DMN66D0LDW-7_SOT363-6
DIS@
2
61
PL20
0.36UH_MMD-12CE-R36M-M1L_34A_20%
DIS@
1 2
PQ33
TPCA8065-H_PPAK56-8-5
DIS@
4
5
1
2
3
PR228
10K_0402_1%
DIS@
12
+
PC141
560U_2.5V_M
DIS@
1
2
PC138
680P_0603_50V7K
@
12
PR225
13.3K_0402_1%
DIS@
12
PQ11
TPCA8065-H_PPAK56-8-5
DIS@
4
5
1
2
3
PR158
150K_0402_1%
DIS@
1 2
PC177
4700P_0402_16V7K
DIS@
12
+
PC143
560U_2.5V_M
DIS@
1
2
PR57
2.87K_0402_1%
DIS@
12
PU16
TPS51212DSCR_SON10_3X3
DIS@
EN
3
TRIP
2
V5IN 7
DRVH 9
SW 8
DRVL 6
VBST 10
RF
5
VFB
4
PGOOD
1
TP 11
G
D
S
PQ47B
DMN66D0LDW-7_SOT363-6
DIS@
5
34
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PH_12V
+12V_B+
FB_12V
12V_EN_R
BOOT_12V_1
BOOT_12V
SPOK[53]
B+
+12VALWP
+12VALWP +12VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
PCA70 LA-7521P M/B
0.1
P60_PWR-+12V
61 64
Tuesday, April 12, 2011
2010/10/1 2011/11/01
Compal Electronics, Inc.
VFB=0.8V
Imax=1.862A
Ipeak=2.66A
PC24
4.7U_0805_25V6-K
12
PC22
0.1U_0603_25V7K
12
PR842 0_0402_5%
1 2
TPS54331DR_SO8
PU3
VIN
2
BOOT
1
EN
3
SS
4
GND 7
PH 8
COMP 6
VSENSE 5
PJ13
JUMP_43X118
@
11
2
2
PC115
470P_0402_50V7K
12
PC128
330P_0402_50V7K
12
PR140
226K_0402_1%
1 2
PC116
180P_0402_50V8J
1 2
PR141
30K_0402_1%
1 2
PR146
0_0603_5%
1 2
PL4
10UH_PCMB063T-100MS_4A_20%
1 2
PC21
0.1U_0603_25V7K
1 2
PC26
15P_0402_50V8J
1 2
PC23
4.7U_0805_25V6-K
12
PC64
0.01U_0402_16V7K
12
PD1
S SCH DIO SX34 SMA
12
PR145
2.1K_0402_1%
12
PJ11
JUMP_43X79
@
1
122
+
PC25
100U_25V_M
1
2
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
Power PIR
62 64Tuesday, April 12, 2011
2010/10/1 2011/11/01
Compal Electronics, Inc.
PCA70 LA-7521P M/B
NO DATE PAGE MODIFICATION LIST PURPOSE
----------------------------------------------------------------------------------------------------------------------------------------
P48~49 Change PR39 to 118k ohm
Change PR49 to 95.3k ohm
2010/09/301Modify OCP setting value
2 2010/10/01 P48 Remove reserved 1.05VP power rail Because VCCIO will not be changeable voltage on
Sandy Bridge platform. We don't need another 1.05V
for PCH
3 2010/10/28 P50
PC124,PC125 change to 220u_25V
Remove PC126 Modify for input cap
4 2010/10/28 P49 Remove PR70, PR82, PR84, PR171, PR172, PR173,
PR174, PC76 Remove forth phase related components
5 2010/10/28 P49 PR62, PR65, PR66 change to 90.9K_0603_1%
PC72 change to 1500P_0402_50V Change for correct droop setting
2010/10/286 P49 PR129 change to 39.2K_0603_1%
PR117 change to 25.5k_0402_1%
PC92 change to 220P_0402_50V
Change for correct GT droop setting
7 2011/01/27 P58 update Net name "IMAX " update after vender review layout
change PC25 part number to SF000004S00
change PC124/125/126/153 part number from
SF000004L00 to SF000004M00
2011/01/27
2011/01/27
8
9
P61
P59
material shoretage
material shoretage
10 2011/02/09 P52 add "@" at BOM structure of PR836 and PR841 change for EC
11 2011/02/16 P53 change PU2 part number to SA00004NY00 change for part EOL
P602011/03/0712 change PR60 from 75Kohm to 53.6Kohm change for OCP setting point
2011/03/07 P57 change PR49 from 76.8Kohm to 143Kohm change for OCP setting point
13 2011/03/25 P60 change BOM structure PQ11 from @ to DIS@ for Thermal team concern
Remove VGA_core Jump for impedence concern
P602011/03/3014
change PR153 from 15m ohm to 10m ohm for Inrush concernP522011/03/3015
change PC124/125/126/153 part number from
SF000004M00 to SF000004T00
2011/03/3016 P59
change PC101/102/105/106/111/112/118/121/122/123/130/137/139/142
part number from SE142106K80 to SE142106M80
2011/03/3017
18 2011/04/06 P52 Remove JDCIN1 pin.7 and pin.8 from GND Layout modification
19 2011/04/08 P58 add PC807 at PU10.9 for ESD request
change PR68=5.49Kohm, PC67=1nF, PR62=PR65=PR66=PR152=95.3Kohm, PC65=470pF,
PC69=10pF, PC66=220pF, PR80=1.5kohm, PR79=2.8kohm, PR129=39.2Kohm, PC88=2.2nF,
PC97=680pF, PC90=10pF, PC95=220pF, PR116=1.24kohm, PR109=887ohm, PC92=820pF
P60
20 2011/04/08 change PC141/PC143 part number to SF000002P00
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.1
HW-PIR
63 64Tuesday, April 12, 2011
2010/10/1 2011/11/01
Compal Electronics, Inc.
PCA70 LA-7521P M/B
HW PIR (Product Improve Record)
NWQAA LA-6062P SCHEMATIC CHANGE LIST
REVISION CHANGE: 0.1 TO 0.2
GERBER-OUT DATE: 2009/12/30
NO DATE PAGE MODIFICATION LIST PURPOSE
---------------------------------------------------------------------------------------------------------------------
---------------------------------------------------------------------------------------------------------------------
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number R ev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS , INC. AND CONTAINS CONFI DENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM T HE CUSTODY OF THE COMPETE NT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THI S SHEET NOR THE INFORMAT ION IT CONTAIN S
MAY BE USED BY OR DISCLOSED TO ANY THIRD P ARTY WITHOUT PRIOR WRITTEN CONSENT OF COMP AL ELEC TRONICS, INC.
Issued Date Deciphered Date
0.1
Power Rail
64 64Tuesday, April 12, 2011
Compal Electronics, Inc.
2011/11/012010/10/28
19V
Adapter
Converter
NPC6151(95W/UMA)
NPC6131(65W/DIS)
TPS51212
TPS51212
TPS51212
RT8205L
TPS54331
+CPU_CORE
0.885V
B+
B+
B+
B+
B+
B+
B+
B+
112A
+VGA_COREP
0.975V
35.32A
1.5V
10.24A +1.5VP
+1.05VS_VCCIOP
1.05V
17.3A
+3VALWP
+5VALWP
3.3V
5.71A
5V
7.37A
APL5930
APL5336
1.5V
1.5V
0.95V
+1.2VUSB
+0.75VP
1.2V
0.75V
APL5930
3.3V +1.8VSP
1.8V
1.26A
+12VALWP
12V
2.66A
0.558A
2A
19V
+GFX_CORE
35A
TPS51212
(Maho Bay)
B+ +1.05VS_VSP
(Maho Bay)
1.05V
7.3A
APL5610
1.05V
8.8A +VCCSAP
0.925V
