Compal LA 7782P Schematics. Www.s Manuals.com. R0.1 Schematics
User Manual: Motherboard Compal LA-7782P QAL81 Dalmore 14 DSC - Schematics. Free.
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Page Count: 67
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
Cover Sheet
1 66Tuesday, May 24, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
Cover Sheet
1 66Tuesday, May 24, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
Cover Sheet
1 66Tuesday, May 24, 2011
Compal Electronics, Inc.
BOM P/N :
PCB NO :
COMPAL CONFIDENTIAL
MODEL NAME :
Dalmore 14 DSC
REV : 0.1 (X00)
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
@ : Nopop Component
QAL81
2011-05-12
1@
2@
MB Type
TPM
TCM
BOM P/N
CONN@ : Connector Component
Ivy Bridge + Panther POINT
LA-7782P (DAA00002J00)
TBD
GPIO MAP: E4_VC_GPIO_map_rev_0.8
3@
4@
TPM DIS/TCM DIS 2@ 3@
Part Number Description
DAA00002J00 PCB 0LE LA-7782P REV0 M/B DSC
MB PCB
Part Number Description
DAA00002J00 PCB 0LE LA-7782P REV0 M/B DSC
MB PCB
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
DIS Block Diagram
2 66Monday, May 30, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
DIS Block Diagram
2 66Monday, May 30, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
DIS Block Diagram
2 66Monday, May 30, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
USB2.0 [3,8]
SATA5
DOCK LAN
DAI
DOCKING PORT
iVGA
iLVDS
iLVDS
LVDS Switch
MAX14979
MAX14885E
Video Switch
CRT CONN
1333/1600 MHz
USB5USB4
100MHz
33MHz
100MHz
PCI Express BUS
on IO board
PI5USB1457A USB
Power Share
USB3.0/2.0
USB3.0/2.0+PS
USB3.0
USB3.0
DOCK LAN
SATA Repeater
PS8520B
W25Q32BVSSIG
64M 4K sector
32M 4K sector
W25Q64CVSSIG
FFS LNG3DM
PCIE4
Discrete TPM
AT97SC3204
USH Module
WLAN
dVGA
VGA
USB Port
on IO board
USB3.0 [4]
On IO board
LVDS CONN
PCI Express BUS
PCIE x1
MDC
HD Audio I/F
WWAN
HeadPhone &
MIC Jack RJ45
S-ATA 0/1 6GB/s, S-ATA 2/3/4/5 3GB/s
1/2 Mini Card
WiFi ON/OFF
PCH XDP Port
CPU XDP Port
DC/DC Interface
Memory BUS (DDR3)
Power On/Off
SW & LED
BANK 0, 1, 2, 3, 4 ,5 ,6 ,7
DDRIII-DIMM X2
Touch Screen
KB CONNTP CONN
LPC BUS
1/2 Mini Card
BCM5882
USH
Smart Card
Lane x 8
FDI
RFID
HDD
USB7
E-Module
Dig.
MIC
Trough LVDS Cable
INT.Speaker
ECE5048
PCIE1PCIE3
China TCM1.2
Lane x 4
USB6
PCIE5
92HD93
HDA Codec
USB10
Trough LVDS Cable
USB 2.0 Port
Camera
USB
RJ11
LAN SWITCH
PI3L720
82579LM
Intel Lewisville
SATA Repeater
PCIE2
TDA8034HN
SSX44BPP
E-SATA
SATA
EXPRESS
Card
BT 4.0
Option
OZ600FJ0
Card Reader
SPI
To Docking side
on IO board
SMSC SIO
rPGA CPU
INTEL
DMI2
Ivy Bridge
BGA
Panther Point-M
988 pins
BC BUS
Fingerprint
CONN
DAI
FP_USB
SMSC KBC
MEC5055
Full Mini Card
Nvidia
N13M
HDMI CONN
PEG Gen3
dLVDS
Compal confidential
Block Diagram
DPE
DPC
DPD
PS8513B
PAGE 6-11
PAGE 12-13
PAGE 14-21
PAGE 22PAGE 23
PAGE 24
PAGE 26
PAGE 27
PAGE 27
PAGE 27
PAGE 28
PAGE 29
PAGE 31
PAGE 31
PAGE 32
PAGE 32
PAGE 33
PAGE 34 PAGE 34 PAGE 34PAGE 35
PAGE 36
PAGE 36
PAGE 37
PAGE 38
PAGE 33
SDXC/MMC
PAGE 39
PAGE 40
PAGE 37
PAGE 36
PAGE 23
PAGE 41
PAGE 29
PAGE 14
PAGE 14
PAGE 41 PAGE 41
PAGE 44-51
PAGE 22
PAGE 22
GUARDIAN III
EMC4022
Thermal PWM FAN
PAGE 26
PS8171
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
Index and Config.
3 66Friday, May 20, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
Index and Config.
3 66Friday, May 20, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
Index and Config.
3 66Friday, May 20, 2011
Compal Electronics, Inc.
PM TABLE
DELL CONFIDENTIAL/PROPRIETARY
MINI CARD-2 WLAN
PCI EXPRESS
Lane 1
DESTINATION
Lane 2
Lane 3
Lane 4
MINI CARD-1 WWAN
POWER STATES
Lane 5
Lane 6
Express card
MMI
+3.3V_M +3.3V_M
(M-OFF)
ON
ON
ON
ON
OFF
OFF
OFFOFF
+3.3V_SUS
+5V_ALW
+5V_RUN
+3.3V_ALW_PCH
+1.5V_MEM
S0
S3
S5 S4/AC don't exist
ON
power
plane
S5 S4/AC
State
OFFON
ON
ON
ON ON
OFF
OFF
OFF
OFFOFF
+15V_ALW
+3.3V_RTC_LDO
+1.05V_M
E3 Module Bay (USB3)
MLK DOCK
JESA1 (Right side ESATA)
WLAN
JMINI3(Flash)
WWAN
DOCKING8
9
USH->BIO
10 Express card
11
JUSB1 (Right side Top)
2
3
1
4
USB PORT#
0
DESTINATION
6
5
7
JUSB (Left side)
Camera
JUSB2 (Right side Bottom)
PCH
Lane 7
Lane 8 None
10/100/1G LOM
12
13 LCD Touch
Bluetooth
+1.05V_M
+1.8V_RUN
+1.05V_RUN_VTT
+3.3V_RUN
+0.75V_DDR_VTT
+1.5V_RUN
+VCC_CORE
+1.05V_RUN
1/2vMINI CARD-3 PCIE
HDD
NA
ODD/ E3 Module Bay
SATA
SATA 0
DESTINATION
NA
SATA 1
SATA 2
SATA 3
SATA 4
SATA 5
ESATA
Dock
0
1
BIO
NA
USH
need to update Power Status and PM
Table
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Dock DP port 2
DSC DP/HDMI Port
Port C
Connetion
Port D
Port E
Dock DP port 1
MB HDMI Conn
OFF
OFF
OFF
LOW
LOW
OFF
OFF
S0 (Full ON) / M0
SLP
S3# SLP
S5#
HIGH
Signal
State
SLP
S4#
HIGH HIGH
ALWAYS
PLANE
ON
M
PLANE
ON
SUS
PLANE RUN
PLANE CLOCKS
ON ON ON
S3 (Suspend to RAM) / M3 LOW HIGH HIGH ON ON ON OFF
S4 (Suspend to DISK) / M3 ON ON OFF
SLP
A#
HIGH
HIGH
LOW HIGH HIGH
S5 (SOFT OFF) / M3 ON ON OFFLOW HIGHLOW
S3 (Suspend to RAM) / M-OFF
S5 (SOFT OFF) / M-OFF
LOW HIGH HIGH LOW ON ONOFF OFF OFF
LOW LOW LOW ON OFF OFF OFF OFF
LOW LOW LOW LOW ON OFF OFF OFF OFF
S4 (Suspend to DISK) / M-OFF HIGH
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
Power Rail
4 66Friday, May 20, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
Power Rail
4 66Friday, May 20, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
Power Rail
4 66Friday, May 20, 2011
Compal Electronics, Inc.
BATTERY +PWR_SRC
ADAPTER
FDC654P +BL_PWR_SRC
EN_INVPWR
SI3456BDVSI3456BDV
HDDC_EN
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+5V_MOD
MODC_EN
CHARGER
+3.3V_ALW
RT8205 +5V_ALW
ALWON
SI3456
+3.3V_LAN+3.3V_SUS
+5V_HDD
(Q21)
(Q30)(Q27)
(PU100)
(Q34)
+1.05V_RUN_VTT +1.05V_M
SIO_SLP_A#
SUS_ON
S13456
(Q54) SI3456
+3.3V_M
(Q58)
+3.3V_ALW_PCH
PCH_ALW_ON
SI3456
(Q49)
AUX_ON
+3.3V_WLAN
SI3456
(Q38)
AUX_EN_WOWL
SI4164
(Q63)
+1.05V_RUN
(PU500)
SIO_SLP_S3#
+3.3V_M
Pop option
CPU_VTT_ON
ISL62883 +GPU_CORE
DGPU_PWR_EN
(PU1000)
TPS51212
(PU400)
TPS51212
Pop option
+1.0V_LAN
(PU200)
SIO_SLP_S3#
(Q59)
NTGS4141NAO4728
(QC3)
CPU1.5V_S3_GATE
+0.75V_DDR_VTT+1.5V_RUN+1.5V_CPU_VDDQ
+1.5V_MEM
DDR_ON
0.75V_DDR_VTT_ON
RT8207
+VCC_SA
1.05V_VTTPWRGD
(PU300)
+1.8V_RUN
SY8033 (PU600)
TPS51461
SIO_SLP_S3#
SIO_SLP_S3#
TPS22966
SIO_SLP_S3#
+3.3V_RUN
(U78)
+5V_RUN
SIO_SLP_A#
+VCC_CORE
VT1318M
(PU700)
1.05V_0.8V_PWROK
+VCC_GFXCORE
SI3456
(Q40)
+3.3V_WWAN
MCARD_WWAN_PWREN
SI3456
(Q42)
+3.3V_FLASH
MCARD_MISC_PWREN
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
SMBUS TOPOLOGY
5 66Friday, May 20, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
SMBUS TOPOLOGY
5 66Friday, May 20, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
SMBUS TOPOLOGY
5 66Friday, May 20, 2011
Compal Electronics, Inc.
MEC 5065
MEM_SMBDATA
MEM_SMBCLK
KBC
C9
H14
+3.3V_ALW_PCH
2.2K
2.2K
200 DIMMA
SMBUS Address [A4]
202
DIMMB
SMBUS Address [A0]
200
202
C8
G12
+3.3V_LAN
2.2K
2.2K
LAN_SMBCLK
LAN_SMBDATA
+3.3V_ALW
129
127
SMBUS Address
2.2K
DOCK_SMB_CLK
DOCK_SMB_DAT DOCKING
2.2K
B4
A3
1A
1A
A4
B5
2.2K
2.2K
LCD_SMBCLK
LCD_SMDATA
1B
1B
1C
1C
B59
A56
+3.3V_ALW
2.2K
2.2K
100 ohm
100 ohm BATTERY
CONN
7
6SMBUS Address [0x16]
PBAT_SMBCLK
PBAT_SMBDAT
3A
1E
1E
2B
2B
B50
1G
1G A47
2A
2A
B7
A7
+3.3V_ALW
2.2K
2.2K
2D
2D
30
29
BAY_SMBDAT
BAY_SMBCLK
A49
B52
CARD_SMBCLK
CARD_SMBDAT
+3.3V_SUS
2.2K
2.2K
SMBUS Address [C8]
LOM
CHARGER_SMBCLK
CHARGER_SMBDAT
Charger SMBUS Address [0x12]
SML1_SMBDATA
PCH
SML1_SMBCLK
E14M16
A50
B53
B49
B48
3A
B6A5
+3.3V_ALW_PCH
2.2K
2.2K
USH
+3.3V_ALW
USH_SMBCLK
USH_SMBDAT
+3.3V_ALW
2.2K
2.2K
53
51 SMBUS Address [TBD]
XDP1
SMBUS Address [TBD]
XDP2
53
51
T4
T3
GPU_SMBCLK
GPU_SMBDAT GPU SMBUS Address [0xXX]
+3.3V_RUN
2.2K
2.2K
M9
L9 SMBUS Address [0xa4]
9
8
31
28
G Sensor SMBUS Address [0x3B]
2N7002
2N7002
+3.3V_RUN
10K
10K
4
6
2.2K
2.2K
Express card
7
8SMBUS Address [TBD]
APR_EC: 0x48
SPR_EC: 0x70
MSLICE_EC: 0x72
USB: 0x59
AUDIO: 0x34
SLICE_BATTERY: 0x17
SLICE_CHARGER: 0x13
SMBUS Address [0x9a]
E3 Module Bay SMBUS Address [0xd2]
+3.3V_ALW
WWAN SMBUS Address [TBD]
32
30
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DMI_CRX_PTX_P1
DMI_CRX_PTX_P2
DMI_CTX_PRX_N0
DMI_CRX_PTX_N2
DMI_CTX_PRX_P2
DMI_CTX_PRX_P1
DMI_CRX_PTX_N0
DMI_CRX_PTX_P0
DMI_CRX_PTX_N3
DMI_CTX_PRX_N3
DMI_CRX_PTX_P3
DMI_CTX_PRX_P3
DMI_CTX_PRX_P0
DMI_CTX_PRX_N1
DMI_CRX_PTX_N1
DMI_CTX_PRX_N2
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N6
FDI_CTX_PRX_N5
FDI_CTX_PRX_N7
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P5
FDI_CTX_PRX_P4
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_INT
FDI_LSYNC1
FDI_CTX_PRX_N0
PEG_COMP
EDP_COMP
EDP_COMP
PEG_CTX_GRX_P[0..15]
PEG_CTX_GRX_N[0..15]
PEG_CTX_GRX_C_P0
PEG_CTX_GRX_C_P1
PEG_CTX_GRX_P0
PEG_CTX_GRX_C_P3
PEG_CTX_GRX_C_P2
PEG_CTX_GRX_C_N3
PEG_CTX_GRX_C_N0 PEG_CTX_GRX_N0
PEG_CTX_GRX_C_N1
PEG_CTX_GRX_C_N2
PEG_CTX_GRX_C_P5
PEG_CTX_GRX_C_P6
PEG_CTX_GRX_C_P4
PEG_CTX_GRX_C_N4
PEG_CTX_GRX_C_N6
PEG_CTX_GRX_C_N5
PEG_CTX_GRX_C_P7
PEG_CTX_GRX_C_P8
PEG_CTX_GRX_C_P9
PEG_CTX_GRX_C_N8
PEG_CTX_GRX_C_N7
PEG_CTX_GRX_C_P10
PEG_CTX_GRX_C_P11
PEG_CTX_GRX_C_N11
PEG_CTX_GRX_C_N9
PEG_CTX_GRX_C_N10
PEG_CTX_GRX_C_P12
PEG_CTX_GRX_C_N12
PEG_CTX_GRX_C_N13
PEG_CTX_GRX_C_P13
PEG_CTX_GRX_C_P14
PEG_CTX_GRX_C_N14
PEG_CTX_GRX_C_P15
PEG_CTX_GRX_C_N15
PEG_CTX_GRX_P1
PEG_CTX_GRX_N1
PEG_CTX_GRX_N2
PEG_CTX_GRX_P2
PEG_CTX_GRX_P3
PEG_CTX_GRX_P4
PEG_CTX_GRX_N3
PEG_CTX_GRX_N4
PEG_CTX_GRX_P5
PEG_CTX_GRX_P6
PEG_CTX_GRX_P7
PEG_CTX_GRX_N5
PEG_CTX_GRX_N7
PEG_CTX_GRX_N6
PEG_CTX_GRX_P8
PEG_CTX_GRX_P9
PEG_CTX_GRX_P10
PEG_CTX_GRX_N8
PEG_CTX_GRX_N9
PEG_CTX_GRX_P11
PEG_CTX_GRX_N12
PEG_CTX_GRX_P12
PEG_CTX_GRX_N11
PEG_CTX_GRX_N10
PEG_CTX_GRX_N13
PEG_CTX_GRX_P13
PEG_CTX_GRX_P14
PEG_CTX_GRX_P15
PEG_CTX_GRX_N14
PEG_CTX_GRX_N15
PEG_CTX_GRX_C_P7
PEG_CTX_GRX_C_P12
PEG_CTX_GRX_C_P0
PEG_CTX_GRX_C_P5
PEG_CTX_GRX_C_P10
PEG_CTX_GRX_C_P15
PEG_CTX_GRX_C_P3
PEG_CTX_GRX_C_P8
PEG_CTX_GRX_C_P13
PEG_CTX_GRX_C_P1
PEG_CTX_GRX_C_P6
PEG_CTX_GRX_C_P11
PEG_CTX_GRX_C_P4
PEG_CTX_GRX_C_P9
PEG_CTX_GRX_C_P14
PEG_CTX_GRX_C_P2
PEG_CTX_GRX_C_N11
PEG_CTX_GRX_C_N6
PEG_CTX_GRX_C_N1
PEG_CTX_GRX_C_N12
PEG_CTX_GRX_C_N15
PEG_CTX_GRX_C_N8
PEG_CTX_GRX_C_N3
PEG_CTX_GRX_C_N10
PEG_CTX_GRX_C_N0
PEG_CTX_GRX_C_N13
PEG_CTX_GRX_C_N14
PEG_CTX_GRX_C_N7
PEG_CTX_GRX_C_N2
PEG_CTX_GRX_C_N9
PEG_CTX_GRX_C_N4
PEG_CTX_GRX_C_N5
PEG_CRX_GTX_P11
PEG_CRX_GTX_P6
PEG_CRX_GTX_P1
PEG_CRX_GTX_P13
PEG_CRX_GTX_P8
PEG_CRX_GTX_P3
PEG_CRX_GTX_P15
PEG_CRX_GTX_P10
PEG_CRX_GTX_P5
PEG_CRX_GTX_P0
PEG_CRX_GTX_P12
PEG_CRX_GTX_P7
PEG_CRX_GTX_P2
PEG_CRX_GTX_P14
PEG_CRX_GTX_P9
PEG_CRX_GTX_P4
PEG_CRX_GTX_N5
PEG_CRX_GTX_N0
PEG_CRX_GTX_N11
PEG_CRX_GTX_N2
PEG_CRX_GTX_N13
PEG_CRX_GTX_N8
PEG_CRX_GTX_N4
PEG_CRX_GTX_N15
PEG_CRX_GTX_N10
PEG_CRX_GTX_N6
PEG_CRX_GTX_N1
PEG_CRX_GTX_N12
PEG_CRX_GTX_N7
PEG_CRX_GTX_N3
PEG_CRX_GTX_N14
PEG_CRX_GTX_N9
+1.05V_RUN_VTT
+1.05V_RUN_VTT
DMI_CRX_PTX_P0<16>
DMI_CRX_PTX_N3<16>
DMI_CRX_PTX_P1<16>
DMI_CRX_PTX_N1<16>
DMI_CRX_PTX_P3<16>
DMI_CRX_PTX_N2<16>
DMI_CRX_PTX_P2<16>
DMI_CRX_PTX_N0<16>
DMI_CTX_PRX_N0<16> DMI_CTX_PRX_N1<16> DMI_CTX_PRX_N2<16> DMI_CTX_PRX_N3<16>
DMI_CTX_PRX_P0<16> DMI_CTX_PRX_P1<16> DMI_CTX_PRX_P2<16> DMI_CTX_PRX_P3<16>
FDI_CTX_PRX_N1<16> FDI_CTX_PRX_N0<16>
FDI_CTX_PRX_N4<16> FDI_CTX_PRX_N3<16> FDI_CTX_PRX_N2<16>
FDI_CTX_PRX_N7<16> FDI_CTX_PRX_N6<16> FDI_CTX_PRX_N5<16>
FDI_CTX_PRX_P2<16> FDI_CTX_PRX_P1<16> FDI_CTX_PRX_P0<16>
FDI_CTX_PRX_P5<16> FDI_CTX_PRX_P4<16> FDI_CTX_PRX_P3<16>
FDI_FSYNC0<16>
FDI_LSYNC0<16>
FDI_CTX_PRX_P7<16> FDI_CTX_PRX_P6<16>
FDI_LSYNC1<16>
FDI_FSYNC1<16>
FDI_INT<16>
PEG_CTX_GRX_N[0..15] <45>
PEG_CTX_GRX_P[0..15] <45>
PEG_CRX_GTX_P[0..15] <45>
PEG_CRX_GTX_N[0..15] <45>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
Ivy Bridge (1/6)
6 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
Ivy Bridge (1/6)
6 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
Ivy Bridge (1/6)
6 66Friday, June 10, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
(1)PEG_RCOMPO (H22) use 4mil connect to PEG_ICOMPI, then use 4mil connect to RC2.
(2)PEG_ICOMPO use 12mil connect to RC2
eDP_COMPIO and ICOMPO signals should be shorted near
balls and routed with typical impedance <25 mohms
DP Compensation
(1) EDP_COMPIO use 4mil trace to RC1
(2) EDP_ICOMPO use 12mil to RC1
CC29 0.22U_0402_16V7K~DCC29 0.22U_0402_16V7K~D
1 2
CC17 0.22U_0402_16V7K~DCC17 0.22U_0402_16V7K~D
1 2
CC5 0.22U_0402_16V7K~DCC5 0.22U_0402_16V7K~D
12
CC3 0.22U_0402_16V7K~DCC3 0.22U_0402_16V7K~D
12
CC19 0.22U_0402_16V7K~DCC19 0.22U_0402_16V7K~D
1 2
CC6 0.22U_0402_16V7K~DCC6 0.22U_0402_16V7K~D
12
RC2
24.9_0402_1%~D
RC2
24.9_0402_1%~D
12
RC1
24.9_0402_1%~D
RC1
24.9_0402_1%~D
12
CC12 0.22U_0402_16V7K~DCC12 0.22U_0402_16V7K~D
12
CC24 0.22U_0402_16V7K~DCC24 0.22U_0402_16V7K~D
1 2
PCI EXPRESS* - GRAPHICS
DMI
Intel(R) FDI
eDP
JCPU1A
TYCO_2013620-3_IVYBRIDGE
PCI EXPRESS* - GRAPHICS
DMI
Intel(R) FDI
eDP
JCPU1A
TYCO_2013620-3_IVYBRIDGE
DMI_RX#[0]
B27
DMI_RX#[1]
B25
DMI_RX#[2]
A25
DMI_RX#[3]
B24
DMI_RX[0]
B28
DMI_RX[1]
B26
DMI_RX[2]
A24
DMI_RX[3]
B23
DMI_TX#[0]
G21
DMI_TX#[1]
E22
DMI_TX#[2]
F21
DMI_TX#[3]
D21
DMI_TX[0]
G22
DMI_TX[1]
D22
DMI_TX[3]
C21 DMI_TX[2]
F20
FDI0_TX#[0]
A21
FDI0_TX#[1]
H19
FDI0_TX#[2]
E19
FDI0_TX#[3]
F18
FDI1_TX#[0]
B21
FDI1_TX#[1]
C20
FDI1_TX#[2]
D18
FDI1_TX#[3]
E17
FDI0_TX[0]
A22
FDI0_TX[1]
G19
FDI0_TX[2]
E20
FDI0_TX[3]
G18
FDI1_TX[0]
B20
FDI1_TX[1]
C19
FDI1_TX[2]
D19
FDI1_TX[3]
F17
FDI0_FSYNC
J18
FDI1_FSYNC
J17
FDI_INT
H20
FDI0_LSYNC
J19
FDI1_LSYNC
H17
PEG_ICOMPI J22
PEG_ICOMPO J21
PEG_RCOMPO H22
PEG_RX#[0] K33
PEG_RX#[1] M35
PEG_RX#[2] L34
PEG_RX#[3] J35
PEG_RX#[4] J32
PEG_RX#[5] H34
PEG_RX#[6] H31
PEG_RX#[7] G33
PEG_RX#[8] G30
PEG_RX#[9] F35
PEG_RX#[10] E34
PEG_RX#[11] E32
PEG_RX#[12] D33
PEG_RX#[13] D31
PEG_RX#[14] B33
PEG_RX#[15] C32
PEG_RX[0] J33
PEG_RX[1] L35
PEG_RX[2] K34
PEG_RX[3] H35
PEG_RX[4] H32
PEG_RX[5] G34
PEG_RX[6] G31
PEG_RX[7] F33
PEG_RX[8] F30
PEG_RX[9] E35
PEG_RX[10] E33
PEG_RX[11] F32
PEG_RX[12] D34
PEG_RX[13] E31
PEG_RX[14] C33
PEG_RX[15] B32
PEG_TX#[0] M29
PEG_TX#[1] M32
PEG_TX#[2] M31
PEG_TX#[3] L32
PEG_TX#[4] L29
PEG_TX#[5] K31
PEG_TX#[6] K28
PEG_TX#[7] J30
PEG_TX#[8] J28
PEG_TX#[9] H29
PEG_TX#[10] G27
PEG_TX#[11] E29
PEG_TX#[12] F27
PEG_TX#[13] D28
PEG_TX#[14] F26
PEG_TX#[15] E25
PEG_TX[0] M28
PEG_TX[1] M33
PEG_TX[2] M30
PEG_TX[3] L31
PEG_TX[4] L28
PEG_TX[5] K30
PEG_TX[6] K27
PEG_TX[7] J29
PEG_TX[8] J27
PEG_TX[9] H28
PEG_TX[10] G28
PEG_TX[11] E28
PEG_TX[12] F28
PEG_TX[13] D27
PEG_TX[14] E26
PEG_TX[15] D25
eDP_AUX
C15
eDP_AUX#
D15
eDP_TX[0]
C17
eDP_TX[1]
F16
eDP_TX[2]
C16
eDP_TX[3]
G15
eDP_TX#[0]
C18
eDP_TX#[1]
E16
eDP_TX#[2]
D16
eDP_TX#[3]
F15
eDP_COMPIO
A18
eDP_HPD#
B16 eDP_ICOMPO
A17
CC21 0.22U_0402_16V7K~DCC21 0.22U_0402_16V7K~D
1 2
CC28 0.22U_0402_16V7K~DCC28 0.22U_0402_16V7K~D
1 2
CC25 0.22U_0402_16V7K~DCC25 0.22U_0402_16V7K~D
1 2
CC15 0.22U_0402_16V7K~DCC15 0.22U_0402_16V7K~D
12
CC7 0.22U_0402_16V7K~DCC7 0.22U_0402_16V7K~D
12
CC2 0.22U_0402_16V7K~DCC2 0.22U_0402_16V7K~D
12
CC4 0.22U_0402_16V7K~DCC4 0.22U_0402_16V7K~D
12
CC11 0.22U_0402_16V7K~DCC11 0.22U_0402_16V7K~D
12
CC26 0.22U_0402_16V7K~DCC26 0.22U_0402_16V7K~D
1 2
CC10 0.22U_0402_16V7K~DCC10 0.22U_0402_16V7K~D
12
CC13 0.22U_0402_16V7K~DCC13 0.22U_0402_16V7K~D
12
CC27 0.22U_0402_16V7K~DCC27 0.22U_0402_16V7K~D
1 2
CC20 0.22U_0402_16V7K~DCC20 0.22U_0402_16V7K~D
1 2
VSS
JCPU1I
TYCO_2013620-3_IVYBRIDGE
VSS
JCPU1I
TYCO_2013620-3_IVYBRIDGE
VSS161
T35
VSS162
T34
VSS163
T33
VSS164
T32
VSS165
T31
VSS166
T30
VSS167
T29
VSS168
T28
VSS169
T27
VSS170
T26
VSS171
P9
VSS172
P8
VSS173
P6
VSS174
P5
VSS175
P3
VSS176
P2
VSS177
N35
VSS178
N34
VSS179
N33
VSS180
N32
VSS181
N31
VSS182
N30
VSS183
N29
VSS184
N28
VSS185
N27
VSS186
N26
VSS187
M34
VSS188
L33
VSS189
L30
VSS190
L27
VSS191
L9
VSS192
L8
VSS193
L6
VSS194
L5
VSS195
L4
VSS196
L3
VSS197
L2
VSS198
L1
VSS199
K35
VSS200
K32
VSS201
K29
VSS202
K26
VSS203
J34
VSS204
J31
VSS205
H33
VSS206
H30
VSS207
H27
VSS208
H24
VSS209
H21
VSS210
H18
VSS211
H15
VSS212
H13
VSS213
H10
VSS214
H9
VSS215
H8
VSS216
H7
VSS217
H6
VSS218
H5
VSS219
H4
VSS220
H3
VSS221
H2
VSS222
H1
VSS223
G35
VSS224
G32
VSS225
G29
VSS226
G26
VSS227
G23
VSS228
G20
VSS229
G17
VSS230
G11
VSS231
F34
VSS232
F31
VSS233
F29
VSS234 F22
VSS235 F19
VSS236 E30
VSS237 E27
VSS238 E24
VSS239 E21
VSS240 E18
VSS241 E15
VSS242 E13
VSS243 E10
VSS244 E9
VSS245 E8
VSS246 E7
VSS247 E6
VSS248 E5
VSS249 E4
VSS250 E3
VSS251 E2
VSS252 E1
VSS253 D35
VSS254 D32
VSS255 D29
VSS256 D26
VSS257 D20
VSS258 D17
VSS259 C34
VSS260 C31
VSS261 C28
VSS262 C27
VSS263 C25
VSS264 C23
VSS265 C10
VSS266 C1
VSS267 B22
VSS268 B19
VSS269 B17
VSS270 B15
VSS271 B13
VSS272 B11
VSS273 B9
VSS274 B8
VSS275 B7
VSS276 B5
VSS277 B3
VSS278 B2
VSS279 A35
VSS280 A32
VSS281 A29
VSS282 A26
VSS283 A23
VSS284 A20
VSS285 A3
CC22 0.22U_0402_16V7K~DCC22 0.22U_0402_16V7K~D
1 2
CC8 0.22U_0402_16V7K~DCC8 0.22U_0402_16V7K~D
12
CC1 0.22U_0402_16V7K~DCC1 0.22U_0402_16V7K~D
12
CC14 0.22U_0402_16V7K~DCC14 0.22U_0402_16V7K~D
12
CC31 0.22U_0402_16V7K~DCC31 0.22U_0402_16V7K~D
1 2
CC23 0.22U_0402_16V7K~DCC23 0.22U_0402_16V7K~D
1 2
CC16 0.22U_0402_16V7K~DCC16 0.22U_0402_16V7K~D
12
CC30 0.22U_0402_16V7K~DCC30 0.22U_0402_16V7K~D
1 2
CC18 0.22U_0402_16V7K~DCC18 0.22U_0402_16V7K~D
1 2
CC32 0.22U_0402_16V7K~DCC32 0.22U_0402_16V7K~D
1 2
CC9 0.22U_0402_16V7K~DCC9 0.22U_0402_16V7K~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
XDP_TMS
XDP_TDO_R
SM_RCOMP0
XDP_DBRESET#
XDP_TRST#
XDP_TDI_R
XDP_TCLK
XDP_PRDY#
SM_RCOMP2
XDP_PREQ#
SM_RCOMP1
XDP_DBRESET#_R
CLK_XDP
CLK_XDP#
XDP_OBS4
XDP_OBS5
XDP_OBS6
XDP_OBS7
CFD_PWRBTN#_XDP
CFG1
CFG2
CFG0
CFG3
CFG4
CFG5
CFG6
CFG7
XDP_TMS
XDP_PREQ#
XDP_PRDY#
XDP_DBRESET#
XDP_TDO
XDP_TRST#
XDP_TDI
XDP_TCLK
H_CPUPWRGD
XDP_OBS0
XDP_OBS1
XDP_OBS2
XDP_OBS3
CFG0
H_CPUPWRGD_XDP
XDP_RST#_RXDP_HOOK2
DDR_XDP_SMBDAT_R1
DDR_XDP_SMBCLK_R1
XDP_OBS2
XDP_OBS3XDP_OBS3_R
XDP_OBS5_R
XDP_OBS2_R
XDP_OBS1_R
XDP_OBS0_R
XDP_OBS4_R XDP_OBS4
XDP_OBS7
XDP_OBS5
XDP_OBS6_R
XDP_OBS7_R XDP_OBS6
XDP_OBS0
XDP_OBS1
DDR_HVREF_RST
VCCPWRGOOD_0_R
H_PM_SYNC
H_CATERR#
H_PROCHOT#_R
H_THERMTRIP#_R
PM_DRAM_PWRGD_CPU
VCCPWRGOOD_0_R
H_CATERR#
H_PROCHOT#
H_THERMTRIP#
CPU_DMI
CPU_DMI#
CPU_DPLL
CPU_DPLL#
DDR3_DRAMRST#_CPU
XDP_DBRESET#
XDP_TCLK
XDP_TMS
XDP_TRST#
XDP_TDO
XDP_TDI
XDP_PREQ#
SYS_PWROK_XDP
SYS_PWROK_XDP
CLK_XDP
CLK_XDP#
SM_RCOMP0
SM_RCOMP2
SM_RCOMP1
XDP_TDIXDP_TDI_R
XDP_TDO_R XDP_TDO
PCH_PLTRST#_R
PCH_PLTRST#_R
PCH_PLTRST#_BUF
CFG11
CFG10 CFG9
CFG8
CFG16
CFG17
XDP_RST#_R
RUNPWROK_AND PM_DRAM_PWRGD_CPU
+1.05V_RUN_VTT
+1.05V_RUN_VTT +1.05V_RUN_VTT
+1.05V_RUN_VTT
+1.05V_RUN_VTT
+1.05V_RUN_VTT
+3.3V_RUN
+3.3V_ALW_PCH
+3.3V_RUN
+3.3V_ALW_PCH
+1.5V_CPU_VDDQ
+3.3V_ALW_PCH
+1.05V_RUN_VTT
XDP_DBRESET# <14,16>
SIO_PWRBTN#_R<14,16>
CFG0 <9>
CFG1 <9>
CFG2 <9>
CFG3 <9>
CFG4 <9>
CFG5 <9>
CFG6 <9>
CFG7 <9>
DDR3_DRAMRST# <12>
H_THERMTRIP#<22>
H_CPUPWRGD<18>
H_PM_SYNC<16>
CPU_DETECT#<40>
H_PROCHOT#<41,60,62>
CLK_CPU_DMI <15>
SYS_PWROK<16,40>
PECI_EC<41>
CLK_CPU_ITP <15>
CLK_CPU_ITP# <15>
CLK_XDP_ITP<9>
CLK_XDP_ITP#<9>
DDR_XDP_WAN_SMBCLK<12,13,14,15,28,35> DDR_XDP_WAN_SMBDAT<12,13,14,15,28,35>
PCH_PLTRST#<14,17>
CFG11<9> CFG10<9> CFG9 <9>
CFG8 <9>
CFG16 <9>
CFG17 <9>
DDR_HVREF_RST_GATE<41>
DDR_HVREF_RST_PCH<15>
PLTRST_XDP# <17>
RUN_ON_CPU1.5VS3#<11,43>
RUNPWROK<40,41>
PM_DRAM_PWRGD<16>
CLK_CPU_DMI# <15>H_SNB_IVB#<18>
DDR_HVREF_RST <12>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
Ivy Bridge (1/6)
7 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
Ivy Bridge (1/6)
7 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
Ivy Bridge (1/6)
7 66Friday, June 10, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Place near JXDP1
For ESD concern, please put near CPU
Avoid stub in the PWRGD path
while placing resistors RC25 & RC130
place RC129 near CPU
PU/PD for JTAG signals
The resistor for HOOK2 should beplaced
such that the stub is very small on CFG0 net
Buffered reset to CPU
Close to JCPU1
Max 500mils
Follow DG Rev0.71 SM_DRAMPWROK topology
Open drain buffer
SM_RCOMP2 --> 15mil
SM_RCOMP1/0 --> 20mil
VR1 TOPOLOGY
Follow check list 0.5
M3 control
INTEL suggest RC64 and QC1 NO stuff by default
Remove DPLL Ref clock (for eDP only)
RC47 0_0402_5%~D@RC47 0_0402_5%~D@1 2
RC25 0_0402_5%~DRC25 0_0402_5%~D
1 2
RC50
4.99K_0402_1%~D
RC50
4.99K_0402_1%~D
12
RC45
200_0402_1%~D
RC45
200_0402_1%~D
12
RH107 0_0402_5%~DRH107 0_0402_5%~D
1 2
RC126 56_0402_5%~D@RC126 56_0402_5%~D@1 2
RC64
39_0402_5%~D
@RC64
39_0402_5%~D
@
1 2
RC10 43_0402_5%~DRC10 43_0402_5%~D
1 2
RC23 0_0402_5%~DRC23 0_0402_5%~D
1 2
RC42
140_0402_1%~D
RC42
140_0402_1%~D
12
RC19 1K_0402_1%~DRC19 1K_0402_1%~D
12
RC130
10K_0402_5%~D
RC130
10K_0402_5%~D
12
G
D
S
QC2
BSS138W-7-F_SOT323-3~D
G
D
S
QC2
BSS138W-7-F_SOT323-3~D
2
13
RC32 51_0402_1%~D@RC32 51_0402_1%~D@12
RC128 49.9_0402_1%~D@RC128 49.9_0402_1%~D@1 2
RC28 130_0402_1%~DRC28 130_0402_1%~D
1 2
RC16 1K_0402_1%~DRC16 1K_0402_1%~D
1 2
RC6 0_0402_5%~DRC6 0_0402_5%~D
1 2
RC30 0_0402_5%~DRC30 0_0402_5%~D
1 2
CC140
0.1U_0402_25V6K~D
CC140
0.1U_0402_25V6K~D
1
2
RC57 56_0402_5%~DRC57 56_0402_5%~D
1 2
RC17 1K_0402_1%~DRC17 1K_0402_1%~D
1 2
CC66
0.1U_0402_25V6K~D
CC66
0.1U_0402_25V6K~D
1
2
RC124
1K_0402_1%~D
@RC124
1K_0402_1%~D
@
12
RC18 200_0402_1%~DRC18 200_0402_1%~D
1 2
RC24 0_0402_5%~DRC24 0_0402_5%~D
1 2
RC5 1K_0402_1%~DRC5 1K_0402_1%~D
1 2
RC127 0_0402_5%~DRC127 0_0402_5%~D
1 2
RC4
75_0402_1%~D
RC4
75_0402_1%~D
12
RC129 0_0402_5%~DRC129 0_0402_5%~D
1 2
CC177
0.047U_0402_16V4Z~D
CC177
0.047U_0402_16V4Z~D
1
2
CC65
0.1U_0402_25V6K~D
CC65
0.1U_0402_25V6K~D
1
2
RC31 0_0402_5%~DRC31 0_0402_5%~D
1 2
CC156 0.1U_0402_25V6K~DCC156 0.1U_0402_25V6K~D
1 2
RC8 1K_0402_1%~DRC8 1K_0402_1%~D
12
RC13 0_0402_5%~DRC13 0_0402_5%~D
1 2
UC1
SN74LVC1G07DCKR_SC70-5~D
UC1
SN74LVC1G07DCKR_SC70-5~D
NC
1
A
2
GND
3Y4
VCC 5
RC33 0_0402_5%~DRC33 0_0402_5%~D
1 2
RC34 0_0402_5%~DRC34 0_0402_5%~D
1 2
G
D
S
QC1
SSM3K7002FU_SC70-3~D
@
G
D
S
QC1
SSM3K7002FU_SC70-3~D
@
2
13
RH106 0_0402_5%~DRH106 0_0402_5%~D
1 2
UC2
74AHC1G09GW_TSSOP5~D
UC2
74AHC1G09GW_TSSOP5~D
B
1
A
2
G
3
O4
P5
RC27 51_0402_1%~DRC27 51_0402_1%~D
12
RC125 0_0402_5%~DRC125 0_0402_5%~D
1 2
RC7 1K_0402_1%~DRC7 1K_0402_1%~D
1 2
RC26 0_0402_5%~DRC26 0_0402_5%~D
12
RC36 0_0402_5%~DRC36 0_0402_5%~D
1 2
RC48 0_0402_5%~D@RC48 0_0402_5%~D@1 2
RC41 51_0402_1%~D
RC41 51_0402_1%~D
12
RH109 0_0402_5%~D@RH109 0_0402_5%~D@1 2
JXDP1
SAMTE_BSH-030-01-L-D-A CONN@
JXDP1
SAMTE_BSH-030-01-L-D-A CONN@
GND0
1
OBSFN_A0
3
OBSFN_A1
5
GND2
7
OBSDATA_A0
9
OBSDATA_A1
11
GND4
13
OBSDATA_A2
15
OBSDATA_A3
17
GND6
19
OBSFN_B0
21
OBSFN_B1
23
GND8
25
OBSDATA_B0
27
OBSDATA_B1
29
GND10
31
OBSDATA_B2
33
OBSDATA_B3
35
GND12
37
PWRGOOD/HOOK0
39
HOOK1
41
VCC_OBS_AB
43
HOOK2
45
HOOK3
47
GND14
49
SDA
51
SCL
53
TCK1
55
TCK0
57
GND16
59
GND1 2
OBSFN_C0 4
OBSFN_C1 6
GND3 8
OBSDATA_C0 10
OBSDATA_C1 12
GND5 14
OBSDATA_C2 16
OBSDATA_C3 18
GND7 20
OBSFN_D0 22
OBSFN_D1 24
GND9 26
OBSDATA_D0 28
OBSDATA_D1 30
GND11 32
OBSDATA_D2 34
OBSDATA_D3 36
GND13 38
ITPCLK/HOOK4 40
ITPCLK#/HOOK5 42
VCC_OBS_CD 44
RESET#/HOOK6 46
DBR#/HOOK7 48
GND15 50
TD0 52
TRST# 54
TDI 56
TMS 58
GND17 60
RC44 62_0402_5%~DRC44 62_0402_5%~D
1 2
RC37 0_0402_5%~DRC37 0_0402_5%~D
1 2
RC43
25.5_0402_1%~D
RC43
25.5_0402_1%~D
12
RC35 51_0402_1%~DRC35 51_0402_1%~D
12
RC38 0_0402_5%~DRC38 0_0402_5%~D
1 2
RC9 0_0402_5%~D@RC9 0_0402_5%~D@1 2
RC29 51_0402_1%~DRC29 51_0402_1%~D
12
RH108 0_0402_5%~D@RH108 0_0402_5%~D@1 2
RC40 51_0402_1%~D
RC40 51_0402_1%~D
12
RC15 0_0402_5%~DRC15 0_0402_5%~D
1 2
RC12
200_0402_1%~D
RC12
200_0402_1%~D
12
RC39 0_0402_5%~DRC39 0_0402_5%~D
1 2
CLOCKS
MISCTHERMALPWR MANAGEMENT
DDR3
MISC
JTAG & BPM
JCPU1B
TYCO_2013620-3_IVYBRIDGE
CLOCKS
MISCTHERMALPWR MANAGEMENT
DDR3
MISC
JTAG & BPM
JCPU1B
TYCO_2013620-3_IVYBRIDGE
SM_RCOMP[1] A5
SM_RCOMP[2] A4
SM_DRAMRST# R8
SM_RCOMP[0] AK1
BCLK# A27
BCLK A28
DPLL_REF_CLK# A15
DPLL_REF_CLK A16
CATERR#
AL33
PECI
AN33
PROCHOT#
AL32
THERMTRIP#
AN32
SM_DRAMPWROK
V8
RESET#
AR33
PRDY# AP29
PREQ# AP27
TCK AR26
TMS AR27
TRST# AP30
TDI AR28
TDO AP26
DBR# AL35
BPM#[0] AT28
BPM#[1] AR29
BPM#[2] AR30
BPM#[3] AT30
BPM#[4] AP32
BPM#[5] AR31
BPM#[6] AT31
BPM#[7] AR32
PM_SYNC
AM34
SKTOCC#
AN34
PROC_SELECT#
C26
UNCOREPWRGOOD
AP33
RC46 0_0402_5%~DRC46 0_0402_5%~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_D59
DDR_A_D31
DDR_A_D9
DDR_A_BS1
DDR_A_D50
DDR_A_D42
DDR_A_D29
DDR_A_D51
DDR_A_D46
DDR_A_D36
DDR_A_D18
DDR_A_D4
DDR_A_D58
DDR_A_D55
DDR_A_D14
DDR_A_D24
DDR_A_D8
DDR_A_D63
DDR_A_D49
DDR_A_D41
DDR_A_D34
DDR_A_D28
DDR_A_D25
DDR_A_D35
DDR_A_D17
DDR_A_D13
DDR_A_D3
DDR_A_RAS#
DDR_A_D57
DDR_A_D54
DDR_A_D22
DDR_A_D21
DDR_A_D6
DDR_A_D23
DDR_A_D7
DDR_A_BS2
DDR_A_D62
DDR_A_D48
DDR_A_D40
DDR_A_D33
DDR_A_D27
DDR_A_WE#
DDR_A_D44
DDR_A_D16
DDR_A_D12
DDR_A_D2
DDR_A_CAS#
DDR_A_D56
DDR_A_D53
DDR_A_D45
DDR_A_D38
DDR_A_D20
DDR_A_D60
DDR_A_D5
DDR_A_D61
DDR_A_D47
DDR_A_D39
DDR_A_D32
DDR_A_D26
DDR_A_D10
DDR_A_D0
DDR_A_BS0
DDR_A_D43
DDR_A_D15
DDR_A_D11
DDR_A_D1
DDR_A_D52
DDR_A_D37
DDR_A_D30
DDR_A_D19
DDR_B_D29
DDR_B_RAS#
DDR_B_D59
DDR_B_D50
DDR_B_D49
DDR_B_D13
DDR_B_D11
DDR_B_D19
DDR_B_D14
DDR_B_D3
DDR_B_D55
DDR_B_D47
DDR_B_WE#
DDR_B_BS2
DDR_B_D52
DDR_B_D44
DDR_B_D41
DDR_B_D8
DDR_B_D5
DDR_B_CAS#
DDR_B_D56
DDR_B_D48
DDR_B_D38
DDR_B_D35
DDR_B_D26
DDR_B_D25
DDR_B_D4
DDR_B_D63
DDR_B_D34
DDR_B_D32
DDR_B_D10
DDR_B_BS1
DDR_B_D17
DDR_B_D51
DDR_B_D40
DDR_B_D36
DDR_B_D31
DDR_B_D21
DDR_B_D20
DDR_B_D15
DDR_B_D7
DDR_B_D62
DDR_B_D46
DDR_B_D42
DDR_B_D18
DDR_B_D12
DDR_B_D1
DDR_B_D53
DDR_B_D37
DDR_B_D22
DDR_B_D57
DDR_B_D27
DDR_B_D54
DDR_B_D45
DDR_B_D39
DDR_B_D30
DDR_B_D9
DDR_B_D60
DDR_B_D58
DDR_B_D33
DDR_B_D0
DDR_B_D61
DDR_B_D43
DDR_B_D28
DDR_B_D23
DDR_B_D24
DDR_B_D16
DDR_B_D6
DDR_B_D2
DDR_B_BS0
M_CLK_DDR#0
M_CLK_DDR#1
DDR_CKE0_DIMMA
DDR_A_DQS7
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS5
DDR_A_DQS#5
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS#7
DDR_A_DQS0
DDR_A_DQS6
DDR_A_DQS#2
DDR_A_DQS#1
DDR_A_DQS#0
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#6
DDR_A_MA0
DDR_A_MA1
DDR_A_MA3
DDR_A_MA7
DDR_A_MA8
DDR_A_MA13
DDR_A_MA2
DDR_A_MA14
DDR_A_MA5
DDR_A_MA10
DDR_A_MA4
DDR_A_MA11
DDR_A_MA9
DDR_A_MA6
DDR_A_MA12
M_CLK_DDR1
M_CLK_DDR0
DDR_A_MA15
DDR_CS1_DIMMA#
DDR_CS0_DIMMA#
DDR_CKE1_DIMMA
M_ODT1
M_ODT0
M_CLK_DDR3
M_CLK_DDR#2
M_CLK_DDR#3
DDR_B_MA10
DDR_B_MA9
DDR_B_MA14
DDR_B_MA5
DDR_B_MA13
DDR_B_MA11
DDR_B_MA7
DDR_B_MA2
DDR_B_MA0
DDR_B_MA6
DDR_B_MA1
DDR_B_MA12
DDR_B_MA4
DDR_B_MA8
DDR_B_MA3
DDR_B_DQS3
DDR_B_DQS2
DDR_B_DQS7
DDR_B_DQS4
DDR_B_DQS1
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS0
DDR_B_DQS#3
DDR_B_DQS#6
DDR_B_DQS#1
M_CLK_DDR2
DDR_B_DQS#2
DDR_B_DQS#0
DDR_B_DQS#5
DDR_B_DQS#7
DDR_B_DQS#4
M_ODT2
DDR_CKE2_DIMMB
DDR_B_MA15
DDR_CKE3_DIMMB
M_ODT3
DDR_CS2_DIMMB#
DDR_CS3_DIMMB#
DDR_A_D[0..63]<12>
DDR_A_BS0<12> DDR_A_BS1<12> DDR_A_BS2<12>
DDR_A_WE#<12>
DDR_A_CAS#<12> DDR_A_RAS#<12>
DDR_B_D[0..63]<13>
DDR_B_BS2<13> DDR_B_BS1<13>
DDR_B_WE#<13>
DDR_B_CAS#<13> DDR_B_RAS#<13>
DDR_B_BS0<13>
DDR_A_DQS[0..7] <12>
DDR_A_DQS#[0..7] <12>
DDR_A_MA[0..15] <12>
DDR_CKE1_DIMMA <12>
DDR_CKE0_DIMMA <12>
DDR_CS0_DIMMA# <12>
M_ODT0 <12>
DDR_CS1_DIMMA# <12>
M_ODT1 <12>
M_CLK_DDR1 <12>
M_CLK_DDR0 <12>
M_CLK_DDR#1 <12>
M_CLK_DDR#0 <12>
DDR_B_MA[0..15] <13>
DDR_B_DQS#[0..7] <13>
DDR_B_DQS[0..7] <13>
DDR_CS3_DIMMB# <13>
DDR_CS2_DIMMB# <13>
M_ODT3 <13>
DDR_CKE3_DIMMB <13>
DDR_CKE2_DIMMB <13>
M_ODT2 <13>
M_CLK_DDR#2 <13>
M_CLK_DDR2 <13>
M_CLK_DDR#3 <13>
M_CLK_DDR3 <13>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
Ivy Bridge (1/6)
8 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
Ivy Bridge (1/6)
8 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
Ivy Bridge (1/6)
8 66Friday, June 10, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DDR SYSTEM MEMORY A
JCPU1C
TYCO_2013620-3_IVYBRIDGE
DDR SYSTEM MEMORY A
JCPU1C
TYCO_2013620-3_IVYBRIDGE
SA_BS[0]
AE10
SA_BS[1]
AF10
SA_BS[2]
V6
SA_CAS#
AE8
SA_RAS#
AD9
SA_WE#
AF9
SA_CK[0] AB6
SA_CK[1] AA5
SA_CLK#[0] AA6
SA_CLK#[1] AB5
SA_CKE[0] V9
SA_CKE[1] V10
SA_CS#[0] AK3
SA_CS#[1] AL3
SA_ODT[0] AH3
SA_ODT[1] AG3
SA_DQS[0] D4
SA_DQS#[0] C4
SA_DQS[1] F6
SA_DQS#[1] G6
SA_DQS[2] K3
SA_DQS#[2] J3
SA_DQS[3] N6
SA_DQS#[3] M6
SA_DQS[4] AL5
SA_DQS#[4] AL6
SA_DQS[5] AM9
SA_DQS#[5] AM8
SA_DQS[6] AR11
SA_DQS#[6] AR12
SA_DQS[7] AM14
SA_DQS#[7] AM15
SA_MA[0] AD10
SA_MA[1] W1
SA_MA[2] W2
SA_MA[3] W7
SA_MA[4] V3
SA_MA[5] V2
SA_MA[6] W3
SA_MA[7] W6
SA_MA[8] V1
SA_MA[9] W5
SA_MA[10] AD8
SA_MA[11] V4
SA_MA[12] W4
SA_MA[13] AF8
SA_MA[14] V5
SA_MA[15] V7
SA_DQ[0]
C5
SA_DQ[1]
D5
SA_DQ[2]
D3
SA_DQ[3]
D2
SA_DQ[4]
D6
SA_DQ[5]
C6
SA_DQ[6]
C2
SA_DQ[7]
C3
SA_DQ[8]
F10
SA_DQ[9]
F8
SA_DQ[10]
G10
SA_DQ[11]
G9
SA_DQ[12]
F9
SA_DQ[13]
F7
SA_DQ[14]
G8
SA_DQ[15]
G7
SA_DQ[16]
K4
SA_DQ[17]
K5
SA_DQ[18]
K1
SA_DQ[19]
J1
SA_DQ[20]
J5
SA_DQ[21]
J4
SA_DQ[22]
J2
SA_DQ[23]
K2
SA_DQ[24]
M8
SA_DQ[25]
N10
SA_DQ[26]
N8
SA_DQ[27]
N7
SA_DQ[28]
M10
SA_DQ[29]
M9
SA_DQ[30]
N9
SA_DQ[31]
M7
SA_DQ[32]
AG6
SA_DQ[33]
AG5
SA_DQ[34]
AK6
SA_DQ[35]
AK5
SA_DQ[36]
AH5
SA_DQ[37]
AH6
SA_DQ[38]
AJ5
SA_DQ[39]
AJ6
SA_DQ[40]
AJ8
SA_DQ[41]
AK8
SA_DQ[42]
AJ9
SA_DQ[43]
AK9
SA_DQ[44]
AH8
SA_DQ[45]
AH9
SA_DQ[46]
AL9
SA_DQ[47]
AL8
SA_DQ[48]
AP11
SA_DQ[49]
AN11
SA_DQ[50]
AL12
SA_DQ[51]
AM12
SA_DQ[52]
AM11
SA_DQ[53]
AL11
SA_DQ[54]
AP12
SA_DQ[55]
AN12
SA_DQ[56]
AJ14
SA_DQ[57]
AH14
SA_DQ[58]
AL15
SA_DQ[59]
AK15
SA_DQ[60]
AL14
SA_DQ[61]
AK14
SA_DQ[62]
AJ15
SA_DQ[63]
AH15
SA_CK[2] AB4
SA_CLK#[2] AA4
SA_CK[3] AB3
SA_CLK#[3] AA3
SA_CKE[2] W9
SA_CKE[3] W10
SA_CS#[2] AG1
SA_CS#[3] AH1
SA_ODT[2] AG2
SA_ODT[3] AH2
DDR SYSTEM MEMORY B
JCPU1D
TYCO_2013620-3_IVYBRIDGE
DDR SYSTEM MEMORY B
JCPU1D
TYCO_2013620-3_IVYBRIDGE
SB_BS[0]
AA9
SB_BS[1]
AA7
SB_BS[2]
R6
SB_CAS#
AA10
SB_RAS#
AB8
SB_WE#
AB9
SB_CK[0] AE2
SB_CK[1] AE1
SB_CLK#[0] AD2
SB_CLK#[1] AD1
SB_CKE[0] R9
SB_CKE[1] R10
SB_ODT[0] AE4
SB_ODT[1] AD4
SB_DQS[4] AN6
SB_DQS#[4] AN5
SB_DQS[5] AP8
SB_DQS#[5] AP9
SB_DQS[6] AK11
SB_DQS#[6] AK12
SB_DQS[7] AP14
SB_DQS#[7] AP15
SB_DQS[0] C7
SB_DQS#[0] D7
SB_DQS[1] G3
SB_DQS#[1] F3
SB_DQS[2] J6
SB_DQS#[2] K6
SB_DQS[3] M3
SB_DQS#[3] N3
SB_MA[0] AA8
SB_MA[1] T7
SB_MA[2] R7
SB_MA[3] T6
SB_MA[4] T2
SB_MA[5] T4
SB_MA[6] T3
SB_MA[7] R2
SB_MA[8] T5
SB_MA[9] R3
SB_MA[10] AB7
SB_MA[11] R1
SB_MA[12] T1
SB_MA[13] AB10
SB_MA[14] R5
SB_MA[15] R4
SB_DQ[0]
C9
SB_DQ[1]
A7
SB_DQ[2]
D10
SB_DQ[3]
C8
SB_DQ[4]
A9
SB_DQ[5]
A8
SB_DQ[6]
D9
SB_DQ[7]
D8
SB_DQ[8]
G4
SB_DQ[9]
F4
SB_DQ[10]
F1
SB_DQ[11]
G1
SB_DQ[12]
G5
SB_DQ[13]
F5
SB_DQ[14]
F2
SB_DQ[15]
G2
SB_DQ[16]
J7
SB_DQ[17]
J8
SB_DQ[18]
K10
SB_DQ[19]
K9
SB_DQ[20]
J9
SB_DQ[21]
J10
SB_DQ[22]
K8
SB_DQ[23]
K7
SB_DQ[24]
M5
SB_DQ[25]
N4
SB_DQ[26]
N2
SB_DQ[27]
N1
SB_DQ[28]
M4
SB_DQ[29]
N5
SB_DQ[30]
M2
SB_DQ[31]
M1
SB_DQ[32]
AM5
SB_DQ[33]
AM6
SB_DQ[34]
AR3
SB_DQ[35]
AP3
SB_DQ[36]
AN3
SB_DQ[37]
AN2
SB_DQ[38]
AN1
SB_DQ[39]
AP2
SB_DQ[40]
AP5
SB_DQ[41]
AN9
SB_DQ[42]
AT5
SB_DQ[43]
AT6
SB_DQ[44]
AP6
SB_DQ[45]
AN8
SB_DQ[46]
AR6
SB_DQ[47]
AR5
SB_DQ[48]
AR9
SB_DQ[49]
AJ11
SB_DQ[50]
AT8
SB_DQ[51]
AT9
SB_DQ[52]
AH11
SB_DQ[53]
AR8
SB_DQ[54]
AJ12
SB_DQ[55]
AH12
SB_DQ[56]
AT11
SB_DQ[57]
AN14
SB_DQ[58]
AR14
SB_DQ[59]
AT14
SB_DQ[60]
AT12
SB_DQ[61]
AN15
SB_DQ[62]
AR15
SB_DQ[63]
AT15
SB_CK[2] AB2
SB_CLK#[2] AA2
SB_CKE[2] T9
SB_CK[3] AA1
SB_CLK#[3] AB1
SB_CKE[3] T10
SB_CS#[0] AD3
SB_CS#[1] AE3
SB_CS#[2] AD6
SB_CS#[3] AE6
SB_ODT[2] AD5
SB_ODT[3] AE5
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CFG10
CFG11
CFG13
CFG14
CFG15
CFG16
CFG17
CFG12
CFG1
CFG2
CFG0
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
VCC_VAL_SNESE
VSS_VAL_SNESE
VAXG_VAL_SENSE
VSSAXG_VAL_SENSE
CFG4
CFG6
CFG5
CFG2
CFG7
VSSAXG_VAL_SENSE
VAXG_VAL_SENSE
VCC_VAL_SNESE
VSS_VAL_SNESE
+VCC_CORE
+VCC_GFXCORE
CFG0<7> CFG1<7> CFG2<7> CFG3<7> CFG4<7> CFG5<7> CFG6<7> CFG7<7> CFG8<7> CFG9<7> CFG10<7> CFG11<7>
CFG17<7> CFG16<7>
CLK_XDP_ITP <7>
CLK_XDP_ITP# <7>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
Ivy Bridge (1/6)
9 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
Ivy Bridge (1/6)
9 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
Ivy Bridge (1/6)
9 66Friday, June 10, 2011
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
10: x8, x8 - Device 1 function 1 enabled ; function 2
disabled
PCIE Port Bifurcation Straps
CFG[6:5]
11: (Default) x16 - Device 1 functions 1 and 2 disabled
CFG7
PEG DEFER TRAINING
0: PEG Wait for BIOS for training
1: (Default) PEG Train immediately
following xxRESETB de assertion
CFG4
Display Port Presence Strap
0 : Enabled; An external Display Port device is
connected to the Embedded Display Port
1 : Disabled; No Physical Display Port
attached to Embedded Display Port
CFG Straps for Processor
01: Reserved - (Device 1 function 1 disabled ; function
2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
PEG Static Lane Reversal - CFG2 is for the 16x
CFG2
0:Lane Reversed
1:(Default) Normal Operation; Lane #
definition matches socket pin map definition
T33PAD~D @T33PAD~D @
T27 PAD~D@T27 PAD~D@
T42PAD~D @T42PAD~D @
T23 PAD~D@T23 PAD~D@
T11 PAD~D@T11 PAD~D@
T17 PAD~D@T17 PAD~D@
RESERVED
CFG
JCPU1E
TYCO_2013620-3_IVYBRIDGE
RESERVED
CFG
JCPU1E
TYCO_2013620-3_IVYBRIDGE
CFG[0]
AK28
CFG[1]
AK29
CFG[2]
AL26
CFG[3]
AL27
CFG[4]
AK26
CFG[5]
AL29
CFG[6]
AL30
CFG[7]
AM31
CFG[8]
AM32
CFG[9]
AM30
CFG[10]
AM28
CFG[11]
AM26
CFG[12]
AN28
CFG[13]
AN31
CFG[14]
AN26
CFG[15]
AM27
CFG[16]
AK31
CFG[17]
AN29
RSVD34 AM33
RSVD35 AJ27
RSVD38 J16
RSVD_NCTF2 AT34
RSVD39 H16
RSVD40 G16
RSVD_NCTF1 AR35
RSVD_NCTF3 AT33
RSVD_NCTF5 AR34
RSVD_NCTF11 AT2
RSVD_NCTF12 AT1
RSVD_NCTF13 AR1
RSVD_NCTF6 B34
RSVD_NCTF7 A33
RSVD_NCTF8 A34
RSVD_NCTF9 B35
RSVD_NCTF10 C35
RSVD51 AJ32
RSVD52 AK32
RSVD27
J15
RSVD16
C30 RSVD15
D23
RSVD17
A31
RSVD18
B30
RSVD20
D30 RSVD19
B29
RSVD22
A30 RSVD21
B31
RSVD23
C29
RSVD37 T8
RSVD8
F25
RSVD9
F24
RSVD11
D24
RSVD12
G25
RSVD13
G24
RSVD14
E23
RSVD32 W8
RSVD33 AT26
RSVD_NCTF4 AP35
RSVD10
F23
RSVD5
AJ26
VAXG_VAL_SENSE
AJ31
VSSAXG_VAL_SENSE
AH31
VCC_VAL_SENSE
AJ33
VSS_VAL_SENSE
AH33
KEY B1
VCC_DIE_SENSE AH27
BCLK_ITP AN35
BCLK_ITP# AM35
VSS_DIE_SENSE AH26
RSVD31 AK2
RSVD30 AE7
RSVD29 AG7
RSVD28 L7
RSVD24
J20
RSVD25
B18
RC53
1K_0402_1%~D
@RC53
1K_0402_1%~D
@
12
T47PAD~D @T47PAD~D @
T36PAD~D @T36PAD~D @
T40PAD~D @T40PAD~D @
T31PAD~D @T31PAD~D @
T37PAD~D @T37PAD~D @
RC69
100_0402_1%~D
@RC69
100_0402_1%~D
@
12
T8 PAD~D@T8 PAD~D@
T6 PAD~D@T6 PAD~D@
T18 PAD~D@T18 PAD~D@
T34 PAD~D@T34 PAD~D@
RC121 49.9_0402_1%~D@RC121 49.9_0402_1%~D@1 2
T24 PAD~D@T24 PAD~D@
RC54
1K_0402_1%~D
@RC54
1K_0402_1%~D
@
12
T21 PAD~D@T21 PAD~D@
T48PAD~D @T48PAD~D @
T46PAD~D @T46PAD~D @
T41PAD~D @T41PAD~D @
T26 PAD~D@T26 PAD~D@
RC51
1K_0402_1%~D
@RC51
1K_0402_1%~D
@
12
T45PAD~D @T45PAD~D @
T19 PAD~D@T19 PAD~D@
T16 PAD~D@T16 PAD~D@
T50 PAD~D@T50 PAD~D@
T20 PAD~D@T20 PAD~D@
RC123 49.9_0402_1%~D@RC123 49.9_0402_1%~D@1 2
RC122 49.9_0402_1%~D@RC122 49.9_0402_1%~D@1 2
T35PAD~D @T35PAD~D @
RC120 49.9_0402_1%~D@RC120 49.9_0402_1%~D@1 2
T14 PAD~D@T14 PAD~D@
RC71
100_0402_1%~D
@RC71
100_0402_1%~D
@
12
T39 PAD~D@T39 PAD~D@
T2 PAD~D@T2 PAD~D@
T43PAD~D @T43PAD~D @T32 PAD~D@T32 PAD~D@
T3 PAD~D@T3 PAD~D@
T25 PAD~D@T25 PAD~D@
T12 PAD~D@T12 PAD~D@
T53 PAD~D@T53 PAD~D@
T1 PAD~D@T1 PAD~D@
RC56
1K_0402_1%~D
@RC56
1K_0402_1%~D
@
12
T30PAD~D @T30PAD~D @
T4 PAD~D@T4 PAD~D@
T38PAD~D @T38PAD~D @
T5 PAD~D@T5 PAD~D@
T7 PAD~D@T7 PAD~D@
T22PAD~D @T22PAD~D @
T9 PAD~D@T9 PAD~D@
T15 PAD~D@T15 PAD~D@
T29PAD~D @T29PAD~D @
T44PAD~D @T44PAD~D @
T28PAD~D @T28PAD~D @
T10 PAD~D@T10 PAD~D@
T49 PAD~D@T49 PAD~D@
T51 PAD~D@T51 PAD~D@
T52PAD~D @T52PAD~D @
T13 PAD~D@T13 PAD~D@
RC52
1K_0402_1%~D
@RC52
1K_0402_1%~D
@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VCCSENSE_R
VSSSENSE_R
VSSIO_SENSE_R
H_CPU_SVIDALRT#
VIDSOUT
H_CPU_SVIDALRT#
VIDSCLK
VTT_SENSE
+VCC_CORE
+VCC_CORE
+1.05V_RUN_VTT
+1.05V_RUN_VTT
+1.05V_RUN_VTT
+1.05V_RUN_VTT
VSSSENSE <60>
VCCSENSE <60>
VTT_SENSE <58>
VIDALERT_N <60>
VIDSCLK <60> VIDSOUT <60>
VSSIO_SENSE_R <58>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
Ivy Bridge (1/6)
10 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
Ivy Bridge (1/6)
10 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
Ivy Bridge (1/6)
10 66Friday, June 10, 2011
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
8.5A
CPU Power Rail Table
1.5
0.65-0.9
VCC
VCCIO
VAXG
VCCPLL
VDDQ
VCCSA
Voltage Rail
0.65-1.3
1.05
1.8
53
8.5
26
3
12-16
6
0.0-1.1
Voltage
S0 Iccmax
Current (A)
5A to Mem controller(+1.5V_CPU_VDDQ)
5-6A to 2 DIMMs/channel
2-5A to +1.5V_RUN & +0.75V_DDR_VTT
*
*
Description
5
+1.5V_MEM 1.5
Iccmax current changed for PDDG Rev0.7
Note: Place the PU resistors close to CPU
RC61 close to CPU 300 - 1500mils
CAD Note: Place the PU
resistors close to CPU
RC63 close to CPU 300 - 1500mils
DELL CONFIDENTIAL/PROPRIETARY
94A
H_CPU_SVIDALRT# must be routed between the
VIDSOUT and VIDSCLK lines to reduce cross
talk. 18 mils spacing to others.
Place RC66, RC70, RC75 near CPU
RC98 10_0402_1%~DRC98 10_0402_1%~D
12
RC70
100_0402_1%~D
RC70
100_0402_1%~D
12
RC66
100_0402_1%~D
RC66
100_0402_1%~D
12
RC61 43_0402_5%~DRC61 43_0402_5%~D
1 2
RC63
130_0402_1%~D
RC63
130_0402_1%~D
12
POWER
CORE SUPPLY
PEG AND DDR
SENSE LINES SVID
JCPU1F
TYCO_2013620-3_IVYBRIDGE
POWER
CORE SUPPLY
PEG AND DDR
SENSE LINES SVID
JCPU1F
TYCO_2013620-3_IVYBRIDGE
VCC_SENSE AJ35
VSS_SENSE AJ34
VIDALERT# AJ29
VIDSCLK AJ30
VIDSOUT AJ28
VSS_SENSE_VCCIO A10
VCC1
AG35
VCC2
AG34
VCC3
AG33
VCC4
AG32
VCC5
AG31
VCC6
AG30
VCC7
AG29
VCC8
AG28
VCC9
AG27
VCC10
AG26
VCC11
AF35
VCC12
AF34
VCC13
AF33
VCC14
AF32
VCC15
AF31
VCC16
AF30
VCC17
AF29
VCC18
AF28
VCC19
AF27
VCC20
AF26
VCC21
AD35
VCC22
AD34
VCC23
AD33
VCC24
AD32
VCC25
AD31
VCC26
AD30
VCC27
AD29
VCC28
AD28
VCC29
AD27
VCC30
AD26
VCC31
AC35
VCC32
AC34
VCC33
AC33
VCC34
AC32
VCC35
AC31
VCC36
AC30
VCC37
AC29
VCC38
AC28
VCC39
AC27
VCC40
AC26
VCC41
AA35
VCC42
AA34
VCC43
AA33
VCC44
AA32
VCC45
AA31
VCC46
AA30
VCC47
AA29
VCC48
AA28
VCC49
AA27
VCC50
AA26
VCC51
Y35
VCC52
Y34
VCC53
Y33
VCC54
Y32
VCC55
Y31
VCC56
Y30
VCC57
Y29
VCC58
Y28
VCC59
Y27
VCC60
Y26
VCC61
V35
VCC62
V34
VCC63
V33
VCC64
V32
VCC65
V31
VCC66
V30
VCC67
V29
VCC68
V28
VCC69
V27
VCC70
V26
VCC71
U35
VCC72
U34
VCC73
U33
VCC74
U32
VCC75
U31
VCC76
U30
VCC77
U29
VCC78
U28
VCC79
U27
VCC80
U26
VCC81
R35
VCC82
R34
VCC83
R33
VCC84
R32
VCC85
R31
VCC86
R30
VCC87
R29
VCC88
R28
VCC89
R27
VCC90
R26
VCC91
P35
VCC92
P34
VCC93
P33
VCC94
P32
VCC95
P31
VCC96
P30
VCC97
P29
VCC98
P28
VCC99
P27
VCC100
P26
VCCIO1 AH13
VCCIO12 J11
VCCIO18 G12
VCCIO19 F14
VCCIO20 F13
VCCIO21 F12
VCCIO22 F11
VCCIO23 E14
VCCIO24 E12
VCCIO2 AH10
VCCIO3 AG10
VCCIO4 AC10
VCCIO5 Y10
VCCIO6 U10
VCCIO7 P10
VCCIO8 L10
VCCIO9 J14
VCCIO10 J13
VCCIO11 J12
VCCIO13 H14
VCCIO14 H12
VCCIO15 H11
VCCIO16 G14
VCCIO17 G13
VCCIO25 E11
VCCIO32 C12
VCCIO33 C11
VCCIO34 B14
VCCIO35 B12
VCCIO36 A14
VCCIO37 A13
VCCIO38 A12
VCCIO39 A11
VCCIO26 D14
VCCIO27 D13
VCCIO28 D12
VCCIO29 D11
VCCIO30 C14
VCCIO31 C13
VCCIO_SENSE B10
VCCIO40 J23
RC133
10_0402_1%~D
RC133
10_0402_1%~D
12
RC60
75_0402_1%~D
RC60
75_0402_1%~D
12
RC67 0_0402_5%~DRC67 0_0402_5%~D
1 2
RC68 0_0402_5%~DRC68 0_0402_5%~D
1 2
RC75
100_0402_1%~D
@RC75
100_0402_1%~D
@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+DIMM0_1_VREF_CPU
+DIMM0_1_CA_CPU
+DIMM0_1_CA_CPU
+DIMM0_1_VREF_CPU
RUN_ON_CPU1.5VS3#
RUN_ON_CPU1.5VS3
RUN_ON_CPU1.5VS3
+1.5V_MEM +1.5V_CPU_VDDQ
+3.3V_ALW2
+1.5V_MEM
+VCC_GFXCORE
+1.8V_RUN
+1.5V_CPU_VDDQ
+V_SM_VREF_CNT
+VCC_SA
+DIMM0_1_VREF_CPU
+DIMM0_1_CA_CPU
+V_DDR_SMREF
+V_SM_VREF_CNT
+1.5V_MEM
+PWR_SRC_S
+1.5V_CPU_VDDQ
+VCC_GFXCORE
CPU1.5V_S3_GATE<41>
RUN_ON_CPU1.5VS3# <7,43>
VCC_AXG_SENSE <60>
VSS_AXG_SENSE <60>
VCCSA_SENSE <59>
VCCSA_VID_1 <59>
VCCSA_VID_0 <59>
VCCP_PWRCTRL <58>
SIO_SLP_S3#<16,28,36,40,43,56>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
Ivy Bridge (1/6)
11 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
Ivy Bridge (1/6)
11 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
Ivy Bridge (1/6)
11 66Friday, June 10, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+1.5V_CPU_VDDQ Source
46A
5A
1.5A
6A
+V_SM_VREF should
have 10 mil trace width
added VCCSA_VID_0 to Power page
6A
CC168
10U_0603_6.3V6M~D
@
CC168
10U_0603_6.3V6M~D
@
1
2
CC175
1U_0402_6.3V6K~D
CC175
1U_0402_6.3V6K~D
1
2
CC170
10U_0603_6.3V6M~D
CC170
10U_0603_6.3V6M~D
1
2
RC76
100_0402_1%~D
@RC76
100_0402_1%~D
@
1 2
RC73
20K_0402_5%~D
@
RC73
20K_0402_5%~D
@
12
RC99
10_0402_1%~D
RC99
10_0402_1%~D
12
VSS
JCPU1H
TYCO_2013620-3_IVYBRIDGE
VSS
JCPU1H
TYCO_2013620-3_IVYBRIDGE
VSS1
AT35
VSS2
AT32
VSS3
AT29
VSS4
AT27
VSS5
AT25
VSS6
AT22
VSS7
AT19
VSS8
AT16
VSS9
AT13
VSS10
AT10
VSS11
AT7
VSS12
AT4
VSS13
AT3
VSS14
AR25
VSS15
AR22
VSS16
AR19
VSS17
AR16
VSS18
AR13
VSS19
AR10
VSS20
AR7
VSS21
AR4
VSS22
AR2
VSS23
AP34
VSS24
AP31
VSS25
AP28
VSS26
AP25
VSS27
AP22
VSS28
AP19
VSS29
AP16
VSS30
AP13
VSS31
AP10
VSS32
AP7
VSS33
AP4
VSS34
AP1
VSS35
AN30
VSS36
AN27
VSS37
AN25
VSS38
AN22
VSS39
AN19
VSS40
AN16
VSS41
AN13
VSS42
AN10
VSS43
AN7
VSS44
AN4
VSS45
AM29
VSS46
AM25
VSS47
AM22
VSS48
AM19
VSS49
AM16
VSS50
AM13
VSS51
AM10
VSS52
AM7
VSS53
AM4
VSS54
AM3
VSS55
AM2
VSS56
AM1
VSS57
AL34
VSS58
AL31
VSS59
AL28
VSS60
AL25
VSS61
AL22
VSS62
AL19
VSS63
AL16
VSS64
AL13
VSS65
AL10
VSS66
AL7
VSS67
AL4
VSS68
AL2
VSS69
AK33
VSS70
AK30
VSS71
AK27
VSS72
AK25
VSS73
AK22
VSS74
AK19
VSS75
AK16
VSS76
AK13
VSS77
AK10
VSS78
AK7
VSS79
AK4
VSS80
AJ25
VSS81 AJ22
VSS82 AJ19
VSS83 AJ16
VSS84 AJ13
VSS85 AJ10
VSS86 AJ7
VSS87 AJ4
VSS88 AJ3
VSS89 AJ2
VSS90 AJ1
VSS91 AH35
VSS92 AH34
VSS93 AH32
VSS94 AH30
VSS95 AH29
VSS96 AH28
VSS98 AH25
VSS99 AH22
VSS100 AH19
VSS101 AH16
VSS102 AH7
VSS103 AH4
VSS104 AG9
VSS105 AG8
VSS106 AG4
VSS107 AF6
VSS108 AF5
VSS109 AF3
VSS110 AF2
VSS111 AE35
VSS112 AE34
VSS113 AE33
VSS114 AE32
VSS115 AE31
VSS116 AE30
VSS117 AE29
VSS118 AE28
VSS119 AE27
VSS120 AE26
VSS121 AE9
VSS122 AD7
VSS123 AC9
VSS124 AC8
VSS125 AC6
VSS126 AC5
VSS127 AC3
VSS128 AC2
VSS129 AB35
VSS130 AB34
VSS131 AB33
VSS132 AB32
VSS133 AB31
VSS134 AB30
VSS135 AB29
VSS136 AB28
VSS137 AB27
VSS138 AB26
VSS139 Y9
VSS140 Y8
VSS141 Y6
VSS142 Y5
VSS143 Y3
VSS144 Y2
VSS145 W35
VSS146 W34
VSS147 W33
VSS148 W32
VSS149 W31
VSS150 W30
VSS151 W29
VSS152 W28
VSS153 W27
VSS154 W26
VSS155 U9
VSS156 U8
VSS157 U6
VSS158 U5
VSS159 U3
VSS160 U2
RC82 0_0402_5%~DRC82 0_0402_5%~D
1 2
+
CC167
330U_D2_2VM_R6M~D
+
CC167
330U_D2_2VM_R6M~D
1
2
RC78
1K_0402_1%~D
RC78
1K_0402_1%~D
12
RC84
1K_0402_1%~D
RC84
1K_0402_1%~D
12
RC97 1K_0402_1%~D@RC97 1K_0402_1%~D@1 2
+
CC172
330U_D2_2VM_R6M~D
+
CC172
330U_D2_2VM_R6M~D
1
2
RC74
100K_0402_5%~D
RC74
100K_0402_5%~D
12
QC3
AO4728L_SO8~D
QC3
AO4728L_SO8~D
4
7
8
6
5
1
2
3
RC96 1K_0402_1%~D@RC96 1K_0402_1%~D@1 2
QC4B
DMN66D0LDW-7_SOT363-6~D
QC4B
DMN66D0LDW-7_SOT363-6~D
3
5
4
RC134 0_0402_5%~D@RC134 0_0402_5%~D@1 2
RC80
1K_0402_1%~D
@
RC80
1K_0402_1%~D
@
12
CC174
1U_0402_6.3V6K~D
CC174
1U_0402_6.3V6K~D
1
2
RC79 0_0402_5%~D@RC79 0_0402_5%~D@1 2
CC179 0.1U_0402_10V7K~DCC179 0.1U_0402_10V7K~D
12
CC171
10U_0603_6.3V6M~D
CC171
10U_0603_6.3V6M~D
1
2
CC169
10U_0603_6.3V6M~D
CC169
10U_0603_6.3V6M~D
1
2
CC162
10U_0402_6.3V6M
CC162
10U_0402_6.3V6M
1
2
QC4A
DMN66D0LDW-7_SOT363-6~D
QC4A
DMN66D0LDW-7_SOT363-6~D
61
2
CC149 0.1U_0402_10V7K~DCC149 0.1U_0402_10V7K~D
12
CC163
10U_0402_6.3V6M
CC163
10U_0402_6.3V6M
1
2
CC136
0.1U_0603_50V7K~D
CC136
0.1U_0603_50V7K~D
1
2
RC100
10_0402_1%~D
RC100
10_0402_1%~D
12
QC5
NTR4503NT1G_SOT23-3~D
@QC5
NTR4503NT1G_SOT23-3~D
@
1
2
3
CC135
10U_0603_6.3V6M~D
CC135
10U_0603_6.3V6M~D
1
2
CC178 0.1U_0402_10V7K~DCC178 0.1U_0402_10V7K~D
12
CC166
10U_0402_6.3V6M
CC166
10U_0402_6.3V6M
1
2
RC140 0_0402_5%~DRC140 0_0402_5%~D
1 2
POWER
GRAPHICS
DDR3 -1.5V RAILS SENSE
LINES
1.8V RAIL
SA RAIL
VREFMISC
JCPU1G
TYCO_2013620-3_IVYBRIDGE
POWER
GRAPHICS
DDR3 -1.5V RAILS SENSE
LINES
1.8V RAIL
SA RAIL
VREFMISC
JCPU1G
TYCO_2013620-3_IVYBRIDGE
SM_VREF AL1
VSSAXG_SENSE AK34
VAXG_SENSE AK35
VAXG1
AT24
VAXG2
AT23
VAXG3
AT21
VAXG4
AT20
VAXG5
AT18
VAXG6
AT17
VAXG7
AR24
VAXG8
AR23
VAXG9
AR21
VAXG10
AR20
VAXG11
AR18
VAXG12
AR17
VAXG13
AP24
VAXG14
AP23
VAXG15
AP21
VAXG16
AP20
VAXG17
AP18
VAXG18
AP17
VAXG19
AN24
VAXG20
AN23
VAXG21
AN21
VAXG22
AN20
VAXG23
AN18
VAXG24
AN17
VAXG25
AM24
VAXG26
AM23
VAXG27
AM21
VAXG28
AM20
VAXG29
AM18
VAXG30
AM17
VAXG31
AL24
VAXG32
AL23
VAXG33
AL21
VAXG34
AL20
VAXG35
AL18
VAXG36
AL17
VAXG37
AK24
VAXG38
AK23
VAXG39
AK21
VAXG40
AK20
VAXG41
AK18
VAXG42
AK17
VAXG43
AJ24
VAXG44
AJ23
VAXG45
AJ21
VAXG46
AJ20
VAXG47
AJ18
VAXG48
AJ17
VAXG49
AH24
VAXG50
AH23
VAXG51
AH21
VAXG52
AH20
VAXG53
AH18
VAXG54
AH17
VDDQ11 U4
VDDQ12 U1
VDDQ13 P7
VDDQ14 P4
VDDQ15 P1
VDDQ1 AF7
VDDQ2 AF4
VDDQ3 AF1
VDDQ4 AC7
VDDQ5 AC4
VDDQ6 AC1
VDDQ7 Y7
VDDQ8 Y4
VDDQ9 Y1
VDDQ10 U7
VCCPLL1
B6
VCCPLL2
A6
VCCSA1 M27
VCCSA2 M26
VCCSA3 L26
VCCSA4 J26
VCCSA5 J25
VCCSA6 J24
VCCSA7 H26
VCCSA8 H25
VCCSA_SENSE H23
VCCSA_VID[1] C24
VCCPLL3
A2 VCCSA_VID[0] C22
SA_DIMM_VREFDQ B4
SB_DIMM_VREFDQ D1
VCCIO_SEL A19
CC150 0.1U_0402_10V7K~DCC150 0.1U_0402_10V7K~D
12
RC143
330K_0402_1%~D
RC143
330K_0402_1%~D
12
CC164
10U_0402_6.3V6M
CC164
10U_0402_6.3V6M
1
2
RC72
100K_0402_5%~D
RC72
100K_0402_5%~D
12
CC165
10U_0402_6.3V6M
CC165
10U_0402_6.3V6M
1
2
+
CC176
330U_D2_2.5VM_R6M~D
+
CC176
330U_D2_2.5VM_R6M~D
1
2
CC173
10U_0603_6.3V6M~D
CC173
10U_0603_6.3V6M~D
1
2
CC161
10U_0402_6.3V6M
CC161
10U_0402_6.3V6M
1
2
RC81
1K_0402_1%~D
@
RC81
1K_0402_1%~D
@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D10
DDR_A_D11
DDR_A_D18
DDR_A_D19
DDR_A_D21
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D32
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D45
DDR_A_D46
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_MA2
DDR_A_MA0DDR_A_MA1
DDR_A_MA3
DDR_A_MA4DDR_A_MA5 DDR_A_MA6DDR_A_MA8
DDR_A_MA7DDR_A_MA9
DDR_A_MA10
DDR_A_MA11DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
DDR_A_BS0 DDR_A_BS1
DDR_A_BS2
DDR_CS1_DIMMA#
DDR_CS0_DIMMA#
M_CLK_DDR0
M_CLK_DDR#0 M_CLK_DDR1
M_CLK_DDR#1
DDR_CKE0_DIMMA DDR_CKE1_DIMMA
DDR_A_CAS#
DDR_A_RAS#
DDR_A_WE# M_ODT0
M_ODT1
DDR_A_D63
DDR_A_MA15
DDR_A_D23
DDR_A_D31
DDR_A_D17
DDR_A_D9 DDR_A_D13
DDR_A_D20DDR_A_D16
DDR_A_D25
DDR_A_D30
DDR_A_D24
DDR_A_D14
DDR_A_D15
DDR_A_D12
DDR_A_D22
DDR_A_D39
DDR_A_D54
DDR_A_D33
DDR_A_D38
DDR_A_D47
DDR_A_D44
DDR_A_D48
DDR3_DRAMRST#_R DDR3_DRAMRST#_R
DDR_HVREF_RST
DDR_HVREF_RST
+0.75V_DDR_VTT
+1.5V_MEM
+1.5V_MEM+1.5V_MEM
+3.3V_RUN
+0.75V_DDR_VTT
+0.75V_DDR_VTT
+DIMM1_VREF_CA
+1.5V_MEM
+V_DDR_REF
+1.5V_MEM
+DIMM1_VREF_DQ
+DIMM0_1_VREF_CPU
+DIMM0_1_CA_CPU
+V_DDR_REFA_M3
+V_DDR_REFB_M3
+V_DDR_REFA_M3
+V_DDR_REF
DDR_A_D[0..63]<8>
DDR_A_DQS[0..7]<8>
DDR_A_MA[0..15]<8>
DDR_A_DQS#[0..7]<8>
DDR_CKE0_DIMMA<8>
DDR_A_BS2<8>
DDR_CS1_DIMMA#<8>
DDR_A_WE#<8>DDR_A_CAS#<8>
DDR_A_BS0<8> DDR_A_BS1 <8>
M_ODT0 <8>
DDR_A_RAS# <8>
M_CLK_DDR1 <8>
M_CLK_DDR#1 <8>M_CLK_DDR#0<8> M_CLK_DDR0<8>
DDR_CKE1_DIMMA <8>
DDR_CS0_DIMMA# <8>
M_ODT1 <8>
DDR3_DRAMRST# <7>DDR3_DRAMRST#_R<13>
DDR_XDP_WAN_SMBCLK <7,13,14,15,28,35>
DDR_XDP_WAN_SMBDAT <7,13,14,15,28,35>
DDR_HVREF_RST<7>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
DDRIII-SODIMM SLOT1
12 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
DDRIII-SODIMM SLOT1
12 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
DDRIII-SODIMM SLOT1
12 66Friday, June 10, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Layout Note:
Place near JDIMM1
Layout Note:
Place near JDIMM1.203,204
Populate RD1, De-Populate RD7 for Intel DDR3
VREFDQ multiple methods M1
Populate RD7, De-Populate RD1 for Intel DDR3
VREFDQ multiple methods M3
JDIMM1 H=5.2
All VREF traces should
have 10 mil trace width
2-3A to 1 DIMMs/channel
M3 Circuit (Processor Generated SO-DIMM VREF_DQ)
CD8
10U_0603_6.3V6M~D
CD8
10U_0603_6.3V6M~D
1
2
CD21
0.1U_0402_25V6K~D
CD21
0.1U_0402_25V6K~D
1
2
CD18
1U_0402_6.3V6K~D
CD18
1U_0402_6.3V6K~D
1
2
CD11
10U_0603_6.3V6M~D
CD11
10U_0603_6.3V6M~D
1
2
RD30 0_0402_5%~D@RD30 0_0402_5%~D@1 2
CD16
0.1U_0402_25V6K~D
CD16
0.1U_0402_25V6K~D
1
2
JDIMM1
TYCO_2-2013289-2~D
CONN@JDIMM1
TYCO_2-2013289-2~D
CONN@
VREF_DQ
1
VSS
3
DQ0
5
DQ1
7
VSS
9
DM0
11
VSS
13
DQ2
15
DQ3
17
VSS
19
DQ8
21
DQ9
23
VSS
25
DQS1#
27
DQS1
29
VSS
31
DQ10
33
DQ11
35
VSS
37
DQ16
39
DQ17
41
VSS
43
DQS2#
45
DQS2
47
VSS
49
DQ18
51
DQ19
53
VSS
55
DQ24
57
DQ25
59
VSS
61
DM3
63
VSS
65
DQ26
67
DQ27
69
VSS
71
CKE0
73
VDD
75
NC
77
BA2
79
VDD
81
A12/BC#
83
A9
85
VDD
87
A8
89
A5
91
VDD
93
A3
95
A1
97
VDD
99
CK0
101
CK0#
103
VDD
105
A10/AP
107
BA0
109
VDD
111
WE#
113
CAS#
115
VDD
117
A13
119
S1#
121
VDD
123
TEST
125
VSS
127
DQ32
129
DQ33
131
VSS
133
DQS4#
135
DQS4
137
VSS
139
DQ34
141
DQ35
143
VSS 2
DQ4 4
DQ5 6
VSS 8
DQS0# 10
DQS0 12
VSS 14
DQ6 16
DQ7 18
VSS 20
DQ12 22
DQ13 24
VSS 26
DM1 28
RESET# 30
VSS 32
DQ14 34
DQ15 36
VSS 38
DQ20 40
DQ21 42
VSS 44
DM2 46
VSS 48
DQ22 50
DQ23 52
VSS 54
DQ28 56
DQ29 58
VSS 60
DQS3# 62
DQS3 64
VSS 66
DQ30 68
DQ31 70
VSS 72
CKE1 74
VDD 76
A15 78
A14 80
VDD 82
A11 84
A7 86
VDD 88
A6 90
A4 92
VDD 94
A2 96
A0 98
VDD 100
CK1 102
CK1# 104
VDD 106
BA1 108
RAS# 110
VDD 112
S0# 114
ODT0 116
VDD 118
ODT1 120
NC 122
VDD 124
VREF_CA 126
VSS 128
DQ36 130
DQ37 132
VSS 134
DM4 136
VSS 138
DQ38 140
DQ39 142
VSS 144
VSS
145
DQ40
147
DQ41
149
VSS
151
DM5
153
VSS
155
DQ42
157
DQ43
159
VSS
161
DQ48
163
DQ49
165
VSS
167
DQS6#
169
DQS6
171
VSS
173
DQ50
175
DQ51
177
VSS
179
DQ56
181
DQ57
183
VSS
185
DM7
187
VSS
189
DQ58
191
DQ59
193
VSS
195
SA0
197
VDDSPD
199
DQ44 146
DQ45 148
VSS 150
DQS5# 152
DQS5 154
VSS 156
DQ46 158
DQ47 160
VSS 162
DQ52 164
DQ53 166
VSS 168
DM6 170
VSS 172
DQ54 174
DQ55 176
VSS 178
DQ60 180
DQ61 182
VSS 184
DQS7# 186
DQS7 188
VSS 190
DQ62 192
DQ63 194
VSS 196
EVENT# 198
SDA 200
SA1
201 SCL 202
VTT
203 VTT 204
GND1
205 GND2 206
CD15
2.2U_0603_6.3V6K~D
CD15
2.2U_0603_6.3V6K~D
1
2
CD22
2.2U_0603_6.3V6K~D
CD22
2.2U_0603_6.3V6K~D
1
2
CD13
10U_0603_6.3V6M~D
@CD13
10U_0603_6.3V6M~D
@
1
2
RD1 0_0402_5%~DRD1 0_0402_5%~D
1 2
G
D
S
QD2
BSS138_NL_SOT23-3
G
D
S
QD2
BSS138_NL_SOT23-3
2
13
CD1
2.2U_0603_6.3V6K~D
CD1
2.2U_0603_6.3V6K~D
1
2RD27
1K_0402_1%~D
RD27
1K_0402_1%~D
12
CD19
1U_0402_6.3V6K~D
CD19
1U_0402_6.3V6K~D
1
2
CD6
1U_0402_6.3V6K~D
CD6
1U_0402_6.3V6K~D
1
2
CD20
1U_0402_6.3V6K~D
CD20
1U_0402_6.3V6K~D
1
2
CD10
10U_0603_6.3V6M~D
CD10
10U_0603_6.3V6M~D
1
2
G
D
S
QD1
BSS138_NL_SOT23-3
G
D
S
QD1
BSS138_NL_SOT23-3
2
13
CD4
1U_0402_6.3V6K~D
CD4
1U_0402_6.3V6K~D
1
2
+
CD14
330U_SX_2VY~D
+
CD14
330U_SX_2VY~D
1
2
CD3
1U_0402_6.3V6K~D
CD3
1U_0402_6.3V6K~D
1
2
RD11 0_0402_5%~DRD11 0_0402_5%~D
12
CD7
10U_0603_6.3V6M~D
CD7
10U_0603_6.3V6M~D
1
2
RD28 1K_0402_1%~DRD28 1K_0402_1%~D
1 2
CD5
1U_0402_6.3V6K~D
CD5
1U_0402_6.3V6K~D
1
2
RD29 0_0402_5%~D@RD29 0_0402_5%~D@1 2
CD17
1U_0402_6.3V6K~D
CD17
1U_0402_6.3V6K~D
1
2
CD2
0.1U_0402_25V6K~D
CD2
0.1U_0402_25V6K~D
1
2
CD9
10U_0603_6.3V6M~D
CD9
10U_0603_6.3V6M~D
1
2
CD51
10U_0603_6.3V6M~D
CD51
10U_0603_6.3V6M~D
1
2
RD3 10K_0402_5%~DRD3 10K_0402_5%~D
1 2
RD2 10K_0402_5%~DRD2 10K_0402_5%~D
1 2
RD7 0_0402_5%~DRD7 0_0402_5%~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_B_MA7
DDR_B_D22
DDR_B_D19
DDR_B_D20
DDR_B_D62
DDR_B_D59
DDR_CS3_DIMMB#
DDR_B_BS0
DDR_B_D27
DDR_B_D8
DDR_B_D52
M_ODT2
DDR_B_MA14
DDR_B_D57
DDR_B_DQS6
DDR_B_D43
DDR_B_DQS4
DDR_B_BS2
DDR_B_DQS#2
DDR3_DRAMRST#_R
DDR_B_D37
DDR_B_D36
DDR_B_MA6
DDR_B_D23
DDR_B_D21
DDR_B_D41
DDR_B_MA3
DDR_B_D24
DDR_B_D63
DDR_B_D44
DDR_B_DQS#3
DDR_B_D40
DDR_CKE2_DIMMB
DDR_B_D5
DDR_B_DQS1
DDR_B_D9
DDR_B_D54
DDR_B_D53
DDR_B_D46
DDR_CKE3_DIMMB
DDR_B_D50
DDR_B_D48
DDR_B_D14
DDR_B_D61
DDR_B_MA4
DDR_B_MA1
DDR_B_D45
DDR_B_D38
DDR_B_BS1
DDR_B_DQS3
DDR_B_WE#
DDR_B_D7
DDR_B_D6
DDR_B_D10
DDR_B_DQS#1
DDR_B_D55
DDR_B_D47
M_ODT3
DDR_B_D49
DDR_B_MA12
DDR_B_D15
DDR_B_D2
DDR_B_D0
M_CLK_DDR3
DDR_B_D28
DDR_B_DQS2
DDR_B_D4
DDR_B_RAS#
DDR_B_D34
DDR_B_D32
DDR_B_CAS#
DDR_B_D11
DDR_B_DQS#6
DDR_B_MA8
DDR_B_D25
DDR_B_D1
DDR_B_DQS7
DDR_B_DQS#7
M_CLK_DDR#3
DDR_B_MA2
DDR_B_MA15
DDR_B_D29
DDR_B_DQS#5
DDR_B_MA11
DDR_B_D30
DDR_B_D51
DDR_B_D35
DDR_B_D33
M_CLK_DDR2
DDR_B_D12
DDR_B_DQS#0
DDR_B_D16
DDR_B_D60
DDR_B_MA5
DDR_B_D18
DDR_B_D39
DDR_B_MA0
DDR_B_D58
DDR_B_MA10
DDR_B_D26
DDR_B_D3
DDR_B_DQS5
DDR_CS2_DIMMB#
DDR_B_D31
DDR_B_D56
DDR_B_D42
DDR_B_DQS#4
DDR_B_MA13
M_CLK_DDR#2
DDR_B_MA9
DDR_B_D17
DDR_B_D13
DDR_B_DQS0
+1.5V_MEM
+0.75V_DDR_VTT
+3.3V_RUN
+3.3V_RUN
+1.5V_MEM
+0.75V_DDR_VTT
+1.5V_MEM
+DIMM2_VREF_CA
+1.5V_MEM
+0.75V_DDR_VTT
+DIMM2_VREF_DQ
+V_DDR_REFB_M3
+V_DDR_REF
+V_DDR_REF
DDR_B_D[0..63]<8>
DDR_B_DQS[0..7]<8>
DDR_B_MA[0..15]<8>
DDR_B_DQS#[0..7]<8>
DDR_B_CAS#<8>
DDR_CKE3_DIMMB <8>
DDR_B_WE#<8>
DDR_CKE2_DIMMB<8>
DDR_B_BS0<8> DDR_B_RAS# <8>
DDR_B_BS1 <8>
DDR_B_BS2<8>
M_ODT2 <8>
DDR_CS3_DIMMB#<8>
DDR_CS2_DIMMB# <8>
M_CLK_DDR3 <8>
M_CLK_DDR#3 <8>
M_ODT3 <8>
M_CLK_DDR2<8> M_CLK_DDR#2<8>
DDR3_DRAMRST#_R <12>
DDR_XDP_WAN_SMBCLK <7,12,14,15,28,35>
DDR_XDP_WAN_SMBDAT <7,12,14,15,28,35>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
DDRIII-SODIMM SLOT2
13 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
DDRIII-SODIMM SLOT2
13 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
DDRIII-SODIMM SLOT2
13 66Friday, June 10, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Layout Note:
Place near JDIMM2
Layout Note:
Place near JDIMM2.203,204
JDIMM2 H=9.2
All VREF traces should
have 10 mil trace width
2-3A to 1 DIMMs/channel
Populate RD4, De-Populate RD8 for Intel DDR3
VREFDQ multiple methods M1
Populate RD8, De-Populate RD4 for Intel DDR3
VREFDQ multiple methods M3
CD37
2.2U_0603_6.3V6K~D
CD37
2.2U_0603_6.3V6K~D
1
2
RD15 0_0402_5%~DRD15 0_0402_5%~D
12
CD31
10U_0603_6.3V6M~D
CD31
10U_0603_6.3V6M~D
1
2
CD43
0.1U_0402_25V6K~D
CD43
0.1U_0402_25V6K~D
1
2
CD38
0.1U_0402_25V6K~D
CD38
0.1U_0402_25V6K~D
1
2
CD34
10U_0603_6.3V6M~D
CD34
10U_0603_6.3V6M~D
1
2
CD23
2.2U_0603_6.3V6K~D
CD23
2.2U_0603_6.3V6K~D
1
2
CD26
1U_0402_6.3V6K~D
CD26
1U_0402_6.3V6K~D
1
2
JDIMM2
TYCO_2-2013310-2~D
CONN@JDIMM2
TYCO_2-2013310-2~D
CONN@
VREF_DQ
1
VSS
3
DQ0
5
DQ1
7
VSS
9
DM0
11
VSS
13
DQ2
15
DQ3
17
VSS
19
DQ8
21
DQ9
23
VSS
25
DQS1#
27
DQS1
29
VSS
31
DQ10
33
DQ11
35
VSS
37
DQ16
39
DQ17
41
VSS
43
DQS2#
45
DQS2
47
VSS
49
DQ18
51
DQ19
53
VSS
55
DQ24
57
DQ25
59
VSS
61
DM3
63
VSS
65
DQ26
67
DQ27
69
VSS
71
CKE0
73
VDD
75
NC
77
BA2
79
VDD
81
A12/BC#
83
A9
85
VDD
87
A8
89
A5
91
VDD
93
A3
95
A1
97
VDD
99
CK0
101
CK0#
103
VDD
105
A10/AP
107
BA0
109
VDD
111
WE#
113
CAS#
115
VDD
117
A13
119
S1#
121
VDD
123
TEST
125
VSS
127
DQ32
129
DQ33
131
VSS
133
DQS4#
135
DQS4
137
VSS
139
DQ34
141
DQ35
143
VSS 2
DQ4 4
DQ5 6
VSS 8
DQS0# 10
DQS0 12
VSS 14
DQ6 16
DQ7 18
VSS 20
DQ12 22
DQ13 24
VSS 26
DM1 28
RESET# 30
VSS 32
DQ14 34
DQ15 36
VSS 38
DQ20 40
DQ21 42
VSS 44
DM2 46
VSS 48
DQ22 50
DQ23 52
VSS 54
DQ28 56
DQ29 58
VSS 60
DQS3# 62
DQS3 64
VSS 66
DQ30 68
DQ31 70
VSS 72
CKE1 74
VDD 76
A15 78
A14 80
VDD 82
A11 84
A7 86
VDD 88
A6 90
A4 92
VDD 94
A2 96
A0 98
VDD 100
CK1 102
CK1# 104
VDD 106
BA1 108
RAS# 110
VDD 112
S0# 114
ODT0 116
VDD 118
ODT1 120
NC 122
VDD 124
VREF_CA 126
VSS 128
DQ36 130
DQ37 132
VSS 134
DM4 136
VSS 138
DQ38 140
DQ39 142
VSS 144
VSS
145
DQ40
147
DQ41
149
VSS
151
DM5
153
VSS
155
DQ42
157
DQ43
159
VSS
161
DQ48
163
DQ49
165
VSS
167
DQS6#
169
DQS6
171
VSS
173
DQ50
175
DQ51
177
VSS
179
DQ56
181
DQ57
183
VSS
185
DM7
187
VSS
189
DQ58
191
DQ59
193
VSS
195
SA0
197
VDDSPD
199
DQ44 146
DQ45 148
VSS 150
DQS5# 152
DQS5 154
VSS 156
DQ46 158
DQ47 160
VSS 162
DQ52 164
DQ53 166
VSS 168
DM6 170
VSS 172
DQ54 174
DQ55 176
VSS 178
DQ60 180
DQ61 182
VSS 184
DQS7# 186
DQS7 188
VSS 190
DQ62 192
DQ63 194
VSS 196
EVENT# 198
SDA 200
SA1
201 SCL 202
VTT
203 VTT 204
GND1
205 GND2 206
CD27
1U_0402_6.3V6K~D
CD27
1U_0402_6.3V6K~D
1
2
CD24
0.1U_0402_25V6K~D
CD24
0.1U_0402_25V6K~D
1
2
CD42
1U_0402_6.3V6K~D
CD42
1U_0402_6.3V6K~D
1
2
CD28
1U_0402_6.3V6K~D
CD28
1U_0402_6.3V6K~D
1
2
CD41
1U_0402_6.3V6K~D
CD41
1U_0402_6.3V6K~D
1
2
RD8 0_0402_5%~DRD8 0_0402_5%~D
1 2
+
CD36
330U_SX_2VY~D
+
CD36
330U_SX_2VY~D
1
2
RD5 10K_0402_5%~DRD5 10K_0402_5%~D
12
RD4 0_0402_5%~DRD4 0_0402_5%~D
1 2
RD6
10K_0402_5%~D
RD6
10K_0402_5%~D
12
CD44
2.2U_0603_6.3V6K~D
CD44
2.2U_0603_6.3V6K~D
1
2
CD33
10U_0603_6.3V6M~D
CD33
10U_0603_6.3V6M~D
1
2
CD35
10U_0603_6.3V6M~D
@CD35
10U_0603_6.3V6M~D
@
1
2
CD25
1U_0402_6.3V6K~D
CD25
1U_0402_6.3V6K~D
1
2
CD30
10U_0603_6.3V6M~D
CD30
10U_0603_6.3V6M~D
1
2
CD29
10U_0603_6.3V6M~D
CD29
10U_0603_6.3V6M~D
1
2
CD32
10U_0603_6.3V6M~D
CD32
10U_0603_6.3V6M~D
1
2
CD39
1U_0402_6.3V6K~D
CD39
1U_0402_6.3V6K~D
1
2
CD40
1U_0402_6.3V6K~D
CD40
1U_0402_6.3V6K~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCH_AZ_SDOUT
LPC_LDRQ1#
LPC_LDRQ0#
PCH_JTAG_TCK
PCH_AZ_RST#
SATA_COMP
PCH_AZ_BITCLK
SRTCRST#
SATA_ACT#
PCH_RTCRST#
LPC_LAD0
PCH_RTCX2_R
PCH_INTVRMEN
PCH_JTAG_TDI
LPC_LAD3
INTRUDER#
PCH_AZ_SYNC_Q
IRQ_SERIRQ
PCH_JTAG_TMS
PCH_JTAG_TDO
PCH_INTVRMEN
PCH_RTCX2
+3.3V_ALW_PCH_JTAG
LPC_LAD2
LPC_LAD1
PCH_AZ_MDC_SDIN1
LPC_LFRAME#
PCH_AZ_RST#
PCH_AZ_CODEC_SDIN0
PCH_AZ_SDOUT
PCH_AZ_BITCLK
HDD_DET#_R
BBS_BIT0_R
PCH_AZ_SYNC
XDP_FN15
PCH_PWRBTN#_XDP
DDR_XDP_WAN_SMBDAT_R2
DDR_XDP_WAN_SMBCLK_R2
XDP_DBRESET#
PCH_JTAG_TDO
PCH_JTAG_TDI
PCH_JTAG_TMSPCH_JTAG_TCK
RSMRST#_XDP
XDP_FN0
XDP_FN1
XDP_FN2
XDP_FN3
XDP_FN4
XDP_FN5
XDP_FN6
XDP_FN7
XDP_FN16
XDP_FN17
XDP_FN8
XDP_FN9
XDP_FN10
XDP_FN11
XDP_FN12
XDP_FN13
XDP_FN14
USB_OC4#_R
USB_OC2#
USB_OC5#
USB_OC3#
SIO_EXT_SMI#
USB_OC6#
USB_OC0#_R
USB_OC1#_R
XDP_FN8
XDP_FN9
XDP_FN11
XDP_FN10
XDP_FN12
XDP_FN13
XDP_FN14
SLP_ME_CSW_DEV#
XDP_FN15
XDP_FN16
XDP_FN17
USB_MCARD1_DET#
HDD_DET#_R
BBS_BIT0_R
PCH_GPIO37
PCH_GPIO16
TEMP_ALERT#
SIO_EXT_SCI#_R
PCH_GPIO15
XDP_FN2
XDP_FN1
XDP_FN4
XDP_FN6
XDP_FN5
XDP_FN3
XDP_FN0
XDP_FN7
RBIAS_SATA3
SATA3_COMP
SPKR
IRQ_SERIRQ
PCH_SPI_CLK
PCH_SPI_CS1#
PCH_SPI_DIN
PCH_SPI_DO
PCH_GPIO33
1.05V_0.8V_PWROK_R
SPI_CLK64
SPI_DO64
SPI_WP#_SEL SPI_WP#_SEL_R
SPI_PCH_DIN SPI_DIN64
SPI_PCH_DO
SPI_PCH_CLK SPI_PCH_DO
SPI_PCH_CLKSPI_CLK32 SPI_HOLD#
SPI_DO32
PCH_SPI_CS0#
PCH_SPI_DIN
PCH_SPI_CLK
PCH_SPI_DO
PCH_SPI_CS1#
PCH_SPI_CS0#
SPI_PCH_CS1#
SPI_PCH_CLK
SPI_PCH_DIN
SPI_PCH_DO
SPI_PCH_CS0#
RSMRST#_XDP
PCH_GPIO36
PCH_AZ_SYNCPCH_AZ_SYNC_Q
PCH_AZ_SYNC
PCH_RTCX1
PCH_GPIO33
USB30_SMI#
SPI_PCH_CS0# SPI_PCH_CS0#_R
BBS_BIT0_R
PCH_AZ_SYNC_Q
SPI_HOLD#
SPI_WP#_SEL_R
SPI_PCH_DIN SPI_DIN32
SPI_PCH_CS1# SPI_PCH_CS1#_R
+3.3V_ALW_PCH
+RTC_CELL
+3.3V_RUN
+1.05V_RUN
+RTC_CELL
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+1.05V_RUN
+3.3V_RUN
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+3.3V_SPI +3.3V_SPI
+3.3V_M +3.3V_SPI
+3.3V_RUN
+3.3V_ALW_PCH
+5V_RUN
PCH_AZ_MDC_SDIN1<31>
PCH_AZ_MDC_RST#<31>
PCH_AZ_CODEC_SDIN0<30>
PCH_AZ_CODEC_SYNC<30>
PCH_AZ_CODEC_SDOUT<30>
IRQ_SERIRQ <33,40,41>
PCH_AZ_MDC_BITCLK<31>
PCH_AZ_CODEC_RST#<30>
SATA_ACT# <44>
SPKR<30>
HDD_DET# <28>
PCH_AZ_MDC_SYNC<31>
PCH_AZ_MDC_SDOUT<31>
PCH_AZ_CODEC_BITCLK<30>
XDP_DBRESET# <7,16>
SIO_PWRBTN#_R<7,16>
SLP_ME_CSW_DEV#<18,40> USB_MCARD1_DET#<18,35>
PCH_GPIO15<18> TEMP_ALERT#<18,40> PCH_GPIO16<18> PCH_GPIO37<18>
USB_OC3#<17> USB_OC2#<17>
SIO_EXT_SCI#_R<18>
USB_OC6#<17> USB_OC5#<17>
USB_OC4#_R<17>
SIO_EXT_SMI#<17,41>
USB_OC1#_R<17> USB_OC0#_R<17>
PSATA_PRX_DTX_N0_C <28>
PSATA_PTX_DRX_P0_C <28>
PSATA_PTX_DRX_N0_C <28>
PSATA_PRX_DTX_P0_C <28>
SATA_PRX_DKTX_P5_C <39>
SATA_PRX_DKTX_N5_C <39>
SATA_PTX_DKRX_P5_C <39>
SATA_PTX_DKRX_N5_C <39>
ESATA_PTX_DRX_P4_C <38>
ESATA_PRX_DTX_P4_C <38>
ESATA_PRX_DTX_N4_C <38>
ESATA_PTX_DRX_N4_C <38>
SATA_ODD_PRX_DTX_P1_C <29>
SATA_ODD_PTX_DRX_N1_C <29>
SATA_ODD_PTX_DRX_P1_C <29>
SATA_ODD_PRX_DTX_N1_C <29>
PCH_SATA_MOD_EN# <41>
ME_FWP<40>
1.05V_0.8V_PWROK<41,60>
LPC_LAD0 <33,35,40,41>
LPC_LAD1 <33,35,40,41>
LPC_LAD2 <33,35,40,41>
LPC_LAD3 <33,35,40,41>
LPC_LFRAME# <33,35,40,41>
LPC_LDRQ0# <40>
LPC_LDRQ1# <40>
PCH_PLTRST#<7,17>
SPI_WP#_SEL<40>
PCH_RSMRST#_Q<16,42>
PCH_GPIO36<18>
DDR_XDP_WAN_SMBCLK<7,12,13,15,28,35> DDR_XDP_WAN_SMBDAT<7,12,13,15,28,35>
USB30_SMI#<29>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
PCH (1/8)
14 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
PCH (1/8)
14 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
PCH (1/8)
14 66Friday, June 10, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
INTVRMEN- Integrated SUS
1.1V VRM Enable
High - Enable Internal VRs
Low - Enable External VRs
On Die PLL VR is supplied by
1.5V when sampled high, 1.8 V
when sampled low
CMOS place near DIMM
HDD
E-SATA
DOCK
Low = Default
High = No Reboot
SPKR
No Reboot Strap
ODD/ E Module Bay
BBS_BIT0 - BIOS BOOT STRAP BIT 0
CMOS settingCMOS_CLR1
Open
Clear CMOSShunt
ME_CLR1
Keep CMOS
TPM setting
Shunt
Keep ME RTC Registers
Clear ME RTC Registers
Open
PCH_AZ_SYNC is sampled
at the rising edge of RSMRST# pin.
So signal should be PU to the ALWAYS rail.
*
200 MIL SO8
64Mb Flash ROM 16Mb Flash ROM
200 MIL SO8
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Follow INTEL CRB 0.7
INTEL feedback 0302
INTEL HDA_SYNC
isolation circuit
RH32 33_0402_5%~DRH32 33_0402_5%~D
1 2
RH2
10M_0402_5%~D
RH2
10M_0402_5%~D
12
R897 33_0402_5%~DR897 33_0402_5%~D
1 2
RH287 1K_0402_1%~D@RH287 1K_0402_1%~D@
1 2
RH45 200_0402_1%~DRH45 200_0402_1%~D
12
RH23 20K_0402_5%~DRH23 20K_0402_5%~D
1 2
C746
0.1U_0402_25V6K~D
C746
0.1U_0402_25V6K~D
1 2
JXDP2
SAMTE_BSH-030-01-L-D-A CONN@
JXDP2
SAMTE_BSH-030-01-L-D-A CONN@
GND0
1
OBSFN_A0
3
OBSFN_A1
5
GND2
7
OBSDATA_A0
9
OBSDATA_A1
11
GND4
13
OBSDATA_A2
15
OBSDATA_A3
17
GND6
19
OBSFN_B0
21
OBSFN_B1
23
GND8
25
OBSDATA_B0
27
OBSDATA_B1
29
GND10
31
OBSDATA_B2
33
OBSDATA_B3
35
GND12
37
PWRGOOD/HOOK0
39
HOOK1
41
VCC_OBS_AB
43
HOOK2
45
HOOK3
47
GND14
49
SDA
51
SCL
53
TCK1
55
TCK0
57
GND16
59
GND1 2
OBSFN_C0 4
OBSFN_C1 6
GND3 8
OBSDATA_C0 10
OBSDATA_C1 12
GND5 14
OBSDATA_C2 16
OBSDATA_C3 18
GND7 20
OBSFN_D0 22
OBSFN_D1 24
GND9 26
OBSDATA_D0 28
OBSDATA_D1 30
GND11 32
OBSDATA_D2 34
OBSDATA_D3 36
GND13 38
ITPCLK/HOOK4 40
ITPCLK#/HOOK5 42
VCC_OBS_CD 44
RESET#/HOOK6 46
DBR#/HOOK7 48
GND15 50
TD0 52
TRST# 54
TDI 56
TMS 58
GND17 60
RH34 33_0402_5%~DRH34 33_0402_5%~D
1 2
RH4 33_0402_5%~DPXDP@ RH4 33_0402_5%~DPXDP@
1 2
RH13 33_0402_5%~DPXDP@ RH13 33_0402_5%~DPXDP@
1 2
RH349 0_0402_5%~DRH349 0_0402_5%~D
1 2
CMOS1 SHORT PADS~D
@
CMOS1 SHORT PADS~D
@
1
122
RH28 8.2K_0402_5%~DRH28 8.2K_0402_5%~D
12
RH48
100_0402_1%~D
RH48
100_0402_1%~D
12
RH346 0_0402_5%~DRH346 0_0402_5%~D
1 2
RH52 4.7K_0402_5%~DRH52 4.7K_0402_5%~D
12
G
D
S
QH7
SSM3K7002FU_SC70-3~D
G
D
S
QH7
SSM3K7002FU_SC70-3~D
2
13
RH40 37.4_0402_1%~DRH40 37.4_0402_1%~D
1 2
RH47
100_0402_1%~D
RH47
100_0402_1%~D
12
RH8 33_0402_5%~DPXDP@ RH8 33_0402_5%~DPXDP@
1 2
R895 33_0402_5%~DR895 33_0402_5%~D
1 2
RH33 33_0402_5%~DRH33 33_0402_5%~D
1 2
R891
3.3K_0402_5%~D
R891
3.3K_0402_5%~D
12
RH286 0_0402_5%~DRH286 0_0402_5%~D
1 2
RH288
0_0603_5%~D
RH288
0_0603_5%~D
12
RH27 33_0402_5%~DRH27 33_0402_5%~D
1 2
RH19 33_0402_5%~DPXDP@ RH19 33_0402_5%~DPXDP@
1 2
RH10 33_0402_5%~DPXDP@ RH10 33_0402_5%~DPXDP@
1 2
RH11 1M_0402_5%~DRH11 1M_0402_5%~D
1 2
R894 33_0402_5%~DR894 33_0402_5%~D
1 2
RH30
10K_0402_5%~D
RH30
10K_0402_5%~D
12
C745
0.1U_0402_25V6K~D
C745
0.1U_0402_25V6K~D
1 2
RH46 750_0402_1%~DRH46 750_0402_1%~D
1 2
RH43 200_0402_1%~DRH43 200_0402_1%~D
12
RH283 1K_0402_1%~DPXDP@ RH283 1K_0402_1%~DPXDP@
1 2
R899 33_0402_5%~DR899 33_0402_5%~D
1 2
CH5 1U_0402_6.3V6K~DCH5 1U_0402_6.3V6K~D
1 2
RH20 33_0402_5%~DPXDP@ RH20 33_0402_5%~DPXDP@
1 2
RH15 33_0402_5%~DPXDP@ RH15 33_0402_5%~DPXDP@
1 2
CH101
27P_0402_50V8J~D
@CH101
27P_0402_50V8J~D
@
1
2
JSPI1
HRS_FH12-16S-0P5SH(55)~D
CONN@
JSPI1
HRS_FH12-16S-0P5SH(55)~D
CONN@
11
22
33
44
55
66
77
88
99
10 10
11 11
12 12
13 13
14 14
15 15
16 16
G1 17
G2 18
RH49
100_0402_1%~D
RH49
100_0402_1%~D
12
RH1 33_0402_5%~DPXDP@ RH1 33_0402_5%~DPXDP@
1 2
RH350 0_0402_5%~DRH350 0_0402_5%~D
1 2
CH100
27P_0402_50V8J~D
@CH100
27P_0402_50V8J~D
@
12
YH1
32.768KHZ_12.5PF_Q13FC1350000~D
YH1
32.768KHZ_12.5PF_Q13FC1350000~D
12
RH3 33_0402_5%~DPXDP@ RH3 33_0402_5%~DPXDP@
1 2
R901 33_0402_5%~DR901 33_0402_5%~D
1 2
RH35 10K_0402_5%~D@RH35 10K_0402_5%~D@
12
RH347 0_0402_5%~DRH347 0_0402_5%~D
1 2
CH1
0.1U_0402_25V6K~D
PXDP@
CH1
0.1U_0402_25V6K~D
PXDP@
1
2
RH24 1K_0402_1%~DPXDP@ RH24 1K_0402_1%~DPXDP@
1 2
RH9 33_0402_5%~DPXDP@ RH9 33_0402_5%~DPXDP@
1 2
RH36 33_0402_5%~DRH36 33_0402_5%~D
1 2
R890
3.3K_0402_5%~D
R890
3.3K_0402_5%~D
12
RH282
100K_0402_5%~D
@RH282
100K_0402_5%~D
@
12
RH12 33_0402_5%~DPXDP@ RH12 33_0402_5%~DPXDP@
1 2
RH42 49.9_0402_1%~DRH42 49.9_0402_1%~D
1 2
RH17 33_0402_5%~DPXDP@ RH17 33_0402_5%~DPXDP@
1 2
RH59 51_0402_1%~DRH59 51_0402_1%~D
12
RH29 33_0402_5%~DRH29 33_0402_5%~D
1 2
RH14 33_0402_5%~DPXDP@ RH14 33_0402_5%~DPXDP@
1 2
RH285 0_0402_5%~DPXDP@ RH285 0_0402_5%~DPXDP@
1 2
R898 0_0402_5%~D@R898 0_0402_5%~D@
1 2
R900 33_0402_5%~DR900 33_0402_5%~D
1 2
RH6 33_0402_5%~DPXDP@ RH6 33_0402_5%~DPXDP@
1 2
RH25 33_0402_5%~DRH25 33_0402_5%~D
1 2
RH345 0_0402_5%~DRH345 0_0402_5%~D
1 2
R936 47_0402_5%~DR936 47_0402_5%~D
1 2
CH2
15P_0402_50V8J~D
CH2
15P_0402_50V8J~D
12
R935 47_0402_5%~DR935 47_0402_5%~D
1 2
U52
W25Q64CVSSIG_SO8~D
U52
W25Q64CVSSIG_SO8~D
CLK 6
GND
4DIO 5
DO
2
/WP
3
VCC 8
/HOLD 7
/CS
1
RH26 33_0402_5%~DRH26 33_0402_5%~D
1 2
RH21 0_0402_5%~DPXDP@ RH21 0_0402_5%~DPXDP@
1 2
RH7 33_0402_5%~DPXDP@ RH7 33_0402_5%~DPXDP@
1 2
CH4 1U_0402_6.3V6K~D
CH4 1U_0402_6.3V6K~D
1 2
RH31 1M_0402_5%~DRH31 1M_0402_5%~D
1 2
RH44 200_0402_1%~DRH44 200_0402_1%~D
12
RH348 0_0402_5%~DRH348 0_0402_5%~D
1 2
CH3
15P_0402_50V8J~D
CH3
15P_0402_50V8J~D
12
RTCIHDA
SATA
LPC
SPI JTAG
SATA 6G
UH4A
BD82PPSM-QNHN-A0_BGA989~D
RTCIHDA
SATA
LPC
SPI JTAG
SATA 6G
UH4A
BD82PPSM-QNHN-A0_BGA989~D
RTCX1
A20
RTCX2
C20
INTVRMEN
C17
INTRUDER#
K22
HDA_BCLK
N34
HDA_SYNC
L34
HDA_RST#
K34
HDA_SDIN0
E34
HDA_SDIN1
G34
HDA_SDIN2
C34
HDA_SDO
A36
SATALED# P3
FWH0 / LAD0 C38
FWH1 / LAD1 A38
FWH2 / LAD2 B37
FWH3 / LAD3 C37
LDRQ1# / GPIO23 K36
FWH4 / LFRAME# D36
LDRQ0# E36
RTCRST#
D20
HDA_SDIN3
A34
HDA_DOCK_EN# / GPIO33
C36
HDA_DOCK_RST# / GPIO13
N32
SRTCRST#
G22
SATA0RXN AM3
SATA0RXP AM1
SATA0TXN AP7
SATA0TXP AP5
SATA1RXN AM10
SATA1RXP AM8
SATA1TXN AP11
SATA1TXP AP10
SATA2RXN AD7
SATA2RXP AD5
SATA2TXN AH5
SATA2TXP AH4
SATA3RXN AB8
SATA3RXP AB10
SATA3TXN AF3
SATA3TXP AF1
SATA4RXN Y7
SATA4RXP Y5
SATA4TXN AD3
SATA4TXP AD1
SATA5RXN Y3
SATA5RXP Y1
SATA5TXN AB3
SATA5TXP AB1
SATAICOMPI Y10
SPI_CLK
T3
SPI_CS0#
Y14
SPI_CS1#
T1
SPI_MOSI
V4
SPI_MISO
U3
SATA0GP / GPIO21 V14
SATA1GP / GPIO19 P1
JTAG_TCK
J3
JTAG_TMS
H7
JTAG_TDI
K5
JTAG_TDO
H1
SERIRQ V5
SPKR
T10
SATAICOMPO Y11
SATA3COMPI AB13
SATA3RCOMPO AB12
SATA3RBIAS AH1
RH22 20K_0402_5%~DRH22 20K_0402_5%~D
1 2
RH290 0_0402_5%~DRH290 0_0402_5%~D
1 2
RH5 33_0402_5%~DPXDP@ RH5 33_0402_5%~DPXDP@
1 2
RH284 0_0402_5%~DPXDP@ RH284 0_0402_5%~DPXDP@
1 2
RH50 1K_0402_1%~DRH50 1K_0402_1%~D
1 2
U53
W25Q32BVSSIG_SO8~D
U53
W25Q32BVSSIG_SO8~D
CS#
1
DO
2
WP#
3
GND
4
VCC 8
HOLD# 7
CLK 6
DI 5
RH39
330K_0402_1%~D
@RH39
330K_0402_1%~D
@
12
RH38
330K_0402_1%~D
RH38
330K_0402_1%~D
12
RH16 33_0402_5%~DPXDP@ RH16 33_0402_5%~DPXDP@
1 2
RH18 33_0402_5%~DPXDP@ RH18 33_0402_5%~DPXDP@
1 2
RH355 100K_0402_5%~DRH355 100K_0402_5%~D
12
ME1 SHORT PADS~D
@
ME1 SHORT PADS~D
@
1
122
RH66
1K_0402_1%~D
RH66
1K_0402_1%~D
12
G
D
S
QH1 BSS138W-7-F_SOT323-3~D
G
D
S
QH1 BSS138W-7-F_SOT323-3~D
2
1 3
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SML1_SMBCLK
SML1_SMBDATA
PCH_SMB_ALERT#
MEM_SMBDATA
LAN_SMBCLK
LAN_SMBDATA
XTAL25_IN
PCH_CL_RST1#
SML1_SMBCLK
PCH_CL_CLK1
SML1_SMBDATA
XTAL25_OUT
PCH_CL_DATA1
MEM_SMBCLK
MEM_SMBDATA
MEM_SMBCLK
JETWAY_14M
PCIE_PRX_EXPTX_N3
PCIE_PTX_EXPRX_P3
PCIE_PTX_EXPRX_N3
PCIE_PRX_EXPTX_P3
PCIE_MINI3#
PCIE_MINI3
PCIE_PRX_EMBTX_P4
PCIE_PRX_EMBTX_N4
PCIE_PTX_EMBRX_P4
PCIE_PTX_EMBRX_N4
PCIE_PTX_WLANRX_N2
PCIE_PRX_WLANTX_P2
PCIE_PRX_WLANTX_N2
PCIE_PTX_WLANRX_P2
PCIE_PTX_WANRX_N1
PCIE_PTX_WANRX_P1
PCIE_PRX_WANTX_P1
PCIE_PRX_WANTX_N1
MINI3CLK_REQ#
MINI2CLK_REQ#
PCIE_MINI2
PCIE_MINI2#
PCIE_LAN
PCIE_LAN#
LANCLK_REQ#
PCIE_PTX_WPANRX_N5
PCIE_PRX_WPANTX_P5
PCIE_PRX_WPANTX_N5
PCIE_PTX_WPANRX_P5
PCIE_EXP
PCIE_EXP#
EXPCLK_REQ#
MEM_SMBCLK
MEM_SMBDATA
LAN_SMBCLK
LAN_SMBDATA
PCH_SMB_ALERT#
DDR_HVREF_RST_PCH
XCLK_RCOMP
CLK_CPU_DMI
CLK_CPU_DMI#
PCH_GPIO74
CLK_PCI_LOOPBACK
CLK_BUF_DOT96
CLK_BUF_DOT96#
CLK_BUF_CKSSCD
CLK_BUF_CKSSCD#
CLK_BUF_DMI#
CLK_BUF_BCLK
CLK_BUF_DMI
CLK_BUF_BCLK
CLK_PCH_14M
DDR_HVREF_RST_PCH
PCH_GPIO74
CLK_BUF_CKSSCD
CLK_BUF_DOT96#
CLK_BUF_DOT96
CLK_BUF_CKSSCD#
CLK_BUF_DMI#
CLK_PCH_14M
CLK_BUF_BCLK
CLK_BUF_DMI
PEG_B_CLKRQ#
MINI1CLK_REQ#
PCIE_MINI1#
PCIE_MINI1
PCIE_PRX_GLANTX_P7
PCIE_PRX_GLANTX_N7
PCIE_PTX_GLANRX_N7
PCIE_PTX_GLANRX_P7
PCIE_PRX_MMITX_P6
PCIE_PRX_MMITX_N6
PCIE_PTX_MMIRX_N6
PCIE_PTX_MMIRX_P6
CLK_BCLK_ITP
CLK_BCLK_ITP#
EMBCLK_REQ#
PCI_TPM_TCM
SIO_14M
PCIE_EMB#
PCIE_EMB
PCIE_MMI#
PCIE_MMI
GFX_CLK_REQ#
CLK_PCIE_VGA#
CLK_PCIE_VGA
GFX_CLK_REQ#
MMICLK_REQ#
CLK_80H
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+3.3V_LAN
+3.3V_RUN
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+1.05V_RUN
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+3.3V_RUN
PCH_CL_DATA1 <35>
PCH_CL_CLK1 <35>
PCH_CL_RST1# <35>
SML1_SMBDATA <41>
DDR_XDP_WAN_SMBDAT <7,12,13,14,28,35>
DDR_XDP_WAN_SMBCLK <7,12,13,14,28,35>
PCIE_PRX_WLANTX_P2<35> PCIE_PRX_WLANTX_N2<35>
PCIE_PRX_WANTX_P1<35> PCIE_PRX_WANTX_N1<35>
PCIE_PTX_WLANRX_N2<35> PCIE_PTX_WLANRX_P2<35>
PCIE_PTX_WANRX_P1<35> PCIE_PTX_WANRX_N1<35>
PCIE_PTX_EMBRX_N4<29> PCIE_PRX_EMBTX_P4<29> PCIE_PRX_EMBTX_N4<29>
PCIE_PTX_EMBRX_P4<29>
CLK_PCIE_EXP#<36> CLK_PCIE_EXP<36>
PCIE_PRX_EXPTX_P3<36> PCIE_PRX_EXPTX_N3<36>
EXPCLK_REQ#<36>
PCIE_PTX_EXPRX_P3<36> PCIE_PTX_EXPRX_N3<36>
CLK_PCIE_MINI2<35>
PCIE_PRX_WPANTX_N5<35>
MINI2CLK_REQ#<35>
CLK_PCIE_MINI2#<35>
CLK_PCIE_MINI3#<35>
PCIE_PTX_WPANRX_P5<35> PCIE_PTX_WPANRX_N5<35> PCIE_PRX_WPANTX_P5<35>
MINI3CLK_REQ#<35>
CLK_PCIE_MINI3<35>
CLK_PCIE_LAN#<32>
LANCLK_REQ#<32>
CLK_PCIE_LAN<32>
LAN_SMBDATA <32>
CLK_CPU_DMI# <7>
CLK_CPU_DMI <7>
CLK_PCI_LOOPBACK <17>
JETWAY_CLK14M <33>
CLK_PCIE_MINI1#<35> CLK_PCIE_MINI1<35>
MINI1CLK_REQ#<35>
PCIE_PTX_GLANRX_N7<32> PCIE_PRX_GLANTX_P7<32>
PCIE_PTX_GLANRX_P7<32>
PCIE_PRX_GLANTX_N7<32>
DDR_HVREF_RST_PCH <7>
PCIE_PTX_MMIRX_N6<34> PCIE_PRX_MMITX_P6<34>
PCIE_PTX_MMIRX_P6<34>
PCIE_PRX_MMITX_N6<34>
CLK_CPU_ITP#<7> CLK_CPU_ITP<7>
CLK_PCI_TPM_TCM <33>
CLK_SIO_14M <40>
CLK_PCIE_EMB<29>CLK_PCIE_EMB#<29>
EMBCLK_REQ#<29>
CLK_PCIE_MMI#<34> CLK_PCIE_MMI<34>
LAN_SMBCLK <32>
CLK_PCIE_VGA <45>
CLK_PCIE_VGA# <45>
3.3V_RUN_GFX_ON<40,49>
MMICLK_REQ#<34>
PCLK_80H <35>
SML1_SMBCLK <41>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
PCH (2/8)
15 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
PCH (2/8)
15 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
PCH (2/8)
15 66Friday, June 10, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
EXPRESS Card--->
Express card--->
WLAN (Mini Card 2)--->
WWAN (Mini Card 1)--->
E3 Module Bay--->
WLAN (Mini Card 2)--->
10/100/1G LAN --->
1/2 MINI CARD-3 PCIE
(Mini Card 3)--->
PP (Mini Card 3)--->
WWAN (Mini Card 1)--->
10/100/1G LAN --->
CLOCK TERMINATION for FCIM and need close to PCH
MMI --->
eModule Bay--->
PCIE REQ power rail:
suspend: 0 3 4 5 6 7
core: 1 2
MMI --->
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
RH76 10K_0402_5%~DRH76 10K_0402_5%~D
1 2
RH314 22_0402_5%~DRH314 22_0402_5%~D
12
RH93 0_0402_5%~DRH93 0_0402_5%~D
12
RH306 2.2K_0402_5%~DRH306 2.2K_0402_5%~D
12
RH80
10K_0402_5%~D
RH80
10K_0402_5%~D
12
QH5A
DMN66D0LDW-7_SOT363-6~D
QH5A
DMN66D0LDW-7_SOT363-6~D
6 1
2
RH85 0_0402_5%~DRH85 0_0402_5%~D
12
RH95 0_0402_5%~DRH95 0_0402_5%~D
12
RH97 10K_0402_5%~DRH97 10K_0402_5%~D
12
RH300 1K_0402_1%~DRH300 1K_0402_1%~D
12
RH307 0_0402_5%~DRH307 0_0402_5%~D
12
G
D
S
QH2
SSM3K7002FU_SC70-3~D
G
D
S
QH2
SSM3K7002FU_SC70-3~D
2
13
CH19
12P_0402_50V8J~D
CH19
12P_0402_50V8J~D
1
2
PCI-E*
CLOCKS
FLEX CLOCKS
SMBUSController
Link
UH4B
BD82PPSM-QNHN-A0_BGA989~D
PCI-E*
CLOCKS
FLEX CLOCKS
SMBUSController
Link
UH4B
BD82PPSM-QNHN-A0_BGA989~D
PERN1
BG34
PERP1
BJ34
PERN2
BE34
PERP2
BF34
PERN3
BG36
PERP3
BJ36
PERN4
BF36
PERP4
BE36
PERN5
BG37
PERP5
BH37
PERN6
BJ38
PERP6
BG38
PERN7
BG40
PERP7
BJ40
PERN8
BE38
PERP8
BC38
PETN1
AV32
PETP1
AU32
PETN2
BB32
PETP2
AY32
PETN3
AV34
PETP3
AU34
PETN4
AY34
PETP4
BB34
PETN5
AY36
PETP5
BB36
PETN6
AU36
PETP6
AV36
PETN7
AY40
PETP7
BB40
PETN8
AW38
PETP8
AY38
CLKOUT_PCIE0N
Y40
CLKOUT_PCIE0P
Y39
CLKOUT_PCIE1N
AB49
CLKOUT_PCIE1P
AB47
CLKOUT_PCIE2N
AA48
CLKOUT_PCIE2P
AA47
CLKOUT_PCIE3N
Y37
CLKOUT_PCIE3P
Y36
CLKOUT_PCIE4N
Y43
CLKOUT_PCIE4P
Y45
CLKOUT_PCIE5N
V45
CLKOUT_PCIE5P
V46
CLKIN_GND1_N BJ30
CLKIN_GND1_P BG30
CLKIN_DMI_N BF18
CLKIN_DMI_P BE18
CLKIN_DOT_96N G24
CLKIN_DOT_96P E24
CLKIN_SATA_N AK7
CLKIN_SATA_P AK5
XTAL25_IN V47
XTAL25_OUT V49
REFCLK14IN K45
CLKIN_PCILOOPBACK H45
CLKOUT_PEG_A_N AB37
CLKOUT_PEG_A_P AB38
PEG_A_CLKRQ# / GPIO47 M10
PCIECLKRQ0# / GPIO73
J2
PCIECLKRQ1# / GPIO18
M1
PCIECLKRQ2# / GPIO20
V10
PCIECLKRQ3# / GPIO25
A8
PCIECLKRQ4# / GPIO26
L12
PCIECLKRQ5# / GPIO44
L14
CLKOUTFLEX0 / GPIO64 K43
CLKOUTFLEX1 / GPIO65 F47
CLKOUTFLEX2 / GPIO66 H47
CLKOUTFLEX3 / GPIO67 K49
CLKOUT_DMI_N AV22
CLKOUT_DMI_P AU22
PEG_B_CLKRQ# / GPIO56
E6
CLKOUT_PEG_B_P
AB40 CLKOUT_PEG_B_N
AB42
XCLK_RCOMP Y47
CLKOUT_DP_P AM13
CLKOUT_DP_N AM12
CLKOUT_PCIE6N
V40
CLKOUT_PCIE6P
V42
PCIECLKRQ7# / GPIO46
K12
CLKOUT_PCIE7N
V38
CLKOUT_PCIE7P
V37
CLKOUT_ITPXDP_N
AK14
CLKOUT_ITPXDP_P
AK13
SMBALERT# / GPIO11 E12
SMBCLK H14
SMBDATA C9
SML0ALERT# / GPIO60 A12
SML0CLK C8
SML0DATA G12
SML1ALERT# / PCHHOT# / GPIO74 C13
SML1CLK / GPIO58 E14
SML1DATA / GPIO75 M16
CL_CLK1 M7
CL_DATA1 T11
CL_RST1# P10
PCIECLKRQ6# / GPIO45
T13
RH94 10K_0402_5%~DRH94 10K_0402_5%~D
12
RH90 0_0402_5%~DRH90 0_0402_5%~D
12
RH312 0_0402_5%~DRH312 0_0402_5%~D
12
RH82 0_0402_5%~DRH82 0_0402_5%~D
12
RH299 2.2K_0402_5%~DRH299 2.2K_0402_5%~D
1 2
RH75 10K_0402_5%~DRH75 10K_0402_5%~D
1 2
RH100 90.9_0402_1%~DRH100 90.9_0402_1%~D
1 2
RH301 10K_0402_5%~DRH301 10K_0402_5%~D
12
RH83 0_0402_5%~DRH83 0_0402_5%~D
12
RH96 0_0402_5%~DRH96 0_0402_5%~D
12
RH304 10K_0402_5%~DRH304 10K_0402_5%~D
12
RH74 10K_0402_5%~DRH74 10K_0402_5%~D
1 2
RH303 2.2K_0402_5%~DRH303 2.2K_0402_5%~D
12
YH2
25MHZ_10PF_Q22FA2380049900~D
YH2
25MHZ_10PF_Q22FA2380049900~D
IN 1
GND 2
OUT
3
GND
4
RH280 0_0402_5%~DRH280 0_0402_5%~D
12
QH5B
DMN66D0LDW-7_SOT363-6~D
QH5B
DMN66D0LDW-7_SOT363-6~D
3
5
4
CH18
12P_0402_50V8J~D
CH18
12P_0402_50V8J~D
1
2
RH99
1M_0402_5%~D
RH99
1M_0402_5%~D
12
RH183 10K_0402_5%~DRH183 10K_0402_5%~D
1 2
RH305 2.2K_0402_5%~DRH305 2.2K_0402_5%~D
12
RH313 22_0402_5%~DRH313 22_0402_5%~D
12
RH308 0_0402_5%~DRH308 0_0402_5%~D
12
RH92 0_0402_5%~DRH92 0_0402_5%~D
12
RH104 10K_0402_5%~DRH104 10K_0402_5%~D
12
RH87 10K_0402_5%~DRH87 10K_0402_5%~D
1 2
RH79 10K_0402_5%~DRH79 10K_0402_5%~D
1 2
RH310 0_0402_5%~DRH310 0_0402_5%~D
12
RH77 10K_0402_5%~DRH77 10K_0402_5%~D
1 2
RH315 22_0402_5%~D@RH315 22_0402_5%~D@12
RH311 22_0402_5%~DRH311 22_0402_5%~D
12
RH302 2.2K_0402_5%~DRH302 2.2K_0402_5%~D
12
RH86 0_0402_5%~DRH86 0_0402_5%~D
12
RH281 0_0402_5%~DRH281 0_0402_5%~D
12
RH91 10K_0402_5%~DRH91 10K_0402_5%~D
1 2
RH98 10K_0402_5%~DRH98 10K_0402_5%~D
1 2
RH78 10K_0402_5%~DRH78 10K_0402_5%~D
1 2
RH309 0_0402_5%~DRH309 0_0402_5%~D
12
RH152 10K_0402_5%~DRH152 10K_0402_5%~D
12
RH88 0_0402_5%~DRH88 0_0402_5%~D
12
RH298 2.2K_0402_5%~DRH298 2.2K_0402_5%~D
1 2
RH81 10K_0402_5%~DRH81 10K_0402_5%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCH_PCIE_WAKE#
CLKRUN#
SIO_SLP_LAN#
ME_SUS_PWR_ACK
PCH_RI#
CRT_IREF
PCH_CRT_DDC_DAT
PCH_CRT_DDC_CLK
HSYNC
VSYNC
PCH_CRT_BLU
PCH_CRT_GRN
PCH_CRT_RED
ENVDD_PCH
BIA_PWM_PCH
FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC1
FDI_LSYNC0
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
PANEL_BKEN_PCH
SYS_PWROK_R
SIO_PWRBTN#_R
PCH_BATLOW#
DMI_COMP_R
PCH_RI#
DMI_CRX_PTX_N1
DMI_CRX_PTX_P0
DMI_CRX_PTX_P3
DMI_CTX_PRX_P0
DMI_CRX_PTX_N2
DMI_CRX_PTX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
DMI_CTX_PRX_P3
DMI_CRX_PTX_P2
DMI_CTX_PRX_N1
DMI_CRX_PTX_N0
DMI_CTX_PRX_N0
DMI_CTX_PRX_P1
DMI_CRX_PTX_N3
PCH_PWROK
AC_PRESENT
SUSACK#_R
PM_APWROK_R
RBIAS_CPY
SIO_SLP_S5#
SIO_SLP_S4#
SIO_SLP_S3#
SIO_SLP_A#
SUSCLK
PCH_DPWROK
PCH_PCIE_WAKE#
CLKRUN#
SIO_SLP_SUS#
SUS_STAT#/LPCPD#
SIO_SLP_LAN#
H_PM_SYNC
PCH_RSMRST#_R
ME_SUS_PWR_ACK_R
PCH_CRT_DDC_CLK
PCH_CRT_DDC_DAT
SUS_STAT#/LPCPD#
PM_DRAM_PWRGD_R
LCD_ACLK+_PCH
LCD_ACLK-_PCH
LCD_BCLK+_PCH
LCD_BCLK-_PCH
LCD_A2-_PCH
LCD_A0-_PCH
LCD_A1-_PCH
LCD_A0+_PCH
LCD_A2+_PCH
LCD_A1+_PCH
LCD_B2-_PCH
LCD_B0-_PCH
LCD_B1-_PCH
LCD_B0+_PCH
LCD_B2+_PCH
LCD_B1+_PCH
LVD_IBG
LDDC_CLK_PCH
LDDC_DATA_PCH
PCH_DPWROK PCH_RSMRST#_R
ME_SUS_PWR_ACK_R SUSACK#_R
SYS_PWROKRESET_OUT#
DSWODVREN
PCH_CRT_BLU
PCH_CRT_GRN
PCH_CRT_RED
ENVDD_PCH
SYS_RESET#
ME_RESET#
ME_RESET#
SYS_RESET#
+3.3V_ALW_PCH
+3.3V_RUN
+1.05V_RUN
+3.3V_ALW_PCH
+RTC_CELL
+3.3V_RUN
+3.3V_RUN
PCH_CRT_BLU<25> PCH_CRT_GRN<25> PCH_CRT_RED<25>
BIA_PWM_PCH<24>
ENVDD_PCH<24,40>
FDI_INT <6>
FDI_FSYNC0 <6>
FDI_FSYNC1 <6>
FDI_LSYNC1 <6>
FDI_LSYNC0 <6>
FDI_CTX_PRX_N0 <6>
FDI_CTX_PRX_N1 <6>
FDI_CTX_PRX_N2 <6>
FDI_CTX_PRX_N3 <6>
FDI_CTX_PRX_N4 <6>
FDI_CTX_PRX_N5 <6>
FDI_CTX_PRX_N6 <6>
FDI_CTX_PRX_N7 <6>
FDI_CTX_PRX_P0 <6>
FDI_CTX_PRX_P1 <6>
FDI_CTX_PRX_P2 <6>
FDI_CTX_PRX_P3 <6>
FDI_CTX_PRX_P4 <6>
FDI_CTX_PRX_P5 <6>
FDI_CTX_PRX_P6 <6>
FDI_CTX_PRX_P7 <6>
PANEL_BKEN_PCH<24>
RESET_OUT#<41>
SIO_PWRBTN#<41>
DMI_CTX_PRX_P0<6>
DMI_CTX_PRX_P3<6>
DMI_CRX_PTX_N0<6>
DMI_CTX_PRX_P1<6> DMI_CTX_PRX_P2<6>
DMI_CRX_PTX_N2<6> DMI_CRX_PTX_N1<6>
DMI_CTX_PRX_N1<6> DMI_CTX_PRX_N0<6>
DMI_CRX_PTX_N3<6>
DMI_CRX_PTX_P0<6>
DMI_CTX_PRX_N3<6> DMI_CTX_PRX_N2<6>
DMI_CRX_PTX_P3<6> DMI_CRX_PTX_P2<6> DMI_CRX_PTX_P1<6>
PM_APWROK<41>
SIO_PWRBTN#_R<7,14>
AC_PRESENT<41>
SUSACK#<40> PCH_DPWROK <40>
PCH_PCIE_WAKE# <41>
SIO_SLP_S4# <40>
SIO_SLP_S3# <11,28,36,40,43,56>
SIO_SLP_S5# <41>
H_PM_SYNC <7>
SIO_SLP_A# <40,43,57>
SIO_SLP_LAN# <32,40>
CLKRUN# <33,40,41>
SIO_SLP_SUS# <40>
PCH_RSMRST#_Q<14,42>
ME_SUS_PWR_ACK<41>
PCH_CRT_DDC_DAT <25>
SYS_PWROK<7,40>
PM_DRAM_PWRGD<7>
PCH_CRT_HSYNC<25> PCH_CRT_VSYNC<25>
PCH_CRT_DDC_CLK <25>
LCD_ACLK-_PCH<23> LCD_ACLK+_PCH<23>
LCD_BCLK-_PCH<23> LCD_BCLK+_PCH<23>
LCD_A0-_PCH<23> LCD_A1-_PCH<23> LCD_A2-_PCH<23>
LCD_A2+_PCH<23>
LCD_A0+_PCH<23> LCD_A1+_PCH<23>
LCD_B0-_PCH<23> LCD_B1-_PCH<23> LCD_B2-_PCH<23>
LCD_B2+_PCH<23>
LCD_B0+_PCH<23> LCD_B1+_PCH<23>
LDDC_DATA_PCH<23> LDDC_CLK_PCH<23>
XDP_DBRESET#<7,14>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
PCH (3/8)
16 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
PCH (3/8)
16 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
PCH (3/8)
16 66Friday, June 10, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
Intel request DDPB can not support eDP
DSWODVREN - On Die DSW VR Enable
HIGH: RH127 STUFFED,
RH129 UNSTUFFED
Enabled (DEFAULT)
Disabled
LOW: RH129 STUFFED,
RH127 UNSTUFFED
Minimum speacing of 20mils for LVD_IBG
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
MAX14885EETL has internal 3K pu for
PCH_CRT_DDC_CLK and PCH_CRT_DDC_DAT
RH111 49.9_0402_1%~DRH111 49.9_0402_1%~D
1 2
RH131 150_0402_1%~DRH131 150_0402_1%~D
1 2
T57 PAD~DT57 PAD~D
RH142 10K_0402_5%~DRH142 10K_0402_5%~D
1 2
RH140 10K_0402_5%~DRH140 10K_0402_5%~D
1 2
RH132 150_0402_1%~DRH132 150_0402_1%~D
1 2
RH134 100K_0402_5%~DRH134 100K_0402_5%~D
1 2
RH317
2.2K_0402_5%~D
@
RH317
2.2K_0402_5%~D
@
12
DMI
FDI
System Power Management
UH4C
BD82PPSM-QNHN-A0_BGA989~D
DMI
FDI
System Power Management
UH4C
BD82PPSM-QNHN-A0_BGA989~D
DMI0RXN
BC24
DMI1RXN
BE20
DMI2RXN
BG18
DMI3RXN
BG20
DMI0RXP
BE24
DMI1RXP
BC20
DMI2RXP
BJ18
DMI3RXP
BJ20
DMI0TXN
AW24
DMI1TXN
AW20
DMI2TXN
BB18
DMI3TXN
AV18
DMI0TXP
AY24
DMI1TXP
AY20
DMI2TXP
AY18
DMI3TXP
AU18
DMI_ZCOMP
BJ24
DMI_IRCOMP
BG25
FDI_RXN0 BJ14
FDI_RXN1 AY14
FDI_RXN2 BE14
FDI_RXN3 BH13
FDI_RXN4 BC12
FDI_RXN5 BJ12
FDI_RXN6 BG10
FDI_RXN7 BG9
FDI_RXP0 BG14
FDI_RXP1 BB14
FDI_RXP2 BF14
FDI_RXP3 BG13
FDI_RXP4 BE12
FDI_RXP5 BG12
FDI_RXP6 BJ10
FDI_RXP7 BH9
FDI_FSYNC0 AV12
FDI_FSYNC1 BC10
FDI_LSYNC0 AV14
FDI_LSYNC1 BB10
FDI_INT AW16
PMSYNCH AP14
SLP_SUS# G16
SLP_S3# F4
SLP_S4# H4
SLP_S5# / GPIO63 D10
SYS_RESET#
K3
SYS_PWROK
P12
PWRBTN#
E20
RI#
A10
WAKE# B9
SUS_STAT# / GPIO61 G8
SUSCLK / GPIO62 N14
ACPRESENT / GPIO31
H20
BATLOW# / GPIO72
E10
PWROK
L22
CLKRUN# / GPIO32 N3
SUSWARN#/SUSPWRDNACK/GPIO30
K16
RSMRST#
C21
DRAMPWROK
B13
SLP_LAN# / GPIO29 K14
APWROK
L10
DPWROK E22
DMI2RBIAS
BH21
SLP_A# G10
DSWVRMEN A18
SUSACK#
C12
T62 PAD~DT62 PAD~D
T63 PAD~DT63 PAD~D
RH124 20_0402_1%~DRH124 20_0402_1%~D
1 2
RH122 0_0402_5%~DRH122 0_0402_5%~D
1 2
RH137 8.2K_0402_5%~DRH137 8.2K_0402_5%~D
1 2
RH117 0_0402_5%~DRH117 0_0402_5%~D
1 2
RH133 150_0402_1%~DRH133 150_0402_1%~D
1 2
RH114 0_0402_5%~D@RH114 0_0402_5%~D@
1 2
CH99
0.1U_0402_25V6K~D
@CH99
0.1U_0402_25V6K~D
@
1 2
RH139 8.2K_0402_5%~DRH139 8.2K_0402_5%~D
1 2
T58 PAD~DT58 PAD~D
RH118 0_0402_5%~DRH118 0_0402_5%~D
1 2
RH138 8.2K_0402_5%~D@RH138 8.2K_0402_5%~D@
1 2
RH320 0_0402_5%~DRH320 0_0402_5%~D
1 2
RH357 0_0402_5%~DRH357 0_0402_5%~D
1 2
RH126
1K_0402_0.5%~D
RH126
1K_0402_0.5%~D
12
RH316
2.2K_0402_5%~D
@
RH316
2.2K_0402_5%~D
@
12
RH112 750_0402_1%~DRH112 750_0402_1%~D
1 2
RH323 0_0402_5%~DRH323 0_0402_5%~D
1 2
T59 PAD~DT59 PAD~D
UC3
74AHC1G09GW_TSSOP5~D
@UC3
74AHC1G09GW_TSSOP5~D
@
B
1
A
2
G
3
O4
P5
RH113 0_0402_5%~DRH113 0_0402_5%~D
1 2
RH318 10K_0402_5%~D@RH318 10K_0402_5%~D@
1 2
T56 PAD~DT56 PAD~D
RH116 0_0402_5%~DRH116 0_0402_5%~D
1 2
RH344 2.37K_0402_1%~DRH344 2.37K_0402_1%~D
1 2
RH141 8.2K_0402_5%~D@RH141 8.2K_0402_5%~D@
12
RH123 20_0402_1%~DRH123 20_0402_1%~D
1 2
RH319 10K_0402_5%~D@RH319 10K_0402_5%~D@
1 2
RH321 0_0402_5%~D@RH321 0_0402_5%~D@
1 2
RH121 0_0402_5%~DRH121 0_0402_5%~D
1 2
RH129 330K_0402_1%~D@RH129 330K_0402_1%~D@
1 2
RH144 10K_0402_5%~DRH144 10K_0402_5%~D
1 2
RH127 330K_0402_1%~DRH127 330K_0402_1%~D
1 2
RH120 0_0402_5%~DRH120 0_0402_5%~D
1 2
LVDS
Digital Display Interface
CRT
UH4D
BD82PPSM-QNHN-A0_BGA989~D
LVDS
Digital Display Interface
CRT
UH4D
BD82PPSM-QNHN-A0_BGA989~D
L_BKLTCTL
P45
L_BKLTEN
J47
L_CTRL_CLK
T45
L_CTRL_DATA
P39
L_DDC_CLK
T40
L_DDC_DATA
K47
L_VDD_EN
M45
LVDSA_CLK#
AK39
LVDSA_CLK
AK40
LVDSA_DATA#0
AN48
LVDSA_DATA#1
AM47
LVDSA_DATA#2
AK47
LVDSA_DATA#3
AJ48
LVDSA_DATA0
AN47
LVDSA_DATA1
AM49
LVDSA_DATA2
AK49
LVDSA_DATA3
AJ47
LVDSB_CLK#
AF40
LVDSB_CLK
AF39
LVDSB_DATA#0
AH45
LVDSB_DATA#1
AH47
LVDSB_DATA#2
AF49
LVDSB_DATA#3
AF45
LVDSB_DATA0
AH43
DDPB_0N AV42
DDPB_1N AV45
LVD_VREFH
AE48
LVD_VREFL
AE47
DDPD_2N BF42
DDPD_3N BJ42
DDPB_2N AU48
DDPB_3N AV47
DDPC_0N AY47
DDPC_1N AY43
DDPC_2N BA47
DDPC_3N BB47
DDPD_0N BB43
DDPD_1N BF44
DDPB_0P AV40
DDPB_1P AV46
DDPD_2P BE42
DDPD_3P BG42
DDPB_2P AU47
DDPB_3P AV49
LVDSB_DATA1
AH49
LVDSB_DATA2
AF47
LVDSB_DATA3
AF43
LVD_IBG
AF37
LVD_VBG
AF36
DDPC_1P AY45
DDPC_0P AY49
DDPC_2P BA48
DDPC_3P BB49
DDPD_0P BB45
DDPD_1P BE44
CRT_BLUE
N48
CRT_DDC_CLK
T39
CRT_DDC_DATA
M40
CRT_GREEN
P49
CRT_HSYNC
M47
CRT_IRTN
T42
CRT_RED
T49
CRT_VSYNC
M49
DAC_IREF
T43
SDVO_CTRLCLK P38
SDVO_CTRLDATA M39
DDPC_CTRLCLK P46
DDPC_CTRLDATA P42
DDPD_CTRLCLK M43
DDPD_CTRLDATA M36
DDPB_AUXN AT49
DDPC_AUXN AP47
DDPD_AUXN AT45
DDPB_AUXP AT47
DDPC_AUXP AP49
DDPD_AUXP AT43
DDPB_HPD AT40
DDPC_HPD AT38
DDPD_HPD BH41
SDVO_TVCLKINP AP45
SDVO_TVCLKINN AP43
SDVO_STALLP AM40
SDVO_STALLN AM42
SDVO_INTP AP40
SDVO_INTN AP39
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCH_PLTRST# PCH_PLTRST#_EC
USBP10+
USBP10-
USBP11+
USBP11-
USBP9+
USBP0-
USBP0+
USBP3+
USBP5+
USBP7+
USBP3-
USBP1-
USBP9-
USBP8-
USBP8+
USBP5-
USBP7-
USBP4-
USBP2+
USBP4+
USBP2-
USBP1+
USBRBIAS
USB_OC4#_R
USB_OC3#
USB_OC1#_R
USB_OC0#_R
USB_OC6#
USB_OC5#
PCI_GNT3#
USB_OC2#
BBS_BIT1
BT_DET#
USBP6+
USBP6-
USB_OC0#_R
USB_OC2#
USB_OC3#
USB_OC5#
USB_OC6#
USB_OC1#_R
USBP13+
USBP13-
PCI_REQ1#
PCH_PLTRST#
BT_DET#
PCI_GNT3#
FFS_PCH_INT
PCI_LOOPBACKOUT
PCI_MEC
PCI_5048
PCI_DOCK
BBS_BIT1
PCI_PIRQA#
PCI_PIRQC#
PCI_PIRQD#
PCI_PIRQB#
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_REQ1#
LCD_CBL_DET#
USBP12+
USBP12-
SIO_EXT_SMI#
SIO_EXT_SMI#
PCH_GPIO3
PCH_GPIO3
LCD_CBL_DET#
USB_OC4#_R
CAM_MIC_CBL_DET#
CAM_MIC_CBL_DET#
+3.3V_RUN
+3.3V_RUN
+3.3V_ALW_PCH
PCH_PLTRST#_EC <33,35,36,40,41>
USBP10+ <36>
USBP10- <36>
USBP11+ <42>
USBP11- <42>
USBP4+ <35>
USBP5- <35>
USBP3+ <39>
USBP5+ <35>
USBP4- <35>
USBP3- <39>
USBP2+ <38>
USBP2- <38>
USBP1+ <37>
USBP1- <37>
USBP0- <37>
USBP0+ <37>
USBP7+ <33>
USBP7- <33>
USBP8+ <39>
USBP8- <39>
USBP9+ <31>
USBP9- <31>
USB_OC0# <37>
USBP6- <35>
USBP6+ <35>
USB_OC1# <37>
USBP13+ <24>
USBP13- <24>
USB_OC0#_R <14>
USB_OC1#_R <14>
USB_OC2# <14>
USB_OC3# <14>
USB_OC4# <31>
USB_OC5# <14>
USB_OC6# <14>
PCIE_MCARD2_DET#<35> BT_DET#<42>
HDD_FALL_INT<28>
CLK_PCI_MEC<41>CLK_PCI_5048<40>
CLK_PCI_LOOPBACK<15>
CLK_PCI_DOCK<39>
PLTRST_LAN#<32>
PLTRST_USH#<33> PLTRST_MMI#<34> PLTRST_XDP#<7>
USBP12- <24>
USBP12+ <24>
PCH_PLTRST#<7,14>
PLTRST_EMB#<29>
SIO_EXT_SMI# <14,41>
USB3RN1<37>
USB3TN1<37>
USB3TP1<37>
USB3RP1<37>
USB3RN2<37>
USB3RP2<37>
USB3TN2<37>
USB3TP2<37>
USB3RN4<39>
USB3RP4<39>
USB3TN4<39>
USB3TP4<39>
PLTRST_GPU#<45>
LCD_CBL_DET#<24>
USB_OC4#_R <14>
CAM_MIC_CBL_DET#<24>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
PCH (4/8)
17 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
PCH (4/8)
17 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
PCH (4/8)
17 66Friday, June 10, 2011
Compal Electronics, Inc.
Route single-end 50-ohms and max 500-mils length.
Minimum spacing to other signals: 15 mils
DELL CONFIDENTIAL/PROPRIETARY
A16 swap override Strap/Top-Block
PCI_GNT#3
Swap Override jumper
Low = A16 swap
High = Default
Boot BIOS Strap
SATA_SLPD
(BBS_BIT0)
BBS_BIT1 Boot BIOS Location
0 0
Reserved (NAND)
PCI
SPI
LPC
0 1
1 0
1 1
*
INTEL feedback 0307
----->Camera
----->Right side E-SATA
----->MLK DOCK
----->USH
----->Blue Tooth
----->Express Card
----->Flash
----->WLAN/WIMAX
----->Right Side Bottom
----->Right Side Top
----->WWAN/UWB
----->DOCK
----->Left side
----->LCD Touch
RH326 8.2K_0402_5%~DRH326 8.2K_0402_5%~D
1 2
RH343 0_0402_5%~DRH343 0_0402_5%~D
1 2
RH329 8.2K_0402_5%~DRH329 8.2K_0402_5%~D
1 2
RH331 10K_0402_5%~DRH331 10K_0402_5%~D
1 2
RH335 0_0402_5%~DRH335 0_0402_5%~D
1 2
RH325 8.2K_0402_5%~DRH325 8.2K_0402_5%~D
1 2
RH330 10K_0402_5%~DRH330 10K_0402_5%~D
1 2
RH337 0_0402_5%~DRH337 0_0402_5%~D
1 2
RH327 10K_0402_5%~DRH327 10K_0402_5%~D
1 2
RH341 0_0402_5%~DRH341 0_0402_5%~D
1 2
RH160 22_0402_5%~DRH160 22_0402_5%~D
12
RH338 0_0402_5%~DRH338 0_0402_5%~D
1 2
RH332 10K_0402_5%~D@RH332 10K_0402_5%~D@1 2
RH324 8.2K_0402_5%~DRH324 8.2K_0402_5%~D
1 2
RH328 10K_0402_5%~DRH328 10K_0402_5%~D
1 2
RH103 22_0402_5%~DRH103 22_0402_5%~D
12
RH339 0_0402_5%~DRH339 0_0402_5%~D
1 2
T104PAD~D @T104PAD~D @
RSVD
PCI
USB
USB30
UH4E
BD82PPSM-QNHN-A0_BGA989~D
RSVD
PCI
USB
USB30
UH4E
BD82PPSM-QNHN-A0_BGA989~D
RSVD23 AV5
RSVD1 AY7
RSVD2 AV7
RSVD3 AU3
RSVD4 BG4
RSVD5 AT10
RSVD6 BC8
RSVD7 AU2
RSVD8 AT4
RSVD17 BB5
RSVD18 BB3
RSVD19 BB7
RSVD20 BE8
RSVD21 BD4
RSVD22 BF6
RSVD9 AT3
RSVD10 AT1
RSVD11 AY3
RSVD12 AT5
RSVD13 AV3
RSVD14 AV1
RSVD15 BB1
RSVD16 BA3
RSVD25 AT8
RSVD24 AV10
RSVD26 AY5
RSVD27 BA2
RSVD28 AT12
RSVD29 BF3
PIRQA#
K40
PIRQB#
K38
PIRQC#
H38
PIRQD#
G38
REQ1# / GPIO50
C46
REQ2# / GPIO52
C44
REQ3# / GPIO54
E40
GNT1# / GPIO51
D47
GNT2# / GPIO53
E42
GNT3# / GPIO55
F46
PIRQE# / GPIO2
G42
PIRQF# / GPIO3
G40
PIRQG# / GPIO4
C42
PIRQH# / GPIO5
D44
USBP0N C24
USBP0P A24
USBP1N C25
USBP1P B25
USBP2N C26
USBP2P A26
USBP3N K28
USBP3P H28
USBP4N E28
USBP4P D28
USBP5N C28
USBP5P A28
USBP6N C29
USBP6P B29
USBP7N N28
USBP7P M28
USBP8N L30
USBP8P K30
USBP9N G30
USBP9P E30
USBP10N C30
USBP10P A30
USBP11N L32
USBP11P K32
USBP12N G32
USBP12P E32
USBP13N C32
USBP13P A32
PME#
K10
CLKOUT_PCI0
H49
CLKOUT_PCI1
H43
CLKOUT_PCI2
J48
USBRBIAS# C33
USBRBIAS B33
OC0# / GPIO59 A14
OC1# / GPIO40 K20
OC2# / GPIO41 B17
OC3# / GPIO42 C16
OC4# / GPIO43 L16
OC5# / GPIO9 A16
OC6# / GPIO10 D14
OC7# / GPIO14 C14
CLKOUT_PCI4
H40 CLKOUT_PCI3
K42
PLTRST#
C6
TP1
BG26
TP2
BJ26
TP3
BH25
TP6
AH38
TP7
AH37
TP8
AK43
TP9
AK45
TP16
Y13
TP17
K24
TP18
L24
TP19
AB46
TP20
AB45
TP21
B21
TP22
M20
TP23
AY16
USB3Rn1
BE28
USB3Rn2
BC30
USB3Rn3
BE32
USB3Rn4
BJ32
USB3Rp1
BC28
USB3Rp2
BE30
USB3Rp3
BF32
USB3Rp4
BG32
USB3Tn1
AV26
USB3Tn2
BB26
USB3Tn3
AU28
USB3Tn4
AY30
USB3TP1
AU26
USB3Tp2
AY26
USB3Tp3
AV28
USB3Tp4
AW30
TP4
BJ16
TP5
BG16
TP15
AM5 TP14
AM4 TP13
AH12 TP12
H3 TP11
N30 TP10
C18
TP24
BG46
RPH2
10K_1206_8P4R_5%~D
RPH2
10K_1206_8P4R_5%~D
1 8
2 7
3 6
4 5
RH105 22_0402_5%~DRH105 22_0402_5%~D
12
RH333
1K_0402_1%~D
@RH333
1K_0402_1%~D
@
12
RH340 0_0402_5%~DRH340 0_0402_5%~D
1 2
RH151
22.6_0402_1%~D
RH151
22.6_0402_1%~D
1 2
RH336 0_0402_5%~DRH336 0_0402_5%~D
1 2
RH342
1K_0402_1%~D
@RH342
1K_0402_1%~D
@
12
RPH1
10K_1206_8P4R_5%~D
RPH1
10K_1206_8P4R_5%~D
1 8
2 7
3 6
4 5
RH102 22_0402_5%~DRH102 22_0402_5%~D
12
CH102
0.1U_0402_25V6K~D
CH102
0.1U_0402_25V6K~D
1 2
UH3
TC7SH08FU_SSOP5~D
UH3
TC7SH08FU_SSOP5~D
B
1
A
2
G
3
O4
P5
RH356 0_0402_5%~DRH356 0_0402_5%~D
1 2
RH334 0_0402_5%~DRH334 0_0402_5%~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SIO_A20GATE
SIO_RCIN#
PM_LANPHY_ENABLE
PCH_GPIO22
TPM_ID0
PCH_GPIO17
SIO_EXT_SCI#
TPM_ID0
PCH_GPIO37
PCH_GPIO36
PCH_GPIO37
TEMP_ALERT#
TPM_ID1
PCH_GPIO17
TEMP_ALERT#
TPM_ID1
USB_MCARD1_DET#
FFS_INT2
IO_LOOP#
IO_LOOP#
PCH_GPIO7
VSS_NCTF_32
VSS_NCTF_17
VSS_NCTF_29
VSS_NCTF_26
VSS_NCTF_25
VSS_NCTF_23
VSS_NCTF_15
VSS_NCTF_20
VSS_NCTF_16
VSS_NCTF_18
VSS_NCTF_30
VSS_NCTF_19
VSS_NCTF_21
VSS_NCTF_31
VSS_NCTF_28
VSS_NCTF_24
VSS_NCTF_27
VSS_NCTF_22
H_CPUPWRGD
SIO_RCIN#
INIT3_3V#
SIO_A20GATE
VSS_NCTF_4
VSS_NCTF_11
VSS_NCTF_5
VSS_NCTF_14
VSS_NCTF_2
VSS_NCTF_8
VSS_NCTF_13
VSS_NCTF_7
VSS_NCTF_9
VSS_NCTF_3
VSS_NCTF_10
VSS_NCTF_12
VSS_NCTF_6
VSS_NCTF_1
PCH_THRMTRIP#_R
SIO_EXT_WAKE#
E3_PAID_TS_DET#
CONTACTLESS_DET#
DF_TVS
NC_1
SIO_EXT_SCI#
KB_DET#
PCH_GPIO22
DF_TVSDF_TVS_R
CONTACTLESS_DET#
PCH_GPIO36
PCIE_MCARD3_DET#
KB_DET#
PCH_GPIO15
PCH_GPIO15
SLP_ME_CSW_DEV#
SLP_ME_CSW_DEV#
PCH_GPIO17
PCH_GPIO16
PCH_GPIO37
PCH_GPIO36
DGPU_HOLD_RST#
USH_DET#
USH_DET#
PCH_GPIO7
PCH_GPIO16
PCH_GPIO16
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+1.05V_RUN_VTT
+3.3V_ALW_PCH
+VCCDFTERM
+3.3V_ALW_PCH
+3.3V_ALW_PCH
PM_LANPHY_ENABLE<32>
SIO_EXT_SCI#<41>
PCIE_MCARD1_DET#<35>
TEMP_ALERT#<14,40>
USB_MCARD1_DET#<14,35>
PCH_GPIO37<14>
SIO_EXT_SCI#_R<14>
FFS_INT2<28>
SIO_A20GATE <41>
H_CPUPWRGD <7>
SIO_RCIN# <41>
IO_LOOP#<31>
E3_PAID_TS_DET#<24>
KB_DET#<42>
CONTACTLESS_DET# <33>
PCIE_MCARD3_DET# <35>
SIO_EXT_WAKE#<40>
USB_MCARD2_DET# <35>
PCH_GPIO36<14>
SLP_ME_CSW_DEV#<14,40>
PCH_GPIO15<14>
H_SNB_IVB#<7>
DGPU_HOLD_RST#<45>
DGPU_PWROK <40,64>USH_DET#<33>
PCH_GPIO16<14>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
PCH (5/8)
18 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
PCH (5/8)
18 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
PCH (5/8)
18 66Friday, June 10, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
TPM_ID1TPM_ID0
0
1
0
0
1 1
China TPM
TPM
No TPM, No China TPM
Layout note:
Trace wide 10mil & length 30mil
All NCTF pins should have thick
traces at 45°from the pad.
Layout note:
Trace wide 10mil & length 30mil
All NCTF pins should have thick
traces at 45°from the pad.
DMI & FDI Termination Voltage
DF_TVS Set to Vss when LOW
Set to Vcc when HIGH
PLACE RH150 CLOSE TO THE BRANCHING POINT
( TO CPU and NVRAM CONNECTOR)
RH149 need to close to CPU
SLP_ME_CSW_DEV# PLL ON DIE VR ENABLE
ENABLED - HIGH DEFAULT
DISABLED - LOW
Note: PCH has internal pull up 20k ohm on
E3_PAID_TS_DET# (GPIO27)
INTEL feedback 0302
TBD
DBC_ENABLE for E4 12"
RH269 8.2K_0402_5%~DRH269 8.2K_0402_5%~D
1 2
RH174 10K_0402_5%~DRH174 10K_0402_5%~D
12
RH353
1K_0402_1%~D
@
RH353
1K_0402_1%~D
@
12
T106PAD~D
@T106PAD~D
@CH97
0.1U_0402_25V6K~D
CH97
0.1U_0402_25V6K~D
1
2
RH163 10K_0402_5%~DRH163 10K_0402_5%~D
1 2
RH270
10K_0402_5%~D
2@ RH270
10K_0402_5%~D
2@
1 2
RH150 0_0402_5%~DRH150 0_0402_5%~D
1 2
RH267
10K_0402_5%~D
1@ RH267
10K_0402_5%~D
1@
1 2
RH272 10K_0402_5%~DRH272 10K_0402_5%~D
1 2
RH177 10K_0402_5%~DRH177 10K_0402_5%~D
12
RH173 1K_0402_1%~D@RH173 1K_0402_1%~D@12
RH265 10K_0402_5%~D@RH265 10K_0402_5%~D@12
RH164 100K_0402_5%~DRH164 100K_0402_5%~D
1 2
RH178 10K_0402_5%~DRH178 10K_0402_5%~D
12
RH256 10K_0402_5%~DRH256 10K_0402_5%~D
12
RH263 10K_0402_5%~DRH263 10K_0402_5%~D
1 2
RH203 10K_0402_5%~DRH203 10K_0402_5%~D
12
RH358 1K_0402_1%~DRH358 1K_0402_1%~D
1 2
RH149
2.2K_0402_5%~D
RH149
2.2K_0402_5%~D
12
RH268
20K_0402_5%~D
3@ RH268
20K_0402_5%~D
3@
12
RH181 10K_0402_5%~DRH181 10K_0402_5%~D
12
RH273 1K_0402_1%~D@RH273 1K_0402_1%~D@12
RH158 10K_0402_5%~DRH158 10K_0402_5%~D
12
RH271
2.2K_0402_5%~D
4@ RH271
2.2K_0402_5%~D
4@
12
RH53
4.7K_0402_5%~D
RH53
4.7K_0402_5%~D
1 2
T108PAD~D @T108PAD~D @
RH262 56_0402_5%~DRH262 56_0402_5%~D
12
RH170 10K_0402_5%~DRH170 10K_0402_5%~D
12
CPU/MISC
NCTF
GPIO
UH4F
BD82PPSM-QNHN-A0_BGA989~D
CPU/MISC
NCTF
GPIO
UH4F
BD82PPSM-QNHN-A0_BGA989~D
GPIO27
E16
GPIO28
P8
GPIO24
E8
GPIO57
D6
LAN_PHY_PWR_CTRL / GPIO12
C4
VSS_NCTF_1
A4
VSS_NCTF_2
A44
VSS_NCTF_3
A45
VSS_NCTF_4
A46
VSS_NCTF_5
A5
VSS_NCTF_6
A6
VSS_NCTF_7
B3
VSS_NCTF_8
B47
VSS_NCTF_9
BD1
VSS_NCTF_10
BD49
VSS_NCTF_11
BE1
VSS_NCTF_12
BE49
TACH2 / GPIO6
H36
TACH0 / GPIO17
D40
TACH3 / GPIO7
E38
SATA3GP / GPIO37
M5
SATA5GP / GPIO49 / TEMP_ALERT#
V3
SCLOCK / GPIO22
T5
SLOAD / GPIO38
N2
SDATAOUT0 / GPIO39
M3
SDATAOUT1 / GPIO48
V13
PROCPWRGD AY11
RCIN# P5
PECI AU16
THRMTRIP# AY10
GPIO8
C10
BMBUSY# / GPIO0
T7
GPIO15
G2
TACH1 / GPIO1
A42
SATA2GP / GPIO36
V8
INIT3_3V# T14
STP_PCI# / GPIO34
K1
GPIO35
K4
SATA4GP / GPIO16
U2
VSS_NCTF_32 F49
A20GATE P4
TACH4 / GPIO68 C40
TACH6 / GPIO70 C41
TACH7 / GPIO71 A40
TACH5 / GPIO69 B41
VSS_NCTF_17 BH3
VSS_NCTF_18 BH47
VSS_NCTF_19 BJ4
VSS_NCTF_20 BJ44
VSS_NCTF_21 BJ45
VSS_NCTF_22 BJ46
VSS_NCTF_23 BJ5
VSS_NCTF_24 BJ6
VSS_NCTF_25 C2
VSS_NCTF_26 C48
VSS_NCTF_27 D1
VSS_NCTF_28 D49
VSS_NCTF_29 E1
VSS_NCTF_30 E49
VSS_NCTF_31 F1
TS_VSS4 AK10
TS_VSS3 AH10
TS_VSS2 AK11
TS_VSS1 AH8
NC_1 P37
VSS_NCTF_13
BF1
VSS_NCTF_14
BF49
VSS_NCTF_15 BG2
VSS_NCTF_16 BG48
DF_TVS AY1
RH354 1K_0402_1%~DRH354 1K_0402_1%~D
1 2
RH266 10K_0402_5%~DRH266 10K_0402_5%~D
12
RH171 10K_0402_5%~D@RH171 10K_0402_5%~D@12
RH172 10K_0402_5%~DRH172 10K_0402_5%~D
12
RH259 0_0402_5%~DRH259 0_0402_5%~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VCCAPLLEXP
+1.05V_RUN_VCCCLKDMI
+VCCADAC
+1.8V_RUN_LVDS
+VCCAPLL_FDI
+VCCAPLL_FDI
+1.5V_RUN +1.05V_+1.5V_1.8V_RUN
+1.8V_RUN
+3.3V_RUN
+VCCDFTERM
+1.05V_RUN
+1.05V_RUN
+1.05V_RUN
+1.05V_RUN
+1.05V_RUN
+3.3V_RUN
+1.05V_RUN
+3.3V_RUN
+3.3V_RUN
+1.8V_RUN
+3.3V_RUN
+1.05V_RUN_VTT
+1.05V_+1.5V_1.8V_RUN
+1.05V_+1.5V_1.8V_RUN
+1.05V_RUN_VTT
+1.05V_RUN
+3.3V_M
+3.3V_RUN
+VCCSPI
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
PCH (6/8)
19 66Tuesday, June 07, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
PCH (6/8)
19 66Tuesday, June 07, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
PCH (6/8)
19 66Tuesday, June 07, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
3.3
1.05
1.05
1.1
1.05
V_PROC_IO
V5REF
V5REF_Sus
Vcc3_3
VccASW
VccADAC3
VccADPLLA
VccADPLLB
VccSPI
Voltage Rail
VccCore
VccDMI
1.05
5
3.3
1.05
0.001
0.001
0.001
0.228
0.903
0.063
0.08
0.08
0.047
1.7
0.01
5
Voltage
S0 Iccmax
Current (A)
1.05
VccDSW3_3 0.001
3.3
3.3
VccDIFFCLKN 0.055
1.05VccIO 3.711
1.8 0.002VCCDFTERM
3.3VccRTC 2 (mA)
1.05VccClkDMI 0.07
3.3VccSus3_3
3.3VccSusHDA
0.095
0.01
VccVRM 1.5 0.167
1.05VccSSC
VccALVDS 3.3
1.8VccTX_LVDS 0.04
0.001
0.095
PCH Power Rail Table
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
0.1uH inductor, 200mA
CPN: SHI0110BJ0L
INTEL feedback 0302
INTEL feedback 0307
CH35
0.1U_0402_10V7K~D
CH35
0.1U_0402_10V7K~D
1
2
CH106
10U_0603_6.3V6M~D
@
CH106
10U_0603_6.3V6M~D
@
1
2
CH46
1U_0402_6.3V6K~D
CH46
1U_0402_6.3V6K~D
1
2
RH195 0.022_0805_1%@RH195 0.022_0805_1%@1 2
PJP66
PAD-OPEN1x1m
@PJP66
PAD-OPEN1x1m
@
1 2
RH276
0_0805_5%~D
@RH276
0_0805_5%~D
@
12
CH54
1U_0402_6.3V6K~D
CH54
1U_0402_6.3V6K~D
1
2
CH33
1U_0402_6.3V6K~D
CH33
1U_0402_6.3V6K~D
1
2
RH205 0_0603_5%~DRH205 0_0603_5%~D
12
CH44
10U_0603_6.3V6M~D
CH44
10U_0603_6.3V6M~D
1
2
CH104
0.01U_0402_16V7K~D
CH104
0.01U_0402_16V7K~D
1
2
RH197 0_0603_5%~DRH197 0_0603_5%~D
12
CH51
0.1U_0402_10V7K~D
CH51
0.1U_0402_10V7K~D
1
2
CH105
22U_0805_6.3V6M~D
CH105
22U_0805_6.3V6M~D
1
2
RH247 1UH_LB2012T1R0M_20%~D
@RH247 1UH_LB2012T1R0M_20%~D
@1 2
CH31
1U_0402_6.3V6K~D
CH31
1U_0402_6.3V6K~D
1
2
CH43
0.1U_0402_10V7K~D
CH43
0.1U_0402_10V7K~D
1
2
CH47
1U_0402_6.3V6K~D
CH47
1U_0402_6.3V6K~D
1
2
CH30
10U_0603_6.3V6M~D
CH30
10U_0603_6.3V6M~D
1
2
CH36
10U_0603_6.3V6M~D
CH36
10U_0603_6.3V6M~D
1
2
CH40
10U_0603_6.3V6M~D
@
CH40
10U_0603_6.3V6M~D
@
1
2
LH8
100NH_HK1608R10J-T_5%_0603~D
LH8
100NH_HK1608R10J-T_5%_0603~D
12
RH202 0_0603_5%~DRH202 0_0603_5%~D
12
CH103
0.01U_0402_16V7K~D
CH103
0.01U_0402_16V7K~D
1
2
LH1
BLM18PG181SN1_0603~D
LH1
BLM18PG181SN1_0603~D
12
CH45
1U_0402_6.3V6K~D
CH45
1U_0402_6.3V6K~D
1
2
CH52
0.1U_0402_10V7K~D
CH52
0.1U_0402_10V7K~D
1
2
CH49
1U_0402_6.3V6K~D
CH49
1U_0402_6.3V6K~D
1 2
POWER
VCC CORE
DMI
VCCIO
CRTLVDS
FDI
DFT / SPI HVCMOS
UH4G
BD82PPSM-QNHN-A0_BGA989~D
POWER
VCC CORE
DMI
VCCIO
CRTLVDS
FDI
DFT / SPI HVCMOS
UH4G
BD82PPSM-QNHN-A0_BGA989~D
VCCCORE[1]
AA23
VCCCORE[2]
AC23
VCCCORE[3]
AD21
VCCCORE[4]
AD23
VCCCORE[5]
AF21
VCCCORE[6]
AF23
VCCCORE[7]
AG21
VCCCORE[8]
AG23
VCCCORE[9]
AG24
VCCCORE[10]
AG26
VCCCORE[11]
AG27
VCCCORE[12]
AG29
VCCCORE[13]
AJ23
VCCCORE[14]
AJ26
VCCCORE[15]
AJ27
VCCDFTERM[4] AJ17
VCCDFTERM[3] AJ16
VCCIO[17]
AN21
VCCIO[18]
AN26
VCCIO[19]
AN27
VCCIO[20]
AP21
VCCIO[23]
AP26
VCCIO[24]
AT24
VCCIO[15]
AN16
VCCIO[16]
AN17
VCCIO[21]
AP23
VCCIO[22]
AP24
VCCADAC U48
VCCTX_LVDS[1] AM37
VCCTX_LVDS[2] AM38
VCCALVDS AK36
VCCVRM[3] AT16
VCCVRM[2]
AP16
VCCAPLLEXP
BJ22
VccAFDIPLL
BG6
VCCIO[28]
AN19 VCCTX_LVDS[4] AP37
VCCTX_LVDS[3] AP36
VSSADAC U47
VSSALVDS AK37
VCCIO[27]
AP17
VCC3_3[6] V33
VCC3_3[7] V34
VCC3_3[3]
BH29 VCCDFTERM[2] AG17
VCCDFTERM[1] AG16
VCCDMI[1] AT20
VCCIO[25]
AN33
VCCIO[26]
AN34
VCCCORE[16]
AJ29
VCCCORE[17]
AJ31
VCCSPI V1
VCCCLKDMI AB36
VCCDMI[2]
AU20
CH32
1U_0402_6.3V6K~D
CH32
1U_0402_6.3V6K~D
1
2
CH34
0.01U_0402_16V7K~D
CH34
0.01U_0402_16V7K~D
1
2
RH204 0_0603_5%~D@RH204 0_0603_5%~D@12
CH48
1U_0402_6.3V6K~D
CH48
1U_0402_6.3V6K~D
1
2
CH50
1U_0402_6.3V6K~D
CH50
1U_0402_6.3V6K~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+PCH_V5REF_RUN
+PCH_V5REF_SUS
+1.05V_RUN_VCCA_A_DPL
+1.05V_RUN_VCCA_B_DPL
+PCH_V5REF_RUN
+PCH_V5REF_SUS
+VCCA_USBSUS
+VCCA_USBSUS
+VCCSATAPLL
+VCCDSW3_3
+PCH_VCCDSW
+3.3V_RUN_VCC_CLKF33
+3.3V_RUN_VCC_CLKF33
+VCCSUS1
+VCCACLK
+VCCAPLL_CPY_PCH
+VCCRTCEXT
+VCCSST
+1.05V_M_VCCSUS
+1.05V_RUN_VCCA_A_DPL
+1.05V_RUN_VCCA_B_DPL
+1.05V_M_VCCSUS
+3.3V_RUN+5V_RUN
+3.3V_ALW_PCH+5V_ALW_PCH
+5V_ALW_PCH+5V_ALW
+1.05V_RUN
+1.05V_RUN
+3.3V_ALW_PCH
+3.3V_ALW_PCH
+3.3V_RUN
+3.3V_RUN
+1.05V_M
+3.3V_ALW_PCH
+1.05V_RUN
+1.05V_RUN
+3.3V_ALW_PCH
+3.3V_RUN
+3.3V_ALW_PCH
+1.05V_RUN
+1.05V_M
+3.3V_ALW_PCH
+3.3V_RUN
+1.05V_RUN
+1.05V_RUN
+1.05V_RUN
+1.05V_RUN_VTT
+RTC_CELL
+1.05V_RUN
+1.05V_+1.5V_1.8V_RUN
+1.05V_M
+1.05V_RUN
+3.3V_ALW2
+1.05V_+1.5V_1.8V_RUN
ALW_ENABLE<43>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
PCH (7/8)
20 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
PCH (7/8)
20 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
PCH (7/8)
20 66Friday, June 10, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
CRB 0.7 RH208,RH213 trace width 20mil.
Note: Place VCCDIFFCLKN with a trace
specially for XCLK_RCOMP (RH100.2)
Note: If EMI concern, pop
with SHI00008S0L, 10UH +-20%
RH278
20K_0402_5%~D
RH278
20K_0402_5%~D
12
CH62
1U_0402_6.3V6K~D
@CH62
1U_0402_6.3V6K~D
@
1
2
CH83
1U_0402_6.3V6K~D
@CH83
1U_0402_6.3V6K~D
@
1
2
CH93
1U_0402_6.3V6K~D
CH93
1U_0402_6.3V6K~D
1
2
CH84
0.1U_0402_10V7K~D
CH84
0.1U_0402_10V7K~D
1
2
CH87
0.1U_0402_10V7K~D
CH87
0.1U_0402_10V7K~D
1
2
CH73
10U_0603_6.3V6M~D
@
CH73
10U_0603_6.3V6M~D
@
1
2
RH201 0_0402_5%~DRH201 0_0402_5%~D
1 2
CH75
0.1U_0402_10V7K~D
CH75
0.1U_0402_10V7K~D
1
2
CH57
0.1U_0402_10V7K~D
@
CH57
0.1U_0402_10V7K~D
@
1
2
CH64
22U_0805_6.3V6M~D
CH64
22U_0805_6.3V6M~D
1
2
+
CH95
220U_B2_2.5VM_R35M~D
+
CH95
220U_B2_2.5VM_R35M~D
1
2
CH58
10U_0603_6.3V6M~D
@
CH58
10U_0603_6.3V6M~D
@
1
2
CH85
4.7U_0603_6.3V6K~D
CH85
4.7U_0603_6.3V6K~D
1
2
CH98
0.1U_0402_10V7K~D
CH98
0.1U_0402_10V7K~D
1
2
CH80
10U_0603_6.3V6M~D
@CH80
10U_0603_6.3V6M~D
@
1
2
G
D
S
QH4
SSM3K7002FU_SC70-3~D
G
D
S
QH4
SSM3K7002FU_SC70-3~D
2
1 3
CH56
1U_0402_6.3V6K~D
CH56
1U_0402_6.3V6K~D
1
2
DH2
RB751S40T1_SOD523-2~D
DH2
RB751S40T1_SOD523-2~D
21
CH79
1U_0402_6.3V6K~D
CH79
1U_0402_6.3V6K~D
1
2
CH66
0.1U_0402_10V7K~D
CH66
0.1U_0402_10V7K~D
1
2
POWER
SATA USB
Clock and Miscellaneous
HDA
CPURTC
PCI/GPIO/LPCMISC
UH4J
BD82PPSM-QNHN-A0_BGA989~D
POWER
SATA USB
Clock and Miscellaneous
HDA
CPURTC
PCI/GPIO/LPCMISC
UH4J
BD82PPSM-QNHN-A0_BGA989~D
DCPSUSBYP
V12
VCCASW[1]
AA19
VCCASW[2]
AA21
VCCASW[3]
AA24
VCCASW[5]
AA27
VCCASW[6]
AA29
VCCSUSHDA P32
VCCSUS3_3[6] P24
VCCIO[34] T26
VCCIO[4] AD17
VCCASW[7]
AA31
VCCASW[8]
AC26
VCCASW[9]
AC27
VCCASW[10]
AC29
VCCASW[11]
AC31
VCCASW[12]
AD29
V5REF P34
VCC3_3[4] T34
VCCRTC
A22
VCCSUS3_3[10] V24
VCCSUS3_3[9] V23
VCCSUS3_3[8] T24
VCCSUS3_3[7] T23
VCCIO[2] AC16
VCCADPLLB
BF47
VCCDIFFCLKN[1]
AF33
V5REF_SUS M26
VCCIO[3] AC17
DCPSUS[1]
T17
VCCSSC
AG33
VCCADPLLA
BD47
VCCVRM[4]
Y49
VCCACLK
AD49
DCPRTC
N16
VCCASW[4]
AA26
VCCDIFFCLKN[2]
AF34
VCCIO[7]
AF17
DCPSST
V16
VCCIO[5] AF13
VCCASW[22] T21
VCCASW[23] V21
VCCASW[21] T19
VCC3_3[1] AA16
VCC3_3[8] W16
VCCSUS3_3[2] N20
VCCSUS3_3[3] N22
VCCSUS3_3[4] P20
VCCSUS3_3[5] P22
VCCIO[29] N26
VCCIO[30] P26
VCCIO[31] P28
VCCIO[32] T27
V_PROC_IO
BJ8
VCCIO[33] T29
VCCDIFFCLKN[3]
AG34
VCCASW[13]
AD31
VCCASW[14]
W21
VCCASW[15]
W23
VCCASW[16]
W24
VCCASW[17]
W26
VCCASW[18]
W29
VCCASW[19]
W31
VCCASW[20]
W33
VCCIO[6] AF14
VCCVRM[1] AF11
VCCIO[12] AH13
VCCIO[13] AH14
VCC3_3[2] AJ2
VCCAPLLSATA AK1
DCPSUS[3]
AL24
VCCIO[14]
AL29
DCPSUS[4] AN23
VCCSUS3_3[1] AN24
VCCAPLLDMI2
BH23
DCPSUS[2]
V19
VCCDSW3_3
T16
VCC3_3[5]
T38
CH74
1U_0402_6.3V6K~D
CH74
1U_0402_6.3V6K~D
1
2
RH200 0.022_0805_1%@RH200 0.022_0805_1%@1 2
CH69
1U_0402_6.3V6K~D
CH69
1U_0402_6.3V6K~D
1
2
RH253 0_0402_5%~D@RH253 0_0402_5%~D@1 2
CH92
1U_0402_6.3V6K~D
CH92
1U_0402_6.3V6K~D
1
2
RH213
10_0402_1%~D
RH213
10_0402_1%~D
12
CH67
1U_0402_6.3V6K~D
CH67
1U_0402_6.3V6K~D
1
2
CH96
1U_0402_6.3V6K~D
CH96
1U_0402_6.3V6K~D
1
2
CH68
1U_0402_6.3V6K~D
CH68
1U_0402_6.3V6K~D
1
2
CH55
0.1U_0402_10V7K~D
CH55
0.1U_0402_10V7K~D
1
2
RH248 0.022_0805_1%@RH248 0.022_0805_1%@1 2
LH5
10UH_LBR2012T100M_20%~D
@LH5
10UH_LBR2012T100M_20%~D
@
1 2
CH61
1U_0402_6.3V6K~D
@
CH61
1U_0402_6.3V6K~D
@
1
2
LH6
10UH_LBR2012T100M_20%~D
LH6
10UH_LBR2012T100M_20%~D
1 2
CH88
0.1U_0402_10V7K~D
CH88
0.1U_0402_10V7K~D
1
2
RH208
10_0402_1%~D
RH208
10_0402_1%~D
12
+
CH94
220U_B2_2.5VM_R35M~D
+
CH94
220U_B2_2.5VM_R35M~D
1
2
RH215 0.022_0805_1%RH215 0.022_0805_1%
1 2
LH7
10UH_LBR2012T100M_20%~D
LH7
10UH_LBR2012T100M_20%~D
1 2
CH59
0.1U_0402_10V7K~D
CH59
0.1U_0402_10V7K~D
1
2
CH72
0.1U_0402_10V7K~D
CH72
0.1U_0402_10V7K~D
1
2
CH60
0.1U_0402_10V7K~D
CH60
0.1U_0402_10V7K~D
1
2
CH63
0.1U_0402_10V7K~D
CH63
0.1U_0402_10V7K~D
1
2
CH65
22U_0805_6.3V6M~D
CH65
22U_0805_6.3V6M~D
1
2
LH3
10UH_LBR2012T100M_20%~D
@LH3
10UH_LBR2012T100M_20%~D
@
1 2
CH82
1U_0402_6.3V6K~D
CH82
1U_0402_6.3V6K~D
1
2
DH3
RB751S40T1_SOD523-2~D
DH3
RB751S40T1_SOD523-2~D
21
CH70
1U_0603_10V7K~D
CH70
1U_0603_10V7K~D
1
2
CH91
0.1U_0402_10V7K~D
CH91
0.1U_0402_10V7K~D
1
2
CH90
1U_0402_6.3V6K~D
CH90
1U_0402_6.3V6K~D
1
2
CH71
1U_0603_10V7K~D
CH71
1U_0603_10V7K~D
1
2
CH81
1U_0402_6.3V6K~D
CH81
1U_0402_6.3V6K~D
1 2
CH76
0.1U_0402_10V7K~D
CH76
0.1U_0402_10V7K~D
1
2
CH78
0.1U_0402_10V7K~D
CH78
0.1U_0402_10V7K~D
1
2
CH86
0.1U_0402_10V7K~D
CH86
0.1U_0402_10V7K~D
1
2
CH77
1U_0402_6.3V6K~D
CH77
1U_0402_6.3V6K~D
1
2
CH89
0.1U_0402_10V7K~D
CH89
0.1U_0402_10V7K~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
PCH (8/8)
21 66Monday, May 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
PCH (8/8)
21 66Monday, May 23, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
PCH (8/8)
21 66Monday, May 23, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
UH4I
BD82PPSM-QNHN-A0_BGA989~D
UH4I
BD82PPSM-QNHN-A0_BGA989~D
VSS[159]
AY4
VSS[160]
AY42
VSS[161]
AY46
VSS[162]
AY8
VSS[163]
B11
VSS[164]
B15
VSS[165]
B19
VSS[166]
B23
VSS[167]
B27
VSS[168]
B31
VSS[169]
B35
VSS[170]
B39
VSS[171]
B7
VSS[173]
BB12
VSS[174]
BB16
VSS[175]
BB20
VSS[176]
BB22
VSS[177]
BB24
VSS[178]
BB28
VSS[179]
BB30
VSS[180]
BB38
VSS[181]
BB4
VSS[182]
BB46
VSS[183]
BC14
VSS[184]
BC18
VSS[185]
BC2
VSS[186]
BC22
VSS[187]
BC26
VSS[188]
BC32
VSS[189]
BC34
VSS[190]
BC36
VSS[191]
BC40
VSS[192]
BC42
VSS[193]
BC48
VSS[194]
BD46
VSS[195]
BD5
VSS[196]
BE22
VSS[197]
BE26
VSS[198]
BE40
VSS[199]
BF10
VSS[200]
BF12
VSS[201]
BF16
VSS[202]
BF20
VSS[203]
BF22
VSS[204]
BF24
VSS[205]
BF26
VSS[206]
BF28
VSS[207]
BD3
VSS[208]
BF30
VSS[209]
BF38
VSS[210]
BF40
VSS[211]
BF8
VSS[212]
BG17
VSS[213]
BG21
VSS[214]
BG33
VSS[215]
BG44
VSS[216]
BG8
VSS[217]
BH11
VSS[218]
BH15
VSS[219]
BH17
VSS[220]
BH19
VSS[222]
BH27
VSS[223]
BH31
VSS[224]
BH33
VSS[225]
BH35
VSS[226]
BH39
VSS[227]
BH43
VSS[228]
BH7
VSS[229]
D3
VSS[230]
D12
VSS[231]
D16
VSS[232]
D18
VSS[233]
D22
VSS[234]
D24
VSS[235]
D26
VSS[236]
D30
VSS[237]
D32
VSS[264] K7
VSS[265] L18
VSS[266] L2
VSS[267] L20
VSS[268] L26
VSS[269] L28
VSS[270] L36
VSS[271] L48
VSS[272] M12
VSS[273] P16
VSS[274] M18
VSS[275] M22
VSS[276] M24
VSS[277] M30
VSS[278] M32
VSS[279] M34
VSS[280] M38
VSS[281] M4
VSS[282] M42
VSS[283] M46
VSS[284] M8
VSS[285] N18
VSS[286] P30
VSS[288] P11
VSS[289] P18
VSS[290] T33
VSS[291] P40
VSS[292] P43
VSS[293] P47
VSS[294] P7
VSS[295] R2
VSS[296] R48
VSS[297] T12
VSS[298] T31
VSS[299] T37
VSS[300] T4
VSS[301] W34
VSS[302] T46
VSS[303] T47
VSS[304] T8
VSS[305] V11
VSS[306] V17
VSS[307] V26
VSS[308] V27
VSS[309] V29
VSS[310] V31
VSS[311] V36
VSS[312] V39
VSS[313] V43
VSS[314] V7
VSS[315] W17
VSS[316] W19
VSS[238]
D34
VSS[239]
D38
VSS[240]
D42
VSS[241]
D8
VSS[242]
E18
VSS[243]
E26
VSS[244]
G18
VSS[245]
G20
VSS[246]
G26
VSS[247]
G28
VSS[248]
G36
VSS[249]
G48
VSS[250]
H12
VSS[251]
H18
VSS[317] W2
VSS[318] W27
VSS[319] W48
VSS[320] Y12
VSS[321] Y38
VSS[322] Y4
VSS[323] Y42
VSS[324] Y46
VSS[325] Y8
VSS[328] BG29
VSS[329] N24
VSS[330] AJ3
VSS[287] N47
VSS[252]
H22
VSS[253]
H24
VSS[254]
H26
VSS[255]
H30
VSS[256]
H32
VSS[257]
H34
VSS[258]
F3
VSS[262] K39
VSS[263] K46
VSS[259] H46
VSS[260] K18
VSS[261] K26
VSS[331] AD47
VSS[333] B43
VSS[334] BE10
VSS[335] BG41
VSS[337] G14
VSS[338] H16
VSS[340] T36
VSS[342] BG22
VSS[343] BG24
VSS[344] C22
VSS[345] AP13
VSS[172]
F45
VSS[221]
H10
VSS[346] M14
VSS[347] AP3
VSS[348] AP1
VSS[349] BE16
VSS[350] BC16
VSS[351] BG28
VSS[352] BJ28
UH4H
BD82PPSM-QNHN-A0_BGA989~D
UH4H
BD82PPSM-QNHN-A0_BGA989~D
VSS[1]
AA17
VSS[2]
AA2
VSS[3]
AA3
VSS[5]
AA34
VSS[6]
AB11
VSS[7]
AB14
VSS[8]
AB39
VSS[9]
AB4
VSS[10]
AB43
VSS[11]
AB5
VSS[12]
AB7
VSS[13]
AC19
VSS[14]
AC2
VSS[15]
AC21
VSS[16]
AC24
VSS[17]
AC33
VSS[18]
AC34
VSS[19]
AC48
VSS[20]
AD10
VSS[21]
AD11
VSS[22]
AD12
VSS[23]
AD13
VSS[24]
AD19
VSS[25]
AD24
VSS[26]
AD26
VSS[27]
AD27
VSS[28]
AD33
VSS[29]
AD34
VSS[30]
AD36
VSS[31]
AD37
VSS[33]
AD39
VSS[34]
AD4
VSS[35]
AD40
VSS[36]
AD42
VSS[37]
AD43
VSS[38]
AD45
VSS[39]
AD46
VSS[43]
AF10
VSS[44]
AF12
VSS[46]
AD16
VSS[47]
AF16
VSS[48]
AF19
VSS[49]
AF24
VSS[50]
AF26
VSS[51]
AF27
VSS[52]
AF29
VSS[53]
AF31
VSS[54]
AF38
VSS[55]
AF4
VSS[56]
AF42
VSS[57]
AF46
VSS[59]
AF7
VSS[60]
AF8
VSS[61]
AG19
VSS[62]
AG2
VSS[63]
AG31
VSS[64]
AG48
VSS[65]
AH11
VSS[66]
AH3
VSS[67]
AH36
VSS[68]
AH39
VSS[69]
AH40
VSS[70]
AH42
VSS[71]
AH46
VSS[72]
AH7
VSS[73]
AJ19
VSS[76]
AJ33
VSS[77]
AJ34
VSS[78]
AK12
VSS[79]
AK3
VSS[80] AK38
VSS[81] AK4
VSS[82] AK42
VSS[83] AK46
VSS[84] AK8
VSS[85] AL16
VSS[86] AL17
VSS[87] AL19
VSS[88] AL2
VSS[89] AL21
VSS[90] AL23
VSS[91] AL26
VSS[92] AL27
VSS[93] AL31
VSS[96] AL48
VSS[97] AM11
VSS[98] AM14
VSS[99] AM36
VSS[100] AM39
VSS[102] AM45
VSS[103] AM46
VSS[104] AM7
VSS[105] AN2
VSS[106] AN29
VSS[107] AN3
VSS[108] AN31
VSS[109] AP12
VSS[110] AP19
VSS[111] AP28
VSS[112] AP30
VSS[113] AP32
VSS[114] AP38
VSS[116] AP42
VSS[117] AP46
VSS[118] AP8
VSS[119] AR2
VSS[120] AR48
VSS[121] AT11
VSS[122] AT13
VSS[123] AT18
VSS[124] AT22
VSS[125] AT26
VSS[126] AT28
VSS[127] AT30
VSS[128] AT32
VSS[131] AT42
VSS[132] AT46
VSS[133] AT7
VSS[134] AU24
VSS[135] AU30
VSS[136] AV16
VSS[137] AV20
VSS[138] AV24
VSS[139] AV30
VSS[140] AV38
VSS[141] AV4
VSS[142] AV43
VSS[143] AV8
VSS[144] AW14
VSS[145] AW18
VSS[146] AW2
VSS[147] AW22
VSS[148] AW26
VSS[149] AW28
VSS[150] AW32
VSS[151] AW34
VSS[152] AW36
VSS[153] AW40
VSS[154] AW48
VSS[155] AV11
VSS[156] AY12
VSS[157] AY22
VSS[158] AY28
VSS[40]
AD8
VSS[42]
AE3
VSS[45]
AD14
VSS[115] AP4
VSS[0]
H5
VSS[58]
AF5
VSS[32]
AD38
VSS[4]
AA33
VSS[74]
AJ21
VSS[75]
AJ24
VSS[41]
AE2
VSS[129] AT34
VSS[130] AT39
VSS[101] AM43
VSS[95] AL34
VSS[94] AL33
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
REM_DIODE1_P_4022
REM_DIODE1_N_4022
REM_DIODE2_N_4022
BC_INT#_EMC4022
THERMB3
POWER_SW#
FAN1_TACH_FB
VSET_4022
THERMATRIP2#
FAN1_DET#
REM_DIODE1_P_4022
REM_DIODE1_N_4022
+VCC_4022
3V_PWROK#
VDD_PWRGD THERMATRIP2#
THERMATRIP3#
VSET_4022
+ADDR_XEN
FAN1_TACH_FB
BC_INT#_EMC4022
POWER_SW#
FAN1_DET#
FAN1_TACH_FB
REM_DIODE2_P_4022
VCP2
THERMATRIP3#
VGA_THERMDN
VGA_THERMDP
+3.3V_RUN_EMC_VDDL
FAN1_DET#
VGA_THERMDP
VGA_THERMDN
REM_DIODE2_P_4022
REM_DIODE2_N_4022
EMC4022_GPIO2
EMC4022_GPIO2
+3.3V_M
+3.3V_M
+3.3V_RUN_GFX
+RTC_CELL
+3.3V_M
+1.05V_RUN_VTT
+3.3V_M
+RTC_CELL
+3.3V_M
+5V_RUN
+RTC_CELL
+FAN1_VOUT
+FAN1_VOUT
+VCC_4022
+3.3V_RUN
DOCK_PWR_SW# <41>
POWER_SW_IN# <41>
H_THERMTRIP#<7>
BC_CLK_EMC4022 <41>
BC_DAT_EMC4022 <41>
PCH_PWRGD#<41>
BC_INT#_EMC4022 <41>
ACAV_IN <41,62,63>
THERM_STP# <54>
THERMTRIP_VGA#<45>
VGA_THERMDN <46>
VGA_THERMDP <46>
MAX8731_IINP<62>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
FAN & Thermal Sensor
22 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
FAN & Thermal Sensor
22 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
FAN & Thermal Sensor
22 66Friday, June 10, 2011
Compal Electronics, Inc.
Place under CPU
Place C266 close to the Q12 as possible
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DSC only
Rest=953, Tp=88degree
DELL CONFIDENTIAL/PROPRIETARY
(1) DP3/DN3 for SODIMM on Q14, place Q14 close to SODIMM and C272 close to Q14
(2) DP5/DN5 for Skin on Q13, place Q13 close to Vcore VR choke.
SMSC request
C273
0.1U_0402_25V6K~D
C273
0.1U_0402_25V6K~D
1
2
C270 2200P_0402_50V7K~DC270 2200P_0402_50V7K~D
1 2
R396
8.2K_0402_5%~D
R396
8.2K_0402_5%~D
12
R389 10K_0402_5%~DR389 10K_0402_5%~D
1 2
C738
0.1U_0402_25V6K~D
C738
0.1U_0402_25V6K~D
1
2
E
B
C
Q14
MMBT3904WT1G_SC70-3~D
E
B
C
Q14
MMBT3904WT1G_SC70-3~D
2
3 1
E
B
C
Q13
MMBT3904WT1G_SC70-3~D
E
B
C
Q13
MMBT3904WT1G_SC70-3~D
2
31
R1639 0_0603_5%~DR1639 0_0603_5%~D
1 2
C274
1U_0402_6.3V6K~D
C274
1U_0402_6.3V6K~D
1
2
R406
953_0402_1%~D
R406
953_0402_1%~D
12
C266
100P_0402_50V8J~D
@
C266
100P_0402_50V8J~D
@
1
2
D2
RB751S40T1_SOD523-2~D
D2
RB751S40T1_SOD523-2~D
2 1
C272
100P_0402_50V8J~D
@C272
100P_0402_50V8J~D
@
1
2
C281 0.1U_0402_25V6K~DC281 0.1U_0402_25V6K~D
1 2
C279
0.1U_0402_25V6K~D
C279
0.1U_0402_25V6K~D
1
2
E
B
C
Q115
PMST3904_SOT323-3~D
E
B
C
Q115
PMST3904_SOT323-3~D
2
3 1
R426 10K_0402_5%~DR426 10K_0402_5%~D
12
R385 10K_0402_5%~DR385 10K_0402_5%~D
12
R402 10K_0402_5%~DR402 10K_0402_5%~D
12
R395
8.2K_0402_5%~D
R395
8.2K_0402_5%~D
12
C277
100P_0402_50V8J~D
@
C277
100P_0402_50V8J~D
@
1
2
R403
10K_0402_5%~D
R403
10K_0402_5%~D
12
C278
0.1U_0402_25V6K~D
C278
0.1U_0402_25V6K~D
1
2
EB
C
Q12
MMBT3904WT1G_SC70-3~D
EB
C
Q12
MMBT3904WT1G_SC70-3~D
2
3 1
10U_0805_10V6K~D
C276
10U_0805_10V6K~D
C276
1
2
C1179
1U_0402_6.3V6K~D
C1179
1U_0402_6.3V6K~D
1
2
C275
0.1U_0402_25V6K~D
C275
0.1U_0402_25V6K~D
1
2
C282
0.1U_0402_25V6K~D
C282
0.1U_0402_25V6K~D
1
2
R404 10K_0402_5%~DR404 10K_0402_5%~D
12
U9
EMC4022-1-EZK-TR_QFN32_5X5~D
U9
EMC4022-1-EZK-TR_QFN32_5X5~D
VDDH
2
VDDH
3
DP1/VREF_T
24
DN2/DP4
26
FAN_OUT 4
FAN_OUT 5
THERMTRIP2# 17
VDDL
6
SMDATA/BC_DATA 7
SMCLK/BC_CLK 8
POWER_SW# 20
ACAVAIL_CLR 21
DP2/DN4
27
VSET
28
DN1/THERM
23
SYS_SHDN# 19
THERMTRIP3# 18
GPIO2
11
ATF_INT#/BC_IRQ# 9
TACH/GPIO1
10
3V_PWROK#
12
RTC_PWR3V
16
DN3/DP5
29 DP3/DN5
30
VCP
31
ADDR_MODE/XEN 32
VDD 1
VSS 33
VDD_PWRGD
13
GPIO3/PWM/THERMTRIP_SIO
15
VIN
25
TEST1 14
TEST2 22
R3934.7K_0402_5%~D R3934.7K_0402_5%~D
1 2
R391 1K_0402_1%~DR391 1K_0402_1%~D
1 2
R398
2.2K_0402_5%~D
R398
2.2K_0402_5%~D
1 2
C219
22U_0805_6.3V6M~D
C219
22U_0805_6.3V6M~D
1
2
C1104
470P_0402_50V7K~D
C1104
470P_0402_50V7K~D
1
2
R388
22_0402_5%~D
R388
22_0402_5%~D
12
U10
TC7SH08FU_SSOP5~D
U10
TC7SH08FU_SSOP5~D B1
A2
G
3
O
4
P5
R390 47K_0402_1%~D@R390 47K_0402_1%~D@1 2
R399
2.2K_0402_5%~D
R399
2.2K_0402_5%~D
12
C271 2200P_0402_50V7K~DC271 2200P_0402_50V7K~D
1 2
E
B
C
Q15
PMST3904_SOT323-3~D
E
B
C
Q15
PMST3904_SOT323-3~D
2
3 1
R3874.7K_0402_5%~D R3874.7K_0402_5%~D 12
JFAN1
MOLEX_53398-0471~D
CONN@
JFAN1
MOLEX_53398-0471~D
CONN@
1
1
2
2
3
3
4
4G1 5
G2 6
R400
10K_0402_5%~D
@
R400
10K_0402_5%~D
@
12
C305
10U_0603_6.3V6M~D
C305
10U_0603_6.3V6M~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LDDC_DATA_PCH
LDDC_CLK_PCH
LDDC_CLK_GPU
LDDC_DATA_GPU
DGPU_SELECT#
LDDC_DATA_PCH
LDDC_CLK_PCH
LDDC_CLK_GPU
LDDC_DATA_GPU
DGPU_SELECT#
+3.3V_RUN
+3.3V_RUN_GFX
+3.3V_RUN +3.3V_RUN
DGPU_SELECT# <24,25,40>
SW_LVDS_A0+ <24>
SW_LVDS_A0- <24>
SW_LVDS_A1+ <24>
SW_LVDS_A1- <24>
SW_LVDS_A2+ <24>
SW_LVDS_A2- <24>
SW_LVDS_ACLK+ <24>
SW_LVDS_ACLK- <24>
LDDC_DATA_GPU<45> LDDC_CLK_GPU<45>
LCD_ACLK+_GPU<46> LCD_ACLK-_GPU<46>
LCD_A2-_GPU<46> LCD_A2+_GPU<46>
LCD_A1+_GPU<46> LCD_A1-_GPU<46> LCD_A0+_GPU<46> LCD_A0-_GPU<46>
LDDC_DATA_PCH<16> LDDC_CLK_PCH<16>
LCD_A0+_PCH<16> LCD_A0-_PCH<16>
LCD_A1+_PCH<16> LCD_A1-_PCH<16>
LCD_A2+_PCH<16> LCD_A2-_PCH<16>
LCD_ACLK+_PCH<16> LCD_ACLK-_PCH<16>
SW_LVDS_B1+ <24>
SW_LVDS_B0- <24>
SW_LVDS_B0+ <24>
SW_LVDS_B2- <24>
SW_LVDS_B2+ <24>
SW_LVDS_B1- <24>
SW_LVDS_BCLK- <24>
SW_LVDS_BCLK+ <24>
LCD_BCLK+_GPU<46> LCD_BCLK-_GPU<46>
LCD_B2-_GPU<46> LCD_B2+_GPU<46>
LCD_B1+_GPU<46> LCD_B1-_GPU<46>
LCD_B0-_GPU<46> LCD_B0+_GPU<46>
LCD_B0+_PCH<16> LCD_B0-_PCH<16>
LCD_B1+_PCH<16> LCD_B1-_PCH<16>
LCD_B2+_PCH<16> LCD_B2-_PCH<16>
LCD_BCLK+_PCH<16> LCD_BCLK-_PCH<16>LDDC_CLK_SW <24>
LDDC_DATA_SW <24>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
LVDS SW
23 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
LVDS SW
23 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
LVDS SW
23 66Friday, June 10, 2011
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
Channel A
Source
PCH
GPUCOM=NC
COM=NO
ChanelSEL
0
1
Channel B
Source
PCH
GPUCOM=NC
COM=NO
ChanelSEL
0
1
R1122 2.2K_0402_5%~DR1122 2.2K_0402_5%~D
1 2
C1150
0.1U_0402_25V6K~D
@C1150
0.1U_0402_25V6K~D
@
1
2
C1146
0.1U_0402_25V6K~D
@C1146
0.1U_0402_25V6K~D
@
1
2
R1121 2.2K_0402_5%~DR1121 2.2K_0402_5%~D
1 2
R1124 2.2K_0402_5%~DR1124 2.2K_0402_5%~D
1 2
R1123 2.2K_0402_5%~DR1123 2.2K_0402_5%~D
1 2
U84
MAX14979EETX+T_TQFN36_6X6~D
U84
MAX14979EETX+T_TQFN36_6X6~D
AUX2A
14
NO3-
15
NC3+
18
NO2-
19
NC0-
30
NC2+
22
NO1-
23
NC1+
26
SEL 27
NC0+
31
COM3+ 9
NO3+
16
NC3-
17 COM0+ 36
AUX0 34
NO2+
20
NC2-
21
NO1+
24
NC1-
25
NO0-
28 NO0+
29
AUX2B
6
AUX2
32
AUX1B
5
AUX0A 4
COM2- 8
COM3- 10
COM2+ 7
AUX1
33
GND 11
AUX0B 12
COM1- 3
COM1+ 2
TPAD 37
AUX1A
13
V+ 35
COM0- 1
C1145
0.1U_0402_25V6K~D
C1145
0.1U_0402_25V6K~D
1
2
U85
MAX14979EETX+T_TQFN36_6X6~D
U85
MAX14979EETX+T_TQFN36_6X6~D
AUX2A
14
NO3-
15
NC3+
18
NO2-
19
NC0-
30
NC2+
22
NO1-
23
NC1+
26
SEL 27
NC0+
31
COM3+ 9
NO3+
16
NC3-
17 COM0+ 36
AUX0 34
NO2+
20
NC2-
21
NO1+
24
NC1-
25
NO0-
28 NO0+
29
AUX2B
6
AUX2
32
AUX1B
5
AUX0A 4
COM2- 8
COM3- 10
COM2+ 7
AUX1
33
GND 11
AUX0B 12
COM1- 3
COM1+ 2
TPAD 37
AUX1A
13
V+ 35
COM0- 1
C1149
0.1U_0402_25V6K~D
C1149
0.1U_0402_25V6K~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PWR_SRC_ON
EN_INVPWR
EN_LCDPWR
USBP12+
USBP12- USBP12_D-
USBP12_D+
USBP12_D+
USBP12_D-
DMIC_CLK
DMIC0
LCD_TST
DISP_ON
BIA_PWM_LVDS
LDDC_CLK_SW
LDDC_DATA_SW
LDDC_DATA_SW
LDDC_CLK_SW
DISP_ON
BIA_PWM_LVDS
CCD_OFF
CAM_MIC_CBL_DET#
+3.3V_ALW
+PWR_SRC_S +3.3V_ALW
+LCDVDD
+LCDVDD
+PWR_SRC
+BL_PWR_SRC
+CAMERA_VDD
+3.3V_RUN
+5V_TSP
+LCDVDD
+5V_TSP
+CAMERA_VDD
+LCDVDD
+BL_PWR_SRC
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN
+5V_TSP +5V_RUN+5V_RUN
+3.3V_RUN
+5V_ALW
LCD_VCC_TEST_EN<40>
ENVDD_GPU<45>
EN_INVPWR<41>
USBP12-<17>
USBP12+<17>
DMIC0 <30>
DMIC_CLK <30>
LCD_TST <40>
LCD_CBL_DET# <17>
BATT_WHITE_LED <44>
BATT_YELLOW_LED <44>
BREATH_WHITE_LED <44>
BIA_PWM_EC <41>
ENVDD_PCH<16,40>
SW_LVDS_BCLK- <23>
SW_LVDS_BCLK+ <23>
SW_LVDS_A0- <23>
SW_LVDS_A0+ <23>
SW_LVDS_A1+ <23>
SW_LVDS_A1- <23>
SW_LVDS_A2- <23>
SW_LVDS_A2+ <23>
SW_LVDS_ACLK+ <23>
SW_LVDS_ACLK- <23>
LDDC_DATA_SW <23>
LDDC_CLK_SW <23>
SW_LVDS_B0+ <23>
SW_LVDS_B0- <23>
SW_LVDS_B1- <23>
SW_LVDS_B1+ <23>
SW_LVDS_B2- <23>
SW_LVDS_B2+ <23>
PANEL_BKEN_EC <40>
BIA_PWM_PCH <16>
BIA_PWM_GPU <45>
PANEL_BKEN_PCH <16>
PANEL_BKEN_DGPU <45>
E3_PAID_TS_DET#<18>
TOUCH_SCREEN_PD#<40>
DGPU_SELECT#<23,25,40>
USBP13-<17> USBP13+<17>
CCD_OFF<40>
CAM_MIC_CBL_DET# <17>
PANEL_HDD_LED <44>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
eDP & CAM &TS Conn
24 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
eDP & CAM &TS Conn
24 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
eDP & CAM &TS Conn
24 66Friday, June 10, 2011
Compal Electronics, Inc.
Panel backlight power control by EC
LCD Power
DELL CONFIDENTIAL/PROPRIETARY
FDC654P: P CHANNAL
40mil
40mil
For Webcam
Touch Screen Connector
Place close JTCH1
Close to JLVDS1.42,43
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Close to JLVD1.41
Place near to JLVDS1
+5V_ALW for panel side LED power
Webcam PWR CTRL
R413
130_0402_1%~D
R413
130_0402_1%~D
12
C43
5P_0402_50V8C~D
@
C43
5P_0402_50V8C~D
@
1
2
D6
BAT54CW_SOT323-3~D
D6
BAT54CW_SOT323-3~D
1
2
3
C246 0.1U_0603_50V7K~DC246 0.1U_0603_50V7K~D
1 2
C306
0.1U_0402_25V6K~D
C306
0.1U_0402_25V6K~D
1
2
R1138
100K_0402_5%~D
R1138
100K_0402_5%~D
12
R414
10K_0402_5%~D
R414
10K_0402_5%~D
12
R1137
10K_0402_5%~D
R1137
10K_0402_5%~D
12
C296
0.1U_0603_50V7K~D
C296
0.1U_0603_50V7K~D
1
2
Q125A
DMN66D0LDW-7_SOT363-6~D
Q125A
DMN66D0LDW-7_SOT363-6~D
61
2
D53
RB751V-40GTE-17_SOD323-2~D
D53
RB751V-40GTE-17_SOD323-2~D
2 1
D69
RB751V-40GTE-17_SOD323-2~D
D69
RB751V-40GTE-17_SOD323-2~D
21
R423 47K_0402_5%~DR423 47K_0402_5%~D
1 2
D64
RB751V-40GTE-17_SOD323-2~D
D64
RB751V-40GTE-17_SOD323-2~D
21
S
G
D
Q21
FDC654P-G_SSOT-6~D
S
G
D
Q21
FDC654P-G_SSOT-6~D
3
6
2
4 5
1
D68
RB751V-40GTE-17_SOD323-2~D
D68
RB751V-40GTE-17_SOD323-2~D
21
R159 2.2K_0402_5%~DR159 2.2K_0402_5%~D
1 2
L10
DLW21SN121SQ2L_4P~D
@L10
DLW21SN121SQ2L_4P~D
@
1
1
4
433
22
R412
100K_0402_5%~D
R412
100K_0402_5%~D
12
R160 2.2K_0402_5%~DR160 2.2K_0402_5%~D
1 2
C302
0.1U_0402_10V7K~D
C302
0.1U_0402_10V7K~D
1
2
JLVDS1
ACES_59003-0400C-001
CONN@
JLVDS1
ACES_59003-0400C-001
CONN@
VR_SRC 7
LCD_B_CLK- 16
VR_GND 14
VR_SRC 5
BATT_YELLOW_LED 3
GND 1
LVDS_B0- 23
LVDS_B2+ 18
VR_GND 13
GND 24
LVDS_A_CLK+ 25
GND 27
LVDS_A2- 29
LVDS_A1+ 30
LCD_VDD 38
EDID_CLK 35
V_EDID 37
LVDS_A0- 33
VR_SRC 6
LCD_B_CLK+ 15
VR_GND 12
BREATH_WHITE_LED 4
BATT_WHITE_LED 2
LVDS_B1- 21
LVDS_B0+ 22
GND 17
LVDS_B2- 19
LVDS_B1+ 20
LVDS_A_CLK- 26
LVDS_A2+ 28
LVDS_A1- 31
LVDS_A0+ 32
LCD_VDD 39
BIST 36
EDID_DATA 34
CONNTST 40
MGND1
41 MGND2
42 MGND3
43 MGND4
44 MGND5
45 MGND6
46
NC 8
PWM 10
DISP_ON/OFF# 9
CONNTST_GND 11
C298
0.1U_0402_25V6K~D
C298
0.1U_0402_25V6K~D
1
2
C243
0.1U_0402_25V6K~D
C243
0.1U_0402_25V6K~D
1
2
Q19A
DMN66D0LDW-7_SOT363-6~D
Q19A
DMN66D0LDW-7_SOT363-6~D
61
2
C293
0.1U_0402_25V6K~D
C293
0.1U_0402_25V6K~D
1
2
D86
PESD5V0U2BT_SOT23-3~D
@D86
PESD5V0U2BT_SOT23-3~D
@
2
3
1
R428 0_0402_5%~DR428 0_0402_5%~D
1 2
S
G
D
Q18
SI3456DDV-T1-GE3_TSOP6~D
S
G
D
Q18
SI3456DDV-T1-GE3_TSOP6~D
3
6
2
4 5
1
G
D
S
Q22
SSM3K7002FU_SC70-3~D
G
D
S
Q22
SSM3K7002FU_SC70-3~D
2
1 3
R431
10K_0402_5%~D
R431
10K_0402_5%~D
12
LE92 BLM18BB221SN1D_2P~DLE92 BLM18BB221SN1D_2P~D
1 2
JCAM1
JST_BM08B-SRSS-TB1-LF-SN~D
CONN@
JCAM1
JST_BM08B-SRSS-TB1-LF-SN~D
CONN@
11
22
33
44
55
66
77
88
G1 9
G2 10
Q20
PDTC124EU_SC70-3~D
Q20
PDTC124EU_SC70-3~D
2
13
C244
0.1U_0402_10V7K~D
C244
0.1U_0402_10V7K~D
1 2
D67
RB751V-40GTE-17_SOD323-2~D
D67
RB751V-40GTE-17_SOD323-2~D
21
R1632
1M_0402_5%~D
R1632
1M_0402_5%~D
12
C301
0.1U_0402_25V6K~D
C301
0.1U_0402_25V6K~D
1
2
U3
74AHCT1G125GW_SOT353-5~D
U3
74AHCT1G125GW_SOT353-5~D
A2
Y
4
P5
G
3
OE# 1
R427 0_0402_5%~DR427 0_0402_5%~D
1 2
C292
0.1U_0402_25V6K~D
C292
0.1U_0402_25V6K~D
1
2
G
D
S
Q32
PMV65XP_SOT23-3~D
G
D
S
Q32
PMV65XP_SOT23-3~D
2
1 3
D66
RB751V-40GTE-17_SOD323-2~D
D66
RB751V-40GTE-17_SOD323-2~D
21
C299
0.1U_0402_25V6K~D
C299
0.1U_0402_25V6K~D
1
2
Q19B
DMN66D0LDW-7_SOT363-6~D
Q19B
DMN66D0LDW-7_SOT363-6~D
3
5
4
C41
5P_0402_50V8C~D
@
C41
5P_0402_50V8C~D
@
1
2
C42
5P_0402_50V8C~D
@
C42
5P_0402_50V8C~D
@
1
2
D8
PESD5V0U2BT_SOT23-3~D
D8
PESD5V0U2BT_SOT23-3~D
2
3
1
G
D
S
Q23
PMV65XP_SOT23-3~D
G
D
S
Q23
PMV65XP_SOT23-3~D
2
1 3
R422
100K_0402_5%~D
R422
100K_0402_5%~D
12
10U_0805_10V6K~D
C300
10U_0805_10V6K~D
C300
1
2
JTCH1
TYCO_1734595-6
CONN@
JTCH1
TYCO_1734595-6
CONN@
1
1
2
2
3
3
4
4
5
5
6
6
G1
7G2 8
C40
5P_0402_50V8C~D
@
C40
5P_0402_50V8C~D
@
1
2
C297
1000P_0402_50V7K~D
C297
1000P_0402_50V7K~D
1
2
Q125B
DMN66D0LDW-7_SOT363-6~D
Q125B
DMN66D0LDW-7_SOT363-6~D
3
5
4
2
2
1
1
B B
A A
CRT_SWITCH
CRT_SWITCH
CRT_EN
+3.3V_RUN
+3.3V_RUN
+5V_RUN
CRT_SWITCH<40> EDID_SELECT#<40>
DGPU_SELECT#<23,24,40>
GPU_CRT_VSYNC<45>
GPU_CRT_HSYNC<45>
GPU_CRT_RED<45>
GPU_CRT_GRN<45>
GPU_CRT_BLU<45>
GPU_CRT_CLK_DDC<45>
GPU_CRT_DAT_DDC<45> PCH_CRT_DDC_DAT<16>
PCH_CRT_VSYNC<16>
PCH_CRT_HSYNC<16>
PCH_CRT_DDC_CLK<16>
PCH_CRT_RED<16>
PCH_CRT_GRN<16>
PCH_CRT_BLU<16> RED_CRT <31>
GREEN_CRT <31>
HSYNC_BUF <31>
BLUE_CRT <31>
DAT_DDC2_CRT <31>
CLK_DDC2_CRT <31>
VSYNC_BUF <31>
RED_DOCK <39>
GREEN_DOCK <39>
BLUE_DOCK <39>
DAT_DDC2_DOCK <39>
CLK_DDC2_DOCK <39>
HSYNC_DOCK <39>
VSYNC_DOCK <39>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
CRT/Video switch
25 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
CRT/Video switch
25 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
CRT/Video switch
25 66Friday, June 10, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
1
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Channel A --> GPU
Channel B --> PCH
Port 1 --> MB Port RGB
Port 2 --> Docking Port RGB
CRT_SWITCH
DGPU_SELECT#
EDID_SELECT#
A --> Port 1 B --> Port 1 A --> Port 2 B --> Port 2
0
0
0
0
01 1
10
1 1
MAX14885E
U18
MAX14885EETL+T_TQFN40_5X5~D
MAX14885E
U18
MAX14885EETL+T_TQFN40_5X5~D
SVA
4
SCL1 35
SDA1 34
SDAB
16
S10
39
SH1 37
BLUA
9
SHA
3
BLUB
19
SV1 36
SV2 27
GRN2 23
BLU1 31
SHB
13
GRNA
8
SH2 28
SDA2 25
GRNB
18
SCLB
15
S00
1
RED1 33
S01
40
NC 12
GND
30
GRN1 32
GND
20
GND
10
RED2 24
BLU2 22
SCLA
5
SDAA
6
SVB
14
REDB
17 REDA
7
S11
38
SCL2 26
EN
2
VCC 29
VCC 21
VL 11
GPAD
41
C1181
1U_0402_6.3V6K~D
C1181
1U_0402_6.3V6K~D
1
2
C1182
1U_0603_10V7K~D
C1182
1U_0603_10V7K~D
1
2
R416 100K_0402_5%~DR416 100K_0402_5%~D
1 2
2
2
1
1
B B
A A
TMDSE_CON_N2
HDMI_HPD_SINK_R
HDMI_CEC
TMDSE_CON_P1
HDMI_SDA_SINK
HDMI_SCL_SINK
TMDSE_CON_N0
TMDSE_CON_CLK#
TMDSE_CON_P0
TMDSE_CON_P2
TMDSE_CON_N1
TMDSE_CON_CLK
TMDSE_CON_N2
TMDSE_CON_P0
TMDSE_CON_N1
TMDSE_CON_CLK
TMDSE_CON_N0
TMDSE_CON_CLK#
TMDSE_CON_P2
TMDSE_CON_P1
DPE_GPU_HPD
HDMI_CEC
HDMI_OE#
HDMI_HPD_SINK
+3.3V_RUN_HDMI
TMDSE_RP_N2
TMDSE_RP_P2
TMDSE_RP_N1
TMDSE_RP_P1
TMDSE_RP_N0
TMDSE_RP_P0
TMDSE_RP_CLK#
TMDSE_RP_CLK
TMDSE_GPU_C_P0
TMDSE_GPU_C_N0
TMDSE_GPU_C_P1
TMDSE_GPU_C_N1
TMDSE_GPU_C_CLK#
TMDSE_GPU_C_N2
TMDSE_GPU_C_CLK
TMDSE_GPU_C_P2
HDMI_HPD_SINK
HDMI_EMI1
HDMI_APD
HDMI_PEQ
HDMI_HPD_SINK
+5V_HDMI_DDC
HDMI_PRE
HDMI_EMI0
HDMI_OE#
HDMI_SCL_SINK
HDMI_SDA_SINK
HDMI_PIO
HDMI_EMI0
HDMI_PIO
HDMI_APD
HDMI_PRE
HDMI_EMI1
HDMI_PEQ
TMDSE_RP_CLK#
TMDSE_RP_CLK
TMDSE_RP_P0
TMDSE_RP_N0
TMDSE_RP_N1
TMDSE_RP_P1
TMDSE_RP_P2
TMDSE_RP_N2
+VDISPLAY_VCC
+5V_RUN
+5V_RUN_HDMI
+3.3V_RUN_HDMI
+3.3V_RUN
+3.3V_RUN_HDMI
+3.3V_RUN_HDMI
+5V_RUN
+3.3V_RUN_HDMI
+3.3V_RUN_HDMI
+3.3V_RUN_HDMI
+3.3V_RUN_HDMI
+3.3V_RUN_HDMI
+3.3V_RUN_HDMI
+3.3V_RUN_HDMI
DPE_GPU_HPD <45>
TMDS_E_GPU_DDC <46>
TMDS_E_GPU_DDC# <46>
TMDSE_GPU_P0<46> TMDSE_GPU_N0<46>
TMDSE_GPU_N1<46> TMDSE_GPU_P1<46>
TMDSE_GPU_CLK<46> TMDSE_GPU_CLK#<46>
TMDSE_GPU_N2<46> TMDSE_GPU_P2<46>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
HDMI port
26 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
HDMI port
26 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
HDMI port
26 66Friday, June 10, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Close to U19 VCC pins
High level Mid level
HIGH LOW MID
NoSetting1 Setting2
PIO (HPD setting) HPD=HPD_SINKHPD=HPD_SINK#
EnableAPD (Auto power down) Disable
PEQ (level of EQ)
PRE (pre-emphasis) NoLow level High level
DDCBUF (Active Buffer)
Low level
C340
0.1U_0402_25V6K~D
@
C340
0.1U_0402_25V6K~D
@
1
2
JHDMI1
TYCO_2041270-1
CONN@
JHDMI1
TYCO_2041270-1
CONN@
D2+
1D2_shield
2D2-
3D1+
4D1_shield
5D1-
6D0+
7D0_shield
8D0-
9CK+
10 CK_shield
11 CK-
12 CEC
13 Reserved
14 SCL
15 SDA
16 DDC/CEC_GND
17 +5V
18 HP_DET
19
GND 20
GND 21
GND 22
GND 23
R468 0_0402_5%~D@R468 0_0402_5%~D@1 2
C352 0.1U_0402_10V7K~DC352 0.1U_0402_10V7K~D
12
C358
2.2U_0603_6.3V6K~D
C358
2.2U_0603_6.3V6K~D
1
2
10U_0805_10V6K~D
C338
10U_0805_10V6K~D
C338
1
2
R485 4.7K_0402_5%~D@R485 4.7K_0402_5%~D@1 2
R1128 100K_0402_5%~DR1128 100K_0402_5%~D
1 2
R469 0_0402_5%~D@R469 0_0402_5%~D@1 2
R460 1.5K_0402_5%~DR460 1.5K_0402_5%~D
1 2
R481 4.7K_0402_5%~D@R481 4.7K_0402_5%~D@1 2
U19
PS8171QFN48G_QFN48_7X7
U19
PS8171QFN48G_QFN48_7X7
EMI1
33
OUT1p 22
OUT1n 23
OUT2p 19
OUT2n 20
OUT3p 16
OUT3n 17
OUT4p 13
OUT4n 14
VCC5 40
VCC6 46
IN1p
39
IN1n
38
IN2p
42
IN2n
41
IN3p
45
IN3n
44
IN4p
48
IN4n
47
VCC1 2
PEQ
3
PIO
4
SDA 8
SCL 9
ASQ0
1
REXT
6
CEXT
10
HPDX 7
HPD_SINK
30
GND5
36
APD
11
GND3
24
GND4
31
EMI0
27
VCC2 15
GND2
18
VCC3 21
GND1
5
ASQ1
12
GND6
37
GND7
43
DDCBUF
34
PRE
35
DDC_EN
32
OE#
25
VCC4 26
SDA_SINK
29
SCL_SINK
28
GND8
49
L21
DLW21SN900HQ2L_0805_4P~D
L21
DLW21SN900HQ2L_0805_4P~D
1
122
33
4
4
R1164
10K_0402_5%~D
R1164
10K_0402_5%~D
1 2
C353 0.1U_0402_10V7K~DC353 0.1U_0402_10V7K~D
12
R486 4.7K_0402_5%~D@R486 4.7K_0402_5%~D@1 2
R1165 10K_0402_5%~DR1165 10K_0402_5%~D
12
R451 0_0402_5%~D@R451 0_0402_5%~D@1 2
PJP54
PAD-OPEN1x1m
@PJP54
PAD-OPEN1x1m
@
12
R459 0_0402_5%~D@R459 0_0402_5%~D@1 2
R467
499_0402_1%~D
R467
499_0402_1%~D
12
C351 0.1U_0402_10V7K~DC351 0.1U_0402_10V7K~D
12
R482 4.7K_0402_5%~D@R482 4.7K_0402_5%~D@1 2
R471 0_0402_5%~D@R471 0_0402_5%~D@1 2
C355
0.1U_0402_25V6K~D
C355
0.1U_0402_25V6K~D
1
2
C347 0.1U_0402_10V7K~DC347 0.1U_0402_10V7K~D
12
R480 4.7K_0402_5%~D@R480 4.7K_0402_5%~D@1 2
R484 4.7K_0402_5%~D@R484 4.7K_0402_5%~D@1 2
R475 4.7K_0402_5%~DR475 4.7K_0402_5%~D
1 2
R470 0_0402_5%~D@R470 0_0402_5%~D@1 2
R477 4.7K_0402_5%~D@R477 4.7K_0402_5%~D@1 2
R478 4.7K_0402_5%~D@R478 4.7K_0402_5%~D@1 2
R5
0_1206_5%~D
@R5
0_1206_5%~D
@
1 2
C350 0.1U_0402_10V7K~DC350 0.1U_0402_10V7K~D
12
R461 1.5K_0402_5%~DR461 1.5K_0402_5%~D
1 2
G
D
S
Q25
SSM3K7002FU_SC70-3~D
G
D
S
Q25
SSM3K7002FU_SC70-3~D
2
13
C346 0.1U_0402_10V7K~DC346 0.1U_0402_10V7K~D
12
L20
DLW21SN900HQ2L_0805_4P~D
L20
DLW21SN900HQ2L_0805_4P~D
1
122
33
4
4
C342
0.1U_0402_25V6K~D
@
C342
0.1U_0402_25V6K~D
@
1
2
D70
RB751V-40GTE-17_SOD323-2~D
@
D70
RB751V-40GTE-17_SOD323-2~D
@
21
C354
0.01U_0402_25V7K~D
C354
0.01U_0402_25V7K~D
1
2
R479 4.7K_0402_5%~D@R479 4.7K_0402_5%~D@1 2
C348 0.1U_0402_10V7K~DC348 0.1U_0402_10V7K~D
12
L22
DLW21SN900HQ2L_0805_4P~D
L22
DLW21SN900HQ2L_0805_4P~D
1
122
33
4
4
C344
0.1U_0402_25V6K~D
@
C344
0.1U_0402_25V6K~D
@
1
2
R474 4.7K_0402_5%~D@R474 4.7K_0402_5%~D@12
R487 4.7K_0402_5%~D@R487 4.7K_0402_5%~D@1 2
F2
0.5A_15V_SMD1812P050TF
F2
0.5A_15V_SMD1812P050TF
21
C349 0.1U_0402_10V7K~DC349 0.1U_0402_10V7K~D
12
R443
4.7K_0402_5%~D
R443
4.7K_0402_5%~D
12
R472 4.7K_0402_5%~DR472 4.7K_0402_5%~D
1 2
R483 4.7K_0402_5%~D@R483 4.7K_0402_5%~D@1 2
L19
DLW21SN900HQ2L_0805_4P~D
L19
DLW21SN900HQ2L_0805_4P~D
1
122
33
4
4
R473 4.7K_0402_5%~D@R473 4.7K_0402_5%~D@1 2
R462 0_0402_5%~D@R462 0_0402_5%~D@1 2
C337
0.1U_0402_10V7K~D
C337
0.1U_0402_10V7K~D
1
2
R476 4.7K_0402_5%~D@R476 4.7K_0402_5%~D@1 2
NC
D4
BAT1000-7-F_SOT23-3~D
NC
D4
BAT1000-7-F_SOT23-3~D
21 3
R466 0_0402_5%~D@R466 0_0402_5%~D@1 2
R1168
0_0402_5%~D
R1168
0_0402_5%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DPC_GPU_AUX_CDPC_GPU_AUX/DDC
DPC_GPU_AUX#_CDPC_GPU_AUX#/DDC
DPC_DOCK_AUX DPC_GPU_AUX/DDC
DPC_CA_DET#DPC_CA_DET
DPC_GPU_AUX#/DDCDPC_DOCK_AUX#
DPD_CA_DET
DPC_CA_DET
DPD_GPU_AUX_CDPD_GPU_AUX/DDC
DPD_GPU_AUX#_CDPD_GPU_AUX#/DDC
DPD_DOCK_AUX DPD_GPU_AUX/DDC
DPD_CA_DET#DPD_CA_DET
DPD_GPU_AUX#/DDCDPD_DOCK_AUX#
DPD_DOCK_AUX
DPD_DOCK_AUX#
DPC_DOCK_AUX
DPC_DOCK_AUX#
DPD_CA_DET
DPC_CA_DET
+5V_RUN
+3.3V_RUN
+5V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_ALW2
+3.3V_RUN
+3.3V_RUN
+3.3V_ALW2
+3.3V_RUN
+5V_RUN
+5V_RUN
DPC_CA_DET<39> DPD_CA_DET<39>
DPC_GPU_AUX/DDC<46>
DPC_GPU_AUX#/DDC<46>
DPC_DOCK_AUX<39>
DPC_DOCK_AUX#<39>
DPD_DOCK_AUX<39>
DPD_DOCK_AUX#<39>
DPD_GPU_AUX/DDC<46>
DPD_GPU_AUX#/DDC<46>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
DP AUX SW
27 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
DP AUX SW
27 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
DP AUX SW
27 66Friday, June 10, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
AUX/DDC GPU for DPC to E-DOCK AUX/DDC GPU for DPD to E-DOCK
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
There is a new die for PI3C3125. Sample availabe on May.
C367
0.1U_0402_10V7K~D
C367
0.1U_0402_10V7K~D
12
U23
PI3C3125LEX_TSSOP14~D
U23
PI3C3125LEX_TSSOP14~D
B3 11
B1
6
BE1
4
A1
5
A2 9
GND
7
A3 12
VCC 14
B2 8
BE3 13
A0
2
B0
3
BE0
1
BE2 10
Q113A
DMN66D0LDW-7_SOT363-6~D
Q113A
DMN66D0LDW-7_SOT363-6~D
61
2
Q110B
DMN66D0LDW-7_SOT363-6~D
Q110B
DMN66D0LDW-7_SOT363-6~D
3
5
4
R492 1M_0402_5%~DR492 1M_0402_5%~D
1 2
C360 0.1U_0402_10V7K~DC360 0.1U_0402_10V7K~D
12
Q109B
DMN66D0LDW-7_SOT363-6~D
Q109B
DMN66D0LDW-7_SOT363-6~D
3
5
4
R1064 0_0402_5%~D@R1064 0_0402_5%~D@1 2
R1530
2.2K_0402_5%~D
R1530
2.2K_0402_5%~D
12
C365
0.1U_0402_25V6K~D
C365
0.1U_0402_25V6K~D
12
U21
NC7SZ04P5X-G_SC70-5~D
U21
NC7SZ04P5X-G_SC70-5~D
A
2Y4
P5
NC 1
G
3
R1063
100K_0402_5%~D
R1063
100K_0402_5%~D
12
C368 0.1U_0402_10V7K~DC368 0.1U_0402_10V7K~D
12
C1175
0.01U_0402_16V7K~D
C1175
0.01U_0402_16V7K~D
1
2
Q111A
DMN66D0LDW-7_SOT363-6~D
Q111A
DMN66D0LDW-7_SOT363-6~D
61
2
U24
NC7SZ04P5X-G_SC70-5~D
U24
NC7SZ04P5X-G_SC70-5~D
A
2Y4
P5
NC 1
G
3
Q109A
DMN66D0LDW-7_SOT363-6~D
Q109A
DMN66D0LDW-7_SOT363-6~D
61
2
C369
0.1U_0402_25V6K~D
C369
0.1U_0402_25V6K~D
12
U20
PI3C3125LEX_TSSOP14~D
U20
PI3C3125LEX_TSSOP14~D
B3 11
B1
6
BE1
4
A1
5
A2 9
GND
7
A3 12
VCC 14
B2 8
BE3 13
A0
2
B0
3
BE0
1
BE2 10
R1066
2.2K_0402_5%~D
R1066
2.2K_0402_5%~D
12
R1539
2.2K_0402_5%~D
R1539
2.2K_0402_5%~D
12
R1065
100K_0402_5%~D
R1065
100K_0402_5%~D
12
C357
0.1U_0402_10V7K~D
C357
0.1U_0402_10V7K~D
12
R1523 0_0402_5%~D@R1523 0_0402_5%~D@1 2
R1062
2.2K_0402_5%~D
R1062
2.2K_0402_5%~D
12
C366
0.1U_0402_25V6K~D
C366
0.1U_0402_25V6K~D
1 2
Q111B
DMN66D0LDW-7_SOT363-6~D
Q111B
DMN66D0LDW-7_SOT363-6~D
3
5
4
C356
0.1U_0402_25V6K~D
C356
0.1U_0402_25V6K~D
1 2
R1067 0_0402_5%~D@R1067 0_0402_5%~D@1 2
Q113B
DMN66D0LDW-7_SOT363-6~D
Q113B
DMN66D0LDW-7_SOT363-6~D
3
5
4
C1174
0.01U_0402_16V7K~D
C1174
0.01U_0402_16V7K~D
1
2
Q110A
DMN66D0LDW-7_SOT363-6~D
Q110A
DMN66D0LDW-7_SOT363-6~D
61
2
R1538 0_0402_5%~D@R1538 0_0402_5%~D@1 2
R1532
100K_0402_5%~D
R1532
100K_0402_5%~D
12
R1537
100K_0402_5%~D
R1537
100K_0402_5%~D
12
R491 1M_0402_5%~DR491 1M_0402_5%~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SATA_PRX_DTX_N0
SATA_PRX_DTX_P0
SATA_PTX_DRX_P0
SATA_PTX_DRX_N0
HDD_DET#
HDD_EN_5V
FFS_INT2
HDD_FALL_INT
DDR_XDP_WAN_SMBDAT
DDR_XDP_WAN_SMBCLK
FFS_INT2_Q
HDD_FALL_INT
+3.3V_RUN_FFS
+3.3V_RUN_HDD
FFS_INT2
FFS_INT2_Q
+5V_HDD
+5V_HDD
+5V_HDD
+5V_ALW
+5V_RUN
+3.3V_ALW2
+3.3V_RUN
+3.3V_RUN
+3.3V_RUN_HDD
+3.3V_RUN
+PWR_SRC_S
+5V_HDD
+3.3V_RUN
HDD_DET#<14>
HDD_FALL_INT<17>
DDR_XDP_WAN_SMBCLK<7,12,13,14,15,35> DDR_XDP_WAN_SMBDAT<7,12,13,14,15,35>
SIO_SLP_S3#<11,16,36,40,43,56>
RUN_ON<36,40,43,56,64>
FFS_INT2<18>
PSATA_PTX_DRX_P0_C<14> PSATA_PTX_DRX_N0_C<14>
PSATA_PRX_DTX_P0_C<14> PSATA_PRX_DTX_N0_C<14>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
HDD CONNECTOR
28 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
HDD CONNECTOR
28 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
HDD CONNECTOR
28 66Friday, June 10, 2011
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Pleace near HDD CONN
Main SATA +5V Default
SHORT DEFAULT
+5V_HDD Source
HDD PWR
DELL CONFIDENTIAL/PROPRIETARY
Free Fall Sensor
For HDD Temp.
Pleace near HDD CONN
C383 0.01U_0402_16V7K~DC383 0.01U_0402_16V7K~D
12
C388
0.1U_0402_25V6K~D
C388
0.1U_0402_25V6K~D
1
2
Q28B
DMN66D0LDW-7_SOT363-6~D
Q28B
DMN66D0LDW-7_SOT363-6~D
3
5
4
R1621 0_0402_5%~D@R1621 0_0402_5%~D@1 2
PJP53
PAD-OPEN1x1m
PJP53
PAD-OPEN1x1m
12
C386 0.01U_0402_16V7K~DC386 0.01U_0402_16V7K~D
12
R500
100K_0402_5%~D
R500
100K_0402_5%~D
12
R499
100K_0402_5%~D
R499
100K_0402_5%~D
12
R506
100K_0402_5%~D
@R506
100K_0402_5%~D
@
12
LNG3DM
U88
LNG3DMTR_LGA16_3X3~D
LNG3DM
U88
LNG3DMTR_LGA16_3X3~D
VDD_IO
1
NC 2
NC 3
SCL/SPC
4
GND 5
VDD
14
CS
8
INT 1
11
INT 2
9
RES 10
GND 12
SDO/SA0
7
SDA / SDI / SDO
6
RES 13
RES 16
RES 15
C385 0.01U_0402_16V7K~DC385 0.01U_0402_16V7K~D
12
C399
0.1U_0402_25V6K~D
C399
0.1U_0402_25V6K~D
1
2
R502 10K_0402_5%~DR502 10K_0402_5%~D
1 2
R1624 0_0402_5%~DR1624 0_0402_5%~D
1 2
C402
0.1U_0402_25V6K~D
C402
0.1U_0402_25V6K~D
1
2
C393
0.1U_0603_50V7K~D
C393
0.1U_0603_50V7K~D
1
2
S
G
D
Q27
SI3456DDV-T1-GE3_TSOP6~D
@
S
G
D
Q27
SI3456DDV-T1-GE3_TSOP6~D
@
3
6
2
4 5
1
R505
100K_0402_5%~D
@R505
100K_0402_5%~D
@
12
10U_0805_10V6K~D
C394
10U_0805_10V6K~D
C394
1
2R504
100K_0402_5%~D
R504
100K_0402_5%~D
12
C396
0.1U_0402_25V6K~D
C396
0.1U_0402_25V6K~D
1
2
C395
1000P_0402_50V7K~D
C395
1000P_0402_50V7K~D
1
2
Q28A
DMN66D0LDW-7_SOT363-6~D
Q28A
DMN66D0LDW-7_SOT363-6~D
61
2
R503 100K_0402_5%~DR503 100K_0402_5%~D
1 2
PJP64
PAD-OPEN1x1m
PJP64
PAD-OPEN1x1m
1 2
C387
10U_0603_6.3V6M~D
C387
10U_0603_6.3V6M~D
1
2
PJP3
JUMP_43X79
@PJP3
JUMP_43X79
@
1
122
Q29B
DMN66D0LDW-7_SOT363-6~D
Q29B
DMN66D0LDW-7_SOT363-6~D
3
5
4
C384 0.01U_0402_16V7K~DC384 0.01U_0402_16V7K~D
12
R501 10K_0402_5%~DR501 10K_0402_5%~D
1 2
JSATA1
JAE_SP100421-HDD
CONN@
JSATA1
JAE_SP100421-HDD
CONN@
GND1 23
GND2 24
GND
1
RX+
2
RX-
3
GND
4
TX-
5
TX+
6
GND
7
3.3V
8
3.3V
9
3.3V
10
GND
11
GND
12
GND
13
5V
14
5V
15
5V
16
GND
17
Reserved
18
GND
19
12V
20
12V
21
12V
22
Q29A
DMN66D0LDW-7_SOT363-6~D
Q29A
DMN66D0LDW-7_SOT363-6~D
61
2
R508
100K_0402_5%~D
R508
100K_0402_5%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MODC_EN#
SATA_ODD_PRX_DTX_N1
SATA_ODD_PTX_DRX_N1
SATA_ODD_PTX_DRX_P1
SATA_ODD_PRX_DTX_P1
PCIE_WAKE#
EMBCLK_REQ#
BAY_SMBDAT
BAY_SMBCLK
PLTRST_EMB#
MOD_MD
ZODD_WAKE#
MOD_MD
MODC_EN#
ZODD_WAKE#
USB30_SMI#
MOD_MD
USB30_EN
MOD_SATA_PCIE#_DET
USB30_EN
USB30_SMI#
PCIE_PTX_EMBRX_P4_C
PCIE_PTX_EMBRX_N4_C
MOD_EN
+5V_ALW
+3.3V_ALW2
+5V_MOD +5V_RUN
+5V_MOD
+3.3V_ALW
+3.3V_ALW
+5V_MOD
+5V_MOD
+3.3V_ALW
+3.3V_ALW_PCH
+PWR_SRC_S
MODC_EN<40>
PCIE_PRX_EMBTX_P4<15>
EMBCLK_REQ#<15>
PLTRST_EMB#<17>
SATA_ODD_PRX_DTX_P1_C<14> SATA_ODD_PRX_DTX_N1_C<14>
SATA_ODD_PTX_DRX_P1_C<14>
MOD_SATA_PCIE#_DET<40>
SATA_ODD_PTX_DRX_N1_C<14>
PCIE_WAKE#<35,36,41>
BAY_SMBDAT<41,53> BAY_SMBCLK<41,53>
CLK_PCIE_EMB<15> CLK_PCIE_EMB#<15>
PCIE_PRX_EMBTX_N4<15>
DEVICE_DET#<41>
ZODD_WAKE# <40>
USB30_SMI# <14>
PCIE_PTX_EMBRX_P4<15> PCIE_PTX_EMBRX_N4<15>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
ODD CONNECTOR
29 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
ODD CONNECTOR
29 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
ODD CONNECTOR
29 66Friday, June 10, 2011
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
2
+5VMOD Source
For ODD
Pleace near ODD CONN
Q123A
DMN66D0LDW-7_SOT363-6~D
Q123A
DMN66D0LDW-7_SOT363-6~D
61
2
C407 0.01U_0402_16V7K~DC407 0.01U_0402_16V7K~D
12
10U_0805_10V6K~D
C401
10U_0805_10V6K~D
C401
1
2
R513 10K_0402_5%~DR513 10K_0402_5%~D
1 2
JSATA2
TYCO_2-2129116-3
CONN@
JSATA2
TYCO_2-2129116-3
CONN@
GND
1
A+
2
A-
3
GND
4
B-
5
B+
6
GND
7
DP
8
+5V
9
+5V
10
MD
11
GND
12
GND
13
GND
14
PERX+
22
PERX-
23
GND
24
+5V
25
CLKREQ#
26
WAKE#
27
PERST#
28
SMB_DATA
29
REFCLK+
15
REFCLK-
16
GND
17
PETX+
18
PETX-
19
GND
20
GND
21
SMB_CLK
30
HPD
31
GND1 32
GND2 33
R511
100K_0402_5%~D
R511
100K_0402_5%~D
12
C397
1000P_0402_50V7K~D
C397
1000P_0402_50V7K~D
1
2
PJP4
JUMP_43X79
@PJP4
JUMP_43X79
@
1
122
R510 10K_0402_5%~DR510 10K_0402_5%~D
1 2
S
G
D
Q30
SI3456DDV-T1-GE3_TSOP6~D
S
G
D
Q30
SI3456DDV-T1-GE3_TSOP6~D
3
6
2
4 5
1
Q31A
DMN66D0LDW-7_SOT363-6~D
Q31A
DMN66D0LDW-7_SOT363-6~D
61
2
R1183 10K_0402_5%~DR1183 10K_0402_5%~D
1 2
G
D
S
Q76
SSM3K7002FU_SC70-3~D
G
D
S
Q76
SSM3K7002FU_SC70-3~D
2
13
C4080.1U_0402_10V7K~D C4080.1U_0402_10V7K~D 12
C4090.1U_0402_10V7K~D C4090.1U_0402_10V7K~D 12
R512
100K_0402_5%~D
R512
100K_0402_5%~D
12
C398
0.1U_0402_25V6K~D
C398
0.1U_0402_25V6K~D
1
2
R515
100K_0402_5%~D
R515
100K_0402_5%~D
12
R507
100K_0402_5%~D
R507
100K_0402_5%~D
12
Q123B
DMN66D0LDW-7_SOT363-6~D
Q123B
DMN66D0LDW-7_SOT363-6~D
3
5
4
Q31B
DMN66D0LDW-7_SOT363-6~D
Q31B
DMN66D0LDW-7_SOT363-6~D
3
5
4
R514 100K_0402_5%~DR514 100K_0402_5%~D
1 2
R509
100K_0402_5%~D
R509
100K_0402_5%~D
12
C406 0.01U_0402_16V7K~DC406 0.01U_0402_16V7K~D
12
C404 0.01U_0402_16V7K~DC404 0.01U_0402_16V7K~D
12
C405 0.01U_0402_16V7K~DC405 0.01U_0402_16V7K~D
12
C400
0.1U_0603_50V7K~D
C400
0.1U_0603_50V7K~D
1
2
2
2
1
1
B B
A A
I2S_DI#
I2S_LRCLK
AUD_SENSE_A
AUD_SENSE_B
I2S_DO DMIC_CLK_L
PCH_AZ_CODEC_BITCLK
PCH_AZ_CODEC_RST#
PCH_AZ_CODEC_SDOUT
PCH_AZ_SDIN0_R
AUD_SENSE_B
AUD_HP_OUT_L
AUD_HP_OUT_R
PCH_AZ_CODEC_SDOUT PCH_AZ_CODEC_BITCLK
+VDDA_AVDD
I2S_LRCLK
I2S_BCLK DAI_BCLK#
DAI_LRCK#
DAI_DI
I2S_DO
I2S_DI#
DAI_DO#
DAI_12MHZ#I2S_MCLK
AUD_PC_BEEP
+VDDA_PVDD
MIC_IN_L
MIC_IN_R
+VREFOUT
INT_SPKR_R+
INT_SPKR_L-
I2S_MCLK
I2S_BCLK
INT_SPK_R-
INT_SPK_R+
INT_SPK_L-
INT_SPK_L+
AUD_SENSE_A
INT_SPKL_L+
+VREFOUT
INT_SPKR_R-
DAI_BCLK#
DAI_LRCK#
DAI_DO#
DAI_12MHZ#
DAI_DI
EN_I2S_NB_CODEC#
INT_SPK_L+
INT_SPK_L-
INT_SPK_R+
INT_SPK_R-
+DVDD_CORE
+3.3V_RUN
+VDDA_AVDD
+3.3V_RUN +3.3V_RUN
+5V_RUN
+3.3V_RUN +3.3V_RUN
+3.3V_RUN
+VDDA_AVDD
+3.3V_RUN
+5V_RUN
+VREFOUT
+3.3V_RUN_DVDD+3.3V_RUN +3.3V_RUN_DVDD
PCH_AZ_CODEC_SDIN0<14>
AUD_NB_MUTE#<40>
DMIC_CLK <24>
DMIC0 <24>
PCH_AZ_CODEC_BITCLK<14>
PCH_AZ_CODEC_RST#<14>
PCH_AZ_CODEC_SYNC<14>
PCH_AZ_CODEC_SDOUT<14>
DOCK_MIC_DET <40>DOCK_HP_DET<40>
AUD_HP_OUT_L <31>
AUD_HP_OUT_R <31>
DAI_DO# <39>
EN_I2S_NB_CODEC#<40>
DAI_DI <39>
DAI_12MHZ# <39>
DAI_LRCK# <39>
DAI_BCLK# <39>
AUD_HP_NB_SENSE <31,40>
MIC_IN_R <31>
BEEP <41>
SPKR <14>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
Azalia (HD) Codec
30 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
Azalia (HD) Codec
30 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
Azalia (HD) Codec
30 66Friday, June 10, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
Notes:
Keep PVDD supply and speaker traces routed on the DGND plane.
Keep away from AGND and other analog signals
Place C994, C952~C957 close to Codec
Place R1096 close to codec
Place C962 close to Codec
Place C963~C966 close to Codec
Place R1097 close to codec Place LE3 close to codec
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Place closely to Pin 14
Close to U72 pin5 Close to U72 pin6
BCLK: Audio serial data bus bit clock input/output
LRCK: Audio serial data bus word clock input/output
Place closely to Pin 13.
place at Codec bottom side
place at AGND and DGND plane
DVDD_IO should match
with HDA Bus level
15 mils trace
Internal Speakers Header
place close to pin27 place close to pin38
NA
SPDIFOUT0
Pull-up to AVDD
PORT E
PORT F
DMIC0
SPDIFOUT1 (DMIC1)
Resistor SENSE_A SENSE_B
39.2K
20K
10K
5.11K
2.49K
PORT A
PORT B
HeadPhone Out
Dock Audio
Internal SPK
External MICPORT A
PORT B
PORT C
PORT D
Add for solve pop noise and detect issue
R162, R163, R164, R165,R166 CO-lay with U73
LE3 BLM18BB221SN1D_2P~DLE3 BLM18BB221SN1D_2P~D
1 2
R1142 10K_0402_5%~D@R1142 10K_0402_5%~D@
1 2
C973 680P_0402_50V7K~D@C973 680P_0402_50V7K~D@
1
2
R1076
10_0402_1%~D
@R1076
10_0402_1%~D
@
12
C981
100P_0402_50V8J~D
@
C981
100P_0402_50V8J~D
@
1 2
Q107B
DMN66D0LDW-7_SOT363-6~D
Q107B
DMN66D0LDW-7_SOT363-6~D
3
5
4
Q106B
DMN66D0LDW-7_SOT363-6~D
Q106B
DMN66D0LDW-7_SOT363-6~D
3
5
4
C963
4.7U_0603_6.3V6K~D
C963
4.7U_0603_6.3V6K~D
1
2
C952
1U_0603_10V7K~D
C952
1U_0603_10V7K~D
1
2
L91 BLM18BD121SN1D_2P~DL91 BLM18BD121SN1D_2P~D
1 2
C959
0.1U_0402_25V6K~D
C959
0.1U_0402_25V6K~D
1
2
1U_0402_6.3V6K~DC1163 1U_0402_6.3V6K~DC1163
1 2
C1180
1U_0603_10V7K~D
C1180
1U_0603_10V7K~D
1
2
C974 680P_0402_50V7K~D@C974 680P_0402_50V7K~D@
1
2
10U_0805_10V6K~D
C958
10U_0805_10V6K~D
C958
1
2
33_0402_5%~D
R1096 33_0402_5%~D
R1096
1 2
R1082
100K_0402_5%~D
R1082
100K_0402_5%~D
12
R1079
39.2K_0402_1%~D
R1079
39.2K_0402_1%~D
12
10U_0805_10V6K~D
C960
10U_0805_10V6K~D
C960
1
2
C975 680P_0402_50V7K~D@C975 680P_0402_50V7K~D@
1
2
C980
0.1U_0402_10V7K~D
C980
0.1U_0402_10V7K~D
1
2
C961
0.1U_0402_25V6K~D
C961
0.1U_0402_25V6K~D
1
2
10K_0402_5%~DR1099 10K_0402_5%~DR1099
1 2
U72
92HD90B2X5NLGXYAX8_QFN48_7X7~D
U72
92HD90B2X5NLGXYAX8_QFN48_7X7~D
DVDD_CORE
1
DMIC_CLK/GPIO 1 2
DVDD_IO
3
DMIC_0/GPIO 2 4
SDATA_OUT
5
BITCLK
6
DVSS
7
SDATA_IN
8
DVDD
9
SYNC
10
RESET#
11
PC_BEEP 12
SENSE_A 13
SENSE_B 14
I2S_MCLK
15
I2S_SCLK
16
I2S_DOUT
17
I2S_LRCLK
18
No Connect
19
No Connect
20
VREFFILT 21
CAP2 22
VrefOut_A 23
I2S_DIN
24
MONO_OUT 25
AVSS1 26
AVDD1 27
PORTA_L 28
PORTA_R 29
AVSS 30
PORTB_L 31
PORTB_R 32
AVSS 33
V- 34
CAP- 35
CAP+ 36
Vreg 37
AVDD2 38
PVDD 39
PORTD_+L 40
PORTD_-L 41
PVSS
42
PORTD_-R 43
PORTD_+R 44
PVDD 45
DMIC1/GPIO0/SPDIFOUT1 46
EAPD
47
SPDIFOUT0//GPIO3/Aux_Out 48
GND
49
C956
1U_0603_10V7K~D
C956
1U_0603_10V7K~D
1
2
R1080
20K_0402_1%~D
R1080
20K_0402_1%~D
12
R166 0_0402_5%~D@R166 0_0402_5%~D@
1 2
C976 680P_0402_50V7K~D@C976 680P_0402_50V7K~D@
1
2
C964
4.7U_0603_6.3V6K~D
C964
4.7U_0603_6.3V6K~D
1
2
Q106A
DMN66D0LDW-7_SOT363-6~D
Q106A
DMN66D0LDW-7_SOT363-6~D
61
2
C967
0.1U_0402_25V6K~D
@C967
0.1U_0402_25V6K~D
@
1
2
D58
DA204U_SOT323-3~D
@D58
DA204U_SOT323-3~D
@
2
3
1
R1119 100K_0402_5%~DR1119 100K_0402_5%~D
1 2
R165 22_0402_5%~D@R165 22_0402_5%~D@
1 2
C1105 0.1U_0402_25V6K~DC1105 0.1U_0402_25V6K~D
12
R1540
1K_0402_1%~D
R1540
1K_0402_1%~D
12
R1078
2.49K_0402_1%~D
R1078
2.49K_0402_1%~D
12
T90 PAD~D@T90 PAD~D@
R1086
20K_0402_1%~D
R1086
20K_0402_1%~D
12
R1141 10K_0402_5%~D@R1141 10K_0402_5%~D@
1 2
C979
1000P_0402_50V7K~D
C979
1000P_0402_50V7K~D
1
2
DE2
PESD5V0U2BT_SOT23-3~D
@DE2
PESD5V0U2BT_SOT23-3~D
@
2
3
1
L94 BLM18BD121SN1D_2P~DL94 BLM18BD121SN1D_2P~D
1 2
C994
0.1U_0402_25V6K~D
C994
0.1U_0402_25V6K~D
1
2
10U_0805_10V6K~D
C966
10U_0805_10V6K~D
C966
1
2
Q107A
DMN66D0LDW-7_SOT363-6~D
Q107A
DMN66D0LDW-7_SOT363-6~D
61
2
L93 BLM18BD121SN1D_2P~DL93 BLM18BD121SN1D_2P~D
1 2
D54
DA204U_SOT323-3~D
@D54
DA204U_SOT323-3~D
@
2
3
1
R1081
100K_0402_5%~D
R1081
100K_0402_5%~D
12
33_0402_5%~DR1097 33_0402_5%~DR1097
1 2
C957
0.1U_0402_25V6K~D
C957
0.1U_0402_25V6K~D
1
2
R1120 100K_0402_5%~DR1120 100K_0402_5%~D
1 2
C953
0.1U_0402_25V6K~D
C953
0.1U_0402_25V6K~D
1
2
C977
10P_0402_50V8J~D
@C977
10P_0402_50V8J~D
@
1
2
D56
DA204U_SOT323-3~D
@D56
DA204U_SOT323-3~D
@
2
3
1
R162 22_0402_5%~D@R162 22_0402_5%~D@
1 2
C983
100P_0402_50V8J~D
@
C983
100P_0402_50V8J~D
@
1 2
C1106 0.1U_0402_25V6K~DC1106 0.1U_0402_25V6K~D
12
D55
DA204U_SOT323-3~D
@D55
DA204U_SOT323-3~D
@
2
3
1
R1077
47_0402_5%~D
@R1077
47_0402_5%~D
@
12
L92 BLM18BD121SN1D_2P~DL92 BLM18BD121SN1D_2P~D
1 2
R163 0_0402_5%~D@R163 0_0402_5%~D@
1 2
PJP65
PAD-OPEN1x1m
@PJP65
PAD-OPEN1x1m
@
1 2
R1087
100K_0402_5%~D
R1087
100K_0402_5%~D
12
JSPK1
MOLEX_53398-0471~D
CONN@JSPK1
MOLEX_53398-0471~D
CONN@
1
1
2
2
3
3
4
4G1 5
G2 6
PJP62
PAD-OPEN1x1m
@PJP62
PAD-OPEN1x1m
@
1 2
C962
4.7U_0603_6.3V6K~D
C962
4.7U_0603_6.3V6K~D
1
2
C965
1U_0603_10V7K~D
C965
1U_0603_10V7K~D
1
2
R1143 2.2K_0402_5%~DR1143 2.2K_0402_5%~D
1 2
10U_0805_10V6K~D
C955
10U_0805_10V6K~D
C955
1
2
C978
0.1U_0402_10V7K~D
@C978
0.1U_0402_10V7K~D
@
1
2
U73
CD74HC366M96_SO16~D
U73
CD74HC366M96_SO16~D
1A
2
OE1#
1
VCC
16
2A
4
3A
6
6A
14
4A
10
5A
12
GND 8
OE2#
15
6Y# 13
5Y# 11
4Y# 9
3Y# 7
2Y# 5
1Y# 3
DE1
PESD5V0U2BT_SOT23-3~D
@DE1
PESD5V0U2BT_SOT23-3~D
@
2
3
1
R1083
2.49K_0402_1%~D
R1083
2.49K_0402_1%~D
12
L77
BLM21PG600SN1D_0805~D
L77
BLM21PG600SN1D_0805~D
1 2
R169 0_0402_5%~D@R169 0_0402_5%~D@
1 2
R164 0_0402_5%~D@R164 0_0402_5%~D@
1 2
R1095
0_0805_5%~D
R1095
0_0805_5%~D
12
C1103
0.1U_0402_10V7K~D
C1103
0.1U_0402_10V7K~D
1
2
C982
100P_0402_50V8J~D
@
C982
100P_0402_50V8J~D
@
1 2
10U_0805_10V6K~D
C954
10U_0805_10V6K~D
C954
1
2
D57
DA204U_SOT323-3~D
@D57
DA204U_SOT323-3~D
@
2
3
1
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCH_AZ_MDC_RST1#
PCH_AZ_MDC_RST1#
MIC_IN_R
POWER_SW#_MB
+5V_ALW
+3.3V_ALW_PCH
+5V_ALW
+3.3V_LAN +3.3V_ALW_PCH
+5V_ALW +3.3V_LAN
+5V_RUN
+5V_ALW
+3.3V_ALW
POWER_SW#_MB<41,42>
MDC_RST_DIS#<40>
PCH_AZ_MDC_RST#<14>
AUD_HP_OUT_L <30>
AUD_HP_NB_SENSE<30,40>
PCH_AZ_MDC_SYNC <14>
PCH_AZ_MDC_SDOUT <14>
PCH_AZ_MDC_BITCLK <14>
USB_OC4#<17>
USB_SIDE_EN#<40>
IO_LOOP# <18>
LAN_ACTLED_YEL#<32> LED_10_GRN#<32>
LED_100_ORG#<32>
HSYNC_BUF <25>
VSYNC_BUF <25>
USBP9-<17> USBP9+<17>
GREEN_CRT <25>
RED_CRT <25>
BLUE_CRT <25>
PCH_AZ_MDC_SDIN1 <14>
DAT_DDC2_CRT <25>
CLK_DDC2_CRT <25>
SW_LAN_TX3+<32> SW_LAN_TX3-<32>
SW_LAN_TX2-<32> SW_LAN_TX2+<32>
SW_LAN_TX1-<32> SW_LAN_TX1+<32>
SW_LAN_TX0+<32> SW_LAN_TX0-<32>
AUD_HP_OUT_R <30>
MIC_IN_R <30>
BATT_WHITE<44> BATT_YELLOW<44>
SATA_LED<44>
WLAN_LED<44>
LID_CL#<40,44>
WIRELESS_ON#/OFF<40>
VOL_UP<41>
VOL_DOWN<41> VOL_MUTE<41>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
PWR SW/Sub-board Connector
31 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
PWR SW/Sub-board Connector
31 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
PWR SW/Sub-board Connector
31 66Friday, June 10, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
POWER & INSTANT ON SWITCH
Analog_GND
DETECT_GND
Place close
to JIO1.13
Change to TYCO_2041300-2_60P-T and Horizonal reverse to SSI
I/O board CONN.
Place close
to JIO1.35
LED Board
Media Board
Defult on,
WIRELESS_ON/OFF#:
LOW: ON
HIGH: OFF
JLED1
TYCO_2041084-6~D
CONN@
JLED1
TYCO_2041084-6~D
CONN@
1
1
2
2
3
3
4
4
5
5
6
6G1 7
G2 8
G
D
S
Q44
SSM3K7002FU_SC70-3~D
G
D
S
Q44
SSM3K7002FU_SC70-3~D
2
1 3
C1000
0.1U_0402_25V6K~D
C1000
0.1U_0402_25V6K~D
1
2
D23
PESD24VS2UT_SOT23-3~D
@D23
PESD24VS2UT_SOT23-3~D
@
2
3
1
JIO1
TYCO_2041300-2
CONN@
JIO1
TYCO_2041300-2
CONN@
11
2
2
33
4
4
55
6
6
77
8
8
99
10
10
11 11
12
12
13 13
14
14
15 15
16
16
17 17
18
18
19 19
20
20
21 21
22
22
23 23
24
24
25 25
26
26
27 27
28
28
29 29
30
30
31 31
32
32
33 33
34
34
35 35
36
36
37 37
38
38
39 39
40
40
41 41
42
42
43 43
44
44
45 45
46
46
47 47
48
48
49 49
50
50
51 51
53 53
57 57
55 55
59 59
52
52
56
56
58
58
54
54
60
60
GND
62 GND 61
GND 63
GND 65
GND
64
GND
66
C50
0.1U_0402_25V6K~D
C50
0.1U_0402_25V6K~D
1
2
C1003
0.1U_0402_25V6K~D
C1003
0.1U_0402_25V6K~D
1
2
C1001
0.1U_0402_25V6K~D
C1001
0.1U_0402_25V6K~D
1
2
R752
10K_0402_5%~D
R752
10K_0402_5%~D
12
R751
100K_0402_5%~D
R751
100K_0402_5%~D
12
C1002
0.1U_0402_25V6K~D
C1002
0.1U_0402_25V6K~D
1
2
SW1
NTC033-XJ1J-X260CM_4P
SW1
NTC033-XJ1J-X260CM_4P
1
2
3
4
C997
0.1U_0402_25V6K~D
C997
0.1U_0402_25V6K~D
1
2
JMDIA1
TYCO_2041070-8~D
CONN@
JMDIA1
TYCO_2041070-8~D
CONN@
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
G1 9
G2 10
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LAN_TX1-
LAN_TX1+
LAN_TX3-
LAN_TX0-
LAN_TX0+
+3.3V_LAN_OUT
REGCTL_PNP10
LANCLK_REQ#_R
LAN_TX2+
LAN_TX3+
LAN_TX2-
CLK_PCIE_LAN
CLK_PCIE_LAN#
PCIE_PRX_GLANTX_P7_C
PCIE_PRX_GLANTX_N7_C
LOM_ACTLED_YEL#
TP_LAN_JTAG_TDI
TP_LAN_JTAG_TDO
TP_LAN_JTAG_TMS
TP_LAN_JTAG_TCK
LAN_TEST_EN
RES_BIAS
XTALI
LAN_DISABLE#_R
LOM_SPD100LED_ORG#
LOM_SPD10LED_GRN#
+RSVD_VCC3P3_2
+RSVD_VCC3P3_1
TP_LAN_JTAG_TMS
TP_LAN_JTAG_TCK
XTALO
LOM_ACTLED_YEL#
LOM_SPD10LED_GRN#
LOM_SPD100LED_ORG#
DOCK_LOM_SPD10LED_GRN#
DOCK_LOM_SPD100LED_ORG#
LED_10_GRN#
LED_100_ORG#
DOCK_LOM_ACTLED_YEL#
LAN_ACTLED_YEL#
DOCKED
REGCTL_PNP10
LAN_SMBCLK_R
LAN_SMBDATA_R
PCIE_PTX_GLANRX_N7_C
PCIE_PTX_GLANRX_P7_C
LOM_SPD10LED_GRN#
LOM_SPD100LED_ORG#
ENAB_3VLAN
LAN_TX1-R
LAN_TX1+R
LAN_TX1-
LAN_TX1+
LAN_TX2-R
LAN_TX2+RLAN_TX2+
LAN_TX2-
LAN_TX3-R
LAN_TX3+RLAN_TX3+
LAN_TX3-
LAN_TX0-RLAN_TX0-
LAN_TX0+RLAN_TX0+
SW_LAN_TX0-
SW_LAN_TX0+
SW_LAN_TX1-
SW_LAN_TX1+
SW_LAN_TX2+
SW_LAN_TX2-
SW_LAN_TX3-
SW_LAN_TX3+
DOCK_LOM_TRD0-
DOCK_LOM_TRD1+
DOCK_LOM_TRD1-
DOCK_LOM_TRD2-
DOCK_LOM_TRD2+
DOCK_LOM_TRD3-
DOCK_LOM_TRD3+
DOCK_LOM_TRD0+
+3.3V_LAN
+1.0V_LAN
+1.0V_LAN
+1.0V_LAN
+3.3V_RUN
+3.3V_LAN
+3.3V_LAN+3.3V_ALW
+3.3V_LAN
+3.3V_ALW2
+1.05V_M
+3.3V_LAN
+3.3V_M
+3.3V_LAN
+3.3V_LAN
+PWR_SRC_S
LANCLK_REQ#<15> PLTRST_LAN#<17>
CLK_PCIE_LAN#<15> CLK_PCIE_LAN<15>
PCIE_PRX_GLANTX_P7<15>
PCIE_PRX_GLANTX_N7<15>
PM_LANPHY_ENABLE<18>
SIO_SLP_LAN#<16,40>
DOCKED<40>
DOCK_LOM_ACTLED_YEL# <39>
DOCK_LOM_SPD10LED_GRN# <39>
DOCK_LOM_SPD100LED_ORG# <39>
LAN_ACTLED_YEL# <31>
LED_10_GRN# <31>
LED_100_ORG# <31>
LAN_SMBDATA<15> LAN_SMBCLK<15>
PCIE_PTX_GLANRX_N7<15>
PCIE_PTX_GLANRX_P7<15>
WLAN_LAN_DISB# <40>
LAN_DISABLE#_R<40>
SW_LAN_TX0- <31>
SW_LAN_TX0+ <31>
SW_LAN_TX1- <31>
SW_LAN_TX1+ <31>
SW_LAN_TX2+ <31>
SW_LAN_TX2- <31>
SW_LAN_TX3- <31>
SW_LAN_TX3+ <31>
DOCK_LOM_TRD0- <39>
DOCK_LOM_TRD1+ <39>
DOCK_LOM_TRD1- <39>
DOCK_LOM_TRD2- <39>
DOCK_LOM_TRD2+ <39>
DOCK_LOM_TRD3- <39>
DOCK_LOM_TRD3+ <39>
DOCK_LOM_TRD0+ <39>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
Intel 82579 (Hanksville) / LAN SW
32 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
Intel 82579 (Hanksville) / LAN SW
32 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
Intel 82579 (Hanksville) / LAN SW
32 66Friday, June 10, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
SMBus Device Address 0xC8
FROM NIC DOCKED 1: TO DOCK
0: TO RJ45
LAN ANALOG
SWITCH
TO
DOCK
Layout Notice : Place bead as
close PI3L500 as possible
Need to verify A3 silicon drive
power before removing C427
KDS crystal vender verify
driving level in A3
Place R548, C462, C463 and L29 close to U31
+1.0V_LAN POWER OPTIONS
Shared with PCH
1.05V SVR Internal SRV
STUFF: R548
NO STUFF: L29 STUFF: L29
NO STUFF: R548
*
Note:
+1.0V_LAN will work at 0.95V to 1.15V
Idc max=330mA
Place C1178 close to pin5
C471
33P_0402_50V8J~D
C471
33P_0402_50V8J~D
1
2
T142 PAD~DT142 PAD~D
R553 4.7K_0402_5%~DR553 4.7K_0402_5%~D
12
C469
0.1U_0402_10V7K~D
C469
0.1U_0402_10V7K~D
1
2
C468
0.1U_0402_10V7K~D
C468
0.1U_0402_10V7K~D
1
2
R1638
1M_0402_5%~D
R1638
1M_0402_5%~D
12
R554 4.7K_0402_5%~DR554 4.7K_0402_5%~D
12
R561
1K_0402_1%~D
R561
1K_0402_1%~D
12
R552 0_0402_5%~DR552 0_0402_5%~D
1 2
R555 0_0402_5%~DR555 0_0402_5%~D
1 2
U15
TC7SH08FU_SSOP5~D
U15
TC7SH08FU_SSOP5~D
B
1
A
2
G
3
O4
P5
R557
10K_0402_5%~D
@R557
10K_0402_5%~D
@
12
C474
0.1U_0402_25V6K~D
C474
0.1U_0402_25V6K~D
1
2
C472
0.1U_0402_25V6K~D
C472
0.1U_0402_25V6K~D
1
2
C475
10U_0603_6.3V6M~D
C475
10U_0603_6.3V6M~D
1
2
C1178
22U_0805_6.3V6M~D
C1178
22U_0805_6.3V6M~D
1
2
C477
2200P_0402_50V7K~D
C477
2200P_0402_50V7K~D
1
2
R549
10K_0402_5%~D
R549
10K_0402_5%~D
12
R563
0_1206_5%~D
@R563
0_1206_5%~D
@
1 2
Q35A
DMN66D0LDW-7_SOT363-6~D
Q35A
DMN66D0LDW-7_SOT363-6~D
61
2
L32 12NH_0603CS-120EJTS_5%~DL32 12NH_0603CS-120EJTS_5%~D
1 2
C459 0.1U_0402_10V7K~DC459 0.1U_0402_10V7K~D
12
C478
0.1U_0402_10V7K~D
C478
0.1U_0402_10V7K~D
1 2
C470
33P_0402_50V8J~D
C470
33P_0402_50V8J~D
1
2
C467
0.1U_0402_10V7K~D
C467
0.1U_0402_10V7K~D
1
2
L37 12NH_0603CS-120EJTS_5%~DL37 12NH_0603CS-120EJTS_5%~D
1 2
Q35B
DMN66D0LDW-7_SOT363-6~D
Q35B
DMN66D0LDW-7_SOT363-6~D
3
5
4
C464
1U_0603_10V7K~D
C464
1U_0603_10V7K~D
1
2
PCIE
MDI
SMBUS
JTAG LED
U31
82579_QFN48_6X6~D
PCIE
MDI
SMBUS
JTAG LED
U31
82579_QFN48_6X6~D
RSVD_VCC3P3_1 1
RSVD_VCC3P3_2 2
LAN_DISABLE_N
3
VDD3P3_OUT 4
VDD3P3_IN 5
RSVD_NC 6
CTRL_1P0 7
VDD1P0_8 8
XTAL_OUT
9
XTAL_IN
10
VDD1P0_11 11
RBIAS
12
MDI_PLUS0 13
MDI_MINUS0 14
VDD3P3_15 15
VDD1P0_16 16
MDI_PLUS1 17
MDI_MINUS1 18
VDD3P3_19 19
MDI_PLUS2 20
MDI_MINUS2 21
VDD1P0_22 22
MDI_PLUS3 23
MDI_MINUS3 24
LED2
25
LED0
26
LED1
27
SMB_CLK
28
VDD3P3_29 29
TEST_EN
30
SMB_DATA
31
JTAG_TDI
32
JTAG_TMS
33 JTAG_TDO
34
JTAG_TCK
35
PE_RST_N
36
VDD1P0_37 37
PETp
38
PETn
39
VDD1P0_40 40
PERp
41
PERn
42
VDD1P0_43 43
PE_CLKP
44
PE_CLKN
45
VDD1P0_46 46
VDD1P0_47 47
CLK_REQ_N
48
VSS_EPAD 49
C460 0.1U_0402_10V7K~DC460 0.1U_0402_10V7K~D
1 2
R547
10K_0402_5%~D
R547
10K_0402_5%~D
12
R1187 0_0402_5%~DR1187 0_0402_5%~D
1 2
C473
0.1U_0402_25V6K~D
C473
0.1U_0402_25V6K~D
1
2
L30 12NH_0603CS-120EJTS_5%~DL30 12NH_0603CS-120EJTS_5%~D
1 2
C458 0.1U_0402_10V7K~DC458 0.1U_0402_10V7K~D
12
R545 10K_0402_5%~D@R545 10K_0402_5%~D@1 2
L36 12NH_0603CS-120EJTS_5%~DL36 12NH_0603CS-120EJTS_5%~D
1 2
C1177
22U_0805_6.3V6M~D
C1177
22U_0805_6.3V6M~D
1
2
R548
0_0805_5%~D
@R548
0_0805_5%~D
@
1 2
S
G
D
Q34
SI3456DDV-T1-GE3_TSOP6~D
S
G
D
Q34
SI3456DDV-T1-GE3_TSOP6~D
3
6
245
1
L33 12NH_0603CS-120EJTS_5%~DL33 12NH_0603CS-120EJTS_5%~D
1 2
C463
0.1U_0402_10V7K~D
C463
0.1U_0402_10V7K~D
1
2
Y3
25MHZ_18PF_X3G025000DI1H-H~D
Y3
25MHZ_18PF_X3G025000DI1H-H~D
IN
1
GND
2
OUT 3
GND 4
L29
4.7UH_CBC2012T4R7M_20%~D
L29
4.7UH_CBC2012T4R7M_20%~D
1 2
C462
10U_0603_6.3V6M~D
C462
10U_0603_6.3V6M~D
1
2
C476
0.1U_0402_10V7K~D
C476
0.1U_0402_10V7K~D
1
2
L31 12NH_0603CS-120EJTS_5%~DL31 12NH_0603CS-120EJTS_5%~D
1 2
R562
3.01K_0402_1%~D
R562
3.01K_0402_1%~D
12
C461 0.1U_0402_10V7K~DC461 0.1U_0402_10V7K~D
1 2
R564
100K_0402_5%~D
R564
100K_0402_5%~D
12
T143 PAD~DT143 PAD~D
R546 10K_0402_5%~D@R546 10K_0402_5%~D@1 2
L34 12NH_0603CS-120EJTS_5%~DL34 12NH_0603CS-120EJTS_5%~D
1 2
R1144 0_0402_5%~DR1144 0_0402_5%~D
1 2
R565
100K_0402_5%~D
R565
100K_0402_5%~D
12
U32
PI3L720ZHEX_TQFN42_9X3P5~D
U32
PI3L720ZHEX_TQFN42_9X3P5~D
SEL
13
A0+
2
A0-
3
A1+
6
A1-
7
A2+
9
A2-
10
A3+
11
B0+ 38
C0+ 36
B0- 37
C0- 35
B1+ 34
C1+ 32
B1- 33
C1- 31
B2+ 29
C2+ 27
B2- 28
C2- 26
B3+ 25
C3+ 23
B3- 24
C3- 22
A3-
12
LEDA0
15
LEDA1
16
LEDA2
42
LEDB0 17
LEDC0 19
LEDB1 18
LEDC1 20
LEDB2 41
LEDC2 40
PAD_GND
43
VDD 1
VDD 4
VDD 8
VDD 14
VDD 21
VDD 30
VDD 39
PD
5
L35 12NH_0603CS-120EJTS_5%~DL35 12NH_0603CS-120EJTS_5%~D
1 2
R551 0_0402_5%~DR551 0_0402_5%~D
1 2
C466
0.1U_0402_10V7K~D
C466
0.1U_0402_10V7K~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
JETWAY_CLK14M
JETWAY_CLK14M
CLK_PCI_TPM_TCM
CLK_PCI_TPM_TCM
CLKRUN#
PCH_PLTRST#_EC
IRQ_SERIRQ
LPC_LFRAME#
SP_TPM_LPC_EN
LPC_LAD3
LPC_LAD2
LPC_LAD1
LPC_LAD0
CLK_PCI_TPM_TCM
CLKRUN#
IRQ_SERIRQ
LPC_LFRAME#
PCH_PLTRST#_EC
SP_TPM_LPC_EN
LPC_LAD3
LPC_LAD2
LPC_LAD1
LPC_LAD0
PP
PP
NC_P
NC_P
TCM_BA1
TCM_BA0
TCM_BA0
TCM_BA1
TCM_BA0
TCM_BA1
JETWAY_CLK14M
USH_SMBDAT
USH_SMBCLK
+3.3V_RUN_TPM
+3.3V_RUN_TPM+3.3V_RUN
+5V_RUN
+3.3V_SUS
+3.3V_RUN
+3.3V_RUN_TPM
+3.3V_RUN_TPM
+3.3V_RUN_TPM
+3.3V_SB3V
+3.3V_SB3V
+3.3V_SB3V
+3.3V_RUN_TPM +3.3V_SUS
USBP7-<17> USBP7+<17>
USH_SMBDAT<41>
BT_COEX_STATUS2<42> BT_PRI_STATUS<42>
PLTRST_USH#<17>
USH_PWR_STATE#<40> CONTACTLESS_DET#<18>
USH_DET#<18>
CLK_PCI_TPM_TCM<15>
USH_SMBCLK<41>
BCM5882_ALERT#<40>
LPC_LFRAME#<14,35,40,41>
PCH_PLTRST#_EC<17,35,36,40,41> IRQ_SERIRQ<14,40,41> CLKRUN#<16,40,41>
SP_TPM_LPC_EN<40>
LPC_LAD0<14,35,40,41>
LPC_LAD2<14,35,40,41> LPC_LAD1<14,35,40,41>
LPC_LAD3<14,35,40,41>
JETWAY_CLK14M <15>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
USH conn/TPM
33 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
USH conn/TPM
33 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
USH conn/TPM
33 66Friday, June 10, 2011
Compal Electronics, Inc.
LOW:Power Down Mode
High:Working Mode
China TCM: NationZ & Jetway co-lay
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
LPC layout: Place TCM first and then end LPC with TPM.
ATMEL TPM for E4
Co-lay U37 and U38
C44
0.1U_0402_25V6K~D
1@
C44
0.1U_0402_25V6K~D
1@
1
2JUSH1
TYCO_2-2041070-0
JUSH1
TYCO_2-2041070-0
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
GND1
21
GND2
22
CE3
27P_0402_50V8J~D
@CE3
27P_0402_50V8J~D
@1
2
R589 2.2K_0402_5%~DR589 2.2K_0402_5%~D
1 2
R873 0_0402_5%~D1@ R873 0_0402_5%~D1@ 1 2
U39
AT97SC3204-X2A14-AB_TSSOP28
1@ U39
AT97SC3204-X2A14-AB_TSSOP28
1@
LAD3
17 LAD2
20 LAD1
23 LAD0
26
LCLK
21
LFRAME#
22
LRESET#
16
SERIRQ
27
CLKRUN#
15
NC_7 7
ATEST_1
1
ATEST_2
2
GPIO6 6
TESTI 8
TESTBI 9
VCC_0 10
VCC_1 19
VCC_2 24
GND_4 4
GND_11 11
GND_18 18
GND_25 25
ATEST_3
3
SB3V
5
V_BAT 12
NBO_13 13
NBO_14 14
LPCPD#
28
C53
0.1U_0402_25V6K~D
C53
0.1U_0402_25V6K~D
1
2
R585 2.2K_0402_5%~DR585 2.2K_0402_5%~D
1 2
CE4
27P_0402_50V8J~D
@
CE4
27P_0402_50V8J~D
@
1
2
RE6
33_0402_5%~D
@
RE6
33_0402_5%~D
@
12
U37
SSX44-B-D-T1_TSSOP28~D
4@ U37
SSX44-B-D-T1_TSSOP28~D
4@
LAD3
17 LAD2
20 LAD1
23 LAD0
26
LCLK
21
LFRAME#
22
LRESET#
16
SERIRQ
27
CLKRUN#
15
PP
7NC_1 1
NC_2 2
NC_6 6
NC_8 8
BA_0
9
VDD_0 10
VDD_1 19
VDD_2 24
GND_4 4
GND_11 11
GND_18 18
GND_25 25
BA_1
3
NC_5 5
NC_12 12
NC_13 13
NC_P 14
LPCPD#
28
C551
2200P_0402_50V7K~D
C551
2200P_0402_50V7K~D
1
2
RE5
33_0402_5%~D
@RE5
33_0402_5%~D
@
12
R656 4.7K_0402_5%~D@R656 4.7K_0402_5%~D@1 2
C553
0.1U_0402_25V6K~D
C553
0.1U_0402_25V6K~D
1
2
C552
2200P_0402_50V7K~D
C552
2200P_0402_50V7K~D
1
2
R660
10K_0402_5%~D
R660
10K_0402_5%~D
12
C554 1U_0402_6.3V6K~DC554 1U_0402_6.3V6K~D
1 2
C45
4700P_0402_25V7K~D
1@
C45
4700P_0402_25V7K~D
1@
1
2
PJP61
PAD-OPEN1x1m
PJP61
PAD-OPEN1x1m
1 2
R659
10K_0402_5%~D
R659
10K_0402_5%~D
12
C51
0.1U_0402_25V6K~D
C51
0.1U_0402_25V6K~D
1
2
C550
2200P_0402_50V7K~D
C550
2200P_0402_50V7K~D
1
2
C52
0.1U_0402_25V6K~D
C52
0.1U_0402_25V6K~D
1
2
R658
10K_0402_5%~D
@R658
10K_0402_5%~D
@
12
R657
10K_0402_5%~D
@R657
10K_0402_5%~D
@
12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
PCIE_PRX_MMITX_N6_C
PCIE_PRX_MMITX_P6_C
+SKT_VCC
+OZ_AVDD
+OZ_DVDD
SD/MMCCLK
PCIE_PTX_MMIRX_N6_C
PCIE_PTX_MMIRX_P6_C
SDWP
SD/MMCCD#
+PE_VDDH
SD/MMCDAT3
SD/MMCDAT0
SD/MMCDAT1
SD/MMCDAT2
SD/MMCDAT4
SD/MMCDAT7
SD/MMCDAT6
SD/MMCDAT5
SDWP
SD/MMCCD#
SD/MMCCD#
SDWP
SD/MMCCLK
SD/MMCCMD
+PE_VDDH+PE_VDDH
+3.3VDDH
+VDDH_SD
SD/MMCDAT1
SD/MMCDAT2
SD/MMCDAT0
SD/MMCDAT3
SD/MMCDAT4
SD/MMCDAT5
SD/MMCDAT6
SD/MMCDAT7
SD/MMCCMD
SD/MMCCLK
SD/MMCDAT1_R
SD/MMCDAT0_R
SD/MMCDAT2_R
SD/MMCDAT7_R
SD/MMCDAT5_R
SD/MMCDAT6_R
SD/MMCDAT4_R
SD/MMCDAT3_R
SD/MMCCLK_R
SD/MMCCMD_R
+3.3V_RUN_CARD
+3.3V_RUN_CARD
+1.5V_RUN
+3.3V_RUN
MMICLK_REQ#<15>
PLTRST_MMI#<17>
CLK_PCIE_MMI<15> CLK_PCIE_MMI#<15>
PCIE_PRX_MMITX_P6<15> PCIE_PRX_MMITX_N6<15>
PCIE_PTX_MMIRX_N6<15> PCIE_PTX_MMIRX_P6<15>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
Card Reader OZ600FJ0
34 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
Card Reader OZ600FJ0
34 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
Card Reader OZ600FJ0
34 66Friday, June 10, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
EMI request
Note: The trace need to route as
daisy-chain and the trace of SD signals
need to route as short as possible
place close to pin U38.32
only for MMC/SD
C565
0.1U_0402_25V6K~D
C565
0.1U_0402_25V6K~D
1
2
L44 BLM18BD601SN1D_0603~DL44 BLM18BD601SN1D_0603~D
1 2
R826
10K_0402_5%~D
R826
10K_0402_5%~D
12
C563
0.1U_0402_25V6K~D
C563
0.1U_0402_25V6K~D
1
2
CE757
10P_0402_50V8J~D
@CE757
10P_0402_50V8J~D
@
1
2
R663 33_0402_5%~DR663 33_0402_5%~D
1 2
C570
0.1U_0402_25V6K~D
C570
0.1U_0402_25V6K~D
1
2
U38
OZ600FJ0LN_QFN32_5X5~D
U38
OZ600FJ0LN_QFN32_5X5~D
AVDD 8
PE_TXP
6
PE_TXM
7
PE_RST#
13
MMI_D3 24
MMI_D4 23
PE_REXT
3
DVDD 10
MS_CD# 11
MULTI-IO1
14
MULTI-IO2
31
MMI_D6 21
MMI_D7 20
MMI_D5 22
MS_D1 27
PE_RXP
5
VDDH
9
SD_D2 26
MS_D2 25
SKT_VCC 17
PE_RXM
4
MMI_CLK 18
SD_WPI 30
SD_CD# 12
3.3VDDH
16
SD_CMD/MS_BS 19
PE_REFCLKM
1PE_REFCLKP
2MMI_VCC_OUT 15
SD_D1 28
MMI_D0 29
PE_VDDH
32
GPAD
33 R673 33_0402_5%~DR673 33_0402_5%~D
1 2
R664 33_0402_5%~DR664 33_0402_5%~D
1 2
R674 33_0402_5%~DR674 33_0402_5%~D
1 2
R670 33_0402_5%~DR670 33_0402_5%~D
1 2
C568 0.1U_0402_10V7K~DC568 0.1U_0402_10V7K~D
1 2
C562
0.1U_0402_25V6K~D
C562
0.1U_0402_25V6K~D
1
2
R677 191_0402_1%~DR677 191_0402_1%~D
1 2
C559
0.1U_0402_25V6K~D
C559
0.1U_0402_25V6K~D
1
2
R669 33_0402_5%~DR669 33_0402_5%~D
1 2
C577
4.7U_0603_6.3V6K~D
C577
4.7U_0603_6.3V6K~D
1
2
C560
4.7U_0603_6.3V6K~D
C560
4.7U_0603_6.3V6K~D
1
2
C567 0.1U_0402_10V7K~DC567 0.1U_0402_10V7K~D
1 2
C576
0.1U_0402_25V6K~D
C576
0.1U_0402_25V6K~D
1
2
R668 33_0402_5%~DR668 33_0402_5%~D
1 2
RE678
33_0402_5%~D
@RE678
33_0402_5%~D
@
1 2
C575
0.1U_0402_25V6K~D
C575
0.1U_0402_25V6K~D
1
2
C561
4.7U_0603_6.3V6K~D
C561
4.7U_0603_6.3V6K~D
1
2
C573
0.1U_0402_25V6K~D
C573
0.1U_0402_25V6K~D
1
2
R676 33_0402_5%~DR676 33_0402_5%~D
1 2
JSD1
T-SOL_156-3000000901~D
CONN@JSD1
T-SOL_156-3000000901~D
CONN@
DAT6/MMC-12
7
CD&WP/SW/GND
19
GND SW
16
VSS1/SD-3
10
CMD/SD-2
12
CD SW
17
DAT5/MMC-11
11
DAT7/MMC-13
5
CLK/SD-5
8
CD&WP/SW/GND
20
WP SW
18
DAT2/SD-9
15
CD SW/SD
2
VCC/VDD/SD-4
9
DAT1/SD-8
3
WP SW/SD
1
GND/VSS2/SD6
6
DAT3/SD-1
14
DAT4/MMC-10
13
DAT0/SD-7
4
GND1 21
GND2 22
C569 0.1U_0402_10V7K~DC569 0.1U_0402_10V7K~D
1 2
C574
0.01U_0402_16V7K~D
C574
0.01U_0402_16V7K~D
1
2
C564
4.7U_0603_6.3V6K~D
C564
4.7U_0603_6.3V6K~D
1
2
L45
BLM18PG471SN1D_2P~D
L45
BLM18PG471SN1D_2P~D
1 2
C578 4.7U_0603_6.3V6K~DC578 4.7U_0603_6.3V6K~D
12
R672 33_0402_5%~DR672 33_0402_5%~D
1 2
C566
4.7U_0603_6.3V6K~D
C566
4.7U_0603_6.3V6K~D
1
2
C571 0.1U_0402_10V7K~DC571 0.1U_0402_10V7K~D
1 2
R665 33_0402_5%~DR665 33_0402_5%~D
1 2
L47
BLM18BD601SN1D_0603~D
L47
BLM18BD601SN1D_0603~D
1 2
C572
4.7U_0603_6.3V6K~D
C572
4.7U_0603_6.3V6K~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
UIM_VPP
UIM_DATA
UIM_RESET
UIM_CLK
USBP5-
USBP5+
CLK_PCIE_MINI1#
CLK_PCIE_MINI1
MINI1CLK_REQ#
PCIE_PRX_WANTX_N1
PCIE_PRX_WANTX_P1 USBP4-
USBP4+PCIE_MCARD1_DET#
WLAN_LED#
PCIE_PRX_WLANTX_P2
PCIE_PRX_WLANTX_N2
WLAN_RADIO_DIS#_R
PCH_PLTRST#_EC
PCIE_WAKE#
COEX2_WLAN_ACTIVE
PCIE_MCARD2_DET#_R
WLAN_RADIO_DIS#_R
COEX2_WLAN_ACTIVE
UIM_DATA
UIM_CLK
UIM_RESET
UIM_VPP
WIMAX_LED#
UIM_RESET
UIM_CLK UIM_VPP
PCIE_MCARD1_DET#
PCIE_MCARD1_DET#
COEX1_BT_ACTIVE
LED_WWAN_OUT#LED_WWAN_OUT#
USBP6-
USBP6+
PCH_PLTRST#_EC
PCIE_MCARD3_DET#
CLK_PCIE_MINI3#
CLK_PCIE_MINI3
MINI3CLK_REQ#
PCIE_PRX_WPANTX_N5
PCIE_PRX_WPANTX_P5
COEX2_WLAN_ACTIVE PCIE_WAKE#
UIM_DATA
PCIE_MCARD2_DET#USB_MCARD2_DET#
USB_MCARD2_DET#
PCIE_MCARD1_DET#USB_MCARD1_DET#
USB_MCARD1_DET#
USB_MCARD1_DET#
USB_MCARD2_DET#
WWAN_SMBCLK
WWAN_SMBDAT
WWAN_SMBCLK
WWAN_SMBDAT
MSDATA
MSDATA
USB_MCARD3_DET# PCIE_MCARD3_DET#
USB_MCARD3_DET#
USB_MCARD3_DET#
LED_WWAN_OUT#
WIMAX_LED#
WLAN_LED#
WIRELESS_LED#WIRELESS_LED#
PCIE_PTX_WANRX_N1_C
PCIE_PTX_WANRX_P1_C
PCIE_PTX_WLANRX_N2_C
PCIE_PTX_WLANRX_P2_C
PCIE_PTX_WPANRX_N5_C
PCIE_PTX_WPANRX_P5_C
PCIE_MCARD2_DET#_R
PCH_PLTRST#_EC
PCLK_80H
LPC_LAD1
LPC_LFRAME#
LPC_LAD0
LPC_LAD3
LPC_LAD2
+1.5V_RUN
+3.3V_PCIE_WWAN
+1.5V_RUN
+SIM_PWR
+3.3V_PCIE_WWAN+3.3V_PCIE_WWAN
+3.3V_WLAN
+1.5V_RUN
+3.3V_WLAN
+3.3V_PCIE_WWAN
+3.3V_WLAN
+1.5V_RUN
+SIM_PWR
+SIM_PWR
+3.3V_RUN
+3.3V_ALW_PCH
+3.3V_PCIE_FLASH+3.3V_PCIE_FLASH
+1.5V_RUN
+3.3V_PCIE_FLASH
+1.5V_RUN
+3.3V_RUN
+3.3V_RUN
+3.3V_PCIE_WWAN
+3.3V_ALW_PCH
+3.3V_PCIE_WWAN
+3.3V_WLAN
PCIE_PRX_WANTX_N1<15> PCIE_PRX_WANTX_P1<15>
CLK_PCIE_MINI1<15> CLK_PCIE_MINI1#<15>
MINI1CLK_REQ#<15>
WWAN_RADIO_DIS# <40>
PCIE_MCARD2_DET#<17>
PCH_PLTRST#_EC <17,33,36,40,41>
PCIE_MCARD1_DET#<18>
PCIE_PRX_WLANTX_P2<15> PCIE_PRX_WLANTX_N2<15>
MINI2CLK_REQ#<15>
WLAN_RADIO_DIS#<40>
PCH_CL_RST1#<15> PCH_CL_DATA1<15>
HOST_DEBUG_TX <41>
HOST_DEBUG_RX<41> MSCLK<41>
MSDATA <41>
PCIE_MCARD3_DET#<18>
MINI3CLK_REQ#<15>
CLK_PCIE_MINI3#<15> CLK_PCIE_MINI3<15>
COEX2_WLAN_ACTIVE<42> COEX1_BT_ACTIVE<42>
USB_MCARD2_DET# <18>
USB_MCARD1_DET# <14,18>
USBP4+ <17>
USBP4- <17>
USBP6- <17>
USBP6+ <17>
PCIE_PRX_WPANTX_P5<15> PCIE_PRX_WPANTX_N5<15>
PCIE_WAKE#<29,36,41>
USBP5- <17>
USBP5+ <17>
CLK_PCIE_MINI2#<15> CLK_PCIE_MINI2<15>
PCH_CL_CLK1<15>
DDR_XDP_WAN_SMBDAT<7,12,13,14,15,28>
DDR_XDP_WAN_SMBCLK<7,12,13,14,15,28>
WIRELESS_LED# <40,44>
PCIE_PTX_WANRX_N1<15> PCIE_PTX_WANRX_P1<15>
PCIE_PTX_WLANRX_P2<15> PCIE_PTX_WLANRX_N2<15>
PCIE_PTX_WPANRX_N5<15> PCIE_PTX_WPANRX_P5<15>
HW_GPS_DISABLE2#<40>
PCLK_80H<15>
LPC_LAD1 <14,33,40,41>
LPC_LFRAME# <14,33,40,41>
LPC_LAD0 <14,33,40,41>
LPC_LAD3 <14,33,40,41>
LPC_LAD2 <14,33,40,41>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
Mini Card
35 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
Mini Card
35 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
Mini Card
35 66Friday, June 10, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+-9%
+3.3Vaux
+3.3V
Voltage
Tolerance
+1.5V
+-9%
+-5%
PWR
Rail
Primary Power Aux Power
Peak Normal Normal
1000 750
330
500
250
375
250 (Wake enable)
5 (Not wake enable)
NA
1/2 Minicard Pink Pather/60GHz Card H=4
Mini WLAN/WIMAX H=4
Mini WWAN/GPS/LTE H=5.2
SIM Card Push-Push
WIMAX_LED# STUDY FOR DEBUG
check
WPAN Noise
just reserve
+
C1176
330U_D2E_6.3VM_R25~D
@
+
C1176
330U_D2E_6.3VM_R25~D
@
1
2
R699 100K_0402_5%~D@R699 100K_0402_5%~D@1 2
R702 0_0402_5%~DR702 0_0402_5%~D
1 2
C631
33P_0402_50V8J~D
@C631
33P_0402_50V8J~D
@
1
2
C594
0.047U_0402_16V4Z~D
C594
0.047U_0402_16V4Z~D
1
2
C626
4.7U_0603_6.3V6K~D
C626
4.7U_0603_6.3V6K~D
1
2
R705
100K_0402_5%~D
R705
100K_0402_5%~D
1 2
C605
0.047U_0402_16V4Z~D
C605
0.047U_0402_16V4Z~D
1
2
C604
0.047U_0402_16V4Z~D
C604
0.047U_0402_16V4Z~D
1
2
C595 4700P_0402_25V7K~DC595 4700P_0402_25V7K~D
1 2
JMINI3
TYCO_1775861-1~D
CONN@
JMINI3
TYCO_1775861-1~D
CONN@
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
GND1
53
22
44
66
88
10 10
12 12
14 14
16 16
18 18
20 20
22 22
24 24
26 26
28 28
30 30
32 32
34 34
36 36
38 38
40 40
42 42
44 44
46 46
48 48
50 50
52 52
GND2 54
R700 0_0402_5%~DR700 0_0402_5%~D
1 2
R694 100K_0402_5%~DR694 100K_0402_5%~D
12
C600
33P_0402_50V8J~D
@C600
33P_0402_50V8J~D
@
1
2
JSIM1
MOLEX_475531001
CONN@
JSIM1
MOLEX_475531001
CONN@
VCC
1
RST
2
CLK
3
GND 5
VPP 6
I/O 7
NC 8
NC
4
GND 9
GND 10
R701 100K_0402_5%~DR701 100K_0402_5%~D
1 2
D31
RB751S40T1_SOD523-2~D
D31
RB751S40T1_SOD523-2~D
21
R693 0_0402_5%~D@R693 0_0402_5%~D@1 2
C629
33P_0402_50V8J~D
@C629
33P_0402_50V8J~D
@
1
2
C613
22U_0805_6.3V6M~D
C613
22U_0805_6.3V6M~D
1
2
R709 0_0402_5%~DR709 0_0402_5%~D
1 2
R707 0_0402_5%~DR707 0_0402_5%~D
1 2
C620
0.047U_0402_16V4Z~D
C620
0.047U_0402_16V4Z~D
1
2
C596 0.1U_0402_10V7K~DC596 0.1U_0402_10V7K~D
1 2
C621
0.1U_0402_25V6K~D
@C621
0.1U_0402_25V6K~D
@
1
2
C610
0.047U_0402_16V4Z~D
C610
0.047U_0402_16V4Z~D
1
2
+
C615
330U_D2E_6.3VM_R25~D
+
C615
330U_D2E_6.3VM_R25~D
1
2
C597 0.1U_0402_10V7K~DC597 0.1U_0402_10V7K~D
1 2
R710 0_0402_5%~DR710 0_0402_5%~D
1 2
Q124B
DMN66D0LDW-7_SOT363-6~D
Q124B
DMN66D0LDW-7_SOT363-6~D
3
5
4
C607
0.1U_0402_25V6K~D
C607
0.1U_0402_25V6K~D
1
2
R703 0_0402_5%~DR703 0_0402_5%~D
12
U40
SRV05-4.TCT_SOT23-6~D
@U40
SRV05-4.TCT_SOT23-6~D
@
2
3
1
4
6
5
C624
0.1U_0402_25V6K~D
C624
0.1U_0402_25V6K~D
1
2
C619
0.047U_0402_16V4Z~D
C619
0.047U_0402_16V4Z~D
1
2
C623
0.047U_0402_16V4Z~D
C623
0.047U_0402_16V4Z~D
1
2
C593
33P_0402_50V8J~D
C593
33P_0402_50V8J~D
1
2
C598 0.1U_0402_10V7K~DC598 0.1U_0402_10V7K~D
1 2
C606
0.1U_0402_25V6K~D
C606
0.1U_0402_25V6K~D
1
2
R1159
2.2K_0402_5%~D
@R1159
2.2K_0402_5%~D
@
12
R718
100K_0402_5%~D
R718
100K_0402_5%~D
1 2
C630
33P_0402_50V8J~D
@C630
33P_0402_50V8J~D
@
1
2
R1158 0_0402_5%~DR1158 0_0402_5%~D
12
G
D
S
Q77
SSM3K7002FU_SC70-3~D
G
D
S
Q77
SSM3K7002FU_SC70-3~D
2
13
C603
0.1U_0402_25V6K~D
@C603
0.1U_0402_25V6K~D
@
1
2
R708 0_0402_5%~D@R708 0_0402_5%~D@1 2
C602
0.047U_0402_16V4Z~D
C602
0.047U_0402_16V4Z~D
1
2
Q124A
DMN66D0LDW-7_SOT363-6~D
Q124A
DMN66D0LDW-7_SOT363-6~D
61
2
R719
100K_0402_5%~D
R719
100K_0402_5%~D
1 2
R1160
2.2K_0402_5%~D
@R1160
2.2K_0402_5%~D
@
12
C627
4700P_0402_25V7K~D
@C627
4700P_0402_25V7K~D
@
1
2
R697 0_0402_5%~D@R697 0_0402_5%~D@1 2
C628
33P_0402_50V8J~D
@C628
33P_0402_50V8J~D
@
1
2
JMINI1
TYCO_1775861-1~D
CONN@
JMINI1
TYCO_1775861-1~D
CONN@
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
GND1
53
22
44
66
88
10 10
12 12
14 14
16 16
18 18
20 20
22 22
24 24
26 26
28 28
30 30
32 32
34 34
36 36
38 38
40 40
42 42
44 44
46 46
48 48
50 50
52 52
GND2 54
C614
33P_0402_50V8J~D
C614
33P_0402_50V8J~D
1
2
JMINI2
TYCO_1775861-1~D
CONN@
JMINI2
TYCO_1775861-1~D
CONN@
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
GND1
53
22
44
66
88
10 10
12 12
14 14
16 16
18 18
20 20
22 22
24 24
26 26
28 28
30 30
32 32
34 34
36 36
38 38
40 40
42 42
44 44
46 46
48 48
50 50
52 52
GND2 54
C608
4.7U_0603_6.3V6K~D
C608
4.7U_0603_6.3V6K~D
1
2
R711 100K_0402_5%~DR711 100K_0402_5%~D
1 2
R712 100K_0402_5%~D@R712 100K_0402_5%~D@12
R706 0_0402_5%~D@R706 0_0402_5%~D@1 2
C599 0.1U_0402_10V7K~DC599 0.1U_0402_10V7K~D
1 2
C601
0.047U_0402_16V4Z~D
C601
0.047U_0402_16V4Z~D
1
2
C617 0.1U_0402_10V7K~DC617 0.1U_0402_10V7K~D
1 2
C618 0.1U_0402_10V7K~DC618 0.1U_0402_10V7K~D
1 2
R1157 0_0402_5%~DR1157 0_0402_5%~D
12
C622
0.047U_0402_16V4Z~D
C622
0.047U_0402_16V4Z~D
1
2
C616
1U_0402_6.3V6K~D
C616
1U_0402_6.3V6K~D
1
2
R698 0_0402_5%~D@R698 0_0402_5%~D@1 2
C612
33P_0402_50V8J~D
C612
33P_0402_50V8J~D
1
2
R704 0_0402_5%~DR704 0_0402_5%~D
1 2
C625
0.1U_0402_25V6K~D
C625
0.1U_0402_25V6K~D
1
2
R692 100K_0402_5%~DR692 100K_0402_5%~D
1 2
C611
0.047U_0402_16V4Z~D
C611
0.047U_0402_16V4Z~D
1
2
R725 0_0402_5%~DR725 0_0402_5%~D
1 2
R695 100K_0402_5%~DR695 100K_0402_5%~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MCARD_WWAN_PWREN#
MCARD_WWAN_PWREN#
USBP10_D+
USBP10_D-
CARD_SMBCLK
CARD_SMBDAT
CARD_RESET#
CPUSB#
EXPRCRD_CPPE#
EXPRCRD_CPPE#
CARD_RESET#
CPUSB#
EXPRCRD_STBY_R#
PCIE_PTX_EXPRX_N3_C
PCIE_PTX_EXPRX_P3_C
+3.3V_ALW +3.3V_PCIE_FLASH
+3.3V_PCIE_WWAN
+3.3V_ALW
+3.3V_WLAN
+3.3V_ALW
+3.3V_SUS +1.5V_CARD
+3.3V_CARDAUX
+3.3V_CARD
+1.5V_RUN +1.5V_CARD+3.3V_SUS
+3.3V_RUN +3.3V_CARD
+3.3V_CARDAUX
+3.3V_RUN
+1.5V_RUN
+1.5V_CARD
+3.3V_CARD
+PWR_SRC_S
+3.3V_ALW
+3.3V_ALW +PWR_SRC_S
+3.3V_ALW +PWR_SRC_S
MCARD_MISC_PWREN<40>
MCARD_WWAN_PWREN<40>
AUX_EN_WOWL<40>
USBP10+<17>
USBP10-<17>
CARD_SMBCLK<41>
CARD_SMBDAT<41>
PCIE_WAKE#<29,35,41>
EXPCLK_REQ#<15>
CLK_PCIE_EXP#<15> CLK_PCIE_EXP<15>
PCIE_PRX_EXPTX_N3<15> PCIE_PRX_EXPTX_P3<15>
PCH_PLTRST#_EC<17,33,35,40,41> RUN_ON<28,40,43,56,64>
PCIE_PTX_EXPRX_N3<15> PCIE_PTX_EXPRX_P3<15>
SIO_SLP_S3#<11,16,28,40,43,56>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
PCIE-SATA SW / PCIE PWR
36 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
PCIE-SATA SW / PCIE PWR
36 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
PCIE-SATA SW / PCIE PWR
36 66Friday, June 10, 2011
Compal Electronics, Inc.
Power Control for Mini card3
Express Card Conn.
Express Card PWR S/W
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
Power Control for Mini card2
Power Control for Mini card1 Note: Add connection on pin4, pin5, pin 13
and pin14 to support GMT 2nd source part
R722
100K_0402_5%~D
R722
100K_0402_5%~D
12
C634
0.1U_0402_25V6K~D
C634
0.1U_0402_25V6K~D
1
2
R1625
1M_0402_5%~D
R1625
1M_0402_5%~D
12
C645
0.1U_0402_25V6K~D
C645
0.1U_0402_25V6K~D
1
2
C632
4700P_0402_25V7K~D
C632
4700P_0402_25V7K~D
1
2
R1620
1M_0402_5%~D
R1620
1M_0402_5%~D
12
R729
100K_0402_5%~D
R729
100K_0402_5%~D
12
R726
100K_0402_5%~D
R726
100K_0402_5%~D
12
C646
0.1U_0402_25V6K~D
C646
0.1U_0402_25V6K~D
1
2
C633
0.1U_0402_25V6K~D
C633
0.1U_0402_25V6K~D
1
2
C649
0.1U_0402_25V6K~D
C649
0.1U_0402_25V6K~D
1
2
Q43A
DMN66D0LDW-7_SOT363-6~D
Q43A
DMN66D0LDW-7_SOT363-6~D
61
2
S
GD
Q38
SI3456DDV-T1-GE3_TSOP6~D
S
GD
Q38
SI3456DDV-T1-GE3_TSOP6~D
3
6
245
1
C637
0.1U_0402_25V6K~D
C637
0.1U_0402_25V6K~D
1
2
R713
100K_0402_5%~D
R713
100K_0402_5%~D
12
R734 0_0402_5%~DR734 0_0402_5%~D
1 2
C638
10U_0603_6.3V6M~D
C638
10U_0603_6.3V6M~D
1
2
C648 0.1U_0402_10V7K~DC648 0.1U_0402_10V7K~D
1 2
R724 0_0402_5%~D@R724 0_0402_5%~D@1 2
R721
100K_0402_5%~D
R721
100K_0402_5%~D
12
S
G
D
Q40
SI3456DDV-T1-GE3_TSOP6~D
S
G
D
Q40
SI3456DDV-T1-GE3_TSOP6~D
3
6
245
1
R733
100K_0402_5%~D
R733
100K_0402_5%~D
12
S
G
D
Q42
SI3456DDV-T1-GE3_TSOP6~D
S
G
D
Q42
SI3456DDV-T1-GE3_TSOP6~D
3
6
245
1
R727 0_0402_5%~D@R727 0_0402_5%~D@1 2
Q41B
DMN66D0LDW-7_SOT363-6~D
Q41B
DMN66D0LDW-7_SOT363-6~D
3
5
4
R728
100K_0402_5%~D
R728
100K_0402_5%~D
12
R731
2.2K_0402_5%~D
R731
2.2K_0402_5%~D
12
G
D
S
Q73
SSM3K7002FU_SC70-3~D
G
D
S
Q73
SSM3K7002FU_SC70-3~D
2
13
C640
0.1U_0402_25V6K~D
C640
0.1U_0402_25V6K~D
1
2
Q39B
DMN66D0LDW-7_SOT363-6~D
Q39B
DMN66D0LDW-7_SOT363-6~D
3
5
4
Q39A
DMN66D0LDW-7_SOT363-6~D
Q39A
DMN66D0LDW-7_SOT363-6~D
61
2
R715
20K_0402_5%~D
R715
20K_0402_5%~D
12
R1628
1M_0402_5%~D
R1628
1M_0402_5%~D
12
C642
0.1U_0402_25V6K~D
C642
0.1U_0402_25V6K~D
1
2
R717 0_0402_5%~D@R717 0_0402_5%~D@1 2
C644
4700P_0402_25V7K~D
C644
4700P_0402_25V7K~D
1
2
Q41A
DMN66D0LDW-7_SOT363-6~D
Q41A
DMN66D0LDW-7_SOT363-6~D
61
2
R714
100K_0402_5%~D
R714
100K_0402_5%~D
12
C647 0.1U_0402_10V7K~DC647 0.1U_0402_10V7K~D
1 2
C635
0.1U_0402_25V6K~D
C635
0.1U_0402_25V6K~D
1
2
Q43B
DMN66D0LDW-7_SOT363-6~D
Q43B
DMN66D0LDW-7_SOT363-6~D
3
5
4
R732
2.2K_0402_5%~D
R732
2.2K_0402_5%~D
12
R716
100K_0402_5%~D
R716
100K_0402_5%~D
12
U41
TPS2231MRGPR-2_QFN20_4X4~D
U41
TPS2231MRGPR-2_QFN20_4X4~D
STBY#
1
3.3VIN
23.3VOUT 3
NC
4
NC
5
SYSRST#
6
GND 7
PERST# 8
CPUSB# 9
CPPE# 10
1.5VOUT 11
1.5VIN
12
NC
13
NC
14
AUXOUT 15
NC
16
AUXIN
17
RCLKEN 18
OC#
19
SHDN#
20
PAD 21
C643
10U_0603_6.3V6M~D
C643
10U_0603_6.3V6M~D
1
2
L49 DLW21SN900SQ2L_0805_4P~DL49 DLW21SN900SQ2L_0805_4P~D
1
122
33
4
4
R723
1K_0402_1%~D
R723
1K_0402_1%~D
12
JEXP1
T-SOL_5421005002000-9_NR
CONN@
JEXP1
T-SOL_5421005002000-9_NR
CONN@
GND
26 PET_P0
25 PET_N0
24 GND
23 PER_P0
22 PER_N0
21 GND
20 REFCLK+
19 REFCLK-
18 CPPE#
17 CLKREQ#
16 +3.3V
15 +3.3V
14 PERST#
13 +3.3VAUX
12 WAKE#
11 +1.5V
10 +1.5V
9SMB_DAT
8SMB_CLK
7RESERVED
6RESERVED
5CPUSB#
4USB_D+
3USB_D-
2GND1
1
GND
27
GND
28
GND
29
GND
30
C641
10U_0603_6.3V6M~D
C641
10U_0603_6.3V6M~D
1
2
C650
4700P_0402_25V7K~D
C650
4700P_0402_25V7K~D
1
2
R730
20K_0402_5%~D
R730
20K_0402_5%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USBP1_D-
USBP1_D+
USBP0_D-
USBP0_D+ USBP0_R_D+
USBP0_R_D-
USBP0_R_D+
USBP0_R_D-
USB3RP1_D+
USB3TN1_D-
USB3TP1_D+
USB3RN1_D-
USB3RN1
USB3RP1 USB3RP1_D+
USB3TP1_C USB3TP1_D+
USB3TN1_D-USB3TN1_C
USB3TP1_D+
USB3RP1_D+
USB3TP1_D+
USB3RN1_D-
USB3TN1_D-
USB3RP1_D+
USB3TN1_D-
USB3RN1_D-USB3RN1_D-
USB3RN2
USB3RP2 USB3RP2_D+
USB3TP2_C USB3TP2_D+
USB3TN2_D-USB3TN2_C
USB3TP2_D+
USB3RP2_D+
USB3TP2_D+
USB3RN2_D-
USB3TN2_D-
USB3RP2_D+
USB3TN2_D-
USB3RN2_D- USB3RN2_D-
PWRSHARE_EN#
SB#
USBP0_D+
USBP0_D-
PWRSHARE_EN
SEL
USB3TP2_D+
USB3TN2_D-
USB3RP2_D+
USB3RN2_D-
USBP1_D+
USBP1_D-
PWRSHARE_EN#
+5V_USB_CHG_PWR
+5V_ALW +5V_ALW
+5V_ALW
+5V_USB_CHG_PWR
+5V_ALW
+5V_USB_CHG_PWR
+SATA_SIDE_PWR
USBP1+<17>
USBP1-<17>
USB3RN1<17>
USB3RP1<17>
USB3RN2<17>
USB3RP2<17>
USB3TP1<17>
USB3TN1<17>
USB_PWR_SHR_EN#<40>
USBP0+<17>
USB_PWR_SHR_VBUS_EN<40>
USBP0-<17>
USB3TN2<17>
USB3TP2<17>
USB_OC0# <17>
ESATA_USB_PWR_EN#<40>
USB_OC1# <17>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
USB x2
37 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
USB x2
37 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
USB x2
37 66Friday, June 10, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
L95
DLW21SN900HQ2L_0805_4P~D
L95
DLW21SN900HQ2L_0805_4P~D
1
122
33
4
4
R740 0_0402_5%~D@R740 0_0402_5%~D@1 2
R1614
10K_0402_5%~D
R1614
10K_0402_5%~D
1 2
L97
DLW21SN900HQ2L_0805_4P~D
L97
DLW21SN900HQ2L_0805_4P~D
1
122
33
4
4
8
D79
IP4292CZ10-TB_XSON10U10~D
8
D79
IP4292CZ10-TB_XSON10U10~D
4
5
1
6
2
7
3
10
9
R1605 0_0402_5%~D@R1605 0_0402_5%~D@1 2
C412 0.01U_0402_16V7K~DC412 0.01U_0402_16V7K~D
12
R1603 0_0402_5%~D@R1603 0_0402_5%~D@1 2
R1606 0_0402_5%~D@R1606 0_0402_5%~D@1 2
R737 0_0402_5%~D@R737 0_0402_5%~D@1 2
R1609 0_0402_5%~D@R1609 0_0402_5%~D@1 2
C413 0.01U_0402_16V7K~DC413 0.01U_0402_16V7K~D
12
+
C651
150U_B2_6.3V-M~D
+
C651
150U_B2_6.3V-M~D
1
2
L51
DLW21SN900SQ2L_0805_4P~D
L51
DLW21SN900SQ2L_0805_4P~D
1
122
33
4
4
L52
DLW21SN900SQ2L_0805_4P~D
L52
DLW21SN900SQ2L_0805_4P~D
1
122
33
4
4
C675
0.1U_0402_25V6K~D
C675
0.1U_0402_25V6K~D
1
2
C715
0.1U_0402_25V6K~D
C715
0.1U_0402_25V6K~D
1
2
C655
0.1U_0402_25V6K~D
C655
0.1U_0402_25V6K~D
1
2
R1626 0_0402_5%~DR1626 0_0402_5%~D
1 2
C410 0.01U_0402_16V7K~DC410 0.01U_0402_16V7K~D
12
R739 0_0402_5%~D@R739 0_0402_5%~D@1 2
D72
PESD5V0U2BT_SOT23-3~D
D72
PESD5V0U2BT_SOT23-3~D
2
3
1
C411 0.01U_0402_16V7K~DC411 0.01U_0402_16V7K~D
12
R816
100K_0402_5%~D
R816
100K_0402_5%~D
1 2
L98
DLW21SN900HQ2L_0805_4P~D
L98
DLW21SN900HQ2L_0805_4P~D
1
122
33
4
4
R1607 0_0402_5%~D@R1607 0_0402_5%~D@1 2
G
D
S
Q48
SSM3K7002FU_SC70-3~D
G
D
S
Q48
SSM3K7002FU_SC70-3~D
2
13
U2
SLG55584AVTR_TDFN8_2X2
U2
SLG55584AVTR_TDFN8_2X2
CEN 1
DP 3
SELCDP 4
DM 2
VDD
5TDP
6
CB
8
TDM
7
Thermal Pad 9
D73
PESD5V0U2BT_SOT23-3~D
D73
PESD5V0U2BT_SOT23-3~D
2
3
1
JUSB1
SANTA_370300-1
JUSB1
SANTA_370300-1
SSTX-
8
SSTX+
9
GND 10
GND 11
GND 12
GND 13
VBUS
1
D-
2
D+
3
GND
4
SSRX-
5
SSRX+
6
GND
7
R736 0_0402_5%~D@R736 0_0402_5%~D@1 2
R1613
10K_0402_5%~D
@R1613
10K_0402_5%~D
@
1 2
JUSB2
SANTA_370300-1
JUSB2
SANTA_370300-1
SSTX-
8
SSTX+
9
GND 10
GND 11
GND 12
GND 13
VBUS
1
D-
2
D+
3
GND
4
SSRX-
5
SSRX+
6
GND
7
C654
0.1U_0402_25V6K~D
C654
0.1U_0402_25V6K~D
1
2
U48
TPS2560DRCR-PG1.1_SON10_3X3~D
U48
TPS2560DRCR-PG1.1_SON10_3X3~D
GND
1
IN
2
ILIM 7
OUT2 8
FAULT1# 10
IN
3
EN1#
4
OUT1 9
T-PAD 11
EN2#
5FAULT#2 6
R784 0_0402_5%~DR784 0_0402_5%~D
1 2
R1604 0_0402_5%~D@R1604 0_0402_5%~D@1 2
R1608 0_0402_5%~D@R1608 0_0402_5%~D@1 2
10U_0805_10V6K~D
C676
10U_0805_10V6K~D
C676
1
2
R748
24.9K_0402_1%~D
R748
24.9K_0402_1%~D
12
R1612 0_0402_5%~D@R1612 0_0402_5%~D@1 2
8
D78
IP4292CZ10-TB_XSON10U10~D
8
D78
IP4292CZ10-TB_XSON10U10~D
4
5
1
6
2
7
3
10
9
L96
DLW21SN900HQ2L_0805_4P~D
L96
DLW21SN900HQ2L_0805_4P~D
1
122
33
4
4
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USBP2_D+
USBP2_D-
ESATA_PRX_DTX_N4_RP
ESATA_PRX_DTX_P4_RP SATA_PRX_DTX_P4
SATA_PRX_DTX_N4
SATA_PTX_DRX_P4
SATA_PTX_DRX_N4
ESATA_PTX_DRX_P4_RP
ESATA_PTX_DRX_N4_RP
ESATA_PRX_DTX_N4_C
ESATA_PRX_DTX_P4_C ESATA_PRX_DTX_P4
ESATA_PTX_DRX_P4
ESATA_PTX_DRX_N4
ESATA_PRX_DTX_N4
USBP2_D+
USBP2_D-
ESATA_PTX_DRX_P4_C
ESATA_PTX_DRX_N4_C
REXT
ESATA_PE1
ESATA_PTX_DRX_P4_RP
ESATA_PRX_DTX_N4_RP
ESATA_PRX_DTX_P4_RP
ESATA_PE2
ESATA_PTX_DRX_N4_RP
+SATA_SIDE_PWR
+3.3V_RUN +3.3V_RUN_U44
+3.3V_RUN_U44
USBP2-<17>
USBP2+<17>
ESATA_PRX_DTX_P4_C<14>
ESATA_PRX_DTX_N4_C<14>
ESATA_PTX_DRX_P4_C<14>
ESATA_PTX_DRX_N4_C<14>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
USB/ESATA/IO/MDC
38 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
USB/ESATA/IO/MDC
38 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
USB/ESATA/IO/MDC
38 66Friday, June 10, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
ESATA Repeater
Place D74 close to JESATA1
USB
ESATA
JESA1
TYCO_2129156-3
CONN@
USB
ESATA
JESA1
TYCO_2129156-3
CONN@
VBUS
1
D-
2
D+
3
GND
4
GND
5
A+
6
A-
7
GND
8
B-
9
B+
10
GND
11
GND
12
GND
13
GND
14
GND
15
C664 0.01U_0402_16V7K~DC664 0.01U_0402_16V7K~D
12
C668
0.1U_0402_25V6K~D
C668
0.1U_0402_25V6K~D
1
2
R741 0_0402_5%~DR741 0_0402_5%~D
1 2
R1594
0_0402_5%~D
R1594
0_0402_5%~D
12
U44
PS8513BTQFN20GTR-A0_TQFN20_4X4
U44
PS8513BTQFN20GTR-A0_TQFN20_4X4
A_INp
1
A_INn
2
PREXT/NC/VDD 20
NC_GND_VDD
19
B_OUTp
5
VCC 6
EN
7
B_PRE 8
A_PRE 9
NC/GND/VDD 10
NC_GND_VDD
18
GND
13 B_INp 11
B_INn 12
NC_GND_VDD
17
A_OUTn 14
A_OUTp 15
VCC 16
GND
3
B_OUTn
4
GND
21
C671 0.01U_0402_16V7K~DC671 0.01U_0402_16V7K~D
1 2
C674 0.01U_0402_16V7K~DC674 0.01U_0402_16V7K~D
1 2
C662
0.1U_0402_25V6K~D
C662
0.1U_0402_25V6K~D
1
2
C661
0.01U_0402_16V7K~D
C661
0.01U_0402_16V7K~D
1
2
C672 0.01U_0402_16V7K~DC672 0.01U_0402_16V7K~D
1 2
L90
DLW21SN900SQ2L_0805_4P~D
L90
DLW21SN900SQ2L_0805_4P~D
1
122
33
4
4C673 0.01U_0402_16V7K~DC673 0.01U_0402_16V7K~D
1 2
R1595
0_0402_5%~D
R1595
0_0402_5%~D
12
R742
0_0402_5%~D
@R742
0_0402_5%~D
@
12
PJP9
PAD-OPEN1x1m
PJP9
PAD-OPEN1x1m
1 2
R1150 0_0402_5%~D@R1150 0_0402_5%~D@1 2
R743
0_0402_5%~D
R743
0_0402_5%~D
12
+
C667
150U_B2_6.3V-M~D
+
C667
150U_B2_6.3V-M~D
1
2
D74
PESD5V0U2BT_SOT23-3~D
D74
PESD5V0U2BT_SOT23-3~D
2
3
1
C666 0.01U_0402_16V7K~DC666 0.01U_0402_16V7K~D
12
R1151 0_0402_5%~D@R1151 0_0402_5%~D@1 2
C665 0.01U_0402_16V7K~DC665 0.01U_0402_16V7K~D
12
C663 0.01U_0402_16V7K~DC663 0.01U_0402_16V7K~D
12
2
2
1
1
B B
A A
DOCK_AC_OFF
RED_DOCK
GREEN_DOCK
BLUE_DOCK
SATA_PRX_DKTX_P5
SATA_PRX_DKTX_N5
CLK_PCI_DOCK
SLICE_BAT_PRES#
DOCK_DET#
DOCK_DET_R#
SATA_PTX_DKRX_P5
SATA_PTX_DKRX_N5
DPC_CA_DET
DPC_DOCK_AUX
DPC_DOCK_AUX#
DPD_CA_DET
DPD_DOCK_AUX
DPD_DOCK_AUX#
DPC_GPU_HPDDPD_GPU_HPD
DPD_DOCK_LANE_P3
DPD_DOCK_LANE_N3
DPD_DOCK_LANE_P2
DPD_DOCK_LANE_N2
DPD_DOCK_LANE_P1
DPD_DOCK_LANE_N1
DPD_DOCK_LANE_N0
DPD_DOCK_LANE_P0
DPC_DOCK_LANE_P3
DPC_DOCK_LANE_N3
DPC_DOCK_LANE_P2
DPC_DOCK_LANE_N2
DPC_DOCK_LANE_P1
DPC_DOCK_LANE_N1
DPC_DOCK_LANE_N0
DPC_DOCK_LANE_P0
DPD_GPU_HPD DPC_GPU_HPD
DAI_BCLK#DAI_12MHZ#
+DOCK_PWR_BAR +DOCK_PWR_BAR
+LOM_VCT
+NBDOCK_DC_IN_SS
+3.3V_ALW
+LOM_VCT
DOCK_AC_OFF <40,63>
RED_DOCK<25>
BLUE_DOCK<25>
GREEN_DOCK<25>
VSYNC_DOCK<25>
DAT_MSE<41> CLK_MSE<41>
DAI_BCLK#<30> DAI_LRCK#<30>
DAI_DI<30> DAI_DO#<30>
DAI_12MHZ#<30>
D_LAD1<40> D_LAD0<40>
D_LAD2<40> D_LAD3<40>
D_LFRAME#<40> D_CLKRUN#<40>
D_SERIRQ<40>D_DLDRQ1#<40>
CLK_PCI_DOCK<17>
DOCK_SMB_CLK<41>
DOCK_SMB_DAT<41>
DOCK_SMB_ALERT#<40,63> DOCK_PSID<53>
DOCK_PWR_BTN#<41>
DOCK_LOM_SPD10LED_GRN#<32>
HSYNC_DOCK<25>
DOCK_LOM_SPD100LED_ORG# <32>
DAT_KBD <41>
CLK_KBD <41>
DOCK_LOM_TRD0+ <32>
DOCK_LOM_TRD0- <32>
DOCK_LOM_TRD2- <32>
DOCK_LOM_TRD2+ <32>
ACAV_DOCK_SRC# <63>
CLK_DDC2_DOCK <25>
DAT_DDC2_DOCK <25>
SATA_PTX_DKRX_P5_C <14>
SATA_PTX_DKRX_N5_C <14>
SATA_PRX_DKTX_P5_C <14>
BREATH_LED# <40,44>
DOCK_LOM_ACTLED_YEL# <32>
DOCK_LOM_TRD1- <32>
DOCK_LOM_TRD1+ <32>
DOCK_LOM_TRD3- <32>
DOCK_LOM_TRD3+ <32>
DOCK_DCIN_IS+ <62>
DOCK_DCIN_IS- <62>
DOCK_POR_RST# <41>
SATA_PRX_DKTX_N5_C <14>
USBP8- <17>
USBP8+ <17>
SLICE_BAT_PRES#<40,63> DOCK_DET# <40>
DPC_DOCK_AUX <27>
DPC_DOCK_AUX# <27>
DPC_CA_DET <27>DPD_CA_DET<27>
DPD_DOCK_AUX#<27> DPD_DOCK_AUX<27>
USB3RN4 <17>
USB3RP4 <17>
USB3TN4 <17>
USB3TP4 <17>
DPD_GPU_LANE_P0<46> DPD_GPU_LANE_N0<46>
DPD_GPU_LANE_P1<46> DPD_GPU_LANE_N1<46>
DPD_GPU_LANE_P2<46> DPD_GPU_LANE_N2<46>
DPD_GPU_LANE_P3<46> DPD_GPU_LANE_N3<46>
DPC_GPU_LANE_P2 <46>
DPC_GPU_LANE_N2 <46>
DPC_GPU_LANE_P0 <46>
DPC_GPU_LANE_N0 <46>
DPC_GPU_LANE_P3 <46>
DPC_GPU_LANE_N3 <46>
DPC_GPU_LANE_P1 <46>
DPC_GPU_LANE_N1 <46>
DPD_GPU_HPD<45> DPC_GPU_HPD <45>
USBP3+ <17>
USBP3- <17>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
DOCKING CONN
39 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
DOCKING CONN
39 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
DOCKING CONN
39 66Friday, June 10, 2011
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DOCK_DET_1
DELL CONFIDENTIAL/PROPRIETARY
Close to DOCK
Its for Enhance ESD on dock issue.
Close to DOCK
Its for Enhance ESD on dock issue.
C698 0.01U_0402_16V7K~DC698 0.01U_0402_16V7K~D
12
CE9
4.7P_0402_50V8C~D
@CE9
4.7P_0402_50V8C~D
@
1
2
R755 100K_0402_5%~DR755 100K_0402_5%~D
1 2
C697 0.01U_0402_16V7K~DC697 0.01U_0402_16V7K~D
12
C703
0.1U_0603_50V7K~D
C703
0.1U_0603_50V7K~D
1
2
C680 0.1U_0402_10V7K~DC680 0.1U_0402_10V7K~D
12
C699 0.01U_0402_16V7K~DC699 0.01U_0402_16V7K~D
1 2
RE11
10_0402_1%~D
@RE11
10_0402_1%~D
@
12
C688 0.1U_0402_10V7K~DC688 0.1U_0402_10V7K~D
12
CE6
4.7U_0805_25V6K~D
@
CE6
4.7U_0805_25V6K~D
@
1
2
C700 0.01U_0402_16V7K~DC700 0.01U_0402_16V7K~D
1 2
C679 0.1U_0402_10V7K~DC679 0.1U_0402_10V7K~D
12
C682 0.1U_0402_10V7K~DC682 0.1U_0402_10V7K~D
12
R757
100K_0402_5%~D
R757
100K_0402_5%~D
12
D32
RB751S40T1_SOD523-2~D
D32
RB751S40T1_SOD523-2~D
21
C704
12P_0402_50V8J~D
C704
12P_0402_50V8J~D
1
2
C691 0.1U_0402_10V7K~DC691 0.1U_0402_10V7K~D
12
D33
PESD24VS2UT_SOT23-3~D
@
D33
PESD24VS2UT_SOT23-3~D
@
2
3
1
C683 0.1U_0402_10V7K~DC683 0.1U_0402_10V7K~D
12
RE12
10_0402_1%~D
@RE12
10_0402_1%~D
@
12
C689 0.1U_0402_10V7K~DC689 0.1U_0402_10V7K~D
12
R758
100K_0402_5%~D
R758
100K_0402_5%~D
12
C694 0.1U_0402_10V7K~DC694 0.1U_0402_10V7K~D
12
JDOCK1
JAE_WD2F144WB1
CONN@
JDOCK1
JAE_WD2F144WB1
CONN@
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
53
53
55
55
57
57
59
59
61
61
63
63
65
65
67
67
69
69
71
71
73
73
75
75
77
77
79
79
81
81
83
83
85
85
87
87
89
89
91
91
93
93
95
95
97
97
99
99
101
101
103
103
105
105
107
107
109
109
111
111
113
113
115
115
117
117
119
119
121
121
123
123
125
125
127
127
129
129
131
131
133
133
135
135
137
137
22
44
66
88
10 10
12 12
14 14
16 16
18 18
20 20
22 22
24 24
26 26
28 28
30 30
32 32
34 34
36 36
38 38
40 40
42 42
44 44
46 46
48 48
50 50
52 52
54 54
56 56
58 58
60 60
62 62
64 64
66 66
68 68
70 70
72 72
74 74
76 76
78 78
80 80
82 82
84 84
86 86
88 88
90 90
92 92
94 94
96 96
98 98
100 100
102 102
104 104
106 106
108 108
110 110
112 112
114 114
116 116
118 118
120 120
122 122
124 124
126 126
128 128
130 130
132 132
134 134
136 136
138 138
GND1
145
PWR1
146 PWR2 149
GND2 152
Shield_G
153
Shield_G
154
Shield_G
155
Shield_G
156
Shield_G
157
Shield_G
158
139
139 140 140
141
141 142 142
143
143 144 144
PWR1
147
PWR1
148
PWR2 150
PWR2 151
Shield_G 159
Shield_G 160
Shield_G 161
Shield_G 162
Shield_G 163
Shield_G 164
C701
1U_0402_6.3V6K~D
@
C701
1U_0402_6.3V6K~D
@
1
2
CE8
4.7P_0402_50V8C~D
@CE8
4.7P_0402_50V8C~D
@
1
2
C695
0.033U_0402_16V7K~D
C695
0.033U_0402_16V7K~D
1
2
C692 0.1U_0402_10V7K~DC692 0.1U_0402_10V7K~D
12 C686 0.1U_0402_10V7K~DC686 0.1U_0402_10V7K~D
12
C696
0.033U_0402_16V7K~D
C696
0.033U_0402_16V7K~D
1
2
C687 0.1U_0402_10V7K~DC687 0.1U_0402_10V7K~D
12
C684 0.1U_0402_10V7K~DC684 0.1U_0402_10V7K~D
12
C690 0.1U_0402_10V7K~DC690 0.1U_0402_10V7K~D
12
C681 0.1U_0402_10V7K~DC681 0.1U_0402_10V7K~D
12
C702
0.1U_0603_50V7K~D
C702
0.1U_0603_50V7K~D
1
2
C693 0.1U_0402_10V7K~DC693 0.1U_0402_10V7K~D
12
C685 0.1U_0402_10V7K~DC685 0.1U_0402_10V7K~D
12
R756
33_0402_5%~D
R756
33_0402_5%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_PCI_5048CLK_SIO_14M
RUN_ON
D_CLKRUN#
D_SERIRQ
D_DLDRQ1#
0.75V_DDR_VTT_ON
CPU_VTT_ON
LCD_TST
WIRELESS_ON#/OFF
SP_TPM_LPC_EN
SYS_LED_MASK#
SYS_LED_MASK#
LPC_LAD3
IRQ_SERIRQ
PCH_PLTRST#_EC
LPC_LDRQ1#
CLKRUN#
LPC_LAD1
LPC_LAD2
D_LAD3
D_LAD1
D_DLDRQ1#
CLK_PCI_5048
LPC_LFRAME#
LAN_DISABLE#_R
D_CLKRUN#
D_LFRAME#
LID_CL_SIO#
ME_FWP
WLAN_RADIO_DIS#
D_LAD0
D_LAD2
LPC_LAD0
D_SERIRQ
0.75V_DDR_VTT_ON
CLK_SIO_14M
WWAN_RADIO_DIS#
LPC_LDRQ0#
ESATA_USB_PWR_EN#
SIO_SLP_A#
VGA_ID
VGA_ID WIRELESS_ON#/OFF
BT_RADIO_DIS#
BC_INT#_ECE5048
BC_DAT_ECE5048
BC_CLK_ECE5048
BCM5882_ALERT#
EN_DOCK_PWR_BAR
PSID_DISABLE#
ENVDD_PCH
PANEL_BKEN_EC
USH_PWR_STATE#
EN_I2S_NB_CODEC#
LCD_TST
AUD_NB_MUTE#
DOCK_DET#
LCD_VCC_TEST_EN
CCD_OFF
DOCKED
MCARD_WWAN_PWREN
AUD_HP_NB_SENSE
ESATA_USB_PWR_EN#
DOCK_AC_OFF_EC
SIO_SLP_LAN#
DOCK_HP_DET
DOCK_MIC_DET
+CAP_LDO
SP_TPM_LPC_EN
ME_FWP
RUN_ON
MODULE_BATT_PRES#
CPU_DETECT#
MOD_SATA_PCIE#_DET
PBAT_PRES#
SLICE_BAT_PRES#
ZODD_WAKE#
MDC_RST_DIS#
MCARD_MISC_PWREN
LID_CL_SIO#
MODULE_ON
CHARGE_MODULE_BATT
CHARGE_PBATT
DEFAULT_OVRDE
CPU_DETECT#
SLP_ME_CSW_DEV#
SYS_PWROK
CPU_VTT_ON
SIO_SLP_SUS#
VGA_ID
SLICE_BAT_ON
CHARGE_EN
SLICE_BAT_ON
WIRELESS_LED#
MASK_SATA_LED#
LED_SATA_DIAG_OUT#
MODC_EN
RUNPWROK
CRT_SWITCH
DYN_TURB_PWR_ALRT#
SLICE_BAT_PRES#
DYN_TURB_PWR_ALRT#
TEMP_ALERT#_R TEMP_ALERT#
SUS_ON
SUS_ON
GFX_MEM_VTT_ON GFX_MEM_VTT_ON
DGPU_PWR_EN
DGPU_PWR_EN
3.3V_RUN_GFX_ON
DGPU_PWROK
EDID_SELECT#
DGPU_SELECT#
DP_HDMI_HPD
HW_GPS_DISABLE2#
HW_GPS_DISABLE2#
USH_PWR_ON
BREATH_LED#
BAT1_LED#
BAT2_LED#
USB_PWR_SHR_EN#
USB_PWR_SHR_EN#
WWAN_RADIO_DIS#
PROCHOT_GATE
PROCHOT_GATE
USB_SIDE_EN#
USB_SIDE_EN#
USB_PWR_SHR_VBUS_EN
USB_PWR_SHR_VBUS_EN
DP_HDMI_HPD
MCARD_PCIE_SATA#
MCARD_PCIE_SATA#
CHARGE_EN
DOCK_SMB_ALERT#
DOCK_SMB_ALERT#
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_RUN
+3.3V_RUN
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW_U46
LPC_LFRAME# <14,33,35,41>
SYS_LED_MASK#<44>
WLAN_RADIO_DIS#<35>
WWAN_RADIO_DIS#<35>
LID_CL# <31,44>
0.75V_DDR_VTT_ON <55>
IMVP_VR_ON <60>
SIO_EXT_WAKE#<18>
LPC_LDRQ0# <14>
D_SERIRQ <39>
D_DLDRQ1# <39>
CLK_PCI_5048 <17>
D_LAD3 <39>
D_CLKRUN# <39>
D_LAD1 <39>
LPC_LDRQ1# <14>
PCH_PLTRST#_EC <17,33,35,36,41>
D_LAD2 <39>
D_LFRAME# <39>
IRQ_SERIRQ <14,33,41>
CLK_SIO_14M <15>
D_LAD0 <39>
CLKRUN# <16,33,41>
SIO_SLP_A# <16,43,57>
AUX_EN_WOWL <36>
SIO_SLP_S4# <16>
SIO_SLP_S3# <11,16,28,36,43,56>
WIRELESS_ON#/OFF<31> BT_RADIO_DIS#<42> BC_CLK_ECE5048 <41>
BC_INT#_ECE5048 <41>
BC_DAT_ECE5048 <41>
BCM5882_ALERT#<33>
EN_DOCK_PWR_BAR<63>
PSID_DISABLE#<53> LCD_TST<24>
EN_I2S_NB_CODEC#<30>
ENVDD_PCH<16,24>
USH_PWR_STATE#<33>
PANEL_BKEN_EC<24>
DOCKED<32> DOCK_DET#<39>
AUD_NB_MUTE#<30>
LCD_VCC_TEST_EN<24>
AUD_HP_NB_SENSE<30,31>
ESATA_USB_PWR_EN#<37>
MCARD_WWAN_PWREN<36>
ACAV_IN_NB <41,62,63>
DOCK_AC_OFF <39,63>
DOCK_AC_OFF_EC <63>
WLAN_LAN_DISB# <32>
SIO_SLP_LAN# <16,32>
GPIO_PSID_SELECT <53>
DOCK_HP_DET <30>
DOCK_MIC_DET <30>
SP_TPM_LPC_EN <33>
ME_FWP <14>
RUN_ON <28,36,43,56,64>
1.8V_RUN_PWRGD <56>
SPI_WP#_SEL <14>
IMVP_PWRGD <60>
EC_32KHZ_ECE5048 <41>
MODULE_BATT_PRES#<53,63>
PCH_DPWROK<16>
PBAT_PRES#<53,63>
SLICE_BAT_PRES#<39,63>
ZODD_WAKE#<29>
MDC_RST_DIS#<31>
MCARD_MISC_PWREN<36>
MODULE_ON<63>
CHARGE_MODULE_BATT<63> CHARGE_PBATT<63> DEFAULT_OVRDE<63>
CPU_DETECT#<7>
MOD_SATA_PCIE#_DET<29>
SLP_ME_CSW_DEV#<14,18>
SYS_PWROK<7,16>
CPU_VTT_ON<58>
SIO_SLP_SUS# <16>
SLICE_BAT_ON<63>
WIRELESS_LED#<35,44>
MASK_SATA_LED# <44>
LED_SATA_DIAG_OUT# <44>
MODC_EN <29>
RUNPWROK <7,41>
CRT_SWITCH<25>
SUSACK#<16>
TEMP_ALERT# <14,18>
LAN_DISABLE#_R<32>
TOUCH_SCREEN_PD#<24>
SUS_ON <43>
HW_GPS_DISABLE2# <35>
BREATH_LED# <39,44>
BAT1_LED# <44>
BAT2_LED# <44>
USB_PWR_SHR_EN#<37>
DGPU_SELECT#<23,24,25>
DGPU_PWR_EN<45,64>
EDID_SELECT#<25> DGPU_PWROK<18,64>
DP_HDMI_HPD<45>
GFX_MEM_VTT_ON<49>
3.3V_RUN_GFX_ON<15,49>
LPC_LAD0 <14,33,35,41>
LPC_LAD1 <14,33,35,41>
LPC_LAD2 <14,33,35,41>
LPC_LAD3 <14,33,35,41>
PROCHOT_GATE<62>
USB_PWR_SHR_VBUS_EN<37>
USB_SIDE_EN#<31>
CCD_OFF<24>
DOCK_SMB_ALERT#<39,63>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
ECE5048
40 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
ECE5048
40 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
ECE5048
40 66Friday, June 10, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+CAP_LDO trace width 20 mils
ME_FWP PCH has internal 20K PD.
(suspend power rail)
VGA_ID0
Discrete
UMA 1
0
trace width 20 mils
trace width 20 mils
R1582 100K_0402_5%~DR1582 100K_0402_5%~D
1 2
R780 100K_0402_5%~DR780 100K_0402_5%~D
12
R766 100K_0402_5%~DR766 100K_0402_5%~D
1 2
C713
4.7P_0402_50V8C~D
@C713
4.7P_0402_50V8C~D
@
1
2
R793
1K_0402_1%~D
@R793
1K_0402_1%~D
@
12
R3 100K_0402_5%~DR3 100K_0402_5%~D
1 2
R777 100K_0402_5%~DR777 100K_0402_5%~D
12
R767 100K_0402_5%~DR767 100K_0402_5%~D
1 2
R761 100K_0402_5%~DR761 100K_0402_5%~D
1 2
C714
4.7U_0603_6.3V6K~D
C714
4.7U_0603_6.3V6K~D
1
2
R774 100K_0402_5%~DR774 100K_0402_5%~D
1 2
R790 100K_0402_5%~DR790 100K_0402_5%~D
12
R791 100K_0402_5%~DR791 100K_0402_5%~D
12
R760 100K_0402_5%~DR760 100K_0402_5%~D
1 2
R770
33K_0402_5%~D
@R770
33K_0402_5%~D
@
12
T117PAD~D @T117PAD~D @
R800 100K_0402_5%~D@R800 100K_0402_5%~D@1 2
R768 10K_0402_5%~DR768 10K_0402_5%~D
1 2
R738 0_0402_5%~DR738 0_0402_5%~D
1 2
R769 100K_0402_5%~DR769 100K_0402_5%~D
1 2
D34
RB751S40T1_SOD523-2~D
@D34
RB751S40T1_SOD523-2~D
@
2 1
PJP7
PAD-OPEN1x1m
PJP7
PAD-OPEN1x1m
12
R804 1K_0402_1%~DR804 1K_0402_1%~D
1 2
R763 100K_0402_5%~DR763 100K_0402_5%~D
1 2
R797 0_0402_5%~DR797 0_0402_5%~D
1 2
R457 100K_0402_5%~DR457 100K_0402_5%~D
1 2
C707
0.1U_0402_25V6K~D
C707
0.1U_0402_25V6K~D
1
2
U47
TC7SH08FU_SSOP5~D
@U47
TC7SH08FU_SSOP5~D
@
B
1
A
2
G
3
O4
P5
C708
0.1U_0402_10V7K~D
C708
0.1U_0402_10V7K~D
1
2
R789 100K_0402_5%~DR789 100K_0402_5%~D
12
R1154 100K_0402_5%~DR1154 100K_0402_5%~D
1 2
C716
0.047U_0402_16V4Z~D
C716
0.047U_0402_16V4Z~D
1
2
R786 100K_0402_5%~DR786 100K_0402_5%~D
12
R765 0_0402_5%~DR765 0_0402_5%~D
1 2
R782 100K_0402_5%~DR782 100K_0402_5%~D
12
R805
100K_0402_5%~D
R805
100K_0402_5%~D
12
R802 0_0402_5%~D@R802 0_0402_5%~D@1 2
R772 10K_0402_5%~D@R772 10K_0402_5%~D@1 2
R776 100K_0402_5%~DR776 100K_0402_5%~D
1 2
U46
ECE5048-LZY_DQFN132_11X11~D
DB Version 0.4
U46
ECE5048-LZY_DQFN132_11X11~D
DB Version 0.4
GPIOA0
B52
GPIOA1
A49
GPIOA2
B53
GPIOA3
A50
GPIOA4
B54
GPIOA5
A51
GPIOA6
B55
GPIOA7
A52
GPIOD1
B32
GPIOD2
A31
GPIOD3
B33
GPIOD4
B15
GPIOD5
A15
GPIOD6
B16
GPIOD7
A16
GPIOF7
B58 GPIOF6
A55 GPIOF5
B59 GPIOF4/TACH7
A56
GPIOL0/PWM7 B60
GPIOL1/PWM8 A57
GPIOF3/TACH8
B61 GPIOF2
A58 GPIOF1
B62 GPIOF0
A59
VCC1 B5
CAP_LDO B46
TEST_PIN B19
LAD0 A27
LAD1 A26
LAD2 B26
LAD3 B25
LFRAME# A21
LRESET# B22
PCICLK A28
CLKRUN# B20
LDRQ0# A23
LDRQ1# A22
SER_IRQ B21
14.318MHZ/GPIOM0 A32
GPIOM4/PWM6 B51
DLAD0 B29
DLAD1 B28
DLAD2 A25
DLAD3 A24
DLFRAME# B23
DCLKRUN# A19
DLDRQ1# B24
DSER_IRQ A20
PWRGD A4
OUT65 B56
VSS B27
GPIOM3/PWM4 B39
GPIOL2/PWM0 B64
VCC1 A17
VCC1 B30
VCC1 A43
VCC1 A54
BC_INT# A29
BC_DAT B31
BC_CLK A30
GPIOB0
A33
GPIOB1
B36
GPOC2
A34
GPOC3
B37
GPOC4
A35
GPOC5
B38
GPOC6/TACH4
A36
GPIOC7
A37
GPIOD0
B40
GPIOC1
A38
GPIOC0
B41
GPIOB7
A39
GPIOB6
B42
GPIOB5
A40
GPIOB4
B43
GPIOB3
A41
GPIOB2
B44
GPIOH0
B13
GPIOH1
A13
SYSOPT1/GPIOH2
A53
SYSOPT0/GPIOH3
B57
GPIOH4
B14
GPIOH5
A14
GPIOH6
B17
GPIOH7
B18
GPIOE0/RXD
A1
GPIOE1/TXD
B2
GPIOE2/RTS#
A2
GPIOE3/DSR#
B3
GPIOE4/CTS#
A3
GPIOE5/DTR#
B45
GPIOE6/RI#
A42
GPIOE7/DCD#
B4
GPIOG0/TACH5
B47
GPIOG1
A45
GPIOG2
B48
GPIOG3
A46
GPIOG4
B49
GPIOG5
A47
GPIOG6
B50
GPIOG7/TACH6
A48
GPIOK0 A8
GPIOK1/TACH3 B9
GPIOK2 B10
GPIOK3 A10
GPIOK4 B11
GPIOK5 A11
GPIOK6 B12
GPIOK7 A12
GPIOI1 B63
GPIOI2/TACH0 A60
GPIOI3 A61
GPIOI4 B65
GPIOI5 A62
GPIOI6 B66
GPIOI7 A63
GPIOJ0 B67
GPIOJ1/TACH1 A64
GPIOJ2/TACH2 A5
GPIOJ3 B6
GPIOJ4 A6
GPIOJ5 B7
GPIOJ6 A7
GPIOJ7 B8
GPIOM1 B34
CLK32/GPIOM2 B35
EP C1
GPIOL3/PWM1 B68
GPIOL4/PWM3 A9
GPIOL5/PWM2 B1
GPIOL6 A18
GPIOL7/PWM5 A44
C706
0.1U_0402_25V6K~D
C706
0.1U_0402_25V6K~D
1
2
R794
10_0402_1%~D
@R794
10_0402_1%~D
@
12
R878 100K_0402_5%~DR878 100K_0402_5%~D
12
R798 100K_0402_5%~DR798 100K_0402_5%~D
1 2
R1583 100K_0402_5%~DR1583 100K_0402_5%~D
1 2
C705
10U_0603_6.3V6M~D
C705
10U_0603_6.3V6M~D
1
2
R762 10K_0402_5%~DR762 10K_0402_5%~D
1 2
C711 0.1U_0402_25V6K~D@C711 0.1U_0402_25V6K~D@
1 2
R775 10K_0402_5%~DR775 10K_0402_5%~D
1 2
R796 10K_0402_5%~DR796 10K_0402_5%~D
1 2
R795
10_0402_1%~D
@R795
10_0402_1%~D
@
12
C710
0.1U_0402_25V6K~D
C710
0.1U_0402_25V6K~D
1
2
R807 10_0402_1%~DR807 10_0402_1%~D
12
R803 100K_0402_5%~DR803 100K_0402_5%~D
1 2
C709
0.1U_0402_25V6K~D
C709
0.1U_0402_25V6K~D
1
2
R778 100K_0402_5%~DR778 100K_0402_5%~D
1 2
C712
4.7P_0402_50V8C~D
@C712
4.7P_0402_50V8C~D
@
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BC_DAT_ECE5048
JTAG_TDI
BC_DAT_ECE1117
PBAT_SMBDAT
PBAT_SMBCLK
CLK_KBD
DAT_KBD
CLK_MSE
DAT_MSE
CHARGER_SMBDAT
CHARGER_SMBCLK
SYSTEM_ID
CLK_PCI_MEC
JTAG_TDO
JTAG_CLK
FWP#
JTAG_TMS
DOCK_SMB_CLK
DOCK_SMB_DAT
AC_PRESENT
BOARD_ID
1.05V_0.8V_PWROK
1.05V_VTTPWRGD
VCCSAPW ROK
JTAG_RST#
LCD_SMBCLK
LCD_SMBDAT
RUNPWROK
MSDATA
DOCK_POR_RST#
DDR_ON
1.05V_0.8V_PWROK
EN_INVPWR
VCI_IN1#
RESET_OUT#
CPU1.5V_S3_GATE
BAY_SMBDAT
BAY_SMBCLK
DYN_TUR_CURRNT_SET#
PCIE_WAKE#
LAT_ON_SW#
PROCHOT#_EC
VOL_UP
VOL_DOWN
VOL_MUTE
HOST_DEBUG_RX
HOST_DEBUG_TXHOST_DEB_TX
MSCLK
MSDATA
HOST_DEB_RX PCH_ALW_ON
GPU_SMBDAT
GPU_SMBCLK
MEC_XTAL2
MEC_XTAL1
DEVICE_DET#
RESET_OUT#
POWER_SW_IN#
DOCK_PWR_SW#
BC_DAT_ECE5048
BC_INT#_ECE5048
BC_CLK_ECE5048
CPU1.5V_S3_GATE
DYN_TUR_CURRNT_SET#
MSDATA
MSCLK
SIO_A20GATE
IRQ_SERIRQ
CLK_PCI_MEC
PCH_PLTRST#_EC
SIO_PWRBTN#
AC_PRESENT
PCH_RSMRST#
+RTC_CELL_VBAT
ME_SUS_PW R_ACK
ALWON
LAT_ON_SW#
PS_ID
PROCHOT#_EC
SML1_SMBCLK
SML1_SMBDATA
CLK_KBD
DAT_TP_SIO
CLK_MSE
DAT_KBD
DAT_MSE
CLK_TP_SIO
PBAT_SMBCLK
PBAT_SMBDAT
HOST_DEBUG_TX
HOST_DEBUG_RX
FWP#
BC_DAT_ECE1117
BC_CLK_ECE1117
BC_INT#_ECE1117
+VR_CAP
LPC_LAD0
LPC_LAD1
LPC_LAD2
SIO_EXT_SCI#
LPC_LAD3
RESET_OUT#
CLKRUN#
LPC_LFRAME#
SYSTEM_ID
BOARD_ID
VOL_MUTE
POWER_SW_IN#
+PECI_VREF
BIA_PWM_EC
JTAG_RST#
JTAG_TDI
JTAG_TDO
JTAG_CLK
JTAG_TMS
PCH_ALW_ON
DDR_HVREF_RST_GATE
RUNPWROK
DOCK_SMB_CLK
DOCK_SMB_DAT
BAY_SMBCLK
BAY_SMBDAT
LCD_SMBDAT
CARD_SMBDAT
CARD_SMBCLK
USH_SMBCLK
USH_SMBDAT
CHARGER_SMBCLK
CHARGER_SMBDAT
LCD_SMBCLK
GPU_SMBDAT
GPU_SMBCLK
SIO_EXT_SMI#
SIO_RCIN#
1.5V_SUS_PWRGD
PM_APW ROK
MEC_XTAL2 MEC_XTAL2_R
MEC_XTAL1
ACAV_IN
PECI_EC_R
DDR_ON
ALW_PW RGD_3V_5V
1.05V_A_PW RGD
PCH_RSMRST#
BC_CLK_EMC4022
BC_INT#_EMC4022
BC_DAT_EMC4022
LPC_LDRQ#_MEC
LPC_LDRQ#_MEC
BEEP
PCIE_WAKE#
ACAV_IN_NB
DEVICE_DET#
PCH_PCIE_WAKE#
EN_INVPWR
VCI_IN1#
DOCK_PWR_SW#
SIO_SLP_S5#
VOL_DOWN
DOCK_POR_RST#
VOL_UP
BC_DAT_EMC4022
+3.3V_ALW
+3.3V_ALW
+5V_RUN
+RTC_CELL
+3.3V_ALW
+RTC_CELL
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW _PCH
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_RUN
+RTC_CELL
+RTC_CELL
+1.05V_RUN_VTT
+3.3V_RUN
+3.3V_ALW
+3.3V_M
+1.05V_RUN_VTT
+3.3V_ALW
+RTC_CELL +3.3V_ALW _U51
POWER_SW#_MB <31,42>
DOCK_PWR_BTN# <39>
1.05V_VTTPWRGD<58,59>
VCCSAPW ROK<59> 1.05V_0.8V_PWROK <14,60>
RUN_ON_ENABLE#<43>
H_PROCHOT# <7,60,62>
PCH_PWRGD# <22>
POWER_SW_IN#<22>
DOCK_PWR_SW#<22>
BC_INT#_ECE5048<40> BC_DAT_ECE5048<40> BC_CLK_ECE5048<40>
MSCLK <35>
MSDATA <35>
CPU1.5V_S3_GATE <11>
DYN_TUR_CURRNT_SET# <62>
SIO_A20GATE <18>
AC_PRESENT <16>
PCH_PLTRST#_EC<17,33,35,36,40> CLK_PCI_MEC<17>
IRQ_SERIRQ<14,33,40>
SIO_PWRBTN# <16>
PCH_RSMRST# <42>
ME_SUS_PW R_ACK <16>
ALWON <54>
PS_ID <53>
DAT_TP_SIO<42> CLK_KBD<39> DAT_KBD<39>
DAT_MSE<39> CLK_MSE<39>
PBAT_SMBDAT<53>
SML1_SMBDATA<15> SML1_SMBCLK<15>
PBAT_SMBCLK<53>
CLK_TP_SIO<42> HOST_DEBUG_TX <35>
HOST_DEBUG_RX <35>
BC_CLK_ECE1117<42>BC_DAT_ECE1117<42>
BC_INT#_ECE1117<42>
RESET_OUT# <16>
LPC_LFRAME#<14,33,35,40>
LPC_LAD1<14,33,35,40> LPC_LAD2<14,33,35,40> LPC_LAD3<14,33,35,40>
LPC_LAD0<14,33,35,40>
SIO_EXT_SCI#<18> CLKRUN#<16,33,40>
VOL_MUTE <31>
BIA_PWM_EC<24> PCH_ALW _ON<43>
RUNPWROK <7,40>
PCH_SATA_MOD_EN# <14>
DDR_HVREF_RST_GATE <7>
DOCK_SMB_DAT <39>
DOCK_SMB_CLK <39>
BAY_SMBDAT <29,53>
BAY_SMBCLK <29,53>
CHARGER_SMBCLK <62>
CARD_SMBDAT <36>
CHARGER_SMBDAT <62>
CARD_SMBCLK <36>
USH_SMBDAT <33>
USH_SMBCLK <33>
GPU_SMBCLK <45>
GPU_SMBDAT <45>
SIO_EXT_SMI#<14,17>
SIO_RCIN#<18>
PM_APW ROK <16>
1.5V_SUS_PWRGD <55>
EC_32KHZ_ECE5048<40>
ACAV_IN <22,62,63>
PECI_EC <7>
DDR_ON <55>
ALW_PW RGD_3V_5V <54>
1.05V_A_PW RGD <57>
BC_CLK_EMC4022<22> BC_DAT_EMC4022<22>
BC_INT#_EMC4022<22>
BEEP<30>
PCIE_WAKE#<29,35,36>
ACAV_IN_NB<40,62,63>
DEVICE_DET# <29>
PCH_PCIE_WAKE#<16>
EN_INVPWR <24>
SIO_SLP_S5#<16>
VOL_DOWN <31>
DOCK_POR_RST#<39>
VOL_UP <31>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
MEC5055
41 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
MEC5055
41 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
MEC5055
41 66Friday, June 10, 2011
Compal Electronics, Inc.
Place closely pin A29
Bat2 = Amber LED
Bat1 = Blue LED
20mA drive pins
1K 4700p
4700p
4700p
4700p
4700p
4700p
X02
X01
X00
62K
33K
8.2K
4.3K
R875 C744
130K 4700p
REV
240K 4700p
2K
*
JTAG_RST# citcuit
close to U51.B57
CHIPSET_ID for BID
function
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
BOARD_ID rise time is measured from 5%~68%.
A00
Modify name net
GPIO024/THSEL_STRAP note
i.THSEL_STRAP =1 (selects thermistor on diode channel 1)
ii.THSEL_STRAP = 0 (selects remote diode on diode channel 1)
32 KHz Clock
least
15mil
15mil
R863 close to
U51& least 250mils
C740 close to U51.B12
R759 10K_0402_5%~DR759 10K_0402_5%~D
1 2
C726
0.1U_0402_25V6K~D
C726
0.1U_0402_25V6K~D
1
2
R1125 100K_0402_5%~DR1125 100K_0402_5%~D
12
R870
100K_0402_5%~D
R870
100K_0402_5%~D
12
C721
1U_0402_6.3V6K~D
@C721
1U_0402_6.3V6K~D
@
1 2
G
D
S
Q45
SSM3K7002FU_SC70-3~D
G
D
S
Q45
SSM3K7002FU_SC70-3~D
2
13
R862 0_0402_5%~DR862 0_0402_5%~D
1 2
JDEG2
ACES_87153-10411
CONN@
JDEG2
ACES_87153-10411
CONN@
11
2 2 2
33
4 4 4
55
6 6 6
77
8 8 8
G1
11
G2
12
99
10 10 10
G4
14 G3
13
R853 0_0402_5%~DR853 0_0402_5%~D
1 2
R420 2.2K_0402_5%~DR420 2.2K_0402_5%~D
12
C731
0.1U_0402_25V6K~D
C731
0.1U_0402_25V6K~D
1
2
C741
22P_0402_50V8J~D
C741
22P_0402_50V8J~D
1 2
R849
10K_0402_5%~D
R849
10K_0402_5%~D
12
R827 2.2K_0402_5%~DR827 2.2K_0402_5%~D
1 2
R1171 100K_0402_5%~DR1171 100K_0402_5%~D
12
R812 100K_0402_5%~D@R812 100K_0402_5%~D@
1 2
C742
4700P_0402_25V7K~D
C742
4700P_0402_25V7K~D
1
2
R818 2.2K_0402_5%~DR818 2.2K_0402_5%~D
1 2
R846 4.7K_0402_5%~DR846 4.7K_0402_5%~D
12
R824
10K_0402_5%~D
R824
10K_0402_5%~D
12
R815
0_0402_5%~D
R815
0_0402_5%~D
1 2
R821 100K_0402_5%~DR821 100K_0402_5%~D
12
PJP8
PAD-OPEN1x1m
PJP8
PAD-OPEN1x1m
12
C723
0.1U_0402_25V6K~D
C723
0.1U_0402_25V6K~D
1
2
C725
0.1U_0402_25V6K~D
C725
0.1U_0402_25V6K~D
1
2
R847
10K_0402_5%~D
R847
10K_0402_5%~D
12
G
D
S
Q50
SSM3K7002FU_SC70-3~D
G
D
S
Q50
SSM3K7002FU_SC70-3~D
2
13
R856 2.2K_0402_5%~DR856 2.2K_0402_5%~D
12
R845 4.7K_0402_5%~DR845 4.7K_0402_5%~D
12
R854 2.2K_0402_5%~DR854 2.2K_0402_5%~D
12
R823 100K_0402_5%~D@R823 100K_0402_5%~D@
1 2
U50
TC7SH08FU_SSOP5~D
U50
TC7SH08FU_SSOP5~D
B
1
A
2
G
3
O4
P5
C729
0.1U_0402_25V6K~D
C729
0.1U_0402_25V6K~D
1
2
R893
100K_0402_5%~D
R893
100K_0402_5%~D
12
R811 10K_0402_5%~DR811 10K_0402_5%~D
1 2
Y6
32.768KHZ_12.5PF_Q13FC1350000~D
Y6
32.768KHZ_12.5PF_Q13FC1350000~D
1 2
R872
10K_0402_5%~D
R872
10K_0402_5%~D
12
R881 100K_0402_5%~DR881 100K_0402_5%~D
1 2
C735
0.1U_0402_25V6K~D
C735
0.1U_0402_25V6K~D
1
2
C747
4.7P_0402_50V8C~D
@C747
4.7P_0402_50V8C~D
@
1
2
R886 1K_0402_1%~DR886 1K_0402_1%~D
1 2
R855 0_0402_5%~DR855 0_0402_5%~D
1 2
R850
100K_0402_5%~D
@R850
100K_0402_5%~D
@
12
R848
10K_0402_5%~D
R848
10K_0402_5%~D
12
R869 10K_0402_5%~DR869 10K_0402_5%~D
1 2
C740
4.7U_0603_6.3V6K~D
C740
4.7U_0603_6.3V6K~D
1
2
R820 2.2K_0402_5%~DR820 2.2K_0402_5%~D
1 2
R867 0_0402_5%~DR867 0_0402_5%~D
1 2
R861
10K_0402_5%~D
R861
10K_0402_5%~D
12
R1179 10K_0402_5%~D@R1179 10K_0402_5%~D@
1 2
R880 100K_0402_5%~DR880 100K_0402_5%~D
1 2
R418 2.2K_0402_5%~DR418 2.2K_0402_5%~D
12
R852 4.7K_0402_5%~DR852 4.7K_0402_5%~D
12
R851 4.7K_0402_5%~DR851 4.7K_0402_5%~D
12
R1068 0_0402_5%~DR1068 0_0402_5%~D
12
C722
1U_0402_6.3V6K~D
C722
1U_0402_6.3V6K~D
1
2
R1156 100K_0402_5%~DR1156 100K_0402_5%~D
12
R864
49.9_0402_1%~D
R864
49.9_0402_1%~D
12
C744
4700P_0402_25V7K~D
C744
4700P_0402_25V7K~D
1
2
R828 2.2K_0402_5%~DR828 2.2K_0402_5%~D
1 2
R879
10K_0402_5%~D
@R879
10K_0402_5%~D
@
1 2
R882 100K_0402_5%~DR882 100K_0402_5%~D
1 2
C736 0.1U_0402_25V6K~DC736 0.1U_0402_25V6K~D
12
R885
10_0402_1%~D
@R885
10_0402_1%~D
@
12
R884 1K_0402_1%~DR884 1K_0402_1%~D
1 2
C728
0.1U_0402_25V6K~D
C728
0.1U_0402_25V6K~D
1
2
R819
100K_0402_5%~D
R819
100K_0402_5%~D
12
JTAG1
@SHORT PADS~D
CONN@JTAG1
@SHORT PADS~D
CONN@
11
2
2
R825 10K_0402_5%~DR825 10K_0402_5%~D
1 2
R822 4.7K_0402_5%~DR822 4.7K_0402_5%~D
12
R883 10K_0402_5%~DR883 10K_0402_5%~D
1 2
C720
0.1U_0402_25V6K~D
C720
0.1U_0402_25V6K~D
1 2
R889 100K_0402_5%~DR889 100K_0402_5%~D
1 2
R1197 100K_0402_5%~DR1197 100K_0402_5%~D
12
R1118 100K_0402_5%~DR1118 100K_0402_5%~D
12
R1180 0_0402_5%~DR1180 0_0402_5%~D
1 2
C727
0.1U_0402_25V6K~D
C727
0.1U_0402_25V6K~D
1
2
R835 10K_0402_5%~DR835 10K_0402_5%~D
12
R875
240K_0402_5%~D
R875
240K_0402_5%~D
12
PS/2 INTERFACE
JTAG INTERFACE
FAN PWM & TACH
BC-LINK
HOST INTERFACE
MASTER CLOCK
SMBUS INTERFACE
GENERAL PURPOSE I/O
MISC INTERFACE
DELL PWR SW INF
I2S
PECI
U51
MEC5055-LZY_DQFN132_11X11~D
DB Version 0.12
PS/2 INTERFACE
JTAG INTERFACE
FAN PWM & TACH
BC-LINK
HOST INTERFACE
MASTER CLOCK
SMBUS INTERFACE
GENERAL PURPOSE I/O
MISC INTERFACE
DELL PWR SW INF
I2S
PECI
U51
MEC5055-LZY_DQFN132_11X11~D
DB Version 0.12
GPIO012/I2C1H_DATA/I2C2D_DATA B7
GPIO013/I2C1H_CLK/I2C2D_CLK A7
GPIO021/RC_ID1 A10
VSS[1]
B11
GPIO025/UART_CLK B14
GPIO127/A20M A45
GPIO060/KBRST A25
GPIO110/PS2_CLK2/GPTP-IN6
A37
GPIO111/PS2_DAT2/GPTP-OUT6
B40
GPIO112/PS2_CLK1A
A38
GPIO113/PS2_DAT1A
B41
GPIO114/PS2_CLK0A
A39
GPIO115/PS2_DAT0A
B42
GPIO116/MSDATA A40
GPIO117/MSCLK B43
GPIO145/I2C1K_DATA/JTAG_TDI
A51
GPIO147/I2C1J_DATA/I2C2C_DATA/JTAG_CLK
B56
JTAG_RST#
B57
GPIO146/I2C1K_CLK/JTAG_TDO
B55
GPIO150/I2C1J_CLK/I2C2C_CLK/JTAG_TMS
A53 GPIO153/LED3 A55
GPIO123/BCM_A_CLK
A43
GPIO122/BCM_A_DAT
B45
GPIO121/BCM_A_INT#
A42
XTAL1
A61
XTAL2
A62
nFWP B65
VBAT B64
VTR[1] A11
VTR[2] A22
VTR[3] B35
VTR[4] A41
VTR[5] A58
GPIO160/32KHZ_OUT
B62
VCC_PRWGD B26
I2S_WS B28
GPIO106/HSPI_MOSI A36
AGND
B66
VR_CAP
B12
VSS_RO
B54
VTR[6] A52
GPIO006/I2C1B_CLK B5
GPIO005/I2C1B_DATA A4
GPIO004/I2C1A_CLK B4
GPIO003/I2C1A_DATA A3
GPIO130/I2C2A_DATA B48
GPIO131/I2C2A_CLK B49
GPIO132/I2C1G_DATA A47
GPIO140/I2C1G_CLK B50
GPIO154/I2C1C_DATA/PS2_CLK1B
B59
GPIO155/I2C1C_CLK/PS2_DAT1B
A56
GPIO007/I2C1D_DATA/PS2_CLK0B/I2C3A_DATA
A5
GPIO010/I2C1D_CLK/PS2_DAT0B/I2C3A_CLK
B6
GPIO141/I2C1F_DATA/I2C2B_DATA B52
GPIO142/I2C1F_CLK/I2C2B_CLK A49
GPIO143/I2C1E_DATA B53
GPIO144/I2C1E_CLK A50
GPIO052/FAN_TACH3
B23 GPIO051/FAN_TACH2
A21 GPIO050/FAN_TACH1
B22
GPIO056/PWM3
A24 GPIO055/PWM2
B25 GPIO054/PWM1
A23 GPIO053/PWM0
B24
GPIO103/ECGP_MISO B37
GPIO102/HSPI_SCLK A34
GPIO101/ECGP_SCLK B36
GPIO104/HSPI_MISO A35
GPIO105/ECGP_MOSI B38
VTR[7] B3
VTR[8] A26
GPIO157/LED2 B61
GPIO156/LED1 A57
I2S_CLK B27
VSS[4]
B60
GPIO022/BCM_B_CLK
A12
GPIO023/BCM_B_DAT
B13
GPIO024/BCM_B_INT#
A13
GPIO042/BCM_C_INT#
B19 GPIO043/BCM_C_DAT
A18 GPIO044/BCM_C_CLK
B20
GPIO045/LSBCM_D_INT#
A19 GPIO046/LSBCM_D_DAT
B21 GPIO047/LSBCM_D_CLK
A20
BGPO0 A59
VCI_IN2# B63
VCI_OUT A60
VCI_IN1# A63
VCI_IN0# B67
VCI_OVRD_IN B1
VCI_IN3# A1
GPIO001/ECSPI_CS1 B2
GPIO002/ECSPI_CS2 A2
GPIO014/GPTP-IN7/HSPI_CS1 B8
GPIO015/GPTP-OUT7 A8
GPIO016/GPTP-IN8 B9
GPIO017/GPTP-OUT8 A9
GPIO020/RC_ID2 B10
GPIO026/GPTP-IN1 A14
GPIO027/GPTP-OUT1 B15
GPIO30/GPTP-IN2/BCM_E_INT#
A15 GPIO31/GPTP-OUT2/BCM_E_DAT
B16 GPIO032/GPTP-IN3/BCM_E_CLK
A16
GPIO040/GPTP-OUT3/HSPI_CS2 B18
GPIO041 A17
GPIO107/nRESET_OUT B39
GPIO120/UART_TX B44
GPIO124/GPTP-OUT5/UART_RX B46
GPIO125/GPTP-IN5 A44
GPIO126 B47
GPIO151/GPTP-IN4 A54
GPIO152/GPTP-OUT4 B58
GPIO011/nSMI
A6
GPIO061/LPCPD#
A27
LDRQ#
B29
SER_IRQ
A28
LRESET#
B30
PCI_CLK
A29
LFRAME#
B31
LAD0
A30
LAD1
B32
LAD2
A31
LAD3
B33
CLKRUN#
A32
GPIO100/nEC_SCI
A33
EP
C1
I2S_DAT B17
NC1
B34
PROCHOT#/PWM4 A46
PECI A48
PECI_VREF B51
NC2
A64
NC3
B68
R836
100_0402_1%~D
@
R836
100_0402_1%~D
@
12
R829 4.7K_0402_5%~DR829 4.7K_0402_5%~D
12
R817 100K_0402_5%~DR817 100K_0402_5%~D
1 2
R871
1K_0402_1%~D
R871
1K_0402_1%~D
12
R841 2.2K_0402_5%~DR841 2.2K_0402_5%~D
12
R876 100K_0402_5%~DR876 100K_0402_5%~D
1 2
R863 43_0402_5%~DR863 43_0402_5%~D
1 2
R858
10K_0402_5%~D
R858
10K_0402_5%~D
12
R838 2.2K_0402_5%~DR838 2.2K_0402_5%~D
12
C734
1U_0402_6.3V6K~D
C734
1U_0402_6.3V6K~D
1
2
C730
10U_0603_6.3V6M~D
C730
10U_0603_6.3V6M~D
1
2
R860
10K_0402_5%~D
R860
10K_0402_5%~D
12
C732
0.1U_0402_25V6K~D
C732
0.1U_0402_25V6K~D
1
2
R810
100K_0402_5%~D
R810
100K_0402_5%~D
12
C733
1U_0402_6.3V6K~D
@C733
1U_0402_6.3V6K~D
@
1 2
R859
10K_0402_5%~D
R859
10K_0402_5%~D
12
G
D
S
Q47
SSM3K7002FU_SC70-3~D
@
G
D
S
Q47
SSM3K7002FU_SC70-3~D
@
2
13
R887 1K_0402_1%~DR887 1K_0402_1%~D
1 2
R814 100K_0402_5%~DR814 100K_0402_5%~D
1 2
R843 8.2K_0402_5%~D@R843 8.2K_0402_5%~D@
1 2
R1169 100K_0402_5%~DR1169 100K_0402_5%~D
12
C737
0.1U_0402_25V6K~D
C737
0.1U_0402_25V6K~D
1
2
R799
10K_0402_5%~D
R799
10K_0402_5%~D
12
R892 10K_0402_5%~DR892 10K_0402_5%~D
1 2
C743
22P_0402_50V8J~D
C743
22P_0402_50V8J~D
1 2
C739
0.1U_0402_25V6K~D
C739
0.1U_0402_25V6K~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
TP_DATA
TP_CLK
BT_COEX_STATUS2
BT_PRI_STATUS
BT_PRI_STATUS
BT_COEX_STATUS2
TP_CLK
TP_DATA
KB_DET#
PS2_CLK_TS
PS2_DAT_TS
PS2_CLK_TS
PS2_DAT_TS
RSMRST#
PCH_RSMRST#_Q
PCH_RSMRST#
TP_CLK
TP_DATA
+5V_RUN
+3.3V_RUN
+3.3V_RUN
+5V_RUN
+3.3V_TP
+3.3V_ALW
+3.3V_TP
+3.3V_TP
+3.3V_ALW
+3.3V_ALW +3.3V_RUN +3.3V_TP
+5V_ALW
+3.3V_ALW
+3.3V_ALW
DAT_TP_SIO<41>
POWER_SW#_MB<31,41>
BT_DET#<17>
BT_ACTIVE<44>
COEX1_BT_ACTIVE<35>
BT_RADIO_DIS#<40>
COEX2_WLAN_ACTIVE<35>
USBP11+<17> USBP11-<17>
BT_COEX_STATUS2<33> BT_PRI_STATUS<33>
KB_DET#<18>
BC_INT#_ECE1117<41>
BC_CLK_ECE1117<41>
BC_DAT_ECE1117<41>
PCH_RSMRST#_Q <14,16>
PCH_RSMRST#<41>
CLK_TP_SIO<41>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
TP/KB/BT/FAN/RESET
42 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
TP/KB/BT/FAN/RESET
42 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
TP/KB/BT/FAN/RESET
42 66Friday, June 10, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Place on Bottom
Power Switch for debug
Touch Pad
KB Conn. Pitch=1.0mm
Place close to JKB1
Touch Pad Conn. Pitch=0.5mm
BlueTooth
Pin reverse for PT
Change KB connector to same as JSC1
EC SIDE
RSMRST circuit
Place close to JTP1
Part Number Description
PK230003Q0L SPK PACK ZJX 2.0W 4 OHM FG
Speak@
Part Number Description
PK230003Q0L SPK PACK ZJX 2.0W 4 OHM FG
Speak@
C289
0.01U_0402_16V7K~D
C289
0.01U_0402_16V7K~D
1
2
L54 BLM18AG601SN1D_0603~DL54 BLM18AG601SN1D_0603~D
12
C758
0.1U_0402_25V6K~D
C758
0.1U_0402_25V6K~D
1
2
Part Number Description
DC020003Y0L H-CONN SET ZJX MB-LCD
14 WXGA+(-1ch)
LVDS cable@
Part Number Description
DC020003Y0L H-CONN SET ZJX MB-LCD
14 WXGA+(-1ch)
LVDS cable@
C759
100P_0402_50V8J~D
@C759
100P_0402_50V8J~D
@
1
2
U4
RT9818A-46GU3_SC70-3~D
U4
RT9818A-46GU3_SC70-3~D
VCC
1
GND
2RESET# 3
JKB1
FCI_10089709-010010LF~D
CONN@
JKB1
FCI_10089709-010010LF~D
CONN@
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
GND
11
GND
12
C749
10P_0402_50V8J~D
C749
10P_0402_50V8J~D
1
2
C752
10P_0402_50V8J~D
C752
10P_0402_50V8J~D
1
2
C755
0.1U_0402_25V6K~D
C755
0.1U_0402_25V6K~D
1
2
R904
10K_0402_5%~D
R904
10K_0402_5%~D
12
C748
0.1U_0402_25V6K~D
C748
0.1U_0402_25V6K~D
1
2
C753
33P_0402_50V8J~D
C753
33P_0402_50V8J~D
1
2
C751
10P_0402_50V8J~D
C751
10P_0402_50V8J~D
1
2
Part Number Description
NBX0000RS0L FFC 12P G P.5 PAD.3 75MM MB-VOLUME/B 0FD
@MEDIA Board FFC
Part Number Description
NBX0000RS0L FFC 12P G P.5 PAD.3 75MM MB-VOLUME/B 0FD
@MEDIA Board FFC
Part Number Description
DC02C00180L H-CONN SET 0FD MB-LCD CAM LED 2CHANNEL
LVDS cable@
Part Number Description
DC02C00180L H-CONN SET 0FD MB-LCD CAM LED 2CHANNEL
LVDS cable@
PWRSW1
@SHORT PADS~D
@PWRSW1
@SHORT PADS~D
@
1
122
R1622
10K_0402_5%~D
R1622
10K_0402_5%~D
1 2
R903
4.7K_0402_5%~D
R903
4.7K_0402_5%~D
12
C756
0.1U_0402_25V6K~D
C756
0.1U_0402_25V6K~D
1
2
R1133 1K_0402_1%~DR1133 1K_0402_1%~D
1 2
D37
PESD5V0U2BT_SOT23-3~D
D37
PESD5V0U2BT_SOT23-3~D
2
3
1
Part Number Description
SP070007V0L S SOCKET TYCO 1770551-1
10P H5.9 SMART
@KB FFC
Part Number Description
SP070007V0L S SOCKET TYCO 1770551-1
10P H5.9 SMART
@KB FFC
Part Number Description
NBX0000RR0L
FFC 8P F P0.5
PAD=0.3 136MM
MB-TP/B 0FD
T/P FFC@
Part Number Description
NBX0000RR0L
FFC 8P F P0.5
PAD=0.3 136MM
MB-TP/B 0FD
T/P FFC@
R1162 0_0603_5%~D@R1162 0_0603_5%~D@1 2
R1623
0_0402_5%~D
@R1623
0_0402_5%~D
@
1 2
Part Number Description
DC020014Y0L H-CONN SET 0FD MB-BT
@BT wire cable
Part Number Description
DC020014Y0L H-CONN SET 0FD MB-BT
@BT wire cable
JBT1
E&T_3703-E12N-03R
CONN@
JBT1
E&T_3703-E12N-03R
CONN@
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
G1
13
G2
14
Part Number Description
DC020014Z10 H-CONN SET 0FD M/B-BATTERY 9PIN
Battery bridge cable@
Part Number Description
DC020014Z10 H-CONN SET 0FD M/B-BATTERY 9PIN
Battery bridge cable@
JTP1
TYCO_2041070-8
CONN@
JTP1
TYCO_2041070-8
CONN@
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
G1 9
G2 10
R902
4.7K_0402_5%~D
R902
4.7K_0402_5%~D
12
U7
TC7SH08FU_SSOP5~D
U7
TC7SH08FU_SSOP5~D
B
1
A
2
G
3
O4
P5
Part Number Description
GC20323MX00 BATT CR2032 3V
220MAH MAXELL
RTC BATT@
Part Number Description
GC20323MX00 BATT CR2032 3V
220MAH MAXELL
RTC BATT@
Part Number Description
NBX0000RP0L FFC 6P H P1 PAD=0.7 87.4MM MB-LED/B 0FD
@LED Board FFC
Part Number Description
NBX0000RP0L FFC 6P H P1 PAD=0.7 87.4MM MB-LED/B 0FD
@LED Board FFC
L55 BLM18AG601SN1D_0603~DL55 BLM18AG601SN1D_0603~D
12
C754
100P_0402_50V8J~D
@C754
100P_0402_50V8J~D
@
1
2
Part Number Description
DC30100BL0L CONN SET 0FD
MDC-RJ11
MDC wire set cable@
Part Number Description
DC30100BL0L CONN SET 0FD
MDC-RJ11
MDC wire set cable@
R1134 1K_0402_1%~DR1134 1K_0402_1%~D
1 2
Part Number Description
DC30100BN0 CONN SET 0FD DCJACK-MB WDMD-DCE30004-DF
UMA DC_IN wire cable@
Part Number Description
DC30100BN0 CONN SET 0FD DCJACK-MB WDMD-DCE30004-DF
UMA DC_IN wire cable@
C750
10P_0402_50V8J~D
C750
10P_0402_50V8J~D
1
2
Part Number Description
DC28A000800 FAN SET DAQ20 DC5V AB7405HB-HB3 ADDA
FAN@
Part Number Description
DC28A000800 FAN SET DAQ20 DC5V AB7405HB-HB3 ADDA
FAN@
R1161 0_0603_5%~DR1161 0_0603_5%~D
1 2
C288 0.1U_0402_25V6K~DC288 0.1U_0402_25V6K~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SUS_ON_3.3V#
+1.5V_RUN_CHG
+5V_RUN_CHG
+3.3V_RUN_CHG
RUN_ON_ENABLE#
SUS_ON_3.3V#
+3.3V_SUS_CHG
ALW_ON_3.3V#
+3.3V_ALWPCH_CHG
+3.3V_M_CHG
ALW_ON_3.3V#
A_ON_3.3V#
A_ON_3.3V#
RUN_ON_ENABLE#
+1.05V_RUN_CHG
+DDR_CHG
+1.5V_CPU_VDDQ_CHG
1.5V_RUN_ENABLE
1.05V_RUN_ENABLE
ALW_ENABLE
SUS_ENABLE
A_ENABLE
SIO_SLP_A#
+3.3V_ALW2
+3.3V_ALW2 +3.3V_ALW +3.3V_ALW_PCH
+3.3V_ALW +3.3V_SUS
+3.3V_ALW2
+3.3V_ALW +3.3V_M
+3.3V_ALW2
+3.3V_SUS +1.5V_RUN +3.3V_RUN+5V_RUN+3.3V_ALW_PCH
+3.3V_M
+1.5V_RUN
+1.5V_MEM
+1.05V_M +1.05V_RUN
+1.05V_RUN +0.75V_DDR_VTT+1.5V_CPU_VDDQ
+PWR_SRC_S
+PWR_SRC_S
+PWR_SRC_S
+PWR_SRC_S
+PWR_SRC_S
+5V_RUN
+3.3V_RUN
+5V_ALW
+5V_ALW_U78
+3.3V_ALW
+3.3V_ALW_U78
PCH_ALW_ON<41>
SUS_ON<40>
ALW_ENABLE<20>
RUN_ON_CPU1.5VS3#<7,11>
RUN_ON_ENABLE#<41>
RUN_ON<28,36,40,56,64>
SIO_SLP_S3#<11,16,28,36,40,56>
SIO_SLP_A#<16,40,57>
SIO_SLP_S3#<11,16,28,36,40,56>
RUN_ON<28,36,40,56,64>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
POWER CONTROL
43 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
POWER CONTROL
43 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
POWER CONTROL
43 66Friday, June 10, 2011
Compal Electronics, Inc.
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DC/DC Interface
+3.3V_ALW_PCH Source
+3.3V_SUS Source
+3.3V_M Source
Discharg Circuit
+1.5V_RUN Source
+1.05V_RUN Source
+5V_RUN Source
+3.3V_RUN Source
R749 0_0402_5%~DR749 0_0402_5%~D
1 2
C762
3300P_0402_50V7K~D
C762
3300P_0402_50V7K~D
1
2
R926
220_0402_5%~D
R926
220_0402_5%~D
12
R1617
1M_0402_5%~D
R1617
1M_0402_5%~D
12
R916
39_0603_5%~D
R916
39_0603_5%~D
12
R747 0_0402_5%~D@R747 0_0402_5%~D@1 2
G
D
S
Q72
SSM3K7002FU_SC70-3~D
G
D
S
Q72
SSM3K7002FU_SC70-3~D
2
13
R908
20K_0402_5%~D
R908
20K_0402_5%~D
12
R913
20K_0402_5%~D
R913
20K_0402_5%~D
12
R735 0_0402_5%~DR735 0_0402_5%~D
1 2
Q53A
DMN66D0LDW-7_SOT363-6~D
Q53A
DMN66D0LDW-7_SOT363-6~D
61
2
R921
20K_0402_5%~D
R921
20K_0402_5%~D
12
S
G
D
Q49
SI3456DDV-T1-GE3_TSOP6~D
S
G
D
Q49
SI3456DDV-T1-GE3_TSOP6~D
3
6
245
1
Q57A
DMN66D0LDW-7_SOT363-6~D
Q57A
DMN66D0LDW-7_SOT363-6~D
61
2
G
D
S
Q65
SSM3K7002FU_SC70-3~D
@
G
D
S
Q65
SSM3K7002FU_SC70-3~D
@
2
13
C764
0.1U_0402_25V6K~D
C764
0.1U_0402_25V6K~D
1
2
R911
100K_0402_5%~D
R911
100K_0402_5%~D
12
R744 0_0402_5%~D@R744 0_0402_5%~D@1 2
R1618
1M_0402_5%~D
R1618
1M_0402_5%~D
12
R907
100K_0402_5%~D
R907
100K_0402_5%~D
12
G
D
S
Q68
SSM3K7002FU_SC70-3~D
@
G
D
S
Q68
SSM3K7002FU_SC70-3~D
@
2
13
R919
20K_0402_5%~D
@R919
20K_0402_5%~D
@
12
G
D
S
Q66
SSM3K7002FU_SC70-3~D
@
G
D
S
Q66
SSM3K7002FU_SC70-3~D
@
2
13
R928
1K_0402_1%~D
@R928
1K_0402_1%~D
@
12
C1198
1U_0603_10V7K~D
C1198
1U_0603_10V7K~D
1
2
Q52A
DMN66D0LDW-7_SOT363-6~D
Q52A
DMN66D0LDW-7_SOT363-6~D
61
2
R909
100K_0402_5%~D
R909
100K_0402_5%~D
12
S
G
D
Q59
NTGS4141NT1G_TSOP6~D
S
G
D
Q59
NTGS4141NT1G_TSOP6~D
3
6
245
1
R929
39_0603_5%~D
@R929
39_0603_5%~D
@
12
Q51B
DMN66D0LDW-7_SOT363-6~D
Q51B
DMN66D0LDW-7_SOT363-6~D
3
5
4
C1199
1U_0603_10V7K~D
C1199
1U_0603_10V7K~D
12
Q52B
DMN66D0LDW-7_SOT363-6~D
Q52B
DMN66D0LDW-7_SOT363-6~D
3
5
4
R925
39_0402_5%~D
@R925
39_0402_5%~D
@
12
R920
100K_0402_5%~D
R920
100K_0402_5%~D
12
R931
20K_0402_5%~D
R931
20K_0402_5%~D
12
R1619
1M_0402_5%~D
R1619
1M_0402_5%~D
12
C770
4700P_0402_25V7K~D
C770
4700P_0402_25V7K~D
1
2R910
20K_0402_5%~D
R910
20K_0402_5%~D
12
C1196
270P_0402_50V7K~D
C1196
270P_0402_50V7K~D
1 2
R918
100K_0402_5%~D
R918
100K_0402_5%~D
12
R924
1K_0402_1%~D
@R924
1K_0402_1%~D
@
12
G
D
S
Q67
SSM3K7002FU_SC70-3~D
@
G
D
S
Q67
SSM3K7002FU_SC70-3~D
@
2
13
Q51A
DMN66D0LDW-7_SOT363-6~D
Q51A
DMN66D0LDW-7_SOT363-6~D
61
2
R1610
470K_0402_5%~D
R1610
470K_0402_5%~D
12
R905
100K_0402_5%~D
R905
100K_0402_5%~D
12
U78
SLG59M232VTR
U78
SLG59M232VTR
GND 11
VIN2
6
VBIAS
4
ON2
5
VOUT2 9
VIN2
7
CT1 12
VOUT1 14
VOUT2 8
VOUT1 13
VIN1
2
ON1
3
VIN1
1
CT2 10
GPAD 15
G
D
S
Q71
SSM3K7002FU_SC70-3~D
G
D
S
Q71
SSM3K7002FU_SC70-3~D
2
13
C1197
270P_0402_50V7K~D
@C1197
270P_0402_50V7K~D
@
1 2
R930
100K_0402_5%~D
R930
100K_0402_5%~D
12
R927
22_0603_5%~D
R927
22_0603_5%~D
12
R914
20K_0402_5%~D
R914
20K_0402_5%~D
12
R922
1K_0402_1%~D
@R922
1K_0402_1%~D
@
12
C767
4700P_0402_25V7K~D
C767
4700P_0402_25V7K~D
1
2
C760
10U_0603_6.3V6M~D
C760
10U_0603_6.3V6M~D
1
2
C772
10U_0603_6.3V6M~D
C772
10U_0603_6.3V6M~D
1
2
C761
0.1U_0402_25V6K~D
C761
0.1U_0402_25V6K~D
1
2
PJP5
PAD-OPEN 1x3m
PJP5
PAD-OPEN 1x3m
12
C769
10U_0603_6.3V6M~D
C769
10U_0603_6.3V6M~D
1
2
R917
100K_0402_5%~D
R917
100K_0402_5%~D
12
C768
10U_0603_6.3V6M~D
C768
10U_0603_6.3V6M~D
1
2
R1611
470K_0402_5%~D
R1611
470K_0402_5%~D
12
C765
10U_0603_6.3V6M~D
C765
10U_0603_6.3V6M~D
1
2
G
D
S
Q64
SSM3K7002FU_SC70-3~D
G
D
S
Q64
SSM3K7002FU_SC70-3~D
2
13
Q57B
DMN66D0LDW-7_SOT363-6~D
Q57B
DMN66D0LDW-7_SOT363-6~D
3
5
4
C773
2200P_0402_50V7K~D
C773
2200P_0402_50V7K~D
1
2
R923
1K_0402_1%~D
@R923
1K_0402_1%~D
@
12
PJP6
PAD-OPEN 1x3m
PJP6
PAD-OPEN 1x3m
1 2
C771
4700P_0402_25V7K~D
C771
4700P_0402_25V7K~D
1
2
G
D
S
Q69
SSM3K7002FU_SC70-3~D
@
G
D
S
Q69
SSM3K7002FU_SC70-3~D
@
2
13
R915
100K_0402_5%~D
R915
100K_0402_5%~D
12
S
G
D
Q58
SI3456DDV-T1-GE3_TSOP6~D
S
G
D
Q58
SI3456DDV-T1-GE3_TSOP6~D
3
6
245
1
G
D
S
Q60
SSM3K7002FU_SC70-3~D
G
D
S
Q60
SSM3K7002FU_SC70-3~D
2
13
S
G
D
Q54
SI3456DDV-T1-GE3_TSOP6~D
S
G
D
Q54
SI3456DDV-T1-GE3_TSOP6~D
3
6
245
1
Q63
SI4164DY-T1-GE3_SO8~D
Q63
SI4164DY-T1-GE3_SO8~D
36
5
7
82
4
1
G
D
S
Q70
SSM3K7002FU_SC70-3~D
@
G
D
S
Q70
SSM3K7002FU_SC70-3~D
@
2
13
Q53B
DMN66D0LDW-7_SOT363-6~D
Q53B
DMN66D0LDW-7_SOT363-6~D
3
5
4
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MASK_BASE_LEDS#
LID_CL#
SYS_LED_MASK#
MASK_BASE_LEDS#
MASK_BASE_LEDS#
SYS_LED_MASK#
BAT1_LED#_Q
BAT2_LED#_Q
MASK_BASE_LEDS#
MASK_BASE_LEDS#
BREATH_WHITE_LED_SNIFFBREATH_LED#_Q
MASK_BASE_LEDS#
PANEL_HDD_LED
+3.3V_ALW
+5V_ALW
+3.3V_ALW
+5V_ALW
+3.3V_ALW
+5V_ALW
SYS_LED_MASK#<40>
LID_CL#<31,40>
PANEL_HDD_LED <24>
SATA_ACT#<14>
SATA_LED <31>
LED_SATA_DIAG_OUT#<40>
MASK_SATA_LED#<40>
BATT_WHITE_LED <24>
BREATH_LED#<39,40>
BREATH_WHITE_LED <24>
WLAN_LED <31>
WIRELESS_LED#<35,40>
BT_ACTIVE<42>
BAT2_LED#<40>
BAT1_LED#<40>
BATT_WHITE <31>
BATT_YELLOW <31>
BATT_YELLOW_LED <24>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
PAD and Standoff
44 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
PAD and Standoff
44 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
PAD and Standoff
44 66Friday, June 10, 2011
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
EMI CLIP
Fiducial Mark
SYS_LED_MASK# LID_CL#
Mask All LEDs (Sniffer Function)
Mask Base MB LEDs (Lid Closed)
0
1 0
X
LED Circuit Control Table
Do not Mask LEDs (Lid Opened)
11
WLAN LED solution for White LED
HDD LED solution for White LED
Breath LED
Battery LED
Place LED1 close to SW1
Q78B
DMN66D0LDW-7_SOT363-6~D
Q78B
DMN66D0LDW-7_SOT363-6~D
3
5
4
H12
H_3P0
@H12
H_3P0
@
1
R937
100K_0402_5%~D
R937
100K_0402_5%~D
12
H6
H_3P0
@H6
H_3P0
@
1
Q78A
DMN66D0LDW-7_SOT363-6~D
Q78A
DMN66D0LDW-7_SOT363-6~D
61
2
CLIP2
EMI_CLIP
CLIP2
EMI_CLIP
GND 1
H7
H_3P0
@H7
H_3P0
@
1
R939 4.7K_0402_5%~DR939 4.7K_0402_5%~D
1 2
Q84B
DMN66D0LDW-7_SOT363-6~D
Q84B
DMN66D0LDW-7_SOT363-6~D
3
5
4
FD2
FIDUCIAL MARK~D
@FD2
FIDUCIAL MARK~D
@
1
Q80A
DMN66D0LDW-7_SOT363-6~D
Q80A
DMN66D0LDW-7_SOT363-6~D
61
2
H16
H_3P0
@H16
H_3P0
@
1
Q80B
DMN66D0LDW-7_SOT363-6~D
Q80B
DMN66D0LDW-7_SOT363-6~D
3
5
4
H8
H_3P2
@H8
H_3P2
@
1
D62
RB751S40T1_SOD523-2~D
D62
RB751S40T1_SOD523-2~D
21
H1
H_3P3
@H1
H_3P3
@
1
R934 4.7K_0402_5%~DR934 4.7K_0402_5%~D
1 2
H4
H_3P3
@H4
H_3P3
@
1
R938 4.7K_0402_5%~DR938 4.7K_0402_5%~D
1 2
Q83B
DMN66D0LDW-7_SOT363-6~D
Q83B
DMN66D0LDW-7_SOT363-6~D
3
5
4
Q74B
DMN66D0LDW-7_SOT363-6~D
Q74B
DMN66D0LDW-7_SOT363-6~D
3
5
4
Q74A
DMN66D0LDW-7_SOT363-6~D
Q74A
DMN66D0LDW-7_SOT363-6~D
61
2
H19
H_3P0x2P0
@H19
H_3P0x2P0
@
1
H13
H_3P0
@H13
H_3P0
@
1
Q84A
DMN66D0LDW-7_SOT363-6~D
Q84A
DMN66D0LDW-7_SOT363-6~D
61
2
H15
H_3P0
@H15
H_3P0
@
1
C778 0.1U_0402_25V6K~DC778 0.1U_0402_25V6K~D
1 2
Q75
PDTA114EU_SC70-3~D
Q75
PDTA114EU_SC70-3~D
2
1 3
LED1
LTW-193ZDS5_WHITE~D
LED1
LTW-193ZDS5_WHITE~D
21
H17
H_2P3
@H17
H_2P3
@
1
H3
H_3P0
@H3
H_3P0
@
1
H23
H_2P3
@H23
H_2P3
@
1
U58
TC7SH08FU_SSOP5~D
U58
TC7SH08FU_SSOP5~D
B
1
A
2
G
3
O4
P5
R951
475_0402_1%~D
R951
475_0402_1%~D
1 2
H22
H_3P0
@H22
H_3P0
@
1
R950
100K_0402_5%~D
R950
100K_0402_5%~D
12
H10
H_3P3
@H10
H_3P3
@
1
H9
H_3P0
@H9
H_3P0
@
1
H5
H_3P0
@H5
H_3P0
@
1
H2
H_3P3
@H2
H_3P3
@
1
Q79
PDTA114EU_SC70-3~D
Q79
PDTA114EU_SC70-3~D
2
1 3
R949
4.7K_0402_5%~D
R949
4.7K_0402_5%~D
1 2
D59
RB751S40T1_SOD523-2~D
D59
RB751S40T1_SOD523-2~D
21
FD4
FIDUCIAL MARK~D
@FD4
FIDUCIAL MARK~D
@
1
R957 1K_0402_1%~DR957 1K_0402_1%~D
1 2
R932
10K_0402_5%~D
R932
10K_0402_5%~D
12
R955
4.7K_0402_5%~D
R955
4.7K_0402_5%~D
1 2
H20
H_2P0N
@H20
H_2P0N
@
1
Q83A
DMN66D0LDW-7_SOT363-6~D
Q83A
DMN66D0LDW-7_SOT363-6~D
61
2
H14
H_3P0
@H14
H_3P0
@
1
R953
475_0402_1%~D
R953
475_0402_1%~D
1 2
Q81
PDTA114EU_SC70-3~D
Q81
PDTA114EU_SC70-3~D
2
1 3
CLIP1
EMI_CLIP
CLIP1
EMI_CLIP
GND 1
FD3
FIDUCIAL MARK~D
@FD3
FIDUCIAL MARK~D
@
1
R958
4.7K_0402_5%~D
R958
4.7K_0402_5%~D
1 2
FD1
FIDUCIAL MARK~D
@FD1
FIDUCIAL MARK~D
@
1
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PEG_CRX_GTX_P[0..15]
PEG_CRX_GTX_N[0..15]
PEG_CTX_GRX_P[0..15]
PEG_CRX_GTX_C_N0
PEG_CRX_GTX_C_P12
PEG_CRX_GTX_P11
PEG_CRX_GTX_P6
PEG_CRX_GTX_N9
PEG_CRX_GTX_N5
PEG_CRX_GTX_P12
PEG_CRX_GTX_N6
PEG_CRX_GTX_P0
PEG_CRX_GTX_P14
PEG_CRX_GTX_P4
PEG_CRX_GTX_N11
PEG_CRX_GTX_P7
PEG_CRX_GTX_N1
PEG_CRX_GTX_N8
PEG_CRX_GTX_P9
PEG_CRX_GTX_N14
PEG_CRX_GTX_P15
PEG_CRX_GTX_N7
PEG_CRX_GTX_P10
PEG_CRX_GTX_P2
PEG_CRX_GTX_N15
PEG_CRX_GTX_P13
PEG_CRX_GTX_P3
PEG_CRX_GTX_N3
PEG_CRX_GTX_N13
PEG_CRX_GTX_P5
PEG_CRX_GTX_N2
PEG_CRX_GTX_P8
PEG_CRX_GTX_N4
PEG_CRX_GTX_P1
PEG_CRX_GTX_N10
PEG_CRX_GTX_N12
PEG_CRX_GTX_C_P1
PEG_CRX_GTX_C_N1
PEG_CRX_GTX_C_N4
PEG_CTX_GRX_N[0..15]
PEG_CRX_GTX_C_P2
PEG_CRX_GTX_C_N2
PEG_CRX_GTX_C_P3
PEG_CRX_GTX_C_N3
PEG_CRX_GTX_C_P4
PEG_CRX_GTX_C_P5
PEG_CRX_GTX_C_N5
PEG_CRX_GTX_C_P6
PEG_CRX_GTX_C_N6
PEG_CRX_GTX_C_P7
PEG_CRX_GTX_C_N7
PEG_CRX_GTX_C_P8
PEG_CRX_GTX_C_N8
PEG_CRX_GTX_C_P9
PEG_CRX_GTX_C_N9
PEG_CRX_GTX_C_P10
PEG_CRX_GTX_C_N10
PEG_CRX_GTX_C_P11
PEG_CRX_GTX_C_N11
PEG_CRX_GTX_C_N12
PEG_CRX_GTX_C_N13
PEG_CRX_GTX_C_N14
PEG_CRX_GTX_C_N15
PEG_CRX_GTX_C_P15
PEG_CRX_GTX_N0
PEG_CRX_GTX_C_P14
PEG_CRX_GTX_C_P13
PEG_CRX_GTX_C_P0
GPU_CRT_BLU
GPU_CRT_RED
GPU_CRT_DAT_DDC
GPU_CRT_CLK_DDC
GPU_CRT_GRN
ENVDD_GPU
I2CB_SCL
I2CB_SDA
DGPU_PEX_RST
DPE_GPU_HPD
DPD_GPU_HPD
DPC_GPU_HPD
GPU_GPIO9
THERMTRIP_VGA#
DGPU_PEX_RST DGPU_PEX_RST_R
PEG_CTX_GRX_N2
PEG_CTX_GRX_N1
PEG_CTX_GRX_N0
PEG_CTX_GRX_P1
PEG_CTX_GRX_P2
PEG_CTX_GRX_P4
PEG_CTX_GRX_N8
PEG_CTX_GRX_N5
PEG_CTX_GRX_P8
PEG_CTX_GRX_N6
PEG_CTX_GRX_P7
PEG_CTX_GRX_P3
PEG_CTX_GRX_N9
PEG_CTX_GRX_N7
PEG_CTX_GRX_P6
PEG_CTX_GRX_P5
PEG_CTX_GRX_N4
PEG_CTX_GRX_N3
PEG_CTX_GRX_N10
PEG_CTX_GRX_P9
PEG_CTX_GRX_N12
PEG_CTX_GRX_P15
PEG_CTX_GRX_N14
PEG_CTX_GRX_P14
PEG_CTX_GRX_N13
PEG_CTX_GRX_P0
PEG_CTX_GRX_N11
PEG_CTX_GRX_P11
PEG_CTX_GRX_P13
PEG_CTX_GRX_P12
PEG_CTX_GRX_P10
PEG_CTX_GRX_N15
CLK_REQ#
PEG_CRX_GTX_C_N0
PEG_CRX_GTX_C_P0
PEG_CRX_GTX_C_N1
PEG_CRX_GTX_C_P3
PEG_CRX_GTX_C_P1
PEG_CRX_GTX_C_N3
PEG_CRX_GTX_C_P2
PEG_CRX_GTX_C_P4
PEG_CRX_GTX_C_P7
PEG_CRX_GTX_C_P5
PEG_CRX_GTX_C_P6
PEG_CRX_GTX_C_N5
PEG_CRX_GTX_C_N2
PEG_CRX_GTX_C_P11
PEG_CRX_GTX_C_N8
PEG_CRX_GTX_C_N11
PEG_CRX_GTX_C_N9
PEG_CRX_GTX_C_P9
PEG_CRX_GTX_C_P8
PEG_CRX_GTX_C_N7
PEG_CRX_GTX_C_N6
PEG_CRX_GTX_C_N4
PEG_CRX_GTX_C_N12
PEG_CRX_GTX_C_N10
PEG_CRX_GTX_C_P12
PEG_CRX_GTX_C_P13
PEG_CRX_GTX_C_P15
PEG_CRX_GTX_C_P14
PEG_CRX_GTX_C_P10
PEG_CRX_GTX_C_N14
PEG_CRX_GTX_C_N13
PEG_CRX_GTX_C_N15
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT#
CLK_27M_OUT
GPU_CRT_RED
CLK_27M_IN
GPU_CRT_GRN
GPU_CRT_BLU
GPU_CRT_VSYNC
GPU_CRT_HSYNC
CLK_27M_OUT
CLK_27M_IN
XTALOUTBUFF
XTALSSIN
DACA_VREF
DACA_RSET
BIA_PWM_GPU
GPU_GPIO9
ENVDD_GPU
GPU_VID_3
GPU_VID_2
THERMTRIP_VGA#
PANEL_BKEN_DGPU
+CLK_PLLVDD
GPU_CRT_DAT_DDC_R
GPU_CRT_CLK_DDC_R
GPU_SMBCLK_R
GPU_SMBDAT_R
I2CB_SDA
I2CB_SCL
LDDC_CLK_GPU
LDDC_DATA_GPU
+DACA_VDD
GPU_VID_6
GPU_VID_5
GPU_VID_4
GPU_VID_1
DPC_GPU_HPD
FBVREF_ALTV
DPE_GPU_HPD
DPD_GPU_HPD
GPU_SMBCLK
GPU_SMBDATGPU_SMBDAT_R
GPU_SMBCLK_R
DGPU_PWR_EN
GPU_HOT#
GPU_HOT#
+3.3V_RUN_GFX
+3.3V_RUN_GFX
+3.3V_RUN+3.3V_RUN
+3.3V_RUN_GFX
+1.05V_PEX_VDD
+3.3V_RUN_GFX
PEG_CRX_GTX_N[0..15]<6>
PEG_CTX_GRX_N[0..15]<6>
PEG_CRX_GTX_P[0..15]<6>
PEG_CTX_GRX_P[0..15]<6>
DP_HDMI_HPD <40>
DGPU_HOLD_RST#<18>
PLTRST_GPU#<17>
CLK_PCIE_VGA<15> CLK_PCIE_VGA#<15>
GPU_CRT_RED <25>
GPU_CRT_HSYNC <25>
GPU_CRT_VSYNC <25>
GPU_CRT_BLU <25>
GPU_CRT_GRN <25>
GPU_VID_2 <64>
ENVDD_GPU <24>
GPU_VID_3 <64>
PANEL_BKEN_DGPU <24>
BIA_PWM_GPU <24>
GPU_CRT_DAT_DDC <25>
GPU_CRT_CLK_DDC <25>
LDDC_CLK_GPU <23>
LDDC_DATA_GPU <23>
GPU_VID_6 <64>
GPU_VID_5 <64>
GPU_VID_4 <64>
GPU_VID_1 <64>
THERMTRIP_VGA# <22>
DPC_GPU_HPD <39>
FBVREF_ALTV <51,52>
DPE_GPU_HPD <26>
DPD_GPU_HPD <39>
GPU_SMBCLK <41>
GPU_SMBDAT <41>
DGPU_PWR_EN <40,64>
GPU_HOT# <64>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
N12P PCIE,I2C,DAC,GPIO
45 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
N12P PCIE,I2C,DAC,GPIO
45 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
N12P PCIE,I2C,DAC,GPIO
45 66Friday, June 10, 2011
Compal Electronics, Inc.
Close to GPU
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
don't connect to PCH
DELL CONFIDENTIAL/PROPRIETARY
MAX14885EETL has internal 3K pu for
GPU_CRT_CLK_DDC and GPU_CRT_DAT_DDC
CV10 0.22U_0402_16V7K~DCV10 0.22U_0402_16V7K~D
12
RV28 2.2K_0402_5%~DRV28 2.2K_0402_5%~D
12
RV6 124_0402_1%~DRV6 124_0402_1%~D
1 2
CV86
0.1U_0402_10V7K~D
CV86
0.1U_0402_10V7K~D
1
2
CV31 0.22U_0402_16V7K~DCV31 0.22U_0402_16V7K~D
12
CV29 0.22U_0402_16V7K~DCV29 0.22U_0402_16V7K~D
12
CV16 0.22U_0402_16V7K~DCV16 0.22U_0402_16V7K~D
12
CV4 0.22U_0402_16V7K~DCV4 0.22U_0402_16V7K~D
12
DV2
RB751V-40GTE-17_SOD323-2~D
DV2
RB751V-40GTE-17_SOD323-2~D
2 1
CV21 0.22U_0402_16V7K~DCV21 0.22U_0402_16V7K~D
12
CV89
0.1U_0402_10V7K~D
CV89
0.1U_0402_10V7K~D
1
2
LV8
BLM18PG181SN1D_2P
LV8
BLM18PG181SN1D_2P
12
CV14 0.22U_0402_16V7K~DCV14 0.22U_0402_16V7K~D
12
CV3 0.22U_0402_16V7K~DCV3 0.22U_0402_16V7K~D
12
CV33 0.22U_0402_16V7K~DCV33 0.22U_0402_16V7K~D
12
RV24 4.7K_0402_5%~D@RV24 4.7K_0402_5%~D@1 2
CV22 0.22U_0402_16V7K~DCV22 0.22U_0402_16V7K~D
12
RV33
100K_0402_5%~D
RV33
100K_0402_5%~D
12
CV17 0.22U_0402_16V7K~DCV17 0.22U_0402_16V7K~D
12
CV85
0.1U_0402_10V7K~D
CV85
0.1U_0402_10V7K~D
1
2
RV18
0_0402_5%~D
RV18
0_0402_5%~D
1 2
RV26 0_0402_5%~DRV26 0_0402_5%~D
1 2
RV10
33_0402_5%~D
RV10
33_0402_5%~D
12
QV14B
DMN66D0LDW-7_SOT363-6~D
@QV14B
DMN66D0LDW-7_SOT363-6~D
@
3
5
4
CV24 0.22U_0402_16V7K~DCV24 0.22U_0402_16V7K~D
12
CV18 0.22U_0402_16V7K~DCV18 0.22U_0402_16V7K~D
12
CV27 0.22U_0402_16V7K~DCV27 0.22U_0402_16V7K~D
12
RV13 200_0402_1%~D@RV13 200_0402_1%~D@1 2
CV7 0.22U_0402_16V7K~DCV7 0.22U_0402_16V7K~D
12
CV15 0.22U_0402_16V7K~DCV15 0.22U_0402_16V7K~D
12
CV25 0.22U_0402_16V7K~DCV25 0.22U_0402_16V7K~D
12
QV14A
DMN66D0LDW-7_SOT363-6~D
@QV14A
DMN66D0LDW-7_SOT363-6~D
@
61
2
RV27 2.2K_0402_5%~DRV27 2.2K_0402_5%~D
12
CV5 0.22U_0402_16V7K~DCV5 0.22U_0402_16V7K~D
12
YV1
27MHZ_12PF_X1E000021042600~D
YV1
27MHZ_12PF_X1E000021042600~D
IN
1
GND
2
OUT 3
GND 4
CV87
0.1U_0402_10V7K~D
CV87
0.1U_0402_10V7K~D
1
2
CV88
0.1U_0402_10V7K~D
CV88
0.1U_0402_10V7K~D
1
2
CV32 0.22U_0402_16V7K~DCV32 0.22U_0402_16V7K~D
12
CV19 0.22U_0402_16V7K~DCV19 0.22U_0402_16V7K~D
12
RV4 150_0402_1%~DRV4 150_0402_1%~D
1 2
CV6 0.22U_0402_16V7K~DCV6 0.22U_0402_16V7K~D
12
RV29
2.2K_0402_5%~D
RV29
2.2K_0402_5%~D
12
DV3
RB751V-40GTE-17_SOD323-2~D
DV3
RB751V-40GTE-17_SOD323-2~D
2 1
CV30 0.22U_0402_16V7K~DCV30 0.22U_0402_16V7K~D
12
CV9 0.22U_0402_16V7K~DCV9 0.22U_0402_16V7K~D
12
PCI EXPRESS
CLK
Part 1 of 7
DACsI2C GPIO
UV1A
N13M_FCBGA908~D
PCI EXPRESS
CLK
Part 1 of 7
DACsI2C GPIO
UV1A
N13M_FCBGA908~D
PEX_RX0
AN12
PEX_RX0_N
AM12
PEX_RX1
AN14
PEX_RX1_N
AM14
PEX_RX2
AP14
PEX_RX2_N
AP15
PEX_RX3
AN15
PEX_RX3_N
AM15
PEX_RX4
AN17
PEX_RX4_N
AM17
PEX_RX5
AP17
PEX_RX5_N
AP18
PEX_RX6
AN18
PEX_RX6_N
AM18
PEX_RX7
AN20
PEX_RX7_N
AM20
PEX_RX8
AP20
PEX_RX8_N
AP21
PEX_RX9
AN21
PEX_RX9_N
AM21
PEX_RX10
AN23
PEX_RX10_N
AM23
PEX_RX11
AP23
PEX_RX11_N
AP24
PEX_RX12
AN24
PEX_RX12_N
AM24
PEX_RX13
AN26
PEX_RX13_N
AM26
PEX_RX14
AP26
PEX_RX14_N
AP27
PEX_RX15
AN27
PEX_RX15_N
AM27
PEX_TX0
AK14
PEX_TX0_N
AJ14
PEX_TX1
AH14
PEX_TX1_N
AG14
PEX_TX2
AK15
PEX_TX2_N
AJ15
PEX_TX3
AL16
PEX_TX3_N
AK16
PEX_TX4
AK17
PEX_TX4_N
AJ17
PEX_TX5
AH17
PEX_TX5_N
AG17
PEX_TX6
AK18
PEX_TX6_N
AJ18
PEX_TX7
AL19
PEX_TX7_N
AK19
PEX_TX8
AK20
PEX_TX8_N
AJ20
PEX_TX9
AH20
PEX_TX9_N
AG20
PEX_TX10
AK21
PEX_TX10_N
AJ21
PEX_TX11
AL22
PEX_TX11_N
AK22
PEX_TX12
AK23
PEX_TX12_N
AJ23
PEX_TX13
AH23
PEX_TX13_N
AG23
PEX_TX14
AK24
PEX_TX14_N
AJ24
PEX_TX15
AL25
PEX_TX15_N
AK25
PEX_REFCLK
AL13
PEX_REFCLK_N
AK13
PEX_RST_N
AJ12
XTAL_IN H3
XTAL_OUT H2
XTAL_OUTBUFF J4
XTAL_SSIN H1
GPIO0 P6
GPIO1 M3
GPIO2 L6
GPIO3 P5
GPIO4 P7
GPIO5 L7
GPIO6 M7
GPIO7 N8
GPIO8 M1
GPIO9 M2
GPIO10 L1
GPIO11 M5
GPIO12 N3
DACA_HSYNC AM9
DACA_VSYNC AN9
DACA_RED AK9
DACA_BLUE AL9
DACA_GREEN AL10
DACA_RSET AP8
DACA_VREF AP9
PEX_TSTCLK_OUT
AJ26
PEX_TSTCLK_OUT_N
AK26
I2CS_SDA T3
I2CA_SCL R4
I2CA_SDA R5
I2CB_SCL R7
I2CB_SDA R6
I2CC_SCL R2
I2CC_SDA R3
GPIO13 M4
GPIO14 N4
I2CS_SCL T4
GPIO15 P2
GPIO16 R8
GPIO17 M6
GPIO18 R1
GPIO19 P3
GPIO20 P4
GPIO21 P1
PEX_TERMP
AP29
PEX_CLKREQ_N
AK12
PLLVDD AD8
SP_PLLVDD AE8
VID_PLLVDD AD7
DACA_VDD AG10
PEX_WAKE_N AJ11
CV23 0.22U_0402_16V7K~DCV23 0.22U_0402_16V7K~D
12
DV4
RB751V-40GTE-17_SOD323-2~D
DV4
RB751V-40GTE-17_SOD323-2~D
2 1
CV20 0.22U_0402_16V7K~DCV20 0.22U_0402_16V7K~D
12
CV11 0.22U_0402_16V7K~DCV11 0.22U_0402_16V7K~D
12
CV107
1U_0603_10V7K~D
CV107
1U_0603_10V7K~D
12
RV15 2.49K_0402_1%~DRV15 2.49K_0402_1%~D
12
CV28 0.22U_0402_16V7K~DCV28 0.22U_0402_16V7K~D
12
RV3 150_0402_1%~DRV3 150_0402_1%~D
1 2
RV30 0_0402_5%~DRV30 0_0402_5%~D
1 2
CV112
4.7U_0603_6.3V6K~D
CV112
4.7U_0603_6.3V6K~D
1
2
RV102 10K_0402_5%~DRV102 10K_0402_5%~D
1 2
RV5 150_0402_1%~DRV5 150_0402_1%~D
1 2
RV1 100K_0402_5%~DRV1 100K_0402_5%~D
1 2
CV26 0.22U_0402_16V7K~DCV26 0.22U_0402_16V7K~D
12
CV2 0.22U_0402_16V7K~DCV2 0.22U_0402_16V7K~D
12
CV111
4.7U_0603_6.3V6K~D
CV111
4.7U_0603_6.3V6K~D
1
2
RV103 10K_0402_5%~DRV103 10K_0402_5%~D
1 2
RV16 10K_0402_5%~DRV16 10K_0402_5%~D
1 2
CV34
20P_0402_50V8J~D
CV34
20P_0402_50V8J~D
1
2
CV200
0.1U_0402_10V7K~D
CV200
0.1U_0402_10V7K~D
1
2
CV1 0.22U_0402_16V7K~DCV1 0.22U_0402_16V7K~D
12
CV202
0.1U_0402_10V7K~D
CV202
0.1U_0402_10V7K~D
1
2
RV14
33_0402_5%~D
RV14
33_0402_5%~D
12
RV21 10K_0402_5%~DRV21 10K_0402_5%~D
1 2
CV35
20P_0402_50V8J~D
CV35
20P_0402_50V8J~D
1
2
UV14
74AHC1G09GW_TSSOP5~D
UV14
74AHC1G09GW_TSSOP5~D
B
1
A
2
G
3
O4
P5
RV12 10K_0402_5%~DRV12 10K_0402_5%~D
1 2
CV13 0.01U_0402_16V7K~DCV13 0.01U_0402_16V7K~D
1 2
LV13
BLM18PG300SN1D_2P~D
LV13
BLM18PG300SN1D_2P~D
12
CV12 0.22U_0402_16V7K~DCV12 0.22U_0402_16V7K~D
12
CV8 0.22U_0402_16V7K~DCV8 0.22U_0402_16V7K~D
12
CV73
22U_0805_6.3V6M~D
CV73
22U_0805_6.3V6M~D
1
2
RV23 4.7K_0402_5%~D@RV23 4.7K_0402_5%~D@1 2
RV104 10K_0402_5%~DRV104 10K_0402_5%~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
TMDS_E_GPU_DDC
TMDS_E_GPU_DDC#
STRAP0
STRAP1
STRAP2
ROM_SI_GPU
ROM_SO_GPU
ROM_SCLK_GPU
STRAP1
STRAP0
STRAP2
ROM_SCLK_GPU
ROM_SI_GPU
ROM_SO_GPU
DPC_GPU_AUX/DDC
DPC_GPU_AUX#/DDC
DPD_GPU_AUX#/DDC
DPD_GPU_AUX/DDC
TMDS_E_GPU_DDC#
TMDS_E_GPU_DDC
DPC_GPU_AUX#/DDC
DPC_GPU_AUX/DDC
DPD_GPU_AUX/DDC
DPD_GPU_AUX#/DDC
STRAP3
STRAP4
GPU_JTAG_TDI
GPU_JTAG_TDO
GPU_JTAG_TMS
GPU_JTAG_TRST#
GPU_JTAG_TCK
GPU_TESTMODE
STRAP4
STRAP3
MULTI_STRAP_REF0_GND
+3.3V_RUN_GFX
+3.3V_RUN_GFX
+3.3V_RUN_GFX
+3.3V_RUN_GFX
DPC_GPU_LANE_N2<39>
DPC_GPU_LANE_P0<39>
DPC_GPU_LANE_P1<39>
DPC_GPU_LANE_P2<39>
DPC_GPU_LANE_N3<39>
DPC_GPU_LANE_N0<39>
DPC_GPU_LANE_N1<39>
DPC_GPU_LANE_P3<39>
TMDS_E_GPU_DDC<26>
DPD_GPU_LANE_N2<39>
DPD_GPU_LANE_P0<39>
DPD_GPU_LANE_P1<39>
DPD_GPU_LANE_P2<39>
DPD_GPU_LANE_N3<39>
DPD_GPU_LANE_N0<39>
DPD_GPU_LANE_N1<39>
DPD_GPU_LANE_P3<39>
TMDSE_GPU_N0<26>
TMDSE_GPU_P2<26>
TMDSE_GPU_P1<26>
TMDSE_GPU_P0<26>
TMDSE_GPU_CLK#<26>
TMDSE_GPU_N2<26>
TMDSE_GPU_N1<26>
TMDSE_GPU_CLK<26>
DPC_GPU_AUX/DDC<27> DPC_GPU_AUX#/DDC<27>
DPD_GPU_AUX/DDC<27> DPD_GPU_AUX#/DDC<27>
TMDS_E_GPU_DDC#<26>
LCD_BCLK-_GPU<23> LCD_B0+_GPU<23> LCD_B0-_GPU<23> LCD_B1+_GPU<23> LCD_B1-_GPU<23> LCD_B2+_GPU<23> LCD_B2-_GPU<23>
LCD_ACLK+_GPU<23> LCD_ACLK-_GPU<23> LCD_A0+_GPU<23> LCD_A0-_GPU<23> LCD_A1+_GPU<23> LCD_A1-_GPU<23> LCD_A2+_GPU<23> LCD_A2-_GPU<23>
LCD_BCLK+_GPU<23>
GPU_VDD_SENSE <64>
VGA_THERMDN <22>
VGA_THERMDP <22>
GPU_VSS_SENSE <64>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
N12P DP, STRAP, GND
46 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
N12P DP, STRAP, GND
46 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
N12P DP, STRAP, GND
46 66Friday, June 10, 2011
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Hynix 128Mx16 GDDR5 part stuff RV53=35K
Samsung 128Mx16 GDDR5 part stuff RV53=45K
TO DOCKING
TO MB HDMI
**
TO DOCKING
Decive ID change to 0x1056
???
DELL CONFIDENTIAL/PROPRIETARY
Use 16mils trace for sense pin
RV51
45.3K_0402_1%~D
@RV51
45.3K_0402_1%~D
@
1 2
RV11
10K_0402_5%~D
RV11
10K_0402_5%~D
1 2
RV36 100K_0402_5%~DRV36 100K_0402_5%~D
1 2
RV41
4.99K_0402_1%~D
@RV41
4.99K_0402_1%~D
@
1 2
RV53
34.8K_0402_1%~D
RV53
34.8K_0402_1%~D
1 2
RV57
34.8K_0402_1%~D
RV57
34.8K_0402_1%~D
1 2
RV8
10K_0402_5%~D
RV8
10K_0402_5%~D
12
RV37 100K_0402_5%~DRV37 100K_0402_5%~D
1 2
RV56
34.8K_0402_1%~D
RV56
34.8K_0402_1%~D
1 2
Part 4 of 7
LVDS/TMDS
NC
GENERAL
SERIAL
TEST
UV1D
N13M_FCBGA908~D
Part 4 of 7
LVDS/TMDS
NC
GENERAL
SERIAL
TEST
UV1D
N13M_FCBGA908~D
IFPA_TXC_N
AN6 IFPA_TXC
AM6 NC_0 P8
NC_1 AC6
NC_2 AJ28
NC_3 AJ4
NC_4 AJ5
NC_5 AL11
NC_6 C15
NC_7 D19
NC_8 D20
NC_9 D23
NC_10 D26
NC_11 H31
NC_12 T8
IFPA_TXD0
AP3
IFPA_TXD0_N
AN3
IFPA_TXD1
AN5
IFPA_TXD1_N
AM5
IFPA_TXD2
AL6
IFPA_TXD2_N
AK6
IFPA_TXD3
AJ6
IFPA_TXD3_N
AH6
IFPB_TXC
AJ9
IFPB_TXC_N
AH9
IFPB_TXD4
AP6
IFPB_TXD4_N
AP5
IFPB_TXD5
AM7
IFPB_TXD5_N
AL7
IFPB_TXD6
AN8
IFPB_TXD6_N
AM8
IFPB_TXD7
AK8
IFPB_TXD7_N
AL8
IFPC_L0
AK1
IFPC_L0_N
AJ1
IFPC_L1
AJ3
IFPC_L1_N
AJ2
IFPC_L2
AH3
IFPC_L2_N
AH4
IFPC_L3
AG5
IFPC_L3_N
AG4
IFPD_L0
AM1
IFPD_L0_N
AM2
IFPD_L1
AM3
IFPD_L1_N
AM4
NC_13 V32
IFPD_L2_N
AL4
IFPD_L3_N
AK5
IFPD_L2
AL3
IFPD_L3
AK4
IFPE_L0
AD2
IFPE_L0_N
AD3
IFPE_L1
AD1
IFPE_L1_N
AC1
IFPE_L2
AC2
IFPE_L2_N
AC3
IFPE_L3
AC4
IFPE_L3_N
AC5
IFPF_L0
AE3
IFPF_L0_N
AE4
IFPF_L1
AF4
IFPF_L1_N
AF5
IFPF_L2
AD4
IFPF_L2_N
AD5
IFPF_L3
AG1
IFPF_L3_N
AF1
STRAP0 J2
STRAP1 J7
STRAP2 J6
CEC L3
THERMDP K3
THERMDN K4
ROM_CS_N H6
ROM_SI H5
ROM_SO H7
ROM_SCLK H4
IFPF_AUX_I2CZ_SCL
AF3
IFPF_AUX_I2CZ_SDA_N
AF2
IFPE_AUX_I2CY_SCL
AB3
IFPE_AUX_I2CY_SDA_N
AB4
IFPD_AUX_I2CX_SCL
AK3
IFPD_AUX_I2CX_SDA_N
AK2
IFPC_AUX_I2CW_SCL
AG3
IFPC_AUX_I2CW_SDA_N
AG2
VDD_SENSE L4
GND_SENSE L5
BUFRST_N L2
MULTI_STRAP_REF0_GND J1
TESTMODE AK11
JTAG_TCK AM10
JTAG_TDI AM11
JTAG_TDO AP12
JTAG_TMS AP11
JTAG_TRST_N AN11
STRAP3 J5
STRAP4 J3
RV49
45.3K_0402_1%~D
RV49
45.3K_0402_1%~D
1 2
GND
Part 6 of 7
UV1F
N13M_FCBGA908~D
GND
Part 6 of 7
UV1F
N13M_FCBGA908~D
GND_0
AG11
GND_1
A2
GND_2
A33
GND_3
AA13
GND_4
AA15
GND_5
AA17
GND_6
AA18
GND_7
AA20
GND_8
AA22
GND_9
AB12
GND_10
AB14
GND_11
AB16
GND_12
AB19
GND_13
AB2
GND_14
AB21
GND_15
AB23
GND_16
AB28
GND_17
AB30
GND_18
AB32
GND_19
AB5
GND_20
AB7
GND_21
AC13
GND_22
AC15
GND_23
AC17
GND_24
AC18
GND_25
AC20
GND_26
AC22
GND_27
AE2
GND_28
AE28
GND_29
AE30
GND_30
AE32
GND_31
AE33
GND_32
AE5
GND_33
AE7
GND_34
AH10
GND_35
AH13
GND_36
AH16
GND_37
AH19
GND_38
AH2
GND_39
AH22
GND_40
AH24
GND_41
AH28
GND_42
AH29
GND_43
AH30
GND_44
AH32
GND_45
AH33
GND_46
AH5
GND_47
AH7
GND_48
AJ7
GND_49
AK10
GND_50
AK7
GND_51
AL12
GND_52
AL14
GND_53
AL15
GND_54
AL17
GND_55
AL18
GND_56
AL2
GND_57
AL20
GND_58
AL21
GND_59
AL23
GND_60
AL24
GND_61
AL26
GND_62
AL28
GND_63
AL30
GND_64
AL32
GND_65
AL33
GND_66
AL5
GND_67
AM13
GND_68
AM16
GND_69
AM19
GND_70
AM22
GND_71
AM25
GND_72
AN1
GND_73
AN10
GND_74
AN13
GND_75
AN16
GND_76
AN19
GND_77
AN22
GND_78
AN25
GND_79
AN30
GND_80
AN34
GND_81
AN4
GND_82
AN7
GND_83
AP2
GND_84
AP33
GND_85
B1
GND_86
B10
GND_87
B22
GND_88
B25
GND_89
B28
GND_90
B31
GND_102 D31
GND_103 D33
GND_104 E10
GND_105 E22
GND_106 E25
GND_107 E5
GND_108 E7
GND_109 F28
GND_110 F7
GND_111 G10
GND_112 G13
GND_113 G16
GND_114 G19
GND_115 G2
GND_116 G22
GND_117 G25
GND_118 G28
GND_119 G3
GND_120 G30
GND_121 G32
GND_122 G33
GND_123 G5
GND_124 G7
GND_125 K2
GND_126 K28
GND_127 K30
GND_128 K32
GND_129 K33
GND_130 K5
GND_131 K7
GND_132 M13
GND_133 M15
GND_134 M17
GND_135 M18
GND_136 M20
GND_137 M22
GND_138 N12
GND_139 N14
GND_140 N16
GND_141 N19
GND_142 N2
GND_143 N21
GND_144 N23
GND_145 N28
GND_146 N30
GND_147 N32
GND_148 N33
GND_149 N5
GND_150 N7
GND_151 P13
GND_152 P15
GND_153 P17
GND_154 P18
GND_155 P20
GND_156 P22
GND_157 R12
GND_158 R14
GND_159 R16
GND_160 R19
GND_161 R21
GND_162 R23
GND_163 T13
GND_164 T15
GND_165 T17
GND_166 T18
GND_167 T2
GND_168 T20
GND_169 T22
GND_170 T28
GND_171 T32
GND_172 T5
GND_173 T7
GND_174 U12
GND_175 U14
GND_176 U16
GND_177 U19
GND_178 U21
GND_179 U23
GND_180 V12
GND_91
B34
GND_92
B4
GND_93
B7
GND_94
C10
GND_95
C13
GND_96
C19
GND_101 D2
GND_181 V14
GND_182 V16
GND_183 V19
GND_184 V21
GND_185 V23
GND_186 W13
GND_187 W15
GND_188 W17
GND_189 W18
GND_190 W20
GND_191 W22
GND_192 W28
GND_97
C22
GND_98
C25
GND_99
C28
GND_100
C7
GND_193 Y12
GND_194 Y14
GND_195 Y16
GND_196 Y19
GND_197 Y21
GND_198 Y23
GND_199 AH11
GND_OPT C16
GND_OPT W32
RV35 100K_0402_5%~DRV35 100K_0402_5%~D
1 2
RV54
10K_0402_1%~D
RV54
10K_0402_1%~D
1 2
RV59
15K_0402_1%~D
@RV59
15K_0402_1%~D
@
1 2
RV50
34.8K_0402_1%~D
@RV50
34.8K_0402_1%~D
@
1 2
RV55
4.99K_0402_1%~D
@RV55
4.99K_0402_1%~D
@
1 2
RV9
1K_0402_1%~D
RV9
1K_0402_1%~D
1 2
TV2@TV2@
RV58
15K_0402_1%~D
@RV58
15K_0402_1%~D
@
1 2
RV97
34.8K_0402_1%~D
RV97
34.8K_0402_1%~D
1 2
RV38 100K_0402_5%~DRV38 100K_0402_5%~D
1 2
TV3@TV3@
RV60
10K_0402_1%~D
@RV60
10K_0402_1%~D
@
1 2
RV52
4.99K_0402_1%~D
RV52
4.99K_0402_1%~D
1 2
CV37
100P_0402_50V8J~D
@CV37
100P_0402_50V8J~D
@
1
2
TV4@TV4@
RV93 40.2K_0402_1%~DRV93 40.2K_0402_1%~D
1 2
RV25
10K_0402_5%~D
RV25
10K_0402_5%~D
12
RV20
10K_0402_5%~D
@
RV20
10K_0402_5%~D
@
12
RV39 1.5K_0402_5%~DRV39 1.5K_0402_5%~D
1 2
RV99
20K_0402_1%~D
RV99
20K_0402_1%~D
1 2
RV40 1.5K_0402_5%~DRV40 1.5K_0402_5%~D
1 2
RV98
10K_0402_1%~D
@RV98
10K_0402_1%~D
@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+IFPAB_PLLVDD
+IFPAB_IOVDD
+IFPEF_PLLVDD
+IFPAB_PLLVDD
+IFPAB_IOVDD
IFPAB_RSET
IFPC_RSET
IFPD_RSET
IFPEF_RSET
+IFPEF_IOVDD
+IFPEF_IOVDD
+IFPCD_PLLVDD
+IFPCD_IOVDD
+3.3V_RUN_VDD33
+3.3V_RUN_VDD33
IFPD_RSET
IFPEF_RSET
IFPC_RSET
IFPAB_RSET
+IFPCD_PLLVDD
+IFPEF_PLLVDD
+IFPCD_IOVDD
+1.05V_PEX_VDD
+1.05V_PEX_VDD
+1.8V_RUN_GFX
+3.3V_RUN_GFX
+1.5V_MEM_GFX
+1.05V_PEX_VDD
+1.05V_PEX_VDD
+1.05V_PEX_VDD
+1.5V_MEM_GFX
+1.5V_MEM_GFX
+1.05V_PEX_VDD
+3.3V_RUN_GFX
+3.3V_RUN_GFX
+3.3V_RUN_GFX
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
N12P Power
47 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
N12P Power
47 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
N12P Power
47 66Friday, June 10, 2011
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
Close to Pinclose to the GPU
A/B
C/D
E/F
PLACE UNDER BGA PLACE NEAR GPU
Near GPU Near Ball
DELL CONFIDENTIAL/PROPRIETARY
CV98
0.1U_0402_10V7K~D
CV98
0.1U_0402_10V7K~D
1
2
CV173
1U_0402_6.3V6K~D
CV173
1U_0402_6.3V6K~D
1
2
RV42 40.2_0402_1%~DRV42 40.2_0402_1%~D
1 2
CV71
22U_0805_6.3V6M~D
CV71
22U_0805_6.3V6M~D
1
2
CV105
0.1U_0402_10V7K~D
CV105
0.1U_0402_10V7K~D
1
2
RV45
1K_0402_1%~D
RV45
1K_0402_1%~D
1 2
CV125
1U_0402_6.3V6K~D
CV125
1U_0402_6.3V6K~D
1
2
CV172
1U_0402_6.3V6K~D
CV172
1U_0402_6.3V6K~D
1
2
CV96
1U_0603_10V7K~D
CV96
1U_0603_10V7K~D
12
RV32
1K_0402_1%~D
@RV32
1K_0402_1%~D
@
1 2
RV125 100_0402_1%~DRV125 100_0402_1%~D
1 2
CV64
0.1U_0402_10V7K~D
CV64
0.1U_0402_10V7K~D
1
2
LV11
BLM18PG181SN1D_2P
LV11
BLM18PG181SN1D_2P
1 2
CV215
0.1U_0402_10V7K~D
CV215
0.1U_0402_10V7K~D
1
2
LV12
BLM18PG221SN1D_2P~D
LV12
BLM18PG221SN1D_2P~D
1 2
CV195
1U_0402_6.3V6K~D
CV195
1U_0402_6.3V6K~D
1
2
CV108
4.7U_0603_6.3V6K~D
CV108
4.7U_0603_6.3V6K~D
1
2
CV94
4.7U_0603_6.3V6K~D
CV94
4.7U_0603_6.3V6K~D
1
2
CV160
0.1U_0402_10V7K~D
@
CV160
0.1U_0402_10V7K~D
@
1
2
RV43 60.4_0402_1%~DRV43 60.4_0402_1%~D
1 2
CV95
4.7U_0603_6.3V6K~D
CV95
4.7U_0603_6.3V6K~D
1
2
CV54
10U_0603_6.3V6M~D
CV54
10U_0603_6.3V6M~D
1
2
CV118
1U_0402_6.3V6K~D
CV118
1U_0402_6.3V6K~D
1
2
RV7 0_0603_5%~DRV7 0_0603_5%~D
1 2
CV40
10U_0603_6.3V6M~D
CV40
10U_0603_6.3V6M~D
1
2
CV77
22U_0805_6.3V6M~D
CV77
22U_0805_6.3V6M~D
1
2
CV116
0.1U_0402_10V7K~D
CV116
0.1U_0402_10V7K~D
1
2
LV10
BLM18AG121SN1D_0603~D
LV10
BLM18AG121SN1D_0603~D
1 2
CV169
1U_0402_6.3V6K~D
CV169
1U_0402_6.3V6K~D
1
2
CV214
1U_0402_6.3V6K~D
CV214
1U_0402_6.3V6K~D
1
2
CV101
0.1U_0402_10V7K~D
CV101
0.1U_0402_10V7K~D
1
2
CV175
4.7U_0603_6.3V6K~D
CV175
4.7U_0603_6.3V6K~D
1
2
CV104
0.1U_0402_10V7K~D
CV104
0.1U_0402_10V7K~D
1
2
CV168
1U_0603_10V7K~D
CV168
1U_0603_10V7K~D
12
CV197
0.1U_0402_10V7K~D
CV197
0.1U_0402_10V7K~D
1
2
CV52
10U_0603_6.3V6M~D
CV52
10U_0603_6.3V6M~D
1
2
LV9
BLM18PG221SN1D_2P~D
LV9
BLM18PG221SN1D_2P~D
1 2
CV123
4.7U_0603_6.3V6K~D
CV123
4.7U_0603_6.3V6K~D
1
2
CV204
1U_0402_6.3V6K~D
CV204
1U_0402_6.3V6K~D
1
2
CV174
0.1U_0402_10V7K~D
CV174
0.1U_0402_10V7K~D
1
2
CV75
1U_0402_6.3V6K~D
CV75
1U_0402_6.3V6K~D
1
2
CV161
0.1U_0402_10V7K~D
CV161
0.1U_0402_10V7K~D
1
2
CV76
0.1U_0402_10V7K~D
CV76
0.1U_0402_10V7K~D
1
2
CV170
4.7U_0603_6.3V6K~D
CV170
4.7U_0603_6.3V6K~D
1
2
Part 5 of 7
POWER
UV1E
N13M_FCBGA908~D
Part 5 of 7
POWER
UV1E
N13M_FCBGA908~D
PEX_IOVDDQ_0 AG13
PEX_IOVDDQ_1 AG15
PEX_IOVDDQ_2 AG16
PEX_IOVDDQ_3 AG18
PEX_IOVDDQ_4 AG25
PEX_IOVDDQ_5 AH15
PEX_IOVDDQ_6 AH18
PEX_IOVDDQ_7 AH26
PEX_IOVDDQ_8 AH27
PEX_IOVDDQ_9 AJ27
PEX_IOVDDQ_10 AK27
PEX_IOVDDQ_11 AL27
PEX_IOVDDQ_12 AM28
PEX_IOVDDQ_13 AN28
IFPA_IOVDD
AG8
IFPB_IOVDD
AG9
IFPC_IOVDD
AF6
IFPD_IOVDD
AG6
IFPE_IOVDD
AC7
IFPAB_PLLVDD
AH8
IFPC_PLLVDD
AF7
IFPEF_PLLVDD
AB8
IFPD_PLLVDD
AG7
FBVDDQ_0
AA27
FBVDDQ_1
AA30
FBVDDQ_2
AB27
FBVDDQ_3
AB33
FBVDDQ_4
AC27
FBVDDQ_5
AD27
FBVDDQ_7
AF27
FBVDDQ_8
AG27
FBVDDQ_9
B13
FBVDDQ_10
B16
FBVDDQ_11
B19
FBVDDQ_12
E13
FBVDDQ_13
E16
FBVDDQ_14
E19
FBVDDQ_15
H10
FBVDDQ_16
H11
FBVDDQ_17
H12
FBVDDQ_18
H13
FBVDDQ_19
H14
FBVDDQ_20
H15
FBVDDQ_21
H16
FBVDDQ_22
H18
FBVDDQ_23
H19
FBVDDQ_24
H20
FBVDDQ_25
H21
FBVDDQ_26
H22
FBVDDQ_27
H23
FBVDDQ_28
H24
PEX_IOVDD_0 AG19
PEX_IOVDD_1 AG21
PEX_IOVDD_2 AG22
PEX_IOVDD_3 AG24
PEX_IOVDD_4 AH21
FBVDDQ_29
H8
FBVDDQ_30
H9
FBVDDQ_31
L27
FBVDDQ_32
M27
FBVDDQ_33
N27
FBVDDQ_34
P27
FBVDDQ_35
R27
FBVDDQ_36
T27
FBVDDQ_37
T30
PEX_SVDD_3V3 AG12
VDD33_0 J8
VDD33_1 K8
VDD33_2 L8
VDD33_3 M8
PEX_PLLVDD AG26
IFPAB_RSET
AJ8
IFPC_RSET
AF8
IFPD_RSET
AN2
IFPEF_RSET
AD6
FBVDDQ_38
T33
FBVDDQ_39
V27
FBVDDQ_40
W27
FBVDDQ_41
W30
FBVDDQ_42
W33
FBVDDQ_43
Y27
FBVDDQ_6
AE27
IFPF_IOVDD
AC8
PEX_IOVDD_5 AH25
FB_CAL_PD_VDDQ J27
FB_CAL_PU_GND H27
FB_CAL_TERM_GND H25
FB_GND_SENSE F2
FB_VDDQ_SENSE F1
PEX_PLL_HVDD AH12
CV56
4.7U_0603_6.3V6K~D
CV56
4.7U_0603_6.3V6K~D
1
2
CV121
0.1U_0402_10V7K~D
CV121
0.1U_0402_10V7K~D
1
2
CV69
0.1U_0402_10V7K~D
CV69
0.1U_0402_10V7K~D
1
2
CV183
1U_0603_10V7K~D
CV183
1U_0603_10V7K~D
12
CV110
4.7U_0603_6.3V6K~D
CV110
4.7U_0603_6.3V6K~D
1
2
CV65
4.7U_0603_6.3V6K~D
CV65
4.7U_0603_6.3V6K~D
1
2
RV47
1K_0402_1%~D
RV47
1K_0402_1%~D
1 2
CV55
4.7U_0603_6.3V6K~D
@
CV55
4.7U_0603_6.3V6K~D
@
1
2
CV167
0.1U_0402_10V7K~D
CV167
0.1U_0402_10V7K~D
1
2
CV211
1U_0402_6.3V6K~D
CV211
1U_0402_6.3V6K~D
1
2
CV48
4.7U_0603_6.3V6K~D
CV48
4.7U_0603_6.3V6K~D
1
2
RV48
1K_0402_1%~D
RV48
1K_0402_1%~D
1 2
CV109
4.7U_0603_6.3V6K~D
CV109
4.7U_0603_6.3V6K~D
1
2
CV166
0.1U_0402_10V7K~D
CV166
0.1U_0402_10V7K~D
1
2
CV212
1U_0402_6.3V6K~D
CV212
1U_0402_6.3V6K~D
1
2
CV67
22U_0805_6.3V6M~D
CV67
22U_0805_6.3V6M~D
1
2
CV47
4.7U_0603_6.3V6K~D
CV47
4.7U_0603_6.3V6K~D
1
2
CV119
4.7U_0603_6.3V6K~D
CV119
4.7U_0603_6.3V6K~D
1
2
CV184
0.1U_0402_10V7K~D
CV184
0.1U_0402_10V7K~D
1
2
CV79
22U_0805_6.3V6M~D
CV79
22U_0805_6.3V6M~D
1
2
CV78
22U_0805_6.3V6M~D
CV78
22U_0805_6.3V6M~D
1
2
CV213
1U_0402_6.3V6K~D
CV213
1U_0402_6.3V6K~D
1
2
LV14
BLM18AG121SN1D_0603~D
LV14
BLM18AG121SN1D_0603~D
12
CV99
4.7U_0603_6.3V6K~D
CV99
4.7U_0603_6.3V6K~D
1
2
CV194
0.1U_0402_10V7K~D
CV194
0.1U_0402_10V7K~D
1
2
LV15
MMZ1608R301AT_2P~D
LV15
MMZ1608R301AT_2P~D
1 2
CV63
0.1U_0402_10V7K~D
CV63
0.1U_0402_10V7K~D
1
2
CV126
1U_0402_6.3V6K~D
@
CV126
1U_0402_6.3V6K~D
@
1
2
CV53
10U_0603_6.3V6M~D
CV53
10U_0603_6.3V6M~D
1
2
CV68
0.1U_0402_10V7K~D
CV68
0.1U_0402_10V7K~D
1
2
CV74
22U_0805_6.3V6M~D
CV74
22U_0805_6.3V6M~D
1
2
CV102
4.7U_0603_6.3V6K~D
CV102
4.7U_0603_6.3V6K~D
1
2
CV70
4.7U_0603_6.3V6K~D
CV70
4.7U_0603_6.3V6K~D
1
2
CV193
0.1U_0402_10V7K~D
CV193
0.1U_0402_10V7K~D
1
2
CV206
0.1U_0402_10V7K~D
CV206
0.1U_0402_10V7K~D
1
2
CV97
0.1U_0402_10V7K~D
CV97
0.1U_0402_10V7K~D
1
2
CV122
0.1U_0402_10V7K~D
CV122
0.1U_0402_10V7K~D
1
2
CV51
10U_0603_6.3V6M~D
CV51
10U_0603_6.3V6M~D
1
2
CV198
1U_0402_6.3V6K~D
CV198
1U_0402_6.3V6K~D
1
2
CV127
1U_0402_6.3V6K~D
CV127
1U_0402_6.3V6K~D
1
2
CV103
1U_0603_10V7K~D
CV103
1U_0603_10V7K~D
12
CV115
0.1U_0402_10V7K~D
CV115
0.1U_0402_10V7K~D
1
2
RV44 40.2_0402_1%~DRV44 40.2_0402_1%~D
1 2
CV106
4.7U_0603_6.3V6K~D
CV106
4.7U_0603_6.3V6K~D
1
2
CV39
10U_0603_6.3V6M~D
CV39
10U_0603_6.3V6M~D
1
2
LV6
MMZ1608R301AT_2P~D
LV6
MMZ1608R301AT_2P~D
1 2
CV120
1U_0402_6.3V6K~D
CV120
1U_0402_6.3V6K~D
1
2
CV205
1U_0402_6.3V6K~D
CV205
1U_0402_6.3V6K~D
1
2
CV100
0.1U_0402_10V7K~D
CV100
0.1U_0402_10V7K~D
1
2
RV126 100_0402_1%~DRV126 100_0402_1%~D
1 2
CV124
1U_0402_6.3V6K~D
CV124
1U_0402_6.3V6K~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+GPU_CORE +GPU_CORE
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
N12P Power GFX Core
48 66Friday, May 20, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
N12P Power GFX Core
48 66Friday, May 20, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
N12P Power GFX Core
48 66Friday, May 20, 2011
Compal Electronics, Inc.
Caps on Power Side
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
POWER
Part 7 of 7
UV1G
N13M_FCBGA908~D
POWER
Part 7 of 7
UV1G
N13M_FCBGA908~D
VDD_0
AA12
VDD_1
AA14
VDD_2
AA16
VDD_3
AA19
VDD_4
AA21
VDD_5
AA23
VDD_6
AB13
VDD_7
AB15
VDD_8
AB17
VDD_9
AB18
VDD_10
AB20
VDD_11
AB22
VDD_12
AC12
VDD_13
AC14
VDD_14
AC16
VDD_15
AC19
VDD_16
AC21
VDD_17
AC23
VDD_18
M12
VDD_19
M14
VDD_20
M16
VDD_21
M19
VDD_22
M21
VDD_23
M23
VDD_24
N13
VDD_25
N15
VDD_26
N17
VDD_27
N18
VDD_28
N20
VDD_29
N22
VDD_30
P12
VDD_31
P14
VDD_32
P16
VDD_33
P19
VDD_34
P21
VDD_35
P23
VDD_36
R13
VDD_37
R15
VDD_38
R17
VDD_39
R18
VDD_40
R20
VDD_41
R22
VDD_42
T12
VDD_43
T14
VDD_44
T16
VDD_45
T19
VDD_46
T21
VDD_47
T23
VDD_48
U13
VDD_49
U15
VDD_50
U17
VDD_51
U18
VDD_52
U20
VDD_53
U22
VDD_54
V13
VDD_55
V15
XVDD_8 U8
XVDD_9 V1
XVDD_10 V2
XVDD_11 V3
XVDD_12 V4
XVDD_13 V5
XVDD_14 V6
XVDD_15 V7
XVDD_16 V8
XVDD_17 W2
XVDD_18 W3
XVDD_19 W4
XVDD_20 W5
XVDD_21 W7
XVDD_22 W8
XVDD_23 Y1
XVDD_24 Y2
XVDD_25 Y3
XVDD_26 Y4
XVDD_27 Y5
XVDD_28 Y6
XVDD_29 Y7
XVDD_30 Y8
XVDD_31 AA1
XVDD_32 AA2
XVDD_33 AA3
XVDD_34 AA4
XVDD_35 AA5
XVDD_36 AA6
XVDD_37 AA7
VDD_58 V20
VDD_59 V22
VDD_60 W12
VDD_61 W14
VDD_62 W16
VDD_63 W19
VDD_64 W21
VDD_65 W23
VDD_66 Y13
VDD_67 Y15
VDD_68 Y17
VDD_69 Y18
VDD_70 Y20
VDD_71 Y22
XVDD_1 U1
XVDD_2 U2
XVDD_3 U3
XVDD_4 U4
XVDD_5 U5
XVDD_6 U6
XVDD_7 U7
VDD_56 V17
VDD_57 V18
XVDD_38 AA8
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FBA_CMD21
FBA_CMD30
FBA_CMD[0..31]
FBA_EDC[0..7]
FBA_DBI[0..7]
FBA_D[0..63]
+FB_VREF
FBA_DBI4
FBA_DBI7
FBA_EDC5
FBA_EDC1
FBA_EDC2
FBA_D22
FBA_D21
FBA_D20
FBA_D6
FBA_D7
FBA_D9
FBA_D8
FBA_D12
FBA_D4
FBA_D14
FBA_D13
FBA_D15
FBA_D11
FBA_D10
FBA_D5
FBA_D29
FBA_D28
FBA_D17
FBA_D25
FBA_D16
FBA_D36
FBA_D24
FBA_D27
FBA_D31
FBA_D23
FBA_D19
FBA_D30
FBA_D18
FBA_D26
FBA_D52
FBA_D38
FBA_D39
FBA_D43
FBA_D35
FBA_D46
FBA_D37
FBA_D42
FBA_D34
FBA_D45
FBA_D41
FBA_D33
FBA_D40
FBA_D44
FBA_D32
FBA_D63
FBA_D53
FBA_D59
FBA_D62
FBA_D58
FBA_D49
FBA_D61
FBA_D57
FBA_D51
FBA_D60
FBA_D56
FBA_D54
FBA_D50
FBA_D48
FBA_D55
FBA_D0
FBA_D2
FBA_D1
FBA_D3
FBA_D47
FBA_CMD13
FBA_CMD29 3.3V_RUN_GFX_ON#
1.05V_RUN_VTT_GFX#_EN 1.05V_RUN_VTT_GFX#_EN_R
FBA_CMD18
FBA_EDC4
FBA_DBI6
FBA_CMD10
FBA_CMD8
FBA_CMD14
FBA_CMD26
FBA_CMD24
FBA_CMD0
FBA_EDC0
FBA_CMD5
FBA_CMD17
FBA_EDC3
FBA_DBI5
FBA_DBI3
FBA_CMD20
FBA_CMD13
FBA_CMD23
FBA_CMD29
FBA_CMD4
FBA_CMD16
FBA_DBI2
FBA_CMD12
FBA_CMD22
FBA_CMD28
FBA_CMD3
FBA_EDC7
FBA_DBI1
FBA_CMD19
FBA_EDC6
FBA_CMD11
FBA_CMD9
+FB_VREF
FBA_CMD15
FBA_CMD27
FBA_CMD25
FBA_CMD7
FBA_CMD2
FBA_CMD1
FBA_DBI0
FBA_CMD6
FBA_CMD31
+FBA_PLL_AVDD
+FBA_PLL_AVDD
FBA_CMD30
FBA_CMD14
+FBA_PLL_AVDD
FBA_WCK67#
FBA_WCK67
FBA_WCK45#
FBA_WCK01#
FBA_WCK23
FBA_WCK45
FBA_WCK01
FBA_WCK23#
3.3V_RUN_GFX_EN
GFX_MEM_VTT_ON#
1.05V_RUN_VTT_GFX#_EN
+1.8V_RUN_GFX_CHG
+1.5V_MEM_GFX_CHG
+1.05V_PEX_VDD_CHG
3.3V_RUN_GFX_ON#
+3.3V_RUN_GFX_CHG
GFX_MEM_VTT_ON#
GFX_MEM_VTT_EN
+1.5V_MEM_GFX
+PWR_SRC_S
+3.3V_ALW2 +3.3V_ALW +3.3V_RUN_GFX
+1.8V_RUN +1.8V_RUN_GFX
+1.05V_PEX_VDD
+1.5V_MEM_GFX
+FBA_PLL_AVDD
+1.5V_MEM_GFX
+1.5V_MEM_GFX
+3.3V_ALW2 +1.5V_MEM +1.5V_MEM_GFX
+1.05V_M +1.05V_PEX_VDD
+PWR_SRC_S
+PWR_SRC_S
+1.8V_RUN_GFX +1.5V_MEM_GFX +1.05V_PEX_VDD +3.3V_RUN_GFX
CLKA0 <51>
CLKA0# <51>
CLKA1 <52>
CLKA1# <52>
FBA_D[0..63] <51,52>
FBA_DBI[0..7] <51,52>
FBA_EDC[0..7] <51,52>
FBA_CMD[0..31] <51,52>
3.3V_RUN_GFX_ON<15,40>
FBA_WCK01 <51>
FBA_WCK01# <51>
FBA_WCK23 <51>
FBA_WCK23# <51>
FBA_WCK45 <52>
FBA_WCK45# <52>
FBA_WCK67 <52>
FBA_WCK67# <52>
GFX_MEM_VTT_ON<40>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
N12P Memory
49 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
N12P Memory
49 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
N12P Memory
49 66Friday, June 10, 2011
Compal Electronics, Inc.
16mil
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
+3.3V_RUN_GFX Source
+1.8V_RUN_GFX Source
CKE_H
RST_H*
CKE_L
for Test/Debug
RST_L*
GDDR5 CMD Mapping Table
<0..31> <32..63> Memory
CMD12 CMD28 RAS#
CMD15 CMD31 CAS#
CMD5 CMD21 WE#
CMD0 CMD16 CS#
CMD8 CMD24 ABI#
CMD10 CMD26 A0_A10
CMD11 CMD27 A1_A9
CMD2 CMD18 A2_BA0
CMD1 CMD17 A3_BA3
CMD3 CMD19 A4_BA2
CMD4 CMD20 A5_BA1
CMD7 CMD23 A6_A11
CMD6 CMD22 A7_A8
CMD9 CMD25 A12_FRU
CMD14 CMD30 CKE#
CMD13 CMD29 RESET#
DELL CONFIDENTIAL/PROPRIETARY
+1.5V_MEM_GFX Source
+1.05V_RUN_VTT_GFX Source
CV81
0.1U_0402_10V7K~D
CV81
0.1U_0402_10V7K~D
1
2
CV135
1U_0402_6.3V6K~D
CV135
1U_0402_6.3V6K~D
1
2
RV92
100K_0402_5%~D
RV92
100K_0402_5%~D
12
QV1
SI4164DY-T1-GE3_SO8~D
QV1
SI4164DY-T1-GE3_SO8~D
36
5
7
82
4
1
RV66
10K_0402_5%~D
RV66
10K_0402_5%~D
12
RV72
10K_0402_5%~D
RV72
10K_0402_5%~D
12
RV69
100K_0402_5%~D
RV69
100K_0402_5%~D
12
RV96
20K_0402_5%~D
RV96
20K_0402_5%~D
12
RV71
10K_0402_5%~D
RV71
10K_0402_5%~D
12
LV7
BLM18PG300SN1D_2P~D
LV7
BLM18PG300SN1D_2P~D
1 2
RV94
1M_0402_5%~D
RV94
1M_0402_5%~D
12
CV132
2200P_0402_50V7K~D
CV132
2200P_0402_50V7K~D
1
2
CV82
0.1U_0402_10V7K~D
CV82
0.1U_0402_10V7K~D
1
2
RV128
39_0402_5%~D
RV128
39_0402_5%~D
12
RV129
39_0402_5%~D
RV129
39_0402_5%~D
12
QV6A
DMN66D0LDW-7_SOT363-6~D
QV6A
DMN66D0LDW-7_SOT363-6~D
61
2
G
D
S
QV4
SSM3K7002FU_SC70-3~D
G
D
S
QV4
SSM3K7002FU_SC70-3~D
2
13
G
D
S
QV11
SSM3K7002FU_SC70-3~D
G
D
S
QV11
SSM3K7002FU_SC70-3~D
2
13
RV91
100K_0402_5%~D
RV91
100K_0402_5%~D
12
G
D
S
QV12
SSM3K7002FU_SC70-3~D
G
D
S
QV12
SSM3K7002FU_SC70-3~D
2
13
RV80
470K_0402_5%~D
RV80
470K_0402_5%~D
12
RV67
100K_0402_5%~D
RV67
100K_0402_5%~D
12
RV74
20K_0402_5%~D
RV74
20K_0402_5%~D
12
RV61
60.4_0402_1%~D
RV61
60.4_0402_1%~D
12
RV77
1.1K_0402_1%~D
@RV77
1.1K_0402_1%~D
@
12
RV73
100K_0402_5%~D
RV73
100K_0402_5%~D
12
CV50
10U_0603_6.3V6M~D
CV50
10U_0603_6.3V6M~D
1
2
RV46
60.4_0402_1%~D
RV46
60.4_0402_1%~D
12
RV90
20K_0402_5%~D
RV90
20K_0402_5%~D
12
QV2B
DMN66D0LDW-7_SOT363-6~D
QV2B
DMN66D0LDW-7_SOT363-6~D
3
5
4
MEMORY INTERFACE
A
Part 2 of 7
THE FBA_ECKBxx ARE
USED ON GK107. NC
ON GF108 AND GF117
UV1B
N13M_FCBGA908~D
MEMORY INTERFACE
A
Part 2 of 7
THE FBA_ECKBxx ARE
USED ON GK107. NC
ON GF108 AND GF117
UV1B
N13M_FCBGA908~D
FBA_D00
L28
FBA_D01
M29
FBA_D02
L29
FBA_D03
M28
FBA_D04
N31
FBA_D05
P29
FBA_D06
R29
FBA_D07
P28
FBA_D08
J28
FBA_D09
H29
FBA_D10
J29
FBA_D11
H28
FBA_D12
G29
FBA_D13
E31
FBA_D14
E32
FBA_D15
F30
FBA_D16
C34
FBA_D17
D32
FBA_D18
B33
FBA_D19
C33
FBA_D20
F33
FBA_D21
F32
FBA_D22
H33
FBA_D23
H32
FBA_D24
P34
FBA_D25
P32
FBA_D26
P31
FBA_D27
P33
FBA_D28
L31
FBA_D29
L34
FBA_D30
L32
FBA_D31
L33
FBA_D32
AG28
FBA_D33
AF29
FBA_D34
AG29
FBA_D35
AF28
FBA_D36
AD30
FBA_D37
AD29
FBA_D38
AC29
FBA_D39
AD28
FBA_D40
AJ29
FBA_D41
AK29
FBA_D42
AJ30
FBA_D43
AK28
FBA_D44
AM29
FBA_D45
AM31
FBA_D46
AN29
FBA_D47
AM30
FBA_D48
AN31
FBA_D49
AN32
FBA_D50
AP30
FBA_D51
AP32
FBA_D52
AM33
FBA_D53
AL31
FBA_D54
AK33
FBA_D55
AK32
FBA_D56
AD34
FBA_D57
AD32
FBA_D58
AC30
FBA_D59
AD33
FBA_D60
AF31
FBA_D61
AG34
FBA_D62
AG32
FBA_D63
AG33
FBA_CMD0 U30
FBA_CMD1 T31
FBA_CMD2 U29
FBA_CMD3 R34
FBA_CMD4 R33
FBA_CMD5 U32
FBA_CMD6 U33
FBA_CMD7 U28
FBA_CMD8 V28
FBA_CMD9 V29
FBA_CMD10 V30
FBA_CMD11 U34
FBA_CMD12 U31
FBA_CMD13 V34
FBA_CMD14 V33
FBA_CMD15 Y32
FBA_CMD16 AA31
FBA_CMD17 AA29
FBA_CMD18 AA28
FBA_CMD19 AC34
FBA_CMD20 AC33
FBA_CMD21 AA32
FBA_CMD22 AA33
FBA_CMD23 Y28
FBA_CMD24 Y29
FBA_CMD25 W31
FBA_CMD26 Y30
FBA_DQM0 P30
FBA_DQM1 F31
FBA_DQM2 F34
FBA_DQM3 M32
FBA_DQM4 AD31
FBA_DQM5 AL29
FBA_DQM6 AM32
FBA_DQM7 AF34
FBA_DQS_RN0 M30
FBA_DQS_RN1 H30
FBA_DQS_RN2 E34
FBA_DQS_RN3 M34
FBA_DQS_RN4 AF30
FBA_DQS_RN5 AK31
FBA_DQS_RN6 AM34
FBA_DQS_RN7 AF32
FBA_DQS_WP0 M31
FBA_DQS_WP1 G31
FBA_DQS_WP2 E33
FBA_DQS_WP3 M33
FBA_DQS_WP4 AE31
FBA_DQS_WP5 AK30
FBA_DQS_WP6 AN33
FBA_DQS_WP7 AF33
FBA_CLK0 R30
FBA_CLK0_N R31
FBA_CLK1 AB31
FBA_CLK1_N AC31
FBA_CMD27 AA34
FBA_CMD28 Y31
FBA_CMD29 Y34
FBA_CMD30 Y33
FBA_PLL_AVDD
U27
FB_VREF
H26
FBA_DEBUG0
R28
FBA_CMD31 V31
FBA_DEBUG1
AC28
FBA_WCK01 K31
FBA_WCK01_N L30
FBA_WCK23 H34
FBA_WCK23_N J34
FBA_WCK45 AG30
FBA_WCK45_N AG31
FBA_WCK67 AJ34
FBA_WCK67_N AK34
FBA_CMD_RFU0 R32
FBA_CMD_RFU1 AC32
FBA_WCKB01 J30
FBA_WCKB01_N J31
FBA_WCKB23 J32
FBA_WCKB23_N J33
FBA_WCKB45 AH31
FBA_WCKB45_N AJ31
FBA_WCKB67 AJ32
FBA_WCKB67_N AJ33
FB_CLAMP
E1
FB_DLL_AVDD
K27
CV129
2200P_0402_50V7K~D
CV129
2200P_0402_50V7K~D
1
2
RV127
39_0402_5%~D
RV127
39_0402_5%~D
12
RV68
10K_0402_5%~D
RV68
10K_0402_5%~D
12
CV49
10U_0603_6.3V6M~D
CV49
10U_0603_6.3V6M~D
1
2
QV3
SI4164DY-T1-GE3_SO8~D
QV3
SI4164DY-T1-GE3_SO8~D
36
5
7
82
4
1
CV199
1U_0402_6.3V6K~D
CV199
1U_0402_6.3V6K~D
1
2
RV81
470K_0402_5%~D
RV81
470K_0402_5%~D
12
QV2A
DMN66D0LDW-7_SOT363-6~D
QV2A
DMN66D0LDW-7_SOT363-6~D
61
2
CV46
10U_0603_6.3V6M~D
CV46
10U_0603_6.3V6M~D
1
2
CV72
22U_0805_6.3V6M~D
CV72
22U_0805_6.3V6M~D
1
2
G
D
S
QV10
SSM3K7002FU_SC70-3~D
G
D
S
QV10
SSM3K7002FU_SC70-3~D
2
13
G
D
S
QV7
PMV45EN_SOT23-3~D
G
D
S
QV7
PMV45EN_SOT23-3~D
2
1 3
G
D
S
QV13
SSM3K7002FU_SC70-3~D
G
D
S
QV13
SSM3K7002FU_SC70-3~D
2
13
CV45
10U_0603_6.3V6M~D
CV45
10U_0603_6.3V6M~D
1
2
RV95 0_0402_5%~DRV95 0_0402_5%~D
1 2
CV186
3300P_0402_50V7K~D
CV186
3300P_0402_50V7K~D
1
2
RV130
39_0402_5%~D
RV130
39_0402_5%~D
12
CV128
0.01U_0402_16V7K~D
@CV128
0.01U_0402_16V7K~D
@
1
2
S
G
D
QV5
SI3456DDV-T1-GE3_TSOP6~D
S
G
D
QV5
SI3456DDV-T1-GE3_TSOP6~D
3
6
245
1
RV70
20K_0402_5%~D
RV70
20K_0402_5%~D
12
RV78
1.1K_0402_1%~D
@RV78
1.1K_0402_1%~D
@
12
QV6B
DMN66D0LDW-7_SOT363-6~D
QV6B
DMN66D0LDW-7_SOT363-6~D
3
5
4
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+FBA_PLL_AVDD
+1.5V_MEM_GFX
+FBA_PLL_AVDD
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
N12P Memory (2)
50 66Friday, May 20, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
N12P Memory (2)
50 66Friday, May 20, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
N12P Memory (2)
50 66Friday, May 20, 2011
Compal Electronics, Inc.
CHANNEL-B NOT TO USE, NEED TO BE DISABLED
DELL CONFIDENTIAL/PROPRIETARY
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
CV83
0.1U_0402_10V7K~D
CV83
0.1U_0402_10V7K~D
1
2
MEMORY INTERFACE
B
Part 3 of 7
THE FBA_ECKBxx ARE
USED ON GK107.
NC ON GF108 AND
GF117
UV1C
N13M_FCBGA908~D
MEMORY INTERFACE
B
Part 3 of 7
THE FBA_ECKBxx ARE
USED ON GK107.
NC ON GF108 AND
GF117
UV1C
N13M_FCBGA908~D
FBB_D00
G9
FBB_D01
E9
FBB_D02
G8
FBB_D03
F9
FBB_D04
F11
FBB_D05
G11
FBB_D06
F12
FBB_D07
G12
FBB_D08
G6
FBB_D09
F5
FBB_D10
E6
FBB_D11
F6
FBB_D12
F4
FBB_D13
G4
FBB_D14
E2
FBB_D15
F3
FBB_D16
C2
FBB_D17
D4
FBB_D18
D3
FBB_D19
C1
FBB_D20
B3
FBB_D21
C4
FBB_D22
B5
FBB_D23
C5
FBB_D24
A11
FBB_D25
C11
FBB_D26
D11
FBB_D27
B11
FBB_D28
D8
FBB_D29
A8
FBB_D30
C8
FBB_D31
B8
FBB_D32
F24
FBB_D33
G23
FBB_D34
E24
FBB_D35
G24
FBB_D36
D21
FBB_D37
E21
FBB_D38
G21
FBB_D39
F21
FBB_D40
G27
FBB_D41
D27
FBB_D42
G26
FBB_D43
E27
FBB_D44
E29
FBB_D45
F29
FBB_D46
E30
FBB_D47
D30
FBB_D48
A32
FBB_D49
C31
FBB_D50
C32
FBB_D51
B32
FBB_D52
D29
FBB_D53
A29
FBB_D54
C29
FBB_D55
B29
FBB_D56
B21
FBB_D57
C23
FBB_D58
A21
FBB_D59
C21
FBB_D60
B24
FBB_D61
C24
FBB_D62
B26
FBB_D63
C26
FBB_CMD0 D13
FBB_CMD1 E14
FBB_CMD2 F14
FBB_CMD3 A12
FBB_CMD4 B12
FBB_CMD5 C14
FBB_CMD6 B14
FBB_CMD7 G15
FBB_CMD8 F15
FBB_CMD9 E15
FBB_CMD10 D15
FBB_CMD11 A14
FBB_CMD12 D14
FBB_CMD13 A15
FBB_CMD14 B15
FBB_CMD15 C17
FBB_CMD16 D18
FBB_CMD17 E18
FBB_CMD18 F18
FBB_CMD19 A20
FBB_CMD20 B20
FBB_CMD21 C18
FBB_CMD22 B18
FBB_CMD23 G18
FBB_CMD24 G17
FBB_CMD25 F17
FBB_CMD26 D16
FBB_DQM0 E11
FBB_DQM1 E3
FBB_DQM2 A3
FBB_DQM3 C9
FBB_DQM4 F23
FBB_DQM5 F27
FBB_DQM6 C30
FBB_DQM7 A24
FBB_DQS_RN0 D9
FBB_DQS_RN1 E4
FBB_DQS_RN2 B2
FBB_DQS_RN3 A9
FBB_DQS_RN4 D22
FBB_DQS_RN5 D28
FBB_DQS_RN6 A30
FBB_DQS_RN7 B23
FBB_DQS_WP0 D10
FBB_DQS_WP1 D5
FBB_DQS_WP2 C3
FBB_DQS_WP3 B9
FBB_DQS_WP4 E23
FBB_DQS_WP5 E28
FBB_DQS_WP6 B30
FBB_DQS_WP7 A23
FBB_CLK0 D12
FBB_CLK0_N E12
FBB_CLK1 E20
FBB_CLK1_N F20
FBB_CMD27 A18
FBB_CMD28 D17
FBB_CMD29 A17
FBB_CMD30 B17
FBB_DEBUG0
G14
FBB_CMD31 E17
FBB_DEBUG1
G20
FBB_WCK01 F8
FBB_WCK01_N E8
FBB_WCK23 A5
FBB_WCK23_N A6
FBB_WCK45 D24
FBB_WCK45_N D25
FBB_WCK67 B27
FBB_WCK67_N C27
FBB_CMD_RFU0 C12
FBB_CMD_RFU1 C20
FBB_WCKB01 D6
FBB_WCKB01_N D7
FBB_WCKB23 C6
FBB_WCKB23_N B6
FBB_WCKB45 F26
FBB_WCKB45_N E26
FBB_WCKB67 A26
FBB_WCKB67_N A27
FBB_PLL_AVDD
H17
RV62
60.4_0402_1%~D
RV62
60.4_0402_1%~D
12
RV63
60.4_0402_1%~D
RV63
60.4_0402_1%~D
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLKA0#
CLKA0
FBA_CMD[0..31]
FBA_D[0..31]
FBA_CMD14
CLKA0#
CLKA0
FBA_EDC[0..3]
FBA_DBI[0..3]
FBA_EDC0
FBA_EDC2
FBA_DBI0
FBA_DBI2
FBA_CMD14
FBA_EDC1
FBA_EDC3
FBA_DBI1
FBA_DBI3
FBA_CMD9
FBA_CMD9
FBA_CMD6
FBA_CMD7
FBA_CMD4
FBA_CMD3
FBA_CMD1
FBA_CMD1
FBA_CMD4
FBA_CMD6
FBA_CMD3
FBA_CMD7
FBA_CMD2
FBA_CMD2
FBA_CMD11
FBA_CMD11
FBA_CMD10
FBA_CMD10
FBA_SEN0
FBA_SEN0
FBA_CMD8
FBA_CMD8
FBA_CMD12 FBA_CMD12
FBA_CMD0 FBA_CMD0
FBA_CMD15
FBA_CMD15
FBA_CMD5
FBA_CMD5
FBA_WCK01#
FBA_WCK01
FBA_WCK23#
FBA_WCK23
FBA_WCK01#
FBA_WCK01
FBA_WCK23#
FBA_WCK23
+FBA_VREFD_L
+FBA_VREFD_L
+FBA_VREFC_L
FBA_CMD13
FBA_CMD13
+FBA_VREFC_L
+FBA_VREFD_L
+FBA_VREFC_L
FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D8
FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
+1.5V_MEM_GFX
+1.5V_MEM_GFX
+1.5V_MEM_GFX
+1.5V_MEM_GFX
+1.5V_MEM_GFX
+1.5V_MEM_GFX
FBA_CMD[0..31] <49,52>
FBA_D[0..31] <49>
FBA_DBI[0..3] <49>
FBA_EDC[0..3] <49>
CLKA0<49> CLKA0#<49>
FBA_WCK01#<49> FBA_WCK01<49>
FBA_WCK23<49> FBA_WCK23#<49>
FBA_WCK01<49> FBA_WCK01#<49>
FBA_WCK23<49> FBA_WCK23#<49>
FBVREF_ALTV<45,52>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
VRAM A Lower
51 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
VRAM A Lower
51 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
VRAM A Lower
51 66Friday, June 10, 2011
Compal Electronics, Inc.
Memory Partition A - Lower 32
bits
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
64X32 GDDR5
NORMAL
MIRROR
???
???
DELL CONFIDENTIAL/PROPRIETARY
RV111
931_0402_1%
RV111
931_0402_1%
12
CV138
1U_0402_6.3V6K~D
CV138
1U_0402_6.3V6K~D
1
2
CV155
0.1U_0402_10V7K~D
CV155
0.1U_0402_10V7K~D
1
2
CV137
1U_0402_6.3V6K~D
CV137
1U_0402_6.3V6K~D
1
2
RV106
40.2_0402_1%~D
RV106
40.2_0402_1%~D
1 2
CV152
0.1U_0402_10V7K~D
CV152
0.1U_0402_10V7K~D
1
2
RV105
40.2_0402_1%~D
RV105
40.2_0402_1%~D
1 2
CV182
0.1U_0402_10V7K~D
CV182
0.1U_0402_10V7K~D
1
2
CV131
1U_0402_6.3V6K~D
CV131
1U_0402_6.3V6K~D
1
2
CV153
0.1U_0402_10V7K~D
CV153
0.1U_0402_10V7K~D
1
2
G
D
S
QV8
SSM3K7002FU_SC70-3~D
G
D
S
QV8
SSM3K7002FU_SC70-3~D
2
13
CV177
1U_0402_6.3V6K~D
CV177
1U_0402_6.3V6K~D
1
2
RV107
121_0402_1%~D
RV107
121_0402_1%~D
1 2
CV188
1U_0402_6.3V6K~D
CV188
1U_0402_6.3V6K~D
1
2
CV130
1U_0402_6.3V6K~D
CV130
1U_0402_6.3V6K~D
1
2
CV151
0.1U_0402_10V7K~D
CV151
0.1U_0402_10V7K~D
1
2
RV19
1K_0402_1%~D
RV19
1K_0402_1%~D
1 2
CV176
1U_0402_6.3V6K~D
CV176
1U_0402_6.3V6K~D
1
2
RV22 1K_0402_1%~DRV22 1K_0402_1%~D
1 2
CV139
0.1U_0402_10V7K~D
CV139
0.1U_0402_10V7K~D
1
2
CV41
10U_0603_6.3V6M~D
CV41
10U_0603_6.3V6M~D
1
2
RV17 1K_0402_1%~DRV17 1K_0402_1%~D
1 2
CV179
0.1U_0402_10V7K~D
CV179
0.1U_0402_10V7K~D
1
2
RV110
1.33K_0402_1%~D
RV110
1.33K_0402_1%~D
12
RV113
931_0402_1%
RV113
931_0402_1%
12 RV114
549_0402_1%~D
RV114
549_0402_1%~D
12
RV109
1.33K_0402_1%~D
RV109
1.33K_0402_1%~D
12
RV108 121_0402_1%~DRV108 121_0402_1%~D
1 2
CV42
10U_0603_6.3V6M~D
CV42
10U_0603_6.3V6M~D
1
2
CV207
820P_0402_50V7K~D
CV207
820P_0402_50V7K~D
1
2
CV140
0.1U_0402_10V7K~D
CV140
0.1U_0402_10V7K~D
1
2
CV165
0.01U_0402_16V7K~D
CV165
0.01U_0402_16V7K~D
1
2
CV178
1U_0402_6.3V6K~D
CV178
1U_0402_6.3V6K~D
1
2
RV112
549_0402_1%~D
RV112
549_0402_1%~D
12
170-BALL
SGRAM GDDR5
MF=0 MF=1 MF=0MF=1
UV5
H5GQ2H24MFR-T2C
170-BALL
SGRAM GDDR5
MF=0 MF=1 MF=0MF=1
UV5
H5GQ2H24MFR-T2C
WE# CS#
L12
CS# WE#
G12
CAS# RAS#
L3
RAS# CAS#
G3
CKE#
J3
CK
J12
CK#
J11
VPP/NC
U5
EDC0 EDC3
C2
EDC1 EDC2
C13
DQ24 DQ0 A4
DQ25 DQ1 A2
DQ26 DQ2 B4
DQ27 DQ3 B2
DQ28 DQ4 E4
DQ29 DQ5 E2
DQ30 DQ6 F4
DQ31 DQ7 F2
VSSQ E1
VSS
T10
VSS
L10
VSS
P10
VREFD
A10
VDD
D11 VDD
R10
VDDQ B1
VDDQ D1
VDDQ F1
VDDQ M1
VREFD
U10
VDDQ T1
ZQ
J13
RESET#
J2
WCK01 WCK23
D4
WCK23# WCK01#
P5
WCK23 WCK01
P4
VSSQ A1
VSSQ C1
VSSQ N1
VSSQ R1
WCK01# WCK23#
D5
VSSQ U1
VPP/NC
A5
VDDQ G2
VSSQ H2
VSSQ K2
VDDQ L2
VDDQ B3
VSSQ A3
VSS
G10
VDD
C10
ABI#
J4
VDD
R5
VSS
D10
VDD
C5
DQ17 DQ9 A13
DQ18 DQ10 B11
DQ19 DQ11 B13
DQ20 DQ12 E11
DQ21 DQ13 E13
DQ22 DQ14 F11
DQ23 DQ15 F13
DQ16 DQ8 A11
EDC2 EDC1
R13
BA2/A4 BA0/A2
K11
VDD
L4 VDD
G4 VDD
L1 VDD
G1
VSS
B10 VSS
T5 VSS
L5 VSS
G5 VSS
B5 VSS
K1 VSS
H1
VDDQ P1
BA3/A3 BA1/A5
H10
BA0/A2 BA2/A4
H11
BA1/A5 BA3/A3
K10
VDDQ D3
VDDQ F3
VDDQ H3
VDDQ K3
VDDQ M3
VDDQ P3
VDDQ T3
VDDQ E5
VDDQ N5
VDDQ E10
VDDQ N10
VDDQ B12
VDDQ D12
VDDQ F12
VDDQ H12
VDDQ K12
VDDQ M12
VDDQ P12
VDDQ T12
VDDQ G13
VDDQ L13
VDDQ B14
VDDQ D14
VDDQ F14
VDDQ M14
VDDQ P14
VSSQ C3
VSSQ E3
VSSQ N3
VSSQ R3
VSSQ U3
VSSQ C4
VSSQ R4
VSSQ F5
VSSQ M5
VSSQ F10
VSSQ M10
VSSQ C11
VSSQ R11
VSSQ A12
VSSQ C12
VSSQ E12
VSSQ N12
VSSQ R12
VSSQ U12
VSSQ H13
VSSQ K13
VSSQ A14
VSSQ C14
VSSQ E14
VSSQ N14
VSSQ R14
VSSQ U14
VDDQ T14
VDD
G11
VDD
L11
VDD
P11
VDD
G14
VDD
L14
VSS
H14
VSS
K14
DQ8 DQ16 U11
DQ9 DQ17 U13
DQ10 DQ18 T11
DQ11 DQ19 T13
DQ12 DQ20 N11
DQ13 DQ21 N13
DQ14 DQ22 M11
DQ15 DQ23 M13
DQ0 DQ24 U4
DQ1 DQ25 U2
DQ2 DQ26 T4
DQ3 DQ27 T2
DQ4 DQ28 N4
DQ5 DQ29 N2
DQ6 DQ30 M4
DQ7 DQ31 M2
EDC3 EDC0
R2
DBI0# DBI3#
D2
DBI1# DBI2#
D13
DBI2# DBI1#
P13
DBI3# DBI0#
P2
VREFC
J14
SEN
J10 MF
J1
A8/A7 A10/A0
K4
A9/A1 A11/A6
H5
A10/A0 A8/A7
H4
A11/A6 A9/A1
K5
A12/RFU/NC
J5
CV142
0.1U_0402_10V7K~D
CV142
0.1U_0402_10V7K~D
1
2
CV143
0.1U_0402_10V7K~D
CV143
0.1U_0402_10V7K~D
1
2
CV208
820P_0402_50V7K~D
CV208
820P_0402_50V7K~D
1
2
CV141
0.1U_0402_10V7K~D
CV141
0.1U_0402_10V7K~D
1
2
170-BALL
SGRAM GDDR5
MF=0 MF=1 MF=0MF=1
UV4
H5GQ2H24MFR-T2C
170-BALL
SGRAM GDDR5
MF=0 MF=1 MF=0MF=1
UV4
H5GQ2H24MFR-T2C
WE# CS#
L12
CS# WE#
G12
CAS# RAS#
L3
RAS# CAS#
G3
CKE#
J3
CK
J12
CK#
J11
VPP/NC
U5
EDC0 EDC3
C2
EDC1 EDC2
C13
DQ24 DQ0 A4
DQ25 DQ1 A2
DQ26 DQ2 B4
DQ27 DQ3 B2
DQ28 DQ4 E4
DQ29 DQ5 E2
DQ30 DQ6 F4
DQ31 DQ7 F2
VSSQ E1
VSS
T10
VSS
L10
VSS
P10
VREFD
A10
VDD
D11 VDD
R10
VDDQ B1
VDDQ D1
VDDQ F1
VDDQ M1
VREFD
U10
VDDQ T1
ZQ
J13
RESET#
J2
WCK01 WCK23
D4
WCK23# WCK01#
P5
WCK23 WCK01
P4
VSSQ A1
VSSQ C1
VSSQ N1
VSSQ R1
WCK01# WCK23#
D5
VSSQ U1
VPP/NC
A5
VDDQ G2
VSSQ H2
VSSQ K2
VDDQ L2
VDDQ B3
VSSQ A3
VSS
G10
VDD
C10
ABI#
J4
VDD
R5
VSS
D10
VDD
C5
DQ17 DQ9 A13
DQ18 DQ10 B11
DQ19 DQ11 B13
DQ20 DQ12 E11
DQ21 DQ13 E13
DQ22 DQ14 F11
DQ23 DQ15 F13
DQ16 DQ8 A11
EDC2 EDC1
R13
BA2/A4 BA0/A2
K11
VDD
L4 VDD
G4 VDD
L1 VDD
G1
VSS
B10 VSS
T5 VSS
L5 VSS
G5 VSS
B5 VSS
K1 VSS
H1
VDDQ P1
BA3/A3 BA1/A5
H10
BA0/A2 BA2/A4
H11
BA1/A5 BA3/A3
K10
VDDQ D3
VDDQ F3
VDDQ H3
VDDQ K3
VDDQ M3
VDDQ P3
VDDQ T3
VDDQ E5
VDDQ N5
VDDQ E10
VDDQ N10
VDDQ B12
VDDQ D12
VDDQ F12
VDDQ H12
VDDQ K12
VDDQ M12
VDDQ P12
VDDQ T12
VDDQ G13
VDDQ L13
VDDQ B14
VDDQ D14
VDDQ F14
VDDQ M14
VDDQ P14
VSSQ C3
VSSQ E3
VSSQ N3
VSSQ R3
VSSQ U3
VSSQ C4
VSSQ R4
VSSQ F5
VSSQ M5
VSSQ F10
VSSQ M10
VSSQ C11
VSSQ R11
VSSQ A12
VSSQ C12
VSSQ E12
VSSQ N12
VSSQ R12
VSSQ U12
VSSQ H13
VSSQ K13
VSSQ A14
VSSQ C14
VSSQ E14
VSSQ N14
VSSQ R14
VSSQ U14
VDDQ T14
VDD
G11
VDD
L11
VDD
P11
VDD
G14
VDD
L14
VSS
H14
VSS
K14
DQ8 DQ16 U11
DQ9 DQ17 U13
DQ10 DQ18 T11
DQ11 DQ19 T13
DQ12 DQ20 N11
DQ13 DQ21 N13
DQ14 DQ22 M11
DQ15 DQ23 M13
DQ0 DQ24 U4
DQ1 DQ25 U2
DQ2 DQ26 T4
DQ3 DQ27 T2
DQ4 DQ28 N4
DQ5 DQ29 N2
DQ6 DQ30 M4
DQ7 DQ31 M2
EDC3 EDC0
R2
DBI0# DBI3#
D2
DBI1# DBI2#
D13
DBI2# DBI1#
P13
DBI3# DBI0#
P2
VREFC
J14
SEN
J10 MF
J1
A8/A7 A10/A0
K4
A9/A1 A11/A6
H5
A10/A0 A8/A7
H4
A11/A6 A9/A1
K5
A12/RFU/NC
J5
CV154
0.1U_0402_10V7K~D
CV154
0.1U_0402_10V7K~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+FBA_VREFD_H
FBA_D42
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_CMD28
FBA_CMD25
FBA_D43
FBA_D56
FBA_CMD16
FBA_CMD17
FBA_EDC5
FBA_WCK67#
FBA_WCK67
FBA_CMD25
FBA_CMD20
FBA_CMD17
FBA_CMD26
FBA_CMD18
FBA_CMD27
CLKA1#
CLKA1
FBA_D44
FBA_D57
FBA_CMD30
FBA_WCK45#
FBA_WCK45
+FBA_VREFC_H
FBA_D45
FBA_D58
FBA_EDC6
FBA_EDC7
+FBA_VREFD_H
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D46
FBA_D59
FBA_SEN2
FBA_DBI7
FBA_CMD19
+FBA_VREFC_H
FBA_CMD30
FBA_D60
FBA_D47
FBA_CMD24
FBA_EDC[4..7]
FBA_DBI[4..7]
FBA_CMD29
FBA_CMD19
FBA_D61
FBA_CMD16
FBA_CMD24
FBA_DBI5
FBA_DBI6
FBA_CMD31
FBA_DBI4
FBA_CMD23
+FBA_VREFC_H
FBA_D62
FBA_CMD26
FBA_SEN2
FBA_WCK67#
FBA_CMD31
FBA_CMD18
FBA_D63
FBA_WCK45#
FBA_WCK45
FBA_CMD21
CLKA1#
CLKA1
FBA_WCK67
FBA_CMD23
+FBA_VREFD_H
FBA_D40
FBA_CMD21
FBA_CMD28
FBA_CMD22
FBA_CMD27
FBA_CMD29
FBA_D41
FBA_D[32..63]
FBA_CMD20
FBA_CMD22
FBA_CMD[0..31]
FBA_D32
FBA_D33FBA_EDC4
+1.5V_MEM_GFX
+1.5V_MEM_GFX
+1.5V_MEM_GFX
+1.5V_MEM_GFX
+1.5V_MEM_GFX
+1.5V_MEM_GFX
FBA_WCK67<49> FBA_WCK67<49> FBA_WCK67#<49>
FBA_WCK45<49> FBA_WCK45#<49>
FBA_D[32..63] <49>
FBA_DBI[4..7] <49>
FBA_EDC[4..7] <49>
FBA_WCK45<49> FBA_WCK45#<49>
CLKA1<49> CLKA1#<49>
FBA_WCK67#<49>
FBVREF_ALTV<45,51>
FBA_CMD[0..31] <49,51>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
VRAM A Upper
52 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
VRAM A Upper
52 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
VRAM A Upper
52 66Friday, June 10, 2011
Compal Electronics, Inc.
Memory Partition A - Upper 32 bits
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
???
???
NORMAL
MIRROR
DELL CONFIDENTIAL/PROPRIETARY
CV44
10U_0603_6.3V6M~D
CV44
10U_0603_6.3V6M~D
1
2
CV157
0.1U_0402_10V7K~D
CV157
0.1U_0402_10V7K~D
1
2
170-BALL
SGRAM GDDR5
MF=0 MF=1 MF=0MF=1
UV3
H5GQ2H24MFR-T2C
170-BALL
SGRAM GDDR5
MF=0 MF=1 MF=0MF=1
UV3
H5GQ2H24MFR-T2C
WE# CS#
L12
CS# WE#
G12
CAS# RAS#
L3
RAS# CAS#
G3
CKE#
J3
CK
J12
CK#
J11
VPP/NC
U5
EDC0 EDC3
C2
EDC1 EDC2
C13
DQ24 DQ0 A4
DQ25 DQ1 A2
DQ26 DQ2 B4
DQ27 DQ3 B2
DQ28 DQ4 E4
DQ29 DQ5 E2
DQ30 DQ6 F4
DQ31 DQ7 F2
VSSQ E1
VSS
T10
VSS
L10
VSS
P10
VREFD
A10
VDD
D11 VDD
R10
VDDQ B1
VDDQ D1
VDDQ F1
VDDQ M1
VREFD
U10
VDDQ T1
ZQ
J13
RESET#
J2
WCK01 WCK23
D4
WCK23# WCK01#
P5
WCK23 WCK01
P4
VSSQ A1
VSSQ C1
VSSQ N1
VSSQ R1
WCK01# WCK23#
D5
VSSQ U1
VPP/NC
A5
VDDQ G2
VSSQ H2
VSSQ K2
VDDQ L2
VDDQ B3
VSSQ A3
VSS
G10
VDD
C10
ABI#
J4
VDD
R5
VSS
D10
VDD
C5
DQ17 DQ9 A13
DQ18 DQ10 B11
DQ19 DQ11 B13
DQ20 DQ12 E11
DQ21 DQ13 E13
DQ22 DQ14 F11
DQ23 DQ15 F13
DQ16 DQ8 A11
EDC2 EDC1
R13
BA2/A4 BA0/A2
K11
VDD
L4 VDD
G4 VDD
L1 VDD
G1
VSS
B10 VSS
T5 VSS
L5 VSS
G5 VSS
B5 VSS
K1 VSS
H1
VDDQ P1
BA3/A3 BA1/A5
H10
BA0/A2 BA2/A4
H11
BA1/A5 BA3/A3
K10
VDDQ D3
VDDQ F3
VDDQ H3
VDDQ K3
VDDQ M3
VDDQ P3
VDDQ T3
VDDQ E5
VDDQ N5
VDDQ E10
VDDQ N10
VDDQ B12
VDDQ D12
VDDQ F12
VDDQ H12
VDDQ K12
VDDQ M12
VDDQ P12
VDDQ T12
VDDQ G13
VDDQ L13
VDDQ B14
VDDQ D14
VDDQ F14
VDDQ M14
VDDQ P14
VSSQ C3
VSSQ E3
VSSQ N3
VSSQ R3
VSSQ U3
VSSQ C4
VSSQ R4
VSSQ F5
VSSQ M5
VSSQ F10
VSSQ M10
VSSQ C11
VSSQ R11
VSSQ A12
VSSQ C12
VSSQ E12
VSSQ N12
VSSQ R12
VSSQ U12
VSSQ H13
VSSQ K13
VSSQ A14
VSSQ C14
VSSQ E14
VSSQ N14
VSSQ R14
VSSQ U14
VDDQ T14
VDD
G11
VDD
L11
VDD
P11
VDD
G14
VDD
L14
VSS
H14
VSS
K14
DQ8 DQ16 U11
DQ9 DQ17 U13
DQ10 DQ18 T11
DQ11 DQ19 T13
DQ12 DQ20 N11
DQ13 DQ21 N13
DQ14 DQ22 M11
DQ15 DQ23 M13
DQ0 DQ24 U4
DQ1 DQ25 U2
DQ2 DQ26 T4
DQ3 DQ27 T2
DQ4 DQ28 N4
DQ5 DQ29 N2
DQ6 DQ30 M4
DQ7 DQ31 M2
EDC3 EDC0
R2
DBI0# DBI3#
D2
DBI1# DBI2#
D13
DBI2# DBI1#
P13
DBI3# DBI0#
P2
VREFC
J14
SEN
J10 MF
J1
A8/A7 A10/A0
K4
A9/A1 A11/A6
H5
A10/A0 A8/A7
H4
A11/A6 A9/A1
K5
A12/RFU/NC
J5
CV149
1U_0402_6.3V6K~D
CV149
1U_0402_6.3V6K~D
1
2
170-BALL
SGRAM GDDR5
MF=0 MF=1 MF=0MF=1
UV6
H5GQ2H24MFR-T2C
170-BALL
SGRAM GDDR5
MF=0 MF=1 MF=0MF=1
UV6
H5GQ2H24MFR-T2C
WE# CS#
L12
CS# WE#
G12
CAS# RAS#
L3
RAS# CAS#
G3
CKE#
J3
CK
J12
CK#
J11
VPP/NC
U5
EDC0 EDC3
C2
EDC1 EDC2
C13
DQ24 DQ0 A4
DQ25 DQ1 A2
DQ26 DQ2 B4
DQ27 DQ3 B2
DQ28 DQ4 E4
DQ29 DQ5 E2
DQ30 DQ6 F4
DQ31 DQ7 F2
VSSQ E1
VSS
T10
VSS
L10
VSS
P10
VREFD
A10
VDD
D11 VDD
R10
VDDQ B1
VDDQ D1
VDDQ F1
VDDQ M1
VREFD
U10
VDDQ T1
ZQ
J13
RESET#
J2
WCK01 WCK23
D4
WCK23# WCK01#
P5
WCK23 WCK01
P4
VSSQ A1
VSSQ C1
VSSQ N1
VSSQ R1
WCK01# WCK23#
D5
VSSQ U1
VPP/NC
A5
VDDQ G2
VSSQ H2
VSSQ K2
VDDQ L2
VDDQ B3
VSSQ A3
VSS
G10
VDD
C10
ABI#
J4
VDD
R5
VSS
D10
VDD
C5
DQ17 DQ9 A13
DQ18 DQ10 B11
DQ19 DQ11 B13
DQ20 DQ12 E11
DQ21 DQ13 E13
DQ22 DQ14 F11
DQ23 DQ15 F13
DQ16 DQ8 A11
EDC2 EDC1
R13
BA2/A4 BA0/A2
K11
VDD
L4 VDD
G4 VDD
L1 VDD
G1
VSS
B10 VSS
T5 VSS
L5 VSS
G5 VSS
B5 VSS
K1 VSS
H1
VDDQ P1
BA3/A3 BA1/A5
H10
BA0/A2 BA2/A4
H11
BA1/A5 BA3/A3
K10
VDDQ D3
VDDQ F3
VDDQ H3
VDDQ K3
VDDQ M3
VDDQ P3
VDDQ T3
VDDQ E5
VDDQ N5
VDDQ E10
VDDQ N10
VDDQ B12
VDDQ D12
VDDQ F12
VDDQ H12
VDDQ K12
VDDQ M12
VDDQ P12
VDDQ T12
VDDQ G13
VDDQ L13
VDDQ B14
VDDQ D14
VDDQ F14
VDDQ M14
VDDQ P14
VSSQ C3
VSSQ E3
VSSQ N3
VSSQ R3
VSSQ U3
VSSQ C4
VSSQ R4
VSSQ F5
VSSQ M5
VSSQ F10
VSSQ M10
VSSQ C11
VSSQ R11
VSSQ A12
VSSQ C12
VSSQ E12
VSSQ N12
VSSQ R12
VSSQ U12
VSSQ H13
VSSQ K13
VSSQ A14
VSSQ C14
VSSQ E14
VSSQ N14
VSSQ R14
VSSQ U14
VDDQ T14
VDD
G11
VDD
L11
VDD
P11
VDD
G14
VDD
L14
VSS
H14
VSS
K14
DQ8 DQ16 U11
DQ9 DQ17 U13
DQ10 DQ18 T11
DQ11 DQ19 T13
DQ12 DQ20 N11
DQ13 DQ21 N13
DQ14 DQ22 M11
DQ15 DQ23 M13
DQ0 DQ24 U4
DQ1 DQ25 U2
DQ2 DQ26 T4
DQ3 DQ27 T2
DQ4 DQ28 N4
DQ5 DQ29 N2
DQ6 DQ30 M4
DQ7 DQ31 M2
EDC3 EDC0
R2
DBI0# DBI3#
D2
DBI1# DBI2#
D13
DBI2# DBI1#
P13
DBI3# DBI0#
P2
VREFC
J14
SEN
J10 MF
J1
A8/A7 A10/A0
K4
A9/A1 A11/A6
H5
A10/A0 A8/A7
H4
A11/A6 A9/A1
K5
A12/RFU/NC
J5
CV146
0.1U_0402_10V7K~D
CV146
0.1U_0402_10V7K~D
1
2
RV64
1K_0402_1%~D
RV64
1K_0402_1%~D
1 2
CV148
1U_0402_6.3V6K~D
CV148
1U_0402_6.3V6K~D
1
2
CV158
0.1U_0402_10V7K~D
CV158
0.1U_0402_10V7K~D
1
2
RV65
1K_0402_1%~D
RV65
1K_0402_1%~D
1 2
RV119
1.33K_0402_1%~D
RV119
1.33K_0402_1%~D
12
RV120
1.33K_0402_1%~D
RV120
1.33K_0402_1%~D
12
RV117
121_0402_1%~D
RV117
121_0402_1%~D
1 2
CV159
0.1U_0402_10V7K~D
CV159
0.1U_0402_10V7K~D
1
2
CV189
1U_0402_6.3V6K~D
CV189
1U_0402_6.3V6K~D
1
2
RV34 1K_0402_1%~DRV34 1K_0402_1%~D
1 2
CV162
0.1U_0402_10V7K~D
CV162
0.1U_0402_10V7K~D
1
2
CV144
0.1U_0402_10V7K~D
CV144
0.1U_0402_10V7K~D
1
2
CV145
0.1U_0402_10V7K~D
CV145
0.1U_0402_10V7K~D
1
2
CV147
0.1U_0402_10V7K~D
CV147
0.1U_0402_10V7K~D
1
2
RV121
931_0402_1%
RV121
931_0402_1%
12
RV115
40.2_0402_1%~D
RV115
40.2_0402_1%~D
1 2
CV191
1U_0402_6.3V6K~D
CV191
1U_0402_6.3V6K~D
1
2
CV180
1U_0402_6.3V6K~D
CV180
1U_0402_6.3V6K~D
1
2
RV116
40.2_0402_1%~D
RV116
40.2_0402_1%~D
1 2
CV190
0.01U_0402_16V7K~D
CV190
0.01U_0402_16V7K~D
1
2
CV134
1U_0402_6.3V6K~D
CV134
1U_0402_6.3V6K~D
1
2
CV192
1U_0402_6.3V6K~D
CV192
1U_0402_6.3V6K~D
1
2
CV209
820P_0402_50V7K~D
CV209
820P_0402_50V7K~D
1
2
CV210
820P_0402_50V7K~D
CV210
820P_0402_50V7K~D
1
2
CV156
0.1U_0402_10V7K~D
CV156
0.1U_0402_10V7K~D
1
2
RV124
549_0402_1%~D
RV124
549_0402_1%~D
12
RV123
931_0402_1%
RV123
931_0402_1%
12
CV43
10U_0603_6.3V6M~D
CV43
10U_0603_6.3V6M~D
1
2
CV185
0.1U_0402_10V7K~D
CV185
0.1U_0402_10V7K~D
1
2
RV118 121_0402_1%~DRV118 121_0402_1%~D
1 2
CV150
0.1U_0402_10V7K~D
CV150
0.1U_0402_10V7K~D
1
2
CV133
1U_0402_6.3V6K~D
CV133
1U_0402_6.3V6K~D
1
2
RV122
549_0402_1%~D
RV122
549_0402_1%~D
12
G
D
S
QV9
SSM3K7002FU_SC70-3~D
G
D
S
QV9
SSM3K7002FU_SC70-3~D
2
13
CV181
0.1U_0402_10V7K~D
CV181
0.1U_0402_10V7K~D
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
NB_PSID_TS5A63157
+DC_IN
PBATT+_C
NB_PSID
+DCIN_JACK
-DCIN_JACK
Z4304
Z4306
Z4305
Z5304
Z5306
MBATT+_C
Z5305
Z4012
VSB_N_002
VSB_N_003
VSB_N_001
+3.3V_ALW
+5V_ALW
+DC_IN_SS
PBATT+
GND
+3.3V_ALW
+DC_IN
+5V_ALW
+COINCELL
+RTC_CELL
+3.3V_RTC_LDO
+COINCELL
MPBATT+
GND
+3.3V_ALW
+PWR_SRC +PWR_SRC_S
+3.3V_ALW
PSID_DISABLE# <40>
PBAT_PRES# <40,63>
PBAT_SMBDAT <41>
PBAT_SMBCLK <41>
DOCK_PSID<39> GPIO_PSID_SELECT <40>
PS_ID <41>
SOFT_START_GC <63>
BAY_SMBDAT <29,41>
BAY_SMBCLK <29,41>
MODULE_BATT_PRES# <40,63>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
+DCIN
53 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
+DCIN
53 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
+DCIN
53 66Friday, June 10, 2011
Compal Electronics, Inc.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
Primary Battery Connector
DC_IN+ Source
COIN RTC Battery
ESD Diodes
ESD Diodes
Media Bay Battery Connector
PR26
1M_0402_5%~D
PR26
1M_0402_5%~D
12
E
B
C
PQ3
MMST3904-7-F_SOT323~D
E
B
C
PQ3
MMST3904-7-F_SOT323~D
2
3 1
PR4
100_0402_5%~D
PR4
100_0402_5%~D
1 2
PD2
PESD24VS2UT_SOT23-3~D
@
PD2
PESD24VS2UT_SOT23-3~D
@
2
31
PD5
PESD24VS2UT_SOT23-3~D
@
PD5
PESD24VS2UT_SOT23-3~D
@
2
31
PL6
FBMA-L18-453215-900LMA90T_1812~D
PL6
FBMA-L18-453215-900LMA90T_1812~D
1 2
PR5
100_0402_5%~D
PR5
100_0402_5%~D
1 2
PR20
1M_0402_5%~D
PR20
1M_0402_5%~D
12
PQ4
TP0610K-T1-E3_SOT23-3
PQ4
TP0610K-T1-E3_SOT23-3
2
13
PC16
0.1U_0603_25V7K~D
@
PC16
0.1U_0603_25V7K~D
@
12
PR3
100_0402_5%~D
PR3
100_0402_5%~D
1 2
PJP1
PAD-OPEN 1x2m~D
@PJP1
PAD-OPEN 1x2m~D
@
2 1
G
D
S
PQ2
FDV301N_G_NL_SOT23-3~D
G
D
S
PQ2
FDV301N_G_NL_SOT23-3~D
2
1 3
PR19
100K_0402_1%
PR19
100K_0402_1%
12
PR7
100_0402_5%~D
PR7
100_0402_5%~D
1 2
PR1
1K_0402_5%~D
PR1
1K_0402_5%~D
12
PL4
BLM18BD102SN1D_0603~D
PL4
BLM18BD102SN1D_0603~D
12
PD1
PESD24VS2UT_SOT23-3~D
@
PD1
PESD24VS2UT_SOT23-3~D
@
2
31
PC18
0.1U_0603_25V7K~D
PC18
0.1U_0603_25V7K~D
12
PC4
0.1U_0603_25V7K~D
PC4
0.1U_0603_25V7K~D
12
PR25
0_0402_5%
PR25
0_0402_5%
1 2
PR17
10K_0402_5%~D@
PR17
10K_0402_5%~D@
1 2
PR11
0_0402_5%~D
@PR11
0_0402_5%~D
@
1 2
PC3
1U_0603_10V4Z~D
PC3
1U_0603_10V4Z~D
1
2
PR14
100K_0402_1%~D
PR14
100K_0402_1%~D
1 2
PR12
2.2K_0402_5%~D
PR12
2.2K_0402_5%~D
1 2
PC15
10U_1206_25V6M~D
PC15
10U_1206_25V6M~D
12
PR13
33_0402_5%~D
PR13
33_0402_5%~D
1 2
PC5
2200P_0402_50V7K~D
PC5
2200P_0402_50V7K~D
12
PR6
100K_0402_5%~D
PR6
100K_0402_5%~D
12
PU1
TS5A63157DCKR_SC70-6~D
PU1
TS5A63157DCKR_SC70-6~D
V+ 5
NC
3COM 4
GND
2
IN 6
NO
1
PJPDC1
MOLEX_87438-0743
PJPDC1
MOLEX_87438-0743
11
33
44
55
22
66
77
PC12
0.1U_0603_25V7K~D
PC12
0.1U_0603_25V7K~D
12
PD6
PESD24VS2UT_SOT23-3~D
@
PD6
PESD24VS2UT_SOT23-3~D
@
2
31
PBATT1
SUYIN_200275MR009G50PZR
PBATT1
SUYIN_200275MR009G50PZR
11
33
44
55
66
88
99
22
77
GND 10
GND 11
PD13
VZ0603M260APT_0603
@
PD13
VZ0603M260APT_0603
@
1
2
PD4
RB715FGT106_UMD3
PD4
RB715FGT106_UMD3
2
3
1
PR8
100_0402_5%~D
PR8
100_0402_5%~D
1 2
PQ5
FDS6679AZ_G_SO8~D
PQ5
FDS6679AZ_G_SO8~D
S
1
S
2
S
3
G
4
D8
D7
D6
D5
G
D
S
PQ6
SSM3K7002FU_SC70-3
G
D
S
PQ6
SSM3K7002FU_SC70-3
2
13
PC8
0.22U_0603_25V7K
PC8
0.22U_0603_25V7K
12
PJP2
PAD-OPEN 1x3m
@PJP2
PAD-OPEN 1x3m
@
1 2
PC13
0.1U_0603_25V7K~D
PC13
0.1U_0603_25V7K~D
12
PR2
100K_0402_5%~D
PR2
100K_0402_5%~D
12
PL2
FBMJ4516HS720NT_2P~D
PL2
FBMJ4516HS720NT_2P~D
1 2
PR15
10K_0402_1%~D
PR15
10K_0402_1%~D
12
PL5
FBMA-L18-453215-900LMA90T_1812~D
PL5
FBMA-L18-453215-900LMA90T_1812~D
1 2
PC11
0.1U_0603_25V7K~D
PC11
0.1U_0603_25V7K~D
12
PR21
22K_0402_1%
PR21
22K_0402_1%
1 2
JRTC1
TYCO_2-1775293-2~D
JRTC1
TYCO_2-1775293-2~D
1
1
2
2G4
G3
PC14
0.1U_0603_25V7K~D
PC14
0.1U_0603_25V7K~D
12
PR23
4.7K_0805_5%~D
@PR23
4.7K_0805_5%~D
@
12
PC10
0.022U_0805_50V7K~D
PC10
0.022U_0805_50V7K~D
1 2
PR9
100_0402_5%~D
PR9
100_0402_5%~D
1 2
PC2
2200P_0402_50V7K~D
PC2
2200P_0402_50V7K~D
12
MBATT1
SUYIN_150010GR006M500ZR
MBATT1
SUYIN_150010GR006M500ZR
11
33
44
55
66
22
GND 7
GND 8
PR22
100K_0402_5%~D
PR22
100K_0402_5%~D
12
PR24
10K_0402_5%~D
PR24
10K_0402_5%~D
1 2
PC1
0.1U_0603_25V7K~D
PC1
0.1U_0603_25V7K~D
12
PR16
15K_0402_1%~D
PR16
15K_0402_1%~D
1 2
PC17
.1U_0402_16V7K
PC17
.1U_0402_16V7K
12
PL3
FBMJ4516HS720NT_2P~D
PL3
FBMJ4516HS720NT_2P~D
1 2
PL1
FBMJ4516HS720NT_2P~D
PL1
FBMJ4516HS720NT_2P~D
1 2
PC9
0.1U_0603_25V7K
PC9
0.1U_0603_25V7K
12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
BST_5V
ENTRIP2
LX_5V
BST1_5VBST1_3V
UG_5V
BST_3V
ENTRIP1
FB_3V
LG_5V
SNUB_3V
SNUB_5V
LG_3V
UG_3V
LX_3V
FB_5V
ENTRIP1
ENTRIP2
+DC1_PWR_SRC
+5V_ALWP
+5V_ALW2
+3.3V_ALWP
+DC1_PWR_SRC
+DC1_PWR_SRC
2VREF_6182
+PWR_SRC
+3.3V_ALW2
2VREF_6182
+5V_ALWP
+3.3V_ALW
+5V_ALW
+3.3V_ALWP
+3.3V_RTC_LDO
+3.3V_ALW
+5V_ALW2
+PWR_SRC
ALW_PWRGD_3V_5V <41>
THERM_STP#<22>
ALWON<41>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
+5V_ALW/+3.3V_ALW
54 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
+5V_ALW/+3.3V_ALW
54 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
+5V_ALW/+3.3V_ALW
54 66Friday, June 10, 2011
Compal Electronics, Inc.
3.3VALWP
TDC 4.729A
Peak Current 6.756A
OCP current 8.107A
5VALWP
TDC 9.044A
Peak Current 12.874A
OCP current 15.5A
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
PJP101
PAD-OPEN 1x3m
PJP101
PAD-OPEN 1x3m
1 2
PL102
3.3UH_FDVE1040-H-3R3M=P3_11.3A_20%~D
PL102
3.3UH_FDVE1040-H-3R3M=P3_11.3A_20%~D
1 2
PR108
2.2_0603_5%
PR108
2.2_0603_5%
1 2
PC114
4.7U_0805_10V6K
PC114
4.7U_0805_10V6K
12
PU100
RT8205LZQW(2) WQFN 24P PWM
PU100
RT8205LZQW(2) WQFN 24P PWM
FB1 2
REF 3
VO1 24
ENTRIP1 1
TONSEL 4
FB2 5
SKIPSEL
14
NC
18
VREG5
17
VO2
7
VREG3
8
VIN
16
GND
15
UGATE1 21
BOOT1 22
ENTRIP2 6
PGOOD 23
PHASE1 20
LGATE1 19
EN
13
BOOT2
9
UGATE2
10
PHASE2
11
LGATE2
12
P PAD
25
PQ102
FDMC8878_POWER33-8-5
PQ102
FDMC8878_POWER33-8-5
3 5
2
4
1
PC119
10U_0805_25V6K
@
PC119
10U_0805_25V6K
@
12
PR104
20K_0402_1%
PR104
20K_0402_1%
1 2
PC106
10U_0805_25V6K
PC106
10U_0805_25V6K
12
PR106
86.6K_0402_1%
PR106
86.6K_0402_1%
1 2
PR113
499K_0402_1%~D
PR113
499K_0402_1%~D
12
PR112
100K_0402_1%
PR112
100K_0402_1%
1 2
PC104
0.1U_0402_25V6
PC104
0.1U_0402_25V6
12
PC112
680P_0603_50V7K
@
PC112
680P_0603_50V7K
@
12
PQ104B
DMN66D0LDW-7 2N_SOT363-6~D
PQ104B
DMN66D0LDW-7 2N_SOT363-6~D
3
5
4
PC109
0.22U_0603_16V7K
PC109
0.22U_0603_16V7K
1 2
PR109
4.7_1206_5%
@
PR109
4.7_1206_5%
@
12
PR114
100K_0402_1%
PR114
100K_0402_1%
1 2
+
PC111
220U_D_6.3VM_R25M
+
PC111
220U_D_6.3VM_R25M
1
2
PC115
1U_0603_10V6K
@
PC115
1U_0603_10V6K
@
12
PC101
1U_0603_16V6K
PC101
1U_0603_16V6K
12
PR101
13K_0402_1%
PR101
13K_0402_1%
1 2
PR115
2K_0402_1%~D
PR115
2K_0402_1%~D
1 2
PR102
30.9K_0402_1%
PR102
30.9K_0402_1%
1 2
PJP103
PAD-OPEN 1x3m
PJP103
PAD-OPEN 1x3m
1 2
PL101
3.3UH_FDVE1040-H-3R3M=P3_11.3A_20%~D
PL101
3.3UH_FDVE1040-H-3R3M=P3_11.3A_20%~D
1 2
PQ105
PDTC115EU_SOT323-3
PQ105
PDTC115EU_SOT323-3
2
13
PR103
20K_0402_1%
PR103
20K_0402_1%
1 2
PC103
10U_0805_25V6K
PC103
10U_0805_25V6K
12
PC105
2200P_0402_50V7K
PC105
2200P_0402_50V7K
12
PQ103
FDMC7692S_POWER33-8-5
PQ103
FDMC7692S_POWER33-8-5
3 5
2
4
1
PQ104A
DMN66D0LDW-7 2N_SOT363-6~D
PQ104A
DMN66D0LDW-7 2N_SOT363-6~D
61
2
PC108
0.22U_0603_16V7K
PC108
0.22U_0603_16V7K
1 2
PD100
MMSZ5229BS_SOD323~D
PD100
MMSZ5229BS_SOD323~D
1 2
PQ101
FDMC8884_POWER33-8-5
PQ101
FDMC8884_POWER33-8-5
3 5
2
4
1
PJP104
PAD-OPEN 1x3m
PJP104
PAD-OPEN 1x3m
1 2
+
PC110
220U_D_6.3VM_R25M
+
PC110
220U_D_6.3VM_R25M
1
2
PL100
1UH_PCMB053T-1R0MS_7A_20%
@PL100
1UH_PCMB053T-1R0MS_7A_20%
@
12
PC118
10U_0805_25V6K
@
PC118
10U_0805_25V6K
@
12
PC102
2200P_0402_50V7K
PC102
2200P_0402_50V7K
12
PR105
143K_0402_1%~D
PR105
143K_0402_1%~D
1 2
PJP100
PAD-OPEN 1x3m
PJP100
PAD-OPEN 1x3m
1 2
PC100
0.1U_0402_25V6
PC100
0.1U_0402_25V6
12
PR111
300K_0402_1%
PR111
300K_0402_1%
12
PC113
680P_0603_50V7K
@
PC113
680P_0603_50V7K
@
12
PQ100
FDMC8884_POWER33-8-5
PQ100
FDMC8884_POWER33-8-5
3 5
2
4
1
PR116
0_0402_5%
PR116
0_0402_5%
1 2
PR110
4.7_1206_5%
@
PR110
4.7_1206_5%
@
12
PC117
1U_0603_10V6K
@
PC117
1U_0603_10V6K
@
12
PJP102
PAD-OPEN 1x3m
PJP102
PAD-OPEN 1x3m
1 2
PC107
10U_0805_6.3V6M
PC107
10U_0805_6.3V6M
12
PR107
2.2_0603_5%
PR107
2.2_0603_5%
1 2
PR100
0_0402_5%
PR100
0_0402_5%
1 2
PC116
0.1U_0603_25V7K
PC116
0.1U_0603_25V7K
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DH_1.5V
SW_1.5V
CS_1.5V
1.5V_SUS_PWRGD
DL_1.5V
1.5V_B+
VDD_1.5V
VLDOIN_1.5V
S5_1.5V
SNUB_1.5V
S3_1.5V
BOOT_1.5V
1.5V_B+
+V_DDR_REF
+1.5V_MEN_P
+1.5V_MEN_P +1.5V_MEM +0.75V_DDR_VTT
+0.75V_P
+PWR_SRC
+5V_ALW
+5V_ALW
+1.5V_MEN_P
+V_DDR_REF
+0.75V_P
+3.3V_ALW
+1.5V_MEN_P
+1.5V_MEN_P
0.75V_DDR_VTT_ON<40>
DDR_ON<41>
1.5V_SUS_PWRGD<41>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
+1.5V_MEN/+0.75V_DDR_VTT
55 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
+1.5V_MEN/+0.75V_DDR_VTT
55 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
+1.5V_MEN/+0.75V_DDR_VTT
55 66Friday, June 10, 2011
Compal Electronics, Inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DELL CONFIDENTIAL/PROPRIETARY
0.75Volt +/- 5%
TDC 0.525A
Peak Current 0.75A
OCP Current 0.9A
1.5Volt +/- 5%
TDC 9.74A
Peak Current 13.915A
OCP current 16.698A
Mode Level +0.75V_P +V_DDR_REF
S5 L off off
S3 L off on
S0 H on on
Note: S3 - sleep ; S5 - power off
PR200
2.2_0603_5%~D
PR200
2.2_0603_5%~D
1 2
PR204
100K_0402_1%~D
PR204
100K_0402_1%~D
12
PQ200
SIR472DP-T1-GE3_POWERPAK8-5~D
PQ200
SIR472DP-T1-GE3_POWERPAK8-5~D
4
5
1
2
3
PL200
1UH 20% FDUE1040D-H-1R0M=P3_21.3A_20%~D
PL200
1UH 20% FDUE1040D-H-1R0M=P3_21.3A_20%~D
1 2
PC200
4.7U_0805_25V6K~D
PC200
4.7U_0805_25V6K~D
12
PC207
1U_0603_10V6K~D
PC207
1U_0603_10V6K~D
PC205
10U_0805_6.3V6M~D
PC205
10U_0805_6.3V6M~D
12
PR209
0_0402_5%~D
PR209
0_0402_5%~D
1 2
PJP204
PAD-OPEN1x1m
PJP204
PAD-OPEN1x1m
1 2
PC213
0.1U_0402_16V7K~D
@PC213
0.1U_0402_16V7K~D
@
12
PC209
0.1U_0603_25V7K~D
@PC209
0.1U_0603_25V7K~D
@
12
+
PC208
330U_SX_2VY~D
+
PC208
330U_SX_2VY~D
1
2
PJP201
JUMP_1x3m
PJP201
JUMP_1x3m
11
2
2
PJP202
JUMP_1x3m
PJP202
JUMP_1x3m
11
2
2
PC201
4.7U_0805_25V6K~D
PC201
4.7U_0805_25V6K~D
12
PR205
1M_0402_1%~D
PR205
1M_0402_1%~D
1 2
PC203
2200P_0402_50V7K~D
PC203
2200P_0402_50V7K~D
12
PC211
0.033U_0402_16V7~D
PC211
0.033U_0402_16V7~D
+
PC214
330U_SX_2VY~D
@
+
PC214
330U_SX_2VY~D
@
1
2
PQ201
SIR818DP-T1-GE3_POWERPAK8-5
PQ201
SIR818DP-T1-GE3_POWERPAK8-5
5
4
2
1
3
PJP203
PAD-OPEN1x1m
PJP203
PAD-OPEN1x1m
1 2
PR206
0_0402_5%~D
PR206
0_0402_5%~D
1 2
PC212
0.1U_0402_16V7K~D
@PC212
0.1U_0402_16V7K~D
@
12
PR207
0_0402_5%~D
@PR207
0_0402_5%~D
@
12
PU200
RT8207MZQW_WQFN20_3X3
PU200
RT8207MZQW_WQFN20_3X3
VTTSNS 2
FB
6
S5
8
PGOOD
10
VDDP
12
PHASE 16
BOOT 18
VTTREF 4
PGND
14
VTTGND 1
GND 3
VDDQ 5
S3
7
TON
9
VDD
11
CS
13
LGATE
15
UGATE 17
VTT 20
VLDOIN 19
PAD 21
PR202
5.1_0603_5%~D
PR202
5.1_0603_5%~D
1 2
PR203
4.7_1206_5%
@
PR203
4.7_1206_5%
@
12
PJP200
PAD-OPEN 1x2m~D
PJP200
PAD-OPEN 1x2m~D
2 1
PC202
0.1U_0402_25V6K~D
PC202
0.1U_0402_25V6K~D
12
PR208
0_0402_5%~D
PR208
0_0402_5%~D
1 2
PR201
5.1K_0402_1%~D
PR201
5.1K_0402_1%~D
1 2
PC206
10U_0805_6.3V6M~D
PC206
10U_0805_6.3V6M~D
12
PC210
1U_0603_10V6K~D
PC210
1U_0603_10V6K~D
PC204
0.22U_0603_16V7K~D
PC204
0.22U_0603_16V7K~D
1 2
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
1.8VSP_FB
1.8VSP_LX
SNUB_1.8VSP
EN_1.8VSPEN_1.8VSP
1.8VSP_VIN
+1.8V_RUNP
+1.8V_RUNP +1.8V_RUN
+3.3V_ALW
+3.3V_RUN
RUN_ON<28,36,40,43,64>
1.8V_RUN_PWRGD <40>
SIO_SLP_S3#<11,16,28,36,40,43>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
+1.8V_RUN
56 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
+1.8V_RUN
56 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
+1.8V_RUN
56 66Friday, June 10, 2011
Compal Electronics, Inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DELL CONFIDENTIAL/PROPRIETARY
<Vo=1.8V> VFB=0.6V
Vo=VFB*(1+PR64/PR67)=0.6*(1+20K/10K)=1.8V
1.8Volt +/-5%
TDC 0.85A
Peak Current 1.215A
OCP current 1.458A
PC306
47P_0402_50V8J~D
PC306
47P_0402_50V8J~D
12
PR302
20K_0402_1%
PR302
20K_0402_1%
12
PU300
SYN470DBC_DFN10_3X3
PU300
SYN470DBC_DFN10_3X3
EN
5
PG 4
LX 3
FB 6
SVIN
8
TP
11
LX 2
PVIN
10
NC
7
PVIN
9
NC
1
PC300
22U_0805_6.3VAM
PC300
22U_0805_6.3VAM
12
PC303
22U_0805_6.3VAM
PC303
22U_0805_6.3VAM
12
PR305
10K_0402_1%
PR305
10K_0402_1%
12
PC307
0.1U_0603_25V7K~D
PC307
0.1U_0603_25V7K~D
12
PL301
1UH_PH041H-1R0MS_3.8A_20%
PL301
1UH_PH041H-1R0MS_3.8A_20%
1 2
PC302
22U_0805_6.3VAM
PC302
22U_0805_6.3VAM
12
PR304
47K_0402_5%
@PR304
47K_0402_5%
@
12
PC304
0.1U_0402_10V7K
@
PC304
0.1U_0402_10V7K
@
12
PC305
680P_0603_50V7K
@
PC305
680P_0603_50V7K
@
12
PJP301
PAD-OPEN 1x2m~D
PJP301
PAD-OPEN 1x2m~D
2 1
PR300
10K_0402_5%~D
PR300
10K_0402_5%~D
12
PR306 0_0402_5%PR306 0_0402_5%
1 2
PR303 0_0402_5%@PR303 0_0402_5%@
1 2
PJP300
PAD-OPEN 1x2m~D
PJP300
PAD-OPEN 1x2m~D
2 1
PR301
4.7_0805_5%~D
@
PR301
4.7_0805_5%~D
@
12
PC301
22P_0402_50V8J
PC301
22P_0402_50V8J
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BST_+V1.05SP
SW_+V1.05SP
UG_+V1.05SP
LG_+V1.05SP
TRIP_+V1.05SP
EN_+V1.05SP
FB_+V1.05SP
RF_+V1.05SP
+V1.05SP_B+
+PWR_SRC
+5V_ALW
+1.05V_MP
+1.05V_MP +1.05V_M
+3.3V_ALW
SIO_SLP_A#<16,40,43>
1.05V_A_PWRGD<41>
Title
Size Document Number Rev
Date: Sheet of
0.1
+1.05V_M
57 66Friday, June 10, 2011
Compal Electronics, Inc.
LA-7782
Title
Size Document Number Rev
Date: Sheet of
0.1
+1.05V_M
57 66Friday, June 10, 2011
Compal Electronics, Inc.
LA-7782
Title
Size Document Number Rev
Date: Sheet of
0.1
+1.05V_M
57 66Friday, June 10, 2011
Compal Electronics, Inc.
LA-7782
DELL CONFIDENTIAL/PROPRIETARY
S0 mode be high level
+1.05Volt +/- 5%
TDC 4.7A
Peak Current 6.5A
OCP current 7.8A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
PC403
4.7U_0805_25V6K
PC403
4.7U_0805_25V6K
12
PQ401
FDMC7692S_POWER33-8-5
PQ401
FDMC7692S_POWER33-8-5
3 5
2
4
1
PC408
1000P_0603_50V7K
@PC408
1000P_0603_50V7K
@
12
PR403
0_0402_5%
PR403
0_0402_5%
1 2
PC401
0.1U_0402_25V6
PC401
0.1U_0402_25V6
12
PC404
0.1U_0603_25V7K
PC404
0.1U_0603_25V7K
1 2
PL400
1UH_FDVE0630-H-1R0M-P3_11.9A_20%~D
PL400
1UH_FDVE0630-H-1R0M-P3_11.9A_20%~D
1 2
PJP400
PAD-OPEN 1x2m~D
PJP400
PAD-OPEN 1x2m~D
2 1
PR407
10K_0402_1%
PR407
10K_0402_1%
1 2
PR404
4.7_1206_5%
@PR404
4.7_1206_5%
@
12
PR405
470K_0402_1%
PR405
470K_0402_1%
12
PJP401
PAD-OPEN 1x2m~D
PJP401
PAD-OPEN 1x2m~D
2 1
PC405
1U_0603_6.3V6M
PC405
1U_0603_6.3V6M
12
PR406
4.99K_0402_1%
PR406
4.99K_0402_1%
12
PR401
2.2_0603_5%
PR401
2.2_0603_5%
1 2
PU400
TPS51212DSCR_SON10_3X3
PU400
TPS51212DSCR_SON10_3X3
EN
3
TRIP
2
V5IN 7
DRVH 9
SW 8
DRVL 6
VBST 10
RF
5
VFB
4
PGOOD
1
TP 11
PR400
100K_0402_1%~D
PR400
100K_0402_1%~D
12
PC407
0.1U_0402_16V7K
@
PC407
0.1U_0402_16V7K
@
12
PC402
2200P_0402_50V7K
PC402
2200P_0402_50V7K
12
PJP402
PAD-OPEN 1x2m~D
PJP402
PAD-OPEN 1x2m~D
2 1
PR402
60.4K_0402_1%
PR402
60.4K_0402_1%
1 2
PC400
4.7U_0805_25V6K
PC400
4.7U_0805_25V6K
12
+
PC406
220U_D2_4VM
+
PC406
220U_D2_4VM
1
2
PQ400
FDMC8884_POWER33-8-5
PQ400
FDMC8884_POWER33-8-5
3 5
2
4
1
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BST_+V1.05S_VCCPP
SW_+V1.05S_VCCPP
UG_+V1.05S_VCCPP
LG_+V1.05S_VCCPP
TRIP_+V1.05S_VCCPP
EN_+V1.05S_VCCPP
FB_+V1.05S_VCCPP
RF_+V1.05S_VCCPP
+V1.05S_VCCPP_B+
VSSIO_SENSE_R_FB
VTT_SENSE_FB
+PWR_SRC
+5V_ALW
+1.05VTTP
+3.3V_RUN
+3.3V_RUN
+1.05VTTP +1.05V_RUN_VTT
CPU_VTT_ON<40>
VCCP_PWRCTRL <11>
VTT_SENSE <10>
1.05V_VTTPWRGD<41,59>
VSSIO_SENSE_R <10>
Title
Size Document Number Rev
Date: Sheet of
0.1
+1.05V_RUN_VTT
58 66Friday, June 10, 2011
Compal Electronics, Inc.
LA-7782
Title
Size Document Number Rev
Date: Sheet of
0.1
+1.05V_RUN_VTT
58 66Friday, June 10, 2011
Compal Electronics, Inc.
LA-7782
Title
Size Document Number Rev
Date: Sheet of
0.1
+1.05V_RUN_VTT
58 66Friday, June 10, 2011
Compal Electronics, Inc.
LA-7782
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
From GPIO
VCCP_PWRCTRL = "High" , Vo = 1.05V (SNB)
VCCP_PWRCTRL = "Low" , Vo = 1V (IVB)
+1.05Volt +/- 2%
TDC 6A
Peak Current 8.5A
OCP current 10.2A
Local sense put on HW site
PQ500
FDMC8884_POWER33-8-5
PQ500
FDMC8884_POWER33-8-5
3 5
2
4
1
PJP502
PAD-OPEN 1x2m~D
PJP502
PAD-OPEN 1x2m~D
2 1
PR502
2.2_0603_5%
PR502
2.2_0603_5%
1 2
PJP500
PAD-OPEN 1x2m~D
PJP500
PAD-OPEN 1x2m~D
2 1
PR505
470K_0402_1%
PR505
470K_0402_1%
12
PQ501
FDMC7692S_POWER33-8-5
PQ501
FDMC7692S_POWER33-8-5
3 5
2
4
1
PC503
4.7U_0805_25V6K
PC503
4.7U_0805_25V6K
12
PR504
4.7_1206_5%
@PR504
4.7_1206_5%
@
12
PC508
1000P_0603_50V7K
@PC508
1000P_0603_50V7K
@
12
PR511
10K_0402_5%
PR511
10K_0402_5%
1 2
PR503
0_0402_5%
PR503
0_0402_5%
1 2
PC505
1U_0603_6.3V6M
PC505
1U_0603_6.3V6M
12
+
PC507
220U_D2_4VM
+
PC507
220U_D2_4VM
1
2
PR510
10K_0402_1%
PR510
10K_0402_1%
1 2
PR509
71.5K_0402_1%
PR509
71.5K_0402_1%
12
PJP501
PAD-OPEN 1x2m~D
PJP501
PAD-OPEN 1x2m~D
2 1
PR513
0_0402_5%
PR513
0_0402_5%
12
G
D
S
PQ502
SSM3K7002FU_SC70-3
G
D
S
PQ502
SSM3K7002FU_SC70-3
2
13
PC506
0.1U_0402_16V7K
@PC506
0.1U_0402_16V7K
@
12
PR507
4.32K_0402_1%
PR507
4.32K_0402_1%
12
PC501
0.1U_0402_25V6
PC501
0.1U_0402_25V6
12
PR508
0_0402_5%
PR508
0_0402_5%
12
PU500
TPS51212DSCR_SON10_3X3
PU500
TPS51212DSCR_SON10_3X3
EN
3
TRIP
2
V5IN 7
DRVH 9
SW 8
DRVL 6
VBST 10
RF
5
VFB
4
PGOOD
1
TP 11
PC504
0.1U_0603_25V7K
PC504
0.1U_0603_25V7K
1 2
PR514
10_0402_1%~D
@PR514
10_0402_1%~D
@
12
PC510
.1U_0402_16V7K
@
PC510
.1U_0402_16V7K
@
12
PC500
4.7U_0805_25V6K
PC500
4.7U_0805_25V6K
12
PC509
.01U_0402_16V7K~D
@
PC509
.01U_0402_16V7K~D
@
12
PR500
100K_0402_5%
PR500
100K_0402_5%
1 2
PC502
2200P_0402_50V7K
PC502
2200P_0402_50V7K
12
PR501
84.5K_0402_1%~D
PR501
84.5K_0402_1%~D
1 2 PL500
1UH_FDVE0630-H-1R0M-P3_11.9A_20%~D
PL500
1UH_FDVE0630-H-1R0M-P3_11.9A_20%~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VCCSA_BT_1+VCCSA_BT
+VCCSA_PWR_SRC +VCCSA_PWR_SRC
+VCCSA_EN
+VCCSA_PWRGD+VCCSA_PWRGD
+VCCSA_PHASE
+VCCSA_P
+3.3V_ALW
+VCCSA_P
+VCC_SA
GNDA_VCCSA
GNDA_VCCSA
+5V_ALW
+3.3V_RUN
VCCSA_SENSE <11>
VCCSAPWROK<41>
VCCSA_VID_1 <11>
VCCSA_VID_0 <11>
1.05V_VTTPWRGD <41,58>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
+VCC_SA
59 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
+VCC_SA
59 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
+VCC_SA
59 66Friday, June 10, 2011
Compal Electronics, Inc.
output voltage adjustable network
VID [0] VID[1] VCCSA Vout
0 0 0.9V
0 1 0.8V
1 0 0.725V
1 1 0.675V
VCCSA
TDC 4.2A
Peak Current 6A
OCP current 7.2A
The 1k PD on the VCCSA VIDs are empty.
These should be stuffed to ensure that
VCCSA VID is 00 prior to VCCIO stability.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DELL CONFIDENTIAL/PROPRIETARY
PR607
0_0402_5%
PR607
0_0402_5%
1 2
PC608
22U_0805_6.3V6M
PC608
22U_0805_6.3V6M
1 2
PC607
0.1U_0402_25V6K~D
PC607
0.1U_0402_25V6K~D
12
PC614
10U_0805_25V6M
PC614
10U_0805_25V6M
1
2
PC613
0.1U_0603_25V7K
PC613
0.1U_0603_25V7K
1 2
PC600
2200P_0402_50V7K
PC600
2200P_0402_50V7K
1
2
PC610
2200P_0402_50V7K
PC610
2200P_0402_50V7K
12
PC604
1000P_0603_50V7K
@PC604
1000P_0603_50V7K
@
12
PC603
0.1U_0603_25V7K
PC603
0.1U_0603_25V7K
1 2
PR603
100K_0402_5%
PR603
100K_0402_5%
12
PL600
0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
PL600
0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
1 2
PC616
0.22U_0402_10V6K
PC616
0.22U_0402_10V6K
12
PC602
2.2U_0603_10V7K
PC602
2.2U_0603_10V7K
1 2
PC618
0.01U_0402_25V7K
PC618
0.01U_0402_25V7K
1 2
PC606
22U_0805_6.3V6M
@
PC606
22U_0805_6.3V6M
@
1 2
PR606
10_0402_1%
PR606
10_0402_1%
12
PR604
0_0402_5%
PR604
0_0402_5%
1 2
PJP600
PAD-OPEN 1x2m
PJP600
PAD-OPEN 1x2m
1 2
PR608
2.2_0603_1%
PR608
2.2_0603_1%
1 2
PR602
0_0402_5%
PR602
0_0402_5%
1 2
PR600
0_0402_5%
PR600
0_0402_5%
12
PR601
1K_0402_5%
PR601
1K_0402_5%
12
PJP602
PAD-OPEN1x1m
PJP602
PAD-OPEN1x1m
12
PC617
3300P_0402_50V7K
PC617
3300P_0402_50V7K
12
PU600
TPS51461RGER_QFN24_4X4~D
PU600
TPS51461RGER_QFN24_4X4~D
V5DRV 18
PGND
20 SW 11
EN 13
SW 9
VIN
24
VOUT
5
PGOOD 16
COMP
3
VID0 14
MODE
6
SW 10
SLEW
4
PGND
21
PGND
19
SW 8
GND
1
VIN
23
VIN
22
VREF
2
VID1 15
V5FILT 17
SW 7
BST 12
TP 25
PR612
0_0402_5%
PR612
0_0402_5%
12
PJP601
PAD-OPEN 1x3m
PJP601
PAD-OPEN 1x3m
1 2
PR610
33K_0402_5%
@PR610
33K_0402_5%
@
12
PC601
1U_0603_10V6K
PC601
1U_0603_10V6K
1 2
PC612
22U_0805_6.3V6M
PC612
22U_0805_6.3V6M
1 2
PC609
22U_0805_6.3V6M
PC609
22U_0805_6.3V6M
1 2
PR613
5.1K_0402_1%~D
PR613
5.1K_0402_1%~D
12
PR605
1K_0402_5%
PR605
1K_0402_5%
12
PC615
10U_0805_25V6M
PC615
10U_0805_25V6M
1
2
PC611
22U_0805_6.3V6M
PC611
22U_0805_6.3V6M
1 2
PC605
22U_0805_6.3V6M
@
PC605
22U_0805_6.3V6M
@
1 2
PR611
100_0402_5%
PR611
100_0402_5%
12
PR609
4.7_0805_5%~D
@
PR609
4.7_0805_5%~D
@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
UGATE2
PHASE2
BOOT2
ISEN3
ISEN1
PWM3
UGATE2
SDA
ISEN3
ISEN2
UGATE1
UGATE3
ISEN3
PHASE2
BOOT2
VSUM+
ISEN2
VSUM-
VSUM-
VSUM+
ISEN3
VSUM-
+VCC_PWR_SRC
SCLK
BOOT3
PHASE1
P3_SW
ISEN2
BOOT1
ISEN1
PWM3_1
VSUM+
ISEN1
PHASE3
SDA
BOOT1
VSUM-
LGATE3
PHASE1
UGATE1
LGATE1
ALERT#
+VCC_PWR_SRC
SCLK
ALERT#
PGOOD
NTC
ISEN1G
ISEN2G
VR_HOT#
VR_EN
COMP
ISEN1
COMP
ISEN2
VSUM+
VSUM-
NTCG
LGATE2
VCCP
PGOODG
IMVP_PWRGD
P2_SW
P1_SW
LGATE2
LGATE1
+VCC_CORE
+VCC_CORE
+5V_RUN
+1.05V_RUN_VTT
+3.3V_RUN
+5V_RUN
+PWR_SRC
+5V_RUN
+5V_RUN
+VCC_CORE
+VCC_PWR_SRC
VCC_AXG_SENSE<11>
VSS_AXG_SENSE<11>
VIDALERT_N<10>
1.05V_0.8V_PWROK<14,41>
H_PROCHOT#<7,41,62> IMVP_VR_ON<40>
PWMG2 <61>
UGATE1G <61>
LGATE1G <61>
BOOT1G <61>
PHASE1G <61>
VSUMG-<61>
VSUMG+<61>
VSUMG-<61>
VIDSCLK<10>
VIDSOUT<10>
VCCSENSE <10>
VSSSENSE <10>
IMVP_PWRGD <40>
ISEN2G<61>
ISEN1G<61>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
+VCC_CORE
60 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
+VCC_CORE
60 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
+VCC_CORE
60 66Friday, June 10, 2011
Compal Electronics, Inc.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DELL CONFIDENTIAL/PROPRIETARY
VCC_core
TDC 52A
Peak Current 94A
OCP current 116A
Load line -1.9mV/A
FSW=400kHz
Local sense put on HW site
Local sense put on HW site
PR719
4.7_1206_5%
@
PR719
4.7_1206_5%
@
12
PR703
267K_0402_1%
PR703
267K_0402_1%
12
PC737
150P_0402_50V8F~D
PC737
150P_0402_50V8F~D
12
PR763
649_0402_1%~D
@PR763
649_0402_1%~D
@
1 2
PC709
0.068U_0603_50V7K~D
PC709
0.068U_0603_50V7K~D
12
PC730 10P_0402_25V8J
@
PC730 10P_0402_25V8J
@
12
PR764
3.65K_0603_1%
PR764
3.65K_0603_1%
1 2
PC715
10U_0805_25V6K
@
PC715
10U_0805_25V6K
@
12
PC732
390P_0402_50V7K
PC732
390P_0402_50V7K
12
PR727 0_0402_5%PR727 0_0402_5%
1 2
+
PC722
100U_25V_M
+
PC722
100U_25V_M
1
2
PL703
0.22UH_FDUE0640-H-R22M=P3_25A_20%~D
PL703
0.22UH_FDUE0640-H-R22M=P3_25A_20%~D
12
PR752
1_0402_5%
PR752
1_0402_5%
12
PR755
2.61K_0402_1%
PR755
2.61K_0402_1%
12
PC749
0.22U_0603_16V7K
PC749
0.22U_0603_16V7K
1 2
PC703
330P_0402_50V7K~D
@
PC703
330P_0402_50V7K~D
@
12
PC711
3300P_0402_50V7K~D
@PC711
3300P_0402_50V7K~D
@
12
PC704
390P_0402_50V7K
PC704
390P_0402_50V7K
12
PR749
3.57K_0402_1%
PR749
3.57K_0402_1%
12
PC769
2200P_0402_50V7K~D
PC769
2200P_0402_50V7K~D
1 2
PC736
0.22U_0402_6.3V6K
PC736
0.22U_0402_6.3V6K
12
PH703
10KB_0402_5%_ERTJ0ER103J
PH703
10KB_0402_5%_ERTJ0ER103J
12
PC719
680P_0603_50V7K
@
PC719
680P_0603_50V7K
@
12
PR715
0_0402_5%
@PR715
0_0402_5%
@
1 2
PC731
0.22U_0603_16V7K
PC731
0.22U_0603_16V7K
1 2
PR726 0_0402_5%PR726 0_0402_5%
1 2
PR758
4.7_0603_5%~D
PR758
4.7_0603_5%~D
12
PC742
10U_0805_25V6K
@
PC742
10U_0805_25V6K
@
12
PR766
1_0402_5%
PR766
1_0402_5%
12
PR750
267K_0402_1%
PR750
267K_0402_1%
12
PR753
2K_0402_1%
PR753
2K_0402_1%
1 2
PQ703
CSD87351Q5D_SON8~D
PQ703
CSD87351Q5D_SON8~D
1
2
5
4
6
7
3
8
PC772
2200P_0402_50V7K~D
@
PC772
2200P_0402_50V7K~D
@
1 2
PC713
10U_0805_25V6K
PC713
10U_0805_25V6K
12
PR711
4.7_0603_5%~D
PR711
4.7_0603_5%~D
12
PQ702
CSD87351Q5D_SON8~D
PQ702
CSD87351Q5D_SON8~D
1
2
5
4
6
7
3
8
PH702
470K_0402_5%_ TSM0B474J4702RE
PH702
470K_0402_5%_ TSM0B474J4702RE
12
PC727
10U_0805_25V6K
@
PC727
10U_0805_25V6K
@
12
PR716
0_0402_5%~D
PR716
0_0402_5%~D
12
PR765
10K_0402_1%
@PR765
10K_0402_1%
@
12
PR705
42.2K_0402_1%~D
PR705
42.2K_0402_1%~D
12
PC706
0.01U_0402_50V7K
PC706
0.01U_0402_50V7K
1 2
PL706
HCB4532KF-800T90_1812
@PL706
HCB4532KF-800T90_1812
@
1 2
PC716
.1U_0402_16V7K
PC716
.1U_0402_16V7K
12
PR722 0_0402_5%PR722 0_0402_5%
1 2
PR710
0_0603_5%
PR710
0_0603_5%
12
PR704
499_0402_1%~D
PR704
499_0402_1%~D
12
PC714
10U_0805_25V6K
PC714
10U_0805_25V6K
12
+
PC724
100U_25V_M
+
PC724
100U_25V_M
1
2
PC701
330P_0402_50V7K~D
PC701
330P_0402_50V7K~D
12
PC705
47P_0402_50V8J~D
PC705
47P_0402_50V8J~D
1 2
PR729
1_0402_5%
PR729
1_0402_5%
12
PC747
0.068U_0402_16V7K
@PC747
0.068U_0402_16V7K
@
12
PC708
0.022U_0402_25V7K
@PC708
0.022U_0402_25V7K
@
12
PR730 0_0402_5%PR730 0_0402_5%
1 2
PR761
10K_0603_1%
PR761
10K_0603_1%
1 2
PC700
0.1U_0402_25V6K~D
PC700
0.1U_0402_25V6K~D
12
PR708
0_0402_5%
@PR708
0_0402_5%
@
1 2
PC739
680P_0402_50V7K~D
PC739
680P_0402_50V7K~D
1 2
PR701
2K_0402_1%
PR701
2K_0402_1%
12
PC718
0.22U_0402_16V7K~D
PC718
0.22U_0402_16V7K~D
12
PR713
348_0402_1%~D
PR713
348_0402_1%~D
1 2
PL702
0.22UH_FDUE0640-H-R22M=P3_25A_20%~D
PL702
0.22UH_FDUE0640-H-R22M=P3_25A_20%~D
12
PC766
0.1U_0402_25V6K~D
PC766
0.1U_0402_25V6K~D
12
PR714
3.83K_0402_1%
PR714
3.83K_0402_1%
1 2
PR734
3.83K_0402_1%
PR734
3.83K_0402_1%
1 2
PR736
27.4K_0402_1%
PR736
27.4K_0402_1%
12
PR728
1_0402_1%~D
PR728
1_0402_1%~D
12
PR725
3.65K_0603_1%
PR725
3.65K_0603_1%
1 2
PC751
2200P_0402_25V7K~D
@PC751
2200P_0402_25V7K~D
@
1 2
PC710
0.1U_0402_10V7K~D
PC710
0.1U_0402_10V7K~D
12
PR740
4.7_1206_5%
@
PR740
4.7_1206_5%
@
12
PC745
0.01UF_0402_25V7K
PC745
0.01UF_0402_25V7K
12
PC729
43P_0402_50V8J
PC729
43P_0402_50V8J
12
PC744
330P_0402_50V7K
@PC744
330P_0402_50V7K
@
1 2
PH701
470K_0402_5%_ TSM0B474J4702RE
PH701
470K_0402_5%_ TSM0B474J4702RE
12
PC741
10U_0805_25V6K
PC741
10U_0805_25V6K
12
PC743
0.1U_0402_25V6K~D
PC743
0.1U_0402_25V6K~D
12
PC720
1U_0603_10V6K
PC720
1U_0603_10V6K
12
PU700
ISL95836HRTZ-T_TQFN40_5X5~D
PU700
ISL95836HRTZ-T_TQFN40_5X5~D
COMPG 37
RTNG 39
FBG 38
PGOODG 36
SDA
7
SCLK
5
ISEN2
12
FB
17
ISUMP
14
ISEN3/FB2
11
COMP
18
NTC
10
VR_HOT#
8
ALERT#
6
PGOOD
19
ISUMN
15
VDD 25
RTN
16
ISEN1
13
VR_ON
9
BOOT1
20
UGATE1 21
PHASE1 22
LGATE1 23
PWM3 24
VCCP 26
LGATE2 27
PHASE2 28
UGATE2 29
BOOT2 30
PWM2G 35
LGATE1G 34
PHASE1G 33
UGATE1G 32
BOOT1G 31
NTCG
4
ISUMNG 40
ISUMPG
1
ISEN2G
3ISEN1G
2
TP
41
PC746
0.22U_0603_10V7K
PC746
0.22U_0603_10V7K
12
PC733
47P_0402_50V8J~D
PC733
47P_0402_50V8J~D
12
PR745
499_0402_1%~D
PR745
499_0402_1%~D
12
PR762
10K_0402_1%
@PR762
10K_0402_1%
@
12
PR760
4.7_1206_5%
@
PR760
4.7_1206_5%
@
12
PC726
10U_0805_25V6K
PC726
10U_0805_25V6K
12
PC740
10U_0805_25V6K
PC740
10U_0805_25V6K
12
PQ701
CSD87351Q5D_SON8~D
PQ701
CSD87351Q5D_SON8~D
1
2
5
4
6
7
3
8
PR721
27.4K_0402_1%
PR721
27.4K_0402_1%
12
PR759
523_0402_1%
PR759
523_0402_1%
12
PC767
2200P_0402_50V7K~D
PC767
2200P_0402_50V7K~D
1 2
PR746 130_0402_1%PR746 130_0402_1%
12
PR720
10K_0603_1%
PR720
10K_0603_1%
1 2
PR743
10K_0402_1%
@PR743
10K_0402_1%
@
12
PJP700
PAD-OPEN 1x3m
PJP700
PAD-OPEN 1x3m
1 2
PR756 11K_0402_1%PR756 11K_0402_1%
12
PC735
680P_0603_50V7K
@
PC735
680P_0603_50V7K
@
12
PR707
2.61K_0402_1%
PR707
2.61K_0402_1%
12
PC712
0.22U_0603_16V7K
PC712
0.22U_0603_16V7K
1 2
PR712
649_0402_1%~D
@PR712
649_0402_1%~D
@
1 2
PC748
0.01U_0402_50V7K
PC748
0.01U_0402_50V7K
1 2
PR742
10K_0603_1%
PR742
10K_0603_1%
1 2
PR731 0_0402_5%@PR731 0_0402_5%@
1 2
PR751
5.76K_0402_1%
PR751
5.76K_0402_1%
1 2
PR717
10K_0402_1%
@PR717
10K_0402_1%
@
12
PC728
0.1U_0402_25V6K~D
PC728
0.1U_0402_25V6K~D
12
PR738
4.7_0603_5%~D
PR738
4.7_0603_5%~D
12
PR702
3.57K_0402_1%
PR702
3.57K_0402_1%
12
PH700
10KB_0402_5%_ERTJ0ER103J
PH700
10KB_0402_5%_ERTJ0ER103J
12
PC752
680P_0603_50V7K
@
PC752
680P_0603_50V7K
@
12
PC768
2200P_0402_50V7K~D
PC768
2200P_0402_50V7K~D
1 2
PC750
.1U_0402_16V7K
PC750
.1U_0402_16V7K
12
PR737 1.91K_0402_1%PR737 1.91K_0402_1%
12
PR744 75_0402_5%@PR744 75_0402_5%@
12
PR709
11K_0402_1%
PR709
11K_0402_1%
12
PR723
0_0402_5%~D
PR723
0_0402_5%~D
1 2
PR733
0_0402_5%
@PR733
0_0402_5%
@
1 2
PC721
1U_0603_10V6K
PC721
1U_0603_10V6K
12
PR732 0_0402_5%PR732 0_0402_5%
1 2
PR739 54.9_0402_1%PR739 54.9_0402_1%
12
+
PC723
100U_25V_M
+
PC723
100U_25V_M
1
2
ISL6208CRZ-T_QFN8_3X3
PU701
ISL6208CRZ-T_QFN8_3X3
PU701
VCC
5
FCCM
6
PWM
2
BOOT 1
PHASE 7
UGATE 8
LGATE 4
GND
3
PGND 9
PC734
0.22U_0402_6.3V6K
PC734
0.22U_0402_6.3V6K
12
PC725
10U_0805_25V6K
PC725
10U_0805_25V6K
12
PC717
0.22U_0402_16V7K~D
PC717
0.22U_0402_16V7K~D
12
PR735 0_0402_5%PR735 0_0402_5%
1 2
PC738
0.22U_0402_6.3V6K
PC738
0.22U_0402_6.3V6K
12
PR747
3.65K_0603_1%
PR747
3.65K_0603_1%
1 2
PC773
2200P_0402_50V7K~D
@
PC773
2200P_0402_50V7K~D
@
1 2
PL701
0.22UH_FDUE0640-H-R22M=P3_25A_20%~D
PL701
0.22UH_FDUE0640-H-R22M=P3_25A_20%~D
12
PR741 0_0402_5%@PR741 0_0402_5%@
1 2
PC702
150P_0402_50V8F~D
PC702
150P_0402_50V8F~D
12
PR748
10K_0402_1%
@PR748
10K_0402_1%
@
12
PR718
0_0402_5%~D
@PR718
0_0402_5%~D
@
1 2
PC774
2200P_0402_50V7K~D
@
PC774
2200P_0402_50V7K~D
@
1 2
PR724
10K_0402_1%
@PR724
10K_0402_1%
@
12
PC707
1U_0603_10V6K
PC707
1U_0603_10V6K
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
GP2_SW
BOOT2G
PHASE2G
UGATE2G
+GFX_PWR_SRC
+GFX_PWR_SRC
GP1_SW
LGATE2G
+VCC_GFXCORE
+VCC_PWR_SRC
+VCC_GFXCORE
+5V_RUN
PWMG2<60>
VSUMG+ <60>
ISEN2G <60>
VSUMG- <60>
ISEN1G <60>
UGATE1G<60>
BOOT1G<60>
PHASE1G<60>
LGATE1G<60>
ISEN1G<60>
VSUMG+ <60>
VSUMG- <60>
ISEN2G <60>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
+VCC_GFXCORE
61 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
+VCC_GFXCORE
61 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
+VCC_GFXCORE
61 66Friday, June 10, 2011
Compal Electronics, Inc.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
VCC_GFXCORE
TDC 38A
Peak Current 46A
OCP current 57.18A
Load line -3.9mV/A
FSW=400kHz
PC765
680P_0603_50V7K
@
PC765
680P_0603_50V7K
@
12
PC758
0.22U_0603_16V7K
PC758
0.22U_0603_16V7K
1 2
PJP702
PAD-OPEN 1x3m
PJP702
PAD-OPEN 1x3m
1 2
PR776
4.7_1206_5%
@
PR776
4.7_1206_5%
@
12
PC754
10U_0805_25V6K
PC754
10U_0805_25V6K
12
PR775
1_0402_5%
PR775
1_0402_5%
12
PC755
10U_0805_25V6K
@
PC755
10U_0805_25V6K
@
12
PC776
2200P_0402_50V7K~D
@
PC776
2200P_0402_50V7K~D
@
1 2
PR774
3.65K_0603_1%
PR774
3.65K_0603_1%
1 2
PC761
10U_0805_25V6K
PC761
10U_0805_25V6K
12
ISL6208CRZ-T_QFN8_3X3
PU702
ISL6208CRZ-T_QFN8_3X3
PU702
VCC
5
FCCM
6
PWM
2
BOOT 1
PHASE 7
UGATE 8
LGATE 4
GND
3
PGND 9
PL705
0.22UH_FDUE0640-H-R22M=P3_25A_20%~D
PL705
0.22UH_FDUE0640-H-R22M=P3_25A_20%~D
12
PR772 1_0402_5%PR772 1_0402_5%
12
PC757
1U_0603_10V6K
PC757
1U_0603_10V6K
12
PQ704
CSD87351Q5D_SON8~D
PQ704
CSD87351Q5D_SON8~D
1
2
5
4
6
7
3
8
PR779
4.7_0603_5%~D
PR779
4.7_0603_5%~D
12
PR768
4.7_0603_5%~D
PR768
4.7_0603_5%~D
12
PR770
10K_0603_1%
PR770
10K_0603_1%
12
PC764
0.22U_0603_16V7K
PC764
0.22U_0603_16V7K
1 2
PC763
0.1U_0402_25V6K~D
PC763
0.1U_0402_25V6K~D
12
PC760
10U_0805_25V6K
PC760
10U_0805_25V6K
12
PR767
0_0603_5%
PR767
0_0603_5%
12
PC771
2200P_0402_50V7K~D
PC771
2200P_0402_50V7K~D
1 2
PC759
680P_0603_50V7K
@
PC759
680P_0603_50V7K
@
12
PC775
2200P_0402_50V7K~D
@
PC775
2200P_0402_50V7K~D
@
1 2
PQ705
CSD87351Q5D_SON8~D
PQ705
CSD87351Q5D_SON8~D
1
2
5
4
6
7
3
8
PR769
4.7_1206_5%
@
PR769
4.7_1206_5%
@
12
PR771
3.65K_0603_1%
PR771
3.65K_0603_1%
12
PR773 10K_0402_1%PR773 10K_0402_1%
1 2
PL707
HCB4532KF-800T90_1812
@PL707
HCB4532KF-800T90_1812
@
1 2
PL704
0.22UH_FDUE0640-H-R22M=P3_25A_20%~D
PL704
0.22UH_FDUE0640-H-R22M=P3_25A_20%~D
12
PC753
10U_0805_25V6K
PC753
10U_0805_25V6K
12
PR777
10K_0603_1%
PR777
10K_0603_1%
1 2
PC770
2200P_0402_50V7K~D
PC770
2200P_0402_50V7K~D
1 2
PC756
0.1U_0402_25V6K~D
PC756
0.1U_0402_25V6K~D
12
PR778
10K_0402_1%
PR778
10K_0402_1%
1 2
PC762
10U_0805_25V6K
@
PC762
10U_0805_25V6K
@
12
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
ICOUT
CHG_LGATE
CHG_UGATE
+VCHGR_B
CSSN_1
MAX8731_IINP
BOOT_D
+VCHGR_L
MAX8731_REF
VFB
MAX8731A_LDO
+DCIN
CSSP_1
MAX8731_REF
BOOT
MAX8731A_LDO
MAX8731_REF
MAX8731_IINP
MAX8731_REF
+5V_ALW
GNDA_CHG
+5V_ALW
+SDC_IN
+DC_IN
+5V_ALW
+VCHGR
CHAGER_SRC
+VCHGR
+PWR_SRC
GNDA_CHG
GNDA_CHG
+5V_ALW
GNDA_CHG
GNDA_CHG
GNDA_CHG
+SDC_IN
+DC_IN_SS
GNDA_CHG GNDA_CHG
GNDA_CHG
GNDA_CHG
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW2
+DOCK_PWR_BAR
+DC_IN_SS
CHARGER_SMBDAT<41>
ACAV_IN<22,41,63>
DOCK_DCIN_IS- <39>
CHARGER_SMBCLK<41>
DOCK_DCIN_IS+ <39>
ACAV_IN_NB <40,41,63>
CSS_GC<63>
DC_BLOCK_GC <63>
+CHGR_DC_IN<63> DK_CSS_GC <63>
MAX8731_IINP<22>
PROCHOT_GATE <40> ACAV_IN <22,41,63>
DYN_TUR_CURRNT_SET#<41>
H_PROCHOT# <7,41,60>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
Charger
62 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
Charger
62 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
Charger
62 66Friday, June 10, 2011
Compal Electronics, Inc.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
Maximum charging current is 7.2A
To preset system to throtlle
switching from AC to DC
Adapter Protection Circuit for Turbo Mode
130W
High
Low
DYN_TUR_CURRENT_SET#
90W
E2 AC_OK=17.7 Volt
PR1313
TI bq24745 = 316K
Intersil ISL88731 = 226K
Maxim = 383K
Vref
TI bq24747 = 3.3V
Intersil ISL88731C = 3.2V
VDDP
TI bq24747 = 6V
Intersil ISL88731C = 5.1V
PC1335
0.1U_0603_25V7K~D
@PC1335
0.1U_0603_25V7K~D
@
1 2
G
S
D
PQ1302
NTR4502PT1G_SOT23-3~D
G
S
D
PQ1302
NTR4502PT1G_SOT23-3~D
2
13
PR1332
4.7_1206_5%~D
PR1332
4.7_1206_5%~D
1 2
PC1340
220P_0402_50V8J~D
PC1340
220P_0402_50V8J~D
12
PC1320
56P_0402_50V8~D
@
PC1320
56P_0402_50V8~D
@
1 2
PC1338
100P_0402_50V8J~D
PC1338
100P_0402_50V8J~D
12
PC1318
2200P_0402_50V7K~D
@PC1318
2200P_0402_50V7K~D
@
12
PR1301
0.01_1206_1%~D
PR1301
0.01_1206_1%~D
1
3
4
2
PC1329
0.1U_0603_25V7K~D
PC1329
0.1U_0603_25V7K~D
12
PR1349
162K_0402_1%~D
PR1349
162K_0402_1%~D
12
PC1326
0.01U_0402_25V7K~D
PC1326
0.01U_0402_25V7K~D
12
PC1331
10U_1206_25V6M~D
PC1331
10U_1206_25V6M~D
12
PC1321
120P_0402_50VNPO~D
@PC1321
120P_0402_50VNPO~D
@
1 2
PQ1304
SIR472DP-T1-GE3_POWERPAK8-5
PQ1304
SIR472DP-T1-GE3_POWERPAK8-5
4
5
1
2
3
PC1336
100P_0402_50V8J~D
@
PC1336
100P_0402_50V8J~D
@
12
PR1320
0_0402_5%~D
PR1320
0_0402_5%~D
1 2
G
D
S
PQ1306
RHU002N06_SOT323-3~D
G
D
S
PQ1306
RHU002N06_SOT323-3~D
2
13
PC1317
220P_0402_50V7K~D
@PC1317
220P_0402_50V7K~D
@
12
PC1319
3300P_0402_50V7K~D
@
PC1319
3300P_0402_50V7K~D
@
12
G
D
S
PQ1309
RHU002N06_SOT323-3~D
G
D
S
PQ1309
RHU002N06_SOT323-3~D
2
13
PR1338
10K_0402_1%~D
PR1338
10K_0402_1%~D
12
PR1302
0_0402_5%~D
PR1302
0_0402_5%~D
1 2
PR1326
0.01_1206_1%~D
PR1326
0.01_1206_1%~D
1
3
4
2
PC1311
1U_0603_10V6K~D
PC1311
1U_0603_10V6K~D
1 2
PR1317
49.9K_0402_1%~D
PR1317
49.9K_0402_1%~D
12
PR1330
10_0402_5%~D
PR1330
10_0402_5%~D
12
PR1343
20K_0402_1%~D
PR1343
20K_0402_1%~D
1 2
PR1319
4.7_0603_5%~D
PR1319
4.7_0603_5%~D
1 2
G
D
S
PQ1303B
NTGD4161PT1G_TSOP6~D
G
D
S
PQ1303B
NTGD4161PT1G_TSOP6~D
3
42
PR1336
47K_0402_1%~D
PR1336
47K_0402_1%~D
12
PR1350
113K_0402_1%~D
PR1350
113K_0402_1%~D
12
PC1322
1000P_0603_50V7K~D
PC1322
1000P_0603_50V7K~D
12
PD1301
BAT54HT1G_SOD323-2~D
@
PD1301
BAT54HT1G_SOD323-2~D
@
12
PC1303
0.1U_0603_25V7K~D
PC1303
0.1U_0603_25V7K~D
1 2
PC1341
100P_0402_50V8J~D
PC1341
100P_0402_50V8J~D
12
PQ1307A
DMN66D0LDW-7 2N_SOT363-6~D
PQ1307A
DMN66D0LDW-7 2N_SOT363-6~D
61
2
PR1347
42.2K_0402_1%~D
PR1347
42.2K_0402_1%~D
12
PR1346
22.6K_0402_1%~D
PR1346
22.6K_0402_1%~D
12
PC1301
47P_0402_50V8J~D
PC1301
47P_0402_50V8J~D
12
PR1312
0_0402_5%~D
PR1312
0_0402_5%~D
1 2
PC1339
100P_0402_50V8J~D
PC1339
100P_0402_50V8J~D
12
PR1334
221K_0402_1%~D
PR1334
221K_0402_1%~D
1 2
PR1325
4.7K_0402_5%~D
PR1325
4.7K_0402_5%~D
12
PC1306
0.1U_0805_50V7M~D
PC1306
0.1U_0805_50V7M~D
12
PR1322
0_0603_5%~D
PR1322
0_0603_5%~D
12
PR1328
100_0402_5%~D
PR1328
100_0402_5%~D
1 2
PR1304
10_0402_5%~D
PR1304
10_0402_5%~D
12
PR1333
1M_0402_1%~D
PR1333
1M_0402_1%~D
1 2
PC1309
1U_0603_10V6K~D
PC1309
1U_0603_10V6K~D
12
PR1300
0_0402_5%~D
PR1300
0_0402_5%~D
1 2
PR1309
1_0805_5%~D
@PR1309
1_0805_5%~D
@
1 2
PR1318
2.2_0603_1%~D
PR1318
2.2_0603_1%~D
1 2
PC1323
220P_0402_50V8J~D
@
PC1323
220P_0402_50V8J~D
@
12
PU1303B
LM393DR_SO8~D
PU1303B
LM393DR_SO8~D
+
5
-
6O7
P8
G
4
PR1305
10_0402_5%~D
PR1305
10_0402_5%~D
12
PR1313
226K_0402_1%~D
PR1313
226K_0402_1%~D
1 2
PC1312
2200P_0402_50V7K~D
PC1312
2200P_0402_50V7K~D
12
PR1329
8.45K_0402_1%~D
@
PR1329
8.45K_0402_1%~D
@
12
PL1301
5.6UH_FDVE1040-H-5R6M-P3_9.2A_20%~D
PL1301
5.6UH_FDVE1040-H-5R6M-P3_9.2A_20%~D
12
PC1324
0.01U_0402_25V7K~D
PC1324
0.01U_0402_25V7K~D
12
PR1341
150K_0402_1%~D
PR1341
150K_0402_1%~D
12
PU1300
ISL88731C_QFN28_5X5~D
PU1300
ISL88731C_QFN28_5X5~D
UGATE 24
CSOP 18
PHASE 23
VFB 15
SDA
9
VICM
8
ICREF 1
DCIN
22
ACIN
2
VDDSMB
11
SCL
10
ACOK
13
NC
14
BOOT 25
NC 16
EAO
4
VDDP 21
ICOUT 26
CSSP 28
CSON 17
PGND 19
LGATE 20
FBO
6
EAI
5
CSSN 27
VREF
3
CE
7
GND
12
TP
29
PR1323
200K_0402_5%~D
@PR1323
200K_0402_5%~D
@
1 2
PD1302
BAT54CW_SOT323~D
PD1302
BAT54CW_SOT323~D
3
2
1
PC1305
0.1U_0603_25V7K~D
PC1305
0.1U_0603_25V7K~D
1 2
PC1327
1U_0603_10V6K~D
@
PC1327
1U_0603_10V6K~D
@
12
PR1303
10K_0402_5%~D
PR1303
10K_0402_5%~D
12
PU1302
TC7SH08FU_SSOP5~D
PU1302
TC7SH08FU_SSOP5~D
B1
A2
G
3
O
4
P5
PC1307
0.01U_0402_25V7K~D
PC1307
0.01U_0402_25V7K~D
12
G
S
D
PQ1301
NTR4502PT1G_SOT23-3~D
G
S
D
PQ1301
NTR4502PT1G_SOT23-3~D
2
13
PQ1300
SI4835DDY-T1-GE3_SO8~D
PQ1300
SI4835DDY-T1-GE3_SO8~D
36
5
7
82
4
1
G
D
S
PQ1303A
NTGD4161PT1G_TSOP6~D
G
D
S
PQ1303A
NTGD4161PT1G_TSOP6~D
1
65
PC1310
0.1U_0603_25V7K~D
PC1310
0.1U_0603_25V7K~D
12
PU1303A
LM393DR_SO8~D
PU1303A
LM393DR_SO8~D
+
3
-
2O1
P8
G
4
PC1302
0.1U_0603_25V7K~D
@
PC1302
0.1U_0603_25V7K~D
@
12
PR1339
0_0402_5%~D
PR1339
0_0402_5%~D
1 2
PC1304
0.047U_0603_25V7M~D
PC1304
0.047U_0603_25V7M~D
1 2
PR1327
10K_0402_5%~D
@PR1327
10K_0402_5%~D
@
1 2
PR1324
7.5K_0402_5%~D
@PR1324
7.5K_0402_5%~D
@
1 2
PR1340
1.8M_0402_1%
PR1340
1.8M_0402_1%
1 2
PR1351
100K_0402_5%~D
PR1351
100K_0402_5%~D
12
PR1342
0_0402_5%~D
PR1342
0_0402_5%~D
1 2
PC1315
10U_1206_25V6M~D
PC1315
10U_1206_25V6M~D
12
PR1311
10K_0402_5%~D
@
PR1311
10K_0402_5%~D
@
12
PR1310
10K_0402_1%~D
PR1310
10K_0402_1%~D
12
PC1342
0.1U_0402_25V4Z~D
PC1342
0.1U_0402_25V4Z~D
12
PC1337
0.01U_0402_25V7K~D
@
PC1337
0.01U_0402_25V7K~D
@
12
PJP1301
PAD-OPEN1x1m
PJP1301
PAD-OPEN1x1m
1 2
PC1332
10U_1206_25V6M~D
PC1332
10U_1206_25V6M~D
12
PJP1300
PAD-OPEN 4x4m
PJP1300
PAD-OPEN 4x4m
1 2
ES2AA-13-F
PD1300@
ES2AA-13-F
PD1300@
2 1
PC1325
0.01U_0402_25V7K~D
@
PC1325
0.01U_0402_25V7K~D
@
12
PC1330
10U_1206_25V6M~D
PC1330
10U_1206_25V6M~D
12
PR1335
232K_0402_1%~D
PR1335
232K_0402_1%~D
12
PC1333
0.1U_0603_25V7K~D
@PC1333
0.1U_0603_25V7K~D
@
1 2
PC1328
0.1U_0402_10V7K~D
@
PC1328
0.1U_0402_10V7K~D
@
12
PC1316
0.1U_0402_10V7K~D
PC1316
0.1U_0402_10V7K~D
12
PR1306
100K_0402_1%~D
PR1306
100K_0402_1%~D
12
PR1316
15.8K_0402_1%~D
PR1316
15.8K_0402_1%~D
12
PR1348
41.2K_0402_1%~D
@
PR1348
41.2K_0402_1%~D
@
12
PR1331
0_0402_5%~D
PR1331
0_0402_5%~D
12
PL1300
1UH_PCMB053T-1R0MS_7A_20%
@PL1300
1UH_PCMB053T-1R0MS_7A_20%
@
12
PQ1305
SI7716ADN-T1-GE3_POWERPAK8-5
PQ1305
SI7716ADN-T1-GE3_POWERPAK8-5
4
5
1
2
3
PC1300
0.1U_0603_25V7K~D
@
PC1300
0.1U_0603_25V7K~D
@
12
PC1314
10U_1206_25V6M~D
PC1314
10U_1206_25V6M~D
12
PR1307
100K_0402_1%~D
PR1307
100K_0402_1%~D
12
PC1313
0.1U_0603_25V7K~D
PC1313
0.1U_0603_25V7K~D
12
PQ1307B
DMN66D0LDW-7 2N_SOT363-6~D
PQ1307B
DMN66D0LDW-7 2N_SOT363-6~D
3
5
4
PC1334
0.22U_0603_25V7K~D
PC1334
0.22U_0603_25V7K~D
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DK_AC_OFF
CHGVR_DCIN
SL_BAT_PRES#
ERC2
ERC1
P33ALW
ACAVDK_SRC
ERC3
DK_AC_OFF_ENCD3301_SDC_IN
3301_PWRSRC
3301_ACAV_IN_NB
STSTART_DCBLOCK_GC
P50ALW
DK_PWRBAR
DC_IN_SS
CD_PBATT_OFF
ACAVIN
CD3301_DCIN
P33ALW2
STSTART_DCBLOCK_GC
EN_DK_PWRBAR
PBATT_IN_SS
BLKNG_MOSFET_GC
MPBATT_IN_SS
+3.3V_ALW2
PBATT+
+PWR_SRC
+VCHGR
+DOCK_PWR_BAR
+DC_IN_SS
+DC_IN
+SDC_IN
+3.3V_ALW2
+PWR_SRC
+3.3V_ALW
+5V_ALW
+NBDOCK_DC_IN_SS
+3.3V_ALW2
PBATT+
+VCHGR
MPBATT+
+DOCK_PWR_BAR
PBATT+
MPBATT+
+3.3V_ALW2
CSS_GC<62> DK_CSS_GC<62>
+CHGR_DC_IN<62>
SLICE_BAT_ON <40>
ACAV_IN_NB <40,41,62>
DOCK_AC_OFF_EC <40>
SLICE_BAT_PRES# <39,40>
SOFT_START_GC<53>
ACAV_DOCK_SRC#<39>
DC_BLOCK_GC<62>
ACAV_IN<22,41,62>
EN_DOCK_PWR_BAR <40>
MODULE_ON <40>
MODULE_BATT_PRES# <40,53>
SLICE_BAT_PRES#<39,40>
SLICE_BAT_ON<40>
DEFAULT_OVRDE<40>
SLICE_BAT_PRES#<39,40>
DOCK_SMB_ALERT# <39,40>
PBAT_PRES#<40,53>
MODULE_BATT_PRES#<40,53>
PBAT_PRES#<40,53>
ACAV_IN<22,41,62>
CHARGE_MODULE_BATT<40>
ACAV_IN <22,41,62>
DEFAULT_OVRDE<40>
DOCK_AC_OFF <39,40>
CHARGE_PBATT<40>
ACAV_IN<22,41,62>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
Selector
63 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
Selector
63 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
Selector
63 66Friday, June 10, 2011
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
PR948 0_0402_5%~DPR948 0_0402_5%~D
1 2
PR900
100K_0402_5%~D
PR900
100K_0402_5%~D
1 2
PR955 0_0402_5%~DPR955 0_0402_5%~D
1 2
PD913
RB751V-40GTE-17_SOD323~D
PD913
RB751V-40GTE-17_SOD323~D
1 2
PR907
330K_0402_5%~D
PR907
330K_0402_5%~D
1 2
PR962
1M_0402_5%~D
@PR962
1M_0402_5%~D
@
1 2
PR947 0_0402_5%~DPR947 0_0402_5%~D
1 2
PQ900
SI4835DDY-T1-GE3_SO8~D
PQ900
SI4835DDY-T1-GE3_SO8~D
3 6
5
7
8
2
4
1
PQ908B
DMN66D0LDW-7 2N_SOT363-6~D
PQ908B
DMN66D0LDW-7 2N_SOT363-6~D
3
5
4
PR933
510K_0402_5%~D
PR933
510K_0402_5%~D
12
PC912
0.047U_0603_25V7K~D
PC912
0.047U_0603_25V7K~D
12
PR941
0_0402_5%~D
PR941
0_0402_5%~D
1 2
PR931
200K_0402_1%~D
PR931
200K_0402_1%~D
12
PQ903
FDS6679AZ_G_SO8~D
PQ903
FDS6679AZ_G_SO8~D
S1
S2
S3
G4
D
8
D
7
D
6
D
5
PR909
390K_0402_5%~D
PR909
390K_0402_5%~D
12
G
D
S
PQ911
2N7002W-7-F_SOT323-3~D
G
D
S
PQ911
2N7002W-7-F_SOT323-3~D
2
13
PQ906B
DMN66D0LDW-7 2N_SOT363-6~D
PQ906B
DMN66D0LDW-7 2N_SOT363-6~D
3
5
4
PD910
RB751V-40GTE-17_SOD323~D
PD910
RB751V-40GTE-17_SOD323~D
1 2
PQ907B
DMN66D0LDW-7 2N_SOT363-6~D
PQ907B
DMN66D0LDW-7 2N_SOT363-6~D
3
5
4
PQ901
FDS6679AZ_G_SO8~D
PQ901
FDS6679AZ_G_SO8~D
S
1
S
2
S
3
G
4
D8
D7
D6
D5
PR901
330K_0402_5%~D
PR901
330K_0402_5%~D
1 2
PQ910A
DMN66D0LDW-7 2N_SOT363-6~D
PQ910A
DMN66D0LDW-7 2N_SOT363-6~D
61
2
PR914
620K_0402_5%~D
PR914
620K_0402_5%~D
12
PR963 0_0402_5%~DPR963 0_0402_5%~D
1 2
PQ914
FDS6679AZ_G_SO8~D
PQ914
FDS6679AZ_G_SO8~D
S1
S2
S3
G4
D
8
D
7
D
6
D
5
PR945 0_0402_5%~DPR945 0_0402_5%~D
1 2
PR920
10K_0402_5%~D
PR920
10K_0402_5%~D
12
PQ910B
DMN66D0LDW-7 2N_SOT363-6~D
PQ910B
DMN66D0LDW-7 2N_SOT363-6~D
3
5
4
PQ906A
DMN66D0LDW-7 2N_SOT363-6~D
PQ906A
DMN66D0LDW-7 2N_SOT363-6~D
61
2
PR961
0_0402_5%~D
PR961
0_0402_5%~D
1 2
PC903
0.01U_0603_25V7K~D
PC903
0.01U_0603_25V7K~D
12
PQ913
SI4835DDY-T1-GE3_SO8~D
PQ913
SI4835DDY-T1-GE3_SO8~D
3 6
5
7
8
2
4
1
PC911
0.1U_0603_25V7K~D
PC911
0.1U_0603_25V7K~D
12
PR906
10K_0402_5%~D
PR906
10K_0402_5%~D
12
PQ908A
DMN66D0LDW-7 2N_SOT363-6~D
PQ908A
DMN66D0LDW-7 2N_SOT363-6~D
61
2
PQ905A
DMN66D0LDW-7 2N_SOT363-6~D
PQ905A
DMN66D0LDW-7 2N_SOT363-6~D
61
2
PD904
RB751V-40GTE-17_SOD323~D
PD904
RB751V-40GTE-17_SOD323~D
12
PR932
0_0402_5%~D
PR932
0_0402_5%~D
12
PC907
0.01U_0603_25V7K~D
PC907
0.01U_0603_25V7K~D
12
PR921
20K_0402_1%~D
PR921
20K_0402_1%~D
1 2
PQ904A
DMN66D0LDW-7 2N_SOT363-6~D
PQ904A
DMN66D0LDW-7 2N_SOT363-6~D
61
2
PR903
390K_0402_5%~D
PR903
390K_0402_5%~D
12
2
1
3
PQ915
FDN338P_G_NL_SOT23-3~D
2
1
3
PQ915
FDN338P_G_NL_SOT23-3~D
2
1 3
PU901
TC7SH08FU_SSOP5~D
PU901
TC7SH08FU_SSOP5~D
B
1
A
2
G
3
O4
P5
PR926
0_0402_5%~D
PR926
0_0402_5%~D
1 2
PD907
RB751V-40GTE-17_SOD323~D
PD907
RB751V-40GTE-17_SOD323~D
12
PR943 0_0402_5%~DPR943 0_0402_5%~D
1 2
PD908
RB751V-40GTE-17_SOD323~D
PD908
RB751V-40GTE-17_SOD323~D
12
PR923
10K_0402_5%~D
PR923
10K_0402_5%~D
12
PD915
RB751V-40GTE-17_SOD323~D
PD915
RB751V-40GTE-17_SOD323~D
1 2
PC910
0.1U_0603_50V4Z~D
PC910
0.1U_0603_50V4Z~D
12
PR916
20K_0402_1%~D
PR916
20K_0402_1%~D
1 2
PC900
0.1U_0603_25V7K~D
@
PC900
0.1U_0603_25V7K~D
@
12
PR949 0_0402_5%~DPR949 0_0402_5%~D
1 2
PR959 0_0402_5%~DPR959 0_0402_5%~D
1 2
PD917
RB751V-40GTE-17_SOD323~D
PD917
RB751V-40GTE-17_SOD323~D
12
PC906
0.1U_0603_25V7K~D
PC906
0.1U_0603_25V7K~D
12
PQ912
FDS6679AZ_G_SO8~D
PQ912
FDS6679AZ_G_SO8~D
S
1
S
2
S
3
G
4
D8
D7
D6
D5
PR905
820_0603_1%~D
PR905
820_0603_1%~D
1 2
PR953 0_0402_5%~DPR953 0_0402_5%~D
1 2
PQ907A
DMN66D0LDW-7 2N_SOT363-6~D
PQ907A
DMN66D0LDW-7 2N_SOT363-6~D
61
2
PC916
0.1U_0402_10V7K~D
PC916
0.1U_0402_10V7K~D
1 2
PR951 0_0402_5%~DPR951 0_0402_5%~D
1 2
PD905
PDS5100H-13_POWERDI5-3~D
PD905
PDS5100H-13_POWERDI5-3~D
2
31
PR917
820_0603_1%~D
PR917
820_0603_1%~D
1 2
G
D
S
PQ916
2N7002W-7-F_SOT323-3~D
G
D
S
PQ916
2N7002W-7-F_SOT323-3~D
2
13
PR919
10K_0402_5%~D
PR919
10K_0402_5%~D
12
PC913
0.1U_0402_25V4Z~D
@
PC913
0.1U_0402_25V4Z~D
@
12
PR913
390K_0402_5%~D
PR913
390K_0402_5%~D
12
PR924
499K_0402_1%~D
PR924
499K_0402_1%~D
12
PD916
RB751V-40GTE-17_SOD323~D
PD916
RB751V-40GTE-17_SOD323~D
12
PC905
2200P_0402_50V7K~D
PC905
2200P_0402_50V7K~D
12
PD911
RB751V-40GTE-17_SOD323~D
PD911
RB751V-40GTE-17_SOD323~D
1 2
PR946 100K_0402_5%~DPR946 100K_0402_5%~D
1 2
PC902
0.47U_0805_25V7K~D
PC902
0.47U_0805_25V7K~D
12
PR910
499K_0402_1%~D
PR910
499K_0402_1%~D
12
PU900
CD3301RHHR_QFN36_6X6~D
PU900
CD3301RHHR_QFN36_6X6~D
DC_IN
1
SS_GC
2
ERC1
3
ACAVDK_SRC
4
GND
5
SDC_IN
6
DC_BLK_GC
7
ACAV_IN
8
SS_DCBLK_GC
16
CSS_GC
10
DK_CSS_GC
11
ERC3
12
ERC2
13
GND
14
PWR_SRC
15
BLKNG_MOSFET_GC 20
SL_BAT_PRES# 21
DK_AC_OFF_EN 22
GND 23
ACAV_IN_NB 24
DK_AC_OFF_EN 25
PBATT_OFF 26
P50ALW 27
PBatt+ 28
DSCHRG_MOSFET_GC 29
BLK_MOSFET_GC 30
NC 31
DK_PWRBAR 33
DC_IN_SS 34
CHARGERVR_DCIN 35
P33ALW2
9
EN_DK_PWRBAR
17
P33ALW
18
TP
37
NBDK_DCINSS 19
NC 36
GND 32
PR940 0_0402_5%~DPR940 0_0402_5%~D
1 2
PR928
499K_0402_1%~D
@
PR928
499K_0402_1%~D
@
12
PC914
1500P_0402_7K~D
PC914
1500P_0402_7K~D
12
PR960 0_0402_5%~DPR960 0_0402_5%~D
1 2
PD901
PDS5100H-13_POWERDI5-3~D
PD901
PDS5100H-13_POWERDI5-3~D
2
31
PU902
TC7SH08FU_SSOP5~D
PU902
TC7SH08FU_SSOP5~D
B
1
A
2
G
3
O4
P5
G
D
S
PQ909
2N7002W-7-F_SOT323-3~D
G
D
S
PQ909
2N7002W-7-F_SOT323-3~D
2
13
PR912
330K_0402_5%~D
PR912
330K_0402_5%~D
1 2
PR952
1M_0402_5%~D
PR952
1M_0402_5%~D
1 2
PR937
0_0402_5%~D
PR937
0_0402_5%~D
1 2
PR915
100K_0402_5%~D
PR915
100K_0402_5%~D
1 2
PQ902
FDS6679AZ_G_SO8~D
PQ902
FDS6679AZ_G_SO8~D
S1
S2
S3
G4
D
8
D
7
D
6
D
5
PQ904B
DMN66D0LDW-7 2N_SOT363-6~D
PQ904B
DMN66D0LDW-7 2N_SOT363-6~D
3
5
4
PQ905B
DMN66D0LDW-7 2N_SOT363-6~D
PQ905B
DMN66D0LDW-7 2N_SOT363-6~D
3
5
4
PR911
0_0402_5%~D
PR911
0_0402_5%~D
1 2
PR954 0_0402_5%~DPR954 0_0402_5%~D
1 2
PR922
390K_0402_5%~D
PR922
390K_0402_5%~D
12
PR939 0_0402_5%~DPR939 0_0402_5%~D
1 2
PR938
499K_0402_1%~D
@
PR938
499K_0402_1%~D
@
12
PR908
10K_0402_5%~D
PR908
10K_0402_5%~D
12
PC915
0.1U_0402_10V7K~D
PC915
0.1U_0402_10V7K~D
1 2
ES2AA-13-F SMA
PD902
ES2AA-13-F SMA
PD902
2 1
PR956 0_0402_5%~DPR956 0_0402_5%~D
1 2
PR936
0_0402_5%~D
PR936
0_0402_5%~D
1 2
PR904
620K_0402_5%~D
PR904
620K_0402_5%~D
12
PR942
0_0402_5%~D
@PR942
0_0402_5%~D
@
1 2
PR934 100K_0402_5%~D@PR934 100K_0402_5%~D@
1 2
PR925
0_0402_5%~D
PR925
0_0402_5%~D
1 2
PR957 0_0402_5%~DPR957 0_0402_5%~D
1 2
PR958 0_0402_5%~DPR958 0_0402_5%~D
1 2
PR935 0_0402_5%~DPR935 0_0402_5%~D
1 2
PC904
0.1U_0603_25V7K~D
@
PC904
0.1U_0603_25V7K~D
@
12
PR944 47_0805_5%~DPR944 47_0805_5%~D
1 2
PD903
RB751V-40GTE-17_SOD323~D
PD903
RB751V-40GTE-17_SOD323~D
12
PD912
RB751V-40GTE-17_SOD323~D
PD912
RB751V-40GTE-17_SOD323~D
1 2
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
H H
G G
F F
E E
D D
C C
B B
A A
BOOT2_VGA BOOT2_2_VGA
PHASE2_VGA
BOOT1_1_VGA
CLK_ENABLE#_VGA
BOOT1_VGA
+GPU_CORE
+GPU_CORE
PHASE1_VGA
GPU_VID6
GPU_VID5
GPU_VID3
GPU_VID4
GPU_VID1
GPU_VID0
GPU_VID2
UGATE2_VGA
UGATE1_VGA
P2_VGA_SW
P1_VGA_SW
LGATE2_VGA
LGATE1_VGA
+VGA_B+
+PWR_SRC
+VGA_B+
+5V_RUN
+3.3V_RUN
+5V_RUN
+VGA_B+
GNDA_GPU_CORE
+GPU_CORE
+GPU_CORE
+GPU_CORE
VSUM-_VGA
VSUM-_VGA
VSUM-_VGA
ISEN2_VGA
ISEN2_VGA
ISEN1_VGA
ISEN1_VGA
VSUM+_VGA
VSUM+_VGA
VSUM+_VGA
VSUM-_VGA
+3.3V_RUN
GNDA_GPU_CORE
GNDA_GPU_CORE
GNDA_GPU_CORE GNDA_GPU_CORE
GNDA_GPU_CORE
GNDA_GPU_CORE
GNDA_GPU_CORE
GNDA_GPU_CORE
GNDA_GPU_CORE
+3.3V_RUN_GFX
+5V_RUN
DGPU_PWR_EN<40,45>
RUN_ON<28,36,40,43,56>
DGPU_PWROK
<18,40>
GPU_VDD_SENSE<46>
GPU_VSS_SENSE<46>
GPU_VID_6 <45>
GPU_VID_5 <45>
GPU_VID_4 <45>
GPU_VID_3 <45>
GPU_VID_2 <45>
GPU_VID_1 <45>
GPU_HOT#<45>
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
+GPU_CORE
64 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
+GPU_CORE
64 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
+GPU_CORE
64 66Friday, June 10, 2011
Compal Electronics, Inc.
Layout Note:
Place near Phase1 Choke
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
DELL CONFIDENTIAL/PROPRIETARY
Initial voltage is 0.975V
+GPU_CORE
TDC 35A
Peak Current 42A
OCP current 51A
No Load line
FSW=400kHz
PR1000
10K_0402_1%
PR1000
10K_0402_1%
1 2
+
PC1030
470U_D2_2VM_R4.5M
+
PC1030
470U_D2_2VM_R4.5M
1
2
PR1042
10K_0402_1%~D
PR1042
10K_0402_1%~D
1 2
PR1057 10K_0402_1%@PR1057 10K_0402_1%@
1 2
PC1008
2200P_0402_50V7K
@PC1008
2200P_0402_50V7K
@
12
PC1015
150P_0402_50V8J
PC1015
150P_0402_50V8J
1 2
PC1012
470P_0402_50V8J~D
PC1012
470P_0402_50V8J~D
1 2
PR1011
0_0402_5%
PR1011
0_0402_5%
12
PR1036
0_0402_5%
PR1036
0_0402_5%
1 2
PR1028
324K_0402_1%~D
PR1028
324K_0402_1%~D
1 2
PC1009
22P_0402_50V8J
@PC1009
22P_0402_50V8J
@
1 2
PR1054 10K_0402_1%
PR1054 10K_0402_1%
1 2
PR1049 10K_0402_1%
PR1049 10K_0402_1%
1 2
PC1002
2200P_0402_50V7K
PC1002
2200P_0402_50V7K
12
PR1056 10K_0402_1%
PR1056 10K_0402_1%
1 2
+
PC1006
470U_D2_2VM_R4.5M
+
PC1006
470U_D2_2VM_R4.5M
1
2
PR1013
1.91K_0402_1%
PR1013
1.91K_0402_1%
12
PR1041
11K_0402_1%
PR1041
11K_0402_1%
12
PC1027
0.068U_0603_50V7K~D
PC1027
0.068U_0603_50V7K~D
12
PR1039
10K_0402_1%~D
PR1039
10K_0402_1%~D
12
PR1008
3.65K_0402_1%
PR1008
3.65K_0402_1%
12
PR1003
4.7_0603_5%~D
PR1003
4.7_0603_5%~D
12
PR1022 0_0402_5%PR1022 0_0402_5%
1 2
PR1061 10K_0402_1%@PR1061 10K_0402_1%@
1 2
PL1000
0.22UH_FDUE0640-H-R22M=P3_25A_20%~D
PL1000
0.22UH_FDUE0640-H-R22M=P3_25A_20%~D
12
PC1014
2200P_0402_50V7K
@PC1014
2200P_0402_50V7K
@
12
PC1020
0.1U_0402_25V6K~D
PC1020
0.1U_0402_25V6K~D
12
PR1009
1_0402_5%
PR1009
1_0402_5%
12
PC1018
1U_0603_10V6K
PC1018
1U_0603_10V6K
12
PR1060 10K_0402_1%@PR1060 10K_0402_1%@
1 2
PC1016
0.22U_0402_10V4Z
PC1016
0.22U_0402_10V4Z
12
PC1010
1U_0603_10V6K
PC1010
1U_0603_10V6K
12
+
PC1029
470U_D2_2VM_R4.5M
+
PC1029
470U_D2_2VM_R4.5M
1
2
PC1023
10U_1206_25V6M
PC1023
10U_1206_25V6M
12
PC1004
22P_0402_50V8J
PC1004
22P_0402_50V8J
1 2
PR1015
10K_0402_1%~D
PR1015
10K_0402_1%~D
1 2
PR1026
0_0402_5%
PR1026
0_0402_5%
1 2
PJP1004
PAD-OPEN1x1m
PJP1004
PAD-OPEN1x1m
1 2
PR1020
47K_0402_1%~D
PR1020
47K_0402_1%~D
12
PQ1000
CSD87351Q5D_SON8~D
PQ1000
CSD87351Q5D_SON8~D
1
2
5
4
6
7
3
8
PC1028
0.1U_0402_16V7K
PC1028
0.1U_0402_16V7K
12
PR1031
1_0402_5%
PR1031
1_0402_5%
1 2
PR1029
0_0402_5%
PR1029
0_0402_5%
1 2
PR1033
82.5_0402_5%
@
PR1033
82.5_0402_5%
@
12
PC1026
0.01U_0402_25V7K
@
PC1026
0.01U_0402_25V7K
@
12
PR1052 10K_0402_1%
PR1052 10K_0402_1%
1 2
PC1001
0.1U_0402_25V6K~D
PC1001
0.1U_0402_25V6K~D
12
PC1032
1000P_0603_50V7K
@
PC1032
1000P_0603_50V7K
@
12
PR1034
4.7_0603_5%~D
PR1034
4.7_0603_5%~D
12
PH1000
10K_0402_1%_TSM0A103F34D1RZ
PH1000
10K_0402_1%_TSM0A103F34D1RZ
12
PR1012
10K_0402_1%~D
PR1012
10K_0402_1%~D
12
PR1007
2.2_1206_5%
@PR1007
2.2_1206_5%
@
12
PC1033
0.1U_0402_16V7K
PC1033
0.1U_0402_16V7K
12
PR1062 10K_0402_1%@PR1062 10K_0402_1%@
1 2
PR1030
249K_0402_1%
PR1030
249K_0402_1%
12
PC1003
10U_0805_25V6K
PC1003
10U_0805_25V6K
12
PC1017
0.22U_0402_10V4Z
PC1017
0.22U_0402_10V4Z
12
PR1046
1.4K_0402_1%
PR1046
1.4K_0402_1%
12
PR1002
0_0402_5%
PR1002
0_0402_5%
12
PR1017
0_0402_5%
PR1017
0_0402_5%
1 2
PR1023
249K_0402_1%
@PR1023
249K_0402_1%
@
1 2
PR1021
0_0402_5%
PR1021
0_0402_5%
1 2
PR1027
3.57K_0402_1%
PR1027
3.57K_0402_1%
1 2
PR1016
0_0402_5%
PR1016
0_0402_5%
12
PC1013
47P_0402_50V8J~D
PC1013
47P_0402_50V8J~D
1 2
PR1024
6.81K_0402_1%~D
PR1024
6.81K_0402_1%~D
12
PC1022
10U_0805_25V6K
PC1022
10U_0805_25V6K
12
PQ1001
CSD87351Q5D_SON8~D
PQ1001
CSD87351Q5D_SON8~D
1
2
5
4
6
7
3
8
PR1037
2.2_1206_5%
@PR1037
2.2_1206_5%
@
12
PR1059 10K_0402_1%@PR1059 10K_0402_1%@
1 2
PC1019
0.22U_0603_25V7K
PC1019
0.22U_0603_25V7K
12
PR1025
499_0402_1%~D
PR1025
499_0402_1%~D
1 2
PR1051 10K_0402_1%
PR1051 10K_0402_1%
1 2
PH1001
470K_0402_5%_TSM0B474J4702RE
PH1001
470K_0402_5%_TSM0B474J4702RE
1 2
PR1038
3.65K_0402_1%
PR1038
3.65K_0402_1%
12
PR1045
953_0402_1%
PR1045
953_0402_1%
1 2
PR1014
0_0402_5%
PR1014
0_0402_5%
12
PU1000
ISL62883CHRTZ-T_TQFN40_5X5
PU1000
ISL62883CHRTZ-T_TQFN40_5X5
PGOOD
1
PSI#
2
RBIAS
3
VR_TT#
4
NTC
5
VW
6
COMP
7
FB
8
VIN
17
ISEN1
11
VSEN
12
RTN
13
ISUM-
14
ISUM+
15
VDD
16
VSSP1 22
LGATE1 23
PWM3 24
VCCP 25
LGATE2 26
VSSP2 27
PHASE2 28
UGATE2 29
VID0 31
VID1 32
VID2 33
VID3 34
VID5 36
VID6 37
VR_ON 38
ISEN3
9
ISEN2
10
IMON
18
BOOT1
19
UGATE1
20
AGND
41
PHASE1 21
BOOT2 30
DPRSLPVR 39
CLK_EN# 40
VID4 35
PR1006
0_0402_5%
PR1006
0_0402_5%
12
PR1040
1_0402_5%
PR1040
1_0402_5%
12
PR1001
10K_0402_1%
@PR1001
10K_0402_1%
@
1 2
PC1031
1000P_0402_50V7K
PC1031
1000P_0402_50V7K
12
PR1005
0_0402_5%
PR1005
0_0402_5%
12
PR1035
2.61K_0402_1%
PR1035
2.61K_0402_1%
12
PR1043
0_0402_5%
PR1043
0_0402_5%
1 2
PR1032
10_0402_5%
PR1032
10_0402_5%
1 2
PR1004
10K_0402_1%
PR1004
10K_0402_1%
1 2
PR1050
0_0402_5%
@PR1050
0_0402_5%
@
1 2
PR1047 10K_0402_1%
PR1047 10K_0402_1%
1 2
PC1000
10U_1206_25V6M
PC1000
10U_1206_25V6M
12
PR1019
100K_0402_5%
PR1019
100K_0402_5%
1 2
PC1024
0.22U_0603_10V7K
PC1024
0.22U_0603_10V7K
1 2
PC1007
1000P_0603_50V7K
@
PC1007
1000P_0603_50V7K
@
12
PR1018
1K_0402_1%~D
PR1018
1K_0402_1%~D
12
PR1058 10K_0402_1%@PR1058 10K_0402_1%@
1 2
PC1025
330P_0402_50V7K
PC1025
330P_0402_50V7K
12
PR1010
1.91K_0402_1%
PR1010
1.91K_0402_1%
1 2
PC1021
2200P_0402_50V7K
PC1021
2200P_0402_50V7K
12
PJP1000
JUMP_1X3m
PJP1000
JUMP_1X3m
11
2
2
PL1001
0.22UH_FDUE0640-H-R22M=P3_25A_20%~D
PL1001
0.22UH_FDUE0640-H-R22M=P3_25A_20%~D
12
PR1044
10_0402_5%
PR1044
10_0402_5%
1 2
PC1005
0.22U_0603_10V7K
PC1005
0.22U_0603_10V7K
1 2
PC1011
1000P_0402_50V7K
PC1011
1000P_0402_50V7K
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.05V_RUN_VTT
+GPU_CORE +GPU_CORE
+1.05V_RUN_VTT
+GPU_CORE +GPU_CORE
+VCC_CORE
+VCC_CORE
+VCC_GFXCORE
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
PROCESSOR DECOUPLING
65 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
PROCESSOR DECOUPLING
65 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
PROCESSOR DECOUPLING
65 66Friday, June 10, 2011
Compal Electronics, Inc.
Socket Bottom
Socket Top
5 x 22 µF (0805)
5 x (0805) no-stuff
sites
7 x 22 µF (0805)
2 x (0805) no-stuff
sites
Below is 458544_CRV_PDDG_0.5 Table 5-8.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DELL CONFIDENTIAL/PROPRIETARY
+GPU_CORE (place under GPU) +GPU_CORE (place near GPU)
+VCC_CORE +VCC_GFXCORE
PC1120
22U_0805_6.3VAM
PC1120
22U_0805_6.3VAM
1
2
PC1112
22U_0805_6.3V6M
PC1112
22U_0805_6.3V6M
1
2
PC1126
22U_0805_6.3VAM
PC1126
22U_0805_6.3VAM
1
2
PC1152
22U_0805_6.3VAM
PC1152
22U_0805_6.3VAM
1
2
+
PC1172
470U_D2_2VM_R4.5M
+
PC1172
470U_D2_2VM_R4.5M
1
2
PC1185
4.7U_0603_6.3V6K~D
@
PC1185
4.7U_0603_6.3V6K~D
@
12
PC1149
22U_0805_6.3VAM
PC1149
22U_0805_6.3VAM
1
2
PC1135
22U_0805_6.3V6M
PC1135
22U_0805_6.3V6M
1
2
PC1154
22U_0805_6.3VAM
PC1154
22U_0805_6.3VAM
1
2
PC1181
4.7U_0603_6.3V6K~D
PC1181
4.7U_0603_6.3V6K~D
12
PC1118
22U_0805_6.3V6M
PC1118
22U_0805_6.3V6M
1
2
PC1197
4.7U_0603_6.3V6K~D
@
PC1197
4.7U_0603_6.3V6K~D
@
12
PC1193
.1U_0402_16V7K
@
PC1193
.1U_0402_16V7K
@
12
PC1100
10U_0805_4VAM
PC1100
10U_0805_4VAM
1
2
PC1211
.1U_0402_16V7K
@
PC1211
.1U_0402_16V7K
@
12
PC1124
22U_0805_6.3VAM
PC1124
22U_0805_6.3VAM
1
2
+
PC1174
470U_D2_2VM_R4.5M
+
PC1174
470U_D2_2VM_R4.5M
1
2
PC1109
10U_0805_4VAM
PC1109
10U_0805_4VAM
1
2
PC1178
4.7U_0603_6.3V6K~D
PC1178
4.7U_0603_6.3V6K~D
12
PC1209
.1U_0402_16V7K
@
PC1209
.1U_0402_16V7K
@
12
PC1101
10U_0805_4VAM
PC1101
10U_0805_4VAM
1
2
PC1150
22U_0805_6.3VAM
PC1150
22U_0805_6.3VAM
1
2
PC1190
.1U_0402_16V7K
PC1190
.1U_0402_16V7K
12
PC1196
4.7U_0603_6.3V6K~D
@
PC1196
4.7U_0603_6.3V6K~D
@
12
PC1160
22U_0805_6.3VAM
PC1160
22U_0805_6.3VAM
1
2
PC1189
.1U_0402_16V7K
PC1189
.1U_0402_16V7K
12
PC1213
22U_0805_6.3V6M
PC1213
22U_0805_6.3V6M
12
PC1133
22U_0805_6.3VAM
@
PC1133
22U_0805_6.3VAM
@
1
2
PC1129
22U_0805_6.3VAM
PC1129
22U_0805_6.3VAM
1
2
PC1144
22U_0805_6.3VAM
PC1144
22U_0805_6.3VAM
1
2
PC1136
22U_0805_6.3V6M
PC1136
22U_0805_6.3V6M
1
2
PC1218
4.7U_0603_6.3V6K~D
PC1218
4.7U_0603_6.3V6K~D
12
PC1216
4.7U_0603_6.3V6K~D
PC1216
4.7U_0603_6.3V6K~D
12
PC1168
22U_0805_6.3VAM
PC1168
22U_0805_6.3VAM
1
2
+
PC1165
330U_X_2VM_R6M
+
PC1165
330U_X_2VM_R6M
1
2
PC1153
22U_0805_6.3VAM
PC1153
22U_0805_6.3VAM
1
2
PC1179
4.7U_0603_6.3V6K~D
PC1179
4.7U_0603_6.3V6K~D
12
PC1163
22U_0805_6.3VAM
PC1163
22U_0805_6.3VAM
1
2
PC1131
22U_0805_6.3VAM
PC1131
22U_0805_6.3VAM
1
2
PC1145
22U_0805_6.3VAM
PC1145
22U_0805_6.3VAM
1
2
PC1113
22U_0805_6.3V6M
PC1113
22U_0805_6.3V6M
1
2
PC1132
22U_0805_6.3VAM
@
PC1132
22U_0805_6.3VAM
@
1
2
PC1117
22U_0805_6.3V6M
PC1117
22U_0805_6.3V6M
1
2
PC1182
4.7U_0603_6.3V6K~D
PC1182
4.7U_0603_6.3V6K~D
12
PC1119
22U_0805_6.3VAM
PC1119
22U_0805_6.3VAM
1
2
PC1147
22U_0805_6.3VAM
PC1147
22U_0805_6.3VAM
1
2
PC1127
22U_0805_6.3VAM
PC1127
22U_0805_6.3VAM
1
2
PC1125
22U_0805_6.3VAM
@
PC1125
22U_0805_6.3VAM
@
1
2
PC1115
22U_0805_6.3V6M
PC1115
22U_0805_6.3V6M
1
2
PC1104
10U_0805_4VAM
PC1104
10U_0805_4VAM
1
2
PC1210
.1U_0402_16V7K
@
PC1210
.1U_0402_16V7K
@
12
PC1212
47U_0805_6.3V6M~D
PC1212
47U_0805_6.3V6M~D
12
PC1183
4.7U_0603_6.3V6K~D
@
PC1183
4.7U_0603_6.3V6K~D
@
12
PC1105
10U_0805_4VAM
PC1105
10U_0805_4VAM
1
2
PC1162
22U_0805_6.3VAM
PC1162
22U_0805_6.3VAM
1
2
PC1114
22U_0805_6.3V6M
PC1114
22U_0805_6.3V6M
1
2
PC1191
.1U_0402_16V7K
PC1191
.1U_0402_16V7K
12
+
PC1187
470U_D2_2VM_R4.5M
@
+
PC1187
470U_D2_2VM_R4.5M
@
1
2
PC1155
22U_0805_6.3VAM
PC1155
22U_0805_6.3VAM
1
2
PC1195
4.7U_0603_6.3V6K~D
PC1195
4.7U_0603_6.3V6K~D
12
PC1102
10U_0805_4VAM
PC1102
10U_0805_4VAM
1
2
PC1137
22U_0805_6.3V6M
PC1137
22U_0805_6.3V6M
1
2
PC1186
4.7U_0603_6.3V6K~D
PC1186
4.7U_0603_6.3V6K~D
12
PC1121
22U_0805_6.3VAM
PC1121
22U_0805_6.3VAM
1
2
+
PC1156
470U_D2_2VM_R4.5M
+
PC1156
470U_D2_2VM_R4.5M
1
2
PC1111
22U_0805_6.3V6M
PC1111
22U_0805_6.3V6M
1
2
PC1176
4.7U_0603_6.3V6K~D
PC1176
4.7U_0603_6.3V6K~D
12
PC1107
10U_0805_4VAM
PC1107
10U_0805_4VAM
1
2
+
PC1157
470U_D2_2VM_R4.5M
+
PC1157
470U_D2_2VM_R4.5M
1
2
PC1106
10U_0805_4VAM
PC1106
10U_0805_4VAM
1
2
PC1217
4.7U_0603_6.3V6K~D
PC1217
4.7U_0603_6.3V6K~D
12
PC1194
4.7U_0603_6.3V6K~D
@
PC1194
4.7U_0603_6.3V6K~D
@
12
+
PC1166
330U_X_2VM_R6M
+
PC1166
330U_X_2VM_R6M
1
2
PC1192
.1U_0402_16V7K
PC1192
.1U_0402_16V7K
12
PC1215
4.7U_0603_6.3V6K~D
PC1215
4.7U_0603_6.3V6K~D
12
PC1123
22U_0805_6.3VAM
PC1123
22U_0805_6.3VAM
1
2
PC1143
22U_0805_6.3VAM
PC1143
22U_0805_6.3VAM
1
2
PC1116
22U_0805_6.3V6M
PC1116
22U_0805_6.3V6M
1
2
PC1134
22U_0805_6.3VAM
PC1134
22U_0805_6.3VAM
1
2
PC1214
4.7U_0603_6.3V6K~D
PC1214
4.7U_0603_6.3V6K~D
12
PC1151
22U_0805_6.3VAM
@
PC1151
22U_0805_6.3VAM
@
1
2
PC1148
22U_0805_6.3VAM
@
PC1148
22U_0805_6.3VAM
@
1
2
PC1108
10U_0805_4VAM
PC1108
10U_0805_4VAM
1
2
PC1130
22U_0805_6.3VAM
@
PC1130
22U_0805_6.3VAM
@
1
2
PC1184
4.7U_0603_6.3V6K~D
PC1184
4.7U_0603_6.3V6K~D
12
PC1138
22U_0805_6.3V6M
PC1138
22U_0805_6.3V6M
1
2
PC1164
22U_0805_6.3VAM
PC1164
22U_0805_6.3VAM
1
2
PC1177
4.7U_0603_6.3V6K~D
PC1177
4.7U_0603_6.3V6K~D
12
PC1146
22U_0805_6.3VAM
PC1146
22U_0805_6.3VAM
1
2
+
PC1175
470U_D2_2VM_R4.5M
+
PC1175
470U_D2_2VM_R4.5M
1
2
PC1103
10U_0805_4VAM
PC1103
10U_0805_4VAM
1
2
PC1161
22U_0805_6.3VAM
PC1161
22U_0805_6.3VAM
1
2
PC1128
22U_0805_6.3VAM
@
PC1128
22U_0805_6.3VAM
@
1
2
PC1180
4.7U_0603_6.3V6K~D
PC1180
4.7U_0603_6.3V6K~D
12
+
PC1173
470U_D2_2VM_R4.5M
+
PC1173
470U_D2_2VM_R4.5M
1
2
PC1122
22U_0805_6.3VAM
PC1122
22U_0805_6.3VAM
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
PWR_PIR 1
66 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
PWR_PIR 1
66 66Friday, June 10, 2011
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-7782
0.1
PWR_PIR 1
66 66Friday, June 10, 2011
Compal Electronics, Inc.
Page 1
Page 1Page 1
Page 1
Solution D escription
Solution D escriptionS olution D escription
Solution D escription R ev.
R ev .R ev .
R ev .P a ge#
P a ge#P a ge #
P a ge# T it le
TitleTitle
Title
V ersion Change L ist ( P . I. R . L ist )
V ersion Change L ist ( P . I. R . L ist )V ersion C hange L ist ( P . I. R . L ist )
V ersion Change L ist ( P . I. R . L ist )
Item
ItemItem
Item Issue D escription
Issue D escriptionIssue D escription
Issue D escriptionD ate
D ateD ate
D ate R eq ue st
R eq ue stR eq uest
R eq ue st
O w n er
O w n erO w n er
O w n er
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DELL CONFIDENTIAL/PROPRIETARY
