Compal LA 8391P Schematics. Www.s Manuals.com. R1.0 Schematics

User Manual: Motherboard Compal LA-8391P QFKAA, Yosemite 10FG - Schematics. Free.

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Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
161Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
161Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
161Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Intel Processor(Ivy Bridge / Sandy Bridge)
PCH(Panther Point)
QFKAA
LA-8391P SchematicREV 1.0
Yosemite 10FG
2012-02-02 Rev 1.0
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
261Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
261Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
261Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Touch Pad
Int.KBD
page 45
BANK 0, 1, 2, 3
Intel CPU
Ivy Bridge
Sandy Bridge
page 44
rPGA-989
200pin DDRIII-SO-DIMM X2
EC ROM
(128KB)
1.5V DDRIII 1066/1333/1600 MT/s
page 5,6,7,8,9,10
page 45
Memory BUS(DDRIII)
FCBGA-989
Intel PCH
Panther Point
page 11,12
page 25,26,27,28,29,30,31,32,33
page 46
ENE KB930/KB9012
Dual Channel
HD Audio
3.3V 24MHz
LPC BUS
3.3V 33 MHz
USB30 4x
SATA port 2
page 45
Debug Port
HDMI Conn.
page 24
USB20 3x
5V 480MHz
SATA ODD
page 34
5V 3GHz(300MB/s)
Power Circuit DC/DC
page 47
RTC CKT.
page 25
page 48,49,50,51,52,
53,54,55,56,57,58,59
DC/DC Interface CKT.
PCI-Express 16X Gen3
NVIDIA N13P-GS/GL, 128bit with 1GB/2GB
page 13,14,15,16,17,18,19,20,21
DMI X4
VGA (DDR3)
1.5V 5GT/s
PCIe Gen1 1x
page 25
SPI ROM
(4MB + 2MB)
5GT/s
USB20 port 2,3
page 34
USB Right
PCIeMini Card
WiMax
PCIeMini Card
WLAN
USB port 9
PCIe port 2
USB port 10
PCIeMini Card
USB port 12
SPK Conn
page 42
ALC280
HDA Codec
PCIe port4
RTS5229
page 38
1.5V 5GT/s
PCIe Gen1 1x
1.5V 5GT/s
RJ45
RTL8105E-VD 10/100M
RTL8111F-VB 1G
page 40
page 40
PCIe port 1
HDMI-CEC
page 24
EC SMBus
page 43
FDI X8
2.7GT/s
page 23
CRT
LVDS Conn.
page 22
3G/TV#1
TV#2
CIR
page 44
G-Sensor
page 45
EC SMBus
SATA port 2
Power/BPower On/Off CKT.
page 46
page 35
Finger Printer/B
page 46
JPIO
(HP & MIC)
page 43
Cardreader
37.5mm*37.5mm
25mm*25mm
PCIe Gen2 2x
1.5V 5GT/s
USB3.0 Right-side
UPD720202
PCIe port5
page 40
5V 5GT/s
5V 6GHz(600MB/s)
SATA Gen3 port 1
SATA port 0
page 34
SATA HDD
5V 6GHz(600MB/s)
SATA Gen3 port 0
page 35
B-CAS
page 36
SIM
SATA port 1
page 36
mSATA
page 36
page 36 page 36
USB port 8
page 38
FingerPrinter Int. Camera
USB port 11
page 22
Glasses Free 3D
USB port 13
page 22
USB20 3x
5V 480MHz
USB20 4x
5V 480MHz
USB30 port 3,4 USB30 port 1,2
USB20 port 0,1
page 39
USB Left
PCIe Gen1 1x
eDP Conn.
page 22
USB3.0 Left-side
UPD720202
PCIe port6
page 41
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
361Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
361Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
361Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
+5VALW
DESIGN CURRENT 5A
N-CHANNEL
SI4800
SUSP
+5VS
DESIGN CURRENT 4A
+3VL
+5VL
DESIGN CURRENT 0.1A
DESIGN CURRENT 0.1A
Ipeak=8.13A, Imax=5.69A, Iocp min=8.7
Ipeak=5A, Imax=3.5A, Iocp min=6.2A
Ipeak=20.53A, Imax=14.37A, Iocp min=23.91A
AO-3413
P-CHANNEL
+5VS_ODD
DESIGN CURRENT 1.6A
ODD_EN#
AO-3413
P-CHANNEL
+5VS_LED
DESIGN CURRENT 400mA
KB_LED
G9191
+3VS_HDP
DESIGN CURRENT 300mA
+5VS
LDO
N-CHANNEL
SUSP
+1.5V_CPU
DESIGN CURRENT 2A
Ipeak=15A, Imax=10.5A, Iocp min=18A
RT8207M
+1.5V
DESIGN CURRENT 10A
SYSON
N-CHANNEL
FDS6676AS
SUSP
+1.5VS
SUSP or 0.75VR_EN#
+0.75VS
DESIGN CURRENT 1.5A
DESIGN CURRENT 2A
B+
TPS51125
AO-3413
+LCD_VDD
LCD_ENVDD
+3VALW
DESIGN CURRENT 5A
TPS51212 +1.05VS_VCCP
NCP6132A
AO-3413
P-CHANNEL
+CPU_CORE
DESIGN CURRENT 94A
+FLICA_VCC
DESIGN CURRENT 0.5A
FELICA_PWR
VR_ON
SY8033BDBC
SUSP#
SUSP#
+1.8VS
DESIGN CURRENT 2A
N-CHANNEL
SI4800
+3VS
SUSP
P-CHANNEL
DESIGN CURRENT 15A
AO-3413
P-CHANNEL
+5VS_L_BCAS
DESIGN CURRENT 0.5A
BCPWON
FDS6676AS
DESIGN CURRENT 1.5A
DESIGN CURRENT 4A
AO-3413
+3V_LAN
WOL_EN#
P-CHANNEL DESIGN CURRENT 330mA
AO-3413
P-CHANNEL
+3V
DESIGN CURRENT 0.2A
SYSON
APL5930KAI-TRG
+3V
+1.05V
DESIGN CURRENT 1A
+GFX_CORE
DESIGN CURRENT 50A
ADP3211A
SUSP#
Ipeak=59A, Imax=45.7A, Iocp min=70A DESIGN CURRENT 30A
+VGA_CORE
AO3416
DGPU_PWR_EN#
+1.05VS_DGPU
DESIGN CURRENT 3A
VGA_PWROK
+VRAM_1.5VS
DESIGN CURRENT 11A
AO-3413
P-CHANNEL
+3VS_DGPU
DESIGN CURRENT 0.1A
DGPU_PWR_EN
N-CHANNEL
N-CHANNEL
FDS6676AS
Ipeak=6A, Imax=4.A, Iocp min=8
SY8037 +VCCSA
VCCPPWRGD
DESIGN CURRENT 6A
Imax=0.3A, Iocp min=0.8A
APW7137
LNB EN
+16VS
DESIGN CURRENT 0.3A
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
461Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
461Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
461Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
G3 LOW LOWLOW
BTO Option Table
STATE SIGNAL
Full ON
S1(Power On Suspend)
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
SLP_S3# SLP_S4# SLP_S5#
+3VL
+5VL
O
O
X
O
X
O
O
X
LOW LOWLOW
LOW LOW
LOW
HIGH HIGHHIGH
HIGH HIGHHIGH
HIGH
HIGH
HIGH
Voltage Rails
( O MEANS ON X MEANS OFF )
O
O
X
S3
+3VS
X
+3VALW
+5VS
S1
O
+CPU_CORE
OO
OO
X
XX
+VTT
power
plane
O
O
O
O
O
X
S5 S4/ Battery only
XX
B+
State
+1.5VS
+1.5V
S5 S4/AC & Battery
don't exist
S5 S4/AC
+5VALW
S0
O
O
+1.05VS
+0.75VS
+1.8VS
+RTCVCC
O
O
O
O
O
O
+VSB
+VGA_CORE
Platform
Discrete
(DIS@)
Calpella
SKU CPU
Optimus
(OPT@)
PCH
HM76@/HM77@
VGA
Clarksfield/
Arrandale N13PGSR1@/N13PGLR1@
Arrandale
KB Light
KB Light
KBL@
CEC
DHDMI@
CIR
MINI PCI-E SLOT
3G@ TV@ WIMAX@
3G TV Tuner WIMAX
G-SENSOR
Fingerprint
Fingerprint
FP@
GSENSOR@
Function
BTO
Function
BTO
explain
description
explain 10/100M Giga
8105E@ 8111E@
LAN
description
CIR
CIR@
Function
BTO
explain UMA
IHDMI@
description
HDMI
Discrete/
Optimus
HDMI@
COMMON
CEC@
CPU
Arrandale Clarksfield
M1@ M3@
SLOT1SLOT2
HDMI
LAN Fingerprint CIR KB Light
G-SENSOR
G-SENSOR
SKU
DIS@ OPT@
Discrete Optimus
SKU
LVDS
3D@IEDP@
3D Panel
Discrete
Camera & Mic
Camera & Mic
Camera & Mic
CAM@
Function
BTO
explain
description
Clarksfield with
S3 Power Saving
PSM3@
Arrandale Clarksfield
GPU
N13P-GS
N13PGSR1@
+VRAM_1.5VS
+GFX_CORE
+3VS_DGPU
+1.05VS_DGPU
+3VL Cap. Sensor Virtual I2C
1010 0100 bA4 H
PCH SM Bus Address
1010 0000 bA0 H
HEX
DDR SO-DIMM 1
Address
DDR SO-DIMM 0
Device
G-Sensor
HEXDevice AddressPower
NVIDIA GPUHDMI-CEC 34 H 0011 0100 b 1001 1010 b
9E H
WLAN/WIMAX
+3VS
+3VS
+3VS
+3VS
HEX HEX
16 H
EC SM Bus1 Address
Device Address Address
EC SM Bus2 Address
Device
0001 0110 bSmart Battery
96 H
1001 0110 bPCH
Power
PowerPower
+3VL
+3VL
40 H
+3VS
+3VS
3G+3VS
0100 0000 b
OPTFHD@
HM76@/HM77@ N13PGSR1@/N13PGLR1@
2D HD/FHD Panel
Optimus
LVDS2D@
2D HD eDP
Optimus
N13PGS
N13P-GL
N13PGL
N13PGLR1@
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_CPU_DMI#H_SNB_IVB#
H_DRAMRST#
H_PROCHOT#_R
PM_DRAM_PWRGD_RPM_SYS_PWRGD_BUF
BUF_CPU_RST#
TP_SKTOCC#
H_PECI
H_THERMTRIP#_R
H_PM_SYNC
H_CATERR#
PM_DRAM_PWRGD_R
H_PWRGOOD_R
CLK_CPU_DMI
CLK_CPU_EDP
CLK_CPU_EDP#
XDP_BPM#1
XDP_BPM#2
XDP_BPM#0
XDP_BPM#3
PBTN_OUT# XDP_CPU_HOOK0H_PWRGOOD
XDP_PREQ#
XDP_PRDY#
XDP_TDO
XDP_CPU_HOOK3
CLK_CPU_ITP
CLK_CPU_ITP#
XDP_TCK
XDP_CPU_HOOK1
XDP_CPU_HOOK2
XDP_CPU_HOOK6
XDP_TMS
XDP_TRST#
PLT_RST#
VGATE
XDP_TDI
XDP_DBRESET#
CFG0
XDP_BPM#4XDP_BPM#4_R
XDP_DBRESET#
XDP_BPM#5XDP_BPM#5_R XDP_BPM#6XDP_BPM#6_R
XDP_TCK_R
XDP_TMS_R
XDP_BPM#1_R
XDP_TRST#_R
XDP_BPM#2_R
XDP_BPM#3_R
XDP_TDI_R
XDP_TDO_R
XDP_BPM#3
XDP_BPM#0
XDP_BPM#2
XDP_BPM#1
XDP_DBRESET#_R
XDP_PRDY#_R
XDP_BPM#0_R
XDP_PRDY#
XDP_PREQ#
XDP_TCK
XDP_TMS
XDP_TRST#
XDP_TDI
XDP_TDO
XDP_PREQ#_R
XDP_BPM#7XDP_BPM#7_R
+FAN1
+FAN1
SUSP
PM_SYS_PWRGD_BUF
BUFO_CPU_RST# BUF_CPU_RST#
PLT_RST#
XDP_TDO_R
XDP_TCK_R
XDP_TRST#_R
XDP_TMS_R
XDP_TDI_R
XDP_PREQ#_R
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
H_PWRGOOD
H_PROCHOT#
DRAMPWROK
CLK_CPU_EDP#
CLK_CPU_EDP
H_DRAMRST#
H_PWRGOOD_RH_PM_SYNC
BUF_CPU_RST#
H_PECI
H_SNB_IVB#<30>
H_DRAMRST# <7>
H_PROCHOT#<44,49>
H_PECI<44>
H_THERMTRIP#<30>
CLK_CPU_DMI# <26>
CLK_CPU_DMI <26>
H_PM_SYNC<27>
VGATE<27,44,55>
CLK_CPU_ITP#<26>
PBTN_OUT#<27,44>
CLK_CPU_ITP<26>
CFG0<10>
CFG12 <10>
CFG13 <10>
XDP_DBRESET# <27>
CFG14 <10>
CFG15 <10>
FAN_SPEED1<44> FANPWM<44>
PM_PWROK<27,44>
DRAMPWROK<27>
SUSP<9,36,47>
PLT_RST# <29,36,37,38,40,44,45>
CLK_CPU_EDP <26>
CLK_CPU_EDP# <26>
H_PWRGOOD<30>
+1.05VS_VCCP
+1.05VS_VCCP
+3VS
+5VS +3VS
+1.5V_CPU
+1.05VS_VCCP
+3VS
+1.05VS_VCCP
+1.05VS_VCCP
+3VS
+3VALW_PCH
+3VALW_PCH
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
561Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
561Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
561Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
100 MHz
120 MHz
Stuff R41 and R42 if do not support eDP
XDP Connector
Routed as a single daisy chain
Close to CPU side
0.5A
FAN Control Circuit
Buffered Reset to CPU
PU/PD for JTAG signals
DDR3 Compensation Signals
Layout Note:Place these
resistors near Processor
by ESD requestion and place near CPU
Please place near JCPU
RC182 0_0402_5%@RC182 0_0402_5%@
1 2
JFAN
ACES_50278-00401-001
@
JFAN
ACES_50278-00401-001
@
1
12
23
34
4G1
5G2
6
RC56 140_0402_1%RC56 140_0402_1%
12
RC25
39_0402_5%
@
RC25
39_0402_5%
@
12
RC189 1K_0402_5%
@
RC189 1K_0402_5%
@
1 2
RC167 0_0402_5%@RC167 0_0402_5%@
1 2
RC46 51_0402_5%RC46 51_0402_5%
12
RC188 0_0402_5%@RC188 0_0402_5%@
1 2
RC181 0_0402_5%@RC181 0_0402_5%@
1 2
CLOCKS
MISCTHERMALPWR MANAGEMENT
DDR3
MISC
JTAG & BPM
JCPUB
TYCO_2013620-2_IVY BRIDGE
@
CLOCKS
MISCTHERMALPWR MANAGEMENT
DDR3
MISC
JTAG & BPM
JCPUB
TYCO_2013620-2_IVY BRIDGE
@
SM_RCOMP[1] A5
SM_RCOMP[2] A4
SM_DRAMRST# R8
SM_RCOMP[0] AK1
BCLK# A27
BCLK A28
DPLL_REF_CLK# A15
DPLL_REF_CLK A16
CATERR#
AL33
PECI
AN33
PROCHOT#
AL32
THERMTRIP#
AN32
SM_DRAMPWROK
V8
RESET#
AR33
PRDY# AP29
PREQ# AP27
TCK AR26
TMS AR27
TRST# AP30
TDI AR28
TDO AP26
DBR# AL35
BPM#[0] AT28
BPM#[1] AR29
BPM#[2] AR30
BPM#[3] AT30
BPM#[4] AP32
BPM#[5] AR31
BPM#[6] AT31
BPM#[7] AR32
PM_SYNC
AM34
SKTOCC#
AN34
PROC_SELECT#
C26
UNCOREPWRGOOD
AP33
T1 PADT1 PAD
R1
0_0603_5%
R1
0_0603_5%
1 2
RC173 0_0402_5%@RC173 0_0402_5%@
1 2
RC161 0_0402_5%@RC161 0_0402_5%@
1 2
C3
10U_0805_10V6K
@
C3
10U_0805_10V6K
@
1
2
RC168
1K_0402_5%
RC168
1K_0402_5%
1 2
C2
10K_0402_5%
C2
10K_0402_5%
12
C5
10U_0603_6.3V6M
C5
10U_0603_6.3V6M
1
2
CC621000P_0402_50V7K @CC621000P_0402_50V7K @
12
RC55 51_0402_5%RC55 51_0402_5%
12
CC33
0.1U_0402_10V7K
CC33
0.1U_0402_10V7K
12
RC184 0_0402_5%@
RC184 0_0402_5%@
1 2
RC44 62_0402_5%RC44 62_0402_5%
12
RC40
0_0402_5%
@
RC40
0_0402_5%
@
12
CC36
0.1U_0402_10V7K
CC36
0.1U_0402_10V7K
1
2
RC158 1K_0402_5%LVDS@RC158 1K_0402_5%LVDS@
1 2
RC157 1K_0402_5%LVDS@RC157 1K_0402_5%LVDS@
1 2
RC177 0_0402_5%@RC177 0_0402_5%@
1 2
RC49 51_0402_5%RC49 51_0402_5%
12
RC171 0_0402_5%@RC171 0_0402_5%@
1 2
RC163 0_0402_5%@RC163 0_0402_5%@
1 2
RC185 1K_0402_5%@RC185 1K_0402_5%@
1 2
CC671000P_0402_50V7K @CC671000P_0402_50V7K @
12
RC178 0_0402_5%@RC178 0_0402_5%@
1 2
RC162 0_0402_5%@RC162 0_0402_5%@
1 2
RC183
0_0402_5%
RC183
0_0402_5%
1 2
CC631000P_0402_50V7K @CC631000P_0402_50V7K @
12
RC166 0_0402_5%@RC166 0_0402_5%@
1 2
C4
0.01U_0402_25V7K
@
C4
0.01U_0402_25V7K
@
1
2
RC12 0_0402_5%@RC12 0_0402_5%@
1 2
RC35
43_0402_1%
RC35
43_0402_1%
1 2
RC165 0_0402_5%@RC165 0_0402_5%@
1 2
RC180 0_0402_5%@RC180 0_0402_5%@
1 2
CC64
0.1U_0402_10V7K
@
CC64
0.1U_0402_10V7K
@
1
2
T2 PADT2 PAD
RC53 51_0402_5%RC53 51_0402_5%
12
RC13
10K_0402_5%
RC13
10K_0402_5%
12
RC175 0_0402_5%@RC175 0_0402_5%@
1 2
G
D
S
QC2
2N7002_SOT23
@
G
D
S
QC2
2N7002_SOT23
@
2
13
RC164 0_0402_5%@RC164 0_0402_5%@
1 2
RC169 0_0402_5%@RC169 0_0402_5%@
1 2
RC159
56_0402_5%
RC159
56_0402_5%
1 2
RC187 1K_0402_5%@RC187 1K_0402_5%@
1 2
RC14
200_0402_5%
RC14
200_0402_5%
12
C6
1000P_0402_50V7K
C6
1000P_0402_50V7K
1
2
JXDP1
MOLEX 52435-2671
@JXDP1
MOLEX 52435-2671
@
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26 27
28
RC160
0_0402_5%
RC160
0_0402_5%
1 2
D1
BAS16_SOT23-3
D1
BAS16_SOT23-3
12
RC45 10K_0402_5%RC45 10K_0402_5%
12
RC186 0_0402_5%@RC186 0_0402_5%@
1 2
CC701000P_0402_50V7K @CC701000P_0402_50V7K @
12
UC1
74AHC1G09GW_TSSOP5
UC1
74AHC1G09GW_TSSOP5
B
1
A
2
G
3
O4
P5
RC48 51_0402_5%@RC48 51_0402_5%@
12
CC34 180P_0402_50V8J
@
CC34 180P_0402_50V8J
@
1 2
RC174 0_0402_5%@RC174 0_0402_5%@
1 2
RC11 200_0402_5%RC11 200_0402_5%
12
RC47 51_0402_5%RC47 51_0402_5%
12
RC38
75_0402_5%
RC38
75_0402_5%
12
RC61 200_0402_1%RC61 200_0402_1%
12
RC59 25.5_0402_1%RC59 25.5_0402_1%
12
UC2
74AHC1G125GW_SOT353-5
UC2
74AHC1G125GW_SOT353-5
OE#
1
IN
2
GND
3OUT 4
VCC 5
RC170 130_0402_5%RC170 130_0402_5%
1 2
CC661000P_0402_50V7K @CC661000P_0402_50V7K @
12
RC179 0_0402_5%@RC179 0_0402_5%@
1 2
RC176 0_0402_5%@RC176 0_0402_5%@
1 2
RC172 0_0402_5%@RC172 0_0402_5%@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
EDP_COMP
PEG_COMP
PCIE_CTX_GRX_N2
PCIE_CTX_GRX_N1
PCIE_CTX_GRX_N0
PCIE_CTX_GRX_N4
PCIE_CTX_GRX_N7
PCIE_CTX_GRX_N3
PCIE_CTX_GRX_N5
PCIE_CTX_GRX_N8
PCIE_CTX_GRX_N9
PCIE_CTX_GRX_N10
PCIE_CTX_GRX_N6
PCIE_CTX_GRX_N11
PCIE_CTX_GRX_N12
PCIE_CTX_GRX_N15
PCIE_CTX_GRX_N14
PCIE_CTX_GRX_N13
PCIE_CTX_C_GRX_N7
PCIE_CTX_C_GRX_N1
PCIE_CTX_C_GRX_N2
PCIE_CTX_C_GRX_N4
PCIE_CTX_C_GRX_N8
PCIE_CTX_C_GRX_N10
PCIE_CTX_C_GRX_N0
PCIE_CTX_C_GRX_N9
PCIE_CTX_C_GRX_N5
PCIE_CTX_C_GRX_N3
PCIE_CTX_C_GRX_N12
PCIE_CTX_C_GRX_N14
PCIE_CTX_C_GRX_N6
PCIE_CTX_C_GRX_N11
PCIE_CTX_C_GRX_N15
PCIE_CTX_C_GRX_N13
PCIE_CTX_GRX_P1
PCIE_CTX_GRX_P7
PCIE_CTX_GRX_P2
PCIE_CTX_GRX_P3
PCIE_CTX_GRX_P0
PCIE_CTX_GRX_P4
PCIE_CTX_GRX_P5
PCIE_CTX_GRX_P8
PCIE_CTX_GRX_P11
PCIE_CTX_GRX_P10
PCIE_CTX_GRX_P9
PCIE_CTX_GRX_P6
PCIE_CTX_GRX_P15
PCIE_CTX_GRX_P14
PCIE_CTX_GRX_P13
PCIE_CTX_GRX_P12
PCIE_CTX_C_GRX_P7
PCIE_CTX_C_GRX_P1
PCIE_CTX_C_GRX_P2
PCIE_CTX_C_GRX_P5
PCIE_CTX_C_GRX_P4
PCIE_CTX_C_GRX_P0
PCIE_CTX_C_GRX_P3
PCIE_CTX_C_GRX_P15
PCIE_CTX_C_GRX_P9
PCIE_CTX_C_GRX_P6
PCIE_CTX_C_GRX_P10
PCIE_CTX_C_GRX_P11
PCIE_CTX_C_GRX_P8
PCIE_CTX_C_GRX_P12
PCIE_CTX_C_GRX_P13
PCIE_CTX_C_GRX_P14
PCIE_GTX_C_CRX_N2
PCIE_GTX_C_CRX_N1
PCIE_GTX_C_CRX_N0
PCIE_GTX_C_CRX_N4
PCIE_GTX_C_CRX_N7
PCIE_GTX_C_CRX_N3
PCIE_GTX_C_CRX_N5
PCIE_GTX_C_CRX_N8
PCIE_GTX_C_CRX_N9
PCIE_GTX_C_CRX_N10
PCIE_GTX_C_CRX_N6
PCIE_GTX_C_CRX_N11
PCIE_GTX_C_CRX_N12
PCIE_GTX_C_CRX_N15
PCIE_GTX_C_CRX_N14
PCIE_GTX_C_CRX_N13
PCIE_GTX_C_CRX_P1
PCIE_GTX_C_CRX_P7
PCIE_GTX_C_CRX_P2
PCIE_GTX_C_CRX_P3
PCIE_GTX_C_CRX_P0
PCIE_GTX_C_CRX_P4
PCIE_GTX_C_CRX_P5
PCIE_GTX_C_CRX_P8
PCIE_GTX_C_CRX_P11
PCIE_GTX_C_CRX_P10
PCIE_GTX_C_CRX_P9
PCIE_GTX_C_CRX_P6
PCIE_GTX_C_CRX_P15
PCIE_GTX_C_CRX_P14
PCIE_GTX_C_CRX_P13
PCIE_GTX_C_CRX_P12
DMI_CTX_PRX_P2
DMI_CTX_PRX_P3
DMI_CTX_PRX_P0
DMI_CTX_PRX_P1
DMI_PTX_CRX_N2
DMI_PTX_CRX_N1
DMI_PTX_CRX_N0
DMI_PTX_CRX_N3
DMI_PTX_CRX_P2
DMI_PTX_CRX_P3
DMI_PTX_CRX_P0
DMI_PTX_CRX_P1
DMI_CTX_PRX_N2
DMI_CTX_PRX_N3
DMI_CTX_PRX_N0
DMI_CTX_PRX_N1
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N5
FDI_CTX_PRX_N6
FDI_CTX_PRX_N7
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CTX_PRX_P2
FDI_CTX_PRX_P3
FDI_CTX_PRX_P4
FDI_CTX_PRX_P5
FDI_CTX_PRX_P6
FDI_CTX_PRX_P7
FDI_FSYNC1
FDI_FSYNC0
FDI_LSYNC0
FDI_INT
FDI_LSYNC1
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_INT
FDI_LSYNC1
H_EDP_HPD#
H_EDP_HPD#
PCIE_CTX_C_GRX_N[0..15] <13>
PCIE_CTX_C_GRX_P[0..15] <13>
PCIE_GTX_C_CRX_N[0..15] <13>
PCIE_GTX_C_CRX_P[0..15] <13>
DMI_PTX_CRX_P3<27> DMI_PTX_CRX_P2<27> DMI_PTX_CRX_P1<27> DMI_PTX_CRX_P0<27>
DMI_PTX_CRX_N3<27> DMI_PTX_CRX_N2<27> DMI_PTX_CRX_N1<27> DMI_PTX_CRX_N0<27>
DMI_CTX_PRX_P3<27> DMI_CTX_PRX_P2<27> DMI_CTX_PRX_P1<27> DMI_CTX_PRX_P0<27>
DMI_CTX_PRX_N3<27> DMI_CTX_PRX_N2<27> DMI_CTX_PRX_N1<27> DMI_CTX_PRX_N0<27>
FDI_CTX_PRX_N0<27> FDI_CTX_PRX_N1<27> FDI_CTX_PRX_N2<27> FDI_CTX_PRX_N3<27> FDI_CTX_PRX_N4<27> FDI_CTX_PRX_N5<27> FDI_CTX_PRX_N6<27> FDI_CTX_PRX_N7<27>
FDI_CTX_PRX_P0<27> FDI_CTX_PRX_P1<27> FDI_CTX_PRX_P2<27> FDI_CTX_PRX_P3<27> FDI_CTX_PRX_P4<27> FDI_CTX_PRX_P5<27> FDI_CTX_PRX_P6<27> FDI_CTX_PRX_P7<27>
FDI_FSYNC0<27> FDI_FSYNC1<27>
FDI_INT<27>
FDI_LSYNC0<27> FDI_LSYNC1<27>
CPU_EDP_HPD<22>
H_EDP_AUXP<22> H_EDP_AUXN<22>
H_EDP_TXP0<22> H_EDP_TXP1<22>
H_EDP_TXN0<22> H_EDP_TXN1<22>
+1.05VS_VCCP
+1.05VS_VCCP
+1.05VS_VCCP
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
661Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
661Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
661Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
eDP_COMP signals should be
shorted near balls and
routed with typical
impedance <25m ohm
PEG_ICOMPI and RCOMPO signals should be
shorted and routed
with - max length = 500 mils - typical
impedance = 43 m ohm (4 mils)
PEG_ICOMPO signals should be routed with -
max length = 500 mils
- typical impedance = 14.5 m ohm (12 mils)
Close to CPU
IVY Bridge Gen1/Gen2
PEG DG suggest AC cap
75 nF~265 nF
Gen3 180 nF~265 nF
SANDY Bridge Gen1/Gen2 180 nF~265 nF
NV N13X Gen1/2/3 Suggest 220 nF
CC18 0.22U_0402_16V7KCC18 0.22U_0402_16V7K
1 2
RC1
24.9_0402_1%
RC1
24.9_0402_1%
12
CC17 0.22U_0402_16V7KCC17 0.22U_0402_16V7K
1 2
CC31 0.22U_0402_16V7KCC31 0.22U_0402_16V7K
1 2
RC192 1K_0402_5%
DIS@
RC192 1K_0402_5%
DIS@
1 2
CC24 0.22U_0402_16V7KCC24 0.22U_0402_16V7K
1 2
RC4
100K_0402_5%
IEDP@
RC4
100K_0402_5%
IEDP@
1 2
RC2 24.9_0402_1%RC2 24.9_0402_1%
1 2
RC195 1K_0402_5%
DIS@
RC195 1K_0402_5%
DIS@
1 2
CC20 0.22U_0402_16V7KCC20 0.22U_0402_16V7K
1 2
CC3 0.22U_0402_16V7KCC3 0.22U_0402_16V7K
1 2
RC193 1K_0402_5%
DIS@
RC193 1K_0402_5%
DIS@
1 2
CC27 0.22U_0402_16V7KCC27 0.22U_0402_16V7K
1 2
CC32 0.22U_0402_16V7KCC32 0.22U_0402_16V7K
1 2
RC191 1K_0402_5%
DIS@
RC191 1K_0402_5%
DIS@
1 2
CC4 0.22U_0402_16V7KCC4 0.22U_0402_16V7K
1 2
CC12 0.22U_0402_16V7KCC12 0.22U_0402_16V7K
1 2
CC29 0.22U_0402_16V7KCC29 0.22U_0402_16V7K
1 2
CC9 0.22U_0402_16V7KCC9 0.22U_0402_16V7K
1 2
CC13 0.22U_0402_16V7KCC13 0.22U_0402_16V7K
1 2
CC30 0.22U_0402_16V7KCC30 0.22U_0402_16V7K
1 2
CC28 0.22U_0402_16V7KCC28 0.22U_0402_16V7K
1 2
CC2 0.22U_0402_16V7KCC2 0.22U_0402_16V7K
1 2
CC14 0.22U_0402_16V7KCC14 0.22U_0402_16V7K
1 2
PCI EXPRESS* - GRAPHICS
DMI
Intel(R) FDI
eDP
JCPUA
TYCO_2013620-2_IVY BRIDGE
@
PCI EXPRESS* - GRAPHICS
DMI
Intel(R) FDI
eDP
JCPUA
TYCO_2013620-2_IVY BRIDGE
@
DMI_RX#[0]
B27
DMI_RX#[1]
B25
DMI_RX#[2]
A25
DMI_RX#[3]
B24
DMI_RX[0]
B28
DMI_RX[1]
B26
DMI_RX[2]
A24
DMI_RX[3]
B23
DMI_TX#[0]
G21
DMI_TX#[1]
E22
DMI_TX#[2]
F21
DMI_TX#[3]
D21
DMI_TX[0]
G22
DMI_TX[1]
D22
DMI_TX[3]
C21 DMI_TX[2]
F20
FDI0_TX#[0]
A21
FDI0_TX#[1]
H19
FDI0_TX#[2]
E19
FDI0_TX#[3]
F18
FDI1_TX#[0]
B21
FDI1_TX#[1]
C20
FDI1_TX#[2]
D18
FDI1_TX#[3]
E17
FDI0_TX[0]
A22
FDI0_TX[1]
G19
FDI0_TX[2]
E20
FDI0_TX[3]
G18
FDI1_TX[0]
B20
FDI1_TX[1]
C19
FDI1_TX[2]
D19
FDI1_TX[3]
F17
FDI0_FSYNC
J18
FDI1_FSYNC
J17
FDI_INT
H20
FDI0_LSYNC
J19
FDI1_LSYNC
H17
PEG_ICOMPI J22
PEG_ICOMPO J21
PEG_RCOMPO H22
PEG_RX#[0] K33
PEG_RX#[1] M35
PEG_RX#[2] L34
PEG_RX#[3] J35
PEG_RX#[4] J32
PEG_RX#[5] H34
PEG_RX#[6] H31
PEG_RX#[7] G33
PEG_RX#[8] G30
PEG_RX#[9] F35
PEG_RX#[10] E34
PEG_RX#[11] E32
PEG_RX#[12] D33
PEG_RX#[13] D31
PEG_RX#[14] B33
PEG_RX#[15] C32
PEG_RX[0] J33
PEG_RX[1] L35
PEG_RX[2] K34
PEG_RX[3] H35
PEG_RX[4] H32
PEG_RX[5] G34
PEG_RX[6] G31
PEG_RX[7] F33
PEG_RX[8] F30
PEG_RX[9] E35
PEG_RX[10] E33
PEG_RX[11] F32
PEG_RX[12] D34
PEG_RX[13] E31
PEG_RX[14] C33
PEG_RX[15] B32
PEG_TX#[0] M29
PEG_TX#[1] M32
PEG_TX#[2] M31
PEG_TX#[3] L32
PEG_TX#[4] L29
PEG_TX#[5] K31
PEG_TX#[6] K28
PEG_TX#[7] J30
PEG_TX#[8] J28
PEG_TX#[9] H29
PEG_TX#[10] G27
PEG_TX#[11] E29
PEG_TX#[12] F27
PEG_TX#[13] D28
PEG_TX#[14] F26
PEG_TX#[15] E25
PEG_TX[0] M28
PEG_TX[1] M33
PEG_TX[2] M30
PEG_TX[3] L31
PEG_TX[4] L28
PEG_TX[5] K30
PEG_TX[6] K27
PEG_TX[7] J29
PEG_TX[8] J27
PEG_TX[9] H28
PEG_TX[10] G28
PEG_TX[11] E28
PEG_TX[12] F28
PEG_TX[13] D27
PEG_TX[14] E26
PEG_TX[15] D25
eDP_AUX
C15
eDP_AUX#
D15
eDP_TX[0]
C17
eDP_TX[1]
F16
eDP_TX[2]
C16
eDP_TX[3]
G15
eDP_TX#[0]
C18
eDP_TX#[1]
E16
eDP_TX#[2]
D16
eDP_TX#[3]
F15
eDP_COMPIO
A18
eDP_HPD#
B16 eDP_ICOMPO
A17
CC6 0.22U_0402_16V7KCC6 0.22U_0402_16V7K
1 2
CC11 0.22U_0402_16V7KCC11 0.22U_0402_16V7K
1 2
CC26 0.22U_0402_16V7KCC26 0.22U_0402_16V7K
1 2
CC7 0.22U_0402_16V7KCC7 0.22U_0402_16V7K
1 2
CC23 0.22U_0402_16V7KCC23 0.22U_0402_16V7K
1 2
G
D
S
QC1
2N7002_SOT23-3
IEDP@
G
D
S
QC1
2N7002_SOT23-3
IEDP@
2
13
CC10 0.22U_0402_16V7KCC10 0.22U_0402_16V7K
1 2
CC5 0.22U_0402_16V7KCC5 0.22U_0402_16V7K
1 2
RC3
1K_0402_5%
RC3
1K_0402_5%
1 2
RC194 1K_0402_5%
DIS@
RC194 1K_0402_5%
DIS@
1 2
CC25 0.22U_0402_16V7KCC25 0.22U_0402_16V7K
1 2
CC21 0.22U_0402_16V7KCC21 0.22U_0402_16V7K
1 2
CC1 0.22U_0402_16V7KCC1 0.22U_0402_16V7K
1 2
CC15 0.22U_0402_16V7KCC15 0.22U_0402_16V7K
1 2
CC16 0.22U_0402_16V7KCC16 0.22U_0402_16V7K
1 2
CC8 0.22U_0402_16V7KCC8 0.22U_0402_16V7K
1 2
CC19 0.22U_0402_16V7KCC19 0.22U_0402_16V7K
1 2
CC22 0.22U_0402_16V7KCC22 0.22U_0402_16V7K
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_DQS2
DDR_A_DQS#0
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
DDR_A_DQS4
DDR_A_DQS#1
DDR_A_DQS#3
DDR_A_DQS#2
DDR_A_DQS#5
DDR_A_DQS#4
DDR_A_DQS#6
DDR_A_DQS#7
DDR_A_MA15
DDRA_SCS0# DDRB_SCS0#
DDRB_SCS1#
DDRA_CLK1# DDRB_CLK1#
DDRB_CLK0#
DDRA_CLK0
DDRA_CKE1 DDRB_CKE1
DDRB_CKE0
DDRA_CLK0#
DDRA_ODT1
DDRA_ODT0 DDRB_ODT0
DDRB_ODT1
DDRA_SCS1#
DDRA_CLK1 DDRB_CLK1
DDR_B_DQS7
DDR_B_DQS0
DDR_B_DQS5
DDR_B_DQS1
DDR_B_DQS4
DDR_B_DQS3
DDR_B_DQS6
DDR_B_DQS2
DDR_B_DQS#1
DDR_B_DQS#5
DDR_B_DQS#7
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#0
DDR_B_DQS#6
DDR_B_DQS#2
DDR_B_MA2
DDR_B_MA3
DDR_B_MA10
DDR_B_MA11
DDR_B_MA8
DDR_B_MA9
DDR_B_MA0
DDR_B_MA1
DDR_B_MA6
DDR_B_MA7
DDR_B_MA4
DDR_B_MA5
DDR_B_MA14
DDR_B_MA12
DDR_B_MA13
DDR_B_D32
DDR_B_D33
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D48
DDR_B_D49
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D50
DDR_B_D51
DDR_B_D56
DDR_B_D57
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
DDR_B_D58
DDR_B_D59
DDR_B_D34
DDR_B_D35
DDR_B_D40
DDR_B_D41
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_MA15
DDR_B_D42
DDR_B_D43
DDR_B_D0
DDR_B_D1
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_WE#
DDR_B_D7
DDR_B_D16
DDR_B_D17
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D18
DDR_B_D19
DDR_B_D24
DDR_B_D25
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D26
DDR_B_D27
DDR_B_D2
DDR_B_D3
DDR_B_D8
DDR_B_D9
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D10
DDR_B_D11
DDR_B_BS2
DDR_B_BS1
DDR_B_BS0
DDRA_CKE0
DDR_A_D63
DDR_A_D62
DDR_A_D8
DDR_A_D5
DDR_A_D4
DDR_A_D3
DDR_A_D7
DDR_A_D6
DDR_A_D59
DDR_A_D58
DDR_A_D57
DDR_A_D56
DDR_A_D47
DDR_A_D46
DDR_A_D43
DDR_A_D42
DDR_A_D41
DDR_A_D40
DDR_A_D45
DDR_A_D44
DDR_A_D39
DDR_A_D38
DDR_A_D35
DDR_A_D34
DDR_A_D33
DDR_A_D32
DDR_A_D37
DDR_A_D36
DDR_A_D61
DDR_A_D60
DDR_A_D2
DDR_A_D1
DDR_A_D0
DDR_A_D55
DDR_A_D54
DDR_A_D51
DDR_A_D50
DDR_A_D49
DDR_A_D48
DDR_A_D53
DDR_A_D52
DDR_A_D31
DDR_A_D30
DDR_A_D27
DDR_A_D26
DDR_A_D25
DDR_A_D24
DDR_A_D15
DDR_A_D14
DDR_A_D11
DDR_A_D10
DDR_A_D9
DDR_A_D13
DDR_A_D12
DDR_A_D29
DDR_A_D28
DDR_A_D23
DDR_A_D22
DDR_A_D19
DDR_A_D18
DDR_A_D17
DDR_A_D16
DDR_A_D21
DDR_A_D20
DDR_B_RAS#
DDR_B_CAS#
DDRB_CLK0
DDR_A_MA14
DDR_A_MA0
DDR_A_MA1
DDR_A_MA4
DDR_A_MA2
DDR_A_MA3
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA12
DDR_A_MA13
DDR_A_MA11
DDR_A_MA10
DDR_A_DQS1
DDR_A_DQS3
DDR_A_DQS0
DDR_A_BS2
DDR_A_BS1
DDR_A_BS0
DDR_A_WE#
DDR_A_RAS#
DDR_A_CAS#
DRAMRST_CNTRL
DDR3_DRAMRST#_RH_DRAMRST#
DDRA_CLK0 <11> DDRB_CLK0 <12>
DDRA_CLK1 <11>
DDRA_CLK0# <11>
DDRB_CLK1 <12>
DDRA_CLK1# <11> DDRB_CLK1# <12>
DDRB_CLK0# <12>
DDRA_CKE0 <11> DDRB_CKE0 <12>
DDRA_CKE1 <11>
DDRA_SCS0# <11>
DDRB_CKE1 <12>
DDRA_SCS1# <11> DDRB_SCS1# <12>
DDRB_SCS0# <12>
DDRA_ODT0 <11> DDRB_ODT0 <12>
DDRA_ODT1 <11> DDRB_ODT1 <12>
DDR_B_MA[0..15] <12>
DDR_B_DQS#[0..7] <12>
DDR_B_DQS[0..7] <12>
DDR_B_D[0..63]<12>
DDR_B_WE#<12>
DDR_B_BS1<12> DDR_B_BS2<12>
DDR_B_BS0<12>
DDR_A_D[0..63]<11>
DDR_B_RAS#<12> DDR_B_CAS#<12>
DDR_A_MA[0..15] <11>
DDR_A_DQS[0..7] <11>
DDR_A_DQS#[0..7] <11>
DDR_A_BS1<11> DDR_A_BS2<11>
DDR_A_BS0<11>
DDR_A_WE#<11>
DDR_A_CAS#<11> DDR_A_RAS#<11>
H_DRAMRST#<5> SM_DRAMRST# <11,12>
DRAMRST_CNTRL_PCH<11,26>
+1.5V
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
761Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
761Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
761Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
CC37
0.047U_0402_25V6K
CC37
0.047U_0402_25V6K
1
2
DDR SYSTEM MEMORY B
JCPUD
TYCO_2013620-2_IVY BRIDGE
@
DDR SYSTEM MEMORY B
JCPUD
TYCO_2013620-2_IVY BRIDGE
@
SB_BS[0]
AA9
SB_BS[1]
AA7
SB_BS[2]
R6
SB_CAS#
AA10
SB_RAS#
AB8
SB_WE#
AB9
SB_CLK[0] AE2
SB_CLK[1] AE1
SB_CLK#[0] AD2
SB_CLK#[1] AD1
SB_CKE[0] R9
SB_CKE[1] R10
SB_ODT[0] AE4
SB_ODT[1] AD4
SB_DQS[4] AN6
SB_DQS#[4] AN5
SB_DQS[5] AP8
SB_DQS#[5] AP9
SB_DQS[6] AK11
SB_DQS#[6] AK12
SB_DQS[7] AP14
SB_DQS#[7] AP15
SB_DQS[0] C7
SB_DQS#[0] D7
SB_DQS[1] G3
SB_DQS#[1] F3
SB_DQS[2] J6
SB_DQS#[2] K6
SB_DQS[3] M3
SB_DQS#[3] N3
SB_MA[0] AA8
SB_MA[1] T7
SB_MA[2] R7
SB_MA[3] T6
SB_MA[4] T2
SB_MA[5] T4
SB_MA[6] T3
SB_MA[7] R2
SB_MA[8] T5
SB_MA[9] R3
SB_MA[10] AB7
SB_MA[11] R1
SB_MA[12] T1
SB_MA[13] AB10
SB_MA[14] R5
SB_MA[15] R4
SB_DQ[0]
C9
SB_DQ[1]
A7
SB_DQ[2]
D10
SB_DQ[3]
C8
SB_DQ[4]
A9
SB_DQ[5]
A8
SB_DQ[6]
D9
SB_DQ[7]
D8
SB_DQ[8]
G4
SB_DQ[9]
F4
SB_DQ[10]
F1
SB_DQ[11]
G1
SB_DQ[12]
G5
SB_DQ[13]
F5
SB_DQ[14]
F2
SB_DQ[15]
G2
SB_DQ[16]
J7
SB_DQ[17]
J8
SB_DQ[18]
K10
SB_DQ[19]
K9
SB_DQ[20]
J9
SB_DQ[21]
J10
SB_DQ[22]
K8
SB_DQ[23]
K7
SB_DQ[24]
M5
SB_DQ[25]
N4
SB_DQ[26]
N2
SB_DQ[27]
N1
SB_DQ[28]
M4
SB_DQ[29]
N5
SB_DQ[30]
M2
SB_DQ[31]
M1
SB_DQ[32]
AM5
SB_DQ[33]
AM6
SB_DQ[34]
AR3
SB_DQ[35]
AP3
SB_DQ[36]
AN3
SB_DQ[37]
AN2
SB_DQ[38]
AN1
SB_DQ[39]
AP2
SB_DQ[40]
AP5
SB_DQ[41]
AN9
SB_DQ[42]
AT5
SB_DQ[43]
AT6
SB_DQ[44]
AP6
SB_DQ[45]
AN8
SB_DQ[46]
AR6
SB_DQ[47]
AR5
SB_DQ[48]
AR9
SB_DQ[49]
AJ11
SB_DQ[50]
AT8
SB_DQ[51]
AT9
SB_DQ[52]
AH11
SB_DQ[53]
AR8
SB_DQ[54]
AJ12
SB_DQ[55]
AH12
SB_DQ[56]
AT11
SB_DQ[57]
AN14
SB_DQ[58]
AR14
SB_DQ[59]
AT14
SB_DQ[60]
AT12
SB_DQ[61]
AN15
SB_DQ[62]
AR15
SB_DQ[63]
AT15
RSVD_TP[11] AB2
RSVD_TP[12] AA2
RSVD_TP[13] T9
RSVD_TP[14] AA1
RSVD_TP[15] AB1
RSVD_TP[16] T10
SB_CS#[0] AD3
SB_CS#[1] AE3
RSVD_TP[17] AD6
RSVD_TP[18] AE6
RSVD_TP[19] AD5
RSVD_TP[20] AE5
RC78
4.99K_0402_1%
RC78
4.99K_0402_1%
1 2
G
D
S
QC3
BSS138_NL_SOT23-3
G
D
S
QC3
BSS138_NL_SOT23-3
2
13
RC76
1K_0402_5%
RC76
1K_0402_5%
12
RC75
0_0402_5%
@
RC75
0_0402_5%
@
1 2
RC77
1K_0402_5%
RC77
1K_0402_5%
1 2
RC73 0_0402_5%RC73 0_0402_5%
1 2
DDR SYSTEM MEMORY A
JCPUC
TYCO_2013620-2_IVY BRIDGE
@
DDR SYSTEM MEMORY A
JCPUC
TYCO_2013620-2_IVY BRIDGE
@
SA_BS[0]
AE10
SA_BS[1]
AF10
SA_BS[2]
V6
SA_CAS#
AE8
SA_RAS#
AD9
SA_WE#
AF9
SA_CLK[0] AB6
SA_CLK[1] AA5
SA_CLK#[0] AA6
SA_CLK#[1] AB5
SA_CKE[0] V9
SA_CKE[1] V10
SA_CS#[0] AK3
SA_CS#[1] AL3
SA_ODT[0] AH3
SA_ODT[1] AG3
SA_DQS[0] D4
SA_DQS#[0] C4
SA_DQS[1] F6
SA_DQS#[1] G6
SA_DQS[2] K3
SA_DQS#[2] J3
SA_DQS[3] N6
SA_DQS#[3] M6
SA_DQS[4] AL5
SA_DQS#[4] AL6
SA_DQS[5] AM9
SA_DQS#[5] AM8
SA_DQS[6] AR11
SA_DQS#[6] AR12
SA_DQS[7] AM14
SA_DQS#[7] AM15
SA_MA[0] AD10
SA_MA[1] W1
SA_MA[2] W2
SA_MA[3] W7
SA_MA[4] V3
SA_MA[5] V2
SA_MA[6] W3
SA_MA[7] W6
SA_MA[8] V1
SA_MA[9] W5
SA_MA[10] AD8
SA_MA[11] V4
SA_MA[12] W4
SA_MA[13] AF8
SA_MA[14] V5
SA_MA[15] V7
SA_DQ[0]
C5
SA_DQ[1]
D5
SA_DQ[2]
D3
SA_DQ[3]
D2
SA_DQ[4]
D6
SA_DQ[5]
C6
SA_DQ[6]
C2
SA_DQ[7]
C3
SA_DQ[8]
F10
SA_DQ[9]
F8
SA_DQ[10]
G10
SA_DQ[11]
G9
SA_DQ[12]
F9
SA_DQ[13]
F7
SA_DQ[14]
G8
SA_DQ[15]
G7
SA_DQ[16]
K4
SA_DQ[17]
K5
SA_DQ[18]
K1
SA_DQ[19]
J1
SA_DQ[20]
J5
SA_DQ[21]
J4
SA_DQ[22]
J2
SA_DQ[23]
K2
SA_DQ[24]
M8
SA_DQ[25]
N10
SA_DQ[26]
N8
SA_DQ[27]
N7
SA_DQ[28]
M10
SA_DQ[29]
M9
SA_DQ[30]
N9
SA_DQ[31]
M7
SA_DQ[32]
AG6
SA_DQ[33]
AG5
SA_DQ[34]
AK6
SA_DQ[35]
AK5
SA_DQ[36]
AH5
SA_DQ[37]
AH6
SA_DQ[38]
AJ5
SA_DQ[39]
AJ6
SA_DQ[40]
AJ8
SA_DQ[41]
AK8
SA_DQ[42]
AJ9
SA_DQ[43]
AK9
SA_DQ[44]
AH8
SA_DQ[45]
AH9
SA_DQ[46]
AL9
SA_DQ[47]
AL8
SA_DQ[48]
AP11
SA_DQ[49]
AN11
SA_DQ[50]
AL12
SA_DQ[51]
AM12
SA_DQ[52]
AM11
SA_DQ[53]
AL11
SA_DQ[54]
AP12
SA_DQ[55]
AN12
SA_DQ[56]
AJ14
SA_DQ[57]
AH14
SA_DQ[58]
AL15
SA_DQ[59]
AK15
SA_DQ[60]
AL14
SA_DQ[61]
AK14
SA_DQ[62]
AJ15
SA_DQ[63]
AH15
RSVD_TP[1] AB4
RSVD_TP[2] AA4
RSVD_TP[4] AB3
RSVD_TP[5] AA3
RSVD_TP[3] W9
RSVD_TP[6] W10
RSVD_TP[7] AG1
RSVD_TP[8] AH1
RSVD_TP[9] AG2
RSVD_TP[10] AH2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VCCSENSE_R
VSSSENSE_R
H_CPU_SVIDALRT#
H_CPU_SVIDCLK
H_CPU_SVIDDAT
VCCIO_SENSE
VR_SVID_ALRT# <55>
VR_SVID_CLK <55>
VR_SVID_DAT <55>
VCCSENSE <55>
VSSSENSE <55>
VCCIO_SENSE <53>
+1.05VS_VCCP+1.05VS_VCCP
+CPU_CORE +1.05VS_VCCP
+CPU_CORE
+1.05VS_VCCP Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
861Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
861Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
861Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Pull high resistor on VR side
Close to CPU
Close to CPU
8.5A
97A
Reserve 0.1u to avoid noise
RC91
130_0402_5%
RC91
130_0402_5%
12
RC88 0_0402_5%RC88 0_0402_5%
1 2
RC97
100_0402_1%
RC97
100_0402_1%
12
RC95 0_0402_5%RC95 0_0402_5%
1 2
RC93
100_0402_1%
RC93
100_0402_1%
1 2
POWER
CORE SUPPLY
PEG AND DDR
SENSE LINES SVID
JCPUF
TYCO_2013620-2_IVY BRIDGE@
POWER
CORE SUPPLY
PEG AND DDR
SENSE LINES SVID
JCPUF
TYCO_2013620-2_IVY BRIDGE@
VCC_SENSE AJ35
VSS_SENSE AJ34
VIDALERT# AJ29
VIDSCLK AJ30
VIDSOUT AJ28
VSS_SENSE_VCCIO A10
VCC1
AG35
VCC2
AG34
VCC3
AG33
VCC4
AG32
VCC5
AG31
VCC6
AG30
VCC7
AG29
VCC8
AG28
VCC9
AG27
VCC10
AG26
VCC11
AF35
VCC12
AF34
VCC13
AF33
VCC14
AF32
VCC15
AF31
VCC16
AF30
VCC17
AF29
VCC18
AF28
VCC19
AF27
VCC20
AF26
VCC21
AD35
VCC22
AD34
VCC23
AD33
VCC24
AD32
VCC25
AD31
VCC26
AD30
VCC27
AD29
VCC28
AD28
VCC29
AD27
VCC30
AD26
VCC31
AC35
VCC32
AC34
VCC33
AC33
VCC34
AC32
VCC35
AC31
VCC36
AC30
VCC37
AC29
VCC38
AC28
VCC39
AC27
VCC40
AC26
VCC41
AA35
VCC42
AA34
VCC43
AA33
VCC44
AA32
VCC45
AA31
VCC46
AA30
VCC47
AA29
VCC48
AA28
VCC49
AA27
VCC50
AA26
VCC51
Y35
VCC52
Y34
VCC53
Y33
VCC54
Y32
VCC55
Y31
VCC56
Y30
VCC57
Y29
VCC58
Y28
VCC59
Y27
VCC60
Y26
VCC61
V35
VCC62
V34
VCC63
V33
VCC64
V32
VCC65
V31
VCC66
V30
VCC67
V29
VCC68
V28
VCC69
V27
VCC70
V26
VCC71
U35
VCC72
U34
VCC73
U33
VCC74
U32
VCC75
U31
VCC76
U30
VCC77
U29
VCC78
U28
VCC79
U27
VCC80
U26
VCC81
R35
VCC82
R34
VCC83
R33
VCC84
R32
VCC85
R31
VCC86
R30
VCC87
R29
VCC88
R28
VCC89
R27
VCC90
R26
VCC91
P35
VCC92
P34
VCC93
P33
VCC94
P32
VCC95
P31
VCC96
P30
VCC97
P29
VCC98
P28
VCC99
P27
VCC100
P26
VCCIO1 AH13
VCCIO12 J11
VCCIO18 G12
VCCIO19 F14
VCCIO20 F13
VCCIO21 F12
VCCIO22 F11
VCCIO23 E14
VCCIO24 E12
VCCIO2 AH10
VCCIO3 AG10
VCCIO4 AC10
VCCIO5 Y10
VCCIO6 U10
VCCIO7 P10
VCCIO8 L10
VCCIO9 J14
VCCIO10 J13
VCCIO11 J12
VCCIO13 H14
VCCIO14 H12
VCCIO15 H11
VCCIO16 G14
VCCIO17 G13
VCCIO25 E11
VCCIO32 C12
VCCIO33 C11
VCCIO34 B14
VCCIO35 B12
VCCIO36 A14
VCCIO37 A13
VCCIO38 A12
VCCIO39 A11
VCCIO26 D14
VCCIO27 D13
VCCIO28 D12
VCCIO29 D11
VCCIO30 C14
VCCIO31 C13
VCCIO_SENSE B10
VCCIO40 J23
RC92 0_0402_5%RC92 0_0402_5%
1 2
RC94 0_0402_5%RC94 0_0402_5%
1 2
RC98
10_0402_1%
RC98
10_0402_1%
12
RC89
75_0402_5%
RC89
75_0402_5%
12
RC90 43_0402_1%RC90 43_0402_1%
1 2
RC96
10_0402_1%
RC96
10_0402_1%
12
CC50
0.1U_0402_10V7K
@
CC50
0.1U_0402_10V7K
@
1 2 CC49
0.1U_0402_10V7K
@
CC49
0.1U_0402_10V7K
@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VCCSA_SENSE
SUSP
RUN_ON_CPU1.5VS3
SUSP
VSS_AXG_SENSE_R
VCC_AXG_SENSE_R
+V_SM_VREF
H_VCCSA_VID0
H_VCCSA_VID1
+1.8VS_VCCPLL
SUSP <5,36,47>
VCC_AXG_SENSE <55>
VSS_AXG_SENSE <55>
H_VCCSA_VID0 <54>
+VCCSA_SENSE <54>
H_VCCSA_VID1 <54>
+1.5V_CPU
+VCCSA
+1.5VS+1.5V_CPU
+VSB
+GFX_CORE
+GFX_CORE
+1.5V_CPU
+1.5V_CPU +1.5V
+1.5V
+VREF_DQB_M3
+VREF_DQA_M3
+1.8VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
961Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
961Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
961Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
+V_SM_VREF should
have 20 mil trace width
Close to CPU
Bottom Socket Cavity
Bottom Socket Edge
+VCCSAVCCSA_VID0 VCCSA_VID1
0
0
0
0
1
1
11
0.90 V
0.80 V
0.725 V
0.675 V
For Sandy Bridge
+VCCSA Decoupling:
1X 330U (6m ohm), 3X 10U
+1.5V_CPU Decoupling:
1X 330U (6m ohm), 6X 10U
ESR 6mohm
Co-lay for Cost Down Plan
Vgs=10V,Id=14.5A,Rds=6mohm
5A
33A
6A
1.2A
Please kindly check whether
there is pull-down resister
in PWR-side or HW-side
VCCPLL Decoupling:
1X 330U (6m ohm), 1X 10U, 2x1U
CC55
10U_0805_10V6K
CC55
10U_0805_10V6K
1
2
CC65
0.1U_0402_10V7K
CC65
0.1U_0402_10V7K
1
2
CC54
10U_0805_10V6K
CC54
10U_0805_10V6K
1
2
CC72
1U_0402_6.3V6K
CC72
1U_0402_6.3V6K
1 2
CC59
10U_0805_10V6K
CC59
10U_0805_10V6K
1
2
CC61
1U_0402_6.3V6K
CC61
1U_0402_6.3V6K
1
2
RC111 0_0402_5%
@
RC111 0_0402_5%
@
1 2
RC204
220K_0402_5%
RC204
220K_0402_5%
1 2
RC196 0_0402_5%OPT@RC196 0_0402_5%OPT@
1 2
CC51
10U_0805_10V6K
CC51
10U_0805_10V6K
1
2
RC197 0_0402_5%OPT@RC197 0_0402_5%OPT@
1 2
CC41
10U_0805_10V6K
CC41
10U_0805_10V6K
1
2
RC119
0_0805_5%
RC119
0_0805_5%12
CC52
10U_0805_10V6K
CC52
10U_0805_10V6K
1
2
+
CC58
330U_B2_2.5VM_R15M
@
+
CC58
330U_B2_2.5VM_R15M
@1
2
CC69
0.1U_0402_25V6
CC69
0.1U_0402_25V6
1
2
RC203
470_0805_5%
RC203
470_0805_5%
1 2
CC43
10U_0805_10V6K
CC43
10U_0805_10V6K
1
2
QC5A
2N7002DW-T/R7_SOT363-6
QC5A
2N7002DW-T/R7_SOT363-6
61
2
CC47 0.1U_0402_10V7KCC47 0.1U_0402_10V7K
1 2
+
CC53
330U_D2_2VM_R6M
@
+
CC53
330U_D2_2VM_R6M
@
1
2
RC205
820K_0402_5%
RC205
820K_0402_5%
12
RC105
10_0402_1%
OPT@
RC105
10_0402_1%
OPT@
12
CC73
4.7U_0805_10V4Z
CC73
4.7U_0805_10V4Z
1 2
CC60
1U_0402_6.3V6K
CC60
1U_0402_6.3V6K
1
2
CC71
4.7U_0805_10V4Z
CC71
4.7U_0805_10V4Z
1 2
CC68
10U_0805_10V4K
CC68
10U_0805_10V4K
1
2
CC46 0.1U_0402_10V7KCC46 0.1U_0402_10V7K
1 2
RC200 0_0402_5%RC200 0_0402_5%
1 2
PJ1
JUMP_43X118
@PJ1
JUMP_43X118
@
11
2
2
POWER
GRAPHICS
DDR3 -1.5V RAILS SENSE
LINES
1.8V RAIL
SA RAIL
VREFMISC
JCPUG
TYCO_2013620-2_IVY BRIDGE
@
POWER
GRAPHICS
DDR3 -1.5V RAILS SENSE
LINES
1.8V RAIL
SA RAIL
VREFMISC
JCPUG
TYCO_2013620-2_IVY BRIDGE
@
SM_VREF AL1
VSSAXG_SENSE AK34
VAXG_SENSE AK35
VAXG1
AT24
VAXG2
AT23
VAXG3
AT21
VAXG4
AT20
VAXG5
AT18
VAXG6
AT17
VAXG7
AR24
VAXG8
AR23
VAXG9
AR21
VAXG10
AR20
VAXG11
AR18
VAXG12
AR17
VAXG13
AP24
VAXG14
AP23
VAXG15
AP21
VAXG16
AP20
VAXG17
AP18
VAXG18
AP17
VAXG19
AN24
VAXG20
AN23
VAXG21
AN21
VAXG22
AN20
VAXG23
AN18
VAXG24
AN17
VAXG25
AM24
VAXG26
AM23
VAXG27
AM21
VAXG28
AM20
VAXG29
AM18
VAXG30
AM17
VAXG31
AL24
VAXG32
AL23
VAXG33
AL21
VAXG34
AL20
VAXG35
AL18
VAXG36
AL17
VAXG37
AK24
VAXG38
AK23
VAXG39
AK21
VAXG40
AK20
VAXG41
AK18
VAXG42
AK17
VAXG43
AJ24
VAXG44
AJ23
VAXG45
AJ21
VAXG46
AJ20
VAXG47
AJ18
VAXG48
AJ17
VAXG49
AH24
VAXG50
AH23
VAXG51
AH21
VAXG52
AH20
VAXG53
AH18
VAXG54
AH17
VDDQ11 U4
VDDQ12 U1
VDDQ13 P7
VDDQ14 P4
VDDQ15 P1
VDDQ1 AF7
VDDQ2 AF4
VDDQ3 AF1
VDDQ4 AC7
VDDQ5 AC4
VDDQ6 AC1
VDDQ7 Y7
VDDQ8 Y4
VDDQ9 Y1
VDDQ10 U7
VCCPLL1
B6
VCCPLL2
A6
VCCSA1 M27
VCCSA2 M26
VCCSA3 L26
VCCSA4 J26
VCCSA5 J25
VCCSA6 J24
VCCSA7 H26
VCCSA8 H25
VCCSA_SENSE H23
VCCSA_VID[1] C24
VCCPLL3
A2 VCCSA_VID[0] C22
SA_DIMM_VREFDQ B4
SB_DIMM_VREFDQ D1
VCCIO_SEL A19
+
CC44
330U_D2_2VM_R6M
@
+
CC44
330U_D2_2VM_R6M
@
1
2
RC106
10_0402_1%
OPT@
RC106
10_0402_1%
OPT@
1 2
RC198
0_0402_5%
DIS@
RC198
0_0402_5%
DIS@
1 2
CC57
10U_0805_10V6K
CC57
10U_0805_10V6K
1
2
CC40
10U_0805_10V6K
@
CC40
10U_0805_10V6K
@
1
2
QC5B
2N7002DW-T/R7_SOT363-6
QC5B
2N7002DW-T/R7_SOT363-6
3
5
4
CC48 0.1U_0402_10V7KCC48 0.1U_0402_10V7K
1 2
CC56
10U_0805_10V6K
CC56
10U_0805_10V6K
1
2
CC42
10U_0805_10V6K
CC42
10U_0805_10V6K
1
2
RC120
1K_0402_0.5%
RC120
1K_0402_0.5%
1 2
CC45 0.1U_0402_10V7KCC45 0.1U_0402_10V7K
1 2
QC4
FDS6676AS_SO8
QC4
FDS6676AS_SO8
S
1
S
2
S
3
G
4
D8
D7
D6
D5
RC109
1K_0402_0.5%
RC109
1K_0402_0.5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CFG4
CFG6
CFG5
CFG2
CFG7
CFG13
CFG11
CFG10
CFG1
CFG12
CFG17
CFG16
CFG15
CFG14
CFG5
CFG4
CFG3
CFG0
CFG2
CFG9
CFG8
CFG7
CFG6
CFG0<5>
CFG14<5> CFG13<5> CFG12<5>
CFG15<5>
CLK_RES_ITP# <26>
CLK_RES_ITP <26>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
10 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
10 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
10 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
10: x8, x8 - Device 1 function 1 enabled ; function 2
disabled
PCIE Port Bifurcation Straps
CFG[6:5]
11: (Default) x16 - Device 1 functions 1 and 2 disabled
PEG DEFER TRAINING
CFG7
0: PEG Wait for BIOS for training
1: (Default) PEG Train immediately following xxRESETB
de assertion
CFG4
Embedded Display Port Presence Strap
0 : Enabled; An external Display Port device is
connected to the Embedded Display Port
1 : Disabled; No Physical Display Port
attached to Embedded Display Port
CFG Straps for Processor
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
01: Reserved - (Device 1 function 1 disabled ; function
2 enabled)
PEG Static Lane Reversal - CFG2 is for the 16x
1: Normal Operation; Lane # definition matches
socket pin map definition
0:Lane Reversed
CFG2 *
*
*
(CFG[17:0] internal pull high 5~15K to VCCIO)
T6 PADT6 PAD
T3PAD T3PAD
T12 PADT12 PAD
VSS
JCPUI
TYCO_2013620-2_IVY BRIDGE
@
VSS
JCPUI
TYCO_2013620-2_IVY BRIDGE
@
VSS161
T35
VSS162
T34
VSS163
T33
VSS164
T32
VSS165
T31
VSS166
T30
VSS167
T29
VSS168
T28
VSS169
T27
VSS170
T26
VSS171
P9
VSS172
P8
VSS173
P6
VSS174
P5
VSS175
P3
VSS176
P2
VSS177
N35
VSS178
N34
VSS179
N33
VSS180
N32
VSS181
N31
VSS182
N30
VSS183
N29
VSS184
N28
VSS185
N27
VSS186
N26
VSS187
M34
VSS188
L33
VSS189
L30
VSS190
L27
VSS191
L9
VSS192
L8
VSS193
L6
VSS194
L5
VSS195
L4
VSS196
L3
VSS197
L2
VSS198
L1
VSS199
K35
VSS200
K32
VSS201
K29
VSS202
K26
VSS203
J34
VSS204
J31
VSS205
H33
VSS206
H30
VSS207
H27
VSS208
H24
VSS209
H21
VSS210
H18
VSS211
H15
VSS212
H13
VSS213
H10
VSS214
H9
VSS215
H8
VSS216
H7
VSS217
H6
VSS218
H5
VSS219
H4
VSS220
H3
VSS221
H2
VSS222
H1
VSS223
G35
VSS224
G32
VSS225
G29
VSS226
G26
VSS227
G23
VSS228
G20
VSS229
G17
VSS230
G11
VSS231
F34
VSS232
F31
VSS233
F29
VSS234 F22
VSS235 F19
VSS236 E30
VSS237 E27
VSS238 E24
VSS239 E21
VSS240 E18
VSS241 E15
VSS242 E13
VSS243 E10
VSS244 E9
VSS245 E8
VSS246 E7
VSS247 E6
VSS248 E5
VSS249 E4
VSS250 E3
VSS251 E2
VSS252 E1
VSS253 D35
VSS254 D32
VSS255 D29
VSS256 D26
VSS257 D20
VSS258 D17
VSS259 C34
VSS260 C31
VSS261 C28
VSS262 C27
VSS263 C25
VSS264 C23
VSS265 C10
VSS266 C1
VSS267 B22
VSS268 B19
VSS269 B17
VSS270 B15
VSS271 B13
VSS272 B11
VSS273 B9
VSS274 B8
VSS275 B7
VSS276 B5
VSS277 B3
VSS278 B2
VSS279 A35
VSS280 A32
VSS281 A29
VSS282 A26
VSS283 A23
VSS284 A20
VSS285 A3
RC83
1K_0402_1%
@
RC83
1K_0402_1%
@
12
RC84
1K_0402_1%
@
RC84
1K_0402_1%
@
12
T11 PADT11 PAD
T25 PADT25 PAD
T16 PADT16 PAD
T64PAD T64PAD
T14 PADT14 PAD
T4 PADT4 PAD
T8 PADT8 PAD
RC85
1K_0402_1%
@
RC85
1K_0402_1%
@
12
RESERVED
CFG
JCPUE
TYCO_2013620-2_IVY BRIDGE
@
RESERVED
CFG
JCPUE
TYCO_2013620-2_IVY BRIDGE
@
CFG[0]
AK28
CFG[1]
AK29
CFG[2]
AL26
CFG[3]
AL27
CFG[4]
AK26
CFG[5]
AL29
CFG[6]
AL30
CFG[7]
AM31
CFG[8]
AM32
CFG[9]
AM30
CFG[10]
AM28
CFG[11]
AM26
CFG[12]
AN28
CFG[13]
AN31
CFG[14]
AN26
CFG[15]
AM27
CFG[16]
AK31
CFG[17]
AN29
RSVD34 AM33
RSVD35 AJ27
RSVD38 J16
RSVD_NCTF2 AT34
RSVD39 H16
RSVD40 G16
RSVD_NCTF1 AR35
RSVD_NCTF3 AT33
RSVD_NCTF5 AR34
RSVD_NCTF11 AT2
RSVD_NCTF12 AT1
RSVD_NCTF13 AR1
RSVD_NCTF6 B34
RSVD_NCTF7 A33
RSVD_NCTF8 A34
RSVD_NCTF9 B35
RSVD_NCTF10 C35
RSVD51 AJ32
RSVD52 AK32
RSVD27
J15
RSVD16
C30 RSVD15
D23
RSVD17
A31
RSVD18
B30
RSVD20
D30 RSVD19
B29
RSVD22
A30 RSVD21
B31
RSVD23
C29
RSVD37 T8
RSVD8
F25
RSVD9
F24
RSVD11
D24
RSVD12
G25
RSVD13
G24
RSVD14
E23
RSVD32 W8
RSVD33 AT26
RSVD_NCTF4 AP35
RSVD10
F23
RSVD5
AJ26
VAXG_VAL_SENSE
AJ31
VSSAXG_VAL_SENSE
AH31
VCC_VAL_SENSE
AJ33
VSS_VAL_SENSE
AH33
KEY B1
VCC_DIE_SENSE AH27
BCLK_ITP AN35
BCLK_ITP# AM35
VSS_DIE_SENSE AH26
RSVD31 AK2
RSVD30 AE7
RSVD29 AG7
RSVD28 L7
RSVD24
J20
RSVD25
B18
T24 PADT24 PAD
T5 PADT5 PAD
VSS
JCPUH
TYCO_2013620-2_IVY BRIDGE
@
VSS
JCPUH
TYCO_2013620-2_IVY BRIDGE
@
VSS1
AT35
VSS2
AT32
VSS3
AT29
VSS4
AT27
VSS5
AT25
VSS6
AT22
VSS7
AT19
VSS8
AT16
VSS9
AT13
VSS10
AT10
VSS11
AT7
VSS12
AT4
VSS13
AT3
VSS14
AR25
VSS15
AR22
VSS16
AR19
VSS17
AR16
VSS18
AR13
VSS19
AR10
VSS20
AR7
VSS21
AR4
VSS22
AR2
VSS23
AP34
VSS24
AP31
VSS25
AP28
VSS26
AP25
VSS27
AP22
VSS28
AP19
VSS29
AP16
VSS30
AP13
VSS31
AP10
VSS32
AP7
VSS33
AP4
VSS34
AP1
VSS35
AN30
VSS36
AN27
VSS37
AN25
VSS38
AN22
VSS39
AN19
VSS40
AN16
VSS41
AN13
VSS42
AN10
VSS43
AN7
VSS44
AN4
VSS45
AM29
VSS46
AM25
VSS47
AM22
VSS48
AM19
VSS49
AM16
VSS50
AM13
VSS51
AM10
VSS52
AM7
VSS53
AM4
VSS54
AM3
VSS55
AM2
VSS56
AM1
VSS57
AL34
VSS58
AL31
VSS59
AL28
VSS60
AL25
VSS61
AL22
VSS62
AL19
VSS63
AL16
VSS64
AL13
VSS65
AL10
VSS66
AL7
VSS67
AL4
VSS68
AL2
VSS69
AK33
VSS70
AK30
VSS71
AK27
VSS72
AK25
VSS73
AK22
VSS74
AK19
VSS75
AK16
VSS76
AK13
VSS77
AK10
VSS78
AK7
VSS79
AK4
VSS80
AJ25
VSS81 AJ22
VSS82 AJ19
VSS83 AJ16
VSS84 AJ13
VSS85 AJ10
VSS86 AJ7
VSS87 AJ4
VSS88 AJ3
VSS89 AJ2
VSS90 AJ1
VSS91 AH35
VSS92 AH34
VSS93 AH32
VSS94 AH30
VSS95 AH29
VSS96 AH28
VSS98 AH25
VSS99 AH22
VSS100 AH19
VSS101 AH16
VSS102 AH7
VSS103 AH4
VSS104 AG9
VSS105 AG8
VSS106 AG4
VSS107 AF6
VSS108 AF5
VSS109 AF3
VSS110 AF2
VSS111 AE35
VSS112 AE34
VSS113 AE33
VSS114 AE32
VSS115 AE31
VSS116 AE30
VSS117 AE29
VSS118 AE28
VSS119 AE27
VSS120 AE26
VSS121 AE9
VSS122 AD7
VSS123 AC9
VSS124 AC8
VSS125 AC6
VSS126 AC5
VSS127 AC3
VSS128 AC2
VSS129 AB35
VSS130 AB34
VSS131 AB33
VSS132 AB32
VSS133 AB31
VSS134 AB30
VSS135 AB29
VSS136 AB28
VSS137 AB27
VSS138 AB26
VSS139 Y9
VSS140 Y8
VSS141 Y6
VSS142 Y5
VSS143 Y3
VSS144 Y2
VSS145 W35
VSS146 W34
VSS147 W33
VSS148 W32
VSS149 W31
VSS150 W30
VSS151 W29
VSS152 W28
VSS153 W27
VSS154 W26
VSS155 U9
VSS156 U8
VSS157 U6
VSS158 U5
VSS159 U3
VSS160 U2
RC79
1K_0402_1%
RC79
1K_0402_1%
12
T20 PADT20 PAD
T9 PADT9 PAD
RC82
1K_0402_1%
IEDP@
RC82
1K_0402_1%
IEDP@
12
T19 PADT19 PAD
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VREF_CAA_DIMMA
DDR_A_D3
DDR_A_D18
DDR_A_D27
DDR_A_MA3
DDRA_CLK0#
DDR_A_D41
DDR_A_D30
DDR_A_MA7
DDR_A_RAS#
DDR_A_D1 DDR_A_D5
DDR_A_DQS0
DDR_A_D12
DDR_A_D24
DDR_A_DQS3
DDR_A_D62
DDR_A_BS2
DDR_A_D43
DDR_A_DQS6
DDR_A_D46
DDR_A_BS0
DDR_A_MA13
DDR_A_D40
DDR_A_D51
DDR_A_D59
DDR_A_D22
DDR_A_D28
DDR_A_BS1
DDR_A_D37
DDR_A_D45
DDR_A_D53
DDR_A_D26
DDR_A_MA5
DDR_A_CAS#
DDR_A_D35
DDR_A_MA15
DDR_A_MA6
DDR_A_MA2
DDR_A_D47
DDR_A_D52
DDRA_CLK1#
DDR_A_DQS#5
DDR_A_D25
DDR_A_D49
DDR_A_D56
DDR_A_D57
DDR_A_DQS1
DDR_A_D20
DDR_A_MA8
DDR_A_D34
DDR_A_MA4
DDRA_ODT0
DDR_A_D60
DDR_A_D32
DDR_A_DQS4
DDR_A_D29
DDR_A_MA14
DDRA_CLK1
DDRA_SCS0#
DDR_A_D38
DDR_A_D61
PM_SMBDATA
DDR_A_D0
DDR_A_D19
DDR_A_MA10
DDR_A_D58
DDR_A_D21
DDR_A_D31
DDR_A_MA1
DDR_A_WE#
DDR_A_D23
DDR_A_D36
DDR_A_D54
PM_SMBCLK
DDR_A_D8 DDR_A_D13
DDR_A_D48
DDR_A_D55
DDR_A_DQS#1
DDR_A_D11
DDR_A_D16
DDRA_SCS1#
DDR_A_D50
DDR_A_D14
DDR_A_D17
DDR_A_DQS2
DDR_A_D33
DDR_A_DQS#4
DDR_A_DQS#3
DDR_A_MA0
DDRA_ODT1
DDR_A_D39
DDR_A_DQS7
DDR_A_D7
DDR_A_D15
DDR_A_DQS#6
DDR_A_D44
DDR_A_DQS5
DDR_A_D63
DDR_A_D9
DDR_A_D4
DDRA_CKE0
DDR_A_MA12
DDR_A_D42
DDR_A_D2
DDR_A_D10
DDR_A_DQS#0
DDR_A_D6
DDR_A_DQS#2
DDR_A_MA9
DDRA_CKE1
DDR_A_MA11
DDR_A_DQS#7
DDRA_CLK0
SM_DRAMRST#
+VREF_CAA
DDRA_CKE1 <7>DDRA_CKE0<7>
DDR_A_RAS# <7>
DDRA_ODT1 <7>
DDR_A_BS0<7>
DDRA_CLK0#<7>
DDR_A_WE#<7>
DDR_A_BS2<7>
PM_SMBCLK <12,26,36,46>
DDRA_ODT0 <7>
DDR_A_BS1 <7>
DDRA_SCS0# <7>
DDR_A_CAS#<7>
DDRA_CLK1 <7>
DDRA_SCS1#<7>
PM_SMBDATA <12,26,36,46>
SM_DRAMRST# <7,12>
DDRA_CLK1# <7>
DDRA_CLK0<7>
DDR_A_DQS#[0..7] <7>
DDR_A_DQS[0..7] <7>
DDR_A_D[0..63] <7>
DDR_A_MA[0..15] <7>
DRAMRST_CNTRL_PCH <7,26>
+1.5V
+3VS
+0.75VS
+1.5V
+VREF_DQA
+0.75VS
+1.5V +1.5V +0.75VS
+1.5V
+1.5V
+VREF_DQA_M3
+VREF_DQB_M3
+VREF_DQA
+VREF_DQB
+VREF_DQA
+1.5V
+VREF_DQB
+1.5V
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
11 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
11 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
11 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Reverse Type
DDR3 SO-DIMM A
Close to JDDRL.1
close to JDDRL.126
Layout Note:
Place near JDDRL Layout Note:
Place near JDDRL1.203 and 204
Layout Note: Place these 4 Caps near
Command and Control signals of DIMMA
please place these caps near the
reference power plane of CMD/AD
Intel DDR Vref M3
RC116
0_0402_5%
@
RC116
0_0402_5%
@
12
RC115
0_0402_5%
@
RC115
0_0402_5%
@
12
CD8 10U_0603_6.3V6MCD8 10U_0603_6.3V6M
1 2
CD50 33P_0402_50V8KCD50 33P_0402_50V8K
1 2
CD15
2.2U_0603_6.3V4Z
CD15
2.2U_0603_6.3V4Z
1
2
G
D
S
QC7
BSS138_NL_SOT23-3
@
G
D
S
QC7
BSS138_NL_SOT23-3
@
2
13
CD11 10U_0603_6.3V6MCD11 10U_0603_6.3V6M
1 2
CD26
0.1U_0402_10V7K
CD26
0.1U_0402_10V7K
1
2
CD9 10U_0603_6.3V6MCD9 10U_0603_6.3V6M
1 2
CD19 0.1U_0402_10V7KCD19 0.1U_0402_10V7K
1 2
G
D
S
QC8
BSS138_NL_SOT23-3
@
G
D
S
QC8
BSS138_NL_SOT23-3
@
2
13
+
CD7 390U_2.5V_M_R10
+
CD7 390U_2.5V_M_R10
1 2
CD51 33P_0402_50V8KCD51 33P_0402_50V8K
1 2
JDDR3L
LCN_DAN06-K4406-0103
@
JDDR3L
LCN_DAN06-K4406-0103
@
VREF_DQ
1
VSS
3
DQ0
5
DQ1
7
VSS
9
DM0
11
VSS
13
DQ2
15
DQ3
17
VSS
19
DQ8
21
DQ9
23
VSS
25
DQS1#
27
DQS1
29
VSS
31
DQ10
33
DQ11
35
VSS
37
DQ16
39
VSS 2
DQ4 4
DQ5 6
VSS 8
DQS0# 10
DQS0 12
VSS 14
DQ6 16
DQ7 18
VSS 20
DQ12 22
DQ13 24
VSS 26
DM1 28
RESET# 30
VSS 32
DQ14 34
DQ15 36
VSS 38
DQ20 40
DQ17
41
VSS
43
DQS2#
45
DQS2
47
VSS
49
DQ18
51
DQ19
53
VSS
55
DQ24
57
DQ25
59
VSS
61
DM3
63
VSS
65
DQ26
67
DQ27
69
VSS
71
CKE0
73
VDD
75
NC
77
BA2
79
VDD
81
A12/BC#
83
A9
85
VDD
87
A8
89
A5
91
VDD
93
A3
95
A1
97
VDD
99
CK0
101
CK0#
103
VDD
105
A10/AP
107
BA0
109
VDD
111
WE#
113
CAS#
115
VDD
117
A13
119
S1#
121
VDD
123
TEST
125
VSS
127
DQ32
129
DQ33
131
VSS
133
DQS4#
135
DQS4
137
VSS
139
DQ34
141
DQ35
143
VSS
145
DQ40
147
DQ41
149
VSS
151
DM5
153
VSS
155
DQ42
157
DQ43
159
VSS
161
DQ48
163
DQ49
165
VSS
167
DQS6#
169
DQS6
171
VSS
173
DQ50
175
DQ51
177
VSS
179
DQ56
181
DQ57
183
VSS
185
DM7
187
VSS
189
DQ58
191
DQ59
193
VSS
195
SA0
197
VDDSPD
199
DQ21 42
VSS 44
DM2 46
VSS 48
DQ22 50
DQ23 52
VSS 54
DQ28 56
DQ29 58
VSS 60
DQS3# 62
DQS3 64
VSS 66
DQ30 68
DQ31 70
VSS 72
CKE1 74
VDD 76
A15 78
A14 80
VDD 82
A11 84
A7 86
VDD 88
A6 90
A4 92
VDD 94
A2 96
A0 98
VDD 100
CK1 102
CK1# 104
VDD 106
BA1 108
RAS# 110
VDD 112
S0# 114
ODT0 116
VDD 118
ODT1 120
NC 122
VDD 124
VREF_CA 126
VSS 128
DQ36 130
DQ37 132
VSS 134
DM4 136
VSS 138
DQ38 140
DQ39 142
VSS 144
DQ44 146
DQ45 148
VSS 150
DQS5# 152
DQS5 154
VSS 156
DQ46 158
DQ47 160
VSS 162
DQ52 164
DQ53 166
VSS 168
DM6 170
VSS 172
DQ54 174
DQ55 176
VSS 178
DQ60 180
DQ61 182
VSS 184
DQS7# 186
DQS7 188
VSS 190
DQ62 192
DQ63 194
VSS 196
EVENT# 198
SDA 200
SA1
201
VTT
203
GND1
205
SCL 202
VTT 204
GND2 206
BOSS1
207 BOSS2 208
CD23 1U_0402_6.3V6KCD23 1U_0402_6.3V6K
12
RD7
1K_0402_1%
RD7
1K_0402_1%
12
CD52 33P_0402_50V8KCD52 33P_0402_50V8K
1 2
CD25
2.2U_0603_6.3V4Z
CD25
2.2U_0603_6.3V4Z
1
2
CD22 1U_0402_6.3V6KCD22 1U_0402_6.3V6K
12
RD1
1K_0402_1%
RD1
1K_0402_1%
12
RC118
1K_0402_1%
@
RC118
1K_0402_1%
@
1 2
CD20 0.1U_0402_10V7KCD20 0.1U_0402_10V7K
1 2
CD10 10U_0603_6.3V6MCD10 10U_0603_6.3V6M
1 2
RD2
1K_0402_1%
RD2
1K_0402_1%
12
CD13 10U_0603_6.3V6MCD13 10U_0603_6.3V6M
1 2
CD54 33P_0402_50V8KCD54 33P_0402_50V8K
1 2
CD18 0.1U_0402_10V7KCD18 0.1U_0402_10V7K
1 2
RD9
10K_0402_5%
RD9
10K_0402_5%
12
CD55 33P_0402_50V8KCD55 33P_0402_50V8K
1 2
CD56 10U_0603_6.3V6MCD56 10U_0603_6.3V6M
1 2
RD6
1K_0402_1%
RD6
1K_0402_1%
12
RD11
1K_0402_1%
RD11
1K_0402_1%
12
CD24 1U_0402_6.3V6KCD24 1U_0402_6.3V6K
12
CD16
0.1U_0402_10V7K
CD16
0.1U_0402_10V7K
1
2
CD17 0.1U_0402_10V7KCD17 0.1U_0402_10V7K
1 2
CD2
2.2U_0603_6.3V4Z
CD2
2.2U_0603_6.3V4Z
1
2
CD1
0.1U_0402_10V7K
CD1
0.1U_0402_10V7K
1
2
RC117
1K_0402_1%
@
RC117
1K_0402_1%
@
1 2
CD12 10U_0603_6.3V6MCD12 10U_0603_6.3V6M
1 2
CD53 33P_0402_50V8KCD53 33P_0402_50V8K
1 2
RD8
10K_0402_5%
RD8
10K_0402_5%
1 2
RD10
1K_0402_1%
RD10
1K_0402_1%
12
CD21 1U_0402_6.3V6KCD21 1U_0402_6.3V6K
12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
DDR_B_D25
DDR_B_D26
DDR_B_D8
DDR_B_MA12
DDR_B_D43
DDR_B_DQS#6
DDR_B_BS1
PM_SMBCLK
DDR_B_D1 DDR_B_DQS#0
DDR_B_D15
DDR_B_D48
DDR_B_D30
DDR_B_D38
DDR_B_D52
DDR_B_D53
DDR_B_D20
DDR_B_D17
DDR_B_BS2
DDR_B_D23
DDR_B_MA6
DDRB_ODT0
DDR_B_D47
DDR_B_D9
DDR_B_D18
DDR_B_MA10
DDR_B_DQS#3
DDR_B_MA15
DDR_B_D46
DDRB_ODT1
DDR_B_D16
DDR_B_DQS#4
DDR_B_D35
DDR_B_D56
DDR_B_D29
DDR_B_MA11
DDR_B_MA4
DDR_B_D0
DDR_B_D13
DDR_B_D41
DDR_B_D21
DDRB_CKE1
DDR_B_MA7
DDR_B_D63
DDR_B_DQS#1 SM_DRAMRST#
DDR_B_D19
DDR_B_D24
DDR_B_MA8
DDR_B_MA3
DDR_B_CAS#
DDR_B_D57
DDR_B_DQS3
DDR_B_MA14
DDRB_SCS0#
DDR_B_DQS#7
DDR_B_BS0
DDR_B_D44
DDR_B_D45
DDR_B_D2
DDRB_CKE0
DDR_B_MA9
DDR_B_MA13
DDR_B_D49
DDR_B_D61
DDR_B_D11
DDR_B_DQS0
DDR_B_MA1
DDRB_CLK0#
DDRB_SCS1#
DDR_B_D31
DDR_B_MA2
DDR_B_DQS5
DDR_B_DQS7
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_MA5
DDR_B_D34
DDR_B_D58
DDR_B_D28
DDR_B_MA0
DDRB_CLK1#
DDR_B_D62
DDR_B_D42
DDR_B_DQS6
DDR_B_D39
DDR_B_DQS#5
DDR_B_D60
DDR_B_DQS1
DDR_B_D10
DDR_B_D12
DDR_B_D40
DDR_B_D22
DDR_B_D7
DDR_B_DQS#2
DDR_B_DQS2
DDRB_CLK0
DDR_B_DQS4
DDR_B_RAS#
PM_SMBDATA
DDR_B_D14
DDR_B_D27
DDR_B_D59
DDRB_CLK1
DDR_B_WE#
+VREF_CAB +VREF_CAB_DIMMB
DDR_B_D50 DDR_B_D54
DDR_B_D55
DDR_B_D51
DDR_B_D36
DDR_B_D37
DDR_B_D32
DDR_B_D33
DDRB_CLK1# <7>
DDR_B_CAS#<7>
PM_SMBDATA <11,26,36,46>
DDR_B_RAS# <7>DDR_B_BS0<7>
DDRB_ODT1 <7>
DDRB_CLK0#<7>
DDRB_CKE1 <7>
DDR_B_BS1 <7>
DDR_B_BS2<7>
DDRB_CLK0<7>
DDRB_SCS1#<7>
DDRB_SCS0# <7>
DDRB_CLK1 <7>
DDRB_ODT0 <7>
DDRB_CKE0<7>
PM_SMBCLK <11,26,36,46>
SM_DRAMRST# <7,11>
DDR_B_WE#<7>
DDR_B_DQS#[0..7] <7>
DDR_B_DQS[0..7] <7>
DDR_B_D[0..63] <7>
DDR_B_MA[0..15] <7>
+0.75VS
+1.5V
+3VS
+1.5V
+VREF_DQB
+0.75VS
+1.5V +0.75VS+1.5V
+1.5V
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
12 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
12 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
12 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Reverse Type
DDR3 SO-DIMM B
Close to JDDRH.1
Close to JDDRH.126
Layout Note:
Place near JDDRH Layout Note:
Place near JDDRH.203 and 204
Layout Note: Place these 4 Caps near
Command and Control signals of DIMMB
CD43 1U_0402_6.3V6KCD43 1U_0402_6.3V6K
12
CD28
2.2U_0603_6.3V4Z
CD28
2.2U_0603_6.3V4Z
1
2
RD13
1K_0402_1%
RD13
1K_0402_1%
12
CD30 0.1U_0402_10V7KCD30 0.1U_0402_10V7K
1 2
JDDR3H
FOX_AS0A626-UASN-7F_204P
@
JDDR3H
FOX_AS0A626-UASN-7F_204P
@
VREF_DQ
1
VSS
3
DQ0
5
DQ1
7
VSS
9
DM0
11
VSS
13
DQ2
15
DQ3
17
VSS
19
DQ8
21
DQ9
23
VSS
25
DQS1#
27
DQS1
29
VSS
31
DQ10
33
DQ11
35
VSS
37
DQ16
39
VSS 2
DQ4 4
DQ5 6
VSS 8
DQS0# 10
DQS0 12
VSS 14
DQ6 16
DQ7 18
VSS 20
DQ12 22
DQ13 24
VSS 26
DM1 28
RESET# 30
VSS 32
DQ14 34
DQ15 36
VSS 38
DQ20 40
DQ17
41
VSS
43
DQS2#
45
DQS2
47
VSS
49
DQ18
51
DQ19
53
VSS
55
DQ24
57
DQ25
59
VSS
61
DM3
63
VSS
65
DQ26
67
DQ27
69
VSS
71
CKE0
73
VDD
75
NC
77
BA2
79
VDD
81
A12/BC#
83
A9
85
VDD
87
A8
89
A5
91
VDD
93
A3
95
A1
97
VDD
99
CK0
101
CK0#
103
VDD
105
A10/AP
107
BA0
109
VDD
111
WE#
113
CAS#
115
VDD
117
A13
119
S1#
121
VDD
123
TEST
125
VSS
127
DQ32
129
DQ33
131
VSS
133
DQS4#
135
DQS4
137
VSS
139
DQ34
141
DQ35
143
VSS
145
DQ40
147
DQ41
149
VSS
151
DM5
153
VSS
155
DQ42
157
DQ43
159
VSS
161
DQ48
163
DQ49
165
VSS
167
DQS6#
169
DQS6
171
VSS
173
DQ50
175
DQ51
177
VSS
179
DQ56
181
DQ57
183
VSS
185
DM7
187
VSS
189
DQ58
191
DQ59
193
VSS
195
SA0
197
VDDSPD
199
DQ21 42
VSS 44
DM2 46
VSS 48
DQ22 50
DQ23 52
VSS 54
DQ28 56
DQ29 58
VSS 60
DQS3# 62
DQS3 64
VSS 66
DQ30 68
DQ31 70
VSS 72
CKE1 74
VDD 76
A15 78
A14 80
VDD 82
A11 84
A7 86
VDD 88
A6 90
A4 92
VDD 94
A2 96
A0 98
VDD 100
CK1 102
CK1# 104
VDD 106
BA1 108
RAS# 110
VDD 112
S0# 114
ODT0 116
VDD 118
ODT1 120
NC 122
VDD 124
VREF_CA 126
VSS 128
DQ36 130
DQ37 132
VSS 134
DM4 136
VSS 138
DQ38 140
DQ39 142
VSS 144
DQ44 146
DQ45 148
VSS 150
DQS5# 152
DQS5 154
VSS 156
DQ46 158
DQ47 160
VSS 162
DQ52 164
DQ53 166
VSS 168
DM6 170
VSS 172
DQ54 174
DQ55 176
VSS 178
DQ60 180
DQ61 182
VSS 184
DQS7# 186
DQS7 188
VSS 190
DQ62 192
DQ63 194
VSS 196
EVENT# 198
SDA 200
SA1
201
VTT
203
GND1
205
SCL 202
VTT 204
BOSS1 206
GND2
207 BOSS2 208
CD39 10U_0603_6.3V6MCD39 10U_0603_6.3V6M
1 2
RD15
10K_0402_5%
RD15
10K_0402_5%
1 2
CD32 0.1U_0402_10V7KCD32 0.1U_0402_10V7K
1 2
CD42 1U_0402_6.3V6KCD42 1U_0402_6.3V6K
12
RD14
10K_0402_5%
RD14
10K_0402_5%
1 2
CD33 0.1U_0402_10V7KCD33 0.1U_0402_10V7K
1 2
CD57 10U_0603_6.3V6MCD57 10U_0603_6.3V6M
1 2
RD12
1K_0402_1%
RD12
1K_0402_1%
12
CD29 0.1U_0402_10V7KCD29 0.1U_0402_10V7K
1 2
CD27
0.1U_0402_10V7K
CD27
0.1U_0402_10V7K
1
2
CD40 10U_0603_6.3V6MCD40 10U_0603_6.3V6M
1 2
+
CD31 330U_B2_2.5VM_R15M
@
+
CD31 330U_B2_2.5VM_R15M
@
1 2
CD41 10U_0603_6.3V6MCD41 10U_0603_6.3V6M
1 2
CD48
2.2U_0603_6.3V4Z
@
CD48
2.2U_0603_6.3V4Z
@
1
2
CD38 10U_0603_6.3V6MCD38 10U_0603_6.3V6M
1 2
CD44 1U_0402_6.3V6KCD44 1U_0402_6.3V6K
12
CD49
0.1U_0402_10V7K
CD49
0.1U_0402_10V7K
1
2
CD46
2.2U_0603_6.3V4Z
CD46
2.2U_0603_6.3V4Z
1
2
CD47
0.1U_0402_10V7K
CD47
0.1U_0402_10V7K
1
2
CD36 10U_0603_6.3V6MCD36 10U_0603_6.3V6M
1 2
CD45 1U_0402_6.3V6KCD45 1U_0402_6.3V6K
12
CD37 10U_0603_6.3V6MCD37 10U_0603_6.3V6M
1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
XTAL_OUTBUFF
XTAL_SSIN
PCIE_GTX_CRX_N2
PCIE_GTX_CRX_P2
PCIE_GTX_C_CRX_N2
PCIE_GTX_C_CRX_P2
PCIE_GTX_C_CRX_N5
PCIE_GTX_C_CRX_P5 PCIE_GTX_CRX_N5
PCIE_GTX_CRX_P5
PCIE_GTX_C_CRX_P1 PCIE_GTX_CRX_N1
PCIE_GTX_CRX_P1
PCIE_GTX_C_CRX_N1
PCIE_GTX_C_CRX_N4
PCIE_GTX_C_CRX_P4 PCIE_GTX_CRX_N4
PCIE_GTX_CRX_P4
PCIE_GTX_CRX_N8
PCIE_GTX_CRX_P8
PCIE_GTX_C_CRX_N8
PCIE_GTX_C_CRX_P8
PCIE_GTX_C_CRX_N6
PCIE_GTX_C_CRX_P6 PCIE_GTX_CRX_N6
PCIE_GTX_CRX_P6
PCIE_GTX_C_CRX_N12
PCIE_GTX_C_CRX_P12 PCIE_GTX_CRX_N12
PCIE_GTX_CRX_P12
PCIE_GTX_C_CRX_N7
PCIE_GTX_C_CRX_P7 PCIE_GTX_CRX_N7
PCIE_GTX_CRX_P7
PCIE_GTX_C_CRX_P10 PCIE_GTX_CRX_N10
PCIE_GTX_CRX_P10
PCIE_GTX_C_CRX_N10
PCIE_GTX_C_CRX_N9
PCIE_GTX_C_CRX_P9 PCIE_GTX_CRX_N9
PCIE_GTX_CRX_P9
PCIE_GTX_C_CRX_N14
PCIE_GTX_C_CRX_P14 PCIE_GTX_CRX_N14
PCIE_GTX_CRX_P14
PCIE_GTX_C_CRX_N15
PCIE_GTX_C_CRX_P15 PCIE_GTX_CRX_N15
PCIE_GTX_CRX_P15
PCIE_GTX_CRX_N0
PCIE_GTX_CRX_P0PCIE_GTX_C_CRX_P0
PCIE_GTX_C_CRX_N13
PCIE_GTX_C_CRX_P13 PCIE_GTX_CRX_N13
PCIE_GTX_CRX_P13
PCIE_GTX_C_CRX_N3
PCIE_GTX_C_CRX_P3 PCIE_GTX_CRX_N3
PCIE_GTX_CRX_P3
PCIE_GTX_C_CRX_N11
PCIE_GTX_C_CRX_P11 PCIE_GTX_CRX_P11
PCIE_GTX_CRX_N11
PCIE_GTX_C_CRX_N0
PCIE_CTX_C_GRX_N1
PCIE_CTX_C_GRX_P1
PCIE_CTX_C_GRX_N9
PCIE_CTX_C_GRX_P9
PCIE_CTX_C_GRX_N2
PCIE_CTX_C_GRX_P2
PCIE_CTX_C_GRX_N10
PCIE_CTX_C_GRX_P10
PCIE_CTX_C_GRX_N3
PCIE_CTX_C_GRX_P3
PCIE_CTX_C_GRX_N11
PCIE_CTX_C_GRX_P11
PCIE_CTX_C_GRX_N4
PCIE_CTX_C_GRX_P4
PCIE_CTX_C_GRX_N12
PCIE_CTX_C_GRX_P12
PCIE_CTX_C_GRX_P5
PCIE_CTX_C_GRX_N5
PCIE_CTX_C_GRX_N8
PCIE_CTX_C_GRX_P8
PCIE_CTX_C_GRX_N13
PCIE_CTX_C_GRX_P13
PCIE_CTX_C_GRX_N6
PCIE_CTX_C_GRX_P6
PCIE_CTX_C_GRX_N14
PCIE_CTX_C_GRX_P14
PCIE_CTX_C_GRX_P7
PCIE_CTX_C_GRX_N7
PCIE_CTX_C_GRX_P15
PCIE_CTX_C_GRX_N15
PCIE_CTX_C_GRX_N0
PCIE_CTX_C_GRX_P0
CLK_PCIE_VGA
CLK_PCIE_VGA#
CLK_REQ_GPU#
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT#
PLTRST_VGA_R#
CLK_REQ_GPU#
VGA_ENVDD
VGA_BL_PWM
VGA_ENBKL
OVERT#_VGA
GPU_EVENT
GPS_DOWN#
VGA_BL_PWM
VGA_ENBKL
HDMI_HPD_VGA
PCIE_CTX_C_GRX_N[0..15]
PCIE_CTX_C_GRX_P[0..15]
PCIE_GTX_C_CRX_P[0..15]
PCIE_GTX_C_CRX_N[0..15]
VGA_CRT_VSYNC
VGA_CRT_HSYNC
VGA_CRT_G
VGA_CRT_B
VGA_CRT_R
+DACA_VREF
DACA_RSET
+DACA_VDD
VGA_CRT_G
VGA_CRT_B
VGA_CRT_R
GPS_DOWN#
GPU_EVENT
VGA_EDID_DATA
VGA_EDID_CLK
OVERT#_VGA
VGA_CRT_DATA
VGA_CRT_CLK
HDCP_SCL
HDCP_SDA
VGA_EDID_DATA
VGA_EDID_CLK
SMB_CLK_GPU
SMB_DATA_GPU
VGA_CRT_DATA
VGA_CRT_CLK
HDCP_SDA
HDCP_SCL
XTALIN
XTAL_OUT
HDMI_HPD_VGA
+PLLVDD
+GPU_PLLVDD
XTAL_OUTXTALIN
SMB_DATA_GPU
SMB_CLK_GPU
SMB_DATA_GPU
EC_SMB_CK2
SMB_CLK_GPU
EC_SMB_DA2
VGA_VID_0
VGA_VID_1
VGA_VID_2
VGA_VID_3
VGA_VID_4
VGA_VID_5
+PLLVDD
CLK_PCIE_VGA<26>CLK_PCIE_VGA#<26>
PLTRST_VGA#<29>
CLK_REQ_VGA#<26>
VGA_ENBKL <22>
VGA_BL_PWM <22>
VGA_ENVDD <22>
GPS_DOWN# <44>
PCIE_GTX_C_CRX_P[0..15]<6>
PCIE_GTX_C_CRX_N[0..15]<6>
PCIE_CTX_C_GRX_P[0..15]<6>
PCIE_CTX_C_GRX_N[0..15]<6>
VGA_CRT_B <23>
VGA_CRT_R <23>
VGA_CRT_G <23>
VGA_CRT_VSYNC <23>
VGA_CRT_HSYNC <23>
VGA_EDID_CLK <22>
VGA_EDID_DATA <22>
VGA_CRT_CLK <23>
VGA_CRT_DATA <23>
HDMI_HPD <24,28,30>
EC_SMB_CK2 <26,44,45>
EC_SMB_DA2 <26,44,45>
VGA_VID_4 <58>
VGA_VID_3 <58>
VGA_VID_1 <58>
VGA_VID_2 <58>
VGA_VID_0 <58>
VGA_VID_5 <58>
+3VS_DGPU
+3VS_DGPU
+3VS_DGPU
+1.05VS_DGPU
+3VS_DGPU
+3VS_DGPU
+3VS_DGPU
+1.05VS_DGPU
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
Custom
13 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
Custom
13 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
Custom
13 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
120mA
Close to GPU
Internal Thermal Sensor
CV38,CV40, CV41 under GPU
close to ball : AE8,AD7
45mA
LVDS
110804 check with NV pull down 10k if DAC unused
EC GPS_DOWN# must be OD\Low
to avoid leakage on OPT SKU.
CV1971 under GPU
close to ball : ADB
45mA
60mA
120mA
4019HG
CV216 0.22U_0402_16V7KCV216 0.22U_0402_16V7K
1 2
CV217 0.22U_0402_16V7KCV217 0.22U_0402_16V7K
1 2
CV39 0.22U_0402_16V7KCV39 0.22U_0402_16V7K
1 2
CV46
0.1U_0402_10V7K
@
CV46
0.1U_0402_10V7K
@
1
2
CV219 0.22U_0402_16V7KCV219 0.22U_0402_16V7K
1 2
RV182
0_0402_5%
RV182
0_0402_5%
1 2
CV98 0.22U_0402_16V7K
CV98 0.22U_0402_16V7K
1 2
LV10
BLM18PG330SN1D_0603
LV10
BLM18PG330SN1D_0603
1 2
RV27
124_0402_1%
DIS@
RV27
124_0402_1%
DIS@
12
RV37 10K_0402_5%RV37 10K_0402_5%
1 2
CV203 0.22U_0402_16V7K
CV203 0.22U_0402_16V7K
1 2
RV10 10K_0402_5%RV10 10K_0402_5%
1 2
CV225
10K_0402_5%
OPT@
CV225
10K_0402_5%
OPT@
CV107 0.22U_0402_16V7KCV107 0.22U_0402_16V7K
1 2
CV205 0.22U_0402_16V7KCV205 0.22U_0402_16V7K
1 2
CV201 0.22U_0402_16V7KCV201 0.22U_0402_16V7K
1 2
CV41
0.1U_0402_10V7K
CV41
0.1U_0402_10V7K
1
2
CV44
10U_0603_6.3V6M
CV44
10U_0603_6.3V6M
1
2
LV15
BLM18PG181SN1D_2P
LV15
BLM18PG181SN1D_2P
1 2
RV6 2.2K_0402_5%RV6 2.2K_0402_5%
1 2
CV109
4.7U_0603_6.3V6K
CV109
4.7U_0603_6.3V6K
1
2
CV40
0.1U_0402_10V7K
CV40
0.1U_0402_10V7K
1
2
LV3
MBK1608221YZF_2P
DIS@
LV3
MBK1608221YZF_2P
DIS@
1 2
CV43
22U_0805_6.3V6M
CV43
22U_0805_6.3V6M
1
2
CV99 0.22U_0402_16V7KCV99 0.22U_0402_16V7K
1 2
CV48
18P_0402_50V8J
CV48
18P_0402_50V8J
1
2
CV224
0.1U_0402_10V7K
DIS@
CV224
0.1U_0402_10V7K
DIS@
1
2
RV2 10K_0402_5%
DIS@
RV2 10K_0402_5%
DIS@ 12
CV212 0.22U_0402_16V7KCV212 0.22U_0402_16V7K
1 2
CV218
0.1U_0402_10V7K
DIS@
CV218
0.1U_0402_10V7K
DIS@
1
2
CV38
0.1U_0402_10V7K
CV38
0.1U_0402_10V7K
1
2
CV105 0.22U_0402_16V7KCV105 0.22U_0402_16V7K
1 2
RV35 0_0402_5%
DIS@
RV35 0_0402_5%
DIS@
1 2
RV52
10K_0402_5%
RV52
10K_0402_5%
12
RV11 2.2K_0402_5%RV11 2.2K_0402_5%
1 2
CV37 0.22U_0402_16V7K
CV37 0.22U_0402_16V7K
1 2
CV197
0.1U_0402_10V7K
CV197
0.1U_0402_10V7K
1
2
CV49
18P_0402_50V8J
CV49
18P_0402_50V8J
1
2
CV94 0.22U_0402_16V7K
CV94 0.22U_0402_16V7K
1 2
CV45 0.22U_0402_16V7KCV45 0.22U_0402_16V7K
1 2
YV3
27MHZ_16PF_7V27000011
YV3
27MHZ_16PF_7V27000011
GND
2
33
1
1
GND
4
CV210 0.22U_0402_16V7KCV210 0.22U_0402_16V7K
1 2
CV108 0.22U_0402_16V7K
CV108 0.22U_0402_16V7K
1 2
CV35 0.22U_0402_16V7K
CV35 0.22U_0402_16V7K
1 2
CV47
22U_0805_6.3V6M
CV47
22U_0805_6.3V6M
1
2
CV204 0.22U_0402_16V7K
CV204 0.22U_0402_16V7K
1 2
RV36 0_0402_5%
DIS@
RV36 0_0402_5%
DIS@
1 2
CV53
10U_0603_6.3V6M
CV53
10U_0603_6.3V6M
1
2
CV222
4.7U_0603_6.3V6K
@
CV222
4.7U_0603_6.3V6K
@
1
2
RV20 150_0402_1%
DIS@
RV20 150_0402_1%
DIS@
1 2
RV16 200_0402_1%
@
RV16 200_0402_1%
@
1 2
RV32 10K_0402_5%RV32 10K_0402_5%
1 2
RV24
2.2K_0402_5%
OPT@
RV24
2.2K_0402_5%
OPT@
1 2
CV202 0.22U_0402_16V7KCV202 0.22U_0402_16V7K
1 2
CV223
1U_0402_6.3V6K
DIS@
CV223
1U_0402_6.3V6K
DIS@
1
2
RV3 10K_0402_5%
DIS@
RV3 10K_0402_5%
DIS@ 12
RV23 150_0402_1%
DIS@
RV23 150_0402_1%
DIS@
1 2
CV93 0.22U_0402_16V7KCV93 0.22U_0402_16V7K
1 2
G
D
S
QV3
2N7002_SOT23-3
G
D
S
QV3
2N7002_SOT23-3 2
13
QV1B
2N7002DW-T/R7_SOT363-6
OPT@
QV1B
2N7002DW-T/R7_SOT363-6
OPT@
3
5
4
RV21 150_0402_1%
DIS@
RV21 150_0402_1%
DIS@
1 2
CV214 0.22U_0402_16V7K
CV214 0.22U_0402_16V7K
1 2
CV213 0.22U_0402_16V7K
CV213 0.22U_0402_16V7K
1 2
RV12 2.2K_0402_5%RV12 2.2K_0402_5%
1 2
PCI EXPRESS
CLK
Part 1 of 7
DACs
I2C GPIO
UV4A
N13P-PES-A2_FCBGA908
N13PGSR1@
PCI EXPRESS
CLK
Part 1 of 7
DACs
I2C GPIO
UV4A
N13P-PES-A2_FCBGA908
N13PGSR1@
PEX_RX0
AN12
PEX_RX0_N
AM12
PEX_RX1
AN14
PEX_RX1_N
AM14
PEX_RX2
AP14
PEX_RX2_N
AP15
PEX_RX3
AN15
PEX_RX3_N
AM15
PEX_RX4
AN17
PEX_RX4_N
AM17
PEX_RX5
AP17
PEX_RX5_N
AP18
PEX_RX6
AN18
PEX_RX6_N
AM18
PEX_RX7
AN20
PEX_RX7_N
AM20
PEX_RX8
AP20
PEX_RX8_N
AP21
PEX_RX9
AN21
PEX_RX9_N
AM21
PEX_RX10
AN23
PEX_RX10_N
AM23
PEX_RX11
AP23
PEX_RX11_N
AP24
PEX_RX12
AN24
PEX_RX12_N
AM24
PEX_RX13
AN26
PEX_RX13_N
AM26
PEX_RX14
AP26
PEX_RX14_N
AP27
PEX_RX15
AN27
PEX_RX15_N
AM27
PEX_TX0
AK14
PEX_TX0_N
AJ14
PEX_TX1
AH14
PEX_TX1_N
AG14
PEX_TX2
AK15
PEX_TX2_N
AJ15
PEX_TX3
AL16
PEX_TX3_N
AK16
PEX_TX4
AK17
PEX_TX4_N
AJ17
PEX_TX5
AH17
PEX_TX5_N
AG17
PEX_TX6
AK18
PEX_TX6_N
AJ18
PEX_TX7
AL19
PEX_TX7_N
AK19
PEX_TX8
AK20
PEX_TX8_N
AJ20
PEX_TX9
AH20
PEX_TX9_N
AG20
PEX_TX10
AK21
PEX_TX10_N
AJ21
PEX_TX11
AL22
PEX_TX11_N
AK22
PEX_TX12
AK23
PEX_TX12_N
AJ23
PEX_TX13
AH23
PEX_TX13_N
AG23
PEX_TX14
AK24
PEX_TX14_N
AJ24
PEX_TX15
AL25
PEX_TX15_N
AK25
PEX_REFCLK
AL13
PEX_REFCLK_N
AK13
PEX_RST_N
AJ12
PEX_TSTCLK_OUT
AJ26
PEX_TSTCLK_OUT_N
AK26
PEX_TERMP
AP29
PEX_CLKREQ_N
AK12
PEX_WAKE_N
AJ11
GPIO0 P6
GPIO1 M3
GPIO2 L6
GPIO3 P5
GPIO4 P7
GPIO5 L7
GPIO6 M7
GPIO7 N8
GPIO8 M1
GPIO9 M2
GPIO10 L1
GPIO11 M5
GPIO12 N3
GPIO13 M4
GPIO14 N4
GPIO15 P2
GPIO16 R8
GPIO17 M6
GPIO18 R1
GPIO19 P3
GPIO20 P4
GPIO21 P1
I2CS_SCL T4
I2CS_SDA T3
I2CC_SCL R2
I2CC_SDA R3
I2CB_SCL R7
I2CB_SDA R6
I2CA_SCL R4
I2CA_SDA R5
DACA_HSYNC AM9
DACA_VSYNC AN9
DACA_RED AK9
DACA_GREEN AL10
DACA_BLUE AL9
DACA_VDD AG10
DACA_VREF AP9
DACA_RSET AP8
PLLVDD AD8
SP_PLLVDD AE8
VID_PLLVDD AD7
XTAL_SSIN H1
XTAL_IN H3
XTAL_OUTBUFF J4
XTAL_OUT H2
CV211 0.22U_0402_16V7KCV211 0.22U_0402_16V7K
1 2
CV225
0.1U_0402_10V7K
DIS@
CV225
0.1U_0402_10V7K
DIS@
1
2
RV22
2.2K_0402_5%
OPT@
RV22
2.2K_0402_5%
OPT@
1 2
CV207 0.22U_0402_16V7KCV207 0.22U_0402_16V7K
1 2
RV45
10K_0402_5%
RV45
10K_0402_5%12
CV209 0.22U_0402_16V7K
CV209 0.22U_0402_16V7K
1 2
CV206 0.22U_0402_16V7KCV206 0.22U_0402_16V7K
1 2
RV179
10K_0402_5%
RV179
10K_0402_5%
1 2
RV18 0_0402_5%RV18 0_0402_5%
1 2
CV208 0.22U_0402_16V7K
CV208 0.22U_0402_16V7K
1 2
RV608 100K_0402_5%RV608 100K_0402_5%
12
RV606
0_0402_5%
DHDMI@
RV606
0_0402_5%
DHDMI@
12
CV42
4.7U_0603_6.3V6K
CV42
4.7U_0603_6.3V6K
1
2
RV19 2.49K_0402_1%RV19 2.49K_0402_1%
1 2
CV199 0.22U_0402_16V7K
CV199 0.22U_0402_16V7K
1 2
QV1A
2N7002DW-T/R7_SOT363-6
OPT@
QV1A
2N7002DW-T/R7_SOT363-6
OPT@
61
2
CV227
4.7U_0603_6.3V6K
DIS@
CV227
4.7U_0603_6.3V6K
DIS@
1
2
CV215 0.22U_0402_16V7KCV215 0.22U_0402_16V7K
1 2
CV200 0.22U_0402_16V7KCV200 0.22U_0402_16V7K
1 2
RV7 2.2K_0402_5%RV7 2.2K_0402_5%
1 2
RV13 2.2K_0402_5%RV13 2.2K_0402_5%
1 2
RV14 2.2K_0402_5%RV14 2.2K_0402_5%
1 2
CV220 0.22U_0402_16V7KCV220 0.22U_0402_16V7K
1 2
A
A
1 1
MDA[63..48]
MDA[15..0]
MDA[31..16]
MDA[47..32]
CMDA27
CMDA8
CMDA21
MDA56
MDA62
MDA63
MDA59
MDA61
MDA58
MDA60
MDA45
MDA57
MDA44
MDA40
MDA47
MDA41
MDA46
MDA42
MDA33
MDA35
MDA43
MDA28
MDA38
MDA37
MDA34
MDA39
MDA36
MDA20
MDA23
MDA30
MDA31
MDA32
MDA21
MDA25
MDA22
MDA26
MDA24
MDA29
MDA2
MDA15
MDA13
MDA27
MDA0
MDA18
MDA9
MDA8
MDA12
MDA1
MDA3
MDA16
MDA11
MDA10
MDA5
MDA7
MDA14
MDA19
MDA6
MDA17
MDA4
MDA50
MDA54
MDA55
MDA48
MDA49
MDA52
MDA53
MDA51
CMDA15
CMDA2
CMDA9
CMDA22
CMDA16
CMDA3
CMDA28
CMDA10
CMDA23
CMDA17
CMDA4
CMDA11
CMDA24
CMDA29
CMDA5
CMDA18
CMDA0
CMDA12
CMDA25
CMDA6
CMDA19
CMDA30
CMDA13
CMDA26
CMDA7
CMDA20
CMDA14
CMDA1 MDC0
MDC1
MDC2
MDC56
MDC62
MDC63
MDC59
MDC61
MDC58
MDC60
MDC45
MDC57
MDC44
MDC40
MDC47
MDC41
MDC46
MDC42
MDC33
MDC35
MDC43
MDC28
MDC38
MDC37
MDC34
MDC39
MDC36
MDC20
MDC23
MDC30
MDC31
MDC32
MDC21
MDC25
MDC22
MDC26
MDC24
MDC29
MDC15
MDC13
MDC27
MDC18
MDC9
MDC8
MDC12
MDC3
MDC16
MDC11
MDC10
MDC5
MDC7
MDC14
MDC19
MDC6
MDC17
MDC4
MDC50
MDC54
MDC55
MDC48
MDC49
MDC52
MDC53
MDC51
MDC[63..48]
MDC[15..0]
MDC[31..16]
MDC[47..32]
CMDC27
CMDC8
CMDC21
CMDC15
CMDC2
CMDC9
CMDC22
CMDC16
CMDC3
CMDC28
CMDC10
CMDC23
CMDC17
CMDC4
CMDC11
CMDC24
CMDC29
CMDC5
CMDC18
CMDC0
CMDC12
CMDC25
CMDC6
CMDC19
CMDC30
CMDC13
CMDC26
CMDC7
CMDC20
CMDC14
CMDC1
DQMA0
DQMA1
DQMA2DQMA2
DQMA3
DQMA4DQMA4
DQMA5
DQMA6
DQMA7
DQSA3
DQSA2
DQSA1
DQSA0
DQSA4
DQSA5
DQSA6
DQSA7
DQSA#0
DQSA#1
DQSA#3
DQSA#2
DQSA#4
DQSA#5
DQSA#6
DQSA#7
DQSC#5
DQSC#0
DQSC#1
DQSC#3
DQSC#2
DQSC#4
DQSC#6
DQSC#7
DQMC0
DQMC1
DQMC2
DQMC3
DQMC4
DQMC5
DQMC6
DQMC7
DQSC0
DQSC1
DQSC3
DQSC2
DQSC4
DQSC5
DQSC6
DQSC7
FBA_DEBUG0 FBB_DEBUG0
FBB_DEBUG1FBA_DEBUG1
+FB_AVDD
+FB_AVDD
+FB_AVDD
FB_CLAMP
MDA[15..0]<19>
MDA[63..48]<18>
MDA[47..32]<18>
MDA[31..16]<19>
CMDA[30..0] <18,19>
MDC[15..0]<20>
MDC[63..48]<21>
MDC[47..32]<21>
MDC[31..16]<20>
CLKC0 <20>
CLKC0# <20>
CLKC1 <21>
CLKC1# <21>
CLKA1 <18>
CLKA1# <18>
CLKA0 <19>
CLKA0# <19>
CMDC[30..0] <20,21>
DQMA[3..0]<19>
DQMA[7..4]<18>
DQSA[3..0]<19>
DQSA[7..4]<18>
DQSA#[3..0]<19>
DQSA#[7..4]<18>
DQSC#[3..0]<20>
DQSC#[7..4]<21>
DQMC[3..0]<20>
DQMC[7..4]<21>
DQSC[3..0]<20>
DQSC[7..4]<21>
+VRAM_1.5VS
+1.05VS_DGPU
+VRAM_1.5VS
+FB_AVDD
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
Custom
14 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
Custom
14 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
Custom
14 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
VRAM Interface
66mA
35mA
100mA
12mil
66mA
4019HG
CV52
0.1U_0402_10V7K
CV52
0.1U_0402_10V7K
1
2
LV5
BLM18PG330SN1D_0603
LV5
BLM18PG330SN1D_0603
1 2
RV58 60.4_0402_1%
@
RV58 60.4_0402_1%
@12
CV50
0.1U_0402_10V7K
CV50
0.1U_0402_10V7K
1
2
CV51
0.1U_0402_10V7K
CV51
0.1U_0402_10V7K
1
2
CV233
22U_0805_6.3V6M
CV233
22U_0805_6.3V6M
1
2
CV86
1U_0402_6.3V6K
CV86
1U_0402_6.3V6K
1
2
MEMORY INTERFACE B
Part 3 of 7
UV4C
N13P-PES-A2_FCBGA908
N13PGSR1@
MEMORY INTERFACE B
Part 3 of 7
UV4C
N13P-PES-A2_FCBGA908
N13PGSR1@
FBB_D0
G9
FBB_D1
E9
FBB_D2
G8
FBB_D3
F9
FBB_D4
F11
FBB_D5
G11
FBB_D6
F12
FBB_D7
G12
FBB_D8
G6
FBB_D9
F5
FBB_D10
E6
FBB_D11
F6
FBB_D12
F4
FBB_D13
G4
FBB_D14
E2
FBB_D15
F3
FBB_D16
C2
FBB_D17
D4
FBB_D18
D3
FBB_D19
C1
FBB_D20
B3
FBB_D21
C4
FBB_D22
B5
FBB_D23
C5
FBB_D24
A11
FBB_D25
C11
FBB_D26
D11
FBB_D27
B11
FBB_D28
D8
FBB_D29
A8
FBB_D30
C8
FBB_D31
B8
FBB_D32
F24
FBB_D33
G23
FBB_D34
E24
FBB_D35
G24
FBB_D36
D21
FBB_D37
E21
FBB_D38
G21
FBB_D39
F21
FBB_D40
G27
FBB_D41
D27
FBB_D42
G26
FBB_D43
E27
FBB_D44
E29
FBB_D45
F29
FBB_D46
E30
FBB_D47
D30
FBB_D48
A32
FBB_D49
C31
FBB_D50
C32
FBB_D51
B32
FBB_D52
D29
FBB_D53
A29
FBB_D54
C29
FBB_D55
B29
FBB_D56
B21
FBB_D57
C23
FBB_D58
A21
FBB_D59
C21
FBB_D60
B24
FBB_D61
C24
FBB_D62
B26
FBB_D63
C26
FBB_DQM0
E11
FBB_DQM1
E3
FBB_DQM2
A3
FBB_DQM3
C9
FBB_DQM4
F23
FBB_DQM5
F27
FBB_DQM6
C30
FBB_DQM7
A24
FBB_DQS_WP0
D10
FBB_DQS_WP1
D5
FBB_DQS_WP2
C3
FBB_DQS_WP3
B9
FBB_DQS_WP4
E23
FBB_DQS_WP5
E28
FBB_DQS_WP6
B30
FBB_DQS_WP7
A23
FBB_DQS_RN0
D9
FBB_DQS_RN1
E4
FBB_DQS_RN2
B2
FBB_DQS_RN3
A9
FBB_DQS_RN4
D22
FBB_DQS_RN5
D28
FBB_DQS_RN6
A30
FBB_DQS_RN7
B23
FBB_CMD0 D13
FBB_CMD1 E14
FBB_CMD2 F14
FBB_CMD3 A12
FBB_CMD4 B12
FBB_CMD5 C14
FBB_CMD6 B14
FBB_CMD7 G15
FBB_CMD8 F15
FBB_CMD9 E15
FBB_CMD10 D15
FBB_CMD11 A14
FBB_CMD12 D14
FBB_CMD13 A15
FBB_CMD14 B15
FBB_CMD15 C17
FBB_CMD16 D18
FBB_CMD17 E18
FBB_CMD18 F18
FBB_CMD19 A20
FBB_CMD20 B20
FBB_CMD21 C18
FBB_CMD22 B18
FBB_CMD23 G18
FBB_CMD24 G17
FBB_CMD25 F17
FBB_CMD26 D16
FBB_CMD27 A18
FBB_CMD28 D17
FBB_CMD29 A17
FBB_CMD30 B17
FBB_CMD31 E17
FBB_CMD_RFU0 C12
FBB_CMD_RFU1 C20
FBB_DEBUG0 G14
FBB_DEBUG1 G20
FBB_CLK0 D12
FBB_CLK0_N E12
FBB_CLK1 E20
FBB_CLK1_N F20
FBB_WCK01 F8
FBB_WCK01_N E8
FBB_WCK23 A5
FBB_WCK23_N A6
FBB_WCK45 D24
FBB_WCK45_N D25
FBB_WCK67 B27
FBB_WCK67_N C27
FBB_WCKB01 D6
FBB_WCKB01_N D7
FBB_WCKB23 C6
FBB_WCKB23_N B6
FBB_WCKB45 F26
FBB_WCKB45_N E26
FBB_WCKB67 A26
FBB_WCKB67_N A27
FBB_PLL_AVDD H17
RV57 60.4_0402_1%
@
RV57 60.4_0402_1%
@12
RV60 60.4_0402_1%
@
RV60 60.4_0402_1%
@12
MEMORY INTERFACE
A
Part 2 of 7
UV4B
N13P-PES-A2_FCBGA908
N13PGSR1@
MEMORY INTERFACE
A
Part 2 of 7
UV4B
N13P-PES-A2_FCBGA908
N13PGSR1@
FBA_D0
L28
FBA_D1
M29
FBA_D2
L29
FBA_D3
M28
FBA_D4
N31
FBA_D5
P29
FBA_D6
R29
FBA_D7
P28
FBA_D8
J28
FBA_D9
H29
FBA_D10
J29
FBA_D11
H28
FBA_D12
G29
FBA_D13
E31
FBA_D14
E32
FBA_D15
F30
FBA_D16
C34
FBA_D17
D32
FBA_D18
B33
FBA_D19
C33
FBA_D20
F33
FBA_D21
F32
FBA_D22
H33
FBA_D23
H32
FBA_D24
P34
FBA_D25
P32
FBA_D26
P31
FBA_D27
P33
FBA_D28
L31
FBA_D29
L34
FBA_D30
L32
FBA_D31
L33
FBA_D32
AG28
FBA_D33
AF29
FBA_D34
AG29
FBA_D35
AF28
FBA_D36
AD30
FBA_D37
AD29
FBA_D38
AC29
FBA_D39
AD28
FBA_D40
AJ29
FBA_D41
AK29
FBA_D42
AJ30
FBA_D43
AK28
FBA_D44
AM29
FBA_D45
AM31
FBA_D46
AN29
FBA_D47
AM30
FBA_D48
AN31
FBA_D49
AN32
FBA_D50
AP30
FBA_D51
AP32
FBA_D52
AM33
FBA_D53
AL31
FBA_D54
AK33
FBA_D55
AK32
FBA_D56
AD34
FBA_D57
AD32
FBA_D58
AC30
FBA_D59
AD33
FBA_D60
AF31
FBA_D61
AG34
FBA_D62
AG32
FBA_D63
AG33
FBA_CMD3 R34
FBA_CMD8 V28
FBA_CMD2 U29
FBA_CMD21 AA32
FBA_CMD24 Y29
FBA_CMD23 Y28
FBA_CMD26 Y30
FBA_CMD7 U28
FBA_CMD15 Y32
FBA_CMD13 V34
FBA_CMD4 R33
FBA_CMD18 AA28
FBA_CMD29 Y34
FBA_CMD27 AA34
FBA_CMD6 U33
FBA_CMD17 AA29
FBA_CMD19 AC34
FBA_CMD22 AA33
FBA_CMD12 U31
FBA_CMD28 Y31
FBA_CMD10 V30
FBA_CMD25 W31
FBA_CMD9 V29
FBA_CMD1 T31
FBA_CMD11 U34
FBA_CMD0 U30
FBA_CMD5 U32
FBA_DQM0
P30
FBA_DQM1
F31
FBA_DQM2
F34
FBA_DQM3
M32
FBA_DQM4
AD31
FBA_DQM5
AL29
FBA_DQM6
AM32
FBA_DQM7
AF34
FBA_DQS_RN0
M30
FBA_DQS_RN1
H30
FBA_DQS_RN2
E34
FBA_DQS_RN3
M34
FBA_DQS_RN4
AF30
FBA_DQS_RN5
AK31
FBA_DQS_RN6
AM34
FBA_DQS_RN7
AF32
FBA_DQS_WP0
M31
FBA_DQS_WP1
G31
FBA_DQS_WP2
E33
FBA_DQS_WP3
M33
FBA_DQS_WP4
AE31
FBA_DQS_WP5
AK30
FBA_DQS_WP6
AN33
FBA_DQS_WP7
AF33
FBA_CMD16 AA31
FBA_CMD20 AC33
FBA_CMD14 V33
FBA_CMD30 Y33
FBA_CMD31 V31
FBA_CLK0_N R31
FBA_WCK45_N AG31
FBA_CLK0 R30
FBA_WCK67 AJ34
FBA_WCK23 H34
FBA_WCK01_N L30
FBA_WCK01 K31
FBA_WCK67_N AK34
FBA_WCK23_N J34
FBA_CLK1_N AC31
FBA_WCK45 AG30
FBA_CLK1 AB31
FBA_WCKB01 J30
FBA_WCKB01_N J31
FBA_WCKB23 J32
FBA_WCKB23_N J33
FBA_WCKB45 AH31
FBA_WCKB45_N AJ31
FBA_WCKB67 AJ32
FBA_WCKB67_N AJ33
FBA_PLL_AVDD U27
FBA_CMD_RFU0 R32
FBA_CMD_RFU1 AC32
FB_VREF H26
FB_CLAMP E1
FB_DLL_AVDD K27
FBA_DEBUG0 R28
FBA_DEBUG1 AC28 RV59 60.4_0402_1%
@
RV59 60.4_0402_1%
@12
RV74
10K_0402_1%
RV74
10K_0402_1%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ROM_SCLK
ROM_SI
STRAP0 ROM_SO
STRAP2
STRAP1
ROM_SCLK
ROM_CS#
ROM_SO
ROM_SI
FB_GND_R
GCORE_SEN_R
JTAG_TRST
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TCK
STRAP3
STRAP4
STRAP0
STRAP1
STRAP2
MULTI_STRAP_REF0_GND
STRAP3
STRAP4
VGA_TZOUT0-
VGA_TZOUT0+
VGA_TZOUT1+
VGA_TZOUT1-
VGA_TZCLK-
VGA_TZCLK+
VGA_TZOUT2+
VGA_TZOUT2-
VGA_TXOUT0-
VGA_TXOUT0+
VGA_TXOUT1+
VGA_TXOUT1-
VGA_TXCLK-
VGA_TXCLK+
VGA_TXOUT2+
VGA_TXOUT2-
VGA_HDMI_TX1-
VGA_HDMI_TX1+
VGA_HDMI_TX2-
VGA_HDMI_TX2+
VGA_HDMI_CLK-
VGA_HDMI_TX0-
VGA_HDMI_TX0+
VGA_HDMI_CLK+
VGA_HDMI_CLK
VGA_HDMI_DATA
VGA_HDMI_CLK
VGA_HDMI_DATA
VGA_VCC_SENSE <58>
VGA_VSS_SENSE <58>
VGA_TXOUT2+<22>
VGA_TXOUT0+<22>
VGA_TXOUT1+<22>
VGA_TXCLK-<22> VGA_TXCLK+<22>
VGA_TXOUT2-<22>
VGA_TXOUT0-<22>
VGA_TXOUT1-<22>
VGA_TZOUT2+<22>
VGA_TZOUT0+<22>
VGA_TZOUT1+<22>
VGA_TZCLK-<22> VGA_TZCLK+<22>
VGA_TZOUT2-<22>
VGA_TZOUT0-<22>
VGA_TZOUT1-<22>
VGA_HDMI_TX1-<24> VGA_HDMI_TX1+<24> VGA_HDMI_TX2-<24> VGA_HDMI_TX2+<24>
VGA_HDMI_TX0-<24>
VGA_HDMI_CLK+<24>
VGA_HDMI_TX0+<24>
VGA_HDMI_CLK-<24>
VGA_HDMI_DATA<24> VGA_HDMI_CLK<24>
+3VS_DGPU
+3VS_DGPU
+3VS_DGPU
+3VS_DGPU +3VS_DGPU
+VGA_CORE
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
SCHEMATICS, MB A8391
Custom
15 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
B
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
SCHEMATICS, MB A8391
Custom
15 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
B
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
SCHEMATICS, MB A8391
Custom
15 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
B
Straps
MULTI LEVEL STRAPS
Samsung (900MHZ)
128M16 K4W2G1646C-HC11
SA000047Q00
0101
RV77 PD 34.8k
(SD034348280)
0111 RV77 PD 45.3K
(SD034453280)
2GB
1GB
RV77 PD 15K
2GB
RV77 PD 20K
0011
(SD034150280)
(SD034200280)
Hynix (900MHZ)
64MX16 H5TQ1G63DFR-11C
Samsung (900MHZ)
64MX16 K4W1G1646G-BC11
SA000041S20
SA00004GS00
1GB 0010
Hynix (900MHZ)
128MX16 H5TQ2G63BFR-11C
SA00003YO00
N13P-GL/GS/GT/LP
ROM_SI
+3VS_DGPU
+3VS_DGPU
Resistor Values Pull-up to +3VS
_DGPU
5K 1000
10K
15K
20K
25K
30K
35K
45K
Pull-down to Gnd
1001
1010
1011
1100
1101
1110
1111
0000
0001
0010
0011
0100
0101
0110
0111
Power Rail
+3VS_DGPU
ROM_SCLK
Logical
Strapping Bit3 Logical
Strapping Bit2
SLOT_CLK_CFG for GL
PCI_DEVID[5]
Logical
Strapping Bit0
SUB_VENDOR
USER[0]USER[1]USER[2]
PCI_DEVID[0]PCI_DEVID[1]PCI_DEVID[2]
PEX_PLLEN_TERM
RAMCFG[0]
STRAP0
STRAP2
ROM_SI RAMCFG[1]RAMCFG[3] RAMCFG[2]
VGA_DEVICE
SMB_ALT_ADDR
PCI_DEVID[3]
+3VS_DGPU
+3VS_DGPU
USER[3]
PCI_DEVID[4]
XCLK_417 for GL
, FB[1]
ROM_SO FB_0_BAR_SIZE for GL
, FB[0]
Logical
Strapping Bit1
Physical
Strapping pin
+3VS_DGPU 3GIO_PADCFG[0]3GIO_PADCFG[1]3GIO_PADCFG[2]
STRAP1 3GIO_PADCFG[3]
+3VS_DGPU SOR0_EXPOSEDSOR2_EXPOSED SOR1_EXPOSED
STRAP3 SOR3_EXPOSED
+3VS_DGPU DP_PLL_VDD33V
PCIE_SPEED_CHANGE_GEN3 PCIE_MAX_SPEED
STRAP4 RESERVED
For X76
010010
N13P-GL ES2
N13P-GS ES1
N13P-GS QS
SKU
0x0DE9
0x0FDB
0x0FD2
Device ID
011011
101001
biit5 to bit0
Hynix (900MHZ)
128MX16 H5TQ2G63DFR-11C
01102GB
SA00003YO70
RV77 PD 30k
(SD034300280)
Samsung (900MHZ)
128M16 K4W2G1646E-HC11
SA000047QC0
2GB
4019HG
RV87 40.2K_0402_1%RV87 40.2K_0402_1%
1 2
TV3
PAD @TV3
PAD @
RV76
45.3K_0402_1%
N13PGS@
RV76
45.3K_0402_1%
N13PGS@
12
RV80 0_0402_5%RV80 0_0402_5%
1 2
RV151 4.7K_0402_5%
DHDMI@
RV151 4.7K_0402_5%
DHDMI@
1 2
RV79
10K_0402_1%
N13PGL@
RV79
10K_0402_1%
N13PGL@ 12
RV153 10K_0402_5%RV153 10K_0402_5%
1 2
Part 4 of 7
LVDS/TMDS
NC
GENERAL
SERIAL
TEST
UV4D
N13P-PES-A2_FCBGA908
N13PGSR1@
Part 4 of 7
LVDS/TMDS
NC
GENERAL
SERIAL
TEST
UV4D
N13P-PES-A2_FCBGA908
N13PGSR1@
IFPA_TXC_N
AN6 IFPA_TXC
AM6
NC P8
NC AC6
NC AJ28
NC AJ4
NC AJ5
NC AL11
NC C15
NC D19
NC D20
NC D23
NC D26
NC H31
NC T8
IFPA_TXD0
AP3
IFPA_TXD0_N
AN3
IFPA_TXD1
AN5
IFPA_TXD1_N
AM5
IFPA_TXD2
AL6
IFPA_TXD2_N
AK6
IFPA_TXD3
AJ6
IFPA_TXD3_N
AH6
IFPB_TXC
AJ9
IFPB_TXC_N
AH9
IFPB_TXD4
AP6
IFPB_TXD4_N
AP5
IFPB_TXD5
AM7
IFPB_TXD5_N
AL7
IFPB_TXD6
AN8
IFPB_TXD6_N
AM8
IFPB_TXD7
AK8
IFPB_TXD7_N
AL8
IFPC_L0
AK1
IFPC_L0_N
AJ1
IFPC_L1
AJ3
IFPC_L1_N
AJ2
IFPC_L2
AH3
IFPC_L2_N
AH4
IFPC_L3
AG5
IFPC_L3_N
AG4
IFPD_L0
AM1
IFPD_L0_N
AM2
IFPD_L1
AM3
IFPD_L1_N
AM4
NC V32
IFPD_L2_N
AL4
IFPD_L3_N
AK5
IFPD_L2
AL3
IFPD_L3
AK4
IFPE_L0
AD2
IFPE_L0_N
AD3
IFPE_L1
AD1
IFPE_L1_N
AC1
IFPE_L2
AC2
IFPE_L2_N
AC3
IFPE_L3
AC4
IFPE_L3_N
AC5
IFPF_L0
AE3
IFPF_L0_N
AE4
IFPF_L1
AF4
IFPF_L1_N
AF5
IFPF_L2
AD4
IFPF_L2_N
AD5
IFPF_L3
AG1
IFPF_L3_N
AF1
STRAP0 J2
STRAP1 J7
STRAP2 J6
CEC L3
THERMDP K3
THERMDN K4
ROM_CS_N H6
ROM_SI H5
ROM_SO H7
ROM_SCLK H4
IFPF_AUX_I2CZ_SCL
AF3
IFPF_AUX_I2CZ_SDA_N
AF2
IFPE_AUX_I2CY_SCL
AB3
IFPE_AUX_I2CY_SDA_N
AB4
IFPD_AUX_I2CX_SCL
AK3
IFPD_AUX_I2CX_SDA_N
AK2
IFPC_AUX_I2CW_SCL
AG3
IFPC_AUX_I2CW_SDA_N
AG2
VDD_SENSE L4
GND_SENSE L5
BUFRST_N L2
MULTI_STRAP_REF0_GND J1
TESTMODE AK11
JTAG_TCK AM10
JTAG_TDI AM11
JTAG_TDO AP12
JTAG_TMS AP11
JTAG_TRST_N AN11
STRAP3 J5
STRAP4 J3
RV78
10K_0402_1%
N13PGS@
RV78
10K_0402_1%
N13PGS@ 12
RV89
10K_0402_1%
N13PGL@
RV89
10K_0402_1%
N13PGL@12
RV86 10K_0402_5%N13PGL@
RV86 10K_0402_5%N13PGL@
1 2
RV82 10K_0402_5%RV82 10K_0402_5%
1 2
RV77
34.8K_0402_1%
@
RV77
34.8K_0402_1%
@12
RV65
4.99K_0402_1%
@
RV65
4.99K_0402_1%
@12
RV70
4.99K_0402_1%
N13PGS@
RV70
4.99K_0402_1%
N13PGS@
12
RV81 0_0402_5%RV81 0_0402_5%
1 2
RV73
45.3K_0402_1%
N13PGL@
RV73
45.3K_0402_1%
N13PGL@ 12
RV17
100_0402_1%
RV17
100_0402_1%
12
RV54
15K_0402_1%
N13PGS@
RV54
15K_0402_1%
N13PGS@
1 2
RV72
4.99K_0402_1%
@
RV72
4.99K_0402_1%
@12
RV98
4.99K_0402_1%
GSDIS@
RV98
4.99K_0402_1%
GSDIS@
12
RV15
100_0402_1%
RV15
100_0402_1%
1 2
RV68
10K_0402_1%
@
RV68
10K_0402_1%
@12
TV1
PAD @
TV1
PAD @
RV152 4.7K_0402_5%
DHDMI@
RV152 4.7K_0402_5%
DHDMI@
1 2
RV75
4.99K_0402_1%
GSOPT@
RV75
4.99K_0402_1%
GSOPT@
12
RV85 10K_0402_5%@RV85 10K_0402_5%@
1 2
RV69
4.99K_0402_1%
@
RV69
4.99K_0402_1%
@12
RV84 10K_0402_5%RV84 10K_0402_5%
1 2
TV2
PAD @
TV2
PAD @
TV4
PAD @
TV4
PAD @
RV64
45.3K_0402_1%
RV64
45.3K_0402_1%
12
RV73
4.99K_0402_1%
N13PGS@
RV73
4.99K_0402_1%
N13PGS@
RV53
15K_0402_1%
N13PGL@
RV53
15K_0402_1%
N13PGL@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VDD33
+PEX_PLLVDD
FB_CAL_PD_VDDQ
FB_CAL_PU_GND
FB_CAL_TERM_GND
+IFPAB_IOVDD
+IFPEF_PLLVDD
+IFPEF_IOVDD
+IFPAB_PLLVDD
+IFPC_IOVDD
+IFPC_PLLVDD
+IFPD_IOVDD
+IFPD_PLLVDD
+IFPAB_IOVDD
+PEX_PLL_HVDD
+IFPEF_PLLVDD
+IFPEF_IOVDD
+IFPD_PLLVDD
+IFPD_IOVDD
+IFPC_PLLVDD
+IFPC_IOVDD
+IFPAB_PLLVDD
+1.05VS_DGPU
+1.05VS_DGPU
+3VS_DGPU
+1.05VS_DGPU
+3VS_DGPU
+3VS_DGPU
+1.05VS_DGPU
+VRAM_1.5VS
+VRAM_1.5VS +3VS_DGPU
+IFPEF_IOVDD
+1.05VS_DGPU
+IFPEF_PLLVDD
+IFPD_PLLVDD
+IFPD_IOVDD
+IFPC_PLLVDD
+IFPC_IOVDD
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
Custom
16 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
Custom
16 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
Custom
16 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
210mA
85mA
3300mA
CV80,CV198 Under GPU
close to ball
Near GPU
Near GPU
total 6600mA
Design guide page.74
PCIE2.0 N13P-GL N13M-GS
PCIE3.0 N13P-GS/GT N13E-GE
125mA
Under GPU
Near GPU
Near GPU
Near GPU
230mA
210mA
Under GPU
Under GPU
Under GPU
Under GPU
Under GPU
570mA
200mA
midway between GPU
and Power supply
midway between GPU
and Power supply
Near GPU
Under GPU
Near GPU
Under GPU
Near GPU
7200 mA 3300 mA
150mA
85mA
125mA
115mA
100mA
72mA
200mA
144mA
420mA
4019HG
CV234
0.1U_0402_10V7K
DHDMI@
CV234
0.1U_0402_10V7K
DHDMI@
1
2
CV83
10U_0603_6.3V6M
CV83
10U_0603_6.3V6M
1
2
CV287
0.1U_0402_10V7K
DHDMI@
CV287
0.1U_0402_10V7K
DHDMI@
1
2
CV78
22U_0805_6.3V6M
CV78
22U_0805_6.3V6M
1
2
CV282
1U_0402_6.3V6K
DHDMI@
CV282
1U_0402_6.3V6K
DHDMI@
1
2
CV283
4.7U_0603_6.3V6K
DHDMI@
CV283
4.7U_0603_6.3V6K
DHDMI@
1
2
RV90 1K_0402_5%@RV90 1K_0402_5%@
1 2
CV92
0.1U_0402_10V7K
CV92
0.1U_0402_10V7K
1
2
CV71
0.1U_0402_10V7K
CV71
0.1U_0402_10V7K
1
2
CV68
22U_0805_6.3V6M
CV68
22U_0805_6.3V6M
1
2
CV77
10U_0603_6.3V6M
CV77
10U_0603_6.3V6M
1
2
CV67
10U_0603_6.3V6M
CV67
10U_0603_6.3V6M
1
2
CV85
22U_0805_6.3V6M
@CV85
22U_0805_6.3V6M
@
1
2
LV14
BLM18PG181SN1D_2P
DIS@
LV14
BLM18PG181SN1D_2P
DIS@
12
CV96
1U_0402_6.3V6K
CV96
1U_0402_6.3V6K
1
2
CV104
1U_0402_6.3V6K
DIS@ CV104
1U_0402_6.3V6K
DIS@
1
2
CV231
22U_0805_6.3V6M
@CV231
22U_0805_6.3V6M
@
1
2
LV6
4.3_0603_5%
DIS@
LV6
4.3_0603_5%
DIS@
12
CV100
4.7U_0603_6.3V6K
DIS@ CV100
4.7U_0603_6.3V6K
DIS@
1
2
CV74
1U_0402_6.3V6K
CV74
1U_0402_6.3V6K
1
2
CV58
10U_0603_6.3V6M
CV58
10U_0603_6.3V6M
1
2
CV234
10K_0402_5%
IHDMI@
CV234
10K_0402_5%
IHDMI@
CV101
1U_0402_6.3V6K
DIS@ CV101
1U_0402_6.3V6K
DIS@
1
2
Part 5 of 7
POWER
UV4E
N13P-PES-A2_FCBGA908
N13PGSR1@
Part 5 of 7
POWER
UV4E
N13P-PES-A2_FCBGA908
N13PGSR1@
PEX_IOVDDQ_0 AG13
PEX_IOVDDQ_1 AG15
PEX_IOVDDQ_2 AG16
PEX_IOVDDQ_3 AG18
PEX_IOVDDQ_4 AG25
PEX_IOVDDQ_5 AH15
PEX_IOVDDQ_6 AH18
PEX_IOVDDQ_7 AH26
PEX_IOVDDQ_8 AH27
PEX_IOVDDQ_9 AJ27
PEX_IOVDDQ_10 AK27
PEX_IOVDDQ_11 AL27
PEX_IOVDDQ_12 AM28
PEX_IOVDDQ_13 AN28
PEX_IOVDD_0 AG19
PEX_IOVDD_1 AG21
PEX_IOVDD_2 AG22
PEX_IOVDD_3 AG24
PEX_IOVDD_4 AH21
PEX_SVDD_3V3 AG12
VDD33_0 J8
VDD33_1 K8
VDD33_2 L8
VDD33_3 M8
PEX_PLL_HVDD AH12
FBVDDQ_0
AA27
FBVDDQ_1
AA30
FBVDDQ_2
AB27
FBVDDQ_3
AB33
FBVDDQ_4
AC27
FBVDDQ_5
AD27
FBVDDQ_6
AE27
FBVDDQ_7
AF27
FBVDDQ_8
AG27
FBVDDQ_9
B13
FBVDDQ_10
B16
FBVDDQ_11
B19
FBVDDQ_12
E13
FBVDDQ_13
E16
FBVDDQ_14
E19
FBVDDQ_15
H10
FBVDDQ_16
H11
FBVDDQ_17
H12
FBVDDQ_18
H13
FBVDDQ_19
H14
FBVDDQ_20
H15
FBVDDQ_21
H16
FBVDDQ_22
H18
FBVDDQ_23
H19
FBVDDQ_24
H20
FBVDDQ_25
H21
FBVDDQ_26
H22
FBVDDQ_27
H23
FBVDDQ_28
H24
FBVDDQ_29
H8
FBVDDQ_30
H9
FBVDDQ_31
L27
FBVDDQ_32
M27
FBVDDQ_33
N27
FBVDDQ_34
P27
FBVDDQ_35
R27
FBVDDQ_36
T27
FBVDDQ_37
T30
FBVDDQ_38
T33
FBVDDQ_39
V27
FBVDDQ_40
W27
FBVDDQ_41
W30
FBVDDQ_42
W33
FBVDDQ_43
Y27
PEX_IOVDD_5 AH25
PEX_PLLVDD AG26
IFPA_IOVDD AG8
IFPB_IOVDD AG9
IFPAB_PLLVDD AH8
IFPAB_RSET AJ8
IFPC_IOVDD AF6
IFPC_PLLVDD AF7
IFPC_RSET AF8
IFPD_IOVDD AG6
IFPD_PLLVDD AG7
IFPD_RSET AN2
IFPE_IOVDD AC7
IFPEF_PLVDD AB8
IFPEF_RSET AD6
IFPF_IOVDD AC8
FB_VDDQ_SENSE
F1
FB_GND_SENSE
F2
FB_CAL_PD_VDDQ
J27
FB_CAL_PU_GND
H27
FB_CAL_TERM_GND
H25
CV59
22U_0805_6.3V6M
CV59
22U_0805_6.3V6M
1
2
CV89
4.7U_0603_6.3V6K
CV89
4.7U_0603_6.3V6K
1
2
CV75
1U_0402_6.3V6K
CV75
1U_0402_6.3V6K
1
2
CV300
0.1U_0402_10V7K
DHDMI@
CV300
0.1U_0402_10V7K
DHDMI@
1
2
RV298
10K_0402_5%
RV298
10K_0402_5%
1 2
CV73
0.1U_0402_10V7K
CV73
0.1U_0402_10V7K
1
2
RV101
0_0603_5%
N13PGS@
RV101
0_0603_5%
N13PGS@ 12
RV297
10K_0402_5%
RV297
10K_0402_5%
1 2
CV232
0.1U_0402_10V7K
DIS@ CV232
0.1U_0402_10V7K
DIS@
1
2
RV296
10K_0402_5%
RV296
10K_0402_5%
1 2
RV96 40.2_0402_1%RV96 40.2_0402_1%
12
CV236
4.7U_0603_6.3V6K
DHDMI@
CV236
4.7U_0603_6.3V6K
DHDMI@
1
2
CV286
10K_0402_5%
IHDMI@
CV286
10K_0402_5%
IHDMI@
CV286
0.1U_0402_10V7K
DHDMI@
CV286
0.1U_0402_10V7K
DHDMI@
1
2
LV7
BLM18PG121SN1D_0603
N13PGL@
LV7
BLM18PG121SN1D_0603
N13PGL@
12
CV56
4.7U_0603_6.3V6K
CV56
4.7U_0603_6.3V6K
1
2
CV101
10K_0402_5%
OPT@
CV101
10K_0402_5%
OPT@
CV72
0.1U_0402_10V7K
CV72
0.1U_0402_10V7K
1
2
CV95
0.1U_0402_10V7K
CV95
0.1U_0402_10V7K
1
2
LV9
MBK1608221YZF_2P
DHDMI@
LV9
MBK1608221YZF_2P
DHDMI@
1 2
CV97
4.7U_0603_6.3V6K
CV97
4.7U_0603_6.3V6K
1
2
CV82
4.7U_0603_6.3V6K
CV82
4.7U_0603_6.3V6K
1
2
CV103
4.7U_0603_6.3V6K
DIS@ CV103
4.7U_0603_6.3V6K
DIS@
1
2
CV299
0.1U_0402_10V7K
DHDMI@
CV299
0.1U_0402_10V7K
DHDMI@
1
2
CV57
10U_0603_6.3V6M
CV57
10U_0603_6.3V6M
1
2
CV66
0.1U_0402_10V7K
CV66
0.1U_0402_10V7K
1
2
CV79
0.1U_0402_10V7K
CV79
0.1U_0402_10V7K
1
2
CV102
0.1U_0402_10V7K
DIS@ CV102
0.1U_0402_10V7K
DIS@
1
2
CV88
1U_0402_6.3V6K
CV88
1U_0402_6.3V6K
1
2
CV243
10U_0603_6.3V6M
CV243
10U_0603_6.3V6M
1
2
RV609 51.1_0402_1%RV609 51.1_0402_1%
1 2
CV91
0.1U_0402_10V7K
CV91
0.1U_0402_10V7K
1
2
CV54
1U_0402_6.3V6K
CV54
1U_0402_6.3V6K
1
2
LV8
MMZ1608D301BT_0603
DHDMI@
LV8
MMZ1608D301BT_0603
DHDMI@
1 2
CV244
10U_0603_6.3V6M
CV244
10U_0603_6.3V6M
1
2
CV64
0.1U_0402_10V7K
CV64
0.1U_0402_10V7K
1
2
CV62
1U_0402_6.3V6K
CV62
1U_0402_6.3V6K
1
2
CV284
0.1U_0402_10V7K
DHDMI@
CV284
0.1U_0402_10V7K
DHDMI@
1
2
CV104
10K_0402_5%
OPT@
CV104
10K_0402_5%
OPT@
CV76
4.7U_0603_6.3V6K
CV76
4.7U_0603_6.3V6K
1
2
CV61
4.7U_0603_6.3V6K
CV61
4.7U_0603_6.3V6K
1
2
CV281
4.7U_0603_6.3V6K
DHDMI@
CV281
4.7U_0603_6.3V6K
DHDMI@
1
2
CV235
1U_0402_6.3V6K
DHDMI@
CV235
1U_0402_6.3V6K
DHDMI@
1
2
CV81
4.7U_0603_6.3V6K
CV81
4.7U_0603_6.3V6K
1
2
RV295
10K_0402_5%
RV295
10K_0402_5%
1 2
CV80 0.1U_0402_10V7KCV80 0.1U_0402_10V7K
1 2
CV60
22U_0805_6.3V6M
CV60
22U_0805_6.3V6M
1
2
CV69
4.7U_0603_6.3V6K
CV69
4.7U_0603_6.3V6K
1
2
CV70
1U_0402_6.3V6K
CV70
1U_0402_6.3V6K
1
2
CV55
1U_0402_6.3V6K
CV55
1U_0402_6.3V6K
1
2
CV285
0.1U_0402_10V7K
DHDMI@
CV285
0.1U_0402_10V7K
DHDMI@
1
2
CV63
0.1U_0402_10V7K
CV63
0.1U_0402_10V7K
1
2
CV90
0.1U_0402_10V7K
CV90
0.1U_0402_10V7K
1
2
CV65
0.1U_0402_10V7K
CV65
0.1U_0402_10V7K
1
2
RV605 42.2_0402_1%RV605 42.2_0402_1%
1 2
RV103 1K_0402_5%
DHDMI@
RV103 1K_0402_5%
DHDMI@
1 2
CV84
10U_0603_6.3V6M
CV84
10U_0603_6.3V6M
1
2
CV106
0.1U_0402_10V7K
DIS@ CV106
0.1U_0402_10V7K
DIS@
1
2
CV237
4.7U_0603_6.3V6K
DHDMI@
CV237
4.7U_0603_6.3V6K
DHDMI@
1
2
CV198 0.1U_0402_10V7KCV198 0.1U_0402_10V7K
1 2
CV87
0.1U_0402_10V7K
CV87
0.1U_0402_10V7K
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VGA_CORE+VGA_CORE
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
Custom
17 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
Custom
17 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
Custom
17 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
50A
VGA_CORE cap. ought to power pate
4019HG
POWER
Part 7 of 7
UV4G
N13P-PES-A2_FCBGA908
N13PGSR1@
POWER
Part 7 of 7
UV4G
N13P-PES-A2_FCBGA908
N13PGSR1@
VDD_0
AA12
VDD_1
AA14
VDD_2
AA16
VDD_3
AA19
VDD_4
AA21
VDD_5
AA23
VDD_6
AB13
VDD_7
AB15
VDD_8
AB17
VDD_9
AB18
VDD_10
AB20
VDD_11
AB22
VDD_12
AC12
VDD_13
AC14
VDD_14
AC16
VDD_15
AC19
VDD_16
AC21
VDD_17
AC23
VDD_18
M12
VDD_19
M14
VDD_20
M16
VDD_21
M19
VDD_22
M21
VDD_23
M23
VDD_24
N13
VDD_25
N15
VDD_26
N17
VDD_27
N18
VDD_28
N20
VDD_29
N22
VDD_30
P12
VDD_31
P14
VDD_32
P16
VDD_33
P19
VDD_34
P21
VDD_35
P23
VDD_36
R13
VDD_37
R15
VDD_38
R17
VDD_39
R18
VDD_40
R20
VDD_41
R22
VDD_42
T12
VDD_43
T14
VDD_44
T16
VDD_45
T19
VDD_46
T21
VDD_47
T23
VDD_48
U13
VDD_49
U15
VDD_50
U17
VDD_51
U18
VDD_52
U20
VDD_53
U22
VDD_54
V13
VDD_55
V15
VDD_58 V20
VDD_59 V22
VDD_60 W12
VDD_61 W14
VDD_62 W16
VDD_63 W19
VDD_64 W21
VDD_65 W23
VDD_66 Y13
VDD_67 Y15
VDD_68 Y17
VDD_69 Y18
VDD_70 Y20
VDD_71 Y22
VDD_56 V17
VDD_57 V18
XVDD_1 U1
XVDD_2 U2
XVDD_3 U3
XVDD_4 U4
XVDD_5 U5
XVDD_6 U6
XVDD_7 U7
XVDD_8 U8
XVDD_9 V1
XVDD_10 V2
XVDD_11 V3
XVDD_12 V4
XVDD_13 V5
XVDD_14 V6
XVDD_15 V7
XVDD_16 V8
XVDD_17 W2
XVDD_18 W3
XVDD_19 W4
XVDD_20 W5
XVDD_21 W7
XVDD_22 W8
XVDD_23 Y1
XVDD_24 Y2
XVDD_25 Y3
XVDD_26 Y4
XVDD_27 Y5
XVDD_28 Y6
XVDD_29 Y7
XVDD_30 Y8
XVDD_31 AA1
XVDD_32 AA2
XVDD_33 AA3
XVDD_34 AA4
XVDD_35 AA5
XVDD_36 AA6
XVDD_37 AA7
XVDD_38 AA8
GND
Part 6 of 7
UV4F
N13P-PES-A2_FCBGA908
N13PGSR1@
GND
Part 6 of 7
UV4F
N13P-PES-A2_FCBGA908
N13PGSR1@
GND_0
A2
GND_1
AA17
GND_2
AA18
GND_3
AA20
GND_4
AA22
GND_5
AB12
GND_6
AB14
GND_7
AB16
GND_8
AB19
GND_9
AB2
GND_10
AB21
GND_11
A33
GND_12
AB23
GND_13
AB28
GND_14
AB30
GND_15
AB32
GND_16
AB5
GND_17
AB7
GND_18
AC13
GND_19
AC15
GND_20
AC17
GND_21
AC18
GND_22
AA13
GND_23
AC20
GND_24
AC22
GND_25
AE2
GND_26
AE28
GND_27
AE30
GND_28
AE32
GND_29
AE33
GND_30
AE5
GND_31
AE7
GND_32
AH10
GND_33
AA15
GND_34
AH13
GND_35
AH16
GND_36
AH19
GND_37
AH2
GND_38
AH22
GND_39
AH24
GND_40
AH28
GND_41
AH29
GND_42
AH30
GND_43
AH32
GND_44
AH33
GND_45
AH5
GND_46
AH7
GND_47
AJ7
GND_48
AK10
GND_49
AK7
GND_50
AL12
GND_51
AL14
GND_52
AL15
GND_53
AL17
GND_54
AL18
GND_55
AL2
GND_56
AL20
GND_57
AL21
GND_58
AL23
GND_59
AL24
GND_60
AL26
GND_61
AL28
GND_62
AL30
GND_63
AL32
GND_64
AL33
GND_65
AL5
GND_66
AM13
GND_67
AM16
GND_68
AM19
GND_69
AM22
GND_70
AM25
GND_71
AN1
GND_72
AN10
GND_73
AN13
GND_74
AN16
GND_75
AN19
GND_76
AN22
GND_77
AN25
GND_78
AN30
GND_79
AN34
GND_80
AN4
GND_81
AN7
GND_82
AP2
GND_83
AP33
GND_84
B1
GND_85
B10
GND_86
B22
GND_87
B25
GND_88
B28
GND_89
B31
GND_90
B34
GND_91
B4
GND_92
B7
GND_93
C10
GND_94
C13
GND_95
C19
GND_96
C22
GND_97
C25
GND_98
C28
GND_99
C7
GND_100 D2
GND_101 D31
GND_102 D33
GND_103 E10
GND_104 E22
GND_105 E25
GND_106 E5
GND_107 E7
GND_108 F28
GND_109 F7
GND_110 G10
GND_111 G13
GND_112 G16
GND_113 G19
GND_114 G2
GND_115 G22
GND_116 G25
GND_117 G28
GND_118 G3
GND_119 G30
GND_120 G32
GND_121 G33
GND_122 G5
GND_123 G7
GND_124 K2
GND_125 K28
GND_126 K30
GND_127 K32
GND_128 K33
GND_129 K5
GND_130 K7
GND_131 M13
GND_132 M15
GND_133 M17
GND_134 M18
GND_135 M20
GND_136 M22
GND_137 N12
GND_138 N14
GND_139 N16
GND_140 N19
GND_141 N2
GND_142 N21
GND_143 N23
GND_144 N28
GND_145 N30
GND_146 N32
GND_147 N33
GND_148 N5
GND_149 N7
GND_150 P13
GND_151 P15
GND_152 P17
GND_153 P18
GND_154 P20
GND_155 P22
GND_156 R12
GND_157 R14
GND_158 R16
GND_159 R19
GND_160 R21
GND_161 R23
GND_162 T13
GND_163 T15
GND_164 T17
GND_165 T18
GND_166 T2
GND_167 T20
GND_168 T22
GND_169 AG11
GND_170 T28
GND_171 T32
GND_172 T5
GND_173 T7
GND_174 U12
GND_175 U14
GND_176 U16
GND_177 U19
GND_178 U21
GND_179 U23
GND_180 V12
GND_181 V14
GND_182 V16
GND_183 V19
GND_184 V21
GND_185 V23
GND_186 W13
GND_187 W15
GND_188 W17
GND_189 W18
GND_190 W20
GND_191 W22
GND_192 W28
GND_193 Y12
GND_194 Y14
GND_195 Y16
GND_196 Y19
GND_197 Y21
GND_198 Y23
GND_199 AH11
GND_OPT C16
GND_OPT W32
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DQSA#[7..0]
MDA[63..0]
CMDA[30..0]
DQMA[7..0]
DQSA[7..0]
ZQ2
CLKA1#
CLKA1 CLKA1#
CLKA1
ZQ3
CMDA19
CMDA5
CMDA24
CMDA10
CMDA11
CMDA14
CMDA6
CMDA26
CMDA25
CMDA29
CMDA27
CMDA22
CMDA12
CMDA8
CMDA9
CMDA20
CMDA4
CMDA7
CMDA28
CMDA21
CMDA23
CMDA19
CMDA30
CMDA18
CMDA15
CMDA13
CMDA5
CMDA16
CMDA24
CMDA10
CMDA11
CMDA14
CMDA6
CMDA25
CMDA29
CMDA22
CMDA8
CMDA9
CMDA20
CMDA4
CMDA7
CMDA28
CMDA21
CMDA23
CMDA26
CMDA27
CMDA12
CMDA30
CMDA18
CMDA15
CMDA13
CMDA16
DQSA4
DQSA#4
DQMA6
DQSA6
DQSA#6
DQMA4
MDA32
MDA39
MDA38
MDA36
MDA34
MDA37
MDA33
MDA35
MDA49
MDA48
MDA50
MDA55
MDA51
MDA52
MDA53
MDA54
DQMA5
DQSA#5
DQSA5
DQSA7
DQMA7
DQSA#7
MDA58
MDA60
MDA61
MDA62
MDA63
MDA59
MDA56
MDA57
MDA42
MDA46
MDA47
MDA44
MDA40
MDA43
MDA41
MDA45
+MEM_VREF_CA1
+MEM_VREF_DQ1
+MEM_VREF_CA1
+MEM_VREF_DQ1 +MEM_VREF_CA1
+MEM_VREF_DQ1
DQSA#[7..0]<14,19>
DQSA[7..0]<14,19>
MDA[63..0]<14,19>
DQMA[7..0]<14,19>
CMDA[30..0]<14,19>
CLKA1<14>
CLKA1#<14>
+VRAM_1.5VS
+VRAM_1.5VS
+VRAM_1.5VS
+VRAM_1.5VS
+VRAM_1.5VS
+VRAM_1.5VS
+VRAM_1.5VS +VRAM_1.5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
Custom
18 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
Custom
18 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
Custom
18 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
310mA 310mA
64Mx16 DDR3 *8==>1GB
VRAM DDR3 chips (1GB)
Not Available
A7
A14
RST
A14
A13
A15
LOW HIGH
CMD22
CMD23
CMD30
CMD24
CMD25
CMD26
CMD27
CMD28
CMD29
CMD15
Mode D
Address
32..63
CMD0
CMD1
CMD2
CMD3
CMD4
CMD5
CMD6
0..31
CMD7
CMD8
CMD9
CMD10
CMD11
CMD12
CMD13
CMD14
CMD16
CMD17
CMD18
CMD19
CMD20
CMD21 A8
A11
CAS*
A3
A1
WE*
BA0
A4
BA2
A5
RAS*
A12
A5
BA1
ODT_H
A11
A10
CAS*
WE*
A9
BA0
A6
A12
ODT_L
CKE_H
A7
RAS*
A13
BA2
BA1
A2
A0
A4
A9
A3
A1
CS0_H#
A2
A0
A15
CS0_L#
A10
A8
A6
RST
CKE
Group4
Group6Group7
Group5
4019HG
CV288
1U_0402_6.3V6K
CV288
1U_0402_6.3V6K
1
2
RV123
243_0402_1%
RV123
243_0402_1%
12
RV119
1K_0402_1%
RV119
1K_0402_1%
12
CV142
0.1U_0402_10V7K
CV142
0.1U_0402_10V7K
1
2
CV143
0.1U_0402_10V7K
CV143
0.1U_0402_10V7K
1
2
CV138
0.1U_0402_10V7K
CV138
0.1U_0402_10V7K
1
2
CV260
1U_0402_6.3V6K
CV260
1U_0402_6.3V6K
1
2
CV256
1U_0402_6.3V6K
CV256
1U_0402_6.3V6K
1
2
96-BALL
SDRAM DDR3
UV11
K4B1G1646E-HC12_FBGA96
@
96-BALL
SDRAM DDR3
UV11
K4B1G1646E-HC12_FBGA96
@
WE
L3
RAS
J3
CAS
K3
CS/CS0
L2
CKE/CKE0
K9
CK
J7
CK
K7
DQSU
B7
BA0
M2
BA1
N8
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
VSSQ D1
VSS A9
VSS E1
VSS B3
NC/ODT1
J1
VDD B2
VDD D9
VDDQ A1
VDDQ A8
VDDQ C1
VDDQ C9
NC/CS1
L1
NC/CE1
J9
VDDQ E9
ZQ/ZQ0
L8
RESET
T2
DQSL
F3
DMU
D3 DML
E7
VSSQ B1
VSSQ B9
VSSQ D8
VSSQ E2
DQSU
C7
VSSQ E8
DQSL
G3
VDDQ F1
VSSQ F9
VSSQ G1
VDDQ H2
VDDQ H9
VSSQ G9
VREFCA
M8
VSS G8
VDD G7
ODT/ODT0
K1
A0
N3
A1
P7
VDD K2
A12
N7
VSS J2
VDD K8
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
DQU0 D7
A13
T3
A14
T7
A15/BA3
M7
BA2
M3
VREFDQ
H1
NCZQ1
L9
VDD N1
VDD N9
VDD R1
VDD R9
VSS J8
VSS M1
VSS M9
VSS P1
VSS P9
VSS T1
VSS T9
VDDQ D2
CV137
0.1U_0402_10V7K
CV137
0.1U_0402_10V7K
1
2
CV255
1U_0402_6.3V6K
CV255
1U_0402_6.3V6K
1
2
CV140
0.1U_0402_10V7K
CV140
0.1U_0402_10V7K
1
2
CV139
0.1U_0402_10V7K
CV139
0.1U_0402_10V7K
1
2
CV278
1U_0402_6.3V6K
CV278
1U_0402_6.3V6K
1
2
RV108
1K_0402_1%
RV108
1K_0402_1%
12
CV230
0.01U_0402_25V7K
CV230
0.01U_0402_25V7K
1
2
RV124
243_0402_1%
RV124
243_0402_1%
12
CV277
1U_0402_6.3V6K
CV277
1U_0402_6.3V6K
1
2
RV107
1K_0402_1%
RV107
1K_0402_1%
12
CV279
1U_0402_6.3V6K
CV279
1U_0402_6.3V6K
1
2
CV258
1U_0402_6.3V6K
CV258
1U_0402_6.3V6K
1
2
CV275
1U_0402_6.3V6K
CV275
1U_0402_6.3V6K
1
2
CV238
10U_0603_6.3V6M
CV238
10U_0603_6.3V6M
1
2
CV141
0.1U_0402_10V7K
CV141
0.1U_0402_10V7K
1
2
CV259
1U_0402_6.3V6K
CV259
1U_0402_6.3V6K
1
2
CV301
0.01U_0402_25V7K
CV301
0.01U_0402_25V7K
1
2
RV126
160_0402_1%
RV126
160_0402_1%
12
CV257
1U_0402_6.3V6K
CV257
1U_0402_6.3V6K
1
2
CV280
1U_0402_6.3V6K
CV280
1U_0402_6.3V6K
1
2
RV106
1K_0402_1%
RV106
1K_0402_1%
12
96-BALL
SDRAM DDR3
UV10
K4B1G1646E-HC12_FBGA96
@
96-BALL
SDRAM DDR3
UV10
K4B1G1646E-HC12_FBGA96
@
WE
L3
RAS
J3
CAS
K3
CS/CS0
L2
CKE/CKE0
K9
CK
J7
CK
K7
DQSU
B7
BA0
M2
BA1
N8
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
VSSQ D1
VSS A9
VSS E1
VSS B3
NC/ODT1
J1
VDD B2
VDD D9
VDDQ A1
VDDQ A8
VDDQ C1
VDDQ C9
NC/CS1
L1
NC/CE1
J9
VDDQ E9
ZQ/ZQ0
L8
RESET
T2
DQSL
F3
DMU
D3 DML
E7
VSSQ B1
VSSQ B9
VSSQ D8
VSSQ E2
DQSU
C7
VSSQ E8
DQSL
G3
VDDQ F1
VSSQ F9
VSSQ G1
VDDQ H2
VDDQ H9
VSSQ G9
VREFCA
M8
VSS G8
VDD G7
ODT/ODT0
K1
A0
N3
A1
P7
VDD K2
A12
N7
VSS J2
VDD K8
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
DQU0 D7
A13
T3
A14
T7
A15/BA3
M7
BA2
M3
VREFDQ
H1
NCZQ1
L9
VDD N1
VDD N9
VDD R1
VDD R9
VSS J8
VSS M1
VSS M9
VSS P1
VSS P9
VSS T1
VSS T9
VDDQ D2
CV276
1U_0402_6.3V6K
CV276
1U_0402_6.3V6K
1
2
CV144
0.1U_0402_10V7K
CV144
0.1U_0402_10V7K
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MDA[63..0]
DQMA[7..0]
DQSA[7..0]
DQSA#[7..0]
CMDA[30..0]
CLKA0#
CLKA0
CMDA2
CMDA3
CMDA5
CMDA18
CMDA19
CLKA0
CLKA0#
DQMA0
DQSA0
DQSA#0
DQSA3
DQMA3
DQSA#3
CMDA5
CMDA3
CMDA5
CMDA11
CMDA8
CMDA7
CMDA29
CMDA14
CMDA28
CMDA9
CMDA25
CMDA24
CMDA21
CMDA4
CMDA20
CMDA10
CMDA22
CMDA6
CMDA23
CMDA12
CMDA27
CMDA26
CMDA3
CMDA2
CMDA13
CMDA15
CMDA30
CMDA0
+MEM_VREF_CA0
ZQ1ZQ0
CMDA11
CMDA8
CMDA7
CMDA29
CMDA14
CMDA28
CMDA25
CMDA9
CMDA24
CMDA21
CMDA4
CMDA20
CMDA10
CMDA22
CMDA6
CMDA23
CMDA12
CMDA27
CMDA26
CMDA13
CMDA15
CMDA30
CMDA0
CMDA2
MDA0
MDA3
MDA4
MDA2
MDA5
MDA1
MDA7
MDA6
DQSA1
DQSA2
DQMA1
DQMA2
DQSA#1
DQSA#2
MDA17
MDA23
MDA16
MDA21
MDA19
MDA22
MDA20
MDA18
MDA24
MDA26
MDA27
MDA28
MDA31
MDA29
MDA25
MDA30
MDA9
MDA10
MDA15
MDA14
MDA11
MDA12
MDA8
MDA13
+MEM_VREF_CA0
+MEM_VREF_DQ0
+MEM_VREF_DQ0 +MEM_VREF_CA0
+MEM_VREF_DQ0
DQSA[7..0]<14,18>
DQSA#[7..0]<14,18>
DQMA[7..0]<14,18>
MDA[63..0]<14,18>
CMDA[30..0]<14,18>
CLKA0#<14>
CLKA0<14>
+VRAM_1.5VS
+VRAM_1.5VS
+VRAM_1.5VS
+VRAM_1.5VS
+VRAM_1.5VS
+VRAM_1.5VS
+VRAM_1.5VS +VRAM_1.5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
SCHEMATICS, MB A8391
Custom
19 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
B
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
SCHEMATICS, MB A8391
Custom
19 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
B
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
SCHEMATICS, MB A8391
Custom
19 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
B
VRAM DDR3 chips (1GB)
310mA 310mA
64Mx16 DDR3 *8==>1GB
A7
A14
RST
A14
A13
A15
LOW HIGH
CMD22
CMD23
CMD30
CMD24
CMD25
CMD26
CMD27
CMD28
CMD29
CMD15
Mode D
Address
32..63
CMD0
CMD1
CMD2
CMD3
CMD4
CMD5
CMD6
CMD7
CMD8
CMD9
CMD10
CMD11
CMD12
CMD13
CMD14
CMD16
CMD17
CMD18
CMD19
CMD20
CMD21 A8
A11
CAS*
A3
A1
WE*
BA0
A4
BA2
A5
RAS*
A12
A5
BA1
ODT_H
A11
A10
CAS*
WE*
A9
BA0
A6
A12
ODT_L
CKE_H
A7
RAS*
A13
BA2
BA1
A2
A0
A4
A9
A3
A1
CS0_H#
A2
A0
A15
CS0_L#
A10
A8
A6
RST
DDR3
Command Bit Default Pull-down
ODTx 10k
CKEx 10k
RST 10k
CS* No Termination
0..31
Not Available
CKE
Group1
Group3
Group0
Group2
swap 0329
4019HG
RV63
1K_0402_1%
RV63
1K_0402_1%
12
CV240
10U_0603_6.3V6M
CV240
10U_0603_6.3V6M
1
2
CV151
0.1U_0402_10V7K
CV151
0.1U_0402_10V7K
1
2
RV114
160_0402_1%
RV114
160_0402_1%
12
RV62
1K_0402_1%
RV62
1K_0402_1%
12
CV310
1U_0402_6.3V6K
CV310
1U_0402_6.3V6K
1
2
RV105
1K_0402_1%
RV105
1K_0402_1%
12
CV313
1U_0402_6.3V6K
CV313
1U_0402_6.3V6K
1
2
CV241
10U_0603_6.3V6M
CV241
10U_0603_6.3V6M
1
2
RV88
1K_0402_1%
RV88
1K_0402_1%
12
CV261
1U_0402_6.3V6K
CV261
1U_0402_6.3V6K
1
2
96-BALL
SDRAM DDR3
UV8
K4B1G1646E-HC12_FBGA96
@
96-BALL
SDRAM DDR3
UV8
K4B1G1646E-HC12_FBGA96
@
WE
L3
RAS
J3
CAS
K3
CS/CS0
L2
CKE/CKE0
K9
CK
J7
CK
K7
DQSU
B7
BA0
M2
BA1
N8
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
VSSQ D1
VSS A9
VSS E1
VSS B3
NC/ODT1
J1
VDD B2
VDD D9
VDDQ A1
VDDQ A8
VDDQ C1
VDDQ C9
NC/CS1
L1
NC/CE1
J9
VDDQ E9
ZQ/ZQ0
L8
RESET
T2
DQSL
F3
DMU
D3 DML
E7
VSSQ B1
VSSQ B9
VSSQ D8
VSSQ E2
DQSU
C7
VSSQ E8
DQSL
G3
VDDQ F1
VSSQ F9
VSSQ G1
VDDQ H2
VDDQ H9
VSSQ G9
VREFCA
M8
VSS G8
VDD G7
ODT/ODT0
K1
A0
N3
A1
P7
VDD K2
A12
N7
VSS J2
VDD K8
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
DQU0 D7
A13
T3
A14
T7
A15/BA3
M7
BA2
M3
VREFDQ
H1
NCZQ1
L9
VDD N1
VDD N9
VDD R1
VDD R9
VSS J8
VSS M1
VSS M9
VSS P1
VSS P9
VSS T1
VSS T9
VDDQ D2
CV312
1U_0402_6.3V6K
CV312
1U_0402_6.3V6K
1
2
RV112 10K_0402_5%RV112 10K_0402_5%
1 2
96-BALL
SDRAM DDR3
UV9
K4B1G1646E-HC12_FBGA96
@
96-BALL
SDRAM DDR3
UV9
K4B1G1646E-HC12_FBGA96
@
WE
L3
RAS
J3
CAS
K3
CS/CS0
L2
CKE/CKE0
K9
CK
J7
CK
K7
DQSU
B7
BA0
M2
BA1
N8
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
VSSQ D1
VSS A9
VSS E1
VSS B3
NC/ODT1
J1
VDD B2
VDD D9
VDDQ A1
VDDQ A8
VDDQ C1
VDDQ C9
NC/CS1
L1
NC/CE1
J9
VDDQ E9
ZQ/ZQ0
L8
RESET
T2
DQSL
F3
DMU
D3 DML
E7
VSSQ B1
VSSQ B9
VSSQ D8
VSSQ E2
DQSU
C7
VSSQ E8
DQSL
G3
VDDQ F1
VSSQ F9
VSSQ G1
VDDQ H2
VDDQ H9
VSSQ G9
VREFCA
M8
VSS G8
VDD G7
ODT/ODT0
K1
A0
N3
A1
P7
VDD K2
A12
N7
VSS J2
VDD K8
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
DQU0 D7
A13
T3
A14
T7
A15/BA3
M7
BA2
M3
VREFDQ
H1
NCZQ1
L9
VDD N1
VDD N9
VDD R1
VDD R9
VSS J8
VSS M1
VSS M9
VSS P1
VSS P9
VSS T1
VSS T9
VDDQ D2
CV150
0.1U_0402_10V7K
CV150
0.1U_0402_10V7K
1
2
RV115 10K_0402_5%RV115 10K_0402_5%
1 2
CV311
1U_0402_6.3V6K
CV311
1U_0402_6.3V6K
1
2
RV117 10K_0402_5%RV117 10K_0402_5%
1 2
CV228
0.01U_0402_25V7K
CV228
0.01U_0402_25V7K
1
2
CV145
0.1U_0402_10V7K
CV145
0.1U_0402_10V7K
1
2
CV146
0.1U_0402_10V7K
CV146
0.1U_0402_10V7K
1
2
CV152
0.1U_0402_10V7K
CV152
0.1U_0402_10V7K
1
2
RV113 10K_0402_5%RV113 10K_0402_5%
1 2
CV262
1U_0402_6.3V6K
CV262
1U_0402_6.3V6K
1
2
RV111
243_0402_1%
RV111
243_0402_1%
12
RV110
243_0402_1%
RV110
243_0402_1%
12
CV229
0.01U_0402_25V7K
CV229
0.01U_0402_25V7K
1
2
CV147
0.1U_0402_10V7K
CV147
0.1U_0402_10V7K
1
2
CV149
0.1U_0402_10V7K
CV149
0.1U_0402_10V7K
1
2
RV116 10K_0402_5%RV116 10K_0402_5%
1 2
CV148
0.1U_0402_10V7K
CV148
0.1U_0402_10V7K
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLKC0#
CLKC0
CMDC[30..0]
MDC[63..0]
DQMC[7..0]
DQSC[7..0]
DQSC#[7..0]
DQSC#3
DQSC3
DQMC3
CLKC0
CLKC0#
DQMC0
DQSC0
DQSC#0
CMDC3
CMDC5
CMDC22
CMDC28
CMDC7
CMDC24
CMDC20
CMDC4
CMDC21
CMDC23
CMDC11
CMDC25
CMDC6
CMDC8
CMDC29
CMDC9
CMDC10
CMDC14
CMDC27
CMDC12
CMDC26
CMDC3
CMDC13
CMDC15
CMDC30
CMDC2
CMDC0
CMDC5
ZQ4 ZQ5
CMDC2
CMDC3
CMDC5
CMDC18
CMDC19
CMDC22
CMDC28
CMDC7
CMDC24
CMDC20
CMDC4
CMDC21
CMDC23
CMDC11
CMDC25
CMDC6
CMDC8
CMDC29
CMDC9
CMDC10
CMDC14
CMDC27
CMDC12
CMDC26
CMDC13
CMDC15
CMDC30
CMDC2
CMDC0
MDC7
MDC6
MDC3
MDC2
MDC0
MDC4
MDC5
MDC1
MDC30
MDC25
MDC24
MDC28
MDC26
MDC27
DQSC#2
DQSC#1
DQSC2
DQSC1
DQMC2
DQMC1
MDC21
MDC23
MDC18
MDC20
MDC19
MDC16
MDC22
MDC17 MDC31
MDC29
MDC11
MDC14
MDC15
MDC10
MDC13
MDC12
MDC8
MDC9
+MEM_VREF_CA2
+MEM_VREF_DQ2
+MEM_VREF_CA2
+MEM_VREF_DQ2 +MEM_VREF_CA2
+MEM_VREF_DQ2
DQSC[7..0]<14,21>
DQSC#[7..0]<14,21>
DQMC[7..0]<14,21>
MDC[63..0]<14,21>
CMDC[30..0]<14,21>
CLKC0#<14>
CLKC0<14>
+VRAM_1.5VS
+VRAM_1.5VS
+VRAM_1.5VS
+VRAM_1.5VS
+VRAM_1.5VS
+VRAM_1.5VS
+VRAM_1.5VS
+VRAM_1.5VS
+VRAM_1.5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
SCHEMATICS, MB A8391
Custom
20 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
B
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
SCHEMATICS, MB A8391
Custom
20 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
B
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
SCHEMATICS, MB A8391
Custom
20 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
B
310mA 310mA
64Mx16 DDR3 *8==>1GB
VRAM DDR3 chips (1GB)
10k
DDR3 CKEx
Command Bit Default Pull-down
10k
RST
ODTx
10k
CS* No Termination
Not Available
A7
A14
RST
A14
A13
A15
LOW HIGH
CMD22
CMD23
CMD30
CMD24
CMD25
CMD26
CMD27
CMD28
CMD29
CMD15
Mode D
Address
32..63
CMD0
CMD1
CMD2
CMD3
CMD4
CMD5
CMD6
0..31
CMD7
CMD8
CMD9
CMD10
CMD11
CMD12
CMD13
CMD14
CMD16
CMD17
CMD18
CMD19
CMD20
CMD21 A8
A11
CAS*
A3
A1
WE*
BA0
A4
BA2
A5
RAS*
A12
A5
BA1
ODT_H
A11
A10
CAS*
WE*
A9
BA0
A6
A12
ODT_L
CKE_H
A7
RAS*
A13
BA2
BA1
A2
A0
A4
A9
A3
A1
CS0_H#
A2
A0
A15
CS0_L#
A10
A8
A6
RST
CKE
Group0
Group3
Group1
Group2
swap 0329
4019HG
CV155
0.1U_0402_10V7K
CV155
0.1U_0402_10V7K
1
2
CV153
0.1U_0402_10V7K
CV153
0.1U_0402_10V7K
1
2
CV267
1U_0402_6.3V6K
CV267
1U_0402_6.3V6K
1
2
RV132
243_0402_1%
RV132
243_0402_1%
12
CV263
1U_0402_6.3V6K
CV263
1U_0402_6.3V6K
1
2
CV265
1U_0402_6.3V6K
CV265
1U_0402_6.3V6K
1
2
RV136 10K_0402_5%RV136 10K_0402_5%
1 2
CV266
1U_0402_6.3V6K
CV266
1U_0402_6.3V6K
1
2
RV138 10K_0402_5%RV138 10K_0402_5%
1 2
CV246
10U_0603_6.3V6M
CV246
10U_0603_6.3V6M
1
2
RV135 10K_0402_5%RV135 10K_0402_5%
1 2
CV302
0.01U_0402_25V7K
CV302
0.01U_0402_25V7K
1
2
RV137 10K_0402_5%RV137 10K_0402_5%
1 2
CV158
0.1U_0402_10V7K
CV158
0.1U_0402_10V7K
1
2
CV303
0.01U_0402_25V7K
CV303
0.01U_0402_25V7K
1
2
CV159
0.1U_0402_10V7K
CV159
0.1U_0402_10V7K
1
2
+
CV344 330U_B2_2.5VM_R15M
@
+
CV344 330U_B2_2.5VM_R15M
@1
2
RV120
1K_0402_1%
RV120
1K_0402_1%
12
CV160
0.1U_0402_10V7K
CV160
0.1U_0402_10V7K
1
2
RV140
160_0402_1%
RV140
160_0402_1%
12
96-BALL
SDRAM DDR3
UV12
K4B1G1646E-HC12_FBGA96
@
96-BALL
SDRAM DDR3
UV12
K4B1G1646E-HC12_FBGA96
@
WE
L3
RAS
J3
CAS
K3
CS/CS0
L2
CKE/CKE0
K9
CK
J7
CK
K7
DQSU
B7
BA0
M2
BA1
N8
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
VSSQ D1
VSS A9
VSS E1
VSS B3
NC/ODT1
J1
VDD B2
VDD D9
VDDQ A1
VDDQ A8
VDDQ C1
VDDQ C9
NC/CS1
L1
NC/CE1
J9
VDDQ E9
ZQ/ZQ0
L8
RESET
T2
DQSL
F3
DMU
D3 DML
E7
VSSQ B1
VSSQ B9
VSSQ D8
VSSQ E2
DQSU
C7
VSSQ E8
DQSL
G3
VDDQ F1
VSSQ F9
VSSQ G1
VDDQ H2
VDDQ H9
VSSQ G9
VREFCA
M8
VSS G8
VDD G7
ODT/ODT0
K1
A0
N3
A1
P7
VDD K2
A12
N7
VSS J2
VDD K8
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
DQU0 D7
A13
T3
A14
T7
A15/BA3
M7
BA2
M3
VREFDQ
H1
NCZQ1
L9
VDD N1
VDD N9
VDD R1
VDD R9
VSS J8
VSS M1
VSS M9
VSS P1
VSS P9
VSS T1
VSS T9
VDDQ D2
RV128
1K_0402_1%
RV128
1K_0402_1%
12
CV157
0.1U_0402_10V7K
CV157
0.1U_0402_10V7K
1
2
CV156
0.1U_0402_10V7K
CV156
0.1U_0402_10V7K
1
2
RV133
243_0402_1%
RV133
243_0402_1%
12
RV122
1K_0402_1%
RV122
1K_0402_1%
12
96-BALL
SDRAM DDR3
UV13
K4B1G1646E-HC12_FBGA96
@
96-BALL
SDRAM DDR3
UV13
K4B1G1646E-HC12_FBGA96
@
WE
L3
RAS
J3
CAS
K3
CS/CS0
L2
CKE/CKE0
K9
CK
J7
CK
K7
DQSU
B7
BA0
M2
BA1
N8
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
VSSQ D1
VSS A9
VSS E1
VSS B3
NC/ODT1
J1
VDD B2
VDD D9
VDDQ A1
VDDQ A8
VDDQ C1
VDDQ C9
NC/CS1
L1
NC/CE1
J9
VDDQ E9
ZQ/ZQ0
L8
RESET
T2
DQSL
F3
DMU
D3 DML
E7
VSSQ B1
VSSQ B9
VSSQ D8
VSSQ E2
DQSU
C7
VSSQ E8
DQSL
G3
VDDQ F1
VSSQ F9
VSSQ G1
VDDQ H2
VDDQ H9
VSSQ G9
VREFCA
M8
VSS G8
VDD G7
ODT/ODT0
K1
A0
N3
A1
P7
VDD K2
A12
N7
VSS J2
VDD K8
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
DQU0 D7
A13
T3
A14
T7
A15/BA3
M7
BA2
M3
VREFDQ
H1
NCZQ1
L9
VDD N1
VDD N9
VDD R1
VDD R9
VSS J8
VSS M1
VSS M9
VSS P1
VSS P9
VSS T1
VSS T9
VDDQ D2
CV264
1U_0402_6.3V6K
CV264
1U_0402_6.3V6K
1
2
RV121
1K_0402_1%
RV121
1K_0402_1%
12
CV154
0.1U_0402_10V7K
CV154
0.1U_0402_10V7K
1
2
+
CV131
330U_D2_2V_Y
+
CV131
330U_D2_2V_Y
1
2
CV268
1U_0402_6.3V6K
CV268
1U_0402_6.3V6K
1
2
RV134 10K_0402_5%RV134 10K_0402_5%
1 2
CV245
10U_0603_6.3V6M
CV245
10U_0603_6.3V6M
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DQSC[7..0]
DQSC#[7..0]
MDC[63..0]
CMDC[30..0]
DQMC[7..0]
ZQ6
CLKC1#
CLKC1 CLKC1#
CLKC1
CMDC19
CMDC5CMDC5
CMDC27
CMDC29
CMDC22
CMDC6
CMDC4
CMDC23
CMDC24
CMDC7
CMDC11
CMDC26
CMDC14
CMDC20
CMDC25
CMDC12
CMDC10
CMDC28
CMDC9
CMDC21
CMDC8
CMDC30
CMDC18
CMDC19
CMDC15
CMDC16
CMDC13
ZQ7
CMDC27
CMDC29
CMDC22
CMDC6
CMDC4
CMDC23
CMDC24
CMDC7
CMDC11
CMDC26
CMDC14
CMDC20
CMDC25
CMDC12
CMDC10
CMDC28
CMDC9
CMDC21
CMDC8
CMDC30
CMDC18
CMDC15
CMDC16
CMDC13
DQSC4
DQSC5
DQMC4
DQMC5
DQSC#4
DQSC#5
DQSC7
DQMC7
DQSC#7
DQSC6
DQMC6
DQSC#6
MDC34
MDC33
MDC35
MDC37
MDC32
MDC36
MDC38
MDC39
MDC45
MDC44
MDC46
MDC47
MDC43
MDC41
MDC42
MDC40
MDC54
MDC50
MDC52
MDC49
MDC55
MDC51
MDC53
MDC48
MDC58
MDC62
MDC57
MDC56
MDC60
MDC59
MDC61
MDC63
+MEM_VREF_CA3
+MEM_VREF_DQ3
+MEM_VREF_CA3
+MEM_VREF_DQ3 +MEM_VREF_CA3
+MEM_VREF_DQ3
DQSC#[7..0]<14,20>
DQSC[7..0]<14,20>
MDC[63..0]<14,20>
DQMC[7..0]<14,20>
CMDC[30..0]<14,20>
CLKC1<14>
CLKC1#<14>
+VRAM_1.5VS
+VRAM_1.5VS
+VRAM_1.5VS
+VRAM_1.5VS
+VRAM_1.5VS
+VRAM_1.5VS
+VRAM_1.5VS +VRAM_1.5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
Custom
21 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
Custom
21 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
Custom
21 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
310mA 310mA
64Mx16 DDR3 *8==>1GB
VRAM DDR3 chips (1GB)
Not Available
A7
A14
RST
A14
A13
A15
LOW HIGH
CMD22
CMD23
CMD30
CMD24
CMD25
CMD26
CMD27
CMD28
CMD29
CMD15
Mode D
Address
32..63
CMD0
CMD1
CMD2
CMD3
CMD4
CMD5
CMD6
0..31
CMD7
CMD8
CMD9
CMD10
CMD11
CMD12
CMD13
CMD14
CMD16
CMD17
CMD18
CMD19
CMD20
CMD21 A8
A11
CAS*
A3
A1
WE*
BA0
A4
BA2
A5
RAS*
A12
A5
BA1
ODT_H
A11
A10
CAS*
WE*
A9
BA0
A6
A12
ODT_L
CKE_H
A7
RAS*
A13
BA2
BA1
A2
A0
A4
A9
A3
A1
CS0_H#
A2
A0
A15
CS0_L#
A10
A8
A6
RST
CKE
Group4
Group5
Group7
Group6
4019HG
CV163
0.1U_0402_10V7K
CV163
0.1U_0402_10V7K
1
2
CV273
1U_0402_6.3V6K
CV273
1U_0402_6.3V6K
1
2
RV130
1K_0402_1%
RV130
1K_0402_1%
12
96-BALL
SDRAM DDR3
UV14
K4B1G1646E-HC12_FBGA96
@
96-BALL
SDRAM DDR3
UV14
K4B1G1646E-HC12_FBGA96
@
WE
L3
RAS
J3
CAS
K3
CS/CS0
L2
CKE/CKE0
K9
CK
J7
CK
K7
DQSU
B7
BA0
M2
BA1
N8
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
VSSQ D1
VSS A9
VSS E1
VSS B3
NC/ODT1
J1
VDD B2
VDD D9
VDDQ A1
VDDQ A8
VDDQ C1
VDDQ C9
NC/CS1
L1
NC/CE1
J9
VDDQ E9
ZQ/ZQ0
L8
RESET
T2
DQSL
F3
DMU
D3 DML
E7
VSSQ B1
VSSQ B9
VSSQ D8
VSSQ E2
DQSU
C7
VSSQ E8
DQSL
G3
VDDQ F1
VSSQ F9
VSSQ G1
VDDQ H2
VDDQ H9
VSSQ G9
VREFCA
M8
VSS G8
VDD G7
ODT/ODT0
K1
A0
N3
A1
P7
VDD K2
A12
N7
VSS J2
VDD K8
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
DQU0 D7
A13
T3
A14
T7
A15/BA3
M7
BA2
M3
VREFDQ
H1
NCZQ1
L9
VDD N1
VDD N9
VDD R1
VDD R9
VSS J8
VSS M1
VSS M9
VSS P1
VSS P9
VSS T1
VSS T9
VDDQ D2
CV272
1U_0402_6.3V6K
CV272
1U_0402_6.3V6K
1
2
RV129
1K_0402_1%
RV129
1K_0402_1%
12
CV269
1U_0402_6.3V6K
CV269
1U_0402_6.3V6K
1
2
CV166
0.1U_0402_10V7K
CV166
0.1U_0402_10V7K
1
2
CV247
10U_0603_6.3V6M
CV247
10U_0603_6.3V6M
1
2
CV304
0.01U_0402_25V7K
CV304
0.01U_0402_25V7K
1
2
CV161
0.1U_0402_10V7K
CV161
0.1U_0402_10V7K
1
2
CV305
0.01U_0402_25V7K
CV305
0.01U_0402_25V7K
1
2
CV164
0.1U_0402_10V7K
CV164
0.1U_0402_10V7K
1
2
RV149
160_0402_1%
RV149
160_0402_1%
12
CV248
10U_0603_6.3V6M
CV248
10U_0603_6.3V6M
1
2
CV271
1U_0402_6.3V6K
CV271
1U_0402_6.3V6K
1
2
RV147
243_0402_1%
RV147
243_0402_1%
12
96-BALL
SDRAM DDR3
UV15
K4B1G1646E-HC12_FBGA96
@
96-BALL
SDRAM DDR3
UV15
K4B1G1646E-HC12_FBGA96
@
WE
L3
RAS
J3
CAS
K3
CS/CS0
L2
CKE/CKE0
K9
CK
J7
CK
K7
DQSU
B7
BA0
M2
BA1
N8
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
DQL0 E3
DQL1 F7
DQL2 F2
DQL3 F8
DQL4 H3
DQL5 H8
DQL6 G2
DQL7 H7
VSSQ D1
VSS A9
VSS E1
VSS B3
NC/ODT1
J1
VDD B2
VDD D9
VDDQ A1
VDDQ A8
VDDQ C1
VDDQ C9
NC/CS1
L1
NC/CE1
J9
VDDQ E9
ZQ/ZQ0
L8
RESET
T2
DQSL
F3
DMU
D3 DML
E7
VSSQ B1
VSSQ B9
VSSQ D8
VSSQ E2
DQSU
C7
VSSQ E8
DQSL
G3
VDDQ F1
VSSQ F9
VSSQ G1
VDDQ H2
VDDQ H9
VSSQ G9
VREFCA
M8
VSS G8
VDD G7
ODT/ODT0
K1
A0
N3
A1
P7
VDD K2
A12
N7
VSS J2
VDD K8
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
DQU0 D7
A13
T3
A14
T7
A15/BA3
M7
BA2
M3
VREFDQ
H1
NCZQ1
L9
VDD N1
VDD N9
VDD R1
VDD R9
VSS J8
VSS M1
VSS M9
VSS P1
VSS P9
VSS T1
VSS T9
VDDQ D2
CV162
0.1U_0402_10V7K
CV162
0.1U_0402_10V7K
1
2
CV270
1U_0402_6.3V6K
CV270
1U_0402_6.3V6K
1
2
CV165
0.1U_0402_10V7K
CV165
0.1U_0402_10V7K
1
2
CV167
0.1U_0402_10V7K
CV167
0.1U_0402_10V7K
1
2
RV131
1K_0402_1%
RV131
1K_0402_1%
12
RV146
243_0402_1%
RV146
243_0402_1%
12
RV142
1K_0402_1%
RV142
1K_0402_1%
12
CV274
1U_0402_6.3V6K
CV274
1U_0402_6.3V6K
1
2
CV168
0.1U_0402_10V7K
CV168
0.1U_0402_10V7K
1
2
A
A
B
B
C
C
D
D
E
E
F
F
G
G
H
H
1 1
2 2
3 3
4 4
+3VS_LVDSDDC
LVDS_EDID_DATA
LVDS_EDID_CLK
+LCD_VDD_R
LVDS_TXOUT0-
LCD_ENVDD
LCDPWR_GATE
LCD_ENVDD_R
LCD_ENVDD
USB20_N11_R
USB20_P11_R
+3VS_LVDS_CAM
LVDS_TXOUT1-
LVDS_TXOUT1+
EC_ENBKL
LVDS_TXOUT0-
LVDS_TXOUT1-
LVDS_TXOUT1+
LVDS_TXOUT2-
LVDS_TXCLK-
LVDS_TXCLK+
LVDS_TXOUT2+
LVDS_TXOUT0+
LVDS_EDID_DATA
LVDS_EDID_CLK
LVDS_TXOUT2-
LVDS_TXCLK-
LVDS_TXCLK+
LVDS_TXOUT2+
LCDPWR_GATE
LVDS_TXOUT0+
EC_ENBKL
LVDS_EDID_DATA
LVDS_EDID_CLK
+3VS_LVDSDDC
LED_PWM
LCD_ENVDD
LVDS_TXOUT0+
LVDS_TXOUT0-
USB20_N11_R
USB20_P11_R
INT_MIC_DATA
INT_MIC_CLK
BKOFF#_R EC_ENBKL
GND_R LCD_ENVDD_R
+LCD_VDD_R
LVDS_TXOUT1-
LVDS_TXOUT1+
LVDS_TXOUT2-
LVDS_TXOUT2+
LVDS_TXCLK-
LVDS_TXCLK+
LVDS_TXOUT0-
LVDS_TXOUT0+
LVDS_TXOUT1-
LVDS_TXOUT1+
LVDS_EDID_CLK
LVDS_EDID_DATA
USB20_N13_R
USB20_P13_R
+PANEL_VDD
+PANEL_VDD
LCD_ENVDDLVDS_ENVDD
LVDS_TZOUT1-
LVDS_TZOUT1+
LVDS_TZOUT2-
LVDS_TZCLK-
LVDS_TZCLK+
LVDS_TZOUT2+
LVDS_TZOUT0+
LVDS_TZOUT0-
LVDS_TZOUT0-
LVDS_TZOUT1-
LVDS_TZOUT1+
LVDS_TZOUT2-
LVDS_TZCLK-
LVDS_TZCLK+
LVDS_TZOUT2+
LVDS_TZOUT0+
LVDS_TZOUT1+
LVDS_TZCLK-
LVDS_TZOUT2+
LVDS_TZOUT0-
LVDS_TZCLK+
LVDS_TZOUT1-
LVDS_TZOUT0+
LVDS_TZOUT2-
USB20_P13_R
USB20_N13_R
LED_PWM
BKOFF#_R
LVDS_ENVDD
LCDPWR_GATE
USB20_N11 <29>
USB20_P11 <29>
VGA_ENBKL<13>
EC_ENBKL <44>UMA_ENBKL<28>
VGA_BL_PWM <13>
VGA_EDID_CLK<13>
VGA_EDID_DATA<13>
VGA_TXCLK+<15>
VGA_TXCLK-<15>
VGA_TXOUT0+<15>
VGA_TXOUT0-<15>
VGA_TXOUT1+<15>
VGA_TXOUT1-<15>
VGA_TXOUT2+<15>
VGA_TXOUT2-<15>
VGA_ENVDD<13>
UMA_ENVDD<28>
LCD_EDID_DATA<28>
LCD_EDID_CLK<28>
LCD_TXOUT0-<28>
LCD_TXCLK+<28>
LCD_TXCLK-<28>
LCD_TXOUT2+<28>
LCD_TXOUT2-<28>
LCD_TXOUT1+<28>
LCD_TXOUT1-<28>
LCD_TXOUT0+<28>
PCH_PWM <28>
VGA_TZCLK+<15>
VGA_TZCLK-<15>
VGA_TZOUT0+<15>
VGA_TZOUT0-<15>
VGA_TZOUT1+<15>
VGA_TZOUT1-<15>
VGA_TZOUT2+<15>
VGA_TZOUT2-<15>
INT_MIC_CLK <42>
INT_MIC_DATA <42>
BKOFF# <44>
CPU_EDP_HPD <6>
H_EDP_AUXP<6>
H_EDP_AUXN<6>
H_EDP_TXP0<6>
H_EDP_TXN1<6>
H_EDP_TXP1<6>
H_EDP_TXN0<6>
USB20_P13 <29>
USB20_N13 <29>
LCD_TZOUT0-<28>
LCD_TZCLK+<28>
LCD_TZCLK-<28>
LCD_TZOUT2+<28>
LCD_TZOUT2-<28>
LCD_TZOUT1+<28>
LCD_TZOUT1-<28>
LCD_TZOUT0+<28>
+3VS
+3VS
+LCD_VDD
+3VS
+LCD_INV
+LCD_VDD
B+
+5VS
+5VS
+LCD_VDD
B+
+3VS
+LCD_VDD
+5VS
+LCD_VDD
+3VS
+LCD_VDD
+3VS
+LCD_VDD
+3VS
+LCD_INV
+3VS
+LCD_VDD
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
22 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
22 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
22 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Prevent to use wrong interface panel.
For LVDS 3D only
OPTIMUS for 2D HD/FHD Panel
DISCRETE for 3D Dual Chanel Panel
W=80mils
W=80mils
W=20mils
Reserve for EMI request
LCD/PANEL BD. Conn.
Pin 22
W=80mils
W=80mils
DISCRETE for 3D Dual Chanel Panel
For EMI
20MILS
1.5A
2A
USB for Glasses free 3D
40MILS
Reserve for LVDS panel
Reserve for eDP panel
Prevent to use wrong interface panel.
Pin 22
NC
GND
LVDS cable
MB side eDP cable
MB side
LVDS
eDP
LVDS & eDP cable pine definition notice.
due to NV request use 10K pull down for LCD_ENVDD,
we separate BOM for OPT/DIS SKU
OPT for 2D HD eDP Panel
Reserve for EMI request
For RF
For RF
reserve for 3D w/o DCDC/B
for 3D with DCDC/B
only need for 3D with DCDC/B
,JLVDS Pin8 can connect to
+LCV_VDD directly for
3D w/o DCDC/B
For RF
1.5A
Add F3 to prevent
burn on PVT
close to Q17
R270 0_0402_5%
OPTFHD@
R270 0_0402_5%
OPTFHD@ 1 2
R309 0_0402_5%
3D@ R309 0_0402_5%
3D@ 1 2
C230
0.01U_0402_25V7K
C230
0.01U_0402_25V7K
1
2
R501 0_0402_5%
3D@
R501 0_0402_5%
3D@
1 2
R508 0_0402_5%
3D@
R508 0_0402_5%
3D@
1 2
D84 AZ5125-02S.R7G_SOT23-3
@
D84 AZ5125-02S.R7G_SOT23-3
@
2
31
R502 0_0402_5%
3D@
R502 0_0402_5%
3D@
1 2
R296 0_0402_5%
LVDS2D@
R296 0_0402_5%
LVDS2D@ 1 2
C489
0.1U_0402_25V6
@
C489
0.1U_0402_25V6
@
1
2
R356 0_0402_5%
DIS@ R356 0_0402_5%
DIS@ 1 2
R120
100K_0402_5%
IEDP@
R120
100K_0402_5%
IEDP@
12
C234
68P_0402_50V8J
C234
68P_0402_50V8J
1
2
R260 2.2K_0402_5%
OPT@
R260 2.2K_0402_5%
OPT@ 12
R302 0_0402_5%
3D@ R302 0_0402_5%
3D@ 1 2
R504 0_0402_5%
3D@
R504 0_0402_5%
3D@
1 2
R300 0_0402_5%
LVDS2D@
R300 0_0402_5%
LVDS2D@ 1 2
C490
0.1U_0402_25V6
@
C490
0.1U_0402_25V6
@
1
2
R79 0_0402_5%3D@R79 0_0402_5%3D@
1 2
C252 0.1U_0402_10V7KIEDP@
C252 0.1U_0402_10V7KIEDP@
1 2
R283 0_0402_5%
OPTFHD@
R283 0_0402_5%
OPTFHD@ 1 2
R96 0_0402_5%CAM@R96 0_0402_5%CAM@
1 2
L55
WCM-2012-900T_0805
@L55
WCM-2012-900T_0805
@
1
122
33
4
4
R110
47K_0402_5%
R110
47K_0402_5%
1 2
R263 0_0402_5%
LVDS2D@
R263 0_0402_5%
LVDS2D@ 1 2
R112
100K_0402_5%
OPT@
R112
100K_0402_5%
OPT@
1 2
D15 RB751V40_SC76-2
LVDS@
D15 RB751V40_SC76-2
LVDS@
1 2
L2
FBMA-L11-201209-221LMA30T_0805
L2
FBMA-L11-201209-221LMA30T_0805
12
C228
0.1U_0402_10V7K
LVDS@
C228
0.1U_0402_10V7K
LVDS@
1
2
R333 0_0402_5%
OPTFHD@
R333 0_0402_5%
OPTFHD@ 1 2
R62 0_0402_5%
IEDP@
R62 0_0402_5%
IEDP@
1 2
R305 0_0402_5%
3D@ R305 0_0402_5%
3D@ 1 2
Q1B
2N7002DW-T/R7_SOT363-6
Q1B
2N7002DW-T/R7_SOT363-6
3
5
4
R1441 0_0603_5%
@
R1441 0_0603_5%
@12
R331 0_0402_5%
3D@ R331 0_0402_5%
3D@ 1 2
R360 0_0402_5%
IEDP@
R360 0_0402_5%
IEDP@
1 2
R1440 0_0603_5%
LVDS@
R1440 0_0603_5%
LVDS@ 12
R304 0_0402_5%
3D@ R304 0_0402_5%
3D@ 1 2
L57
WCM-2012-900T_0805
@L57
WCM-2012-900T_0805
@
1
122
33
4
4
C914 0.1U_0402_10V7K
IEDP@
C914 0.1U_0402_10V7K
IEDP@
1 2
C912 0.1U_0402_10V7K
IEDP@
C912 0.1U_0402_10V7K
IEDP@
1 2
C226
0.1U_0402_10V7K
C226
0.1U_0402_10V7K
1
2R1442 0_0603_5%
3D@
R1442 0_0603_5%
3D@ 12
R350 0_0402_5%
OPT@
R350 0_0402_5%
OPT@
1 2
U17
SN74AHC1G08DCKR_SC70-5
IEDP@
U17
SN74AHC1G08DCKR_SC70-5
IEDP@
IN1 1
IN2 2
G
3
O
4
P5
G
D
S
Q23
AO3413_SOT23
IEDP@
G
D
S
Q23
AO3413_SOT23
IEDP@
2
1 3
C393
10U_0603_6.3V6M
C393
10U_0603_6.3V6M
1
2
R108
100K_0402_5%
LVDS@
R108
100K_0402_5%
LVDS@
12
C235
0.1U_0402_25V6
C235
0.1U_0402_25V6
1
2
C890 0.1U_0402_10V7K
IEDP@
C890 0.1U_0402_10V7K
IEDP@
1 2
C232
0.1U_0402_10V7K
C232
0.1U_0402_10V7K
1
2
R269 0_0402_5%
OPTFHD@
R269 0_0402_5%
OPTFHD@ 1 2
R260
1K_0402_5%
DIS@
R260
1K_0402_5%
DIS@
C225
0.1U_0402_10V7K
CAM@
C225
0.1U_0402_10V7K
CAM@
1 2
R264 0_0402_5%
LVDS2D@
R264 0_0402_5%
LVDS2D@ 1 2
R299 0_0402_5%
LVDS2D@
R299 0_0402_5%
LVDS2D@ 1 2
R106 0_0805_5%
LVDS@
R106 0_0805_5%
LVDS@
1 2
R500 0_0402_5%
3D@
R500 0_0402_5%
3D@
1 2
C258 47P_0402_50V8J
@
C258 47P_0402_50V8J
@
1 2
R390 0_0603_5%
@
R390 0_0603_5%
@
12
C256 47P_0402_50V8J
@
C256 47P_0402_50V8J
@
1 2
R358 0_0402_5%
DIS@ R358 0_0402_5%
DIS@ 1 2
R298 0_0402_5%
LVDS2D@
R298 0_0402_5%
LVDS2D@ 1 2
C233
0.1U_0402_10V7K
C233
0.1U_0402_10V7K
1
2
R3490_0402_5%
DIS@R3490_0402_5%
DIS@ 12
R503 0_0402_5%
3D@
R503 0_0402_5%
3D@
1 2
R389
0_0603_5%
LVDS@
R389
0_0603_5%
LVDS@
1 2
R267 0_0402_5%
OPTFHD@
R267 0_0402_5%
OPTFHD@ 1 2
R265 0_0402_5%
LVDS2D@
R265 0_0402_5%
LVDS2D@ 1 2
R315 0_0402_5%
3D@ R315 0_0402_5%
3D@ 1 2
R3470_0402_5%@R3470_0402_5%@12
C236
0.1U_0402_25V6
@
C236
0.1U_0402_25V6
@
1
2
R147 0_0402_5%
LVDS@
R147 0_0402_5%
LVDS@
1 2
R97 0_0402_5%3D@R97 0_0402_5%3D@
1 2
R103 0_0402_5%
IEDP@
R103 0_0402_5%
IEDP@
1 2
R3320_0402_5%
OPT@
R3320_0402_5%
OPT@ 12
R357 0_0402_5%
OPT@
R357 0_0402_5%
OPT@
1 2
R308 0_0402_5%
3D@ R308 0_0402_5%
3D@ 1 2
R329 0_0402_5%
OPTFHD@
R329 0_0402_5%
OPTFHD@ 1 2
R314 0_0402_5%
3D@ R314 0_0402_5%
3D@ 1 2
D17RB751V40_SC76-2 D17RB751V40_SC76-2
1 2
G
D
S
Q17
AO3413_SOT23
LVDS@
G
D
S
Q17
AO3413_SOT23
LVDS@
2
1 3
R131
47K_0402_5%
R131
47K_0402_5%
12
R388 0_0603_5%
CAM@
R388 0_0603_5%
CAM@
1 2
R337 0_0402_5%
OPTFHD@
R337 0_0402_5%
OPTFHD@ 1 2
R78 0_0402_5%CAM@R78 0_0402_5%CAM@
1 2
F3
3A_32V_S1206-F-3.0A
F3
3A_32V_S1206-F-3.0A
21
R262 0_0402_5%
LVDS2D@
R262 0_0402_5%
LVDS2D@ 1 2
C227
4.7U_0805_10V4Z
C227
4.7U_0805_10V4Z
1
2
C257 47P_0402_50V8J
@
C257 47P_0402_50V8J
@
1 2
C915 0.1U_0402_10V7K
IEDP@
C915 0.1U_0402_10V7K
IEDP@
1 2
R392 0_0603_5%
IEDP@
R392 0_0603_5%
IEDP@
12
R505 0_0402_5%
3D@
R505 0_0402_5%
3D@
1 2
JLVDS4
E-T_0871K-F40N-00L
@
JLVDS4
E-T_0871K-F40N-00L
@
11
22
33
44
55
66
77
88
99
10 10
11 11
12 12
13 13
14 14
15 15
16 16
17 17
18 18
19 19
20 20
21 21
22 22
23 23
24 24
25 25
26 26
27 27
28 28
29 29
30 30
31 31
32 32
33 33
34 34
35 35
36 36
37 37
38 38
39 39
40 40
G1
41
G2
42
G3
43
G4
44
G5
45
G6
46
R317 0_0402_5%
3D@ R317 0_0402_5%
3D@ 1 2
R361 0_0402_5%
@
R361 0_0402_5%
@
1 2
C268
0.1U_0402_25V6
@
C268
0.1U_0402_25V6
@
1
2
C913 0.1U_0402_10V7K
IEDP@
C913 0.1U_0402_10V7K
IEDP@
1 2
R112
10K_0402_5%
DIS@
R112
10K_0402_5%
DIS@
G
D
S
Q20
AO3413_SOT23
@
G
D
S
Q20
AO3413_SOT23
@
2
1 3
R507 0_0402_5%
3D@
R507 0_0402_5%
3D@
1 2
C292
0.1U_0402_10V7K
IEDP@
C292
0.1U_0402_10V7K
IEDP@
1
2
R113
10K_0402_5%
R113
10K_0402_5%
12
R109
150_0603_5%
R109
150_0603_5%
12
R268 0_0402_5%
OPTFHD@
R268 0_0402_5%
OPTFHD@ 1 2
R310 0_0402_5%
3D@ R310 0_0402_5%
3D@ 1 2
Q1A
2N7002DW-T/R7_SOT363-6
Q1A
2N7002DW-T/R7_SOT363-6
61
2
C891 0.1U_0402_10V7K
IEDP@
C891 0.1U_0402_10V7K
IEDP@
1 2
R297 0_0402_5%
LVDS2D@
R297 0_0402_5%
LVDS2D@ 1 2
C229
4.7U_0603_6.3V6K
C229
4.7U_0603_6.3V6K
1
2
R277 0_0402_5%
LVDS2D@
R277 0_0402_5%
LVDS2D@ 1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
D_CRT_VSYNC
HSYNC
VSYNC
D_CRT_HSYNCCRT_HSYNC
CRT_VSYNC
CRT_R_L
CRT_G_L
CRT_B_L
CRT_DDC_DAT
CRT_DDC_CLK
HSYNC
VSYNC
CRT_DDC_DAT
CRT_DDC_CLKCRT_CLK
CRT_DATA
CRT_B_L
CRT_R_L
CRT_G_L
CRT_R
CRT_G
CRT_HSYNC
CRT_B
CRT_VSYNC
CRT_HSYNC
CRT_B
CRT_VSYNC
CRT_G
CRT_R
CRT_CLK
CRT_DATA
CRT_CLK
CRT_DATA
CRT_R
CRT_B
CRT_G
CRT_B_R
CRT_G_R
CRT_R_R
UMA_CRT_R<28>
UMA_CRT_B<28>
UMA_CRT_G<28>
UMA_CRT_HSYNC<28>
UMA_CRT_VSYNC<28>
VGA_CRT_B<13>
VGA_CRT_HSYNC<13>
VGA_CRT_R<13>
VGA_CRT_G<13>
VGA_CRT_VSYNC<13>
VGA_CRT_CLK<13>
VGA_CRT_DATA<13>
UMA_CRT_CLK<28>
UMA_CRT_DATA<28>
+CRT_VCC
+CRT_VCC
+5VS +CRT_VCC_R +CRT_VCC
+CRT_VCC
+3VS
+CRT_VCC
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
23 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
23 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
23 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
40 mils
If=1A
CRT CONNECTOR
OPTIMUS
DISCRETE
Close to CRT Connector
Close to CRT Connector
By EMI demand
C248
2.2P_0402_50V8C
@
C248
2.2P_0402_50V8C
@
1
2
D3
DAN217_SC59
@D3
DAN217_SC59
@
2
31
L6 10_0402_5%L6 10_0402_5%
1 2
Q205B
2N7002DW-T/R7_SOT363-6
Q205B
2N7002DW-T/R7_SOT363-6
3
5
4
C284
470P_0402_50V8J
@
C284
470P_0402_50V8J
@
1
2
R153
4.7K_0402_5%
R153
4.7K_0402_5%
1 2
G
G
JCRT
C-H_13-12201513CP
@
G
G
JCRT
C-H_13-12201513CP
@
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
16
17
C282
33P_0402_50V8K
@
C282
33P_0402_50V8K
@
1
2
R204 0_0402_5%
OPT@
R204 0_0402_5%
OPT@
1 2
R190 0_0402_5%R190 0_0402_5%
1 2
R140
150_0402_1%
R140
150_0402_1%
12
R236 0_0402_5%
OPT@
R236 0_0402_5%
OPT@
1 2
U7
SN74AHCT1G125GW_SOT353-5
U7
SN74AHCT1G125GW_SOT353-5
A
2Y4
OE# 1
G
3P5
L4 NBQ100505T-800Y_0402L4 NBQ100505T-800Y_0402
1 2
C242
2.2P_0402_50V8C
C242
2.2P_0402_50V8C
1
2
R181 0_0402_5%
DIS@
R181 0_0402_5%
DIS@
1 2
F1
0.5A_8V_KMC3S050RY
F1
0.5A_8V_KMC3S050RY
21
C249
2.2P_0402_50V8C
@
C249
2.2P_0402_50V8C
@
1
2
C285
33P_0402_50V8K
@
C285
33P_0402_50V8K
@
1
2
C247
2.2P_0402_50V8C
@
C247
2.2P_0402_50V8C
@
1
2
L7 10_0402_5%L7 10_0402_5%
1 2
R159
4.7K_0402_5%
R159
4.7K_0402_5%
1 2
R261 0_0402_5%
OPT@
R261 0_0402_5%
OPT@
1 2
R213 0_0402_5%
OPT@
R213 0_0402_5%
OPT@
1 2
C238
2.2P_0402_50V8C
C238
2.2P_0402_50V8C
1
2
L5 NBQ100505T-800Y_0402L5 NBQ100505T-800Y_0402
1 2
D6
RB491D_SOT23-3
D6
RB491D_SOT23-3
21
3
C239
2.2P_0402_50V8C
C239
2.2P_0402_50V8C
1
2
R177 0_0402_5%
DIS@
R177 0_0402_5%
DIS@
1 2
U6
SN74AHCT1G125GW_SOT353-5
U6
SN74AHCT1G125GW_SOT353-5
A
2Y4
OE# 1
G
3P5
D4
DAN217_SC59
@D4
DAN217_SC59
@
2
31
D5
DAN217_SC59
@D5
DAN217_SC59
@
2
31
L3 NBQ100505T-800Y_0402L3 NBQ100505T-800Y_0402
1 2
R189 0_0402_5%R189 0_0402_5%
1 2
R141 10K_0402_5%R141 10K_0402_5%
12
R235 0_0402_5%
OPT@
R235 0_0402_5%
OPT@
1 2
R191 0_0402_5%R191 0_0402_5%
1 2
R139
150_0402_1%
R139
150_0402_1%
12
R178 0_0402_5%
DIS@
R178 0_0402_5%
DIS@
1 2
R194 0_0402_5%
DIS@
R194 0_0402_5%
DIS@
1 2
R167 0_0402_5%
DIS@
R167 0_0402_5%
DIS@
1 2
R138
150_0402_1%
R138
150_0402_1%
12
R211 0_0402_5%
OPT@
R211 0_0402_5%
OPT@
1 2
C245
10P_0402_50V8J
@
C245
10P_0402_50V8J
@
1
2
R200 0_0402_5%
OPT@
R200 0_0402_5%
OPT@
1 2
R179 0_0402_5%
DIS@
R179 0_0402_5%
DIS@
1 2
T65 PADT65 PAD
R193 0_0402_5%
DIS@
R193 0_0402_5%
DIS@
1 2
C237
0.1U_0402_10V7K
@
C237
0.1U_0402_10V7K
@
1
2
C250
0.1U_0402_10V7K
C250
0.1U_0402_10V7K
1 2
C243
2.2P_0402_50V8C
C243
2.2P_0402_50V8C
1
2
C246
10P_0402_50V8J
@
C246
10P_0402_50V8J
@
1
2
T66 PADT66 PAD
Q205A
2N7002DW-T/R7_SOT363-6
Q205A
2N7002DW-T/R7_SOT363-6
61
2
C283
470P_0402_50V8J
@
C283
470P_0402_50V8J
@
1
2
C240
2.2P_0402_50V8C
C240
2.2P_0402_50V8C
1
2
C244 0.1U_0402_10V7KC244 0.1U_0402_10V7K
1 2
C241
2.2P_0402_50V8C
C241
2.2P_0402_50V8C
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VGA_DVI_TXD2+
VGA_DVI_TXD2-
HDMI_R_D0-
VGA_DVI_TXC+
VGA_DVI_TXC-
VGA_DVI_TXD0-
VGA_DVI_TXD1+
HDMI_R_D1-
HDMI_R_D1+
HDMI_R_D2+
HDMI_HPD_C
HDMI_R_CK+
HDMI_R_D1-
HDMI_R_D2+
HDMI_R_CK-
HDMI_R_CK-
HDMI_R_D0+
HDMI_R_D0+
HDMI_R_D2-
HDMI_SDATA
HDMI_R_D0-
HDMI_R_CK+
HDMI_SCLK
HDMI_R_D1+
HDMI_R_D2-
VGA_DVI_TXD0+
VGA_DVI_TXD1-
VGA_DVI_TXC-
VGA_DVI_TXD0-
VGA_DVI_TXD1-
VGA_DVI_TXD2-
VGA_DVI_TXD0+
VGA_DVI_TXD1+
VGA_DVI_TXD2+
CEC_INT#
CEC_FSHUPDCEC_RST#
CEC_XIN
CEC_TEST
CEC_XOUT
HDMI_CECIN HDMI_HPD_R
HDMI_DATA
HDMI_CLK
HDMI_CECOUT
HDMI_HPD_R
HDMI_SCLK
HDMI_SDATA
HDMI_CECIN
HDMI_CEC
HDMI_CECOUT
HDMI_CEC
HDMI_SCLK
HDMI_SDATA
HDMI_HPD_R
VGA_DVI_TXC+
HDMI_R_CK-
HDMI_R_CK+
HDMI_R_D2+
HDMI_R_D2-
HDMI_R_D0+
HDMI_R_D0-
HDMI_R_D1-
HDMI_R_D1+
HDMI_HPD_CHDMI_HPD_U
+HDMI_5V_OUT_F
UMA_DVI_TXC-
UMA_DVI_TXD0-
UMA_DVI_TXD1-
UMA_DVI_TXD2-
UMA_DVI_TXD0+
UMA_DVI_TXD1+
UMA_DVI_TXD2+
UMA_DVI_TXC+
HDMI_DATA
HDMI_CLK
UMA_DVI_TXD2-
UMA_DVI_TXD2+
HDMI_R_D0+
UMA_DVI_TXC-
UMA_DVI_TXC+
UMA_DVI_TXD0+
HDMI_R_D1+
HDMI_R_D1-
HDMI_R_D2-
HDMI_R_CK+
HDMI_R_D0-
HDMI_R_D2+
HDMI_R_CK-
UMA_DVI_TXD0-
UMA_DVI_TXD1+
UMA_DVI_TXD1-
VGA_HDMI_CLK-<15>
VGA_HDMI_TX0-<15>
VGA_HDMI_TX1-<15>
VGA_HDMI_TX2-<15>
VGA_HDMI_TX0+<15>
VGA_HDMI_TX1+<15>
VGA_HDMI_TX2+<15>
EC_SMB_DA1 <44,49,50>
EC_SMB_CK1<44,49,50> CEC_INT# <44>
VGA_HDMI_CLK+<15>
UMA_HDMI_DATA<28>
UMA_HDMI_CLK<28>UMA_HDMI_TX0+<28>
UMA_HDMI_TX0-<28>
UMA_HDMI_TX2-<28>
UMA_HDMI_TX2+<28>
UMA_HDMI_TXC+<28>
UMA_HDMI_TXC-<28>
UMA_HDMI_TX1-<28>
UMA_HDMI_TX1+<28> VGA_HDMI_CLK<15>
VGA_HDMI_DATA<15>
HDMI_HPD <13,28,30>
+HDMI_5V_OUT
+HDMI_5V_OUT+5VS
+3VL
+3VL
+3VL
+HDMI_5V_OUT
+3VL
+3VL+3VL
+HDMI_5V_OUT
+3VL +3VS
+5VS
+3VL
+5VL
+3VS_DGPU+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
24 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
24 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
24 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
HDMI Connector
Low= Force to update flash.
CEC_FSHUPD (Pin13)
HDMI CEC Controller
Address: 0011010X
For DISCRETEFor Optimus
07/10/2010
Intel DG P.132
RO0000003HM
HDMI Royalty
HDMIW/OLogo:RO0000001HM
HDMIW/Logo:RO0000002HM
HDMIW/Logo+HDCP:RO0000003HM
R199 0_0402_5%
@
R199 0_0402_5%
@
1 2
R206 499_0402_1%
DHDMI@
R206 499_0402_1%
DHDMI@
1 2
U16
R5F211A4C33SP-W4_LSSOP20 CEC@
U16
R5F211A4C33SP-W4_LSSOP20 CEC@
P3_7/CNTR0#/SSO/TXD1
2
XOUT/P4_7
4
P1_0/KI0#/AN8/CMP0_0 18
VSS/AVSS
5
P1_1/KI1#/AN9/CMP0_1 17
XIN/P4_6
6
P3_5/SSCK/SCL/CMP1_2
1
P1_5/RXD0/CNTR01/INT11# 12
RESET#
3
P1_3/KI3#/AN11/TZOUT 14
MODE
8
P1_7/CNTR00/INT10#
10
P4_2/VREF 16
P3_3/TCIN/INT3#/SSI00/CMP1_0 19
P1_6/CLK0/SSI01 11
P1_2/KI2#/AN10/CMP0_2 15
P1_4/TXD0 13
P3_4/SCS#/SDA/CMP1_1 20
P4_5/INT0#/RXD1
9
VCC/AVCC
7
R205 499_0402_1%
DHDMI@
R205 499_0402_1%
DHDMI@
1 2
C259
0.1U_0402_10V7K
HDMI@
C259
0.1U_0402_10V7K
HDMI@
1
2
R208 0_0402_5%
@
R208 0_0402_5%
@
1 2
CV329 0.1U_0402_10V7K DHDMI@CV329 0.1U_0402_10V7K DHDMI@
1 2
CV331 0.1U_0402_10V7K DHDMI@CV331 0.1U_0402_10V7K DHDMI@
1 2
CV341 0.1U_0402_10V7K IHDMI@CV341 0.1U_0402_10V7K IHDMI@
1 2
R195
680_0402_5%
IHDMI@
R195
680_0402_5%
IHDMI@
L12
WCM-2012-900T_4P
IHDMI@
L12
WCM-2012-900T_4P
IHDMI@
1
1
4
433
22
CV337 0.1U_0402_10V7K IHDMI@CV337 0.1U_0402_10V7K IHDMI@
1 2
C264
0.1U_0402_10V7K
HDMI@
C264
0.1U_0402_10V7K
HDMI@
1
2
R184
2.2K_0402_5%
HDMI@
R184
2.2K_0402_5%
HDMI@
12
R169 4.7K_0402_5%
CEC@
R169 4.7K_0402_5%
CEC@
12
R203 499_0402_1%
DHDMI@
R203 499_0402_1%
DHDMI@
1 2
R164
4.7K_0402_5%
CEC@
R164
4.7K_0402_5%
CEC@
12
R203
680_0402_5%
IHDMI@
R203
680_0402_5%
IHDMI@
CV336 0.1U_0402_10V7K IHDMI@CV336 0.1U_0402_10V7K IHDMI@
1 2
CV340 0.1U_0402_10V7K IHDMI@CV340 0.1U_0402_10V7K IHDMI@
1 2
R197 499_0402_1%
DHDMI@
R197 499_0402_1%
DHDMI@
1 2
R209 0_0402_5%
@
R209 0_0402_5%
@
1 2
R453
0_0402_5%
IHDMI@
R453
0_0402_5%
IHDMI@
1 2
S
GD
Q47
BSH111_SOT23-3
CEC@
S
GD
Q47
BSH111_SOT23-3
CEC@
2
3 1
L11
WCM-2012-900T_4P
DHDMI@
L11
WCM-2012-900T_4P
DHDMI@
1
1
4
433
22
CV335 0.1U_0402_10V7K DHDMI@CV335 0.1U_0402_10V7K DHDMI@
1 2
R176 4.7K_0402_5%
CEC@
R176 4.7K_0402_5%
CEC@
12
R202
680_0402_5%
IHDMI@
R202
680_0402_5%
IHDMI@
R188 0_0402_5%
@
R188 0_0402_5%
@
1 2
R180 0_0402_5%
@
R180 0_0402_5%
@
1 2
R192 0_0402_5%
@
R192 0_0402_5%
@
1 2
R173 0_0402_5%
@
R173 0_0402_5%
@
1 2
S
GD
Q18
BSH111_SOT23-3
HDMI@
S
GD
Q18
BSH111_SOT23-3
HDMI@
2
3 1
R206
680_0402_5%
IHDMI@
R206
680_0402_5%
IHDMI@
R391 0_0402_5%
DHDMI@
R391 0_0402_5%
DHDMI@
12
CV342 0.1U_0402_10V7K IHDMI@CV342 0.1U_0402_10V7K IHDMI@
1 2
C848 1U_0402_6.3V6K
CEC@
C848 1U_0402_6.3V6K
CEC@
1 2
C262
0.1U_0402_10V7K
CEC@
C262
0.1U_0402_10V7K
CEC@
1
2
L8
WCM-2012-900T_4P
DHDMI@
L8
WCM-2012-900T_4P
DHDMI@
1
1
4
433
22
L10
WCM-2012-900T_4P
DHDMI@L10
WCM-2012-900T_4P
DHDMI@
1
1
4
433
22
R581
27K_0402_5%
CEC@
R581
27K_0402_5%
CEC@
12
D55
CH751H-40PT_SOD323-2
HDMI@
D55
CH751H-40PT_SOD323-2
HDMI@
21
G
D
S
Q50
2N7002_SOT23-3
CEC@
G
D
S
Q50
2N7002_SOT23-3
CEC@
2
13
R201 499_0402_1%
DHDMI@
R201 499_0402_1%
DHDMI@
1 2
C263 0.1U_0402_10V7K
CEC@
C263 0.1U_0402_10V7K
CEC@
1 2
L14
WCM-2012-900T_4P
IHDMI@L14
WCM-2012-900T_4P
IHDMI@
1
1
4
433
22
D53
PMEG2010AEH_SOD123
HDMI@
D53
PMEG2010AEH_SOD123
HDMI@
2 1
R162
10K_0402_5%
CEC@
R162
10K_0402_5%
CEC@
12
G
D
S
Q49
2N7002_SOT23-3
CEC@
G
D
S
Q49
2N7002_SOT23-3
CEC@
2
13
R185
2.2K_0402_5%
HDMI@
R185
2.2K_0402_5%
HDMI@
12
R195 499_0402_1%
DHDMI@
R195 499_0402_1%
DHDMI@
1 2
R198 499_0402_1%
DHDMI@
R198 499_0402_1%
DHDMI@
1 2
S
GD
Q48
BSH111_SOT23-3
CEC@
S
GD
Q48
BSH111_SOT23-3
CEC@
2
3 1
CV332 0.1U_0402_10V7K DHDMI@CV332 0.1U_0402_10V7K DHDMI@
1 2
CV339 0.1U_0402_10V7K IHDMI@CV339 0.1U_0402_10V7K IHDMI@
1 2
R207 0_0402_5%
@
R207 0_0402_5%
@
1 2
R186
100K_0402_5%
HDMI@
R186
100K_0402_5%
HDMI@
1 2
R201
680_0402_5%
IHDMI@
R201
680_0402_5%
IHDMI@
R182 0_0402_5%
@
R182 0_0402_5%
@
1 2
R157 0_0402_5%
@
R157 0_0402_5%
@
1 2
R401 0_0402_5%
DHDMI@
R401 0_0402_5%
DHDMI@
12
R197
680_0402_5%
IHDMI@
R197
680_0402_5%
IHDMI@
R438 0_0402_5%
IHDMI@
R438 0_0402_5%
IHDMI@
12
CV343 0.1U_0402_10V7K IHDMI@CV343 0.1U_0402_10V7K IHDMI@
1 2
R570
100K_0402_5%
HDMI@
R570
100K_0402_5%
HDMI@
12
JHDMI1
HDMI W/Logo + HDCP
46@JHDMI1
HDMI W/Logo + HDCP
46@
R170 4.7K_0402_5%
CEC@
R170 4.7K_0402_5%
CEC@
1 2
R174 47K_0402_5%
CEC@
R174 47K_0402_5%
CEC@
12
R168 4.7K_0402_5%
CEC@
R168 4.7K_0402_5%
CEC@
1 2
R435 0_0402_5%
IHDMI@
R435 0_0402_5%
IHDMI@
12
D54
PMEG2010AEH_SOD123
CEC@
D54
PMEG2010AEH_SOD123
CEC@
2 1
R165
100K_0402_5%
CEC@
R165
100K_0402_5%
CEC@
12
L15
WCM-2012-900T_4P
IHDMI@
L15
WCM-2012-900T_4P
IHDMI@
1
1
4
433
22
R198
680_0402_5%
IHDMI@
R198
680_0402_5%
IHDMI@
C265
0.1U_0402_10V7K
HDMI@
C265
0.1U_0402_10V7K
HDMI@
1
2
R171 47K_0402_5%
CEC@
R171 47K_0402_5%
CEC@
12
CV334 0.1U_0402_10V7K DHDMI@CV334 0.1U_0402_10V7K DHDMI@
1 2
L9
WCM-2012-900T_4P
DHDMI@
L9
WCM-2012-900T_4P
DHDMI@
1
1
4
433
22
CV333 0.1U_0402_10V7K DHDMI@CV333 0.1U_0402_10V7K DHDMI@
1 2
R183 0_0402_5%
@
R183 0_0402_5%
@
1 2
U9
74AHCT1G125GW_SOT353-5
HDMI@
U9
74AHCT1G125GW_SOT353-5
HDMI@
A
2Y4
OE# 1
G
3P5
R160 0_0402_5%
@
R160 0_0402_5%
@
1 2
R187 0_0402_5%
@
R187 0_0402_5%
@
1 2
R210 0_0402_5%
@
R210 0_0402_5%
@
1 2
F2
0.5A_8V_KMC3S050RY
HDMI@
F2
0.5A_8V_KMC3S050RY
HDMI@
21
L13
WCM-2012-900T_4P
IHDMI@
L13
WCM-2012-900T_4P
IHDMI@
1
1
4
433
22
CV338 0.1U_0402_10V7K IHDMI@CV338 0.1U_0402_10V7K IHDMI@
1 2
R205
680_0402_5%
IHDMI@
R205
680_0402_5%
IHDMI@
CV330 0.1U_0402_10V7K DHDMI@CV330 0.1U_0402_10V7K DHDMI@
1 2
D9
CH751H-40PT_SOD323-2
CEC@
D9
CH751H-40PT_SOD323-2
CEC@
21
R571
2.2K_0402_5%
HDMI@
R571
2.2K_0402_5%
HDMI@
12
R196 0_0402_5%
@
R196 0_0402_5%
@
1 2
R166
4.7K_0402_5%
CEC@
R166
4.7K_0402_5%
CEC@
12
R145
1K_0402_5%
HDMI@
R145
1K_0402_5%
HDMI@
1 2
R202 499_0402_1%
DHDMI@
R202 499_0402_1%
DHDMI@
1 2
G
D
S
Q24
2N7002_SOT23-3
HDMI@
G
D
S
Q24
2N7002_SOT23-3
HDMI@
2
13
R163
27K_0402_5%
CEC@
R163
27K_0402_5%
CEC@
1 2
JHDMI
SUYIN_100042GR019M23DZL
@
JHDMI
SUYIN_100042GR019M23DZL
@
D2+
1D2_shield
2D2-
3D1+
4D1_shield
5D1-
6D0+
7D0_shield
8D0-
9CK+
10 CK_shield
11 CK-
12 CEC
13 Reserved
14 SCL
15 SDA
16 DDC/CEC_GND
17 +5V
18 HP_DET
19
GND 20
GND 21
GND 22
GND 23
S
GD
Q19
BSH111_SOT23-3
HDMI@
S
GD
Q19
BSH111_SOT23-3
HDMI@
2
3 1
R452
0_0402_5%
DHDMI@
R452
0_0402_5%
DHDMI@
1 2
R175 0_0402_5%
@
R175 0_0402_5%
@
1 2
CV328 0.1U_0402_10V7K DHDMI@CV328 0.1U_0402_10V7K DHDMI@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SATA_PTX_DRX_N0
SATA_PTX_DRX_P0
SATA_PRX_C_DTX_P0
SATA_PRX_C_DTX_N0
PCH_INTVRMEN
SM_INTRUDER#
RBIAS_SATA3
SATA3_COMP
PCH_SPIDI
PCH_SPIDO
PCH_SPICS0#
LPC_AD0
LPC_AD1
LPC_AD2
SATA_LED#
LPC_AD3
LPC_FRAME#
SATAICOMP
PCH_JTAG_TCK
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_SRTCRST#
PCH_RTCX2
PCH_RTCRST#
SM_INTRUDER#
PCH_INTVRMEN
AZ_SYNC
PCH_SPICLK
AZ_SDIN0_HD
AZ_SDOUT
SERIRQ
PCH_SPKR
PCH_RTCX1
PCH_SRTCRST#
PCH_RTCRST#
AZ_BITCLKAZ_BITCLK
AZ_RST#AZ_RST#
AZ_SYNC
AZ_SDOUT
PCH_SPKR
PCH_SPI0_DOPCH_SPI0_DI
PCH_SPI0_CLK
PCH_SPICS0#
SERIRQ
PCH_GPIO21
SATA_LED#
PCH_GPIO21
PCH_GPIO19SATA_PTX_DRX_N2
SATA_PTX_DRX_P2
SATA_PRX_C_DTX_N2
SATA_PRX_C_DTX_P2
PCH_JTAG_TCK
PCH_JTAG_TMS PCH_JTAG_TDO PCH_JTAG_TDI
PCH_SPI0_CLK
PCH_GPIO19
AZ_SYNC_R
AZ_BITCLK_HD
PCH_SPICS1#
PCH_SPICS1#
PCH_SPIDI
PCH_SPICLK
PCH_SPIDO
PCH_SPIDO PCH_SPI1_DO
PCH_SPIDIPCH_SPI1_DI PCH_SPICLKPCH_SPI1_CLK
SATA_PTX_DRX_N1
SATA_PTX_DRX_P1
SATA_PRX_C_DTX_P1
SATA_PRX_C_DTX_N1
PCH_RTCX1
PCH_SPI1_CLK
SATA_PTX_DRX_P0 <34>
SATA_PTX_DRX_N0 <34>
SATA_PRX_C_DTX_P0 <34>
SATA_PRX_C_DTX_N0 <34>
LPC_AD0 <44,45>
LPC_AD1 <44,45>
LPC_AD2 <44,45>
LPC_AD3 <44,45>
LPC_FRAME# <44,45>
SERIRQ <44>
AZ_BITCLK_HD<42>
AZ_RST_HD#<42>
AZ_SDIN0_HD<42>
PCH_SPKR<42>
AZ_SDOUT_HD<42>
AZ_SYNC_HD<42>
PWRME_CTRL<44>
SATA_PTX_DRX_N2 <34>
SATA_PRX_C_DTX_N2 <34>
SATA_PTX_DRX_P2 <34>
SATA_PRX_C_DTX_P2 <34>
PCH_GPIO19 <29>
SATA_PTX_DRX_P1 <36>
SATA_PTX_DRX_N1 <36>
SATA_PRX_C_DTX_P1 <36>
SATA_PRX_C_DTX_N1 <36>
PCH_RTCX1_R<36>
+3VALW_PCH
+RTCVCC
+1.05VS_SATA3
+1.05VS_VCC_SATA
+RTCVCC
+5VS
+3VALW_PCH
+3VS
+3VS
+3VS
+3VS
+3VALW_PCH +3VALW_PCH+3VALW_PCH
+3VS
+3VS
+RTCBATT +3VL
+RTCVCC +RTCBATT
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
25 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
25 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
25 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
HDD
HDA_SYNC
This signal has a weak internal pull down
H=>On Die PLL is supplied by 1.5V
L=>On Die PLL is supplied by 1.8V
Need to pull high for Chief River Mobile platform
*
HDA_SDO
Integrated SUS 1.05V VRM Enable
PCH_INTVRMEN High - Enable Internal VRs
(must be always pulled high)
CMOS Setting, near DDR Door
iME Setting.
ME debug mode,
this signal has a weak internal pull down
Low = Disable (default)
High = Enable (flash descriptor security overide)
*
*
PCH_SPKR
High = Enabled "No Reboot Mode"
Low = Disabled (Default)
SPI ROM for BIOS & ME (4MByte )
Socket: SP07000F500/SP07000H900
BOOT BIOS Strap Bit 0
ODD
for EMI
SPI ROM for Win8 (2MByte )
Change Net name due to
this function is high active
4MB ROM P/N:
SA00003K800
SA00004LI00
2MB ROM P/N:
SA000041N00
SA00003FO10
m-SATA
Placement near to YH1
For RF
For RF
for EMI
Please place U13 & U4 close to U2 PCH,
please place RH66, RH67, RH68 near UH3
Please place RH267 near RH66, Please place RH271 near RH67,
Please place RH269 near RH68.
If use GCLK, please delet DH1
INT.PD 20K
INT.PH 20K
INT.PD 20K
INT.PD 20K
INT.PD 20K
INT.PD 20K
INT.PD 20K
INT.PD 20K
INT.PH 20K
INT.PH 20K
INT.PH 20K
INT.PH 20K
INT.PH 20K
INT.PH 20K
INT.PD 20K
INT.PH 20K
INT.PH 20K
INT.PH 20K
INT.PD 20K
RH28 10K_0402_5%RH28 10K_0402_5%
1 2
RH66 33_0402_5%RH66 33_0402_5%
1 2
RH34 10K_0402_5%RH34 10K_0402_5%
12
CH101
10P_0402_50V8J
@CH101
10P_0402_50V8J
@
1
2
T69 PADT69 PAD
CH6
0.1U_0402_10V7K
CH6
0.1U_0402_10V7K
1
2
RH23
20K_0402_5%
RH23
20K_0402_5%
1 2
RH39
100_0402_1%
RH39
100_0402_1%
12
CH7
10P_0402_50V8J
CH7
10P_0402_50V8J
1
2
T68 PADT68 PAD
RH48 49.9_0402_1%RH48 49.9_0402_1%
1 2
RH67 33_0402_5%RH67 33_0402_5%
1 2
RH33 330K_0402_5%
RH33 330K_0402_5%
1 2
RH46
200_0402_5%
RH46
200_0402_5%
12
CH8
0.1U_0402_10V7K
CH8
0.1U_0402_10V7K
1
2
CH20
47P_0402_50V8J
@CH20
47P_0402_50V8J
@
1 2
RH12 1M_0402_5%
RH12 1M_0402_5%
1 2
CH4
1U_0402_6.3V6K
CH4
1U_0402_6.3V6K
1 2
CH21
10P_0402_50V8J
WIN8@
CH21
10P_0402_50V8J
WIN8@
1
2
JCMOS @JCMOS @
1 2
DH7
RB751V-40_SOD323-2
DH7
RB751V-40_SOD323-2
12
CH2 15P_0402_50V8J
NOGCLK@
CH2 15P_0402_50V8J
NOGCLK@
12
UH3
MX25L3205DM2I-12G SO8
UH3
MX25L3205DM2I-12G SO8
S
1
VCC
8
Q2
HOLD
7
VSS 4
D
5
C
6
W
3
JME @JME @
1 2
UH4
MX25L1606EM2I-12G_SO8
WIN8@
UH4
MX25L1606EM2I-12G_SO8
WIN8@
CS#
1
SO
2
WP#
3
GND
4
VCC 8
HOLD# 7
SCLK 6
SI 5
RH50 51_0402_1%RH50 51_0402_1%
1 2
RH271 33_0402_5%
WIN8@
RH271 33_0402_5%
WIN8@
1 2
RH43 37.4_0402_1%RH43 37.4_0402_1%
1 2
G
D
S
QH1
BSS138_NL_SOT23-3
G
D
S
QH1
BSS138_NL_SOT23-3
2
13
T67 PADT67 PAD
RH274 0_0402_5%
@
RH274 0_0402_5%
@
1 2
RH24
20K_0402_5%
RH24
20K_0402_5%
1 2
YH1
32.768KHZ_12.5P_1TJF125DP1A000D
NOGCLK@
YH1
32.768KHZ_12.5P_1TJF125DP1A000D
NOGCLK@
1 2
RH41 750_0402_1%RH41 750_0402_1%
1 2
RH267 33_0402_5%
WIN8@
RH267 33_0402_5%
WIN8@
1 2
RH38
200_0402_5%
RH38
200_0402_5%
1 2
RH44
100_0402_1%
RH44
100_0402_1%
12
CH5
1U_0402_6.3V6K
CH5
1U_0402_6.3V6K
1 2
RH27 33_0402_5%RH27 33_0402_5%
1 2
RH56 1M_0402_5%RH56 1M_0402_5%
1 2
RH65
10_0402_5%
RH65
10_0402_5%
12
RH30 33_0402_5%RH30 33_0402_5%
1 2
RH272 1K_0402_5%
@
RH272 1K_0402_5%
@
12
RH40
100_0402_1%
RH40
100_0402_1%
1 2
RH36 1K_0402_5%
@
RH36 1K_0402_5%
@
1 2
RH32 33_0402_5%RH32 33_0402_5%
1 2
CH3 15P_0402_50V8J
NOGCLK@
CH3 15P_0402_50V8J
NOGCLK@
12
RH2
10M_0402_5%
NOGCLK@
RH2
10M_0402_5%
NOGCLK@
12
RH69
10_0402_5%
WIN8@
RH69
10_0402_5%
WIN8@
12
DH1
RB751V-40_SOD323-2
@
DH1
RB751V-40_SOD323-2
@
12
RH31 10K_0402_5%RH31 10K_0402_5%
12
RH45
200_0402_5%
RH45
200_0402_5%
12
RTCIHDA
SATA
LPC
SPI JTAG
SATA 6G
UH1A
PANTHER-POINT_FCBGA989
HM76R3@
RTCIHDA
SATA
LPC
SPI JTAG
SATA 6G
UH1A
PANTHER-POINT_FCBGA989
HM76R3@
RTCX1
A20
RTCX2
C20
INTVRMEN
C17
INTRUDER#
K22
HDA_BCLK
N34
HDA_SYNC
L34
HDA_RST#
K34
HDA_SDIN0
E34
HDA_SDIN1
G34
HDA_SDIN2
C34
HDA_SDO
A36
SATALED# P3
FWH0 / LAD0 C38
FWH1 / LAD1 A38
FWH2 / LAD2 B37
FWH3 / LAD3 C37
LDRQ1# / GPIO23 K36
FWH4 / LFRAME# D36
LDRQ0# E36
RTCRST#
D20
HDA_SDIN3
A34
HDA_DOCK_EN# / GPIO33
C36
HDA_DOCK_RST# / GPIO13
N32
SRTCRST#
G22
SATA0RXN AM3
SATA0RXP AM1
SATA0TXN AP7
SATA0TXP AP5
SATA1RXN AM10
SATA1RXP AM8
SATA1TXN AP11
SATA1TXP AP10
SATA2RXN AD7
SATA2RXP AD5
SATA2TXN AH5
SATA2TXP AH4
SATA3RXN AB8
SATA3RXP AB10
SATA3TXN AF3
SATA3TXP AF1
SATA4RXN Y7
SATA4RXP Y5
SATA4TXN AD3
SATA4TXP AD1
SATA5RXN Y3
SATA5RXP Y1
SATA5TXN AB3
SATA5TXP AB1
SATAICOMPI Y10
SPI_CLK
T3
SPI_CS0#
Y14
SPI_CS1#
T1
SPI_MOSI
V4
SPI_MISO
U3
SATA0GP / GPIO21 V14
SATA1GP / GPIO19 P1
JTAG_TCK
J3
JTAG_TMS
H7
JTAG_TDI
K5
JTAG_TDO
H1
SERIRQ V5
SPKR
T10
SATAICOMPO Y11
SATA3COMPI AB13
SATA3RCOMPO AB12
SATA3RBIAS AH1
CH100
0.1U_0402_10V7K
WIN8@
CH100
0.1U_0402_10V7K
WIN8@
1 2
RH29 10K_0402_5%RH29 10K_0402_5%
12
RH68 33_0402_5%RH68 33_0402_5%
1 2
RH269 33_0402_5%
WIN8@
RH269 33_0402_5%
WIN8@
1 2
RH54 33_0402_5%RH54 33_0402_5%
1 2
RH55 1K_0402_5%RH55 1K_0402_5%
12
RH26
0_0402_5%
GCLK@RH26
0_0402_5%
GCLK@
1 2
RH25 0_0402_5%RH25 0_0402_5%
1 2
CH19
47P_0402_50V8J
@
CH19
47P_0402_50V8J
@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCH_X1
PCH_X2
PCH_CLK_DMI#
PCH_CLK_DMI
CLKIN_GND1#
CLKIN_GND1
CLK_DOT#
CLK_DOT
CLK_SATA#
CLK_SATA
XCLK_RCOMP
LVDS_SEL
CLK_PCILOOP
PANEL_SEL
CLK_CPU_DMI
CLK_CPU_DMI#
DRAMRST_CNTRL_PCH
PCH_CLK_DMI#
PCH_CLK_DMI
CLK_14M_PCH
CLKIN_GND1#
CLK_DOT#
CLK_SATA
CLK_SATA#
CLKIN_GND1
CLK_DOT
PCH_SMLDATA0
PCH_SMLCLK0
CLK_14M_PCH
PCH_SMBALERT#
PCH_SMBCLK
PCH_SMBDATA
PCH_SMLCLK1
PCH_SMLDATA1
LAN_EN
LAN_EN
DRAMRST_CNTRL_PCH
CLK_BCLK_ITP
PCH_SMBALERT#
CLK_BCLK_ITP#
PCIE_PTX_LANRX_P1
PCIE_PRX_C_LANTX_P1
PCIE_PTX_LANRX_N1
PCIE_PRX_C_LANTX_N1
PCIE_PTX_WLANRX_P2
PCIE_PRX_WLANTX_N2
PCIE_PRX_WLANTX_P2
PCIE_PTX_WLANRX_N2
CLK_LAN#
CLK_LAN
CLKREQ_LAN#
CLKREQ_WLAN#
CLK_WLAN
CLK_WLAN#
CLKREQ_CR#
CLKREQ_WLAN#
CLKREQ_TV#
PANEL_SEL
PASSWORD_CLEAR#
CLK_PCIE_VGA
CLK_PCIE_VGA#
CLK_REQ_VGA#
CLK_PCILOOP
PCH_X1 PCH_X2
CLK_FLEX0
CLK_FLEX2
PCH_SMLDATA0
PCH_SMLCLK0
PCH_SMBDATA
PCH_SMBCLK
PCH_SMLCLK1
PCH_SMLDATA1
CLK_REQ_VGA#
PCIE_PTX_CRRX_N4
PCIE_PRX_C_CRTX_P4
PCIE_PRX_C_CRTX_N4
PCIE_PTX_CRRX_P4
PCH_GPIO20
CLKREQ_CR#
CLK_CR
CLK_CR#
PCH_GPIO20
CLKREQ_USBA30#
LVDS_SEL
PANEL_SEL
PASSWORD_CLEAR#
LVDS_SEL
DGPU_PRSNT#
DGPU_PRSNT#
CLKREQ_LAN#
CLK_FLEX1
CLK_CPU_EDP
CLK_CPU_EDP#
PCIE_PTX_TVRX_N6
PCIE_PRX_C_TVTX_P6
PCIE_PRX_C_TVTX_N6
PCIE_PTX_TVRX_P6
CLKREQ_TV#
CLK_TV#
CLK_TV
PCIE_PTX_USBRX_N5
PCIE_PRX_C_USBTX_P5
PCIE_PRX_C_USBTX_N5
PCIE_PTX_USBRX_P5
CLKREQ_USBA30#
CLK_USBA30#
CLK_USBA30
PCH_X1
CLK_RES_ITP#<10> CLK_RES_ITP<10>
CLK_PCILOOP <29>
DRAMRST_CNTRL_PCH <7,11>
CLK_CPU_DMI <5>
CLK_CPU_DMI# <5>
PCIE_PTX_C_LANRX_P1<37> PCIE_PTX_C_LANRX_N1<37>
PCIE_PRX_C_LANTX_N1<37> PCIE_PRX_C_LANTX_P1<37>
PCIE_PTX_C_WLANRX_N2<36>
PCIE_PRX_WLANTX_N2<36>
PCIE_PTX_C_WLANRX_P2<36>
PCIE_PRX_WLANTX_P2<36>
CLK_LAN#<37> CLK_LAN<37>
CLKREQ_LAN#<37>
CLK_WLAN#<36> CLK_WLAN<36>
CLKREQ_WLAN#<36>
CLK_PCIE_VGA <13>
CLK_PCIE_VGA# <13>
CLK_REQ_VGA# <13>
PM_SMBDATA <11,12,36,46>
PM_SMBCLK <11,12,36,46>
EC_SMB_DA2 <13,44,45>
EC_SMB_CK2 <13,44,45>
PCIE_PTX_C_CRRX_N4<38>
PCIE_PRX_C_CRTX_P4<38> PCIE_PRX_C_CRTX_N4<38>
PCIE_PTX_C_CRRX_P4<38>
CLK_CR<38> CLK_CR#<38>
CLK_CPU_ITP#<5> CLK_CPU_ITP<5>
LAN_EN <37>
CLKREQ_CR#<38>
CLK_CPU_EDP <5>
CLK_CPU_EDP# <5>
PCIE_PTX_C_TVRX_N6<36>
PCIE_PRX_C_TVTX_P6<36> PCIE_PRX_C_TVTX_N6<36>
PCIE_PTX_C_TVRX_P6<36>
CLK_TV<36> CLK_TV#<36>
CLKREQ_TV#<36>
PCIE_PTX_C_USBRX_N5<40>
PCIE_PRX_C_USBTX_P5<40> PCIE_PRX_C_USBTX_N5<40>
PCIE_PTX_C_USBRX_P5<40>
CLK_USBA30<40> CLK_USBA30#<40>
CLKREQ_USBA30#<40>
PCH_X1_R<36>
+1.05VS_VCCDIFFCLKN
+3VALW_PCH
+3VS
+3VALW_PCH
+3VALW_PCH +3VS
+3VS+3VALW_PCH
+3VALW_PCH
+3VALW_PCH
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
26 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
26 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
26 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
LAN
WLAN
LAN
WLAN
VGA
120 MHz for eDP
For EMI
From Clock Gen.
LVDS_SEL
LVDS_SEL
Channel Single
(Default)
HL
Dual
Control Link only for support Intel IAMT.
Card Reader
Card Reader
PANEL_SEL
PANEL_SEL
Channel LVDS
HL
EDP
Compal common design SW request to
add DGPU_Present on this GPIO67
DGPU_PRSNT#
DGPU_PRSNT#
M/B SKU UMA
HL
DIS/OPT
Intel Spec:
PCIECLK_RQ0# is suspend well,
but we pull high to +3VS
for LAN en/disable function
TV tuner
EX-USB30
EX-USB30
EX-USB30
Placement near to YH2
INT. PD 20K
INT. PD 20K
INT. PD 20K
INT. PD 20K
INT. PH 20K
INT. PH 20K
CH13 0.1U_0402_10V7KCH13 0.1U_0402_10V7K
12
QH4B
2N7002DW-T/R7_SOT363-6
QH4B
2N7002DW-T/R7_SOT363-6
3
5
4
RH121 0_0402_5%@RH121 0_0402_5%@12 YH2 25MHZ_20PF_7V25000016NOGCLK@YH2 25MHZ_20PF_7V25000016NOGCLK@
GND
2
33
1
1
GND
4
CH28 22P_0402_50V8J
@
CH28 22P_0402_50V8J
@
12
CH1 0.1U_0402_10V7K
TV@
CH1 0.1U_0402_10V7K
TV@
1 2
RH110 10K_0402_5%RH110 10K_0402_5%
1 2
RH277
10K_0402_5%
OPTFHD@
RH277
10K_0402_5%
OPTFHD@
RH74 2.2K_0402_5%RH74 2.2K_0402_5%
12
RH261 10K_0402_5%RH261 10K_0402_5%
1 2
RH76 1K_0402_5%RH76 1K_0402_5%
1 2
RH84 10K_0402_5%RH84 10K_0402_5%
1 2
QH3B
2N7002DW-T/R7_SOT363-6
QH3B
2N7002DW-T/R7_SOT363-6
3
5
4
RH227 10K_0402_5%
@
RH227 10K_0402_5%
@
1 2
T72 PADT72 PAD
RH104 10K_0402_5%RH104 10K_0402_5%
1 2
CH10 0.1U_0402_10V7K
TV@
CH10 0.1U_0402_10V7K
TV@
1 2
T74 PADT74 PAD
RH37
0_0402_5%
GCLK@
RH37
0_0402_5%
GCLK@
1 2
QH3A
2N7002DW-T/R7_SOT363-6
QH3A
2N7002DW-T/R7_SOT363-6
6 1
2
RH102 4.7K_0402_5%RH102 4.7K_0402_5%
RH115 90.9_0402_1%RH115 90.9_0402_1%
1 2
CH16 0.1U_0402_10V7KCH16 0.1U_0402_10V7K
1 2
RH116 10K_0402_5%
OPTHD@RH116 10K_0402_5%
OPTHD@
1 2
RH107 10K_0402_5%RH107 10K_0402_5%
1 2
CH27
27P_0402_50V8J
NOGCLK@
CH27
27P_0402_50V8J
NOGCLK@
1
2
RH114 10K_0402_5%RH114 10K_0402_5%
1 2
RH117 1M_0402_5%
NOGCLK@
RH117 1M_0402_5%
NOGCLK@
12
RH276 10K_0402_5%IEDP@RH276 10K_0402_5%IEDP@
1 2
RH99 10K_0402_5%RH99 10K_0402_5%
1 2
RH75 10K_0402_5%RH75 10K_0402_5%
1 2
CH26
27P_0402_50V8J
NOGCLK@
CH26
27P_0402_50V8J
NOGCLK@
1
2
RH119 10K_0402_5%LVDS@RH119 10K_0402_5%LVDS@
1 2
RH72 2.2K_0402_5%RH72 2.2K_0402_5%
12
RH103 4.7K_0402_5%RH103 4.7K_0402_5%
JPW
@
JPW
@
12
RH80 10K_0402_5%RH80 10K_0402_5%
1 2
PCI-E*
CLOCKS
FLEX CLOCKS
SMBUSController
Link
UH1B
PANTHER-POINT_FCBGA989HM76R3@
PCI-E*
CLOCKS
FLEX CLOCKS
SMBUSController
Link
UH1B
PANTHER-POINT_FCBGA989HM76R3@
PERN1
BG34
PERP1
BJ34
PERN2
BE34
PERP2
BF34
PERN3
BG36
PERP3
BJ36
PERN4
BF36
PERP4
BE36
PERN5
BG37
PERP5
BH37
PERN6
BJ38
PERP6
BG38
PERN7
BG40
PERP7
BJ40
PERN8
BE38
PERP8
BC38
PETN1
AV32
PETP1
AU32
PETN2
BB32
PETP2
AY32
PETN3
AV34
PETP3
AU34
PETN4
AY34
PETP4
BB34
PETN5
AY36
PETP5
BB36
PETN6
AU36
PETP6
AV36
PETN7
AY40
PETP7
BB40
PETN8
AW38
PETP8
AY38
CLKOUT_PCIE0N
Y40
CLKOUT_PCIE0P
Y39
CLKOUT_PCIE1N
AB49
CLKOUT_PCIE1P
AB47
CLKOUT_PCIE2N
AA48
CLKOUT_PCIE2P
AA47
CLKOUT_PCIE3N
Y37
CLKOUT_PCIE3P
Y36
CLKOUT_PCIE4N
Y43
CLKOUT_PCIE4P
Y45
CLKOUT_PCIE5N
V45
CLKOUT_PCIE5P
V46
CLKIN_GND1_N BJ30
CLKIN_GND1_P BG30
CLKIN_DMI_N BF18
CLKIN_DMI_P BE18
CLKIN_DOT_96N G24
CLKIN_DOT_96P E24
CLKIN_SATA_N AK7
CLKIN_SATA_P AK5
XTAL25_IN V47
XTAL25_OUT V49
REFCLK14IN K45
CLKIN_PCILOOPBACK H45
CLKOUT_PEG_A_N AB37
CLKOUT_PEG_A_P AB38
PEG_A_CLKRQ# / GPIO47 M10
PCIECLKRQ0# / GPIO73
J2
PCIECLKRQ1# / GPIO18
M1
PCIECLKRQ2# / GPIO20
V10
PCIECLKRQ3# / GPIO25
A8
PCIECLKRQ4# / GPIO26
L12
PCIECLKRQ5# / GPIO44
L14
CLKOUTFLEX0 / GPIO64 K43
CLKOUTFLEX1 / GPIO65 F47
CLKOUTFLEX2 / GPIO66 H47
CLKOUTFLEX3 / GPIO67 K49
CLKOUT_DMI_N AV22
CLKOUT_DMI_P AU22
PEG_B_CLKRQ# / GPIO56
E6
CLKOUT_PEG_B_P
AB40 CLKOUT_PEG_B_N
AB42
XCLK_RCOMP Y47
CLKOUT_DP_P AM13
CLKOUT_DP_N AM12
CLKOUT_PCIE6N
V40
CLKOUT_PCIE6P
V42
PCIECLKRQ7# / GPIO46
K12
CLKOUT_PCIE7N
V38
CLKOUT_PCIE7P
V37
CLKOUT_ITPXDP_N
AK14
CLKOUT_ITPXDP_P
AK13
SMBALERT# / GPIO11 E12
SMBCLK H14
SMBDATA C9
SML0ALERT# / GPIO60 A12
SML0CLK C8
SML0DATA G12
SML1ALERT# / PCHHOT# / GPIO74 C13
SML1CLK / GPIO58 E14
SML1DATA / GPIO75 M16
CL_CLK1 M7
CL_DATA1 T11
CL_RST1# P10
PCIECLKRQ6# / GPIO45
T13
RH120 0_0402_5%RH120 0_0402_5%
12
RH124 10_0402_5%
@
RH124 10_0402_5%
@12
RH70 2.2K_0402_5%RH70 2.2K_0402_5%
12
CH9 0.1U_0402_10V7K
EUSB30@
CH9 0.1U_0402_10V7K
EUSB30@
1 2
RH73 2.2K_0402_5%RH73 2.2K_0402_5%
12
RH81 10K_0402_5%RH81 10K_0402_5%
1 2
RH79 10K_0402_5%RH79 10K_0402_5%
1 2
CH17 0.1U_0402_10V7KCH17 0.1U_0402_10V7K
12
CH11 0.1U_0402_10V7KCH11 0.1U_0402_10V7K
12
RH82 10K_0402_5%RH82 10K_0402_5%
1 2
CH18 0.1U_0402_10V7KCH18 0.1U_0402_10V7K
1 2
CH12 0.1U_0402_10V7K
EUSB30@
CH12 0.1U_0402_10V7K
EUSB30@
1 2
T73 PADT73 PAD
RH77 2.2K_0402_5%RH77 2.2K_0402_5%
12
RH123 0_0402_5%RH123 0_0402_5%
12
RH78 2.2K_0402_5%RH78 2.2K_0402_5%
12
RH275 10K_0402_5%
@
RH275 10K_0402_5%
@
12
RH87 10K_0402_5%RH87 10K_0402_5%
1 2
RH112 10K_0402_5%RH112 10K_0402_5%
1 2
RH86 10K_0402_5%RH86 10K_0402_5%
1 2
CH14 0.1U_0402_10V7KCH14 0.1U_0402_10V7K
12
RH83 10K_0402_5%RH83 10K_0402_5%
1 2
RH89 10K_0402_5%RH89 10K_0402_5%
12
RH95 10K_0402_5%RH95 10K_0402_5%
1 2
RH122 0_0402_5%@RH122 0_0402_5%@12
QH4A
2N7002DW-T/R7_SOT363-6
QH4A
2N7002DW-T/R7_SOT363-6
6 1
2
RH262 10K_0402_5%RH262 10K_0402_5%
1 2
RH85 10K_0402_5%RH85 10K_0402_5%
1 2
RH277 10K_0402_5%3D@RH277 10K_0402_5%3D@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
RBIAS_CPY
RI#
PM_PWROK
PCH_SUSPWRDN#_R
EC_SWI#
PBTN_OUT#
PCH_RSMRST#
DMI_CTX_PRX_N2
DMI_PTX_CRX_N2
DMI_PTX_CRX_N0
DMI_PTX_CRX_N1
DMI_PTX_CRX_N3
DMI_PTX_CRX_P0
DMI_PTX_CRX_P2
DMI_CTX_PRX_N0
DMI_PTX_CRX_P1
DMI_CTX_PRX_N1
DMI_PTX_CRX_P3
DMI_CTX_PRX_P2
DMI_CTX_PRX_P1
DMI_CTX_PRX_N3
DMI_CTX_PRX_P3
DMI_CTX_PRX_P0
DMI_COMP
PCH_ACIN
XDP_DBRESET#
DRAMPWROK
RI#
PCH_LOW_BAT#
PM_SLP_S5#
PM_SLP_S4#
SUS_STAT#
PM_SLP_S3#
H_PM_SYNC
PM_PWROK
SUSACK#_R
DSWVREN
PCH_DPWROK
DSWVREN
EC_SWI#
PM_SLP_SUS#
PCH_SUSPWRDN#_RSUSACK#_R
PM_PWROK
PCH_SUSPWRDN#_R
SYS_PWROK
PCH_LOW_BAT#
PCH_GPIO32
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_N2
FDI_CTX_PRX_N3
FDI_CTX_PRX_N4
FDI_CTX_PRX_N6
FDI_CTX_PRX_N5
FDI_CTX_PRX_P1
FDI_CTX_PRX_N7
FDI_CTX_PRX_P0
FDI_CTX_PRX_P3
FDI_CTX_PRX_P2
FDI_CTX_PRX_P6
FDI_CTX_PRX_P5
FDI_CTX_PRX_P4
FDI_CTX_PRX_P7
FDI_INT
FDI_FSYNC1
FDI_FSYNC0
FDI_LSYNC1
FDI_LSYNC0
SYS_PWROK
PCH_RSMRST#
PCH_RSMRST#PCH_DPWROK
PM_SLP_A#
PCH_GPIO29 PCH_GPIO29
PCH_RSMRST#PM_PWROK PCH_RSMRST#
PM_PWROK_R
PCH_GPIO32
SYS_PWROK
PCH_RSMRST#
PM_PWROK_R
PM_PWROK<5,44>
PBTN_OUT#<5,44>
XDP_DBRESET#<5>
PM_SLP_S5# <44>
H_PM_SYNC <5>
PM_SLP_S4# <40,44>
PM_SLP_S3# <44>
EC_SWI# <37,40>
DMI_CTX_PRX_P0<6>
DMI_CTX_PRX_N1<6>
DMI_PTX_CRX_N1<6>
DMI_PTX_CRX_P1<6>
DMI_CTX_PRX_N0<6>
DMI_CTX_PRX_P3<6>
DMI_PTX_CRX_P3<6>
DMI_PTX_CRX_P0<6>
DMI_PTX_CRX_N0<6>
DMI_CTX_PRX_N3<6>
DMI_CTX_PRX_P2<6>
DMI_PTX_CRX_N3<6>
DMI_CTX_PRX_P1<6>
DMI_CTX_PRX_N2<6>
DMI_PTX_CRX_N2<6>
DMI_PTX_CRX_P2<6>
DRAMPWROK<5>
VGATE<5,44,55>
FDI_CTX_PRX_N0 <6>
FDI_CTX_PRX_N1 <6>
FDI_CTX_PRX_N3 <6>
FDI_CTX_PRX_N2 <6>
FDI_CTX_PRX_N5 <6>
FDI_CTX_PRX_N4 <6>
FDI_CTX_PRX_N7 <6>
FDI_CTX_PRX_N6 <6>
FDI_CTX_PRX_P1 <6>
FDI_CTX_PRX_P0 <6>
FDI_CTX_PRX_P3 <6>
FDI_CTX_PRX_P2 <6>
FDI_CTX_PRX_P4 <6>
FDI_CTX_PRX_P5 <6>
FDI_CTX_PRX_P7 <6>
FDI_CTX_PRX_P6 <6>
FDI_INT <6>
FDI_FSYNC0 <6>
FDI_LSYNC0 <6>
FDI_FSYNC1 <6>
FDI_LSYNC1 <6>
ACIN<44,50>
CLK_EC <44>
POK<49,51>
PCH_RSMRST#<44>
PCH_SUSPWRDN#<44>
SUSACK#<44>
+3VS
+3VALW_PCH
+3VS
+1.05VS_PCH
+RTCVCC
+3VALW_PCH
+3VALW_PCH
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
27 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
27 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
27 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
DSWVREN - Internal Deep Sleep 1.05V regulator
H
：
Enable
L
：
Disable
*
Stuff R137 if EC does not want to
involve in the handshake mechanism
for the DeepSX state entry and exit
Stuff R222 if do not support DeepSX state
32.768 KHz
DSWVREN must be always pulled high to +RTCVCC
Reserve 0 ohm for cost down plan
2010/08/25
Reserve this signal to EC by SW demand
2011/10/18a
Follow EC check list demand,
but don't implement CLKRUN# this fuction
Reserve this signal to EC by SW demand
2011/10/18a
reserve for SW-node noise issue
place close to PCH 11/29
INT.PH 20K
INT.PH 20K
INT.PD 20K
INT.PH 20K
RH126 49.9_0402_1%RH126 49.9_0402_1%
1 2
RH151 330K_0402_5%@RH151 330K_0402_5%@12
CH23 0.01U_0402_25V7K
@
CH23 0.01U_0402_25V7K
@
1 2
RH282 0_0402_5%
@
RH282 0_0402_5%
@12
RH157 10K_0402_5%RH157 10K_0402_5%
12
CH24 0.01U_0402_25V7K
@
CH24 0.01U_0402_25V7K
@
1 2
DH2
CH751H-40PT_SOD323-2
DH2
CH751H-40PT_SOD323-2
21
RH234 10K_0402_5%RH234 10K_0402_5%
12
RH155 10K_0402_5%RH155 10K_0402_5%
12
RH279 10K_0402_5%RH279 10K_0402_5%
12
RH127 750_0402_1%RH127 750_0402_1%
1 2
RH163 10K_0402_5%RH163 10K_0402_5%
12
DH6
CH751H-40PT_SOD323-2
DH6
CH751H-40PT_SOD323-2
21
RH159 10K_0402_5%RH159 10K_0402_5%
1 2
CH25 0.01U_0402_25V7K
@
CH25 0.01U_0402_25V7K
@
1 2
RH160 10K_0402_5%RH160 10K_0402_5%
1 2
DMI
FDI
System Power Management
UH1C
PANTHER-POINT_FCBGA989
HM76R3@
DMI
FDI
System Power Management
UH1C
PANTHER-POINT_FCBGA989
HM76R3@
DMI0RXN
BC24
DMI1RXN
BE20
DMI2RXN
BG18
DMI3RXN
BG20
DMI0RXP
BE24
DMI1RXP
BC20
DMI2RXP
BJ18
DMI3RXP
BJ20
DMI0TXN
AW24
DMI1TXN
AW20
DMI2TXN
BB18
DMI3TXN
AV18
DMI0TXP
AY24
DMI1TXP
AY20
DMI2TXP
AY18
DMI3TXP
AU18
DMI_ZCOMP
BJ24
DMI_IRCOMP
BG25
FDI_RXN0 BJ14
FDI_RXN1 AY14
FDI_RXN2 BE14
FDI_RXN3 BH13
FDI_RXN4 BC12
FDI_RXN5 BJ12
FDI_RXN6 BG10
FDI_RXN7 BG9
FDI_RXP0 BG14
FDI_RXP1 BB14
FDI_RXP2 BF14
FDI_RXP3 BG13
FDI_RXP4 BE12
FDI_RXP5 BG12
FDI_RXP6 BJ10
FDI_RXP7 BH9
FDI_FSYNC0 AV12
FDI_FSYNC1 BC10
FDI_LSYNC0 AV14
FDI_LSYNC1 BB10
FDI_INT AW16
PMSYNCH AP14
SLP_SUS# G16
SLP_S3# F4
SLP_S4# H4
SLP_S5# / GPIO63 D10
SYS_RESET#
K3
SYS_PWROK
P12
PWRBTN#
E20
RI#
A10
WAKE# B9
SUS_STAT# / GPIO61 G8
SUSCLK / GPIO62 N14
ACPRESENT / GPIO31
H20
BATLOW# / GPIO72
E10
PWROK
L22
CLKRUN# / GPIO32 N3
SUSWARN#/SUSPWRDNACK/GPIO30
K16
RSMRST#
C21
DRAMPWROK
B13
SLP_LAN# / GPIO29 K14
APWROK
L10
DPWROK E22
DMI2RBIAS
BH21
SLP_A# G10
DSWVRMEN A18
SUSACK#
C12
RH161 330K_0402_5%RH161 330K_0402_5%
1 2
RH150 330K_0402_5%RH150 330K_0402_5%
12
RH132 0_0402_5%
@
RH132 0_0402_5%
@
1 2
T77 PADT77 PAD
RH281
0_0402_5%
RH281
0_0402_5%
1 2
CH103
0.1U_0402_10V7K
CH103
0.1U_0402_10V7K
1 2
RH128 0_0402_5%RH128 0_0402_5%
1 2
DH5
CH751H-40PT_SOD323-2
DH5
CH751H-40PT_SOD323-2
2 1
RH162 10K_0402_5%@RH162 10K_0402_5%@
1 2
RH256 8.2K_0402_5%@RH256 8.2K_0402_5%@
1 2
RH133 0_0402_5%
@
RH133 0_0402_5%
@
1 2
UH5
SN74AHC1G08DCKR_SC70-5
@
UH5
SN74AHC1G08DCKR_SC70-5
@
IN1
1
IN2
2
G
3
O4
P5
RH131 0_0402_5%RH131 0_0402_5%
1 2 T76 PADT76 PAD
RH280 10K_0402_5%
@
RH280 10K_0402_5%
@12
T78 PADT78 PAD
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CRT_IREF
PCH_PWM
LCD_TXOUT2-
LCD_TXOUT1-
LCD_TXOUT0-
LCD_TXCLK+
LCD_TXCLK-
LCD_EDID_CLK
LCD_EDID_DATA
UMA_ENBKL
UMA_ENVDD
LCTL_DATA
LCTL_CLK
LVDS_IBG
LCD_TXOUT2+
LCD_TXOUT1+
LCD_TXOUT0+
LCD_EDID_CLK
LCD_EDID_DATA
UMA_ENBKL
UMA_CRT_CLK
UMA_CRT_DATA
UMA_CRT_B
UMA_CRT_G
UMA_CRT_R
UMA_CRT_R
UMA_CRT_B
UMA_CRT_G
UMA_CRT_HSYNC
UMA_CRT_VSYNC
UMA_CRT_DATA
UMA_CRT_CLK
LCTL_CLK
LCTL_DATA
UMA_HDMI_TX2-
UMA_HDMI_TX2+
UMA_HDMI_TX1-
UMA_HDMI_TX0-
UMA_HDMI_TXC-
UMA_HDMI_TX1+
UMA_HDMI_TX0+
UMA_HDMI_TXC+
HDMI_HPDHDMI_HPD_UMA HDMI_HPD_UMA
LCD_TZOUT2-
LCD_TZOUT1-
LCD_TZOUT0-
LCD_TZCLK+
LCD_TZCLK-
LCD_TZOUT2+
LCD_TZOUT1+
LCD_TZOUT0+
PCH_PWM<22>
LCD_EDID_CLK<22>LCD_EDID_DATA<22>
UMA_ENVDD<22> UMA_ENBKL<22>
LCD_TXCLK+<22> LCD_TXCLK-<22>
LCD_TXOUT1-<22> LCD_TXOUT0-<22>
LCD_TXOUT2-<22>
LCD_TXOUT1+<22> LCD_TXOUT0+<22>
LCD_TXOUT2+<22>
UMA_CRT_DATA<23> UMA_CRT_CLK<23>
UMA_CRT_G<23> UMA_CRT_B<23>
UMA_CRT_R<23>
UMA_CRT_VSYNC<23> UMA_CRT_HSYNC<23>
UMA_HDMI_TX2- <24>
UMA_HDMI_TX2+ <24>
UMA_HDMI_TX1- <24>
UMA_HDMI_TX1+ <24>
UMA_HDMI_TX0- <24>
UMA_HDMI_TX0+ <24>
UMA_HDMI_TXC- <24>
UMA_HDMI_TXC+ <24>
UMA_HDMI_CLK <24>
UMA_HDMI_DATA <24>
HDMI_HPD <13,24,30>
LCD_TZCLK+<22> LCD_TZCLK-<22>
LCD_TZOUT1-<22> LCD_TZOUT0-<22>
LCD_TZOUT2-<22>
LCD_TZOUT1+<22> LCD_TZOUT0+<22>
LCD_TZOUT2+<22>
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
28 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
28 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
28 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
HDMI
INT.PD 20K
INT.PD 20K
INT.PD 20K
INT.PD 20K
INT.PD 50
INT.PD 50
INT.PD 50
INT.PD 50
INT.PD 50
INT.PD 50
RH144 2.2K_0402_5%
OPT@
RH144 2.2K_0402_5%
OPT@
12
RH142 2.2K_0402_5%
OPT@
RH142 2.2K_0402_5%
OPT@
12
RH143 2.37K_0402_1%
OPT@
RH143 2.37K_0402_1%
OPT@
1 2
RH140
2.2K_0402_5%
IHDMI@
RH140
2.2K_0402_5%
IHDMI@
12
RH146 2.2K_0402_5%
OPT@
RH146 2.2K_0402_5%
OPT@
12
RH138
1K_0402_5%
DIS@
RH138
1K_0402_5%
DIS@
RH154 150_0402_1%
OPT@
RH154 150_0402_1%
OPT@
1 2
RH156 150_0402_1%
OPT@
RH156 150_0402_1%
OPT@
1 2
RH138 1K_0402_0.5%
OPT@
RH138 1K_0402_0.5%
OPT@
12
RH125 100K_0402_5%
OPT@
RH125 100K_0402_5%
OPT@
1 2
T79 PADT79 PAD
RH139
2.2K_0402_5%
IHDMI@
RH139
2.2K_0402_5%
IHDMI@
12
RH141 100K_0402_5%RH141 100K_0402_5%
12
RH149 2.2K_0402_5%
OPT@
RH149 2.2K_0402_5%
OPT@
12
RH145 2.2K_0402_5%
OPT@
RH145 2.2K_0402_5%
OPT@
12
RH255 100K_0402_5%RH255 100K_0402_5%
12
RH148 2.2K_0402_5%
OPT@
RH148 2.2K_0402_5%
OPT@
12
RH283
0_0402_5%
IHDMI@
RH283
0_0402_5%
IHDMI@
12
LVDS
Digital Display Interface
CRT
UH1D
PANTHER-POINT_FCBGA989
HM76R3@
LVDS
Digital Display Interface
CRT
UH1D
PANTHER-POINT_FCBGA989
HM76R3@
L_BKLTCTL
P45
L_BKLTEN
J47
L_CTRL_CLK
T45
L_CTRL_DATA
P39
L_DDC_CLK
T40
L_DDC_DATA
K47
L_VDD_EN
M45
LVDSA_CLK#
AK39
LVDSA_CLK
AK40
LVDSA_DATA#0
AN48
LVDSA_DATA#1
AM47
LVDSA_DATA#2
AK47
LVDSA_DATA#3
AJ48
LVDSA_DATA0
AN47
LVDSA_DATA1
AM49
LVDSA_DATA2
AK49
LVDSA_DATA3
AJ47
LVDSB_CLK#
AF40
LVDSB_CLK
AF39
LVDSB_DATA#0
AH45
LVDSB_DATA#1
AH47
LVDSB_DATA#2
AF49
LVDSB_DATA#3
AF45
LVDSB_DATA0
AH43
DDPB_0N AV42
DDPB_1N AV45
LVD_VREFH
AE48
LVD_VREFL
AE47
DDPD_2N BF42
DDPD_3N BJ42
DDPB_2N AU48
DDPB_3N AV47
DDPC_0N AY47
DDPC_1N AY43
DDPC_2N BA47
DDPC_3N BB47
DDPD_0N BB43
DDPD_1N BF44
DDPB_0P AV40
DDPB_1P AV46
DDPD_2P BE42
DDPD_3P BG42
DDPB_2P AU47
DDPB_3P AV49
LVDSB_DATA1
AH49
LVDSB_DATA2
AF47
LVDSB_DATA3
AF43
LVD_IBG
AF37
LVD_VBG
AF36
DDPC_1P AY45
DDPC_0P AY49
DDPC_2P BA48
DDPC_3P BB49
DDPD_0P BB45
DDPD_1P BE44
CRT_BLUE
N48
CRT_DDC_CLK
T39
CRT_DDC_DATA
M40
CRT_GREEN
P49
CRT_HSYNC
M47
CRT_IRTN
T42
CRT_RED
T49
CRT_VSYNC
M49
DAC_IREF
T43
SDVO_CTRLCLK P38
SDVO_CTRLDATA M39
DDPC_CTRLCLK P46
DDPC_CTRLDATA P42
DDPD_CTRLCLK M43
DDPD_CTRLDATA M36
DDPB_AUXN AT49
DDPC_AUXN AP47
DDPD_AUXN AT45
DDPB_AUXP AT47
DDPC_AUXP AP49
DDPD_AUXP AT43
DDPB_HPD AT40
DDPC_HPD AT38
DDPD_HPD BH41
SDVO_TVCLKINP AP45
SDVO_TVCLKINN AP43
SDVO_STALLP AM40
SDVO_STALLN AM42
SDVO_INTP AP40
SDVO_INTN AP39
RH152 150_0402_1%
OPT@
RH152 150_0402_1%
OPT@
1 2
RH254
100K_0402_5%
RH254
100K_0402_5%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCH_GPIO52
CLK_PCH
PCH_GPIO2
PCH_GPIO5
ODD_DA#
PCH_GPIO4
PLT_RST#
PCH_GPIO4
PCI_PIRQD#
PCI_PIRQA#
PCI_PIRQC#
PCI_PIRQB#
PCI_PME#
USBBIAS
CLK_EC_R
ODD_DA#
PCI_PIRQD#
CLK_SIO
PLTRST_VGA#
PLT_RST#
PLT_RST#
PCH_GPIO55
PCH_GPIO19
RF_OFF#
USB20_P2
USB20_N2
USB20_N0
USB20_P1
USB20_P0
USB20_N1
USB20_P9
USB20_N9
USB20_N8
USB20_P8
USB20_P11
USB20_N11
USB20_P12
USB20_N12
USB20_P10
USB20_N10
SLP_CHG_M3
SLP_CHG_M4
USB_OC#0
USB_OC#2
USB_OC#1
USBA30_SMI#
USB_OC#5
USB30_SMI#
USBA30_SMI#
USB_OC#1
USB_OC#0
USB_OC#2
DGPU_RST#
PCH_GPIO53
DGPU_PWR_EN
DGPU_PWR_EN
DGPU_PWR_EN
DGPU_RST#
RF_OFF#
SLP_CHG_M3
SLP_CHG_M4
USB_OC#5
PLT_RST#
NV_ALE
NV_ALE
USB20_P13
USB20_N13
U3TXDP2
U3TXDN2
U3TXDP1
U3TXDN1
U3RXDN3_R
U3RXDN4_R
U3RXDP4_R
U3RXDP3_R
U3RXDP2_R
U3RXDP1_R
U3TXDP4
U3TXDN4
U3TXDP3
U3TXDN3
U3RXDN1_R
U3RXDN2_R
USB20_P3
USB20_N3
USB30_SMI#
PCI_PIRQB#
ODD_DA#
PCI_PIRQC#
PCH_GPIO2
PCI_PIRQA#
PCH_GPIO53
RF_OFF#
PCH_GPIO52
PCH_GPIO5
PCH_GPIO55
PCH_GPIO55
DGPU_RST#
CLK_PCILOOP<26>
PLT_RST#<5,36,37,38,40,44,45>
CLK_PCI_EC<44>
CLK_PCI_DDR<45>
VGA_PWROK<30,47,58> PLTRST_VGA# <13>
USB20_P2 <34>
USB20_N2 <34>
USB20_P1 <39>
USB20_N1 <39>
USB20_P0 <39>
USB20_N0 <39>
USB20_N9 <36>
USB20_P9 <36>
USB20_N8 <35>
USB20_P8 <35>
USB20_P11 <22>
USB20_N11 <22>
USB20_P12 <36>
USB20_N12 <36>
USB20_N10 <36>
USB20_P10 <36>
USB_OC#0 <39,44>
USB_OC#1 <34,40,44>
DGPU_PWR_EN<47,58>
PCH_GPIO19 <25>
RF_OFF#<36>
SLP_CHG_M3 <34>
SLP_CHG_M4 <34>
ODD_DA#<34>
USB20_P13 <22>
USB20_N13 <22>
U3TXDN1<39>
U3TXDP2<39>
U3TXDN2<39>
U3TXDP1<39>
U3TXDN3<34>
U3TXDP4<34>
U3TXDN4<34>
U3TXDP3<34>
U3RXDP4_R<34>
U3RXDN4_R<34>
U3RXDP3_R<34>
U3RXDN3_R<34>
U3RXDP2_R<39> U3RXDP1_R<39>
U3RXDN2_R<39> U3RXDN1_R<39>
USB20_P3 <34>
USB20_N3 <34>
USBA30_SMI# <40>
+3VS
+3VS
+3VALW_PCH
+1.8VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
29 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
29 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
29 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
For Optimus
Low= A16 swap override Enable
High= A16 swap override Disable
PCH_GPIO19 Boot BIOS Loaction
01
RF_OFF#
1
SPI
PCI
LPC
Boot BIOS Strap
11
0
00
A16 Swap Override Strap
Reserved
WL_OFF#
*
*
USB-Left1
USB-RIGHT2
USB-RIGHT1
EHCI 1
EHCI 2
Finger Printer
Int. Camera
WiMax
3G/ TV tuner #2
TV Tuner #1
Within 500 mils
USB-Right
USB-Left
For Optimus
Intel Anti-Theft Techonlogy
*
NV_ALE High=Endabled
Low=Disable(floating)
Glasses free 3D Panel
USB-Left2
by ESD requestion and place near CPU
INT.PU 20K
INT.PU 20K
INT.PU 20K
INT.PU 20K
INT.PD 20K
INT.PD 20K
INT.PD 20K
INT.PD 20K
INT.PD 20K
INT.PD 20K
RH284
0_0402_5%
OPT@
RH284
0_0402_5%
OPT@
12
RH177 10K_0402_5%RH177 10K_0402_5%
1 2
RH186 10K_0402_5%RH186 10K_0402_5%
1 2
CH22
47P_0402_50V8J
@
CH22
47P_0402_50V8J
@
12
RH3218.2K_0402_5% RH3218.2K_0402_5%
1 2
RSVD
PCI
USB
UH1E
PANTHER-POINT_FCBGA989
HM76R3@
RSVD
PCI
USB
UH1E
PANTHER-POINT_FCBGA989
HM76R3@
RSVD23 AV5
RSVD1 AY7
RSVD2 AV7
RSVD3 AU3
RSVD4 BG4
RSVD5 AT10
RSVD6 BC8
RSVD7 AU2
RSVD8 AT4
RSVD17 BB5
RSVD18 BB3
RSVD19 BB7
RSVD20 BE8
RSVD21 BD4
RSVD22 BF6
RSVD9 AT3
RSVD10 AT1
RSVD11 AY3
RSVD12 AT5
RSVD13 AV3
RSVD14 AV1
RSVD15 BB1
RSVD16 BA3
RSVD25 AT8
RSVD24 AV10
RSVD26 AY5
RSVD27 BA2
RSVD28 AT12
RSVD29 BF3
PIRQA#
K40
PIRQB#
K38
PIRQC#
H38
PIRQD#
G38
REQ1# / GPIO50
C46
REQ2# / GPIO52
C44
REQ3# / GPIO54
E40
GNT1# / GPIO51
D47
GNT2# / GPIO53
E42
GNT3# / GPIO55
F46
PIRQE# / GPIO2
G42
PIRQF# / GPIO3
G40
PIRQG# / GPIO4
C42
PIRQH# / GPIO5
D44
USBP0N C24
USBP0P A24
USBP1N C25
USBP1P B25
USBP2N C26
USBP2P A26
USBP3N K28
USBP3P H28
USBP4N E28
USBP4P D28
USBP5N C28
USBP5P A28
USBP6N C29
USBP6P B29
USBP7N N28
USBP7P M28
USBP8N L30
USBP8P K30
USBP9N G30
USBP9P E30
USBP10N C30
USBP10P A30
USBP11N L32
USBP11P K32
USBP12N G32
USBP12P E32
USBP13N C32
USBP13P A32
PME#
K10
CLKOUT_PCI0
H49
CLKOUT_PCI1
H43
CLKOUT_PCI2
J48
USBRBIAS# C33
USBRBIAS B33
OC0# / GPIO59 A14
OC1# / GPIO40 K20
OC2# / GPIO41 B17
OC3# / GPIO42 C16
OC4# / GPIO43 L16
OC5# / GPIO9 A16
OC6# / GPIO10 D14
OC7# / GPIO14 C14
CLKOUT_PCI4
H40 CLKOUT_PCI3
K42
PLTRST#
C6
TP1
BG26
TP2
BJ26
TP3
BH25
TP6
AH38
TP7
AH37
TP8
AK43
TP9
AK45
TP16
Y13
TP17
K24
TP18
L24
TP19
AB46
TP20
AB45
TP21
B21
TP22
M20
TP23
AY16
USB3Rn1
BE28
USB3Rn2
BC30
USB3Rn3
BE32
USB3Rn4
BJ32
USB3Rp1
BC28
USB3Rp2
BE30
USB3Rp3
BF32
USB3Rp4
BG32
USB3Tn1
AV26
USB3Tn2
BB26
USB3Tn3
AU28
USB3Tn4
AY30
USB3Tp1
AU26
USB3Tp2
AY26
USB3Tp3
AV28
USB3Tp4
AW30
TP4
BJ16
TP5
BG16
TP15
AM5 TP14
AM4 TP13
AH12 TP12
H3 TP11
N30 TP10
C18
TP24
BG46
CH30 0.1U_0402_10V7K
OPT@
CH30 0.1U_0402_10V7K
OPT@
1 2
RH286 0_0402_5%
OPT@
RH286 0_0402_5%
OPT@
12
CH29
5P_0402_50V8C
@CH29
5P_0402_50V8C
@
1
2
RH299 8.2K_0402_5%RH299 8.2K_0402_5%
12
RH326 8.2K_0402_5%RH326 8.2K_0402_5%
12
RH16722_0402_5% RH16722_0402_5% 1 2
RH200 10K_0402_5%RH200 10K_0402_5%
1 2
RH164 1K_0402_5%
@
RH164 1K_0402_5%
@
1 2
RH291 1K_0402_5%
@
RH291 1K_0402_5%
@
1 2
RH305 8.2K_0402_5%RH305 8.2K_0402_5%
1 2
RH192 10K_0402_5%RH192 10K_0402_5%
1 2
RH3208.2K_0402_5% RH3208.2K_0402_5%
1 2
CH1040.1U_0402_10V7K @CH1040.1U_0402_10V7K @
12
RH170 0_0402_5%
DIS@
RH170 0_0402_5%
DIS@
12
RH2951K_0402_5% @RH2951K_0402_5% @12
RH29222_0402_5% RH29222_0402_5% 1 2
RH3198.2K_0402_5% RH3198.2K_0402_5%
1 2
RH3248.2K_0402_5% RH3248.2K_0402_5%
1 2
RH287
1K_0402_5%
@
RH287
1K_0402_5%
@
1 2
RH3228.2K_0402_5% RH3228.2K_0402_5%
1 2
T80 PADT80 PAD
RH188 10K_0402_5%RH188 10K_0402_5%
1 2
RH165 22.6_0402_1%RH165 22.6_0402_1%
1 2
UH6
SN74AHC1G08DCKR_SC70-5
OPT@
UH6
SN74AHC1G08DCKR_SC70-5
OPT@
IN1
1
IN2
2
G
3
O4
P5
RH175 10K_0402_5%RH175 10K_0402_5%
1 2
RH173
100K_0402_5%
RH173
100K_0402_5%
1 2
RH209 10K_0402_5%RH209 10K_0402_5%
1 2
RH3188.2K_0402_5% RH3188.2K_0402_5%
1 2
RH196 10K_0402_5%RH196 10K_0402_5%
1 2
RH2931K_0402_5% @RH2931K_0402_5% @12
RH288
100K_0402_5%
OPT@
RH288
100K_0402_5%
OPT@
12
RH285 0_0402_5%
@
RH285 0_0402_5%
@
12
RH176 10K_0402_5%RH176 10K_0402_5%
1 2
RH290 8.2K_0402_5%RH290 8.2K_0402_5%
1 2
CH15330P_0402_50V7K CH15330P_0402_50V7K 12
RH2941K_0402_5% @RH2941K_0402_5% @12
RH16622_0402_5% RH16622_0402_5% 1 2
RH3258.2K_0402_5% RH3258.2K_0402_5%
1 2
RH183 10K_0402_5%RH183 10K_0402_5%
1 2
RH3238.2K_0402_5% RH3238.2K_0402_5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ODD_DETECT#
PCH_GPIO37
HDMI_HPD
GATEA20
PCH_GPIO1
PCH_GPIO6
BT_DET#
PCH_GPIO27
KB_RST#
PCH_GPIO28
ODD_DETECT#
EC_SMI#
PCH_GPIO12
H_PWRGOOD
PCH_THRMTRIP#
EC_SCI#
EC_LID_OUT#
EC_SMI#
PCH_GPIO12
PCH_GPIO49
ISDBT_DET
PCH_GPIO27
PCH_GPIO28
PCH_GPIO28
BT_DET#
PCH_GPIO6
PCH_GPIO1
EC_SCI#
EC_SMI#
ODD_EN#
3D_DET#
CIR_EN#
BT_ON#
PCH_GPIO35
CIR_EN#
CIR_EN#
PCH_GPIO49
ISDBT_DET
ISDBT_DET
OPTIMUS_EN#
KB_RST#
GATEA20
ODD_EN#
BT_ON#
HDMI_HPD
PCH_GPIO37
OPTIMUS_EN#
HDD2_DET#
HDD2_DET#
PCH_GPIO16
PCH_GPIO16
VGA_PWROK
OPTIMUS_EN#
NV_CLE
NV_CLE
EC_LID_OUT#
3D_DET#
H_PWRGOOD <5>
H_THERMTRIP# <5>
KB_RST# <44>
EC_SMI#<44>
ODD_DETECT#<34>
EC_SCI#<44>
HDMI_HPD<13,24,28>
ISDBT_DET<36>
GATEA20 <44>
ODD_EN# <47>
BT_ON#<36>
VGA_PWROK<29,47,58>
H_SNB_IVB# <5>
EC_LID_OUT#<44>
+3VALW_PCH
+3VS
+3VS
+1.8VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
B
30 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
B
30 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
B
30 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
This signal has weak internal
pull-up, can't be pulled low
*On-Die PLL Voltage Regulator
H: Enable
L: Disable
GPIO28
Integrated Clock Chip Enable (Removed)
H: Disable
L: Enable
GPIO8
Integrated clock enable functionality
is achieved by soft-strap
The current default is clock enable
*
OPTIMUS_EN#
OPTIMUS_EN#
SKU NonOPT
HL
Optimus
For Optimus
3D_DET#
3D_DET#
SKU Non3D
HL
3D
Set to VSS when LOW
Set to VCC when HIGH
DMI & FDI Termination Voltage
NV_CLE
Follow Compal ORB
and Intel Check list 460603 V1.5
HDD2_DET#
HDD2_DET#
SKU ONE HDD
HL
TWO HDD
INT.PD 20K
INT.PH 20K
INT.PD 20K
INT.PH 20K
INT.PH 20K
INT.PH 20K
INT.PH 20K
INT.PH 20K
INT.PH 20K
INT.PH 20K
INT.PH 20K
INT.PH 20K
INT.PH 20K
INT.PH 20K
INT.PD 20K
INT.PD 20K
INT.PD 350
RH195 10K_0402_5%RH195 10K_0402_5%
1 2
RH304 10K_0402_5%3D@RH304 10K_0402_5%3D@
1 2
RH179 10K_0402_5%RH179 10K_0402_5%
1 2
RH205 10K_0402_5%RH205 10K_0402_5%
1 2
RH197 10K_0402_5%RH197 10K_0402_5%
1 2
RH184 10K_0402_5%RH184 10K_0402_5%
1 2
RH190 10K_0402_5%RH190 10K_0402_5%
1 2
RH206 1K_0402_5%@RH206 1K_0402_5%@
1 2
RH207 10K_0402_5%RH207 10K_0402_5%
1 2
RH182 10K_0402_5%RH182 10K_0402_5%
1 2
RH307 47K_0402_5%RH307 47K_0402_5%
1 2
RH180 10K_0402_5%RH180 10K_0402_5%
1 2
RH296
100K_0402_5%
@
RH296
100K_0402_5%
@
1 2
RH301 10K_0402_5%
@
RH301 10K_0402_5%
@
1 2
RH194 100K_0402_5%RH194 100K_0402_5%
1 2
RH297 10K_0402_5%RH297 10K_0402_5%
1 2
CPU/MISC
NCTF
GPIO
UH1F
PANTHER-POINT_FCBGA989
HM76R3@
CPU/MISC
NCTF
GPIO
UH1F
PANTHER-POINT_FCBGA989
HM76R3@
GPIO27
E16
GPIO28
P8
GPIO24
E8
GPIO57
D6
LAN_PHY_PWR_CTRL / GPIO12
C4
VSS_NCTF_1
A4
VSS_NCTF_2
A44
VSS_NCTF_3
A45
VSS_NCTF_4
A46
VSS_NCTF_5
A5
VSS_NCTF_6
A6
VSS_NCTF_7
B3
VSS_NCTF_8
B47
VSS_NCTF_9
BD1
VSS_NCTF_10
BD49
VSS_NCTF_11
BE1
VSS_NCTF_12
BE49
TACH2 / GPIO6
H36
TACH0 / GPIO17
D40
TACH3 / GPIO7
E38
SATA3GP / GPIO37
M5
SATA5GP / GPIO49 / TEMP_ALERT#
V3
SCLOCK / GPIO22
T5
SLOAD / GPIO38
N2
SDATAOUT0 / GPIO39
M3
SDATAOUT1 / GPIO48
V13
PROCPWRGD AY11
RCIN# P5
PECI AU16
THRMTRIP# AY10
GPIO8
C10
BMBUSY# / GPIO0
T7
GPIO15
G2
TACH1 / GPIO1
A42
SATA2GP / GPIO36
V8
INIT3_3V# T14
STP_PCI# / GPIO34
K1
GPIO35
K4
SATA4GP / GPIO16
U2
VSS_NCTF_32 F49
A20GATE P4
TACH4 / GPIO68 C40
TACH6 / GPIO70 C41
TACH7 / GPIO71 A40
TACH5 / GPIO69 B41
VSS_NCTF_17 BH3
VSS_NCTF_18 BH47
VSS_NCTF_19 BJ4
VSS_NCTF_20 BJ44
VSS_NCTF_21 BJ45
VSS_NCTF_22 BJ46
VSS_NCTF_23 BJ5
VSS_NCTF_24 BJ6
VSS_NCTF_25 C2
VSS_NCTF_26 C48
VSS_NCTF_27 D1
VSS_NCTF_28 D49
VSS_NCTF_29 E1
VSS_NCTF_30 E49
VSS_NCTF_31 F1
TS_VSS4 AK10
TS_VSS3 AH10
TS_VSS2 AK11
TS_VSS1 AH8
NC_1 P37
VSS_NCTF_13
BF1
VSS_NCTF_14
BF49
VSS_NCTF_15 BG2
VSS_NCTF_16 BG48
DF_TVS AY1
RH199 10K_0402_5%
@
RH199 10K_0402_5%
@
12
RH202 10K_0402_5%RH202 10K_0402_5%
1 2
RH306 10K_0402_5%
CIR@
RH306 10K_0402_5%
CIR@
12
RH178 200K_0402_5%RH178 200K_0402_5%
1 2
T81 PADT81 PAD
RH204 1K_0402_5%RH204 1K_0402_5%
12
RH201 10K_0402_5%
OPT@
RH201 10K_0402_5%
OPT@
12
RH298 10K_0402_5%RH298 10K_0402_5%
1 2
RH308 1K_0402_5%@RH308 1K_0402_5%@
1 2
RH198 100K_0402_5%RH198 100K_0402_5%
12
RH189 1K_0402_5%RH189 1K_0402_5%
12
RH203 10K_0402_5%
OPTFHD@
RH203 10K_0402_5%
OPTFHD@
1 2
RH187
2.2K_0402_5%
RH187
2.2K_0402_5%
12
RH193 10K_0402_5%
DIS@
RH193 10K_0402_5%
DIS@
1 2
RH191 390_0402_5%RH191 390_0402_5%
1 2
RH203
10K_0402_5%
OPTHD@
RH203
10K_0402_5%
OPTHD@
RH181 10K_0402_5%
@
RH181 10K_0402_5%
@
1 2
RH185 10K_0402_5%RH185 10K_0402_5%
1 2
RH303 10K_0402_5%RH303 10K_0402_5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VCCAFDI_VRM
+VCCAFDI_VRM
+VCCP_VCCDMI
+1.05VS_VCC_DMI
+1.05VS_PCH +VCCA_DAC
+VCCA_LVDS
+VCCTX_LVDS
+VCCA_DAC_R
PCH_PWR_EN#
PCH_PWR_EN#<32,37,47>
+VCCAFDI_VRM
+VCCP_VCCDMI
+1.05VS_VCCP
+1.05VS_PCH
+1.05VS_PCH
+1.05VS_PCH
+1.05VS_PCH
+3VS
+1.05VS_VCCP
+1.8VS
+VCCP_VCCDMI
+3VS
+1.5VS
+1.8VS
+3VS
+3VS
+3VS
+3VALW +3VALW_PCH
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
31 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
31 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
31 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
75mA
1mA
1mA
60mA
1300mA
This pin can be left as NC if
On-Die VR is enabled (Default)
3709mA
20mA
190mA
VCCDFTERM
This pin can be left as NC if
On-Die VR is enabled (Default)
3.3
1.05
1.05
1.05
V_PROC_IO
V5REF
V5REF_Sus
Vcc3_3
VccADAC
VccADPLLA
VccADPLLB
Voltage Rail
VccCore
VccDMI
1.05
5
3.3
0.001
0.001
0.001
0.228
0.063
0.08
0.08
1.7
0.047
5
Voltage
S0 Iccmax
Current (A)
1.1
1.05VccIO 3.711
1.05VccASW 0.903
3.3VccSPI 0.01
3.3VccDSW 0.001
1.8 0.002VccDFTERM
3.3VccRTC N/A
3.3VccSus3_3
3.3VccSusHDA
0.095
0.01
VccVRM 1.5 0.167
1.05VccCLKDMI
VccALVDS 3.3
1.8VccTX_LVDS 0.04
0.001
0.07
PCH Power Rail Table
Refer to PCH EDS R1.0
VccSSC 1.05 0.095
VccDIFFCLKN 1.05 0.055
+3VALW to +3V_PCH
RH310 0_0402_5%DIS@RH310 0_0402_5%DIS@
1 2
CH33
1U_0402_6.3V6K
CH33
1U_0402_6.3V6K
1
2
CH51
0.1U_0402_10V7K
CH51
0.1U_0402_10V7K
1
2
CH46
1U_0402_6.3V6K
CH46
1U_0402_6.3V6K
1
2
CH97
0.1U_0402_25V6
@
CH97
0.1U_0402_25V6
@
1
2
CH43
10U_0603_6.3V6M
CH43
10U_0603_6.3V6M
1
2
CH36
0.1U_0402_10V7K
CH36
0.1U_0402_10V7K
1
2
RH221
0_0603_5%
RH221
0_0603_5%
1 2
CH34
1U_0402_6.3V6K
CH34
1U_0402_6.3V6K
1
2
RH316
20K_0402_5%~D
@
RH316
20K_0402_5%~D
@
12
RH309
1_0603_1%
RH309
1_0603_1%
1 2
RH213
0_0603_5%
RH213
0_0603_5%
1 2
CH50
0.1U_0402_10V7K
CH50
0.1U_0402_10V7K
1
2
RH317
47K_0402_5%
RH317
47K_0402_5%
12
T82PAD T82PAD
CH39
0.01U_0402_25V7K
OPT@
CH39
0.01U_0402_25V7K
OPT@
CH31
1U_0402_6.3V6K
CH31
1U_0402_6.3V6K
1
2
CH44
1U_0402_6.3V6K
CH44
1U_0402_6.3V6K
1
2
G
D
S
QH8
AO3413_SOT23
G
D
S
QH8
AO3413_SOT23
2
13
POWER
VCC CORE
DMI
VCCIO
CRTLVDS
FDI
DFT / SPI HVCMOS
UH1G
PANTHER-POINT_FCBGA989
HM76R3@
POWER
VCC CORE
DMI
VCCIO
CRTLVDS
FDI
DFT / SPI HVCMOS
UH1G
PANTHER-POINT_FCBGA989
HM76R3@
VCCCORE[1]
AA23
VCCCORE[2]
AC23
VCCCORE[3]
AD21
VCCCORE[4]
AD23
VCCCORE[5]
AF21
VCCCORE[6]
AF23
VCCCORE[7]
AG21
VCCCORE[8]
AG23
VCCCORE[9]
AG24
VCCCORE[10]
AG26
VCCCORE[11]
AG27
VCCCORE[12]
AG29
VCCCORE[13]
AJ23
VCCCORE[14]
AJ26
VCCCORE[15]
AJ27
VCCDFTERM[4] AJ17
VCCDFTERM[3] AJ16
VCCIO[17]
AN21
VCCIO[18]
AN26
VCCIO[19]
AN27
VCCIO[20]
AP21
VCCIO[23]
AP26
VCCIO[24]
AT24
VCCIO[15]
AN16
VCCIO[16]
AN17
VCCIO[21]
AP23
VCCIO[22]
AP24
VCCADAC U48
VCCTX_LVDS[1] AM37
VCCTX_LVDS[2] AM38
VCCALVDS AK36
VCCVRM[3] AT16
VCCVRM[2]
AP16
VCCAPLLEXP
BJ22
VccAFDIPLL
BG6
VCCIO[28]
AN19 VCCTX_LVDS[4] AP37
VCCTX_LVDS[3] AP36
VSSADAC U47
VSSALVDS AK37
VCCIO[27]
AP17
VCC3_3[6] V33
VCC3_3[7] V34
VCC3_3[3]
BH29 VCCDFTERM[2] AG17
VCCDFTERM[1] AG16
VCCDMI[1] AT20
VCCIO[25]
AN33
VCCIO[26]
AN34
VCCCORE[16]
AJ29
VCCCORE[17]
AJ31
VCCSPI V1
VCCCLKDMI AB36
VCCDMI[2]
AU20
CH37
10U_0603_6.3V6M
CH37
10U_0603_6.3V6M
1
2
CH98
0.1U_0402_10V7K~D
CH98
0.1U_0402_10V7K~D
1
2
T83PAD T83PAD
RH214
0_0805_5%
RH214
0_0805_5%12
CH102
0.1U_0402_10V7K~D
CH102
0.1U_0402_10V7K~D
1
2
PJ2
JUMP_43X79
@
PJ2
JUMP_43X79
@
11
2
2
CH47
1U_0402_6.3V6K
CH47
1U_0402_6.3V6K
1
2
CH49
1U_0402_6.3V6K
CH49
1U_0402_6.3V6K
1
2
LH2
BLM18PG181SN1D_0603
OPT@LH2
BLM18PG181SN1D_0603
OPT@
12
CH39
0_0402_5%
DIS@
CH39
0_0402_5%
DIS@
CH35
0.01U_0402_25V7K
CH35
0.01U_0402_25V7K
CH99
0.01U_0402_25V7K
CH99
0.01U_0402_25V7K
1
2
CH42
0.1U_0402_10V7K
CH42
0.1U_0402_10V7K
1
2
CH53
1U_0402_6.3V6K
CH53
1U_0402_6.3V6K
1
2
LH1
BLM18PG181SN1D_0603
LH1
BLM18PG181SN1D_0603
12
CH32
10U_0603_6.3V6M
CH32
10U_0603_6.3V6M
1
2
CH40
22U_0805_6.3V6M
OPT@
CH40
22U_0805_6.3V6M
OPT@
1
2
PJ4
JUMP_43X118
@PJ4
JUMP_43X118
@
11
2
2
CH45
1U_0402_6.3V6K
CH45
1U_0402_6.3V6K
1
2
CH38
0.01U_0402_25V7K
OPT@
CH38
0.01U_0402_25V7K
OPT@
CH48
1U_0402_6.3V6K
CH48
1U_0402_6.3V6K
1
2
RH208
0_0603_5%
OPT@
RH208
0_0603_5%
OPT@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+PCH_V5REF_SUS
+1.05VS_VCCDIFFCLKN
+1.05VM_VCCSUS
+PCH_V5REF_RUN
+VCCME_23
+VCCME_22
+PCH_V5REF_SUS
+VCCME_21
+VCCA_USBSUS
+VCCAFDI_VRM
+1.05VS_SATA3
+VCCRTCEXT
+VCCDIFFCLK
+V_CPU_IO
+1.05VM_VCCSUS
+VCCSST
+1.05VS_VCCDIFFCLKN
+VCCDIFFCLK
+VCCAFDI_VRM
+1.05VS_VCCADPLLB
+1.05VS_VCCADPLLA
+3VS_VCC_CLKF33
+PCH_VCCDSW
+VCCSUS
+3VS_VCC_CLKF33
+PCH_V5REF_RUN
+1.05VS_VCC_SATA
+1.05VS_VCCADPLLA
+1.05VS_VCCADPLLB
PCH_PWR_EN#<31,37,47>
+1.05VS_PCH
+1.05VS_PCH
+1.05VS_PCH
+5VS +3VS
+5VALW_PCH +3VALW_PCH
+1.05VS_PCH
+1.05VS_PCH
+3VALW_PCH
+1.05VS_PCH
+3VALW_PCH
+1.05VS_PCH
+3VALW_PCH
+1.05VS_PCH
+3VALW_PCH
+3VALW_PCH
+1.05VS_PCH
+3VS
+1.05VS_VCCP
+VCCAFDI_VRM
+RTCVCC
+1.05VS_SATA3
+1.05VS_PCH
+1.05VS_VCC_SATA
+1.05VS_PCH
+1.05VS_VCCDIFFCLKN
+3VS
+3VS
+3VS
+3VALW_PCH
+1.05VS_PCH
+5VALW_PCH+5VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
32 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
32 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
32 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
3mA
10mA
1mA
1mA
119mA
1mA
95mA
55mA
80mA
80mA
1010mA
This pin can be left as NC if
On-Die VR is enabled (Default)
This pin can be left as NC if
On-Die VR is enabled (Default)
This pin can be left as NC if
On-Die VR is enabled (Default)
"@" Avoid leakage
unmount CH83 by follow Compal ORB abd Intel CRB
Change RH232, RH237 to 10 ohm by follow Compal ORB abd Intel CRB
CH63 & CH71 are
different by Intel CRB.
CH95
10U_0603_6.3V6M
CH95
10U_0603_6.3V6M
1
2
RH311 0_0402_5%RH311 0_0402_5%
12
RH246
0_0805_5%
RH246
0_0805_5%12
CH91
0.1U_0402_10V7K
CH91
0.1U_0402_10V7K
1
2
CH72
0.1U_0402_10V7K
CH72
0.1U_0402_10V7K
1
2
CH86
4.7U_0603_6.3V6K
CH86
4.7U_0603_6.3V6K
1
2
G
D
S
QH6 AO3413_SOT23
G
D
S
QH6 AO3413_SOT23
2
13
CH58
0.1U_0402_10V7K
@
CH58
0.1U_0402_10V7K
@
12
LH5
10UH_LB2012T100MR_20%
LH5
10UH_LB2012T100MR_20%
1 2
RH232
10_0402_5%
RH232
10_0402_5%
12
CH76
0.1U_0402_10V7K
CH76
0.1U_0402_10V7K
1
2
CH59
0.1U_0402_10V7K~D
CH59
0.1U_0402_10V7K~D
1
2
CH61
0.1U_0402_10V7K
CH61
0.1U_0402_10V7K
1
2
RH237
10_0402_5%
RH237
10_0402_5%
12
DH4
CH751H-40PT_SOD323-2
DH4
CH751H-40PT_SOD323-2
21
CH96
1U_0402_6.3V6K
CH96
1U_0402_6.3V6K
1
2
CH62 1U_0402_6.3V6K
@
CH62 1U_0402_6.3V6K
@
1 2
CH88
0.1U_0402_10V7K
CH88
0.1U_0402_10V7K
1
2
RH249
0_0603_5%
RH249
0_0603_5%
1 2
POWER
SATA USB
Clock and Miscellaneous
HDA
CPURTC
PCI/GPIO/LPCMISC
UH1J
PANTHER-POINT_FCBGA989
HM76R3@
POWER
SATA USB
Clock and Miscellaneous
HDA
CPURTC
PCI/GPIO/LPCMISC
UH1J
PANTHER-POINT_FCBGA989
HM76R3@
DCPSUSBYP
V12
VCCASW[1]
AA19
VCCASW[2]
AA21
VCCASW[3]
AA24
VCCASW[5]
AA27
VCCASW[6]
AA29
VCCSUSHDA P32
VCCSUS3_3[6] P24
VCCIO[34] T26
VCCIO[4] AD17
VCCASW[7]
AA31
VCCASW[8]
AC26
VCCASW[9]
AC27
VCCASW[10]
AC29
VCCASW[11]
AC31
VCCASW[12]
AD29
V5REF P34
VCC3_3[4] T34
VCCRTC
A22
VCCSUS3_3[10] V24
VCCSUS3_3[9] V23
VCCSUS3_3[8] T24
VCCSUS3_3[7] T23
VCCIO[2] AC16
VCCADPLLB
BF47
VCCDIFFCLKN[1]
AF33
V5REF_SUS M26
VCCIO[3] AC17
DCPSUS[1]
T17
VCCSSC
AG33
VCCADPLLA
BD47
VCCVRM[4]
Y49
VCCACLK
AD49
DCPRTC
N16
VCCASW[4]
AA26
VCCDIFFCLKN[2]
AF34
VCCIO[7]
AF17
DCPSST
V16
VCCIO[5] AF13
VCCASW[22] T21
VCCASW[23] V21
VCCASW[21] T19
VCC3_3[1] AA16
VCC3_3[8] W16
VCCSUS3_3[2] N20
VCCSUS3_3[3] N22
VCCSUS3_3[4] P20
VCCSUS3_3[5] P22
VCCIO[29] N26
VCCIO[30] P26
VCCIO[31] P28
VCCIO[32] T27
V_PROC_IO
BJ8
VCCIO[33] T29
VCCDIFFCLKN[3]
AG34
VCCASW[13]
AD31
VCCASW[14]
W21
VCCASW[15]
W23
VCCASW[16]
W24
VCCASW[17]
W26
VCCASW[18]
W29
VCCASW[19]
W31
VCCASW[20]
W33
VCCIO[6] AF14
VCCVRM[1] AF11
VCCIO[12] AH13
VCCIO[13] AH14
VCC3_3[2] AJ2
VCCAPLLSATA AK1
DCPSUS[3]
AL24
VCCIO[14]
AL29
DCPSUS[4] AN23
VCCSUS3_3[1] AN24
VCCAPLLDMI2
BH23
DCPSUS[2]
V19
VCCDSW3_3
T16
VCC3_3[5]
T38
T84
PAD
T84
PAD
RH328
47K_0402_5%
RH328
47K_0402_5%
12
CH89
1U_0402_6.3V6K
CH89
1U_0402_6.3V6K
1
2
CH84
1U_0402_6.3V6K
CH84
1U_0402_6.3V6K
1
2
CH69
1U_0402_6.3V6K
CH69
1U_0402_6.3V6K
1
2
CH67
1U_0402_6.3V6K
CH67
1U_0402_6.3V6K
1
2
CH81
1U_0402_6.3V6K
CH81
1U_0402_6.3V6K
1
2
LH7
BLM18PG181SN1D_0603
LH7
BLM18PG181SN1D_0603
1 2
RH242
0_0805_5%
RH242
0_0805_5%
12
RH244
0_0603_5%
RH244
0_0603_5%
12
CH85
0.1U_0402_10V7K
CH85
0.1U_0402_10V7K
1
2
DH3
CH751H-40PT_SOD323-2
DH3
CH751H-40PT_SOD323-2
21
T85PAD T85PAD
CH54
1U_0402_6.3V6K
@
CH54
1U_0402_6.3V6K
@
1
2
LH8
BLM18PG181SN1D_0603
LH8
BLM18PG181SN1D_0603
1 2
RH312 0_0402_5%RH312 0_0402_5%
12
CH68
1U_0402_6.3V6K
CH68
1U_0402_6.3V6K
1
2
CH64
22U_0805_6.3V6M
CH64
22U_0805_6.3V6M
1
2
T86 PADT86 PAD
CH82
1U_0402_6.3V6K
CH82
1U_0402_6.3V6K
1
2
CH66 0.1U_0402_10V7KCH66 0.1U_0402_10V7K
1 2
RH228
20K_0402_5%~D
@
RH228
20K_0402_5%~D
@
12
CH56
1U_0402_6.3V6K
CH56
1U_0402_6.3V6K
1
2
RH314 0_0402_5%RH314 0_0402_5%
12
RH247
0_0603_5%
RH247
0_0603_5%
12
CH78
0.1U_0402_10V7K
CH78
0.1U_0402_10V7K
1
2
RH313
0_0603_5%
@RH313
0_0603_5%
@
12
CH63
0.1U_0402_10V7K
CH63
0.1U_0402_10V7K
1
2
CH55
0.1U_0402_10V7K
CH55
0.1U_0402_10V7K
1
2
CH73
10U_0603_6.3V6M
CH73
10U_0603_6.3V6M
1
2
CH71
1U_0603_10V6K
CH71
1U_0603_10V6K
1
2
CH75
0.1U_0402_10V7K
CH75
0.1U_0402_10V7K
1 2
PJ5
JUMP_43X39
@PJ5
JUMP_43X39
@
11
2
2
CH79
1U_0402_6.3V6K
CH79
1U_0402_6.3V6K
1
2
CH90
0.1U_0402_10V7K
CH90
0.1U_0402_10V7K
1
2
CH92
0.1U_0402_10V7K
CH92
0.1U_0402_10V7K
1
2
CH80
0.1U_0402_10V7K~D
CH80
0.1U_0402_10V7K~D
1
2
CH87
0.1U_0402_10V7K
CH87
0.1U_0402_10V7K
1
2
CH65
22U_0805_6.3V6M
CH65
22U_0805_6.3V6M
1
2
CH60
0.1U_0402_10V7K
CH60
0.1U_0402_10V7K
1
2
CH70
1U_0402_6.3V6K
CH70
1U_0402_6.3V6K
1
2
CH93
10U_0603_6.3V6M
CH93
10U_0603_6.3V6M
1
2
CH74
1U_0402_6.3V6K
CH74
1U_0402_6.3V6K
1
2
CH77
1U_0402_6.3V6K
CH77
1U_0402_6.3V6K
1
2
CH83
1U_0402_6.3V6K
@
CH83
1U_0402_6.3V6K
@
1
2
CH94
1U_0402_6.3V6K
CH94
1U_0402_6.3V6K
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
33 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
33 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
33 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
UH1I
PANTHER-POINT_FCBGA989
HM76R3@
UH1I
PANTHER-POINT_FCBGA989
HM76R3@
VSS[159]
AY4
VSS[160]
AY42
VSS[161]
AY46
VSS[162]
AY8
VSS[163]
B11
VSS[164]
B15
VSS[165]
B19
VSS[166]
B23
VSS[167]
B27
VSS[168]
B31
VSS[169]
B35
VSS[170]
B39
VSS[171]
B7
VSS[173]
BB12
VSS[174]
BB16
VSS[175]
BB20
VSS[176]
BB22
VSS[177]
BB24
VSS[178]
BB28
VSS[179]
BB30
VSS[180]
BB38
VSS[181]
BB4
VSS[182]
BB46
VSS[183]
BC14
VSS[184]
BC18
VSS[185]
BC2
VSS[186]
BC22
VSS[187]
BC26
VSS[188]
BC32
VSS[189]
BC34
VSS[190]
BC36
VSS[191]
BC40
VSS[192]
BC42
VSS[193]
BC48
VSS[194]
BD46
VSS[195]
BD5
VSS[196]
BE22
VSS[197]
BE26
VSS[198]
BE40
VSS[199]
BF10
VSS[200]
BF12
VSS[201]
BF16
VSS[202]
BF20
VSS[203]
BF22
VSS[204]
BF24
VSS[205]
BF26
VSS[206]
BF28
VSS[207]
BD3
VSS[208]
BF30
VSS[209]
BF38
VSS[210]
BF40
VSS[211]
BF8
VSS[212]
BG17
VSS[213]
BG21
VSS[214]
BG33
VSS[215]
BG44
VSS[216]
BG8
VSS[217]
BH11
VSS[218]
BH15
VSS[219]
BH17
VSS[220]
BH19
VSS[222]
BH27
VSS[223]
BH31
VSS[224]
BH33
VSS[225]
BH35
VSS[226]
BH39
VSS[227]
BH43
VSS[228]
BH7
VSS[229]
D3
VSS[230]
D12
VSS[231]
D16
VSS[232]
D18
VSS[233]
D22
VSS[234]
D24
VSS[235]
D26
VSS[236]
D30
VSS[237]
D32
VSS[264] K7
VSS[265] L18
VSS[266] L2
VSS[267] L20
VSS[268] L26
VSS[269] L28
VSS[270] L36
VSS[271] L48
VSS[272] M12
VSS[273] P16
VSS[274] M18
VSS[275] M22
VSS[276] M24
VSS[277] M30
VSS[278] M32
VSS[279] M34
VSS[280] M38
VSS[281] M4
VSS[282] M42
VSS[283] M46
VSS[284] M8
VSS[285] N18
VSS[286] P30
VSS[288] P11
VSS[289] P18
VSS[290] T33
VSS[291] P40
VSS[292] P43
VSS[293] P47
VSS[294] P7
VSS[295] R2
VSS[296] R48
VSS[297] T12
VSS[298] T31
VSS[299] T37
VSS[300] T4
VSS[301] W34
VSS[302] T46
VSS[303] T47
VSS[304] T8
VSS[305] V11
VSS[306] V17
VSS[307] V26
VSS[308] V27
VSS[309] V29
VSS[310] V31
VSS[311] V36
VSS[312] V39
VSS[313] V43
VSS[314] V7
VSS[315] W17
VSS[316] W19
VSS[238]
D34
VSS[239]
D38
VSS[240]
D42
VSS[241]
D8
VSS[242]
E18
VSS[243]
E26
VSS[244]
G18
VSS[245]
G20
VSS[246]
G26
VSS[247]
G28
VSS[248]
G36
VSS[249]
G48
VSS[250]
H12
VSS[251]
H18
VSS[317] W2
VSS[318] W27
VSS[319] W48
VSS[320] Y12
VSS[321] Y38
VSS[322] Y4
VSS[323] Y42
VSS[324] Y46
VSS[325] Y8
VSS[328] BG29
VSS[329] N24
VSS[330] AJ3
VSS[287] N47
VSS[252]
H22
VSS[253]
H24
VSS[254]
H26
VSS[255]
H30
VSS[256]
H32
VSS[257]
H34
VSS[258]
F3
VSS[262] K39
VSS[263] K46
VSS[259] H46
VSS[260] K18
VSS[261] K26
VSS[331] AD47
VSS[333] B43
VSS[334] BE10
VSS[335] BG41
VSS[337] G14
VSS[338] H16
VSS[340] T36
VSS[342] BG22
VSS[343] BG24
VSS[344] C22
VSS[345] AP13
VSS[172]
F45
VSS[221]
H10
VSS[346] M14
VSS[347] AP3
VSS[348] AP1
VSS[349] BE16
VSS[350] BC16
VSS[351] BG28
VSS[352] BJ28
UH1H
PANTHER-POINT_FCBGA989
HM76R3@
UH1H
PANTHER-POINT_FCBGA989
HM76R3@
VSS[1]
AA17
VSS[2]
AA2
VSS[3]
AA3
VSS[5]
AA34
VSS[6]
AB11
VSS[7]
AB14
VSS[8]
AB39
VSS[9]
AB4
VSS[10]
AB43
VSS[11]
AB5
VSS[12]
AB7
VSS[13]
AC19
VSS[14]
AC2
VSS[15]
AC21
VSS[16]
AC24
VSS[17]
AC33
VSS[18]
AC34
VSS[19]
AC48
VSS[20]
AD10
VSS[21]
AD11
VSS[22]
AD12
VSS[23]
AD13
VSS[24]
AD19
VSS[25]
AD24
VSS[26]
AD26
VSS[27]
AD27
VSS[28]
AD33
VSS[29]
AD34
VSS[30]
AD36
VSS[31]
AD37
VSS[33]
AD39
VSS[34]
AD4
VSS[35]
AD40
VSS[36]
AD42
VSS[37]
AD43
VSS[38]
AD45
VSS[39]
AD46
VSS[43]
AF10
VSS[44]
AF12
VSS[46]
AD16
VSS[47]
AF16
VSS[48]
AF19
VSS[49]
AF24
VSS[50]
AF26
VSS[51]
AF27
VSS[52]
AF29
VSS[53]
AF31
VSS[54]
AF38
VSS[55]
AF4
VSS[56]
AF42
VSS[57]
AF46
VSS[59]
AF7
VSS[60]
AF8
VSS[61]
AG19
VSS[62]
AG2
VSS[63]
AG31
VSS[64]
AG48
VSS[65]
AH11
VSS[66]
AH3
VSS[67]
AH36
VSS[68]
AH39
VSS[69]
AH40
VSS[70]
AH42
VSS[71]
AH46
VSS[72]
AH7
VSS[73]
AJ19
VSS[76]
AJ33
VSS[77]
AJ34
VSS[78]
AK12
VSS[79]
AK3
VSS[80] AK38
VSS[81] AK4
VSS[82] AK42
VSS[83] AK46
VSS[84] AK8
VSS[85] AL16
VSS[86] AL17
VSS[87] AL19
VSS[88] AL2
VSS[89] AL21
VSS[90] AL23
VSS[91] AL26
VSS[92] AL27
VSS[93] AL31
VSS[96] AL48
VSS[97] AM11
VSS[98] AM14
VSS[99] AM36
VSS[100] AM39
VSS[102] AM45
VSS[103] AM46
VSS[104] AM7
VSS[105] AN2
VSS[106] AN29
VSS[107] AN3
VSS[108] AN31
VSS[109] AP12
VSS[110] AP19
VSS[111] AP28
VSS[112] AP30
VSS[113] AP32
VSS[114] AP38
VSS[116] AP42
VSS[117] AP46
VSS[118] AP8
VSS[119] AR2
VSS[120] AR48
VSS[121] AT11
VSS[122] AT13
VSS[123] AT18
VSS[124] AT22
VSS[125] AT26
VSS[126] AT28
VSS[127] AT30
VSS[128] AT32
VSS[131] AT42
VSS[132] AT46
VSS[133] AT7
VSS[134] AU24
VSS[135] AU30
VSS[136] AV16
VSS[137] AV20
VSS[138] AV24
VSS[139] AV30
VSS[140] AV38
VSS[141] AV4
VSS[142] AV43
VSS[143] AV8
VSS[144] AW14
VSS[145] AW18
VSS[146] AW2
VSS[147] AW22
VSS[148] AW26
VSS[149] AW28
VSS[150] AW32
VSS[151] AW34
VSS[152] AW36
VSS[153] AW40
VSS[154] AW48
VSS[155] AV11
VSS[156] AY12
VSS[157] AY22
VSS[158] AY28
VSS[40]
AD8
VSS[42]
AE3
VSS[45]
AD14
VSS[115] AP4
VSS[0]
H5
VSS[58]
AF5
VSS[32]
AD38
VSS[4]
AA33
VSS[74]
AJ21
VSS[75]
AJ24
VSS[41]
AE2
VSS[129] AT34
VSS[130] AT39
VSS[101] AM43
VSS[95] AL34
VSS[94] AL33
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SATA_PTX_C_DRX_P0
SATA_PTX_C_DRX_N0
SATA_PRX_DTX_N0
SATA_PRX_DTX_P0
SATA_PTX_C_DRX_N2
SATA_PRX_DTX_P2
SATA_PRX_DTX_N2
SATA_PTX_C_DRX_P2
ODD_DA#
SLP_CHG_M4
SLP_CHG_M3
SLP_CHG_M4
USB20_P2_S
USB20_N2_S
U3TXDN3
U3TXDP3
U3TXDN4
U3TXDP4
U3TXDN4_C
U3TXDN3_C
U3RXDP3
U3RXDN3
U3TXDP3_C_LU3TXDP3_C
U3TXDN3_C_L
U3RXDP4
U3RXDN4
U3TXDP4_C_LU3TXDP4_C
U3TXDN4_C_L
U3RXDP3
U3RXDN3
U3TXDP3_C_L
U3TXDN3_C_L
U3RXDP4
U3RXDN4
U3TXDP4_C_L
U3TXDN4_C_L
U3RXDP4
U3RXDN4
U3TXDP4_C_L
U3TXDN4_C_L
U3RXDP3
U3RXDN3
U3TXDP3_C_L
U3TXDN3_C_L
USB20_P2_S_R
USB20_N2_S_R
USB20_P2_S
USB20_P3_S_R
USB20_N3_S_R
USB20_N2_S
USB20_P3_S
USB20_P2_S_R
USB20_N2_S_R
USB20_N3_S
USB20_P3_S_R
USB20_N3_S_R
USB0_GNDU3RXDN4
U3RXDP4
USB1_GNDU3RXDN3
U3RXDP3
U3TXDN4_C_L
U3TXDP4_C_L
U3TXDP3_C_L
U3TXDN3_C_L
USB_OC#1
USB_CHG_EN#
USB20_N3
USB20_P3
USB20_P2
USB20_N2
U2D_DN3
U2D_DP3
U2D_DP2
U2D_DN2
US20_N3
US20_P3
US20_N2
US20_P2
USB20_P3_S_R
USB20_N3_S_R
USB20_N2_S_R
USB20_P2_S_R
SLP_CHG_M3
USB20_N3_S
USB20_P3_S
SLP_CHG_CB2
SLP_CHG_CB2A
US20_N2
US20_P2
US20_P3
US20_N3
SATA_PTX_DRX_P0 <25>
SATA_PTX_DRX_N0 <25>
SATA_PRX_C_DTX_N0 <25>
SATA_PRX_C_DTX_P0 <25>
ODD_DETECT# <30>
SATA_PTX_DRX_N2 <25>
SATA_PRX_C_DTX_P2 <25>
SATA_PTX_DRX_P2 <25>
SATA_PRX_C_DTX_N2 <25>
ODD_DA# <29>
SLP_CHG_M4 <29>
U3TXDP3<29>
U3TXDN3<29>
U3TXDP4<29>
U3TXDN4<29>
U3RXDN3_R<29>
U3RXDP3_R<29>
U3RXDP4_R<29>
U3RXDN4_R<29>
USB_OC#1 <29,40,44>
USB_CHG_EN#<40,44>
U3TXDN4_C_L <40>
U3TXDP4_C_L <40>
U3RXDN4 <40>
U3RXDP4 <40>
U3TXDN3_C_L <40>
U3TXDP3_C_L <40>
U3RXDN3 <40>
U3RXDP3 <40>
USB20_N3 <29>
USB20_N2 <29>
USB20_P2 <29>
USB20_P3 <29>
U2D_DN3 <40>
U2D_DP3 <40>
U2D_DN2 <40>
U2D_DP2 <40>
SLP_CHG_M3<29>
+5VS
+3VS
+5VS
+5VS_ODD +5VS_ODD
+5VALW
+5VALW
+USB_VCCA
+USB_VCCC
+USB_VCCA
+5VALW
+USB_VCCA
+USB_VCCC
+USB_VCCC
+5VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
34 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
34 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
34 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Place closely JHDD SATA CONN.
SATA HDD
Conn. SATA ODD Conn
1.2A
Close to JHDD
1.1A Place components closely ODD CONN.
USB Sleep & Charge Auto-Mode/Mode3
USB Right-Side
W=80mils
W=80mils
For EMI
W=80mils
2.5A W=80mils
SA00004KB00
SA00003TV00
W=80mils
For EMI
W=80mils
2.5A
SA00004KB00
SA00003TV00
Force Apple 2A Charger Mode: Apple 2A resistor dividers
MAX14600 & MAX14617
CB1
SLP_CHG_M3
1
0
CB0
SLP_CHG_M4 STATUS
0
Force Dedicated charger mode
(MODE3)
AUTO MODE
Pass-Through (USB) Mode:
Connect DP/DM to TDP/TDM
11 Pass-Through (USB) Mode with CDP Emulation:
Auto Connect DP/DM to TDP/TDM depending on CDP status
XX1
0
0
0
0
CB2
(14617 only)
0
0
1
+
C897
220U_6.3V_M_R15
+
C897
220U_6.3V_M_R15
1
2
R87 0_0402_5%
@
R87 0_0402_5%
@
1 2
R1453
0_0402_5%@R1453
0_0402_5%@
1 2
C368 0.01U_0402_25V7KC368 0.01U_0402_25V7K
1 2
R77 0_0402_5%
@
R77 0_0402_5%
@
1 2
L56
KINGCORE WCM-2012HS-670T
IUSB30@L56
KINGCORE WCM-2012HS-670T
IUSB30@
1
122
33
4
4
C362
4.7U_0805_10V4Z
@
C362
4.7U_0805_10V4Z
@
1
2
C359
0.1U_0402_10V7K
C359
0.1U_0402_10V7K
1
2
C378 0.01U_0402_25V7KC378 0.01U_0402_25V7K
1 2
L59
KINGCORE WCM-2012HS-670T
IUSB30@L59
KINGCORE WCM-2012HS-670T
IUSB30@
1
122
33
4
4
C902 0.1U_0402_10V7KC902 0.1U_0402_10V7K
1
2
R1465 0_0402_5%
EUSB30@
R1465 0_0402_5%
EUSB30@
1 2
+
C911
220U_6.3V_M_R15
+
C911
220U_6.3V_M_R15
1
2
U15
SY6288DCAC_MSOP8
U15
SY6288DCAC_MSOP8
GND
1
IN
2
IN
3
EN/ENB
4
OCB 5
OUT 6
OUT 7
OUT 8
L60
KINGCORE WCM-2012HS-670T
IUSB30@L60
KINGCORE WCM-2012HS-670T
IUSB30@
1
122
33
4
4
C893
0.1U_0402_10V7K
C893
0.1U_0402_10V7K
1
2
D85
AZC199-02SPR7G_SOT23-3
@D85
AZC199-02SPR7G_SOT23-3
@
2
2
3
311
U5
MAX14600ETA+T_TDFN-EP8_2X2
14600@
U5
MAX14600ETA+T_TDFN-EP8_2X2
14600@
CEN
1
DP
3
CB1
4
DM
2
VCC 5
TDP 6
CB0 8
TDM 7
PGND
9
C906 0.1U_0402_10V7K
IUSB30@
C906 0.1U_0402_10V7K
IUSB30@
1 2
R1444
0_0603_5%
R1444
0_0603_5%
12
R1452
0_0402_5%
@R1452
0_0402_5%
@
1 2
C898
0.1U_0402_10V7K
C898
0.1U_0402_10V7K
1
2
C903 0.1U_0402_10V7K
IUSB30@
C903 0.1U_0402_10V7K
IUSB30@
1 2
C379
1U_0402_6.3V6K
@
C379
1U_0402_6.3V6K
@
1
2
R1463 0_0402_5%
EUSB30@
R1463 0_0402_5%
EUSB30@
1 2
C364
4.7U_0805_10V4Z
@
C364
4.7U_0805_10V4Z
@
1
2
C901
1000P_0402_50V7K
C901
1000P_0402_50V7K
1
2
R1449
0_0402_5%@R1449
0_0402_5%@
1 2
C355
10U_0805_10V4Z
C355
10U_0805_10V4Z
1
2
L54
WCM-2012-900T_0805
L54
WCM-2012-900T_0805
11
2
2
3
344
C377 0.01U_0402_25V7KC377 0.01U_0402_25V7K
1 2
C370 0.01U_0402_25V7KC370 0.01U_0402_25V7K
1 2
R1448
0_0402_5%
@R1448
0_0402_5%
@
1 2
8
7
65
4
3
2
1
9
10
D87
YSCLAMP0524P_SLP2510P8-10-9
@
8
7
65
4
3
2
1
9
10
D87
YSCLAMP0524P_SLP2510P8-10-9
@
4
5
1
6
2
7
3
9
8
C899
1000P_0402_50V7K
C899
1000P_0402_50V7K
1
2
R1461 0_0402_5% IUSB30@R1461 0_0402_5% IUSB30@
1 2
R88 0_0402_5%
@
R88 0_0402_5%
@
1 2
JODD
SANTA_204901-1
@
JODD
SANTA_204901-1
@
GND 1
A+ 2
A- 3
GND 4
B- 5
B+ 6
GND 7
DP 8
+5V 9
+5V 10
MD 11
GND 12
GND 13
GND
14 GND
15
U8
MAX14617ETA+T
14617@U8
MAX14617ETA+T
14617@
R1450
0_0402_5%
@R1450
0_0402_5%
@
1 2
8
7
65
4
3
2
1
9
10
D88
YSCLAMP0524P_SLP2510P8-10-9
@
8
7
65
4
3
2
1
9
10
D88
YSCLAMP0524P_SLP2510P8-10-9
@
4
5
1
6
2
7
3
9
8
JHDD
SANTA_190501-1
@
JHDD
SANTA_190501-1
@
GND 1
A+ 2
A- 3
GND 4
B- 5
B+ 6
GND 7
V33 8
V33 9
V33 10
GND 11
GND 12
GND 13
V5 14
V5 15
V5 16
GND 17
Reserved 18
GND 19
V12 20
V12 21
V12 22
GND
23
GND
24
R1464 0_0402_5%
EUSB30@
R1464 0_0402_5%
EUSB30@
1 2
R73 0_0402_5%
@
R73 0_0402_5%
@
1 2
C361 1000P_0402_50V7KC361 1000P_0402_50V7K
12
R1445
0_0603_5%
R1445
0_0603_5%
12
R1454
0_0402_5%
@R1454
0_0402_5%
@
1 2
U8
MAX14600ETA+T_TDFN-EP8_2X2
14600@
U8
MAX14600ETA+T_TDFN-EP8_2X2
14600@
CEN
1
DP
3
CB1
4
DM
2
VCC 5
TDP 6
CB0 8
TDM 7
PGND
9
C360
0.1U_0402_10V7K
C360
0.1U_0402_10V7K
1
2
R1446
0_0603_5%
R1446
0_0603_5%
12
D86
AZC199-02SPR7G_SOT23-3
@D86
AZC199-02SPR7G_SOT23-3
@
2
2
3
311
R1459 0_0402_5% IUSB30@R1459 0_0402_5% IUSB30@
1 2
C375 0.01U_0402_25V7KC375 0.01U_0402_25V7K
1 2
L58
KINGCORE WCM-2012HS-670T
IUSB30@L58
KINGCORE WCM-2012HS-670T
IUSB30@
1
122
33
4
4
C894 0.1U_0402_10V7KC894 0.1U_0402_10V7K
1
2
JUSBRR
OCTEK_USB-09EAEB
@
JUSBRR
OCTEK_USB-09EAEB
@
SSTX-
8
SSTX+
9
GND 10
GND 11
GND 12
GND 13
VBUS
1
D-
2
D+
3
GND
4
SSRX-
5
SSRX+
6
GND
7
C900
0.1U_0402_10V7K
C900
0.1U_0402_10V7K
1
2
C905 0.1U_0402_10V7K
IUSB30@
C905 0.1U_0402_10V7K
IUSB30@
1 2
U14
SY6288DCAC_MSOP8
U14
SY6288DCAC_MSOP8
GND
1
IN
2
IN
3
EN/ENB
4
OCB 5
OUT 6
OUT 7
OUT 8
R1462 0_0402_5%
EUSB30@
R1462 0_0402_5%
EUSB30@
1 2
C376 0.01U_0402_25V7KC376 0.01U_0402_25V7K
1 2
R1458 0_0402_5% IUSB30@R1458 0_0402_5% IUSB30@
1 2 L53
WCM-2012-900T_0805
L53
WCM-2012-900T_0805
11
2
2
3
344
C365
4.7U_0805_10V4Z
@
C365
4.7U_0805_10V4Z
@
1
2
C904 0.1U_0402_10V7K
IUSB30@
C904 0.1U_0402_10V7K
IUSB30@
1 2
R1455
0_0402_5%@R1455
0_0402_5%@
1 2
C380
0.1U_0402_10V7K
C380
0.1U_0402_10V7K
1
2
JUSBRF
OCTEK_USB-09EAEB
@
JUSBRF
OCTEK_USB-09EAEB
@
SSTX-
8
SSTX+
9
GND 10
GND 11
GND 12
GND 13
VBUS
1
D-
2
D+
3
GND
4
SSRX-
5
SSRX+
6
GND
7
C358
0.1U_0402_10V7K
C358
0.1U_0402_10V7K
1
2
R1470
0_0402_5%
14617@
R1470
0_0402_5%
14617@
1 2
C363 1000P_0402_50V7KC363 1000P_0402_50V7K
12
C892
0.1U_0402_10V7K
C892
0.1U_0402_10V7K
1
2
C356
10U_0805_10V4Z
C356
10U_0805_10V4Z
1
2
C369 0.01U_0402_25V7KC369 0.01U_0402_25V7K
1 2
R1451
0_0402_5%@R1451
0_0402_5%@
1 2
U5
MAX14617ETA+T
14617@U5
MAX14617ETA+T
14617@
R1447
0_0603_5%
R1447
0_0603_5%
12
R1460 0_0402_5% IUSB30@R1460 0_0402_5% IUSB30@
1 2
R1471
0_0402_5%
14617@
R1471
0_0402_5%
14617@ 12
C357
0.1U_0402_10V7K
C357
0.1U_0402_10V7K
1
2
C367 0.01U_0402_25V7KC367 0.01U_0402_25V7K
1 2
C354
10U_0805_10V4Z
C354
10U_0805_10V4Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+3VS_FP
USB20_N8
FP_GND
USB20_P8
BCIO
CPLGP1
BCPWON
BCRSTM
XBCLKM
B_R_BCRST
B_R_XBCCLK
B_BCRST
B_XBCCLK USB20_P8<29> USB20_N8<29>
BCIO <36>
BCPWON<36>
CPLGP1<36>
B_BCRST <36>
B_XBCCLK <36>
BCRSTM<36>
XBCLKM<36>
+3VS
+5VS_L_BCAS
+5VS_L_BCAS
+5VS
+5VALW
+5VS_L_BCAS
+5VS_L_BCAS
+5VS_BCAS +5VS_L_BCAS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
35 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
35 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
35 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Finger printer
Inrush current = 0A
B-CAS Circuit
For ESD
CS5
1U_0402_6.3V6K
BCAS@CS5
1U_0402_6.3V6K
BCAS@
1
2
JFP
JOINT_F1017WR-S-04P
@
JFP
JOINT_F1017WR-S-04P
@
1
12
23
34
4
GND
5GND
6
QS2B
2N7002DW-T/R7_SOT363-6
BCAS@
QS2B
2N7002DW-T/R7_SOT363-6
BCAS@
3
5
4
RS9 100_0402_5%
BCAS@
RS9 100_0402_5%
BCAS@
1 2
RS5
47K_0402_5%
BCAS@
RS5
47K_0402_5%
BCAS@
12
US2
SN74AHC1G08DCKR_SC70-5
BCAS@US2
SN74AHC1G08DCKR_SC70-5
BCAS@
IN1
1
IN2
2
G
3
O4
P5
C480
0.1U_0402_10V7K
FP@
C480
0.1U_0402_10V7K
FP@
1
2
E
C
B
QS4
2SB1197K_SOT23-3
BCAS@
E
C
B
QS4
2SB1197K_SOT23-3
BCAS@
2
31
RS8
2.2K_0402_5%
BCAS@
RS8
2.2K_0402_5%
BCAS@
12
D82
AZC199-02SPR7G_SOT23-3
@
D82
AZC199-02SPR7G_SOT23-3
@
22
33
1
1
RS12
10K_0402_5%
BCAS@RS12
10K_0402_5%
BCAS@
1 2
RS13
10K_0402_5%
BCAS@RS13
10K_0402_5%
BCAS@
12
CS2
0.01U_0402_25V7K
BCAS@
CS2
0.01U_0402_25V7K
BCAS@
1
2
RS7
10K_0402_5%
BCAS@
RS7
10K_0402_5%
BCAS@
12
R133
0_0603_5%
FP@
R133
0_0603_5%
FP@
12
RS14
1.5K_0402_5%
BCAS@RS14
1.5K_0402_5%
BCAS@
1 2
CS1
0.1U_0402_10V7K
BCAS@
CS1
0.1U_0402_10V7K
BCAS@
1
2
CS4
0.1U_0402_10V7K
BCAS@
CS4
0.1U_0402_10V7K
BCAS@
1
2
CS3
4.7U_0603_6.3V6K
BCAS@CS3
4.7U_0603_6.3V6K
BCAS@
1
2
G
D
S
QS1
AO3413_SOT23
BCAS@
G
D
S
QS1
AO3413_SOT23
BCAS@
2
1 3
RS1
10K_0402_5%
BCAS@RS1
10K_0402_5%
BCAS@
1 2
RS11 100_0402_5%
BCAS@
RS11 100_0402_5%
BCAS@
1 2
QS2A
2N7002DW-T/R7_SOT363-6
BCAS@
QS2A
2N7002DW-T/R7_SOT363-6
BCAS@
61
2
LS1
FBMA-L11-201209-221LMA30T_0805
BCAS@LS1
FBMA-L11-201209-221LMA30T_0805
BCAS@
1 2
R134
0_0603_5%
FP@
R134
0_0603_5%
FP@
1 2
US1
SN74AHC1G08DCKR_SC70-5
BCAS@US1
SN74AHC1G08DCKR_SC70-5
BCAS@
IN1
1
IN2
2
G
3
O4
P5
RS2
100K_0402_5%
BCAS@ RS2
100K_0402_5%
BCAS@
12
PLT_RST#
WLAN_OFF#
E51_RXD_R
LED_WIMAX#
BT_CTRL E51_RXD_R
BT_CTRL BT_CTRL_R
B_BCRST
COMMON
BCCDET
+VCC_SIM
SIM_DATA
SIM_RESET
SIM_CLK UIM_VPP
LED_WIMAX#
BCIO SIM_DATA
SATA_PTX_C_DRX_N1
SATA_PRX_DTX_N1
SATA_PRX_DTX_P1
SATA_PTX_C_DRX_P1
CPLGP1
SIM_RESET
B_XBCCLK
USB20_P10_TV
USB20_N10_TV
+VCC_SIM
SIM_CLK
COMMON
ISDBT_DET_R
BCCDET
UIM_VPP
BCIO
RF_OFF#
SATA_PTX_DRX_N1
SATA_PRX_C_DTX_N1
SATA_PRX_C_DTX_P1
SATA_PTX_DRX_P1
PCH_X1_R_R
LAN_X1_R_R
CLK_X2CLK_X1
LAN_X1_R_R
OSC_IN_R_R
CLK_X2
OSC_IN_R_R
LAN_X1_R_R
PCH_X1_RPCH_X1_R_R
CLK_X1
PCH_RTCX1_R
UIM_CLK
UIM_DATA
UIM_RESET
UIM_RESET
UIM_CLK
SIM_CLK
UIM_DATA
PM_SMBDATA
PM_SMBCLKUSB20_P10_TV
USB20_N10_TV
BT_CTRL
HWEQ_EN
ISDBT_DET_R
LAN_X1_R
WL_OFF# WLAN_OFF#
OSC_IN_R
PLT_RST#PLT_RST#_FULL
+3VALW_GCLK
CLKREQ_Q_TV#
PCIE_PRX_C_TVTX_P6
PCIE_PRX_C_TVTX_N6
SATA_PRX_DTX_P1
SATA_PRX_DTX_N1
PCIE_PTX_C_TVRX_N6
PCIE_PTX_C_TVRX_P6
SATA_PTX_C_DRX_N1
SATA_PTX_C_DRX_P1
CLKREQ_Q_TV#
USB20_P9 <29>
USB20_N9 <29>
CLKREQ_WLAN#<26>
CLK_WLAN#<26> CLK_WLAN<26>
PCIE_PRX_WLANTX_P2<26> PCIE_PRX_WLANTX_N2<26>
PCIE_PTX_C_WLANRX_N2<26> PCIE_PTX_C_WLANRX_P2<26>
PLT_RST# <5,29,37,38,40,44,45>
PM_SMBCLK <11,12,26,46>
PM_SMBDATA <11,12,26,46>
E51_TXD<44,45> E51_RXD<44,45>
LED_WIMAX# <46>
RF_OFF# <29>
USB20_P12 <29>
USB20_N12 <29>
CPLGP1 <35>
TMPTU1_SXP <44>
B_XBCCLK<35>
USB20_N10 <29>
USB20_P10 <29>
B_BCRST<35>
XBCLKM<35>
BCRSTM<35>
TMPTU2_SXP<44>
BCPWON<35>
BCIO <35>
BT_ON#<30>
SUSP<5,9,47>
AOAC_WAKE#<44>
SATA_PTX_DRX_N1 <25>
SATA_PTX_DRX_P1 <25>
SATA_PRX_C_DTX_N1 <25>
SATA_PRX_C_DTX_P1 <25>
PCH_RTCX1_R <25>
OSC_IN_R <42>
LAN_X1_R <37>
PCH_X1_R <26>
AOAC_EN#<44,47>
HWEQ_EN<42>
ISDBT_DET <30>
WL_OFF#<44>
PCIE_PRX_C_TVTX_N6 <26>
PCIE_PRX_C_TVTX_P6 <26>
PCIE_PTX_C_TVRX_N6 <26>
PCIE_PTX_C_TVRX_P6 <26>
CLKREQ_TV# <26>
CLK_TV<26> CLK_TV#<26>
+3V_WLAN
+3V_WLAN
+1.5VS
+1.5VS
+3V_WLAN
+3VS
+3VS
+3VS
+UIM_PWR
+5VS_BCAS
+1.5VS
+UIM_PWR
+3VS
+3V_LAN
+RTCBATT
+1.05VS_VCCP
+3VL+1.05VS_VCCP
+3VL
+RTCVCC
+3V_LAN
+UIM_PWR
+3V_WLAN
+3V_WLAN
+1.5VS
+1.5VS
+16VS
+3VALW
+3VS_280
+3VALW
+16VS
+3VS_280
+3V_WLAN
+5VS
+3VALW_PCH
+3VALW_GCLK
+3VALW
+3VS +3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
36 61
Thursday, February 16, 2012
2011/12/14 2012/12/31
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
36 61
Thursday, February 16, 2012
2011/12/14 2012/12/31
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
36 61
Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
WiMaxWLAN/ WiFi
Debug card using
For SED For SED
Slot 1 Half PCIe Mini Card-WLAN/ WiMax
40 mils
Enable Disable
LH
HL
BT
on module BT
on module
WLAN&BT Combo module circuits
BT_CRTL
BT_ON#
For isolate Intel Rainbow Peak and
Compal Debug Card.
2.75A
B-CAS
Slot 2 Full PCIe Mini Card- 3G/ TV Tuner
USB--TV#2
For SED
USB--3G/TV#1
Close to J3GTV
Add BCCDET pull down
120 mils
Reserved for Swing Level adjustment
( Close GCLK side )
For RF
For RF
please place near J3GTV
EMI request 11/06
EMI request 12/17
To avoid LED flashing
SA000058Z00
DM1
RLZ20A_LL34
3G@
DM1
RLZ20A_LL34
3G@
12
CM5
0.1U_0402_10V7K
CM5
0.1U_0402_10V7K
1
2
G
D
S
QCL2
2N7002_SOT23-3
271@
G
D
S
QCL2
2N7002_SOT23-3
271@
2
13
CM15
10P_0402_50V8J
3G@
CM15
10P_0402_50V8J
3G@
1
2
RM29
200K_0402_5%
WIMAX@
RM29
200K_0402_5%
WIMAX@
1 2
RM2
4.7K_0402_5%
@
RM2
4.7K_0402_5%
@
12
CM25
47P_0402_50V8J
@
CM25
47P_0402_50V8J
@
12
RM31 0_0402_5%TV@RM31 0_0402_5%TV@
1 2
CCL4
18P_0402_50V8J
GCLK@
CCL4
18P_0402_50V8J
GCLK@
1
2
CM14
22P_0402_50V8J
@
CM14
22P_0402_50V8J
@
1
2
G
D
S
QCL1
AO3413_SOT23
271@
G
D
S
QCL1
AO3413_SOT23
271@
2
1 3
RM33 0_0402_5%TV@RM33 0_0402_5%TV@
1 2
RM7 0_0402_5%
BCAS@
RM7 0_0402_5%
BCAS@
1 2
RM10 0_0402_5%
BCAS@
RM10 0_0402_5%
BCAS@
1 2
RCL9
0_0603_5% @RCL9
0_0603_5% @
1 2
CM23 0.01U_0402_25V7K
MSATA@
CM23 0.01U_0402_25V7K
MSATA@
1 2
RCL1 0_0402_5%
GCLK@
RCL1 0_0402_5%
GCLK@
1 2
CM4
0.01U_0402_25V7K
CM4
0.01U_0402_25V7K
1
2
CM2
0.1U_0402_10V7K
CM2
0.1U_0402_10V7K
1
2
RM4 0_0603_5%
BCAS@
RM4 0_0603_5%
BCAS@
1 2
CM17
47P_0402_50V8J
@
CM17
47P_0402_50V8J
@
12
CM24 0.01U_0402_25V7K
MSATA@
CM24 0.01U_0402_25V7K
MSATA@
1 2
CM7
0.01U_0402_25V7K
CM7
0.01U_0402_25V7K
1
2
CM3
4.7U_0805_10V4Z
CM3
4.7U_0805_10V4Z
1
2
CM21 0.01U_0402_25V7K
MSATA@
CM21 0.01U_0402_25V7K
MSATA@
1 2
CM1
0.01U_0402_25V7K
CM1
0.01U_0402_25V7K
1
2
RM8 0_0402_5%
BCAS@
RM8 0_0402_5%
BCAS@
1 2
G
D
S
QM2
2N7002_SOT23-3
TV@
G
D
S
QM2
2N7002_SOT23-3
TV@
2
13
CM11
0.01U_0402_50V7K
@
CM11
0.01U_0402_50V7K
@
1
2
RCL2 33_0402_5%
GCLK@
RCL2 33_0402_5%
GCLK@
1 2
RM25
0_0402_5%
RM25
0_0402_5%
1 2
RM13 0_0402_5%
TV@
RM13 0_0402_5%
TV@
1 2
CM12
47P_0402_50V8J
@
CM12
47P_0402_50V8J
@
12
CCL7
0.1U_0402_10V7K
271@
CCL7
0.1U_0402_10V7K
271@
1
2
RCL7
47K_0402_5%
271@
RCL7
47K_0402_5%
271@
1 2
RM30
0_0402_5%
TV@
RM30
0_0402_5%
TV@
RM34 0_0402_5%
TV@
RM34 0_0402_5%
TV@
1 2
RM16
0_0603_5%
BCAS@
RM16
0_0603_5%
BCAS@
1 2
RM22
8.2K_0402_5%
RM22
8.2K_0402_5%
1 2
RM17 0_0402_5%3G@
RM17 0_0402_5%3G@
1 2
RM23 0_0402_5%RM23 0_0402_5%
1 2
UM1
SN74AHC1G08DCKR_SC70-5
@
UM1
SN74AHC1G08DCKR_SC70-5
@
IN1
1
IN2
2
G
3
O4
P5
RM9 0_0402_5%
3G@
RM9 0_0402_5%
3G@
1 2
CCL9 0.1U_0402_10V7K
271@
CCL9 0.1U_0402_10V7K
271@
12
CM26
47P_0402_50V8J
@
CM26
47P_0402_50V8J
@
12
CCL5
18P_0402_50V8J
GCLK@
CCL5
18P_0402_50V8J
GCLK@
1
2
RM19 0_0402_5%
BCAS@
RM19 0_0402_5%
BCAS@
1 2
CCL12
4.7P_0402_50V8C
@
CCL12
4.7P_0402_50V8C
@
1
2
RM1 0_0603_5%
3G@
RM1 0_0603_5%
3G@
1 2
CM18
47P_0402_50V8J
@
CM18
47P_0402_50V8J
@
12
CM22 0.01U_0402_25V7K
MSATA@
CM22 0.01U_0402_25V7K
MSATA@
1 2
CCL13
0.1U_0402_10V7K
GCLK@
CCL13
0.1U_0402_10V7K
GCLK@
1
2
CM20
47P_0402_50V8J
@
CM20
47P_0402_50V8J
@
12
RCL6 0_0402_5%
271@
RCL6 0_0402_5%
271@
1 2
RM30 0_0402_5%
3G@
RM30 0_0402_5%
3G@
1 2
RM15
0_0603_5%
BCAS@
RM15
0_0603_5%
BCAS@
1 2
RM21 470_0402_5%
BCAS@
RM21 470_0402_5%
BCAS@
1 2
CM19
47P_0402_50V8J
@
CM19
47P_0402_50V8J
@
12
RM5 0_0402_5%
3G@
RM5 0_0402_5%
3G@
1 2
QM1B
2N7002DW-T/R7_SOT363-6
QM1B
2N7002DW-T/R7_SOT363-6
3
5
4
CCL10
5P_0402_50V8C
GCLK@
CCL10
5P_0402_50V8C
GCLK@
1
2
CM13
0.1U_0402_10V7K
3G@
CM13
0.1U_0402_10V7K
3G@
1
2
QM1A
2N7002DW-T/R7_SOT363-6
QM1A
2N7002DW-T/R7_SOT363-6
61
2
CM10
0.1U_0402_25V4Z
@
CM10
0.1U_0402_25V4Z
@
1
2
CM9
4.7U_0805_10V4Z
CM9
4.7U_0805_10V4Z
1
2
CM8
0.1U_0402_10V7K
CM8
0.1U_0402_10V7K
1
2
RCL5 0_0402_5%
@
RCL5 0_0402_5%
@
1 2
CCL2
0.1U_0402_10V7K
GCLK@
CCL2
0.1U_0402_10V7K
GCLK@
1
2
CCL8
0.01U_0402_25V7K
271@
CCL8
0.01U_0402_25V7K
271@
1
2
CM6
4.7U_0805_10V4Z
CM6
4.7U_0805_10V4Z
1
2
RCL8
0_0603_5%
RCL8
0_0603_5%
1 2
RM24
0_0402_5%
@RM24
0_0402_5%
@
1 2
RCL4
10K_0402_5%
271@
RCL4
10K_0402_5%
271@
1 2
RM18 0_0402_5%3G@
RM18 0_0402_5%3G@
1 2
RM3 0_0402_5%
3G@
RM3 0_0402_5%
3G@
1 2
CM16
10P_0402_50V8J
3G@
CM16
10P_0402_50V8J
3G@
1
2
RM28 100K_0402_5%
WIMAX@
RM28 100K_0402_5%
WIMAX@
1 2
JSIM
MOLEX_47273-0001~D
@JSIM
MOLEX_47273-0001~D
@
VCC
1
RST
2
CLK
3
GND 4
VPP 5
I/O 6
NC 8
NC
7
CCL3
0.1U_0402_10V7K
GCLK@
CCL3
0.1U_0402_10V7K
GCLK@
1
2
RM14 0_0402_5%
MSATA@
RM14 0_0402_5%
MSATA@
1 2
UCL1
SLG3NB271VTR TQFN 16P _2X3
GCLK@
UCL1
SLG3NB271VTR TQFN 16P _2X3
GCLK@
VDD
2
+V3.3A
15
VDDIO_25M_A
8
VDDIO_25M_B
3
XTAL_OUT
1
XTAL_IN
16
VSS
4
VSS
7
VBAT 10
NC 11
32K 9
NC 12
25M_B 5
25M_A 6
VDD_RTC_OUT 14
VSS
13
Thermal Pad
17
JWLAN
ACES_88914-5204
@
JWLAN
ACES_88914-5204
@
31
31 32 32
1
122
3
344
5
566
7
788
9
910 10
11
11 12 12
13
13 14 14
15
15 16 16
17
17 18 18
19
19 20 20
21
21 22 22
23
23 24 24
25
25 26 26
27
27 28 28
29
29 30 30
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
34 34
36 36
38 38
40 40
42 42
44 44
46 46
48 48
50 50
52 52
GND
53 GND 54
RM6 100K_0402_5%
@
RM6 100K_0402_5%
@
1 2
JPCIF
ACES_51711-0520W-001
@JPCIF
ACES_51711-0520W-001
@
31
31 32 32
1
122
3
344
5
566
7
788
9
910 10
11
11 12 12
13
13 14 14
15
15 16 16
17
17 18 18
19
19 20 20
21
21 22 22
23
23 24 24
25
25 26 26
27
27 28 28
29
29 30 30
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
34 34
36 36
38 38
40 40
42 42
44 44
46 46
48 48
50 50
52 52
GND
53 GND 54
RM35 10K_0402_5%
TV@
RM35 10K_0402_5%
TV@
12
CCL6
2.2U_0603_6.3V6K
GCLK@
CCL6
2.2U_0603_6.3V6K
GCLK@
1
2
CCL11
22U_0805_6.3V6M
GCLK@
CCL11
22U_0805_6.3V6M
GCLK@
1
2
YCL1 25MHZ 20PF X3G025000DK1H-X
GCLK@
YCL1 25MHZ 20PF X3G025000DK1H-X
GCLK@
GND
2
33
1
1
GND
4
RM20 0_0402_5%
BCAS@
RM20 0_0402_5%
BCAS@
1 2
RM12 0_0402_5%
BCAS@
RM12 0_0402_5%
BCAS@
1 2
CM27
47P_0402_50V8J
@
CM27
47P_0402_50V8J
@
12
RM11 0_0402_5%
3G@
RM11 0_0402_5%
3G@
1 2
CM28
47P_0402_50V8J
@
CM28
47P_0402_50V8J
@
12
RM27
1K_0402_5%
RM27
1K_0402_5%
1 2
RM32 0_0402_5%
TV@
RM32 0_0402_5%
TV@
1 2
CCL1
0.1U_0402_10V7K
GCLK@
CCL1
0.1U_0402_10V7K
GCLK@
1
2
RCL3 33_0402_5%
GCLK@
RCL3 33_0402_5%
GCLK@
1 2
RM26
0_0402_5%
RM26
0_0402_5%
1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
+LAN_REGOUT
+LAN_REGOUT
RJ45_MIDI3-
RJ45_MIDI1+
RJ45_MIDI2-
RJ45_MIDI0+
RJ45_MIDI0-
RJ45_MIDI3+
LAN_MDI0-
LAN_MDI2- RJ45_MIDI2+
RJ45_MIDI1-
LAN_MDI3+
LAN_MDI2+
LAN_MDI0+
LAN_MDI3-
LAN_MDI1+
LAN_MDI1-
PCIE_PTX_C_LANRX_P1
PCIE_PTX_C_LANRX_N1
PCIE_PRX_LANTX_P1
PCIE_PRX_LANTX_N1
LAN_MDI1+
LAN_MDI1-
LAN_MDI2-
LAN_MDI2+
LAN_MDI3+
LAN_MDI3-
LAN_MDI0-
LAN_MDI0+
CLK_LAN#
ENSWREG
CLK_LAN
ENSWREG
LAN_X2
LAN_X1
EC_SWI#
PLT_RST#
RJ45_GND LANGND
LAN_X2LAN_X1
LANCLK_REQ#
EC_SWI#
RJ45_MIDI0-
RJ45_MIDI0+
RJ45_MIDI2+
RJ45_MIDI2-
RJ45_MIDI1-
RJ45_MIDI3+
RJ45_MIDI3-
RJ45_MIDI1+
ISOLATE#
WOL_EN#ISOLATE#
LAN_MDI0-
LAN_MDI0+ RJ45_MIDI0-
RJ45_MIDI0+
LAN_MDI1+
LAN_MDI1- RJ45_MIDI1+
RJ45_MIDI1-
LAN_EN
LAN_EN
LANCLK_REQ#CLKREQ_LAN#
LAN_X2
PCIE_PTX_C_LANRX_N1<26> PCIE_PTX_C_LANRX_P1<26>
PCIE_PRX_C_LANTX_P1<26>
PCIE_PRX_C_LANTX_N1<26>
CLK_LAN#<26> CLK_LAN<26>
PLT_RST#<5,29,36,38,40,44,45>
CLKREQ_LAN#<26>
EC_SWI#<27,40>
WOL_EN#<44>
LAN_EN<26>
LAN_X1_R<36>
PCH_PWR_EN#
1
,32,47>
+LAN_EVDD10
+LAN_VDD10
+LAN_EVDD10+LAN_VDD10
+3V_LAN
+3V_LAN
+LAN_VDDREG
+3V_LAN
+LAN_VDD10
+LAN_VDDREG
+LAN_VDD10
+3V_LAN
+3VALW
+3VALW
+3V_LAN
+3V_LAN
+LAN_VDD10
+3V_LAN
+3VS
+3V_LAN
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
37 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
37 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
37 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Close to Pin 21
LAN Conn.
CL3 to CL6 close to Pin 27,39,47,48
CL7 to CL8 close to Pin 12,42
Layout Note: LL1 must be
within 200mil to Pin36,
CL13,CL9 must be within
200mil to LL1
For P/N and footprint
Please place them to ISPD page
Vgs=-4.5V,Id=3A,Rds<97mohm
+3VALW TO +3V_LAN
60 mils
CL19, CL20,CL21 close to pin 13,29,45, respectively
CL22 close to pin 3, respectively
CL23,CL24,CL25 close to pin 6,9,41, respectively
RL4
8105E-VL/VD
8111F/F-VB
PWM Mode
0 ohm
(Pull High)
8105E-VL/VD
LDO Mode
RL23
NC
NC 0 ohm
(Pull Down)
+3V_LAN rising time (10%~90%) need > 1ms and <100ms.
Pin14
RTL8105E
NC
RTL8111E/F
Pin15
Pin38
NC
NC 10K ohm PD
WOL_EN#
Sx Enable
Wake up
LOW
Sx Disable
Wake up
HIGH HIGH
S0
Place CL34 colse
to LAN chip
NC 1K ohm PH
LAN WOL LAN_EN ISOLATEB
S0 Sx S0 Sx
----------------------------------------------
0 0 0 0 1 1
0 1 0 0 1 1
1 0 1 1 1 1
1 1 1 1 1 0*
*
S3: after SUSP# assert low over 100ms
S4/S5: after SYSON assert low over 100ms
Placement near to YH2
For ESD
For ESD
EMI request 11/06
SA00004Y710
SP050007K00
SP050007400
CL25 0.1U_0402_10V7K8111FVB@ CL25 0.1U_0402_10V7K8111FVB@ 1 2
G
D
S
QL51
AO3413_SOT23
@
G
D
S
QL51
AO3413_SOT23
@
2
1 3
CL13
4.7U_0603_6.3V6K
8111FVB@
CL13
4.7U_0603_6.3V6K
8111FVB@
1
2
G
D
S
QL53
2N7002_SOT23-38105ELDO@
G
D
S
QL53
2N7002_SOT23-38105ELDO@
2
1 3
RL5 2.49K_0402_1%RL5 2.49K_0402_1%
1 2
RL432
47K_0402_5%
@RL432
47K_0402_5%
@
1 2
RL22 1K_0402_5%
@
RL22 1K_0402_5%
@
1 2
RL6
1K_0402_5%
@
RL6
1K_0402_5%
@
12
RL8
0_0402_5%
GCLK@RL8
0_0402_5%
GCLK@
1 2
LL1
2.2UH +-5% NLC252018T-2R2J-N
8111FVB@LL1
2.2UH +-5% NLC252018T-2R2J-N
8111FVB@
1 2
CL24 0.1U_0402_10V7K8111FVB@ CL24 0.1U_0402_10V7K8111FVB@ 1 2
CL22 0.1U_0402_10V7K8111FVB@ CL22 0.1U_0402_10V7K8111FVB@ 1 2
CL29
0.1U_0402_10V7K
8111FVB@
CL29
0.1U_0402_10V7K
8111FVB@
1
2
CL38
4.7U_0603_6.3V6K
@
CL38
4.7U_0603_6.3V6K
@
1
2
CL483
0.1U_0402_10V7K
@
CL483
0.1U_0402_10V7K
@
1
2
CL36 1000P_1808_3KV7KCL36 1000P_1808_3KV7K
1 2
RL147
100K_0402_5%
@
RL147
100K_0402_5%
@
12
RL433 0_0402_5%RL433 0_0402_5%
1 2
CL28
4.7U_0603_6.3V6K
8111FVB@
CL28
4.7U_0603_6.3V6K
8111FVB@
1
2
CL26
27P_0402_50V8J
NOGCLK@
CL26
27P_0402_50V8J
NOGCLK@
1
2
CL6 0.1U_0402_10V7KCL6 0.1U_0402_10V7K
1 2
DL2
AZC199-02SPR7G_SOT23-3
@
DL2
AZC199-02SPR7G_SOT23-3
@
22
33
1
1
CL19 0.1U_0402_10V7KCL19 0.1U_0402_10V7K
1 2
CL1 0.1U_0402_10V7KCL1 0.1U_0402_10V7K
1 2
LL3 0_0603_5%8111FVB@ LL3 0_0603_5%8111FVB@ 1 2
RL13 75_0402_1%RL13 75_0402_1%
1 2
RL29 22_0402_5%
GCLK@
RL29 22_0402_5%
GCLK@
1 2
CL39 1000P_0402_50V7K
8111FVB@
CL39 1000P_0402_50V7K
8111FVB@12
RL434
0_0402_5%
@
RL434
0_0402_5%
@
1 2
YL1 25MHZ_20PF_7V25000016NOGCLK@ YL1 25MHZ_20PF_7V25000016NOGCLK@
GND
2
33
1
1
GND
4
CL43 10PF_0402_50V9
GCLK@
CL43 10PF_0402_50V9
GCLK@
1 2
CL41 1000P_0402_50V7KCL41 1000P_0402_50V7K
12
PJ29
JUMP_43X79
@
PJ29
JUMP_43X79
@
1
122
RL7
15K_0402_5%
RL7
15K_0402_5%
UL3
10/100M transformer_HD245
8105ELDO@UL3
10/100M transformer_HD245
8105ELDO@
TD+
1
TD-
2
CT
3
CT
6
RD+
7
RD-
8RX- 9
RX+ 10
CT 11
CT 14
TX- 15
TX+ 16
NC
4
NC
5NC 13
NC 12
CL482
0.01U_0402_25V7K
@
CL482
0.01U_0402_25V7K
@
1
2
RL1 10K_0402_5%RL1 10K_0402_5%
12
RL23
0_0402_5%
8105ELDO@
RL23
0_0402_5%
8105ELDO@
12
UL1
RTL8111F-CGT_QFN48_6x6
8111FVB@
UL1
RTL8111F-CGT_QFN48_6x6
8111FVB@
PERSTB
25
HSOP
22
HSON
23
HSIP
17
HSIN
18
REFCLK_P
19
REFCLK_N
20 NC/MDIP2 7
NC/MDIN2 8
NC/MDIP3 10
NC/MDIN3 11
LED3/EEDO 31
LED1/EESK 37
EECS 30
LED0 40
MDIN1 5
MDIP1 4
MDIN0 2
MDIP0 1
RSET
46
LANWAKEB
28
ISOLATEB
26
CKXTAL1
43
CKXTAL2
44
AVDD10 3
EVDD10 21
DVDD10 29
DVDD10 41
VDDREG
34
ENSWREG
33
DVDD33 27
DVDD33 39
AVDD33 12
DVDD10 13
AVDD33 42
CLKREQB
16
EEDI 32
AVDD33 47
AVDD33 48
AVDD10 6
AVDD10 9
AVDD10 45
NC/SMBCLK
14
NC/SMBDATA
15
GPO/SMBALERT
38
GND
24
PGND
49 REGOUT 36
VDDREG
35
CL37
220P_0402_50V6K
CL37
220P_0402_50V6K
1
2
CL42 1000P_0402_50V7KCL42 1000P_0402_50V7K
12
CL23 0.1U_0402_10V7K8111FVB@ CL23 0.1U_0402_10V7K8111FVB@ 1 2
RL28 0_0402_5%
8111FVB@
RL28 0_0402_5%
8111FVB@
1 2
CL681
4.7U_0805_10V4Z
@
CL681
4.7U_0805_10V4Z
@
1
2
RL25 10K_0402_5%@RL25 10K_0402_5%@12 CL21 0.1U_0402_10V7KCL21 0.1U_0402_10V7K
1 2
RL15 75_0402_1%RL15 75_0402_1%
1 2
RL11 75_0402_1%
8111FVB@
RL11 75_0402_1%
8111FVB@
1 2
CL5 0.1U_0402_10V7KCL5 0.1U_0402_10V7K
1 2
CL8 0.1U_0402_10V7K8111FVB@ CL8 0.1U_0402_10V7K8111FVB@ 1 2
CL34
0.1U_0402_25V6
CL34
0.1U_0402_25V6
1
2
CL2 0.1U_0402_10V7KCL2 0.1U_0402_10V7K
1 2
CL7 0.1U_0402_10V7K8111FVB@ CL7 0.1U_0402_10V7K8111FVB@ 1 2
RL12 75_0402_1%
8111FVB@
RL12 75_0402_1%
8111FVB@
1 2
RL2 10K_0402_5%RL2 10K_0402_5%
12
LL2 0_0603_5%LL2 0_0603_5%
1 2
CL27
27P_0402_50V8J
NOGCLK@
CL27
27P_0402_50V8J
NOGCLK@
1
2
CL4 0.1U_0402_10V7KCL4 0.1U_0402_10V7K
1 2
RL26 0_0402_5%
8111FVB@
RL26 0_0402_5%
8111FVB@
1 2
CL3 0.1U_0402_10V7KCL3 0.1U_0402_10V7K
1 2
DL1
AZC199-02SPR7G_SOT23-3
DL1
AZC199-02SPR7G_SOT23-3
2
2
3
311
CL18
1U_0402_6.3V6K
CL18
1U_0402_6.3V6K
1
2
RL21 10K_0402_5%
8111FVB@
RL21 10K_0402_5%
8111FVB@
12
CL682
1U_0402_6.3V6K
CL682
1U_0402_6.3V6K
1
2
RL4
0_0402_5%
8111FVB@
RL4
0_0402_5%
8111FVB@
12
UL4
SUPERWORLD_SWG150401
8111FVB@
UL4
SUPERWORLD_SWG150401
8111FVB@
TCT1
1
TD1+
2
TD1-
3
TCT2
4
TD2+
5
TD2-
6MX2- 19
MX2+ 20
MCT2 21
MX1- 22
MX1+ 23
MCT1 24
TCT3
7
TD3+
8
TD3-
9
TCT4
10
TD4+
11
TD4-
12
MCT3 18
MX3+ 17
MX3- 16
MCT4 15
MX4+ 14
MX4- 13
CL9
0.1U_0402_10V7K
8111FVB@
CL9
0.1U_0402_10V7K
8111FVB@
1
2
RL24 10K_0402_5%
8105ELDO@
RL24 10K_0402_5%
8105ELDO@
12
CL40 1000P_0402_50V7K
8111FVB@
CL40 1000P_0402_50V7K
8111FVB@12
JRJ45
SANTA_130451-F@
JRJ45
SANTA_130451-F@
PR1-
2
PR1+
1
PR2+
3
PR3+
4
PR3-
5
PR2-
6
PR4+
7
PR4-
8
LED_GREEN_B2 12
GND 13
LED_GREEN_B1 11
LED_YELLOW_A2 10
LED_YELLOW_A1 9
GND 14
CL20 0.1U_0402_10V7KCL20 0.1U_0402_10V7K
1 2
UL1
8105E-VD 10/100M
8105ELDO@
UL1
8105E-VD 10/100M
8105ELDO@
RL435
0_0402_5%
@
RL435
0_0402_5%
@
1 2
CL17
0.1U_0402_10V7K
CL17
0.1U_0402_10V7K
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_CR#
CLK_CR
SDWP
+DV33_18
SDCD#
PCIE_PRX_CRTX_N4
PCIE_PRX_CRTX_P4
PCIE_PTX_C_CRRX_P4
PCIE_PTX_C_CRRX_N4 SDCLKSDCLK_R
+VCC_2IN1
SD_DATA3
SDCMD
SDCLK
SD_DATA0
SD_DATA1
SD_DATA2 SDCD#
SDWP
SD_DATA1
SD_DATA0
SDCMD
SD_DATA3
SD_DATA2
SD_DATA0_R
SD_DATA1_R
SDCMD_R
SD_DATA3_R
SD_DATA2_R
CLK_CR<26> CLK_CR#<26>
PLT_RST#<5,29,36,37,40,44,45>
PCIE_PTX_C_CRRX_P4<26> PCIE_PTX_C_CRRX_N4<26>
PCIE_PRX_C_CRTX_N4<26> PCIE_PRX_C_CRTX_P4<26>
CLKREQ_CR#<26>
+DV12
+DV12
+3VS
+AV12
+AV12 +3VS
+VCC_2IN1
+VCC_2IN1
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
38 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
38 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
38 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
20 mils
20 mils
12mils, lengths < 200mils
colse to chip
All of cap. close to chip
For EMI
40 mils20 mils
< 2 in 1 Card Reader >
Connector on bottom side
CW12, CW11 colse to socket VDD
40 mils
All of cap. close to chip
SA00004Z900
JREAD
TAITW_PSDBTD-09GLBS1N14N0
@
JREAD
TAITW_PSDBTD-09GLBS1N14N0
@
CMD
2
DAT3
1
DAT1
8
DAT2
9
CLK
5VSS1 3
VSS2 6
WP 10
CD 11
VDD 4
DAT0
7
GND
12
GND
13
CW1
2.2U_0603_6.3V6K
CW1
2.2U_0603_6.3V6K
1
2
RW9 0_0402_5%RW9 0_0402_5%
1 2
RW8 0_0402_5%RW8 0_0402_5%
1 2
RW2 10K_0402_5%RW2 10K_0402_5%
1 2
RW1 6.2K_0402_5%RW1 6.2K_0402_5%
12
RW7 0_0402_5%RW7 0_0402_5%
1 2
RW6 0_0402_5%RW6 0_0402_5%
1 2
RW4 33_0402_5%RW4 33_0402_5%
1 2
CW4
0.1U_0402_16V4Z
CW4
0.1U_0402_16V4Z
1
2
CW5
2.2U_0603_6.3V6K
CW5
2.2U_0603_6.3V6K
1
2
CW2
0.1U_0402_16V4Z
CW2
0.1U_0402_16V4Z
1
2
CW9 0.1U_0402_16V7KCW9 0.1U_0402_16V7K
1 2
CW8 0.1U_0402_16V7KCW8 0.1U_0402_16V7K
1 2
CW3
4.7U_0603_6.3V6K
CW3
4.7U_0603_6.3V6K
1
2
CW6
0.1U_0402_16V4Z
CW6
0.1U_0402_16V4Z
1
2
RW5 0_0402_5%RW5 0_0402_5%
1 2
CW7 1U_0402_6.3V6KCW7 1U_0402_6.3V6K
12
CW11
10U_0805_10V6K
CW11
10U_0805_10V6K 1
2
UW1
RTS5229-GR_QFN24_4X4
UW1
RTS5229-GR_QFN24_4X4
Card_3V3
10
3V3_IN
9
AV12
7
RREF
8
GPIO
19
HSOP
5
REFCLKN
4
HSIN
2HSIP
1SP1 12
SP3 14
CLK_REQ#
24
SP4 16
SP5 17
SP2 13
SP6 18
DV12_S
11
SD_WP 20
SD_CD# 21
REFCLKP
3
DV33_18
15
PERST#
23
HSON
6
MS_INS# 22
GND 25
CW12
0.1U_0402_16V4Z
CW12
0.1U_0402_16V4Z
1
2
CW10
5P_0402_50V8C
CW10
5P_0402_50V8C
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
B1_DE1
U3RXDN1_U_C
U3RXDP1_U_C U3RXDN1_R_R
U3RXDP1_R_R
U3TXDP1_U_C
U3TXDN1_U_C
B1_EQ1
A1_EQ0
A1_DE0 B1_EQ0
A1_EQ1
U3RXDN1_R
U3RXDP1_R
U3TXDP1_CU3TXDP1
U3TXDN1 U3TXDN1_C
A1_DE1
B1_DE0
USB2_GND
U3TXDP1_U
U3TXDN1_U
U3TXDN2_U_C_L USB3_GND
U3RXDP2_U_C_L
U3RXDN2_U_C_L
USB20_P1_L
USB20_N1_L
U3TXDP2_U_C_L
USB20_P0_L
USB20_N0_L
USB20_N1_L
USB20_P1_L
USB_EN#
U3TXDN1_U_C
U3RXDN1_U_C
U3TXDN2_U_C
U3RXDN2_U_C
U3RXDP2_U_C_LU3RXDP2_U_C
U3RXDN2_U_C_L
U3TXDP2_U_C_LU3TXDP2_U_C
U3TXDN2_U_C_L
U3RXDP1_U_C_LU3RXDP1_U_C
U3RXDN1_U_C_L
U3TXDP1_U_C_LU3TXDP1_U_C
U3TXDN1_U_C_L
B2_DE1
U3RXDN2_U_C
U3RXDP2_U_C U3RXDN2_R_R
U3RXDP2_R_R
U3TXDP2_U_C
U3TXDN2_U_C
B2_EQ1
A2_EQ0
A2_DE0 B2_EQ0
A2_EQ1
U3RXDN2_R
U3RXDP2_R
U3TXDP2_CU3TXDP2
U3TXDN2 U3TXDN2_C
A2_DE1
B2_DE0
U3TXDP2_U
U3TXDN2_U
USB20_N0
USB20_P0
USB20_P1
USB20_N1
USB20_P0_L
USB20_N0_L
USB20_P1_L
USB20_N1_L
B1_DE0
B1_DE1
A1_EQ0
A1_EQ1
B1_EQ0
B1_EQ1
A1_DE0
A1_DE1
B2_DE0
B2_DE1
A2_EQ0
A2_EQ1
B2_EQ0
B2_EQ1
A2_DE0
A2_DE1
USB20_N0_L
USB20_P0_L
U3RXDN1_U_C_L
U3RXDP1_U_C_L
U3TXDP1_U_C_L
U3TXDN1_U_C_L
U3RXDP1_U_C_L
U3RXDN1_U_C_L
U3TXDN1_U_C_L
U3TXDP1_U_C_L
U3RXDP1_U_C_L
U3RXDN1_U_C_L
U3TXDN1_U_C_L
U3TXDP1_U_C_L
U3TXDN2_U_C_L
U3TXDP2_U_C_L
U3RXDN2_U_C_L
U3RXDP2_U_C_L
U3TXDP2_U_C_L
U3TXDN2_U_C_L
U3RXDP2_U_C_L
U3RXDN2_U_C_L
U3RXDP1_R <29>
U3RXDN1_R <29>
U3TXDP1<29> U3TXDN1<29>
USB_OC#0 <29,44>
USB_EN#<44>
U3RXDP2_R <29>
U3RXDN2_R <29>
U3TXDP2<29> U3TXDN2<29>
USB20_P0<29>
USB20_N0<29>
USB20_P1<29>
USB20_N1<29>
+USB_VCCB
+3VS
+USB_VCCB
+5VALW
+3VS
+3VS
+3VS
+3VS
+3VS
+USB_VCCB
+USB_VCCB
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
39 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
39 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
Custom
39 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
W=80mils
Change ESD Diode for EMI request
When test RX need add RR18
REXT - swing pin(2.5K~10K)
0(default)
1Compliance Test Mode
0
Normal Operation
1
1042
908
1127
NC(default)
0
1
0
7
15
OUTPUT DE CONTROL (at 2.5GHZ)
DEx
0
1
NC(default)
OSx = NC
0 dB
-3.5 dB
-6.0 dB
OUTPUT SWING AND EQ CONTROL (at 2.5 GHZ)
OSx = 0
0 dB
-2.2 dB
-5.2 dB
OSx TRANSISTION BIT AMPLITUDE
(TYP mVpp)
OSx = 0
0 dB
-4.4 dB
-6.0 dB
EQx EQUALIZATION
(dB)
CONTROL PINS SETTINGS
EN_RXD DEVICE FUNCTION CM DEVICE FUNCTION
NC(default)
1(default)
0
Normal Operation
Sleep Mode
W=80mils
Note：
1) keep differential trace mismatch less than +/- 5mil
2) keep USB3 impedance follow Intel SPEC
3) Power / GND pin trace 10mil
A_EQ1(Pin15) A_EQ0(Pin17)
L
L
L
H
HL
HH
adaptive EQ enable
Loss up to 7dB
Loss up to 14.5dB
Loss up to 11.5dB
A_DE1(Pin18) A_DE0(Pin16)
L
L
L
H
HL
HH
3.5dB
No de-emphasis
7dB
B_EQ1(Pin4) B_EQ0(Pin2)
L
L
L
H
HL
HH
adaptive EQ enable
Loss up to 7dB
Loss up to 14.5dB
Loss up to 11.5dB
B_DE1(Pin6) B_DE0(Pin3)
L
L
L
H
HL
HH
3.5dB
No de-emphasis
7dB
BOM Structure
TI
Parade
USB3.0
TIUR@
PRUR@
USB30R@
W=80mils
Change ESD Diode for EMI request
For EMI
W=60mils
2.5A
When test RX need add RR18
REXT - swing pin(2.5K~10K)
SA00004KB00
SA00003TV00
5dB with boost
output swing 5dB with boost
output swing
TI suggest EQ1(Pin2) & EQ2(Pin17) to pull Down use 7dB
DE1(Pin3) & DE2(Pin16) NC use 0dB
OS1(Pin4) & OS2(Pin15) NC use 1042mV
TI: A_DE1、B_DE1 need 0ohm to GND.
If use Parade and need control
A_DE1 & B_DE1 please use 4.7K
TI: A_DE1、B_DE1 need 0ohm to GND.
If use Parade and need control
A_DE1 & B_DE1 please use 4.7K
Parade suggest EQ1(Pin2) & EQ2(Pin17) to pull High use 7dB. All control has internally pulled down at ~150Kohm,
If add ESD Diode A_DE0(Pin16) and B_DE0(Pin3) need pull high to 7dB otherwise 3dB
Pericom PCUR@
SA000056E00
SA00004YI00
SA000056E00
SA00004YI00
SA00004VQ00
SA00004VQ00
RR54
4.7K_0402_5%
@RR54
4.7K_0402_5%
@
12
RR44 3.3K_0402_5%PRUR@RR44 3.3K_0402_5%PRUR@
1 2
LR2
KINGCORE WCM-2012HS-670T
IUSB30@LR2
KINGCORE WCM-2012HS-670T
IUSB30@
1
122
33
4
4
LR1
KINGCORE WCM-2012HS-670T
IUSB30@LR1
KINGCORE WCM-2012HS-670T
IUSB30@
1
122
33
4
4
RR60
4.7K_0402_5%
@RR60
4.7K_0402_5%
@
12
RR26
0_0402_5%
@RR26
0_0402_5%
@
1 2
CR39
4.7U_0805_10V4Z
@
CR39
4.7U_0805_10V4Z
@
1
2
CR19 0.1U_0402_10V7K
IUSB30@CR19 0.1U_0402_10V7K
IUSB30@
1 2
RR11
4.7K_0402_5%
@RR11
4.7K_0402_5%
@
12
RR65
4.7K_0402_5%
PCUR@
RR65
4.7K_0402_5%
PCUR@
RR57
4.7K_0402_5%
TIUR@RR57
4.7K_0402_5%
TIUR@
12
JUSBLR
LOTES_AUSB0015-P001A
@
JUSBLR
LOTES_AUSB0015-P001A
@
VBUS
1
D-
2
D+
3
GND
4
StdA-SSRX-
5
StdA-SSRX+
6
GND-DRAIN
7
StdA-SSTX-
8
StdA-SSTX+
9
GND 10
GND 11
GND 12
GND 13
RR34
0_0402_5%
PCUR@
RR34
0_0402_5%
PCUR@
RR9
4.7K_0402_5%
@RR9
4.7K_0402_5%
@
12
RR13
4.7K_0402_5%
@RR13
4.7K_0402_5%
@
12
CR36 0.1U_0402_10V7K
IUSB30@
CR36 0.1U_0402_10V7K
IUSB30@
1 2
LR5
KINGCORE WCM-2012HS-670T
IUSB30@LR5
KINGCORE WCM-2012HS-670T
IUSB30@
1
122
33
4
4
CR35 0.1U_0402_10V7K
IUSB30@
CR35 0.1U_0402_10V7K
IUSB30@
1 2
RR46 4.7K_0402_5%@RR46 4.7K_0402_5%@12
RR18 4.7K_0402_5%@RR18 4.7K_0402_5%@12
CR31 0.1U_0402_10V7K
IUSB30@CR31 0.1U_0402_10V7K
IUSB30@
1 2
CR38 1000P_0402_50V7KCR38 1000P_0402_50V7K
12
RR29
4.7K_0402_5%
PCUR@
RR29
4.7K_0402_5%
PCUR@
RR19
0_0402_5%
@RR19
0_0402_5%
@
1 2
RR15
4.7K_0402_5%
@RR15
4.7K_0402_5%
@
12
RR22
0_0402_5%@RR22
0_0402_5%@
1 2
RR38
0_0402_5%@RR38
0_0402_5%@
1 2
CR25 0.1U_0402_10V7K
IUSB30@
CR25 0.1U_0402_10V7K
IUSB30@
1 2
RR16 4.7K_0402_5%@RR16 4.7K_0402_5%@
1 2
RR50
0_0402_5%
PCUR@
RR50
0_0402_5%
PCUR@
RR24
0_0603_5%
RR24
0_0603_5%
12
LR3
WCM-2012-900T_0805
IUSB30@LR3
WCM-2012-900T_0805
IUSB30@
11
2
2
3
344
RR14 3.3K_0402_5%PRUR@RR14 3.3K_0402_5%PRUR@
1 2
CR33 0.1U_0402_10V7K
IUSB30@CR33 0.1U_0402_10V7K
IUSB30@
1 2
CR37 0.01U_0402_25V7K
IUSB30@
CR37 0.01U_0402_25V7K
IUSB30@
1 2
JUSBLF
LOTES_AUSB0015-P001A
@
JUSBLF
LOTES_AUSB0015-P001A
@
VBUS
1
D-
2
D+
3
GND
4
StdA-SSRX-
5
StdA-SSRX+
6
GND-DRAIN
7
StdA-SSTX-
8
StdA-SSTX+
9
GND 10
GND 11
GND 12
GND 13
RR10
4.7K_0402_5%
PRUR@RR10
4.7K_0402_5%
PRUR@
12
CR28 0.01U_0402_25V7K
IUSB30@
CR28 0.01U_0402_25V7K
IUSB30@
1 2
CR24 0.1U_0402_10V7K
IUSB30@
CR24 0.1U_0402_10V7K
IUSB30@
1 2
RR6
4.7K_0402_5%
PRUR@RR6
4.7K_0402_5%
PRUR@
12
RR32
0_0402_5%
@RR32
0_0402_5%
@
1 2
RR55
4.7K_0402_5%
@RR55
4.7K_0402_5%
@
12
RR51
4.7K_0402_5%
@RR51
4.7K_0402_5%
@
12
+
CR40
220U_6.3V_M_R15
+
CR40
220U_6.3V_M_R15
1
2
RR43
0_0402_5%
@RR43
0_0402_5%
@
1 2
RR7
4.7K_0402_5%
PCUR@
RR7
4.7K_0402_5%
PCUR@
RR56
4.7K_0402_5%
PRUR@RR56
4.7K_0402_5%
PRUR@
12
CR44
0.1U_0402_10V7K
CR44
0.1U_0402_10V7K
1
2
RR37
0_0603_5%
RR37
0_0603_5%
12
RR52
4.7K_0402_5%
@RR52
4.7K_0402_5%
@
12
RR49 0_0402_5%@RR49 0_0402_5%@
1 2
UR2
PI3EQX7502IZDEX_TQFN 24P
PCUR@
UR2
PI3EQX7502IZDEX_TQFN 24P
PCUR@
RR25
0_0402_5%@RR25
0_0402_5%@
1 2
DR1
AZC199-02SPR7G_SOT23-3
@
DR1
AZC199-02SPR7G_SOT23-3
@
2
2
3
311
DR4
AZC199-02SPR7G_SOT23-3
@
DR4
AZC199-02SPR7G_SOT23-3
@
2
2
3
311
CR42
4.7U_0805_10V4Z
CR42
4.7U_0805_10V4Z
1
2
RR21
0_0402_5%
TIUR@RR21
0_0402_5%
TIUR@
12
RR65
4.7K_0402_5%
TIUR@RR65
4.7K_0402_5%
TIUR@
12
RR20
0_0402_5%@RR20
0_0402_5%@
1 2
RR64
0_0402_5%
PCUR@
RR64
0_0402_5%
PCUR@
RR61
4.7K_0402_5%
@RR61
4.7K_0402_5%
@
12
CR18 0.1U_0402_10V7K
IUSB30@CR18 0.1U_0402_10V7K
IUSB30@
1 2
UR2
PS8710BTQFN24GTR-A1_TQFN24_4X4
PRUR@
UR2
PS8710BTQFN24GTR-A1_TQFN24_4X4
PRUR@
VDD
1
A_EQ1/SDA_CTL
15
A_DE0/SCL_CTL
16
TEST
14
A_INp
19
VDD
13
GPAD 25
A_INn
20
GND 10
I2C_EN
24 GND 21
A_DE1/NC
18 A_EQ0/NC
17
REXT
7PD#
5
B_DE1/NC 6
A_OUTn 11
A_OUTp 12
B_DE0/I2C_ADDR0 3
B_EQ0/NC 2
B_INn
8B_INp
9B_OUTp 22
B_OUTn 23
B_EQ1/I2C_ADDR1 4
RR62
4.7K_0402_5%
@RR62
4.7K_0402_5%
@
12
CR27 0.1U_0402_10V7K
IUSB30@
CR27 0.1U_0402_10V7K
IUSB30@
1 2
CR23 0.1U_0402_10V7K
IUSB30@CR23 0.1U_0402_10V7K
IUSB30@
1 2
CR45
1000P_0402_50V7K
CR45
1000P_0402_50V7K
1
2
RR40
0_0402_5%@RR40
0_0402_5%@
1 2
RR50
0_0402_5%
TIUR@RR50
0_0402_5%
TIUR@
12
CR30 0.1U_0402_10V7K
IUSB30@CR30 0.1U_0402_10V7K
IUSB30@
1 2
RR21
0_0402_5%
PCUR@
RR21
0_0402_5%
PCUR@
8
7
65
4
3
2
1
9
10
DR8
YSCLAMP0524P_SLP2510P8-10-9
@
8
7
65
4
3
2
1
9
10
DR8
YSCLAMP0524P_SLP2510P8-10-9
@
4
5
1
6
2
7
3
9
8
RR23
0_0603_5%
RR23
0_0603_5%
12
RR57
4.7K_0402_5%
PCUR@
RR57
4.7K_0402_5%
PCUR@
RR35
0_0402_5%
@RR35
0_0402_5%
@
12
CR43
0.1U_0402_10V7K
CR43
0.1U_0402_10V7K
1
2
RR39
0_0402_5%
@RR39
0_0402_5%
@
1 2
RR28
4.7K_0402_5%
@RR28
4.7K_0402_5%
@
12
CR34 0.1U_0402_10V7K
IUSB30@
CR34 0.1U_0402_10V7K
IUSB30@
1 2
RR59
4.7K_0402_5%
@RR59
4.7K_0402_5%
@
12
UR1
PS8710BTQFN24GTR-A1_TQFN24_4X4
PRUR@
UR1
PS8710BTQFN24GTR-A1_TQFN24_4X4
PRUR@
VDD
1
A_EQ1/SDA_CTL
15
A_DE0/SCL_CTL
16
TEST
14
A_INp
19
VDD
13
GPAD 25
A_INn
20
GND 10
I2C_EN
24 GND 21
A_DE1/NC
18 A_EQ0/NC
17
REXT
7PD#
5
B_DE1/NC 6
A_OUTn 11
A_OUTp 12
B_DE0/I2C_ADDR0 3
B_EQ0/NC 2
B_INn
8B_INp
9B_OUTp 22
B_OUTn 23
B_EQ1/I2C_ADDR1 4
RR33 0_0402_5%@RR33 0_0402_5%@
1 2
UR1
SN65LVPE502CPRGER_VQFN24_4X4
TIUR@
UR1
SN65LVPE502CPRGER_VQFN24_4X4
TIUR@
CR26 0.1U_0402_10V7KCR26 0.1U_0402_10V7K
1
2
RR63
4.7K_0402_5%
@RR63
4.7K_0402_5%
@
12
CR41
1000P_0402_50V7K
CR41
1000P_0402_50V7K
1
2
CR29 0.1U_0402_10V7KCR29 0.1U_0402_10V7K
1
2
RR8
4.7K_0402_5%
@RR8
4.7K_0402_5%
@
12
RR41
0_0402_5%@RR41
0_0402_5%@
1 2
RR29
4.7K_0402_5%
TIUR@RR29
4.7K_0402_5%
TIUR@
12
LR6
KINGCORE WCM-2012HS-670T
IUSB30@LR6
KINGCORE WCM-2012HS-670T
IUSB30@
1
122
33
4
4
UR1
PI3EQX7502IZDEX_TQFN 24P
PCUR@
UR1
PI3EQX7502IZDEX_TQFN 24P
PCUR@
RR7
4.7K_0402_5%
TIUR@RR7
4.7K_0402_5%
TIUR@
12
RR58
4.7K_0402_5%
PRUR@RR58
4.7K_0402_5%
PRUR@
12
RR27
4.7K_0402_5%
@RR27
4.7K_0402_5%
@
12
RR42
0_0402_5%
@RR42
0_0402_5%
@
1 2
RR36
0_0603_5%
RR36
0_0603_5%
12
LR4
WCM-2012-900T_0805
IUSB30@LR4
WCM-2012-900T_0805
IUSB30@
11
2
2
3
344
UR2
SN65LVPE502CPRGER_VQFN24_4X4
TIUR@
UR2
SN65LVPE502CPRGER_VQFN24_4X4
TIUR@
8
7
65
4
3
2
1
9
10
DR7
YSCLAMP0524P_SLP2510P8-10-9
@
8
7
65
4
3
2
1
9
10
DR7
YSCLAMP0524P_SLP2510P8-10-9
@
4
5
1
6
2
7
3
9
8
CR46
4.7U_0805_10V4Z
CR46
4.7U_0805_10V4Z
1
2
RR12
4.7K_0402_5%
@RR12
4.7K_0402_5%
@
12
RR34
0_0402_5%
TIUR@RR34
0_0402_5%
TIUR@
12
RR53
0_0402_5%
@RR53
0_0402_5%
@
12
CR32 0.1U_0402_10V7K
IUSB30@CR32 0.1U_0402_10V7K
IUSB30@
1 2
UR3
SY6288DCAC_MSOP8
UR3
SY6288DCAC_MSOP8
GND
1
IN
2
IN
3
EN/ENB
4
OCB 5
OUT 6
OUT 7
OUT 8
RR17
4.7K_0402_5%
@RR17
4.7K_0402_5%
@
12
CR22 0.1U_0402_10V7K
IUSB30@CR22 0.1U_0402_10V7K
IUSB30@
1 2
RR64
0_0402_5%
TIUR@RR64
0_0402_5%
TIUR@
12
RR45 4.7K_0402_5%@RR45 4.7K_0402_5%@
1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
TI_U3TXDP4
TI_U3TXDP3
TI_U3TXDN3
TI_U3TX_C_DP3
TI_U3RXDP3_R
TI_U3RXDN3_R
TI_U3TX_C_DN3
U2D_DP2
U2D_DN2
TI_U3TXDN4
TI_U3RXDP3_R
TI_U3RXDN3_R U3RXDN3
U3RXDP3
TI_U3TXDP3
TI_U3TXDN3 U3TXDN3_C_L
U3TXDP3_C_L
U2D_DN3
U2D_DP3
TI_U3RXDN4_R
TI_U3RXDP4_R
TI_U3TX_C_DP4
TI_U3TX_C_DN4
TI_U3RXDN4_R U3RXDN4
TI_U3RXDP4_R
U3TXDN4_C_L
U3RXDP4
TI_U3TXDP4
TI_U3TXDN4
U3TXDP4_C_L
USBA30_POK
USBA30_POK
OCL1#
USBA30_SMI#_IC
EC_Q_SWIA#
CLKREQ_Q_USBA30#
USBA30_SMI#_IC
PCIE_PRX_USBTX_N5
PCIE_PRX_USBTX_P5
OCL1#
USB30PWRON0
CLKREQ_Q_USBA30#
EC_Q_SWIA#
U3TXDN4_C_L <34>
U3TXDP4_C_L <34>
U3RXDP4 <34>
U3RXDN4 <34>
U3TXDP3_C_L <34>
U3TXDN3_C_L <34>
U3RXDP3 <34>
U3RXDN3 <34>
U2D_DN2 <34>
U2D_DP2 <34>
U2D_DN3 <34>
U2D_DP3 <34>
PM_SLP_S4#<27,44>
USBA30_SMI# <29>
USB_OC#1 <29,34,44>
PLT_RST#<5,29,36,37,38,44,45>
PCIE_PTX_C_USBRX_P5<26>
PCIE_PTX_C_USBRX_N5<26>
CLK_USBA30<26>
PCIE_PRX_C_USBTX_N5<26> PCIE_PRX_C_USBTX_P5<26>
CLK_USBA30#<26>
USB_CHG_EN# <34,44>
EC_SWI# <27,37>
CLKREQ_USBA30# <26>
+3V_USB
+3VALW
+3V_USB
+3VALW
+3V_USB
+3V_USB+1.5V +1.5V +1.05V_USB
+3VA_USB+3V_USB +1.05V_USB
+3V_USB
+3V_USB
+3V_USB
+3V_USB
+3V_USB +1.05V_USB +3VA_USB
+3V_USB +3VA_USB
+3V_USB
+3V_USB
+3V_USB
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
SCHEMATICS, MB A8391
Custom
40 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
SCHEMATICS, MB A8391
Custom
40 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
SCHEMATICS, MB A8391
Custom
40 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
+3V & +1.05V has power sequence timing:
0.1*VDD(+3V) ~ 0.9*VDD(+1.05V) < 100ms
+3VALW to +3V Transfer
+1.5V to +1.05V Transfer
Vout=0.8(1+10K/32.4K)
1.042 ~ 1.0469 ~ 1.0519V
Spec: 0.9975 ~ 1.05 ~ 1.1025
1A
Close to U32.25Close to U32.3
UPD720202:
SMIB Low active SA000051C10
4019HG B
YT2
24MHZ_12PF_X5H024000DC1H
EUSB30@
YT2
24MHZ_12PF_X5H024000DC1H
EUSB30@
1 2
CT49 0.01U_0402_25V7K
EUSB30@
CT49 0.01U_0402_25V7K
EUSB30@
1
2
CT76
12P_0402_50V8J
EUSB30@
CT76
12P_0402_50V8J
EUSB30@
1
2
RT5
4.7K_0402_5%
EUSB30@
RT5
4.7K_0402_5%
EUSB30@
1 2
RT60
0_0402_5%
@
RT60
0_0402_5%
@
1 2
QT6B
2N7002KDWH_SOT363-6
EUSB30@
QT6B
2N7002KDWH_SOT363-6
EUSB30@
34
5
CT52 0.1U_0402_16V7K
EUSB30@
CT52 0.1U_0402_16V7K
EUSB30@
1
2
CT44 0.01U_0402_25V7K
EUSB30@
CT44 0.01U_0402_25V7K
EUSB30@
1
2
CT59
10U_0603_6.3V6M
EUSB30@CT59
10U_0603_6.3V6M
EUSB30@
1
2
CT26
0.01U_0402_25V7K
EUSB30@
CT26
0.01U_0402_25V7K
EUSB30@
1
2
RT67 10K_0402_5%RT67 10K_0402_5%
1 2
CT54 0.1U_0402_16V7K
EUSB30@
CT54 0.1U_0402_16V7K
EUSB30@
1
2
CT25
10U_0603_6.3V6M
EUSB30@
CT25
10U_0603_6.3V6M
EUSB30@
1
2
CT61 0.1U_0402_16V7K
EUSB30@CT61 0.1U_0402_16V7K
EUSB30@
1 2
CT58 10U_0603_6.3V6M
EUSB30@
CT58 10U_0603_6.3V6M
EUSB30@
1
2
CT57 0.01U_0402_25V7K
EUSB30@
CT57 0.01U_0402_25V7K
EUSB30@
1
2
RT39
0_0402_5%@RT39
0_0402_5%@
1 2
CT70 0.1U_0402_16V7K
EUSB30@
CT70 0.1U_0402_16V7K
EUSB30@
1
2
CT81
0.1U_0402_16V7K
EUSB30@ CT81
0.1U_0402_16V7K
EUSB30@ 12
RT13 47K_0402_5%
EUSB30@
RT13 47K_0402_5%
EUSB30@
1 2
CT64 0.1U_0402_16V7K
EUSB30@
CT64 0.1U_0402_16V7K
EUSB30@
1
2
RT54
10K_0402_5%
EUSB30@
RT54
10K_0402_5%
EUSB30@
12
RT8
32.4K_0402_1%
EUSB30@
RT8
32.4K_0402_1%
EUSB30@
12
CT65 0.1U_0402_16V7K
EUSB30@CT65 0.1U_0402_16V7K
EUSB30@
1 2
RT6
10K_0402_1%
EUSB30@
RT6
10K_0402_1%
EUSB30@
12
DT2
1SS355TE-17_SOD323-2
EUSB30@
DT2
1SS355TE-17_SOD323-2
EUSB30@
22
1
1
G
D
S
QT5 2N7002_SOT23-3
EUSB30@
G
D
S
QT5 2N7002_SOT23-3
EUSB30@
2
13
CT51 0.1U_0402_16V7K
EUSB30@
CT51 0.1U_0402_16V7K
EUSB30@
1
2
CT67 0.01U_0402_25V7K
EUSB30@
CT67 0.01U_0402_25V7K
EUSB30@
1
2
RT12
100K_0402_5%EUSB30@ RT12
100K_0402_5%EUSB30@
1 2
CT42
0.1U_0402_16V4Z
EUSB30@
CT42
0.1U_0402_16V4Z
EUSB30@
UT6
UPD720202K8-701-BAA_QFN48_7X7
EUSB30@
UT6
UPD720202K8-701-BAA_QFN48_7X7
EUSB30@
XT2
23 XT1
24
PONRSTB
11
PERSTB
47
PEWAKEB
48
PECREQB
10
AVDD33 25
AVDD33 3
PECLKP
1
PECLKN
2
PETXP
4
PETXN
5
PERXP
7
PERXN
8
SPISCK
15
SPICSB
14
IC(L)
27
VDD33 22
VDD33 12
VDD10 39
VDD10 33
VDD10 30
VDD10 21
VDD10 9
VDD10 6
VDD33 43
VDD33 34
GND
49
SPISI
16
SPISO
13
VDD10 42
SMIB
46
RREF 26
U3TXDP2 37
U3TXDN2 38
U3RXDP2 40
U3RXDN2 41
U2DP1 35
U2DM1 36
U3TXDP1 28
U3TXDN1 29
U3RXDP1 31
U3RXDN1 32
U2DP2 44
U2DM2 45
OCI2B 17
OCI1B 19
PPON2 18
PPON1 20
CT75
12P_0402_50V8J
EUSB30@
CT75
12P_0402_50V8J
EUSB30@
1
2
RT14 10K_0402_5%
EUSB30@
RT14 10K_0402_5%
EUSB30@
1 2
QT7B
2N7002KDWH_SOT363-6
EUSB30@
QT7B
2N7002KDWH_SOT363-6
EUSB30@
34
5
CT62 0.01U_0402_25V7K
EUSB30@
CT62 0.01U_0402_25V7K
EUSB30@
1
2
CT56 0.01U_0402_25V7K
EUSB30@
CT56 0.01U_0402_25V7K
EUSB30@
1
2
QT7A
2N7002KDWH_SOT363-6
EUSB30@
QT7A
2N7002KDWH_SOT363-6
EUSB30@
61
2
RT52
0_0402_5%
@RT52
0_0402_5%
@
1 2
CT53 0.01U_0402_25V7K
EUSB30@
CT53 0.01U_0402_25V7K
EUSB30@
1
2
RT62
10K_0402_5%
EUSB30@
RT62
10K_0402_5%
EUSB30@
12
RT61
10K_0402_5%
EUSB30@
RT61
10K_0402_5%
EUSB30@ 12
RT47
0_0402_5%
@RT47
0_0402_5%
@
1 2
LT14
KINGCORE WCM-2012HS-670T
EUSB30@
LT14
KINGCORE WCM-2012HS-670T
EUSB30@
1
122
33
4
4
RT53
0_0402_5%@RT53
0_0402_5%@
1 2
CT60 0.01U_0402_25V7K
EUSB30@
CT60 0.01U_0402_25V7K
EUSB30@
1
2
CT55 0.1U_0402_16V7K
EUSB30@
CT55 0.1U_0402_16V7K
EUSB30@
1
2
LT8
KINGCORE WCM-2012HS-670T
EUSB30@LT8
KINGCORE WCM-2012HS-670T
EUSB30@
1
122
33
4
4
CT40
0.1U_0402_16V7K
EUSB30@
CT40
0.1U_0402_16V7K
EUSB30@
1
2
CT69 0.01U_0402_25V7K
EUSB30@
CT69 0.01U_0402_25V7K
EUSB30@
1
2
CT41
0.1U_0402_16V7K
EUSB30@ CT41
0.1U_0402_16V7K
EUSB30@
12
RT48
0_0402_5%
@RT48
0_0402_5%
@
1 2
CT74
1U_0603_10V6KEUSB30@
CT74
1U_0603_10V6KEUSB30@
1 2
LT10
KINGCORE WCM-2012HS-670T
EUSB30@
LT10
KINGCORE WCM-2012HS-670T
EUSB30@
1
122
33
4
4
CT87 0.1U_0402_16V7K
EUSB30@CT87 0.1U_0402_16V7K
EUSB30@
1 2
CT50 0.01U_0402_25V7K
EUSB30@
CT50 0.01U_0402_25V7K
EUSB30@
1
2
RT50
0_0402_5%@RT50
0_0402_5%@
1 2
RT51
10K_0402_5%
EUSB30@
RT51
10K_0402_5%
EUSB30@ 12
G
D
S
QT3
AO3413_SOT23
EUSB30@
G
D
S
QT3
AO3413_SOT23
EUSB30@
2
1 3
RT40
0_0402_5%
@RT40
0_0402_5%
@
1 2
UT3
APL5930KAI-TRG_SO8
EUSB30@UT3
APL5930KAI-TRG_SO8
EUSB30@
VIN
5
EN
8
VOUT 3
VOUT 4
GND 1
FB 2
VCNTL
6
POK
7
VIN
9
CT63 0.01U_0402_25V7K
EUSB30@
CT63 0.01U_0402_25V7K
EUSB30@
1
2
QT6A
2N7002KDWH_SOT363-6
EUSB30@
QT6A
2N7002KDWH_SOT363-6
EUSB30@
61
2
CT71 0.1U_0402_16V7K
EUSB30@CT71 0.1U_0402_16V7K
EUSB30@
1 2
RT15
1.6K_0402_1%
EUSB30@RT15
1.6K_0402_1%
EUSB30@
1 2
RT38
0_0402_5%@RT38
0_0402_5%@
1 2
RT65 10K_0402_5%RT65 10K_0402_5%
1 2
RT69 10K_0402_5%RT69 10K_0402_5%
1 2
CT48 0.01U_0402_25V7K
EUSB30@
CT48 0.01U_0402_25V7K
EUSB30@
1
2
CT66 0.01U_0402_25V7K
EUSB30@
CT66 0.01U_0402_25V7K
EUSB30@
1
2
CT47 0.01U_0402_25V7K
EUSB30@
CT47 0.01U_0402_25V7K
EUSB30@
1
2
RT68 10K_0402_5%RT68 10K_0402_5%
1 2
CT43
10U_0603_6.3V6M
EUSB30@
CT43
10U_0603_6.3V6M
EUSB30@
1
2
LT9
BLM18AG601SN1D_2P
EUSB30@
LT9
BLM18AG601SN1D_2P
EUSB30@
1 2
LT12
KINGCORE WCM-2012HS-670T
EUSB30@LT12
KINGCORE WCM-2012HS-670T
EUSB30@
1
122
33
4
4
CT68 0.1U_0402_16V7K
EUSB30@
CT68 0.1U_0402_16V7K
EUSB30@
1
2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
SCHEMATICS, MB A8391
Custom
41 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
SCHEMATICS, MB A8391
Custom
41 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
SCHEMATICS, MB A8391
Custom
41 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
B4019HG
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MONO_IN
MIC_SENSE# SENSE_A
MIC1_R_R
MIC1_R_L
MIC_SENSE#
SPKL+
SPKL-
SPKR+
SPKR-
AZ_SDIN0_HD_R
MIC1_R_L
AC_VREF
MONO_IN
MIC1_R_R
AC_JDREF
CPVEE
SENSE_A
SPKL-
SPKL+
SPKR-
SPKR+
AZ_RST_HD#
AZ_BITCLK_HD
+AVDD
+DVDD_IO
+DVDD
MIC1_R_C_L
MIC1_R_C_R
OSC_IN
+PVDD
HWEQ_EN
HWEQ_EN_D
SM_EN
JACK_SENSE HWEQ_EN HWEQ_EN_D
+DVDD_IN
OSC_OUT
AZ_BITCLK_HD
EC_MUTE#
INT_MIC_CLK_R
INT_MIC_CLK_R
OSC_OUT
PCH_SPKR<25>
NBA_PLUG<43>
SM_SENSE#<44>
SPK_L1 <43>
SPK_L2 <43>
SPK_R1 <43>
SPK_R2 <43>
AZ_RST_HD#<25>
HP_L <43>
HP_R <43>
INT_MIC_DATA<22>
AZ_SYNC_HD <25>
AZ_BITCLK_HD <25>
AZ_SDOUT_HD <25>
AZ_SDIN0_HD <25>
EC_MUTE# <44>
JACK_SENSE <43>
SM_EN4>
MIC1_R <43>
MIC1_L <43>
SUSP# <44,47,53,54,58>
OSC_IN_R<36>
INT_MIC_CLK<22>
HWEQ_EN<36>
+MIC1_VREFO
+MIC1_VREFO
+3VL
+5VALW
+5VALW
+MIC1_VREFO
+3VL
+3VL
+3VS
+3VL
+3VL
+3VALW
+DVDD_IN
+5VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
42 61
Thursday, February 16, 2012
2011/12/14 2012/12/31
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
42 61
Thursday, February 16, 2012
2011/12/14 2012/12/31
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
42 61
Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Beep sound
Ext. MIC
PCI Beep
Function
Headphone out
place close to chip
10K
20K
39.2K
SENSE A
5.1K
10K
20K
39.2K
Sense Pin Impedance
SENSE B
PORT-C (PIN 28, 29)
PORT-B (PIN 19, 20)
PORT-A (PIN 31, 32)
Codec Signals
Ext.MIC/LINE IN JACK
EC
placement near Audio Codec
AGND
2W 4ohm =40mil
1W 8ohm =20mil
close to pin 41
close to pin 46
close to pin 3
close to pin 9
PORT-E
close to pin 27 close to pin 38
close to pin 21
close to pin 22
DGND
SA000051D00
Placement near to UA1.15
For EMI
please place near codec
To solve noise issue
EC_MUTE#
Hight
LOW
Internal AMP
Enable
Disable
For EMI
SJ000001A00
For EMI
4019HG
CA7
0.1U_0402_10V7K
CA7
0.1U_0402_10V7K
1
2
RA43
100K_0402_5%
RA43
100K_0402_5%
1 2
CA22
100P_0402_50V8J
CA22
100P_0402_50V8J
RA21 39.2K_0402_1%RA21 39.2K_0402_1%
CA144.7U_0603_6.3V6K CA144.7U_0603_6.3V6K
QA3B
2N7002DW-T/R7_SOT363-6
QA3B
2N7002DW-T/R7_SOT363-6
3
5
4
CA49
220P_0402_50V7K
CAM@CA49
220P_0402_50V7K
CAM@
1
2
RA14
1K_0402_5%
RA14
1K_0402_5%
12
CA27
0.1U_0402_10V7K
CA27
0.1U_0402_10V7K
1 2
CA154.7U_0603_6.3V6K CA154.7U_0603_6.3V6K
RA13
1K_0402_5%
RA13
1K_0402_5%
12
CA47
0.1U_0402_25V6
CA47
0.1U_0402_25V6
1
2
CA30
10U_0603_6.3V6M
@
CA30
10U_0603_6.3V6M
@
1
2
RA2
0_0603_5%
RA2
0_0603_5%
1 2
CA25 0.1U_0603_50V7KCA25 0.1U_0603_50V7K
1 2
CA19 2.2U_0603_10V6KCA19 2.2U_0603_10V6K
12
RA10
47K_0402_5%
RA10
47K_0402_5%
1 2
RA4
4.7K_0402_5%
RA4
4.7K_0402_5%
1 2
CA8
10U_0805_10V4Z
CA8
10U_0805_10V4Z
1
2
CA45 0.1U_0402_10V7KCA45 0.1U_0402_10V7K
12
RA28
10_0402_5%
RA28
10_0402_5%
1 2
CA9 0.1U_0402_10V7KCA9 0.1U_0402_10V7K
1
2
RA24
47K_0402_5%
RA24
47K_0402_5%
1 2
RA16 2.2K_0402_5%RA16 2.2K_0402_5%
12
UA1
ALC280Q-GR_QFN48_6X6
UA1
ALC280Q-GR_QFN48_6X6
AVDD1 27
AVDD2 38
AVSS1 26
AVSS2 33
DVDD 9
DVDD_IO 3
AUX_CLK_In
15
PVDD1 41
PVDD2 46
NC
16 NC
17 CPVEE 34
JDREF 22
VREF 25
LDO_CAP 21
AGPO/MIC1_VREFO 30
LINE1_VREFO 23
AUX mode/GPIO2
47
NC
18
NC
24
SENSE A
13
SENSE B
14
SPK_OUT_L+ 42
SPK_OUT_L- 43
SPK_OUT_R+ 45
SPK_OUT_R- 44
HP_OUT_L 31
HP_OUT_R 32
PCBEEP
12
LINE1_L
28
LINE1_R
29
LINE2_L
39
LINE2_R
40
MIC1_L
19
MIC1_R
20
CBP
36
CBN
35
MONO_OUT 37
RESET#
11
GPIO1/1st DMIC
4
GPIO0/DMIC-CLK
2
GPIO4
7
SYNC 10
BCLK 6
SDATA_OUT 5
SDATA_IN 8
EAPD+PD# 48
GPIO3/SPDIFO 1
DVSS 49
CA5 0.1U_0402_10V7KCA5 0.1U_0402_10V7K
1
2
RA5 75_0402_1%RA5 75_0402_1%
QA1B
2N7002DW-T/R7_SOT363-6
QA1B
2N7002DW-T/R7_SOT363-6
3
5
4
CA11
0.1U_0402_10V7K
CA11
0.1U_0402_10V7K
1
2
CA48
10P_0402_50V8J
@
CA48
10P_0402_50V8J
@
1 2
CA38
10U_0603_6.3V6M
@
CA38
10U_0603_6.3V6M
@
1
2
CA13
0.1U_0402_10V7K
CA13
0.1U_0402_10V7K
1
2
CA40
1U_0402_6.3V4Z
@
CA40
1U_0402_6.3V4Z
@
1
2
RA42
10K_0402_5%
RA42
10K_0402_5%
1 2
CA1
10U_0603_6.3V6M
CA1
10U_0603_6.3V6M
1
2
CA17
100P_0402_50V8J
CA17
100P_0402_50V8J
CA10
10U_0603_6.3V6M
CA10
10U_0603_6.3V6M
1
2
CA24 0.1U_0603_50V7KCA24 0.1U_0603_50V7K
1 2
CA50
0.1U_0402_10V7K
@
CA50
0.1U_0402_10V7K
@
1
2
RA19
1K_0402_5%
RA19
1K_0402_5%
1 2
RA26
0_0402_5%
271@
RA26
0_0402_5%
271@
1 2
LA4
0_0603_1%
LA4
0_0603_1%
12
RA1 0_0603_5%
@
RA1 0_0603_5%
@
1 2
RA25
100K_0402_5%
RA25
100K_0402_5%
12
RA29 0_0603_5%RA29 0_0603_5%
1 2
RA41
FBMA-10-100505-301T
CAM@
RA41
FBMA-10-100505-301T
CAM@
LA5
0_0603_1%
LA5
0_0603_1%
12
CA18 10U_0603_6.3V6MCA18 10U_0603_6.3V6M
12
CA52
10U_0603_6.3V6M
@
CA52
10U_0603_6.3V6M
@
1
2
CA20
0.1U_0402_10V7K
CA20
0.1U_0402_10V7K
1
2
G
D
S
QA2
AO3413_SOT23
G
D
S
QA2
AO3413_SOT23
2
1 3
CA2
0.1U_0402_10V7K
CA2
0.1U_0402_10V7K
1
2
QA3A
2N7002DW-T/R7_SOT363-6
QA3A
2N7002DW-T/R7_SOT363-6
61
2
CA390.1U_0402_10V7K
OSC@
CA390.1U_0402_10V7K
OSC@
1 2
LA3
0_0603_1%
LA3
0_0603_1%
12
CA4
0.1U_0402_10V7K
CA4
0.1U_0402_10V7K
1
2
CA28
10U_0603_6.3V6M
@
CA28
10U_0603_6.3V6M
@
1
2
CA26 0.1U_0603_50V7KCA26 0.1U_0603_50V7K
1 2
CA6
10U_0603_6.3V6M
CA6
10U_0603_6.3V6M
1
2
RA3 10K_0402_5%
@
RA3 10K_0402_5%
@
1 2
RA20 20K_0402_1%RA20 20K_0402_1%
12
RA15 2.2K_0402_5%RA15 2.2K_0402_5%
12
RA2710_0402_5%
@
RA2710_0402_5%
@
12
LA1
PBY160808T-601Y-N_2P
LA1
PBY160808T-601Y-N_2P
1 2
QA1A
2N7002DW-T/R7_SOT363-6
QA1A
2N7002DW-T/R7_SOT363-6
61
2
RA11
4.7K_0402_5%
RA11
4.7K_0402_5%
1 2
CA41
1U_0402_6.3V4Z
@
CA41
1U_0402_6.3V4Z
@
1
2
RA22 10_0603_5%RA22 10_0603_5%
1 2
XA1
12.288MHZ_15PF_SSW012288D3CH
OSC@
XA1
12.288MHZ_15PF_SSW012288D3CH
OSC@
GND 2
VDD
4
VCOUNT
1
OUT 3
CA3
10U_0603_6.3V6M
CA3
10U_0603_6.3V6M
1
2
UA3
SN74AHC1G08DCKR_SC70-5
UA3
SN74AHC1G08DCKR_SC70-5
IN1
1
IN2
2
G
3
O4
P5
LA2
0_0603_1%
LA2
0_0603_1%
12
CA43
0.1U_0402_10V7K
CA43
0.1U_0402_10V7K
1
2
CA44
0.01U_0402_25V7K
CA44
0.01U_0402_25V7K
1
2
CA21
2.2U_0603_6.3V6K
@
CA21
2.2U_0603_6.3V6K
@
1
2
RA6 75_0402_1%RA6 75_0402_1%
RA18 100K_0402_5%RA18 100K_0402_5%
CA16 2.2U_0603_10V6KCA16 2.2U_0603_10V6K
12
G
D
S
QA5
2N7002_SOT23-3
G
D
S
QA5
2N7002_SOT23-3
2
13
RA17 100K_0402_5%RA17 100K_0402_5%
CA29
10U_0603_6.3V6M
@
CA29
10U_0603_6.3V6M
@
1
2
CA12
10U_0603_6.3V6M
CA12
10U_0603_6.3V6M
1
2
CA23 0.1U_0603_50V7KCA23 0.1U_0603_50V7K
1 2
RA12 0_0603_5%RA12 0_0603_5%
1 2
RA8 20K_0402_1%RA8 20K_0402_1%
12
CA31
10U_0603_6.3V6M
@
CA31
10U_0603_6.3V6M
@
1
2
RA7 33_0402_5%RA7 33_0402_5%
12
CA46
0.1U_0402_10V7K
CA46
0.1U_0402_10V7K
1 2
CA42
10P_0402_50V8J
CA42
10P_0402_50V8J
1
2
MIC1_L_L
MIC1_L_R
HP_R_L
HP_L_L
JACK_SENSE<42>
MIC1_R<42>
MIC1_L<42>
HP_R<42>
HP_L<42>
NBA_PLUG<42>
SPK_L1<42> SPK_L2<42> SPK_R1<42> SPK_R2<42>
+3VL
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
43 61
Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
43 61
Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
43 61
Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
For EMI
For EMI
SPK CONN.
EXT.MIC/LINE IN JACK
HeadPhone/LINE OUT JACK
For EMI
4019HG
CA5127P_0402_50V8J CA5127P_0402_50V8J
1 2
CA37
0.1U_0402_10V7K
@CA37
0.1U_0402_10V7K
@
1
2
JLINE
SINGA_2SJ-0960-D06
@
JLINE
SINGA_2SJ-0960-D06
@
6
5
3
2
1
4
CA33
100P_0402_50V8J
CA33
100P_0402_50V8J
DA3
PJDLC05_SOT23-3
@DA3
PJDLC05_SOT23-3
@
2
3
1
DA6
PJDLC05_SOT23-3
@
DA6
PJDLC05_SOT23-3
@
2
3
1
JEXMIC
SINGA_2SJ-0960-D06
@
JEXMIC
SINGA_2SJ-0960-D06
@
6
5
3
2
1
4
LA9
CHILISIN PBY100505T-121Y-N 0402
LA9
CHILISIN PBY100505T-121Y-N 0402
1 2
DA4
PJDLC05_SOT23-3
@DA4
PJDLC05_SOT23-3
@
2
3
1
LA6
CHILISIN PBY100505T-121Y-N 0402
LA6
CHILISIN PBY100505T-121Y-N 0402
1 2
LA7
CHILISIN PBY100505T-121Y-N 0402
LA7
CHILISIN PBY100505T-121Y-N 0402
1 2
DA5 PJDLC05_SOT23-3
@
DA5 PJDLC05_SOT23-3
@
2
3
1
RA23
4.7K_0402_5%
RA23
4.7K_0402_5%
CA35
100P_0402_50V8J
CA35
100P_0402_50V8J
CA34
0.1U_0402_10V7K
@CA34
0.1U_0402_10V7K
@
1
2
JSPK
ACES_50278-00401-001
@
JSPK
ACES_50278-00401-001
@
1
1
2
2
3
3
4
4
G1
5
G2
6
LA8
CHILISIN PBY100505T-121Y-N 0402
LA8
CHILISIN PBY100505T-121Y-N 0402
1 2
CA36
100P_0402_50V8J
CA36
100P_0402_50V8J
CA32
100P_0402_50V8J
CA32
100P_0402_50V8J
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BATT_TEMPA
CLK_PCI_EC
EC_RST#
EC_SMB_DA1
EC_SMB_CK1
EC_WL_BT_LED
LPC_AD1
SERIRQ
KB_RST#
LPC_AD0
GATEA20
LPC_FRAME#
LPC_AD3
LPC_AD2
PLT_RST#
EC_LID_OUT#
PCH_RSMRST#
USB_EN#
BATT_FULL_LED#
BKOFF#
SYSON
TP_DATA
TP_CLK
CLK_PCI_EC
EC_RST#
KSO2
KSO4
KSO5
KSO0
KSO1
KSO8
KSO10
KSO12
KSO3
KSO6
KSO9
KSO15
KSO14
KSO13
KSO7
PM_SLP_S3#
FAN_SPEED1
PWR_SUSP_LED#
KSO11
E51_TXD
KSI5
KSI2
KSI4
KSI0
KSI1
KSI3
KSI7
KSI6
EC_SMB_DA2
EC_SMI#
EC_SCI#
EC_SMB_CK1
EC_SMB_DA1
NUM_LED#
EC_SMB_CK2
BATT_TEMPA
TP_CLK
TP_DATA
CAPS_LED#
KSI[0..7]
KSO[0..17]
EC_SMB_CK2
EC_SMB_DA2
+EC_V18R
SUSP#
ACIN_D
VGATE
SLP_S5#
KSO17
KSO16
E51_RXD
ADP_V
ADP_I
VR_ON
E51_TXD
SYSON
TMPTU2_SXP
TMPTU1_SXP
TMPTU2_SXP
TMPTU1_SXP
SLP_S5#
SUSP#
CEC_INT#
EC_MUTE#
PWRME_CTRL
+5VL_CIR
CIR_IN
WOL_EN#
PLT_RST#
SUSP#
VR_ON
SA_PGOOD
FANPWM
USB_CHG_EN#_R
H_PROCHOT#_EC
USB_CHG_EN#_R
PM_PWROK_EC
HDPINT
EC_ENBKL
BATT_CHG_LOW_LED#
PWR_ON_LED#
PROCHOT_IN
H_PROCHOT#_EC
VCOUT0_PH_L
PBTN_OUT#
VCIN0_PH
ACIN_D
EC_ON_R
ON/OFFBTN#
LID_SW#
CEC_INT#
EC_PECI H_PECI
USB_OC#0
CPSETIN
CIR_IN
USB_OC#1
GPS_DOWN#
SLP_S5#
PM_PWROK_EC
VCOUT0_PH_L
SM_SENSE#
LID_SW#
ACIN_D
SM_EN
AOAC_EN#
EC_ON_R
H_PROCHOT#_EC
PWR_GPS_DOWN#
HDPLOCK
PWR_GPS_DOWN#
HDPACT
PWRMOS_TEMP
SUSACK#
PCH_SUSPWRDN#
KB_LED
FUNCTION_LED#
PCH_PWR_EN
WL_OFF#
LNB_OC#
LNB_EN
LNB_EN
EC_WL_BT_LED
EC_WL_BT_LED
AOAC_WAKE#
ACIN <27,50>
GATEA20<30>
LPC_AD2<25,45> LPC_AD1<25,45> LPC_AD0<25,45>
LPC_FRAME#<25,45>
KB_RST#<30>
LPC_AD3<25,45>
PLT_RST#<5,29,36,37,38,40,45>
BATT_FULL_LED# <46>
BKOFF# <22>
TP_DATA <46>
TP_CLK <46>
SYSON <52>
CLK_PCI_EC<29>
EC_SMB_DA1<24,49,50> EC_SMB_CK1<24,49,50>
EC_SMI#<30>
EC_SCI#<30>
EC_SMB_DA2<13,26,45> EC_SMB_CK2<13,26,45>
PWR_SUSP_LED#<46> NUM_LED#<45>
FAN_SPEED1<5>
PM_SLP_S3#<27>
E51_TXD<36,45>
BATT_TEMPA <49>
CAPS_LED# <45>
KSI[0..7]<45,46>
KSO[0..17]<45,46>
ADP_V <50>
ADP_I <49,50>
SERIRQ<25>
E51_RXD<36,45>
USB_EN# <39>
VGATE <5,27,55>
PCH_RSMRST# <27>
EC_LID_OUT# <30>
SUSP# <42,47,53,54,58>
VR_ON <55>
TMPTU1_SXP <36>
TMPTU2_SXP <36>
PM_SLP_S4#<27,40>
PM_SLP_S5#<27>
EC_MUTE# <42>
PWRME_CTRL <25>
WOL_EN# <37>
SA_PGOOD <54>
FANPWM <5>
USB_CHG_EN#<34,40>
CLK_EC<27>
PM_PWROK<5,27>
HDPINT <45>
EC_ENBKL <22>
BATT_CHG_LOW_LED# <46>
PWR_ON_LED# <46>
PROCHOT_IN <49>
VS_ON <49,51>
PBTN_OUT# <5,27>
VCIN0_PH <49>
ON/OFFBTN# <46>
LID_SW# <45>
CEC_INT# <24>
USB_OC#0 <29,39>
USB_OC#1<29,34,40>
SM_SENSE# <42>
SM_EN<42>
AOAC_EN#<36,47>
EC_ON <51>
GPS_DOWN# <13>
H_PROCHOT# <5,49>
VR_HOT#<55>
HDPLOCK <45>
PWR_GPS_DOWN# <58>
HDPACT <45>
PWRMOS_TEMP <58>
SUSACK# <27>
PCH_SUSPWRDN# <27>
KB_LED<45>
FUNCTION_LED# <46>
PCH_PWR_EN <47>
WL_OFF#<36>
CPSETIN <49>
LNB_OC# <53>
H_PECI <5>
LNB_EN <53>
WL_BT_LED#<46>
AOAC_WAKE# <36>
+3VL
+3VL
+3VL
+3VS
+3VL
+3VS
+3VL
+3VS
+3VL
+3VALW
+5VL
+5VL
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
44 61
Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
44 61
Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
44 61
Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
TV tuner
temperature
CIR
For EMI
Close to EC
VCIN0_PH connect to
power portion (9012 only)
PROCHOT_IN connect
to power portion (9012 only)
VCOUT0_PH connect to power portion (9012 only)
PU by each project
function decide
NV-GPU GPS function control pin
For KB9012 EC_ON low pulse work around
Voltage Comparator Pins FOR 9012 A3
VCIN0 pin109
VCIN1 pin102
LOW
>1.2V <1.2V
HIGH
VCOUT0 pin104
VCOUT1 pin103 LOW
HIGH
Reserve this signal to EC by SW demand
2011/10/18a
PVT change RF LED control
pin from PCH to EC 12/14
SA00004OB20
4019HG
CB12 0.1U_0402_10V7KCB12 0.1U_0402_10V7K
1 2
RB8 4.7K_0402_5%RB8 4.7K_0402_5%
1 2
RB4 10K_0402_5%RB4 10K_0402_5%
1 2
RB6 10K_0402_5%
@
RB6 10K_0402_5%
@
1 2
UB2
TC7SH08FUF_SSOP5
UB2
TC7SH08FUF_SSOP5
B
1
A
2Y4
P5
G
3
CB13 1U_0402_6.3V6K
@
CB13 1U_0402_6.3V6K
@
1 2
RB9 4.7K_0402_5%RB9 4.7K_0402_5%
1 2
RB7 100K_0402_5%RB7 100K_0402_5%
1 2
CB14 180P_0402_50V8J
@
CB14 180P_0402_50V8J
@
1 2
RB3
10_0402_5%
@
RB3
10_0402_5%
@
12
RB24
10K_0402_5%
RB24
10K_0402_5%
12
CB2
0.1U_0402_10V7K
CB2
0.1U_0402_10V7K
1
2CB8
47P_0402_50V8J
CB8
47P_0402_50V8J
1
2
D
G
S
QB1
SSM3K7002F_SC59-3
D
G
S
QB1
SSM3K7002F_SC59-3
1
3
2
UB3
IRM-V538/TR1_3P
CIR@UB3
IRM-V538/TR1_3P
CIR@
VCC
2
Vout
1
GND
4
GND
3
RB18
330K_0402_5%
RB18
330K_0402_5%
12
RB14 10K_0402_5%RB14 10K_0402_5%
1 2
RB26 100_0805_5%
CIR@
RB26 100_0805_5%
CIR@
1 2
CB50
1U_0402_6.3V6K
CB50
1U_0402_6.3V6K
1
2
RB11 10K_0402_5%
BCAS@
RB11 10K_0402_5%
BCAS@
1 2
CB4
0.1U_0402_10V7K
CB4
0.1U_0402_10V7K
1
2
RB10 4.7K_0402_5%RB10 4.7K_0402_5%
1 2
RB12 2.2K_0402_5%RB12 2.2K_0402_5%
1 2
CB11
10P_0402_50V8J
@
CB11
10P_0402_50V8J
@
1
2
CB6
1000P_0402_50V7K
CB6
1000P_0402_50V7K
1
2
RB17
0_0402_5%
RB17
0_0402_5%
1 2
RB22
100K_0402_5%
RB22
100K_0402_5%
12
CB17
0.1U_0402_10V7K
CB17
0.1U_0402_10V7K
1 2
RB32 0_0402_5%
9012@
RB32 0_0402_5%
9012@
1 2
RB15 2.2K_0402_5%RB15 2.2K_0402_5%
1 2
RB25 0_0402_5%
@
RB25 0_0402_5%
@
1 2
RB34 0_0402_5%
9012@
RB34 0_0402_5%
9012@
1 2
RB35 47K_0402_5%RB35 47K_0402_5%
1 2
CB18
4.7U_0805_10V4Z
CIR@
CB18
4.7U_0805_10V4Z
CIR@
1
2
RB20
0_0402_5%
RB20
0_0402_5%
1 2
RB28 100K_0402_5%RB28 100K_0402_5%
1 2
CB1
0.1U_0402_10V7K
CB1
0.1U_0402_10V7K
1
2
RB16 2.2K_0402_5%RB16 2.2K_0402_5%
1 2
CB15
4.7U_0805_10V4Z
CB15
4.7U_0805_10V4Z
1
2
RB1
0_0402_5%
RB1
0_0402_5%
1 2
CB16
20P_0402_50V8
CB16
20P_0402_50V8
1
2
RB13 2.2K_0402_5%RB13 2.2K_0402_5%
1 2
RB23 10K_0402_5%RB23 10K_0402_5%
1 2
RB29 10K_0402_5%RB29 10K_0402_5%
1 2
CB10 100P_0402_50V8JCB10 100P_0402_50V8J
1 2
CB5
0.1U_0402_10V7K
CB5
0.1U_0402_10V7K
1
2
RB19 43_0402_1%RB19 43_0402_1%
1 2
G
D
S
QB2
2N7002_SOT23-3
G
D
S
QB2
2N7002_SOT23-3
2
13
RB2
47K_0402_5%
RB2
47K_0402_5%
1 2
RB36
2.2K_0402_5%
RB36
2.2K_0402_5%
1 2
LPC & MISC
Int. K/B
Matrix
SM Bus
GPIO
GPIO
AD Input
PWM Output
DA Output
PS2 Interface
SPI Device Interface
SPI Flash ROM
GPO
GPI
UB1
KB9012QF-A3_LQFP128_14X14
LPC & MISC
Int. K/B
Matrix
SM Bus
GPIO
GPIO
AD Input
PWM Output
DA Output
PS2 Interface
SPI Device Interface
SPI Flash ROM
GPO
GPI
UB1
KB9012QF-A3_LQFP128_14X14
GATEA20/GPIO00
1
KBRST#/GPIO01
2
SERIRQ
3
LPC_FRAME#
4
LPC_AD3
5
PM_SLP_S3#/GPIO04
6
LPC_AD2
7
LPC_AD1
8
EC_VDD/VCC 9
LPC_AD0
10
GND/GND
11
CLK_PCI_EC
12
PCIRST#/GPIO05
13
PM_SLP_S5#/GPIO07
14
EC_SMI#/GPIO08
15
GPIO0A
16
GPIO0B
17
GPIO0C
18
GPIO0D
19
EC_SCII#/GPIO0E
20
GPIO0F 21
EC_VDD/VCC 22
BEEP#/GPIO10 23
GND/GND
24
EC_INVT_PWM/GPIO11
25
GPIO12 26
ACOFF/GPIO13 27
FAN_SPEED1/GPIO14
28
EC_PME#/GPIO15
29
EC_TX/GPIO16
30
EC_RX/GPIO17
31
PCH_PWROK/GPIO18
32
EC_VDD/VCC 33
SUSP_LED#/GPIO19
34
GND/GND
35
NUM_LED#/GPIO1A
36
EC_RST#
37
GPIO1D
38
KSO0/GPIO20
39
KSO1/GPIO21
40
KSO2/GPIO22
41
KSO3/GPIO23
42
KSO4/GPIO24
43
KSO5/GPIO25
44
KSO6/GPIO26
45
KSO7/GPIO27
46
KSO8/GPIO28
47
KSO9/GPIO29
48
KSO10/GPIO2A
49
KSO11/GPIO2B
50
KSO12/GPIO2C
51
KSO13/GPIO2D
52
KSO14/GPIO2E
53
KSO15/GPIO2F
54
KSI0/GPIO30
55
KSI1/GPIO31
56
KSI2/GPIO32
57
KSI3/GPIO33
58
KSI4/GPIO34
59
KSI5/GPIO35
60
KSI6/GPIO36
61
KSI7/GPIO37
62
BATT_TEMP/GPIO38 63
GPIO39 64
ADP_I/GPIO3A 65
GPIO3B 66
EC_VDD/AVCC 67
DAC_BRIG/GPIO3C 68
AGND/AGND
69
EN_DFAN1/GPIO3D 70
IREF/GPIO3E 71
CHGVADJ/GPIO3F 72
ENBKL/GPIO40 73
PECI_KB930/GPIO41 74
GPIO42 75
IMON/GPIO43 76
EC_SMB_CK1/GPIO44
77
EC_SMB_DA1/GPIO45
78
EC_SMB_CK2/GPIO46
79
EC_SMB_DA2/GPIO47
80
KSO16/GPIO48
81
KSO17/GPIO49
82
EC_MUTE#/GPIO4A 83
USB_EN#/GPIO4B 84
CAP_INT#/GPIO4C 85
EAPD/GPIO4D 86
TP_CLK/GPIO4E 87
TP_DATA/GPIO4F 88
FSTCHG/GPIO50 89
BATT_CHG_LED#/GPIO52 90
CAPS_LED#/GPIO53 91
PWR_LED#/GPIO54 92
BATT_LOW_LED#/GPIO55 93
GND/GND
94
SYSON/GPIO56 95
EC_VDD/VCC 96
CPU1.5V_S3_GATE/GPXIOA00 97
WOL_EN/GPXIOA01 98
ME_EN/GPXIOA02 99
EC_RSMRST#/GPXIOA03 100
EC_LID_OUT#/GPXIOA04 101
PROCHOT_IN/GPXIOA05 102
H_PROCHOT#_EC/GPXIOA06 103
VCOUT0_PH/GPXIOA07 104
BKOFF#/GPXIOA08 105
PBTN_OUT#/GPXIOA09 106
PCH_APWROK/GPXIOA10 107
SA_PGOOD/GPXIOA11 108
VCIN0_PH/GPXIOD00 109
AC_IN/GPXIOD01 110
EC_VDD0 111
EC_ON/GPXIOD02 112
GND0
113
ON/OFF/GPXIOD03 114
LID_SW#/GPXIOD04 115
SUSP#/GPXIOD05 116
GPXIOD06 117
PECI_KB9012/GPXIOD07 118
SPIDI/GPIO5B 119
SPIDO/GPIO5C 120
VR_ON/GPIO57 121
XCLKI/GPIO5D
122
XCLKO/GPIO5E
123 V18R 124
EC_VDD/VCC 125
SPICLK/GPIO58 126
PM_SLP_S4#/GPIO59 127
SPICS#/GPIO5A 128
RB5 10K_0402_5%RB5 10K_0402_5%
1 2
CB9 100P_0402_50V8JCB9 100P_0402_50V8J
1 2
RH327
10K_0402_5%
RH327
10K_0402_5%
1 2
CB7
1000P_0402_50V7K
CB7
1000P_0402_50V7K
1
2
DB1RB751V40_SC76-2 DB1RB751V40_SC76-2 12
RB27
100K_0402_5%
RB27
100K_0402_5%
1 2
RB21 10K_0402_5%RB21 10K_0402_5%
1 2
CB3
0.1U_0402_10V7K
CB3
0.1U_0402_10V7K
1 2
KSO17
KSO16
KSO[0..17]
KSI[0..7]
KSO15
KSO14
KSO2
KSO4
KSO5
KSO0
KSO1
KSO12
KSO6
KSO13
KSO3
KSO7
KSO10
KSO11
KSO8
KSO9
KSI0
KSI2
KSI3
KSI7
KSI1
KSI5
KSI6
KSI4
KSO10
KSO11
KSO12
KSO15
KSI7
KSI2
KSI3
KSI4
KSI0
KSI5
KSI6
KSI1
KSO14
KSO2
KSO4
KSO5
KSO0
KSO1
KSO6
KSO13
KSO3
KSO7
KSO8
KSO9
NUM_LED#
CAPS_LED#
JKB34
CAPS_LED#
NUM_LED#
JKB4
KSO16
KSO17
VOUTX
VOUTY
VOUTZ
SELF_TEST
GXIN
GXOUT
SELF_TEST
VOUTX
VOUTY
HDPINT
VOUTZ
CLK_PCI_DDR
E51_TXD_DB
E51_RXD_DB
CLK_PCI_DDR
KSI[0..7] <44,46>
KSO[0..17] <44,46>
CAPS_LED# <44>
NUM_LED# <44>
HDPINT<44>
HDPACT <44>
EC_SMB_CK2<13,26,44>
EC_SMB_DA2 <13,26,44>
KB_LED<44>
HDPLOCK <44>
CLK_PCI_DDR <29>
LPC_AD2 <25,44>
LPC_FRAME# <25,44>
PLT_RST# <5,29,36,37,38,40,44>
E51_RXD <36,44>
E51_TXD <36,44>
LPC_AD0 <25,44>
LPC_AD1 <25,44>
LPC_AD3 <25,44>
LID_SW# <44>
+3VS
+3VS
+5VS +3VS_HDP +3VS_HDP
+3VS_HDP
+3VS_HDP
+3VS_HDP
+5VS_LED
+5VS
+5VS_LED
+3VALW
+3VS
+3VL
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
45 61
Thursday, February 16, 2012
2011/12/14 2012/12/31
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
45 61
Thursday, February 16, 2012
2011/12/14 2012/12/31
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
45 61
Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
SPI Flash (128KB) LPC Debug Port Place the PAD under DDR DIMM.
KEYBOARD CONN.
Close to JKB
G-Sensor
Keyboard LED
Place UG1 and UG4
on TOP Layer
For EMI
For EMI
Lid SW
SA00003A600
SA00004GB00
RG5 4.7K_0402_5%GSENSOR@
RG5 4.7K_0402_5%GSENSOR@
12
C412 100P_0402_50V8JC412 100P_0402_50V8J
1 2
C422 100P_0402_50V8JC422 100P_0402_50V8J
1 2
C417 100P_0402_50V8JC417 100P_0402_50V8J
1 2
C413 100P_0402_50V8JC413 100P_0402_50V8J
1 2
JDB
ACES_88512-1641
@JDB
ACES_88512-1641
@
11
G17
17 G18
18
22
33
44
55
66
77
88
99
10 10
11 11
12 12
13 13
14 14
15 15
16 16
C406 100P_0402_50V8JC406 100P_0402_50V8J
1 2
C431 100P_0402_50V8JC431 100P_0402_50V8J
1 2
RG6 4.7K_0402_5%
GSENSOR@
RG6 4.7K_0402_5%
GSENSOR@
12
CG2 0.033U_0402_16V7K
GSENSOR@
CG2 0.033U_0402_16V7K
GSENSOR@
1 2
G
D
S
Q38
AO3413_SOT23-3
KBL@
G
D
S
Q38
AO3413_SOT23-3
KBL@
2
13
C407 100P_0402_50V8JC407 100P_0402_50V8J
1 2
C415 100P_0402_50V8JC415 100P_0402_50V8J
1 2
C411 100P_0402_50V8JC411 100P_0402_50V8J
1 2
R376 300_0402_5%R376 300_0402_5%
12
C402 100P_0402_50V8JC402 100P_0402_50V8J
1 2
C424 100P_0402_50V8JC424 100P_0402_50V8J
1 2
CG8
0.1U_0402_10V7K
GSENSOR@
CG8
0.1U_0402_10V7K
GSENSOR@
1
2
UG5
R5F211B4D34SP GSENSOR@
UG5
R5F211B4D34SP GSENSOR@
P3_7/CNTR0#/SSO/TXD1
2
XOUT/P4_7
4
P1_0/KI0#/AN8/CMP0_0 18
VSS/AVSS
5
P1_1/KI1#/AN9/CMP0_1 17
XIN/P4_6
6
P3_5/SSCK/SCL/CMP1_2
1
P1_5/RXD0/CNTR01/INT11# 12
RESET#
3
P1_3/KI3#/AN11/TZOUT 14
MODE
8
P1_7/CNTR00/INT10#
10
P4_2/VREF 16
P3_3/TCIN/INT3#/SSI00/CMP1_0 19
P1_6/CLK0/SSI01 11
P1_2/KI2#/AN10/CMP0_2 15
P1_4/TXD0 13
P3_4/SCS#/SDA/CMP1_1 20
P4_5/INT0#/RXD1
9
VCC/AVCC
7
RG7 1K_0402_5%
GSENSOR@
RG7 1K_0402_5%
GSENSOR@
12
CG14
0.22U_0402_10V4Z
@
CG14
0.22U_0402_10V4Z
@
12
JKB
HB_A803419-SBHR21
@
JKB
HB_A803419-SBHR21
@
11
22
33
44
55
66
77
88
99
10 10
11 11
12 12
13 13
14 14
15 15
16 16
17 17
18 18
19 19
20 20
21 21
22 22
23 23
24 24
25 25
26 26
27 27
28 28
29 29
30 30
31 31
32 32
33 33
34 34
GND1
35 GND2
36
C457
22P_0402_50V8J
@
C457
22P_0402_50V8J
@
1 2
C409 100P_0402_50V8JC409 100P_0402_50V8J
1 2
RG9
47K_0402_5%
GSENSOR@
RG9
47K_0402_5%
GSENSOR@
1 2
UG3
G9191-330T1U_SOT23-5
GSENSOR@UG3
G9191-330T1U_SOT23-5
GSENSOR@
VIN
1
SHDN#
3
VOUT 5
GND
2
BP 4
RG10 47K_0402_5%
GSENSOR@
RG10 47K_0402_5%
GSENSOR@
12
C418 100P_0402_50V8JC418 100P_0402_50V8J
1 2
U21
APX9132ATI-TRL_SOT23-3
U21
APX9132ATI-TRL_SOT23-3
GND
1
VDD
2VOUT 3
CG1 0.033U_0402_16V7K
GSENSOR@
CG1 0.033U_0402_16V7K
GSENSOR@
1 2
C452
10P_0402_50V8J
C452
10P_0402_50V8J
1
2
R21 0_0402_5%
@
R21 0_0402_5%
@
1 2
CG3 0.033U_0402_16V7K
GSENSOR@
CG3 0.033U_0402_16V7K
GSENSOR@
1 2
CG6
0.1U_0402_10V7K
GSENSOR@
CG6
0.1U_0402_10V7K
GSENSOR@
1
2
G
D
S
Q52
2N7002_SOT23-3
KBL@
G
D
S
Q52
2N7002_SOT23-3
KBL@
2
13
C404 100P_0402_50V8JC404 100P_0402_50V8J
1 2
RG4 4.7K_0402_5%GSENSOR@
RG4 4.7K_0402_5%GSENSOR@
12
JBLG
E-T_6905K-Q04N-00R
@
JBLG
E-T_6905K-Q04N-00R
@
11
22
33
44
G1 5
G2 6
R587
10K_0402_5%
KBL@
R587
10K_0402_5%
KBL@
12
CG13
1U_0402_6.3V6K
GSENSOR@
CG13
1U_0402_6.3V6K
GSENSOR@
1
2
CG7
0.1U_0402_10V7K
GSENSOR@
CG7
0.1U_0402_10V7K
GSENSOR@
1
2
C408 100P_0402_50V8JC408 100P_0402_50V8J
1 2
C836
0.1U_0402_10V7K
KBL@
C836
0.1U_0402_10V7K
KBL@
1
2
RG3 4.7K_0402_5%GSENSOR@
RG3 4.7K_0402_5%GSENSOR@
12
C416 100P_0402_50V8JC416 100P_0402_50V8J
1 2
C433 100P_0402_50V8JC433 100P_0402_50V8J
1 2
C405 100P_0402_50V8JC405 100P_0402_50V8J
1 2
C425 100P_0402_50V8JC425 100P_0402_50V8J
1 2
C421 100P_0402_50V8JC421 100P_0402_50V8J
1 2
R372 300_0402_5%R372 300_0402_5%
1 2
CG12
1U_0402_6.3V6K
GSENSOR@
CG12
1U_0402_6.3V6K
GSENSOR@
1
2
UG1
TSH352TR LGA 16P
GSENSOR@UG1
TSH352TR LGA 16P
GSENSOR@
GND1 1
Vdd1
2Voutx 3
ST
4
Vouty 5
PD
6
Voutz 7
FS
8
Rev
9
NC1 10
NC2 11
Vdd2
12
GND2 13
NC3 14
NC4 15
NC5 16
C453
0.1U_0402_16V4Z
C453
0.1U_0402_16V4Z
1
2
C429 100P_0402_50V8JC429 100P_0402_50V8J
1 2
R23 0_0402_5%
@
R23 0_0402_5%
@
1 2
C427 100P_0402_50V8JC427 100P_0402_50V8J
1 2
C419 100P_0402_50V8JC419 100P_0402_50V8J
1 2
C410 100P_0402_50V8JC410 100P_0402_50V8J
1 2
C423 100P_0402_50V8JC423 100P_0402_50V8J
1 2
C401 100P_0402_50V8JC401 100P_0402_50V8J
1 2
C420 100P_0402_50V8JC420 100P_0402_50V8J
1 2
R393
22_0402_5%
@
R393
22_0402_5%
@
1 2
C435 100P_0402_50V8JC435 100P_0402_50V8J
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ON/OFFBTN#
ON/OFFBTN#
PWR_ON_LED#
PWR_ON_LED#
ON/OFFBTN#
KSI7
KSI6
+5VS_FUNC
KSIFUNCTION
KSO0
TP_DATA
TP_CLK
KSO0
FUNCTION_LED#
KSIFUNCTION
ON/OFFBTN# <44>
LED_WIMAX# <36>
BATT_FULL_LED# <44>
BATT_CHG_LOW_LED# <44>
WL_BT_LED# <44>
TP_DATA<44>
KSI7 <44,45>
KSI6 <44,45>
KSO0 <44,45>
FUNCTION_LED# <44>
TP_CLK<44>
PWR_SUSP_LED# <44>
PWR_ON_LED# <44>
PM_SMBCLK<11,12,26,36> PM_SMBDATA<11,12,26,36>
+5VALW
+3VS
+3VL
+5VALW
+5VALW
+3VS
+5VS
+5VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
46 61
Thursday, February 16, 2012
2011/12/14 2012/12/31
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
46 61
Thursday, February 16, 2012
2011/12/14 2012/12/31
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
46 61
Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
For debug
Screw Hole
PCB Fedical Mark PAD
Power Button
MINI CARD -- 3G
For EMI request
WiMAX LED
ISPD
MINI CARD -- WLAN
FUNCTION/B Connector
VGACPU
ESD solution
EMI solution
BATT CHARGE /FULL LED & AC IN
White LED bright when AC-adaptor is plugged and a Battery is full charged
Amber LED bright when charging battery from AC-adaptor
Amber LED blink during Critical Low battery
POWER LED
Touchpad Connector
Green LED SC500009S00 VF=2.8V~3.15V, Isink<15mA
White LED SC500004W00 VF=2.75V~3.15V, Isink<15mA
PCH
please place near JFUNCTION
please place near JFUNCTION
NPTH
SA00005AGH0 DAZ0OT00400
DC30100AA00
SA000051A00
SA000051A60
SA0000518C0SA00005FHA0
R1
R3
SA00005FHE0
SLJ8E
SLJ8E
R1
SLJ8C
SA000051880
R3
HM76R3@ N13PGSR1@
H16 H_3P0
@
H16 H_3P0
@
1
R1466
0_0402_5%
ECO@ R1466
0_0402_5%
ECO@
1 2
White
Amber
D21
HT-210UD5/BP5-A1681 _AMBER-WHITE
White
Amber
D21
HT-210UD5/BP5-A1681 _AMBER-WHITE
2
13
R8 390_0402_5%R8 390_0402_5%
12 PJP1
PJP1
45@PJP1
PJP1
45@
JFUN
JOINT_F1017WR-S-04P
@
JFUN
JOINT_F1017WR-S-04P
@
11
22
33
44
GND 5
GND 6
R1467
0_0402_5%
3D@ R1467
0_0402_5%
3D@
1 2
H5 H_3P0
@
H5 H_3P0
@
1
D89
YSDA0502C_SOT23-3
@
D89
YSDA0502C_SOT23-3
@
2
31
UH1
Panther Point 82HM77 C-1 HM77
HM77R1@UH1
Panther Point 82HM77 C-1 HM77
HM77R1@
C458
0.1U_0402_25V6
@
C458
0.1U_0402_25V6
@
1
2
H2 H_4P7
@
H2 H_4P7
@
1
R819
10K_0402_5%
WIMAX@
R819
10K_0402_5%
WIMAX@
12
H24 H_3P0
@
H24 H_3P0
@
1
UV4
N13P-GS-A2
N13PGSR3@UV4
N13P-GS-A2
N13PGSR3@
H3 H_4P2x4P7
@
H3 H_4P2x4P7
@
1
R22 390_0402_5%R22 390_0402_5%
1 2
H10 H_3P0
@
H10 H_3P0
@
1
A
D23
HT-110UD5_AMBER
A
D23
HT-110UD5_AMBER
2 1
3
H30 H_3P2x3P7N
@
H30 H_3P2x3P7N
@
1
D83
L30ESD24VC3-2_SOT23-3
D83
L30ESD24VC3-2_SOT23-3
2
31
H15 H_3P0
@
H15 H_3P0
@
1
H14 H_3P0
@
H14 H_3P0
@
1
H13 H_3P0
@
H13 H_3P0
@
1
H22 H_3P2N
@
H22 H_3P2N
@
1
H8 H_7P0N
@
H8 H_7P0N
@
1
FD3
@
FD3
@
1
R52
510_0402_5%
R52
510_0402_5%
1 2
UV4
N13P-GL-A1
N13PGLR1@UV4
N13P-GL-A1
N13PGLR1@
D90
AZC099-04S.R7G_SOT23-6
D90
AZC099-04S.R7G_SOT23-6
I/O4 6
VDD 5
I/O3 4
I/O2
3
GND
2
I/O1
1
Q156B 2N7002DW-T/R7_SOT363-6
WIMAX@
Q156B 2N7002DW-T/R7_SOT363-6
WIMAX@
3
5
4
R53
510_0402_5%
R53
510_0402_5%
1 2
H6 H_3P7x3P0
@
H6 H_3P7x3P0
@
1
H28 H_3P3
@
H28 H_3P3
@
1
JTP
ACES_88058-060N
@
JTP
ACES_88058-060N
@
1
1
2
2
3
3
4
4
5
5
6
6
GND
7
GND
8
UV4
N13P-GL-A1
N13PGLR3@UV4
N13P-GL-A1
N13PGLR3@
H23 H_3P0
@
H23 H_3P0
@
1
H4 H_7P0N
@
H4 H_7P0N
@
1
H20 H_3P0
@
H20 H_3P0
@
1
FD1
@
FD1
@
1
H21 H_3P0
@
H21 H_3P0
@
1
FD4
@
FD4
@
1
R66
510_0402_5%
R66
510_0402_5%
1 2
Q156A
2N7002DW-T/R7_SOT363-6
WIMAX@
Q156A
2N7002DW-T/R7_SOT363-6
WIMAX@
6 1
2
FD2
@
FD2
@
1
G
G
SW3
NTC017-DA1J-D160T_4P
@
G
G
SW3
NTC017-DA1J-D160T_4P
@
1
4
2
3
5
6
ZZZ
PCB LA-8391P
ZZZ
PCB LA-8391P
UH1
Panther Point HM76 SLJ8E C1
HM76R1@UH1
Panther Point HM76 SLJ8E C1
HM76R1@
H1 H_4P2
@
H1 H_4P2
@
1
R49
390_0402_5%
R49
390_0402_5%
1 2
R48
390_0402_5%
R48
390_0402_5%
1 2
White
Amber
D22
HT-210UD5/BP5-A1681 _AMBER-WHITE
White
Amber
D22
HT-210UD5/BP5-A1681 _AMBER-WHITE
2
13
H7 H_4P0N
@
H7 H_4P0N
@
1
JPOWER
JOINT_F1017WR-S-04P
@
JPOWER
JOINT_F1017WR-S-04P
@
11
22
33
44
GND 5
GND 6
H29 H_3P3
@
H29 H_3P3
@
1
R395
100K_0402_5%
R395
100K_0402_5%
1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
SUSP SUSP
0.75VR_EN
SUSP
SUSP
SUSP
VRAM_1.5VS_GATE
VGA_PWROK#
ODD_EN#
DGPU_PWR_EN#
VGA_PWROK#
SUSP
DGPU_PWR_EN#
PCH_PWR_EN#
VRAM_1.5VS_GATE
0.75VR_EN <52>
VCCP_PWRGOOD<53,54>
SUSP#<42,44,53,54,58>
SUSP<5,9,36>
VGA_PWROK<29,30,58>
ODD_EN#<30>
AOAC_EN#<36,44>
DGPU_PWR_EN<29,58>
PCH_PWR_EN#<31,32,37>
PCH_PWR_EN<44>
+VSB
+3VALW +3VS
+VSB
+5VALW +5VS
+0.75VS
+5VALW
+5VALW
+VSB
+1.5V +VRAM_1.5VS
+5VS_ODD
+5VS
+3VS_DGPU +VGA_CORE
+1.05VS_VCCP
+1.05VS_DGPU
+1.05VS_DGPU
+5VALW
+1.05VS_VCCP
+1.8VS
+5VS
+5VS
+5VS_ODD
+3VS
+3VALW
+3VALW
+3V_WLAN
+3VS
+3VS_DGPU
+3VALW
+5VALW
+1.5V +VRAM_1.5VS
+5VALW+5VALW
+1.5V+3VS+5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
47 61
Thursday, February 16, 2012
2011/12/14 2012/12/31
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
47 61
Thursday, February 16, 2012
2011/12/14 2012/12/31
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
47 61
Thursday, February 16, 2012
2011/12/14 2012/12/31
+3VALW TO +3VS
Compal Electronics, Inc.
+5VALW TO +5VS
Vgs=10V,Id=9A,Rds=18.5mohm
For S3 CPU Power Saving
+5VS TO +5VS_ODD
+1.5V to +VRAM_1.5VS
Vgs=10V,Id=14.5A,Rds=6mohm
Vgs=10V,Id=9A,Rds=18.5mohm
For EMI
+1.05VS_VCCP to +1.05VS_DGPU
Vgs=4.5V,Id=3A,Rds<22mohm
Short PJ33 for Discrete SKUs
Vgs=-4.5V,Id=3A,Rds<97mohm
Vgs=-4.5V,Id=3A,Rds<97mohm
+3VALW TO +3V_WLAN
for AOAC and WOWL
+3VS to +3VS_DGPU
Vgs=-4.5V,Id=3A,Rds<97mohm
need mount R105 if system
don't support AOAC or WOWL
ForreduceRds‐on12/05PVT
close to PU700 close to PL402
close to PL402 close to PU700 close to PU450
C679
4.7U_0805_10V4Z
@
C679
4.7U_0805_10V4Z
@
1
2
C465
4.7U_0805_10V4Z
C465
4.7U_0805_10V4Z
1
2
C822
0.1U_0402_10V7K
@
C822
0.1U_0402_10V7K
@
1
2
Q206A
2N7002DW-T/R7_SOT363-6
OPT@
Q206A
2N7002DW-T/R7_SOT363-6
OPT@
61
2
Q53B
2N7002DW-T/R7_SOT363-6
Q53B
2N7002DW-T/R7_SOT363-6
3
5
4
C916
0.1U_0402_10V7K
@
C916
0.1U_0402_10V7K
@
1
2
C481
0.1U_0402_25V6
OPT@
C481
0.1U_0402_25V6
OPT@
G
D
S
Q189
2N7002_SOT23-3
G
D
S
Q189
2N7002_SOT23-3
2
13
C680
1U_0402_6.3V6K
C680
1U_0402_6.3V6K
1
2
G
D
S
Q45
AO3413_SOT23
G
D
S
Q45
AO3413_SOT23
2
1 3
R1457
47K_0402_5%
R1457
47K_0402_5%
1 2
C462
4.7U_0805_10V4Z
C462
4.7U_0805_10V4Z
1
2
R422
100K_0402_5%
R422
100K_0402_5%
1 2
R5534
0_0402_5%
R5534
0_0402_5%
1 2
R434
330K_0402_5%
OPT@
R434
330K_0402_5%
OPT@
12
C217
0.01U_0402_25V7K
C217
0.01U_0402_25V7K
1
2
PJ33
JUMP_43X118
@
PJ33
JUMP_43X118
@
11
2
2
R430
820K_0402_5%
OPT@
R430
820K_0402_5%
OPT@
C475
4.7U_0805_10V4Z
OPT@
C475
4.7U_0805_10V4Z
OPT@
G
D
S
Q210
AO3413_SOT23
G
D
S
Q210
AO3413_SOT23
2
1 3
R459
470_0805_5%
R459
470_0805_5%
1 2
R441
10K_0402_5%
R441
10K_0402_5%
1 2
Q11B
2N7002DW-T/R7_SOT363-6
Q11B
2N7002DW-T/R7_SOT363-6
3
5
4
Q13B
2N7002DW-T/R7_SOT363-6
DIS@
Q13B
2N7002DW-T/R7_SOT363-6
DIS@
3
5
4
C478
1U_0402_6.3V6K
DIS@
C478
1U_0402_6.3V6K
DIS@
1
2
C473
4.7U_0805_10V4Z
DIS@
C473
4.7U_0805_10V4Z
DIS@
1
2
G
D
S
Q55
2N7002_SOT23-3
G
D
S
Q55
2N7002_SOT23-3
2
13
C685
4.7U_0603_6.3V6K
@
C685
4.7U_0603_6.3V6K
@
1
2
Q206B
2N7002DW-T/R7_SOT363-6
OPT@
Q206B
2N7002DW-T/R7_SOT363-6
OPT@
3
5
4
R407
470_0805_5%
R407
470_0805_5%
1 2
G
D
S
Q5527
2N7002E-T1-E3_SOT23-3
SB570020110
G
D
S
Q5527
2N7002E-T1-E3_SOT23-3
SB570020110
2
13
G
D
S
Q190
2N7002_SOT23-3
G
D
S
Q190
2N7002_SOT23-3
2
13
Q29
SI4800BDY_SO8
Q29
SI4800BDY_SO8
S1
S2
S3
G4
D
8
D
7
D
6
D
5
C491
0.1U_0402_10V7K
OPT@
C491
0.1U_0402_10V7K
OPT@
1
2
Q6A
2N7002DW-T/R7_SOT363-6
Q6A
2N7002DW-T/R7_SOT363-6
61
2
C471
0.1U_0402_10V7K
C471
0.1U_0402_10V7K
1
2
C924
10U_0603_6.3V6M
@
C924
10U_0603_6.3V6M
@
1
2
Q13A
2N7002DW-T/R7_SOT363-6
DIS@
Q13A
2N7002DW-T/R7_SOT363-6
DIS@
61
2
R104
0_0805_5%
DIS@
R104
0_0805_5%
DIS@
12
R429
470_0805_5%
DIS@
R429
470_0805_5%
DIS@
1 2
Q6B
2N7002DW-T/R7_SOT363-6
Q6B
2N7002DW-T/R7_SOT363-6
3
5
4
R468
470_0805_5%
R468
470_0805_5%
1 2
Q43
FDS6676AS_SO8
DIS@Q43
FDS6676AS_SO8
DIS@
S1
S2
S3
G4
D
8
D
7
D
6
D
5
C821
0.1U_0402_10V7K
@
C821
0.1U_0402_10V7K
@
1
2
R433
100K_0402_5%
OPT@
R433
100K_0402_5%
OPT@
1 2
C923
10U_0603_6.3V6M
@
C923
10U_0603_6.3V6M
@
1
2
R460
22_0805_5%
OPT@
R460
22_0805_5%
OPT@
1 2
R413
820K_0402_5%
@
R413
820K_0402_5%
@
12
C922
10U_0603_6.3V6M
@
C922
10U_0603_6.3V6M
@
1
2
G
D
S
Q54
AO3413_SOT23
OPT@
G
D
S
Q54
AO3413_SOT23
OPT@
2
1 3
R430
820K_0402_5%
DIS@
R430
820K_0402_5%
DIS@
12
R1456
100K_0402_5%
R1456
100K_0402_5%
12
C466
0.022U_0402_25V7K
C466
0.022U_0402_25V7K
1
2
R431
220K_0402_5%
OPT@
R431
220K_0402_5%
OPT@
R421
22_0805_5%
R421
22_0805_5%
1 2
C468
0.01U_0402_25V7K
C468
0.01U_0402_25V7K
1
2
Q10A
2N7002DW-T/R7_SOT363-6
Q10A
2N7002DW-T/R7_SOT363-6
61
2
R5529
100K_0402_5%
R5529
100K_0402_5%
12
R457
470_0805_5%
R457
470_0805_5%
1 2
Q30
SI4800BDY_SO8
Q30
SI4800BDY_SO8
S1
S2
S3
G4
D
8
D
7
D
6
D
5
R409
120K_0402_5%
R409
120K_0402_5%
1 2
C683
4.7U_0805_10V4Z
@
C683
4.7U_0805_10V4Z
@
1
2
R146
100K_0402_5%
OPT@
R146
100K_0402_5%
OPT@
C686
1U_0402_6.3V6K
OPT@
C686
1U_0402_6.3V6K
OPT@
1
2
R431
220K_0402_5%
DIS@
R431
220K_0402_5%
DIS@
1 2
R429
470_0805_5%
OPT@
R429
470_0805_5%
OPT@
Q207B
2N7002DW-T/R7_SOT363-6
OPT@
Q207B
2N7002DW-T/R7_SOT363-6
OPT@
3
5
4
Q207A
2N7002DW-T/R7_SOT363-6
OPT@
Q207A
2N7002DW-T/R7_SOT363-6
OPT@
61
2
C493
0.1U_0402_25V6
OPT@
C493
0.1U_0402_25V6
OPT@
1
2
C908
0.01U_0402_25V7K
C908
0.01U_0402_25V7K
1
2
Q13
2N7002DW-T/R7_SOT363-6
OPT@
Q13
2N7002DW-T/R7_SOT363-6
OPT@
G
D
S
Q60
2N7002_SOT23-3
G
D
S
Q60
2N7002_SOT23-3
2
13
R146100K_0402_5%
DIS@ R146100K_0402_5%
DIS@
1 2
C459
1U_0402_6.3V6K
C459
1U_0402_6.3V6K
1
2
R458
470_0805_5%
OPT@
R458
470_0805_5%
OPT@
1 2
R5545
10K_0402_5%
R5545
10K_0402_5%
1 2
C475
4.7U_0805_10V4Z
DIS@
C475
4.7U_0805_10V4Z
DIS@
1
2
C467
4.7U_0805_10V4Z
C467
4.7U_0805_10V4Z
1
2
G
D
S
Q188
2N7002_SOT23-3
DIS@
G
D
S
Q188
2N7002_SOT23-3
DIS@
2
13
C917
0.1U_0402_10V7K
@
C917
0.1U_0402_10V7K
@
1
2
R105
0_0805_5%
@
R105
0_0805_5%
@
12
R470
470_0805_5%
R470
470_0805_5%
1 2
C481
0.1U_0402_25V6
DIS@
C481
0.1U_0402_25V6
DIS@
1
2
R406
470_0805_5%
R406
470_0805_5%
1 2
Q43
FDS6676AS_SO8
OPT@
Q43
FDS6676AS_SO8
OPT@
R158 220K_0402_5%R158 220K_0402_5%
1 2
C921
10U_0603_6.3V6M
@
C921
10U_0603_6.3V6M
@
1
2
C461
1U_0402_6.3V6K
C461
1U_0402_6.3V6K
1
2
Q188
2N7002_SOT23-3
OPT@
Q188
2N7002_SOT23-3
OPT@
C920
0.1U_0402_10V7K
@
C920
0.1U_0402_10V7K
@
1
2
C460 4.7U_0805_10V4ZC460 4.7U_0805_10V4Z
1
2
C907
0.1U_0402_10V7K
C907
0.1U_0402_10V7K
1
2
Q53A
2N7002DW-T/R7_SOT363-6
Q53A
2N7002DW-T/R7_SOT363-6
61
2
C492
0.01U_0402_25V7K
OPT@ C492
0.01U_0402_25V7K
OPT@
1
2
Q10B
2N7002DW-T/R7_SOT363-6
Q10B
2N7002DW-T/R7_SOT363-6
3
5
4
C919
0.1U_0402_10V7K
@
C919
0.1U_0402_10V7K
@
1
2
R426
47K_0402_5%
OPT@
R426
47K_0402_5%
OPT@
1 2
R440
47K_0402_5%
R440
47K_0402_5%
1 2
G
D
S
Q56
AO3416_SOT23-3
OPT@
G
D
S
Q56
AO3416_SOT23-3
OPT@
2
13
Q44
FDS6676AS_SO8
OPT@
Q44
FDS6676AS_SO8
OPT@
C684
1U_0402_6.3V6K
OPT@
C684
1U_0402_6.3V6K
OPT@
1
2
Q11A
2N7002DW-T/R7_SOT363-6
Q11A
2N7002DW-T/R7_SOT363-6
61
2
Q44
FDS6676AS_SO8
DIS@Q44
FDS6676AS_SO8
DIS@
S1
S2
S3
G4
D
8
D
7
D
6
D
5
C918
0.1U_0402_10V7K
@
C918
0.1U_0402_10V7K
@
1
2
R410
200K_0402_5%
R410
200K_0402_5%
1 2
C473
4.7U_0805_10V4Z
OPT@
C473
4.7U_0805_10V4Z
OPT@
R412
820K_0402_5%
R412
820K_0402_5%
12
PJ28
JUMP_43X79
@
PJ28
JUMP_43X79
@
1
122
C478
1U_0402_6.3V6K
OPT@
C478
1U_0402_6.3V6K
OPT@
C925
10U_0603_6.3V6M
@
C925
10U_0603_6.3V6M
@
1
2
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
DC_IN_S2DC_IN_S1
+RTCBATT
VIN
+3VALWP +3VALW
+5VALWP
+VSBP +VSB
+0.75VS
+0.75VSP
+5VALW
+3VLP +3VL
VL
+5VL
+RTCBATT
+1.05VS_VCCPP +1.05VS_VCCP+1.8VS+1.8VSP
+1.5VP +1.5V
+16VSP +16VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
48 61
Thursday, February 16, 2012
2011/12/14 2012/12/31
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
48 61
Thursday, February 16, 2012
2011/12/14 2012/12/31
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
48 61
Thursday, February 16, 2012
2011/12/14 2012/12/31
Precharge detector
Min. typ. Max.
H-->L 14.42V 14.74V 15.23V
L-->H 15.39V 15.88V 16.39V
ACIN
(120mA,40mils ,Via NO.= 1)
(5A,200mils ,Via NO.= 10)
OCP=6.2A
(0.5A,40mils ,Via NO.= 1)
(8.13A,200mils ,Via NO.= 16)
OCP=8.7A
(100mA,40mils ,Via NO.= 2)
Compal Electronics, Inc.
-+
RTC Battery
SP093MX0000
(17A,680mils ,Via NO.=34)
OCP=23.91A
(1.54A,70mils ,Via NO.= 4)
OCP=4.2A
4019HG
(15A, 600mils ,Via NO.= 30)
OCP=18A
PJ153
JUMP_43X118
@PJ153
JUMP_43X118
@
11
2
2
PR6
560_0603_5%
PR6
560_0603_5%
1 2
PJ76
JUMP_43X79
@PJ76
JUMP_43X79
@
11
2
2
PJ353
JUMP_43X39
@PJ353
JUMP_43X39
@
11
2
2
PC2
100P_0402_50V8J
PC2
100P_0402_50V8J
12
PJP1
SINGA_2DW-0005-B03
@PJP1
SINGA_2DW-0005-B03
@
+1
-3
-4
+2
PL1
SMB3025500YA_2P
PL1
SMB3025500YA_2P
1 2
PJ162
JUMP_43X79
@PJ162
JUMP_43X79
@
11
2
2
PJ402
JUMP_43X118
@PJ402
JUMP_43X118
@
11
2
2
PJ152
JUMP_43X118
@PJ152
JUMP_43X118
@
11
2
2
PF1
10A_125V_451010MRL
PF1
10A_125V_451010MRL
21
PJ332
JUMP_43X118
@PJ332
JUMP_43X118
@
11
2
2
PC3
1000P_0402_50V7K
PC3
1000P_0402_50V7K
12
PC1
1000P_0402_50V7K
PC1
1000P_0402_50V7K
12
PJ182
JUMP_43X118
@PJ182
JUMP_43X118
@
11
2
2
PC4
100P_0402_50V8J
PC4
100P_0402_50V8J
12
PJ352
JUMP_43X118
@PJ352
JUMP_43X118
@
11
2
2
PJ72
JUMP_43X39
@PJ72
JUMP_43X39
@
11
2
2
PJ403
JUMP_43X118
@PJ403
JUMP_43X118
@
11
2
2
PR5
560_0603_5%
PR5
560_0603_5%
1 2
PJ333
JUMP_43X39
@PJ333
JUMP_43X39
@
11
2
2
PBJ1
MAXEL_ML1220T10@
PBJ1
MAXEL_ML1220T10@
12
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
BATT_S1
BATT_P4
BATT_P5
EC_SMDA
EC_SMCA
BATT_TEMPA <44>
EC_SMB_DA1 <24,44,50>
EC_SMB_CK1 <24,44,50>
POK<27,51>
VS_ON<44,51>
H_PROCHOT#<5,44>
ADP_I <44,50>
PROCHOT_IN <44>
VCIN0_PH <44>
CPSETIN <44>
BATT+
+3VL
VMB
B+ +VSBP
VL
VL
+3VS
+3VLP
VL
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
49 61
Thursday, February 16, 2012
2011/12/14 2012/12/31
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
49 61
Thursday, February 16, 2012
2011/12/14 2012/12/31
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
49 61
Thursday, February 16, 2012
2011/12/14 2012/12/31
Adaptor
Adaptor protection
Throttling point
90W 113.5W
ADP_I Recovery point ADP_I
Recovery at 56 degree C
CPU thermal protection at 90 degree C
PH1 under CPU botten side :
1.783V 86.4W 1.357V
Rset = 3 * Rtmh
Rhyst = (Rset* Rtml) / (3*Rtml - Rset)
Rtmh at 90C = 7.87K, Rtml at 56C = 26.1K
Rset = 3 * 7.87K = 23.61K ==> 23.7K
Rhyst = (23.7K * 26.1K) / (3 * 26.1K - 23.7K) = 11.33K ==> 11.3K
Compal Electronics, Inc.
65W 71.8W 1.504V 1.308V62.5W
4019HG
PC16
.1U_0402_16V7K
9012@ PC16
.1U_0402_16V7K
9012@
12
PR30
110K_0402_1%
9012@ PR30
110K_0402_1%
9012@
1 2
PR24
22K_0402_1%
PR24
22K_0402_1%
1 2
PC8
0.01U_0402_25V7K
PC8
0.01U_0402_25V7K
12
G
D
S
PQ8A
DMN66D0LDW-7_SOT363-6
9012@
G
D
S
PQ8A
DMN66D0LDW-7_SOT363-6
9012@
2
61
G
D
S
PQ6
SSM3K7002FU_SC70-3
G
D
S
PQ6
SSM3K7002FU_SC70-3
2
13
PR20
100_0402_1%
PR20
100_0402_1%
1 2
PR29
100K_0402_1%
930@ PR29
100K_0402_1%
930@
1 2
PR35
100K_0402_1%
9012@PR35
100K_0402_1%
9012@
12
PJP2
SUYIN_200045MR009G171ZR
@PJP2
SUYIN_200045MR009G171ZR
@
11
33
44
55
66
88
99
22
77
GND
11
GND
10
GND
12 GND
13
PR14
1K_0402_1%
PR14
1K_0402_1%
12
PR28
30.9K_0402_1%
930@ PR28
30.9K_0402_1%
930@
1 2
PR25
100K_0402_1%
PR25
100K_0402_1%
1 2
PF2
15A_65V_451015MRL
PF2
15A_65V_451015MRL
21
PC17
.1U_0402_16V7K
@PC17
.1U_0402_16V7K
@
1 2
PC10
0.22U_0603_25V7K
@
PC10
0.22U_0603_25V7K
@
12
PR32
0_0402_5%
9012@ PR32
0_0402_5%
9012@
1 2
PC15
.1U_0402_16V7K
@PC15
.1U_0402_16V7K
@
12
PR26
0_0402_5%
PR26
0_0402_5%
1 2
PH1
100K_0402_1%_NCP15WF104F03RC
PH1
100K_0402_1%_NCP15WF104F03RC
12
PR27
100K_0402_1%
9012@ PR27
100K_0402_1%
9012@
1 2
PR17
10.7K_0402_1%
9012@ PR17
10.7K_0402_1%
9012@
12
PR19
1K_0402_1%
PR19
1K_0402_1%
12
G
D
S
PQ7
SSM3K7002FU_SC70-3
930@
G
D
S
PQ7
SSM3K7002FU_SC70-3
930@ 2
13
PD6
PJSOT24C_SOT23-3
PD6
PJSOT24C_SOT23-3
2
31
PR22
59K_0402_1%
9012@ PR22
59K_0402_1%
9012@
12
PU2
G718TM1U_SOT23-8
930@ PU2
G718TM1U_SOT23-8
930@
RHYST2 5
OT1
3
OT2
4
GND
2
VCC
1
TMSNS2 6
RHYST1 7
TMSNS1 8
PQ5
TP0610K-T1-E3_SOT23-3
PQ5
TP0610K-T1-E3_SOT23-3
2
13
PR18
11.3K_0402_1%
930@ PR18
11.3K_0402_1%
930@
1 2
G
D
S
PQ8B
DMN66D0LDW-7_SOT363-6
9012@
G
D
S
PQ8B
DMN66D0LDW-7_SOT363-6
9012@
5
34
PC7
1000P_0402_50V7K
PC7
1000P_0402_50V7K
12
PC12
.1U_0402_16V7K
@PC12
.1U_0402_16V7K
@
12
PR16
6.49K_0402_1%
PR16
6.49K_0402_1%
12
PC11
0.1U_0603_25V7K
@PC11
0.1U_0603_25V7K
@
12
PR23
100K_0402_1%
PR23
100K_0402_1%
12
PC9
0.1U_0603_25V7K
930@ PC9
0.1U_0603_25V7K
930@
12
PR15
23.7K_0402_1%
930@ PR15
23.7K_0402_1%
930@
12
PL2
SMB3025500YA_2P
PL2
SMB3025500YA_2P
1 2
PR33
0_0402_5%
9012@ PR33
0_0402_5%
9012@
1 2
PR21
100_0402_1%
PR21
100_0402_1%
1 2
PD5
PJSOT24C_SOT23-3
PD5
PJSOT24C_SOT23-3
2
31
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
BQ24725_ACDRV
BQ24725_ACN
BQ24725_ACP
BQ24725_BATDRV
BQ24725_BATDRV
BQ24725_CMSRC
BQ24725_LX
BQ24725_LX CHG
CSON1
CSOP1
DH_CHG
DL_CHG
BQ24725_ACDRV_1 BQ24725_BATDRV_1
BQ24725_ACDET
BQ24725_ILIM
BQ24725_REGN
BQ24725_VCC
CSON1
CSOP1
SRP
SRN
DH_CHG
DH_CHG1
BQ24725_BST
BQ24725_ACOK
ADP_I <44,49>
EC_SMB_CK1 <24,44,49>
EC_SMB_DA1 <24,44,49>
ACIN<27,44>
ADP_V <44>
P2
P1 B+VIN
+3VALW
VIN
BATT+
VIN
+3VL
VIN
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
50 61
Thursday, February 16, 2012
2011/12/14 2012/12/31
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
50 61
Thursday, February 16, 2012
2011/12/14 2012/12/31
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
50 61
Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
for reverse input protection
Min. Typ Max.
H-->L 17.3V
L--> H 17.8V
Vin Dectector
ILIM and external DPM
3.97A
Please locate the RC
Near EC chip
2011-02-22
Remember to change PC124 from SE000006S80
to SE025104K80 (2011-02-22)
4019HG
PR211
100_0402_5%
PR211
100_0402_5%
1 2
G
D
S
PQ206
SI1304BDL-T1-E3_SC70-3
G
D
S
PQ206
SI1304BDL-T1-E3_SC70-3
1
2
3
PR205
0_0603_5%
PR205
0_0603_5%
12
PR215
0.01_2512_1%
PR215
0.01_2512_1%
1
3
4
2
PC213
2200P_0402_50V7K
PC213
2200P_0402_50V7K
12
PC217
0.1U_0603_25V7K
PC217
0.1U_0603_25V7K
12
PC209
0.1U_0603_16V7K
PC209
0.1U_0603_16V7K
12
PQ204
MDS2659URH_SO8
PQ204
MDS2659URH_SO8
4
7
8
6
5
1
2
3
PC201
10U_0805_25V6K
PC201
10U_0805_25V6K
12
PC224
10U_0805_25V6K
PC224
10U_0805_25V6K
12
PC269
100P_0402_50V8J
PC269
100P_0402_50V8J
12
PQ201
SIS412DN-T1-GE3_POWERPAK8-5
PQ201
SIS412DN-T1-GE3_POWERPAK8-5
4
5
1
2
3
PR218
10_0603_1%
PR218
10_0603_1%
1 2
PR216
@
0_0402_5%
PR216
@
0_0402_5%
12
10U_0805_25V6K
PC227
10U_0805_25V6K
PC227
12
PC205
0.047U_0402_25V7K
PC205
0.047U_0402_25V7K
1 2
PC225
10U_0805_25V6K
PC225
10U_0805_25V6K
12
100P_0402_25V8K
PC230@
100P_0402_25V8K
PC230@
12
0.1U_0402_25V6
PC220
0.1U_0402_25V6
PC220
12
PC212
0.1U_0402_25V6
PC212
0.1U_0402_25V6
1 2
PC222
10U_0805_25V6K
PC222
10U_0805_25V6K
12
PC210
100P_0402_50V8J
PC210
100P_0402_50V8J
12
220P_0402_25V8K
PC231@
220P_0402_25V8K
PC231@
12
68P_0402_50V8J
PC232@
68P_0402_50V8J
PC232@
12
PR217
0_0402_5%
PR217
0_0402_5%
1 2
PL202
4.7UH_ETQP3W4R7WFN_5.5A_20%
PL202
4.7UH_ETQP3W4R7WFN_5.5A_20%
1 2
220P_0402_25V8K
PC233@
220P_0402_25V8K
PC233@
12
PR208
270K_0402_1%
PR208
270K_0402_1%
1 2
PR219 10K_0402_1%PR219 10K_0402_1%
1 2
PR225
0.01_1206_1%
PR225
0.01_1206_1%
1
3
4
2
PC206
680P_0603_50V7K
@PC206
680P_0603_50V7K
@
12
PR202
66.5K_0402_1%
PR202
66.5K_0402_1%
12
PC215
0.1U_0402_25V6
PC215
0.1U_0402_25V6
12
PC208
0.1U_0402_25V6
PC208
0.1U_0402_25V6
12
PC223
0.1U_0402_25V6
PC223
0.1U_0402_25V6
12
PR203
4.12K_0603_1%
PR203
4.12K_0603_1%
1 2
PR204 10K_0402_1%PR204 10K_0402_1%
1 2
PC211
0.1U_0402_25V6
PC211
0.1U_0402_25V6
12
PC219
0.1U_0402_25V6
@
PC219
0.1U_0402_25V6
@
12
PD202
RB751V-40_SOD323-2
PD202
RB751V-40_SOD323-2
12
PL201
1UH_10.3A_20%
PL201
1UH_10.3A_20%
1 2
PC228
.1U_0402_16V7K
PC228
.1U_0402_16V7K
12
PR209
402K_0402_1%
PR209
402K_0402_1%
1 2
PC202
10U_0805_25V6K
PC202
10U_0805_25V6K
12
PQ203
TPCA8057-H 1N PPAK56-8
PQ203
TPCA8057-H 1N PPAK56-8
4
5
1
2
3
PR221
4.12K_0603_1%
PR221
4.12K_0603_1%
12
PU200
BQ24725RGRR_VQFN20_3P5X3P5
PU200
BQ24725RGRR_VQFN20_3P5X3P5
ACN
1
ACP
2
CMSRC
3
ACDRV
4
ACOK
5
ACDET
6
IOUT
7
SDA
8
SCL
9
ILIM
10
BATDRV 11
SRN 12
SRP 13
GND 14
LODRV 15
REGN 16
BTST 17
HIDRV 18
PHASE 19
VCC 20
PAD
21
PC207
1U_0603_25V6K
PC207
1U_0603_25V6K
1 2
PC204
0.01U_0402_25V7K
PC204
0.01U_0402_25V7K
12
PQ205
MDS2659URH_SO8
PQ205
MDS2659URH_SO8
4
7
8
6
5
1
2
3
PC216
0.01U_0402_50V7K
PC216
0.01U_0402_50V7K
12
PC214
1U_0603_25V6K
PC214
1U_0603_25V6K
1 2
PR210
10_1206_1%
PR210
10_1206_1%
12
PR222
4.12K_0603_1%
PR222
4.12K_0603_1%
12
PR201
100K_0402_1%
PR201
100K_0402_1%
12
PQ202
AO4468L_SO8
PQ202
AO4468L_SO8
4
7
8
6
5
1
2
3
PR227
10K_0402_1%
PR227
10K_0402_1%
1 2
PR212
1M_0402_5%
PR212
1M_0402_5%
1 2
PR206
@
4.7_1206_5%
PR206
@
4.7_1206_5%
12
PD201
BAS40CW_SOT323-3
PD201
BAS40CW_SOT323-3
12
3
PC218
0.1U_0402_25V6
PC218
0.1U_0402_25V6
12
PC221
10U_0805_25V6K
PC221
10U_0805_25V6K
12
PR214
6.8_0603_5%
PR214
6.8_0603_5%
1 2
PC203
10U_0805_25V6K
@
PC203
10U_0805_25V6K
@
12
PC226
10U_0805_25V6K
PC226
10U_0805_25V6K
12
PR207
154K_0402_1%
PR207
154K_0402_1%
12
PR228
47K_0402_1%
PR228
47K_0402_1%
12
PR220@
0_0402_5%
PR220@
0_0402_5%
12
PR226
309K_0402_1%
PR226
309K_0402_1%
12
68P_0402_50V8J
PC229@
68P_0402_50V8J
PC229@
12
PR213
3M_0402_5%
PR213
3M_0402_5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ENTRIP2
LG_3V
LX_3V
UG_3V
BST_5V
LX_5V
UG_5V
BST_3V
LG_5V
ENTRIP1 ENTRIP2
ENTRIP1
POK <27,49>
VS_ON<44,49>
EC_ON<44>
3/5V _B+
+5VALWP
+3VALWP
3/5V _B+
3/5V _B+
2VREF_8205
B+ +3VLP
2VREF_8205
VL
VL
B+
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
51 61
Thursday, February 16, 2012
2011/12/14 2012/12/31
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
51 61
Thursday, February 16, 2012
2011/12/14 2012/12/31
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
51 61
Thursday, February 16, 2012
2011/12/14 2012/12/31
Ipeak=5A
Imax=3.5A
F=305KHz
Total Capacitor 330uF
ESR 15mohm
Ipeak=8.13A
Imax=5.7A
F=245KHz
Total Capacitor 440uF
ESR 8.5mohm
SB00000EO00
Compal Electronics, Inc.
4019HG
PQ331
SIS412DN-T1-GE3_POWERPAK8-5
PQ331
SIS412DN-T1-GE3_POWERPAK8-5
4
5
1
2
3
PQ351
SIS412DN-T1-GE3_POWERPAK8-5
PQ351
SIS412DN-T1-GE3_POWERPAK8-5
4
5
1
2
3
PC364
4.7U_0805_10V6K
PC364
4.7U_0805_10V6K
12
PU330
TPS51125
PU330
TPS51125
VFB1 2
VREF 3
VO1 24
ENTRIP1 1
TONSEL 4
VFB2 5
SKIPSEL
14
VCLK
18
VREG5
17
VO2
7
VREG3
8
VIN
16
GND
15
DRVH1 21
VBST1 22
ENTRIP2 6
PGOOD 23
LL1 20
DRVL1 19
EN0
13
VBST2
9
DRVH2
10
LL2
11
DRVL2
12
P PAD
25
PC360
4.7U_0805_25V6K
PC360
4.7U_0805_25V6K
12
PC366
10U_0805_25V6K
PC366
10U_0805_25V6K
12
PR362
14K_0402_1%
PR362
14K_0402_1%
1 2
PQ332
FDMC7692S_MLP8-5
PQ332
FDMC7692S_MLP8-5
4
5
1
2
3
PQ352
FDMC7692S_MLP8-5
PQ352
FDMC7692S_MLP8-5
4
5
1
2
3
PR338
0_0603_5%
PR338
0_0603_5%
1 2
G
D
S
PQ360A
DMN66D0LDW-7_SOT363-6
G
D
S
PQ360A
DMN66D0LDW-7_SOT363-6
2
61
PC368
2200P_0402_25V7K
PC368
2200P_0402_25V7K
12
PC370
0.01U_0402_16V7K
@PC370
0.01U_0402_16V7K
@
12
+
PC351
220U_6.3V_M
17mohm
+
PC351
220U_6.3V_M
17mohm
1
2
PR372
42.2K_0402_1%
PR372
42.2K_0402_1%
12
68P_0402_50V8J
PC234@
68P_0402_50V8J
PC234@
12
PC355
0.1U_0603_25V7K
PC355
0.1U_0603_25V7K
1 2
PL352
4.7UH_VMPI0703AR-4R7M-Z01_5.5A_20%
PL352
4.7UH_VMPI0703AR-4R7M-Z01_5.5A_20%
1 2
PR336
4.7_1206_5%
@PR336
4.7_1206_5%
@
12
PC363
1U_0603_10V6K
PC363
1U_0603_10V6K
12
PC362
1U_0402_6.3V6K
PC362
1U_0402_6.3V6K
12
G
D
S
PQ360B
DMN66D0LDW-7_SOT363-6
G
D
S
PQ360B
DMN66D0LDW-7_SOT363-6
5
34
PC361
4.7U_0805_10V6K
PC361
4.7U_0805_10V6K
12
PC367
2200P_0402_25V7K
PC367
2200P_0402_25V7K
12
100P_0402_25V8K
PC235@
100P_0402_25V8K
PC235@
12
PQ361
DTC115EUA_SC70-3
PQ361
DTC115EUA_SC70-3
2
13
+
PC352
220U_6.3V_M
+
PC352
220U_6.3V_M
1
2
68P_0402_50V8J
PC237@
68P_0402_50V8J
PC237@
12
220P_0402_25V8K
PC240@
220P_0402_25V8K
PC240@
12
PR357
130K_0402_1%
PR357
130K_0402_1%
1 2
PL331
FBMA-L11-201209-121LMA50T_0805
PL331
FBMA-L11-201209-121LMA50T_0805
12
PR335
0_0603_5%
PR335
0_0603_5%
1 2
220P_0402_25V8K
PC236@
220P_0402_25V8K
PC236@
12
PR355
0_0603_5%
PR355
0_0603_5%
1 2
+
PC331
330U_6.3V_M
15mohm
+
PC331
330U_6.3V_M
15mohm
1
2
PR363
20K_0402_1%
PR363
20K_0402_1%
1 2
PC356
680P_0603_50V7K
@PC356
680P_0603_50V7K
@
12
PR337
100K_0402_1%
PR337
100K_0402_1%
1 2
PC336
680P_0603_50V7K
@PC336
680P_0603_50V7K
@
12
PL332
4.7UH_VMPI0703AR-4R7M-Z01_5.5A_20%
PL332
4.7UH_VMPI0703AR-4R7M-Z01_5.5A_20%
1 2
220P_0402_25V8K
PC238@
220P_0402_25V8K
PC238@
12
PR370
100K_0402_1%
PR370
100K_0402_1%
12
PR364
30K_0402_1%
PR364
30K_0402_1%
1 2
PR360
499K_0402_1%
PR360
499K_0402_1%
1 2
PR373
0_0402_5%
9012@PR373
0_0402_5%
9012@
1 2
PR365
19.1K_0402_1%
PR365
19.1K_0402_1%
1 2
PR356
4.7_1206_5%
@PR356
4.7_1206_5%
@
12
PR358
0_0603_5%
PR358
0_0603_5%
1 2
68P_0402_50V8J
PC239@
68P_0402_50V8J
PC239@
12
PR361
100K_0402_5%
PR361
100K_0402_5%
12
PC365
0.1U_0603_25V7K
PC365
0.1U_0603_25V7K
12
PC335
0.1U_0603_25V7K
PC335
0.1U_0603_25V7K
1 2
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
TON_1.5V
BST_1.5V
1.5V_B+
1.5V_B+
SNUB_+1.5VP
DH_1.5V
SW_1.5V
CS_1.5V
DL_1.5V
BST_1.5V-1
VDD_1.5V
EN_1.5V
EN_0.75VSP
FB_1.5V
VTTREF_1.5V
DH_1.5V-1
0.75VR_EN<47>
SYSON<44>
B+
+1.5VP
+5VALW
+5VALW
+1.5VP
+0.75VSP
+1.5V
+1.5VP
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
52 61
Thursday, February 16, 2012
2011/12/14 2012/12/31
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
52 61
Thursday, February 16, 2012
2011/12/14 2012/12/31
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
52 61
Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
4019HG
0.75Volt +/- 5%
TDC 0.525A
Peak Current 0.75A
OCP Current 0.9A
Mode Level +0.75VSP VTTREF_1.5V
S5 L off off
S3 L off on
S0 H on on
Note: S3 - sleep ; S5 - power off
HW side:
CD7 390uF 10m
VGA@ CV131 330uF 9m
DIS
Ipeak=15A
Imax=10.5A
F=285KHz
Total Capacitor 1050uF,
ESR 3.6mohm
PC163
0.033U_0402_16V7K
PC163
0.033U_0402_16V7K
12
68P_0402_50V8J
PC245@
68P_0402_50V8J
PC245@
12
PC154
10U_0805_25V6K
PC154
10U_0805_25V6K
12
PR159
5.1_0603_5%
PR159
5.1_0603_5%
1 2
68P_0402_50V8J
PC242@
68P_0402_50V8J
PC242@
12
PL151
HCB1608KF-121T30_0603
PL151
HCB1608KF-121T30_0603
1 2
PR158
24.9K_0402_1%
PR158
24.9K_0402_1%
1 2
PL152
1UH_VMPI0703AR-1R0M-Z01_11A_20%
PL152
1UH_VMPI0703AR-1R0M-Z01_11A_20%
12
PC164
1U_0603_10V6K
PC164
1U_0603_10V6K
12
PR162
10K_0402_1%
PR162
10K_0402_1%
1 2
PR154
0_0603_5%
PR154
0_0603_5%
1 2
PC167
0.1U_0402_10V7K
PC167
0.1U_0402_10V7K
12
PC166
0.1U_0402_10V7K
@PC166
0.1U_0402_10V7K
@
12
PU150
RT8207MZQW_WQFN20_3X3
PU150
RT8207MZQW_WQFN20_3X3
VTTSNS 2
FB
6
S5
8
PGOOD
10
VDDP
12
PHASE 16
BOOT 18
VTTREF 4
PGND
14
VTTGND 1
GND 3
VDDQ 5
S3
7
TON
9
VDD
11
CS
13
LGATE
15
UGATE 17
VTT 20
VLDOIN 19
PAD 21
PR156
4.7_1206_5%
@PR156
4.7_1206_5%
@
12
PC162
1U_0603_10V6K
PC162
1U_0603_10V6K
1 2
PR164
0_0402_5%
PR164
0_0402_5%
12
PR163
0_0402_5%
PR163
0_0402_5%
1 2
PR161
887K_0402_1%
PR161
887K_0402_1%
1 2
PC152
2200P_0402_50V7K
PC152
2200P_0402_50V7K
12
100P_0402_25V8K
PC243@
100P_0402_25V8K
PC243@
12
+
PC157
330U_6.3V_M
15mohm
+
PC157
330U_6.3V_M
15mohm
1
2
PC156
680P_0603_50V7K
@PC156
680P_0603_50V7K
@
12
PC155
0.1U_0603_25V7K
PC155
0.1U_0603_25V7K
1 2
PR155
0_0603_5%
PR155
0_0603_5%
1 2
220P_0402_25V8K
PC241@
220P_0402_25V8K
PC241@
12
PR160
10.2K_0402_1%
PR160
10.2K_0402_1%
12
PC161
10U_0805_6.3V6K
@
PC161
10U_0805_6.3V6K
@
12
PC159
10U_0805_6.3V6K
PC159
10U_0805_6.3V6K
12
220P_0402_25V8K
PC244@
220P_0402_25V8K
PC244@
12
PC153
4.7U_0805_25V6-K
PC153
4.7U_0805_25V6-K
12
PQ152
FDMC7692S_MLP8-5
PQ152
FDMC7692S_MLP8-5
4
5
1
2
3
PC165
.1U_0402_16V7K
PC165
.1U_0402_16V7K
12
PC160
10U_0805_6.3V6K
PC160
10U_0805_6.3V6K
12
PQ151
SIS412DN-T1-GE3_POWERPAK8-5
PQ151
SIS412DN-T1-GE3_POWERPAK8-5
4
5
1
2
3
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.05VSP_B+
BST_+1.05VSP
UG_+1.05VSP1
VCCIO_SENSE1
LG_+1.05VSP
BST1_+1.05VSP
TRIP_+1.05VSP
EN_+1.05VSP
FB_+1.05VSP
RF_+1.05VSP
SNUB_+1.05VSP
SW_+1.05VSP
+1.05VSP1 +1.05VS_VCCPP
UG_+1.05VSP
LX_AVDD
SUSP#<42,44,47,54,58>
VCCIO_SENSE <8>
VCCP_PWRGOOD<47,54>
LNB_EN<44>
LNB_OC#<44>
B+
+5VALW
+1.05VS_VCCPP
+5VALW
+5VALW
+16VSP
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
Compal Electronics, Inc.
BCustom
53 61
Thursday, February 16, 2012
2011/12/14 2012/12/31
SCHEMATICS, MB A8391
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
Compal Electronics, Inc.
BCustom
53 61
Thursday, February 16, 2012
2011/12/14 2012/12/31
SCHEMATICS, MB A8391
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
Compal Electronics, Inc.
BCustom
53 61
Thursday, February 16, 2012
2011/12/14 2012/12/31
SCHEMATICS, MB A8391
4019HG
DIS
Ipeak=20.53A
Imax=14.37A
F=300KHz
Total Capacitor 1320uF,
ESR 2.5mohm
PQ402
TPCA8059-H_PPAK56-8-5
PQ402
TPCA8059-H_PPAK56-8-5
4
5
1
2
3
100P_0402_25V8K
PC266@
100P_0402_25V8K
PC266@
12
PC411
2200P_0402_25V7K
PC411
2200P_0402_25V7K
12
PC406
680P_0603_50V7K
@PC406
680P_0603_50V7K
@
12
PR407
301K_0402_1%
3D@ PR407
301K_0402_1%
3D@
1 2
PC1039
0.1U_0402_10V7K
@PC1039
0.1U_0402_10V7K
@
12
PR409
1.2K_0402_1%
@PR409
1.2K_0402_1%
@
1 2
68P_0402_50V8J
PC247@
68P_0402_50V8J
PC247@
12
PL402
0.36UH_VMPI1004AR-R36M-Z03_30A_20%
PL402
0.36UH_VMPI1004AR-R36M-Z03_30A_20%
1 2
PC405
0.1U_0603_25V7K
PC405
0.1U_0603_25V7K
1 2
PU160
APW7237BI-TRG_SOT23-5
TV@ PU160
APW7237BI-TRG_SOT23-5
TV@
GND 2
EN
4
LX 1
FB 3
VIN
5
PR408
470K_0402_1%
PR408
470K_0402_1%
12
PC1035
2.2U_0603_16V6K
TV@ PC1035
2.2U_0603_16V6K
TV@
12
PC1040
0.1U_0402_10V7K
@PC1040
0.1U_0402_10V7K
@
12
PU400
TPS51212
PU400
TPS51212
EN
3
TRIP
2
V5IN 7
DRVH 9
SW 8
DRVL 6
VBST 10
TST
5
VFB
4
PGOOD
1
TP 11
PC1037
10U_0805_25V6K
TV@ PC1037
10U_0805_25V6K
TV@
12
220P_0402_25V8K
PC246@
220P_0402_25V8K
PC246@
12
PC407
1U_0603_10V6K
PC407
1U_0603_10V6K
12
100P_0402_25V8K
PC267@
100P_0402_25V8K
PC267@
12
PR411
4.99K_0402_1%
PR411
4.99K_0402_1%
12
PU161
APL3511CBI-TRG_SOT23-5
TV@PU161
APL3511CBI-TRG_SOT23-5
TV@
GND 2
VOUT 1
OCB 3
EN#
4
VIN
5
PQ401
MDV1525URH
PQ401
MDV1525URH
4
5
1
2
3
100P_0402_25V8K
PC248@
100P_0402_25V8K
PC248@
12
PR404
100K_0402_1%
PR404
100K_0402_1%
1 2
PC408
0.1U_0402_16V7K
3D@ PC408
0.1U_0402_16V7K
3D@
12
PC402
10U_0805_25V6K
PC402
10U_0805_25V6K
12
68P_0402_50V8J
PC250@
68P_0402_50V8J
PC250@
12
PR407
0_0402_5%
OPTIMUS@
PR407
0_0402_5%
OPTIMUS@
PC409
1000P_0402_50V7K
@PC409
1000P_0402_50V7K
@
1 2
PR405
0_0603_5%
PR405
0_0603_5%
1 2
PL161
10UH_MLPS-5020-100M-E_1.5A_20%
TV@ PL161
10UH_MLPS-5020-100M-E_1.5A_20%
TV@
1 2
PR810
47K_0402_1%
TV@ PR810
47K_0402_1%
TV@
1 2
PR406
4.7_1206_5%
@PR406
4.7_1206_5%
@
12
PR403
0_0402_5%
PR403
0_0402_5%
1 2
PD203
BAT43WS-7-F_SOD323-2
TV@PD203
BAT43WS-7-F_SOD323-2
TV@
2 1
PL162
MCK1608471YZF_0603
TV@PL162
MCK1608471YZF_0603
TV@
1 2
220P_0402_25V8K
PC249@
220P_0402_25V8K
PC249@
12
PC403
10U_0805_25V6K
PC403
10U_0805_25V6K
12
+
PC401
330U_2.5V_M
+
PC401
330U_2.5V_M
1
2
PR401
3.4K_0402_1%
PR401
3.4K_0402_1%
12
PR410
10.2K_0402_1%
PR410
10.2K_0402_1%
1 2
PC410
.1U_0402_16V7K
PC410
.1U_0402_16V7K
12
PR806
51.1K_0402_1%
TV@ PR806
51.1K_0402_1%
TV@
12
PR402
6.49K_0402_1%
PR402
6.49K_0402_1%
12
PC964
22U_0805_6.3V6M
TV@ PC964
22U_0805_6.3V6M
TV@
1
2
PR413
100_0402_1%
PR413
100_0402_1%
12
PC1036
10U_0805_25V6K
TV@ PC1036
10U_0805_25V6K
TV@
12
PR805
604K_0603_1%
TV@ PR805
604K_0603_1%
TV@
12
PL401
FBMA-L11-201209-121LMA50T_0805
PL401
FBMA-L11-201209-121LMA50T_0805
12
PC963
22U_0805_6.3V6M
TV@ PC963
22U_0805_6.3V6M
TV@
1
2
PC404
4.7U_0805_25V6-K
@PC404
4.7U_0805_25V6-K
@
12
PR808
100K_0402_1%
@PR808
100K_0402_1%
@
1 2
PR807
47K_0402_1%
TV@PR807
47K_0402_1%
TV@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VCCSA_PWR_SRC +VCCSA_PHASE
+VCCSA_EN
+VCCSAP_FB
SNUB_+VCCSA
LX_1.8V
EN_1.8V
FB_1.8V
VCCP_PWRGOOD<47,53>
+VCCSA_SENSE <9>
H_VCCSA_VID1 <9>
H_VCCSA_VID0 <9>
SA_PGOOD <44>
SUSP#<42,44,47,53,58>
+5VALW +VCCSA
+3VS
+1.8VSP
+5VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
Compal Electronics, Inc.
BC
54 61
Thursday, February 16, 2012
2011/12/14 2012/12/31
SCHEMATICS, MB A8391
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
Compal Electronics, Inc.
BC
54 61
Thursday, February 16, 2012
2011/12/14 2012/12/31
SCHEMATICS, MB A8391
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
Compal Electronics, Inc.
BC
54 61
Thursday, February 16, 2012
2011/12/14 2012/12/31
SCHEMATICS, MB A8391
output voltage adjustable network
VID [0] VID[1] VCCSA Vout
0 0 0.9V
0 1 0.8V
1 0 0.725V
1 1 0.675V
+VCC_SAP
TDC 4.2A
Peak Current 6A
OCP current 8A
The 1k PD on the VCCSA VIDs are empty.
These should be stuffed to ensure that
VCCSA VID is 00 prior to VCCIO stability.
FB=0.6Volt
Ipeak=1.308A
ILIM = 4A
F=1MHz
4019HG
PR184
10K_0402_1%
PR184
10K_0402_1%
12
PL182
1UH_NRS4018T1R0NDGJ_3.2A_30%
PL182
1UH_NRS4018T1R0NDGJ_3.2A_30%
1 2
PC184
22U_0805_6.3VAM
PC184
22U_0805_6.3VAM
12
PR186
4.7_1206_5%
PR186
4.7_1206_5%
12
PC187
68P_0402_50V8J
PC187
68P_0402_50V8J
12
PU180
SY8033BDBC_DFN10_3X3
PU180
SY8033BDBC_DFN10_3X3
EN
5
PG 4
LX 3
FB 6
SVIN
8
TP
11
LX 2
PVIN
10
NC
7
PVIN
9
NC
1
PC460
0.1U_0603_25V7K
PC460
0.1U_0603_25V7K
12
PR183
20K_0402_1%
PR183
20K_0402_1%
12
PL451
HCB1608KF-121T30_0603
PL451
HCB1608KF-121T30_0603
1 2
PR455
100_0402_5%
PR455
100_0402_5%
12
PC456
680P_0603_50V7K
PC456
680P_0603_50V7K
12
PR460
1K_0402_5%
PR460
1K_0402_5%
1 2
PC183
22U_0805_6.3VAM
PC183
22U_0805_6.3VAM
12
PC458
22U_0805_6.3VAM
PC458
22U_0805_6.3VAM
12
PC182
22U_0805_6.3VAM
PC182
22U_0805_6.3VAM
12
PC452
22U_0805_6.3V6M
PC452
22U_0805_6.3V6M
1 2
PC459
22U_0805_6.3VAM
PC459
22U_0805_6.3VAM
12
PR461
1K_0402_5%
PR461
1K_0402_5%
1 2
PR456
4.7_1206_5%
PR456
4.7_1206_5%
1 2
PC185
0.1U_0402_10V7K
PC185
0.1U_0402_10V7K
12
PL452
0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
PL452
0.47UH_FDVE0630-H-R47M=P3_17.7A_20%
1 2
PC453
22U_0805_6.3V6M
PC453
22U_0805_6.3V6M
1 2
PU450
SY8037BDCC
PU450
SY8037BDCC
LX 3
LX 2
FB
9
PVIN
11
SVIN
10
VOUT
8
PVIN
12
EN 5
PG 4
LX 1
VID1
7
GND
13
VID0 6
PR458
0_0402_5%
PR458
0_0402_5%
1 2
PC455
0.1U_0402_10V7K
@PC455
0.1U_0402_10V7K
@
12
PC186
680P_0603_50V7K
PC186
680P_0603_50V7K
12
PL181
HCB1608KF-121T30_0603
PL181
HCB1608KF-121T30_0603
1 2
PR182
499K_0402_1%
@PR182
499K_0402_1%
@
12
PC457
68P_0402_50V8J
PC457
68P_0402_50V8J
12
PC454
22U_0805_6.3V6M
PC454
22U_0805_6.3V6M
1 2
PC451
22U_0805_6.3V6M
PC451
22U_0805_6.3V6M
1 2
PC461
2200P_0402_50V7K
PC461
2200P_0402_50V7K
1
2
PR181
150K_0402_1%
PR181
150K_0402_1%
1 2
PR459
100K_0402_5%
PR459
100K_0402_5%
12
PR457
0_0402_5%
PR457
0_0402_5%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
TRBSTA#
COMP_CPU1
VSP
BST3_1
FBA3
SWN3
VR_HOT#
SWN2A
SWN2
BST1
CSSUM
BST2_1
VR_SVID_DAT1
SWN1
IMONIMON
CSP2A
VR_SVID_DAT1
VSN
VRMP
IMONAIMONA
FBA
FB_CPU1
DIFF_CPU
DROOPA
TRBST#
CSSUMA
CSP1A
ROSC_CPU
NTC_PH203
BST2
CSP3
CSP3
CSP1
CSCOMPA
COMP_CPU
VGATE
TSENSETSENSE CSP2A
ILIMA
BST3
DIFFA
ILIM_CPU
TSENSEA
VR_SVID_ALRT#
VR_SVID_CLK
FBA2
SWN1A
VR_ON_CPU
6132P_VCCP
CSP2
TSENSEA
VBOOT
FB_CPU
CSREFCSCOMP
COMPA
FBA1
COMPA1
BST1_1
6132_VCC
TRBSTA#
DROOP
CSCOMPCSCOMPCSCOMPCSCOMPCSCOMPCSCOMP
DROOP
FB_CPU2
FB_CPU3
CSREFACSCOMPA DROOPA
TRBST#
CSP1A
TSENSE
CSREFA
CSP1A
CSP2A
CSREFA
CSP3
CSREF
CSP2
CSREF
CSP1
CSREF
LG1 <56>
HG1 <56>
VCCSENSE<8>
VSSSENSE<8>
VSS_AXG_SENSE<9>
VCC_AXG_SENSE<9>
HG1A <56>
LG1A <56>
VR_SVID_DAT<8> VR_SVID_ALRT#<8>
6132_PWMA <56>
VR_SVID_CLK<8>
SWN1A <56>
SWN2 <56>
SWN2A <56>
SW2 <56>
SW1 <56>
HG2 <56>
LG2 <56>
VR_HOT#<44>
SWN3 <56>
SWN1 <56>
6132_PWM <56>
CSREFA <56>
VR_ON<44>
VGATE<5,27,44>
SW1A <56>
DRVEN <56>
CSREF <56>
+5VS +5VS
+5VS
+1.05VS_VCCPP
+3VS
CPU_B+
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
Custom
55 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
Custom
55 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
Custom
55 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
3P: 73.2K
2P: 41.2K
3P: 2200p
2P: 3300p
3P: 21K
2P: 12.4K
3P: install
2P: @
2P: 21.5K
1P: 15.8K
3P: 1500p
2P: 1200p
2P: 1.65K
1P: 1K
Option for
1 phase GFX
3P: 6.04K
2P: 4.32K
3P: install
2P: @
2P: install
1P: @
2P: install
1P: @
3P: 348
2P: 1.21K
3P: 806
2P: 1K
3P: 3.65K
2P: 9.53K
3P: 22p
2P: 10p
2P: 24K
1P: 24.9K
Option for
2 phase CPU
3P: 23.7K
2P: 24.9K
2P: 36K
1P: 26.1K
3P: 330p
2P: 1000p
4019HG
DISABLE GFX function
DC/QC GFX SWITCH
DC/QC CPU SWITCH
PC574
0.033U_0402_16V7K
PC574
0.033U_0402_16V7K
1 2
PC558
1000P_0402_50V7K
GFX@ PC558
1000P_0402_50V7K
GFX@
1 2
PC573
3300P_0402_50V7K
DC@ PC573
3300P_0402_50V7K
DC@
12
PH503
100K_0402_1%_TSM0B104F4251RZ
PH503
100K_0402_1%_TSM0B104F4251RZ
1 2
PR585
4.32K_0402_1%
DC@ PR585
4.32K_0402_1%
DC@
12
PR562
6.98K_0402_1%
QCG@PR562
6.98K_0402_1%
QCG@
1 2
PC551
0.033U_0402_16V7K
GFX@ PC551
0.033U_0402_16V7K
GFX@
12
PR572
1K_0402_1%
PR572
1K_0402_1%
1 2
PC579
.1U_0402_16V7K
PC579
.1U_0402_16V7K
1 2
PC567
1000P_0402_50V7K
PC567
1000P_0402_50V7K
12
PR571
0_0402_5%
3D@
PR571
0_0402_5%
3D@
PR582
1K_0402_1%
PR582
1K_0402_1%
1 2
PR576
73.2K_0402_1%
QC@
PR576
73.2K_0402_1%
QC@
PR550
806_0402_1%
GFX@ PR550
806_0402_1%
GFX@
1 2
PC584
180P_0402_50V7K
GFX@ PC584
180P_0402_50V7K
GFX@
1 2
PR566
54.9_0402_1%
PR566
54.9_0402_1%
1 2
PC554
0_0402_5%
3D@
PC554
0_0402_5%
3D@
PR559 6.98K_0402_1%GFX@ PR559 6.98K_0402_1%GFX@
1 2
PC549
1200P_0402_50V7K
GFX@ PC549
1200P_0402_50V7K
GFX@
1 2
PR602
0_0402_5%
3D@ PR602
0_0402_5%
3D@
12
PR563
2_0603_5%
PR563
2_0603_5%
1 2
PC572
330P_0402_50V7K
QC@
PC572
330P_0402_50V7K
QC@
PC576
0.047U_0402_16V7K
PC576
0.047U_0402_16V7K
12
PR554
10_0402_1%
GFX@ PR554
10_0402_1%
GFX@
1 2
PC556
0.047U_0402_16V7K
GFX@ PC556
0.047U_0402_16V7K
GFX@
1 2
PR573
0_0402_5%
PR573
0_0402_5%
1 2
PR579
6.98K_0402_1%
QC@ PR579
6.98K_0402_1%
QC@
1 2
PR557
63.4K_0603_1%
QCG@PR557
63.4K_0603_1%
QCG@
1 2
PC570
10P_0402_50V8J
DC@ PC570
10P_0402_50V8J
DC@
12
PR564
39K_0402_1%
QCG@
PR564
39K_0402_1%
QCG@
PC505
0.22U_0402_10V6K
PC505
0.22U_0402_10V6K
1 2
PR505
2.2_0603_5%
PR505
2.2_0603_5%
1 2
PR580
0_0402_5%
PR580
0_0402_5%
1 2
PR595
165K_0402_1%
PR595
165K_0402_1%
1 2
PR555
1K_0402_1%
GFX@ PR555
1K_0402_1%
GFX@
1 2
PC560
0_0402_5%
3D@
PC560
0_0402_5%
3D@
PR547
10_0402_1%
GFX@ PR547
10_0402_1%
GFX@
1 2
PR568 0_0402_5%PR568 0_0402_5%
1 2
PH502
100K_0402_1%_TSM0B104F4251RZ
GFX@ PH502
100K_0402_1%_TSM0B104F4251RZ
GFX@
1 2
PR581
21K_0402_1%
QC@
PR581
21K_0402_1%
QC@
PC550
330P_0402_50V7K
GFX@ PC550
330P_0402_50V7K
GFX@
1 2
PC552
1000P_0402_50V7K
GFX@ PC552
1000P_0402_50V7K
GFX@
1 2
PR558
63.4K_0603_1%
GFX@ PR558
63.4K_0603_1%
GFX@
1 2
PC562
.1U_0402_16V7K
PC562
.1U_0402_16V7K
12
PC566
47P_0402_50V8J
PC566
47P_0402_50V8J
1 2
PC525
0.22U_0402_10V6K
GFX@ PC525
0.22U_0402_10V6K
GFX@
1 2
PC575
1000P_0402_50V7K
PC575
1000P_0402_50V7K
1 2
PR567
0_0402_5%
PR567
0_0402_5%
1 2
PR587
6.98K_0402_1%
PR587
6.98K_0402_1%
1 2
PC548
.1U_0402_16V7K
GFX@ PC548
.1U_0402_16V7K
GFX@
1 2
PR603
0_0402_5%
@PR603
0_0402_5%
@
1 2
PC557
1000P_0402_50V7K
GFX@ PC557
1000P_0402_50V7K
GFX@
1 2
PC555
3300P_0402_25V7K
GFX@ PC555
3300P_0402_25V7K
GFX@
1 2
PR592
23.7K_0402_1%
QC@
PR592
23.7K_0402_1%
QC@
PR606
0_0402_5%
@PR606
0_0402_5%
@
1 2
PR578
0_0402_5%
PR578
0_0402_5%
1 2
PR575
10K_0402_5%
PR575
10K_0402_5%
12
PC580
330P_0402_50V7K
PC580
330P_0402_50V7K
1 2
PC564
2.2U_0603_10V7K
PC564
2.2U_0603_10V7K
1 2
PR525
2.2_0603_5%
GFX@ PR525
2.2_0603_5%
GFX@
1 2
PR596
130K_0603_1%
QC@ PR596
130K_0603_1%
QC@
1 2
PR549
0_0402_5%
3D@
PR549
0_0402_5%
3D@
PR590
806_0402_1%
QC@
PR590
806_0402_1%
QC@
PR556
5.11K_0402_1%
GFX@ PR556
5.11K_0402_1%
GFX@
1 2
PR549
24.9K_0402_1%
DCG@PR549
24.9K_0402_1%
DCG@
1 2
PR597
1K_0402_1%
DC@ PR597
1K_0402_1%
DC@
1 2
PC573
2200P_0402_50V7K
QC@
PC573
2200P_0402_50V7K
QC@
PR593
130K_0603_1%
PR593
130K_0603_1%
1 2
PC547
0.033U_0402_16V7K
GFX@ PC547
0.033U_0402_16V7K
GFX@
1 2
PR560
16.5K_0402_1%
DCG@ PR560
16.5K_0402_1%
DCG@
1 2
PR594
75K_0402_1%
PR594
75K_0402_1%
1 2
PC571
0.047U_0402_16V7K
PC571
0.047U_0402_16V7K
12
PR552
1K_0402_1%
DCG@PR552
1K_0402_1%
DCG@
1 2
PR552
0_0402_5%
3D@
PR552
0_0402_5%
3D@
PR548
8.06K_0402_1%
GFX@ PR548
8.06K_0402_1%
GFX@
1 2
PR584
49.9_0402_1%
PR584
49.9_0402_1%
1 2
PR577
0_0402_5%
DC@ PR577
0_0402_5%
DC@
12
PR589
8.06K_0402_1%
DC@ PR589
8.06K_0402_1%
DC@
1 2
PC561
2.2U_0603_10V7K
PC561
2.2U_0603_10V7K
1 2
PR604
0_0402_5%
@PR604
0_0402_5%
@
1 2
PR574
0_0402_5%
PR574
0_0402_5%
1 2
PR551
75K_0402_1%
GFX@ PR551
75K_0402_1%
GFX@
1 2
PC570
22P_0402_50V8J
QC@
PC570
22P_0402_50V8J
QC@
PR553
165K_0402_1%
GFX@ PR553
165K_0402_1%
GFX@
12
PR515
2.2_0603_5%
PR515
2.2_0603_5%
1 2
PC559
0.047U_0402_16V7K
QCG@PC559
0.047U_0402_16V7K
QCG@
1 2
PC553
330P_0402_50V7K
GFX@ PC553
330P_0402_50V7K
GFX@
1 2
PC554
10P_0402_50V8J
GFX@ PC554
10P_0402_50V8J
GFX@
1 2
PC569
0.047U_0402_16V7K
QC@ PC569
0.047U_0402_16V7K
QC@
12
PR583
6.98K_0402_1%
PR583
6.98K_0402_1%
1 2
PR565
130_0402_1%
PR565
130_0402_1%
1 2
PR591
130K_0603_1%
PR591
130K_0603_1%
1 2
PR601
0_0402_5%
3D@ PR601
0_0402_5%
3D@
12
PR569
10K_0402_1%
PR569
10K_0402_1%
1 2
PR607
0_0402_5%
@PR607
0_0402_5%
@
1 2
PC581
1000P_0402_50V7K
PC581
1000P_0402_50V7K
1 2
PR588
137K_0402_1%
PR588
137K_0402_1%
12
PC578
1200P_0402_50V7K
DC@ PC578
1200P_0402_50V7K
DC@
1 2
PR597
806_0402_1%
QC@
PR597
806_0402_1%
QC@
PC578
1500P_0402_50V7K
QC@
PC578
1500P_0402_50V7K
QC@
PR576
41.2K_0402_1%
DC@ PR576
41.2K_0402_1%
DC@
1 2
PR581 12.4K_0402_1%DC@ PR581 12.4K_0402_1%DC@
1 2
PC560
.1U_0402_16V7K
GFX@ PC560
.1U_0402_16V7K
GFX@
1 2
PH504 220K_0402_5%_ERTJ0EV224JPH504 220K_0402_5%_ERTJ0EV224J
12
PR571
0_0402_5%
DCG@ PR571
0_0402_5%
DCG@
12
PR586
10_0402_1%
PR586
10_0402_1%
1 2
PC577
0.033U_0402_16V7K
PC577
0.033U_0402_16V7K
12
PC549
0_0402_5%
3D@
PC549
0_0402_5%
3D@
PR605
0_0402_5%
@PR605
0_0402_5%
@
1 2
PR560
24K_0402_1%
QCG@
PR560
24K_0402_1%
QCG@
PC563
.1U_0402_16V7K
PC563
.1U_0402_16V7K
12
PC572
1000P_0402_50V7K
DC@ PC572
1000P_0402_50V7K
DC@
1 2
PR589
8.06K_0402_1%
QC@
PR589
8.06K_0402_1%
QC@
PR570
95.3K_0402_1%
PR570
95.3K_0402_1%
1 2
PC565
0.01U_0402_25V7K
PC565
0.01U_0402_25V7K
12
PC568
.1U_0402_16V7K
PC568
.1U_0402_16V7K
1 2
PR564
26.1K_0402_1%
DCG@PR564
26.1K_0402_1%
DCG@
1 2
NCP6132AMNR2G QFN 60P
PU500
NCP6132AMNR2G QFN 60P
PU500
TSNSA 46
IOUTA 54
EN
4
VRHOT#
11
SDIO
5
ALERT#
6
ROSC
9
SCLK
7
VRDYA
3
CSCOMP
22
CSP3
25 CSREF
24 CSSUM
23
LGA 41
TRBSTA# 57
PVCC 36
BST2 40
HG2 39
SW2 38
LG2 37
PGND 35
COMP
18
VSP
14
DROOP
21
FB
17
DIFF
15
CSP1
27
SWA 42
HGA 43
VSPA 59
DIFFA 58
DROOPA 52
FBA 56
COMPA 55
CSREFA 49
CSSUMA 50
CSP2A 48
VRMP
10
VRDY
12
DRVEN
29
VSN
13 LG1 34
SW1 33
VSNA 60
ILIMA 53
VCC
1
IOUT
19
HG1 32
CSP2
26 CSCOMPA 51
TSNS
28
ILIM
20
TRBST#
16
PWM
30
BST1 31
BSTA 44
CSP1A 47
PWMA 45
VDDBP
2
VBOOT
8
PAD 61
PR590
806_0402_1%
DC@ PR590
806_0402_1%
DC@
1 2
PR585
6.04K_0402_1%
QC@
PR585
6.04K_0402_1%
QC@
PC515
0.22U_0402_10V6K
PC515
0.22U_0402_10V6K
1 2
PR552
1.65K_0402_1%
QCG@
PR552
1.65K_0402_1%
QCG@
PR561
137K_0402_1%
GFX@ PR561
137K_0402_1%
GFX@
12
PH501
220K_0402_5%_ERTJ0EV224J
GFX@ PH501
220K_0402_5%_ERTJ0EV224J
GFX@
12
PR592
24.9K_0402_1%
DC@ PR592
24.9K_0402_1%
DC@
1 2
PR600
0_0402_5%
3D@ PR600
0_0402_5%
3D@
12
PR549
24K_0402_1%
QCG@
PR549
24K_0402_1%
QCG@
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BSTA2_1
EN_GFX2
VCC_GFX2
CSREF
V1N_CPU
DRVEN
V2N_GFX
V2N_CPU
BSTA2
SNUB_GFX2
SW2A
SNUB_CPU2
LG2A
SNUB_CPU1
V1N_GFX
CSREFA
SNUB_GFX1
V3N_CPU CSREF
SNUB_CPU3
SW3
BSTA1 BSTA1_1
EN_VCORE3
VCC_VCORE3
HG3
LG3
HG2A
SWN2A <55>
HG1<55>
SWN2 <55>
SW1<55>
LG1<55>
HG2<55>
SW2<55>
LG2<55>
6132_PWMA<55>
CSREF <55>
SWN1 <55>
SWN1A <55>
SWN3 <55>
CSREFA<55>
HG1A<55>
LG1A<55>
SW1A<55>
6132_PWM<55>
DRVEN<55>
+CPU_CORE
+CPU_CORE
+5VS
CPU_B+ CPU_B+
CPU_B+
B+
+GFX_CORE
CPU_B+
CPU_B+
+CPU_CORE
+GFX_CORE
+5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
C
56 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
C
56 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
C
56 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
DC 35W GT2
VID1=1.23V
IccMax=33A
Icc_Dyn=20.2A
Icc_TDC=21.5A
R_LL=3.9m ohm
OCP~40A
2Phase: install
1Phase:: @
QC 45W GT2
VID1=1.23V
IccMax=46A
Icc_Dyn=37A
Icc_TDC=38A
R_LL=3.9m ohm
OCP~55A
DC 35W CPU
VID1=1.05V
IccMax=53A
Icc_Dyn=43A
Icc_TDC=33A
R_LL=1.9m ohm
OCP~65A
QC 45W CPU
VID1=0.9V
IccMax=94A
Icc_Dyn=66A
Icc_TDC=56A
R_LL=1.9m ohm
OCP~110A
4019HG
100P_0402_25V8K
PC258@
100P_0402_25V8K
PC258@
12
PR544
2.2_0603_1%
QCG@PR544
2.2_0603_1%
QCG@
12
68P_0402_50V8J
PC259@
68P_0402_50V8J
PC259@
12
PQ502
TPCA8059-H_PPAK56-8-5
PQ502
TPCA8059-H_PPAK56-8-5
4
5
1
2
3
PR527
0_0402_5%
QC@ PR527
0_0402_5%
QC@
12
PR526
4.7_1206_5%
PR526
4.7_1206_5%
12
PC522
10U_0805_25V6K
QCG@ PC522
10U_0805_25V6K
QCG@
12
PC502
10U_0805_25V6K
PC502
10U_0805_25V6K
12
PL502
0.36UH_VMPI1004AR-R36M-Z03_30A_20%
SH00000HD00
PL502
0.36UH_VMPI1004AR-R36M-Z03_30A_20%
SH00000HD00
1
3
4
2
PQ513
MDV1525URH
GFX@ PQ513
MDV1525URH
GFX@
4
5
1
2
3
PC516
680P_0402_50V7K
PC516
680P_0402_50V7K
12
PQ507
MDV1525URH
PQ507
MDV1525URH
4
5
1
2
3
PR534
2.2_0603_1%
QC@ PR534
2.2_0603_1%
QC@
12
PC510
10U_0805_25V6K
QC@ PC510
10U_0805_25V6K
QC@
12
PL503
0.36UH_VMPI1004AR-R36M-Z03_30A_20%
SH00000HD00
PL503
0.36UH_VMPI1004AR-R36M-Z03_30A_20%
SH00000HD00
1
3
4
2
PR516
4.7_1206_5%
PR516
4.7_1206_5%
12
PR545
2.2_0603_5%
QCG@PR545
2.2_0603_5%
QCG@
1 2
PR599
10_0402_1%
PR599
10_0402_1%
12
PR506
4.7_1206_5%
PR506
4.7_1206_5%
12
PC501
10U_0805_25V6K
PC501
10U_0805_25V6K
12
PR504
2.2_0603_1%
PR504
2.2_0603_1%
12
PR518
0_0402_5%
QC@ PR518
0_0402_5%
QC@
12
PR598
10_0402_1%
PR598
10_0402_1%
12
PR517
2K_0402_1%
QC@ PR517
2K_0402_1%
QC@
12
PR521
0_0402_5%
QCG@PR521
0_0402_5%
QCG@
12
PQ509
MDV1525URH
QC@ PQ509
MDV1525URH
QC@
4
5
1
2
3
PC582
2.2U_0603_10V7K
QC@ PC582
2.2U_0603_10V7K
QC@
12
PC546
680P_0402_50V7K
PC546
680P_0402_50V7K
12
PR520 2K_0402_1%QCG@ PR520 2K_0402_1%QCG@
12
PR535
2.2_0603_5%
QC@ PR535
2.2_0603_5%
QC@
1 2
PC583
2.2U_0603_10V7K
QCG@ PC583
2.2U_0603_10V7K
QCG@
12
PL501
HCB4532KF-800T90_1812
PL501
HCB4532KF-800T90_1812
12
PC519
10U_0805_25V6K
GFX@ PC519
10U_0805_25V6K
GFX@
12
PC545
0.22U_0402_10V6K
QCG@ PC545
0.22U_0402_10V6K
QCG@
12
PC535
0.22U_0402_10V6K
QC@ PC535
0.22U_0402_10V6K
QC@
12
220P_0402_25V8K
PC257@
220P_0402_25V8K
PC257@
12
220P_0402_25V8K
PC260@
220P_0402_25V8K
PC260@
12
PC506
680P_0402_50V7K
PC506
680P_0402_50V7K
12
PQ517
MDV1525URH
@PQ517
MDV1525URH
@
4
5
1
2
3
PQ508
TPCA8059-H_PPAK56-8-5
GFX@ PQ508
TPCA8059-H_PPAK56-8-5
GFX@
4
5
1
2
3
PR514
2.2_0603_1%
PR514
2.2_0603_1%
12
+
PC517
100U_25V_M
+
PC517
100U_25V_M
1
2
68P_0402_50V8J
PC254@
68P_0402_50V8J
PC254@
12
PQ505
MDV1525URH
@PQ505
MDV1525URH
@
4
5
1
2
3
PR524
2.2_0603_1%
GFX@ PR524
2.2_0603_1%
GFX@
12
PC521
10U_0805_25V6K
QCG@ PC521
10U_0805_25V6K
QCG@
12
PQ519
MDV1525URH
QCG@ PQ519
MDV1525URH
QCG@
4
5
1
2
3
PR536
4.7_1206_5%
PR536
4.7_1206_5%
12
PC508
10U_0805_25V6K
PC508
10U_0805_25V6K
12
PQ506
TPCA8059-H_PPAK56-8-5
QC@ PQ506
TPCA8059-H_PPAK56-8-5
QC@
4
5
1
2
3
PC511
10U_0805_25V6K
QC@ PC511
10U_0805_25V6K
QC@
12
100P_0402_25V8K
PC253@
100P_0402_25V8K
PC253@
12
PR523
10_0402_1%
QCG@PR523
10_0402_1%
QCG@
12
PC507
10U_0805_25V6K
PC507
10U_0805_25V6K
12
PC518
10U_0805_25V6K
GFX@ PC518
10U_0805_25V6K
GFX@
12
PQ501
MDV1525URH
@PQ501
MDV1525URH
@
4
5
1
2
3
68P_0402_50V8J
PC256@
68P_0402_50V8J
PC256@
12
220P_0402_25V8K
PC251@
220P_0402_25V8K
PC251@
12
PQ511
MDV1525URH
@PQ511
MDV1525URH
@
4
5
1
2
3
220P_0402_25V8K
PC255@
220P_0402_25V8K
PC255@
12
PR519
10_0402_1%
QC@ PR519
10_0402_1%
QC@
12
PC526
680P_0402_50V7K
PC526
680P_0402_50V7K
12
PQ503
MDV1525URH
PQ503
MDV1525URH
4
5
1
2
3
PC536
680P_0402_50V7K
PC536
680P_0402_50V7K
12
PQ515
MDV1525URH
@PQ515
MDV1525URH
@
4
5
1
2
3
PR522
10_0402_1%
GFX@ PR522
10_0402_1%
GFX@
12
+
PC513
100U_25V_M
+
PC513
100U_25V_M
1
2
PR528
0_0402_5%
QCG@PR528
0_0402_5%
QCG@
12
PR546
4.7_1206_5%
PR546
4.7_1206_5%
12
PQ510
TPCA8059-H_PPAK56-8-5
QCG@ PQ510
TPCA8059-H_PPAK56-8-5
QCG@
4
5
1
2
3
PL504
0.36UH_VMPI1004AR-R36M-Z03_30A_20%
SH00000HD00
QC@ PL504
0.36UH_VMPI1004AR-R36M-Z03_30A_20%
SH00000HD00
QC@
1
3
4
2
PL506
0.36UH_VMPI1004AR-R36M-Z03_30A_20%
SH00000HD00
QCG@PL506
0.36UH_VMPI1004AR-R36M-Z03_30A_20%
SH00000HD00
QCG@
1
3
4
2
PL505
0.36UH_VMPI1004AR-R36M-Z03_30A_20%
SH00000HD00
GFX@ PL505
0.36UH_VMPI1004AR-R36M-Z03_30A_20%
SH00000HD00
GFX@
1
3
4
2
PU502
NCP5911MNTBG_DFN8_2X2
QCG@PU502
NCP5911MNTBG_DFN8_2X2
QCG@
DRVL 5
EN
3
VCC
4
PWM
2
BST
1
GND 6
SW 7
DRVH 8
FLAG 9
PQ504
TPCA8059-H_PPAK56-8-5
PQ504
TPCA8059-H_PPAK56-8-5
4
5
1
2
3
PU501
NCP5911MNTBG_DFN8_2X2
QC@ PU501
NCP5911MNTBG_DFN8_2X2
QC@
DRVL 5
EN
3
VCC
4
PWM
2
BST
1
GND 6
SW 7
DRVH 8
FLAG 9
+
PC520
68U_25V_M
+
PC520
68U_25V_M
1
2
68P_0402_50V8J
PC252@
68P_0402_50V8J
PC252@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+CPU_CORE
+CPU_CORE
+CPU_CORE
+1.05VS_VCCP
+GFX_CORE
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
57 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
57 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
4019HG
B
SCHEMATICS, MB A8391
57 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Socket Bottom
Socket Top
5 x 22 µF (0805)
5 x (0805) no-stuff
sites
7 x 22 µF (0805)
2 x (0805) no-stuff
sites
Below is 458544_CRV_PDDG_0.5 Table 5-8.
Chief River 330uF*9m 470uF*4.5m 22uF 10uF
8layer for DC CPU
8layer for QC CPU
6layer for DC CPU
6layer for QC CPU
GFX_CORE DC
GFX_CORE QC
1.05V_VCCP
4
5
5
4
2
3
2
1
16
16
16
16
12
12
12
10
10
10
10
PC926
22U_0805_6.3V6M
PC926
22U_0805_6.3V6M
1
2
PC947
22U_0805_6.3V6M
GFX@PC947
22U_0805_6.3V6M
GFX@
1
2
+
PC903
330U_D2_2V_Y
+
PC903
330U_D2_2V_Y
1
2
PC942
22U_0805_6.3V6M
GFX@PC942
22U_0805_6.3V6M
GFX@
1
2
+
PC933
330U_D2_2V_Y
GFX@
+
PC933
330U_D2_2V_Y
GFX@
1
2
PC920
22U_0805_6.3V6M
PC920
22U_0805_6.3V6M
1
2
PC915
10U_0805_6.3V6M
PC915
10U_0805_6.3V6M
12
PC940
22U_0805_6.3V6M
GFX@PC940
22U_0805_6.3V6M
GFX@
1
2
PC928
22U_0805_6.3V6M
PC928
22U_0805_6.3V6M
1
2
+
PC905
330U_D2_2V_Y
+
PC905
330U_D2_2V_Y
1
2
PC961
22U_0805_6.3V6M
PC961
22U_0805_6.3V6M
1
2
PC930
22U_0805_6.3V6M
PC930
22U_0805_6.3V6M
1
2
PC913
10U_0805_6.3V6M
PC913
10U_0805_6.3V6M
12
PC916
22U_0805_6.3V6M
PC916
22U_0805_6.3V6M
1
2
PC906
10U_0805_6.3V6M
PC906
10U_0805_6.3V6M
12
PC908
10U_0805_6.3V6M
PC908
10U_0805_6.3V6M
12
+
PC901
330U_D2_2V_Y
+
PC901
330U_D2_2V_Y
1
2
PC912
10U_0805_6.3V6M
PC912
10U_0805_6.3V6M
12
PC962
22U_0805_6.3V6M
PC962
22U_0805_6.3V6M
1
2
PC955
22U_0805_6.3V6M
PC955
22U_0805_6.3V6M
1
2
PC939
22U_0805_6.3V6M
GFX@PC939
22U_0805_6.3V6M
GFX@
1
2
PC941
22U_0805_6.3V6M
GFX@PC941
22U_0805_6.3V6M
GFX@
1
2
PC907
10U_0805_6.3V6M
PC907
10U_0805_6.3V6M
12
PC953
22U_0805_6.3V6M
PC953
22U_0805_6.3V6M
1
2
PC925
22U_0805_6.3V6M
PC925
22U_0805_6.3V6M
1
2
PC919
22U_0805_6.3V6M
PC919
22U_0805_6.3V6M
1
2
+
PC948
330U_D2_2V_Y
+
PC948
330U_D2_2V_Y
1
2
+
PC902
330U_D2_2V_Y
+
PC902
330U_D2_2V_Y
1
2
+
PC950
330U_D2_2V_Y
+
PC950
330U_D2_2V_Y
1
2
PC951
22U_0805_6.3V6M
PC951
22U_0805_6.3V6M
1
2
PC917
22U_0805_6.3V6M
PC917
22U_0805_6.3V6M
1
2
PC931
22U_0805_6.3V6M
PC931
22U_0805_6.3V6M
1
2
PC911
10U_0805_6.3V6M
PC911
10U_0805_6.3V6M
12
+
PC904
330U_D2_2V_Y
+
PC904
330U_D2_2V_Y
1
2
PC927
22U_0805_6.3V6M
PC927
22U_0805_6.3V6M
1
2
+
PC949
330U_D2_2V_Y
@
+
PC949
330U_D2_2V_Y
@
1
2
PC937
22U_0805_6.3V6M
GFX@PC937
22U_0805_6.3V6M
GFX@
1
2
+
PC935
330U_D2_2V_Y
@
+
PC935
330U_D2_2V_Y
@
1
2
PC957
22U_0805_6.3V6M
PC957
22U_0805_6.3V6M
1
2
+
PC934
330U_D2_2V_Y
GFX@
+
PC934
330U_D2_2V_Y
GFX@
1
2
PC946
22U_0805_6.3V6M
GFX@PC946
22U_0805_6.3V6M
GFX@
1
2
PC945
22U_0805_6.3V6M
GFX@PC945
22U_0805_6.3V6M
GFX@
1
2
PC914
10U_0805_6.3V6M
PC914
10U_0805_6.3V6M
12
PC910
10U_0805_6.3V6M
PC910
10U_0805_6.3V6M
12
PC952
22U_0805_6.3V6M
PC952
22U_0805_6.3V6M
1
2
PC954
22U_0805_6.3V6M
PC954
22U_0805_6.3V6M
1
2
PC958
22U_0805_6.3V6M
PC958
22U_0805_6.3V6M
1
2
PC918
22U_0805_6.3V6M
PC918
22U_0805_6.3V6M
1
2
PC960
22U_0805_6.3V6M
PC960
22U_0805_6.3V6M
1
2
PC959
22U_0805_6.3V6M
PC959
22U_0805_6.3V6M
1
2
+
PC932
330U_D2_2V_Y
GFX@
+
PC932
330U_D2_2V_Y
GFX@
1
2
PC944
22U_0805_6.3V6M
GFX@PC944
22U_0805_6.3V6M
GFX@
1
2
PC943
22U_0805_6.3V6M
GFX@PC943
22U_0805_6.3V6M
GFX@
1
2
PC929
22U_0805_6.3V6M
PC929
22U_0805_6.3V6M
1
2
PC938
22U_0805_6.3V6M
GFX@PC938
22U_0805_6.3V6M
GFX@
1
2
PC936
22U_0805_6.3V6M
GFX@PC936
22U_0805_6.3V6M
GFX@
1
2
PC956
22U_0805_6.3V6M
PC956
22U_0805_6.3V6M
1
2
PC909
10U_0805_6.3V6M
PC909
10U_0805_6.3V6M
12
PC922
22U_0805_6.3V6M
PC922
22U_0805_6.3V6M
1
2
PC921
22U_0805_6.3V6M
PC921
22U_0805_6.3V6M
1
2
PC923
22U_0805_6.3V6M
PC923
22U_0805_6.3V6M
1
2
PC924
22U_0805_6.3V6M
PC924
22U_0805_6.3V6M
1
2
A
A
B
B
C
C
D
D
E
E
F
F
G
G
H
H
1 1
2 2
3 3
4 4
VGA_VCC
VGA_COMP-1
VGA_CSCOMP
VGA_FB
VGA_RAMP
VGA_DRVH
VGA_RAMP-1
VGA_VCC
VGA_RT
VGA_CSFB
VGA_EN
VGA_BOOST
VGA_CSCOMP
VGA_DRVL
VGA_COMP
VGA_BOOST-1
VGA_ILIM
VGA_SW
VGA_IREF
VGA_RPM
VGA_CSCOMP
VGA_VID_0
VGA_VID_1
VGA_VID_2
VGA_VID_3
VGA_VID_4
VGA_VID_5
VGA_VCC_SENSE<15>
VGA_VSS_SENSE<15>
SUSP#
<42,44,47,53,54>
VGA_VID_5
<13>
VGA_VID_4
<13>
VGA_VID_0
<13>
VGA_VID_1
<13>
VGA_VID_2
<13>
VGA_VID_3
<13>
PWR_GPS_DOWN#<44>
DGPU_PWR_EN
<29,47>
VGA_PWROK<29,30,47>
PWRMOS_TEMP <44>
+5VS
+VGA_B+
+5VS
+VGA_CORE
B+
+VGA_B+
+3VL
+3VL
+3VS
+VGA_CORE +VGA_CORE
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
58 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
58 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
58 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Connect to input caps
Ipeak=59A
Imax=45.7A
F=300kHZ
Total capacitor
1460u
ESR=1.8m ohm
GPU Skin temperature protection:
Requlator temperature protection: Protection at 125 degree C
Recoveyr at 105 degree C
Recoveyr at 90 degree C
Protection at 90 degree C
Under VGA Core Near VGA Core
4019HG
PR726
20K_0402_1%
PR726
20K_0402_1%
1 2
PC704
1000P_0402_50V7K
PC704
1000P_0402_50V7K
12
PC702
470P_0402_50V8J
PC702
470P_0402_50V8J
1 2
PR731
237K_0402_1%
PR731
237K_0402_1%
1 2
PR7131K_0402_1% @PR7131K_0402_1% @
1 2
PC821
4.7U_0603_6.3V6M
PC821
4.7U_0603_6.3V6M
12
PH703
100K_0402_1%_NCP15WF104F03RC
@PH703
100K_0402_1%_NCP15WF104F03RC
@
1 2
PC807
22U_0805_6.3V6M
@PC807
22U_0805_6.3V6M
@
1
2
PC705
0.22U_0603_25V7K
PC705
0.22U_0603_25V7K
1 2
PC718
10U_0805_25V6K
PC718
10U_0805_25V6K
12
PR742
7.68K_0402_1%
PR742
7.68K_0402_1%
1 2
PR738
220K_0402_1%
PR738
220K_0402_1%
1 2
PC824
4.7U_0603_6.3V6M
PC824
4.7U_0603_6.3V6M
12
PC834
0.1U_0402_10V7K
@PC834
0.1U_0402_10V7K
@
12
PR722 0_0402_5%PR722 0_0402_5%
1 2
PR7151K_0402_1% @PR7151K_0402_1% @
1 2
PR728
0_0402_5%
PR728
0_0402_5%
12
PH702
100K_0402_1%_NCP15WF104F03RC
PH702
100K_0402_1%_NCP15WF104F03RC
1 2
PR7141K_0402_1% PR7141K_0402_1%
1 2
PC706
680P_0603_50V8J
@PC706
680P_0603_50V8J
@
12
PR749
0_0402_5%
PR749
0_0402_5%
1 2
PC808
4.7U_0603_6.3V6M
PC808
4.7U_0603_6.3V6M
12
PC818
4.7U_0603_6.3V6M
PC818
4.7U_0603_6.3V6M
12
PC816
4.7U_0603_6.3V6M
PC816
4.7U_0603_6.3V6M
12
PC835
0.1U_0402_10V7K
@PC835
0.1U_0402_10V7K
@
12
PC832
0.1U_0402_10V7K
@PC832
0.1U_0402_10V7K
@
12
PC811
4.7U_0603_6.3V6M
PC811
4.7U_0603_6.3V6M
12
PC804
22U_0805_6.3V6M
@PC804
22U_0805_6.3V6M
@
1
2
PR718 0_0402_5%PR718 0_0402_5%
1 2
PC831
0.1U_0402_10V7K
PC831
0.1U_0402_10V7K
12
PR739
133K_0603_1%
PR739
133K_0603_1%
12
PC701
47P_0402_50V8J
PC701
47P_0402_50V8J
12
PR725
1K_0402_1%
PR725
1K_0402_1%
1 2
PC711
2.2U_0603_10V6K
PC711
2.2U_0603_10V6K
12
+
PC802
330U_D2_2V_Y
+
PC802
330U_D2_2V_Y
1
2
PR7111K_0402_1% PR7111K_0402_1%
1 2
PU701
G718TM1U_SOT23-8
PU701
G718TM1U_SOT23-8
RHYST2 5
OT1
3
OT2
4
GND
2
VCC
1
TMSNS2 6
RHYST1 7
TMSNS1 8
+
PC801
330U_D2_2V_Y
+
PC801
330U_D2_2V_Y
1
2
+
PC715
330U_D2_2V_Y
+
PC715
330U_D2_2V_Y
1
2
PR733 422K_0402_1%PR733 422K_0402_1%
12
PR709
1K_0402_1%
PR709
1K_0402_1%
12
PC813
4.7U_0603_6.3V6M
PC813
4.7U_0603_6.3V6M
12
220P_0402_25V8K
PC265@
220P_0402_25V8K
PC265@
12
PC815
4.7U_0603_6.3V6M
PC815
4.7U_0603_6.3V6M
12
PC827
4.7U_0603_6.3V6M
PC827
4.7U_0603_6.3V6M
12
PC710
560P_0402_50V7K
PC710
560P_0402_50V7K
12
PQ702
TPCA8059-H_PPAK56-8-5
PQ702
TPCA8059-H_PPAK56-8-5
4
5
1
2
3
PQ703
MDV1525URH
PQ703
MDV1525URH
4
5
1
2
3
PR7101K_0402_1% PR7101K_0402_1%
1 2
PC709
1000P_0402_50V7K
PC709
1000P_0402_50V7K
12
PR741
8.66K_0402_1%
PR741
8.66K_0402_1%
1 2
PC828
0.1U_0402_10V7K
PC828
0.1U_0402_10V7K
12
PR735
0_0402_5%
PR735
0_0402_5%
12
PR706
4.7_1206_5%
@PR706
4.7_1206_5%
@
12
PR745
0_0603_5%
PR745
0_0603_5%
12
PR729
7.15K_0402_1%
PR729
7.15K_0402_1%
1 2
PC810
4.7U_0603_6.3V6M
PC810
4.7U_0603_6.3V6M
12
PC817
4.7U_0603_6.3V6M
PC817
4.7U_0603_6.3V6M
12
PC717
10U_0805_25V6K
PC717
10U_0805_25V6K
12
PR708 1K_0402_1%PR708 1K_0402_1%
12
PR723 0_0402_5%PR723 0_0402_5%
1 2
PR7121K_0402_1% @PR7121K_0402_1% @
1 2
PC833
0.1U_0402_10V7K
@PC833
0.1U_0402_10V7K
@
12
PL702
0.36UH_PCMC104T-R36MN1R105_30A_20%
PL702
0.36UH_PCMC104T-R36MN1R105_30A_20%
1 2
PR737
10K_0402_1%
3D@
PR737
10K_0402_1%
3D@
PR704 1K_0402_1%PR704 1K_0402_1%
12
+
PC800
330U_D2_2V_Y
+
PC800
330U_D2_2V_Y
1
2
PC822
4.7U_0603_6.3V6M
PC822
4.7U_0603_6.3V6M
12
PR717
40.2K_0402_1%
3D@ PR717
40.2K_0402_1%
3D@
1 2
PC805
22U_0805_6.3V6M
PC805
22U_0805_6.3V6M
1
2
PH505
220K_0402_5%_ERTJ0EV224J
@PH505
220K_0402_5%_ERTJ0EV224J
@
12
68P_0402_50V8J
PC264@
68P_0402_50V8J
PC264@
12
PQ701
MDV1525URH
PQ701
MDV1525URH
4
5
1
2
3
PC714
10U_0805_25V6K
PC714
10U_0805_25V6K
12
68P_0402_50V8J
PC261@
68P_0402_50V8J
PC261@
12
PC809
4.7U_0603_6.3V6M
PC809
4.7U_0603_6.3V6M
12
PC806
47U_0805_4V6
PC806
47U_0805_4V6
12
PC712
1U_0603_10V6K
PC712
1U_0603_10V6K
12
PR744
8.66K_0402_1%
PR744
8.66K_0402_1%
12
PC812
4.7U_0603_6.3V6M
PC812
4.7U_0603_6.3V6M
12
220P_0402_25V8K
PC262@
220P_0402_25V8K
PC262@
12
PR740
10_0603_1%
PR740
10_0603_1%
1 2
PR732
301K_0402_1%
PR732
301K_0402_1%
1 2
PR702 1K_0402_1%@PR702 1K_0402_1%@
12
PR701 1K_0402_1%@PR701 1K_0402_1%@
12
PR746
330K_0402_1%
OPTIMUS@ PR746
330K_0402_1%
OPTIMUS@
1 2
PR750
0_0402_5%
PR750
0_0402_5%
1 2
PC803
22U_0805_6.3V6M
@PC803
22U_0805_6.3V6M
@
1
2
PR719 0_0402_5%PR719 0_0402_5%
1 2
PR747
24.9K_0402_1%
PR747
24.9K_0402_1%
1 2
PR743
7.68K_0402_1%
PR743
7.68K_0402_1%
1 2
PR703 1K_0402_1%PR703 1K_0402_1%
12
PR727
0_0402_5%
PR727
0_0402_5%
12
PR721 0_0402_5%PR721 0_0402_5%
1 2
PC823
4.7U_0603_6.3V6M
PC823
4.7U_0603_6.3V6M
12
PC825
4.7U_0603_6.3V6M
PC825
4.7U_0603_6.3V6M
12
PR720 0_0402_5%PR720 0_0402_5%
1 2
PC830
0.1U_0402_10V7K
PC830
0.1U_0402_10V7K
12
PC829
0.1U_0402_10V7K
PC829
0.1U_0402_10V7K
12
PR748
0_0603_5%
PR748
0_0603_5%
12
PC820
4.7U_0603_6.3V6M
PC820
4.7U_0603_6.3V6M
12
PC814
4.7U_0603_6.3V6M
PC814
4.7U_0603_6.3V6M
12
PQ704
TPCA8059-H_PPAK56-8-5
PQ704
TPCA8059-H_PPAK56-8-5
4
5
1
2
3
PC703
220P_0402_50V7K
PC703
220P_0402_50V7K
1 2
PL701
FBMA-L11-201209-121LMA50T_0805
PL701
FBMA-L11-201209-121LMA50T_0805
12
PC707
1000P_0402_50V7K
PC707
1000P_0402_50V7K
12
0.1U_0402_16V7K
PC268
0.1U_0402_16V7K
PC268
1 2
PU700
ADP3211AMNR2G_QFN32_5X5
PU700
ADP3211AMNR2G_QFN32_5X5
GPU
7
PWRGD
1
IMON
2
CLKEN#
3
FBRTN
4
FB
5
COMP
6
ILIM
8
IREF
9
RPM
10
RT
11
RAMP
12
LLINE
13
CSREF
14
CSFB
15
CSCOMP
16
VCC 24
BST 23
DRVH 22
SW 21
PVCC 20
DRVL 19
PGND 18
AGND 17
EN 32
VID0 31
VID1 30
VID2 29
VID3 28
VID4 27
VID5 26
VID6 25
AGND 33
PR736
0_0402_5%
@PR736
0_0402_5%
@
1 2
100P_0402_25V8K
PC263@
100P_0402_25V8K
PC263@
12
PR705
0_0603_5%
PR705
0_0603_5%
1 2
PR734
1K_0402_1%
PR734
1K_0402_1%
12
PC826
4.7U_0603_6.3V6M
PC826
4.7U_0603_6.3V6M
12
PC716
0.1U_0603_25V7K
PC716
0.1U_0603_25V7K
12
PC708
1000P_0402_50V7K
PC708
1000P_0402_50V7K
12
PR707 1K_0402_1%@PR707 1K_0402_1%@
12
PC713
10U_0805_25V6K
PC713
10U_0805_25V6K
12
PR730
80.6K_0402_1%
PR730
80.6K_0402_1%
1 2
PC819
4.7U_0603_6.3V6M
PC819
4.7U_0603_6.3V6M
12
PR737
80.6K_0402_1%
OPTIMUS@ PR737
80.6K_0402_1%
OPTIMUS@
1 2
PR724 0_0402_5%PR724 0_0402_5%
1 2
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
Custom
59 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
Custom
59 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
Custom
59 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
NO DATE PAGE MODIFICATION LIST PURPOSE
--------------------------------------------------------------------------------------------------------------------------------
4019HG
1. 2011/09/29 P51-PWR_+3VALWP/+5VALWP Change PU330 to RT8205L Change source
2. 2011/09/29 P53-PWR_ +1.05VS_VCCP/+16VSP Change PU400 to RT8237C Change source
3. 2011/09/29 P54-PWR_+VCCSAP/1.8VSP Change PU450 to SY8037B Change source
4. 2011/09/29 P57-PWR +CPU_CORE DECOUPLING Change HMOS to MDV1525 Change source
5. 2011/09/29 P53-PWR_ +1.05VS_VCCP/+16VSP Change HMOS to MDV1525 Change source
6. 2011/09/29 P49-PWR_BATTERY CONN / OTP Change PD5,PD6 to SCA00001G00 ESD team request
7. 2011/09/29 P57-PWR +CPU_CORE DECOUPLING Change PR589 from 348 to 8.06k FAE suggestion
8. 2011/09/29 P57-PWR +CPU_CORE DECOUPLING Change PR590 from 3.65k to 806 FAE suggestion
10. 2011/09/29 P57-PWR +CPU_CORE DECOUPLING Change PC574 from 680P to 0.033u FAE suggestion
11. 2011/09/29 P57-PWR +CPU_CORE DECOUPLING Change PC577 from 4700P to 0.033u FAE suggestion
12. 2011/09/29 P57-PWR +CPU_CORE DECOUPLING Change PR548 from 1.21k to 8.06k FAE suggestion
13. 2011/09/29 P57-PWR +CPU_CORE DECOUPLING Change PR550 from 10.7k to 806 FAE suggestion
14. 2011/09/29 P57-PWR +CPU_CORE DECOUPLING Change PC547 from 680P to 0.033u FAE suggestion
15. 2011/09/29 P57-PWR +CPU_CORE DECOUPLING Change PC551 from 4700P to 0.033u FAE suggestion
16. 2011/09/29 P57-PWR +CPU_CORE DECOUPLING Add snubber and boost resistor For 3x3 H-MOS solution
17. 2011/09/29 P49-PWR_BATTERY CONN / OTP Add PR22 120k,PR27 100k, PR32 0 Ohm For 120W adapter protect(9012)
18. 2011/09/29 P58-PWR_VGA_CORE Remove PC803, PC804 add PC806 47u For Nvidia suggestion
19. 2011/09/29 P51-PWR_+3VALWP/+5VALWP Change PC360 to SE000006R80 Change source
20. 2011/09/29 P58-PWR_VGA_CORE Change PC702 to SE00000H180 Change source
21. 2011/09/29 P49-PWR_BATTERY CONN / OTP Add PR17 14k, PR33 0 Ohm For CPU temperature protect(9012)
22. 2011/09/29 P51-PWR_+3VALWP/+5VALWP Add PR373 0 Ohm For 3/5 V always power on(9012)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
Custom
60 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
Custom
60 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
Custom
60 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
HW PIR (Product Improve Record)
QFKAA LA-8391P SCHEMATIC CHANGE LIST
REVISION CHANGE: 0.2
GERBER-OUT DATE: 2011/11/11
-----------------------------------------------------------------------------------------------------------------------------------
Item Page Date Request Solution
-----------------------------------------------------------------------------------------------------------------------------------
1) 44 2011/9/27 in order to add one AD channel for PWR VR change PWR_GPS_DOWN# to EC GPIO43.
protect of GPU GPS change HDPACT to EC_GPIO50
2) 44 2011/9/27 in order to reduce BOM change CB50 to SE000000K80
3) 15 2011/9/27 for N13PGL strap pin by NV review modify VRAM Table
change RV77 to @ due to it is for X76
change RV98 to @ for N13PGL
change RV76 to @ for N13PGL
change RV73 to 45.3k (SD034453280) for N13PGL
change RV89 to 34.8k (SD034348280) for N13PGL
4) 15 2011/9/28 for N13PGL strap pin by NV review change RV89 to 30k (SD034300280) for N13PGL
5) 15 2011/9/28 for N13PGS strap pin by NV review change RV73 BOM sstructure to N13PGS@(34.8K) & N13PGL@(45.3K)
change RV54 to @
change RV79 BOM sstructure to N13PGS@(20K) & N13PGL@(10K)
change RV76 to 10K and N13PGS@
change RV98 to GSDIS@
change RV75 to GSOPT@
6) 22 2011/9/29B by ESD demand change D84 to SCA00001L00
7) 35 2011/9/29B by ESD demand change D82 to SCA00001L00
8) 37 2011/9/29B by ESD demand change D92 to SCA00001L00
9) 05 2011/10/05A follow HW4 check list reserve decoupling cap CC66, CC67, CC70 for H_PM_SYNC & H_PECI, BUF_CPU_RST#
11) 28 2011/10/05A by Customer demand add LVDS dual channel signal
12) 22 2011/10/05A by Customer demand add LVDS dual channel signal and 0ohm: R267 R268 R269 R270 R283 R329 R333 R337 (OPTFHD@)
and R500 R501 R502 R503 R504 R505 R507 R508 (3D@)
13) 26 2011/10/05A by Customer demand add RH277 BOM structure : OPTFHD@
14) 47 2011/10/05A follow HW4 check list add unused Dual MOS: Q7B,Q6B
15) 15 2011/10/18a by NV demaend change RV89 to 10k (SD034100280) for N13PGL
16) 10 2011/10/18a for PEG reversal change RC79 from @ to always mount
17) 44 2011/10/18a discuss with EC change Function_LED from EC_GPIO4D, PIN86 to EC_GPIO11, PIN25
change HDPLOCK from EC_GPIO11, PIN25 to EC_GPIO4D, PIN86
add GPUPWR_SKIN# on EC_GPIO13, pin27
change PWRMOS_TEMP from EC_GPIO50, PIN89 to EC_GPIO43, PIN76
change HDPACT from EC_GPIO43, PIN76 to EC_GPIO50, PIN89
change RB28 pin1 from PWR_GPS_DOWN# to GPUPWR_SKIN#
reserve SUSACK# and PCH_SUSPWRDN# by SW demand
18) 27 2011/10/18a by SW ME demand change PCH_SUSPWRDN_R to PCH_SUSPWRDN#_R
add PCH_SUSPWRDN# to EC and RH132
remove T75
change SUSACK# to SUSACK#_R
add RH133 and SUSACK# to EC
19) 46 2011/11/1 new touch pad add new function add JTP connector Pin 5 (PM_SMBCLK) , Pin6 (PM_SMBDATA)
20) 36 2011/11/1 TV tuner(BCAS) 16V reserve add RM15 and RM16 reserve for TV tuner (BCAS)
21) 42 2011/11/1 avoid SM_EN floating reserve RA43 for SM_EN 100K pull down reserve
22) 42 2011/11/1 for vendor request exchange location of RA28 and CA42
23) 42 2011/11/1 for vendor request RA26 pin2 change name from OSC_IN to OSC_OUT
24) 42 2011/11/1 for vendor request, S&M HP need shut down delete DA1. add RA19 ,QA5 ,RA42 ,
25) 32 2011/11/2 for lot6 0.5W power consumption delete CH57 ,PJ3 then add PJ5, QH6, CH59, RH228
26) 47 2011/11/2 for lot6 0.5W power consumption add R5545, Q5527, R5529, R5534
27) 47 2011/11/3 for NV power sequence R434 change from 220K to 330K
28) 47 2011/11/3 for NV power sequence change net name from DGPU_PWR_EN# to VGA_PWROK#
29) 32 2011/11/3 for lot6 0.5W power consumption reserve RH228
30) 46 2011/11/3 for lot6 0.5W power consumption change D21 power from +5VL to +5VALW
31) 44 2011/11/7 for lot6 0.5W power consumption add EC pin 70 for PCH_PWR_EN
32) 29 2011/11/7 for NV sequence delete RH287 for NV sequence
33) 29 2011/11/7 for NV sequence RH175 change to always mount
34) 29 2011/11/7 for TV tuner 16VS over current Pin delete RH174 and RH1
35) 29 2011/11/7 for TV tuner 16VS over current Pin change PCH D44 ball trace name to LNB_OC#
36) 29 2011/11/7 for TV tuner 16VS over current Pin add RH326 for LNB_OC# pull high
37) 42 2011/11/9 for vendor request exchange CA42 and RA28 location
38) 40 2011/11/9 for vendor request add RT67 RT68 RT69 RT70 RT72 RT73
39) 36 2011/11/9 for EMI request reserve CCL10 for EMI request
40) 37 2011/11/9 for EMI request reserver RL29 CL43 for EMI request
41) 29 2011/11/9 EC common core for WL_OFF# PCH pin F46 and RH299 chagne net name from WL_OFF# to PCH_GPIO55
42) 44 2011/11/9 EC common core for WL_OFF# change EC pin 29 net name from CPSETIN to WL_OFF#
43) 36 2011/11/9 EC common core for WL_OFF# add R5546 for WL_OFF# pull high to +3V_WLAN
44) 44 2011/11/9 EC common core for WL_OFF# CPSETIN signal change from EC pin 29 to EC pin 74
45) 44 2011/11/9 LNB_OC# change from PCH pin D44 to EC pin 119 add RH327 pull high to +3VS for LNB_OC#
46) 36 2011/11/15 for vendor demand change YCL1 from SJ10000CU00 to SJ10000EF00, CCL4 and CCL5 from 30pF to 15pF
47) 15 2011/11/15 for NV recommend change BOM structure of RV54 from @ to N13PGS@
48) 47 2011/11/15c for NV DG demand change R460 from 470ohm to 22ohm
49) 36 2011/11/15d by EMI demand change BOM structure of CCL10 from @ to GCLK@
50) 37 2011/11/15d by EMI demand change BOM structure of RL29, CL43 from @ to GCLK@
4019HG
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
Custom
61 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
Custom
61 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
B
SCHEMATICS, MB A8391
Custom
61 61Thursday, February 16, 2012
2011/12/14 2012/12/31
Compal Electronics, Inc.
HW PIR (Product Improve Record)
QFKAA LA-8391P SCHEMATIC CHANGE LIST
REVISION CHANGE: 0.3
GERBER-OUT DATE: 2011/12/22
4019HG
-----------------------------------------------------------------------------------------------------------------------------------
Item Page Date Request Solution
-----------------------------------------------------------------------------------------------------------------------------------
1) 27 2011/11/29a For DVT hang Add CH23 CH24 CH25 for SW-node noise.
2) 13 2011/11/29a For ME request Change location from JLVDS to JLVDS4
3) 47 2011/12/05a For reduce Rds-on of +VRAM_1.5VS Add Q44
4) 05 2011/12/07a For leakage Change from +3VALW to +3VALW_PCH of UC1
5) 44 2011/12/13a For design change Change LNB_EN from PCH to EC and delte RH315, add RB11
6) 24 2011/12/13a For HDMI leakage Change Pin 5 of U9 from +5VL to +HDMI_5V_OUT
7) 44 2011/12/13a For design change RF LED control pin Change RF LED control pin from PCH to EC.
8) 35 2011/12/15a For ME request Change JFP/JPOWER/JFUN from zif to non-zif
9) 40 2011/12/15a For adjust EXT USB3.0 sequence Change +3V to +3V_USB control pin from syson to PM_SLP_S4#
10) 41 2011/12/15a For adjust EXT USB3.0 sequence Change +3V to +3V_USB control pin from syson to PM_SLP_S4#
11) 22 2011/12/17a For prevent LVDS burn issue Add F3 (Poly fuse to prevent burn)
12) 46 2011/12/19a For ME delete stand-off Delete H25,H26,H27
13) 46 2011/12/19a For Wimax flash issue Change +5VS to +3VS of Wimax LED
14) 46 2011/12/19a For layout request Add net name +5VS_FUNC with Function conn power pin
15) 15 2011/12/20a For NV request Change RV76 from 10K to 20K
16) 46 2011/12/21a For power rail change Change WiMAX LED power rail from +5VS to +5VALW
17) 16 2011/12/22a For NV request Change LV6 from bead to 4.3ohm resistor
18) 29 2011/12/22a For EMI request Add CH29 for EMI request
QFKAA LA-8391P SCHEMATIC CHANGE LIST
REVISION CHANGE: 1.0
GERBER-OUT DATE: 2012/02/02
-----------------------------------------------------------------------------------------------------------------------------------
Item Page Date Request Solution
-----------------------------------------------------------------------------------------------------------------------------------
1) 36 2012/01/12a For GCLK Add CCL13(0.1u) for +3VALW
2) 15 2012/01/12a For NV suggestion Change RV 76 from 20K to 45K(Support GEN3)
3) 36 2012/01/12a For MSATA pin define. Add RM30 (MSATA define that Pin22 is reserve, so other function need to add PLT_RST#).
4) 36 2012/01/18a For GLCK Change CCL13 from +3VLAW to +3VALW_GCLK
5) 41 2012/01/30a For TV tuner use PCIE interface Add RM31~RM35 and QM2
6) 26 2012/01/30a For TV tuner use PCIE interface Change PCIE 6 from USB to TV tuner
7) 26 2012/01/30a For TV tuner use PCIE interface Change CLK_USB30 to CLK_TV and CLKREQ_USB30# to CLKREQ_TV#
8) 11 2012/01/30a For M1 only Unmount RC117/RC118/QC7/QC8
9) 46 2012/01/30a For MP Unmount SW3
10) 15 2012/01/30a For NV suggestion Change RV 73 to 5K
11) 43 2012/01/30a For EMI request Add CA51
12) 41 2012/01/30a For Internal USB30 only Delete Page 41
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