Compal LA 9984P Schematics. Www.s Manuals.com. R1.0 Schematics
User Manual: Motherboard Compal LA-9984P VBW11 ANRVBW0100 - Schematics. Free.
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Page Count: 58

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A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Compal Electronics, Inc.
Dell / Compal Confidential
X76@ : 76 level
46@ : 46 level
@ : Nopop component
CONN@ : Connector component
XDP@ : XDP function
UMA@ : Only for UMA
DIS@ : Only for Discrete
VENUS@ : VENUS Pro,VENUS XT
VENUSXT@ : VENUS XT
VENUSPRO@ : VENUS Pro
@VENUS@ : VENUS nopop component
EMI@ : EMI parts
@EMI@ : Reserve EMI parts
ESD@ : ESD parts
RF@ : RF parts
Intel Shark Bay ULT
OAK Mainstream2
UMA/DIS AMD Venus XT
2013-05-17 Rev: 1.0
Schematic Document
MODEL NAME : VBW11
PROJECT CODE : ANRVBW0100
PCB NO : DA8000WN000 LA-9984P M/B
DA40001FP00 LS-9102P USB/B
DA40001FR00 LS-9104P ODD/B
DA40001G400 LS-9105P POWER BUTTON/B
DA40001FQ00 LS-9106P TP BUTTON/B
BOM config
UMA : UMA@,EMI@,ESD@,RF@,XDP@
DIS VENUS : VENUS@,VENUSXT@,DIS@,EMI@,ESD@,RF@,XDP@
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
Cover Page
Custom
1 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
Cover Page
Custom
1 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
Cover Page
Custom
1 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
ZZZ1
PCB VBW11 LA9984P/LS9102P/LS9104P/LS9105P/LS9106P
R1@
DA8000WN000
ZZZ1
PCB VBW11 LA9984P/LS9102P/LS9104P/LS9105P/LS9106P
R1@
DA8000WN000

A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
RTL8106E
Port 2
Card Reader
RTS5179/5170
Port 10
USB 3.0 Conn. 2
Daughter board
64M
PS/2
8GB Max
PEG 2.0 x4
BANK 0, 1, 2, 3, 4 ,5 ,6 ,7
DDRIII-DIMM X2
1.35V DDR3 1600 MHz
P.42
P.25
USB 3.0 Conn. 1
Digital Camera
Mini Card
Port 11
Port 8
P.41
P.26
LPC Bus
P.40P.27
ENE KBC
KB9012
Int.KBD
P.27
Touch Pad
USB2.0
Port 0,1
Port 0
Audio Codec
ALC3223 Int. Speaker R / L
Headphone Jack / Mic. Jack combo
HD Audio
Port 1,2
USB 2.0 Conn. 3
P.24
USB 3.0
Port 2,3
PCI-E
P.21
Port 1
SPI
Ethernet
RJ45
Intel
Haswell
Processor
15W DC
BGA1168
Intel
Lynx Point-LP
SPI ROM
P.9 P6~16
P.22
Dual Channel
Memory Bus (DDR3L)
SATA HDD Conn.
P.42
33MHz
SATA3.0
USB 2.0 Conn. 4
P.23
Half
Mini Card
WLAN/BT4.0
P.26
LVDS Conn.
HDMI Conn. HDMI
P.41
P.20
Port 1
Digital Mic.
P.27
Fan Control CPU XDP
Conn.
P.6
SATA ODD Conn.
Venus Pro(HD8850M)2GB GDDR5 (128Mx16x8pcs)
P.22
P.22
P.21
P.17~18
(With Digital MIC)
WLAN (Half)
P.41
Touch Screen
Port 9
P.23
3 in 1 Socket
RTD2136R
P.19
LVDS eDP
SMBus
P.34 P.35
128M*16
GDDR5*8
P.36
P.37
AMD
Venus Pro , 25W
P.28~33
64bit
64bit
128M*16
GDDR5*8
128M*16
GDDR5*8
128M*16
GDDR5*8
(OAK 15" only)
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9984P
1.0
2 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
Block diagram
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9984P
1.0
2 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
Block diagram
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9984P
1.0
2 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
Block diagram

A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Compal Confidential
Project Code : VAW10 / VAW11
File Name : LA-9983P / LA-9984P
USB
USB
USB
HP
RJ-45
HDMI
JRTC
2 pin
Led1
Led2
Led3
Led4
LA-9984P M/B
MINI Card
Battery
JMINI
PBATT
JHDD
Card
Reader
JREAD
JHDMI
JLAN
JUSB1
JUSB2
JUSB3
JHP
40 pin
JLVDS
JDB
8 pin
Bottom Side
Top Side
8 pin
Hot Bar
LS-9102P (USB/B)
USB
JUSB4
8 pin
USB-DB FFC
JKB
30 pin
SW2 SW3
LS-9106P (TP-BTN/B)
TP-Module
4 pin
TP-BTN FFC
6 pin
TP-MB FFC
4 pin
JPWR
6 pin
JTP
JFAN
3 pin
XDP
JXDP
(OAK 17")
JBTB2
12 pin
JODD
LS-9104P (ODD/B)
JBTB1
12 pin
JSPK
4 pin
RTC
5 pin
PJPDC
4 pin
JKBBL
LA-9983P M/B
4 pin
PWR-BTN FFC
SW1
(SN100004Y00)
4 pin
Hot Bar
Lid
LS-9105P (PWR/B)
UE5
(SA00003VQ00)
4 pin
Hot Bar
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9984P
1.0
3 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
DB block diagram
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9984P
1.0
3 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
DB block diagram
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9984P
1.0
3 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
DB block diagram

A
A
1 1
V
WLAN
mini card
SMBCLK
SMBDATA
ULT
DDR3LVGA
V
V
Link
V
XDP
ULT
VV
Charger
EC_SMB_CK2
EC_SMB_DA2
SOURCE
KB9012
SMBUS Control Table
SML0CLK
SML0DATA
ULT
EC_SMB_CK1
EC_SMB_DA1
KB9012
V
RTD2136S
USB2.0
Port0
ULT
Touch Screen Panel
MINI Card (WLAN)
PCI EXPRESS
10/100 LAN
PEG (N14P)
PEG (N14P)
10/100 LAN
CLKOUT_PCIE0
CLOCK SIGNAL
CLKOUT_PCIE1
CLKOUT_PCIE2
CLKOUT_PCIE3
CLKOUT_PCIE4
Vcc 3.3V +/- 1%
100K +/- 1%Ra
Rb V min
0
1
2
3
0 0.000V
0.347V
0.423V 0.430V
0.550V
0.360V
0.438V
AD_BID
V typ
AD_BID
V
AD_BID
max
15K +/- 1%
20K +/- 1%
27K +/- 1%
33K +/- 1%
43K +/- 1%
1.200V
0.000V 0.300V
4
5
6
756K +/- 1%
0.541V
0.691V
0.819V
0.713V
0.807V
0.978V 0.992V
1.185V
0.831V
0.702V
0.559V
Board ID Table for AD channel
0x00 - 0x0B
EC AD3
0x0C - 0x1C
0x1D - 0x26
0x27 - 0x30
0x31 - 0x3B
0x3C - 0x46
0x47 - 0x54
0x55 - 0x64
12K +/- 1%
1.169V
1.006V
0.354V
USB connector 3
USB connector 2
USB connector 4 (DB)
USB connector 1
MINI Card (WLAN)
Card Reader
Camera
Lane 1
Lane 2
Lane 3
Lane 4
Lane 5
Lane 6
HDD
ODD
SATA0
SATA1
SATA2
SATA3
SATA
Port1
Port2
Port3
Port4
USB3.0
Port1
Port2
Port3
Port4
Port5
Port6
Port7
USB connector 2
USB connector 1
CLKOUT_PCIE5
MINI Card (WLAN)
dGPU
BATT
V
SML1CLK
SML1DATA
Touch pad
8
9
10
11
75K +/- 1% 1.398V
1.634V
1.849V 1.865V
2.031V
1.667V
1.881V130K +/- 1%
160K +/- 1%
200K +/- 1%
240K +/- 1%
270K +/- 1%
2.544V
1.414V 1.430V
12
13
14
15 330K +/- 1%
2.015V
2.185V
2.329V
2.215V
2.316V
2.395V 2.408V
2.533V
2.343V
2.200V
2.046V
0x65 - 0x76
0x77 - 0x87
0x88 - 0x96
0x97 - 0xA3
0xA4 - 0xAD
0xAE - 0xB7
0xB8 - 0xC0
0xC1 - 0xC9
100K +/- 1%
2.521V
2.421V
1.650V
430K +/- 1%
560K +/- 1%
750K +/- 1%
3.300V
16
17
18
19 NC
2.667V
2.800V
2.687V
2.791V
2.905V 2.912V
3.300V
2.808V
2.677V 0xCA - 0xD3
0xD4 - 0xDC
0xDD - 0xE6
0xE7 - 0xFF3.000V
2.919V
Board ID
16
Board ID TABLE
SSI&A02
ID
0
1
2
3
4
5
6
7
PCB Revision
SSI&A02
8
9
10
11
12
13
14
15
UMA Sun XT VenusPro VenusXT
SSI&A02
SSI&A02
PT
PT
PT
PT
ST
ST
ST
ST
XB
XB
XB
XB
17
18
19
A01
A01
A01
A01
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9984P
1.0
4 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
Notes List
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9984P
1.0
4 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
Notes List
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9984P
1.0
4 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
Notes List

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MCH
Shark bay
SMBUS Address [0x9a]
MEM_SMBDATA
MEM_SMBCLK
AH1
AP2
+3.3V_ALW_PCH
2.2K
2.2K
53
51
30
32
DDR_XDP_WLAN_TP_SMBDAT
DDR_XDP_WLAN_TP_SMBCLK
10K
+3VS
10K
DIMMA
SMBUS Address [A4]
DIMMB
SMBUS Address [A0]
SMBUS Address [TBD]
XDP1
SMBUS Address [TBD]
JMINI
DDR_XDP_SMBDAT_R1
DDR_XDP_SMBCLK_R1
SMBUS Address [TBD]
JTP
200
202
200
202
KBC
KB9012A4
78
77
0 ohm
0 ohm
AN1
AK1
+3.3V_ALW_PCH
1K
1K
SML0CLK
SML0DATA
AN1
AK1
+3.3V_ALW_PCH
2.2K
2.2K
SML1_SMBCLK
SML1_SMBDATA
N-MOS
N-MOS
N-MOS
N-MOS
EC_SMB_CK2
EC_SMB_DA2
+3VALW
2.2K
2.2K
14
13
UV28
0 ohm
0 ohm
LVDS
Translator
0 ohm
0 ohm
CSCL
CSDA
CIICSCL
CIICSDA
N-MOS
N-MOS
N-MOS
N-MOS
+3VALW
2.2K
2.2K
EC_SMB_CK1
EC_SMB_DA1
100 ohm
100 ohm PD1
3
1
4
6 5
3
BATT
BAT_ALERT
BATT_PRS
PBATT1 CONN
10
11
SDA
SCL
POWERPU701 Charger
0 ohm
0 ohm
SMBUS Address [0x16]
SMBUS Address [0x12]
SMBUS Address [TBD]
79
80 EC_SMB_DA2
EC_SMB_CK2
2.2K
+3VS_VGA
2.2K
VGA_SMB_CK2
VGA_SMB_DA2 T3
T4
UV28 GPU SMBUS Address [0xXX]
5
6
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
SMBus block diagram
5 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
SMBus block diagram
5 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
SMBus block diagram
5 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
reference Shark Bay ULT Validation Customer Debug Port
Implementation Requirement Rev 1.0
CAD Note:
Trace width=12~15 mil, Spcing=20 mils
Max trace length= 500 mil
CAD Note:
Avoid stub in the PWRGD path
while placing resistors RC115
DDR3 COMPENSATION SIGNALS
Place near JXDP1.47
Place near JXDP1
PU/PD for JTAG signals
i5-4200U-15W-GT2-MP
i3-4010U-15W-GT2-MP
i7-4500U-15W-GT2-MP
ESD solution
Place CC29
close to UC4
Place CC30
close to RC51.1
Place CC35
on BOT
COMPENSATION PU FOR eDP
CAD Note:Trace width=20 mils ,Spacing=25mil,
Max length=100 mils.
PECI_EC
CFG3_R
H_PROCHOT#
H_PROCHOT#_R
RUNPWROK
RUNPWROK
RUNPWROK
RUNPWROK
TRST#_XDP XDP_TRST#
XDP_TMS
XDP_TDI
XDP_TDOPCH_JTAG_TDO
H_CPUPW RGD
SYS_PW ROK_XDP
H_CPUPW RGD
CPU_DETECT#
H_CPUPW RGD H_VCCST_PW RGD_XDP
H_CATERR#
SM_RCOMP1
SM_RCOMP2
SM_RCOMP0
H_CATERR#
SM_RCOMP1
SM_RCOMP2
SM_RCOMP0
TRST#_XDP
TDO_XDP
TDI_XDP
TMS_XDP
CFG8
CFG9
CFG15
CFG14
CFG18
CFG17
CFG16
CFG2
SYS_PW ROK
CFG10
CFG11CFG3
CFG3
XDP_OBS1_R
XDP_OBS0_R
CFG13
CFG12
CFG19
CFD_PWRBTN#_XDP
XDP_TCLK
XDP_PRDY#
XDP_PREQ#
XDP_RST#_R
DDR_XDP_SMBCLK_R1
DDR_XDP_SMBDAT_R1
CPU_PW R_DEBUG#_R PLT_RST#
CFG0
CFG1
CFG4
CFG7
CFG6
CFG5
SYS_PW ROK_XDP
XDP_PREQ#
XDP_TCK
XDP_TMS
XDP_TRST#
XDP_TDI
XDP_TDO
PCH_JTAG_RST#
XDP_TDI
XDP_TMS
XDP_PREQ#
CLK_XDP
CLK_XDP#
XDP_PRDY#
XDP_OBS1_R
XDP_OBS0_R
XDP_TRST#
XDP_TCK
PCH_JTAG_TCK
XDP_DBRESET#
TDO_XDP
PCH_JTAG_RST#
PCH_JTAG_TCK
PCH_JTAG_TDO TDI_XDP_R
XDP_TCLK
XDP_DBRESET#
TDO_XDP
XDP_TDO
SYS_RESET#
TDO_XDP
TDI_XDP TDI_XDP_R
TMS_XDP
XDP_TRST#
XDP_TCLK
RUNPWROK
PLT_RST#
DDR3_DRAMRST#_CPU
EDP_DISP_UTIL
EDP_CPU_AUX
EDP_CPU_LANE_P1
EDP_CPU_LANE_N1
EDP_COMP
EDP_CPU_AUX#
EDP_CPU_LANE_N0
EDP_CPU_LANE_P0
DDI1_LANE_N3
DDI1_LANE_P0
DDI1_LANE_N0
DDI1_LANE_N2
DDI1_LANE_N1
DDI1_LANE_P3
DDI1_LANE_P2
DDI1_LANE_P1
RUNPWROK<30>
PCH_JTAG_TMS<8>
PCH_JTAG_TDI<8>
PCH_JTAG_TDO<8>
H_PROCHOT#<30,36>
PECI_EC<30>
DDR3_DRAMRST#_CPU<17>
DDR_PG_CTRL<17>
CPU_DETECT#<30>
CFG17 <16>
CFG16 <16>
CFG8 <16>
CFG9 <16>
CFG10 <16>
CFG11 <16>
CFG19 <16>
CFG18 <16>
CFG12 <16>
CFG13 <16>
CFG14 <16>
CFG15 <16>
CFG0<16>
DDR_XDP_W LAN_TP_SMBDAT<17,18,19,26,27,9>
DDR_XDP_W LAN_TP_SMBCLK<17,18,19,26,27,9>
CPU_PW R_DEBUG#<13>
CFG1<16>
CFG2<16>
CFG3<16>
CFG4<16>
CFG5<16>
CFG6<16>
CFG7<16>
PBTN_OUT#<10,30>
PCH_JTAG_RST# <8>
CLK_CPU_ITP# <9>
CLK_CPU_ITP <9>
PLT_RST# <10,21,26,30,48>
PCH_JTAG_JTAGX<8>
SYS_RESET# <10>
SYS_PW ROK<10,30>
PCH_JTAG_TCK<8>
EDP_CPU_LANE_N1 <19>
EDP_CPU_LANE_P1 <19>
DDI1_LANE_N0<20>
EDP_CPU_AUX# <19>
DDI1_LANE_P0<20>
DDI1_LANE_N1<20>
DDI1_LANE_P1<20>
DDI1_LANE_N2<20>
DDI1_LANE_P2<20>
DDI1_LANE_N3<20>
DDI1_LANE_P3<20>
EDP_CPU_AUX <19>
EDP_CPU_LANE_N0 <19>
EDP_CPU_LANE_P0 <19>
EDP_BIA_PW M <10,19>
+1.05VS
+3VS
+3VALW _PCH
+1.05VS+1.05VS
+1.05VS
+1.05VS
+3VS
+VCCIOA_OUT
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
6 55Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
MCP(1,2/19) eDP,XDP,MISC
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
6 55Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
MCP(1,2/19) eDP,XDP,MISC
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
6 55Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
MCP(1,2/19) eDP,XDP,MISC
CC30
0.047U_0402_16V4Z
ESD@CC30
0.047U_0402_16V4Z
ESD@
1
2
UC1
CL8064701478202 SR16Q C1 1.7G BGA
4010Ui3G2R1@
SA00006SX1L
UC1
CL8064701478202 SR16Q C1 1.7G BGA
4010Ui3G2R1@
SA00006SX1L
R2341
0_0402_5%
@
R2341
0_0402_5%
@
1 2
RC140 0_0402_5%XDP@RC140 0_0402_5%XDP@
1 2
UC1
CL8064701477702 SR170 C1 1.6G A31!
4200Ui5G2R3@
SA00006SM3L
UC1
CL8064701477702 SR170 C1 1.6G A31!
4200Ui5G2R3@
SA00006SM3L
RC72
0_0402_5%
@
RC72
0_0402_5%
@
1 2
RC52 0_0402_5%XDP@RC52 0_0402_5%XDP@
1 2
CC13
0.1U_0402_10V7K
CC13
0.1U_0402_10V7K
12
RC139 0_0402_5%XDP@RC139 0_0402_5%XDP@
1 2
RC70100_0402_1% RC70100_0402_1%
12
CC15
0.1U_0402_10V7K
XDP@
CC15
0.1U_0402_10V7K
XDP@
1
2
RP46
0_8P4R_5%
XDP@
RP46
0_8P4R_5%
XDP@
1 8
2 7
3 6
4 5
HASWELL_MCP_E
DDI EDP
Rev1p2
1 OF 19
UC1A
HASWELL_MCP_E
DDI EDP
Rev1p2
1 OF 19
UC1A
EDP_DISP_UTIL A43
EDP_RCOMP D20
DDI2_TXP3
B53 DDI2_TXN3
A53 DDI2_TXP2
B50 DDI2_TXN2
C49
DDI2_TXN1
C53
DDI2_TXN0
C51
DDI2_TXP0
C50
DDI2_TXP1
B54
DDI1_TXP3
B57
EDP_AUXN A45
EDP_AUXP B45
EDP_TXP3 B49
EDP_TXN3 A49
EDP_TXP2 C46
EDP_TXN2 C47
EDP_TXP1 B47
EDP_TXN1 A47
EDP_TXN0 C45
EDP_TXP0 B46
DDI1_TXN3
A57 DDI1_TXP2
A55 DDI1_TXN2
B55 DDI1_TXP1
C58 DDI1_TXN1
B58 DDI1_TXP0
C55 DDI1_TXN0
C54
T115@T115@
CC27
100P_0402_50V8J
ESD@
CC27
100P_0402_50V8J
ESD@
1
2
JXDP1
SAMTE_BSH-030-01-L-D-A
CONN@
JXDP1
SAMTE_BSH-030-01-L-D-A
CONN@
GND0
1
OBSFN_A0
3
OBSFN_A1
5
GND2
7
OBSDATA_A0
9
OBSDATA_A1
11
GND4
13
OBSDATA_A2
15
OBSDATA_A3
17
GND6
19
OBSFN_B0
21
OBSFN_B1
23
GND8
25
OBSDATA_B0
27
OBSDATA_B1
29
GND10
31
OBSDATA_B2
33
OBSDATA_B3
35
GND12
37
PWRGOOD/HOOK0
39
HOOK1
41
VCC_OBS_AB
43
HOOK2
45
HOOK3
47
GND14
49
SDA
51
SCL
53
TCK1
55
TCK0
57
GND16
59
GND1 2
OBSFN_C0 4
OBSFN_C1 6
GND3 8
OBSDATA_C0 10
OBSDATA_C1 12
GND5 14
OBSDATA_C2 16
OBSDATA_C3 18
GND7 20
OBSFN_D0 22
OBSFN_D1 24
GND9 26
OBSDATA_D0 28
OBSDATA_D1 30
GND11 32
OBSDATA_D2 34
OBSDATA_D3 36
GND13 38
ITPCLK/HOOK4 40
ITPCLK#/HOOK5 42
VCC_OBS_CD 44
RESET#/HOOK6 46
DBR#/HOOK7 48
GND15 50
TD0 52
TRST# 54
TDI 56
TMS 58
GND17 60
RC66
10K_0402_5%
RC66
10K_0402_5%
12
MISC
JTAG
DDR3
PWR
THERMAL
HASWELL_MCP_E
Rev1p2
2 OF 19
UC1B
MISC
JTAG
DDR3
PWR
THERMAL
HASWELL_MCP_E
Rev1p2
2 OF 19
UC1B
PREQ K62
PRDY J62
PROC_TCK E60
PROC_TRST E59
PROCHOT
K63
PROCPWRGD
C61
CATERR
K61
PECI
N62
PROC_DETECT
D61
PROC_TMS E61
PROC_TDI F63
PROC_TDO F62
BPM#0 J60
BPM#2 H61
BPM#1 H60
BPM#3 H62
BPM#7 J61
SM_RCOMP0
AU60
SM_RCOMP1
AV60
SM_RCOMP2
AU61
SM_PG_CNTL1
AV61
BPM#6 K60
BPM#5 H63
BPM#4 K59
SM_DRAMRST
AV15
RC570_0402_1%
@
RC570_0402_1%
@
12
RP45
51_8P4R_5%
RP45
51_8P4R_5%
1 8
2 7
3 6
4 5
RC60 62_0402_5%RC60 62_0402_5%
1 2
T112@T112@
RC26
0_0402_1%
@
RC26
0_0402_1%
@
1 2
RC45 0_0402_1%
@
RC45 0_0402_1%
@
1 2
CC16
0.1U_0402_10V7K
ESD@
CC16
0.1U_0402_10V7K
ESD@
1
2
CC35
0.047U_0402_16V4Z
ESD@CC35
0.047U_0402_16V4Z
ESD@
1
2
RC56 1K_0402_5%
XDP@
RC56 1K_0402_5%
XDP@
1 2
RC51
1K_0402_5%
XDP@
RC51
1K_0402_5%
XDP@
12
T116@T116@
CC29
0.1U_0402_10V7K
ESD@CC29
0.1U_0402_10V7K
ESD@
1
2
RC630_0402_5% XDP@ RC630_0402_5% XDP@
12
T111@T111@
RC68200_0402_1% RC68200_0402_1%
12
UC4
74CBTLV3126BQ_DHVQFN14_2P5X3
@UC4
74CBTLV3126BQ_DHVQFN14_2P5X3
@
1OE
1
1A
21B 3
2OE
4
2A
52B 6
GND 7
3B 8
3A
9
3OE
10
4B 11
4A
12
4OE
13
VCC
14
GND PAD 15
RC58 49.9_0402_1%@RC58 49.9_0402_1%@
1 2
RC49 0_0402_5%XDP@RC49 0_0402_5%XDP@
1 2
RC64
1K_0402_5%
@
RC64
1K_0402_5%
@
1 2
RC362
1K_0402_1%
RC362
1K_0402_1%
12
RC141 0_0402_1%@RC141 0_0402_1%@
1 2
RC620_0402_5% XDP@ RC620_0402_5% XDP@
12
UC1
CL8064701477702 SR170 C1 1.6G BGA
4200Ui5G2R1@
SA00006SM2L
UC1
CL8064701477702 SR170 C1 1.6G BGA
4200Ui5G2R1@
SA00006SM2L
RC650_0402_5% XDP@ RC650_0402_5% XDP@
12
RC50 0_0402_5%XDP@RC50 0_0402_5%XDP@
1 2
UC1
CL8064701477202 SR16Z C1 1.8G A31!
4500Ui7G2R3@
SA00006SL2L
UC1
CL8064701477202 SR16Z C1 1.8G A31!
4500Ui7G2R3@
SA00006SL2L
RC67 56_0402_5%RC67 56_0402_5%
1 2
T114@T114@
RC590_0402_1%
@
RC590_0402_1%
@
1 2
CC14
0.1U_0402_10V7K
XDP@
CC14
0.1U_0402_10V7K
XDP@
1
2
T113@T113@
RC46 0_0402_1%
@
RC46 0_0402_1%
@
1 2
RC48 1K_0402_5%XDP@RC48 1K_0402_5%XDP@
1 2
RC69120_0402_1% RC69120_0402_1%
12
RC7124.9_0402_1%~D RC7124.9_0402_1%~D
12
UC1
CL8064701478202 SR16Q C1 1.7G A31!
4010Ui3G2R3@
SA00006SX2L
UC1
CL8064701478202 SR16Q C1 1.7G A31!
4010Ui3G2R3@
SA00006SX2L
UC1
CL8064701477202 SR16Z C1 1.8G BGA
4500Ui7G2R1@
SA00006SL1L
UC1
CL8064701477202 SR16Z C1 1.8G BGA
4500Ui7G2R1@
SA00006SL1L
RP44
51_8P4R_5%
@RP44
51_8P4R_5%
@
1 8
2 7
3 6
4 5
RC43 0_0402_1%
@
RC43 0_0402_1%
@
1 2
CC17
0.1U_0402_10V7K
CC17
0.1U_0402_10V7K
1 2
RC44 0_0402_1%
@
RC44 0_0402_1%
@
1 2

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
change 22nF change 22nF change 22nF
confirm by intel request PDG P141
DDR_CKE2_DIMMBDDR_CKE1_DIMMA
DDR_A_DQS7
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS5
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS0
DDR_A_DQS6
DDR_A_DQS#5
DDR_A_DQS#7
DDR_A_DQS#2
DDR_A_DQS#1
DDR_A_DQS#0
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#6
DDR_B_BS2
DDR_B_BS0
DDR_B_BS1
DDR_CKE3_DIMMB
DDR_B_D29
DDR_B_D59
DDR_B_D50
DDR_B_D49
DDR_B_D13
DDR_B_D19
DDR_B_D14
DDR_B_D3
DDR_B_D55
DDR_B_D47
DDR_B_D52
DDR_B_D44
DDR_B_D41
DDR_B_D8
DDR_B_D5
DDR_B_D56
DDR_B_D48
DDR_B_D38
DDR_B_D35
DDR_B_D26
DDR_B_D25
DDR_B_D4
DDR_B_D63
DDR_B_D34
DDR_B_D32
DDR_B_D10
DDR_B_D17
DDR_B_D51
DDR_B_D40
DDR_B_D36
DDR_B_D31
DDR_B_D21
DDR_B_D20
DDR_B_D15
DDR_B_D7
DDR_B_D62
DDR_B_D46
DDR_B_D42
DDR_B_D18
DDR_B_D12
DDR_B_D1
DDR_B_D53
DDR_B_D37
DDR_B_D22
DDR_B_D57
DDR_B_D27
DDR_B_D54
DDR_B_D45
DDR_B_D39
DDR_B_D30
DDR_B_D9
DDR_B_D60
DDR_B_D58
DDR_B_D33
DDR_B_D0
DDR_B_D61
DDR_B_D43
DDR_B_D28
DDR_B_D23
DDR_B_D24
DDR_B_D16
DDR_B_D6
DDR_B_D2
DDR_B_D11
DDR_A_MA0
DDR_A_MA1
DDR_A_MA3
DDR_A_MA7
DDR_A_MA8
DDR_A_MA13
DDR_A_MA2
DDR_A_MA14
DDR_A_MA5
DDR_A_MA10
DDR_A_MA4
DDR_A_MA11
DDR_A_MA9
DDR_A_MA6
DDR_A_MA12
DDR_CS1_DIMMA#
DDR_CS0_DIMMA#
DDR_A_MA15
DDR_B_CAS#
DDR_B_RAS#
DDR_B_WE#
DDR_A_BS0
DDR_A_BS1
DDR_A_BS2
DDR_B_DQS3
DDR_B_DQS2
DDR_B_DQS7
DDR_B_DQS4
DDR_B_DQS1
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS0
M_CLK_DDR0
M_CLK_DDR#0
M_CLK_DDR1
M_CLK_DDR#1
M_CLK_DDR3
M_CLK_DDR#3
M_CLK_DDR#2
M_CLK_DDR2
DDR_B_MA10
DDR_B_MA9
DDR_B_MA14
DDR_B_MA5
DDR_B_MA13
DDR_B_MA11
DDR_B_MA7
DDR_B_MA2
DDR_B_MA0
DDR_B_MA6
DDR_B_MA1
DDR_B_MA12
DDR_B_MA4
DDR_B_MA8
DDR_B_MA3
DDR_B_MA15
DDR_A_RAS#
DDR_A_WE#
DDR_A_CAS#
DDR_A_D27
DDR_A_D35
DDR_A_D56
DDR_A_D23
DDR_A_D53
DDR_A_D47
DDR_A_D49
DDR_A_D29
DDR_A_D42
DDR_A_D61
DDR_A_D30
DDR_A_D36
DDR_A_D57
DDR_A_D59
DDR_A_D24
DDR_A_D48
DDR_A_D50
DDR_A_D28
DDR_A_D43
DDR_A_D62
DDR_A_D31
DDR_A_D37
DDR_A_D39
DDR_A_D58
DDR_A_D25
DDR_A_D33
DDR_A_D54
DDR_A_D51
DDR_A_D44
DDR_A_D46
DDR_A_D32
DDR_A_D38
DDR_A_D40
DDR_A_D26
DDR_A_D34
DDR_A_D55
DDR_A_D52
DDR_A_D45
DDR_A_D63
DDR_A_D41
DDR_A_D60
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D9
DDR_A_D18
DDR_A_D14
DDR_A_D8
DDR_A_D17
DDR_CS2_DIMMB#
DDR_CS3_DIMMB#
DDR_A_D13
DDR_A_D22
DDR_A_D21
DDR_A_D7
DDR_A_D16
DDR_A_D12
DDR_A_D20
DDR_A_D10
DDR_A_D15
DDR_A_D11
DDR_A_D19
DDR_CKE0_DIMMA
DDR_B_DQS#3
DDR_B_DQS#6
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#0
DDR_B_DQS#5
DDR_B_DQS#7
DDR_B_DQS#4
DDR_A_BS2 <17>
DDR_A_D[0..63]<17>
DDR_A_DQS[0..7] <17>
DDR_A_DQS#[0..7] <17>
DDR_A_MA[0..15] <17>
DDR_A_WE# <17>
DDR_A_CAS# <17>
DDR_A_BS0 <17>
DDR_A_BS1 <17>
DDR_A_RAS# <17>
M_CLK_DDR#0 <17>
M_CLK_DDR0 <17>
M_CLK_DDR#1 <17>
DDR_CKE0_DIMMA <17>
DDR_CKE1_DIMMA <17>
M_CLK_DDR1 <17>
DDR_CS0_DIMMA# <17>
DDR_CS1_DIMMA# <17>
DDR_B_D[0..63]<18>
DDR_B_DQS[0..7] <18>
DDR_B_DQS#[0..7] <18>
DDR_B_MA[0..15] <18>
DDR_B_BS1 <18>
DDR_CS2_DIMMB# <18>
DDR_CS3_DIMMB# <18>
DDR_B_BS2 <18>
DDR_B_RAS# <18>
M_CLK_DDR#2 <18>
M_CLK_DDR2 <18>
M_CLK_DDR#3 <18>
DDR_CKE2_DIMMB <18>
DDR_CKE3_DIMMB <18>
M_CLK_DDR3 <18>
DDR_B_WE# <18>
DDR_B_CAS# <18>
DDR_B_BS0 <18>
+SM_VREF_CA
+SM_VREF_DQ0
+SM_VREF_DQ1
+1.35V
+SM_VREF_CA +SM_VREF_DQ1
+1.35V
+SM_VREF_DQ0
+1.35V
+SM_VREF_DQ0_DIMM1+SM_VREF_CA_DIMM +SM_VREF_DQ1_DIMM2
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
7 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
MCP(3,4/19) DDR3
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
7 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
MCP(3,4/19) DDR3
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
7 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
MCP(3,4/19) DDR3
CC9
0.022U_0402_16V7K
CC9
0.022U_0402_16V7K
1
2
DDR CHANNEL B
HASWELL_MCP_E
Rev1p2
4 OF 19
UC1D
DDR CHANNEL B
HASWELL_MCP_E
Rev1p2
4 OF 19
UC1D
SB_DQSP4 AV22
SB_DQSP5 AW18
SB_DQSP6 AM21
SB_DQSP3 AM25
SB_DQSP7 AM18
SB_DQSP2 AM28
SB_DQSN7 AN18
SB_DQSP0 AV30
SB_DQSP1 AW26
SB_DQSN6 AN21
SB_DQSN2 AN28
SB_DQSN3 AN25
SB_DQSN4 AW22
SB_DQSN5 AV18
SB_DQSN1 AV26
SB_DQSN0 AW30
SB_MA14 AR46
SB_MA15 AP46
SB_MA13 AK33
SB_MA9 AU46
SB_MA10 AK36
SB_MA11 AV47
SB_MA8 AY47
SB_MA12 AU47
SB_MA4 AR45
SB_MA5 AP45
SB_MA6 AW46
SB_MA3 AR42
SB_MA7 AY46
SB_MA2 AP42
SB_MA0 AP40
SB_MA1 AR40
SB_BA2 AU49
SB_W E AK35
SB_CAS AM33
SB_BA0 AL35
SB_BA1 AM36
SB_RAS AM35
SB_CS#1 AK32
SB_ODT0 AL32
SB_CS#0 AM32
SB_CKE1 AU50
SB_CKE2 AW49
SB_CKE3 AV50
SB_CKE0 AY49
SB_CK#1 AK38
SB_CK1 AL38
SB_CK0 AN38
SB_CK#0 AM38
SB_DQ61
AM20
SB_DQ63
AP18 SB_DQ62
AR18
SB_DQ57
AR20 SB_DQ56
AN20
SB_DQ58
AK18
SB_DQ59
AL18
SB_DQ60
AK20
SB_DQ51
AM22
SB_DQ52
AN22
SB_DQ53
AP21
SB_DQ54
AK21
SB_DQ55
AK22
SB_DQ46
AV17
SB_DQ47
AU17
SB_DQ48
AR21
SB_DQ49
AR22
SB_DQ50
AL21
SB_DQ45
AU19
SB_DQ41
AW19
SB_DQ42
AY17
SB_DQ43
AW17
SB_DQ44
AV19
SB_DQ40
AY19
SB_DQ36
AV23
SB_DQ37
AU23
SB_DQ38
AV21
SB_DQ39
AU21
SB_DQ35
AW21
SB_DQ31
AL25
SB_DQ32
AY23
SB_DQ33
AW23
SB_DQ30
AK25
SB_DQ34
AY21
SB_DQ26
AR25 SB_DQ25
AR26
SB_DQ27
AP25
SB_DQ28
AK26
SB_DQ29
AM26
SB_DQ20
AR29
SB_DQ21
AN29
SB_DQ22
AR28
SB_DQ23
AP28
SB_DQ24
AN26
SB_DQ15
AU25
SB_DQ16
AM29
SB_DQ17
AK29
SB_DQ18
AL28
SB_DQ19
AK28
SB_DQ10
AY25
SB_DQ11
AW25
SB_DQ13
AU27
SB_DQ5
AU31
SB_DQ6
AV29
SB_DQ7
AU29
SB_DQ8
AY27
SB_DQ9
AW27
SB_DQ0
AY31
SB_DQ1
AW31
SB_DQ2
AY29
SB_DQ3
AW29
SB_DQ4
AV31
SB_DQ14
AV25
SB_DQ12
AV27
RC15
1.82K_0402_1%
RC15
1.82K_0402_1%
12
CC8
0.022U_0402_16V7K
CC8
0.022U_0402_16V7K
1
2
RC23
24.9_0402_1%~D
RC23
24.9_0402_1%~D
12
RC20
1.82K_0402_1%
RC20
1.82K_0402_1%
12
RC16
1.82K_0402_1%
RC16
1.82K_0402_1%
12
RC22
1.82K_0402_1%
RC22
1.82K_0402_1%
12
RC18
2.2_0402_1%
RC18
2.2_0402_1%
1 2
RC19
2.2_0402_1%
RC19
2.2_0402_1%
1 2
RC14
1.82K_0402_1%
RC14
1.82K_0402_1%
12
RC17
2.2_0402_1%
RC17
2.2_0402_1%
1 2
RC25
24.9_0402_1%~D
RC25
24.9_0402_1%~D
12
DDR CHANNEL A
HASWELL_MCP_E
Rev1p2
3 OF 19
UC1C
DDR CHANNEL A
HASWELL_MCP_E
Rev1p2
3 OF 19
UC1C
SA_DQ25
AR55
SA_DQ28
AL55
SA_CLK1 AY36
SA_CLK#1 AW36
SA_CLK0 AV37
SA_CLK#0 AU37
SA_DQ0
AH63
SA_DQ1
AH62
SA_DQ2
AK63
SA_DQ3
AK62
SA_DQ4
AH61
SA_DQ5
AH60
SA_DQ6
AK61
SA_DQ7
AK60
SA_DQ8
AM63
SA_DQ9
AM62
SA_DQ10
AP63
SA_DQ11
AP62
SA_DQ12
AM61
SA_DQ13
AM60
SA_DQ14
AP61
SA_DQ16
AP58
SA_DQ17
AR58
SA_DQ18
AM57
SA_DQ19
AK57
SA_DQ20
AL58
SA_DQ21
AK58
SA_DQ22
AR57
SA_DQ23
AN57
SA_DQ24
AP55
SA_DQ27
AK54 SA_DQ26
AM54
SA_DQ29
AK55
SA_DQ30
AR54
SA_DQ31
AN54
SA_DQ32
AY58
SA_DQ33
AW58
SA_DQ34
AY56
SA_DQ35
AW56
SA_DQ36
AV58
SA_DQ37
AU58
SA_DQ38
AV56
SA_DQ39
AU56
SA_DQ40
AY54
SA_DQ41
AW54
SA_DQ42
AY52
SA_DQ43
AW52
SA_DQ44
AV54
SA_DQ45
AU54
SA_DQ46
AV52
SA_DQ47
AU52
SA_DQ48
AK40
SA_DQ49
AK42
SA_DQ50
AM43
SA_DQ51
AM45
SA_DQ52
AK45
SA_DQ53
AK43
SA_DQ54
AM40
SA_DQ55
AM42
SA_DQ56
AM46
SA_DQ57
AK46
SA_DQ58
AM49
SA_DQ59
AK49
SA_DQ60
AM48
SA_DQ61
AK48
SA_DQ62
AM51
SA_DQ63
AK51
SA_DQ15
AP60
SA_CKE2 AY42
SA_CKE1 AW43
SA_CKE0 AU43
SA_CKE3 AY43
SA_CS#1 AR32
SA_CS#0 AP33
SA_ODT0 AP32
SA_RAS AY34
SA_CAS AU34
SA_WE AW34
SA_BA0 AU35
SA_BA1 AV35
SA_BA2 AY41
SA_MA1 AY37
SA_MA0 AU36
SA_MA2 AR38
SA_MA3 AP36
SA_MA4 AU39
SA_MA5 AR36
SA_MA7 AW39
SA_MA6 AV40
SA_MA9 AU40
SA_MA8 AY39
SA_MA11 AW41
SA_MA12 AU41
SA_MA10 AP35
SA_MA14 AV42
SA_MA13 AR35
SA_MA15 AU42
SA_DQSN0 AJ61
SA_DQSN2 AM58
SA_DQSN1 AN62
SA_DQSN3 AM55
SA_DQSN5 AV53
SA_DQSN4 AV57
SA_DQSN7 AL48
SA_DQSN6 AL43
SA_DQSP1 AN61
SA_DQSP0 AJ62
SA_DQSP4 AW57
SA_DQSP3 AN55
SA_DQSP2 AN58
SA_DQSP6 AL42
SA_DQSP5 AW53
SA_DQSP7 AL49
SM_VREF_CA AP49
SM_VREF_DQ1 AP51
SM_VREF_DQ0 AR51
RC21
1.82K_0402_1%
RC21
1.82K_0402_1%
12
RC24
24.9_0402_1%~D
RC24
24.9_0402_1%~D
12
CC10
0.022U_0402_16V7K
CC10
0.022U_0402_16V7K
1
2

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LOW = DESABLED (DEFAULT)
HIGH = ENABLED
FLASH DESCRIPTOR SECURITY OVERRIDE
High - Enable Internal VRs
Low - Enable External VRs
INTVRMEN - INTEGRATED SUS 1.05V VRM
ENABLE
CMOS setting
Shunt Clear CMOS
Keep CMOS
TPM setting
Shunt Clear ME RTC Registers
Keep ME RTC Registers
ME_CLR1
Open
CMOS_CLR1
Open
SATA HDD
SATA ODD
RTC Battery
W=20mils
W=20mils
CMOS place near DIMM
PCH Rx side need use strap pin to update PCIE +/-
within 500 mils
SATA Impedance Compensation
CAD note:
Place the resistor within 500 mils of the PCH. Avoid
routing next to clock pins.
reference FFRD sch 0.5
W=20mils
HDA for Codec
EMI depop location
For GCLK
PCH_AZ_SDOUT
PCH_INTVRMEN
INTRUDER#
PCH_RTCX2
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_RTCX1
PCH_JTAG_RST#
PCH_INTVRMEN
SRTCRST#
PCH_RTCRST#
PCH_AZ_BITCLK
PCH_AZ_SYNC
PCH_AZ_RST#
PCH_AZ_CODEC_SDIN0
PCH_AZ_SDOUT
PCH_GPIO37
PCH_JTAG_TCK
PCH_JTAG_JTAGX
PCH_GPIO37
PCH_GPIO35
ODD_DETECT#
SATA_ACT#
SATA_RCOMP
SATA_IREF
PCH_JTAG_TCK
PCH_JTAG_JTAGX
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_TMS
ODD_DETECT#
PCH_GPIO35
EC_SMI#
PCH_AZ_RST#
PCH_AZ_SYNC
PCH_AZ_SDOUT
PCH_AZ_BITCLK
PCH_RTCX1
ME_EN<30>
PCH_AZ_CODEC_SDIN0<22>
PCH_JTAG_TCK<6>
PCH_JTAG_TDI<6>
PCH_JTAG_TDO<6>
PCH_JTAG_TMS<6>
EC_SMI# <30>
SATA_PRX_DTX_P0_C <32>
SATA_PTX_DRX_N0_C <32>
SATA_PTX_DRX_P0_C <32>
SATA_PRX_DTX_N0_C <32>
SATA_PRX_DTX_P1_C <32>
SATA_PTX_DRX_N1_C <32>
SATA_PTX_DRX_P1_C <32>
SATA_PRX_DTX_N1_C <32>
SATA_ACT# <26>
PCH_JTAG_JTAGX<6>
PCH_JTAG_RST#<6>
ODD_DETECT# <32>
PCH_AZ_CODEC_RST#<22>
PCH_AZ_CODEC_SYNC<22>
PCH_AZ_CODEC_SDOUT<22>
PCH_AZ_CODEC_BITCLK<22>
PCH_RTCX1<29>
+RTCVCC
+3VS
+RTCVCC
+3VS
+1.05VS_ASATA3PLL
+1.05VS
+1.05VS
+CHGRTC
+RTCBATT
+RTCVCC
+3VLP
+CHGRTC
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
8 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
MCP(5/19) RTC,SATA,HDA,JTAG
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
8 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
MCP(5/19) RTC,SATA,HDA,JTAG
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
8 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
MCP(5/19) RTC,SATA,HDA,JTAG
RP48
51_8P4R_5%
RP48
51_8P4R_5%
1 8
2 7
3 6
4 5
R2356 33_0402_5%EMI@ R2356 33_0402_5%EMI@
1 2
RC8 1K_0402_5%RC8 1K_0402_5%
1 2
CC3 1U_0402_6.3V6KCC3 1U_0402_6.3V6K
1 2
RC135 51_0402_1%
@
RC135 51_0402_1%
@
12
RC130 1K_0402_1%
@
RC130 1K_0402_1%
@
12
YC1
32.768KHZ_12.5PF_Q13FC1350000
XTAL@
YC1
32.768KHZ_12.5PF_Q13FC1350000
XTAL@
12
R2357 33_0402_5%EMI@ R2357 33_0402_5%EMI@
1 2
JP12
JUMP_43X39
JP12
JUMP_43X39
11
2
2
CC26
1U_0603_10V6K
CC26
1U_0603_10V6K
1
2
RC2
330K_0402_1%
@
RC2
330K_0402_1%
@
12
SATAAUDIO
RTC
JTAG
HASWELL_MCP_E
Rev1p2
5 OF 19
UC1E
SATAAUDIO
RTC
JTAG
HASWELL_MCP_E
Rev1p2
5 OF 19
UC1E
INTVRMEN
AV7
SRTCRST
AV6
RTCRST
AU7
RTCX1
AW5
SATA_RN0/PERN6_L3 J5
SATA_RP0/PERP6_L3 H5
SATA_TN0/PETN6_L3 B15
SATA_TP0/PETP6_L3 A15
SATA_RP1/PERP6_L2 H8
SATA_RN1/PERN6_L2 J8
SATA_TN1/PETN6_L2 A17
SATA_TP1/PETP6_L2 B17
SATA_RP2/PERP6_L1 H6
SATA_RN2/PERN6_L1 J6
SATA_TN2/PETN6_L1 B14
SATA_TP2/PETP6_L1 C15
SATA_RN3/PERN6_L0 F5
SATA_RP3/PERP6_L0 E5
SATA_TN3/PETN6_L0 C17
SATA_TP3/PETP6_L0 D17
SATA0GP/GPIO34 V1
SATA1GP/GPIO35 U1
SATA2GP/GPIO36 V6
SATA3GP/GPIO37 AC1
SATA_IREF A12
SATA_RCOMP C12
INTRUDER
AU6 RTCX2
AY5
JTAGX
AE63
SATALED U3
I2S1_SCLK
AY8
RSVD
AV2
RSVD
AL11
RSVD
AC4
HDA_BCLK/I2S0_SCLK
AW8
HDA_SYNC/I2S0_SFRM
AV11
HDA_RST/I2S_MCLK
AU8
HDA_SDI0/I2S0_RXD
AY10
HDA_SDO/I2S0_TXD
AU11 HDA_SDI1/I2S1_RXD
AU12
HDA_DOCK_EN/I2S1_TXD
AW10
HDA_DOCK_RST/I2S1_SFRM
AV10
PCH_TRST
AU62
PCH_TCK
AE62
PCH_TDI
AD61
PCH_TDO
AE61
PCH_TMS
AD62 RSVD K10
RSVD L11
RC5 20K_0402_5%RC5 20K_0402_5%
1 2
ME1 SHORT PADS~D
@
ME1 SHORT PADS~D
@
1
122
R2358 33_0402_5%EMI@ R2358 33_0402_5%EMI@
1 2
CC5
27P_0402_50V8J
@EMI@
CC5
27P_0402_50V8J
@EMI@
1
2
RC126 0_0603_1%@RC126 0_0603_1%@
1 2
RC131 3.01K_0402_1%RC131 3.01K_0402_1%
1 2
RC1
330K_0402_1%
RC1
330K_0402_1%
12
CC4 1U_0402_6.3V6K
CC4 1U_0402_6.3V6K
1 2
CC1
15P_0402_50V8J
XTAL@
CC1
15P_0402_50V8J
XTAL@
1 2
CC2
15P_0402_50V8J
XTAL@CC2
15P_0402_50V8J
XTAL@
1 2
RC3 1K_0402_5%@RC3 1K_0402_5%@
1 2
RP37
10K_8P4R_5%
RP37
10K_8P4R_5%
1 8
2 7
3 6
4 5
RC4
10M_0402_5%
XTAL@
RC4
10M_0402_5%
XTAL@
12
CMOS1 SHORT PADS~D
@
CMOS1 SHORT PADS~D
@
1
122
RC6 20K_0402_5%RC6 20K_0402_5%
1 2
RC10
1K_0402_5%
RC10
1K_0402_5%
1 2
RC107
10K_0402_5%
RC107
10K_0402_5%
1 2
R2359 33_0402_5%EMI@ R2359 33_0402_5%EMI@
1 2
RC7 1M_0402_5%RC7 1M_0402_5%
1 2
DC1
BAT54CW_SOT323-3
DC1
BAT54CW_SOT323-3
2
3
1

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SPI ROM ( 8MByte )
EMI
MEM Bus : DDR/XDP/WLAN/TP
SML1 Bus : EC/Sensors
PN : SA000046400 ,64M,EN25Q64-104HIP
10/100 LAN ------->
dGPU--->
WLAN(Mini Card)--->
Place T183, T184, T185, T186 close to
PCH_SPI_MOSI_1
PCH_SPI_MISO_1
PCH_SPI_CLK_R
PCH_SPI_CS0#
near U2302
For GCLK
MEM_SMBDATA
MEM_SMBCLKLPC_LAD3
LPC_LAD1
LPC_LFRAME#
LPC_LAD2
LPC_LAD0
XTAL24_OUT
SML0CLK
SML0DATA
SML1_SMBCLK
SML1_SMBDATA
MEM_SMBCLK
MEM_SMBDATA
PCH_SMB_ALERT#
XTAL24_IN
SML1_SMBCLK
SML1_SMBDATA
CLK_BIASREF
PCH_SPI_CLKPCH_SPI_CLK_R
PCH_SPI_MOSI_1
PCH_SPI_MISO_1
PCH_SPI_WP1#
PCH_SPI_HOLD1#
PCH_SPI_MOSI
PCH_SPI_MISO
PCH_SPI_CS0#
PCH_SPI_WP#
PCH_SPI_HOLD#
PCH_SPI_MISO_1
PCH_SPI_MOSI_1
PCH_SPI_HOLD1#
PCH_SPI_CLK_R
PCH_SPI_CS0#
PCH_SPI_WP1#
MEM_SMBCLK
MEM_SMBDATA
SML1_SMBCLK
SML1_SMBDATA
PCH_HOT#
CLKOUT_LPC0
SML0CLK
SML0DATA
CLK_PCIE_LAN#
CLK_PCIE_LAN
CLK_PEG_VGA#
CLK_PEG_VGA
CLK_PCIE_WLAN#
CLK_PCIE_WLAN
EC_SPI_MISO_1
EC_SPI_MOSI_1
EC_SPI_CS0#
EC_SPI_CLK_R
XTAL24_IN
LPC_LAD0<30>
LPC_LAD1<30>
LPC_LAD2<30>
LPC_LAD3<30>
LPC_LFRAME#<30>
DDR_XDP_WLAN_TP_SMBDAT <17,18,19,26,27,6>
DDR_XDP_WLAN_TP_SMBCLK <17,18,19,26,27,6>
EC_SMB_CK2 <19,30,49>
EC_SMB_DA2 <19,30,49>
PCH_HOT# <30>
CLK_PCI_LPC <30>
CLK_CPU_ITP# <6>
CLK_CPU_ITP <6>
CLK_PCIE_LAN<21>
CLK_PCIE_LAN#<21>
LAN_CLKREQ#<21>
CLK_PCIE_WLAN<26>
CLK_PCIE_WLAN#<26>
WLAN_CLKREQ#<26>
CLK_PEG_VGA<48>
CLK_PEG_VGA#<48>
PEG_CLKREQ#<49>
EC_SPI_MISO_1<30>
EC_SPI_MOSI_1<30>
EC_SPI_CS0#<30>
EC_SPI_CLK_R<30>
XTAL24_IN<29>
+3VS
+1.05VS_AXCK_LCPLL
+3VS
+3VS
+3VALW_PCH
+3VS
+3VALW_PCH
+3VS
+3VALW_PCH
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
9 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
MCP(6,7/19) CLK,SMB,SPI,LPC
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
9 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
MCP(6,7/19) CLK,SMB,SPI,LPC
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
9 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
MCP(6,7/19) CLK,SMB,SPI,LPC
G
S
D
QH1B
DMN66D0LDW-7_SOT363-6
G
S
D
QH1B
DMN66D0LDW-7_SOT363-6
61
2
S
GD
QC1A
DMN66D0LDW-7_SOT363-6
S
GD
QC1A
DMN66D0LDW-7_SOT363-6
5
3 4
C2327
0.1U_0402_10V7K
C2327
0.1U_0402_10V7K
1 2
R2333
15_0402_1%
EMI@
R2333
15_0402_1%
EMI@
1 2
R2331
10K_0402_5%
R2331
10K_0402_5%
12
T97@T97@
R2332
10K_0402_5%
R2332
10K_0402_5%
12
R2336
22_0402_5%
EMI@
R2336
22_0402_5%
EMI@
12
T186PAD~D @T186PAD~D @
RC12
1M_0402_5%
XTAL@
RC12
1M_0402_5%
XTAL@
1 2
SPI C-LINK
SMBUS
LPC
HASWELL_MCP_E
Rev1p2
7 OF 19
UC1G
SPI C-LINK
SMBUS
LPC
HASWELL_MCP_E
Rev1p2
7 OF 19
UC1G
LAD0
AU14
LAD1
AW12
LAD2
AY12
LAD3
AW11
LFRAME
AV12
SPI_CS0
Y7 SPI_CLK
AA3
SPI_CS1
Y4
SPI_CS2
AC2
SPI_MOSI
AA2
SPI_MISO
AA4
SPI_IO2
Y6
SPI_IO3
AF1
SMBALERT/GPIO11 AN2
SMBCLK AP2
SML0ALERT/GPIO60 AL2
SMBDATA AH1
SML0CLK AN1
SML0DATA AK1
SML1ALERT/PCHHOT/GPIO73 AU4
SML1DATA/GPIO74 AH3
SML1CLK/GPIO75 AU3
CL_CLK AF2
CL_DATA AD2
CL_RST AF4
RP49
1K_0804_8P4R_5%
RP49
1K_0804_8P4R_5%
1 8
2 7
3 6
4 5
R2334 1K_0402_1%R2334 1K_0402_1%
1 2
R2335 1K_0402_1% R2335 1K_0402_1%
1 2
HASWELL_MCP_E
CLOCK
SIGNALS
Rev1p2
6 OF 19
UC1F
HASWELL_MCP_E
CLOCK
SIGNALS
Rev1p2
6 OF 19
UC1F
PCIECLKRQ0/GPIO18
U2
CLKOUT_PCIE_N1
B41
CLKOUT_PCIE_P1
A41
PCIECLKRQ1/GPIO19
Y5
CLKOUT_ITPXDP_P A35
CLKOUT_ITPXDP_N B35
CLKOUT_LPC_1 AP15
CLKOUT_LPC_0 AN15
XTAL24_OUT B25
XTAL24_IN A25
PCIECLKRQ5/GPIO23
T2 CLKOUT_PCIE_P5
A37 CLKOUT_PCIE_N5
B37
PCIECLKRQ4/GPIO22
U5
CLKOUT_PCIE_N4
A39
CLKOUT_PCIE_P4
B39
PCIECLKRQ3/GPIO21
N1 CLKOUT_PCIE_P3
C37 CLKOUT_PCIE_N3
B38
PCIECLKRQ2/GPIO20
AD1
CLKOUT_PCIE_N2
C41
CLKOUT_PCIE_P2
B42
CLKOUT_PCIE_P0
C42 CLKOUT_PCIE_N0
C43
DIFFCLK_BIASREF C26
RSVD K21
RSVD M21
TESTLOW _C35 C35
TESTLOW _C34 C34
TESTLOW _AK8 AK8
TESTLOW _AL8 AL8
CC7
15P_0402_50V8J
XTAL@
CC7
15P_0402_50V8J
XTAL@
12
RP39
15_8P4R_5%
RP39
15_8P4R_5%
1 8
2 7
3 6
4 5
U2302
64M EN25Q64-104HIP SOP 8P
U2302
64M EN25Q64-104HIP SOP 8P
CS#
1
DO(IO1)
2
WP#(IO2)
3
GND
4
VCC 8
HOLD#(IO3) 7
CLK 6
DI(IO0) 5
R2330
10K_0402_5%
R2330
10K_0402_5%
12
RP40
2.2K_0804_8P4R_5%
RP40
2.2K_0804_8P4R_5%
1 8
2 7
3 6
4 5
C2326
68P_0402_50V8J
@EMI@
C2326
68P_0402_50V8J
@EMI@
1
2
YC2
24MHZ_12PF_X3G024000DC1H
XTAL@
YC2
24MHZ_12PF_X3G024000DC1H
XTAL@
1
2
3
4
RP41 10K_8P4R_5%RP41 10K_8P4R_5%
1 8
2 7
3 6
4 5
T185PAD~D @T185PAD~D @
T99@T99@
G
S
D
QC1B
DMN66D0LDW-7_SOT363-6
G
S
D
QC1B
DMN66D0LDW-7_SOT363-6
6 1
2
R2329
10K_0402_5%
R2329
10K_0402_5%
12
RC13
3.01K_0402_1%
RC13
3.01K_0402_1%
1 2
CC6
15P_0402_50V8J
XTAL@
CC6
15P_0402_50V8J
XTAL@
12
S
G
D
QH1A
DMN66D0LDW-7_SOT363-6
S
G
D
QH1A
DMN66D0LDW-7_SOT363-6
5
34
T184PAD~D @T184PAD~D @
T183PAD~D @T183PAD~D @
T98@T98@
RP42
10K_8P4R_5%
RP42
10K_8P4R_5%
1 8
2 7
3 6
4 5

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
HIGH = ENABLED (DEFAULT)
LOW = DISABLED
DSWODVREN - ON DIE DSW VR ENABLE
*
PCH_BATLOW# Need pull high to VCCDSW3_3
(If no deep Sx , connect to VCCSUS3_3)
Note: SUSACK# and SUSWARN# can be tied together if
EC does not want to involve in the handshake mechanism
for the Deep Sleep state entry and exit
CAN be NC ,if not support Deep Sx DPWROK: Tired toghter with RSMRST#
that do not support Deep Sx
DSWODVREN - On Die DSW VR Enable
H Enable(DEFAULT)
L Disable
eDP HPD INVERSION
Reserve for eDP
symbol OK
Place CC31
on BOT
Place CC33
close to UC3.1 & UC3.2
Place CC34
close to RP50.2&RP50.3
PCH_DPWROK
ME_SUS_PWR_ACK_R SUSACK#
PCH_BATLOW#
PBTN_OUT#
AC_PRESENT
SYS_RESET#
CLKRUN#
SYS_PWROK_R
CLKRUN#
SUS_STAT#/LPCPD#
PCH_PWROK_R
AC_PRESENT
SUS_STAT#/LPCPD#
SIO_SLP_S4#
PM_APWROK_R
SUSCLK
SIO_SLP_S3#
SIO_SLP_S5#
PCH_BATLOW#
PCH_PLTRST#
ME_SUS_PWR_ACK
SUSACK#
PCIE_WAKE#_R
PCH_DPWROK
SIO_SLP_S0#
DSWODVREN
SYS_PWROK
PLT_RST#
PCIE_WAKE#PCIE_WAKE#_R
CPU_DPB_CTRLDAT
CPU_DPB_CTRLCLK
CPU_DPC_CTRLDAT
CPU_DPC_CTRLCLK
CPU_DPC_AUX#
CPU_DPB_AUX#
DGPU_PWROK
DGPU_HOLD_RST#
DPC_HPD
PXS_PWREN
DGPU_HOLD_RST#
CPU_DPB_CTRLCLK
CPU_DPB_CTRLDAT
CODEC_IRQ
EDP_BIA_PWM
EDP_BKLCTLEDP_BIA_PWM
CPU_DPC_CTRLCLK
CPU_DPC_CTRLDAT
CPU_DPB_AUX#
ENVDD_PCH
CPU_DPC_AUX
CPU_DPB_AUX
DPB_HPD
CPU_DPC_AUX#
PANEL_BKLEN
ENVDD_PCH
TOUCHPAD_INTR#
CPU_DPC_AUX
CPU_DPB_AUX
CPU_EDP_HPD#
TOUCH_RST_N_GYRO_INT1
TOUCH_RST_N_GYRO_INT1
CODEC_IRQ
TOUCHPAD_INTR#
DGPU_PWROK
CPU_EDP_HPD#
DPC_HPD
CPU_EDP_HPD#EDP_CPU_HPD
CPU_EDP_HPD#
SUSACK# SUSACK#_R
PCH_PLTRST#
PCH_RSMRST#_R
PCH_RSMRST#_R
ME_SUS_PWR_ACK_R
SYS_PWROK
PCH_PLTRST#
PCH_PWROK
PLT_RST# <21,26,30,48,6>
SIO_SLP_S0#<30>
SIO_SLP_S4# <30>
SIO_SLP_S3# <30>
ACIN<30,36,37,49>
EC_RSMRST#<30>
ME_SUS_PWR_ACK<30>
SIO_SLP_S5# <30>
PCH_PWROK<30>
SYS_RESET#<6>
SYS_PWROK<30,6>
PBTN_OUT#<30,6>
PCH_DPWROK <30>
PCIE_WAKE# <21,30>
DPB_HPD <20>
CPU_DPB_CTRLDAT <20>
CPU_DPB_CTRLCLK <20>
DGPU_HOLD_RST#<48>
PANEL_BKLEN<30>
EDP_BIA_PWM<19,6>
ENVDD_PCH<19,30>
PXS_PWREN<11,39,43,44,50>
DGPU_PWROK<30,44>
SUSACK#<30>
EDP_CPU_HPD<19>
+3VALW_PCH
+3VS
+3VALW_PCH
+RTCVCC
+3VS
+3VS
+VCCIOA_OUT
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
10 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
MCP(8,9/19) DDI,EDP,GPIO
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
10 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
MCP(8,9/19) DDI,EDP,GPIO
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
10 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
MCP(8,9/19) DDI,EDP,GPIO
RC73 10K_0402_5%RC73 10K_0402_5%
1 2
RP51
100K_8P4R_5%
RP51
100K_8P4R_5%
1 8
2 7
3 6
4 5
CC34
0.047U_0402_16V4Z
ESD@CC34
0.047U_0402_16V4Z
ESD@
1
2
RC42 0_0402_1%@RC42 0_0402_1%@
1 2
T103 PAD~D@T103 PAD~D@
RP50
0_8P4R_5%
RP50
0_8P4R_5%
1 8
2 7
3 6
4 5
RC76 10K_0402_5%RC76 10K_0402_5%
1 2
RC87 100K_0402_5%@RC87 100K_0402_5%@
1 2
T107@T107@
DH1 RB751V-40_SOD323-2DH1 RB751V-40_SOD323-2
1 2
RC35 0_0402_5%@RC35 0_0402_5%@
1 2
RC29 10K_0402_5%@RC29 10K_0402_5%@
1 2
RC31 8.2K_0402_5%RC31 8.2K_0402_5%
1 2
RC89
100K_0402_5%
RC89
100K_0402_5%
1 2
RC37 0_0402_5%@RC37 0_0402_5%@
1 2
RC28 10K_0402_5%@RC28 10K_0402_5%@
1 2
RC74 10K_0402_5%RC74 10K_0402_5%
1 2
RC36 8.2K_0402_5%RC36 8.2K_0402_5%
1 2
R159
100K_0402_5%
R159
100K_0402_5%
12
T117 @T117 @
RC75 10K_0402_5%
@
RC75 10K_0402_5%
@
1 2
RP52
2.2K_8P4R_5%
RP52
2.2K_8P4R_5%
1 8
2 7
3 6
4 5
RC33 0_0402_1%
@
RC33 0_0402_1%
@
1 2
CC11
0.1U_0402_10V7K
@CC11
0.1U_0402_10V7K
@
1 2
R2337 330K_0402_5%R2337 330K_0402_5%
1 2
CC33
0.047U_0402_16V4Z
ESD@CC33
0.047U_0402_16V4Z
ESD@
1
2
T104 PAD~D @
T104 PAD~D @
T102 PAD~D@T102 PAD~D@
RC105
0_0402_5%
RC105
0_0402_5%
1 2
SYSTEM POWER MANAGEMENT
HASWELL_MCP_E
Rev1p2
8 OF 19
UC1H
SYSTEM POWER MANAGEMENT
HASWELL_MCP_E
Rev1p2
8 OF 19
UC1H
SUSACK
AK2
PLTRST
AG7
PCH_PWROK
AY7 SYS_PWROK
AG2 SYS_RESET
AC3
APWROK
AB5
RSMRST
AW6
ACPRESENT/GPIO31
AJ8
BATLOW /GPIO72
AN4
PWRBTN
AL7 SUSW ARN/SUSPW RDNACK/GPIO30
AV4
SLP_S0
AF3
SLP_W LAN/GPIO29
AM5
DPWROK AV5
DSWVRMEN AW7
WAKE AJ5
SUS_STAT/GPIO61 AG4
CLKRUN/GPIO32 V5
SUSCLK/GPIO62 AE6
SLP_S4 AJ6
SLP_S5/GPIO63 AP5
SLP_S3 AT4
SLP_LAN AJ7
SLP_SUS AP4
SLP_A AL5
RC84
100K_0402_5%
RC84
100K_0402_5%
12
RC88 1K_0402_1%@RC88 1K_0402_1%@
12
UC3
MC74VHC1G08DFT2G_SC70-5
UC3
MC74VHC1G08DFT2G_SC70-5
IN1
1
IN2
2OUT 4
VCC 5
GND
3
CC31
0.047U_0402_16V4Z
ESD@CC31
0.047U_0402_16V4Z
ESD@
1
2
RC78
10K_0402_5%
@RC78
10K_0402_5%
@
12
RC27 10K_0402_5%RC27 10K_0402_5%
1 2
G
D
S
QC3
2N7002K_SOT23-3
@
G
D
S
QC3
2N7002K_SOT23-3
@
2
13
DISPLAY
GPIO
eDP SIDEBAND
HASWELL_MCP_E
Rev1p2
9 OF 19
UC1I
DISPLAY
GPIO
eDP SIDEBAND
HASWELL_MCP_E
Rev1p2
9 OF 19
UC1I
EDP_BKLCTL
B8
DDPB_AUXN C5
DDPC_HPD A8
EDP_HPD D6
DDPB_HPD C8
DDPC_CTRLDATA D11
DDPC_CTRLCLK D9
DDPB_CTRLDATA C9
DDPB_CTRLCLK B9
PIRQA/GPIO77
U6
PIRQB/GPIO78
P4
PIRQC/GPIO79
N4
PIRQD/GPIO80
N2
PME
AD4
GPIO55
U7
GPIO52
L1
GPIO54
L3
GPIO51
R5
GPIO53
L4
EDP_BKLEN
A9
DDPB_AUXP B5
DDPC_AUXP A6
DDPC_AUXN B6
EDP_VDDEN
C6
RC41 0_0402_1%@RC41 0_0402_1%@
1 2
RC34 10K_0402_5%RC34 10K_0402_5%
1 2
RC32 10K_0402_5%RC32 10K_0402_5%
1 2
RC81
0_0402_1%
@
RC81
0_0402_1%
@
12
T105@T105@
R2338 330K_0402_5%@R2338 330K_0402_5%@
1 2
RC97
0_0402_5%
@
RC97
0_0402_5%
@
1 2
RC77 10K_0402_5%RC77 10K_0402_5%
1 2
T106@T106@

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
HIGH
LOW(DEFAULT)
NO REBOOT STRAP
HIGH
LOW(DEFAULT)
BOOT BIOS STRAP BIT BBS
LPC
SPI
HIGH
LOW(DEFAULT)
TLS CONFIDENTIALITY
HIGH depop RC288 (DEFAULT)
LOW pop RC288
TOP-BLOCK SWAP OVERRIDE
GPIO66 GPIO86 GPIO15 GPIO81
GPIO15 NOT Used
"KB_DET#" for OAK 17 only
ESD solution
Close to R2346
PCH_AUDIO_EN
LCD_CBL_DET#
LCD_CBL_DET#
I2C1_SDA_TCH_PAD
I2C1_SCL_TCH_PAD
SERIRQ
KB_DET#
PCH_GPIO44
HDA_SPKR
I2C0_SDA
I2C0_SCL
BBS_BIT
PCH_OPI_COMP
PCH_GPIO66
SLATE_MODE_R
SLATE_MODE_R
HOST_ALERT1_R_N
SIO_EXT_SCI#
KB_RST#
PCH_AUDIO_EN
PCH_GPIO9
PCH_GPIO66
CPPE#
CPUSB#
CPPE#
CPUSB#
PCH_GPIO46
PCH_GPIO44
PCH_GPIO48
PCH_GPIO49
TOUCH_PANEL_INTR#
SERIRQ
PCH_GPIO14
PCH_GPIO46
PCH_GPIO9
BBS_BIT
SIO_EXT_SCI#
HDA_SPKR
BT_ON#
DEVSLP0
H_THERMTRIP#
I2C0_SCL
I2C0_SDA
I2C1_SCL_TCH_PAD
I2C1_SDA_TCH_PAD
KB_RST#
TOUCH_PANEL_INTR#
ODD_DA#
BT_ON#
WL_OFF#
EC_SCI#
WL_OFF#
PXS_PWREN
EC_LID_OUT#
ODD_EN#
ODD_DA#
HDD_DET#
HDD_DET#
KB_DET#
HOST_ALERT1_R_N
DGPU_PRSNT#
Project_ID
PCH_GPIO25
PCH_GPIO47
PCH_GPIO85
PCH_GPIO84
PCH_GPIO83
PCH_GPIO89
PCH_GPIO90
PCH_GPIO93
PCH_GPIO94
PCH_GPIO12
DEVSLP0
SERIRQ <30>
HDA_SPKR<22>
KB_RST# <30>
BT_ON#<26>
EC_SCI#<30>
WL_OFF#<26>
PXS_PWREN <10,39,43,44,50>
EC_LID_OUT#<30>
ODD_EN#<32>
ODD_DA#<32>
HDD_DET#<32>
KB_DET#<32>
DEVSLP0<32>
+3VS
+3VALW_PCH
+1.05VS
+3VS
+3VALW_PCH
+3VS
+3VALW_PCH
+3VS +3VS
+3VALW_PCH
+3VS
+3VS+3VS
+1.05VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
11 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
MCP(10/19) GPIO,LPIO,MISC
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
11 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
MCP(10/19) GPIO,LPIO,MISC
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
11 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
MCP(10/19) GPIO,LPIO,MISC
RC123
1K_0402_5%
RC123
1K_0402_5%
12
RC110 10K_0402_5%RC110 10K_0402_5%
12
RC104 10K_0402_5%RC104 10K_0402_5%
12
R2346
1K_0402_5%
R2346
1K_0402_5%
12
T178PAD~D @T178PAD~D @
RP43
10K_8P4R_5%
RP43
10K_8P4R_5%
18
27
36
45
RC119
10K_0402_5%
@
RC119
10K_0402_5%
@
12
T174 PAD~D@T174 PAD~D@
T179PAD~D @T179PAD~D @
RC98 100K_0402_5%RC98 100K_0402_5%
12
RC113
10K_0402_5%
VENUS@
RC113
10K_0402_5%
VENUS@
12
RC116 10K_0402_5%RC116 10K_0402_5%
12
RC99
10K_0402_5%
DIS@
RC99
10K_0402_5%
DIS@
12
RC122
1K_0402_5%
@
RC122
1K_0402_5%
@
12
LPIO
GPIO
CPU/
HASWELL_MCP_E
MISC
Rev1p2
10 OF 19
UC1J
LPIO
GPIO
CPU/
HASWELL_MCP_E
MISC
Rev1p2
10 OF 19
UC1J
GPIO56
AG6
GPIO57
AP1
GPIO27
AN5
GPIO28
AD7
GPIO26
AN3
SDIO_D1/GPIO67 E4
SDIO_D2/GPIO68 C3
SDIO_D3/GPIO69 E2
SDIO_D0/GPIO66 D3
SDIO_CLK/GPIO64 E3
SDIO_CMD/GPIO65 F4
I2C1_SCL/GPIO7 F1
I2C1_SDA/GPIO6 G4
I2C0_SCL/GPIO5 F3
I2C0_SDA/GPIO4 F2
UART1_RST/GPIO2 J3
UART1_CTS/GPIO3 J4
UART1_RXD/GPIO0 K4
UART1_TXD/GPIO1 G2
UART0_CTS/GPIO94 G1
UART0_TXD/GPIO92 K3
UART0_RTS/GPIO93 J2
UART0_RXD/GPIO91 J1
GSPI1_MISO/GPIO89 N7
GSPI_MOSI/GPIO90 K2
GSPI1_CLK/GPIO88 L5
GSPI1_CS/GPIO87 R7
GSPI0_MOSI/GPIO86 L8
GSPI0_CLK/GPIO84 L6
GSPI0_MISO/GPIO85 N6
GSPI0_CS/GPIO83 R6
RCIN/GPIO82 V4
THERMTRIP D60
DEVSLP2/GPIO39
N5
SPKR/GPIO81
V2
DEVSLP1/GPIO38
L2 SDIO_POW ER_EN/GPIO70
C4 DEVSLP0/GPIO33
P2
GPIO9
AM3
GPIO10
AM2
GPIO45
AG5
GPIO46
AG3
GPIO14
AH4
GPIO25
AM4
GPIO13
AT3 HSIOPC/GPIO71
Y2 GPIO50
P3 GPIO49
Y3
GPIO47
AB6
GPIO48
U4
GPIO59
AT5
GPIO16
Y1
GPIO17
T3
GPIO15
AD6
GPIO8
AU2
GPIO24
AD5
BMBUSY/GPIO76
P1
GPIO44
AK4
GPIO58
AL4
LAN_PHY_PWR_CTRL/GPIO12
AM7 SERIRQ T4
PCH_OPI_RCOMP AW15
RSVD AF20
RSVD AB21
RC11 10K_0402_5%RC11 10K_0402_5%
12
RC108100K_0402_5% RC108100K_0402_5%
12
RC124
10K_0402_5%
RC124
10K_0402_5%
12
RP54
8.2K_8P4R_5%
RP54
8.2K_8P4R_5%
18
27
36
45
T181PAD~D @T181PAD~D @
T126 PAD~D@T126 PAD~D@
RC111100K_0402_5% RC111100K_0402_5%
12
RC112
10K_0402_5%
SUN@
RC112
10K_0402_5%
SUN@
12
RC101
49.9_0402_1%
RC101
49.9_0402_1%
1 2
RC118
1K_0402_5%
@
RC118
1K_0402_5%
@
12
T175PAD~D @T175PAD~D @
T180PAD~D @T180PAD~D @
T127 PAD~D@T127 PAD~D@
RC121
1K_0402_5%
@
RC121
1K_0402_5%
@
12
T124 PAD~D@T124 PAD~D@
CC28
100P_0402_50V8J
ESD@
CC28
100P_0402_50V8J
ESD@
1
2
RC10210K_0402_5% RC10210K_0402_5%
12
RP53
2.2K_0804_8P4R_5%
RP53
2.2K_0804_8P4R_5%
1 8
2 7
3 6
4 5
T177PAD~D @T177PAD~D @
RC125
10K_0402_5%
RC125
10K_0402_5%
12
T125 PAD~D@T125 PAD~D@
RC100
10K_0402_5%
UMA@
RC100
10K_0402_5%
UMA@
12
T176PAD~D @T176PAD~D @
RC103 10K_0402_5%RC103 10K_0402_5%
12
RC120
1K_0402_5%
@
RC120
1K_0402_5%
@
12
RC10610K_0402_5% RC10610K_0402_5%
12
T182 PAD~D@T182 PAD~D@
RC9 100K_0402_5%RC9 100K_0402_5%
12

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
WLAN (Mini Card)
10/100 LAN
CAD NOTE:
Route single-end 50-ohms and max 500-mils length.
Avoid routing next to clock pins or under stitching capacitors.
Recommended minimum spacing to other signal traces is 15 mils.
USB Conn JUSB2
USB Conn JUSB1
USB Conn JUSB3
USB Conn 4 (DB)
Mini Card (WLAN)
Card Reader
Camera
USB Conn JUSB2
USB Conn JUSB1
Touch screen panel "USB20_TOUCH_N5/USB20_TOUCH_P5"
for OAK 15 only
USB_OC0#
USB_OC2#
USB_OC3#
PCIE_PTX_WLANRX_N4
PCIE_PRX_WLANTX_P4
PCIE_PRX_WLANTX_N4
PCIE_PTX_WLANRX_P4
USB20_JUSB3_N2
USB20_JUSB3_P2
USB20_USBDB_P3
USB20_USBDB_N3
USB20_MINI1_P4
USB20_MINI1_N4
USB20_CAM_P7
USB20_CAM_N7
USB20_CR_N6
USB20_CR_P6
USB20_JUSB1_P1
USB20_JUSB1_N1
USB_OC0#
USB_OC1#
USB_OC2#
USB3RN2_JUSB1
USB3RP2_JUSB1
USB3TN2_JUSB1
USB3TP2_JUSB1
USB3RN1_JUSB2
USB3RP1_JUSB2
USB3TN1_JUSB2
USB3TP1_JUSB2
PCH_PCIE_RCOMP
PCIE_PRX_LANTX_P3
PCIE_PRX_LANTX_N3
USB_OC1#
USB20_JUSB2_N0
USB20_JUSB2_P0
USB_OC3#
USBRBIAS
PEG_CTX_GRX_C_N0
PEG_CRX_GTX_N3
PEG_CRX_GTX_P3
PEG_CRX_GTX_N0
PEG_CTX_GRX_C_N1PEG_CTX_GRX_N1
PEG_CTX_GRX_C_P1PEG_CTX_GRX_P1
PEG_CTX_GRX_C_N2PEG_CTX_GRX_N2
PEG_CTX_GRX_C_P2PEG_CTX_GRX_P2
PEG_CRX_GTX_N1
PEG_CRX_GTX_P1
PEG_CRX_GTX_P0
PEG_CTX_GRX_C_P0
PEG_CTX_GRX_C_N3PEG_CTX_GRX_N3
PEG_CTX_GRX_C_P3PEG_CTX_GRX_P3
PEG_CRX_GTX_N2
PEG_CRX_GTX_P2
PEG_CTX_GRX_P0
PCIE_PTX_LANRX_N3
PCIE_PTX_LANRX_P3
PCIE_PTX_LANRX_N3_C
PCIE_PTX_LANRX_P3_C
USB20_TOUCH_P5
USB20_TOUCH_N5
PEG_CTX_GRX_N0
PCIE_PRX_LANTX_N3<21>
PCIE_PRX_LANTX_P3<21>
PCIE_PRX_WLANTX_N4<26>
PCIE_PRX_WLANTX_P4<26>
PCIE_PTX_WLANRX_N4<26>
PCIE_PTX_WLANRX_P4<26>
USB_OC0# <24>
USB20_JUSB2_N0 <24>
USB20_JUSB2_P0 <24>
USB20_JUSB1_N1 <24>
USB20_JUSB1_P1 <24>
USB20_JUSB3_N2 <25>
USB20_JUSB3_P2 <25>
USB20_USBDB_N3 <25>
USB20_USBDB_P3 <25>
USB20_MINI1_N4 <26>
USB20_MINI1_P4 <26>
USB20_CR_N6 <23>
USB20_CR_P6 <23>
USB20_CAM_N7 <31>
USB20_CAM_P7 <31>
USB3RN1_JUSB2 <24>
USB3TN1_JUSB2 <24>
USB3TN2_JUSB1 <24>
USB3RP1_JUSB2 <24>
USB3RP2_JUSB1 <24>
USB3TP2_JUSB1 <24>
USB3TP1_JUSB2 <24>
USB3RN2_JUSB1 <24>
USB_OC1# <25>
PEG_CRX_GTX_N3<48>
PEG_CRX_GTX_P3<48>
PEG_CTX_GRX_N0<48>
PEG_CTX_GRX_P0<48>
PEG_CRX_GTX_N0<48>
PEG_CTX_GRX_N1<48>
PEG_CTX_GRX_P1<48>
PEG_CTX_GRX_N2<48>
PEG_CTX_GRX_P2<48>
PEG_CRX_GTX_N1<48>
PEG_CRX_GTX_P1<48>
PEG_CTX_GRX_N3<48>
PEG_CTX_GRX_P3<48>
PEG_CRX_GTX_N2<48>
PEG_CRX_GTX_P2<48>
PEG_CRX_GTX_P0<48>
PCIE_PTX_LANRX_N3<21>
PCIE_PTX_LANRX_P3<21>
USB20_TOUCH_N5
USB20_TOUCH_P5
+1.05VS_AUSB3PLL
+3VALW_PCH
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
12 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
MCP(11/19) PCIE,USB
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
12 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
MCP(11/19) PCIE,USB
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
12 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
MCP(11/19) PCIE,USB
CC22 0.1U_0402_10V7KDIS@ CC22 0.1U_0402_10V7KDIS@
12
RC90
22.6_0402_1%~D
RC90
22.6_0402_1%~D
12
CC23 0.1U_0402_10V7KDIS@ CC23 0.1U_0402_10V7KDIS@
12
T121PAD~D@T121PAD~D@
CC24 0.1U_0402_10V7KDIS@ CC24 0.1U_0402_10V7KDIS@
12
RP55
10K_8P4R_5%
RP55
10K_8P4R_5%
1 8
2 7
3 6
4 5
RC91
3.01K_0402_1%
RC91
3.01K_0402_1%
1 2
CC32 0.1U_0402_10V7KCC32 0.1U_0402_10V7K
1 2
T119PAD~D @T119PAD~D @
T118PAD~D @T118PAD~D @
CC20 0.1U_0402_10V7KDIS@ CC20 0.1U_0402_10V7KDIS@
12
PCIe
USB
HASWELL_MCP_E
Rev1p2
11 OF 19
UC1K
PCIe
USB
HASWELL_MCP_E
Rev1p2
11 OF 19
UC1K
PETP5_L2
C21
PERP5_L0
E10
PERN5_L1
F8
PETN5_L3
B22
PETP5_L3
A21
PERP3
F11
PETN3
C29
PETN1/USB3TN3
C30
OC3/GPIO43 AV3
OC2/GPIO42 AH2
OC1/GPIO41 AT1
OC0/GPIO40 AL3
PCIE_RCOMP
A27
PCIE_IREF
B27
PERN5_L0
F10
PERN5_L2
H10
PERP5_L2
G10
PETN5_L2
B21
PERP5_L3
F6 PERN5_L3
E6
PETP3
B30
PERN4
F13
PERP4
G13
PETP4
A29 PETN4
B29
PERP1/USB3RP3
F17
PETP1/USB3TP3
C31
PERN2/USB3RN4
F15
PETN2/USB3TN4
B31
PERP2/USB3RP4
G15
USB2N0 AN8
USB2N1 AR7
USB2N2 AR8
USB2P2 AP8
USB2N3 AR10
USB2P3 AT10
USB2N4 AM15
USB2P4 AL15
USB2P6 AN11
USB2N5 AM13
USB2P5 AN13
USB2N6 AP11
USB2P7 AP13
USB2N7 AR13
USB3TN2 B33
USB3TP2 A33
USB3RP2 F18
USB3RN2 E18
USB3TN1 C33
USB3TP1 B34
USB3RP1 H20
USB3RN1 G20
PETP5_L1
A23 PETN5_L1
B23
PERP5_L1
E8
USBRBIAS AJ11
USBRBIAS AJ10
PETP5_L0
C22 PETN5_L0
C23
PERN3
G11
USB2P0 AM8
USB2P1 AT7
PERN1/USB3RN3
G17
PETP2/USB3TP4
A31
RSVD
E15
RSVD
E13
RSVD AN10
RSVD AM10
CC19 0.1U_0402_10V7KDIS@ CC19 0.1U_0402_10V7KDIS@
12
CC25 0.1U_0402_10V7KDIS@ CC25 0.1U_0402_10V7KDIS@
12
CC21 0.1U_0402_10V7KDIS@ CC21 0.1U_0402_10V7KDIS@
12
CC40 0.1U_0402_10V7KCC40 0.1U_0402_10V7K
1 2
T120PAD~D@T120PAD~D@
CC18 0.1U_0402_10V7KDIS@ CC18 0.1U_0402_10V7KDIS@
12

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
RF
SVID DATA
Define EC OD pin, need double confirm.
SVID ALERT
Place the PU
resistors close to CPU
Place the PU
resistors close to CPU
CAD Note: PD resistor on HW side
CAD Note: PU resistor on HW side
R253
INTEL Check list , XDP use only
+1.35V : 470UF/2V/7343 *2 (PWR)
10UF/6.3V/0603 * 6
2.2UF/6.3V/0402 * 4
VDDQ DECOUPLING
SVID_DAT need to pull-up double side
( PWR_VR & CPU )
ESD solution
Place C80
close to R250.1
Place C79
between R286 and UC1
H_CPU_SVIDCLK
VCCST_PG_EC
+VCCIO_OUT_R
VCCST_PG_EC
VR12.5_VR_ON_R
CPU_PWR_DEBUG#
H_CPU_SVIDALRT#
H_CPU_SVIDDATA
VCCSENSE
H_CPU_SVIDALRT#
H_CPU_SVIDDATA
CPU_PWR_DEBUG#
VSSSENSE
VCCSENSE
H_CPU_SVIDCLK
VR_READY_R
VR_ON
VCCST_PG_EC
VCCST_PG_EC<30>
VR_SVID_CLK<42>
VR_ON<30,42>
VR_SVID_ALRT#<42>
VSSSENSE<15,42>
VCCSENSE<42>
H_VR_READY<42>
VR_SVID_DAT<42>
CPU_PWR_DEBUG#<6>
+1.05VS
+CPU_CORE
+VCCIOA_OUT
+CPU_CORE
+1.35V
+CPU_CORE
+1.35V
+VCCIO_OUT
+1.05VS
+1.05VS
+CPU_CORE
+1.05VS
+1.05VS
+CPU_CORE +1.35V
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
13 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
MCP(12/19) Power
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
13 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
MCP(12/19) Power
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
13 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
MCP(12/19) Power
R2510_0402_1% @R2510_0402_1% @
1 2
T50 @T50 @
C80
0.1U_0402_10V7K
ESD@C80
0.1U_0402_10V7K
ESD@
1
2
R253
150_0402_1%
@
R253
150_0402_1%
@
1 2
T45 @T45 @
T51 @T51 @
T41 @T41 @
T39 @T39 @
T42 @T42 @
HSW ULT POWER
HASWELL_MCP_E
Rev1p2
12 OF 19
UC1L
HSW ULT POWER
HASWELL_MCP_E
Rev1p2
12 OF 19
UC1L
VCCST
AE22
VCCST
AE23
VCC
AB57
VCC
AD57
VCC K23
VCC C44
VCC C40
VCC C36
VCC C52
VCC C48
VCC E25
VCC E23
VCC C56
VCC E29
VCC E27
VCC E35
VCC E33
VCC E31
VCC E39
VCC E37
VCC E45
VCC E43
VCC E41
VCC E49
VCC E47
VCC E55
VCC E53
VCC E51
VCC E57
VCC F24
VCC F36
VCC F32
VCC F28
VCC F40
VCC F44
VCC F48
VCC F56
VCC F52
VCC G23
VCC G25
VCC G27
VCC G31
VCC G29
VCC G33
VCC G35
VCC G37
VCC G41
VCC G39
VCC G43
VCC G47
VCC G45
VCC G53
VCC G51
VCC G49
VCC G57
VCC G55
VCC J23
VCC H23
VCC K57
VCC L22
VCC P57
VCC M57
VCC M23
VCC U57
VCC W57
VCC
AG57
VCC
C32 VCC
C28 VCC
C24
RSVD
L59
RSVD
J58
VDDQ
AH26
VDDQ
AJ31
VDDQ
AJ33
VDDQ
AJ37
VDDQ
AN33
VDDQ
AP43
VDDQ
AR48
VIDSCLK
N63
VIDSOUT
L63
VR_EN
F60
RSVD_TP
P60 VSS
P62 PW R_DEBUG
H59 VSS
D63
VR_READY
C59
VCCST_PWRGD
B59
VIDALERT
L62
RSVD
AE59 RSVD
AA23
VCC_SENSE
E63
RSVD
N58
VDDQ
AY50
RSVD_TP
P61
VCCST
AC22
RSVD_TP
N59
RSVD
T59
RSVD
AD60
RSVD
AD59
RSVD
AE60
RSVD
AC59
RSVD
AG58
RSVD
V59 RSVD
U59
RSVD
AA59
RSVD_TP
N61
VDDQ
AY35
VDDQ
AY40
VDDQ
AY44
VCC
F59
RSVD
AC58
RSVD
AB23
RSVD
AD23 VCCIOA_OUT
E20 VCCIO_OUT
A59
C74
10U_0603_6.3V6M
C74
10U_0603_6.3V6M
1
2
R255
10K_0402_5%
@
R255
10K_0402_5%
@
1 2
R252
75_0402_5%
R252
75_0402_5%
12
C41
10U_0603_6.3V6M
C41
10U_0603_6.3V6M
1
2
C79
220P_0402_50V8J
ESD@C79
220P_0402_50V8J
ESD@
1
2
T38 @T38 @
T43 @T43 @
C35
2.2U_0402_6.3V6M
C35
2.2U_0402_6.3V6M
1
2
T44 @T44 @
R254
43_0402_1%
R254
43_0402_1%
12
T46 @T46 @
R286
10K_0402_5%
R286
10K_0402_5%
12
R2
100_0402_1%
R2
100_0402_1%
12
R1
100_0402_1%
R1
100_0402_1%
12
C72
10U_0603_6.3V6M
C72
10U_0603_6.3V6M
1
2
R256
130_0402_1%
R256
130_0402_1%
12
T47 @T47 @
C38
2.2U_0402_6.3V6M
C38
2.2U_0402_6.3V6M
1
2
C40
22U_0603_6.3V6M
ESD@
C40
22U_0603_6.3V6M
ESD@
1 2
C37
2.2U_0402_6.3V6M
C37
2.2U_0402_6.3V6M
1
2
C5212
68P_0402_50V8J
RF@
C5212
68P_0402_50V8J
RF@
1
2
T49 @T49 @
T48 @T48 @
R2500_0402_5% R2500_0402_5%
1 2
C39
10U_0603_6.3V6M
C39
10U_0603_6.3V6M
1
2
C45
10U_0603_6.3V6M
C45
10U_0603_6.3V6M
1
2
C36
2.2U_0402_6.3V6M
C36
2.2U_0402_6.3V6M
1
2
T40 @T40 @
R245
0_0603_5%
@R245
0_0603_5%
@
1 2
R2480_0402_1% @R2480_0402_1% @
1 2
C42
10U_0603_6.3V6M
C42
10U_0603_6.3V6M
1
2
R257
0_0402_1%
@
R257
0_0402_1%
@
12

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Close to N8
Close to AC9/AA9/AE20/AE21
Close to V8
Close to J17
Close to R21
Close to AH14
Close to AH10
Close to K9,M9
Reserve for HDA issue, C77 close to AH14
ESD solution
ESD solution
+PCH_VCCDSW
+VCCRTCEXT
+PCH_VCCDSW_R
+3VS
+1.05VS
+1.05VS
+1.05VS_AUSB3PLL
+1.05VS_ASATA3PLL
+1.05VS_APLLOPI
+1.05VS
+3VALW_PCH
+3VALW_PCH
+3VS
+1.05VS_AXCK_DCB
+1.05VS_AXCK_LCPLL
+1.05VS
+1.05VS
+1.5VS
+RTCVCC
+3VS
+1.05VS
+3VS
+1.05VS
+1.05VS
+1.05VS
+3VALW_PCH
+3VS
+1.05VS
+1.05VS
+1.05VS_AXCK_DCB
+1.05VS_AXCK_LCPLL
+3VALW_PCH
+3VALW_PCH
+1.05VS +1.05VS_AUSB3PLL
+1.05VS_ASATA3PLL
+1.05VS_APLLOPI
+VCCHDA
+3VALW_PCH
+1.05VS
+1.5VS +3VS
+VCCHDA
+VCCHDA+3VALW_PCH
+1.05VS +3VS
+1.35V+1.05VS
+RTCVCC
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
14 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
MCP(13/19) Power
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
14 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
MCP(13/19) Power
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
14 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
MCP(13/19) Power
C50 1U_0402_6.3V6KC50 1U_0402_6.3V6K
1 2
RC129 0_0402_5%@RC129 0_0402_5%@
1 2
C67 1U_0402_6.3V6KC67 1U_0402_6.3V6K
1 2
T56 @T56 @
L2
2.2UH_LQM2MPN2R2NG0L_30%
L2
2.2UH_LQM2MPN2R2NG0L_30%
1 2
C73 1U_0402_6.3V6KC73 1U_0402_6.3V6K
1 2
AXALIA/HDA
VRM/USB2/AZALIA
GPIO/LCC
THERMAL SENSOR
HASWELL_MCP_E
mPHY
OPI
CORE
USB2
LPT LP POWER
USB3
SDIO/PLSS
SUS OSCILLATOR
RTC
SPI
Rev1p2
13 OF 19
UC1M
AXALIA/HDA
VRM/USB2/AZALIA
GPIO/LCC
THERMAL SENSOR
HASWELL_MCP_E
mPHY
OPI
CORE
USB2
LPT LP POWER
USB3
SDIO/PLSS
SUS OSCILLATOR
RTC
SPI
Rev1p2
13 OF 19
UC1M
VCCHSIO
K9
VCCHSIO
M9
VCC1_05
N8
VCC1_05
P9
RSVD
Y20
DCPSUS2
AH13
VCCAPLL
W21
DCPSUS3
J13
VCCSUS3_3
AC9
VCCSUS3_3
AA9
VCCUSB3PLL
B18
VCCSATA3PLL
B11
VCCDSW 3_3
AH10
VCCSDIO U8
VCCSDIO T9
VCC3_3 K14
VCC3_3 K16
VCCASW AG13
VCCASW AG14
VCCSPI Y8
DCPRTC AE7
VCCRTC AG10
VCCSUS3_3 AH11
VCCCLK
J18
VCCACLKPLL
A20 VCCCLK
K19
VCCCLK
J17
RSVD
M20
VCCCLK
T21 VCCCLK
R21
VCCSUS3_3
AE20
VCCSUS3_3
AE21
VCCAPLL
AA21
VCCASW AG8
VCCASW AF9
VCCASW AE9
VCC1_05 AE8
VCC1_05 H15
VCC1_05 H11
VCC1_05 J11
VCC3_3
W9 VCC3_3
V8
DCPSUS4 AB8
RSVD AC20
VCC1_05 AG16
VCC1_05 AG17
RSVD
V21
RSVD
K18
VCCHSIO
L10
VCC1_05 AF22
DCPSUSBYP AG19
DCPSUSBYP AG20
DCPSUS1 AD10
DCPSUS1 AD8
VCCTS1_5 J15
VCCHDA
AH14
R2640_0603_1% @R2640_0603_1% @
12
C54
1U_0402_6.3V6K
C54
1U_0402_6.3V6K
1
2
C76 1U_0402_6.3V6KC76 1U_0402_6.3V6K
1 2
C43
22U_0603_6.3V6M
ESD@
C43
22U_0603_6.3V6M
ESD@
1 2
T53 @T53 @
C77 0.1U_0402_10V7KC77 0.1U_0402_10V7K
1 2
C84 100U_1206_6.3V6M C84 100U_1206_6.3V6M
1 2
C64
1U_0402_6.3V6K
C64
1U_0402_6.3V6K
1 2
C55
0.1U_0402_10V7K
C55
0.1U_0402_10V7K
1
2
T55 @T55 @
C78 22U_0603_6.3V6MC78 22U_0603_6.3V6M
1 2
C66 22U_0603_6.3V6M@C66 22U_0603_6.3V6M@
1 2
C57 1U_0402_6.3V6K@C57 1U_0402_6.3V6K@
1 2
C81 0.1U_0402_10V7K
@
C81 0.1U_0402_10V7K
@
1 2
C83 1U_0402_6.3V6KC83 1U_0402_6.3V6K
1 2
C70 100U_1206_6.3V6M@C70 100U_1206_6.3V6M@
1 2
T59 @T59 @
C53 1U_0402_6.3V6KC53 1U_0402_6.3V6K
1 2
C65 100U_1206_6.3V6M C65 100U_1206_6.3V6M
1 2
L5
2.2UH_LQM2MPN2R2NG0L_30%
L5
2.2UH_LQM2MPN2R2NG0L_30%
1 2
C52 0.1U_0402_10V7KC52 0.1U_0402_10V7K
1 2
RC128 0_0402_5%@RC128 0_0402_5%@
1 2
C69 1U_0402_6.3V6KC69 1U_0402_6.3V6K
1 2
C44
22U_0603_6.3V6M
ESD@
C44
22U_0603_6.3V6M
ESD@
1 2
C51 1U_0402_6.3V6KC51 1U_0402_6.3V6K
1 2
C68 0.1U_0402_10V7K@C68 0.1U_0402_10V7K@
1 2
R267
0_0805_1%
@
R267
0_0805_1%
@
1 2
RC127 0_0402_5%RC127 0_0402_5%
1 2
L1
2.2UH_LQM2MPN2R2NG0L_30%
L1
2.2UH_LQM2MPN2R2NG0L_30%
1 2
C61 1U_0402_6.3V6KC61 1U_0402_6.3V6K
1 2
C82 22U_0603_6.3V6MC82 22U_0603_6.3V6M
1 2
L4
2.2UH_LQM2MPN2R2NG0L_30%
L4
2.2UH_LQM2MPN2R2NG0L_30%
1 2
C75 0.1U_0402_10V7KC75 0.1U_0402_10V7K
12
C58 1U_0402_6.3V6KC58 1U_0402_6.3V6K
1 2
C59 100U_1206_6.3V6M C59 100U_1206_6.3V6M
1 2
C87 1U_0402_6.3V6KC87 1U_0402_6.3V6K
1 2
C71 0.1U_0402_10V7KC71 0.1U_0402_10V7K
1 2
C86 100U_1206_6.3V6M C86 100U_1206_6.3V6M
1 2
C56
0.1U_0402_10V7K
C56
0.1U_0402_10V7K
1
2
C63 1U_0402_6.3V6KC63 1U_0402_6.3V6K
1 2
C85 1U_0402_6.3V6KC85 1U_0402_6.3V6K
1 2
L3
2.2UH_LQM2MPN2R2NG0L_30%
@L3
2.2UH_LQM2MPN2R2NG0L_30%
@
1 2
C88 1U_0402_6.3V6K
C88 1U_0402_6.3V6K
1 2
R265 0_0402_1%
@
R265 0_0402_1%
@
1 2
C60 10U_0603_6.3V6M C60 10U_0603_6.3V6M
1 2
T58 @T58 @
C62 1U_0402_6.3V6KC62 1U_0402_6.3V6K
1 2

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CAD Note: RC163 SHOULD BE PLACED CLOSE TO CPU
VSSSENSE <13,42>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
15 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
MCP(14,15,16/19) VSS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
15 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
MCP(14,15,16/19) VSS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
15 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
MCP(14,15,16/19) VSS
HASWELL_MCP_E
Rev1p2
16 OF 19
UC1P
HASWELL_MCP_E
Rev1p2
16 OF 19
UC1P
VSS
D49
VSS V3
VSS V7
VSS W20
VSS W22
VSS_SENSE E62
VSS V23
VSS AH46
VSS V58
VSS J10
VSS
D33
VSS L7
VSS H57
VSS
D41
VSS
D42
VSS
H13 VSS
G8
VSS
G5 VSS
G3
VSS
G18 VSS
F61 VSS
F58 VSS
F54
VSS
F46
VSS
F26 VSS
F20
VSS
E11 VSS
D8 VSS
D62
VSS
D57 VSS
D55 VSS
D54 VSS
D53 VSS
D51 VSS
D50 VSS
D5
VSS
D47 VSS
D46 VSS
D45 VSS
D43
VSS
D34
VSS
D35
VSS
D37
VSS
D38
VSS
D39
VSS
G6
VSS
G22
VSS
F30
VSS
E17
VSS
F34
VSS
F42
VSS AH16
VSS
F50
VSS
F38
VSS H17
VSS J22
VSS J59
VSS J63
VSS K1
VSS K12
VSS L13
VSS L15
VSS L17
VSS L18
VSS L20
VSS L58
VSS L61
VSS M22
VSS N10
VSS N3
VSS P59
VSS P63
VSS R10
VSS R8
VSS R22
VSS T1
VSS T58
VSS U20
VSS U61
VSS U22
VSS U9
VSS V10
VSS Y10
VSS Y59
VSS Y63
VSS
D59
HASWELL_MCP_E
Rev1p2
15 OF 19
UC1O
HASWELL_MCP_E
Rev1p2
15 OF 19
UC1O
VSS
AU28
VSS C14
VSS C11
VSS AW60
VSS AW40
VSS AW16
VSS AV8
VSS AV59
VSS
AP22
VSS
AV34
VSS D31
VSS D30
VSS D29
VSS D21
VSS D2
VSS D18
VSS D14
VSS D12
VSS C57
VSS C39
VSS C38
VSS C27
VSS C25
VSS C20
VSS C18
VSS B60
VSS B56
VSS B52
VSS B48
VSS B44
VSS B40
VSS B4
VSS B36
VSS B32
VSS B28
VSS B26
VSS B24
VSS B20
VSS AY6
VSS AY59
VSS AY57
VSS AY53
VSS AY51
VSS AY4
VSS AY33
VSS AY30
VSS AY26
VSS AY24
VSS AY22
VSS AY18
VSS AY16
VSS AY11
VSS AW59
VSS AW51
VSS AW50
VSS AW47
VSS AW44
VSS AW42
VSS AW4
VSS AW37
VSS AW35
VSS AW33
VSS AW24
VSS
AV51 VSS
AV49 VSS
AV46 VSS
AV43 VSS
AV41 VSS
AV39 VSS
AV36
VSS
AV14 VSS
AU59 VSS
AU57
VSS
AU53 VSS
AU51
VSS
AU30
VSS
AU26 VSS
AU24 VSS
AU22 VSS
AU20 VSS
AU18 VSS
AU16 VSS
AU1 VSS
AT63 VSS
AT62 VSS
AT61 VSS
AT49 VSS
AT46 VSS
AT43 VSS
AT42 VSS
AT40 VSS
AT37 VSS
AT35 VSS
AT13 VSS
AR52 VSS
AR5 VSS
AR49 VSS
AR43 VSS
AR39 VSS
AR33 VSS
AR31 VSS
AR23 VSS
AR17 VSS
AR15
VSS
AP57 VSS
AP54 VSS
AP52 VSS
AP48 VSS
AP39
VSS
AP31
VSS
AP29 VSS
AP26 VSS
AP23
VSS
AP38
VSS
AP3
VSS
AV55
VSS D23
VSS D25
VSS D27
VSS D26
VSS
AU55
VSS
AU33
VSS
AR11
VSS
AV20
VSS
AV28
VSS
AV33
VSS
AV24
VSS
AV16
RC163
100_0402_1%
X@
RC163
100_0402_1%
X@
12
HASWELL_MCP_E
Rev1p2
14 OF 19
UC1N
HASWELL_MCP_E
Rev1p2
14 OF 19
UC1N
VSS
AH34
VSS
AH36
VSS AJ39
VSS AJ41
VSS AJ35
VSS AJ47
VSS AJ54
VSS
AF15
VSS
AF18
VSS AP20
VSS AP17
VSS AN7
VSS AN63
VSS AN60
VSS AN52
VSS AN51
VSS AN48
VSS AN46
VSS AN45
VSS AN43
VSS AN42
VSS AN39
VSS AN36
VSS AN35
VSS AN32
VSS AN31
VSS AN17
VSS AM52
VSS AM31
VSS AM23
VSS AM17
VSS AL61
VSS AL60
VSS AL57
VSS AL54
VSS AL52
VSS AL46
VSS AL45
VSS AL40
VSS AL39
VSS AL36
VSS AL33
VSS AL31
VSS AL29
VSS AL26
VSS AL23
VSS AL22
VSS AL20
VSS AL17
VSS AL13
VSS AL10
VSS AK52
VSS AK3
VSS AK23
VSS AJ63
VSS AJ60
VSS AJ58
VSS AJ56
VSS AJ52
VSS AJ50
VSS AJ45
VSS AJ43
VSS
AJ29 VSS
AJ27 VSS
AJ25 VSS
AJ23 VSS
AJ14 VSS
AJ13 VSS
AH57 VSS
AH55 VSS
AH53
VSS
AH42 VSS
AH40
VSS
AH32 VSS
AH30 VSS
AH28 VSS
AH24 VSS
AH22 VSS
AH20 VSS
AH19 VSS
AH17 VSS
AG63 VSS
AG62 VSS
AG61 VSS
AG60 VSS
AG23 VSS
AG21 VSS
AG11 VSS
AG1
VSS
AF17
VSS
AF14 VSS
AF12 VSS
AF11 VSS
AE58 VSS
AE5 VSS
AE10 VSS
AD63 VSS
AD3 VSS
AD21 VSS
AC61 VSS
AB7 VSS
AB22 VSS
AB20 VSS
AB10 VSS
AA58 VSS
AA1 VSS
A56 VSS
A52 VSS
A48 VSS
A44 VSS
A40 VSS
A36 VSS
A32
VSS
A24 VSS
A18 VSS
A14 VSS
A11
VSS
A28
VSS AL51
VSS AM1
VSS AN23
VSS AN40
VSS AN49
VSS AP10
VSS
AH38
VSS
AH51 VSS
AH49 VSS
AH44

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CFG4
1: Disabled; No Physical Display Port
attached to Embedded Display Port
0: Enabled; An external Display Port device is
connected to the Embedded Display Port
Display Port Presence Strap
CFG STRAPS for CPU
CFG16
CFG19
CFG2
CFG0
CFG4
CFG5
CFG6
CFG7
TDI_IREF
TDI_IREF
CFG_RCOMP
CFG_RCOMP
CFG18
CFG17
CFG4
PROC_OPI_RCOMP
CFG1
PROC_OPI_RCOMP
CFG3
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
DC_TEST_A3_B3
DC_TEST_AY3_AW3
DC_TEST_A61_B61
DC_TEST_AY3_AW3
DC_TEST_A61_B61
DC_TEST_AY60
DC_TEST_AY61_AW61
DC_TEST_AW 63
TP_DC_TEST_B2
DC_TEST_AY61_AW61
DC_TEST_A60
DC_TEST_A62
DC_TEST_AV1
DC_TEST_AW 1
DC_TEST_B62_B63
DC_TEST_AY62_AW62
DC_TEST_C1_C2 DC_TEST_AY62_AW62
DC_TEST_AY2_AW2
DC_TEST_A4
DC_TEST_A3_B3
DC_TEST_AY2_AW2
RSVD_R23
RSVD_U10
RSVD_T23
RSVD_N23
RSVD_AY14
RSVD_AL1
RSVD_AM11
RSVD_AP7
RSVD_AU10
RSVD_AU15
RSVD_AW14
RSVD_AV44
RSVD_D15
RSVD_F22
RSVD_J21
RSVD_H22
RSVD_AT2
RSVD_AU44
CFG0<6>
CFG1<6>
CFG2<6>
CFG3<6>
CFG4<6>
CFG5<6>
CFG6<6>
CFG7<6>
CFG8<6>
CFG9<6>
CFG10<6>
CFG11<6>
CFG12<6>
CFG13<6>
CFG14<6>
CFG15<6>
CFG16<6>
CFG18<6>
CFG17<6>
CFG19<6>
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
16 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
MCP(17,18,19/19) CFG,RSVD
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
16 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
MCP(17,18,19/19) CFG,RSVD
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
16 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
MCP(17,18,19/19) CFG,RSVD
T152PAD~D @T152PAD~D @
RC138
1K_0402_1%
RC138
1K_0402_1%
12
RC132 49.9_0402_1%RC132 49.9_0402_1%
12
T156PAD~D @T156PAD~D @
T142PAD~D @
T142PAD~D @
T165PAD~D@T165PAD~D@
RC133 8.2K_0402_1%RC133 8.2K_0402_1%
1 2
T146PAD~D @T146PAD~D @
T153PAD~D @T153PAD~D @
T140 PAD~D
@T140 PAD~D
@
T134 PAD~D
@T134 PAD~D
@
T147PAD~D @T147PAD~D @
T171PAD~D @T171PAD~D @T135 PAD~D
@T135 PAD~D
@
T168PAD~D @T168PAD~D @
T167PAD~D@T167PAD~D@
RC13449.9_0402_1% RC13449.9_0402_1%
1 2
T131PAD~D @
T131PAD~D @
T170PAD~D @T170PAD~D @
T133PAD~D @
T133PAD~D @
T136PAD~D @
T136PAD~D @
T151PAD~D @T151PAD~D @
T145PAD~D @
T145PAD~D @
HASWELL_MCP_E
Rev1p2
17 OF 19
UC1Q
HASWELL_MCP_E
Rev1p2
17 OF 19
UC1Q
DAISY_CHAIN_NCTF_AW62 AW62
DAISY_CHAIN_NCTF_AW63 AW63
DAISY_CHAIN_NCTF_AW61 AW61
DAISY_CHAIN_NCTF_AW3 AW3
DAISY_CHAIN_NCTF_AW2 AW2
DAISY_CHAIN_NCTF_A62 A62
DAISY_CHAIN_NCTF_AV1 AV1
DAISY_CHAIN_NCTF_AW1 AW1
DAISY_CHAIN_NCTF_A60 A60
DAISY_CHAIN_NCTF_A61 A61
DAISY_CHAIN_NCTF_A4 A4
DAISY_CHAIN_NCTF_A3 A3
DAISY_CHAIN_NCTF_C2
C2 DAISY_CHAIN_NCTF_C1
C1 DAISY_CHAIN_NCTF_B63
B63 DAISY_CHAIN_NCTF_B62
B62
DAISY_CHAIN_NCTF_B2
B2
DAISY_CHAIN_NCTF_B3
B3
DAISY_CHAIN_NCTF_B61
B61
DAISY_CHAIN_NCTF_AY61
AY61
DAISY_CHAIN_NCTF_AY62
AY62
DAISY_CHAIN_NCTF_AY3
AY3
DAISY_CHAIN_NCTF_AY60
AY60
DAISY_CHAIN_NCTF_AY2
AY2
T159PAD~D@T159PAD~D@
T172PAD~D @T172PAD~D @
T149PAD~D @T149PAD~D @
T130PAD~D @
T130PAD~D @
HASWELL_MCP_E
Rev1p2
18 OF 19
UC1R
HASWELL_MCP_E
Rev1p2
18 OF 19
UC1R
RSVD AP7
RSVD U10
RSVD AL1
RSVD AM11
RSVD AU10
RSVD AU15
RSVD R23
RSVD N23
RSVD T23
RSVD
J21 RSVD
H22 RSVD
F22
RSVD
D15 RSVD
AV44 RSVD
AU44 RSVD
AT2
RSVD AW14
RSVD AY14
T173PAD~D @T173PAD~D @
T132 PAD~D
@T132 PAD~D
@
T163PAD~D@T163PAD~D@
T128 PAD~D
@T128 PAD~D
@
T143 PAD~D
@T143 PAD~D
@
T141PAD~D @
T141PAD~D @
T150PAD~D @T150PAD~D @
T138 PAD~D
@T138 PAD~D
@
T154PAD~D @T154PAD~D @
T129PAD~D @
T129PAD~D @
T160PAD~D @T160PAD~D @
T137PAD~D @
T137PAD~D @
T161PAD~D@T161PAD~D@
T157PAD~D @T157PAD~D @
T166PAD~D@T166PAD~D@
T139PAD~D @
T139PAD~D @
T164PAD~D@T164PAD~D@
T162PAD~D @T162PAD~D @
T169PAD~D @T169PAD~D @
RESERVED
HASWELL_MCP_E
Rev1p2
19 OF 19
UC1S
RESERVED
HASWELL_MCP_E
Rev1p2
19 OF 19
UC1S
CFG17
AA61 CFG18
U63
CFG7
Y60
CFG11
U60
CFG12
T63
RSVD_TP AU63
RSVD_TP C63
RSVD_TP C62
RSVD_TP L60
RSVD_TP B51
RSVD_TP A51
CFG10
V60 CFG9
V61 CFG8
V62
CFG6
Y61
RSVD
A5
RSVD B43
RSVD N60
RSVD Y22
RSVD W23
RSVD D58
RSVD AV62
RSVD_TP AV63
VSS N21
VSS P22
CFG_RCOMP
V63
CFG19
U62
CFG13
T62
RSVD R20
RSVD P20
PROC_OPI_RCOMP AY15
TD_IREF
B12
RSVD
E1
RSVD
D1
RSVD
J20
RSVD
H18
CFG5
Y62 CFG4
AA60 CFG3
AA63 CFG2
AC63 CFG1
AC62 CFG0
AC60
CFG16
AA62
CFG15
T60 CFG14
T61
T148PAD~D @T148PAD~D @
T158PAD~D @T158PAD~D @
T144PAD~D @
T144PAD~D @
T155PAD~D @T155PAD~D @

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Layout Note:
Place near JDIMM1
Layout Note:
Place near JDIMM1.203,204
All VREF traces should
have 10 mil trace width
DDR3L SODIMM ODT GENERATION
Note:
Check voltage tolerance of
VREF_DQ at the DIMM socket
Populate RD1, De-Populate RD7 for Intel DDR3
VREFDQ multiple methods M1
Populate RD7, De-Populate RD1 for Intel DDR3
VREFDQ multiple methods M3
H=4mm
2-3A to 1 DIMMs/channel
CAD NOTE
PLACE THE CAP NEAR TO
DIMM RESET PIN
ESD solution
Place CC31
between QD2 and R2349
0.675V_DDR_VTT_ON
DDR3_DRAMRST#
DDR_A_D13
DDR_A_D8
DDR_A_D14
DDR_A_D10
DDR_A_D9
DDR_A_D12
DDR_A_D15
DDR_A_D11
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D43
DDR_A_D47
DDR_A_D40
DDR_A_D49
DDR_A_D48
DDR_A_D52
DDR_A_D53
DDR_A_D0
DDR_A_D2
DDR_A_D6
DDR_A_D5
DDR_A_D4
DDR_A_D21
DDR_A_D20
DDR_A_D17
DDR_A_D16
DDR_A_D19
DDR_A_D22
DDR_A_D33
DDR_A_D34
DDR_A_D38
DDR_A_D37
DDR_A_D32
DDR_A_D39
DDR_A_D62
DDR_A_D58
DDR_A_D60
DDR_A_D61
DDR_A_D63
DDR_A_D59
DDR_A_D56
DDR_A_MA2
DDR_A_MA0DDR_A_MA1
DDR_A_MA3
DDR_A_MA4DDR_A_MA5
DDR_A_MA6DDR_A_MA8
DDR_A_MA7DDR_A_MA9
DDR_A_MA10
DDR_A_MA11DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_DQS1
DDR_A_DQS3
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS0
DDR_A_DQS2
DDR_A_DQS4
DDR_A_DQS7
DDR_A_DQS#1
DDR_A_DQS#3
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#0
DDR_A_DQS#2
DDR_A_DQS#4
DDR_A_DQS#7
DDR_A_BS0
DDR_A_BS1
DDR_A_BS2
DDR_CS1_DIMMA#
DDR_CS0_DIMMA#
M_CLK_DDR0
M_CLK_DDR#0
M_CLK_DDR1
M_CLK_DDR#1
DDR_CKE0_DIMMA DDR_CKE1_DIMMA
DDR_A_CAS#
DDR_A_RAS#
DDR_A_WE#
M_ODT0
M_ODT1
DDR_A_D57
DDR_A_MA15
DDR_A_D46
DDR_A_D55
DDR_A_D41
DDR_A_D28 DDR_A_D24
DDR_A_D45DDR_A_D44
DDR_A_D50
DDR_A_D54
DDR_A_D51
DDR_A_D27
DDR_A_D26
DDR_A_D25
DDR_A_D42
DDR_A_D7
DDR_A_D35
DDR_A_D1
DDR_A_D3
DDR_A_D23
DDR_A_D18
DDR_A_D36
0.675V_DDR_VTT_ON
M_ODT0
M_ODT1
M_ODT
M_ODT
DDR_A_DQS#[0..7]<7>
DDR_A_D[0..63]<7>
DDR_A_DQS[0..7]<7>
DDR_A_MA[0..15]<7>
DDR_A_BS2<7>
DDR_CKE0_DIMMA<7>
M_CLK_DDR0<7>
M_CLK_DDR#0<7>
DDR_A_WE#<7>
DDR_A_CAS#<7>
DDR_A_BS0<7>
DDR_CS1_DIMMA#<7>
DDR_XDP_WLAN_TP_SMBCLK <18,19,26,27,6,9>
DDR_XDP_WLAN_TP_SMBDAT <18,19,26,27,6,9>
DDR_PG_CTRL<6>
M_ODT2 <18>
M_ODT3 <18>
DDR3_DRAMRST#<18> DDR3_DRAMRST#_CPU <6>
DDR_CKE1_DIMMA <7>
M_CLK_DDR#1 <7>
M_CLK_DDR1 <7>
DDR_A_RAS# <7>
DDR_A_BS1 <7>
DDR_CS0_DIMMA# <7>
0.675V_DDR_VTT_ON <41>
+0.675VS
+1.35V
+1.35V
+1.35V
+1.35V+1.35V
+3VS
+0.675VS
+DIMM1_VREF_DQ
+5VALW +1.35V
+0.675VS
+SM_VREF_CA_DIMM
+1.35V
+SM_VREF_DQ0_DIMM1
+1.35V
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
17 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
DDRIII DIMMA
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
17 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
DDRIII DIMMA
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
17 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
DDRIII DIMMA
CD6
1U_0402_6.3V6K
CD6
1U_0402_6.3V6K
1
2
CD11
1U_0402_6.3V6K
CD11
1U_0402_6.3V6K
1
2
RD5
0_0402_1%
@
RD5
0_0402_1%
@
1 2
CD31
0.1U_0402_10V7K
CD31
0.1U_0402_10V7K
1
2
R2348 66.5_0402_1%R2348 66.5_0402_1%
1 2
CD16
10U_0603_6.3V6M
CD16
10U_0603_6.3V6M
1
2
CD1
2.2U_0402_6.3V6M
CD1
2.2U_0402_6.3V6M
1
2
CD23
0.1U_0402_10V7K
@
CD23
0.1U_0402_10V7K
@
1 2
CD17
10U_0603_6.3V6M
@
CD17
10U_0603_6.3V6M
@
1
2
CD24
0.1U_0402_10V7K
CD24
0.1U_0402_10V7K
1
2
+
CD15
330U_D3_2.5VY_R6M
+
CD15
330U_D3_2.5VY_R6M
1
2
CD27
0.1U_0402_10V7K
CD27
0.1U_0402_10V7K
1
2
CD18
10U_0603_6.3V6M
CD18
10U_0603_6.3V6M
1
2
R2347
220K_0402_5%~D
R2347
220K_0402_5%~D
12
RD3
470_0402_5%
RD3
470_0402_5%
12
R2349 66.5_0402_1%R2349 66.5_0402_1%
1 2
CD8
1U_0402_6.3V6K
CD8
1U_0402_6.3V6K
1
2
RD6 10K_0402_5%RD6 10K_0402_5%
1 2
RD1
0_0402_1%
@
RD1
0_0402_1%
@
1 2
CD21
2.2U_0402_6.3V6M
CD21
2.2U_0402_6.3V6M
1
2
CD9
1U_0402_6.3V6K
CD9
1U_0402_6.3V6K
1
2
CD30
2.2U_0402_6.3V6M
@
CD30
2.2U_0402_6.3V6M
@
1
2
CD5
1U_0402_6.3V6K
CD5
1U_0402_6.3V6K
1
2
CD14
10U_0603_6.3V6M
CD14
10U_0603_6.3V6M
1
2
CD4
1U_0402_6.3V6K
CD4
1U_0402_6.3V6K
1
2
CD19
10U_0603_6.3V6M
@
CD19
10U_0603_6.3V6M
@
1
2
CD64
0.1U_0402_10V7K
ESD@CD64
0.1U_0402_10V7K
ESD@
1
2
CD26
0.1U_0402_10V7K
CD26
0.1U_0402_10V7K
1
2
CD22
0.1U_0402_10V7K
CD22
0.1U_0402_10V7K
1
2
R2350 66.5_0402_1%R2350 66.5_0402_1%
1 2
CD20
10U_0603_6.3V6M
CD20
10U_0603_6.3V6M
1
2
CD13
10U_0603_6.3V6M
CD13
10U_0603_6.3V6M
1
2
RD4
0_0402_1%
@
RD4
0_0402_1%
@
1 2
RD7 10K_0402_5%RD7 10K_0402_5%
1 2
CD10
1U_0402_6.3V6K
CD10
1U_0402_6.3V6K
1
2
CD2
0.1U_0402_10V7K
CD2
0.1U_0402_10V7K
1
2
CD25
0.1U_0402_10V7K
CD25
0.1U_0402_10V7K
1
2
R2352 66.5_0402_1%R2352 66.5_0402_1%
1 2
CD3
0.1U_0402_10V7K
ESD@
CD3
0.1U_0402_10V7K
ESD@
1
2
CD7
1U_0402_6.3V6K
CD7
1U_0402_6.3V6K
1
2
CD28
10U_0603_6.3V6M
CD28
10U_0603_6.3V6M
1
2
R2351
2M_0402_5%
@
R2351
2M_0402_5%
@
1 2
JDIMM1
LCN_DAN06-K4406-0102
CONN@
JDIMM1
LCN_DAN06-K4406-0102
CONN@
VREF_DQ
1VSS1 2
VSS2
3DQ4 4
DQ0
5DQ5 6
DQ1
7VSS3 8
VSS4
9DQS#0 10
DM0
11 DQS0 12
VSS5
13 VSS6 14
DQ2
15 DQ6 16
DQ3
17 DQ7 18
VSS7
19 VSS8 20
DQ8
21 DQ12 22
DQ9
23 DQ13 24
VSS9
25 VSS10 26
DQS#1
27 DM1 28
DQS1
29 RESET# 30
VSS11
31 VSS12 32
DQ10
33 DQ14 34
DQ11
35 DQ15 36
VSS13
37 VSS14 38
DQ16
39 DQ20 40
DQ17
41 DQ21 42
VSS15
43 VSS16 44
DQS#2
45 DM2 46
DQS2
47 VSS17 48
VSS18
49 DQ22 50
DQ18
51 DQ23 52
DQ19
53 VSS19 54
VSS20
55 DQ28 56
DQ24
57 DQ29 58
DQ25
59 VSS21 60
VSS22
61 DQS#3 62
DM3
63 DQS3 64
VSS23
65 VSS24 66
DQ26
67 DQ30 68
DQ27
69 DQ31 70
VSS25
71 VSS26 72
A12/BC#
83 A11 84
A9
85 A7 86
VDD5
87 VDD6 88
A8
89 A6 90
CKE0
73 CKE1 74
VDD1
75 VDD2 76
NC1
77 A15 78
BA2
79 A14 80
VDD3
81 VDD4 82
A5
91 A4 92
VDD7
93 VDD8 94
A3
95 A2 96
A1
97 A0 98
VDD9
99 VDD10 100
CK0
101 CK1 102
CK0#
103 CK1# 104
VDD11
105 VDD12 106
A10/AP
107 BA1 108
BA0
109 RAS# 110
VDD13
111 VDD14 112
WE#
113 S0# 114
CAS#
115 ODT0 116
VDD15
117 VDD16 118
A13
119 ODT1 120
S1#
121 NC2 122
VDD17
123 VDD18 124
NCTEST
125 VREF_CA 126
VSS27
127 VSS28 128
DQ32
129 DQ36 130
DQ33
131 DQ37 132
VSS29
133 VSS30 134
DQS#4
135 DM4 136
DQS4
137 VSS31 138
VSS32
139 DQ38 140
DQ34
141 DQ39 142
DQ35
143 VSS33 144
VSS34
145 DQ44 146
DQ40
147 DQ45 148
DQ41
149 VSS35 150
VSS36
151 DQS#5 152
DM5
153 DQS5 154
VSS37
155 VSS38 156
DQ42
157 DQ46 158
DQ43
159 DQ47 160
VSS39
161 VSS40 162
DQ48
163 DQ52 164
DQ49
165 DQ53 166
VSS41
167 VSS42 168
DQS#6
169 DM6 170
DQS6
171 VSS43 172
VSS44
173 DQ54 174
DQ50
175 DQ55 176
DQ51
177 VSS45 178
VSS46
179 DQ60 180
DQ56
181 DQ61 182
DQ57
183 VSS47 184
VSS48
185 DQS#7 186
DM7
187 DQS7 188
VSS49
189 VSS50 190
DQ58
191 DQ62 192
DQ59
193 DQ63 194
VSS51
195 VSS52 196
SA0
197 EVENT# 198
VDDSPD
199 SDA 200
SA1
201 SCL 202
VTT1
203 VTT2 204
G1
205 G2 206
G
D
S
QD2
BSS138-G_SOT23-3
G
D
S
QD2
BSS138-G_SOT23-3
2
1 3
CD62
22U_0603_6.3V6M
ESD@
CD62
22U_0603_6.3V6M
ESD@
1 2
U2303
74AUP1G07GW_TSSOP5
U2303
74AUP1G07GW_TSSOP5
GND
3
A
2
NC
1VCC 5
Y4
CD12
10U_0603_6.3V6M
CD12
10U_0603_6.3V6M
1
2
CD29
10U_0603_6.3V6M
CD29
10U_0603_6.3V6M
1
2

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Layout Note:
Place near JDIMM2
Layout Note:
Place near JDIMM2.203,204
All VREF traces should
have 10 mil trace width
Note:
Check voltage tolerance of
VREF_DQ at the DIMM socket
Populate RD4, De-Populate RD8 for Intel DDR3
VREFDQ multiple methods M1
Populate RD8, De-Populate RD4 for Intel DDR3
VREFDQ multiple methods M3
2-3A to 1 DIMMs/channel
H=4mm
CAD NOTE
PLACE THE CAP NEAR TO
DIMM RESET PIN
DDR_B_MA7
DDR_B_D37
M_ODT2
DDR_B_MA14
DDR_B_D0
DDR_B_D5
DDR_B_MA6
DDR_B_D16
DDR_B_D34
DDR_B_D32
DDR_B_D19
DDR_CKE3_DIMMB
DDR_B_MA4
DDR_B_D17
DDR_B_D2
DDR_B_BS1
DDR_B_D38
DDR_B_D18
M_ODT3
M_CLK_DDR3
DDR_B_RAS#
M_CLK_DDR#3
DDR_B_MA2
DDR_B_DQS#2
DDR_B_MA11
DDR_B_D51
DDR_B_D6
DDR_B_MA0
DDR_B_DQS2
DDR_CS2_DIMMB#
DDR_B_MA15
DDR_B_D55
DDR_B_DQS#6
DDR_B_DQS6
DDR_B_D54
DDR_B_D50
DDR3_DRAMRST#
DDR_CKE2_DIMMB
DDR_B_D48
DDR_B_D53
DDR_B_BS2
DDR_B_MA12
DDR_B_MA9
DDR_B_MA8
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1
M_CLK_DDR2
M_CLK_DDR#2
DDR_B_MA10
DDR_B_BS0
DDR_B_WE#
DDR_B_CAS#
DDR_B_MA13
DDR_CS3_DIMMB#
DDR_B_D4
DDR_B_D1
DDR_B_DQS#0
DDR_B_DQS0
DDR_B_D3
DDR_B_D7
DDR_B_D21
DDR_B_D20
DDR_B_D22
DDR_B_D23
DDR_B_D36
DDR_B_D33
DDR_B_DQS#4
DDR_B_DQS4
DDR_B_D35
DDR_B_D39
DDR_B_D52
DDR_B_D49
DDR_B_D47
DDR_B_D42
DDR_B_D45
DDR_B_D58
DDR_B_D28
DDR_B_DQS#5
DDR_B_D43
DDR_B_D44
DDR_B_D56
DDR_B_DQS#7
DDR_B_D9
DDR_B_DQS3
DDR_B_D29
DDR_B_D30
DDR_B_DQS7
DDR_B_D15
DDR_B_D13
DDR_B_D26
DDR_B_DQS#3
DDR_B_D31
DDR_B_D10
DDR_B_D8
DDR_B_D61
DDR_B_DQS5
DDR_B_D12
DDR_B_D27
DDR_B_D57
DDR_B_D14
DDR_B_D60
DDR_B_D63
DDR_B_D25
DDR_B_DQS#1
DDR_B_D40
DDR_B_D46
DDR_B_D59
DDR_B_D11
DDR_B_D62
DDR_B_D41
DDR_B_D24
DDR_B_DQS1
DDR3_DRAMRST# <17>
DDR_CKE3_DIMMB <7>
M_CLK_DDR3 <7>
M_CLK_DDR#3 <7>
DDR_B_RAS# <7>
DDR_B_BS1 <7>
M_ODT2 <17>
DDR_CS2_DIMMB# <7>
M_ODT3 <17>
DDR_CS3_DIMMB#<7>
DDR_XDP_WLAN_TP_SMBDAT <17,19,26,27,6,9>
DDR_XDP_WLAN_TP_SMBCLK <17,19,26,27,6,9>
DDR_B_CAS#<7>
DDR_B_WE#<7>
DDR_B_BS0<7>
M_CLK_DDR#2<7>
M_CLK_DDR2<7>
DDR_B_BS2<7>
DDR_CKE2_DIMMB<7>
DDR_B_DQS[0..7]<7>
DDR_B_MA[0..15]<7>
DDR_B_DQS#[0..7]<7>
DDR_B_D[0..63]<7>
+1.35V
+1.35V +1.35V
+1.35V
+0.675VS
+DIMM2_VREF_DQ
+SM_VREF_DQ1_DIMM2
+3VS
+3VS
+0.675VS +0.675VS
+SM_VREF_CA_DIMM
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
18 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
DDRIII DIMMB
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
18 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
DDRIII DIMMB
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
18 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
DDRIII DIMMB
RD12 10K_0402_5%RD12 10K_0402_5%
12
CD46
10U_0603_6.3V6M
@
CD46
10U_0603_6.3V6M
@
1
2
RD8
0_0402_1%
@
RD8
0_0402_1%
@
1 2
CD60
2.2U_0402_6.3V6M
@
CD60
2.2U_0402_6.3V6M
@
1
2
RD10
0_0402_1%
@
RD10
0_0402_1%
@
1 2
CD39
1U_0402_6.3V6K
CD39
1U_0402_6.3V6K
1
2
CD35
1U_0402_6.3V6K
CD35
1U_0402_6.3V6K
1
2
CD33
0.1U_0402_10V7K
CD33
0.1U_0402_10V7K
1
2
RD13
10K_0402_5%
RD13
10K_0402_5%
12
CD44
10U_0603_6.3V6M
@
CD44
10U_0603_6.3V6M
@
1
2
CD42
1U_0402_6.3V6K
CD42
1U_0402_6.3V6K
1
2
CD43
10U_0603_6.3V6M
CD43
10U_0603_6.3V6M
1
2
CD61
0.1U_0402_10V7K
CD61
0.1U_0402_10V7K
1
2
CD32
2.2U_0402_6.3V6M
CD32
2.2U_0402_6.3V6M
1
2
CD37
1U_0402_6.3V6K
CD37
1U_0402_6.3V6K
1
2
CD34
0.1U_0402_10V7K
ESD@
CD34
0.1U_0402_10V7K
ESD@
1
2
CD36
1U_0402_6.3V6K
CD36
1U_0402_6.3V6K
1
2
CD47
10U_0603_6.3V6M
CD47
10U_0603_6.3V6M
1
2
CD40
1U_0402_6.3V6K
CD40
1U_0402_6.3V6K
1
2
CD58
10U_0603_6.3V6M
CD58
10U_0603_6.3V6M
1
2
CD53
0.1U_0402_10V7K
CD53
0.1U_0402_10V7K
1
2
CD56
0.1U_0402_10V7K
CD56
0.1U_0402_10V7K
1
2
CD52
2.2U_0402_6.3V6M
CD52
2.2U_0402_6.3V6M
1
2
CD41
1U_0402_6.3V6K
CD41
1U_0402_6.3V6K
1
2
+
CD51
330U_D3_2.5VY_R6M
+
CD51
330U_D3_2.5VY_R6M
1
2
CD49
10U_0603_6.3V6M
CD49
10U_0603_6.3V6M
1
2
CD54
0.1U_0402_10V7K
CD54
0.1U_0402_10V7K
1
2
CD50
10U_0603_6.3V6M
CD50
10U_0603_6.3V6M
1
2
JDIMM2
LCN_DAN06-K4406-0102
CONN@
JDIMM2
LCN_DAN06-K4406-0102
CONN@
VREF_DQ
1VSS1 2
VSS2
3DQ4 4
DQ0
5DQ5 6
DQ1
7VSS3 8
VSS4
9DQS#0 10
DM0
11 DQS0 12
VSS5
13 VSS6 14
DQ2
15 DQ6 16
DQ3
17 DQ7 18
VSS7
19 VSS8 20
DQ8
21 DQ12 22
DQ9
23 DQ13 24
VSS9
25 VSS10 26
DQS#1
27 DM1 28
DQS1
29 RESET# 30
VSS11
31 VSS12 32
DQ10
33 DQ14 34
DQ11
35 DQ15 36
VSS13
37 VSS14 38
DQ16
39 DQ20 40
DQ17
41 DQ21 42
VSS15
43 VSS16 44
DQS#2
45 DM2 46
DQS2
47 VSS17 48
VSS18
49 DQ22 50
DQ18
51 DQ23 52
DQ19
53 VSS19 54
VSS20
55 DQ28 56
DQ24
57 DQ29 58
DQ25
59 VSS21 60
VSS22
61 DQS#3 62
DM3
63 DQS3 64
VSS23
65 VSS24 66
DQ26
67 DQ30 68
DQ27
69 DQ31 70
VSS25
71 VSS26 72
A12/BC#
83 A11 84
A9
85 A7 86
VDD5
87 VDD6 88
A8
89 A6 90
CKE0
73 CKE1 74
VDD1
75 VDD2 76
NC1
77 A15 78
BA2
79 A14 80
VDD3
81 VDD4 82
A5
91 A4 92
VDD7
93 VDD8 94
A3
95 A2 96
A1
97 A0 98
VDD9
99 VDD10 100
CK0
101 CK1 102
CK0#
103 CK1# 104
VDD11
105 VDD12 106
A10/AP
107 BA1 108
BA0
109 RAS# 110
VDD13
111 VDD14 112
WE#
113 S0# 114
CAS#
115 ODT0 116
VDD15
117 VDD16 118
A13
119 ODT1 120
S1#
121 NC2 122
VDD17
123 VDD18 124
NCTEST
125 VREF_CA 126
VSS27
127 VSS28 128
DQ32
129 DQ36 130
DQ33
131 DQ37 132
VSS29
133 VSS30 134
DQS#4
135 DM4 136
DQS4
137 VSS31 138
VSS32
139 DQ38 140
DQ34
141 DQ39 142
DQ35
143 VSS33 144
VSS34
145 DQ44 146
DQ40
147 DQ45 148
DQ41
149 VSS35 150
VSS36
151 DQS#5 152
DM5
153 DQS5 154
VSS37
155 VSS38 156
DQ42
157 DQ46 158
DQ43
159 DQ47 160
VSS39
161 VSS40 162
DQ48
163 DQ52 164
DQ49
165 DQ53 166
VSS41
167 VSS42 168
DQS#6
169 DM6 170
DQS6
171 VSS43 172
VSS44
173 DQ54 174
DQ50
175 DQ55 176
DQ51
177 VSS45 178
VSS46
179 DQ60 180
DQ56
181 DQ61 182
DQ57
183 VSS47 184
VSS48
185 DQS#7 186
DM7
187 DQS7 188
VSS49
189 VSS50 190
DQ58
191 DQ62 192
DQ59
193 DQ63 194
VSS51
195 VSS52 196
SA0
197 EVENT# 198
VDDSPD
199 SDA 200
SA1
201 SCL 202
VTT1
203 VTT2 204
G1
205 G2 206
CD57
0.1U_0402_10V7K
CD57
0.1U_0402_10V7K
1
2
CD55
0.1U_0402_10V7K
CD55
0.1U_0402_10V7K
1
2
CD45
10U_0603_6.3V6M
CD45
10U_0603_6.3V6M
1
2
CD38
1U_0402_6.3V6K
CD38
1U_0402_6.3V6K
1
2
CD59
10U_0603_6.3V6M
CD59
10U_0603_6.3V6M
1
2
CD48
10U_0603_6.3V6M
CD48
10U_0603_6.3V6M
1
2

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
60 mils
60 mils
40 mils
Close to 11 pin Close to 43 pin
30mil30mil
Close to 18 pin Close to 22 pinClose to 5 pin
RTD2136S : SA00004NW10
RTD2136R : SA000067100
EEPROMEEPROM
ROMLESSROMLESS
Close to 15 pin
AUX termination
Vendor advise reserve it
For eDP co-layout
Close to UX4
Close to UX4
Across to UX4.19 & UX4.21
Close to UX2
for layout smoothly,
will swap NET on cable
LVDS_A0+
LVDS_BCLK+
LVDS_BCLK-
LVDS_B0+
LVDS_B0-
LVDS_B2+
LVDS_ACLK+
LVDS_ACLK-
LVDS_A0-
LVDS_A1+
LVDS_A1-
LVDS_A2+
LVDS_A2-
LVDS_B1+
LVDS_B1-
LVDS_B2-
EC_SMB_CK2
EC_SMB_DA2CSDA
CSCL
EDP_CPU_LANE_P1
EDP_CPU_LANE_N1
EDP_CPU_LANE_P0
EDP_CPU_LANE_N0
EDP_CPU_AUX
EDP_CPU_AUX#
CPU_EDP_P0_C
CPU_EDP_N0_C
CPU_EDP_P1_C
CPU_EDP_N1_C
CPU_EDP_AUX_C
CPU_EDP_AUX#_C
EDP_BIA_PWM
DDR_XDP_WLAN_TP_SMBDAT
MIIC_SCL
CSDA
+SWR_V12
TL_BKOFF#_R
EDP_CPU_HPD
EDID_CLK
EDID_DATA
TL_INVT_PWM
+AVCC33
+DVCC33
DDR_XDP_WLAN_TP_SMBCLK
MIIC_SDA
+SW_LX
CSCL
TL_ENVDD
+SWR_V12
+AVCC33 +DVCC33
MIIC_SCLMIIC_SDA
EDP_CPU_AUX#
EDP_CPU_AUX
EDP_CPU_HPD
EDP_BIA_PWM
CSCL
EDID_DATA
EDID_CLK
CSDA
TL_BKOFF#_R
CPU_EDP_N0_C
CPU_EDP_P1_C
EDP_N0 LVDS_B1+
EDP_P1 LVDS_B2-
CPU_EDP_P0_C EDP_P0 LVDS_B1-
CPU_EDP_N1_C EDP_N1 LVDS_B2+
CPU_EDP_AUX_C
CPU_EDP_AUX#_C
LVDS_B0+
LVDS_B0-
EDP_AUX
EDP_AUX#
EDP_HPD_PANEL
EDP_BIA_PWM TL_INVT_PWM
TL_ENVDD
EDP_CPU_HPD
TL_BKOFF#BKOFF#
ENVDD_PCH
EDP_CPU_HPD<10>
EC_SMB_DA2 <30,49,9>
LVDS_ACLK+ <31>
LVDS_ACLK- <31>
LVDS_A0- <31>
LVDS_A0+ <31>
LVDS_A1- <31>
LVDS_A1+ <31>
LVDS_A2- <31>
LVDS_A2+ <31>
LVDS_B2- <31>
LVDS_B2+ <31>
LVDS_BCLK- <31>
LVDS_B0- <31>
LVDS_B0+ <31>
LVDS_BCLK+ <31>
LVDS_B1- <31>
LVDS_B1+ <31>
TL_INVT_PWM <31>
TL_ENVDD <31>
EDP_CPU_LANE_P0<6>
EDP_CPU_LANE_N0<6>
EDP_CPU_LANE_P1<6>
EDP_CPU_LANE_N1<6>
EDP_CPU_AUX<6>
EDP_CPU_AUX#<6>
EDID_CLK <31>
EDID_DATA <31>
EC_SMB_CK2 <30,49,9>
EDP_BIA_PWM<10,6>
DDR_XDP_WLAN_TP_SMBDAT<17,18,26,27,6,9>
DDR_XDP_WLAN_TP_SMBCLK<17,18,26,27,6,9>
BKOFF#<30>
TL_BKOFF# <31>
EDP_HPD_PANEL <31>
ENVDD_PCH<10,30>
+3VS_RT
+3VS_RT
+DVCC33
+3VS_RT+3VS +SWR_V12
+3VS_RT+3VS_RT
+3VS_RT
+DVCC33
+3VS_RT
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
19 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
eDP to LVDS converter
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
19 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
eDP to LVDS converter
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
19 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
eDP to LVDS converter
RX44 0_0402_5%eDP@RX44 0_0402_5%eDP@
1 2
RX31 0_0402_5%@RX31 0_0402_5%@
1 2
CX34
0.1U_0402_10V7K
LVDS@CX34
0.1U_0402_10V7K
LVDS@
1
2
UX2
MC74VHC1G08DFT2G_SC70-5
LVDS@UX2
MC74VHC1G08DFT2G_SC70-5
LVDS@
IN1
1
IN2
2OUT 4
VCC 5
GND
3
CX33
0.1U_0402_10V7K
LVDS@CX33
0.1U_0402_10V7K
LVDS@
1
2
RX47 0_0402_5%eDP@RX47 0_0402_5%eDP@
1 2
RX168
4.7K_0402_5%
@
RX168
4.7K_0402_5%
@
12
CX31
0.1U_0402_10V7K
LVDS@CX31
0.1U_0402_10V7K
LVDS@
1
2
RX37 0_0402_5%eDP@RX37 0_0402_5%eDP@
1 2
RX46 0_0402_5%eDP@RX46 0_0402_5%eDP@
1 2
RX25
100K_0402_5%
@
RX25
100K_0402_5%
@
12
LX9
4.7UH_PG031B-4R7MS_1.1A_20%
LVDS@ LX9
4.7UH_PG031B-4R7MS_1.1A_20%
LVDS@
1 2
CX10
0.1U_0402_10V7K
LVDS@CX10
0.1U_0402_10V7K
LVDS@
1 2
RX169
4.7K_0402_5%
LVDS@
RX169
4.7K_0402_5%
LVDS@
12
RTD2136R
PWR
DP
LVDSGND
OTHERS
UX4
RTD2136R-CG_QFN48_6x6
LVDS@
RTD2136R
PWR DP
LVDSGND
OTHERS
UX4
RTD2136R-CG_QFN48_6x6
LVDS@
TXOC- 36
TXOC+ 35
TXO3- 34
TXO3+ 33
TXO2- 38
TXO2+ 37
TXO1- 40
TXO1+ 39
TXO0- 42
TXO0+ 41
TXEC- 26
TXEC+ 25
TXE0- 32
TXE0+ 31
TXE1- 30
TXE1+ 29
TXE2- 28
TXE2+ 27
TXE3- 24
TXE3+ 23
DP_V33
5
LANE0P
7
LANE0N
8
LANE1P
9
LANE1N
10
AUX-CH_P
4
AUX-CH_N
3
DP_HPD
1
DP_GND 6
PWMIN
21
PANEL_VCC 20
PWMOUT 19
BL_EN 44
CIICSCL1
13
CIICSDA1
14
MODE_CFG1
48
MODE_CFG0
47
MIICSCL1 46
MIICSDA1 45
DP_V12
11
VCCK
43
SWR_VCCK
15
GND 16
SWR_LX
17
SWR_VDD
18
PVCC
22
TESTMODE
2
DP_REXT
12
PAD 49
LX8
FBMA-L11-201209-221LMA30T_0805
LVDS@ LX8
FBMA-L11-201209-221LMA30T_0805
LVDS@
12
RX35
100K_0402_5%
@RX35
100K_0402_5%
@
12
RX30
100K_0402_5%
@
RX30
100K_0402_5%
@
12
S
G
D
QX6A
DMN66D0LDW-7_SOT363-6
LVDS@
S
G
D
QX6A
DMN66D0LDW-7_SOT363-6
LVDS@
5
34
RX6 0_0402_5%@RX6 0_0402_5%@
1 2
CX38 0.1U_0402_10V7KCX38 0.1U_0402_10V7K
1 2
RX50 0_0402_5%eDP@RX50 0_0402_5%eDP@
1 2
CX46 0.1U_0402_10V7KCX46 0.1U_0402_10V7K
1 2
RX36
100K_0402_5%
@RX36
100K_0402_5%
@
12
RX40 0_0402_5%eDP@RX40 0_0402_5%eDP@
1 2
RX41 0_0402_5%eDP@RX41 0_0402_5%eDP@
1 2
RX43 0_0402_5%eDP@RX43 0_0402_5%eDP@
1 2
CX40
0.1U_0402_10V7K
LVDS@CX40
0.1U_0402_10V7K
LVDS@
1
2
RX4
0_0805_1%
@
RX4
0_0805_1%
@
1 2
RX171
4.7K_0402_5%
@
RX171
4.7K_0402_5%
@
12
RX49 0_0402_5%eDP@RX49 0_0402_5%eDP@
1 2
RX48 0_0402_5%eDP@RX48 0_0402_5%eDP@
1 2
CX42 0.1U_0402_10V7KCX42 0.1U_0402_10V7K
1 2
RX38 0_0402_5%eDP@RX38 0_0402_5%eDP@
1 2
RX52 0_0402_5%eDP@RX52 0_0402_5%eDP@
1 2
RP57
2.2K_8P4R_5%
@RP57
2.2K_8P4R_5%
@
1 8
2 7
3 6
4 5
CX44 0.1U_0402_10V7KCX44 0.1U_0402_10V7K
1 2
CX41
0.1U_0402_10V7K
LVDS@CX41
0.1U_0402_10V7K
LVDS@
1
2
CX32
0.1U_0402_10V7K
LVDS@CX32
0.1U_0402_10V7K
LVDS@
1
2
CX37
0.1U_0402_10V7K
LVDS@CX37
0.1U_0402_10V7K
LVDS@
1
2
RX170
4.7K_0402_5%
LVDS@
RX170
4.7K_0402_5%
LVDS@
12
RX33
100K_0402_5%
LVDS@RX33
100K_0402_5%
LVDS@
12
CX45
10U_0603_6.3V6M
LVDS@CX45
10U_0603_6.3V6M
LVDS@
1
2
CX36
22U_0805_6.3V6M
LVDS@CX36
22U_0805_6.3V6M
LVDS@
1
2
RX39 0_0402_5%eDP@RX39 0_0402_5%eDP@
1 2
RX45 0_0402_5%eDP@RX45 0_0402_5%eDP@
1 2
RX51 0_0402_5%eDP@RX51 0_0402_5%eDP@
1 2
RX42 0_0402_5%eDP@RX42 0_0402_5%eDP@
1 2
G
S
D
QX6B
DMN66D0LDW-7_SOT363-6
LVDS@
G
S
D
QX6B
DMN66D0LDW-7_SOT363-6
LVDS@
61
2
RX5 12K_0402_1%
LVDS@
RX5 12K_0402_1%
LVDS@
1 2
CX43 0.1U_0402_10V7KCX43 0.1U_0402_10V7K
1 2
RP56
2.2K_8P4R_5%
LVDS@RP56
2.2K_8P4R_5%
LVDS@
1 8
2 7
3 6
4 5
CX47
0.1U_0402_10V7K
LVDS@CX47
0.1U_0402_10V7K
LVDS@
1
2
CX35
10U_0603_6.3V6M
LVDS@CX35
10U_0603_6.3V6M
LVDS@
1
2
LX7
FBMA-L11-201209-221LMA30T_0805
LVDS@ LX7
FBMA-L11-201209-221LMA30T_0805
LVDS@
12
CX48
22U_0805_6.3V6M
LVDS@CX48
22U_0805_6.3V6M
LVDS@
1
2
CX39 0.1U_0402_10V7KCX39 0.1U_0402_10V7K
1 2

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
W=40mils
Place close to JHDMI1
TMDS_TXCP
TMDS_L_TX0P
TMDS_L_TX1N
TMDS_L_TX0N
TMDS_L_TX1P
TMDS_L_TXCP
TMDS_TXCN TMDS_L_TXCN
TMDS_TX0N
TMDS_TX1P
TMDS_TX1N
TMDS_TX0P
CPU_DPB_CTRLDAT_R
CPU_DPB_CTRLCLK_R
TMDS_L_TX1N
TMDS_L_TX1P
TMDS_L_TX0P
TMDS_L_TX2N
TMDS_L_TX2P
TMDS_L_TX0N
TMDS_L_TXCN
TMDS_L_TXCP
HDMI_HPLUG
TMDS_TX1N
TMDS_TX2P
TMDS_TX2N
TMDS_TX1P
TMDS_L_TX1N
TMDS_L_TX1P
TMDS_L_TX0P
TMDS_L_TX2N
TMDS_L_TX2P
TMDS_L_TX0N
TMDS_L_TXCN
TMDS_L_TXCP
TMDS_TX2N
TMDS_TX2P TMDS_L_TX2P
TMDS_L_TX2N
CPU_DPB_CTRLCLK_R
CPU_DPB_CTRLDAT_R
TMDS_TXCN
TMDS_TXCP
TMDS_TX0P
TMDS_TX0N
HDMI_HPLUG
CPU_DPB_CTRLCLK<10>
CPU_DPB_CTRLDAT<10>
DPB_HPD<10>
DDI1_LANE_N3<6>
DDI1_LANE_P3<6>
DDI1_LANE_N2<6>
DDI1_LANE_P2<6>
DDI1_LANE_P1<6>
DDI1_LANE_N1<6>
DDI1_LANE_P0<6>
DDI1_LANE_N0<6>
+VDISPLAY_VCC
+3VS
+3VS
+3VS
+5VS
+3VS
+5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
HDMI
20 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
HDMI
20 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
HDMI
20 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
CX12 0.1U_0402_10V7KCX12 0.1U_0402_10V7K
12
CX23 3.3P_0402_50V8C@EMI@ CX23 3.3P_0402_50V8C@EMI@
1 2
S
G
D
QX4A
DMN66D0LDW-7_SOT363-6
S
G
D
QX4A
DMN66D0LDW-7_SOT363-6
5
34
LX4
WCM-2012HS-900T_4P
EMI@LX4
WCM-2012HS-900T_4P
EMI@
1
122
33
4
4
FX1
1.5A_6V_1206L150PR~D
FX1
1.5A_6V_1206L150PR~D
12
CX22
10U_0603_6.3V6M
CX22
10U_0603_6.3V6M
1
2
CX29 3.3P_0402_50V8C@EMI@ CX29 3.3P_0402_50V8C@EMI@
1 2
RX12
10K_0402_5%
RX12
10K_0402_5%
12
RX34
20K_0402_5%
@
RX34
20K_0402_5%
@
12
CX14 0.1U_0402_10V7KCX14 0.1U_0402_10V7K
12
CX28 3.3P_0402_50V8C@EMI@ CX28 3.3P_0402_50V8C@EMI@
1 2
LX2
WCM-2012HS-900T_4P
EMI@LX2
WCM-2012HS-900T_4P
EMI@
1
122
33
4
4
LX3
WCM-2012HS-900T_4P
EMI@LX3
WCM-2012HS-900T_4P
EMI@
1
122
33
4
4
CX20
220P_0402_50V8J
CX20
220P_0402_50V8J
1
2
CX18 0.1U_0402_10V7KCX18 0.1U_0402_10V7K
12
G
D
S
QX3
2N7002K_SOT23-3
G
D
S
QX3
2N7002K_SOT23-3
2
13
CX27 3.3P_0402_50V8C@EMI@ CX27 3.3P_0402_50V8C@EMI@
1 2
RX14
100K_0402_5%
RX14
100K_0402_5%
12
RX15
150K_0402_5%
RX15
150K_0402_5%
1 2
RP58
680_8P4R_5%
RP58
680_8P4R_5%
18
27
36
45
RP59
680_8P4R_5%
RP59
680_8P4R_5%
18
27
36
45
CX24 3.3P_0402_50V8C@EMI@ CX24 3.3P_0402_50V8C@EMI@
1 2
CX21
0.1U_0402_16V7K
CX21
0.1U_0402_16V7K
1
2
LX5
WCM-2012HS-900T_4P
EMI@LX5
WCM-2012HS-900T_4P
EMI@
1
122
33
4
4
RX17
2.2K_0402_5%
RX17
2.2K_0402_5%
1 2
CX16 0.1U_0402_10V7KCX16 0.1U_0402_10V7K
12
G
S
D
QX4B
DMN66D0LDW-7_SOT363-6
G
S
D
QX4B
DMN66D0LDW-7_SOT363-6
61
2
RX16
2.2K_0402_5%
RX16
2.2K_0402_5%
1 2
CX26 3.3P_0402_50V8C@EMI@ CX26 3.3P_0402_50V8C@EMI@
1 2
RX13
100K_0402_5%
RX13
100K_0402_5%
12
CX19 0.1U_0402_10V7KCX19 0.1U_0402_10V7K
12
CX30 3.3P_0402_50V8C@EMI@ CX30 3.3P_0402_50V8C@EMI@
1 2
CX15 0.1U_0402_10V7KCX15 0.1U_0402_10V7K
12
JHDMI
LOTES_ABA-HDM-022-K01
CONN@
JHDMI
LOTES_ABA-HDM-022-K01
CONN@
D2+
1D2_shield
2D2-
3D1+
4D1_shield
5D1-
6D0+
7D0_shield
8D0-
9CK+
10 CK_shield
11 CK-
12 CEC
13 Reserved
14 SCL
15 SDA
16 DDC/CEC_GND
17 +5V
18 HP_DET
19
GND 20
GND 21
GND 22
GND 23
E
B
C
QX5
MMBT3904_NL_SOT23-3
E
B
C
QX5
MMBT3904_NL_SOT23-3
2
3 1
CX17 0.1U_0402_10V7KCX17 0.1U_0402_10V7K
12
CX13 0.1U_0402_10V7KCX13 0.1U_0402_10V7K
12
CX25 3.3P_0402_50V8C@EMI@ CX25 3.3P_0402_50V8C@EMI@
1 2

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
1.5A
Reserve 10K pull LAN_IO
W=20mils
These caps close to Pin 8,30
For 8106E pop capacitor close to pin 8,30
These caps close to Pin 23,32
For 8106E pop the capacitor close pin 23,32
Place close to TCT pin
+LAN_IO rising time : >1ms and <100ms
W=40mils
W=40mils
CL30, CL31 close to UL1 Pin 17, 18
For GCLK
Change CPN to SP050007J00 only
Need CIS symbol
APL3512 PIN 4 tire to VIN
W=40mils
Css
1nF
10nF
SS table
0.1uF
Tss
1mS
10mS
100mS
1mS
Open or
tied to
VIN
XTLO
XTLI
ISOLATEB
PCIE_W AKE#
PCIE_W AKE# XTLO
XTLI
ISOLATEB
LAN_CLKREQ#
WOL_EN
MCT1
MCT0
MCT1
MDO1+
MDO1-
MDI0-
MDI0+
MDO0-
MDO0+
MDI1+
MDI1-
MCT0
MDO0-
MDO1+
MDO1-
MDO0+
PCIE_PTX_LANRX_P3
PCIE_PTX_LANRX_N3
MDI1-
MDI1+
MDI0-
MDI0+PCIE_PRX_LANTX_P3_C
PCIE_PRX_LANTX_N3_C
XTLI
WOL_EN
PLT_RST#<10,26,30,48,6>
PCIE_W AKE#<10,30>
PCIE_PTX_LANRX_P3<12>
PCIE_PTX_LANRX_N3<12>
CLK_PCIE_LAN <9>
CLK_PCIE_LAN# <9>
LAN_CLKREQ# <9>
PCIE_PRX_LANTX_P3<12>
PCIE_PRX_LANTX_N3<12>
XTLI<29>
WOL_EN<30>
+LAN_VDD
+LAN_VDD
+LAN_IO
+LAN_VDD
+LAN_IO
+3VS
+LAN_IO
+LAN_IO
+3VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9984P
1.0
21 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
LAN RTL8106E
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9984P
1.0
21 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
LAN RTL8106E
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9984P
1.0
21 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
LAN RTL8106E
CL33
10P_1206_2KV8J
EMI@
CL33
10P_1206_2KV8J
EMI@
1
2
UL2
APL3512ABI-TRG_SOT23-5
UL2
APL3512ABI-TRG_SOT23-5
VIN
5
SS
4
VOUT 1
EN 3
GND 2
CL15
0.1U_0402_10V7K
CL15
0.1U_0402_10V7K
1
2
RL20
75_0603_5%
RL20
75_0603_5%
1 2
RL19
75_0603_5%
RL19
75_0603_5%
1 2
CL37
10P_0402_50V8J
XTAL@
CL37
10P_0402_50V8J
XTAL@
1 2
CL22
0.1U_0402_10V7K
CL22
0.1U_0402_10V7K
1
2
T95 PAD~D@T95 PAD~D@
UL1
RTL8106E-CG_QFN32_4X4
UL1
RTL8106E-CG_QFN32_4X4
MDIP0 1
MDIP1 4
MDIN0 2
MDIN1 5
AVDD10 8
AVDD10 30
AVDD33 32
DVDD33 23
REFCLK_P 15
REFCLK_N 16
CLKREQB 12
CKXTAL1 28
CKXTAL2 29
LED0 27
LED1 25
RSET 31
GND 33
HSOP
17
HSON
18
HSIP
13
HSIN
14
PERSTB
19
ISOLATEB
20
LANWAKEB
21
GPO
26
NC
3
NC
6
NC
7
NC
9
NC
10
NC
11
NC
22
NC
24
CL31 0.1U_0402_10V7KCL31 0.1U_0402_10V7K
1 2
JP3
2MM
@JP3
2MM
@
2 1
CL30 0.1U_0402_10V7KCL30 0.1U_0402_10V7K
1 2
TL1
X'FORM_ NS0014
TL1
X'FORM_ NS0014
RD+
1
RD-
2
CT
3
CT
6
TD+
7
TD-
8TX- 9
TX+ 10
CT 11
CT 14
RX- 15
RX+ 16
NC
4
NC
5NC 13
NC 12
CL35
1U_0402_6.3V6K
CL35
1U_0402_6.3V6K
1
2
CL34
0.1U_0402_10V7K
CL34
0.1U_0402_10V7K
1
2
JLAN
SANTA_130456-311
CONN@
JLAN
SANTA_130456-311
CONN@
PR1-
2
PR1+
1
PR2+
3
PR3+
4
PR3-
5
PR2-
6
PR4+
7
PR4-
8
SHLD2 10
SHLD1 9
YL2
25MHZ_10PF_7V25000014
XTAL@YL2
25MHZ_10PF_7V25000014
XTAL@
OSC
1
OSC
3
GND 2
GND 4
T96PAD~D @T96PAD~D @
RL37 10K_0402_5%
@
RL37 10K_0402_5%
@
1 2
CL26
0.1U_0402_10V7K
CL26
0.1U_0402_10V7K
1
2
CL20
0.1U_0402_10V7K
CL20
0.1U_0402_10V7K
1
2
CL36
10P_0402_50V8J
XTAL@
CL36
10P_0402_50V8J
XTAL@
1 2
RL33
1K_0402_5%
RL33
1K_0402_5%
12
CL41
0.01U_0402_16V7K
CL41
0.01U_0402_16V7K
1
2
CL39
1U_0402_6.3V6K
CL39
1U_0402_6.3V6K
1
2
RL34
10K_0402_5%
RL34
10K_0402_5%
1 2
RL31 2.49K_0402_1%RL31 2.49K_0402_1%
12
CL38
0.1U_0603_25V7K
@
CL38
0.1U_0603_25V7K
@
1
2
T94 PAD~D@T94 PAD~D@
RL35
15K_0402_5%
RL35
15K_0402_5%
1 2
RL27
100K_0402_5%
RL27
100K_0402_5%
1 2
CL19
0.1U_0402_10V7K
CL19
0.1U_0402_10V7K
1
2
RL38 10K_0402_5%
@
RL38 10K_0402_5%
@
1 2

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CA53, CA55 change Value
from 10U_0603_6.3V6M~D to
4.7U_0603_6.3V6K
GNDA GND
40mil
40mil
CA71, CA51 place close to Pin 26
CA57,CA58 close
to UA1 pin1
Place on the moat between GND & GNDA.
iPhone and Nokia type Combo Jack
Trace width for SPK-L+/SPK-L-/SPK-R+/SPK-R-
Speaker 4 ohm : 40mil
Speaker 8 ohm : 20mil
Reserve for cancel Delay circutis
RA51, RA33 place close to UA1
JACK_PLUG Delay circutis
PC Beep
MCU Beep
EC Beep
close to Codec
Close to UA1
Pin11,13,14,16
Reserve for HDA issue
SM01000BV00
need CIS symbol
AUD_HP_OUT_L_CN
AUD_HP_OUT_R_CN
JACK_PLUG#
JACK_SENSE#
JACK_PLUG#
RING2_R
MIC_IN_R
JACK_PLUG#
MIC_IN
RING2
RING2
MIC1-L
EC_MUTE#
MIC_CLK_C
MIC_CLK
Line1-VREFO-R
Line1-VREFO-L
MIC_IN
AUD_HP_OUT_R_CN
HPOUT-L AUD_HP_OUT_L_CN
MIC_IN_R
RING2_R
HPOUT-R
+MIC2-VREFO
JACK_SENSE#
LINE1-L
LINE1-R
LINE1-R
LINE1-L
Line-IN-R
Line-IN-L
PC_BEEP
PC_BEEP
INT-SPK-R-
INT-SPK-R+
INT-SPK-L-
INT-SPK-L+
HPOUT-L
HPOUT-R
Line1-VREFO-L
Line1-VREFO-R
RING2
MIC_IN
PCH_AZ_CODEC_RST#
SPK_R1-_CONN
SPK_L1-_CONN
SPK_R2+_CONN
SPK_L2+_CONN
MIC_IN
JACK_SENSE#
PCH_AZ_CODEC_BITCLK
INT-SPK-L-
INT-SPK-L+
INT-SPK-R-
INT-SPK-R+
Line-IN-L
Line-IN-R
MIC_CLK_C
EC_MUTE# <30>
BEEP#<30>
MIC_DATA <31>
MIC_CLK <31>
PCH_AZ_CODEC_SDOUT<8>
PCH_AZ_CODEC_BITCLK<8>
PCH_AZ_CODEC_SYNC<8>
PCH_AZ_CODEC_RST#<8>
PCH_AZ_CODEC_SDIN0<8>
HDA_SPKR<11>
+3VS +3VS
+MIC2-VREFO
+MIC2-VREFO
+5V_PVDD+5V_PVDD +5VA
+3VS
+3VS
+3VS
+CODEC_AVDD2
+3VS +CODEC_AVDD2+1.5VS
+5VA
+5VS+5V_PVDD
+5VS
+RTCVCC
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
22 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
Audio Codec ALC3223
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
22 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
Audio Codec ALC3223
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
22 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
Audio Codec ALC3223
RA166
4.7K_0402_5%
RA166
4.7K_0402_5%
12
CA59
4.7U_0603_6.3V6K
CA59
4.7U_0603_6.3V6K
1
2
RA5
470K_0402_5%
RA5
470K_0402_5%
12
RA84
10K_0402_5%
RA84
10K_0402_5%
12
CA54
0.1U_0402_16V7K
CA54
0.1U_0402_16V7K
1
2
CA53
4.7U_0603_6.3V6K
CA53
4.7U_0603_6.3V6K
1
2
LA7 FBMA-L10-160808-800LMT_2P
EMI@
LA7 FBMA-L10-160808-800LMT_2P
EMI@
12
CA74 10U_0603_6.3V6MCA74 10U_0603_6.3V6M
1 2
CA30
1000P_0402_50V7K
EMI@ CA30
1000P_0402_50V7K
EMI@
1
2
RA32 0_0603_1%@RA32 0_0603_1%@
1 2
RA1
100K_0402_5%
@
RA1
100K_0402_5%
@
12
LA6 0_0603_5%EMI@ LA6 0_0603_5%EMI@
1 2
RA19
10K_0402_5%
@
RA19
10K_0402_5%
@
12
CA2
10U_0603_6.3V6M
@
CA2
10U_0603_6.3V6M
@
1
2
RA8 0_0402_5%RA8 0_0402_5%
1 2
CA57
4.7U_0603_6.3V6K
CA57
4.7U_0603_6.3V6K
1
2
UA1
ALC3223-CG_MQFN48_6X6~D
UA1
ALC3223-CG_MQFN48_6X6~D
AVSS1
25
AVDD1
26
LDO1-CAP
27
VREF
28
MIC2-VREFO
29 MIC1-VREFO-R
30 MIC1-VREFO-L
31
HPOUT-L(PORT-I-L) 32
HPOUT-R(PORT-I-R) 33
PVDD1
41
AVDD2
40
LDO2-CAP
39
AVSS2
38
CBP
37
CPVDD
36
CBN
35
CPVEE
34
SPK-OUT-L+ 42
SPK-OUT-L- 43
SPK-OUT-R- 44
SPK-OUT-R+ 45
PVDD2
46
PDB 47
LINE2-L(PORT-E-L) 24
LINE2-R(PORT-E-R) 23
LINE1-L(PORT-C-L) 22
LINE1-R(PORT-C-R) 21
MIC1-R(PORT-B-R) 20
MIC1-L(PORT-B-L) 19
MIC2-R(PORT-F-R) 18
MIC2-L(PORT-F-L) 17
MONO-OUT 16
JDREF
15
SENSE B 14
SENSE A 13
SPDIF-OUT/GPIO2 48
PCBEEP 12
RESETB
11 SYNC
10
DVDD-IO
9
SDATA-IN
8
LDO3-CAP
7
DVDD
1
GPIO0/DMIC-DATA 2
GPIO1/DMIC-CLK 3
DVSS
4
BCLK
6SDATA-OUT
5
Thermal PAD
49
CA38
100P_0402_50V8J
EMI@CA38
100P_0402_50V8J
EMI@
1
2
DA12
AZ5125-02S.R7G_SOT23-3
ESD@
DA12
AZ5125-02S.R7G_SOT23-3
ESD@
2
3
1
CA62 10U_0603_6.3V6MCA62 10U_0603_6.3V6M
1 2
G
S
D
QA6B
DMN66D0LDW-7_SOT363-6
G
S
D
QA6B
DMN66D0LDW-7_SOT363-6
61
2
RA82 1K_0402_1%RA82 1K_0402_1%
1 2
RA29 0_0603_1%@RA29 0_0603_1%@
1 2
CA67
4.7U_0603_6.3V6K
CA67
4.7U_0603_6.3V6K
1 2
RV59
0_0603_1%@
RV59
0_0603_1%@
12
JSPK
E&T_3703-Q04N-11R
CONN@
JSPK
E&T_3703-Q04N-11R
CONN@
1
1
2
2
3
3
4
4GND 5
GND 6
RA81 10K_0402_5%@RA81 10K_0402_5%@
12
CA55
4.7U_0603_6.3V6K
CA55
4.7U_0603_6.3V6K
1
2
DA8
BAT54C-7-F_SOT23-3
DA8
BAT54C-7-F_SOT23-3
2
3
1
CA29
1000P_0402_50V7K
EMI@ CA29
1000P_0402_50V7K
EMI@
1
2
CA60
0.1U_0402_16V7K
CA60
0.1U_0402_16V7K
1
2
S
G
D
QA5A
DMN66D0LDW-7_SOT363-6
@
S
G
D
QA5A
DMN66D0LDW-7_SOT363-6
@
5
34
R2355
0_0402_5%
@EMI@
R2355
0_0402_5%
@EMI@
1 2
CA40
100P_0402_50V8J
EMI@CA40
100P_0402_50V8J
EMI@
1
2
S
G
D
QA6A
DMN66D0LDW-7_SOT363-6
S
G
D
QA6A
DMN66D0LDW-7_SOT363-6
5
34
G
S
D
QA5B
DMN66D0LDW-7_SOT363-6
@
G
S
D
QA5B
DMN66D0LDW-7_SOT363-6
@
61
2
RA130 22_0402_5%RA130 22_0402_5%
1 2
LA5 0_0603_5%EMI@ LA5 0_0603_5%EMI@
1 2
RA53 2.2K_0402_5%RA53 2.2K_0402_5%
12
RA6 10K_0402_5%
@
RA6 10K_0402_5%
@
1 2
LA8 FBMA-L10-160808-800LMT_2P
EMI@
LA8 FBMA-L10-160808-800LMT_2P
EMI@
12
CA33
100P_0402_50V8J
EMI@CA33
100P_0402_50V8J
EMI@
1
2
CA39
100P_0402_50V8J
EMI@CA39
100P_0402_50V8J
EMI@
1
2
RA4 0_0402_1%@RA4 0_0402_1%@
1 2
CA25 1U_0402_6.3V6KCA25 1U_0402_6.3V6K
1 2
RA55
8.2_0402_1%
RA55
8.2_0402_1%
1 2
DA10
AZ5125-02S.R7G_SOT23-3
ESD@
DA10
AZ5125-02S.R7G_SOT23-3
ESD@
2
3
1
RA56
8.2_0402_1%
RA56
8.2_0402_1%
1 2
JHP
SINGA_2SJ3080-000111F
CONN@
JHP
SINGA_2SJ3080-000111F
CONN@
1
3
2
5
4
6
7
RA153 20K_0402_1%RA153 20K_0402_1%
1 2
LA4 0_0603_5%EMI@ LA4 0_0603_5%EMI@
1 2
CA65
0.1U_0402_16V7K
CA65
0.1U_0402_16V7K
1 2
CA24 1U_0402_6.3V6KCA24 1U_0402_6.3V6K
1 2
CA1
10U_0603_6.3V6M
@
CA1
10U_0603_6.3V6M
@
1
2
CA58
0.1U_0402_16V7K
CA58
0.1U_0402_16V7K
1
2
RA83
10K_0402_5%
RA83
10K_0402_5%
12
RA3
10K_0402_5%
@
RA3
10K_0402_5%
@
1 2
LA3 0_0603_5%EMI@ LA3 0_0603_5%EMI@
1 2
RA31 0_0603_1%@RA31 0_0603_1%@
1 2
RA7 10K_0402_5%RA7 10K_0402_5%
1 2
RA30 0_0603_1%@RA30 0_0603_1%@
1 2
CA32
1000P_0402_50V7K
EMI@ CA32
1000P_0402_50V7K
EMI@
1
2
RA1109 2.2K_0402_5%RA1109 2.2K_0402_5%
12
RV54
0_0603_1%@
RV54
0_0603_1%@
12
LA10 FBMA-L10-160808-800LMT_2P
EMI@
LA10 FBMA-L10-160808-800LMT_2P
EMI@
12
RA165
4.7K_0402_5%
RA165
4.7K_0402_5%
12
CA51
0.1U_0402_16V7K
CA51
0.1U_0402_16V7K
1
2
CA21
22P_0402_50V8J
@EMI@
CA21
22P_0402_50V8J
@EMI@
1
2
CA23 2.2U_0603_6.3V6KCA23 2.2U_0603_6.3V6K
1 2
CA56
0.1U_0402_16V7K
CA56
0.1U_0402_16V7K
1
2
CA71
4.7U_0603_6.3V6K
CA71
4.7U_0603_6.3V6K
1
2
RA79
1K_0402_1%
RA79
1K_0402_1%
1 2
RA9 0_0402_5%@RA9 0_0402_5%@
1 2
LA1
BLM15BB221SN1D_2P
EMI@LA1
BLM15BB221SN1D_2P
EMI@
1 2
LA9 FBMA-L10-160808-800LMT_2P
EMI@
LA9 FBMA-L10-160808-800LMT_2P
EMI@
12
RA51 39.2K_0402_1%RA51 39.2K_0402_1%
1 2
RA2
100K_0402_5%
@
RA2
100K_0402_5%
@
12
CA61
4.7U_0603_6.3V6K
CA61
4.7U_0603_6.3V6K
1
2
RA80 1K_0402_1%RA80 1K_0402_1%
1 2
CA68
4.7U_0603_6.3V6K
CA68
4.7U_0603_6.3V6K
1 2
CA69 100P_0402_50V8J@CA69 100P_0402_50V8J@
1 2
CA63 10U_0603_6.3V6MCA63 10U_0603_6.3V6M
1 2
CA31
1000P_0402_50V7K
EMI@ CA31
1000P_0402_50V7K
EMI@
1
2
CA22
22P_0402_50V8J
@EMI@
CA22
22P_0402_50V8J
@EMI@
1
2
CA64 10U_0603_6.3V6MCA64 10U_0603_6.3V6M
1 2

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
close to chip side
Trace width:40mil
MS_D2_SD_CLK Conn pin 13 SD_CLK
Via pin 10 MS_D2
MS_CLK_SD_WP Conn pin 5 MS_CLK
Via pin 20 SD_W
Close to JREAD
For EMI request.
Place close to JREAD
For EMI request. Place close to UR1
SD_D1
SD_D0
MS_CLK_SD_WP
MS_BS
MS_D2_SD_CLK
MS_D1_SD_D3
MS_D0
MS_D2_SD_CLK
MS_INS#
MS_D3
SD_CMD
MS_CLK_SD_WP
MS_D1_SD_D3
SD_D2
SD_CD#
USB20_CR_P6 USB20_CR_P6_R
USB20_CR_N6_RUSB20_CR_N6
MS_BS
SD_D2
MS_D1_SD_D3
SD_CMD
MS_D0
MS_D2_SD_CLK_R MS_D2_SD_CLK
SD_CD#
MS_D3
SD_D0
SD_D1
MS_INS#
MS_CLK_SD_WP_R MS_CLK_SD_WPV18
RREF
USB20_CR_P6_R
USB20_CR_N6_R
SD_CMD
SD_CD# MS_INS#
USB20_CR_P6<12>
USB20_CR_N6<12>
+VCC_3IN1
+3VS
+VCC_3IN1
+VCC_3IN1+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
23 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
Card Reader RTS5179
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
23 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
Card Reader RTS5179
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
23 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
Card Reader RTS5179
LR2
WCM-2012HS-900T_4P
EMI@
LR2
WCM-2012HS-900T_4P
EMI@
1
122
33
4
4
RR3
22_0402_5%
EMI@
RR3
22_0402_5%
EMI@
1 2
JREAD
T-SOL_143-2300302602_RV
CONN@
JREAD
T-SOL_143-2300302602_RV
CONN@
SD-CD
20 SD-DAT1
19 SD-DAT0 MMC-DAT
18
MS-VSS2
16
SD-VSS MMC-VSS2
17
MS-BS
15
MS-DATA1
13
SD-CLK MMC-CLK
14
MS-DATA0
12 SD-VDD MMC-VDD
11 MS-DATA2
10 SD-VSS MMC-VSS1
9MS-INS
8MS-DATA3
7
MS-SCLK
5MS-VCC
4SD-CD/DAT3 MMC-RSV
3
SD-CMD MMC-CMD
6
SD-DAT2
1
MS-VSS1
2
SD-GND
21 GND1 23
GND2 24
SD-WP(SW)
22
CR3
1U_0402_6.3V6K
CR3
1U_0402_6.3V6K
1
2
CR10
22P_0402_50V8J
EMI@CR10
22P_0402_50V8J
EMI@
1
2
CR8
4.7U_0603_6.3V6K
CR8
4.7U_0603_6.3V6K
1
2
RR2
22_0402_5%
EMI@
RR2
22_0402_5%
EMI@
1 2
CR9
22P_0402_50V8J
EMI@CR9
22P_0402_50V8J
EMI@
1
2
CR5
5P_0402_50V8C
EMI@
CR5
5P_0402_50V8C
EMI@
1
2
CR1
0.1U_0402_10V7K
CR1
0.1U_0402_10V7K
1
2
CR2
4.7U_0603_6.3V6K
CR2
4.7U_0603_6.3V6K
1
2
CR4
1U_0402_6.3V6K
CR4
1U_0402_6.3V6K
1
2
RR1 6.19K_0402_1%RR1 6.19K_0402_1%
12
CR7
0.1U_0402_10V7K
CR7
0.1U_0402_10V7K
1
2
CR11
22P_0402_50V8J
EMI@CR11
22P_0402_50V8J
EMI@
1
2
CR6
5P_0402_50V8C
EMI@
CR6
5P_0402_50V8C
EMI@
1
2
RTS5179-GR_QFN24
UR1
RTS5179-GR_QFN24_4X4
RTS5179-GR_QFN24
UR1
RTS5179-GR_QFN24_4X4
RREF
1
DM
2
DP
3
3V3_IN 4
CARD_3V3 5
V18
24
XD_CD#
7
SDREG
6
XD_D7
23
Thermal pad
25
GPIO0
17
SP14 22
SP13 21
SP12 20
SP11 19
SP10 18
SP9 16
SP8 15
SP7 14
SP6 13
SP5 12
SP4 11
SP3 10
SP2 9
SP1 8

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
2.0A
2.0A
USB connector1
USB20 port1
USB30 port2
USB connector2
USB20 port0
USB30 port1
80mil
80mil
USB20_JUSB1_P1_R
USB20_JUSB1_N1_R
USB_OC0#USB_EN#
USB3RP2_JUSB1
USB3RN2_JUSB1
USB3RP1_JUSB2_RUSB3RP1_JUSB2
USB3RN1_JUSB2_RUSB3RN1_JUSB2
USB_EN# USB_OC0#
USB20_JUSB2_P0_R
USB20_JUSB2_N0_R
USB3TN2_JUSB1_C
USB3TP2_JUSB1_C USB3TP2_JUSB1_R
USB3TN2_JUSB1_R
USB20_JUSB1_N1_RUSB20_JUSB1_N1
USB20_JUSB1_P1_R
USB3TN2_JUSB1
USB3TP2_JUSB1
USB20_JUSB1_P1
USB3TP2_JUSB1_R
USB3RP2_JUSB1_R
USB3RN2_JUSB1_R
USB3TN2_JUSB1_RUSB3TN2_JUSB1_R
USB3TP2_JUSB1_R
USB3RN2_JUSB1_R
USB3RP2_JUSB1_R
USB3RP2_JUSB1_R
USB3TN2_JUSB1_R
USB3TP2_JUSB1_R
USB3RN2_JUSB1_R
USB3RP1_JUSB2_R
USB3TN1_JUSB2_R
USB3TP1_JUSB2_R
USB3RN1_JUSB2_R
USB20_JUSB2_N0_RUSB20_JUSB2_N0
USB20_JUSB2_P0
USB3TN1_JUSB2_C
USB3TP1_JUSB2_C USB3TP1_JUSB2_R
USB3TN1_JUSB2_RUSB3TN1_JUSB2
USB3TP1_JUSB2
USB20_JUSB2_P0_R
USB3RP1_JUSB2_R
USB3TP1_JUSB2_R
USB3RN1_JUSB2_R
USB3TN1_JUSB2_R
USB3TP1_JUSB2_R
USB3RP1_JUSB2_R
USB3TN1_JUSB2_R
USB3RN1_JUSB2_R
USB3RP2_JUSB1_R
USB3RN2_JUSB1_R
USB_EN#<25,30>
USB20_JUSB1_P1<12>
USB20_JUSB1_N1<12>
USB20_JUSB2_P0<12>
USB20_JUSB2_N0<12>
USB3RN1_JUSB2<12>
USB3TN1_JUSB2<12>
USB3TN2_JUSB1<12>
USB3RP1_JUSB2<12>
USB3RP2_JUSB1<12>
USB3TP2_JUSB1<12>
USB3TP1_JUSB2<12>
USB3RN2_JUSB1<12>
USB_OC0# <12>
+5V_USB_PWR1
+5V_USB_PWR1
+5VALW
+5V_USB_PWR2
+5VALW
+5V_USB_PWR2
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
24 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
USB3.0
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
24 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
USB3.0
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
24 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
USB3.0
LI6
DLW21SN670HQ2L_4P
EMI@LI6
DLW21SN670HQ2L_4P
EMI@
1 2
34
CI12
4.7U_0805_10V4Z
CI12
4.7U_0805_10V4Z
1
2
DI1
IP4292CZ10-TBR_XSON10_2.5X1~D
ESD@
DI1
IP4292CZ10-TBR_XSON10_2.5X1~D
ESD@
4
5
1
6
2
7
3
10
9
8
LI2
WCM-2012HS-900T_4P
EMI@
LI2
WCM-2012HS-900T_4P
EMI@
1
122
33
4
4
CI13
0.1U_0402_16V7K
CI13
0.1U_0402_16V7K
1
2
CI6
4.7U_0805_10V4Z
CI6
4.7U_0805_10V4Z
1
2
CI2
0.1U_0402_16V7K
CI2
0.1U_0402_16V7K
1
2
CI15
0.1U_0402_16V7K
CI15
0.1U_0402_16V7K
1
2
CI3 0.1U_0402_10V7KCI3 0.1U_0402_10V7K
12
CI18
47U_0805_6.3V4Z
CI18
47U_0805_6.3V4Z
1
2
CI26
0.1U_0402_16V7K
CI26
0.1U_0402_16V7K
1
2
UI2
AP2301MPG-13_MSOP8
UI2
AP2301MPG-13_MSOP8
FLG 5
VIN
3VOUT 6
GND
1
EN
4
VOUT 7
VIN
2VOUT 8
EPAD
9
LI5
WCM-2012HS-900T_4P
EMI@
LI5
WCM-2012HS-900T_4P
EMI@
1
122
33
4
4
CI7
0.1U_0402_16V7K
CI7
0.1U_0402_16V7K
1
2
LI1
DLW21SN670HQ2L_4P
EMI@LI1
DLW21SN670HQ2L_4P
EMI@
1 2
34
JUSB1
ACON_TARA4-9K1311
CONN@
JUSB1
ACON_TARA4-9K1311
CONN@
SSTX-
8
SSTX+
9
GND 10
GND 11
VBUS
1
D+
3
D-
2
GND
4
SSRX-
5
SSRX+
6
GND
7
GND 13
GND 12
CI40
10U_0603_6.3V6M
CI40
10U_0603_6.3V6M
1
2
+
CI8
220U_6.3V_M
+
CI8
220U_6.3V_M
1
2
LI4
DLW21SN670HQ2L_4P
EMI@LI4
DLW21SN670HQ2L_4P
EMI@
1 2
34
JUSB2
ACON_TARA4-9K1311
CONN@JUSB2
ACON_TARA4-9K1311
CONN@
SSTX-
8
SSTX+
9
GND 10
GND 11
VBUS
1
D+
3
D-
2
GND
4
SSRX-
5
SSRX+
6
GND
7
GND 13
GND 12
CI43
10U_0603_6.3V6M
CI43
10U_0603_6.3V6M
1
2
LI3
DLW21SN670HQ2L_4P
EMI@LI3
DLW21SN670HQ2L_4P
EMI@
1 2
34
DI2
L30ESDL5V0C3-2_SOT23-3
ESD@
DI2
L30ESDL5V0C3-2_SOT23-3
ESD@
1
2
3
CI11 0.1U_0402_10V7KCI11 0.1U_0402_10V7K
12
CI9
0.1U_0402_16V7K
CI9
0.1U_0402_16V7K
1
2
CI4 0.1U_0402_10V7KCI4 0.1U_0402_10V7K
12
CI10 0.1U_0402_10V7KCI10 0.1U_0402_10V7K
12
UI3
AP2301MPG-13_MSOP8
UI3
AP2301MPG-13_MSOP8
FLG 5
VIN
3VOUT 6
GND
1
EN
4
VOUT 7
VIN
2VOUT 8
EPAD
9
CI14
0.1U_0402_16V7K
CI14
0.1U_0402_16V7K
1
2
DI5
L30ESDL5V0C3-2_SOT23-3
ESD@
DI5
L30ESDL5V0C3-2_SOT23-3
ESD@
1
2
3
CI17
0.1U_0402_16V7K
CI17
0.1U_0402_16V7K
1
2
DI4
IP4292CZ10-TBR_XSON10_2.5X1~D
ESD@
DI4
IP4292CZ10-TBR_XSON10_2.5X1~D
ESD@
4
5
1
6
2
7
3
10
9
8
+
CI1
220U_6.3V_M
+
CI1
220U_6.3V_M
1
2

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
80mil
2.0A
80mil
2.0A
USB connector3
USB20 port2
USB connector4
USB20 port3
Place close to JUSB3
SP01001AA00
SP01001EX00
Main:
2nd:
Change CONN symbol for DFB
USB20_JUSB3_P2_R
USB20_JUSB3_N2_R
USB_OC1#USB_EN#
USB20_USBDB_P3_R
USB20_USBDB_N3_RUSB20_USBDB_N3
USB20_USBDB_P3
USB_OC1#USB_EN#
USB20_JUSB3_N2_R
USB20_JUSB3_P2_R
USB20_USBDB_N3_R
USB20_USBDB_P3_R
USB20_JUSB3_P2
USB20_JUSB3_N2
USB_EN#<24,30>
USB20_USBDB_P3<12>
USB20_USBDB_N3<12>
USB_OC1# <12>
USB20_JUSB3_P2<12>
USB20_JUSB3_N2<12>
+5V_USB_PWR3
+5VALW
+5V_USB_PWR4
+5V_USB_PWR4
+5VALW
+5V_USB_PWR3
+5V_USB_PWR3
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
25 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
MB to USB2.0 DB
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
25 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
MB to USB2.0 DB
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
25 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
MB to USB2.0 DB
CI23
4.7U_0805_10V4Z
CI23
4.7U_0805_10V4Z
1
2
CI19
0.1U_0402_16V7K
CI19
0.1U_0402_16V7K
1
2
CI24
0.1U_0402_16V7K
CI24
0.1U_0402_16V7K
1
2
CI27
47U_0805_6.3V4Z
CI27
47U_0805_6.3V4Z
1
2
CI22
0.1U_0402_16V7K
CI22
0.1U_0402_16V7K
1
2
CI25
0.1U_0402_16V7K
CI25
0.1U_0402_16V7K
1
2
UI4
AP2301MPG-13_MSOP8
UI4
AP2301MPG-13_MSOP8
FLG 5
VIN
3VOUT 6
GND
1
EN
4
VOUT 7
VIN
2VOUT 8
EPAD
9
CI21
47U_0805_6.3V4Z
CI21
47U_0805_6.3V4Z
1
2
CI16
0.1U_0402_16V7K
CI16
0.1U_0402_16V7K
1
2
LI10
WCM-2012HS-900T_4P
EMI@
LI10
WCM-2012HS-900T_4P
EMI@
1
122
33
4
4
CI32
0.1U_0402_16V7K
CI32
0.1U_0402_16V7K
1
2
CI30
0.1U_0402_16V7K
CI30
0.1U_0402_16V7K
1
2
DI7
L30ESDL5V0C3-2_SOT23-3
ESD@
DI7
L30ESDL5V0C3-2_SOT23-3
ESD@
1
2
3
LI7
WCM-2012HS-900T_4P
EMI@
LI7
WCM-2012HS-900T_4P
EMI@
1
122
33
4
4
UI5
AP2301MPG-13_MSOP8
UI5
AP2301MPG-13_MSOP8
FLG 5
VIN
3VOUT 6
GND
1
EN
4
VOUT 7
VIN
2VOUT 8
EPAD
9
CI31
4.7U_0805_10V4Z
CI31
4.7U_0805_10V4Z
1
2
+
CI20
220U_6.3V_M
+
CI20
220U_6.3V_M
1
2
CI44
10U_0603_6.3V6M
CI44
10U_0603_6.3V6M
1
2
JUSB3
ACON_UARBG-4K1926
CONN@
JUSB3
ACON_UARBG-4K1926
CONN@
VBUS
1
D-
2
D+
3
GND
4
GND
5
GND
6
GND
7
GND
8
JDB
JESS_UCNR2210M008-0
CONN@
JDB
JESS_UCNR2210M008-0
CONN@
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
G1 9
G2 10

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Mini WLAN/WIMAX H=6.7
10mils, All pins
CC47 wlan connector
HDD LED
ESD solution
Battery LED
Power LED
Reserve for WLAN module LED control
Wireless LED
Reserve for WLAN module modified
BT_ON#
DDR_XDP_WLAN_TP_SMBCLK
DDR_XDP_WLAN_TP_SMBDAT
CLK_PCIE_WLAN#
CLK_PCIE_WLAN
WLAN_CLKREQ#
WL_OFF#WLAN_RADIO_DIS#_R
USB20_MINI1_N4
USB20_MINI1_P4
EC_TX
EC_RX
PCIE_PTX_WLANRX_P4_C
PCIE_PTX_WLANRX_N4_C
PLT_RST#
WL_LED#
BT_LED#
SATA_ACT#
BATT_CHG_LED#
BATT_LOW _LED#
WL_BT_LED#_ECBT_LED#
WL_BT_LED#_EC2
WL_BT_LED#_EC
WL_BT_LED#
WL_BT_LED#_EC WL_BT_LED#
WL_BT_LED
BT_LED#
WL_LED#
WL_LED#
WL_BT_LED#_EC
BT_LED#
WL_LED#
DDR_XDP_WLAN_TP_SMBCLK <17,18,19,27,6,9>
DDR_XDP_WLAN_TP_SMBDAT <17,18,19,27,6,9>
CLK_PCIE_WLAN#<9>
CLK_PCIE_WLAN<9>
WLAN_CLKREQ#<9>
EC_TX<30>
EC_RX<30>
BT_ON#<11>
PLT_RST# <10,21,30,48,6>
USB20_MINI1_N4 <12>
USB20_MINI1_P4 <12>
PCIE_PTX_WLANRX_N4<12>
PCIE_PRX_WLANTX_N4<12>
PCIE_PTX_WLANRX_P4<12>
PCIE_PRX_WLANTX_P4<12>
WL_OFF# <11>
SATA_ACT#<8>
BATT_CHG_LED#<30>
BATT_LOW _LED#<30>
PWR_PWM_LED#<30>
WL_BT_LED#_EC2 <30>
WL_BT_LED#_EC <30>
WL_BT_LED<30>
+3V_WLAN
+1.5VS
+3V_WLAN
+3VS
+3VS
+3V_WLAN+3VS
+3V_WLAN
+5VS
+3VS +CPU_CORE
+5VALW
+5VALW
+5VALW
+5VALW+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
26 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
Mini Card/LED
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
26 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
Mini Card/LED
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
26 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
Mini Card/LED
CM48
0.1U_0402_10V7K
CM48
0.1U_0402_10V7K
1
2
CM46
0.1U_0402_10V7K
CM46
0.1U_0402_10V7K
1
2
CM44 0.1U_0402_10V7KCM44 0.1U_0402_10V7K
1 2
LED2
12-21C-T3D-CM2P1B18X-2C_WHITE
LED2
12-21C-T3D-CM2P1B18X-2C_WHITE
1 2
3
RD47
100K_0402_5%
RD47
100K_0402_5%
12
RD15
390_0402_5%
RD15
390_0402_5%
1 2
RD52
100K_0402_5%
@RD52
100K_0402_5%
@
12
RD14
390_0402_5%
RD14
390_0402_5%
1 2
G
D
S
QD18
2N7002K_SOT23-3
@
G
D
S
QD18
2N7002K_SOT23-3
@
2
13
RD18
680_0402_1%
RD18
680_0402_1%
1 2
RD48
0_0402_5%
RD48
0_0402_5%
1 2
RM110
10K_0402_5%
RM110
10K_0402_5%
12
RM11
100K_0402_5%
RM11
100K_0402_5%
1 2
G
D
S
QM30
2N7002K_SOT23-3
G
D
S
QM30
2N7002K_SOT23-3
2
1 3
RD17
390_0402_5%
RD17
390_0402_5%
1 2
RD45
100K_0402_5%
RD45
100K_0402_5%
12
UD1
MC74VHC1G08DFT2G_SC70-5
@UD1
MC74VHC1G08DFT2G_SC70-5
@
IN1
1
IN2
2OUT 4
VCC 5
GND
3
RD16
680_0402_1%
RD16
680_0402_1%
1 2
CM40
0.047U_0402_16V4Z
CM40
0.047U_0402_16V4Z
1
2
RM25
0_0805_1%
@
RM25
0_0805_1%
@
1 2
CM47
0.1U_0402_10V7K
@CM47
0.1U_0402_10V7K
@
1
2
CM49 0.1U_0402_10V7KCM49 0.1U_0402_10V7K
1 2
CM45
22U_0603_6.3V6M
ESD@
CM45
22U_0603_6.3V6M
ESD@
1 2
CM43
4.7U_0603_6.3V6K
CM43
4.7U_0603_6.3V6K
1
2
G
D
S
QD19
2N7002K_SOT23-3
@
G
D
S
QD19
2N7002K_SOT23-3
@
2
13
CD63
0.1U_0402_10V7K
@CD63
0.1U_0402_10V7K
@
1 2
RD50
100K_0402_5%
RD50
100K_0402_5%
12
RD49
0_0402_5%
RD49
0_0402_5%
1 2
RM13 1K_0402_1%RM13 1K_0402_1%
12
G
D
S
QD20
2N7002K_SOT23-3
G
D
S
QD20
2N7002K_SOT23-3
2
13
JMINI
CONCR_525B01BE17A
CONN@
JMINI
CONCR_525B01BE17A
CONN@
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
GND1
53
22
44
66
88
10 10
12 12
14 14
16 16
18 18
20 20
22 22
24 24
26 26
28 28
30 30
32 32
34 34
36 36
38 38
40 40
42 42
44 44
46 46
48 48
50 50
52 52
GND2 54
White
Amber
LED3
HT-210UD5-BP5_AMBER-WHITE
White
Amber
LED3
HT-210UD5-BP5_AMBER-WHITE
2
1
3
RD51
0_0402_5%
@
RD51
0_0402_5%
@
1 2
LED4
12-21C-T3D-CM2P1B18X-2C_WHITE
LED4
12-21C-T3D-CM2P1B18X-2C_WHITE
1 2
3
RD46
100K_0402_5%
@RD46
100K_0402_5%
@
12
RM26
0_0805_1%
@
RM26
0_0805_1%
@
1 2
LED1
12-21C-T3D-CM2P1B18X-2C_WHITE
LED1
12-21C-T3D-CM2P1B18X-2C_WHITE
1 2
3

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
40mil
40mil
Power ON Circuit
ON/OFF switch
POWER/B
INT_KBD Connector
Touch pad
FAN Control circuit
TOP Side
Bottom Side
Pop only before MP
SP01000R910
SP01001BG00
Main:
2nd:
Change CONN symbol for DFB
TP_CLK
TP_DATA
KSO[0..16]
KSI[0..7]
EN_DFAN1
ON/OFFBTN#
KB_CAPS_PWR
KSI0
KSI1
KSI4
KSI2
KSI3
KSI5
KSI6
KSI7
KSO16
KSO2
KSO4
KSO3
KSO1
KSO0
KSO8
KSO7
KSO6
KSO5
KSO9
KSO10
KSO13
KSO12
KSO11
KSO14
KSO15
LID_SW#
DDR_XDP_WLAN_TP_SMBCLK
DDR_XDP_WLAN_TP_SMBDAT
TP_CLK<30>
TP_DATA<30>
ON/OFFBTN# <30>
KSO[0..16]<30>
KSI[0..7]<30>
FAN_SPEED1<30>
EN_DFAN1<30>
CAPS_LED<30>
LID_SW#<30>
DDR_XDP_WLAN_TP_SMBDAT<17,18,19,26,6,9>
DDR_XDP_WLAN_TP_SMBCLK<17,18,19,26,6,9>
+3VS
+FAN_POWER
+3VS
+5VS
+FAN_POWER
+3VLP
+5VS
+3VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
FAN/TP/PWR SW
27 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
FAN/TP/PWR SW
27 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
FAN/TP/PWR SW
27 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
JPWR
HB_A090420-SAHR21
CONN@
JPWR
HB_A090420-SAHR21
CONN@
1
1
2
2
3
3
4
4
GND 5
GND 6
CE23
1000P_0402_50V7K
CE23
1000P_0402_50V7K
1
2
RE60
240_0402_1%
RE60
240_0402_1%
1 2
SW1
SMT1-05-A_4P
SW1
SMT1-05-A_4P
3
2
1
4
5
6
RE49
100K_0402_5%
RE49
100K_0402_5%
1 2
JFAN
ACES_85204-0300N
CONN@
JFAN
ACES_85204-0300N
CONN@
1
1
2
2
3
3
GND
4
GND
5
CE24
0.01U_0402_16V7K
CE24
0.01U_0402_16V7K
1
2
UE3
APE8873M SOP 8P
UE3
APE8873M SOP 8P
VEN
1
VIN
2
GND 5
GND 6
GND 8
VO
3
VSET
4
GND 7
CE20
0.1U_0402_16V7K
CE20
0.1U_0402_16V7K
1
2
CE25
2.2U_0603_6.3V6K
CE25
2.2U_0603_6.3V6K
1 2
RE50
10K_0402_5%
RE50
10K_0402_5%
12
CE22
2.2U_0603_6.3V6K
CE22
2.2U_0603_6.3V6K
1
2
JKB
HB_A823020-SBHR21
CONN@JKB
HB_A823020-SBHR21
CONN@
1
1
4
4
2
2
5
5
3
3
8
8
7
7
6
6
10
10
9
9
11
11 12
12 13
13 14
14
17
17
16
16
19
19 20
20
15
15
22
22
21
21
18
18
23
23
25
25
24
24
26
26 27
27 28
28 29
29 30
30
GND 31
GND 32
JTP
PS_HPF10052-06M000R
CONN@
JTP
PS_HPF10052-06M000R
CONN@
1
1
2
2
3
3
4
4
5
5
6
6G1 7
G2 8
SW2
SMT1-05-A_4P
SW2
SMT1-05-A_4P
3
2
1
4
5
6

A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
+5VS and +3VS switch
For Intel S3 Power Reduction
10mil
10mil
+3VALW_PCH switch
SHORT DEFAULT
SHORT DEFAULT
SHORT DEFAULT
SUSP
SUSP#
5VS
5VS_GATE
3VS_GATE
3VS
SUSP SUSP
+3VALW_PCH_GATE
3VALW_PCH
PCH_PWR_EN
SUSP#<30,39,40>
PCH_PWR_EN<30>
+5VALW
+5VALW
+5VALW
+3VALW
+3VALW
+5VS
+3VS
+0.675VS +1.05VS
+3VALW
+3VALW
+3VALW_PCH
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
28 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
DC/DC Interface
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
28 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
DC/DC Interface
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
28 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
DC/DC Interface
R2315
470_0603_5%
@
R2315
470_0603_5%
@
12
C2313
10U_0603_6.3V6M
C2313
10U_0603_6.3V6M
1
2
C2314
0.01U_0603_25V7K
C2314
0.01U_0603_25V7K
12
C2310
10U_0805_10V4Z
@
C2310
10U_0805_10V4Z
@
1
2
R416
0_0402_1%
@
R416
0_0402_1%
@
1 2
J513
JUMP_43X79@
J513
JUMP_43X79@
11
2
2
C2309
0.01U_0603_25V7K
C2309
0.01U_0603_25V7K
12
C2308
10U_0603_6.3V6M
C2308
10U_0603_6.3V6M
1
2
R10
100K_0402_5%
R10
100K_0402_5%
12
C2311
10U_0603_6.3V6M
C2311
10U_0603_6.3V6M
1
2
R2318
470K_0402_5%
R2318
470K_0402_5%
1 2
G
D
S
Q8
2N7002K_SOT23-3
G
D
S
Q8
2N7002K_SOT23-3
2
13
R2314
22_0603_5%
R2314
22_0603_5%
12
C2306
10U_0603_6.3V6M
C2306
10U_0603_6.3V6M
1
2
U2301
TPS22966DPUR_SON14_2X3
U2301
TPS22966DPUR_SON14_2X3
GND 11
VIN2
6
VBIAS
4
ON2
5
VOUT2 9
VIN2
7
CT1 12
VOUT1 14
VOUT2 8
VOUT1 13
VIN1
2
ON1
3
VIN1
1
CT2 10
GPAD 15
C2323
10U_0603_6.3V6M
C2323
10U_0603_6.3V6M
1
2
G
D
S
Q2308
2N7002K_SOT23-3
@
G
D
S
Q2308
2N7002K_SOT23-3
@
2
13
J510
JUMP_43X79@
J510
JUMP_43X79@
11
2
2
R2313
82K_0402_5%
R2313
82K_0402_5%
1 2
R16
100K_0402_5%
R16
100K_0402_5%
12
J511
JUMP_43X79@
J511
JUMP_43X79@
11
2
2
C2305
10U_0603_6.3V6M
C2305
10U_0603_6.3V6M
1
2
C2312
10U_0603_6.3V6M
C2312
10U_0603_6.3V6M
1
2
C2318
10U_0603_6.3V6M
C2318
10U_0603_6.3V6M
1
2
C2307
10U_0805_10V4Z
@
C2307
10U_0805_10V4Z
@
1
2
C2322
0.01U_0603_25V7K
C2322
0.01U_0603_25V7K
12
C2316
10U_0603_6.3V6M
C2316
10U_0603_6.3V6M
1
2
C2324
10U_0603_6.3V6M
@
C2324
10U_0603_6.3V6M
@
1
2
U2304
TPS22966DPUR_SON14_2X3
U2304
TPS22966DPUR_SON14_2X3
GND 11
VIN2
6
VBIAS
4
ON2
5
VOUT2 9
VIN2
7
CT1 12
VOUT1 14
VOUT2 8
VOUT1 13
VIN1
2
ON1
3
VIN1
1
CT2 10
GPAD 15
G
D
S
Q2307
2N7002K_SOT23-3
G
D
S
Q2307
2N7002K_SOT23-3
2
13

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SLG3NB3374V is for DIS by output 24M*1,25M*1, 27M*1, 32K*1
SLG3NB3375V is for UMA by output 24M81, 25M*1, 32K*1
CPU_RTC 32.768k(P.8)
Place RG3 close to YC1
VGA 27M(P.29)
Place RG7 close to YV1
LAN 25M(P.21)
Place RG8 close to YL2
CPU_CLK 24M(P.9)
Place RG6 close to YC2
RG3, RG7,RG8, RG6 0ohm_0402
for isolated CLK tail
Depop if GCLK
with UMA
Place close
to UG1.8
Reserve CG11 for vendor
Place close to RG4
PCH_RTCX1_R
LAN_X1_R
PCH_X1_R
CLK_X2
CLK_X1
RTC_VOUT
VGA_X1_R
CLK_X1
CLK_X2
GCLK_VRTC
XTALIN_R
XTLI_R
XTALIN_R
XTAL24_IN <9>
XTLI <21>
PCH_RTCX1 <8>
XTALIN <49>
+3VLP
+1.05VS
+1.8VGS
+LAN_IO
+RTCBATT
+RTCVCC
+3VALW
+3VLP+1.05VS+1.8VGS +LAN_IO +3VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
GCLK
57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
23
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
GCLK
57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
23
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
GCLK
57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
23
CG5
22U_0805_6.3V6M
GCLK@
CG5
22U_0805_6.3V6M
GCLK@
1
2
CG11
5P_0402_50V8C
@
CG11
5P_0402_50V8C
@
1
2
CG8
15P_0402_50V8J
GCLK@CG8
15P_0402_50V8J
GCLK@
12
RG7 0_0402_5%
GCLKDIS@
RG7 0_0402_5%
GCLKDIS@
1 2
YG1
25MHZ_10PF_7V25000014
GCLK@YG1
25MHZ_10PF_7V25000014
GCLK@
OSC
1
OSC
3
GND 2
GND 4
CG10
0.1U_0402_10V7K
GCLK@
CG10
0.1U_0402_10V7K
GCLK@
1
2
CG3
0.1U_0402_10V7K
GCLK@
CG3
0.1U_0402_10V7K
GCLK@
1
2
RG4 10_0402_1%
GCLKDIS@
RG4 10_0402_1%
GCLKDIS@
1 2
RG8 0_0402_5%GCLK@RG8 0_0402_5%GCLK@
1 2
UG2
SLG3NB244VTR TQFN 16P CLK GEN
GCLKDIS@UG2
SLG3NB244VTR TQFN 16P CLK GEN
GCLKDIS@
RG5 33_0402_5%
GCLK@
RG5 33_0402_5%
GCLK@
1 2
RG6 0_0402_5%
GCLK@
RG6 0_0402_5%
GCLK@
1 2
UG1
SLG3NB274VTR_TQFN16_2X3
@
UG1
SLG3NB274VTR_TQFN16_2X3
@
XTAL_IN
1
VDD
2
VDDIO_25M_B
3
GND1
4
25MHz_B 5
25MHz_A 6
GND2
7
VDDIO_25M_A
8
32kHz 9
VBAT
10
VDDIO_27M
11 27MHz 12
GND3
13
VDD_RTC_OUT 14
+V3.3A
15
XTAL_OUT
16
GND4
17
CG4
0.1U_0402_10V7K
GCLK@
CG4
0.1U_0402_10V7K
GCLK@
1
2
CG2
0.1U_0402_10V7K
GCLK@
CG2
0.1U_0402_10V7K
GCLK@
1
2
RG1
330_0402_5%
GCLK@RG1
330_0402_5%
GCLK@
12
CG9
12P_0402_50V8J~D
GCLK@CG9
12P_0402_50V8J~D
GCLK@
12
CG7
5P_0402_50V8C
GCLK@
CG7
5P_0402_50V8C
GCLK@
1
2
RG3
0_0402_5%
GCLK@
RG3
0_0402_5%
GCLK@
1 2
RG2
0_0402_5%
@RG2
0_0402_5%
@
12
UG1
SLG3NB244VTR TQFN 16P CLK GEN
GCLKUMA@UG1
SLG3NB244VTR TQFN 16P CLK GEN
GCLKUMA@
CG6
2.2U_0603_6.3V6K
GCLK@
CG6
2.2U_0603_6.3V6K
GCLK@
1
2
CG1
0.1U_0402_10V7K
GCLKDIS@
CG1
0.1U_0402_10V7K
GCLKDIS@
1
2

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Compal Electronics, Inc.
Ra
Rb
Venus DIS@
UMA UMA@
KB9012A3 change to
KB9012A4 SA00004OB30
ME_FWP PCH has internal 20K PD.
(suspend power rail)
Board ID
Please close to EC
Please close to EC
Reserve for ESD
20mil
"TOUCH_RST" for OAK 15 only
"KB_LED_PWM" for OAK 17 only
Place CE30,CE31,CE32,CE33 close to UE1
Place DE1 close to UE1
Place CE34
between DE1 and RE12
Place CE35
between DE1 and UE1
Place CC30
close to RC51.1
SD034330380 330K_0402_1%
100K_0402_1%SD034100380
43K_0402_1%SD034430280
27K_0402_1%SD034100300
12K_0402_1%SD034120280
SD028000080 0_0402_5%
240K_0402_1%SD000001B80
270K_0402_1%SD00000G280
75K_0402_1%SD034750280
SD034560280 56K_0402_1%
160K_0402_1%
430K_0402_1%SD028430380
SD034160380
SD034130380 130K_0402_1%
SD034200380 200K_0402_1%
KSO[0..16]
KSI[0..7]
ECAGND
KSI1
KSO9
BKOFF#
KSI7
FAN_SPEED1
LPC_LAD1
KSI3
KSO4
PLT_RST#
+3VALW
+V18R
KSO8
KSO2
EC_SMI#
SUSP#
KSO16
EN_DFAN1
BATT_TEMP
KSI0
KSO1
SERIRQ
EC_RST#
LPC_LAD2
ECAGND
KSO14
KB_RST#
ADP_I
KSI4
EC_SCI#
LPC_LAD3
VCOUT0_PH#
KSO15
KSO10
KSO0
ACOFF
LPC_LAD0
LPC_LFRAME#
KSO13
KSI2
KSO11
KSO3
KSI6
BEEP#
+EC_VCCA
KSO12
KSI5
KSO7
EC_TX
BATT_CHG_LED#
KSO6
KSO5
EC_RX
WL_BT_LED#_EC2
PWR_PWM_LED#
CAPS_LED
BATT_LOW _LED#
PECI_KB9012
VCOUT1_PH
SIO_SLP_S3#
SIO_SLP_S5# EC_LID_OUT#
H_PROCHOT#
ACIN
ON/OFFBTN#
PBTN_OUT#
VCOUT1_PH
EC_SMB_DA1
EC_SMB_CK1
EC_ENVDD
PCIE_WAKE#
PCH_PWROK
ME_EN
PS_ID
65W/90W#
EN_INVPWR
LCD_TEST
WOL_EN
EC_SMB_DA2
EC_ON
EC_MUTE#
PANEL_BKLEN
CE_EN
DBC_EN
PCH_PWROK
SIO_SLP_S5#
SIO_SLP_S3#
FAN_SPEED1
LID_SW#
IMVP_PWRGD
LID_SW#
AD_BID0
ME_EN
ME_SUS_PWR_ACK
RUNPWROK
EC_SMB_CK2
TP_CLK
TP_DATA
VCIN1_PH
EC_SMB_DA2
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_CK1
DGPU_PWROK
ENVDD_PCH
VCCST_PG_EC
SUSACK#
ECAGND
SIO_SLP_S0#
ACIN
TOUCH_RST
+1.05V_PGOOD
CLK_PCI_LPC
SYSON
AD_BID0
USB_EN#
SIO_SLP_S4#
ACIN_65W
CPU_DETECT#
SYS_PWROK
VCIN0_PH
PCH_HOT#
VR_HOT#
EC_RSMRST#
EC_SPI_MISO_1
EC_SPI_MOSI_1
EC_SPI_CS0#
EC_SPI_CLK_R
KB_LED_PWM
LID_SW#
PCH_PWROK
SYS_PWROK
CPU_DETECT#
VR_ON
VCCST_PG_EC
VR_ON_EC VR_ON
VR_ON
ERP_LOT6
WL_BT_LED#_EC
WL_BT_LED
VCCST_PG_EC
PLT_RST#
TP_DATA
TP_CLK
KSI[0..7]<27>
KSO[0..16]<27>
LPC_LFRAME#<9>
LPC_LAD2<9>
LPC_LAD0<9>
LPC_LAD3<9>
LPC_LAD1<9>
SERIRQ<11>
BEEP# <22>
EC_SMI#<8>
KB_RST#<11>
FAN_SPEED1<27>
ADP_I <36,37>
EC_RSMRST# <10>
SYSON <41>
CLK_PCI_LPC<9>
EN_DFAN1 <27>
BATT_CHG_LED# <26>
EC_SCI#<11>
CAPS_LED <27>
BATT_LOW _LED# <26>
H_PROCHOT#<36,6>
SIO_SLP_S3#<10>
SIO_SLP_S5#<10> EC_LID_OUT# <11>
BKOFF# <19>
EC_TX<26>
EC_RX<26>
PBTN_OUT# <10,6>
VCIN1_PH <36>
EC_SMB_DA1<36,37>
EC_SMB_CK1<36,37>
VCOUT0_PH# <38>
ACOFF <37>
EC_ENVDD <31>
PWR_PWM_LED# <26>
ME_EN <8>
PS_ID<36>
65W#/90W <36>
EN_INVPWR <31>
LCD_TEST <31>
WOL_EN <21>
WL_BT_LED#_EC2 <26>
PCH_PWROK<10>
BATT_TEMP <36,37>
ON/OFFBTN# <27>
ACIN <10,36,37,49>
EC_ON <38>
PLT_RST#<10,21,26,48,6>
EC_MUTE# <22>
EC_SMB_DA2<19,49,9>
EC_SMB_CK2<19,49,9>
CE_EN<31>
DBC_EN<31>
IMVP_PWRGD <42>
PECI_EC <6>
ME_SUS_PWR_ACK<10>
RUNPWROK<6>
PCIE_WAKE#<10,21>
LID_SW# <27>
TP_CLK <27>
TP_DATA <27>
VCOUT1_PH <36>
DGPU_PWROK<10,44>
ENVDD_PCH<10,19>
VCCST_PG_EC<13>
SUSACK# <10>
SUSP# <28,39,40>
ECAGND <36>
SIO_SLP_S0# <10>
TOUCH_RST
+1.05V_PGOOD<40>
PANEL_BKLEN <10>
VR_ON <13,42>
USB_EN# <24,25>
SIO_SLP_S4# <10>
PCH_PWR_EN <28>
PCH_DPWROK<10>
ACIN_65W <49>
CPU_DETECT# <6>
SYS_PWROK <10,6>
VCIN0_PH <36>
PCH_HOT# <9>
VR_HOT#<42>
EC_SPI_MISO_1 <9>
EC_SPI_MOSI_1 <9>
EC_SPI_CS0# <9>
EC_SPI_CLK_R <9>
KB_LED_PWM <32>
ERP_LOT6 <36>
WL_BT_LED#_EC <26>
WL_BT_LED<26>
+3VALW
+3VS
+3VALW
+3VALW
+3VALW
+3VLP
+3VALW
+EC_VCCA
+3VALW
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
EC ENE-KB9012
30 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
EC ENE-KB9012
30 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
EC ENE-KB9012
30 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
CE36
0.047U_0402_16V4Z
ESD@CE36
0.047U_0402_16V4Z
ESD@
1
2
CE7
0.1U_0402_10V7K
CE7
0.1U_0402_10V7K
1
2
CE32 0.1U_0402_10V7K
ESD@
CE32 0.1U_0402_10V7K
ESD@
1 2
CE28
0.1U_0402_10V7K
ESD@CE28
0.1U_0402_10V7K
ESD@
12
CE18
100P_0402_50V8J
CE18
100P_0402_50V8J
12
CE29
220P_0402_50V8J
CE29
220P_0402_50V8J
1
2
RE18
10K_0402_5%
RE18
10K_0402_5%
12
RE5
330K_0402_1%
DIS@
SD034330380
RE5
330K_0402_1%
DIS@
SD034330380
CE11 0.1U_0402_10V7KCE11 0.1U_0402_10V7K
12
CE8
0.1U_0402_10V7K
CE8
0.1U_0402_10V7K
1
2
RE3
100K_0402_1%
RE3
100K_0402_1%
1 2
LPC & MISC
Int. K/B
Matrix
SM Bus
GPIO
GPIO
AD Input
PWM Output
DA Output
PS2 Interface
SPI Device Interface
SPI Flash ROM
GPO
GPI
UE1
KB9012QF-A4_LQFP128_14X14
LPC & MISC
Int. K/B
Matrix
SM Bus
GPIO
GPIO
AD Input
PWM Output
DA Output
PS2 Interface
SPI Device Interface
SPI Flash ROM
GPO
GPI
UE1
KB9012QF-A4_LQFP128_14X14
GATEA20/GPIO00
1
KBRST#/GPIO01
2
SERIRQ
3
LPC_FRAME#
4
LPC_AD3
5
PM_SLP_S3#/GPIO04
6
LPC_AD2
7
LPC_AD1
8
EC_VDD/VCC 9
LPC_AD0
10
GND/GND
11
CLK_PCI_EC
12
PCIRST#/GPIO05
13
PM_SLP_S5#/GPIO07
14
EC_SMI#/GPIO08
15
GPIO0A
16
GPIO0B
17
GPIO0C
18
GPIO0D
19
EC_SCII#/GPIO0E
20
GPIO0F 21
EC_VDD/VCC 22
BEEP#/GPIO10 23
GND/GND
24
EC_INVT_PWM/GPIO11
25
GPIO12 26
ACOFF/GPIO13 27
FAN_SPEED1/GPIO14
28
EC_PME#/GPIO15
29
EC_TX/GPIO16
30
EC_RX/GPIO17
31
PCH_PWROK/GPIO18
32
EC_VDD/VCC 33
SUSP_LED#/GPIO19
34
GND/GND
35
NUM_LED#/GPIO1A
36
EC_RST#
37
GPIO1D
38
KSO0/GPIO20
39
KSO1/GPIO21
40
KSO2/GPIO22
41
KSO3/GPIO23
42
KSO4/GPIO24
43
KSO5/GPIO25
44
KSO6/GPIO26
45
KSO7/GPIO27
46
KSO8/GPIO28
47
KSO9/GPIO29
48
KSO10/GPIO2A
49
KSO11/GPIO2B
50
KSO12/GPIO2C
51
KSO13/GPIO2D
52
KSO14/GPIO2E
53
KSO15/GPIO2F
54
KSI0/GPIO30
55
KSI1/GPIO31
56
KSI2/GPIO32
57
KSI3/GPIO33
58
KSI4/GPIO34
59
KSI5/GPIO35
60
KSI6/GPIO36
61
KSI7/GPIO37
62
BATT_TEMP/GPIO38 63
GPIO39 64
ADP_I/GPIO3A 65
GPIO3B 66
EC_VDD/AVCC 67
DAC_BRIG/GPIO3C 68
AGND/AGND
69
EN_DFAN1/GPIO3D 70
IREF/GPIO3E 71
CHGVADJ/GPIO3F 72
ENBKL/GPIO40 73
PECI_KB930/GPIO41 74
GPIO42 75
IMON/GPIO43 76
EC_SMB_CK1/GPIO44
77
EC_SMB_DA1/GPIO45
78
EC_SMB_CK2/GPIO46
79
EC_SMB_DA2/GPIO47
80
KSO16/GPIO48
81
KSO17/GPIO49
82
EC_MUTE#/GPIO4A 83
USB_EN#/GPIO4B 84
CAP_INT#/GPIO4C 85
EAPD/GPIO4D 86
TP_CLK/GPIO4E 87
TP_DATA/GPIO4F 88
FSTCHG/GPIO50 89
BATT_CHG_LED#/GPIO52 90
CAPS_LED#/GPIO53 91
PWR_LED#/GPIO54 92
BATT_LOW_LED#/GPIO55 93
GND/GND
94
SYSON/GPIO56 95
EC_VDD/VCC 96
CPU1.5V_S3_GATE/GPXIOA00 97
WOL_EN/GPXIOA01 98
ME_EN/GPXIOA02 99
EC_RSMRST#/GPXIOA03 100
EC_LID_OUT#/GPXIOA04 101
PROCHOT_IN/GPXIOA05 102
H_PROCHOT#_EC/GPXIOA06 103
VCOUT0_PH/GPXIOA07 104
BKOFF#/GPXIOA08 105
PBTN_OUT#/GPXIOA09 106
PCH_APWROK/GPXIOA10 107
SA_PGOOD/GPXIOA11 108
VCIN0_PH/GPXIOD00 109
AC_IN/GPXIOD01 110
EC_VDD0 111
EC_ON/GPXIOD02 112
GND0
113
ON/OFF/GPXIOD03 114
LID_SW#/GPXIOD04 115
SUSP#/GPXIOD05 116
GPXIOD06 117
PECI_KB9012/GPXIOD07 118
SPIDI/GPIO5B 119
SPIDO/GPIO5C 120
VR_ON/GPIO57 121
XCLKI/GPIO5D
122
XCLKO/GPIO5E
123 V18R 124
EC_VDD/VCC 125
SPICLK/GPIO58 126
PM_SLP_S4#/GPIO59 127
SPICS#/GPIO5A 128
RE2
10K_0402_5%
RE2
10K_0402_5%
1 2
CE26
0.1U_0402_10V7K
CE26
0.1U_0402_10V7K
1
2
CE15
0.1U_0402_10V7K
CE15
0.1U_0402_10V7K
1
2
LE2
FBMA-L11-160808-800LMT_0603
LE2
FBMA-L11-160808-800LMT_0603
12
RE36 43_0402_1%RE36 43_0402_1%
12
CE9 100P_0402_50V8JCE9 100P_0402_50V8J
12
CE12
0.1U_0402_10V7K
@EMI@
CE12
0.1U_0402_10V7K
@EMI@
12
CE19
47P_0402_50V8J
CE19
47P_0402_50V8J
1
2
CE1
0.1U_0402_10V7K
CE1
0.1U_0402_10V7K
1
2
RE43
43_0402_1%
RE43
43_0402_1%
1 2
CE27
0.1U_0402_10V7K
ESD@CE27
0.1U_0402_10V7K
ESD@
12
RE12 0_0402_5%
@
RE12 0_0402_5%
@
1 2
RE8 47K_0402_5%RE8 47K_0402_5%
12
RE104.7K_0402_5% RE104.7K_0402_5%
12
RE47
100K_0402_5%
RE47
100K_0402_5%
1 2
CE31 0.1U_0402_10V7K
ESD@
CE31 0.1U_0402_10V7K
ESD@
1 2
RE44
0_0402_1%
@
RE44
0_0402_1%
@
12
CE35
220P_0402_50V8J
ESD@CE35
220P_0402_50V8J
ESD@
1
2
CE5
1000P_0402_50V7K
@EMI@
CE5
1000P_0402_50V7K
@EMI@
1
2
LE1
FBMA-L11-160808-800LMT_0603
EMI@
LE1
FBMA-L11-160808-800LMT_0603
EMI@
1 2
RE94.7K_0402_5% RE94.7K_0402_5%
12
R2354
0_0402_5%
@EMI@
R2354
0_0402_5%
@EMI@
1 2
RP36
2.2K_0804_8P4R_5%
RP36
2.2K_0804_8P4R_5%
18
27
36
45
CE6
1000P_0402_50V7K
@EMI@
CE6
1000P_0402_50V7K
@EMI@
1
2
CE30 0.1U_0402_10V7K
ESD@
CE30 0.1U_0402_10V7K
ESD@
1 2
UE2
SN74LVC1G06DCKR_SC70-5
UE2
SN74LVC1G06DCKR_SC70-5
Y
4A2
P5
G
3
NC
1
RE11 100K_0402_5%RE11 100K_0402_5%
1 2
RE1
10K_0402_5%
@
RE1
10K_0402_5%
@
1 2
RE37 0_0402_1%
@
RE37 0_0402_1%
@
1 2
DE1
@ESD@
L03ESDL5V0CG3-2_SOT-523-3
DE1
@ESD@
L03ESDL5V0CG3-2_SOT-523-3
1
1
22
33
CE16
4.7U_0805_10V4Z
CE16
4.7U_0805_10V4Z
1
2
RE7
0_0402_5%
@
RE7
0_0402_5%
@
12
RE326
1K_0402_5%
@
RE326
1K_0402_5%
@
12
CE2
0.1U_0402_10V7K
CE2
0.1U_0402_10V7K
1
2
RE71 10K_0402_5%RE71 10K_0402_5%
1 2
CE33 0.1U_0402_10V7K
ESD@
CE33 0.1U_0402_10V7K
ESD@
1 2
CE34
0.1U_0402_10V7K
ESD@CE34
0.1U_0402_10V7K
ESD@
1
2
RE5
200K_0402_1%
UMA@
RE5
200K_0402_1%
UMA@
1 2

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
60mil
LCD PWR CTRL LVDS Connector
LCD backlight PWR CTRL
Webcam PWR CTRL
CE_EN_R only for reserve.
W=60mils
W=60mils
Place close to JLVDS
W=60mils
SS table
Css
1nF
10nF
0.1uF
Tss
1mS
10mS
100mS
1mS
Open or
tied to
VIN
Close to JLVDS
For eDP co-layout
60mil
W=60mils
APL3512 PIN 4 tire to VIN
PWR_SRC_ON
USB20_CAM_N7_R
USB20_CAM_P7_R
DISPOFF#
CE_EN
DBC_EN DBC_EN_R
CE_EN_R
DBC_EN_R
LVDS_B1+
LVDS_B1-
LVDS_A0-
LVDS_B0-
LVDS_ACLK+
LVDS_B0+
LVDS_A2+
LVDS_BCLK+
LVDS_ACLK-
LVDS_A0+
LVDS_A2-
LVDS_BCLK-
LVDS_A1-
LVDS_A1+
LVDS_B2-
LVDS_B2+
LCD_TEST
MIC_CLK
MIC_DATA
USB20_CAM_N7_R
USB20_CAM_P7_R
DISPOFF#
CE_EN_R
ENVDD_R
EDP_HPD_PANEL CE_EN_R
+INV_PWR_SRC
USB20_CAM_N7<12>
USB20_CAM_P7<12>
TL_BKOFF#<19>
MIC_CLK<22>
MIC_DATA<22>
CE_EN<30>
DBC_EN<30>
LVDS_B0+<19>
LVDS_B0-<19>
LVDS_A2+<19>
LVDS_A0+<19>
LVDS_A2-<19>
LVDS_ACLK+<19>
LVDS_A0-<19>
LVDS_A1+<19>
LVDS_A1-<19>
LVDS_BCLK+<19>
LVDS_BCLK-<19>
LVDS_ACLK-<19>
LVDS_B2+<19>
LVDS_B2-<19>
LVDS_B1+<19>
LVDS_B1-<19>
LCD_TEST<30>
EDID_CLK<19>
EDID_DATA<19>
TL_INVT_PWM<19>
TL_ENVDD<19>
EC_ENVDD<30>
EDP_HPD_PANEL<19>
EN_INVPWR<30>
B+
+LCDVDD_CONN
+3VS
+INV_PWR_SRC
+3VS_CAM
+LCDVDD+3VS
+3VS +3VS_CAM
+LCDVDD_CONN+LCDVDD
+INV_PWR_SRC
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
31 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
LVDS/webcam
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
31 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
LVDS/webcam
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
31 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
LVDS/webcam
CX4
1000P_0402_50V7K
CX4
1000P_0402_50V7K
1
2
G
S
D
QX2
SI3457CDV-T1-GE3_TSOP6
G
S
D
QX2
SI3457CDV-T1-GE3_TSOP6
1
3
4
2
5
6
G
D
S
QX1
2N7002KW_SOT323-3
G
D
S
QX1
2N7002KW_SOT323-3
2
13
RX23
0_0402_5%
@
RX23
0_0402_5%
@
12
RX20
0_0402_1%
@
RX20
0_0402_1%
@
12
CX11
0.1U_0402_16V4Z
CX11
0.1U_0402_16V4Z
1
2
RX19
0_0402_1%
@
RX19
0_0402_1%
@
1 2
RX22 0_0402_5%
@EMI@
RX22 0_0402_5%
@EMI@
1 2
LX1
FBMA-L11-201209-221LMA30T_0805
LX1
FBMA-L11-201209-221LMA30T_0805
1 2
RX53 0_0402_5%
eDP@
RX53 0_0402_5%
eDP@
1 2
CX2
0.1U_0402_16V7K
CX2
0.1U_0402_16V7K
1
2
RX18
0_0402_5%
@
RX18
0_0402_5%
@
1 2
RX9
10K_0402_5%
RX9
10K_0402_5%
12
CX1
0.1U_0402_16V7K
CX1
0.1U_0402_16V7K
1
2
CX5
0.1U_0603_50V_X7R
CX5
0.1U_0603_50V_X7R
1
2
DX1
RB751V-40_SOD323-2
DX1
RB751V-40_SOD323-2
12
LX6
WCM-2012HS-900T_4P
EMI@
LX6
WCM-2012HS-900T_4P
EMI@
1
122
33
4
4
RX7 0_0402_1%
@
RX7 0_0402_1%
@
12
UX1
APL3512ABI-TRG_SOT23-5
UX1
APL3512ABI-TRG_SOT23-5
VIN
5
SS
4
VOUT 1
EN 3
GND 2
JLVDS
CONN@
STARC_107K40-000001-G2
JLVDS
CONN@
STARC_107K40-000001-G2
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
31
31
32
32
33
33
34
34
35
35
36
36
37
37
38
38
39
39
40
40
G1 41
G2 42
G3 43
G4 44
G5 45
G6 46
CX7
4.7U_0805_10V4Z
CX7
4.7U_0805_10V4Z
1
2
RX26
100K_0402_5%
RX26
100K_0402_5%
12
CX9
0.1U_0402_10V7K
@CX9
0.1U_0402_10V7K
@
1
2
RX8 0_0402_5%@RX8 0_0402_5%@
12
RX21 0_0402_5%
@EMI@
RX21 0_0402_5%
@EMI@
1 2
RX3
100K_0402_5%
RX3
100K_0402_5%
12
CX3
10U_0805_10V6K
CX3
10U_0805_10V6K
1
2
RX2
100K_0402_5%
RX2
100K_0402_5%
12
CX8
4.7U_0805_10V4Z
CX8
4.7U_0805_10V4Z
1
2
RX27
0_0603_1%
@
RX27
0_0603_1%
@
1 2

A
A
B
B
C
C
D
D
E
E
F
F
G
G
H
H
1 1
2 2
3 3
4 4
+5V_HDD Source
SATA HDD Connector
ODD Power Control
ODD BTB Connector
SP02000WP00
( 2nd connector co-layout with JBTB1 Main )
SHORT DEFAULT
20mil
* Key Board Back Light
OAK 17 only
Place CS17 close to JBTB
20mil
ESD solution
ODD_EN
SATA_PRX_DTX_P0
SATA_PRX_DTX_N0
SATA_PTX_DRX_P0
HDD_DET#
SATA_PTX_DRX_N0
KB_BL_PWM
SATA_PTX_DRX_P1
SATA_PTX_DRX_N1
SATA_PRX_DTX_N1
ODD_DETECT#
SATA_PRX_DTX_P1
ODD_DA#
SATA_PRX_DTX_P1
ODD_DA#
SATA_PRX_DTX_N1
ODD_DETECT#
SATA_PTX_DRX_N1
SATA_PTX_DRX_P1
ODD_DA#
JHDD_P10
HDD_DET#<11>
SATA_PTX_DRX_P0_C<8>
SATA_PTX_DRX_N0_C<8>
SATA_PRX_DTX_P0_C<8>
SATA_PRX_DTX_N0_C<8>
KB_DET#<11>
KB_LED_PWM<30>
ODD_DA#<11>
SATA_PRX_DTX_P1_C<8>
SATA_PRX_DTX_N1_C<8>
ODD_DETECT# <8>
SATA_PTX_DRX_N1_C <8>
SATA_PTX_DRX_P1_C <8>
ODD_EN#<11>
DEVSLP0<11>
+5VS
B+
+5VS_ODD
+5V_HDD
+5V_HDD +5VS
+5V_HDD
+3VS
+5VS_KBL
+5VS_ODD
+5VS_ODD
+5VS_ODD
+3VS
+5VS +5VS_KBL
+5VS +3VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
HDD/ODD/KB-BL
32 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
HDD/ODD/KB-BL
32 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
HDD/ODD/KB-BL
32 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
CS15 0.01U_0402_16V7KCS15 0.01U_0402_16V7K
12
G
D
S
QE4
2N7002BKW_SOT323-3~D
KBBL@
G
D
S
QE4
2N7002BKW_SOT323-3~D
KBBL@
2
13
RS8 0_0402_5%@RS8 0_0402_5%@
1 2
CE58
22U_0603_6.3V6M
ESD@
CE58
22U_0603_6.3V6M
ESD@
1 2
RS6
470K_0402_5%
RS6
470K_0402_5%
1 2
CS13
1U_0402_6.3V6K
CS13
1U_0402_6.3V6K
1
2
JBTB1
E&T_1133-Q12C-01R
CONN@
JBTB1
E&T_1133-Q12C-01R
CONN@
1
1
3
3
5
5
7
7
9
9
11
11
22
GND 16
GND 17
GND 18
44
66
88
10 10
12 12
GND
13
GND
14
GND
15
CS10
1000P_0402_50V7K
CS10
1000P_0402_50V7K
1
2
RE68
10K_0402_5%
RE68
10K_0402_5%
1 2
RE59
0_0805_5%
@
RE59
0_0805_5%
@
1 2
CS9 0.01U_0402_16V7KCS9 0.01U_0402_16V7K
1 2
CS6
0.1U_0402_25V6K
CS6
0.1U_0402_25V6K
1
2
CS17
0.1U_0402_25V6K
ESD@
CS17
0.1U_0402_25V6K
ESD@
1
2
S
G
D
QS2
SI3456BDV-T1-E3 1N TSOP6
S
G
D
QS2
SI3456BDV-T1-E3 1N TSOP6
3
6
2
45
1
CE56
1U_0603_10V6K
KBBL@
CE56
1U_0603_10V6K
KBBL@
1
2
S
G
D
QE5
SI3456BDV-T1-E3 1N TSOP6
KBBL@
S
G
D
QE5
SI3456BDV-T1-E3 1N TSOP6
KBBL@
3
6
2
4 5
1
CS106 0.01U_0402_16V7KCS106 0.01U_0402_16V7K
12
FE1
0.75A_24V_1812L075-24DR~OK
KBBL@FE1
0.75A_24V_1812L075-24DR~OK
KBBL@
12
JP7
JUMP_43X79
@JP7
JUMP_43X79
@
1
122
JBTB
ACES_50100-0127N-001
CONN@
JBTB
ACES_50100-0127N-001
CONN@
1
122
3
344
5
566
7
788
9
910 10
11
11 12 12
G1
13 G2 14
G3
15 G4 16
G5
17 G6 18
CS5
1000P_0402_50V7K
CS5
1000P_0402_50V7K
1
2
CS105 0.01U_0402_16V7KCS105 0.01U_0402_16V7K
12
CE57
10U_0603_6.3V6M
KBBL@
CE57
10U_0603_6.3V6M
KBBL@
1
2
CS108 0.01U_0402_16V7KCS108 0.01U_0402_16V7K
12
G
D
S
QS3
2N7002KW_SOT323-3
G
D
S
QS3
2N7002KW_SOT323-3
2
13
JKBBL
HB_A090420-SAHR21
CONN@
JKBBL
HB_A090420-SAHR21
CONN@
1
1
2
2
3
3
4
4
GND 5
GND 6
10U_0805_10V6K
CS12
10U_0805_10V6K
CS12
1
2
CS11
0.1U_0402_25V6K
CS11
0.1U_0402_25V6K
1
2
CS14 0.01U_0402_16V7KCS14 0.01U_0402_16V7K
12
CS7
10U_0805_10V6K
CS7
10U_0805_10V6K
1
2
JHDD
SANTA_194301-1
CONN@
JHDD
SANTA_194301-1
CONN@
GND
1
A+
2
A-
3
GND
4
B-
5
B+
6
GND
7
V33
8
V33
9
V33
10
GND
11
GND
12
GND
13
V5
14
V5
15
V5
16
GND
17
Reserved
18
GND
19
V12
20
V12
21
V12
22 GND 23
GND 24
JP13
JUMP_43X79
@
JP13
JUMP_43X79
@
1
122
RS7 0_0402_5%RS7 0_0402_5%
1 2
CS16
0.1U_0603_50V_X7R
CS16
0.1U_0603_50V_X7R
1
2
CS109 0.01U_0402_16V7KCS109 0.01U_0402_16V7K
12
CS8 0.01U_0402_16V7KCS8 0.01U_0402_16V7K
1 2
RE58
100K_0402_5%
KBBL@
RE58
100K_0402_5%
KBBL@
12

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CPU bracket
VGA stand-off
FAN stand-off
ODD-DB stand-off
Screw Hole
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
33 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
Screw Hole
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
33 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
Screw Hole
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
33 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
Screw Hole
H20
H_3P5
@
H20
H_3P5
@
1
H17
H_2P8
@
H17
H_2P8
@
1
H34
H_3P7
@
H34
H_3P7
@
1
H16
H_2P8
@
H16
H_2P8
@
1
H31
H_3P7
@
H31
H_3P7
@
1
FD4
FIDUCIAL@
FD4
FIDUCIAL@
1
H1
H_2P8
@
H1
H_2P8
@
1
H33
H_3P7
@
H33
H_3P7
@
1
H18
H_5P0X3P0N
@
H18
H_5P0X3P0N
@
1
H4
H_5P0N
@
H4
H_5P0N
@
1
H32
H_3P7
@
H32
H_3P7
@
1
FD2
FIDUCIAL@
FD2
FIDUCIAL@
1
H2
H_2P8
@
H2
H_2P8
@
1
H7
H_3P3
@
H7
H_3P3
@
1
FD1
FIDUCAL@
FD1
FIDUCAL@
1
H9
H_2P8
@
H9
H_2P8
@
1
H35
H_3P0
@
H35
H_3P0
@
1
H6
H_3P3
@
H6
H_3P3
@
1
FD3
FIDUCAL@
FD3
FIDUCAL@
1
H11
H_2P8
@
H11
H_2P8
@
1
H10
H_3P3
@
H10
H_3P3
@
1
H5
H_2P8
@
H5
H_2P8
@
1
H19
H_3P5
@
H19
H_3P5
@
1
H12
H_2P8
@
H12
H_2P8
@
1
H8
H_2P8
@
H8
H_2P8
@
1

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
HW2012/04/27
34 Card Reader
27
28
29
30
31
32
33
34
35
17
10
16
14
4
0.2
P age 1
P age 1Page 1
P age 1
Solu tio n D escription
Solu tio n D escriptionSolu tio n D escription
Solu tio n D escription R ev .
R ev .R ev .
R ev.P ag e#
P ag e#P a ge#
P a ge # T it le
T it leT itle
T it le
V ersion C hange L ist ( P . I. R . L ist )
V ersion C hange L ist ( P . I. R . L ist )V ersion C hange L ist ( P . I. R . L ist )
V ersion C hange L ist ( P . I. R . L ist )
Item
ItemItem
Item Issu e D escriptio n
Issu e D escriptio nIssue D escriptio n
Issu e D escriptio nD ate
D ateD ate
D ate R eq uest
R eq uestR equ est
R eq uest
O w n er
O w n erO w n er
O w n er
1
2
3
15
12
13
19
20
5
21
22
23
24
25
26
6
7
8
9
The Card reader USB signal is incorrect. SWAP UR1 USB signal P/N
11
18
36
37
38
39
40
41
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
HW-PIR Page.1
34 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
HW-PIR Page.1
34 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
HW-PIR Page.1
34 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
P age 2
P age 2Page 2
P age 2
Solu tio n D escription
Solu tio n D escriptionSolu tio n D escription
Solu tio n D escription R ev .
R ev .R ev .
R ev.P ag e#
P ag e#P a ge#
P a ge # T it le
T it leT itle
T it le
V ersion C hange L ist ( P . I. R . L ist )
V ersion C hange L ist ( P . I. R . L ist )V ersion C hange L ist ( P . I. R . L ist )
V ersion C hange L ist ( P . I. R . L ist )
Item
ItemItem
Item Issu e D escriptio n
Issu e D escriptio nIssue D escriptio n
Issu e D escriptio nD ate
D ateD ate
D ate R eq uest
R eq uestR equ est
R eq uest
O w n er
O w n erO w n er
O w n er
40
41
43
44
45
46
47
42
48
49
50
51
52
53
54
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
HW-PIR Page.2
35 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
HW-PIR Page.2
35 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
HW-PIR Page.2
35 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.

A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
SMART
SMARTSMART
SMART
Battery:
Battery:Battery:
Battery:
01.GND1
01.GND101.GND1
01.GND1
02.GND2
02.GND202.GND2
02.GND2
03.BAT_ALERT
03.BAT_ALERT03.BAT_ALERT
03.BAT_ALERT
04.SYS_PRES
04.SYS_PRES04.SYS_PRES
04.SYS_PRES
05.BATT_PRS
05.BATT_PRS05.BATT_PRS
05.BATT_PRS
06.DAT_SMB
06.DAT_SMB06.DAT_SMB
06.DAT_SMB
07.CLK_SMB
07.CLK_SMB07.CLK_SMB
07.CLK_SMB
08.BATT1+
08.BATT1+08.BATT1+
08.BATT1+
09.BATT2+
09.BATT2+09.BATT2+
09.BATT2+
Battery protection:
asserts H_PROCHOT# when adaptor is
unplugged, keep low for 10ms
till SW PROCHOT# is issued by EC
Adapter protection:
if battery removed, adaptor only,
then trigger the H_PROCHOT#,
keep @ in BOM since battery can not
be removed by end user
Other component (37.1)
ADP_I(with selector) Delay adaptor OC H_PROCHOT#
2ms while hybrid power
transition
PH1 under CPU bottem side :
CPU thermal protection at 93 +/- 3 degree C
Erp lot6 Circuit
BATT+
BATT++
PSID
H_PROCHOT#
H_PROCHOT#
BATT_PRS
ADPIN PSID-3
PSID-1
PSID-2
H_PROCHOT#
SYS_PRES
BAT_ALERT
DAT_SMB
CLK_SMB
BATT_PRS
H_PROCHOT# <30,6>
VCOUT1_PH <30>
65W#/90W <30>
VCIN0_PH<30>
ECAGND<30>
VCIN1_PH<30>
ADP_I<30,37>
ACIN <10,30,37,49>
BATT_TEMP <30,37>
EC_SMB_CK1 <30,37>
EC_SMB_DA1 <30,37>
PS_ID <30>
ERP_LOT6 <30>
VIN
+5VALW
+3VALW
+3VALW
BATT++BATT+
+EC_VCCA
+3VALW
VIN
VIN
+RTCBATT
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
0.4
36 57Wednesday, May 22, 2013
2013/05/21 2014/05/01
Compal Electronics, Inc.
PWR_DCIN/BATT CONN/OTP
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
0.4
36 57Wednesday, May 22, 2013
2013/05/21 2014/05/01
Compal Electronics, Inc.
PWR_DCIN/BATT CONN/OTP
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
0.4
36 57Wednesday, May 22, 2013
2013/05/21 2014/05/01
Compal Electronics, Inc.
PWR_DCIN/BATT CONN/OTP
PC5
0.1U_0402_25V6
@PC5
0.1U_0402_25V6
@
12
PR28
10K_0402_1%
PR28
10K_0402_1%
12
PC13
.1U_0402_16V7K@
PC13
.1U_0402_16V7K@
1 2
PH1
100K_0402_1%_TSM0B104F4251RZ
PH1
100K_0402_1%_TSM0B104F4251RZ
12
PL3
SMB3025500YA_2P
EMI@
PL3
SMB3025500YA_2P
EMI@
1 2
G
D
S
PQ4
2N7002W-T/R7_SOT323-3
G
D
S
PQ4
2N7002W-T/R7_SOT323-3
2
13
PR10
1M_0402_1%
PR10
1M_0402_1%
1 2
JRTC
LOTES_AAA-BAT-054-K01
CONN@
JRTC
LOTES_AAA-BAT-054-K01
CONN@
+1
-
2
PC15
0.01U_0402_25V7K
PC15
0.01U_0402_25V7K
12
PL4
C8B BPH 853025_2P
EMI@ PL4
C8B BPH 853025_2P
EMI@
1 2
PR15
100_0402_5%
PR15
100_0402_5%
1 2
PC16
.1U_0402_16V7K
PC16
.1U_0402_16V7K
1 2
E
B
C
PQ5
MMST3904-7-F_SOT323~D
PSID@
E
B
C
PQ5
MMST3904-7-F_SOT323~D
PSID@
2
3 1
PR16
10K_0402_1%
PR16
10K_0402_1%
1 2
PQ1A
L2N7002DW1T1G_SC88-6
PQ1A
L2N7002DW1T1G_SC88-6
61
2
PR31
1M_0402_1%
PR31
1M_0402_1%
1 2
PR24
12.1K_0402_1%
PR24
12.1K_0402_1%
1 2
PQ1B
L2N7002DW1T1G_SC88-6
PQ1B
L2N7002DW1T1G_SC88-6
3
5
4
PD2
TVNST52302AB0_SOT523-3
@EMI@
PD2
TVNST52302AB0_SOT523-3
@EMI@
2
3
1
PR8
10K_0402_1%
PSID@
PR8
10K_0402_1%
PSID@
12
PC3
1000P_0402_50V7K
EMI@ PC3
1000P_0402_50V7K
EMI@
12
PD3
TVNST52302AB0_SOT523-3
@EMI@
PD3
TVNST52302AB0_SOT523-3
@EMI@
2
3
1
PR26
499K_0402_1%
PR26
499K_0402_1%
1 2
PL2
C8B BPH 853025_2P
EMI@
PL2
C8B BPH 853025_2P
EMI@
1 2
PJPDC
ACES_50299-00501-003
CONN@
PJPDC
ACES_50299-00501-003
CONN@
11
22
33
44
55
GND 6
GND 7
PC2
100P_0402_50V8J
EMI@ PC2
100P_0402_50V8J
EMI@
12
PR2
10K_0402_1%
PR2
10K_0402_1%
12
PC4
100P_0402_50V8J
EMI@ PC4
100P_0402_50V8J
EMI@
12
PQ2B
L2N7002DW1T1G_SC88-6
PQ2B
L2N7002DW1T1G_SC88-6
3
5
4
PQ3B
L2N7002DW1T1G_SC88-6
PQ3B
L2N7002DW1T1G_SC88-6
3
5
4
PR6
100K_0402_1%
PSID@
PR6
100K_0402_1%
PSID@
1 2
PR29
100K_0402_1%
PR29
100K_0402_1%
12
PBATT
SUYIN_200028MR009G502ZL
CONN@
PBATT
SUYIN_200028MR009G502ZL
CONN@
11
33
44
55
66
88
99
22
77
GND 10
GND 11
PR27
392K_0402_1%
PR27
392K_0402_1%
1 2
PR9
15K_0402_1%
PSID@
PR9
15K_0402_1%
PSID@
1 2
PL1
C8B BPH 853025_2P
EMI@PL1
C8B BPH 853025_2P
EMI@
1 2
PC14
.1U_0402_16V7K
PC14
.1U_0402_16V7K
1 2
PQ2A
L2N7002DW1T1G_SC88-6
PQ2A
L2N7002DW1T1G_SC88-6
61
2
PR4
33_0402_5%
PSID@PR4
33_0402_5%
PSID@
1 2
PR3
2.2K_0402_5%
PSID@PR3
2.2K_0402_5%
PSID@
12
PC8
1000P_0402_50V7K
EMI@ PC8
1000P_0402_50V7K
EMI@
12
PR30
160K_0402_1%
PR30
160K_0402_1%
1 2
PR33
1M_0402_1%
PR33
1M_0402_1%
1 2
PR20
100_0402_5%
PR20
100_0402_5%
1 2
PR7
1M_0402_1%
PR7
1M_0402_1%
1 2
PR32
100K_0402_1%
PR32
100K_0402_1%
12
PD1
AZC099-04S.R7G_SOT23
EMI@
PD1
AZC099-04S.R7G_SOT23
EMI@
V I/O 1
V I/O 3
V I/O
6
V I/O
4
Ground 2
V BUS
5
PQ3A
L2N7002DW1T1G_SC88-6
PQ3A
L2N7002DW1T1G_SC88-6
61
2
PR5
3.3K_1206_5%~D
PR5
3.3K_1206_5%~D
12
PR18
100_0402_5%
PR18
100_0402_5%
1 2
PR1
200K_0402_1%
@PR1
200K_0402_1%
@
12
PR23
150K_0402_1%
PR23
150K_0402_1%
1 2
G
D
S
PQ6
FDV301N_G 1N SOT23-3
PSID@
G
D
S
PQ6
FDV301N_G 1N SOT23-3
PSID@
2
1 3
PC1
1000P_0402_50V7K
EMI@ PC1
1000P_0402_50V7K
EMI@
12
PC7
0.01U_0402_25V7K
EMI@ PC7
0.01U_0402_25V7K
EMI@
12

A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
For DT Mode
Iada=0~3.33A(65W)
3S2P : CV = 13.3V CC: 1.54A
4S1P: CV = 17.7V CC: 1.1A
ADP_I = 40*Iadapter*Rsense
Iada=0~4.62A(90W)
Near PL701
for LEARN mode disable
(pulse)
PC720 Close EC pin
DL_CHG
ACDET
CSIN
CSIP
BST
LX_CHG
VCC
REGN
ACIN
ACDRV
CMSRC
REGN
BST_CHGA
/BATDRV
/BATDRV
DH_CHG
REGN
EC_SMB_DA1<30,36>
EC_SMB_CK1<30,36>
ACIN <10,30,36,49>
ADP_I<30,36>
ACOFF<30>
BATT_TEMP<30,36>
VIN
VIN
+VCHGR
B+
CHG_B+
VIN
BATT+
+VCHGR
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
0.4
37 57Wednesday, May 22, 2013
2013/05/21 2014/05/01
Compal Electronics, Inc.
PWR_CHARGER
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
0.4
37 57Wednesday, May 22, 2013
2013/05/21 2014/05/01
Compal Electronics, Inc.
PWR_CHARGER
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
0.4
37 57Wednesday, May 22, 2013
2013/05/21 2014/05/01
Compal Electronics, Inc.
PWR_CHARGER
PC705
2200P_0402_25V7K
EMI@PC705
2200P_0402_25V7K
EMI@
12
PR702
0.01_1206_1%
PR702
0.01_1206_1%
1
3
4
2
PQ705
SIRA14DP-T1GE3_POWERPAK-SO8-5
PQ705
SIRA14DP-T1GE3_POWERPAK-SO8-5
4
5
1
2
3
PR705
10_1206_5%
PR705
10_1206_5%
1 2
PC706
0.1U_0603_25V7K
@EMI@PC706
0.1U_0603_25V7K
@EMI@
12
PR721
4.02K_0402_1%
PR721
4.02K_0402_1%
1 2
PQ704
MDU1516URH_POWERDFN56-8-5
@
PQ704
MDU1516URH_POWERDFN56-8-5
@
4
5
1
2
3
PR723
324K_0402_1%
PR723
324K_0402_1%
1 2
PC707
1U_0603_25V6K
PC707
1U_0603_25V6K
1 2
PR712
158K_0402_1%
PR712
158K_0402_1%
12
PD701
BAT54HT1G_SOD323-2~D
PD701
BAT54HT1G_SOD323-2~D
12
PR722
4.7_1206_5%
@EMI@
PR722
4.7_1206_5%
@EMI@
12
PC718
10U_0805_25V5K~D
PC718
10U_0805_25V5K~D
1 2
PC714
10U_0805_25V5K~D
PC714
10U_0805_25V5K~D
1 2
PR713
10K_0402_1%
PR713
10K_0402_1%
12
PR715 0_0402_5%~D@PR715 0_0402_5%~D@
1 2
PR717
0_0402_5%~D
@
PR717
0_0402_5%~D
@
1 2
PC721
0.047U_0603_25V7K
PC721
0.047U_0603_25V7K
1 2
PC708
0.1U_0402_25V6
PC708
0.1U_0402_25V6
1 2
PC701
0.1U_0603_25V7K
PC701
0.1U_0603_25V7K
12
PC713
10U_0805_25V5K~D
PC713
10U_0805_25V5K~D
12
PR708 0_0402_5%~D@PR708 0_0402_5%~D@
1 2
G
D
S
PQ708
2N7002KW_SOT323-3
G
D
S
PQ708
2N7002KW_SOT323-3
2
13
PR711
49.9K_0402_1%
PR711
49.9K_0402_1%
1 2
PU701
BQ24717
PU701
BQ24717
PHASE 19
SRN 12
LODRV 15
TP
21
SCL
9
IOUT
7
ACP 2
VCC
20
CMSRC
3
ACDET
6
SDA
8
ACDRV
4
ACOK
5
BTST 17
HIDRV 18
REGN 16
ACN 1
/BATDRV 11
SRP 13
GND 14
CELL
10
PR701
4.7_0402_1%
PR701
4.7_0402_1%
12
PR707
100K_0402_1%
PR707
100K_0402_1%
12
PC719
0.1U_0402_25V6
@
PC719
0.1U_0402_25V6
@
1 2
PR724
100K_0402_1%
PR724
100K_0402_1%
1 2
PR710 0_0402_5%~D@PR710 0_0402_5%~D@
1 2
PC722
0.1U_0402_25V6
PC722
0.1U_0402_25V6
1 2
PC704
10U_0805_25V6K
PC704
10U_0805_25V6K
12
PQ702
AO4407AL_SO8
PQ702
AO4407AL_SO8
3 6
5
7
8
2
4
1
PR704
0_0402_5%~D
@
PR704
0_0402_5%~D
@
1 2
PC712
10U_0805_25V5K~D
@
PC712
10U_0805_25V5K~D
@
12
+
PC724
100U_25V_M
+
PC724
100U_25V_M
1
2
PC711
0.01UF_0402_25V7K
PC711
0.01UF_0402_25V7K
1 2
PC720
100P_0402_50V8J
PC720
100P_0402_50V8J
1 2
PR720
3.3K_1206_5%~D
PR720
3.3K_1206_5%~D
12
PC703
10U_0805_25V6K
PC703
10U_0805_25V6K
12
PL702
1UH_PCMB053T-1R0MS_7A_20%
EMI@
PL702
1UH_PCMB053T-1R0MS_7A_20%
EMI@
1 2
G
D
S
PQ706
2N7002KW_SOT323-3
G
D
S
PQ706
2N7002KW_SOT323-3
2
13
PC715
680P_0402_50V7K
@EMI@
PC715
680P_0402_50V7K
@EMI@
12
PR706
4.02K_0402_1%
PR706
4.02K_0402_1%
12
CSD87312Q3E_SON8-4
PQ701
CSD87312Q3E_SON8-4
PQ701
D1
1D2 3
G
2S4
PR714 0_0402_5%~D@PR714 0_0402_5%~D@
1 2
PC717
0.1U_0402_25V6
PC717
0.1U_0402_25V6
1 2
PQ703
MDU1516URH_POWERDFN56-8-5
PQ703
MDU1516URH_POWERDFN56-8-5
4
5
1
2
3
PR709
2.2_0603_5%
PR709
2.2_0603_5%
1 2
PC702
0.1U_0402_25V6
PC702
0.1U_0402_25V6
1 2
PC716
10U_0805_25V5K~D
PC716
10U_0805_25V5K~D
12
PR703
4.02K_0402_1%
PR703
4.02K_0402_1%
12
PC710
1U_0603_25V6K
PC710
1U_0603_25V6K
12
PR716
0.01_1206_1%
PR716
0.01_1206_1%
1
3
4
2
PL701
2.2UH_FDVE1040-H-2R2M-P3_14.2A_20%
PL701
2.2UH_FDVE1040-H-2R2M-P3_14.2A_20%
1 2
PC723
0.01U_0402_25V7K
PC723
0.01U_0402_25V7K
12
PC709
1U_0603_10V6K
PC709
1U_0603_10V6K
1 2

A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
3VALWP
TDC 5.95A
Peak Current 8.5A
OCP current 10.2A
TYP MAX
H/S Rds(on): 22mohm , 30mohm
L/S Rds(on):10.8mohm ,13.6mohm
5VALWP
TDC 5.96A
Peak Current 8.51A
OCP current 10.2A
TYP MAX
H/S Rds(on):22mohm , 30mohm
L/S Rds(on):10.8mohm , 13.6mohm
Change to 4.7u for TPS51285
VFB=2V
ESR=17m ohm
ESR=17m ohm
VFB=2V
POK need pull high, it
will pull high on VS
transfer circuit
Output capacitor ESR need follow
below equation to make sure feed back
loop stability
ESR=20mV*L*fsw/2V
Place PD101 close to PU100
5V_EN
3V_EN
CS1
BST_5V
LX_5V
FB_5V
UG_5V
BST_3V
LG_5V
5V_EN
CS2
FB_3V
3/5V_B+
LX_3V
UG_3V
LG_3V
3/5V_B+
3V_EN
3V_EN
5V_EN
VCOUT0_PH#<30>
EC_ON<30>
+5VALWP
+3VALW +5VALW
+3VALWP
+5VALWP
+3VALWP
B+
+5VALWP
+3VLP
VL
3/5V_B+
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
0.4
38 57Wednesday, May 22, 2013
2013/05/21 2014/05/01
Compal Electronics, Inc.
PWR_3.3VALWP/5VALWP
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
0.4
38 57Wednesday, May 22, 2013
2013/05/21 2014/05/01
Compal Electronics, Inc.
PWR_3.3VALWP/5VALWP
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
0.4
38 57Wednesday, May 22, 2013
2013/05/21 2014/05/01
Compal Electronics, Inc.
PWR_3.3VALWP/5VALWP
PR113
4.7_1206_5%
@EMI@ PR113
4.7_1206_5%
@EMI@
12
PC110
0.1U_0402_10V7K
PC110
0.1U_0402_10V7K
1 2
+
PC101
220U_6.3V_M
+
PC101
220U_6.3V_M
1
2
PC115
10U_0805_25V6K
PC115
10U_0805_25V6K
12
PR102
2.2K_0402_5%
PR102
2.2K_0402_5%
1 2
PC112
10U_0805_25V6K
PC112
10U_0805_25V6K
12
PR105
84.5K_0402_1%
PR105
84.5K_0402_1%
1 2
PR107
10K_0402_1%
PR107
10K_0402_1%
1 2
PR100 0_0402_5%~D@PR100 0_0402_5%~D@
1 2
TPS51225CRUKR_QFN20_3X3
PU100
TPS51225CRUKR_QFN20_3X3
PU100
CS1 1
VFB1 2
VREG3 3
VFB2 4
CS2 5
EN2
6
PGOOD
7
SW2
8
VBST2
9
DRVH2
10
DRVL2
11
VIN
12
VREG5
13
VO1
14
DRVL1
15
DRVH1 16
VBST1 17
SW1 18
VCLK 19
EN1 20
PAD 21
+
PC107
220U_6.3V_M
+
PC107
220U_6.3V_M
1
2
PC109
1U_0603_10V6K
PC109
1U_0603_10V6K
1 2
PC100
4.7U_0603_6.3V6K
PC100
4.7U_0603_6.3V6K
12
PR114
200_0402_5%
@PR114
200_0402_5%
@
1 2
PR112
4.7_1206_5%
@EMI@ PR112
4.7_1206_5%
@EMI@
12
PJP101
PAD-OPEN 4x4m
@PJP101
PAD-OPEN 4x4m
@
1 2
PC111
680P_0603_50V8J
@EMI@ PC111
680P_0603_50V8J
@EMI@
12
PD101
EMI@
L03ESDL5V0CG3-2_SOT-523-3
PD101
EMI@
L03ESDL5V0CG3-2_SOT-523-3
1
1
22
33
PL101
2.2UH_PCMB063T-2R2MS_8A_20%
PL101
2.2UH_PCMB063T-2R2MS_8A_20%
1 2
PR111
2.2_0402_5%
PR111
2.2_0402_5%
1 2
PR109
6.49K_0402_1%
PR109
6.49K_0402_1%
1 2
PR108
90.9K_0402_1%
PR108
90.9K_0402_1%
12
PC102
100P_0402_50V8J
@PC102
100P_0402_50V8J
@
1 2
PR101 0_0402_5%~D@PR101 0_0402_5%~D@
1 2
PR106
10K_0402_1%
PR106
10K_0402_1%
1 2
PC103
680P_0603_50V8J
@EMI@ PC103
680P_0603_50V8J
@EMI@
12
PL100
2.2UH_PCMB063T-2R2MS_8A_20%
PL100
2.2UH_PCMB063T-2R2MS_8A_20%
12
PR104
15K_0402_1%
PR104
15K_0402_1%
1 2
PC108
100P_0402_50V8J
@PC108
100P_0402_50V8J
@
1 2
PQ102
MDV1525URH 1N PDFN33-8
PQ102
MDV1525URH 1N PDFN33-8
3 5
2
4
1
PC105
1U_0603_25V6K
@PC105
1U_0603_25V6K
@
12
PC106
1U_0603_10V6K
PC106
1U_0603_10V6K
12
PC113
0.1U_0402_25V6
@EMI@ PC113
0.1U_0402_25V6
@EMI@
12
PJP100
PAD-OPEN 4x4m
@PJP100
PAD-OPEN 4x4m
@
1 2
PC104
0.1U_0402_10V7K
PC104
0.1U_0402_10V7K
1 2
PJP102
PAD-OPEN 4x4m
@PJP102
PAD-OPEN 4x4m
@
1 2
PR103
2.2_0402_5%
PR103
2.2_0402_5%
1 2
PJP103
PAD-OPEN 4x4m
@PJP103
PAD-OPEN 4x4m
@
1 2
PQ104
MDV1525URH 1N PDFN33-8
PQ104
MDV1525URH 1N PDFN33-8
3 5
2
4
1
PL102
1UH_PCMB053T-1R0MS_7A_20%
EMI@
PL102
1UH_PCMB053T-1R0MS_7A_20%
EMI@
1 2
PC114
2200P_0402_50V7K
EMI@ PC114
2200P_0402_50V7K
EMI@
12
PQ101
MDV1528URH 1N PDFN33-8
PQ101
MDV1528URH 1N PDFN33-8
3 5
2
4
1
PQ103
MDV1528URH 1N PDFN33-8
PQ103
MDV1528URH 1N PDFN33-8
3 5
2
4
1

A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
Note:Iload(max)=3A
FB=0.6V
Note:Iload(max)=2.5A
Rup
Rdown
Note:Iload(max)=3A
FB=0.6V
Note:Iload(max)=2.5A
Rup
Rdown
SUSP#
FB_1.5VSP
LX_1.5VSP
+1.5VSP_ON
PXS_PWREN
FB_1.8VSP
LX_1.8VSP
+1.8VSP_ON
SUSP# <28,30,40>
PXS_PWREN <10,11,43,44,50>
+3VALW
+1.5VSP +1.5VS
+1.5VSP
+3VALW
+1.8VSP +1.8VS
+1.8VSP
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
0.4
39 57Wednesday, May 22, 2013
2013/05/21 2014/05/01
Compal Electronics, Inc.
PWR_1.5VSP / 1.8VSP
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
0.4
39 57Wednesday, May 22, 2013
2013/05/21 2014/05/01
Compal Electronics, Inc.
PWR_1.5VSP / 1.8VSP
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
0.4
39 57Wednesday, May 22, 2013
2013/05/21 2014/05/01
Compal Electronics, Inc.
PWR_1.5VSP / 1.8VSP
PC602
22U_0805_6.3VAM
VGA@ PC602
22U_0805_6.3VAM
VGA@
12
PJP401
JUMP_43X79
@
PJP401
JUMP_43X79
@
1
122
PC600
22U_0805_6.3VAM
VGA@ PC600
22U_0805_6.3VAM
VGA@
12
PU400
SY8003DFC_DFN8_2X2
PU400
SY8003DFC_DFN8_2X2
NC 5
IN
3
PGND
4
PG
2
FB
1
LX 6
EN 7
SGND 8
PGND 9
PL600
1UH_PH041H-1R0MS_3.8A_20%
VGA@
PL600
1UH_PH041H-1R0MS_3.8A_20%
VGA@
1 2
PR601
0_0402_5%~D
@PR601
0_0402_5%~D
@
1 2
PC405
22U_0805_6.3VAM
PC405
22U_0805_6.3VAM
12
PU600
SY8003DFC_DFN8_2X2
VGA@
PU600
SY8003DFC_DFN8_2X2
VGA@
NC 5
IN
3
PGND
4
PG
2
FB
1
LX 6
EN 7
SGND 8
PGND 9
PC404
68P_0402_50V8J
PC404
68P_0402_50V8J
12
PR404
1M_0402_5%
PR404
1M_0402_5%
12
PC601
680P_0402_50V7K
@EMI@ PC601
680P_0402_50V7K
@EMI@
12
PJP600
JUMP_43X79
@PJP600
JUMP_43X79
@
1
122
PR603
20K_0402_1%
VGA@
PR603
20K_0402_1%
VGA@
12
PC403
0.1U_0402_16V7K
@
PC403
0.1U_0402_16V7K
@
12
PJP400
JUMP_43X79
@PJP400
JUMP_43X79
@
1
122
PC400
22U_0805_6.3VAM
PC400
22U_0805_6.3VAM
12
PR403
15K_0402_1%
PR403
15K_0402_1%
12
PC603
0.1U_0402_16V7K
@
PC603
0.1U_0402_16V7K
@
12
PR602
10K_0402_1%
VGA@
PR602
10K_0402_1%
VGA@
12
PC604
68P_0402_50V8J
VGA@
PC604
68P_0402_50V8J
VGA@
12
PC401
680P_0402_50V7K
@EMI@ PC401
680P_0402_50V7K
@EMI@
12
PR604
1M_0402_5%
VGA@PR604
1M_0402_5%
VGA@
12
PR605
4.7_0603_5%
@EMI@ PR605
4.7_0603_5%
@EMI@
12
PR401
0_0402_5%~D
@PR401
0_0402_5%~D
@
1 2
PC402
22U_0805_6.3VAM
PC402
22U_0805_6.3VAM
12
PJP601
JUMP_43X79
@
PJP601
JUMP_43X79
@
1
122
PR405
4.7_0603_5%
@EMI@ PR405
4.7_0603_5%
@EMI@
12
PR402
10K_0402_1%
PR402
10K_0402_1%
12
PL400
1UH_PH041H-1R0MS_3.8A_20%
PL400
1UH_PH041H-1R0MS_3.8A_20%
1 2
PC605
22U_0805_6.3VAM
VGA@
PC605
22U_0805_6.3VAM
VGA@
12

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Compal Electronics, Inc.
FB = 0.6V
The current limit is set to 6A, 8A or 12A when this pin
is pull low, floating or pull high
EN pin don't floating
If have pull down resistor at HW side, pls delete PR301
Pin 7 BYP is for CS.
Common NB can delete +3VALW and PC313
Rup
Rdown
Vout=0.6V* (1+Rup/Rdown)
Vout=1.05V
VFB=0.6V
+1.05VSP
TDC 5A
Peak Current 6.6A
OCP current 8A
SNB_1.05V
B+_1.05V
LX_1.05V
ILMT_1.05V
ILMT_1.05V LDO_3V
BST_1.05V
+1.05V_PGOOD
SUSP# <28,30,39>
+1.05V_PGOOD<30>
+3VALW
B+
+1.05VSP
LDO_3V
+1.05VSP
+1.05VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.4
PWR_+VCCIO
C
40 57Wednesday, May 22, 2013
2013/05/21 2014/05/01
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.4
PWR_+VCCIO
C
40 57Wednesday, May 22, 2013
2013/05/21 2014/05/01
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
0.4
PWR_+VCCIO
C
40 57Wednesday, May 22, 2013
2013/05/21 2014/05/01
PR308
10K_0402_5%
PR308
10K_0402_5%
1 2
PC309
47U_0805_6.3V6M
PC309
47U_0805_6.3V6M
12
PR301
1M_0402_1%
PR301
1M_0402_1%
12
PR300
0_0402_5%~D
@PR300
0_0402_5%~D
@
1 2
PC313
4.7U_0603_6.3V6K
PC313
4.7U_0603_6.3V6K
12
PL302
SUPPRE_ FBMA-L11-453215-800LMA90T_1812
EMI@ PL302
SUPPRE_ FBMA-L11-453215-800LMA90T_1812
EMI@
1 2
PC311
22U_0805_6.3VAM
PC311
22U_0805_6.3VAM
12
PC305
10U_0805_25V6K
PC305
10U_0805_25V6K
12
PR305
15K_0402_1%
PR305
15K_0402_1%
12
PC310
22U_0805_6.3VAM
PC310
22U_0805_6.3VAM
12
PR303
0_0603_1%
@PR303
0_0603_1%
@
1 2
PR307
20K_0402_1%
PR307
20K_0402_1%
12
PC301
680P_0603_50V7K
@EMI@ PC301
680P_0603_50V7K
@EMI@
1 2
PC303
2200P_0402_50V7K
EMI@ PC303
2200P_0402_50V7K
EMI@
12
PR304
0_0402_5%
@PR304
0_0402_5%
@
12
PC312
4.7U_0603_6.3V6K
PC312
4.7U_0603_6.3V6K
12
PC306
10U_0805_25V6K
PC306
10U_0805_25V6K
12
PL301
1UH_PCMB063T-1R0MS_12A_20%
PL301
1UH_PCMB063T-1R0MS_12A_20%
1 2
PJP300
JUMP_43X118
@PJP300
JUMP_43X118
@
1
122
PC302
0.1U_0603_25V7K
PC302
0.1U_0603_25V7K
1 2
PR302
4.7_1206_5%
@EMI@ PR302
4.7_1206_5%
@EMI@
1 2
PC308
47U_0805_6.3V6M
PC308
47U_0805_6.3V6M
12
PC307
330P_0402_50V7K
PC307
330P_0402_50V7K
12
PU300
SY8206DQNC_QFN10_3X3
PU300
SY8206DQNC_QFN10_3X3
IN
8
BYP 7
PG
2
ILMT
3
LX 10
FB 4
LDO 5
GND
9
EN 1
BS 6
PC300
0.22U_0402_10V6K
@PC300
0.22U_0402_10V6K
@
12
PC304
0.1U_0402_25V6
@EMI@ PC304
0.1U_0402_25V6
@EMI@
12
PR306
0_0402_5%
@PR306
0_0402_5%
@
12

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
1.35VP
TDC 6A
Peak Current 8A
OCP current 10A
0.675Volt +/- 5%
TDC 0.7A
Peak Current 1A
DL_1.35V
TON_1.35V
BOOT_1.35V
1.35V_B+
1.35V_B+
DH_1.35V
SW_1.35V
CS_1.35V
BST_1.35V
VDD_1.35V
FB_1.35V
VTTREF_1.35V
EN_1.35V
EN_0.675VSP
SYSON<30>
0.675V_DDR_VTT_ON<17>
B+
+1.35VP
+5VALW
+5VALW
+1.35VP
+0.675VSP
+1.35VP
+1.35VP
+1.35VP +1.35V
+0.675VSP +0.675VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
0.4
41 57Wednesday, May 22, 2013
2013/05/21 2014/05/01
Compal Electronics, Inc.
PWR_+1.35VP/0.675VSP
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
0.4
41 57Wednesday, May 22, 2013
2013/05/21 2014/05/01
Compal Electronics, Inc.
PWR_+1.35VP/0.675VSP
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
0.4
41 57Wednesday, May 22, 2013
2013/05/21 2014/05/01
Compal Electronics, Inc.
PWR_+1.35VP/0.675VSP
PC205
10U_0805_6.3V6K
PC205
10U_0805_6.3V6K
12
PJP200
JUMP_43X118
@PJP200
JUMP_43X118
@
1
122
PJP201
JUMP_43X118
@PJP201
JUMP_43X118
@
1
122
PR208
1M_0402_1%
PR208
1M_0402_1%
1 2
PC206
10U_0805_25V6K
PC206
10U_0805_25V6K
12
PQ201
AON7506
PQ201
AON7506
4
5
1
2
3
PC203
0.1U_0402_10V7K
@PC203
0.1U_0402_10V7K
@
12
PJP203
JUMP_43X39
@PJP203
JUMP_43X39
@
11
2
2
PR200
2.2_0603_5%
PR200
2.2_0603_5%
1 2
PC209
1U_0603_10V6K
PC209
1U_0603_10V6K
12
PC210
0.033U_0402_16V7K
PC210
0.033U_0402_16V7K
12
PC208
0.1U_0402_25V6
@EMI@ PC208
0.1U_0402_25V6
@EMI@
12
PC211
10U_0805_6.3V6K
PC211
10U_0805_6.3V6K
12
PC201
2200P_0402_50V7K
EMI@ PC201
2200P_0402_50V7K
EMI@
12
PC202
0.1U_0402_10V7K
@PC202
0.1U_0402_10V7K
@
12
PR205
11.8K_0402_1%
PR205
11.8K_0402_1%
1 2
PR207
54.9K_0402_1%
PR207
54.9K_0402_1%
1 2
PR206
5.1_0603_5%
PR206
5.1_0603_5%
1 2
+
PC213
330U_2.5V_M
+
PC213
330U_2.5V_M
1
2
PQ200
AON7408L
PQ200
AON7408L
4
5
1
2
3
PL200
1UH_PCMB063T-1R0MS_12A_20%
PL200
1UH_PCMB063T-1R0MS_12A_20%
1 2
PC200
0.1U_0603_25V7K
PC200
0.1U_0603_25V7K
12
PU200
RT8207MZQW_WQFN20_3X3
PU200
RT8207MZQW_WQFN20_3X3
VTTSNS 2
FB
6
S5
8
PGOOD
10
VDDP
12
PHASE 16
BOOT 18
VTTREF 4
PGND
14
VTTGND 1
GND 3
VDDQ 5
S3
7
TON
9
VDD
11
CS
13
LGATE
15
UGATE 17
VTT 20
VLDOIN 19
PAD 21
PC207
680P_0402_50V7K
@EMI@ PC207
680P_0402_50V7K
@EMI@
12
PR201
0_0402_5%~D
@PR201
0_0402_5%~D
@
1 2
PL201
SUPPRE_ FBMA-L11-453215-800LMA90T_1812
EMI@
PL201
SUPPRE_ FBMA-L11-453215-800LMA90T_1812
EMI@
1 2
PR202
0_0402_5%~D
@PR202
0_0402_5%~D
@
1 2
PC212
10U_0805_25V6K
PC212
10U_0805_25V6K
12
PR204
68.1K_0402_1%
PR204
68.1K_0402_1%
12
PC204
1U_0603_10V6K
PC204
1U_0603_10V6K
1 2
PR203
4.7_1206_5%
@EMI@ PR203
4.7_1206_5%
@EMI@
12

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CPU_CORE
TDC 10A
Peak Current 32A
OCP current 40A
Load line -2mV/A
B value:4250K
Near PU502.
B value:3435K
Near PL502.
TI recommend 1nF
EMI Part (47.1)
Check are there a pair 100Ω
at HW side and close to CPU.
Place PC523
close to PR540
+VCC_PWR_SRC
SW_CPU2PWM1
VR_SVID_DAT
VR_SVID_ALRT#
VR_SVID_CLK
VREF_CPU
COMP_CPU
DROOP_CPU
V5A_CPU
CSN1_CPU
CSP1_CPU
+VCC_PWR_SRC VBAT_CPU
O-USR
F-IMAX
B-RAMPOCP_CPU
IMON_CPU
VREF_CPU
THERM_CPU
SLEWA_CPU
CSN1_CPU
CSP1_CPU
PWM1
SKIP#1
SKIP#
VR_ENABLE
SKIP#1
IMVP_PWRGD
VR_ON <13,30>
VR_SVID_ALRT#<13>
VR_SVID_DAT<13>
VR_SVID_CLK<13>
VSSSENSE<13,15>
VCCSENSE<13>
H_VR_READY <13>
VR_HOT#<30>
IMVP_PWRGD <30>
+CPU_CORE
B+
+3VS
+1.05VS
+3VS
+5VS
+5VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
0.4
42 57Wednesday, May 22, 2013
2013/05/21 2014/05/01
Compal Electronics, Inc.
PWR_VCORE
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
0.4
42 57Wednesday, May 22, 2013
2013/05/21 2014/05/01
Compal Electronics, Inc.
PWR_VCORE
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
0.4
42 57Wednesday, May 22, 2013
2013/05/21 2014/05/01
Compal Electronics, Inc.
PWR_VCORE
PH502
100K_0402_1%_TSM0B104F4251RZ
PH502
100K_0402_1%_TSM0B104F4251RZ
12
PC502
1000P_0402_50V7K
PC502
1000P_0402_50V7K
1 2
PC507
0.33U_0402_10V6K
PC507
0.33U_0402_10V6K
12
PR519
10_0603_1%
PR519
10_0603_1%
1 2
PR509
150K_0402_1%
PR509
150K_0402_1%
1 2
PC521
2200P_0402_25V7K
EMI@PC521
2200P_0402_25V7K
EMI@
12
PC520
680P_0402_50V7K
@EMI@ PC520
680P_0402_50V7K
@EMI@
12
PC504
1U_0402_6.3V6K
PC504
1U_0402_6.3V6K
12
+
PC515
100U_25V_M
+
PC515
100U_25V_M
1
2
PC523
0.1U_0402_10V7K
EMI@PC523
0.1U_0402_10V7K
EMI@
12
PL502
0.22UH_PCMB104T-R22MS_35A_20%
PL502
0.22UH_PCMB104T-R22MS_35A_20%
1
3
4
2
PR533
56_0402_1%
PR533
56_0402_1%
1 2
PC509
1000P_0402_50V7K
PC509
1000P_0402_50V7K
12
PC510
0.082U_0402_16V7K
PC510
0.082U_0402_16V7K
1 2
PC517
10U_0805_25V6K
PC517
10U_0805_25V6K
12
PC512
.1U_0402_16V7K
@
PC512
.1U_0402_16V7K
@
12
PR518
2.32K_0402_1%
PR518
2.32K_0402_1%
1 2
PR505
75K_0402_1%
PR505
75K_0402_1%
1 2
PC513
390P_0402_50V7K
@PC513
390P_0402_50V7K
@
12
PR507
75_0402_1%
@
PR507
75_0402_1%
@
1 2
PR502
9.31K_0402_1%
PR502
9.31K_0402_1%
1 2
PU502
CSD97374CQ4M_SON8_3P5X4P5
PU502
CSD97374CQ4M_SON8_3P5X4P5
PGND1 3
VDD 2
SKIP# 1
VSW 4
PWM
8
VIN
5
BOOT
7
BOOT_R
6
PGND2
9
PR514
75_0402_1%
@
PR514
75_0402_1%
@
1 2
PR531
3.65K_0402_1%
PR531
3.65K_0402_1%
12
PR512
10K_0402_5%~D
PR512
10K_0402_5%~D
1 2
PC518
10U_0805_25V6K
PC518
10U_0805_25V6K
12
PC508
4700P_0603_50V7K
PC508
4700P_0603_50V7K
1 2
PC501 0.1U_0402_25V6
PC501 0.1U_0402_25V6
1 2
PL501
SUPPRE_ FBMA-L11-453215-800LMA90T_1812
EMI@PL501
SUPPRE_ FBMA-L11-453215-800LMA90T_1812
EMI@
1 2
PR506
150K_0402_1%
PR506
150K_0402_1%
1 2
PR530
130_0402_1%
PR530
130_0402_1%
12
PC506
47P_0402_50V8J
PC506
47P_0402_50V8J
1 2
PR522
0_0402_5%~D
@PR522
0_0402_5%~D
@
1 2
PR529
5.76K_0402_1%
PR529
5.76K_0402_1%
12
+
PC516
100U_25V_M
+
PC516
100U_25V_M
1
2
PC522
0.1U_0402_10V7K
EMI@PC522
0.1U_0402_10V7K
EMI@
12
PR503
75K_0402_1%
PR503
75K_0402_1%
1 2
PR526
54.9_0402_1%
PR526
54.9_0402_1%
12
PR532
10K_0402_1%
PR532
10K_0402_1%
1 2
PR535
0_0402_5%~D
@PR535
0_0402_5%~D
@
1 2
PR536 2.2_0603_5%
PR536 2.2_0603_5%
12
PR516
1_0603_5%
PR516
1_0603_5%
12
PR528
75_0402_5%
@
PR528
75_0402_5%
@
12
PC503
1U_0603_10V6K
PC503
1U_0603_10V6K
12
PC511
0.082U_0402_16V7K
PC511
0.082U_0402_16V7K
1 2
PU501
TPS51622RSM_QFN32_4X4
PU501
TPS51622RSM_QFN32_4X4
SLEWA 15
VBAT 16
THERM 14
GFB
23
PU3
21
COMP
26
VCLK
31
V5A
28
DROOP
25
ALERT#
32
VFB
24
N/C
22
PAD
33
GND
29
PGOOD 3
VR_HOT#
30
VREF
27
VDIO 1
VDD 2
N/C 4
PWM2 5
PWM1 6
SKIP# 7
VR_ON 8
IMON 13
OCP-I 12
B-RAMP 11
F-IMAX 10
O-USR 9
CSP2
20
CSP1
17
CSN2
19
CSN1
18
PR524
10K_0402_1%~D
PR524
10K_0402_1%~D
12
PR504
499K_0402_1%
PR504
499K_0402_1%
1 2
PH501
10K_0402_1%_TSM0A103F34D1RZ
PH501
10K_0402_1%_TSM0A103F34D1RZ
12
PC514
1500P_0402_50V7K
PC514
1500P_0402_50V7K
1 2
PR510
75_0402_1%
@
PR510
75_0402_1%
@
12
PR534
4.7_1206_5%
@EMI@ PR534
4.7_1206_5%
@EMI@
12
PR517
16.5K_0402_1%
PR517
16.5K_0402_1%
12
PR515
3.01K_0402_1%
PR515
3.01K_0402_1%
12
PR513
39K_0402_5%
PR513
39K_0402_5%
1 2
PR501
523K_0402_1%
PR501
523K_0402_1%
1 2
PR508
10K_0402_5%~D
PR508
10K_0402_5%~D
1 2
PC505
1U_0603_10V6K
PC505
1U_0603_10V6K
12
PC519
0.1U_0402_25V6
@EMI@PC519
0.1U_0402_25V6
@EMI@
12
PR540
0_0402_5%
@PR540
0_0402_5%
@
12

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
TDC=9A
Peak Current=13A
OCP=16A
+VDDCIP
TDC 7A
Peak Current 13A
OCP current 16A
FB = 0.6V
The current limit is set to 8A, 12A or 16A when this pin
is pull low, floating or pull high
Pin 7 BYP is for CS.
Common NB can delete +3VALW and PC1205
Vout=0.6V* (1+Rup/Rdown)
Vout=0.9V
VFB=0.6V
Rup
Rdown
Low 0.9V
0.95VHigh
VDDCI_VID (GPIO_6)
BST_+1.2VSP
SW _+1.2VSP
UG_+1.2VSP
LG_+1.2VSP
PXS_PWREN
TRIP_+1.2VSP
EN_+1.2VSP
FB_+1.2VSP
RF_+1.2VSP
+1.2VSP_B+
SNB_VDDCI
B+_VDDCI
PXS_PWREN
LX_VDDCI
ILMT_VDDCI
ILMT_VDDCI LDO_3V_VDDCI
BST_VDDCI
VDDCI_SEN <52>
PXS_PW REN <10,11,39,44,50>
GPU_GPIO6 <49>
B+
+5VALW
+1.35VGPUP
+1.35VGPUP +1.35VS_VGA
+3VS
+3VALW
B+
+VDDCIP
LDO_3V_VDDCI
+VDDCIP +VDDCI
+3VGS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9984P
0.4
43 57Wednesday, May 22, 2013
2013/05/21 2014/05/01
Compal Electronics, Inc.
PWR_+1.35VGPU/VDDCIP
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9984P
0.4
43 57Wednesday, May 22, 2013
2013/05/21 2014/05/01
Compal Electronics, Inc.
PWR_+1.35VGPU/VDDCIP
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
LA-9984P
0.4
43 57Wednesday, May 22, 2013
2013/05/21 2014/05/01
Compal Electronics, Inc.
PWR_+1.35VGPU/VDDCIP
PC1202
10U_0805_25V6K
VENUS@ PC1202
10U_0805_25V6K
VENUS@
12
PR1203
0_0402_5%
VENUS@
PR1203
0_0402_5%
VENUS@
12
PL1200
1UH_PCMB063T-1R0MS_12A_20%
VENUS@ PL1200
1UH_PCMB063T-1R0MS_12A_20%
VENUS@
1 2
PC1203
0.1U_0402_25V6
@EMI@ PC1203
0.1U_0402_25V6
@EMI@
12
+
PC1108
330U_2.5V_M
VGA@
+
PC1108
330U_2.5V_M
VGA@
1
2
PR1214
100K_0402_5%
@PR1214
100K_0402_5%
@
12
PC1210
0.1U_0603_25V7K
VENUS@
PC1210
0.1U_0603_25V7K
VENUS@
1 2
PC1200
0.22U_0402_10V6K
@PC1200
0.22U_0402_10V6K
@
12
PC1104
0.1U_0402_16V7K
@PC1104
0.1U_0402_16V7K
@
12
PC1206
22U_0805_6.3VAM
VENUS@
PC1206
22U_0805_6.3VAM
VENUS@
12
PC1101
2200P_0402_50V7K
VGA@_EMI@ PC1101
2200P_0402_50V7K
VGA@_EMI@
12
PC1102
10U_0805_25V6K
VGA@ PC1102
10U_0805_25V6K
VGA@
12
G
D
S
PQ1201
2N7002W -T/R7_SOT323-3
VENUS@
G
D
S
PQ1201
2N7002W -T/R7_SOT323-3
VENUS@
2
13
PJP1100
JUMP_43X118
@PJP1100
JUMP_43X118
@
1
122
PC1212
680P_0603_50V7K
@EMI@ PC1212
680P_0603_50V7K
@EMI@
1 2
PU1200
SY8208DQNC_QFN10_3X3
VENUS@
PU1200
SY8208DQNC_QFN10_3X3
VENUS@
IN
8
BYP 7
PG
2
ILMT
3
LX 10
FB 4
LDO 5
GND
9
EN 1
BS 6
PC1204
10U_0805_25V6K
VENUS@ PC1204
10U_0805_25V6K
VENUS@
12
PR1212
10K_0402_5%
VENUS@PR1212
10K_0402_5%
VENUS@
12
PC1207
47U_0805_6.3V6M
VENUS@ PC1207
47U_0805_6.3V6M
VENUS@
12
PC1214
4700P_0402_25V7K
@PC1214
4700P_0402_25V7K
@
12
PR1204
20K_0402_1%
VENUS@
PR1204
20K_0402_1%
VENUS@
12
PL1201
SUPPRE_ FBMA-L11-453215-800LMA90T_1812
VENUS@_EMI@ PL1201
SUPPRE_ FBMA-L11-453215-800LMA90T_1812
VENUS@_EMI@
1 2
PJP1200
JUMP_43X118
@PJP1200
JUMP_43X118
@
1
122
PC1211
47U_0805_6.3V6M
VENUS@ PC1211
47U_0805_6.3V6M
VENUS@
12
PR1210
0_0402_5%~D
@PR1210
0_0402_5%~D
@
1 2
PC1213
4.7U_0603_6.3V6K
VENUS@
PC1213
4.7U_0603_6.3V6K
VENUS@
12
PR1103
0_0402_5%~D
@PR1103
0_0402_5%~D
@
1 2
PL1101
1UH_PCMB063T-1R0MS_12A_20%
VGA@ PL1101
1UH_PCMB063T-1R0MS_12A_20%
VGA@
1 2
PR1202
0_0402_5%
@PR1202
0_0402_5%
@
12
PC1209
2200P_0402_50V7K
VENUS@_EMI@ PC1209
2200P_0402_50V7K
VENUS@_EMI@
12
PC1205
4.7U_0603_6.3V6K
VENUS@ PC1205
4.7U_0603_6.3V6K
VENUS@
12
PQ1101
AON7506
VGA@
PQ1101
AON7506
VGA@
4
5
1
2
3
PR1208
10_0402_5%
VENUS@
PR1208
10_0402_5%
VENUS@
12
PC1103
0.1U_0603_25V7K
VGA@
PC1103
0.1U_0603_25V7K
VGA@
1 2
PC1106
680P_0402_50V7K
@EMI@PC1106
680P_0402_50V7K
@EMI@
12
PR1105
470K_0402_1%
VGA@PR1105
470K_0402_1%
VGA@
12
PJP1101
JUMP_43X118
@PJP1101
JUMP_43X118
@
1
122
PL1100
HCB2012KF-121T50_0805
VGA@_EMI@ PL1100
HCB2012KF-121T50_0805
VGA@_EMI@
1 2
PR1104
4.7_1206_5%
@EMI@PR1104
4.7_1206_5%
@EMI@
12
PC1105
1U_0603_10V6K
VGA@
PC1105
1U_0603_10V6K
VGA@
12
PR1207
4.7_1206_5%
@EMI@ PR1207
4.7_1206_5%
@EMI@
1 2
PR1107
9.09K_0402_1%
VGA@PR1107
9.09K_0402_1%
VGA@
1 2
PR1201
1M_0402_1%
VENUS@
PR1201
1M_0402_1%
VENUS@
12
PR1209
10K_0402_1%
VENUS@ PR1209
10K_0402_1%
VENUS@
1 2
PU1100
TPS51212DSCR_SON10_3X3
VGA@PU1100
TPS51212DSCR_SON10_3X3
VGA@
EN
3
TRIP
2
V5IN 7
DRVH 9
SW 8
DRVL 6
VBST 10
TST
5
VFB
4
PGOOD
1
TP 11
PR1213
10K_0402_5%
VENUS@PR1213
10K_0402_5%
VENUS@
12
PR1110
100K_0402_5%
@
PR1110
100K_0402_5%
@
12
PR1211
120K_0402_1%
VENUS@PR1211
120K_0402_1%
VENUS@
1 2
PC1201
22U_0805_6.3VAM
VENUS@ PC1201
22U_0805_6.3VAM
VENUS@
12
PR1206
0_0402_5%~D
@PR1206
0_0402_5%~D
@
1 2
PR1200
0_0603_1%
@PR1200
0_0603_1%
@
1 2
PR1101
2.2_0603_5%
VGA@
PR1101
2.2_0603_5%
VGA@
1 2
PC1100
0.1U_0402_25V6
@EMI@ PC1100
0.1U_0402_25V6
@EMI@
12
PR1102
154K_0402_1%
VGA@PR1102
154K_0402_1%
VGA@
1 2
PQ1100
AON7408L
VGA@
PQ1100
AON7408L
VGA@
4
5
1
2
3
PR1108
10K_0402_1%
VGA@PR1108
10K_0402_1%
VGA@
12

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VGA_CORE
Frequency 300kHz
TDC 23A(25W)/33A(32W)
Peak Current 30A(25W)/47A(32W)
OCP current 36A(25W)/56A(32W)
TYP MAX
H/S Rds(on) :12.2mohm , 15mohm
L/S Rds(on) :2.75mohm , 3.5mohm
Choke DCR 1.1mohm(Typ)/1.3mohm(Max)
Load line : -1.5mV/A
+VGA_PCIE
TDC 3A
Peak Current 4.2A
OCP current 6A
01 11 0.8V
0.825V
0.85V
0.875V
0.9V
0.925V
0.95V
0.975V
1111 0
1 0
0
011
001
0 0
1
0
0
0
1V
1.025V
1.05V
1.075V
1.1V
1.125V
1
11
1111
111 0
111 00
000 11
111 00
000 11
11 000
00001
11110
1 1 1 10 0.775V
Initial voltage:0.85V(Venus)
0.9V(Sun)
25W 32W
PR813
PR821
PR825
909
97.6K
976
1.4K
143K
1.5K
GPU_VID5
(GPIO_10)
GPU_VID4
(GPIO_14)
GPU_VID3
(GPIO_15)
GPU_VID2
(GPIO_16)
GPU_VID1
(GPIO_20) Core Voltage Level
1.15V
1.175V
1.2V
01110
01101
1 10 0 0
SUN XT VENUS PRO/XT
Load line
PR824
No need Need
pop un-pop
Vout=0.95V
GPU_B+
LX_PCIE
+VGA_PCIEP
EN_PCIE
FB_PCIE
PCIE_B+
PXS_PWREN
SNUB_PCIE
GPU_B+
BST_VGA_CORE
GFX_FB-1
GFX_FB-2
62881_FB62881_FB
62881_VW62881_VW
62881_COMP62881_COMP
62881_RBIAS
62881_VID0
62881_VR_ON
62881_VID1
62881_VID2
62881_VID3
62881_VID4
62881_VID5
62881_VID6
SW_VGA_CORE
62881_VIN
GPU_B+62881_VDD
ISUM-
ISUM+
62881_VCCP
UG_VGA_CORE
ISUM-2
ISUM-
ISUM-1
ISUM+
GPU_VID1
GPU_VID2
GPU_VID3
GPU_VID4
GPU_VID5
VCCSENSE_VGA<52>
DGPU_PWROK<10,30>
PXS_PWREN <10,11,39,43,50>
GPU_VID1 <49>
GPU_VID2 <49>
GPU_VID3 <49>
GPU_VID4 <49>
GPU_VID5 <49>
VSSSENSE_VGA<52>
+VGA_CORE
B+
+VGA_PCIEP +VGA_PCIE
+VGA_PCIEP
+3VALW
+5VALW
+5VALW
+VGA_CORE
+3VS
+3VS
+3VGS
+5VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
0.4
44 57Wednesday, May 22, 2013
2013/05/21 2014/05/01
Compal Electronics, Inc.
PWR_VGA_CORE/PCIE
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
0.4
44 57Wednesday, May 22, 2013
2013/05/21 2014/05/01
Compal Electronics, Inc.
PWR_VGA_CORE/PCIE
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
0.4
44 57Wednesday, May 22, 2013
2013/05/21 2014/05/01
Compal Electronics, Inc.
PWR_VGA_CORE/PCIE
PR815
47K_0402_1%
VGA@ PR815
47K_0402_1%
VGA@
12
PR8100_0402_5%~D @PR8100_0402_5%~D @
12
PR846
0_0402_5%~D
@PR846
0_0402_5%~D
@
12
PL802
0.36UH_MMD-12CE-R36M-M1L_34A_20%
VGA@ PL802
0.36UH_MMD-12CE-R36M-M1L_34A_20%
VGA@
1 2
PR835
10K_0402_1%
@PR835
10K_0402_1%
@
1 2
PR840
10K_0402_1%
@PR840
10K_0402_1%
@
1 2
PC1307
0.1U_0402_10V7K
VGA@PC1307
0.1U_0402_10V7K
VGA@
12
PC869
0.1U_0402_10V7K
VGA@ PC869
0.1U_0402_10V7K
VGA@
12
PJP1301
JUMP_43X79
@
PJP1301
JUMP_43X79
@
11
2
2
PR822
1_0603_5%
VGA@ PR822
1_0603_5%
VGA@
12
PR829
3.65K_0402_1%
VGA@PR829
3.65K_0402_1%
VGA@
12
PC816
1000P_0402_50V7K
VGA@PC816
1000P_0402_50V7K
VGA@
1 2
PC819
0.15U_0402_10V6K
VGA@PC819
0.15U_0402_10V6K
VGA@
1 2
PR825
1.5K_0402_1%
32W@PR825
1.5K_0402_1%
32W@
PC1304
680P_0402_50V7K
@EMI@ PC1304
680P_0402_50V7K
@EMI@
12
PC817
1000P_0402_50V7K
VGA@ PC817
1000P_0402_50V7K
VGA@
12
PC807
0.1U_0603_25V7K
VGA@PC807
0.1U_0603_25V7K
VGA@
1 2
PR823
0_0603_1%
@
PR823
0_0603_1%
@
1 2
PR8060_0402_5%~D @PR8060_0402_5%~D @
12
PR834
10K_0402_1%
SUN@PR834
10K_0402_1%
SUN@
1 2
PL800
FBMA-L11-453215-800LMA90T_1812
VGA@_EMI@PL800
FBMA-L11-453215-800LMA90T_1812
VGA@_EMI@
1 2
PC813
330P_0402_50V7K
@PC813
330P_0402_50V7K
@
1 2
PC1301
22U_0805_6.3VAM
VGA@
PC1301
22U_0805_6.3VAM
VGA@
12
PC1308
22U_0805_6.3VAM
VGA@ PC1308
22U_0805_6.3VAM
VGA@
12
PR816
2.61K_0402_1%
VGA@
PR816
2.61K_0402_1%
VGA@
1 2
PC1305
22U_0805_6.3VAM
VGA@ PC1305
22U_0805_6.3VAM
VGA@
12
PR1301
10K_0402_1%
VGA@ PR1301
10K_0402_1%
VGA@
12
PR837
10K_0402_1%
VGA@PR837
10K_0402_1%
VGA@
1 2
PR808
10K_0402_1%
@PR808
10K_0402_1%
@
12
PC809
330P_0402_50V7K
@PC809
330P_0402_50V7K
@
12
PR1302
5.9K_0402_1%
VGA@PR1302
5.9K_0402_1%
VGA@
12
PR825
976_0402_1%
25W@ PR825
976_0402_1%
25W@
1 2
PR8090_0402_5%~D @PR8090_0402_5%~D @
12
PR8120_0402_5%~D @PR8120_0402_5%~D @
12
PC1303
22U_0805_6.3VAM
VGA@ PC1303
22U_0805_6.3VAM
VGA@
12
PR805
4.7_1206_5%
@EMI@ PR805
4.7_1206_5%
@EMI@
12
PR824
0_0402_5%
LL@
PR824
0_0402_5%
LL@
12
PR827
11K_0402_1%
VGA@PR827
11K_0402_1%
VGA@
1 2
PC804
10U_0805_25V6K
VGA@
PC804
10U_0805_25V6K
VGA@
12
PQ801
MDU1511RH 1N POWERDFN56
VGA@
PQ801
MDU1511RH 1N POWERDFN56
VGA@
4
5
3
2
1
PC831
0.1U_0402_25V6K~D
@EMI@
PC831
0.1U_0402_25V6K~D
@EMI@
12
PR818
715_0402_1%
VGA@PR818
715_0402_1%
VGA@
12
PC810
0.22U_0603_25V7K
VGA@ PC810
0.22U_0603_25V7K
VGA@
12
PR8030_0402_5%~D @PR8030_0402_5%~D @
12
PR839
10K_0402_1%
VGA@PR839
10K_0402_1%
VGA@
1 2
PC818
1000P_0402_50V7K
VGA@PC818
1000P_0402_50V7K
VGA@
12
PR836
10K_0402_1%
VGA@PR836
10K_0402_1%
VGA@
1 2
PC1306
22P_0402_50V8J
VGA@ PC1306
22P_0402_50V8J
VGA@
12
PR826
10K_0402_1%
VENUS@PR826
10K_0402_1%
VENUS@
1 2
PQ800
MDU1516URH 1N POWERDFN56-8
32W@
PQ800
MDU1516URH 1N POWERDFN56-8
32W@
4
5
1
2
3
PR830
0_0402_5%~D
@
PR830
0_0402_5%~D
@
12
PR842
1K_0402_1%
VGA@PR842
1K_0402_1%
VGA@
12
PR813
1.4K_0402_1%
32W@PR813
1.4K_0402_1%
32W@
PR814 0_0603_1%@PR814 0_0603_1%@
1 2
PR838
10K_0402_1%
@PR838
10K_0402_1%
@
1 2
PR845
0_0402_5%~D
@PR845
0_0402_5%~D
@
12
PC814
56P_0402_50V8
VGA@ PC814
56P_0402_50V8
VGA@
1 2
PR813
909_0402_1%
25W@PR813
909_0402_1%
25W@
12
PR1300
200K_0402_5%
VGA@ PR1300
200K_0402_5%
VGA@
1 2
PR8070_0402_5%~D @PR8070_0402_5%~D @
12
PR819
10K_0402_1%
VGA@PR819
10K_0402_1%
VGA@
1 2
PR817
8.06K_0402_1%
VGA@PR817
8.06K_0402_1%
VGA@
12
PC815
680P_0603_50V7K
@EMI@ PC815
680P_0603_50V7K
@EMI@
12
PJP1300
JUMP_43X79
@
PJP1300
JUMP_43X79
@
11
2
2
PR8040_0402_5%~D @PR8040_0402_5%~D @
12
PC803
2.2U_0603_6.3V6K
VGA@PC803
2.2U_0603_6.3V6K
VGA@
12
PC811
1U_0603_10V6K
VGA@PC811
1U_0603_10V6K
VGA@
12
PR821
97.6K_0402_1%
25W@PR821
97.6K_0402_1%
25W@
1 2
PR828
10K_0402_1%
@PR828
10K_0402_1%
@
1 2
PR833
10_0402_5%
@
PR833
10_0402_5%
@
12
PR1304
47K_0402_5%
@PR1304
47K_0402_5%
@
12
PC1302
0.1U_0402_10V7K
VGA@ PC1302
0.1U_0402_10V7K
VGA@
12
PC805
10U_0805_25V6K
VGA@
PC805
10U_0805_25V6K
VGA@
12
PC821
.1U_0402_16V7K
VGA@
PC821
.1U_0402_16V7K
VGA@
1 2
PC832
2200P_0402_50V7K~D
VGA@_EMI@
PC832
2200P_0402_50V7K~D
VGA@_EMI@
12
PL1300
0.47UH_PCMB063T-R47MS_18A_20%
VGA@ PL1300
0.47UH_PCMB063T-R47MS_18A_20%
VGA@
1 2
PR802
0_0603_1%
@PR802
0_0603_1%
@
1 2
PR8110_0402_5%~D @PR8110_0402_5%~D @
12
PR1303
4.7_1206_5%
@EMI@ PR1303
4.7_1206_5%
@EMI@
12
PQ803
MDU1516URH 1N POWERDFN56-8
VGA@
PQ803
MDU1516URH 1N POWERDFN56-8
VGA@
4
5
1
2
3
PU1300
SY8036LDBC_DFN10_3x3
VGA@
PU1300
SY8036LDBC_DFN10_3x3
VGA@
EN
5
PG 4
LX 3
FB 6
SVIN
8
TP
11
LX 2
PVIN
10
SS
7
PVIN
9
LX
1
PR820
10_0402_5%
@
PR820
10_0402_5%
@
12
PC1300
22U_0805_6.3VAM
VGA@ PC1300
22U_0805_6.3VAM
VGA@
12
PU800
ISL62881CHRTZ-T_QFN28_4X4
VGA@PU800
ISL62881CHRTZ-T_QFN28_4X4
VGA@
FB
6
CLK_EN#
1
PGOOD
2
ISUM+ 10
ISUM 9
VID5
25
VID1 21
LGATE 18
VSSP 17
VID2
22
UGATE 15
RTN 8
RBIAS
3
VW
4
COMP
5
VID0 20
VCCP 19
VID3
23
VID4
24
VID6
26
VR_ON
27
DPRSLPVR
28
VSEN
7
VDD 11
VIN 12
IMON 13
BOOT 14
PHASE 16
AGND 29
PC808
10U_0805_25V6K
VGA@
PC808
10U_0805_25V6K
VGA@
12
PC820
0.033U_0402_16V7K
VGA@PC820
0.033U_0402_16V7K
VGA@
1 2
PH800
10KB_0402_5%_ERTJ0ER103J
VGA@PH800
10KB_0402_5%_ERTJ0ER103J
VGA@
1 2
PR821
143K_0402_1%
32W@PR821
143K_0402_1%
32W@
PC806
390P_0402_50V7K
VGA@ PC806
390P_0402_50V7K
VGA@
1 2
PQ802
MDU1511RH 1N POWERDFN56
VGA@
PQ802
MDU1511RH 1N POWERDFN56
VGA@
4
5
3
2
1

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+CPU_CORE
+VGA_CORE
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
0.4
45 57Wednesday, May 22, 2013
2013/05/21 2014/05/01
Compal Electronics, Inc.
PWR_PROCESSOR DECOUPLING
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
0.4
45 57Wednesday, May 22, 2013
2013/05/21 2014/05/01
Compal Electronics, Inc.
PWR_PROCESSOR DECOUPLING
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
0.4
45 57Wednesday, May 22, 2013
2013/05/21 2014/05/01
Compal Electronics, Inc.
PWR_PROCESSOR DECOUPLING
PC870
10U_0603_6.3V6MVGA@
PC870
10U_0603_6.3V6MVGA@
1
2
PC921
22U_0805_6.3V6M
PC921
22U_0805_6.3V6M
12
PC920
22U_0805_6.3V6M
PC920
22U_0805_6.3V6M
12
PC844
1U_0402_6.3V6KVGA@
PC844
1U_0402_6.3V6KVGA@
1
2
PC835
10U_0603_6.3V6MVGA@
PC835
10U_0603_6.3V6MVGA@
1
2
PC909
22U_0805_6.3V6M
PC909
22U_0805_6.3V6M
12
PC860
1U_0402_6.3V6KVGA@
PC860
1U_0402_6.3V6KVGA@
1
2
PC846
1U_0402_6.3V6KVGA@
PC846
1U_0402_6.3V6KVGA@
1
2
PC923
22U_0805_6.3V6M
PC923
22U_0805_6.3V6M
12
PC852
1U_0402_6.3V6KVGA@
PC852
1U_0402_6.3V6KVGA@
1
2
PC871
1U_0402_6.3V6KVGA@
PC871
1U_0402_6.3V6KVGA@
1
2
PC839
330U_D2_2V_Y
25W@PC839
330U_D2_2V_Y
25W@
PC918
22U_0805_6.3V6M
PC918
22U_0805_6.3V6M
12
PC912
22U_0805_6.3V6M
PC912
22U_0805_6.3V6M
12
PC848
1U_0402_6.3V6KVGA@
PC848
1U_0402_6.3V6KVGA@
1
2
PC865
1U_0402_6.3V6KVGA@
PC865
1U_0402_6.3V6KVGA@
1
2
PC906
22U_0805_6.3V6M
PC906
22U_0805_6.3V6M
12
PC904
22U_0805_6.3V6M
PC904
22U_0805_6.3V6M
12
PC908
22U_0805_6.3V6M
PC908
22U_0805_6.3V6M
12
PC841
1U_0402_6.3V6KVGA@
PC841
1U_0402_6.3V6KVGA@
1
2
PC910
22U_0805_6.3V6M
PC910
22U_0805_6.3V6M
12
PC836
330U_D2_2V_Y
25W@PC836
330U_D2_2V_Y
25W@
PC917
22U_0805_6.3V6M
PC917
22U_0805_6.3V6M
12
PC857
1U_0402_6.3V6KVGA@
PC857
1U_0402_6.3V6KVGA@
1
2
PC858
1U_0402_6.3V6KVGA@
PC858
1U_0402_6.3V6KVGA@
1
2
PC907
22U_0805_6.3V6M
PC907
22U_0805_6.3V6M
12
PC873
1U_0402_6.3V6KVGA@
PC873
1U_0402_6.3V6KVGA@
1
2
PC914
22U_0805_6.3V6M
PC914
22U_0805_6.3V6M
12
PC845
1U_0402_6.3V6KVGA@
PC845
1U_0402_6.3V6KVGA@
1
2
PC866
1U_0402_6.3V6KVGA@
PC866
1U_0402_6.3V6KVGA@
1
2
PC922
22U_0805_6.3V6M
PC922
22U_0805_6.3V6M
12
+
PC836
470U_D2_2VM_R4.5M~D
32W@
+
PC836
470U_D2_2VM_R4.5M~D
32W@
1
2
PC851
1U_0402_6.3V6KVGA@
PC851
1U_0402_6.3V6KVGA@
1
2
PC853
1U_0402_6.3V6KVGA@
PC853
1U_0402_6.3V6KVGA@
1
2
PC903
22U_0805_6.3V6M
PC903
22U_0805_6.3V6M
12
PC837
330U_D2_2V_Y
25W@PC837
330U_D2_2V_Y
25W@
PC902
22U_0805_6.3V6M
PC902
22U_0805_6.3V6M
12
PC849
1U_0402_6.3V6KVGA@
PC849
1U_0402_6.3V6KVGA@
1
2
PC915
22U_0805_6.3V6M
PC915
22U_0805_6.3V6M
12
+
PC837
470U_D2_2VM_R4.5M~D
32W@
+
PC837
470U_D2_2VM_R4.5M~D
32W@
1
2
PC855
1U_0402_6.3V6KVGA@
PC855
1U_0402_6.3V6KVGA@
1
2
PC868
10U_0603_6.3V6MVGA@
PC868
10U_0603_6.3V6MVGA@
1
2
PC872
1U_0402_6.3V6KVGA@
PC872
1U_0402_6.3V6KVGA@
1
2
PC901
22U_0805_6.3V6M
PC901
22U_0805_6.3V6M
12
PC840
1U_0402_6.3V6KVGA@
PC840
1U_0402_6.3V6KVGA@
1
2
PC919
22U_0805_6.3V6M
PC919
22U_0805_6.3V6M
12
PC864
1U_0402_6.3V6KVGA@
PC864
1U_0402_6.3V6KVGA@
1
2
PC842
1U_0402_6.3V6KVGA@
PC842
1U_0402_6.3V6KVGA@
1
2
PC850
1U_0402_6.3V6KVGA@
PC850
1U_0402_6.3V6KVGA@
1
2
PC861
1U_0402_6.3V6KVGA@
PC861
1U_0402_6.3V6KVGA@
1
2
+
PC839
470U_D2_2VM_R4.5M~D
32W@
+
PC839
470U_D2_2VM_R4.5M~D
32W@
1
2
PC916
22U_0805_6.3V6M
PC916
22U_0805_6.3V6M
12
PC911
22U_0805_6.3V6M
PC911
22U_0805_6.3V6M
12
PC856
1U_0402_6.3V6KVGA@
PC856
1U_0402_6.3V6KVGA@
1
2
PC913
22U_0805_6.3V6M
PC913
22U_0805_6.3V6M
12
PC863
1U_0402_6.3V6KVGA@
PC863
1U_0402_6.3V6KVGA@
1
2
PC854
1U_0402_6.3V6KVGA@
PC854
1U_0402_6.3V6KVGA@
1
2
PC905
22U_0805_6.3V6M
PC905
22U_0805_6.3V6M
12
+
PC838
470U_D2_2VM_R4.5M~D
32W@
+
PC838
470U_D2_2VM_R4.5M~D
32W@
1
2
PC843
1U_0402_6.3V6KVGA@
PC843
1U_0402_6.3V6KVGA@
1
2
PC867
10U_0603_6.3V6MVGA@
PC867
10U_0603_6.3V6MVGA@
1
2
PC838
330U_D2_2V_Y
25W@PC838
330U_D2_2V_Y
25W@
PC847
1U_0402_6.3V6KVGA@
PC847
1U_0402_6.3V6KVGA@
1
2
PC859
1U_0402_6.3V6KVGA@
PC859
1U_0402_6.3V6KVGA@
1
2
PC862
1U_0402_6.3V6KVGA@
PC862
1U_0402_6.3V6KVGA@
1
2

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.8VSP: TDC:2.5A
SY8003DFC
PXS_PWREN
Page 48
+VCCIO: TDC:5A
SY8206DQNC
Page 49
SUSP#
+3VALW
Page 50
+1.35VP/+0.675VSP: TDC:6A/0.7A
RT8207MZQW
B+
EC_ON
DC IN
+3VALWP: TDC:5.4A
+5VALWP: TDC:5.6A
TPS51225CRUKR
Power block
CHARGER
CC:0A~1A(4cell) or 2.1A(6cell)
CV:17.7V(4cell) / 13.3V(6cell)
BQ24717
SYSON
VR_ON
+CPU_CORE
TDC: 14A
TPS51622RSM
+1.5VSP: TDC:2.5A
SY8003DFC
Page 48
Page 47
Page 46
Input
Switch
Page 51
CPU OTP
Turn Off
Page 45
Page 46
Battery
SUSP#
+VGA_CORE
TDC: 23A / 33A
ISL62881CHRTZ-T
PXS_PWREN
Page 53
PXS_PWREN
+VGA_PCIEP: TDC:3A
SY8036LDBC
Page 53
PXS_PWREN
Page 52
+VDDCIP: TDC:7A
SY8208DQNC
+1.35VGPUP: TDC:9A
TPS51212DSCR
PXS_PWREN
Page 52
+3VALW
+3VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
0.4
46 57Wednesday, May 22, 2013
2013/05/21 2014/05/01
Compal Electronics, Inc.
PWR_POWER BLOCK DIAGRAM
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
0.4
46 57Wednesday, May 22, 2013
2013/05/21 2014/05/01
Compal Electronics, Inc.
PWR_POWER BLOCK DIAGRAM
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
0.4
46 57Wednesday, May 22, 2013
2013/05/21 2014/05/01
Compal Electronics, Inc.
PWR_POWER BLOCK DIAGRAM

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
P age 1
P age 1Page 1
P age 1
Solu tio n D escription
Solu tio n D escriptionSolu tio n D escription
Solu tio n D escription R ev .
R ev .R ev .
R ev.P ag e#
P ag e#P a ge#
P a ge # T it le
T it leT it le
T it le
V ersion C hange L ist ( P . I. R . L ist )
V ersion C hange L ist ( P . I. R . L ist )V ersion C hange L ist ( P . I. R . L ist )
V ersion C hange L ist ( P . I. R . L ist )
Item
ItemItem
Item Issu e D escriptio n
Issu e D escriptio nIssue D escriptio n
Issu e D escriptio nD ate
D ateD ate
D ate R eq uest
R eq uestR equ est
R eq uest
O w n er
O w n erO w n er
O w n er
1 37 CHARGER 13/01/30 Morris adjust design parameter from vendor recommend delete PD702
change PC712 to unpop
change PQ704 to unpop
change PC707 from 0.1uF_0402 to 1uF_0603
change PC720 from 0.1uF to 100pF
change PC711 from 1000pF to 0.01uF
change PQ705 from SB00000SD00 to SB00000WY00
2 42 VCORE 13/01/30 Morris adjust design parameter from vendor recommend change PC509 from 0.1uF to 1000pF
change PR529 from 3.83K to 5.76K
change PR504 from 523K to 499K
3 36 DCIN/BATT CONN/OTP 13/01/30 Morris change from ESD request change PD1 from SC300002E00 to SC300001G00
0.3
0.3
0.3
4 38 3.3VALWP/5VALWP 13/02/01 Morris add ESD diode from ESD request add PD101(SCA00002A00) 0.3
5 42 VCORE 13/02/21 Morris adjust design parameter from fine tune result change PR501 from 422K to 523K
change PR503 from 56K to 75K
6 44 VGA_CORE/PCIE 13/02/21 Morris
0.3
0.3unpop from EE request unpop PR808
7 44 VGA_CORE/PCIE 13/03/05 Morris adjust output voltage from vender request 0.3unpop PR826 and pop PR834 (only for Sun XT)
8 13/03/28 Morris37
38
39
40
41
42
CHARGER
3.3VALWP/5VALWP
1.5VSP/1.8VSP
+VCCIO
+1.35VP/0.675VSP
VCORE
verify function ok, so delete 0 ohm to short unpop PR100,PR101,PR201,PR202,PR300,PR303,PR401,PR522,PR535,
PR704,PR708,PR710,PR714,PR715,PR717
0.4
369 DCIN/BATT CONN/OTP 13/04/09 Morris design change for solve issue unpop PR1 and PC5
41 +1.35VP/0.675VSP10
+1.35VGPU/VDDCI43
13/04/09 Morris part shortage issue change PQ201 and PQ1101 from SB00000T600 to SB000010A00
11 1.5VSP/1.8VSP39
43 +1.35VGPU/VDDCI
44 VGA_CORE/PCIE
13/04/09 verify function ok, so delete 0 ohm to short unpop PR601,PR802,PR803,PR814,PR823,PR830,PR845,PR846,
PR1103,PR1200,PR1206,PR1210
12 43 +1.35VGPU/VDDCI 13/04/09
Morris
Morris unpop VDDCI parts from vendor recommend and EEverify ok only for Sun XT unpop PL1200,PL1201,PU1200,PQ1201,PR1201,PR1203,PR1204,PR1208,PR1209,
PR1211,PR1212,PR1213,PC1201,PC1202,PC1204,PC1205,PC1206,PC1207,
PC1209,PC1210,PC1211,PC1213 (only for Sun XT)
0.4
0.4
0.4
0.4
Morris44 VGA_CORE/PCIE 13/04/12 change PL1300 from SH00000GQ00 to SH00000PK00
36 DCIN/BATT CONN/OTP 13/04/12
part shortage issue13
Morris customer request add PR2 10Kohm14
0.4
0.4
15 42 VCORE 13/04/15 Morris EMI request pop PC522 and add PC523 0.1uF 0.4
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
0.4
47 57Wednesday, May 22, 2013
2013/05/21 2014/05/01
Compal Electronics, Inc.
PWR-PIR
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
0.4
47 57Wednesday, May 22, 2013
2013/05/21 2014/05/01
Compal Electronics, Inc.
PWR-PIR
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
0.4
47 57Wednesday, May 22, 2013
2013/05/21 2014/05/01
Compal Electronics, Inc.
PWR-PIR

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
THAMES XT M2
Place CV326 Close to UV13
LVDS Interface
GFX PCIE LANE REVERSAL
Thames
RV198, 1.27K_0402_1% pull-down
RV203, 2K_0402_1% pull-up
PWR need to Modify +VGA_PCIE
CLK_PEG_VGA
PEG_CTX_GRX_P3
PEG_CTX_GRX_N3
PEG_CTX_GRX_P2
PEG_CTX_GRX_N2
PEG_CTX_GRX_P1
PEG_CTX_GRX_N1
PEG_CTX_GRX_P0
PEG_CTX_GRX_N0
PCIE_CRX_C_GTX_P1
PCIE_CRX_C_GTX_N1 PEG_CRX_GTX_N1
PEG_CRX_GTX_P1
PCIE_CRX_C_GTX_P0
PCIE_CRX_C_GTX_N0
PEG_CRX_GTX_P0
PEG_CRX_GTX_N0
PCIE_CRX_C_GTX_P3
PCIE_CRX_C_GTX_N3 PEG_CRX_GTX_N3
PEG_CRX_GTX_P3
PCIE_CRX_C_GTX_P2
PCIE_CRX_C_GTX_N2
PEG_CRX_GTX_P2
PEG_CRX_GTX_N2
CLK_PEG_VGA#
GPU_RST#
GPU_RST#
PEG_CTX_GRX_P0<12>
PEG_CTX_GRX_N0<12>
PEG_CTX_GRX_P1<12>
PEG_CTX_GRX_N1<12>
PEG_CTX_GRX_P2<12>
PEG_CTX_GRX_N2<12>
PEG_CTX_GRX_P3<12>
PEG_CTX_GRX_N3<12>
PEG_CRX_GTX_P1 <12>
PEG_CRX_GTX_N1 <12>
PEG_CRX_GTX_P2 <12>
PEG_CRX_GTX_N2 <12>
PEG_CRX_GTX_P3 <12>
PEG_CRX_GTX_N3 <12>
PEG_CRX_GTX_P0 <12>
PEG_CRX_GTX_N0 <12>
CLK_PEG_VGA<9>
CLK_PEG_VGA#<9>
DGPU_HOLD_RST#<10>
PLT_RST#<10,21,26,30,6>
+VGA_PCIE
+VGA_PCIE
+3VGS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
1.0
ATI_Venus Pro_M2_PCIE/LVDS
48 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
LA-9984P
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
1.0
ATI_Venus Pro_M2_PCIE/LVDS
48 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
LA-9984P
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
1.0
ATI_Venus Pro_M2_PCIE/LVDS
48 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
LA-9984P
CV450.1U_0402_10V7K DIS@CV450.1U_0402_10V7K DIS@
12
CV470.1U_0402_10V7K DIS@CV470.1U_0402_10V7K DIS@
12
UV1
216-0846000 A1 VENUS XT M2 FCBGA 962P 0FD
VENUSXT@
SA00006KW0L
UV1
216-0846000 A1 VENUS XT M2 FCBGA 962P 0FD
VENUSXT@
SA00006KW0L
UV13
MC74VHC1G08DFT2G_SC70-5
DIS@
UV13
MC74VHC1G08DFT2G_SC70-5
DIS@
IN1
1
IN2
2OUT 4
VCC 5
GND
3
CV440.1U_0402_10V7K DIS@CV440.1U_0402_10V7K DIS@
12
RV64 1K_0402_5%
DIS@
RV64 1K_0402_5%
DIS@
1 2
RV203
1K_0402_1%
DIS@
RV203
1K_0402_1%
DIS@
1 2
CV500.1U_0402_10V7K DIS@CV500.1U_0402_10V7K DIS@
12
CV480.1U_0402_10V7K DIS@CV480.1U_0402_10V7K DIS@
12
LVTMDP
LVDS CONTROL
UV1G
216-0833000-A11-THAMES-XT-M2_FCBGA962~D
@
LVTMDP
LVDS CONTROL
UV1G
216-0833000-A11-THAMES-XT-M2_FCBGA962~D
@
DIGON AJ27
TXCLK_LN_DPE3N AR34
TXCLK_LP_DPE3P AP34
TXCLK_UN_DPF3N AL36
TXCLK_UP_DPF3P AK35
TXOUT_L0N_DPE2N AU35
TXOUT_L0P_DPE2P AW37
TXOUT_L1N_DPE1N AU39
TXOUT_L1P_DPE1P AR37
TXOUT_L2N_DPE0N AR35
TXOUT_L2P_DPE0P AP35
TXOUT_L3N AP37
TXOUT_L3P AN36
TXOUT_U0N_DPF2N AK37
TXOUT_U0P_DPF2P AJ38
TXOUT_U1N_DPF1N AJ36
TXOUT_U1P_DPF1P AH35
TXOUT_U2N_DPF0N AH37
TXOUT_U2P_DPF0P AG38
TXOUT_U3N AG36
TXOUT_U3P AF35
VARY_BL AK27
PCI EXPRESS INTERFACE
CLOCK
CALIBRATION
UV1A
216-0833000-A11-THAMES-XT-M2_FCBGA962~D
@
PCI EXPRESS INTERFACE
CLOCK
CALIBRATION
UV1A
216-0833000-A11-THAMES-XT-M2_FCBGA962~D
@
PWRGOOD
AH16 PCIE_CALRN Y29
PCIE_CALRP Y30
PCIE_REFCLKN
AA36 PCIE_REFCLKP
AB35
PCIE_RX0N
Y37 PCIE_RX0P
AA38
PCIE_RX10N
K37 PCIE_RX10P
L38
PCIE_RX11N
J36 PCIE_RX11P
K35
PCIE_RX12N
H37 PCIE_RX12P
J38
PCIE_RX13N
G36 PCIE_RX13P
H35
PCIE_RX14N
F37 PCIE_RX14P
G38
PCIE_RX15N
E37 PCIE_RX15P
F35
PCIE_RX1N
W36 PCIE_RX1P
Y35
PCIE_RX2N
V37 PCIE_RX2P
W38
PCIE_RX3N
U36 PCIE_RX3P
V35
PCIE_RX4N
T37 PCIE_RX4P
U38
PCIE_RX5N
R36 PCIE_RX5P
T35
PCIE_RX6N
P37 PCIE_RX6P
R38
PCIE_RX7N
N36 PCIE_RX7P
P35
PCIE_RX8N
M37 PCIE_RX8P
N38
PCIE_RX9N
L36 PCIE_RX9P
M35
PERSTB
AA30
PCIE_TX0N Y32
PCIE_TX0P Y33
PCIE_TX10N L32
PCIE_TX10P L33
PCIE_TX11N L29
PCIE_TX11P L30
PCIE_TX12N K32
PCIE_TX12P K33
PCIE_TX13N J32
PCIE_TX13P J33
PCIE_TX14N K29
PCIE_TX14P K30
PCIE_TX15N H32
PCIE_TX15P H33
PCIE_TX1N W 32
PCIE_TX1P W 33
PCIE_TX2N U32
PCIE_TX2P U33
PCIE_TX3N U29
PCIE_TX3P U30
PCIE_TX4N T32
PCIE_TX4P T33
PCIE_TX5N T29
PCIE_TX5P T30
PCIE_TX6N P32
PCIE_TX6P P33
PCIE_TX7N P29
PCIE_TX7P P30
PCIE_TX8N N32
PCIE_TX8P N33
PCIE_TX9N N29
PCIE_TX9P N30
CV490.1U_0402_10V7K DIS@CV490.1U_0402_10V7K DIS@
12
UV1
216-0846009 A1 VENUS PRO M2 FCBGA 962P 0FD
VENUSPRO@
SA00006MW0L
UV1
216-0846009 A1 VENUS PRO M2 FCBGA 962P 0FD
VENUSPRO@
SA00006MW0L
RV66
100K_0402_5%
DIS@
RV66
100K_0402_5%
DIS@
12
RV198
1.69K_0402_1%
DIS@
RV198
1.69K_0402_1%
DIS@
1 2
CV460.1U_0402_10V7K DIS@CV460.1U_0402_10V7K DIS@
12
CV430.1U_0402_10V7K DIS@CV430.1U_0402_10V7K DIS@
12
CV326
0.1U_0402_25V6K
DIS@
CV326
0.1U_0402_25V6K
DIS@
1
2

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
AUD[1] AUD[0]
0 0 No audio function
0 1 Audio for DisplayPort and HDMI if dongle is detected
1 0 Audio for DisplayPort only
1 1 Audio for both DisplayPort and HDMI
HSYNCAUD[1]
ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE
GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET
ENABLE EXTERNAL BIOS ROM
GPIO0 PCIE FULL TX OUTPUT SWINGTX_PWRS_ENB
GPIO1TX_DEEMPH_EN PCIE TRANSMITTER DE-EMPHASIS
GPIO9 VGA ENABLEDBIF_VGA DIS
VIP_DEVICE_STRAP_ENA V2SYNC IGNORE VIP DEVICE STRAPS
GPIO_22_ROMCSB
GPIO2
STRAPS
Advertises PCIE speed
when compliance test
DESCRIPTION OF DEFAULT SETTINGSPIN
GPIO[13:11]ROMIDCFG(2:0)
RECOMMENDED
SETTINGS
RSVD
SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT
CONFIGURATION STRAPS
BIOS_ROM_EN
VSYNCAUD[0]
H2SYNC
GPIO8
GPIO21
GENERICC
X
X
0
0
0
0
11
X
XXX
0
0
0
H2SYNC GENERICC
AMD RESERVED CONFIGURATION STRAPS
ALLOW FOR PULLUP PADS FOR THESE STRAPS BUT DO NOT INSTALL
RESISTOR. IF THESE GPIOS ARE USED, THEY MUST KEEP "LOW" AND
NOT CONFLICT DURING RESET
RECOMMENDED SETTINGS
0= DO NOT INSTALL RESISTOR
1 = INSTALL 10K RESISTOR
X = DESIGN DEPENDANT
NA = NOT APPLICABLE
0.60 V level, Please
VREFG Divider ans
cap close to ASIC
XTALIN
Voltage Swing: 1.8 V
GPIO21 GPIO2
GPIO8
RSVD
RESERVED
RSVD
RESERVED
RSVD
RSVD
(1.8V@100mA VDD1DI)
(1.8V@65mA AVDD)
(1.8V@20mA TSVDD)
0: 50% swing
1: Full swing
0: disable
1: enable
0: disable
1: enable
0: 2.5GT/s
1: 5GT/s
Closed to GPU
20mil
20mil
20mil
10mil
10mil
10mil
(75mA)
(125mA)
(5mA)
65mA
100mA
Add 12/6 for MLPS
0.95V@Venus
TX_PWRS_ENB GPIO0 Transmitter Power Saving Enable
0: 50% Tx output swing for mobile mode
1: full Tx output swing (Default setting for Desktop)
GPIO1TX_DEEMPH_EN PCI Express Transmitter De-emphasis Enable
0: Tx de-emphasis diabled for mobile mode
1: Tx de-emphasis enabled (Defailt setting for desktop)
1
0
128Mx16bits
(64Mx32bits)
GDDR5
H5GQ2H24AFR-T2C
128Mx16bits
(64Mx32bits)
GDDR5
K4G20325FD-FC04
1 0 1
1
1
1 1
*
2k
4.75k NC
NC 4.75k
8.45k
SUN MLPs
PS_3
Hynix
Samsung
Micron
RV241 RV242 Bits [3:1]
000
001
111
*
K4W2G1646E-BY11
MT41K128M16JT-107G:K
H5TC2G63FFR-11C
128MX16bits
DDR3
RV85 PU
chg to @
128MX16bits
DDR3
128MX16bits
DDR3
VENUS MLPs
PS_3 used default
For GCLK
GPU_GPIO0
GPU_GPIO1
GPU_GPIO2
GPU_GPIO9
GPU_GPIO12
GPU_GPIO13
GPU_GPIO11
GPU_VID3
GPIO25_TDI
GPIO24_TRSTB
GPIO26_TCK
GPIO27_TMS
GPIO28_TDO
XTALIN
AC_BATT
XTALOUT
+DPLL_VDDC
+DPLL_PVDD
VRAM_ID0
VRAM_ID1
VRAM_ID2
+AVDD
+VDD1DI
+TSVDD
GPU_VID1
GPIO24_TRSTB
GPIO25_TDI
GPIO26_TCK
GPIO27_TMS
+VREFG_GPU
VGA_CLKREQ#_R
VGA_SMB_DA2
VGA_SMB_CK2
+DPLL_PVDD
+DPLL_VDDC
GPU_GPIO8
GENLK_CLK
GENLK_VSYNC
GPIO21_BBEN
GPU_VID2
VGA_SMB_CK2_R
GPU_GPIO0
GPU_GPIO2
GPU_GPIO1
GPU_GPIO9
GPU_GPIO13
GPU_GPIO12
GPU_GPIO11
GPU_GPIO8
GPU_THERMAL_D+ VGA_SMB_DA2
THM_ALERT#
VGA_SMB_CK2
GPU_THERMAL_D+
GPU_THERMAL_D-
THM_ALERT#
VGA_CLKREQ#_R
PS_1
PS_2
PS_3
TS_FDO
TS_FDO
PS_1 PS_2 PS_3
DPLL_PVSS
+DPLL_PVDD
VGA_SMB_DA2
VGA_SMB_CK2
GPU_VID5
VGA_SMB_DA2_R
PACIN#
AC_BATT
DPLL_PVSS
XTALINXTALOUT
AC_BATT
GPU_THERMAL_D-
GPU_VGA_R
GPU_VGA_G
GPU_VGA_B
GPU_VGA_HSYNC
GPU_VGA_VSYNC
GPU_VGA_DDCCLK
GPU_VGA_DDCDAT
GPU_GPIO6
GPU_VID4
VRAM_ID1
VRAM_ID0
VRAM_ID2
XTALIN
GPU_VID3<44>
GPU_VID1<44>
PEG_CLKREQ#<9>
GPU_VID2<44>
GPU_VID5<44>
ACIN<10,30,36,37>
ACIN_65W<30>
EC_SMB_DA2 <19,30,9>
EC_SMB_CK2 <19,30,9>
GPU_GPIO6<43>
GPU_VID4<44>
XTALIN<29>
+1.8VGS
+1.8VGS
+1.8VGS
+1.8VGS
+3VGS
+3VGS
+1.8VGS
+VGA_PCIE
+3VGS
+3VGS
+3VGS
+3VGS
+3VGS
+1.8VGS
+3VGS
+1.8VGS +1.8VGS
+3VGS
+3VGS
+3VGS
+1.8VGS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
1.0
ATI_Venus Pro_M2_Main_MSIC
49 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
LA-9984P
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
1.0
ATI_Venus Pro_M2_Main_MSIC
49 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
LA-9984P
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
1.0
ATI_Venus Pro_M2_Main_MSIC
49 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
LA-9984P
T85T85
RV98
4.7K_0402_5%
VENUS@
RV98
4.7K_0402_5%
VENUS@
1 2
T86T86
RP60
10K_8P4R_5%
@
RP60
10K_8P4R_5%
@
1 8
2 7
3 6
4 5
CV80
10U_0603_6.3V6M
VENUS@ CV80
10U_0603_6.3V6M
VENUS@
1
2
CV92
1U_0402_6.3V6K
DIS@ CV92
1U_0402_6.3V6K
DIS@
1
2
YV1
27MHZ_10PF_7V27000050
XTALDIS@YV1
27MHZ_10PF_7V27000050
XTALDIS@
GND
2
3
311
GND
4
CV78
0.1U_0402_10V7K
VENUS@ CV78
0.1U_0402_10V7K
VENUS@
1
2
RV251
0_0402_5%
@
RV251
0_0402_5%
@
1 2
RV84 499_0402_1%
VENUS@
RV84 499_0402_1%
VENUS@
1 2
RV8310K_0402_5% @RV8310K_0402_5% @
1 2
RV8210K_0402_5% @RV8210K_0402_5% @
1 2
LV15
BLM15BD121SN1D_0402
DIS@LV15
BLM15BD121SN1D_0402
DIS@
12
RV97
1M_0402_5%
XTALDIS@RV97
1M_0402_5%
XTALDIS@
CV83
1U_0402_6.3V6K
DIS@ CV83
1U_0402_6.3V6K
DIS@
1
2
RV90
10K_0402_5%
DIS@
RV90
10K_0402_5%
DIS@
12
RV95 249_0402_1%
VENUS@
RV95 249_0402_1%
VENUS@
12
T88T88
RV71 10K_0402_5%X76@RV71 10K_0402_5%X76@
1 2
CV331
0.68U_0402_10V
VENUS@
CV331
0.68U_0402_10V
VENUS@
1
2
CV94
10P_0402_50V8J
XTALDIS@
CV94
10P_0402_50V8J
XTALDIS@
12
G
S
D
QV14B
DMN66D0LDW-7_SOT363-6
DIS@
G
S
D
QV14B
DMN66D0LDW-7_SOT363-6
DIS@
61
2
LV14
BLM15BD121SN1D_0402
DIS@LV14
BLM15BD121SN1D_0402
DIS@
12
CV86
10U_0603_6.3V6M
DIS@ CV86
10U_0603_6.3V6M
DIS@
1
2
DPA
DPB
DPC
DPD
MUTI GFX
I2C
GENERAL PURPOSE I/O
DAC1
DAC2
DDC/AUX
THERMAL
PLL/CLOCK
UV1B
216-0833000-A11-THAMES-XT-M2_FCBGA962~D
@
DPA
DPB
DPC
DPD
MUTI GFX
I2C
GENERAL PURPOSE I/O
DAC1
DAC2
DDC/AUX
THERMAL
PLL/CLOCK
UV1B
216-0833000-A11-THAMES-XT-M2_FCBGA962~D
@
DMINUS
AG29
DPLL_PVDD
AM32
DPLL_PVSS
AN32
DPLL_VDDC
AN31
DPLUS
AF29
DVPCLK
AR1
DVPCNTL_0
AP8
DVPCNTL_1
AW8
DVPCNTL_2
AR3
DVPCNTL_MVP_0
AR8
DVPCNTL_MVP_1
AU8
DVPDATA_0
AU1
DVPDATA_1
AU3
DVPDATA_10
AV7
DVPDATA_11
AN7
DVPDATA_12
AV9
DVPDATA_13
AT9
DVPDATA_14
AR10
DVPDATA_15
AW10
DVPDATA_16
AU10
DVPDATA_17
AP10
DVPDATA_18
AV11
DVPDATA_19
AT11
DVPDATA_2
AW3
DVPDATA_20
AR12
DVPDATA_21
AW12
DVPDATA_22
AU12
DVPDATA_23
AP12
DVPDATA_3
AP6
DVPDATA_4
AW5
DVPDATA_5
AU5
DVPDATA_6
AR6
DVPDATA_7
AW6
DVPDATA_8
AU6
DVPDATA_9
AT7
GENERICA
AJ19
GENERICB
AK19
GENERICC
AJ20
GENERICD
AK20
GENERICE_HPD4
AJ24
GENERICF_HPD5
AH26
GENERICG_HPD6
AH24
GPIO_0
AH20
GPIO_1
AH18
GPIO_10_ROMSCK
AJ16
GPIO_11
AK16
GPIO_12
AL16
GPIO_13
AM16
GPIO_14_HPD2
AM14
GPIO_15_PWRCNTL_0
AM13
GPIO_16
AK14
GPIO_17_THERMAL_INT
AG30
GPIO_18_HPD3
AN14
GPIO_19_CTF
AM17
GPIO_2
AN16
GPIO_20_PWRCNTL_1
AL13
GPIO_21_BB_EN
AJ14
GPIO_22_ROMCSB
AK13
GPIO_23_CLKREQB
AN13
GPIO_3_SMBDATA
AH23
GPIO_4_SMBCLK
AJ23
GPIO_5_AC_BATT
AH17
GPIO_6
AJ17
GPIO_7_BLON
AK17
GPIO_8_ROMSO
AJ13
GPIO_9_ROMSI
AH15
H2SYNC/GENLK_CLK AD29
HPD1
AK24
HSYNC AC36
JTAG_TCK
AK23 JTAG_TDI
AN23
JTAG_TDO
AM24 JTAG_TMS
AL24
JTAG_TRSTB
AM23
DDCDATA_AUX7N AK29
DDCCLK_AUX7P AK30
TS_FDO
AK32
TSVDD
AJ32
TSVSS
AJ33
VREFG
AH13
VSS1DI AC34
VSS2DI/NC AG32
XTALIN
AV33
XTALOUT
AU34
A2VDD/NC AG33
A2VDDQ/NC AD33
A2VSSQ/TSVSSQ AF33
AUX1N AL27
AUX1P AM27
AUX2N AM20
AUX2P AN20
AVDD AD34
AVSSQ AE34
BAF37
B2/NC AF30
B2B/NC AF31
BB AE38
C/NC AC32
COMP/NC AF32
DDC1CLK AM26
DDC1DATA AN26
DDC2CLK AM19
DDC2DATA AL19
DDC6CLK AJ30
DDC6DATA AJ31
DDCDATA_AUX3N AM30
DDCCLK_AUX3P AL30
DDCDATA_AUX4N AM29
DDCCLK_AUX4P AL29
DDCDATA_AUX5N AM21
DDCCLK_AUX5P AN21
GAE36
G2/NC AD30
G2B/NC AD31
GB AD35
RAD39
R2/NC AC30
R2B/NC AC31
R2SET/NC AA29
RB AD37
RSET AB34
SCL
AK26
SDA
AJ26
TX0M_DPA2N AR24
TX0M_DPC2N AR14
TX0P_DPA2P AT25
TX0P_DPC2P AT15
TX1M_DPA1N AV25
TX1M_DPC1N AV15
TX1P_DPA1P AU26
TX1P_DPC1P AU16
TX2M_DPA0N AR26
TX2M_DPC0N AR16
TX2P_DPA0P AT27
TX2P_DPC0P AT17
TX3M_DPB2N AU30
TX3M_DPD2N AR20
TX3P_DPB2P AV31
TX3P_DPD2P AT21
TX4M_DPB1N AT31
TX4M_DPD1N AV21
TX4P_DPB1P AR32
TX4P_DPD1P AU22
TX5M_DPB0N AU32
TX5M_DPD0N AR22
TX5P_DPB0P AT33
TX5P_DPD0P AT23
TXCAM_DPA3N AV23
TXCAP_DPA3P AU24
TXCBM_DPB3N AT29
TXCBP_DPB3P AR30
TXCCM_DPC3N AV13
TXCCP_DPC3P AU14
TXCDM_DPD3N AT19
TXCDP_DPD3P AU20
V2SYNC/GENLK_VSYNC AC29
VDD1DI AC33
VDD2DI/NC AG31
VSYNC AC38
Y/NC AD32
TS_A/NC
AL31
XO_IN
AW34
XO_IN2
AW35
SWAPLOCKA
AJ21
SWAPLOCKB
AK21
RV69 10K_0402_5%X76@RV69 10K_0402_5%X76@
1 2
RV236
10K_0402_5%
DIS@
RV236
10K_0402_5%
DIS@
12
RV96
4.7K_0402_5%
VENUS@
RV96
4.7K_0402_5%
VENUS@
1 2
CV93
0.1U_0402_10V7K
DIS@ CV93
0.1U_0402_10V7K
DIS@
1
2
CV91
10U_0603_6.3V6M
DIS@ CV91
10U_0603_6.3V6M
DIS@
1
2
LV16
BLM15BD121SN1D_0402
DIS@
LV16
BLM15BD121SN1D_0402
DIS@
1 2
RV237
8.45K_0402_1%
@
RV237
8.45K_0402_1%
@
12
RV238
4.75K_0402_1%
VENUS@
RV238
4.75K_0402_1%
VENUS@
12
RV70 10K_0402_5%@RV70 10K_0402_5%@
1 2
CV79
1U_0402_6.3V6K
VENUS@ CV79
1U_0402_6.3V6K
VENUS@
1
2
CV82
10U_0603_6.3V6M
DIS@ CV82
10U_0603_6.3V6M
DIS@
1
2
RV8110K_0402_5% @RV8110K_0402_5% @
1 2
CV76
1U_0402_6.3V6K
VENUS@ CV76
1U_0402_6.3V6K
VENUS@
1
2
RV250
0_0402_5%
@
RV250
0_0402_5%
@
1 2
CV329
0.68U_0402_10V
@
CV329
0.68U_0402_10V
@
1
2
RV67 10K_0402_5%X76@RV67 10K_0402_5%X76@
1 2
RV246
0_0402_5%@
RV246
0_0402_5%@
1 2
RV242
4.75K_0402_1%
VENUS@
RV242
4.75K_0402_1%
VENUS@
12
CV85
0.1U_0402_10V7K
VENUS@
CV85
0.1U_0402_10V7K
VENUS@
1
2
T89T89
RV239
10K_0402_1%
@
RV239
10K_0402_1%
@
12
RV7510K_0402_5% @RV7510K_0402_5% @
1 2
CV87
1U_0402_6.3V6K
DIS@ CV87
1U_0402_6.3V6K
DIS@
1
2
CV89
2200P_0402_50V7K
VENUS@
CV89
2200P_0402_50V7K
VENUS@
1
2
RV854.7K_0402_5%
DIS@
RV854.7K_0402_5%
DIS@
1 2
CV77
10U_0603_6.3V6M
VENUS@ CV77
10U_0603_6.3V6M
VENUS@
1
2
S
G
D
QV15A
DMN66D0LDW-7_SOT363-6
DIS@
S
G
D
QV15A
DMN66D0LDW-7_SOT363-6
DIS@
5
34
RV247
0_0402_5%@
RV247
0_0402_5%@
1 2
RV74
4.7K_0402_5%
DIS@
RV74
4.7K_0402_5%
DIS@
12
RV207 0_0402_5%
SUN@
RV207 0_0402_5%
SUN@
1 2
T87T87
RV248
0_0402_1%
@
RV248
0_0402_1%
@
1 2
T80T80
RV89 10K_0402_5%@RV89 10K_0402_5%@
1 2
RV68 10K_0402_5%@RV68 10K_0402_5%@
1 2
RV235
10K_0402_5%
@
RV235
10K_0402_5%
@
12
T79T79
CV81 0.1U_0402_10V7K
VENUS@
CV81 0.1U_0402_10V7K
VENUS@
12
S
G
D
QV14A
DMN66D0LDW-7_SOT363-6
DIS@
S
G
D
QV14A
DMN66D0LDW-7_SOT363-6
DIS@
5
34
G
S
D
QV15B
DMN66D0LDW-7_SOT363-6
DIS@
G
S
D
QV15B
DMN66D0LDW-7_SOT363-6
DIS@
61
2
RV7610K_0402_5% @RV7610K_0402_5% @
1 2
T78T78
T81T81
RV91
10K_0402_5%
DIS@
RV91
10K_0402_5%
DIS@
12
RP47
10K_8P4R_5%
@
RP47
10K_8P4R_5%
@
1 8
2 7
3 6
4 5
CV84
0.1U_0402_10V7K
DIS@ CV84
0.1U_0402_10V7K
DIS@
1
2
T91T91
RV241
8.45K_0402_1%
@
RV241
8.45K_0402_1%
@
12
LV13
BLM15BD121SN1D_0402
VENUS@
LV13
BLM15BD121SN1D_0402
VENUS@
1 2
RV252
0_0402_5%
@
RV252
0_0402_5%
@
1 2
UV14
EMC1402-2-ACZL-TR_MSOP8
VENUS@
UV14
EMC1402-2-ACZL-TR_MSOP8
VENUS@
VDD
1
ALERT# 6
THERM#
4GND 5
D+
2
D-
3
SCLK 8
SDATA 7
CV88
0.1U_0402_10V7K
DIS@ CV88
0.1U_0402_10V7K
DIS@
1
2
CV333
0.68U_0402_10V
@
CV333
0.68U_0402_10V
@
1
2
RV199
2.2K_0402_5%
@
RV199
2.2K_0402_5%
@
12
RV93 499_0402_1%
VENUS@
RV93 499_0402_1%
VENUS@
12
RV240
4.75K_0402_1%
VENUS@
RV240
4.75K_0402_1%
VENUS@
12
CV75
0.1U_0402_10V7K
VENUS@ CV75
0.1U_0402_10V7K
VENUS@
1
2
RV73
10K_0402_5%
@
RV73
10K_0402_5%
@
12
G
D
S
QV28
2N7002K_SOT23-3
@
G
D
S
QV28
2N7002K_SOT23-3
@
2
1 3
T90T90
CV95
10P_0402_50V8J
XTALDIS@
CV95
10P_0402_50V8J
XTALDIS@
12
LV12
BLM15BD121SN1D_0402
VENUS@
LV12
BLM15BD121SN1D_0402
VENUS@
1 2

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PX_MODE=1 for Normal Operation
PX_MODE=0 for BACO mode to shut down power rails expcept VDDR3,PCIE_VDDC and 1.8V rail
Power seguence of Sun XT,Venus Pro,Venus XT
+3VGS
+VGA_CORE
+VDDCI(+VGA_PCIE)
+1.35V_MEM_GFX
+1.0VGS
+1.8VGS
<20ms
PX4.0 +VGA_CORE,VDDCI,+1.5VGS ON
PX4.0 +3VGS, +1.0VGS,+1.8VGS OFF
PX5.0 +3VGS,+VGA_CORE,VDDCI,+1.5VGV,+1.0VGS,+1.8VGS OFF
Note:
60mil
for PX5.0
60mil
+3VS TO +3VGS
+1.8VS TO +1.8VGS
+1.35VS_VGA TO +1.35V_MEM_GFX
Switch circuits in BACO desingns for Thames/Seymour only
55mA@1.0V, in BACO mode
SHORT DEFAULT
SHORT DEFAULT
for PX4.0 and PX5.0
PXS_PWREN
PXS_PWREN
PXS_PWREN#
PXS_PWREN<10,11,39,43,44>
+1.35VS_VGA +1.35V_MEM_GFX
+3VS +3VGS
+5VALW
+1.8VS +1.8VGS
+VGA_CORE+VGA_PCIE +BIF_VDDC
+3VGS
+3VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
ATI_Venus Pro_M2_BACO POWER
50 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
ATI_Venus Pro_M2_BACO POWER
50 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9984P
1.0
ATI_Venus Pro_M2_BACO POWER
50 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
JP9
2MM
@JP9
2MM
@
2 1
CV101
10U_0603_6.3V6M
DIS@
CV101
10U_0603_6.3V6M
DIS@
1
2
RV109
100K_0402_5%
DIS@
RV109
100K_0402_5%
DIS@
12
RV234 0_0603_5%
SUN@
RV234 0_0603_5%
SUN@
1 2
CV103
0.1U_0603_25V7K
DIS@
CV103
0.1U_0603_25V7K
DIS@
1
2
J92MM
@
J92MM
@
2 1
QV22
AP2301GN-HF_SOT23-3
DIS@QV22
AP2301GN-HF_SOT23-3
DIS@
2
3 1
G
D
S
QV24
2N7002K_SOT23-3
DIS@
G
D
S
QV24
2N7002K_SOT23-3
DIS@
2
13
RV103 0_0805_5%
VENUS@
RV103 0_0805_5%
VENUS@
1 2
CV97
22U_0805_6.3V6MDIS@
CV97
22U_0805_6.3V6MDIS@
1
2
CV102
1U_0603_10V6K
DIS@
CV102
1U_0603_10V6K
DIS@
1
2
JP8
2MM
@JP8
2MM
@
2 1
RV108
1K_0402_5%
DIS@
RV108
1K_0402_5%
DIS@
1 2
RV105
20K_0402_5%
@
RV105
20K_0402_5%
@
12
G
D
S
QV25
2N7002K_SOT23-3
DIS@
G
D
S
QV25
2N7002K_SOT23-3
DIS@
2
13
RV107
20K_0402_5%
DIS@
RV107
20K_0402_5%
DIS@

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
130mA
130mA
110mA
110mA
20mA
20mA
1.8V@300mA DPAB_VDD18)
(1.0V@220mA DPAB_VDD10)
1.8V@300mA DPCD_VDD18)
1.0V@220mA DPCD_VDD10)
1.8V@300mA DPEF_VDD18)
1.0V@240mA DPEF_VDD10)
(30mA)
(220mA)
(330mA)
Thames/Seymour Only
Do not install for Heathrow/Mars Pro
PS_0 Should be tied to GND on Thames/Seymour
(220mA)
(30mA)
(330mA)
20mil
20mil
20mil
20mil
20mil
20mil
20mil
20mil
20mA
20mA
20mA
20mA
10mil
10mil
10mil
10mil
10mil
10mil
20mil
20mil
20mil
20mil
0.95V@Venus
0.95V@Venus
0.95V@Venus
PS0:
PS1:
PS2:
PS3:
11001
11000
00000
11000
MLPS Bit AMD recommended setting
RV243=8.45K
RV237=NC
RV239=NC
RV241=NC
RV201=2K CV335=NC
RV238=4.75K CV329=NC
RV240=4.75K CV331=0.68u
RV242=4.75K CV333=NC
R_PU R_PD Cstrap
+DPCD_VDD18
+DPEF_VDD10
MECH#1
MECH#2
MECH#3
+DPAB_VDD18
+DPAB_VDD10
+DPEF_VDD18
+DPCD_VDD10
PS_0
PS_0
+1.8VGS
+VGA_PCIE
+DPEF_VDD10
+VGA_PCIE
+1.8VGS
+DPAB_VDD18
+DPAB_VDD10
+DPAB_VDD18
+DPAB_VDD18
+DPCD_VDD18
+DPCD_VDD18
+DPEF_VDD18
+DPEF_VDD18
+DPCD_VDD10
+DPCD_VDD18
+DPCD_VDD18
+DPCD_VDD10
+DPEF_VDD10
+DPEF_VDD18
+DPEF_VDD10
+1.8VGS +DPEF_VDD18
+VGA_PCIE +DPCD_VDD10
+DPAB_VDD18
+DPAB_VDD10
+1.8VGS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
1.0
ATI_Venus Pro_M2_PWR_GND
51 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
LA-9984P
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
1.0
ATI_Venus Pro_M2_PWR_GND
51 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
LA-9984P
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
1.0
ATI_Venus Pro_M2_PWR_GND
51 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
LA-9984P
CV110
10U_0603_6.3V6M
VENUS@ CV110
10U_0603_6.3V6M
VENUS@
1
2
CV121
1U_0402_6.3V6K
VENUS@ CV121
1U_0402_6.3V6K
VENUS@
1
2
CV112
1U_0402_6.3V6K
@
CV112
1U_0402_6.3V6K
@
1
2
T82 PADT82 PAD
GND
UV1F
216-0833000-A11-THAMES-XT-M2_FCBGA962~D
@
GND
UV1F
216-0833000-A11-THAMES-XT-M2_FCBGA962~D
@
PCIE_VSS#1
AB39
PCIE_VSS#10
J31
PCIE_VSS#11
J34
PCIE_VSS#12
K31
PCIE_VSS#13
K34
PCIE_VSS#14
K39
PCIE_VSS#15
L31
PCIE_VSS#16
L34
PCIE_VSS#17
M34
PCIE_VSS#18
M39
PCIE_VSS#19
N31
PCIE_VSS#2
E39
PCIE_VSS#20
N34
PCIE_VSS#21
P31
PCIE_VSS#22
P34
PCIE_VSS#23
P39
PCIE_VSS#24
R34
PCIE_VSS#25
T31
PCIE_VSS#26
T34
PCIE_VSS#27
T39
PCIE_VSS#28
U31
PCIE_VSS#29
U34
PCIE_VSS#3
F34
PCIE_VSS#30
V34
PCIE_VSS#31
V39
PCIE_VSS#32
W31
PCIE_VSS#33
W34
PCIE_VSS#34
Y34
PCIE_VSS#35
Y39
PCIE_VSS#4
F39
PCIE_VSS#5
G33
PCIE_VSS#6
G34
PCIE_VSS#7
H31
PCIE_VSS#8
H34
PCIE_VSS#9
H39
VSS_MECH#1 A39
VSS_MECH#2 AW1
VSS_MECH#3 AW39
GND#1 A3
GND#10 AA6
GND#98 F13
GND#100
F15
GND#101
F17
GND#102
F19
GND#103
F21
GND#104
F23
GND#105
F25
GND#106
F27
GND#107
F29
GND#108
F31
GND#11 AB12
GND#109
F33
GND#110
F7
GND#111
F9
GND#112
G2
GND#113
G6
GND#114
H9
GND#115
J2
GND#116
J27
GND#117
J6
GND#118
J8
GND#12 AB15
GND#119
K14
GND#120
K7
GND#121
L11
GND#122
L17
GND#123
L2
GND#124
L22
GND#125
L24
GND#126
L6
GND#127
M17
GND#128
M22
GND#13 AB17
GND#129
M24
GND#130
N16
GND#131
N18
GND#132
N2
GND#133
N21
GND#134
N23
GND#135
N26
GND#136
N6
GND#137
R15
GND#138
R17
GND#14 AB20
GND#139
R2
GND#140
R20
GND#141
R22
GND#142
R24
GND#143
R27
GND#144
R6
GND#145
T11
GND#146
T13
GND#147
T16
GND#148
T18
GND#15 AB22
GND#149
T21
GND#150
T23
GND#151
T26
GND#153
U15
GND#154
U17
GND#155
U2
GND#156
U20
GND#157
U22
GND#158
U24
GND#159
U27
GND#16 AB24
GND#160
U6
GND#161
V11
GND#163
V16
GND#164
V18
GND#165
V21
GND#166
V23
GND#167
V26
GND#168
W2
GND#169
W6
GND#170
Y15
GND#17 AB27
GND#171
Y17
GND#172
Y20
GND#173
Y22
GND#174
Y24
GND#175
Y27
GND#18 AC11
GND#19 AC13
GND#2 A37
GND#20 AC16
GND#21 AC18
GND#22 AC2
GND#23 AC21
GND#24 AC23
GND#25 AC26
GND#26 AC28
GND#27 AC6
GND#28 AD15
GND#29 AD17
GND#3 AA16
GND#30 AD20
GND#31 AD22
GND#32 AD24
GND#33 AD27
GND#34 AD9
GND#35 AE2
GND#36 AE6
GND#37 AF10
GND#38 AF16
GND#39 AF18
GND#4 AA18
GND#40 AF21
GND#41 AG17
GND#42 AG2
GND#43 AG20
GND#44 AG22
GND#45 AG6
GND#46 AG9
GND#47 AH21
GND#48 AJ10
GND#5 AA2
GND#49 AJ11
GND#50 AJ2
GND#51 AJ28
GND#52 AJ6
GND#53 AK11
GND#54 AK31
GND#55 AK7
GND#56 AL11
GND#57 AL14
GND#58 AL17
GND#6 AA21
GND#59 AL2
GND#60 AL20
GND/PX_EN#61 AL21
GND#62 AL23
GND#63 AL26
GND#64 AL32
GND#65 AL6
GND#66 AL8
GND#67 AM11
GND#68 AM31
GND#7 AA23
GND#69 AM9
GND#70 AN11
GND#71 AN2
GND#72 AN30
GND#73 AN6
GND#74 AN8
GND#75 AP11
GND#76 AP7
GND#77 AP9
GND#78 AR5
GND#8 AA26
GND#79 B11
GND#80 B13
GND#81 B15
GND#82 B17
GND#83 B19
GND#84 B21
GND#85 B23
GND#86 B25
GND#87 B27
GND#9 AA28
GND#88 B29
GND#89 B31
GND#90 B33
GND#91 B7
GND#92 B9
GND#93 C1
GND#94 C39
GND#95 E35
GND#96 E5
GND#97 F11
GND#152
U13
GND#162
V13
RV119
0_0402_1%
@VENUS@
RV119
0_0402_1%
@VENUS@
1 2
CV111
10U_0603_6.3V6M
@
CV111
10U_0603_6.3V6M
@
1
2
RV121
0_0402_1%
@VENUS@
RV121
0_0402_1%
@VENUS@
1 2
CV115
1U_0402_6.3V6K
VENUS@ CV115
1U_0402_6.3V6K
VENUS@
1
2
T83 PADT83 PAD
RV201
VENUS@
2K_0402_1%
RV201
VENUS@
2K_0402_1%
12
RV126
0_0402_1%
@VENUS@
RV126
0_0402_1%
@VENUS@
1 2
CV117
10U_0603_6.3V6M
@CV117
10U_0603_6.3V6M
@
1
2
CV125
0.1U_0402_10V7K
@CV125
0.1U_0402_10V7K
@
1
2
DP PLL POWER
DP A/B POWER
DP C/D POWER
DP E/F POWER
UV1H
216-0833000-A11-THAMES-XT-M2_FCBGA962~D
@
DP PLL POWER
DP A/B POWER
DP C/D POWER
DP E/F POWER
UV1H
216-0833000-A11-THAMES-XT-M2_FCBGA962~D
@
DPAB_VDD18/DPA_PVDD AU28
DP_VSSR/DPA_PVSS AV27
DPAB/DPA_VDD10#1 AP31
DPAB/DPA_VDD10#2 AP32
DPAB/DPA_VDD18#1 AN24
DPAB/DPA_VDD18#2 AP24
DP/DPA_VSSR#1 AN27
DP/DPA_VSSR#2 AP27
DP/DPA_VSSR#3 AP28
DP/DPA_VSSR#4 AW24
DP/DPA_VSSR#5 AW26
DPAB_CALR AW28
DPAB_VDD18/DPB_PVDD AV29
DP_VSSR/DPB_PVSS AR28
DPAB/DPB_VDD10#1 AN33
DPAB/DPB_VDD10#2 AP33
DPAB/DPB_VDD18#1 AP25
DPAB/DPB_VDD18#2 AP26
DP/DPB_VSSR#1 AN29
DP/DPB_VSSR#2 AP29
DP/DPB_VSSR#3 AP30
DP/DPB_VSSR#4 AW30
DP/DPB_VSSR#5 AW32
DPCD_VDD18/DPC_PVDD AU18
DP_VSSR/DPC_PVSS AV17
DPCD/DPC_VDD10#1
AP13
DPCD/DPC_VDD10#2
AT13
DPCD/DPC_VDD18#1
AP20
DPCD/DPC_VDD18#2
AP21
DP/DPC_VSSR#1
AN17
DP/DPC_VSSR#2
AP16
DP/DPC_VSSR#3
AP17
DP/DPC_VSSR#4
AW14
DP/DPC_VSSR#5
AW16
DPCD_CALR
AW18
DPCD_VDD18/DPD_PVDD AV19
DP_VSSR/DPD_PVSS AR18
DPCD/DPD_VDD10#1
AP14
DPCD/DPD_VDD10#2
AP15
DPCD/DPD_VDD18#1
AP22
DPCD/DPD_VDD18#2
AP23
DP/DPD_VSSR#1
AN19
DP/DPD_VSSR#2
AP18
DP/DPD_VSSR#3
AP19
DP/DPD_VSSR#4
AW20
DP/DPD_VSSR#5
AW22
DPEF_VDD18/DPE_PVDD AM37
DP_VSSR/DPE_PVSS AN38
DPEF/DPE_VDD10#1
AL33
DPEF/DPE_VDD10#2
AM33
DPEF/DPE_VDD18#1
AH34
DPEF/DPE_VDD18#2
AJ34
DP/DPE_VSSR#1
AN34
DP/DPE_VSSR#2
AP39
DP/DPE_VSSR#3
AR39
DP/DPE_VSSR#4
AU37
DPEF_CALR
AM39
DPEF_VDD18/DPF_PVDD AL38
DP_VSSR/DPF_PVSS AM35
DPEF/DPF_VDD10#1
AK33
DPEF/DPF_VDD10#2
AK34
DPEF/DPF_VDD18#1
AF34
DPEF/DPF_VDD18#2
AG34
DP/DPF_VSSR#1
AF39
DP/DPF_VSSR#2
AH39
DP/DPF_VSSR#3
AK39
DP/DPF_VSSR#4
AL34
DP/DPF_VSSR#5
AM34
T84 PADT84 PAD
RV124
0_0402_1%
@VENUS@
RV124
0_0402_1%
@VENUS@
1 2
CV123
10U_0603_6.3V6M
@CV123
10U_0603_6.3V6M
@
1
2
CV109
1U_0402_6.3V6K
VENUS@ CV109
1U_0402_6.3V6K
VENUS@
1
2
CV335
0.68U_0402_10V
@
CV335
0.68U_0402_10V
@
1
2
RV122150_0402_1% DIS@ RV122150_0402_1% DIS@
12
CV114
0.1U_0402_10V7K
VENUS@ CV114
0.1U_0402_10V7K
VENUS@
1
2
CV118
1U_0402_6.3V6K
@CV118
1U_0402_6.3V6K
@
1
2
CV116
10U_0603_6.3V6M
VENUS@ CV116
10U_0603_6.3V6M
VENUS@
1
2
RV243
8.45K_0402_1%
VENUS@
RV243
8.45K_0402_1%
VENUS@
12
CV108
0.1U_0402_10V7K
VENUS@ CV108
0.1U_0402_10V7K
VENUS@
1
2
RV120
0_0402_1%
@
RV120
0_0402_1%
@
1 2
CV120
10U_0603_6.3V6M
VENUS@ CV120
10U_0603_6.3V6M
VENUS@
1
2
CV113
0.1U_0402_10V7K
@
CV113
0.1U_0402_10V7K
@
1
2
RV123
150_0402_1%
VENUS@
RV123
150_0402_1%
VENUS@
1 2
CV122
0.1U_0402_10V7K
VENUS@ CV122
0.1U_0402_10V7K
VENUS@
1
2
RV118
0_0402_1%
@
RV118
0_0402_1%
@
1 2
RV127
150_0402_1%
VENUS@
RV127
150_0402_1%
VENUS@
12
CV124
1U_0402_6.3V6K
@CV124
1U_0402_6.3V6K
@
1
2
RV125
4.7K_0402_5%
@
RV125
4.7K_0402_5%
@
12
CV119
0.1U_0402_10V7K
@CV119
0.1U_0402_10V7K
@
1
2

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
For GDDR5 MVDDQ = 1.35V
(M97, Broadway and Madison: 1.8V@150mA MPV18)
(1.8V@75mA SPV18)
(120mA SPV10)
(1.8V@110mA VDD_CT)
(1.8V@504mA PCIE_VDDR)
For non-BACO designs, connect BIF_VDDC to VDDC.
For BACO designs - see BACO reference schematics
(GDDR3/DDR3 1.12V@4A VDDCI)
For Madison, Park, Capilano, Robson, Seymour and Whistler, VDDCI and VDDC can share one common regulator
(GDDR5 1.12V@16A VDDCI)
VDDCI and VDDC should have seperate regulators with a merge option on PCB
4A
55mA
(1.7)A
(50mA)
(60mA)
(150mA)
(50mA)
(100mA)
40mA
(440mA)
10mil
10mil
20mil
20mil
10mil
20mil
10mil
20mil
40mil
0.95V@Venus
(PCIe 2.0 => 1.8V@50mA PCIE_PVDD)
(SUN)(VENUS)
(PCIe 3.0 => 1.8V@80mA PCIE_PVDD)
(PCIe 2.0 => +0.95V@1920mA PCIE_VDDC)
(SUN)
(PCIe 3.0 => +0.95V@2.5A PCIE_VDDC)
(VENUS)
(20.5A)
ESD solution
+PCIE_PVDD
+VDDR4
+PCIE_VDDR
+MPV18
+SPV18
+SPV10
VCCSENSE_VGA
VDDCI_SEN
VSSSENSE_VGA
+PCIE_VDDR
VCCSENSE_VGA<44>
VDDCI_SEN<43>
VSSSENSE_VGA<44>
+1.8VGS
+VDDCI
+1.8VGS +VDDC_CT
+VGA_PCIE
+VGA_PCIE
+1.35V_MEM_GFX
+1.8VGS
+3VGS
+1.8VGS
+1.8VGS
+BIF_VDDC
+1.35V_MEM_GFX
+1.8VGS
+VGA_CORE+VDDCI
+BIF_VDDC
+VGA_CORE
+VGA_CORE
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
1.0
ATI_Venus Pro_M2_Power
52 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
LA-9984P
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
1.0
ATI_Venus Pro_M2_Power
52 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
LA-9984P
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
1.0
ATI_Venus Pro_M2_Power
52 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
LA-9984P
LV25
BLM15BD121SN1D_0402
@LV25
BLM15BD121SN1D_0402
@
1 2
CV146
1U_0402_6.3V6K
DIS@ CV146
1U_0402_6.3V6K
DIS@
1
2
CV142
1U_0402_6.3V6K
DIS@ CV142
1U_0402_6.3V6K
DIS@
1
2
CV127
0.1U_0402_10V7K
@CV127
0.1U_0402_10V7K
@
1
2
CV217
0.1U_0402_10V7K
DIS@ CV217
0.1U_0402_10V7K
DIS@
1
2
CV151
10U_0603_6.3V6M
DIS@ CV151
10U_0603_6.3V6M
DIS@
1
2
CV207
1U_0402_6.3V6K
DIS@ CV207
1U_0402_6.3V6K
DIS@
1
2
CV322
10U_0603_6.3V6M
DIS@ CV322
10U_0603_6.3V6M
DIS@
1
2
RV244 0_0402_5%
@
RV244 0_0402_5%
@
1 2
CV194
0.1U_0402_10V7K
VENUS@ CV194
0.1U_0402_10V7K
VENUS@
1
2
CV206
1U_0402_6.3V6K
DIS@ CV206
1U_0402_6.3V6K
DIS@
1
2
CV200
10U_0603_6.3V6M
DIS@ CV200
10U_0603_6.3V6M
DIS@
1
2
LV21
MCK1608471YZF 0603
DIS@LV21
MCK1608471YZF 0603
DIS@
1 2
LV19
BLM15BD121SN1D_0402
DIS@ LV19
BLM15BD121SN1D_0402
DIS@
1 2
CV170
10U_0603_6.3V6M
DIS@ CV170
10U_0603_6.3V6M
DIS@
1
2
CV139
10U_0603_6.3V6M
DIS@ CV139
10U_0603_6.3V6M
DIS@
1
2
CV145
1U_0402_6.3V6K
DIS@ CV145
1U_0402_6.3V6K
DIS@
1
2
CV140
10U_0603_6.3V6M
DIS@ CV140
10U_0603_6.3V6M
DIS@
1
2
RV202
10_0402_1%
DIS@
RV202
10_0402_1%
DIS@
12
CV150
1U_0402_6.3V6K
DIS@ CV150
1U_0402_6.3V6K
DIS@
1
2
RV215
10_0402_1%
DIS@
RV215
10_0402_1%
DIS@
12
CV323
10U_0603_6.3V6M
DIS@ CV323
10U_0603_6.3V6M
DIS@
1
2
CV129
1U_0402_6.3V6K
@CV129
1U_0402_6.3V6K
@
1
2
CV197
10U_0603_6.3V6M
DIS@ CV197
10U_0603_6.3V6M
DIS@
1
2
CV213
10U_0603_6.3V6M
DIS@ CV213
10U_0603_6.3V6M
DIS@
1
2
CV128
1U_0402_6.3V6K
@CV128
1U_0402_6.3V6K
@
1
2
CV138
10U_0603_6.3V6M
DIS@ CV138
10U_0603_6.3V6M
DIS@
1
2
CV196
1U_0402_6.3V6K
DIS@ CV196
1U_0402_6.3V6K
DIS@
1
2
CV126
0.1U_0402_10V7K
@CV126
0.1U_0402_10V7K
@
1
2
CV215
10U_0603_6.3V6M
DIS@ CV215
10U_0603_6.3V6M
DIS@
1
2
LV26
BLM15BD121SN1D_0402
@LV26
BLM15BD121SN1D_0402
@
1 2
CV147
1U_0402_6.3V6K
DIS@ CV147
1U_0402_6.3V6K
DIS@
1
2
LV20
BLM15BD121SN1D_0402
VENUS@
LV20
BLM15BD121SN1D_0402
VENUS@
1 2
CV153
0.1U_0402_10V7K
DIS@ CV153
0.1U_0402_10V7K
DIS@
1
2
CV141
1U_0402_6.3V6K
DIS@ CV141
1U_0402_6.3V6K
DIS@
1
2
CV193
1U_0402_6.3V6K
VENUS@ CV193
1U_0402_6.3V6K
VENUS@
1
2
CV195
1U_0402_6.3V6K
DIS@ CV195
1U_0402_6.3V6K
DIS@
1
2
CV205
1U_0402_6.3V6K
DIS@ CV205
1U_0402_6.3V6K
DIS@
1
2
CV325
1U_0402_6.3V6K
DIS@ CV325
1U_0402_6.3V6K
DIS@
1
2
CV190
1U_0402_6.3V6K
DIS@ CV190
1U_0402_6.3V6K
DIS@
1
2
CV211
1U_0402_6.3V6K
DIS@ CV211
1U_0402_6.3V6K
DIS@
1
2
CV212
1U_0402_6.3V6K
DIS@ CV212
1U_0402_6.3V6K
DIS@
1
2
CV202
0.1U_0402_10V7K
DIS@ CV202
0.1U_0402_10V7K
DIS@
1
2
CV199
0.1U_0402_10V7K
DIS@ CV199
0.1U_0402_10V7K
DIS@
1
2
CV204
1U_0402_6.3V6K
DIS@ CV204
1U_0402_6.3V6K
DIS@
1
2
CV132
0.1U_0402_10V7K
DIS@ CV132
0.1U_0402_10V7K
DIS@
1
2
LV23
MCK1608471YZF 0603
DIS@LV23
MCK1608471YZF 0603
DIS@
1 2
CV137
10U_0603_6.3V6M
DIS@ CV137
10U_0603_6.3V6M
DIS@
1
2
CV171
1U_0402_6.3V6K
DIS@ CV171
1U_0402_6.3V6K
DIS@
1
2
LV18
MBK1608121YZF_0603
DIS@ LV18
MBK1608121YZF_0603
DIS@
12
CV208
1U_0402_6.3V6K
DIS@ CV208
1U_0402_6.3V6K
DIS@
1
2
CV154
0.1U_0402_10V7K
DIS@ CV154
0.1U_0402_10V7K
DIS@
1
2
POWER
PLL
PCIE
CORE
MEM I/O
I/O
LEVEL
TRANSLATION
ISOLATED
CORE I/O
VOLTAGE
SENESE
UV1E
216-0833000-A11-THAMES-XT-M2_FCBGA962~D
@
POWER
PLL
PCIE
CORE
MEM I/O
I/O
LEVEL
TRANSLATION
ISOLATED
CORE I/O
VOLTAGE
SENESE
UV1E
216-0833000-A11-THAMES-XT-M2_FCBGA962~D
@
PCIE_VDDR/PCIE_PVDD AB37
MPV18#1
H7
MPV18#2
H8
SPV18
AM10
PCIE_VDDC#1 G30
PCIE_VDDC#10 R28
PCIE_VDDC#11 T28
PCIE_VDDC#12 U28
PCIE_VDDC#2 G31
PCIE_VDDC#3 H29
PCIE_VDDC#4 H30
PCIE_VDDC#5 J29
PCIE_VDDC#6 J30
PCIE_VDDC#7 L28
PCIE_VDDC#8 M28
PCIE_VDDC#9 N28
PCIE_VDDR#1 AA31
PCIE_VDDR#2 AA32
PCIE_VDDR#3 AA33
PCIE_VDDR#4 AA34
PCIE_VDDR#5 V28
PCIE_VDDR#6 W29
PCIE_VDDR#7 W30
PCIE_VDDR#8 Y31
SPV10
AN9
SPVSS
AN10
VDDR1#1
AC7
VDDR1#10
G17
VDDR1#11
G20
VDDR1#12
G23
VDDR1#13
G26
VDDR1#14
G29
VDDR1#15
H10
VDDR1#16
J7
VDDR1#17
J9
VDDR1#18
K11
VDDR1#19
K13
VDDR1#2
AD11
VDDR1#20
K8
VDDR1#21
L12
VDDR1#22
L16
VDDR1#23
L21
VDDR1#24
L23
VDDR1#25
L26
VDDR1#26
L7
VDDR1#27
M11
VDDR1#28
N11
VDDR1#29
P7
VDDR1#3
AF7
VDDR1#30
R11
VDDR1#31
U11
VDDR1#32
U7
VDDR1#33
Y11
VDDR1#34
Y7
VDDR1#4
AG10
VDDR1#5
AJ7
VDDR1#6
AK8
VDDR1#7
AL9
VDDR1#8
G11
VDDR1#9
G14
VDDR3#1
AF23
VDDR3#2
AF24
VDDR3#3
AG23
VDDR3#4
AG24
VDDR4#4
AF13
VDDR4#5
AF15
VDDR4#7
AG13
VDDR4#8
AG15
VDDR4#1
AD12
VDDR4#2
AF11
VDDR4#3
AF12
VDDR4#6
AG11
NC_VDDRHA
M20
NC_VDDRHB
V12
NC_VSSRHA
M21
NC_VSSRHB
U12
VDD_CT#1
AF26
VDD_CT#2
AF27
VDD_CT#3
AG26
VDD_CT#4
AG27
VDDC#1 AA15
VDDC#9 AB21
VDDC#10 AB23
VDDC#11 AB26
VDDC#12 AB28
VDDCI#3 AC12
VDDCI#4 AC15
VDDC#13 AC17
VDDC#14 AC20
VDDC#15 AC22
VDDC#16 AC24
VDDC#2 AA17
VDDC#17 AC27
VDDCI#5 AD13
VDDCI#6 AD16
VDDC#18 AD18
VDDC#19 AD21
VDDC#20 AD23
VDDC#21 AD26
VDDC#22 AF17
VDDC#23 AF20
VDDC#24 AF22
VDDC#3 AA20
VDDC#25 AG16
VDDC#26 AG18
VDDC#27 AG21
VDDC#28 AH22
VDDCI#8 M16
VDDCI#9 M18
VDDCI#10 M23
VDDC#31 M26
VDDCI#12 N15
VDDCI#13 N17
VDDC#4 AA22
VDDCI#14 N20
VDDCI#15 N22
VDDC#32 N24
VDDC/BIF_VDDC#33 N27
VDDCI#17 R13
VDDCI#18 R16
VDDC#34 R18
VDDC#35 R21
VDDC#36 R23
VDDC#37 R26
VDDC#5 AA24
VDDCI#20 T15
VDDC#38 T17
VDDC#39 T20
VDDC#40 T22
VDDC#41 T24
VDDC/BIF_VDDC#42 T27
VDDC#43 U16
VDDC#44 U18
VDDC#45 U21
VDDC#46 U23
VDDC#6 AA27
VDDC#47 U26
VDDCI#21 V15
VDDC#48 V17
VDDC#49 V20
VDDC#50 V22
VDDC#51 V24
VDDC#52 V27
VDDC#53 Y16
VDDC#54 Y18
VDDC#55 Y21
VDDCI#2 AB13
VDDC#56 Y23
VDDC#57 Y26
VDDC#58 Y28
VDDC#7 AB16
VDDC#8 AB18
VDDCI#7 M15
VDDCI#11 N13
VDDCI#16 R12
VDDCI#19 T12
VDDCI#1 AA13
VDDCI#22 Y13
VDDC#29 AH27
VDDC#30 AH28
FB_VDDC
AF28
FB_VDDCI
AG28
FB_GND
AH29
CV155
0.1U_0402_10V7K
DIS@ CV155
0.1U_0402_10V7K
DIS@
1
2
CV210
1U_0402_6.3V6K
DIS@ CV210
1U_0402_6.3V6K
DIS@
1
2
CV174
0.1U_0402_10V7K
DIS@ CV174
0.1U_0402_10V7K
DIS@
1
2
CV130
1U_0402_6.3V6K
@CV130
1U_0402_6.3V6K
@
1
2
CV327
330U_D2_2.5V_R6M
ESD@
CV327
330U_D2_2.5V_R6M
ESD@
1
2
CV143
1U_0402_6.3V6K
DIS@ CV143
1U_0402_6.3V6K
DIS@
1
2
RV204
10_0402_1%DIS@
RV204
10_0402_1%DIS@
12
CV172
1U_0402_6.3V6K
DIS@ CV172
1U_0402_6.3V6K
DIS@
1
2
CV136
10U_0603_6.3V6M
DIS@ CV136
10U_0603_6.3V6M
DIS@
1
2
CV324
10U_0603_6.3V6M
DIS@ CV324
10U_0603_6.3V6M
DIS@
1
2
+
CV135
220U_B2_2.5VM_R35
@
+
CV135
220U_B2_2.5VM_R35
@
1
2
CV198
1U_0402_6.3V6K
DIS@ CV198
1U_0402_6.3V6K
DIS@
1
2
CV214
22U_0603_6.3V6M
DIS@ CV214
22U_0603_6.3V6M
DIS@
1
2
CV173
1U_0402_6.3V6K
DIS@ CV173
1U_0402_6.3V6K
DIS@
1
2
CV152
0.1U_0402_10V7K
DIS@ CV152
0.1U_0402_10V7K
DIS@
1
2
CV203
1U_0402_6.3V6K
DIS@ CV203
1U_0402_6.3V6K
DIS@
1
2
CV134
10U_0603_6.3V6M
DIS@ CV134
10U_0603_6.3V6M
DIS@
1
2
CV144
1U_0402_6.3V6K
DIS@ CV144
1U_0402_6.3V6K
DIS@
1
2
LV17
MBK1608121YZF_0603
@LV17
MBK1608121YZF_0603
@
12
CV149
1U_0402_6.3V6K
DIS@ CV149
1U_0402_6.3V6K
DIS@
1
2
CV188
1U_0402_6.3V6K
DIS@ CV188
1U_0402_6.3V6K
DIS@
1
2
CV216
1U_0402_6.3V6K
DIS@ CV216
1U_0402_6.3V6K
DIS@
1
2
CV148
1U_0402_6.3V6K
DIS@ CV148
1U_0402_6.3V6K
DIS@
1
2
CV133
1U_0402_6.3V6K
DIS@ CV133
1U_0402_6.3V6K
DIS@
1
2
CV131
10U_0603_6.3V6M
@CV131
10U_0603_6.3V6M
@
1
2
LV22
BLM15BD121SN1D_0402
DIS@LV22
BLM15BD121SN1D_0402
DIS@
1 2
RV245 0_0402_5%
@
RV245 0_0402_5%
@
1 2
CV189
1U_0402_6.3V6K
DIS@ CV189
1U_0402_6.3V6K
DIS@
1
2
CV201
1U_0402_6.3V6K
DIS@ CV201
1U_0402_6.3V6K
DIS@
1
2
CV209
1U_0402_6.3V6K
DIS@ CV209
1U_0402_6.3V6K
DIS@
1
2
CV187
10U_0603_6.3V6M
DIS@ CV187
10U_0603_6.3V6M
DIS@
1
2
CV156
0.1U_0402_10V7K
DIS@ CV156
0.1U_0402_10V7K
DIS@
1
2

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
route 50ohms single-ended/100ohms diff
and keep short
Debug only, for clock observation, if not needed, DNI
5mil 5mil
GDDR5 CMD Mapping Table
<0..31> <32..63> Memory
CMD12 CMD28 RAS#
CMD15 CMD31 CAS#
CMD5 CMD21 WE#
CMD0 CMD16 CS#
CMD8 CMD24 ABI#
CMD10 CMD26 A0_A10
CMD11 CMD27 A1_A9
CMD2 CMD18 A2_BA0
CMD1 CMD17 A3_BA3
CMD3 CMD19 A4_BA2
CMD4 CMD20 A5_BA1
CMD7 CMD23 A6_A11
CMD6 CMD22 A7_A8
CMD9 CMD25 A12_FRU
CMD14 CMD30 CKE#
CMD13 CMD29 RESET#
This basic topology should be used for DRAM_RST for DDR3/GDDR5.These
Capacitors and Resistor values are an example only. The Series R and
|| Cap values will depend on the DRAM load and will have to be
calculated for different Memory ,DRAM Load and board to pass Reset
Signal Spec.
Place all these components very close to GPU (Within
25mm) and keep all component close to each Other (within
5mm) except Rser2
+VDD_MEM15_REFSA
+VDD_MEM15_REFSA
+VDD_MEM15_REFSB
+VDD_MEM15_REFSB
+VDD_MEM15_REFDA
+VDD_MEM15_REFDA
+VDD_MEM15_REFDB
+VDD_MEM15_REFDB
CASA0#
CASA1#
CASB0#
CASB1#
CKEA0
CKEA1
CKEB0
CKEB1
CLKA0
CLKA0#
CLKA1
CLKA1#
CLKB0
CLKB0#
CLKB1
CLKB1#
CSA0#_0
CSA1#_0
CSB0#_0
CSB1#_0
DRAM_RST#_R
DRAM_RST#_R
MAA0_8
MAA1_8
ADBIA0
ADBIA1
ADBIB0
ADBIB1
RASA0#
RASA1#
RASB0#
RASB1#
TESTEN
WEA0#
WEA1#
WEB0#
WEB1#
MAB0_8
MAB1_8
DQA0_22
DQA0_21
DQA0_20
DQA0_6
DQA0_7
DQA0_9
DQA0_8
DQA0_12
DQA0_4
DQA0_14
DQA0_13
DQA0_15
DQA0_11
DQA0_10
DQA0_5
DQA0_29
DQA0_28
DQA0_17
DQA0_25
DQA0_16
DQA1_4
DQA0_24
DQA0_27
DQA0_31
DQA0_23
DQA0_19
DQA0_30
DQA0_18
DQA0_26
DQA1_20
DQA1_6
DQA1_7
DQA1_11
DQA1_3
DQA1_14
DQA1_5
DQA1_10
DQA1_2
DQA1_13
DQA1_9
DQA1_1
DQA1_8
DQA1_12
DQA1_0
DQA1_31
DQA1_21
DQA1_27
DQA1_30
DQA1_26
DQA1_17
DQA1_29
DQA1_25
DQA1_19
DQA1_28
DQA1_24
DQA1_22
DQA1_18
DQA1_16
DQA1_23
DQA0_0
DQA0_2
DQA0_1
DQA0_3
DQA1_15
MAA1_6
MAA1_7
MAA1_5
MAA0_0
MAA0_1
MAA1_2
MAA1_3
MAA1_4
MAA0_2
MAA0_3
MAA0_4
MAA0_5
MAA0_6
MAA0_7
MAA1_0
MAA1_1
WCKA0B_0
WCKA0_1
WCKA0_0
WCKA0B_1
WCKA1_0
WCKA1B_0
WCKA1_1
WCKA1B_1
EDCA0_0
EDCA0_1
EDCA0_2
EDCA0_3
EDCA1_0
EDCA1_1
EDCA1_2
EDCA1_3
DDBIA0_0
DDBIA0_1
DDBIA0_2
DDBIA0_3
DDBIA1_0
DDBIA1_1
DDBIA1_2
DDBIA1_3
DQB0_22
DQB0_21
DQB0_20
DQB0_6
DQB0_7
DQB0_9
DQB0_8
DQB0_12
DQB0_4
DQB0_14
DQB0_13
DQB0_15
DQB0_11
DQB0_10
DQB0_5
DQB0_29
DQB0_28
DQB0_17
DQB0_25
DQB0_16
DQB1_4
DQB0_24
DQB0_27
DQB0_31
DQB0_23
DQB0_19
DQB0_30
DQB0_18
DQB0_26
DQB1_20
DQB1_6
DQB1_7
DQB1_11
DQB1_3
DQB1_14
DQB1_5
DQB1_10
DQB1_2
DQB1_13
DQB1_9
DQB1_1
DQB1_8
DQB1_12
DQB1_0
DQB1_31
DQB1_21
DQB1_27
DQB1_30
DQB1_26
DQB1_17
DQB1_29
DQB1_25
DQB1_19
DQB1_28
DQB1_24
DQB1_22
DQB1_18
DQB1_16
DQB1_23
DQB0_0
DQB0_2
DQB0_1
DQB0_3
DQB1_15
MAB1_6
MAB1_7
MAB1_5
MAB0_0
MAB0_1
MAB1_2
MAB1_3
MAB1_4
MAB0_2
MAB0_3
MAB0_4
MAB0_5
MAB0_6
MAB0_7
MAB1_0
MAB1_1
WCKB0B_0
WCKB0_1
WCKB0_0
WCKB0B_1
WCKB1_0
WCKB1B_0
WCKB1_1
WCKB1B_1
EDCB0_1
EDCB0_0
EDCB0_2
EDCB0_3
EDCB1_0
EDCB1_1
EDCB1_2
EDCB1_3
DDBIB0_0
DDBIB0_1
DDBIB0_2
DDBIB0_3
DDBIB1_0
DDBIB1_1
DDBIB1_2
DDBIB1_3
CLKA0
CLKA0#
CLKA1
CLKA1#
CLKB0
CLKB0#
CLKB1
CLKB1#
CLKB1 <57>
CLKB0 <56>
RASB0# <56>
CKEB0 <56>
CLKB1# <57>
CLKB0# <56>
CSB0#_0 <56>
WEB0# <56>
CASB0# <56>
CKEB1 <57>
CSB1#_0 <57>
RASB1# <57>
ADBIB1 <57>
ADBIB0 <56>
WEB1# <57>
CASB1# <57>
DRAM_RST#<54,55,56,57>
CLKA1 <55>
CLKA0 <54>
RASA0# <54>
CLKA1# <55>
CLKA0# <54>
CSA0#_0 <54>
WEA0# <54>
CASA0# <54>
CSA1#_0 <55>
RASA1# <55>
ADBIA1 <55>
ADBIA0 <54>
WEA1# <55>
CASA1# <55>
MAA0_8 <54>
MAA1_8 <55>
CKEA0 <54>
CKEA1 <55>
MAB0_8 <56>
MAB1_8 <57>
WCKA0_0 <54>
WCKA0B_0 <54>
WCKA0_1 <54>
WCKA0B_1 <54>
WCKA1_0 <55>
WCKA1B_0 <55>
WCKA1_1 <55>
WCKA1B_1 <55>
WCKB0_0 <56>
WCKB0B_0 <56>
WCKB0_1 <56>
WCKB0B_1 <56>
WCKB1_0 <57>
WCKB1B_0 <57>
WCKB1_1 <57>
WCKB1B_1 <57>
MAA0_1 <54>
MAA0_2 <54>
MAA0_6 <54>
MAA0_7 <54>
MAA0_0 <54>
MAA0_3 <54>
MAA0_4 <54>
MAA0_5 <54>
MAA1_1 <55>
MAA1_2 <55>
MAA1_6 <55>
MAA1_7 <55>
MAA1_0 <55>
MAA1_3 <55>
MAA1_4 <55>
MAA1_5 <55>
EDCA0_1 <54>
EDCA0_2 <54>
EDCA1_2 <55>
EDCA1_3 <55>
EDCA0_0 <54>
EDCA0_3 <54>
EDCA1_0 <55>
EDCA1_1 <55>
DDBIA0_1 <54>
DDBIA0_2 <54>
DDBIA1_2 <55>
DDBIA1_3 <55>
DDBIA0_0 <54>
DDBIA0_3 <54>
DDBIA1_0 <55>
DDBIA1_1 <55>
EDCB0_1 <56>
EDCB0_2 <56>
EDCB1_2 <57>
EDCB1_3 <57>
EDCB0_0 <56>
EDCB0_3 <56>
EDCB1_0 <57>
EDCB1_1 <57>
DDBIB0_1 <56>
DDBIB0_2 <56>
DDBIB1_2 <57>
DDBIB1_3 <57>
DDBIB0_0 <56>
DDBIB0_3 <56>
DDBIB1_0 <57>
DDBIB1_1 <57>
MAB0_1 <56>
MAB0_2 <56>
MAB0_6 <56>
MAB0_7 <56>
MAB0_0 <56>
MAB0_3 <56>
MAB0_4 <56>
MAB0_5 <56>
MAB1_1 <57>
MAB1_2 <57>
MAB1_6 <57>
MAB1_7 <57>
MAB1_0 <57>
MAB1_3 <57>
MAB1_4 <57>
MAB1_5 <57>
DQB0_0<56>
DQB0_1<56>
DQB0_2<56>
DQB0_3<56>
DQB0_4<56>
DQB0_5<56>
DQB0_6<56>
DQB0_7<56>
DQB0_8<56>
DQB0_9<56>
DQB0_10<56>
DQB0_11<56>
DQB0_12<56>
DQB0_13<56>
DQB0_14<56>
DQB0_15<56>
DQB0_16<56>
DQB0_17<56>
DQB0_18<56>
DQB0_19<56>
DQB0_20<56>
DQB0_21<56>
DQB0_22<56>
DQB0_23<56>
DQB0_24<56>
DQB0_25<56>
DQB0_26<56>
DQB0_27<56>
DQB0_28<56>
DQB0_29<56>
DQB0_30<56>
DQB0_31<56>
DQB1_16<57>
DQB1_17<57>
DQB1_18<57>
DQB1_19<57>
DQB1_20<57>
DQB1_21<57>
DQB1_22<57>
DQB1_23<57>
DQB1_24<57>
DQB1_25<57>
DQB1_26<57>
DQB1_27<57>
DQB1_28<57>
DQB1_29<57>
DQB1_30<57>
DQB1_31<57>
DQB1_0<57>
DQB1_1<57>
DQB1_2<57>
DQB1_3<57>
DQB1_4<57>
DQB1_5<57>
DQB1_6<57>
DQB1_7<57>
DQB1_8<57>
DQB1_9<57>
DQB1_10<57>
DQB1_11<57>
DQB1_12<57>
DQB1_13<57>
DQB1_14<57>
DQB1_15<57>
DQA0_16<54>
DQA0_17<54>
DQA0_18<54>
DQA0_19<54>
DQA0_20<54>
DQA0_21<54>
DQA0_22<54>
DQA0_23<54>
DQA0_24<54>
DQA0_25<54>
DQA0_26<54>
DQA0_27<54>
DQA0_28<54>
DQA0_29<54>
DQA0_30<54>
DQA0_31<54>
DQA1_16<55>
DQA1_17<55>
DQA1_18<55>
DQA1_19<55>
DQA1_20<55>
DQA1_21<55>
DQA1_22<55>
DQA1_23<55>
DQA1_24<55>
DQA1_25<55>
DQA1_26<55>
DQA1_27<55>
DQA1_28<55>
DQA1_29<55>
DQA1_30<55>
DQA1_31<55>
DQA1_0<55>
DQA1_1<55>
DQA1_2<55>
DQA1_3<55>
DQA1_4<55>
DQA1_5<55>
DQA1_6<55>
DQA1_7<55>
DQA1_8<55>
DQA1_9<55>
DQA1_10<55>
DQA1_11<55>
DQA1_12<55>
DQA1_13<55>
DQA1_14<55>
DQA1_15<55>
DQA0_0<54>
DQA0_1<54>
DQA0_2<54>
DQA0_3<54>
DQA0_4<54>
DQA0_5<54>
DQA0_6<54>
DQA0_7<54>
DQA0_8<54>
DQA0_9<54>
DQA0_10<54>
DQA0_11<54>
DQA0_12<54>
DQA0_13<54>
DQA0_14<54>
DQA0_15<54>
+1.35V_MEM_GFX +1.35V_MEM_GFX
+1.35V_MEM_GFX +1.35V_MEM_GFX
+1.35V_MEM_GFX
+1.35V_MEM_GFX
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
1.0
ATI_Venus Pro_M2_MEM IF
53 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
LA-9984P
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
1.0
ATI_Venus Pro_M2_MEM IF
53 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
LA-9984P
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
1.0
ATI_Venus Pro_M2_MEM IF
53 57Wednesday, May 22, 2013
2013/05/17 2014/06/01
Compal Electronics, Inc.
LA-9984P
RV137
@
51.1_0402_1%
RV137
@
51.1_0402_1%
12
RV46120_0402_1% RV46120_0402_1%
12
RV142
40.2_0402_1%
DIS@
RV142
40.2_0402_1%
DIS@
12
RV136
@
51.1_0402_1%
RV136
@
51.1_0402_1%
12
CV220
0.1U_0402_10V7K
DIS@
CV220
0.1U_0402_10V7K
DIS@
12
RV149
100_0402_1%
DIS@
RV149
100_0402_1%
DIS@
12
RV133
5.11K_0402_1%
DIS@
RV133
5.11K_0402_1%
DIS@
1 2
MEMORY INTERFACE B
DDR2
GDDR5/GDDR3
DDR3
DDR2
GDDR3/GDDR5
DDR3
GDDR5
GDDR5/DDR2/GDDR3
UV1D
216-0833000-A11-THAMES-XT-M2_FCBGA962~D
@
MEMORY INTERFACE B
DDR2
GDDR5/GDDR3
DDR3
DDR2
GDDR3/GDDR5
DDR3
GDDR5
GDDR5/DDR2/GDDR3
UV1D
216-0833000-A11-THAMES-XT-M2_FCBGA962~D
@
DQB0_0/DQB_0
C5
DQB0_1/DQB_1
C3
DQB0_10/DQB_10
J4
DQB0_11/DQB_11
K6
DQB0_12/DQB_12
K5
DQB0_13/DQB_13
L4
DQB0_14/DQB_14
M6
DQB0_15/DQB_15
M1
DQB0_16/DQB_16
M3
DQB0_17/DQB_17
M5
DQB0_18/DQB_18
N4
DQB0_19/DQB_19
P6
DQB0_2/DQB_2
E3
DQB0_20/DQB_20
P5
DQB0_21/DQB_21
R4
DQB0_22/DQB_22
T6
DQB0_23/DQB_23
T1
DQB0_24/DQB_24
U4
DQB0_25/DQB_25
V6
DQB0_26/DQB_26
V1
DQB0_27/DQB_27
V3
DQB0_28/DQB_28
Y6
DQB0_29/DQB_29
Y1
DQB0_3/DQB_3
E1
DQB0_30/DQB_30
Y3
DQB0_31/DQB_31
Y5
DQB1_0/DQB_32
AA4
DQB1_1/DQB_33
AB6
DQB1_2/DQB_34
AB1
DQB1_3/DQB_35
AB3
DQB1_4/DQB_36
AD6
DQB1_5/DQB_37
AD1
DQB1_6/DQB_38
AD3
DQB1_7/DQB_39
AD5
DQB0_4/DQB_4
F1
DQB1_8/DQB_40
AF1
DQB1_9/DQB_41
AF3
DQB1_10/DQB_42
AF6
DQB1_11/DQB_43
AG4
DQB1_12/DQB_44
AH5
DQB1_13/DQB_45
AH6
DQB1_14/DQB_46
AJ4
DQB1_15/DQB_47
AK3
DQB1_16/DQB_48
AF8
DQB1_17/DQB_49
AF9
DQB0_5/DQB_5
F3
DQB1_18/DQB_50
AG8
DQB1_19/DQB_51
AG7
DQB1_20/DQB_52
AK9
DQB1_21/DQB_53
AL7
DQB1_22/DQB_54
AM8
DQB1_23/DQB_55
AM7
DQB1_24/DQB_56
AK1
DQB1_25/DQB_57
AL4
DQB1_26/DQB_58
AM6
DQB1_27/DQB_59
AM1
DQB0_6/DQB_6
F5
DQB1_28/DQB_60
AN4
DQB1_29/DQB_61
AP3
DQB1_30/DQB_62
AP1
DQB1_31/DQB_63
AP5
DQB0_7/DQB_7
G4
DQB0_8/DQB_8
H5
DQB0_9/DQB_9
H6
MVREFDB
Y12
MVREFSB
AA12
TESTEN
AD28
CASB0B W 10
CASB1B AA10
CKEB0 U10
CKEB1 AA11
CLKB0 L9
CLKB0B L8
CLKB1 AD8
CLKB1B AD7
CLKTESTA
AK10
CLKTESTB
AL10
CSB0B_0 P10
CSB0B_1 L10
CSB1B_0 AD10
CSB1B_1 AC10
WCKB0_0/DQMB_0 H3
WCKB0B_0/DQMB_1 H1
WCKB0_1/DQMB_2 T3
WCKB0B_1/DQMB_3 T5
WCKB1_0/DQMB_4 AE4
WCKB1B_0/DQMB_5 AF5
WCKB1_1/DQMB_6 AK6
WCKB1B_1/DQMB_7 AK5
DRAM_RST AH11
MAB0_0/MAB_0 P8
MAB0_1/MAB_1 T9
MAB1_2/MAB_10 AC8
MAB1_3/MAB_11 AC9
MAB1_4/MAB_12 AA7
MAB1_5/BA2 AA8
MAB1_6/BA0 Y8
MAB1_7/BA1 AA9
MAB0_2/MAB_2 P9
MAB0_3/MAB_3 N7
MAB0_4/MAB_4 N8
MAB0_5/MAB_5 N9
MAB0_6/MAB_6 U9
MAB0_7/MAB_7 U8
MAB1_0/MAB_8 Y9
MAB1_1/MAB_9 W9
ADBIB0/ODTB0 T7
ADBIB1/ODTB1 W7
RASB0B T10
RASB1B Y10
EDCB0_0/QSB_0/RDQSB_0 F6
EDCB0_1/QSB_1/RDQSB_1 K3
EDCB0_2/QSB_2/RDQSB_2 P3
EDCB0_3/QSB_3/RDQSB_3 V5
EDCB1_0/QSB_4/RDQSB_4 AB5
EDCB1_1/QSB_5/RDQSB_5 AH1
EDCB1_2/QSB_6/RDQSB_6 AJ9
EDCB1_3/QSB_7/RDQSB_7 AM5
DDBIB0_0/QSB_0B/WDQSB_0 G7
DDBIB0_1/QSB_1B/WDQSB_1 K1
DDBIB0_2/QSB_2B/WDQSB_2 P1
DDBIB0_3/QSB_3B/WDQSB_3 W4
DDBIB1_0/QSB_4B/WDQSB_4 AC4
DDBIB1_1/QSB_5B/WDQSB_5 AH3
DDBIB1_2/QSB_6B/WDQSB_6 AJ8
DDBIB1_3/QSB_7B/WDQSB_7 AM3
WEB0B N10
WEB1B AB11
MAB0_8 T8
MAB1_8 W 8
RV138
@
4.7K_0402_5%
RV138
@
4.7K_0402_5%
12
RV49120_0402_1% RV49120_0402_1%
12
MEMORY INTERFACE A
DDR2
GDDR3/GDDR5
DDR3
GDDR5/DDR2/GDDR3
DDR2
GDDR5/GDDR3
DDR3
GDDR5
UV1C
216-0833000-A11-THAMES-XT-M2_FCBGA962~D
@
MEMORY INTERFACE A
DDR2
GDDR3/GDDR5
DDR3
GDDR5/DDR2/GDDR3
DDR2
GDDR5/GDDR3
DDR3
GDDR5
UV1C
216-0833000-A11-THAMES-XT-M2_FCBGA962~D
@
DQA0_0/DQA_0
C37
DQA0_1/DQA_1
C35
DQA0_10/DQA_10
C30
DQA0_11/DQA_11
A30
DQA0_12/DQA_12
F28
DQA0_13/DQA_13
C28
DQA0_14/DQA_14
A28
DQA0_15/DQA_15
E28
DQA0_16/DQA_16
D27
DQA0_17/DQA_17
F26
DQA0_18/DQA_18
C26
DQA0_19/DQA_19
A26
DQA0_2/DQA_2
A35
DQA0_20/DQA_20
F24
DQA0_21/DQA_21
C24
DQA0_22/DQA_22
A24
DQA0_23/DQA_23
E24
DQA0_24/DQA_24
C22
DQA0_25/DQA_25
A22
DQA0_26/DQA_26
F22
DQA0_27/DQA_27
D21
DQA0_28/DQA_28
A20
DQA0_29/DQA_29
F20
DQA0_3/DQA_3
E34
DQA0_30/DQA_30
D19
DQA0_31/DQA_31
E18
DQA1_0/DQA_32
C18
DQA1_1/DQA_33
A18
DQA1_2/DQA_34
F18
DQA1_3/DQA_35
D17
DQA1_4/DQA_36
A16
DQA1_5/DQA_37
F16
DQA1_6/DQA_38
D15
DQA1_7/DQA_39
E14
DQA0_4/DQA_4
G32
DQA1_8/DQA_40
F14
DQA1_9/DQA_41
D13
DQA1_10/DQA_42
F12
DQA1_11/DQA_43
A12
DQA1_12/DQA_44
D11
DQA1_13/DQA_45
F10
DQA1_14/DQA_46
A10
DQA1_15/DQA_47
C10
DQA1_16/DQA_48
G13
DQA1_17/DQA_49
H13
DQA0_5/DQA_5
D33
DQA1_18/DQA_50
J13
DQA1_19/DQA_51
H11
DQA1_20/DQA_52
G10
DQA1_21/DQA_53
G8
DQA1_22/DQA_54
K9
DQA1_23/DQA_55
K10
DQA1_24/DQA_56
G9
DQA1_25/DQA_57
A8
DQA1_26/DQA_58
C8
DQA1_27/DQA_59
E8
DQA0_6/DQA_6
F32
DQA1_28/DQA_60
A6
DQA1_29/DQA_61
C6
DQA1_30/DQA_62
E6
DQA1_31/DQA_63
A5
DQA0_7/DQA_7
E32
DQA0_8/DQA_8
D31
DQA0_9/DQA_9
F30
MEM_CALRP1
M12
MVREFDA
L18
MVREFSA
L20
MEM_CALRN0
L27
MEM_CALRN1
N12
MEM_CALRN2
AG12
MEM_CALRP0
M27
MEM_CALRP2
AH12
CASA0B K20
CASA1B K17
CKEA0 K21
CKEA1 J20
CLKA0 H27
CLKA0B G27
CLKA1 J14
CLKA1B H14
CSA0B_0 K24
CSA0B_1 K27
CSA1B_0 M13
CSA1B_1 K16
WCKA0_0/DQMA_0 A32
WCKA0B_0/DQMA_1 C32
WCKA0_1/DQMA_2 D23
WCKA0B_1/DQMA_3 E22
WCKA1_0/DQMA_4 C14
WCKA1B_0/DQMA_5 A14
WCKA1_1/DQMA_6 E10
WCKA1B_1/DQMA_7 D9
MAA0_0/MAA_0 G24
MAA0_1/MAA_1 J23
MAA1_2/MAA_10 L13
MAA1_3/MAA_11 G16
MAA1_4/MAA_12 J16
MAA1_5/MAA_13_BA2 H16
MAA1_6/MAA_14_BA0 J17
MAA1_7/MAA_A15_BA1 H17
MAA0_2/MAA_2 H24
MAA0_3/MAA_3 J24
MAA0_4/MAA_4 H26
MAA0_5/MAA_5 J26
MAA0_6/MAA_6 H21
MAA0_7/MAA_7 G21
MAA1_0/MAA_8 H19
MAA1_1/MAA_9 H20
ADBIA0/ODTA0 J21
ADBIA1/ODTA1 G19
RASA0B K23
RASA1B K19
EDCA0_0/QSA_0/RDQSA_0 C34
EDCA0_1/QSA_1/RDQSA_1 D29
EDCA0_2/QSA_2/RDQSA_2 D25
EDCA0_3/QSA_3/RDQSA_3 E20
EDCA1_0/QSA_4/RDQSA_4 E16
EDCA1_1/QSA_5/RDQSA_5 E12
EDCA1_2/QSA_6/RDQSA_6 J10
EDCA1_3/QSA_7/RDQSA_7 D7
MAA0_8 H23
MAA1_8 J19
DDBIA0_0/QSA_0B/WDQSA_0 A34
DDBIA0_1/QSA_1B/WDQSA_1 E30
DDBIA0_2/QSA_2B/WDQSA_2 E26
DDBIA0_3/QSA_3B/WDQSA_3 C20
DDBIA1_0/QSA_4B/WDQSA_4 C16
DDBIA1_1/QSA_5B/WDQSA_5 C12
DDBIA1_2/QSA_6B/WDQSA_6 J11
DDBIA1_3/QSA_7B/WDQSA_7 F8
WEA0B K26
WEA1B L15
CV224
0.1U_0402_10V7K
DIS@
CV224
0.1U_0402_10V7K
DIS@
12
CV222
120P_0402_50V9
DIS@
CV222
120P_0402_50V9
DIS@
12
RV47120_0402_1% RV47120_0402_1%
12
RV140
40.2_0402_1%
DIS@
RV140
40.2_0402_1%
DIS@
12
RV45120_0402_1% RV45120_0402_1%
12
RV147
100_0402_1%
DIS@
RV147
100_0402_1%
DIS@
12
RV143
51.1_0402_1%
DIS@
RV143
51.1_0402_1%
DIS@
1 2
RV42120_0402_1% RV42120_0402_1%
12
CV221
0.1U_0402_10V7K
DIS@
CV221
0.1U_0402_10V7K
DIS@
12
RV144
10_0402_1%
DIS@
RV144
10_0402_1%
DIS@
1 2
RV141
40.2_0402_1%
DIS@
RV141
40.2_0402_1%
DIS@
12
CV219
@
0.1U_0402_10V7K
CV219
@
0.1U_0402_10V7K
12
RV139
40.2_0402_1%
DIS@
RV139
40.2_0402_1%
DIS@
12
RV146
100_0402_1%
DIS@
RV146
100_0402_1%
DIS@
12
RV148
100_0402_1%
DIS@
RV148
100_0402_1%
DIS@
12
RV48120_0402_1% RV48120_0402_1%
12
RV43120_0402_1% RV43120_0402_1%
12
CV223
0.1U_0402_10V7K
DIS@
CV223
0.1U_0402_10V7K
DIS@
12
RV145
4.99K_0402_1%
DIS@
RV145
4.99K_0402_1%
DIS@
1 2
RV44120_0402_1% RV44120_0402_1%
12
RV206 DIS@ 120_0402_1%RV206 DIS@ 120_0402_1%
1 2
CV218
@
0.1U_0402_10V7K
CV218
@
0.1U_0402_10V7K
12

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Memory Partition A - Lower 16 bits
64X32 GDDR5
NORMAL
DELL CONFIDENTIAL/PROPRIETARY
MIRROR
PROPRIETARY NOTE:
THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
A_1
A_3
A_2
A_0
CKEA0
CLKA0#
CLKA0
RASA0#
CSA0#_0
CASA0#
WEA0#
VREFD1_1
VREFC1
DRAM_RST#
CKEA0
DRAM_RST#
ADBIA0
CLKA0#
CLKA0
MAA0_0
MAA0_1
MAA0_2
MAA0_3
MAA0_4
MAA0_6
MAA0_5
MAA0_7
MAA0_8
MAA0_8
EDCA0_3
EDCA0_1
DDBIA0_1
DDBIA0_3
WCKA0B_0
WCKA0_0
WCKA0_1
WCKA0B_1
WCKA0_1
WCKA0_0
WCKA0B_0
WCKA0B_1
VREFD1_2
DQA0_8
DQA0_9
DQA0_10
DQA0_14
DQA0_11
DQA0_15
DQA0_12
DQA0_13
MAA0_0
MAA0_1
MAA0_3
MAA0_2
MAA0_5
MAA0_4
MAA0_6
MAA0_7
VREFD1_2VREFC1
EDCA0_0
EDCA0_2
RASA0#
CASA0#
CSA0#_0
WEA0#
VREFD2_1
VREFD2_2
VREFC2
VREFC2 VREFD2_2
ADBIA0
DDBIA0_2
DDBIA0_0
DQA0_25
DQA0_24
DQA0_26
DQA0_27
DQA0_28
DQA0_31
DQA0_29
DQA0_30
DQA0_23
DQA0_22
DQA0_21
DQA0_16
DQA0_18
DQA0_17
DQA0_19
DQA0_20
DQA0_4
DQA0_6
DQA0_7
DQA0_5
DQA0_3
DQA0_2
DQA0_0
DQA0_1
CLKA0#<53>
CLKA0<53>
CKEA0<53>
ADBIA0<53>
RASA0#<53>
CSA0#_0<53>
CASA0#<53>
WEA0#<53>
WCKA0B_0<53>
WCKA0_0<53>
WCKA0B_1<53>
WCKA0_1<53>
DRAM_RST#<53,55,56,57>
EDCA0_1<53>
EDCA0_3<53>
DDBIA0_1<53>
DDBIA0_3<53>
EDCA0_2<53>
EDCA0_0<53>
DDBIA0_2<53>
DDBIA0_0<53>
MAA0_8<53>
MAA0_7<53>
MAA0_6<53>
MAA0_5<53>
MAA0_4<53>
MAA0_3<53>
MAA0_2<53>
MAA0_1<53>
MAA0_0<53>
DQA0_13 <53>
DQA0_12 <53>
DQA0_15 <53>
DQA0_14 <53>
DQA0_11 <53>
DQA0_10 <53>
DQA0_8 <53>
DQA0_9 <53>
DQA0_29 <53>
DQA0_31 <53>
DQA0_24 <53>
DQA0_25 <53>
DQA0_30 <53>
DQA0_28 <53>
DQA0_27 <53>
DQA0_26 <53>
DQA0_17 <53>
DQA0_18 <53>
DQA0_20 <53>
DQA0_23 <53>
DQA0_19 <53>
DQA0_16 <53>
DQA0_21 <53>
DQA0_22 <53>
DQA0_2 <53>
DQA0_1 <53>
DQA0_4 <53>
DQA0_6 <53>
DQA0_0 <53>
DQA0_3 <53>
DQA0_5 <53>
DQA0_7 <53>
+1.35V_MEM_GFX
+1.35V_MEM_GFX
+1.35V_MEM_GFX
+1.35V_MEM_GFX
+1.35V_MEM_GFX
+1.35V_MEM_GFX
+1.35V_MEM_GFX+1.35V_MEM_GFX
+1.35V_MEM_GFX
+1.35V_MEM_GFX
+1.35V_MEM_GFX +1.35V_MEM_GFX
+1.35V_MEM_GFX
+1.35V_MEM_GFX
+1.35V_MEM_GFX
Title
Size Document Number Rev
Date: Sheet of
LA-9984P
1.0
VRAM_A Lower_UV4,UV5
54 57Wednesday, May 22, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9984P
1.0
VRAM_A Lower_UV4,UV5
54 57Wednesday, May 22, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9984P
1.0
VRAM_A Lower_UV4,UV5
54 57Wednesday, May 22, 2013
Compal Electronics, Inc.
CV61
0.1U_0402_10V7K
DIS@CV61
0.1U_0402_10V7K
DIS@
1
2
CV42
10U_0603_6.3V6M
DIS@CV42
10U_0603_6.3V6M
DIS@
1
2
CV373
1U_0402_6.3V6K
DIS@CV373
1U_0402_6.3V6K
DIS@
1
2
RV36
5.49K_0402_1%
DIS@RV36
5.49K_0402_1%
DIS@
12
RV185
2.37K_0402_1%
DIS@RV185
2.37K_0402_1%
DIS@
12
RV29
5.49K_0402_1%
DIS@RV29
5.49K_0402_1%
DIS@
12
CV69
0.1U_0402_10V7K
DIS@CV69
0.1U_0402_10V7K
DIS@
1
2
CV397
1U_0402_6.3V6K
DIS@CV397
1U_0402_6.3V6K
DIS@
1
2
CV400
1U_0402_6.3V6K
DIS@CV400
1U_0402_6.3V6K
DIS@
1
2
170-BALL
SGRAM GDDR5
MF=0 MF=1 MF=0MF=1
UV4
K4G20325FC-HC05_FBGA170~D
DIS@
170-BALL
SGRAM GDDR5
MF=0 MF=1 MF=0MF=1
UV4
K4G20325FC-HC05_FBGA170~D
DIS@
WE# CS#
L12
CS# WE#
G12
CAS# RAS#
L3
RAS# CAS#
G3
CKE#
J3
CK
J12
CK#
J11
VPP/NC
U5
EDC0 EDC3
C2
EDC1 EDC2
C13
DQ24 DQ0 A4
DQ25 DQ1 A2
DQ26 DQ2 B4
DQ27 DQ3 B2
DQ28 DQ4 E4
DQ29 DQ5 E2
DQ30 DQ6 F4
DQ31 DQ7 F2
VSSQ E1
VSS
T10
VSS
L10
VSS
P10
VREFD
A10
VDD
D11 VDD
R10
VDDQ B1
VDDQ D1
VDDQ F1
VDDQ M1
VREFD
U10
VDDQ T1
ZQ
J13
RESET#
J2
WCK01 WCK23
D4
WCK23# WCK01#
P5
WCK23 WCK01
P4
VSSQ A1
VSSQ C1
VSSQ N1
VSSQ R1
WCK01# WCK23#
D5
VSSQ U1
VPP/NC
A5
VDDQ G2
VSSQ H2
VSSQ K2
VDDQ L2
VDDQ B3
VSSQ A3
VSS
G10
VDD
C10
ABI#
J4
VDD
R5
VSS
D10
VDD
C5
DQ17 DQ9 A13
DQ18 DQ10 B11
DQ19 DQ11 B13
DQ20 DQ12 E11
DQ21 DQ13 E13
DQ22 DQ14 F11
DQ23 DQ15 F13
DQ16 DQ8 A11
EDC2 EDC1
R13
BA2/A4 BA0/A2
K11
VDD
L4 VDD
G4 VDD
L1 VDD
G1
VSS
B10 VSS
T5 VSS
L5 VSS
G5 VSS
B5 VSS
K1 VSS
H1
VDDQ P1
BA3/A3 BA1/A5
H10
BA0/A2 BA2/A4
H11
BA1/A5 BA3/A3
K10
VDDQ D3
VDDQ F3
VDDQ H3
VDDQ K3
VDDQ M3
VDDQ P3
VDDQ T3
VDDQ E5
VDDQ N5
VDDQ E10
VDDQ N10
VDDQ B12
VDDQ D12
VDDQ F12
VDDQ H12
VDDQ K12
VDDQ M12
VDDQ P12
VDDQ T12
VDDQ G13
VDDQ L13
VDDQ B14
VDDQ D14
VDDQ F14
VDDQ M14
VDDQ P14
VSSQ C3
VSSQ E3
VSSQ N3
VSSQ R3
VSSQ U3
VSSQ C4
VSSQ R4
VSSQ F5
VSSQ M5
VSSQ F10
VSSQ M10
VSSQ C11
VSSQ R11
VSSQ A12
VSSQ C12
VSSQ E12
VSSQ N12
VSSQ R12
VSSQ U12
VSSQ H13
VSSQ K13
VSSQ A14
VSSQ C14
VSSQ E14
VSSQ N14
VSSQ R14
VSSQ U14
VDDQ T14
VDD
G11
VDD
L11
VDD
P11
VDD
G14
VDD
L14
VSS
H14
VSS
K14
DQ8 DQ16 U11
DQ9 DQ17 U13
DQ10 DQ18 T11
DQ11 DQ19 T13
DQ12 DQ20 N11
DQ13 DQ21 N13
DQ14 DQ22 M11
DQ15 DQ23 M13
DQ0 DQ24 U4
DQ1 DQ25 U2
DQ2 DQ26 T4
DQ3 DQ27 T2
DQ4 DQ28 N4
DQ5 DQ29 N2
DQ6 DQ30 M4
DQ7 DQ31 M2
EDC3 EDC0
R2
DBI0# DBI3#
D2
DBI1# DBI2#
D13
DBI2# DBI1#
P13
DBI3# DBI0#
P2
VREFC
J14
SEN
J10 MF
J1
A8/A7 A10/A0
K4
A9/A1 A11/A6
H5
A10/A0 A8/A7
H4
A11/A6 A9/A1
K5
A12/RFU/NC
J5
CV60
0.1U_0402_10V7K
DIS@CV60
0.1U_0402_10V7K
DIS@
1
2
RV186
5.49K_0402_1%
DIS@RV186
5.49K_0402_1%
DIS@
12
CV374
1U_0402_6.3V6K
DIS@CV374
1U_0402_6.3V6K
DIS@
1
2
CV70
0.1U_0402_10V7K
DIS@CV70
0.1U_0402_10V7K
DIS@
1
2
CV380
1U_0402_6.3V6K
DIS@CV380
1U_0402_6.3V6K
DIS@
1
2
CV399
1U_0402_6.3V6K
DIS@CV399
1U_0402_6.3V6K
DIS@
1
2
CV72
0.1U_0402_10V7K
DIS@CV72
0.1U_0402_10V7K
DIS@
1
2
CV378
0.1U_0402_10V7K
DIS@CV378
0.1U_0402_10V7K
DIS@
1
2
CV71
0.1U_0402_10V7K
DIS@CV71
0.1U_0402_10V7K
DIS@
1
2
170-BALL
SGRAM GDDR5
MF=0 MF=1 MF=0MF=1
UV5
K4G20325FC-HC05_FBGA170~D
DIS@
170-BALL
SGRAM GDDR5
MF=0 MF=1 MF=0MF=1
UV5
K4G20325FC-HC05_FBGA170~D
DIS@
WE# CS#
L12
CS# WE#
G12
CAS# RAS#
L3
RAS# CAS#
G3
CKE#
J3
CK
J12
CK#
J11
VPP/NC
U5
EDC0 EDC3
C2
EDC1 EDC2
C13
DQ24 DQ0 A4
DQ25 DQ1 A2
DQ26 DQ2 B4
DQ27 DQ3 B2
DQ28 DQ4 E4
DQ29 DQ5 E2
DQ30 DQ6 F4
DQ31 DQ7 F2
VSSQ E1
VSS
T10
VSS
L10
VSS
P10
VREFD
A10
VDD
D11 VDD
R10
VDDQ B1
VDDQ D1
VDDQ F1
VDDQ M1
VREFD
U10
VDDQ T1
ZQ
J13
RESET#
J2
WCK01 WCK23
D4
WCK23# WCK01#
P5
WCK23 WCK01
P4
VSSQ A1
VSSQ C1
VSSQ N1
VSSQ R1
WCK01# WCK23#
D5
VSSQ U1
VPP/NC
A5
VDDQ G2
VSSQ H2
VSSQ K2
VDDQ L2
VDDQ B3
VSSQ A3
VSS
G10
VDD
C10
ABI#
J4
VDD
R5
VSS
D10
VDD
C5
DQ17 DQ9 A13
DQ18 DQ10 B11
DQ19 DQ11 B13
DQ20 DQ12 E11
DQ21 DQ13 E13
DQ22 DQ14 F11
DQ23 DQ15 F13
DQ16 DQ8 A11
EDC2 EDC1
R13
BA2/A4 BA0/A2
K11
VDD
L4 VDD
G4 VDD
L1 VDD
G1
VSS
B10 VSS
T5 VSS
L5 VSS
G5 VSS
B5 VSS
K1 VSS
H1
VDDQ P1
BA3/A3 BA1/A5
H10
BA0/A2 BA2/A4
H11
BA1/A5 BA3/A3
K10
VDDQ D3
VDDQ F3
VDDQ H3
VDDQ K3
VDDQ M3
VDDQ P3
VDDQ T3
VDDQ E5
VDDQ N5
VDDQ E10
VDDQ N10
VDDQ B12
VDDQ D12
VDDQ F12
VDDQ H12
VDDQ K12
VDDQ M12
VDDQ P12
VDDQ T12
VDDQ G13
VDDQ L13
VDDQ B14
VDDQ D14
VDDQ F14
VDDQ M14
VDDQ P14
VSSQ C3
VSSQ E3
VSSQ N3
VSSQ R3
VSSQ U3
VSSQ C4
VSSQ R4
VSSQ F5
VSSQ M5
VSSQ F10
VSSQ M10
VSSQ C11
VSSQ R11
VSSQ A12
VSSQ C12
VSSQ E12
VSSQ N12
VSSQ R12
VSSQ U12
VSSQ H13
VSSQ K13
VSSQ A14
VSSQ C14
VSSQ E14
VSSQ N14
VSSQ R14
VSSQ U14
VDDQ T14
VDD
G11
VDD
L11
VDD
P11
VDD
G14
VDD
L14
VSS
H14
VSS
K14
DQ8 DQ16 U11
DQ9 DQ17 U13
DQ10 DQ18 T11
DQ11 DQ19 T13
DQ12 DQ20 N11
DQ13 DQ21 N13
DQ14 DQ22 M11
DQ15 DQ23 M13
DQ0 DQ24 U4
DQ1 DQ25 U2
DQ2 DQ26 T4
DQ3 DQ27 T2
DQ4 DQ28 N4
DQ5 DQ29 N2
DQ6 DQ30 M4
DQ7 DQ31 M2
EDC3 EDC0
R2
DBI0# DBI3#
D2
DBI1# DBI2#
D13
DBI2# DBI1#
P13
DBI3# DBI0#
P2
VREFC
J14
SEN
J10 MF
J1
A8/A7 A10/A0
K4
A9/A1 A11/A6
H5
A10/A0 A8/A7
H4
A11/A6 A9/A1
K5
A12/RFU/NC
J5
RV181
5.49K_0402_1%
DIS@RV181
5.49K_0402_1%
DIS@
12
CV395
1U_0402_6.3V6K
DIS@CV395
1U_0402_6.3V6K
DIS@
1
2
CV396
1U_0402_6.3V6K
DIS@CV396
1U_0402_6.3V6K
DIS@
1
2
CV393
1U_0402_6.3V6K
DIS@CV393
1U_0402_6.3V6K
DIS@
1
2
CV330
1U_0402_6.3V6K
DIS@CV330
1U_0402_6.3V6K
DIS@
1
2
CV14
1U_0402_6.3V6K
DIS@
CV14
1U_0402_6.3V6K
DIS@
1
2
CV9
1U_0402_6.3V6K
DIS@
CV9
1U_0402_6.3V6K
DIS@
1
2
CV372
1U_0402_6.3V6K
DIS@CV372
1U_0402_6.3V6K
DIS@
1
2
CV328
1U_0402_6.3V6K
DIS@CV328
1U_0402_6.3V6K
DIS@
1
2
RV37
2.37K_0402_1%
DIS@RV37
2.37K_0402_1%
DIS@
12
RV183
2.37K_0402_1%
DIS@RV183
2.37K_0402_1%
DIS@
12
CV15
1U_0402_6.3V6K
DIS@
CV15
1U_0402_6.3V6K
DIS@
1
2
CV73
0.1U_0402_10V7K
DIS@CV73
0.1U_0402_10V7K
DIS@
1
2
CV16
0.1U_0402_10V7K
DIS@CV16
0.1U_0402_10V7K
DIS@
1
2
CV41
10U_0603_6.3V6M
DIS@CV41
10U_0603_6.3V6M
DIS@
1
2
CV398
1U_0402_6.3V6K
DIS@CV398
1U_0402_6.3V6K
DIS@
1
2
CV17
0.1U_0402_10V7K
DIS@CV17
0.1U_0402_10V7K
DIS@
1
2
CV394
1U_0402_6.3V6K
DIS@CV394
1U_0402_6.3V6K
DIS@
1
2
RV184
5.49K_0402_1%
DIS@RV184
5.49K_0402_1%
DIS@
12
CV8
1U_0402_6.3V6K
DIS@
CV8
1U_0402_6.3V6K
DIS@
1
2
RV28
2.37K_0402_1%
DIS@RV28
2.37K_0402_1%
DIS@
12
RV26 121_0402_1%DIS@ RV26 121_0402_1%DIS@
1 2
RV34
5.49K_0402_1%
DIS@RV34
5.49K_0402_1%
DIS@
12
CV375
0.1U_0402_10V7K
DIS@CV375
0.1U_0402_10V7K
DIS@
1
2
RV35
2.37K_0402_1%
DIS@RV35
2.37K_0402_1%
DIS@
12
RV25
121_0402_1%
DIS@ RV25
121_0402_1%
DIS@
1 2
RV38
2.37K_0402_1%
DIS@RV38
2.37K_0402_1%
DIS@
12
CV59
0.1U_0402_10V7K
DIS@
CV59
0.1U_0402_10V7K
DIS@
1
2
CV388
1U_0402_6.3V6K
DIS@CV388
1U_0402_6.3V6K
DIS@
1
2
CV387
1U_0402_6.3V6K
DIS@CV387
1U_0402_6.3V6K
DIS@
1
2

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Memory Partition A - Upper 16 bits
MIRROR
DELL CONFIDENTIAL/PROPRIETARY
NORMAL
PROPRIETARY NOTE:
THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
A_2
A_0
A_1
A_3
CSA1#_0
MAA1_3
CKEA1
ADBIA1
MAA1_6
MAA1_2
CLKA1#
CLKA1
WEA1#
MAA1_7
DRAM_RST#
RASA1#
MAA1_8
CKEA1
DRAM_RST#
ADBIA1
CASA1#
CLKA1#
CLKA1
MAA1_1
MAA1_8
MAA1_0
MAA1_4
MAA1_5
DDBIA1_0
DDBIA1_2
WCKA1_0
WCKA1B_0
WCKA1_1
WCKA1B_1
DQA1_5
DQA1_7
DQA1_6
DQA1_3
DQA1_4
DQA1_2
DQA1_1
DQA1_0
DQA1_21
DQA1_22
DQA1_23
DQA1_20
DQA1_17
DQA1_16
DQA1_18
DQA1_19
DQA1_25
DQA1_27
DQA1_26
DQA1_24
DQA1_28
DQA1_30
DQA1_29
DQA1_31
DQA1_9
DQA1_8
DQA1_10
DQA1_11
DQA1_15
DQA1_14
DQA1_13
DQA1_12
MAA1_7
MAA1_6
MAA1_5
MAA1_4
MAA1_3
MAA1_2
MAA1_1
MAA1_0
EDCA1_2
EDCA1_0
EDCA1_1
EDCA1_3
DDBIA1_1
DDBIA1_3
CASA1#
RASA1#
VREFD3_1
VREFD3_2 VREFC3
VREFD3_2
VREFC3
WCKA1B_0
WCKA1_0
WCKA1_1
WCKA1B_1
CSA1#_0
WEA1#
VREFD4_1
VREFD4_2
VREFC4
VREFC4VREFD4_2
CLKA1#<53>
CLKA1<53>
CKEA1<53>
ADBIA1<53>
WCKA1_0<53>
CASA1#<53>
WEA1#<53>
RASA1#<53>
CSA1#_0<53>
WCKA1B_1<53>
WCKA1_1<53>
WCKA1B_0<53>
DQA1_18 <53>
DQA1_16 <53>
DQA1_22 <53>
DQA1_21 <53>
DQA1_19 <53>
DQA1_17 <53>
DQA1_20 <53>
DQA1_23 <53>
EDCA1_2<53>
EDCA1_0<53>
DDBIA1_2<53>
DDBIA1_0<53>
MAA1_8<53>
MAA1_0<53>
MAA1_1<53>
MAA1_3<53>
MAA1_2<53>
MAA1_5<53>
MAA1_4<53>
MAA1_6<53>
MAA1_7<53>
EDCA1_1<53>
EDCA1_3<53>
DDBIA1_1<53>
DDBIA1_3<53>
DRAM_RST#<53,54,56,57>
DQA1_1 <53>
DQA1_2 <53>
DQA1_7 <53>
DQA1_5 <53>
DQA1_0 <53>
DQA1_4 <53>
DQA1_3 <53>
DQA1_6 <53>
DQA1_29 <53>
DQA1_30 <53>
DQA1_27 <53>
DQA1_25 <53>
DQA1_31 <53>
DQA1_28 <53>
DQA1_24 <53>
DQA1_26 <53>
DQA1_12 <53>
DQA1_13 <53>
DQA1_8 <53>
DQA1_9 <53>
DQA1_14 <53>
DQA1_15 <53>
DQA1_11 <53>
DQA1_10 <53>
+1.35V_MEM_GFX
+1.35V_MEM_GFX
+1.35V_MEM_GFX
+1.35V_MEM_GFX
+1.35V_MEM_GFX
+1.35V_MEM_GFX
+1.35V_MEM_GFX +1.35V_MEM_GFX
+1.35V_MEM_GFX
+1.35V_MEM_GFX+1.35V_MEM_GFX
+1.35V_MEM_GFX
+1.35V_MEM_GFX
+1.35V_MEM_GFX
+1.35V_MEM_GFX
Title
Size Document Number Rev
Date: Sheet of
LA-9984P
1.0
MARX-VRAM_A Upper_UV3,UV6
55 57Wednesday, May 22, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9984P
1.0
MARX-VRAM_A Upper_UV3,UV6
55 57Wednesday, May 22, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9984P
1.0
MARX-VRAM_A Upper_UV3,UV6
55 57Wednesday, May 22, 2013
Compal Electronics, Inc.
CV354
1U_0402_6.3V6K
DIS@CV354
1U_0402_6.3V6K
DIS@
1
2
RV41
5.49K_0402_1%
DIS@RV41
5.49K_0402_1%
DIS@
12
RV39
5.49K_0402_1%
DIS@RV39
5.49K_0402_1%
DIS@
12
CV349
1U_0402_6.3V6K
DIS@CV349
1U_0402_6.3V6K
DIS@
1
2
CV351
1U_0402_6.3V6K
DIS@CV351
1U_0402_6.3V6K
DIS@
1
2
CV10
1U_0402_6.3V6K
DIS@
CV10
1U_0402_6.3V6K
DIS@
1
2
CV332
1U_0402_6.3V6K
DIS@CV332
1U_0402_6.3V6K
DIS@
1
2
RV195
2.37K_0402_1%
DIS@RV195
2.37K_0402_1%
DIS@
12
RV30
121_0402_1%
DIS@RV30
121_0402_1%
DIS@
1 2
CV1
10U_0603_6.3V6M
DIS@CV1
10U_0603_6.3V6M
DIS@
1
2
CV352
1U_0402_6.3V6K
DIS@CV352
1U_0402_6.3V6K
DIS@
1
2
CV401
1U_0402_6.3V6K
DIS@CV401
1U_0402_6.3V6K
DIS@
1
2
CV63
0.1U_0402_10V7K
DIS@CV63
0.1U_0402_10V7K
DIS@
1
2
RV193
2.37K_0402_1%
DIS@RV193
2.37K_0402_1%
DIS@
12
CV369
0.1U_0402_10V7K
DIS@CV369
0.1U_0402_10V7K
DIS@
1
2
RV196
5.49K_0402_1%
DIS@RV196
5.49K_0402_1%
DIS@
12
CV355
1U_0402_6.3V6K
DIS@CV355
1U_0402_6.3V6K
DIS@
1
2
CV67
1U_0402_6.3V6K
DIS@
CV67
1U_0402_6.3V6K
DIS@
1
2
RV33
5.49K_0402_1%
DIS@RV33
5.49K_0402_1%
DIS@
12
CV11
1U_0402_6.3V6K
DIS@
CV11
1U_0402_6.3V6K
DIS@
1
2
RV194
5.49K_0402_1%
DIS@RV194
5.49K_0402_1%
DIS@
12
CV3
10U_0603_6.3V6M
DIS@CV3
10U_0603_6.3V6M
DIS@
1
2
CV64
0.1U_0402_10V7K
DIS@CV64
0.1U_0402_10V7K
DIS@
1
2
CV370
0.1U_0402_10V7K
DIS@CV370
0.1U_0402_10V7K
DIS@
1
2
170-BALL
SGRAM GDDR5
MF=0 MF=1 MF=0MF=1
UV3
K4G20325FC-HC05_FBGA170~D
DIS@
170-BALL
SGRAM GDDR5
MF=0 MF=1 MF=0MF=1
UV3
K4G20325FC-HC05_FBGA170~D
DIS@
WE# CS#
L12
CS# WE#
G12
CAS# RAS#
L3
RAS# CAS#
G3
CKE#
J3
CK
J12
CK#
J11
VPP/NC
U5
EDC0 EDC3
C2
EDC1 EDC2
C13
DQ24 DQ0 A4
DQ25 DQ1 A2
DQ26 DQ2 B4
DQ27 DQ3 B2
DQ28 DQ4 E4
DQ29 DQ5 E2
DQ30 DQ6 F4
DQ31 DQ7 F2
VSSQ E1
VSS
T10
VSS
L10
VSS
P10
VREFD
A10
VDD
D11 VDD
R10
VDDQ B1
VDDQ D1
VDDQ F1
VDDQ M1
VREFD
U10
VDDQ T1
ZQ
J13
RESET#
J2
WCK01 WCK23
D4
WCK23# WCK01#
P5
WCK23 WCK01
P4
VSSQ A1
VSSQ C1
VSSQ N1
VSSQ R1
WCK01# WCK23#
D5
VSSQ U1
VPP/NC
A5
VDDQ G2
VSSQ H2
VSSQ K2
VDDQ L2
VDDQ B3
VSSQ A3
VSS
G10
VDD
C10
ABI#
J4
VDD
R5
VSS
D10
VDD
C5
DQ17 DQ9 A13
DQ18 DQ10 B11
DQ19 DQ11 B13
DQ20 DQ12 E11
DQ21 DQ13 E13
DQ22 DQ14 F11
DQ23 DQ15 F13
DQ16 DQ8 A11
EDC2 EDC1
R13
BA2/A4 BA0/A2
K11
VDD
L4 VDD
G4 VDD
L1 VDD
G1
VSS
B10 VSS
T5 VSS
L5 VSS
G5 VSS
B5 VSS
K1 VSS
H1
VDDQ P1
BA3/A3 BA1/A5
H10
BA0/A2 BA2/A4
H11
BA1/A5 BA3/A3
K10
VDDQ D3
VDDQ F3
VDDQ H3
VDDQ K3
VDDQ M3
VDDQ P3
VDDQ T3
VDDQ E5
VDDQ N5
VDDQ E10
VDDQ N10
VDDQ B12
VDDQ D12
VDDQ F12
VDDQ H12
VDDQ K12
VDDQ M12
VDDQ P12
VDDQ T12
VDDQ G13
VDDQ L13
VDDQ B14
VDDQ D14
VDDQ F14
VDDQ M14
VDDQ P14
VSSQ C3
VSSQ E3
VSSQ N3
VSSQ R3
VSSQ U3
VSSQ C4
VSSQ R4
VSSQ F5
VSSQ M5
VSSQ F10
VSSQ M10
VSSQ C11
VSSQ R11
VSSQ A12
VSSQ C12
VSSQ E12
VSSQ N12
VSSQ R12
VSSQ U12
VSSQ H13
VSSQ K13
VSSQ A14
VSSQ C14
VSSQ E14
VSSQ N14
VSSQ R14
VSSQ U14
VDDQ T14
VDD
G11
VDD
L11
VDD
P11
VDD
G14
VDD
L14
VSS
H14
VSS
K14
DQ8 DQ16 U11
DQ9 DQ17 U13
DQ10 DQ18 T11
DQ11 DQ19 T13
DQ12 DQ20 N11
DQ13 DQ21 N13
DQ14 DQ22 M11
DQ15 DQ23 M13
DQ0 DQ24 U4
DQ1 DQ25 U2
DQ2 DQ26 T4
DQ3 DQ27 T2
DQ4 DQ28 N4
DQ5 DQ29 N2
DQ6 DQ30 M4
DQ7 DQ31 M2
EDC3 EDC0
R2
DBI0# DBI3#
D2
DBI1# DBI2#
D13
DBI2# DBI1#
P13
DBI3# DBI0#
P2
VREFC
J14
SEN
J10 MF
J1
A8/A7 A10/A0
K4
A9/A1 A11/A6
H5
A10/A0 A8/A7
H4
A11/A6 A9/A1
K5
A12/RFU/NC
J5
RV197
2.37K_0402_1%
DIS@RV197
2.37K_0402_1%
DIS@
12
CV379
0.1U_0402_10V7K
DIS@CV379
0.1U_0402_10V7K
DIS@
1
2
RV31 121_0402_1%DIS@ RV31 121_0402_1%DIS@
1 2
CV66
1U_0402_6.3V6K
DIS@
CV66
1U_0402_6.3V6K
DIS@
1
2
CV383
1U_0402_6.3V6K
DIS@
CV383
1U_0402_6.3V6K
DIS@
1
2
CV390
1U_0402_6.3V6K
DIS@CV390
1U_0402_6.3V6K
DIS@
1
2
CV65
0.1U_0402_10V7K
DIS@CV65
0.1U_0402_10V7K
DIS@
1
2
CV377
0.1U_0402_10V7K
DIS@CV377
0.1U_0402_10V7K
DIS@
1
2
CV68
0.1U_0402_10V7K
DIS@CV68
0.1U_0402_10V7K
DIS@
1
2
CV382
1U_0402_6.3V6K
DIS@
CV382
1U_0402_6.3V6K
DIS@
1
2
CV389
1U_0402_6.3V6K
DIS@CV389
1U_0402_6.3V6K
DIS@
1
2
CV381
1U_0402_6.3V6K
DIS@
CV381
1U_0402_6.3V6K
DIS@
1
2
CV368
0.1U_0402_10V7K
DIS@CV368
0.1U_0402_10V7K
DIS@
1
2
RV191
2.37K_0402_1%
DIS@RV191
2.37K_0402_1%
DIS@
12
CV356
1U_0402_6.3V6K
DIS@CV356
1U_0402_6.3V6K
DIS@
1
2
CV371
0.1U_0402_10V7K
DIS@CV371
0.1U_0402_10V7K
DIS@
1
2
RV32
2.37K_0402_1%
DIS@RV32
2.37K_0402_1%
DIS@
12
CV350
1U_0402_6.3V6K
DIS@CV350
1U_0402_6.3V6K
DIS@
1
2
CV376
1U_0402_6.3V6K
DIS@
CV376
1U_0402_6.3V6K
DIS@
1
2
RV192
5.49K_0402_1%
DIS@RV192
5.49K_0402_1%
DIS@
12
CV62
0.1U_0402_10V7K
DIS@CV62
0.1U_0402_10V7K
DIS@
1
2
RV40
2.37K_0402_1%
DIS@RV40
2.37K_0402_1%
DIS@
12
170-BALL
SGRAM GDDR5
MF=0 MF=1 MF=0MF=1
UV6
K4G20325FC-HC05_FBGA170~D
DIS@
170-BALL
SGRAM GDDR5
MF=0 MF=1 MF=0MF=1
UV6
K4G20325FC-HC05_FBGA170~D
DIS@
WE# CS#
L12
CS# WE#
G12
CAS# RAS#
L3
RAS# CAS#
G3
CKE#
J3
CK
J12
CK#
J11
VPP/NC
U5
EDC0 EDC3
C2
EDC1 EDC2
C13
DQ24 DQ0 A4
DQ25 DQ1 A2
DQ26 DQ2 B4
DQ27 DQ3 B2
DQ28 DQ4 E4
DQ29 DQ5 E2
DQ30 DQ6 F4
DQ31 DQ7 F2
VSSQ E1
VSS
T10
VSS
L10
VSS
P10
VREFD
A10
VDD
D11 VDD
R10
VDDQ B1
VDDQ D1
VDDQ F1
VDDQ M1
VREFD
U10
VDDQ T1
ZQ
J13
RESET#
J2
WCK01 WCK23
D4
WCK23# WCK01#
P5
WCK23 WCK01
P4
VSSQ A1
VSSQ C1
VSSQ N1
VSSQ R1
WCK01# WCK23#
D5
VSSQ U1
VPP/NC
A5
VDDQ G2
VSSQ H2
VSSQ K2
VDDQ L2
VDDQ B3
VSSQ A3
VSS
G10
VDD
C10
ABI#
J4
VDD
R5
VSS
D10
VDD
C5
DQ17 DQ9 A13
DQ18 DQ10 B11
DQ19 DQ11 B13
DQ20 DQ12 E11
DQ21 DQ13 E13
DQ22 DQ14 F11
DQ23 DQ15 F13
DQ16 DQ8 A11
EDC2 EDC1
R13
BA2/A4 BA0/A2
K11
VDD
L4 VDD
G4 VDD
L1 VDD
G1
VSS
B10 VSS
T5 VSS
L5 VSS
G5 VSS
B5 VSS
K1 VSS
H1
VDDQ P1
BA3/A3 BA1/A5
H10
BA0/A2 BA2/A4
H11
BA1/A5 BA3/A3
K10
VDDQ D3
VDDQ F3
VDDQ H3
VDDQ K3
VDDQ M3
VDDQ P3
VDDQ T3
VDDQ E5
VDDQ N5
VDDQ E10
VDDQ N10
VDDQ B12
VDDQ D12
VDDQ F12
VDDQ H12
VDDQ K12
VDDQ M12
VDDQ P12
VDDQ T12
VDDQ G13
VDDQ L13
VDDQ B14
VDDQ D14
VDDQ F14
VDDQ M14
VDDQ P14
VSSQ C3
VSSQ E3
VSSQ N3
VSSQ R3
VSSQ U3
VSSQ C4
VSSQ R4
VSSQ F5
VSSQ M5
VSSQ F10
VSSQ M10
VSSQ C11
VSSQ R11
VSSQ A12
VSSQ C12
VSSQ E12
VSSQ N12
VSSQ R12
VSSQ U12
VSSQ H13
VSSQ K13
VSSQ A14
VSSQ C14
VSSQ E14
VSSQ N14
VSSQ R14
VSSQ U14
VDDQ T14
VDD
G11
VDD
L11
VDD
P11
VDD
G14
VDD
L14
VSS
H14
VSS
K14
DQ8 DQ16 U11
DQ9 DQ17 U13
DQ10 DQ18 T11
DQ11 DQ19 T13
DQ12 DQ20 N11
DQ13 DQ21 N13
DQ14 DQ22 M11
DQ15 DQ23 M13
DQ0 DQ24 U4
DQ1 DQ25 U2
DQ2 DQ26 T4
DQ3 DQ27 T2
DQ4 DQ28 N4
DQ5 DQ29 N2
DQ6 DQ30 M4
DQ7 DQ31 M2
EDC3 EDC0
R2
DBI0# DBI3#
D2
DBI1# DBI2#
D13
DBI2# DBI1#
P13
DBI3# DBI0#
P2
VREFC
J14
SEN
J10 MF
J1
A8/A7 A10/A0
K4
A9/A1 A11/A6
H5
A10/A0 A8/A7
H4
A11/A6 A9/A1
K5
A12/RFU/NC
J5
CV353
1U_0402_6.3V6K
DIS@CV353
1U_0402_6.3V6K
DIS@
1
2
CV74
0.1U_0402_10V7K
DIS@CV74
0.1U_0402_10V7K
DIS@
1
2

5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DELL CONFIDENTIAL/PROPRIETARY
Memory Partition B - Lower 16 bits
NORMAL
MIRROR
B_1
B_3
B_0
B_2
WEB0#
CKEB0
RASB0#
CLKB0#
CLKB0
CSB0#_0
CKEB0
DRAM_RST#
CLKB0#
CLKB0
CASB0#
DRAM_RST#
MAB0_0
MAB0_1
MAB0_2
MAB0_3
MAB0_4
MAB0_5
MAB0_6
MAB0_7
MAB0_8
MAB0_8
DDBIB0_1
DDBIB0_2
EDCB0_2
EDCB0_1
EDCB0_0
EDCB0_3
DDBIB0_0
DDBIB0_3
WCKB0_0
WCKB0B_0
WCKB0_1
WCKB0B_1
WCKB0_0
WCKB0B_1
WCKB0_1
WCKB0B_0
DQB0_17
DQB0_16
DQB0_18
DQB0_19
DQB0_20
DQB0_23
DQB0_21
DQB0_22
DQB0_8
DQB0_9
DQB0_11
DQB0_10
DQB0_13
DQB0_15
DQB0_12
DQB0_14
DQB0_5
DQB0_6
DQB0_7
DQB0_4
DQB0_0
DQB0_3
DQB0_1
DQB0_2
DQB0_29
DQB0_31
DQB0_30
DQB0_28
DQB0_26
DQB0_25
DQB0_27
DQB0_24
ADBIB0
ADBIB0
VREFD5_1
VREFD5_2
VREFC5
VREFD5_2 VREFC5
MAB0_0
MAB0_1
MAB0_3
MAB0_2
MAB0_5
MAB0_4
MAB0_6
MAB0_7
CASB0#
RASB0#
CSB0#_0
WEB0#
VREFD6_1
VREFD6_2
VREFC6
VREFD6_2 VREFC6
CLKB0#<53>
CLKB0<53>
CKEB0<53>
ADBIB0<53>
WCKB0_1<53>
RASB0#<53>
CSB0#_0<53>
CASB0#<53>
WEB0#<53>
WCKB0B_0<53>
WCKB0_0<53>
WCKB0B_1<53>
DQB0_1 <53>
DQB0_3 <53>
DQB0_6 <53>
DQB0_5 <53>
DQB0_2 <53>
DQB0_0 <53>
DQB0_4 <53>
DQB0_7 <53>
DQB0_27 <53>
DQB0_25 <53>
DQB0_31 <53>
DQB0_29 <53>
DQB0_24 <53>
DQB0_26 <53>
DQB0_28 <53>
DQB0_30 <53>
EDCB0_1<53>
EDCB0_2<53>
DDBIB0_1<53>
DDBIB0_2<53>
DRAM_RST#<53,54,55,57>
MAB0_8<53>
MAB0_7<53>
MAB0_6<53>
MAB0_5<53>
MAB0_4<53>
MAB0_3<53>
MAB0_2<53>
MAB0_1<53>
MAB0_0<53>
DQB0_21 <53>
DQB0_23 <53>
DQB0_16 <53>
DQB0_17 <53>
DQB0_22 <53>
DQB0_20 <53>
DQB0_19 <53>
DQB0_18 <53>
DQB0_12 <53>
DQB0_15 <53>
DQB0_9 <53>
DQB0_8 <53>
DQB0_14 <53>
DQB0_13 <53>
DQB0_10 <53>
DQB0_11 <53>
EDCB0_3<53>
EDCB0_0<53>
DDBIB0_3<53>
DDBIB0_0<53>
+1.35V_MEM_GFX
+1.35V_MEM_GFX
+1.35V_MEM_GFX
+1.35V_MEM_GFX
+1.35V_MEM_GFX
+1.35V_MEM_GFX
+1.35V_MEM_GFX +1.35V_MEM_GFX
+1.35V_MEM_GFX
+1.35V_MEM_GFX +1.35V_MEM_GFX
+1.35V_MEM_GFX
+1.35V_MEM_GFX
+1.35V_MEM_GFX
+1.35V_MEM_GFX
Title
Size Document Number Rev
Date: Sheet of
LA-9984P
1.0
MARX-VRAM_B Lower_UV7,UV8
56 57Wednesday, May 22, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9984P
1.0
MARX-VRAM_B Lower_UV7,UV8
56 57Wednesday, May 22, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9984P
1.0
MARX-VRAM_B Lower_UV7,UV8
56 57Wednesday, May 22, 2013
Compal Electronics, Inc.
CV384
0.1U_0402_10V7K
DIS@CV384
0.1U_0402_10V7K
DIS@
1
2
RV5
5.49K_0402_1%
DIS@RV5
5.49K_0402_1%
DIS@
12
CV291
0.1U_0402_10V7K
DIS@CV291
0.1U_0402_10V7K
DIS@
1
2
RV4
5.49K_0402_1%
DIS@RV4
5.49K_0402_1%
DIS@
12
RV2
5.49K_0402_1%
DIS@RV2
5.49K_0402_1%
DIS@
12
RV163 121_0402_1%DIS@ RV163 121_0402_1%DIS@
1 2
CV292
1U_0402_6.3V6K
DIS@
CV292
1U_0402_6.3V6K
DIS@
1
2
CV283
1U_0402_6.3V6K
DIS@
CV283
1U_0402_6.3V6K
DIS@
1
2
CV5
10U_0603_6.3V6M
DIS@CV5
10U_0603_6.3V6M
DIS@
1
2
CV296
0.1U_0402_10V7K
DIS@CV296
0.1U_0402_10V7K
DIS@
1
2
RV9
5.49K_0402_1%
DIS@RV9
5.49K_0402_1%
DIS@
12
RV3
2.37K_0402_1%
DIS@RV3
2.37K_0402_1%
DIS@
12
CV386
0.1U_0402_10V7K
DIS@CV386
0.1U_0402_10V7K
DIS@
1
2
CV385
0.1U_0402_10V7K
DIS@CV385
0.1U_0402_10V7K
DIS@
1
2
CV25
1U_0402_6.3V6K
DIS@CV25
1U_0402_6.3V6K
DIS@
1
2
RV8
2.37K_0402_1%
DIS@RV8
2.37K_0402_1%
DIS@
12
CV19
1U_0402_6.3V6K
DIS@CV19
1U_0402_6.3V6K
DIS@
1
2
CV23
1U_0402_6.3V6K
DIS@CV23
1U_0402_6.3V6K
DIS@
1
2
CV12
1U_0402_6.3V6K
DIS@
CV12
1U_0402_6.3V6K
DIS@
1
2
CV293
1U_0402_6.3V6K
DIS@
CV293
1U_0402_6.3V6K
DIS@
1
2
CV285
0.1U_0402_10V7K
DIS@CV285
0.1U_0402_10V7K
DIS@
1
2
170-BALL
SGRAM GDDR5
MF=0 MF=1 MF=0MF=1
UV8
K4G20325FC-HC05_FBGA170~D
DIS@
170-BALL
SGRAM GDDR5
MF=0 MF=1 MF=0MF=1
UV8
K4G20325FC-HC05_FBGA170~D
DIS@
WE# CS#
L12
CS# WE#
G12
CAS# RAS#
L3
RAS# CAS#
G3
CKE#
J3
CK
J12
CK#
J11
VPP/NC
U5
EDC0 EDC3
C2
EDC1 EDC2
C13
DQ24 DQ0 A4
DQ25 DQ1 A2
DQ26 DQ2 B4
DQ27 DQ3 B2
DQ28 DQ4 E4
DQ29 DQ5 E2
DQ30 DQ6 F4
DQ31 DQ7 F2
VSSQ E1
VSS
T10
VSS
L10
VSS
P10
VREFD
A10
VDD
D11 VDD
R10
VDDQ B1
VDDQ D1
VDDQ F1
VDDQ M1
VREFD
U10
VDDQ T1
ZQ
J13
RESET#
J2
WCK01 WCK23
D4
WCK23# WCK01#
P5
WCK23 WCK01
P4
VSSQ A1
VSSQ C1
VSSQ N1
VSSQ R1
WCK01# WCK23#
D5
VSSQ U1
VPP/NC
A5
VDDQ G2
VSSQ H2
VSSQ K2
VDDQ L2
VDDQ B3
VSSQ A3
VSS
G10
VDD
C10
ABI#
J4
VDD
R5
VSS
D10
VDD
C5
DQ17 DQ9 A13
DQ18 DQ10 B11
DQ19 DQ11 B13
DQ20 DQ12 E11
DQ21 DQ13 E13
DQ22 DQ14 F11
DQ23 DQ15 F13
DQ16 DQ8 A11
EDC2 EDC1
R13
BA2/A4 BA0/A2
K11
VDD
L4 VDD
G4 VDD
L1 VDD
G1
VSS
B10 VSS
T5 VSS
L5 VSS
G5 VSS
B5 VSS
K1 VSS
H1
VDDQ P1
BA3/A3 BA1/A5
H10
BA0/A2 BA2/A4
H11
BA1/A5 BA3/A3
K10
VDDQ D3
VDDQ F3
VDDQ H3
VDDQ K3
VDDQ M3
VDDQ P3
VDDQ T3
VDDQ E5
VDDQ N5
VDDQ E10
VDDQ N10
VDDQ B12
VDDQ D12
VDDQ F12
VDDQ H12
VDDQ K12
VDDQ M12
VDDQ P12
VDDQ T12
VDDQ G13
VDDQ L13
VDDQ B14
VDDQ D14
VDDQ F14
VDDQ M14
VDDQ P14
VSSQ C3
VSSQ E3
VSSQ N3
VSSQ R3
VSSQ U3
VSSQ C4
VSSQ R4
VSSQ F5
VSSQ M5
VSSQ F10
VSSQ M10
VSSQ C11
VSSQ R11
VSSQ A12
VSSQ C12
VSSQ E12
VSSQ N12
VSSQ R12
VSSQ U12
VSSQ H13
VSSQ K13
VSSQ A14
VSSQ C14
VSSQ E14
VSSQ N14
VSSQ R14
VSSQ U14
VDDQ T14
VDD
G11
VDD
L11
VDD
P11
VDD
G14
VDD
L14
VSS
H14
VSS
K14
DQ8 DQ16 U11
DQ9 DQ17 U13
DQ10 DQ18 T11
DQ11 DQ19 T13
DQ12 DQ20 N11
DQ13 DQ21 N13
DQ14 DQ22 M11
DQ15 DQ23 M13
DQ0 DQ24 U4
DQ1 DQ25 U2
DQ2 DQ26 T4
DQ3 DQ27 T2
DQ4 DQ28 N4
DQ5 DQ29 N2
DQ6 DQ30 M4
DQ7 DQ31 M2
EDC3 EDC0
R2
DBI0# DBI3#
D2
DBI1# DBI2#
D13
DBI2# DBI1#
P13
DBI3# DBI0#
P2
VREFC
J14
SEN
J10 MF
J1
A8/A7 A10/A0
K4
A9/A1 A11/A6
H5
A10/A0 A8/A7
H4
A11/A6 A9/A1
K5
A12/RFU/NC
J5
CV26
1U_0402_6.3V6K
DIS@CV26
1U_0402_6.3V6K
DIS@
1
2
CV21
1U_0402_6.3V6K
DIS@CV21
1U_0402_6.3V6K
DIS@
1
2
RV162
121_0402_1%
DIS@ RV162
121_0402_1%
DIS@
1 2
RV7
5.49K_0402_1%
DIS@RV7
5.49K_0402_1%
DIS@
12
CV18
1U_0402_6.3V6K
DIS@CV18
1U_0402_6.3V6K
DIS@
1
2
CV294
1U_0402_6.3V6K
DIS@
CV294
1U_0402_6.3V6K
DIS@
1
2
RV6
2.37K_0402_1%
DIS@RV6
2.37K_0402_1%
DIS@
12
CV20
1U_0402_6.3V6K
DIS@CV20
1U_0402_6.3V6K
DIS@
1
2
RV11
5.49K_0402_1%
DIS@RV11
5.49K_0402_1%
DIS@
12
170-BALL
SGRAM GDDR5
MF=0 MF=1 MF=0MF=1
UV7
K4G20325FC-HC05_FBGA170~D
DIS@
170-BALL
SGRAM GDDR5
MF=0 MF=1 MF=0MF=1
UV7
K4G20325FC-HC05_FBGA170~D
DIS@
WE# CS#
L12
CS# WE#
G12
CAS# RAS#
L3
RAS# CAS#
G3
CKE#
J3
CK
J12
CK#
J11
VPP/NC
U5
EDC0 EDC3
C2
EDC1 EDC2
C13
DQ24 DQ0 A4
DQ25 DQ1 A2
DQ26 DQ2 B4
DQ27 DQ3 B2
DQ28 DQ4 E4
DQ29 DQ5 E2
DQ30 DQ6 F4
DQ31 DQ7 F2
VSSQ E1
VSS
T10
VSS
L10
VSS
P10
VREFD
A10
VDD
D11 VDD
R10
VDDQ B1
VDDQ D1
VDDQ F1
VDDQ M1
VREFD
U10
VDDQ T1
ZQ
J13
RESET#
J2
WCK01 WCK23
D4
WCK23# WCK01#
P5
WCK23 WCK01
P4
VSSQ A1
VSSQ C1
VSSQ N1
VSSQ R1
WCK01# WCK23#
D5
VSSQ U1
VPP/NC
A5
VDDQ G2
VSSQ H2
VSSQ K2
VDDQ L2
VDDQ B3
VSSQ A3
VSS
G10
VDD
C10
ABI#
J4
VDD
R5
VSS
D10
VDD
C5
DQ17 DQ9 A13
DQ18 DQ10 B11
DQ19 DQ11 B13
DQ20 DQ12 E11
DQ21 DQ13 E13
DQ22 DQ14 F11
DQ23 DQ15 F13
DQ16 DQ8 A11
EDC2 EDC1
R13
BA2/A4 BA0/A2
K11
VDD
L4 VDD
G4 VDD
L1 VDD
G1
VSS
B10 VSS
T5 VSS
L5 VSS
G5 VSS
B5 VSS
K1 VSS
H1
VDDQ P1
BA3/A3 BA1/A5
H10
BA0/A2 BA2/A4
H11
BA1/A5 BA3/A3
K10
VDDQ D3
VDDQ F3
VDDQ H3
VDDQ K3
VDDQ M3
VDDQ P3
VDDQ T3
VDDQ E5
VDDQ N5
VDDQ E10
VDDQ N10
VDDQ B12
VDDQ D12
VDDQ F12
VDDQ H12
VDDQ K12
VDDQ M12
VDDQ P12
VDDQ T12
VDDQ G13
VDDQ L13
VDDQ B14
VDDQ D14
VDDQ F14
VDDQ M14
VDDQ P14
VSSQ C3
VSSQ E3
VSSQ N3
VSSQ R3
VSSQ U3
VSSQ C4
VSSQ R4
VSSQ F5
VSSQ M5
VSSQ F10
VSSQ M10
VSSQ C11
VSSQ R11
VSSQ A12
VSSQ C12
VSSQ E12
VSSQ N12
VSSQ R12
VSSQ U12
VSSQ H13
VSSQ K13
VSSQ A14
VSSQ C14
VSSQ E14
VSSQ N14
VSSQ R14
VSSQ U14
VDDQ T14
VDD
G11
VDD
L11
VDD
P11
VDD
G14
VDD
L14
VSS
H14
VSS
K14
DQ8 DQ16 U11
DQ9 DQ17 U13
DQ10 DQ18 T11
DQ11 DQ19 T13
DQ12 DQ20 N11
DQ13 DQ21 N13
DQ14 DQ22 M11
DQ15 DQ23 M13
DQ0 DQ24 U4
DQ1 DQ25 U2
DQ2 DQ26 T4
DQ3 DQ27 T2
DQ4 DQ28 N4
DQ5 DQ29 N2
DQ6 DQ30 M4
DQ7 DQ31 M2
EDC3 EDC0
R2
DBI0# DBI3#
D2
DBI1# DBI2#
D13
DBI2# DBI1#
P13
DBI3# DBI0#
P2
VREFC
J14
SEN
J10 MF
J1
A8/A7 A10/A0
K4
A9/A1 A11/A6
H5
A10/A0 A8/A7
H4
A11/A6 A9/A1
K5
A12/RFU/NC
J5
CV290
1U_0402_6.3V6K
DIS@
CV290
1U_0402_6.3V6K
DIS@
1
2
CV287
0.1U_0402_10V7K
DIS@CV287
0.1U_0402_10V7K
DIS@
1
2
CV28
1U_0402_6.3V6K
DIS@CV28
1U_0402_6.3V6K
DIS@
1
2
CV22
1U_0402_6.3V6K
DIS@CV22
1U_0402_6.3V6K
DIS@
1
2
CV295
1U_0402_6.3V6K
DIS@
CV295
1U_0402_6.3V6K
DIS@
1
2
CV284
0.1U_0402_10V7K
DIS@CV284
0.1U_0402_10V7K
DIS@
1
2
RV10
2.37K_0402_1%
DIS@RV10
2.37K_0402_1%
DIS@
12
CV286
0.1U_0402_10V7K
DIS@CV286
0.1U_0402_10V7K
DIS@
1
2
CV281
0.1U_0402_10V7K
DIS@CV281
0.1U_0402_10V7K
DIS@
1
2
RV12
2.37K_0402_1%
DIS@RV12
2.37K_0402_1%
DIS@
12
CV288
0.1U_0402_10V7K
DIS@CV288
0.1U_0402_10V7K
DIS@
1
2
CV280
1U_0402_6.3V6K
DIS@
CV280
1U_0402_6.3V6K
DIS@
1
2
CV27
1U_0402_6.3V6K
DIS@CV27
1U_0402_6.3V6K
DIS@
1
2
CV4
10U_0603_6.3V6M
DIS@CV4
10U_0603_6.3V6M
DIS@
1
2
CV13
1U_0402_6.3V6K
DIS@CV13
1U_0402_6.3V6K
DIS@
1
2
CV297
0.1U_0402_10V7K
DIS@CV297
0.1U_0402_10V7K
DIS@
1
2
RV1
2.37K_0402_1%
DIS@RV1
2.37K_0402_1%
DIS@
12
CV24
1U_0402_6.3V6K
DIS@CV24
1U_0402_6.3V6K
DIS@
1
2

A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
DELL CONFIDENTIAL/PROPRIETARY
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
NORMAL
Memory Partition B - Upper 16 bits
MIRROR
B_0
B_3
B_1
B_2
RASB1#
CKEB1
DRAM_RST#
ADBIB1
CASB1#
CLKB1#
CLKB1
CSB1#_0
CKEB1
ADBIB1
CLKB1#
CLKB1
WEB1#
DRAM_RST#
MAB1_8
MAB1_5
MAB1_6
MAB1_7
MAB1_3
MAB1_0
MAB1_1
MAB1_2
MAB1_8
MAB1_4
WCKB1B_0
WCKB1_0
WCKB1B_1
WCKB1_1
CASB1#
RASB1#
VREFD7_1
VREFD7_2
VREFC7
VREFD7_2 VREFC7
MAB1_7
MAB1_6
MAB1_5
MAB1_4
MAB1_3
MAB1_2
MAB1_1
MAB1_0
CSB1#_0
WEB1#
VREFD8_1
VREFC8
VREFD8_2
VREFD8_2 VREFC8
DQB1_0
DQB1_1
DQB1_3
DQB1_2
DQB1_7
DQB1_4
DQB1_6
DQB1_5
DDBIB1_0
DDBIB1_3
EDCB1_0
EDCB1_3
DQB1_21
DQB1_23
DQB1_22
DQB1_20
DQB1_19
DQB1_17
DQB1_18
DQB1_16
EDCB1_2
EDCB1_1
DDBIB1_2
DDBIB1_1
WCKB1B_0
WCKB1_0
WCKB1B_1
WCKB1_1
DQB1_25
DQB1_31
DQB1_24
DQB1_27
DQB1_28
DQB1_29
DQB1_30
DQB1_26DQB1_11
DQB1_12
DQB1_14
DQB1_13
DQB1_15
DQB1_9
DQB1_10
DQB1_8
CLKB1#<53>
CLKB1<53>
CKEB1<53>
ADBIB1<53>
CASB1#<53>
WEB1#<53>
RASB1#<53>
CSB1#_0<53>
DRAM_RST#<53,54,55,56>
MAB1_8<53>
MAB1_0<53>
MAB1_1<53>
MAB1_3<53>
MAB1_2<53>
MAB1_5<53>
MAB1_4<53>
MAB1_6<53>
MAB1_7<53>
DQB1_6 <53>
DQB1_4 <53>
DQB1_0 <53>
DQB1_1 <53>
DQB1_5 <53>
DQB1_7 <53>
DQB1_2 <53>
DQB1_3 <53>
DDBIB1_0<53>
DDBIB1_3<53>
EDCB1_0<53>
EDCB1_3<53>
DQB1_18 <53>
DQB1_17 <53>
DQB1_23 <53>
DQB1_21 <53>
DQB1_16 <53>
DQB1_19 <53>
DQB1_20 <53>
DQB1_22 <53>
EDCB1_2<53>
EDCB1_1<53>
DDBIB1_2<53>
DDBIB1_1<53>
WCKB1_0<53>
WCKB1B_0<53>
WCKB1B_1<53>
WCKB1_1<53>
DQB1_25 <53>
DQB1_31 <53>
DQB1_24 <53>
DQB1_27 <53>
DQB1_28 <53>
DQB1_29 <53>
DQB1_30 <53>
DQB1_26 <53>DQB1_11 <53>
DQB1_12 <53>
DQB1_14 <53>
DQB1_13 <53>
DQB1_15 <53>
DQB1_9 <53>
DQB1_10 <53>
DQB1_8 <53>
+1.35V_MEM_GFX
+1.35V_MEM_GFX
+1.35V_MEM_GFX
+1.35V_MEM_GFX
+1.35V_MEM_GFX
+1.35V_MEM_GFX
+1.35V_MEM_GFX +1.35V_MEM_GFX
+1.35V_MEM_GFX
+1.35V_MEM_GFX +1.35V_MEM_GFX
+1.35V_MEM_GFX
+1.35V_MEM_GFX
+1.35V_MEM_GFX
+1.35V_MEM_GFX
Title
Size Document Number Rev
Date: Sheet of
LA-9984P
1.0
MARX-VRAM_B Upper_UV9,UV10
57 57Wednesday, May 22, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9984P
1.0
MARX-VRAM_B Upper_UV9,UV10
57 57Wednesday, May 22, 2013
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
LA-9984P
1.0
MARX-VRAM_B Upper_UV9,UV10
57 57Wednesday, May 22, 2013
Compal Electronics, Inc.
CV301
0.1U_0402_10V7K
DIS@CV301
0.1U_0402_10V7K
DIS@
1
2
CV313
1U_0402_6.3V6K
DIS@
CV313
1U_0402_6.3V6K
DIS@
1
2
CV318
0.1U_0402_10V7K
DIS@CV318
0.1U_0402_10V7K
DIS@
1
2
CV34
1U_0402_6.3V6K
DIS@CV34
1U_0402_6.3V6K
DIS@
1
2
RV16
2.37K_0402_1%
DIS@RV16
2.37K_0402_1%
DIS@
12
CV39
1U_0402_6.3V6K
DIS@CV39
1U_0402_6.3V6K
DIS@
1
2
CV38
1U_0402_6.3V6K
DIS@CV38
1U_0402_6.3V6K
DIS@
1
2
RV171 121_0402_1%DIS@RV171 121_0402_1%DIS@
1 2
CV315
0.1U_0402_10V7K
DIS@
CV315
0.1U_0402_10V7K
DIS@
1
2
CV392
1U_0402_6.3V6K
DIS@
CV392
1U_0402_6.3V6K
DIS@
1
2
CV37
1U_0402_6.3V6K
DIS@CV37
1U_0402_6.3V6K
DIS@
1
2
CV316
0.1U_0402_10V7K
DIS@
CV316
0.1U_0402_10V7K
DIS@
1
2
CV312
0.1U_0402_10V7K
DIS@
CV312
0.1U_0402_10V7K
DIS@
1
2
CV319
0.1U_0402_10V7K
DIS@CV319
0.1U_0402_10V7K
DIS@
1
2
RV20
5.49K_0402_1%
DIS@RV20
5.49K_0402_1%
DIS@
12
RV27
2.37K_0402_1%
DIS@RV27
2.37K_0402_1%
DIS@
12
CV299
1U_0402_6.3V6K
DIS@
CV299
1U_0402_6.3V6K
DIS@
1
2
170-BALL
SGRAM GDDR5
MF=0 MF=1 MF=0MF=1
UV9
K4G20325FC-HC05_FBGA170~D
DIS@
170-BALL
SGRAM GDDR5
MF=0 MF=1 MF=0MF=1
UV9
K4G20325FC-HC05_FBGA170~D
DIS@
WE# CS#
L12
CS# WE#
G12
CAS# RAS#
L3
RAS# CAS#
G3
CKE#
J3
CK
J12
CK#
J11
VPP/NC
U5
EDC0 EDC3
C2
EDC1 EDC2
C13
DQ24 DQ0 A4
DQ25 DQ1 A2
DQ26 DQ2 B4
DQ27 DQ3 B2
DQ28 DQ4 E4
DQ29 DQ5 E2
DQ30 DQ6 F4
DQ31 DQ7 F2
VSSQ E1
VSS
T10
VSS
L10
VSS
P10
VREFD
A10
VDD
D11 VDD
R10
VDDQ B1
VDDQ D1
VDDQ F1
VDDQ M1
VREFD
U10
VDDQ T1
ZQ
J13
RESET#
J2
WCK01 WCK23
D4
WCK23# WCK01#
P5
WCK23 WCK01
P4
VSSQ A1
VSSQ C1
VSSQ N1
VSSQ R1
WCK01# WCK23#
D5
VSSQ U1
VPP/NC
A5
VDDQ G2
VSSQ H2
VSSQ K2
VDDQ L2
VDDQ B3
VSSQ A3
VSS
G10
VDD
C10
ABI#
J4
VDD
R5
VSS
D10
VDD
C5
DQ17 DQ9 A13
DQ18 DQ10 B11
DQ19 DQ11 B13
DQ20 DQ12 E11
DQ21 DQ13 E13
DQ22 DQ14 F11
DQ23 DQ15 F13
DQ16 DQ8 A11
EDC2 EDC1
R13
BA2/A4 BA0/A2
K11
VDD
L4 VDD
G4 VDD
L1 VDD
G1
VSS
B10 VSS
T5 VSS
L5 VSS
G5 VSS
B5 VSS
K1 VSS
H1
VDDQ P1
BA3/A3 BA1/A5
H10
BA0/A2 BA2/A4
H11
BA1/A5 BA3/A3
K10
VDDQ D3
VDDQ F3
VDDQ H3
VDDQ K3
VDDQ M3
VDDQ P3
VDDQ T3
VDDQ E5
VDDQ N5
VDDQ E10
VDDQ N10
VDDQ B12
VDDQ D12
VDDQ F12
VDDQ H12
VDDQ K12
VDDQ M12
VDDQ P12
VDDQ T12
VDDQ G13
VDDQ L13
VDDQ B14
VDDQ D14
VDDQ F14
VDDQ M14
VDDQ P14
VSSQ C3
VSSQ E3
VSSQ N3
VSSQ R3
VSSQ U3
VSSQ C4
VSSQ R4
VSSQ F5
VSSQ M5
VSSQ F10
VSSQ M10
VSSQ C11
VSSQ R11
VSSQ A12
VSSQ C12
VSSQ E12
VSSQ N12
VSSQ R12
VSSQ U12
VSSQ H13
VSSQ K13
VSSQ A14
VSSQ C14
VSSQ E14
VSSQ N14
VSSQ R14
VSSQ U14
VDDQ T14
VDD
G11
VDD
L11
VDD
P11
VDD
G14
VDD
L14
VSS
H14
VSS
K14
DQ8 DQ16 U11
DQ9 DQ17 U13
DQ10 DQ18 T11
DQ11 DQ19 T13
DQ12 DQ20 N11
DQ13 DQ21 N13
DQ14 DQ22 M11
DQ15 DQ23 M13
DQ0 DQ24 U4
DQ1 DQ25 U2
DQ2 DQ26 T4
DQ3 DQ27 T2
DQ4 DQ28 N4
DQ5 DQ29 N2
DQ6 DQ30 M4
DQ7 DQ31 M2
EDC3 EDC0
R2
DBI0# DBI3#
D2
DBI1# DBI2#
D13
DBI2# DBI1#
P13
DBI3# DBI0#
P2
VREFC
J14
SEN
J10 MF
J1
A8/A7 A10/A0
K4
A9/A1 A11/A6
H5
A10/A0 A8/A7
H4
A11/A6 A9/A1
K5
A12/RFU/NC
J5
CV311
1U_0402_6.3V6K
DIS@
CV311
1U_0402_6.3V6K
DIS@
1
2
CV35
1U_0402_6.3V6K
DIS@CV35
1U_0402_6.3V6K
DIS@
1
2
RV23
2.37K_0402_1%
DIS@RV23
2.37K_0402_1%
DIS@
12
CV32
1U_0402_6.3V6K
DIS@CV32
1U_0402_6.3V6K
DIS@
1
2
CV29
1U_0402_6.3V6K
DIS@CV29
1U_0402_6.3V6K
DIS@
1
2
RV17
5.49K_0402_1%
DIS@RV17
5.49K_0402_1%
DIS@
12
CV7
10U_0603_6.3V6M
DIS@CV7
10U_0603_6.3V6M
DIS@
1
2
RV169 121_0402_1%DIS@ RV169 121_0402_1%DIS@
1 2
CV306
0.1U_0402_10V7K
DIS@
CV306
0.1U_0402_10V7K
DIS@
1
2
RV19
2.37K_0402_1%
DIS@RV19
2.37K_0402_1%
DIS@
12
CV304
1U_0402_6.3V6K
DIS@
CV304
1U_0402_6.3V6K
DIS@
1
2
RV13
5.49K_0402_1%
DIS@RV13
5.49K_0402_1%
DIS@
12
CV307
0.1U_0402_10V7K
DIS@CV307
0.1U_0402_10V7K
DIS@
1
2
CV36
1U_0402_6.3V6K
DIS@CV36
1U_0402_6.3V6K
DIS@
1
2
RV22
5.49K_0402_1%
DIS@RV22
5.49K_0402_1%
DIS@
12
RV24
5.49K_0402_1%
DIS@RV24
5.49K_0402_1%
DIS@
12
170-BALL
SGRAM GDDR5
MF=0 MF=1 MF=0MF=1
UV10
K4G20325FC-HC05_FBGA170~D
DIS@
170-BALL
SGRAM GDDR5
MF=0 MF=1 MF=0MF=1
UV10
K4G20325FC-HC05_FBGA170~D
DIS@
WE# CS#
L12
CS# WE#
G12
CAS# RAS#
L3
RAS# CAS#
G3
CKE#
J3
CK
J12
CK#
J11
VPP/NC
U5
EDC0 EDC3
C2
EDC1 EDC2
C13
DQ24 DQ0 A4
DQ25 DQ1 A2
DQ26 DQ2 B4
DQ27 DQ3 B2
DQ28 DQ4 E4
DQ29 DQ5 E2
DQ30 DQ6 F4
DQ31 DQ7 F2
VSSQ E1
VSS
T10
VSS
L10
VSS
P10
VREFD
A10
VDD
D11 VDD
R10
VDDQ B1
VDDQ D1
VDDQ F1
VDDQ M1
VREFD
U10
VDDQ T1
ZQ
J13
RESET#
J2
WCK01 WCK23
D4
WCK23# WCK01#
P5
WCK23 WCK01
P4
VSSQ A1
VSSQ C1
VSSQ N1
VSSQ R1
WCK01# WCK23#
D5
VSSQ U1
VPP/NC
A5
VDDQ G2
VSSQ H2
VSSQ K2
VDDQ L2
VDDQ B3
VSSQ A3
VSS
G10
VDD
C10
ABI#
J4
VDD
R5
VSS
D10
VDD
C5
DQ17 DQ9 A13
DQ18 DQ10 B11
DQ19 DQ11 B13
DQ20 DQ12 E11
DQ21 DQ13 E13
DQ22 DQ14 F11
DQ23 DQ15 F13
DQ16 DQ8 A11
EDC2 EDC1
R13
BA2/A4 BA0/A2
K11
VDD
L4 VDD
G4 VDD
L1 VDD
G1
VSS
B10 VSS
T5 VSS
L5 VSS
G5 VSS
B5 VSS
K1 VSS
H1
VDDQ P1
BA3/A3 BA1/A5
H10
BA0/A2 BA2/A4
H11
BA1/A5 BA3/A3
K10
VDDQ D3
VDDQ F3
VDDQ H3
VDDQ K3
VDDQ M3
VDDQ P3
VDDQ T3
VDDQ E5
VDDQ N5
VDDQ E10
VDDQ N10
VDDQ B12
VDDQ D12
VDDQ F12
VDDQ H12
VDDQ K12
VDDQ M12
VDDQ P12
VDDQ T12
VDDQ G13
VDDQ L13
VDDQ B14
VDDQ D14
VDDQ F14
VDDQ M14
VDDQ P14
VSSQ C3
VSSQ E3
VSSQ N3
VSSQ R3
VSSQ U3
VSSQ C4
VSSQ R4
VSSQ F5
VSSQ M5
VSSQ F10
VSSQ M10
VSSQ C11
VSSQ R11
VSSQ A12
VSSQ C12
VSSQ E12
VSSQ N12
VSSQ R12
VSSQ U12
VSSQ H13
VSSQ K13
VSSQ A14
VSSQ C14
VSSQ E14
VSSQ N14
VSSQ R14
VSSQ U14
VDDQ T14
VDD
G11
VDD
L11
VDD
P11
VDD
G14
VDD
L14
VSS
H14
VSS
K14
DQ8 DQ16 U11
DQ9 DQ17 U13
DQ10 DQ18 T11
DQ11 DQ19 T13
DQ12 DQ20 N11
DQ13 DQ21 N13
DQ14 DQ22 M11
DQ15 DQ23 M13
DQ0 DQ24 U4
DQ1 DQ25 U2
DQ2 DQ26 T4
DQ3 DQ27 T2
DQ4 DQ28 N4
DQ5 DQ29 N2
DQ6 DQ30 M4
DQ7 DQ31 M2
EDC3 EDC0
R2
DBI0# DBI3#
D2
DBI1# DBI2#
D13
DBI2# DBI1#
P13
DBI3# DBI0#
P2
VREFC
J14
SEN
J10 MF
J1
A8/A7 A10/A0
K4
A9/A1 A11/A6
H5
A10/A0 A8/A7
H4
A11/A6 A9/A1
K5
A12/RFU/NC
J5
RV21
2.37K_0402_1%
DIS@RV21
2.37K_0402_1%
DIS@
12
CV305
0.1U_0402_10V7K
DIS@CV305
0.1U_0402_10V7K
DIS@
1
2
CV31
1U_0402_6.3V6K
DIS@CV31
1U_0402_6.3V6K
DIS@
1
2
CV40
1U_0402_6.3V6K
DIS@CV40
1U_0402_6.3V6K
DIS@
1
2
CV308
0.1U_0402_10V7K
DIS@
CV308
0.1U_0402_10V7K
DIS@
1
2
CV298
1U_0402_6.3V6K
DIS@
CV298
1U_0402_6.3V6K
DIS@
1
2
CV302
1U_0402_6.3V6K
DIS@
CV302
1U_0402_6.3V6K
DIS@
1
2
CV33
1U_0402_6.3V6K
DIS@CV33
1U_0402_6.3V6K
DIS@
1
2
CV310
1U_0402_6.3V6K
DIS@
CV310
1U_0402_6.3V6K
DIS@
1
2
RV15
5.49K_0402_1%
DIS@RV15
5.49K_0402_1%
DIS@
12
RV14
2.37K_0402_1%
DIS@RV14
2.37K_0402_1%
DIS@
12
CV6
10U_0603_6.3V6M
DIS@CV6
10U_0603_6.3V6M
DIS@
1
2
CV391
0.1U_0402_10V7K
DIS@CV391
0.1U_0402_10V7K
DIS@
1
2
CV30
1U_0402_6.3V6K
DIS@CV30
1U_0402_6.3V6K
DIS@
1
2
CV303
0.1U_0402_10V7K
DIS@
CV303
0.1U_0402_10V7K
DIS@
1
2
