Compal LA A996P Schematics. Www.s Manuals.com. R4.0 Schematics

User Manual: Motherboard Compal LA-A996P ZSO51 - Schematics. Free.

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D

Compal Confidential
C

C

ULC AMD M/B LA-A996P DIS Schematics Document
AMD APU Beema/Kabini FT3 + ATI SUN LE + DDR3
Project Code : ZSO51
2014/02/08
PV Rev. 4.0
B

B

A

A

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2013/02/26

Deciphered Date

2015/07/08

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

COVER PAGE
Document Number

Rev
0.1

LA-A996P
Sheet

Monday, February 17, 2014
1

1

of

46

5

4

3

2

1

Compal Confidential
Model Name : AMD Beema/Kabini

Graphic
ATI SUN LE

PEGX4

VRAM X 4PCS
DDR3 1G

BGA 631-balls

page16~17

page11~15
D

D

204pin DDR3L-SO-DIMM
Display Port

Port 1

HDMI Conn.

Port 0

LVDS Conn.

page20

page19
VGA DAC

Memory BUS(DDR3) Single Channel

AMD
Beema/Kabini

BANK 0, 1, 2

page18

1.35V DDR3L
USB2.0

Port 0 / Port 9

Port 2

USB2.0
Conn. X2

Port 3

WLAN
BT Combo

page25

USB
Camera

page22

Port 5

Touch Screen

page25

page19

AMD FT3 APU

CRT Conn.
page21

Port 0, 1

Jaguar Core
USB3.0

Integrated Yangtze FCH

USB3.0
Conn.X1

Port 8

page18

BGA 769-balls

C

HD Audio(AZ)

C

PCIE

page5~10

GPP1

Card Reader
RTS5239
page24

GPP2

MINI Card
(WLAN/BT)
page22

GPP3

10/100
LAN Controller
RTL8166

page24

Port 0
SPI

LPC

Sub-borad
page25

page24

page30

Audio ALC3227

ODD
Conn.

page26

page23

ENE
KBC9012

FAN LDO
APE8873 page30
FAN Conn.

USB/B

SATA I

Port1

page23

BIOS (4MByte)
Share ROM

Transformer
RJ45

SATA III

HDD
Conn.

page28

Int.KBD

Int. Speaker
Conn. page26

Touch Pad
page29

Combo Jacks
page26

page29

page30
B

B

PWR BTN/B
page29

TP BTN/B

A

A

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2013/02/26

Deciphered Date

2015/07/08

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

BLOCK DIAGRAMS
Rev
0.1

LA-A996P

Date:

5

4

3

2

Monday, February 17, 2014
1

Sheet

2

of

46

5

4

3

2

1

RAM DDRIII SODIMMX2

AC ADAPTOR
19V 65W

B+

VIN

PU101
CHARGER
BQ24738RGRR

D

+1.35V

VDD_MEM 8A

+0.675VS

VTT_MEM 2A

AMD APU FT3 Kabini (25W)

+APU_CORE
PU901
ISL6277HRTZ-T

+0.5~+1.4V

VDDCR_CPU @ 21A(EDC)

+0.7~1.325V

VDDCR_NB @ 17A(EDC)

+1.35V

VDDIO_MEM_S @ 3A

+1.5VS

VDDIO_AZ_ALW @ 0.1A

+APU_CORE_NB

D

BATT+
+1.35V
BATTERY

PUM1
RT8207MZQW

+0.675VS

+1.5VS

PU1501 UMA@
SY8003DFC

CRT / HDMI
+5VS_DISP

+0.95VALW

+5VS
PU9501
RT8237EZQW

HDD x1
ODD x1
+5VS_HDD @ 1.1A
+5VS_ODD @ 2A

Audio
ALC259-VC2-CG

C

+5VDDA_CODEC
+5VS_PVDD
+3VDD_CODEC
+IOVDD_CODEC

+5VS

PU601
SY8033BDBC

+5VS
+3VS
+1.5VS

PU301
RT8243AZQW

+3VALW

U17
TPS22966DPUR

EC
+EC_VCC

+5VS

+3VLP
+3VALW
PU301
RT8243AZQW

LCD panel
14"

+5VALW

LAN/CR Combo
RTL8411-CG

VDD_095_GFX @ 0.6A

+1.8VS

VDD_18 @ 1.5A

+1.8VALW

VDD_18_ALW @ 0.5A

+3VALW

VDD_33_ALW @ 0.2A

+3VS

VDD_33 @ 0.2A

+1.5V_RTC

VDDBT_RTC_G @ 4.5uA

+INVPWR_B+
+LCDVDD @ 1.4A

+5VALW

+3VS_CMOS

Mini Card (WLAN)

+5VS_TS

RTC
Bettary

PU101
NCP698SQ15T1G

B+
+3VS

U4103
TPS22966DPUR

+3VS

U4102
MOS AOS4354

Touch Screen

+3VS
+1.5VS

+RTCBATT

+RTC_APU

HD Camera

+3VALW

+5VS

+3VS_VGA

+1.8VS_VGA

+3VS_WLAN @ 2A
+1.5VS

VDD_095 @ 5A

C

+3VS

+USB_VCCB

+3V_LAN @ 1A

U3
TPS22966DPUR

+0.95VS

VDD_095_ALW @ 0.5A

+1.8VS

USB2.0 x2
USB3.0 x1
+USB3_VCCA

+0.95VS

+1.8VALW

FAN
+VCC_FAN

+0.95VALW

VDD_095_USB3_Dual @ 1A

+5VS

PUV1
ISL62881C

+VGA_CORE

PUW1 DIS@
SY8208DQNC

+1.5VS

+0.95_VGA

+3VS_VGA

VDD33 @ 25mA

+1.8VS_VGA VDD18 @ 311mA
+0.95_VGA

VDD95 @ 4A

+VGA_CORE VDDC @ 20A

B

B

U4101
MOS AOS4354

+1.5VS_VGA

+1.5_VGA

MEMVDD @ 4A

A

A

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2013/01/04

Deciphered Date

2015/01/04

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

POWER MAP
Document Number

Rev
0.1

LA-A996P
Sheet

Monday, February 17, 2014
1

3

of

46

A

B

C

D

E

H@

DAX

ZZZ

PCB

HDMI

UAPU1 E1R1@

UAPU1 E1R3@

E1-2100

E1-2100

UAPU1 A4R1@

UAPU1 A4R3@

A4-5000

A4-5000

UAPU1 E2R1@

UAPU1 E2R3@

E2-3800

E2-3800

Voltage Rails
Power Plane

1

Description

S0

S3

S5

VIN

Adapter power supply (19V)

ON

ON

ON

B+

AC or battery power rail for power circuit.

ON

ON

ON

+APU_CORE

Core voltage for APU

ON

OFF

OFF

+APU_CORE_NB

Voltage for On-die VGA of APU

ON

OFF

OFF

+0.95VALW

0.95V always on power rail

ON

OFF

OFF

+0.95VS

0.95V switched power rail

ON

OFF

OFF

+1.8VALW

1.8V always on power rail

ON

ON

ON*

+1.8VS

1.8V switched power rail

ON

OFF

OFF

+1.5V

1.5V power rail for APU and DDR

ON

ON

OFF

+1.5VS

1.5V switched power rail

ON

OFF

OFF

+0.75VS

0.75V switched power rail for DDR terminator

ON

OFF

OFF

+3VALW

3.3V always on power rail

ON

ON

OFF

+3VS

3.3V switched power rail

ON

OFF

OFF

+5VALW

5V always on power rail

ON

ON

ON

+5VS

5V switched power rail

ON

OFF

OFF

+RTC_APU

RTC power

SIGNAL

+VALW

+V

+VS

Clock

Full ON

HIGH

HIGH

ON

ON

ON

ON

S1(Power On Suspend)

HIGH

HIGH

ON

ON

ON

LOW

S3 (Suspend to RAM)

HIGH

HIGH

ON

ON

OFF

OFF

STATE

SLP_S3# SLP_S5#

S4 (Suspend to Disk)

LOW

HIGH

ON

OFF

OFF

OFF

S5 (Soft OFF)

LOW

LOW

ON

OFF

OFF

OFF

UAPU1 BA4@

UAPU1 R36410@

UAPU1 R16410@

A4-6300

A8-6410 15W

A8-6410 15W

UAPU1 BE2@

UAPU1 R36210@

UAPU1 R16210@

E2-6200

A4-6210 R3 15W

A4-6210 R1 15W

UAPU1 BE1@

UAPU1 R36110@

UAPU1 R16110@

Part Number = DAZ14D00203
PCB LA-A996P REV4.0 M/B

Part Number = RO0000003HM
PCB 102 LA-A996P REV0 M/B 2

1

Part Number = SA00006QX10
S IC A32 KABINI EM2100ICJ23HM 1G BGA769P

Part Number = SA00006R410
S IC A4 SERIES AT1250IDJ23HM 1G BGA 769P
Part Number = SA00007OP20
S IC A32 A4-6300 AM6300ITJ44JB

Part Number = SA00007TQ20
AM6410ITJ44JB

Part Number = SA00007OQ20
S IC A32 E2-6200 EM6200ITJ44JB 1.5G BGA

Part Number = SA00007RA60
AM6210ITJ44JB

Part Number = SA00007TQ10
AM6410ITJ44JB

Part Number = SA00007BX20
S IC A32 KABINI EM2100ICJ23HM 1G BGA769P

Part Number = SA00006QX60
S IC A32 KABINI EM2100ICJ23HM 1G BGA769P

Part Number = SA00006R460
S IC A4 SERIES AT1250IDJ23HM 1G BGA 769P

Part Number = SA00007BX60
S IC A32 KABINI EM2100ICJ23HM 1G BGA769P

Part Number = SA00007RA40
AM6210ITJ44JB

UAPU1 A6R1@

2

2

E1-6050

Part Number = SA00007IQ50
S IC A32 E1-6050 ZM1332M2J2370 1.35G BGA

E2-6110 R2 15W

E2-6110 R2 15W

UAPU1 R36010@

UAPU1 R16010@

E1-6010 R2 10

E1-6010 R2 10

Part Number = SA00007RB60
EM6110ITJ44JB

Part Number = SA00007RC60
EM6010IUJ23JB

SMBus List
EC SMBus Port1 (+3VALW) EC SMBus Port2 (+3VS)

BOM Structure Table

Device

Address

HEX

Device

Address

HEX

Smart Battery

0001 011X b

16H

SB-TSI (APU)

1001 100X b

98H

3

APU SMBus Port0 (+3VS)

APU SMBus Port1(+3VALW)

Device

Device

DDR DIMM2
DDR DIMM1

Address
1010 000Xb
1010 001Xb

HEX

Address

HEX

A0H
A2H

Mini Card (DNI)

BOM Structure
@
CONN@
EMI@
@EMI@
ESD@
@ESD@
PX@
8166@
8151@
UMA@
display@
EDP@
KLVDS@
BLVDS@
Kabini@
Beema@
LVDS@

A6-5200

Part Number = SA00006R350
S IC KABINI AM5200IAJ44HM 2G BGA769P APU

Part Number = SA00007RB40
EM6110ITJ44JB

Part Number = SA00007RC40
EM6010IUJ23JB

APU POWER SEQUENCE

BTO Item
Unpop
Connector Part Control by ME
EMI pop component

G-A

EC_ON

G-B

EMI unpop component

+RTC

+3VALW/+5VALW
3

ESD pop component

+1.8VALW

ESD Unpop component

+0.95VALW

GPU SUN LE Componet

SYSON

10/100 LAN

G-C

Giga LAN

+1.5V
SUSP#

UMA Componet

G-D

display Componet

+3VS
+1.8VS

EDP Componet

+1.5VS

Kabini LVDS Componet

+0.95VS

Beema LVDS Componet

VR_ON

Kabini Componet

G-E

Beema Componet

+APU_CORE
+APU_CORE_NB

LVDS Componet
re check

4

4

2013/02/26

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2015/07/08

Deciphered Date

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

A

B

C

D

NOTES LIST
Document Number

Rev
0.1

LA-A996P
Sheet

Wednesday, March 26, 2014
E

4

of

46

5

4

18

3

A6@
UAPU1A

DDRAB_SMA[15..0]

DDRAB_SDQ[63..0]

2

1

18

MEMORY

DDRAB_SMA0 AG38
DDRAB_SMA1 W35
DDRAB_SMA2 W38
DDRAB_SMA3 W34
DDRAB_SMA4 U38
DDRAB_SMA5 U37
DDRAB_SMA6 U34
DDRAB_SMA7 R35
DDRAB_SMA8 R38
DDRAB_SMA9 N38
DDRAB_SMA10 AG34
DDRAB_SMA11 R34
DDRAB_SMA12 N37
DDRAB_SMA13 AN34
DDRAB_SMA14 L38
DDRAB_SMA15 L35

D

18 DDRAB_SBS0#
18 DDRAB_SBS1#
18 DDRAB_SBS2#
18 DDRAB_SDM[7..0]

T1

C

18

18 MEM_MAB_RST#
MEM_MAB_EVENT#

18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18

DDRAB_SDQS0
DDRAB_SDQS0#
DDRAB_SDQS1
DDRAB_SDQS1#
DDRAB_SDQS2
DDRAB_SDQS2#
DDRAB_SDQS3
DDRAB_SDQS3#
DDRAB_SDQS4
DDRAB_SDQS4#
DDRAB_SDQS5
DDRAB_SDQS5#
DDRAB_SDQS6
DDRAB_SDQS6#
DDRAB_SDQS7
DDRAB_SDQS7#

18
18
18
18

DDRA_CLK0
DDRA_CLK0#
DDRA_CLK1
DDRA_CLK1#

AJ38 M_BANK0
AG35 M_BANK1
N34 M_BANK2
DDRAB_SDM0
DDRAB_SDM1
DDRAB_SDM2
DDRAB_SDM3
DDRAB_SDM4
DDRAB_SDM5
DDRAB_SDM6
DDRAB_SDM7
DDRA_SDM8

DDRA_CKE0
DDRA_CKE1

18
18

DDRA_ODT0
DDRA_ODT1

18
18

DDRA_SCS0#
DDRA_SCS1#

18
18
18

DDRAB_SRAS#
DDRAB_SCAS#
DDRAB_SWE#

B32
B38
G40
N41
AG40
AN41
AY40
AY34
Y40

M_DM0
M_DM1
M_DM2
M_DM3
M_DM4
M_DM5
M_DM6
M_DM7
M_DM8

B33
A33
B40
A40
H41
H40
P41
P40
AH41
AH40
AP41
AP40
BA40
AY41
AY33
BA34
AA40
Y41

M_DQS_H0
M_DQS_L0
M_DQS_H1
M_DQS_L1
M_DQS_H2
M_DQS_L2
M_DQS_H3
M_DQS_L3
M_DQS_H4
M_DQS_L4
M_DQS_H5
M_DQS_L5
M_DQS_H6
M_DQS_L6
M_DQS_H7
M_DQS_L7
M_DQS_H8
M_DQS_L8

AC35
AC34
AA34
AA32
AE38
AE37
AA37
AA38

M_CLK_H0
M_CLK_L0
M_CLK_H1
M_CLK_L1
M_CLK_H2
M_CLK_L2
M_CLK_H3
M_CLK_L3

G38 M_RESET_L
AE34 M_EVENT_L

MEM_MAB_EVENT#
18
18

M_ADD0
M_ADD1
M_ADD2
M_ADD3
M_ADD4
M_ADD5
M_ADD6
M_ADD7
M_ADD8
M_ADD9
M_ADD10
M_ADD11
M_ADD12
M_ADD13
M_ADD14
M_ADD15

B

L34
J38
J37
J34

M0_CKE0
M0_CKE1
M1_CKE0
M1_CKE1

AN38
AU38
AN37
AR37

M0_ODT0
M0_ODT1
M1_ODT0
M1_ODT1

AJ34
AR38
AL38
AN35

M0_CS_L0
M0_CS_L1
M1_CS_L0
M1_CS_L1

AJ37 M_RAS_L
AL34 M_CAS_L
AL35 M_WE_L
AD40 M_VREF
AC38 M_VREFDQ

RC6
1K_0402_1%

1

2

2

CC7
0.1U_0402_10V6K

1

M_VREF
M_VREFDQ

M_DATA0
M_DATA1
M_DATA2
M_DATA3
M_DATA4
M_DATA5
M_DATA6
M_DATA7

B30
A32
B35
A36
B29
A30
A34
B34

DDRAB_SDQ0
DDRAB_SDQ1
DDRAB_SDQ2
DDRAB_SDQ3
DDRAB_SDQ4
DDRAB_SDQ5
DDRAB_SDQ6
DDRAB_SDQ7

M_DATA8
M_DATA9
M_DATA10
M_DATA11
M_DATA12
M_DATA13
M_DATA14
M_DATA15

B37
A38
D40
D41
B36
A37
B41
C40

DDRAB_SDQ8
DDRAB_SDQ9
DDRAB_SDQ10
DDRAB_SDQ11
DDRAB_SDQ12
DDRAB_SDQ13
DDRAB_SDQ14
DDRAB_SDQ15

M_DATA16
M_DATA17
M_DATA18
M_DATA19
M_DATA20
M_DATA21
M_DATA22
M_DATA23

F40
F41
K40
K41
E40
E41
J40
J41

DDRAB_SDQ16
DDRAB_SDQ17
DDRAB_SDQ18
DDRAB_SDQ19
DDRAB_SDQ20
DDRAB_SDQ21
DDRAB_SDQ22
DDRAB_SDQ23

M_DATA24
M_DATA25
M_DATA26
M_DATA27
M_DATA28
M_DATA29
M_DATA30
M_DATA31

M41
N40
T41
U40
L40
M40
R40
T40

DDRAB_SDQ24
DDRAB_SDQ25
DDRAB_SDQ26
DDRAB_SDQ27
DDRAB_SDQ28
DDRAB_SDQ29
DDRAB_SDQ30
DDRAB_SDQ31

M_DATA32
M_DATA33
M_DATA34
M_DATA35
M_DATA36
M_DATA37
M_DATA38
M_DATA39

AF40
AF41
AK40
AK41
AE40
AE41
AJ40
AJ41

DDRAB_SDQ32
DDRAB_SDQ33
DDRAB_SDQ34
DDRAB_SDQ35
DDRAB_SDQ36
DDRAB_SDQ37
DDRAB_SDQ38
DDRAB_SDQ39

M_DATA40
M_DATA41
M_DATA42
M_DATA43
M_DATA44
M_DATA45
M_DATA46
M_DATA47

AM41 DDRAB_SDQ40
AN40 DDRAB_SDQ41
AT41 DDRAB_SDQ42
AU40 DDRAB_SDQ43
AL40 DDRAB_SDQ44
AM40 DDRAB_SDQ45
AR40 DDRAB_SDQ46
AT40 DDRAB_SDQ47

M_DATA48
M_DATA49
M_DATA50
M_DATA51
M_DATA52
M_DATA53
M_DATA54
M_DATA55

AV41 DDRAB_SDQ48
AW40 DDRAB_SDQ49
BA38 DDRAB_SDQ50
AY37 DDRAB_SDQ51
AU41 DDRAB_SDQ52
AV40 DDRAB_SDQ53
AY39 DDRAB_SDQ54
AY38 DDRAB_SDQ55

M_DATA56
M_DATA57
M_DATA58
M_DATA59
M_DATA60
M_DATA61
M_DATA62
M_DATA63

BA36
AY35
BA32
AY31
BA37
AY36
BA33
AY32

M_CHECK0
M_CHECK1
M_CHECK2
M_CHECK3
M_CHECK4
M_CHECK5
M_CHECK6
M_CHECK7

V41
W40
AB40
AC40
U41
V40
AA41
AB41

A6@
UAPU1B
PCIE

D

Follow CRB Use PCIE Port

Swap LAN and CR for layout 08/15

24
24

PCIE_ARX_DTX_P1
PCIE_ARX_DTX_N1

R5 P_GPP_RXP1
R4 P_GPP_RXN1

22
22

PCIE_ARX_DTX_P2
PCIE_ARX_DTX_N2

N5 P_GPP_RXP2
N4 P_GPP_RXN2

24
24

PCIE_ARX_DTX_P3
PCIE_ARX_DTX_N3

N10 P_GPP_RXP3
N8 P_GPP_RXN3

RC2

+0.95VS

R10 P_GPP_RXP0
R8 P_GPP_RXN0

1

2

P_TX_ZVDD

W8

P_GPP_TXP0 L2
P_GPP_TXN0 L1

Follow CRB Use PCIE Port

CR

P_GPP_TXP1 K2
P_GPP_TXN1 K1

PCIE_ATX_DRX_P1 CC31
PCIE_ATX_DRX_N1 CC41

2
2

.1U_0402_16V7K
.1U_0402_16V7K

WLAN

J2
P_GPP_TXP2
J1
P_GPP_TXN2

PCIE_ATX_DRX_P2 CC51
PCIE_ATX_DRX_N2 CC61

2
2

.1U_0402_16V7K
.1U_0402_16V7K

LAN

P_GPP_TXP3 H2
P_GPP_TXN3 H1

1
PCIE_ATX_DRX_P3 CC12
1
PCIE_ATX_DRX_N3 CC16

2
2

.1U_0402_16V7K
.1U_0402_16V7K

P_TX_ZVDD_095

P_RX_ZVDD_095

W7

P_RX_ZVDD 2 RC3

1.69K_0402_1%

VGA

1

PCIE_ATX_C_DRX_P1 24
PCIE_ATX_C_DRX_N1 24
PCIE_ATX_C_DRX_P2 22
PCIE_ATX_C_DRX_N2 22
PCIE_ATX_C_DRX_P3 24
PCIE_ATX_C_DRX_N3 24

+0.95VS

1K_0402_1%

11
11

PCIE_GTX_C_ARX_P0
PCIE_GTX_C_ARX_N0

L5 P_GFX_RXP0
L4 P_GFX_RXN0

P_GFX_TXP0 G2
P_GFX_TXN0 G1

PCIE_ATX_GRX_P0 C1 PX@
PCIE_ATX_GRX_N0 C2 PX@

1
1

2
2

0.1U_0402_16V7K
0.1U_0402_16V7K

11
11

PCIE_GTX_C_ARX_P1
PCIE_GTX_C_ARX_N1

J5 P_GFX_RXP1
J4 P_GFX_RXN1

P_GFX_TXP1 F2
P_GFX_TXN1 F1

PCIE_ATX_GRX_P1 C3 PX@
PCIE_ATX_GRX_N1 C4 PX@

1
1

2
2

0.1U_0402_16V7K
0.1U_0402_16V7K

11
11

PCIE_GTX_C_ARX_P2
PCIE_GTX_C_ARX_N2

G5 P_GFX_RXP2
G4 P_GFX_RXN2

P_GFX_TXP2 E2
P_GFX_TXN2 E1

PCIE_ATX_GRX_P2 C5 PX@
PCIE_ATX_GRX_N2 C6 PX@

1
1

2
2

0.1U_0402_16V7K
0.1U_0402_16V7K

11
11

PCIE_GTX_C_ARX_P3
PCIE_GTX_C_ARX_N3

D7 P_GFX_RXP3
E7 P_GFX_RXN3

P_GFX_TXP3 D2
P_GFX_TXN3 D1

PCIE_ATX_GRX_P3 C7 PX@
PCIE_ATX_GRX_N3 C8 PX@

1
1

2
2

0.1U_0402_16V7K
0.1U_0402_16V7K

PCIE_ATX_C_GRX_P0 11
PCIE_ATX_C_GRX_N0 11
PCIE_ATX_C_GRX_P1 11
PCIE_ATX_C_GRX_N1 11
PCIE_ATX_C_GRX_P2 11
PCIE_ATX_C_GRX_N2 11
PCIE_ATX_C_GRX_P3 11
PCIE_ATX_C_GRX_N3 11
C

FT3_BGA_769P-T_A39
Part Number = SA00006V710

DDRAB_SDQ56
DDRAB_SDQ57
DDRAB_SDQ58
DDRAB_SDQ59
DDRAB_SDQ60
DDRAB_SDQ61
DDRAB_SDQ62
DDRAB_SDQ63

B

RC5
M_ZVDDIO_MEM_S AD41

M_ZVDDIO

2

1

+1.35V_VDDQ

39.2_0402_1%
FT3_BGA_769P-T_A39
Part Number = SA00006V710

+1.35V_VDDQ
RPC1
8
7
6
5

0.1U_0402_25V6
CC8

1K_0804_8P4R_1%

A

M_VREF
MEM_MAB_EVENT#

1

2

1U_0402_6.3V6K
CC9

1
2
3
4

A

1

2

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2013/02/26

Deciphered Date

2015/07/08

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MEM & PCIE
Rev
0.1

LA-A996P

Date:

5

4

3

2

Monday, February 17, 2014
1

Sheet

5

of

46

5

4

3

2

1

CRT@
RPC12

A6@
UAPU1C

To HDMI

D

20
20

APU_DP1_TXP0
APU_DP1_TXN0

20
20

APU_DP1_TXP1
APU_DP1_TXN1

20
20

APU_DP1_TXP2
APU_DP1_TXN2

20
20

APU_DP1_TXP3
APU_DP1_TXN3

To LVDS

+1.8VS

RC30 1

2 0_0402_5%

@

APU_VDDIO

43

27
27

LVDS_TXP2
LVDS_TXN2

27
27

LVDS_TXP1
LVDS_TXN1

27
27

LVDS_TXP0
LVDS_TXN0

27
27

LVDS_CLKP
LVDS_CLKN

APU_DP1_TXP1A10 TDP1_TXP1
APU_DP1_TXN1B10 TDP1_TXN1
APU_DP1_TXP2A11 TDP1_TXP2
APU_DP1_TXN2B11 TDP1_TXN2

TDP1_AUXP
TDP1_AUXN

APU_DP1_TXP3A12 TDP1_TXP3
APU_DP1_TXN3B12 TDP1_TXN3

TDP1_HPD

RPC5
1
2
3
4

ALERT_L
PROCHOT#

12,28

SB-TSI 12,28

1K_0804_8P4R_5%

+1.8VS

43
43
43

SVI 2.0

DAC_BLUE

B22 SIC
B21 SID

EC_SMB_CK2
EC_SMB_DA2

EC_SMB_CK2
EC_SMB_DA2

APU_RST#_APU
APU_TEMPIN1

Kabini@
1
1

2
2

300_0402_5%
300_0402_5%

APU_RST#_APU
APU_PWRGD_L

2 0_0402_5%

RC22,23 CNG to 0ohm for FT3/FT3b Co lay Cloud
43

APU_PWRGD_L

RC23 1

APU_PWRGD_L
APU_TEMPIN2

2 0_0402_5%

PROCHOT#

1

APU_TEMPIN0
APU_TEMPIN1
APU_TEMPIN2

B20 APU_RST_L
A20 LDT_RST_L
B19 APU_PWROK
A19 LDT_PWROK

2

2

2

@
C194

1

2

@
C195

100P_0402_50V8J

1

1

@
C196

43

D29
D31
D35
D33
G27
B25
A25

TDI
TDO
TCK
TMS
TRST_L
DBRDY
DBREQ_L

APU_VDDNB_SEN
APU_VDD_SEN

D23
G23
E25
E23

VDDCR_NB_SENSE
VDDCR_CPU_SENSE
VDDIO_MEM_S_SENSE
VSS_SENSE

APU_VDD_RUN_FB_L

APU_VDD_RUN_FB_L

+0.95VALW

AV33 VDD_095_FB_H
AU33 VDD_095_FB_L

VDD_095_FB_H
VDD_095_FB_L

T13
T14

2

A22 PROCHOT_L
B18 ALERT_L

APU_TDI
APU_TDO
APU_TCK
APU_TMS
APU_TRST#
APU_DBRDY
APU_DBREQ#

T35
T15
T36
T37
T39
T38
T40

43 APU_VDDNB_SEN
43 APU_VDD_SEN
100P_0402_50V8J

C

2 0_0402_5%
2 0_0402_5%
2 0_0402_5%

100P_0402_50V8J

1
2
B
@ E
Q94

3

C

MMBT3904WH_SOT323-3

1
3

2
B
@ E
Q93

MMBT3904WH_SOT323-3

1
3

B

C

MMBT3904WH_SOT323-3

2
B
@ E
Q92

@
@
@

PROCHOT#
ALERT_L

1
CC11
150P_0402_50V8J

CC10
150P_0402_50V8J
RC26 1
RC27 1
RC29 1

A14DAC_R_GRN1
B15DAC_R_BLU 1

D19
D21

DAC_ZVSS

A16DAC_ZVSS
H27
H29
D25
A27
B27
A26
B26
B28
A28
B24
A24
AV35
AU35
E33

FREE_2 A29
GIO_TSTDTM0_SERIALCLK H21
H25
GIO_TSTDTM0_CLKINIT
USB_ATEST0
USB_ATEST1
M_ANALOGIN
M_ANALOGOUT
TMON_CAL

HDMI_EN/DP_STEREOSYNC

AJ10
AJ8
R32
N32
AP29

2 68NH_+-5%
CRT@
2 68NH_+-5%
CRT@
2 68NH_+-5%
CRT@

SHI0000JN00

DAC_RED

SHI0000JN00

DAC_GRN

SHI0000JN00

DAC_BLU

@
RPC7

HDMI

20

21

DAC_HSYNC
DAC_VSYNC

CRT

@
RPC3

21

@

2 0_0402_5%

RC49 1

@

2 0_0402_5%

1
2
3
4

APU_TEST7
APU_TEST8
PLLTEST0
PLLTEST1

21
21

DAC_DDC_CLK 21
DAC_DDC_DATA 21
1 RC17

8
7
6
5
1K_0804_8P4R_5%

21

DAC_GRN

8
7
6
5
1K_0804_8P4R_5%

2 499_0402_1%
T2
T3
T4

APU_TEST6
APU_TEST7
APU_TEST8
APU_TEST9
APU_TEST10
PLLTEST1
PLLTEST0
BYPASSCLK_H
BYPASSCLK_L

1 RC34
1 RC35

2 511_0402_1%
2 511_0402_1%

8
7
6
5
1K_0804_8P4R_5%

+1.8VS

T5
T6
T7
APU_TEMPIN0
GIO_TSTDTM0_SERIALCLK
GIO_TSTDTM0_CLKINIT

TMON_CAL

E21 DP_STEREOSYNC

+1.8VS

RC38 1
RC40 1

RC47 1

@
@

2 1K_0402_1%
2 1K_0402_1%

+1.8VS
APU_DBREQ#
DP_STEREOSYNC

T9
T10
T11
T12

RC42
RC43

1
1

RC39
RC41

1
1

@

2 1K_0402_1%
2 1K_0402_1%

@

2 1K_0402_1%
2 1K_0402_1%

RC45
0_0402_5%
1
2
@

C

+1.8VS

@
RPC6
1
2
3
4

APU_SVC
APU_SVD
APU_SVT

+3VS

2 1K_0402_1%
DAC_HSYNC

RC48 1

1
2
3
4

APU_TEST10
APU_TEST9
GIO_TSTDTM0_SERIALCLK
GIO_TSTDTM0_CLKINIT

To LVDS

19,27

DAC_RED

DAC_BLU

DAC_HSYNC
DAC_VSYNC

DAC_SCL
DAC_SDA

THERMDA
THERMDC
DIECRACKMON
BP0
BP1
BP2
BP3
PLLTEST1
PLLTEST0
BYPASSCLK_H
BYPASSCLK_L
PLLCHRZ_H
PLLCHRZ_L
M_TEST

Kabini@
36,43,9

EDP_HPD

B14DAC_R_RED 1

RC118

G31 SVT
D27 SVC
E29 SVD

APU_SVT
APU_SVC
APU_SVD

APU_SVT
APU_SVC
APU_SVD

150_0804_8P4R_1%

VDDIO level
Need Level shift

To HDMI

AUXP_DDC_CLK 27
AUXN_DDC_DATA 27

H17 EDP_HPD

G19
E19

20
20

DP1_HPD

RC104

DAC_HSYNC
DAC_VSYNC

8
7
6
5

D

DP1_AUXP
DP1_AUXN

H19 DP1_HPD

RC103

A7 LTDP0_TXP3
B7 LTDP0_TXN3

150_0402_1%
2K_0402_1%

D17 DP1_AUXP
E17 DP1_AUXN

LTDP0_HPD

DAC_GREEN

1
1

DP_ENBKL 28
DP_ENVDD 19
DP_INT_PWM 19,27

A5 LTDP0_TXP1
B5 LTDP0_TXN1

DAC_RED

RC22 1
RC25
RC28

2 RC10
2 RC11

LTDP0_AUXP D15 AUXP_DDC_CLK
LTDP0_AUXN E15 AUXN_DDC_DATA

K15 DISP_CLKIN_H
H15 DISP_CLKIN_L
8
7
6
5

B16DP_150_ZVSS
A21DP_2K_ZVSS
B17 DP_ENBKL
A17 DP_ENVDD
A18 DP_INT_PWM

A4 LTDP0_TXP0
B4 LTDP0_TXN0

A6 LTDP0_TXP2
B6 LTDP0_TXN2

+3VS

C

DP_150_ZVSS
DP_2K_ZVSS
DP_BLON
DP_DIGON
DP_VARY_BL

1
2
3
4

DAC_BLU
DAC_GRN
DAC_RED

DISPLAY/SVI2/JTAG/TEST

APU_DP1_TXP0 A9 TDP1_TXP0
APU_DP1_TXN0 B9 TDP1_TXN0

HDT Debug conn
B

FT3_BGA_769P-T_A39
Part Number = SA00006V710
APU_TEMPRETURN

Close to Header

8

+1.8VS
RPC4
APU_RST#_APU C189

@ESD@
2
1 100P_0402_50V8J

APU_PWRGD_L

2

C192

APU_TCK
APU_TMS
APU_TDI
APU_TRST#

1
2
3
4

8
7
6
5

1 100P_0402_50V8J
1K_0804_8P4R_5%

ESD@

Close to APU
DAC_RED
PROCHOT#
6

DAC_GRN
Q4A
2N7002KDW_SOT363-6

DAC_BLU
2

A

2
@EMI@ .1U_0402_16V7K
2
@EMI@ .1U_0402_16V7K
2
@EMI@ .1U_0402_16V7K
A

28,36

1

This power part.

H_PROCHOT#_EC

1
CC13
1
CC15
1
CC125

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2013/02/26

Deciphered Date

2015/07/08

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SATA_USB_LPC_SPI
Rev
0.1

LA-A996P

Date:

5

4

3

2

Monday, February 17, 2014
1

Sheet

6

of

46

5

4

3

2

1

4MB SPI ROM
& Non-share ROM.

A6@
UAPU1E
CLK/SATA/USB/SPI/LPC

23 SATA_ITX_C_DRX_P0
23 SATA_ITX_C_DRX_N0

HDD

23 SATA_PRX_DTX_N0
23 SATA_PRX_DTX_P0

ODD

SATA_PRX_DTX_N0
SATA_PRX_DTX_P0

BA16 SATA_RX0N
AY16 SATA_RX0P

2
2

+0.95VS

RC63 1
1
RC65

USB_ZVSS AG4 USB_RCOMP
USB_HSD0P AL4 USB20_P0
USB_HSD0N AL5 USB20_N0

SATA_LED#

BA30 SATA_ACT_L/GPIO67

BA12 SATA_X2
RC64 1
560_0402_5%

GPU

CC17

1

11
11

CLK_PEG_VGA U4 GFX_CLKP
CLK_PEG_VGA#U5 GFX_CLKN

CLK_PEG_VGA
CLK_PEG_VGA#

2

AC4 GPP_CLK2P
AC5 GPP_CLK2N

LAN

CLK_PCIE_LAN
CLK_PCIE_LAN#

AA5 GPP_CLK3P
AA4 GPP_CLK3N

28

28,31 SERIRQ
LPC_CLKRUN_L

STRAPS OF APU
LPC_FRAME#

CS#
SO/SIO1
WP#
GND

8
7
6
5

FCH_SPI_HOLD#
FCH_SPI_CLK
FCH_SPI_MOSI

W25Q64FVSSIG_SO8
SA00003K810

U2

Beema@

S IC FL 64M W25Q64FVSSIQ SOIC 8P SPI ROM
SA000039A30

FCH_SPI_CS1#
FCH_SPI_CS2#
FCH_SPI_WP#
FCH_SPI_HOLD#

D

2 1K_0402_1%
2 1K_0402_1%

1
2
3
4

8
7
6
5

10K_0804_8P4R_5%

Support Share ROM

+0.95V_DUAL
USB30_MTX_DRX_P0 25
USB30_MTX_DRX_N0 25

FCH_SPI_MOSI
FCH_SPI_CS1#

USB30_MRX_DTX_P0 25
USB30_MRX_DTX_N0 25

15_0804_8P4R_5%
4
5
3
6
2
7 EC_SPI_SI
1
8 EC_SPI_CS0#

EC_SPI_SI 28
EC_SPI_CS0# 28

RPH42
FCH_SPI_MISO

USB_SS_1RXP W1
USB_SS_1RXN W2
FCH_SPI_CLK

LAD0
LAD1
LAD2
LAD3
LFRAME_L
LDRQ0_L
SERIRQ/GPIO48
LPC_CLKRUN_L
LPC_PD_L/GEVENT5_L/SPI_TPM_CS_L

VCC
HOLD#
SCLK
SI/SIO0

+3VALW

USB_SS_1TXP R1
USB_SS_1TXN R2

2

2

SUS_STAT#

RC72 1
RC73 1

USB_SS_0RXP V2 USB30_MRX_DTX_P0
USB_SS_0RXN V1 USB30_MRX_DTX_N0

SPI_CLK/GPIO162
SPI_CS1_L/GPIO165
SPI_CS2_L/GPIO166
SPI_DO/GPIO163
SPI_DI/GPIO164
SPI_HOLD_L/GEVENT9_L
SPI_WP_L/GPIO161

CC14
1

RP12

USB_SS_0TXP T2 USB30_MTX_DRX_P0
USB_SS_0TXN T1 USB30_MTX_DRX_N0

N2 X48M_X1

AT2
AT1
AR2
AR1
AP2
AP1
AV29
SERIRQ
LPC_CLKRUN_L AP25
SUS_STAT# AV2
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#

Touch Screen

USB_SS_ZVSS AE10 USBSS_CALRN
USB_SS_ZVDD_095_USB3_DUAL AE8 USBSS_CALRP

RC76
1M_0402_1%

RC95 CNG to 0ohm 0903 SI

Front Camera

19
19

External USB conn.

CLK_PCIE_MINI1
CLK_PCIE_MINI1#

28,31 LPC_AD0
28,31 LPC_AD1
28,31 LPC_AD2
28,31 LPC_AD3
28,31 LPC_FRAME#

@ R1382
@R1382
4.7K_0402_5%

19
19

USB20_P5
USB20_N5

MB USB3.0 port0 (2.0)

24
24

1

+3VS

USB20_P4
USB20_N4

USB_HSD5P AE1 USB20_P5
USB_HSD5N AE2 USB20_N5

25
25

4
3
GND OUT
N1 X48M_X2
48M_X2
48MHZ_20PF_E3SB48.0000F20M22
Y1
SJ10000EK00
1
2 15P_0402_50V8J
CC18
2 0_0402_5%
AY2 LPCCLK0
LPC_CLK0_EC EMI@ 1 RC95
LPC_CLK0_R_EC
28 LPC_CLK0_EC
AW2 LPCCLK1
EMI@ 1 RC110 2 33_0402_5% LPC_CLK1_R
31 LPC_CLK1

C

USB_HSD4P AF1 USB20_P4
USB_HSD4N AF2 USB20_N4

USB20_P9
USB20_N9

22
22

48M_X1

Mini PCIe CONN

USB_HSD9P AA1 USB20_P9
USB_HSD9N AA2 USB20_N9

WLAN

1

22
22

25
25

AE4 GPP_CLK1P
AE5 GPP_CLK1N

IN

USB20_P3
USB20_N3

USB_HSD7P AC1
USB_HSD7N AC2

AP13 X14M_25M_48M_OSC

GND

USB_HSD3P AG1 USB20_P3
USB_HSD3N AG2 USB20_N3

USB20_P8
USB20_N8

CLK_PCIE_CR
CLK_PCIE_CR#

1
2
3
4

Check CS# PU R 1kor10k and pop/nopop
SCL v1.20 : If an SPI ROM is shared between
the FCH and the Embedded Controller
a 10-K pull-up resistor to +3.3V_S5 is installed.

USB_HSD8P AB1 USB20_P8
USB_HSD8N AB2 USB20_N8

24
24

+3VALW
0.1U_0402_25V6
2

U2 Kabini@
FCH_SPI_CS1#
FCH_SPI_MISO
FCH_SPI_WP#

External USB conn.

AC8 GPP_CLK0P
AC10 GPP_CLK0N

CR

2 15P_0402_50V8J

25
25

USB_HSD6P AD1
USB_HSD6N AD2

SATA_LED#

1

2

2 11.8K_0402_1%
USB20_P0
USB20_N0

USB_HSD2P AG7
USB_HSD2N AG8

AR19 SATA_ZVSS
AP19 SATA_ZVDD_095

AY12 SATA_X1

+3VS

RC60 1

USB_HSD1P AJ4
USB_HSD1N AJ5

AY17 SATA_RX1N
BA17 SATA_RX1P

1K_0402_1% SATA_CALRN
1K_0402_1% SATA_CALRP

SATA_LED#

USBCLK/14M_25M_48M_OSC W4

AY19 SATA_TX1P
BA19 SATA_TX1N

SATA_PRX_DTX_N1_C
SATA_PRX_DTX_P1_C

23 SATA_PRX_DTX_N1_C
23 SATA_PRX_DTX_P1_C

30

BA14 SATA_TX0P
AY14 SATA_TX0N

SATA_PTX_DRX_P1_C
SATA_PTX_DRX_N1_C

23 SATA_PTX_DRX_P1_C
23 SATA_PTX_DRX_N1_C

D

SATA_ITX_C_DRX_P0
SATA_ITX_C_DRX_N0

AU7 FCH_SPI_CLK_R
AW9 FCH_SPI_CS1#
AR4 FCH_SPI_CS2#
AR11 FCH_SPI_MOSI
AR7 FCH_SPI_MISO
AU11 FCH_SPI_HOLD#
AU9 FCH_SPI_WP#

RC77 1

EMI@ 2 0_0402_5%FCH_SPI_CLK

1
RC82

2 EC_SPI_SO
0_0402_5%

1 EMI@ 2
RC78
0_0402_5%
Close to ROM

EC_SPI_SO

EC_SPI_CLK

28
C

EC_SPI_CLK

28

RC78, RC82 CNG to 0ohm 0903 SI

FT3_BGA_769P-T_A39
Part Number = SA00006V710

LPC_CLK0_EC

LPC_CLK1

GEVENT2_L

RTC_CLK

H

SPI ROM
(DEFAULT)

BOOT FAIL TIMER
ENABLED

CLKGEN
ENABLE
(DEFAULT)

1.8V SPI ROM

NORMAL POWR
UP/RESET TIMING
(DEFAULT)

L

LPC ROM

BOOT FAIL TIMER
DISABLED
(DEFAULT)

CLKGEN
DISABLED

3.3V SPI ROM
(DEFAULT)

FAST POWER
UP/RESET TIMING
FOR SIMULATION

+3VALW
B

B

2 RC79
1 10K_0402_1% LPC_FRAME#
2 RC80 @1 10K_0402_1% LPC_CLK0_EC
2 RC81
1 10K_0402_1% LPC_CLK1

1 RC83 @2 2K_0402_5% LPC_FRAME#
1 RC84
2 2K_0402_5% LPC_CLK0_EC
1 RC85 @2 2K_0402_5% LPC_CLK1

A

A

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2013/02/26

Deciphered Date

2015/07/08

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

SATA_USB_LPC_SPI
Rev
0.1

LA-A996P

Date:

5

4

3

2

Monday, February 17, 2014
1

Sheet

7

of

46

5

4

3

2

1

10UX3
180PX1
1UX11

+CPU_CORE

6

+1.35V_VDDQ

APU_TEMPRETURN

+CPU_CORE

A6@
UAPU1F

A6@
UAPU1G

POWER

2

2

CC56
1U_0402_6.3V6K

2

1

CC55
1U_0402_6.3V6K

2

1

CC54
1U_0402_6.3V6K

1

CC53
1U_0402_6.3V6K

2

CC52
1U_0402_6.3V6K

2

1

1

2

10UX3
180PX4
0.1UX8

+1.35V_VDDQ

C

AL10 VDDIO_AZ_ALW_1
AL11 VDDIO_AZ_ALW_2

+APU_VDDIO_AZ
1

2

1

2

CC77
0.1U_0402_10V6K

2

CC75
0.1U_0402_10V6K

2

1

CC74
0.1U_0402_10V6K

2

1

CC73
0.1U_0402_10V6K

2

1

CC72
0.1U_0402_10V6K

2

1

CC71
0.1U_0402_10V6K

2

1

CC70
0.1U_0402_10V6K

2

1

CC69
0.1U_0402_10V6K

2

1

CC68
180P_0402_50V8J

2

1

CC67
180P_0402_50V8J

2

1

CC66
180P_0402_50V8J

2

1

CC65
180P_0402_50V8J

2

1

CC64
10U_0603_6.3V6M

1

CC63
10U_0603_6.3V6M

2

CC62
10U_0603_6.3V6M

1

+APU_VDD18_ALW

B1 VDD_18_ALW_1
B2 VDD_18_ALW_2

+APU_VDD33_ALW

AL13 VDD_33_ALW_1
AM13 VDD_33_ALW_2

+0.95V_DUAL

4.7UX1
180PX2
1UX6

+1.8VALW

+VDD_0.95_ALW
+APU_VDD18_ALW

+3VALW

+APU_VDD33_ALW

RC89
0_0603_5%
1
2
1

RC91
@

2

AR5
AU4
AV7
AW5

VDD_095_USB3_DUAL_1
VDD_095_USB3_DUAL_2
VDD_095_USB3_DUAL_3
VDD_095_USB3_DUAL_4

AE11
AE13
AJ11
AJ13

VDD_095_ALW_1
VDD_095_ALW_2
VDD_095_ALW_3
VDD_095_ALW_4

VDDCR_CPU_1
VDDCR_CPU_2
VDDCR_CPU_3
VDDCR_CPU_4
VDDCR_CPU_5
VDDCR_CPU_6
VDDCR_CPU_7
VDDCR_CPU_8
VDDCR_CPU_9
VDDCR_CPU_10
VDDCR_CPU_11
VDDCR_CPU_12
VDDCR_CPU_13
VDDCR_CPU_14
VDDCR_CPU_15
VDDCR_CPU_16
VDDCR_CPU_17
VDDCR_CPU_18
VDDCR_CPU_19
VDDCR_CPU_20
VDDCR_CPU_21
VDDCR_CPU_22
VDDCR_CPU_23
VDDCR_CPU_24
VDDCR_CPU_25
VDDCR_CPU_26

L21
L23
L25
L27
L29
N21
N23
N27
R21
R23
R27
U21
U23
U27
W21
W23
W27
AA21
AA23
AA27
AC21
AC23
AC27
AE21
AE23
AE27

VDDCR_NB_1
VDDCR_NB_2
VDDCR_NB_3
VDDCR_NB_4
VDDCR_NB_5
VDDCR_NB_6
VDDCR_NB_7
VDDCR_NB_8
VDDCR_NB_9
VDDCR_NB_10
VDDCR_NB_11
VDDCR_NB_12
VDDCR_NB_13
VDDCR_NB_14
VDDCR_NB_15
VDDCR_NB_16
VDDCR_NB_17
VDDCR_NB_18
VDDCR_NB_19
VDDCR_NB_20
VDDCR_NB_21

L13
L17
N11
N13
N17
R11
R13
R17
U13
U17
W13
W17
AA13
AA17
AC13
AC17
AE15
AE17
AE19
AG17
AG21

+CPU_CORE_NB

A2
A3
B3
C3

+APU_VDD_18

VDD_18_1
VDD_18_2
VDD_18_3
VDD_18_4

+APU_VDD_18

2

AG23
AG27
AJ21
AJ27
AL21
AL23
AL27
AM23
AM25

2
2 1U_0402_6.3V6K

CC37 1

2 1U_0402_6.3V6K

CC38 1

2 1U_0402_6.3V6K

CC40 1

2 1U_0402_6.3V6K

CC41 1

2 1U_0402_6.3V6K

CC42 1

2 180P_0402_50V8J

+APU_VDD_0.95

PX@
RC90
1

+1.5VS

@

2 0_0805_5%

CC57 1

2 4.7U_0603_6.3V6K

CC58 1

2 1U_0402_6.3V6K

CC59 1

2 1U_0402_6.3V6K

CC60 1

2 1U_0402_6.3V6K

CC61 1

2 180P_0402_50V8J

+0.95VS

2

2 0_0805_5%

CC76 1

2 10U_0603_6.3V6M

CC78 1

2 10U_0603_6.3V6M

CC79 1

2 1U_0402_6.3V6K

CC80 1

2 1U_0402_6.3V6K

CC81 1

2 1U_0402_6.3V6K

CC82 1

2 1U_0402_6.3V6K

CC83 1

2 1U_0402_6.3V6K

CC84 1

2 1U_0402_6.3V6K

CC85 1

2 180P_0402_50V8J

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62

GND

VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124

J3
J7
J8
J39
K11
K13
K17
K19
K21
K23
K25
K27
K29
K31
L3
L7
L8
L10
L11
L15
L19
L31
L39
L41
M1
M2
N3
N7
N15
N19
N25
N29
N31
N39
P1
P2
R3
R7
R15
R19
R25
R29
R39
R41
U1
U2
U3
U7
U8
U11
U15
U19
U25
U29
U31
U39
W3
W5
W11
W15
W19
W25

W29
W39
W41
Y1
Y2
AA3
AA7
AA8
AA11
AA15
AA19
AA25
AA29
AA39
AC3
AC7
AC11
AC15
AC19
AC25
AC29
AC31
AC39
AC41
AE3
AE7
AE25
AE29
AE32
AE39
AG3
AG5
AG10
AG11
AG13
AG15
AG19
AG25
AG29
AG31
AG39
AG41
AH1
AH2
AJ3
AJ7
AJ15
AJ17
AJ19
AJ23
AJ25
AJ29
AJ31
AJ32
AJ39
AL3
AL8
AL15
AL17
AL19
AL25
AL29

FT3_BGA_769P-T_A39
Part Number = SA00006V710

VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186

VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSSBG_DAC
VBURN
PSEN

AL39
AL41
AM11
AM27
AM31
AN3
AN7
AN39
AP31
AR3
AR13
AR17
AR21
AR25
AR29
AR39
AR41
AU1
AU2
AU3
AU15
AU19
AU23
AU27
AU39
AV9
AW3
AW7
AW13
AW15
AW17
AW19
AW21
AW23
AW25
AW27
AW31
AW33
AW35
AW37
AW39
AW41
AY13
AY15
AY18
AY30
BA2
BA7
BA13
BA15
BA18
BA21
BA25
BA31
BA35
BA39
A15
AL31
AM29

D

C

FT3_BGA_769P-T_A39
Part Number = SA00006V710

+APU_VDD_0.95

0_0805_5%

1

2

1

2

CC36 1

180PX1
10UX2
1UX6

+APU_VDD_33

CC100
0.22U_0402_6.3V6K

PX@
1

2

CC87
1U_0402_6.3V6K

1

2 1U_0402_6.3V6K

RC88 1

CC86
10U_0603_6.3V6M

2

CC98
1U_0402_6.3V6K

1

CC96
1

CC97
1U_0402_6.3V6K

2

CC35 1

+APU_VDD_0.95

PX@

2

2 1U_0402_6.3V6K

4.7UX1
180PX1
1UX3

FT3_BGA_769P-T_A39
Part Number = SA00006V710

4.7U_0603_6.3V6K

2

1

CC95
1U_0402_6.3V6K

2

1

CC94
1U_0402_6.3V6K

2

1

CC93
1U_0402_6.3V6K

2

1

CC92
1U_0402_6.3V6K

2

1

CC91
1U_0402_6.3V6K

1

CC90
1U_0402_6.3V6K

2

CC89
180P_0402_50V8J

CC88
180P_0402_50V8J

2
B

1

210U_0603_6.3V6M

CC22 1

RC87 1

0_0603_5%

1

CC34 1

+APU_VDDIO_AZ

VDD_095_GFX_1 U10APU_VDD_0.95_GFX
VDD_095_GFX_2 W10
VDD_095_GFX_3 AA10

AN4 VDDBT_RTC_G

2 0_0805_5%

@

RC24

VDD_33_1 AM15
VDD_33_2 AM17
VDD_095_1
VDD_095_2
VDD_095_3
VDD_095_4
VDD_095_5
VDD_095_6
VDD_095_7
VDD_095_8
VDD_095_9

+1.8VS

RC86
1

180PX1
10UX1
1UX7

A8
A13
A23
A31
A35
A39
B8
B13
B23
B31
B39
C1
C2
C5
C7
C9
C11
C13
C15
C17
C19
C21
C23
C25
C27
C29
C31
C33
C35
C37
C39
C41
D9
D11
D13
E3
E4
E9
E11
E13
E27
E31
E35
E38
E39
G3
G7
G11
G13
G15
G17
G21
G25
G29
G35
G37
G39
G41
H11
H13
H23
H31

0_0402_5%

2

1

A6@
UAPU1H
GND

VDDIO_MEM_S_1
VDDIO_MEM_S_2
VDDIO_MEM_S_3
VDDIO_MEM_S_4
VDDIO_MEM_S_5
VDDIO_MEM_S_6
VDDIO_MEM_S_7
VDDIO_MEM_S_8
VDDIO_MEM_S_9
VDDIO_MEM_S_10
VDDIO_MEM_S_11
VDDIO_MEM_S_12
VDDIO_MEM_S_13
VDDIO_MEM_S_14
VDDIO_MEM_S_15
VDDIO_MEM_S_16
VDDIO_MEM_S_17
VDDIO_MEM_S_18
VDDIO_MEM_S_19
VDDIO_MEM_S_20
VDDIO_MEM_S_21
VDDIO_MEM_S_22
VDDIO_MEM_S_23

1

1

CC33
1U_0402_6.3V6K

2

CC32
1U_0402_6.3V6K

2

1

CC31
1U_0402_6.3V6K

2

1

CC30
1U_0402_6.3V6K

1

CC29
1U_0402_6.3V6K

2

CC28
1U_0402_6.3V6K

2

1

CC51
1U_0402_6.3V6K

2

1

CC50
1U_0402_6.3V6K

2

1

CC49
1U_0402_6.3V6K

2

1

CC48
1U_0402_6.3V6K

2

1

CC47
180P_0402_50V8J

2

1

CC46
10U_0603_6.3V6M

1

CC45
10U_0603_6.3V6M

2

CC44
10U_0603_6.3V6M

CC43
10U_0603_6.3V6M

2

1

2

1

10UX4
180PX1
1UX9

+CPU_CORE_NB

1

2

1

CC27
1U_0402_6.3V6K

2

1

CC21
1U_0402_6.3V6K

2

1

CC39
1U_0402_6.3V6K

2

1

CC26
1U_0402_6.3V6K

2

1

CC25
1U_0402_6.3V6K

2

1

CC24
180P_0402_50V8J

2

1

CC23
10U_0603_6.3V6M

1

CC20
10U_0603_6.3V6M

2
D

CC19
10U_0603_6.3V6M

1

J35
L32
L37
N35
R31
R37
U32
U35
W31
W32
W37
AA31
AA35
AC32
AC37
AE31
AE35
AG32
AG37
AJ35
AL32
AL37
AR35

+3VS

Don't use GFX reserve
RC90, CC86, CC87
Cloud 08/12

+APU_VDD_33

RC92
@

1

2

0_0603_5%

CC99 1

2 1U_0402_6.3V6K

CC1011

2 1U_0402_6.3V6K

CC1021

2 180P_0402_50V8J

B

1

+RTCBATT

+VDD_0.95_ALW

+0.95VALW

RH13
1K_0402_5%

+0.95V_DUAL

W>=15mils
RC97

RC98
2

1

3

1 RC94
2
10K_0402_5%

2

0_0805_5%

2

1
3

GND

2

SA000066U00

2

1

CC113
10U_0603_6.3V6M

2

1

CC112
10U_0603_6.3V6M

2

1

CC111
1U_0402_6.3V6K

2

1

CC110
1U_0402_6.3V6K

2

1

CC109
1U_0402_6.3V6K

2

1

CC108
180P_0402_50V8J

2

1

CC107
1U_0402_6.3V6K

2

1

CC106
1U_0402_6.3V6K

1

CC105
1U_0402_6.3V6K

2

CC104
1U_0402_6.3V6K

1

Vin

1

+3VLP

BAV70W_SOT323-3
1
2
@
RC99
0_0805_5%

JC1

2

+0.95VS

W>=15mils
DC3
2

Vout

@
JUMP_43X39

L

DC3 close to UCPU1

1

1

0_0805_5%

2

1

1

U4
AP2138N-1.5TRG1_SOT23-3

2

+0.95VALW

2

CC103
1U_0402_16V6K
+RTCBATT

180PX1
10UX2
1UX3

1UX4

2

A

20mils

-

+

1

A

CONN@
JRTC1
LOTES_AAA-BAT-054-K01

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2013/02/26

Deciphered Date

2015/07/08

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

POWER & DECOUPLING
Rev
0.1

LA-A996P

Date:

5

4

3

2

Monday, February 17, 2014
1

Sheet

8

of

46

5

4

3

2

1

+3VALW
CC1141

RPC11
PBTN_OUT#
FCH_PCIE_WAKE#
RTC_CLK_R

USB_OC0#
SYS_RESET#
USB_OC1#

28
28

AY3 SLP_S3_L
BA5 SLP_S5_L

SLP_S3#
SLP_S5#

SLP_S3#
SLP_S5#

T17

RC1191
RC1201

28
28
28
28

2 15K_0402_5%
2 15K_0402_5%

@

RC1221

DC1
EC_RSMRST#_R 2

2 2.2K_0402_5%

1

+3VS

25
25
RC1151
RC1161
RC1171
RC1211

C

@

2
2
2
2

8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%
8.2K_0402_5%

ODD_PLUG#

23

ODD_DA#
EC_RSMRST#

IR_RX1
GPIO184

CR_CLKREQ#
MINI1_CLKREQ#
LAN_CLKREQ#
VGA_CLKREQ#

28

HDA_SDIN0
T29
T30
T31

RPC10
8
7
6
5

HDA_RST#
HDA_SYNC
HDA_SDOUT

AU29
AW29
AR27
AV27
AY29

CR_CLKREQ#
MINI1_CLKREQ#
LAN_CLKREQ#
VGA_CLKREQ#

USB_OC0#
USB_OC1#

MINI1_CLKREQ#
LAN_CLKREQ#
CR_CLKREQ#
VGA_CLKREQ#

1
2
3
4

IR_TX0

T21
ODD_DA#
T23
T24

24
22
24
12

AP15
AV13
BA9
BA10
AV15

ODD_PLUG#

T26
T27
33ohm termination resistor at CODEC side

26

26 HDA_RST_AUDIO#
26 HDA_SYNC_AUDIO
26 HDA_SDOUT_AUDIO

23

EC_RSMRST#

RB751V-40_SOD323-2

AR23
AR31
AN5
AL7

EC_KBRST#
EC_GA20
EC_SCI#
EC_SMI#

EC_KBRST#
EC_GA20
EC_SCI#
EC_SMI#

+1.8VALW

AU13 TEST0
AY10 TEST1/TMS
AY6 TEST2

TEST0
TEST1
TEST2

USB_OC0#
USB_OC1#
USB_OC2#
USB_OC3#
HDA_BITCLK
HDA_SDOUT
HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3
HDA_SYNC
HDA_RST#

KBRST_L
GA20IN/GEVENT0_L
LPC_PME_L/GEVENT3_L
LPC_SMI_L/GEVENT23_L
AC_PRES/IR_RX0/GEVENT16_L
IR_TX0/GEVENT21_L
IR_TX1/GEVENT6_L
IR_RX1/GEVENT20_L
IR_LED_L/LLB_L/GPIO184
CLK_REQ0_L/SATA_IS0_L/SATA_ZP0_L/GPIO60
CLK_REQ1_L/GPIO61
CLK_REQ2_L/GPIO62
CLK_REQ3_L/SATA_IS1_L/SATA_ZP1_L/GPIO63
CLK_REQG_L/GPIO65/OSCIN

AY8 USB_OC0_L/SPI_TPM_CS_L/TRST_L/GEVENT12_L
AW1 USB_OC1_L/TDI/GEVENT13_L
AV1 USB_OC2_L/TCK/GEVENT14_L
AY1 USB_OC3_L/TDO/GEVENT15_L
AN2
AN1
AK2
AK1
AM1
AL2
AM2
AL1

AZ_BITCLK
AZ_SDOUT
AZ_SDIN0/GPIO167
AZ_SDIN1/GPIO168
AZ_SDIN2/GPIO169
AZ_SDIN3/GPIO170
AZ_SYNC
AZ_RST_L

32K_X1

AJ2 X32K_X1

32K_X2

AJ1 X32K_X2

BA22
AY21
AY24
BA24

ESD@ CC121
100P_0402_50V8J

RC1011

HDA_BITCLK_AUDIO

EMI@ 2 33_0402_5%HDA_BITCLK

1

@

RC105
8.2K_0402_5%

1
CC116
150P_0402_50V8J

2

2

SD_LED/GPIO45 AY25
SCL0/GPIO43 AU25
SDA0/GPIO47 AV25
SCL1/GPIO227 AY11
SDA1/GPIO228 BA11
GPIO49
GPIO50
GPIO51
GPIO55
GPIO57
GPIO58
GPIO59
GPIO64
SPKR/GPIO66
GPIO68
GPIO69
GPIO70
GPIO71
GPIO174
GEVENT2_L
GEVENT4_L
GEVENT7_L
GEVENT10_L
GEVENT11_L
GEVENT17_L
BLINK/GEVENT18_L
GEVENT22_L

PLT_RST#

11,22,24,31

D

U3
NC7SZ08P5X_NL_SC70-5

2 0_0402_5%

@

SIC
SID

AP27 ODD_PWR
AY28
BA28 VGA_PWRGD
AV23 DEVSLP0
AP21 FCH_GPIO57
BA26 FCH_GPIO58
AV19
AY27 PXS_RST#
BA27 APU_SPKR
AU21 DGPU_PWR_EN
AY26
AV21
AM21 GPIO71 RC1261
BA3 GPIO174

@
4

Y
A

APU_SCLK0 18,27
APU_SDATA0 18,27

+3VS
ODD_PWR

23

VGA_PWRGD 45
DEVSLP0 23

APU_SCLK0
APU_SDATA0

@

2 0_0402_5%

AV17 GEVENT2_L
BA4
AR15
AP17
AP11
AN8
AU17
BA6 EC_LID_OUT#

PROCHOT#

RC1111
RC1121

2 2.2K_0402_5%
2 2.2K_0402_5%
+3VALW

PXS_RST# 11
APU_SPKR 26
DGPU_PWR_EN

13,28,45
RC1131
RC1141

SIC
SID

36,43,6

SERR#_B

DEVSLP0

RC1241

EC_LID_OUT#

RC1251

2 10K_0402_1%
2 10K_0402_1%
@

2 10K_0402_1%
2 100K_0402_5%

+3VALW
SERR#_K
EC_LID_OUT#

GENINT1_L/GPIO32 BA29
GENINT2_L/GPIO33 AP23 APU_BT_ON#
FANOUT0/GPIO52
FANIN0/GPIO56

B

RC1091
APU_SCLK0
APU_SDATA0

C

28
Beema@ RC131
10K_0402_1%

ACCEL_INT# 31
APU_BT_ON# 22

AV31 APU_WL_OFF#
AU31 TS_GPIO_APU

APU_WL_OFF# 22
TS_GPIO_APU 19

1 Kabini@ 2 SERR#
RK10
0_0402_5%

SERR#_K

SERR#

28

@ RC135
@RC135
2K_0402_5%
1
2

33_0804_8P4R_5%

26

2 33_0402_5%

1

P

5
APU_PCIE_RST#_C RC1021

G

2

SD_CMD/GPIO74 AY23
SD_CD/GPIO75 AY20
SD_WP/GPIO76 BA20
SD_DATA0/GPIO77
SD_DATA1/GPIO78
SD_DATA2/GPIO79
SD_DATA3/GPIO80

0.1U_0402_25V6

3

AY5 RSMRST_L
BA8 PWR_BTN_L
AM19 PWR_GOOD
AY7 SYS_RESET_L/GEVENT19_L
AW11 WAKE_L/GEVENT8_L

PBTN_OUT#
SYS_PWRGD
SYS_RESET#
FCH_PCIE_WAKE#

PBTN_OUT#
SYS_PWRGD

2

+3VALW

2 100K_0402_5%
2 15K_0402_5%
2 100K_0402_5%

CC115
1
2
SD_PWR_CTRL BA23
SD_CLK/GPIO73 AY22

1

28
28

TEST0
TEST2

AY4 LPC_RST_L
AY9 PCIE_RST_L

EC_RSMRST#_R

10K_0804_8P4R_5%

1
1
1

+3VALW

A6@
UAPU1D

1 RC100 2 33_0402_5%LPC_RST_L
APU_PCIE_RST#_C

LPC_RESET#

D

RC106
RC107
RC108

2 150P_0402_50V8J

ACPI/SD/AZ/GPIO/RTC/MISC

28

2

8
7
6
5

1

1
2
3
4

RTCCLK

AV11 RTC_CLK_R
1
RC141

2

RTC_CLK

22_0402_5%

28
SERR#_B

+3VS

RK11 1 Beema@2 0_0402_5%

FT3_BGA_769P-T_A39
Part Number = SA00006V710

+3VALW

For Strain pin, dont modify to R-Pak
RC1281
RC1301

32K_X1

NC

2

2

RC1341
RC1361

GEVENT2_L
GPIO174

2 2K_0402_5%
2 10K_0402_1%

FCH_GPIO57

32.768KHZ_12.5PF_Q13MC14610002

2
22P_0402_50V8J

PX@
R176
10K_0402_5%

PV modify to 10K

2 10K_0402_1%
2 10K_0402_1%

1

OSC

3

32K_X2

FCH_GPIO58
2

Close to APU

1

B

@
R188
10K_0402_5%

2

NC

@
@

UMA@
R189
10K_0402_5%

B

1

OSC

1

1

RC140
20M_0402_5%
1
CC118

R175
10K_0402_5%

Y2
4

2

2 22P_0402_50V8J
1

CC1171

2

GEVENT2_L
GPIO174

GPIO58

GPIO57

ZSO41

L

L

14" UMA

( R188 )

( R189 )

ZSO41

L
( R188 )

14" DIS

H

ZSO51
15" UMA

( Internal PH )
H

ZSO51
15" DIS

H
( Internal PH )
L
( R189 )
H

( Internal PH ) ( Internal PH )

A

A

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2013/02/26

Deciphered Date

2015/07/08

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

GEVENT_GPIO_SD
Rev
0.1

LA-A996P

Date:

5

4

3

2

Monday, February 17, 2014
1

Sheet

9

of

46

5

4

3

2

1

L
K
B
N
E
l
e
n
a
P

D

D

C

C

D
D
V
N
E
l
e
n
a
P

B

B

M
W
P
l
e
n
a
P

A

A

Compal Secret Data

Security Classification
Issued Date

2013/02/26

Deciphered Date

2015/07/08

Title

Level Shifter

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev
0.1

LA-A996P

Date:

5

4

3

2

Monday, February 17, 2014
1

Sheet

10

of

46

1

2

3

U666A

PX@

AF30
AE31

PCIE_ATX_C_GRX_P0
PCIE_ATX_C_GRX_N0

5
5

PCIE_ATX_C_GRX_P1
PCIE_ATX_C_GRX_N1

5
5

PCIE_ATX_C_GRX_P2
PCIE_ATX_C_GRX_N2

5
5

PCIE_ATX_C_GRX_P3
PCIE_ATX_C_GRX_N3

PCIE_RX0P
PCIE_RX0N

AE29
AD28
AD30
AC31
AC29
AB28
AB30
AA31
AA29
Y28
Y30
W31
W29
V28

5

AC Coupling Capacitor
PCIe Gen3: Recommended value is 220 nF
PCIe Gen1 and Gen2 only: Recommended value is 100 nF

A

5
5

4

PCIE_TX0P
PCIE_TX0N

PCIE_RX1P
PCIE_RX1N

PCIE_TX1P
PCIE_TX1N

PCIE_RX2P
PCIE_RX2N

PCIE_TX2P
PCIE_TX2N

PCIE_RX3P
PCIE_RX3N

PCIE_TX3P
PCIE_TX3N

PCIE_RX4P
PCIE_RX4N

PCIE_TX4P
PCIE_TX4N

PCIE_RX5P
PCIE_RX5N

PCIE_TX5P
PCIE_TX5N

PCIE_RX6P
PCIE_RX6N

PCIE_TX6P
PCIE_TX6N

PCIE_RX7P
PCIE_RX7N

PCIE_TX7P
PCIE_TX7N

AH30
AG31

PCIE_GTX_ARX_P0
PCIE_GTX_ARX_N0

0.1U_0402_16V7K
0.1U_0402_16V7K

2
2

1 PX@
1 PX@

C5187
C5188

AG29
AF28

PCIE_GTX_ARX_P1
PCIE_GTX_ARX_N1

0.1U_0402_16V7K
0.1U_0402_16V7K

2
2

1 PX@
1 PX@

C5189
C5190

AF27
AF26

PCIE_GTX_ARX_P2
PCIE_GTX_ARX_N2

0.1U_0402_16V7K
0.1U_0402_16V7K

2
2

1 PX@
1 PX@

C5191
C5192

AD27
AD26

PCIE_GTX_ARX_P3
PCIE_GTX_ARX_N3

0.1U_0402_16V7K
0.1U_0402_16V7K

2
2

1 PX@
1 PX@

C5193
C5194

A

PCIE_GTX_C_ARX_P0
PCIE_GTX_C_ARX_N0

5
5

PCIE_GTX_C_ARX_P1
PCIE_GTX_C_ARX_N1

5
5

PCIE_GTX_C_ARX_P2
PCIE_GTX_C_ARX_N2

5
5

PCIE_GTX_C_ARX_P3
PCIE_GTX_C_ARX_N3

5
5

No Use GPU Display Port outpud

AC25
AB25
U666F

PX@

Y23
Y24
AB11
AB12

VARY_BL
DIGON

AB27
AB26
Y27
Y26

AL15
AK14

TXCAP_DPA3P
TXCAM_DPA3N

B

V30
U31
U29
T28

NC#W24
NC#W23

NC#U29
NC#T28

NC#V27
NC#U26

NC#T30
NC#R31

R29
P28

NC#R29
NC#P28

P30
N31
N29
M28
M30
L31
L29
K30

NC#T26
NC#T27
NC#T24
NC#T23

NC#N29
NC#M28

NC#P27
NC#P26

NC#M30
NC#L31

NC#P24
NC#P23

NC#L29
NC#K30

NC#M27
NC#N26

W24
W23

AL17
AK16
AH18
AJ17

TX2P_DPA0P
TX2M_DPA0N

U24
U23

B

AH16
AJ15

TX1P_DPA1P
TX1M_DPA1N

V27
U26

NC_TXOUT_L3P
NC_TXOUT_L3N

AL19
AK18

TMDP

T26
T27

AH20
AJ19

TXCBP_DPB3P
TXCBM_DPB3N

T24
T23

AL21
AK20

TX3P_DPB2P
TX3M_DPB2N

P27
P26

AH22
AJ21

TX4P_DPB1P
TX4M_DPB1N

AL23
AK22

TX5P_DPB0P
TX5M_DPB0N

P24
P23

NC_TXOUT_U3P
NC_TXOUT_U3N

M27
N26

AK24
AJ23

? PRO S3
216-0841018 A0 SUN

CLOCK

AK30
AK32

CLK_PEG_VGA
CLK_PEG_VGA#

CLK_PEG_VGA
CLK_PEG_VGA#

NC#U24
NC#U23

NC#P30
NC#N31

C

7
7

PCI EXPRESS INTERFACE

T30
R31

NC#V30
NC#U31

TX0P_DPA2P
TX0M_DPA2N

PCIE_REFCLKP
PCIE_REFCLKN

C

+0.95VS_VGA
CALIBRATION

PCIE_CALR_TX
R1400

1

PX@ 2 1K_0402_5%

N10

TEST_PG

AL27

GPU_RST#

PCIE_CALR_RX

Y22

R5159

1 PX@

2 1.69K_0402_1%

AA22

R717

1 PX@

2 1K_0402_1%

PERSTB

216-0841018 A0 SUN PRO S3

1

+3VS

1

+3VS_VGA

PLT_RST#

PXS_RST#

2

PLT_RST#

1

B

2
U6

Y
A

PX@
4

GPU_RST#

3

1

22,24,31,9

PXS_RST#

@
R1691
0_0402_5%

G

9

P

5

2

PX@R1681
PX@R1681
0_0402_5%

MC74VHC1G08DFT2G_SC70-5

PX@
R1631
100K_0402_5%

D

2

D

Compal Secret Data

Security Classification
Issued Date

2013/01/11

Deciphered Date

2013/12/31

Compal Electronics, Inc.
SUN_PCIE/DP
Size Document Number
Custom
LA-A996P
of
Monday, February 17, 2014
11
46
Date:
Sheet
Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1

2

3

4

5

Rev
0.1

1

2

3

4

5

+3VS_VGA

28,6

3

EC_SMB_CK2

4

VGA_SMB_CK3

PX@ Q2416B
ME2N7002D1KW-G 2N_SOT363-6

+3VS_VGA

NC#AG3
NC#AG5

DPA

NC#AH3
NC#AH1
NC#AK3
NC#AK1

DVO

NC#AK5
NC#AM3
NC#AK6
NC#AM5

DPB

NC#AJ7
NC#AH6

W6
V6

@ RP35
10K_8P4R_5%
1
2
3
4

AC6
AC5
AA5
AA6

+3VS_VGA

R1444 1
R1445 1

1 PX@
R174

2 100K_0402_5% ACIN
2 100K_0402_5% VGA_AC_BATT_R

@
@

U1
W1
U3
Y6
AA1

A

Resistor Divider Lookup Lable

AK6
AM5

R_pu (ohm)

AJ7
AH6
AK8
AL7

45

2
0_0402_5%

28,36..38

GPU_GPIO0

1
R165
1
R1661

ACIN

ACIN

VGA_AC_BATT_R

2

@

0_0402_5%
PX@ 2
0_0402_5%

GPU_VID1

T291
JTAG_TRSTB
JTAG_TDI
JTAG_TMS
JTAG_TCK
9

VGA_CLKREQ#

45
45

GPU_VID2
GPU_VID5

45
45

GPU_VID4
GPU_VID3
1
R167 PX@

@ C5213
68P_0402_50V8J

1
T70
2

PX@ 2

R1443 1

PX@ 2

R1439 1

1

2
0_0402_5%

RF
R1446 1

U6
U10
T10
U8
VGA_SMB_DA3
U7
VGA_SMB_CK3
T9
T8
T7
P10
P4
P2
N6
N5
N3
Y9
N1
GPU_VID1
M4
R6
GPU_GPIO17
W10
M2
GPIO19_CTF
P8
GPU_VID2
P7
GPU_VID5
N8
AK10
GPU_VID4
AM10
GPU_VID3
VGA_CLKREQ#_R N7
GPU_GPIO0

@ RP34

C

1

JTAG_TRSTB
JTAG_TDI
JTAG_TCK
JTAG_TMS
JTAG_TDO
TESTEN

GPIO19_CTF
10K_0402_5%
VGA_CLKREQ#
10K_0402_5%
TESTEN
PX@ 2
1K_0402_5%

T221
R349 1
PX@ 2
10M_0402_5%

L6
L5
L3
L1
K4
K7
AF24
AB13
W8
W9
W7
AD10
AJ9
AL9

T218

XTALIN

NC#U1
NC#W1
NC#U3
NC#Y6
NC#AA1

NC#AA3
NC#Y2
NC#J8

PX@C341
PX@
C341
8.2P_0402_50V_NPO

2

NC

OSC

OSC

NC

1

1

AC14
AB16

AC16

R
AVSSN#AK26

GENERAL PURPOSE I/O

GPIO_0
GPIO_1
GPIO_2
SMBDATA
SMBCLK
GPIO_5_AC_BATT
GPIO_6
GPIO_7_BLON
GPIO_8_ROMSO
GPIO_9_ROMSI
GPIO_10_ROMSCK
GPIO_11
GPIO_12
GPIO_13
GPIO_14_HPD2
GPIO_15_PWRCNTL_0
GPIO_16
GPIO_17_THERMAL_INT
GPIO_18
GPIO_19_CTF
GPIO_20_PWRCNTL_1
GPIO_21
GPIO_22_ROMCSB
GPIO_29
GPIO_30
CLKREQB

G
AVSSN#AJ25
B
AVSSN#AG25
DAC1

HSYNC
VSYNC
RSET
AVDD
AVSSQ
VDD1DI
VSS1DI
FutureASIC/SEYMOUR/PARK

CEC_1
RSVD#AK12
RSVD#AL11
RSVD#AJ11

JTAG_TRSTB
JTAG_TDI
JTAG_TCK
JTAG_TMS
JTAG_TDO
TESTEN
NC#AF24

GENLK_CLK
GENLK_VSYNC
SWAPLOCKA
SWAPLOCKB

GENERICA
GENERICB
GENERICC
GENERICD
GENERICE
NC#AJ9
NC#AL9

PS_0
PS_1
PS_2

HPD1
PX_EN

PS_3

4.53k

2k

010

6.98k

4.99k

011

4.53k

4.99k

100

3.24k

5.62k

101

3.4k

10k

110

4.75k

NC

111

TS_A

DDC1CLK
DDC1DATA

3

AUX1P
AUX1N
DDC2CLK
DDC2DATA

PX@C350
PX@C350
8.2P_0402_50V_NPO

AM28
AK28

XTALIN
XTALOUT
R1442 1 PX@

2 10K_0402_5%

T219
T220

1
1

AC22
AB22

XTALIN
XTALOUT

AUX2P
AUX2N

XO_IN
XO_IN2

NC#AD20
NC#AC20

Enable MLPS

NC#AE16
NC#AD16
SEYMOUR/FutureASIC

+1.8VS_VGA
L54 PX@
1
2
BLM15BD121SN1D_0402

13mA

PX@C414
PX@
C414 2

1

PX@C421 2
PX@C421

1

1U_0402_6.3V4Z

PX@C438
PX@
C438 2

1

0.1U_0402_10V6K

10U_0603_6.3V6M

THERM_D+
THERM_DGPIO28
+TSVDD

T4
T2
R5
AD17
AC17

DPLUS
DMINUS

PS_1[1] STRAP_BIF_GEN3_EN_A

@
R5167
8.45K_0402_1%
PS_1

PS_1[2] TRAP_BIF_CLK_PM_EN
PS_1[3] N/A
PS_1[4] STRAP_TX_CFG_DRV_FULL_SWING

PX@
R5168
4.75K_0402_1%

C=NC

PS_1[5] STRAP_TX_DEEMPH_EN

+1.8VS_VGA

PS_2[3:1]=000

J8

Strap Name :

PS_2[5:4]=11

Capacitor Divider Lookup Lable

AM26
AK26
AL25
AJ25

PS_2[1] N/A

R=NC

PS_2[2] N/A

Bitd [5:4]

PS_2[3] STRAP_BIOS_ROM_EN

00

82nF

01

10nF

10

NC

11

PX@
C5203
0.082U_0402_16V6K

1

PS_2[4] STRAP_BIF_VGA_DIS
PX@
R5164
4.75K_0402_1%

2

PS_2[5] N/A

B

AH24
AG25
AH26
AJ27

+1.8VS_VGA

PS_3[3:1]=000
PS_3[5:4]=11

AD22

Strap Name :
PS_3[1] BOARD_CONFIG[0] (Memory ID)

X76@
R5174
8.45K_0402_1%

AG24
AE22
PS_3
AE23
AD23

PS_3[2] BOARD_CONFIG[1] (Memory ID)
PS_3[3] BOARD_CONFIG[2] (Memory ID)
PS_3[4] AUD_PORT_CONN_PINSTRAP[1]

X76@
R5169
4.75K_0402_1%

C=NC

AM12

PS_3[5] AUD_PORT_CONN_PINSTRAP[2]

AK12
AL11
AJ11

AL13
AJ13

Memory ID

(default)

AG13
AH12

AC19

DDCVGACLK
DDCVGADATA

THERMAL

Memory Type

Configuration

Size

000

SA000068U00

Samsung K4W2G1646E‐BC1A

001

SA000067500

Micron MT41J128M16JT‐093G:K

010

SA00006H400

011
100

X76 P/N

R5174

R5169

1GB

NC

4.75K

X7654132L01

1GB

8.45K

2K

X7654132L03

Hynix H5TC2G63FFR‐11C

1GB

4.53K

2K

X7654132L02

SA000076P00

Samsung K4W4G1646D‐BC1A

2GB

6.98K

4.99K

X7654132L04

SA000077K00

Micron MT41J256M16HA‐093G:E 2GB

4.53K

4.99K

X7654132L05

101

SA00006E800

Hynix H5TC4G63AFR‐11C

2GB

3.24K

5.62K

X7654132L14

110

SA000068U40

Samsung K4W2G1646Q‐BC1A

1GB

3.4K

10K

X7654132L13

C

PS_0

AD19

PS_1

AE17

PS_2

AE20

PS_3

AE19

DBG_VREFG

2

1

D

001

Strap Name :

PS_2

DDC/AUX

2

000

2k

PS_1[5:4]=11

0402 1% resistors are equired

AA3
Y2

XTALOUT

27MHZ 10PF +-10PPM 7V27000050
SJ100009700

1

Y4
W5

4.75k

8.45k

+1.8VS_VGA

PS_1[3:1]=000

Bitd [3:1]

NC

680nF

PX@Y6
1

W3
V2

SCL
SDA

PLL/CLOCK

4

V4
U5

R_pd (ohm)

I2C

R1
R3

VGA_AC_BATT
pull up

10K_8P4R_5%

DPC

2
1

AK3
AK1
AK5
AM3

Cap (nF)

+3VS_VGA

8
7
6
5

NC#AA5
NC#AA6

NC#W3
NC#V2
NC#Y4
NC#W5

45

1
2
3
4

NC#AC5
NC#AC6

PS_0[5] AUD_PORT_CONN_PINSTRAP[0]

1

B

NC#V4
NC#U5

PS_0[4] N/A

2

5

VGA_AC_BATT

4

28

1

3
@ Q16B

ME2N7002D1KW-G 2N_SOT363-6

2

ME2N7002D1KW-G 2N_SOT363-6

6

VGA_AC_BATT_R

@ Q16A

NC#W6
NC#V6

PS_0[3] ROM_CONFIG[2]
PX@
R5166
2K_0402_1%

C=NC

AH3
AH1

8
7
6
5

NC#AK8
NC#AL7

AG3
AG5

2

DBG_DATA16
DBG_DATA15
DBG_DATA14
DBG_DATA13
DBG_DATA12
DBG_DATA11
DBG_DATA10
DBG_DATA9
DBG_DATA8
DBG_DATA7
DBG_DATA6
DBG_DATA5
DBG_DATA4
DBG_DATA3
DBG_DATA2
DBG_DATA1
DBG_DATA0

1

A

N9
L9
AE9
Y11
AE8
AD9
AC10
AD7
AC8
AC7
AB9
AB8
AB7
AB4
AB2
Y8
Y7

1

5

PX@ Q2416A
ME2N7002D1KW-G 2N_SOT363-6

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

2

T201
T202
T203
T204
T205
T206
T207
T208
T209
T210
T211
T212
T213
T214
T215
T216
T217

2

VGA_SMB_DA3

PS_0[2] ROM_CONFIG[1]

1

2

1

PS_0

2

NC#AF2
NC#AF4

AF2
AF4

1

6

EC_SMB_DA2

PS_0[1] ROM_CONFIG[0]

PX@
R5165
8.45K_0402_1%

PX@R328
PX@R328
10K_0402_5%
2

28,6

Strap Name :

1

PS_0[5:4]=11

U?

2

PX@R327
PX@
R327
10K_0402_5%

PX@

2

2
VGA_SMB_CK3
0_0402_5%

@

U666B

1

1
EC_SMB_CK2
R164

+1.8VS_VGA

PS_0[3:1]=001

2
VGA_SMB_DA3
0_0402_5%

@

1

1
EC_SMB_DA2
R162

AE6
AE5

ZZZ

ZZZ3

ZZZ4

ZZZ5

ZZZ6

SAM2@

MIC2@

ZZZ7

AD2
AD4
AC11
AC13

SAM@

1G SAMSUNG
X7654132L13

MIC@

1G MICRON

X7654132L03

HY@

1G HYNIX

X7654132L02

HY2@

2G SAMSUNG 2G Micron

X7654132L04

X7654132L05

2G Hynix

X7654132L06

AD13
AD11
AD20
AC20

External VGA Thermal Sensor

AE16
AD16

+3VS_VGA
PX@
UV13
PX@
1
1
SCLK
0.1U_0402_16V4Z VDD
2
D+
SDATA
CV272
1
2
3
DALERT#
PX@
4
2200P_0402_50V7K
THERM#
GND
2
PX@ 1
RV133
2.2K_0402_5%
W83L771AWG-2 TSSOP 8P
2
CV271

AC1
AC3
THERM_D+
THERM_D-

GPIO28_FDO
TSVDD
TSVSS

+3VS_VGA

8

VGA_SMB_CK3

7

VGA_SMB_DA3
2
RV134
1
R168

6
5

PX@ 1
@

2

2.2K_0402_5%
GPU_GPIO17
0_0402_5%

D

+3VS_VGA

216-0841018 A0 SUN PRO ?S3

Compal Secret Data

Security Classification
Issued Date

2013/01/11

Deciphered Date

2013/12/31

Title

Compal Electronics, Inc.
SUN_MSIC

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

1

2

3

4

LA-A996P
Sheet

Friday, February 21, 2014
5

Rev
0.1
12

of

46

1

2

3

4

5

+1.5VS to +1.5VS_VGA (2.096A)

C446

+DP_VDDR

1

1U_0402_6.3V4Z
@

5 PXS_PWREN#
4

QV4101B
ME2N7002D1KW-G 2N_SOT363-6
PX@

1 PX@
C4109
0.01U_0402_25V7K

2
PX@
QV4101A
ME2N7002D1KW-G 2N_SOT363-6

+0.95VS_VGA

2

280mA
2

C451

+DP_VDDC

1

1U_0402_6.3V4Z
@

C450

R320 1
@
0_0603_5%

2

1

2

AG20
AG21
AF22
AG22
AD14

AG14
AH14
AM14
AM16
AM18
AF23
AG23
AM20
AM22
AM24
AF19
AF20
AE14

DP_VDDC#AG20
DP_VDDC#AG21
DP_VDDC#AF22
DP_VDDC#AG22
DP_VDDC#AD14

NC#AF6
NC#AF7
NC#AF8
NC#AF9

DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR

NC#AE1
NC#AE3
NC#AG1
NC#AG6
NC#AH5
NC#AF10
NC#AG9
NC#AH8
NC#AM6
NC#AM8
NC#AG7
NC#AG11

DPAB_CALR

NC#AE10

AE11
AF11
AE13
AF13
AG8
AG10

AF6
AF7
AF8
AF9

AE1
AE3
AG1
AG6
AH5
AF10
AG9
AH8
AM6
AM8
AG7
AG11

VIN2
VIN2

GND
CT2
VOUT2
VOUT2

AE10

@ JG3

60mA

14
13

1

2
PAD-OPEN 4x4m

12

2 PX@
C4112 1
470P_0402_50V7K

11
10

2 PX@
C4126 1
2200P_0402_50V7K

9
8

818mA

@ JG18

1

15

+3VS_VGA

1

1

2 PX@

2
PAD-OPEN 4x4m

TPS22966DPUR_SON14_2X3

2 PX@

+1.8VS_VGA
C4125

GPAD

C4123

M6
N13
N16
N18
N21
P6
P9
R12
R15
R17
R20
T13
T16
T18
T21
T6
U15
U17
U20
U9
V13
V16
V18
Y10
Y15
Y17
Y20
R11
T11
AA11
M12
N11
V11

2

CT1

ON2

6
7

+1.8VALW

ON1
VBIAS

5

DGPU_PWR_EN

VOUT1
VOUT1

0.1U_0402_25V6

+5VALW

NC#AE11
NC#AF11
NC#AE13
NC#AF13
NC#AG8
NC#AG10

C4124

2 PX@

4

NC/DP POWER

DP_VDDR#AG15
DP_VDDR#AG16
DP_VDDR#AF16
DP_VDDR#AG17
DP_VDDR#AG18
DP_VDDR#AG19
DP_VDDR#AF14

? S3
216-0841018 A0 SUN PRO

VIN1
VIN1

0.1U_0402_16V7K

0.1U_0402_16V7K

C4111

0.1U_0402_16V7K

1

3

DGPU_PWR_EN

U?

PX@
R346
10_0603_5%

2 PX@

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

GND

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

VSS_MECH
VSS_MECH
VSS_MECH

A3
A30
AA13
AA16
AB10
AB15
AB6
AC9
AD6
AD8
AE7
AG12
AH10
AH28
B10
B12
B14
B16
B18
B20
B22
B24
B26
B6
B8
C1
C32
E28
F10
F12
F14
F16
F18
F2
F20
F22
F24
F26
F6
F8
G10
G27
G31
G8
H14
H17
H2
H20
H6
J27
J31
K11
K2
K22
K6

A

B

A32
AM1
AM32

D

S

3

Main: SA00004MM00, TI, TPS22966
2nd: SA00006FD00, A-Power, APE8990GN3B
3rd: AOS, AOZ1331 (engineering sample available on 2013/Jan/18)

1

1
2

+3VS

PX@

+1.8VS_VGA 必須比 +VGA_CORE晚起來

U4103

1

AG15
AG16
AF16
AG17
AG18
AG19
AF14

AF17

+3VS to +3VS_VGA (25mA)
+1.8VALW to +1.8VS_VGA (311mA)
PX@

U?

1

B

0.1U_0402_10V6K
@

2

U666G

DP POWER

1

0.1U_0402_10V6K
@

2 PX@

2

1

2

C447

2

4
1

6

@
R4103
1.5M_0402_5%

R319 1
@
0_0603_5%

PX@
R4102
10_0603_5%

C4107

2 PX@

1

1.5VSG_GATE

2

PXS_PWREN#

1U_0402_6.3V4Z

PX@ 2
200K_0402_5%

C4106

2 PX@

1

AA27
AB24
AB32
AC24
AC26
AC27
AD25
AD32
AE27
AF32
AG27
AH32
K28
K32
L27
M32
N25
N27
P25
P32
R27
T25
T32
U25
U27
V32
W25
W26
W27
Y25
Y32

370mA (HDMI)
No Use GPU Display Port outpud
188mA (Display Port)

+1.8VS_VGA

1
2
3
10U_0603_6.3V6M

1
R4101

B+

PX@

+1.5VS_VGA

8
7
6
5
C4105

0.1U_0402_16V7K

A

1

U666E

PX@
U4101
AO4354_SO8

31

+1.5VS

?
216-0841018 A0 SUN PRO
S3

2
PXS_PWREN#
G
PX@Q91
ME2N7002D1W-G 1N_SC70-3

C

C

+0.95VALW to +0.95VSG (4.016A)

2

2
1

PXS_PWREN#

DGPU_PWR_EN

5
PX@
Q4105B

PX@ R4115
100K_0402_5%

PX@Q4102B
PX@Q4102B
ME2N7002D1KW-G 2N_SOT363-6

PX@C4122
PX@C4122
0.01U_0402_25V7K

2
ME2N7002D1KW-G 2N_SOT363-6
1
6 1

DGPU_PWR_EN

2

4

6

@ R4104
1.5M_0402_5%

D

1

2
28,45,9

0.95VSG_GATE

1

B+

PX@ 2
200K_0402_5%

3 1

PXS_PWREN#

4

2 PX@

5 PXS_PWREN#
1
R4109

ME2N7002D1KW-G 2N_SOT363-6

PX@
R4107
10_0603_5%

1

4

1

C4115

C4114

2 PX@

1U_0402_6.3V4Z

2 PX@

1

+VGA_CORE

PX@
R4113
100K_0402_5%

2

1
2
3
10U_0603_6.3V6M

C4113

0.1U_0402_16V7K

1

+5VALW

+0.95VS_VGA

PX@
U4102
AO4354_SO8

8
7
6
5

3 1

+0.95VALW

PX@
R4114
470_0603_5%

2 PXS_PWREN#
PX@
Q4105A

D

2

PX@
Q4102A
ME2N7002D1KW-G 2N_SOT363-6

Compal Secret Data

Security Classification
Issued Date

2013/01/11

Deciphered Date

2013/12/31

Compal Electronics, Inc.
SUN_Power/GND
Size Document Number
Custom
LA-A996P
of
Monday, February 17, 2014
13
46
Date:
Sheet
Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1

2

3

4

5

Rev
0.1

1

2

3

4

5

+1.5VS_VGA

1

1

(300mA) 0

0

0

1

1

VDDR4
VDD_CT
+TSVDD

13mA
13mA

1
1

1

1

0

0

0

+1.8VS_VGA
L47 PX@
1
2
MBK1608221YZF_2P

+DP_VDDC

0

0

0

VDDR3

25mA

10uF

1uF

0.1uF

0

2 (1@)

1

2

C429

C428

C410

C394

1U_0402_6.3V4Z
PX@

0.1U_0402_10V6K
PX@

1

2

L8

75mA
1

2

2

+0.95VS_VGA
L53 PX@
1
2
BLM15BD121SN1D_0402

VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI

SPLL_PVDD

100mA
1

2

1

2

+SPLL_VDDC

H8

1

J7

R21
U21

1

2

B

+0.95VS_VGA
R398

1

+BIF_VDDC

+VGA_CORE

ISOLATED
CORE I/O

H7

1

2

21A (VDDC + VDDCI (Merged) ‐ PRO S3 (DDR3))

SPLL_VDDC
SPLL_PVSS

M13
M15
M16
M17
M18
M20
M21
N20

2
0_0805_5%
@

MPLL_PVDD

+SPLL_PVDD

1

1

+VGA_CORE

1.4A

+1.8VS_VGA
L48 PX@
1
2
BLM15BD121SN1D_0402

2

PLL

BIF_VDDC
BIF_VDDC

2

1

1U_0402_6.3V6K

2

C3724

1

PX@

2

C388

1

1U_0402_6.3V6K
PX@
C3725

2

C403

C383

C399

1

1U_0402_6.3V4Z
PX@

2

1U_0402_6.3V4Z
PX@

AA15
N15
N17
R13
R16
R18
Y21
T12
T15
T17
T20
U13
U16
U18
V21
V15
V17
V20
Y13
Y16
Y18
AA12
M11
N12
U11

1

1U_0402_6.3V4Z
@

C387

C380

2

1U_0402_6.3V4Z
PX@

C422

0.1U_0402_10V6K
PX@

VDDR4
VDDR4
VDDR4

10U_0603_6.3V6M
PX@

C373

C372

C371

C370

C374

2.2U_0402_6.3V5M
PX@

2.2U_0402_6.3V5M
PX@

2.2U_0402_6.3V5M
PX@

2.2U_0402_6.3V5M
PX@

2

VDDR3
VDDR3
VDDR3
VDDR3

1

2

+3VS_VGA

V12
Y12
U12

90mA
1

10U_0603_6.3V6M
PX@

+DP_VDDR

I/O

AA17
AA18
AB17
AB18

+MPLL_PVDD

1

2

C

2

VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC

CORE

1

+0.95VS_VGA

1

2

1

2

C416

1

2

1

VDD_CT
VDD_CT
VDD_CT
VDD_CT

+PCIE_VDDC:
1.88A (PCIE2.0)
2.5A (PCIE3.0)

C

1

1U_0402_6.3V4Z
@

75mA

1

0.1U_0402_10V6K
PX@

SPLL_PVDD

1U_0402_6.3V4Z
@

1

2

C434

1

1

0.1U_0402_10V6K
PX@

1

1U_0402_6.3V4Z
PX@

130mA

1

C409

MPLL_PVDD

+VDDR3

1U_0402_6.3V4Z
PX@

1

25mA

L24 PX@
1
2
BLM15BD121SN1D_0402

C408

1

2

C433

1

2

0.1U_0402_10V6K
PX@

100mA

1

LEVEL
TRANSLATION

AA20
AA21
AB20
AB21

POWER

PCIE_PVDD

1U_0402_6.3V4Z
PX@

10U_0603_6.3V6M
PX@

0.1uF

C406

1uF

1

+3VS_VGA

10U_0603_6.3V6M
PX@

10uF

C405

C404

1

2

+1.8VS_VGA

13mA

L23
L24
L25
L26
M22
N22
N23
N24
R22
T22
U22
V22

C398

5

C407

1.5A

2

+VDD_CT

1U_0402_6.3V4Z
PX@

VDDR1

2

PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC

2

1U_0402_6.3V4Z
PX@

5

B

2

1

2

C415

3

L56 PX@
1
2
BLM15BD121SN1D_0402

2

1

1

1U_0402_6.3V4Z
@

0.1uF

2

1

1

2

C386

1uF

1

1

AB23
AC23
AD24
AE24
AE25
AE26
AF25
AG26

C384

10uF

1

+1.8VS_VGA

+1.5VS_VGA

1

NC#AB23
NC#AC23
NC#AD24
NC#AE24
NC#AE25
NC#AE26
NC#AF25
NC#AG26

+1.8VS_VGA

10U_0603_6.3V6M
@

1

1

2

VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1
VDDR1

+PCIE_PVDD:
50mA (PCIE2.0)
80mA (PCIE3.0)

10U_0603_6.3V6M
PX@

1

1

2

PCIE_PVDD

AM30

C413

1

1

2

U?

10U_0603_6.3V6M
@

100mA

1

2

C435

SPLL_VDDC

2

C412

0

PX@

MEM I/O

H13
H16
H19
J10
J23
J24
J9
K10
K23
K24
K9
L11
L12
L13
L20
L21
L22

1U_0402_6.3V4Z
PX@

0

1A

0.1U_0402_10V6K
PX@

0

U666D

2

C392

1.4A

1

0.1U_0402_10V6K
PX@

BIF_VDDC

2

C411

0

1

10U_0603_6.3V6M
PX@

5 (1@)

2

C381

2 (1@)

1

0.1U_0402_10V6K
PX@

2.5A

2

C391

PCIE_VDDC

1

0.1U_0402_10V6K
PX@

0.1uF

2

C390

1uF

1

C417

10uF

2

0.1U_0402_10V6K
PX@

0

1

2.2U_0402_6.3V5M
PX@

3

2

10U_0603_6.3V6M
PX@

+0.95VS_VGA

1

0.01U_0402_16V7K
PX@
C3719

3.5A

1

PCIE

VDDCI

0.01U_0402_16V7K
PX@
C3720

2

C389

1

0.1U_0402_10V6K
PX@

0

C375

10 (2@)

0.01U_0402_16V7K
PX@
C3723

TBD

10U_0603_6.3V6M
PX@

VDDC

C367

5 (1@)

A

10U_0603_6.3V6M
PX@

0.1uF

0.01U_0402_16V7K
PX@
C3722

1uF

C365

10uF

10U_0603_6.3V6M
PX@

+VGA_CORE

0.01U_0402_16V7K
PX@
C3721

A

2

2

?
216-0841018 A0 SUN PRO S3

D

D

Compal Secret Data

Security Classification
Issued Date

2013/01/11

Deciphered Date

2013/12/31

Compal Electronics, Inc.
SUN_Power
Size Document Number
Custom
LA-A996P
of
Monday, February 17, 2014
14
46
Date:
Sheet
Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1

2

3

4

5

Rev
0.1

1

A

2

16,17

M_DA[63..0]

16,17

M_MA[15..0]

16,17

M_DQM[7..0]

16,17

M_DQS[7..0]

16,17

M_DQS#[7..0]

3

M_MA[15..0]
M_DQM[7..0]
M_DQS[7..0]
A

M_DQS#[7..0]

PX@
U666C

1
2

PX@
R365
40.2_0402_1%

2

PX@
R363
40.2_0402_1%

1

+MVREFSA

1

+MVREFDA

PX@
C467
1U_0402_6.3V4Z

1

PX@
R457
100_0402_1%

2

2

2

2

PX@
C514
1U_0402_6.3V4Z

B

DRAM_RST#

PX@
R455
10_0402_1%
2
1

DRAM_RST

1

16,17

PX@
R5160
49.9_0402_1%
1
2

1

2

PX@
R5161
5.1K_0402_1%

2

PX@
C469
120P_0402_50V8J

Place close to GPU (within 25mm)
and place componment close to each other
C

+MVREFDA
+MVREFSA
R5162

1 PX@

2 120_0402_1%

K27
J29
H30
H32
G29
F28
F32
F30
C30
F27
A28
C28
E27
G26
D26
F25
A25
C25
E25
D24
E23
F23
D22
F21
E21
D20
F19
A19
D18
F17
A17
C17
E17
D16
F15
A15
D14
F13
A13
C13
E11
A11
C11
F11
A9
C9
F9
D8
E7
A7
C7
F7
A5
E5
C3
E1
G7
G6
G1
G3
J6
J1
J3
J5
K26
J26
J25
K25

DQA0_0
DQA0_1
DQA0_2
DQA0_3
DQA0_4
DQA0_5
DQA0_6
DQA0_7
DQA0_8
DQA0_9
DQA0_10
DQA0_11
DQA0_12
DQA0_13
DQA0_14
DQA0_15
DQA0_16
DQA0_17
DQA0_18
DQA0_19
DQA0_20
DQA0_21
DQA0_22
DQA0_23
DQA0_24
DQA0_25
DQA0_26
DQA0_27
DQA0_28
DQA0_29
DQA0_30
DQA0_31
DQA1_0
DQA1_1
DQA1_2
DQA1_3
DQA1_4
DQA1_5
DQA1_6
DQA1_7
DQA1_8
DQA1_9
DQA1_10
DQA1_11
DQA1_12
DQA1_13
DQA1_14
DQA1_15
DQA1_16
DQA1_17
DQA1_18
DQA1_19
DQA1_20
DQA1_21
DQA1_22
DQA1_23
DQA1_24
DQA1_25
DQA1_26
DQA1_27
DQA1_28
DQA1_29
DQA1_30
DQA1_31

U?
GDDR5/DDR3

MAA0_0/MAA_0
MAA0_1/MAA_1
MAA0_2/MAA_2
MAA0_3/MAA_3
MAA0_4/MAA_4
MAA0_5/MAA_5
MAA0_6/MAA_6
MAA0_7/MAA_7
MAA0_8/MAA_13
MAA0_9/MAA_15

MEMORY INTERFACE

M_DA0
M_DA1
M_DA2
M_DA3
M_DA4
M_DA5
M_DA6
M_DA7
M_DA8
M_DA9
M_DA10
M_DA11
M_DA12
M_DA13
M_DA14
M_DA15
M_DA16
M_DA17
M_DA18
M_DA19
M_DA20
M_DA21
M_DA22
M_DA23
M_DA24
M_DA25
M_DA26
M_DA27
M_DA28
M_DA29
M_DA30
M_DA31
M_DA32
M_DA33
M_DA34
M_DA35
M_DA36
M_DA37
M_DA38
M_DA39
M_DA40
M_DA41
M_DA42
M_DA43
M_DA44
M_DA45
M_DA46
M_DA47
M_DA48
M_DA49
M_DA50
M_DA51
M_DA52
M_DA53
M_DA54
M_DA55
M_DA56
M_DA57
M_DA58
M_DA59
M_DA60
M_DA61
M_DA62
M_DA63

+1.5VS_VGA

1

+1.5VS_VGA

1

5

M_DA[63..0]

GDDR5/DDR3

PX@
R364
100_0402_1%

4

MAA1_0/MAA_8
MAA1_1/MAA_9
MAA1_2/MAA_10
MAA1_3/MAA_11
MAA1_4/MAA_12
MAA1_5/MAA_BA2
MAA1_6/MAA_BA0
MAA1_7/MAA_BA1
MAA1_8/MAA_14
MAA1_9/RSVD
WCKA0_0/DQMA0_0
WCKA0B_0/DQMA0_1
WCKA0_1/DQMA0_2
WCKA0B_1/DQMA0_3
WCKA1_0/DQMA1_0
WCKA1B_0/DQMA1_1
WCKA1_1/DQMA1_2
WCKA1B_1/DQMA1_3

MVREFDA
MVREFSA
NC#J25
MEM_CALRP0

EDCA0_0/QSA0_0
EDCA0_1/QSA0_1
EDCA0_2/QSA0_2
EDCA0_3/QSA0_3
EDCA1_0/QSA1_0
EDCA1_1/QSA1_1
EDCA1_2/QSA1_2
EDCA1_3/QSA1_3
DDBIA0_0/QSA0_0B
DDBIA0_1/QSA0_1B
DDBIA0_2/QSA0_2B
DDBIA0_3/QSA0_3B
DDBIA1_0/QSA1_0B
DDBIA1_1/QSA1_1B
DDBIA1_2/QSA1_2B
DDBIA1_3/QSA1_3B
ADBIA0/ODTA0
ADBIA1/ODTA1
CLKA0
CLKA0B
CLKA1
CLKA1B
RASA0B
RASA1B
CASA0B
CASA1B
CSA0B_0
CSA0B_1
CSA1B_0
CSA1B_1
CKEA0
CKEA1

DRAM_RST
R460
R373

@
@

1
1

2 51.1_0402_1%
2 51.1_0402_1%

C542
C541

@1
@1

2 0.1U_0402_16V4Z
2
0.1U_0402_16V4Z

Route 50ohms single‐ended/100ohm diff and keep short
debug only, for clock observation,if not need, DNI.

L10
K8
L7

DRAM_RST

WEA0B
WEA1B

K17
J20
H23
G23
G24
H24
J19
K19
G20
L17

M_MA0
M_MA1
M_MA2
M_MA3
M_MA4
M_MA5
M_MA6
M_MA7
M_MA13
M_MA15

J14
K14
J11
J13
H11
G11
J16
L15
G14
L16

M_MA8
M_MA9
M_MA10
M_MA11
M_MA12
M_BA2
M_BA0
M_BA1
M_MA14

E32
E30
A21
C21
E13
D12
E3
F4

M_DQM0
M_DQM1
M_DQM2
M_DQM3
M_DQM4
M_DQM5
M_DQM6
M_DQM7

H28
C27
A23
E19
E15
D10
D6
G5

M_DQS0
M_DQS1
M_DQS2
M_DQS3
M_DQS4
M_DQS5
M_DQS6
M_DQS7

H27
A27
C23
C19
C15
E9
C5
H4

M_DQS#0
M_DQS#1
M_DQS#2
M_DQS#3
M_DQS#4
M_DQS#5
M_DQS#6
M_DQS#7

L18
K16

VRAM_ODT0
VRAM_ODT1

H26
H25

M_CLK0
M_CLK#0

G9
H9

M_CLK1
M_CLK#1

G22
G17

M_RAS#0
M_RAS#1

G19
G16

M_CAS#0
M_CAS#1

H22
J22

M_CS#0

G13
K13

M_CS#1

K20
J17

M_CKE0
M_CKE1

G25
H10

M_WE#0
M_WE#1

M_BA2
M_BA0
M_BA1

16,17
16,17
16,17

B

VRAM_ODT0
VRAM_ODT1

16
17

M_CLK0 16
M_CLK#0 16
M_CLK1 17
M_CLK#1 17
M_RAS#0
M_RAS#1

16
17

M_CAS#0
M_CAS#1

16
17

M_CS#0

16

M_CS#1

17

M_CKE0
M_CKE1

16
17

M_WE#0
M_WE#1

16
17

C

CLKTESTA
CLKTESTB
216-0841018 A0 SUN PRO S3
?

D

D

Compal Secret Data

Security Classification
Issued Date

2013/01/11

Deciphered Date

2013/12/31

Compal Electronics, Inc.
SUN_MEM
Size Document Number
Custom
LA-A996P
of
Monday, February 17, 2014
15
46
Date:
Sheet
Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1

2

3

4

5

Rev
0.1

1

2

3

4

5

Memory Partition A - Lower 32 bits
M_DA[63..0]

15,17

M_DA[63..0]

15,17

M_MA[15..0]

15,17

M_DQM[7..0]

15,17

M_DQS[7..0]

15,17

M_DQS#[7..0]

M_MA[15..0]
M_DQM[7..0]
M_DQS[7..0]
M_DQS#[7..0]
+1.5VS_VGA

+1.5VS_VGA

1

A

1

A

PX@
R452
4.99K_0402_1%

M_BA0
M_BA1
M_BA2

15
15
15

M_CLK0
M_CLK#0
M_CKE0

15
15
15
15
15

VRAM_ODT0
M_CS#0
M_RAS#0
M_CAS#0
M_WE#0

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

M_BA0
M_BA1
M_BA2

M2
N8
M3

M_CLK0
M_CLK#0
M_CKE0

J7
K7
K9

VRAM_ODT0
M_CS#0
M_RAS#0
M_CAS#0
M_WE#0

K1
L2
J3
K3
L3

M_DQS2
M_DQS0

F3
C7

M_DQM2
M_DQM0

E7
D3

M_DQS#2
M_DQS#0

G3
B7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3

ODT/ODT0
CS/CS0
RAS
CAS
WE

DML
DMU

1

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

DQSL
DQSU

RESET
ZQ/ZQ0
NC/ODT1
NC/CS1
NC/CE1
NCZQ1

C

2

R5170
40.2_0402_1%
PX@

2

J7
K7
K9

A1
A8
C1
C9
D2
E9
F1
H2
H9

VRAM_ODT0
M_CS#0
M_RAS#0
M_CAS#0
M_WE#0

K1
L2
J3
K3
L3

M_DQS3
M_DQS1

F3
C7

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

M_DQM3
M_DQM1

E7
D3

M_DQS#3
M_DQS#1

G3
B7

+1.5VS_VGA

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

CK
CK
CKE/CKE0
ODT/ODT0
CS/CS0
RAS
CAS
WE

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

DQSL
DQSU
DML
DMU

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

DQSL
DQSU

RESET

L8

ZQ/ZQ0

J1
L1
J9
L9

96-BALL
SDRAM DDR3
H5TC2G63FFR-11C_FBGA96
X76@

M_DA30
M_DA27
M_DA31
M_DA24
M_DA29
M_DA26
M_DA28
M_DA25

D7
C3
C8
C2
A7
A2
B8
A3

M_DA8
M_DA14
M_DA9
M_DA12
M_DA10
M_DA15
M_DA11
M_DA13
+1.5VS_VGA

BA0
BA1
BA2

DRAM_RST# T2

PX@
R456
243_0402_1%

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

E3
F7
F2
F8
H3
H8
G2
H7

NC/ODT1
NC/CS1
NC/CE1
NCZQ1

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

B2
D9
G7
K2
K8
N1
N9
R1
R9

B

+1.5VS_VGA

A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9

C

96-BALL
SDRAM DDR3
H5TC2G63FFR-11C_FBGA96
X76@

PX@
C506
0.01U_0402_25V7K

+1.5VS_VGA
+1.5VS_VGA

1

1

C479

1

C534

1

C478

1

C477

1

C476

1

C474

1

C516

1

C533

1

C518

1

C499

1

C498

C497

C496

1

1

2

2

2

2

2

2

0.1U_0402_10V6K
@

2

0.1U_0402_10V6K
PX@

2

0.1U_0402_10V6K
PX@

2

0.1U_0402_10V6K
PX@

2

1U_0402_6.3V4Z
@

2

1U_0402_6.3V4Z
PX@

2

1U_0402_6.3V4Z
PX@

2

1U_0402_6.3V4Z
PX@

2

1U_0402_6.3V4Z
PX@

2

1U_0402_6.3V4Z
PX@

C486

C531

C483

C485

C482

C481

C480

C520

C532

C521

C510

C519

C511

C512

C490

1

2

1U_0402_6.3V4Z
PX@

2

1

10U_0603_6.3V6M
PX@

2

1

0.1U_0402_10V6K
@

2

1

0.1U_0402_10V6K
PX@

2

1

U1407 side

0.1U_0402_10V6K
PX@

2

1

0.1U_0402_10V6K
PX@

2

1

0.1U_0402_10V6K
PX@

2

1

0.1U_0402_10V6K
PX@

2

1

1U_0402_6.3V4Z
@

2

1

0.1U_0402_10V6K
PX@

2

1

1U_0402_6.3V4Z
PX@

2

1

1U_0402_6.3V4Z
PX@

2

1

1U_0402_6.3V4Z
PX@

2

1

1U_0402_6.3V4Z
PX@

10U_0603_6.3V6M
PX@

2

1

1U_0402_6.3V4Z
PX@

1

1U_0402_6.3V4Z
PX@

C491

U1406 side

0.1U_0402_10V6K
PX@

2

M_CLK0
M_CLK#0
M_CKE0

PX@
C540
0.1U_0402_10V6K

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

C475

1

M2
N8
M3

2

VREFCA
VREFDQ

0.1U_0402_10V6K
PX@

2

R5171
40.2_0402_1%
PX@

M_BA0
M_BA1
M_BA2

B1
B9
D1
D8
E2
E8
F9
G1
G9

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

2

PX@
R454
243_0402_1%

1

1

M_CLK0
M_CLK#0

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

DQSL
DQSU

J1
L1
J9
L9

M_DA5
M_DA3
M_DA4
M_DA1
M_DA6
M_DA0
M_DA7
M_DA2

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

B2
D9
G7
K2
K8
N1
N9
R1
R9

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

CK
CK
CKE/CKE0

L8

D7
C3
C8
C2
A7
A2
B8
A3

M_MA0
M_MA1
M_MA2
M_MA3
M_MA4
M_MA5
M_MA6
M_MA7
M_MA8
M_MA9
M_MA10
M_MA11
M_MA12
M_MA13
M_MA14
M_MA15

1

PX@
R464
4.99K_0402_1%

+1.5VS_VGA

BA0
BA1
BA2

T2

DRAM_RST#

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

U1407

M8
H1

+FBA_VREF1

0.1U_0402_10V6K
PX@

15,17

M_MA0
M_MA1
M_MA2
M_MA3
M_MA4
M_MA5
M_MA6
M_MA7
M_MA8
M_MA9
M_MA10
M_MA11
M_MA12
M_MA13
M_MA14
M_MA15

M_DA17
M_DA23
M_DA21
M_DA22
M_DA18
M_DA19
M_DA16
M_DA20

1

15,17
15,17
15,17

PX@
C472
0.1U_0402_10V6K

E3
F7
F2
F8
H3
H8
G2
H7

2

2

2

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

1

1
1

VREFCA
VREFDQ

2

2

U1406

M8
H1

+FBA_VREF0

PX@
R453
4.99K_0402_1%

B

PX@
R463
4.99K_0402_1%

D

D

Compal Secret Data

Security Classification
Issued Date

2013/01/11

Deciphered Date

2013/12/31

Compal Electronics, Inc.
SUN_VRAM
A Lower
Size Document Number
Custom
LA-A996P
of
Monday, February 17, 2014
16
46
Date:
Sheet
Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1

2

3

4

5

Rev
0.1

1

2

3

4

5

Memory Partition A - Upper 32 bits
+1.5VS_VGA

1

1

+1.5VS_VGA

PX@
R461
4.99K_0402_1%

M_DQS[7..0]

15,16

M_DQS#[7..0]

M_DQM[7..0]
M_DQS[7..0]

1

PX@
R459
4.99K_0402_1%

M_DQS#[7..0]

2

15,16
15,16
15,16

M_BA0
M_BA1
M_BA2

15
15
15

M_CLK1
M_CLK#1
M_CKE1

15
15
15
15
15

B

VRAM_ODT1
M_CS#1
M_RAS#1
M_CAS#1
M_WE#1

15,16

M_MA0
M_MA1
M_MA2
M_MA3
M_MA4
M_MA5
M_MA6
M_MA7
M_MA8
M_MA9
M_MA10
M_MA11
M_MA12
M_MA13
M_MA14
M_MA15

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

M_BA0
M_BA1
M_BA2

M2
N8
M3

M_CLK1
M_CLK#1
M_CKE1

J7
K7
K9

VRAM_ODT1
M_CS#1
M_RAS#1
M_CAS#1
M_WE#1

K1
L2
J3
K3
L3

M_DQS4
M_DQS5

F3
C7

M_DQM4
M_DQM5

E7
D3

M_DQS#4
M_DQS#5

G3
B7

2
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

CK
CK
CKE/CKE0
ODT/ODT0
CS/CS0
RAS
CAS
WE

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

DQSL
DQSU
DML
DMU

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

DQSL
DQSU

RESET

NC/ODT1
NC/CS1
NC/CE1
NCZQ1

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

1
2

2

M_DA41
M_DA44
M_DA43
M_DA45
M_DA42
M_DA46
M_DA40
M_DA47

M_MA0
M_MA1
M_MA2
M_MA3
M_MA4
M_MA5
M_MA6
M_MA7
M_MA8
M_MA9
M_MA10
M_MA11
M_MA12
M_MA13
M_MA14
M_MA15

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

1

PX@
R462
4.99K_0402_1%

2

M_BA0
M_BA1
M_BA2

M2
N8
M3

M_CLK1
M_CLK#1
M_CKE1

J7
K7
K9

VRAM_ODT1
M_CS#1
M_RAS#1
M_CAS#1
M_WE#1

K1
L2
J3
K3
L3

M_DQS6
M_DQS7

F3
C7

M_DQM6
M_DQM7

E7
D3

M_DQS#6
M_DQS#7

G3
B7

DRAM_RST#

T2

PX@
C539
0.1U_0402_10V6K

B2
D9
G7
K2
K8
N1
N9
R1
R9

PX@
C507
0.01U_0402_25V7K

A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

E3
F7
F2
F8
H3
H8
G2
H7

M_DA49
M_DA53
M_DA51
M_DA54
M_DA50
M_DA55
M_DA48
M_DA52

D7
C3
C8
C2
A7
A2
B8
A3

M_DA60
M_DA59
M_DA63
M_DA56
M_DA62
M_DA57
M_DA61
M_DA58

A

+1.5VS_VGA

BA0
BA1
BA2

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

CK
CK
CKE/CKE0
ODT/ODT0
CS/CS0
RAS
CAS
WE

B1
B9
D1
D8
E2
E8
F9
G1
G9

DML
DMU

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

DQSL
DQSU

RESET
ZQ/ZQ0

J1
L1
J9
L9

PX@
R444
243_0402_1%

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

DQSL
DQSU

L8

B2
D9
G7
K2
K8
N1
N9
R1
R9

+1.5VS_VGA

NC/ODT1
NC/CS1
NC/CE1
NCZQ1

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ

A1
A8
C1
C9
D2
E9
F1
H2
H9

B

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9

96-BALL
SDRAM DDR3
H5TC2G63FFR-11C_FBGA96
X76@

96-BALL
SDRAM DDR3
H5TC2G63FFR-11C_FBGA96
X76@

C

VREFCA
VREFDQ

+1.5VS_VGA

1

ZQ/ZQ0

J1
L1
J9
L9

PX@
R410
243_0402_1%

2
1

D7
C3
C8
C2
A7
A2
B8
A3

M8
H1

+1.5VS_VGA

BA0
BA1
BA2

L8
R5172
40.2_0402_1%
PX@

2

R5173
40.2_0402_1%
PX@

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15/BA3

DRAM_RST# T2

DRAM_RST#

1

1

M_CLK1
M_CLK#1

PX@
C473
0.1U_0402_10V6K

U1409
+FBA_VREF3

C

+1.5VS_VGA

+1.5VS_VGA

2

2

C537

C493

C489

C488

1

1

2

0.1U_0402_10V6K
PX@

2

1

0.1U_0402_10V6K
PX@

2

1

0.1U_0402_10V6K
PX@

C484

C522

C538

C487

2

1

0.1U_0402_10V6K
PX@

2

1

0.1U_0402_10V6K
PX@

2

1

0.1U_0402_10V6K
PX@

2

1

1U_0402_6.3V4Z
@

C523

C500

2

1

1U_0402_6.3V4Z
PX@

2

1

1U_0402_6.3V4Z
PX@

C503

C501

C502

2

1

1U_0402_6.3V4Z
PX@

2

1

1U_0402_6.3V4Z
PX@

2

1

1U_0402_6.3V4Z
PX@

C530

C535

C529

C509

C505

C508

C504

C528

C492

2

1

1U_0402_6.3V4Z
PX@

2

1

10U_0603_6.3V6M
PX@

2

1

0.1U_0402_10V6K
@

2

1

0.1U_0402_10V6K
PX@

2

1

U1409 side

0.1U_0402_10V6K
PX@

2

1

0.1U_0402_10V6K
PX@

2

1

0.1U_0402_10V6K
PX@

2

1

0.1U_0402_10V6K
PX@

2

1

1U_0402_6.3V4Z
@

1

0.1U_0402_10V6K
PX@

2

C536

1

1U_0402_6.3V4Z
PX@

2

C527

C513

C524

C526

2

1

1U_0402_6.3V4Z
PX@

2

1

1U_0402_6.3V4Z
PX@

2

1

1U_0402_6.3V4Z
PX@

1

1U_0402_6.3V4Z
PX@

10U_0603_6.3V6M
PX@

2

C525

1

1U_0402_6.3V4Z
PX@

C495

U1408 side

C494

M_DQM[7..0]

15,16

VREFCA
VREFDQ

M_DA38
M_DA36
M_DA37
M_DA35
M_DA39
M_DA32
M_DA34
M_DA33

2

15,16

M_MA[15..0]

E3
F7
F2
F8
H3
H8
G2
H7

1

M_MA[15..0]

M8
H1

+FBA_VREF2

2

15,16

M_DA[63..0]

2

M_DA[63..0]

1

15,16

2

A

U1408

1

2

0.1U_0402_10V6K
@

PX@
R458
4.99K_0402_1%

D

D

Compal Secret Data

Security Classification
Issued Date

2013/01/11

Deciphered Date

2013/12/31

Compal Electronics, Inc.
SUN_VRAM
A Upper
Size Document Number
Custom
LA-A996P
of
Monday, February 17, 2014
17
46
Date:
Sheet
Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1

2

3

4

5

Rev
0.1

A

B

+1.35V_VDDQ

2

DDRAB_SDQ2
DDRAB_SDQ3
DDRAB_SDQ8
DDRAB_SDQ9

1

5
5

DDRAB_SDQS1#
DDRAB_SDQS1

DDRAB_SDQS1#
DDRAB_SDQS1

DDRAB_SDQ10
DDRAB_SDQ11
DDRAB_SDQ16
DDRAB_SDQ17
5
5

DDRAB_SDQS2#
DDRAB_SDQS2

DDRAB_SDQS2#
DDRAB_SDQS2

DDRAB_SDQ18
DDRAB_SDQ19
DDRAB_SDQ24
DDRAB_SDQ25
DDRAB_SDM3
DDRAB_SDQ26
DDRAB_SDQ27

5
5

DDRA_CKE0

DDRA_CKE0

DDRAB_SBS2#

DDRAB_SBS2#

DDRAB_SMA12
DDRAB_SMA9

+3VS



1
CD17
.1U_0402_16V7K

205
2

G1

G2

+1.35V_VDDQ/+0.675VS OF DIMM1

5

+1.35V_VDDQ

+0.6V_0.675VS

DDRAB_SMA11
DDRAB_SMA7
DDRAB_SMA6
DDRAB_SMA4
DDRAB_SMA2
DDRAB_SMA0
DDRA_CLK1
DDRA_CLK1#
DDRAB_SBS1#
DDRAB_SRAS#
DDRA_SCS0#
DDRA_ODT0
DDRA_ODT1

DDRA_CLK1
5
DDRA_CLK1#
5
DDRAB_SBS1#
DDRAB_SRAS#

5
5

@

DDRA_SCS0#
5
DDRA_ODT0 5
DDRA_ODT1

1

2

1

2

1

2

@

1

2

1

2

@

1

2

@

1

2

1

2

1

2

@

1
1

+

2

2

@
CD18
330U_B2_2.5VM_R15M
SGA00004400

1

2

4.7U_0603_6.3V6K

DDRAB_SDQ58
DDRAB_SDQ59

DDRA_CKE1

DDRAB_SMA15
DDRAB_SMA14

.1U_0402_16V7K

DDRAB_SDM7

DDRA_CKE1

CD14

DDRAB_SDQ56
DDRAB_SDQ57

5
5

CD13

DDRAB_SDQ50
DDRAB_SDQ51

DDRAB_SDQS3#
DDRAB_SDQS3

DDRAB_SDQ30
DDRAB_SDQ31

.1U_0402_16V7K

DDRAB_SDQS6#
DDRAB_SDQS6

DDRAB_SDQS6#
DDRAB_SDQS6

DDRAB_SDQS3#
DDRAB_SDQS3

.1U_0402_16V7K

5
5

DDRAB_SDQ28
DDRAB_SDQ29

CD12

3

DDRAB_SDQ22
DDRAB_SDQ23

CD11

DDRAB_SDQ48
DDRAB_SDQ49

DDRAB_SDM2

.1U_0402_16V7K

DDRAB_SDQ42
DDRAB_SDQ43

DDRAB_SDQ20
DDRAB_SDQ21

.1U_0402_16V7K

DDRAB_SDM5

DDRAB_SDQ14
DDRAB_SDQ15

CD10

DDRAB_SDQ40
DDRAB_SDQ41

5

.1U_0402_16V7K

DDRAB_SDQ34
DDRAB_SDQ35

MEM_MAB_RST#

CD9

DDRAB_SDQS4#
DDRAB_SDQS4

DDRAB_SDQS4#
DDRAB_SDQS4

1

DDRAB_SDM1
MEM_MAB_RST#

.1U_0402_16V7K

5
5

DDRAB_SDQ12
DDRAB_SDQ13

CD8

DDRAB_SDQ32
DDRAB_SDQ33

5

DDRAB_SDQ6
DDRAB_SDQ7

.1U_0402_16V7K

DDRAB_SMA13
DDRA_SCS1#

DDRA_SCS1#

5
5

DDRAB_SMA[0..15]

CD7

5

DDRAB_SDQ[0..63]
DDRAB_SDM[0..7]

.1U_0402_16V7K

5

DDRAB_SMA[0..15]

5

CD6

DDRAB_SWE#
DDRAB_SCAS#

DDRAB_SWE#
DDRAB_SCAS#

5

.1U_0402_16V7K

DDRAB_SMA10
DDRAB_SBS0#

DDRAB_SBS0#

5

DDRAB_SDQS0#
DDRAB_SDQS0

CD5

5

DDRA_CLK0
DDRA_CLK0#

DDRA_CLK0
DDRA_CLK0#

74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

DDRAB_SDM[0..7]
DDRAB_SDQS0#
DDRAB_SDQS0

.1U_0402_16V7K

5
5

CKE1
VDD2
A15
A14
VDD4
A11
A7
VDD6
A6
A4
VDD8
A2
A0
VDD10
CK1
CK1#
VDD12
BA1
RAS#
VDD14
S0#
ODT0
VDD16
ODT1
NC2
VDD18
VREF_CA
VSS28
DQ36
DQ37
VSS30
DM4
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
DM6
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
SDA
SCL
VTT2

DDRAB_SDQ[0..63]

DDRAB_SDQ4
DDRAB_SDQ5

CD4

DDRAB_SMA3
DDRAB_SMA1

2

CKE0
VDD1
NC1
BA2
VDD3
A12/BC#
A9
VDD5
A8
A5
VDD7
A3
A1
VDD9
CK0
CK0#
VDD11
A10/AP
BA0
VDD13
WE#
CAS#
VDD15
A13
S1#
VDD17
NCTEST
VSS27
DQ32
DQ33
VSS29
DQS#4
DQS4
VSS32
DQ34
DQ35
VSS34
DQ40
DQ41
VSS36
DM5
VSS37
DQ42
DQ43
VSS39
DQ48
DQ49
VSS41
DQS#6
DQS6
VSS44
DQ50
DQ51
VSS46
DQ56
DQ57
VSS48
DM7
VSS49
DQ58
DQ59
VSS51
SA0
VDDSPD
SA1
VTT1

VSS1
DQ4
DQ5
VSS3
DQS#0
DQS0
VSS6
DQ6
DQ7
VSS8
DQ12
DQ13
VSS10
DM1
RESET#
VSS12
DQ14
DQ15
VSS14
DQ20
DQ21
VSS16
DM2
VSS17
DQ22
DQ23
VSS19
DQ28
DQ29
VSS21
DQS#3
DQS3
VSS24
DQ30
DQ31
VSS26

CD3

DDRAB_SMA8
DDRAB_SMA5

73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203

VREF_DQ
VSS2
DQ0
DQ1
VSS4
DM0
VSS5
DQ2
DQ3
VSS7
DQ8
DQ9
VSS9
DQS#1
DQS1
VSS11
DQ10
DQ11
VSS13
DQ16
DQ17
VSS15
DQS#2
DQS2
VSS18
DQ18
DQ19
VSS20
DQ24
DQ25
VSS22
DM3
VSS23
DQ26
DQ27
VSS25

1
2

2

@

0.1UX10

5

15mil
+VREF_CA
DDRAB_SDQ36
DDRAB_SDQ37
DDRAB_SDM4
DDRAB_SDQ38
DDRAB_SDQ39
DDRAB_SDQ44
DDRAB_SDQ45
DDRAB_SDQS5#
DDRAB_SDQS5

1

2

DDRAB_SDQS5#
DDRAB_SDQS5

2

CD16

DDRAB_SDM0

E

+1.35V_VDDQ

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72

CD15

DDRAB_SDQ0
DDRAB_SDQ1

CD2

1

D

CONN@
JDIMM1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71

.1U_0402_16V7K

1

CD1

2

1000P_0402_50V7K

.1U_0402_16V7K

15mil

1000P_0402_50V7K

+VREF_DQ

C

1

VREF for DIMM1
5
5
+VREF_DQ

DDRAB_SDQ46
DDRAB_SDQ47

+1.35V_VDDQ
RPD2
1
2
3
4

+VREF_CA

DDRAB_SDQ52
DDRAB_SDQ53

8
7
6
5

DDRAB_SDM6

3

1K_0804_8P4R_1%
DDRAB_SDQ54
DDRAB_SDQ55
DDRAB_SDQ60
DDRAB_SDQ61
DDRAB_SDQS7#
DDRAB_SDQS7

DDRAB_SDQS7#
DDRAB_SDQS7

5
5

DDRAB_SDQ62
DDRAB_SDQ63
MEM_MAB_EVENT#

MEM_MAB_EVENT# 5
APU_SDATA0 27,9
APU_SCLK0 27,9

+0.6V_0.675VS

206

TE_2-2013287-5

DIMM_1 H:4mm Reverse

4

4

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2013/02/26

Deciphered Date

2015/07/08

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

A

B

C

D

DDR3 SODIMM Socket
Document Number

Rev
0.1

LA-A996P
Sheet

Monday, February 17, 2014
E

18

of

46

3

Camera
Display@
5

IN

OUT

4

SS

EN

1

APL3512_SOT23-5

2

2

UG1
2132S@
APL3512_SOT23-5
SA00003AR00

+DP_ENVDD

2

1

2

4

4

3

3

USB20_P4_R

1

R171

3
PESD5V0U2BT_SOT23-3

2 0_0402_5%

@

@EMI@ C117
680P_0402_50V7K

@ESD@ SCA00000U10

2

0_0402_5%

1

R172

1

2

2

2 2.2K_0402_5%

4

USB20_N5

2

USB20_P5_R

3

USB20_N5_R

2 2.2K_0402_5%

C118
68P_0402_50V8J

3

2

USB20_N5_R

3

1

PESD5V0U2BT_SOT23-3
@ESD@ SCA00000U10

R173

1

2 0_0402_5%

@

2

+VCC_TOUCH
1 10P_0402_50V8J
@ C290

1

1 220P_0402_50V7K INVTPWM

C122 2

1 220P_0402_50V7K DISPOFF#

EDP@
QTS1
2N7002_SOT23

CTS2
1
2
EDP@

D

+3VALW

EDP@
RTS3
100K_0402_5%

D

2
G

TOUCH_ON#

28

S

0.047U_0402_16V7K
3RTS5

1

@

1 EDP@
RTS6
1 EDP@
CTS1
QTS2
0.1U_0402_16V4Z EDP@
LP2301ALT1G 1P SOT-23-3
2

2

C121 2

EDP@
RTS1
1K_0402_5%

2 0_0402_5%

+5VS

2 0_0402_5%

+3VS

S

2

@ C120
10P_0402_50V8J

D

1

SM010014520 3000ma
220ohm@100mhz
DCR 0.04

+5VALW

G

1

2 SM010014520
0_0805_5%

@ RTS2
100K_0402_5%

2

LCD_DATA

4

USB20_P5_R

WCM-2012-900T_4P
@ R202
300_0402_5%

LCD_CLK

2 SM010014520
0_0805_5%

1 EMI@
L2

D4

2

+3VS

1 EMI@
L1

2 0_0402_5%

@

EMI@
SM070003Y00
1
2

L3 1

USB20_P5

1

7

C

1

Touch Screen Power

0_0402_5%

7

@ C119
10P_0402_50V8J

USB20_N4_R

WCM-2012-900T_4P

USB20_N4

R161 1

2

Touch Screen

BLVDS@
RG4 1

R160 1

USB20_P4_R

1

27

Display@
RG3 1

D5

USB20_N4_R

2

DP_ENVDD

USB20_P4

2

3

6

7

L12 1

1

1500P_0402_50V7K

USB20_N4

B+

1

3

CG1
D

7

W=60mils
INVPWR_B+

2

2 0_0201_5%
1

+LCDVDD

EMI@
SM070003Y00
1
2

2
CG3
0.1U_0402_16V7K

@

1
CG2
4.7U_0603_6.3V6K

1

W=60mils

2 0_0402_5%

@

UG1

GND
RG1

1

R170

1

2

+3VS

2

1

4

1

5

LVDS Power

C

LCD/LED PANEL Conn.
+LCDVDD

EC_INVT_PWM

27,6

DP_INT_PWM

R2591

@

2

R258 1 Display@2 0_0402_5%

BLVDS@
eDP_DP_INT_PWM

R262

27
27
R163
10K_0402_5%

LVDS_TXP0_F
LVDS_TXN0_F
LVDS_TXP1_F
LVDS_TXN1_F

27 LVDS_TXP1_F
27 LVDS_TXN1_F

LVDS_TXP2_F
LVDS_TXN2_F

27 LVDS_TXP2_F
27 LVDS_TXN2_F

B

9
28

TS_GPIO_APU
TS_GPIO_EC

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40

LCD_CLK
LCD_DATA

LCD_CLK
LCD_DATA

27 LVDS_TXP0_F
27 LVDS_TXN0_F

1 BLVDS@2 0_0402_5%
2

27

CONN@
JLVDS1

INVTPWM
0_0402_5%

1

28

TS_GPIO_APU
TS_GPIO_EC

1
R260
1
R261

@

2

@

2

LVDS_CLKP_F
LVDS_CLKN_F

27 LVDS_CLKP_F
27 LVDS_CLKN_F

TS_GPIO
0_0402_5%

USB20_N4_R
USB20_P4_R

0_0402_5%

USB20_P5_R
USB20_N5_R

R166
1

DISPOFF#

2

DISPOFF#_R
INVTPWM
TS_GPIO

33_0402_5%

1

27

R1671
10K_0402_5%

INVPWR_B+

2

+VCC_TOUCH
+3VS

D3
D_MIC_L_CLK

2

D_MIC_L_DATA

3

26
26

1

D_MIC_L_CLK
D_MIC_L_DATA
27,6

D_MIC_L_CLK
D_MIC_L_DATA
RT19 1 EDP@

EDP_HPD

2 0_0402_5%

PESD5V0U2BT_SOT23-3
A

@ESD@ SCA00000U10

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40

G1
G2
G3
G4
G5
G6

41
42
43
44
45
46

B

A

STARC_107K40-000001-G2

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2013/02/26

2015/07/08

Deciphered Date

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

LVDS Connector
Document Number

Rev
0.1

LA-A996P

Wednesday, March 26, 2014

Sheet
1

19

of

46

4

3

0.1U_0402_16V7K
0.1U_0402_16V7K

1
1

2
2

C123
C124

APU_DP1_TXP3
APU_DP1_TXN3

APU_DP1_TXP2_C
APU_DP1_TXN2_C

0.1U_0402_16V7K
0.1U_0402_16V7K

1
1

2
2

C125
C126

APU_DP1_TXP2
APU_DP1_TXN2

APU_DP1_TXP1_C
APU_DP1_TXN1_C

0.1U_0402_16V7K
0.1U_0402_16V7K

1
1

2
2

C127
C128

APU_DP1_TXP1
APU_DP1_TXN1

APU_DP1_TXP0_C
APU_DP1_TXN0_C

0.1U_0402_16V7K
0.1U_0402_16V7K

1
1

2
2

C129
C130

APU_DP1_TXP0
APU_DP1_TXN0

6

4

DP1_AUXP

DP1_AUXP

3

RPH2
499_0804_8P4R_1%

HDMI_SCLK

HDMI_SDATA

1
R180 1

@

6
6

Data1

APU_DP1_TXP0
APU_DP1_TXN0

6
6

Data2

D

2 0_0402_5% 2
G

Q17
SSM3K7002FU_SC70-3

3

1

+3VS

Data0

APU_DP1_TXP1
APU_DP1_TXN1

NET: HDMIRES_GND
WIDTH>20 mils

2

6

2N7002KDW_SOT363-6
Q6A

6
6

D

+3VS

1

DP1_AUXN

DP1_AUXN

CLK

APU_DP1_TXP2
APU_DP1_TXN2

HDMIRES_GND

6

6
6

RPH1
499_0804_8P4R_1%

1
2
3
4

2N7002KDW_SOT363-6
Q6B

APU_DP1_TXP3
APU_DP1_TXN3

8
7
6
5

5

D

1

APU_DP1_TXP3_C
APU_DP1_TXN3_C

8
7
6
5

+3VS

2

1
2
3
4

5

2

R181
100K_0402_5%

S

+3VS

SM070001310 400ma 90ohm@100mhz DCR 0.3
C

C

1

2

1

3

R183
1M_0402_5%

2

2 22_0402_5%

HDMI_R_D0+

RP1
APU_DP1_TXP2_C

R187

4
WCM-2012-900T_0805
L6@EMI@
1
APU_DP1_TXN2_C

R190

1 EMI@
4

3

1

2

6

+3VS
DP1_AUXN
DP1_AUXP
HDMI_SCLK
HDMI_SDATA

3

1
2
3
4

3

DP1_HPD

L5
R184
CHILISIN PBY160808T
1
2
1
2
HP_DETECT
10K_0402_5%
1

Q15
SSM3K7002FU_SC70-3

+HDMI_5V_OUT

8
7
6
5

1HDMI_DETECT
D

HDMI_R_CK-

S

2 22_0402_5%
EMI@

1

3

R185
100K_0402_5%

4.7K_0804_8P4R_5%

1

2

C131
220P_0402_50V7K

2

R186

4

HDMI_R_CK+

G

APU_DP1_TXN3_C

2 22_0402_5%

2

4
WCM-2012-900T_0805
L4@EMI@
1

1 EMI@

1

R182

2

APU_DP1_TXP3_C

2

5V Level

2 22_0402_5%

HDMI_R_D0-

2 22_0402_5%

HDMI_R_D1+

EMI@
APU_DP1_TXP1_C

R191

4
WCM-2012-900T_0805
L7@EMI@
1
B

APU_DP1_TXN1_C

R192

1 EMI@
4

3

1

2

1

3
2

8/20 change HDMI Conn

2 22_0402_5%

HDMI Conn.

APU_DP1_TXP0_C

R193

4
WCM-2012-900T_0805
L8@EMI@
1
APU_DP1_TXN0_C

R194

1 EMI@

CONN@
JHDMI1

2 22_0402_5%

4

3

1

2

1

B

HDMI_R_D1-

EMI@
HDMI_R_D2+

HP_DETECT
+HDMI_5V_OUT

3
2

2 22_0402_5%

HDMI_R_D2-

HDMI_SDATA
HDMI_SCLK

HP_DETECT

@ESD@
DM6
1 1

109

HP_DETECT

HDMI_SDATA

2 2

98

HDMI_SDATA

HDMI_R_CK-

HDMI_SCLK

4 4

77

HDMI_SCLK

HDMI_R_CK+
HDMI_R_D0-

5 5

66

EMI@

HDMI_R_D0+
HDMI_R_D1-

3 3
8

HDMI_R_D1+
HDMI_R_D2IP4292CZ10-TB
SC300002800

+HDMI_5V_OUT

HDMI_R_D2+

URH1

19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

HP_DET
+5V
DDC/CEC_GND
SDA
SCL
Reserved
CEC
CKGND
CK_shield GND
CK+
GND
D0GND
D0_shield
D0+
D1D1_shield
D1+
D2D2_shield
D2+

20
21
22
23

CONCR_099AKAC19NBLCNF

2

W=40mils

GND
IN

3

A

1

W=40mils

1

+5VS
A

OUT
SA00004ZA00
AP2330W-7_SC59-3

CG4
0.1U_0402_16V7K 2

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2013/02/26

Issued Date

Deciphered Date

2015/07/08

Title

HDMI Connector

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev
0.1

LA-A996P

Date:

5

4

3

2

Monday, February 17, 2014

Sheet
1

20

of

46

B

C

DT3
6

DAC_C_BLU

D

@ESD@
SC300001G00

I/O4

DT4

I/O2

3

DAC_C_GRN

+HDMI_5V_OUT

@ESD@
SC300001G00

I/O4

I/O2

VDD

GND

I/O3

I/O1

3

CRT_VSYNC_2

+HDMI_5V_OUT
5

1

4

VDD

GND

I/O3

I/O1

2

5

1

DAC_C_RED

4

CRT_DATA

AZC099-04S.R7G_SOT23-6

2

1

1

CRT_CLK
T16

AZC099-04S.R7G_SOT23-6

CONN@
JCRT

@

6
11
1
7
12
2
8
13
3
9
14
4
10
15
5

DAC_C_RED
CRT_DATA
DAC_C_GRN
CRT_HSYNC_2
DAC_C_BLU
+HDMI_5V_OUT

1
LT5
4

CRT_VSYNC_2
1
1

@
CT10
10P_0402_50V8J

CRT_HSYNC_1

UT2 CRT@
74AHCT1G125GW_SOT353-5

3

2
10_0402_5%

1

2

@

CRT@
CT7
2 10P_0402_50V8J

2

CRT_CLK
1

2

SUYIN_070546FR015S265ZR

+HDMI_5V_OUT

@

4

CRT_VSYNC_1

DAC_GRN

6

DAC_BLU

DAC_DDC_DATA

6

DAC_DDC_CLK

1

6

CRT_DATA

Q4101A CRT@
2N7002KDWH_SOT363-6

4

DAC_DDC_CLK

DAC_C_BLU

2

3

CRT_CLK

Q4101B CRT@
2N7002KDWH_SOT363-6

CRT@
1
CT6

CT5

CRT@
1

68P_0402_50V8J

2

68P_0402_50V8J

CRT@
1
CT4

2

DAC_DDC_DATA

3

DAC_C_GRN

68P_0402_50V8J

2

CRT@
1
CT3

CT2

CRT@
1

68P_0402_50V8J

CT1

2

68P_0402_50V8J

68P_0402_50V8J

CRT@
1

6

DAC_C_RED

5

6

CRT@ SHI0110BJ50
2
LT1 1
100NH +-5% HCI1608F-R10J-M
CRT@ SHI0110BJ50
2
LT2 1
100NH +-5% HCI1608F-R10J-M
CRT@ SHI0110BJ50
2
LT3 1
100NH +-5% HCI1608F-R10J-M

2

1
DAC_RED

CRT@

2.2K_0402_5%

6

CRT@

CRT@
RT2

RT3
2.2K_0402_5%

3

+HDMI_5V_OUT

RT4

CRT@
RT1

+3VS

2

+3VS

2

3

UT3 CRT@
74AHCT1G125GW_SOT353-5

1

Y

4.7K_0402_5%

G

A

4.7K_0402_5%

5
P

OE#

2

DAC_VSYNC

DAC_VSYNC

T19

1

CRT@
2 0.1U_0402_16V4Z
CT11 1

6

2

16 GND
17 GND

CRT@
CT12
100P_0402_50V8J

1

OE#

Y

CRT_HSYNC_2

2

5
G

A

2
10_0402_5%
CRT@

1

P
2

DAC_HSYNC

DAC_HSYNC

1
LT4

2
1
10K_0402_5%

W=40mils

0.1U_0402_16V4Z
CT8

CRT@
1
2
CT9 0.1U_0402_16V4Z

6

CRT@

CRT@
RT5

2

+HDMI_5V_OUT
CRT_VSYNC_2

+HDMI_5V_OUT

2

CRT share HDMI Power

6

CRT_HSYNC_2

E

1

A

2

CRT@
RPC13

4

DAC_RED
DAC_GRN
DAC_BLU

1
2
3
4

4

8
7
6
5

Issued Date

150_0804_8P4R_1%

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2013/02/26

Deciphered Date

2015/07/08

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

A

B

C

D

CRT Connector
Document Number

Rev
0.1

LA-A996P
Friday, February 21, 2014

Sheet
E

21

of

46

5

4

3

2

1

WL_OFF# 0_0402_5% 2

1 RC162

@

APU_WL_OFF#

APU_WL_OFF#

9

1

+3VS_WLAN

+3VS_WLAN

RN2

WLAN_WAKE#

2

@

1 0_0402_5%
APU_BT_ON#

9

MINI1_CLKREQ#

7
7

5
5

PCIE_ARX_DTX_N2
PCIE_ARX_DTX_P2
5
5

C

CLK_PCIE_MINI1#
CLK_PCIE_MINI1

PCIE_ATX_C_DRX_N2
PCIE_ATX_C_DRX_P2

E51TXD_P80DATA
E51RXD_P80CLK

28 E51TXD_P80DATA
28 E51RXD_P80CLK

17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

APU_BT_ON#

1

RC160

2 1K_0402_1% E51RXD_P80CLK

1
3
5
7
9
11
13
15

2
4
6
8
10
12
14
16

17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

2
4
6
8
10
12
14
16

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

WL_OFF#
PLT_RST#
+3VS_WLAN

11,24,31,9

C

RN4
RN5

USB20_N3_R
USB20_P3_R

1
1

@
@

2 0_0402_5%
2 0_0402_5%

USB20_N3
USB20_P3

7
7

MINI1_LED#

GND1
GND2

28

BELLW_80053-1021

RN7
4.7K_0402_5%
2

APU_BT_ON#

D

JMINI1 CONN@
1
3
5
7
9
11
13
15

53
54
9

+3VS_WLAN

1

28

+1.5VS_WLAN

@ RN3
10K_0402_5%
2

D

+1.5VS_WLAN

1

RN1
@

@R205
300_0402_5%

B

2

0_0603_5%

1
@ CN1
2

2

B

USB20_N3_R
1

+3VS_WLAN
+1.5VS

1 10P_0402_50V8J
@ C292

4.7U_0603_6.3V6K

2
+3VS_WLAN_R

1

+3VS_WLAN

R271
@

2
1

2

CN2
4.7U_0603_6.3V6K

1

2

CN3
0.1U_0402_16V7K

0_0603_5%

A

A

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2013/02/26

Deciphered Date

2015/07/08

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

WLAN
Document Number

Rev
0.1

LA-A996P
Monday, February 17, 2014

Sheet
1

22

of

46

5

4

2.5" SATA HDD connector

3

CONN@
JHDD

0_0603_5%
@

2

R212 1

@

2

+5VS_HDD1

0_0603_5%

2

1

2

SATA_ITX_C_DRX_P0
SATA_ITX_C_DRX_N0

7
7

C150
0.1U_0402_16V7K

1

C149
10U_0603_6.3V6M

+5VS

R201 1

1

+5VS_HDD1
7
7

D

2

SATA_PRX_DTX_N0
SATA_PRX_DTX_P0

C155 1
C156 1

2 0.01U_0402_16V7K
2 0.01U_0402_16V7K

SATA_ITX_DRX_P0
SATA_ITX_DRX_N0

C153 1
C154 1

2 0.01U_0402_16V7K
2 0.01U_0402_16V7K

SATA_PRX_C_DTX_N0
SATA_PRX_C_DTX_P0

1
2
3
4
5
6
7

GND
A+
AGND
BB+
GND

GND
GND

23
24

D

+3VS
9

DEVSLP0

RS11 1

@

2 0_0402_5%

RS12 1

@

2 0_0402_5%

8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

JHDD_P10

+5VS_HDD1

VCC3.3
VCC3.3
VCC3.3
GND
GND
GND
VCC5
VCC5
VCC5
GND
RESERVED
GND
VCC12
VCC12
VCC12
SANTA_193202-1

C

C

+5VS_ODD

Pleace near ODD Connector

Change ODD Conn 08/22, check pin define

7
7

U20

5

WL_PWREN_EC

2

GND

ON2

CT2

VIN2
VIN2

VOUT2
VOUT2
GPAD

11

560P_0402_50V7K
C230
2
1

10
9
8

1

TPS22966DPUR_SON14_2X3

2

2
2

1 0.01U_0402_16V7K
1 0.01U_0402_16V7K

SATA_PRX_DTX_N1
SATA_PRX_DTX_P1

+3VS
ODD_PLUG#

R955 2

@

110K_0402_5%
8
9
10
11
12
13

ODD_DA#_M

+3VS_WLAN_R

100P_0402_50V8J

15

CS15
CS18

9

+3VS

C223
1U_0603_10V4Z

1

C224
1U_0603_10V4Z

2

C228
10U_0603_6.3V6M

1

6
7

VBIAS

C226
1
2

12

SATA_PRX_DTX_N1_C
SATA_PRX_DTX_P1_C

+3VS
1
2

28
+3VALW

CT1

7
7

SATA_PTX_DRX_P1
SATA_PTX_DRX_N1

R954
10K_0402_5%

9

ODD_DA#

ODD_DA# 1

3

1

4

+5VALW

ON1

14
13

1 0.01U_0402_16V7K
1 0.01U_0402_16V7K

2

3

ODD_PWR

VOUT1
VOUT1

2
2

1
2
3
4
5
6
7

2

GND
RX+
RXGND
TXTX+
GND
DP
+5V
+5V
MD
GND
GND

B

GND1
GND2

14
15

OCTEK_SLS-13HCAB
CS17
0.1U_0402_25V6K
ESD@

G

9

VIN1
VIN1

CS11
CS14

ODD_DA#_M

Place CS17 close to JODD

S

2

1
2

@

SATA_PTX_DRX_P1_C
SATA_PTX_DRX_N1_C

D

1

C229
10U_0603_6.3V6M

C227
10U_0603_6.3V6M

2

2

CS12
10U_0805_10V6K

+5VS_ODD

1

2

1

CONN@
JODD

+5VS

B

1

CS13
0.1U_0402_25V6K

2

CS16
1000P_0402_50V7K

1

Q84
2N7002K_SOT23-3

A

A

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2013/02/26

Deciphered Date

2015/07/08

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

ODD/SATA Conn
Document Number

Rev
0.1

LA-A996P
Monday, February 17, 2014

Sheet
1

23

of

46

8/15 Change to LDO Mode

JUMP_43X79

LL1 1

3

8151/8166 Co‐Lay

1
2
4
5
6
7
9
10

LAN_CLKREQ#_R

12
19

CL10& CL16 close to UL1: Pin 23
LAN_CLKREQ#2
PLT_RST#

9 LAN_CLKREQ#
11,22,31,9 PLT_RST#

CL20 close to UL1: Pin 11

C

13
14
2 0.1U_0402_10V7K PCIE_ARX_C_DTX_P3 17
2 0.1U_0402_10V7K PCIE_ARX_C_DTX_N3 18

PCIE_ATX_C_DRX_P3
PCIE_ATX_C_DRX_N3
PCIE_ARX_DTX_P3
CR11 1
PCIE_ARX_DTX_N3
CR13 1

PCIE_ATX_C_DRX_P3
PCIE_ATX_C_DRX_N3
5 PCIE_ARX_DTX_P3
5 PCIE_ARX_DTX_N3

SP050005L00 Footprint

RL11
2.49K_0402_1%

LAN_MDIN1
LAN_MDIP1

7
8
9

LAN_MDIN0
LAN_MDIP0

10
11
12

TCT2
TD2+
TD2-

MCT2
MX2+
MX2-

TCT3
TD3+
TD3-

MCT3
MX3+
MX3-

TCT4
TD4+
TD4-

MCT4
MX4+
MX4-

RJ45_TX3RJ45_TX3+

21
20
19

RJ45_TX2RJ45_TX2+

RP5
1
2
3
4

1
RJ45_TX0RJ45_TX0+

CL1
0.01U_0402_16V7K

1

2

@EMI@
CL4
0.1U_0402_16V7K

YSLC05CH_SOT23-3

1

ESD@
DL1

8151@
GIGA LAN
SP050006800

100 LAN
SP050003P00

0.1U_0402_16V7K

0.1U_0402_16V7K

1
CL26
8166@

(SP050003P00) 10/100
(SP050006800) Giga
SCA00000U10

2

1

CL27
@8166@

2

D

EC_LAN_ISOLATEB#_R 2
1K_0402_5%

1
RM6

2

+3VS

1

+VDDREG=40mil

L

RL10
1
@

CKXTAL1
CKXTAL2

LANWAKEB
EC_LAN_ISOLATEB#_R

27
26
25

LED0
LED1/GPO
LED2

28
29

XTLI
XTLO

XTLI

1
RL50

2

@

2
1M_0402_5%

1
RL7

XTLO

RL15
10K_0402_5%

0_0603_5%

LED0
LED1/GPO
LED2(LED1)

RSET

+VDDREG
+LAN_REGOUT

21
20

0923 PV CNG from DP00 to E500

+LAN_VDD_3V3
+LAN_VDD_3V3

23
24

VDDREG(VDD33)
REGOUT
LANWAKEB
ISOLATEB

HSIP
HSIN
HSOP
HSON

+LAN_VDD_3V3

11
32

AVDD33
AVDD33

REFCLK_P
REFCLK_N

+LAN_REGOUT=60mil

3
8
30
22

AVDD10
AVDD10
AVDD10
DVDD10

RTL8111G

15K_0402_5%

+LAN_VDD_3V3=40mil
+LAN_VDD_1V0

2
0_0402_5%
TH2
TH1
TH3

EC_PME# 28
EC_LAN_ISOLATEB#

YL1

28

EC control 08/17 Add 0ohm

2
CL25
1

2
CL24
1
C

33

GND

25MHZ_20PF_FSX3M-25.M20FDO
SJ10000E500

SA000063500

(SA000063500) 8166GSH 10/100
(SA00005YT00) 8151GH Giga

CL2
SE167100J80
10P_1808_3KV
1

TSL1
2

2

RJ45_RX1RJ45_RX1+

15
14
13

2

JLAN CONN@

75_0804_8P4R_1%
SD300002E80

18
17
16

1

CL15
@8151@

RM11

8151@
RTL8151GH
SA00005YT00

CLKREQB
PERSTB

8
7
6
5

2

4
5
6

24
23
22

3

LAN_MDIN2
LAN_MDIP2

MCT1
MX1+
MX1-

1

Swap P/N 08/16

TCT1
TD1+
TD1-

2

UL1

MDIP0
MDIN0
MDIP1
MDIN1
MDIP2
MDIN2
MDIP3
MDIN3

1

TSL1 8166@
1
2
3

31

1
CL14
8151@

2

RSET

2

10P_0402_25V8J

5
5

15
16

CLK_PCIE_LAN
CLK_PCIE_LAN#

CLK_PCIE_LAN
CLK_PCIE_LAN#

1
CL13

10P_0402_25V8J

7
7

@ RL6 1 0_0201_5%

2

Place CL11~CL13 close UL1 Pin 3, 8 , 22

@

LAN_MDIP0
LAN_MDIN0
LAN_MDIP1
LAN_MDIN1
LAN_MDIP2
LAN_MDIN2
LAN_MDIP3
LAN_MDIN3

1
CL12

CL8 & CL18 close LL2

8166@
UL1

CL19 close to UL1: Pin 32

+V_DAC
LAN_MDIN3
LAN_MDIP3

2

3

2

1
@ CL11

1

CL10

@

2

OSC

CL9 & CL5 close to UL1: Pin 11,32

2

1

OSC

2

@

GND

2

2
1

@ CL29
0.1U_0402_16V7K

CL16
0.1U_0402_16V7K

2

@ CL5

1

4.7U_0603_6.3V6K

2

CL9

1

0.1U_0402_16V7K

@ CL19

1

0.1U_0402_16V7K

1

4.7U_0603_6.3V6K

1

4.7U_0603_6.3V6K

@8151@
CL20

2

LL2, CL8, CL23 for 8161

1
+VDDREG

+LAN_VDD_3V3

1

@

1U_0402_6.3V6K

2

1 10K_0402_5%
LAN_PWR_EN_R

@

CL14 & CL15 close UL1 Pin22

1U_0402_6.3V6K

1

RL29 2

LAN_PWR_EN

+LAN_VDD_1V0

CL26 & CL27 close UL1 Pin30

1
2
2.2UH +-5% NLC252018T-2R2J-N

+LAN_REGOUT

CL21
28

SMT

@ LL2

APL3512_SOT23-5

2

1500P_0402_50V7K

CL8,CL23@
20_0603_5%

0.1U_0402_16V7K

EN

@ CL28
D

@

0.1U_0402_16V7K

SS

+LAN_VDD_3V3

0.1U_0402_16V7K

4

20_0201_5% 1

@

SMT

2

CL8

RL35 1

@

@

GND

1

OUT
GND

4.7U_0603_6.3V6K
CL23

IN

SMT

LL2

@ UG5
5

SMT

CL21

1

+3VALW

Switcing mode

LL1

4

2

2

2

1

1

LDO mode

+LAN_VDD_3V3 Rising time
need>0.5mS and <100mS

J1

2

0.1U_0402_16V7K

@
1

3

2

4

0.1U_0402_16V7K

5

LANGND

CL3 EMI@
120P_0402_50V8J

2

RJ45_TX0+

1

RJ45_TX0-

2

RJ45_RX1+

3

RJ45_TX2+

4

RJ45_TX2-

5

RJ45_RX1-

6

RJ45_TX3+

7

RJ45_TX3-

8

PR1+
PR1PR2+
PR3+
PR3PR2PR4+

GND
GND

9
10

PR4SANTA_130456-291

LANGND

B

B

1

+3VS

RR1
@

2

+3VS_CR

0_0603_5%

1
CR9

4.7U_0402_6.3V6M

+3VS_CR

RTS5239

CR10
2

Card Reader Connector

1

2 0.1U_0402_16V7K

RR4-RR9 close to chip
CR12-CR13 close to chip or socket

CONN@
JREAD1

UR1
CLK_PCIE_CR
CLK_PCIE_CR#
2 0.1U_0402_16V7K PCIE_ARX_C_DTX_P1
CL17 1
2 0.1U_0402_16V7K PCIE_ARX_C_DTX_N1
CL18 1

24
23
22
21
19

CR_CLKREQ#
PLT_RST#

CR_CLKREQ#

1

+3VS_CR

SD_CD#
2

10K_0402_5%
1

6.2K_0402_1%

RR8
2 RR9

RR9 close to chip

RREF

8

CLKREQ#
PERST#
MS_INS#
SD_CD#
GPIO

SP1
SP2
SP3
SP4
SP5
SP6
SP7
DV33_18
DV12_S

15
11

SD_D1
SD_D0
SD_CLK
SD_CMD
SD_D3
SD_D2
SD_WP

RR2
RR4
RR5
RR3
RR6
RR7

1
@
1
@
1 EMI@
1
@
1
@
1
@

2
2
2
2
2
2

0_0402_5%
0_0402_5%
33_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%

1
CR14

+DVDD12

SD_D1_R 208MHz
SD_D0_R
@ CR12
1
2
SD_CLK_R
SD_CMD_R
SD_D3_R
6.8P_0402_50V8C
SD_D2_R

2
1U_0402_6.3V4Z

+CR_VDD_3V3

3V3_IN
AV12
CARD_3V3

RREF

GND

9
7
10

SD_D3_R

1

SD_CMD_R

2
3

Close to Conn

CR7

Close to Chip

+3VS_CR
+AVDD12
+CR_VDD_3V3

4.7U_0603_6.3V6M

9

HSIP
HSIN
REFCLKP
REFCLKN
HSOP
HSON

12
13
14
16
17
18
20

CR8

1

2

0.1U_0402_16V7K

PCIE_ATX_C_DRX_P1
PCIE_ATX_C_DRX_N1
7 CLK_PCIE_CR
7 CLK_PCIE_CR#
5 PCIE_ARX_DTX_P1
5 PCIE_ARX_DTX_N1

1
2
3
4
5
6

1

5
5

PCIE_ATX_C_DRX_P1
PCIE_ATX_C_DRX_N1

2

Close to Chip

+CR_VDD_3V3

4

SD_CLK_R

5
6

25

RTS5239-GR_QFN24_4X4

SD_D0_R

7

SD_D1_R

8

SD_D2_R

9

SD_CD#

10

SD_WP

11

DAT3
CMD
VSS1
VDD
CLK
VSS2
DAT0
DAT1
DAT2
CD

G1

WP

G2

12
13

TAITW_PSDAT0-09GLBS1ZZ4H1
A

A

+DVDD12

1
2

2

CR3

CR4

1

2

CR5
4.7U_0402_6.3V6M

1

1@
CR6

2

2

0.1U_0402_16V7K

2

Close to Chip

+3VS_CR
0.1U_0402_16V7K

1

4.7U_0603_6.3V6M

CR2

+AVDD12

+AVDD12
0.1U_0402_16V7K

4.7U_0603_6.3V6M

CR1

1

+DVDD12

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2013/02/26

Deciphered Date

2015/07/08

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

LAN 8151/8166_ CR RTS5238
Document Number

Rev
0.1

LA-A996P
Sheet

Friday, February 21, 2014
1

24

of

46

2
0.1U_0402_16V7K

RS1
1

1 CS1 USB30_MTX_C_DRX_P0

@

0_0402_5%
2

D

USB3TXDP0_C_R

WCM-2012-900T_4P
4

4

3

3

1

7

7

USB30_MTX_DRX_N0

2
0.1U_0402_16V7K

RS3
1

USB30_MRX_DTX_P0

1 CS2 USB30_MTX_C_DRX_N0

0_0402_5%
2

@

1
LM1
1
RS2

SM070003K00
2
@ 0_0402_5%

1

4

3

3



EMI@
1

7

USB30_MRX_DTX_N0

7

USB20_P8

2

1
LM2
1
RS6

SM070003K00
2
@ 0_0402_5%

RS7
1

@

0_0402_5%
2

RS4

USB_ON#

2

4

3

CS4

G547I2P81U MSOP 8P
CS3
0.1U_0402_16V7K

2

2

1

2

@
1
2
0_0402_5%

RS5 1
0_0402_5%

@

2

USB_OC0#

USB_OC0#

1

9

1
3

USB20_P8_C

YSLC05CH_SOT23-3

2

USB2.0/USB3.0 port 1

3

WCM-2012-900T_4P
1
2
RS8 @ 0_0402_5%
SM070003Y00

USB20_N8

1
CS5

Del B Cap.

USB20_P8_C

R221
300_0402_5%

@
USB20_N8_C

DM2
ESD@
1 1
USB3RXDN0_C

2

4

1

@ESD@
DM1 SCA00000U10
2 USB20_N8_C

USB3RXDN0_C

EMI@

7

28

USB20_N8

1

@

1

1

8
7
6
5

2

LM3
2

GND VOUT
VIN VOUT
VIN VOUT
EN
FLG

USB3RXDP0_C

WCM-2012-900T_4P
4

1
2
3
4

USB3TXDN0_C_R

2

W=100mils

US1

W=100mils

2

2

+USB_VCCA

+5VALW

EMI@
1

E

USB3.0 need support 2.5A
change USB PWR SW SA00003TV00
low active

CS6
47U_0805_6.3V6M

USB30_MTX_DRX_P0

C

0.1U_0402_16V7K

7

B

1000P_0402_50V7K

A

@

1 10P_0402_50V8J
C294
2

2

+USB_VCCA

SC300002800

JUSB4
109

USB3RXDN0_C

USB3TXDP0_C_R
USB3TXDN0_C_R
USB20_P8_C

USB3RXDP0_C

2 2

98

USB3RXDP0_C

USB3TXDN0_C_R

4 4

77

USB3TXDN0_C_R

USB3TXDP0_C_R

5 5

66

USB3TXDP0_C_R

3 3

9
1
8
3
7
2
6
4
5

USB20_N8_C
USB3RXDP0_C
USB3RXDN0_C

8

SSTX+
VBUS
SSTXD+
GND
DSSRX+
GND
SSRX-

GND
GND
GND
GND

10
11
12
13

ACON_TARA4-9K1311
CONN@
IP4292CZ10-TB

3

USB2.0 port x 2

7

SM070003Y00
RS13
0_0402_5%
1
2
@

USB20_N9

USB20_N9_C

3

LM4
1
+USB_VCCB

+5VALW

W=100mils

1

2

1
2
3
4

GND VOUT
VIN VOUT
VIN VOUT
EN
FLG

4

W=100mils

US2
8
7
6
5

7

USB20_P9

7

USB20_N0

4

3

RS15
1
@

G547I2P81U MSOP 8P
CS10
0.1U_0402_16V7K

@
2
RS101
0_0402_5%

2

+USB_VCCB

2

0_0402_5%
2

USB20_P9_C

USB20_N0_C

LM5
1

2

4

3

USB20_P9_C
USB20_N9_C
USB20_P0_C
USB20_N0_C

2

EMI@
4
RS9 1
0_0402_5%

@

2

USB_OC1#

USB_OC1#

9
7

USB20_P0

USB20_P0_C
4

Compal Electronics, Inc.

Compal Secret Data

Security Classification
Issued Date

3

WCM-2012-900T_4P
1
2
RS16 @ 0_0402_5%
SM070003Y00

4

2013/02/26

Deciphered Date

2015/07/08

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

A

E-T_6916K-Q12N-00L
12
14
11 12 G2 13
10 11 G1
10
9
8 9
7 8
6 7
5 6
4 5
3 4
2 3
1 2
1
JUSB
CONN@

3

WCM-2012-900T_4P
1
2
RS14 @ 0_0402_5%

1
USB_ON#

1

EMI@

B

C

D

USB 3.0/2.0 conn
Document Number

Rev
0.1

LA-A996P
Friday, February 21, 2014

Sheet
E

25

of

46

4

3

2

UA1

23
24
16

D

PC_BEEP
+3VS

@

CA17
4.7U_0603_6.3V6K

D_MIC_L_CLK
D_MIC_L_DATA

TAI-TECH FCM1608KF
D_MIC_L_CLK
D_MIC_L_DATA
TAI-TECH FCM1608KF

EMI@
2
2

SPK_OUT_R+
SPK_OUT_R-

MONO_OUT

SPK_OUT_L+
SPK_OUT_L-

CA11

1

2 10U_0603_6.3V6M

ALDO_CAP

CA14

1

2 2.2U_0402_6.3V6M

ACPVEE
CPVDD
CBN
CBP

1

2 2.2U_0402_6.3V6M

LA7
1 D_MIC_CLK
1 D_MIC_DATA
LA8

D_MIC_DATA
D_MIC_CLK

PLUG_IN# RA10

1

2 39.2K_0402_1% SENSEA

7
34
36
35
37
2
3
13
14

SYNC

HPOUT_R
HPOUT_L

1

33
32

HPOUT_R RA4
HPOUT_L RA5

LDO3-CAP
BCLK
LINE1_L
LINE1_R
SPDIFO/GPIO2

GPIO0/DMIC_DATA
GPIO1/DMIC_CLK

JDREF
VREF
LDO1_CAP
LDO2_CAP

SENSE_A
SENSE_B

AVSS1
AVSS2
DVSS
Thermal Pad

5
8

SDATA_IN RA7

1
1

2 75_0402_1%
2 75_0402_1%

HP_OUTR
HP_OUTL

1

2

2

Place near Pin9
+5VS
+1.5VS_AVDD

1

MIC_JD

15
28
27
39

2
JDREF RA9
AVREF CA16 2
CA18 1
CA19 1

1
2
FBMA-L11160808601LMA10T_2P
SM010007Z00

Headphone

2 22_0402_5%

6
22
21
48

HDA_SDOUT_AUDIO
HDA_SDIN0
9

9

HDA_BITCLK_AUDIO

9

1

2

600ohms @100MHz 1A
P/N: SM01000BU00

2

1

Place near Pin26
1 20K_0402_1%
1 .1U_0402_16V7K
2 10U_0603_6.3V6M
2 10U_0603_6.3V6M

2

1
2
LA5
SUPPRE_ KC FBMA-10-100505-101T 0402
PCB Footprint = R_0402

2

1

GNDA
+5VS_PVDD

+5VS

25
38
GNDA
4
49
AVREFCA24

1

+1.5VS

Place near Pin40

GNDA

LA6

ALC3227-CG_MQFN48P_6X6

1

1

D

1

2 2.2U_0402_6.3V6M

1

2

1

2

2

1

1
2
FBMA-L11-201209601LMA20T_2P
SM01000NS00
2

1

MUTE_LED

600ohms @100MHz 2A
P/N: SM01000EE00

@
DA8
YSLC05CH_SOT23-3
SCA00002900

GNDA

10K_0402_5%
RA12
2

PD#

C

C

28

1

MMBT3904WH_SOT323-3
SB000008E10
1
2
DA3
CH751H-40PT_SOD323-2

EC_MUTE#

8/20 change
Internal
SPK
Relace RA13/RA14/RA15/RA16 close to UA1

Power down (PD#) power stage for save power
0V: Power down power stage
3.3V: Power up power stage

10K_0402_5%
RA11
2

C

29

Q4B
2N7002KDW_SOT363-6

5

MUTE_LED_CTR

GNDA

2

2 2

2

+5VS_AVDD

CA23
10U_0603_6.3V6M

E

QA1
1

3

SDATA_OUT
SDATA_IN

PDB

2

1

Place near Pin1

Internal Speaker

RESET#

CPVEE
CPVDD
CBN
CBP

1

LA4

1K_0402_5%
RA26

B

HDA_RST_AUDIO#

SPK_L+
SPK_L-

CA22
10U_0603_6.3V6M

RA25
2.2K_0402_5%

42
43

CA21
.1U_0402_16V7K

+DVDD

SPK_R+
SPK_R-

CA20
.1U_0402_16V7K

47
+1.5VS

45
44

PCBEEP

2
4.7K_0402_5%

CA15

19
19

LINE2_R
LINE2_L

RA2
0_0603_5%

+5VS_PVDD

CA13
4.7U_0603_6.3V6K

1
RA6

11

PVDD1
PVDD2

+5VS_AVDD
+1.5VS_AVDD

41
46

CA12
.1U_0402_16V7K

+3VS

10
HDA_RST_AUDIO#

MIC1_VREFO_L
MIC1_VREFO_R
MIC2_VREFO

26
40

CA10
4.7U_0603_6.3V6K

HDA_RST_AUDIO#

AVDD1
AVDD2

CA9
.1U_0402_16V7K

HDA_SYNC_AUDIO

9
CPVDD

2

1

9

12

MIC2_R
MIC2_L

3

+MIC2_VREFO

31
30
29

4

MUTE_LED_CTR

18
17

+1.5VS
1
2
LA3
SUPPRE_ KC FBMA-10-100505-101T 0402
PCB Footprint = R_0402

1

2 4.7U_0402_6.3V6M INT_MICR_C
2 4.7U_0402_6.3V6M INT_MICL_C

+DVDD_IO

2

@

1

1
1

1

CA8
10U_0603_6.3V6M

CA1
CA4

+DVDD
+DVDD_IO

CA7
.1U_0402_16V7K

2 1K_0402_5%

+DVDD

1
9

CA6
10U_0603_6.3V6M

1

RA3

DVDD
DVDD_IO

CA5
.1U_0402_16V7K

INT_MIC

+3VS

MIC1_R
MIC1_L

3

20
19

1

2

5

SPK_RSPK_R+
SPK_LSPK_L+

SM010008A00
EMI@ RA131
EMI@ RA141
EMI@ RA151
EMI@ RA161
SM010008A00

2
2
2
2

PBY160808T-300Y-N_2P
PBY160808T-300Y-N_2P
PBY160808T-300Y-N_2P
PBY160808T-300Y-N_2P

conn check pin def
CONN@
JSPK1
1
2
3
4

SPK_R-_CONN
SPK_R+_CONN
SPK_L-_CONN
SPK_L+_CONN

1
2
3 GND
4 GND

5
6

ACES_87213-0400G

GNDA

HP_OUTR_R

HP_OUTL_R

DA4
YSLC05CH_SOT23-3
SCA00002900
ESD@

DA6
YSLC05CH_SOT23-3
SCA00000U10
@ESD@

RA17
2.2K_0402_5%

1

1

CA32
10U_0603_6.3V6M

Close to Codec pin12

B

1
2
RA18
22K_0402_5%

MIC_JD

2

RA20
10K_0402_5%

+MIC2_VREFO

Jack detect
Combo Mic = High
Normal HP = Low

1

1
2
PC_BEEP
CA34
.1U_0402_16V7K

2

1
2
CA33
.1U_0402_16V7K

3

APU_SPKR

2

Reserve for ESD request.
INT_MIC_R

RA19
47K_0402_5%
1
2

2

9

2

1

1

APU Beep

1
2 PC_BEEP_R
CA31
.1U_0402_16V7K

2

@EMI@
CA473

DA2 @ESD@
SCA00002900
L03ESDL5V0CC3-2_SOT23-3

3

EC_BEEP#

2

28

B

1

EC Beep

3

2

3

2

DA1 @ESD@
SCA00002900
L03ESDL5V0CC3-2_SOT23-3

PC Beep

2

SPK_L+_CONN

@EMI@
CA472
1

120P_0402_50V8J

SPK_L-_CONN

SPK_R+_CONN

@EMI@
CA471
1

120P_0402_50V8J

SPK_R-_CONN

@EMI@
CA470
1

120P_0402_50V8J

1

120P_0402_50V8J

wide 40 MIL

INT_MIC

2

1

GNDA

COMBO AUDIO JACK
RA28
1
2
0_0402_5%

INT_MIC

RA21 1

RA27
1
2
0_0402_5%

HP_OUTL

RA22 1

HP_OUTR

RA23 1

CONN@
JHP

HPR, HPL, 15mil Keep 30mil

EMI@

2 BLM15AG601SN1D_2P SM01000II00

INT_MIC_R

3

2 BLM15AG601SN1D_2P SM01000II00

HP_OUTL_R

1

2 BLM15AG601SN1D_2P SM01000II00

HP_OUTR_R

2
4

6
EMI@

1
2
CA40
@EMI@
.1U_0402_16V7K

EMI@
PLUG_IN#

5

1
2
CA29
EMI@
.1U_0402_16V7K
1
2
CA30
EMI@
.1U_0402_16V7K

Issued Date

2

1
SINGA_2SJ-E960-001F
2

Pin4 and Pin5
Normal OPEN

Compal Electronics, Inc.

Compal Secret Data
2013/01/04

Deciphered Date

2015/01/04

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

GNDA

Date:

5

4

3

A

GNDA

GNDA GNDA GNDA

Security Classification

For ESD request

1

@EMI@

@EMI@

GNDA

2

@EMI@

1
2

1
2
CA39
@EMI@
.1U_0402_16V7K

1

CA37
100P_0402_50V8J

RA24
22K_0402_5%

CA36
100P_0402_50V8J

1
2
CA38
@EMI@
.1U_0402_16V7K

CA35
100P_0402_50V8J

A

2

AUDIO ALC259-VC2-CG
Document Number

Rev
0.1

LA-A996P
Sheet

Monday, February 17, 2014
1

26

of

46

JPHW7 need to short
@ JPHW7
2

2

80mil

Close to Pin18

Close to Pin13

Close to Pin11

Close to
Pin27

Close to Pin7

+SWR_VDD
+SWR_V12

RT21
4.7K_0402_5%

2132S@
MIIC_SDA

RT31
4.7K_0402_5%

BLVDS@
1

2

BLVDS@

BLVDS@

BLVDS@

MIIC_SCL

2

BLVDS@

RT41
4.7K_0402_5%

BLVDS@

1

2

+3VS_RT

2
CT151

0.1U_0402_16V4Z

CT141

0.1U_0402_16V4Z

CT17

2

BLVDS@

2

+3VS_RT

1

CT18

0.1U_0402_16V4Z

CT16

0.1U_0402_16V4Z

10U_0603_6.3V6M

2

BLVDS@

1

2

1

BLVDS@

+DP_V33

1

1
CT131

BLVDS@

2

CT121

2

1

0.1U_0402_16V4Z

10U_0603_6.3V6M

2

1
CT111

0.1U_0402_16V4Z

BLVDS@

1
CT101

BLVDS@ BLVDS@

2

CT91

2

1

0.1U_0402_16V4Z

22U_0603_6.3V6M

2

1
CT81

Close to Pin3

0.1U_0402_16V4Z
CT71

10U_0603_6.3V6M

Layout note

1

2

JUMP_43X79

PIN30

RT51
4.7K_0402_5%

2132S@

PIN31

1

1

※ROM only mode : PIN 30 4.7k pull low, Pin 31 4.7k pull high.
EP mode
: PIN 30 4.7k pull high, Pin 31 4.7k pull low.
EEPROM
: PIN 30 4.7k pull high, Pin 31 4.7k pull high.
〈 ※Default mode 〉

1

1

Layout note

2

80mil

Layout note
Close to LT5

+3VS_RT

1

+3VS

BLVDS@

+3VS_RT
UT1

+SWR_V12

SWR

LDO

40mil
40mil

2132S

Do not support

mount LT7

2132N

Use 0 ohm

mount LT7

13
18
12
11
27
7

TXEC+
TXEC-

DP_V33
SWR_VDD
PVCC
SWR_LX
SWR_VCCK
VCCK
DP_V12

TXE2+
TXE2-

LVDS

80mil

SWR / LDO Mode select

3

Power

BLVDS@
1 +DP_V33
LT612
40mil
FBMA-L11-201209-221LMA30T_0805
BLVDS@
100mil
1 +SWR_VDD
LT512
40mil
FBMA-L11-201209-221LMA30T_0805
1
2 +SWR_LX
@
40mil
LT7
0_1206_5%
40mil

TXE1+
TXE1TXE0+
TXE0-

19
20

LVDS_CLKP_eDP
LVDS_CLKN_eDP

21
22

LVDS_TXP2_eDP
LVDS_TXN2_eDP

23
24

LVDS_TXP1_eDP
LVDS_TXN1_eDP

Kabini LVDS

V

25
26

LVDS_TXP0_eDP
LVDS_TXN0_eDP

Kabini EDP

V

display@

5
6

※ If use 2132N, please select LDO mode as default.

BLVDS@
1
2 RT192
1K_0402_1%

EDP_HPD
1

2

RT11
100K_0402_5%
RT8
12K_0402_1%
BLVDS@

2

2

32
8
4

1

BLVDS@
CT13
220P_0402_50V7K

CIICSCL1
CIICSDA1
HPD

GPIO(PWM OUT)
GPIO(Panel_VCC)
GPIO(PWM IN)
GPIO(BL_EN)

LVDS
EDID

MIICSCL1
MIICDA1

ROM

MIICSCL0
MIICSDA0

DP_REXT
DP_GND
2132S@

BLVDS@

GND

14
15
16
17

V

+DP_ENVDD
DP_INT_PWM
TS_BKOFF#

29
28

LCD_CLK_eDP
LCD_DATA_eDP

31
30

Beema@

V

V

V
V

V

Beema EDP




eDP_DP_INT_PWM
19
+DP_ENVDD 19
DP_INT_PWM 19,6

Kabini@

V

V

V

MIIC_SCL
MIIC_SDA

33

RTD2132S-VE-CG_QFN32_5X5

+3VS_RT

UT1

1

19,6

9
10

APU_SCLK0
APU_SDATA0

Other

18,9
18,9



LANE0P
LANE0N

GPIO

H_EDP_TXP0_C_TL
H_EDP_TXN0_C_TL

AUX_P
AUX_N

DP-IN

2
1

KLVDS@

Beema LVDS

RTD2132S
H_EDP_AUXP_C_TL
H_EDP_AUXN_C_TL

EDP@

BLVDS@
RTD2132N-CGT QFN 32P
SA00007A300

LCD_CLK_eDP

RT6

1 BLVDS@2 4.7K_0402_5%

LCD_DATA_eDP

RT7

1 BLVDS@2 4.7K_0402_5%

Layout note
Close to Pin8

RT14 1 Display@2 0_0402_5%

PIN15

PIN16

Accept voltage input (high level)

CT24
@
1

+3VS

2

TC7SH08FUF_SSOP5

B

P

2

BKOFF#

A

2132S

3.3V

BLVDS

+LCD_VDD *

BLVDS

1.5~3.3V

Y

4

DISPOFF#

19

* Version R has internal level shifter, remove
level shifter circuit on AMD platform

* Version R internal Power Switch, can
output 1A, Rds(on)=0.2 ohm



BLVDS@

PD 100K on LVDS page

2

BLVDS@

28 BKOFF#
RT20
100K_0402_5%

G

UT31
1

TS_BKOFF#

3



1



TL_ENVDD

5

0.1U_0402_16V7K

2132S

Different between 2132S and 2132N(BLVDS)
2132S

2132N

BLVDS@

1. Support SWR mode 1. Support LDO mode and SWR mode
2. Internal ROM
3. Support LCD_VDD(internal Power switch)
4. Integrates Level shifter

RP38

LTDP0_TXP3
LTDP0_TXN3
LTDP0_TXP2
LTDP0_TXN2

6
6
6
6

LVDS_CLKN
LVDS_CLKP
LVDS_TXN0
LVDS_TXP0

LVDS_CLKN
LVDS_CLKP
LVDS_TXN0
LVDS_TXP0

RT12
RT13
RT15
RT16

1
1
1
1

KLVDS@2
KLVDS@2
KLVDS@2
KLVDS@2

0_0201_5%
0_0201_5%
0_0201_5%
0_0201_5%

LVDS_CLKN_F
LVDS_CLKP_F
LVDS_TXN0_F
LVDS_TXP0_F

LVDS_CLKP_eDP
LVDS_CLKN_eDP
LVDS_TXP2_eDP
LVDS_TXN2_eDP

4
3
2
1

5
6
7
8

LVDS_CLKP_F
LVDS_CLKN_F
LVDS_TXP2_F
LVDS_TXN2_F

19
19
19
19

LVDS_TXP1_F
LVDS_TXN1_F
LVDS_TXP0_F
LVDS_TXN0_F

19
19
19
19

0_0804_8P4R_5%
BLVDS@



RP39

LTDP0_TXP0

6

LVDS_TXP2

LTDP0_TXN0

6

LVDS_TXN2

LTDP0_AUXP

6

AUXP_DDC_CLK

LTDP0_AUXN

6

AUXN_DDC_DATA

RT17 1 KLVDS@2 0_0201_5% LVDS_TXP1_F
RT18 1 KLVDS@2 0_0201_5% LVDS_TXN1_F

LVDS_TXP1
LVDS_TXN1

LVDS_TXP1
LVDS_TXN1

BLVDS@ CT21

1

2 .1U_0402_16V7K

H_EDP_TXP0_C_TL

BLVDS@ CT22

1

2 .1U_0402_16V7K

H_EDP_TXN0_C_TL

4
3
2
1

5
6
7
8

+LCDVDD
+DP_ENVDD

80ml trace width

0_0804_8P4R_5%

1 BLVDS@2
RT9
0_0805_5%

BLVDS@

BLVDS@ CT19

1

2 .1U_0402_16V7K

H_EDP_AUXP_C_TL

BLVDS@ CT20

1

2 .1U_0402_16V7K

H_EDP_AUXN_C_TL

RP40 Close CPU
LVDS_TXP2
LVDS_TXN2
AUXP_DDC_CLK
AUXN_DDC_DATA

LVDS_TXP1_eDP
LVDS_TXN1_eDP
LVDS_TXP0_eDP
LVDS_TXN0_eDP

1

6
6

RT33
RT34
RT35
RT36

1
1
1
1

Display@2
Display@2
Display@2
Display@2

RT24 SE076104K80
EDP@ 0.1U_0402
RT25 SE076104K80
EDP@ 0.1U_0402
RT26 SE076104K80
EDP@ 0.1U_0402
RT27 SE076104K80
EDP@ 0.1U_0402

RT24~27 Close JLVDS conn
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%

LVDS_TXP2_K
LVDS_TXN2_K
AUXP_DDC_CLK_K
AUXN_DDC_DATA_K

RT24
RT25
RT26
RT27

1
1
1
1

KLVDS@2
KLVDS@2
KLVDS@2
KLVDS@2

0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%

4
3
2
1

5
6
7
8

CT23
4.7U_0603_6.3V6K
BLVDS@

LCD_DATA 19
LCD_CLK 19

0_0804_8P4R_5%

Issued Date

1

RT10
100K_0402_5%
BLVDS@

Close to Panel conn.

Compal Electronics, Inc.

Compal Secret Data

Security Classification
LVDS_TXP2_F
LVDS_TXN2_F
LCD_CLK
LCD_DATA

2

Close to Pin15

RP44
LCD_DATA_eDP
LCD_CLK_eDP

2



LTDP0_TXP1
LTDP0_TXN1

2013/02/26

Deciphered Date

2015/07/08

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

eDP to LVDS
Document Number
Wednesday, February 19, 2014

Rev
0.1
Sheet

27

of

46

5

4

3

2

1

EC_GA20
EC_KBRST#
SERIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0

9 EC_GA20
9 EC_KBRST#
31,7 SERIRQ
LPC_FRAME#
31,7 LPC_AD3
31,7 LPC_AD2
31,7 LPC_AD1
31,7 LPC_AD0

31,7

7
+3VALW_EC

DS9
2

LPC_RESET#

12
13
37
EC_RST#
20
EC_SCI#
38
1
2
@
R223
10K_0402_1%
1
2
@
R355
10K_0402_1%
55
KSI0
56
KSI1
57
KSI2
58
KSI3
59
KSI4
60
KSI5
61
KSI6
62
KSI7
39
KSO0
40
KSO1
41
KSO2
42
KSO3
43
KSO4
44
KSO5
45
KSO6
46
KSO7
47
KSO8
48
KSO9
49
KSO10
50
KSO11
51
KSO12
52
KSO13
53
KSO14
54
KSO15
81
KSO16
82
KSO17
LPC_CLK0_EC

LPC_CLK0_EC
2
R226
2
C186

9

1
47K_0402_5%
1
0.1U_0402_25V6

LPC_RESET#
9

@ESD@
1

7

EC_SCI#

LPC_CLKRUN_L
29 KSI[0..7]

CK0402101V05_0402-2

29

KSO[0..17]

C

31,37,38
31,37,38
12,6
12,6

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

SLP_S3#
SLP_S5#
EC_SMI#
WL_PWREN_EC
AC_AND_CHAG
AC_LED#
WLAN_WAKE#
EC_INVT_PWM
FAN_SPEED1
EC_PME#
E51TXD_P80DATA
E51RXD_P80CLK
GPIO18

9
9

Delay EC_PWROK 50ms
for VGA criterial

9

SYS_PWRGD

2
10K_0402_1%

@

1
R250

1
2
3
4
5
7
8
10

SLP_S3#
SLP_S5#
9 EC_SMI#
23 WL_PWREN_EC
37 AC_AND_CHAG
36 AC_LED#
22 WLAN_WAKE#
19 EC_INVT_PWM
30 FAN_SPEED1
24 EC_PME#
22 E51TXD_P80DATA
22 E51RXD_P80CLK
1
2
SYS_PWRGD
@
R251
0_0402_5%

77
78
79
80

6
14
15
16
17
18
19
25
28
29
30
31
32
34
36

+1.8VALW
B

GATEA20/GPIO00
KBRST#/GPIO01
SERIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC & MISC
LPC_AD0

EC_SMB_CK1/GPIO44
EC_SMB_DA1/GPIO45
SM
EC_SMB_CK2/GPIO46
EC_SMB_DA2/GPIO47

PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08
GPIO0A
GPIO0B
GPIO0C
GPIO0D
EC_INVT_PWM/GPIO11
FAN_SPEED1/GPIO14
EC_PME#/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
PCH_PWROK/GPIO18
SUSP_LED#/GPIO19
NUM_LED#/GPIO1A

AD

EC_MUTE#/GPIO4A
USB_EN#/GPIO4B
CAP_INT#/GPIO4C
EAPD/GPIO4D
TP_CLK/GPIO4E
TP_DATA/GPIO4F

PS2 Interface

CPU1.5V_S3_GATE/GPXIOA00
WOL_EN/GPXIOA01
ME_EN/GPXIOA02
VCIN0_PH/GPXIOD00

SPI Flash ROM

GPIO
Bus

GPIO

EC_RSMRST#/GPXIOA03
EC_LID_OUT#/GPXIOA04
PROCHOT_IN/GPXIOA05
H_PROCHOT#_EC/GPXIOA06
VCOUT0_PH/GPXIOA07
GPO
BKOFF#/GPXIOA08
PBTN_OUT#/GPXIOA09
PCH_APWROK/GPXIOA10
SA_PGOOD/GPXIOA11

2

2

EC_CRY2
0_0402_5%

122
123

XCLKI/GPIO5D
XCLKO/GPIO5E

C191
22P_0402_50V8J
KB9012QF-A3_LQFP128_14X14
Part Number = SA00004OB30

2

1

AC_IN/GPXIOD01
EC_ON/GPXIOD02
ON/OFF/GPXIOD03
LID_SW#/GPXIOD04
SUSP#/GPXIOD05
GPXIOD06
PECI_KB9012/GPXIOD07

AGND/AGND

R254
100K_0402_1%

@

21
23
26
27

MINI1_LED#
EC_BEEP#

C184

V18R

2

0.01U_0402_50V7K

AD_BID0
ADP_I
ADP_ID

B/I#

1

ADP_I 36,38
ADP_ID 36

DP_ENBKL

DP_ENBKL

PX@
R214
560K_0402_1%
SD034560380

68
70
71
72

LAN_PWR_EN
EC_LAN_ISOLATEB#
EN_DFAN1

83
84
85
86
87
88

EC_MUTE#
PM_SLP_S4#

97
98
99
109

VGATE

VGATE

VLDT_EN#
VCIN0_PH

VLDT_EN#
VCIN0_PH

EC_ACIN

R229 1

LAN_PWR_EN
24
EC_LAN_ISOLATEB#
EN_DFAN1 30

SERR#
TP_CLK
TP_DATA

119
120
126
128

EC_SPI_SO
EC_SPI_SI
1
EC_SPI_R_CLK
R252 2EC_SPI_CLK
EC_SPI_CS0# EMI@ 0_0402_5%

73
74
89
90
91
92
93
95
121
127

TOUCH_ON#
SPOK
TS_GPIO_EC
BAT_CHG_LED
CAP_LOCK#
PWR_LED#

100
101
102
103
104
105
106
107
108

EC_RSMRST#
EC_LID_OUT#
VCIN1_PH
H_PROCHOT#_EC
MAINPWON
BKOFF#
PBTN_OUT#

110
112
114
115
116
117
118

EC_ACIN
EC_ON
ON/OFF#
LID_SW#
SUSP#
USB_ON#
PANEL_SEL

124

V18R

SYSON
VR_ON
0.95_1.8VALW_PWREN

VGA_AC_BATT

0_0402_5% 1
R222

+EC_VCC_VL

2
10K_0402_1%

12,36..38

@

+3VL

1
R228

+5VALW

1
R362

+3VALW

32
36

C

EC_SPI_SO 7
EC_SPI_SI 7
EC_SPI_CLK 7
EC_SPI_CS0# 7

TOUCH_ON# 19
SPOK 39,41,42
TS_GPIO_EC 19
BAT_CHG_LED 36
CAP_LOCK# 29
PWR_LED# 30
WLAN_ON_LED#
29
SYSON 40
VR_ON 43
0.95_1.8VALW_PWREN

+3VALW_EC

VGA_AC_BATT

RP2
8
7
6
5

1
2
3
4

LID_SW#
DP_ENBKL
VR_ON
SYSON

100K_0804_8P4R_5%

+3VS

42

+3VALW_EC

RP3
1
2
3
4

EC_SMB_DA2
EC_SMB_CK2
EC_SMB_DA1
EC_SMB_CK1

EC_RSMRST# 9
EC_LID_OUT# 9
VCIN1_PH 36
H_PROCHOT#_EC
36,6
MAINPWON 39
BKOFF# 27
PBTN_OUT# 9

8
7
6
5

2.2K_0804_8P4R_5%

12
VGA_AC_BATT

EC_ON 39
ON/OFF# 30
LID_SW# 30
SUSP# 32,40,41,47
USB_ON# 25

2
R366

@

1
+3VALW
10K_0402_1%

Delay SUSP# 10ms
B

+3VS

+3VALW_EC
1

C190
4.7U_0603_6.3V6K

R218
10K_0402_1%
EDP@

RP4
EC_SCI#
EC_SMI#
LPC_RESET#

1
2
3
4

8
7
6
5

1

L11

10K_0804_8P4R_5%
R219
10K_0402_1%
LVDS@

E51TXD_P80DATA
SUSP#

1
1

R211 2100K_0402_1%
R213 2
100K_0402_1%

PANEL_SEL

@ESD@
1

DS5
2

2

@

2
10K_0402_1%

USB_ON#

43

LVDS

0

eDP

1

+3VALW_EC
2

VLDT_EN#

CK0402101V05_0402-2
SUSP#

ACIN

1 100P_0402_50V8J

20mil trace

@ESD@
1

DS4
2

1
10K_0402_1%

R230

@ESD@
1

CK0402101V05_0402-2

A

SPOK

D

24

EC_MUTE# 26
PM_SLP_S4# 40
WLAN_OFF_LED#
29
SERR# 9
TP_CLK 29
TP_DATA 29

CK0402101V05_0402-2
SUSP#

2 0_0402_5%

@

2 0.1U_0402_25V6

DS3
2

MV
56K ohm

160k ohm 240k ohm 330k ohm 560k ohm

1
EC_KBRST#

C182 1

PV

C188 2

CK0402101V05_0402-2
SYS_PWRGD

SI

12k ohm 20K ohm 33K ohm

2

2

UMA
R214
DIS
R214

6

MBK1608800YZF

@ESD@
1

DB

15"

36,37

20mil
ECAGND

DS1
2

AD_BID0

ECAGND

PANEL_SEL

H_PROCHOT#_EC

130k ohm 200k ohm 270k ohm 430k ohm

MINI1_LED# 22
EC_BEEP# 26
B/I#

63
64
65
66
75
76

2
69

1
R253

SPIDI/GPIO5B
SPIDO/GPIO5C
SPICLK/GPIO58
SPICS#/GPIO5A

ENBKL/AD6/GPIO40
PECI_KB930/AD7/GPIO41
FSTCHG/GPIO50
BATT_CHG_LED#/GPIO52
CAPS_LED#/GPIO53
PWR_LED#/GPIO54
BATT_LOW_LED#/GPIO55
SYSON/GPIO56
VR_ON/GPIO57
PM_SLP_S4#/GPIO59

GPI

GND/GND
GND/GND
GND/GND
GND/GND
GND0

DGPU_PWR_EN
RTC_CLK

UMA@
R214

SPI Device Interface

11
24
35
94
113

13,45,9
9

1

1 SYS_PWRGD
R257

2

DAC_BRIG/GPIO3C
EN_DFAN1/GPIO3D
IREF/GPIO3E
CHGVADJ/GPIO3F

modify by 20130103
2
10K_0402_1%

GPIO0F
BEEP#/GPIO10
GPIO12
ACOFF/GPIO13

BATT_TEMP/AD0/GPIO38
AD1/GPIO39
ADP_I/AD2/GPIO3A
Input
AD3/GPIO3B
AD4/GPIO42
IMON/AD5/GPIO43

DA Output
KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
KSI4/GPIO34
KSI5/GPIO35
KSI6/GPIO36
KSI7/GPIO37
KSO0/GPIO20
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
KSO4/GPIO24
KSO5/GPIO25 Int. K/B
KSO6/GPIO26 Matrix
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
KSO16/GPIO48
KSO17/GPIO49

36

56K_0402_1%
SD034560280

PWM Output

CLK_PCI_EC
PCIRST#/GPIO05
EC_RST#
EC_SCII#/GPIO0E
GPIO1D

ECAGND

2

2
ECAGND

MV
43K ohm

100K_0402_1%
1

+EC_VCC_VL

Ra

C181
0.1U_0402_25V6

1

U44

R210
1

PV

15K ohm 27K ohm

2

D

+EC_VCCA

SI

0 ohm

1

2
2
0.1U_0402_25V6

C179
1000P_0402_50V7K
1
1

67

2
2
0.1U_0402_25V6

C178

L10
1
2
MBK1608800YZF

2
C180
1000P_0402_50V7K

C177

2

EC_VDD/AVCC

0.1U_0402_25V6
1

C175

9
22
33
96
111
125

0.1U_0402_25V6
1 C176
1

1

UMA
R214
DIS
R214

+3VALW_EC

EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD0
EC_VDD/VCC

L9
1
2
MBK1608800YZF

DB

14"

Analog Board ID definition
+3VALW_EC
+3VL

DS6
2

2

TP_CLK

CK0402101V05_0402-2
DS8
2

EC_RST#

DS10 ESD@
2
1

@ESD@
1

2
4.7K_0402_5%

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

CK0402101V05_0402-2

2011/07/08

Deciphered Date

2015/07/08

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

CK0402101V05_0402-2

Date:

5

1
R244
1
R245

4.7K_0402_5%
TP_DATA

SLP_S3#

A

+3VALW

@ESD@
1

4

3

2

EC ENE KB9012 A3
Document Number

Rev
0.1

LA-A996P
Wednesday, March 26, 2014
1

Sheet

28

of

46

28

28

KSI0

C193

KSI[0..7]

KSO[0..17]

CONN@
JKB1
KSI1
KSI7
KSI6
KSO9
KSI4
KSI5
KSO0
KSI2
KSI3
KSO5
KSO1
KSI0
KSO2
KSO4
KSO7
KSO8
KSO6
KSO3
KSO12
KSO13
KSO14
KSO11
KSO10
KSO15
KSO16
KSO17

KSO17
KSO16
KSO15
KSO14
KSO13
KSO12
KSO11
KSO10
KSO9
KSO8
KSO7
KSO6
KSO5
KSO4
KSO3
KSO2
KSO1
KSO0

@ESD@
2
1 100P_0402_50V8J

26

Keyboard conn

KSI7
KSI6
KSI5
KSI4
KSI3
KSI2
KSI1
KSI0

CAP_LOCK# R203 1
MUTE_LED R207 1
WL_WHIT
WL_AMBER

28 CAP_LOCK#
MUTE_LED

+5VS
2 3.3K_0402_5%
2 3.3K_0402_5%

+5VS

Touch pad conn

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32

G1
G2

33
34

ACES_50690-0320N-P01

+5VALW

+5VALW

+3VALW
CONN@
JTP
1

1
2
3
4

2
GND
GND

C134
470P_0402_50V8J

CAP_LOCK#
MUTE_LED

5
6
1

HB_A090420-SAHR21

1

1
2
3
4

TP_CLK
TP_DATA

Amber

3

2013/02/26

2

1
ESD@ CC123
100P_0402_50V8J

2

3

WL_WHIT

5

WLAN_ON_LED#

28

Compal Electronics, Inc.

Compal Secret Data

Security Classification
Issued Date

ESD@ CC122
100P_0402_50V8J

4

1

2

Q20B

WLAN_OFF_LED#

Q20A

28

2N7002KDW_SOT363-6

6

WL_AMBER

1

White
R158
3.3K_0402_5%

2

R157
3.3K_0402_5%
2N7002KDW_SOT363-6

DM5
YSLC05CH_SOT23-3
SCA00000U10
@ESD@

2

2

TP_CLK
TP_DATA

1

28
28

Deciphered Date

2015/07/08

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

KB/TP
Document Number

Rev
0.1

LA-A996P
Monday, February 17, 2014

Sheet

29

of

46

A

B

C

D

E

Powert Button Connector
+3VL
1

28
28

LED10

LID_SW#
ON/OFF#

1
CONN@
JPWR
1
2
3
4

LID_SW#
ON/OFF#

28

220_0402_5%
2

PWR_LED#

PWR_LED#

2

R2744
1

CS20

2

0.1U_0402_16V7K
2

White

5
6

LED9

HB_A090420-SAHR21

7

220_0402_5%
2

SATA_LED#

SATA_LED#

R2743
1

CS19

2
100K_0402_1%

1

+3VS
2

LTW-110DC5-C_WHITE

1
ON/OFF# 1 R215

1
LTW-110DC5-C_WHITE

1

1
2
3
4
GND
GND

+3VL

@ESD@
CC124
100P_0402_50V8J

3

C166
0.1U_0402_25V6

+3VALW

3

2

1

White

LID_SW#

1

0.1U_0402_16V7K
2

2

2

3

3

+FAN_POWER

28

CE22
2

EN_DFAN1

+3VS
1

1

FAN conn
+5VS

CE23

+FAN_POWER

CE25
2.2U_0603_6.3V6K
1
2

2

RE50
10K_0402_5%

40mil

2

1

1000P_0402_50V7K

2.2U_0603_6.3V6K

40mil

UE3
1
2
3
4

VEN
VIN
VO
VSET

GND
GND
GND
GND

28

8
7
6
5

FAN_SPEED1

4
5

1

APE8873M SOP 8P

2

CONN@
JFAN1
1
2
3

CE24
0.01U_0402_16V7K

1
2
3
GND
GND
ACES_85204-0300N

4

4

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2013/02/26

Deciphered Date

2015/07/08

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

A

B

C

D

PWRBTN/FAN
Document Number

Rev
0.1

LA-A996P
Monday, February 17, 2014

Sheet
E

30

of

46

5

4

3

ACCELEROMETER

+3V_GSEN

Add TPM Circuit in PV Phase

2

@

1

+3V_GSEN

0_0402_5%

1

1

RH411

+3VL

2

2

@ RH503
0_0402_5%
+3VS

DH8
ACCEL_INT#

2
R208 1
10K_0402_5%

SCL/SPC
SDA/SDI/SDO
SDO/SA0
CS

2
3

@ R227
0_0402_5%

INT2
INT1
VDD
GND
GND
RES
RES
RES
RES

NC
NC

+3V_GSEN

9
11
14
5
12
10
13
15
16

2

1@
C1054
2

C231
0.1U_0402_16V7K

1

1

2

2

C232
10U_0603_6.3V6M

28,7
28,7
28,7
28,7

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

@R209
0_0402_5%

7
28,7
11,22,24,9
28,7

2

26
23
20
17

LAD0
LAD1
LAD2
LAD3

LPC_CLK1
LPC_FRAME#
PLT_RST#
SERIRQ
+3VS

2

@

21
22
16
27
15
7

XTALO
XTALI
TPM
SLB 9656 TT 1.2

LCLK
LFRAME#
LRESET#
SERIRQ
CLKRUN#
PP

4.7K_0402_5%

+3V_GSEN

LPCPD#
TESTB1/BADD
TEST1

GPIO2
GPIO

EC_SMB_CK1

NC
NC
NC

1

2 PLT_RST#

@

R1412 0_0402_5%
14
13
C

@
2
6

T45 PAD
T46 PAD

1
3
12

4
11
18
25

SLB 9656 TT 1.2

2

2

2
28,37,38

1

6

1

QG1A
EC_SMB_CK1

R232
4.7K_0402_5%

R1409
0_0402_5%

BADD

2

R231
4.7K_0402_5%

@

28
9
8

@

1

+3V_GSEN

1
R1380

LPC_FRAME#
PLT_RST#
SERIRQ

2

GND
GND
GND
GND

C

@
C1052
*
0.1U_0402_16V4Z

2

1

1

D

1@
C1055

@
U69

HP3DC2TR

2

1@
C1053

VDD
VDD
VDD

1

+3V_GSEN

Vdd_IO

4
6
7
8

GS_SMB_CK1
GS_SMB_DA1

0.1U_0402_16V4Z

@ U25
1

0.1U_0402_16V4Z

TPM1.2

9

CH751H-40PT_SOD323-2

+3VS

5

+3V_GSEN

2

0.1U_0402_16V4Z

1
ACCEL_INT#_R

24
19
10

SI# 2012.04.10 Change ACCEL_INT# to INT1

VSB

D

1

GS_SMB_CK1

QG1B

B

28,37,38

B

3

EC_SMB_DA1

EC_SMB_DA1

5

2N7002DWH_SOT363-6
R217 1
@
2 0_0402_5%

4

GS_SMB_DA1

2N7002DWH_SOT363-6

HOLEA

@

@

1

@

1

@

@

@

H17
H_5P0
HOLEA
@

HOLEA

HOLEA

HOLEA

HOLEA

HOLEA

@

@

@

@

HOLEA
@

@

H9
H_5P0

H10
H_5P0

H11
H_5P0

H13
H_5P0

HOLEA

HOLEA

HOLEA

HOLEA

@

@

@

@

FIDUCIAL_C40M80

FD3

FD4
@

FIDUCIAL_C40M80

Compal Secret Data

Security Classification
Issued Date

2013/02/26

Deciphered Date

2015/07/08

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

@

FIDUCIAL_C40M80

@

FIDUCIAL_C40M80
A

1

H21
H_2P8

1

H20
H_2P8

1

H19
H_2P8

1

@

H1
H_2P8

1

A

H8
H_2P8

H18
H_5P0

1

HOLEA

FD2

1

HOLEA

1

HOLEA

1

HOLEA

1

HOLEA

FD1

CPU

1

HOLEA

VGA

1

H16
H_2P0X2P5

1

H15
H_2P0

1

H12
H_2P8

1

H6
H_2P8

1

H5
H_2P8

1

H4
H_2P8

1

H3
H_2P8

1

@

2 0_0402_5%

@

1

R216 1

4

3

2

Compal Electronics, Inc.
LED/Screw hole
Document Number

Rev
0.1

LA-A996P
Monday, February 17, 2014

Sheet
1

31

of

46

A

B

C

D

E

)
A
5
(
S
V
8
.
1
+
O
T
V
8
.
1
+

+5VALW
+5VS
+1.8VALW

5

+3VALW

6
7

CT1
GND

ON2

CT2

VIN2
VIN2

VOUT2
VOUT2

11

1

10
2

9
8

3

SUSP#

SUSP#

4

+5VALW

VIN
VIN

VOUT
VOUT

ON

CT

VBIAS
GND
GND

15
2

C209
560P_0402_50V7K

1

2
+3VS

2

2

6

1

5
9

C208
330P_0402_50V7K

TPS22967DSGR_SON8_2X2

)
A
2
(
S
V
5
.
1
+
O
T
V
5
.
1
+

2

2

1

C218
1U_0603_10V4Z

1

C217
10U_0603_6.3V6M

+3VALW TO +3VS

7
8

2
C216
1U_0603_10V4Z

2

28,40,41,47
C207
330P_0402_50V7K

2

U18
1
2

1

TPS22966DPUR_SON14_2X3
1

2

12

C213
1U_0603_10V4Z

2

VBIAS

GPAD

C211
10U_0603_6.3V6M

C210
10U_0603_6.3V6M

2

1

ON1

14
13

1

C206
1U_0603_10V4Z

4

VOUT1
VOUT1

1

1

C204
10U_0805_10V4Z

3

SUSP#

VIN1
VIN1

2

1

C205
10U_0805_10V4Z

U17

1

C203
1U_0603_10V4Z

2

1
2

1

+1.8VS
1

C202
10U_0805_10V4Z

2

1

+5VALW TO +5VS

C201
10U_0805_10V4Z

1

2

)
A
4
(
S
V
5
9
.
0
+
O
T
V
5
9
.
0
+
C16
.1U_0402_16V7K

2

VLDT_EN#

5
4

6

2

2N7002KDW_SOT363-6

VLDT_EN#

1

VLDT_EN#

1

3

R273
470_0603_5%

0.95VS_GATE

Q5A

28

@2

Q5B

1
2
R270
4.7K_0402_5%

2

3 2

+5VALW

+0.95VS

1

1

4

2
3

1

C225
1U_0402_6.3V6K

1

1
2
3

C222
4.7U_0603_6.3V6K

C221
4.7U_0603_6.3V6K

+0.95VS

U19
AO4430L_SO8
8
7
6
5

2N7002KDW_SOT363-6

+0.95VALW

4

4

2013/02/26

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2015/07/08

Deciphered Date

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

A

B

C

D

DC Interface
Rev
0.1
Sheet

Monday, February 17, 2014
E

32

of

46

5

4

3

2

1

D

D

C

C

B

B

A

A

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2013/02/26

Issued Date

Deciphered Date

2015/07/08

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

Power sequence
Rev
0.1

LA-A996P
Sheet

Monday, February 17, 2014
1

33

of

46

5

4

3

2

1

D

D

C

C

B

B

A

A

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2013/02/26

Issued Date

Deciphered Date

2015/07/08

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

EE Change list
Rev
0.1

LA-A996P
Sheet

Monday, February 17, 2014
1

34

of

46

5

4

CMSRC

ACDRV

ACFET

RBFET

3

2

1

B+
DC IN
D

D

P36

+3VALWP

RT8243A

Jumper +3VALW

SY8003D

+1.8VALWP Jumper +1.8VALW
Charger
BQ24738

SPOK

+5VALWP
P38

EN

P41

P39

BATDRV

+1.35V_VDDQP Jumper +1.35V_VDDQ

RT8207M
Battery

EN

Jumper +5VALW

EC_ON

SY8003D

UMA only

RBFET

+1.5VSP

BATT

SUSP#

+1.5VS

SUSP#

+0.6V_0.675VSP
+0.6V_0.675VS
Jumper

SYSON
P37

Jumper

EN

P41

EN
P40

C

C

RT8237E

+0.95VALWP

Jumper

+0.95VALW

0.95_1.8VALW_PWREN
EN

P42

+CPU_CORE
ISL6277A
VR_ON
EN
B

ISL62881C

+CPU_CORE_NB
P43~P44

B

DIS only

+VGA_CORE
DGPU_PWR_EN
EN

SY8208D

P45~P46

DIS only

+1.5VSP

Jumper

+1.5VS

SUSP#
EN

P47

A

A

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2012/04/03

Issued Date

Deciphered Date

2014/12/31

Title

Power Block Diagram

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

Document Number

Rev

0.1

LA-A996P
Tuesday, February 25, 2014

Sheet
1

35

of

47

5

4

3

PL1 EMI@
HCB2012KF-221T30_2P
1
2

ADPIN

2

VIN

1
2

2

1

EMI@ PC4
1000P_0402_50V7K

2

1

EMI@ PC3
100P_0402_50V8J

D

ADP_ID 28

1

BAT_CHG_LED

PR8
100K_0402_5%

2

1

28

PR5
2K_0402_5%
1
2 Charge_LED

PC6
1000P_0402_50V7K

2

PR7
10K_0402_5%

1
ESD@ PD2
L30ESD24VC3-2_SOT23-3

@ PR2
0_0402_5%
1
2 ACIN_LED

AC_LED#

PR3
100K_0402_5%

PR1
10K_0402_5%
2

2
1

1

ESD@ PD1
L30ESD24VC3-2_SOT23-3

28

3

2

2

3

ADP_SIGNAL1

1

ACIN_LED

1

1

7

2

7

@ PC5
100P_0402_50V8J

5

8

ADP_SIGNAL

1

6

5

PD3
GLZ3.6B_LL34-2

8

3

2

Charge_LED

3

2

4

6

EMI@ PC2
1000P_0402_50V7K

4

2

D

EMI@ PC1
100P_0402_50V8J

PL2 EMI@
HCB2012KF-221T30_2P
1
2
PJP1
ACES_59012-0080N-002
2
1
2
1

1

+5VS

+3VALW

C

1

1

C

2
PR12
100K_0402_1%

2

3

8

PR13
1.5M_0402_5%

2

2

PD4
CD4148WN-1_1206-2

1

+

O

1

1

PR11
10K_0402_1%

PC9
100P_0402_50V8J
2
1

PU1A
LM393DR_SO8
2
-

4
G

2

PC8
0.022U_0402_16V7K
1
2

1

1

PQ2A
L2N7002DW1T1G_SC88-6
2

P

PR10
47K_0402_1%

PROCHOT#

6

43,6,9

B/I#

+5VS

28,37

ADP_I

28,38

+3VALW_EC

1
2

ECAGND 28

1

1
PR27
10K_0402_1%

@ PR28
10K_0402_1%

2

1

1

2

2

PH1
100K_0402_1%_NCP15WF104F03RC

VCIN1_PH 28

2

2
1

ACIN

VCIN0_PH 28

2

2
PR21
100K_0402_1%

@ PC15
0.1U_0402_16V7K

4

PR20
1.5M_0402_5%

2

2

PD5
CD4148WN-1_1206-2

5
6

1

-

B

PR26
5.9K_0402_1%

PR25
10K_0402_1%

2

+

O

PR18
10K_0402_1%

PC13
100P_0402_50V8J
2
1

P
7

PU1B
LM393DR_SO8

G

1

PC12
0.022U_0402_16V7K
1
2

4

1

PQ2B
L2N7002DW1T1G_SC88-6
5

8

2

3

PR17
47K_0402_1%

@ PC16
0.1U_0402_16V7K

B

1

1

1

+3VALW

H_PROCHOT#_EC 28,6

12,28,37,38

A

A

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2013/08/07

Issued Date

Deciphered Date

2016/08/06

Title

DC Conn

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

Document Number

Rev

0.1

LA-A996P
Tuesday, February 25, 2014

Sheet
1

36

of

47

5

4

3

2

1

@ PJPB2

1

1

2

2

JUMP_43X118

BATT++

BATT+

EMI@ PC11
0.01U_0402_25V7K

1
2

PR22
100_0402_5%
1
2

EC_SMB_DA1

28,31,38

EC_SMB_CK1

28,31,38

@ PQ3A
L2N7002DW1T1G_SC88-6

2

1
@ PR23
220K_0402_5%

1

3

@ PQ4A
L2N7002DW1T1G_SC88-6
2

@ PR24
220K_0402_5%

1
2

ESD@ PD7
L30ESD24VC3-2_SOT23-3

@ PC14
100P_0402_50V8J

4

ESD@ PD6
L30ESD24VC3-2_SOT23-3

1

1

1

3

2

5
@ PQ3B
L2N7002DW1T1G_SC88-6

C

+3VL

2

3
28,36

4

B/I#

2

3

+3VL

1

PR29
100K_0402_5%

PR30
100_0402_5%
1
2

C

2

1

+3VL

2

OCTEK_BTJ-08FUAB

@ PR16
4.7K_0402_5%

6 2

@ PR15
470K_0402_5%

PR19
100_0402_5%
1
2

@UMA@ PQ1
AO4407AL 1P SO8

@ PR14
470K_0402_5%
1
2

4

EMI@ PC10
1000P_0402_50V7K

1

1

1

1
2
3
4
5
6
7
8
9
10

2

1
2
3
4
5
6
7
8
GND
GND

2

@ PJPB1

D

BATT
@VGA@ PQ1
SI4483ADY-T1-GE3_SO8
1
8
2
7
3
6
5

EMI@ PL3
HCB2012KF-121T50_0805
1
2

6

D

5
ACIN
@ PQ4B
L2N7002DW1T1G_SC88-6

12,28,36,38

AC_AND_CHAG

28

Need to define "AC_AND_CHAG" signal with EC

B

B

A

A

Compal Electronics, Inc.

Compal Secret Data

Security Classification

2013/08/07

Issued Date

Deciphered Date

2016/08/06

Title

BATT Conn

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

Document Number

Rev

0.1

LA-A996P
Tuesday, February 25, 2014

Sheet
1

37

of

47

1

B

D

3

A

S

2
G
PR101
1

C

D

PQ102
2N7002KW_SOT323-3

PR102
2

1

1M_0402_5%

2

3M_0402_5%

1

1

B+

SRN_CHG

2

PC118
0.1U_0603_16V7K

1

PC115
10U_0805_25V6K

2

1

PC114
10U_0805_25V6K

2

1

RB551V-30_SOD323-2

PD103
2

CSON1
1

PC116
0.1U_0402_25V6

2

3

2

CSOP1

2

1

@EMI@ PR111
4.7_1206_5%

1

CSON1

CHG

BATDRV_CHG

ILIM

11

CSOP1

PR113
0_0603_5%
1
2

SRP_CHG

2

2

PR110
0.01_1206_1%
1
4

ILIM_CHG

10

SCL

SDA

1

+3VL

PC119
0.01U_0402_25V7K

2

3

2

1

7
IOUT_CHG

12

PR112
0_0603_1%
1
2

PR115
357K_0402_1%
1
2
PR116
100K_0402_1%

6
ACDET_CHG

ACDET

BATDRV

13

1SNB_CHG 2

14

@EMI@ PC117
680P_0603_50V8J

SRN

PR117
422K_0402_1%

VIN

1
2

5
3
2
1
PQ106
AON7506_DFN33-8-5
4

DL_CHG

1

SRP

ACDRV

3

1

5
15

2

CMSRC

12,28,36,37 ACIN

PC107
0.01U_0402_50V7K

4

1

16
GND

ACPRES

PL102
4.7UH_ETQP3W4R7WFN_5.5A_20%
LX_CHG

ACP

9

4
5

1

1

BATT

LODRV

8

ACDRV_CHG
PR114
10K_0402_1%
1
2

PQ105
SIS412DN-T1-GE3_POWERPAK8-5
4

PC112
1U_0603_25V6K
1
2

REGN

ACN

IOUT

CMSRC_CHG 3

@ PR107
0_0603_5%
1
2

DH_CHG

3
2
1

2
REGN_CHG

1

PR106
2.2_0603_5%
2
1
BST_CHG

PD102
RB751V-40_SOD323-2

BTST

DH_CHG
18

17

19

LX_CHG

PR105
10_1206_1%

HIDRV

2

PAD

PHASE

ACP_CHG

2

PR104
4.12K_0603_1%
2 BATDRV1_CHG
BATDRV_CHG 1

PC110
0.047U_0402_25V7K
1
2

BQ24738RGRR_QFN20_3P5X3P5

+3VL

PC105
10U_0805_25V6K

2
1
1
1

VCC

21
ACN_CHG

20

VCC_CHG

2

2

1

PC108
0.1U_0402_25V6
2
1
1
2

PU101

1
2
3

5

PD101
BAS40CW_SOT323-3

PC111
1U_0603_25V6K
1
2

PR109
4.12K_0603_1%

1
2

2

PC109
0.1U_0402_25V6

PC106
0.1U_0402_25V6

ACDRV1_CHG

2

3

2

2

VIN
1

PC104
10U_0805_25V6K

3

2

2

EMI@ PL101
1.2UH_NRS4018T1R2NDGJ_2.6A_30%
1
2

1

PR103
0.01_1206_1%
4

@EMI@ PC123
2200P_0402_50V7K

5

1

PQ104
AON7506_DFN33-8-5

PC113
0.1U_0402_25V6

P2

4

1
2

1
2
3

PC102
0.1U_0402_25V6

4

1

PC101
2200P_0402_50V7K

PQ103
AON7506_DFN33-8-5

1
2
3

5

2

P1

PQ101
AON6414AL_DFN8-5

PR108
4.12K_0603_1%

VIN

EC_SMB_CK1

28,31,37

EC_SMB_DA1

28,31,37

ADP_I

28,36

1
PC121
100P_0402_50V8J

2

1

1
2

@ PR119
0_0402_5%
1
2

2

ILIM and external DPM
3.61A

PR118
66.5K_0402_1%

Max.
1

Typ
17.23V
17.63V

2

H-->L
L-->H

PC120
0.1U_0402_25V6

Vin Dectector
Min.

@ PC122
0.1U_0402_10V7K

Please locate the RC
Near EC chip
2011-02-22

4

4

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2013/08/07

Deciphered Date

2016/08/06

Title

CHARGER

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev
0.1

LA‐A996P

Date:

A

B

C

Sheet
D

38

of

47

A

B

C

D

PR302
165K_0402_1%
1
2
PR303
56K_0402_1%
1
2

1

PR301
14K_0402_1%
1
2

PR310
PC306
2.2_0402_1%
0.1U_0402_10V7K
1
2 BST1_5V 1
2
@EMI@ PR320
0_0402_5%
1
2

18
LX_5V

16

LG_5V

1

@EMI@ PR312
4.7_1206_5%

SNUB_5V 2

3
2
1
+3VL

2

+3VLP

+5VLP

1

(100mA,40mils ,Via NO.= 2)

Vo=5.14V
+5VALWP

1
+
2

PC310
4.7U_0603_10V6K

2

1
2

+3VLP
@ PJ301
JUMP_43X39
1
2
1
2

PC314
1U_0603_10V6K

1
2

1

PC313
0.1U_0603_25V7K

PR314
100K_0402_1%

PR313
499K_0402_1%
1
2

1

PU301
RT8243AZQW_WQFN20_3X3

@EMI@ PC312
680P_0603_50V8J

LGATE1

2

PL302
2.2UH_ETQP3W2R2WFN_8.5A_20%
1
2
1

17

PQ302
SIS412DN-T1-GE3_POWERPAK8-5

4

3/5V_B+

2

4

BST_5V

PQ304
AON7506_DFN33-8-5

LDO5

ENM

LDO3
15

4

14

11

PQ303
AON7506_DFN33-8-5

ENLDO

VIN

LGATE2

13

10

12

LG_3V

PC322
4.7U_0805_25V6K

1
2

PHASE2

19

PC317
220U_6.3VM_R15

9

PHASE1
5

@EMI@ PR311
4.7_1206_5%

LX_3V

PC321
4.7U_0805_25V6K

5

ENTRIP_5V
2

1
FB_5V
FB1 FB=2V

TON_35V

ENTRIP1

ENTRIP_3V

3

UGATE2

21
20

3
2
1

1
2
3

BOOT1

2

PR315
2.2K_0402_1%
1
2

28 EC_ON

3

@ PR316
0_0402_5%
1
2

@ PJ304
JUMP_43X39
1
2
1
2

+VL

@ PR317
100K_0402_5%

2

1

1

(100mA,40mils ,Via NO.= 2)
PC309
4.7U_0603_10V6K

2

2

1

28 MAINPWON

@ PC315
4.7U_0603_6.3V6K

3

BOOT2

8

1
2
3

1
2

1

2

SNUB_3V 2

+

PC316
220U_6.3VM_R15

1

PAD
BYP1

UGATE1

@EMI@ PC311
680P_0603_50V8J

Vo=3.4V

7

PR307
19.1K_0402_1%
1
2

5

@EMI@ PR319
0_0402_5%
1
2

PGOOD

TON

6

4

SPOK

ENTRIP2

2
28,41,42

PQ301
SIS412DN-T1-GE3_POWERPAK8-5
PC305
PR309
0.1U_0402_10V7K
2.2_0402_1%
4
1
2 BST1_3V 1
2

2

PL303
4.7UH_ETQP3W4R7WFN_5.5A_20%
1
2

5
FB_3V
FB2 FB=2V

1

PR306
20K_0402_1%
1
2
PR318
10K_0402_1%

5

PC320
4.7U_0805_25V6K

PC319
4.7U_0805_25V6K
2
1

1
2

3/5V_B+
+3VALW

BST_3V

+3VALWP

PR305
30K_0402_1%
1
2

3/5V_B+

EMI@ PL301
HCB2012KF-121T50_0805
1
2
@EMI@ PC318
2200P_0402_50V7K
2
1

B+

1

PR304
143K_0402_1%
1
2

@ PC302
100P_0402_50V8J
1
2

@ PJ302

+3VALWP

1

1

2

2

+3VALW

JUMP_43X118
@ PJ303

+5VALWP

1

1

2

2

+5VALW

JUMP_43X118

4

4

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2013/08/07

Deciphered Date

2016/08/06

Title

3VALW/5VALW

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev
0.1

LA‐A996P

Date:

A

B

C

Sheet
D

39

of

47

5

3

PCM2
0.22U_0402_10V6K
1
2
BST_DDR-1

D

@EMI@ PRM12
0_0402_5%
1
2

+1.35V_VDDQP

3
4

VTTREF_DDRT
C

+1.35V_VDDQP
1

5

SYSON

2
6
FB_DDR

+1.35V_VDDQP

1
2

1

PRM8
10K_0402_1%
@ PJPM2

+1.35V_VDDQP

@ PRM11
0_0402_5%
1
2

1

1

2

2

B

+1.35V_VDDQ

JUMP_43X118

@ PJPM1
JUMP_43X39
1
2
1
2

2

1

+0.6V_0.675VS

@ESD@ PDM1
CK0402101V05_0402-2

PCM11
0.1U_0402_10V7K

2

2

1

+0.6V_0.675VSP
@ PCM12
0.1U_0402_10V7K

SUSP#

PCM10
0.033U_0402_16V7K

FB

7
S3_DDR

FB=0.75V

8
S5_DDR

PRM5
8.06K_0402_1%
1
2

2

PRM9
30K_0402_5%
1
2

1

28,32,41,47

@ESD@ PDM2
CK0402101V05_0402-2

28

B

1

2

Vo=1.3545V

@0@ PRM7
0_0402_5%
1
2

PM_SLP_S4#

PCM5
10U_0805_6.3V6K

1

PRM6
887K_0402_1%
2
B+_DDR 1

28

2

1
21

PCM4
10U_0805_6.3V6K

VTT

2

20

BST_DDR

18

19
S3

PCM9
1U_0603_10V6K

VDDQ
S5

VDD

VTTREF

TON

PCM8
1U_0603_10V6K

BOOT

VDDP

GND

9

11

VTTSNS

PUM1
RT8207MZQW_WQFN20_3X3

CS

1

VDD_DDR

PGND

10

2

PCM7 @EMI@
680P_0603_50V7K

13
12

+5VALW

1

1
2
3

+5VALW

PRM4
5.1_0603_5%
1
2

2

PQM2
AON7506_DFN33-8-5
4

2
2

2

1SNB_DDR

+

C

PCM6
330U_2.5V_M

PRM2 @EMI@
4.7_1206_5%

1

PAD

VTTGND

TON_DDR

PRM3
13.3K_0402_1%
1
2
CS_DDR

LGATE

PGOOD

1
2
3

14

5

1

+1.35V_VDDQP

15

DL_DDR

VLDOIN

DH_DDR

PHASE

4

UGATE

5

17

+0.6V_0.675VSP

PQM1
SIS412DN-T1-GE3_POWERPAK8-5
PLM2
2.2UH_ETQP3W2R2WFN_8.5A_20%
1
2

1

PRM1
2.2_0402_1%
1
2

LX_DDR

1

PCM3
4.7U_0805_25V6-K

2

1
2

1
2

PCM1
10U_0805_25V6K

B+_DDR

D

2

16

EMI@ PLM1
HCB2012KF-121T50_0805
1
2
@EMI@ PCM13
2200P_0402_50V7K

B+

4

A

A

Compal Secret Data

Security Classification
Issued Date

2013/08/07

Deciphered Date

2016/08/06

Title

Compal Electronics, Inc.
1.35V/0.675VS

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Tuesday, February 25, 2014
Date:

Rev
0.1

LA-A521P

5

4

3

2

Sheet
1

40

of

47

5

4

3

2

1

D

D

UMA@ PU1501

2

1

1

EN_1.5V

1

UMA@ PR1503
UMA@PR1503
1M_0402_5%

2

2

2

@UMA@ PC1508
0.1U_0402_16V7K

C

1
UMA@ PR1505
UMA@PR1505
20K_0402_1%

@PJ1501
@
PJ1501
JUMP_43X79
1
2
1
2

2

1

SY8003DFC_DFN8_2X2

1

UMA@ PR1504
UMA@PR1504
30.1K_0402_1%

2

8
9

+1.5VSP
UMA@ PC1504
22U_0805_6.3V6M

SGND
PGND

Vo=1.503V

1

FB

7

2

EN

UMA@ PL1502
2.2UH +-20% MMD-04BZ-2R2M-X2 3A
1
2

6

UMA@ PC1503
22U_0805_6.3V6M

PG

5

1

LX

2

1
FB=0.6V

NC

IN

UMA@ PC1509
22P_0402_50V8J
2
1

2

PGND

@EMIUMA@ PC1507
@EMIUMA@ PR1502
680P_0402_50V7K
4.7_1206_5%

1
2

@UMA@ PR1501
0_0402_5%
1
2

SUSP#

UMA@ PC1502
22U_0805_6.3V6M

1
2

UMA@ PC1501
22U_0805_6.3V6M

1
2
28,32,40,47

3

1.5V_B+
@EMIUMA@ PC1510
2200P_0402_50V7K

+3VALW

4

EMIUMA@
PL1501
HCB1608KF-121T30_0603
1
2

+1.5VSP

+1.5VS

C

PU1801
B

B

8
9

2
A

1
2

1

PR1803
1M_0402_5%

2

@PC1808
@
PC1808
0.1U_0402_16V7K

PR1805
10K_0402_1%

+1.8VALWP

@PJ1801
@
PJ1801
JUMP_43X79
1
2
1
2

2013/08/07

+1.8VALW

A

Compal Electronics, Inc.

Compal Secret Data

Security Classification
Issued Date

2

1
2

EN_1.8V
@ESD@ PD1801
CK0402101V05_0402-2
2
1

SPOK

1

28,39,42

@ PR1801
@PR1801
0_0402_5%
1
2

@EMI@PC1807
@EMI@PR1802
680P_0402_50V7K
4.7_1206_5%

1

2

SY8003DFC_DFN8_2X2

+1.8VALWP

1

SGND
PGND

PR1804
20K_0402_1%

2

FB

7

PC1806
22U_0805_6.3V6M

EN

Vo=1.8V

1

LX

PG

1

IN

PL1802
2.2UH +-20% MMD-04BZ-2R2M-X2 3A
1
2

6

PC1803
22U_0805_6.3V6M

1
FB=0.6V

5

NC

2

1
2

PC1802
22U_0805_6.3V6M

2

1

PC1801
22U_0805_6.3V6M

1
2

2

PGND

PC1809
22P_0402_50V8J
2
1

3

1.8V_B+
@EMI@ PC1810
2200P_0402_50V7K

+3VALW

4

EMI@
PL1801
HCB1608KF-121T30_0603
1
2

Deciphered Date

2016/08/06

Title

1.5VS/1.8VALW

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev
0.1

LA‐A996P

Date:

5

4

3

2

Sheet
1

41

of

47

4

3

2

EMI@ PL9501
HCB2012KF-121T50_0805
1
2

5

D

PC9502
4.7U_0805_25V6K
2
1

PC9501
4.7U_0805_25V6K
2
1

0.95V_B+

1

B+

@EMI@ PC9503
2200P_0402_50V7K
2
1

5

D

4

9

UG_0.95V

8

SW_0.95V

LGATE
TP

PR9506
470K_0402_1%

+0.95VALW

@ PJ9501
JUMP_43X118
1
2
1
2

7
6

+5VALW

LG_0.95V

11

RT8237EZQW(2)_WDFN10_3X3

4

PC9506
1U_0603_6.3V6M

2

The RC value (PC10 and PR7) need fine-tune if need

1

@EMI@ PR9505
4.7_1206_5%

+
2

@ PJ9502
JUMP_43X118
1
2
1
2

PC9508
330U 6.3V M
ESR=15m ohm

RF

1

VCC

3
2
1

1

PHASE

FB

2

C

EN

+0.95VALWP

PL9502
2.2UH_ETQP3W2R2WFN_8.5A_20%
1
2
1

5

UGATE

1SNB_0.95V2

RF_0.95V

2

SPOK

CS

PQ9501
SIS412DN-T1-GE3_POWERPAK8-5

VGA@ PQ9502
AON7506_DFN33-8-5

4

2

BOOT

5

3

FB_0.95V

PGOOD

1

EN_0.95V

@0@ PR9511
0_0402_5%
1
2

@ PC9505
0.1U_0402_16V7K

28,39,41

1

2

0.95_1.8VALW_PWREN

@ESD@ PD9501
CK0402101V05_0402-2
2
1

28

@ PR9504
0_0402_5%
1
2

PR9502
105K_0402_1%
1
2 TRIP_0.95V

3
2
1

10

PR9503
PC9504
2.2_0603_5%
0.1U_0603_25V7K
1
2 BST_0.95V-1 1
2
BST_0.95V

PU9501

C

@EMI@ PC9509
680P_0402_50V7K

UMA@ PQ9502
MDV1527URH_POWERDFN33-8-5

1

PR9508
3.48K_0402_1%
1
2

PR9510
10K_0402_1%
2

MOSFET: 3x3 DFN
H/S Rds(on): 27mohm(Typ), 34mohm(Max)
Idsm: 7.5A@Ta=25C, 5.5A@Ta=70C
L/S Rds(on): 9.9mohm(Typ), 13mohm(Max)
Idsm: 13.5A@Ta=25C, 11A@Ta=70C

B

B

Choke: 7x7x3
Rdc=15.5mohm +/-15%
Switching Frequency: 290kHz
Imax=8A
OCP~10.977A
OVP: 120%~130%
VFB=0.704V, Vout=0.949V
MOSFET footprint: SIS412DN

A

A

Issued Date

Compal Electronics, Inc.

Compal Secret Data

Security Classification
2013/08/07

Deciphered Date

2016/08/06

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

0.95VALW
Document Number

Rev
0.1

LA-A996P
Tuesday, February 25, 2014

Sheet
1

42

of

47

4

D

@PCG8
@
PCG8
1000P_0402_50V7K
1
2
@ PRG10
@ PCG9
100_0402_1%
220P_0402_50V7K
1
2
1
2

5

1SNB_CNB 2

@ PCG21
33U_25V_M

@EMI@ PCG15
680P_0603_50V7K
+CPU_CORE_NB_FB

2
FCCM_NB

BST_CNB
@ PRZ44

35

2

33

UGATE2

32

PHASE2

31

LGATE2

30

VDDP

29

VDD

C

1

0_0603_5%

1

BOOT2

PCZ42
0.22U_0603_25V7K

2

34

+5VALW
@ PRZ4
0_0402_5%
1
2

3
2
1

PLZ1
0.24UH 20% PCME063T-R24MS1R195 28A
1
4

PHASE1

PRZ12
@ESD@ PDZ4
100K_0402_5% CK0402101V05_0402-2
1
2

25W@ PRZ13
10K_0402_1%
2
ISEN1 1

1

1

PRZ16
2.2_0603_1% PCZ10
2 1
2
BOOT1 1

5

49

24

PRZ17 @EMI@
4.7_1206_5%

0.22U_0603_25V7K

VGATE

4

1

LGATE1

PCZ14 @EMI@
680P_0603_50V7K

2

PQZ2
AON6504

PCZ36
10P_0402_50V8J
1
2

3
2
1

25W@ PCZ12
0.22U_0402_10V6K
1
2

VSUM-

28

2

2

23

22
COMP

BOOT1

21

+3VS

25W@ PCZ13
0.22U_0402_10V6K
1
2

PRZ42
27.4K_0402_1%
1
2

1

1

5

4

PCZ3
10U_0805_25V6K

UGATE1-1

2

@ PRZ33
0_0603_5%
2
UGATE11

PCZ2
10U_0805_25V6K

UGATE1

PQZ1
AON7518_DFN8-5

2

PHASE1

25

PRZ6
1_0603_5%

1

26

1

LGATE1

2

27

2

28

CPU_B+

1
PCZ9
1U_0603_16V6K

2

TP

BOOT1

PGOOD

COMP

FB

FB2

UGATE1

36

PCZ8
1U_0603_16V6K

38

37
UGATEX

39
LGATEX

PHASEX

40

41
FCCM_NB

PWM2_NB

COMP_NB
42
PGOOD_NB

FB_NB

43
COMP_NB

VSEN_NB

44
FB_NB

ISUMN_NB

45
VSEN_NB

PHASE1

NTC

15W@ PRZ52
0_0402_5%
1
2

PRZ18
10.5K_0402_1%
1
2

ISUMP_NB

IMON

+5VALW

@ESD@
PDZ3
CK0402101V05_0402-2
1
2

46

LGATE1

20

NTC

@ PRZ49
0_0402_5%
1
2

APU_PWRGD_L

PWM_Y

PWROK

ISEN3

12

VDD

ENABLE

FB

11

IMON

PHZ1
470K_0402_5%_TSM0B474J4702RE
1
2

SVT

FB2

10

VDDP

RTN

9

PWROK_CPU

VDDIO

8

19

EN_CPU
@ PRZ48
@PRZ48
0_0402_5%
1
2

LGATE2

ISL6277AHRZ-T QFN 48P PWM

VSEN

SVT_CPU

ISUMN_NB

48
ISEN1_NB

SVD

18

@ PRZ47
@PRZ47
0_0402_5%
1
2

PHASE2

ISUMN

6

UGATE2

VR_HOT_L

17

SVD_CPU

SVC

ISUMN

5

ESD@ PDZ2
CK0402101V05_0402-2
1
2

PRZ11
133K_0402_1%
1
2

PCZ11
1000P_0402_50V7K

4

ISUMP

VR_ON

6

B

SVC_CPU
VR_HOT_CPU

0.24uH (DCR 1.19+‐5%)

CPU_B+
BOOTX

BOOT2

16

28

@ESD@ PDZ1
CK0402101V05_0402-2

2

PRG12
3.65K_0603_1%
2
VSUMP_CNB 1

DH_CNB

IMON_NB

7

APU_SVT

+CPU_CORE_NB

3

LX_CNB

VIN

ISUMP

APU_SVD

3

2

PCZ1
1U_0603_16V6K

2

2

2

3

1

+CPU_CORE
2

ISEN2

PRZ14 25W@
10K_0402_1%

PRZ20
3.65K_0402_1%
2
VSUM+ 1
PRZ19
1_0402_1%
2
VSUM- 1

B

APU_core
TDC 20A
Peak Current 25A
OCP current 31.25A
Load line -2.1mV/A
FSW=450kHz
DCR 1.19mohm +/-5%

VSUM+

2
PRZ32
10_0402_5%
1
2

@ PCZ25
820P_0402_50V7K

25W@ PLZ3
0.24UH 20% PCME063T-R24MS1R195 28A
1
4

PHASE2
+CPU_CORE
APU_VDD_SEN

25W@ PRZ50
BOOT2 1

6

2.2_0603_1%

25W@ PCZ26
2 1
2

@EMI25W@PRZ35
4.7_1206_5%

0.22U_0603_25V7K
4
25W@ PQZ4
AON6504

PCZ28
0.01U_0402_25V7K

2

3

1

+CPU_CORE
2

ISEN1

25W@ PRZ34
10K_0402_1%

25W@ PRZ37
3.65K_0402_1%
2
VSUM+ 1
@EMI25W@PCZ27
680P_0603_50V7K

25W@ PRZ39
1_0402_1%
2
VSUM- 1

A

Compal Secret Data

Security Classification
Issued Date

2

6
3
2
1

1
2

15W@ PCZ17
0.1U_0402_10V7K

A

APU_VDD_RUN_FB_L

25W@ PRZ31
10K_0402_1%
1
2

ISEN2

1

LGATE2
PRZ40
10_0402_5%
1
2

2

15W@ PRZ25
1.6K_0402_1%
15W@ PRZ29
390_0402_1%

1

1

4
UGATE2-1

25W@ PCZ21
10U_0805_25V6K

25W@ PRZ28
0_0603_5%
1
2

UGATE2

2

2

25W@ PCZ20
10U_0805_25V6K

1

PCZ23
680P_0402_50V7K

2

2

3
2
1

1

PRZ27
2K_0402_1%

25W@ PQZ3
AON7518_DFN8-5

1

1

10K_0402_5%

2

2

CPU_B+

PRZ26
PCZ22
137K_0402_1%390P_0402_50V7K
1
2
1
2
1

@ PRZ30
100_0402_1%

@ PRZ23
32.4K_0402_1%
1
2

5

1

1
2

25W@ PRZ25
2.21K_0402_1%
1
2
PCZ19
330P_0402_50V7K

25W@ PRZ29
1
2
332_0402_1%

VSUMPCZ24
0.1U_0603_50V7K

15W@ PRZ51
2
1

PCZ18
0.033U_0402_16V7K

25W@ PCZ17
0.15U_0402_10V6K
2
1

1
2

2

PRZ24
11K_0402_1%
2
1

PHZ2
10K_0402_5%_ERTJ0ER103J

PCZ16
100P_0402_50V8J
1
2

5

PCZ15
PRZ22
1000P_0402_50V7K 301_0402_1%
1
2
1
2

1
1 2

PRZ21
2.61K_0402_1%

2012/11/07

Deciphered Date

2012/11/07

Title

Compal Electronics, Inc.
CPU_CORE/CPU_CORE_NB

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev
0.1

LA-A996P

Date:

5

D

DL_CNB

NTC_NB

ISEN1

6
1

IMON_NB

ISEN2_NB

15

@ PRZ45
0_0402_5%
1
2

2

47

ISEN1_NB

@ PRZ41
0_0402_5%
1
2

NTC_NB

ISEN1

+3VS

@ PRZ38
@PRZ38
100K_0402_1%
1
2

APU_VDDIO

1

1

PROCHOT#

14

C

1

PUZ1

ISUMP_NB

@ PRZ36
0_0402_5%
1
2

13

APU_SVC

ISEN2

6

2

+5VALW

ISEN2

+5VALW

6

3
2
1

PRG29
121K_0402_1%

2

PCG14
1000P_0402_50V7K

6

4

DL_CNB

PRG20
10.5K_0402_1%
1
2

2

+

PLG1
0.24UH 20% PCME063T-R24MS1R195 28A
1
4

1

1
2

1

PCG12
0.1U_0402_10V6K

2

1

PRG18
133K_0402_1%
1
2

2

LX_CNB

PRG16
10K_0402_1%
1
2

PHG2
470K_0402_5%_TSM0B474J4702RE

36,6,9

PQG1
AON7518_DFN8-5

+

APU_CORE_NB
TDC 13A
Peak Current 17A
OCP current 21A
Load line -4mV/A
FSW=450kHz
DCR 1.19mohm +/-5%

B+

1

@EMI@ PRG9
4.7_1206_5%

PRZ43
27.4K_0402_1%
1
2

1

PRG8
PCG11
2.2_0603_1%
0.22U_0603_25V7K
1
2 BST1_CNB1
2

2

VSUMP_CNB

DH_CNB-1 4

25W@ PRG11
360_0402_1%
1
2

1

2

1
2 1
PRG15
2.61K_0402_1%

PRG14
11K_0402_1%

2

PCG7
0.1U_0603_50V7K

PCG13
0.033U_0402_16V7K

2

1

PHG1
+CPU_CORE_NB_FB
10K_0402_5%_ERTJ0ER103J

BST_CNB

@ PRG19
0_0603_5%
1
2

@EMI@ PCG20
2200P_0402_50V7K

DH_CNB

2

1

PCG6
100P_0402_50V8J
1
2

PQG2
AON6504

+CPU_CORE_NB

PCG5
PRG7
1000P_0402_50V7K301_0402_1%
1
2
1
2

1

1

PRG5
10_0402_5%
1
2

2

APU_VDDNB_SEN

EMI@ PLZ2
HCB2012KF-121T50_0805
1
2

PCG2
10U_0805_25V6K
2
1

PRG4
41.2K_0402_1%
1
2

1

CPU_B+

PRG3
PCG4
137K_0402_1% 390P_0402_50V7K
1
2
1
2

PCG3
10U_0805_25V6K

25W@ PRG2
1.5K_0402_1%
1
2
6

1

PRG1
2K_0402_1%
1
2
5

PCG1
330P_0402_50V7K
1
2

15W@ PRG11
324_0402_1%

2

3
2
1

15W@ PRG2
1.33K_0402_1%

3

PCG19
33U_25V_M

5

4

3

2

Tuesday, February 25, 2014
1

Sheet

43

of

47

+CPU_CORE

A

1

+

2

5

1

2
+

PCZ126
330U_D2_2V_Y

1

2

1

1

1

RF@ PCZ131
68P_0402_50V8J

2

RF@ PCZ130
68P_0402_50V8J

2

RF@ PCZ129
68P_0402_50V8J

2

1

1

1

1

1

1

@ PCZ123
180P_0402_50V8J

2

PCZ122
180P_0402_50V8J

2

PCZ121
180P_0402_50V8J

2

PCZ120
0.01U_0402_50V7K

2

PCZ119
0.01U_0402_50V7K

2

PCZ118
0.01U_0402_50V7K

B

PCZ124
330U_D2_2V_Y

2

2

1

1

1

1

4

1

1

+

2

1

1

+

2

+CPU_CORE_NB

1

1

1
PCG113
180P_0402_50V8J

2

PCG112
180P_0402_50V8J

2

PCG111
180P_0402_50V8J

2

PCG110
0.22U_0402_16V7K

2

PCG109
0.22U_0402_16V7K

2

@ PCZ117
22U_0805_6.3V6M

2

@ PCZ116
22U_0805_6.3V6M

2

@ PCZ115
22U_0805_6.3V6M

2

PCZ114
0.22U_0402_16V7K

2

1

1

1

1

1

1

1

1

1

1

1

Issued Date

3

1
RF@ PCG119
68P_0402_50V8J

2

1

1

1

1

1

1

1

1

1

1

1

1
PCG106
22U_0805_6.3V6M

2

PCG105
22U_0805_6.3V6M

2

PCG104
22U_0805_6.3V6M

2

PCG103
22U_0805_6.3V6M

2

PCG102
22U_0805_6.3V6M

2

PCG101
22U_0805_6.3V6M

2

PCZ106
22U_0805_6.3V6M

2

PCZ105
22U_0805_6.3V6M

2

PCZ104
22U_0805_6.3V6M

2

PCZ103
22U_0805_6.3V6M

2

PCZ102
22U_0805_6.3V6M

2

PCZ101
22U_0805_6.3V6M

4

2

RF@ PCG118
68P_0402_50V8J

2

RF@ PCG117
68P_0402_50V8J

2

RF@ PCG116
68P_0402_50V8J

2

PCG108
22U_0805_6.3V6M

2

PCG107
10U_0603_6.3V6M

2

@ PCZ112
22U_0805_6.3V6M

2

@ PCZ111
22U_0805_6.3V6M

2

PCZ110
22U_0805_6.3V6M

2

PCZ109
22U_0805_6.3V6M

2

PCZ108
22U_0805_6.3V6M

2

PCZ107
22U_0805_6.3V6M

+CPU_CORE

PCG115
330U_D2_2V_Y

1

+CPU_CORE

PCG114
330U_D2_2V_Y

2
PCZ113
0.22U_0402_16V7K

D

RF@ PCZ128
68P_0402_50V8J

5
3
2

+CPU_CORE_NB
330uF/9m 22uF/0805

Security Classification

2012/11/07
Deciphered Date

2

1

+CPU_CORE_NB
D

0.22uF/0402

+CPU_CORE
2
10
2

+CPU_CORE_NB
2
7
2

10uF/0603

Compal Secret Data

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
A3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

0.01uF/0402
180pF/0402

3
2

1
3

C
C

Local

B

Local

A

PROCESSOR DECOUPLING

Compal Electronics, Inc.

Document Number
Tuesday, February 25, 2014

LA-A996P
Sheet

1

44
of
47
Rev
0.1

4

GPIO20

GPIO15

VID4

VID3

VID2

VID1

VDDC

0

1

1

1

1

1.125V

1

0

0

0

0

1.100V

1

0

0

0

1

1.075V

1

0

0

1

0

1.050V

1

0

0

1

1

1.025V

1

0

1

0

0

1.000V

1

0

1

0

1

0.975V

1

0

1

1

0

0.950V
0.925V

1

0

1

1

1

1

1

0

0

0

0.900V

1

1

0

0

1

0.875V

1

1

0

1

0

0.850V

1

1

0

1

1

0.825V

1

1

1

0

0

0.800V

1

1

1

0

1

0.775V

1

D

Vboot(merge)

+VGA_B+

2

1

@EMIVGA@ PCV7
2200P_0402_50V7K

1
2

VGA@ PCV6
10U_0805_25V6K

1
2
5

5

3
2
1

3
2
1

1
5
4

1

VGA@
PQV4
AON6504

2

1

2

0_0402_5%
@0VGA@ PRV40

1

1
VGA@
PRV20
3.65K_0805_1%
@EMIVGA@
PCV26
680P_0603_50V7K

22

23

24

25

26

27

2

VGA@
PCV17
2.2U_0603_6.3V6K

VGA@
PQV2
AON6504

VGA@
PRV17
1_0402_1%
2

4

SNB_VGA 2

+5VS

0_0603_5%
@VGA@ PRV15

21

1

20

2

3
2
1

1

+VGA_CORE

3

@EMIVGA@
PRV16
4.7_1206_5%

18 DL_VGA
19 VCCP_VGA

2

2

5

17

2

VID2

VGA@
PLV2
0.36U PCMB104T-R36MH1R105 30A GLUE
1
4

16 LX_VGA

3
2
1

13 IMON_VGA

14BST_VGA
BOOT

12 VIN_VGA
VIN

IMON

VDD

VSUM
9

11 VDD_VGA

10 VSUM+

ISUM

ISUM+

VID1

VGA@
PQV3
SIR472DP-T1-GE3_PAK8-5

1
+
2

+
2

1

B

+
2

VGA@ PRV22
10K_0402_1%
1
2

GPU_VID1

12

GPU_VID2

12

GPU_VID3

12

GPU_VID4

12

GPU_VID5

12

DGPU_PWR_EN

2

Remark:
1. Rbias=147K
=>set the controller for CPU_CORE application
Rbias=47k
=>set the controller for GPU_CORE application
2. Switching frequency setting:
Rfset(kohm)=[period(us)-0.29]*2.65
=8.06Kohm
Fsw=1/period(us)=300KHZ
3. Operation mode:
when GPU_CORE VR application
DPRSLPVR (pin28)=0 => 1 phase CCM mode
DPRSLPVR (pin28)=1 => 1 phase DE mode

@VGA@
PCV27
.1U_0402_16V7K

TDC 21A
Peak Current = 31.5A
OCP Current = 37.8A
Load line disable

Vboot regulation
+3VS_VGA

VGA@
PRV24
1K_0402_1%
1
2 GPU_VID1

@VGA@
PRV25
1K_0402_1%
1
2

VGA@
PRV26
1K_0402_1%
1
2 GPU_VID2

@VGA@
PRV27
1K_0402_1%
1
2

VGA@
PRV28
1K_0402_1%
1
2 GPU_VID3

@VGA@
PRV29
1K_0402_1%
1
2

@VGA@
PRV30
1K_0402_1%
1
2 GPU_VID4

VGA@
PRV31
1K_0402_1%
1
2

@VGA@
PRV32
1K_0402_1%
1
2 GPU_VID5

VGA@
PRV33
1K_0402_1%
1
2

Module model information:
ISL62881C_V1A for IC
ISL62881C_V1B for SW

Compal Secret Data

Security Classification
Issued Date

A

2013/08/07

Deciphered Date

2016/08/06

Title

4

Compal Electronics, Inc.
VGA_CORE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

1

VR_ON

1

GPU_GPIO0

1

13,28,9

VID0

CLK_EN#

VGA_PWRGD
12

VCCP

PGOOD

+3VS

@VGA@ PRV23
0_0402_5%
1
2

A

RBIAS

@VGA@ PRV34
10K_0402_1%
DPRSLPVR 28

+3VS
9

2

VGA@ PCV25
56P_0402_50V8
1
2

VGA@
PRV19
8.06K_0402_1%
1
2
Rfset
VGA@
PRV21
1.91K_0402_1%
1
2

LGATE

Output Cap: 10mohm * 560uF * 3 pcs

4
VGA@
PQV1
SIR472DP-T1-GE3_PAK8-5

VSUM-

VGA@
PRV18
715_0402_1%
1
2

VSSP

VGA@
PUV1
ISL62881C_QFN28_4X4

VW

15 DH_VGA

Choke: 0.36uH (Size:10*10*4)
Rdc=1.1mohm +-5%
Heat Rating Current=33A
Saturation Current=39A

VSUM+

VGA@
PCV24
1000P_0402_50V7K
1
2

1

COMP

VID3

1

VGA_PWRGD2
VGA@
PRV14
47K_0402_1%
Rbias

PHASE

VID4

RBIAS 3

UGATE

VID5

VW_VGA4

VGA@
PCV16
1000P_0402_50V7K
1
2

+5VS
VGA@
PCV11
0.22U_0603_25V7K
1
2

4

FB

VID6

COMP_VGA 5

VGA@
PRV10
2.2_0603_5%
1
2

VSEN

VR_ON

FB_VGA 6

B

RTN_VGA
29
AGND
VSENS_VGA 7

VGA@
VGA@ PRV13
PCV15
226K_0402_1% 390P_0402_50V7K
1
2
1
2

8

1
2

VGA@
PCV13
330P_0402_50V7K

@VGA@ PRV11
0_0402_5%
1
2

VGA@ PRV12
2.37K_0402_1%
1
2

2

H-side MOS:SIR472DP
Rds(on):
12mohm @Vgs=10V
15mohm @Vgs=4.5V
Id :20A @Ta=25 degC
L-side MOS:MDU1511RH
Rds(on):
2.0mohm(typ) & 2.4mohm(max) @Vgs=10V
2.7mohm(typ) & 3.3mohm(max) @Vgs=4.5V
Id :100A@Ta=25 degC

@VGA@ PRV8
0_0402_5%
1
2

VGA@
PCV12
1000P_0402_50V7K
1
2

+VGA_CORE

VGA@ PCV5
10U_0805_25V6K

1
2

@VGA@
PCV10
180P_0402_50V8J
1
2

@VGA@
PCV14
330P_0402_50V7K
1
2

1
+

C

RTN

@VGA@
PRV7
100_0402_1%
1
2

VGA@
PCV3
0.22U_0603_25V7K

@VGA@
PCV8
0.01U_0402_25V7K

DPRSLPVR

VGA@
PCV9
0.1U_0402_25V6K

VGA@
PCV2
1U_0402_6.3V6K

2

1
1
1 2

VGA@
PCV4
0.1U_0402_25V6K

2

1
2

1
2

VGA@ PCV1
0.1U_0402_25V6K

VGA@ PRV4
11K_0402_1%

1
2

@VGA@ PRV9
0_0402_5%
1
2

@VGA@
PRV5
82.5_0402_1%

VGA@
PRV6
909_0402_1% Rocset
1
2
1

VSUM-

2

1
2

C

Layout Note:
PH1 should place near Choke

VGA@ PHV1
10K_0402_5%_ERTJ0ER103J

VGA@ PRV1
2.61K_0402_1%
2
1

VSUM+

B+
EMIVGA@
PLV1
HCB2012KF-121T50_0805
1
2

@VGA@ PRV3
0_0603_5%
1
2

PCV28
33U_25V_M

+5VS VGA@
PRV2
1_0603_5%
1
2

VGA@ PCV18
560U_2.5V_M

D

GPIO30

VID5

2

VGA@ PCV21
560U_2.5V_M

GPIO21 GPIO29

3

VGA@ PCV19
560U_2.5V_M

5

3

2

Rev
0.1

LA-A996P

Tuesday, February 25, 2014
1

Sheet

45

of

47

A

PCV54
2.2U_0402_6.3V6M
2
1
PCV55
2.2U_0402_6.3V6M
2
1
PCV56
2.2U_0402_6.3V6M
2
1
PCV57
2.2U_0402_6.3V6M
2
1

PCV70
10U_0603_6.3V6M
2
1
PCV71
10U_0603_6.3V6M
2
1
PCV72
10U_0603_6.3V6M
2
1
PCV73
10U_0603_6.3V6M

B

PCV64
2.2U_0402_6.3V6M
2
1
PCV65
2.2U_0402_6.3V6M
2
1
PCV66
2.2U_0402_6.3V6M

PCV79
0.1U_0402_10V7K
2
1
PCV80
0.1U_0402_10V7K
2
1
PCV81
22U_0603_6.3V6M
2
1

B

Issued Date

PCV82
22U_0603_6.3V6M
2
1

PCV63
2.2U_0402_6.3V6M
2
1

PCV62
2.2U_0402_6.3V6M
2
1

PCV61
2.2U_0402_6.3V6M
2
1

PCV60
2.2U_0402_6.3V6M
2
1

PCV59
2.2U_0402_6.3V6M
2
1

PCV78
0.1U_0402_10V7K
2
1

PCV77
1U_0402_6.3V6K
2
1

PCV76
1U_0402_6.3V6K
2
1

PCV75
1U_0402_6.3V6K
2
1

PCV58
2.2U_0402_6.3V6M
2
1

PCV53
2.2U_0402_6.3V6M
2
1

PCV69
10U_0603_6.3V6M
2
1

PCV74
1U_0402_6.3V6K
2
1

PCV52
2.2U_0402_6.3V6M
2
1

1

PCV68
10U_0603_6.3V6M
2
1

2
PCV51
2.2U_0402_6.3V6M
2
1

1

1

PCV67
10U_0603_6.3V6M
2
1

2

A
C

Security Classification

2013/08/07

C

D

Deciphered Date
2016/08/06

D

E

+VGA_CORE

1

2
2

3
3

4
4

Compal Secret Data
Title

Compal Electronics, Inc.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

VGA CHIP DECOUPLING
Document Number

LA-A996P

Tuesday, February 25, 2014

Rev
0.1

Sheet
E

46
of
47

3

2

1
2

1
2

1
2

1

@ PJW1
JUMP_43X118
1
2
1
2

C

1

1
2

+1.5VS

VGA@
PRW6
20K_0402_1%
2

2

VGA@ PCW9
22U_0805_6.3VAM

2

+3VALW

5
1

2

4 FB_VRAM
FB=0.6V
7

2

LDO

FB
3

Vo=1.503V
VGA@ PCW8
22U_0805_6.3VAM

PG

VGA@ PLW2
1.5UH_PCMC063T-1R5MN_9A_20%
1
2

1

BYP

10 LX_VRAM

+1.5VRAMP

2

ILMT

6

@VGA@ PRW4
VGA@ PCW5
0_0603_5%
0.1U_0603_25V7K
2 BST_VRAM-N 1
2
BST_VRAM 1

VGA@ PCW11
22U_0805_6.3VAM

1

@EMIVGA@ PRW3
@EMIVGA@ PCW3
4.7_1206_5%
680P_0603_50V7K
1
2 SNB_VRAM 1
2

VGA@ PCW7
330P_0402_50V7K

LX

D

1

GND

28,32,40,41

VGA@ PCW13
4.7U_0603_6.3V6K

1
2

VGA@ PCW6
10U_0805_25V6K

1
2

BS
9

SUSP#

@VGA@
PCW2
0.01UF_0402_25V7K

VGA@ PUW1
SY8208DQNC_QFN10_3X3
8
1
IN
EN

VGA@ PCW12
4.7U_0603_6.3V6K

C

VGA@ PCW4
10U_0805_25V6K

2

1

B+_VRAM
@EMIVGA@ PCW1
2200P_0402_50V7K

B+

EMIVGA@ PLW1
HCB2012KF-121T50_0805
1
2

2

1
2

D

VGA@ PRW1
1M_0402_1%

@VGA@ PRW2
0_0402_5%
1
2

1

VGA@ PCW10
22U_0805_6.3VAM

4

VGA@ PRW5
30.1K_0402_1%

5

B

B

A

A

Compal Secret Data

Security Classification
Issued Date

2013/08/07

Deciphered Date

2016/08/06

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:

5

4

3

2

Compal Electronics, Inc.
VRAM Power
Document Number
Tuesday, February 25, 2014

Rev
0.1
Sheet
1

47

of

47

www.s-manuals.com



---

Source Exif Data:

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PDF Version                     : 1.7
Linearized                      : No
XMP Toolkit                     : Adobe XMP Core 4.0-c316 44.253921, Sun Oct 01 2006 17:14:39
Create Date                     : 2015:01:18 12:16:04-05:00
Creator Tool                    : PDFUnlock! (http://www.pdfunlock.com)
Modify Date                     : 2016:06:04 23:07:46+03:00
Metadata Date                   : 2016:06:04 23:07:46+03:00
Producer                        : iText® 5.5.2 ©2000-2014 iText Group NV (ONLINE PDF SERVICES; licensed version)
Format                          : application/pdf
Title                           : Compal LA-A996P - Schematics. www.s-manuals.com.
Creator                         : 
Subject                         : Compal LA-A996P - Schematics. www.s-manuals.com.
Document ID                     : uuid:9437b1ae-fb5b-4027-922b-0d3514ed38bf
Instance ID                     : uuid:cad5dc51-3f51-40ef-8a13-e900bf655057
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Keywords                        : Compal, LA-A996P, -, Schematics., www.s-manuals.com.
Warning                         : [Minor] Ignored duplicate Info dictionary

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