TMS320F2802x Peripheral Driver Library User's Guide F2802x HAL
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F2802x Peripheral Driver Library
USER’S GUIDE
Literature Number: SPRUHX9
December 2012
F2802x-DRL-UG-210
Copyright © 2012
Texas Instruments Incorporated
Copyright
Copyright © 2012 Texas Instruments Incorporated. All rights reserved. ControlSUITE is a registered trademark of Texas Instruments. Other names and
brands may be claimed as the property of others.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this document.
Texas Instruments
12203 Southwest Freeway
Houston, TX 77477
http://www.ti.com/c2000
Revision Information
This is version 210 of this document, last updated on Mon Sep 17 09:17:15 CDT 2012.
2
Mon Sep 17 09:17:15 CDT 2012
Table of Contents
Table of Contents
Copyright . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2
Revision Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2
1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5
2
2.1
2.2
2.3
2.4
Programming Model . . . . .
Introduction . . . . . . . . . . .
Direct Register Access Model
Software Driver Model . . . . .
Combining The Models . . . .
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7
7
7
8
8
3
3.1
3.2
Analog to Digital Converter (ADC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
9
9
9
4
4.1
4.2
Capture (CAP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CAP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
33
33
33
5
5.1
5.2
Device Clocking (CLK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CLK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
49
49
49
6
6.1
6.2
Comparater (COMP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
COMP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
73
73
73
7
7.1
7.2
Central Processing Unit (CPU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
81
81
81
8
8.1
8.2
Flash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
FLASH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
9
9.1
9.2
General Purpose Input/Output (GPIO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
GPIO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
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10 Oscillator (OSC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
10.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
10.2 OSC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
11 Peripheral Interrupt Expansion Module (PIE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135
11.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135
11.2 PIE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135
12 Phase Locked Loop (PLL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167
12.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167
12.2 PLL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167
13 Pulse Width Modulator (PWM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 177
13.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 177
13.2 PWM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 177
14 Power Control (PWR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 229
14.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 229
14.2 PWR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 229
Mon Sep 17 09:17:15 CDT 2012
3
Table of Contents
15 Serial Communications Interface (SCI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 235
15.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 235
15.2 SCI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 235
16 Serial Peripheral Interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 261
16.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 261
16.2 SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 261
17 Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 279
17.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 279
17.2 TIMER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 279
18 Watchdog Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 287
18.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 287
18.2 WDOG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 287
IMPORTANT NOTICE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 294
4
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Introduction
1
Introduction
The Texas Instruments® ControlSUITE® Peripheral Driver Library is a set of drivers for accessing
the peripherals found on the Piccolo Entryline family of C2000 microcontrollers. While they are not
drivers in the pure operating system sense (that is, they do not have a common interface and do
not connect into a global device driver infrastructure), they do provide a mechanism that makes it
easy to use the device’s peripherals.
The capabilities and organization of the drivers are governed by the following design goals:
They are written entirely in C except where absolutely not possible.
They demonstrate how to use the peripheral in its common mode of operation.
They are easy to understand.
They are reasonably efficient in terms of memory and processor usage.
They are as self-contained as possible.
Where possible, computations that can be performed at compile time are done there instead
of at run time.
Some consequences of these design goals are:
The drivers are not necessarily as efficient as they could be (from a code size and/or execution
speed point of view). While the most efficient piece of code for operating a peripheral would be
written in assembly and custom tailored to the specific requirements of the application, further
size optimizations of the drivers would make them more difficult to understand.
The drivers do not support the full capabilities of the hardware. Some of the peripherals
provide complex capabilities which cannot be utilized by the drivers in this library, though
the existing code can be used as a reference upon which to add support for the additional
capabilities.
For many applications, the drivers can be used as is. But in some cases, the drivers will have to be
enhanced or rewritten in order to meet the functionality, memory, or processing requirements of the
application. If so, the existing driver can be used as a reference on how to operate the peripheral.
This device support release also contains the traditional peripheral register header files and associated software. Please see chapter 2 of this guide for more information on this software. For future
development we recommend the use of this driver infrastructure instead of the traditional header
files.
Source Code Overview
The following is an overview of the organization of the peripheral driver library source code.
f2802x_common/src/
This directory contains the source code for the drivers.
f2802x_common/inc/
This directory contains the header files for the drivers. These headers define not only values used in the drivers and calls to drivers but
also define the register structure of each peripheral.
Mon Sep 17 09:17:15 CDT 2012
5
Introduction
f2802x_common/project/
This directory contains the CCS project for the driver library. The
driver library can be rebuilt if modifications are made by importing
and building this project.
6
Mon Sep 17 09:17:15 CDT 2012
Programming Model
2
Programming Model
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Direct Register Access Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Software Driver Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Combining The Models . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1
Introduction
The peripheral driver library provides support for two programming models: the direct register access model and the software driver model. Each model can be used independently or combined,
based on the needs of the application or the programming environment desired by the developer.
Each programming model has advantages and disadvantages. Use of the direct register access
model generally results in smaller and more efficient code than using the software driver model.
However, the direct register access model requires detailed knowledge of the operation of each
register and bit field, as well as their interactions and any sequencing required for proper operation of the peripheral; the developer is insulated from these details by the software driver model,
generally requiring less time to develop applications.
2.2
Direct Register Access Model
In the direct register access model, the peripherals are programmed by the application by writing
values directly into the peripheral’s registers. Every register is defined in a peripherals corresponding header file contained in f2802x_header/include. These headers define the locations of
each register relative to the other registers in a peripheral as well as the bit fields within each
register. All of this is implemented using structures. The header files only define these structure;
they do not declare them. To declare the structures a C source file must be included in each
project f2802x_headers/source/F2802x_GlobalVariableDefs.c. This file declares each
structure (and in some cases multiple instances when there are multiple instances of a peripheral) as well as declaring and associating each structure with a code section for the linker. The
final piece of the puzzle is a special linker command file that associates each section defined in
F2802x_GlobalVariableDefs.c with the physical memory of the device. There are two version of this linker command file, one for use with SYS/BIOS and one for use without, but both
can be found in f2802x_headers/cmd. One of this linker command files as well as your normal
application linker command file should be used to link your project.
Applications that wish to use the direct register access model should define the root of the f2802x
version directory to be an include path and include the file DSP28x_Project.h in each source file
where register accesses are made.
In practice accessing peripheral registers and bitfields is extremely easy. Below are a few examples:
GpioCtrlRegs.GPAPUD.bit.GPIO0 = 0;
GpioCtrlRegs.GPAMUX1.bit.GPIO0 = 1;
Mon Sep 17 09:17:15 CDT 2012
7
Programming Model
2.3
Software Driver Model
In the software driver model, the API provided by the peripheral driver library is used by applications
to control the peripherals. Because these drivers provide complete control of the peripherals in their
normal mode of operation, it is possible to write an entire application without direct access to the
hardware. This method provides for rapid development of the application without requiring detailed
knowledge of how to program the peripherals.
Before a driver for a peripheral can be used that peripherals driver header file should be included
and a handle to that peripheral initialized:
GPIO_Handle myGpio;
myGpio = GPIO_init((void *)GPIO_BASE_ADDR, sizeof(GPIO_Obj));
In subsequent calls to that peripheral’s driver the initialized handle as well as any parameters are
passed to the function:
GPIO_setPullUp(myGpio, GPIO_Number_0, GPIO_PullUp_Enable);
GPIO_setMode(myGpio, GPIO_Number_0, GPIO_0_Mode_EPWM1A);
As you can see from the above sample, using the driver library makes one’s code substantially
more readable.
In addition to including the appropriate header files for the drivers you are using, the project
should also have driverlib.lib linked into it. A CCS project as well as the lib file can be
found in f2802x_common/project. The driver library also contains some basic helper functions that many projects will use as well as the direct register access model source file
F2802x_GlobalVariableDefs.c which allows you to use the header files without having to
directly compile this source file into your project.
The drivers in the peripheral driver library are described in the remaining chapters in this document.
They combine to form the software driver model.
2.4
Combining The Models
The direct register access model and software driver model can be used together in a single application, allowing the most appropriate model to be applied as needed to any particular situation
within the application. For example, the software driver model can be used to configure the peripherals (because this is not performance critical) and the direct register access model can be used
for operation of the peripheral (which may be more performance critical). Or, the software driver
model can be used for peripherals that are not performance critical (such as a UART used for data
logging) and the direct register access model for performance critical peripherals.
To use both models interchangeably in your application:
Link driverlib.lib into your application
Include DSP28x_Project.h in files you wish to use the direct register access model
Add /controlsuite/device_support/f2802x/version/ to your projects include path
(Right click on project, Build Properties, Include Path)
Include driver header files from f2802x_common/include in any source file that makes calls
to that driver.
8
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Analog to Digital Converter (ADC)
3
Analog to Digital Converter (ADC)
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
API Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.1
Introduction
The Analog to Digital Converter (ADC) APIs provide a set of functions for accessing the Piccolo
F2802x ADC modules.
This
driver
is
contained
in
f2802x_common/source/adc.c,
with
f2802x_common/include/adc.h containing the API definitions for use by applications.
3.2
ADC
Data Structures
_ADC_Obj_
Defines
ADC_ADCCTL1_ADCBGPWD_BITS
ADC_ADCCTL1_ADCBSY_BITS
ADC_ADCCTL1_ADCBSYCHAN_BITS
ADC_ADCCTL1_ADCENABLE_BITS
ADC_ADCCTL1_ADCPWDN_BITS
ADC_ADCCTL1_ADCREFPWD_BITS
ADC_ADCCTL1_ADCREFSEL_BITS
ADC_ADCCTL1_INTPULSEPOS_BITS
ADC_ADCCTL1_RESET_BITS
ADC_ADCCTL1_TEMPCONV_BITS
ADC_ADCCTL1_VREFLOCONV_BITS
ADC_ADCSAMPLEMODE_SEPARATE_FLAG
ADC_ADCSAMPLEMODE_SIMULEN0_BITS
ADC_ADCSAMPLEMODE_SIMULEN10_BITS
ADC_ADCSAMPLEMODE_SIMULEN12_BITS
ADC_ADCSAMPLEMODE_SIMULEN14_BITS
ADC_ADCSAMPLEMODE_SIMULEN2_BITS
ADC_ADCSAMPLEMODE_SIMULEN4_BITS
ADC_ADCSAMPLEMODE_SIMULEN6_BITS
ADC_ADCSAMPLEMODE_SIMULEN8_BITS
ADC_ADCSOCxCTL_ACQPS_BITS
Mon Sep 17 09:17:15 CDT 2012
9
Analog to Digital Converter (ADC)
ADC_ADCSOCxCTL_CHSEL_BITS
ADC_ADCSOCxCTL_TRIGSEL_BITS
ADC_BASE_ADDR
ADC_dataBias
ADC_DELAY_usec
ADC_INTSELxNy_INTCONT_BITS
ADC_INTSELxNy_INTE_BITS
ADC_INTSELxNy_INTSEL_BITS
ADC_INTSELxNy_LOG2_NUMBITS_PER_REG
ADC_INTSELxNy_NUMBITS_PER_REG
Enumerations
ADC_IntMode_e
ADC_IntNumber_e
ADC_IntPulseGenMode_e
ADC_IntSrc_e
ADC_ResultNumber_e
ADC_SampleMode_e
ADC_SocChanNumber_e
ADC_SocNumber_e
ADC_SocSampleWindow_e
ADC_SocTrigSrc_e
ADC_VoltageRefSrc_e
Functions
void ADC_clearIntFlag (ADC_Handle adcHandle, const ADC_IntNumber_e intNumber)
void ADC_disable (ADC_Handle adcHandle)
void ADC_disableBandGap (ADC_Handle adcHandle)
void ADC_disableInt (ADC_Handle adcHandle, const ADC_IntNumber_e intNumber)
void ADC_disableRefBuffers (ADC_Handle adcHandle)
void ADC_disableTempSensor (ADC_Handle adcHandle)
void ADC_enable (ADC_Handle adcHandle)
void ADC_enableBandGap (ADC_Handle adcHandle)
void ADC_enableInt (ADC_Handle adcHandle, const ADC_IntNumber_e intNumber)
void ADC_enableRefBuffers (ADC_Handle adcHandle)
void ADC_enableTempSensor (ADC_Handle adcHandle)
void ADC_forceConversion (ADC_Handle adcHandle, const ADC_SocNumber_e socNumber)
bool_t ADC_getIntStatus (ADC_Handle adcHandle, const ADC_IntNumber_e intNumber)
ADC_SocSampleWindow_e ADC_getSocSampleWindow (ADC_Handle adcHandle, const
ADC_SocNumber_e socNumber)
int16_t ADC_getTemperatureC (ADC_Handle adcHandle, int16_t sensorSample)
int16_t ADC_getTemperatureK (ADC_Handle adcHandle, int16_t sensorSample)
ADC_Handle ADC_init (void ∗pMemory, const size_t numBytes)
10
Mon Sep 17 09:17:15 CDT 2012
Analog to Digital Converter (ADC)
void ADC_powerDown (ADC_Handle adcHandle)
void ADC_powerUp (ADC_Handle adcHandle)
uint_least16_t ADC_readResult (ADC_Handle adcHandle, const ADC_ResultNumber_e resultNumber)
void ADC_reset (ADC_Handle adcHandle)
void ADC_setIntMode (ADC_Handle adcHandle, const ADC_IntNumber_e intNumber, const
ADC_IntMode_e intMode)
void ADC_setIntPulseGenMode (ADC_Handle adcHandle, const ADC_IntPulseGenMode_e
pulseMode)
void ADC_setIntSrc (ADC_Handle adcHandle, const ADC_IntNumber_e intNumber, const
ADC_IntSrc_e intSrc)
void ADC_setSampleMode (ADC_Handle adcHandle, const ADC_SampleMode_e sampleMode)
void ADC_setSocChanNumber (ADC_Handle adcHandle, const ADC_SocNumber_e socNumber, const ADC_SocChanNumber_e chanNumber)
void ADC_setSocSampleWindow (ADC_Handle adcHandle, const ADC_SocNumber_e socNumber, const ADC_SocSampleWindow_e sampleWindow)
void ADC_setSocTrigSrc (ADC_Handle adcHandle, const ADC_SocNumber_e socNumber,
const ADC_SocTrigSrc_e trigSrc)
void ADC_setVoltRefSrc (ADC_Handle adcHandle, const ADC_VoltageRefSrc_e voltRef)
3.2.1
Data Structure Documentation
3.2.1.1
_ADC_Obj_
Definition:
typedef struct
{
uint16_t ADCRESULT[16];
uint16_t resvd_1[26096];
uint16_t ADCCTL1;
uint16_t rsvd_2[3];
uint16_t ADCINTFLG;
uint16_t ADCINTFLGCLR;
uint16_t ADCINTOVF;
uint16_t ADCINTOVFCLR;
uint16_t INTSELxNy[5];
uint16_t rsvd_3[3];
uint16_t SOCPRICTRL;
uint16_t rsvd_4;
uint16_t ADCSAMPLEMODE;
uint16_t rsvd_5;
uint16_t ADCINTSOCSEL1;
uint16_t ADCINTSOCSEL2;
uint16_t rsvd_6[2];
uint16_t ADCSOCFLG1;
uint16_t rsvd_7;
uint16_t ADCSOCFRC1;
uint16_t rsvd_8;
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Analog to Digital Converter (ADC)
uint16_t
uint16_t
uint16_t
uint16_t
uint16_t
uint16_t
uint16_t
uint16_t
uint16_t
uint16_t
ADCSOCOVF1;
rsvd_9;
ADCSOCOVFCLR1;
rsvd_10;
ADCSOCxCTL[16];
rsvd_11[16];
ADCREFTRIM;
ADCOFFTRIM;
resvd_12[13];
ADCREV;
}
_ADC_Obj_
Members:
ADCRESULT ADC result registers.
resvd_1 Reserved.
ADCCTL1 ADC Control Register 1.
rsvd_2 Reserved.
ADCINTFLG ADC Interrupt Flag Register.
ADCINTFLGCLR ADC Interrupt Flag Clear Register.
ADCINTOVF ADC Interrupt Overflow Register.
ADCINTOVFCLR ADC Interrupt Overflow Clear Register.
INTSELxNy ADC Interrupt Select x and y Register.
rsvd_3 Reserved.
SOCPRICTRL ADC Start Of Conversion Priority Control Register.
rsvd_4 Reserved.
ADCSAMPLEMODE ADC Sample Mode Register.
rsvd_5 Reserved.
ADCINTSOCSEL1 ADC Interrupt Trigger SOC Select 1 Register.
ADCINTSOCSEL2 ADC Interrupt Trigger SOC Select 2 Register.
rsvd_6 Reserved.
ADCSOCFLG1 ADC SOC Flag 1 Register.
rsvd_7 Reserved.
ADCSOCFRC1 ADC SOC Force 1 Register.
rsvd_8 Reserved.
ADCSOCOVF1 ADC SOC Overflow 1 Register.
rsvd_9 Reserved.
ADCSOCOVFCLR1 ADC SOC Overflow Clear 1 Register.
rsvd_10 Reserved.
ADCSOCxCTL ADC SOCx Control Registers.
rsvd_11 Reserved.
ADCREFTRIM ADC Reference/Gain Trim Register.
ADCOFFTRIM ADC Offset Trim Register.
resvd_12 Reserved.
ADCREV ADC Revision Register.
Description:
Defines the analog-to-digital converter (ADC) object.
12
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3.2.2
Define Documentation
3.2.2.1
ADC_ADCCTL1_ADCBGPWD_BITS
Definition:
#define ADC_ADCCTL1_ADCBGPWD_BITS
Description:
Defines the location of the ADCBGPWD bits in the ADCTL1 register.
3.2.2.2
ADC_ADCCTL1_ADCBSY_BITS
Definition:
#define ADC_ADCCTL1_ADCBSY_BITS
Description:
Defines the location of the ADCBSY bits in the ADCTL1 register.
3.2.2.3
ADC_ADCCTL1_ADCBSYCHAN_BITS
Definition:
#define ADC_ADCCTL1_ADCBSYCHAN_BITS
Description:
Defines the location of the ADCBSYCHAN bits in the ADCTL1 register.
3.2.2.4
ADC_ADCCTL1_ADCENABLE_BITS
Definition:
#define ADC_ADCCTL1_ADCENABLE_BITS
Description:
Defines the location of the ADCENABLE bits in the ADCTL1 register.
3.2.2.5
ADC_ADCCTL1_ADCPWDN_BITS
Definition:
#define ADC_ADCCTL1_ADCPWDN_BITS
Description:
Defines the location of the ADCPWDN bits in the ADCTL1 register.
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Analog to Digital Converter (ADC)
3.2.2.6
ADC_ADCCTL1_ADCREFPWD_BITS
Definition:
#define ADC_ADCCTL1_ADCREFPWD_BITS
Description:
Defines the location of the ADCREFPWD bits in the ADCTL1 register.
3.2.2.7
ADC_ADCCTL1_ADCREFSEL_BITS
Definition:
#define ADC_ADCCTL1_ADCREFSEL_BITS
Description:
Defines the location of the ADCREFSEL bits in the ADCTL1 register.
3.2.2.8
ADC_ADCCTL1_INTPULSEPOS_BITS
Definition:
#define ADC_ADCCTL1_INTPULSEPOS_BITS
Description:
Defines the location of the INTPULSEPOS bits in the ADCTL1 register.
3.2.2.9
ADC_ADCCTL1_RESET_BITS
Definition:
#define ADC_ADCCTL1_RESET_BITS
Description:
Defines the location of the RESET bits in the ADCTL1 register.
3.2.2.10 ADC_ADCCTL1_TEMPCONV_BITS
Definition:
#define ADC_ADCCTL1_TEMPCONV_BITS
Description:
Defines the location of the TEMPCONV bits in the ADCTL1 register.
3.2.2.11 ADC_ADCCTL1_VREFLOCONV_BITS
Definition:
#define ADC_ADCCTL1_VREFLOCONV_BITS
Description:
Defines the location of the VREFLOCONV bits in the ADCTL1 register.
14
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Analog to Digital Converter (ADC)
3.2.2.12 ADC_ADCSAMPLEMODE_SEPARATE_FLAG
Definition:
#define ADC_ADCSAMPLEMODE_SEPARATE_FLAG
Description:
Define for the channel separate flag.
3.2.2.13 ADC_ADCSAMPLEMODE_SIMULEN0_BITS
Definition:
#define ADC_ADCSAMPLEMODE_SIMULEN0_BITS
Description:
Defines the location of the SIMULEN0 bits in the ADCSAMPLEMODE register.
3.2.2.14 ADC_ADCSAMPLEMODE_SIMULEN10_BITS
Definition:
#define ADC_ADCSAMPLEMODE_SIMULEN10_BITS
Description:
Defines the location of the SIMULEN10 bits in the ADCSAMPLEMODE register.
3.2.2.15 ADC_ADCSAMPLEMODE_SIMULEN12_BITS
Definition:
#define ADC_ADCSAMPLEMODE_SIMULEN12_BITS
Description:
Defines the location of the SIMULEN12 bits in the ADCSAMPLEMODE register.
3.2.2.16 ADC_ADCSAMPLEMODE_SIMULEN14_BITS
Definition:
#define ADC_ADCSAMPLEMODE_SIMULEN14_BITS
Description:
Defines the location of the SIMULEN14 bits in the ADCSAMPLEMODE register.
3.2.2.17 ADC_ADCSAMPLEMODE_SIMULEN2_BITS
Definition:
#define ADC_ADCSAMPLEMODE_SIMULEN2_BITS
Description:
Defines the location of the SIMULEN2 bits in the ADCSAMPLEMODE register.
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Analog to Digital Converter (ADC)
3.2.2.18 ADC_ADCSAMPLEMODE_SIMULEN4_BITS
Definition:
#define ADC_ADCSAMPLEMODE_SIMULEN4_BITS
Description:
Defines the location of the SIMULEN4 bits in the ADCSAMPLEMODE register.
3.2.2.19 ADC_ADCSAMPLEMODE_SIMULEN6_BITS
Definition:
#define ADC_ADCSAMPLEMODE_SIMULEN6_BITS
Description:
Defines the location of the SIMULEN6 bits in the ADCSAMPLEMODE register.
3.2.2.20 ADC_ADCSAMPLEMODE_SIMULEN8_BITS
Definition:
#define ADC_ADCSAMPLEMODE_SIMULEN8_BITS
Description:
Defines the location of the SIMULEN8 bits in the ADCSAMPLEMODE register.
3.2.2.21 ADC_ADCSOCxCTL_ACQPS_BITS
Definition:
#define ADC_ADCSOCxCTL_ACQPS_BITS
Description:
Defines the location of the ACQPS bits in the ADCSOCxCTL register.
3.2.2.22 ADC_ADCSOCxCTL_CHSEL_BITS
Definition:
#define ADC_ADCSOCxCTL_CHSEL_BITS
Description:
Defines the location of the CHSEL bits in the ADCSOCxCTL register.
3.2.2.23 ADC_ADCSOCxCTL_TRIGSEL_BITS
Definition:
#define ADC_ADCSOCxCTL_TRIGSEL_BITS
Description:
Defines the location of the TRIGSEL bits in the ADCSOCxCTL register.
16
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Analog to Digital Converter (ADC)
3.2.2.24 ADC_BASE_ADDR
Definition:
#define ADC_BASE_ADDR
Description:
Defines the base address of the analog-to-digital converter (ADC) registers.
3.2.2.25 ADC_dataBias
Definition:
#define ADC_dataBias
Description:
Integer value bias corresponding to voltage 1.65V bias of input data on 3.3V, 12 bit ADC.
3.2.2.26 ADC_DELAY_usec
Definition:
#define ADC_DELAY_usec
Description:
Defines the ADC delay for part of the ADC initialization.
3.2.2.27 ADC_INTSELxNy_INTCONT_BITS
Definition:
#define ADC_INTSELxNy_INTCONT_BITS
Description:
Defines the location of the INTCONT bits in the INTSELxNy register.
3.2.2.28 ADC_INTSELxNy_INTE_BITS
Definition:
#define ADC_INTSELxNy_INTE_BITS
Description:
Defines the location of the INTE bits in the INTSELxNy register.
3.2.2.29 ADC_INTSELxNy_INTSEL_BITS
Definition:
#define ADC_INTSELxNy_INTSEL_BITS
Description:
Defines the location of the INTSEL bits in the INTSELxNy register.
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Analog to Digital Converter (ADC)
3.2.2.30 ADC_INTSELxNy_LOG2_NUMBITS_PER_REG
Definition:
#define ADC_INTSELxNy_LOG2_NUMBITS_PER_REG
Description:
Defines the log2() of the number of bits per INTSELxNy register.
3.2.2.31 ADC_INTSELxNy_NUMBITS_PER_REG
Definition:
#define ADC_INTSELxNy_NUMBITS_PER_REG
Description:
Defines the number of bits per INTSELxNy register.
3.2.3
Typedef Documentation
3.2.3.1
ADC_Handle
Definition:
typedef struct ADC_Obj *ADC_Handle
Description:
Defines the analog-to-digital converter (ADC) handle.
3.2.3.2
ADC_Obj
Definition:
typedef struct _ADC_Obj_ ADC_Obj
Description:
Defines the analog-to-digital converter (ADC) object.
3.2.4
Enumeration Documentation
3.2.4.1
ADC_IntMode_e
Description:
Enumeration to define the analog-to-digital converter (ADC) interrupt mode.
Enumerators:
ADC_IntMode_ClearFlag Denotes that a new interrupt with not be generated until the interrupt flag is cleared.
ADC_IntMode_EOC Denotes that a new interrupt with be generated on the next end of conversion (EOC).
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Analog to Digital Converter (ADC)
3.2.4.2
ADC_IntNumber_e
Description:
Enumeration to define the analog-to-digital converter (ADC) interrupt number.
Enumerators:
ADC_IntNumber_1
ADC_IntNumber_2
ADC_IntNumber_3
ADC_IntNumber_4
ADC_IntNumber_5
ADC_IntNumber_6
ADC_IntNumber_7
ADC_IntNumber_8
ADC_IntNumber_9
3.2.4.3
Denotes ADCINT1.
Denotes ADCINT2.
Denotes ADCINT3.
Denotes ADCINT4.
Denotes ADCINT5.
Denotes ADCINT6.
Denotes ADCINT7.
Denotes ADCINT8.
Denotes ADCINT9.
ADC_IntPulseGenMode_e
Description:
Enumeration to define the analog-to-digital converter (ADC) interrupt pulse generation mode.
Enumerators:
ADC_IntPulseGenMode_During Denotes that interrupt pulse generation occurs when the
ADC begins conversion.
ADC_IntPulseGenMode_Prior Denotes that interrupt pulse generation occurs 1 cycle prior
to the ADC result latching.
3.2.4.4
ADC_IntSrc_e
Description:
Enumeration to define the analog-to-digital converter (ADC) interrupt source.
Enumerators:
ADC_IntSrc_EOC0 Denotes that interrupt source is the end of conversion for SOC0.
ADC_IntSrc_EOC1 Denotes that interrupt source is the end of conversion for SOC1.
ADC_IntSrc_EOC2 Denotes that interrupt source is the end of conversion for SOC2.
ADC_IntSrc_EOC3 Denotes that interrupt source is the end of conversion for SOC3.
ADC_IntSrc_EOC4 Denotes that interrupt source is the end of conversion for SOC4.
ADC_IntSrc_EOC5 Denotes that interrupt source is the end of conversion for SOC5.
ADC_IntSrc_EOC6 Denotes that interrupt source is the end of conversion for SOC6.
ADC_IntSrc_EOC7 Denotes that interrupt source is the end of conversion for SOC7.
ADC_IntSrc_EOC8 Denotes that interrupt source is the end of conversion for SOC8.
ADC_IntSrc_EOC9 Denotes that interrupt source is the end of conversion for SOC9.
ADC_IntSrc_EOC10 Denotes that interrupt source is the end of conversion for SOC10.
ADC_IntSrc_EOC11 Denotes that interrupt source is the end of conversion for SOC11.
ADC_IntSrc_EOC12 Denotes that interrupt source is the end of conversion for SOC12.
ADC_IntSrc_EOC13 Denotes that interrupt source is the end of conversion for SOC13.
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Analog to Digital Converter (ADC)
ADC_IntSrc_EOC14 Denotes that interrupt source is the end of conversion for SOC14.
ADC_IntSrc_EOC15 Denotes that interrupt source is the end of conversion for SOC15.
3.2.4.5
ADC_ResultNumber_e
Description:
Enumeration to define the analog-to-digital converter (ADC) result number.
Enumerators:
ADC_ResultNumber_0 Denotes ADCRESULT0.
ADC_ResultNumber_1 Denotes ADCRESULT1.
ADC_ResultNumber_2 Denotes ADCRESULT2.
ADC_ResultNumber_3 Denotes ADCRESULT3.
ADC_ResultNumber_4 Denotes ADCRESULT4.
ADC_ResultNumber_5 Denotes ADCRESULT5.
ADC_ResultNumber_6 Denotes ADCRESULT6.
ADC_ResultNumber_7 Denotes ADCRESULT7.
ADC_ResultNumber_8 Denotes ADCRESULT8.
ADC_ResultNumber_9 Denotes ADCRESULT9.
ADC_ResultNumber_10 Denotes ADCRESULT10.
ADC_ResultNumber_11 Denotes ADCRESULT11.
ADC_ResultNumber_12 Denotes ADCRESULT12.
ADC_ResultNumber_13 Denotes ADCRESULT13.
ADC_ResultNumber_14 Denotes ADCRESULT14.
ADC_ResultNumber_15 Denotes ADCRESULT15.
3.2.4.6
ADC_SampleMode_e
Description:
Enumeration to define the analog-to-digital converter (ADC) sample modes.
Enumerators:
ADC_SampleMode_SOC0_and_SOC1_Separate Denotes SOC0 and SOC1 are sampled
separately.
ADC_SampleMode_SOC2_and_SOC3_Separate Denotes SOC2 and SOC3 are sampled
separately.
ADC_SampleMode_SOC4_and_SOC5_Separate Denotes SOC4 and SOC5 are sampled
separately.
ADC_SampleMode_SOC6_and_SOC7_Separate Denotes SOC6 and SOC7 are sampled
separately.
ADC_SampleMode_SOC8_and_SOC9_Separate Denotes SOC8 and SOC9 are sampled
separately.
ADC_SampleMode_SOC10_and_SOC11_Separate Denotes SOC10 and SOC11 are sampled separately.
ADC_SampleMode_SOC12_and_SOC13_Separate Denotes SOC12 and SOC13 are sampled separately.
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Analog to Digital Converter (ADC)
ADC_SampleMode_SOC14_and_SOC15_Separate Denotes SOC14 and SOC15 are sampled separately.
ADC_SampleMode_SOC0_and_SOC1_Together Denotes SOC0 and SOC1 are sampled
together.
ADC_SampleMode_SOC2_and_SOC3_Together Denotes SOC2 and SOC3 are sampled
together.
ADC_SampleMode_SOC4_and_SOC5_Together Denotes SOC4 and SOC5 are sampled
together.
ADC_SampleMode_SOC6_and_SOC7_Together Denotes SOC6 and SOC7 are sampled
together.
ADC_SampleMode_SOC8_and_SOC9_Together Denotes SOC8 and SOC9 are sampled
together.
ADC_SampleMode_SOC10_and_SOC11_Together Denotes SOC10 and SOC11 are sampled together.
ADC_SampleMode_SOC12_and_SOC13_Together Denotes SOC12 and SOC13 are sampled together.
ADC_SampleMode_SOC14_and_SOC15_Together Denotes SOC14 and SOC15 are sampled together.
3.2.4.7
ADC_SocChanNumber_e
Description:
Enumeration to define the start of conversion (SOC) channel numbers.
Enumerators:
ADC_SocChanNumber_A0 Denotes SOC channel number A0.
ADC_SocChanNumber_A1 Denotes SOC channel number A1.
ADC_SocChanNumber_A2 Denotes SOC channel number A2.
ADC_SocChanNumber_A3 Denotes SOC channel number A3.
ADC_SocChanNumber_A4 Denotes SOC channel number A4.
ADC_SocChanNumber_A5 Denotes SOC channel number A5.
ADC_SocChanNumber_A6 Denotes SOC channel number A6.
ADC_SocChanNumber_A7 Denotes SOC channel number A7.
ADC_SocChanNumber_B0 Denotes SOC channel number B0.
ADC_SocChanNumber_B1 Denotes SOC channel number B1.
ADC_SocChanNumber_B2 Denotes SOC channel number B2.
ADC_SocChanNumber_B3 Denotes SOC channel number B3.
ADC_SocChanNumber_B4 Denotes SOC channel number B4.
ADC_SocChanNumber_B5 Denotes SOC channel number B5.
ADC_SocChanNumber_B6 Denotes SOC channel number B6.
ADC_SocChanNumber_B7 Denotes SOC channel number B7.
ADC_SocChanNumber_A0_and_B0_Together Denotes SOC channel number A0 and B0
together.
ADC_SocChanNumber_A1_and_B1_Together Denotes SOC channel number A0 and B0
together.
ADC_SocChanNumber_A2_and_B2_Together Denotes SOC channel number A0 and B0
together.
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21
Analog to Digital Converter (ADC)
ADC_SocChanNumber_A3_and_B3_Together
together.
ADC_SocChanNumber_A4_and_B4_Together
together.
ADC_SocChanNumber_A5_and_B5_Together
together.
ADC_SocChanNumber_A6_and_B6_Together
together.
ADC_SocChanNumber_A7_and_B7_Together
together.
3.2.4.8
Denotes SOC channel number A0 and B0
Denotes SOC channel number A0 and B0
Denotes SOC channel number A0 and B0
Denotes SOC channel number A0 and B0
Denotes SOC channel number A0 and B0
ADC_SocNumber_e
Description:
Enumeration to define the start of conversion (SOC) numbers.
Enumerators:
ADC_SocNumber_0 Denotes SOC0.
ADC_SocNumber_1 Denotes SOC1.
ADC_SocNumber_2 Denotes SOC2.
ADC_SocNumber_3 Denotes SOC3.
ADC_SocNumber_4 Denotes SOC4.
ADC_SocNumber_5 Denotes SOC5.
ADC_SocNumber_6 Denotes SOC6.
ADC_SocNumber_7 Denotes SOC7.
ADC_SocNumber_8 Denotes SOC8.
ADC_SocNumber_9 Denotes SOC9.
ADC_SocNumber_10 Denotes SOC10.
ADC_SocNumber_11 Denotes SOC11.
ADC_SocNumber_12 Denotes SOC12.
ADC_SocNumber_13 Denotes SOC13.
ADC_SocNumber_14 Denotes SOC14.
ADC_SocNumber_15 Denotes SOC15.
3.2.4.9
ADC_SocSampleWindow_e
Description:
Enumeration to define the start of conversion (SOC) sample delays.
Enumerators:
ADC_SocSampleWindow_7_cycles Denotes an SOC sample window of 7 cycles.
ADC_SocSampleWindow_8_cycles Denotes an SOC sample window of 8 cycles.
ADC_SocSampleWindow_9_cycles Denotes an SOC sample window of 9 cycles.
ADC_SocSampleWindow_10_cycles Denotes an SOC sample window of 10 cycles.
ADC_SocSampleWindow_11_cycles Denotes an SOC sample window of 11 cycles.
ADC_SocSampleWindow_12_cycles Denotes an SOC sample window of 12 cycles.
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Analog to Digital Converter (ADC)
ADC_SocSampleWindow_13_cycles
ADC_SocSampleWindow_14_cycles
ADC_SocSampleWindow_15_cycles
ADC_SocSampleWindow_16_cycles
ADC_SocSampleWindow_17_cycles
ADC_SocSampleWindow_18_cycles
ADC_SocSampleWindow_19_cycles
ADC_SocSampleWindow_20_cycles
ADC_SocSampleWindow_21_cycles
ADC_SocSampleWindow_22_cycles
ADC_SocSampleWindow_23_cycles
ADC_SocSampleWindow_24_cycles
ADC_SocSampleWindow_25_cycles
ADC_SocSampleWindow_26_cycles
ADC_SocSampleWindow_27_cycles
ADC_SocSampleWindow_28_cycles
ADC_SocSampleWindow_29_cycles
ADC_SocSampleWindow_30_cycles
ADC_SocSampleWindow_31_cycles
ADC_SocSampleWindow_32_cycles
ADC_SocSampleWindow_33_cycles
ADC_SocSampleWindow_34_cycles
ADC_SocSampleWindow_35_cycles
ADC_SocSampleWindow_36_cycles
ADC_SocSampleWindow_37_cycles
ADC_SocSampleWindow_38_cycles
ADC_SocSampleWindow_39_cycles
ADC_SocSampleWindow_40_cycles
ADC_SocSampleWindow_41_cycles
ADC_SocSampleWindow_42_cycles
ADC_SocSampleWindow_43_cycles
ADC_SocSampleWindow_44_cycles
ADC_SocSampleWindow_45_cycles
ADC_SocSampleWindow_46_cycles
ADC_SocSampleWindow_47_cycles
ADC_SocSampleWindow_48_cycles
ADC_SocSampleWindow_49_cycles
ADC_SocSampleWindow_50_cycles
ADC_SocSampleWindow_51_cycles
ADC_SocSampleWindow_52_cycles
ADC_SocSampleWindow_53_cycles
ADC_SocSampleWindow_54_cycles
ADC_SocSampleWindow_55_cycles
ADC_SocSampleWindow_56_cycles
ADC_SocSampleWindow_57_cycles
ADC_SocSampleWindow_58_cycles
Mon Sep 17 09:17:15 CDT 2012
Denotes an SOC sample window of 13 cycles.
Denotes an SOC sample window of 14 cycles.
Denotes an SOC sample window of 15 cycles.
Denotes an SOC sample window of 16 cycles.
Denotes an SOC sample window of 17 cycles.
Denotes an SOC sample window of 18 cycles.
Denotes an SOC sample window of 19 cycles.
Denotes an SOC sample window of 20 cycles.
Denotes an SOC sample window of 21 cycles.
Denotes an SOC sample window of 22 cycles.
Denotes an SOC sample window of 23 cycles.
Denotes an SOC sample window of 24 cycles.
Denotes an SOC sample window of 25 cycles.
Denotes an SOC sample window of 26 cycles.
Denotes an SOC sample window of 27 cycles.
Denotes an SOC sample window of 28 cycles.
Denotes an SOC sample window of 29 cycles.
Denotes an SOC sample window of 30 cycles.
Denotes an SOC sample window of 31 cycles.
Denotes an SOC sample window of 32 cycles.
Denotes an SOC sample window of 33 cycles.
Denotes an SOC sample window of 34 cycles.
Denotes an SOC sample window of 35 cycles.
Denotes an SOC sample window of 36 cycles.
Denotes an SOC sample window of 37 cycles.
Denotes an SOC sample window of 38 cycles.
Denotes an SOC sample window of 39 cycles.
Denotes an SOC sample window of 40 cycles.
Denotes an SOC sample window of 41 cycles.
Denotes an SOC sample window of 42 cycles.
Denotes an SOC sample window of 43 cycles.
Denotes an SOC sample window of 44 cycles.
Denotes an SOC sample window of 45 cycles.
Denotes an SOC sample window of 46 cycles.
Denotes an SOC sample window of 47 cycles.
Denotes an SOC sample window of 48 cycles.
Denotes an SOC sample window of 49 cycles.
Denotes an SOC sample window of 50 cycles.
Denotes an SOC sample window of 51 cycles.
Denotes an SOC sample window of 52 cycles.
Denotes an SOC sample window of 53 cycles.
Denotes an SOC sample window of 54 cycles.
Denotes an SOC sample window of 55 cycles.
Denotes an SOC sample window of 56 cycles.
Denotes an SOC sample window of 57 cycles.
Denotes an SOC sample window of 58 cycles.
23
Analog to Digital Converter (ADC)
ADC_SocSampleWindow_59_cycles
ADC_SocSampleWindow_60_cycles
ADC_SocSampleWindow_61_cycles
ADC_SocSampleWindow_62_cycles
ADC_SocSampleWindow_63_cycles
ADC_SocSampleWindow_64_cycles
Denotes an SOC sample window of 59 cycles.
Denotes an SOC sample window of 60 cycles.
Denotes an SOC sample window of 61 cycles.
Denotes an SOC sample window of 62 cycles.
Denotes an SOC sample window of 63 cycles.
Denotes an SOC sample window of 64 cycles.
3.2.4.10 ADC_SocTrigSrc_e
Description:
Enumeration to define the start of conversion (SOC) trigger source.
Enumerators:
ADC_SocTrigSrc_Sw Denotes a software trigger source for the SOC flag.
ADC_SocTrigSrc_CpuTimer_0 Denotes a CPUTIMER0 trigger source for the SOC flag.
ADC_SocTrigSrc_CpuTimer_1 Denotes a CPUTIMER1 trigger source for the SOC flag.
ADC_SocTrigSrc_CpuTimer_2 Denotes a CPUTIMER2 trigger source for the SOC flag.
ADC_SocTrigSrc_XINT2_XINT2SOC Denotes a XINT2, XINT2SOC trigger source for the
SOC flag.
ADC_SocTrigSrc_EPWM1_ADCSOCA Denotes a EPWM1, ADCSOCA trigger source for
the SOC flag.
ADC_SocTrigSrc_EPWM1_ADCSOCB Denotes a EPWM1, ADCSOCB trigger source for
the SOC flag.
ADC_SocTrigSrc_EPWM2_ADCSOCA Denotes a EPWM2, ADCSOCA trigger source for
the SOC flag.
ADC_SocTrigSrc_EPWM2_ADCSOCB Denotes a EPWM2, ADCSOCB trigger source for
the SOC flag.
ADC_SocTrigSrc_EPWM3_ADCSOCA Denotes a EPWM3, ADCSOCA trigger source for
the SOC flag.
ADC_SocTrigSrc_EPWM3_ADCSOCB Denotes a EPWM3, ADCSOCB trigger source for
the SOC flag.
ADC_SocTrigSrc_EPWM4_ADCSOCA Denotes a EPWM4, ADCSOCA trigger source for
the SOC flag.
ADC_SocTrigSrc_EPWM4_ADCSOCB Denotes a EPWM4, ADCSOCB trigger source for
the SOC flag.
ADC_SocTrigSrc_EPWM5_ADCSOCA Denotes a EPWM5, ADCSOCA trigger source for
the SOC flag.
ADC_SocTrigSrc_EPWM5_ADCSOCB Denotes a EPWM5, ADCSOCB trigger source for
the SOC flag.
ADC_SocTrigSrc_EPWM6_ADCSOCA Denotes a EPWM6, ADCSOCA trigger source for
the SOC flag.
ADC_SocTrigSrc_EPWM6_ADCSOCB Denotes a EPWM7, ADCSOCB trigger source for
the SOC flag.
ADC_SocTrigSrc_EPWM7_ADCSOCA Denotes a EPWM7, ADCSOCA trigger source for
the SOC flag.
ADC_SocTrigSrc_EPWM7_ADCSOCB Denotes a EPWM7, ADCSOCB trigger source for
the SOC flag.
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Analog to Digital Converter (ADC)
3.2.4.11 ADC_VoltageRefSrc_e
Description:
Enumeration to define the voltage reference source.
Enumerators:
ADC_VoltageRefSrc_Int Denotes an internal voltage reference source.
ADC_VoltageRefSrc_Ext Denotes an internal voltage reference source.
3.2.5
Function Documentation
3.2.5.1
ADC_clearIntFlag
Clears the analog-to-digital converter (ADC) interrupt flag.
Prototype:
void
ADC_clearIntFlag(ADC_Handle adcHandle,
const ADC_IntNumber_e intNumber) [inline]
Parameters:
← adcHandle The analog-to-digital converter (ADC) object handle
← intNumber The ADC interrupt number
3.2.5.2
void ADC_disable (ADC_Handle adcHandle)
Disables the analog-to-digital converter (ADC).
Parameters:
← adcHandle The analog-to-digital converter (ADC) object handle
3.2.5.3
void ADC_disableBandGap (ADC_Handle adcHandle)
Disables the analog-to-digital converter (ADC) band gap circuit.
Parameters:
← adcHandle The analog-to-digital converter (ADC) object handle
3.2.5.4
void ADC_disableInt (ADC_Handle adcHandle, const ADC_IntNumber_e
intNumber)
Disables the analog-to-digital converter (ADC) interrupt.
Parameters:
← adcHandle The analog-to-digital converter (ADC) object handle
← intNumber The interrupt number
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25
Analog to Digital Converter (ADC)
3.2.5.5
void ADC_disableRefBuffers (ADC_Handle adcHandle)
Disables the analog-to-digital converter (ADC) reference buffers circuit.
Parameters:
← adcHandle The analog-to-digital converter (ADC) object handle
3.2.5.6
void ADC_disableTempSensor (ADC_Handle adcHandle)
Disables temperature sensor for conversion on A5.
Parameters:
← adcHandle The analog-to-digital converter (ADC) object handle
3.2.5.7
void ADC_enable (ADC_Handle adcHandle)
Enables the analog-to-digital converter (ADC).
Parameters:
← adcHandle The analog-to-digital converter (ADC) object handle
3.2.5.8
void ADC_enableBandGap (ADC_Handle adcHandle)
Enables the analog-to-digital converter (ADC) band gap circuit.
Parameters:
← adcHandle The analog-to-digital converter (ADC) object handle
3.2.5.9
void ADC_enableInt (ADC_Handle adcHandle, const ADC_IntNumber_e
intNumber)
Enables the analog-to-digital converter (ADC) interrupt.
Parameters:
← adcHandle The analog-to-digital converter (ADC) object handle
← intNumber The interrupt number
3.2.5.10 void ADC_enableRefBuffers (ADC_Handle adcHandle)
Enables the analog-to-digital converter (ADC) reference buffers circuit.
Parameters:
← adcHandle The analog-to-digital converter (ADC) object handle
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Analog to Digital Converter (ADC)
3.2.5.11 void ADC_enableTempSensor (ADC_Handle adcHandle)
Enables temperature sensor for conversion on A5.
Parameters:
← adcHandle The analog-to-digital converter (ADC) object handle
3.2.5.12 void ADC_forceConversion (ADC_Handle adcHandle, const ADC_SocNumber_e
socNumber) [inline]
Reads the specified ADC result (i.e. value).
Parameters:
← adcHandle The ADC handle
← resultNumber The result number for the ADCRESULT registers
Returns:
The ADC result
3.2.5.13 bool_t ADC_getIntStatus (ADC_Handle adcHandle, const ADC_IntNumber_e
intNumber) [inline]
Reads the status for a given ADC interrupt.
Parameters:
← adcHandle The analog-to-digital converter (ADC) object handle
← intNumber The ADC interrupt number
Returns:
Interrupt status for selected ADC interrupt
3.2.5.14 ADC_SocSampleWindow_e ADC_getSocSampleWindow (ADC_Handle
adcHandle, const ADC_SocNumber_e socNumber) [inline]
Gets the analog-to-digital converter (ADC) start-of-conversion (SOC) sample delay value.
Parameters:
← adcHandle The analog-to-digital converter (ADC) object handle
← socNumber The SOC number
Returns:
The ADC sample delay value
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Analog to Digital Converter (ADC)
3.2.5.15 int16_t ADC_getTemperatureC (ADC_Handle adcHandle, int16_t sensorSample)
[inline]
Converts a temperature sensor sample into a temperature in Celcius.
Parameters:
← adcHandle The analog-to-digital converter (ADC) object handle
Returns:
Temperature in degrees Celcius
3.2.5.16 int16_t ADC_getTemperatureK (ADC_Handle adcHandle, int16_t sensorSample)
[inline]
Converts a temperature sensor sample into a temperature in Kelvin.
Parameters:
← adcHandle The analog-to-digital converter (ADC) object handle
Returns:
Temperature in degrees Kelvin
3.2.5.17 ADC_Handle ADC_init (void ∗ pMemory, const size_t numBytes)
Initializes the analog-to-digital converter (ADC) object handle.
Parameters:
← pMemory A pointer to the base address of the ADC registers
← numBytes The number of bytes allocated for the ADC object, bytes
Returns:
The analog-to-digital converter (ADC) object handle
3.2.5.18 void ADC_powerDown (ADC_Handle adcHandle)
Powers down the analog-to-digital converter (ADC).
Parameters:
← adcHandle The analog-to-digital converter (ADC) object handle
3.2.5.19 void ADC_powerUp (ADC_Handle adcHandle)
Powers up the analog-to-digital converter (ADC).
Parameters:
← adcHandle The analog-to-digital converter (ADC) object handle
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Analog to Digital Converter (ADC)
3.2.5.20 uint_least16_t ADC_readResult (ADC_Handle adcHandle, const
ADC_ResultNumber_e resultNumber) [inline]
Reads the specified ADC result (i.e. value).
Parameters:
← adcHandle The ADC handle
← resultNumber The result number for the ADCRESULT registers
Returns:
The ADC result
3.2.5.21 void ADC_reset (ADC_Handle adcHandle)
Resets the analog-to-digital converter (ADC).
Parameters:
← adcHandle The analog-to-digital converter (ADC) object handle
3.2.5.22 void ADC_setIntMode (ADC_Handle adcHandle, const ADC_IntNumber_e
intNumber, const ADC_IntMode_e intMode)
Sets the interrupt mode.
Parameters:
← adcHandle The analog-to-digital converter (ADC) object handle
← intNumber The interrupt number
← intMode The interrupt mode
3.2.5.23 void ADC_setIntPulseGenMode (ADC_Handle adcHandle, const
ADC_IntPulseGenMode_e pulseMode)
Sets the interrupt pulse generation mode.
Parameters:
← adcHandle The analog-to-digital converter (ADC) object handle
← pulseMode The pulse generation mode
3.2.5.24 void ADC_setIntSrc (ADC_Handle adcHandle, const ADC_IntNumber_e
intNumber, const ADC_IntSrc_e intSrc)
Sets the interrupt source.
Parameters:
← adcHandle The analog-to-digital converter (ADC) object handle
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Analog to Digital Converter (ADC)
← intNumber The interrupt number
← intSrc The interrupt source
3.2.5.25 void ADC_setSampleMode (ADC_Handle adcHandle, const ADC_SampleMode_e
sampleMode)
Sets the sample mode.
Parameters:
← adcHandle The analog-to-digital converter (ADC) object handle
← sampleMode The sample mode
3.2.5.26 void ADC_setSocChanNumber (ADC_Handle adcHandle, const
ADC_SocNumber_e socNumber, const ADC_SocChanNumber_e chanNumber)
Sets the start-of-conversion (SOC) channel number.
Parameters:
← adcHandle The analog-to-digital converter (ADC) object handle
← socNumber The SOC number
← chanNumber The channel number
3.2.5.27 void ADC_setSocSampleWindow (ADC_Handle adcHandle, const
ADC_SocNumber_e socNumber, const ADC_SocSampleWindow_e
sampleWindow)
Sets the start-of-conversion (SOC) sample delay.
Parameters:
← adcHandle The analog-to-digital converter (ADC) object handle
← socNumber The SOC number
← sampleDelay The sample delay
3.2.5.28 void ADC_setSocTrigSrc (ADC_Handle adcHandle, const ADC_SocNumber_e
socNumber, const ADC_SocTrigSrc_e trigSrc)
Sets the start-of-conversion (SOC) trigger source.
Parameters:
← adcHandle The analog-to-digital converter (ADC) object handle
← socNumber The SOC number
← trigSrc The trigger delay
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Analog to Digital Converter (ADC)
3.2.5.29 void ADC_setVoltRefSrc (ADC_Handle adcHandle, const ADC_VoltageRefSrc_e
voltRef)
Sets the voltage reference source.
Parameters:
← adcHandle The analog-to-digital converter (ADC) object handle
← voltRef The voltage reference source
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Analog to Digital Converter (ADC)
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Capture (CAP)
4
Capture (CAP)
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
API Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
4.1
Introduction
The Enhanced Capture (CAP) API provides a set of functions and data structs for configuring and
capturing data as well as generating PWMs with the capture peripheral.
This
driver
is
contained
in
f2802x_common/source/cap.c,
with
f2802x_common/include/cap.h containing the API definitions and data structs for use
by applications.
4.2
CAP
Data Structures
_CAP_Obj_
Defines
CAP_ECCTL1_CAP1POL_BITS
CAP_ECCTL1_CAP2POL_BITS
CAP_ECCTL1_CAP3POL_BITS
CAP_ECCTL1_CAP4POL_BITS
CAP_ECCTL1_CAPLDEN_BITS
CAP_ECCTL1_CTRRST1_BITS
CAP_ECCTL1_CTRRST2_BITS
CAP_ECCTL1_CTRRST3_BITS
CAP_ECCTL1_CTRRST4_BITS
CAP_ECCTL1_FREESOFT_BITS
CAP_ECCTL1_PRESCALE_BITS
CAP_ECCTL2_APWMPOL_BITS
CAP_ECCTL2_CAPAPWM_BITS
CAP_ECCTL2_CONTONESHOT_BITS
CAP_ECCTL2_REARM_BITS
CAP_ECCTL2_STOP_WRAP_BITS
CAP_ECCTL2_SWSYNC_BITS
CAP_ECCTL2_SYNCIEN_BITS
CAP_ECCTL2_SYNCOSEL_BITS
CAP_ECCTL2_TSCTRSTOP_BITS
CAP_ECCxxx_CEVT1_BITS
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Capture (CAP)
CAP_ECCxxx_CEVT2_BITS
CAP_ECCxxx_CEVT3_BITS
CAP_ECCxxx_CEVT4_BITS
CAP_ECCxxx_CTRCOMP_BITS
CAP_ECCxxx_CTROVF_BITS
CAP_ECCxxx_CTRPRD_BITS
CAP_ECCxxx_INT_BITS
CAPA_BASE_ADDR
Enumerations
CAP_Event_e
CAP_Int_Type_e
CAP_Polarity_e
CAP_Prescale_e
CAP_Reset_e
CAP_RunMode_e
CAP_SyncOut_e
Functions
void CAP_clearInt (CAP_Handle capHandle, const CAP_Int_Type_e intType)
void CAP_disableCaptureLoad (CAP_Handle capHandle)
void CAP_disableInt (CAP_Handle capHandle, const CAP_Int_Type_e intType)
void CAP_disableSyncIn (CAP_Handle capHandle)
void CAP_disableTimestampCounter (CAP_Handle capHandle)
void CAP_enableCaptureLoad (CAP_Handle capHandle)
void CAP_enableInt (CAP_Handle capHandle, const CAP_Int_Type_e intType)
void CAP_enableSyncIn (CAP_Handle capHandle)
void CAP_enableTimestampCounter (CAP_Handle capHandle)
uint32_t CAP_getCap1 (CAP_Handle capHandle)
uint32_t CAP_getCap2 (CAP_Handle capHandle)
uint32_t CAP_getCap3 (CAP_Handle capHandle)
uint32_t CAP_getCap4 (CAP_Handle capHandle)
CAP_Handle CAP_init (void ∗pMemory, const size_t numBytes)
void CAP_rearm (CAP_Handle capHandle)
void CAP_setApwmCompare (CAP_Handle capHandle, const uint32_t compare)
void CAP_setApwmPeriod (CAP_Handle capHandle, const uint32_t period)
void CAP_setCapContinuous (CAP_Handle capHandle)
void CAP_setCapEvtPolarity (CAP_Handle capHandle, const CAP_Event_e event, const
CAP_Polarity_e polarity)
void CAP_setCapEvtReset (CAP_Handle capHandle, const CAP_Event_e event, const
CAP_Reset_e reset)
void CAP_setCapOneShot (CAP_Handle capHandle)
void CAP_setModeApwm (CAP_Handle capHandle)
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Capture (CAP)
void CAP_setModeCap (CAP_Handle capHandle)
void CAP_setStopWrap (CAP_Handle capHandle, const CAP_Stop_Wrap_e stopWrap)
void CAP_setSyncOut (CAP_Handle capHandle, const CAP_SyncOut_e syncOut)
4.2.1
Data Structure Documentation
4.2.1.1
_CAP_Obj_
Definition:
typedef struct
{
uint32_t TSCTR;
uint32_t CTRPHS;
uint32_t CAP1;
uint32_t CAP2;
uint32_t CAP3;
uint32_t CAP4;
uint16_t Rsvd_1[8];
uint16_t ECCTL1;
uint16_t ECCTL2;
uint16_t ECEINT;
uint16_t ECEFLG;
uint16_t ECECLR;
uint16_t ECEFRC;
}
_CAP_Obj_
Members:
TSCTR Time-stamp Counter.
CTRPHS Counter Phase Offset Value Register.
CAP1 Capture 1 Register.
CAP2 Capture 2 Register.
CAP3 Capture 3 Register.
CAP4 Capture 4 Register.
Rsvd_1 Reserved.
ECCTL1 Capture Control Register 1.
ECCTL2 Capture Control Register 2.
ECEINT Capture Interrupt Enable Register.
ECEFLG Capture Interrupt Flag Register.
ECECLR Capture Interrupt Clear Register.
ECEFRC Capture Interrupt Force Register.
Description:
Defines the capture (CAP) object.
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Capture (CAP)
4.2.2
Define Documentation
4.2.2.1
CAP_ECCTL1_CAP1POL_BITS
Definition:
#define CAP_ECCTL1_CAP1POL_BITS
Description:
Defines the location of the CAP1POL bits in the ECCTL1 register.
4.2.2.2
CAP_ECCTL1_CAP2POL_BITS
Definition:
#define CAP_ECCTL1_CAP2POL_BITS
Description:
Defines the location of the CAP2POL bits in the ECCTL1 register.
4.2.2.3
CAP_ECCTL1_CAP3POL_BITS
Definition:
#define CAP_ECCTL1_CAP3POL_BITS
Description:
Defines the location of the CAP3POL bits in the ECCTL1 register.
4.2.2.4
CAP_ECCTL1_CAP4POL_BITS
Definition:
#define CAP_ECCTL1_CAP4POL_BITS
Description:
Defines the location of the CAP4POL bits in the ECCTL1 register.
4.2.2.5
CAP_ECCTL1_CAPLDEN_BITS
Definition:
#define CAP_ECCTL1_CAPLDEN_BITS
Description:
Defines the location of the CAPLDEN bits in the ECCTL1 register.
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4.2.2.6
CAP_ECCTL1_CTRRST1_BITS
Definition:
#define CAP_ECCTL1_CTRRST1_BITS
Description:
Defines the location of the CTRRST1 bits in the ECCTL1 register.
4.2.2.7
CAP_ECCTL1_CTRRST2_BITS
Definition:
#define CAP_ECCTL1_CTRRST2_BITS
Description:
Defines the location of the CTRRST2 bits in the ECCTL1 register.
4.2.2.8
CAP_ECCTL1_CTRRST3_BITS
Definition:
#define CAP_ECCTL1_CTRRST3_BITS
Description:
Defines the location of the CTRRST3 bits in the ECCTL1 register.
4.2.2.9
CAP_ECCTL1_CTRRST4_BITS
Definition:
#define CAP_ECCTL1_CTRRST4_BITS
Description:
Defines the location of the CTRRST4 bits in the ECCTL1 register.
4.2.2.10 CAP_ECCTL1_FREESOFT_BITS
Definition:
#define CAP_ECCTL1_FREESOFT_BITS
Description:
Defines the location of the FREE/SOFT bits in the ECCTL1 register.
4.2.2.11 CAP_ECCTL1_PRESCALE_BITS
Definition:
#define CAP_ECCTL1_PRESCALE_BITS
Description:
Defines the location of the PRESCALE bits in the ECCTL1 register.
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Capture (CAP)
4.2.2.12 CAP_ECCTL2_APWMPOL_BITS
Definition:
#define CAP_ECCTL2_APWMPOL_BITS
Description:
Defines the location of the APWMPOL bits in the ECCTL2 register.
4.2.2.13 CAP_ECCTL2_CAPAPWM_BITS
Definition:
#define CAP_ECCTL2_CAPAPWM_BITS
Description:
Defines the location of the CAP/APWM bits in the ECCTL2 register.
4.2.2.14 CAP_ECCTL2_CONTONESHOT_BITS
Definition:
#define CAP_ECCTL2_CONTONESHOT_BITS
Description:
Defines the location of the CONT/ONESHOT bits in the ECCTL2 register.
4.2.2.15 CAP_ECCTL2_REARM_BITS
Definition:
#define CAP_ECCTL2_REARM_BITS
Description:
Defines the location of the REARM bits in the ECCTL2 register.
4.2.2.16 CAP_ECCTL2_STOP_WRAP_BITS
Definition:
#define CAP_ECCTL2_STOP_WRAP_BITS
Description:
Defines the location of the STOP_WRAP bits in the ECCTL2 register.
4.2.2.17 CAP_ECCTL2_SWSYNC_BITS
Definition:
#define CAP_ECCTL2_SWSYNC_BITS
Description:
Defines the location of the SWSYNC bits in the ECCTL2 register.
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Capture (CAP)
4.2.2.18 CAP_ECCTL2_SYNCIEN_BITS
Definition:
#define CAP_ECCTL2_SYNCIEN_BITS
Description:
Defines the location of the SYNCI_EN bits in the ECCTL2 register.
4.2.2.19 CAP_ECCTL2_SYNCOSEL_BITS
Definition:
#define CAP_ECCTL2_SYNCOSEL_BITS
Description:
Defines the location of the SYNCO_SEL bits in the ECCTL2 register.
4.2.2.20 CAP_ECCTL2_TSCTRSTOP_BITS
Definition:
#define CAP_ECCTL2_TSCTRSTOP_BITS
Description:
Defines the location of the TSCTRSTOP bits in the ECCTL2 register.
4.2.2.21 CAP_ECCxxx_CEVT1_BITS
Definition:
#define CAP_ECCxxx_CEVT1_BITS
Description:
Defines the location of the CEVT4 bits in the ECCxxx register.
4.2.2.22 CAP_ECCxxx_CEVT2_BITS
Definition:
#define CAP_ECCxxx_CEVT2_BITS
Description:
Defines the location of the CEVT4 bits in the ECCxxx register.
4.2.2.23 CAP_ECCxxx_CEVT3_BITS
Definition:
#define CAP_ECCxxx_CEVT3_BITS
Description:
Defines the location of the CEVT4 bits in the ECCxxx register.
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Capture (CAP)
4.2.2.24 CAP_ECCxxx_CEVT4_BITS
Definition:
#define CAP_ECCxxx_CEVT4_BITS
Description:
Defines the location of the CEVT4 bits in the ECCxxx register.
4.2.2.25 CAP_ECCxxx_CTRCOMP_BITS
Definition:
#define CAP_ECCxxx_CTRCOMP_BITS
Description:
Defines the location of the CTR=COMP bits in the ECCxxx register.
4.2.2.26 CAP_ECCxxx_CTROVF_BITS
Definition:
#define CAP_ECCxxx_CTROVF_BITS
Description:
Defines the location of the CTROVF bits in the ECCxxx register.
4.2.2.27 CAP_ECCxxx_CTRPRD_BITS
Definition:
#define CAP_ECCxxx_CTRPRD_BITS
Description:
Defines the location of the CTR=PRD bits in the ECCxxx register.
4.2.2.28 CAP_ECCxxx_INT_BITS
Definition:
#define CAP_ECCxxx_INT_BITS
Description:
Defines the location of the INT bits in the ECCxxx register.
4.2.2.29 CAPA_BASE_ADDR
Definition:
#define CAPA_BASE_ADDR
Description:
Defines the base address of the capture (CAP) A registers.
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Capture (CAP)
4.2.3
Typedef Documentation
4.2.3.1
CAP_Handle
Definition:
typedef struct CAP_Obj *CAP_Handle
Description:
Defines the capture (CAP) handle.
4.2.3.2
CAP_Obj
Definition:
typedef struct _CAP_Obj_ CAP_Obj
Description:
Defines the capture (CAP) object.
4.2.4
Enumeration Documentation
4.2.4.1
CAP_Event_e
Description:
Enumeration to define the capture (CAP) events.
Enumerators:
CAP_Event_1
CAP_Event_2
CAP_Event_3
CAP_Event_4
4.2.4.2
Capture Event 1.
Capture Event 2.
Capture Event 3.
Capture Event 4.
CAP_Int_Type_e
Description:
Enumeration to define the capture (CAP) interrupts.
Enumerators:
CAP_Int_Type_CTR_CMP Denotes CTR = CMP interrupt.
CAP_Int_Type_CTR_PRD Denotes CTR = PRD interrupt.
CAP_Int_Type_CTR_OVF Denotes CTROVF interrupt.
CAP_Int_Type_CEVT4 Denotes CEVT4 interrupt.
CAP_Int_Type_CEVT3 Denotes CEVT3 interrupt.
CAP_Int_Type_CEVT2 Denotes CEVT2 interrupt.
CAP_Int_Type_CEVT1 Denotes CEVT1 interrupt.
CAP_Int_Type_Global Denotes Capture global interrupt.
CAP_Int_Type_All Denotes All interrupts.
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Capture (CAP)
4.2.4.3
CAP_Polarity_e
Description:
Enumeration to define the capture (CAP) event polarities.
Enumerators:
CAP_Polarity_Rising Rising Edge Triggered.
CAP_Polarity_Falling Falling Edge Triggered.
4.2.4.4
CAP_Prescale_e
Description:
Enumeration to define the capture (CAP) prescaler values.
Enumerators:
CAP_Prescale_By_1 Divide by 1.
CAP_Prescale_By_2 Divide by 2.
CAP_Prescale_By_4 Divide by 4.
CAP_Prescale_By_6 Divide by 6.
CAP_Prescale_By_8 Divide by 8.
CAP_Prescale_By_10 Divide by 10.
CAP_Prescale_By_12 Divide by 12.
CAP_Prescale_By_14 Divide by 14.
CAP_Prescale_By_16 Divide by 16.
CAP_Prescale_By_18 Divide by 18.
CAP_Prescale_By_20 Divide by 20.
CAP_Prescale_By_22 Divide by 22.
CAP_Prescale_By_24 Divide by 24.
CAP_Prescale_By_26 Divide by 26.
CAP_Prescale_By_28 Divide by 28.
CAP_Prescale_By_30 Divide by 30.
CAP_Prescale_By_32 Divide by 32.
CAP_Prescale_By_34 Divide by 34.
CAP_Prescale_By_36 Divide by 36.
CAP_Prescale_By_38 Divide by 38.
CAP_Prescale_By_40 Divide by 40.
CAP_Prescale_By_42 Divide by 42.
CAP_Prescale_By_44 Divide by 44.
CAP_Prescale_By_46 Divide by 46.
CAP_Prescale_By_48 Divide by 48.
CAP_Prescale_By_50 Divide by 50.
CAP_Prescale_By_52 Divide by 52.
CAP_Prescale_By_54 Divide by 54.
CAP_Prescale_By_56 Divide by 56.
CAP_Prescale_By_58 Divide by 58.
CAP_Prescale_By_60 Divide by 60.
CAP_Prescale_By_62 Divide by 62.
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Capture (CAP)
4.2.4.5
CAP_Reset_e
Description:
Enumeration to define the capture (CAP) event resets.
Enumerators:
CAP_Reset_Disable Disable counter reset on capture event.
CAP_Reset_Enable Enable counter reset on capture event.
4.2.4.6
CAP_RunMode_e
Description:
Enumeration to define the pulse width modulation (PWM) run modes.
4.2.4.7
enum CAP_Stop_Wrap_e
Enumeration to define the capture (CAP) Stop/Wrap modes.
Enumerators:
CAP_Stop_Wrap_CEVT1
CAP_Stop_Wrap_CEVT2
CAP_Stop_Wrap_CEVT3
CAP_Stop_Wrap_CEVT4
4.2.4.8
Stop/Wrap after Capture Event 1.
Stop/Wrap after Capture Event 2.
Stop/Wrap after Capture Event 3.
Stop/Wrap after Capture Event 4.
CAP_SyncOut_e
Description:
Enumeration to define the Sync Out options.
Enumerators:
CAP_SyncOut_SyncIn Sync In used for Sync Out.
CAP_SyncOut_CTRPRD CTR = PRD used for Sync Out.
CAP_SyncOut_Disable Disables Sync Out.
4.2.5
Function Documentation
4.2.5.1
CAP_clearInt
Clears capture (CAP) interrupt flag.
Prototype:
void
CAP_clearInt(CAP_Handle capHandle,
const CAP_Int_Type_e intType) [inline]
Parameters:
← capHandle The capture (CAP) object handle
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Capture (CAP)
← intType The capture interrupt to be cleared
4.2.5.2
void CAP_disableCaptureLoad (CAP_Handle capHandle)
Disables loading of CAP1-4 on capture event.
Parameters:
← capHandle The capture (CAP) object handle
4.2.5.3
void CAP_disableInt (CAP_Handle capHandle, const CAP_Int_Type_e intType)
Disables capture (CAP) interrupt source.
Parameters:
← capHandle The capture (CAP) object handle
← intType The capture interrupt type to be disabled
4.2.5.4
void CAP_disableSyncIn (CAP_Handle capHandle)
Disables counter synchronization.
Parameters:
← capHandle The capture (CAP) object handle
4.2.5.5
void CAP_disableTimestampCounter (CAP_Handle capHandle)
Disables Time Stamp counter from running.
Parameters:
← capHandle The capture (CAP) object handle
4.2.5.6
void CAP_enableCaptureLoad (CAP_Handle capHandle)
Enables loading of CAP1-4 on capture event.
Parameters:
← capHandle The capture (CAP) object handle
4.2.5.7
void CAP_enableInt (CAP_Handle capHandle, const CAP_Int_Type_e intType)
Enables capture (CAP) interrupt source.
Parameters:
← capHandle The capture (CAP) object handle
← intType The capture interrupt type to be enabled
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4.2.5.8
void CAP_enableSyncIn (CAP_Handle capHandle)
Enables counter synchronization.
Parameters:
← capHandle The capture (CAP) object handle
4.2.5.9
void CAP_enableTimestampCounter (CAP_Handle capHandle)
Enables Time Stamp counter to running.
Parameters:
← capHandle The capture (CAP) object handle
4.2.5.10 uint32_t CAP_getCap1 (CAP_Handle capHandle) [inline]
Gets the CAP1 register value.
Parameters:
← capHandle The capture (CAP) object handle
4.2.5.11 uint32_t CAP_getCap2 (CAP_Handle capHandle) [inline]
Gets the CAP2 register value.
Parameters:
← capHandle The capture (CAP) object handle
4.2.5.12 uint32_t CAP_getCap3 (CAP_Handle capHandle) [inline]
Gets the CAP3 register value.
Parameters:
← capHandle The capture (CAP) object handle
4.2.5.13 uint32_t CAP_getCap4 (CAP_Handle capHandle) [inline]
Gets the CAP4 register value.
Parameters:
← capHandle The capture (CAP) object handle
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Capture (CAP)
4.2.5.14 CAP_Handle CAP_init (void ∗ pMemory, const size_t numBytes)
Initializes the capture (CAP) object handle.
Parameters:
← pMemory A pointer to the base address of the CAP registers
← numBytes The number of bytes allocated for the CAP object, bytes
Returns:
The capture (CAP) object handle
4.2.5.15 void CAP_rearm (CAP_Handle capHandle) [inline]
(Re-)Arm the capture module
Parameters:
← capHandle The capture (CAP) object handle
4.2.5.16 void CAP_setApwmCompare (CAP_Handle capHandle, const uint32_t compare)
[inline]
Sets the APWM compare value.
Parameters:
← capHandle The capture (CAP) object handle
← compare The APWM compare value
4.2.5.17 void CAP_setApwmPeriod (CAP_Handle capHandle, const uint32_t period)
[inline]
Sets the APWM period.
Parameters:
← capHandle The capture (CAP) object handle
← period The APWM period
4.2.5.18 void CAP_setCapContinuous (CAP_Handle capHandle)
Sets up for continuous Capture.
Parameters:
← capHandle The capture (CAP) object handle
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Mon Sep 17 09:17:15 CDT 2012
Capture (CAP)
4.2.5.19 void CAP_setCapEvtPolarity (CAP_Handle capHandle, const CAP_Event_e
event, const CAP_Polarity_e polarity)
Sets the capture event polarity.
Parameters:
← capHandle The capture (CAP) object handle
← event The event to configure
← polarity The polarity to configure the event for
4.2.5.20 void CAP_setCapEvtReset (CAP_Handle capHandle, const CAP_Event_e event,
const CAP_Reset_e reset)
Sets the capture event counter reset configuration.
Parameters:
← capHandle The capture (CAP) object handle
← event The event to configure
← reset Whether the event should reset the counter or not
4.2.5.21 void CAP_setCapOneShot (CAP_Handle capHandle)
Sets up for one-shot Capture.
Parameters:
← capHandle The capture (CAP) object handle
4.2.5.22 void CAP_setModeApwm (CAP_Handle capHandle)
Sets capture peripheral up for APWM mode.
Parameters:
← capHandle The capture (CAP) object handle
4.2.5.23 void CAP_setModeCap (CAP_Handle capHandle)
Sets capture peripheral up for capture mode.
Parameters:
← capHandle The capture (CAP) object handle
Mon Sep 17 09:17:15 CDT 2012
47
Capture (CAP)
4.2.5.24 void CAP_setStopWrap (CAP_Handle capHandle, const CAP_Stop_Wrap_e
stopWrap)
Set the stop/wrap mode.
Parameters:
← capHandle The capture (CAP) object handle
← stopWrap The stop/wrap mode to set
4.2.5.25 void CAP_setSyncOut (CAP_Handle capHandle, const CAP_SyncOut_e
syncOut)
Set the sync out mode.
Parameters:
← capHandle The capture (CAP) object handle
← syncOut The sync out mode to set
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Mon Sep 17 09:17:15 CDT 2012
Device Clocking (CLK)
5
Device Clocking (CLK)
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
API Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
5.1
Introduction
The CLK API provides functions to control the clocking subsystem of the device. Clock dividers and
prescalers as well as peripheral clocks can all be set or enabled via this API.
This
driver
is
contained
in
f280x0_common/source/clk.c,
Source Exif Data:
File Type : PDF
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PDF Version : 1.4
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Page Count : 294
Modify Date : 2014:07:09 15:30:43-05:00
Producer : iText 2.1.7 by 1T3XT
Keywords : , SPRUHX9
Title : TMS320F2802x Peripheral Driver Library User's Guide
Author : Texas Instruments, Incorporated [SPRUHX9,*]
Create Date : 2014:07:09 15:30:43-05:00
Creator : LaTeX with hyperref package
Subject : User's Guide
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