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4

3

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Schematics Page Index (Title / Revision / Change Date)

D

C

B

Page
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42

Title of Schematics Page
Schematics Page Index
Block Diagram
ARD (DMI,PEG,FDI)
ARD (CLK,MISC,JTAG)
ARD (DDR3)
ARD (POWER)
ARD (GRAPHICS POWER)
ARD (GND)
ARD (RESERVED)
PCH (HDA,JTAG,SAT)
PCH (PCI-E,SMBUS,CLK)
PCH (DMI,FDI,GPIO)
PCH (LVDS,DDI)
PCH (PCI,USB,NVRAM)
PCH (GPIO,VSS_NCTF,RSVD)
PCH (POWER) 1/2
PCH (POWER) 2/2
PCH (VSS)
CLOCK GEN
DDRIII(SO-DIMM_0) 1/3
DDRIII(SO-DIMM_1) 2/3
VGA (PCI-E) 1/6
VGA (Strap) 2/6
VGA (I/O) 3/6
VGA (Memory BUS) 4/6
VGA (LVDS) 5/6
VGA (Power) 6/6
VRAM(DDR3)# 1/4
VRAM(DDR3)# 2/4
VRAM(DDR3)# 3/4
VRAM(DDR3)# 4/4
VRAM(BYPASS) 1/2
VRAM(BYPASS) 2/2
CRT
LVDS
Inverter CONNECTOR
LVDS CONNECTOR
HDMI
EC+KBC (NPCE783L)
KB Connector
SPI Flash ROM
Debug Port

Rev.
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA

Page
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84

Project Code & Schematics Subject: M960&M970 H Model

A

Title of Schematics Page
Express Card
Mini-PCIE Card (WLAN)
LAN (88E8057) 1/2
LAN (Transformer) 2/2
SATA HDD
SATA CD-ROM
eSATA COMBO
PCIE (MS) 1/2
PCIE (SD) 1/2
Camera Connector
Bluetooth Connector
Felica Connector
Status LED & LID
FAN
Touch Pad
Thermal Sensor
Switch DB Conn.
AUDIO SPEAKER CONNECTOR
Audio/USB DB Conn.
Switch (Botton & KB LED)
Audio (CODEC)
Audio (MUTE)
Audio (Power)
Audio (Audio & USB Conn.)
Audio (Head Phone Jack)
Audio (Ext MIC Jack)
Audio (USB Port)
Power Design Diagram
DCIN&Charger
Discharge Circuit
Identify IC
SYS Power (+3_3V/+5V)
VTT&PCH Power(+1_1/1_05V)
DDR3 Power(+1_5V/+0_75V)
SYS Power(+1_8V)
CPU Power_VHCORE
CPU Power_VID
VGA Power(ATI_VDD)
Others power plane
OVP protection
HOLE & AMI LABEL
History(1)
1P-0099J00-80SB
1P-1099J00-80SB
1P-1099J01-80SB
PCB P/N: 1P-0099500-80SB
1P-1099500-80SB
1P-1099501-80SB

Rev.
Page Title of Schematics Page
SA
85
History(2)
SA
86
History(3)
SA
87
History(4)
SA
88
History(5)
SA
89
History(6)
SA
90
History(7)
SA
91
History(8)
SA
92
History(9)
SA
93
History(10)
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
SA
(IRIS MB)
(IRIS AUDIO)
(IRIS PWR)
P. Leader
Check by
(HANNSTAR MB)
(HANNSTAR Audio)
(HANNSTAR PWR)

FOXCONN
4

3

2

D

C

B

Design by
A

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

Title

Index Page

Size
A3

Document Number

Rev

M960&M970 H Model

SA

Date:
5

Rev.
SA
SA
SA
SA
SA
SA
SA
SA
SA

Thursday, December 24, 2009

Sheet
1

1

of

86

1

2

3

4

5

6

7

8

M960&M970 H Model Calpella Platform+ AMD Madison/Park Discrete
Graphic+ VRAM*8
Arrandale
Processor

A

HDMI

TMDS

Page 38

LVDS

GFX

LVDS

WSXGA

CRT

CRTPage 34

CHARGER
BQ24753A

X,TAL

CK505
SL28748CLC
Page 19

Page 20

INPUTS
DC_IN
BATTERY

14.318MHZ

SO-DIMM 1
800/1066 MHZ
DDR(III) 204 pin

800/1066 MHZ

Page 3~9

AMD
Madison-LP M2
Park-XT M2

Page 37

800/1066 MHZ

Micro-FCPGA-989
(989-pin rPGA socket)
37.5 mm X 37.5 mm

PCIE X16

SO-DIMM 0
800/1066 MHZ
DDR(III) 204 pin

INPUTS

+12V For Load

SYSTEM DC/DC

TPS51218+G2998

Page 28~33

Page 52

PCH
Ibex Peak-M
(HM55)

Digital Mic

HDA

Int. Speaker
1.0 Walt x 2 Page 60

Realtek
ALC269

USB2.0

3

676 mBGA
25 mm X 27 mm

C

PCIE

4

USB

(USB x 12)
(PCIE x 8)
(SATA x 4)

SATA 3Gb/s
SATA 3Gb/s

SATA
HDD Page 47
SATA
ODD Page 48

SATA 3Gb/s

Pre-AMP

LPC

Flash BIOS
32M bit X 1

Page 67

Transformer
LANKom Page 46
LG-2413S-1

RJ45

OUTPUTS
+1_5VSUS
DCBATOUT
+0_75VRUN

SYSTEM DC/DC
TPS51218

MS Duo(HG)
SD Card

INPUTS

OUTPUTS

Page 51

DCBATOUT
ExpressCard
34mm Page 43

+1_05V_VTT

CPU DC/DC
MAX17030

Mini-PCIE Card
(WLAN) Page 44

INPUTS

OUTPUTS

Bluetooth

C

SYSTEM DC/DC
TPS51217

Page 53

Page 10

INPUTS
OUTPUTS
DCBATOUT VDD CORE

Felica
Page 69

B

INPUTS

DCBATOUT VHCORE

Headphone Jack
USB 2.0
CONN.X3

Page 50

Page 10~18

SPI

Page 63

Page 68

4

Ethernet GbE
88E8059
Page 45
Marvell
10/100/1000
Ricoh R5U231
CardReader

w/ Class D Amp.

Ext. Mic In Jack

+3VALW
+5VALW
+5VALW_LDO

DMI X4

DDR3 VRAM

CAM(0.3M)

OUTPUTS

DCBATOUT

Madison
DDR3 1GB(1Gbx8pcs)
Park
DDR3 512MB(1Gbx4pcs)

Camera Module

DCBATOUT

SN0608098

29mm X 29mm

B

OUTPUTS

SYSTEM DC/DC

Page 21

Page 22~27

A

Audio/USB DB

Page 54

Page 63~69

Winbond
NPCE783L

USB 2.0 / eSATA
Combo CONN.

LQFP-128

Page 49

Page 39

PWM/TACH

PS/2

GPIO
SPI
SMBus 1

35001 Bus
SMBus 2
D

D

FAN
Page 56

Lid Switch
Page 55

Flash BIOS
1M bit x1
Page 41

BATT CONN

BATT ID
Page 73

Page 71

Thermal Sensor
W83L771AWG
(VGA)
Page 58

Touch PAD
Page 57

Switch DB
Page 59

FOXCONN

Title

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

Block Diagram

Size
Document Number
Custom

Rev

M960&M970 H Model

Date:
1

2

3

4

5

6

7

Thursday, December 24, 2009

SA

Sheet

2
8

of

86

1

2

3

4

5

6

7

8

A

A

U67A

12

DMI_TXN[3:0]

DMI_TXP[3:0]

12 DMI_RXP[3:0]

A24
C23
B22
A21

DMI_RX#[0]
DMI_RX#[1]
DMI_RX#[2]
DMI_RX#[3]

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

B24
D23
B23
A22

DMI_RX[0]
DMI_RX[1]
DMI_RX[2]
DMI_RX[3]

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

D24
G24
F23
H23

DMI_TX#[0]
DMI_TX#[1]
DMI_TX#[2]
DMI_TX#[3]

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

D25
F24
E23
G23

DMI_TX[0]
DMI_TX[1]
DMI_TX[2]
DMI_TX[3]

B

R1602
R1600

1 1K_J
1 1K_J

R1601

1 1K_J
1 1K_J
1 1K_J

R1614
R1603

C

FDI_TX#[0]
FDI_TX#[1]
FDI_TX#[2]
FDI_TX#[3]
FDI_TX#[4]
FDI_TX#[5]
FDI_TX#[6]
FDI_TX#[7]

D22
C21
D20
C18
G22
E20
F20
G19

FDI_TX[0]
FDI_TX[1]
FDI_TX[2]
FDI_TX[3]
FDI_TX[4]
FDI_TX[5]
FDI_TX[6]
FDI_TX[7]

2
2

0402
0402

FDI_FSYNC0
FDI_FSYNC1

F17
E17

FDI_FSYNC[0]
FDI_FSYNC[1]

2

0402

FDI_INT

C17

FDI_INT

2
2

0402
0402

F18
D17

FDI_LSYNC[0]
FDI_LSYNC[1]

FDI_LSYNC0
FDI_LSYNC1

2 0402

PEG_RBIAS R848 1 750_F

K35
J34
J33
G35
G32
F34
F31
D35
E33
C33
D32
B32
C31
B28
B30
A31

PEG_RXN15
PEG_RXN14
PEG_RXN13
PEG_RXN12
PEG_RXN11
PEG_RXN10
PEG_RXN9
PEG_RXN8
PEG_RXN7
PEG_RXN6
PEG_RXN5
PEG_RXN4
PEG_RXN3
PEG_RXN2
PEG_RXN1
PEG_RXN0

2 0402
PEG_RXN[15..0] 22

PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]

Intel(R) FDI

E22
D21
D19
D18
G21
E19
F21
G18

PEG_COMP R361 1 49.9_F

DMI

12 DMI_RXN[3:0]

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

B26
A26
B27
A25

PCI EXPRESS -- GRAPHICS

12

PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RBIAS

FDI_FSYNC[0], FDI_FSYNC[1],
FDI_LSYNC[0], FDI_LSYNC[1]
can be ganged together with
one resistor

PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]

J35
H34
H33
F35
G33
E34
F32
D34
F33
B33
D31
A32
C30
A28
B29
A30

PEG_RXP15
PEG_RXP14
PEG_RXP13
PEG_RXP12
PEG_RXP11
PEG_RXP10
PEG_RXP9
PEG_RXP8
PEG_RXP7
PEG_RXP6
PEG_RXP5
PEG_RXP4
PEG_RXP3
PEG_RXP2
PEG_RXP1
PEG_RXP0

PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]

L33
M35
M33
M30
L31
K32
M29
J31
K29
H30
H29
F29
E28
D29
D27
C26

PEG_TXN15
PEG_TXN14
PEG_TXN13
PEG_TXN12
PEG_TXN11
PEG_TXN10
PEG_TXN9
PEG_TXN8
PEG_TXN7
PEG_TXN6
PEG_TXN5
PEG_TXN4
PEG_TXN3
PEG_TXN2
PEG_TXN1
PEG_TXN0

PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]

L34
M34
M32
L30
M31
K31
M28
H31
K28
G30
G29
F28
E27
D28
C27
C25

PEG_TXP15
PEG_TXP14
PEG_TXP13
PEG_TXP12
PEG_TXP11
PEG_TXP10
PEG_TXP9
PEG_TXP8
PEG_TXP7
PEG_TXP6
PEG_TXP5
PEG_TXP4
PEG_TXP3
PEG_TXP2
PEG_TXP1
PEG_TXP0

If PCIe Graphics is not implemented,
the TX/RX pairs can be left as No Connect.
PEG_RXN_C[15..0]
PEG_TXN0
PEG_TXN1
C591
PEG_TXN2

C594

PEG_TXN3
C595
PEG_TXN4

C597

PEG_TXN5

PEG_RXP[15..0] 22

C600
PEG_TXN6

C603

PEG_TXN7
C604
PEG_TXN8

C607

PEG_TXN9
C611
PEG_TXN10
C615
PEG_TXN11
C617
PEG_TXN12
C659
PEG_TXN13
C627
PEG_TXN14
C631
PEG_TXN15
C641

1

2
0.1U_6.3V_K

1

2
0.1U_6.3V_K
2
0.1U_6.3V_K

1
1

2
0.1U_6.3V_K
2
0.1U_6.3V_K

1
1

2
0.1U_6.3V_K
2
0.1U_6.3V_K

1
1

2
0.1U_6.3V_K
2
0.1U_6.3V_K

1
1

2
0.1U_6.3V_K
2
0.1U_6.3V_K

1
1

2
0.1U_6.3V_K
2
0.1U_6.3V_K

1
1

2
0.1U_6.3V_K
2
0.1U_6.3V_K

1
1

2
0.1U_6.3V_K

0402_X5R

C588

PEG_TXP1
C590
PEG_TXP2

C592

PEG_TXP3
C593
PEG_TXP4

C596

PEG_TXP5
C598
PEG_TXP6

C601

PEG_TXP7
C602
PEG_TXP8

C605

PEG_TXP9
C608
PEG_TXP10
C612
PEG_TXP11
C616
PEG_TXP12
C61
PEG_TXP13
C65
PEG_TXP14
C628
PEG_TXP15
C642

1

2
0.1U_6.3V_K

1

2
0.1U_6.3V_K
2
0.1U_6.3V_K

1
1

2
0.1U_6.3V_K
2
0.1U_6.3V_K

1
1

2
0.1U_6.3V_K
2
0.1U_6.3V_K

1
1

2
0.1U_6.3V_K
2
0.1U_6.3V_K

1
1

2
0.1U_6.3V_K
2
0.1U_6.3V_K

1
1

2
0.1U_6.3V_K
2
0.1U_6.3V_K

1
1

2
0.1U_6.3V_K
2
0.1U_6.3V_K

1
1

2
0.1U_6.3V_K

For Disable Arrandale Graphic
In addition, FDI_RXN_[7:0] and FDI_RXP_[7:0] can be left floating on the PCH.
FDI_TX[7:0] and FDI_TX#[7:0] can be left floating on the Arrandale. The
GFX_IMON,FDI_FSYNC[0], FDI_FSYNC[1], FDI_LSYNC[0], FDI_LSYNC[1], and FDI_INT
signals on the Arrandale side should be tied to GND (through 1-kΩ ±5% resistors).
FDI_FSYNC[0], FDI_FSYNC[1], FDI_LSYNC[0], FDI_LSYNC[1] can be ganged together with
one resistor.

PEG_RXN_C1
0402_X5R
0402_X5R

PEG_RXN_C2
PEG_RXN_C3

0402_X5R
0402_X5R

PEG_RXN_C4
PEG_RXN_C5

0402_X5R
0402_X5R

PEG_RXN_C6
PEG_RXN_C7

0402_X5R
0402_X5R

PEG_RXN_C8

2

3

B

PEG_RXN_C9
0402_X5R
0402_X5R

PEG_RXN_C10
PEG_RXN_C11

0402_X5R
0402_X5R

PEG_RXN_C12
PEG_RXN_C13

0402_X5R
0402_X5R

PEG_RXN_C14
PEG_RXN_C15

0402_X5R

0402_X5R

PEG_RXP_C0
PEG_RXP_C1

0402_X5R
0402_X5R

PEG_RXP_C2
PEG_RXP_C3

0402_X5R
0402_X5R

C

PEG_RXP_C4
PEG_RXP_C5

0402_X5R
0402_X5R

PEG_RXP_C6
PEG_RXP_C7

0402_X5R
0402_X5R

PEG_RXP_C8
PEG_RXP_C9

0402_X5R
0402_X5R

PEG_RXP_C10
PEG_RXP_C11

0402_X5R
0402_X5R

PEG_RXP_C12
PEG_RXP_C13

0402_X5R
0402_X5R

PEG_RXP_C14
PEG_RXP_C15

0402_X5R

D

FOXCONN
4

5

6

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

Title

ARD (DMI,PEG,FDI)

Size
A3

Document Number

Rev

M960&M970 H Model

SA

Date:
1

22

PEG_RXN_C0

PEG_RXP_C[15..0] 22
PEG_TXP0

CPU SOCKET_989P
FOX_PZ98927-3641-01F

D

C589

Tuesday, December 29, 2009
7

Sheet

3
8

of

86

5

1

1
R939 1 0_J

AN26

2 0402 PM_THRMTRIP#_1

PROCHOT#

AK15

THERMTRIP#

AP26

RESET_OBS#

H_PM_SYNC

H_PM_SYNC

AL15

PM_SYNC

MP

H_CPUPWRGD

AN14

VCCPWRGOOD_1

15 H_CPUPWRGD

H_CPUPWRGD

AN27

VCCPWRGOOD_0

PM_DRAM_PWRGD AK13

12 PM_DRAM_PWRGD

20MIL

1 R925
1.5K_F

2

0402

SM_DRAMPWROK

VTTPWRGOOD

AM15

VTTPWRGOOD

1TAPPWRGOOD

AM26

TAPPWRGOOD

BUF_PLT_RST#_R

AL14

RSTIN#

4
3
0404_4P2R

CLK_EXP_P 11
CLK_EXP_N 11

D
39

2 G

OVT_EC#

+1_05V_VTT

SM_DRAMRST#

DDR3_DRAMRST#_Q

F6

SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]

AL1
AM1
AN1

PM_EXT_TS#[0]
PM_EXT_TS#[1]

AN15
AP15

SM_RCOMP0 R854 1 100_F
SM_RCOMP1 R853 1 24.9_F
SM_RCOMP2 R855 1 130_F

2 0402
2 0402
2 0402

PM_EXTTS#0
PM_EXTTS#1

PRDY#
PREQ#

AT28 XDP_PRDY# 1
AP27 XDP_PREQ#

TCK
TMS
TRST#

AN28 XDP_TCLK
AP28 XDP_TMS
AT27 XDP_TRST#

TDI
TDO
TDI_M
TDO_M
DBR#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]

AT29
AR27
AR29
AP29

TP75

2

2N7002DW
null

3

S
2N7002DW
null

R932

R933

10K_J
0402

10K_J
0402
PM_EXTTS#0 20
PM_EXTTS#1 20,21
R962 1 0_J

R1231
NC_12.4K_F
0402

20MIL

2 0402

DDR_ALERT# 58

+3VRUN

XDP_TDI_R
XDP_TDO_R
XDP_TDI_M
XDP_TDO_M

C

R1292
NC_51_J
0402

CLK_DP_P_R
CLK_DP_N_R

AN25 XDP_DBRESET#
AJ22 BPM#0
AK22 BPM#1
AK24 BPM#2
AJ24 BPM#3
AJ25 BPM#4
AH22 BPM#5
AK23 BPM#6
AH23 BPM#7

Q14B

D

S

4

CLK_DP_P_R
CLK_DP_N_R

2

A18
A17

6

DPLL_REF_SSCLK
DPLL_REF_SSCLK#

5 G

PROCHOT#
Q14A

1
1
1
1
1
1
1
1

TP64
TP65
TP66
TP67
TP68
TP69
TP70
TP71

20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL

R1607

R1608

0_J
0402

0_J
0402

For Disable Arrandale Graphic
DPLL_REF_SSCLK and DPLL_REF_SSCLK# can be connected to GND on
Arrandale directly if motherboard only supports discrete graphics.

1

14,39,42,43 BUF_PLT_RST#

TP94

PWR MANAGEMENT

H_CPURST#_R
C

CLK_EXP_P_R
CLK_EXP_N_R

D

A0205

1

PECI

E16
D16

EVT

4.7K_J
0402

1

AT15

PEG_CLK
PEG_CLK#

1
1

2

CATERR#

SKTOCC#

BCLK_ITP
BCLK_ITP#

1

AK14

AR30
AT30

2

H_CATERR#

PROCHOT#

PROCHOT#

15,39 PM_THRMTRIP#

AH24

H_PECI

H_PECI

COMP0

SKTOCC#

THERMAL

78

1

BCLK_ITP
BCLK_ITP#

R262

CLK_PCH_CPU_CLK 15
CLK_CPU_BCLK 19
CLK_CPU_BCLK# 19
CLK_PCH_CPU_CLK# 15

1

COMP1

AT26

0402
0402
0402
0402

2

G16

COMP0

2
2
2
2

1

COMP1

2 0402

R1450 1 0_J
R1451 1 NC_0_J
R1452 1 NC_0_J
R1453 1 0_J
TP61 20MIL
TP63 20MIL
0
1
2
RP80

2

2 0402

R852 1 49.9_F

ARD_BCLK
ARD_BCLK#

1

R851 1 49.9_F

A16
B16

BCLK
BCLK#

2

COMP2

2

COMP3

AT24

1

AT23

COMP2

CLOCKS

COMP3

2 0402

DDR3
MISC

2 0402

R850 1 20_F

JTAG & BPM

R849 1 20_F

TP60

R258
68_J
0402

1

+3VRUN
U67B

15

12

2

+1_05V_VTT

20MIL

DVT

3

MISC

D

4

Layout Note:
Comp0,1 connect with Zo=49.9 ohm,
Comp2,3 connect with Zo=20 ohm,
In order to minimize resistance,
use thick traces to route all
COMP signals, use 10-mils
(0.254-mm) wide trace for
routing less than 500 mils (12.7
mm), or 20-mils (0.508-mm)
wide trace for routing between
500 mils (12.7 mm) and
1000 mils (25.4 mm). Keep 20-mils
(0.508-mm) spacing to
any other signals in order to
minimize crosstalk.

CPU SOCKET_989P
FOX_PZ98927-3641-01F

2

R926
750_F
0402

+1_05V_VTT
XDP_TDO_M
B

+3VRUN

51_J
1
NC_51_J 1
NC_51_J 1
NC_51_J 1
NC_51_J 1
51_J
2

R1290
R1258
R1259
R1260
R1261
R1262

2
2
2
2
2
1

0402
0402
0402
0402
0402
0402

R969
0_J
0402

1

XDP_TDO_R
XDP_TMS
XDP_TDI_R
XDP_PREQ#
XDP_TCLK
XDP_TRST#

2

B

XDP_TDI_M

JTAG Mapping -Scan Chain (Default)

2 0402

DDR3_DRAMRST#_Q
R1573

1.5K_F

2

1
2

3

DDR3_DRAMRST#

R5949
100K_J
0402

RUN_PWRGD

12,39,75,76,80

1

2

2
15

R936

DVT

NC_68_J
0402

FOXCONN

H_CPURST#_R
4

3

2

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

Title

ARD (CLK,MISC,JTAG)

Size
A3

Document Number

Date:
5

A

RST_GATE

H_CATERR#

DVT

2
0.047U_16V_K
0402_X7R

1
R861
49.9_F
0402

74AHC1G08GW

DDR3_DRAMRST# 20,21

C6317

1

DVT

4

2

0402

0402
750_F
R5927

U217
1

+1_05V_VTT

2

R5926 1

1K_F
0402

2

5
2

R970 1 NC_0_J 2 0402

R5951
10K_J
0402

3

1 2

A

R5950
NC_1.1K_F
0402
PM_DRAM_PWRGD

2

1

1

+1_5VRUN

2

G

+3VALW
C6316
0.1U_6.3V_K
0402_X5R

VTTPWRGOOD

D

3

1 2K_F

S

74AHC1G08GW

1

4VTTPW_R R1572

2

+1_5VSUS

0402
1K_J
R5925

Q72
2N7002W
null

1

RUN_PWRGD

12,39,75,76,80 RUN_PWRGD

R5948 1 NC_0_J 2 0402

1

For Intel S3 Power Reduction issue

For Intel S3 Power Reduction issue

5

2

U2
1

C13
0.1U_6.3V_K
0402_X5R

1

2

R14
10K_J
0402

2

1

1

+3VRUN

Rev

M960&M970 H Model
Sheet

Tuesday, December 29, 2009
1

SA
4

of

86

5

4

3

2

1

U67D
U67C

21 M_B_DQ[63:0]

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

C

B

A10
C10
C7
A7
B10
D10
E10
A8
D8
F10
E6
F7
E9
B7
E7
C6
H10
G8
K7
J8
G7
G10
J7
J10
L7
M6
M8
L9
L6
K8
N8
P9
AH5
AF5
AK6
AK7
AF6
AG5
AJ7
AJ6
AJ10
AJ9
AL10
AK12
AK8
AL7
AK11
AL8
AN8
AM10
AR11
AL11
AM9
AN9
AT11
AP12
AM12
AN12
AM13
AT14
AT12
AL13
AR14
AP14

SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]

20
20
20

M_A_BS0
M_A_BS1
M_A_BS2

AC3
AB2
U7

SA_BS[0]
SA_BS[1]
SA_BS[2]

20
20
20

M_A_CAS#
M_A_RAS#
M_A_WE#

AE1
AB3
AE9

SA_CAS#
SA_RAS#
SA_WE#

AA6
AA7
P7

M_CLK_DDR0 20
M_CLK_DDR#0 20
M_CKE0 20

SA_CK[1]
SA_CK#[1]
SA_CKE[1]

Y6
Y5
P6

M_CLK_DDR1 20
M_CLK_DDR#1 20
M_CKE1 20

SA_CS#[0]
SA_CS#[1]

AE2
AE8

M_CS#0 20
M_CS#1 20

SA_ODT[0]
SA_ODT[1]

AD8
AF9

M_ODT0 20
M_ODT1 20

SA_DM[0]
SA_DM[1]
SA_DM[2]
SA_DM[3]
SA_DM[4]
SA_DM[5]
SA_DM[6]
SA_DM[7]

B9
D7
H7
M7
AG6
AM7
AN10
AN13

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]

C9
F8
J9
N9
AH7
AK9
AP11
AT13

M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]

C8
F9
H9
M9
AH8
AK10
AN11
AR13

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7

SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]

Y3
W1
AA8
AA3
V1
AA9
V8
T1
Y9
U6
AD4
T2
U3
AG8
T3
V9

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

M_A_DM[7:0] 20

M_A_DQS#[7:0] 20

M_A_DQS[7:0] 20

M_A_A[15:0] 20
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

B5
A5
C3
B3
E4
A6
A4
C4
D1
D2
F2
F1
C2
F5
F3
G4
H6
G2
J6
J3
G1
G5
J2
J1
J5
K2
L3
M1
K5
K4
M4
N5
AF3
AG1
AJ3
AK1
AG4
AG3
AJ4
AH4
AK3
AK4
AM6
AN2
AK5
AK2
AM4
AM3
AP3
AN5
AT4
AN6
AN4
AN3
AT5
AT6
AN7
AP6
AP8
AT9
AT7
AP9
AR10
AT10

SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]

21
21
21

M_B_BS0
M_B_BS1
M_B_BS2

AB1
W5
R7

SB_BS[0]
SB_BS[1]
SB_BS[2]

21
21
21

M_B_CAS#
M_B_RAS#
M_B_WE#

AC5
Y7
AC6

SB_CAS#
SB_RAS#
SB_WE#

SB_CK[0]
SB_CK#[0]
SB_CKE[0]

W8
W9
M3

M_CLK_DDR2 21
M_CLK_DDR#2 21
M_CKE2 21

SB_CK[1]
SB_CK#[1]
SB_CKE[1]

V7
V6
M2

M_CLK_DDR3 21
M_CLK_DDR#3 21
M_CKE3 21

SB_CS#[0]
SB_CS#[1]

AB8
AD6

M_CS#2 21
M_CS#3 21

SB_ODT[0]
SB_ODT[1]

AC7
AD1

M_ODT2 21
M_ODT3 21

SB_DM[0]
SB_DM[1]
SB_DM[2]
SB_DM[3]
SB_DM[4]
SB_DM[5]
SB_DM[6]
SB_DM[7]

D4
E1
H3
K1
AH1
AL2
AR4
AT8

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

D

M_B_DM[7:0] 21

C

DDR SYSTEM MEMORY - B

20 M_A_DQ[63:0]

DDR SYSTEM MEMORY A

D

SA_CK[0]
SA_CK#[0]
SA_CKE[0]

SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]

D5
F4
J4
L4
AH2
AL4
AR5
AR8

M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]

C5
E3
H4
M5
AG2
AL5
AP5
AR7

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7

M_B_DQS#[7:0] 21

M_B_DQS[7:0] 21

B

M_B_A[15:0] 21

SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]

U5
V2
T5
V3
R1
T8
R2
R6
R4
R5
AB5
P3
R3
AF7
P5
N1

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

CPU SOCKET_989P
FOX_PZ98927-3641-01F

A

A

CPU SOCKET_989P
FOX_PZ98927-3641-01F

FOXCONN
Title

ARD (DDR3)

Size
A3

Document Number

Date:
5

4

3

2

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division
Rev

M960&M970 H Model
Sheet

Tuesday, December 29, 2009
1

SA
5

of

86

1

2

3

4

5

6

7

8

U67F

C924
10U_10V_M
0805_X5R

1

C928
10U_10V_M
0805_X5R

2

1

C927
10U_10V_M
0805_X5R

2

1

C926
10U_10V_M
0805_X5R

2

1

C925
10U_10V_M
0805_X5R

2

2

1

VHCORE

C929
10U_10V_M
0805_X5R

1

C933
10U_10V_M
0805_X5R

2

1

C932
10U_10V_M
0805_X5R

2

1

C931
10U_10V_M
0805_X5R

2

1

C930
10U_10V_M
0805_X5R

2

C934
10U_10V_M
0805_X5R

VHCORE

C

1

C5244
22P_50V_J
0402_NPO

2

C936
10U_10V_M
0805_X5R

1

1

C935
10U_10V_M
0805_X5R

2

2

1

For RF Noise
2

2

1

VHCORE

C5245
22P_50V_J
0402_NPO

D

VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
PROC_DPRSLPVR

VTT_SELECT

1
2

1
2

1
2

1
2

+1_05V_VTT

C919
NC_10U_10V_M
0805_X5R

1

1

C640
22U_6.3V_M
0805_X5R

2

22U_6.3V_M
0805_X5R

2

1
2
1

1
2

1

C918
NC_10U_10V_M
0805_X5R

C738

C629
22U_6.3V_M
0805_X5R

18A (SV) (VTT)
EVT

+1_05V_VTT

C893
22U_6.3V_M
0805_X5R

PSI#

VTT_SELECT 1

VID0
VID1
VID2
VID3
VID4
VID5
VID6

B

C506
22U_6.3V_M
0805_X5R

+1_05V_VTT_43
+1_05V_VTT_44

AK35
AK33
AK34
AL35
AL33
AM33
AM35
AM34 PM_DPRSLPVR

G15

2

AN33

1

PSI#

2

AF10
AE10
AC10
AB10
Y10
W10
U10
T10
J12
J11
J16
J15

1

VTT0_33
VTT0_34
VTT0_35
VTT0_36
VTT0_37
VTT0_38
VTT0_39
VTT0_40
VTT0_41
VTT0_42
VTT0_43
VTT0_44

C915
10U_10V_M
0805_X5R

R858
R859

+1_05V_VTT

1 0_J
1 0_J

2 0603
2 0603

78,79
78,79
78,79
78,79
78,79
78,79
78,79
78,79

MP
C

PM_DPRSLPVR 78,79

TP1114 20MIL

VHCORE
1

1

C923
10U_10V_M
0805_X5R

2

1

C922
10U_10V_M
0805_X5R

2

NC_22U_6.3V_M
0805_X5R

C921
10U_10V_M
0805_X5R

1

1

C508

2

2

B

2

1

VHCORE

C917
10U_10V_M
0805_X5R

R27
ISENSE

AN35

VCC_SENSE
VSS_SENSE

AJ34
AJ35

IMVP_IMON 78
2

NC_22U_6.3V_M
0805_X5R

C914
10U_10V_M
0805_X5R

+1_05V_VTT

100_F
0402

VCCSENSE
VSSSENSE

VCCSENSE 78
VSSSENSE 78
1

C505

C913
10U_10V_M
0805_X5R

VTT_SENSE
VSS_SENSE_VTT

B15
A15

VSS_SENSE_VTT 1

R19

VTT_SENSE 75
TP178 20MIL
2

22U_6.3V_M
0805_X5R

C916
10U_10V_M
0805_X5R

1

C503

C912
10U_10V_M
0805_X5R

2

NC_22U_6.3V_M
0805_X5R

1

1

C499

2

22U_6.3V_M
0805_X5R

1

C497

2

22U_6.3V_M
0805_X5R

2

1

C495

2

2

1

VHCORE

C911
10U_10V_M
0805_X5R

EVT

A

2

22U_6.3V_M
0805_X5R

AH14
AH12
AH11
AH10
J14
J13
H14
H12
G14
G13
G12
G11
F14
F13
F12
F11
E14
E12
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11

1

C507

VTT0_1
VTT0_2
VTT0_3
VTT0_4
VTT0_5
VTT0_6
VTT0_7
VTT0_8
VTT0_9
VTT0_10
VTT0_11
VTT0_12
VTT0_13
VTT0_14
VTT0_15
VTT0_16
VTT0_17
VTT0_18
VTT0_19
VTT0_20
VTT0_21
VTT0_22
VTT0_23
VTT0_24
VTT0_25
VTT0_26
VTT0_27
VTT0_28
VTT0_29
VTT0_30
VTT0_31
VTT0_32

2

22U_6.3V_M
0805_X5R

1

C504

1.1V RAIL POWER

22U_6.3V_M
0805_X5R

1

C492

2

22U_6.3V_M
0805_X5R

1

C48

2

22U_6.3V_M
0805_X5R

2

1

C490

2

2

1

VHCORE

POWER

NC_22U_6.3V_M
0805_X5R

CPU VIDS

C502

VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99
VCC100

CPU CORE SUPPLY

AG35
AG34
AG33
AG32
AG31
AG30
AG29
AG28
AG27
AG26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26
Y35
Y34
Y33
Y32
Y31
Y30
Y29
Y28
Y27
Y26
V35
V34
V33
V32
V31
V30
V29
V28
V27
V26
U35
U34
U33
U32
U31
U30
U29
U28
U27
U26
R35
R34
R33
R32
R31
R30
R29
R28
R27
R26
P35
P34
P33
P32
P31
P30
P29
P28
P27
P26

SENSE LINES

22U_6.3V_M
0805_X5R

1

C496

2

22U_6.3V_M
0805_X5R

1

C510

2

22U_6.3V_M
0805_X5R

1

C491

2

1

22U_6.3V_M
0805_X5R

2

A

2

1

VHCORE

C509

18A (SV) (VTT)

VHCORE

2

48A (SV)

100_F
0402

D

FOXCONN

CPU SOCKET_989P
FOX_PZ98927-3641-01F

Title

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

ARD (POWER)

Size
Document Number
Custom

Rev

M960&M970 H Model

Date:
1

2

3

4

5

6

Tuesday, December 29, 2009
7

Sheet

SA
6
8

of

86

1

2

3

4

5

6

7

8

For Disable Arrandale Graphic
VAXG_SENSE and VSSAXG_SENSE on Arrandale can be left as no connect.

For Disable Arrandale Graphic
VAXG should be connected to GND when disable iGPU.
U67G

A

AM22
AP22
AN22
AP23
AM23
AP24
AN24

GFX_VR_EN
GFX_DPRSLPVR
GFX_IMON

AR25
AT25
AM24

GFX_IMON
2

GFX_VID[0]
GFX_VID[1]
GFX_VID[2]
GFX_VID[3]
GFX_VID[4]
GFX_VID[5]
GFX_VID[6]

For Disable Arrandale Graphic
In addition, FDI_RXN_[7:0] and FDI_RXP_[7:0] can be left floating on the PCH.
FDI_TX[7:0] and FDI_TX#[7:0] can be left floating on the Arrandale. The
GFX_IMON,FDI_FSYNC[0], FDI_FSYNC[1], FDI_LSYNC[0], FDI_LSYNC[1], and FDI_INT
signals on the Arrandale side should be tied to GND (through 1-kΩ ±5% resistors).

R1604
1K_J
0402
GFX_IMON

+1_5VRUN

C833
22U_6.3V_M
0805_X5R

2

1

C832
22U_6.3V_M
0805_X5R

2

1

C1150
1U_10V_K
0603_X5R

2

1

C1149
1U_10V_K
0603_X5R

2

1

C1148
1U_10V_K
0603_X5R

2

1
2

C1147
1U_10V_K
0603_X5R

+ CAP23
NC_100U_6.3V_M
3528

PVT

B

+1_05V_VTT

1
2

C939
10U_10V_M
0805_X5R

1

C830
22U_6.3V_M
0805_X5R

EVT

+1_05V_VTT

C829
22U_6.3V_M
0805_X5R

C

+1_8VRUN

1

C944
4.7U_10V_K
0805_X5R

2

1

C943
2.2U_10V_M
0603_X5R

2

1

C942
1U_10V_K
0603_X5R

2

C941
1U_10V_K
0603_X5R

1

EVT

2

L26
L27
M26

1

VCCPLL1
VCCPLL2
VCCPLL3

2

J22
J20
J18
H21
H20
H19

1

VTT1_63
VTT1_64
VTT1_65
VTT1_66
VTT1_67
VTT1_68

C940
10U_10V_M
0805_X5R

2

2

1

18A (SV) (VTT)

2

1.1V

C825
22U_6.3V_M
0805_X5R

1.8V

1

C826
22U_6.3V_M
0805_X5R

2

1

C827
22U_6.3V_M
0805_X5R

2

1
2

1
2

C828
22U_6.3V_M
0805_X5R

VTT1_48
VTT1_49
VTT1_50
VTT1_51
VTT1_52
VTT1_53
VTT1_54
VTT1_55
VTT1_56
VTT1_57
VTT1_58

PEG & DMI

EVT

K26
J27
J26
J25
H27
G28
G27
G26
F26
E26
E25

1

C1146
1U_10V_K
0603_X5R

2

VTT0_59
VTT0_60
VTT0_61
VTT0_62

P10
N10
L10
K10

1

AJ1
AF1
AE7
AE4
AC1
AB7
AB4
Y1
W7
W4
U1
T7
T4
P1
N7
N4
L1
H1

2

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18

1

3A (VDDQ)

+1_05V_VTT

C

EVT

1

AR22
AT22

- 1.5V RAILS

VTT1_45
VTT1_46
VTT1_47

VAXG_SENSE
VSSAXG_SENSE

DDR3

1
2

1
2

EVT

C819
22U_6.3V_M
0805_X5R

FDI

18A (SV) (VTT)

C824
22U_6.3V_M
0805_X5R

GRAPHICS VIDs

J24
J23
H25

+1_05V_VTT

POWER

VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36

GRAPHICS

B

AT21
AT19
AT18
AT16
AR21
AR19
AR18
AR16
AP21
AP19
AP18
AP16
AN21
AN19
AN18
AN16
AM21
AM19
AM18
AM16
AL21
AL19
AL18
AL16
AK21
AK19
AK18
AK16
AJ21
AJ19
AJ18
AJ16
AH21
AH19
AH18
AH16

SENSE
LINES

A

1.35A (VCCPLL)

C831
22U_6.3V_M
0805_X5R

EVT
CPU SOCKET_989P
FOX_PZ98927-3641-01F

D

D

FOXCONN

Title

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

ARD (GRAPHICS POWER)

Size
Document Number
Custom

Rev

M960&M970 H Model

Date:
1

2

3

4

5

6

7

Thursday, December 24, 2009

SA

Sheet

7
8

of

86

1

2

3

4

5

6

7

8

U67H
U67I

A

B

C

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80

VSS

VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160

AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE6
AD10
AC8
AC4
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
AB6
AA10
Y8
Y4
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
W6
V10
U8
U4
U2
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
T6
R10
P8
P4
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
N6
M10
L35
L32
L29
L8
L5
L2
K34
K33
K30

K27
K9
K6
K3
J32
J30
J21
J19
H35
H32
H28
H26
H24
H22
H18
H15
H13
H11
H8
H5
H2
G34
G31
G20
G9
G6
G3
F30
F27
F25
F22
F19
F16
E35
E32
E29
E24
E21
E18
E13
E11
E8
E5
E2
D33
D30
D26
D9
D6
D3
C34
C32
C29
C28
C24
C22
C20
C19
C16
B31
B25
B21
B18
B17
B13
B11
B8
B6
B4
A29
A27
A23
A9

CPU SOCKET_989P
FOX_PZ98927-3641-01F

VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233

A

B

VSS

NCTF

AT20
AT17
AR31
AR28
AR26
AR24
AR23
AR20
AR17
AR15
AR12
AR9
AR6
AR3
AP20
AP17
AP13
AP10
AP7
AP4
AP2
AN34
AN31
AN23
AN20
AN17
AM29
AM27
AM25
AM20
AM17
AM14
AM11
AM8
AM5
AM2
AL34
AL31
AL23
AL20
AL17
AL12
AL9
AL6
AL3
AK29
AK27
AK25
AK20
AK17
AJ31
AJ23
AJ20
AJ17
AJ14
AJ11
AJ8
AJ5
AJ2
AH35
AH34
AH33
AH32
AH31
AH30
AH29
AH28
AH27
AH26
AH20
AH17
AH13
AH9
AH6
AH3
AG10
AF8
AF4
AF2
AE35

VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7

AT35
AT1
AR34
B34
B2
B1
A35

TP_MCP_VSS_NCTF1 1
TP_MCP_VSS_NCTF2 1

TP124 20MIL
TP177 20MIL

TP_MCP_VSS_NCTF6 1
TP_MCP_VSS_NCTF7 1

TP204 20MIL
TP207 20MIL

C

CPU SOCKET_989P
FOX_PZ98927-3641-01F

D

D

FOXCONN
Title

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

ARD (GND)

Size
Document Number
Custom

Rev

M960&M970 H Model

Date:
1

2

3

4

5

6

7

Thursday, December 24, 2009

SA

Sheet

8
8

of

86

5

4

3

2

1

PCI Express Configuration Select
CFG0
1 : Single PEG
0 : Bifurcation enable

D

3393727 The VIL Voltage DC Specification for CFG[0] Pin is in Violation of the
EDS Value by a Large Amount
The Clarksfield EDS Vol1 documents the CFG[1:0] pins for PCI Express Port
Bifurcation, the straps may not work correctly when using a pull down resistor
of value other than 250 Ohms to drive a value of zero on the CFG[0] pin. When
left floating a value of one is sensed and there is no impact in this case.

U67E

20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL

1

CFG0

EVT

AP25
AL25
AL24
AL22
AJ33
AG9
M27
L28
J17
H17
G25
G17
E31
E30

RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14

CFG3
CFG3

PCI Express Static Lane Reversal
1 : Normal Operation
0 : Lane Numbers Reversed
15 ->0 , 14-> 1 , ...

C

1

CFG3

20MIL TP323
20MIL TP325

1
1

20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL

TP313
TP315
TP314
TP316
TP317
TP318
TP353
TP354
TP355
TP356
TP357

1
1
1
1
1
1
1
1
1
1
1

AM30
AM28
AP31
AL32
AL30
AM31
AN29
AM32
AK32
AK31
AK28
AJ28
AN30
AN32
AJ32
AJ29
AJ30
AK30
H16

20MIL TP425

1

B19
A19

RSVD15
RSVD16

A20
B20

RSVD17
RSVD18

U9
T9

RSVD19
RSVD20

AC9
AB9

RSVD21
RSVD22

CFG3
CFG4
CFG7

CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
RSVD_TP_86

2

R1273
3.01K_F
0402

1
1

RESERVED

CFG0
20MIL TP321
20MIL TP320

CFG4
CFG4

Display Port Presence
1 : Disabled ; No Physical Display Port
attached to Embedded Display Port
0 : Enable ; An external Display Port device
is connected to the Embedded Display Port

R1583
R1584

1
1

0_J
0_J

2 0402
2 0402

1

CFG4

B

C1
A3

RSVD_NCTF_23
RSVD_NCTF_24

2

R1274
NC_3.3K_J
0402

EVT
DVT
CFG7

J29
J28

RSVD26
RSVD27

A34
A33

RSVD_NCTF_28
RSVD_NCTF_29

C35
B35

RSVD_NCTF_30
RSVD_NCTF_31

RSVD32
RSVD33

AJ13
AJ12

1
1

TP238 20MIL
TP240 20MIL

RSVD34
RSVD35

AH25
AK26

1

TP241 20MIL

RSVD36
RSVD_NCTF_37

AL26
AR2

1

TP258 20MIL

RSVD38
RSVD39

AJ26
AJ27

D

DVT

2

R1272
NC_3.01K_F
0402

TP305
TP307
TP306
TP308
TP310
TP309
TP311
TP312
TP1220
TP1221
TP300
TP302
TP303
TP304

1
1
1
1
1
1
1
1
1
1
1
1
1
1

RSVD_NCTF_40
RSVD_NCTF_41

AP1
AT2

RSVD_NCTF_42
RSVD_NCTF_43

AT3
AR1

RSVD45
RSVD46
RSVD47
RSVD48
RSVD49
RSVD50
RSVD51
RSVD52
RSVD53
RSVD_NCTF_54
RSVD_NCTF_55
RSVD_NCTF_56
RSVD_NCTF_57
RSVD58

AL28
AL29
AP30
AP32
AL27
AT31
AT32
AP33
AR33
AT33
AT34
AP35
AR35
AR32

RSVD_TP_59
RSVD_TP_60
KEY
RSVD62
RSVD63
RSVD64
RSVD65

E15
F15
A2
D15
C15
AJ15
AH15

RSVD_TP_66
RSVD_TP_67
RSVD_TP_68
RSVD_TP_69
RSVD_TP_70
RSVD_TP_71
RSVD_TP_72
RSVD_TP_73
RSVD_TP_74
RSVD_TP_75

AA5
AA4
R8
AD3
AD2
AA2
AA1
R9
AG7
AE3

1
1
1
1
1
1
1
1
1
1

TP331
TP332
TP333
TP334
TP335
TP336
TP337
TP338
TP339
TP340

20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL

RSVD_TP_76
RSVD_TP_77
RSVD_TP_78
RSVD_TP_79
RSVD_TP_80
RSVD_TP_81
RSVD_TP_82
RSVD_TP_83
RSVD_TP_84
RSVD_TP_85

V4
V5
N2
AD5
AD7
W3
W2
N3
AE5
AD9

1
1
1
1
1
1
1
1
1
1

TP341
TP342
TP343
TP344
TP347
TP348
TP349
TP350
TP345
TP346

20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL

1

VSS

1

TP261 20MIL

C

DVT

AP34
1

R1289
NC_3.01K_F
0402

0402
0_J
R1582

CPU SOCKET_989P
FOX_PZ98927-3641-01F

VSS (AP34) can be left NC is
CRB implementation; EDS/DG
recommendation to GND

2

2

B

2611030 PCI Express Interface May Not Meet PCI Express 2.0 Jitter
Specifications
A

Intel has determined that the workaround (3.01K pull down to Vss on
signal CFG[7]) is not robust. Intel recommends not implementing this
workaround at this time (CFG[7] should not be pulled down).
Intel recommends not to test for PCI-E Express 2.0 Jitter specification
compliance for the affected steppings.

A

FOXCONN

ARD (RESERVED)

Size
A3

Document Number

Rev

M960&M970 H Model

SA

Date:
5

4

3

2

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

Title

Sheet

Thursday, December 24, 2009
1

9

of

86

5

4

1

INTRUDER#

R279 1 330K_F 2 0402 INTVRMEN A14

VCCRTC

HDA_BCLK

D29

HDA_SYNC

HDA_SPKR

P1

IHDA_RESET#

SPKR

C30

HDA_SDIN0

F30

HDA_SDIN1

HDA_CODEC_BITCLK

IHDA_SDATAO

B29

HDA_SDO

HDA_DOCK_EN#

H32

1

HDA_DOCK_EN# / GPIO33

HDA_DOCK_RST#

J30

HDA_DOCK_RST# / GPIO13

1

For EMI
33_J 2 0402

20MIL TP158

1

JTAG_TCK

M3

JTAG_TCK

20MIL TP160

1

JTAG_TMS

K3

JTAG_TMS

20MIL TP159

1

JTAG_TDI

K1

JTAG_TDI

20MIL TP164

1

JTAG_TDO

J2

JTAG_TDO

20MIL TP168

1

JTAG_RST#

J4

JTAG_RST#

1

MP

HDA_CODEC_SDATAOUT

R298
10K_J
0402

61
HDA_DOCK_RST#

JTAG

+3VALW

C6353
22P_50V_J
0402_NPO

2

C6352
33P_50V_J
0402_NPO

2

1
2

HDA_SDIN3

IHDA

1
61
20MIL TP166

R633 1

F32

SATA

0402

TP_HDA_SDIN3

HDA_SDIN2

2

4

68_J 2

[HDA_DOCK_EN#/GPIO33]

LPC_DRQ#0 42
INT_SERIRQ

Low (0) – Flash Descriptor Security will be overridden. Also, when
this signals is sampled on the rising edge of PWROK then it will also
disable Intel ME and its features.
High (1) – Security measure defined in the Flash Descriptor will be
enabled

39,42

AK7
AK6
AK11
AK9

SATA_RXN0
SATA_RXP0
SATA_TXN0
SATA_TXP0

SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP

AH6
AH5
AH9
AH8

SATA_RXN1
SATA_RXP1
SATA_TXN1
SATA_TXP1

SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP

AF11
AF9
AF7
AF6

SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP

AH3
AH1
AF3
AF1

SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP

AD9
AD8
AD6
AD5

SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP

AD3
AD1
AB3
AB1

SATA_RXN0
SATA_RXP0
SATA_TXN0
SATA_TXP0

47
47
47
47

SATA_RXN1
SATA_RXP1
SATA_TXN1
SATA_TXP1

48
48
48
48

+3VRUN
+ECVCC

SMDFIX2

1

20MIL TP174

R297
NC_10K_J
0402

HDA_SPKR

IHDA_SDATAO

G30

E32

1

20MIL TP155

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

HDA_RST#

SMDFIX1

1

20MIL TP1086

C

1

INT_SERIRQ

SATAICOMPO
SATAICOMPI

1

1

A30

IHDA_SYNC

61 HDA_CODEC_SDATAIN0

R618

AB9

LPC_FRAME# 39,42

R154
R158
R155
100_J
0402
39

1

FW_HW

NC_4.7K_J
0402

2

1

SATA_RXN5
SATA_RXP5
SATA_TXN5
SATA_TXP5

AF16 VCC_SATA

SATA_RXN5 49
SATA_RXP5 49
SATA_TXN5 49
SATA_TXP5 49

R873 1 37.4_F

61

IHDA_SYNC

SPI_ROM_CS0# AV3

SPI_CS0#

AY3

SPI_CS1#

1
SPI0_MOSI

AY1

SPI_MOSI

SPI_MISO_L

AV1

SPI_MISO

JTAG_TCK

1

33_J 2 0402

2

R634 1

20MIL TP169

2

R5905

PVT

SATALED#

T3

SATA0GP / GPIO21

Y9

SATA0GP

DVT

15 MB_FLASH0_EN

SATA1GP / GPIO19

V1

SATA1GP

SATA_LED# 55

DVT

Ibexpeak-M
null

51_J
0402

EVT

B

NC_1K_J
0402

C

MP

CN18
FOX_GB5RF120-1203-7F
NC_FPC_12P

12
11
10
9
8
7
6
5
4
3
2
1

SPI0_CLK
SPI0_MOSI
SPI0_MISO_R
SPI_ROM_CS0#
MB_FLASH0_EN
CARD_INSERT0

R5910
NC_10K_J
0402

SPI_CLK

2N7002W
null

EXTERNAL SPI0 ROM INTERFACE(FOR U98)
+ECVCC

2

R299
NC_1K_J
0402
61 HDA_CODEC_SYNC

BA2

S

2 0402

1
SPI0_CLK

R1613

G

13

HDA_CODEC_RST#

0_J 0402

+1.05V_VCC_SATA

+3VRUN

AF15

+3VRUN

SPI

2 0402

1

1 33_J

HDA_DOCK_EN#

2

Q12

SMDFIX1

R288

R156

1

D

SMDFIX2

IHDA_RESET#

1K_J
0402

2

61

IHDA_BITCLK

HDA_SPKR

2

2

C876
1U_6.3V_M
0402_X5R

+3VRUN

Stuff for No-reboot
Low=Default
High=No-reboot

EVT

IHDA_BITCLK

SERIRQ

LPC_FRAME#
LPC_DRQ#0
1
TP110 20MIL

1

1RTC2 2

2
20K_J
0402

RTC1

2
1
CN26

C34
A34
F34

D

2

INTVRMEN

FWH4 / LFRAME#
LDRQ0#
LDRQ1# / GPIO23

2 0402

LPC_AD0 39,42
LPC_AD1 39,42
LPC_AD2 39,42
LPC_AD3 39,42

1

SRTCRST#

A16

2 0402

SATA1GP R963 1 10K_J

2

D17

SATA0GP R904 1 10K_J

3 2

SRTCRST#
SM_INTRUDER#

FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

2 0402

14

JP1
OPEN_JUMP_OPEN2

1

2

1
1

RTCRST#

RTCRST#

R773

1
R649
510_F
0402

3

C392
1U_6.3V_K
0402_X5R

C14

RTC_32KX2

1
0402

C702
15P_50V_K_N
0402_NPO

2
20K_F
0402

R565
1M_J
0402

R650
510_F
0402

RTCX1
RTCX2

RTC_32KX2_R
2
R545 0_J

2

D33
B33
C32
A32

INT_SERIRQ R872 1 10K_J

2

3
1

1

1

U69A

B13
D13

LPC

1

R549
10M_J
0402

6 mils

RTC

2

SD103AWS
null

C723
1U_6.3V_M
0402_X5R
R529

2

1

2

2

Y4
32.768KHZ_12.5P_10PPM
Q13MC3061001800

D17

1

FOX_HS8202E-LH
HEADER_2P

1

+3VRUN

DVTRTC_32KX1

2

VCCRTC

1

1

2

+ECVCC

tpc40b_50 TP118

2

C727
15P_50V_K_N
0402_NPO

18~25mS

4

VccRTC

D

3

The traces inside this
block should be wider.

RTCRST#

B

+ECVCC

PVT

EVT
VCC0

1

U98 SPI ROM-0
VCC0

R38

R1557
0_J

2

1
1K_J
0402

1

SPI_ROM_CS0#

2

R542
NC_10K_J
0402

2 0402

2

1

+3VRUN

CARD_INSERT0

2

SPI_MISO_L

2 0402

5

R1553 1 15_F

4

C815
NC_0.1U_16V_Y
0402_Y5V

SPI0_CS#

U43
NC_MC74HC1G32DTT1G

3

SPI0_MISO_R

1

MP

R1551

1 0_J

2 0402

D23

1
null

VCC0
HOLD0#

2

1

NC_SD103AWS

VCC0
HOLD0#
SPI0_CLK
SPI0_MOSI

EVT

SPI0_CLK

DVT
U98 Normal Support - 32Mbit
(13-W25032B-7000)

0402
100K_J
R5969

0402
100K_J
R5970

1

SPI0_CS#

FLASH_SOIC-8P_32MB
W25Q32BVSSIG

0402
100K_J
R5971

A

2

8
7
6
5

1

CS#
VCC
DO/IO1 HOLD#/IO3
WP#/IO2
CLK
GND
DI/IO0

1

2

A

SPI0_CS#
1
SPI0_MISO_R 2
WP#0
3
4

2

R5372
NC_1K_J
0402

SPI0_MOSI

U98

2

2

C424
1U_10V_K
0603_X5R

1

C428
4.7U_10V_K
0805_X5R

1

R5369
3.3K_J
0402

2

2

1

VCC0

EVT
DVT

FOXCONN
Title

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

PCH (HDA,JTAG,SAT)

Size
Document Number
Custom

Rev

M960&M970 H Model

Date:
5

4

3

2

Tuesday, December 29, 2009
1

Sheet

SA
10

of

86

1

2

3

4

5

6

7

8

+3VALW
U69B

NC

Port5

NC

Port6

ExpressCard/34 (PCIE)

Port7

NC

Port8

NC

20MIL
20MIL
20MIL
20MIL

TP1085
TP1082
TP1083
TP1084

C679 1
C680 1

CARD_TXN2_C
CARD_TXP2_C

PERN2
PERP2
PETN2
PETP2

LAN_TXN3_C
LAN_TXP3_C

AU30
AT30
AU32
AV32

PERN3
PERP3
PETN3
PETP3

BA32
BB32
BD32
BE32

PERN4
PERP4
PETN4
PETP4

BF33
BH33
BG32
BJ32

PERN5
PERP5
PETN5
PETP5

BA34
AW34
2 0.1U_6.3V_K 0402_X5R EXPRESS_TXN6_C BC34
2 0.1U_6.3V_K 0402_X5R EXPRESS_TXP6_C BD34

PERN6
PERP6
PETN6
PETP6

2 0.1U_6.3V_K 0402_X5R
2 0.1U_6.3V_K 0402_X5R

1
1
1
1

EVT
43
43
43
43

EXPRESS_RXN6
EXPRESS_RXP6
EXPRESS_TXN6
EXPRESS_TXP6

C675 1
C676 1

EVT
B

R579 1 10K_J

+3VALW

R577 1

2 0402

EVT

NC_10K_J
2 0402

WLAN_CLKREQ#

+3VRUN

R5579

WLAN_CLKREQ# 44

1 10K_J

R5578

44 CLK_PCIE_WLAN#
44 CLK_PCIE_WLAN

0404_4P2R
R_PCIE_WLAN#
4
R_PCIE_WLAN
3

0402

2

CARD_CLK_REQ#

RP69 0
1
2

WLAN_CLKREQ#

1 NC_10K_J
2

0402

2
1

3
4

R_PCIE_CARD#
R_PCIE_CARD

0404_4P2R CARD_CLK_REQ#

+3VRUN

R537 1 10K_J

CARD_CLK_REQ# 50

AK48
AK47

CLKOUT_PCIE0N
CLKOUT_PCIE0P

AM43
AM45
U4

R_PCIE_LAN#
R_PCIE_LAN

3
4

0404_4P2R CLK_REQ_LAN#

AM47
AM48
N4

C

R539 1 10K_J

2 0402

PCIECLKRQ3#

EVT

PCIECLKRQ3#

DVT
+3VRUN

R540 1 10K_J

2 0402

PCIECLKRQ4#
20MIL TP1125

+1_05V_VTT
+3VALW

R555 1

EXPRESS_DET#

RP68 0
1
2

43 CLK_PCIE_EXPRESS#
43 CLK_PCIE_EXPRESS

NC_10K_J
2 0402

R556 1 10K_J

SML0_CLK

G8

SML0_DATA

PCIECLKRQ0# / GPIO73
CLKOUT_PCIE1N
CLKOUT_PCIE1P
PCIECLKRQ1# / GPIO18
CLKOUT_PCIE2N
CLKOUT_PCIE2P

PCIECLKRQ4#

1

0404_4P2R
R_PCIE_EXPRESS#
4
R_PCIE_EXPRESS
3
EXPRESS_DET#

A8
AM51
AM53
M9

SMB_THRM_CLK 24,39,58

G12 SMB_THRM_DATA

SMB_THRM_DATA 24,39,58

T11

CL_RST1#

T9

PEG_A_CLKRQ# / GPIO47

H1

AN4
AN2

CLKOUT_DP_N / CLKOUT_BCLK1_N
CLKOUT_DP_P / CLKOUT_BCLK1_P

AT1
AT3

R899 1 10K_J
RP89 0
1
2

0404_4P2R
4
3

AJ50
AJ52
H6

PCIECLKRQ5# / GPIO44

2 0402

DVT

EXPRESS_DET# 43
+3VALW

R5421

1 10K_J

2 0402

AK53
AK51

PEG_B_CLKREQ# P13

CLKOUT_PEG_B_N
CLKOUT_PEG_B_P
PEG_B_CLKRQ# / GPIO56

A

CLKIN_BCLK_N
CLKIN_BCLK_P

AP3
AP1

CLK_PCH_BCLK# 19
CLK_PCH_BCLK 19

CLKIN_DOT_96N
CLKIN_DOT_96P

F18
E18

DREFCLK# 19
DREFCLK 19

AH13
AH12

CLK_PCIE_SATA# 19
CLK_PCIE_SATA 19

REFCLK14IN

P41

REF_14M_PCH 19

CLKIN_PCILOOPBACK

J42

CLK_PCI_FB 14

XTAL25_IN
XTAL25_OUT

AH51
AH53

XCLK_RCOMP

AF38

CLKOUTFLEX0 / GPIO64

T45

CLKOUTFLEX1 / GPIO65

P43

CLKOUTFLEX2 / GPIO66

T42

CLKOUTFLEX3 / GPIO67

N50

XTAL25_IN
XTAL25_OUT

1
SMB_CLK_R
SMB_DATA_R

VCC

6
5

SCL
SDA

4

VSS

2
WP

7

A0
A1
A2

1
2
3

3

4

2.2K_J
0402

B

+1_05VRUN_SSCVCC

R1225

90.9_F

SMB_CLK_R 19,20,21,43

SMB_DATA_R 19,20,21,43

CLK_DMI_PCH#

R5992

1NC_10K_J 2 0402

CLK_DMI_PCH

R5993

1NC_10K_J 2 0402

CLK_PCH_BCLK#

R5994

1NC_10K_J 2 0402

CLK_PCH_BCLK

R5995

1NC_10K_J 2 0402

DREFCLK#

R5996

1NC_10K_J 2 0402

DREFCLK

R5997

1NC_10K_J 2 0402

CLK_PCIE_SATA#

R5998

1NC_10K_J 2 0402

CLK_PCIE_SATA

R5999

1NC_10K_J 2 0402

REF_14M_PCH

R6000

1NC_10K_J 2 0402

C

0402

PVT
2009/11/19 Add reserve 10k pull-low resistor for Intel FCIM function

XTAL25_IN
R1226
NC_1M_J
0402

R1651
0_J
0402

1

XTAL25_OUT

2

NC_25MHZ_20P_30PPM
ITTI_L5030-25.000-20
Y8
2
1

1

NC_0_J 0402
C1288
NC_18P_50V_J
0402_NPO

Calpella Platform – Design Guide - Addendum /
Update – Rev. 1.52 (Doc #414044).).
XTAL_IN should be pulled to GND via a 0ohm by
default.
This pull-down resistor on XTAL_IN should only
be un-stuffed when 25MHz crystal is used.

FOXCONN
Title

C1289
NC_18P_50V_J
0402_NPO

D

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

PCH (PCI-E,SMBUS,CLK)

Size
Document Number
Custom

Rev

M960&M970 H Model

SMBus Address: AEH
2

R1594

2.2K_J
0402

EVT

EVT

C23
0.1U_16V_Y
0402_Y5V

R1593

SMB_DATA_R

EEPROM_SOP-8_256x8
HT24LC02

1

DVT

0402

2

R813

U6

2 0402
2 0402

EC/Thermal Sensor

XCLK_RCOMP

+3VRUN

8

R902 1 2.2K_J
R903 1 2.2K_J

SMB_CLK_R

Ibexpeak-M
null

D

0402

PCIE_REFCLK# 22
PCIE_REFCLK 22

CLK_DMI_PCH# 19
CLK_DMI_PCH 19

CLKIN_SATA_N / CKSSCD_N
CLKIN_SATA_P / CKSSCD_P

CLKOUT_PCIE5N
CLKOUT_PCIE5P

0402

2

CLK_EXP_N 4
CLK_EXP_P 4

AW24
BA24

CLKIN_DMI_N
CLKIN_DMI_P

PCIECLKRQ4# / GPIO26

2

R901 1 10K_J

+3VRUN
PEG_CLKREQ#

AD43 CLK_PEG#
AD45 CLK_PEG

CLKOUT_DMI_N
CLKOUT_DMI_P

CLKOUT_PCIE4N
CLKOUT_PCIE4P

R892 1 10K_J

T13

CL_CLK1

PCIECLKRQ3# / GPIO25

WAKE_SCI#

SML0_CLK
SML0_DATA

E10 SMB_THRM_CLK

CL_DATA1

CLKOUT_PCIE3N
CLKOUT_PCIE3P

0402

M14 LPD_SPI_INTR#

SML1ALERT# / GPIO74

PCIECLKRQ2# / GPIO20

2

LPD_SPI_INTR#

CLK_REQ_LAN# 45

AH42
AH41

+3VRUN

C6

SML0DATA

CLKOUT_PEG_A_N
CLKOUT_PEG_A_P

RP67 0

2
1

45 CLK_PCIE_LAN#
45 CLK_PCIE_LAN

2 0402

CLK_REQ_LAN#

PERN8
PERP8
PETN8
PETP8

P9

J14

SML1DATA / GPIO75

RP71 0
50 CLK_PCIE_CARD#
50 CLK_PCIE_CARD

CARD_CLK_REQ#

BG34
BJ34
BG36
BJ36

WAKE_SCI# 39

PCH EEPROM/CKG/DIMM/ExpressCard

2

+3VSUS

SMB_DATA_R

SML0CLK

SML1CLK / GPIO58

PERN7
PERP7
PETN7
PETP7

C8

GPIO60

SML0ALERT# / GPIO60

AT34
AU34
AU36
AV36

WAKE_SCI#

H14 SMB_CLK_R

SMBCLK
SMBDATA

AW30
BA30
BC30
BD30

2 0.1U_6.3V_K 0402_X5R
2 0.1U_6.3V_K 0402_X5R

B9

SMBALERT# / GPIO11

R898 1 10K_J

1
1

Port4

LAN_RXN3
LAN_RXP3
LAN_TXN3
LAN_TXP3

PERN1
PERP1
PETN1
PETP1

GPIO60

2
2

GbE LAN

45
45
45
45

C704 1
C701 1

BG30
BJ30
BF29
BH29

SMBus

Port3

CARD_RXN2
CARD_RXP2
CARD_TXN2
CARD_TXP2

WLAN_TXN1_C
WLAN_TXP1_C

Link

Ricoh R5U231

50
50
50
50

2 0.1U_6.3V_K 0402_X5R
2 0.1U_6.3V_K 0402_X5R

PEG

Port2

WLAN

C889 1
C890 1

PCI-E*

Port1

WLAN_RXN1
WLAN_RXP1
WLAN_TXN1
WLAN_TXP1

Controller

A

44
44
44
44

Function

Clock Flex

Port

From CLK BUFFER

PCI-E Port Table

Date:
5

6

7

Tuesday, December 29, 2009

SA
11

Sheet
8

of

86

1

2

3

4

5

6

7

8

For Disable Arrandale Graphic
In addition, FDI_RXN_[7:0] and FDI_RXP_[7:0] can be left floating on the PCH.
FDI_TX[7:0] and FDI_TX#[7:0] can be left floating on the Arrandale. The
GFX_IMON,FDI_FSYNC[0], FDI_FSYNC[1], FDI_LSYNC[0], FDI_LSYNC[1], and FDI_INT
signals on the Arrandale side should be tied to GND (through 1-kΩ ±5% resistors).
A

A

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

3
3
3
3

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

3
3
3
3

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

3
3
3
3

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
R874

1 49.9_F

DMI0RXN
DMI1RXN
DMI2RXN
DMI3RXN

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

BD24
BG22
BA20
BG20

DMI0RXP
DMI1RXP
DMI2RXP
DMI3RXP

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

BE22
BF21
BD20
BE18

DMI0TXN
DMI1TXN
DMI2TXN
DMI3TXN

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

BD22
BH21
BC20
BD18

DMI0TXP
DMI1TXP
DMI2TXP
DMI3TXP

2 0402 DMI_COMP

B

BH25

DMI_ZCOMP

BF25

DMI_IRCOMP

FDI

+1.05V_VCC_EXP

3
3
3
3

BC24
BJ22
AW20
BJ20

DMI

U69C
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7

BA18
BH17
BD16
BJ16
BA16
BE14
BA14
BC12

FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7

BB18
BF17
BC16
BG16
AW16
BD14
BB14
BD12

FDI_INT

BJ14

FDI_FSYNC0

BF13

FDI_FSYNC1

BH13

FDI_LSYNC0

BJ12

FDI_LSYNC1

BG14

B

EVT
SB_RST#

39,78 IMVP_PWRGD

R927 1 0_J

4,39,75,76,80 RUN_PWRGD

T6

SYS_RESET#

WAKE#

1 R973
2
2.2K_J 0402

SYS_PWROK M6

SYS_PWROK

CLKRUN# / GPIO32

Y1

PM_CLKRUN#

1 R972
2
2.2K_J 0402

PWROK

SUS_STAT# / GPIO61

P8

PM_SUS_STAT#

SUSCLK / GPIO62

F3

PM_S4_STATE# 1

SLP_S5# / GPIO63

E4

PM_SLP_S5#

SLP_S4#

H7

PM_SLP_S4#

SLP_S3#

P12

PM_SLP_S3#

SLP_M#

K8

PM_SLP_ME#

TP23

N2

PM_SLP_DSW#
H_PM_SYNC

SB_RST#

B17

R918 1 NC_0_J 2 0402 MPWROK_R K5

2 0402

R940 1 NC_0_J 2 0402 LAN_RST#
R917

1 10K_J

A10
D9

1 R916
2
2.2K_J 0402

39 PM_RSMRST#
39 SUS_PWR_ACK
39

PWRBTN#

MEPWROK
LAN_RST#

2 0402

4 PM_DRAM_PWRGD
C

PWROK

PM_RSMRST#_R

C16

DRAMPWROK
RSMRST#

M1

PWRBTN#

P5

PWRBTN#

AC_Present

P7

ACPRESENT / GPIO31

A6

BATLOW# / GPIO72

PMSYNCH

BJ10

RI#

SLP_LAN#

F6

SUS_PWR_ACK / GPIO30

PCIE_WAKE# 43,44,45

PM_CLKRUN# 39,42

PM_SUS_STAT# 42
TP170 20MIL
PM_SLP_S5# 39
C

PM_SLP_S4# 39
PM_SLP_S3# 39
+3VRUN
PM_SLP_ME# 39

1

TP362 20MIL

2

AC_Present

J12

SUS_PWR_ACK

+3VRUN
39

System Power Management

42

R931
NC_10K_J
0402

PM_BATLOW#

1

PM_RI#

F14

PM_SLP_LAN#

R945 1 8.2K_J

2 0402

PM_CLKRUN#

R912 1 8.2K_J

2 0402

EVT

H_PM_SYNC 4

1

PCIE_WAKE#
PM_RI#
PM_SLP_LAN#
PM_BATLOW#
SUS_PWR_ACK
AC_Present
SB_RST#

TP361 20MIL

Ibexpeak-M
null

MPWROK_R R923 1 NC_0_J 2 0402 LAN_RST#

SB_RST#

R911
R910
R914
R913
R920
R921
R922

1
1
1
1
1
1
1

10K_J 2
10K_J 2
NC_10K_J
2
8.2K_J 2
8.2K_J 2
10K_J 2
NC_8.2K_J
2

+3VALW
0402
0402
0402
0402
0402
0402
0402

EVT
PM_SLP_ME#

D33
SYS_PWROK

1
null

D

1

PM_RSMRST# R915 1 10K_J
PWROK
R1576 1 10K_J

TP171 20MIL

2 0402
2 0402

2
D

SD103AWS
D28
PM_RSMRST#_R 1
null

2

ALW_PWRGD 39,74

SD103AWS
D29
PWROK

1
null

FOXCONN

2

Title

SD103AWS

Size
A3

PCH (DMI,FDI,GPIO)
Document Number

2

3

4

5

6

Rev

M960&M970 H Model

Date:
1

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

Tuesday, December 29, 2009
7

Sheet

SA
12
8

of

86

1

2

3

4

5

6

7

8

U69D

NC for disable LVDS

L_BKLTCTL

AB48
Y45

L_DDC_CLK
L_DDC_DATA

AB46
V48

L_CTRL_CLK
L_CTRL_DATA

20MIL TP157

20MIL TP162

20MIL TP165

CRT_IREF

LVD_IBG
LVD_VBG

AV53
AV51

LVDSA_CLK#
LVDSA_CLK

1

BB47
BA52
AY48
AV47

LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3

1

BB48
BA50
AY49
AV48

LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3

AP48
AP47

LVDSB_CLK#
LVDSB_CLK

1

AY53
AT49
AU52
AT53

LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3

1

AY51
AT48
AU50
AT51

LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3

AA52
AB53
AD53

CRT_BLUE
CRT_GREEN
CRT_RED

LVDS

LVD_VREFH
LVD_VREFL

CRT_DDC_CLK
CRT_DDC_DATA

Y53
Y51

CRT_HSYNC
CRT_VSYNC
DAC_IREF
CRT_IRTN

Calpella Platform – Design Guide - Addendum
/ Update – Rev. 1.52 (Doc #414044).).

BJ46
BG46

1
1

TP77
TP78

20MIL
20MIL

SDVO_STALLN
SDVO_STALLP

BJ48
BG48

1
1

TP79
TP81

20MIL
20MIL

SDVO_INTN
SDVO_INTP

BF45
BH45

1
1

TP82
TP83

20MIL
20MIL

T51
T53

1
1

TP84
TP85

20MIL
20MIL

DDPB_AUXN
DDPB_AUXP
DDPB_HPD

BG44
BJ44
AU38

DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P

BD42
BC42
BJ42
BG42
BB40
BA40
AW38
BA38

DDPC_CTRLCLK
DDPC_CTRLDATA

Y49
AB49

DDPC_AUXN
DDPC_AUXP
DDPC_HPD

BE44
BD44
AV40

DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P

BE40
BD40
BF41
BH41
BD38
BC38
BB36
BA36

DDPD_CTRLCLK
DDPD_CTRLDATA

V51
V53

AD48
AB51

SDVO_TVCLKINN
SDVO_TVCLKINP

SDVO_CTRLCLK
SDVO_CTRLDATA

AT43
AT42

NC for disable LVDS

1K_J R223 0402
1
2

Y48

CRT

20MIL TP154

C

L_BKLTEN
L_VDD_EN

AP39
1LVDS_VBG AP41

20MIL TP151

B

T48
T47

Digital Display Interface

A

A

B

U50
U52

DDPD_AUXN
DDPD_AUXP
DDPD_HPD

BC46
BD46
AT38

DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P

BJ40
BG40
BJ38
BG38
BF37
BH37
BE36
BD36

1
TP95 20MIL
1
TP96 20MIL
DDPD_HPD 1
TP1219

20MIL

EVT

C

Ibexpeak-M
null

D

D

FOXCONN
Title

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

PCH (LVDS,DDI)

Size
Document Number
Custom

Rev

M960&M970 H Model
Thursday, December 24, 2009

Date:
1

2

3

4

5

6

7

SA
13

Sheet
8

of

86

5

4

8 INT_PIRQH#
PCI_TRDY#
7
6 PCI_FRAME#
PCI_REQ#1
5
8.2K
0804_8P4R

+3VRUN

+3VRUN
RP17

1
2
3
4

RP16

8
7
6
5

PCI_REQ#3
INT_PIRQF#
INT_PIRQB#
PCI_REQ#0

1
2
3
4

8.2K
0804_8P4R

8
7
6
5

INT_PIRQA#
INT_PIRQE#
INT_PIRQC#
INT_PIRQG#

8.2K
0804_8P4R

+3VRUN
RP14
PCI_PERR#
8
7 PCI_DEVSEL#
PCI_SERR#
6
PCI_LOCK#
5

PCI_GNT#3

1

1
2
3
4

8.2K
0804_8P4R

2

R1612
NC_4.7K_J
0402

EVT

20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL
20MIL

TP182
TP167
TP186
TP194
TP187
TP199
TP201
TP200
TP202
TP319
TP247
TP322
TP363
TP324
TP426
TP428
TP427
TP429
TP431
TP430
TP432
TP434
TP433
TP435
TP437
TP436
TP438
TP440
TP439
TP441
TP443
TP442

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

H40
N34
C44
A38
C36
J34
A40
D45
E36
H48
E40
C40
M48
M45
F53
M40
M43
J36
K48
F40
C42
K46
M51
J52
K51
L34
F42
J40
G46
F44
M47
H36

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

20MIL
20MIL
20MIL
20MIL

TP446
TP445
TP447
TP444

1
1
1
1

J50
G42
H47
G34

C/BE0#
C/BE1#
C/BE2#
C/BE3#

INT_PIRQA# G38
INT_PIRQB# H51
INT_PIRQC# B37
INT_PIRQD# A44

PIRQA#
PIRQB#
PIRQC#
PIRQD#

C

+3VRUN

NC_10K_J
R345 1
2 0402
1
2
R346 NC_10K_J
0402

20MIL

TP163

PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3

F51
A46
B45
M53

REQ0#
REQ1# / GPIO50
REQ2# / GPIO52
REQ3# / GPIO54

PCI_GNT#0
PCI_GNT#1
1 PCI_GNT#2
PCI_GNT#3

F48
K45
F36
H53

GNT0#
GNT1# / GPIO51
GNT2# / GPIO53
GNT3# / GPIO55

INT_PIRQE#
INT_PIRQF#
INT_PIRQG#
INT_PIRQH#

B41
K53
A36
A48

PCI_RST#

K6

EVT
20MIL

20MIL

1

TP130

1

TP127

B

EVT

20MIL
20MIL

1

TP128

1

TP126

22,42,44,45,50 PLT_RST#
42
39
11

PCLK_JIG
20MIL TP132
CLK_KBCPCI
20MIL TP129
CLK_PCI_FB

1
1

R44

22_J0402

R56

22_J0402

SERR#
PERR#

PCI_IRDY#
PCI_PAR
PCI_DEVSEL#
PCI_FRAME#

A42
H44
F46
C46

IRDY#
PAR
DEVSEL#
FRAME#

D49

PLOCK#

D41
C48

STOP#
TRDY#

PME#_ICH

M7

PME#

PLT_RST#

D5

PLTRST#

CLK_PCI_JIG N52
P53
CLK_PCI_KBC P46
P51
CLK_PCI_FB_RP48

R1223 22_J0402

AV9
BG8

NV_DQ0 / NV_IO0
NV_DQ1 / NV_IO1
NV_DQ2 / NV_IO2
NV_DQ3 / NV_IO3
NV_DQ4 / NV_IO4
NV_DQ5 / NV_IO5
NV_DQ6 / NV_IO6
NV_DQ7 / NV_IO7
NV_DQ8 / NV_IO8
NV_DQ9 / NV_IO9
NV_DQ10 / NV_IO10
NV_DQ11 / NV_IO11
NV_DQ12 / NV_IO12
NV_DQ13 / NV_IO13
NV_DQ14 / NV_IO14
NV_DQ15 / NV_IO15

AP7
AP6
AT6
AT9
BB1
AV6
BB3
BA4
BE4
BB6
BD6
BB7
BC8
BJ8
BJ6
BG6

NV_ALE
NV_CLE

BD3
AY6

NV_ALE
NV_CLE

NV_RCOMP

AU2

NV_RCOMP

NV_RB#

AV7

NV_WR#0_RE#
NV_WR#1_RE#

AY8
AY5

NV_WE#_CK0
NV_WE#_CK1

AV11
BF5

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P

Set to Vss when LOW

NV_CLE Set to Vcc when HIGH
D

+VCCPNAND

NV_CLE
NV_ALE

CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4

NC_32.4_F
0402
C

USB_PN0
USB_PP0
USB_PN1
USB_PP1
USB_PN2
USB_PP2
USB_PN3
USB_PP3
USB_PN4
USB_PP4
USB_PN5
USB_PP5
USB_PN6
USB_PP6
USB_PN7
USB_PP7
USB_PN8
USB_PP8
USB_PN9
USB_PP9
USB_PN10
USB_PP10
USB_PN11
USB_PP11
USB_PN12
USB_PP12
USB_PN13
USB_PP13

H18
J18
A18
C18
N20
P20
J20
L20
F20
G20
A20
C20
M22
N22
B21
D21
H22
J22
E22
F22
A22
C22
G24
H24
L24
M24
A24
C24

USB_PN0 49
USB_PP0 49
USB_PN1 61
USB_PP1 61
TP450 20MIL
TP451 20MIL
USB_PN3 43
USB_PP3 43
USB_PN4 61
USB_PP4 61
USB_PN5 61
USB_PP5 61
TP299 20MIL
TP301 20MIL
TP352 20MIL
TP359 20MIL
TP360 20MIL
TP449 20MIL
USB_PN9 52
USB_PP9 52
TP1095 20MIL
TP1096 20MIL
USB_PN11 54
USB_PP11 54
USB_PN12 44
USB_PP12 44
USB_PN13 53
USB_PP13 53

1
1

1
1
1
1
1
1
1
1

USB PORT

USBRBIAS#

B25

USBRBIAS

D25

OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43
OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14

N16
J16
F16
L16
E14
G16
F12
T15

USBRBIAS 1

EVT

eSATA

PORT-1

External Port-2

PORT-3

ExpressCard/34 (USB)

PORT-4

External Port-3

PORT-5

External Port-1

PORT-7

EVT

B

PORT-8
PORT-9

0402

USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7

PORT-0

PORT-6

2
22.6_F

USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3

DVT

Function

PORT-2

Camera

PORT-10

49
61
61
61

PORT-11

Felica

PORT-12

WLAN

PORT-13

Bluetooth

+3VALW

EVT
C1359
0.1U_6.3V_K
0402_X5R
BUF_PLT_RST#

RP18
USB_OC#2
USB_OC#5
USB_OC#4
USB_OC#6

+3VALW

6
7
8
9
10

5
4
3
2
1

USB_OC#1
USB_OC#3
USB_OC#7
USB_OC#0

A

BUF_PLT_RST# 4,39,42,43
10K
1206_10P8R

FOXCONN

DVT

Title

Size
A3
Date:

4

NC_1K_J
2 0402
2 0402
NC_1K_J

DVT

Buffer to reduce loading on PLT_RST#.
5

1
1

R1466

5
4

2

R1615
R1616

Danbury Technology
Disabled when Low
Enabled when High

R308

3

PLT_RST#

2

1
A

NV_DQS0
NV_DQS1

DMI Termination Voltage

Ibexpeak-M
null

+3VALW

U102
74AHC1G08GW
1

PCIRST#

E44
E50

PCI_STOP#
PCI_TRDY#

AY9
BD1
AP15
BD8

PIRQE# / GPIO2
PIRQF# / GPIO3
PIRQG# / GPIO4
PIRQH# / GPIO5

PCI_SERR#
PCI_PERR#

PCI_LOCK#

NV_CE#0
NV_CE#1
NV_CE#2
NV_CE#3

1

8.2K
0804_8P4R

1

U69E

NVRAM

1
2
3
4

USB

PCI_REQ#2
INT_PIRQD#
PCI_IRDY#
PCI_STOP#

2

DVT

RP15

8
7
6
5

PCI

RP13

1
2
3
4

D

3

+3VRUN

2

+3VRUN

3

2

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

PCH (PCI,USB,NVRAM)
Document Number

Rev

M960&M970 H Model
Tuesday, December 29, 2009

Sheet
1

SA
14

of

86

1

2

3

4

5

6

7

8

+3VALW
GPIO15

2 0402

GPIO12

R977 1 10K_J
R964 1 10K_J

2 0402
2 0402

RST_GATE
GPIO45

DVT

U69F
BMBUSY#

2 0402

GPIO8
39

EXTSMI#

42

+3VRUN

2
D12

39 RUNTIME_SCI#

DVT
R961 1 10K_J

2 0402

BMBUSY#

R981 1 10K_J

2 0402

EXTSMI#

R1627 1 10K_J

2 0402

STP_PCI#

R978 1 10K_J

2 0402

H_RCIN#

2 0402

1

SD103AWS

DVT

null

39 SYSTEM_ID0
39 SYSTEM_ID1
10 MB_FLASH0_EN

R532 1 NC_10K_J
2 0402 SATACLKREQ#
R578 1 10K_J 2 0402 H_A20GATE
R980 1 10K_J

ID_LPC_PCI#

36

DIS_FAN_MON#

INV_EN

DVT

DVT

EVT
NC_10K_J
2 0402

R924 1 10K_J

MB_FLASH0_EN
1
2
R943 10K_J 0402

DVT

1
R1626 10K_J

2

LCDID0

35

LCDID1

35

EVTLCDID2

35

LCDID3

DVT

GPIO27

1
2
R982 NC_10K_J 0402
1
2
R974 NC_10K_J 0402

35

4

GPIO28

EVT
35

SATACLKREQ#

RST_GATE
LCDID4

TACH1 / GPIO1

D37

TACH2 / GPIO6

RUNTIME_SCI#_D

J32

TACH3 / GPIO7

CLKOUT_PCIE7N
CLKOUT_PCIE7P

GPIO8

F10

GPIO8

GPIO12

K9

LAN_PHY_PWR_CTRL / GPIO12

A20GATE

GPIO15

T7

GPIO15

0402

C

ID_LPC_PCI#

R6005 1 10K_J

2 0402

RUNTIME_SCI#_D

R6006 1 10K_J

2 0402

CRIT_TEMP_REP#

SATA4GP / GPIO16

CLKOUT_BCLK0_N / CLKOUT_PCIE8N

AM3

CLK_PCH_CPU_CLK#

TACH0 / GPIO17

CLKOUT_BCLK0_P / CLKOUT_PCIE8P

AM1

CLK_PCH_CPU_CLK

MB_FLASH0_EN

Y7

SCLOCK / GPIO22

INV_EN

H10

GPIO27

AB12

GPIO27

GPIO28

V13

GPIO28

STP_PCI#

M11

STP_PCI# / GPIO34

V6

MEM_LED / GPIO24

R5931 1NC_100K_J2 0402

LCDID4

R5866 1 100K_J 2 0402

LCDID3

R5932 1 100K_J 2 0402

LCDID2

R5933 1 100K_J 2 0402

LCDID1

R5934 1 100K_J 2 0402

LCDID0

2 0402

CLK_PCH_CPU_CLK

H_PECI
H_RCIN#

PROCPWRGD

BE10

H_CPUPWRGD

THRMTRIP#

BD10

H_PECI

TP1

BA22

1

TP395

20MIL

SATA3GP / GPIO37

TP2

AW22

1

TP396

20MIL

LCDID2

V3

SLOAD / GPIO38

TP3

BB22

1

TP398

20MIL

LCDID3

P3

SDATAOUT0 / GPIO39

TP4

AY45

1

TP397

20MIL

GPIO45

H3

PCIECLKRQ6# / GPIO45

TP5

AY46

1

TP402

20MIL

RST_GATE

F1

PCIECLKRQ7# / GPIO46

TP6

AV43

1

TP399

20MIL

SDATAOUT1 / GPIO48

TP7

AV45

1

TP401

20MIL

SATA5GP / GPIO49

TP8

AF13

1

TP400

20MIL

GPIO57

TP9

M18

1

TP410

20MIL

TP10

N18

1

TP403

20MIL

TP11

AJ24

1

TP405

20MIL

TP12

AK41

1

TP404

20MIL

TP13

AK42

1

TP408

20MIL

TP14

M32

1

TP407

20MIL

TP15

N32

1

TP409

20MIL

TP16

M30

1

TP406

20MIL

TP17

N30

1

TP418

20MIL

TP18

H12

1

TP411

20MIL

TP19

AA23

1

TP413

20MIL

NC_1

AB45

NC_2

AB38

NC_3

AB42

NC_4

AB41

NC_5

T39

DVT

P6

1

TP420

20MIL

C10

1

TP419

20MIL

A4
A49
A5
A50
A52
A53
B2
B4
B52
B53
BE1
BE53
BF1
BF53
BH1
BH2
BH52
BH53
BJ1
BJ2
BJ4
BJ49
BJ5
BJ50
BJ52
BJ53
D1
D2
D53
E1
E53

LCDID4

4

56_J 2 0402

PM_THRMTRIP# 4,39
B

SATA2GP / GPIO36

F8

R291
56_J
0402

SATACLKREQ# / GPIO35

AB7

AB6

+1_05V_VTT

39

H_CPUPWRGD
R293 1

AB13

LCDID4

4
4

4

H_RCIN#

LCDID1

DVT
R5939 1 10K_J

BG10
T1

PECI
RCIN#

CLK_PCH_CPU_CLK#

LCDID0

PVT
+3VRUN

H_A20GATE 39

F38

VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31

RSVD

2 0402

H_A20GATE

AA2

DVT
R6004 1 10K_J

U2

SYSTEM_ID1

35 DIS_FAN_MON#
+3VRUN

DVT

SYSTEM_ID0

CRIT_TEMP_REP# AA4

39 CRIT_TEMP_REP#

AF48
AF47

C38

SATACLKREQ#

INV_EN

AH45
AH46

ID_LPC_PCI#

GPIO8

2 0402

CLKOUT_PCIE6N
CLKOUT_PCIE6P

EXTSMI#

B

R979 1

A

BMBUSY# / GPIO0

MISC

R983 1 10K_J

Y3

1

R985 1 10K_J

2

GPIO28

CPU

2 0402

GPIO

2 0402

R976 1 10K_J

NCTF

A

R966 1 1K_J

INIT3_3V#
TP24

C

Ibexpeak-M
null

D

D

PVT

FOXCONN
Title

PCH (GPIO,VSS_NCTF,RSVD)

Size
A3

Document Number

Rev

M960&M970 H Model

SA

Date:
1

2

3

4

5

6

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

Tuesday, December 29, 2009
7

Sheet

15
8

of

86

5

4

3

2

1

Default is use Internal VRM
For Disable Arrandale Graphic
GPIO27 floating as Internal VRM and there is no need external supply
+1_05V_VTT

D

+1.05V_VCCA_CLK

D

2
2

V_CPU_IO
C136
4.7U_6.3V_K
0603_X5R

2

C698
0.1U_10V_K
0402_X5R

C691
0.1U_10V_K
0402_X5R

AF34

VCCIO[2]

AH34

VCCIO[3]

AF32

VCCIO[4]

V12

DCPSST

Y22

DCPSUS

VCC3_3[11]

N36

VCC3_3[12]

P36

VCC3_3[13]

U35

VCC3_3[14]

AD13

2

C673
0.1U_10V_K
0402_X5R

C672
0.1U_10V_K
0402_X5R

AK3
AK1

EVT
+3VRUN

357mA

C143
0.1U_10V_K
0402_X5R

C144
0.1U_10V_K
0402_X5R

VCCSUS3_3[29]

U19

VCCSUS3_3[30]

U20

VCCSUS3_3[31]

U22

VCCSUS3_3[32]

V15

VCC3_3[5]

V16

VCC3_3[6]

Y16

VCC3_3[7]

AU18

V_CPU_IO[1]
V_CPU_IO[2]

VCCRTC
Ibexpeak-M
null

+3VRUN

31mA
+1_05V_VTT

VCCIO[9]

AH22

VCCVRM[4]

AT20

VCCIO[10]

AH19

VCCIO[11]

AD20

VCCIO[12]

AF22

VCCIO[13]
VCCIO[14]
VCCIO[15]
VCCIO[16]

AD19
AF20
AF19
AH20

VCCIO[17]
VCCIO[18]
VCCIO[19]
VCCIO[20]

AB19
AB20
AB22
AD22

VCCME[13]
VCCME[14]
VCCME[15]
VCCME[16]

AA34
Y34
Y35
AA35

VCCSUSHDA

C6326
NC_680P_50V_K
0603_X7R

C6327
NC_680P_50V_K
0603_X7R

C6328
NC_680P_50V_K
0603_X7R

C976
NC_10U_6.3V_Y
0805_Y5V

NC_10UH_0805
C737
EBLS2012-100K
NC_1U_6.3V_Y
+1.05V_VCC_SATA
0402_Y5V

2

+VCCPLLVRM 2

R826 1
0_J 0603

C731
1U_6.3V_Y
0402_Y5V

1
1
1
1

0_J
0_J
0_J
0_J

2
2
2
2

0402
0402
0402
0402

R825 1
0_J
0603

DVT

3A (VCCIO)

For EMI

DVT

1.85A

+1_05V_VTT
R893
R894
R895
R896

+1_05V_VTT

+VCCSUSHDA

+3VALW

6mA

A

R86 1
0_J
0603

2

L30
C658
1U_6.3V_Y
0402_Y5V

FOXCONN

Title

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

PCH (POWER) 1/2
M960&M970 H Model

Size
Document Number
Custom
Date:
5

4

3

B

+1.05V_VCCAPLL

+1_05V_5V_8V_RUN

P18

1
2

357mA

+3VRUN

+5VRUN

100_F 0402

L29

VCCSATAPLL[1]
VCCSATAPLL[2]

1
2

2
C619
1U_6.3V_Y
0402_Y5V

1mA

R325 1

1

VCCIO[21]
VCCIO[22]
VCCIO[23]

2

2

AH23
AJ35
AH35

1

VCC3_3[10]

M36

2

L38

1

VCC3_3[9]

1

VCC3_3[8]

J38

2

K49

+3VRUN

1

VCCADPLLB[1]
VCCADPLLB[2]

A12

1

1

2

VCCRTC

2mA

BD51
BD53

AT18

1

1
A

2

2 0603
2

R1610 1 0_J

1

1mA

C665
0.1U_10V_K
0402_X5R

C663
0.1U_10V_K
0402_X5R

1

+1_05V_VTT

1

357mA

+3VRUN

V5REF

1mA

D14
SD103AWS
null

1

2

C664
0.1U_10V_K
0402_X5R

+3VALW

163mA

F24

+5VALW

EVT

2

C666
0.1U_10V_K
0402_X5R

1

1

2

2

For RF Noise

B

C623
1U_6.3V_Y
0402_Y5V

V5REF_SUS

1

2

1

2

C622
1U_6.3V_Y
0402_Y5V

V23

2

C621
1U_6.3V_Y
0402_Y5V

1

C5247
22P_50V_J
0402_NPO

2

2

1

1
1

2

0805

VCCADPLLA[1]
VCCADPLLA[2]

HDA

0_J

BB51
BB53
+1_05VRUN_DPLLB

69mA

+1_05VRUN_SSCVCC

VCCVRM[3]

SATA

+1_05V_VTT
R823

AU24
+1_05VRUN_DPLLA

68mA

3.062A (VCCIO)

DCPRTC

PCI/GPIO/LPC

2
1

V9
+1_05V_5V_8V_RUN

196mA

VCCIO[56]

3A (VCCIO)

2 R366

100_F 0402
C141
1U_6.3V_Y
0402_Y5V

1

VCCME[12]

+1_05V_VTT

C

2

Y42

null
SD103AWS
D4

C145
0.1U_10V_K
0402_X5R

1

VCCME[11]

+VCCRTCEXT
C667
0.1U_10V_K
0402_X5R

VCCSUS3_3[28]

U23

R488
NC_NV_0_J
0402

+3VALW

2

VCCME[10]

Y41

163mA

1

Y39

C494
1U_6.3V_Y_Y
0402

2

VCCME[9]

R224
NC_NV_0_J
R455
0402
NC_0_J
0603

1

V42

+3VALW

2

VCCME[8]

C146
0.1U_10V_K
0402_X5R

1

VCCME[7]

V41

1

V39

2

VCCME[6]

1

VCCME[5]

AF42

2

VCCME[4]

AF41

C474
1U_6.3V_Y_Y
0402

+1_05VRUN_DPLLB
10UH_0805
EBLS2012-100K

2

C661
1U_6.3V_Y
0402_Y5V

AF43

163mA

2

2

1

For RF Noise

VCCME[3]

1

C

VCCME[2]

AD41

10UH_0805
EBLS2012-100K

L63

2

C624
1U_6.3V_Y
0402_Y5V

AD39

+3VALW

1

1

C267
22U_6.3V_M_B
0805

2

2

2

C268
22U_6.3V_M_B
0805

VCCME[1]

CPU

2
1

C674
0.1U_10V_K
0402_X5R

VCCME
C5246
22P_50V_J
0402_NPO

1

2 0603
1

1 0_J

1

R1631

2

+1_05V_VTT

1.85A

DCPSUSBYP

AD38

USB

1

Y20
TP_PCH_VCCDSW

V28
U28
U26
U24
P28
P26
N28
N26
M28
M26
L28
L26
J28
J26
H28
H26
G28
G26
F28
F26
E28
E26
C28
C26
B27
A28
A26

2

VCCLAN[2]

VCCSUS3_3[1]
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
VCCSUS3_3[6]
VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
VCCSUS3_3[20]
VCCSUS3_3[21]
VCCSUS3_3[22]
VCCSUS3_3[23]
VCCSUS3_3[24]
VCCSUS3_3[25]
VCCSUS3_3[26]
VCCSUS3_3[27]

1

VCCLAN[1]

AF24

+1_05VRUN_DPLLA
L28

1

AF23

Clock and Miscellaneous

1
2

R1661
0_J
0603

+1_05V_VTT
C618
1U_6.3V_Y
0402_Y5V

1

VCCLAN
C626
NC_1U_6.3V_Y
0402_Y5V

2

R1660
1
2
NC_0_J 0603

V24
V26
Y24
Y26

2

VCCACLK[2]

3A (VCCIO)

+1_05V_VTT

VCCIO[5]
VCCIO[6]
VCCIO[7]
VCCIO[8]

1

AP53

POWER

2

VCCACLK[1]

+1_05V_VTT

320mA

U69J

AP51

PCI/GPIO/LPC

C894
NC_1U_6.3V_Y
0402_Y5V

RTC

2

C975
NC_10U_6.3V_Y
0805_Y5V

2

NC_10UH_0805
EBLS2012-100K

DVT

1

1

L78

2

Sheet

Thursday, December 24, 2009
1

Rev

SA
16

of

86

4

3

2

1

+VCCA_DAC

1.5A

DVT

C981
NC_10U_6.3V_Y
0805_Y5V

1 R426
2
0_J 0603
+1_05V_VTT

Default is use Internal VRM

AB34

VCC3_3[3]

AB35

VCC3_3[4]

AD35

AT22

VCCVRM[1]

BJ18

VCCFDIPLL

AM23

VCCIO[1]

2

2

VCC3_3[1]

1

AN35

AT24

+VCCVRM 1 R423

VCCDMI[1]

AT16

0_J
0603

VCCDMI[2]

AU16

VCCPNAND[1]
VCCPNAND[2]
VCCPNAND[3]
VCCPNAND[4]
VCCPNAND[5]
VCCPNAND[6]
VCCPNAND[7]
VCCPNAND[8]
VCCPNAND[9]

AM16
AK16
AK20
AK19
AK15
AK13
AM12
AM13
AM15

1

VCCIO[54]
VCCIO[55]

357mA

LVDS

+1_05V_5V_8V_RUN

2

AN30
AN31

C

+3VRUN

C115
0.1U_10V_K
0402_X5R

VCCVRM[2]

Ibexpeak-M
null

AM8
AM9
AP11
AP9

2

+1_05V_5V_8V_RUN

200mA

+VCCDMI

1 R417

61mA

2

0_J
0603

C637
1U_6.3V_Y
0402_Y5V

1 R422
+VCCPNAND

+1_5VRUN

NC_0_J
0603
1 R416
2

+1_8VRUN

0_J
0603

B

+1_8VRUN

2

0_J
0603

+3VRUN
VCCME3_3

2

NC_0_J
0603
1 R415
2

156mA

2

NC_0_J
0603

1 R421

+1_05V_VTT

1 R414

+1_05V_VTT

+3VRUN

C114
0.1U_10V_K
0402_X5R

VCCME3_3[1]
VCCME3_3[2]
VCCME3_3[3]
VCCME3_3[4]

1

1

VCC3_3[2]

HVCMOS

VCCIO[25]
VCCIO[26]
VCCIO[27]
VCCIO[28]
VCCIO[29]
VCCIO[30]
VCCIO[31]
VCCIO[32]
VCCIO[33]
VCCIO[34]
VCCIO[35]
VCCIO[36]
VCCIO[37]
VCCIO[38]
VCCIO[39]
VCCIO[40]
VCCIO[41]
VCCIO[42]
VCCIO[43]
VCCIO[44]
VCCIO[45]
VCCIO[46]
VCCIO[47]
VCCIO[48]
VCCIO[49]
VCCIO[50]
VCCIO[51]
VCCIO[52]
VCCIO[53]

R1630

C113
0.1U_10V_K
0402_X5R

1 0_J

0.085A

2 0603

+5VRUN

+3VRUN_LDO
U65

+3VRUN

2

1

1

For Disable Arrandale Graphic
GPIO27 floating as Internal VRM and there is no need external supply

VCCAPLLEXP

2

NC_0_J
0603

VIN
VOUT
GND
SHDN#
NC

5
4

NC_G909-330T1U

C983
NC_1U_10V_K
0402_X5R

C984
NC_0.1U_10V_K
0402_X7R

2

R1617
NC_4.7K_J
0402

C982
NC_1U_10V_K
0402_X5R

1
2
3

1

1
2

NC_1UH_0805
EFLS2012-1R0M RDC15

BJ24
AN20
AN22
AN23
AN24
AN26
AN28
BJ26
BJ28
AT26
AT28
AU26
AU28
AV26
AV28
AW26
AW28
BA26
BA28
BB26
BB28
BC26
BC28
BD26
BD28
BE26
BE28
BG26
BG28
BH27

2

+1_05V_5V_8V_RUN

VCCIO[24]

1 R408

1

2
+VCCFDIPLL

1

L75

C671
0.1U_10V_K
0402_X5R

AK24

D

+3VRUN_LDO

VCCALVDS, VCCTX_LVDS to GND
VSSA_LVDS NC
For disable LVDS

2

+3VRUN

357mA

200mA

B

+1_05V_VTT

VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]

AP43
AP45
AT46
AT45

1

C633
1U_6.3V_Y
0402_Y5V

TSC

37mA

AF51

AH38

DMI

1

C634
1U_6.3V_Y
0402_Y5V

2

1

C635
1U_6.3V_Y
0402_Y5V

2

1

C636
1U_6.3V_Y
0402_Y5V

2

1

C980
10U_6.3V_Y
0805_Y5V

2

1
2

C5249
22P_50V_J
0402_NPO

AF53

VSSA_DAC[2]

AH39

NAND / SPI

2

+1.05V_VCC_EXP

2

2

0_J
1206

C979
NC_10U_6.3V_Y
0805_Y5V

DVT

For RF Noise
1

R1449

VSSA_DAC[1]

VCCALVDS

PCI E*

NC_1UH_0805
EFLS2012-1R0M RDC15

C

1

AE52

VSSA_LVDS

FDI

+1.05V_VCCPLL_EXP

L71

1

+1_05V_VTT

+1_05V_VTT

AE50

VCCADAC[2]

+1_05V_VTT

For Disable Arrandale Graphic
GPIO27 floating as Internal VRM and there is no need external supply

3.062A (VCCIO)

VCCADAC[1]

2

Default is use Internal VRM

VCCCORE[1]
VCCCORE[2]
VCCCORE[3]
VCCCORE[4]
VCCCORE[5]
VCCCORE[6]
VCCCORE[7]
VCCCORE[8]
VCCCORE[9]
VCCCORE[10]
VCCCORE[11]
VCCCORE[12]
VCCCORE[13]
VCCCORE[14]
VCCCORE[15]

R407
NC_0_J
0402

2

0_J
0603

180R-100MHZ_0603
TI160808U181

1

3.062A (VCCIO)

AB24
AB26
AB28
AD26
AD28
AF26
AF28
AF30
AF31
AH26
AH28
AH30
AH31
AJ30
AJ31

C977
10U_6.3V_Y
0805_Y5V

2

C632
1U_6.3V_Y
0402_Y5V

POWER
CRT

1

1

TSC

C978
10U_6.3V_Y
0805_Y5V

2

2

C5248
22P_50V_J
0402_NPO

1 R944
U69G

2

1

For RF Noise

VCC CORE

+1_05V_VTT

D

+3VRUN

70mA

L64

2

5

A

A

FOXCONN
Title

Size
A3
Date:
5

4

3

2

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

PCH (POWER) 2/2

Document Number

Rev

M960&M970 H Model
Sheet

Thursday, December 24, 2009
1

SA
17

of

86

1

2

3

4

5

6

7

8

U69I

AY7
B11
B15
B19
B23
B31
B35
B39
B43
B47
B7
BG12
BB12
BB16
BB20
BB24
BB30
BB34
BB38
BB42
BB49
BB5
BC10
BC14
BC18
BC2
BC22
BC32
BC36
BC40
BC44
BC52
BH9
BD48
BD49
BD5
BE12
BE16
BE20
BE24
BE30
BE34
BE38
BE42
BE46
BE48
BE50
BE6
BE8
BF3
BF49
BF51
BG18
BG24
BG4
BG50
BH11
BH15
BH19
BH23
BH31
BH35
BH39
BH43
BH47
BH7
C12
C50
D51
E12
E16
E20
E24
E30
E34
E38
E42
E46
E48
E6
E8
F49
F5
G10
G14
G18
G2
G22
G32
G36
G40
G44
G52
AF39
H16
H20
H30
H34
H38
H42

A

B

C

D

VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]
VSS[206]
VSS[207]
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
VSS[225]
VSS[226]
VSS[227]
VSS[228]
VSS[229]
VSS[230]
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]
VSS[238]
VSS[239]
VSS[240]
VSS[241]
VSS[242]
VSS[243]
VSS[244]
VSS[245]
VSS[246]
VSS[247]
VSS[248]
VSS[249]
VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]

VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[326]
VSS[327]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[332]
VSS[333]
VSS[334]
VSS[335]
VSS[336]
VSS[337]
VSS[338]
VSS[339]
VSS[340]
VSS[341]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
VSS[353]
VSS[354]
VSS[355]
VSS[356]
VSS[366]

H49
H5
J24
K11
K43
K47
K7
L14
L18
L2
L22
L32
L36
L40
L52
M12
M16
M20
N38
M34
M38
M42
M46
M49
M5
M8
N24
P11
AD15
P22
P30
P32
P34
P42
P45
P47
R2
R52
T12
T41
T46
T49
T5
T8
U30
U31
U32
U34
P38
V11
P16
V19
V20
V22
V30
V31
V32
V34
V35
V38
V43
V45
V46
V47
V49
V5
V7
V8
W2
W52
Y11
Y12
Y15
Y19
Y23
Y28
Y30
Y31
Y32
Y38
Y43
Y46
P49
Y5
Y6
Y8
P24
T43
AD51
AT8
AD47
Y47
AT12
AM6
AT13
AM5
AK45
AK39
AV14

U69H

AB16
AA19
AA20
AA22
AM19
AA24
AA26
AA28
AA30
AA31
AA32
AB11
AB15
AB23
AB30
AB31
AB32
AB39
AB43
AB47
AB5
AB8
AC2
AC52
AD11
AD12
AD16
AD23
AD30
AD31
AD32
AD34
AU22
AD42
AD46
AD49
AD7
AE2
AE4
AF12
Y13
AH49
AU4
AF35
AP13
AN34
AF45
AF46
AF49
AF5
AF8
AG2
AG52
AH11
AH15
AH16
AH24
AH32
AV18
AH43
AH47
AH7
AJ19
AJ2
AJ20
AJ22
AJ23
AJ26
AJ28
AJ32
AJ34
AT5
AJ4
AK12
AM41
AN19
AK26
AK22
AK23
AK28

A

VSS[0]
VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]

VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]

AK30
AK31
AK32
AK34
AK35
AK38
AK43
AK46
AK49
AK5
AK8
AL2
AL52
AM11
BB44
AD24
AM20
AM22
AM24
AM26
AM28
BA42
AM30
AM31
AM32
AM34
AM35
AM38
AM39
AM42
AU20
AM46
AV22
AM49
AM7
AA50
BB10
AN32
AN50
AN52
AP12
AP42
AP46
AP49
AP5
AP8
AR2
AR52
AT11
BA12
AH48
AT32
AT36
AT41
AT47
AT7
AV12
AV16
AV20
AV24
AV30
AV34
AV38
AV42
AV46
AV49
AV5
AV8
AW14
AW18
AW2
BF9
AW32
AW36
AW40
AW52
AY11
AY43
AY47

B

C

Ibexpeak-M
null
D

FOXCONN

Ibexpeak-M
null

Title

Size
A3

PCH (VSS)
Document Number

2

3

4

5

6

Rev

M960&M970 H Model

Date:
1

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

Thursday, December 24, 2009
7

Sheet

SA
18
8

of

86

5

8

VDD_CLK_IO

C384
0.1U_6.3V_K
0402_X5R

C382
0.1U_6.3V_K
0402_X5R

1

A

C396
10U_6.3V_M
0805_X5R

C391
0.1U_6.3V_K
0402_X5R

2

120R-100MHZ_0402
EBMS100505H121RDC35

1

L35

2

C390
0.1U_6.3V_K
0402_X5R

7

2

1

C408
0.1U_6.3V_K
0402_X5R

2

1

C411
0.1U_6.3V_K
0402_X5R

2

C381
0.1U_6.3V_K
0402_X5R

1

C410
0.1U_6.3V_K
0402_X5R

1

C414
10U_6.3V_M
0805_X5R

2

2

120R-100MHZ_0402
EBMS100505H121RDC35

2

1

A

+1_05V_VTT

6

1

4

+3V_CLK

1

L37

2

+3VRUN

3

1

2

2

1

SMB_CLK_R 11,20,21,43
SMB_DATA_R 11,20,21,43
0402 2
0402 2

+3V_CLK

B

0
11
11

3
4

DREFCLK
DREFCLK#

2
1

VDD_DOT
VSS_DOT
DOT96
DOT96#
VDD_27
27_NSS
27_SS
VSS_27

U31
B

VDD_CPU
CPU0
CPU#0
VSS_CPU
CPU1
CPU#1
VDD_CPU_IO
VDD_SRC

24
23
22
21
20
19
18
17

CLK_CPU_BCLK
CLK_CPU_BCLK#

CLK_CPU_BCLK 4
CLK_CPU_BCLK# 4

0
CLK_PCH_BCLK_R
CLK_PCH_BCLK#_R

1
2

4
3

CLK_PCH_BCLK 11
CLK_PCH_BCLK# 11

RP79
0404_4P2R

EVT
SL28748CLC
null

VDD_CLK_IO

+3VALW

STP_CPU#

C498
0.1U_16V_Y
0402_Y5V

NC

78 IMVP_PWRGD_PWM

R1585

2 NC_0_J 1 0402

CLK_PWRGD

VCC

4

2

1

C

CLK_DMI_PCH_R
CLK_DMI_PCH#_R

RP84 0 0404_4P2R
1
4
2
3

11 CLK_PCIE_SATA
11 CLK_PCIE_SATA#

CLK_PCIE_SATA_R
CLK_PCIE_SATA#_R

9
10
11
12
13
14
15
16

RP9
0404_4P2R

1
2
DOT96_OR_SRC0
3
DOT96#_OR_SRC0#
4
5
R_DREFSSCLK_OR_27M
6
R_DREFSSCLK#_OR_27M_S 7
8

REF_14M_PCH 11

+3V_CLK

33
32
31
REF0
30
29
U123_XTALIN
28
27 U123_XTALOUT
26
25 CLK_PWRGD

C736
33P_50V_J
0402_NPO

THERMALPAD
SCLK
SDATA
REF0/FS
VDD_REF
XTAL_IN
XTAL_OUT
VSS_REF
CKPWRGD/PD#

SMBUS Address:D2H

U123_XTALIN

VSS_SATA
SRC0/SATA
SRC0#/SATA#
VSS_SRC
SRC1
SRC1#
VDD_SRC_IO
CPU_STP#

1

C742
33P_50V_J
0402_NPO

2

2

1

2

Y5
ITTI_L5030-14.31818-20
14.318MHZ_20P_30PPM
1
2

R571 1 33_F
R563 1 10K_JCPU_BSEL2

1

U123_XTALOUT
R580
NC_10M_J
0402

2

2 0402

1
5

0_J

1

R587 1

GND

RP85

0

100K_J
0402

0404_4P2R
+3VRUN

FS

CPU
133MHz

1

100MHz

Default

100MHz

SATA DOT96 27MHz

100MHz

96MHz

REF

CLK_EN# 78
C

U40
74AHC1G14GW

R594 1 10K_J STP_CPU#

+1_05V_VTT

27MHz 14.318MHz

09/11/17 R_XTALSSIN be Connect a stable clock source
(from clock gen SS 27MHz) to GPIO26_TCK.
R560

2

0

Power On SRC

0402 2

(FS)

1

Frequency Select Pin

3

R1448

4
3

2

1
2

11 CLK_DMI_PCH
11 CLK_DMI_PCH#

R_DREFSSCLK#_OR_27M_S
R_DREFSSCLK_OR_27M

NC_1K_J
0402

RP86
1
2

0

0404_4P2R
4
3

R_XTALSSIN 24
R_XTALIN 24

CPU_BSEL2

D

H:100 MHz
L:133 MHz

1

D

2

R1269

FOXCONN

0_J
0402

Title

CLOCK GEN

Size
A3

Document Number

2

3

4

5

6

Rev

M960&M970 H Model

Date:
1

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

Tuesday, December 29, 2009
7

Sheet

SA
19
8

of

86

1

2

3

4

5

6

7

8

A

A

1

207
208

2

G1
G2

2

203
204

1

2

VTT1
VTT2

For EMC
SPR2
NC_SPRING_6x2.5
null

+0_75VRUN
EMCS2

EMCS1

J2
OPEN_JUMP_OPEN2

EMCS2

EMCS2
EMCS1

21
21

EVT

SOCKET_2x102P
FOX_AS0A626-N2SN-7H

Place these Caps near So-DIMM0

C41
0.1U_16V_Y
0402_Y5V

+0_75VRUN

1

C946
1U_10V_K
0402_X5R

C947
1U_10V_K
0402_X5R

2

C945
1U_10V_K
0402_X5R

2

1
2

C5250
22P_50V_J
0402_NPO

1

C

EVT

1

C35
2.2U_10V_Y
0603

NPTH1
NPTH2

205
206

C269
0.1U_16V_M
0402
B

2

1

DDR3_VREF

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15

(20 mil)

1

2

2

EVT

2
3
8
9
13
14
19
20
25
26
31
32
37
38
43

DDR3_VREF

2

1
1

C40
2.2U_10V_Y
0603

VREF_DQ
VREF_CA

R296
0_J
0402

1

1

1
2

1
126
C36
0.1U_16V_Y
0402_Y5V

DDRDIMM_VREF

1

EVENT#
RESET#

44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196

2

1 NC_0_J 2 0402 TS#_DIMM0198
30

VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52

1

NC1
NC2
NCTEST

EVT

1

C948
1U_10V_K
0402_X5R

+1_5VSUS

C949
10U_10V_M
0805_X5R

C950
10U_10V_M
0805_X5R

C951
10U_10V_M
0805_X5R

C952
10U_10V_M
0805_X5R

1

C1152
10U_10V_M
0805_X5R

2

2

SOCKET_2x102P
FOX_AS0A626-N2SN-7H

1

For RF Noise
CAP13
+ NC_330U_2.5V_K
3.5x2.8x1.9

1

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7

VDDSPD

77
122
125

DDR3_VREF

2

12
29
47
64
137
154
171
188
10
27
45
62
135
152
169
186

199

2

M_A_DQS#[7:0]

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18

C31
0.1U_16V_Y
0402_Y5V

R1291 1 NC_0_J 2 0402
R1275

4,21 PM_EXTTS#1
4
PM_EXTTS#0
4,21 DDR3_DRAMRST#

1

5

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

C32
2.2U_10V_Y
0603

2

C

ODT0
ODT1

11
28
46
63
136
153
170
187

75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124

+3VRUN

1

M_A_DQS[7:0]

116
120
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

CN34B

2

5

M_ODT0
M_ODT1
M_A_DM[7:0]

BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA

M_A_DQ[63:0] 5

1

5
5
5

109
108
79
114
121
101
103
102
104
73
74
115
110
113
SA0_DIM0 197
SA1_DIM0 201
202
200

5 M_A_DQ1
7 M_A_DQ0
15 M_A_DQ3
17 M_A_DQ2
4 M_A_DQ5
6 M_A_DQ4
16 M_A_DQ7
18 M_A_DQ6
21 M_A_DQ8
23 M_A_DQ9
33 M_A_DQ10
35 M_A_DQ11
22 M_A_DQ13
24 M_A_DQ12
34 M_A_DQ15
36 M_A_DQ14
39 M_A_DQ16
41 M_A_DQ17
51 M_A_DQ18
53 M_A_DQ19
40 M_A_DQ21
42 M_A_DQ20
50 M_A_DQ22
52 M_A_DQ23
57 M_A_DQ25
59 M_A_DQ24
67 M_A_DQ31
69 M_A_DQ30
56 M_A_DQ28
58 M_A_DQ29
68 M_A_DQ27
70 M_A_DQ26
129M_A_DQ36
131M_A_DQ37
141M_A_DQ35
143M_A_DQ34
130M_A_DQ32
132M_A_DQ33
140M_A_DQ38
142M_A_DQ39
147M_A_DQ45
149M_A_DQ44
157M_A_DQ43
159M_A_DQ42
146M_A_DQ41
148M_A_DQ40
158M_A_DQ46
160M_A_DQ47
163M_A_DQ52
165M_A_DQ49
175M_A_DQ54
177M_A_DQ55
164M_A_DQ48
166M_A_DQ53
174M_A_DQ51
176M_A_DQ50
181M_A_DQ61
183M_A_DQ60
191M_A_DQ62
193M_A_DQ63
180M_A_DQ56
182M_A_DQ57
192M_A_DQ59
194M_A_DQ58

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

2

5
M_A_BS0
5
M_A_BS1
5
M_A_BS2
5
M_CS#0
5
M_CS#1
5 M_CLK_DDR0
5 M_CLK_DDR#0
5 M_CLK_DDR1
5 M_CLK_DDR#1
5
M_CKE0
5
M_CKE1
5
M_A_CAS#
5
M_A_RAS#
5
M_A_WE#
R61 2 10K_J 1 0402
R58 2 10K_J 1 0402
11,19,21,43 SMB_CLK_R
11,19,21,43 SMB_DATA_R

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

1

M_A_A0 98
M_A_A1 97
M_A_A2 96
M_A_A3 95
M_A_A4 92
M_A_A5 91
M_A_A6 90
M_A_A7 86
M_A_A8 89
M_A_A9 85
M_A_A10107
M_A_A11 84
M_A_A12 83
M_A_A13119
M_A_A14 80
M_A_A15 78

B

+1_5VSUS

CN34A

2

M_A_A[15:0]

2

5

C953
10U_10V_M
0805_X5R

SMBus Address: A0H(W)/A1H(R)

1

C958
0.1U_10V_K
0402_X5R

2

1

C957
0.1U_10V_K
0402_X5R

2

1

C956
0.1U_10V_K
0402_X5R

2

C5251
22P_50V_J
0402_NPO

2

1
2

D

1

+1_5VSUS

DVT

C959
0.1U_10V_K
0402_X5R

D

FOXCONN

For RF Noise

Title

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

DDRIII(SO-DIMM_0) 1/2

Size
Document Number
Custom

Rev

M960&M970 H Model

Date:
1

2

3

4

5

6

Tuesday, December 29, 2009
7

Sheet

SA
20
8

of

86

1

2

3

4

5

6

7

8

A

A

CN35A

VREF_DQ
VREF_CA

C43
2.2U_10V_Y
0603

C38
0.1U_16V_Y
0402_Y5V

2
3
8
9
13
14
19
20
25
26
31
32
37
38
43

DDR3_VREF
C37
2.2U_10V_Y
0603

C44
0.1U_16V_Y
0402_Y5V

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15

NPTH1
NPTH2

207
208

VTT1
VTT2

203
204

G1
G2

G1
G2

+0_75VRUN

EMCS1
EMCS2

EMCS1
EMCS2

20
20

C

EVT

SOCKET_2x102P
FOX_AS0A626-JASG-7H

+0_75VRUN

Place these Caps near So-DIMM1

EVT

2

+1_5VSUS

C971
1U_10V_K
0402_X5R

C972
1U_10V_K
0402_X5R

C973
1U_10V_K
0402_X5R

C974
1U_10V_K
0402_X5R

C964
10U_10V_M
0805_X5R

2

1

C963
10U_10V_M
0805_X5R

2

1

C962
10U_10V_M
0805_X5R

2

1

C961
10U_10V_M
0805_X5R

2

1

C960
10U_10V_M
0805_X5R

2

1

C1151
10U_10V_M
0805_X5R

2

2

1

1

SOCKET_2x102P
FOX_AS0A626-JASG-7H

C5253
22P_50V_J
0402_NPO

1

1
126

2

EVENT#
RESET#

1

1
2

1
2

198
30

2

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7

DDR3_VREF
1

12
29
47
64
137
154
171
188
10
27
45
62
135
152
169
186

TS#_DIMM1

NC1
NC2
NCTEST

EVT

2

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

R1276 1 NC_0_J 2 0402

4,20 PM_EXTTS#1
4,20 DDR3_DRAMRST#

77
122
125

B

1

M_B_DQS#[7:0]

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

C34
0.1U_16V_Y
0402_Y5V

VDDSPD

44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196

2

5

11
28
46
63
136
153
170
187

C33
2.2U_10V_Y
0603

199

VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52

1

C

ODT0
ODT1

+3VRUN

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18

2

M_B_DQS[7:0]

116
120
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

CN35B
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124

1

5

M_ODT2
M_ODT3
M_B_DM[7:0]

+1_5VSUS

1

5
5
5

BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA

M_B_DQ[63:0] 5

5 M_B_DQ1
7 M_B_DQ0
15 M_B_DQ3
17 M_B_DQ2
4 M_B_DQ5
6 M_B_DQ4
16 M_B_DQ7
18 M_B_DQ6
21 M_B_DQ8
23 M_B_DQ9
33 M_B_DQ10
35 M_B_DQ11
22 M_B_DQ13
24 M_B_DQ12
34 M_B_DQ15
36 M_B_DQ14
39 M_B_DQ16
41 M_B_DQ17
51 M_B_DQ18
53 M_B_DQ19
40 M_B_DQ21
42 M_B_DQ20
50 M_B_DQ22
52 M_B_DQ23
57 M_B_DQ25
59 M_B_DQ24
67 M_B_DQ31
69 M_B_DQ30
56 M_B_DQ28
58 M_B_DQ29
68 M_B_DQ27
70 M_B_DQ26
129M_B_DQ36
131M_B_DQ37
141M_B_DQ35
143M_B_DQ34
130M_B_DQ32
132M_B_DQ33
140M_B_DQ38
142M_B_DQ39
147M_B_DQ45
149M_B_DQ44
157M_B_DQ43
159M_B_DQ42
146M_B_DQ40
148M_B_DQ41
158M_B_DQ47
160M_B_DQ46
163M_B_DQ49
165M_B_DQ48
175M_B_DQ54
177M_B_DQ55
164M_B_DQ52
166M_B_DQ53
174M_B_DQ51
176M_B_DQ50
181M_B_DQ61
183M_B_DQ60
191M_B_DQ63
193M_B_DQ62
180M_B_DQ56
182M_B_DQ57
192M_B_DQ58
194M_B_DQ59

1

+3VRUN

109
108
79
114
121
101
103
102
104
73
74
115
110
113
SA0_DIM1 197
SA1_DIM1 201
202
200

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

2

B

5
M_B_BS0
5
M_B_BS1
5
M_B_BS2
5
M_CS#2
5
M_CS#3
5 M_CLK_DDR2
5 M_CLK_DDR#2
5 M_CLK_DDR3
5 M_CLK_DDR#3
5
M_CKE2
5
M_CKE3
5
M_B_CAS#
5
M_B_RAS#
5
M_B_WE#
R77 2 10K_J 1 0402
R78 2 10K_J 1 0402
11,19,20,43 SMB_CLK_R
11,19,20,43 SMB_DATA_R

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

1

M_B_A0 98
M_B_A1 97
M_B_A2 96
M_B_A3 95
M_B_A4 92
M_B_A5 91
M_B_A6 90
M_B_A7 86
M_B_A8 89
M_B_A9 85
M_B_A10107
M_B_A11 84
M_B_A12 83
M_B_A13119
M_B_A14 80
M_B_A15 78

2

M_B_A[15:0]

2

5

For RF Noise

+ CAP22
NC_330U_2.5V_K
3.5x2.8x1.9

DVT
+1_5VSUS

1

C969
0.1U_10V_K
0402_X5R

2

1

C968
0.1U_10V_K
0402_X5R

2

1
2

C967
0.1U_10V_K
0402_X5R

2

2

C5252
22P_50V_J
0402_NPO

1

D

1

D

C970
0.1U_10V_K
0402_X5R

FOXCONN
Title

For RF Noise

DDRIII(SO-DIMM_1) 2/2

Size
Document Number
Custom

2

3

Rev

M960&M970 H Model

Date:
1

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

4

5

6

Tuesday, December 29, 2009
7

Sheet

SA
21
8

of

86

5

4

3

2

1

U204A
null

D

D

PEG_RXN[15..0] 3
TXN0
C319
PEG_RXP_C0
PEG_RXN_C0

AA38
Y37

PCIE_RX0P
PCIE_RX0N

PCIE_TX0P
PCIE_TX0N

Y33 TXP0
Y32 TXN0

PCIE_RX1P
PCIE_RX1N

PCIE_TX1P
PCIE_TX1N

W33 TXP1
W32 TXN1

PCIE_RX2P
PCIE_RX2N

PCIE_TX2P
PCIE_TX2N

U33 TXP2
U32 TXN2

PCIE_RX3P
PCIE_RX3N

PCIE_TX3P
PCIE_TX3N

U30 TXP3
U29 TXN3

PCIE_RX4P
PCIE_RX4N

PCIE_TX4P
PCIE_TX4N

T33
T32

PCIE_RX5P
PCIE_RX5N

PCIE_TX5P
PCIE_TX5N

T30
T29

PCIE_RX6P
PCIE_RX6N

PCIE_TX6P
PCIE_TX6N

P33 TXP6
P32 TXN6

TXN1
C320
TXN2
C321

PEG_RXP_C1
PEG_RXN_C1

Y35
W36

TXN3
C322
TXN4
C323

PEG_RXP_C2
PEG_RXN_C2

W38
V37

TXN5
C324
TXN6
C325

PEG_RXP_C3
PEG_RXN_C3

3 PEG_RXP_C[0..15]

C

TXN7
C326
TXN8
C327

PEG_RXP_C4
PEG_RXN_C4
PEG_RXP_C5
PEG_RXN_C5
PEG_RXP_C6
PEG_RXN_C6

3 PEG_RXN_C[0..15]
PEG_RXN_C0
PEG_RXN_C1
PEG_RXN_C2
PEG_RXN_C3
PEG_RXN_C4
PEG_RXN_C5
PEG_RXN_C6
PEG_RXN_C7
PEG_RXN_C8
PEG_RXN_C9
PEG_RXN_C10
PEG_RXN_C11
PEG_RXN_C12
PEG_RXN_C13
PEG_RXN_C14
PEG_RXN_C15

U38
T37
T35
R36
R38
P37

PCI EXPRESS INTERFACE

PEG_RXP_C0
PEG_RXP_C1
PEG_RXP_C2
PEG_RXP_C3
PEG_RXP_C4
PEG_RXP_C5
PEG_RXP_C6
PEG_RXP_C7
PEG_RXP_C8
PEG_RXP_C9
PEG_RXP_C10
PEG_RXP_C11
PEG_RXP_C12
PEG_RXP_C13
PEG_RXP_C14
PEG_RXP_C15

V35
U36

TXP4
TXN4

C329
TXP5
TXN5

P30 TXP7
P29 TXN7

PEG_RXP_C8
PEG_RXN_C8

N38
M37

PCIE_RX8P
PCIE_RX8N

PCIE_TX8P
PCIE_TX8N

N33 TXP8
N32 TXN8

PEG_RXP_C10
PEG_RXN_C10
PEG_RXP_C11
PEG_RXN_C11
PEG_RXP_C12
PEG_RXN_C12

L38
K37
K35
J36
J38
H37

PCIE_RX10P
PCIE_RX10N
PCIE_RX11P
PCIE_RX11N
PCIE_RX12P
PCIE_RX12N

B

PEG_RXP_C13
PEG_RXN_C13

H35
G36

PEG_RXP_C14
PEG_RXN_C14

G38
F37

PCIE_RX13P
PCIE_RX13N

PCIE_TX10P
PCIE_TX10N
PCIE_TX11P
PCIE_TX11N
PCIE_TX12P
PCIE_TX12N

TXN13
C332
TXN14
C333

PCIE_TX7P
PCIE_TX7N

PCIE_TX9P
PCIE_TX9N

C330
C331

PCIE_RX7P
PCIE_RX7N

PCIE_RX9P
PCIE_RX9N

TXN11
TXN12

P35
N36

M35
L36

C328
TXN10

PEG_RXP_C7
PEG_RXN_C7

PEG_RXP_C9
PEG_RXN_C9

TXN9

TXN15
C334

N30 TXP9
N29 TXN9

C301
TXP1
C302
TXP2

TXP10
TXN10

C303
TXP3
C306
TXP4

L30
L29

TXP11
TXN11

C307
TXP5
C308
TXP6

K33 TXP12
K32 TXN12

C309
TXP7
C310
TXP8

TXP13
TXN13

PCIE_TX13P
PCIE_TX13N

J33
J32

PCIE_TX14P
PCIE_TX14N

K30 TXP14
K29 TXN14

C311
TXP9
C312
TXP10

PCIE_RX14P
PCIE_RX14N

C313
TXP11
C314
TXP12

PEG_RXP_C15
PEG_RXN_C15

F35
E37

PCIE_RX15P
PCIE_RX15N

PCIE_TX15P
PCIE_TX15N

H33 TXP15
H32 TXN15

C315
TXP13
C316
TXP14
C317

CLOCK
11 PCIE_REFCLK
11 PCIE_REFCLK#

AB35
AA36

PCIE_REFCLKP
PCIE_REFCLKN

AJ21
AK21
AH16

NC_1
NC_2
PWRGOOD

AA30

PERSTB

TXP15
C318

DVT

1

CALIBRATION

0402
10K_J
R5831

14,42,44,45,50 PLT_RST#

1 0_J

2 0402

2

A

R5762

PCIE_CALRP

Y30

PCIE_CALRN

Y29

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

2
0.1U_6.3V_K
2
0.1U_6.3V_K
2
0.1U_6.3V_K
2
0.1U_6.3V_K
2
0.1U_6.3V_K
2
0.1U_6.3V_K
2
0.1U_6.3V_K
2
0.1U_6.3V_K
2
0.1U_6.3V_K
2
0.1U_6.3V_K
2
0.1U_6.3V_K
2
0.1U_6.3V_K
2
0.1U_6.3V_K
2
0.1U_6.3V_K
2
0.1U_6.3V_K
2
0.1U_6.3V_K

PEG_RXN0
0201_X5R
PEG_RXN1
0201_X5R
PEG_RXN2
0201_X5R
PEG_RXN3
0201_X5R
PEG_RXN4
0201_X5R
PEG_RXN5
0201_X5R
PEG_RXN6
0201_X5R
PEG_RXN7
0201_X5R
PEG_RXN8
0201_X5R
PEG_RXN9
0201_X5R
PEG_RXN10
0201_X5R
PEG_RXN11
0201_X5R
PEG_RXN12

1
2
R5760 1.27K_F
0402
1
2
R5761 2K_F
0402

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

2
0.1U_6.3V_K
2
0.1U_6.3V_K
2
0.1U_6.3V_K
2
0.1U_6.3V_K
2
0.1U_6.3V_K
2
0.1U_6.3V_K
2
0.1U_6.3V_K
2
0.1U_6.3V_K
2
0.1U_6.3V_K
2
0.1U_6.3V_K
2
0.1U_6.3V_K
2
0.1U_6.3V_K
2
0.1U_6.3V_K
2
0.1U_6.3V_K
2
0.1U_6.3V_K
2
0.1U_6.3V_K

PEG_RXN13
0201_X5R
PEG_RXN14
0201_X5R
PEG_RXN15
0201_X5R

PEG_RXP0
0201_X5R
PEG_RXP1
0201_X5R
PEG_RXP2
0201_X5R
PEG_RXP3
0201_X5R
PEG_RXP4
0201_X5R
PEG_RXP5
0201_X5R
PEG_RXP6
0201_X5R
PEG_RXP7
0201_X5R

B

PEG_RXP8
0201_X5R
PEG_RXP9
0201_X5R
PEG_RXP10
0201_X5R
PEG_RXP11
0201_X5R
PEG_RXP12
0201_X5R
PEG_RXP13
0201_X5R
PEG_RXP14
0201_X5R
PEG_RXP15
0201_X5R

PCIE_VDDC

A

216-0774008

Ball AH16:
For M96 this pin NC.
For Madison-M2 and Park-M2
the PWRGOOD ball must be conneccted to ground.
For M97-M2 PWRGOOD input must be provided externally.

FOXCONN
Title

Size
A3
Date:

5

C

0201_X5R

PEG_RXP[15..0] 3
TXP0

L33
L32

1

4

3

2

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

VGA (PCI-E) 1/6
Document Number

Rev

M960&M970 H Model
Sheet

Tuesday, December 29, 2009
1

SA
22

of

86

5

4

EVT

2

+1_8VRUN

MEM_ID0

R5763 1 10K_J

24 ATI_DVPDATA0

For M960/M970 M92-M2 XTX / Park-XT
0001 64Mx16 Reserve
x4pcs
0010 64Mx16 Hynix *
x4pcs
0011 64Mx16 Samsung** x4pcs
0101 64Mx16 Reserve
x4pcs
0110 64Mx16 Elpida*** x4pcs
0111 64Mx16 AMD****
x4pcs

2 0402
STRAPS

PIN name

DESCRIPTION OF DEFAULT SETTINGS

MEM_ID2

TX_PWRS_ENB

GPIO_0

Transmitter Power Savings Enable
0: 50% Tx output swing
1: Full Tx output swing

TX_DEEMPH_EN

GPIO_1

PCI Express Transmitter De-emphasis Enable
0: Tx de-emphasis disabled
1: Tx de-emphasis enabled

AC_BATT

GPIO_5

AC (Performance mode) = 3.3 V
Battery saving mode = 0.0 V

PWRCNTL_0
PWRCNTL_1

GPIO_6
GPIO_15
GPIO_20

Power Control signals control the core voltage regulator.
At Reset, these signals will be inputs with weak internal pull-down resistors.
VBIOS can define these signals to be either 3.3-V outputs or open drain outputs.
The output state (high/low) of these signals is programmable for each PowerPlay state.

BB_EN

GPIO_21

Back Bias (BB) control:
When GPIO_21_BB_EN = 0 V, then back bias is disabled on the PCB (i.e. BPP = VDDC).
When GPIO_21_BB_EN = 3.3 V, then back bias is enabled on the PCB (i.e. BPP = VDDC +Offset).
Can function as a GPIO if not required for BB control.

BLON

GPIO_7

Controls Backlight On/Off.
Active high.
If not needed as the backlight enable signal, it can alternatively be used as a GPIO or an open drain type output.
Note: External pull-down recommended

R5764 1NC_10K_J 2 0402

24 ATI_DVPDATA1

D

R5765 1NC_10K_J 2 0402

24 ATI_DVPDATA2

MEM_ID3

R5766 1NC_10K_J 2 0402

24 ATI_DVPDATA3

+3V3_DELAY
VGA_DIS

GPIO_9

0: VGA Controller capacity enabled
1: The device will not be recognized as the system’s VGA controller

CONFIG[0]
CONFIG[1]
CONFIG[2]

GPIO_11
GPIO_12
GPIO_13

If BIOS_ROM_EN = 0, then Config[2:0] defines the primary memory aperture size.

BIOS_ROM_EN

GPIO_22

Enable external BIOS ROM device
0: Disable external BIOS ROM device
1: Enable external BIOS ROM device

SSIN

GPIO_16

Spread Spectrum clock input for memory clock and/or engine clock (maximum
down spread of -2.5%). Requires a spread version of 27 MHz(The modulation rate is 30-50 KHz.)

THERMAL_INT

GPIO_17

Thermal monitor interrupt Can be set as either:
1) An input from an external temperature sensor (ALERTb) , or
2) An output signaling that the ASIC temp (measured by the internal sensor) is above the high
threshold or below the low threshold.Output can be open drain or 3.3-V output.(active low by default)

CLKREQB

GPIO_23

Reserve

C

24

ATI_GPIO0

R5769 1 10K_J

24

ATI_GPIO5

R5770 1NC_10K_J 2 0402

24

ATI_GPIO11

R5771 1 10K_J

24

ATI_GPIO12

R5772 1NC_10K_J 2 0402

ATI_GPIO13

R5773 1NC_10K_J 2 0402

24

RECOMMENDED SETTINGS
0= DO NOT INSTALL RESISTOR

10K RESISTOR
ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, 1X==INSTALL
DESIGN DEPENDANT
THEY MUST NOT CONFLICT DURING RESET
NA = NOT APPLICABLE

MEM_ID1

For M960/M970 Madsion-LP
0001 64Mx16 Reserve
x8pcs
0010 64Mx16 Hynix *
x8pcs
0011 64Mx16 Samsung** x8pcs
0101 64Mx16 Reserve
x8pcs
0110 64Mx16 Elpida*** x8pcs
0111 64Mx16 AMD****
x8pcs
P.S. * means Hynix H5TQ1G63BFR-12C,800MHz
**means Samsung K4W1G1646E-HC12T00,800MHz
***means Elpida EDJ1116DBSE-DJ-F,1333MHz
****means AMD 23EY2387MA-12,800MHz

If no ROM attached, GPIO[13:12:11]
CONFIG{2:0}
controls the memory aperture size.
64MB
010
128MB
000
256MB
001
512MB
001

1

CONFIGURATION STRAPS

EVT

Strap for DDR3 VRAM
ATI_DVPDATA[3 : 0]

D

3

2 0402

2 0402

C

B

B

Enable HD Audio
Disable HD Audio

R5774 1 10K_J

24,34 ATI_DAC1VSYNC

2 0402

2

1
0

1

R108
NC_10K_J
0402

Enable HDMI
Disable HDMI

R116 1 10K_J

24,34 ATI_DAC1HSYNC

2 0402

2

1
0

1

R5775
NC_10K_J
0402

A

A

FOXCONN
Title

Size
A3
Date:
5

4

3

2

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

VGA (Strap) 2/6
Document Number

Rev

M960&M970 H Model
Sheet

Tuesday, December 29, 2009
1

SA
23

of

86

1

2

3

4

5

6

7

8

U204B
null

MUTI GFX
DPA

DPC

DPD
I2C
TP1097
TP1098

26MIL
26MIL

1AK26
1AJ26

B

ATI_HDMI_D0 38
ATI_HDMI_D0# 38

TX1P_DPA1P
TX1M_DPA1N

AU26
AV25

TX0M_DPA1P
TX0M_DPA1N

C6093 0402_X5R 1
C6094 0402_X5R 1

2 0.1U_6.3V_K
2 0.1U_6.3V_K

ATI_HDMI_D1 38
ATI_HDMI_D1# 38

TX2P_DPA0P
TX2M_DPA0N

AT27
AR26

TX0M_DPA2P
TX0M_DPA2N

C6095 0402_X5R 1
C6096 0402_X5R 1

2 0.1U_6.3V_K
2 0.1U_6.3V_K

ATI_HDMI_D2 38
ATI_HDMI_D2# 38

TXCBP_DPB3P
TXCBM_DPB3N

AR30
AT29

TX3P_DPB2P
TX3M_DPB2N

AV31
AU30

TX4P_DPB1P
TX4M_DPB1N

AR32
AT31

TX5P_DPB0P
TX5M_DPB0N

AT33
AU32

TXCCP_DPC3P
TXCCM_DPC3N

AU14
AV13

TX0P_DPC2P
TX0M_DPC2N

AT15
AR14

TX1P_DPC1P
TX1M_DPC1N

AU16
AV15

TX2P_DPC0P
TX2M_DPC0N

AT17
AR16

TXCDP_DPD3P
TXCDM_DPD3N

AU20
AT19

TX3P_DPD2P
TX3M_DPD2N

AT21
AR20

TX4P_DPD1P
TX4M_DPD1N

AU22
AV21

TX5P_DPD0P
TX5M_DPD0N

AT23
AR22

ATI_GPIO0

09/11/17

EVT

R
RB

AD39
AD37

G
GB

AE36
AD35

B
BB

AF37
AE38

HSYNC
VSYNC

AC36
AC38

1

EVT

GPIO_0
GPIO_1
GPIO_2
GPIO_3_SMBDATA
GPIO_4_SMBCLK
GPIO_5_AC_BATT
DAC1
GPIO_6
GPIO_7_BLON
GPIO_8_ROMSO
GPIO_9_ROMSI
GPIO_10_ROMSCK
GPIO_11
GPIO_12
GPIO_13
GPIO_14_HPD2
GPIO_15_PWRCNTL_0
GPIO_16_SSIN
GPIO_17_THERMAL_INT
GPIO_18_HPD3
GPIO_19_CTF
GPIO_20_PWRCNTL_1
GPIO_21_BB_EN
GPIO_22_ROMCSB
GPIO_23_CLKREQB
JTAG_TRSTB
JTAG_TDI
JTAG_TCK
JTAG_TMS
JTAG_TDO
GENERICA
GENERICB
GENERICC
GENERICD
GENERICE_HPD4
DAC2
GENERICF
GENERICG

R5790
34,38 ATI_HDMI_DET_3

2

2

R5791
249_F
0402

AH13

DPLL_PVDD

DVT

R5794

R6002
ATI_XTALIN_R 1
2
NC_0_J 0402

1

AN31

PLL/CLOCK
DPLL_VDDC

AV33
AU34

XTALIN
XTALOUT

AW34

XO_IN

120_F
0402

DVT

AW35

ATI_XTALIN

AF29
AG29

58 ATI_THERMDP
58 ATI_THERMDN

DPLUS
DMINUS

Y9
NC_27MHZ_20P_30PPM
ITTI_L5030-27.000-20

AK32

AVDD
AVSSQ

AD34
AE34

AVDD

VDD1DI
VSS1DI

AC33
AC34

VDD1DI

R2
R2B

AC30
AC31
AD30
AD31

B2
B2B

AF30
AF31

C
Y
COMP

AC32
AD32
AF32

H2SYNC
V2SYNC

AD29
AC29

VDD2DI
VSS2DI

AG31
AG32

A2VDD

AG33

A2VDDQ

AD33

A2VSSQ

AF33

R2SET

AA29

DDC1CLK
DDC1DATA

AM26
AN26

AUX1P
AUX1N

AM27
AL27

DDC2CLK
DDC2DATA

AM19
AL19

AUX2P
AUX2N
DDCCLK_AUX3P
DDCDATA_AUX3N

AL30
AM30

DDCCLK_AUX4P
DDCDATA_AUX4N

AL29
AM29

DDCCLK_AUX5P
DDCDATA_AUX5N
TS_FDO

AL31

NC_TS_A

AJ32
AJ33

TSVDD
TSVSS

2

R5782

G2
G2B

AN21
AM21

DDC6CLK
DDC6DATA

AJ30
AJ31

DDCCLK_AUX7P
DDCDATA_AUX7N

AK30
AK29

ATI_DAC1RED

2 0402

0402

B

34

ATI_DAC1GREEN 34
ATI_DAC1GREEN_GB

ATI_DAC1GREEN
34
ATI_DAC1BLUE

ATI_DAC1BLUE 34
ATI_DAC1BLUE_BB 34
OPTIONAL STRAP TO GROUND
FOR RB,GB,BB
SEE DAC1_RGB SHEET

R5779

R5780

R5781

150_F
0402

150_F
0402

150_F
0402

PLACE OR RESISTORS CLOSE TO ASIC

OPTIONAL STRAP TO GROUND
FOR R2B,G2B,B2B
SEE DAC2_RGB SHEET
IF Y,C,COMP OR R2,G2,B2 ARE USED
R2B,G2B,B2B MUST BE CONNECTED
TO GROUND OR TERMINATED AT
CONNECTOR

MP

DAC2 CAN BE TV SIGNALS (C,Y,COMP) OR SECONDARY CRT (R2,B2,G2
SIGNALS AS CONTROLLED BY AN INTERNAL MUX

EVT
ATI_JTAG_RST

NC_10K_J
R5906 1
2 0402

ATI_JTAG_TDI

NC_10K_J
R5907 1
2 0402

ATI_JTAG_TMS

NC_10K_J
R5909 1
2 0402

R_XTALSSIN

NC_10K_J
R5908 1
2 0402

VDD3
A2VDDQ

1
R5792 715_F

+3V3_DELAY
C

VDD1DI

PVT
ATI_JTAG_RST

R5991

1

NC_10K_J
2 0402

EVT
09/11/17 Add 5991 pull-down with 10K ohm to ground for the Park/Madison JTAG test block
intermittently fails to initialize correctly. Incorrect initialization may
result in a failure to boot.

2
0402

ATI_CRT_SCL 34
ATI_CRT_SDA 34

DVT
For Park-M2:
DDC/Aux Pairs 1,2,3,5,6 are available
DDC/Aux Pair 4,7 is not connected.
For M96-M2,M97-M2,Madison-M2:
DDC/Aux Pairs 1,2,3,4,5,6 are available
DDC/Aux Pair 7 is not connected.
ATI_HDMI_SCL 38
ATI_HDMI_SDA 38

2

R6003
NC_1M_J
0402

THERMAL

0_J

1 499_F

AN20
AM20

XO_IN2

EVT

1

1

NC_22P_50V_J
0402_NPO

2

2

100_F
0402

2

PVT
C6342

DPLL_VDDC
ATI_XTALIN
ATI_XTALOUT

2

0_J

R5778 1

ATI_DAC1RED 34
ATI_DAC1RED_RB

2 0402

2 0402
ATI_DAC1HSYNC 23,34
ATI_DAC1VSYNC 23,34

DPLL_PVDD
DPLL_PVSS
DDC/AUX

0_J

R5777 1

AB34

VREFG

1

1 R5793

AM32
AN32

R5776 1

RSET

HPD1

C6097
0.1U_6.3V_K
0402_X5R

DEPENDING ON OSC USED
SELECT VOLTAGE DIVIDER
RESISTOR VALUES C AND B
TO ENSURE XTALIN VOLTAGE
LEVEL OF 1.8V

19 R_XTALIN

AK24

AT_VREFG

1

499_F
0402

1

2

C

DP_D channel is available for M97-M2,Madison-M2,M96-M2.
DP Channel D is NC on Park.

SCL
SDA
GENERAL PURPOSE I/O

AH20
AH18
AN16
AH23
AJ23
AH17
AJ17
AK17
1 AJ13
26MIL
1 AH15
26MIL
1 AJ16
26MIL
AK16
AL16
23 ATI_GPIO12
AM16
23 ATI_GPIO13
1 AM14
26MIL
TP1101
AM13
80 PWRCNTL_0
R5783 2 NC_0_J 1 0402 XTALSSIN AK14
19 R_XTALSSIN
R5784 2
0_J 1 0402
AG30
39,58 OVT_GFX#
TP1102 26MIL
1 AN14
TP1103 26MIL
1 AM17
AL13
80 PWRCNTL_1
AJ14
1
TP1115 26MIL
TP1262 26MIL
1AK13
R5786 1 10K_J 2 0402 ATI_GPIO23
AN13
+3V3_DELAY
ATI_JTAG_RST
AM23
ATI_JTAG_TDI
R6001
AN23
Connect a stable clock source
R_XTALSSIN 2 NC_0_J 1 0402
R_XTALSSIN_R AK23
(from clock gen SS 27MHz)
ATI_JTAG_TMS
AL24
TP1107 26MIL
AM24
1 ATI_JTAG_TDO
to GPIO26_TCK.
TP1108 26MIL
AJ19
1
TP1109 26MIL
AK19
1
AJ20
+1_8VRUN
AK20
AJ24
AH26
AH24
23

These two can be unused on M96,M97,Madison and Park.
Ball AH26:
11,39,58 SMB_THRM_DATA
For M97-M2 GENERICF (no HPD function).
11,39,58 SMB_THRM_CLK
For Park-M2 NC.
23 ATI_GPIO5
For Madison-M2 GENERICF- can provide HPD5 function
36 ATI_INV_EN
Ball AH24:
TP1261
For M97-M2 GENERICF (no HPD function).
TP1099
PVT TP1100
For Park-M2 NC.
For Madison-M2 GENERICF- can provide HPD6 function 23 ATI_GPIO11

A

1

Ball AM17:
For M96 this pin can be not used.
For M97-M2 When PWRGOOD is deasserted, the CTF
will return to its default state (high impedance)
For Park-M2 and Madison-M2:
GPIO_19_CTF has an internal latch, such
that if the pad has been operating normally,
and then the internal PWRGOOD deasserts
(because CTF was triggered), the GPIO_19 will
continue to drive high to keep the
VDDC regulator shut down.
Clearing this state will require power-cycling
of the VDDR3 rail.

DPB

2 0.1U_6.3V_K
2 0.1U_6.3V_K

2

ATI_DVPDATA0
ATI_DVPDATA1
ATI_DVPDATA2
ATI_DVPDATA3

ATI_HDMI_TXCA 38
ATI_HDMI_TXCA# 38

C6091 0402_X5R 1
C6092 0402_X5R 1

1

23
23
23
23

2 0.1U_6.3V_K
2 0.1U_6.3V_K

TX0M_DPA0P
TX0M_DPA0N

2

MEM ID

TXCAM_DPA0P C6089 0402_X5R 1
TXCAM_DPA0N C6090 0402_X5R 1

AT25
AR24

1

EVT

DVPCNTL_MVP_0
DVPCNTL_MVP_1
DVPCNTL_0
DVPCNTL_1
DVPCNTL_2
DVPCLK
DVPDATA_0
DVPDATA_1
DVPDATA_2
DVPDATA_3
DVPDATA_4
DVPDATA_5
DVPDATA_6
DVPDATA_7
DVPDATA_8
DVPDATA_9
DVPDATA_10
DVPDATA_11
DVPDATA_12
DVPDATA_13
DVPDATA_14
DVPDATA_15
DVPDATA_16
DVPDATA_17
DVPDATA_18
DVPDATA_19
DVPDATA_20
DVPDATA_21
DVPDATA_22
DVPDATA_23

AU24
AV23

TX0P_DPA2P
TX0M_DPA2N

2

AR8
AU8
AP8
AW8
AR3
AR1
AU1
AU3
AW3
AP6
AW5
AU5
AR6
AW6
AU6
AT7
AV7
AN7
AV9
AT9
AR10
AW10
AU10
AP10
AV11
AT11
AR12
AW12
AU12
AP12

A

TXCAP_DPA3P
TXCAM_DPA3N

C6343
D

2

TSVDD

ATI_XTALOUT

1

D

NC_22P_50V_J
0402_NPO

Reserve for Intel FCIM function

216-0774008

For M96 these two pins connect to GND.
GND Option If XO_IN/XO_IN2 not used
For M97, XO_IN and XO_IN2 should be grounded
Ball AW34:
For M97-M2 GND
For Madison-M2 and Park-M2 27MHz oscillator can be resvered.
Ball AW35:
For M97-M2 DPE_VSSR
For Madison-M2 and Park-M2 100MHz oscillator can be resvered.

FOXCONN
Title

Size
A2
Date:

1

2

3

4

5

6

7

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

VGA (I/O) 3/6
Document Number

Rev

M960&M970 H Model
Tuesday, December 29, 2009

Sheet
8

SA
24

of

86

A34
E30
E26
C20
C16
C12
J11
F8

FBAWDQS0
FBAWDQS1
FBAWDQS2
FBAWDQS3
FBAWDQS4
FBAWDQS5
FBAWDQS6
FBAWDQS7

ADBIA0
ADBIA1

J21
G19

FBA_ODTA0
FBA_ODTA1

CLKA0
CLKA0B

H27
G27

FBA_CLK0
FBA_CLK0#

CLKA1
CLKA1B

J14
H14

FBA_CLK1
FBA_CLK1#

RASA0B
RASA1B

K23
K19

FBA_RASA0#
FBA_RASA1#

CASA0B
CASA1B

K20
K17

FBA_CASA0#
FBA_CASA1#

CSA0B_0
CSA0B_1

K24
K27

FBA_CSA0_0#

CSA1B_0
CSA1B_1

M13
K16

FBA_CSA1_0#

CKEA0
CKEA1

K21
J20

FBA_CKEA0
FBA_CKEA1

R5798
R5800
R5799

243_F
243_F
243_F

1 0402
1 0402
1 0402

L27
2
N12
2
2 AG12

MEM_CALRN0
MEM_CALRN1
MEM_CALRN2

WEA0B
WEA1B

K26
L15

FBA_WEA0#
FBA_WEA1#

R5802
R5803
R5804

243_F
243_F
243_F

1 0402
1 0402
1 0402

2 M12
2 M27
2 AH12

MEM_CALRP1
MEM_CALRP0
MEM_CALRP2

MAA0_8
MAA1_8

H23
J19

FBA_A13

DVT

FBA_CLK1 29
FBA_CLK1# 29

DVT

FBA_RASA0# 28
FBA_RASA1# 29

+1_5VRUN

FBA_CASA0# 28
FBA_CASA1# 29

PVT

FBA_CSA0_0# 28
FBA_CSA1_0# 29
FBA_CKEA0 28
FBA_CKEA1 29

R5801
100_F
0402

FBA_WEA0# 28
FBA_WEA1# 29

R5796
40.2_F
0402

CLKTESTA
CLKTESTB

R5809

R5796

R5810

PVT

Madison-LP

40.2

40.2

40.2

40.2

Park-XT

40.2

40.2

40.2

40.2

FBCRDQS0
FBCRDQS1
FBCRDQS2
FBCRDQS3
FBCRDQS4
FBCRDQS5
FBCRDQS6
FBCRDQS7

FBCRDQS[7..0]

30,31

FBCWDQS0
FBCWDQS1
FBCWDQS2
FBCWDQS3
FBCWDQS4
FBCWDQS5
FBCWDQS6
FBCWDQS7

FBCWDQS[7..0]

30,31

DDBIB0_0
DDBIB0_1
DDBIB0_2
DDBIB0_3
DDBIB1_0
DDBIB1_1
DDBIB1_2
DDBIB1_3

G7
K1
P1
W4
AC4
AH3
AJ8
AM3

ADBIB0
ADBIB1

T7
W7

FBC_ODTB0
FBC_ODTB1

CLKB0
CLKB0B

L9
L8

FBC_CLK0
FBC_CLK0#

CLKB1
CLKB1B

AD8
AD7

FBC_CLK1
FBC_CLK1#

RASB0B
RASB1B

T10
Y10

FBC_RASB0# 30
FBC_RASB1# 31

CASB0B
CASB1B

W10
AA10

FBC_CASB0# 30
FBC_CASB1# 31

CSB0B_0
CSB0B_1

P10
L10

FBC_CSB0_0# 30

CSB1B_0
CSB1B_1

AD10
AC10

FBC_CSB1_0# 31

CKEB0
CKEB1

U10
AA11

FBC_CKEB0 30
FBC_CKEB1 31

WEB0B
WEB1B

N10
AB11

FBC_WEB0# 30
FBC_WEB1# 31

AD28

TESTEN

AK10
AL10

CLKTESTA
CLKTESTB

MAB0_8
MAB1_8

DRAM_RST

T8
W8
AH11

C

FBC_ODTB0 30
FBC_ODTB1 31
FBC_CLK0 30
FBC_CLK0# 30
FBC_CLK1 31
FBC_CLK1# 31

B

FBC_A13
R5878 1

FBC_A13 30,31
51_J 2 0402

R5879

1
R5805

2

0402
NC_10K_J
R5981

216-0774008 null

5.1K_F
0402

10K_J
0402

100

100

100

1

+3VRUN
C6104
0.1U_6.3V_K For AMD hang-up workaround,
0402_X5R
if not use, NC R5981.

CLKTESTB

4

R5808
NC_2.2K_J +1_5VRUN
0402

09/11/18 Change R5878 resistor value
from 680 Ohm to 51 Ohm for memory
For M96/M92, R5807/R5806 mount 4.7K ohm
reset circuit update from AMD
R5806 1 NC_0_J 2 0402

For Madison/Park, R5807/R5806 mount 0 ohm

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

FOXCONN

100

EVT
3

2

VGA (Memory BUS) 4/6

Size
Document Number
Custom

Rev
SA

M960&M970 H Model

Date:
5

MEM_RST# 28,29,30,31

C6100
68P_50V_K
0402_NPO

R5807 1 NC_0_J 2 0402

Title

M92 XTX

PVT

DVT

DVT

CLKTESTA

30,31

EVT

R5814
100_F
0402

2

R5795

40.2_F
0402

2

DVT

R5810

2

GPU chip

MVREFDB
MVREFSB

F6
K3
P3
V5
AB5
AH1
AJ9
AM5

PVT
1

PVT

GPU voltage reference resistor value table
C6103
0.1U_6.3V_K
0402_X5R

Y12
AA12

FBCDQM0
FBCDQM1
FBCDQM2
FBCDQM3
FBCDQM4
FBCDQM5
FBCDQM6
FBCDQM7

C6099
0.1U_6.3V_K
0402_X5R

FBA_A13 28,29

1

1
1

FBA_CLK0 28
FBA_CLK0# 28

2

216-0774008 null

40.2_F
0402

1

2

R5809

2

R5813
100_F
0402

FBA_ODTA0 28
FBA_ODTA1 29

+1_5VRUN

Park: Stuff R5800/R5802, NC R5798/R5799/R5803/R5804
Madison: NC R5800/R5802, Stuff R5798/R5799/R5803/R5804

2

A

28,29

DVT

+1_5VRUN

PVT

FBAWDQS[7..0]

28,29

H3
H1
T3
T5
AE4
AF5
AK6
AK5

FBC_BA2 30,31
FBC_BA0 30,31
FBC_BA1 30,31
FBCDQM[7..0]

1

DDBIA0_0
DDBIA0_1
DDBIA0_2
DDBIA0_3
DDBIA1_0
DDBIA1_1
DDBIA1_2
DDBIA1_3

FBARDQS[7..0]

WCKB0_0
WCKB0B_0
WCKB0_1
WCKB0B_1
WCKB1_0
WCKB1B_0
WCKB1_1
WCKB1B_1
GDDR5/DDR2/GDDR3
EDCB0_0
EDCB0_1
EDCB0_2
EDCB0_3
EDCB1_0
EDCB1_1
EDCB1_2
EDCB1_3

D

2

FBARDQS0
FBARDQS1
FBARDQS2
FBARDQS3
FBARDQS4
FBARDQS5
FBARDQS6
FBARDQS7

MAB0_0
MAB0_1
MAB0_2
MAB0_3
MAB0_4
MAB0_5
MAB0_6
MAB0_7
MAB1_0
MAB1_1
MAB1_2
MAB1_3
MAB1_4
MAB1_5
MAB1_6
MAB1_7

1

C34
D29
D25
E20
E16
E12
J10
D7

FBADQM[0..7] 28,29

30,31

FBC_A0
FBC_A1
FBC_A2
FBC_A3
FBC_A4
FBC_A5
FBC_A6
FBC_A7
FBC_A8
FBC_A9
FBC_A10
FBC_A11
FBC_A12
FBC_BA2
FBC_BA0
FBC_BA1

2

FBADQM0
FBADQM1
FBADQM2
FBADQM3
FBADQM4
FBADQM5
FBADQM6
FBADQM7

FBC_A[0..12]

P8
T9
P9
N7
N8
N9
U9
U8
Y9
W9
AC8
AC9
AA7
AA8
Y8
AA9

1

MVREFDA
MVREFSA

A32
C32
D23
E22
C14
A14
E10
D9

DDR2
GDDR5/GDDR3
DDR3

2

+1_5VRUN

L18
L20

WCKA0_0
WCKA0B_0
WCKA0_1
WCKA0B_1
WCKA1_0
WCKA1B_0
WCKA1_1
WCKA1B_1
GDDR5/DDR2/GDDR3
EDCA0_0
EDCA0_1
EDCA0_2
EDCA0_3
EDCA1_0
EDCA1_1
EDCA1_2
EDCA1_3

FBA_BA2 28,29
FBA_BA0 28,29
FBA_BA1 28,29

DQB0_0
DQB0_1
DQB0_2
DQB0_3
DQB0_4
DQB0_5
DQB0_6
DQB0_7
DQB0_8
DQB0_9
DQB0_10
DQB0_11
DQB0_12
DQB0_13
DQB0_14
DQB0_15
DQB0_16
DQB0_17
DQB0_18
DQB0_19
DQB0_20
DQB0_21
DQB0_22
DQB0_23
DQB0_24
DQB0_25
DQB0_26
DQB0_27
DQB0_28
DQB0_29
DQB0_30
DQB0_31
DQB1_0
DQB1_1
DQB1_2
DQB1_3
DQB1_4
DQB1_5
DQB1_6
DQB1_7
DQB1_8
DQB1_9
DQB1_10
DQB1_11
DQB1_12
DQB1_13
DQB1_14
DQB1_15
DQB1_16
DQB1_17
DQB1_18
DQB1_19
DQB1_20
DQB1_21
DQB1_22
DQB1_23
DQB1_24
DQB1_25
DQB1_26
DQB1_27
DQB1_28
DQB1_29
DQB1_30
DQB1_31

1

2

C6098
0.1U_6.3V_K
0402_X5R

2

R5797
100_F
0402

1

1

DVT

FBA_A0
FBA_A1
FBA_A2
FBA_A3
FBA_A4
FBA_A5
FBA_A6
FBA_A7
FBA_A8
FBA_A9
FBA_A10
FBA_A11
FBA_A12
FBA_BA2
FBA_BA0
FBA_BA1

2

40.2_F
0402

G24
J23
H24
J24
H26
J26
H21
G21
H19
H20
L13
G16
J16
H16
J17
H17

C5
C3
E3
E1
F1
F3
F5
G4
H5
H6
J4
K6
K5
L4
M6
M1
M3
M5
N4
P6
P5
R4
T6
T1
U4
V6
V1
V3
Y6
Y1
Y3
Y5
AA4
AB6
AB1
AB3
AD6
AD1
AD3
AD5
AF1
AF3
AF6
AG4
AH5
AH6
AJ4
AK3
AF8
AF9
AG8
AG7
AK9
AL7
AM8
AM7
AK1
AL4
AM6
AM1
AN4
AP3
AP1
AP5

GDDR5

R5795

FBA_A[0..12] 28,29

MAA0_0
MAA0_1
MAA0_2
MAA0_3
MAA0_4
MAA0_5
MAA0_6
MAA0_7
MAA1_0
MAA1_1
MAA1_2
MAA1_3
MAA1_4
MAA1_5
MAA1_6
MAA1_7

GDDR5

PVT
2

B

1

+1_5VRUN

FBCD0
FBCD1
FBCD2
FBCD3
FBCD4
FBCD5
FBCD6
FBCD7
FBCD8
FBCD9
FBCD10
FBCD11
FBCD12
FBCD13
FBCD14
FBCD15
FBCD16
FBCD17
FBCD18
FBCD19
FBCD20
FBCD21
FBCD22
FBCD23
FBCD24
FBCD25
FBCD26
FBCD27
FBCD28
FBCD29
FBCD30
FBCD31
FBCD32
FBCD33
FBCD34
FBCD35
FBCD36
FBCD37
FBCD38
FBCD39
FBCD40
FBCD41
FBCD42
FBCD43
FBCD44
FBCD45
FBCD46
FBCD47
FBCD48
FBCD49
FBCD50
FBCD51
FBCD52
FBCD53
FBCD54
FBCD55
FBCD56
FBCD57
FBCD58
FBCD59
FBCD60
FBCD61
FBCD62
FBCD63

1

DVT

DQA0_0
DQA0_1
DQA0_2
DQA0_3
DQA0_4
DQA0_5
DQA0_6
DQA0_7
DQA0_8
DQA0_9
DQA0_10
DQA0_11
DQA0_12
DQA0_13
DQA0_14
DQA0_15
DQA0_16
DQA0_17
DQA0_18
DQA0_19
DQA0_20
DQA0_21
DQA0_22
DQA0_23
DQA0_24
DQA0_25
DQA0_26
DQA0_27
DQA0_28
DQA0_29
DQA0_30
DQA0_31
DQA1_0
DQA1_1
DQA1_2
DQA1_3
DQA1_4
DQA1_5
DQA1_6
DQA1_7
DQA1_8
DQA1_9
DQA1_10
DQA1_11
DQA1_12
DQA1_13
DQA1_14
DQA1_15
DQA1_16
DQA1_17
DQA1_18
DQA1_19
DQA1_20
DQA1_21
DQA1_22
DQA1_23
DQA1_24
DQA1_25
DQA1_26
DQA1_27
DQA1_28
DQA1_29
DQA1_30
DQA1_31

30,31 FBCD[63..0]

2

C

C37
C35
A35
E34
G32
D33
F32
E32
D31
F30
C30
A30
F28
C28
A28
E28
D27
F26
C26
A26
F24
C24
A24
E24
C22
A22
F22
D21
A20
F20
D19
E18
C18
A18
F18
D17
A16
F16
D15
E14
F14
D13
F12
A12
D11
F10
A10
C10
G13
H13
J13
H11
G10
G8
K9
K10
G9
A8
C8
E8
A6
C6
E6
A5

1

U204D
DDR2
GDDR3/GDDR5
DDR3

1

FBAD0
FBAD1
FBAD2
FBAD3
FBAD4
FBAD5
FBAD6
FBAD7
FBAD8
FBAD9
FBAD10
FBAD11
FBAD12
FBAD13
FBAD14
FBAD15
FBAD16
FBAD17
FBAD18
FBAD19
FBAD20
FBAD21
FBAD22
FBAD23
FBAD24
FBAD25
FBAD26
FBAD27
FBAD28
FBAD29
FBAD30
FBAD31
FBAD32
FBAD33
FBAD34
FBAD35
FBAD36
FBAD37
FBAD38
FBAD39
FBAD40
FBAD41
FBAD42
FBAD43
FBAD44
FBAD45
FBAD46
FBAD47
FBAD48
FBAD49
FBAD50
FBAD51
FBAD52
FBAD53
FBAD54
FBAD55
FBAD56
FBAD57
FBAD58
FBAD59
FBAD60
FBAD61
FBAD62
FBAD63

MEMORY INTERFACE A

28,29 FBAD[0:63]
D

DDR2
GDDR5/GDDR3
DDR3

2

1

U204C
DDR2
GDDR3/GDDR5
DDR3

3

MEMORY INTERFACE B

4

2

5

Tuesday, December 29, 2009
1

Sheet

25

of

86

A

1

2

3

4

5

6

7

8

2

LVDS CONTROL

R5832
10K_J
0402

2

R5821
10K_J
0402

U204G
null

B

1

A

1

A

VARY_BL
DIGON

AK27
AJ27

ATI_BRADJ 36
LCDVCC_EN 35

TXCLK_UP_DPF3P
TXCLK_UN_DPF3N

AK35
AL36

ATI_EVEN_CLKIN+ 37
ATI_EVEN_CLKIN- 37

TXOUT_U0P_DPF2P
TXOUT_U0N_DPF2N

AJ38
AK37

ATI_EVEN_RXIN0+ 37
ATI_EVEN_RXIN0- 37

TXOUT_U1P_DPF1P
TXOUT_U1N_DPF1N

AH35
AJ36

ATI_EVEN_RXIN1+ 37
ATI_EVEN_RXIN1- 37

TXOUT_U2P_DPF0P
TXOUT_U2N_DPF0N

AG38
AH37

ATI_EVEN_RXIN2+ 37
ATI_EVEN_RXIN2- 37
ATI_EVEN_RXIN3+
ATI_EVEN_RXIN3-

1
1

TXOUT_U3P
TXOUT_U3N

AF35
AG36

TXCLK_LP_DPE3P
TXCLK_LN_DPE3N

AP34
AR34

ATI_ODD_CLKIN+ 37
ATI_ODD_CLKIN- 37

TXOUT_L0P_DPE2P
TXOUT_L0N_DPE2N

AW37
AU35

ATI_ODD_RXIN0+ 37
ATI_ODD_RXIN0- 37

TXOUT_L1P_DPE1P
TXOUT_L1N_DPE1N

AR37
AU39

ATI_ODD_RXIN1+ 37
ATI_ODD_RXIN1- 37

TXOUT_L2P_DPE0P
TXOUT_L2N_DPE0N

AP35
AR35

TXOUT_L3P
TXOUT_L3N

AN36
AP37

TP1110
TP1111

B

TXCLK =U=EVEN
TXOUT=U=EVEN
TXCLK =L=ODD
TXOUT=L=ODD

LVTMDP

C

ATI_ODD_RXIN2+ 37
ATI_ODD_RXIN2- 37
ATI_ODD_RXIN3+
ATI_ODD_RXIN3-

1
1

TP1112
TP1113

C

216-0774008

D

D

FOXCONN
Title

Size
A3

VGA (LVDS) 5/6
Document Number

2

3

4

5

6

Rev

M960&M970 H Model

Date:
1

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

Tuesday, December 29, 2009
7

Sheet

SA
26
8

of

86

4

3

2

VOLTAGE
SENESE

DPA_VDD10_1
DPA_VDD10_2

AP31
AP32

AN17
AP16
AP17
AW14
AW16

DPC_VSSR_1
DPC_VSSR_2
DPC_VSSR_3
DPC_VSSR_4
DPC_VSSR_5

DPA_VSSR_1
DPA_VSSR_2
DPA_VSSR_3
DPA_VSSR_4
DPA_VSSR_5

AN27
AP27
AP28
AW24
AW26

AP22
AP23

DPD_VDD18_1
DPD_VDD18_2

DPB_VDD18_1
DPB_VDD18_2

AP25
AP26

AP14
AP15

DPD_VDD10_1
DPD_VDD10_2

DPB_VDD10_1
DPB_VDD10_2

AN33
AP33

DPB_VSSR_1
DPB_VSSR_2
DPB_VSSR_3
DPB_VSSR_4
DPB_VSSR_5

AN29
AP29
AP30
AW30
AW32

DPD_VSSR_1
DPD_VSSR_2
DPD_VSSR_3
DPD_VSSR_4
DPD_VSSR_5

2

C214
10U_6.3V_M
0603_X5R

C6183
10U_6.3V_M
0603_X5R

C6184
10U_6.3V_M
0603_X5R

AL33
AM33

C855
1U_6.3V_M
0402_X5R

DPA_PVDD

DPE_VDD10_1
DPE_VDD10_2

DPB_PVDD
DPB_PVSS

AV29
AR28

+1_8VRUN

AN34
AP39
AR39
AU37

DPE_VSSR_1
DPE_VSSR_2
DPE_VSSR_3
DPE_VSSR_4

DPC_PVDD
DPC_PVSS

AU18
AV17

+1_8VRUN

DPD_PVDD
DPD_PVSS

AV19
AR18

+1_8VRUN

AF34
AG34

DPF_VDD18_1
DPF_VDD18_2
DPE_PVDD
DPE_PVSS

AM37
AN38

DPF_PVDD
DPF_PVSS

AL38
AM35

L89
120R-100MHZ_0402
EBMS100505A121 0.5A

(1.8V @ 20mA DPF_PVDD)

2

EVT

DPF_VDD10_1
DPF_VDD10_2

C6187
10U_6.3V_M
0603_X5R

C6185
0.1U_6.3V_K
0402_X5R

+1_0VPEG

1
2

1

1
2

1
2

1
2

C524
10U_6.3V_M
0805_X5R

For M97,Madison,Park Only,for M96 no connect.

C887
0.1U_6.3V_K
0402_X5R

EVT

EVT

C6166
0.1U_6.3V_K
0402_X5R

EVT

1

DPEF_VDD10

2

C888
1U_6.3V_M
0402_X5R

2

C906
10U_6.3V_M
0603_X5R

1

(1.1V @ 170mA DPE_VDD10)

120R-100MHZ_0402
EBMS100505A121 0.5A

2

1
2

1

C286
0.1U_6.3V_K
0402_X5R

C6170
0.1U_6.3V_K
0402_X5R

A

EVT

L2
(1.8V @ 20 mA On DIE Thermal Sensor)

C70
1U_6.3V_M
0402_X5R

1

TSVDD
1

C531
10U_6.3V_M
0603_X5R

2

2

120R-100MHZ_0402
EBMS100505A121 0.5A

2

+1_8VRUN

C6171
10U_6.3V_M
0603_X5R

1

DPLL_VDDC
1

C6174
1U_6.3V_M
0402_X5R

2

2

C124
0.1U_6.3V_K
0402_X5R

1

(1.1V @ 300mA DPLL_VDDC)

120R-100MHZ_0402
EBMS100505A121 0.5A

C158
1U_6.3V_M
0402_X5R

DPEF_VDD18
1

C6167
1U_6.3V_M
0402_X5R

2

C6168
10U_6.3V_M
0603_X5R

1

120R-100MHZ_0402
EBMS100505A121 0.5A

1

+1_0VPEG

VDD4
C292
1U_6.3V_M
0402_X5R

L10
+1_0VPEG

2

C520
1U_6.3V_M
0402_X5R

C6163
1U_6.3V_M
0402_X5R

C6236
0.1U_6.3V_K
0402_X5R

L85

1

1

C519
0.1U_6.3V_K
0402_X5R

2

1

AVDD

C521
10U_6.3V_M
0603_X5R

2

2

1

(1.8V @ 70mA AVDD)

120R-100MHZ_0402
EBMS100505A121 0.5A

1

C172
1U_6.3V_M
0402_X5R

2

C180
1U_6.3V_M
0402_X5R

DPAB_VDD18
1

C6234
1U_6.3V_M
0402_X5R

2

1

1

C6233
10U_6.3V_M
0603_X5R

L86
+1_8VRUN

B

DPE_PVDD
C885
1U_6.3V_M
0402_X5R

2

C6243
1U_6.3V_M
0402_X5R

2

1

C6242
1U_6.3V_M
0402_X5R

2

1

C652
1U_6.3V_M
0402_X5R

(1.8V @ 170mA VDD4)

120R-100MHZ_0402
EBMS100505A121 0.5A

C126
0.1U_6.3V_K
0402_X5R

2

1

C6169
1U_6.3V_M
0402_X5R

2

1

VDD1DI

2

1
2

C538
10U_6.3V_M
0603_X5R

C886
10U_6.3V_M
0603_X5R

(1.8V @ 200mA DPD_VDD18)

1

+1_8VRUN

VDD3
1

C655
10U_6.3V_M
0603_X5R

L27
+1_8VRUN

( 1.8V @ 100MA VDD1DI)

120R-100MHZ_0402
EBMS100505A121 0.5A

A39
AW1
AW39

DVT
(1.8V @ 20mA DPE_PVDD)

120R-100MHZ_0402
EBMS100505A121 0.5A

C654
0.1U_6.3V_K
0402_X5R

2

1
2

1
2

1
2

120R-100MHZ_0402
EBMS100505A121 0.5A

EVT

L7
+1_8VRUN
A

VSS_MECH_1
VSS_MECH_2
VSS_MECH_3

DVT

L84

2

C71
1U_6.3V_M
0402_X5R

SPV10

C651
1U_6.3V_M
0402_X5R

(1.8V @ 60mA VDD3)

2

1

C84
0.1U_6.3V_K
0402_X5R

2

1

A2VDDQ

2

1

C530
10U_6.3V_M
0603_X5R

NC_470R-100MHZ_1608
HCB1608KF-471T10
L57

C275
10U_6.3V_M
0603_X5R

2

+3V3_DELAY

(3.3V @ 2mA A2VDDQ)

120R-100MHZ_0402
EBMS100505A121 0.5A

2

+1_8VRUN

VDD_CORE

1

EVT
L3

+1_8VRUN

( 0.95V-1.1V @ 120mA SPV10)

470R-100MHZ_1608
HCB1608KF-471T10
L30

2 0402

C

PCIE_VDDC

L83
PCIE_VDDC

0_J

GND

216-0774008

DVT
1

C193
1U_6.3V_M
0402_X5R

(1.8V @ 20mA DPA_PVDD)

120R-100MHZ_0402
EBMS100505A121 0.5A

2

C6235
0.1U_6.3V_K
0402_X5R

L26

EVT

DVT

DPEF_CALR

GND_98
GND_99
GND_100
GND_101
GND_102
GND_103
GND_104
GND_105
GND_106
GND_107
GND_108
GND_109
GND_110
GND_111
GND_112
GND_113
GND_114
GND_115
GND_116
GND_117
GND_118
GND_119
GND_120
GND_121
GND_122
GND_123
GND_124
GND_125
GND_126
GND_127
GND_128
GND_129
GND_130
GND_131
GND_132
GND_133
GND_134
GND_135
GND_136
GND_137
GND_138
GND_139
GND_140
GND_141
GND_142
GND_143
GND_144
GND_145
GND_146
GND_147
GND_148
GND_149
GND_151
GND_152
GND_153
GND_154
GND_155
GND_156
GND_157
GND_158
GND_159
GND_161
GND_162
GND_163
GND_164
GND_165
GND_166
GND_167
GND_168
GND_169
GND_170
GND_171
GND_172
GND_173
GND_150
GND_160

For M96/M92 PEG = 1.1V
For M97,Madison and Park PEG = 1.0V

2

1

C578
0.1U_6.3V_K
0402_X5R

2

1
2

C6232
1U_6.3V_M
0402_X5R

DPF_PVDD

These pins only for madison-m2 and park-m2,
for M97-M2 and M96 these pins NC.

DPF_VSSR_1
DPF_VSSR_2
DPF_VSSR_3
DPF_VSSR_4
DPF_VSSR_5

XO_IN: 27MHz (3.3V tolerant) oscillator clock input.
Can be connected to ground if unused.
XO_IN2: 100MHz (3.3V tolerant) oscillator clock input.
Can be connected to ground if unused.
Recommended Clock Inputs Configuration – GDDR3/DDR3
a) 27MHz (± 30 ppm) crystal connected to XTALIN/XTALOUT, or
b) 27MHz (1.8V) oscillator connected to XTALIN, or
c) 27MHz (3.3V) oscillator connected to XO_IN (Park,
Madison, and Broadway
only)

2

C6228
1U_6.3V_M
0402_X5R

1

1

C6227
1U_6.3V_M
0402_X5R

2

C6230
1U_6.3V_M
0402_X5R

2

2

1

C6160
0.1U_6.3V_K
0402_X5R

+1_8VRUN
1

C6231
1U_6.3V_M
0402_X5R

DPE_PVDD

DPF_PVDD = 1.8V @ 20mA

R5811 1

DPF_PVDD
C6186
1U_6.3V_M
0402_X5R

EVT

216-0774008

DPA_PVDD
C857
0.1U_6.3V_K
0402_X5R

PCIE_VDDR

2

1
2

1
2

1
2

C572
1U_6.3V_M
0402_X5R

EVT

AU28
AV27

L92

C571
10U_6.3V_M
0603_X5R

DPAB_VDD10

DP PLL POWER
DPA_PVDD
DPA_PVSS

1 R5827 2 AM39
150_F
0402

F15
F17
F19
F21
F23
F25
F27
F29
F31
F33
F7
F9
G2
G6
H9
J2
J27
J6
J8
K14
K7
L11
L17
L2
L22
L24
L6
M17
M22
M24
N16
N18
N2
N21
N23
N26
N6
R15
R17
R2
R20
R22
R24
R27
R6
T11
T13
T16
T18
T21
T23
T26
U15
U17
U2
U20
U22
U24
U27
U6
V11
V16
V18
V21
V23
V26
W2
W6
Y15
Y17
Y20
Y22
Y24
Y27
U13
V13

DPAB_VDD18

(PCIE_VDDC 1.1V @ 1920mA )

(1.8V @ 500mA PCIE_VDDR)

220R-100MHZ_0603
FCM1608KF-221T05

DPAB_VDD10

AW28 1 R5825 2
150_F
0402

DPAB_CALR

DP E/F POWER
DPE_VDD18_1
DPE_VDD18_2

For M97,Madison and Park(GDDR3/DDR3 1.12V@4A VDDCI)
For M96/92, 0.95V-1.1V@2A VDDCI

1

C6159
10U_6.3V_M
0603_X5R

DPCD_CALR

AH34
AJ34

AF39
AH39
AK39
AL34
AM34

VDD_CORE
C6175
C6176
C6177
C232
C231
C6178
C6179
C6180
C6181
C6182
1U_6.3V_M 1U_6.3V_M 1U_6.3V_M 1U_6.3V_M 1U_6.3V_M 1U_6.3V_M 1U_6.3V_M 1U_6.3V_M 1U_6.3V_M 1U_6.3V_M
L22
0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R 0402_X5R VDDCI
120R-100MHZ_0603
ACMS160808A121 RDC05

L52
+1_8VRUN

DPAB_VDD18

1

1
1
2
1

DPC_VDD10_1
DPC_VDD10_2

L5

2

1

AP13
AT13

AK33
AK34

DPEF_VDD10

1

1

1

EVT

C585
0.1U_6.3V_K
0402_X5R

2

1
2

1
2

1
2

C6229
1U_6.3V_M
0402_X5R

2

1
2

DPEF_VDD18

VDD_CT

C6161
1U_6.3V_M
0402_X5R

AN24
AP24

2

1
2

1
2

For M97/M96, DPF_VDD18 can be shared with DPE_VDD18
For M97/M96, DPF_VDD10 can be shared with DPE_VDD10

120R-100MHZ_0603
ACMS160808A121 RDC05
C6162
10U_6.3V_M
0603_X5R

2

1
2
1
2

1
2
1
2

2
1
2

1
2

1
2

1
2

1

DPEF_VDD10

+1_8VRUN

(1.8V @ 110MA VDD_CT)

120R-100MHZ_0402
EBMS100505A121 0.5A

2

1

1
2

2
1

1
2
1
2

1
2
1
2

1
2
1

2
1
2

2

1

1
2
1
2
1
2

2
1
2

EVT

EVT

L17
+1_8VRUN

DPA_VDD18_1
DPA_VDD18_2

AN19
AP18
AP19
AW20
AW22

EVT

PCIE_PVDD

C586
1U_6.3V_M
0402_X5R

2

1

C584
10U_6.3V_M
0603_X5R

DPC_VDD18_1
DPC_VDD18_2

1 R5824 2 AW18
150_F
0402

(1.8V @ 20mA DPA_PVDD)

120R-100MHZ_0402
EBMS100505A121 0.5A

C6200
10U_6.3V_M
0603_X5R

(1.8V @ 40MA PCIE_PVDD)

120R-100MHZ_0402
EBMS100505A121 0.5A

2

+1_8VRUN

2

C569
0.1U_6.3V_K
0402_X5R

+1_0VPEG

C6294
22P_50V_J
0402_NPO

L53
1

DPAB_VDD10
1

C555
1U_6.3V_M
0402_X5R

2

1

C543
10U_6.3V_M
0603_X5R

2

1

120R-100MHZ_0402
EBMS100505A121 0.5A

2

+1_0VPEG

2

1

1
2

1

1
2

2

2

1

1
2

1
2
1
2

1

C6226
10U_6.3V_M
0805_X5R

L48
(1.1V @ 200 mA DPA_VDD10)

C6223
10U_6.3V_M
0805_X5R

DPEF_VDD18

2

1

C6199
1U_6.3V_M
0402_X5R

2

1

SPV18

C6197
0.1U_6.3V_K
0402_X5R

C6219
1U_6.3V_M
0402_X5R

DP A/B POWER

AP20
AP21

L79
+1_8VRUN

(1.8V@75mA SPV18)

470R-100MHZ_1608
HCB1608KF-471T10

2

B

216-0774008

M97, Broadway, Madison and Park only.

L91
+1_8VRUN

2

C6193
0.1U_6.3V_K
0402_X5R

1

1
2

1

C6192
0.1U_6.3V_K
0402_X5R

+1_0VPEG

2

FB_GND

C6148
1U_6.3V_M
0402_X5R

C6218
1U_6.3V_M
0402_X5R

1

FB_VDDCI

AH29

U204H
null
DP C/D POWER

C6134
1U_6.3V_M
0402_X5R

C6146
1U_6.3V_M
0402_X5R

2

AG28

DVT

MPV18

C6195
1U_6.3V_M
0402_X5R

2

1

C6194
1U_6.3V_M
0402_X5R

2

1

C6196
10U_6.3V_M
0603_X5R

2

1

(Park: 1.8V@75mA MPV18)
(M97, Broadway and Madison: 1.8V@150mA MPV18)

2

470R-100MHZ_1608
HCB1608KF-471T10

NC_0_J 2 0402

DVT

L90
+1_8VRUN

R5815 1

FB_VDDC

C6225
10U_6.3V_M
0805_X5R

1

Place all decoupling caps close to the ASIC and RUN
dedicated traces from ASIC pins to join the ground
plane with one VIA at the cap

AF28

C6224
10U_6.3V_M
0805_X5R

2

DVT

C6133
1U_6.3V_M
0402_X5R

For RF noise

1

DVT

C6222
10U_6.3V_M
0805_X5R

2

SPVSS

AA13
AB13
AC12
AC15
AD13
AD16
M15
M16
M18
M23
N13
N15
N17
N20
N22
R12
R13
R16
T12
T15
V15
Y13

C6147
10U_6.3V_M
0805_X5R

1

AN10

VDDCI_1
VDDCI_2
VDDCI_3
VDDCI_4
VDDCI_5
VDDCI_6
VDDCI_7
VDDCI_8
VDDCI_9
VDDCI_10
VDDCI_11
VDDCI_12
VDDCI_13
VDDCI_14
ISOLATED VDDCI_15
CORE I/O VDDCI_16
VDDCI_17
VDDCI_18
VDDCI_19
VDDCI_20
VDDCI_21
VDDCI_22

C6217
1U_6.3V_M
0402_X5R

2

SPV10

C6221
1U_6.3V_M
0402_X5R

C6145
1U_6.3V_M
0402_X5R

1

SPV18

AN9

C6144
1U_6.3V_M
0402_X5R

1

AM10

SPV10

C6132
1U_6.3V_M
0402_X5R

2

SPV18

C6141
10U_6.3V_M
0805_X5R

1

L77
VDDRHB
VDDRHB
NC_120R-100MHZ_0402
EBMS100505A121 0.5A
C6158
NC_1U_6.3V_M
0402_X5R
1

+1_5VRUN

MPV18_1
MPV18_2

C6129
10U_6.3V_M
0805_X5R

2

2

(For M96 SPV10 = VDDC)
(For M97, Broadway, Madison and Park
SPV10 = PCIE_VDDC)

H7
H8

C6123
10U_6.3V_M
0805_X5R

1

VDDRHA
VDDRHA
NC_120R-100MHZ_0402
EBMS100505A121 0.5A
C6155
NC_1U_6.3V_M
0402_X5R
1

+1_5VRUN

PCIE_PVDD

C6220
1U_6.3V_M
0402_X5R

2

L76

AB37

C6135
10U_6.3V_M
0805_X5R

1

M96/92 ONLY

PLL

C6143
1U_6.3V_M
0402_X5R

C6154
1U_6.3V_M
0402_X5R

2

MPV18:
(Park: 1.8V@75mA MPV18)
(M97, Broadway and Madison: 1.8V@150mA MPV18)
For M96 no connect.
PCIE_PVDD
SPV18:
M97, Broadway, Madison and Park only.
MPV18
For M96 no connect.

C6152
1U_6.3V_M
0402_X5R

C6140
1U_6.3V_M
0402_X5R

1

Optional RC network
to fine tune power sequence

C6139
1U_6.3V_M
0402_X5R

2

NC_VDDRHB
NC_VSSRHB

C6131
1U_6.3V_M
0402_X5R

DPCD_VDD18

1

V12
U12

C6151
1U_6.3V_M
0402_X5R

1

VDDRHB

C6150
1U_6.3V_M
0402_X5R

2

NC_VDDRHA
NC_VSSRHA

C6130
1U_6.3V_M
0402_X5R

D

R5816

M20
M21

2

VDDRHA

C6149
1U_6.3V_M
0402_X5R

C6138
1U_6.3V_M
0402_X5R

1

2N7002W
null

C6128
1U_6.3V_M
0402_X5R

A3
A37
AA16
AA18
AA2
AA21
AA23
AA26
AA28
AA6
AB12
AB15
AB17
AB20
AB22
AB24
AB27
AC11
AC13
AC16
AC18
AC2
AC21
AC23
AC26
AC28
AC6
AD15
AD17
AD20
AD22
AD24
AD27
AD9
AE2
AE6
AF10
AF16
AF18
AF21
AG17
AG2
AG20
AG22
AG6
AG9
AH21
AJ10
AJ11
AJ2
AJ28
AJ6
AK11
AK31
AK7
AL11
AL14
AL17
AL2
AL20
AL21
AL23
AL26
AL32
AL6
AL8
AM11
AM31
AM9
AN11
AN2
AN30
AN6
AN8
AP11
AP7
AP9
AR5
B11
B13
B15
B17
B19
B21
B23
B25
B27
B29
B31
B33
B7
B9
C1
C39
E35
E5
F11
F13

0_J

2

S

C6137
1U_6.3V_M
0402_X5R

2

G

C6136
1U_6.3V_M
0402_X5R

2

1

C6127
1U_6.3V_M
0402_X5R

DPCD_VDD18

1

2 0402
C6153
0.1U_16V_M
0402_X5R

VDDR4_1
VDDR4_2
VDDR4_3
VDDR4_6

C6126
1U_6.3V_M
0402_X5R

2

3
R5826 1 75K_J

RUN_ON1

1

39,75,76,77,80,81
C

AD12
AF11
AF12
AG11

DVT

Q77

DPCD_VDD18
2 0402

0_J

GND_1
GND_2
GND_3
GND_4
GND_5
GND_6
GND_7
GND_8
GND_9
GND_10
GND_11
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
GND_18
GND_19
GND_20
GND_21
GND_22
GND_23
GND_24
GND_25
GND_26
GND_27
GND_28
GND_29
GND_30
GND_31
GND_32
GND_33
GND_34
GND_35
GND_36
GND_37
GND_38
GND_39
GND_40
GND_41
GND_42
GND_43
GND_44
GND_45
GND_46
GND_47
GND_48
GND_49
GND_50
GND_51
GND_52
GND_53
GND_54
GND_55
GND_56
GND_57
GND_58
GND_59
GND_60
PX_EN
GND_61
GND_62
GND_63
GND_64
GND_65
GND_66
GND_67
GND_68
GND_69
GND_70
GND_71
GND_72
GND_73
GND_74
GND_75
GND_76
GND_77
GND_78
GND_79
GND_80
GND_81
GND_82
GND_83
GND_84
GND_85
GND_86
GND_87
GND_88
GND_89
GND_90
GND_91
GND_92
GND_93
GND_94
GND_95
GND_96
GND_97

PCIE_VSS_1
PCIE_VSS_2
PCIE_VSS_3
PCIE_VSS_4
PCIE_VSS_5
PCIE_VSS_6
PCIE_VSS_7
PCIE_VSS_8
PCIE_VSS_9
PCIE_VSS_10
PCIE_VSS_11
PCIE_VSS_12
PCIE_VSS_13
PCIE_VSS_14
PCIE_VSS_15
PCIE_VSS_16
PCIE_VSS_17
PCIE_VSS_18
PCIE_VSS_19
PCIE_VSS_20
PCIE_VSS_21
PCIE_VSS_22
PCIE_VSS_23
PCIE_VSS_24
PCIE_VSS_25
PCIE_VSS_26
PCIE_VSS_27
PCIE_VSS_28
PCIE_VSS_29
PCIE_VSS_30
PCIE_VSS_31
PCIE_VSS_32
PCIE_VSS_33
PCIE_VSS_34
PCIE_VSS_35

0402

D

C6125
1U_6.3V_M
0402_X5R

2

VDDR4_4
VDDR4_5
VDDR4_7
VDDR4_8

C6124
1U_6.3V_M
0402_X5R

1

G
Q76
CHT2301PT

2

1

R5823
100K_J
0402

+1_8VRUN
R5812 1
VDD_CORE

2

VDD4

AF13
AF15
AG13
AG15

+3V3_DELAY

AA15
AA17
AA20
AA22
AA24
AA27
AB16
AB18
AB21
AB23
AB26
AB28
AC17
AC20
AC22
AC24
AC27
AD18
AD21
AD23
AD26
AF17
AF20
AF22
AG16
AG18
AG21
AH22
AH27
AH28
M26
N24
N27
R18
R21
R23
R26
T17
T20
T22
T24
T27
U16
U18
U21
U23
U26
V17
V20
V22
V24
V27
Y16
Y18
Y21
Y23
Y26
Y28

DVT

1

VDDR3_1
VDDR3_2
VDDR3_3
VDDR3_4

VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDDC_23
VDDC_24
VDDC_25
VDDC_26
VDDC_27
VDDC_28
VDDC_29
VDDC_30
VDDC_31
VDDC_32
BIF_VDDC_1
VDDC_33
VDDC_34
VDDC_35
VDDC_36
VDDC_37
VDDC_38
VDDC_39
VDDC_40
BIF_VDDC_2
VDDC_41
VDDC_42
VDDC_43
VDDC_44
VDDC_45
VDDC_46
VDDC_47
VDDC_48
VDDC_49
VDDC_50
VDDC_51
VDDC_52
VDDC_53
VDDC_54
VDDC_55
VDDC_56

AB39
E39
F34
F39
G33
G34
H31
H34
H39
J31
J34
K31
K34
K39
L31
L34
M34
M39
N31
N34
P31
P34
P39
R34
T31
T34
T39
U31
U34
V34
V39
W31
W34
Y34
Y39

For M96/M92 PCIE_VDDC = 1.1V
For M97,Madison and Park PCIE_VDDC = 1.0V

PCIE_VDDC

2

D

3

AF23
AF24
AG23
AG24

1

S

2

+3VRUN

VDD3

U204F
null

1

VDD_CT_1
VDD_CT_2
VDD_CT_3
VDD_CT_4
I/O

R5822 1 NC_0_J 2 0603

G30
G31
H29
H30
J29
J30
L28
M28
N28
R28
T28
U28

POWER

AF26
AF27
AG26
AG27

VDD_CT

PCIE_VDDC_1
PCIE_VDDC_2
PCIE_VDDC_3
PCIE_VDDC_4
PCIE_VDDC_5
PCIE_VDDC_6
PCIE_VDDC_7
PCIE_VDDC_8
PCIE_VDDC_9
PCIE_VDDC_10
PCIE_VDDC_11
PCIE_VDDC_12

CORE

LEVEL
TRANSLATION

Co-lay for R5822 and Q76 pin2,3

AA31
AA32
AA33
AA34
V28
W29
W30
Y31

1

C6109
10U_6.3V_M
0805_X5R

PCIE_VDDR_1
PCIE_VDDR_2
PCIE_VDDR_3
PCIE_VDDR_4
PCIE_VDDR_5
PCIE_VDDR_6
PCIE_VDDR_7
PCIE_VDDR_8

2

C6112
1U_6.3V_M
0402_X5R

1

PCIE

VDDR1_1
VDDR1_2
VDDR1_3
VDDR1_4
VDDR1_5
VDDR1_6
VDDR1_7
VDDR1_8
VDDR1_9
VDDR1_10
VDDR1_11
VDDR1_12
VDDR1_13
VDDR1_14
VDDR1_15
VDDR1_16
VDDR1_17
VDDR1_18
VDDR1_19
VDDR1_20
VDDR1_21
VDDR1_22
VDDR1_23
VDDR1_24
VDDR1_25
VDDR1_26
VDDR1_27
VDDR1_28
VDDR1_29
VDDR1_30
VDDR1_31
VDDR1_32
VDDR1_33
VDDR1_34

1

C6108
10U_6.3V_M
0805_X5R

AC7
AD11
AF7
AG10
AJ7
AK8
AL9
G11
G14
G17
G20
G23
G26
G29
H10
J7
J9
K11
K13
K8
L12
L16
L21
L23
L26
L7
M11
N11
P7
R11
U11
U7
Y11
Y7

C6213
0.1U_6.3V_K
0402_X5R

2

PCIE_VDDR

2

1
2
1
2

C6111
1U_6.3V_M
0402_X5R

1

1

C6205
0.1U_6.3V_K
0402_X5R

2

C6116
10U_6.3V_M
0805_X5R

2
1

C6117
1U_6.3V_M
0402_X5R

2

1
2
1
2

C6204
0.1U_6.3V_K
0402_X5R

1

C6115
10U_6.3V_M
0805_X5R

U204E
null
MEM I/O

2

2
1
2

C6110
1U_6.3V_M
0402_X5R

1

C6216
10U_6.3V_M
0805_X5R

2

C6114
1U_6.3V_M
0402_X5R

C6212
0.1U_6.3V_K
0402_X5R

2

1
2
1

C6118
1U_6.3V_M
0402_X5R

2

1
2

1

D

C6211
0.1U_6.3V_K
0402_X5R

1

C6113
1U_6.3V_M
0402_X5R

C6210
0.1U_6.3V_K
0402_X5R

2

C6107
1U_6.3V_M
0402_X5R

1

1
1

2

C6209
0.1U_6.3V_K
0402_X5R

2

2

C6208
0.1U_6.3V_K
0402_X5R

2

1
1

2

1
1

C6215
1U_6.3V_M
0402_X5R

2

2

C6214
1U_6.3V_M
0402_X5R

C6207
0.1U_6.3V_K
0402_X5R

2

1
1

2

C6206
0.1U_6.3V_K
0402_X5R

1

VDDR1+VDDRHA
M71-S 1.1A(GDDR3 VRAM)

1

5

+1_5VRUN

C83
0.1U_6.3V_K
0402_X5R

L50
1

DPLL_PVDD
C552
1U_6.3V_M
0402_X5R

2

1

C542
10U_6.3V_M
0603_X5R

2

1

(1.8V @ 120mA DPLL_PVDD)

120R-100MHZ_0402
EBMS100505A121 0.5A

2

+1_8VRUN

C564
0.1U_6.3V_K
0402_X5R

FOXCONN

EVT

Title

Size
Custom
Date:
5

4

3

2

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

VGA (Power) 6/6
Document Number

Rev

M960&M970 H Model
Tuesday, December 29, 2009
1

Sheet

SA
27

of

86

1

2

3

4

5

6

7

8

+1_5VRUN
+1_5VRUN
U206

BA0
BA1
BA2

FBA_CKEA0
FBA_CLK0
FBA_CLK0#

K9
J7
K7

25

FBA_CKEA0

CKE
CK
CK#

25
25

FBA_CLK0
FBA_CLK0#

MEM_RST#
FBA_ODTA0
ZQ1

FBA_ODTA0

1

25

25

FBADQM[0..3]

C

25 FBARDQS[3..0]

FBAD[8:15]

FBAD12
FBAD11
FBAD13
FBAD8
FBAD14
FBAD10
FBAD15
FBAD9
FBADQM1
FBARDQS1
FBAWDQS1

243_F
0402

NC_4
NC_5
NC_6
NC_7

T2
K1
L8

RESET#
ODT
ZQ

E3
F7
F2
F8
H3
H8
G2
H7
E7
F3
G3

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DML
DQSL
DQSL#

D7
C3
C8
C2
A7
A2
B8
A3
D3
C7
B7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
DMU
DQSU
DQSU#

G9
G1
F9
E8
E2
D8
D1
B9
B1

VSS_12
VSS_11
VSS_10
VSS_9
VSS_8
VSS_7
VSS_6
VSS_5
VSS_4
VSS_3
VSS_2
VSS_1

T9
T1
P9
P1
M9
M1
J8
J2
G8
E1
B3
A9

FBADQM0
FBADQM1
FBADQM2
FBADQM3

25

FBAD0
FBAD7
FBAD3
FBAD6
FBAD2
FBAD4
FBAD1
FBAD5
FBADQM0
FBARDQS0
FBAWDQS0

FBARDQS0
FBARDQS1
FBARDQS2
FBARDQS3

+1_5VRUN

EVT

R4066

H1 VRAM_VREF_DQ1
M8 VRAM_VREF_CA1

4.99K_F
0402

4.99K_F
0402

25

FBAWDQS0
FBAWDQS1
FBAWDQS2
FBAWDQS3

FBAD[24:31]

243_F
0402

DVT

BA0
BA1
BA2

FBA_CKEA0 K9
FBA_CLK0
J7
FBA_CLK0# K7

CKE
CK
CK#

J1
L1
J9
L9

NC_4
NC_5
NC_6
NC_7

T2
K1
L8

RESET#
ODT
ZQ

FBAD28
FBAD24
FBAD29
FBAD25
FBAD31
FBAD26
FBAD30
FBAD27
FBADQM3
FBARDQS3
FBAWDQS3

E3
F7
F2
F8
H3
H8
G2
H7
E7
F3
G3

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DML
DQSL
DQSL#

FBAD17
FBAD21
FBAD18
FBAD22
FBAD16
FBAD20
FBAD19
FBAD23
FBADQM2
FBARDQS2
FBAWDQS2

D7
C3
C8
C2
A7
A2
B8
A3
D3
C7
B7

A

VDD_9
VDD_8
VDD_7
VDD_6
VDD_5
VDD_4
VDD_3
VDD_2
VDD_1

K2
R9
R1
N9
N1
K8
G7
D9
B2

VDDQ_9
VDDQ_8
VDDQ_7
VDDQ_6
VDDQ_5
VDDQ_4
VDDQ_3
VDDQ_2
VDDQ_1

H9
H2
F1
E9
D2
C9
C1
A8
A1

VSSQ_9
VSSQ_8
VSSQ_7
VSSQ_6
VSSQ_5
VSSQ_4
VSSQ_3
VSSQ_2
VSSQ_1

G9
G1
F9
E8
E2
D8
D1
B9
B1

VSS_12
VSS_11
VSS_10
VSS_9
VSS_8
VSS_7
VSS_6
VSS_5
VSS_4
VSS_3
VSS_2
VSS_1

T9
T1
P9
P1
M9
M1
J8
J2
G8
E1
B3
A9

VREFDQ
VREFCA

+1_5VRUN

B

H1 VRAM_VREF_DQ1
M8 VRAM_VREF_CA1
C

25

SDRAM_FBGA-96P_1GB
H5TQ1G63BFR-12C

FBAD[16:23]

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
DMU
DQSU
DQSU#
SDRAM_FBGA-96P_1GB
H5TQ1G63BFR-12C

EVT
FBA_CLK0

1

25 FBAWDQS[3..0]

M2
N8
M3

MEM_RST#
FBA_ODTA0

R4027

FBAD[0:7]

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

ZQ2

R4028

VREFDQ
VREFCA

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

FBA_BA0
FBA_BA1
FBA_BA2

1

2

R4062 25

J1
L1
J9
L9

VSSQ_9
VSSQ_8
VSSQ_7
VSSQ_6
VSSQ_5
VSSQ_4
VSSQ_3
VSSQ_2
VSSQ_1

RAS#
CAS#
WE#
CS#

1

M2
N8
M3

2

FBA_BA0
FBA_BA1
FBA_BA2

H9
H2
F1
E9
D2
C9
C1
A8
A1

1

FBA_BA0
FBA_BA1
FBA_BA2

VDDQ_9
VDDQ_8
VDDQ_7
VDDQ_6
VDDQ_5
VDDQ_4
VDDQ_3
VDDQ_2
VDDQ_1

J3
K3
L3
L2

FBA_A0
FBA_A1
FBA_A2
FBA_A3
FBA_A4
FBA_A5
FBA_A6
FBA_A7
FBA_A8
FBA_A9
FBA_A10
FBA_A11
FBA_A12
FBA_A13

+1_5VRUN

2

25,29,30,31 MEM_RST#

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

U207
FBA_RASA0#
FBA_CASA0#
FBA_WEA0#
FBA_CSA0_0#

2

B

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

FBA_A0
FBA_A1
FBA_A2
FBA_A3
FBA_A4
FBA_A5
FBA_A6
FBA_A7
FBA_A8
FBA_A9
FBA_A10
FBA_A11
FBA_A12
FBA_A13

VDD_9
VDD_8
VDD_7
VDD_6
VDD_5
VDD_4
VDD_3
VDD_2
VDD_1

2

25,29
25,29
25,29

RAS#
CAS#
WE#
CS#

K2
R9
R1
N9
N1
K8
G7
D9
B2

1

25 FBA_RASA0#
25 FBA_CASA0#
25 FBA_WEA0#
25 FBA_CSA0_0#
25,29 FBA_A[0..13]

A

J3
K3
L3
L2

C4036
0.01U_10V_K
0402_X7R

FBA_RASA0#
FBA_CASA0#
FBA_WEA0#
FBA_CSA0_0#

+1_5VRUN

R5874

1

EVT
4.99K_F
0402

D

R5875

2

0.01U_10V_K

2

4.99K_F
0402

C4028 0402_X7R
2
1

1

VRAM_VREF_DQ1
R4019

56_F
0402
C6303 0.01U_10V_K 0402_X7R
1
2

1

2

D

2

R4030

DVT

56_F
0402

HAI PRECISION IND. CO., LTD.
FOXCONN HON
CPBG - R&D Division

Title

FBA_CLK0#

DVT

Size
A3
Date:

1

2

3

4

5

6

VRAM(DDR)# 1/4
Document Number

Rev

M960&M970 H Model
Tuesday, December 29, 2009
7

Sheet

SA
28
8

of

86

5

4

3

2

1

+1_5VRUN

+1_5VRUN

U208

FBA_BA0
FBA_BA1
FBA_BA2

M2
N8
M3

BA0
BA1
BA2

FBA_CLK1
FBA_CLK1#

K9
J7
K7

FBA_CKEA1

FBA_CKEA1

25
25

C

FBA_CLK1
FBA_CLK1#

J1
L1
J9
L9

NC_4
NC_5
NC_6
NC_7

T2
K1
L8

RESET#
ODT
ZQ

FBAD39
FBAD32
FBAD36
FBAD33
FBAD38
FBAD35
FBAD37
FBAD34
FBADQM4
FBARDQS4
FBAWDQS4

E3
F7
F2
F8
H3
H8
G2
H7
E7
F3
G3

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DML
DQSL
DQSL#

FBAD44
FBAD45
FBAD42
FBAD43
FBAD40
FBAD46
FBAD41
FBAD47
FBADQM5
FBARDQS5
FBAWDQS5

D7
C3
C8
C2
A7
A2
B8
A3
D3
C7
B7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
DMU
DQSU
DQSU#

MEM_RST#

25,28,30,31 MEM_RST#

FBA_ODTA1
ZQ3

FBA_ODTA1

1

25

CKE
CK
CK#

25

FBADQM[4:7]

FBADQM4
FBADQM5
FBADQM6
FBADQM7

B

25 FBARDQS[4:7]

FBAD[32:39]

243_F
0402

25

FBAD[40:47]

FBARDQS4
FBARDQS5
FBARDQS6
FBARDQS7

25 FBAWDQS[4:7]

G9
G1
F9
E8
E2
D8
D1
B9
B1

VSS_12
VSS_11
VSS_10
VSS_9
VSS_8
VSS_7
VSS_6
VSS_5
VSS_4
VSS_3
VSS_2
VSS_1

T9
T1
P9
P1
M9
M1
J8
J2
G8
E1
B3
A9

FBAWDQS4
FBAWDQS5
FBAWDQS6
FBAWDQS7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

M2
N8
M3

BA0
BA1
BA2

FBA_CKEA1 K9
FBA_CLK1
J7
FBA_CLK1# K7

CKE
CK
CK#

J1
L1
J9
L9

NC_4
NC_5
NC_6
NC_7

T2
K1
L8

RESET#
ODT
ZQ

FBAD53
FBAD52
FBAD54
FBAD48
FBAD50
FBAD49
FBAD55
FBAD51
FBADQM6
FBARDQS6
FBAWDQS6

E3
F7
F2
F8
H3
H8
G2
H7
E7
F3
G3

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DML
DQSL
DQSL#

FBAD56
FBAD60
FBAD59
FBAD61
FBAD57
FBAD63
FBAD58
FBAD62
FBADQM7
FBARDQS7
FBAWDQS7

D7
C3
C8
C2
A7
A2
B8
A3
D3
C7
B7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
DMU
DQSU
DQSU#

MEM_RST#
FBA_ODTA1
ZQ4
+1_5VRUN

R4070
243_F
0402

R4047

VREFDQ
VREFCA

RAS#
CAS#
WE#
CS#

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

FBA_BA0
FBA_BA1
FBA_BA2

H1 VRAM_VREF_DQ2
M8 VRAM_VREF_CA2
1

2

25
R4068

VSSQ_9
VSSQ_8
VSSQ_7
VSSQ_6
VSSQ_5
VSSQ_4
VSSQ_3
VSSQ_2
VSSQ_1

+1_5VRUN

R4048
4.99K_F
0402

2

25

FBA_BA0
FBA_BA1
FBA_BA2

FBA_A0
FBA_A1
FBA_A2
FBA_A3
FBA_A4
FBA_A5
FBA_A6
FBA_A7
FBA_A8
FBA_A9
FBA_A10
FBA_A11
FBA_A12
FBA_A13

25

FBAD[48:55]

4.99K_F
0402

C4038
0.1U_6.3V_K
0402_X5R

25

2

25,28
25,28
25,28

VDDQ_9
VDDQ_8
VDDQ_7
VDDQ_6
VDDQ_5
VDDQ_4
VDDQ_3
VDDQ_2
VDDQ_1

H9
H2
F1
E9
D2
C9
C1
A8
A1

FBA_RASA1#
J3
FBA_CASA1#
K3
FBA_WEA1# L3
FBA_CSA1_0# L2

1

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

K2
R9
R1
N9
N1
K8
G7
D9
B2

2

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

FBA_A0
FBA_A1
FBA_A2
FBA_A3
FBA_A4
FBA_A5
FBA_A6
FBA_A7
FBA_A8
FBA_A9
FBA_A10
FBA_A11
FBA_A12
FBA_A13

U209

VDD_9
VDD_8
VDD_7
VDD_6
VDD_5
VDD_4
VDD_3
VDD_2
VDD_1

1

RAS#
CAS#
WE#
CS#

2

J3
K3
L3
L2

1

FBA_RASA1#
FBA_CASA1#
FBA_WEA1#
FBA_CSA1_0#

25 FBA_RASA1#
25 FBA_CASA1#
25 FBA_WEA1#
25 FBA_CSA1_0#
25,28 FBA_A[0:13]

D

FBAD[56:63]

SDRAM_FBGA-96P_1GB
H5TQ1G63BFR-12C

VDD_9
VDD_8
VDD_7
VDD_6
VDD_5
VDD_4
VDD_3
VDD_2
VDD_1

K2
R9
R1
N9
N1
K8
G7
D9
B2

VDDQ_9
VDDQ_8
VDDQ_7
VDDQ_6
VDDQ_5
VDDQ_4
VDDQ_3
VDDQ_2
VDDQ_1

H9
H2
F1
E9
D2
C9
C1
A8
A1

VSSQ_9
VSSQ_8
VSSQ_7
VSSQ_6
VSSQ_5
VSSQ_4
VSSQ_3
VSSQ_2
VSSQ_1

G9
G1
F9
E8
E2
D8
D1
B9
B1

VSS_12
VSS_11
VSS_10
VSS_9
VSS_8
VSS_7
VSS_6
VSS_5
VSS_4
VSS_3
VSS_2
VSS_1

T9
T1
P9
P1
M9
M1
J8
J2
G8
E1
B3
A9

VREFDQ
VREFCA

D

+1_5VRUN

C

H1 VRAM_VREF_DQ2
M8 VRAM_VREF_CA2

B

SDRAM_FBGA-96P_1GB
H5TQ1G63BFR-12C
FBA_CLK1

1

1

+1_5VRUN

R5876

2

R4032

2

4.99K_F
0402

DVT

1
1

1

VRAM_VREF_DQ2
A

56_F
0402
C6304 0.01U_10V_K 0402_X7R
1
2

A

R5877

2

C4031
0.1U_6.3V_K
0402_X5R

2

2

R4021
4.99K_F
0402

56_F
0402

HAI PRECISION IND. CO., LTD.
FOXCONN HON
CPBG - R&D Division

FBA_CLK1#

Title

VRAM(DDR)# 2/4
Size
A3
Date:
5

4

3

2

Document Number

Rev

M960&M970 H Model

SA

Tuesday, December 29, 2009

Sheet
1

29

of

86

1

2

3

4

5

6

7

8

+1_5VRUN
+1_5VRUN
U210

FBC_BA0
FBC_BA1
FBC_BA2

M2
N8
M3

BA0
BA1
BA2

FBC_CKEB0

FBC_CLK0
FBC_CLK0#

K9
J7
K7

CKE
CK
CK#

J1
L1
J9
L9

NC_4
NC_5
NC_6
NC_7

T2
K1
L8

RESET#
ODT
ZQ

FBC_CKEB0
25
25

FBC_CLK0
FBC_CLK0#

B

25,28,29,31 MEM_RST#

MEM_RST#
FBC_ODTB0

FBC_ODTB0

ZQ5

1

25

25 FBCDQM[0:3]

25 FBCRDQS[0:3]

C

25 FBCWDQS[0:3]

FBCDQM0
FBCDQM1
FBCDQM2
FBCDQM3

FBCD[24:31]

FBCD29E3
FBCD27 F7
FBCD28 F2
FBCD24 F8
FBCD30H3
FBCD25H8
FBCD31G2
FBCD26H7
FBCDQM3
E7
FBCRDQS3 F3
FBCWDQS3 G3

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DML
DQSL
DQSL#

G9
G1
F9
E8
E2
D8
D1
B9
B1

VSS_12
VSS_11
VSS_10
VSS_9
VSS_8
VSS_7
VSS_6
VSS_5
VSS_4
VSS_3
VSS_2
VSS_1

T9
T1
P9
P1
M9
M1
J8
J2
G8
E1
B3
A9

25

FBCD[16:23]

FBCRDQS0
FBCRDQS1
FBCRDQS2
FBCRDQS3
FBCWDQS0
FBCWDQS1
FBCWDQS2
FBCWDQS3

FBCD18
FBCD21
FBCD16
FBCD22
FBCD19
FBCD23
FBCD17
FBCD20
FBCDQM2
FBCRDQS2
FBCWDQS2

D7
C3
C8
C2
A7
A2
B8
A3
D3
C7
B7

J3
K3
L3
L2

RAS#
CAS#
WE#
CS#

FBC_A0
FBC_A1
FBC_A2
FBC_A3
FBC_A4
FBC_A5
FBC_A6
FBC_A7
FBC_A8
FBC_A9
FBC_A10
FBC_A11
FBC_A12
FBC_A13

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

FBC_BA0 M2
FBC_BA1 N8
FBC_BA2 M3

BA0
BA1
BA2

FBC_CKEB0 K9
FBC_CLK0
J7
FBC_CLK0# K7

CKE
CK
CK#

VDD_9
VDD_8
VDD_7
VDD_6
VDD_5
VDD_4
VDD_3
VDD_2
VDD_1

K2
R9
R1
N9
N1
K8
G7
D9
B2

VDDQ_9
VDDQ_8
VDDQ_7
VDDQ_6
VDDQ_5
VDDQ_4
VDDQ_3
VDDQ_2
VDDQ_1

H9
H2
F1
E9
D2
C9
C1
A8
A1

VSSQ_9
VSSQ_8
VSSQ_7
VSSQ_6
VSSQ_5
VSSQ_4
VSSQ_3
VSSQ_2
VSSQ_1

G9
G1
F9
E8
E2
D8
D1
B9
B1

VSS_12
VSS_11
VSS_10
VSS_9
VSS_8
VSS_7
VSS_6
VSS_5
VSS_4
VSS_3
VSS_2
VSS_1

T9
T1
P9
P1
M9
M1
J8
J2
G8
E1
B3
A9

A

+1_5VRUN

B

J1
L1
J9
L9

+1_5VRUN

25

R4051

VREFDQ
VREFCA

H1 VRAM_VREF_DQ3
M8 VRAM_VREF_CA3
1

2

25
R4065
243_F
0402

VSSQ_9
VSSQ_8
VSSQ_7
VSSQ_6
VSSQ_5
VSSQ_4
VSSQ_3
VSSQ_2
VSSQ_1

FBC_RASB0#
FBC_CASB0#
FBC_WEB0#
FBC_CSB0_0#

R4056
4.99K_F
0402

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
DMU
DQSU
DQSU#

NC_4
NC_5
NC_6
NC_7

MEM_RST# T2
FBC_ODTB0 K1
ZQ6
L8

RESET#
ODT
ZQ

FBCD11E3
FBCD12 F7
FBCD10 F2
FBCD15 F8
FBCD8 H3
FBCD14H8
FBCD9 G2
FBCD13H7
FBCDQM1
E7
FBCRDQS1 F3
FBCWDQS1 G3

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DML
DQSL
DQSL#

1

25

FBC_BA0
FBC_BA1
FBC_BA2

H9
H2
F1
E9
D2
C9
C1
A8
A1

+1_5VRUN

FBCD[8:15]

R4071
243_F
0402

4.99K_F
0402

C4040
0.1U_6.3V_K
0402_X5R

25

FBCD[0:7]

FBCD6
FBCD1
FBCD5
FBCD0
FBCD7
FBCD2
FBCD4
FBCD3
FBCDQM0
FBCRDQS0
FBCWDQS0

2

25,31
25,31
25,31

VDDQ_9
VDDQ_8
VDDQ_7
VDDQ_6
VDDQ_5
VDDQ_4
VDDQ_3
VDDQ_2
VDDQ_1

U211

2

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

K2
R9
R1
N9
N1
K8
G7
D9
B2

1

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

FBC_A0
FBC_A1
FBC_A2
FBC_A3
FBC_A4
FBC_A5
FBC_A6
FBC_A7
FBC_A8
FBC_A9
FBC_A10
FBC_A11
FBC_A12
FBC_A13

A

VDD_9
VDD_8
VDD_7
VDD_6
VDD_5
VDD_4
VDD_3
VDD_2
VDD_1

2

RAS#
CAS#
WE#
CS#

1

J3
K3
L3
L2

2

FBC_RASB0#
FBC_CASB0#
FBC_WEB0#
FBC_CSB0_0#

25 FBC_RASB0#
25 FBC_CASB0#
25
FBC_WEB0#
25 FBC_CSB0_0#
25,31 FBC_A[0:13]

SDRAM_FBGA-96P_1GB
H5TQ1G63BFR-12C

D7
C3
C8
C2
A7
A2
B8
A3
D3
C7
B7

VREFDQ
VREFCA

H1 VRAM_VREF_DQ3
M8 VRAM_VREF_CA3

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
DMU
DQSU
DQSU#

C

SDRAM_FBGA-96P_1GB
H5TQ1G63BFR-12C

FBC_CLK0

1

+1_5VRUN

1

R5860

2

2

R4038
4.99K_F
0402

R5861

2

C4033
0.1U_6.3V_K
0402_X5R

2

2

1

1
R4023
4.99K_F
0402

D

DVT

1

VRAM_VREF_DQ3

56_F
0402
C6257 0.01U_10V_K 0402_X7R
1
2

D

56_F
0402

FBC_CLK0#

HAI PRECISION IND. CO., LTD.
FOXCONN HON
CPBG - R&D Division

Title

VRAM(DDR)# 3/4
Size
A3
Date:
1

2

3

4

5

6

Document Number

Rev

M960&M970 H Model
Tuesday, December 29, 2009
7

Sheet

SA
30
8

of

86

5

4

3

2

1

+1_5VRUN
+1_5VRUN
U212

M2
N8
M3

BA0
BA1
BA2

K9
J7
K7

CKE
CK
CK#

J1
L1
J9
L9

NC_4
NC_5
NC_6
NC_7

T2
K1
L8

RESET#
ODT
ZQ

FBCD37
FBCD39
FBCD34
FBCD33
FBCD38
FBCD32
FBCD35
FBCD36
FBCDQM4
FBCRDQS4
FBCWDQS4

E3
F7
F2
F8
H3
H8
G2
H7
E7
F3
G3

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DML
DQSL
DQSL#

FBCD46
FBCD41
FBCD44
FBCD40
FBCD47
FBCD42
FBCD45
FBCD43
FBCDQM5
FBCRDQS5
FBCWDQS5

D7
C3
C8
C2
A7
A2
B8
A3
D3
C7
B7

FBC_CKEB1

FBC_CKEB1

25
25

C

FBC_CLK1
FBC_CLK1#

FBC_CLK1
FBC_CLK1#

R5727
NC_243K_F
0402

DVT

MEM_RST#

25,28,29,30 MEM_RST#

FBC_ODTB1
ZQ7

FBC_ODTB1

1

25

FBCD[39..32]

243_F
0402

VSSQ_9
VSSQ_8
VSSQ_7
VSSQ_6
VSSQ_5
VSSQ_4
VSSQ_3
VSSQ_2
VSSQ_1

G9
G1
F9
E8
E2
D8
D1
B9
B1

FBC_BA0 M2
FBC_BA1 N8
FBC_BA2 M3

BA0
BA1
BA2

FBC_CKEB1K9
FBC_CLK1 J7
FBC_CLK1#K7

CKE
CK
CK#

VSS_12
VSS_11
VSS_10
VSS_9
VSS_8
VSS_7
VSS_6
VSS_5
VSS_4
VSS_3
VSS_2
VSS_1

T9
T1
P9
P1
M9
M1
J8
J2
G8
E1
B3
A9

J1
L1
J9
L9

NC_4
NC_5
NC_6
NC_7

T2
K1
L8

RESET#
ODT
ZQ

FBCD53
FBCD51
FBCD54
FBCD49
FBCD55
FBCD48
FBCD52
FBCD50
FBCDQM6
FBCRDQS6
FBCWDQS6

E3
F7
F2
F8
H3
H8
G2
H7
E7
F3
G3

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DML
DQSL
DQSL#

FBCD60
FBCD62
FBCD57
FBCD58
FBCD59
FBCD63
FBCD56
FBCD61
FBCDQM7
FBCRDQS7
FBCWDQS7

D7
C3
C8
C2
A7
A2
B8
A3
D3
C7
B7

MEM_RST#
FBC_ODTB1
ZQ8
+1_5VRUN

VREFDQ
VREFCA

H1 VRAM_VREF_DQ4
M8 VRAM_VREF_CA4

25 FBCRDQS[4:7]

FBCRDQS4
FBCRDQS5
FBCRDQS6
FBCRDQS7

25 FBCWDQS[7..4]

+1_5VRUN

2

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

VDD_9
VDD_8
VDD_7
VDD_6
VDD_5
VDD_4
VDD_3
VDD_2
VDD_1

K2
R9
R1
N9
N1
K8
G7
D9
B2

VDDQ_9
VDDQ_8
VDDQ_7
VDDQ_6
VDDQ_5
VDDQ_4
VDDQ_3
VDDQ_2
VDDQ_1

H9
H2
F1
E9
D2
C9
C1
A8
A1

VSSQ_9
VSSQ_8
VSSQ_7
VSSQ_6
VSSQ_5
VSSQ_4
VSSQ_3
VSSQ_2
VSSQ_1

G9
G1
F9
E8
E2
D8
D1
B9
B1

VSS_12
VSS_11
VSS_10
VSS_9
VSS_8
VSS_7
VSS_6
VSS_5
VSS_4
VSS_3
VSS_2
VSS_1

T9
T1
P9
P1
M9
M1
J8
J2
G8
E1
B3
A9

VREFDQ
VREFCA

+1_5VRUN

C

H1 VRAM_VREF_DQ4
M8VRAM_VREF_CA4
B

25

FBCD[56:63]

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
DMU
DQSU
DQSU#
SDRAM_FBGA-96P_1GB
H5TQ1G63BFR-12C

FBC_CLK1

R4042

R5862

4.99K_F
0402

56_F
0402
C6258 0.01U_10V_K 0402_X7R
1
2

VRAM_VREF_DQ4

2

A

DVT

1

C4034
0.1U_6.3V_K
0402_X5R

R5863

2

2

R4025
4.99K_F
0402

1

1

A

C4041
0.1U_6.3V_K
0402_X5R

243_F
0402

SDRAM_FBGA-96P_1GB
H5TQ1G63BFR-12C

2

FBCWDQS4
FBCWDQS5
FBCWDQS6
FBCWDQS7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
DMU
DQSU
DQSU#

4.99K_F
0402

2

FBCDQM4
FBCDQM5
FBCDQM6
FBCDQM7

R4058
4.99K_F
0402

FBCD[48:55]

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

D

RAS#
CAS#
WE#
CS#

1

25 FBCDQM[4:7]

FBCD[40:47]

2

25

1

B

25

R4075
R4057

1

2

R4072

25

H9
H2
F1
E9
D2
C9
C1
A8
A1

FBC_A0
FBC_A1
FBC_A2
FBC_A3
FBC_A4
FBC_A5
FBC_A6
FBC_A7
FBC_A8
FBC_A9
FBC_A10
FBC_A11
FBC_A12
FBC_A13

+1_5VRUN

2

FBC_BA0
FBC_BA1
FBC_BA2

FBC_BA0
FBC_BA1
FBC_BA2

VDDQ_9
VDDQ_8
VDDQ_7
VDDQ_6
VDDQ_5
VDDQ_4
VDDQ_3
VDDQ_2
VDDQ_1

FBC_RASB1# J3
FBC_CASB1# K3
FBC_WEB1# L3
FBC_CSB1_0#L2

1

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

K2
R9
R1
N9
N1
K8
G7
D9
B2

1

25

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

U213

VDD_9
VDD_8
VDD_7
VDD_6
VDD_5
VDD_4
VDD_3
VDD_2
VDD_1

2

25,30
25,30
25,30

FBC_A0
FBC_A1
FBC_A2
FBC_A3
FBC_A4
FBC_A5
FBC_A6
FBC_A7
FBC_A8
FBC_A9
FBC_A10
FBC_A11
FBC_A12
FBC_A13

RAS#
CAS#
WE#
CS#

1

FBC_RASB1# J3
FBC_CASB1# K3
FBC_WEB1# L3
FBC_CSB1_0#L2

25 FBC_RASB1#
25 FBC_CASB1#
25 FBC_WEB1#
25 FBC_CSB1_0#
25,30 FBC_A[0:13]

D

56_F
0402

HAI PRECISION IND. CO., LTD.
FOXCONN HON
CPBG - R&D Division

Title

FBC_CLK1#

VRAM(DDR)# 4/4
Size
A3
Date:
5

4

3

2

Document Number

Rev

M960&M970 H Model
Tuesday, December 29, 2009

Sheet
1

SA
31

of

86

5

4

3

2

1

Place around the VRAM U206
+1_5VRUN

1

C4518
0.1U_16V_K
0402_X7R

Close to U206
For RF noise

C6295
22P_50V_J
0402_NPO

2

1

C4525
0.1U_16V_K
0402_X7R

2

1

C4511
0.1U_16V_K
0402_X7R

2

1

C4531
0.1U_16V_K
0402_X7R

2

1

C6260
1U_6.3V_K
0402_X5R

2

1

C6259
1U_6.3V_K
0402_X5R

2

1

C4008
1U_6.3V_K
0402_X5R

2

1

C4009
1U_6.3V_K
0402_X5R

2

1

1

C4539
1U_6.3V_K
0402_X5R

2

2

D

C4510
1U_6.3V_K
0402_X5R

2

1

1A

D

1

C6263
10U_6.3V_M
0805_X5R

C6264
10U_6.3V_M
0805_X5R

2

1

C6262
10U_6.3V_M
0805_X5R

2

1

C6261
10U_6.3V_M
0805_X5R

2

2

1

+1_5VRUN

Place around the VRAM U207
+1_5VRUN

1

C4519
0.1U_16V_K
0402_X7R

Close to U207
For RF noise

C6296
22P_50V_J
0402_NPO

2

1

C4526
0.1U_16V_K
0402_X7R

2

1

C4512
0.1U_16V_K
0402_X7R

2

1

C4536
0.1U_16V_K
0402_X7R

2

1

C6266
1U_6.3V_K
0402_X5R

2

1

C6265
1U_6.3V_K
0402_X5R

2

1

C4022
1U_6.3V_K
0402_X5R

2

1

C4019
1U_6.3V_K
0402_X5R

2

1

C4553
1U_6.3V_K
0402_X5R

2

1

C4514
1U_6.3V_K
0402_X5R

2

2

1

1A

C

C

Place around the VRAM U208
+1_5VRUN

1

C4522
0.1U_16V_K
0402_X7R

Close to U208
For RF noise

C6297
22P_50V_J
0402_NPO

2

1

C4527
0.1U_16V_K
0402_X7R

2

1

C4515
0.1U_16V_K
0402_X7R

2

1

C4560
0.1U_16V_K
0402_X7R

2

1

C6268
1U_6.3V_K
0402_X5R

2

1

C6267
1U_6.3V_K
0402_X5R

2

1

C4027
1U_6.3V_K
0402_X5R

2

1

C4026
1U_6.3V_K
0402_X5R

2

1

C4559
1U_6.3V_K
0402_X5R

2

1

C4528
1U_6.3V_K
0402_X5R

2

2

1

1A

+1_5VRUN

1

C6271
10U_6.3V_M
0805_X5R

2

1

C6270
10U_6.3V_M
0805_X5R

2

C6269
10U_6.3V_M
0805_X5R

1

B

2

2

1

B

C6272
10U_6.3V_M
0805_X5R

Place around the VRAM U209
+1_5VRUN

1

C4562
0.1U_16V_K
0402_X7R

2

1

C4561
0.1U_16V_K
0402_X7R

2

1

C4530
0.1U_16V_K
0402_X7R

2

1

C4574
0.1U_16V_K
0402_X7R

2

1

C6274
1U_6.3V_K
0402_X5R

2

1

C6273
1U_6.3V_K
0402_X5R

2

1

C4037
1U_6.3V_K
0402_X5R

2

1

C4035
1U_6.3V_K
0402_X5R

2

1

C4573
1U_6.3V_K
0402_X5R

2

1

C4567
1U_6.3V_K
0402_X5R

2

2

1

1A
C6298
22P_50V_J
0402_NPO

Close to U209
For RF noise

A

A

HAI PRECISION IND. CO., LTD.
FOXCONN HON
CPBG - R&D Division

Title

VRAM(N11M BYPASS) 1/2
Size
A3
Date:
5

4

3

2

Document Number

Rev

M960&M970 H Model
Thursday, December 24, 2009

Sheet

1

SA
32

of

86

5

4

3

2

1

Place around the VRAM U210
+1_5VRUN

1

1

C4543
0.1U_16V_K
0402_X7R

2

C4541
0.1U_16V_K
0402_X7R

2

1

C4540
0.1U_16V_K
0402_X7R

2

1

C4563
0.1U_16V_K
0402_X7R

2

1

C6276
1U_6.3V_K
0402_X5R

2

1

C6275
1U_6.3V_K
0402_X5R

2

1

C4045
1U_6.3V_K
0402_X5R

2

1

C4044
1U_6.3V_K
0402_X5R

2

1

C4554
1U_6.3V_K
0402_X5R

2

1

C4546
1U_6.3V_K
0402_X5R

2

2

D

1

1A
Close to U210
For RF noise

C6299
22P_50V_J
0402_NPO

D

1

1

C6278
10U_6.3V_M
0805_X5R

C6279
10U_6.3V_M
0805_X5R

2

2

2

C6277
10U_6.3V_M
0805_X5R

Place around the VRAM U211

2

1

1

+1_5VRUN

C6280
10U_6.3V_M
0805_X5R

+1_5VRUN

1

C4576
0.1U_16V_K
0402_X7R

2

1

C4575
0.1U_16V_K
0402_X7R

2

1

C4565
0.1U_16V_K
0402_X7R

2

1

C4586
0.1U_16V_K
0402_X7R

2

1

C6282
1U_6.3V_K
0402_X5R

2

1

C6281
1U_6.3V_K
0402_X5R

2

1

C4050
1U_6.3V_K
0402_X5R

2

1

C4049
1U_6.3V_K
0402_X5R

2

1

C4585
1U_6.3V_K
0402_X5R

2

1

C4579
1U_6.3V_K
0402_X5R

2

C

2

1

1A
Close to U211
For RF noise

C6300
22P_50V_J
0402_NPO

C

Place around the VRAM U212
+1_5VRUN

B

1

1

C4589
0.1U_16V_K
0402_X7R

2

C4588
0.1U_16V_K
0402_X7R

2

1

C4587
0.1U_16V_K
0402_X7R

2

1

C4599
0.1U_16V_K
0402_X7R

2

1

C6284
1U_6.3V_K
0402_X5R

2

1

C6283
1U_6.3V_K
0402_X5R

2

1

C4055
1U_6.3V_K
0402_X5R

2

1

C4054
1U_6.3V_K
0402_X5R

2

1

C4598
1U_6.3V_K
0402_X5R

2

1

C4592
1U_6.3V_K
0402_X5R

2

2

1

1A
Close to U212
For RF noise

C6301
22P_50V_J
0402_NPO

B

1

C6287
10U_6.3V_M
0805_X5R

2

C6286
10U_6.3V_M
0805_X5R

1

1

C6285
10U_6.3V_M
0805_X5R

2

2

Place around the VRAM U213

2

1

+1_5VRUN

C6288
10U_6.3V_M
0805_X5R

+1_5VRUN

1

C4602
0.1U_16V_K
0402_X7R

2

1

C4601
0.1U_16V_K
0402_X7R

2

1

C4600
0.1U_16V_K
0402_X7R

2

1

C4612
0.1U_16V_K
0402_X7R

2

1

C6290
1U_6.3V_K
0402_X5R

2

1

C6289
1U_6.3V_K
0402_X5R

2

1

C4060
1U_6.3V_K
0402_X5R

2

1

C4059
1U_6.3V_K
0402_X5R

2

1

C4611
1U_6.3V_K
0402_X5R

2

1

C4605
1U_6.3V_K
0402_X5R

2

2

1

1A
C6302
22P_50V_J
0402_NPO

Close to U213
For RF noise

A

A

HAI PRECISION IND. CO., LTD.
FOXCONN HON
CPBG - R&D Division

Title

VRAM(N11P BYPASS) 2/2
Size
A3
Date:
5

4

3

2

Document Number

Rev

M960&M970 H Model
Thursday, December 24, 2009

Sheet
1

SA
33

of

86

5

4

3

2

1

+5VRUN

+3VRUN
D_SHIFT_+5VRUN

2

24 ATI_DAC1GREEN

J_RED
J_BLUE
J_GREEN

24 ATI_CRT_SCL

24 ATI_DAC1BLUE
+3VRUN

23,24 ATI_DAC1VSYNC
23,24 ATI_DAC1HSYNC

2 0402_Y5V
1

C638 1

0.1U_16V_Y

1

1

U8

2

24 ATI_DAC1RED

2

R472
3.9K_J
0402

C261
0.1U_16V_M
0402_X5R

2

C644
0.1U_16V_Y
0402_Y5V

1

2 0402_Y5V

0.1U_16V_Y

D

1

+3VRUN
C639 1

2

VCC_VIDEO

3
4
5

VIDEO_1
VIDEO_2
VIDEO_3

VCC_DDC

7

VCC_SYNC

1
8
9

MB_CRT_DDCCLK_R

10

DDC_IN1

DDC_OUT1

11

DDC_IN2

DDC_OUT2

12

MB_CRT_DDCDATA_R
PR_VGA_HSYNC
AVSYNC

13

SYNC_IN1

SYNC_OUT1

14

ATI_DAC1VSYNC

15

SYNC_IN2

SYNC_OUT2

16

GND

D

2 0.1U_16V_M
0402_X5R

1

BYP

ATI_DAC1HSYNC
R471
3.9K_J
0402

A3003 C265

C221
0.1U_16V_Y
0402_Y5V

6

2

CM2009-02QR

24 ATI_CRT_SDA

PR_VGA_HSYNC

(For Win7 ,Should be Dummy)

1

Semi-PnP

+3VRUN

Semi-PnP(EC in)
2
4

C609
12P_50V_K_N
0402

D_SHIFT_+5VRUN

U9
NC_MC74VHC1G86DFT2G

3

1

C

MB_CRT_DET#

2

(HDMI)

C620
12P_50V_K_N
0402

VSYNC14

1
2
R460 39_J 0402

1

24,38 ATI_HDMI_DET_3

R767
NC_10K_J
0402

1

2

1

C
E

R479

R475 0_J
MB_CRT_DDCCLK
2

0402
1 MB_CRT_DDCCLK_R

2

2

2

Semi-PnP(EC out)

VGA_CRT_DET#
D9
NC_BAT54SPT
+3VRUN

2

3

3

(CRT)
Q11
NC_DTC144EUB
null
1 B
EN_EXT_DEV_SENSE

AVSYNC

1

R469
NC_10K_J
0402

C279
NC_0.1U_6.3V_K
0402_X5R

5

VGA_CRT_DET#

2

1

1

2

C

HSYNC13

1
2
R463 39_J 0402

2.2K_J
0402

B

D_SHIFT_+5VRUN

2

2

1

1

J_GREEN
C200
NC_10P_50V_J_N
0402

C199
10P_50V_J_N
0402

J_BLUE
VGA_CRT_DET#

1

ATI_DAC1BLUE

R476

12

MB_CRT_DDCDATA

13

HSYNC13
VSYNC14

14

MB_CRT_DDCCLK

15

PVT

ATI_DAC1BLUE_BB

1
2

1

C179
NC_10P_50V_J_N
0402

DVT

C178
10P_50V_J_N
0402

1

2

R431 1
2 0402
NC_37.4_F

ATI_DAC1GREEN

A

FOXCONN
Title

CRT

Size
A3

Document Number

Date:
4

3

C645
220P_50V_J_N
0402

C79
NC_15P_50V_K_N 0402
ATI_DAC1BLUE
1
2

CRT CONNECTOR
5

2.2K_J
0402

0402
1MB_CRT_DDCDATA_R

0402

C81
NC_15P_50V_K_N 0402
ATI_DAC1RED
1
2

2

24

150_F
0402

2

R148

R477 0_J
MB_CRT_DDCDATA 2

C80
NC_15P_50V_K_N

2

D-SUB CONN_15P
FOX_DZ11AE1-SB1SD-4H

1

A

11

17

R5752
NC_0_J
0402

120R-100MHZ_0603
EBMS160808A121

2

L19

D_SHIFT_+5VRUN

1

J_RED

2

150_F
0402
R430 1
2 0402
NC_37.4_F

6
1
7
2
8
3
9
4
10
5

2

120R-100MHZ_0603
EBMS160808A121

1
R153
ATI_DAC1GREEN_GB

For EMI
CN20

PVT
L21

24

EVT

F17
15V-0.35A_1206
SMD1206P035TF/16

ATI_DAC1GREEN

C648
220P_50V_J_N
0402

1

1

1
2

150_F
0402
2 0402

SL22
null

2

R429 1
NC_37.4_F

2

1

1
ATI_DAC1RED_RB

C210
10P_50V_J_N
0402

2

24

C211
NC_10P_50V_J_N
0402

1

2

2

ATI_DAC1RED
R164

+5VRUN
D10

120R-100MHZ_0603
EBMS160808A121

16

L23

1

B

2

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division
Rev

M960&M970 H Model
Sheet

Tuesday, December 29, 2009
1

SA
34

of

86

5

4

3

2

1

LVDS
D

D

BFT Test Pad(Top)
TP1231

PVT

tpc40t_75

DIS_FAN_MON#

1

C

C

BFT Test Pad(Bottom)
TP1232

tpc40b_75

DIS_FAN_MON#

1

+3VRUN

1

J3

2
2

C153
4.7U_6.3V_K
0805_X5R

1

DIS_FAN_MON# 15

Top-Side DIS_FAN_MON#

OPEN_JUMP_OPEN2
J4

U17

1
2
3
4

IN1
IN5
OUT
IN4
EN
IN3
GND
IN2
THERMAL PAD

2

8
7
6
5
9

for BFT Test

1

Bot-Side

OPEN_JUMP_OPEN2

LCDVCC

G5281RC1U_V0.1

B

2
0.1U_16V_Y

26 LCDVCC_EN

2

C125

2
1

1

PANEL ID
C110
4.7U_10V_Y
0805_Y5V

PVT

C96
0.1U_16V_Y
0402_Y5V

B

SW1
R5935 1
R5936 1
R5937 1
R5938 1
R6007 1

1
0402_Y5V

10K_J 2
10K_J 2
10K_J 2
10K_J 2
NC_10K_J
2

0402
0402
0402
0402
0402

1
2
3
4
5
6

12
11
10
9
8
7

LCDID0
LCDID1
LCDID2
LCDID3
LCDID4

15
15
15
15
15

DHNF-06-T-Q-T/R_SW-SMD12
null

EVT
BFT Test Pad(Top)

PANEL ID
Type

LED

LED

LED

LED

1

1

1

LED

LED

LED

Size

14

14

14

14

14

15.5

15.5

15.5

15.5

17.3

17.3

Vendor

No LCD

AUO

Samsung

LGD

AUO

LGD

CPT

Samsung

LGD

CPT

AUO

B140XW02

LTN140AT08 LP140WH2

B140RW02

LP156WH1

CLAA156WA01A

LTN156AT01 LP156WF1

CLAA173UA01A

B173HW01

00001

00010

00100

00110

00111

01000

01011

01100

Model Name
Panel ID [4.3.2.1.0]

00000

00011

01001

A

TP1251

tpc40t_75

1

LCDID0

TP1252

tpc40b_75

1

LCDID0

TP1253

tpc40t_75

1

LCDID1

TP1254

tpc40b_75

1

LCDID1

TP1255

tpc40t_75

1

LCDID2

TP1256

tpc40b_75

1

LCDID2

TP1257

tpc40t_75

1

LCDID3

TP1258

tpc40b_75

1

LCDID3

TP1259

tpc40t_75

1

TP1260

tpc40b_75

1

+3VRUN

FOXCONN

Title

Size
A3
Date:
5

4

3

PVT

BFT Test Pad(Bottom)

2

A

+3VRUN

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

LVDS

Document Number

Rev

M960&M970 H Model
Sheet

Tuesday, December 29, 2009
1

SA
35

of

86

4

3

2

INVERTER CONNECTOR

1

1

C426
1U_25V_K
0603_X5R

2

2

C425
NC_0.1U_50V_K_B
0603

2

1

DCBATOUT

D

1

DCBATOUT

C427
0.1U_50V_K_B
0603

D

1

5

0805
0_J
R5930

FOX_HS8206E-LH
HEADER CONN_6P

2

7

EVT

INV_BRADJ

14

8

+3VRUN

15

INV_EN

INV_EN

SMDFIX2

INV_ENABLE

37 INV_ENABLE
37 INV_BRADJ

SMDFIX1

6
5
4
3
2
1

CN5

EVT
R809
0402
0_J
2

U89C

9
8

1

1
R684

C

1

2 0402
NC_0_J

C902
NC_100P_50V_J
0402_NPO

R772
10K_J
0402

2

EVT

74LVC08APW

2

7

EVT

1

10

26 ATI_BRADJ

C

+3VRUN

12

6

INV_ENABLE_2 13

4

INV_EN

1

U89B

U89D

11

1

R807
0402
0_J
2

INV_ENABLE

39,55

1

LIDIN#

7

1
R687

U89A

1

R403
10K_J
0402

74LVC08APW

2 0402
NC_0_J

C895
NC_100P_50V_J
0402_NPO

3 INV_ENABLE_1

2

24 ATI_INV_EN

B

74LVC08APW

1

7

B

74LVC08APW

2

14

+3VRUN

7

5

1

15

+3VRUN

2

EVT

BL_OFF#

14

14

C877
0.1U_16V_Y
0402_Y5V

BL_OFF#

2

39

2

R405
100K_F
0402

A

A

FOXCONN
Title

Size
A3
Date:
5

4

3

2

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

INVERTER CONNECTOR
Document Number

Rev

M960&M970 H Model
Sheet

Tuesday, December 29, 2009
1

SA
36

of

86

5

4

3

2

1

D

D

For RF verification, del these cap. in DVT if these cap. do not use.

EVT

C6306
NC_3.3P_25V_C
0201_NPO

EVT

C6309
NC_3.3P_25V_C
0201_NPO

ATI_ODD_RXIN0ATI_ODD_RXIN0+

DVT

ATI_ODD_RXIN1ATI_ODD_RXIN1+

1
2

C6310
NC_3.3P_25V_C
0201_NPO

ATI_ODD_RXIN2ATI_ODD_RXIN2+

C6311
NC_3.3P_25V_C
0201_NPO

ATI_EVEN_RXIN0ATI_EVEN_RXIN0+

C6312
NC_3.3P_25V_C
0201_NPO

ATI_EVEN_RXIN2ATI_EVEN_RXIN2+

ATI_ODD_CLKINATI_ODD_CLKIN+

2

1

26 ATI_EVEN_RXIN0+
26 ATI_EVEN_RXIN1-

ATI_EVEN_RXIN1ATI_EVEN_RXIN1+

2

1

26 ATI_EVEN_RXIN1+
26 ATI_EVEN_RXIN2-

2

1

26 ATI_EVEN_RXIN2+
26 ATI_EVEN_CLKIN-

ATI_EVEN_CLKINATI_EVEN_CLKIN+

For rush current issue
C6313
NC_3.3P_25V_C
0201_NPO

L99

NC_600R-100MHZ_0805

DVT

ACMS201209A601 2A

26 ATI_EVEN_CLKIN+
DCBATOUT

36
36

Q177 SI2303BDS

INV_BRADJ
INV_ENABLE

2
32V-2A_0603
467002.

44

42

B

43

41

C6324
680P_50V_K
0603_X7R

FPC CONN_40P

2

C6325
680P_50V_K
0603_X7R

1

SMDFIX1

2

2

1

C6305
0.1U_50V_K_B
0603

1

C575
0.1U_50V_K_B
0603

1

2

47K_J
0402

G

1

D

DCBATOUT_L

3

C

1

2

R5736

1

1

S

F15

2

SMDFIX2

SMDFIX4

C1365
0.1U_16V_Y
0402_Y5V

26 ATI_ODD_CLKIN+
26 ATI_EVEN_RXIN0-

B

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40

SMDFIX3

C1364
4.7U_10V_Y
0805_Y5V

1

C5255
22P_50V_J
0402_NPO

CN13
FOX_GS12401-1012-9H

LCDVCC

2

2
1

DVT
1A

C6308
NC_3.3P_25V_C
0201_NPO

26 ATI_ODD_RXIN2+
26 ATI_ODD_CLKIN-

2

PVT
DVT

1

1

LVDS CONNECTOR
For RF Noise

26 ATI_ODD_RXIN1+
26 ATI_ODD_RXIN2-

2

C

C6307
NC_3.3P_25V_C
0201_NPO

1

2

1

26 ATI_ODD_RXIN0+
26 ATI_ODD_RXIN1-

2

2

1

26 ATI_ODD_RXIN0-

DVT

2

R5737

For EMI

47K_J
0402

Close to CN13

DVT
A

A

FOXCONN
Title

Size
A3
Date:
5

4

3

2

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

LVDS Connector
Document Number

Rev

M960&M970 H Model
Sheet

Tuesday, December 29, 2009
1

SA
37

of

86

5

4

3

2

1

Data line capacitance to GND need less than 10pF,
so those parts need close to HDMI connector

HTXCHTXC+

24 ATI_HDMI_TXCA#
24 ATI_HDMI_TXCA

RP55
1
2

0

CN21

4
3

ATI_HDMI_TXCA#
ATI_HDMI_TXCA

3
4

ATI_HDMI_D0#
ATI_HDMI_D0

HTX2+
HTX2-

1
3
5

Data2+
TMDS Data2 Shield
Data2Data1+
TMDS Data1 Shield
Data1-

2
4
6

HTX1+
HTX1-

HTX0+
HTX0-

7
9
11

Data0+
TMDS Data0 Shield
Data0TMDS Clock+
TMDS Clock Shield
TMDS Clock-

8
10
12

HTXC+
HTXC-

HDMI_CEC
HDMI_SCL

13
15
17
19
20
22

CEC
SCL
DDC/CEC Ground
Hot Plug Detect
PTH1
PTH3

Reserved
SDA
+5V Power

14
16
18

PTH2
PTH4

21
23

0404_4P2R
0404_4P2R
HTX0HTX0+

24 ATI_HDMI_D1#
24 ATI_HDMI_D1

HTX1HTX1+

2
1
RP57

0

RP59

0

1
2

TP92 26MIL

HDMI_DET_5

4
3

ATI_HDMI_D1#
ATI_HDMI_D1
R496
100K_J
0402

0404_4P2R

24 ATI_HDMI_D2#
24 ATI_HDMI_D2

2
1

MP
499_F
R268
1

499_F
R266
1

499_F
R265
1

499_F
R263
1

499_F
R257
1

499_F
R255
1

0402
2

0402
2

0402
2

0402
2

0402
2

3

DVT

D

+5VRUN
G

C

S 2N7002W

2

2

1

2

499_F
R275
1

0402

Q13
+5VRUN
null
C

HDMI_SDA
HDMI_+5VRUN

HDMI RECEPTACLE_19P
FOX_QJ1119L-NV19-8H

0

0402
2

EVT

ATI_HDMI_D2#
ATI_HDMI_D2
499_F
R276
1

RP61

3
4

D

2

0404_4P2R
HTX2HTX2+

1

1

24 ATI_HDMI_D0#
24 ATI_HDMI_D0

0402
2

D

3

2

+5VRUN_F

1

1

R497
NC_0_J
0603

+5VRUN_L188

3

+5VRUN

D18
NC_SL22
null

2

R831
10K_J
0402

2

NC_Rclamp0504F

2

C908
NC_0.1U_16V_M
0402_X5R

1

1

1
2

6

+5VRUN_L188

HDMI_LEAK_CTRL

1

HDMI_DET_5

G

5

S

4

2

D

HDMI_SDA

3

1

U36
HDMI_SCL

F3
16V-0.25_1206
SMD1206P025TF

Q57
SI2301BDS-T1-E3

2

+3VRUN

1

HDMI_SCL

2

3
Q35A
UPA672T-T1-A

D

R567 1

0_J

2 0402

ATI_HDMI_DET_3 24,34

HDMI_+5VRUN

Q34B

G

C670
0.1U_16V_K
0402_X7R

2 G

HDMI_SDA
D

5 G

2N7002DW

S

4

HDMI_DET_5

S

Q34A

1

6
Q35B
UPA672T-T1-A

3

D

S

1
null

24 ATI_HDMI_SDA

1

2

2

2

2

2

D

S

4
null

2

R504
4.7K_J
0402

B

L65
33R-100MHZ_0805
BCMS201209A330

2

1

R506
2.2K_J
0402

C
E
null

R518
2.2K_J
0402

6

5 2

R511
2.2K_J
0402

G

24 ATI_HDMI_SCL

B

1
1

1

R531
1K_J
0402

1
Q58
DTC144EUB

1

1
R515
3.9K_J
0402

R512
1K_J
0402
R538
3.9K_J
0402

2

1

1

B

39,43,81 RUN_ON

+3VRUN

2

D11
BAS316PT

+3VRUN

2N7002DW

A

A

FOXCONN
Title

Size
A3
Date:
5

4

3

2

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

HDMI

Document Number

Rev

M960&M970 H Model
Sheet

Tuesday, December 29, 2009
1

SA
38

of

86

1

2

3

4

5

6

7

8

DVT
DVT

80
17
20
21
25
27

LPC
D/A

GPIO
(no wake-up
capability)
KSO18

59
KSO18
61 HW_POP_MUTE_EC

42
42
12

110
112

111
113
93

E51TXD
E51RXD
PM_SLP_S5#

GPO82/TEST#
GPO84/TRIST#

SER

SOUT_CR/GPO83/XORTR#
GPIO87/SIN_CR
GPIO06

2

28
24
120
119
68
67
69
70

FW_HW
MB_FLASH_EN

GPIO77
GPO76/SHBM
GPIO75
GPIO81

84
83
82
91

MODEL_ID1
BL_OFF#

SPI

DAT_SMB_R
R62
CLK_SMB_R
R63
SMB_THRM_DATA
SMB_THRM_CLK

DAT_TP
CLK_TP

1
1

DAT_TP
CLK_TP

FIR

D21
2

D22
2

H_A20GATE_D

H_RCIN# 15

1
null

H_A20GATE 15

CLK_SMB
DAT_SMB

PM_RSMRST# 12
IMVP_PWRGD 12,78
SUS_ON 43,49,61,76,81
CAPLOCK_LED# 55

BT_WLAN_SW# R30
BT_PRS#
R31

12
PWRBTN#
74,82 ALW_ON

0402 2 2.2K_J 1 R50 ALW_ON_R

DVT

103

1
BL_OFF#

1
2 0402

SPI_ROM_SDI
SPI_ROM_SDO
SPI_ROM_CS#
SPI_ROM_CLK

DAT_TP
CLK_TP

SPI_ROM_SDI
2 SPI_ROM_SDO_R
22_J 0402
2 SPI_ROM_CLK_R
22_J 0402

1
R42
1
R37

PVT
B

R5854 1
R68 1
R33 1
R35 1
R51 1
R29 1
R45 1
R64 1
R5940 1

100K_J 2
100K_J 2
100K_J 2
100K_J 2
100K_J 2
100K_J 2
100K_J 2
100K_J 2
NC_10K_J
2

0402
0402
0402
0402
0402
0402
0402
0402
0402

PVT

R48
4.7K_J
0402

+ECVCC

1

1

86
87
90
92

PSDAT3/GPIO12
PSCLK3/GPIO25
PSDAT2/GPIO27
PSCLK2/GPIO26
PSDAT1/GPIO35
PSCLK1/GPIO37
F_SDI
F_SDO
F_CS0#
F_SCK

54
55
56
57
58
59
60
61

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

VCC_POR#

85

ECRST#

PS/2
FIU

40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

40,59
40,59
40,59
40
40
40
40
40

R15
4.7K_J
0402

2

KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7

KBC

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17

ECRST#
D
BUF_PLT_RST# 1

G

Q3
PMBS3904
+1_05V_VTT

Q4

1

TA1/GPIO56
TB1/GPIO14
TA2/GPIO20
TB2/GPIO01
GPIO51
GPIO36

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17

C12
NC_0.1U_16V_M_B
0402

2

31
63
117
64
26
15

53
52
51
50
49
48
47
43
42
41
40
39
38
37
36
35
34
33

3

A_PWM/GPIO15
B_PWM/GPIO21
C_PWM/GPIO13
D_PWM/GPIO32
E_PWM/GPIO45
F_PWM/GPIO40
G_PWM/GPIO66
H_PWM/GPIO33

KBSOUT0/JENK#
KBSOUT1/TCK
KBSOUT2/TMS
KBSOUT3/TDI
KBSOUT4/JEN0#
KBSOUT5/TDO
KBSOUT6/RDY#
KBSOUT7
KBSOUT8
KBSOUT9/SDP_VIS#
KBSOUT10_P80_CLK
KBSOUT11_P80_DAT
KBSOUT12/GPIO64
KBSOUT13/GPIO63
KBSOUT14/GPIO62
KBSOUT15/GPIO61/XOR_OUT
KBSOUT16/GPIO60
KBSOUT17/GPIO57

S

2

32KX1/32KCLKIN
32KX2
CLKOUT/GPIO55

32
118
62
65
22
16
81
66

2N7002W
null

3

77
79
30

INST_ON_SW# 13
12
11
10
71
72

INST_ON_SW#
27,75,76,77,80,81 RUN_ON1
82
PWRLIMIT#
PM_SLP_ME#
57
57

41,42
41,42
41,42
41,42

R5982 1 10K_J

EC_PWRLIMIT_CTRL
PM_SLP_S3#
PM_SLP_S4#
PM_SLP_S5#
RUN_ON
SUS_ON
ALW_ON
RUN_ON1
INST_ON_SW#

R581
NC_10K_J
0402

A0202

53 BT_PRS#
78 IMVP_VR_ON
71
ENCHG#
12 PM_SLP_S3#

12 PM_SLP_ME#

2 0402
2 0402

R16

1

2 1

B

2.2K_J
0402

C
E
C

2

SYSTEM_ID3

PVT

DVT

2
56
FAN1_PWM
55 SUSPEND_LED
55 POWER_LED
55 NUMLOCK_LED#
4,12,75,76,80 RUN_PWRGD
55 CHARGE_LED
55 SCRLOCK_LED#

DVT

1 10K_J
1 10K_J

2
32KXCLKI
32KXCLKO
MODEL_ID0

DVT

EVT

+ECVCC

U4B

0402_NPO
15P_50V_K_N
C26

32.768KHZ_12.5P_10PPM
Q13MC3061001800

C

2

R5851 1 NC_10K_J
2 0402

+3VRUN

DAT_35001 73
OVT_GFX# 24,58
OVT_EC# 4

NPCE783LA0DX
null

PVT

+ECVCC
INST_ON_SW#

For M930 external SPI flash card issue.

2
2

1

3

SMB_THRM_DATA
SMB_THRM_CLK

R5990
4.7K_J
0402

+3VSUS

32KXCLKI

2

1

1

2

4

R5989
4.7K_J
0402

MP

Y1
0402_NPO
15P_50V_K_N
C27

+3VRUN

0402
10K_J
R5836

BL_OFF# 36
RUN_ON 38,43,81
IMVP_OK 78

AGND

GND6
GND5
GND4
GND3
GND2
GND1
116
89
78
45
18
5

R52
20M_J
0603

SMBUS Channel 1

R5988 PVT
2.2K_J
0402

R5987
2.2K_J
0402

MB_FLASH_EN

SMB_THRM_DATA 11,24,58
SMB_THRM_CLK 11,24,58

IMVP_PWRGD

100K_J
0402

LIDIN#

+3VALW

SD103AWS

VCORF

2

C501
1U_10V_K
0603_X5R

33K_J 10402 32KXCLKO

1

2

1

44
R49

A

SMBUS Channel 2

1
null

SD103AWS

FW_HW 10
MB_FLASH_EN 42
EC_PWRLIMIT_CTRL 71,82
DVT
AC_OFF 71
1 0_J
2 0402
DAT_SMB 71
1 0_J
2 0402
CLK_SMB 71

75
74
73

GPIO72
GPIO71
GPIO70

R32

CLK_35001
DAT_35001

OVT_EC#
B

PVT
R5986
10K_J
0402

C22
NC_22P_50V_J
PVT
0402_NPO

H_RCIN#_D

RUNTIME_SCI# 15
EXTSMI# 15
WAKE_SCI# 11

IMVP_OK

23
14
114
109

GPIO46/TRST#
GPIO34
GPIO16
GPIO30

CIR

H_RCIN#_D
H_A20GATE_D

RP20
R5985
10K
10K_J
0404_4P2R
0402

4
3

GPIO53
GPIO47
SDA3/GPIO31
SCL3/GPIO23
SDA2/GPIO74
SCL2/GPIO73
SDA1/GPIO22
SCL1/GPIO17

SMB

AC_Present 12
BUF_PLT_RST# 4,14,42,43
CLK_KBCPCI 14
LPC_FRAME# 10,42
CLK_35001 73
LPC_AD0 10,42
LPC_AD1 10,42
LPC_AD2 10,42
LPC_AD3 10,42
INT_SERIRQ 10,42
PM_CLKRUN# 12,42

1
2

1
1

1
124
7
2
3
6
126
127
128
1
125
8
122
121
29
9
123

PVT
R6009
NC_10K_J
0402

2
2

1

1
2

LPCPD#/GPIO10
LRESET#
LCLK
LFRAME#
GPIO24
LAD0
LAD1
LAD2
LAD3
SERIRQ
CLKRUN#/GPIO11
KBRST#/GPIO86
GPIO85/GA20
ECSCI#/GPIO54
SMI#/GPIO65
PWUREQ#/GPIO67

R6008
NC_10K_J
0402

+ECVCC

PVT

1
1

A/D

GPIO41
TCK/GPIO42 GPIO
GPIO43/TMS (wake-up
GPIO44/TDI capability)
GPIO50/TDO
GPIO52/RDY#

R36
NC_47_J
0402

DVT

LID Switch

+3VALW

2
2

12 SUS_PWR_ACK
73 35001_RST#
44 WLAN_EN
76 SUS_PWRGD
15 CRIT_TEMP_REP#
53 BT_ON

2
1
C500 1U_6.3V_M
0402_X5R

VDD

102

4

U4A

Identify BATT ID

+5VRUN

2
2

DA0/GPIO94
DA1/GPIO95
DA2/GPIO96
GPIO97

+3VRUN

2

101
105
106
107

TP

TP

PWRSW#_R

1
1

PWRSW#_R

71 ACIN_EC
71 CHARGE_CTRL
12,74 ALW_PWRGD
71 BATT_PRS#

R34
110_J
0402
C21

2
2

SYSTEM_ID2

1

2 0.1U_16V_M_B
0402

C30
0.1U_16V_M
0402_X5R

1

PM_SLP_S4#

AD0/GPIO90
AD1/GPIO91
AD2/GPIO92
AD3/GPIO93
GPIO05
GPIO04
GPIO03
GPIO07

0402

2

EVT

12

97
98
99
100
108
96
95
94

2 4.7K_J

CLK_KBCPCI

2

C724
1000P_50V_K
0402_X7R

1

FAN1_TACH

56 FAN1_TACH

VREF

1

PWRSW#

1

71 EC_IADAPT
71 EC_VADAPT
36,55
LIDIN#
44 BT_WLAN_SW#

104

R40

+ECVCC
42,59 PWRSW#

2

+ECVCC

AVCC

VCC5
VCC4
VCC3
VCC2
VCC1

115
88
76
46
19

C19
2
1
10U_6.3V_Y 0805_Y5V
C482
2
1
0.1U_16V_M 0402_X5R
C18
2
1
0.1U_16V_M 0402_X5R
C483
2
1
0.1U_16V_M 0402_X5R
C488
2
1
0.1U_16V_M 0402_X5R
C489
2
1
0.1U_16V_M 0402_X5R

2

C6072
0.01U_10V_K
0402_X7R

1

EC_VADAPT

A

2
1
C484
10U_6.3V_Y
0805_Y5V

+ECVCC

4,15 PM_THRMTRIP#

NPCE783LA0DX
null

PM_SLP_S3#

1

PM_SLP_S4#

1

PM_SLP_S5#

1

PM_THRMTRIP#

TP1126 tpc40t_50

+ECVCC

TP1127 tpc40t_50
SPI_ROM_CS# R295 1 8.2K_J

2 0402

TP1128 tpc40t_50
15 SYSTEM_ID1

DVT

15 SYSTEM_ID0

DVT
DVT

MODEL ID0-1

SYSTEM ID0-2

+ECVCC

+ECVCC
NC_10K_J
2 0402
NC_10K_J
1
2 0402

R70

1

R67

D

ID1(CKG) ID0(dGPU)

MODEL_ID0

R69

1 100K_J 2 0402

MODEL_ID1

R66

1 100K_J 2 0402

SKU

0

0

L

0

1

Reserved

1

0

M

1

1

H

NC_10K_J
2
NC_10K_J
R396 1
2
NC_10K_J
R5882 1
2
NC_10K_J
R5900 1
2
R394 1

0402

SYSTEM_ID0

R395 1 100K_J 2 0402

0402

SYSTEM_ID1

R397 1 100K_J 2 0402

0402

SYSTEM_ID2

R5883 1 100K_J 2 0402

0402

SYSTEM_ID3

R5891 1 100K_J 2 0402

DVT
D

DVT

EVT

ID3

ID2

ID1

ID0

0

0
1

0

0

M960

0

0

M970

0

0

0

M980

0
1

SKU

FOXCONN

Title

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

EC+KBC(NPCE783L)

Size
Document Number
Custom

Rev

M960&M970 H Model

Date:
1

2

3

4

5

6

7

Tuesday, December 29, 2009

Sheet

SA
39

8

of

86

4

3

2

1

34

5

SMDFIX2

KBC Conn
D

C

D

KSO16
KSO17
KSI0
KSI1
KSI2
KSO0
KSO1
KSO2
KSI3
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSI4
KSO9
KSI5
KSI6
KSO10
KSI7
KSO11
KSO12
KSO13
KSO14
KSO15

KSO16
KSO17
KSI0
KSI1
KSI2
KSO0
KSO1
KSO2
KSI3
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSI4
KSO9
KSI5
KSI6
KSO10
KSI7
KSO11
KSO12
KSO13
KSO14
KSO15

39
39
39,59
39,59
39,59
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39

C

SMDFIX1
33

CN38
FPC CONN_32P
FOX_GB1SH320-1280-7H

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

BFT Test Pad(Top)

B

BFT Test Pad(Bottom)

TP1198

tpc40t_75

1

KSI7

TP1199

tpc40b_75

1

KSI7

TP1200

tpc40t_75

1

KSO10

TP1201

tpc40b_75

1

KSO10

TP1202

tpc40t_75

1

KSO6

TP1203

tpc40b_75

1

KSO6

TP1204

tpc40t_75

1

KSI2

TP1205

tpc40b_75

1

KSI2

TP1206

tpc40t_75

1

KSI0

TP1207

tpc40b_75

1

KSI0

TP1233

tpc40t_75

1

KSI3

TP1234

tpc40t_75

1

KSO13

B

PVT
A

A

FOXCONN

Title

KB Connector

Size
B

Document Number

Date:
5

4

3

2

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division
Rev

M960&M970 H Model
Tuesday, December 29, 2009

Sheet
1

SA
40

of

86

5

4

3

2

1

D

D

SPI_ROM_SDI
SPI_ROM_SDO
SPI_ROM_CLK

39,42 SPI_ROM_SDI
39,42 SPI_ROM_SDO
39,42 SPI_ROM_CLK

+ECVCC
+ECVCC

2

8
7
6 SPI_ROM_CLK
5SPI_ROM_SDO

4
R43
NC_10K_J
0402

DVT

R775

SPI ROM (EC Firmware)

C

MEMCS_MB#

2

39,42 SPI_ROM_CS#

FLASH_SOIC-8P_1MB
W25X10BVSNIG

R386
NC_1K_J
0402

U3
NC_MC74HC1G32DTT1G
1

CARD_INSERT

42 CARD_INSERT

3

CS#
VCC
DO/IO1 HOLD#
WP#
CLK
GND
DI/IO0

1

1
2
3
4

C20
NC_0.1U_16V_Y
0402_Y5V

5

U23
MEMCS_MB#
22_J 2 0402 SPI_ROM_SDI_R
SPI_ROM_WP#

R387
0402
1K_J

2

2

C485
0.1U_16V_Y
0402_Y5V

2

2

R385
3.3K_J
0402
SPI_ROM_SDI R388 1

1

2

1

1

+ECVCC

1

1

+ECVCC

1 0_J

2 0402
C

For M930 MP will dummy R43, C20 ,U3 ,CN30 and stuff R775

SPI ROM (EC Firmware) (1Mb)

PVT

B

B

A

A

FOXCONN
Title

Size
A3
Date:
5

4

3

2

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

SPI Flash ROM
Document Number

Rev

M960&M970 H Model
Sheet

Tuesday, December 29, 2009
1

SA
41

of

86

4

3

2

14

5

D

+ECVCC

1

FOX_GB5RF120-1203-7F
NC_FPC_12P

D

SMDFIX2

SPI_ROM_CLK
SPI_ROM_SDO
SPI_ROM_SDI
SPI_ROM_CS#
MB_FLASH_EN
CARD_INSERT

39,41 SPI_ROM_CLK
39,41 SPI_ROM_SDO
39,41 SPI_ROM_SDI
39,41 SPI_ROM_CS#
39 MB_FLASH_EN
41 CARD_INSERT

12
11
10
9
8
7
6
5
4
3
2
1

PVT

DVT
13

SMDFIX1

CN30

EXTERNAL SPI ROM INTERFACE (EC)

C

C

CN15
+ECVCC

39,59 PWRSW#
+5VRUN
+ECVCC
39
E51RXD
39
E51TXD
12
SB_RST#

1
LPC_AD1
3
LPC_AD3
5
LPC_DRQ#0
7
9
BUF_PLT_RST#
11
INT_SERIRQ 13
15
17
19
21
E51RXD 23
E51TXD 25
27
29
SMDFIX3

34

31
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30

SMDFIX4

B

SMDFIX2

10,39 LPC_AD1
10,39 LPC_AD3
10 LPC_DRQ#0
12 PM_SUS_STAT#
4,14,39,43 BUF_PLT_RST#
10,39 INT_SERIRQ

SMDFIX1

32

LPC_AD0
LPC_AD2
LPC_FRAME#

LPC_AD0 10,39
LPC_AD2 10,39
LPC_FRAME# 10,39
ID_LPC_PCI# 15

PM_CLKRUN#
PCLK_FWH

1

TP32

PM_CLKRUN# 12,39
PCLK_JIG 14
tpc40b_50

1

TP31

tpc40b_50

+3VRUN

PLT_RST#

PLT_RST# 14,22,44,45,50

B

33
PCLK_JIG

1

B TO B CONN_2x15P
FOX_QT510306-L011-7F

2

JIG-120

C6344
33P_50V_J
0402_NPO

For EMI

PVT

A

A

FOXCONN
Title

Size
A3
Date:
5

4

3

2

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

Debug Port
Document Number

Rev

M960&M970 H Model
Sheet

Tuesday, December 29, 2009
1

SA
42

of

86

3

2

EXPRESS_TXP6_R
EXPRESS_TXN6_R

27

11 EXPRESS_TXP6
11 EXPRESS_TXN6

D

1 0603
1206
1
4

DVT

L39
4
1

11 CLK_PCIE_EXPRESS
11 CLK_PCIE_EXPRESS#

+1_5VRUN

1 0603
1206
3
2

11 EXPRESS_RXP6
11 EXPRESS_RXN6
CLK_PCIE_EXPRESS_R
CLK_PCIE_EXPRESS#_R
CPPE#
0_J 1
2
R644 0402

EXPRESS_DET#_R
+3_3V_PCIE_OUT

EVT

PERST#
+3_3VAUX_PCIE_OUT

12,44,45 PCIE_WAKE#

+1_5V_PCIE_OUT

+3VRUN
U42

2

3.3VIN

3.3VOUT

3

+3_3V_PCIE_OUT

12

1.5VIN

1.5VOUT

11

+1_5V_PCIE_OUT

AUXIN

AUXOUT

15

STBY#
SHDN#

1
20

OC#
PERST#

19
8

RCLKEN
SYSRST#

18
6

7

GND

PERST#_R

RUN_ON 38,39,81
SUS_ON 39,49,61,76,81

2
R640

0_J

USB_PP3
USB_PN3

3
2
NC_90R-100MHZ_0R35

PERST#
1
0402

2
R289

BUF_PLT_RST# 4,14,39,42

1 0603
4
1

L38

CLKEN

TPS2231RGP
null

14
14

1

NC_1
NC_2
NC_3
NC_4
NC_5

R292
2 0_J

0_J

+3_3V_2
+3_3V_1
PERST#
+3_3VAux
WAKE#
+1_5V_2
+1_5V_1

CPUSB#
USB_PP3_R
USB_PN3_R

1206
1
0603

SMDFIX2

15
14
13
12
11
10
9
8
7

SMB_DATA
SMB_CLK

6
5

RESERVED_2
RESERVED_1

4
3
2
1

CPUSB#
USB_D+
USB_DGND_1
CN11

C

R5457

2

4
5
13
14
16

0402
NC_0_J 0402
NC_0_J 0402
0402

+3_3VAUX_PCIE_OUT
R675 2 0_J
1 0402
R674 2 NC_0_J 1 0402

1

0402
0402
0402
0402

2
1
1
2

GND_4
PETp
PETn
GND_3
PERp
PERn
GND_2
REFCLK+
REFCLKCPPE#
CLKREQ#

D

NC_470K_J
0402

G

Pin2,4 & Pin12,14
Pin3,5 & Pin11,13
short for GMT577 test

1
1
1
1

1 4.7K_J
2
2
1 4.7K_J

3

11 EXPRESS_DET#

EXPRESS_CLK_EN#

2

Express Card Slot.

S

0_J
0_J
0_J
0_J

+3_3VAUX_PCIE_OUT R624
R635
R622
+3_3VAUX_PCIE_OUT R623

11,19,20,21 SMB_DATA_R
11,19,20,21 SMB_CLK_R

D

2
2
2
2

21

R677
R683
R685
R682

CPPE#
CPUSB#

THERMAL PAD

17
CPPE# 10
CPUSB# 9

C

+3_3V_PCIE_OUT
+1_5V_PCIE_OUT

0603

NC_90R-100MHZ_0R35 EXPRESS_CLK_EN#
2
1
R317
0_J
0603

+1_5V=>1.3A
+3_3VAux=>0.6A
+3_3V=>1.5A
+3VSUS

0_J

26
25
24
23
22
21
20
19
18
17
16

SMDFIX1

R323
2 0_J

1

28

2
R337

FOX_1CH4310C-SY-9H
EXPRESS CARD HEADER_26P

NC_90R-100MHZ_0R35

29

L40
2
3

PTH2

R343
2 0_J

1

PTH1

4

30

5

null
NC_2N7002W
Q38

PVT

2 0_J
R686

+3VSUS

1 0402

DVT

+1_5VRUN

+3VRUN

1

C801
0.1U_16V_Y
0402_Y5V

2

1

C808
NC_10U_6.3V_M
0805_X5R

2

1

C806
0.1U_16V_Y
0402_Y5V

2

1

C814
NC_10U_6.3V_M
0805_X5R

2

2

2

C813
0.1U_16V_Y
0402_Y5V

1

B

1

B

C807
NC_10U_6.3V_M
0805_X5R

CN10

1

1

2

2

1

1
2

C432
10U_6.3V_M
0805_X5R

2

1

C430
C797
0.1U_16V_M 4.7U_10V_Y
0402_X5R
0805_Y5V

PTH1

PTH2

2

EXPRESS CARD EJECTOR_26P
FOX_1CX44201-SY-4H

+1_5V_PCIE_OUT

2

C422
NC_10U_6.3V_M
0805_X5R

1

1
2

C421
C810
0.1U_16V_M 4.7U_10V_Y
0402_X5R
0805_Y5V

2

1

+3_3V_PCIE_OUT

2

2

1

+3_3VAUX_PCIE_OUT

Express Card
Socket Housing

1

C419
C796
0.1U_16V_M 4.7U_10V_Y
0402_X5R
0805_Y5V

Express Card Housing.

C417
10U_6.3V_M
0805_X5R

A

A

Place near by CN11 Pin.

FOXCONN

EXPRESS CARD

Size
A3

Document Number

Date:
5

4

3

2

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

Title

Rev

M960&M970 H Model
Sheet

Tuesday, December 29, 2009
1

SA
43

of

86

4

53

5

11
11

WLAN_TXN1
WLAN_TXP1

WLAN_RXN1
WLAN_RXP1
WLAN_TXN1
WLAN_TXP1

SMDFIX1

1
R5747
NC_10K_J
0402

MP

D

WLAN_EN 39
PLT_RST# 14,22,42,45,50

MINI_PCIE_+3_3V

+3VSUS

EVT

MINI_PCIE_+1_5V

EVT
USB_PN12_L
USB_PP12_L

J5

WWAN_LED#
WLAN_LED#
A4311
1
TP74
MINI_PCIE_+1_5V

WWAN_LED#

2

20MIL

1

C6329
680P_50V_K
0603_X7R

C6330
680P_50V_K
0603_X7R

WLAN_LED#

OPEN_JUMP_OPEN2

EVT

MINI_PCIE_+3_3V

For RF Noise

SOCKET_2x26P
FOX_AS0B226-S68N-7H

54

MINI_PCIE_+3_3V

+3VSUS

MINI_PCIE_+1_5V

1

WLAN_RXN1
WLAN_RXP1

MINI_PCIE_+3_3V

2

11
11

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

+3.3VAUX1
GND1
+1_5V1
UIM_PWR
UIM_DATA
UIM_CLK
UIM_RST#
UIM_VPP
GND4
W_DISABLE#
PERST#
+3.3VAUX2
GND6
+1_5V2
SMB_CLK
SMB_DATA
GND9
USB_DUSB_D+
GND12
LED_WWAN#
LED_WLAN#
LED_WPAN#
+1_5V3
GND14
+3.3VAUX5

1

CLK_PCIE_WLAN#
CLK_PCIE_WLAN

1

2

D

11 CLK_PCIE_WLAN#
11 CLK_PCIE_WLAN

WAKE#
BT_DATA
BT_CHCLK
CLKREQ#
GND2
REFCLKREFCLK+
GND3
UIM_C8
UIM_C4
GND5
PERn0
PERp0
GND7
GND8
PETn0
PETp0
GND10
GND11
+3.3VAUX3
+3.3VAUX4
GND13
RESERVED16
RESERVED17
RESERVED18
RESERVED19

2

CN12

2

11 WLAN_CLKREQ#

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

SMDFIX2

PCIE_WAKE#
WIRELESS_DATA
WIRELESS_CHCLK
WLAN_CLKREQ#

12,43,45 PCIE_WAKE#

3

DVT

EVT

Half Size Mini Card

C

Power Test Test Point (Top)
TP1223 tpc60t_100

C

WIRELESS_LED_QR

1

BT_3V

1

1

BT_3V
C6
0.1U_6.3V_K
0402_X5R

+3VSUS

WIRELESS_LED_QR

4

D1
BD4148FPT

1 NC_0_J 2 0402

SW4
1BS007-12110-002-7H_SW-SMD7P
null

1

6
4
1

BT_WLAN_SW# 39

BT_CHCLK 53

0402

53
Q1
2N7002ESPT
null

BT_LED

B

C
E

2

WLAN_LED#

Q5

1

B

DTC144EUB
null

EVT

WLAN_LED:Active S0,S3

DVT

BT_ON:Active S0 ,S3

2

NPTH2

2
3

0_J

2

R8
100K_J
0402

NPTH1

8

1
R5753

2

S
WIRELESS_CHCLK

SMDFIX2 SMDFIX1

G

WLAN_EN 1

Wireless Switch
9

WIRELESS_LED 55

D

DVT
B

3

74AHC1G08GW

2

R7

E
C Q2
DTA114YUB
null

B

3 2

R5
100K_J
0402

1

BT_DATA 53

1

3

2

1

WIRELESS_DATA

3

2

U1
1

5

2

2

R6
10K_J
0402

+3VSUS

C10
10U_6.3V_M
0805_X5R

1

C4
10U_6.3V_M
0805_X5R

CAP16
+ NC_150U_6.3V_R
6TPE150MAZB

2

C1
0.1U_6.3V_K
0402_X5R

1

C16
0.1U_6.3V_K
0402_X5R

2

C15
NC_22U_6.3V_M
0805_X5R

1

MINI_PCIE_+3_3V

2

2 0805

1

C47
NC_10U_6.3V_M
0805_X5R

R28
0_J

2

1

C11
NC_10U_6.3V_M
0805_X5R

2

2

C5
NC_0.1U_6.3V_K
0402_X5R

1

1

MINI_PCIE_+1_5V

1

2 0603

2

NC_0_J
R9 1

This is a reserved circuit.
According to RF comment,
this circuit could be deleted
if Layout space is not enough.

1

PIN8,9 : NPTH

+3VSUS : 1500mA MAX

+1_5VRUN : 330mA MAX

2

+1_5VRUN

1

SW4

C821
0.1U_10V_K
0402_X5R

2

1
2

7
5

SMDFIX4 SMDFIX3

A

MINI_PCIE_+3_3V
14

USB_PN12

USB_PN12_L

1
2
3
4

1OE VCC
1A 2OE
1B
2B
GND 2A

A

C891 NC_0.1U_16V_Y
1
2
0402_Y5V

EVT U45
8
7
6
5

MINI_PCIE_+3_3V
MINI_PCIE_+3_3V
USB_PP12_L

FOXCONN

USB_PP12 14

Title

NC_SN74CB3Q3305PW

Size
A3
Date:

5

4

3

2

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

Mini-PCIE Card (WLAN)
Document Number

Rev

M960&M970 H Model
Sheet

Tuesday, December 29, 2009
1

SA
44

of

86

5

4

3

2

1

For 8059 Dummy R88 ,C151, and Stuff R87 ,C148
For 8057 Dummy R87, C148 and Stuff R88 ,C151

C151
NC_0.1U_16V_Y
0402_Y5V

D

+3V_S3_LAN

D

VDD

LAN_RXP3

C985 1

2 0.1U_6.3V_K 0402_X5RGLAN_RXP_C

37

TX_P

SPI_DO

11

LAN_RXN3

C987 1

2 0.1U_6.3V_K 0402_X5RGLAN_RXN_C

38

TX_N

VDD_3

23

39

AVDD_18_2

MDIN[3]

22

MDI3-

46

40

RX_N

MDIP[3]

21

MDI3+

46

41

RX_P

AVDDL_2

20

42

REFCLKP

MDIN[2]

19

MDI2-

46

43

REFCLKN

MDIP[2]

18

MDI2+

46

44

VDD_OUT

MDIN[1]

17

MDI1-

46

45

AVDD18_OUT

MDIP[1]

16

MDI1+

46

46

VDDO_TTL_3

AVDDL_1

15

47

LED_LINK1000N

MDIN[0]

14

MDI0-

46

48

LED_DUPLEXN

MDIP[0]

13

MDI0+

46

49

THERMAL PAD

1
2

+3V_S3_LAN

1

8

2

VCC
GND

B

1
VDD

Close to Chip
C67
0402_X5R

0402_X5R C59
NC_0.1U_6.3V_K
2
1

C25
NC_1U_6.3V_M
0805_Y5V 0402_X5R

0402_X5R C58
NC_0.1U_6.3V_K
2
1

1

C24

2

88E8059-A0-NNB2C000-P123
null

XTALO

2
R1001
4.7K_J
0402

14,22,42,44,50 PLT_RST#
12,43,44 PCIE_WAKE#

For 8059 Dummy R96 ,C155, and Stuff R95 ,C154
For 8057 Dummy R95, C154 and Stuff R96 ,C155

R96 2
1
0402 NC_0_J

1
1

+1_8V_AVDD_LAN
8057_VDD

C154
0.1U_16V_Y

C988
27P_50V_J
0402_NPO

C989
27P_50V_J
0402_NPO

Date:
3

LAN (88E8057) 1/2

Size
Document Number
Custom

EVT
4

A

HAI PRECISION IND. CO., LTD.
FOXCONN HON
CPBG - R&D Division

Title

0402_Y5V

Dummy all when use 88E8059 (A0/Z0)

XTALO

25MHZ_20P_30PPM
ITTI_L5030-25.000-20
2

R95 2
1
0402 0_J

C135
NC_0.1U_16V_Y
0402_Y5V

1

2
1
NC_0_J 0402

2

R79

2

1

0_J 0402

2

1
C155
NC_0.1U_16V_Y
0402_Y5V

2 R816

0402

Y6
AVDD_18_1

VDD

2

R1227
NC_1M_J

+3V_S3_LAN

DVT

A

1

XTALI

1

NC_4.7K_J
0402

For 8059, Dummy R1003
For 8057, Stuff R1003

5

1

4
2
4

C54
NC_10U_10V_M
0805_X5R

8057_PD

1

2
1

C137
0.1U_16V_Y
0402_Y5V

0402_X5R

XTALO_Y6

EVT

Stuff R94 C997
Dummy R94, C997

C56

XTALI
R1003
2

For 8057
For 8059

Q6

c

RSET
12

XTALO

XTALI
11

VDD_2

e

1 b

2

3

NC_4.7K_J
1
2
0402

426mA

1

1
2

C997
NC_4.7U_6.3V_K
0603_X5R

1

1
1
2
R23

NC_0.1U_16V_M_B
2
1

EVT

R1000
0402
1 4.99K_F 2

AVDD_18_1

C

U11
NC_EEPROM_TSSOP-8P_8KB
HT24LC08

Dummy all when use 88E8059 (A0/Z0)

+3V_S3_LAN

DVT
CTRL_1D2

C388
NC_1U_10V_Y_Y
0603

1
2
3
7

EVT

+3V_S3_LAN
VDDO_TTL4

2

2

PVT

PVT

+3V_S3_LAN

SCL
SDA

A0
A1
A2
WP

24

8057_VDD

R94 1
2
NC_0_J 0402

6
5

C121
0.1U_16V_Y
0402_Y5V

NC_BCP69T1G

10

VDDO_TTL3

For 8059 Stuff R91, C995, R5965
For 8057 Dummy R91, C995, R5965

C120
0.1U_16V_Y
0402_Y5V

2

2

DVT

R91 1
0402

R261
NC_4.7K_J
0402

VPD_CLK
VPD_DATA

NC_10U_6.3V_Y_Y
2
1

1

2
0_J

C995
10U_6.3V_M
0603_X5R

LOM_DISABLEN

+1_8V_AVDD_LAN

C117
0.1U_16V_Y
0402_Y5V

CTRL_1D2

9

LED_ACTN

Place C993/C994
close as U70 pin
DVT
For 8059 Stuff R89,R90, C993 ,C994
For 8057 Dummy R89,,R90, C993 ,C994

8

R5965 1
0402

AVDD_18_1

2
0_J

7

+3V_S3_LAN

VDD_1

C993
10U_6.3V_M
0603_X5R

WAKEN

C994
4.7U_6.3V_K
0603_X5R

DVT

88E8059

6

AVDD18_OUT_8057

2

1
2

R90 1
0402
1

2
0_J

EVT

VDD_OUT_8057

5

R89 1
0402

2
0_J

PERSTN

11 CLK_PCIE_LAN#

4

11 CLK_PCIE_LAN

+1_8V_AVDD_LAN

PD10LDO

LAN_TXP3

3

LAN_TXN3

11

LED_LINK10/100N

VDD

11

DVT

2

DVT

2
0402_Y5V

1

C6341 1
0.1U_16V_Y

C131
0.1U_16V_Y
0402_Y5V

1

C6077
1000P_50V_K
0402_X7R

2

2

1

26

25

27

+1_8V_AVDD_LAN

11

For 8059 Stuff C6341
For 8057 Dummy C6341

+3V_S3_LAN

U218

SPI_DI

SPI_CS

SPI_CLK

28

29
VDD_4

VPD_CLK

31

30
VDDO_TTL_1

32
CLKREQN

VPD_DATA

34

33
VDDO_TTL_2

35

36
1

VDD_5

TESTMODE

VMAIN_AVLBL

2

1

MP

EVT

R264
NC_4.7K_J
0402

1

2

C139
0.1U_16V_Y
0402_Y5V

R6010
0_J
0402

2

NC_BAS316PT

2

R82 2
1
0402 0_J

+1_8V_AVDD_LAN

EVT

B

2

+3VRUN

C

1

For 8059 Z0 version ONLY,
It's LDO Power-Up Issue workround.

2

VDD

R85 1
2
NC_0_J
0402
C150
NC_0.1U_16V_Y
0402_Y5V

D5
2

1

+3V_S3_LAN
8057_VDD5

VDD

D30
1

NC_BAS316PT

2

8057_VDD_TTL2

8057_VDD3 1
R83 2
0402 NC_0_J
C147
NC_0.1U_16V_Y
C998
0402_Y5V
4.7U_6.3V_K
0603_X5R
VDD

2

8057_VDD_TTL2

1
0402

1

R84

+1_8V_AVDD_LAN

C128
0.1U_16V_Y
0402_Y5V

+1_8V_AVDD_LAN

EVT
VPD_DATA
VPD_CLK

2
0_J

C129
0.1U_16V_Y
0402_Y5V

1

EVT

PVT

C132
0.1U_16V_Y
0402_Y5V

For 8059 Dummy R83 ,C147, and Stuff R82 ,C139
For 8057 Dummy R82, C139 and Stuff R83 ,C147

11 CLK_REQ_LAN#
+3V_S3_LAN

C134
0.1U_16V_Y
0402_Y5V

2

2

0402_Y5V

For 8059 Dummy R85 ,C150, and Stuff R84
For 8057 Dummy R84 and Stuff R85 ,C150

1

VDD
C148
0.1U_16V_Y

1

R87 2
1
0402 0_J

CLK_PCIE_LAN
CLK_PCIE_LAN#

1

1
1

2

TP505
TP506

2

20MIL
20MIL

HCB1608KF-121T25

1

L68
120R-100MHZ_0603

+3V_S3_LAN

NC_0.1U_6.3V_K
2
1

+3VSUS

1

R88 2
1
0402 NC_0_J

2

+3V_S3_LAN
8057_VDD5

2

Rev

M960&M970 H Model
Tuesday, December 29, 2009
1

Sheet

SA
45

of

86

A

B

C

D

E

4

4

PVT
+1_8V_AVDD_LAN

L47

2

1

For EMI

C568
1000P_50V_K
0402_X7R

CN28

10

+1_8V_AVDD_LAN_1
300R-100MHZ_0603
TB160808U301N003

SMDFIX2

3

MDI0+
MDI0-

MDI0+
MDI0-

45
45

MDI1+
MDI1-

MDI1+
MDI1-

45
45

MDI2+
MDI2-

MDI2+
MDI2-

45
45

MDI3+
MDI3-

MDI3+
MDI3-

C783 0.1U_10V_K 0402_X5R
L70
1
2
1 TCT1
2 TD1+
C784 0.1U_10V_K 0402_X5R 3
TD11
2
4 TCT2
5
C782 0.1U_10V_K 0402_X5R 6 TD2+
TD21
2
7 TCT3
8
C781 0.1U_10V_K 0402_X5R 9 TD3+
TD31
2
10 TCT4
11 TD4+
12 TD4-

MCT1
MX1+
MX1MCT2
MX2+
MX2MCT3
MX3+
MX3MCT4
MX4+
MX4-

24
23
22
21
20
19
18
17
16
15
14
13

RJ45_1
RJ45_2
RJ45_3
RJ45_4
RJ45_5
RJ45_6
RJ45_7
RJ45_8

R355
2

75_J 0402
1

R356
2

75_J 0402
1

R357
2

75_J 0402
1

R358
2

75_J
1 0402

HEADER CONN_8P
FOX_HS6208E-LH

3

RJ45
BFT Test Point(TOP)

1

45
45

RJ45_1
RJ45_2
RJ45_3
RJ45_4
RJ45_5
RJ45_6
RJ45_7
RJ45_8

9

SMDFIX1

8
7
6
5
4
3
2
1

1-1_350UH
LFE9249-R

2

MP

C809
1500P_2KV_K
1808_X7R

TP1166

tpc40t_75

1

RJ45_8

TP1174

tpc40t_75

1

RJ45_4

TP1168

tpc40t_75

1

RJ45_7

TP1176

tpc40t_75

1

RJ45_3

TP1170

tpc40t_75

1

RJ45_6

TP1178

tpc40t_75

1

RJ45_2

TP1172

tpc40t_75

1

RJ45_5

TP1180

tpc40t_75

1

RJ45_1

2

2

BFT Test Point(Bottom)

TP1167

tpc40b_75

1

RJ45_8

TP1175

tpc40b_75

1

RJ45_4

TP1169

tpc40b_75

1

RJ45_7

TP1177

tpc40b_75

1

RJ45_3

TP1171

tpc40b_75

1

RJ45_6

TP1179

tpc40b_75

1

RJ45_2

TP1173

tpc40b_75

1

RJ45_5

TP1181

tpc40b_75

1

RJ45_1

1

1

FOXCONN

LAN (Transfomer)(2/2)

Size
A3

Document Number

Date:
A

B

C

D

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

Title

Rev

M960&M970 H Model
Sheet

Tuesday, December 29, 2009
E

SA
46

of

86

5

4

3

2

1

D

16

D

PTH2

Place near CN9
C393 1
C398 1

2 0.01U_10V_K 0402_X7R
2 0.01U_10V_K 0402_X7R

SATA_TXP0_C
SATA_TXN0_C

10
10

C404 1
C405 1

2 0.01U_10V_K 0402_X7R
2 0.01U_10V_K 0402_X7R

SATA_RXN0_C
SATA_RXP0_C

SATA_RXN0
SATA_RXP0

C

+5VRUN

C437
10U_10V_M
0805_X5R

2

1

C433
0.1U_16V_M
0402_X5R

2

1
2

2

C434
0.1U_16V_M
0402_X5R

1

D3
NC_SL22
null

1

2

1.5A

R639
0_J

S1
S2
S3
S4
S5
S6
S7

P1
P2
P3
P4
P5
P6
P7
P8
P9
P10
P11
P12
P13
P14
P15

17

1

0402

C

PTH1

10 SATA_TXP0
10 SATA_TXN0

CN9
SATA CONN_22P
FOX_LD2122F-SR3L6

B

B

SATA HDD CONN

A

A

FOXCONN

Title

Size
A4
Date:
5

4

3

2

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

SATA HDD
M960&M970 H Model

Document Number

Tuesday, December 29, 2009

Rev

SA

Sheet

47
1

of

86

1

2

3

4

5

14
16

A

+5VRUN

Place near CN33
10
10

SATA_RXP1
SATA_RXN1

SATA_RXP1_C
SATA_RXN1_C

C625 1
C630 1

2 0.01U_10V_K 0402_X7R
2 0.01U_10V_K 0402_X7R

SATA_TXN1_C
SATA_TXP1_C

S7
S6
S5
S4
S3
S2
S1

15
17

2 0.01U_10V_K 0402_X7R
2 0.01U_10V_K 0402_X7R

8

DVT

A

PTH4
PTH2

10 SATA_TXN1
10 SATA_TXP1

C610 1
C614 1

7

PTH3
PTH1

P6
P5
P4
P3
P2
P1

FOX_LN21131-D40L-9H
SLIMLINE SATA_13P

6

CN33

SATA ODD CONN
B

B

+5VRUN

2

+ CAP11
NC_47U_10V_6032
10TPB47MC

1

1
C177
0.1U_16V_M
0402_X5R

2

1
2

2

C176
0.1U_16V_M
0402_X5R

C198
10U_10V_M
0805_X5R

1

D8
NC_SL22
null

1

2

2.5A

DVT

C

C

D

D

FOXCONN
Title

Size
A3

SATA ODD
Document Number

2

3

4

5

6

Rev

M960&M970 H Model

Date:
1

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

Tuesday, December 29, 2009
7

Sheet

SA
48
8

of

86

5

4

3

U41

DVT
1
2

1
2
3
4

C386
1U_25V_M_B
0603_X5R

C713
0.1U_16V_Y_Y
1
2

TP552 tpc40t_75
1

+5VALW
D

2

0402_Y5V

USB_VCC0

8
7
6
5

GND OUT_3
IN_1 OUT_2
IN_2 OUT_1
EN(EN#) OC#

1

D

USB_OC#0 14

G545B1P8U

39,43,61,76,81 SUS_ON

0603

1

2

C712
470P_50V_K_B
0402

VCC
VV+
GND

+3VRUN

DVT

ESATA USB CONN_11P
FOX_3Q38111-R21C3-8H

D15

NC1

EVT

NC2

A_EQ

R5952 1 NC_4.7K_J
2 0402

B_EQ

R5953 1 NC_4.7K_J
2 0402

A_PRE

R5954 1 NC_4.7K_J
2 0402

B_PRE

R5955 1 NC_4.7K_J
2 0402

C

6

Co-lay

C

C714
0.1U_16V_Y_Y
0402_Y5V

+

4

1

CAP25
150U_6.3V_R
6TPE150MAZB

1
2
3
4

5

0_J 2

CN27A
2 0805

3

NC_90R-100MHZ_0R35
R583

R1478
0_J
1

USB_VCC0
USB_VD0-_F
USB_VD0+_F

3
2

1

1206

4
1

2

USB_PN0
USB_PP0

USB_PN0
USB_PP0

1

14
14

2

L67

1

0_J 2 0603

1

2

R582

+3VRUN

NC_RSB12JS2

L62
SATA_RXP5_L
SATA_RXN5_L

2
3

SATA_TXN5_L
SATA_TXP5_L

0603
D24

L66
2
3

6

5

NC2
4

6

5

2 0_J

0603 2 0_J

NC1
NC2

4

1

2

3

1

2

3

D16

NC1

NC_RSB12JS2

SATA_RXP5_C

1
4

Place near CN27

NC_90R-100MHZ_0R35

CN27B

B

1206

1

SATA_RXN5_C

C765
C768

R588
SATA_TXN5_C

1 R592

C758
C744

2
2

1 0.01U_10V_K
1 0.01U_10V_K

0402_X7R
0402_X7R

2
2

1 0.01U_10V_K
1 0.01U_10V_K

0402_X7R
0402_X7R

SATA_RXP5_C1
SATA_RXN5_C1
SATA_TXN5_C1
SATA_TXP5_C1

1
4

0603

2 0_J

1

SATA_TXP5_C
+3VRUN

R591

Co-lay

B_OUTp
B_OUTn
GND_1
A_INn
A_INp

B_INp
B_INn
GND_2
A_OUTn
A_OUTp

1206

NC_90R-100MHZ_0R35

NC_RSB12JS2

11
12
13
14
15

5
4
3
2
1

1

SATA_RXP5_C0
SATA_RXN5_C0
SATA_TXN5_C0
SATA_TXP5_C0

C6320 2
C6321 2

1 NC_0.01U_10V_K
1 NC_0.01U_10V_K

0402_X7R
0402_X7R

C6322 2
C6323 2

1 NC_0.01U_10V_K
1 NC_0.01U_10V_K

0402_X7R
0402_X7R

VDD_2
AUTOPW_EN
B_EQ
A_EQ
A_BST#
THERMALPAD

11
10
9
8
7
6
5

R5958 1 NC_0_J 2 0402

SATA_RXP5 10
SATA_RXN5 10
SATA_TXN5 10
SATA_TXP5 10

16
17
18
19
20
21

13
12

SMDFIX_2 GND_3
SMDFIX_1
B+
BGND_2
shield_2
Ashield_1
A+
GND_1

U214
NC_PS8511BTQFN20GTR
null

1 R589

R5957 1 NC_0_J 2 0402

B_BST#

B

AUTOPW_EN
B_EQ
A_EQ
A_BST#

15
14

0603 2 0_J

A_BST#

B_BST#
A_PRE
B_PRE
EN
VDD_1

FOX_3Q38111-R21C3-8H
ESATA USB CONN_11P

2

EVT

2

Co-lay

DVT

10 B_BST#
9 A_PRE
8 B_PRE
7
6

1

AUTOPW_EN R5956 1 NC_4.7K_J
2 0402
C6318
C6319
NC_0.1U_16V_Y_Y NC_1U_25V_M_B
0402_Y5V
0603_X5R

EVT

USB + eSATA on MB
DVT

Close to U214
Pin11/12/14/15

Close to U214
Pin5/4/2/1

SATA_RXP5_C1

R5974 1 0_J

2 0402

R5959 1 0_J

2 0402

SATA_RXP5

SATA_RXN5_C1

R5975 1 0_J

2 0402

R5960 1 0_J

2 0402

SATA_RXN5

SATA_TXN5_C1

R5976 1 0_J

2 0402

R5961 1 0_J

2 0402

SATA_TXN5

SATA_TXP5_C1

R5977 1 0_J

2 0402

R5962 1 0_J

2 0402

SATA_TXP5

A

A

DVT

FOXCONN
Title

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

eSATA Combo

Size
Document Number
Custom

Rev

M960&M970 H Model

Date:
5

4

3

2

Sheet

Tuesday, December 29, 2009
1

SA
49

of

86

5

4

C785
1
2

3

2

2

MS_CLK

Close to U71
R1467
0_J
0402

MS_CD#

SD_CMD
SD_CLK
SD_DATA3
SD_DATA2
SD_DATA1
SD_DATA0

51

SD_WP#

TEST
G3

UDIO0
UDIO1
UDIO2
UDIO3
UDIO4
E3
G1
G2
H1
F3

SDBPWR
SDBCD#
SDBWP

C774
0.1U_10V_K
0402_X7R

2

1

1
2

1

C992
1U_10V_K
0402_X5R

33_J
33_J
33_J
33_J

DVT

MS HG-DUO CONN.

Close to U71

R5U231
null
B

EVT
+3VRUN
+3VRUN

UDIO1
1

R5U231_SCL
R5U231_SDA
R1461

2

R305
10K_J
0402
2

NC_47K_J
0402
2

2

55 SD_MS_LED#

R304
10K_J
0402

47K_J
0402

2

R1460

1

1

11 CARD_CLK_REQ#

C423
0.01U_10V_K
0402_X7R
U16

8

VCC

6
5

SCL
SDA

4

VSS

WP

7

A0
A1
A2

1
2
3

EEPROM_SOP-8_256x8
HT24LC02

SROM: UDIO1
Pull-Hi: Disable
Pull-Lo: Enable (Default)

A

A

FOXCONN

EVT

Title

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

PCIE (MS) 1/2

Size
Document Number
Custom

Rev

M960&M970 H Model

Date:
5

D

C775
0.1U_10V_K
0402_X7R

1

SDPWR_EN
SD_CD#

R5916 1
R5917 1
R5918 1
R5919 1

C799
10U_6.3V_M
0805_X5R

1

51
51

F2
F1
C6

B4
A5
A4
C4
A6
B5

SDBCMD
SDBCLK
SDBDAT3
SDBDAT2
SDBDAT1
SDBDAT0

5.1K_F
0402

CARD_CLK_REQ#
UDIO1
R5U231_SCL
R5U231_SDA
SD_MS_LED#

51
51
51
51
51
51

B

G7
G8
B1
B2
B6
E7
E8
G4
G5
H4
H8
J4

1

1
2

1500P_25V_K

0402_X7R C990
2
1

0.022U_16V_M
0402_X7R C991
2
1

R1002

Close to U71

AGND0
AGND1
GND0
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9

R5915 1 33_J

MS_DATA2
MS_DATA0
MS_DATA1
MS_BS

DATA7
DATA6
DATA4
DATA5
VSS_2
VCC
SCLK
DATA3
INS
DATA2
DATA0
DATA1
BS
VSS_1

C

VCC_CTRL_SD
C5

MS_DATA3

33_J
33_J
33_J
33_J

VCC_MS

D7

VCC_SD

C544
NC_22P_50V_J
0402_NPO

R5912 1
R5913 1
R5914 1
R5911 1

CN36
SOCKET_14P
YAMAICHI_JES014-2000-1
2 0402 MS_DATA7_R 14
2 0402 MS_DATA6_R 13
2 0402 MS_DATA4_R 12
2 0402 MS_DATA5_R 11
10
9
8
2 0402 MS_DATA3_R 7
MS_CD#
6
2 0402 MS_DATA2_R 5
2 0402 MS_DATA0_R 4
2 0402 MS_DATA1_R 3
MS_BS_R 2
2 0402
1

+3VRUN

1

PERST#
RXC
CPO
RREF

C772
0.1U_10V_K
0402_X7R

2

H2
G6
J8
J9

1

14,22,42,44,45 PLT_RST#

MF_VOUT

2

RXP
RXN

B3

C770
0.1U_10V_K
0402_X7R

1

J5
H5

AVCC_3V

2

1

PVT

2

CARD_TXP2
CARD_TXN2

11
11

0.1U_16V_Y_Y
2CARD_RXP2_C
2CARD_RXN2_C
0.1U_16V_Y_Y

C716 1
1
C717

1

TXP
TXN

CARD_RXP2
CARD_RXN2

2

J7
H7

11
11

C769
0.1U_10V_K
0402_X7R

2

REFCLKP
REFCLKN

H9
H6
J6

1

J3
H3

Close to U71
11 CLK_PCIE_CARD
11 CLK_PCIE_CARD#

PCIE_VIN2
PCIE_VIN1
PCIE_VIN0

C790
0.1U_10V_K
0402_X7R

2

TPAP0
TPAN0
TPBIAS0
TPBP0
TPBN0
CPS

1

D1
D2
D3
C1
C2
C3

2

+3VRUN

J2
A3

MS_CLK
C540
1U_10V_K
0402_X5R

MS_DATA7
MS_DATA6
MS_DATA4
MS_DATA5

Place the CAP close to CN36

EVT
PCIE_VOUT1
PCIE_VOUT0

C539
0.01U_10V_K
0402_X7R

2

C771
0.1U_10V_K
0402_X7R

1

C794
0.1U_10V_K
0402_X7R

2

J1
A7

1

VCC_3V1
VCC_3V0

R76
100K_J
0402

2

MS_DATA4
MS_DATA2
MS_DATA6
MS_DATA3

MS_DATA5
MS_DATA0

E2
E1

+3VRUN
U71

2

XI
XO

VCC_MS

MFCD0#
MFCD1#

XIN
A1
XOUT A2

MS_DATA1

MS_DATA7
MFIO14
1

EVT

MFIO00
MFIO01
MFIO02
MFIO03
MFIO04
MFIO05
MFIO06
MFIO07
MFIO08
MFIO09
MFIO10
MFIO11
MFIO12
MFIO13
MFIO14

MS_BS

G9
F7
F9
F8
E9
D8
D9
C8
C9
C7
B9
B8
A9
A8
B7

DVT

D

1

PVT

15
16
17
18

22P_50V_J 0402_NPO

SMDFIX_1
SMDFIX_2
SMDFIX_3
SMDFIX_4

R328
NC_10M_J
0402
XOUT

NPTH1
NPTH2

2 0402

19
20

R330 1 0_J

2

XOUT_R

1

C786
1
2

Y7
24.576MHZ_16P_30PPM
ITTI_L5030-24.576-16

1

2

XIN

22P_50V_J 0402_NPO

C

1

4

3

2

Sheet

Tuesday, December 29, 2009
1

SA
50

of

86

5

4

3

2

1

BFT Test Pad(Top)
TP1239

tpc40t_75

PVT
1

SD_WP#

EVT
VCC_CTRL_SD
U22

R391
0402
100K_J

R333
NC_10K_J
0402

Close to CN29

50

SD_WP#

50

SD_CD#

50
50

SD_DATA1
SD_DATA0

R5920 1 33_J
R5921 1 33_J

1
R1465

SD_CLK
50
50
50

0_J

2
0402

2 0402 SD_DATA1_R
2 0402 SD_DATA0_R

D

SD_WP#

WP
COM2
DC

8
7
6
5
4
3
2
1
9

SD_CLK_R
VCC_CTRL_SD

R5922 1 33_J
R5923 1 33_J
R5924 1 33_J

SD_CMD
SD_DATA3
SD_DATA2

1

CN29

12
11
10

50

Close to U71

SD POWER

tpc40b_75

DVT

2

C522
0.1U_10V_K
0402_X5R

TP1240

DVT

1
1

C518
1U_10V_K
0402_X5R

2

G553E1P11U
null

BFT Test Pad(Bottom)

500mA

EVT

2

C788
10U_6.3V_M
0805_X5R

1

1
2

2

1

50 SDPWR_EN
C789
NC_10U_6.3V_M
0805_X5R

GND OUT_1
IN_1 OUT_2
IN_2 OUT_3
EN/EN# OC#

8
7
6
5

1

1
2
3
4

2

D

2 0402 SD_CMD_R
2 0402 SD_DATA3_R
2 0402 SD_DATA2_R

13
14
15
16

GND1
GND2
GND3
GND4

DAT1
DAT0
VSS2
CLK
VDD
VSS1
CMD
CD/DAT3
DAT2

COM
Write Protect
Card Detect
8 DAT1
7 DAT0
6 VSS2
5 CLK
4 VDD
3 VSS1
2 CMD
1 CD/DAT3
9 DAT2

Case1

SD

+3VRUN

Case2

SOCKET_9P
FOX_WK21923-S6P3-4H

DVT

C

C

SD CONN.

+3VRUN

1

C767
10P_50V_J_N
0402_NPO

2

2

1

SD_CLK

EVT

C760
NC_0.1U_6.3V_K
0402_X5R

For EMI
B

B

A

A

FOXCONN
Title

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

PCIE (SD) 2/2

Size
Document Number
Custom

Rev

M960&M970 H Model

Date:
5

4

3

2

Tuesday, December 29, 2009

Sheet
1

SA
51

of

86

5

4

3

2

1

D

D

BFT Test Point(Bottom)
TP1156

tpc40b_75

1

USB_VCC9_F

TP1157

tpc40b_75

1

USB_PN9_F

TP1158

tpc40b_75

1

USB_PP9_F

TP1159

tpc40b_75

1

TP1160

tpc40b_75

1

TP1161

tpc40b_75

1

2

+3VSUS

+3VSUS

1

R5972
NC_0_J
0603

300mA
USB_VCC9_R

R5973
0_J
0603

1206L025
NC_6V-0.25A_1206
F16

DMIC_CLK_R

2

MAX4789EUK
null
R629

C840
0.1U_6.3V_K
0402_X5R

1

5
4

1

OUT
#FLAG

2

IN
GND
ON

1

1
2
3

C839
0.1U_6.3V_K
0402_X5R

2

2

1

U47

1

2

DMIC_DAT_R

EVT

10K_J
0402

C

C

Currert Limit Switch
7

3
2

1
2
3
4
5
6

C8
1U_10V_Y
0402_Y5V

SMDFIX2

C7
470P_50V_K
0402_X7R

EVT

PVT

PVT

DVT

L93

120R-100MHZ_0402
EBMS100505A121 0.5A
L94
C6314
15P_50V_K
0402_NPO

CAMERA w/DMIC CONN.
B

1

DMIC_DAT

1

61

HEADER CONN_6P
FOX_HS6106E-LH

120R-100MHZ_0402
EBMS100505A121 0.5A

2

DMIC_CLK

2

B

61

CN1

SMDFIX1

8

C9
10U_6.3V_Y
0805_Y5V

1

DMIC_CLK_R
DMIC_DAT_R

2

L46
1206
NC_90R-100MHZ_0R35
2
1
R377
0_J
0603

1

4
1

USB_VCC9_F
USB_PN9_F
USB_PP9_F

1

USB_PN9
USB_PP9

HCB1608KF-121T25
120R-100MHZ_0603
L1

1 0603

2

14
14

0_J

2

R376 2

C6315
15P_50V_K
0402_NPO

For EMI

A

A

FOXCONN

Camera w/DMIC Connector

Size
A3

Document Number

Date:
5

4

3

2

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

Title

Rev

M960&M970 H Model
Sheet

Tuesday, December 29, 2009
1

SA
52

of

86

5

4

3

2

1

D

+5VSUS

R259 0_J
2

BT_3V

100mA
U10

2
3

USB_PP13
USB_PN13

1
4

BT_PP_SW_L
BT_PN_SW_L
44

44

BT_LED

BT_DATA
BT_3V

6
7
8
9
10

B TO B_2x5P
FOX_QT510106-312H-7H

SMDFIX2

5
4
3
2
1

BT_PRS# 39
BT_CHCLK 44

1

1

2
R260 0_J

1
0603

EVT

11

SMDFIX1

4

AT5208-3.3KER
null
C373
0.1U_16V_Y
0402_Y5V

CN22

1206

NC_90R-100MHZ_0R35

5

2

C

VIN VOUT
GND
EN
NC

2

C369
1U_10V_Y
0603_Y5V

1

BT_ON

2

39

1
2
3

L34
14
14

0603
1

12

D

C377
2.2U_10V_Y
0603_Y5V

C

Place C377 close to CN22, Pin10

Bluetooth CONN.

B

B

A

A

FOXCONN
Title

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

Bluetooth Connector
M960&M970 H Model

Size
Document Number
Custom
Date:
5

4

3

2

Tuesday, December 29, 2009

Sheet
1

Rev

SA
53

of

86

5

4

3

2

1

D

D

2

+3VSUS

R5963
NC_0_J
0603

300mA
1
OUT

5

#FLAG

4

MAX4789EUK
null

C845
0.1U_6.3V_K
0402_X5R

1

IN
GND
ON

1

C869
0.1U_6.3V_K
0402_X5R

2

2

1

U48

1
2
3

1

+3VSUS

R5964
0_J
0603

1 R630
2
10K_J
0402

F14
NC_10V-0.125A_1206
1206L012

C

DVT

2

2

C

Currert Limit Switch
10mils
R192
0_J

L16

1

C142
NC_1U_10V_Y
0603

C171
470P_50V_K
0402

6
5
4
3
2
1

SMDFIX2

8

0603

Felica Conn.
B

CN7

SMDFIX1

2

C152
22U_10V_Y
1206

1

2
3

NC_90R-100MHZ_0R35
1206
2
1
R193
0_J

USB_VCC11_F
USB_PN11_F
USB_PP11_F

1

1
4

120R-100MHZ_0603
TB160808B121

USB_VCC11_L

2

14 USB_PN11
14 USB_PP11

7

0603

1
L25

2

2

FPC CONN_6P
FOX_GB5RF060-1203-8F

PVT
B

Felica Vdd Spec. (3.15V to 3.45V)

A

A

FOXCONN
Title

Size
A3
Date:
5

4

3

2

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

Felica Connector
Document Number

Rev

M960&M970 H Model
Sheet

Tuesday, December 29, 2009
1

SA
54

of

86

4

SATA_LED#
SATA_LED#_TP

HDD LED

+3VALW

PVT
E
C
DTA114YUB
null

R693
300_J
0402

2

3

1

OUT
IN

LED3
12-21-Y2C-AL2N1LY-2C
null

R919
300_J
0402

LIDIN#
LIDIN#

36,39

U21
EC2618NLB1GR
null

DVT

SD_MS_LED#_TP
LED4
12-21-Y2C-AL2N1LY-2C
null

PVT
2

2

2

GND

Q50
DTC114EUB
null

E
C

B

1
2

3
2

SATA_LED#_TP
1

50 SD_MS_LED#

C

OUT

39 CHARGE_LED

Q75
1

DTA114YUB
null

2

1

null

LED1
LTST-S321KGKT
null

DVT
PVT

C477
0.1U_16V_Y
0402_Y5V

2

1

1

2

LED2
LTST-S321KFKT

WIRELESS_LED_TP

+3VRUN

1

B

CHARGE_LED_TP

D

SD/MS LED

1

1

10 SATA_LED#

3

1
R689
300_J
0402

C

909_F
0402

2

PVT

WIRELESS_LED

PVT

SD_MS_LED#
SD_MS_LED#_TP

1
1

+ECVCC
Q49

WIRELESS_LED

LID Switch

+3VRUN

R692

44

TP1226 tpc60b_100
TP1230 tpc60b_100

2

1
1

2

BATT LED

1

WIRELESS LED

TP1225 tpc60t_100
TP1229 tpc60t_100

BFT Test Point (Top)

VDD

1WIRELESS_LED_TP

CHARGE_LED
CHARGE_LED_TP

1
1

1

PVT

GND

TP1227 tpc60t_100

TP1224 tpc60t_100
TP1228 tpc60t_100

Power Test Test Point (Top)

3

D

Power Test Test Point (Top)

2

2

Power Test Test Point (Top)

3

1

5

DVT

DVT
+3VALW

+3VALW

DVT

+3VALW

39 SCRLOCK_LED#
B

B

POWER LED
SUSPEND LED

R384
120_J
0402

DTA114YUB
null

3

DTA114YUB
null

PVT

649_F
0402

649_F
0402

1

2

649_F
0402

2

2
3

1

PVT

R5945

SUSPEND_LED 39

Q18
DTC114EUB
null
59

NUMLOCK_LED#_QR 59

CAPLOCK_LED#_QR 59

FOXCONN

3

2

A

SCRLOCK_LED#_QR

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

Title

Status LED & LID

Size
B

Document Number

Date:
4

E
C

B

1

R5947

59
SUS_LED
PWR_LED 59

5

Q181

E
C
3

3

PVT

B

R5946

2

261_F
0402

R691
1
2
1K_J 0402

DVT

1

PVT

1

2

2

D
3

R390
2

IN

A

GND

Q21
DTC114EUB
null

1

OUT

1

39 POWER_LED

G

1

2

2
3

Q48
CHT2301PT

1

1

1

1
2
3

D

S
Q51
CHT2301PT

OUT

G

GND

1

Q180

E
C
DTA114YUB
null

R690
10K_J
0402

IN

S
R695
1
2
1K_J 0402

B

2

Q179
1

39 NUMLOCK_LED#

R694
10K_J
0402

2

39 CAPLOCK_LED#
+3VALW

2

+3VALW

2

EVT

Rev

M960&M970 H Model
Tuesday, December 29, 2009

Sheet
1

SA
55

of

86

1

2

3

4

5

6

7

8

TP1162 tpc40t_75
VCCFAN1
1
A

A

DVT

TP1164 tpc40t_75
FAN1_TACH
1
TP1165 tpc40t_75
1

BFT Test Point(TOP)

C6292
10U_10V_M
0805_X5R

2

6V-1.5A_1206
1206L150

DTC144EUB
null

2

VCCFAN1

2

D32
1SS422

CN14
1
2
3

1
2
3
HEADER_3P
FOX_HS8103E

DVT

1

DVT

FAN1_TACH 39

4

F13
1

C6293
0.047U_16V_K
0402_X7R

4.7K_F
0603

5

C
E

SI2301BDS-T1-E3

2

3

B

2

D

2

Q80
1

FAN1_PWM

D31
NC_SL22

G
3

1

Q79

1

2

S

A4405

39

B

R5865
2

R5864
4.7K_J
0402

1

B

1

+3VRUN

1

2

1

+5VRUN

FAN

C

C

D

D

FOXCONN

Title

FAN

Size
B

Document Number

Date:
1

2

3

4

5

6

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division
Rev

M960&M970 H Model
Tuesday, December 29, 2009
7

Sheet

SA
56
8

of

86

5

4

3

2

1

+5VRUN

D

SW2
SKHMQKE010_SW-SMD5

VR2

EVT
2

4

1

LEFT#

EVT

SW3
SKHMQKE010_SW-SMD5

SW7
NC_SKHMQKE010_SW-SMD5

1

1

C119
0.047U_16V_Y_Y
0402_Y5V

2

2

4

EVT

5
3

C118
0.1U_16V_M_B
0402_X5R

1

PVT

5
3
CLK_TP
DAT_TP
null

47P_50V_J

LEFT#
RIGHT#

PVT

RIGHT#

null

4

SMDFIX1

FPC CONN_6P
FOX_GB5RF060-1203-8F
CN8

C

VR10

NC_MLVS0603M04_VR
NC_MLVS0603M04_VR

8

2

SMDFIX2

RIGHT#

VR1

1

6
5
4
3
2
1

1

+5VRUN_TP

2

47P_50V_J
C130 1
2 0402_NPO
C133 1
2 0402_NPO

2

4

C

2

CLK_TP
DAT_TP

NC_MLVS0603M04_VR

null
LEFT#

7

39
39

VR9

null

2

1

5
3

NC_MLVS0603M04_VR

1

2

SW6
NC_SKHMQKE010_SW-SMD5

2

2
F12
10V-0.125A_1206
1206L012

DVT

TP_LEFT Button

1

EVT

5
3

MP

1

TP_LEFT Button

1

D

TP_Right Button

PVT

Touch Pad Conn

For M960 Only

TP_Right Button
For M970 Only

M960/M970 T/P Control Table
B

B

SW2

M960
M970

SW3

SW6

SW7

Stuff Stuff Dummy Dummy
Dummy Dummy Stuff Stuff

A

A

FOXCONN
Title

Size
A3
Date:
5

4

3

2

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

Touch Pad
Document Number

Rev

M960&M970 H Model
Sheet

Tuesday, December 29, 2009
1

SA
57

of

86

A

B

C

D

E

4

4

3

3

VGA Thermal SENSOR
W83L771AWG
2

2

24 ATI_THERMDN
24,39 OVT_GFX#

C547
NC_2200P_50V_K_B
0402

R411
10K_J
0402

ATI_THERMDN

ATI_THERMDP

tpc40b_50

8
7
6
5

SMB_THRM_CLK
SMB_THRM_DATA

SMB_THRM_CLK 11,24,39
SMB_THRM_DATA 11,24,39

DDR_ALERT# 4

NC_W83L771AWG
null

PVT
1

Place Thermal-Sensor near DDR

TP246

1

VDD
SCL
D+
SDA
DALERT#
T_CRIT_A# GND

SM bus Address :
10011000(EC)
For W83L771AWG

TP245

1

R946
NC_10K_J
0402

U26

1
2
3
4

W/S:10/10 (microstrip)

1

C534
NC_0.1U_16V_Y
0402_Y5V

2

1
1

2

D20
NC_CH520S-30PT

1

ATI_THERMDP

2

24 ATI_THERMDP

2

2

1

+3VRUN

place close to thermal sensor

1

+3VRUN

ATI_THERMDN

FOXCONN

tpc40b_50

Thermal Sensor & Protection

Size
A3

Document Number

Date:
A

B

C

D

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

Title

Rev

M960&M970 H Model
Sheet

Tuesday, December 29, 2009
E

SA
58

of

86

5

4

3

2

1

D

D

BFT Test Pad(Top)

C

14

DVT
PWRSW#

PWRSW#
SCRLOCK_LED#_QR
CAPLOCK_LED#_QR
NUMLOCK_LED#_QR
KSI0
KSO18
KSI2
KSI1

TP1208

tpc40t_75

1

TP1210

tpc40t_75

1

PWRSW#

TP1209

tpc40b_75

1

TP1211

tpc40b_75

1

C

PWRSW#

FOX_GB5RF120-1203-7F
FPC_12P

SMDFIX2

39,42

55 SCRLOCK_LED#_QR
55 CAPLOCK_LED#_QR
55 NUMLOCK_LED#_QR
39,40
KSI0
39
KSO18
39,40
KSI2
39,40
KSI1
55 PWR_LED
55 SUS_LED

BFT Test Pad(Bottom)

12
11
10
9
8
7
6
5
4
3
2
1

13

SMDFIX1

CN2

B

B

Switch DB Conn.

A

A

FOXCONN

Title

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

SWITCH DB Connector

Size
Document Number
Custom

Rev

M960&M970 H Model

Date:
5

4

3

2

Sheet

Tuesday, December 29, 2009
1

SA
59

of

86

5

4

3

2

1

BFT Test Pad(Bottom)

D

TP1194

tpc40b_75

1

R_INT_SPK_R-

TP1195

tpc40b_75

1

R_INT_SPK_R+

TP1196

tpc40b_75

1

R_INT_SPK_L-

TP1197

tpc40b_75

1

R_INT_SPK_L+

D

L95
L97
L96
L98

FCM1608KF-221T05
FCM1608KF-221T05
FCM1608KF-221T05
FCM1608KF-221T05

R_INT_SPK_R+
R_INT_SPK_RR_INT_SPK_L+
R_INT_SPK_L-

1
2
3
4

JSPK1

SMDFIX1
SMDFIX2

6

VR6

DVT

NC_MLVS0603M04_VR

1

VR3

NC_MLVS0603M04_VR
2

1

1

VR5

NC_MLVS0603M04_VR
2

2
C

VR4

NC_MLVS0603M04_VR
2

INT_SPK_R+
INT_SPK_RINT_SPK_L+
INT_SPK_L-

1

61
61
61
61

5

INTERNAL SPEAKER
220R-100MHZ_0603
220R-100MHZ_0603
220R-100MHZ_0603
220R-100MHZ_0603

INT_SPK_R+
INT_SPK_RINT_SPK_L+
INT_SPK_L-

POWER CONN_4P
FOX_HS6204E

DVT

For EMI

C

If use ALC275 Codec, for Shut-down Codec Amp. power (PVDD1 and PVDD2)

1

+12V

0402
100K_J
R5968

EVT

1

PVT

2
3
C

B

E
2

0402

2

Q29
PMBT3906.215
null

1

1
1

R708
NC_10K_J
0402

B

R380
10K_J
0402

C
Q54
E
NC_PBSS2515E.115

R833
B

1

2

1

NC_1K_J 0402

2

C6351
1000P_50V_K
0402_X7R

E

E

1K_J

C

1 1

3

8.2K_J
0402

2

2

B

PBSS2515E.115

2

2

PVT
C6350
1000P_50V_K
0402_X7R

B

C
2

1

INT_SPK_R-

1

INT_SPK_L- R4

R381

1

Q26
R1

8.2K_J
0402

R371
22K_J
0402

3

2

1
C2
10U_10V_M
0805_X5R

2

E

DVT
PBSS2515E.115
Q31

R375 2
1
10K_J 0402
R374
10K_J
0402

2

PBSS2515E.115

C
1

B

C

B

E

2

1
Q24

0402

3

2
2

R370
22K_J
0402

1

Q2527_R

3

R2
INT_SPK_R+ 8.2K_J

1
2
C3
10U_10V_M
0805_X5R

Q27
PBSS2515E.115

2

2
C

B

E

1

0402

Q2527_R

61 SD_AMP#
+5VRUN
3

1
1

INT_SPK_L+ 8.2K_J

3

Q25
PBSS2515E.115

R3
B

PVT
C6349
1000P_50V_K
0402_X7R

2

2

1

PVT
C6348
1000P_50V_K
0402_X7R

A

A

FOXCONN

For Mor request,add the speaker cable short
protection circuit

Title

AUDIO SPEAKER CONNECTOR

Size
B

Document Number

Date:
5

4

3

2

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division
Rev

M960&M970 H Model
Tuesday, December 29, 2009

Sheet
1

SA
60

of

86

5

4

3

2

1

D

52

D

10
10
10
10
10
39
60

HDA_CODEC_SDATAIN0
HDA_CODEC_SDATAOUT
HDA_CODEC_RST#
HDA_CODEC_SYNC
HDA_SPKR
HW_POP_MUTE_EC
SD_AMP#

10 HDA_CODEC_BITCLK

C

52
52

DMIC_CLK
DMIC_DAT

60
60

INT_SPK_L+
INT_SPK_L-

60
60

INT_SPK_R+
INT_SPK_R-

+3VRUN

EVT

+3VALW

39,43,49,76,81 SUS_ON

DVT
+5VALW

14
14
14

USB_OC#3
USB_OC#2
USB_OC#1

14
14

USB_PP4
USB_PN4

14
14

USB_PP1
USB_PN1

14
14

USB_PP5
USB_PN5

DVT
F1

1

6V_2.6A_1812
miniSMDC260F-2

B

51

2

C773
10U_25V_M
1206_X5R

C

SMDFIX1

1

B

+5VALW_IN

2

DVT

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50

SMDFIX2

+5VRUN

CN31
FOX_GB5RF500-1203-8H
FPC CONNE_50P

PVT

A

A

FOXCONN

AUDIO/USB DB Conn.

Size
A3

Document Number

Date:
5

4

3

2

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

Title

Rev

M960&M970 H Model
Sheet

Tuesday, December 29, 2009
1

SA
61

of

86

5

4

3

2

1

Power Button Board
POWER BUTTON

P_GND

13

NUM LOCK LED

P_GND

P_CN3

DVT

14

SMDFIX2

FPC_12P
FOX_GB5RF120-1203-7F

1

HT-170UYG

HT-170UYG

HT-170UYG

P_LED1

P_LED2

P_LED3

DVT

2

P_GND

EVT

P_GND

P_NUMLOCK_LED#_QR

1

P_GND

D

P_CAPLOCK_LED#_QR

2

NC_MLVS0603M04_VR
null

SMDFIX1

1

2

P_CN4

P_C3
100P_50V_K_N
0402_NPO

1
2
3
4
5
6
7
8
9
10
11
12

2

1

P_VR2

2
6

SMDFIX2

1
2
3
4

P_PWRSW#
P_SCRLOCK_LED#_QR
P_CAPLOCK_LED#_QR
P_NUMLOCK_LED#_QR
P_KSI0
P_KSO18
P_KSI2
P_KSI1
P_PWR_LED
P_SUS_LED

P_PWRSW#

SMDFIX1

P_PWR_LED
P_SUS_LED
P_PWRSW#

SCROLL LOCK LED

P_SCRLOCK_LED#_QR

FOX_HT2204E-LH
HEADER CONN_4P

1

5

D

CAP LED

P_GND

P_GND

P_GND

DVT

P_GND
P_GND

null

P_GND

P_GND

P_GND

smdfix1

smdfix2

null

1

P_GND

MLVS0603M04_VR
null

P_C4
100P_50V_K_N
0402_NPO

P_GND

EVT

P_GND

DVT

P_GND

1

4

P_GND

DVT

P_KSI2
P_VR3

2

2

P_SW1
1BT002-0120L-7H_SW-SMD4
3

6

MLVS0603M04_VR
null

P_C5
100P_50V_K_N
0402_NPO

1

5

4

P_C7
100P_50V_K_N
0402_NPO

2

1

1

P_VR4

P_KSO18

2

smdfix2

P_KSI1

2

P_GND

smdfix1

6

MLVS0603M04_VR
null

2

P_SW4
1BT002-0120L-7H_SW-SMD4
3

2

2

1
2

P_C1
null
100P_50V_K_N
0402_NPO
P_GNDP_GND

P_C6
100P_50V_K_N
0402_NPO

1

5

4

P_C2
100P_50V_K_N
0402_NPO

1

1

P_VR1

P_KSO18

2

smdfix2

P_KSI0

2

smdfix1

6

2

P_SW2
1BT002-0120L-7H_SW-SMD4
3

5

P_KSO18 1

1

C

1

C

DVT

P_GND

P_GND

Assist

EVT

PVT

VAIO

Web(Instant On)

EVT

PVT

B

B

EVT
A

A

FOXCONN

SWITCH (BOTTON & KB LED)

Size
A3

Document Number

Date:
5

4

3

2

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

Title

Rev

M960&M970 H Model
Sheet

Thursday, December 24, 2009
1

SA
62

of

86

D

U_A_GND

EAPD/SCLK

AVSS2

48

SPDIFO/SDATA

MCLK
CPVEE

SPK_OUT_R+

4
7

PD#
DVSS

DVT

LRCK
HPOUT_R
AVSS1
PVSS1

U_C439
NC_22P_50V_J
0402_NPO

12 U_PC_SPKRIN_269
U_HP_R_1
33
26
42

U_R5778
U_R5779
U_R5787
U_R5781

1
1
1
1

U_DMIC_DAT

U_SENSE_A_275

U_SENSE_A_269

D

2
U_MODI4

U_R660 1 22_J

2 0201

U_MODI2

U_R668 1 22_J

2 0201

U_HP_R_DB

67

U_R659 1 22_J

2 0201

U_MODI5

U_R670 1 22_J

2 0201

U_MODI3

U_R665 1 22_J

2 0201

U_HP_L_DB

67

1
2

1
2

1
2

1
2

1
2

1
2

2

2

1

DVT
U_A_GND

U_HP_IN_5

S

10K_J 0201
2N7002ESPT

PVT

2
3

PBSS2515E.115

S

D

U_Q62
G

67

U_A_GND

2

U_R662
1 1

2

U_EXTMIC_IN 68

10K_J 0201
2N7002ESPT

PVT

U_A_GND

BOM Option for ALC275
and ALC269
(Default is ALC269.)

PC BEEP
U_R321
U_PC_SPKRIN_C
U_C440
1000P_50V_K
0402_X7R

DVT PVT

1
100K_J

2
0201

U_HDA_SPKR

66

From PCH

U_R327
1K_J
0402

DVT

DVT

U_A_GND U_A_GND

PBSS2515E.115

2

1

3

3

2

1
2

1

C
E

2

3

1

B

U_Q43
B

U_MODI7 1
U_R676

U_C459 0.01U_10V_K 0402_X7R
1
2

0402
2

Tied at one point only under the
ALC275 or near the ALC275

20K_F
0201

D
2

C

U_R661

0_J

U_GND

U_R652
1 1

1U_6.3V_M
U_PC_SPKRIN_269
2
1
U_C930
0402_X5R

E

B

U_Q45

C

2

U_Q61

NC_1U_6.3V_M
U_PC_SPKRIN_275
2
1
U_C441
0402_X5R

E

U_Q44
PBSS2515E.115
1

C
E

1K_J
0201

U_C787 0.01U_10V_K 0402_X7R
1
2

U_P_GND
U_R5786
1

U_R339

U_A_GND

U_Q41
PBSS2515E.115
U_MODI61
B

U_GND

U_R338
39.2K_F
0201

R5944
1
2
0_J
0201

2 0201

U_A_GND

0402
2

U_SENSE_A

1
2
NC_0_J 0201

33K_J
0201
U_R672 1 22_J

33K_J
0201

0402
2

0_J U_R5788
1

U_GND

G

U_R664

0_J U_R5782
1

R5943

S

U_HP_L_1

U_P_GND

U_C929
NC_1000P_16V_K
0603_X7R

Place near U_U18

1
U_DMIC_MISC_1

U_HP_R_1

U_CAP33
+ 10U_10V_M
2.0x1.2

3

U_INT_SPK_R- 66
U_INT_SPK_R+ 66
U_INT_SPK_L+ 66
U_INT_SPK_L- 66

BOM Option for ALC275
and ALC269
(Default is ALC269.)

U_P_GND

2

U_DMIC_CLK

0402
2

U_C914
0.1U_10V_K
0402_X5R

U_C476 0.01U_10V_K 0402_X7R
1
2

U_P_GND

U_R667

U_R320 0_J
1

U_CAP34
+ 10U_10V_M
2.0x1.2

U_P_GND U_P_GND
ALC275
null

PVT

U_DMIC_MISC_3

U_P_GND

U_C927
NC_1000P_16V_K
0603_X7R

U_A_GND

U_A_GND

0402
2

1

U_C928
NC_1000P_16V_K
0603_X7R

2

U_R342 0_J
1

U_C926
NC_1000P_16V_K
0603_X7R
2 0603
2 0603
2 0603
2 0603

0_J
0_J
0_J
0_J

DVT

<>
For power_on/off de-pop circuit and system booting warning
signal:
Please System BIOS Engineer Note :
1. If you want the system make warning signal after power on
, please let EC_MUTE# High first.
2.When you want to exit your Bios Programming Code, please let
the EC_MUTE# Low.(The programming is different from before . )

PVT

U_INT_SPK_R-_275
U_INT_SPK_R+_275
U_INT_SPK_L+_275
U_INT_SPK_L-_275

DVT

U_GND

U_GND

1

13 U_SENSE_A_269
2
1
34
U_A_GND
U_C925
0603_X5R 2.2U_10V_M
U_POP_MUTE_275
28
U_HP_L_1
32
U_POP_MUTE_269
29
U_MIC1_VREF
20MIL
1
30
U_TP230
31
U_A_GND

U_C913
0.1U_10V_K
0402_X5R

1

VREF

U_P_GND U_P_GND

U_A_GND

1

27

U_A_GND

U_TP113 20MIL
U_R348 2 20K_F 1 0402
U_TP221
20MIL

2

U_ALC275_VREF

GPIO2
HPOUT_L
MIC2_VREFO
MIC1_VREFO
CPVREF

37

1

2

PVDD2

U_SENSE_B 1

U_CAP32
+ 10U_10V_M
2.0x1.2

U_PVDD2

1

46

18
19
20

U_C911
0.1U_10V_K
0402_X5R

HCB1608KF-121T25

3 2

U_PVDD2

U_CAP31
+ 10U_10V_M
2.0x1.2

U_L72
120R-100MHZ_0603

2

U_INT_SPK_R+_27545

U_C910
0.1U_10V_K
0402_X5R

DVT

1

47

For EMI
U_GND

SenseB
JDREF
GPIO3

49

1

BCLK

DVT

U_SD_AMP#

2

U_SMB_THRM_DATA

SYNC

6

U_PVDD1

2

2

1

RESET#

10

66

1

1

U_TP227

11

U_MIC_L_IN 68
U_MIC_R_IN 68

1

U_TP226

U_SMB_THRM_CLK

64 U_AMP_PD#

2

2

U_C931
NC_22P_50V_J
0402_NPO

0402
2 U_BCLK

SDATA_OUT

4

U_L71
120R-100MHZ_0603
HCB1608KF-121T25

Place near pin 38

2

DVT

20MIL

U_BCLK

1

U_HDA_CODEC_BITCLK

U_POP_MUTE_269

0_J

SDATA_IN

5

U_PVDD1
39
U_INT_SPK_L-_275
41
U_MIC_L_IN
21
U_MIC_R_IN
22
U_MIC2_L
U_TP222 20MIL
1
23
U_MIC2_R 1
U_TP223 20MIL
24
2.2U_10V_M
1
35 U_C9242
0603_X5R
36
U_AUDIO_SDA 1
U_TP224 20MIL
14
U_AUDIO_SCL 1
U_TP225 20MIL
15
16 U_PC_SPKRIN_275
17 U_SENSE_A_275

Place near pin 25

2

20MIL

3

U_R326
1

66 U_HDA_CODEC_BITCLK

64 U_HW_POP_MUTE_CODEC
1 U_R57902
0_J
0402

MP

66 U_HDA_CODEC_SYNC

U_POP_MUTE_275

8

PVDD1
SPK_OUT_LMIC1_L
MIC1_R
MIC2_L
MIC2_R
CBN
CBP
SDA
SCL
PCBEEP
SenseA

25
38

1

64,66 U_HDA_CODEC_RST#
1 U_R57892
NC_0_J 0402

PVSS2
SPK_OUT_RGPIO0/DMIC_DATA
GPIO1/DMIC_CLK
SPK_OUT_L+

THERMAL PAD

66 U_HDA_CODEC_SDATAIN0
66 U_HDA_CODEC_SDATAOUT

(Default is ALC269.)

AVDD1
AVDD2

Place near U215

U_+5VAMP

U_Q65
ME2306A

U_A_GND

1

U_R480 22_J 0402
1
2

DVDD
DVDD_IO

3 2

43
U_INT_SPK_R-_275
44
U_DMIC_MISC_1 2
U_DMIC_MISC_3 3
U_INT_SPK_L+_275
40

U_P_GND

BOM Option for ALC275 and ALC269

1
9

U_A_GND

Place near pin 27

U_U18
U_DVDD_IO

U_+5VRUN

G

U_GND
U_VDDA

DVT

U_C455
0.1U_10V_K
0402_X5R

3

U_GND
U_+3VRUN

66 U_DMIC_CLK
66 U_DMIC_DAT

U_C805
0.1U_10V_K
0402_X5R

U_VDDA

2

1

CLOSE
TO PIN1

U_VDDA

DVT

1

2
4

U_C908
0.1U_10V_K
0402_X5R

U_C907
0.1U_10V_K
0402_X5R

2

U_C922
10U_6.3V_M
0603_X5R

2

U_C445
10U_6.3V_M
0603_X5R

1

U_DVDD_IO
1

1

U_R335
1

2

1

U_C447
0.1U_10V_K
0402_X5R

2

1
2

U_C446
0.1U_10V_K
0402_X5R

0_J

U_C923 NC_10U_6.3V_M
0603_X5R
2
1

U_ALC275_VREF
0402
2

E

U_C460 10U_6.3V_M
0603_X5R
2
1

U_+3VRUN
U_+3VRUN

1

DVDD_IO can be either 1.5V or 3.3V Resume well
power, regardless iHDMI is implemented or not.
However, external codec/MDC must have the same
voltage level as PCH VCCSUSHDA power.

C

2

B

U_C458 10U_6.3V_M
0603_X5R
2
1

A

1

2

1

1K_J
0201

1

U_A_GND

U_R671

U_R673

1K_J
0201

1K_J
0201

2

2

1

64 U_MUTE_TR_1
U_A_GND

FOXCONN

Title
U_MODI8
U_MODI9

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

AUDIO(CODEC)

Size
Document Number
Custom

Rev

M960&M970 H Model

Date:
A

B

C

D

Tuesday, December 29, 2009
E

Sheet

SA
63

of

93

A

B

C

D

E

4

4

U_+3VALW
U_R365 200K_J 0402
2
1

2

PVT

1

B

3

1

3.3K_J
0402
U_C472
NC_1000P_16V_K
0603_X7R

C

2

E

U_MUTE_TR_IN

U_R364

1

U_Q19
PMBT3906.215
null

2

U_MUTE_TR_1 63

DVT
U_GND

U_+5VAMP

U_R347
B

2 1
0402

E

10K_J
0402

3

2

1 G

U_MUTE_TR

DVT

PVT

PVT

2 1 G
0402

U_GND

0402
1 U_R351 2
200K_J
U_C464
NC_1000P_16V_K
0201_X7R

U_GND
U_GND

0402
10K_J
U_R663

2

2

1

MP
PVT

U_GND

U_+3VALW
U_GND

If use ALC275 Codec, these parts should be NC.
If use ALC269 Codec, these parts should be Mount.

1

B

DVT

C U_Q56
E DTC144EUB

2

B

10K_J
0402

2

C U_Q42
E DTC144EUB

null
U_GND

2

63,66 U_HDA_CODEC_RST#

U_R349

E U_Q17
PMBT3906.215
null

DVT

3

U_MODI1

C

3

1

U_+3VRUN

B

PVT

2

2

U_Q20
SRK7002
null

1

2

1

S

1

1
1K_J

2

2

U_R353

U_C465
10U_6.3V_M
0603_X5R

2

1 33K_J 2 0402
U_R352

3
D

S
U_Q15
SRK7002
null

2

2

D
U_GND
U_GND

0402
10K_J
U_R350
66 U_HW_POP_MUTE_EC

3

U_AMP_PD# 63

1

U_+3VALW

U_R341

2

0402
10K_J
U_R340

PVT

C

1

3

1
1K_J

3

1

63 U_HW_POP_MUTE_CODEC

1

3

U_Q16
PMBS3904

null
U_GND

1

1

FOXCONN

AUDIO (MUTE)

Size
A3

Document Number

Date:
A

B

C

D

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

Title

Rev

M960&M970 H Model
Sheet

Tuesday, December 29, 2009
E

SA
64

of

93

5

4

3

2

1

D

D

AUDIO POWER( 4.75V/200mA)

U_+5VRUN

U_U20
6

ADJ

5

PG

4

U_VDDA

AME8824AEEYZ
U_A_GND

2

U_GND

C

U_C467
0.01U_10V_K
0402_X7R

U_LD5

U_R362
29.4K_F
0402

2

U_C469
22P_50V_J
0402_NPO
2

U_LD4

U_C478
4.7U_6.3V_K
0603_X5R

U_A_GND
C

1

EN

1

GND

3

1

VOUT

1

VIN

2

2

U_C456
1U_6.3V_M
0402_X5R

1

1

U_C457
0.1U_10V_K
0402_X5R

2

2

1

1

DVT

U_R354
10K_F
0402
2

U_A_GND

U_A_GND

B

B

A

A

FOXCONN

Title

AUDIO POWER

Size
A4

Document Number

Date:
5

4

3

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

2

Rev

M960&M970 H Model
Thursday, December 24, 2009

SA

Sheet

65
1

of

93

5

4

3

2

1

D

D

50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

U_+5VALW_IN

DVT
U_GND
69
69

U_USB_PN5
U_USB_PP5

69
69

U_USB_PN1
U_USB_PP1

69
69

U_USB_PN4
U_USB_PP4

U_GND
U_GND
U_GND

C

69 U_USB_OC#1
69 U_USB_OC#2
69 U_USB_OC#3

DVT

U_GND
69 U_SUS_ON
U_+3VALW

EVT

U_+3VRUN
U_GND

63 U_INT_SPK_R63 U_INT_SPK_R+
U_GND
63 U_INT_SPK_L63 U_INT_SPK_L+
U_GND
63 U_DMIC_DAT
63 U_DMIC_CLK
U_GND
63 U_HDA_CODEC_BITCLK
U_GND
63 U_SD_AMP#
64 U_HW_POP_MUTE_EC
63 U_HDA_SPKR
63 U_HDA_CODEC_SYNC
63,64 U_HDA_CODEC_RST#
63 U_HDA_CODEC_SDATAOUT
63 U_HDA_CODEC_SDATAIN0
B

52

U_+5VRUN

C

B

SMDFIX2

DVT

SMDFIX1

51

U_GND

PVT
U_CN1
FPC CONNE_50P
FOX_GB5RF500-1203-8H

U_GND

2

1

U_+5VRUN
C6345
0.1U_16V_M
0402_X5R

For EMI
U_GND
A

PVT

A

FOXCONN

Audio (AUDIO & USB Conn)

Size
A3

Document Number

Date:
5

4

3

2

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

Title

Rev

M960&M970 H Model
Sheet

Tuesday, December 29, 2009
1

SA
66

of

93

5

4

3

2

1

D

D

EVT

1

U_VDDA

0402
10K_J
U_R220

2

U_A_GND

U_MIO7

C

EVT
DVT

U_CN4
AUDIO JACK_6P
FOX_JA63331-B1T0-7H

U_C12
470P_50V_K_B
0402_X7R

1

U_C11
470P_50V_K_B
0402_X7R
2
1

120R-100MHZ_0402
EBMS100505A121 0.5A

2

2
U_C10

2
U_C9

470P_50V_K

U_MIO6

U_L5

0402_X7R
1

U_L4

U_HP_L_DB

0402_X7R
1

U_HP_R_DB

470P_50V_K

U_HP_L_DB

5
4
3
6
2
1

PTH1

U_HP_R_DB

63

120R-100MHZ_0402
EBMS100505A121 0.5A

PTH2

63

U_HP_IN_5

8
7

63

PVT

C

BLACK
HEADPHONE

U_A_GND
U_GND

DVT

B

B

A

A

HAI PRECISION IND. CO., LTD.
FOXCONN HON
CPBG - R&D Division

Title

Audio (Head Phone Jack)
Size
A3
Date:
5

4

3

2

Document Number

Rev

M960&M970 H Model
Tuesday, December 29, 2009

Sheet

1

SA
67

of

93

A

B

C

D

E

4

4

EVT
EVT

DVT

1

U_VDDA

U_R5791
U_MIC1_R_IN 1 0_J
2 0402

U_MIC_R_IN

0402
10K_J
U_R222

63

3

2

3

U_EXTMIC_IN

U_EXTMIC_IN 63

U_A_GND

0_J

0603
2 U_MIO20
0603
2 U_MIO21

U_MIC1_L_IN

2

1

U_MIC0_L_IN

0_J

U_R5792
1 0_J
2 0402

U_C23
470P_50V_K_B
0402_X7R
U_A_GND

U_MIC_L_IN 63
U_A_GND

DVT

8
7
5
4
3
6
2
1

PTH1

DVT

EVT

U_R31
1
U_R33
1

U_C19
470P_50V_K_B
0402_X7R

PTH2

U_MIC0_R_IN

2

1

U_A_GND

U_CN5
AUDIO JACK_6P
FOX_JA63331-R1T0-7H

EXTERNAL MIC

RED

U_VDDA
2

1

2

U_R40

2

DVT
U_VDDA

2.2K_J
0402

2

NC_47K_J
0402

U_A_GND
U_MIC0_R_IN
U_MIC0_L_IN

1

U_C36
4.7U_10V_K
0805_X5R

U_VDDA
U_R47

U_VDD3

6.8K_J
0402

U_R48
2.2K_J
0402
1

1

1

2.2K_J
0402

1

2

U_C37
10U_6.3V_M
0603_X5R

2

1

U_R46

6.8K_J
0402

2

U_MIO36

2

U_MIO35

U_C35
4.7U_10V_K
0805_X5R
2
1

U_A_GND

2

U_R43

2

2
100_F 0402
U_MIC1_L_IN
1
2
U_R45 100_F 0402
U_R44

1

NC_47K_J
0402

1

U_MIC1_R_IN

EVT

1

U_R42

U_A_GND

U_A_GND

U_R41

1

1

U_C34
10U_6.3V_M
0603_X5R

2

2

1
2

U_C506
0402_X5R
1U_6.3V_M

1

1

U_VDD2

2

U_R49
2.2K_J
0402

FOXCONN
Title

U_A_GND

Size
A3
Date:
A

B

C

D

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

Audio (Ext MIC Jack)
Document Number

Rev

M960&M970 H Model
Sheet

Tuesday, December 29, 2009
E

SA
68

of

93

1

2

3

4

5

6

7

8

0603

1

NC2
NC_RSB12JS2

A
PTH2

U_GND
U_GND

U_USB_VCC4_R
U_USB_VD4-_F
U_USB_VD4+_F

2 0_J 0805

1

1
2
3
4

VV+

NC2
NC_RSB12JS2

U_CN3

PTH1

GND OUT_3
IN_1 OUT_2
IN_2 OUT_1
EN(EN#) OC#

1
2
3
4

U_C5
1U_25V_M
0603_X5R

GND OUT_3
IN_1 OUT_2
IN_2 OUT_1
EN(EN#) OC#

PVT

U_SUS_ON

U_U216
1
2
3
4
1

U_GND

1

2

3

U_D4

NC1
NC2
NC_RSB12JS2

6

U_GND

U_GND

5

U_C921
470P_50V_K
0402_X7R

4

2
1

1

U_CAP30
+ 150U_6.3V_R
6TPE150MAZB

2

U_L70 1206
NC_90R-100MHZ_0R35
1
2
U_R5777
0_J
0402

1
2
3
4

2

5
U_USB_VCC5_R
U_USB_VD5-_F
U_USB_VD5+_F

2 0_J 0805

2
3

U_CN6

VV+

U_C920
1U_25V_M
0603_X5R

GND OUT_3
IN_1 OUT_2
IN_2 OUT_1
EN(EN#) OC#

8
7
6
5

U_USB_VCC5
B

U_USB_OC#3 66

G545B1P8U
null

DVT

U_GND

VCC

U_GND

PTH1
PTH2

GND

6

U_R5776
1

DVT

U_GND

0402
U_USB_VCC5

1
4

U_USB_PN5
U_USB_PP5

U_USB_OC#2 66

U_GND
66

U_GND

66
66

U_USB_VCC4

8
7
6
5

U_GND
USB CONN_4P
FOX_UB11123-C1501-7H

U_GND

2

DVT

G545B1P8U
null

B

1
U_R5775
0_J

U_USB_OC#1 66

G545B1P8U
null

PTH2

U_GND

6

U_GND

U_C4
1U_25V_M
0603_X5R

U_USB_VCC1

8
7
6
5

U_GND
U_U3

GND

U_D3

1
2
3
4

U_GND

VCC

NC1

4

U_GND

2

3

U_C8
470P_50V_K
0402_X7R

5

2
1

U_CAP3
+ 150U_6.3V_R
6TPE150MAZB

U_GND

2

U_L3
1206
NC_90R-100MHZ_0R35
1
2
U_R9 0_J
0603

USB CONN_4P
FOX_UB11123-C1501-7H

PVT

5
U_R8 1

U_U2

U_GND

2
3
1

1
4

U_USB_PN4
U_USB_PP4

U_+5VALW_IN

GND

0603
U_USB_VCC4

66
66

DVT

PTH1

6

2

V+

U_D2

U_GND

1
U_R7 0_J

V-

6

U_GND

U_CN2

VCC

NC1

4

U_GND

2

U_GND
3

U_C7
470P_50V_K
0402_X7R

5

U_CAP2
+ 150U_6.3V_R
6TPE150MAZB

2

U_L2
1206
NC_90R-100MHZ_0R35
1
2
U_R6 0_J
0603

1
2
3
4

1

U_USB_VCC1_R
U_USB_VD1-_F
U_USB_VD1+_F

2

2 0_J 0805

1

U_R5 1

2
3
2

1
4

U_USB_PN1
U_USB_PP1

1

66
66

2

U_USB_VCC1
A

6

2

1

1
U_R4 0_J

5

U_GND

U_GND

USB CONN_4P
FOX_UB11123-C1501-7H

PVT

U_GND
U_GND

U_GND

C

C

D

D

FOXCONN
Title

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

Audio (USB Port)

Size
Document Number
Custom

Rev

M960&M970 H Model

Date:
1

2

3

4

5

6

7

Tuesday, December 29, 2009

SA

Sheet

69
8

of

93

5

4

3

2

System
+5VALW/5A

DCBATOUT

SUS_ON

Adaptor
19.5V / 90W
ALW_ON

D

EN1

TI
SN0608098
Switch Mode
FOR System

System
+3VALW/5A
SUS_ON

LDO5
PGOOD

PAGE 50

C

TI
BQ24753A
Battery Charger
Switch Mode

N-Channel
transistor

+3VSUS/1A

RUN_ON

N-Channel
transistor

+5VRUN/4.5A

N-Channel
transistor

+3VRUN/4A

+5VALW_LDO

ALW_PWRGD

AT5208
LDO

G9731
LDO

+1_8VRUN/1A

D

+ECVCC/100mA

+12V For Load switch

RUN_ON1

TI / GMT
TPS51218 + G2998
Switch Mode
FOR DDR3
S3
VTTREF

SUS_ON

S5

PAGE 52

+5VSUS/0.6A

RUN_ON1

EN2

DCBATOUT

N-Channel
transistor

1

RUN_ON

PGOOD

+1_5VSUS/13A
RUN_ON1

+0_75VRUN/2A

N-Channel
transistor

+1_5VRUN/7A

G9731
LDO

PEX_VDD/2A
C

DDRDIMM_VREF

DDR3_PWRGD

PAGE 48

DCBATOUT

TI
TPS51218
Switch Mode

ENCHG#

FOR VTT=>+1_05V_VTT

RUN_ON1

B

Battery
Li-ion
11.1V
4800mAH

RUN_PWRGD

EN/PSV

PAGE 51

+1_05V_VTT/19A

PGOOD

B

MAXIM
MAX17030
Switch Mode
FOR CPU Core

DCBATOUT

VR_ON

IMVP_VR_ON

CLK_EN#

EC_CLK_EN#

IMVP_OK

IMVP_OK

TI
TPS51217
Switch Mode
FOR D_VGA

DCBATOUT

A

PAGE 54

EN/PSV

RUN_ON1

PAGE 57

VHCORE[6:0]/40A

NV_VDD(1V/1.1V)/15A
A

PGOOD

FOXCONN
Title

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

Power Design Diagram

Size
Document Number
Custom

Rev

M960&M970 H Model

Date:
5

4

3

2

Thursday, December 24, 2009
1

Sheet

SA
70

of

93

3

2

L --> 75W
H --> 64W

21

VREF

20
1
11

2

Time that input current limit :

AGND

3

t=(Cacop*2)/(18uA/V*V(PVCC-ACP))=0.48s

VREF

4

47P_50V_J
0402_NPO
1
0.1U_50V_K
0603_X7R

47P_50V_J
0402_NPO
1

1

47P_50V_J
0402_NPO
1

2
PC7

1

2
PC8

47P_50V_J
0402_NPO

47P_50V_J
0402_NPO

D

S
G

2
PC4

2
PC6

2
PC13

2
1
PC22
0.1U_50V_K
0603_X7R

3

2

2

17
0.1U_25V_M
0603_X5R

19

SRN

18

Battery CONN.

BAT

17

BT+_L

1

tpc40t_75

TP1212

BATT_ID

1

tpc40t_75

TP1213

DAT_SMB

1

tpc40t_75

TP1214

CLK_SMB

1

tpc40t_75

TP1215

BATT_PRS#_1

1

tpc40t_75

TP1216

SYS_PRS#_1

1

tpc40t_75

TP1217

1

tpc40t_75

TP1218

CELLS

SRP and SRN connections must be make using Kelvin-sense connections

VDAC
VADJ

7

IADAPT

29

PC31
0.1U_25V_M
0603_X5R

ACOP
PC15
0.47U_16V_K
0603_X5R

EVT

BQ24753ARHDR

90W
VADJ

CP

DPPM

Input OCP

PWRLIMIT

4.22A 4.22A/80.18W 4.52A/85.88W

10A

BFT Test Point(TOP)

TABLE 1

1
2
PR158 NC_0_J 0402
PC139
1U_10V_K
0603_X5R

DVT

PQ16

PR220

PR79

For CP

NO NC

45.3K

5.36K

PTH3

B

PD3
PESD5V2S2UT

CHGEN#

DVT
EC_VADAPT 39

PR77

4

PC32
0.1U_25V_M
0603_X5R

15
16

SRP

POWERPAD

1

120K_F
0402

20K_F
0402

PR134
10K_J
0402

PGND

1
1
2

FLOAT

PC34
0.1U_25V_M
0603_X5R

A

TABLE 2

2

1

Fsw : 300KHz

2

CELL COUNT

1

CELLS

2
1
PC16
10U_25V_K
1206_X5R

PC192
680P_50V_K
0603_X7R

PR27
100K_D
0402

PR76

ACGOOD# : Vacdet > 2.4V ==> L
Vacdet < 2.4V ==> H

4

3

LODRV

PTH2

23

8
9
10
11
12
13
14

+ECVCC

22

LEARN

1

DCBATOUT

2

Pre-charge : <2.9V/cell ===> Icharge/8
Battery OTP : Tshut=155 degree

PC33
2
1

PTH1

LODRV

null

DAT_SMB
CLK_SMB
1
2BATT_PRS#_1
PR7 1 330_J 0402
2SYS_PRS#_1
PR5 330_J 0402

1

10

15

2

ENCHG# : Enable ==> L
Disable ==> H

Battery OVP : Vbat*104%

1

1

ACSET

ACOP

Input OVP : 22.2V

Battery OCP : Icharge*145%

PR215
4.7_J
0603

BATT_ID
DAT_SMB
CLK_SMB
BATT_PRS#
SYS_PRS#

2

6

12

ENCHG#_1

3

PQ34 2N7002Wnull PR33 NC_0_J
BQ24753A_IADAPT_R
1
2
82 BQ24753A_IADAPT
0402
Iadapter=(Vacset/Vvdac)*(0.1/PR4)=4.22A
PC35
120P_50V_J
IADAPT=(Vacp - Vacn)*20
1
2
39 EC_IADAPT
PR75
PR25
0402_NPO
0_J
210K_F
Input OCP: (VACP-VACN)max/PR4=100mV/10mohm=10A
0402
0402

Input UVP : 17V

S

2
D

S

2

ENCHG#

2

2
1
PC128
0603
1U_25V_M_B
2
1
PC129
0.1U_50V_K 0603_X7R
2
1
PC574
0.1U_25V_M 0603_X5R
2
1
PC575
0.1U_25V_M 0603_X5R
2
1
PC576
4700P_25V_K 0402_X7R
2
1
PC577
4700P_25V_K 0402_X7R
3 G

24

73
39
39
39
82

0.02_0.5W_F
1206

1
2
3
4
5
6
7

1

REGN
SRSET

Icharge=(Vsrset/Vvdac)*(0.1/PR15)=1.5A

5

2
1
PC17
0603
1U_25V_M_B

1
1

2

G

39

D

PD21
CH500H-40PT

OVPSET

10UH_4A_0.068R
PCMB063T-100MS

BT+_L

2

2

16

27

VREGN
PC131
0.1U_50V_K_B
0603
BTST 1
2

1

2
1
PC11
10U_25V_K
1206_X5R
2
1
PC10
10U_25V_K
1206_X5R

8

BT+_1

PC3
0.1U_50V_K 0603_X7R
2
1
PC12
10U_25V_K 1206_X5R
2
1

SRSET
PR35 NC_226K_F 0402
1
2
ACSET
1 PR79
2ACSET_FB 1 PR11
2
3.48K_F 0402
12K_F
0402
1 PR220 2
TP192
27.4K_F 0402
BQ24753A_VREF
1
tpc40b_50
1
2
PC29
1U_6.3V_M 0402_X5R
AC_OFF_R
1
2
AC_OFF
PR29 0_J
0402
+ECVCC
PR32
BQ24753A_VREF
10K_J
0402
PR135
10K_J
PR136
0402
10K_J
0402

Vbat=cell count*[4V+0.512*(Vadj/Vvadc)]=12.465V

A

2
1
PC2
0.1U_50V_K
0603_X7R

2

1
PC1
0.1U_50V_K
0603_X7R

2
1
PR13
69.8K_F
0402

PR20
69.8K_F
2 0402
1

BTST
OVPSET

1 2

VREF=3.3V->VDAC

(Vbat=4.2V when Vadj connected to REGN)

D

S
G
DC_IN_G1

1

2
1
PC5
0.1U_50V_K
0603_X7R

2

2

2

ACGOOD#

PCN1

PR15

BQ24753A_PH

25

3

39

C

PL15
60R-100MHZ_1806
BCMS451616A600 8A

2

39,82

ACGOOD# 13

1

EC_PWRLIMIT_CTRL

S

PL2
PH

1

G

2 HIDRV3 G
0603

1

1

2

S
2N7002W
null

G

26 HIDRV_R
1
PR19 0_J

1

D

B

AGND

HIDRV

2

360K_F
0402

ACDET

9

ACDRV#

PL14
60R-100MHZ_1806
BCMS451616A600 8A

1

2

3

PQ16

PR37

5

D

2

1
ACSET_FB

ACDET

BATDRV#

1

1

39 CHARGE_CTRL

2N7002W
null

0402
2

14

2

PR36
750K_F

4

1

T> 60 ℃ or T< 0 ℃

D

S

ACDRV#

PR1
10K_J
0402

ACIN_EC
PQ5

0V

BATDRV#

DCBATOUT

2

0A

ACP

28

1

1.6V
0.72V

10K_J
0402

PD4
PESD5V2S2UT

FOX_BP92071-B81E2-7H
BATTERY CONN_7P

800mA(Max)
350mA (Min)

+5VALW_LDO

3

39

3.06V

1.5A

3

PVCC

PQ6
SI3424BDV-T1-E3

2

Battery
Temperature

ACN

2

CHARGE_CTRL
Voltage setting

1

1

Charge Current Set Table:
Charge
Current

PU3
2

D

PD7
TVS2315PT

+ECVCC

PR8

PQ32
AO4433

For EMI

2

2

0603_X7R

PR28
100K_F
0402

1

0.1U_50V_K
1
2

DC_IN_G1

ACDRV#

BT+

0.1U_25V_M
0603_X5R

2

EC5
DC_IN

PC14

1
2
5
6

0603_X7R

DC_IN_R

5
6
7
8

4

0.1U_50V_K
1
2

PR9 10K_F 0402

PQ2
AO4433

1

1
2
3

4

EC4
DC_IN_1

2

CH520S-30PT
PD19
1
2

AC_OFF_3#

1 PR4
2
0.01_1W_F
1608

2

C

82

PC123
4.7U_50V_k
1206_X7R

5
6
7
8

BT+_L
DAT_SMB
CLK_SMB
BATT_PRS#_1
SYS_PRS#_1
BATT_ID

10A

PVT

PQ8
SI3424BDV-T1-E3
1
2
5
6
1

BFT Test Point (Bottom)

PR14
432K_F
0402

1

P+
P+
GND
GND

PR18
432K_F
0402

2

1
1
1
1

1

tpc60b_100
tpc60b_100
tpc60b_100
tpc60b_100

2

TP1150
TP1151
TP1154
TP1155

PC127
4.7U_50V_k
1206_X7R

1

P+
P+
GND
GND

2_F
1210

1

1
1
1
1

1
2
3

1

BFT Test Point (TOP)

tpc60t_100
tpc60t_100
tpc60t_100
tpc60t_100

PR133

2_F
1210

2

5

POWER BOARD SIDE_4P
FOX_GS73041-10272-7H

1
2
3

4

1

SMDFIX1

TP1148
TP1149
TP1152
TP1153

PR138

DC_IN_3

2

1

2
1
PC126 1000P_50V_K
0402_X7R
2
1
PC20 0.1U_50V_K
0603_X7R

0603_X7R

0603_X7R

1

2
PC124
NC_0.1U_50V_K

2
PC125
NC_0.01U_50V_M

P+

1

2
1

6

SMDFIX2

DC_IN_MOS

G

0437007WR
32V-7A_1206
PF1

PCN2
1
2
3
4

PVT

5
6
7
8

S

DC_IN_1

D

D

5A

TP191
tpc40b_50
DCBATOUT

PQ1
AO4433

4

DC_IN

PL1
60R-100MHZ_1806
BCMS451616A600 8A

DVT

PR6562
2.2_F 0805

1
TP190
tpc40b_50

1

ACP and ACN connections must be make using Kelvin-sense connections
PL3
NC_60R-100MHZ_1806
BCMS451616A600 8A

1

09/11/21 Dcbatout Add PC574 0.1uf,PC575 0.1uf,PC576 4700pf
,PC577 4700pf for EMI request

2
PC9

4

1

5

DVT

CP

DPPM

PWRLIMIT

Input OCP

H M/B(75W)

3.59A

3.59A/68.19W

3.76A/71.41W

9.46A

L M/B(64W)

3.06A

3.06A/58.19W

3.2A/60.82W

8.12A
TABLE 3

3

2

FOXCONN

Title

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

DCIN&Charger

Size
Document Number
Custom

Rev

M960&M970 H Model

Date:

Sheet

Tuesday, December 29, 2009
1

SA
71

of

93

5

4

3

2

1

D

D

C

C

B

B

A

FOXCONN
Title

DISCHARGE CIRCUIT

Size
A

Document Number

Date:
5

4

3

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division
Rev

M960&M970 H Model
Thursday, December 24, 2009
2

Sheet

SA
72
1

of

93

A

5

4

3

2

1

D

D

+ECVCC

2

+ECVCC

1

1

1

CH520S-30PT
PD31

2

C

PR68
4.7K_F
0402

C

2

PR61
1K_F
0402
PU5

PVT
B

A

DAT_SMB_L PR69
CLK_SMB_LPR71

1
1

0_J
0_J

B

FOXCONN
Title

Identify IC

Size
A

Document Number

Date:
5

4

3

BATT_ID 71
DAT_35001 39
CLK_35001 39

2 0402
2 0402

1
PC63
NC_220P_50V_J 0402_NPO

R5G05000N100NS
null

8
7
6
5

2

PC66
0.1U_10V_K
0402_X5R

PGM#
P10
RESET# SDA
VSS
SCK
VCC CNVSS

2
1
PC61
NC_220P_50V_J 0402_NPO

1
2

PC65
NC_1U_10V_K
0402_X5R

1

1
2
PR74 0_J 0402

2

39 35001_RST#

1
2
3
4

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division
Rev

M960&M970 H Model
Tuesday, December 29, 2009
2

Sheet

SA
73
1

of

93

A

3

2

2
19

1

3
LDO

2

S2
Si4618DY-T1-E3

1

PR118
0_J
0402

TRIP2
2+5V_ILIM 12

1

REFIN2

2

PR233
0_J
2 0402

SKIP# 29

SYSTEM_EN_LDO
SECFB

SYSTEM_VCC 1

2+5V_TON
PR101
NC_0_J
0402

SKIPSEL
VREF2

1

PR121
0_J
0402

4

20
2

1

32 SYSTEM_VCC
31 +3V_ILIM

1

TRIP1
VREF3

2

27 +3V_EN

EN_LDO

SECFB
TONSEL

PGOOD1

PGOOD2

SYSTEM_VREF3 1
PC201
1U_10V_K
0402_X5R
SYSTEM_REF
1
1
PC202
0.1U_6.3V_K
0402_X5R
1
13

5

1

2 ALW_ON
PR98
0_J
0402

TP217
tpc40b_50

2

2

TP218
tpc40b_50
B

+3VALW

PU9
+5VALW_LDO

ALW_PWRGD 12,39

TP220

1
PU19
SN0608098RHBR

1

2
PR119
162K_F
0402
2

PR99
10K_J
0402

28

PC197
NC_0.1U_16V_M
0402_X5R

PR117
NC_10K_F
0402

1

GND

C

1

21

EN2

TP219
tpc40b_50

PC182
1U_10V_K
0603_X5R

tpc40b_50

1
2
3

100mA

5

VIN VOUT
GND
EN
NC

+ECVCC

4

AT5208-3.3KER

PC184
1U_6.3V_M
0402_X5R

1

2

PR103
39.2K_F
0402

VFB1

30 +3VALW_OUT

1

3
2
1
PC181
0.1U_25V_M
0603_X5R
SYSTEM_REF 1
PR232
NC_0_J
0402

PR115
200K_F
0402
SYSTEM_VREF3 1

11

VOUT2

THERMAL PAD

1

PC89
0.1U_25V_M
0603_X5R

VSW

33

2

2

PR102
100_J
0603

2
PD25
BAT54SPT

2

2

1
1
2

CP

1

2

PC204
NC_0.1U_25V_M
0603_X5R

2

2

B

1

1
PR235
NC_140K_F
0402

1

+12V

SYSTEM_EN_LDO

PR202
162K_F
0402

1

10mA

PD27
MMVZ5245BPT

1

PR234
NC_360K_F
0402

3
2
1
PC178
0.1U_25V_M
0603_X5R

1

PC196
0.1U_25V_M
0603_X5R

2

DCBATOUT

2
PD26
BAT54SPT

EN1

9

1

+5V_VFB

1
TP216
tpc40b_50

14

2

+5V_EN
PC193
NC_0.1U_16V_M
0402_X5R +5VALW

2
PR198
0_J
0402

1

1

2

2

1

2

22

PC272
680P_50V_K
0603_X7R

1

VOUT1

+

2

10

PR245
4.7_J
0603

2
1
PC198
0.1U_6.3V_K
0402_X5R

4 G2

2
1
PC199
220U_6.3V_M
7.3x4.3x1.9

23 +3V_LGATE

3.3UH_6A_0.03R
SLH0630-3R3M-N

1

DRVL2

DRVL1

+3V_PHASE
PR200
0_J 0402
2
1
PC92
NC_1000P_50V_M
0402_X7R

25 +3V_PHASE

+3VALW

PL17

2

LL2

5
6
7

2

+5V_LGATE 18

Si4618DY-T1-E3
+5VALW

39,82 ALW_ON

2

5A
S1/D2

1

4

LL1

PGND

PR204
10K_F
0402

1

PQ70

D1

1 G1
+5V_PHASE16

S2

1 2

26 +3V_UGATE

2

1

1

2
PC88
2.2_J 0.1U_25V_M
0603_X5R

1

+5V_VFB

PC568
680P_50V_K
0603_X7R

DRVH1
DRVH2

S1/D2

G2

1 PR122

2
3

C

PR203
61.9K_F
0402

PR652
4.7_J
0603

24 +3V_BOOT

0603

2

+

2
1
PC104
NC_1000P_50V_M
0402_X7R

2
1
PC105
0.1U_10V_K
0402_X5R
2
1
PC203
220U_6.3V_M
7.3x4.3x1.9
2
1

1

3.3UH_6A_0.03R
SLH0630-3R3M-N

VBST2

1

+5V_PHASE

8

2

+5VALW

5
6
7

+5VALW_LDO
PC205
4.7U_10V_K
0805_X5R

VBST1

2.2_J 0603
+5V_UGATE15

Place these CAPS
close to FETs

1

G1
PL16

2+5V_BOOT 17

1

PQ69

5A
PVT

TP215
tpc40b_50

0.1U_25V_M
0603_X5R
D1

delete PJ11 and PJ12

3
2

+5VALW

2

8

09/10/22

1 PR201

PC183
0.1U_25V_M
0603_X5R

D

PVT For EMI

7

VIN
LDOREFIN

PC102

PC186
10U_25V_M
1206_X5R

8

6

PC103
1U_10V_K
0603_X5R

1

SYSTEM_VIN

V5FILT

1
2

2
1

PC259
NC_0.1U_25V_M
0603_X5R

PC579
680P_50V_K
0402_X7R

SYSTEM_VCC
PC200
1U_10V_K
0603_X5R

2

D

2

2.5A

PR100
0_J
0805

V5DRV

4A

PC578
680P_50V_K
0402_X7R

2

1

+5VALW_LDO

PR503
NC_10_F
0603
2

1

PC185
0.1U_25V_M
0603_X5R

1

1

PC187
10U_25V_M
1206_X5R

2

1
2

Place these CAPS
close to FETs

Add PC578 and PC579 680pf near PQ70 for EMI request

1

09/11/21

6A
DCBATOUT

1

2

4

2

5

Adjustable output of SMPS1:
Vout1 = 5.05V
PR204 = 10K, PR203 = P204 x (Vout1 / 0.7V - 1) =61.9Kohm
Second Feedback :
Vout_sec = 12V, PR103 = 20Kohm
PR115 = PR103 x (Vout_sec / 2V - 1) =100Kohm

A

TON

Operating Frequence
(+5VALW/+3VALW)

VCC

200KHz/300KHz

REF(OPEN)

400KHz/300KHz

GND

400KHz/500KHz

SKIP#

Operating Mode

GND

Pulse-Skipping

REF

Ultrasonic-Skip

VCC

PWM

A

L=VOUT(VIN-VOUT)/(VIN*f*LIR*ILOAD(MAX))
Rocp=(Iocp-Iripple/2)*(10*Rds(on))/5u
+5VALW=((PR186/PR188)+1)*VFB1
Current limit resistor for SMPS1 :
Ivalley_5 = 5.775A, Rcs_5 = Rds1 = 10.8mohm
PR202 = (10 x Ivalley_5 x Rcs_5) / 5uA = 162K

Current limit resistor for SMPS2 :
Ivalley_3 = 5.525A, Rcs_3 = Rds2 = 10.8mohm
PR119 = (10 x Ivalley_3 x Rcs_3) / 5uA = 162K

FOXCONN

SYS Power (+3_3V/+5V)

Size
A3

Document Number

Date:
5

4

3

2

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

Title

Rev

M960&M970 H Model
Sheet

Tuesday, December 29, 2009
1

SA
74

of

93

5

4

3

2

1

D

D

09/10/22

delete PJ22 and PJ23
PVT

3A

PC168
10U_25V_M_B
1206

PC169
10U_25V_M_B
1206
2
1

2

1
1

PC212
330U_2V_T
EEFSX0D331ER

+

2

1
+

PC208
330U_2V_T
EEFSX0D331ER

2

PR188
4.7_J
0603

2

2
1
PC206
0.1U_16V_Y
0402_Y5V

1

+1_05V_VTT

PVT

PC170
680P_50V_K
0603_X7R

1
PR187
10K_F
0402

B

2
2

B

PC171
0.1U_50V_K_B
0603
2
1

1
2
3

2
1

2
PR208
20K_F
0402

PL18
2
1.0UH_11.5x10.4
PCMC104T-1R0MN

D

S

C

TP504
tpc40b_50

1

4 G

Place these CAPS
close to FETs

19A

1

2

470K_J
0402

S

+1_05V_VTT_DH

+1_05V_VTT_DL

TPS51218DSCR
PR116

2.2_J
0603 PR112
0_J
0603

1
2
5
3
PQ14
SI7170DP-T1-GE3

PR113
68.1K_F
0402

+1_05V_VTT_BST
+1_05V_VTT_DH_R
+1_05V_VTT_LL

2

PR114
NC_820K_F
0402

PGOOD GND
TRIP
VBST
EN
DRVH
VFB
SW
RF
V5IN
DRVL

11
10
9
8
7
6

1

+1_05V_VTT_EN/PSV
+1_05V_VTT_VFB

1
2
3
4
5

1

2

1

+5VALW

PR126
100_J
0402

VTT_PGOOD_PWM

2

1

RUN_ON1

2

2

RUN_PWRGD

27,39,76,77,80,81

4 G

PR44
PU16

2
1
PC96
NC_0.1U_10V_K
0402_X5R
2
1
PC87
NC_100P_50V_K
0402_NPO

4,12,39,76,80

5

1

1
PR221
0_J
0402

1

D

PC86
1U_6.3V_M_B
0402

2

+3VRUN

+5VALW

1

PR123
10K_F
0402

PC90
0.1U_50V_K_B
0603
1
2

PQ15
SiR474DP-T1-GE3

TP503
tpc40b_50
C

1

DCBATOUT

VTT_SENSE 6

1
PR588
NC_0_J
0402

Imax = 19A
Fsw = 390KHz
Skip Mode
Vo=(1+(PR187/PR208))*0.704=1.05V
OVP => VFB * 120%
UVP => VFB * 70%

RF=470Kohm ,300KHz
200Kohm ,350KHz
100Kohm ,390KHz
47Kohm ,450KHz

A

A

FOXCONN

Title

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

SYS Power(+1_05V_VTT)

Size
Document Number
Custom

Rev

M960&M970 H Model

Date:
5

4

3

2

Sheet

Tuesday, December 29, 2009
1

SA
75

of

93

5

4

3

2

09/10/22

1

delete PJ26 and PJ27
3A

PVT

1
2
3

1
2

1
2

PL6
1.0UH_11.5x10.4
PCMC104T-1R0MN
1
2

+1_5VSUS

+

PC42
680P_50V_K
0603_X7R

PVT

2
1
PC138
0.1U_6.3V_K
0402_X5R

1

DDR_DL

2
1
PC152
330U_2V_T
EEFSX0D331ER

2

2

1
2
3

S

PR41
4.7_J
0603

13A

Imax = 13A
OCP = 14.5~17.32A
Fsw = 300KHz
Skip Mode
Vo=(1+(PR156/PR151))*0.704=1.514V
OVP => VFB * 120%
UVP => VFB * 70%

PC30
4.7U_10V_K
0805_X5R

1
PR156
11.5K_F
0402

PR151
10K_F
0402

C

1

2

2

4 G

+5VALW

2

470K_J
0402

DDR_BST
DDR_DH
DDR_LX

D PQ58
SI7170DP-T1-GE3

2.2_J
0603

2

PR655 TPS51218DSCR

2

PR654
49.9K_F
0402

11
10
9
8
7
6
1

1

1

PGOOD GND
TRIP
VBST
EN
DRVH
VFB
SW
RF
V5IN
DRVL

1

PR39

PU13

1
DDR_TRIP 2
DDR_S5 3
DDR_VFB 4
DDR_RF5

5

1

DVT

2

C

TP196
tpc40b_50

S

1

1
1
2

PC141
NC_100P_50V_K
0402_NPO

PC37
0.1U_25V_M
0603_X5R
1
2

2
PR146
1K_F
0402

PC136
NC_1U_10V_K
0603_X5R
2
1

1

PQ57
SiR474DP-T1-GE3

4 G

SUS_PWRGD

39,43,49,61,81 SUS_ON

D

Place these CAPS
close to FETs

D

PR155
10K_J
0402
39

1206_X5R
10U_25V_M
PC45

2

5

+3VALW

D

1206_X5R
10U_25V_M
PC44

0.1U_25V_M
0603_X5R
PC40
2
1

DCBATOUT

RF=470Kohm ,300KHz
200Kohm ,350KHz
100Kohm ,390KHz
47Kohm ,450KHz
PR600
0_J

RUN_PWRGD

2
0402

4,12,39,75,80

D
81

VREF
1

G

null

S

B

PC570
NC_1U_10V_K
0603_X5R

MP

1
2
PR145 NC_0_J
0402

VCC

6

+3VSUS

VDDQ
VTT_IN

5
7

+1_5VSUS

G2998F11U
TP198
tpc40b_50

2A

RUN_ON1 27,39,75,77,80,81

MP

1

2

2

4

2
1
PC144
0.033U_10V_K
0402_X7R

2
1
PC147
0.1U_6.3V_K
0402_X5R
2
1
PC148
10U_6.3V_Y
0805_Y5V
2
1
PC146
10U_6.3V_Y
0805_Y5V

DDRDIMM_VREF

VTT
VTTS

EN

PC143
NC_1U_10V_K
0603_X5R

PVT

2
1
PC569
10U_6.3V_M
0805_X5R

8
3

+0_75VRUN

PU17

THERMALPAD
GND

1

2A

RUN_ON1#

PQ59
2N7002W

2

9
1

TP197
tpc40b_50

1

2

B

1

3

1

A

A

FOXCONN

DDR3 Power(+1_5V/+0_75V)

Size
A3

Document Number

Rev

M960&M970 H Model

SA

Date:
5

4

3

2

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

Title

Tuesday, December 29, 2009

Sheet
1

76

of

93

5

4

3

2

1

D

D

+3VRUN

1

C

C

09/10/22

delete PJ36

1
2

TP572
TPC35T_75

1

PVT
+1_8VRUN

PC249
NC_22U_6.3V_K
1206_X5R

1
2

16.2K_F
0402

2

G9731F11U

PC248
22U_6.3V_K
1206_X5R

PR586

1

+1_8V_FB

PC247
NC_0.01U_10V_K
0402_X7R

VO2
VO1
ADJ
GND

1

9
VIN
VPP
POK
VEN

4
3
2
1

1

PR585
100_J
0402

+1_8V_POK
2 +1_8V_EN

1A

PU32

2

1

THERMAL

RUN_ON1

5
6
7
8

PC250
0.1U_16V_M
0402_X5R
2
1

27,39,75,76,80,81

PC246
1U_10V_K
0603_X5R
2
1

PR584
1K_F
0402
2

1

2

+5VRUN

PC245
10U_6.3V_M
0805_X5R

1A

Vo=(1+(PR586/PR587))*0.8=1.8V

2

PR587
13K_F
0402

B

B

A

A

FOXCONN

SYS Power(+1_8V)

Size
A3

Document Number

Date:
5

4

3

2

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

Title

Rev

M960&M970 H Model
Sheet

Tuesday, December 29, 2009
1

SA
77

of

93

5

4

3

2

1

Placement TOP and BOTTOM Overlapped

09/11/21 change PC151 and PC156 from NC to mount
0.1uf for EMI request

Place these CAPS
close to FETs

4A

5
D

133K_F
0402

5

1
2
6
PR561 16.9K_F 0402

ILIM

LX2

22 17030_PHASE2

DL2

24 17030_LGATE2

TIME
CSP2

IMVP_PWRGD_PWM

19 IMVP_PWRGD_PWM

1
PR562
1
PR563

+3VRUN

17030_ILIM

2

2
1.8K_F 0402
2
NC_10K_J 0402

PROCHOT#

1
PR564

+3VALW

2
1.8K_F

CSN2

18

PWRGD

25

VRHOT#

17

CLKEN#

20

DRVSKP#

19

1

B

2

VSSSENSE

2
12K_F

CSP3

2

CSN3

1

IMON

Place these CAPS
close to FETs

2 0402_X7R

D

2 0402_X7R

PQ36

4 G
PR576
1K_J
0402
M8791_CSP3
1
PC278
NC_1000P_16V_K
0402_X7R
1

2

THRM

FBAC

9

FB

8

17030_FBAC

2

1

1

3

10

2

GNDS

D

TP224
tpc40b_50

1

1
PR127

0_J

0402

2
NC_0_J

0402

2
0_J

0402

PR569
2.21K_F
0402

+

2

1

2 1

2

1

PR190
ERTJ1VR103J
2 1
2

PR575
4.02K_F
0402

PR596
2.2_F
0603
PR519
0402
1 10_J

2

2

VCCSENSE 6

1

PC254
NC_1000P_16V_K
0402_X7R

2

1

1
PC255
NC_1000P_16V_K
0402_X7R

2
PR520
0_J
0402

VSSSENSE 6

Sense line are 18mil wide
Zo=27.4ohm

PC239
330U_2V_7.3x4.3
EEFSX0D331XE
2
1
PC80
0402_X5R
0.1U_6.3V_K

1

Load-Line R_FBAC: Loadl-Line=-1.9mV/A
Rcs = 0.709mohm
PR598 = (1.9mV/A) / (Rcs x 400us) = 6.34K

09/11/13 change pc253 from 1000P_16V_0402_X7R to
1000pF_50V_0402_X7R for MOR request

FOXCONN

39

Title

Date:
4

B

Rcs:
DCR = 0.76mohm
Rcs = DCR x (PR557 + PR185) / (PR557 + PR185 + PR555)
= 0.6061mohm

Size
A3
5

+

PC52
0.22U_25V_K
0603_X5R

1000P_50V_K
0402_X7R

IMVP_IMON 6

IMVP_OK

PR572
NC_3.9K_F
0402

1
SIR158DP-T1-GE3

1

PC253

IMVP_PWRGD 12,39

PVT

PVT

MAX17030GTL+

2

IMVP_PWRGD_PWM 1
PR166

2

S

PR573
NC_0_J
0402

PGND
41
1
PR111

6.34K_F
0402

PR571
0_J
0402

1

17030_IMON

4 G
2

17030_FB 2

Valley current limit:
V_TIME_LIM = 0.2 x PR561 / (PR560 + PR561) = 22.54mV
I_LIM = V_TIME_LIM / Rcs = 21.26A

VHCORE

PL5
0.36UH_28A_0.00076R
ETQP4LR36AFC

2

PR574
ERTJ0EV104J

C

+5VRUN

1
2
3

17030_THRM

40A

For EMI

SIR428DP-T1-GE3

PQ37

2

4A

S

0402

1

1
PR570
8.45K_F
0402

A

Placement TOP and BOTTOM Overlapped

PR598
+5VRUN

TP507
tpc40b_50

DCBATOUT

0402

17030_IMONA 4
2
1.8K_F 0402

1
PC566
PR565
0.022U_16V_K
0402_X7R
1
PR597

PVT

17030_UGATE2R
2
0_J 0603
PC252
0.22U_25V_K
0603_X5R

12 17030_CSP2
PC274
NC_1000P_16V_K 1
11
PC273
NC_1000P_16V_K 1

PWM3

CLK_EN#
17030_IMON

23 17030_UGATE2 1
PR567

PR594
PC51
2.2_F 0.22U_25V_K
0603_X5R
0603
1
2 1
2

PC77
0.1U_6.3V_K
0402_X5R

2

2

DH2

PR560

1

21 17030_BOOT2 1 PR558 217030_BOOT2R
2.2_J
0603

NC_1000P_16V_K 0402_X7R
1
2

PR557
4.02K_F
PR185
0402
ERTJ1VR103J
1
2 1
2

1

VCC

17030_VCC

BST2

PC276

SIR158DP-T1-GE3

+

2

7

PC279
2.2U_6.3V_M
0402_X5R

40

NC_1000P_16V_K 0402_X7R
1
2

PC238
330U_2V_7.3x4.3
EEFSX0D331XE
2
1

VDD

CSN1

PC275

1

26

39 17030_CSP1

+

PC240
330U_2V_7.3x4.3
EEFSX0D331XE

PSI#

CSP1

+

2

PGD_IN

15

S

1

31

17030_PGD_IN

4 G

PR556
NC_3.9K_F
0402
1
2

PR555
2.21K_F
0402

2

DPRSLPVR

27 17030_LGATE1

PQ38

PC244
330U_2V_7.3x4.3
EEFSX0D331XE
2
1

14

DL1

D

1

SHDN#

17030_DPRSLPVR

29 17030_PHASE1

PC241
330U_2V_7.3x4.3
EEFSX0D331XE

13

LX1

2 17030_UGATE1R
0_J
0603
PC76
0.22U_25V_K
0603_X5R

1

17030_SHDN#

28 17030_UGATE1 1
PR559

1
2
3

D6

DH1

5

D5

38

0402

1

PC60
1U_6.3V_M
0402_X5R

19

37

17030_D6

17030_PSI#

2
0_J

2

PR65
10_J
0603

1

C

4

17030_D5

1

+5VRUN

D4

PL8
0.36UH_28A_0.00076R
ETQP4LR36AFC

SIR428DP-T1-GE3

2

1
PR108

PSI#

36

PVT

PC156
0.1U_25V_M
0603_X5R

+3VRUN
6,79

D3

17030_D4

BST1

1

6,79 PM_DPRSLPVR

0_J

D2

35

For EMI

S

2

39 IMVP_VR_ON

0_J

34

17030_D3

4 G

D

PVT

PQ40

PR554
217030_BOOT1R
30 17030_BOOT1 1
2.2_J
0603

2

6,79

17030_D2

TON

1
2
3

6,79

1

0_J

D1

5

TP223
tpc40b_50

0_J

33

1
2
3

6,79

0_J

D0

17030_D1

5

6,79

0_J

2
200K_F 0402

1

6,79

0_J

1
16 17030_TON
PR553

2

6,79

32

1

6,79

17030_D0

2
0402
2
0402
2
0402
2
0402
2
0402
2
0402
2
0402

2

1
VID0
PR510
1
VID1
PR515
1
VID2
PR516
1
VID3
PR511
1
VID4
PR517
1
VID5
PR512
1
VID6
PR513
1
2
PR109
0_J 0402
1
2
PR107
0_J 0402
PR110 1 10K_J 2 0402

2
1
PC111
10U_25V_M
1206_X5R
2
1
PC153
10U_25V_M
1206_X5R
2
1

D

PC112
+ 47U_25V_6.3x5.9
25SVPF47M

2

PU28

1

2
1
PC110
10U_25V_M
1206_X5R
2
1
PC73
10U_25V_M
1206_X5R
2
1
PC151
0.1U_25V_M
0603_X5R

DCBATOUT

3

2

A

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

CPU Power_VHCORE
Document Number

Rev

M960&M970 H Model
Sheet

Tuesday, December 29, 2009
1

SA
78

of

93

5

4

3

2

1

D

D

C

C

1

1

1

1

1

+1_05V_VTT

PR647

NC_1K_J
0402
PM_DPRSLPVR

1K_J
0402

PR642

PR644

NC_1K_J
0402

1K_J
0402

1K_J
0402

PR640
NC_1K_J
0402

1

1
PR636

PR650

1K_J
0402

1K_J
0402

PR648

2

PR634

1K_J
0402

2

PR646

1K_J
0402

2

PR638

PSI#

1

VID6

1

VID3

1

VID2

2

PR649

NC_1K_J
0402

2

PR635

1K_J
0402

2

PR639

NC_1K_J
0402
VID5

2

PR643

NC_1K_J
0402
VID4

2

PR641

1K_J
0402

2

PSI#

TP232
tpc40b_50
TP233
tpc40b_50

+1_05V_VTT

PR633

2

6,78

6,78 PM_DPRSLPVR

1

1

1

+1_05V_VTT

NC_1K_J
0402

2

VID6

+1_05V_VTT

PR645

1

6,78
B

VID0

+1_05V_VTT

, PROC_DPRSLPVR = 1

NC_1K_J
0402
VID1

2

1

1

VID5

PSI = 0

PR637

2

VID4

6,78

+1_05V_VTT

1

6,78

1

2

1

+1_05V_VTT

1

VID3

+1_05V_VTT

2

VID2

6,78

+1_05V_VTT

1

6,78

1

2

1

1

VID1

2

6,78

TP225
tpc40b_50
TP226
tpc40b_50
TP227
tpc40b_50
TP228
tpc40b_50
TP229
tpc40b_50
TP230
tpc40b_50
TP231
tpc40b_50

1

1

2

VID0

1

Default value of VID [6:0] = [ 0100100] ,
6,78

B

NC_1K_J
0402

A

A

FOXCONN
Title

Size
A3
Date:
5

4

3

2

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

CPU Power_VID
Document Number

Rev

M960&M970 H Model
Sheet

Tuesday, December 29, 2009
1

SA
79

of

93

5

4

3

2

1

09/12/08 1.PR222=39.2k for VGA M92 XTX 1.0VPEG 1.1V voltage request
2.PR222=27k for VGA Park 1.0VPEG 1.0V voltage request
3.PR222=27k for VGA Madison 1.0VPEG 1.0V voltage request

Placement TOP and BOTTOM Overlapped

1

PWRCNTL_1R
2
PC269 47P_50V_J

1
1
2
1
PR211
NC_30K_F 0402

0402
1
PR179
NC_4.99K_F
2

0

X

X

X

0

0

0.95V

PWRCNTL_1

For Park XT middle
MB:PR183=15K

0.9V

GPU Voltage

PWRCNTL_0

1

0

X

X

X

0

0

1.12V

0.9V

B

M92 XTX
PVT

PWRCNTL_1

For M96 High MB:
PR183=10.5K

PWRCNTL_0

1

GPU Voltage

0

0.9V

X

X

X

0

0

1.2V

+1_0VPEG
1_0VPEG voltage

GPU chip

PR222

Madison-LP

27K

1.0V

Park-XT

27K

1.0V

39.2K

1.1V

1
1

PC172
0.01U_10V_K
0402_X7R
2
1
PC175
22U_6.3V_K
1206_X5R
2
1
PC176
22U_6.3V_K
1206_X5R

PEG_FB

+1_0VPEG

PVT

M92 XTX

PR229
100K_F
0402

2

FOXCONN

A

4

3

2

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

Title

VGA Power (ATI_VDD)

Size
A3

Document Number

Date:
5

1

Park-XT

3
1
2

PC573
NC_3300P_50V_K
0402_X7R

6
1

2

NC_47K_F
0402

S

GPU Voltage

PWRCNTL_0

1

4
3
2
1

2

9
THERMAL

G9731F11U

GPIO20

PWRCNTL_1

TP205
tpc40b_50

PU14

VO2
VO1
ADJ
GND

5 G

2

PQ39B
NC_2N7002DW

1

S

2A

PC179
10U_6.3V_M
0805_X5R

1

PC180
1U_10V_K
0603_X5R
2
1

2
VIN
VPP
POK
VEN

PC82
10U_25V_M_B
1206

PC69
10U_25V_M_B
1206
2
1

1
2
1
2

PR180
NC_10K_J
0402

1

PWRCNTL_0

D

PR178
NC_100_J 0402
PWRCNTL_0R 2 G
1
2
PC159
NC_1U_6.3V_K
0402_X5R

PR222
39.2K_F
0402
2
1

PR228
100_J
0402

A

PEG_POK
PEG_EN
PC174
0.1U_16V_M
0402_X5R
2
1

2

5
6
7
8

PWRCNTL_1

PVT

D

PR663

1

PVT

2

PR230
1K_F 0402
1

+5VRUN

RUN_ON1 1

PR210
0402 NC_68K_F

1
24

+1_5VSUS

GPIO5

For Madision LP
High MB:PR183=75K

0402_NPO

TP222
tpc40b_50

2N7002DW

4

1
2

S
PC160
NC_1U_6.3V_K
0402_X5R

PQ41B
2N7002DW

2

47K_F
0402

D

1

1

PR184
100_J 0402
2PWRCNTL_1R 2 G

S

PC571

GPIO

PWRCNTL_0

PVT

2

+3VRUN

3

2

PR183
0402 15K_F
2
1

2
6

1

5 G

2

Power
Control

+

Madison-LP

2

D

PR662

1

24 PWRCNTL_1

PC133
680P_50V_K
0603_X7R

PR550
5.36K_F 0402
1
2

NC_22P_50V_J

PVT

PR182
10K_J
0402
1

TP221
tpc40b_50

B

S

+

4.7_J
0603

C

0402_NPO

PC572
1

+3VRUN

1

4 G

0402_NPO

PC162
0.1U_6.3V_K
0402_X5R
2
1
PC167
330U_2V_T
EEFSX0D331ER
2
1
PC163
330U_2V_T
EEFSX0D331ER

PWRCNTL_0R
2
PC158 NC_47P_50V_J

PR163

D

2

1
1

PR551
10K_F 0402
1

C

VGA_FB

PR90
1K_J
0402

Imax = 15A
OCP = 20A
Fsw = 300KHz
Skip Mode
Vo=(1+(PR550/PR551))*0.6=0.9V
Vo=(1+(PR550/(PR551//PR210)))*0.6=1.1V
OVP => VFB * 116%
UVP => VFB * 70%

+5VALW
VGA_DL

TPS51217DSCR

15A
VDD_CORE

PQ39A
NC_2N7002DW

6

TP206
tpc40b_50

2
CF_1.0UH_11.5x10.4
PCMC104T-1R0MN
PL7

4

DRVL

3A

1

TRAN

1

2

7

5

VGA_DH1

1

V5IN

D

0603

2

VFB

PR67
0_J

PC81
0.1U_50V_K_B
0603
2
1

5
SW

4

VGA_DH

1

EN

8

Place these CAPS
close to FETs

1
2
3

9

3

S

1
2
5
3
PQ42
SI7170DP-T1-GE3

DRVH

2

2

PC164
NC_0.1U_10V_K
0402_X5R

VBST

TRIP

4 G

PC211
1U_6.3V_M_B
0402

1

PR86
84.5K_F 0402
1
2

PR177
100_J
0402

PGOOD

2

PQ41A

2

10

3300P_50V_K
0402_X7R

1

RUN_ON1

0402

PR216
NC_820K_F
0402

2

+3VRUN

PR549
PC237
2.2_J 0.1U_50V_K_B
0603
0603
1
2 1
2 VGA_BST

PU29

1

GND

1 PR632 2
NC_0_J

4,12,39,75,76 RUN_PWRGD

27,39,75,76,77,81

D
0402
1

11

+3VRUN

PR176
NC_10K_J
2

PQ43
SiR474DP-T1-GE3

D

DCBATOUT

Rev

M960&M970 H Model
Sheet

Tuesday, December 29, 2009
1

SA
80

of

93

4

3

+5VALW

+12V_1

1

+1_5VSUS

+1_5VRUN

C

27,39,75,76,77,80

5 G

2

RUN_ON1

null

D

S

1

PR194
NC_470K_J

2

1

G

1
PC173
0.047U_16V_K
0402_X7R

PC177
NC_10U_6.3V_M
0805_X5R

0603

S

1

2N7002DW

PQ45A

PQ45B

1

D
S

4

PR192
100_J
0402

TP152

1

tpc40t_50

2

2
6

1

3

PC585
0.1U_50V_K
0603_X7R

2N7002DW
null

For EMI

RUN_ON1# 2 G

ON_1_5VRUN

2

1
2
1

PC584
680P_50V_K
0603_X7R

2

1

C6333
680P_50V_K
0603_X7R

2

C6332
680P_50V_K
0603_X7R

1

1

D

2

2

PC108
NC_10U_6.3V_M
0805_X5R

2

G

2N7002DW
null

TP184 tpc40t_50

1

3

PR193
100K_J
0402

PVT

3
2
1
1

S

5

4

1

1A

SI7326DN-T1-E3

S

PR189
100K_J
0402

+3VSUS
PQ26

PQ48B

S

4

39,43,49,61,76 SUS_ON

PQ48A

2 G

D

7A

D

6

1
3
D

+5VALW

+3VALW
D

5 G

09/11/21 Add PC584 680pf,PC585 0.1uf near PQ26 for
EMI request.

PQ44
IRFH3707PBF

PR206
1K_J
0402

SUS_ON#

PC122
NC_10U_6.3V_M
0805_X5R

2

2

2

1

1

G

PR205
100K_J
0402

2

CP_SUS_ON_LOAD

2

2
PR207
100K_J
0402

S

4
1

TP111 tpc40t_50

1

2
1
PR132
NC_470K_J
0603

3

D

1

0.6A

3
2
1

G

+12V_1

PC189
0.01U_25V_M_B
0402

D

S

2

D

5
PQ31
TP0610K-T1-E3

1

+5VSUS
PQ30
SI7326DN-T1-E3

+12V

2

1

5

2N7002DW
null
C

4.5A
tpc40t_50
TP180

PQ47

2

76

RUN_ON1#

RUN_ON1#

1

PR660
330_J
0603

PQ71B
ME2N7002KW

6

2

33_F
0402

D

5 G

null

S

D

2 G

S

B

1

1

2

S

2

PQ71A
ME2N7002KW

PR128
NC_470K_J
0603

S
2N7002DW
null

+3VALW

+3VRUN

tpc40t_50
TP179

PQ27

1

4A
1

C6335
NC_680P_50V_K
0603_X7R

2

2

C6334
NC_680P_50V_K
0603_X7R

2

G

4

PC117
NC_10U_6.3V_M
0805_X5R

1

3
2
1
1

S

D

SI7326DN-T1-E3

5

1

PR129
100_J
0402

PC188
1U_10V_K
0603_X5R

2

2 5 G

4

38,39,43 RUN_ON

1

PQ29A

PVT

4

D

S

2N7002DW
2
1

6
B

2 G

1

3

RUN_ON#

PQ29B

PC120
0.01U_25V_M_B
0402

RUN_ON_LOAD

2

D

+1_5VRUN

PR661

4

2

PR130
100K_J
0402

PVT

G

PR131
100K_J
0402

+0_75VRUN

3
2
1

1

1

1

5

D

SI7326DN-T1-E3

3

+12V_1

1

+5VALW

+5VRUN

1

+5VALW

C6336
NC_680P_50V_K
0603_X7R

For EMI

A

A

FOXCONN

Others power plan

Size
A3

Document Number

Date:
5

4

3

2

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

Title

Rev

M960&M970 H Model
Sheet

Tuesday, December 29, 2009
1

SA
81

of

93

B

1

2

2

8
6

3
D

5 G

2

S

4

1
2

8
2
1
PC19
0.1U_6.3V_K
0402_X5R
2
1
PR21
470K_J
0402
2
1
PC18
1U_6.3V_M
0402_X5R
4

PU1C
74AHC3G14DC

PU1B
74AHC3G14DC

2

+5VALW_LDO
MAIN_DC_SW_OFF#

2

S80925C_VDD

PR226
100K_F
0402

S80925C_OUT 1

OUT

S-80925CNMC-G8V-T2G

4

CD

5

B

PC195
0.01U_10V_K
0402_X7R

1

1
1SS400PT

2

ALW_ON 2

VSS VDD

PQ4B
2N7002DW

NC

2

PU15

1
PD30

3

S

PR227
100K_J
0402

2

PQ4A
2N7002DW

1

S

4

PR3
47K_J
0402

ALW_ON 39,74

2

6

3

A6008

ACDRV#

2
PD5
1SS400PT

D

2 G

1
3
1
PR225
215K_F
0402

DC_IN_MOS

1
2

6

2

CHN222PT
PD29

2

D

5 G
1

1
3A60122

DC_IN_G1

2

1

1

1

PR140
10K_F
0402

PD20
BAT54WAPT

PR141
0_J
0402
AC_OFF_3# 1

2

1
1

A60092

2
A6011

39,71

L --> 75W
H --> 64W

DC_IN_R
PR2
100K_J
0402

A6010

1
PD6
MMVZ5231BPT

SI2303BDS

1

D

S

PR6
PRG18BB330MB1RB
1
2

G

1

3

A6005

2

EC_PWRLIMIT_CTRL

E
C

PR137
200K_J
0402

3
G

S

2

null

3A6007

PQ35B
PUMB2.115
null

PR139
200K_J
0402

D

1

B

5

PQ3

2

A6006

PQ35A
PUMB2.115
null

S

4

3

PR30
100K_F
0402

3

1
2

DC_IN_MOS

2N7002W
null

G

PWRLIMIT_FB

NC_2N7002W

5

PQ9

2

CD

1

1
1

OUT

D

System OVP protect

PQ17

3

DCBATOUT BT+

09/11/13 change pc41 from 1000P_16V_0402_X7R to
1000pF_50V_0402_X7R for MOR request

B

2

UL_IN#

2

2
VSS VDD

NC

S-80925CNMC-G8V-T2G
PC41
1000P_50V_K
0402_X7R

PVT

1
PQ33A
2N7002DW

D

AC_OFF_3# 71

1

1

1

5

NC_1SS355PT
ALW_ON
2

C

PR40
10K_F
0402

1

SC70_CD

PD1

BT+

B

PU4

4

1SS355PT
2

PJ15 Near the DDR socket door
1
PD18
NC_CHN222PT

C

2

PR88
100K_J
0402

PD2

1

DC_IN

3

PQ11
2PC4617Q

PS_ERR#

8

1
PR10
100K_J
0402

4

7

DC_IN_MOS

2

C
E

PC36
0.1U_6.3V_K
0402_X5R

2
0_J 0402

6
1

1

1

PU1A
74AHC3G14DC

3

3

1
PR38

S

PD8
CH520S-30PT
2

1

3

18.2K_F
0402

E

C

2
2
PD12
MMHZ5234BPT

PR31
1K_J
0603

2 G

2

SYS_PRS# 71
D

PC21
0.1U_6.3V_K
0402_X5R

1

UL_IN#

80.6K_F
0402

PQ33B
2N7002DW

1

PD9
MMSZ5234BPT

1
PD11
CF_CHN222PT

2

1
PD15
CHN222PT

2

2
1
PR171

2

2

3

2

2
PR16
1K_J
0402

+1_05V_VTT

1

PR23
10K_J
0402

2

2
1

2
1
PC190
0.1U_6.3V_K
0402_X5R
1

PR169

PD14
26.1K_F CHN222PT
0402

1

VCCRTC
VHCORE

PR172
27K_F
0402

1

2

1

2

2

PR170
27K_F
0402

PR167

PD16
CHN222PT

3

VDD_CORE

1

PR168
27K_F
0402

2

PJ15
OPEN_JUMP_OPEN2
1
2

1

+3VALW

1

+1_5VSUS

D

3

BT+

2
1
PD17
MMSZ5234BPT

+5VALW

2
1
PC43
2.2U_10V_M
0805_X5R

+0_75VRUN

4

4

5

System SCP Protect

2
MAIN_DC_SW_OFF#

DVT

PR218

PR78

NC

68.1K

2.05K

PWRLIMIT

Battery UVP Protect
PC567
NC_2.2U_10V_M
0603_X5R
1
2

PWRLIMIT Protect

1

H M/B(75W)

3.76A/71.41W

L M/B(64W)

3.2A/60.82W

PC46
NC_0.1U_6.3V_K
0402_X5R

1
2
BQ24753A_IADAPT 3

TCAP VCC
VSS VO#
VIP
VIN

NC_FP9922S6GTR
PWRLIMIT_FB
PR78
NC_0_J
0402

1

71 BQ24753A_IADAPT

2

PR223
NC_0_J
0402 1

2

+5VALW_LDO
PR651
NC_39.2K_F
0402
6 +5VALW_LDO_R
5 G1336_VOUT1 PR629 1 NC_0_J 2 0402 PWRLIMIT#
4 G1336_VIN

2

A

PU31

1

For Power limit

PQ17

2

DVT

PR219

1
2
NC_10K_F
0402
1
2

PWRLIMIT# 39

PR218

1

A

2

+5VALW_LDO

NC_45.3K_F
0402

PC48 0402_X5R
NC_0.1U_6.3V_K

FOXCONN

OVP protection

Size
A3

Document Number

Date:
5

4

3

2

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

Title

Rev

M960&M970 H Model
Sheet

Tuesday, December 29, 2009
1

SA
82

of

93

A

B

C

Wireless card

D

E

Blue Tooth

null
BOSS_4x5.2

null
BOSS_3.8x4

MP

null
BOSS_3.8x4

LABLE1

EVT
AMI-APTIO

1

BOSS4

1

BOSS3

1

BOSS1

AMI Label (For MP Only)

MP

4

System

Thermal

4

KB

hole_tsh236x315bsh315x315d98u
H1

H2

H3

H31

H8

H10

hole_tsh236x315bshaped98_30

hole_tc236br236x315d98

hole_tshbs315x236d98do106x98n

1
1

1

2

DVT

hole_tsh236x315bsh354x315d98u
hole_tsh236x260bsh315x374d98
H5

1

1

EVT

hole_tsh236x315bsh354x315d98

NPTH

1

1

DVT

H4

PTH

1

DVT

1

1
1

1

1

H7

PVT

EVT

PVT

hole_tsh236x315bsh315x315d98

H6
H9

1

hole_tsh236x315bsh315x236d98

1

1

3

1

1

1

1

1

hole_tr236x260br406x315d98

PVT

DVT

3

EVT
hole_tsh236x315bsh354x315d98

ODD BKT
H14

1

1

hole_tsh270x236bsh309x315d98

EVT

EVT
2

2

EVT

1

H24
hole_c158d158n

EVT

1

1

H23
hole_c158d158n

1

1

H22
hole_c158d158n

1

1

1

H21
hole_c158d158n

EVT

CPU Plate

1

hole_trsh276x256bc217d98d87n
U_GND

U_GND

U_GND

U_GND

NPTH

H28
PTH

2

DVT

P_GND

hole_tbc197d91d87n
P_GND

Audio Board

NPTH

2

Function Board

EVT

PAD1

P_GND

PAD2

P_GND

PVT

PAD3
1

1

hole_tr295x276br315x354d98od95n

1

1

1
1

2

PTH

pad_smdsh591x374

NPTH

2

hole_ts236x398bs315x437d91d98n
H27

pad_smdsh591x374

PTH

NPTH

pad_smdsh591x374

1

1

H25

PTH

1

DVT

1

H26
H30

1

hole_tsh228x433bsh268x472d98

H29

1

hole_tsh228x465bsh268x465d98

P_GND

DVT

FOXCONN
Title

HOLE

Size
A3

Document Number

Date:
A

B

C

D

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division
Rev

M960&M970 H Model
Sheet

Thursday, December 24, 2009
E

SA
83

of

86

5

4

3

P.45
P.23
P.26
P.26
P.28
P.28
P.28
P.28

(2009/06/22)

D

P.28
P.28
P.28
P.40

[VGA(I/O)]Delete R5858 and R5859 for needless from AMD suggestion.
[VGA(I/O)]Connect VDD2DI to +1_8VRUN directly and delete.
L98,C[6254:6256] for AMD suggestion.
[VGA(I/O)]Connect A2VDD to +3V3_DELAY directly and delete.
L12,C529,C91,C85 for AMD suggestion.
[VGA(Power)]Delete net BIF_VDDC and C6156,C6157 for needless
AMD suggestion.
[VGA(Power)]Change VDD3 power plan from +1_8VRUN to +3V3_DELAY
from AMD suggestion.
[VGA(Power)]Connect Ball AH29 to GND from AMD suggestion.
[VGA(Power)]The power for DPB can be shared with DPA from AMD suggestion.
[VGA(Power)]DPC and DPD can be powered directly without filters
from AMD suggestion.
[EC]Add R5877,R5878 for SYSTEM_ID2 used from SW's requested.

P.28
P.28
P.26
P.28
P.28
P.29
P.29
P.63

(2009/06/23)

C

P.25 [VGA(I/O)]Delete R5846, R5847, R5848, R5849, R5838, R5839, R5840,
C6188, C6189, U215 for needless from AMD suggestion.
P.73 [DCIN & Charger]Add test points TP1148~TP1155 for BFT test.
P.53 [Camera Connector]Add test points TP1156~TP1161 for BFT test.
P.57 [FAN]Add test points TP1162~TP1165 for BFT test.
P.35 [LAN]Add test points TP1166~TP1181 for BFT test.
P.43 [Debug Port]Add test points TP1186~TP1193 for BFT test.
P.61 [AUDIO Speaker Conn]Add test points TP1194~TP1197 for BFT test.
P.41 [KB Connector]Add test points TP1198~TP1207 for BFT test.
P.60 [SWITCH DB Conn.]Add test points TP1208~TP1211 for BFT test.
P.73 [DCIN&Charger]Add test points TP1212~TP1218 for BFT test.

P.20
P.20
P.21
P.46
P.46
P.37
P.37
P.37
P.37

P.41 [KB Connector]Del CN4 because M960 and M970 KB connectors are decided
to co-use.
P.67 [AUDIO Speaker AMP]Del this page
because AMP is combined with ALC275
P.39 [PCIE (MS&iLINK)]Change the net name from "SDMS_VCC" to "VCC_MS"
because this net is for MS power only.
P.26 [VGA (Memory BUS) 4/6]Change the power source from +1_8VRUN to +1_5VRUN
because the power source of DDR3 VRAM is +1_5VRUN.
B

P.24
P.25
P.26
P.13
P.55
P.55

A

P.38
P.10
P.11
P.11

(2009/06/24)
P.23
P.39
P.10
P.24

P.72
P.72
P.74
P.76
P.77
P.79
P.82
P.93

1

(2009/06/25)

M960/M970 EVT
P.25
P.25
P.28
P.25
P.28
P.28
from
P.28

2

P.11
P.14

[CRT]Add and NC Q11,D9,R469,C279,R767,U9 for Semi-PNP.
[HDMI]Del C100,C107,C105,C106,C108,C109,C111,C112 for redundant design.
[PCH (HDA,JTAG,SAT)]Del R302 for redundant design.
[VGA (Strap) 2/6]Change net name "ATI_DVPDATA[23:20]" to ATI_DVPDATA[3:0]
for AMD recommend.
[VGA (Strap) 2/6]Del R5767,R5768 for AMD recommend.
[VGA (I/O) 3/6]Del R5837 for AMD recommend.
[VGA (Memory BUS) 4/6]Add C6105,C6106,R5871,R5872 for AMD recommend.
[PCH (LVDS,DDI)]Del R1571 and place TP1219 on DDPD_HPD
because this pin is not necessary for pull-low to GND.
[Felica Connector]Del F14,R5874,R5875
because the F14 related circuit is out of Felica spec.
[Felica Connector]Stuff C869,U48,R630,C845
because F14 related circuit is out of Felica spec.
[DCIN&CHARGE]Change DC-IN current form 8A to 5A.
[DCIN&CHARGE]Change PD7 from SMD15C to TVS2315PT.
[Idendify ID]Change PC61 from 1Uf_10V_k to 220Pf_50v_J,then NC PC61.
[VTT&PCH Power(+1_05V)]Change PR116 from 100k to 470k.
[DDR3 Power(+1_5V/+0_75V)]Change PR655 from 100k to 470k.
[CPU Power_VHCORE]Delete PC67,PC155.
[Other plane power]Change PQ29,PQ45,PQ48: from 2N7002DW to 2N7002SPT.
[OVP protection]Change PC41 from 0.01Uf to 1000Pf.

P.15
P.51

[Mini-PCIE Card (WLAN)]Add R5901 on WLAN_EN for RF VEDS test.
[VGA (PCI-E) 1/6]NC R5831 for AMD M96.
[VGA (Memory BUS) 4/6]NC R5798,R5800,R5799,R5802,R5803,R5804 for AMD M96.
[VGA (Memory BUS) 4/6]NC R5779,R5880 for AMD M96.
[VGA (Power) 6/6]NC L90,C6196,C6194,C6195,C6192,C6193 for AMD M96.
[VGA (Power) 6/6]NC L91,C6197,C6194,C6199,C6200 for AMD M96.
[VGA (Power) 6/6]NC L26 for AMD M96.
[VGA (Power) 6/6]Add L30 and connect between VDD_CORE and SPV10
for AMD M96.
[VGA (Power) 6/6]NC L92,C6233,C6234,C6236 for AMD comment.
[VGA (Power) 6/6]NC L96,L97,C6248,C6251,C6249,C6252,C6250,C6253
for AMD comment.
[VGA (Memory BUS) 4/6]Change C6100 from 2200P to 1U for AMD comment.
[VGA (Power) 6/6]NC R5833,R5834 because M96 not support for PowerXpress.
[VGA (Power) 6/6]Add R587 and connect to GND for PowerXpress function
of Park and Madison.
[VRAM(DDR3)# 1/4]Change R4030,R4019,R4027,R4028 from 1.33K to 4.99K
for AMD comment.
[VRAM(DDR3)# 1/4]Add R5874,R5875,C6303 for AMD comment.
[SWITCH (Botton & KB LED)*]Change P_VR1,P_VR2,P_VR3,P_VR4,P_VR5
for EMC team request.
[DDRIII(SO-DIMM_0) 1/2]Del SPR1,J1.
[DDRIII(SO-DIMM_0) 1/2]Connect CN34 207 Pin to GND.
[DDRIII(SO-DIMM_0) 2/2]Connect CN35 G2 Pin to GND.

4

C

[LAN (88E8057) 1/2]Del R1462 for Marvell comment.
[LAN (88E8057) 1/2]NC C997,R94 for Marvell comment.
[Inverter Connector]Add U89C,R809,R684,C902,R772 for MOR's request.
[Inverter Connector]Change the off-page from "BL_OFF#" to "INV_EN"
for MOR's request.
[Inverter Connector]Add U89A,U89B,C877,R687 for MOR's request.
[Inverter Connector]Add an off-page of BL_OFF# on U89D
for MOR's request.
[LVDS Connector]Change the off-page of 35/36 pin of CN13
to INV_BRADJ/INV_ENABLE
for MOR's request.
[PCH (HDA,JTAG,SAT)]Add R5905 to let JTAG_TCK pull down for MOR's request.
[PCH (PCI-E,SMBUS,CLK)]Add R539,R540 to let PCIECLKRQ3#,PCIECLKRQ4#
to pull high to +3VRUN for MOR's request.
[PCH (PCI-E,SMBUS,CLK)]Add R579 to connect WLAN_CLKREQ# to +3VSUS
for MOR's request.
[PCH (PCI-E,SMBUS,CLK)]NC R577 for MOR's request.
[PCH (PCI,USB,NVRAM)]Change Bluetooth function from port 13 to port10
to meet Freedom Project Product Specifications.
[PCH (GPIO,VSS_NCTF,RSVD)]Del GPIO39 related circuit
because this pin is for LCDID3
[PCIE (MS&iLINK) 1/2]Delete i-Link function from Freedom_specV0.6.

B

A

FOXCONN
Title

Size
A3
Date:

5

D

3

2

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

History(1)
Document Number

Rev

M960&M970 H Model
Sheet

Thursday, December 24, 2009
1

SA
84

of

86

5

4

M960/M970 EVT

(2009/06/26)

D

P.19 [CLOCK GEN]Change U31 from SL28748ALC to SL28748CLC.
P.14 [PCH (PCI,USB,NVRAM)]Del USB_PN12,USB_PP12 off-page and add TP365,TP452
on tha same ports.
P.45 [Mini-PCIE Card (WLAN)]Del U45,C891 for disable WIMAX function
P.45 [Mini-PCIE Card (WLAN)]NC 36pin,38pin of CN12 for disable WIMAX function
P.15 [PCH (GPIO,VSS_NCTF,RSVD)]Add an off-page "LCDID4" on GPIO48
and change the net name to LCDID4 for LCDID[4:0].
P.15 [PCH (GPIO,VSS_NCTF,RSVD)]Del R5867 for LCDID[4:0].
P.63 [SWITCH (Botton & KB LED)*]Del "VAIO" button
from Freedom Project Product Specifications V0.6.
P.63 [SWITCH (Botton & KB LED)*]Change the button names "Web" and "Display Off"
to "Instant On" and "VAIO" from Freedom Project Product Specifications V0.6.
P.51 [PCIE (MS&iLINK) 1/2]Connect TPB+/- to GND and NC TPAP0/TPAN0/TPBIAS0
to disable i-Link function for Realtek comment.
P.51 [PCIE (MS&iLINK) 1/2]Add R1468 and NC it to disable i-Link function
for Realtek comment.
P.12 [PCH (DMI,FDI,GPIO)]Connect SYS_PWROK line to ALW_PWRGD through D33
for MOR's request.

C

P.44 [Express Card]Add R5457 between the gate and the source of Q38
for MOR's request.
P.68 [AUDIO (Head Phone Jack)*]Add U_R220 pull-high to U_VDDA on U_HP_IN_5
for Realtek comment.
P.68 [AUDIO (Head Phone Jack)*]Change U_GND ground to U_A_GND
for Realtek comment.
P.69 [AUDIO (Ext MIC Jack)*]Add U_R221 pull-high to U_VDDA on U_EXTMIC_IN
for Realtek comment.
P.69 [AUDIO (Ext MIC Jack)*]Change U_C35/U_C36 to 4.7u X5R for Realtek comment.
P.84 [HOLE & AMI LABEL]Add H1~H20 for ME request.
P.25 [VGA (I/O) 3/6]Add 10K ohm resistors to let ATI_JTAG_TRSTB,ATI_JTAG_TDI,
ATI_JTAG_TCLK,ATI_JTAG_TMS,ATI_JTAG_TDO pull up to +3V3_DELAY.

(2009/06/29)

B

P.68 [AUDIO (Head Phone Jack)*]Change U_A_GND which is connected to U_C9 pin2
to U_GND.
P.72 [DCIN&Charger]Change PCN1 connector to BP91071-B51E3-7H for ME request.
P.50 [eSATA Combo Conn.]Change CN27 connector to 3Q38111-R21C3-8H
for ME request.
P.58 [Touch Pad]Change SW2/SW3/SW6/SW7 to 19-SKRPABE-1000 for ME request.
P.22 [Braidwood Connector]Change NC39 to 1N-0078002-F1G0 for ME request.
P.51 [PCIE (MS&iLINK) 1/2]Del R1468 and connect XOUT to U71 A2
for Ricoh's comment.
P.28 [VGA (Power) 6/6]NC AH29 U204E for AMD's comment.
P.16 [PCH (POWER) 1/2]Change R366,R325 to 100 ohm for Intel'comment.
P.16 [PCH (POWER) 1/2]Change C141 to 1U for Intel'comment.
P.09 [ARD (RESERVED)]Change R1274 to 3.3K for Intel's comment.

(2009/06/30)

A

P.25 [VGA (I/O) 3/6]Change JTAG_TCK to pull-low to GND
through a 10K ohm resistor for MOR's request.
P.25 [VGA (I/O) 3/6]Del R5910 for MOR's request.
P.25 [VGA (I/O) 3/6]NC R5906,R5907,R5908,R5909 for MOR's request.
P.26 [VGA (Memory BUS) 4/6]Del C6105,C6106,R5879,R5880 for MOR's request.
P.28 [VGA (Power) 6/6]Del R5802,R5803 and connect DPE_VDD18/DPE_VDD10
to DPF_VDD18_[2:1]/DPF_VDD10_[2:1] for MOR's request.
P.28 [VGA (Power) 6/6]Del L96/C6248/C6249/C6250/L97/C6251/C6252/C6253
for MOR's request.
P.80 [CPU Power_VID]Stuff PR638,PR646 for Power request.
P.80 [CPU Power_VID]NC PR637,PR645 for Power request.
P.28 [VGA (Power) 6/6]Del L80/C859/C858/C860/L81/C862/C861/C6291/L82
/C6165/C6164/C866 for MOR's comment.

3

2

1

P.45
P.12
P.54
P.28

[Mini-PCIE Card (WLAN)]Del R824 for MOR's request.
[PCH (DMI,FDI,GPIO)]Change R911 to 10K for MOR's request.
[Bluetooth Connector]Del C378 for MOR's request.
[VGA (Power) 6/6]Del L6,Q7,Q9,R5828,R5829,R5830
because M960/M970 do not use BBP function.
P.45 [Mini-PCIE Card (WLAN)]NC CN12 15pin and del R18 for RF request.
P.56 [Status LED & LID]Add LED6/LED7/LED8/LED9 for M970 only.
P.45 [Mini-PCIE Card (WLAN)]Add R17 and NC it for MOR's request.
P.25 [VGA (I/O) 3/6]Del TP1104,TP1105,TP1106,TP1230
because these test points are redundant.
P.28 [VGA (Power) 6/6]Change net name DPE_VDD18/DPE_VDD10 to
DPEF_VDD18/DPEF_VDD10 for the co-use power DPE_VDD/DPF_VDD.
P.84 [HOLE & AMI LABEL]Del BOSS9,BOSS10 for ME request.
P.84 [HOLE & AMI LABEL]Add CPU hole H21,H22,H23,H24 for CPU socket.
P.50 [eSATA Combo Conn.]Del eSATA repeater schematic (U214,C766,C776,C759,C745,
R5754,R5835,R5756,R5755,R5757,R5758,R5759,C718,C387) for over-design.
P.10 [PCH (HDA,JTAG,SAT)]Change SPI_CLK_SW/SPI_MOSI_SW/SPI_MISO_SW
to SPI_CLK_L/SPI_MOSI_L/SPI_MISO_L for modifing the SW reserve design.
P.28 [VGA (Power) 6/6]Del R5833,R5834,R5837 and connect U204F AL21 to GND
because M960/M970 do not have PowerXpress function.
P.25 [VGA (I/O) 3/6]Add two connection ATI_LVDS_SCL/ATI_LVDS_SDA to CN13 5/6 pin
and pull-high 4.7K to +3V3_DELAY for SW request to add EDID function.

(2009/07/02)

C

P.38 [LVDS Connector]Connect CN13 Pin1 to LCDVCC for LCD power supply.
P.38 [LVDS Connector]Connect CN13 Pin34 to GND for LCD power supply.
P.51 [PCIE (MS&iLINK) 1/2]NC R820/C868/R817/C865/R818/C864
because SD_CD#/SD_WP#/MS_CD# has an internal pull-up resistor
and the debouching circuit.
P.36 [LVDS]Update Panel ID and related information.

(2009/07/03)

P.10 [PCH (HDA,JTAG,SAT)]Del TP119/TP123/TP133/TP136/TP137/TP138 and R442
because this is SW reserve design.
P.14 [PCH (PCI,USB,NVRAM)]Del Q39/Q37/R5456/SW5/R300 for changing
GNT1#/GNT0# control method.
P.14 [PCH (PCI,USB,NVRAM)]Add R345/R346 pull-high to +3VRUN
for controling GNT1#/GNT0#.
P.14 [PCH (PCI,USB,NVRAM)]Change R344/R392/R345/R346 to 10K ohm.
P.45 [Mini-PCIE Card (WLAN)]Del R17 and change the net name "MINI_PCIE_+3_3V_R"
to "MINI_PCIE_+3_3V" to del RF reserve circuit.
P.70 [AUDIO (USB)*]Change U_CN2/U_CN3/U_CN6 to 2N-0004009-MKG0 for ME request.

4

B

P.64 [AUDIO (CODEC)*]Change U_R5774 to 100K ohm and change the power source
on it from U_VDDA to U_+12V because Gate voltage of U_Q55 is too low.
P.67 [AUDIO (AUDIO & USB Conn)*]Move U_SUS_ON to U_CN1 Pin22 and add U_+12V
on Pin7.
P.62 [AUDIO/USB DB Conn.]Move SUS_ON to CN31 Pin29 and add +12V on Pin44.
P.37 [Inverter Connector]Del R400 for MOR's request.
P.38 [LVDS Connector]Add Q177/Q178/R5736/R5737/C575 and change L98
for rush current issue.
P.36 [LVDS]Del R136 for redundant design.
P.15 [PCH (GPIO,VSS_NCTF,RSVD)]Add a NC resistor R979 to let GPIO8 pull-low
to GND.
P.14 [PCH (PCI,USB,NVRAM)]Change Bluetooth USB port to port13.
P.14 [PCH (PCI,USB,NVRAM)]Change USB External Port-1 to USB port5
and eSATA change to port0.

(2009/07/04)

A

P.45 [Mini-PCIE Card (WLAN)]Restore U45,C891 for WIMAX function.
P.45 [Mini-PCIE Card (WLAN)]Connect 36pin,38pin of CN12 to USB_PN12_L/USB_PP12_L
for WIMAX function.
HON HAI Precision Ind. Co., Ltd.
P.45 [Mini-PCIE Card (WLAN)]Add J5 to connect
CCPBG - R&D Division
Title
Pin42 and Pin44 of CN12 for MOR's request.
History(2)

FOXCONN
Size
A3

Date:
5

D

(2009/07/01)

3

2

Document Number

Rev

M960&M970 H Model
Sheet

Thursday, December 24, 2009
1

SA
85

of

86

5

4

M960/M970 EVT

(2009/07/07)

D

P.54 [Bluetooth Connector]Add C378 pull-low to GND refer to M930.
P.56 [Status LED & LID]Del POWER/SUSPEND LED and its related circuit
for ID changing.
P.12 [PCH (DMI,FDI,GPIO)]Change R973 to 2.2K ohm for MOR's requirement.
P.28 [VGA (Power) 6/6]Add R5816 between GND to PX_EN and set N.C
for MOR's request.
P.38 [LVDS Connector]Add Q177 and related RC for protecting rush current.
P.61 [AUDIO Speaker Conn]Del Q28/Q30/Q53 and connect Q25 and Q27
because short protection circuit can marge L channel and R channel.
P.04 [ARD (CLK,MISC,JTAG)]Add Q72 for Intel S3 Power Reduction issue.
P.72 [DCIN&Charger]Delete PR17.
P.75 [SYS Power (+3_3V/+5V)]Delete close_jump GP2.
P.77 [DDR3 Power(+1_5V/+0_75V)]Change 1.5VSUS full load from 12A to 13A.
P.77 [DDR3 Power(+1_5V/+0_75V)]Change PR654 from 46.4k to 49.9k
P.82 [Others power plane]Change 1.5VRUN full load form 6A to 7A.
P.82 [Others power plane]Add 1.5VRUN discharge circuit
(add PR660 330ohm,PQ71 2N7002EPT).
P.38 [LVDS Connector]Del R474/R473 and related EDID circuit for disabling EDID.

(2009/07/08)
C

B

P.56 [Status LED & LID]Add Q18/Q21/Q48/Q51/R384/R390/R690/R691/R694/R695
for POWER/SUSPEND LED location changing.
P.54 [Bluetooth Connector]Del C378 because C377 has the same function.
P.40 [EC+KBC(NPCE783L)]Add SYSTEM_ID3 (R5891/R5900) for SKU control.
P.25 [LVDS Connector]NC CN13 Pin3 because EDID is disabled.
P.63 [SWITCH (Botton & KB LED)*]Del P_SW3 and add P_CN4
for POWER/SUSPEND LED location changing.
P.56 [Status LED & LID]Change Q18/Q21/Q50 to DTC114EUB for MOR's request.
P.07 [ARD (GRAPHICS POWER)]Change VDDQ power source from +1_5VSUS to +1_5VRUN
for Intel S3 Power Reduction issue.
P.60 [SWITCH DB Conn.]Change CN2 to 14pin type
for POWER/SUSPEND LED location changing.
P.63 [SWITCH (Botton & KB LED)*]Change P_CN3 to 14pin type
for POWER/SUSPEND LED location changing.
P.51 [PCIE (MS&iLINK) 1/2]Change CN36 type for ME request.
P.15 [PCH (GPIO,VSS_NCTF,RSVD)]Set GPIO27 as RST_GATE
for Intel S3 Power Reduction issue.
P.75 [SYS Power (+3_3V/+5V)]Change NC PR118 to NO NC PR118 and NC PR234,PR235.
P.83 [OVP protection]Delete reserved Power limit circuit(delete PU2,PU11,PD22
,PR22,PR24,PR142,PR143,PR149,PR153,PR159,PR213,PR214,PC26,PC27,PC28).
P.83 [OVP protection]change PR218 from 37k to 45.3k.
P.11 [PCH (PCI-E,SMBUS,CLK)]Del R1590/R1591/R1592/Q73/Q74
and rename SMB_DATA_SB/SMB_CLK_SB to SMB_DATA_R/SMB_CLK_R.
P.10 [PCH (HDA,JTAG,SAT)]Del R1552/R1554 and rename SPI_CLK_L/SPI_MOSI_L
to SPI0_CLK/SPI0_MOSI for redundant design.
P.10 [PCH (HDA,JTAG,SAT)]Add R5910 on SATA_LED# which is pull-high to +3VRUN
for Intel comment.
P.04 [ARD (CLK,MISC,JTAG)]NC R1451/R1452 and stuff R1450/R1453 refer to M930.
P.52 [PCIE (SD) 2/2]Change CN29 type for ME request.
P.58 [Touch Pad]Change SW2/SW3/SW6/SW7 type for ME request.

(2009/07/09)
A

P.24 [VGA (Strap) 2/6]Change memory aperture size description for SW request.
P.68 [AUDIO (Head Phone Jack)*]Change Pin7/Pin8 of U_CN4 to U_A_GND
for Layout request.
P.14 [PCH (PCI,USB,NVRAM)]Change USB_OC#5/USB_OC#4 to Pin7/Pin8 of RP18
for Layout request.
P.07 [ARD (GRAPHICS POWER)]Add a Open-Jump PJ43 between +1_5VRUN to VDDQ.
P.06 [ARD (POWER)]Del R856/R857 for MOR's request.

3

2

1

P.07 [ARD&CFD (GRAPHICS POWER)]Del R864/R866/R868/R869/R871
for MOR's request.
P.51 [PCIE (MS&iLINK) 1/2]Add damping resistors (R5911~R5919) on each MS signal.
P.52 [PCIE (SD) 2/2]Change C518/C522 to X5R type for MOR's request.
P.52 [PCIE (SD) 2/2]Add damping resistors (R5920~R5924) on each SD signal.
P.52 [PCIE (SD) 2/2]Change C767 to 10pF for MOR's request.
P.56 [Status LED & LID]Del LED7/LED8/LED10 for ME request.
P.38 [LVDS Connector]Add NC Cap. (C6306~C6313)
between each LVDS differential lane.
P.46 [LAN (88E8057) 1/2]Modify R94/R97/C997 description.
P.46 [LAN (88E8057) 1/2]Change all resistors and caps to 88E8059 setting.
P.84 [HOLE & AMI LABEL]Add H25/H26/H27/H28 for ME request.
P.35 [CRT]Change CN20 type for ME request.
P.70 [AUDIO (USB)*]Change U_CN2/U_CN3/U_CN6 type for ME request.
P.84 [HOLE & AMI LABEL]Del H11/H12/H13/H15/H16/H17/H18/H19/H20 for ME request.
P.44 [Express Card]Rename PCIE_EXPRESS_WAKE# to PCIE_WAKE# to del reserve design.
P.12 [PCH (DMI,FDI,GPIO)]Del R290 and PCIE_EXPRESS_WAKE# off-page
to del reserve design.
P.82 [Others power plane]Add 0.75V_RUN discharge circuit(add PR661 330ohm).
P.82 [Others power plane]Change PQ71 from 2N7002EPT to ME2N7002KW.
P.04 [ARD (CLK,MISC,JTAG)]Del the description of RST_GATE
and add a 1k ohm resister R5925 between +1_5VSUS and DDR3_DRAMRST#.
P.04 [ARD (CLK,MISC,JTAG)]Add R5926/R5927/U217
for Intel S3 Power Reduction issue.
P.04 [ARD (CLK,MISC,JTAG)]Del R928/R929 and related description
for Intel S3 Power Reduction issue.
P.53 [Camera Connector]Add R5928/R5929/C6314/C6315 For EMI verification.
P.37 [Inverter Connector]Add R5930 For EMI verification.
P.22 [Braidwood Connector]Del P.22 and change the page number from 23~87
to 22~86 for removing Braidwood function.
P.14 [PCH (PCI,USB,NVRAM)]Del all Braidwood-related off-page
for removing Braidwood function.
P.49 [eSATA Combo]Swap L62/L66/L67 for layout request.
P.62 [SWITCH (Botton & KB LED)*]Change the description "Instant On"
to "Web(Instant On) for SW request".
P.50 [PCIE (MS&iLINK) 1/2]Del R820/C868/R817/C865/R818/C864
for Ricoh's FAE suggest.
P.50 [PCIE (MS&iLINK) 1/2]Add description of C794/C771/C774/C992
for Ricoh's FAE suggest.
P.50 [PCIE (MS&iLINK) 1/2]Add description of C790/C769/C770/C772/C799
for Ricoh's FAE suggest.
P.50 [PCIE (MS&iLINK) 1/2]Add description of C716/C717
for Ricoh's FAE suggest.
P.38 [HDMI]Connect Q57 D/S to +5VRUN_L188/+5VRUN_F.
P.37 [LVDS Connector]Connect Q177 D/S to DCBATOUT_L/DCBATOUT.
P.39 [EC+KBC(NPCE783L)]Change net name "KB_PRESENCE#" to "INST_ON_SW#"
for SW request.
P.71 [DCIN&Charger]Delete NC PR12.
P.71 [DCIN&Charger]Change charge voltage form 12.48V to 12.465V for MOR request
(change PR25 form 200k_F to 210K_F, change PR27 from 100K_F to 100K_D).
P.73 [Identify IC]Change PC66 from 0.1u_16v_0402_Y5V to 0.1u_10v_0402_X5R.
P.73 [Identify IC]Change NC PC65 1u_10v_0603_X5R to NC PC65 1u_10v_0402_X5R.
P.78 [CPU Power_VHCORE]Change PC112 from 100U_25V_M_Φ6.3*7.7mm
to 68uF_25V_M_Φ6.3*5.8mm.

B

A

FOXCONN
Size
A3
Date:

4

C

(2009/07/10)

Title

5

D

3

2

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

History(3)
Document Number

Rev

M960&M970 H Model
Sheet

Thursday, December 24, 2009
1

SA
86

of

93

5

4

3

M960/M970 EVT

P.48
P.39
p.78
P.24

(2009/07/11)

D

P.36 [Inverter Connector]Reverse CN5.
P.62 [SWITCH (Botton & KB LED)*]Reverse P_CN3.
P.37 [LVDS Connector]Add description on the circuit
for inrush current issue of M870.
P.34 [CRT]Change F2 type for PUR request.
P.63 [AUDIO (CODEC)*]Change U_C459/U_C476/U_C787 type for PUR request.
P.07 [ARD (GRAPHICS POWER)]Add net name "+1_5VRUN_J".
P.14 [PCH (PCI,USB,NVRAM)]Del R344/R392 and the description about Boot-BIOS
for SW request.
P.52 [Camera Connector]Add net name DMIC_CLK_R/DMIC_DAT_R
and connect TP1160/TP1161 to the new net for TE request.
P.20 [DDRIII(SO-DIMM_0) 1/2]Reconnect SPR2/J2 to CN34 and CN35 for EMC request.
P.10 [PCH (HDA,JTAG,SAT)]Reverse CN26.
P.38 [HDMI]Change CN21 type for ME request.
P.60 [AUDIO Speaker Conn]Swap JSPK1 for ME request.

P.09
P.20
P.20
P.21
P.21
P.83
P.83

C

P.82
P.04
P.63
P.64
P.65
P.66
B

P.67
P.68
P.69
P.04
P.81

A

[SATA CD-ROM]NC CN37 for ME request.
[EC+KBC(NPCE783L)]Del R5858 for redundant design.
[CPU Power_VHCORE]change PC112 from NOCHICON to Panasonic.
[VGA (I/O) 3/6]Connect GPIO_3/GPIO_4 to SMB_THRM_DATA/SMB_THRM_CLK
for MOR's request.
[ARD (RESERVED)]Del RP83 and DQ_VREF off-page and add two test point
to CPU for Intel's comment.
[DDRIII(SO-DIMM_0) 1/2]Del C35/C45/R1283 and DQ_VREF0 off-page
for Intel's comment.
[DDRIII(SO-DIMM_0) 1/2]Connect VREF_DQ ato VREF_CA for Intel's comment.
[DDRIII(SO-DIMM_1) 2/2]Del C37/C44/R1284 and DQ_VREF1 off-page
for Intel's comment.
[DDRIII(SO-DIMM_1) 2/2]Connect VREF_DQ ato VREF_CA for Intel's comment.
[HOLE & AMI LABEL]Add H29/H30/PAD1/PAD2/PAD3 for EMC request.
[HOLE & AMI LABEL]Change H28/H25 type for ME request.

P.83
P.23
P.20
P.21

[PCIE (SD) 2/2]Change U22 to G553E1P11U to meet MOR's request for SD.
[Touch Pad]Reverse CN8 for ME request.
[SWITCH (Botton & KB LED)*]NC P_VR2 for EMC reserve.
[PCIE (MS) 1/2]Del all i-Link related description.
[Inverter Connector]Reverse CN5.
[HOLE & AMI LABEL]Change H2/H3/H4/H5/H6/H7/H10/H14 type for ME request.
[VGA (Memory BUS) 4/6]Change C6100 type for PUR request.
[DCIN&Charger]Delete EC3 and C907.
[CPU Power_VHCORE]Change PC566 from 0.1U_6.3V_K to 0.1U_16V_K
(HH PN:1C-2B20104-K300).
[OVP protection]Change PQ3 from IRLML5103TRPbF to SI2303BDS.
[ARD (CLK,MISC,JTAG)]Change U217 SUS_PWRGD to RUN_PWRGD.
[AUDIO (CODEC)*]Paste the schematic from P.48 of L model
for MOR's request and Layout concern.
[AUDIO (MUTE)*]Paste the schematic from P.49 of L model
for MOR's request and Layout concern.
[AUDIO (Power)*]Paste the schematic from P.50 of L model
for MOR's request and Layout concern.
[AUDIO (AUDIO & USB Conn)*]Paste the schematic from P.51 of L model
for MOR's request and Layout concern.
[AUDIO (Head Phone Jack)*]Paste the schematic from P.52 of L model
for MOR's request and Layout concern.
[AUDIO (Ext MIC Jack)*]Paste the schematic from P.53 of L model
for MOR's request and Layout concern.
[AUDIO (USB)*]Paste the schematic from P.54 of L model
for MOR's request and Layout concern.
[ARD (CLK,MISC,JTAG)]Change R5926/R5927 to 1.5K/750 ohm
for intel's comment.
[Others power plane]Change PR661 from 330ohm to 33ohm.

[HOLE & AMI LABEL]Change PAD1/PAD2/PAD3 for CIS request.
[VGA (Strap) 2/6]Modify description of VRAM.
[DDRIII(SO-DIMM_0) 1/2]Restore C35/C41 for MOR's request.
[DDRIII(SO-DIMM_1) 2/2]Restore C37/C44 for MOR's request.

P.78 [CPU Power_VHCORE]Change PR565 from 10k to 1.8k,
change PC566 from 0.1u to 0.022u.

(2009/07/21)

p.1~88 [Page Data]Update all page data.

(2009/07/24)

P.84 [Braidwood Connector]Add CN39 and its related schematic
for layout estimation.
P.14 [PCH (PCI,USB,NVRAM)]Add Braidwood related schematic
for layout estimation.

(2009/07/30)

P.84 [Braidwood Connector]Del CN39 and its related schematic
for layout estimation.
P.78 [CPU Power_VHCORE]Delete PJ42.
P.80 [VGA Power(ATI_VDD)]Delete PJ30, NC PR210, Change PR183 from 20K
to 15.4K, Change PR550 from 2.7k to 5.36k.

B

(2009/08/13)
P.39
P.13
P.60
P.66
P.67
P.68
P.69
P.66
P.61
P.14
P.27
P.04
P.38
P.78

[EC+KBC(NPCE783L)]Del R5852 for OVT_EC# double pull-high.
[PCH (LVDS,DDI)]Change R223 from 0.5% to 5% for RGB disable guide.
[AUDIO Speaker Conn]Change JSPK1 to 1N-0004003-M1T0 for ME request.
[AUDIO (AUDIO & USB Conn)*]Reverse U_CN1 for moving U_CN1
from TOP to BOT side.
[AUDIO (Head Phone Jack)*]Changen U_CN4 to 2N-000600N-FKG0.
[AUDIO (Ext MIC Jack)*]Change U_CN5 to 2N-000600C-FRG0.
[AUDIO (USB)*]Change U_USB_OC#1/2/3 to U_USB_OC#0/2.
[AUDIO (AUDIO & USB Conn)*]NC U_USB_OC#3 and Change U_USB_OC#1/2
to U_USB_OC#0/2.
[AUDIO/USB DB Conn.]NC U_USB_OC#3 and Change U_USB_OC#1/2 to U_USB_OC#0/2.
[PCH (PCI,USB,NVRAM)]Del off-page USB_OC#1/3.
[VGA (Power) 6/6]Change Q77 to 17-2N7002W-0000 for PUR request.
[ARD (CLK,MISC,JTAG)]Change Q72 to 17-2N7002W-0000 for PUR request.
[HDMI]Change Q13 to 17-2N7002W-0000 for PUR request.
[CPU Power_VHCORE]Delete NC_PC260, NC_PC261.

FOXCONN
Title

Size
A3
Date:
4

C

M960/M970 DVT

[HDMI]Swap RP55/RP57/RP59/RP61 for Layout request.
[eSATA Combo]Swap L62/L66/L67 for Layout request.
[LVDS Connector]Swap Pin1 CN13 to Pin3 CN13 for cable design.
[HOLE & AMI LABEL]Change H4/H5/H7 footprint for ME request.
[DCIN&Charger]NC PR76 and PR77.
[CPU Power_VHCORE]Change PR555 and PR569 from 2.7K to 2.21K.
[CPU Power_VHCORE]NC PC260 ,NC PC261.
[EC+KBC(NPCE783L)]Pull-high INST_ON_SW# to +ECVCC for SW request.
[DDR3 Power(+1_5V/+0_75V)]Add PQ59(2N7002EPT)/PR600(100K)/PC570(1U_10V_K),
then NC PQ59/PR600/PC570.

5

D

(2009/07/17)

(2009/07/14)
P.38
P.49
P.37
P.83
P.71
P.78
P.78
P.39
P.76

1

(2009/07/16)

(2009/07/13)
P.51
P.57
P.62
P.50
P.36
P.83
P.25
P.71
P.79

2

(2009/07/15)

3

2

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

History(4)
Document Number

Rev

M960&M970 H Model
Sheet

Thursday, December 24, 2009
1

SA
87

of

93

A

5

4

3

M960/M970 DVT

D

P.46
P.51
P.25
P.27
P.24
P.31
P.55
P.71
P.76
P.82
C

P.81
P.83

[CRT]Change F2 to 0.35A.
[HOLE & AMI LABEL]Add H31 and change H1/H27/PAD1/PAD2/PAD3 for ME request.
[eSATA Combo]Swap CN27B.
[Express Card]Change R5457 to 470K and add NC R686 for MOR request.
[PCH (GPIO,VSS_NCTF,RSVD)]Change RST_GATE from GPIO27 to GPIO46
, Stuff R982,NC R977.
[LAN (Transformer) 2/2]Change L70 for cost down.
[AUDIO (CODEC)*]Change U_U215.
[VGA (Memory BUS) 4/6]Change R5795,R5809,R5796,R5810 from 1R-000402X-F200
to 1R-0000101-F200 for vendor request.
[VGA (Power) 6/6]Stuff R5816 for vendor request.
[VGA (I/O) 3/6]Change R5793 from 1R-0000000-J200 to 1R-0000101-F200 and
change R5794 from 1R-0000000-J200 to 1R-0000121-F200 for vendor request.
[VRAM(DDR3)# 4/4]NC R5727 for vendor request.
[Status LED & LID]Change U21 to 15-EC2648B-0000 for cost down.
[DCIN&Charger] Change PQ5,PQ16,PQ34 to 17-2N7002W-0000
for materials shortage.
[DDR3 Power(+1_5V/+0_75V)] Change PQ59 to 17-2N7002W-0000
for materials shortage.
[OVP protection] Change PQ9,PQ17 to 17-2N7002W-0000
for materials shortage.
[Others power plane] Change PQ29,PQ45,PQ48 to 17-2N7002D-W001
for materials shortage.
[HOLE & AMI LABEL]Change H29/H30 for ME request.

(2009/08/24)
P.69
P.60
P.34
P.15

[AUDIO (USB)*]Change U_CN2/U_CN3/U_CN6 for ME request.
[AUDIO Speaker Conn]Change JSPK1 for ME request.
[CRT]Change CN20 for ME request.
[PCH (GPIO,VSS_NCTF,RSVD)]Change R977 from NC to Stuff and change R982
from Stuff to NC.

(2009/08/25)

P.83 [HOLE & AMI LABEL]Change H26 for ME request.

(2009/08/27)

P.83 [HOLE & AMI LABEL]Change H30 for ME request.

(2009/08/31)
B

1

P.25 [VGA (Memory BUS) 4/6]Stuff R5798, R5800, R5799, R5802, R5803, R5804
for Madison/Park only.
P.25 [VGA (Memory BUS) 4/6]Change R5806, R5807 to 0 ohm for Madison/Park only.
P.27 [VGA (Power) 6/6]Stuff L89,C6187,C6186,C6185 for Madison/Park only.
P.27 [VGA (Power) 6/6]Stuff R5811 for Madison/Park only.
P.22 [VGA (PCI-E) 1/6]Stuff R5831 for Madison/Park only.
P.27 [VGA (Power) 6/6]NC L76,L77,C6155,C6158 for Madison/Park only.
P.27 [VGA (Power) 6/6]Stuff L92, C6233, C6234, C6236, R5812
for Madison/Park only.
P.27 [VGA (Power) 6/6]Stuff L26, NC L30 for Madison/Park only.
P.27 [VGA (Power) 6/6]Stuff L90, C6192, C6193, C6194, C6195, C6196
for Madison/Park only.
P.27 [VGA (Power) 6/6]Stuff L91, C6197, C6199, C6200 for Madison/Park only.
P.27 [VGA (Power) 6/6]NC R5815 for Madison/Park only.
P.55 [Status LED & LID]Move R390/R384 to Drain side of Q51/Q48 for MOR comment.
P.37 [LVDS Connector]Change CN13 to M870 type (1N-0040000-FWG0).
P.59 [SWITCH DB Conn.]Change CN2 to 12pin type (1N-0012002-F0T0).
P.62 [SWITCH (Botton & KB LED)*]Change P_CN3 to 12pin type (1N-0012002-F0T0).
P.62 [SWITCH (Botton & KB LED)*]Move NUM LOCK LED/CAP LED/SCROLL LOCK LED
driving circuit to MB for MOR comment.
P.55 [Status LED & LID]Add NUM LOCK LED/CAP LED/SCROLL LOCK LED
driving circuit for MOR comment.
P.09 [ARD (RESERVED)]Del test points for MOR comment.
P.11 [PCH (PCI-E,SMBUS,CLK)]Del test points for MOR comment.
P.15 [PCH (GPIO,VSS_NCTF,RSVD)]Del test points for MOR comment.
Test Points[TP109/TP193/TP181/TP208/TP209/TP211/TP210/TP212/T213/TP214/
TP235/TP236/TP265/TP266/TP237/TP239/TP327/TP328/TP329/TP256/TP257/TP259/
TP260/TP262/TP263/TP264/TP284/TP287/TP288/TP289/TP290/TP291/TP292/TP293/
TP294/TP295/TP296/TP297/TP298/TP425/TP1116/TP1117/TP1118/TP1119/TP140/
TP147/TP148/TP149/TP148/TP145/TP144/TP134TP1120/TP1121/TP1122/TP1123/
TP1124/TP188/TP183/TP88/TP91/TP93/TP101/TP412/TP416/TP415/TP417/TP414/
TP421/TP422/TP423/TP424]
P.09 [ARD (RESERVED)]Del RP87 for MOR and Intel comment.
P.43 [Status LED & LID]Add LED test points TP1223/TP1224/TP1225/TP1226/TP1227/
TP1228/TP1229/TP1230.
P.10 [PCH (HDA,JTAG,SAT)]Change U98 to W25Q32BVSSIG.
P.63 [AUDIO (CODEC)*]Del U_U7 and U_C155 for Realtek suggestion.
P.16 [PCH (POWER) 1/2]Del R897, R989 for MOR comment.
P.17 [PCH (POWER) 2/2]Del R428, R958 for MOR comment.
P.04 [ARD (CLK,MISC,JTAG)]Add R5950, C6316, R5951, R5949, R5948, C6317
for Intel S3 issue.

(2009/08/18)
P.34
P.83
P.49
P.43
P.15

2

(2009/09/03)

P.71 [DCIN&Charger]Change PCN1 to BP92071-B81E2-7H for ME request.
P.48 [SATA HDD]Change CN33 to LN21131-D40L-9H for ME request.
P.15 [PCH (GPIO,VSS_NCTF,RSVD)]Add R5931/R5932/R5933/R5934 and change R5866
to 100K to pull-high LCDID for PE request.
P.35 [LVDS]Add R5935/R5936/R5937/R5938/R5939/R5940 to pull-low LCDID
for PE request.

D

C

B

(2009/09/01)

A

P.56 [FAN]Del TP1163.
P.63 [AUDIO (CODEC)*]Add ALC269 co-lay schematic and del U_TP229, U_TP231,
U_TP228.
P.14 [PCH (PCI,USB,NVRAM)]Del R1575 for redundant design (double pull-low).
P.64 [AUDIO (MUTE)*]Add ALC265 co-lay schematic.
P.10 [PCH (HDA,JTAG,SAT)]NC R5910 for redundant design (double pull-high).
P.74 [SYS Power (+3_3V/+5V)]Move TP215 from +5VALW_PWM to +5VALW for power test.
P.74 [SYS Power (+3_3V/+5V)]Move TP219 from +3VALW_PWM to +3VALW for power test.
P.75 [SYS Power(+1_05V_VTT)]Add TP504 for +1.05V_VTT power test.
P.78 [CPU Power_VHCORE]Add TP507,TP223,TP224 for VHCORE power test.
P.79 [CPU Power_VID]Add TP225~ TP233 for power test.
P.80 [VGA Power (ATI_VDD)]Change PR184 rome 1K to 100ohm, NC PC160
for vendor suggest.
P.80 [VGA Power (ATI_VDD)]Add TP221,TP222 for power test.
P.80 [VGA Power (ATI_VDD)]Add PR662 and PC571 for vendor suggest.
P.80 [VGA Power (ATI_VDD)]Add PC572(NC) for vendor suggest.

A

FOXCONN
Title

Size
A3
Date:
5

4

3

2

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

History(5)
Document Number

Rev

M960&M970 H Model
Sheet

Thursday, December 24, 2009
1

SA
88

of

93

5

4

3

(2009/09/08)

D

P.82
P.62
P.39
P.10
P.50
P.49
P.10
P.42
P.54

C

P.14
P.41
P.63
P.61
P.66
P.61
P.66
P.45
P.61
P.66
P.55
P.44
P.56
P.71
P.71
P.71
P.73

B

P.81

[AUDIO (CODEC)*]Change U_R327 to 1K.
[DCIN&Charger]NC PR33 for costdown.
[VGA Power (ATI_VDD)]Add PR663(NC) and PC573(NC) for vendor suggest.
[OVP protection]PR167 change to 26.1K, PR169 change to 80.6K ,
PR171 change to 18.2K for OVP Adjust
[OVP protection]Use SW PWRLIMIT function replaced HW PWRLIMIT circuit
for costdown.(NC PU31,PC567,PR223,PR629,PR219,PR218,PR78,PC46.)
[SWITCH (Botton & KB LED)*]Change P_VR1/P_VR2/P_VR3/P_VR4
to 19-MLVS060-5000.
[EC+KBC(NPCE783L)]Change C27/C26 to 15p for Crystal vendor comment.
[PCH (HDA,JTAG,SAT)]Change C727/C702 to 15p for Crystal vendor comment.
[PCIE (MS) 1/2]Change C785/C786 to 22p for Crystal vendor comment.
[eSATA Combo Conn.]Add eSATA reperater schematic and NC it.
[PCH (HDA,JTAG,SAT)]Change CN18 to GB5RF120-1203-7F for Halgen Free.
[Debug Port]Change CN30 to GB5RF120-1203-7F for Halgen Free.
[Felica Connector]Add Felica power supply schematic as Pokerman type
for MOR request.
[PCH (PCI,USB,NVRAM)]Change USB_OC# signal to EVT type for MOR request.
[SPI Flash ROM]Change U23 to W25X10BVSNIG for SW comment.
[AUDIO (CODEC)*]Move U_R5774 to P.60 and rename to R5968.
[AUDIO/USB DB Conn.]NC +12V and add a +5VALW pin for USB VEVS test.
[AUDIO (AUDIO & USB Conn)*]NC U_+12V to a U_+5VALW pin for USB VEVS test.
[AUDIO/USB DB Conn.]Change CN31 to 1N-0050004-F0T0 for ME request.
[AUDIO (AUDIO & USB Conn)*]Change U_CN1 to 1N-0050004-F0T0 for ME request.
[LAN (88E8057) 1/2]Add R5965/R5966/R5967 for 88E8057/88E8059 co-lay.
[AUDIO/USB DB Conn.]Change CN31 Pin 43 to GND.
[AUDIO (AUDIO & USB Conn)*]Change U_CN1 Pin 43 to GND.
[Status LED & LID]Change Q49/Q179/Q180/Q181 to 17-DTA114Y-UB00
for PUR suggest.
[Mini-PCIE Card (WLAN)]Change Q5 to 17-DTC144E-UB00 for PUR suggest.
[FAN]Change Q80 to 17-DTC144E-UB00 for PUR suggest.
[DCIN&Charger]Change TP1148,TP1149,TP1150,TP1151 from DC_IN_1 to
P+ for power test.
[DCIN&Charger]Change PQ16,PR76,PR77 from NC to mount
for EC PWRLIMIT function.
[DCIN&Charger]Change PR79 from 0 to 3.48K, change PR11 from 20K to 12K
for EC PWRLIMIT function.
[Identify IC]Add PD31 and change PR68 from 10K to 4.7K
for MOR side request.
[Others power plan]Delete TP189,TP203 for power test.

(2009/09/10)
P.37
P.44
P.16
P.62
P.81
P.81
P.45
P.45
P.45
P.43
P.48
P.61
P.66
P.69
P.83
P.63
P.64
P.68
P.68
P.68
P.63
P.67
P.37

P.75
P.76
P.80
P.52
A

P.52
P.60
P.37

[LVDS Connector]Add CN13 Pin40 for EDID function.
[Mini-PCIE Card (WLAN)]Add C6329/C6330 for EMI request.
[PCH (POWER) 1/2]Add C6326/C6327/C6328 for EMI request.
[SWITCH (Botton & KB LED)*]Change P_LED1/P_LED2/P_LED3 to HT-170UYG.
[Others power plane]Add C6332/C6333 on +3VSUS for EMI request.
[Others power plane]Add C6334/C6335/C6336 on +3VRUN for EMI request.
[LAN (88E8059) 1/2]Del R97 and add C6341 for Marvell FAE request.
[LAN (88E8059) 1/2]Del R5966, R5967 for Marvell FAE request.
[LAN (88E8059) 1/2]Change C993 to 10u for Marvell FAE request.
[Express Card]Correct Express Card SPEC.
[SATA CD-ROM]Del CN37 for MOR request.
[AUDIO/USB DB Conn.]Add F1 for MOR comment.
[AUDIO (AUDIO & USB Conn)*]rename U_+5VALW to U_+5VALW_IN for MOR comment.
[AUDIO (USB)*]Del U_F1 and rename U_+5VALW to U_+5VALW_IN for MOR comment.
[HOLE & AMI LABEL]Del BOSS2 for MOR request.
[AUDIO (CODEC)*]Change U_R321 to 100K for MOR request.
[AUDIO (MUTE)*]NC U_C472 for MOR comment.
[AUDIO (Ext MIC Jack)*]NC U_R42, U_R46 for MOR comment.
[AUDIO (Ext MIC Jack)*]Del U_C26, U_C31 and add U_R5791, U_R5792
for MOR comment.
[AUDIO (Ext MIC Jack)*]NC U_R42, U_R46 for MOR comment.
[AUDIO (CODEC)*]NC U_C923.
[AUDIO (Head Phone Jack)*]Change U_GND to U_A_GND for Realtek FAE suggest.
[LVDS Connector]NC CN13 Pin7.

P.71
P.71
P.37
P.60
P.44
P.55
P.67
P.63
P.10
P.42
P.62
P.59
P.56
P.60
P.83
P.39
P.15

[Debug Port]Del TP1186~TP1193.
[VGA (I/O) 3/6]Add ATI_LVDS_SCL/ATI_LVDS_SDA for EDID function.
[LVDS Connector]Add ATI_LVDS_SCL/ATI_LVDS_SDA for EDID function.
[SYS Power (+3_3V/+5V)]Change PR652,PR245 from NC to mount 4.7ohm.
Change PC568,PC272 from NC to mount 680pF for EMI suggest.
[SYS Power(+1_05V_VTT)]Change PR188 from NC to mount 4.7ohm,
Change PC170 from NC to 680pF for EMI suggest.
[DDR3 Power(+1_5V/+0_75V)]Change PR41 from NC to mount 4.7ohm,
Change PC42 from NC to mount 680pF for EMI suggest.
[VGA Power (ATI_VDD)]Change PR163 from NC to mount 4.7ohm,
Change PC133 from NC to mount 680pF for EMI suggest.
[Camera Connector]Del R5928/R5929 and add L93/L94 for EMC request
for DMIC noise.
[Camera Connector]Mount C6314/C6315 for EMC request for DMIC noise.
[AUDIO Speaker Conn]Del R5870, R5871, R5872, R5873
and Add L95, L96, L97, L98 for EMC request to filtrate SPK noise.
[LVDS Connector]Add C6324/C6325 for EMC request for 150MHz powerbase issue.

P.39
P.15
P.39
P.15
P.39
P.15
P.39
P.39
P.39

[DCIN&Charger]Change PR15 to RLM12FTSR020 for PUR request.
[DCIN&Charger]Change PF1 to 0437007.WR for PUR request.
[LVDS Connector]Change CN13 for Halgen-free.
[AUDIO Speaker Conn]Swap JSPK1 for layout concern.
[Mini-PCIE Card (WLAN)]Change SW4 to 1BS007-12110-002-7H for ME request.
[Status LED & LID]Change LED3/LED4 vendor to Everlight.
[AUDIO (Head Phone Jack)*]Change U_A_GND to U_GND for Realtek FAE suggest.
[PCIE (SD) 2/2]Change CN29 to WK21923-S6P3-4H for ME request.
[PCH (HDA,JTAG,SAT)]Change CN18 to No Halgen-free.
[Debug Port]Change CN30 No Halgen-free.
[SWITCH (Botton & KB LED)*]Change P_CN3 to No Halgen-free.
[SWITCH DB Conn.]Change CN2 to No Halgen-free.
[FAN]Change CN14 to No Halgen-free.
[AUDIO Speaker Conn]Change JSPK1 to No Halgen-free.
[HOLE & AMI LABEL]Change H2/H4/H5 for ME request.
[EC+KBC(NPCE783L)]NC U216 Pin8 and del R575.
[PCH (GPIO,VSS_NCTF,RSVD)]Connect DIS_FAN_MON# to U69F GPIO57
and pull-high to +3VRUN.
[EC+KBC(NPCE783L)]NC U4A Pin20 and add SYSTEM_ID1 off-page.
[PCH (GPIO,VSS_NCTF,RSVD)]Connect SYSTEM_ID1 to U69F GPIO17 and del R965.
[EC+KBC(NPCE783L)]NC U4A Pin27 and add SYSTEM_ID0 off-page.
[PCH (GPIO,VSS_NCTF,RSVD)]Connect SYSTEM_ID0 to U69F GPIO16
and NC RP19 Pin7.
[EC+KBC(NPCE783L)]NC U216 Pin9.
[PCH (GPIO,VSS_NCTF,RSVD)]Connect PM_SLP_ME# to U4B GPIO26.
[EC+KBC(NPCE783L)]Del R5853 and connect INST_ON_SW# to GPIO12.
[EC+KBC(NPCE783L)]NC U216 Pin3 and connect WLAN_EN to U4A Pin20.
[EC+KBC(NPCE783L)]NC U216 Pin4 and connect BT_ON to U4A Pin27.

FOXCONN
Title

Size
A3
Date:
5

4

D

C

(2009/09/11)

(2009/09/09)
P.42
P.24
P.37
P.74

1

P.42 [Felica Connector]Change Felica power supply from +5VSUS to +3VSUS.
P.51 [PCIE (SD) 2/2]Change R391 to 100K for MOR request.
P.43 [Express Card]NC Q38, R5457 and mount R686 for MOR comment.

M960/M970 DVT
P.63
P.71
P.80
P.82

2

3

2

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

History(6)
Document Number

Rev

M960&M970 H Model
Sheet

Thursday, December 24, 2009
1

SA
89

of

93

B

A

5

4

3

(2009/09/11)

P.39 [EC+KBC(NPCE783L)]NC U216 Pin5/Pin6 and connect AC_OFF/EC_PWRLIMIT_CTRL
to U4A Pin119/Pin120.
P.39 [EC+KBC(NPCE783L)]Del R5855/R5856/C6201/C6202.
P.39 [EC+KBC(NPCE783L)]Connect AC_Present to U4A Pin124.
P.39 [EC+KBC(NPCE783L)]Del U216/R5857/C6203.
P.25 [VGA (Memory BUS) 4/6]Change C6100 to UMK105CH680KW-F for PUR request.
P.34 [CRT]Del F2 for MOR comment.
P.63 [AUDIO (CODEC)*]Del U_R5773/U_Q64/U_R5771/U_R5783/U_U215/U_R5784
for MOR comment.
P.63 [AUDIO (CODEC)*]Move U_AMP_PD# to U_U18 Pin4.
P.64 [AUDIO (MUTE)*]Mount U_R352/U_R351/U_Q17/U_R349/U_Q15/U_R341
for MOR comment.
P.25 [VGA (Memory BUS) 4/6]Change R5795/R5796/R5809/R5810 to 40.2 ohm
for AMD comment.
P.34 [CRT]NC R5752 for no need of semi-PNP function.

(2009/09/13)

P.34 [CRT]Change CN20 to DZ11A91-SB281-4H for different package.
P.68 [AUDIO (Ext MIC Jack)*]Change U_CN5 to JA63331-R1T0-7H for ME request.

B

P.45 [LAN (88E8059) 1/2]Change C995 to 10uF for Marvell comment.
P.74 [SYS Power (+3_3V/+5V)] Change PR122/PR201 to 2.2 ohm for RF noise.
P.78 [CPU Power_VHCORE] Change PR563 to NC, change PU28 pin25 connect
to PROCHOT# for design change.
P.04 [ARD (CLK,MISC,JTAG)]Add off-page PROCHOT#.
P.54 [Felica Connector]NC R5963/F14, stuff C869/U48/R630/C845/R5964
for Felica fuse solution fail.
P.49 [eSATA Combo Conn.]Add R5974/R5975/R5976/R5977 to reduce the trace length
on U214 for vendor request.

P.80 [VGA Power (ATI_VDD)] Change PC159/PC160 to 1C-2B20105-K100(NC)
for more stability.
P.01 [Index page]Update information.
P.02 [BLOCK DIAGRAM]Update information.
P.10 [PCH (HDA,JTAG,SAT)]Update SPI ROM information.
P.49 [eSATA Combo Conn.]Del F10 for no need.
P.49 [LVDS Connector]Add F15/L99 to follow M870.
P.10 [PCH (HDA,JTAG,SAT)]Add 100K pull-low resistors R5969/R5970/R5971
on SPI0_MOSI/SPI0_CLK/SPI0_CS# for Intel EDS request.
P.15 [PCH (GPIO,VSS_NCTF,RSVD)]Change R943/R974/R982/R1626 to 1R-0000103-J200.
P.63 [AUDIO (MUTE)*]Change U_R340/U_R350/U_R663 to 1R-0000103-J200.
P.62 [AUDIO (CODEC)*]Change U_R652/U_R662 to 1R-0000103-J200.
P.52 [Camera Connector]Add R5972/F16 for adding fuse solution.
P.25 [LVDS Connector]NC CN13 Pin1/Pin5/Pin6 for del EDID function.
P.24 [VGA (I/O) 3/6]NC U204B ATI_LVDS_SCL/ATI_LVDS_SDA for del EDID function.
P.20 [DDRIII(SO-DIMM_0) 1/2]NC CAP13 for no need.
P.21 [DDRIII(SO-DIMM_1) 2/2]NC CAP22 for no need.
P.25 [VGA (Memory BUS) 4/6]Change Madison/Park description.
P.25 [VGA (Memory BUS) 4/6]NC R5806/R5807/R5808 for AMD comment.
P.63 [AUDIO (CODEC)*]Change the setting to ALC269
(NC: U_C441/R5943/U_R5789, Stuff U_C930/R5944/U_R5790).
P.71 [DCIN&Charger]Change PL3 to NC for costdown.
P.75 [VTT&PCH Power(+1_05V)]Change PR44 from 0ohm to 2.2ohm for vendor suggest.
P.76 [DDR3 Power (+1_5V/+0_75V)]Change PR39 from 0ohm to 2.2ohm
for vendor suggest.
P.80 [VGA Power (ATI_VDD)]Change PR549 from 0ohm to 2.2ohm for vendor suggest.
P.57
P.35
P.51
P.28
P.29
P.30
P.31

A

P.28
P.80
P.77

(2009/09/15)

P.11 [PCH (PCI-E,SMBUS,CLK)]Make R902/R903 from +3VRUN pull-high
to +3VALW pull-high for Intel recommendation.
P.38 [HDMI]Change CN21 to DF03-577-1931.
C

(2009/09/16)

P.14 [PCH (PCI,USB,NVRAM)]NC R1466 for Intel Braidwood disable guideline.

B

[Touch Pad]Del F12 for no need.
[LVDS]Update Panel ID information.
[AUDIO (CODEC)*]Change U_C787/U_C476/U_C459 to 1C-2B20103-K200.
[VRAM(DDR3)# 1/4]Change C6303 to 1C-2B20103-K200 for MOR comment
to use the same kind of Capacitor.
[VRAM(DDR3)# 2/4]Change C6304 to 1C-2B20103-K200 for MOR comment
to use the same kind of Capacitor.
[VRAM(DDR3)# 3/4]Change C6257 to 1C-2B20103-K200 for MOR comment
to use the same kind of Capacitor.
[VRAM(DDR3)# 4/4]Change C6258 to 1C-2B20103-K200 for MOR comment
to use the same kind of Capacitor.
[VRAM(DDR3)# 1/4]Change C4028/C4036 to 1C-2B20103-K200
for MOR comment to use the same kind of Capacitor.
[VGA Power(ATI_VDD)]Change PC172 to 1C-2B20103-K200
for MOR comment to use the same kind of Capacitor.
[SYS Power(+1_8V)]Change PC247 to 1C-2B20103-K200
for MOR comment to use the same kind of Capacitor.

A

FOXCONN
Title

Size
A3
Date:

5

4

D

(2009/09/14)

(2009/09/12)

C

1

P.65 [AUDIO (Power)*]Change U_C467 to 1C-2B20103-K200
for MOR comment to use the same kind of Capacitor.
P.50 [PCIE (MS) 1/2]Change R5912/R5913/R5914/R5911/R5915/R5916/R5917/R5918
/R5919 to 33ohm for correcting SI test fail.
P.51 [PCIE (SD) 2/2]Change R5920/R5921/R5922/R5923/R5924 to 33ohm
for correcting SI test fail.

M960/M970 DVT

D

2

3

2

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

History(7)
Document Number

Rev

M960&M970 H Model
Sheet

Thursday, December 24, 2009
1

SA
90

of

93

5

4

3

2

1

M960/M970 PVT
(2009/09/19)

D

P.63 [AUDIO (CODEC)*] U_C440 change to SMD,MLCC,X7R,1000pF,50V,10%,0402
by MOR request
P.46 [LAN (Transformer) 2/2] C568 change to SMD,MLCC,X7R,1000pF,50V,10%,0402
by MOR request
P.57 [Touch Pad] C130,C133 change to SMD,MLCC,NPO,47pF,50V,5%,0402
by MOR request
P.39 [EC+KBC(NPCE783L)] C22 change to SMD,MLCC,NPO,22pF,50V,5%,0402
by MOR request
P.50 [PCIE (MS) 1/2] C544,C785,C786 change to SMD,MLCC,NPO,22pF,50V,5%,0402
by MOR request
P.63 [AUDIO (CODEC)*] U_C439 change to SMD,MLCC,NPO,22pF,50V,5%,0402
by MOR request
P.64 [AUDIO (MUTE)*] U_R351 change to SMD,RES,200K,1/16W,5%,0402
by MOR request
P.64 [AUDIO (MUTE)*] U_R352 change to SMD,RES,33K,1/16W,5%,0402
by MOR request
P.64 [AUDIO (MUTE)*] U_R341,U_R349, change to SMD,RES,10K,1/16W,5%,0402
by MOR request
P.10 [PCH (HDA,JTAG,SAT)] R5905, change to SMD,RES,51ohm,1/16W,5%,0402
by MOR request
P.39 [EC+KBC(NPCE783L)] RP1,RP20,RP90 change to SMD,RES,10K,1/16W,5%,0402
and locations are R5991~R5996 by MOR request
P.39 [EC+KBC(NPCE783L)] RP21, change to SMD,RES,2.2K,1/16W,5%,0402
and locations are R5987,R5988 by MOR request
P.39 [EC+KBC(NPCE783L)] RP22, change to SMD,RES,4.7K,1/16W,5%,0402
and locations are R5989,R5990 by MOR request
P.43 [Express Card] Update U42 Schematic symbol
P.55 [Status LED & LID] Change TP1224~TP1230 to top for BFT test

P.25 [VGA (Memory BUS) 4/6]Change R5805 to 10k
for AMD comment.
P.25 [VGA (Memory BUS) 4/6]Add R5981 pull-high to +3VRUN on TESTEN
for AMD hang-up workaround.
P.24 [VGA (I/O) 3/6]Add R5978 pull-low to GND on ATI_JTAG_RST
for AMD hang-up workaround.
P.24 [VGA (I/O) 3/6]Add R5979 pull-high to +3VRUN on ATI_JTAG_TMS
for AMD hang-up workaround.
P.24 [VGA (I/O) 3/6]Add R5980 between R_XTALSSIN and ATI_JTAG_TCLK
for AMD hang-up workaround.

(2009/11/04)

C

P.07 [ARD (GRAPHICS POWER)] Delete PJ43 for redundant design of
EVT & DVT
P.34 [CRT] Add F17 for current limit by MOR comment
P.74 [SYS Power (+3_3V/+5V)] Delete PJ11 and PJ12 for redundant
design of EVT & DVT
P.75 [VTT&PCH Power(+1_05V)] Delete PJ22 and PJ23 for redundant
design of EVT & DVT
P.76 [DDR3 Power(+1_5V/+0_75V)] Delete PJ26 and PJ27 for redundant
design of EVT & DVT
P.77 [SYS Power(+1_8V)] Delete PJ36 for redundant design of EVT & DVT
P.78 [CPU Power_VHCORE] Change PC112 from 68u_25V to
OS_Con cap 47u_25V by MOR request
P.80 [VGA Power(ATI_VDD)] Delete PJ31 and PJ37 for redundant
design of EVT & DVT

(2009/11/12)

B

P.25 [VGA (Memory BUS)] Change R5805 to NC & Mount R5981 for AMD suggestion
P.39 [EC+KBC(NPCE783L)] Add R5982 on OVT_EC# for GPIO70 need pull high
P.62 [SWITCH (Botton & KB LED)*] Exchange function name for Assist &
Web button
P.35 [LVDS] No mount R5940 to cancell Instant_On function by MOR request
P.39 [EC+KBC(NPCE783L)] No mount R5851 to cancell Instant_On function
by MOR request
P.55 [Status LED & LID] R689 change resistor value to 300 Ohm, R692 change
resistor value to 909 Ohm, R693 change value to 300 Ohm, R5945~R5947
change resistor value to 392 Ohm for LED brightness by MOR request
P.37 [LVDS Connector] Change CN13 to 1N-004000E-FKG0 for better L6 process
P.40 [KB Connector] Add TP1233,TP1234 for BFT test
P.35 [LVDS] Add TP1231,TP1232 for BFT test
P.51 [PCIE(SD) 2/2] Add TP1239,TP1240 for BFT test
P.57 [Touch Pad] Add TP1245~TP1250 for BFT test
P.54 [Felica Connector] Add TP1241~TP1244 for BFT test

(2009/11/16)

A

P.71 [DCIN&Charger] Change pc126 from 1000P_50V_0603_X7R to 1000pF_50V_0402_X7R
for MOR request
P.78 [CPU Power_VHCORE] Change pc253 from 1000P_16V_0402_X7R to
1000pF_50V_0402_X7R for MOR request
P.82 [OVP protection] Change pc41 from 1000P_16V_0402_X7R to 1000pF_50V_0402_X7R
for MOR request
P.10 [PCH (HDA,JTAG,SAT)] Update U43 schematic symbol
P.73 [Identify IC] Update PU5 schematic symbol
P.52 [Camera Connector] L93,L94 change to Bead,MAX ECHO,EBMS100505A121 0.5A,
120ohm/100MHz,25%,0402(1005mm) by MOR request
P.67 [Audio] U_L4,U_L5 change to Bead,MAX ECHO,EBMS100505A121 0.5A,
120ohm/100MHz,25%,0402(1005mm) by MOR request
P.45 [LAN (88E8059) 1/2] C6077 change to SMD,MLCC,X7R,1000pF,50V,10%,0402
by MOR request

P.83 [HOLE & AMI LABEL] Add BOSS2 for M960 wireless card use only
P.44 [Mini-PCIE Card (WLAN)] Add TP1235~TP1238 on BT_WLAN_SW# &
GND for BFT test
P.45 [LAN (88E8059) 1/2] LAN chip 88E8059 change packing method to
tapping for better L6 process
P.24 [VGA (I/O) 3/6]Connect a stable clock source (from clock gen SS 27MHz) to
GPIO26_TCK.
Add 5991 pull-down with 10K ohm to ground for the Park/Madison JTAG test
block intermittently fails to initialize correctly. Incorrect
initialization may result in a failure to boot.
P.35 [LVDS] SW1 change from 12-pin to 8-pin panel ID SW
P.15 [PCH (GPIO,VSS_NCTF,RSVD)] NC_R5931 & move R5939 from P.35
to P.15
P.39 [EC+KBC(NPCE783L)] Move R5940 from P.35 to P.39

B

(2009/11/18)

P.57 [Touch Pad] Add F12 for cable short test fail
P.35 [LVDS] Add test point from TP1251~TP1260 for panel ID switch BFT test
P.58 [Thermal Sensor] Delete VGA thermal sensor function, NC_U26,
NC_R946, NC_C534, NC_C547 because GPU support DTS function
P.25 [VGA (Memory Bus) 4/6] Change R5878 resistor value from
680 Ohm to 51 Ohm for memory reset circuit update from AMD
P.55 [Status LED & LID)] Change U21 to E-CMOS EC2618NLB1GR
for distance can't meet MOR spec

FOXCONN
Title

Date:
4

C

(2009/11/17)

Size
A3
5

D

3

2

A

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

History(8)
Document Number

Rev

M960&M970 H Model
Sheet

Thursday, December 24, 2009
1

SA
91

of

93

5

4

3

P.57 [TouchPad]Change CN8 from FOX_GB5RF060-1203-7H to FOX_GB5RF060-1203-8F
as ME's request.
P.10 [PCH]Change C6352 from 0.1uF to 33pF(mount) and R618 from 33ohm
to 47ohm as EMC request.
P.81 [Other power plan]Change PC188 from 10uF to 1uF(mount) for improve
power signal.
P.63 [Audio]Change U_R661,U_R671,U_R676,U_673,U_R321 from 0402 to 0201 for
layout space concern.

(2009/11/19)

P.24 [VGA (I/O) 3/6] Add TP1261,TP1262 on GPIO8 & GPIO 22 for reserve
AMD errata solution
P.11 [PCH (PCI-E,SMBUS,CLK)] Reserve R5992~R6000 for Intel FCIM function
P.78 [CPU Power_VHCORE] Change PR554 and PR558 from 0ohm to 2.20hm for EMI
request
P.80 [VGA Power(ATI_VDD)] Change PR183 from 15.4k to 15k for VGA Park high
level request
change PR210 from NC_7.15K to 68k for VGA Madison high level request

P.25 [VGA]Change R5805 from 10k to 5.1k as AMD's suggestion
P.35 [LVDS]Change SW1 from DHNF-04-T-Q-T-R_SW-SMD8P to
DHNF-06-T-Q-T/R_SW-SMD12 for shortage issue.

P.24
P.24
P.25
P.15
P.64

[VGA (I/O) 3/6]Delete R5978,R5979,R5980 for needless
[VGA (I/O) 3/6]NC R5991 and add R6001(NC) for AMD Errata suggestion
[VGA (Memory BUS]NC R5981 for AMD Errata suggestion
[PCH]Change R5939 to mount for Panel ID setting requirement
[Audio(Mute)]Change U_R364 from 33kohm to 3.3kohm for satisfy hFE under
100 as MOR's suggestion.
P.45 [LAN]Change R84 from 4.7kohm to 0ohm for vendor modification

(2009/11/28)

P.74 [SYS Power]Change PC578,PC579 from 1C-2B20681-M000 to 1C-2B20681-K000
for PUR's suggestion.
P.46 [LAN]Change L47 from 1L-BACMS16-0809 to 1L-BTB1608-080D for PUR's
suggestion.
P.42 [Debug Port]NC CN30 for EMC solution.
P.41 [SPI Flash ROM]NC U3,R43,C20 and mount R775 for EMC solution.
P.80 [VGA Power(ATI_VDD)]:
1.PR183=10.5k for VGA M92 XT high voltage level request
2.PR183=10.5k for VGA M92 XTX high voltage level request
3.PR183=34.8k for VGA M96 high level request
4.PR183=75k for VGA madision high level request
5.PR183=15K for VGA Park high level request
6.NC PR210

(2009/11/21)

P.24 [VGA]Add R6002,R6003,Y9,C6342,C6343 and NC them, it reserve for
Intel FCIM function.
P.69 [Audio (USB)*]Change the footprint of U_CN2,U_CN3,U_CN6 as SMT suggestion.
P.42 [Debug Port]Add C6344 for EMI request.
P.66 [AUDIO]Add C6345 for EMI request.
P.46 [LAN]Change L47 from 100R to 300R for EMI request.
P.71 [DCIN&Charger]: Dcbatout Add PC574 0.1uf,PC575 0.1uf,PC576 4700pf ,
PC577 4700pf for EMI request
P.74 [SYS Power (+3_3V/+5V)]:Add PC578 and PC579 680pf near PQ70 for EMI request
P.78 [CPU Power_VHCORE]:change PC151 and PC156 from NC to mount 0.1uf
for EMI request
P.81 [Others power plane]:Add PC584 680pf,PC585 0.1uf near PQ26 for EMI request.

(2009/12/22)

P.60
P.10
P.63
P.55

[Audio]Add C6348~C6351 for speaker noise issue.
[PCH]Add C6352,C6353 and NC them, reserve for EMI request.
[AUDIO]NC U_C439 and add U_C931(NC) for EMI request.
[LED]Change R5945,R5946,R5947 from 392ohm to 649ohm and R390 from
120ohm to 261ohm as DQA&ME request.
P.63 [Audio]Change U_R668,U_R665,U_R660,U_R670,U_R672,U_R659(22ohm)
from 0402 to 0201 for implement ME solution and layout space is not enough.
And change U_R667,U_R664(33kohm), and R5943(NC),R5944(0ohm),
and U_R339(20kohm), and U_R338(39.2kohm), and U_R652,U_662(10kohm)
from 0402 to 0201 for implement ME solution and layout space is not enough.

P.76 [DDR3 Power(+1_5V/+0_75V)] Mount PQ59, change PR600 resistor to 0 Ohm &
no mount PR145 to change the enable signal to RUN_PWRGD by MOR request.
P.38 [HDMI] Change CN21 symbol from 2N-0019007-MKG0 to 2N-0019003-MKG0
to improve factory process

(2009/12/23)

P.39 [EC]Delete R5983,R5984 and add RP20 for layout space concern
P.81 [Other power plane]Change PR661 from 0603 to 0402 for MOR request
to cost down.
P.15 [PCH]Delete RP19 and add R6004,R6005,R6006 for MOR request to cost down.
P.52 [Camera]Change C9 from 1C-2Y70106-Y001 to 1C-2Y70106-Y000 for MOR request
to cost down.
P.64 [Audio]Change U_Q20 form 2N7002W to SRK7002 for ESD issue.
P.25 [VGA]Change R5805 from NC to mount for AMD suggestion.
P.83 [HOLE]Change H30,H29,H8,H10,H4 hole size as ME's request.
P.34 [CRT]Change CN20 from FOX_DZ11A91-SB281-4H to FOX_DZ11AE1-SB1SD-4H
as ME's request.
P.61 [Audio/USB DB CONN]Change CN31 from FOX_GB5RF500-1203-7H to
FOX_GB5RF500-1203-8H for ME's request.
P.66 [Audio (Audio/USB CONN)*]Change U_CN1 from FOX_GB5RF500-1203-7H to
FOX_GB5RF500-1203-8H as ME's request.
P.54 [Felica]Change CN7 from FOX_GB5RF060-1203-7H to FOX_GB5RF060-1203-8F
as ME's request.

P.25

P.83
P.10
P.64

Power(ATI_VDD)] 1.PR222=39.2k for VGA M92 XTX 1.0VPEG 1.1V voltage
request
2.PR222=27k for VGA Park 1.0VPEG 1.0V voltage
request
3.PR222=27k for VGA Madison 1.0VPEG 1.0V voltage
request
[VGA (Memory Bus 4/6)] 1.R5795, R5796, R5809, R5810=100 for VGA M92XTX
voltage reference
2.R5795, R5796, R5809, R5810=40.2 for VGA Park
voltage reference
3.R5795, R5796, R5809, R5810=40.2 for VGA Madison
voltage reference
[HOLE & AMI LABEL] Mount AMI label for AMI certifcate
[PCH (HDA,JTAG,SAT)] No mount CN18, U43, C815, R542 & Mount R1551 for
needless in MP
[AUDIO (MUTE)*] Change U_Q15 with ESD protection for factory ESD issue

A

FOXCONN
Title

Size
A3
Date:

5

4

B

P.80 [VGA

(2009/11/23)

A

C

M960/M970 MP

(2009/11/22)

B

D

(2009/11/24)

(2009/11/20)

C

1

(2009/11/23)

M960/M970 PVT

D

2

3

2

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

History(9)
Document Number

Rev

M960&M970 H Model
Sheet

Thursday, December 24, 2009
1

SA
92

of

93

5

4

3

2

1

M960/M970 MP
(2009/12/24)

D

P.83 [HOLE & AMI LABEL]Delete BOSS2 for needless from ME's request
P.46 [LAN(Transformer)]Change L70 from LANKOM to DELTA for LANKOM transformer issue
in PVT
P.45 [LAN]Add R6010 reserve for 8057 solution
P.04 [ARD]Delete R937,R930 for MOR's request
P.06 [ARD]Delete R860 for MOR's request
P.24 [VGA]Delete R5785,R5788,R5789 for MOR's request
P.39 [EC]Delete R39,R46 for MOR's request
P.44 [Mini-PCIE Card]Delete R5901 for MOR's request
P.57 [Touch Pad]Delete R5869,R5868 for MOR's request

D

(2009/12/28)

P.10 [PCH]Change R618 from 47ohm to 68ohm and Change C6353 from NC_0.1uF to mount 22pF
for EMC audio FFC issue
P.63 [Audio]Change U_R326 from 22ohm to 0ohm for EMC audio FFC issue

C

C

B

B

A

A

FOXCONN
Title

Size
A3
Date:
5

4

3

2

HON HAI Precision Ind. Co., Ltd.
CCPBG - R&D Division

History(10)
Document Number

Rev

M960&M970 H Model
Sheet

Monday, December 28, 2009
1

SA
93

of

93

www.s-manuals.com
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