Intel 82430HX Schematics. Www.s manuals.com. Rb.1 Schematics

Date: June 19, 1997 Sheet 1 of 24

Size Document Number REV

A 82430HX B.1

Title

Index

INTEL CORP.

Index

Primary CPU (Socket 7)

Clock Generator

Triton II controller (TXC)

Synchronous Cache, Lower 256K

Synchronous Cache, Upper 256K

Page# Page Title

2

1

3

4

5

6

7

8

9

10

11

12

14

13

Memory Modules 0 & 1

Memory Modules 2 & 3

System ROM

AIP

PCI IDE Interface

PIIX3

Serial Ports, Floppy, USB

Parallel Ports

PCI Slots 1 and 2

Pullup/Pulldown Resistors

Switching Power Supply

Fiducials, Holes, Spare Gates

PCI Slots 3 and 4

Keyboard/Mouse Ports

Battery, RTC Circuit

Front Panel

ISA Slots

15

16

17

18

19

22

23

20

21

24

THIS DRAWING CONTAINS INFORMATION

WHICH HAS NOT BEEN VERIFIED FOR

MANUFACTURING AN END USER PRODUCT.

INTEL IS NOT RESPONSIBLE FOR THE

MISUSE OF THIS INFORMATION.

Released Rev. B.1

Decoupling Caps

Date: June 19, 1997 Sheet 2 of 24

Size Document Number REV

C 82430HX B.1

Title

PRIMARY CPU (Socket 7)

INTEL CORP.

CPUVCORE

1 2

C195

1uF

1 2

C187

1uF

1 2

C218

1uF

1 2

C209

1uF

1 2

C196

1uF

1 2

C188

1uF

1 2

C186

1uF

1 2

C205

1uF

1 2

C212

1uF

1 2

C219

1uF

1 2

C199

1uF

1 2

C200

1uF

HA[3..31]

HA3

HA4

HA5

HA6

HA7

HA8

HA9

HA10

HA11

HA12

HA13

HA14

HA15

HA16

HA17

HA18

HA19

HA20

HA21

HA22

HA23

HA24

HA25

CPUVCORE

3..6

D0

116

D1

102

D2

112

D3

101

D4

97

D5

96

D6

91

D7

90

D8

72

D9

55

D10

54

D11

36

D12

71

D13

35

D14

53

D15

17

D16

34

D17

52

D18

16

D19

69

D20

33

D21

51

D22

15

D23

68

D24

50

D25

48

D26

67

D27

47

D28

66

D29

46

D30

65

D31

45

D32

44

D33

63

D34

43

D35

62

D36

42

D37

61

D38

41

D39

60

D40

59

D41

2

D42

78

D43

20

D44

58

D45

39

D46

77

D47

38

D48

57

D49

76

D50

56

D51

94

D52

75

D53

100

D54

74

D55

99

D56

105

D57

109

D58

110

D59

115

D60

120

D61

119

D62

125

D63

129

A3 283

A4 301

A5 263

A6 319

A7 282

A8 300

A9 262

A10 318

A11 281

A12 280

A13 261

A14 279

A15 260

A16 278

A17 259

A18 277

A19 258

A20 276

A21 216

A22 228

A23 211

A24 222

A25 246

A26 227

A27 221

A28 265

A29 264

A30 302

A31 245

DP0

73

DP1

70

DP2

49

DP3

64

DP4

40

DP5

95

DP6

93

DP7

130

CLK

256

BOFF#

185

A20#

251

INTR

206

NMI

201

IGNNE#

192

KEN#

170

FLUSH#

306

AHOLD

165

EADS#

286

BRDY#

175

RESET

257

INV

160

NA#

180

BUSCHK#

269

WB/WT#

190

INIT

191

SMI#

196

R/S#

202

PEN#

186

STOPCLK#

166

HOLD

195

EWBE#

169

BRDYC#

179

ADSC# 285

BE0# 270

BE1# 252

BE2# 271

BE3# 253

BE4# 272

BE5# 254

BE6# 273

FERR# 140

BREQ 229

HITM# 268

HIT# 250

PCHK# 215

HLDA 230

AP 248

LOCK# 225

APCHK# 210

PRDY 200

PCD 220

PWT 267

CACHE# 159

ADS# 231

D/C# 249

W/R# 287

M/IO 155

SCYC 274

FRCMC# 182

PM0/BP0 139

PM1/BP1 145

BP2 149

BP3 150

TCK 126

TDO 131

TDI 132

TMS 136

TRST# 141

PICCLK 106

PICD0 111

PICD1 122

PHITM# 199

PHIT# 189

PBGNT# 205

PBREQ# 209

BF0 181

D/P# 212

CPUTYP 142

UPVRM# 226

VCC2DET 266

V

C

O

R

E

1

7

8

V

C

O

R

E

1

8

V

C

O

R

E

1

9

8

V

C

O

R

E

2

0

8

V

C

O

R

E

2

1

8

V

C

O

R

E

2

3

4

V

C

O

R

E

3

0

7

V

C

O

R

E

3

0

8

V

C

O

R

E

3

0

9

V

C

O

R

E

3

1

0

V

C

O

R

E

3

1

V

C

O

R

E

3

1

2

V

C

O

R

E

3

V

C

O

R

E

4

V

C

O

R

E

5

V

C

O

R

E

6

V

C

O

R

E

7

V

C

O

R

E

8

V

C

O

R

E

1

9

V

C

O

R

E

8

1

V

C

O

R

E

9

8

V

C

O

R

E

1

0

8

V

C

O

R

E

1

8

V

C

O

R

E

1

2

8

V

C

O

R

E

1

3

8

V

C

O

R

E

1

4

8

V

C

O

R

E

1

5

8

V

C

O

R

E

1

6

8

BE7# 255

IERR# 135

BF1 176

NC/SUSPACK# 171

NC/TEST1 172

NC/TEST3 320

NC/MPBOFF#

275

NC/BHOLD

146

NC/CHOLD

151

NC/DHOLD

152

SMIACT# 219

U33

P5II

HD[0..63]

HD22

HD21

HD20

HD19

HD18

HD17

HD16

HD15

HD14

HD13

HD12

HD11

HD10

HD9

HD8

HD7

HD6

HD5

HD4

HD3

HD2

HD1

HD0

CPUVIO

4..6

1 8

2 7

3 6

4 5

RP71

4.7K

1 8

2 7

3 6

4 5

RP69

4.7K

1 8

2 7

3 6

4 5

RP72

4.7K

1 8

2 7

3 6

4 5

RP75

4.7K HD59

HD58

HD57

HD56

HD55

HD54

HD53

HD52

HD51

HD50

HD49

HD48

HD47

HD46

HD45

HD44

HD43

HD42

HD41

HD40

HD39

HD38

HD37

HD36

HD35

HD34

HD33

HD32

HD31

HD30

HD29

HD28

HD27

HD26

HD25

HD24

HD23

HDPA0

HDPA1

HDPA2

HDPA3

HDPA4

HDPA5

HDPA6

HDPA7

HFRCMC#

HPENA#

HWB/WTA#

HFLUSHA#

HAPA

HBUSCHKA#

HSMIACT#

1 TP207

1 TP214

1 TP12

1 TP11

1 TP198

1 TP2

1 TP208

1 TP1

HW/R#

HD/C#

HADS#

HCACHE#

HLOCK#

HFERR#

HBE#[0..7]

HADSC#

HHITM#

HA26

HA27

HA28

HA29

HA30

HA31

TP083

TP019

TP086

TP085

TP092

TP012

TP013

HAPA

TP018

HBE#0

HBE#1

HBE#2

HBE#3

HBE#4

HBE#5

HBE#6

HBE#7

4..6

4

10

4..6

5,6

4

1 2

C180

1uF

1 2

C194

1uF

1 2

C221

1uF

1 2

C207

1uF

1 2

C213

1uF

1 2

C174

1uF

1 2

C177

1uF

1 2

C178

1uF

1 2

C179

1uF

1 2

C206

1uF

1 2

C217

1uF

1 2

C193

1uF

1 2

C201

1uF

1 2

C157

220uF

CPUVIO

1 2

C172

0.1uF

1 2

C161

0.1uF

1 2

C159

0.1uF

1 2

C173

0.1uF

1 2

C154

0.1uF

1 2

C158

0.1uF

1 2

C155

0.1uF

1 2

C160

0.1uF

1 2

C163

0.1uF

1 2

C162

0.1uF

1 2

C164

0.1uF

1 2

C130

0.1uF

CORE/BUS

SPEED RATIO JB2

3/2X

5/2X

2X

3X

1-3,2-4

3-5,2-4

1-3,4-6

3-5,4-6

1 TP215

1 TP209

1 TP210

1 TP211

1 TP212

1 TP220

1 TP213

1 TP221

1 TP222

1 TP223

1 TP13

1 TP7

1 TP8

1 TP6

1 TP5

1 TP4

1 TP197

1 TP206

1 2

R114

330

1 2

R110

330

1 2

R104

330

1 2

R102

330

1 TP3

HM/IO#

TP093

HBF0

HBF0R HBF1R

HBF1

TP087

TP088

TP090

TP089

TP007

TP091

TP006

TP005

TP004

TP002

TP014

TP021

TP020

TP015

TP017

TP016

TP011

HFRCMC#

TP084

CPUVIO

HSMIACT#

1

3

5

2

4

6

JB2

JB3

4

1

TP224

1 2

R111 4.7K

1 2

R97 4.7K

1 2

R98 4.7K

1 2

R100 4.7K

9 8

U27D

7407S

1 2

R86

330

1 2

R87

4.7K

1 2

R92 10K

HCLKCPU

HBOFF#

HA20M#

HINTR

HNMI

HIGNNE#

HKEN#

HAHOLD

HEADS#

HBRDY#

HRESET

HNA#

HINIT

HSMI#

HD63

HD62

HD61

HD60

HBUSCHKA#

HWB/WTA#

TP003

HPENA#

HFLUSHA#

HA20M3V#

HDPA0

HDPA1

HDPA2

HDPA3

HDPA4

HDPA5

HDPA6

HDPA7

3

4

15

10

104

4

10

4

10

1 2

R99

330

1 2

R130

330

1 2

R131

330

1 2

R93

4.7k

1

TP225 1

TP226 1

TP227 1

TP228

HSTPCLK#

HHOLDA

HEWBEA#

HBRDYC#

TP001

TP009

TP008

TP010

THIS DRAWING CONTAINS INFORMATION

WHICH HAS NOT BEEN VERIFIED FOR

MANUFACTURING AN END USER PRODUCT.

INTEL IS NOT RESPONSIBLE FOR THE

MISUSE OF THIS INFORMATION.

10

1 TP218

1 2 R115

330

1 TP216

1 TP217

1 TP67

HCPUTYPA

TP097

TP094

TP095

TP096

TP901 1 TP9

Date: June 19, 1997 Sheet 3 of 24

Size Document Number REV

B 82430HX B.1

Title

Clock Generator

INTEL CORP.

1 2

R76

22

1 2

R5

22

OSC

PIIX3OSC

HCLKTXC

OSCR

OSCPULLDN

12 11

1

3

U3D

74LS125S

20

10

4

JUMPER 2 JUMPER 3

2-3

1-2

2-3

1-2

2-3

1 2 R81

22

1

2R78

22

1 2

R2

220

RAWOSC

X

1

2

R79

22

BCLK(0:5) JUMPER 1

50MHz

60MHz

66MHz

RESERVED

25MHz

30MHz

33MHz

RESERVED

2-3

1-2

PCLK(0:3)

CLKSEL_PU

CPUVIO

JUMPER 1

1

2R89

4.7K

1 2 R88

4.7K

1

2

3

J30

JP3

1

2

3

J29

JP3

HA27PU

JUMPER 2

1 2

Y1

14.31818MHz

1 2

R80

0

1 2

L13

1.5uH

1

TP24

CLKSEL0

CLKSEL1

XTAL1

XTAL2

CLKGENP1

TP029

CPUVIO ALWAYS STUFFED

OE

5

X1

2

X2

3

SEL0-

13

SEL1-

12

ISA14MHZ 28

APIC14MHZ 27

HCLK0 6

HCLK1 7

HCLK2 9

HCLK3 10

PCLK0 15

PCLK1 16

PCLK2 18

PCLK3 19

PCLK4 21

PCLK5 22

24MHZ 24

12MHZ 25

VCC3

14

VCC3

20

VCC3

26

VCC3

8 GND 11

GND 17

GND 23

GND 4

VCC3

1

U28

ICS9159-02S

RAWOSCR

HCLKSRAM0R

PCLK0R

PCLK1R

PCLK2R

PCLK3R

PCLKTXCR

PCLKPIIX3R

AIPCLKR

KBD_CLKR

HCLKCPUR

HCLKSRAM1R

PIIX3OSCR

DO NOT STUFF 1 2

R73

22

1 2

R69

22

1 TP922

1 2 R61

22

1 2 R62

22

1 2 R63

22

1 2

R66

22

HCLKCPU

HCLKSRAM0

HCLKSRAM1

PCLK0

PCLK1

PCLK2

TP022

2

6

5

18

19

1 2 R64

22

1 2 R68

22

1 2 R71

22

1 2

R67

22

1 2 R72

22

PCLKTXC

PCLKPIIX3

PCLK3

USBCLK

AIPCLK

4

10

19

10

12

1 2 R77

22

1 2

R70

10K

48MCLKFB1

VCC

KBD_CLK1R

STUFF WITH 9169

1 2

C143

0.1uF

1 2

C147

0.1uF

1 2

C142

0.1uF

1 2

C136

0.1uF

1 2

C144

0.1uF 48MCLKFB2

48MCLKPU

CLKVCC3

JUMPER 3

1

2C146

10pF

1

2C145

10pF

1

2

3

J25

JP3

HA27

1 2

R154

8.2K

HA27PD

2,4..6

THIS DRAWING CONTAINS INFORMATION

WHICH HAS NOT BEEN VERIFIED FOR

MANUFACTURING AN END USER PRODUCT.

INTEL IS NOT RESPONSIBLE FOR THE

MISUSE OF THIS INFORMATION.

D

12

CLK

11

Q 9

Q 8

P

R

1

0

C

L

1

3

U26B

74ALS74AS

1 2

R74

22

D

2

CLK

3

Q 5

Q 6

P

R

4

C

L

1

U26A

74ALS74AS

48MFFOUT1

STUFF WITH 9159

1 2 R75

22

KBD_CLK 15

Date: June 19, 1997 Sheet 4 of 24

Size Document Number REV

C 82430HX B.1

Title

Triton II controller (TXC)

INTEL CORP.

AD[0..31]

HD[0..63]

HBE#[0..7]

HHITM#

HM/IO#

HD/C#

HW/R#

HLOCK#

AD0

AD1

PCLKTXC

2,5,6

2

2,5,6

2

2,5,6

2

3

10,18,19

H

D

5

1

H

D

5

0

H

D

4

9

H

D

4

8

H

D

4

7

H

D

4

6

H

D

4

5

H

D

4

H

D

4

3

H

D

4

2

H

D

4

1

H

D

4

0

H

D

3

9

H

D

3

8

H

D

3

7

H

D

3

6

H

D

3

5

H

D

3

4

H

D

3

H

D

3

2

H

D

3

1

H

D

3

0

H

D

2

9

H

D

2

8

H

D

2

7

H

D

2

6

H

D

2

5

H

D

2

4

H

D

2

3

H

D

2

H

D

2

1

H

D

2

0

H

D

1

9

H

D

1

8

H

D

1

7

H

D

1

6

H

D

1

5

H

D

1

4

H

D

1

3

H

D

1

2

H

D

1

H

D

1

0

H

D

9

H

D

8

H

D

7

H

D

6

H

D

5

H

D

4

H

D

3

H

D

2

H

D

1

H

D

0

H

C

L

K

I

N

1

5

8

B

O

F

#

2

0

5

E

A

D

S

#

2

1

6

A3

275

A4

315

A5

252

A6

316

A7

312

A8

272

A9

271

A10

311

A11

291

A12

251

A13

310

A14

270

A15

290

A16

250

A17

309

A18

289

A19

269

A20

249

A21

273

A22

254

A23

253

A24

294

A25

293

A26

274

A27

313

A28

314

A29

255

A30

295

A31

292

A

H

O

L

D

1

6

7

N

A

#

1

9

5

B

R

D

Y

#

1

8

1

A

D

S

#

2

9

S

M

I

A

C

T

#

2

3

4

K

E

N

#

/

I

N

V

1

5

3

C

A

C

H

E

#

1

3

9

H

L

O

C

K

#

1

8

W

/

R

#

2

3

D

/

C

#

2

3

1

M

/

I

O

#

1

2

9

H

I

T

M

#

2

3

2

B

E

7

#

1

7

B

E

6

#

1

6

B

E

5

#

1

6

5

B

E

4

#

1

6

4

B

E

3

#

1

6

3

B

E

2

#

1

5

2

B

E

1

#

1

5

1

B

E

0

#

1

5

0

M

D

6

3

5

M

D

6

2

1

6

M

D

6

1

3

7

M

D

6

0

1

8

M

D

5

9

3

9

M

D

5

8

4

0

M

D

5

7

9

M

D

5

6

1

0

M

D

5

1

4

7

M

D

5

4

1

6

2

M

D

5

3

1

8

M

D

5

2

1

9

M

D

5

1

2

1

M

D

5

0

2

3

M

D

4

9

2

4

2

M

D

4

8

2

8

4

M

D

4

7

5

4

M

D

4

6

7

5

M

D

4

5

6

M

D

4

7

M

D

4

3

2

0

M

D

4

2

6

0

M

D

4

1

9

8

M

D

4

0

1

2

M

D

3

9

1

6

0

M

D

3

8

1

7

5

M

D

3

7

1

9

0

M

D

3

6

2

0

9

M

D

3

5

2

1

M

D

3

4

2

4

M

D

3

2

6

3

M

D

3

2

8

3

M

D

3

1

3

4

M

D

3

0

7

6

M

D

2

9

1

7

M

D

2

8

5

7

M

D

2

7

1

9

M

D

2

6

7

8

M

D

2

5

9

7

M

D

2

4

9

M

D

2

3

1

4

8

M

D

2

1

7

4

M

D

2

1

8

9

M

D

2

0

2

0

M

D

1

9

2

0

8

M

D

1

8

2

M

D

1

7

2

6

4

M

D

1

6

2

6

2

M

D

1

5

3

M

D

1

4

3

5

M

D

1

3

6

M

D

1

2

3

8

M

D

1

5

8

M

D

1

0

5

9

M

D

9

8

0

M

D

8

1

M

D

7

1

6

1

M

D

6

1

7

6

M

D

5

1

9

8

M

D

4

2

1

0

M

D

3

2

4

M

D

2

4

3

M

D

1

2

4

1

M

D

0

3

0

4

RAS0#

121

RAS1#

110

RAS2#

109

RAS3#

96

RAS4#

187

RAS5#

197

RAS6#

186

RAS7#

196

CAS0#

145

CAS1#

159

CAS2#

131

CAS3#

173

CAS4#

130

CAS5#

144

CAS6#

120

CAS7#

172

MAA0

276

MAA1

236

MAB0

296

MAB1

256

MA2

317

MA3

297

MA4

277

MA5

257

MA6

237

MA7

298

MA8

258

MA9

319

MA10

318

MA11

278

MPD0

133

MPD1

123

MPD2

146

MPD3

113

MPD4

132

MPD5

124

MPD6

134

MPD7

122

MWE#

235

C

A

D

V

#

2

7

9

C

A

D

S

#

2

9

C

S

#

3

0

C

O

E

#

2

5

9

G

W

E

#

3

2

0

B

W

E

#

3

2

1

T

I

O

1

0

3

2

4

T

I

O

9

3

2

3

T

I

O

8

3

0

3

T

I

O

7

3

2

T

I

O

6

3

0

2

T

I

O

5

2

8

2

T

I

O

4

2

3

8

T

I

O

3

2

8

1

T

I

O

2

6

1

T

I

O

1

2

6

0

T

I

O

0

2

0

7

T

W

E

#

2

8

0

PCLKIN 90

AD0 15

AD1 14

AD2 33

AD3 13

AD4 52

AD5 32

AD6 12

AD7 51

AD8 11

AD9 50

AD10 30

AD11 10

AD12 49

AD13 29

AD14 9

AD15 48

AD16 47

AD17 27

AD18 7

AD19 46

AD20 26

AD21 6

AD22 45

AD23 25

AD24 66

AD25 44

AD26 24

AD27 4

AD28 23

AD29 3

AD30 22

AD31 2

C/BE0# 31

C/BE1# 28

C/BE2# 8

C/BE3# 5

FRAME# 86

DEVSEL# 89

IRDY# 87

TRDY# 88

STOP# 91

LOCK# 85

REQ0# 67

REQ1# 69

REQ2# 71

REQ3# 73

GNT0# 68

GNT1# 70

GNT2# 72

GNT3# 74

PHLD# 64

PHLDA# 65

PAR 92

SERR# 93

RST# 239

TEST# 301

H

D

6

3

1

H

D

6

2

1

H

D

6

1

4

3

H

D

6

0

4

2

H

D

5

9

4

1

H

D

5

8

6

2

H

D

5

7

6

3

H

D

5

6

8

3

H

D

5

6

1

H

D

5

4

8

2

H

D

5

3

8

4

H

D

5

2

8

1

H

D

5

1

0

3

H

D

5

0

1

0

4

H

D

4

9

1

6

H

D

4

8

1

0

1

H

D

4

7

1

0

2

H

D

4

6

1

2

7

H

D

4

5

1

4

H

D

4

1

2

8

H

D

4

3

1

7

H

D

4

2

1

3

7

H

D

4

1

5

H

D

4

0

1

2

6

H

D

3

9

1

2

5

H

D

3

8

1

3

8

H

D

3

7

1

3

5

H

D

3

6

1

3

6

H

D

3

5

1

8

0

H

D

3

4

1

4

9

H

D

3

1

7

8

H

D

3

2

1

7

9

H

D

3

1

9

4

H

D

3

0

1

9

2

H

D

2

9

1

9

3

H

D

2

8

2

0

4

H

D

2

7

1

9

1

H

D

2

6

2

0

2

H

D

2

5

2

0

3

H

D

2

4

2

1

5

H

D

2

3

2

0

1

H

D

2

6

H

D

2

1

2

1

3

H

D

2

0

2

8

H

D

1

9

2

1

4

H

D

1

8

2

4

6

H

D

1

7

2

7

H

D

1

6

2

4

8

H

D

1

5

2

6

H

D

1

4

2

4

7

H

D

1

3

2

6

8

H

D

1

2

5

H

D

1

2

8

H

D

1

0

2

6

7

H

D

9

2

8

7

H

D

8

2

4

5

H

D

7

2

1

2

H

D

6

2

6

5

H

D

5

2

8

6

H

D

4

2

8

5

H

D

3

0

8

H

D

2

3

0

6

H

D

1

3

0

7

H

D

0

3

0

5

VDD5V 94

U23

TXC

H

D

6

3

H

D

6

2

H

D

6

1

H

D

6

0

H

D

5

9

H

D

5

8

H

D

5

7

H

D

5

6

H

D

5

H

D

5

4

H

D

5

3

H

D

5

2

H

B

E

#

7

H

B

E

#

6

H

B

E

#

5

H

B

E

#

4

H

B

E

#

3

H

B

E

#

2

H

B

E

#

1

H

B

E

#

0

HA[3..31]

HCACHE#

HKEN#

HSMIACT#

HADS#

HBRDY#

HNA#

HAHOLD

HEADS#

HBOFF#

HCLKTXC

HA3

HA4

HA5

HA6

HA7

HA8

HA9

HA10

2,3,5,6

2

3

MCAS#[0..7]

HA11

HA12

HA13

HA14

HA15

HA16

HA17

HA18

HA19

HA20

HA21

HA22

HA23

HA24

HA25

HA26

HA27

HA28

HA29

HA30

HA31

MCAS#R0

MCAS#R1

MCAS#R2

MCAS#R3

MCAS#R4

MCAS#R5

MCAS#0

MCAS#2

MCAS#4

MCAS#6

MRAS#R0

MRAS#R1

MRAS#R2

MRAS#R3

TP027

TP026

TP025

TP024

1 8

2 7

3 6

4 5

RP67

10

7,8

C/BE#[0..3]

C/BE#0

C/BE#1

C/BE#2

C/BE#3

AD2

AD3

AD4

AD5

AD6

AD7

AD8

AD9

AD10

AD11

AD12

AD13

AD14

AD15

AD16

AD17

AD18

AD19

AD20

AD21

AD22

AD23

AD24

AD25

AD26

AD27

AD28

AD29

AD30

AD31

10,18,19

1 2

R54

330

1 2

R57 10K

1 2

R52 10K

1 2

R37 10K

1

2C131

1.0uF

PCIRST#

SERR#

PAR

PHLDA#

PHOLD#

PGNT#[0..3]

PLOCK#

STOP#

TRDY#

IRDY#

DEVSEL#

FRAME#

VDD5V

TESTIN#

PGNT#0

PGNT#1

PGNT#2

PGNT#3

PREQ#0

PREQ#1

PREQ#2

PREQ#3

VCC

CPUVIO

VCC

PREQ#0

PREQ#1

PREQ#2

PREQ#3

5,6,10,18,19

10,18,19,21

10

18,19,21

10,18,19,21

4,18,19,21

1 2

R56

100

C

T

A

G

7

C

T

A

G

6

C

T

A

G

5

C

T

A

G

4

C

T

A

G

3

C

T

A

G

2

C

T

A

G

1

C

T

A

G

0

M

D

2

3

M

D

2

M

D

2

1

M

D

2

0

M

D

1

9

M

D

1

8

M

D

1

7

M

D

1

6

M

D

1

5

M

D

1

4

M

D

1

3

M

D

1

2

M

D

1

M

D

1

0

M

D

9

M

D

8

M

D

7

M

D

6

M

D

5

M

D

4

M

D

3

M

D

2

M

D

1

M

D

0

C

T

A

G

8

C

T

A

G

9

C

T

A

G

1

0

M

D

6

3

M

D

6

2

M

D

6

1

M

D

6

0

M

D

5

9

M

D

5

8

M

D

5

7

M

D

5

6

M

D

5

M

D

5

4

M

D

5

3

M

D

5

2

M

D

5

1

M

D

5

0

M

D

4

9

M

D

4

8

M

D

4

7

M

D

4

6

M

D

4

5

M

D

4

M

D

4

3

M

D

4

2

M

D

4

1

M

D

4

0

M

D

3

9

M

D

3

8

M

D

3

7

M

D

3

6

M

D

3

5

M

D

3

4

M

D

3

M

D

3

2

M

D

3

1

M

D

3

0

M

D

2

9

M

D

2

8

M

D

2

7

M

D

2

6

M

D

2

5

M

D

2

4

MAA1

MAA0

MAB0

MAB1

MA[2..11]

MP[0..7]

MA2

MA3

MA4

MA5

MA6

MA7

MA8

MA9

MA10

MA11

MCAS#R6

MCAS#R7

MCAS#1

MCAS#3

MCAS#5

MCAS#7

MP0

MP1

MP2

MP3

MP4

MP5

MP6

MP7

1 2

R153

22

1 8

2 7

3 6

4 5

RP68

10

7

8

7,8

3 4

U2B

74HCT14S

1

2 3

U16A

74ALS32S

MWE#

MD[0..63]

PIIX3INIT

KBRST# KBRST

MWE#R

THIS DRAWING CONTAINS INFORMATION

WHICH HAS NOT BEEN VERIFIED FOR

MANUFACTURING AN END USER PRODUCT.

INTEL IS NOT RESPONSIBLE FOR THE

MISUSE OF THIS INFORMATION.

7,8

10

15

1 2

U27A

7407S

1

2R91

330

HINIT

HINITD

CPUVIO

2

MRAS#R[0..3]

MRAS#R0

MRAS#R1

MRAS#R2

MRAS#R3

MRAS#0

MRAS#1

MRAS#2

MRAS#3

1 8 2 7 3 6 4 5

RP66

10

CADV#

CADS#

CCS#

COE#

CGWE#

CBWE#

CTWE#

CTAG[0..10]

MRAS#[0..3]

5,6

5

5,6

7,8

Date: June 19, 1997 Sheet 5 of 24

Size Document Number REV

C 82430HX B.1

Title

Synchronous Cache, Lower 256K

INTEL CORP.

HD32

HD33

HD34

HD35

HD36

HA3

HA4

HA5

HA6

HA7

A0

37

A1

36

A2

35

A3

34

A4

33

A5

32

A6

100

A7

99

A8

82

A9

81

A10

44

A11

45

A12

46

A13

47

A14

48

DQ0 52

DQ1 53

DQ2 56

DQ3 57

DQ4 58

DQ5 59

DQ6 62

DQ7 63

DQ8 68

DQ9 69

DQ10 72

DQ11 73

DQ12 74

DQ13 75

DQ14 78

DQ15 79

DQ16 2

DQ17 3

DQ18 6

DQ19 7

DQ20 8

DQ21 9

DQ22 12

DQ23 13

DQ24 18

DQ25 19

DQ26 22

DQ27 23

DQ28 24

DQ29 25

DQ30 28

DQ31 29

BW1#

93

BW2#

94

BW3#

95

BW4#

96

CLK

89

CE#

98

CE2#

92

OE#

86

ADV#

83

ADSP#

84

ADSC#

85

CE2

97

BWE#

87

GW#

88

ZZ

64

MODE

31

VDD1 16

VDD2 66

NC

30

RESET# 38

W/R# 39

NF1 42

NF2 43

NC

49

NC

50

NC

51

NC

1

NC

80

FT# 14

U31

32KX32 SRAM

HD0

HD1

HD2

HD3

HD4

HA[3..18]

HBE#[0..7]

HD[0..63]

HCLKSRAM1

CCS#

COE#

CADV#

HADSC#

CADS#

CGWE#

CBWE#

HA3

HA4

HA5

HA6

HA7

A0

37

A1

36

A2

35

A3

34

A4

33

A5

32

A6

100

A7

99

A8

82

A9

81

A10

44

A11

45

A12

46

A13

47

A14

48

DQ0 52

DQ1 53

DQ2 56

DQ3 57

DQ4 58

DQ5 59

DQ6 62

DQ7 63

DQ8 68

DQ9 69

DQ10 72

DQ11 73

DQ12 74

DQ13 75

DQ14 78

DQ15 79

DQ16 2

DQ17 3

DQ18 6

DQ19 7

DQ20 8

DQ21 9

DQ22 12

DQ23 13

DQ24 18

DQ25 19

DQ26 22

DQ27 23

DQ28 24

DQ29 25

DQ30 28

DQ31 29

BW1#

93

BW2#

94

BW3#

95

BW4#

96

CLK

89

CE#

98

CE2#

92

OE#

86

ADV#

83

ADSP#

84

ADSC#

85

CE2

97

BWE#

87

GW#

88

ZZ

64

MODE

31

VDD1 16

VDD2 66

NC

30

RESET# 38

W/R# 39

NF1 42

NF2 43

NC

49

NC

50

NC

51

NC

1

NC

80

FT# 14

U22

32KX32 SRAM

2,4,6

2..4,6

2,4,6

2,6

3

4,6

HA8

HA9

HA10

HA11

HA12

HA13

HA14

HA15

HA16

HA17

HBE#0

HBE#1

HBE#2

HBE#3

CRPU1

CBURST_SEQ1

CBURST_SEQ2

6

HD5

HD6

HD7

HD8

HD9

HD10

HD11

HD12

HD13

HD14

HD15

HD16

HD17

HD18

HD19

HD20

HD21

HD22

HD23

HD24

HD25

HD26

HD27

HD28

HD29

HD30

HD31

VDD1A

VDD2A

1 2

R1320

1 2

R1330

VCC

1

2C230

1uF

1

2

C227

0.01uF

PCIRST#D

HW/R#D

CTAG10D

STUFFING OPTION

NF2D

1

2

C228

0.01uF

1

2

C229

3.3uF

1 2 R1440

1 2

R1450

HA8

HA9

HA10

HA11

HA12

HA13

HA14

HA15

HA16

HA17

HBE#4

HBE#5

HBE#6

HBE#7

CPUVIO

1

2

R83

220

HD37

HD38

HD39

HD40

HD41

HD42

HD43

HD44

HD45

HD46

HD47

HD48

HD49

HD50

HD51

HD52

HD53

HD54

HD55

HD56

HD57

HD58

HD59

HD60

HD61

HD62

HD63

VCC

VDD1B

VDD2B

1 2

R1350

1 2

R1360

1

2

C233

3.3uF 1

2C234

1uF

PCIRST#C

HW/R#C

CTAG10C

STUFFING OPTION

NF2C

1

2C231

0.01uF1

2

C232

0.01uF

1 2 R1560

1 2

R157

0

1 2 R1580

1 2 R1491K

A0

10

A1

9

A2

8

A3

7

A4

6

A5

5

A6

4

A7

3

A8

25

A9

24

A10

21

A11

23

A12

2

A13

26

A14

1

DQ1 11

DQ2 12

DQ3 13

DQ4 15

DQ5 16

DQ6 17

DQ7 18

DQ8 19

WE#

27

CE#

20

OE#

22

U25

SRAM32KX8

1 8 2 7 3 6 4 5

RP73

10K

CTAG[0..10]

CTAG8

CTAG9

UNUSD13

UNUSD11

UNUSD12

UNUSD14

UNUSD15

VCC

CTAG10T

CTAG10

STUFFING OPTION

CTAG10 1 2 R155

0

4,6

CRPU2

HA13

HA14

HA15

HA17

HA7

HA5

HA12

HA10

HA9

CTAG0

CTAG1

CTAG2

CTAG3

CTAG4

CTAG5

CTAG6

CTAG7

1 2 R1460

1 2 R15210K

1 2

R106

4.7K

1 2

R101

4.7K

1 2

R84

4.7K

A0

10

A1

9

A2

8

A3

7

A4

6

A5

5

A6

4

A7

3

A8

25

A9

24

A10

21

A11

23

A12

2

A13

26

A14

1

DQ1 11

DQ2 12

DQ3 13

DQ4 15

DQ5 16

DQ6 17

DQ7 18

DQ8 19

WE#

27

CE#

20

OE#

22

U24

SRAM32KX8

1 2 R65

0

1 2

R107

4.7K

1 2

R103

4.7K

HA13

HA14

HA15

HA17

HA7

HA5

HA12

HA10

HA9

HA18

HA28

HA29

HA30

HA28

HA29

CPUVIOVCC

CPUVIO

CRPD3

PCIRST#

HW/R#

1 8

2 7

3 6

4 5

RP70

10K

CRPU2

2,4,6

4,6,10,18,19

6

1 2

R95

4.7K

1 2 R94

4.7K

1 2 R96

4.7K

CTWE#

HA8

HA16

HA6

HA11

HA31

HA30

HA31

THIS DRAWING CONTAINS INFORMATION

WHICH HAS NOT BEEN VERIFIED FOR

MANUFACTURING AN END USER PRODUCT.

INTEL IS NOT RESPONSIBLE FOR THE

MISUSE OF THIS INFORMATION.

4

CACHE CONFIG HA31 HA30 HA29 HA28

NO SRAM

256K PBSRAM

512K PBSRAM

11X X

10 1 1

0010

HA8

HA16

HA6

HA11 1 2

R82

100K

CA18

CTAG10

CONFIGURATION RESISTORS

1 2 R90

4.7K

6

CPUVIO

Date: June 19, 1997 Sheet 6 of 24

Size Document Number REV

B 82430HX B.1

Title

Synchronous Cache, Upper 256K

INTEL CORP.

HD32

HD33

HD34

HD35

HD36

HD37

HD38

HD39

HD40

HD41

HD42

HD43

HA3

HA4

HA5

HA6

HA7

HA8

HA9

HA10

HA11

HA12

HA13

HA14

A0

37

A1

36

A2

35

A3

34

A4

33

A5

32

A6

100

A7

99

A8

82

A9

81

A10

44

A11

45

A12

46

A13

47

A14

48

DQ0 52

DQ1 53

DQ2 56

DQ3 57

DQ4 58

DQ5 59

DQ6 62

DQ7 63

DQ8 68

DQ9 69

DQ10 72

DQ11 73

DQ12 74

DQ13 75

DQ14 78

DQ15 79

DQ16 2

DQ17 3

DQ18 6

DQ19 7

DQ20 8

DQ21 9

DQ22 12

DQ23 13

DQ24 18

DQ25 19

DQ26 22

DQ27 23

DQ28 24

DQ29 25

DQ30 28

DQ31 29

BW1#

93

BW2#

94

BW3#

95

BW4#

96

CLK

89

CE#

98

CE2#

92

OE#

86

ADV#

83

ADSP#

84

ADSC#

85

CE2

97

BWE#

87

GW#

88

ZZ

64

MODE

31

VDD1 16

VDD2 66

NC

30

RESET# 38

W/R# 39

NF1 42

NF2 43

NC

49

NC

50

NC

51

NC

1

NC

80

FT# 14

U32

32KX32 SRAM

HD0

HD1

HD2

HD3

HD4

HD5

HD6

HD7

HD8

HD9

HD10

HD11

HA[3..17]

HBE#[0..7]

HA3

HA4

HA5

HA6

HA7

HA8

HA9

HA10

HA11

HA12

HA13

HA14

A0

37

A1

36

A2

35

A3

34

A4

33

A5

32

A6

100

A7

99

A8

82

A9

81

A10

44

A11

45

A12

46

A13

47

A14

48

DQ0 52

DQ1 53

DQ2 56

DQ3 57

DQ4 58

DQ5 59

DQ6 62

DQ7 63

DQ8 68

DQ9 69

DQ10 72

DQ11 73

DQ12 74

DQ13 75

DQ14 78

DQ15 79

DQ16 2

DQ17 3

DQ18 6

DQ19 7

DQ20 8

DQ21 9

DQ22 12

DQ23 13

DQ24 18

DQ25 19

DQ26 22

DQ27 23

DQ28 24

DQ29 25

DQ30 28

DQ31 29

BW1#

93

BW2#

94

BW3#

95

BW4#

96

CLK

89

CE#

98

CE2#

92

OE#

86

ADV#

83

ADSP#

84

ADSC#

85

CE2

97

BWE#

87

GW#

88

ZZ

64

MODE

31

VDD1 16

VDD2 66

NC

30

RESET# 38

W/R# 39

NF1 42

NF2 43

NC

49

NC

50

NC

51

NC

1

NC

80

FT# 14

U29

32KX32 SRAM

2..5

2,4,5

CCS#

COE#

CADV#

HADSC#

CADS#

CA18

HCLKSRAM0

HA15

HA16

HA17

HBE#0

HBE#1

HBE#2

HBE#3

CRPU3

2,5

3

4,5

5

HD12

HD13

HD14

HD15

HD16

HD17

HD18

HD19

HD20

HD21

HD22

HD23

HD24

HD25

HD26

HD27

HD28

HD29

HD30

HD31

STUFFING OPTION

CTAG10

VDD1C

VDD2C

NF2B

PCIRST#B

HW/R#B

CTAG10B

1 2

R1470

1 2

R1480

1

2

C237

3.3uF

1

2C235

0.01uF

1 2 R1380

1 2 R1400

1

2

C236

0.01uF

1 2

R1390

HA15

HA16

HA17

HBE#4

HBE#5

HBE#6

HBE#7

CCS#

COE#

CADV#

HADSC#

CADS#

CA18

HCLKSRAM0

CRPU3

CRPD1

VCC

1

2

C238

1uF

HD44

HD45

HD46

HD47

HD48

HD49

HD50

HD51

HD52

HD53

HD54

HD55

HD56

HD57

HD58

HD59

HD60

HD61

HD62

HD63

VCC

STUFFING OPTION

HW/R#A

CTAG10A

NF2A

1 2

R1500

1 2

R1510

VDD1D

VDD2D

1

2

C241

3.3uF

1

2C239

0.01uF

1

2

C240

0.01uF

PCIRST#A 1 2 R1410

1 2 R1420

1 2 R1430

1

2

C242

1uF

HD[0..63]

1 2 R1341K

2,4,5

1 2 R1371K

1

2

R55

220

5

1 8

2 7

3 6

4 5

RP74

10K

CBWE#

CGWE#

CRPU3

CBURST_SEQ1

CPUVIO

PCIRST#

HW/R#

CTAG10

CRPU2

CRPU1

CBURST_SEQ2

CBURST_SEQ1

2,4,5

4,5

4,5,10,18,19

5

THIS DRAWING CONTAINS INFORMATION

WHICH HAS NOT BEEN VERIFIED FOR

MANUFACTURING AN END USER PRODUCT.

INTEL IS NOT RESPONSIBLE FOR THE

MISUSE OF THIS INFORMATION.

Date: June 19, 1997 Sheet 7 of 24

Size Document Number REV

C 82430HX B.1

Title

Memory Modules 0 & 1

INTEL CORP.

MODULE 1 (BANK 1)MODULE 0 (BANK 1)

MCAS#[0..7]

MRAS#[0..3]

MRAS#0

MRAS#1

4,8

1

TP23 1

TP923 1

TP25 1

TP26

MAA0

MAA1

MA[2..11]

MWE#

MA2

MA3

MA4

MA5

MA6

MA7

MA8

MA9

MA10

MA11

MCAS#0

MCAS#1

MCAS#2

MCAS#3

TP039

TP038

TP041

4

4,8

W-

47

RAS0-

44

RAS2-

34

CAS0-

40

CAS1-

43

CAS2-

41

CAS3-

42

A0

12

A1

13

A2

14

A3

15

A4

16

A5

17

A6

18

A7

28

A8

31

A9

32

ID1

67

ID2

68

ID3

69

ID4

70

VCC

10

DQ0 2

DQ1 4

DQ2 6

DQ3 8

DQ4 20

DQ5 22

DQ6 24

DQ7 26

DQ8/P0 36

DQ9 49

DQ10 51

DQ11 53

DQ12 55

DQ13 57

DQ14 61

DQ15 63

DQ16 65

DQ17/P1 37

DQ18 3

DQ19 5

DQ20 7

DQ21 9

DQ22 21

DQ23 23

DQ24 25

DQ25 27

DQ26/P2 35

DQ27 50

DQ28 52

DQ29 54

DQ30 56

DQ31 58

DQ32 60

DQ33 62

DQ34 64

DQ35/P3 38

VCC

30

VCC

59

RES1

11

RES2

46

RES5

71

A10

19

A11

29

RES3

48

RES4

66

RAS1-

45

RAS3-

33

U18

32MX36SIMV

MD0

MD1

MD2

MD3

MD4

MD5

MD6

MD7

MD8

MD9

MD10

MD11

MD12

MD13

MD14

MD15

MD16

MD17

MD18

MD19

MD20

MD21

MD22

MD23

MD24

MD25

MD26

MAA0

MAA1

W-

47

RAS0-

44

RAS2-

34

CAS0-

40

CAS1-

43

CAS2-

41

CAS3-

42

A0

12

A1

13

A2

14

A3

15

A4

16

A5

17

A6

18

A7

28

A8

31

A9

32

ID1

67

ID2

68

ID3

69

ID4

70

VCC

10

DQ0 2

DQ1 4

DQ2 6

DQ3 8

DQ4 20

DQ5 22

DQ6 24

DQ7 26

DQ8/P0 36

DQ9 49

DQ10 51

DQ11 53

DQ12 55

DQ13 57

DQ14 61

DQ15 63

DQ16 65

DQ17/P1 37

DQ18 3

DQ19 5

DQ20 7

DQ21 9

DQ22 21

DQ23 23

DQ24 25

DQ25 27

DQ26/P2 35

DQ27 50

DQ28 52

DQ29 54

DQ30 56

DQ31 58

DQ32 60

DQ33 62

DQ34 64

DQ35/P3 38

VCC

30

VCC

59

RES1

11

RES2

46

RES5

71

A10

19

A11

29

RES3

48

RES4

66

RAS1-

45

RAS3-

33

U19

32MX36SIMV

1

TP29

1

TP27 1

TP28

1

TP30

MD32

MD33

MD34

MD35

MD36

MD37

MD38

MD39

MD40

MD41

MD42

MD43

MD44

MD45

MD46

MD47

MD48

MD49

MD50

MD51

MD52

MD53

MD54

MD55

MD56

MD57

MD58

MA2

MA3

MA4

MA5

MA6

MA7

MA8

MA9

MA10

MA11

MCAS#4

MCAS#5

MCAS#6

MCAS#7

TP105

TP102

TP101

MP[0..7]

MD[0..63]

DRAMVCC

4,8

8,24

MD59

MD60

MD61

MD62

MD63

MP4

MP5

MP6

MP7

TP023

MP0

MP1

MP2

MP3

MD27

MD28

MD29

MD30

MD31

DRAM POWER

5 VOLTS 3.3 VOLTS

1-3,2-4 3-5,4-6

1 2

3 4

5 6

JB1

JB3

TP040

VCC

CPUVIO

THIS DRAWING CONTAINS INFORMATION

WHICH HAS NOT BEEN VERIFIED FOR

MANUFACTURING AN END USER PRODUCT.

INTEL IS NOT RESPONSIBLE FOR THE

MISUSE OF THIS INFORMATION.

Date: June 19, 1997 Sheet 8 of 24

Size Document Number REV

C 82430HX B.1

Title

Memory Modules 2 & 3

INTEL CORP.

MODULE 3 (BANK 2)MODULE 2 (BANK 2)

MCAS#[0..7]

MRAS#[0..3]

MRAS#2

MRAS#3

4,7

1

TP41 1

TP42 1

TP43 1

TP44

MAB0

MAB1

MA[2..11]

MWE#

MA2

MA3

MA4

MA5

MA6

MA7

MA8

MA9

MA10

MA11

MCAS#0

MCAS#1

MCAS#2

MCAS#3

TP112

TP111

TP110

4

4,7

W-

47

RAS0-

44

RAS2-

34

CAS0-

40

CAS1-

43

CAS2-

41

CAS3-

42

A0

12

A1

13

A2

14

A3

15

A4

16

A5

17

A6

18

A7

28

A8

31

A9

32

ID1

67

ID2

68

ID3

69

ID4

70

VCC

10

DQ0 2

DQ1 4

DQ2 6

DQ3 8

DQ4 20

DQ5 22

DQ6 24

DQ7 26

DQ8/P0 36

DQ9 49

DQ10 51

DQ11 53

DQ12 55

DQ13 57

DQ14 61

DQ15 63

DQ16 65

DQ17/P1 37

DQ18 3

DQ19 5

DQ20 7

DQ21 9

DQ22 21

DQ23 23

DQ24 25

DQ25 27

DQ26/P2 35

DQ27 50

DQ28 52

DQ29 54

DQ30 56

DQ31 58

DQ32 60

DQ33 62

DQ34 64

DQ35/P3 38

VCC

30

VCC

59

RES1

11

RES2

46

RES5

71

A10

19

A11

29

RES3

48

RES4

66

RAS1-

45

RAS3-

33

U20

32MX36SIMV

1

TP45 1

TP46

1

TP48

1

TP47

MD0

MD1

MD2

MD3

MD4

MD5

MD6

MD7

MD8

MD9

MD10

MD11

MD12

MD13

MD14

MD15

MD16

MD17

MD18

MD19

MD20

MD21

MD22

MD23

MD24

MD25

MD26

MAB0

MAB1

W-

47

RAS0-

44

RAS2-

34

CAS0-

40

CAS1-

43

CAS2-

41

CAS3-

42

A0

12

A1

13

A2

14

A3

15

A4

16

A5

17

A6

18

A7

28

A8

31

A9

32

ID1

67

ID2

68

ID3

69

ID4

70

VCC

10

DQ0 2

DQ1 4

DQ2 6

DQ3 8

DQ4 20

DQ5 22

DQ6 24

DQ7 26

DQ8/P0 36

DQ9 49

DQ10 51

DQ11 53

DQ12 55

DQ13 57

DQ14 61

DQ15 63

DQ16 65

DQ17/P1 37

DQ18 3

DQ19 5

DQ20 7

DQ21 9

DQ22 21

DQ23 23

DQ24 25

DQ25 27

DQ26/P2 35

DQ27 50

DQ28 52

DQ29 54

DQ30 56

DQ31 58

DQ32 60

DQ33 62

DQ34 64

DQ35/P3 38

VCC

30

VCC

59

RES1

11

RES2

46

RES5

71

A10

19

A11

29

RES3

48

RES4

66

RAS1-

45

RAS3-

33

U21

32MX36SIMV

MD32

MD33

MD34

MD35

MD36

MD37

MD38

MD39

MD40

MD41

MD42

MD43

MD44

MD45

MD46

MD47

MD48

MD49

MD50

MD51

MD52

MD53

MD54

MD55

MD56

MD57

MD58

MA2

MA3

MA4

MA5

MA6

MA7

MA8

MA9

MA10

MA11

MCAS#4

MCAS#5

MCAS#6

MCAS#7

TP103

TP107

TP108

MP[0..7]

MD[0..63] 4,7

4,7

MD59

MD60

MD61

MD62

MD63

MP4

MP5

MP6

MP7

TP113

MP0

MP1

MP2

MP3

MD27

MD28

MD29

MD30

MD31

DRAMVCC

TP109

7,24

THIS DRAWING CONTAINS INFORMATION

WHICH HAS NOT BEEN VERIFIED FOR

MANUFACTURING AN END USER PRODUCT.

INTEL IS NOT RESPONSIBLE FOR THE

MISUSE OF THIS INFORMATION.

Date: June 19, 1997 Sheet 9 of 24

Size Document Number REV

B 82430HX B.1

Title

System ROM

INTEL CORP.

MODE POS

1-2

2-3

PNP

NON-PNP

1

2

3

J12

JP3

+12V

1

2C36

O.1uF

1

2

R14

8.2K

FL_PNPPU

FL_VPP

VCC

MODE POS

NORMAL 1-2

RECOVERY 2-3

1

2

3

J11

JP3

SA16

SA16/17#

SA16/17

INSTALL IF

1M FLASH 1 2

R9

0

5 6

U2C

74HCT14S

INSTALL IF

2M FLASH 1 2 R6

0

SA[0..19]

ROMCS#

MEMW#

MEMR#

10,12,15,20,21

10

10,20,21

A16

1

A15

2

A14

3

A13

4

A12

5

A11

6

A10

36

A9

7

A8

8

A7

14

A6

15

A5

16

A4

17

A3

18

A2

19

A1

20

A0

21

PWD#

10

WE#

9

CE#

22 OE#

24

DQ7 35

DQ6 34

DQ5 33

DQ4 32

DQ3 28

DQ2 27

DQ1 26

DQ0 25

VPP 11

A17

40

NC 13

NC 29

NC 37

NC 38

U6

28F002BXTSOP

SA16

SA15

SA14

SA13

SA12

SA11

SA10

SA9

SA8

SA7

SA6

SA5

SA4

SA3

SA2

SA1

SA0

BIOSMSB

SA17

A16

2

A15

3

A14

29

A13

28

A12

4

A11

25

A10

23

A9

26

A8

27

A7

5

A6

6

A5

7

A4

8

A3

9

A2

10

A1

11

A0

12

PWD#

30

WE#

31

CE#

22 OE#

24

DQ7 21

DQ6 20

DQ5 19

DQ4 18

DQ3 17

DQ2 15

DQ1 14

DQ0 13

VPP 1

U7

28F001BX

SA15

SA14

SA13

SA12

SA11

SA10

SA9

SA8

SA7

SA6

SA5

SA4

SA3

SA2

SA1

SA0

XD0

XD1

XD2

XD3

XD4

XD5

XD6

XD7

XD0

XD1

XD2

XD3

XD4

XD5

XD6

XD7

ALLOWS PROGRAMMING

OF BOOT BLOCK IN

MANUFACTURING

OPTIONAL 2MB FLASH

1 2

R10

8.2K

O

1

J3

JP1

F002CE#

FL2MPU

VCC

12

13 11

U16D

74ALS32S

XD[0..7]

XOE#

15,16

10,16

THIS DRAWING CONTAINS INFORMATION

WHICH HAS NOT BEEN VERIFIED FOR

MANUFACTURING AN END USER PRODUCT.

INTEL IS NOT RESPONSIBLE FOR THE

MISUSE OF THIS INFORMATION.

Date: June 19, 1997 Sheet 10 of 24

Size Document Number REV

B 82430HX B.1

Title

PIIX3

INTEL CORP.

A1

2 B1 18

A2

3 B2 17

A3

4 B3 16

A4

5 B4 15

A5

6 B5 14

A6

7 B6 13

A7

8 B7 12

A8

9 B8 11

G

19

DIR

1

U14

74ALS245

A1

2 B1 18

A2

3 B2 17

A3

4 B3 16

A4

5 B4 15

A5

6 B5 14

A6

7 B6 13

A7

8 B7 12

A8

9 B8 11

G

19

DIR

1

U17

74ALS245

SA8

SA9

SA10

SA11

SA12

SA13

SA14

SA15

SA16

SA17

SA18

SA[8..19]

BALE

AEN

SOE#

SDIR

DD0

DD7

DD6

DD5

DD4

DD3

DD2

DD1

DD8

DD9

DD10

DD14

DD15

DD[0..15]

4

9,10,12,15,20,21

20,21

12,20

11,20,21

1 2 R45

22

PAR

PHOLD#

LA[17..23]

SA[0..7]

LA17

LA18

LA19

LA20

LA21

LA22

LA23

SA0

SA1

SA2

SA3

SA4

SA5

SA6

SA7

BALER

AENR

SYSCLKR

VCC

1 2

R34 22

4,18,19,21

PCICLK

132

AD0

206

AD1

205

AD2

204

AD3

203

AD4

202

AD5

201

AD6

200

AD7

199

AD8

197

AD9

194

AD10

193

AD11

192

AD12

191

AD13

190

AD14

189

AD15

188

AD16

177

AD17

176

AD18

175

AD19

174

AD20

173

AD21

172

AD22

171

AD23

168

AD24

166

AD25

165

AD26

164

AD27

163

AD28

162

AD29

161

AD30

160

AD31

159

C/BEO-

198

C/BE1-

187

C/BE2-

178

C/BE3-

167

FRAME-

179

TRDY-

181

IRDY-

180

STOP-

185

IDSEL

154

DEVSEL-

184

PIRQA-

149

PIRQB-

150

PIRQC-

151

PIRQD-

152

SERR-

3

PHLDA-

110

IRQ1

4

IRQ3

58

IRQ4

56

IRQ5

34

IRQ6

33

IRQ7

32

IRQ8-

5

IRQ9

10

IRQ10

73

IRQ11

75

IRQ12/M

77

IRQ14

83

IRQ15

81

FERR-

120

EXTSMI-

125

DREQ0

87

DREQ1

30

DREQ2

12

DREQ3

25

DREQ5

91

DREQ6

95

DREQ7

99

IOCS16-

71

IOCHK-

6

ZEROWS-

15

DD0/SA8

55

DD1/SA9

50

DD2/SA10

49

DD3/SA11

48

DD4/SA12

47

DD5/SA13

46

DD6/SA14

45

DD7/SA15

44

DD8/SA16

43

DD9/SA17

41

DD10/SA18

40

DD11/SA19

39

DD12/SBHE-

38

DD13

37

DD14/APICCS-

36

DD15/PCS-

35

DDRQ0

108

DDRQ1

111

TESTIN-/APICREQ- 134

PWROK

126

OSC

136

PAR 186

PHOLD- 109

SYSCLK 153

BALE 64

AEN 20

LA17/DA0 86

LA18/DA1 84

LA19/DA2 82

LA20/CS3P 80

LA21/CS1P 76

LA22/CS3S 74

LA23/CS1S 72

SA0 69

SA1 68

SA2 67

SA3 66

SA4 63

SA5 61

SA6 59

SA7 57

USBP0+ 144

USBP1+ 142

USBP0- 145

USBP1- 143

MIRQ0 147

USBCLK 146

MEMCS16- 70

MEMR- 88

MEMW- 90

SMEMR- 19

SMEMW- 22

IOCHRDY 18

IOR- 23

IOW- 24

SD0 17

SD1 16

SD2 14

SD3 13

SD4 11

SD5 9

SD6 8

SD7 7

SD8 92

SD9 94

SD10 96

SD11 98

SD12 100

SD13 101

SD14 102

SD15 107

INTR 122

SMI- 123

STPCLK- 124

DACK0- 85

DACK1- 29

DACK2- 60

DACK3- 21

DACK5- 89

DACK6- 93

DACK7- 97

TC 62

REFRESH- 31

SPKR 117

XDIR- 141

XOE- 140

RTCALE 148

NMI 135

IGNNE- 121

PCIRST-/APICACK- 128

INIT 129

RSTDRV 28

IORDY 114

DIOR- 113

DIOW- 112

DDAK0- 115

DDAK1- 116

SOE- 119

SDIR 118

VCC/VCC3 130

BIOSCS- 137

RTCCS- 138

KBCS- 139

CPURST 127

U15

PIIX3_0.2

PCLKPIIX3

PIIX3OSC

AD[0..31]

PWROK

AD0

AD1

AD2

AD3

AD4

AD5

AD6

AD7

AD8

AD9

AD10

AD11

AD12

AD13

AD14

AD15

AD16

AD17

AD18

AD19

AD20

33

4,18,19

17

C/BE#[0..3]

FRAME#

TRDY#

IRDY#

STOP#

DEVSEL#

SERR#

PHLDA#

PIRQ#[0..3]

AD21

AD22

AD23

AD24

AD25

AD26

AD27

AD28

AD29

AD30

AD31

PXIDSELAD18

C/BE#0

C/BE#1

C/BE#2

C/BE#3

PIRQ#0

PIRQ#1

PIRQ#2

PIRQ#3

1 2

R51

220

4,18,19,21

4

4,18,19,21

4,18,19

18,19,21

1

2R48

10K

USBP0-

USBP0+

USBP1-

USBP1+

MIRQ0

MEMCS16#

IOCHRDY

SD[0..15]

SD0

SD1

SD2

SD3

SD4

SD5

SD6

SD7

SD8

SD9

SD10

MEMWR#

SMEMWR#

MEMRR#

SMEMRR#

IORR#

IOWR#

13

INSTALL FOR PIIX

1 2 R32

22

1 2 R44

22

1 2 R33

22

1 2

R46

22

1 2 R42

22

1 2 R40

22

1 2

R53

0

USBCLK MEMW#

SMEMW#

MEMR#

SMEMR#

IOR#

IOW#

DD11

DD12

VCC

CPUVIO

3 9,20,21

9,20,21

11,21

20,21 20,21

20,21

12,20,21

16,20,21

12,16,20,21

1 8 2 7 3 6 4 5 RP57

10K

SBHE#

SA19

DDSAPU1

DDSAPU2

DDSAPU3

DDSAPU4

SYSCLKR

VCC

20,21

CLOSE = CLK/4

OPEN = CLK/3

1 2

R50

22

1 8

2 7

3 6

4 5

RP59

10K

1

2

J28

JP2

11 10

U27E

7407S

SYSCLK 20

INSTALL FOR PIIX3

INSTALL FOR PIIX

1 2

R39

0

1 2

U2A

74HCT14S

12

13 11

U11D

74ALS08S

T/C

RSTDRV

DIVCLK

PWROK

VCC

12,20

12

21

SPKR

HINTR

HSMI#

HSTPCLK#

HNMI

HIGNNE#

DACK#[0..7]

REFRESH#

ROMCS#

RTCCS#

ROM_KB#

XDIR#

XOE#

RTCALE

SD11

SD12

SD13

SD14

SD15

T/CR

PBFVCC

DACK#0

DACK#1

DACK#2

DACK#3

DACK#5

DACK#6

DACK#7

1 2 R3522

2

22

9,16

9

17 20,21

16

15

16

IOCS16#

IOCHK#

IRQ[0..15]

HFERR#

EXTSMI#

0WS#

DD[0..15]

DRQ[0..7]

IRQ1

IRQ3

IRQ4

IRQ5

IRQ6

IRQ7

IRQ8

IRQ9

IRQ10

IRQ11

IRQ12

IRQ14

IRQ15

DD0

DRQ0

DRQ1

DRQ2

DRQ3

DRQ5

DRQ6

DRQ7

2

20,21

11,12,15,16,20,21

17

12,20,21

11,21

12,20,21

DDRQ[0..1] DDRQ0

DDRQ1

DD1

DD2

DD3

DD4

DD5

DD6

DD7

DD8

DD9

DD10

DD11

DD12

DD13

DD14

DD15

THIS DRAWING CONTAINS INFORMATION

WHICH HAS NOT BEEN VERIFIED FOR

MANUFACTURING AN END USER PRODUCT.

INTEL IS NOT RESPONSIBLE FOR THE

MISUSE OF THIS INFORMATION.

11

HRESET

PCIRST#

PIIX3INIT

ICHRDY

SOE#

IIOR#R

IIOW#R

TESTIN#

SDIR

DDAK0

DDAK1

11

VCC

1 2

R43

4.7K

2

4..6,18,19

4

RSTDRV#

RSTISA

11,15

20

Date: June 19, 1997 Sheet 11 of 24

Size Document Number REV

B 82430HX B.1

Title

PCI IDE Interface

INTEL CORP.

1 8 2 7 3 6 4 5 RP20

22

1 8 2 7 3 6 4 5 RP22

22

1 8 2 7 3 6 4 5 RP23

22

IDA7

IDA6

IDA5

IDA4

IDA3

DD8

DD9

DD11

DD12

DD7

DD6

DD5

DD4

DD3

DD10

1 2

3 4

5 6

7 8

9 10

11 12

13 14

15 16

17 18

19 20

21 22

23 24

25 26

27 28

29 30

31 32

33 34

35 36

37 38

39 40

J20

IDA8

IDA9

IDA10

IDA11

IDA12

IDA13

IDA14

IDA15

PRIMARY IDE

1 8 2 7 3 6 4 5 RP49

1.0K IDA7

IDA6

IDA5

IDA4

IDA3

IDA2

IDA1

IDA0

IIOWA#

IRSTA#

DRQ0R

SDDRQ1

SDDAK1

VCC

1 8

2 7

3 6

4 5

RP37

33

1

2

R31

5.6K

1

2R30

5.6K

DD[0..15]

DDRQ0

DDRQ1

DDAK1

IRQ14

DDAK0

ICHRDY

RSTDRV#

10,12,15,16,20,21

10,11

10

10,21

10,15

10

1 2 R28

47

1 2

R47

47

1 2

R29

47

1 2

R49

47

12

13 11

U12D

74ALS00S

LA[17..23]

SOE#

IIOW#R

IIOR#R

LA21

IIOWA#

IIOWB#

IIORA#

IIORB#

10,20,21

10

1 8 2 7 3 6 4 5 RP32

33 HDACTA#

CS1P#

IDB7

IDB6

IDB5

IDB4

IDB3

IDB2

IRSTB#

IIORA#

SDDAK0

PINTERRUPT

IDA1A

IDA0A

ICS1A#

17

1 TP78

1 TP76

1 2

3 4

5 6

7 8

9 10

11 12

13 14

15 16

17 18

19 20

21 22

23 24

25 26

27 28

29 30

31 32

33 34

35 36

37 38

39 40

J23

IDB8

IDB9

IDB10

IDB11

IDB12

IDB13

TP116

TP117

PIDEPU

IDA2A

ICS3A#

SECONDARY IDE

1 8 2 7 3 6 4 5 RP25

22

1 8 2 7 3 6 4 5 RP43

22

1 8 2 7 3 6 4 5 RP63

10K

IDA2

IDA1

IDA0

DD13

DD14

DD15

DD2

DD1

DD0

IDB7

IDB6

DD8

DD9

DD7

DD6

PIDEPU

SIDEPU

HDACTA#

HDACTB#

VCC

1 8 2 7 3 6 4 5 RP46

22

1 8 2 7 3 6 4 5 RP50

22

1 8 2 7 3 6 4 5 RP54

22

1 8

2 7

3 6

4 5

RP41

33

IDB5

IDB4

IDB3

IDB2

IDB1

IDB0

DD11

DD12

DD13

DD14

DD15

DD5

DD4

DD3

DD2

DD1

DD0

DD10

DA2IDA2B

ICS3B# CS3S#

IRSTB# RSTDRV#

1 TP77

1 TP75

1 8 2 7 3 6 4 5 RP55

4.7K

IDB14

IDB15

TP115

TP114

SIDEPU

IDA2B

ICS3B#

DD15

DD14

DD0

VCC

1 8 2 7 3 6 4 5 RP62

33 HDACTB#

CS3P#

DA0

DA1

DA2

CS1S#

IDB1

IDB0

IIOWB#

IIORB#

SDDRQ1

SDDAK1

SINTERRUPT

IDA1B

IDA0B

ICS1B#

17

9

10 8

U12C

74ALS00S

4

5 6

U12B

74ALS00S

4

5 6

U11B

74ALS08S

1

2 3

U11A

74ALS08S

9

10 8

U11C

74ALS08S

LA20

LA17

LA18

LA19

LA23

1

2 3

U12A

74ALS00S

MIRQ0

LA22

THIS DRAWING CONTAINS INFORMATION

WHICH HAS NOT BEEN VERIFIED FOR

MANUFACTURING AN END USER PRODUCT.

INTEL IS NOT RESPONSIBLE FOR THE

MISUSE OF THIS INFORMATION.

10,21

CS3S# 1 8 2 7 3 6 4 5 RP51

4.7K

1 8 2 7 3 6 4 5 RP47

4.7K

1 8 2 7 3 6 4 5 RP44

4.7K

DD11

DD12

DD10

DD9

DD8

DD7

DD6

DD5

DD4

DD3

DD1

DD2 1 8

2 7

3 6

4 5

RP36

33

IDA2A

ICS3A#

DA2

CS3P#

ICS1A# CS1P#

Date: June 19, 1997 Sheet 12 of 24

Size Document Number REV

B 82430HX B.1

Title

AIP

INTEL CORP.

SIDE1#

DSKCHG# 13

SA10

17

SA9

15

SA8

12

SA7

10

SA6

8

SA5

7

SA4

5

SA3

4

SA2

3

SA1

2

SA0

1

SD7

32

SD6

31

SD5

30

SD4

29

SD3

27

SD2

26

SD1

25

SD0

24

NOWS-

23

IOCHRDY

22

AEN

21

IOWC-

20

IORC-

19

IO16-

96

TC

6

PPDREQ

100

PPDACK-

99

FDDREQ

98

FDDACK-

97

IRQ7

18

IRQ6

16

IRQ5

13

IRQ4

11

IRQ3

9

RSTDRV

33

X2

64

X1/OSC

63

DSKCHG- 74

HDSEL- 75

RDDATA- 76

WP- 77

TRK0- 78

WE- 79

WRDATA- 80

STEP- 81

DIR- 82

FDME1- 83

FDS0- 84

FDS1- 85

FDME0- 86

INDX- 87

DRVDEN1 90

DRVDEN0 89

RIB- 50

DTRB- 49

CTSB- 48

SOUTB 47

RTSB- 46

SINB 45

DSRB- 44

DCDB- 43

RIA- 42

DTRA- 41

CTSA- 40

SOUTA 39

RTSA- 38

SINA 37

DSRA- 36

DCDA- 35

PD7 55

PD6 56

PD5 57

PD4 58

PD3 60

PD2 65

PD1 67

PD0 69

STROBE- 71

AUTOFD- 70

INIT- 66

SELECTIN- 61

FAULT- 68

ACK- 54

BUSY 53

PERROR 52

SELECT 51

PPDIR/GCS- 72

IDECS1- 91

IDECS0- 92

HEN- 94

DEN- 95

U8

82091AA

SA10

SA9

SA[0..19]

SD[0..15]

DACK#[0..7]

9,10,15,20,21

10,16,20,21

10,20

1

2

R18

4.7K

T/C

XIOW#

XIOR#

AEN

0WS#

IOCHRDY

10,20,21

10,20

10,20,21

10,20

15,16

SA8

SA7

SA6

SA5

SA4

SA3

SA2

SA1

SA0

SD7

SD6

SD5

SD4

SD3

SD2

SD1

SD0

DACK#5

IO16_PU

DRQ5

VCC

DSR0#

RX0

CTS0#

RI0#

RX1

INDEX#

TRK0#

WPT#

RDATA#

DSR1#

CTS1#

RI1#

WDATA#

STEP#

DIR#

WGATE#

MOTEA#

DRVSA#

MOTEB#

DRVSB#

DRATE0

FDDEN

RTS0#

TX1

RTS1#

DCD1#

13

13 13

13

13 13

13

TX0

DTR0#

DTR1#

13

1

2

R17

10K

1

2

R12

10K

PDR[0..7] 14

1

2R13

10K

1

2

R15

10K

1 TP32

1 TP31

1 TP84

1

2

R16

10K

ERR#

ACK#

BUSY

PE

SLCT

DCD0#

STB#R

AFD#R

INIT#R

SLIN#R

PPDIR

AIPDEN#

TP034

TP035

TP036

PDR7

PDR6

PDR5

PDR4

PDR3

PDR2

PDR1

PDR0

14

13

14

DACK#2

IRQ7

IRQ6

IRQ5

IRQ4

IRQ3

DRQ2

TP037

1

TP68

RSTDRV

AIPCLK

3

10

THIS DRAWING CONTAINS INFORMATION

WHICH HAS NOT BEEN VERIFIED FOR

MANUFACTURING AN END USER PRODUCT.

INTEL IS NOT RESPONSIBLE FOR THE

MISUSE OF THIS INFORMATION.

IRQ[0..15]

DRQ[0..7]

10,11,15,16,20,21

10,20,21

Date: June 19, 1997 Sheet 13 of 24

Size Document Number REV

B 82430HX B.1

Title

Serial Ports, Floppy

INTEL CORP.

COM 0

HEADER

1

2

3

4

5

6

7

8

9

10

J18

1

2C49

100pF

1

2C55

100pF

1

2C66

100pF

1

2C56

100pF

1

2C53

100pF

1

2C74

100pF

1

2C63

100pF

1

2C75

100pF

SP_RI0

SP_DTR0

SP_CTS0

SP_TXD0

SP_RTS0

SP_RXD0

SP_DSR0

SP_DCD0

12

12 12

12

DCD0#

DSR0#

RX0

RTS0#

TX0

CTS0#

DTR0#

RI0#

SP_DSR0

SP_RXD0

SP_RTS0

SP_TXD0

SP_CTS0

SP_DTR0

SP_RI0

SP_DCD0

VCC+12V

-12V

VCC+

1 VCC 20

GND 11

VCC-

10

RA

2

RA

3

RA

4

DY

5

DY

6

RA

7

DY

8

RA

9 RY 12

DA 13

RY 14

DA 15

DA 16

RY 17

RY 18

RY 19

U10

GD75232SOP

DSR1#

DCD1#

RX1

CTS1#

DTR1#

RI1#

RTS1#

TX1

SP_DCD1

SP_RXD1

SP_TXD1

SP_RTS1

SP_CTS1

SP_DTR1

SP_RI1

SP_DSR1

-12V

VCC+

1 VCC 20

GND 11

VCC-

10

RA

2

RA

3

RA

4

DY

5

DY

6

RA

7

DY

8

RA

9 RY 12

DA 13

RY 14

DA 15

DA 16

RY 17

RY 18

RY 19

U9

GD75232SOP

USB

HEADER

2

1

L8

2

1

L11

1

2

F3

1.25A

1

2

F2

1.25A

USBVFB0USBVFB1

VCCVCC

12

1

2C29

100pF

1

2C21

100pF

1

2C38

100pF

1

2C25

100pF

1

2C31

100pF

1

2C42

100pF

1

2C32

100pF

1

2C45

100pF

SP_RI1

SP_DTR1

SP_CTS1

SP_TXD1

SP_RTS1

SP_RXD1

SP_DSR1

SP_DCD1

VCC

COM 1

HEADER

1

2

3

4

5

6

7

8

9

10

J10

HEADER

INTERFACE

FLOPPY

12 34 56 78 910 1112 1314 1516 1718 1920 2122 2324 2526 2728 2930 3132 3334

J21

TP075

1

2

R22

1.0K

1

TP69

2

1

L9

1 8 2 7 3 6 4 5 RP42

1K

FDDEN

INDEX#

MOTEA#

DRVSB#

DRVSA#

MOTEB#

DIR#

STEP#

WDATA#

WGATE#

TRK0#

WPT#

RDATA#

SIDE1#

DSKCHG#

DRATE0

USB1FB

12

1 2

3 4

5 6

7 8

9 10

11 12

13 14

15 16

J19

1

2C61

470pF

1

2C72

470pF

2

1

L10

1

2C82

470pF

1

2C84

470pF

2

1

L12

1

2

R26

30

1

2

R21

30

1

2C85

47pF

1

2C83

47pF

USBV0

USBV1

USBG1

USBG0

USBD0-

USBD0+

USBD1-

USBD1+

1

2R20

30

1

2

R19

30

1

2C79

47pF

USBP1-

USBP1+

USBP0-

USBP0+

10

1

2C71

47pF

THIS DRAWING CONTAINS INFORMATION

WHICH HAS NOT BEEN VERIFIED FOR

MANUFACTURING AN END USER PRODUCT.

INTEL IS NOT RESPONSIBLE FOR THE

MISUSE OF THIS INFORMATION.

Date: June 19, 1997 Sheet 14 of 24

Size Document Number REV

B 82430HX B.1

Title

Parallel Port

INTEL CORP.

1

2

C20

180pF

1

2

C48

180pF

1

2

C16

180pF

1

2

C51

180pF

2

3

D1

IN4148

VCC

1 8 2 7 3 6 4 5 RP2

33

1 8 2 7 3 6 4 5 RP11

33

PDR[0..7]

AFD#R

STB#R

INIT#R

SLIN#R

PDR0

PDR1

PDR2

12

1 8

2 7

3 6

4 5

RP4

1K

1 8

2 7

3 6

4 5

RP8

1K

PAR5VOLTS

1

2

C27

180pF

1

2

C52

180pF

1

2

C24

180pF

1

2

C54

180pF

1

2

C30

180pF

1

2

C62

180pF

1

2

C28

180pF

PARALLEL

HEADER

1 2

3 4

5 6

7 8

9 10

11 12

13 14

15 16

17 18

19 20

21 22

23 24

25 26

J9

STB#

PD0

PD1

PD2

PD3

PD4

PD5

PD6

PD7

ACK#

BUSY

PE

SLCT

AFD#

ERR#

INIT#

SLIN#

1

2

C64

180pF

1

2

C40

180pF

1

2

C65

180pF

1

2

C37

180pF

1

2

C73

180pF

1 8

2 7

3 6

4 5

RP7

1K

1 8

2 7

3 6

4 5

RP15

1K

1 8

2 7

3 6

4 5

RP9

1K

1 8 2 7 3 6 4 5 RP13

33

ACK#

BUSY

PE

SLCT

ERR#

PDR3

PDR4

PDR5

PDR6

PDR7

12

THIS DRAWING CONTAINS INFORMATION

WHICH HAS NOT BEEN VERIFIED FOR

MANUFACTURING AN END USER PRODUCT.

INTEL IS NOT RESPONSIBLE FOR THE

MISUSE OF THIS INFORMATION.

1

2

C41

180pF

Date: June 19, 1997 Sheet 15 of 24

Size Document Number REV

B 82430HX B.1

Title

Keyboard/Mouse Interface

INTEL CORP.

KEYLOCK#

VCC

17

1 8

2 7

3 6

4 5

RP3

4.7K

1 8 2 7 3 6 4 5 RP1

10K

VCC

VDD

29

TEST0

2

TEST1

43

XTAL1

3

XTAL2

4

RESET-

5

SS-

6

CS-

7

EA

8

RD-

9

A0

10

WR-

11

D0

14

D1

15

D2

16

D3

17

D4

18

D5

19

D6

20

D7

21

P10 30

P11 31

P12 32

P13 33

P14 35

P15 36

P16 37

P17 38

P20 24

P21 25

P22 26

P23 27

P24/OBF 39

P25/IBF- 40

P26/DRQ 41

P27/DAK- 42

PROG 28

SYNC 13

U5

8242PCPL

XIOR#

SA2

XIOW#

RSTDRV#

ROM_KB#

KBD_CLK

XD0

XD1

XD2

XD3

XD4

XD5

XD6

XD7

EA_PD

KB_XT1

KBCLK#

MSCLK#

KBDSS#

1

2

R11

220

1

2

R3

220

3

9,10,12,20,21

10

10,11

12,16

1 TP95

PU_CLCMOS

TP042

KBDAT#

MSDAT#

KEYLOCK#

PU_MFGTST

PASSWDCLR#

KB_PU1

MSECLK

MSEDAT

COLOR

KBDCLK

KBDDAT

VCC

21

JUMPER B

1-2

INCLEAR

PASSWORD

CLEAR

PASSWORD POS

JUMPER

1 8

2 7

3 6

4 5

RP5

10K

2

1J4

JP2

FUSE 1

2

1

L7

1

2

F1

1.25A

KBRST#

HA20M#

IRQ1

IRQ12

VCC

F

U

S

E

1

2

4

10..12,15,16,20,21

KEYBOARD

CONNECTOR

1

2

3

4

5

6

7

8

9

J2

1

2

3

4

5

6

7

8

9

J1

1

TP90

1

TP91

1

TP92

1

TP93

1

2C10

0.1uF

TP045

TP046

TP044

TP043

QUIETGND1

KB5V_FB

OUTNORMAL

2 1

L5

2 1

L6

2 1

L4

KBCLK_FB#

KBDAT_FB#

MSDAT_FB#

MSCLK_FB#

1 2

U4A

7406S

3 4

U4B

7406S

5 6

U4C

7406S

XD[0..7]

9,16

THIS DRAWING CONTAINS INFORMATION

WHICH HAS NOT BEEN VERIFIED FOR

MANUFACTURING AN END USER PRODUCT.

INTEL IS NOT RESPONSIBLE FOR THE

MISUSE OF THIS INFORMATION.

9 8

U4D

7406S

2 1

L3

1

2C17

470pf

1

2C18

470Pf

1

2C13

470Pf

1

2C12

470Pf

MOUSE

CONNECTOR

2

1

L2

2

1

L1

QUIETGND2

Date: June 19, 1997 Sheet 16 of 24

Size Document Number REV

B 82430HX B.1

Title

BATTERY;RTC CICUIT

INTEL CORP.

12,15

1 2

R1

220

1 2

R4

220

XIOR#

IOR#PD

IOW#PD

2 3

1

U3A

74LS125S

IOR#

10,20,21

RTCCS#

IOW#

RTCALE

10,20,21

10

4

5 6

U16B

74ALS32S

XIOW#

VCC

5 6

4

U3B

74LS125S

1 2

R36

220 MOT

1

CS-

13

AS

14

R/W-

15

DS

17

RESET-

18

AD0

4

AD1

5

AD2

6

AD3

7

AD4

8

AD5

9

AD6

10

AD7

11

SQW 23

IRQ- 19

RSV1 21

RSV2 22

X1 2

X2 3

BC 20

U13

DS12887A

RTC_MOT

12,15

1

2

R38

10K

1 TP103

VCC

JUMPER POS

CLEAR CMOS IN

NORMAL OUT

1 TP104

1 TP99

2 1 J24

JP2

1 TP100

1 TP101

10..12,15,20,21

XD[0..7]

IRQ8

XD0

XD1

XD2

XD3

XD4

XD5

XD6

XD7

RTCRST#

RTCRD#

RTCWR#

TP051

TP050

RTCCEIN#

TP049

TP048

TP047

9,15

1 2

R41

10K

9

10 8

U16C

74ALS32S

A1

2 B1 18

A2

3 B2 17

A3

4 B3 16

A4

5 B4 15

A5

6 B5 14

A6

7 B6 13

A7

8 B7 12

A8

9 B8 11

G

19 DIR

1 U1

74ALS245S

XDIR#

XOE#

XD7

XD6

XD5

XD4

XD3

XD2

XD1

XD0

SD7

SD6

SD5

SD4

SD3

SD2

SD1

SD0

10

PWROK#

9,10

17

SD[0..7]

THIS DRAWING CONTAINS INFORMATION

WHICH HAS NOT BEEN VERIFIED FOR

MANUFACTURING AN END USER PRODUCT.

INTEL IS NOT RESPONSIBLE FOR THE

MISUSE OF THIS INFORMATION.

10,12,20,21

Date: June 19, 1997 Sheet 17 of 24

Size Document Number REV

B 82430HX B.1

Title

Front Panel

INTEL CORP.

POWER LED

KEYLOCK

1

2

3

4

5

J33

1

2

C198

470pF

PON

1 2

R60

220

1

2

C210

470pF

KEYLOCK#

VCC

15

SPEAKER

1 2 R127

68

1 2 R126

68

1

2C220

0.1 uF

1

2

3

4

J36

1

TP98

BUZZ2

TP888

VCC

1 2 R128

2.2K

1

2

3

Q8

2N3904

SPKR SPK1

SPK2

10

3 4

U27B

7407S

HARD DRIVE LED

5 6

U27C

7407S

1

2

3

4

J32

1

2

R59

220

EXTSMI#

HARDDRV

HDRV1

VCC

10 EXTSMI SWITCH

1

2C149

0.22uF

1

2

R58

220

1

2

J31

JP2

2

3D3

1N4148

VCC

CPU COOLING FAN

1

2

C167

470pF

1

2

J34

JP2

+12V

1 2 R7

33

PWROK#

PWROK 10

16

RESET SWITCH

1 2

R124

100

13 12

U2F

74HCT14S

11 10

U2E

74HCT14S

1

2

J35

PWROKR

RSTSW1

1

2

R8

10K

HDACTB#

POWER_GOOD

PWRGD1

VCC

9 8

1

0

U3C

74LS125S

11

1

2

3

4

5

6

J5

1

2

3

4

5

6

J13

HDACTA#

VCC

-5V

-12V +12V

11

1

2

3

4

5

6

J22

+3_3V

THIS DRAWING CONTAINS INFORMATION

WHICH HAS NOT BEEN VERIFIED FOR

MANUFACTURING AN END USER PRODUCT.

INTEL IS NOT RESPONSIBLE FOR THE

MISUSE OF THIS INFORMATION.

1

2C8

10uF 1

2C216

4.7nF

Date: June 19, 1997 Sheet 18 of 24

Size Document Number REV

C 82430HX B.1

Title

PCI Slots 0 and 1

INTEL CORP.

PIRQ#[0..3]

C/BE#[0..3]

AD[0..31]

4,10,19

10,19,21

1

TP111

1

TP110

1

TP109

1

2C67

0.1uF

1

2

C57

0.1UF

B2

B3

B4

B5

B6

B7

B8

B9

B10

B11

B12

B13

B14

B15

B16

B17

B18

B19

B20

B21

B22

B23

B24

B25

B26

B27

B28

B29

B30

B31

B32

B33

B34

B35

B36

B37

B38

B39

B40

B41

B42

B43

B44

B45

B46

B47

B48

B49

B52

B53

B54

B55

B56

B57

B58

B59

B60

A1

A2

A3

A4

A5

A6

A7

A8

A9

A10

A11

A12

A13

A14

A15

A16

A17

A18

A19

A20

A21

A22

A23

A24

A25

A26

A27

A28

A29

A30

A31

A32

A33

A34

A35

A36

A37

A38

A39

A40

A41

A42

A43

A44

A45

A46

A47

A48

A49

A52

A53

A54

A55

A56

A57

A58

A59

A60

B1

B61

B62 A61

A62

J14

CN120ED05B

PCLK0

PREQ#0

PCIA0

PCIA1

AD31

AD29

AD27

AD25

PIRQ#1

PIRQ#3

TP054

TP055

TP056

VCC

-12V

+3_3V

3

4,18,19,21

1 TP105

1 TP106

1 TP107

1 TP108

1

2

C58

0.1UF

1

2C68

0.1UF

PCIRST#

PGNT#0

PIRQ#0

PIRQ#2

AD30

AD28

AD26

TP063

TP062

TP061

TP060

AD28

VCC

+12V

+3_3V

4..6,10,19

4,18,19,21

1

2

R54

5.6K

PTRST# 19

1

TP112

1

TP118

1

TP113

B2

B3

B4

B5

B6

B7

B8

B9

B10

B11

B12

B13

B14

B15

B16

B17

B18

B19

B20

B21

B22

B23

B24

B25

B26

B27

B28

B29

B30

B31

B32

B33

B34

B35

B36

B37

B38

B39

B40

B41

B42

B43

B44

B45

B46

B47

B48

B49

B52

B53

B54

B55

B56

B57

B58

B59

B60

A1

A2

A3

A4

A5

A6

A7

A8

A9

A10

A11

A12

A13

A14

A15

A16

A17

A18

A19

A20

A21

A22

A23

A24

A25

A26

A27

A28

A29

A30

A31

A32

A33

A34

A35

A36

A37

A38

A39

A40

A41

A42

A43

A44

A45

A46

A47

A48

A49

A52

A53

A54

A55

A56

A57

A58

A59

A60

B1

B61

B62 A61

A62

J15

CN120ED05B

PCLK1

PREQ#1

AD31

AD29

AD27

AD25

PIRQ#2

PIRQ#0

PCIB0

PCIB1

TP057

TP058

TP059

VCC

-12V

+3_3V

3

4,18,19,21 1 TP117

1 TP116

1 TP115

1 TP114

PCIRST#

PGNT#1

AD30

AD28

AD26

PIRQ#1

PIRQ#3

TP067

TP066

TP065

TP064

AD29

VCC

+12V

+3_3V

4..6,10,19

4,18,19,21

PTRST#

FRAME#

TRDY#

STOP#

SDONE

SBO#

PAR

REQ64S#1

AD24

AD22

AD20

AD18

AD16

AD15

AD13

AD11

AD9

AD6

AD4

AD2

AD0

C/BE#0

PCIB2 1 2

R23

220

4,10,19,21

18,19,21

19,21

IRDY#

DEVSEL#

PLOCK#

PERR#

SERR#

ACK64S#1

AD23

AD21

AD19

AD17

AD14

AD12

AD10

AD8

AD7

AD5

AD3

AD1

C/BE#3

C/BE#2

C/BE#1

4,10,19,21

4,19,21

4,10,19,21

18,19,21

19,21

1 2

R27

220

REQ64S#0

PAR

SBO#

STOP#

TRDY#

FRAME#

C/BE#0

AD24

AD22

AD20

AD18

AD16

AD15

AD13

AD11

AD9

AD6

AD4

AD2

AD0

PCIA2

SDONE

4,10,19,21

18,19,21

19,21

ACK64S#0

SERR#

PERR#

PLOCK#

DEVSEL#

IRDY#

AD23

AD21

AD19

AD17

AD14

AD12

AD10

AD8

AD7

AD5

AD3

AD1

C/BE#1

C/BE#2

C/BE#3

4,10,19,21

4,19,21

4,10,19,21

18,19,21

19,21

THIS DRAWING CONTAINS INFORMATION

WHICH HAS NOT BEEN VERIFIED FOR

MANUFACTURING AN END USER PRODUCT.

INTEL IS NOT RESPONSIBLE FOR THE

MISUSE OF THIS INFORMATION.

Date: June 19, 1997 Sheet 19 of 24

Size Document Number REV

C 82430HX B.1

Title

PCI Slots 2 and 3

INTEL CORP.

PIRQ#[0..3]

C/BE#[0..3]

AD[0..31]

4,10,18

10,18,21

PTRST#18

B2

B3

B4

B5

B6

B7

B8

B9

B10

B11

B12

B13

B14

B15

B16

B17

B18

B19

B20

B21

B22

B23

B24

B25

B26

B27

B28

B29

B30

B31

B32

B33

B34

B35

B36

B37

B38

B39

B40

B41

B42

B43

B44

B45

B46

B47

B48

B49

B52

B53

B54

B55

B56

B57

B58

B59

B60

A1

A2

A3

A4

A5

A6

A7

A8

A9

A10

A11

A12

A13

A14

A15

A16

A17

A18

A19

A20

A21

A22

A23

A24

A25

A26

A27

A28

A29

A30

A31

A32

A33

A34

A35

A36

A37

A38

A39

A40

A41

A42

A43

A44

A45

A46

A47

A48

A49

A52

A53

A54

A55

A56

A57

A58

A59

A60

B1

B61

B62 A61

A62

J16

CN120ED05B

1

TP123

1

TP124

1

TP125

1

2

C59

1

2C69

0.1uF

PCLK2

PREQ#2

PCIC0

PCIC1

AD31

AD29

AD27

AD25

AD23

C/BE#3

PIRQ#3

PIRQ#1

TP069

TP070

TP071

VCC

-12V

+3_3V

3

4,18,19,21

1 2

R24

220

1 TP122

1 TP121

1 TP120

1 TP119

1

2

C60

0.1UF

1

2C70

0.1UF

PCIRST#

PGNT#2

PIRQ#2

PIRQ#0

AD30

AD28

AD26

AD24

AD22

TP068

TP078

TP077

TP076

PCIC2

AD30

VCC

+12V

+3_3V

4..6,10,18

4,18,19,21

B2

B3

B4

B5

B6

B7

B8

B9

B10

B11

B12

B13

B14

B15

B16

B17

B18

B19

B20

B21

B22

B23

B24

B25

B26

B27

B28

B29

B30

B31

B32

B33

B34

B35

B36

B37

B38

B39

B40

B41

B42

B43

B44

B45

B46

B47

B48

B49

B52

B53

B54

B55

B56

B57

B58

B59

B60

A1

A2

A3

A4

A5

A6

A7

A8

A9

A10

A11

A12

A13

A14

A15

A16

A17

A18

A19

A20

A21

A22

A23

A24

A25

A26

A27

A28

A29

A30

A31

A32

A33

A34

A35

A36

A37

A38

A39

A40

A41

A42

A43

A44

A45

A46

A47

A48

A49

A52

A53

A54

A55

A56

A57

A58

A59

A60

B1

B61

B62 A61

A62

J17

CN120ED05B

1

TP126

1

TP132

1

TP127

PCLK3

PREQ#3

AD31

AD29

AD27

AD25

AD23

C/BE#3

PIRQ#0

PIRQ#2

PCID0

PCID1

TP072

TP073

TP074

VCC

-12V

+3_3V

3

4,18,19,21

1 TP128

1 TP129

1 TP130

1 TP131

PCIRST#

PGNT#3

AD30

AD28

AD26

AD24

AD22

PIRQ#3

PIRQ#1

TP082

TP081

TP080

TP079

PCID2

AD31

VCC

+12V

+3_3V

1 2

R25

220

4..6,10,18

4,18,19,21

FRAME#

TRDY#

STOP#

SDONE

SBO#

PAR

REQ64S#3

AD20

AD18

AD16

AD15

AD13

AD11

AD9

AD6

AD4

AD2

AD0

C/BE#0

4,10,18,21

18,19,21

18,21

IRDY#

DEVSEL#

PLOCK#

PERR#

SERR#

ACK64S#3

AD21

AD19

AD17

AD14

AD12

AD10

AD8

AD7

AD5

AD3

AD1

C/BE#2

C/BE#1

4,10,18,21

4,18,21

4,10,18,21

18,19,21

18,21

REQ64S#2

PAR

SBO#

STOP#

TRDY#

FRAME#

C/BE#0

AD20

AD18

AD16

AD15

AD13

AD11

AD9

AD6

AD4

AD2

AD0

SDONE

4,10,18,21

18,19,21

18,21

ACK64S#2

SERR#

PERR#

PLOCK#

DEVSEL#

IRDY#

AD21

AD19

AD17

AD14

AD12

AD10

AD8

AD7

AD5

AD3

AD1

C/BE#1

C/BE#2

4,10,18,21

4,18,21

4,10,18,21

18,19,21

18,21

THIS DRAWING CONTAINS INFORMATION

WHICH HAS NOT BEEN VERIFIED FOR

MANUFACTURING AN END USER PRODUCT.

INTEL IS NOT RESPONSIBLE FOR THE

MISUSE OF THIS INFORMATION.

Date: June 19, 1997 Sheet 20 of 24

Size Document Number REV

C 82430HX B.1

Title

ISA Slots 0, 1 and 2

INTEL CORP.

IRQ[3..15]

DRQ[0..7]

DACK#[0..7]

10..12,15,16,21

10,12

10,12,21

RSTISA

0WS#

SMEMW#

SMEMR#

IOW#

IOR#

REFRESH#

SYSCLK

T/C

BALE

OSC

MEMCS16#

IRQ9

IRQ7

IRQ6

IRQ5

IRQ4

IRQ3

DRQ2

DRQ3

DACK#3

DACK#1

DACK#2

DRQ1

VCC

-5V

-12V

+12V

3

10,21

10,12,21

10,21

10,16,21

10,12

10,21

10

A1 A1

A2 A2

A3 A3

A4 A4

A5 A5

A6 A6

A7 A7

A8 A8

A9 A9

A10 A10

A11 A11

A12 A12

A13 A13

A14 A14

A15 A15

A16 A16

A17 A17

A18 A18

A19 A19

A20 A20

A21 A21

A22 A22

A23 A23

A24 A24

A25 A25

A26 A26

A27 A27

A28 A28

A29 A29

A30 A30

A31 A31

C1 C1

C2 C2

C3 C3

C4 C4

C5 C5

C6 C6

C7 C7

C8 C8

C9 C9

C10 C10

C11 C11

C12 C12

C13 C13

C14 C14

C15 C15

C16 C16

C17 C17

C18 C18

B1

B2

B3

B4

B5

B6

B7

B8

B9

B10

B11

B12

B13

B14

B15

B16

B17

B18

B19

B20

B21

B22

B23

B24

B25

B26

B27

B28

B29

B30

B31

D1

D2

D3

D4

D5

D6

D7

D8

D9

D10

D11

D12

D13

D14

D15

D16

D17

D18

J7

CD98ED10B

SD7

SD6

SD5

SD4

SD3

SD2

SD1

SD0

SA19

SA18

SA17

SA16

SA15

SA14

SA13

SA12

SA11

SA10

SA9

SA8

SA7

SA6

SA5

SA4

SA3

SA2

SA1

SA0

SBHE#

AEN

IOCHRDY

IOCHK#

IRQ9

IRQ7

IRQ6

IRQ5

IRQ4

IRQ3

DRQ2

DRQ3

DRQ1

DACK#3

DACK#1

DACK#2

RSTISA

0WS#

SMEMW#

SMEMR#

IOW#

IOR#

REFRESH#

SYSCLK

T/C

BALE

OSC

MEMCS16#

VCC

-5V

-12V

+12V

A1 A1

A2 A2

A3 A3

A4 A4

A5 A5

A6 A6

A7 A7

A8 A8

A9 A9

A10 A10

A11 A11

A12 A12

A13 A13

A14 A14

A15 A15

A16 A16

A17 A17

A18 A18

A19 A19

A20 A20

A21 A21

A22 A22

A23 A23

A24 A24

A25 A25

A26 A26

A27 A27

A28 A28

A29 A29

A30 A30

A31 A31

C1 C1

C2 C2

C3 C3

C4 C4

C5 C5

C6 C6

C7 C7

C8 C8

C9 C9

C10 C10

C11 C11

C12 C12

C13 C13

C14 C14

C15 C15

C16 C16

C17 C17

C18 C18

B1

B2

B3

B4

B5

B6

B7

B8

B9

B10

B11

B12

B13

B14

B15

B16

B17

B18

B19

B20

B21

B22

B23

B24

B25

B26

B27

B28

B29

B30

B31

D1

D2

D3

D4

D5

D6

D7

D8

D9

D10

D11

D12

D13

D14

D15

D16

D17

D18

J6

CD98ED10B

SD7

SD6

SD5

SD4

SD3

SD2

SD1

SD0

SA19

SA18

SA17

SA16

SA15

SA14

SA13

SA12

SA11

SA10

SA9

SA8

SA7

SA6

SA5

SA4

SA3

SA2

SA1

SA0

IOCHK#

IOCHRDY

AEN

SBHE#

IRQ9

IRQ7

IRQ6

IRQ5

IRQ4

IRQ3

DRQ2

DRQ3

DRQ1

DACK#3

DACK#1

DACK#2

RSTISA

0WS#

SMEMW#

SMEMR#

IOW#

IOR#

REFRESH#

SYSCLK

T/C

BALE

OSC

MEMCS16#

SD7

SD6

SD5

SD4

SD3

SD2

SD1

SD0

SA19

SA18

SA17

SA16

SA15

SA14

SA13

SA12

SA11

SA10

SA9

SA8

SA7

SA6

SA5

SA4

SA3

SA2

SA1

SA0

VCC

-5V

-12V

+12V

A1 A1

A2 A2

A3 A3

A4 A4

A5 A5

A6 A6

A7 A7

A8 A8

A9 A9

A10 A10

A11 A11

A12 A12

A13 A13

A14 A14

A15 A15

A16 A16

A17 A17

A18 A18

A19 A19

A20 A20

A21 A21

A22 A22

A23 A23

A24 A24

A25 A25

A26 A26

A27 A27

A28 A28

A29 A29

A30 A30

A31 A31

C1 C1

C2 C2

C3 C3

C4 C4

C5 C5

C6 C6

C7 C7

C8 C8

C9 C9

C10 C10

C11 C11

C12 C12

C13 C13

C14 C14

C15 C15

C16 C16

C17 C17

C18 C18

B1

B2

B3

B4

B5

B6

B7

B8

B9

B10

B11

B12

B13

B14

B15

B16

B17

B18

B19

B20

B21

B22

B23

B24

B25

B26

B27

B28

B29

B30

B31

D1

D2

D3

D4

D5

D6

D7

D8

D9

D10

D11

D12

D13

D14

D15

D16

D17

D18

J8

CD98ED10B

SBHE#

AEN

IOCHRDY

IOCHK# 10,21

10,12

10,12,21

10,21

MEMR#

MEMW#

LA[17..23]

SA[0..19]

SD[0..15]

9,10,12,15,21

9,10,21

10,11,21

10,12,16,21

SD15

SD13

SD14

SD12

SD11

SD10

SD9

SD8

LA23

LA22

LA21

LA20

LA19

LA18

LA17 MEMR#

MEMW#

IRQ10

IRQ11

IRQ12

IRQ15

IRQ14

DRQ0

DRQ5

DRQ6

DRQ7

DACK#0

DACK#5

DACK#6

DACK#7

IOCS16#

MASTER#

SD8

SD9

SD10

SD11

SD12

SD13

SD14

SD15

LA23

LA22

LA21

LA20

LA19

LA18

LA17

SD10

SD11

SD12

SD13

SD14

SD15

SD8

SD9

LA23

LA22

LA21

LA20

LA19

LA18

LA17

MEMW#

MEMR#

IRQ10

IRQ11

IRQ12

IRQ15

IRQ14

DRQ0

DRQ5

DRQ6

DRQ7

DACK#0

DACK#5

DACK#6

DACK#7

IOCS16#

MASTER#

IOCS16#

MASTER#

IRQ10

IRQ11

IRQ12

IRQ15

IRQ14

DRQ0

DRQ5

DRQ6

DRQ7

DACK#0

DACK#5

DACK#6

DACK#7

10,21

21

THIS DRAWING CONTAINS INFORMATION

WHICH HAS NOT BEEN VERIFIED FOR

MANUFACTURING AN END USER PRODUCT.

INTEL IS NOT RESPONSIBLE FOR THE

MISUSE OF THIS INFORMATION.

Date: June 19, 1997 Sheet 21 of 24

Size Document Number REV

B 82430HX B.1

Title

Pullup/Pulldown Resistors

INTEL CORP.

STOP#

IOR#

IOW#

LA[17..23]

LA17

LA18

LA19

LA20

LA21

LA22

LA23

4,10,18,19

10,16,20

1 8

2 7

3 6

4 5

RP34

2.7K

1 8

2 7

3 6

4 5

RP39

2.7K

1 8

2 7

3 6

4 5

RP17

10K

SD[0..15]

SD0

SD1

SD2

SD3

SD4

SD5

SD6

SD7

SD11

SD10

SD9

SD8

VCC 10,11,20

1 8

2 7

3 6

4 5

RP10

10K

1 8

2 7

3 6

4 5

RP6

10K

1 8

2 7

3 6

4 5

RP52

10K

VCC

10,20

10,12,16,20

1 8

2 7

3 6

4 5

RP31

10K

1 8

2 7

3 6

4 5

RP29

10K

1 8

2 7

3 6

4 5

RP27

10K

IRQ[0..15]

BALE

SA[0..19]

SA0

SA1

SA2

SA3

SA4

SA5

SA6

SA7

SA8

IRQ3

IRQ4

VCC

9,10,12,15,20

10..12,15,16,20

1 8

2 7

3 6

4 5

RP24

10K

1 8

2 7

3 6

4 5

RP21

10K

1 8

2 7

3 6

4 5

RP18

10K

1 8

2 7

3 6

4 5

RP16

10K

PU_CLCMOS

SA9

SA10

SA11

SA12

SA13

SA14

SA15

SA16

SA17

SA18

SA19

IRQ5

IRQ6

IRQ7

IRQ9

1 8

2 7

3 6

4 5

RP58

10K

1 8

2 7

3 6

4 5

RP48

5.6K

1 8

2 7

3 6

4 5

RP19

5.6K

DRQ[0..7]

10,12,20

15

1 8

2 7

3 6

4 5

RP14

10K

1 8

2 7

3 6

4 5

RP28

2.7K

1 8

2 7

3 6

4 5

RP26

2.7K

1 8

2 7

3 6

4 5

RP35

330

SD12

SD13

SD15

SD14

DRQ7

DRQ6

DRQ5

DRQ0

DRQ1

DRQ3

DRQ2

SMEMW#

SMEMR#

PERR#

PLOCK#

SBO#

DEVSEL#

TRDY#

IRDY#

FRAME#

REFRESH#

0WS#

IOCS16#

MEMCS16#

DIVCLK

SDONE 4,18,19

4,10,18,19

10,20

10,12,20

10,20

10,16,20

10,20

10

18,19

MASTER#

IOCHRDY

IOCHK#

DD13

10,20

10,12,20

10,11

20

1 8

2 7

3 6

4 5

RP56

330

1 8

2 7

3 6

4 5

RP60

1.0K

1 8

2 7

3 6

4 5

RP53

4.7K

PAR

SERR#

PIRQ#2

PIRQ#3

PIRQ#0

PIRQ#1

ACK64S#2

ACK64S#3

4,10,18,19

1 8

2 7

3 6

4 5

RP12

2.7K

1 8

2 7

3 6

4 5

RP30

2.7K

PREQ#[0..3]

PIRQ#[0..3]

ACK64S#[0..3]

REQ64S#[0..3]

VCC

VCC 18,19

18,19

9,10,20

10,18,1910,11

10,20

4,18,19

1 8

2 7

3 6

4 5

RP61

10K

1 8

2 7

3 6

4 5

RP40

10K

1 8

2 7

3 6

4 5

RP45

10K

MEMW#

MEMR#

SBHE#

MIRQ0

IRQ1

IRQ8

IRQ11

IRQ10

IRQ12

IRQ14

IRQ15

CPUVIO

1 8 2 7 3 6 4 5 RP65

2.7K

PGNT#[0..3]

PGNT#3

PGNT#2

PGNT#1

PGNT#0

THIS DRAWING CONTAINS INFORMATION

WHICH HAS NOT BEEN VERIFIED FOR

MANUFACTURING AN END USER PRODUCT.

INTEL IS NOT RESPONSIBLE FOR THE

MISUSE OF THIS INFORMATION.

4,18,19

1 8 2 7 3 6 4 5 RP64

2.7K

1 8

2 7

3 6

4 5

RP38

2.7K

1 8 2 7 3 6 4 5 RP33

2.7K

PREQ#0

PREQ#1

PREQ#2

PREQ#3

ACK64S#1

ACK64S#0

REQ64S#2

REQ64S#3

REQ64S#0

REQ64S#1

Date: June 19, 1997 Sheet 22 of 24

Size Document Number REV

B 82430HX B.1

Title

Switching Power Supply

INTEL CORP.

1-2 2-3

VRE STD

1

TP52

1 2

R109

0

1

2

3

J26

JP3

VRREF

TP030

VIO2

VCC

1 2

R85

18.7K

1 2

R113

965

1 2

R108

1.5K

1 2

R105

1.27K

S_0

1

S_1

2

S_2

3

G_0

4 D_0 5

D_1 6

D_2 7

D_3 8

Q2

SI4410DY

1 TP564

REF

VFB

TP053

RAWVIO

+12V

VIN

5

LBIN

13 PINV

3

SHDM

11

ITH

7

CT

6

BINH

4

SGND

12 PGND 15

BDRIVE 16

SENSE- 8

SENSE+ 9

TDRIVE 1

LBOUT 14

VFB_NC 10

PWRVIN 2

U30

LTC1266XS

1 2

C190

3300pF

1 2

C189

500pF

1

TP565

1 TP568

TP052

REFR

VCC

GNDS 5

GNDF 6

COMP

2 REF 8

RMID 7

COL

1

V+

3

RTOP

4

Q1

LT1431CS

1

TP567

1

TP566

1 2

R112

33K

1 2

C223

0.1uF

TP033

TP032

TP098

+12V

1 2

C184

120pF 1

2

C168

1uF

ITH

CT

1 2

L14

2.2uH

1 2

R117

100

1 2

R118

100

S_0

2

S_1

3

G_0

4 D_0 5

D_1 6

D_2 7

D_3 8

Q4

SI9410DY

1 2

C203

1nF

1 2

R121

0.03

1 2

R123

0.03

2 1

D2

1N5820

1

2C176

0.1uF

LRAWVIO

SENSE

SENSE#

RAWVIO

TDRIVE

6.3v

1

2

C182

220uF

1

2

C214

220uF

1

2

C215

220uF

1

2

C169

220uF

1

2

C185

220uF

1

2

C191

220uF

1

2

C183

220uF

CPUVIO

JUMPER

1-2, 3-4,

5-6, 7-8

NONE

CPU

TYPE

P55C

P54C

1

2

3

Q3

IRFZ40

BDRIVE

Z40DRVR

1 2

3 4

5 6

7 8

JB3

JB4

1

2R120

910

1

2R119

910

1

2R129

910

1 2

R116

22

1

2C222

0.01uF

1 2

3

Q6

2N3906SOT23

1

2

3

Q5

2N3904SOT23

1

2R125

47K

COREB2E

Z40DRV

+12V

C

O

M

P

1

2

C225

1uF

CORECATH

CATH

1

A_0

2

A_1

3 A_2 6

A_3 7

P 8

Q7

TL431ACS

VCOREREFIN

THIS DRAWING CONTAINS INFORMATION

WHICH HAS NOT BEEN VERIFIED FOR

MANUFACTURING AN END USER PRODUCT.

INTEL IS NOT RESPONSIBLE FOR THE

MISUSE OF THIS INFORMATION.

1 2

R122

220

1

2C208

100uF

1

2C211

100uF

1

2C192

100uF

1

2C181

100uF

CPUVCORE

HEAT SINK

1 1

2 2

HS1

6021PB

1 TP570

1 TP569

TP028

TP031

Date: June 19, 1997 Sheet 23 of 24

Size Document Number REV

B 82430HX B.1

Title

Fiducials, Holes, Spare Gates

INTEL CORP.

1 H3

H120

1 H4

H158

1 H1

H120

1 H2

H120

1

MH4

MH9UV157

1

MH5

MH9UV157

1

MH7

MH9UV157

1

MH8

MH9UV157

1

MH1

MH9UV157

1

MH2

MH9UV157

1 GF1

FM200B 1 GF2

FM200B

1 FM4

FM200B 1 FM5

FM200B

1 FM7

FM200B 1 FM8

FM200B

11 10

U4E

7406S

1 TP929

TP100

1

MH6

MH9UV157

1

MH9

MH9UV157

1 GF3

FM200B

1 FM6

FM200B

1 FM9

FM200B

9 8

U2D

74HCT14S

1 TP931

TP106

13 12

U27F

7407S

1 TP926

TP104

SPARES

13 12

U4F

7406S

1 TP930

TP099

THIS DRAWING CONTAINS INFORMATION

WHICH HAS NOT BEEN VERIFIED FOR

MANUFACTURING AN END USER PRODUCT.

INTEL IS NOT RESPONSIBLE FOR THE

MISUSE OF THIS INFORMATION.

Date: June 19, 1997 Sheet 24 of 24

Size Document Number REV

B 82430HX B.1

Title

Decoupling Capacitors

INTEL CORP.

1 2

C91

0.1uF

1 2

C122

0.1uF

1 2

C110

0.1uF

1 2

C123

0.1uF

1 2

C107

0.1uF

-5V

1

2C7

10uF

1 2

C175

100uF

1 2

C148

100uF

DRAMVCC

CPUVIO

7,8

1 2

C96

0.1uF

1 2

C99

0.1uF

1 2

C93

0.01uF

1 2

C138

0.01uF

1 2

C101

0.01uF

1 2

C128

0.01uF

1 2

C126

0.01uF

1 2

C108

0.01uF

1 2

C86

10uF

VCC

+3_3V

1 2

C112

0.1uF

1 2

C111

0.1uF

1 2

C26

0.1uF

1 2

C6

0.1uF

1 2

C44

0.1uF

1 2

C100

0.1uF

1 2

C3

0.1uF

1 2

C77

0.1uF

1 2

C135

0.1uF

1 2

C116

0.1uF

1 2

C152

0.1uF

1 2

C113

0.1uF

VCCVCC

1 2

C139

0.1uF

1 2

C5

0.1uF

1 2

C104

0.1uF

1 2

C19

0.1uF

1 2

C137

0.1uF

1 2

C120

0.1uF

1 2

C34

0.1uF

1 2

C151

0.1uF

1 2

C140

0.1uF

1 2

C1

0.1uF

1 2

C2

0.1uF

1 2

C105

0.1uF

1 2

C88

0.1uF

1 2

C98

0.1uF

1 2

C95

0.1uF

1 2

C87

0.1uF

1 2

C97

0.1uF

1 2

C102

0.1uF

1 2

C106

0.01uF

1 2

C78

0.01uF

1 2

C80

0.01uF

1 2

C94

0.01uF

1 2

C92

0.01uF

1 2

C4

0.001uF

1 2

C170

0.1uF

1 2

C153

0.1uF

1 2

C156

0.1uF

1 2

C127

0.1uF

1 2

C141

0.1uF

1 2 C204

0.1uF

1 2

C132

100uF

1 2

C109

0.001uF

1 2

C90

0.001uF

1 2

C121

0.001uF

1 2

C89

0.001uF

1 2

C133

0.001uF

1 2

C226

0.01uF

CPUVCORECPUVIO

1 2

C171

0.1uF

1 2

C202

0.001uF

1 2

C197

0.001uF

1 2

C166

0.001uF

1 2

C165

0.001uF

1 2

C124

0.001uF

1 2

C114

0.001uF

1 2

C11

10uF

1 2

C125

10uF

1 2

C47

10uF

1 2

C119

10uF

1 2

C23

10uF

1 2

C50

0.1uF

1 2

C224

0.1uF

+12V

-12V

1 2

C103

0.1uF

1 2

C15

0.1uF

1 2

C76

0.1uF

1 2

C115

0.1uF

1 2

C81

0.1uF

1 2

C129

0.1uF

1 2

C33

0.1uF

1 2

C35

0.1uF

1 2

C43

0.1uF

1 2

C117

0.1uF

1 2

C118

0.1uF

1 2

C150

0.1uF

THIS DRAWING CONTAINS INFORMATION

WHICH HAS NOT BEEN VERIFIED FOR

MANUFACTURING AN END USER PRODUCT.

INTEL IS NOT RESPONSIBLE FOR THE

MISUSE OF THIS INFORMATION.

1 2

C39

10uF

1 2

C134

10uF

1 2

C9

100uF

1 2

C46

0.1uF

1 2

C14

0.1uF

1 2

C22

10uF

Date: June 19, 1997 Sheet 25 of 24

Size Document Number REV

A T2 B.1

Title

Root Schematic

INTEL CORP.

|LINK

Root schematic for netlisting

multiple flat files.

|T2_2.SCH

|T2_3.SCH

|T2_4.SCH

|T2_5.SCH

|T2_1.SCH

|T2_6.SCH

|T2_7.SCH

|T2_8.SCH

|T2_9.SCH

|T2_10.SCH

|T2_11.SCH

|T2_12.SCH

|T2_13.SCH

|T2_14.SCH

|T2_15.SCH

|T2_16.SCH

|T2_17.SCH

|T2_18.SCH

|T2_19.SCH

|T2_20.SCH

|T2_21.SCH

|T2_22.SCH

|T2_23.SCH

|T2_24.SCH

THIS DRAWING CONTAINS INFORMATION

WHICH HAS NOT BEEN VERIFIED FOR

MANUFACTURING AN END USER PRODUCT.

INTEL IS NOT RESPONSIBLE FOR THE

MISUSE OF THIS INFORMATION.

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