IRF8707PbF Datasheet. Www.s Manuals.com. 20071024 Irf

User Manual: Marking of electronic components, SMD Codes F8, F8*, F8**, F8113, F8707. Datasheets BZX585-C4V7, EMF8, IRF8113, IRF8707PbF, PZU4.3B1, RT8016-12GQW, TC1073-2.85VCH713 , UMF8N.

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PD - 96118A

IRF8707PbF
HEXFET® Power MOSFET

Applications
Control MOSFET of Sync-Buck
Converters used for Notebook
Processor Power
l Control MOSFET for Isolated
DC-DC Converters in Networking
Systems
l

VDSS
30V

Benefits
l
l
l
l
l
l
l

Very Low Gate Charge
Very Low RDS(on) at 4.5V VGS
Ultra-Low Gate Impedance
Fully Characterized Avalanche Voltage
and Current
20V VGS Max. Gate Rating
100% tested for Rg
Lead-Free

RDS(on) max

Qg

11.9m:@VGS = 10V 6.2nC
A
A
D

S

1

8

S

2

7

D

S

3

6

D

G

4

5

D

SO-8

Top View

Description
The IRF8707PbF incorporates the latest HEXFET Power MOSFET Silicon Technology into the
industry standard SO-8 package. The IRF8707PbF has been optimized for parameters that are
critical in synchronous buck operation including Rds(on) and gate charge to reduce both conduction
and switching losses. The reduced total losses make this product ideal for high efficiency DC-DC
converters that power the latest generation of processors for notebook and Netcom applications.

Absolute Maximum Ratings
Parameter

Max.

VDS

Drain-to-Source Voltage

30

VGS

Gate-to-Source Voltage
Continuous Drain Current, VGS @ 10V

± 20
9.1

IDM

Continuous Drain Current, VGS @ 10V
Pulsed Drain Current

ID @ TA = 25°C
ID @ TA = 70°C

Units
V

11

c

A

88

PD @TA = 25°C

Power Dissipation

2.5

PD @TA = 70°C

Power Dissipation

1.6

TJ

Linear Derating Factor
Operating Junction and

TSTG

Storage Temperature Range

W

0.02
-55 to + 150

W/°C
°C

Thermal Resistance
Parameter

RθJL
RθJA

Notes  through

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g
Junction-to-Ambient fg
Junction-to-Drain Lead

Typ.

Max.

–––

20

–––

50

Units
°C/W

are on page 9

1
10/24/07

IRF8707PbF
Static @ TJ = 25°C (unless otherwise specified)
Parameter
BVDSS
∆ΒVDSS/∆TJ

Min. Typ. Max. Units
30

–––

–––

Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance

–––
–––

0.022
9.3

–––
11.9

Gate Threshold Voltage

–––
1.35

14.2
1.80

17.5
2.35

IDSS

Gate Threshold Voltage Coefficient
Drain-to-Source Leakage Current

–––
–––

-5.8
–––

IGSS

Gate-to-Source Forward Leakage

–––
–––

–––
–––

Gate-to-Source Reverse Leakage
Forward Transconductance

–––
25

–––
–––

mV/°C VDS = VGS, ID = 25µA
VDS = 24V, VGS = 0V
µA
VDS = 24V, VGS = 0V, TJ = 125°C
150
VGS = 20V
100
nA
-100
VGS = -20V
–––
S VDS = 15V, ID = 8.8A

Total Gate Charge
Pre-Vth Gate-to-Source Charge

–––
–––

6.2
1.4

9.3
–––

Post-Vth Gate-to-Source Charge
Gate-to-Drain Charge

–––
–––

0.7
2.2

–––
–––

Qgodr
Qsw

Gate Charge Overdrive
Switch Charge (Qgs2 + Qgd)

–––
–––

1.9
2.9

–––
–––

Qoss
Rg

Output Charge
Gate Resistance

–––
–––

3.7
2.2

–––
3.7

td(on)
tr

Turn-On Delay Time
Rise Time

–––
–––

6.7
7.9

–––
–––

td(off)
tf

Turn-Off Delay Time
Fall Time

–––
–––

7.3
4.4

–––
–––

Ciss
Coss

Input Capacitance
Output Capacitance

–––
–––

760
170

–––
–––

Crss

Reverse Transfer Capacitance

–––

82

–––

RDS(on)
VGS(th)
∆VGS(th)

gfs
Qg
Qgs1
Qgs2
Qgd

V

Conditions

Drain-to-Source Breakdown Voltage

VGS = 0V, ID = 250µA

V/°C Reference to 25°C, ID = 1mA
VGS = 10V, ID = 11A
mΩ
VGS = 4.5V, ID = 8.8A
V VDS = VGS, ID = 25µA

e
e

–––
1.0

VDS = 15V
nC

VGS = 4.5V
ID = 8.8A
See Figs. 15 & 16

nC
Ω

ns

pF

VDS = 16V, VGS = 0V
VDD = 15V, VGS = 4.5V
ID = 8.8A

RG = 1.8Ω
See Fig. 18
VGS = 0V
VDS = 15V
ƒ = 1.0MHz

Avalanche Characteristics
EAS

Parameter
Single Pulse Avalanche Energy

IAR

Avalanche Current

c

d

Typ.
–––

Max.
53

Units
mJ

–––

8.8

A

Diode Characteristics
Parameter

Min. Typ. Max. Units

Conditions

IS

Continuous Source Current

–––

–––

ISM

(Body Diode)
Pulsed Source Current

–––

–––

VSD

(Body Diode)
Diode Forward Voltage

–––

–––

1.0

V

p-n junction diode.
TJ = 25°C, IS = 8.8A, VGS = 0V

trr
Qrr

Reverse Recovery Time
Reverse Recovery Charge

–––
–––

12
13

18
20

ns
nC

TJ = 25°C, IF = 8.8A, VDD = 15V
di/dt = 300A/µs

ton

Forward Turn-On Time

2

c

3.1

A

88

A

MOSFET symbol

D

showing the
integral reverse

G
S

e

e

Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

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IRF8707PbF
100

100

10
BOTTOM

VGS
10V
5.0V
4.5V
3.5V
3.0V
2.7V
2.5V
2.3V

TOP

1

≤60µs PULSE WIDTH

0.1

Tj = 25°C

ID, Drain-to-Source Current (A)

ID, Drain-to-Source Current (A)

TOP

10

BOTTOM

VGS
10V
5.0V
4.5V
3.5V
3.0V
2.7V
2.5V
2.3V

1

2.3V

≤60µs PULSE WIDTH

2.3V

Tj = 150°C

0.01

0.1

0.1

1

10

100

0.1

V DS, Drain-to-Source Voltage (V)

10

100

Fig 2. Typical Output Characteristics

Fig 1. Typical Output Characteristics

2.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)

100

ID, Drain-to-Source Current (A)

1

V DS, Drain-to-Source Voltage (V)

T J = 150°C

10

T J = 25°C

1

VDS = 15V
≤60µs PULSE WIDTH
2

3

4

5

VGS, Gate-to-Source Voltage (V)

Fig 3. Typical Transfer Characteristics

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VGS = 10V

1.5

1.0

0.5

0.1
1

ID = 11A

6

-60 -40 -20 0

20 40 60 80 100 120 140 160

T J , Junction Temperature (°C)

Fig 4. Normalized On-Resistance
vs. Temperature

3

IRF8707PbF
10000

5.0

VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd

VGS, Gate-to-Source Voltage (V)

ID= 8.8A

C, Capacitance (pF)

C oss = C ds + C gd

1000

Ciss

Coss
Crss

100

VDS= 24V
VDS= 15V

4.0

3.0

2.0

1.0

10

0.0
1

10

100

0

VDS, Drain-to-Source Voltage (V)

3

4

5

6

7

8

Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage

1000

ID, Drain-to-Source Current (A)

1000

ISD, Reverse Drain Current (A)

2

QG, Total Gate Charge (nC)

Fig 5. Typical Capacitance vs.
Drain-to-Source Voltage

100

OPERATION IN THIS AREA
LIMITED BY R DS(on)

100

T J = 150°C
10
T J = 25°C
1

1msec

0.1

100µsec

10
10msec

1

T A = 25°C
Tj = 150°C
Single Pulse

VGS = 0V
0.1
0.4

0.6

0.8

1.0

1.2

VSD, Source-to-Drain Voltage (V)

Fig 7. Typical Source-Drain Diode
Forward Voltage

4

1

1.4

0

1

10

100

VDS, Drain-to-Source Voltage (V)

Fig 8. Maximum Safe Operating Area

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IRF8707PbF
12
VGS(th) , Gate Threshold Voltage (V)

2.5

ID, Drain Current (A)

10
8
6
4
2

2.2

1.9

1.6

50

75

100

125

ID = 25µA

1.3

0
25

ID = 250µA

1.0

150

-75 -50 -25

T A , Ambient Temperature (°C)

0

25

50

75 100 125 150

T J , Temperature ( °C )

Fig 9. Maximum Drain Current vs.
Ambient Temperature

Fig 10. Threshold Voltage vs. Temperature

Thermal Response ( Z thJA ) °C/W

100
D = 0.50
0.20
0.10
0.05
0.02
0.01

10

1

SINGLE PULSE
( THERMAL RESPONSE )

0.1

PDM
τJ

0.01

R1
R1
τJ
τ1

R2
R2

R3
R3

R4
R4
τA

τ1

τ2

τ2

τ3

τ3

τ4

τ4

Ci= τi/Ri
Ci= τi/Ri

0.001
1E-006

1E-005

0.0001

0.001

τA

Ri (°C/W)

τi (sec)

2.2284

0.000169

7.0956

0.013738

25.4895

0.68725

15.1981

25.8

0.01

t1
t2
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJA + TA

0.1

1

10

100

t1 , Rectangular Pulse Duration (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient

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5

IRF8707PbF
250
EAS , Single Pulse Avalanche Energy (mJ)

RDS(on), Drain-to -Source On Resistance (m Ω)

35
ID = 11A
30
25
20
TJ = 125°C

15

T J = 25°C

10

ID
0.67A
0.82A
BOTTOM 8.80A
TOP

200

150

100

5

50

0

2

4

6

8

10

12

14

16

18

20

25

50

75

100

125

150

Starting T J , Junction Temperature (°C)

VGS, Gate -to -Source Voltage (V)

Fig 13. Maximum Avalanche Energy
vs. Drain Current

Fig 12. On-Resistance vs. Gate Voltage

V(BR)DSS
tp

15V

L

VDS

DUT

DRIVER

0
D.U.T

RG

IAS
20V

L

tp

0.01Ω

+
- VDD

1K
20K

VCC

S

A

I AS

Fig 15. Gate Charge Test Circuit

Fig 14. Unclamped Inductive Test Circuit
and Waveform
Id

Vds
Vgs

Vgs(th)

Qgodr

Qgd

Qgs2 Qgs1

Fig 16. Gate Charge Waveform

6

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IRF8707PbF
D.U.T

Driver Gate Drive

ƒ
+

-

-

„

*

D.U.T. ISD Waveform
Reverse
Recovery
Current

+


RG

•
•
•
•

dv/dt controlled by RG
Driver same type as D.U.T.
I SD controlled by Duty Factor "D"
D.U.T. - Device Under Test

V DD

P.W.
Period
VGS=10V

Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer

‚

D=

Period

P.W.

+

+
-

Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt

Re-Applied
Voltage

Body Diode

VDD

Forward Drop

Inductor Curent
ISD

Ripple ≤ 5%

* VGS = 5V for Logic Level Devices
Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs

V DS
V GS
RG

RD

VDS
90%

D.U.T.
+

- V DD

V GS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %

Fig 18a. Switching Time Test Circuit

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10%
VGS
td(on)

tr

td(off) tf

Fig 18b. Switching Time Waveforms

7

IRF8707PbF

SO-8 Package Outline
Dimensions are shown in milimeters (inches)
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SO-8 Part Marking Information
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5(&7,),(5
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)

'$7(&2'( <::
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$ $66(0%/<6,7(&2'(
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3$57180%(5

Note: For the most current drawing please refer to IR website at http://www.irf.com/package

8

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IRF8707PbF
SO-8 Tape and Reel
Dimensions are shown in milimeters (inches)
TERMINAL NUMBER 1

12.3 ( .484 )
11.7 ( .461 )

8.1 ( .318 )
7.9 ( .312 )

FEED DIRECTION

NOTES:
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS(INCHES).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.

330.00
(12.992)
MAX.

14.40 ( .566 )
12.40 ( .488 )
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. OUTLINE CONFORMS TO EIA-481 & EIA-541.

Notes:
 Repetitive rating; pulse width limited by max. junction temperature.
‚ Starting TJ = 25°C, L = 1.38mH, RG = 25Ω, IAS = 8.8A.
ƒ Pulse width ≤ 400µs; duty cycle ≤ 2%.
„ When mounted on 1 inch square copper board.
Rθ is measured at TJ of approximately 90°C.

Note: For the most current drawing please refer to IR website at http://www.irf.com/package
Data and specifications subject to change without notice.
This product has been designed and qualified for the Consumer market.
Qualification Standards can be found on IR’s Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.10/2007

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9

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