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L6561
POWER FACTOR CORRECTOR
1
■

■

■

■
■
■
■

■
■
■

2

FEATURES

Figure 1. Packages

VERY PRECISE ADJUSTABLE OUTPUT
OVERVOLTAGE PROTECTION
MICRO POWER START-UP CURRENT (50µA
TYP.)
VERY LOW OPERATING SUPPLY
CURRENT(4mA TYP.)
INTERNAL START-UP TIMER
CURRENT SENSE FILTER ON CHIP
DISABLE FUNCTION
1% PRECISION (@ Tj = 25°C) INTERNAL
REFERENCE VOLTAGE
TRANSITION MODE OPERATION
TOTEM POLE OUTPUT CURRENT: ±400mA
DIP-8/SO-8 PACKAGES

SO-8

DIP-8

Table 1. Order Codes
Part Number

Package

L6561

DIP-8

L6561D

SO-8

L6561D013TR

Tape & Reel

Realised in mixed BCD technology, the chip gives
the following benefits:
– micro power start up current
– 1% precision internal reference voltage
– (Tj = 25°C)
– Soft Output Over Voltage Protection
– no need for external low pass filter on the current sense
– very low operating quiescent current minimises power dissipation
The totem pole output stage is capable of driving
a Power MOS or IGBT with source and sink currents of ±400mA. The device is operating in transition mode and it is optimised for Electronic Lamp
Ballast application, AC-DC adaptors and SMPS.

DESCRIPTION

L6561 is the improved version of the L6560 standard Power Factor Corrector. Fully compatible
with the standard version, it has a superior performant multiplier making the device capable of working in wide input voltage range applications (from
85V to 265V) with an excellent THD. Furthermore
the start up current has been reduced at few tens
of mA and a disable function has been implemented on the ZCD pin, guaranteeing lower current
consumption in stand by mode.
Figure 2. Block Diagram

INV

1
2.5V

VOLTAGE
REGULATOR

VCC

COMP

MULT

2

3

-

CS
4

MULTIPLIER

+

OVER-VOLTAGE
DETECTION

5pF

+

-

40K

VCC

8

INTERNAL
SUPPLY 7V

20V

R

R1

Q

S
+

7

UVLO

DRIVER

GD

-

R2

VREF2
2.1V
1.6V

+

ZERO CURRENT
DETECTOR
STARTER

-

DISABLE
6
GND

June 2004

5
ZCD

D97IN547E

REV. 16
1/13

L6561
Table 2. Absolute Maximum Ratings
Symbol

Pin

IVcc

8

Iq + IZ; (IGD = 0)
Output Totem Pole Peak Current (2µs)

IGD

7

INV, COMP
MULT

1, 2, 3

CS
ZCD

Parameter

Value

Unit

30

mA

±700

mA

Analog Inputs & Outputs

-0.3 to 7

V

4

Current Sense Input

-0.3 to 7

V

5

Zero Current Detector

50 (source)
-10 (sink)

mA
mA

1
0.65

W
W

Junction Temperature Operating Range

-40 to 150

°C

Storage Temperature

-55 to 150

°C

Ptot

Power Dissipation @Tamb = 50 °C

Tj
Tstg

(DIP-8)
(SO-8)

Figure 3. Pin Connection (Top view)

INV

1

8

VCC

COMP

2

7

GD

MULT

3

6

GND

CS

4

5

ZCD

DIP8

Table 3. Thermal Data
Symbol
Rth j-amb

Parameter
Thermal Resistance Junction to ambient

SO 8

MINIDIP

Unit

150

100

°C/W

Table 4. Pin Description
N.

Name

Function

1

INV

Inverting input of the error amplifier. A resistive divider is connected between the output
regulated voltage and this point, to provide voltage feedback.

2

COMP

Output of error amplifier. A feedback compensation network is placed between this pin and the
INV pin.

3

MULT

Input of the multiplier stage. A resistive divider connects to this pin the rectified mains. A voltage
signal, proportional to the rectified mains, appears on this pin.

4

CS

Input to the comparator of the control loop. The current is sensed by a resistor and the resulting
voltage is applied to this pin.

5

ZCD

Zero current detection input. If it is connected to GND, the device is disabled.

6

GND

Current return for driver and control circuits.

7

GD

Gate driver output. A push pull output stage is able to drive the Power MOS with peak current of
400mA (source and sink).

8

VCC

Supply voltage of driver and control circuits.

(1) Parameter guaranteed by design, not tested in production.

2/13

L6561
Table 5. Electrical Characteristics
(VCC = 14.5V; Tamb = -25°C to 125°C;unless otherwise specified)
Symbol

Pin

Parameter

Test Condition

Min.

Typ.

Max.

Unit

18

V

SUPPLY VOLTAGE SECTION
VCC

8

Operating Range

after turn-on

11

VCC ON

8

Turn-on Threshold

11

12

13

V

VCC OFF

8

Turn-off Threshold

8.7

9.5

10.3

V

Hys

8

Hysteresis

2.2

2.5

2.8

V

20

50

90

µA

2.6

4

mA

4

5.5

mA

SUPPLY CURRENT SECTION
ISTART-U

8

Start-up Current

Iq

8

Quiescent Current

ICC

8

Operating Supply Current

Iq

8

Quiescent Current

8
VZ

8

Zener Voltage

before turn-on (VCC =11V)
CL = 1nF @ 70KHz
in OVP condition Vpin1 = 2.7V

1.4

2.1

mA

VPIN5 ≤150mV, VCC > VCC off

1.4

2.1

mA

VPIN5 ≤ 150mV, VCC < VCC off

20

50

90

µA

ICC = 25mA

18

20

22

V

Tamb = 25°C

2.465

2.5

2.535

V

12V < VCC < 18V

2.44

2.56

V

2

5

mV

-0.1

-1

ERROR AMPLIFIER SECTION
VINV

1

Voltage Feedback Input
Threshold
Line Regulation

IINV

1

GB
ICOMP
VCOMP

Input Bias Current
Voltage Gain

GV

VCC = 12 to 18V
60

80

Source Current

VCOMP = 4V, VINV = 2.4V

-2

-4

Sink Current

VCOMP = 4V, VINV = 2.6V

2.5

4.5

Upper Clamp Voltage

ISOURCE = 0.5mA

5.8

V

Lower Clamp Voltage

ISink = 0.5mA

2.25

V

0 to 3

0 to 3.5

V

VMULT = from 0V to 0.5V
VCOMP = Upper Clamp Voltage

1.65

1.9

VMULT = 1V VCOMP = 4V

0.45

0.6

0.75

1/V

1.6

1.7

1.8

V

-0.05

-1

µA

200

450

ns

0

15

mV

Gain Bandwidth
2
2

µA

Open loop

dB

1

MHz
-8

mA
mA

MULTIPLIER SECTION
VMULT

3

∆V CS
----------------∆V mult

Linear Operating Voltage
Output Max. Slope

K

Gain

CURRENT SENSE COMPARATOR
VCS

4

Current Sense Reference
Clamp

VMULT = 2.5V
VCOMP = Upper Clamp Voltage

ICS

4

Input Bias Current

VOS = 0

td (H-L)

4

Delay to Output

4

Current Sense Offset

ZERO CURRENT DETECTOR
VZCD

5

Input Threshold Voltage Rising
Edge

(1)

Hysteresis

(1)

0.3

0.5

0.7

V

VZCD

5

Upper Clamp Voltage

IZCD = 20µA

4.5

5.1

5.9

V

VZCD

5

Upper Clamp Voltage

IZCD = 3mA

4.7

5.2

6.1

V

2.1

V

3/13

L6561
Table 5. Electrical Characteristics (continued)
(VCC = 14.5V; Tamb = -25°C to 125°C;unless otherwise specified)
Symbol

Pin

Parameter

Test Condition

VZCD

5

Lower Clamp Voltage

IZCD = -3mA

IZCD

5

Sink Bias Current

1V ≤ VZCD ≤ 4.5V

IZCD

5

Source Current Capability

IZCD

5

Sink Current Capability

VDIS

5

Disable threshold

IZCD

5

Restart Current After Disable

Min.

Typ.

Max.

0.3

0.65

1

3

V
µA

2
-3

Unit

-10

mA

10

mA

150

200

250

mV

-100

-200

-300

µA

IGDsource = 200mA

1.2

2

V

IGDsource = 20mA

0.7

VZCD < Vdis; VCC > VCCOFF

OUTPUT SECTION
VGD

7

Dropout Voltage

IGDsink = 200mA
IGDsink = 20mA

1

V

1.5

V

0.3

V

tr

7

Output Voltage Rise Time

CL = 1nF

40

100

ns

tf

7

Output Voltage Fall Time

CL = 1nF

40

100

ns

IGD off

7

IGD Sink Current

VCC =3.5V VGD = 1V

10

-

mA

5

OUTPUT OVERVOLTAGE SECTION
IOVP

2

OVP Triggering Current

35

40

45

µA

Static OVP Threshold

2.1

2.25

2.4

V

70

150

400

µs

RESTART TIMER
tSTART

3

Start Timer

OVER VOLTAGE PROTECTION OVP

The output voltage is expected to be kept by the operation of the PFC circuit close to its nominal value.
This is set by the ratio of the two external resistors R1 and R2 (see fig. 5), taking into consideration that
the non inverting input of the error amplifier is biased inside the L6561 at 2.5V.
In steady state conditions, the current through R1 and R2 is:
V out – 2.5
2.5V
- = I R2 = -----------I R1sc = ------------------------R1
R2
and, if the external compensation network is made only with a capacitor Ccomp, the current through Ccomp
equals zero.When the output voltage increases abruptly the current through R1 becomes:
V outsc + ∆V out – 2.5
I R1 = ---------------------------------------------------- = I R1sc + ∆I R1
R1
Since the current through R2 does not change, ∆IR1 must flow through the capacitor Ccomp and enter the
error amplifier.
This current is monitored inside the L6561 and when reaches about 37µA the output voltage of the multiplier is forced to decrease, thus reducing the energy drawn from the mains. If the current exceeds 40µA,
the OVP protection is triggered (Dynamic OVP), and the external power transistor is switched off until the
current falls approximately below 10µA.
However, if the overvoltage persists, an internal comparator (Static OVP) confirms the OVP condition
keeping the external power switch turned off (see fig. 4).Finally, the overvoltage that triggers the OVP
function is:
∆Vout = R1 · 40µA.
Typical values for R1, R2 and C are shown in the application circuits. The overvoltage can be set indepen-

4/13

L6561
dently from the average output voltage. The precision in setting the overvoltage threshold is 7% of the overvoltage value (for instance ∆V = 60V ± 4.2V).
3.1 Disable function
The zero current detector (ZCD) pin can be used for device disabling as well. By grounding the ZCD voltage the device is disabled reducing the supply current consumption at 1.4mA typical (@ 14.5V supply voltage).
Releasing the ZCD pin the internal start-up timer will restart the device.
Figure 4.
OVER VOLTAGE

VOUT nominal

ISC

40µA
10µA

E/A OUTPUT
2.25V

DYNAMIC OVP

STATIC OVP

D97IN592A

Figure 5. Overvoltage Protection Circuit
Ccomp.
+Vo
∆I

R1
1

2

-

X

E/A

+

R2

PWM

DRIVER

2.5V
2.25V

+

∆I

40µA

D97IN591

5/13

L6561
Figure 6. Typical Application Circuit (80W, 110VAC)
D1 BYT03-400

R3 (*)

D3 1N4150

240K
BRIDGE
+ 4 x 1N4007
FUSE 4A/250V

R2
100

D2
1N5248B
C1
1µF
250V

T

C6

R7 (*)
950K

10nF

C3 680nF

5

8

3

Vac
(85V to 135V)
R10
10K

NTC

2

1
7

L6561

-

C2
22µF
25V

Vo=240V
Po=80W

68K

R1

R9 (*)
950K

+

R5

MOS
STP7NA40

10
4

6

C7
10nF

R6 (*)
0.31
1W

R8
10K
1%

C5
100µF
315V

-

D97IN549B

(*) R3 = 2 x 120KΩ
R6 = 0.619Ω/2
R7 = 2 x 475KΩ, 1%
R9 = 2 x 475KΩ

TRANSFORMER
T: core THOMSON-CSF B1ET2910A (ETD 29 x 16 x 10mm) OR EQUIVALENT (OREGA 473201A7)
primary 90T of Litz wire 10 x 0.2mm
secondary 11T of #27 AWG (0.15mm)
gap 1.8mm for a total primary inductance of 0.7mH

Figure 7. Typical Application Circuit (120W, 220VAC)
D1 BYT13-600

R3 (*)

D3 1N4150

440K
BRIDGE
+ 4 x 1N4007
FUSE 2A/250V

R2
100

D2
1N5248B
C1
560nF
400V

T

C6

R7 (*)
998K

10nF
68K
5

8

3

Vac
(175V to 265V)
R10
10K

NTC

(*) R3 = 2 x 220KΩ
R6 = 0.82Ω/2
R7 = 2 x 499KΩ, 1%
R9 = 2 x 909KΩ

2

1
7

L6561

-

C2
22µF
25V

Vo=400V
Po=120W

C3 1µF

R1

R9 (*)
1.82M

+

R5

MOS
STP5NA50

10
4

6

C7
10nF

R6 (*)
0.41
1W

R8
6.34K
1%

C5
56µF
450V

-

D97IN550B

TRANSFORMER
T: core THOMSON-CSF B1ET2910A (ETD 29 x 16 x 10mm) OR EQUIVALENT (OREGA 473201A8)
primary 90T of Litz wire 10 x 0.2mm
secondary 7T of #27 AWG (0.15mm)
gap 1.25mm for a total primary inductance of 0.8mH

Figure 8. Typical Application Circuit (80W, Wide-range Mains)
D1 BYT13-600

R3 (*)

D3 1N4150

240K
BRIDGE
+ 4 x 1N4007
FUSE 4A/250V

R2
100

D2
1N5248B
C1
1µF
400V

C6

R7 (*)
998K

12nF

R9 (*)
1.24M

8

3

R10
10K

C2
22µF
25V

C7
10nF

5

2

6

1
7

R5

MOS
STP8NA50

10
4

R6 (*)
0.41
1W

R8
6.34K
1%
D97IN553B

(*) R3 = 2 x 120KΩ
R6 = 0.82Ω/2
R7 = 2 x 499KΩ, 1%
R9 = 2 x 620KΩ

6/13

Vo=400V
Po=80W

C3 1µF

L6561

Vac
(85V to 265V)

+

68K

R1

-

NTC

T

TRANSFORMER
T: core THOMSON-CSF B1ET2910A (ETD 29 x 16 x 10mm) OR EQUIVALENT (OREGA 473201A8)
primary 90T of Litz wire 10 x 0.2mm
secondary 7T of #27 AWG (0.15mm)
gap 1.25mm for a total primary inductance of 0.8mH

C5
47µF
450V

-

L6561
Figure 9. Demo Board (EVAL6561-80) Electrical Schematic
NTC
2.5

D1
STTH1L06
R4
180 k

R5
180 k

T
D8
1N4150

C5 12 nF

100

BRIDGE
FUSE
4A/250V

W04M

+

C1
1 µF
400V

1N5248B

R6
68 k

R12
750 k

C3 470 nF

C23
1 µF
R2
750 k

5

8

2

1

L6561

3

-

Vac
(85V to 265V)

R50 12 k

D2

R1
750 k

Vo=400V
Po=80W

R11
750 k

R14

R7
33

C6
47 µF

MOS
STP8NM50

7

450V
4

6

R3
10 k

C2
10nF

C29
22 µF
25V

C4
100 nF

R16
91 k

D3 1N4148
C7
10 µF
35 V

R15
220

R9
0.41

R10
0.41

1W

1W

R13
9.53 k

-

THD REDUCER (optional)

Boost Inductor Spec (ITACOIL E2543/E)
E25x13x7 core, 3C85 ferrite
1.5 mm gap for 0.7 mH primary inductance
Primary: 105 turns 20x0.1 mm
Secondary: 11 turns 0.1mm

Figure 10. EVAL6561-80: PCB and Component Layout (Top view, real size 57x108mm)

Table 6. EVAL6561-80: Evaluation Results.
Vin (Vac)

Pin (W)

Vo (Vdc)

∆Vo (Vdc)

Po (W)

η (%)

w/o THD reducer
PF

THD (%)

with THD reducer
PF

THD (%)

85

87.2

400.1

14

80.7

92.8

0.999

3.7

0.999

2.9

110

85.2

400.1

14

80.7

94.7

0.996

5.0

0.996

3.2

135

84.2

400.1

14

80.7

95.8

0.989

6.2

0.989

3.7

175

83.5

400.1

14

80.7

96.6

0.976

8.3

0.976

4.3

220

83.1

400.1

14

80.7

97.1

0.940

10.7

0.941

5.6

265

82.9

400.1

14

80.7

97.3

0.890

13.7

0.893

8.1

7/13

L6561
Figure 13. Supply Current vs. Supply
Voltage

Figure 11. OVP Current Threshold vs.
Temperature
D94IN047A

D97IN548A

ICC
(mA)

IOVP
(µA)

10
41

5
1
0.5

40

0.1
0.05
39

CL = 1nF
f = 70KHz
TA = 25˚C

0.01
0.005
0

38
-50 -25

0

25

50

75

100 125 T (˚C)

Figure 12. Undervoltage Lockout Threshold
vs. Temperature
VCC-ON
(V)

D94IN044A

0

5

10

15

20

VCC(V)

Figure 14. Voltage Feedback Input Threshold
vs. Temperature
VREF
(V)

D94IN048A

13
2.50

12
11
VCC-OFF
(V)
10

2.48

9
-25

8/13

0

25

50
T (˚C)

75

100

125

2.46
-50

0

50

100

T (˚C)

L6561
Figure 15. Output Saturation Voltage vs. Sink
Current
VPIN7
(V)

D94IN046

Figure 17. Multiplier Characteristics
Family
VCS(pin4)
(V) upper voltage

D97IN555A

VCOMP(pin2)
(V)

clamp

VCC = 14.5V

SINK

2.0

1.6

3.5
5.0
4.5

1.4
1.2

4.0

1.5

3.2

1.0
0.8

1.0

3.0

0.6
0.5

0.4
2.8

0.2

2.6

0
0

100

200

300

400 IGD (mA)

0

0

0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
VMULT(pin3) (V)

Figure 16. Output Saturation Voltage vs.
Source Current
VPIN7
(V)

D94IN053

VCC = 14.5V
VCC -0.5

VCC -1.0

VCC -1.5

VCC -2.0

SOURCE

0
0

100

200

300

400 IGD (mA)

9/13

L6561
Figure 18. DIP-8 Mechanical Data & Package Dimensions
mm

inch

DIM.
MIN.
A

TYP.

MIN.

3.32

TYP.

MAX.

0.51

B

1.15

1.65

0.045

0.065

b

0.356

0.55

0.014

0.022

b1

0.204

0.304

0.008

0.012

E

0.020

10.92
7.95

9.75

0.430
0.313

0.384

e

2.54

0.100

e3

7.62

0.300

e4

7.62

0.300

F

6.6

0.260

I

5.08

0.200

L
Z

3.18

OUTLINE AND
MECHANICAL DATA

0.131

a1

D

10/13

MAX.

3.81
1.52

0.125

0.150
0.060

DIP-8

L6561
Figure 19. SO-8 Mechanical Data & Package Dimensions
mm

inch

DIM.
MIN.

TYP.

MAX.

MIN.

TYP.

MAX.

A

1.35

1.75

0.053

0.069

A1

0.10

0.25

0.004

0.010

A2

1.10

1.65

0.043

0.065

B

0.33

0.51

0.013

0.020

C

0.19

0.25

0.007

0.010

D (1)

4.80

5.00

0.189

0.197

E

3.80

4.00

0.15

0.157

e

1.27

0.050

H

5.80

6.20

0.228

0.244

h

0.25

0.50

0.010

0.020

L

0.40

1.27

0.016

0.050

k
ddd

OUTLINE AND
MECHANICAL DATA

0˚ (min.), 8˚ (max.)
0.10

0.004

Note: (1) Dimensions D does not include mold flash, protrusions or gate burrs.
Mold flash, potrusions or gate burrs shall not exceed
0.15mm (.006inch) in total (both side).

SO-8

0016023 C

11/13

L6561
Table 7. Revision History
Date

Revision

January 2004

15

First Issue

June 2004

16

Modified the Style-look in compliance with the “Corporate Technical
Publications Design Guide”.
Changed input of the power amplifier connected to Multiplier (Fig. 2).

12/13

Description of Changes

L6561

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics.
All other names are the property of their respective owners
© 2004 STMicroelectronics - All rights reserved
STMicroelectronics GROUP OF COMPANIES
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13/13

www.s-manuals.com



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Creator Tool                    : C2 v2.0.0 build 003
Modify Date                     : 2012:11:18 13:41:26+02:00
Metadata Date                   : 2012:11:18 13:41:26+02:00
Format                          : application/pdf
Description                     : 
Creator                         : 
Title                           : L6561, L6561D - Datasheet. www.s-manuals.com.
Subject                         : L6561, L6561D - Datasheet. www.s-manuals.com.
Producer                        : Acrobat Distiller 5.0.5 (Windows) (via http://big.faceless.org/products/pdf?version=2.0.7)
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Page Count                      : 14
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Keywords                        : L6561, L6561D - Datasheet. www.s-manuals.com.

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