Colibri Tegra Datasheet Pcb Layout Design Guide

• 1 Introduction
  • 1.1 Overview
  • 1.2 Additional Documents
    • 1.2.1 Apalis Carrier Board Design Guide
    • 1.2.2 Apalis Module Datasheets
    • 1.2.3 Apalis Module Definition
    • 1.2.4 Colibri Carrier Board Design Guide
    • 1.2.5 Colibri Module Datasheets
    • 1.2.6 Toradex Developer Centre
    • 1.2.7 Carrier Board Design information
  • 1.3 Abbreviations
• 2 General Considerations
• 3 PCB Stack-Up
  • 3.1 Four Layer Stack–Up
  • 3.2 Six Layer Stack–Up
  • 3.3 Eight Layer Stack–Up
• 4 Trace Impedance
• 5 Component Placement and Schematic Optimizations
• 6 High-Speed Layout Considerations
  • 6.1 Power Supply
  • 6.2 Trace Bend Geometry
  • 6.3 Signal Proximity
  • 6.4 Trace Stubs
  • 6.5 Ground Planes under Pads
  • 6.6 Differential Pair Signals
  • 6.7 Length Matching
  • 6.8 Signal Return Path
  • 6.9 Analogue and Digital Ground
    • 6.9.1.1 Split Plane Approach
    • 6.9.1.2 Virtual Split Approach
• 7 Layout Requirements of Interfaces
  • 7.1 PCI Express
  • 7.2 SATA
  • 7.3 Ethernet
  • 7.4 USB
    • 7.4.1.1 USB 2.0 Signals
    • 7.4.1.2 USB 3.0 Signals
  • 7.5 Parallel RGB LCD Interface
  • 7.6 LVDS LCD Interface
  • 7.7 HDMI/DVI
  • 7.8 Analogue VGA
  • 7.9 Parallel Camera Interface
  • 7.10 SD/MMC/SDIO
  • 7.11 I2C
  • 7.12 Display Serial Interface (MIPI/DSI with D-PHY)
  • 7.13 Camera Serial Interface (MIPI/CSI-2 with D-PHY)