Pegatron MA50 Schematics. Www.s Manuals.com. R1.0 Schematics

User Manual: Motherboard Pegatron MA50 - Schematics. Free.

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5

4

3

2

1

MA50 Ultrabook Block Diagram Rev 1.0
D

D

GPU

VRAM
Page 76,77

DDR3 1333MHz

CPU

PEG

nVidia N13PGL
Page 70~79

Page 16~18

Page 3~11

DMI x4

Page 45

FDI

eDP
LVDS

LCD Panel

HDMI

HDMI

DDR3 SO-DIMM
&
Memory Down

Sandy Bridge

0

MiniCard (HALF)

2

WLAN + BT

Page 48
Page 53

PCIEx1
Debug Conn.

4

Page 44

C

LPC

EC

Touchpad
Keyboard

GigaLAN

Page 30

1

SATA
SPI ROM
(4M+2M)

2 IN 1

Page 40

USB 2.0

USB 3.0

Page 50

CardReader

Realtek
RTS5209

Page 20~28

Page 28

C

Page 34

Panther Point

FAN

RJ45

Page 33

PCH

NPCE794L

Page 31

Broadcom
BCM57780

3
1
0

Power
+VCC_CORE
+VGFX_CORE

MiniCard (FULL)
SSD (mSATA)

Page 80

System

Page 53

Page 81

10
Speaker
Page 37
B

Audio Jack
(combo)

Azalia Codec

CMOS Camera

0

ALC271

2

Bluetooth

Page 38

2
2

DC & BATT. Conn.

Page 57

Page 60

DDR3
Page 83

Page 51

+1.8VS
Page 84

USB Port(2)

+VCCSA

Page 52

Reset Circuit

Skew Holes

Page 85

3

Page 65

Page 32

B

ODD

Page 61

Discharge Circuit

Page 82
Page 51

4

Page 37

VTT

HDD

Page 45

Azalia

USB Port(3)
1

+VGA_CORE

Page 52

Page 87

Charger

Charger

Page 88

Page 52

USB Port(1)

1

Detect
Page 90

Page 52

Load Switch
A

A

Page 91

Power Protect
Page 92

Title : Block Diagram
Engineer:

BG1-HW RD Div.2-NB RD Dept.5
Size

5

4

3

2

Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
1.0
Sheet
1

1

of

93

5

PCH_CPT
GPIO

D

C

B

A

4

PCH_CPT
Use As
GPIO
GPIO 00
GPIO 01
GPIO [2:5]
GPIO 06
GPIO 07
GPIO 08
GPIO 09
GPIO 10
GPIO 11
GPIO 12
GPIO 13
GPIO 14
GPIO 15
GPIO 16
GPIO 17
GPIO 18
GPIO 19
GPIO 20
GPIO 21
GPIO 22
GPIO 23
GPIO 24
GPIO 25
GPIO 26
GPIO 27
GPIO 28
GPIO 29
GPIO 30
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO

31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49

GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO

50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
72
73
74
75
5

Signal Name

Internal &
External
Power
Pull-up/down

4

3

EC
NPCE795L

EC GPIO

2

Use As

GPA0
GPA1
GPA2
GPA3
GPA4
GPA5
GPA6
GPA7
GPB0
GPB1
GPB2
GPB3
GPB4
GPB5
GPB6
GPB7
GPC0
GPC1
GPC2
GPC3
GPC4
GPC5
GPC6
GPC7
GPD0
GPD1
GPD2
GPD3
GPD4
GPD5
GPD6
GPD7
GPE0
GPE1
GPE2
GPE3
GPE4
GPE5
GPE6
GPE7
GPF0
GPF1
GPF2
GPF3
GPF4
GPF5
GPF6
GPF7
GPG0
GPG1
GPG2
GPG6
GPH0
GPH1
GPH2
GPH3
GPH4
GPH5
GPH6
GPI0
GPI1
GPI2
GPI3
GPI4
GPI5
GPI6
GPI7
GPJ0
GPJ1
GPJ2
GPJ3
GPJ4
GPJ5
3

1

Signal Name

D

C

SM_BUS ADDRESS :
SM-Bus Device

SM-Bus Address

SO-DIMM 0

1010000x

( A0h )

SO-DIMM 1

1010001x

( A4h )

PCIE 1

N/A

USB 0

USB Port (1)

PCIE 2

Minicard WLAN

USB 1

USB Port (2)

PCIE 3

N/A

USB 2

USB 3.0 Port (3)

PCIE 4

USB3.0

USB 3

USB Port (4)

PCIE 5

N/A

USB 4

N/A

PCIE 6

GLAN

USB 5

N/A

PCIE 7

N/A

USB 6

PCIE 8

N/A

USB 7

N/A
N/A

USB 8

CMOS Camera

USB 9

WLAN

SATA0

SATA HDD

SATA1

N/A

SATA2

SATA ODD

SATA3

N/A

SATA4

N/A

SATA5

N/A

USB 10

Card Reader

USB 11

N/A

USB 12

N/A

USB 13

N/A

B

A

Title : System Setting
Engineer:

BG1-HW RD Div.2-NB RD Dept.5
Size

2

Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
1.0
Sheet
1

2

of

93

5

4

3

2

1

+VCCP

+VCCP

4,6,7,30,32,57,82

D

D

+VCCP
PEG_COMP

U0301A

M2
P6
P1
P10

22
22
22
22

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

N3
P7
P3
P11

22
22
22
22

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

K1
M8
N4
R2

22
22
22
22

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

K3
M7
P4
T3

DMI_TX#[0]
DMI_TX#[1]
DMI_TX#[2]
DMI_TX#[3]
DMI_TX[0]
DMI_TX[1]
DMI_TX[2]
DMI_TX[3]

FDI_TXN[7:0]

FDI_TXP[7:0]
FDI_TXP0 U6
FDI_TXP1 W10
FDI_TXP2 W3
FDI_TXP3 AA7
FDI_TXP4 W7
FDI_TXP5 T4
FDI_TXP6 AA3
FDI_TXP7 AC8
22 FDI_FSYNC0
22 FDI_FSYNC1

AA11
AC12

FDI_INT

U11

22 FDI_LSYNC0
22 FDI_LSYNC1

AA10
AG8

22

FDI0_TX#[0]
FDI0_TX#[1]
FDI0_TX#[2]
FDI0_TX#[3]
FDI1_TX#[0]
FDI1_TX#[1]
FDI1_TX#[2]
FDI1_TX#[3]
FDI0_TX[0]
FDI0_TX[1]
FDI0_TX[2]
FDI0_TX[3]
FDI1_TX[0]
FDI1_TX[1]
FDI1_TX[2]
FDI1_TX[3]
FDI0_FSYNC
FDI1_FSYNC

Intel(R) FDI

FDI_TXN0 U7
FDI_TXN1 W11
FDI_TXN2 W1
FDI_TXN3 AA6
FDI_TXN4 W6
FDI_TXN5 V4
FDI_TXN6 Y2
FDI_TXN7 AC9

C

22

FDI_INT
FDI0_LSYNC
FDI1_LSYNC

+VCCP
24.9Ohm
10KOhm
1KOhm

PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]

1%
2
1 /LVDS
1 /eDP

1 R0302 DP_COMP
2 R0303
2 R0315

AF3
AD2
AG11

45 DP_HPD#_PCH
AG4
AF4

45 DP_AUXN_PCH
45 DP_AUXP_PCH

eDP_COMPIO
eDP_ICOMPO
eDP_HPD
eDP_AUX#
eDP_AUX

45 DP_TXN0_PCH
45 DP_TXN1_PCH

AC3
AC4
AE11
AE7

45 DP_TXP0_PCH
45 DP_TXP1_PCH

AC1
AA4
AE10
AE6

eDP_TX#[0]
eDP_TX#[1]
eDP_TX#[2]
eDP_TX#[3]
eDP_TX[0]
eDP_TX[1]
eDP_TX[2]
eDP_TX[3]

DP

B

PCI EXPRESS -- GRAPHICS

22

DMI_RX[0]
DMI_RX[1]
DMI_RX[2]
DMI_RX[3]

1

1%

2 24.9Ohm

G3
G1
G4

PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO

DMI_RX#[0]
DMI_RX#[1]
DMI_RX#[2]
DMI_RX#[3]

DMI

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

22
22
22
22

R0301

PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]

PCIENB_RXN[15:0]

70

PCIENB_RXP[15:0]

70

H22
J21
B22
D21
A19
D17
B14
D13
A11
B10
G8
A8
B6
H8
E5
K7

PCIENB_RXN15
PCIENB_RXN14
PCIENB_RXN13
PCIENB_RXN12
PCIENB_RXN11
PCIENB_RXN10
PCIENB_RXN9
PCIENB_RXN8
PCIENB_RXN7
PCIENB_RXN6
PCIENB_RXN5
PCIENB_RXN4
PCIENB_RXN3
PCIENB_RXN2
PCIENB_RXN1
PCIENB_RXN0

K22
K19
C21
D19
C19
D16
C13
D12
C11
C9
F8
C8
C5
H6
F6
K6

PCIENB_RXP15
PCIENB_RXP14
PCIENB_RXP13
PCIENB_RXP12
PCIENB_RXP11
PCIENB_RXP10
PCIENB_RXP9
PCIENB_RXP8
PCIENB_RXP7
PCIENB_RXP6
PCIENB_RXP5
PCIENB_RXP4
PCIENB_RXP3
PCIENB_RXP2
PCIENB_RXP1
PCIENB_RXP0

G22
C23
D23
F21
H19
C17
K15
F17
F14
A15
J14
H13
M10
F10
D9
J4

PCIENB_TXN0
PCIENB_TXN1
PCIENB_TXN2
PCIENB_TXN3
PCIENB_TXN4
PCIENB_TXN5
PCIENB_TXN6
PCIENB_TXN7
PCIENB_TXN8
PCIENB_TXN9
PCIENB_TXN10
PCIENB_TXN11
PCIENB_TXN12
PCIENB_TXN13
PCIENB_TXN14
PCIENB_TXN15

CX0301
CX0302
CX0303
CX0304
CX0305
CX0306
CX0307
CX0308
CX0309
CX0310
CX0311
CX0312
CX0313
CX0314
CX0315
CX0316

0.22UF/10V
0.22UF/10V
0.22UF/10V
0.22UF/10V
0.22UF/10V
0.22UF/10V
0.22UF/10V
0.22UF/10V
0.22UF/10V
0.22UF/10V
0.22UF/10V
0.22UF/10V
0.22UF/10V
0.22UF/10V
0.22UF/10V
0.22UF/10V

/DGPU
/DGPU
/DGPU
/DGPU
/DGPU
/DGPU
/DGPU
/DGPU
/DGPU
/DGPU
/DGPU
/DGPU
/DGPU
/DGPU
/DGPU
/DGPU

PCIEG_RXN15
PCIEG_RXN14
PCIEG_RXN13
PCIEG_RXN12
PCIEG_RXN11
PCIEG_RXN10
PCIEG_RXN9
PCIEG_RXN8
PCIEG_RXN7
PCIEG_RXN6
PCIEG_RXN5
PCIEG_RXN4
PCIEG_RXN3
PCIEG_RXN2
PCIEG_RXN1
PCIEG_RXN0

F22
A23
D24
E21
G19
B18
K17
G17
E14
C15
K13
G13
K10
G10
D8
K4

PCIENB_TXP0
PCIENB_TXP1
PCIENB_TXP2
PCIENB_TXP3
PCIENB_TXP4
PCIENB_TXP5
PCIENB_TXP6
PCIENB_TXP7
PCIENB_TXP8
PCIENB_TXP9
PCIENB_TXP10
PCIENB_TXP11
PCIENB_TXP12
PCIENB_TXP13
PCIENB_TXP14
PCIENB_TXP15

CX0317
CX0318
CX0319
CX0320
CX0321
CX0322
CX0323
CX0324
CX0325
CX0326
CX0327
CX0328
CX0329
CX0330
CX0331
CX0332

0.22UF/10V
0.22UF/10V
0.22UF/10V
0.22UF/10V
0.22UF/10V
0.22UF/10V
0.22UF/10V
0.22UF/10V
0.22UF/10V
0.22UF/10V
0.22UF/10V
0.22UF/10V
0.22UF/10V
0.22UF/10V
0.22UF/10V
0.22UF/10V

/DGPU
/DGPU
/DGPU
/DGPU
/DGPU
/DGPU
/DGPU
/DGPU
/DGPU
/DGPU
/DGPU
/DGPU
/DGPU
/DGPU
/DGPU
/DGPU

PCIEG_RXP15
PCIEG_RXP14
PCIEG_RXP13
PCIEG_RXP12
PCIEG_RXP11
PCIEG_RXP10
PCIEG_RXP9
PCIEG_RXP8
PCIEG_RXP7
PCIEG_RXP6
PCIEG_RXP5
PCIEG_RXP4
PCIEG_RXP3
PCIEG_RXP2
PCIEG_RXP1
PCIEG_RXP0

C

R2.1 01/09

PCIEG_RXN[15:0]

70

PCIEG_RXP[15:0]

70

B

ES1
01V010000003

A

A

Title : CPU(1)_DMI,DP,PEG,FDI
Engineer:

BG1-HW RD Div.2-NB RD Dept.5
Size

5

4

3

2

Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
1.0
Sheet
1

3

of

93

5

4

3

2

1

U0301B

T0402

C57

TP_CATERR#_R

1

C49

PROC_SELECT#
PROC_DETECT#

THERMAL

A48

H_PECI

+VCCP

2
62Ohm

5%
1
R0404
H_PROCHOT#

2

5%

56Ohm

H_PROCHOT#_D
1
R0403
10V240000028

C45

D45

25,32 H_THRMTRIP#

DPLL_REF_CLK
DPLL_REF_CLK#

PECI

PROCHOT#

THERMTRIP#

SM_DRAMRST#

1

NB_R0402_5MIL_SMALL
1
R0408
R0407
2
1

2
10KOhm
25 H_CPUPWRGD

H_PM_SYNC_R

C48

H_CPUPWRGD_R

B46

VDDPWRGOOD_R

BE45

PM_SYNC

UNCOREPWRGOOD

NB_R0402_5MIL_SMALL
2
130Ohm

22 PM_DRAM_PWRGD

1
R0409

SM_DRAMPWROK

R2.1
1
R0416

BUF_PLT_RST#

BUF_CPU_RST#

2
1.5KOhm

D44

RESET#

1

24,30,32,33,53,59,70

JTAG & BPM

PWR MANAGEMENT

R0406
2

H_PM_SYNC

CLK_EXP_P_R
CLK_EXP_N_R

0Ohm 2
0Ohm 2

1 R0422
1 R0423
1 /LVDS

R0431

N59
N58

SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]

TCK
TMS
TRST#
TDI
TDO

DBR#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]

CLK_EXP_P 21
CLK_EXP_N 21

2 1KOhm

AG3 CLK_DP_P_R
AG1 CLK_DP_N_R

RN0401A
RN0401B
R0430

BCLK_ITP
BCLK_ITP#

PRDY#
PREQ#

22

J3
H2

CLK_XDP_ITP_P
CLK_XDP_ITP_N

CATERR#

D

25

CLOCKS

TP_SKTOCC#_R

1

DDR3
MISC

T0401

MISC

F49

25 H_SNB_IVB#

+1.5VS_VCCDDQ
BCLK
BCLK#

1
1

1 /LVDS

1
3

2 /eDP
4 /eDP

0Ohm
0Ohm

10VH40000001
10VH40000001

2 1KOhm

1
R0418 1
R0419 1
R0420

22,24,28,30,60,81,92

+VCCP

3,6,7,30,32,57,82

+3V

24,45,57,59,61,91

T0420
T0421
D

1%
1%
1%

XDP_PRDY#
XDP_PREQ#

1
1

T0404
T0405

L56
L55
J58

XDP_TCK
XDP_TMS
XDP_TRST#

1
1
1

T0406
T0407
T0408

M60
L59

XDP_TDI
XDP_TDO

1
1

T0409
T0410

K58

XDP_DBRESET#

1

T0411

1
1
1
1
1
1
1
1

T0412
T0413
T0414
T0415
T0416
T0417
T0418
T0419

XDP_BPM0
XDP_BPM1
XDP_BPM2
XDP_BPM3
XDP_BPM4
XDP_BPM5
XDP_BPM6
XDP_BPM7

5

DDR3 DRAM RESET
R.10 PU/PD for JTAG signals

System Memory Impedance Compensation
Huron River platform Design Guide 436735 P.88 Table 37.

2
2 140Ohm
2 25.5Ohm
200Ohm

N53
N55

G58
E55
E59
G55
G59
H60
J59
J61

+3VSUS

+VCCP

17,20,21,22,23,24,25,26,27,28,30,32,33,36,37,44,45,48,50,51,53,57,59,61,80,91,92

+VCCP

CPUDRAMRST#

BF44 SM_RCOMP_0
BE43 SM_RCOMP_1
BG43 SM_RCOMP_2

21
21

7

+3VS

+3VSUS

+3V

XDP_Debug

AT30

CLK_DP_P
CLK_DP_N

+1.5VS_VCCDDQ

+3VS

+VCCP

Remove

XDP_TMS
XDP_TDI
XDP_TDO
XDP_PREQ#

R0438
R0439
R0441
R0440

1
1
1
1

XDP_TCK
XDP_TRST#

R0443
R0442

1
1

@
@

2
2
2
2

51Ohm
51Ohm
51Ohm
51Ohm

XDP interface.
2 51Ohm
2 51Ohm

R0417
750Ohm

C

2

C

ES1
01V010000003

R1.0 0119
Sandy Bridge:R0417 = 750 ohm (10V220000093)
Ivy
Bridge:R0417 = 680 ohm (10V240000041)

PM_SYS_PWRGD is the power good for +1.5V_VCCDDQ

Different from EVEREST
2
0Ohm

1
R0460
@
+3VSUS

+3VSUS

2

1

NB_R0402_5MIL_SMALL

R0452
1.1KOhm
1%

1

R0451
PM_DRAM_PWRGD

R0449
200Ohm
1%
1.57 Volt
10V220000034
@
2

R0450
1KOhm
1%

1

4

R0453
8.2KOhm

RB751V-40
0.37V/30mA
2 D0404

1

PM_PWROK

22,30,92

2

1

@
0.1UF/10V
U0404
5 VCC

2

B

@
C0420
1
2

1

+1.5VS_VCCDDQ

A

1

B

2

B

2C0413
1UF/6.3V

1@

GND 3
Y
Vcc=2~5.5 @

@
+1.05VS_PWRGD

82,92

2

@

R2.1

R1.1
add S3 power reduction

80

VR_HOT#

2
0Ohm

1
R0461
@

If support S3 power reduction with power good.
1. Mount U0404, D0404, C0413, C0420, R0450, R0452, R0453,
Unmount R0460
2. Change R0449 to 1kohm from 200ohm, change R0409 to 0ohm from 130ohm - Design Guide 1.0 page 106

C0401
47PF/50V
@

D

3
Q0401
2N7002
1

1

R1.0 0224
Intel Comments

2

H_PROCHOT#

S 2

THRO_CPU

THRO_CPU

G

30

A

A

Title : CPU(2)_CLK,MISC,JTAG
Engineer:

BG1-HW RD Div.2-NB RD Dept.5
Size

5

4

3

2

Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
1.0
Sheet
1

4

of

93

5

4

3

2

1

+1.5V
+1.5V

+1.5V

+1.5V

16,17,18,57,60,83

16,17,18,57,60,83

U0301D
U0301C

17 M_B_DQ[63:0]

C

B

16
16
16

M_A_BS0
M_A_BS1
M_A_BS2

BD37
BF36
BA28

16
16
16

M_A_CAS#
M_A_RAS#
M_A_WE#

BE39
BD39
AT41

SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]

AU36
AV36
AY26

SA_CK[0]
SA_CK#[0]
SA_CKE[0]

SA_CS#[0]
SA_CS#[1]

SA_ODT[0]
SA_ODT[1]

SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]

SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]

SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]

SA_BS[0]
SA_BS[1]
SA_BS[2]

SA_CAS#
SA_RAS#
SA_WE#

M_A_DIM0_CLK_DDR0
M_A_DIM0_CLK_DDR#0
M_A_DIM0_CKE0 16

AT40
AU40
BB26

SA_CK[1]
SA_CK#[1]
SA_CKE[1]

DDR SYSTEM MEMORY A

M_A_DQ0
AG6
M_A_DQ1
AJ6
M_A_DQ2 AP11
M_A_DQ3
AL6
M_A_DQ4 AJ10
M_A_DQ5
AJ8
M_A_DQ6
AL8
M_A_DQ7
AL7
M_A_DQ8 AR11
M_A_DQ9
AP6
M_A_DQ10 AU6
M_A_DQ11 AV9
M_A_DQ12 AR6
M_A_DQ13 AP8
M_A_DQ14 AT13
M_A_DQ15 AU13
M_A_DQ16 BC7
M_A_DQ17 BB7
M_A_DQ18 BA13
M_A_DQ19 BB11
M_A_DQ20 BA7
M_A_DQ21 BA9
M_A_DQ22 BB9
M_A_DQ23 AY13
M_A_DQ24 AV14
M_A_DQ25 AR14
M_A_DQ26 AY17
M_A_DQ27 AR19
M_A_DQ28 BA14
M_A_DQ29 AU14
M_A_DQ30 BB14
M_A_DQ31 BB17
M_A_DQ32 BA45
M_A_DQ33 AR43
M_A_DQ34 AW48
M_A_DQ35 BC48
M_A_DQ36 BC45
M_A_DQ37 AR45
M_A_DQ38 AT48
M_A_DQ39 AY48
M_A_DQ40 BA49
M_A_DQ41 AV49
M_A_DQ42 BB51
M_A_DQ43 AY53
M_A_DQ44 BB49
M_A_DQ45 AU49
M_A_DQ46 BA53
M_A_DQ47 BB55
M_A_DQ48 BA55
M_A_DQ49 AV56
M_A_DQ50 AP50
M_A_DQ51 AP53
M_A_DQ52 AV54
M_A_DQ53 AT54
M_A_DQ54 AP56
M_A_DQ55 AP52
M_A_DQ56 AN57
M_A_DQ57 AN53
M_A_DQ58 AG56
M_A_DQ59 AG53
M_A_DQ60 AN55
M_A_DQ61 AN52
M_A_DQ62 AG55
M_A_DQ63 AK56

D

1
1
1

M_A_DIM0_CS#0

16

AY40
BA41

M_A_DIM0_ODT0

16

M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

AJ11
AR10
AY11
AU17
AW45
AV51
AT56
AK54

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7

BG35
BB34
BE35
BD35
AT34
AU34
BB32
AT32
AY32
AV32
BE37
BA30
BC30
AW41
AY28
AU26

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

16
16

T0501
T0502
T0503

BB40
BC41

AL11
AR8
AV11
AT17
AV45
AY51
AT55
AK55

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

M_A_DQS#[7:0]

M_A_DQS[7:0]

M_A_A[15:0]

16

16

16

AL4
AL1
AN3
AR4
AK4
AK3
AN4
AR1
AU4
AT2
AV4
BA4
AU3
AR3
AY2
BA3
BE9
BD9
BD13
BF12
BF8
BD10
BD14
BE13
BF16
BE17
BE18
BE21
BE14
BG14
BG18
BF19
BD50
BF48
BD53
BF52
BD49
BE49
BD54
BE53
BF56
BE57
BC59
AY60
BE54
BG54
BA58
AW59
AW58
AU58
AN61
AN59
AU59
AU61
AN58
AR58
AK58
AL58
AG58
AG59
AM60
AL59
AF61
AH60

17
17
17

M_B_BS0
M_B_BS1
M_B_BS2

BG39
BD42
AT22

17
17
17

M_B_CAS#
M_B_RAS#
M_B_WE#

AV43
BF40
BD45

SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]

SB_BS[0]
SB_BS[1]
SB_BS[2]

SB_CAS#
SB_RAS#
SB_WE#

SB_CK[0]
SB_CK#[0]
SB_CKE[0]

SB_CK[1]
SB_CK#[1]
SB_CKE[1]

SB_CS#[0]
SB_CS#[1]

SB_ODT[0]
SB_ODT[1]

DDR SYSTEM MEMORY B

16 M_A_DQ[63:0]

SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]

SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]

SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]

BA34
AY34
AR22

M_B_DIM0_CLK_DDR0
M_B_DIM0_CLK_DDR#0
M_B_DIM0_CKE0 17

17
17

BA36
BB36
BF27

M_B_DIM0_CLK_DDR1
M_B_DIM0_CLK_DDR#1
M_B_DIM0_CKE1 17

17
17

BE41
BE47

M_B_DIM0_CS#0
M_B_DIM0_CS#1

17
17

AT43
BG47

M_B_DIM0_ODT0
M_B_DIM0_ODT1

17
17

AL3
AV3
BG11
BD17
BG51
BA59
AT60
AK59

M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

M_B_DQS#[7:0]

D

17

C

AM2
AV1
BE11
BD18
BE51
BA61
AR59
AK61

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7

BF32
BE33
BD33
AU30
BD30
AV30
BG30
BD29
BE30
BE28
BD43
AT28
AV28
BD46
AT26
AU22

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

M_B_DQS[7:0]

M_B_A[15:0]

17

17

B

ES1
01V010000003

ES1
01V010000003

2

R1.0 S3 circuit: DRAM_RST# to memory should be high during S3
R1.1 add S3 power reduction
+1.5V

always support S3 PWR Reduction
Remove bypass R

1

R0507
1KOhm

2 1KOhm

D

R0508 1

3

CPUDRAMRST#

A

4

1

G

R0508 use 1k ohm
Design Guide 0.9 p107(436735)
Close to DIMM

1

9,21,30 DRAMRST_CNTRL_PCH

1%
4.99KOhm
R0506

1

R2.0 12/14

C0501
0.1UF/10V

Title : CPU(3)_DDR3

2

16,17 DDR3_DRAMRST#

2

A

2 S

Q0501
2N7002

Engineer:

BG1-HW RD Div.2-NB RD Dept.5
Size

5

4

3

2

Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
1.0
Sheet
1

5

of

93

5

4

3

2

+VCCP
+VCORE

1

+VCCP

3,4,7,30,32,57,82

+VCORE

9,11,80

U0301F
+VCCP

vx_c0603_small

2

1
C0614
1UF/6.3V

1
C0620
10UF/6.3V

2

C0621
10UF/6.3V

2

1

vx_c0603_small

1
2

1
C0619
10UF/6.3V

C0613
1UF/6.3V

1
C0616
1UF/6.3V

2

2

C0623
1UF/6.3V

2

2

C0607
1UF/6.3V

C0637
1UF/6.3V

1

1

2

C0636
1UF/6.3V

vx_c0603_small

2

1
2

C0618
10UF/6.3V

1

1

1
C0634
1UF/6.3V

1
C0611
1UF/6.3V

2

C0606
1UF/6.3V

2

1
2
1

2

C0635
1UF/6.3V

2

C0609
1UF/6.3V

2

2

C0610
1UF/6.3V

C0632
1UF/6.3V

1

C0631
1UF/6.3V

1

2

1
2
2

1

C0628
1UF/6.3V

vx_c0603_small

AA14
AA15
AB17
AB20
AC13
AD16
AD18
AD21
AE14
AE15
AF16
AF18
AF20
AG15
AG16
AG17
AG20
AG21
AJ14
AJ15

C0617
10UF/6.3V

vx_c0603_small

1
C0630
1UF/6.3V

2

1
2

1
2

C0633
1UF/6.3V

1
C0604
10UF/6.3V

2

1
2

C0605
10UF/6.3V

vx_c0603_small

+VCCP

C0629
1UF/6.3V

vx_c0603_small

1
C0603
10UF/6.3V

2

1
C0602
10UF/6.3V

2

2

C0627
1UF/6.3V

vx_c0603_small

1

vx_c0603_small

C0626
1UF/6.3V

2

2

C0625
1UF/6.3V

1

1

1
C0624
1UF/6.3V

2

1
C0608
1UF/6.3V

2

1
C0615
1UF/6.3V

2

1
C0612
1UF/6.3V

2

1

C

2

PEG AND DDR

POWER

AF46
AG48
AG50
AG51
AJ17
AJ21
AJ25
AJ43
AJ47
AK50
AK51
AL14
AL15
AL16
AL20
AL22
AL26
AL45
AL48
AM16
AM17
AM21
AM43
AM47
AN20
AN42
AN45
AN48

+VCCP
VCCIO47
VCCIO46
VCCIO45
VCCIO44
VCCIO43
VCCIO42
VCCIO41
VCCIO40
VCCIO39
VCCIO38
VCCIO37
VCCIO36
VCCIO35
VCCIO33
VCCIO32
VCCIO31
VCCIO30
VCCIO29
VCCIO25
VCCIO24

C0601
10UF/6.3V

vx_c0603_small

+3VA

R0601
W16
W17

+VCCIO_CPU_F

1

2

2

VCCIO49
VCCIO48

NB_R0603_32MIL_SMALL

R0615
10KOhm

1

@

VCCIO_SEL

BC22

VCCP_SEL

SENSE LINES

B

+VCCP

VCC_SENSE
VSS_SENSE

VCCIO_SENSE
VSS_SENSE_VCCIO

F43
G43

VCC_SENSE_R
VSS_SENSE_R

5%

2
43Ohm
10V240000039

VCCSENSE
VSSSENSE

80

SP0601
1

2
2

Close to VR
R0609
130Ohm
1%

2

VR_SVID_CLK

80

R0608
130Ohm
1%

SP0602
1

2

VR_SVID_DATA

80

VCCSENSE 80
VSSSENSE 80

SP0604
10Ohm2 1% +VCCP NB_R0402_20MIL_SMALL

AN16
AN17

+VCCP_SENSE
+VSSP_SENSE
R0614

VR_SVID_ALERT#

SP0603
NB_R0402_20MIL_SMALL
1
2
1
2
@

R0616 1

1
R0602

Close to CPU

R0605
54.9Ohm
1%

1

H_CPU_SVIDALRT#
H_CPU_SVIDCLK
H_CPU_SVIDDAT

2

A44
B43
C44

Close to VR

R0603
75Ohm
1%

Close to CPU

+VCCP

2

C0622
1UF/6.3V

+VCCP

1

VIDALERT#
VIDSCLK
VIDSOUT

2
0Ohm

+VCCP

1

1
R0613

+VCCP

1

AM25
AN22
1

VCCPQE1
VCCPQE0

2

QUIET RAILS

R2.0 12/19

SVID

B

VCC74
VCC73
VCC72
VCC71
VCC70
VCC69
VCC68
VCC67
VCC66
VCC65
VCC64
VCC63
VCC62
VCC61
VCC60
VCC59
VCC58
VCC57
VCC56
VCC55
VCC54
VCC53
VCC52
VCC51
VCC50
VCC49
VCC48
VCC47
VCC46
VCC45
VCC44
VCC43
VCC42
VCC41
VCC40
VCC39
VCC38
VCC37
VCC36
VCC35
VCC34
VCC33
VCC32
VCC31
VCC30
VCC29
VCC28
VCC27
VCC26
VCC25
VCC24
VCC23
VCC22
VCC21
VCC20
VCC19
VCC18
VCC17
VCC16
VCC15
VCC14
VCC13
VCC12
VCC11
VCC10
VCC9
VCC8
VCC7
VCC6
VCC5
VCC4
VCC3
VCC2
VCC1
VCC0

CORE SUPPLY

C

A26
A29
A31
A34
A35
A38
A39
A42
C26
C27
C32
C34
C37
C39
C42
D27
D32
D34
D37
D39
D42
E26
E28
E32
E34
E37
E38
F25
F26
F28
F32
F34
F37
F38
F42
G42
H25
H26
H28
H29
H32
H34
H35
H37
H38
H40
J25
J26
J28
J29
J32
J34
J35
J37
J38
J40
J42
K26
K27
K29
K32
K34
K35
K37
K39
K42
L25
L28
L33
L36
L40
N26
N30
N34
N38

VCCIO34
VCCIO28
VCCIO27
VCCIO26
VCCIO23
VCCIO22
VCCIO21
VCCIO20
VCCIO19
VCCIO18
VCCIO17
VCCIO16
VCCIO15
VCCIO14
VCCIO13
VCCIO12
VCCIO11
VCCIO10
VCCIO9
VCCIO8
VCCIO7
VCCIO6
VCCIO5
VCCIO4
VCCIO3
VCCIO2
VCCIO1
VCCIO0

1

D

+VCORE

1

D

1 10Ohm

82
82

21%

@
ES1
01V010000003
A

A

Title : CPU(4)_PWR
Engineer:

BG1-HW RD Div.2-NB RD Dept.5
Size

5

4

3

2

Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
1.0
Sheet
1

6

of

93

5

4

3

2

1

Decoupling guide from Intel PDDG R0.8
+VGFX_CORE
1uF * 11pcs
10uF * 6pcs
22uF * 6pcs

+VGFX_CORE
1uF * 11pcs
10uF * 6pcs
22uF * 8pcs(power request)

+VCCP
+1.5V
+VCCSA

D

+VGFX_CORE

25,26,57,80,84

+VGFX_CORE

+1.5VS

+1.5VS

9,80

26,53,57,91

+V_SM_VREF

D

83

1
C0730
1UF/6.3V

2

1
C0729
1UF/6.3V

2

C0732
1UF/6.3V

2

2

C0726
1UF/6.3V

1

1

1
C0731
1UF/6.3V

2

1
2

1
2

1
2

C0727
1UF/6.3V

5,16,17,18,57,60,83

+1.8VS

+VGFX_CORE

+V_SM_VREF

C0725
1UF/6.3V

3,4,6,30,32,57,82

+1.5V

+VCCSA 85

+1.8VS

Graphics core voltage
Voltage range: 0 - 1.52V

+VCCP

C0728
1UF/6.3V

DDR3 Reference Voltage

R1.1
add S3 power reduction

+1.5VS_VCCDDQ

U0301G

1

1

1

2

C0794
0.1UF/10V

Processor I/O supply
voltage for DDR3
(DC + AC specification)

2

R0710
1KOhm

GRAPHICS

1

+1.5VS_VCCDDQ

C

1
C0770
10UF/6.3V

2

1
C0765
10UF/6.3V

vx_c0603_small

2

1
2

C0767
10UF/6.3V

vx_c0603_small

1

>0

C0737
1UF/6.3V

1
2

SUSB_EC#
+1.5V_VCCDDQ

2
0Ohm

C0714
1UF/6.3V

B

+1.5V_VCCDDQ Power Good
(U0404 pin 4)
+0.75VS
>100 ns

VDDQ_SENSE
VSS_SENSE_VDDQ

BC43
BA43

1
1

R1.0 0209
Intel Comments

T0701
T0702

U10
1

@

R0704

VCCSA_VID[0]
VCCSA_VID[1]

VCCSA_SEL0
VCCSA_SEL1

D48
D49

2
0Ohm

VCCSA_SENSE
Close to CPU

VCCSA_SEL0
VCCSA_SEL1

85
85

85

+VCCSA_SEL0

R0708
1KOhm
@

+VCCSA_SEL1

VCCSA

L

L

0.9V

VCCSA_SEL0

L

H

0.85V

VCCSA_SEL1

H

L

0.725V

H

H

0.675V

R0709
1KOhm
@
1

VCCSA_SENSE

2

+VCCP

R0701
1KOhm

Chief River
1

2

C0734
1UF/6.3V

VCCSA15
VCCSA14
VCCSA13
VCCSA12
VCCSA11
VCCSA10
VCCSA9
VCCSA8
VCCSA7
VCCSA6
VCCSA5
VCCSA4
VCCSA3
VCCSA2
VCCSA1
VCCSA0

1
R0707

2

C0793
10UF/6.3V

L17
L21
N16
N20
N22
P17
P20
R16
R18
R21
U15
V16
V17
V18
V21
W20

AM28
AN26

R0702
1KOhm
1

1
2

1
1
C0733
1UF/6.3V

2

1
C0736
1UF/6.3V

C0777
10UF/6.3V

vx_c0603_small

2

1
C0735
1UF/6.3V

2

2

1

vx_c0603_small

C0792
10UF/6.3V

2

1
C0781
10UF/6.3V

2

1
C0783
10UF/6.3V

2

2

vx_c0603_small

vx_c0603_small

SA RAIL

1

vx_c0603_small

MAX:10A
TDC: 6A

VCCDQ1
VCCDQ0

2

C0764
1UF/6.3V

CE0702
330UF/2V

1

2

C0761
1UF/6.3V

+VCCSA

QUIET RAILS

VAXG_SENSE
VSSAXG_SENSE

VCCPLL2
VCCPLL1
VCCPLL0

C0768
10UF/6.3V

vx_c0603_small

2

1

1
2

CE0701
330UF/2V

BB3
BC1
BC4

R1.1
add S3 power reduction

vx_c0603_small

1
C0769
10UF/6.3V

2

1
C0772
10UF/6.3V

vx_c0603_small

2

C0774
10UF/6.3V

2

2

C0775
10UF/6.3V

vx_c0603_small

1

vx_c0603_small
1

vx_c0603_small

Filtered(BGA Only)

1.8V RAIL

MAX:1.2A
TDC: 1.2A

C0711
1UF/6.3V

+1.5VS_VCCDDQ
1uF * 10pcs
10uF * 8pcs
330uF * 1pcs

SP0702
NB_R0402_20MIL_SMALL

+1.8VS

ICCMAX_VDDQ 5A

Decoupling guide from Intel (EE)

SENSE LINES

F45
G45

1

Chief River

SENSE
LINES

80 VCCGT_SENSE
80 VSSGT_SENSE

PLL supply voltage
(DC + AC specification)

2

1

@ 3MM_OPEN_5MIL

1
C0712
1UF/6.3V

2

1
C0710
1UF/6.3V

2

1
C0713
1UF/6.3V

2

1
C0708
1UF/6.3V

2

1
C0707
1UF/6.3V

2

1
C0706
1UF/6.3V

2

1
C0705
1UF/6.3V

2

1
C0709
1UF/6.3V

2

1
C0704
1UF/6.3V

2

1

2

+1.5VS_VCCDDQ
SP0701
NB_R0402_20MIL_SMALL
1
2
1
2

B

+1.5VS
JP0701

MAX:5A

2

VDDQ25
VDDQ24
VDDQ23
VDDQ22
VDDQ21
VDDQ20
VDDQ19
VDDQ18
VDDQ17
VDDQ16
VDDQ15
VDDQ14
VDDQ13
VDDQ12
VDDQ11
VDDQ10
VDDQ9
VDDQ8
VDDQ7
VDDQ6
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1
VDDQ0

AJ28
AJ33
AJ36
AJ40
AL30
AL34
AL38
AL42
AM33
AM36
AM40
AN30
AN34
AN38
AR26
AR28
AR30
AR32
AR34
AR36
AR40
AV41
AW26
BA40
BB28
BG33

1

C

+V_SM_VREF

AY43

2

C0745
22UF/6.3V

SM_VREF

- 1.5V RAILS

1
C0744
22UF/6.3V

2

C0743
22UF/6.3V

2

1

vx_c0603_small

1

1
C0742
22UF/6.3V

2

C0741
22UF/6.3V

C0786
10UF/6.3V

R0703
1KOhm

+V_SM_VREF

DDR3

1
C0787
10UF/6.3V

2

C0789
10UF/6.3V

vx_c0603_small

1
C0740
22UF/6.3V

2

1
C0739
22UF/6.3V

2

1
C0738
22UF/6.3V

2

2

1

vx_c0603_small

1

1
C0788
10UF/6.3V

2

C0791
10UF/6.3V

2

1

vx_c0603_small

2

C0790
10UF/6.3V

2

2

1

vx_c0603_small

1

vx_c0603_small

VAXG21
VAXG20
VAXG19
VAXG18
VAXG17
VAXG16
VAXG15
VAXG14
VAXG13
VAXG12
VAXG11
VAXG10
VAXG9
VAXG8
VAXG7
VAXG6
VAXG5
VAXG4
VAXG3
VAXG2
VAXG1
VAXG0
VAXG55
VAXG54
VAXG53
VAXG52
VAXG51
VAXG50
VAXG49
VAXG48
VAXG47
VAXG46
VAXG45
VAXG44
VAXG43
VAXG42
VAXG41
VAXG40
VAXG39
VAXG38
VAXG37
VAXG36
VAXG35
VAXG34
VAXG33
VAXG32
VAXG31
VAXG30
VAXG29
VAXG28
VAXG27
VAXG26
VAXG25
VAXG24
VAXG23
VAXG22

POWER

C0722
1UF/6.3V

2

C0719
1UF/6.3V

2

1
C0717
1UF/6.3V

2

2

1

2

+V_SM_REF 10mil

AA46
AB47
AB50
AB51
AB52
AB53
AB55
AB56
AB58
AB59
AC61
AD47
AD48
AD50
AD51
AD52
AD53
AD55
AD56
AD58
AD59
AE46
N45
P47
P48
P50
P51
P52
P53
P55
P56
P61
T48
T58
T59
T61
U46
V47
V48
V50
V51
V52
V53
V55
V56
V58
V59
W50
W51
W52
W53
W55
W56
W61
Y48
Y61

A

A

ES1
01V010000003

Decoupling guide for A14 (EE)
+VCCSA
1uF * 5pcs
10uF * 5pcs

Title : CPU(5)_GFX_PWR
Engineer:

BG1-HW RD Div.2-NB RD Dept.5
Size

5

4

3

2

Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
1.0
Sheet
1

7

of

93

5

4

3

2

1

D

D

A13
A17
A21
A25
A28
A33
A37
A40
A45
A49
A53
A9
AA1
AA13
AA50
AA51
AA52
AA53
AA55
AA56
AA8
AB16
AB18
AB21
AB48
AB61
AC10
AC14
AC46
AC6
AD17
AD20
AD4
AD61
AE13
AE8
AF1
AF17
AF21
AF47
AF48
AF50
AF51
AF52
AF53
AF55
AF56
AF58
AF59
AG10
AG14
AG18
AG47
AG52
AG61
AG7
AH4
AH58
AJ13
AJ16
AJ20
AJ22
AJ26
AJ30
AJ34
AJ38
AJ42
AJ45
AJ48
AJ7
AK1
AK52
AL10
AL13
AL17
AL21
AL25
AL28
AL33
AL36
AL40
AL43
AL47
AL61
AM13
AM20
AM22
AM26
AM30
AM34

C

B

VSS299
VSS298
VSS297
VSS296
VSS295
VSS294
VSS293
VSS292
VSS291
VSS290
VSS289
VSS300
VSS177
VSS175
VSS174
VSS173
VSS172
VSS171
VSS170
VSS169
VSS176
VSS168
VSS167
VSS166
VSS165
VSS164
VSS162
VSS161
VSS160
VSS163
VSS158
VSS157
VSS159
VSS156
VSS154
VSS155
VSS153
VSS152
VSS151
VSS150
VSS149
VSS148
VSS147
VSS146
VSS145
VSS144
VSS143
VSS142
VSS141
VSS139
VSS138
VSS137
VSS136
VSS135
VSS134
VSS140
VSS133
VSS132
VSS130
VSS129
VSS128
VSS127
VSS126
VSS125
VSS124
VSS123
VSS122
VSS121
VSS120
VSS131
VSS119
VSS118
VSS117
VSS116
VSS115
VSS114
VSS113
VSS112
VSS111
VSS110
VSS109
VSS108
VSS107
VSS106
VSS104
VSS103
VSS102
VSS101
VSS100
VSS99

U0301I

VSS

VSS98
VSS105
VSS97
VSS96
VSS95
VSS94
VSS93
VSS92
VSS91
VSS90
VSS89
VSS88
VSS87
VSS86
VSS85
VSS84
VSS83
VSS81
VSS80
VSS79
VSS82
VSS77
VSS76
VSS75
VSS74
VSS73
VSS72
VSS78
VSS70
VSS69
VSS68
VSS71
VSS67
VSS66
VSS65
VSS64
VSS62
VSS61
VSS60
VSS59
VSS63
VSS58
VSS57
VSS56
VSS55
VSS54
VSS53
VSS52
VSS50
VSS49
VSS48
VSS51
VSS45
VSS44
VSS43
VSS42
VSS47
VSS41
VSS40
VSS39
VSS38
VSS37
VSS46
VSS36
VSS35
VSS34
VSS33
VSS32
VSS31
VSS30
VSS29
VSS28
VSS26
VSS27
VSS25
VSS23
VSS22
VSS21
VSS20
VSS19
VSS18
VSS17
VSS16
VSS15
VSS14
VSS13
VSS12
VSS24
VSS11
VSS9

AM38
AM4
AM42
AM45
AM48
AM58
AN1
AN21
AN25
AN28
AN33
AN36
AN40
AN43
AN47
AN50
AN54
AP10
AP51
AP55
AP7
AR13
AR17
AR21
AR41
AR48
AR61
AR7
AT14
AT19
AT36
AT4
AT45
AT52
AT58
AU1
AU11
AU28
AU32
AU51
AU7
AV17
AV21
AV22
AV34
AV40
AV48
AV55
AW13
AW43
AW61
AW7
AY14
AY19
AY30
AY36
AY4
AY41
AY45
AY49
AY55
AY58
AY9
BA1
BA11
BA17
BA21
BA26
BA32
BA48
BA51
BB53
BC13
BC5
BC57
BD12
BD16
BD19
BD23
BD27
BD32
BD36
BD40
BD44
BD48
BD52
BD56
BD8
BE5
BG13

BG17
BG21
BG24
BG28
BG37
BG41
BG45
BG49
BG53
BG9
C29
C35
C40
D10
D14
D18
D22
D26
D29
D35
D4
D40
D43
D46
D50
D54
D58
D6
E25
E29
E3
E35
E40
F13
F15
F19
F29
F35
F40
F55
G48
G51
G6
G61
H10
H14
H17
H21
H4
H53
H58
J1
J49
J55
K11
K21
K51
K8
L16
L20
L22
L26
L30
L34
L38
L43
L48
L61
M11
M15

VSS8
VSS7
VSS6
VSS5
VSS4
VSS3
VSS2
VSS1
VSS0
VSS10
VSS288
VSS287
VSS286
VSS283
VSS282
VSS281
VSS280
VSS279
VSS278
VSS277
VSS285
VSS276
VSS275
VSS274
VSS273
VSS272
VSS271
VSS284
VSS269
VSS268
VSS270
VSS267
VSS266
VSS265
VSS264
VSS263
VSS262
VSS261
VSS260
VSS259
VSS257
VSS256
VSS258
VSS255
VSS253
VSS252
VSS251
VSS250
VSS254
VSS249
VSS248
VSS247
VSS246
VSS245
VSS243
VSS242
VSS241
VSS244
VSS240
VSS239
VSS238
VSS237
VSS236
VSS235
VSS234
VSS233
VSS232
VSS231
VSS228
VSS227

VSS

NCTF

U0301H

VSS230
VSS226
VSS229
VSS225
VSS224
VSS223
VSS222
VSS221
VSS220
VSS219
VSS218
VSS217
VSS216
VSS215
VSS214
VSS213
VSS212
VSS211
VSS209
VSS208
VSS207
VSS206
VSS205
VSS204
VSS210
VSS202
VSS201
VSS203
VSS200
VSS199
VSS198
VSS197
VSS196
VSS195
VSS194
VSS193
VSS192
VSS190
VSS191
VSS189
VSS188
VSS186
VSS185
VSS184
VSS183
VSS182
VSS187
VSS181
VSS180
VSS179
VSS178

VSS_NCTF13
VSS_NCTF12
VSS_NCTF6
VSS_NCTF5
VSS_NCTF4
VSS_NCTF3
VSS_NCTF2
VSS_NCTF1
VSS_NCTF0
VSS_NCTF11
VSS_NCTF10
VSS_NCTF9
VSS_NCTF8
VSS_NCTF7

M4
M58
M6
N1
N17
N21
N25
N28
N33
N36
N40
N43
N47
N48
N51
N52
N56
N61
P14
P16
P18
P21
P58
P59
P9
R17
R20
R4
R46
T1
T47
T50
T51
T52
T53
T55
T56
U13
U8
V20
V61
W13
W15
W18
W21
W46
W8
Y4
Y47
Y58
Y59

C

A5
A57
BC61
BD3
BD59
BE4
BE58
BG5
BG57
C3
C58
D59
E1
E61

B

ES1
01V010000003

ES1
01V010000003

A

A

Title : CPU(6)_GND
Engineer:

BG1-HW RD Div.2-NB RD Dept.5
Size

5

4

3

2

Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
1.0
Sheet
1

8

of

93

5

4

3

2

1

CFG strapping information:
CFG[2]: PCIE Static Numbering Lane Reversal- CFG[2] is for the 16x
- 1: (Default) Normal Operation, Lane # definition matches sockect pin map definition
- 0: Lane Numbers Reversed

U0301E

Chief River

D

- 1: (Default) Disabled ; No Physical Display Port attached to Embedded DisplayPort
- 0: Enabled ; An external Display Port device is connected to the Embedded Display Port
CFG[6:5]: PCI Express Port Bifurcation Straps
-

11
10
01
00

:
:
:
:

(Default) x 1 6
x 8,x8
Reserved
x8,x4,x4

CFG[7]: PEG DEFER TRAINING
- 1: (Default) PEG Train immediately following xxRESETB de assertion
- 0: PEG Wait for BIOS training

Joyoung R1.0
CFG2

1
R0902

CFG4

1%
/DGPU

2
1KOhm

1

1%
2
/eDP 1KOhm

1

1%
@

R0903

T0918
T0901
T0919
T0902
T0923
T0920
T0921
T0922
T0903
T0904
T0905
T0906
T0907
T0908
T0909
T0910
T0911
T0912

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

T0913
T0914

1
1

VCC_VAL_SENSE
VSS_VAL_SENSE

H43
K43

T0915
T0916

1
1

VAXG_VAL_SENSE
VSSAXG_VAL_SENSE

H45
K45

T0917

1

VCC_DIE_SENSE

F48

R2.1 01/09
CFG5
R0904
CFG6

1%
@

2
1KOhm

1

1%
@

2
1KOhm

R0906

H48
K48
BA19
AV19
AT21
BB21
BB19
AY21
BA22
AY22
AU19
AU21
BD21
BD22
BD25
BD26
BG22
BE22
BG26
BE26
BF23
BE24

C

CFG7

B50
C51
B54
D53
A51
C53
C55
H49
A55
H51
K49
K53
F53
G53
L51
F51
D52
L53

2
1KOhm

1
R0905

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17

CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
VCC_VAL_SENSE
VSS_VAL_SENSE
VAXG_VAL_SENSE
VSSAXG_VAL_SENSE

RSVD7
RSVD2

DDR_WR_VREF01
DDR_WR_VREF02

BE7
BG7

D

RSVD31
RSVD36
RSVD35
RSVD34
RSVD33
RSVD32
RSVD28
RSVD27
RSVD29
RSVD21
RSVD38

RESERVED

CFG[4]: Embedded DisplayPort Detection

RSVD25
RSVD26
RSVD24
RSVD23
RSVD30

N42
L42
L45
L47
M13
M14
U14
W14
P13
AT49
K24
AH2
AG13
AM14
AM15
N50

VCC_DIE_SENSE
RSVD39
RSVD37
RSVD15
RSVD18
RSVD22
RSVD12
RSVD13
RSVD17
RSVD14
RSVD16
RSVD20
RSVD19
RSVD11
RSVD10
RSVD9
RSVD8
RSVD1
RSVD6
RSVD0
RSVD4
RSVD3
RSVD5

DC_TEST_A4
DC_TEST_C4
DC_TEST_D3
DC_TEST_D1
DC_TEST_A58
DC_TEST_A59
DC_TEST_C59
DC_TEST_A61
DC_TEST_C61
DC_TEST_D61
DC_TEST_BD61
DC_TEST_BE61
DC_TEST_BE59
DC_TEST_BG61
DC_TEST_BG59
DC_TEST_BG58
DC_TEST_BG4
DC_TEST_BG3
DC_TEST_BE3
DC_TEST_BG1
DC_TEST_BE1
DC_TEST_BD1

A4
C4
D3
D1
A58
A59
C59
A61
C61
D61
BD61
BE61
BE59
BG61
BG59
BG58
BG4
BG3
BE3
BG1
BE1
BD1

C

ES1
01V010000003

For iFDIM testing
R0912~ R0917 close to pin < 1 inch

PROCESSOR DRIVEN Vref PATH WAS STUFFED BY DEFAULT:

R1.1 0512

B

B

2 0Ohm

1

18

@

1
R0912
49.9Ohm
1%
VAXG_VAL_SENSE

2
R0913
100Ohm
1%

1

1KOhm

2

@

3

DIMM1_VREF_DQ

VCC_VAL_SENSE

R0916
100Ohm
1%

1

VSS_VAL_SENSE

R0914
49.9Ohm
1%

@

R0917
49.9Ohm
1%

18

5

@ Q0901B
UM6K1N
4

2

2 0Ohm

1

R0915
49.9Ohm
1%

2

1
@
R0908

1 R910

@

VSSAXG_VAL_SENSE

5,21,30 DRAMRST_CNTRL_PCH

DDR_WR_VREF02

@

1

1%

+VCORE

2

DIMM0_VREF_DQ

2

1 R0909

6

2

@ Q0901A
UM6K1N
1

DDR_WR_VREF01

1

+VGFX_CORE

2

R0907

A

A

1KOhm

2

1%

Title : CPU(7)_RSVD
Engineer:

BG1-HW RD Div.2-NB RD Dept.5
Size

5

4

3

2

Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
1.0
Sheet
1

9

of

93

5

4

3

2

1

D

D

C

C

CPU XDP connector

Check Connector

PCH XDP connector

B

B

A

A

Title : CPU_PCH_XDP
BG1-HW RD Div.2-NB RD Dept.5
Size

5

4

3

2

Joyoung_Chianhg

Project Name

Custom
Date:

Engineer:

Rev

MA50

1.0

Monday, February 13, 2012

Sheet
1

10

of

93

5

4

3

2

1

D

D

+VCORE
vx_c0402_small
C1108

C1109

1

C1107

1

C1106

1

C1105

1

vx_c0402_small
1

1

1

C1104

C1110

vx_c0402_small

2

2

2

2

2

vx_c0402_small

vx_c0402_small

C1114

C1115

1

C1113

1

1

vx_c0402_small

1

C1112

2

vx_c0402_small

vx_c0402_small
1

C1111

2

2

2

vx_c0402_small
vx_c0402_small
1

+VCORE 2.2uF * 16 pcs
22uF * 12 pcs

vx_c0402_small

C1103

2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V

2

Decoupling guide from Intel PDDG R0.8

vx_c0402_small
C1102

1

1

C1101

1

vx_c0402_small

Chief River

C1117

vx_c0402_small

2

2

2

2

2

2

2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V
vx_c0402_small

vx_c0402_small

Chief River
+VCORE 2.2uF * 16 pcs
22uF * 18 pcs (power request)

1
C1153
22UF/6.3V

1
C1151
22UF/6.3V

2

2

C1150
22UF/6.3V

2

1
C1143
22UF/6.3V

1

2

1
C1142
22UF/6.3V

1
C1149
22UF/6.3V

2

2

C1148
22UF/6.3V

2

1
C1141
22UF/6.3V

1

2

1
C1140
22UF/6.3V

1
C1147
22UF/6.3V

2

2

C1146
22UF/6.3V

2

1
C1139
22UF/6.3V

1

2

1
2

2

C1138
22UF/6.3V

1
C1145
22UF/6.3V

2

C1144
22UF/6.3V

2

2

C1137
22UF/6.3V

1

C1136
22UF/6.3V

1

2

1

C

1

C

C1152
22UF/6.3V

B

B

A

A

Title : CPU DECOUPLING
Engineer:

BG1-HW RD Div.2-NB RD Dept.5
Size

5

4

3

2

Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
1.0
Sheet
1

11

of

93

5

4

3

2

1

Memory Down CH A
R1.1
+1.5V

5,17,18,57,60,83

+0.75VS

17,57,83

11/04
U1602
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

U1601

5 M_A_DQS#[7:0]

5

M_A_A[15:0]

M_A_BS0
M_A_BS1
M_A_BS2

0

C1631
2

J2
K8
J3
M_A_DQ3
M_A_DQ0
M_A_DQ5
M_A_DQ4
M_A_DQ6
M_A_DQ2
M_A_DQ7
M_A_DQ1

1

1.6PF/16V
1AV200000069
5

M_A_DQS0
M_A_DQS#0

5 M_A_DIM0_CLK_DDR0
5 M_A_DIM0_CLK_DDR#0
5 M_A_DIM0_CKE0

M_A_DIM0_CS#0
M_A_RAS#

Near Memory Controller

DDR3_DRAMRST#
M_A_WE#

5,17 DDR3_DRAMRST#
5
M_A_WE#

CAS#
CK
CK#
CKE
CS#
RAS#

N2
H3

M_A_DIM0_ODT0

NC1
NC2
NC3
NC4
NC5

RESET# VREFCA
WE#
VREFDQ

G1
H8

ODT
ZQ

DM/TDQS
NU/TDQS#

1

5 M_A_DIM0_ODT0

VDDQ1
VDDQ2
VDDQ3
VDDQ4

DQS
DQS#

G3
F7
G7
G9
H2
F3

M_A_DIM0_CKE0
5 M_A_DIM0_CS#0
5
M_A_RAS#

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7

C3
D3

M_A_CAS#
M_A_DIM0_CLK_DDR0
M_A_DIM0_CLK_DDR#0

M_A_CAS#

BA0
BA1
BA2

B3
C7
C2
C8
E3
E8
D2
E7

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5

B2
B8
C9
D1
D9

M_A_BS0
M_A_BS1
M_A_BS2

A2
A9
D7
G2
G8
K1
K9
M1
M9

M_A_DQ23
M_A_DQ21
M_A_DQ22
M_A_DQ20
M_A_DQ19
M_A_DQ17
M_A_DQ18
M_A_DQ16

+1.5V

2

A3
F1
F9
H1
H9
FBA_VREF_CA0_MD
FBA_VREF_DQ0_MD

J8
E1

G3
F7
G7
G9
H2
F3

DDR3_DRAMRST#
M_A_WE#

N2
H3

M_A_DIM0_ODT0

G1
H8

DQS
DQS#

B2
B8
C9
D1
D9

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5

A2
A9
D7
G2
G8
K1
K9
M1
M9

FBA_VREF_CA0_MD
FBA_VREF_DQ0_MD

B7
A7

DM/TDQS
NU/TDQS#

R1602
240Ohm

EDJ4208BASE-DJ-F
03V150000026

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

J2
K8
J3
M_A_DQ8
M_A_DQ14
M_A_DQ13
M_A_DQ11
M_A_DQ15
M_A_DQ10
M_A_DQ9
M_A_DQ12

1

J8
E1

RESET# VREFCA
WE#
VREFDQ
ODT
ZQ

+1.5V

A3
F1
F9
H1
H9

NC1
NC2
NC3
NC4
NC5

K3
L7
L3
K2
L8
L2
M8
M2
N8
M3
H7
M7
K7
N3
N7
J7

M_A_BS0
M_A_BS1
M_A_BS2

B9
C1
E2
E9

VDDQ1
VDDQ2
VDDQ3
VDDQ4

CAS#
CK
CK#
CKE
CS#
RAS#

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

A1
A8
B1
D8
F2
F8
J1
J9
L1
L9
N1
N9

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7

C3
D3

M_A_CAS#
M_A_DIM0_CLK_DDR0
M_A_DIM0_CLK_DDR#0
M_A_DIM0_CKE0
M_A_DIM0_CS#0
M_A_RAS#

B7
A7

BA0
BA1
BA2

B3
C7
C2
C8
E3
E8
D2
E7

M_A_DQS2
M_A_DQS#2

B9
C1
E2
E9

U1603

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

J2
K8
J3

Follow design guide 460452 / 2.6.14
R1601
240Ohm

K3
L7
L3
K2
L8
L2
M8
M2
N8
M3
H7
M7
K7
N3
N7
J7

BA0
BA1
BA2

B3
C7
C2
C8
E3
E8
D2
E7

M_A_DQS1
M_A_DQS#1

C3
D3

M_A_CAS#
M_A_DIM0_CLK_DDR0
M_A_DIM0_CLK_DDR#0
M_A_DIM0_CKE0
M_A_DIM0_CS#0
M_A_RAS#

G3
F7
G7
G9
H2
F3

DDR3_DRAMRST#
M_A_WE#

N2
H3

M_A_DIM0_ODT0

G1
H8

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7

VDDQ1
VDDQ2
VDDQ3
VDDQ4

DQS
DQS#
CAS#
CK
CK#
CKE
CS#
RAS#

NC1
NC2
NC3
NC4
NC5

RESET# VREFCA
WE#
VREFDQ
ODT
ZQ

DM/TDQS
NU/TDQS#

U1604

A1
A8
B1
D8
F2
F8
J1
J9
L1
L9
N1
N9

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

B2
B8
C9
D1
D9
A2
A9
D7
G2
G8
K1
K9
M1
M9

M_A_BS0
M_A_BS1
M_A_BS2

+1.5V

A3
F1
F9
H1
H9
FBA_VREF_CA0_MD
FBA_VREF_DQ0_MD

B7
A7

R1603
240Ohm

EDJ4208BASE-DJ-F
03V150000026

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

J2
K8
J3
M_A_DQ30
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ25
M_A_DQ26
M_A_DQ24
M_A_DQ31

3

B9
C1
E2
E9

J8
E1

K3
L7
L3
K2
L8
L2
M8
M2
N8
M3
H7
M7
K7
N3
N7
J7

BA0
BA1
BA2

B3
C7
C2
C8
E3
E8
D2
E7

M_A_DQS3
M_A_DQS#3

C3
D3

M_A_CAS#
M_A_DIM0_CLK_DDR0
M_A_DIM0_CLK_DDR#0
M_A_DIM0_CKE0
M_A_DIM0_CS#0
M_A_RAS#

G3
F7
G7
G9
H2
F3

DDR3_DRAMRST#
M_A_WE#

N2
H3

M_A_DIM0_ODT0

G1
H8

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQS
DQS#

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDDQ1
VDDQ2
VDDQ3
VDDQ4

CAS#
CK
CK#
CKE
CS#
RAS#

NC1
NC2
NC3
NC4
NC5

RESET# VREFCA
WE#
VREFDQ
ODT
ZQ

DM/TDQS
NU/TDQS#

A1
A8
B1
D8
F2
F8
J1
J9
L1
L9
N1
N9

D

B2
B8
C9
D1
D9
A2
A9
D7
G2
G8
K1
K9
M1
M9

+1.5V

B9
C1
E2
E9
A3
F1
F9
H1
H9
J8
E1

FBA_VREF_CA0_MD
FBA_VREF_DQ0_MD

B7
A7

EDJ4208BASE-DJ-F
03V150000026

R1604
240Ohm

EDJ4208BASE-DJ-F
03V150000026

2

2

5 M_A_BS[2:0]

A1
A8
B1
D8
F2
F8
J1
J9
L1
L9
N1
N9

1

FBA_VREF_CA0_MD

5 M_A_DQS[7:0]

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12

2

17,18 +V_VREF_CA_DIMM0
5 M_A_DQ[63:0]
D

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

1

FBA_VREF_DQ0_MD

K3
L7
L3
K2
L8
L2
M8
M2
N8
M3
H7
M7
K7
N3
N7
J7

2

17,18 +V_VREF_DQ_DIMM0

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

1

+1.5V
+0.75VS

U1605

J2
K8
J3
M_A_DQ33
M_A_DQ32
M_A_DQ35
M_A_DQ39
M_A_DQ34
M_A_DQ37
M_A_DQ38
M_A_DQ36

4

BA0
BA1
BA2

B3
C7
C2
C8
E3
E8
D2
E7

M_A_DQS4
M_A_DQS#4

C3
D3

M_A_CAS#
M_A_DIM0_CLK_DDR0
M_A_DIM0_CLK_DDR#0
M_A_DIM0_CKE0
M_A_DIM0_CS#0
M_A_RAS#

G3
F7
G7
G9
H2
F3

G1
H8

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQS
DQS#
CAS#
CK
CK#
CKE
CS#
RAS#

VDDQ1
VDDQ2
VDDQ3
VDDQ4
NC1
NC2
NC3
NC4
NC5

RESET# VREFCA
WE#
VREFDQ
ODT
ZQ

DM/TDQS
NU/TDQS#

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

B2
B8
C9
D1
D9
A2
A9
D7
G2
G8
K1
K9
M1
M9

M_A_BS0
M_A_BS1
M_A_BS2

+1.5V

J2
K8
J3

R1605
240Ohm

A3
F1
F9
H1
H9
FBA_VREF_CA0_MD
FBA_VREF_DQ0_MD

B7
A7

B3
C7
C2
C8
E3
E8
D2
E7

M_A_DQS6
M_A_DQS#6

C3
D3

M_A_CAS#
M_A_DIM0_CLK_DDR0
M_A_DIM0_CLK_DDR#0
M_A_DIM0_CKE0
M_A_DIM0_CS#0
M_A_RAS#

G3
F7
G7
G9
H2
F3

DDR3_DRAMRST#
M_A_WE#

N2
H3

M_A_DIM0_ODT0

G1
H8
R1606
240Ohm

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15
BA0
BA1
BA2

B2
B8
C9
D1
D9

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5

CAS#
CK
CK#
CKE
CS#
RAS#

J8
E1

RESET# VREFCA
WE#
VREFDQ
ODT
ZQ

FBA_VREF_CA0_MD
FBA_VREF_DQ0_MD

B3
C7
C2
C8
E3
E8
D2
E7

M_A_DQS5
M_A_DQS#5

C3
D3

M_A_CAS#
M_A_DIM0_CLK_DDR0
M_A_DIM0_CLK_DDR#0
M_A_DIM0_CKE0
M_A_DIM0_CS#0
M_A_RAS#

G3
F7
G7
G9
H2
F3

DDR3_DRAMRST#
M_A_WE#

N2
H3

M_A_DIM0_ODT0

G1
H8

B7
A7

DM/TDQS
NU/TDQS#

M_A_DQ44
M_A_DQ45
M_A_DQ40
M_A_DQ47
M_A_DQ46
M_A_DQ41
M_A_DQ42
M_A_DQ43

5

A3
F1
F9
H1
H9

NC1
NC2
NC3
NC4
NC5

J2
K8
J3

+1.5V

B9
C1
E2
E9

VDDQ1
VDDQ2
VDDQ3
VDDQ4

DQS
DQS#

K3
L7
L3
K2
L8
L2
M8
M2
N8
M3
H7
M7
K7
N3
N7
J7

M_A_BS0
M_A_BS1
M_A_BS2

A2
A9
D7
G2
G8
K1
K9
M1
M9

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

A1
A8
B1
D8
F2
F8
J1
J9
L1
L9
N1
N9

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12

R1607
240Ohm

EDJ4208BASE-DJ-F
03V150000026

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15
BA0
BA1
BA2
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQS
DQS#
CAS#
CK
CK#
CKE
CS#
RAS#

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDDQ1
VDDQ2
VDDQ3
VDDQ4
NC1
NC2
NC3
NC4
NC5

RESET# VREFCA
WE#
VREFDQ
ODT
ZQ

DM/TDQS
NU/TDQS#

U1608

A1
A8
B1
D8
F2
F8
J1
J9
L1
L9
N1
N9

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

B2
B8
C9
D1
D9
A2
A9
D7
G2
G8
K1
K9
M1
M9

M_A_BS0
M_A_BS1
M_A_BS2

+1.5V

A3
F1
F9
H1
H9
J8
E1

J2
K8
J3
M_A_DQ63
M_A_DQ57
M_A_DQ56
M_A_DQ61
M_A_DQ62
M_A_DQ60
M_A_DQ58
M_A_DQ59

7

B9
C1
E2
E9

FBA_VREF_CA0_MD
FBA_VREF_DQ0_MD

B7
A7

K3
L7
L3
K2
L8
L2
M8
M2
N8
M3
H7
M7
K7
N3
N7
J7

B3
C7
C2
C8
E3
E8
D2
E7

M_A_DQS7
M_A_DQS#7

C3
D3

M_A_CAS#
M_A_DIM0_CLK_DDR0
M_A_DIM0_CLK_DDR#0
M_A_DIM0_CKE0
M_A_DIM0_CS#0
M_A_RAS#

G3
F7
G7
G9
H2
F3

DDR3_DRAMRST#
M_A_WE#

N2
H3

M_A_DIM0_ODT0

G1
H8

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15
BA0
BA1
BA2
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQS
DQS#
CAS#
CK
CK#
CKE
CS#
RAS#

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDDQ1
VDDQ2
VDDQ3
VDDQ4
NC1
NC2
NC3
NC4
NC5

RESET# VREFCA
WE#
VREFDQ
ODT
ZQ

DM/TDQS
NU/TDQS#

C

A1
A8
B1
D8
F2
F8
J1
J9
L1
L9
N1
N9
B2
B8
C9
D1
D9
A2
A9
D7
G2
G8
K1
K9
M1
M9

+1.5V

B9
C1
E2
E9
A3
F1
F9
H1
H9
J8
E1

FBA_VREF_CA0_MD
FBA_VREF_DQ0_MD

B7
A7

EDJ4208BASE-DJ-F
03V150000026

R1608
240Ohm

EDJ4208BASE-DJ-F
03V150000026

B

2

2

EDJ4208BASE-DJ-F
03V150000026

2

B

M_A_DQ50
M_A_DQ49
M_A_DQ54
M_A_DQ52
M_A_DQ51
M_A_DQ48
M_A_DQ55
M_A_DQ53

6

B9
C1
E2
E9

J8
E1

K3
L7
L3
K2
L8
L2
M8
M2
N8
M3
H7
M7
K7
N3
N7
J7

1

N2
H3

M_A_DIM0_ODT0

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5

U1606

A1
A8
B1
D8
F2
F8
J1
J9
L1
L9
N1
N9

1

DDR3_DRAMRST#
M_A_WE#

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12

1

M_A_BS0
M_A_BS1
M_A_BS2

U1607

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

1

K3
L7
L3
K2
L8
L2
M8
M2
N8
M3
H7
M7
K7
N3
N7
J7

2

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

C

+0.75VS
M_A_DIM0_ODT0
M_A_WE#
M_A_RAS#
M_A_CAS#

1
3
5
7

RN1603A
36Ohm 2
RN1603B
36Ohm 4
RN1603C
36Ohm 6
RN1603D
36Ohm 8

M_A_A14
M_A_A13
M_A_A9
M_A_A2

1
3
5
7

RN1604A
36Ohm 2
RN1604B
36Ohm 4
RN1604C
36Ohm 6
RN1604D
36Ohm 8

M_A_A5
M_A_A1
M_A_A3

1
3
5
7

RN1605A
36Ohm 2
RN1605B
36Ohm 4
RN1605C
36Ohm 6
RN1605D
36Ohm 8

M_A_A11
M_A_A4
M_A_A6
M_A_A8

1
3
5
7

RN1606A
36Ohm 2
RN1606B
36Ohm 4
RN1606C
36Ohm 6
RN1606D
36Ohm 8

M_A_A12
M_A_BS1

1
3
5
7

RN1607A
36Ohm 2
RN1607B
36Ohm 4
RN1607C
36Ohm 6
RN1607D
36Ohm 8

1
C1648
0.1UF/10V

2

1
C1647
0.1UF/10V

2

1
C1646
0.1UF/10V

2

1
C1645
0.1UF/10V

2

1

1
C1644
0.1UF/10V

2

C1643
0.1UF/10V

2

1
C1642
0.1UF/10V

RN1602A
36Ohm 2
RN1602B
36Ohm 4
RN1602C
36Ohm 6
RN1602D
36Ohm 8

C1649
0.1UF/10V
M_A_DIM0_CLK_DDR0

C1625
10UF/6.3V

2

C1624
10UF/6.3V

2

1

2

1
2

C1623
10UF/6.3V

2

1

1
C1622
10UF/6.3V

2

1
2

1
2

1
2

C1621
10UF/6.3V

1
3
5
7

M_A_BS2
M_A_A0
M_A_A7
M_A_BS0

FBA_VREF_CA0_MD

Layout Note: Place these caps near SO DIMM 0

C1620
10UF/6.3V

RN1601A
36Ohm 2
RN1601B
36Ohm 4
RN1601C
36Ohm 6
RN1601D
36Ohm 8

M_A_DIM0_CKE0
M_A_A10
M_A_A15
M_A_DIM0_CS#0

Place each cap close to each VrefDQ or VrefCA Dram Ball

+1.5V

1
3
5
7

R1613
30OHM
10V220000217

@

+0.75VS

1

FBA_VREF_DQ0_MD

1

1

1

1

1
2

2

2

C1615
C1616
C1617
C1618
C1619
0.1UF/10V 0.1UF/10V0.1UF/10V 0.1UF/10V 0.1UF/10V
2

2

1
C1629
1UF/6.3V

1

2

1

1

C1613
C1614 C1630
0.1UF/10V0.1UF/10V1UF/6.3V
2

1

C1628
0.1UF/16V

2

R1614
30OHM
10V220000217

2

C1654
0.1UF/10V

2

2

1
C1655
0.1UF/10V

C1608
0.1UF/10V

1

C1653
0.1UF/10V

2

1

1
C1652
0.1UF/10V

2

C1651
0.1UF/10V

2

1

1
C1650
0.1UF/10V

2

C1657
0.1UF/10V

2

1

1
C1656
0.1UF/10V

2

2

1
C1607
0.1UF/10V

2

1

1
C1606
0.1UF/10V

2

C1605
0.1UF/10V

2

1
C1604
0.1UF/10V

2

1
C1603
0.1UF/10V

2

1
C1602
0.1UF/10V

2

C1601
0.1UF/10V

2

1
2

1

Layout Note: Place these caps near SODIMM 0
A

2

1

+1.5V

M_A_DIM0_CLK_DDR#0
GND

A

place close to balls

Title : DDR3(1)_SO-DIMM0
BG1-HW RD Div.2-NB RD Dept.5
Size

4

3

2

Joyoung_Chianhg
Rev

MA50

D
Date:
5

Engineer:

Project Name
Monday, February 13, 2012

1

1.0
Sheet

16

of

93

5

3

2

+1.5V

+1.5V

5,16,18,57,60,83

+0.75VS

16,57,83

+3VS

20,21,22,23,24,25,26,27,28,30,32,33,36,37,44,45,48,50,51,53,57,59,61,80,91,92

+1.5V

1

+0.75VS

Layout Note: Place these caps near SO DIMM 1

1

1
C1717
1UF/6.3V

C1719
1UF/6.3V
@

C1730
1UF/6.3V
@

2

C1716
1UF/6.3V

2

C1718
10UF/6.3V
@

1

1

1
C1713
10UF/6.3V
@

2

C1712
10UF/6.3V

2

C1711
10UF/6.3V
@

1

1

1
C1710
10UF/6.3V

2

C1709
10UF/6.3V
@

2

16,18

2

16,18

+V_VREF_DQ_DIMM1

2

+V_VREF_CA_DIMM1

+V_VREF_DQ_DIMM1

2

+V_VREF_CA_DIMM1

CE1703
220UF/4V
@

2

2

+3VS

+

1

+0.75VS

1

1

+1.5V

4

D

D

M_B_A[15:0]

M_B_DQ[63:0]

5

+1.5V

+1.5V

M_B_BS2
M_B_BS1
M_B_BS0

79
108
109
74
73

5 M_B_DIM0_CKE1
5 M_B_DIM0_CKE0
SMBus Slave Address: A4H

+3VS

R1709 1
SP1703 2

210KOhm
1

201
197

3

BA2
BA1
BA0
CKE1
CKE0

4

SA1
SA0

take care if can't boot or S3 issue
M_B_DQS7
M_B_DQS#7
M_B_DQS6
M_B_DQS#6
M_B_DQS5
M_B_DQS#5
M_B_DQS4
M_B_DQS#4
M_B_DQS3
M_B_DQS#3
M_B_DQS2
M_B_DQS#2
M_B_DQS1
M_B_DQS#1
M_B_DQS0
M_B_DQS#0

5 M_B_DQS[7:0]
5 M_B_DQS#[7:0]

187
170
153
136
63
46
28
11

DM should connect to GND directly
Design Guide 1.0 P.88 (436735)

B

28,53,59
28,53,59

SMB_CLK_S
SMB_DAT_S

SP1701 2
SP1702 2

188
186
171
169
154
152
137
135
64
62
47
45
29
27
12
10

1 R0402 SMB_CLK_S_CHB
1 R0402 SMB_DAT_S_CHB

202
200

DQS7
DQS#7
DQS6
DQS#6
DQS5
DQS#5
DQS4
DQS#4
DQS3
DQS#3
DQS2
DQS#2
DQS1
DQS#1
DQS0
DQS#0

5

DM7
DM6
DM5
DM4
DM3
DM2
DM1
DM0

7

SCL
SDA

6

T1701

40~47

1

PM_EXTTS#0_DIM_B

198
125

Reserve
77
122

GND1
GND2

EVENT#
TEST

NP_NC1
NP_NC2

NC1
NC2

VTT1
VTT2

+V_VREF_CA_DIMM1
126
1

48~55

VREFCA
VREFDQ

VDDSPD

C1724
2.2UF/6.3V
@

1
2

1
2

1
2

32~39

C1723
0.1UF/16V

C1708
0.1UF/16V

3
9
14
20
26
32
38
44
49
55
61
66
72
128
134
139
145
151
156
162
168
173
179
185
190
196

C

207
208
205
206
203
204

+0.75VS
+3VS

199
1

5
5
5

WE#
RAS#
CAS#

VSS2
VSS4
VSS6
VSS8
VSS10
VSS12
VSS14
VSS16
VSS18
VSS20
VSS22
VSS24
VSS26
VSS28
VSS30
VSS32
VSS34
VSS36
VSS38
VSS40
VSS42
VSS44
VSS46
VSS48
VSS50
VSS52

C1707
0.1UF/16V

C1715
0.1UF/16V

2

113
110
115

VSS1
VSS3
VSS5
VSS7
VSS9
VSS11
VSS13
VSS15
VSS17
VSS19
VSS21
VSS23
VSS25
VSS27
VSS29
VSS31
VSS33
VSS35
VSS37
VSS39
VSS41
VSS43
VSS45
VSS47
VSS49
VSS51

76
82
88
94
100
106
112
118
124

1

M_B_WE#
M_B_RAS#
M_B_CAS#

24~31

VDD2
VDD4
VDD6
VDD8
VDD10
VDD12
VDD14
VDD16
VDD18

2

PLACE CLOSE TO SODIMM

5
5
5

16~23

VDD1
VDD3
VDD5
VDD7
VDD9
VDD11
VDD13
VDD15
VDD17

1

C1721
10PF/50V
@

@
150Ohm
R1708

2

M_B_DIM0_CLK_DDR#1

2

1

1

M_B_DIM0_CLK_DDR1

75
81
87
93
99
105
111
117
123
2
8
13
19
25
31
37
43
48
54
60
65
71
127
133
138
144
150
155
161
167
172
178
184
189
195

2

C

ODT1
ODT0

Layout Note: Place these caps near SO DIMM 1

C1714
2.2UF/6.3V
@

+V_VREF_DQ_DIMM1

56~63

Frank
20110513 VREFCA and VREFDQ need to separate
It follow EVEREST and Intel spec.

1

120
116

C1706
0.1UF/16V

C1722
2.2UF/6.3V
@

2

5 M_B_DIM0_ODT1
5 M_B_DIM0_ODT0

2

S1#
S0#

8~15

C1705
0.1UF/16V

1

121
114

CK1
CK1#
CK0
CK0#

1

0~7

2

5 M_B_DIM0_CS#1
5 M_B_DIM0_CS#0

150Ohm
R1707

0

5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194

1

102
104
101
103

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

2

C1720
10PF/50V
@

@

5 M_B_DIM0_CLK_DDR1
5 M_B_DIM0_CLK_DDR#1
5 M_B_DIM0_CLK_DDR0
5 M_B_DIM0_CLK_DDR#0

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

2

M_B_DIM0_CLK_DDR#0

2

1

1

M_B_DIM0_CLK_DDR0

98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78

J1701B
M_B_DQ1
M_B_DQ5
M_B_DQ7
M_B_DQ2
M_B_DQ4
M_B_DQ0
M_B_DQ6
M_B_DQ3
M_B_DQ8
M_B_DQ12
M_B_DQ10
M_B_DQ15
M_B_DQ9
M_B_DQ13
M_B_DQ11
M_B_DQ14
M_B_DQ16
M_B_DQ20
M_B_DQ21
M_B_DQ17
M_B_DQ23
M_B_DQ22
M_B_DQ19
M_B_DQ18
M_B_DQ25
M_B_DQ28
M_B_DQ30
M_B_DQ26
M_B_DQ29
M_B_DQ24
M_B_DQ27
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ38
M_B_DQ34
M_B_DQ36
M_B_DQ37
M_B_DQ39
M_B_DQ35
M_B_DQ44
M_B_DQ40
M_B_DQ46
M_B_DQ41
M_B_DQ42
M_B_DQ45
M_B_DQ47
M_B_DQ43
M_B_DQ53
M_B_DQ52
M_B_DQ55
M_B_DQ54
M_B_DQ49
M_B_DQ48
M_B_DQ50
M_B_DQ51
M_B_DQ63
M_B_DQ61
M_B_DQ57
M_B_DQ59
M_B_DQ60
M_B_DQ56
M_B_DQ58
M_B_DQ62

1

J1701A
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

2

5

C1725
0.1UF/16V
B

RESET#

30

DDR3_DRAMRST#

5,16
DDR3_DIMM_204P
12V02GBRM000

DDR3_DIMM_204P
12V02GBRM000

H:5.2mm

A

A

Title : DDR3(2)_SO-DIMM1
Engineer:

PEGATRON COMPUTER INC
Size

5

4

3

2

Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
1.0
Sheet
1

17

of

93

5

4

3

2

1

+1.5V

DDR3 Vref

M1: Fixed SO-DIMM VREF_DQ

+1.5V

+1.5V

5,16,17,57,60,83

+V_VREF_CA_DIMM0

+V_VREF_CA_DIMM0

16,17

+V_VREF_DQ_DIMM0

+V_VREF_DQ_DIMM0

16,17

+V_VREF_DDR3

2

+V_VREF_CA_DIMM0
D

D

+V_VREF_CA_DIMM1

R1811
1KOhm

+3V

24,45,57,59,61,91

+5VSUS

51,57,59,91

+5VA

37,60,81,91

1

+5VSUS

+3V

1
R1813
1KOhm

For DDR3_VREF command & address.

2

C1803
0.1UF/16V

R1814
0Ohm
+1.5V
2

1

2

2

1

+5VA

Default

M1

R1812
1KOhm

R1815
1KOhm

9 DIMM0_VREF_DQ
9 DIMM1_VREF_DQ

C

C1804
0.1UF/16V
2

R1.0 1231

2

1

+V_VREF_DQ_DIMM1

1

1

+V_VREF_DQ_DIMM0

R1805

1

@

2 0Ohm

R1806

1

@

2 0Ohm
C

M3
M3: Processor Generated SO-DIMM VREFDQ
– New Requirement
If support M3 :
1. Mount R1802,R1803,R1805,R1806,R1810,R1811,C1802
2. Un mount R1801,R1804

B

B

A

A

Title : DDR3(3)_CA/DQ Voltage
Engineer:

BG1-HW RD Div.2-NB RD Dept.5
Size

5

4

3

2

Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
1.0
Sheet
1

18

of

93

5

4

3

2

1

D

D

C

C

B

B

A

A

R1.4--2

Title : VID Controller
Engineer:

PEGATRON COMPUTER INC
Size

5

4

3

2

Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
1.0
Sheet
1

19

of

93

5

4

3

2

RTC battery
PR2.1

T2030

1

+VCC_RTC

+VCC_RTC

+VCC_RTC

R1.0
Delete
+RTCBAT

22,27

D2002
1
3
1KOhm

+RTC_BAT

2
1

R2001

1V/0.2A

C2003
1UF/10V

2

+RTCBAT

D

Shunt
Open
(Default)

Keep CMOS

C2001
1RTC_X1_C

2
GND

15PF/50V

U2001A
2

SGL_JUMP

@

+VCC_RTC
20110718 Frank
add C2006 for EMI request
GND

INTVRMEN: Integrated SUS 1.05V VRM Enables
Low: Enable External VRs
High:Enable Internal VRs
R2030 1

@
1%

2 200KOhm

GND

Clear ME RTC
Registers
Keep ME RTC
Registers

1

RTC_RST#

D20

SRTC_RST#

G22

SM_INTRUDER#

K22

PCH_INTVRMEN

C17

SP2009

1

2

ACZ_BCLK

N34

36 ACZ_SYNC_AUD

SP2008

1

2

ACZ_SYNC

L34
T10

SB_SPKR
SP2010

36,37 ACZ_RST#_AUD

JRST2002

1%
1 R2006
@ 33PF/50V
2

C20

36 ACZ_BCLK_AUD

36

GND

330KOhm 2
C2006

RTC_X2

1

ACZ_RST#

2

E34

36 ACZ_SDIN0_AUD
Remove TP

G34

1

ACZ_SDIN2_AUD

C34

1

ACZ_SDIN3_AUD

Shunt
T2021

Open
(Default)

T2022
R1.1

A34

RTCX2

SP2011
T2001

Intel 1.5 Design Guide, page 260

1

2

ACZ_SDOUT
R2050 near R2008

1
T2002

1

HDA_DOCK_EN#
CARDREADER_RESET

A36
C36
N32

T2004

1

PCH_JTAG_TCK_BUF

J3

T2005

1

PCH_JTAG_TMS

H7

T2006

1

PCH_JTAG_TDI

K5

T2007

1

PCH_JTAG_TDO

H1

FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3

RTCRST#
FWH4/LFRAME#
SRTCRST#
INTRUDER#

LDRQ0#
LDRQ1#/GPIO23

INTVRMEN

SERIRQ

HDA_BCLK
HDA_SYNC
SPKR
HDA_RST#
HDA_SDIN0

HDA_SDIN2
HDA_SDIN3

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP

HDA_SDIN1

10/31 IOAC

36 ACZ_SDOUT_AUD

isolate schematic for ACZ _SYNC and SDOUT follow EIH31

K34

RTCX1

LPC

1
15PF/50V

A20

SATA 6G

2
C2002
GND
T2011
1
T2012
1

RTC_X1

HDA_SDO
HDA_DOCK_EN#/GPIO33

SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP

SATA

JRST2002

C

TPM Settings

D

R2002
10MOhm

3

4
T2015
1

PCH_INTVRMEN
GND

26,27

2

X2001
32.768KHZ

2
GND

1
1
2
2

1
2

1UF/10V

27

+VTT_PCH_VCCIO

SP2005
1

@

1

1MOhm

+1.05VM_ORG

1

JRST2001

Clear CMOS

GND

C2005

21,22,24,25,26,27,33

+1.05VM_ORG

RTC

SGL_JUMP

2
R2005

+3VSUS_ORG

IHDA

1

JRST2001

2

1
1UF/10V

2

1
2

C2004

CMOS Settings

5% 1
20KOhm

2
R2004

17,21,22,23,24,25,26,27,28,30,32,33,36,37,44,45,48,50,51,53,57,59,61,80,91,92

+3VSUS_ORG

1

5%
1
20KOhm

GND

6,26,27,30,31,57,59,60,81,88,93

+3VS

Request by CSC
for CMOS clear
function

RTCRST# RC delay
should be 18ms~25ms

2
R2003

+3VA

+3VS

+VTT_PCH_VCCIO

GND

+VCC_RTC

+3VA

SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP

HDA_DOCK_RST#/GPIO13
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP

JTAG_TCK
JTAG_TMS
JTAG_TDI

JTAG

+RTCBAT
59,60

1

+3VA

SATAICOMPO
SATAICOMPI

JTAG_TDO
SATA3RCOMPO
SATA3COMPI

SPI_CLK

T3

28

SPI_CS#0

Y14

28

SPI_CS#1

SPI_CS#1

T1

28

SPI_SI

V4

28

SPI_SO

U3

SPI_CLK

SATA3RBIAS

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

D36
E36
K36
V5

SPI_CS1#

T2032
T2033

1
1

SPI_MOSI

SATA0GP/GPIO21

SPI_MISO

SATA1GP/GPIO19

30,44,59

R1.0

Serial Interrupt Request

INT_SERIRQ

30,44,59

AM3
AM1
AP7
AP5

SATA_RXN0
SATA_RXP0
SATA_TXN0
SATA_TXP0

51
51
51
51

HDD1

AM10
AM8
AP11
AP10

SATA_RXN1
SATA_RXP1
SATA_TXN1
SATA_TXP1

53
53
53
53

HDD2

AD7
AD5
AH5
AH4

SATA_RXN2
SATA_RXP2
SATA_TXN2
SATA_TXP2

51
51
51
51

ODD

C

AB8
AB10
AF3
AF1

mSATA

Y7
Y5
AD3
AD1

R1.0

Y3
Y1
AB3
AB1
Y11
Y10

SATA_COMP R2007 1

1%

2 37.4Ohm

+VTT_PCH_VCCIO

SATA3_COMP R2047 1

1%

2 49.9Ohm

+VTT_PCH_VCCIO

1%

2 750Ohm

AB12
AB13

AH1 RBIAS_SATA3

R2048

1

1
SATALED#

30,44,59
30,44,59
30,44,59
30,44,59

LPC_FRAME#
SNN_PCH_DRQ#0
SNN_LPC_DRQ#1

SPI_CS0#

SPI

B

28

C38
A38
B37
C37

R2025
SATA_LED#

P3
V14

SATA0GP

1

T2034

R1.1

11/04

2
10KOhm

GND
B

+3VS

P1

BBS_BIT0 24

COUGAR_POINT_ES1
02V000000001

R1.0
For JTAG to pull high and low.

Remove JTAG schematic
Strap information:

+3VS

Pull High

SB_SPKR: No reboot strap
Low: Disable (Default)
High:Enable

SB_SPKR

R2020

ACZ_SDOUT:
1.Flash descriptor security:
Sampled Low: in effect.
Sampled High: override

ACZ_SDOUT

R2034

ACZ_SYNC

R2036

1

1

@

@

2 1KOhm

2 1KOhm

+3VS

INT_SERIRQ

1
R2026

2
10KOhm

SATA0GP

1
R2027

2
10KOhm

+3VSUS_ORG

2.ACZ_SDOUTwhich sample high on the rising edge of PWROK
Will also disable Intel ME.
A

A

ACZ_SYNC: On Die PLL VR voltage selector
Low: 1.8V (Default)
High: 1.5V
note : CRB has no strap
Hrron River Platform Schematic Design Checklist
(438390 page 48)

1

2 1KOhm

+3VSUS_ORG

VCCVRAM use +1.5VS in mobile

Title : PCH(1)_SATA,IHDA,RTC,LPC
Engineer:

PEGATRON COMPUTER INC
Size

5

4

3

2

Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
1.0
Sheet
1

20

of

93

5

4

3

2

Frank
0513_Add USB3.0 and Card Reader PCIE and CLKRQ

+3VS

Frank
0517_Add 3G PCIE and CLKRQ in Port3.

1
1

2 0.1UF/16V
2 0.1UF/16V

T2101
T2102
T2108
T2109

1
1
1
1

T2104
T2105
T2106
T2107

1
1
1
1

PCIE_TXN4_GLAN_C
PCIE_TXP4_GLAN_C

BF36
BE36
AY34
BB34

PCIE_TXN5_CR_C
PCIE_TXP5_CR_C

BG37
BH37
AY36
BB36

PCIE_TXN6_USB30_C
PCIE_TXP6_USB30_C

BJ38
BG38
AU36
AV36
BG40
BJ40
AY40
BB40
BE38
BC38
AW38
AY38

C

Y40
Y39
CLK_REQ0#

59 CLK_PCIE_CR#
59 CLK_PCIE_CR
59 CLK_REQ_CR#

SP2112 1
SP2114 1

2
2

SP2110 1

2

SP2101
SP2102

1
1
1

2

SP2117
SP2119

1
1

2
2

CLK_PCH_SRC2_N
CLK_PCH_SRC2_P
CLK_REQ2#
CLK_PCH_SRC3_N
CLK_PCH_SRC3_P

2 0Ohm /NON_mSATA CLK_REQ3#

R2101 1

53 CLK_REQ3_mSATA#

AB49
AB47
CLK_REQ1#

2
2

SP2103

J2

M1
AA48
AA47
V10
Y37
Y36
A8

SMBDATA

22,26,27

20,22,24,25,26,27,33

33 CLK_REQ_LAN#

SP2107 1
SP2108 1

2
2

CLK_PCH_SRC4_N
CLK_PCH_SRC4_P

Y43
Y45

SP2109 1

2

CLK_REQ4#

L12

T2117
T2119

CLK_PCH_SRC5_N
CLK_PCH_SRC5_P

1
1

CLK_REQ5#

V45
V46

EXT_SCI# 30,59

H14

SCL_3A

SCL_3A

C9

SDA_3A

28

SDA_3A 28

PERn3
PERp3
PETn3
PETp3

SML0ALERT#/GPIO60
SML0CLK
SML0DATA

PERn4
PERp4
PETn4
PETp4

SML1ALERT#/PCHHOT#/GPIO74

PERn5
PERp5
PETn5
PETp5

SML1CLK/GPIO58
SML1DATA/GPIO75

PERn6
PERp6
PETn6
PETp6
PERn7
PERp7
PETn7
PETp7
PERn8
PERp8
PETn8
PETp8

CL_CLK1
CL_DATA1
CL_RST1#

C8

DRAMRST_CNTRL_PCH_R
1/NON_DS3 2
R2161
0Ohm
SML0_CLK

G12

SML0_DAT

C13

SML1ALERT#

E14

SML1_CLK

M16

SML1_DAT

A12

DRAMRST_CNTRL_PCH
1

T2133

1

T2134

1

CLK_REQ6#

28

T13
V38
V37

CLK_REQ7#

Remove

K12

XDP.

AK14
AK13

10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm

4
2
4
2
4
2

RN2109B
RN2109A
RN2110B
RN2110A
RN2111B
RN2111A

R2116 1

EXT_SCI#

CLKOUT_PCIE0N
CLKOUT_PCIE0P

M7

R1.1
S3 RAM reset CTRL

T11
P10

CLKOUT_PCIE1N
CLKOUT_PCIE1P

100MHz

100MHz

CLKOUT_PEG_A_N
CLKOUT_PEG_A_P

100MHz CLKOUT_DMI_N
CLKOUT_DMI_P
120MHz CLKOUT_DP_N
CLKOUT_DP_P

RN2103B

4

SDA_3A

RN2103A

2

DRAMRST_CNTRL_PCH_R

100MHz

CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_GND1_N
CLKIN_GND1_P

100MHz

PCIECLKRQ3#/GPIO25
CLKOUT_PCIE4N
CLKOUT_PCIE4P

CLK_PCIE_PEG#_PCH_L
CLK_PCIE_PEG_PCH_L

NB_R0402_20MIL_SMALL
R2103 2
1
R2104 2
1

96MHz CLKIN_DOT_96N
CLKIN_DOT_96P
100MHz CLKIN_SATA_N
CLKIN_SATA_P
14.31818MHz
REFCLK14IN

100MHz

PCIECLKRQ5#/GPIO44

CLK_PCIE_PEG#_PCH
CLK_PCIE_PEG_PCH

AV22
AU22

33MHz

CLKIN_PCILOOPBACK
XTAL25_IN
XTAL25_OUT

2 10KOhm

SML0_CLK

3

2.2KOhm 4

RN2104B

SML0_DAT

1

2.2KOhm 2

RN2104A

SML1_CLK

1

2.2KOhm 2

RN2105A

SML1_DAT

3

2.2KOhm 4

RN2105B

R2125 1

@

2 10KOhm

AM12
AM13

CLK_DP_N
CLK_DP_P

BF18
BE18

CLK_BUF_EXP_N
CLK_BUF_EXP_P

BJ30
BG30

CLK_BUF_CPYCLK_N
CLK_BUF_CPYCLK_P

G24
E24

CLK_BUF_DOT96_N
CLK_BUF_DOT96_P

AK7
AK5

CLK_BUF_CKSSCD_N
CLK_BUF_CKSSCD_P

K45

CLK_BUF_REF14

PCH CLKREQ Setting:
Not connected to device.

R1.0 0118

C2101
1
2
CLK_PCI_FB

V47
V49

XTAL25_IN
XTAL25_OUT

Y47

XCLK_COMP

24

GND

10PF/50V

2
X2103
25MHZ

R2106

2 90.9Ohm

1

+VCCDIFFCLKN

SP2111
1

C2102
XTAL25_OUT_C
1
2

2

10PF/50V

100MHz

PCIECLKRQ7#/GPIO46
CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P

100MHz

CLKOUTFLEX0/GPIO64
CLKOUTFLEX1/GPIO65
CLKOUTFLEX2/GPIO66
CLKOUTFLEX3/GPIO67

SYSRAM00

F47

SYSRAM01

H47

SYSRAM02

K49

SYSRAM03

+3VS

R2154
10KOhm
/ELPIDA
2

R2152
10KOhm
/2G
2

2

+3VS

1

+3VS

1

+3VS

R2144
10KOhm
@

On Board RAM Setting

R2156
10KOhm
/MICRON
SYSRAM00
SYSRAM01
SYSRAM02
SYSRAM03

0010

Elpida 1333MHz 4GB

0110

Elpida 1333MHz 2GB

0101

Micron 1333MHz 2GB

XXXX

TBD

1000

Common Definition 1333MHz 4GB

1001

Common Definition 1600MHz 4GB

1

Micron 1333MHz 4GB

1

No on board RAM

0001

1

On Board RAM Setting

0000

R2150

1

@

2 10KOhm

**UNSTUFF**

CLK_REQ5#

R2139

1

@

2 10KOhm

**UNSTUFF**

3

10KOhm 4

RN2107B

1

10KOhm 2

RN2107A

1

@

CLK_REQ7#

CLK_REQ6#

R2143

2 10KOhm

**UNSTUFF**

B

GND

GND

Connected to device.
Default : Clock free run. (PD 10K).
Reserver 10K PU for power saving purpose.
Eric Fang to Alan Chien on 11/15/2010

+3VS

CLK_REQ1#

R2133

1

2 10KOhm

CLK_REQ2#

R2128

1

2 10KOhm

CLK_REQ3#

R2151

1

2 10KOhm

CLK_REQ4#

R2135

1

2 10KOhm

CLK_REQ_PEG_A#

R2140

1

2 10KOhm

CLK_REQ_PEG_A#

R2141

1

@

2 10KOhm

CLK_REQ3#

R2148

1

@

2 10KOhm

CLK_REQ4#

R2146

1

@

2 10KOhm

CLK_REQ1#

R2138

1

@

2 10KOhm

CLK_REQ2#

R2145

1

@

2 10KOhm

+3VSUS_ORG

R2.0
Modify RAM Strap PIN

1

Joyoung R2.0
add GPIO Table for on board RAM Strap.

CLK_REQ0#

CLK_REQ_PEG_B#

4

100MHz

K43

+3VSUS_ORG

25-MHz is required in:
1. FCIM
2. BTM for PCH Display Clock gereration
in Integrated Graphics platforms

PCIECLKRQ6#/GPIO45

A

2

R2157
10KOhm
/ELPIDA

2

R2155
10KOhm
/MICRON

2

R2153
10KOhm
/4G

2

R2149
10KOhm

GND

GND

GND

GND

GND

Title : PCH(2)_PCIE,CLK,SMB,PEG
Engineer:

PEGATRON COMPUTER INC
Size

4

C

4
4

Joyoung R1.0
modify CLK_REQ

H45

R2.0 12/15

5

**UNSTUFF**

70
70

1

100MHz

XCLK_RCOMP

GPIO67 GPIO66 GPIO65 GPIO64

@

CLK_EXP_N 4
CLK_EXP_P 4
CLK_DP_N
CLK_DP_P

PEG_B_CLKRQ#/GPIO56

CLKOUT_PCIE7N
CLKOUT_PCIE7P

1 2.2KOhm

R2120 1

1

CLKOUT_PEG_B_N
CLKOUT_PEG_B_P

CLKOUT_PCIE6N
CLKOUT_PCIE6P

3 2.2KOhm

70

100MHz

PCIECLKRQ4#/GPIO26
CLKOUT_PCIE5N
CLKOUT_PCIE5P

CLKREQ_PEG#

2 10KOhm

100MHz

PCIECLKRQ2#/GPIO20
CLKOUT_PCIE3N
CLKOUT_PCIE3P

AB37
AB38

GND

NB_R0402_20MIL_SMALL

PCIECLKRQ1#/GPIO18
CLKOUT_PCIE2N
CLKOUT_PCIE2P

CLK_REQ_PEG_A#

100MHz

PCIECLKRQ0#/GPIO73

2 10KOhm

R2117 1

SCL_3A
R2.0 12/20
R2.0 12/14

M10

D

+3VSUS_ORG

SML1_DAT 28

02V000000001

A

3
1
3
1
3
1

To EC

1MOhm

E6
V40
V42

CLK_BUF_EXP_N
CLK_BUF_EXP_P
CLK_BUF_DOT96_N
CLK_BUF_DOT96_P
CLK_BUF_CKSSCD_N
CLK_BUF_CKSSCD_P

1

T2116

CLK_PCH_SRC6_N
CLK_PCH_SRC6_P

1
1

RN2108B
RN2108A

R1.0
SML1_CLK

2

CLK_REQ_PEG_B#
T2114
T2115

10KOhm 4
10KOhm 2

CLOCK TERMINATION for FCIM
Default power-on mode is ICC.

1

AB42
AB40

3
1

SML1ALERT#
PEG_A_CLKRQ#/GPIO47

FLEX CLOCKS

B

CLK_BUF_CPYCLK_N
CLK_BUF_CPYCLK_P

CLK_BUF_REF14

5,9,30

2

L14

EXT_SCI#

R2.0 12/14

COUGAR_POINT_ES1
33 CLK_PCIE_LAN#
33 CLK_PCIE_LAN

E12

3

C2110
C2111

R1.1
remove /niAMT remark

53 CLK_PCIE_mSATA#_PCH
53 CLK_PCIE_mSATA_PCH

+3VSUS_ORG

R2142

33 PCIE_RXN4_GLAN
33 PCIE_RXP4_GLAN
33 PCIE_TXN4_GLAN
33 PCIE_TXP4_GLAN

PERn2
PERp2
PETn2
PETp2

SMBUS

BG36
BJ36
AV34
AU34

53 PCIE_RXN3_mSATA
53 PCIE_RXP3_mSATA
53 PCIE_TXN3_mSATA
53 PCIE_TXP3_mSATA

SMBCLK

Link

BE34
BF34
BB32
AY32

SMBALERT#/GPIO11

Controller

PCIE_TXN2_WLAN_C
PCIE_TXP2_WLAN_C

2 0.1UF/16V
2 0.1UF/16V

1
1

PERn1
PERp1
PETn1
PETp1

CLOCKS

C2103
C2104

PCIE_TXN1_CR_C
PCIE_TXP1_CR_C

2 0.1UF/16V
2 0.1UF/16V

1
1

BG34
BJ34
AV32
AU32

PCI-E*

C2112
C2114

53 PCIE_RXN2_WLAN
53 PCIE_RXP2_WLAN
53 PCIE_TXN2_WLAN
53 PCIE_TXP2_WLAN

53 CLK_REQ1_WLAN#

17,20,22,23,24,25,26,27,28,30,32,33,36,37,44,45,48,50,51,53,57,59,61,80,91,92

+VTT_PCH_ORG

+3VSUS_ORG

U2001B

59 PCIE_RXN1_CR
59 PCIE_RXP1_CR
59 PCIE_TXN1_CR
59 PCIE_TXP1_CR

53 CLK_PCIE_WLAN#_PCH
53 CLK_PCIE_WLAN_PCH

+3VS

+VTT_PCH_ORG

Joyoung R1.0
D

1

3

2

Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
1.0
Sheet
1

21

of

93

5

4

3

2

1

+3VSUS_ORG

+3VSUS_ORG

+3VS

+3VS

+VTT_PCH_ORG
U2001C

3
3
3
3

BE24
BC20
BJ18
BJ20

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

D

3
3
3
3

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

AW24
AW20
BB18
AV18

3
3
3
3

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

AY24
AY20
AY18
AU18

DMI0RXN
DMI1RXN
DMI2RXN
DMI3RXN

FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7

DMI0RXP
DMI1RXP
DMI2RXP
DMI3RXP
DMI0TXN
DMI1TXN
DMI2TXN
DMI3TXN
DMI0TXP
DMI1TXP
DMI2TXP
DMI3TXP

FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7

FDI

BC24
BE20
BG18
BG20

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

FDI_INT
BJ24
+VTT_PCH_ORG

R2201

2

GND

R2202

2

1 49.9Ohm DMI_COMP_R

1%
1%

RBIAS_CPY

1 750Ohm

BG25
BH21

DMI_ZCOMP

FDI_FSYNC0

DMI_IRCOMP

FDI_FSYNC1

DMI2RBIAS

FDI_LSYNC0
FDI_LSYNC1

30

R2244

SUSACK#

R1.0
Add XDP_DBRESET#

2
1 0Ohm
/NON_DS3 R2246
R2205 2
1 10KOhm
1
2
1.2V/0.1A @ D2201

+3VS

SUSACK#_R
PM_SYSRST#_R

SYS_PWROK

K3

L22
R2240
R2242

Add ME_PWROK.
30 ME_PWROK

2
2

1 0Ohm
1 0Ohm

@

PM_APWROK_R

L10
B13

4 PM_DRAM_PWRGD
PM_RSMRST# has pull down 10k ohm in EC

C12

P12

4,30,92 PM_PWROK

C

DSWVRMEN

/DS3 1 0Ohm R1.1 DS3 10/31

2

SUS_PWR_ACK_R

R1.1 DS3 10/31

30 PM_RSMRST#

R2245

R2243

30 ME_SUSPWRDNACK

1 0Ohm

2

1 0Ohm

2

PM_RSMRST_R

C21

SUS_PWR_ACK_R

K16

System Power Management

Remove SUSACK#.

SUSACK#
SYS_RESET#
SYS_PWROK
PWROK
APWROK
DRAMPWROK
RSMRST#

DPWROK
WAKE#
CLKRUN#/GPIO32
SUS_STAT#/GPIO61
SUSCLK/GPIO62
SLP_S5#/GPIO63
SLP_S4#

SUSWARN#/SUSPWRDNACK/GPIO30

SLP_S3#

BJ14
AY14
BE14
BH13
BC12
BJ12
BG10
BG9

FDI_TXN0
FDI_TXN1
FDI_TXN2
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXN7

3
3
3
3
3
3
3
3

BG14
BB14
BF14
BG13
BE12
BG12
BJ10
BH9

FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP3
FDI_TXP4
FDI_TXP5
FDI_TXP6
FDI_TXP7

3
3
3
3
3
3
3
3

AW16

FDI_INT

AV12

FDI_FSYNC0

BC10

FDI_FSYNC1

3

AV14

FDI_LSYNC0

3

FDI_LSYNC1

3

BB10

A18

DSWODVREN

R2215
R2214

1
1

@

2 200KOhm
2 200KOhm

R1.1 DS3 10/31
/NON_DS3
R2219 2
1 0Ohm
R2218 2
1 0Ohm
/DS3
R1.1
PCIE_WAKE#
R2217 2
1 0Ohm
@

E22 PCH_DPROK
B9

1%
1%

GND
+VCC_RTC

E20
R1.1 DS3 10/31
2
1 0Ohm

AC_PRESENT_R

H20

T2201
1

BATLOW#

E10

T2202
1

RI#

A10

R2241

30 ME_AC_PRESENT

PWRBTN#

SLP_A#

ACPRESENT/GPIO31

SLP_SUS#

BATLOW#/GPIO72

PMSYNCH

RI#

SLP_LAN#/GPIO29

20,27

+3VSUS

4,24,28,30,60,81,92

+5VSUS

+5VSUS

51,57,59,91

+12VSUS

+12VSUS

28,51,81,91

3
3

DSWODVREN - On Die DSW VR Enable
HIGH - Enabled(DEFAULT) ; LOW-Disabled

EC_RST# 30,32

LAN_WAKE#

30,33

PM_CLKRUN#
PM_SUS_STAT#

T2203
1

SLP_S5#

T2204
1

SUSCLK

30,59

30

C

H4

PM_SUSC#

30

F4

PM_SUSB#

30

R1.0

G10
G16

+VCC_RTC

+3VSUS

D

R1.1 DS3 10/31

R1.0
30 PM_PWRBTN#
Add PM_PWRBTN#_R

26,27

6,20,26,27,30,31,57,59,60,81,88,93

PM_RSMRST_R

N14
D10

+3VA

+VCC_RTC

IOAC, 10/31

N3
G8

17,20,21,23,24,25,26,27,28,30,32,33,36,37,44,45,48,50,51,53,57,59,61,80,91,92

+VTT_PCH_ORG

+3VA

DMI

3
3
3
3

20,21,24,25,26,27,33

ME_PM_SLP_M#
SLP_DSW#_R R2247

2

1 0Ohm

SLP_SUS#

30

30,91

AP14

H_PM_SYNC

K14

ME_PM_SLP_LAN#

R1.0

4
30

R1.0

02V000000001
COUGAR_POINT_ES1

R1.1 Remove some SP in P22
SYS_PWROK for PCH

+3VSUS
B

PM_PWROK

U2201
1 A
VCC

B

5

2 B

92 DELAY_VR_AND_ALL_SYS

3 GND

SYS_PWROK

4
Y

Vcc=2~5.5

+3VSUS_ORG

RI#

R2223 1

2 10KOhm

BATLOW#

R2224 1

2 10KOhm

PCIE_WAKE#

R2225 1

2 1KOhm

R1.0

+3VS

R1.0
PM_CLKRUN#

R2220

1

2 10KOhm

ME_PM_SLP_M#

R2226 1

PM_PWROK

R2221

1

2 10KOhm

ME_SUSPWRDNACK

R2227 1

2 10KOhm

R1.1 11/10 ME_AC_PRESENT

R2228 1

2 10KOhm

ME_PM_SLP_LAN#

R2229 1

@

2 10KOhm

A

A

GND

@

2 10KOhm

Title : PCH(3)_FDI,DMI,SYS PWR
Engineer:

PEGATRON COMPUTER INC
Size

5

4

3

2

Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
1.0
Sheet
1

22

of

93

17,20,21,22,24,25,26,27,28,30,32,33,36,37,44,45,48,50,51,53,57,59,61,80,91,92
+3VS

L_CTRL_DATA

1
3

2.2KOhm 2
2.2KOhm 4

U2001D
SP2301
SP2302

45 LCD_BKEN_PCH
45 L_VDDEN_PCH

RN2301A
RN2301B

1
1

2
2

1

2.2KOhm 2

RN2302A

EDID_DATA_PCH

3

2.2KOhm 4

RN2302B

J47
M45

45 L_BKLT_CTRL

P45

45 EDID_CLK_PCH
45 EDID_DATA_PCH

T40
K47
L_CTRL_CLK
L_CTRL_DATA

EDID_CLK_PCH

R2301
R2302

2
2

SP2303

D

@
1

1 2.37KOhm
1 0Ohm

T45
P39
LVD_IBG
LVD_VBG

LVD_VREF

2

AF37
AF36
AE48
AE47

L_BKLTEN
L_VDD_EN

SDVO_TVCLKINN
SDVO_TVCLKINP

L_BKLTCTL

SDVO_STALLN
SDVO_STALLP

L_DDC_CLK
L_DDC_DATA

SDVO_INTN
SDVO_INTP

LVD_IBG
LVD_VBG

SDVO_CTRLCLK
SDVO_CTRLDATA

LVD_VREFH
LVD_VREFL

DDPB_AUXN
DDPB_AUXP
DDPB_HPD

AN48
AM47
AK47
AJ48

45 LVDS_L0P_PCH
45 LVDS_L1P_PCH
45 LVDS_L2P_PCH

AN47
AM49
AK49
AJ47

R1.0
AF40
AF39
AH45
AH47
AF49
AF45
AH43
AH49
AF47
AF43

N48
P49
T49
T39
M40

C

M47
M49

GND
GND

R2307

2

0.5% 1 1KOhm

T43
T42

LVDSA_CLK#
LVDSA_CLK
LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3

LVDS

AK39
AK40

45 LVDS_L0N_PCH
45 LVDS_L1N_PCH
45 LVDS_L2N_PCH

LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3
LVDSB_CLK#
LVDSB_CLK
LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3
LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3

CRT_BLUE
CRT_GREEN
CRT_RED
CRT_DDC_CLK
CRT_DDC_DATA

Digital Display Interface

Remove LVDS net name and add port B.

45 LVDS_LCLKN_PCH
45 LVDS_LCLKP_PCH

DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
DDPD_CTRLCLK
DDPD_CTRLDATA

CRT

LVDS .

AP43
AP45
AM42
AM40
AP39
AP40

L_CTRL_CLK
L_CTRL_DATA

GND

Pull up 2.2k ohm in DDC bus for

1

CRT_HSYNC
CRT_VSYNC
DAC_IREF
CRT_IRTN

DDPD_AUXN
DDPD_AUXP
DDPD_HPD
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P

P38
M39
AT49
AT47
AT40
AV42
AV40
AV45
AV46
AU48
AU47
AV47
AV49
P46
P42
AP47
AP49
AT38
AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49
M43
M36

D

HDMI_DDC_CLK_PCH
HDMI_DDC_DATA_PCH

AT45
AT43
BH41

HDMI_HPD_PCH

BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42

HDMI_TXN2_PCH
HDMI_TXP2_PCH
HDMI_TXN1_PCH
HDMI_TXP1_PCH
HDMI_TXN0_PCH
HDMI_TXP0_PCH
HDMI_CLKN_PCH
HDMI_CLKP_PCH

48
48

48
48
48
48
48
48
48
48
48

Display Port D

L_CTRL_CLK

2

SDVO

+3VS

3

Display Port B

+3VS

4

Display Port C

5

C

COUGAR_POINT_ES1
02V000000001

CRT Disable: (For discrete graphic)
1. NC:
CRT_RED,CRT_GREEN,CRT_BLUE
CRT_HSYCN,CRT_VSYNC

DisPlay Port Disable: (For discrete graphic)

LVDS Disable: (For discrete graphic)

1. NC:

1. NC:

ALL

LVDSA_DATA [3:0], LVDSA_DATA# [3:0],
LVDSA_CLK, LVDSA_CLK#, LVDSB_DATA [3:0],

2. 1-kΩ ±0.5% pull-down to GND:

LVDSB_DATA# [3:0], LVDSB_CLK, LVDSB_CLK#

DAC_IREF

L_VDD_EN, L_BKLTEN, L_BKLTCTL, LVD_VREFH

3. Connected to GND:

LVD_VREFL, LVD_IBG, LVD_VBG

CRT_ITRN
B

2. Connected to GND:

4. Connect to +V3.3:

B

VccALVDS,VccTX_LVDS

VCCADAC

A

A

Title : PCH(4)_DP,LVDS,CRT
Engineer:

PEGATRON COMPUTER INC
Size

5

4

3

2

Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
1.0
Sheet
1

23

of

93

5

4

3

2

1

+3VSUS

+3V

R2430
10KOhm
@

+3VSUS_ORG

U2001E
RSVD1
RSVD2
RSVD3
RSVD4

R2414

@

1

+3VSUS

5

2 0Ohm

4

VCC
Y

R2415

1
2
3

A
B
GND

1

DGPU_PWR_EN
@
2 0Ohm
SUSB_EC# 30,57,91,92

GND

SN74LVC1G08DCKR
@

D

R2413

2 0Ohm

1
/DGPU

B21
M20
AY16
BG46

R1.0 0209
0 BE28
1 BC30
2 BE32
3 BJ32
0 BC28
1 BE30
2 BF32
3 BG32
0 AV26
1 BB26
2 AU28
3 AY30
0 AU26
1 AY26
2 AV28
3 AW30

52 USB3_RX1_N
52 USB3_RX2_N
52 USB3_RX3_N
52 USB3_RX1_P
52 USB3_RX2_P
52 USB3_RX3_P
52 USB3_TX1_N
52 USB3_TX2_N
52 USB3_TX3_N
52 USB3_TX1_P
52 USB3_TX2_P
52 USB3_TX3_P

C

TP1
TP2
TP3
TP4
TP5
TP6
TP7
TP8
TP9
TP10
TP11
TP12
TP13
TP14
TP15
TP16
TP17
TP18
TP19
TP20

RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22

RSVD

BG26
BJ26
BH25
BJ16
BG16
AH38
AH37
AK43
AK45
C18
N30
H3
AH12
AM4
AM5
Y13
K24
L24
AB46
AB45

U2403

91 VGA_PWRON

TP21
TP22
TP23
TP24

TP25
TP26
TP27
TP28
TP29
TP30
TP31
TP32
TP33
TP34
TP35
TP36
TP37
TP38
TP39
TP40

RSVD23
RSVD24
RSVD25

USB30
USB30
USB30
USB30
USB30
USB30
USB30
USB30
USB30
USB30
USB30
USB30
USB30
USB30
USB30
USB30

port
port
port
port
port
port
port
port
port
port
port
port
port
port
port
port

1
2
3
4
1
2
3
4
1
2
3
4
1
2
3
4

RSVD26
RSVD27

RXN
RXN
RXN
RXN
RXP
RXP
RXP
RXP
TXN
TXN
TXN
TXN
TXP
TXP
TXP
TXP

RSVD28
RSVD29

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P

+3VS

SP2401 1
DGPU_PWR_EN

2 R0402
T2407
2 R0402

SP2402 1

4
8
2
6

RN2403B
RN2403D
RN2403A
RN2403C

1
DGPU_PWR_EN_R

DGPU_PWR_EN is active high
T2404

1

INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#

K40
K38
H38
G38

DGPU_HOLD_RST#_R
DGPU_SELECT#

C46
C44
E40

BBS_BIT1
DGPU_PWM_SELECT#
STP_A16OVR

D47
E42
F46

+3VS

R1.1 add Zero Power ODD
**UNSTUFF**
**UNSTUFF**

PIRQA#
PIRQB#
PIRQC#
PIRQD#

USB

Frank
70 DGPU_HOLD_RST#
20110608 SP2401 is removed in EIH31.
57 DGPU_PWR_EN
SATA_ODD_DA# has short pin in EIH31.

10KOhm
10KOhm
10KOhm
10KOhm

PCI

3
7
1
5

**UNSTUFF**

REQ1#/GPIO50
REQ2#/GPIO52
REQ3#/GPIO54
GNT1#/GPIO51
GNT2#/GPIO53
GNT3#/GPIO55
COUGAR_POINT_ES1

R2431

1

R2432

1

R2433
R2434

1
1

@

@
@

+3VSUS

+3VS

2

1

+3VS

2 10KOhm

MPC_PWR_CTRL#

2 10KOhm

SATA_ODD_DA#

2 10KOhm
2 10KOhm

EXTTS_SNI_DRV0_PCH
EXTTS_SNI_DRV1_PCH

R2405 1

GND

@

2 1KOhm

51 SATA_ODD_DA#

T2401

MPC_PWR_CTRL#
SATA_ODD_DA#
EXTTS_SNI_DRV0_PCH
EXTTS_SNI_DRV1_PCH
PCI_PME#

1

G42
G40
C42
D44
K10

PLT_RST#

C6

A15:R2409=100ohm for EA .
22Ohm
22Ohm
22Ohm
22Ohm
T2405

59
CLK_TPM
21 CLK_PCI_FB
30 CLK_KBCPCI_PCH
44
CLK_DEBUG

2
2
2
2
1

1
1
1
1

R2412
R2409
R2410
R2411

CLK_TPM_R
CLK_PCI_FB_R
CLK_KBCPCI_PCH_R
CLK_DEBUG_R
CLK_DBG_R

H49
H43
J48
K42
H40

PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5

USBRBIAS#
USBRBIAS

AY7
AV7
AU3
BG4

17,20,21,22,23,25,26,27,28,30,32,33,36,37,44,45,48,50,51,53,57,59,61,80,91,92

+3V

45,57,59,61,91

+3VSUS_ORG

20,21,22,25,26,27,33

+12VS

+12VS

28,36,48,91

+1.8VS

+1.8VS

7,25,26,57,80,84

PLT_RST#

AT10
BC8

4,22,28,30,60,81,92

+3VS

PLT_RST#

AU2
AT4
AT3
AT1
AY3
AT5
AV3
AV1
BB1
BA3
BB5
BB3
BB7
BE8
BD4
BF6
AV5
AV10

D

NV_RCOMP

R2427 1

1%
@

2 32.4Ohm

GND

AT8
AY5
BA2

USB PORT
AT12
BF3

C24
A24
C25
B25
C26
A26
K28
H28
E28
D28
C28
A28
C29
B29
N28
M28
L30
K30
G30
E30
C30
A30
L32
K32
G32
E32
C32
A32

USB_PN0
USB_PP0
USB_PN1
USB_PP1
USB_PN2
USB_PP2
USB_PN3
USB_PP3
USB_PN4
USB_PP4
USB_PN5
USB_PP5
USB_PN6
USB_PP6

1
1
1
1

USB_PN0
USB_PP0
USB_PN1
USB_PP1
USB_PN2
USB_PP2
USB_PN3
USB_PP3
USB_PN4
USB_PP4

T2414
T2415
T2420
T2421

53
53
52
52
52
52
52
52
61
61

USB P00

Mini PCIE (mSATA)

USB P01

External 2.0/3.0

USB P02

External Main

USB P03

External Main

USB P04

BT

USB P05
USB P08

C

USB P09

Debug Port

USB P10

Camera

USB P11

WiFi

USB P12
USB P13
USB_PN9
USB_PP9
USB_PN10
USB_PP10
USB_PN11
USB_PP11
USB_PN13 1
USB_PP13 1

USB_PN9 52
USB_PP9 52
USB_PN10 45
USB_PP10 45
USB_PN11 53
USB_PP11 53
T2428
T2429

C33

A15: R2416=19.6 ohm for EA.

B33 USB_BIAS

R2424

1

1%

2 22.6Ohm

+3VSUS_ORG

GND

PME#
PLTRST#

OC0#/GPIO59
OC1#/GPIO40
OC2#/GPIO41
OC3#/GPIO42
OC4#/GPIO43
OC5#/GPIO9
OC6#/GPIO10
OC7#/GPIO14

CLKOUT_PCI0
CLKOUT_PCI1 33MHz
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4

A14
K20
B17
C16
L16
A16
D14
C14

OC0#/GPIO59
OC1#/GPIO40
OC2#/GPIO41
OC3#/GPIO42
OC4#/GPIO43
OC5#/GPIO9
OC6#/GPIO10
OC7#/GPIO14

1
5
7
5
3
1
7
3

10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm
10KOhm

2
6
8
6
4
2
8
4

RN2401A
RN2402C
RN2401D
RN2401C
RN2402B
RN2402A
RN2402D
RN2401B

Remove OC# to XDP.

B

B

2
C2403
10PF/50V
@

1

2
0Ohm

R2436

USB_OC9#

/HRUSB20

R2437
0Ohm
/CRUSB30

Reserved for Wireless team

R1.1
add OC# pin for add USB port9

1

GND GND

52

2

1

C2404
10PF/50V
@

1

2

Place within 500 mils of PCH
02V000000001

1

2
0Ohm

USB_OC1#

52

1

2
0Ohm

USB_OC0#

52

R2435

R2429

Boot BIOS Strap
BBS_BIT1

BBS_BIT0

0

0

LPC

Boot BIOS Location

0

1

Reserved (NAND)

1

0

Reserved

1

1

SPI (PCH)

Low=Enabled A16 swap override/
Top-Block swap override

+3VS

**UNSTUFF**
**UNSTUFF**

DGPU_PWM_SELECT#
DGPU_SELECT#
DGPU_HOLD_RST#_R

R2420 1
R2421 1
R2422 1

DGPU_PWR_EN_R

R2423 1

@
@

+3V

2 10KOhm
2 10KOhm
2 10KOhm
U2402
1 A
VCC

2 1KOhm
PLT_RST#

High=Default

3 GND

4
Y
Vcc=2~5.5
06V030000005
GND
@
1
2
R2425
0Ohm

Sampled on rising edge of PWROK.
This Signal has a weak internal pull-up.
BBS_BIT0 R2417
20
BBS_BIT0

1

@

2 1KOhm

BBS_BIT1 R2418

1

@

2 1KOhm

BUF_PLT_RST#

4,30,32,33,53,59,70

A

R2426
10KOhm
STP_A16OVR

R2419

1

@

2 1KOhm

2

A

5

2 B

1

BBS_BIT0,BBS_BIT1 : Boot BIOS Strap

STP_A16OVR:
A16 swap override Strap/
Top-Block swap override jumper

GND

R1.0
Add BBS_BIT1 signal.

GND
GND

Title : PCH(5)_PCI,NVRAM,USB
Engineer:

PEGATRON COMPUTER INC
Size

5

4

3

2

Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
1.0
Sheet
1

24

of

93

5

4

3

2

1

+3VS
+3VSUS

+3VSUS_ORG

R1.0

+3VS

17,20,21,22,23,24,26,27,28,30,32,33,36,37,44,45,48,50,51,53,57,59,61,80,91,92

+3VSUS

4,22,24,28,30,60,81,92

+3VSUS_ORG

20,21,22,24,26,27,33

Remove CRIT_PCH_GPIO0_R to XDP

R1.1
add Zero Power ODD

U2001F

+3VS

T2503

+3VS

1

DGPU_HPD_INTR# H36
GPIO7

USB30_EXT_SMI#

Add PM_LANPHY_EN

1

1

R2.0 12/22

R2525

SP2501

30,44 EXT_SMI#

1

2 R0402

PM_LANPHY_EN

2

2

2

10KOhm

33 LAN_LPWR

Add HOST_ALERT#1_R.

R2527
10KOhm
/DS3

@

SP2505 1

DGPU_PWROK has 100 ms software delay ,
no hardware delay requirement

PCB_ID0

T2141
PCB_ID1

53

Reserve PCH_GPIO24

D40

AOAC_ON

1

1
10KOhm

10KOhm
/NON_DS3

2

R2528

2

R2526

GND

@

GPIO27
WLAN_ON_R

2 R2517

Frank
0531 EE define GPIO for BROADCOM LAN chip.
T2506

Add SATA_ODD_PRSNT#_R and
FDI_OVRVLTG.
GND

U2

AOAC_ON

0Ohm 1

STP_PCI#

SATA_PWR_EN#1_R

1

C4

DGPU_PRSNT#

WLAN_LED

RF_ON

C10

G2

1

R1.1 Change WLAN_ON to WLAN_ON_PCH
R1.0 0105
30,53

E38

HOST_ALERT#1_R

DGPU_PWROK

87,91 DGPU_PWROK

A42

T5
E8
E16
P8
K1
K4

SATA_ODD_PRSNT#_R

51 SATA_ODD_PRSNT#_R

R1.1
add Zero Power ODD

V8

FDI_OVRVLTG

M5

PCB_ID0

N2

PCB_ID1

M3

C

R2.0 12/13
30,53,61

R1.1 DS3 10/31

Add CRIT_TEMP_REP#_R.
+3VSUS_ORG

EXT_SMI#

**UNSTUFF**
**UNSTUFF**

USB30_EXT_SMI#

R2529
R2531

@

2

1

10KOhm

Joyoung R1.0
PM_LANPHY_EN

AOAC_ON

R2538

@

2

R2541

1

@

2

1

10KOhm

T2512

1PCH_ALERT#

T2511

1

0Ohm 1

@

2 R2523

V13
V3
BT_LED

Frank
R1.0 0111
0502 NO BT module, but the GPIO control
pin will conntact to page 55.
It supports combo card.
Frank
0502 No WLAN LED,so GPIO pin change test point

R1.0 Intel Comments

2 1KOhm

1

BT_ON

BT_ON

D6

Joyoung R1.1
remove /niAMT remark

10KOhm

A4
A44
A45

A5
A6

Frank
0516 Remove SATA_DET#4_R to XDP

B3
B47

Joyoung R1.0
mount if suppot AOAC

Frank
0516 Remove PLL_ODVR_EN and SATA_PWR_EN#1_R to XDP

+3VS

RCIN# has pull high at EC side

**UNSTUFF**

DGPU_HPD_INTR#

BD1
BD49

R2534

@

2

1

Frank
0516 Remove FDI_OVRVLTG to XDP

10KOhm

BE1
BE49

Frank
0516 Remove CRIT_TEMP_REP#_R to XDP

R1.0
DGPU_PWROK

R2539

2

1

10KOhm

BF1
BF49

B

TACH4/GPIO68

TACH1/GPIO1

TACH5/GPIO69

TACH2/GPIO6

TACH6/GPIO70

TACH3/GPIO7

TACH7/GPIO71

SATA_ODD_PWRGT

C40
B41

1

T2508

C41

1

T2507

A40

1

GPIO8

GPIO15

A20GATE
PECI

SATA4GP/GPIO16

SCLOCK/GPIO22

D

51

**UNSTUFF**
**UNSTUFF**

T2505

**UNSTUFF**
11/04

Frank
20110608 H_THRMTRIP# is not connected pull up resister but EIH 31 does not.

LAN_PHY_PWR_CTRL/GPIO12

TACH0/GPIO17

SATA_ODD_PWRGT

R1.1

RCIN#

GPIO24/MEM_LED
GPIO27

PROCPWRGD
THRMTRIP#
INIT3_3V#
DF_TVS

P4

A20GATE 30
H_PECI_R

AU16

0Ohm 1

@

2 R2514
43Ohm

1

TS_VSS1
STP_PCI#/GPIO34
TS_VSS2
GPIO35
TS_VSS3
SATA2GP/GPIO36
TS_VSS4

H_PECI
4
H_PECI_EC 30
RCIN# 30

2 R2515

P5
AY11

H_CPUPWRGD

AY10

PM_THRMTRIP#

T14

INIT3_3V#

AY1

NV_CLE

390Ohm 1
1

1%

2 R2516

H_THRMTRIP#

T2504
R2502 1

4

4,32

R1.0
2 1KOhm

H_SNB_IVB#
R2503 1

GPIO28

2 2.2KOhm

4

+1.8VS

AH8
AK11
TS Signal Disable Guideline
TS_VSS[1:4] should pull down to GND
Design Guide 0.9 (436735)

AH10
AK10

SATA3GP/GPIO37
SLOAD/GPIO38

NC_1

P37
GND

C

SDATAOUT0/GPIO39
SDATAOUT1/GPIO48

Vss_NCTF15

SATA5GP/GPIO49

Vss_NCTF16

GPIO57

Vss_NCTF17
Vss_NCTF18

A46

Frank
0504 CRIT_TEMP_REP#_R change net name
CRIT_TEMP_REP# and contact to EC(follow BIC50)

BMBUSY#/GPIO0

CPU/MISC

GPIO1

T7

GPIO

GPIO0

Vss_NCTF1

Vss_NCTF19

Vss_NCTF2

Vss_NCTF20

Vss_NCTF3

Vss_NCTF21

Vss_NCTF4
Vss_NCTF5

NCTF

D

Vss_NCTF22
Vss_NCTF23

Vss_NCTF6

Vss_NCTF24

Vss_NCTF7

Vss_NCTF25

Vss_NCTF8

Vss_NCTF26

Vss_NCTF9

Vss_NCTF27

Vss_NCTF10

Vss_NCTF28

Vss_NCTF11

Vss_NCTF29

Vss_NCTF12

Vss_NCTF30

Vss_NCTF13

Vss_NCTF31

Vss_NCTF14

Vss_NCTF32

COUGAR_POINT_ES1

BG2
BG48
BH3
BH47
BJ4
BJ44
BJ45
BJ46
BJ5
BJ6
C2
C48
D1
D49
E1
E49
F1
F49

B

02V000000001

Unused GPIO

**UNSTUFF**

**UNSTUFF**
**UNSTUFF**

GPIO0

R2536

GPIO1

R2545

2

STP_PCI#

R2537

2

WLAN_LED

R2542

2

R2548

R2540

GPIO27
#438390 Checklist

1

10KOhm

1

10KOhm

1

10KOhm

@

1

10KOhm

2

@

1 10KOhm

2

@

1

2

@

+3VS

GND
DGPU_PWROK

+3VS

10KOhm

GND

Joyoung R1.0

A

+3VS

DGPU_PRSNT#

R2126 1

/UMA 2 10KOhm

DGPU_PRSNT#

R2134 1

/DGPU 2 10KOhm

FDI_OVRVLTG
R2518 1
1%
2 1KOhm
@
FDI TERMINATION VOLTAGE OVERRIDE
- GPIO37 (FDI_OVRVLTG)
LOW - TX, RX terminated to same voltage
(DC Couplong Mode)
DEFAULT
R2520 1

2 200KOhm

R2519

2 100KOhm

1

GND

R2530

SATA_ODD_PRSNT#_R

DMI TERMINATION VOLTAGE OVERRIDE
- GPIO36 (SATA_ODD_PRSNT#)
LOW - TX, RX terminated to same voltage
(DC Couplong Mode)
DEFAULT

1

@

2

GND

10KOhm

R1.1
add Zero Power ODD

WLAN_ON_R

R2521

1

@

2 1KOhm

PLL ON DIE VR ENABLE
GND HIGH - DISABLED (DEFAULT)
LOW - ENABLED

A

GND
Joyoung R1.0
for BIOS detect Panel

+3VS

GPIO7

R2549

2 /LVDS

1

10KOhm

GPIO7

R2547

2 /eDP

1

10KOhm

Title : PCH(6)_CPU,GPIO,MISC
Engineer:

PEGATRON COMPUTER INC
Size
GND
5

4

3

2

Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
1.0
Sheet
1

25

of

93

5

4

3

2

1

U2001H
VSS0

COUGAR_POINT_ES1
02V000000001

GND

AT24
AN33
AN34

1
2

2

1
2
1

C2616
0.01UF/25V

C2617
22UF/6.3V
@

VccIO3

Vcc3_3_2

2 L2602

C2625
10PF/50V

Vcc3_3_3

V33
GND

147mA/4=36.75mA

VccIO6

VccVRM2

AT16

+VCCAFDI_VRM
+VCCIO_CPU_VCC_DMI

VccIO7

VccIO9
VccIO10
VccIO11

VccDMI2

VccClkDMI

AB36 75mA

VccDFTERM1

AG16

VccVRM1

+VTT_PCH_VCCDPLL_FDI

3.799A/29=131mA

2

AP17

VccAFDIPLL

AU20

+VCCIO_CPU_VCC_DMI

AG17

VccDMI1

COUGAR_POINT_ES1

R1.1
SP2609

+VTT_PCH_ORG

11/02

1

C2619
1UF/6.3V

2
NB_R0402_20MIL_SMALL
C

+VTT_PCH_ORG_VCCCLKDMI
R1.1

11/04

R2614

1 0Ohm

+VTT_PCH_ORG

GND

2

C2620
10UF/10V
@
+V_NVRAM_VCCPNAND

20mA

+1.8VS

SP2610

1

1

AJ16

VccDFTERM4

AJ17

R1.2
VccIO14

47mA/2=23.5mA

NB_R0402_20MIL_SMALL

VccDFTERM3

FDI

BG6

VccDFTERM2

2

AP16

+3VS_VCC3_3

GND

VccIO13
Vcc3_3_1

2
NB_R0402_20MIL_SMALL

GND

47mA/2=23.5mA

AT20

VccIO12

147mA/4=36.75mA

GND

1

C2618
0.1UF/16V

2

VccIO5

VccIO8

GND
SP2608

VccIO4

1
C2611
0.1UF/16V

GND
+3VS_VCC_GIO

178mA/8*2pin=45mA

V34

VccSPI

V1

GND

10mA

2
NB_R0402_20MIL_SMALL

C2621
0.1UF/16V
+3VM_VCCPSPI

+3VA

R2616

2

C2622
0.1UF/16V
02V000000001

R2617

2

R2.0 12/13

1 0Ohm

1

178mA/8=22.25mA BH29

2
NB_R0402_20MIL_SMALL

+VCCAFDI_VRM

SP2606 1

C2615
0.01UF/25V

1

VccIO2

GND

+VTT_PCH_VCCIO

+1.8VS

GND

AP37

SP2605

1 0Ohm

C2624
10PF/50V

1kOhm/100Mhz 1

2

+VTT_PCH_ORG

@

40mA

AP36

2

+3VS_VCCA3GBG

2

+1.8VS_VCCTX_LVD

AM38

1
AP21

GND

1

+3VS

AM37

1

C2610
1UF/6.3V

AP26

+VTT_PCH_VCCAPLL_FDI

D

2
NB_R0402_20MIL_SMALL

GND

2

AN27

1
C2609
1UF/6.3V

AP24

R2605

AK37

1

AN21

AP23

+3VS_VCC3_3

1

AK36

VccAPLLEXP

HVCMOS

AN17

3.799A/29*12= 1.572A

2

@
2

C2608
1UF/6.3V

VccTX_LVDS2

VccTX_LVDS4

GND

1

1
2

1
2

C2607
1UF/6.3V

VccTX_LVDS1

DMI

2

AN16

AN26

C2606
10UF/6.3V

+3VS_VCCA_LVD

VccIO1

VCCIO

R1.0
Intel Comments

C2605
10UF/6.3V
@

+VTT_PCH_VCCIO

vx_c0603_small

GND

2

AN19
BJ22

vx_c0603_small
+VTT_PCH_VCCAPLL_EXP

+VTT_PCH_VCC_EXP

2
VssALVDS

DFT / SPI

+VTT_PCH_ORG

3.799A/29=131mA

2

U47

SP2607

VccALVDS

VccTX_LVDS3

NB_R0402_20MIL_SMALL
2
1 1kOhm/100Mhz
@

@
GND

GND

1

L2601

1

GND

R1.0
1mA

+VTT_PCH_VCCDPLL_EXP
SP2604

+VTT_PCH_VCCIO

63mA

2

+VTT_PCH_VCCDPLL_EXP

VssADAC

U48

+3VS

C2614
22UF/6.3V

1

GND

VccADAC

C2612
0.1UF/16V

L2604
2
1kOhm/100Mhz

2

GND

C2623
1UF/6.3V

POWER

C2613
0.01UF/25V

1

@
2

C2603
1UF/6.3V

VccCore1
VccCore2
VccCore3
VccCore4
VccCore5
VccCore6
VccCore7
VccCore8
VccCore9
VccCore10
VccCore11
VccCore12
VccCore13
VccCore14
VccCore15
VccCore16
VccCore17

CRT

1

1

GND

2

1

GND

C2602
1UF/6.3V

2

1
C2601
10UF/6.3V

2

vx_c0603_small

AA23
AC23
AD21
AD23
AF21
AF23
AG21
AG23
AG24
AG26
AG27
AG29
AJ23
AJ26
AJ27
AJ29
AJ31

VCC CORE

U2001G

1.73A

+VTT_PCH_VCC

LVDS

R1.0
Intel Comments

1

1
1

AK38
AK4
AK42
AK46
AK8
AL16
AL17
AL19
AL2
AL21
AL23
AL26
AL27
AL31
AL33
AL34
AL48
AM11
AM14
AM36
AM39
AM43
AM45
AM46
AM7
AN2
AN29
AN3
AN31
AP12
AP19
AP28
AP30
AP32
AP38
AP4
AP42
AP46
AP8
AR2
AR48
AT11
AT13
AT18
AT22
AT26
AT28
AT30
AT32
AT34
AT39
AT42
AT46
AT7
AU24
AU30
AV16
AV20
AV24
AV30
AV38
AV4
AV43
AV8
AW14
AW18
AW2
AW22
AW26
AW28
AW32
AW34
AW36
AW40
AW48
AV11
AY12
AY22
AY28

1

VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158

2

C

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79

2

AA17
AA2
AA3
AA33
AA34
AB11
AB14
AB39
AB4
AB43
AB5
AB7
AC19
AC2
AC21
AC24
AC33
AC34
AC48
AD10
AD11
AD12
AD13
AD19
AD24
AD26
AD27
AD33
AD34
AD36
AD37
AD38
AD39
AD4
AD40
AD42
AD43
AD45
AD46
AD8
AE2
AE3
AF10
AF12
AD14
AD16
AF16
AF19
AF24
AF26
AF27
AF29
AF31
AF38
AF4
AF42
AF46
AF5
AF7
AF8
AG19
AG2
AG31
AG48
AH11
AH3
AH36
AH39
AH40
AH42
AH46
AH7
AJ19
AJ21
AJ24
AJ33
AJ34
AK12
AK3

D

+VCCA_DAC_1_2

2

H5

+3VSUS_ORG
@

R1.1 11/10

1 0Ohm

GND
GND

R1.0
+VTT_PCH_VCCIO
+VTT_PCH_ORG
+1.05VS
+1.5VS
+VCCAFDI_VRM
+3VS
+3VS_VCC3_3
+3VM_SPI
+1.8VS
+VCCP

B

+1.05VS

+VTT_PCH_ORG

JP2601
1

1

2

JP2602

4.56A=330mA+1.3A+2.925A
2

1

3MM_OPEN_5MIL

+VTT_PCH_VCC

1

2

1.3A

+1.5VS

2

Frank
20110614 Follow Everest

1

2

1
+VTT_PCH_VCCIO

JP2603
1

+VCCAFDI_VRM

160mA

SR2602

2MM_OPEN_5MIL

2
NB_R0402_20MIL_SMALL

+VTT_PCH_VCCIO 20,27
+VTT_PCH_ORG 22,27
+1.05VS
27,57,82,87
+1.5VS
7,53,57,91
+VCCAFDI_VRM 27
+3VS
17,20,21,22,23,24,25,27,28,30,32,33,36,37,44,45,48,50,51,53,57,59,61,80,91,92
+3VS_VCC3_3 27
+3VM_SPI 28
+1.8VS
7,25,57,80,84
+VCCP
3,4,6,7,30,32,57,82

B

2.925A
2

R1.0
Delete
+VTT_PCH_VCC
+VTT_PCH_VCCDPLL_EXP
+VTT_PCH_VCCAPLL_EXP
+VTT_PCH_VCCDPLL_FDI
+VTT_PCH_VCCAPLL_FDI
+3VS_VCCA3GBG
+3VS_VCC_GIO
+VCCA_DAC_1_2
+3VS_VCCA_LVDS
+3VM_VCCPSPI
+V_NVRAM_VCCPNAND
+1.8VS_VCCTX_LVD
+VCCIO_CPU_VCC_DMI
+VTT_PCH_ORG_VCCCLKDMI

VCCVRAM use +1.5VS in mobile
HAD_SYNC should pull high to +3VSUS

2MM_OPEN_5MIL

Frank
20110608 EVERST remove 1.8VS and +VTT_PCH_ORG

A

A

Title : PCH(7)_POWER,GND
Engineer:

PEGATRON COMPUTER INC
Size

5

4

3

2

Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
1.0
Sheet
1

26

of

93

5

4

3

2

1

U2001I

POWER

AC29

0.803A/23*20= 698mA

AC31

2

2

AD29

1

1

1
2

1
2

2

1

+1.05VM_ORG

C2741
1UF/6.3V

AD31
W21

GND
GND

W23

GND
W24
W26
W29
W31
W33
N16

VccASW9
VccASW10
VccASW11
VccASW12
VccASW13
VccASW14

1

VccASW15

BD47

75mA

BF47

+VTT_PCH_ORG

1
0Ohm

2
R2708

C2715
1UF/6.3V

+VTT_PCH_ORG_SSCVCC
R2709 1 0Ohm
95mA
2
AG33
+VTT_PCH_ORG
GND
0.1UF/16V
C2717
2
1 VCCSST V16
1UF/6.3V
C2718
GND
GND
+V1.05VM_ORG_VCCSUS T17
2 0Ohm
V19
@ C2719
R1.0
1UF/6.3V
2

R1.0
Intel Comments

R1.1

C2703

1

1
1

1kOhm/100Mhz

P20

AA16

L2702
2

VccVRM3

VccIO25

VccADPLLA
VccADPLLB

VccIO26
VccAPLLSATA

2

1UF/6.3V

VccIO16
VccDIFFCLKN1
VccDIFFCLKN2
VccDIFFCLKN3

VccIO27
VccIO28

VccSSC

2

1

+3VS

2

1

VccIO29

V_PROC_IO

GND

GND

C2704

1
1

1

+VTT_PCH_VCCA_B_DPL

L2703
2
1kOhm/100Mhz

C2740

1UF/6.3V

2

2

+VTT_PCH_VCCA_B_DPL
22UF/6.3V

5

4

R1.1

W16
T34

187mA/8=22.25mA

AJ2

187mA/8=22.25mA

1
2
2

1

+5VS

3
C2731
1UF/6.3V

10/31 Link

C2735
0.1UF/16V

C2734
0.1UF/16V

1

2

+3VS_VCC3_3

NB_R0402_20MIL_SMALL
C2733
0.1UF/16V

C

AF13
AH13

3.799A/29*4= 0.524mA

AH14
AF14

C2736
1UF/6.3V

SP2709

+VTT_PCH_VCCIO

+VTT_PCH_ORG_VCCAPLL_SATA3
@

+VCCAFDI_VRM
+VTT_PCH_VCCIO_VCC_SATA

AC16

3.799A/29*3= 393mA

AC17

SP2710

2 L2705

+VTT_PCH_ORG

VccASW21

T21 PCH_VCC_1_1_20

C2737
10UF/10V
@

GND
1

2

+VTT_PCH_VCCIO

NB_R0603_32MIL_SMALL

AD17
C2738
1UF/6.3V

R1.0
Intel Comments

0.803A/23*3= 105mA

+1.05VM_ORG
B

VccASW22
VccASW23

V21 PCH_VCC_1_1_21

Frank
20110608 Remove short pins but EIH31 does not.

T19 PCH_VCC_1_1_22

VccSusHDA

P32

+3VSUS_ORG_VCCPAZSUS
SP2714
1
2

10mA

R1.0
Intel Comments

C2739
0.1UF/16V

GND

+1.05VS

+5VSUS_ORG

+1.05VM_ORG

JP2705
2

2

1

1.01A
1

1MM_OPEN_M1M2

Frank
20110614 Follow Everest
+3VS_VCC3_3

2

1kOhm/100Mhz 1

AF11 147mA/4=36.75mA

1

266mA

1

NB_R0603_32MIL_SMALL

GND

AK1

+VCC_RTC
+3VA
+1.05VS
+VTT_PCH_ORG
+VTT_PCH_VCCIO
+1.05VM_ORG
+VCCDIFFCLKN
+VCCAFDI_VRM
+3VS
+3VS_VCC3_3
+VCCP
+5VSUS
+5VS
+3VSUS_ORG
+3VSUS

+3VSUS_ORG

Frank
NB_R0603_32MIL_SMALL
20110608
C2739 is 1uF in EIH31.

R1.0
Delete
+VTT_PCH_VCCUSBCORE
+VTT_PCH_VCCIO_SATA3
+VTT_PCH_ORG_VCCAPLL_SATA3
+VTT_PCH_VCCA_A_DPL
+VTT_PCH_VCCA_B_DPL
+VTT_PCH_ORG_SSCVCC
+VCCDPLL_CPY
+VTT_PCH_VCCIO_VCC_SATA
+3VS_VCC_CLKF33
+3VS_VCCPCORE
+3VS_VCCPPCI
+VTT_CPU_VCCPCPU
+5VSUS_ORG
+5VSUS_PCH_VCC5REFSUS
+5VS_PCH_VCC5REF
+3VSUS_ORG_VCCPAZSUS
+3VSUS_ORG_VCCPSUS

+VCC_RTC 20,22
+3VA
6,20,26,30,31,57,59,60,81,88,93
+1.05VS
26,57,82,87
+VTT_PCH_ORG 22,26
+VTT_PCH_VCCIO 20,26
+1.05VM_ORG
+VCCDIFFCLKN
21
+VCCAFDI_VRM 26
+3VS
17,20,21,22,23,24,25,26,28,30,32,33,36,37,44,45,48,50,51,53,57,59,61,80,91,92
+3VS_VCC3_3 26
+VCCP
3,4,6,7,30,32,57,82
+5VSUS
51,57,59,91
+5VS
36,37,48,50,51,57,80,87,91
+3VSUS_ORG 20,21,22,24,25,26,33
+3VSUS
4,22,24,28,30,60,81,92
PEGATRON COMPUTER INC

GND
3

1 R2712 2
100Ohm

GND

Size
GND

D2702
1V/0.2A

SP2707

1

VccRTC

109mA

1MM_OPEN_M1M2

+3VS

+3VSUS_ORG

+3VS_VCCPCORE

GND

DcpSus2
DcpSus3

1

1

2
NB_R0402_20MIL_SMALL

+3VSUS_ORG

JP2703

22UF/6.3V

1

GND
178mA/8*2pin=44.5mA

DcpSST

1MM_OPEN_M1M2

1kOhm/100Mhz
C2713

1

+5VSUS_ORG

GND

+5VS_PCH_VCC5REF

2

VccVRM4

JP2702
2

2

2

C2702

2

R2702
0Ohm
@

2

C2730
1UF/6.3V
@

1 R2711 2
100Ohm

C2732
1UF/6.3V

P22

1MM_OPEN_M1M2

+VTT_PCH_ORG

A

1UF/6.3V

2
SP2706

N22

C2729
1UF/6.3V

GND

+3VSUS_ORG_VCCPSUS

N20

11/04

JP2701

11/02

3
1

1mA

GND

+5VSUS_DS3
1

1

P34

Frank
0503 Remove Remove +1.05VM.

+3VS_VCC_CLKF33

2

+3VSUS_ORG_VCCPSUS

C2724
0.1UF/16V

2 0Ohm

1

AN24

R1.0

+3VSUS_DS3

+VTT_PCH_VCCA_A_DPL

2

+VCCA_USBSUS

10mil trace
A22

+VTT_PCH_VCCIO +5VSUS_PCH_VCC5REFSUS

+VTT_PCH_VCCIO_SATA3

1
2

1
2

C2723
1UF/6.3V

2

GND

MISC

BJ8

6uA

2

GND

Vcc3_3_6

DcpRTC

GND

Frank
20110608 R2701 is un-mounted and L2701 is mounted in EIH31

GND

AN23

C2722
0.1UF/16V

R1.1

10UF/10V

Vcc3_3_5

Vcc3_3_8

HDA

10/31 Link

GND

C2701

VccSus3_3_9
VccSus3_3_10

VccASW20

+VCC_RTC

2

VccSus3_3_8

VccASW19

CPU

2

2mA

GND
R1.1

C2720
4.7UF/6.3V

GND

1

1
SP2705

VccASW18

1

NB_R0603_32MIL_SMALL

Intel Comments

2

11/02

02V000000001

@ L2701

VccSus3_3_7

Vcc3_3_7

RTC

@

COUGAR_POINT_ES1

1

+VCCAUPLL

M26 1mA

VccASW17

COUGAR_POINT_ES1

R2701

T26

2

R2710 1

1

R1.1

D2701
1V/0.2A

1

GND

AF34
AG34

+VCCDIFFCLKN
C2716
1UF/6.3V

+3VSUS_ORG

GND

2

NB_R0402_20MIL_SMALL

3.799A/29=131mA AF17
50mA
AF33

D

P24

1

+VCCDIFFCLK

2

+3VSUS_ORG

V24

2

1

2

1

75mA

+VTT_PCH_VCCA_B_DPL

GND

+3VS_VCC3_3

V5REF

VccASW16

SP2716

+VTT_CPU_VCCPCPU
SP2701
+VTT_PCH_ORG
1
2

R1.0
Intel Comments

VccSus3_3_6

SATA

1
2

Y49

+VTT_PCH_VCCA_A_DPL

1

+VTT_PCH_VCCIO

+VCCAFDI_VRM

C2714
0.1UF/16V

GND

+1.05VM_ORG

GND

DcpSus4

VccIO24

147mA/4=36.75mA

V23

1

NB_R0603_32MIL_SMALL

1

VccASW8

V5REF_Sus

VccIO23
+VCCRTCEXT

C2727
0.1UF/16V

NB_R0402_20MIL_SMALL

VccASW3

VccASW7

SP2703

T24

2

AC27

VccIO22

VccASW6

+3VSUS_ORG_VCCPUSB
R1.1 10/31 Line up

65mA

1

R1.0
Intel Comments

T23

2

AA31
AC26

GND

T29

VccASW2

VccASW5

C2726
1UF/6.3V

3.799A/29=131mA

VccASW1

VccASW4

+VTT_PCH_VCCIO

1

AA29

GND

VccSus3_3_4

2

T27

1

AA27

GND

VccSus3_3_3

1

NB_R0603_32MIL_SMALL

2

AA26

@

P28

2

2

AA21

DcpSus1

PCI/GPIO/LPC

1

2

AA19

GND

VccSus3_3_2
VccIO15

SP2702

2

3.799A/29=131mA

VccAPLLDMI2

VccSus3_3_5

C2712
1UF/6.3V

P26

1

AL29

C2708
1UF/6.3V
@

C2711
1UF/6.3V

VccIO21
VccSus3_3_1

USB

BH23

AA24

C2710
22UF/6.3V

VccIO20

T38
178mA/8=22.25mA Vcc3_3_4

Frank
20110608 C2741,C2719, C2713,C2740 is mounted in EIH31

C2709
22UF/6.3V

DcpSusByp

+3VS_VCC_CLKF33

NB_R0402_20MIL_SMALL
+VCCDPLL_CPY
+VCCSUS1
120mA/3=40mA
AL24

GND

3.799A/29*5= 655mA

2
V12

0.1UF/16V
GND +VCCAPLL_CPY_PCH
2

N26

2

C2706
@

SP2715 1

+VTT_PCH_VCCIO

10UF/10V

VccDSW3_3

1
2

1
2

2 1kOhm/100Mhz

@ C2707

VccIO18
VccIO19

GND

1

@ L2704 1

T16

PCH_VCCDSW

C2705
0.1UF/16V

+VTT_PCH_ORG

1mA

VccIO17

1

+VCCPDSW

+VTT_PCH_VCCUSBCORE

VccAClk

1

R2704 1/NON_DS3 2 0Ohm
R2705 1
2 0Ohm
R1.1 DS3 10/31 /DS3

+3VSUS_ORG
+3VA

AD49

2

+VTT_PCH_VCCACLK

2

2 0Ohm

Clock and Miscellaneous

@

1

1

U2001J
R2703

+VTT_PCH_ORG

1

B

H46
K18
K26
K39
K46
K7
L18
L2
L20
L26
L28
L36
L48
M12
P16
M18
M22
M24
M30
M32
M34
M38
M4
M42
M46
M8
N18
P30
N47
P11
P18
T33
P40
P43
P47
P7
R2
R48
T12
T31
T37
T4
W34
T46
T47
T8
V11
V17
V26
V27
V29
V31
V36
V39
V43
V7
W17
W19
W2
W27
W48
Y12
Y38
Y4
Y42
Y46
Y8
BG29
N24
AJ3
AD47
B43
BE10
BG41
G14
H16
T36
BG22
BG24
C22
AP13
M14
AP3
AP1
BE16
BC16
BG28
BJ28

2

C

VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285
VSS286
VSS287
VSS288
VSS289
VSS290
VSS291
VSS292
VSS293
VSS294
VSS295
VSS296
VSS297
VSS298
VSS299
VSS300
VSS301
VSS302
VSS303
VSS304
VSS305
VSS306
VSS307
VSS308
VSS309
VSS310
VSS311
VSS312
VSS313
VSS314
VSS315
VSS316
VSS317
VSS318
VSS319
VSS320
VSS321
VSS322
VSS323
VSS324
VSS325
VSS326
VSS327
VSS328
VSS329
VSS330
VSS331
VSS332
VSS333
VSS334
VSS335
VSS336
VSS337
VSS338
VSS339
VSS340
VSS341
VSS342
VSS343
VSS344
VSS345
VSS346

1

D

VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233
VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258

2

AY4
AY42
AY46
AY8
B11
B15
B19
B23
B27
B31
B35
B39
B7
F45
BB12
BB16
BB20
BB22
BB24
BB28
BB30
BB38
BB4
BB46
BC14
BC18
BC2
BC22
BC26
BC32
BC34
BC36
BC40
BC42
BC48
BD46
BD5
BE22
BE26
BE40
BF10
BF12
BF16
BF20
BF22
BF24
BF26
BF28
BD3
BF30
BF38
BF40
BF8
BG17
BG21
BG33
BG44
BG8
BH11
BH15
BH17
BH19
H10
BH27
BH31
BH33
BH35
BH39
BH43
BH7
D3
D12
D16
D18
D22
D24
D26
D30
D32
D34
D38
D42
D8
E18
E26
G18
G20
G26
G28
G36
G48
H12
H18
H22
H24
H26
H30
H32
H34
F3

2

A

Title : PCH(8)_POWER,GND
Engineer:

Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
1.0
Sheet
1

27

of

93

4

3

2

1

PCH SPI ROM
+3VA_EC reserved for share ROM
+3VM_SPI

@

1
0Ohm
1
0Ohm

1
3
2

@

+3VA_EC
+3VSUS

2 /SPI6M
R2872
2
R2870
@

1
0Ohm
1
0Ohm

3
U2805 /SPI4M
1V/0.2A
R2868

1
0Ohm

1
2
3
4

1 0Ohm

2
/SPI6M

4MB

CS#
DO(IO1)
WP#(IO2)
GND

8
7
6
5

VCC
HOLD#(IO3)
CLK
DI(IO0)

+3VM_SPI
D

MX25L3206EM2I-12G

ummount:

C2803
0.1UF/25V

05V000000005

R2856, R2864, R2865, R2853,
R2834, R2850, R2851, R2832,
U2802,R2869, R2870, R2868,
U2801

U2801
/SPI6M
30 SPI_CS#1_EC
30 SPI_SO_EC

R2858 2 /SPI4M
R2864 2 /SPI4M

1 0Ohm SPI1_CS#0
1 0Ohm SPI1_SO

R2855 2 /SPI6M
R2856 2 /SPI6M

1 0Ohm SPI2_CS#1
1 0Ohm SPI2_SO

20
20

R2860 2
R2859 1
R2834 1

SPI_CS#0
SPI_SO
+3VM_SPI

1%

SPI1_CS#0
1 0Ohm
SPI1_SO
33Ohm
2
2 3.3KOhm +3VM_SPI1_WP#

1
2
3
4

CS#
VCC
SO/SIO1
HOLD#
WP#/ACC
SCLK
GND
SI/SIO0

8
7
6
5

SPI1_CLK
SPI1_SI

R2849 1
R2852 1

2
2

33Ohm 1%
33Ohm 1%

2
2

33Ohm 1%
33Ohm 1%

SPI_CLK
SPI_SI

20
20

MX25L1606EM2I-12G
05V000000010

SHARE ROM CONFIG2
30
30

SPI_CLK_EC
SPI_SI_EC

4MB

R2866 2 /SPI4M
R2869 2 /SPI4M

1 0Ohm
1 0Ohm

SPI1_CLK
SPI1_SI

R2871 2 /SPI6M
R2865 2 /SPI6M

1 0Ohm
1 0Ohm

SPI2_CLK
SPI2_SI

+3VM_SPI2

1

U2801 ME Firmware 2MB
U2802 EC+BIOS

R2836
3.3KOhm

(2MB)

1

R2855,
R2852,
C2803,
D2802,

(4MB)

2

2

U2803 ME+BIOS+EC

+3VM_SPI

co-lay

1

1V/0.2A
2
R2848

51,81,91

2

2
R2867
2
R2863

36,48,91

+12VSUS

C2804
0.1UF/25V
/SPI6M
U2804
/SPI6M

ummount:
R2858, R2862, R2866, R2867, U2803

20

R2853 2 /SPI6M
R2854 1 /SPI6M
R2835 1 /SPI6M

SPI_CS#1
+3VM_SPI2

1 0Ohm
2 33Ohm 1%
2 3.3KOhm

SPI2_CS#1
SPI2_SO
+3VM_SPI2_WP#

1
2
3
4

CS#
DO(IO1)
WP#(IO2)
GND

R2832
3.3KOhm
/SPI6M
1

U2802

+3VSUS

+12VS

+12VSUS
+3VM_SPI

2

D

D2803
@

@ D2802
+3VA_EC

@

+12VS

17,20,21,22,23,24,25,26,27,30,32,33,36,37,44,45,48,50,51,53,57,59,61,80,91,92

2

U2801

+3VS

+3VM_SPI2

R2.0 12/15

SHARE ROM CONFIG1

+3VS

1

5

PCH SPI ROM

VCC
HOLD#(IO3)
CLK
DI(IO0)

8
7
6
5

SPI2_HOLD#
SPI2_CLK
SPI2_SI

R2850 1 /SPI6M
R2851 1 /SPI6M

MX25L3206EM2I-12G
05V000000005

(4MB)

32Mb (05V000000005)
0500-00NF000 WINBOND/W25Q32BVSSIG
0500-00VV000 MXIC/MX25L3206EM2I-12G

C

<6.5 inch

<6.5 inch

PCH

EC
SPI ROM

SPI Debug Connector

C

+3VS

PCH SMBus

1

1

SMBUS Link device
+12VS

R2804
4.7KOhm

eDP
WLAN
CPU XDP
PCH XDP

2

2

R2803
4.7KOhm

+3VSUS
+3VS

2

layout space issue, so remove J2801.
21

6

SCL_3A

1

SMB_CLK_S

17,53,59

B

B

21

5

Q2801A
UM6K1N

PCH

3

SDA_3A

4

SMB_DAT_S 17,53,59

Q2801B
UM6K1N

@
1
R2801
1

2
0Ohm
2

R2802

0Ohm

+12VSUS
+12VS

+3VSUS
2

+3VS
30,50,74

SMB1_CLK

1

Q2802A
UM6K1N
6

SML1_CLK

30,50,74

SMB1_DAT

5

EC, VGA Thermal
4

21

PCH
Q2802B
UM6K1N
3

SML1_DAT 21

A

SMB1_CLK_Thermal
SMB1_DAT_Thermal

30,50,74
30,50,74

+3VS
Plamrest Thermal

A

Joyoung R1.0

Title : PCH(9)_SPI,SMB
Engineer:

PEGATRON COMPUTER INC
Size

5

4

3

2

Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
1.0
Sheet
1

28

of

93

5

4

3

2

1

D

D

C

C

B

B

A

A

Title : CLK_ICS9LRS3197
PEGATRON COMPUTER INC
Size
Custom
Date:
5

4

3

2

Engineer:

Joyoung_Chianhg

Project Name

Rev

MA50

Monday, February 13, 2012

1.0
Sheet
1

29

of

93

5

4

3

2

1

+3VA_EC
+3VS
+3VSUS
+3VA

+3VA_EC
+3VS
+3VSUS
+3VA

28,32
17,20,21,22,23,24,25,26,27,28,32,33,36,37,44,45,48,50,51,53,57,59,61,80,91,92
4,22,24,28,60,81,92
6,20,26,27,31,57,59,60,81,88,93

+3VA

For NPCE795 Power
EIH
GND

R1.1 IOAC 10/31

RF_DET#

+3VA_EC

C3002
0.1UF/16V

1

1

C3001
10UF/10V

C3004
10UF/10V

C3003
0.1UF/16V
+3VS

2

LAD0
LAD1
LAD2

GND

R3048
100KOhm

R1.3

1

U3001
NPCE794LA0DX

1
2
R3023 /IOAC 0Ohm

SP3006

+VCCP
25 H_PECI_EC
22 ME_AC_PRESENT

ER 1129
Remvoe the VPS

T3016
T3014

1
1
1

VCCIO_CPU_EC
2
NB_R0402_20MIL_SMALL
NUM_LED#
NC_GPIO40

22 PM_PWRBTN#
GND
+3VA_EC
22 PM_RSMRST#
92 ALL_SYSTEM_PWRGD
59 CHG_LED_ORANGE#
22 PM_SUSC#
45 LCD_BACKOFF#

T3003

1

BAT2_IN_OC#

T3008

1

CAP_LED#

4
THRO_CPU
81,92 SUS_PWRGD
21,59 EXT_SCI#
22,91 SLP_SUS#
52
USB_CB1
59 PWR_LED#
31
KSO17
31
KSO16
31
KSO15
31
KSO14
31
KSO13
31
KSO12

LAD3
LCLK
LFRAME#
VDD
GND1
GPIO24
LRESET#
GPIO11/CLKRUN#
GPIO65/SMI#
GPIO26/PSCLK2
GPIO27/PSDAT2
VTT
PECI
GPIO34
GPIO36
GPIO40/F_PWM
GPIO42/TCK
GND2
VCC1
GPIO43/TMS
GPIO44/TDI
GPIO45/E_PWM
GPIO46/TRST#
GPIO47/SCL4
GPIO50/PSCLK3/TDO
GPIO51
GPIO52/PSDAT3/RDY#
GPIO53/SDA4
ECSCI#/GPIO54
GPIO55/CLKOUT/IOX_DIN_DIO
GPIO56/TA1
GPIO15/A_PWM
GPIO57/KBSOUT17
GPIO60/KBSOUT16
KBSOUT15/GPIO61/XOR_OUT
KBSOUT14/GPIO62
KBSOUT13/GPIO63
KBSOUT12/GPIO64

AVCC
GPIO94/DA0
GPIO93/AD3
GPIO92/AD2
GPIO91/AD1
GPIO90/AD0
GPIO04
GPIO03
GPIO07
GPIO06/IOX_DOUT
F_SCK
GPIO81
F_CS0#
GND5
VCC4
F_SDIO&F_SDIO0
F_SDI&F_SDIO1
VCC_POR#
GPIO77
GPO76/SHBM
GPIO75
GPIO66/G_PWM
GPIO41
GPIO02
GND4
GPIO00/EXTCLK
VCC3
GPIO72
GPIO71
GPIO70
GPIO37/PSCLK1
GPIO35/PSDAT1
GPIO17/SCL1
GPIO22/SDA1
GPIO74/SDA2
GPIO73/SCL2
GPIO33/H_PWM
GPIO32/D_PWM

EC_AGND

C3010
1UF/10V

EC_AGND

102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65

Change to 5%
R1.3

For PU / PD

+3VACC
ME_PWROK 22
Remove short pin, have short pin at PCH side
ME_PM_SLP_LAN# 22

ME_PM_SLP_LAN#
G_Y_OUT/ME_+VM_PWRGD/NC
ME_PM_SLP_M#

no RF Switch
F_SCK_EC

ME_PM_SLP_M# 22
AD_IINP 88
BAT1_IN_OC# 90
PWR_SW# 59
1
no DISTP_LED# R3014 1
R3003
CPU_VRON

F_CS0#_EC

+3VA_EC

+3VA_EC

2
2 0Ohm
0Ohm

BT_ON
25,53,61
LAN_WAKE# 22,33
SPI_CLK_EC

28

80
28

GND
+3VA_EC
SPI_SI_EC 28
SPI_SO_EC 28

PRECHG/NC
SHBM
3G_ON#

1
1
1

T3011
T3012
T3023

R3004

1

R3005

1

RN3001A
RN3001B

2 100KOhm BAT1_IN_OC#
@

R3012

1 10KOhm 2

R3026

1 10KOhm 2

R3015

1 10KOhm 2

SMB0_CLK
SMB0_DAT

1 4.7KOhm 2
3 4.7KOhm 4

LID_SW#
R2.1 01/18

2 47KOhm BAT2_IN_OC# R2.0 12/13

R1.1 IOAC
10/31

+3VS

R3016

1 10KOhm 2

PWR_SW#

R3027

1 10KOhm 2 @

RF_DET#
R2.1 01/18

RN3001D
RN3001C

SMB1_DAT
SMB1_CLK

7 4.7KOhm 8
5 4.7KOhm 6

Remove PU to TP CON side.

22

GND
SUSCLK

22

+3VA_EC

VGA_THRALARM#
CRT_IN#_EC

1

T3026

LID_SW# 31,45
PM_SUSB# 22
OP_SD# 37
VGA_THRALARM#

74

JM50 ADPS FUNC
EIH

SMB0_CLK 60,88
SMB0_DAT 60,88
SMB1_DAT 28,50,74
SMB1_CLK 28,50,74
EC_SPKR 36
LCD_BL_PWM 45

PM_SUSB#
PM_SUSC#

R3006
R3007

1
1

2 100KOhm
2 100KOhm

CPU_VRON

R3009

1

2 100KOhm

1

2 10KOhm

Joyoung R1.0
+3VS

R1.1 for GPU off logic control.
R3022

1 10KOhm 2

VGA_THRALARM#

R3017

1 10KOhm 2

A20GATE

No cap sensor
PM_RSMRST#

R3011

R3018 1 10KOhm 2
RCIN#
R3019 2
1 4.7KOhm
R3021 2
1 4.7KOhm

SUSB_EC#
SUSC_EC#

AC_IN_OC is pulled high at power
GND
GND

+3VSUS

R2.0 12/14
@
R3020

VSUS_ON

794L:06V380000003
795L:06V380000001 (BOM use)

R3008

1

@

GND

210KOhmPM_PWRBTN#

1

2 100KOhm

10KOhm

R3013

2

1

1

2 R3028

3G_ON#

Remove Vsus_ON pull hight to +3VSUS
10KOhm

B

RF_DET#
B

+3VA_EC

R2.1 01/18
GND
100KOhm

R1.1 For IOAC, 10/31 PLT_RST#
31
31
31
31
31

KSO11
KSO10
KSO9
KSO8
KSO7
GND

1UF/10V 2

1 C3009

GND
KSO6
KSO5
KSO4
KSO3
KSO2

2

1

R3054

Pull down for nc
Joyoung R1.1

VSUS_ON

R1.3 VSUS_ON Pull High to +3VA_EC
FAN0_TACH 50
WLAN_RST# 53 R1.1
PM_PWROK 4,22,92
KSI7
31
KSI6
31
KSI5
31
KSI4
31
KSI3
31
KSI2
31
KSI1
31
KSI0
31
KSO0
31
KSO1
31

+3VA_EC
31
31
31
31
31

C

WLAN_WAKE#
LAN_WAKE#

EC_RST# 22,32

FAN0_PWM 50
WLAN_WAKE# 53
ME_SUSPWRDNACK

WLAN_WAKE#

R2.0 12/20
1 10KOhm 2 G_Y_OUT/ME_+VM_PWRGD/NC

R3025

SPI_CS#1_EC

F_SDIO_EC
F_SDI_EC

No cap sensor

Remove short pin, have short pin at PCH side

R1.1 IOAC /10/31

39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64

KBSOUT11&P80_DAT
KBSOUT10&P80_CLK
KBSOUT9/SDP_VIS#
KBSOUT8
KBSOUT7
VCORF
GND3
VCC2
KBSOUT6/RDY#
KBSOUT5/TDO
KBSOUT4/JEN0#
KBSOUT3/TDI
KBSOUT2/TMS
KBSOUT1/TCK
KBSOUT0/JENK#
KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7
GPIO13/C_PWM
GPIO14/TB1
GPIO01/TB2

USB_CB1

EC_AGND

C3007
0.1UF/16V

1

2
C

IOAC_EN
4,24,32,33,53,59,70 BUF_PLT_RST#
22,59 PM_CLKRUN#
25,44 EXT_SMI#
59 TP_CLK
59 TP_DAT

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38

LAD2
LAD1
LAD0
SERIRQ
GPIO10/LPCPD#
GPIO67/PWUREQ#
KBRST#/GPIO86
GPIO85/GA20
GPIO31/SDA3
GPIO23/SCL3
GPIO21/B_PWM
GPIO20/TA2/IOX_DIN_DIO
GND6
VCC5
GPIO16
GPIO87/SIN_CR
GPO84/IOX_SCLK/XORTR#
GPO83/SOUT_CR/TRIST#
GPO82/IOX_LDSH/TEST#
GPIO30
GPIO05
GPIO97
GPIO96/DA2
GPIO95/DA1
VREF
AGND

LAD3

+3VS
GND

R1.1 IOAC, 10/31
53,81

C3006
0.1UF/16V

GND

24 CLK_KBCPCI_PCH
20,44,59 LPC_FRAME#
R2.0 12/13

2
0Ohm

1

2
2 RNX3004A
4 RNX3004B
6 RNX3004C
8 RNX3004D

1

47Ohm
47Ohm
47Ohm
47Ohm

2
0Ohm

2

1
3
5
7

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103

20,44,59
20,44,59
20,44,59
20,44,59

1
R3001

GND

1
R3002

C3005
0.1UF/16V

GND
+3VACC

GND

+3VACC

R3047
1KOhm

2

AC_IN_OC is active high,
OD pull high at power

53
R2.1 01/18

EC_AGND

D

+3VA_EC

EIH

1

T3006

1

RF_DET#
VREF

T3017 T3018 T3019

2

EC_CLK_EN/NC

RF_ON
25,53
USBP02_EN 52
VSUS_ON 57,81,91,93
USBP03_EN 52
CHG_LED_BLUE# 59
AC_IN_OC 74,88
VRM_PWRGD 80,92

2

2
0Ohm

2

1

1

1

T3005
1
R3010

1
SP3002

1

SCRL_LED#/NC

VSUS_ON_EC

2

Remove short pin, have 0 ohmat PCH side

1

0Ohm

1

3G_ON#/NC

2

2

1

R3024

1 /DS3

2

KB_ID0

USBCHG_EN

+3VA_EC

D

81
59 PWR_LED_standby#
5,9,21 DRAMRST_CNTRL_PCH
22
SUSACK#
R1.1 11/02
25
A20GATE
25
RCIN#
57,91 SUSC_EC#
24,57,91,92 SUSB_EC#
20,44,59 INT_SERIRQ

+3VA_EC
L3001
120Ohm/100Mhz
1
2

JRST3001

2

2

1

1

SCRL_LED#/NC

SGL_JUMP
@

Joyoung R1.0
EC REQUEST
for ROM clear

A

A

Title : NPCE794L
Engineer:
Size
Custom
Date:
5

4

3

2

Joyoung_Chianhg

Project Name

Rev

MA50

Monday, February 13, 2012
1

1.3
Sheet

30

of

93

5

4

3

2

1

D

D

+5VS

+5VS

27,36,37,48,50,51,57,80,87,91

SR-85

R1.0 change net name. Joyoung 0630

LID Switch

+3VA

2 0.1UF/10V

1

1

C3101

R3101
100KOhm

AH180-WG-7
1

Vdd

LID_SW#

30,45 LID_SW#

3

2

GND
C

2

C

OUTPUT
U3101
GND

Keyboard
12V18ABSM012
FPC_CON_26P

28

GND2

GND

B

27
GND

GND1

26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17

30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

J3101

30
30
30
30
30
30
30
30

KSO0 33PF/50V
KSO1 33PF/50V
KSO2 33PF/50V
KSO3 33PF/50V
KSO4 33PF/50V
KSO5 33PF/50V
KSO6 33PF/50V
KSO7 33PF/50V
KSO8 33PF/50V
KSO9 33PF/50V
KSO10 33PF/50V
KSO11 33PF/50V
KSO12 33PF/50V
KSO13 33PF/50V
KSO14 33PF/50V
KSO15 33PF/50V
KSO16 33PF/50V
KSO17 33PF/50V
KSI0 33PF/50V
KSI1 33PF/50V
KSI2 33PF/50V
KSI3 33PF/50V
KSI4 33PF/50V
KSI5 33PF/50V
KSI6 33PF/50V
KSI7 33PF/50V

7
5
3
1
7
5
3
1
7
5
3
1
7
5
3
1
7
5
3
1
7
5
3
1
3
1

8
6
4
2
8
6
4
2
8
6
4
2
8
6
4
2
8
6
4
2
8
6
4
2
4
2

CN3105D
CN3105C
CN3105B
CN3105A
CN3102D
CN3102C
CN3102B
CN3102A
CN3103D
CN3103C
CN3103B
CN3103A
CN3101D
CN3101C
CN3101B
CN3101A
CN3106D
CN3106C
CN3106B
CN3106A
CN3104D
CN3104C
CN3104B
CN3104A
CN3107B
CN3107A

B

R2.1 01/17

The pin define is checked to

keyboard spec. R is KSO, C is KSI. The connector pin define is the same the KB.

need check

A

A

Title : EC_IT8512(2)KB, TP,FP
Engineer:
Size

5

4

3

2

Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
1.3
Sheet
1

31

of

93

5

4

3

2

D

+VCCP

+VCCP

+3VA_EC

+3VA_EC 28,30

+3VS

+3VS

2

2

+3VS

R1.1
add for NV FAE request
choke temp sense.

+3VS

D

17,20,21,22,23,24,25,26,27,28,30,33,36,37,44,45,48,50,51,53,57,59,61,80,91,92

1
1

Q3203A
UM6K1N
@
2

6

1

R3206
10KOhm

4

3

Q3203B
UM6K1N
@
5

VGA_HOT#

3,4,6,7,30,57,82

Thermal Policy
R3208
10KOhm
@

87

1

C

C

74 VGA_OVERTEMP#

50 PR_OVERTEMP#

SP3202 1

0Ohm 1

2 R0402

@

VGA_OVERTEMP#_R

2 R3207

PR_OVERTEMP#_R

50 CPU_THERM#

SP3201

1

2
NB_R0402_20MIL_SMALL

Q3202A
UM6K1N

6

2

1

+3VA_EC

R3204

2

1 47KOhm

D3202

2

1 1.2V/0.1A

D3203

2

1 1.2V/0.1A

EC_RST#

22,30

+VCCP

2 R3201 1
330Ohm

2

5

BUF_PLT_RST#

4

4,24,30,33,53,59,70

Q3202B
UM6K1N

1

3

81,92 FORCE_OFF#

NPCE795 has internal power-on reset circuit
Use 47k ohm to make sure that raising time of POR is less than 10us

C3201
4.7UF/6.3V
@

3
C
1 B

Q3201
PMBS3904
E
2

B

B

4,25 H_THRMTRIP#

A

A

Title : RST_Reset Circuit
Engineer:


Size
Date:
5

4

3

2

Joyoung_Chianhg

Project Name

Custom

Rev

MA50

1.0

Monday, February 13, 2012

Sheet
1

32

of

93

5

4

3

2

1

+VDD1.2_LAN

C3316
+VDD_GPHYPLL

C3339

2

1 0.1UF/10V

PCIE_TXP4_GLAN
PCIE_TXN4_GLAN
CLK_PCIE_LAN
CLK_PCIE_LAN#

1KOhm/100Mhz
09V010000038

C3350
4.7UF/6.3V

21

PCIE_RXN4_GLAN

21

PCIE_TXP4_GLAN
PCIE_TXN4_GLAN

21
21

+VDD1.2_LAN
+VDD33_LOM
+3VS

+VDD_LANPLL

1

CLK_PCIE_LAN 21
CLK_PCIE_LAN# 21

C3360
R3304
1KOhm

C3359
4.7UF/6.3V

L3318
2
1KOhm/100Mhz
09V010000038

2

2

0.1UF/10V

1
1

PCIE_RXN4_LOM

PCIE_RXP4_GLAN

D

L3311
2

2

1 0.1UF/10V

2

2

1

C3334

1

C3351
0.1UF/10V

PCIE_RXP4_LOM

1

2

0.1UF/10V
2

0.1UF/10V

1

C3315

1

1

1

C3321
0.1UF/10V

2

2

Close to LAN chip within 250mils

C3354
4.7UF/6.3V

2

1

+VDD1.2_LAN
D

+VDD1.2_LAN

L_TRDP3
L_TRDN3

4.7KOhm

2

4.7KOhm

2

2

1

1

2

2

1.5KOhm/100Mhz
09V010000039
C

36
35
34
33
32
31
30
29
28
27
26
25

AVDDH

R1.1

AVDDL
AVDDH
AVDDL
RDAC
R3303 1
BIASVDD

L_TRDN2
L_TRDP2

34
34

L_TRDP1
L_TRDN1

34
34

L_TRDN0
L_TRDP0

34
34

AVDDH

2 1.24KOhm

C3337

10V220000198

10/31 EMI CHANGE

+VDD33_LOM

R1.1
change pin define.
1

0.1UF/10V

C3340

L3312
2
1KOhm/100Mhz
09V010000038

1

2

@

+VDD1.2_LAN

0.1UF/10V
2

@

1

AVDDH2
TRD2_N
TRD2_P
AVDDL2
TRD1_P
TRD1_N
AVDDH1
TRD0_N
TRD0_P
AVDDL1
RDAC
BIASVDDH

C3357
4.7UF/6.3V

1

1

R3331

LOW_PWR
PERST#
CLKREQ#
WAKE#
MODE
VDDC1
VREGPNP_CTL
SR_VFB
SR_VDD
SR_VDDP
SR_LX
XTALI

C3358
0.1UF/10V

2

R3337

PCIE_WAKE#_LAN

R3321 2

1

BUF_PLT_RST#

R3312 2

1

+VDD33_LOM

1 LAN_LPWR_R 1
2
1 0Ohm
3
4
5
R1.1 IOAC 10/31
VDDC
6
+VDD33_LOM
7
+VDD1.2_LAN
NB_R0603_32MIL_SMALL
8
SR_VDD
SP3302 1
2
9
10
LX
11
XTALI
12
C3310
C3338
4.7UF/6.3V
0.1UF/10V

25 LAN_LPWR
BUF_PLT_RST#
21 CLK_REQ_LAN#
PCIE_WAKE#_LAN

L3317

R1.0 chnge VPR1.1
P/N.
Delete R5308 for unuse.

GND
LINKLED#
SPD100LED#
SPD1000LED#
TRAFFICLED#
EECLK
EEDATA
VDDO
VDDC3
VMAIN_PRSNT
AVDDL3
TRD3_P
TRD3_N

4,24,30,32,53,59,70

0Ohm

XTALO
XTALVDDH
VDDC2
PCIE_TXD_N
PCIE_TXD_P
PCIE_PLLVDDL1
PCIE_REFCLK_N
PCIE_REFCLK_P
PCIE_PLLVDDL2
PCIE_RXD_P
PCIE_RXD_N
GPHY_PLLVDDL

Frank
0503 LAN_LPWR is not defined GPIO in PCH .

49
48
47
46
45
44
43
42
41
40
39
38
37

2

@
C

R1.2-26 EMI
AVDDL

10UF/6.3V
U3301

R1.1
change pin define.

34
34

AVDDL

R1.0 Remove PU R for FAE suggestion.

4.7UH

C3331

0.1UF/10V
2

LX

1

1

C3313

EECLK
EEDAT
VDDO
VDDC

L3314
VDDC

1

2

X3303
XTALO_R 1

25MHZ
3

XTALI

4

2

200Ohm

C3333
15PF/50V
1AV200000005

+VDD33_LOM
XTALVDD
1

C3353

1

1KOhm/100Mhz
09V010000038

0.1UF/10V

+VDD33_LOM
+VDD33_LOM

C3332
15PF/50V
1AV200000005

+VDD33_LOM

R3305
1KOhm

1

1

U3302
8
7
6
5

R1.0
OTP mode

+VDD33_LOM

2

1

1.5KOhm/100Mhz
09V010000039

1

L3320
2

@

C3352
4.7UF/6.3V

1

C3356

1KOhm/100Mhz
09V010000038

0.1UF/10V

B

1
2
3
4

AT24C02C-XHM-T
05V020000003
@

C3320
0.1UF/10V

2

1

1

R2.0 12/15

R3308 R3307
1KOhm 1KOhm

VCC A0
WP
A1
SCL A2
SDA GND

C3314
0.1UF/10V
@

L3316
2

1

10/31 EMI CHANGE

+3VSUS_ORG

2

2

EECLK
@
EEDAT

R1.1

2

R3306
1KOhm

B

1

2

1

2

2

BIASVDD

R1.1
change value for -R test report

L3313
2

2

R3110
XTALO

PCIE_RXN4_LOM
PCIE_RXP4_LOM
+VDD_LANPLL
CLK_PCIE_LAN#
CLK_PCIE_LAN
+VDD_LANPLL
PCIE_TXP4_GLAN
PCIE_TXN4_GLAN
+VDD_GPHYPLL

XTALO
XTALVDD

VDDC

13
14
15
16
17
18
19
20
21
22
23
24

BCM57780A0KMLG
02V0H0000001

S 2

LAN_WAKE#

D

22,30 LAN_WAKE#

3

G

1

R3340
10KOhm

PCIE_WAKE#_LAN
R1.1 IOAC 10/31

2N7002
Q5306
@
0Ohm
R3313 2

A

1

A

Title : LAN_BCM57780
Engineer: Joyoung_Chianhg

BG1-HW RD Div.2-NB RD Dept.5
Size
C
Date:
5

4

3

2

Project Name

Rev

MA50

1.0
Sheet

Monday, February 13, 2012
1

33

of

93

5

4

3

2

1

Joyoung R1.0
FAE suggest common mode choke is on chip side.
3

1

R1.1 Mount R3401~R3403 for FAE suggestion 0809
R1.1 Remove R3405~R3407 & C3409

LTRLM3_R

09V090000007
67ohm
L3401
@
D

3

R1.1 Swap L_TRDP3 L_TRDN3 & L_TRDP1 L_TRDN1
R1.1 remove CAP of V_DAC_3, V_DAC_2 and V_DAC_1 for FAE suggestion

4

D

4 RN3400B

0Ohm

2

LTRLM3

R1.1 Add 0 OHM for FAE suggestion 0809
JM50: FAE suggest remove

U3402

L_TRDP1

33

L_TRDP2

17
V_DAC_2 18

1 C3404
33

L_TRDN2

16

33

L_TRDN3

14

1 C3403

V_DAC_3 15
33

L_TRDP3

13

TD2+

MCT2

TCT2

MX2-

TD2-

MX3+

TD3+

MCT3

TCT3

MX3-

TD3-

MX4+

TD4+

MCT4

TCT4

MX4-

TD4-

3

LTRLM0

5

LTRLM1

4

L_CMT1

6

LTRLP1

8

LTRLP2

7

L_CMT2

9

LTRLM2

11

LTRLM3

10

L_CMT3

12

LTRLP3

R3403 1

R3404 1

2 75Ohm

R3402 1

2 75Ohm

R3401 1

0Ohm

2 RN3400A

LTRLP3_R

LTRLP2

3

0Ohm

4 RN3402B

LTRLP2_R

09V090000007
67ohm
L3402
@

LTRLM2

1

0Ohm

LTRLM1

3

0Ohm

2 RN3402A

LTRLM2_R

4 RN3403B

LTRLM1_R

09V090000007
67ohm
L3403
@

LTRLP1

1

0Ohm

2 RN3403A

LTRLP1_R

LTRLP0

3

0Ohm

4 RN3404B

LTRLP0_R

1

R1.0 Change Transformer to smaller
but higher.(joyoung 0904)
Need check for Pin+/- Swap

C

1

C3405
1500PF/2KV

2

C

1

2 75Ohm

GST5009
09V120000003

R1.1 unmount C3409 for FAE suggestion
Joyoung R1.0

LTRLP3
2 75Ohm

2

MX2+

L_CMT0

3

33

19

TD1-

LTRLP0

1

2

0.1UF/16V 2

20
V_DAC_1 21

MX1-

2

3

0.1UF/16V 2

L_TRDN1

1 C3406

TCT1

2

33

22

TD1+

MCT1

1

L_TRDN0

MX1+

4

33

0.1UF/16V 2

23
V_DAC_0 24

1

L_TRDP0

1 C3407

4

33
0.1UF/16V 2

4

PR_S12
Co-lay C3409 & C3411
Co-lay C3410 & C3412

LTRLM0

1

09V090000007
67ohm
L3404
@

3

LAN_GND

0Ohm

2 RN3404A

LTRLM0_R

RJ45

LAN layout note:
MOAT

J3401

LAN_GND

GND
U3401

LTRLP0_R
LTRLM0_R
LTRLP1_R
LTRLP2_R
LTRLM2_R
LTRLM1_R
LTRLP3_R
LTRLM3_R

J3401

1
2
3
4
5
6
7
8

P_GND2
1
2
3
4
5
6
7
8
P_GND1

9

10

LAN_JACK_8P
12V23GBSD008
LAN_GND

B

B

Change RJ45 CON3401
R1.0 Reserve D3401 for EMI.

EMI Req
R1.1 EMI Request 4.7PF & Set Close to Connector, then removed all

R3409 1

R3408 1

2 0Ohm
10V440000001
2 0Ohm
10V440000001
@
1 C3420

10PF/50V

2

10PF/50V

2

1 C3421

10PF/50V

2

1 C3422

R1.0 Mount R3408 for FAE suggestion

LAN_GND

A

A

Title : RJ45
Engineer: Joyoung_Chianhg

BG1-HW RD Div.2-NB RD Dept.5
Size
C
Date:
5

4

3

2

Project Name

Rev

MA50
Monday, February 13, 2012

1.0
Sheet

1

34

of

93

5

4

3

2

1

D

D

C

C

B

B

A

A

Title : MDC CONN
Engineer:


Size

5

4

3

2

Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
1.3
Sheet
1

35

of

93

5

4

2

1

1

+12VS

1

+12VS

3

+5VS

+5VS

27,37,48,50,51,57,80,87,91

+3VS

+3VS

17,20,21,22,23,24,25,26,27,28,30,32,33,37,44,45,48,50,51,53,57,59,61,80,91,92

2

2

SP3604

2

SP3603

UM6K1N
Q3604A 6

5

D

UM6K1N
Q3604B 3

R3603

20 ACZ_SYNC_AUD
R3618

20 ACZ_SDOUT_AUD

D

1

4

ACZ_SYNC_AUD_R

2 0Ohm

1
@

ACZ_SDOUT_AUD_R

2 0Ohm

1
@

+5VS_AMP

+5VS

H_SPKR+
H_SPKRH_SPKLH_SPKL+

SP3606
1

2

37
37
37
37

R3609

@

R0805

+5VS_AMP

2 0Ohm

1

+5VS_AMP

R3608

2 0Ohm

1
@

2

1
2

2

C3623
0.1UF/16V

1

+5VS_AUDIO

C3609
0.1UF/16V

1

+5VS

2

1

R3607
C3615
10UF/6.3V

@

vx_c0603_small

R3604

L3603
2

2 0Ohm

1
@

vx_c0603_small

1

1

1

2

T3602

L3602

C3608
0.1UF/16V

2

+3VS_DVDD

@
C3639
10UF/6.3V

1

2

+3VS

+5VS_AUDIO

GND_AUDIO

EAPD
1

37

H_SPKLH_SPKL+

80Ohm/100Mhz
09V010000023

H_SPKR+
H_SPKR-

1

2 0Ohm

1

vx_c0603_small
C3620
10UF/6.3V

vx_c0603_small
C3610
10UF/6.3V

2
C

GND
SPDIFO
EAPD
PVDD2
SPK-OUT-R+
SPK-OUT-RPVSS2
PVSS1
SPK-OUT-LSPK-OUT-L+
PVDD1
AVDD2
AVSS2

37

VREF_CODEC
+5VS_AUDIO

MIC1_VREFO
MIC_VREFO
C3611
2.2UF/10V

MIC2_VREFO

1
1%
1
T3607
T3610
T3611

@
C3624
10UF/6.3V

@
C3619
10UF/6.3V

@
C3625
10UF/6.3V

MIC1_JD#
GND_AUDIO
GND_AUDIO
GND_AUDIO
GND_AUDIO
vx_c0603_small vx_c0603_small vx_c0603_small vx_c0603_small

INT_MIC_AC_IN_L
INT_MIC_AC_IN_R

1
1

C3612
10UF/6.3V

EXT_MIC_AC_IN_R
EXT_MIC_AC_IN_L

1
1

B

T3605
T3606

1

B

2 39.2KOhm
1

2

GND_AUDIO
R3619

37 HPOUT_JD#

1

AUD_LDO_CAP

2

C3614
0.1UF/16V

vx_c0603_small C3613
C3632
0.1UF/16V
10UF/6.3V

1

ALC271X-VB6-CG
02V0J0000016

C3629
22PF/50V

MIC2_VREFO

AUD_LDO_CAP
GND_AUDIO

2

1
2

@

37
37

1

C3633
0.1UF/16V

ACZ_BCLK_AUD

AC_HP_R
AC_HP_L

T3608
T3609

2

PC_BEEP

1
1

1

20,37 ACZ_RST#_AUD

GND_AUDIO

2

2

1

ACZ_SYNC_AUD_R
R2.1 01/10

2

2

20 ACZ_SDIN0_AUD

2 33Ohm

1
AC_HP_R
AC_HP_L
MIC1_VREFO
MIC_VREFO

1

R3625 1

C3627
2.2UF/10V

1

+3VS

C3626
2.2UF/10V
2

2

ACZ_BCLK_AUD

1

2

1

1

150PF/50V

ACZ_SDOUT_AUD_R

20 ACZ_BCLK_AUD

36
35
34
33
32
31
30
29
28
27
26
25

CBP
CBN
CPVEE
HPOUT-R(PORT-I-R)
HPOUT-L(PORT-I-L)
MIC1-VREFO-L
MIC1-VREFO-R
MIC2-VREFO
LDO-CAP
VREF
AVSS1
AVDD1

1

2

2

37 MUTE_AMP#
C3634

DVDD
GPIO0/DMIC-DATA
GPIO1/DMIC-CLK
PD#
SDATA-OUT
BCLK
DVSS2
SDATA-IN
DVDD-IO
SYNC
RESET#
PCBEEP

SenseA
LINE2-L(PORT-E-L)
LINE2-R(PORT-E-R)
MIC2-L(PORT-F-L)
MIC2-R(PORT-F-R)
SenseB
JDREF
MONO-OUT
MIC1-L(PORT-B-L)
MIC1-R(PORT-B-R)
LINE1-L(PORT-C-L)
LINE1-R(PORT-C-R)

1
2
3
4
5
6
7
8
9
10
11
12

DMIC_DAT
DMIC_CLK

C3637
150PF/50V

GND_AUDIO

49
48
47
46
45
44
43
42
41
40
39
38
37

U3601A
C3618
0.1UF/16V

1

2
C3617
0.1UF/16V
@

13
14
15
16
17
18
19
20
21
22
23
24

45
45

2

vx_c0603_small

C3616
10UF/6.3V

1

1

120Ohm/100Mhz

2

C

R3616
20KOhm
1%
R3620

37 MIC2_JD#

2

1%

2

37 MIC2_L
37 MIC2_R
1 20KOhm

GND_AUDIO
D3601

2

C3622
3

2 R3601
47KOhm

PC_BEEP_C

1

R3615
4.7KOhm
1

2

1V/0.2A

PC_BEEP_R

1

PC_BEEP

2

2

1

30 EC_SPKR

0.1UF/16V

1

20 SB_SPKR

C3621
100PF/50V
@

U3601B
50
51
52
53

GND1
GND2
GND3
GND4

GND8
GND7
GND6
GND5

57
56
55
54

ALC271X-VB6-CG
02V0J0000016
R2.1 01/10
R3606

1

R3611

1

@

2 0Ohm

R3602

1

2 0Ohm

R3627

1

@

2 0Ohm

A

A

@

2 0Ohm
@

GND_AUDIO

GND_AUDIO

Title : AUD(1)_ALC269
Engineer:


Size

5

4

3

2

Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
1.1
Sheet
1

36

of

93

5

4

3

2

1

+5VS

+5VS

27,36,48,50,51,57,80,87,91

+3VS

+3VS

17,20,21,22,23,24,25,26,27,28,30,32,33,36,44,45,48,50,51,53,57,59,61,80,91,92

+5VS_AUDIO

+5VS_AUDIO

36

D

D

Internal Speaker Conn.
add R3706, R3707, R3708, R3709 for EMI request
J3704
36
36
36
36

R3706
R3707
R3708
R3709

H_SPKR+
H_SPKRH_SPKL+
H_SPKL-

1
1
1
1

2 0Ohm
2 0Ohm
2 0Ohm
2 0Ohm

1
2
3
4

1
2
3
4

SIDE1

5
MIC2_JD#

SIDE2

6

3

WtoB_CON_4P
12V17GIRM002

R3701
COMBO_MIC

1

R1.1
2

10/31 KEVIN

2

1

22KOhm
C3713
1000PF/50V
@

2

1

1

C3712
1000PF/50V
@

2

1
2

1
2

C3711
1000PF/50V
@

R2.0 12/16
R1.1 10/31 KEVIN
Q3701

1
G

C3710
1000PF/50V
@

36

D

2 S

R3710

36 MIC2_VREFO

2N7002

2 2.2KOhm

1

C3702

COMBO_MIC

1

2

1

2

C3703

MIC2_R

36

MIC2_L

36

2.2UF/10V

2

1KOhm
GND_AUDIO

2.2UF/10V
2

1
R3714

C3701
10UF/6.3V

GND_AUDIO

R3711
22KOhm
10V240000016

Need change 0702-0028000 in next stage
1

R1.1 Reserved for EMI & Change to 1000PF

GND_AUDIO

C

C

add R3722, R3723 and C3723, C3725 change 100pFfor EMI request

ER1.11

J3701
COMBO_MIC

L3701

2 120Ohm/100Mhz

1

COMBO_MIC_CON

M6
M5_1
M5_2
M4

GND_AUDIO
36 AC_HP_L

R3713 1

2 51Ohm

L3703

1

2 120Ohm/100Mhz

36 AC_HP_R

R3712 1

2 51Ohm

L3702

1

2 120Ohm/100Mhz

HP_L_CON
HP_R_CON

M1
MP

GND_AUDIO
HPOUT_JD#

36 HPOUT_JD#

MQ

GND_AUDIO

2

1
2

1

GND_AUDIO

1
@

B

1

C3706
10PF/50V
@

07V030000013
D3701 BAT54AW
1
3
2
@
1V/0.1A

C3707
33PF/50V

ER1.32

GND_AUDIO

MUTE_AMP# 36

AZ2025-01H.R7G
07V220000006

R2.1 01/17
+5VA

D3706

2

OP_SD#

COMBO_MIC
COMBO_MIC
1

D3702
@
RB751V-40
2
1

2

EAPD

20,36 ACZ_RST#_AUD
30

GND_AUDIO

Close J6701

R3702
1KOhm
@
1

2

B

36

need check
C3709
100PF/50V

2

R3704
10KOhm

@

C3705
100PF/50V

+5VS

1

+3VS

2

C3704
100PF/50V

2

1

PHONE_JACK_7P
12V14GBSD015

+5VS

HPOUT_JD#

HP_L_CON

HP_R_CON
1

EMI request

2

2

1

1

R3703
10KOhm

3

D3704

D3705

1

1

GND_AUDIO
R3705
100KOhm

D3703

C3708

MUTE_AMP#
1

2

D
0.1UF/16V

Q3704
1
2N7002
GND

GND_AUDIO

AZ2025-01H.R7G
07V220000006
2

AZ2025-01H.R7G
07V220000006
2

AZ2025-01H.R7G
07V220000006
2

6

2 S

1
Q3705B
UM6K1N
5

3

G
Q3705A
UM6K1N
OP_SD# 2
A

A

GND_AUDIO

GND_AUDIO

GND_AUDIO

4

ACZ_RST#_AUD

Title : AUD(2)_AMP,JACK
Size

5

Engineer:



GND

4

3

2

Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
1.3
Sheet
1

37

of

93

5

4

3

2

1

D

D

C

C

B

B

A

A

Title : AUD(3)_FM2010
Engineer:


Size

5

4

3

2

Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
1.3
Sheet
1

38

of

93

5

4

3

2

1

D

D

C

C

B

B

A

A

Title : AUD(4)_****
Engineer:


Size
Date:
5

4

3

2

Joyoung_Chianhg

Project Name

Custom

Rev

MA50

1.3

Monday, February 13, 2012

Sheet
1

39

of

93

5

4

3

2

1

D

D

C

C

B

B

A

A

Title : TPM_****
Engineer:


Size
B
4

3

2

Rev

MA50

Date: Monday, February 13, 2012
5

Joyoung_Chianhg

Project Name

1.3
Sheet
1

40

of

93

5

4

3

2

1

D

D

C

C

B

B

A

A

Title : CB(2)_R5C833
Engineer:


Size

5

4

3

2

Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
1.3
Sheet
1

41

of

93

5

4

+3VS

+3VS

17,20,21,22,23,24,25,26,27,28,30,32,33,36,37,44,45,48,50,51,53,57,59,61,80,91,92

+12V

+12V

60,91

3

2

1

D

D

C

C

B

B

A

A

Title : CB(3)_4in1 CardReader
Engineer:


Size

5

4

3

2

Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
1.3
Sheet
1

42

of

93

5

4

3

2

1

D

D

C

C

B

B

A

A

Title : CB(4)_NewCard
Engineer:


Size

5

4

3

2

Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
1.3
Sheet
1

43

of

93

5

4

3

2

+3VS

+3VS

1

17,20,21,22,23,24,25,26,27,28,30,32,33,36,37,45,48,50,51,53,57,59,61,80,91,92

D

D

LPC Debug Port
C

C

+3VS

0Ohm
R4410 @
20,30,59 LPC_AD0

LPC_AD0

20,30,59
25,30
20,30,59
20,30,59
20,30,59

LPC_AD1

LPC_AD1
EXT_SMI#
LPC_AD2
INT_SERIRQ
LPC_AD3

20,30,59 LPC_FRAME#
24

LPC_AD2
LPC_AD3

2

1

2

1

FPC_CON_12P
1
2
3
4
5
6
7
8
9
10
11
12

LPC_FRAME#
CLK_DEBUG
0Ohm
R4411

1
2 SIDE1
3
4
5
6
7
8
9
10
11 SIDE2
12
J4401

R1.1
change pin define to

13

正正 cable.

14

@

B

B

A

A

Title : BUG_Debug
Engineer:


Size
B
4

3

2

Rev

MA50

Date: Monday, February 13, 2012
5

Joyoung_Chianhg

Project Name

1.3
Sheet
1

44

of

93

5

4

3

2

1

+3VS

+3VS

+5VS

+5VS

27,36,37,48,50,51,57,80,87,91

+12VS

+12VS

28,36,48,91

+VCCP

3,4,6,7,30,32,57,82

+VCCP
AC_BAT_SYS

17,20,21,22,23,24,25,26,27,28,30,32,33,36,37,44,48,50,51,53,57,59,61,80,91,92

AC_BAT_SYS

53,81,87,88

D

D

LCD VDDEN / +LED_VCC
+LED_VCC

AC_BAT_SYS

2

C4526
47PF/50V

use integreted IC to control +3VS_LCD
G5243/G5244 colay
C4527
1. Mount R4566=330ohm, No mount R4567 for G5244
47PF/50V 2. No Mount R4566, mount R4567 ohm for G5243

1

2

1

47Ohm

1

+3VS_LCD

C4507
0.1UF/25V

L4502
2

2

LCD_BACK_EN

C4508
0.1UF/25V
@

2

1

1

+3VS_LCD

1

2

2

1
3
2

L_VDDEN_PCH

23 L_VDDEN_PCH

3

2

GND
EN

DSG

4

1

30 LCD_BACKOFF#

D4502
LCD_BKEN_CON
C4506
1UF/10V
@

R4522
100KOhm

GND

C4550
1UF/6.3V

GND

1

2

2
10KOhm

2

1

RB751V-40
1
R4503

G5244T11U

C4551
4.7UF/6.3V

2

1

2

2

23 LCD_BKEN_PCH

0Ohm
1 R4567
@

5

1

LID_SW#

LID_SW#

2
560Ohm
U4503
10V240000029
1
OUT
IN

R4504
10KOhm

D4501
1V/0.1A
30,31

+3VS

R4566
1

GND

R1.1 Change R4566 to 560 ohm & C4551 to 4.7uf for LVDS Sequence
C

C

R1.1 11/09

LVDS Connector

+3VS

C4524
47PF/50V

R2.0 12/15

R4502
0Ohm

11/07

2

R4501
100KOhm
/eDP

3
3

DP_TXN1_PCH
DP_TXP1_PCH

C4501
C4502

1
1

2 0.1UF/10V
2 0.1UF/10V

/eDP
/eDP

LVDS_L0N
LVDS_L0P

23 LVDS_L0N_PCH
23 LVDS_L0P_PCH

R4508
R4509
R4510
R4511
R4514
R4515

3
3

DP_TXN0_PCH
DP_TXP0_PCH

C4503
C4504

1
1

2 0.1UF/10V
2 0.1UF/10V

/eDP
/eDP

LVDS_L1N
LVDS_L1P

23 LVDS_L1N_PCH
23 LVDS_L1P_PCH

R4516
R4517

1 0Ohm
1 0Ohm

2 /LVDS
2 /LVDS

LVDS_L1N
LVDS_L1P

23 LVDS_L2N_PCH
23 LVDS_L2P_PCH

R4518
R4519

1 0Ohm
1 0Ohm

2 /LVDS
2 /LVDS

LVDS_L2N
LVDS_L2P

23 LVDS_LCLKN_PCH
23 LVDS_LCLKP_PCH

R4520
R4521

1 0Ohm
1 0Ohm

2 /LVDS
2 /LVDS

C4505
C4509

DP_AUXP_PCH
DP_AUXN_PCH

2 0.1UF/10V
2 0.1UF/10V

1
1

/eDP
/eDP

LVDS_L2N
LVDS_L2P

2
2
2
2
2
2

/eDP
/LVDS
/LVDS
/eDP
/LVDS
/LVDS

LVDS_L0N
LVDS_L0P

EDID_CLK
EDID_DATA

R4512

LCD_BL_PWM

C4511
1UF/10V
@

DMIC_PWR

2 /eDP

LCD_BKEN_CON

2 0Ohm

31

Camera

R2.1 01/17

R2.1 01/10
+3VS
C3721
47PF/50V

2

0109

CMOS_PWR
L6806
2

24

1

80Ohm/100Mhz

C3738
47PF/50V

2

USB_PN10

C6808
0.1UF/16V

DMIC_DAT

L4512

1

2 120Ohm/100Mhz

DMIC_DAT_R

36

DMIC_CLK

L4513

1

2 120Ohm/100Mhz

DMIC_CLK_R

1 RN7423A

0Ohm

@
2

36

B

1

2

1
2

2

1

R1.0
Remove unmount C

C3735
47PF/50V

+3VS

R4505

R2.0 12/20

+LED_VCC

3

Digital MIC

1

L4507 1kOhm/100Mhz
2
1
R1.3 Use PCH PWM for power saving

USB_PN10_CON
90Ohm/100Mhz USB_PP10_CON
L6805
A

GND

+3V

@

24

4

USB_PP10

0Ohm

3

RN7423B

L6807
2

1
C3734
39PF/50V

2

1
2

A

2 /eDP

Frank
20110513 eDP and LVDS co-lay

LCD_BACK_PWM

1

L_BKLT_CTRL

L4506 1kOhm/100Mhz
2
1

1

23 L_BKLT_CTRL

1 10PF/50V
1 10PF/50V

ER1.27
@

2

30 LCD_BL_PWM

LCD_BL_PWM

1 0Ohm

R4513 1 0Ohm
LCD_BACK_PWM

LVDS_LCLKN
LVDS_LCLKP
C4515 @2
C4514 @2

4

3
3

0Ohm
0Ohm
0Ohm
0Ohm
0Ohm
0Ohm

1

B

1
1
1
1
1
1

SIDE1

DP_HPD
23 EDID_CLK_PCH
23 EDID_DATA_PCH

11/03

12V371BSM002
WTOB_CON_30P
30
USB_PN10_CON 29 30
USB_PP10_CON 28 29
28
27
27
26
35
26
SIDE5
25
25
24
24
23
23
22
22
21
21
20
20
19
19
18
18
17
17
16
16
15
15
14
14
13
34
13
SIDE4
12
12
11
11
10
10
9
9
8
8
7
7
6
33
6
SIDE3
5
5
4
4
3
3
2
2
1
1
J4501

CMOS_PWR

1

1

G

1

1
S 2

R1.1

R4507
0Ohm
/LVDS

2

Q4501
2N7002
/eDP

2

3

R1.1

C4512
1UF/10V
32

D

1

3 DP_HPD#_PCH

2

2

1

+3VS_LCD

SIDE2

eDP
LVDS

C3737
47PF/50V

DMIC_PWR
DMIC_DAT_R
DMIC_CLK_R

1

J4502
1
2
3
4

1
2
3
4

SIDE1
SIDE2

80Ohm/100Mhz

5
6

Title : CRT(1)_LVDS

WtoB_CON_4P
12V17GIRM002

Engineer:


Size

5

4

3

2

Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
1.3
Sheet
1

45

of

93

5

4

3

2

1

D

D

C

C

B

B

A

A

Title : CRT
Engineer: Joyoung_Chianhg

BU1-RD Div.1-HW RD Dept.1
Size

Project Name

Custom
Date:
5

4

3

2

Rev

MA50

1.0

Monday, February 13, 2012

Sheet
1

46

of

93

5

4

3

2

1

D

D

C

C

B

B

A

A

Title : CRT(3)_Display Port
Engineer:


Size

5

4

3

2

Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
1.3
Sheet
1

47

of

93

5

4

3

2

HDMI_TXP2

3

4 RN4801B

0Ohm

HDMI_TXP2_CON

HDMI_TXN2

1

0Ohm

R4830
220Ohm
@
1

2

09V090000007
67ohm
L4801

3

4

1

2

@

D

1

2 RN4801A

HDMI_TXN2_CON

4 RN4802B

HDMI_TXP1_CON

D

@
HDMI_TXP1

2 0.1UF/16V

HDMI_CLKN

C4833 1

2 0.1UF/16V

HDMI_TXP0

23 HDMI_TXN0_PCH

C4835 1

2 0.1UF/16V

23 HDMI_TXP1_PCH

C4828 1

2 0.1UF/16V

23 HDMI_TXN1_PCH

C4829 1

2 0.1UF/16V

HDMI_TXN1

23 HDMI_TXP2_PCH

C4830 1

2 0.1UF/16V

HDMI_TXP2

23 HDMI_TXN2_PCH

C4831 1

2 0.1UF/16V

HDMI_TXN2

2

C4834 1

23 HDMI_TXP0_PCH

0Ohm
@

R4831
220Ohm
@

HDMI_TXN0
HDMI_TXN1

1

HDMI_TXP1

0Ohm

HDMI_TXP0

3

0Ohm

HDMI_TXP0_CON
2

0Ohm

R4832
220Ohm
@
1

2

1

2 RN4803A

HDMI_TXN0_CON

4 RN4804B

HDMI_CLKP_CON

@
3

D

0Ohm

3

4

2N7002

09V090000007
67ohm
L4804

C

R4833
220Ohm
@
1

2

1

2

@

1
2 S

4 RN4803B

09V090000007
67ohm
L4803

3

1
4

2
R4826
2
R4829
2
R4825
2
R4823
2
R4828
2
R4824
2
R4822
2
R4827

HDMI_TXN0

Q4802
G

HDMI_TXN1_CON

@

HDMI_CLKP
3
C

2 RN4802A

@

1
620Ohm
1
620Ohm
1
620Ohm
1
620Ohm
1
620Ohm
1
620Ohm
1
620Ohm
1
620Ohm

Close to connector and do T routing

+5VS

09V090000007
67ohm
L4802

1

23 HDMI_CLKN_PCH

3

2

HDMI_CLKP

3

2 0.1UF/16V

1

C4832 1

4

23 HDMI_CLKP_PCH

GND
HDMI_CLKN

1

Change from H2N7002, because not need special part

0Ohm

2 RN4804A

HDMI_CLKN_CON

@

+12VS

20110909
change Choke Value for EMI
add bridge R

R2.0 12/20

1
G
3

0.35A/6V
1

+5VS_HDMI

ER 1.7

3

D

2 S

F4801
2

D4801
1V/0.1A
07V030000004
1

2

2

4

3
1

+3VS

23
21

Q4806
SI2308DS-T1-E3
+5VS

J4801

HDMI_SCL & HDMI_SDA : no via , trace length should be as short as possible

Q4801B
UM6K1N

HDMI_CLKN_CON
HDMI_CLKP_CON

+5VS_HDMI
1
2 HDMI_HPD_CON
R4803
4.7KOhm

HDMI_TXN1_CON
HDMI_TXP1_CON

18
16
14
12
10
8
6
4
2

18
16
14
12
10
8
6
4
2

B

19
17
15
13
11
9
7
5
3
1

1

2

HDMI_SCL
HDMI_TXN0_CON
HDMI_TXP0_CON
HDMI_TXN2_CON
HDMI_TXP2_CON

HDMI_CON_19P
12V12GBRD001
22
20

EMI_SPRING_PAD
U4801

HDMI_HPD_CON

19
17
15
13
11
9
7
5
3
1

P_GND3
P_GND1

R4804
10KOhm

1

D4802
1.25V/0.15A

1

1

C4826
10PF/50V
@

2

C4827
10PF/50V
@

3

+3VS

HDMI_HPD_PCH

HDMI_SCL
HDMI_SDA

1

23 HDMI_HPD_PCH
1

5

1

+5VS_HDMI
HDMI_SDA

Q4801A
UM6K1N
6
4
3

2

HDMI_DDC_CLK_PCH
HDMI_DDC_DATA_PCH

2

2
23 HDMI_DDC_CLK_PCH
23 HDMI_DDC_DATA_PCH

RN4806B
2.2KOhm

P_GND4
P_GND2

RN4806A
2.2KOhm
+3VS

3

RN4805A
10KOhm
4
2

RN4805B
10KOhm

1

B

need check
+3VS

R1.1 EMI Request for Spring PAD(close to

HDMI conn)

A

A

+12VS

+12VS

28,36,91

+3VS

+3VS

17,20,21,22,23,24,25,26,27,28,30,32,33,36,37,44,45,50,51,53,57,59,61,80,91,92

Title : TV(1)_HDMI
+5VS

5

4

3

+5VS

Size

27,36,37,50,51,57,80,87,91

2

Engineer:



Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
1.3
Sheet
1

48

of

93

5

4

3

2

1

D

D

C

C

B

B

A

A

Title : TV(2)_****
Engineer:


Size

5

4

3

2

Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
1.3
Sheet
1

49

of

93

5

4

3

2

1

D

D

+3VS

+3VS

17,20,21,22,23,24,25,26,27,28,30,32,33,36,37,44,45,48,51,53,57,59,61,80,91,92

+5VS

+5VS

27,36,37,48,51,57,80,87,91

CPU Thermal Sensor
DIMM Thermal Sensor
R5003
0Ohm
@

1

Pleace in the center
of Plamrest.

2
150Ohm

2

Palmrest_THRM_DA

4

C5008
0.1UF/10V

U5002
3
C
1 B

2

32

R1.0
Place near CPU
(10°C for HYST =VCC)
(2°C for HYST = GND)
Hysteresis prevents the output from oscillating
when the temperature is near the trip point.

1
2
3
4

1

1

R5002
0Ohm
CPU_THERM#

Q5001
PMBS3904
E
2

2

G709T1UF
06V220000007

C

+3VS

R5023

2

SET
VCC
GND
OT# HYST

5

+3VS_THEM

PHILIP PMBS3904

1

2
R5004
28KOhm

C5007
0.1UF/10V

2

U5001
1
2
3

1

1

+3VS

1

+3VS

C5001
2200PF/50V

VCC
SMBCLK
DXP SMBDATA
DXN
ALERT#
THERM# GND

8
7
6
5

SMB1_CLK_Thermal
SMB1_DAT_Thermal

28,30,74
28,30,74

C

G781
Plamrest_THRM_DC
PR_OVERTEMP#

32

U5002 place neer power, CPU, PCH area,
SMBUS addr=1001100x (98)
U5002: Remote(Local) thermal sensor,use remote mode.

PWM Fan
C5002 put besides J5001.4
+5VS

B

1

B

R1.1

C5002
10UF/10V

2

2

+3VS

R5001
10KOhm
J5001
1
2
3
4

1
30

FAN0_PWM

1

1
2

C5003
100PF/50V
@

2

30 FAN0_TACH
C5004
100PF/50V
@

1
2
3
4

SIDE1
SIDE2

5
6

WtoB_CON_4P
12V17GIRM002

A

A

Title : FAN_Fan,Sensor
Engineer:


Size

5

4

3

2

Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
2.0
Sheet
1

50

of

93

5

4

3

+3VS

+3VS

17,20,21,22,23,24,25,26,27,28,30,32,33,36,37,44,45,48,50,53,57,59,61,80,91,92

+5VS

+5VS

27,36,37,48,50,57,80,87,91

2

1

D

D

ODD

ZERO POWER ODD SUPPORT
support Hokey turn off ODD power

J5102
SATA_ODD_TXP2
SATA_ODD_TXN2

0.01UF/25V
0.01UF/25V

1
1

2 C6011
2 C6012

SATA_TXP2 20
SATA_TXN2 20

SATA_ODD_RXN2
SATA_ODD_RXP2

0.01UF/25V
0.01UF/25V

1
1

2 C6016
2 C6014

SATA_RXN2 20
SATA_RXP2 20

R5102 1 0Ohm
2
/NON_Zero_ODD

+5VS

2

R5107
10KOhm
/Zero_ODD

R5104
100KOhm
/Zero_ODD

4

5
6

C

2

UM6K1N
Q5101B
/Zero_ODD

R5108
10KOhm
/Zero_ODD

UM6K1N
Q5101A
/Zero_ODD

C5125
1UF/25V
/Zero_ODD

3

1

25 SATA_ODD_PWRGT

R5103
560KOhm
vx_r0402_small
5%

1

+5VSUS

D

1
G

R1.1
add Zero Power ODD

C

2

C6017
10UF/10V

1

+3VS

CE5101
100UF/6.3V
1BV170000001

3

+

2

C6015
0.01UF/25V
@

1

24

1

SATA_CON_13P
12V24GBSD012

SI2308DS-T1-E3
Q5103
/Zero_ODD

1
SATA_ODD_DA#

/Zero_ODD

R1.1
add Zero Power ODD

2

/Zero_ODD
1
R5106

1

2
0Ohm

+12VSUS

25

2

SATA_ODD_DA

SATA_ODD_PRSNT#_R

2

SR-90

NP_NC3

P1
P2
P3
P4
P5
P6

1
R5105

1

NP_NC1

3

2
0Ohm

2

1

SATA_ODD_PRSNT#

1

+5VS_ODD
P1
P2
P3
P4
P5
P6

+5VS_ODD

2 S

S1
S2
S3
S4
S5
S6
S7

D

S1
S2
S3
S4
S5
S6
S7

G

NP_NC2

3

2

1

NP_NC4

2

4

Q5104
2N7002
/Zero_ODD

2 S

Connector for Cable
B

B

R2.0 12/15

12V37GBSM005
WTOB_CON_20P

23

SIDE3

SATA_TXP0_W
SATA_TXN0_W

C5122
C5121

2
2

1 0.01UF/25V
1 0.01UF/25V

SATA_TXP0 20
SATA_TXN0 20

SATA_RXN0_W
SATA_RXP0_W

C5124
C5123

2
2

1 0.01UF/25V
1 0.01UF/25V

SATA_RXN0 20
SATA_RXP0 20

+5VS_HDD1

R1.1

11/02 Remove HDD SATA CONN PART

+5VS
SP5103

C5120
1000PF/50V
@

C5105
0.1UF/16V
@

1

1

2

J5103

Joyoung R1.0
unmount for R1.0 test

HDD

C5119
10UF/10V

2
SHORT_PIN
For power measurement.

2

R1.1 11/09

21
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
22

1

R1.1 11/08

SIDE1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
SIDE2

2

SIDE4

1

24

A

A

不不不

CN1(MB) : pin 8, 9, 10, 17, 18, 19, 20, NC
CN2(HDD) : P1, P2, P3, P10, P11, P12,P13, P14, P15, NC

不不不
Title : XDD_HDD,ODD
Engineer:


Size

5

4

3

2

Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
1.3
Sheet
1

51

of

93

5

4

3

+5V

C5209

D
GND

U5201

5
1
2
3
4

GND

GND

3 GND

57,59,60,91

+5VO

4

Y
Vcc=2~5.5
06V030000005

CE5201
100UF/6.3V

8
7
6
5

GND
OUT1
IN1
OUT2
IN2
OUT3
EN#/EN OC#

C5202
0.1UF/16V
J5201
SSRN1
GND

G547G1P81U
06V290000010

GND

5
4
6
3
7
2
8
1
9

SSRP1
USB_PP1_C

GND
GND

Active High
1.5A

USB_PN1_C
SSTN1

USB_OC0# 24

SSTP1
D

R1.1
Delete R5308 for unuse.

4
RNX5214A

2

3

SSTN1

@
0Ohm

LX5201 N/A
90Ohm/100MHz
09V090000001

6

2

5

3

USB_CB1
GND

D

U5206
SSRN1
SSRP1

LX5202 N/A
90Ohm/100MHz
09V090000001

SSRN1
SSRP1

7
6

SSTN1
SSTP1

AZ1045_04F
R1.1

11/04

+5VO
R5201
2 100KOhm1

4
3
2
1

RNX5218B

@
0Ohm

4

3
USB_PP1_C
1

SELCDP
DP
DM
CEN

2

VDD
TDP
TDM
CB
GND

10
9

GND

U5203
5
6
7
8
9

LINE_1 NC4
LINE_2 NC3
GND(Pin8)
LINE_3 NC2
LINE_4 NC1

CM1293_04SO
07V000000006

SSRP1

RNX5216A

1

1
2
3
4
5

1

C5201
0.1UF/16V

2

4

LX5206
90Ohm/100Mhz
2 R5202 1
10KOhm

SLG55584AVTR
06V150000009

+5VO

2
RNX5218A

R1.1
add for CHG IC OD PIN

4

30

GND

3
@
0Ohm

USB_PP1
USB_PN1

TOP VIEW

GND
SSTN1
SSTP1

RNX5216B
SSRN1

+5VO
24
24

AUDIO

SSTP1
+5V_USB_0

3

2

4
2

USB 2.0

USB_PN1_C

1

0Ohm

1

24 USB3_RX1_N
24 USB3_RX1_P

USB 3.0

GND

1

3

4

USB 3.0
With CHG

D5201
USB_PP1_C

@

SSRN1_C
SSRP1_C

HDMI

10
12

@
0Ohm

4

SSTN1_C
SSTP1_C

2 0.1UF/10V
2 0.1UF/10V

1

1
1

LAN

USB_CON_9P
12V136URD007

2

C5214
C5215

24 USB3_TX1_N
24 USB3_TX1_P

SSRXPGND
SSRX+
D+
GND
DSSTXVBUS
SSTX+

3

RNX5214B
USB3.0 port name not follow Intel to prevent confuse.

11
13

3

2 S
USB_CEN

1

2

2

G

U2404
1 A
VCC
2 B

2N7002
Q5201

+5V

L5201 80Ohm/100Mhz
1
2

C5211
0.1UF/16V

2

1

1

USBP02_EN

1

+5V_USB_0

1

R1.1 Remove C5206 C5207
R5203
100KOhm

30

2

+5VO

P_GND2
P_GND4

R1.1
LV shift for U2404 VIH

P_GND1
P_GND3

+5VO

0Ohm
@

USB_PN1_C
1
R1.1

10/31 EMI

Joyoung 110915 change to BC1.2
USB_CEN
C

C

20110718 Frank
add LX5501,LX5502 change 0909-000I000 for EMI request

USB_OC1#

USB 2.0 port

USB_OC1# 24

D5202

+5V_USB_1
USB_PN2_C

6

1

5

2

4

3

USB_PP2_C

C5208
0.1UF/16V

+5V_USB_1
1

U5202
+5V_USB_2
GND

C5203
0.1UF/16V
@

GND
USB_PP3_C

1

G546A1P1UF
06V290000011
Active High
2.0A

CE5203
100UF/6.3V

R1.1
Delete R5309 for EC strap pin.
GND

+5V_USB_1

R1.1
USB_OC9# 24
chagne USB 2.0 port to port9.

C5204

GND

R1.1 Remove C5206 C5207 C5209

GND

USB_OC9#

USB_PN3_C

CM1293_04SO
07V000000006

GND
C5210
0.1UF/16V

2

1 0.1UF/16V
J5204
SSRN2
GND

U5207

RNX5227B

@
0Ohm

4

/CRUSB30
SSRN2

SSTP2

USB_CON_9P
12V136URD007
/CRUSB30

GND

3
24

SSRP2

USB_PP2

2
RNX5227A

@
0Ohm

B

J5202
+5V_USB_1

1
2
3
4

USB_PN2_C
USB_PP2_C

1

1

0Ohm

SSRXPGND
SSRX+
D+
GND
DSSTXVBUS
SSTX+

3

3
LX5204 @
90Ohm/100MHz
09V090000001

2

1
RNX5232A 2

+5V_USB_1

LX5207
90Ohm/100Mhz

SSRP2_C

need check

SSTN2
SSTP2

USB_PN2_C
SSTN2

/CRUSB30

2

3

0Ohm

4

RNX5232B 4

24 USB3_RX2_N
24 USB3_RX2_P

7
6

GND

AZ1045_04F

/CRUSB30

24 USB_PN2
B

SSRN2
SSRP2

SSTP2

1

0Ohm

10
9

1

2

GND
SSTN2
SSTP2

LINE_1 NC4
LINE_2 NC3
GND(Pin8)
LINE_3 NC2
LINE_4 NC1

4

RNX5229A

LX5203 @
90Ohm/100MHz
09V090000001

1
2
3
4
5

5
4
6
3
7
2
8
1
9

SSRP2
USB_PP2_C

10
12

2 0.1UF/10V /CRUSB30 SSTN2_C
2 0.1UF/10V /CRUSB30 SSTP2_C
1

1
1

SSRN2
SSRP2

/CRUSB30
SSTN2

2

C5218
C5219

24 USB3_TX2_N
24 USB3_TX2_P

3

0Ohm
3

4
4

RNX5229B

11
13

GND
L5203 80Ohm/100Mhz
1
2

P_GND2
P_GND4

8
7
6
5

P_GND1
P_GND3

OC1#
OUT1
OUT2
OC2#

2

GND
IN
EN1/EN1#
EN2/EN2#

2

1
2
3
4

GND
+5VO
30 USBP03_EN

R1.1

/CRUSB30

10/31 EMI CHANGE
GND
R1.1
add USB 2.0 Port

P_GND1
VBUS P_GND3
DD+
GND P_GND4
P_GND2

3

SSRN3
SSRP3

7
6

SSTN3
SSTP3

GND

USB_PN3_C
SSTN3

+5V_USB_2
SSTP3

P_GND2
P_GND4

SSRXPGND
SSRX+
D+
GND
DSSTXVBUS
SSTX+

10
12

USB_CON_9P
12V136URD007
/CRUSB30

+5V_USB_2

/CRUSB30
SSRN3

R1.1

10/31 EMI CHANGE

0Ohm

1

USB_PN9

2
RNX5228A

GND

/CRUSB30

1

@
0Ohm

1

90Ohm/100Mhz
LX5208

24

USB_PP9

C5205
0.1UF/16V

A

2

24
SSRP3

4

LX5209 @
90Ohm/100MHz
09V090000001

3

RNX5235A 2

10
9

AZ1045_04F

2

need check

GND
SSTN3
SSTP3
SSTP3

LINE_1 NC4
LINE_2 NC3
GND(Pin8)
LINE_3 NC2
LINE_4 NC1

5
4
6
3
7
2
8
1
9

P_GND1
P_GND3

3
0Ohm

/CRUSB30

1
2
3
4
5

SSRP3
USB_PP3_C

R1.1
/CRUSB30
chagne USB 2.0 port to port9.
R1.1 SWAP RXN5228 RXN5236 ,LX5208 Vertical SWAP

2

SSRN3_C
SSRP3_C

24 USB3_RX3_N
24 USB3_RX3_P

1

1

J5203
GND
1
2
3
4

USB_PN3_C
USB_PP3_C

4 0Ohm
3 @
RNX5228B
Add for USB port 9 debug port

GND

P_GND1
VBUS P_GND3
DD+
GND P_GND4
P_GND2

5
7
8
6

USB_CON_4P
12V136USD002
GND

24

USB_PP3

2
RNX5236A

0Ohm

USB_PN3_C

3

0Ohm
1

4

4

RNX5236B

2

24 USB_PN3

3

A

LX5205 @
90Ohm/100MHz
09V090000001

0Ohm

4

RNX5235B 4

U5208

1

2

SSTN3

GND

3

RNX5233A

GND
/CRUSB30

SSRN3
SSRP3

2 0.1UF/10V /CRUSB30 SSTN3_C
2 0.1UF/10V /CRUSB30 SSTP3_C
1

24 USB3_TX3_N
24 USB3_TX3_P

1
1

2

C5221
C5220

3

0Ohm

4

4

8
6

USB_CON_4P
/HRUSB20
12V136USD002

J5205
SSRN3
RNX5233B

5
7

11
13

CE5202
100UF/6.3V

2

1

L5202 80Ohm/100Mhz
1
2

/CRUSB30
@
LX5210
90Ohm/100Mhz

/HRUSB20

Title : USB_USB Port
Size

4

3

2

Joyoung_Chianhg

Project Name

Rev

MA50

D

/CRUSB30

Date:
5

Engineer:


USB_PP3_C

1

Monday, February 13, 2012
1

1.3
Sheet

52

of

93

5

4

3

H5301
H5302
CT256CB176D146
CT256CB176D146

+3VS
+3VSUS

PR_S03

+3VS_WLAN

+3VS

WLAN

R2.1 01/18

+1.5VS

+3VS_WLAN

2

1

17,20,21,22,23,24,25,26,27,28,30,32,33,36,37,44,45,48,50,51,57,59,61,80,91,92

+3VSUS

4,22,24,28,30,60,81,92

+1.5VS

7,26,57,91

+3VS_WLAN

+3VS

PCIE_WAKE#_WLAN

/NON_IOAC
1
2

+1.5VS

R1.1 IOAC 10/31

@
1
C5310
33PF/50V

56
55

Place 10UF near +3VS_WLAN source side.

Place 10UF near +1.5VS source side.

C5304
0.1UF/16V
@

C5305
0.1UF/16V
@

vx_c0603_small

C5309
10UF/6.3V

C5307
0.1UF/16V

C5301
0.1UF/16V
@

1

C5303
0.1UF/16V

1

C5302
0.1UF/16V

2

C5306
10UF/6.3V

D

2 S

3

G
3

1
1

4
6
@

IOAC_EN0Ohm 2 /IOAC

30,81 IOAC_EN
RF_DET# 30

2
0Ohm

2

1 R5321

+1.5VS

Q5302
D

1
R5330

3

2 S
RF_DET#_R

0Ohm

AOAC_ON

2
1

25

G

H =4mm

UM6K1N
Q5304B

5

UM6K1N
Q5304A

need mount R2541

R1.1

/IOAC

1

Place 0.1UF near pin 6,28,48.

1

@
2N7002

1

2
1
2
2

WLAN +1.5VS bypass capactor:

Place 0.1UF near pin 2,24,52,39 41.

+3VS_WLAN

DVR1035_Radio control pin design guide for the acer notebook PCI-E module

Vendor request

1

WLAN +3VS bypass capactor:

+3VS_WLAN

MINI_PCI_LATCH_52P
12V44GBSD001

R5307

/IOAC

2 RN5301A

2

NP_NC2
NP_NC1

for AOAC & FFS
R5318
1MOhm
/IOAC

R5319
100KOhm

T5313

R2.0 12/16

+3VO

1

0Ohm

GND13
GND14

R2.1 01/13

1

@

53
54

0Ohm

/IOAC

SI2308DS-T1-E3
Q5303

R5320
200KOhm
/IOAC

Check PCH WLAN_ON power plan

R1.1 IOAC 10/31

@
90Ohm/100Mhz
L5301

1
LED_WLAN#

+3VS_WLAN

25,30

SMB_CLK_S 17,28,59
SMB_DAT_S 17,28,59
4 RN5301B
USB_PN11 24
USB_PP11 24

2

BT_ON_R

1

RB751V-40
D5302

USB_PN11_C
USB_PP11_C

RF_ON

BUF_PLT_RST# 4,24,30,32,33,59,70
WLAN_RST# 30

2 NB_R0603_32MIL_SMALL

1

2

2
0Ohm
2
0Ohm

2 0Ohm
2 0Ohm
3
0Ohm

2

11/02

@
@

1

R5311
10KOhm
R1.1
25,30,61 BT_ON

R5305 1
R5301 1

2

+3VS_WLAN

1 @
R5328
1
+3VS_Vaux_WLAN
R5329
SP5301
1
SMBC
SMBD

1

21 PCIE_TXN2_WLAN
21 PCIE_TXP2_WLAN
+3VS_WLAN

Reserved/UIM_C8
GND8
Reserved/UIM_C4
W_DISABLE#
GND3
PERST#
PERn0
+3.3Vaux
PERp0
GND9
GND4
1.5V_2
GND5
SMB_CLK
PETn0
SMB_DATA
PETp0
GND10
GND6
USB_DReserved3
USB_D+
Reserved4
GND11
Reserved5
LED_WWAN#
Reserved6
LED_WLAN#
Reserved7
LED_WPAN#
Reserved8
1.5V_3
Reserved9
GND12
Reserved10
3.3V_2

D

AC_BAT_SYS

D5301
RB751V-40
1
2

2

2 0Ohm
/IntelBT30

21 PCIE_RXN2_WLAN
21 PCIE_RXP2_WLAN

10V340000001

0Ohm

2

@

1

C5311
10PF/50V

0Ohm

@

WLAN_ON_C

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

4

1

1
2

@

2

C5312
10PF/50V

17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

2

R5325
R5306
R5302
10KOhm
R1.1 IOAC 10/31

R1.1 For IOAC, 10/31

BT Disable Low for Intel
BT_ON
R5304 1

10V340000001
0Ohm

11/02
R1.1 IOAC 10/31

2
4
6
8
10
12
14
16

2

3.3V_1
GND7
1.5V_1
UIM_PWR
UIM_DATA
UIM_CLK
UIM_RESET
UIM_VPP

1

WAKE#
Reserved1
Reserved2
CLKREQ#
GND1
REFCLKREFCLK+
GND2

2

1
3
5
7
9
11
13
15

21 CLK_REQ1_WLAN#

3

2 0Ohm
/CHICONYBT30

R1.1

1

1

21 CLK_PCIE_WLAN#_PCH
21 CLK_PCIE_WLAN_PCH

2

@
R5303

BT Disable Low for CHICONY
BT_ON

25,30,61 BT_ON
D

+3VS_WLAN

J5301

R1.1 For IOAC, 10/31

R5327

+3VO
2 0Ohm

1

2N7002
Q5301

2

R5312 1

C5329
0.1UF/25V

2

3

WLAN_WAKE#

D

30

S 2

G

1

R1.1 For IOAC, Change Wake Name to Wlan_IOAC

/IOAC

/IOAC

1 R5326

11/02

C5308
0.1UF/16V
@

vx_c0603_small

+3VS_mSATA

Place 0.1UF near pin 6,28,48.
Place 10UF near +1.5VS source side.
C

+3VS
+1.5VS

@

2

C5314
33PF/50V

2

+1.5VS

C5320
10UF/6.3V

C5322
0.1UF/16V
@

1

C5321
0.1UF/16V

2

1

R1.1
add NUT for Half card.
R1.1

10/31 change
1

R1.1

1

2
1 0Ohm
vx_r0805_h24_small

2

R5316

1

C

H5303
H5304
CT256CB176D146
CT256CB176D146

2

H5305
CT256CB176D146

C5323
0.1UF/16V
@

vx_c0603_small

10/31 change
J5302

+3VS_mSATA
T5301
T5302
T5303
T5304

1
1
1
1

DAS
Presence Detect

53
54

GND13
GND14

NP_NC2
NP_NC1

MINI_PCI_LATCH_52P
12V44GBSD001

GND

T5308
T5309
T5310
T5311

1
1
1
1

Place 0.1UF near pin 2,24,52,39 41.

Internal Pull High

1

3

0Ohm

/NON_mSATA
4

+3VS

USB_PN0 24

T5307

1

0Ohm

90Ohm/100Mhz
@
L5302

C5315
10UF/6.3V

C5316
0.1UF/16V

C5317
0.1UF/16V

C5318
0.1UF/16V
@

1

RN5302B

2

USB_PN0_C
USB_PP0_C

+3VS_mSATA
2 NB_R0603_32MIL_SMALL

1

T5305
T5306

1

1
1

2

1
+3.3VS_Vaux
SP5303

SMB_CLK_S
SMB_DAT_S

3G_LED#

Place 10UF near +3VS_WLAN source side.
T5312

1

WWAN_ON/OFF#
BUF_PLT_RST#

2

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

1

USIM_PWR
USIM_DATA
USIM_CLK
USIM_RESET

2

Reserved/UIM_C8
GND8
Reserved/UIM_C4
W_DISABLE#
GND3
PERST#
PERn0
+3.3Vaux
PERp0
GND9
GND4
1.5V_2
GND5
SMB_CLK
PETn0
SMB_DATA
PETp0
GND10
GND6
USB_DReserved3
USB_D+
Reserved4
GND11
Reserved5
LED_WWAN#
Reserved6
LED_WLAN#
Reserved7
LED_WPAN#
Reserved8
1.5V_3
Reserved9
GND12
Reserved10
3.3V_2

2
4
6
8
10
12
14
16

1

TXN
TXP

3.3V_1
GND7
1.5V_1
UIM_PWR
UIM_DATA
UIM_CLK
UIM_RESET
UIM_VPP

2

RXN
RXP

17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

WAKE#
Reserved1
Reserved2
CLKREQ#
GND1
REFCLKREFCLK+
GND2

4

21 CLK_PCIE_mSATA#_PCH
21 CLK_PCIE_mSATA_PCH

1
3
5
7
9
11
13
15

3

1PCIE_WAKE#_WLAN_R

1

11/02 T5314

2

R1.1

21 CLK_REQ3_mSATA#

C5319
0.1UF/16V
@

vx_c0603_small
USB_PP0 24

2
/NON_mSATA

RN5302A
56
55

GND

B

B

H=4mm
PCIe & mSATA co-lay

21 PCIE_RXP3_mSATA

R5322 1

2 0Ohm /NON_mSATA

RXP

21 PCIE_RXN3_mSATA

R5323 1

2 0Ohm /NON_mSATA

RXN

21 PCIE_TXP3_mSATA
21 PCIE_TXN3_mSATA
20 SATA_RXN1
20 SATA_RXP1
20 SATA_TXP1
20 SATA_TXN1

C5324

1

2 0.1UF/16V /NON_mSATA

C5325

1

2 0.1UF/16V /NON_mSATA

0.01UF/25V
0.01UF/25V

1
1

0.01UF/25V
0.01UF/25V

TXP
TXN

2 C5328
2 C5313
/mSATA
1 /mSATA
2 C5326
1
2 C5327
/mSATA
/mSATA

need close to J5302 connector

need close PCH (U2001)

A

A

Title : WLAN/ 3G
Engineer:


Size

4

3

2

Rev

MA50

D
Date:
5

Joyoung_Chianhg

Project Name
Monday, February 13, 2012

1

1.3
Sheet

53

of

93

5

4

3

2

1

D

D

C

C

B

B

A

A

Title : USB3.0
Engineer:


Size
B
4

3

2

Rev

MA50

Date: Monday, February 13, 2012
5

Joyoung_Chianhg

Project Name

1.3
Sheet
1

54

of

93

5

4

3

2

1

D

D

C

C

B

B

A

A

Title : Fersco USB 3.0
Engineer:

BG1-CSC-HW R&D Dept.5
Size
A2
Date:
5

4

3

2

Joyoung_Chianhg

Project Name

Rev

MA50
Monday, February 13, 2012
1

0.1
Sheet

55

of

93

5

4

+3VA

+3VA

6,20,26,27,30,31,57,59,60,81,88,93

+3VS

+3VS

17,20,21,22,23,24,25,26,27,28,30,32,33,36,37,44,45,48,50,51,53,57,59,61,80,91,92

+5VSUS
+5VA
+5V
+5VS
AC_BAT_SYS

+5VSUS

51,57,59,91

+5VA

37,60,81,91

+5V

57,59,60,91

+5VS

27,36,37,48,50,51,57,80,87,91

AC_BAT_SYS

3

2

1

45,53,81,87,88

D

D

+3V

+3V

24,45,57,59,61,91

30,59 PWR_LED#

C

C

30,59 PWR_LED_standby#

30,59 CHG_LED_BLUE#
B

B

30,59 CHG_LED_ORANGE#

A

A

Title : LED_Indicator
Engineer:


Size

5

4

3

2

Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
1.3
Sheet
1

56

of

93

5

4

6,9,11,80
7,9,80

+VCCP

3,4,6,7,30,32,82

+0.75VS

+0.75VS

16,17,83

+1.05VS

+1.05VS

26,27,82,87

+1.5VS

+1.5VS

7,26,53,91

+1.8VS

+1.8VS

7,25,26,80,84

+3VS

+3VS

17,20,21,22,23,24,25,26,27,28,30,32,33,36,37,44,45,48,50,51,53,59,61,80,91,92

+5VS

+5VS

27,36,37,48,50,51,80,87,91

+1.5V

+1.5V

5,16,17,18,60,83

+3V

+3V

24,45,59,61,91

+5V

+5V

59,60,91

D

@

+3VA

R5722
330Ohm

+1.8VS

R5704
330Ohm

@

R5705
330Ohm

@

+1.05VS

@

+VCCP

R5706
330Ohm

R5707
330Ohm

@

+5VS
1

+1.5VS

1

+3VS

1

+0.75VS

1

D

R5708
330Ohm

R5713
330Ohm

SUSB_EC#

C

2

2

Q5704B
UM6K1N
5

@

+5VS_DISCHRG
@
4

Q5704A
UM6K1N
2

@

6

3

Q5703B
UM6K1N
5

+VTT_CPU_DISCHRG

1

@

+VTT_PCH_DISCHRG

4

6

Q5703A
UM6K1N
2

+1.8VS_DISCHRG

1

@

2

2

2
3

Q5702B
UM6K1N
5

4

6

@

1

Q5702A
UM6K1N
2

4

2

Q5701B
UM6K1N
5

+1.5VS_DISCHRG

@

Remove

Vcc_Core & VGFX_Core discharge

1

24,30,91,92

Q5701A
UM6K1N
2

+3VS_DISCHRG
6

+0.75VS_DISCHRG
3

R5716
100KOhm

2

1

2

@
C

1

3

+VGFX_CORE

1

+VCCP

6,20,26,27,30,31,59,60,81,88,93

+VCORE

1

+VGFX_CORE

+3VA

2

1

+3VA
+VCORE

3

+5V

+3V

2
3

6

+1.5V_DISCHRG

07V040000035

1

4

Q5707B
UM6K1N
5

1

6

R5712
330Ohm
@

+3V_DISCHRG

Q5707A
UM6K1N
2

4

2

3

+5V_DISCHRG
Q5706B
UM6K1N
5

1

1

2

1
R5702
100KOhm

Q5706A
UM6K1N
2

R5711
330Ohm
2

R5710
330Ohm

+3VA

30,91 SUSC_EC#

+1.5V

10/31 YENPIN
1

R1.1

B

B

1

+5VSUS

R5714
330Ohm
@

1

2

+3VA

VSUS_ON

6

Q5711A
UM6K1N
2

1

30,81,91,93

4

2

Q5711B
UM6K1N
5

3

+5VSUS_DISCHRG

R5703
100KOhm

5

1

1

2

2

6

3

3
Q5709B
UM6K1N

Q5710B
UM6K1N

5

A

+1.05VS_VGA_DISCHRG
@
2

Q5710A
UM6K1N
1

1

+1.5VS_VGA_DISCHRG
@

Q5708B
UM6K1N
/DGPU

1

2

5

+3VS_VGA_DISCHRG

5

R5718
330Ohm
@

Title : DSG_Discharge

6

100KOhm

VGA_DISCHRG_CTL
/DGPU

4

2

Q5709A
UM6K1N

2

3
R5721
1

@

4

2
VGA_DISCHRG_EN

6

+VGA_VCORE_DISCHRG
@

+1.05VS_VGA

R5717
330Ohm
@

4

2

R5720
100KOhm
/DGPU

24 DGPU_PWR_EN

R5709
330Ohm
@
2

1

R5719
330Ohm
@

A

+1.5VS_VGA

1

+VGA_VCORE

1

+3VS_VGA

+3VA

4

Q5708A
UM6K1N
/DGPU

Engineer:


Size

Unmount +VGA_Vcore discharg
3

2

Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
1.3
Sheet
1

57

of

93

5

4

3

2

1

D

D

C

C

B

B

A

A

Title : System Setting
Engineer:


Size
Custom
Date:
5

4

3

2

Joyoung_Chianhg

Project Name

Rev

MA50

Monday, February 13, 2012
1

1.3
Sheet

58

of

93

3

22,30 PM_CLKRUN#
20,30,44 INT_SERIRQ
20,30,44 LPC_FRAME#
20,30,44 LPC_AD3
20,30,44 LPC_AD2
20,30,44 LPC_AD1
20,30,44 LPC_AD0

D

GND
24

CLK_TPM
GND
+3VS
GND
+RTCBAT

C5902 1
10UF/10V

20,60 +RTCBAT
4,24,30,32,33,53,70 BUF_PLT_RST#
21 CLK_REQ_CR#
GND
21 PCIE_TXP1_CR
21 PCIE_TXN1_CR

C

GND
21 CLK_PCIE_CR
21 CLK_PCIE_CR#
GND
21 PCIE_RXP1_CR
21 PCIE_RXN1_CR

Card Reader

GND

2

R1.1

SIDE2

GND
+3V

12V371BSM002
WTOB_CON_30P
30 30
29 29
28 28
27 27
26 26
25 25
24 24
23 23
22 22
21 21
20 20
19 19
18 18
17 17
16 16
15 15
14 14
13 13
12 12
11 11
10 10
9 9
8 8
7 7
6 6
5 5
4 4
3 3
2 2
1 1

2

1

32

4

SIDE5

35

SIDE4

34

11/03

D

C

TP_CLK
TP_DAT
SMB_DAT_S
SMB_CLK_S

33

SIDE3

SIDE1

5

@ C5916 1
@C5916
@C5915
@
C5915 1
@C5914
@
C5914 1
@C5913
@
C5913 1

21000PF/50V
21000PF/50V
21000PF/50V
21000PF/50V
GND

31

J5901
GND

R2.0 12/19
R2.0 12/19

30
30

J5904

GND
PWR_LED#
PWR_LED_standby#
CHG_LED_BLUE#
CHG_LED_ORANGE#

30
PWR_LED#
30 PWR_LED_standby#
30 CHG_LED_BLUE#
30 CHG_LED_ORANGE#

GND
+5VSUS
+5V

R1.1 +3VA
change power plane

R2.0 12/20
A

C5905 1
C5906 1
C5907 1
C5908 1

2
2
2
2

0.01UF/25V PWR_LED#
0.01UF/25V PWR_LED_standby#
0.01UF/25V CHG_LED_BLUE#
0.01UF/25V CHG_LED_ORANGE#

GND

11
1
2
3
4
5
6
7
8
9
10
12

GND
17,28,53 SMB_DAT_S
17,28,53 SMB_CLK_S

SIDE1
1
2
3
4
5
6
7
8
9
10
SIDE2

+3VS
+3VS

R1.1 11/10
1 10KOhm

R5901 2

100KOhm 2

R5915

1

R2.0 12/14
21,30

EXT_SCI#

8
7 SIDE2
6
5
4
3
2 SIDE1
1

B

10

9

GND

A

Title : B to B

R2.0
change for Elan click pad

GND

Engineer:


Size

3

Joyoung_Chianhg

Project Name

Rev

MA50

Date: Monday, February 13, 2012
4

TP_CLK
TP_DAT

Q5901
2N7002

FPC_CON_10P
12V18AWSM001

A
5

4.7KOhm2
4.7KOhm4

FPC_CON_8P
12V18GWSM059

1

PWR_SW#

GND

G

PWR_SW#

1
3

J5906

8
7
6
5
4
3
2
1

TP_CLK
TP_DAT

TP_CLK
TP_DAT

S 2

30

210UF/10V

1

3

B

C5901

GND
+3VS

D

Power BTN and LED

RN5901A
RN5901B

+3VS

R1.1
change for TP

2

1.3
Sheet

59
1

of

93

5

4

3

2

+VCC_RTC

DC Jack WtoB CONN

+3VSUS +3VA

+5VA +5V

+3VA_EC

+1.5V

T6037

T6038

T6039

GND
T6005
T6006
T6007
T6008

1
1
1
1

T6036

1

1

1

T6040

1

C6009
0.1UF/25V

+1.8VO

1

1

1

C6003
1UF/25V
10%

2

D6001
0.51V/0.5A
@

1

1

1

C6001
0.1UF/25V

2

WTOB_CON_4P
12V17GBSM087

C6002
10UF/25V
10% @

+12V

1

+12VS_VGA

L6006 80Ohm/100Mhz
1
2

1
2
3
4

2

SIDE2

1
2
3
4

2

6

SIDE1

1

L6001 80Ohm/100Mhz
1
2

J6002
5

T6031 T6030 T6032 T6033 T6034

1

1
1
1
1
1

D

A/D_DOCK_IN

Depend on the current
of the adaptor.

1

Current setting=6A
T6020
T6001
T6002
T6003
T6004

1

+V_DCJACK

T6035

Battery Connector

28,30,32

+3VA

+3VA

6,20,26,27,30,31,57,59,81,88,93

+5VA

+5VA

37,81,91

+3VSUS

+3VSUS

4,22,24,28,30,81,92

+5VSUS

+5VSUS

51,57,59,91

+12VSUS

+12VSUS

28,51,81,91

+1.5V

5,16,17,18,57,83

+3V

+3V

24,45,57,59,61,91

+5V

+5V

57,59,91

+12V

+12V

91

+0.75VS

+0.75VS

16,17,57,83

+1.05VS

+1.05VS

26,27,57,82,87

+1.5VS

+1.5VS

7,26,53,57,91

+1.8VS

+1.8VS

7,25,26,57,80,84

D

+1.5V

+3VS

+3VS

+5VS

+5VS

27,36,37,48,50,51,57,80,87,91

+12VS

+12VS

28,36,48,91

AC_BAT_SYS
A/D_DOCK_IN
BAT_CON

C

T6029 T6022
T6024
T6023
T6025

45,53,81,87,88

A/D_DOCK_IN

88
C

BAT_CON

BAT_CON

88

+VCCP

+VCCP

3,4,6,7,30,32,57,82

+VCORE

6,9,11,80

1

1

+VCORE

C6026
39PF/50V

+VGFX_CORE
+VTT_PCH_ORG

1

1

1

1115_correct netname

C6027
0.1UF/25V
@

2

1

1

1

1

1

add for RF

T6028

2

T6027

1211 change Battery CON

+VTT_PCH_VCCIO

BAT_CON_C
SMB0_CLK_C
SMB0_DAT_C
TS1#_C

21kOhm/100Mhz
21kOhm/100Mhz
21kOhm/100Mhz

+1.05VM_ORG

Irat=300mA
Irat=300mA
Irat=300mA

+VGFX_CORE

7,9,80

+VTT_PCH_ORG

22,26,27

+VTT_PCH_VCCIO
+1.05VM_ORG

20,26,27

27

SMB0_CLK 30,88
SMB0_DAT 30,88
TS1#
90

D6002

C6031
47PF/50V

C6030
47PF/50V
1

1

C6029
47PF/50V
1

L6002 1
L6003 1
L6004 1

1
C6028
0.1UF/25V

BI
TS1#_C
SMB0_CLK_C
SMB0_DAT_C

AC_BAT_SYS

2
15A/65V
07V100000004

T6026

TS1#_C

1

BI

5

2

2

2

2
2

1
2
3
4
5
6
7
8
9
10
J6001

17,20,21,22,23,24,25,26,27,28,30,32,33,36,37,44,45,48,50,51,53,57,59,61,80,91,92

F6001
1

1
2
3
4
5
6
7
8
9
10

20,22,27

+3VA_EC

GND

GND

12V17GBSM089
WTOB_CON_10P

+VCC_RTC

1

SMB0_CLK_C

3

SMB0_DAT_C

4

+V_VREF_DDR3

+V_VREF_DDR3

16,17,18

DF5A6.8FU
1 R6001 2
1KOhm
3

S 2

D6003

Q6001
2N7002
1

R6002

11/02

SW6001
1

2

3

4

+RTCBAT

1

+3VA

1V/0.2A

2
2

1

1

B

2
3

2
3

ST315D94

2
3

3

4

TP_SWITCH_4P
12V09SBSM031
1

4

GND

H6001

2 100KOhm

G
R1.1

4

1

1
C6032
0.1UF/25V

D

B

R1.1 11/09

@
D6004

For Battery Reset
2

AZ2025-01H.R7G
07V220000006

R1.1 Exchange GND_LED to GND
R1.1
modify battery reset CKT

close to H6001
A

A

Title : DC_DC/BAT CONN
Engineer:


Size

5

4

3

2

Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
1.3
Sheet
1

60

of

93

4

2
RN6101A

3

3

0Ohm
@

2

B/T MODULE

1
/BT_SINGLE

/BT_SINGLE
J6101

LX6101
90Ohm/100Mhz
USB_PP4
USB_PN4

RN6101B4

1

2

D

24
24

0Ohm

3
/BT_SINGLE

+3VS_BT

1

1

2

G

R6102
10KOhm
/BT_SINGLE

1

PIN 5: LED Output

GND

D

C

8

3

2 S

2N7002
R1.1 IOAC 10/31

1 SIDE1
2
3
4
5
6 SIDE2

D

7

WTOB_CON_6P
T6101

25,30,53 BT_ON

1
2
3
4
5
6

GND

USB_PP4_C
USB_PN4_C

+3VS_BT
+3VS_BT

1

4

5

/BT_SINGLE
Q6101

C

R1.0
prevent leakage curent.

+3VS
R2.1 01/17

+3V

/BT_SINGLE
R6109
1
2
0Ohm
R6110
@
1
2
0Ohm

@
C6101

1

2

GND

0.1UF/16V

B

B

A

A

Title : Fersco USB 3.0
Engineer:

Pegatron Corp.
Size

Rev

MA50

A

Date: Monday, February 13, 2012
5

4

3

Joyoung_Chianhg

Project Name

2

1.00
Sheet

61
1

of

93

5

4

3

2

1

D

D

C

C

B

B

A

A

Title : System Setting
Engineer:


Size
Custom
Date:
5

4

3

2

Joyoung_Chianhg

Project Name

Rev

MA50

Monday, February 13, 2012
1

1.3
Sheet

62

of

93

5

4

3

2

1

D

D

C

C

B

B

A

A

Title : B to B
Engineer:


Size

Project Name

Date: Monday, February 13, 2012
4

3

Rev

MA50

A
5

Joyoung_Chianhg

2

1.3
Sheet

63
1

of

93

5

4

3

2

1

D

D

C

C

B

B

A

A

Title : B to B
Engineer:


Size

5

4

3

2

Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
1.3
Sheet
1

64

of

93

5

4

3

CPU Bracket Hole
D

2

1

place between J5204 /J5205

H6501
C217D126

D

+5VO

H6502
C217D126

CE6501
100UF/6.3V
@

H6503
C217D126

GND

H6504
C217D126

ME B Type
VGA Bracket Hole

H6507
1
HOLE_NPTH

H6505
CT217B136ID106
/DGPU

H6508
1
CST315SB315D94

H6506
CT217B136ID106
/DGPU
R2.0 12/15
R1.1 11/08

H6515
1
S315D94

H6514
1
RT315x315CB315D94

GND

GND

GND
H6509
1
RT315x315CB315D94
GND

C

C

H6510
1
RT315x315CB315D94

R2.0 12/19
H6516
1
RT315x315CB315D94

GND
GND

H6511
1
RT315x315CB315D94
GND

H6512
1
RT315x346CB217D94
GND

H6513
1
O138x110D138x110N

H6517
1
RT315x315CB315D94

GND

This screw hole should be Upside down(TOP and BOTTOM).
B

B

A

A

Title : ME_CONN,Skew Hole
Engineer:


Size

5

4

3

2

Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
1.3
Sheet
1

65

of

93

5

4

3

2

1

Power Button
LEDCON1
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
D

PWR_SW#_LED
GND_LED

PWR_LED#_LED
PWR_LED_standby#_LED
CHG_LED_BLUE#_LED
CHG_LED_ORANGE#_LED

GND_LED
+5VSUS_LED
+5V_LED
+3VA_LED
D

SMD28x126

SW6601
PWR_SW#_LED

1
3

1

2

3

4

2
4

TP_SWITCH_4P
12V09SBSM031
1

R1.1 exchange D6601 to C6605 for PWR_SW# noise
C6605

2

0.1UF/10V
GND_LED

GND_LED

Charger LED

+5VSUS_LED

1
2

2 0Ohm

+3VA_LED

2
+

CHG_LED_BLUE#_R_LED
CHG_LED_ORANGE#_R_LED

Charger LED ORANGE

1

R6606
1.5KOhm

1

1

R6603
1KOhm

CHG_LED_BLUE#_R_LED

R6604
1KOhm

1

2

R6607 1

2

CHG_LED_BLUE#_LED

2

2

4

GND_LED

GND_LED
PWR_BLUE_LED#_LED

R1.1
change power plane

R6609
10KOhm
@

PWR_BLUE_LED#_LED
PWR_AMBER_LED#_LED

@

@

3

B

4

Q6603B
UM6K1N
5

GND_LED
GND_LED
4

Q6604B
UM6K1N
5

6

6

@

3

2

Q6603A
UM6K1N
2

1

1

2

need check after SR

1

@

3

6

GND_LED

R6610
10KOhm
@

Q6604A
UM6K1N
2

C6602
47PF/50V
1AV200000015

GND_LED

R6605
1KOhm

B

@

1

GND_LED
2 0Ohm

+5V_LED

Dual Color

4

@

SR-65

3

C6601
47PF/50V
1AV200000015
3

@

GND_LED
R6608 1

PWR_LED#_LED

@

2

Dual Color

4

3

6

Q6601B
UM6K1N
5

1

Q6601A
UM6K1N
2

LED02
BLUE&ORANGE
07V130000024

2
@

Q6602B
UM6K1N
5

1

2

+

Orange

Q6602A
UM6K1N
2

1

2

LED01
BLUE&ORANGE
07V130000024

+
Blue

1

1
R6601
10KOhm
@

SR-66

C

1

R6602
10KOhm
@

Power LED

+3VA_LED

Orange

need check after SR
+5V_LED

+5VSUS_LED

Charger LED BLUE

4

+5V_LED

1

POWER LED

+
Blue

C

GND_LED
PWR_LED_standby#_LED

GND_LED
R6611 1

2 0Ohm

PWR_AMBER_LED#_LED

CHG_LED_ORANGE#_LED

R6612 1

2 0Ohm

CHG_LED_ORANGE#_R_LED

A

A

Title : TP_M
Engineer: Joyoung_Chianhg

BG1-HW RD Div.2-NB RD Dept.5
Size
C
Date:
5

4

3

2

Project Name

Rev

MA50
Monday, February 13, 2012

1.0
Sheet

1

66

of

93

5

4

3

+3VS_MB

2

1

+3VS_CR
SD_CLK

R6703

2 0Ohm

SD_CLK_R

1

R6706

R2.0 move back

GND_CR

C6720
10PF/50V
@

C6704
0.1UF/10V
@

H6701
1
C315D110

GND_CR

1

1

C6701
1UF/10V

2

trace width 60mils

2

0Ohm
10V340000001

2

trace width 60mils

2
1

1

1AV200000001

GND_CR

D

GND_CR H6703
1
HOLE_NPTH

20110909 Joyoung
EMI request

D

SDCLK trace length
shorter,surround with GND.

From System's PCIE interface

H6704
1
O110X138DO110X138N

T6706
CR_LED# 1

1
J6702
BATT_HOLDER_2P

3
4
2

12V20GBSM000

trace width 40mils

GND_CR

2

C6736
10UF/10V

C6735
0.1UF/16V
1AV200000042

1
2
3
4
5
6
7
8
9
10
11
12

+3V_CARD

SD_CLK_R

SD_WP
SD_D0
SD_D1

48
47
46
45
44
43
42
41
40
39
38
37

HSIP
HSIN
REFCLKP
REFCLKN
AV12
HSOP
HSON
GND1
DV12
Card1_3V3
3V3_IN1
Card2_3V3

RTS5209-GR

GND_CR GND_CR

RREF
3V3_IN2
CLK_REQ#
PERST#
EEDO
EECS
EESK
GPIO/EEDI
MS_INS#
SD_CD#
SP15
SP14

31

U6701

PCIE_TXP0_CR
PCIE_TXN0_CR
CLK_PCIE_CR_P
CLK_PCIE_CR_N
1AV200000042
C6723
C6722
0.1UF/16V GND_CR 4.7UF/6.3V
AV12
1
2
PCIE_RXP0_CR 1
HSOP_R
1AV300000023
2
PCIE_RXN0_CR 1
HSON_R
2
C6719
0.1UF/16V GND_CR
DV12
1AV200000042
1
2
C6717
0.1UF/16V
+3V_CARD
+3VS_CR
1AV200000042

T6702
T6703
T6704

xD_CD#
DV33_18
GND2
SP1
SP2
SP3
SP4
SD_D1
SD_D0
SD_CLK
SD_CMD
SD_D3

RTC

GND_CR

2

6.2KOhm
10V220000088

SP13
SP12
SP11
SP10
SP9
SP8
SP7
SP6
SP5
DV12_S
GND3
SD_D2

36
35
34
33
32
31
30
29
28
27
26
25

C

C6726
DV12_S
SD_D2

1

1
C6725

GND_CR

2 4.7UF/6.3V
1AV300000023
2
0.1UF/16V
1AV200000042

GND_CR

+3V_CARD

1
C6702
10UF/10V
1AV500000008
2

DV12

SD_WP
SD_CD#

SD_SOCKET_9P
12V211BSD000

SD_D1
SD_D0
SD_CLK
SD_CMD
SD_D3

1 @
2 0Ohm
vx_r0603_h28_small

DV33_18

R6731

14
13
12
11
10

P_GND2
P_GND1
12
11
10

GND_CR

Part number:020J-007D000

AV12

9
1
2
3
4
5
6
7
8

C4008 C4002 SD CARD CAP

1

1 R6729

9
1
2
3
4
5
6
7
8

2

GND_CR

J6703
SD_D2
SD_D3
SD_CMD
SD_CD#

GND_CR

+3VS_CR
CLKREQ0_CR#
BUF_PLT_RST#_CR
1
1
1

1AV200000042
C6724 0.1UF/16V
1
2

13
14
15
16
17
18
19
20
21
22
23
24

SIDE3

GND_CR

1

33
C

SIDE4

H6702
1
C315D110

1

34

SIDE5

SIDE1

35

J6701
WTOB_CON_30P
12V371BSM002
30
GND_CR
30
29
+3V_TPM
29
28
28
PM_CLKRUN#_TPM
27
27
LPCSERIRQ_TPM
26
26
R2.0 12/13
LPC_FRAME#_TPM
25
25
LPC_AD3_TPM
/TPM 1
RN6702A
24
0Ohm 2
24
/TPM 3
RN6702B
LPC_AD2_TPM
23
0Ohm 4
23
LPC_AD1_TPM
/TPM 5
RN6702C
22
6
0Ohm
22
/TPM 7
RN6702D
LPC_AD0_TPM
21
0Ohm 8
21
20
GND_CR
20
LPCCLK_TPM
19
19
10PF/50V 1
18
2 C6711
GND_CR
GND_CR
18
@
17
17
16
+3VS_TPM
16
15
15
+3VS_MB
14
+3V_CARD_CR
14
13
13
BUF_PLT_RST#_CR
12
12
CLKREQ0_CR#
11
11
10
GND_CR
10
PCIE_TXP0_CR
9
9
PCIE_TXN0_CR
8
8
7
GND_CR
7
CLK_PCIE_CR_P
6
6
CLK_PCIE_CR_N
5
5
4
GND_CR
4
PCIE_RXP0_CR
3
3
PCIE_RXN0_CR
2
+RTCBAT_CR
2
1
GND_CR
1

2

SIDE2

32

R1.1 change to 30P

C6703
0.1UF/16V
1AV200000042

@
R6707
4.7KOhm
@

B

/TPM
J6705
16
15
14
13
12
11
10
9

1

C6713
@
0.1UF/16V

1
2
3
4
5
6
7
8

1
2
3
4
5
6
7
8

LPCSERIRQ_TPM

B

GND_CR

LPC_AD0_TPM
LPC_AD1_TPM
LPC_FRAME#_TPM
LPCCLK_TPM
LPC_AD2_TPM
LPC_AD3_TPM

BTOB_CON_16P
12V162BSM003
GND_CR

Pin Name

Description

SP1

SD_D7/XD_RDY

SP2

SD_D6/XD_RE#

SP3

SD_D5/XD_CE#

SP4

SD_D4/XD_WE#

SP5

MS_BS/XD_CLE

SP6

MS_D5/XD_ALE

SP7

MS_D1/XD_WP#

SP8

MS_D4/XD_D0

SP9

MS_D0/XD_D1

SP10

MS_D2/XD_D2

SP11

MS_D6/XD_D3

SP12

MS_D3/XD_D4

SP13

MS_D7/XD_D5

SP14

MS_CLK/XD_D6

SP15

SD_WP/XD_D7

2

1

C6714
@
1UF/6.3V

2

1

C6712
@
0.1UF/16V

2

2

C6715
@
1UF/6.3V

1

BUF_PLT_RST#_CR
PM_CLKRUN#_TPM

16
15
14
13
12
11
10
9

GND_CR

1AV200000042

2
C6730
2

C6728

+3VS_TPM

0.1UF/16V

+3VS_TPM

1AV300000023 1
4.7UF/6.3V
1

Close to connector
+3V_TPM

GND_CR

Remove Serial Flash
A

A

Reserve for BIOS boot function

Title :
Engineer:

When EECS switch to be D3-Delink sideband signal, Serial Flash function is disabled.

Size

Project Name

RTS5209

JAY TSAI
Rev

MA50

C
Date:
5

4

3

2

1.0
Sheet

Monday, February 13, 2012
1

67

of

93

5

4

3

2

1

D

D

C

C

B

B

A

A

Title : USB_USB Port
Engineer:


Size
B
4

3

2

Rev

MA50

Date: Monday, February 13, 2012
5

Joyoung_Chianhg

Project Name

1.3
Sheet
1

69

of

93

5

4

3

2

1

Frank
20110513 Change N13P GPU.
+3VS_VGA

U7002
1 A
VCC

24 DGPU_HOLD_RST#
4,24,30,32,33,53,59

T7022
1

5

2 B

BUF_PLT_RST#

PEX_RST

3 GND

4
Y
SN74LVC1G08DCKR
/DGPU
2
1 0Ohm
@

D

2

R7020

D

R7009
100KOhm
/DGPU

/DGPU
PCIENB_RXP3
PCIENB_RXN3

C7020
C7022

PCIENB_RXP4
PCIENB_RXN4

C7023
C7028

PCIEG_RXP3
PCIEG_RXN3

0.22UF/10V PEX_TX3+ AL16
0.22UF/10V PEX_TX3- AK16
/DGPU

AN15
AM15

/DGPU

PCIEG_RXP4
PCIEG_RXN4

0.22UF/10V PEX_TX4+ AK17
0.22UF/10V PEX_TX4- AJ17
/DGPU

AN17
AM17

/DGPU
PCIENB_RXP5
PCIENB_RXN5
3 PCIENB_RXP[0..15]
3 PCIENB_RXN[0..15]

PEX=> From NB
EXP: VGA Card to NB

PCIEG_RXP5
PCIEG_RXN5

0.22UF/10V PEX_TX5+ AH17
0.22UF/10V PEX_TX5- AG17
/DGPU

AP17
AP18

/DGPU
PCIENB_RXP6
PCIENB_RXN6

0.22UF/10V PEX_TX6+ AK18
0.22UF/10V PEX_TX6- AJ18

C7026
C7025

PCIEG_RXP6
PCIEG_RXN6

/DGPU

AN18
AM18

/DGPU
PCIENB_RXP7
PCIENB_RXN7

3 PCIEG_RXP[0..15]
3 PCIEG_RXN[0..15]

C7036
C7030

C7029
C7027

PCIEG_RXP7
PCIEG_RXN7

0.22UF/10V PEX_TX7+ AL19
0.22UF/10V PEX_TX7- AK19
/DGPU

AN20
AM20

/DGPU
PCIENB_RXP8
PCIENB_RXN8
PCIEG_RXP8
PCIEG_RXN8

B

0.22UF/10V PEX_TX8+ AK20
0.22UF/10V PEX_TX8- AJ20

C7034
C7033
/DGPU

AP20
AP21

/DGPU
PCIENB_RXP9
PCIENB_RXN9

C7046
C7035

PCIENB_RXP10
PCIENB_RXN10

C7038
C7037

PCIEG_RXP9
PCIEG_RXN9

0.22UF/10V PEX_TX9+ AH20
0.22UF/10V PEX_TX9- AG20
/DGPU

AN21
AM21

/DGPU

PCIEG_RXP10
PCIEG_RXN10

0.22UF/10V PEX_TX10+ AK21
0.22UF/10V PEX_TX10- AJ21
/DGPU

AN23
AM23

/DGPU
PCIENB_RXP11
PCIENB_RXN11

0.22UF/10V PEX_TX11+ AL22
0.22UF/10V PEX_TX11- AK22

C7040
C7039

PCIEG_RXP11
PCIEG_RXN11

/DGPU

AP23
AP24

/DGPU
PCIENB_RXP12
PCIENB_RXN12

C7042
C7041

PCIENB_RXP13
PCIENB_RXN13

C7047
C7043

PCIENB_RXP14
PCIENB_RXN14

C7049
C7048

PCIEG_RXP12
PCIEG_RXN12

0.22UF/10V PEX_TX12+ AK23
0.22UF/10V PEX_TX12- AJ23
/DGPU

AN24
AM24

/DGPU

/DGPU

AN26
AM26

/DGPU

PCIEG_RXP14
PCIEG_RXN14

0.22UF/10V PEX_TX14+ AK24
0.22UF/10V PEX_TX14- AJ24
/DGPU

AP26
AP27

/DGPU
PCIENB_RXP15
PCIENB_RXN15

A

PCIEG_RXP15
PCIEG_RXN15

C7051
C7050

0.22UF/10V PEX_TX15+ AL25
0.22UF/10V PEX_TX15- AK25
/DGPU

PEX_RX1
PEX_RX1_N
PEX_TX2
PEX_TX2_N
PEX_RX2
PEX_RX2_N

AN27
AM27

1

C7005
22UF/6.3V
/DGPU

2

1

1
2

2

2

1

2
1

1
2

2

1
2

1

0.1UF/16V
/DGPU

C7008
1UF/6.3V
/DGPU

C7006
1UF/6.3V
/DGPU

1

C7053

C7007
4.7UF/6.3V
/DGPU

2

AG13
AG15
AG16
AG18
AG25
AH15
AH18
AH26
AH27
AJ27
AK27
AL27
AM28
AN28

C7010
22UF/6.3V
/DGPU

C7011
10UF/6.3V
/DGPU

20110909 Joyoung
EMI Request

C

PEX_TX3
PEX_TX3_N
PEX_RX3
PEX_RX3_N

0928 Alfie

PEX_TX4
PEX_TX4_N

PEX_PLL_HVDD

N13P-GL

PEX_RX4
PEX_RX4_N

N13P-GS
PEX_PLL_HVDD
(3.3V)

NC

PEX_TX5
PEX_TX5_N
PEX_PLL_HVDD
PEX_RX5
PEX_RX5_N

PEX_SVDD_3V3

AH12

R7021

+3VS_VGA

1 0Ohm

2
/GS

C7016

AG12

PEX_TX6
PEX_TX6_N

0.1UF/16V
/DGPU

C7017
4.7UF/6.3V
/DGPU

C7015
4.7UF/6.3V
/DGPU

PEX_RX6
PEX_RX6_N
PEX_TX7
PEX_TX7_N
PEX_RX7
PEX_RX7N
PEX_TX8
PEX_TX8_N
VDD_SENSE
PEX_RX8
PEX_RX8_N
GND_SENSE

L4

NVDD_SENSE

L5

NVDD_GND_SENSE

87
B

87

PEX_TX9
PEX_TX9_N
PEX_RX9
PEX_RX9_N
PEX_TX10
PEX_TX10_N
NC12

P8

PEX_RX10
PEX_RX10_N

0928 Alfie

PEX_TX11
PEX_TX11_N
PEX_TSTCLK_OUT

PEX_RX11
PEX_RX11_N
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT_N

PEX_TX12
PEX_TX12_N

AJ26
AK26

R7007

2 200Ohm
@

1

PEX_TSTCLK_OUT#

PEX_RX12
PEX_RX12_N

PLACE NEAR

PEX_PLLVDD

N13P-GL

N13P-GS

L7001

R7022

PLACE NEAR BGA

+1.05VS_VGA

PEX_TX13
PEX_TX13_N

PEX_PLLVDD

AG26

PEX_RX13
PEX_RX13_N
PEX_TX14
PEX_TX14_N

TESTMODE

AK11

L7001
2 /GL

1
1

PCIEG_RXP13
PCIEG_RXN13

0.22UF/10V PEX_TX13+ AH23
0.22UF/10V PEX_TX13- AG23

10UF/6.3V
/DGPU

R7004

C7061
0.1UF/16V
/DGPU

C7044
1UF/6.3V
/DGPU

2

AP14
AP15

C7004

1

0.22UF/10V PEX_TX2+ AK15
0.22UF/10V PEX_TX2- AJ15
/DGPU

PEX_IOVDDQ1
PEX_IOVDDQ2
PEX_IOVDDQ3
PEX_IOVDDQ4
PEX_IOVDDQ5
PEX_IOVDDQ6
PEX_IOVDDQ7
PEX_IOVDDQ8
PEX_IOVDDQ9
PEX_IOVDDQ10
PEX_IOVDDQ11
PEX_IOVDDQ12
PEX_IOVDDQ13
PEX_IOVDDQ14

PEX_TX1
PEX_TX1_N

1

C7024
C7031

PEX_RX0
PEX_RX0_N

2

PCIENB_RXP2
PCIENB_RXN2
PCIEG_RXP2
PCIEG_RXN2

10UF/6.3V
/DGPU

2

/DGPU

C7009

PEX_TX0
PEX_TX0_N

2

AN14
AM14

4.7UF/6.3V
/DGPU

1

/DGPU

C7003

2

PCIEG_RXP1
PCIEG_RXN1

1UF/6.3V
/DGPU

2

0.22UF/10V PEX_TX1+ AH14
0.22UF/10V PEX_TX1- AG14

C7018
C7019

C7002

1

/DGPU
PCIENB_RXP1
PCIENB_RXN1

1UF/6.3V
/DGPU

1

AN12
AM12

/DGPU

C7001

2

0.22UF/10V PEX_TX0+ AK14
0.22UF/10V PEX_TX0- AJ14
/DGPU

0.1UF/16V

1

C7032
C7021

PEX_REFCLK
PEX_REFCLK_N

C7052

2

PCIENB_RXP0
PCIENB_RXN0

PCIEG_RXP0
PCIEG_RXN0

PEX_CLKREQ_N

AG19
AG21
AG22
AG24
AH21
AH25

1

/DGPU

PEX_IOVDD1
PEX_IOVDD2
PEX_IOVDD3
PEX_IOVDD4
PEX_IOVDD5
PEX_IOVDD6

PEX_RST_N

2

AL13
AK13

PEX_WAKE_N

1

1

AJ12
AK12

PLACE BETWEEN BGA AND POWER SUPPLY

1

2
1
G

AJ11

CLKREQ_PEG#_R

21 CLK_PCIE_PEG_PCH
Q7001
21 CLK_PCIE_PEG#_PCH
2N7002
/DGPU

C

+1.05VS_VGA

1/19 PCI_EXPRESS
PLACE UNDER BGA

R7008
10KOhm
/DGPU

S 2

3
D

21 CLKREQ_PEG#

U7001A

1

+3VS_VGA

2

+3VS_VGA

C7045

30Ohm/100Mhz

4.7UF/6.3V
/DGPU

2
R7022

2 10KOhm
/DGPU

1

1
/GS

0Ohm

PEX_RX14
PEX_RX14_N
A

PEX_TX15
PEX_TX15_N

R7003

PEX_RX15
PEX_RX15_N

PEX_TERMP

AP29 PEX_TERMP

1
2.49KOhm

2
1%
/DGPU

N13P-GS
02V0A0000011
/DGPU

Title : PEG
Engineer:

PEGATRON COMPUTER INC
Size
C
Date:
5

4

3

2

Project Name

Joyoung_Chianhg

MA50

Rev
1.3



P/N
Monday, February 13, 2012

Sheet
1

70

of

93

5

3

77
77
77
77
77

FBAD[0..63]
FBA_CMD[0..31]
FBADQM[0..7]
FBADQS_WP[0..7]
FBADQS_RN[0..7]

N13P-GS

3/19 FBB

B

FBADQS_WP0
FBADQS_WP1
FBADQS_WP2
FBADQS_WP3
FBADQS_WP4
FBADQS_WP5
FBADQS_WP6
FBADQS_WP7

M31
G31
E33
M33
AE31
AK30
AN33
AF33

FBADQS_RN0
FBADQS_RN1
FBADQS_RN2
FBADQS_RN3
FBADQS_RN4
FBADQS_RN5
FBADQS_RN6
FBADQS_RN7

M30
H30
E34
M34
AF30
AK31
AM34
AF32

FB_DLL_AVDD

FBCD0
FBCD1
FBCD2
FBCD3
FBCD4
FBCD5
FBCD6
FBCD7
FBCD8
FBCD9
FBCD10
FBCD11
FBCD12
FBCD13
FBCD14
FBCD15
FBCD16
FBCD17
FBCD18
FBCD19
FBCD20
FBCD21
FBCD22
FBCD23
FBCD24
FBCD25
FBCD26
FBCD27
FBCD28
FBCD29
FBCD30
FBCD31
FBCD32
FBCD33
FBCD34
FBCD35
FBCD36
FBCD37
FBCD38
FBCD39
FBCD40
FBCD41
FBCD42
FBCD43
FBCD44
FBCD45
FBCD46
FBCD47
FBCD48
FBCD49
FBCD50
FBCD51
FBCD52
FBCD53
FBCD54
FBCD55
FBCD56
FBCD57
FBCD58
FBCD59
FBCD60
FBCD61
FBCD62
FBCD63

G9
E9
G8
F9
F11
G11
F12
G12
G6
F5
E6
F6
F4
G4
E2
F3
C2
D4
D3
C1
B3
C4
B5
C5
A11
C11
D11
B11
D8
A8
C8
B8
F24
G23
E24
G24
D21
E21
G21
F21
G27
D27
G26
E27
E29
F29
E30
D30
A32
C31
C32
B32
D29
A29
C29
B29
B21
C23
A21
C21
B24
C24
B26
C26

2
R7118

/GS

1+FB_PLLAVDD
0Ohm

FBCDQM0
FBCDQM1
FBCDQM2
FBCDQM3
FBCDQM4
FBCDQM5
FBCDQM6
FBCDQM7

E11
E3
A3
C9
F23
F27
C30
A24

FBCDQS_WP0
FBCDQS_WP1
FBCDQS_WP2
FBCDQS_WP3
FBCDQS_WP4
FBCDQS_WP5
FBCDQS_WP6
FBCDQS_WP7

D10
D5
C3
B9
E23
E28
B30
A23

FBCDQS_RN0
FBCDQS_RN1
FBCDQS_RN2
FBCDQS_RN3
FBCDQS_RN4
FBCDQS_RN5
FBCDQS_RN6
FBCDQS_RN7

D9
E4
B2
A9
D22
D28
A30
B23

C7115
0.1UF/10V
10%
/DGPU

FB_DLL_AVDD
N13P-GS
FB_DLL_AVDD
(1.05V)

NC

FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
FBA_CMD31

FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7

H26

K27

N13P-GL

FBA_CMD_RFU0
FBA_CMD_RFU1

FBA_DEBUG0
FBA_DEBUG1

FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7

FBA_CLK0
FBA_CLK0_N
FBA_CLK1
FBA_CLK1_N

FBA_DQS_RN0
FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7

FBA_WCK01
FBA_WCK01_N
FBA_WCK23
FBA_WCK23_N
FBA_WCK45
FBA_WCK45_N
FBA_WCK67
FBA_WCK67_N

T7104
FB_VREF

1 10KOhm
/GS

FBA_WCKB01
FBA_WCKB01_N
FBA_WCKB23
FBA_WCKB23_N
FBA_WCKB45
FBA_WCKB45_N
FBA_WCKB67
FBA_WCKB67_N
1

R7120 2

E1

1

P30
F31
F34
M32
AD31
AL29
AM32
AF34

FB_CLAMP

2

FBADQM0
FBADQM1
FBADQM2
FBADQM3
FBADQM4
FBADQM5
FBADQM6
FBADQM7

C

FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D8
FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63

PD 10K

FB_VREF

FBA_PLL_AVDD

FBA_CMD0

U30
T31
U29
R34
R33
U32
U33
U28
V28
V29
V30
U34
U31
V34
V33
Y32
AA31
AA29
AA28
AC34
AC33
AA32
AA33
Y28
Y29
W31
Y30
AA34
Y31
Y34
Y33
V31

Joyoung R1.0
remove TP

FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16

Joyoung R1.0
remove TP

FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30

Joyoung R1.0
remove TP

R32
AC32

FBA_DEBUG0
FBA_DEBUG1

R28
AC28

1
1

+1.5VS_VGA
/DGPU
/DGPU
R7101 2 60.4Ohm 1%
R7102 2 60.4Ohm 1%

R30
R31
AB31
AC31

FBA_CLK0
FBA_CLK0#
FBA_CLK1
FBA_CLK1#

K31
L30
H34
J34
AG30
AG31
AJ34
AK34

FBB_DQM0
FBB_DQM1
FBB_DQM2
FBB_DQM3
FBB_DQM4
FBB_DQM5
FBB_DQM6
FBB_DQM7

FBB_CMD_RFU0
FBB_CMD_RFU1

FBB_DEBUG0
FBB_DEBUG1

D13
E14
F14
A12
B12
C14
B14
G15
F15
E15
D15
A14
D14
A15
B15
C17
D18
E18
F18
A20
B20
C18
B18
G18
G17
F17
D16
A18
D17
A17
B17
E17

C7119
22UF/6.3V
/DGPU

/DGPU

XVDD_17
XVDD_18
XVDD_19
XVDD_20
XVDD_21
XVDD_22

FBC_CMD0

U1
U2
U3
U4
U5
U6
U7
U8
V1
V2
V3
V4
V5
V6
V7
V8
W2
W3
W4
W5
W7
W8

Joyoung R1.0
remove TP

FBC_CMD2
FBC_CMD3
FBC_CMD4
FBC_CMD5
FBC_CMD6
FBC_CMD7
FBC_CMD8
FBC_CMD9
FBC_CMD10
FBC_CMD11
FBC_CMD12
FBC_CMD13
FBC_CMD14
FBC_CMD15
FBC_CMD16

XVDD_23
XVDD_24
XVDD_25
XVDD_26
XVDD_27
XVDD_28
XVDD_29
XVDD_30
XVDD_31
XVDD_32
XVDD_33
XVDD_34
XVDD_35
XVDD_36
XVDD_37
XVDD_38

Joyoung R1.0
remove TP

FBC_CMD18
FBC_CMD19
FBC_CMD20
FBC_CMD21
FBC_CMD22
FBC_CMD23
FBC_CMD24
FBC_CMD25
FBC_CMD26
FBC_CMD27
FBC_CMD28
FBC_CMD29
FBC_CMD30

Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8

C

AA1
AA2
AA3
AA4
AA5
AA6
AA7
AA8

N13P-GS
02V0A0000011
/DGPU

Joyoung R1.0
remove TP

C12
C20

G14
G20

/DGPU
/DGPU
1 R7103
1 R7104

FBC_DEBUG

+1.5VS_VGA
2 60.4Ohm 1%
2 60.4Ohm 1%
B

FBB_DQS_WP0
FBB_DQS_WP1
FBB_DQS_WP2
FBB_DQS_WP3
FBB_DQS_WP4
FBB_DQS_WP5
FBB_DQS_WP6
FBB_DQS_WP7

FBB_CLK0
FBB_CLK0_N
FBB_CLK1
FBB_CLK1_N

FBB_DQS_RN0
FBB_DQS_RN1
FBB_DQS_RN2
FBB_DQS_RN3
FBB_DQS_RN4
FBB_DQS_RN5
FBB_DQS_RN6
FBB_DQS_RN7

FBB_WCK01
FBB_WCK01_N
FBB_WCK23
FBB_WCK23_N
FBB_WCK45
FBB_WCK45_N
FBB_WCK67
FBB_WCK67_N

D12
E12
E20
F20

FBC_CLK0
FBC_CLK0#
FBC_CLK1
FBC_CLK1#

F8
E8
A5
A6
D24
D25
B27
C27

FBB_PLL_AVDD

D6
D7
C6
B6
F26
E26
A26
A27
H17

2
R7119

/GS

N13P-GL

N13P-GS

NC

FBB_PLL_AVDD
(1.05V)

1+FB_PLLAVDD
0Ohm

C7120
0.1UF/10V
10%
/GS

/DGPU

FBA_ODT

FBC_ODT

FBA_CMD2 R7108
FBA_CMD18 R7109

2
2

/DGPU

1 10KOhm
1 10KOhm

FBC_CMD2 R7114
FBC_CMD18 R7113

2
2

/DGPU

A

1 10KOhm
1 10KOhm

/DGPU

/DGPU

/DGPU

FBA_RST#

1

2

30Ohm/100Mhz
vx_l0603_h37_small

2

1

C7112
1UF/6.3V
10%

2

1

FBB_CMD0
FBB_CMD1
FBB_CMD2
FBB_CMD3
FBB_CMD4
FBB_CMD5
FBB_CMD6
FBB_CMD7
FBB_CMD8
FBB_CMD9
FBB_CMD10
FBB_CMD11
FBB_CMD12
FBB_CMD13
FBB_CMD14
FBB_CMD15
FBB_CMD16
FBB_CMD17
FBB_CMD18
FBB_CMD19
FBB_CMD20
FBB_CMD21
FBB_CMD22
FBB_CMD23
FBB_CMD24
FBB_CMD25
FBB_CMD26
FBB_CMD27
FBB_CMD28
FBB_CMD29
FBB_CMD30
FBB_CMD31

L7101
1

2

1
2

XVDD_9
XVDD_10
XVDD_11
XVDD_12
XVDD_13
XVDD_14
XVDD_15
XVDD_16

FBB_PLL_AVDD

+1.05VS_VGA

+FB_PLLAVDD

/DGPU

XVDD_1
XVDD_2
XVDD_3
XVDD_4
XVDD_5
XVDD_6
XVDD_7
XVDD_8

N13P-GS
02V0A0000011

1.05V+-3% 100 mA

Place Under GPU

CONFIGURABLE
POWER
CHANNELS

U27 +FB_PLLAVDD

A

C7109
0.1UF/10V
10%

10/19 XVDD

FBB_WCKB01
FBB_WCKB01_N
FBB_WCKB23
FBB_WCKB23_N
FBB_WCKB45
FBB_WCKB45_N
FBB_WCKB67
FBB_WCKB67_N

Frank
20110613 Vender suggest C7119 change 22UF.

/DGPU

D

U7001H

J30
J31
J32
J33
AH31
AJ31
AJ32
AJ33

N13P-GS
02V0A0000011

/DGPU

FBB_D0
FBB_D1
FBB_D2
FBB_D3
FBB_D4
FBB_D5
FBB_D6
FBB_D7
FBB_D8
FBB_D9
FBB_D10
FBB_D11
FBB_D12
FBB_D13
FBB_D14
FBB_D15
FBB_D16
FBB_D17
FBB_D18
FBB_D19
FBB_D20
FBB_D21
FBB_D22
FBB_D23
FBB_D24
FBB_D25
FBB_D26
FBB_D27
FBB_D28
FBB_D29
FBB_D30
FBB_D31
FBB_D32
FBB_D33
FBB_D34
FBB_D35
FBB_D36
FBB_D37
FBB_D38
FBB_D39
FBB_D40
FBB_D41
FBB_D42
FBB_D43
FBB_D44
FBB_D45
FBB_D46
FBB_D47
FBB_D48
FBB_D49
FBB_D50
FBB_D51
FBB_D52
FBB_D53
FBB_D54
FBB_D55
FBB_D56
FBB_D57
FBB_D58
FBB_D59
FBB_D60
FBB_D61
FBB_D62
FBB_D63

1

NC

BOT SIDE
L28
M29
L29
M28
N31
P29
R29
P28
J28
H29
J29
H28
G29
E31
E32
F30
C34
D32
B33
C33
F33
F32
H33
H32
P34
P32
P31
P33
L31
L34
L32
L33
AG28
AF29
AG29
AF28
AD30
AD29
AC29
AD28
AJ29
AK29
AJ30
AK28
AM29
AM31
AN29
AM30
AN31
AN32
AP30
AP32
AM33
AL31
AK33
AK32
AD34
AD32
AC30
AD33
AF31
AG34
AG32
AG33

FBCD[0..63]
FBC_CMD[0..31]
FBCDQM[0..7]
FBCDQS_WP[0..7]
FBCDQS_RN[0..7]

U7001C

2/19 FBA

FBAD0
FBAD1
FBAD2
FBAD3
FBAD4
FBAD5
FBAD6
FBAD7
FBAD8
FBAD9
FBAD10
FBAD11
FBAD12
FBAD13
FBAD14
FBAD15
FBAD16
FBAD17
FBAD18
FBAD19
FBAD20
FBAD21
FBAD22
FBAD23
FBAD24
FBAD25
FBAD26
FBAD27
FBAD28
FBAD29
FBAD30
FBAD31
FBAD32
FBAD33
FBAD34
FBAD35
FBAD36
FBAD37
FBAD38
FBAD39
FBAD40
FBAD41
FBAD42
FBAD43
FBAD44
FBAD45
FBAD46
FBAD47
FBAD48
FBAD49
FBAD50
FBAD51
FBAD52
FBAD53
FBAD54
FBAD55
FBAD56
FBAD57
FBAD58
FBAD59
FBAD60
FBAD61
FBAD62
FBAD63

1

FB_CLAMP
N13P-GL

U7001B

D

2

2

76
76
76
76
76

4

FBA_CMD5

C7113
1UF/6.3V
10%

R7110

2

/DGPU

FBC_RST#
1 10KOhm

FBA_CKE

/DGPU

FBA_CMD3 R7111
FBA_CMD19 R7112

FBC_CMD5

R7115

2

FBC_CMD3 R7116
FBC_CMD19 R7117

2
2

/DGPU

1 10KOhm

FBC_CKE
2
2

/DGPU

1 10KOhm
1 10KOhm

/DGPU

1 10KOhm
1 10KOhm

Title : FrameBuffer

/DGPU

Place Near GPU
/DGPU

Size

5

4

Engineer:

BG1-HW RD Div.2-NB RD Dept.5

3

2

Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
1.0
Sheet
1

71

of

93

5

4

3

2

1

+3VS_VGA

RN7201B
2.2KOhm
/DGPU

DIS_CRT

0.1UF/16V
10K Ohm
1AV200000042
10V220000003

R7902
D

4/19 DACA
GF108/GKx

DACA_VDD

AG10

GF117

GF117

NC

NC
NC

I2CA_SCL
I2CA_SDA

NC
NC

DACA_HSYNC
DACA_VSYNC

DACA_VDD

GF108/GKx

AP8

1

R7201
10KOhm

NC

DACA_RSET

/DGPU

NC

DACA_RED

NC

DACA_GREEN

NC

+1.05VS_VGA

N13P-GS
02V0A0000011

1

1
C7207
22UF/6.3V
/DGPU

1

T7205

AL10

DAC_VG

1

T7206

AL9

DAC_VB

1

T7207

/DGPU

C7214

0.1UF/16V
/DGPU

Frank
20110613 Follow Vender and spec suggest

NC

VID_PLLVDD
GF108/GKx

0928 Alfie
XTALSSIN

H1
H3

3

0.1UF/16V
/DGPU

1

C7210

PLLVDD
SP_PLLVDD

RN7203B
10KOhm

GF117

XTAL_SSIN

XTAL_OUTBUFF

XTAL_IN

N13P-GS
02V0A0000011
VGA_XTALIN

XTAL_OUT

J4
H2

XTAL_OUTB

1

AD8
AE8

2

4.7UF/6.3V
/DGPU

1

C7209

2

2
1

2

C7211
22UF/6.3V
/DGPU

near GPU

2

0.1UF/16V
/DGPU

AD7

/DGPU

C

T7201
T7202

12/19 XTAL_PLL

L7203
2
180Ohm/100Mhz

1
1

AK9

U7001O

C7208

1

1

CRT_HSYNC_VGA
CRT_VSYNC_VGA
DAC_VR

PLL_VDD

2

/DGPU

+1.05VS_VGA

DACA_BLUE

AM9
AN9

Remove 3 resistor

L7202
2
30Ohm

D

I2CA_CLK
I2CA_DAT

R4
R5

TSEN_VREF

DACA_VREF

2

AP9

1

RN7201A
2.2KOhm
/DGPU

U7001N
1

OPT

3

SKU

2

4

R1.1 Remove the TP(T7203 T7204) for DACA signal by Nvidia

C

/DGPU
1

3

RN7203A
10KOhm

VGA_XTALOUT
2

X7201

4

/DGPU
C7212
10PF/50V
1AV200000001
/DGPU

2

4

/DGPU
27MHZ

C7213
10PF/50V
1AV200000001
/DGPU

/DGPU

STUFF PDs on XTALSSIN and

R1.1 XTALOUTBUFF WHEN EXT_SS IS NOT USED
change value for -R test report

R1.1
change value for -R test report

B

B

A

A

Title : FRAME BUFFER C
Engineer:

PEGATRON COMPUTER INC
Size
C
Date:
5

4

3

2

Project Name

Joyoung_Chianhg

MA50

Rev
1.0



P/N
Monday, February 13, 2012

Sheet
1

72

of

93

5

4

3

2

1

LVDS

R1.1 Remove the TP (T7301 T7311 T7302 T7307 T7303 T7304 T7305 T7306 T7308 T7309 T7310) by Nvidia
U7001J

6/19 IFPAB

ALL PINS NC FOR GF117

AJ8

IFPA_TXC_N
IFPA_TXC
IFPA_TXD0_N
IFPA_TXD0

2

Place Under GPU
D

IFPAB_PLLVDD

AH8

AN6
AM6

IFPAB_RSET

IFPAB_PLLVDD
IFPA_TXD1_N
IFPA_TXD1

1

R7305
10KOhm
/DGPU

IFPA_TXD2_N
IFPA_TXD2
IFPA_TXD3_N
IFPA_TXD3

AN3
AP3
D

AM5
AN5
AK6
AL6
AH6
AJ6
U7001M
9/19 IFPEF

IFPB_TXC_N
IFPB_TXC
IFPAB_IOVDD

IFPA_IOVDD
IFPB_TXD4_N
IFPB_TXD4

2

AG8
AG9

IFPB_IOVDD

R7306
10KOhm
/DGPU

1

IFPB_TXD5_N
IFPB_TXD5

ALL PINS NC FOR GF117

AP5
AP6

DVI-DL

AL7
AM7

I2CY_SDA
I2CY_SCL

I2CY_SDA
I2CY_SCL

TXC
TXC

TXC
TXC

IFPE_L3_N
IFPE_L3

TXD0
TXD0

TXD0
TXD0

IFPE_L2_N
IFPE_L2

TXD1
TXD1

TXD1
TXD1

IFPE_L1_N
IFPE_L1

TXD2
TXD2

TXD2
TXD2

IFPE_L0_N
IFPE_L0

HPD_E

HPD_E

IFPE_PLLVDD

AB8

AM8
AN8

AD6

DVI-SL/HDMI

DP

IFPE_AUX_I2CY_SDA_N
IFPE_AUX_I2CY_SCL

AB4
AB3

IFPEF_PLLVDD
IFPEF_RSET

AC5
AC4

2

IFPB_TXD6_N
IFPB_TXD6

AH9
AJ9

R7312
10KOhm

AL8
AK8
1

IFPB_TXD7_N
IFPB_TXD7

GPIO14

IFPAB

C

/DGPU

IFPE

N4

AC3
AC2
AC1
AD1
AD3
AD2
C

N13P-GS
02V0A0000011
GPIO18

R1

/DGPU

HDMI
U7001K
7/19 IFPC

IFPE_IOVDD

AC7

IFPE_IOVDD
I2CZ_SDA
I2CZ_SCL

ALL PINS NC FOR GF117

Place Under GPU
AF7

IFPC_PLLVDD

2

IFPC_PLLVDD

R7303
10KOhm
/DGPU

DVI/HDMI

I2CW_SDA
I2CW_SCL

DP

IFPC_AUX_I2CW_SDA_N
IFPC_AUX_I2CW_SCL

TXC
TXC

IFPC_L3_N
IFPC_L3

/DGPU

IFPF

AG4
AG5

1

IFPC

IFPC_IOVDD

AF2
AF3

TXC
TXC

IFPF_L3_N
IFPF_L3

TXD3
TXD3

TXD0
TXD0

IFPF_L2_N
IFPF_L2

TXD4
TXD4

TXD1
TXD1

IFPF_L1_N
IFPF_L1

TXD5
TXD5

TXD2
TXD2

TXD0
TXD0

IFPC_L2_N
IFPC_L2

TXD1
TXD1

IFPC_L1_N
IFPC_L1

TXD2
TXD2

IFPC_L0_N
IFPC_L0

AH4
AH3

IFPF_L0_N
IFPF_L0

AF1
AG1
AD5
AD4
AF5
AF4
AE4
AE3

AJ2
AJ3
HPD_F

GPIO19

AJ1
AK1

P3

N13P-GS
02V0A0000011
AF6

IFPC_IOVDD

GPIO15

P2

B

/DGPU

HDMI_HP Pull-Down 10K at connnector

2

B

IFPF_AUX_I2CZ_SDA_N
IFPF_AUX_I2CZ_SCL

IFPF_IOVDD

R7310
10KOhm
AG2
AG3

1

IFPC_RSET

2

AC8
AF8

N13P-GS
02V0A0000011

R7304
10KOhm
/DGPU
1

/DGPU

U7001L
8/19 IFPD

ALL PINS NC FOR GF117

2

AN2

IFPD_PLLVDD

AG7

IFPD_RSET

IFPD_PLLVDD

1

R7308
10KOhm
/DGPU

IFPD

DVI/HDMI

DP

I2CX_SDA
I2CX_SCL

IFPD_AUX_I2CX_SDA_N
IFPD_AUX_I2CX_SCL

TXC
TXC

IFPD_L3_N
IFPD_L3

TXD0
TXD0

IFPD_L2_N
IFPD_L2

TXD1
TXD1

IFPD_L1_N
IFPD_L1

TXD2
TXD2

IFPD_L0_N
IFPD_L0

2

A

IFPD_IOVDD

AG6

IFPD_IOVDD

GPIO17

AK5
AK4
AL4
AL3
AM4
AM3
A

AM2
AM1

M6

N13P-GS
02V0A0000011

Title : FRAME BUFFER C

1

R7309
10KOhm
/DGPU

AK2
AK3

/DGPU

Engineer:

PEGATRON COMPUTER INC
Size
C
Date:
5

4

3

2

Project Name

Joyoung_Chianhg

MA50

Rev
1.0



P/N
Monday, February 13, 2012

Sheet
1

73

of

93

5

4

3

2

1

U7001P

0928 Alfie change to N13P-GL strap

13/19 MISC2

+3VS_VGA

1

R7401
40.2KOhm
1%
/DGPU

J1

+3VS_VGA

MULTI_STRAP_REF0_GND

CEC

R7403
2

L3

10KOhm
1
1

2

STRAP_REFGND

0928 Alfie

/GL

R7411
45.3KOhm
1%
@

R7415
15KOhm
1%
/DGPU

2
1

2
1

1

2
R7413
4.99KOhm
1%
/DGPU

@

D

2

10KOhm
1

/DGPU

R7418
45.3KOhm1%

R7416
4.99KOhm
1%
/DGPU

1

R7402
2

R7417
45.3KOhm
1%
@

1

L2

R7414
10KOhm
1%
@

2

BUFRST_N

R7412
45.3KOhm
1%
@

2

D

R7410
45.3KOhm
1%
/DGPU

1

STRAP0
STRAP1
STRAP2
STRAP3
STRAP4

2

2

ROM_SI
ROM_SO
ROM_SCLK

1

H5
H7
H4

1

ROM_SI
ROM_SO
ROM_SCLK

STRAP0
STRAP1
STRAP2
STRAP3
STRAP4

2

J2
J7
J6
J5
J3

T7401

2

STRAP0
STRAP1
STRAP2
STRAP3
STRAP4

H6 1

1

ROM_CS_N

R7419
45.3KOhm
1%
/DGPU

STRAP0
ROM_SI RAMCONFIG
MONO RANK
USER[3:0]
-> ram_cfg = 0x2
3 2 1 0 PANEL VS/HS Hynix 64Mx16
0
0
0
0
0
1

CEC
R2.0 12/20

+3VS_VGA

1
2

0
0
1
1
0
1

0
1
0
1
0
1

XGA
XGA
SXGA
SXGA+
UXGA
EDID

-/+/+
+/+
-/+/+
N/A

STRAP1
3GIO_PAD_CFG_ADR[3:0]
3 2 1 0 PANEL

R7406
4.99KOhm
1%
/DGPU

0 0 0 0
.
0 1 1 0
.
.
1 1 1 1

2
R7408
10KOhm
1%
/DGPU

1

R7407
15KOhm
1%
/DGPU

1

R2.1 01/09

R7405
10KOhm
1%
@

1

2

ROM_SI
ROM_SO
ROM_SCLK

R7404
5.1KOhm
1%
@

1

NC

2

/DGPU

2

2

N13P-GS/N13M-GS

PU 10K
(3V3)

1

N13P-GL

N13P-GS
02V0A0000011

0
0
0
0
1
1

R7409
15KOhm
1%
@

RESERVED
NOTEBOOK
RESERVED

STRAP2
LOGICAL BIT
PCI_DEVID[0]
0
1
PCI_DEVID[1]
PCI_DEVID[2]
2
3
PCI_DEVID[3]

R1.1 Exchange R7408 to 10K PD (NV)

Samsung 64Mx16 -> ram_cfg = 0x3
Hynix 128Mx16
-> ram_cfg = 0x6
Samsung 128Mx16 -> ram_cfg = 0x7

ROM_SO
LOGICAL BIT
3
XCLK_417
2
FB_0_BAR_SIZE
1
SMB_ALT_ADDR
0
VGA_DEVICE

ROM_SCLK
LOGICAL BIT
3
PCI_DEVID[4]
2
SUB_VENDER
SLOT_CLK_CFG
1
0
PEX_PLL_EN_TERM

+3VS_VGA

U7001Q

4
2
4
2

2.2KOhm
2.2KOhm
2.2KOhm
2.2KOhm

/DGPU
/DGPU
/DGPU
/DGPU

3
1
3
1

VRAM need change BOM

+3VS_VGA
2

RN7413B
RN7413A
RN7411B
RN7411A

C

Q7405A
UM6K1N

C

/DGPU

11/19 MISC1

I2CC_SCL
I2CC_SDA
VGA_THERMDN K4

1

VGA_THERMDP K3

1 VGA_JTAG_TCK
1 VGA_JTAG_TMS
1 VGA_JTAG_TDI
1 VGA_JTAG_TDO
VGA_JTAG_TRST_N
2
R7440

AM10
AP11
AM11
AP12
AN11

THERMDN

RN7415B
RN7415A

R7
R6

4 2.2KOhm
2 2.2KOhm

JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST_N

1

SMB1_CLK 28,30,50
SMB1_DAT 28,30,50

3
UM6K1N
Q7405B

+3VS_VGA

/DGPU
/DGPU

3
1

/DGPU

+3VS_VGA
+3VS_VGA

THERMDP

/DGPU
T7426

I2CB_SCL
I2CB_SDA

6
4

CR R1.0 VID control change name
1
3

1

T7421

1

R2
R3

GPU_VID_4
GPU_VID_3

RN7422A
10KOhm
/DGPU

VR_VID_4
VR_VID_3

R1.1 Remove L_VDDEN_VGA & LCD_BKEN_VGA signals, No function request on the pin (NV)
RN7422B
10KOhm
/DGPU

+3VS_VGA

R1.1 Remove 2 test point
GPU_VID_1
GPU_VID_2

Q7403
2N7002

1

VR_VID_1
VR_VID_2

G
3

2 R0402 VGA_OVERTEMP#_R
2 R0402 THERM_ALERT#

VGA_OVERTEMP# 32

D

SL7401 1
SL7402 1

2 S

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO16
GPIO20
GPIO21

P6
M3
L6
P5
P7
L7
M7
N8
M1
M2
L1
M5
N3
M4
R8
P4
P1

2
4

T7422
T7423
T7424
T7425
1
10KOhm

T7420

SMB_CLK_VGA
SMB_DAT_VGA

T4
T3

5

I2CS_SCL
I2CS_SDA

/DGPU
GPU_VID_0
AC_BATT#
GPU_VID_5
VGA_DPRSLPVR_NV

Pull high +3VS at system

VR_VID_0

VPS

VR_VID_5
1
SL7403
2
+3VS_VGA
10KOhm
@

1
R7420

2 R0402

0928 Alfie add VGA_DPRSLPVR

VGA_DPRSLPVR

B

B

+3VS_VGA

Q7401A
UM6K1N
/DGPU
2

Q7401B
UM6K1N
/DGPU
5

AC_IN_OC

30

4

1

6

AC_BATT#

3

/DGPU

R7422
10KOhm
/DGPU
1

R7421
10KOhm
/DGPU
1

N13P-GS
02V0A0000011

2

+3VS_VGA

2

R1.1 Remove the TP T7428 by Nvidia

R2.0 Joyoung
change to LV-shift cause chipset can't be pull low in DC mode.

+3VS_VGA
Q7402
2N7002

1
G
3
D

2 S

THERM_ALERT#

VGA_THRALARM#

30

/DGPU

A

A

Title : FRAME BUFFER A
PEGATRON COMPUTER INC
Size
A2
Date:
5

4

3

2

Project Name

Engineer:

Joyoung_Chianhg
Rev

MA50

P/N
Monday, February 13, 2012
1

1.0


Sheet

74

of

93

5

4

3

2

1

+VGA_VCORE
U7001E

PLACE UNDER GPU

2

C7525

1

4.7UF/6.3V 4.7UF/6.3V
/DGPU
/DGPU

1

2

C7522

C7524
4.7UF/6.3V
/DGPU

0.1UF/16V
/DGPU

C7505
0.1UF/16V
/DGPU

C7502
1UF/6.3V
/DGPU

2

1

C7504

C7503
4.7UF/6.3V
/DGPU

1

0.1UF/16V
/DGPU

1

C7501

2

0.1UF/16V
/DGPU

2

C7507

1

VDD33_1
VDD33_2
VDD33_3
VDD33_4

2

NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
NC13
NC14

0Ohm
1
/DGPU

2
1

0.1UF/16V
/DGPU

J8
K8
L8
M8

2

1

1

1

0.1UF/16V
/DGPU

AC6
AJ28
AJ4
AJ5
AL11
C15
D19
D20
D23
D26
H31
T8
V32

PLACE NEAR BALLS

PLACE NEAR BGA

GND
D

2

C7530

4.7UF/6.3V 4.7UF/6.3V
/DGPU
/DGPU

2

4.7UF/6.3V 4.7UF/6.3V 4.7UF/6.3V
/DGPU
/DGPU
/DGPU

22UF/6.3V
/DGPU

1

C7552

2

1

C7537

2

C7536

1

1

1

1

C7535

2

4.7UF/6.3V
/DGPU

2

2

2

4.7UF/6.3V
/DGPU

2

1

1

CE7501
330UF/2V
1BV080000010

C7533

/DGPU

0928 Alfie change 15pcs 10uF to 4.7uF , follow NV suggest

GND

C7534

N13P-GS
02V0A0000011

C7532

1

4.7UF/6.3V 4.7UF/6.3V
/DGPU
/DGPU

2

2

C7531

1

4.7UF/6.3V 4.7UF/6.3V
/DGPU
/DGPU

C7529

1

2

C7528

1

2

C7526

1

2

4.7UF/6.3V
/DGPU

1

1

2

GND
C7527

C7553
47UF/4V
/DGPU

PLACE NEAR GPU

+1.5VS_VGA

+1.5VS_VGA

GND

U7001D

Frank
20110613 Follow Vender and spec suggest
=> Add C7542, C7543, C7544, C7545 and C7556 mount
Remove C7540, C7561, C7558, C7649
Change C7541, C7557 to 10uF

15/19 FBVDDQ

U7001G
16/19 GND_1/2

A2
AA17
AA18
AA20
AA22
AB12
AB14
AB16
AB19
AB2
AB21
A33
AB23
AB28
AB30
AB32
AB5
AB7
AC13
AC15
AC17
AC18
AA13
AC20
AC22
AE2
AE28
AE30
AE32
AE33
AE5
AE7
AH10
AA15
AH13
AH16
AH19
AH2
AH22
AH24
AH28
AH29
AH30
AH32
AH33
AH5
AH7
AJ7
AK10
AK7
AL12
AL14
AL15
AL17
AL18
AL2
AL20
AL21
AL23
AL24
AL26
AL28
AL30
AL32
AL33
AL5
AM13
AM16
AM19
AM22

17/19 GND_2/2

GND143
GND144
GND145
GND146
GND147
GND148
GND149
GND150
GND151
GND152
GND153
GND154
GND155
GND156
GND157
GND158
GND159
GND160
GND161
GND162
GND163
GND164
GND165
GND166
GND167
GND168
GND169
GND170
GND171

GND172
GND173
GND174
GND175
GND176
GND177
GND178
GND179
GND180
GND181
GND182
GND183
GND184
GND185
GND186
GND187
GND188
GND189
GND190
GND191
GND192
GND193
GND194
GND195
GND196
GND197
GND198
GND199
GND200

GND34

GND36

T28
T32
T5
T7
U12
U14
U16
U19
U21
U23
V12
V14
V16
V19
V21
V23
W13
W15
W17
W18
W20
W22
W28
Y12
Y14
Y16
Y19
Y21
Y23

AH11

GND
A

GND_OPT1
GND_OPT2

C16
W32

GND1
GND5
GND6
GND7
GND8
GND9
GND10
GND11
GND12
GND13
GND14
GND2
GND15
GND16
GND17
GND18
GND19
GND20
GND21
GND22
GND23
GND24
GND3
GND25
GND26
GND27
GND28
GND29
GND30
GND31
GND32
GND33
GND35
GND4
GND37
GND38
GND39
GND40
GND41
GND42
GND43
GND44
GND45
GND46
GND47
GND48
GND49
GND50
GND51
GND52
GND53
GND54
GND55
GND56
GND57
GND58
GND59
GND60
GND61
GND62
GND63
GND64
GND65
GND66
GND67
GND68
GND69
GND70
GND71
GND72

GND73
GND74
GND75
GND76
GND77
GND78
GND79
GND80
GND81
GND82
GND83
GND84
GND85
GND86
GND87
GND88
GND89
GND90
GND91
GND92
GND93
GND94
GND95
GND96
GND97
GND98
GND99
GND100
GND101
GND102
GND103
GND104
GND105
GND106
GND107
GND108
GND109
GND110
GND111
GND112
GND113
GND114
GND115
GND116
GND117
GND118
GND119
GND120
GND121
GND122
GND123
GND124
GND125
GND126
GND127
GND128
GND129
GND130
GND131
GND132
GND133
GND134
GND135
GND136
GND137
GND138
GND139
GND140
GND141
GND142

AM25
AN1
AN10
AN13
AN16
AN19
AN22
AN25
AN30
AN34
AN4
AN7
AP2
AP33
B1
B10
B22
B25
B28
B31
B34
B4
B7
C10
C13
C19
C22
C25
C28
C7
D2
D31
D33
E10
E22
E25
E5
E7
F28
F7
G10
G13
G16
G19
G2
G22
G25
G28
G3
G30
G32
G33
G5
G7
K2
K28
K30
K32
K33
K5
K7
M13
M15
M17
M18
M20
M22
N12
N14
N16

4.7UF/6.3V
/DGPU

1

C7555

C7554
10UF/6.3V
/DGPU

2

1UF/6.3V
/DGPU

1

C7538

2

0.1UF/16V
/DGPU

2

1

C7544

1

0.1UF/16V
/DGPU

1

C7542

2

0.1UF/16V
/DGPU

1

C7559

2

0.1UF/16V
/DGPU

2

C7539

2

2

1

FBVDDQ1
FBVDDQ2
FBVDDQ3
FBVDDQ4
FBVDDQ5
FBVDDQ6
FBVDDQ7
FBVDDQ8
FBVDDQ9
FBVDDQ10
FBVDDQ11
FBVDDQ12
FBVDDQ13
FBVDDQ14
FBVDDQ15
FBVDDQ16
FBVDDQ17
FBVDDQ18
FBVDDQ19
FBVDDQ20
FBVDDQ21
FBVDDQ22
FBVDDQ23
FBVDDQ24
FBVDDQ25
FBVDDQ26
FBVDDQ27
FBVDDQ28
FBVDDQ29
FBVDDQ30
FBVDDQ31
FBVDDQ32
FBVDDQ33
FBVDDQ34
FBVDDQ35
FBVDDQ36
FBVDDQ37
FBVDDQ38
FBVDDQ39
FBVDDQ40
FBVDDQ41
FBVDDQ42
FBVDDQ43
FBVDDQ44

C7541
10UF/6.3V
/DGPU

1

1

4.7UF/6.3V
/DGPU

C7550
10UF/6.3V
/DGPU

2

1UF/6.3V
/DGPU

C7562

2

2

1

1

1

0.1UF/16V
/DGPU

C7560

1

0.1UF/16V
/DGPU

C7545

2

0.1UF/16V
/DGPU

C7543

2

2

0.1UF/16V
/DGPU

C7556

2

C7551

1

GND
1

AA27
AA30
AB27
AB33
AC27
AD27
AE27
AF27
AG27
B13
B16
B19
E13
E16
E19
H10
H11
H12
H13
H14
H15
H16
H18
H19
H20
H21
H22
H23
H24
H8
H9
L27
M27
N27
P27
R27
T27
T30
T33
V27
W27
W30
W33
Y27

1

0929 Alfie change 5pcs 10uF to 4.7uF , follow NV suggest

U7001I

AG11

2

C7523

4.7UF/6.3V 4.7UF/6.3V
/DGPU
/DGPU

1

2

C7520

1

2

C7521

4.7UF/6.3V 4.7UF/6.3V
/DGPU
/DGPU

1

2

C7518

1

2

4.7UF/6.3V
/DGPU

1

2
1

C7519

N13P-GS
02V0A0000011

B

0.1UF/16V
/DGPU

+3VS_VGA

R7501
C7516

GND

/DGPU

N19
N2
N21
N23
N28
N30
N32
N33
N5
N7
P13
P15
P17
P18
P20
P22
R12
R14
R16
R19
R21
R23
T13
T15
T17
T18
T2
T20
T22

C7517

2

0.1UF/16V
/DGPU

C7514

2

0.1UF/16V
/DGPU

C7515

2

1

1

0.1UF/16V
/DGPU

C7512

2

0.1UF/16V
/DGPU

C7513

2

1

C7510

2

1

0.1UF/16V
/DGPU

2

1
2

C7511

2

C

18/19 NC/VDD33

+

D

Frank
20110613 Follow Vender and spec suggest=>Remove C7506, C7508

U7001F

1

AA12
AA14
AA16
AA19
AA21
AA23
AB13
AB15
AB17
AB18
AB20
AB22
AC12
AC14
AC16
AC19
AC21
AC23
M12
M14
M16
M19
M21
M23
N13
N15
N17
N18
N20
N22
P12
P14
P16
P19
P21
P23
R13
R15
R17
R18
R20
R22
T12
T14
T16
T19
T21
T23
U13
U15
U17
U18
U20
U22
V13
V15
V17
V18
V20
V22
W12
W14
W16
W19
W21
W23
Y13
Y15
Y17
Y18
Y20
Y22

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VDD23
VDD24
VDD25
VDD26
VDD27
VDD28
VDD29
VDD30
VDD31
VDD32
VDD33
VDD34
VDD35
VDD36
VDD37
VDD38
VDD39
VDD40
VDD41
VDD42
VDD43
VDD44
VDD45
VDD46
VDD47
VDD48
VDD49
VDD50
VDD51
VDD52
VDD53
VDD54
VDD55
VDD56
VDD57
VDD58
VDD59
VDD60
VDD61
VDD62
VDD63
VDD64
VDD65
VDD66
VDD67
VDD68
VDD69
VDD70
VDD71
VDD72

2

14/19 NVVDD

C7557

C

10UF/6.3V
/DGPU

GND

CALIBRATION PIN

GDDR5

FB_CALx_PD_VDDQ

40

FB_CALx_PU_GND

40

FB_CALx_TERM_GND

60

T7508
FB_VDDQ_SENSE

F1

FBVDDQ_SENSE

1

F2

FBVDDQ_GND_SENSE

1

J27

FB_CAL_PD_VDDQ

H27

FB_CAL_PU_GND

/DGPU

H25

FB_CAL_TERM_GND

/DGPU

T7509
FB_GND_SENSE
FB_CAL_PD_VDDQ
FB_CAL_PU_GND

PLACE CLOSE TO GPU BALLS

B

+1.5VS_VGA
/DGPU
1

R7507 40.2Ohm
2

R7509 42.2Ohm
1
2
R7510

FB_CAL_TERM_GND

2
51.1Ohm
10V220000319

N13P-GS
02V0A0000011
/DGPU

1

GND

Frank
20110613 Follow Vender and spec suggest=>Remove R7509 change 42.2 ohm
Joyoung
20110913 Follow Vendor spec PUN-05893-001_v02=>Change R7510 to 51.1 ohm

A

Optional CMD GNDs (2)
NC for 4-Lyr cards

N13P-GS
02V0A0000011

GND
GND

N13P-GS
02V0A0000011

GND

/DGPU

/DGPU

Title : FRAME BUFFER C
Engineer:

BG1-HW RD Div.2-NB RD Dept.5
Size

5

4

3

2

Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
1.0
Sheet
1

75

of

93

4

E7
D3
G3
B7

FBA_CMD5

T2

E7
D3
G3
B7

FBA_CMD5

T2

DQSL#
DQSU#
RESET#
ZQ

1

L8

DML
DMU

2

R7617
243Ohm 1%

/DGPU

A

J1
L1
J9
L9

NC3
NC4
NC5
NC6

VSS3
VSS7
VSS9
VSS11
VSS5
VSS2
VSS4
VSS6
VSS1
VSS8
VSS10
VSS12

E1
M1
P1
T1
J2
B3
G8
J8
A9
M9
P9
T9

/DGPU

2
1
1
2

2
1
1
2

2
1
1
2

2
1
1
2

2
1

2
2

/DGPU

B1
D1
G1
E2
D8
E8
B9
F9
G9

C

/DGPU

C7635
1UF/6.3V
10%

FBADQM7
FBADQM6

E7
D3

FBADQS_RN7
FBADQS_RN6

G3
B7

FBA_CMD5

T2

/DGPU

place close to balls

VSSQ1
VSSQ3
VSSQ8
VSSQ5
VSSQ4
VSSQ6
VSSQ2
VSSQ7
VSSQ9

DQSL
DQSU
DML
DMU
DQSL#
DQSU#
RESET#

L8
R7618
243Ohm 1%

ZQ

B1
D1
G1
E2
D8
E8
B9
F9
G9

J1
L1
J9
L9

NC3
NC4
NC5
NC6

/DGPU

VSS3
VSS7
VSS9
VSS11
VSS5
VSS2
VSS4
VSS6
VSS1
VSS8
VSS10
VSS12
VSSQ1
VSSQ3
VSSQ8
VSSQ5
VSSQ4
VSSQ6
VSSQ2
VSSQ7
VSSQ9

6

N1
R1
B2
K2
G7
K8
D9
N9
R9
A1
C1
F1
D2
H2
A8
C9
E9
H9
E1
M1
P1
T1
J2
B3
G8
J8
A9
M9
P9
T9

B

+1.5VS_VGA
C7637
0.1UF/10V
10%

/DGPU

C7646
1UF/6.3V
10%

/DGPU

C7638
0.1UF/10V
10%

/DGPU

C7640
1UF/6.3V
10%

/DGPU

C7639
0.1UF/10V
10%

/DGPU

C7643
1UF/6.3V
10%

/DGPU

C7641
0.1UF/10V
10%

/DGPU

C7644
1UF/6.3V
10%

/DGPU

2

F3
C7

VDDQ1
VDDQ3
VDDQ7
VDDQ5
VDDQ8
VDDQ2
VDDQ4
VDDQ6
VDDQ9

FBAD54
FBAD49
FBAD55
FBAD48
FBAD52
FBAD50
FBAD53
FBAD51

1

FBADQS_WP7
FBADQS_WP6

ODT
CS#
RAS#
CAS#
WE#

D7
C3
C8
C2
A7
A2
B8
A3

C7642
1UF/6.3V
10%

/DGPU

1

K1
L2
J3
K3
L3

/DGPU

7

2

FBA_CMD18
FBA_CMD16
FBA_CMD30
FBA_CMD15
FBA_CMD13

CK
CK#
CKE

VDD6
VDD8
VDD1
VDD4
VDD3
VDD5
VDD2
VDD7
VDD9

FBAD63
FBAD62
FBAD61
FBAD60
FBAD59
FBAD57
FBAD58
FBAD56

1

2
1

2
1

/DGPU

J7
K7
K9

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

E3
F7
F2
F8
H3
H8
G2
H7

2

C7634
1UF/6.3V
10%

FBA_CLK1
FBA_CLK1#
FBA_CMD19

BA0
BA1
BA2

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

1

C7633
1UF/6.3V
10%

/DGPU

C7632
1UF/6.3V
10%

M2
N8
M3

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
NC1
NC2

2

2
/DGPU

/DGPU

C7631
0.1UF/10V
10%

FBA_CMD12
FBA_CMD27
FBA_CMD26

VREFCA
VREFDQ

1

1
1
2

C7630
1UF/6.3V
10%

BGA_96P_524x354_COLY
/DGPU

5

/DGPU

C7622
1UF/6.3V
10%

place close to balls

2

C7636
1UF/6.3V
10%

/DGPU

C7629
0.1UF/10V
10%

1

/DGPU

C7628
0.1UF/10V
10%

2

C7627
0.1UF/10V
10%

2

A1
C1
F1
D2
H2
A8
C9
E9
H9

+1.5VS_VGA

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

1

FBADQM4
FBADQM5
FBADQS_RN4
FBADQS_RN5

VDDQ1
VDDQ3
VDDQ7
VDDQ5
VDDQ8
VDDQ2
VDDQ4
VDDQ6
VDDQ9

N1
R1
B2
K2
G7
K8
D9
N9
R9

/DGPU

M8
H1

FBA_CMD9
FBA_CMD11
FBA_CMD8
FBA_CMD25
FBA_CMD10
FBA_CMD24
FBA_CMD22
FBA_CMD7
FBA_CMD21
FBA_CMD6
FBA_CMD29
FBA_CMD23
FBA_CMD28
FBA_CMD20
FBA_CMD4
FBA_CMD14

2

place near VRAM

DQSL
DQSU

R7616
1KOhm1%

5

1

F3
C7

VDD6
VDD8
VDD1
VDD4
VDD3
VDD5
VDD2
VDD7
VDD9

place near VRAM

2

FBADQS_WP4
FBADQS_WP5

ODT
CS#
RAS#
CAS#
WE#

C7626
0.01UF/16V
10%

/DGPU
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

1

K1
L2
J3
K3
L3

/DGPU

1

162Ohm
/DGPU

FBA_CMD18
FBA_CMD16
FBA_CMD30
FBA_CMD15
FBA_CMD13

FBAD47
FBAD41
FBAD46
FBAD42
FBAD45
FBAD43
FBAD44
FBAD40

4

2

1

CK
CK#
CKE

D7
C3
C8
C2
A7
A2
B8
A3

FBA_VREF_CA1
FBA_VREF_DQ1

R7615
1 1KOhm 2
1%

+1.5VS_VGA

1

2

FBA_CMD19

J7
K7
K9

BA0
BA1
BA2

FBAD33
FBAD34
FBAD35
FBAD32
FBAD37
FBAD38
FBAD36
FBAD39

2

R7611

M2
N8
M3

E3
F7
F2
F8
H3
H8
G2
H7

1

FBA_CLK1
FBA_CLK1#

FBA_CMD12
FBA_CMD27
FBA_CMD26

/DGPU

C7621
1UF/6.3V
10%

/DGPU

U7604
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

2

B

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
NC1
NC2

/DGPU

C7620
1UF/6.3V
10%

/DGPU

C7619
1UF/6.3V
10%

*BOT SIDE*

2

/DGPU

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

/DGPU

C7617
1UF/6.3V
10%

/DGPU

C7618
0.1UF/10V
10%

/DGPU

1

/DGPU

place near VRAM

FBA_CMD9
FBA_CMD11
FBA_CMD8
FBA_CMD25
FBA_CMD10
FBA_CMD24
FBA_CMD22
FBA_CMD7
FBA_CMD21
FBA_CMD6
FBA_CMD29
FBA_CMD23
FBA_CMD28
FBA_CMD20
FBA_CMD4
FBA_CMD14

VSSQ1
VSSQ3
VSSQ8
VSSQ5
VSSQ4
VSSQ6
VSSQ2
VSSQ7
VSSQ9

E1
M1
P1
T1
J2
B3
G8
J8
A9
M9
P9
T9

C7623
1UF/6.3V
10%

/DGPU

C7616
0.1UF/10V
10%

BGA_96P_524x354_COLY

2

R7614
1KOhm1%
2

C7625
0.01UF/16V
10%

VREFCA
VREFDQ

NC3
NC4
NC5
NC6

/DGPU
B1
D1
G1
E2
D8
E8
B9
F9
G9

1

1
1
2

/DGPU

M8
H1

ZQ

J1
L1
J9
L9

U7603
FBA_VREF_CA1
FBA_VREF_DQ1

RESET#

VSS3
VSS7
VSS9
VSS11
VSS5
VSS2
VSS4
VSS6
VSS1
VSS8
VSS10
VSS12

2

1
2
1

1

2

2

R7606
243Ohm 1%

*TOP SIDE*
+1.5VS_VGA

DQSL#
DQSU#

L8

BGA_96P_524x354_COLY
/DGPU

R7613
1 1KOhm 2
1%

DML
DMU

/DGPU

C7615
0.1UF/10V
10%

1

/DGPU

VSSQ1
VSSQ3
VSSQ8
VSSQ5
VSSQ4
VSSQ6
VSSQ2
VSSQ7
VSSQ9

FBADQM1
FBADQM2
FBADQS_RN1
FBADQS_RN2

DQSL
DQSU

A1
C1
F1
D2
H2
A8
C9
E9
H9

+1.5VS_VGA
C7614
0.1UF/10V
10%

2

NC3
NC4
NC5
NC6

F3
C7

VDDQ1
VDDQ3
VDDQ7
VDDQ5
VDDQ8
VDDQ2
VDDQ4
VDDQ6
VDDQ9

D

2

C

J1
L1
J9
L9

place close to balls

FBADQS_WP1
FBADQS_WP2

ODT
CS#
RAS#
CAS#
WE#

N1
R1
B2
K2
G7
K8
D9
N9
R9

2

1

2

R7605
243Ohm 1%

/DGPU

K1
L2
J3
K3
L3

FBAD18
FBAD20
FBAD16
FBAD23
FBAD17
FBAD22
FBAD19
FBAD21

1

1

ZQ

E1
M1
P1
T1
J2
B3
G8
J8
A9
M9
P9
T9

/DGPU

FBA_CMD2
FBA_CMD0
FBA_CMD30
FBA_CMD15
FBA_CMD13

CK
CK#
CKE

D7
C3
C8
C2
A7
A2
B8
A3

1

2

L8

VSS3
VSS7
VSS9
VSS11
VSS5
VSS2
VSS4
VSS6
VSS1
VSS8
VSS10
VSS12

C7648
1UF/6.3V
10%

J7
K7
K9

VDD6
VDD8
VDD1
VDD4
VDD3
VDD5
VDD2
VDD7
VDD9

FBAD12
FBAD14
FBAD9
FBAD15
FBAD13
FBAD10
FBAD11
FBAD8

2

RESET#

/DGPU

C7613
1UF/6.3V
10%

FBA_CLK0
FBA_CLK0#
FBA_CMD3

BA0
BA1
BA2

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

E3
F7
F2
F8
H3
H8
G2
H7

1

DQSL#
DQSU#

/DGPU

C7612
1UF/6.3V
10%

/DGPU

M2
N8
M3

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
NC1
NC2

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

2

T2

/DGPU

/DGPU

FBA_CMD12
FBA_CMD27
FBA_CMD26

VREFCA
VREFDQ

1

G3
B7

FBA_CMD5

DML
DMU

C7610
1UF/6.3V
10%

C7609
1UF/6.3V
10%

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

1

FBADQS_RN3
FBADQS_RN0

DQSL
DQSU

C7647
1UF/6.3V
10%

/DGPU

C7608
0.1UF/10V
10%

M8
H1

FBA_CMD9
FBA_CMD11
FBA_CMD8
FBA_CMD25
FBA_CMD10
FBA_CMD24
FBA_CMD22
FBA_CMD7
FBA_CMD21
FBA_CMD6
FBA_CMD29
FBA_CMD23
FBA_CMD28
FBA_CMD20
FBA_CMD4
FBA_CMD14

2

E7
D3

A1
C1
F1
D2
H2
A8
C9
E9
H9

/DGPU

C7607
0.1UF/10V
10%

1

F3
C7

FBADQM3
FBADQM0

VDDQ1
VDDQ3
VDDQ7
VDDQ5
VDDQ8
VDDQ2
VDDQ4
VDDQ6
VDDQ9

/DGPU

C7606
0.1UF/10V
10%

2

FBADQS_WP3
FBADQS_WP0

place near VRAM

ODT
CS#
RAS#
CAS#
WE#

C7605
0.1UF/10V
10%

1

K1
L2
J3
K3
L3

/DGPU

+1.5VS_VGA

2

FBA_CMD2
FBA_CMD0
FBA_CMD30
FBA_CMD15
FBA_CMD13

1
/DGPU

CK
CK#
CKE

N1
R1
B2
K2
G7
K8
D9
N9
R9

1

J7
K7
K9

0

/DGPU

2

FBA_CMD3

BA0
BA1
BA2

FBAD5
FBAD1
FBAD6
FBAD3
FBAD4
FBAD0
FBAD7
FBAD2

R7604
1KOhm1%

place near VRAM

1

R7608
2
162Ohm

M2
N8
M3

VDD6
VDD8
VDD1
VDD4
VDD3
VDD5
VDD2
VDD7
VDD9

D7
C3
C8
C2
A7
A2
B8
A3

C7602
0.01UF/16V
10%

/DGPU

1

FBA_CLK0
FBA_CLK0#

FBA_CMD12
FBA_CMD27
FBA_CMD26

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

3

1

D

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

2

/DGPU

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
NC1
NC2

2

/DGPU

place near VRAM

VREFCA
VREFDQ

1

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

2

FBA_CMD9
FBA_CMD11
FBA_CMD8
FBA_CMD25
FBA_CMD10
FBA_CMD24
FBA_CMD22
FBA_CMD7
FBA_CMD21
FBA_CMD6
FBA_CMD29
FBA_CMD23
FBA_CMD28
FBA_CMD20
FBA_CMD4
FBA_CMD14

R7602
1KOhm1%

1

U7602

FBAD30
FBAD31
FBAD24
FBAD25
FBAD27
FBAD26
FBAD29
FBAD28

FBA_VREF_CA0
FBA_VREF_DQ0

R7603
1 1KOhm 2
1%

+1.5VS_VGA
E3
F7
F2
F8
H3
H8
G2
H7

1

C7601
0.01UF/16V
10%

M8
H1

2

2

/DGPU

FBA_VREF_CA0
FBA_VREF_DQ0

2

1

*TOP SIDE*
U7601

1

R7601
1 1KOhm 2
1%
1

+1.5VS_VGA

3

*BOT SIDE*

FBAD[0..63]
FBA_CMD[0..31]
FBADQM[0..7]
FBADQS_WP[0..7]
FBADQS_RN[0..7]

2

VRAM CH A

71
71
71
71
71

1

5

C7645
1UF/6.3V
10%

/DGPU

place close to balls

B1
D1
G1
E2
D8
E8
B9
F9
G9

Title : FRAME BUFFER A
BG1-HW RD Div.2-NB RD Dept.5
Size

BGA_96P_524x354_COLY
/DGPU

4

3

2

Engineer:

A2

MA50

Date:

Monday, February 13, 2012

A

Joyoung_Chianhg

Project Name

Rev
1.0
Sheet

76

of

93

1

5

4

*TOP SIDE*

/DGPU

place close to balls

FBCDQM3
FBCDQM2

E7
D3

FBCDQS_RN3
FBCDQS_RN2

G3
B7

FBC_CMD5

T2
L8

R7705
243Ohm 1%

B1
D1
G1
E2
D8
E8
B9
F9
G9

VSSQ1
VSSQ3
VSSQ8
VSSQ5
VSSQ4
VSSQ6
VSSQ2
VSSQ7
VSSQ9

J1
L1
J9
L9

E7
D3
G3
B7

FBC_CMD5

T2
L8

DQSL#
DQSU#
RESET#
ZQ

1

A

DML
DMU

2

R7711
243Ohm 1%

/DGPU

J1
L1
J9
L9

NC3
NC4
NC5
NC6

VSSQ1
VSSQ3
VSSQ8
VSSQ5
VSSQ4
VSSQ6
VSSQ2
VSSQ7
VSSQ9

2
1
2
1

2
1
2

2
1
2

2

2
1
2

C7723
1UF/6.3V
10%
/DGPU

C7724
1UF/6.3V
10%
/DGPU

place close to balls

C

B1
D1
G1
E2
D8
E8
B9
F9
G9

VSS3
VSS7
VSS9
VSS11
VSS5
VSS2
VSS4
VSS6
VSS1
VSS8
VSS10
VSS12

E1
M1
P1
T1
J2
B3
G8
J8
A9
M9
P9
T9

/DGPU

K1
L2
J3
K3
L3

C7772
1UF/6.3V
10%

2
1

2

/DGPU

/DGPU

C7773
1UF/6.3V
10%

FBCDQS_WP7
FBCDQS_WP6

/DGPU

place close to balls

VSSQ1
VSSQ3
VSSQ8
VSSQ5
VSSQ4
VSSQ6
VSSQ2
VSSQ7
VSSQ9

4

F3
C7

FBCDQM7
FBCDQM6

E7
D3

FBCDQS_RN7
FBCDQS_RN6

G3
B7

FBC_CMD5

T2
L8

ODT
CS#
RAS#
CAS#
WE#
DQSL
DQSU
DML
DMU
DQSL#
DQSU#
RESET#

R7715
243Ohm 1%

ZQ

B1
D1
G1
E2
D8
E8
B9
F9
G9

/DGPU

J1
L1
J9
L9

NC3
NC4
NC5
NC6

VDDQ1
VDDQ3
VDDQ7
VDDQ5
VDDQ8
VDDQ2
VDDQ4
VDDQ6
VDDQ9
VSS3
VSS7
VSS9
VSS11
VSS5
VSS2
VSS4
VSS6
VSS1
VSS8
VSS10
VSS12
VSSQ1
VSSQ3
VSSQ8
VSSQ5
VSSQ4
VSSQ6
VSSQ2
VSSQ7
VSSQ9

N1
R1
B2
K2
G7
K8
D9
N9
R9
A1
C1
F1
D2
H2
A8
C9
E9
H9
E1
M1
P1
T1
J2
B3
G8
J8
A9
M9
P9
T9

+1.5VS_VGA
C7774
0.1UF/10V
10%

/DGPU

/DGPU

C7779
1UF/6.3V
10%

/DGPU

C7780
1UF/6.3V
10%

/DGPU

C7776
0.1UF/10V
10%

/DGPU

C7781
1UF/6.3V
10%

/DGPU

C7777
0.1UF/10V
10%

/DGPU

C7782
1UF/6.3V
10%

/DGPU

C7778
1UF/6.3V
10%

/DGPU

C7783
1UF/6.3V
10%

/DGPU

place close to balls

A

B1
D1
G1
E2
D8
E8
B9
F9
G9

Title : FRAME BUFFER B
Engineer:

BG1-HW RD Div.2-NB RD Dept.5
Size

BGA_96P_524x354_COLY
/DGPU
3

C7775
0.1UF/10V
10%

2

FBC_CMD18
FBC_CMD16
FBC_CMD30
FBC_CMD15
FBC_CMD13

1
/DGPU

1

2
1

2
1

/DGPU

C7771
1UF/6.3V
10%

/DGPU

VDD6
VDD8
VDD1
VDD4
VDD3
VDD5
VDD2
VDD7
VDD9

6

1

1
2
C7744
1UF/6.3V
10%

/DGPU

CK
CK#
CKE

FBCD54
FBCD49
FBCD55
FBCD51
FBCD52
FBCD50
FBCD53
FBCD48

B

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

2

J7
K7
K9

BA0
BA1
BA2

D7
C3
C8
C2
A7
A2
B8
A3

7

1

FBC_CLK1
FBC_CLK1#
FBC_CMD19

C7769
1UF/6.3V
10%

FBCD60
FBCD61
FBCD63
FBCD62
FBCD57
FBCD58
FBCD59
FBCD56

1

C7770
1UF/6.3V
10%

/DGPU

C7768
0.1UF/10V
10%

E3
F7
F2
F8
H3
H8
G2
H7

2

/DGPU

C7767
0.1UF/10V
10%

1

A1
C1
F1
D2
H2
A8
C9
E9
H9

C7766
0.1UF/10V
10%

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

1

M2
N8
M3

+1.5VS_VGA
C7755
0.1UF/10V
10%

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
NC1
NC2

2

FBC_CMD12
FBC_CMD27
FBC_CMD26

/DGPU

5

1

VDDQ1
VDDQ3
VDDQ7
VDDQ5
VDDQ8
VDDQ2
VDDQ4
VDDQ6
VDDQ9

N1
R1
B2
K2
G7
K8
D9
N9
R9

2

VDD6
VDD8
VDD1
VDD4
VDD3
VDD5
VDD2
VDD7
VDD9

place near VRAM

VREFCA
VREFDQ

2

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

2

FBC_CMD9
FBC_CMD11
FBC_CMD8
FBC_CMD25
FBC_CMD10
FBC_CMD24
FBC_CMD22
FBC_CMD7
FBC_CMD21
FBC_CMD6
FBC_CMD29
FBC_CMD23
FBC_CMD28
FBC_CMD20
FBC_CMD4
FBC_CMD14

R7717
1KOhm 1%

BGA_96P_524x354_COLY
/DGPU
5

NC3
NC4
NC5
NC6

1

FBCDQM4
FBCDQM5
FBCDQS_RN4
FBCDQS_RN5

place near VRAM

DQSL
DQSU

M8
H1

2

F3
C7

C7712
0.01UF/16V
10%

2

FBCDQS_WP4
FBCDQS_WP5

ODT
CS#
RAS#
CAS#
WE#

FBC_VREF_CA1
FBC_VREF_DQ1

/DGPU
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

2

/DGPU

K1
L2
J3
K3
L3

R7706
1 1KOhm 2
1%
/DGPU

1

162Ohm

FBC_CMD18
FBC_CMD16
FBC_CMD30
FBC_CMD15
FBC_CMD13

CK
CK#
CKE

FBCD45
FBCD41
FBCD47
FBCD42
FBCD44
FBCD40
FBCD46
FBCD43

4

2

1

FBC_CMD19

J7
K7
K9

BA0
BA1
BA2

D7
C3
C8
C2
A7
A2
B8
A3

+1.5VS_VGA

1

2

M2
N8
M3

FBCD36
FBCD32
FBCD34
FBCD35
FBCD39
FBCD38
FBCD33
FBCD37

2

R7713

FBC_CMD12
FBC_CMD27
FBC_CMD26

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
NC1
NC2

E3
F7
F2
F8
H3
H8
G2
H7

1

FBC_CLK1
FBC_CLK1#

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

ZQ

E1
M1
P1
T1
J2
B3
G8
J8
A9
M9
P9
T9

C7722
1UF/6.3V
10%
/DGPU

U7704
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

2

place near VRAM

FBC_CMD9
FBC_CMD11
FBC_CMD8
FBC_CMD25
FBC_CMD10
FBC_CMD24
FBC_CMD22
FBC_CMD7
FBC_CMD21
FBC_CMD6
FBC_CMD29
FBC_CMD23
FBC_CMD28
FBC_CMD20
FBC_CMD4
FBC_CMD14

VREFCA
VREFDQ

1

1
R7708
1KOhm 1%
/DGPU
2

1
2

B

C7714
0.01UF/16V
10%
/DGPU

M8
H1

RESET#

VSS3
VSS7
VSS9
VSS11
VSS5
VSS2
VSS4
VSS6
VSS1
VSS8
VSS10
VSS12

C7721
1UF/6.3V
10%
/DGPU

C7719
0.1UF/10V
10%
/DGPU

*BOT SIDE*

U7703
FBC_VREF_CA1
FBC_VREF_DQ1

DQSL#
DQSU#

C7720
1UF/6.3V
10%
/DGPU

C7718
0.1UF/10V
10%
/DGPU

BGA_96P_524x354_COLY
/DGPU

*TOP SIDE*
R7710
1 1KOhm 2
1%
/DGPU

DML
DMU

/DGPU

BGA_96P_524x354_COLY
/DGPU

+1.5VS_VGA

DQSL
DQSU

A1
C1
F1
D2
H2
A8
C9
E9
H9

C7717
0.1UF/10V
10%
/DGPU

1

F3
C7

VDDQ1
VDDQ3
VDDQ7
VDDQ5
VDDQ8
VDDQ2
VDDQ4
VDDQ6
VDDQ9

C7716
0.1UF/10V
10%
/DGPU

1

FBCDQS_WP3
FBCDQS_WP2

ODT
CS#
RAS#
CAS#
WE#

C7715
0.1UF/10V
10%
/DGPU

1

C7711
1UF/6.3V
10%

1

2
2
1
1

1
1

/DGPU

2

2

2
1

/DGPU

C7710
1UF/6.3V
10%

2

1
2

/DGPU

C7709
1UF/6.3V
10%

+1.5VS_VGA

1

K1
L2
J3
K3
L3

1

FBC_CMD2
FBC_CMD0
FBC_CMD30
FBC_CMD15
FBC_CMD13

/DGPU

N1
R1
B2
K2
G7
K8
D9
N9
R9

1

NC3
NC4
NC5
NC6

/DGPU

C7708
1UF/6.3V
10%

/DGPU

CK
CK#
CKE

VDD6
VDD8
VDD1
VDD4
VDD3
VDD5
VDD2
VDD7
VDD9

1

J1
L1
J9
L9

C7707
1UF/6.3V
10%

/DGPU

BA0
BA1
BA2

2

2

ZQ

1
2

R7704
243Ohm 1%
/DGPU

J7
K7
K9

C7706
1UF/6.3V
10%

D

2

L8
C

/DGPU

C7705
0.1UF/10V
10%

FBCD20
FBCD21
FBCD18
FBCD23
FBCD16
FBCD22
FBCD19
FBCD17

1

RESET#

E1
M1
P1
T1
J2
B3
G8
J8
A9
M9
P9
T9

VSS3
VSS7
VSS9
VSS11
VSS5
VSS2
VSS4
VSS6
VSS1
VSS8
VSS10
VSS12

/DGPU

C7704
0.1UF/10V
10%

D7
C3
C8
C2
A7
A2
B8
A3

3

1

T2

A1
C1
F1
D2
H2
A8
C9
E9
H9

VDDQ1
VDDQ3
VDDQ7
VDDQ5
VDDQ8
VDDQ2
VDDQ4
VDDQ6
VDDQ9

C7703
0.1UF/10V
10%

FBCD31
FBCD24
FBCD29
FBCD30
FBCD27
FBCD28
FBCD26
FBCD25

2

DQSL#
DQSU#

FBC_CLK0
FBC_CLK0#
FBC_CMD3

+1.5VS_VGA
C7702
0.1UF/10V
10%

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

E3
F7
F2
F8
H3
H8
G2
H7

2

FBC_CMD5

DML
DMU

M2
N8
M3

/DGPU

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
NC1
NC2

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

1

E7
D3
G3
B7

FBC_CMD12
FBC_CMD27
FBC_CMD26

R7714
1KOhm 1%

VREFCA
VREFDQ

2

FBCDQM0
FBCDQM1
FBCDQS_RN0
FBCDQS_RN1

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

1

N12P-GV1 162ohm
N12M-GE 243ohm(1022-0101400)

DQSL
DQSU

FBC_CMD9
FBC_CMD11
FBC_CMD8
FBC_CMD25
FBC_CMD10
FBC_CMD24
FBC_CMD22
FBC_CMD7
FBC_CMD21
FBC_CMD6
FBC_CMD29
FBC_CMD23
FBC_CMD28
FBC_CMD20
FBC_CMD4
FBC_CMD14

2

place near VRAM

F3
C7

N1
R1
B2
K2
G7
K8
D9
N9
R9

VDD6
VDD8
VDD1
VDD4
VDD3
VDD5
VDD2
VDD7
VDD9

2

FBCDQS_WP0
FBCDQS_WP1

M8
H1

1

1

162Ohm
/DGPU

ODT
CS#
RAS#
CAS#
WE#

C7713
0.01UF/16V
10%

place near VRAM

2

K1
L2
J3
K3
L3

1

FBC_VREF_CA0
FBC_VREF_DQ0

/DGPU
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

2

2

2
1%

/DGPU

1

FBC_CMD2
FBC_CMD0
FBC_CMD30
FBC_CMD15
FBC_CMD13

R7703

CK
CK#
CKE

FBCD8
FBCD12
FBCD11
FBCD15
FBCD9
FBCD14
FBCD10
FBCD13

0

1

FBC_CMD3

J7
K7
K9

FBC_CLK0
FBC_CLK0#

BA0
BA1
BA2

D7
C3
C8
C2
A7
A2
B8
A3

R7712
1 1KOhm

+1.5VS_VGA

2

M2
N8
M3

/DGPU

place near VRAM

D

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
NC1
NC2

FBCD3
FBCD0
FBCD2
FBCD4
FBCD6
FBCD7
FBCD1
FBCD5

2

FBC_CMD12
FBC_CMD27
FBC_CMD26

/DGPU

E3
F7
F2
F8
H3
H8
G2
H7

1

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

U7702
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

2

FBC_CMD9
FBC_CMD11
FBC_CMD8
FBC_CMD25
FBC_CMD10
FBC_CMD24
FBC_CMD22
FBC_CMD7
FBC_CMD21
FBC_CMD6
FBC_CMD29
FBC_CMD23
FBC_CMD28
FBC_CMD20
FBC_CMD4
FBC_CMD14

VREFCA
VREFDQ

1

1

M8
H1

R7702
1KOhm 1%
2

2

C7701
0.01UF/16V
10%

FBC_VREF_CA0
FBC_VREF_DQ0

1

*BOT SIDE*

U7701

1

+1.5VS_VGA

R7701
1 1KOhm 2
/DGPU 1%

2

FBCD[0..63]
FBC_CMD[0..31]
FBCDQM[0..7]
FBCDQS_WP[0..7]
FBCDQS_RN[0..7]

1

VRAM CH C

3

71
71
71
71
71

2

Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
1.0
Sheet
1

77

of

93

5

4

3

2

1

D

D

C

C

B

B

A

A

Title : Connector, LED
Engineer:

PEGATRON COMPUTER INC
Size
C
Date:
5

4

3

2

Project Name

Joyoung_Chianhg

MA50

Rev
1.0



P/N
Monday, February 13, 2012

Sheet
1

78

of

93

5

4

3

2

1

D

D

C

C

B

B

A

A

Title : GPU PWR/GND
Engineer:

PEGATRON COMPUTER INC
Size
C
Date:
5

4

3

2

Project Name

Joyoung_Chianhg

MA50

Rev
1.0



P/N
Monday, February 13, 2012

Sheet
1

79

of

93

5

4

3

2

1

+VCORE & +VGFX POWER SUPPLY

Huron River

1

93 CPU_VRON_PWR

30

SR8002 @
R0402
1
2

CPU_VRON

C8046 @
0.047UF/16V
vx_c0402_small
10%

2

D

D

Input Current:4A
1
2

1
2

1
2

1
2

1

1
2

1
2
1
2
1
2

1

1

2

2

1
2
1
2
1

1
2
1
2

C8049
1500PF/50V
vx_c0603_small
10%

VGFX / ULV_GT2
1.23V
IccMax = 33A
IccTDC = 21.5A
Load Line = -3.9mV/A

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12

3

4
1

2

IccTDC = 25A

1

Load Line = -2.9mV/A
E1
E2
E3
E4
G1
G2
G3
G4
J1
J2
J3
J4

R8034
2.2Ohm
vx_r0603_h28_small
5%
C8047
1500PF/50V
vx_c0603_small
10%

1

B

1

1

1

T8010
T8026
T8036
T8012
T8039
TPC28T TPC28T TPC28T TPC28T TPC28T

1

1

1

T8005
T8008
T8004
T8031
T8022
TPC28T TPC28T TPC28T TPC28T TPC28T
+VCORE

1

1

T8009
T8025
T8006
T8028
T8027
TPC28T TPC28T TPC28T TPC28T TPC28T

C8042
22UF/6.3V
vx_c0805_h57_small
20%

1

C8041
22UF/6.3V
vx_c0805_h57_small
20%

1

1
C8040
22UF/6.3V
vx_c0805_h57_small
20%

1

T8014
T8013
T8037
T8011
T8016
TPC28T TPC28T TPC28T TPC28T TPC28T

1

VDDH1
VDDH2
VDDH3
VDDH4

IccDyn = 28A

1

1

1

1

1

T8007
T8034
T8019
T8003
T8023
TPC28T TPC28T TPC28T TPC28T TPC28T

2
R8002 @
100Ohm
vx_r0402_small
1%

T8002
T8024
T8000
T8035
T8032
TPC28T TPC28T TPC28T TPC28T TPC28T

2

1
2

1

1

R8057 @
100Ohm
vx_r0402_small
1%

C8034
22UF/6.3V
vx_c0805_h57_small
20%

C8045
22UF/6.3V
vx_c0805_h57_small
20%

1

1

1
1

1

A

1

C8032
22UF/6.3V
vx_c0805_h57_small
20%

1

C8022
22UF/6.3V
vx_c0805_h57_small
20%

1

R8007
100Ohm
vx_r0402_small
1%

1

VO2_2

T8042
T8001
T8038
T8040
TPC28T TPC28T TPC28T TPC28T

+VGFX_CORE

1

R8010 @
10Ohm
vx_r0603_h28_small
1%

T8015
T8041
T8017
T8029
TPC28T TPC28T TPC28T TPC28T
+VGFX_CORE

2

1

Vi2_2

7

1

VCCGT_SENSE

1

1
VGFX_SENSE_P

VGFX
REQUIRE:22UF*23PCS
EE:22uF*6pcs/10uF*6/1uF*11
POWER:22uF*4

1

VSSGT_SENSE 7

1

R8032
C8037
3.24KOhm
0.01UF/25V
vx_r0402_small vx_c0402_small
1%
10%
1
2
2
1 Vo3_2

VGFX_SENSE_N

2

R8020
665Ohm
vx_r0402_small
1%
1
2 Vi3_2_IMON_GFX

R8018
1KOhm
vx_r0402_small
1%
IPH2_1
2

1

1

A

2
R8046 @
10Ohm
vx_r0603_h28_small
1%



For IFDIM

Title : POWER_VCORE&VGFX
Engineer:
Size

Date:
4

3

2

Clark Liang

Project Name

Rev

MA50

Custom
5

C

IccDyn = 20.2A

IccMax = 33A

1

VDD
ISENSE
PWM
BST

L8000
50nH
Irat=32A

1

1
2

1

C8039
22UF/6.3V
vx_c0805_h57_small
20%

2

R8051
665Ohm
vx_r0402_small
1%
2

1

C8038
22UF/6.3V
vx_c0805_h57_small
20%

+VGFX_CORE

DCR = 1.7mOhm
R8036
2.2Ohm
vx_r0603_h28_small
5%

For IFDIM

R8045 @
C8002 @
10Ohm
10PF/50V
vx_r0402_small vx_c0402_small
1%
5%
2
1
2

R8011
8.06KOhm
vx_r0402_small
1%
1
2
1

1
R8048 @
100Ohm
vx_r0402_small
1%

R8006
100Ohm
vx_r0402_small
1%

E1
E2
E3
E4
G1
G2
G3
G4
J1
J2
J3
J4

Vcore / ULV

1

B1
B2
B3
B4

+VCORE

2

R8009 @
100Ohm
vx_r0402_small
1%

VDDH1
VDDH2
VDDH3
VDDH4

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12

0.9V

BST2
C8007
0.22UF/6.3V
vx_c0402_small
10%
VX2

2

1

VERR2

R8016
10KOhm
vx_r0402_small
1%
1
2

C1
C2
C3
C4

VDD
ISENSE
PWM
BST

BST2_1
C8027
0.22UF/6.3V
L8001
vx_c0402_small 0.1UH
10%
Irat=32.5A
1
2

+VCORE

D1
D2
D3
D4
F1
F2
F3
F4
H1
H2
H3
H4

Vcore
REQUIRE:22UF*20PCS
EE:22uF*12pcs+2.2uF*16pcs
POWER:22uF*5PCS
1

1

C8035
22PF/50V
vx_c0402_small
5%
2
1

1

1

GND_1323S2

C1
C2
C3
C4

6

2

R8003
C8043
30.1KOhm
1000PF/50V
vx_r0402_small vx_c0402_small
1%
10%
1
2
2
1

VX1
VX2
VX3
VX4
VX5
VX6
VX7
VX8
VX9
VX10
VX11
VX12

1

VCCSENSE

B1
B2
B3
B4

D1
D2
D3
D4
F1
F2
F3
F4
H1
H2
H3
H4

C8026
10UF/6.3V
vx_c0805_h57_small
10%

U8003
VT1323SFCR

1

VSSSENSE 6

VCORE_SENSE_P

2

IPH2_1
PWM2_1
BST2_1

C8006
10UF/6.3V
vx_c0805_h57_small
10%

U8002
VT1323SFCR

Vo2_1
C8033
22PF/50V
vx_c0402_small
5%
2
1

TS_FAULT#
GND
VCC

2

A1
A2
A4

GND_1323S2

VCORE_SENSE_N

VX1
VX2
VX3
VX4
VX5
VX6
VX7
VX8
VX9
VX10
VX11
VX12

C8025
22UF/6.3V
vx_c0805_h57_small
20%

1

TSFAULT#1

IPH1_2
PWM1_2
BST2

C8008
0.1UF/25V
vx_c0402_small
10%
JP8003 @
SHORT_PIN
1
2

TS_FAULT#
GND
VCC

GND_1323S3

C8028
0.1UF/25V
vx_c0402_small
10%
JP8000 @
SHORT_PIN
1
2

1

U8000B
VT1318MFQR

R8027
C8036
1.33KOhm
0.047UF/16V
vx_r0402_small vx_c0402_small
1%
10%
1
2
2
1 Vo3_1

Vi2_1

C8048
1500PF/50V
vx_c0603_small
10%

C8005
22UF/6.3V
vx_c0805_h57_small
20%

A1
A2
A4

C8030
22UF/6.3V
vx_c0805_h57_small
20%

VX1

2

GND1
GND2
GND3
GND4

2

R8021
845Ohm
vx_r0402_small
1%
1
2 Vi3_1_IMON_CORE

R8054
10Ohm
vx_r0603_h28_small
1%
T8021
TPC28T

2

R8008
665Ohm
vx_r0402_small
1%
2

C8010
22UF/6.3V
vx_c0805_h57_small
20%

1

50
51
52
53

JP8001 @
SHORT_PIN
2

1

R8001
13.3KOHM
vx_r0603_h24_small
1%
1
2
1

TSFAULT#2

C8029
1UF/10V
vx_c0402_small
10%

2

VERR1

R8029
10KOhm
vx_r0402_small
1%
1
2

C8024
4.7UF/6.3V
vx_c0402_h24_small
MLCC/+/-20%

GND_1323S3

2

R8047
10Ohm
vx_r0603_h28_small
T8020
1%
TPC28T

C8009
1UF/10V
vx_c0402_small
10%

2

1
2
1

C8004
4.7UF/6.3V
vx_c0402_h24_small
MLCC/+/-20%

+VGFX_CORE

R8031
499Ohm
vx_r0402_small
1%
IPH1_1
1
2

R8035
2.2Ohm
vx_r0603_h28_small
5%

2

2

R8026
1.96KOhm
vx_r0402_small
1%
C8044
10PF/50V
vx_c0402_small
5%

VCORE_A_GND

R8000
499Ohm
vx_r0402_small
1%
IPH1_2
1
2

C8014
22PF/50V
vx_c0402_small
5%
1
2
R8050 @
C8015 @
10Ohm
10PF/50V
vx_r0402_small vx_c0402_small
1%
5%
1
2
1
2

1

1

2
1

+1.8VS

2

1

1

2
1

2

1

2

1

2

1

SR8000 @
R0402
1
2 TSFAULT#2

B

C8013
22PF/50V
vx_c0402_small
5%
2
1
R8023
C8023
43.2KOHM
220PF/50V
vx_r0402_small vx_c0402_small
1%
10%
1
2
2
1

E1
E2
E3
E4
G1
G2
G3
G4
J1
J2
J3
J4

1

R8053
56.2KOHM
vx_r0402_small
1%
2

1

BST1
C8016
0.22UF/6.3V
vx_c0402_small
10%
VX1

U8001
VT1323SFCR

VGFX_SENSE_P

+VCORE

+1.8VS

2

MRAMP2 1

2

1

R8052
52.3KOhm
vx_r0402_small
1%
MRAMP1 1
2

VDDH1
VDDH2
VDDH3
VDDH4

1

VCORE_SENSE_N

R8014
15.4KOHM
vx_r0402_small
1%

C1
C2
C3
C4

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12

2

C8019
10PF/50V
vx_c0402_small
5%

VGFX_SENSE_N

2 IPH2_1

1

IPH1_1
PWM1_1
BST1

C8017
0.1UF/25V
vx_c0402_small
10%
JP8002 @
SHORT_PIN
1
2

VDD
ISENSE
PWM
BST

D1
D2
D3
D4
F1
F2
F3
F4
H1
H2
H3
H4

Input Current:4A

R8033 @
0Ohm
vx_r0402_small
2

MRAMP2

B1
B2
B3
B4

1

1
R8013
13.3KOHM
U8000A
vx_r0603_h24_small
VT1318MFQR
1%
VCORE_SENSE_P

1

VX1
VX2
VX3
VX4
VX5
VX6
VX7
VX8
VX9
VX10
VX11
VX12

1

1

C8021
10PF/50V
vx_c0402_small
5%

2

2

1

2

R8028
1.96KOhm
vx_r0402_small
1%

PWM2_2
PWM2_1

TS_FAULT#
GND
VCC

GND_1323S1

R8025
402Ohm
vx_r0402_h15_small
1%

2

MRAMP1

1
R8030
1.96KOhm
vx_r0402_small
1%

2

2

1

IPH1_1

R8043
10Ohm
vx_r0603_h28_small
1%
T8018
TPC28T

GND_1323S1

1

VIN_UVLO
PWM1_3
PWM1_2
PWM1_1
2

36
35
34
33
32
31
30
29
28
27
26
25

R8022
191Ohm
vx_r0402_small
1%

2

@1

R_SEL[2]
R_SEL[3]
R_REF
IPH2_2
R_SEL[5]
PWM2_2
PWM2_1
TS_FAULT#2
IPH2_1
MRAMP2
SENSE2+
SENSE2-

1

SR8001
R0402

VDD3
VDD_1
VDD_2
VIN_UVLO
PWM1_3
PWM1_2
PWM1_1
TS_FAULT#1
IPH1_3
IPH1_2
IPH1_1
MRAMP1

2

TSFAULT#1

1
2
3
4
5
6
7
8
9
10
11
12

R8017
20KOhm
vx_r0402_small
1%

R8024
133Ohm
vx_r0402_small
1%

1

VCORE_A_GND
IPH1_2

+5VO

A1
A2
A4

2

2

2
2

2
1
ALERT
VDIO
VCLK
VR_ON
ROSC 1

R8005
196Ohm
vx_r0402_small
1%

2

+1.8VS

GND
R_SEL[6]
VR_READY2
VR_READY1
VR_TT#
R_SEL[4]
ALERT#
VDIO
VCLK
VR_ENABLE
R_OSC
R_SEL[0]
R_SEL[1]

SR8004 @
R0402
1
2

SENSE1+
SENSE1A_ERR1
A2_IN1
A2_OUT1
A3_IN1
A3_OUT1
A3_OUT2
A3_IN2
A2_OUT2
A2_IN2
A_ERR2

C8003
0.1UF/25V
vx_c0402_small
10%

13
14
15
16
17
18
19
20
21
22
23
24

1
2

R8049
100KOhm
vx_r0402_small
1%

VERR1
Vi2_1
Vo2_1
Vi3_1_IMON_CORE
Vo3_1
Vo3_2
Vi3_2_IMON_GFX
Vo2_2
Vi2_2
VERR2

2

C

R8019
75KOhm
vx_r0402_small
1%

49
48
47
46
45
44
43
42
41
40
39
38
37

C8000
0.1UF/25V
vx_c0402_small
10%

1

1

R8015
196Ohm
vx_r0402_small
R8041
1%
10Ohm
vx_r0603_h28_smallR8004
1%
21.5Ohm
vx_r0402_small
1%
1
2

PG2
PG1
VR_TT

1
VCORE_A_GND

2

1
R8044
845KOhm
vx_r0402_small
1%

2

需需需需866K料料

C8031
10UF/6.3V
vx_c0603_small
20%
2
1

1

2

1

+5VS

R8055
620Ohm
vx_r0402_small
1%
R8012
T8030
374OHM
TPC28T
vx_r0603_h24_small
1%

1

T8033
TPC28T

+3VS
+1.8VS

2

R8056
620Ohm
vx_r0402_small
1%

ATS short to GND , VGFX Boot voltage = 1.0V

C8012
10UF/6.3V
vx_c0805_h57_small
10%

Input Current:4A
TSFAULT#1

1

92 VGFX_PWRGD

C8001
4.7UF/6.3V
vx_c0402_h24_small
MLCC/+/-20%

C8011
22UF/6.3V
vx_c0805_h57_small
20%

1

ATS short to GND , Vcore Boot voltage = 1.0V

C8020
22UF/6.3V
vx_c0805_h57_small
20%

2

R_OSC set Vcore FREQ = 0.75 e5 / R_OSC

30,92 VRM_PWRGD

C8018
1UF/10V
vx_c0402_small
10%

2

1
2
1

SR8003 @
R0402
2

1

VR_HOT#

2

4

+1.8VS

1

+5VO
6 VR_SVID_CLK
6 VR_SVID_DATA
6 VR_SVID_ALERT#

Monday, February 13, 2012
1

Sheet

1.0
80

of

94

5

4

3

2

1

+5VO & +3VO POWER SUPPLY
D

D

T8121
TPC26T

+5VAO
(1.6A)
1
CE8103
15UF/25V
20%

C8119
1000PF/50V
vx_c0603_small
10%

5

+

2

1
C8105
0.1UF/25V
vx_c0402_small
10%

2

1

C8103
1UF/25V
vx_c0603_small
10%

2

C8101
1000PF/50V
vx_c0603_small
10%

2

1
CE8104
15UF/25V
20%

2

+

2

1

AC_BAT_SYS

1

(6A)

AC_BAT_SYS

1

JP8106 @
1MM_OPEN_M1M2
1
2
1 2

+5VA

3V_LG

2

1 1

1
2

1
1

C8106
0.1UF/25V
vx_c0603_small
10%

1

1

1

1

1

1

1

1

1

1

1

1
1

1

1

1
1
1

1

1

1

1

+12VSUS

1

T8102
T8104
T8119
T8117
TPC26T TPC26T TPC26T TPC26T
1

T8131
T8107
T8134
TPC26T TPC26T TPC26T

1

JP8105 @
1MM_OPEN_M1M2
2
1 2

1

+12VO 1

1

1
2

T8112
TPC26T

2

T8103
T8128
T8110
T8123
TPC26T TPC26T TPC26T TPC26T

T8130
T8109
T8122
T8125
TPC26T TPC26T TPC26T TPC26T

1

1
1

T8129
T8133
T8101
T8100
TPC26T TPC26T TPC26T TPC26T
+3VO

C8111
0.1UF/25V
vx_c0603_small
10%

1

D8106
1.2V/0.1A
2

+5VO

T8105
T8115
TPC26T TPC26T

1 1

1

+3VA

+3VSUS

1

20mil

T8106
T8118
T8114
T8135
TPC26T TPC26T TPC26T TPC26T

T8138
T8137
TPC26T TPC26T

+10VO

C8114
0.1UF/25V
vx_c0603_small
10%

D8100
1V/0.2A

+5VO
C8104 @
0.1UF/25V
vx_c0603_small
10%

T8108
TPC26T

20mil

D8107
1.2V/0.1A
1

2

2 1
1 1

1 1
2

1
2

C8102
0.1UF/25V
vx_c0603_small
10%

1

VCLK

2

2

3

1

4
10
5

6

7

1

20mil
2

2

2
1
2

11.41V-14.39V

IOAC_@

2

C8130
0.1UF/25V
vx_c0402_small
10%

2

15
14
13
12
11

2
IOAC_EN

+5VA
1

+5VO_1_1 3

SR8103 @
nb_r0402_short_5mil_small

R8111
470KOhm
vx_r0402_small
5%

D8105
1.2V/0.1A
VSUS_ON_EN 1
2

@

1
2

1

R8126
1KOhm
vx_r0402_small
1%

2

R8136
470KOhm
vx_r0402_small
5%

B

T8113
T8124
TPC26T TPC26T

T8116
TPC26T

D8102
1V/0.2A

1
30,53

+3VO:3.3V( Max:3.39;Min:3.271)

C8110
1UF/25V
vx_c0603_small
10%

T8136
TPC26T

2

1

32,92 FORCE_OFF#

C

Frequency:350KHz

+5VO_2_2 3

VSUS_ON_EN

0,57,91,93 VSUS_ON
A

Q8106B
UM6K1N
IOAC_@

C8117 @
0.1UF/25V
vx_c0402_small
10%

3V_FB2_2

2

D8108 @
1.2V/0.1A

SR8102 @
nb_r0402_short_5mil_small

C8129
1000PF/50V
vx_c0402_small
10% IOAC_@

CE8100
100UF/6.3V
20%

T8120
TPC26T

D8103
1.2V/0.1A
1
2
C8122 @
0.1UF/25V
vx_c0402_small
10%

+

1

1

4

2

Q8106A
UM6K1N
IOAC_@

C8126
0.1UF/25V
vx_c0603_small
10% IOAC_@

2

1

6
3

1

2

5

FORCE_OFF#

2

1

G

1
2

R8135
100KOhm
IOAC_@
1
2

DCR = 25.4mOhm
R8103
2.2Ohm
vx_r0603_h28_small
5%
C8121
1500PF/50V
vx_c0603_small
10%

+3VO

(5A)

JP8104 @
SHORT_PIN

R8100
6.65KOHM
vx_r0402_small
1%

R8101
10KOhm
vx_r0402_small
1%

(OCP:5.6A)
2

2

C8115 @
39PF/50V
vx_c0402_small
5%
2
1

1

D8104
1.2V/0.1A
1
2

VSUS_ON_EN

+5VA

D8109
1.2V/0.1A
1

1

2

2

32,92 FORCE_OFF#

1

2

2

R8104
110KOHM
vx_r0402_small
1%

L8101
3.3UH
Irat=6.6A
1

Enable2

1

3

D

2 S

(0.7845A)

30 USBCHG_EN

1

R8131
510KOhm
vx_r0402_small
1% IOAC_@

JP8107 @
1MM_OPEN_M1M2
2 1 1

Enable1

Q8108
IRFML8244TRPBF
IOAC_@

SUS_PWRGD 30,92

2

2
1

R8137
0Ohm
vx_r0603_h28_small
nonIOAC_@
1
2

R8130
86.6KOhm
vx_r0402_small
1% IOAC_@

2

1

R8102
10KOhm
vx_r0402_small
1%

2

(0.07A) +3VA

+3VSUS

U8100A
TPS51225CRUKR

FB2

Frequency:300KHz

+3VO

DRVL1
VO1
VREG5
VIN
DRVL2
1
2
3
4
5

G

R8109
150KOhm
vx_r0402_small
1%

R8107
15KOhm
vx_r0402_small
1%

(Typ:5.00V;Max:5.111V;Min:4.891V)

AC_BAT_SYS

9
8

5

8
7
6
D 5
S

5V_FB1_1

B

T8111
TPC26T

1
2
3
4

2

C8118
39PF/50V
vx_c0402_small
@ 5%
1
2 FB1

22
23

U8100B
TPS51225CRUKR

1

SR8100 @
nb_r0603_short_32mil_small
C8113
0.1UF/25V
vx_c0603_small
10%

Enable2

CS1
VFB1
VREG3
VFB2
CS2

2 1
1 1

2

2

2

1

1

1
2

1
2

1
2

1
GND1
GND2

3V_HG
BOOT2_2 2
3V_DX

S2

Q8107
FDMC7696
Rdson 14.5mOhm(4.5V)

2

S2

JP8103@
SHORT_PIN

C8108
1500PF/50V
vx_c0603_small
10%

1

Q2

JP8101@
SHORT_PIN

R8105
2.2Ohm
vx_r0603_h28_small
5%

BOOT2

D1
D1

CE8101
100UF/6.3V
20%

10
9
8
7
6

S2

DCR = 11.8mOhm
+

DRVH2
VBST2
SW2
PGOOD
EN2

D1

CE8102
100UF/6.3V
20%

DRVH1
VBST1
SW1
VCLK
EN1
GND

G2
D2/S1

+

2

Q8105
FDMC7200
Q2 Rdson 20mOhm(4.5V)

Q1

C

C8120 @
0.1UF/25V
vx_c0402_small
10%

1

D1

+5VO

T8127
TPC26T

G1

L8100
3.3UH
Irat=10A

(OCP:12.7A)
(12.5A)

1
2
3
4

G

S

8
7
6
D 5

5V_LG
Q8104
FDMC8884
Rdson 30mOhm(4.5V)
C8109
0.1UF/25V
vx_c0603_small
10%
SR8101 @
5V_HG nb_r0603_short_32mil_small16
BOOT1 17
2
1BOOT1_1 1
2
5V_DX
18
VCLK
19
Enable1
20
21

A

R8112
1MOhm
vx_r0402_small
5%



Title :
Engineer:
Size

Rev

Date: Monday, February 13, 2012
4

3

2

Clark Liang

MA50

Custom
5

POWER_SYSTEM

Project Name
Sheet
1

1.0
81

of

94

5

4

3

2

1

+1.05VO POWER SUPPLY

D

11/07/21
+1.05VS & +VCCP
REQUIRE:22UF*18PCS
EE:10UF*10PCS/1uF*26
PWR:22UF*3PCS

Input Current 2.8A
+5VO

+1.05VO

1

2

+1.05VS (4.2A)
+VCCP(5.9A)

JP8201@
3MM_OPEN_5MIL
1 1 2 2

C8202
22UF/6.3V
vx_c0805_h57_small
20%

C

1

1
2

1
2

1
1

C8203
22UF/6.3V
vx_c0805_h57_small
20%

+

JP8204@
3MM_OPEN_5MIL

CE8200
100UF/6.3V

0804 should change to 220uF

JP8205 @
SHORT_PIN

1
JP8203@
SHORT_PIN VCCP_AGND

+VCCP_VSENSE+

2

1

R8204
2.74KOhm
vx_r0402_small
1%

1
R8206
6.81KOhm
vx_r0402_small
0.01

2

+VCCP_SENSE 6

R8203
10Ohm
vx_r0402_small
1%
JP8202 @
SHORT_PIN

1

2

2


Where VREF = 0.75V

C8200
0.1UF/25V
vx_c0402_small
10%

C8205
22UF/6.3V
vx_c0805_h57_small
20%

2

GND

Ferq = 880KHz

VOUT=VREF (1+Rfb1/Rfb2)

C8208
1500PF/50V
vx_c0603_small
10%

2

R8208
C8207
150Ohm
3300PF/50V
vx_r0402_small
vx_c0402_small 1%
10%

2

+VCCP_LEAD 1

2

B1
C1

SENSE+_1_VCCP

(MAX 10.86A)

2

1

JP8200@
3MM_OPEN_5MIL
1 1 2 2

1

A3

1 1

A2

R8207
10KOhm
vx_r0402_small
1%

1

(OCP:15A)

DCR = 2.8mOhm
R8205
2.2Ohm
vx_r0603_h28_small
5%

1 2

SENSE+
+VCCP_OE
A5 OE
SENSEC8204
0.1UF/25V
A1 AGND
GND1
vx_c0402_small
GND2
10%
VCCP_AGND
U8200
VCCP_AGND
VT386FCR-ADJ

STAT

R8200 @
18.2KOHM
vx_r0402_small
1%

2

SUSB#_PW R

A4

1

83,84,85,91,93

1

D8200
1.2V/0.1A
1
2

1

2

2

C

+VCCP_VX
1

B2
B3
B4
C2
C3
C4

2

VX1
VX2
VX3
VX4
VX5
VX6

VDD1
VDD2

2

B5
C5

1

L8200
0.22UH
Irat=23A

2

T8227
TPC26T

4,92 +1.05VS_PW RGD

Check if meet or not

C8209
0.1UF/25V
vx_c0402_small
10%

2

1

C8206
4.7UF/10V
vx_c0603_small
10%

2

1

C8201
22UF/6.3V
vx_c0805_h57_small
20%

2

1

C8210 @
22UF/6.3V
vx_c0805_h57_small
20%

2

2

1

+VCCP_VDD_

2

D

+VCCP_VSENSE-

1

Fsw=VOUT/(Nsw* KON)
Nsw = an integer of 3 (VT384/VT386) or 4 (VT387)
KON = a constant with a value of 400nsV

2

+VSSP_SENSE 6

R8202
10Ohm
vx_r0402_small
1%

B

B

1

1

1

1

1

1

T8226
T8221
T8230
T8209
TPC26T TPC26T TPC26T TPC26T
1

+VCCP

1

1

+1.05VO

1

T8224
T8211
T8212
TPC26T TPC26T TPC26T

GND

1

1

1

1

1

1

1

1

T8222
T8220
T8218
T8214
T8223
T8216
T8225
T8210
T8217
T8229
T8219
TPC26T TPC26T TPC26T TPC26T TPC26T TPC26T TPC26T TPC26T TPC26T TPC26T TPC26T

1

1

1

+1.05VS

1

T8213
T8231
T8215
T8228
TPC26T TPC26T TPC26T TPC26T

A

A



Title :
Engineer:
Size

5

4

3

2

Clark Liang

Project Name

Rev

MA50

Custom
Date:

POWER_+VCCP

Sheet

Monday, February 13, 2012
1

1.0
82

of

94

A

B

C

D

E

+1.5VO POWER SUPPLY
11/07/21
+1.5VO
REQUIRE:22UF*6PCS
EE:10UF*8PCS/1uF*10PCS
PWR:22UF*3PCS

1

C8306
0.1UF/25V
vx_c0402_small
10%
T8320
TPC26T

+1.5V

(9.22A)

JP8305 @
3MM_OPEN_5MIL
C8312
22UF/6.3V
vx_c0805_h57_small
20%

2

1

1

1

1

1

T8300
T8303
T8308
T8312
T8311
T8321
TPC26T TPC26T TPC26T TPC26T TPC26T TPC26T
+1.5V

1

GND

1

+DDR_VSENSE+

2
R8309
4.02KOhm
vx_r0402_small
1%

1
+1.5VO

1

+DDR_VSENSE-

1

T8306
T8319
T8313
TPC26T TPC26T TPC26T

1

1
2

R8305
4.02KOhm
vx_r0402_small
1%

1

1 2

1
1

1

1

T8322
T8310
T8307
T8325
T8318
T8323
T8302
T8316
TPC26T TPC26T TPC26T TPC26T TPC26T TPC26T TPC26T TPC26T

JP8301 @
SHORT_PIN

VOUT=VREF (1+Rfb1/Rfb2)
Where VREF = 0.75V

Fsw=VOUT/(Nsw* KON)
Nsw = an integer of 3 (VT385) or 4 (VT388)
KON = a constant with a value of 400nsV

2

JP8304 @
3MM_OPEN_5MIL
2 2 1 1

2

1

Ferq = 940 KHz

1

GND1
GND2

JP8303 @
SHORT_PIN

1

DDR_AGND

AGND

U8300
VT387FCR-ADJ

C8316
0.1UF/25V
vx_c0402_small
10%

1

A1

C8301
1500PF/50V
vx_c0603_small
10%

1

1

JP8300 @
SHORT_PIN DDR_AGND

1

1

B1
C1

C8305
C8317
4.7NF/50V
vx_c0603_h35_small
3300PF/50V
vx_c0402_small MLCC/+/-5%
10%

2

C8309
22UF/6.3V
vx_c0805_h57_small
20%

1

+DDR_RAMP

1

SENSE+_2_DDR

A3

2

A2

SENSE-

OE

C8310
22UF/6.3V
vx_c0805_h57_small
20%

1

2

A5

2

DCR = 3.9mOhm
R8307
2.2Ohm
vx_r0603_h28_small
5%

2

C8302
0.047UF/16V
vx_c0402_small
10%

2

1

2

1

+DDR_OE

R8306
39KOhm
vx_r0402_small
1%

2

91,93 SUSC#_PW R

STAT

2

A4

2

1

D8302
1.2V/0.1A
1
2

1

2

R8308
18.2KOHM
vx_r0402_small
1%

1

+1.5VO

max = 6.62A

1

1

SENSE+

92 DDR_PW RGD

(OCP:12A)

L8300
0.33UH
Irat=20A

2

B2
B3
B4
C2
C3
C4

1 1

VX1
VX2
VX3
VX4
VX5
VX6

VDD1
VDD2

2

B5
C5

+DDR_VX

2

1

C8315
4.7UF/10V
vx_c0603_small
10%

2

1

C8308
22UF/6.3V
vx_c0805_h57_small
20%

2

1
2

1
2

C8304
22UF/6.3V
vx_c0805_h57_small
20%

+5VO

2

Input Current 2.26A

+DDR_VDD

3

3

+0.75VS POWER SUPPLY

4

C8311
0.047UF/16V
vx_c0402_small
10%

R8302
470KOhm
vx_r0402_small
5%

+0.75VS

2

2

1

SUSB#_PW R 82,84,85,91,93

1

D8300 @
1.2V/0.1A
1

1

2

1

2

T8309
T8324
T8317
TPC26T TPC26T TPC26T

SR8300 @
nb_r0402_short
1 SUSC#_PW R

1

S3

0V75_VTTREF

2
R8303 @
0Ohm
vx_r0603_h28_small

1

1
2

2
C8307
0.1UF/25V
vx_c0402_small
10%

1

EE

C8314
10UF/6.3V
vx_c0603_small
20%

2

1

+V_SM_VREF

+0.75VO

1

2
7

1

U8301
TPS51206DSQR

2

JP8302 @
1MM_OPEN_M1M2

T8304
T8301
T8314
TPC28T TPC28T TPC28T

1

2

SUSC#_PW R

R8300
39KOhm
vx_r0402_small
1%

T8305
T8326
T8315
TPC28T TPC28T TPC28T

1

1

11
10
9
8
7
6

2

1

1

+0.75VS

GND2
VDDQSNS
VDD
VLDOIN
S5
VTT
GND1
PGND
S3
VTTSNS VTTREF

1

+0.75VO
(0.8A)

1
2
3
4
5

C8313
10UF/6.3V
vx_c0603_small
20%

2

2

(0.8A) +1.5VO

1

4

C8303 @
0.047UF/16V
vx_c0402_small
10%

1

1

S5

SR8301 @
nb_r0402_short

2

D8301 @
1.2V/0.1A
2
1

1

1

+5VO

R8301 @
0Ohm
vx_r0402_small

C8300
0.22UF/6.3V
vx_c0402_small
10%

5

5



Title :
Engineer:
Size

A

B

C

D

Clark Liang

Project Name

Custom
Date:

POWER_DDR & VTT
Rev

MA50

Monday, February 13, 2012

Sheet
E

1.0
83

of

94

A

B

C

D

E

+1.8VS POWER SUPPLY

1

2

1

1

1
1

+1.8VS
+

2

L8400
1UH
Irat=3.2A
1

JP8400 @
1MM_OPEN_M1M2
CE8400
100UF/6.3V
vx_c3528

+1.8VS_EN

1
2
3

+1.8VS_LX

2

DCR = 27mOhm

1

2

1

2

3

1

2

+3VO

EN
GND
LX

FB
PG
IN

6
5
4

+1.8VS_FB
+1.8VS_PWRGD

+1.8VS_PWRGD 92
1

(Max:1.5A)
+1.8VO

(OCP=1.8A)

2

(Input Current :1A)

U8400
SY8065ABC
R1

+1.8VO_FB1

2

2

(Max:1.8A)

R8402
1MOhm
vx_r0402_small
5%

1

C8401
JP8401 @
22UF/6.3V
SHORT_PIN
vx_c0805_h57_small
20%

3

2
R8403
267KOhm
vx_r0402_small
1%
1
2

Frequency:1.5MHz
Vout=0.6(1+(R1/R2))

C8400 @
39PF/50V
vx_c0402_small
5%

T8403
T8402
TPC26T TPC26T

C8402
10UF/6.3V
vx_c0603_small
20%

T8400
T8401
TPC26T TPC26T

1

2

C8403 @
0.1UF/25V
vx_c0402_small
10%

R2

2

2

R8400
100KOhm
vx_r0402_small
1%

1

82,83,85,91,93 SUSB#_PWR
2

1

D8400 @
1.2V/0.1A
1
2

R8401
133KOhm
vx_r0402_small
1%

1

+1.8VO

1

1

4

1

4


5

5

Title :

POWER_+1.8VS

Clark Liang

Engineer:
Size

Project Name

Custom
Date: Monday, February 13, 2012
A

B

C

D

Rev

MA50

1.0

Sheet

84
E

of

94

5

4

3

2

1

D

D

IVB VCCSA POWER SUPPLY
2

1
D8500 @
1.2V/0.1A
VCCSA_EN

+5VO

For Chief River

C8504
0.1UF/25V
SR8500 @ vx_c0603_small
R0603
10%
1
2 1
2

L

0.9V

L

H

0.85V

L

H

0.85V

H

L

0.725V

H

H

0.675V

2

+VCCSA_SEL0

C

(Max:6A)
C8515 @
22UF/6.3V
vx_c0805_h57_small
20%

1

C8513 @
22UF/6.3V
vx_c0805_h57_small
20%

C8506
1500PF/50V
vx_c0603_small
10%

1

2

2

JP8503@
3MM_OPEN_5MIL

+VCCSA
(Max:6A)

2

2

C8512
22UF/6.3V
vx_c0805_h57_small
20%

1

C8514
22UF/6.3V
vx_c0805_h57_small
20%

1

C8502
22UF/6.3V
vx_c0805_h57_small
20%

2

2

R8500
DCR = 4.2mOhm
2.2Ohm
vx_r0603_h28_small
5%

1

JP8500 @
SHORT_PIN

2

1

VCCSA_MODE 1

L8500
0.47UH
Irat=17.5A
1

2

VCCSA_SW

1

V5DRV
V5FILT
PGOOD
VID1
VID0
EN

C8501
0.22UF/6.3V
vx_c0402_small
10%
VCCSA_REF
1
2
C8508
3300PF/50V
vx_c0402_small
10%
1
2
1

12
11
10
9
8
7

U8500A
TPS51461RGER
F=1MHz

1
2
3
4
5
6

T8502
T8504
T8507
TPC28T TPC28T TPC28T
1

L

2

1

SGND_VCCSA

SGND_VCCSA

1

1

1

+VCCSA

1

T8508
T8500
T8501
TPC28T TPC28T TPC28T

0.9V

R8505
33KOHM
vx_r0402_small SGND_VCCSA
1%

2

U8500B
TPS51461RGER

B

2

1

JP8501 @
SHORT_PIN
2
1

VCCSA_VOUT

1

26
27
28
29

R8503
100Ohm
vx_r0402_small
1%
2
1

C8507
0.01UF/25V
vx_c0402_small
10%

VCCSA_SENSE 7

R8502
1Ohm
vx_r0402_small
1%

B

R8504
SGND_VCCSA
5.1KOhm
vx_r0402_small
1%

1

GND1
GND2
GND3
GND4

JP8504 @
SHORT_PIN
2
1

T8505
TPC28T
BST
SW5
SW4
SW3
SW2
SW1

1 2

1

JP8502 @
2MM_OPEN_5MIL

(Input Current :1.36A)

VCCSA

L

VCCSA_BST

GND
VREF
COMP
SLEW
VOUT
MODE

1

C8511 @
0.1UF/25V
vx_c0402_small
10%

PGND1
PGND2
PGND3
VIN1
VIN2
VIN3
GND1

VCCSA_COMP
VCCSA_SLEW

2

C8510 @
10UF/6.3V
vx_c0603_small
20%

19
20
21
22
23
24
25

2

2

+3VO

2

2

1

92 +VCCSA_PWRGD

C8500
10UF/6.3V
vx_c0603_small
20%

+VCCSA_SEL1

L

2

SP8501 @
nb_r0402_short
C8505
2.2UF/6.3V
vx_c0603_small
10%

1

7 VCCSA_SEL1

VCCSA

1

1

11

1

1

SP8500 @
nb_r0402_short
C8503
1UF/10V
vx_c0402_small
10%

2

18
17
16
15
14
13

T8503
TPC28T

R8506 @
470KOhm
vx_r0402_small
5%

2

R8506@ for colay
for Huron river and chief river .
2

C

1

7 VCCSA_SEL0

1

2

1

2

2

T8506
TPC28T

For Huron River

+VCCSA_SEL1

+VCCSA_SEL0

1

C8509
0.1UF/25V
vx_c0402_small
10%

VCCSA_V5D
VCCSA_V5F
VCCSA_PWRGD
+VCCSA_SEL1
+VCCSA_SEL0
VCCSA_EN

1

2
R8501
39KOhm
vx_r0402_small
1%

2

1

82,83,84,91,93 SUSB#_PWR

A

A



Title : POWER_+VCCSA_0.85VS
Engineer:
Size

Rev

MA50

Custom
Date:
5

4

3

2

Clark Liang

Project Name
Sheet

Monday, February 13, 2012
1

1.0
85

of

94

5

4

3

2

1

D

D

C

C

B

B



Title :

A

Engineer:
Size

4

3

Rev

MA50

Date: Monday, February 13, 2012
5

Clark Liang

Project Name

Custom
2

A

POWER_N/A

Sheet

1.0
86
1

of

94

3

2

VGA_CORE POWER SUPPLY

1

1 1KOhm

vx_r0402_small 1% @

2

1 1KOhm

vx_r0402_small 1% DSC_@

R8709

2

1 1KOhm

vx_r0402_small 1% DSC_@

2

1 1KOhm

vx_r0402_small 1% @

2

1 1KOhm

vx_r0402_small 1% @

R8710
R8711
R8712

2

1 1KOhm

vx_r0402_small 1% @

VR_VID_0

R8713

2

1 1KOhm

vx_r0402_small 1% @

VGFX VID Set

+3VS_VGA

VR_VID_0
VR_VID_1
VR_VID_2
VR_VID_3
VR_VID_4
VR_VID_5

2 Phase CCM

H

H

1 Phase DE

OCP:60A
EDP=35A

R8747
1.5KOhm
vx_r0402_small
1% DSC_@

1 1

3
2

1

1

+

CE8701
470UF/2V
DSC_@

1

3
2

1 1

CE8700
470UF/2V
DSC_@

2

2

+

JP8700 @
3MM_OPEN_5MIL
1 1 2 2

JP8707 @
SHORT_PIN
1

1

1

2

JP8702 @
3MM_OPEN_5MIL
1 2 2
JP8701 @
3MM_OPEN_5MIL
1 2 2

R8737 @
0Ohm
vx_r0402_small
1 VGA_ISEN1

1
2

C8731 @
0.1UF/25V
vx_c0402_small
10%

+

CE8702
15UF/25V
20%
DSC_@

1 1
+

B

CE8703
470UF/2V
DSC_@

C8701 @
0.1UF/25V
vx_c0603_small
10%

3
2

2

2

R8722 DSC_@
2.2Ohm
vx_r0603_h28_small
5%

JP8704 @
SHORT_PIN

JP8705 @
SHORT_PIN
1

R8718
10KOhm
C8704 DSC_@
1500PF/50V
vx_r0402_small
vx_c0603_small
1% DSC_@
VGA_ISEN1 2
10%
1

1

1
1
2

1

DCR = 1mOhm
DSC_@

2
5
4
3
2
1

Q8703 DSC_@
SIR166DP-T1-GE3
Rdson 4mOhm(4.5V)

1

1

T8703
T8711
T8704
T8708
TPC28T TPC28T TPC28T TPC28T

R8720 @
0Ohm
vx_r0402_small
2

1VGA_ISEN2

For Common BOM, Remove @
GND1GND4
GND2GND3

45
44

U8700B DSC_@
ISL62882CHRTZ-T

JP8703 @
SHORT_PIN
1
2

For UMA SKU
Remove @ and DSC_@

A

1

SGND_VGA

For DSC SKU
Remove @

T8720
T8721
T8722
T8723
TPC28T TPC28T TPC28T TPC28T



Title :

SGND_VGA

POWER_VGACORE

Engineer:
Size
Date:
4

3

2

Clark Liang

Project Name

Rev

MA50

Custom
5

C

JP8708 @
3MM_OPEN_5MIL
1 2 2

+5VS

43

1

C8714
0.1UF/25V
vx_c0402_small
10% DSC_@

JP8706 @
SHORT_PIN

+VGA_VCORE

T8705
T8713
TPC28T TPC28T

R8739
1Ohm
vx_r0402_small
VGA_VSUM- 2 1% DSC_@
1

T8716
T8717
T8718
T8719
TPC28T TPC28T TPC28T TPC28T
1

2

R8726
C8727 DSC_@
10KOhm
1500PF/50V
vx_r0402_small
vx_c0603_small
1% DSC_@
10% VGA_ISEN2 2
1

1

1
1
2
1
2

1
4
3
2
1

+5VS

R8735
1Ohm
vx_r0402_small
1% DSC_@

1

1

2

2
5
4
3
2
1

1
1
2

R8725
10KOhm
vx_r0402_h24_small
3% DSC_@

DCR = 1mOhm
DSC_@
R8717 DSC_@
2.2Ohm
vx_r0603_h28_small
5%

L8701
0.24uH
Irat=25A

42
C8733 @
0.01UF/25V
vx_c0402_small
10%

T8714
T8702
TPC28T TPC28T

Q8702 DSC_@
SIR472DP-T1-GE3
Rdson 12.4mOhm(4.5V)

C8723
0.22UF/25V
vx_c0603_small
10% DSC_@

C8702
SGND_VGA
1UF/25V
vx_c0603_small
10% DSC_@
1
2

D

CE8704
15UF/25V
20%
DSC_@

R8736
3.65KOhm
vx_r0402_small
VGA_VSUM+ 2 1% DSC_@
1

1

1

1

C8718 @
1000PF/50V
vx_c0402_small
10%

1

2
2

1

C8713 @
0.047UF/16V
vx_c0402_small
10%

2

2

C8724
0.22UF/25V
vx_c0603_small
10% DSC_@

VGA_VSUM-

2

1 Phase DE

AC_BAT_SYS

5

1
2
SR8701 @
R0603
2

2

2
1

R8745
11KOhm
vx_r0402_small
1% DSC_@

1

2
1

2

1

2

1

VGA_VSUM+

R8741 @
80.6Ohm
vx_r0402_small
1%

1

1
4
3
2
1

GND
CLK_EN#
DPRSLPVR
VR_ON
VID6
VID5
VID4
VID3
VID2
VID1
VID0

1
R8750
10Ohm
vx_r0402_small
1% DSC_@

R8706 Setting OCP

C8732
0.22UF/25V
vx_c0603_small
10% DSC_@
1
2

R8723
1KOhm
R8731 @
vx_r0402_small
1KOhm
1% DSC_@
vx_r0402_small
1%
SR8705 @
R0603
SGND_VGA 1
2
AC_BAT_SYS
1

2
1
2

2

A

C8708
4.7UF/10V
vx_c0603_small
10% DSC_@

G

70 NVDD_GND_SENSE

C8717
1000PF/50V
vx_c0402_small
5% DSC_@

C8725
330PF/50V
vx_c0402_small
10% DSC_@

+

SR8706 @
R0603

VGA_PHASE1

S

SGND_VGA

C8706
330PF/50V
vx_c0402_small
10% DSC_@
1

1

2

1
VR_VID_6
VR_VID_5
VR_VID_4
VR_VID_3
VR_VID_2
VR_VID_1
VR_VID_0

1

41
40
39
38
37
36
35
34
33
32
31
1

2

1
2

R8728
10Ohm
vx_r0402_small
1% DSC_@

R8730
2.61KOhm
vx_r0402_small
1% DSC_@

L
H

R8729
1Ohm
vx_r0402_small
1% DSC_@
VGA_VSUM- 2
1

+5VS

8
7
6
5 D

70 NVDD_SENSE

+VGA_VCORE

R8703=(Period(us)-0.29)*2.65
Period(us)=1/300KHz

2

VGA_UGATE1

2
C8716
150PF/50V
vx_c0402_small
5% DSC_@

H
L

1

2

1

VGA_LGATE1a

1

2

C8722
22PF/50V
vx_c0402_small
5% DSC_@

VGA_LGATE2
VGA_VCCP

1

VGA_FB2 1

B

VGA_VSUMR8749
562Ohm
vx_r0402_small
0.01 DSC_@
1
2
2
R8715
2.87KOhm
C8707 DSC_@
vx_r0402_small 390PF/50V
1% DSC_@
vx_c0402_small
MLCC/+/-10%
1
2

VGA_VDD
VGA_VIN

2
SGND_VGA

30
29
28
27
26
25
24
23
22
21

G

C8712
22PF/50V
vx_c0402_small
5% DSC_@
1
2
R8719
324KOHM
vx_r0402_small
1% DSC_@
1
1
2

C8710 @
0.1UF/25V
vx_c0402_small
10%

R8733
3.65KOhm
vx_r0402_small
1% DSC_@
VGA_VSUM+ 2
1

S

R8714 @
4.02KOhm
vx_r0402_small
1%
2
1

C8700
0.22UF/25V
vx_c0603_small
10% DSC_@
VGA_ISEN1
1
2
C8715
0.22UF/25V
vx_c0603_small
10% DSC_@
1

VGA_BOOT1

R8721 @
0Ohm
vx_r0603_h28_small

2

2

2

ISEN1
VSEN
RTN
ISUMISUM+
VDD
VIN
IMON
BOOT1
UGATE1

+5VS 1

BOOT2
UGATE2
PHASE2
VSSP2
U8700A
LGATE2
ISL62882CHRTZ-T
VCCP
DSC_@
LGATE1b
LGATE1a
VSSP1
PHASE1

Q8701 DSC_@
SIR166DP-T1-GE3
Rdson 4mOhm(4.5V)

8
7
6
5 D

C8726
R8727
1000PF/50V
8.06KOhm
vx_c0402_small
vx_r0402_small 5% DSC_@
1% DSC_@

VGA_VW
VGA_COMP
VGA_FB
VGA_FB2
VGA_ISEN2

PGOOD
PSI#
RBIAS
VR_TT#
NTC
VW
COMP
FB
FB2
ISEN2

1 Phase CCM

+VGA_VCORE_O

C8728
0.22UF/25V
SR8703 @ vx_c0603_small
R0603
10% DSC_@
VGA_BOOT2 1
21
2
VGA_UGATE2
VGA_PHASE2

11
12
13
14
15
16
17
18
19
20

1

R8734
470KOHM
vx_r0603_small
3% DSC_@

1

R8742
4.02KOhm
vx_r0402_small
1% DSC_@

VGA_VRON

2

1

1
2
3
4
5
6
7
8
9
10

VGA_VSEN
VGA_RTN

2

1

1

R8743
SGND_VGA 147KOhm
vx_r0402_small
0.01 DSC_@
VGA_RBIAS
1
2

SGND_VGA

2

5
2
1

2

SGND_VGA
VGA_PSI#

C8730 @
0.01UF/25V
vx_c0402_small
10%

2

G

25,91 DGPU_PWROK

1

VGA_DPRSLPVR

SR8704 @ VGA_DPRSLPVR
R0402
1
2

VO_action

L

R8738 @
1KOhm
vx_r0402_small
1%

L8700
0.24uH
Irat=25A

S

2

1

SR8702 @
R0402
2 VGA_HOT#_

R8746
10KOhm
vx_r0402_small
1% DSC_@

C8705 @
1000PF/50V
vx_c0402_small
10%

8
7
6
5 D

1

VGA_HOT#

C8709
0.1UF/25V
vx_c0402_small
10% DSC_@

G

32

2

R8748
499Ohm
vx_r0402_small
1% DSC_@

VGA_PSI#

L

Q8700 DSC_@
SIR472DP-T1-GE3
Rdson 12.4mOhm(4.5V)

S

2

91 DGPU_EN_PWR

8
7
6
5 D

D8700
1.2V/0.1A
DSC_@
1

1

C

VGA_DPRSLPVR

R8740
1KOhm
vx_r0402_small
1% DSC_@
1
2

AC_BAT_SYS

SR8700 @
R0402

+1.05VS

R8744
1KOhm
vx_r0402_small
1% DSC_@

VGA_PSI#

2

R8704

2

R8708

1

2

1 1KOhm

D

1

2

1 1KOhm

1

1 1KOhm

1

2

R8703

1

R8702

R8707

1

vx_r0402_small 1% DSC_@

2

1 1KOhm

+3VS_VGA

1

1 1KOhm

1 1KOhm

VGA_DPRSLPVR

1

1 1KOhm

2

2

R8701

R8732 @
1KOhm
vx_r0402_small
1%
2
1

2

2

R8706

R8700

1

R8705

T8701
VCORE VID Set 0.9V TPC28T
T8710
vx_r0402_small 1% @ VR_VID_6
TPC28T
T8712
vx_r0402_small 1% @ VR_VID_5
TPC28T
T8709
VR_VID_4
TPC28T
vx_r0402_small 1% @
T8706
vx_r0402_small 1% DSC_@ VR_VID_3
TPC28T
T8700
VR_VID_2
TPC28T
vx_r0402_small 1% DSC_@
T8707
VR_VID_1
vx_r0402_small 1% DSC_@
TPC28T

1

2

4

2

5

Monday, February 13, 2012

Sheet
1

1.0
87

of

94

5

4

3

2

1

BATTERY CHARGER
D

D

JP8804 @
3MM_OPEN_5MIL
1 1 2 2

2

C8806
1000PF/50V
vx_c0402_small
10%

1

@

1

SR8803
R0603

2

C8818
0.1UF/25V
vx_c0402_small
10%
1
2

1

2
2

G
Q8802
SIR472DP-T1-GE3
C8819
1000PF/50V
vx_c0402_small
10%

1

BAT_GATE
C8809
0.01UF/25V
vx_c0402_small
10%

JP8800 @
3MM_OPEN_5MIL
1 2 2

BAT_CON
(output Current :6A)

C8825
1000PF/50V
vx_c0402_small
10%

R8806 @
4.02KOhm
vx_r0402_small
1%

EMI Request,Close Q8806

2

EMI Request,Close Q8806

C8815
0.1UF/25V
vx_c0402_small
10%

1

R8809
4.7KOhm
vx_r0603_h28_small
5%

S

2

2
@
1

SR8801
R0603
1

Q8801
IRFHS8342TRPBF

5

1

1

(output Current :6A)

BAT

1
2
3
4

1

(Input Current :3.42A)

2

R8801
4.7KOhm
vx_r0603_h28_small
5%

1

1

2

C8822
2.2UF/25V
vx_c1206_h49
MLCC/+/-10%

C8811
0.1UF/25V
vx_c0603_small
10%

3

2
1

1
2

1

2

G
Q8800
C8810
SIR472DP-T1-GE3
2200PF/50V
vx_c0603_small
10%

2
1 1

4
G

2

7

8
7
6
5 D

AC_BAT_SYS

D

R8807
2.2ohm
vx_r1206_h26
5%

(Input Current :3.42A)

S

A/D_DOCK_IN

S

R8814
10mOhm
vx_r1206_h37
1%
1
2

2

5

60 A/D_DOCK_IN

1
2
3
4

6 5 2

(Input Current :3.42A)

8
7
6
5 D

C8802
0.1UF/25V
vx_c0402_small
10%

30

1

C8813
10UF/25V
vx_c1206_h75
10%

2

1

C8808
10UF/25V
vx_c1206_h75
10%

2

1
2

C8807
1000PF/50V
vx_c0402_small
10%

AC_BAT_SYS

C

C8814 @
0.1UF/25V
vx_c0402_small
10%

G

2

AD_IINP

7

4

Q8804
IRFHS8342TRPBF
Rdson 22mOhm(4.5V)

1

C8805
1500PF/50V
vx_c0603_small
10%

1
2

1
JP8803 @
SHORT_PIN

2

R8813
10Ohm
vx_r0402_small
1%

R8800
10Ohm
vx_r0402_small
1%

1

C8821
0.1UF/25V
vx_c0402_small
10%

2

1
2
1

1

C8816
0.1UF/25V
vx_c0402_small
10%
1
2

BAT
(Charge Current :3.5A)

C8800
10UF/25V
vx_c1206_h75
10%

C8804
0.1UF/25V
vx_c0402_small
10%

B

1

T8812
TPC28T

T8813
TPC28T

U8800B
BQ24725RGRR

1

1

1
1

1

1

T8804
T8801
TPC28T T8811
TPC28T TPC28T T8808
TPC28T

2

JP8802 @
SHORT_PIN

C8817
10UF/25V
vx_c1206_h75
10%

GND3
GND4
GND5
GND6

T8814
TPC28T

22
23
24
25

2

JP8801 @
SHORT_PIN
1

1

1

1

1
1

T8806
T8803
TPC28T T8802
TPC28T TPC28T T8809
TPC28T
BAT

1

T8822
T8820
TPC28T TPC28T

1

BAT_CON

1

1

T8805
T8800
TPC28T T8807
TPC28T TPC28T T8810
TPC28T

1

1

1

AC_BAT_SYS

1

T8821
T8823
TPC28T
TPC28T TPC28T T8824

T8817
T8815
TPC28T TPC28T

1

1

1

A/D_DOCK_IN

1

T8816
T8818
TPC28T
TPC28T TPC28T T8819

2
R8805
10mOhm
vx_r1206_h37
1%

1

1

R8810
2.2Ohm
vx_r0603_h28_small
5%

R8815
4.7KOhm
vx_r0603_h28_small
5%

B

1

2

S

D8800
0.8V/0.2mA

2

DCR = 1mOhm

1

1
G

1 2

3

D
3

7

REF

C8823
0.047UF/25V
vx_c0603_small
MLCC/+/-10%

2 5 6

2

1
2

U8800A
BQ24725RGRR

@

1

2

2

SR8802
C8812
R0603
1UF/25V
vx_c0603_small
10%

2

1

BAT_GATE

C8803
0.01UF/25V
vx_c0402_small
10%

2

4

11
12
13
14
15

@

L8800
4.7UH
Irat=5.5A
1

1

BATDRV
SRN
SRP
GND1
LODRV

1
SR8804

Q8803
IRFHS8342TRPBF
Rdson 22mOhm(4.5V)

2

R8804
100KOhm
vx_r0402_small
1%

2

SMB0_CLK

1

2

30,60
R8812
316KOhm
vx_r0402_small
1%

VCC

2

R8803
10OHM
vx_r1206_h28
5%

@

21
20
19
18
17
16

C8820
1UF/25V
vx_c0603_small
10%

1

1
SR8800

GND2
VCC
PHASE
HIDRV
BTST
REGN

1

2

SMB0_DAT

ACDET
IOUT
SDA
SCL
ILIM

2

30,60

+3VA

VCC

1

D8801
0.8V/0.2mA

2

1

1

6
7
8
9
10

2

3
2

2

1

5
4
3
2
1

2

S
C8801
100PF/50V
vx_c0402_small
5%

ACOK
ACDRV
CMSRC
ACP
ACN

30

R8802
12.1KOhm
vx_r0402_small
1%

1

C8824 @
100PF/50V
vx_c0402_small
5%

1

1

R8816
71.5KOhm
vx_r0402_small
1%

2

2
1

2 5 6

D

AC_IN_OC
3

BAT

(input Current :2.57A)

2

R8811
10KOhm
vx_r0402_small
1%

1

0804
C8814,05,06 from 0603/X7R
change to 0402/X5R
for layout space

2
1

1

C

1

2

REF
R8808
432KOhm
vx_r0402_small
1%

A

A



Title :
Engineer:
Size

5

4

3

2

Clark Liang

Project Name

Rev

MA50

Custom
Date:

POWER_CHARGER

Monday, February 13, 2012

Sheet
1

1.0
88

of

94

5

4

3

2

1

D

D

C

C

B

B



Title :

A

Engineer:
Size

4

3

Rev

MA50

Date: Monday, February 13, 2012
5

Clark Liang

Project Name

Custom
2

A

POWER_N/A

Sheet

1.0
89
1

of

94

5

4

3

2

1

D

D

BATTERY IN DETECT
C

C

60

TS1#

2

1

BAT1_IN_OC# 30

JP9000 @
SHORT_PIN

B

B



Title :

A

Engineer:
Size

3

Rev

MA50

Date: Monday, February 13, 2012
4

Clark Liang

Project Name

Custom
5

POWER_DETECT

2

Sheet

1.0
90
1

of

94

A

1 1

G

2

1 1
2

2

C9121
0.033UF/16V
10% DSC_@

1
R9110
22KOhm
vx_r0402_small
1% DSC_@

T9125
TPC26T
1

+12VS_VGA

T9122
TPC26T

R9121
0Ohm
nonDS3_@
1
2
Q9115
IRFML8244TRPBF
DS3_@

1

Q9110B
UM6K1N
DSC_@

2
Q9110A
UM6K1N
DSC_@

83,93 SUSC#_PWR

24 VGA_PWRON

1

G

2

1

1

2

30,57,81,93

3
Q9113B
UM6K1N

A

2

VSUS_ON

Q9113A
UM6K1N



Title : POWER_LOAD SWITCH

5
4

3

5

R9113
560KOhm
vx_r0402_small
5%

Q9116B
UM6K1N
DS3_@

Engineer:
Size
Date:

4

2
R9114
560KOhm
vx_r0402_small
5%

2

Clark Liang

Project Name

Rev

MA50

Custom
5

1

1

+12VSUS

4

1

R9115
1KOhm
vx_r0402_small
1%

+5VA

Q9116A
UM6K1N
DS3_@

(Max:1A)

6

R9117
560KOhm
vx_r0402_small
5% DS3_@
2
2

+5VSUS

C9127
0.1UF/25V
vx_c0402_small
10%

+5VSUS_SW_R
C9129 @
0.1UF/25V
vx_c0402_small
10%

2

1
2

1 1

2 S

D

2
1
2

VGS= 4.5V , Rdson = 22mOhm
VGS= 10V , Rdson = 17mOhm

2

R9118
560KOhm
vx_r0402_small
5% DS3_@
22,30 SLP_SUS#

T9139
T9141
T9140
TPC26T TPC26T TPC26T

1

1

C9134
0.1UF/25V
vx_c0402_small
10% DS3_@

C9128 @
47PF/50V
vx_c0402_small
5%

R9120
22KOhm
vx_r0402_small
1% DS3_@

1

+5VA

(Max:0.0287A)
+5VSUS_DS3

R9123
0Ohm @
2
Q9112
IRFML8244TRPBF

3

A

1

+5VO

Q9114
IRFML8244TRPBF
DS3_@
2
1

1

SP9102@
nb_r0402_short_5mil_small
2

T9135
TPC26T

6

+12VSUS

Q9106A
UM6K1N

1

3

1

Q9106B
UM6K1N

1

T9127
TPC26T

VSUS_ON POWER

+3VSUS_DS3

C9133
0.1UF/25V
vx_c0402_small
10% DS3_@

R9119
22KOhm
vx_r0402_small
1% DS3_@

2

2 S
G

2
1

C9132 @
47PF/50V
vx_c0402_small
5%
C9135
0.033UF/16V
vx_c0402_small
10% DS3_@
1

3
4

5

1

SUSC#_PWR

2

R9124
T9120
560KOhm
TPC26T vx_r0402_small
5%
2

6

1

+5VA

1

G

D
3

+5VO
1

+12V
(Max:0.01A)

1

2
R9103
560KOhm
vx_r0402_small
5%

(Max:0.15A)

2 S

D
3

1

T9113
TPC26T
1

2

1

2

R9100
22KOhm
vx_r0402_small
1%

+12VSUS

C9131 @
47PF/50V
vx_c0402_small
5%
C9130
0.033UF/16V
vx_c0402_small
10%
R9122
DS3_@ 0Ohm
1 nonDS3_@
2

SP9101@
nb_r0402_short_5mil_small
2

T9116
TPC26T

B

1

2

2

1

+3VO
1

G

1

1

1 1

2 S

D
3
1
2

+5V
(Max:0.0287A)

C9113
0.1UF/25V
vx_c0402_small
10%

1

T9109
TPC26T

87 DGPU_EN_PWR
T9114
T9100
T9110
TPC26T TPC26T TPC26T

VGS= 4.5V , Rdson = 41.5mOhm
C9106 @
Q9104
47PF/50V
IRFML8244TRPBF VGS= 10V , Rdson = 27.6mOhm
vx_c0402_small
5%
+5V_SW_1
2
1
C9111
0.033UF/16V
vx_c0402_small
10%

1

DGPU_EN_PWR

5
4

R9107
560KOhm
vx_r0402_small
5% DSC_@

B

+5VO

2

82,83,84,85,93

6

1

C9114
0.1UF/25V
vx_c0402_small
10%

30,57 SUSC_EC#

2

1

2

R9104
22KOhm
vx_r0402_small
1%

+5VSUS

1

SUSB#_PWR

1

1

R9108
560KOhm
vx_r0402_small
5% DSC_@

+3V
(Max:0.378A)

2

1

C9115
0.1UF/25V
vx_c0402_small
10%

2

2

1

G

VGS= 4.5V , Rdson = 41.5mOhm
C9109 @
Q9103
47PF/50V
IRFML8244TRPBF VGS= 10V , Rdson = 27.6mOhm
vx_c0402_small
+3V_SW_1
5%
2
1

1

1 1

2 S

D
1

3

+3VO

SP9100@
nb_r0402_short_5mil_small
2

T9118
TPC26T

3

+12VSUS

3.3V --> 1.05V --> VGA_CORE --> 1.5V

SUSB_EC#

1

24,30,57,92

Q9105

T9103
T9107
T9121
TPC26T TPC26T TPC26T

1

6

E

C

Q9108 DSC_@

1

6

25,87 DGPU_PWROK

SUSC#_PWR POWER

C

(Max:0.01A)

R9109
560KOhm
vx_r0402_small
5% DSC_@

1

2

10K

47K

(Max:4.137A)

1

4
B
B

2

R9116 @
47KOhm
vx_r0402_small
1%

C

E
3
47K

T9126
TPC26T

1

47K

1
2

1

1

R9101
560KOhm
vx_r0402_small
5%

T9130
TPC26T

C9123 @
47PF/50V
vx_c0402_small
5%

1

2

+12VSUS

+12VS
(Max:0.01A)

1

B
B

10K

47K

E

C

47K

2

SUSB#_PWR

47K

3

4

1

C

E

T9105
TPC26T

1

C9110 @
47PF/50V
vx_c0402_small
5%

1

2

1

+12VSUS

2

T9108
T9124
T9111
TPC26T TPC26T TPC26T
C

+1.5VS_VGA

C9122
0.1UF/25V
vx_c0402_small
10% DSC_@

1

2
1

+1.5VS_VGA_SW_R

(Max:0.42A)

1

G
C9125 @ Q9107 DSC_@
47PF/50V SIR472DP-T1-GE3
vx_c0402_small
5%

C9124
0.1UF/25V
vx_c0402_small
10% DSC_@

T9138
T9134
T9133
TPC26T TPC26T TPC26T

VGS= 4.5V , Rdson = 5.6mOhm
VGS= 10V , Rdson = 4.2mOhm

2

2

1
2
3
4

S

1

1

5

+1.5VO
1

2
1

C9102
0.1UF/25V
vx_c0402_small
10%

R9111
22KOhm
vx_r0402_small
1% DSC_@

+3VS_VGA

1

2

D

C9120 @ Q9109
47PF/50V IRFML8244TRPBF VGS= 4.5V , Rdson = 41.5mOhm
vx_c0402_small DSC_@
VGS= 10V , Rdson = 27.6mOhm
5%
+3VS_VGA_SW_R 2
1

8
7
6
5 D

(Max:2.065A)

T9137
T9128
T9132
TPC26T TPC26T TPC26T

2 S

D
3
1
2

1

1

1 1
2

+3VO

C9119
0.1UF/25V
vx_c0402_small
10% DSC_@

1

1

1
R9112
47KOhm
vx_r0402_small
1% DSC_@

+1.05VS_VGA

1

1 1
2

1

2

2

2

1

T9136
T9131
T9129
TPC26T TPC26T TPC26T

VGS= 4.5V , Rdson = 5.6mOhm
VGS= 10V , Rdson = 4.2mOhm

G
+1.05VS_VGA_SW_R
C9118 @ Q9111 DSC_@
47PF/50V SIR166DP-T1-GE3
vx_c0402_small
C9117
0.1UF/25V
5%
vx_c0402_small
10% DSC_@

R9102
47KOhm
vx_r0402_small
1%

2

2

1

2

1
2
3
4

S

C9126
0.033UF/16V
vx_c0402_small
10% DSC_@

+1.5VS
(Max:5.66A)

1

1
2

VGS= 4.5V , Rdson = 5.6mOhm
VGS= 10V , Rdson = 4.2mOhm

G
+1.5VS_SW_R
C9105 @ Q9102
47PF/50V SIR166DP-T1-GE3
vx_c0402_small
C9112
5%
0.033UF/16V
vx_c0402_small
10%

5

+1.05VO

T9117
T9112
T9104
TPC26T TPC26T TPC26T
1 1

1
2
3
4

R9106
47KOhm
vx_r0402_small
1%

+5VS
(Max:3.207A)

C9103
0.1UF/25V
vx_c0402_small
10%

1

1
2

2 S
G

1

S

8
7
6
5 D

T9119
T9123
T9102
TPC26T TPC26T TPC26T

1

2

5

+1.5VO

8
7
6
5 D

+3VS
(Max:2.648A)

C9108
0.1UF/25V
vx_c0402_small
10%

1

G

1

D
3
1

R9105
47KOhm
vx_r0402_small
1%

VGS= 4.5V , Rdson = 41.5mOhm
C9116 @
Q9101
47PF/50V
IRFML8244TRPBF VGS= 10V , Rdson = 27.6mOhm
vx_c0402_small
5%
+5VS_SW_R
2
1
C9107
0.033UF/16V
vx_c0402_small
10%

1

1 1

2 S

D
3
1
2

C9101
0.1UF/25V
vx_c0402_small
10%

+5VO

1

T9101
T9115
T9106
TPC26T TPC26T TPC26T

C9100 @
Q9100
VGS= 4.5V , Rdson = 41.5mOhm
47PF/50V
IRFML8244TRPBF VGS= 10V , Rdson = 27.6mOhm
vx_c0402_small
+3VS_SW_R
5%
2
1

D

2

DGPU_EN_PWR POWER

SUSB#_PWR POWER
+3VO

3

1

4

1

5

Monday, February 13, 2012

Sheet
1

1.0
91

of

94

5

4

3

2

1

+3VS
2

POWER GOOD DETECTER

SR9203 @
NB_R0402_5MIL_SMALL
2
1

T9207
TPC26T

84 +1.8VS_PWRGD

T9205
TPC26T
1

85 +VCCSA_PWRGD

2

SR9201 @
NB_R0402_5MIL_SMALL
1

2

SR9202 @
NB_R0402_5MIL_SMALL
1

T9203
TPC26T
1

4,82 +1.05VS_PWRGD

R9203
100KOhm
vx_r0402_small
1%

D

+3VSUS
1 A

ALL_PWRGD_R

VCC

5

T9200
TPC26T

2 B
3 GND

4

ALL_SYSTEM_PWRGD 30

1

1

83 DDR_PWRGD

SR9200 @
NB_R0402_5MIL_SMALL
2
1

1

T9204
TPC26T

1

D

Y

U9200 @
Vcc=2~5.5

2

SR9204 @
NB_R0402_5MIL_SMALL
1

2

SR9205 @
NB_R0402_5MIL_SMALL
1

2

1

PM_PWROK 4,22,30

R9205 @
0Ohm
vx_r0402_small
C

2

80 VGFX_PWRGD

C

1

+3VSUS
2

R9206 @
0Ohm
vx_r0402_small

R9200
100KOhm
vx_r0402_small
1%
2

1

30,81 SUS_PWRGD

1

T9201
TPC26T

1
D9202
1.2V/0.1A

2

SR9206 @
NB_R0402_5MIL_SMALL
1

DELAY_VR_AND_ALL_SYS

22

T9206
TPC26T

B

D9201
1.2V/0.1A

FORCE_OFF#

32,81

2
1

R9204
560KOhm
vx_r0402_small
5%

3

1
VCC

5

5

2 B
3 GND

4

ALL_SYSTEM_PWRGD

4

2

Y

Q9200A
UM6K1N

2

U9201 @
Vcc=2~5.5

1

2

+3VSUS
1 A

D9200
1.2V/0.1A

6

1

1

2

R9201
100KOhm
vx_r0402_small
1%

2

T9202
TPC26T
30,80 VRM_PWRGD

24,30,57,91 SUSB_EC#

B

1

+3VS

SUSB_EC#

1

R9202 @
0Ohm
vx_r0402_small
2
1

1

VGFX_PWRGD

1

T9208
TPC26T

Q9200B
UM6K1N

C9200
4.7UF/10V
vx_c0603_small
10%

A

A



Title :
Engineer:
Size
Date:
4

3

2

Clark Liang

Project Name

Custom
5

POWER_PROTECT

Monday, February 13, 2012

Rev

MA50
Sheet
1

1.0
92

of

94

5

4

3

2

1

D

D

+12VSUS
+5VSUS
+3VSUS

52,65,80,81,82,83,85,91
53,81,84,85,91
60,84
83,91
82,91
83

+3VA

+12V
+5V
+3V
+1.5V

+12VS
+5VS
+3VS
+1.8VS
+1.5VS
+1.05VS
+VCCSA
+0.75VS

+12VS
+5VS
+3VS
+1.8VS
+1.5VS
+1.05VS
+VCCSA
+0.75VS

JP9301 @
SGL_JUMP
1 1 2 2
JP9302 @
SGL_JUMP
1 1 2 2

60,91
57,59,60,91
24,45,57,59,61,91
5,16,17,18,57,60,83
28,36,48,91
27,36,37,48,50,51,57,80,87,91
17,20,21,22,23,24,25,26,27,28,30,32,33,36,37,44,45,48,50,51,53,57,59,61,80,91,92
7,25,26,57,80,84
7,26,53,57,91
26,27,57,82,87
7,85
16,17,57,83

+VCORE
+VGFX_CORE

+VCORE 6,9,11,80
+VGFX_CORE 7,9,80

+12VS_VGA
+3VS_VGA
+1.5VS_VGA
+1.05VS_VGA

+12VS_VGA 60,91
+3VS_VGA 57,70,72,74,75,87,91
+1.5VS_VGA 57,71,75,76,77,91
+1.05VS_VGA 57,70,71,72,91

JP9300 @
SGL_JUMP
1 1 2 2

JP9303 @
SGL_JUMP
1 2 2

1

T9300
TPC26T
1

+5VO
+3VO
+1.8VO
+1.5VO
+1.05VO
+0.75VO

+12VSUS 28,51,81,91
+5VSUS 51,57,59,91
+3VSUS 4,22,24,28,30,60,81,92

+12V
+5V
+3V
+1.5V

B

37,60,81,91
6,20,26,27,30,31,57,59,60,81,88

CPU_VRON_PWR 80

T9301
TPC26T
1

+5VO
+3VO
+1.8VO
+1.5VO
+1.05VO
+0.75VO

+5VA
+3VA

SUSB#_PWR 82,83,84,85,91

T9302
TPC26T
1

+5VA
+3VA

C

FOR POWER TEST

AC_BAT_SYS 45,53,81,87,88
BAT
88
BAT_CON 60,88

C

SUSC#_PWR 83,91

T9303
TPC26T
1

AC_BAT_SYS
BAT
BAT_CON

VSUS_ON 30,57,81,91

B



A

A

Title :

POWER_SIGNAL

Clark Liang

Engineer:
Size

Project Name

Custom
Date: Monday, February 13, 2012
5

4

3

2

Rev

MA50

1.0

Sheet

93
1

of

94

5

4

3

2

1

SPEC rating

SUSC#_PWR

+5VO

UMC4N
(SWITCH)

+12V

(10mA)

UMC4N
(SWITCH)

+12VS

(10mA)

+12VSUS

D

VSUS_ON

charge
pump(triple
volatger)

SUSB#_PWR

D

SUSC#_PWR

+5VAO

SUSB#_PWR

+3VO

SSM3K315T

+3VSUS

(0.319A)

SSM3K315T

+3V

(0.278A)

SSM3K315T

+3VS

(1.809A)

+3VA

(0.07A)

+3VA
AC_BAT_SYS
TPS51225
VSUS_ON

+5VO

+5VSUS

(0.021A)

SSM3K315T

+5V

(1.615A)

SSM3K315T

+5VS

SUSC#_PWR

FORCE_OFF#

SUSB#_PWR

+5VA

+5VA

+5VO

(1.783A)
(0.1A)

C

C

SUS_PWRGD

+5VO

VT386

+1.05VO

SUSB#_PWR

+1.05VS

(3.37A)

+VCCP

(5.95A)

+1.5VS

(0.009A)

+1.5V

(9.688A)

+0.75VS

(1A)

+VCCSA

(4.8A)

+1.05VS_PWRGD

SUSC#_PWR

+5VO

VT387

+1.5VO
SSM3K315T
SUSB#_PWR
DDR_PWRGD

SUSB#_PWR

SUSB#_PWR
B

+0.85VO

TPS51206

SUSC#_PWR
B

TPS51461R

+5VS
+VCCSA_PWRGD

+1.8VO

SUSB#_PWR

+1.8VS

(1.002A)

SY8065ABC

+5VS

+1.8VS_PWRGD

+5VS

UMA
+VGFX_CORE

(12A)

VGFX_PWRGD

+5VS

VT1318MFQR
A

A

+VCORE

(21.5A)

+5VS
CPU_VRON,CPU_VRON_PWR


SVID_VDIO,SVID_VCLK,SVID_ALERT#,
VCCSENSE,VSSSENSE,
VCC_GFX_SENSE,VSS_GFX_SENSE
ALL_SYSTEM_PWRGD

Title :

VRM_PWRGD,VGFX_PWRGD,I_MON,VGFX_IMON2

Engineer:
Size

5

4

3

2

Clark Liang
Rev

MA50

Custom
Date:

POWER_FLOWCHART

Project Name
Monday, February 13, 2012

Sheet
1

1.0
94

of

94

5

4

3

2

1

D

D

C

C

B

B

A

A

Title : ****
Engineer:

BG1\HW1
Size

Project Name

Date: Monday, February 13, 2012
4

3

Rev

MA50

A
5

Joyoung_Chianhg

2

1.3
Sheet

96
1

of

93

5

4

3

1

PR

SR BOM change
SR1.1 Un-mount

2

PR2.1 RTC pin define swap

Q5602, Q5601 and mount R5323 and R5310

SR1.2 CE5001 un-mount
SR1.3 L3602 mount
SR1.4 R7005 un-mount
D

D

SR1.5 R7410 change 10K ohm

PR_S01:Change C3627,C3626 from X5R to Y5V

SR1.6 R4504 change 10K ohm for LVDS backlight

PR_S02:According with INTEL datasheet suggest.(Power circuit mount)
PR_S03:To prevent

SR1.8 R7608, R7611 change 162 ohm

PR_S04:To change WLAN LED control by MODULE then gate control by 3G LED.

ER

C

B

誤誤誤 PCIE Wake.

SR1.7 R7430, R7432, R7433 un-mount

PR_S05:To change 3G LED control by MODULE.

ER1.1 PI pin connect to ESD and VDD pin reserve 0.1 uF cap
PR_S06:To prevent leakage current and mount R for cost down.
ER1.2 Add diode and reserve 0 ohm for AC adapter plug in /out voice
ER1.3 U5201 change G547G1P81U for Desing IP
PR_S07:RF reserve.
ER1.4 Add Card Reader LED
PR_S08:Move P.U 10K near 3G connector.
ER1.5 J3701, J3702, J4601, J5201, J5304,J5001 chang connector
PR_S09:Change LED POWER rail from +5VSUS_LEDDB(+5VSUS) to
ER1.6 R6505~R6508 change 0603 size
+5VA_LEDDB(+5VA) .(To resolve Battery LL issue)
ER1.7 D4801 contact to 2.2K ohm for EA solution in HDMI issue
ER1.8 CPU_THERM# contact to FORCE_OFF#
PR_S10:Change LED POWER rail from
ER1.9 RTC battery connector (J2001)Pin1, Pin2 swap
+5VSUS_LEDDB(+5VSUS) to +5V_LEDDB(+5V)
ER1.10 D3707, D4618, D5201, D5301, D6502, D6503, D6802 VDD pin reserve 0.1 uF cap
PR_S11:Del JP, +3VS_CR change Net name to +3VS
ER1.11 R3720 R3721 change 51ohm for consumer spec in HP
ER1.12 L4601, L4602, L4603 change 27nH and add C4622, C4623, C4624 for EA solution in CRT PR_S12:ESD change solution ,Add U6512 ,Del C6509,D6501~3,U6502,U6503,D6401
ER1.13 L5301, L5302, L5306 change 0 ohm and L5305 change short pin,
PR_S13:Change NET name to +3VS
C5321, C5327,C5307, C5322, C5315, C5305, C5313 change umount
ER1.14 Change R4566 from 300(0603) to 150(0402) for LVDS power sequence solution
PR_S14:Change 10uF to 22uF for wave of CRT display.
ER1.15 USB port 0 and port 1 swap
PR_S15:Add 10uF (C6803)for USB droop test.
ER1.16 Vcore_add CE8002&CE8006 to replace CE0601&CE0602
ER1.17 VGFX_CORE(IGPU) add CE8007 to replace CE0705
PR_S16:D5201 PIN Swap
ER1.18 reserve M_VREF schematic
PR_S17:ME modify.(H6532,8,1,9,4,3,5,H6945),DEL H6944
ER1.19 Reserve C2623, C2624, C4514, C4515 for WLAN solution
ER1.20 Reserve C4510, C4512, C4513 for 3G and L6002~L6004, L4502 change 47 ohm Bead
PR_S18:EMI add.
ER1.21 C6007, C6006 mount for WLAN
PR_S19:Change to unmount for ME
ER1.22 RN3002 change 2R4P
ER1.23 LED and BT schematic change to LED board
PR_S20:RF request.
ER1.24 LED power change 5VSUS, so R5618, R5616, R5623 change 560 ohm
PR_S21:LED light fine-tune.
ER1.25 VRAM change co-lay footprint
ER1.26 Reserve C5601, C5602, C5603, C6356, C6357 to 47pF for RF request
PR_S22:BIOS request for UMA and DSC platform identifying.
ER1.27 Reserve C4516, C4517 to 10pF for RF request
ER1.28 U6504,U6505 change AZ3028 for EMI request
ER1.29 D6401, D6501, D6502 change ESD AZ5023 in for EMI request in LAN function
ER1.30 Add C6010 C6011 for EMI request
ER1.31 Merge Q6704 and remove U6704
ER1.32 D3720 change to mount for EMI request
ER1.34 Reserve C6913(47PF), C6902(0.1uF), C6623(47PF), C6606(22uF) for 3G
ER1.35 L6601=>0901-00HI000 FERRITE BEAD(1206)390 OHM/2A

C

B

A

A

Title : ****
Engineer:


Size

5

4

3

2

Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
1.3
Sheet
1

97

of

93

5

4

3

2

1

Power On Sequence Diagram G3-S0 R0.3 (non-iAMT,non-Deep Sx)

Reset
Logic
(R)

D

D

PWR_SW# 8

Power On
Button

EC_RST#

2

13 SUSB_EC#

+0.75VS
+1.5VS
+1.8VS
+3VS
+5VS
+12VS

ME_PWROK
PCH_PWROK

21

SYS_PWROK

SLP_S3#

PM_SUSB# 12

DRAMPWRGD
PLT_RST#
PROCPWRGD

PCH

13 11

H_DRAM_PWRGD

16

VRM_PWRGD

15

CPU_VRON

+1.5V
+3V
+5V
+12V

ALL_SYSTEM_PWRGD

11 SUSC_EC#

ME_PWROK
PM_PWROK

19

23

18

POWER GOOD
LOGIC

C

VDDPWRGD

SUS_PWRGD 4

C

+5VO

17

SYS_PWROK 22
SUSB_EC#

+3VSUS
+5VSUS
+12VSUS

PM_PWROK

delay 99ms

PM_SUSC# 10

BUF_PLT_RST#

VSUS_ON 3

SLP_S4#

RSTIN#

EC
NPCE795L

H_CPUPWRGD

+3VA_EC 1

ME_AC_PRESENT 7
ME_SUSPWRDNACK 6
PM_PWRBTN# 9
PM_RSMRST# 5

UNCOREPWRGD

+3VA
+5VA
+5VO

SUSC_EC#

AC_BAT_SYS

CPU

20 SVID

SVID
B

13 SUSB_EC#

13 SUSB_EC#

+VTT_PCH
+1.05VS

+1.05_PWRGD

+VCCSA_PWRGD

B

+VCCP_PWRGD14
+VCCP
+1VS/+1.05VS

+VCCSA

Power On Sequence
1

23

A

A

SVID
IMVP7
+VccCore
+VccAXG

Title : Power On Sequence
Engineer:


Size

5

4

3

2

Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
1.3
Sheet
1

98

of

93

5

4

3

2

1

Power On Sequence Diagram G3-S0 R0.3 (non-iAMT,non-Deep Sx)
D

D

1 +3VA_EC
2 EC_RST#
3 VSUS_ON
+3VSUS/+5VSUS
4 SUS_PWRGD

T0>10ms
T1= 20ms

5 PM_RSMRST#
T2<200ms

6 ME_SUSPWRDNACK
01ms

18 H_DRAM_PWRGD

T7>100ms

19 H_CPUPWRGD
20 SVID
+VCC_CORE
+VGFX_CORE
21 VRM_PWRGD
22 SYS_PWROK

T8>1.06ms

23 BUF_PLT_RST#

A

A

Title : Power On Timing
Engineer:


Size

5

4

3

2

Joyoung_Chianhg

Project Name

C

MA50

Date:

Monday, February 13, 2012

Rev
1.3
Sheet
1

99

of

93

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