Pegatron VA70HW Schematics. Www.s Manuals.com. R1.0 Schematics
User Manual: Motherboard Pegatron VA70HW - Schematics. Free.
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5 4 3 2 1 VA70HW BLOCK DIAGRAM POWER VGA POWER CPU VCORE D DDR-III SO-DIMM*2 DDR3L 1333/1600 MHz channel A PAGE 38 eDP x 2 eDP Panel GPU VCORE PAGE 80 PAGE 80 DDIC HDMI PCIE X 16 NVIDIA N14E +VCCP & +VCCP_VT +3VS_VGA PAGE 82 DDR3L 1333/1600 MHz channel B Haswell dGPU +1.05VS_VGA PAGE 81 PAGE 16 CPU PAGE 37 SYSTEM, +3V, +5V DDR-III SO-DIMM*2 DDR & VTT +12VS_VGA PAGE 83 PAGE 17 2.5V & 1.5VS &1.1VS LOAD SWITCH PAGE 84 PAGE 3-10 USB2.0 PAGE 70~79 DMI x 4 FDI x 2 Camera D PAGE 91 SMART CHARGER POWER PROTECT PAGE 88 PAGE 92 POWER DETECT USB2.0 VGA CRT PAGE 90 USB PORT9 LOAD SWITCH PAGE 91 PAGE 39 USB2.0 USB PORT2 PCH Head Phone (Combo Jack) C Azalia Azalia Codec RTK/ALC3225 POWER PROTECT PAGE 92 PAGE 58 USB2.0 Lynx Point USB3.0 Power Rails USB20 PORT1 USB30 PORT2 RTC VA VSUS VS S0 ON ON ON ON S3 ON ON ON OFF S4 ON ON ON OFF S5/ AC ON ON ON OFF S5/ DC ON ON OFF OFF Sleep State MIC C PAGE 58 USB2.0 PAGE 41 42 TPM USB3.0 PAGE 43 K/B PAGE 48 Click T/P USB20 PORT0 USB30 PORT1 PAGE 61 LPC EC IT8528E PAGE 30 PCIE *1 HSPI PAGE 48 USB2.0 PAGE 13-19 MiniCard WLAN/WMAX BT combo FAN PCIe Port PAGE 55 PAGE 49 SATA SPI ROM 4MB (BIOS/EC) PAGE 30 SPI ROM 2MB (ME) PCIE_P1 CARDREADER PCIE_P2 mSATA PCIE_P3 Mini CARD (WLAN) PCIE_P4 LAN PCIE_P5 PCIE_P6 Giga LAN BCM57780 PCIE *1 SPI RJ45 USB20 PORT USB P00 External MB USB P01 External MB USB P02 External DB PAGE 33 PAGE 34 PAGE 28 PCIE *1 Card Reader RTS5209 B SATA HDD PAGE 40 PAGE 60 PAGE 40 PCIE *1 SATA HDD 五五五 SD Socket USB P04 USB P05 WiFi USB P08 Camera USB P09 External DB USB P10 BT USB P11 PCIE/mSATA PAGE 40 mSATA/SSD SATA 3.0 PAGE 60 PAGE 53 SATA ODD B USB P03 USB P12 PAGE 60 USB P13 SATA PORT SATA P0 IO BOARD HDD 1 SATA P1 PWR BOARD SATA P2 ODD SATA P3 USB PORT3 POWER Button HP_OUT SATA P4 mSATA SATA P5 HDD 2 A A USB PORT9 POWER LED MIC IN LID SW Title : BLOCK DIAGRAM Engineer: Wing_Cheng BU1-RD Div.1-HW RD Dept.1 Size Custom Date: 5 4 3 2 Project Name Rev VA70_HW Sheet Monday, February 04, 2013 1 1.0 1 of 96 5 4 3 2 +VCCIOA_OUT U0301A DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3 22 22 22 22 DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3 22 22 22 22 DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3 22 22 22 22 DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3 D20 C20 B20 A20 D18 C17 B17 A17 D17 C18 B18 A18 DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3 DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3 DMI 22 22 22 22 PEG_COMP R0301 DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3 DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3 PEG D D21 C21 B21 A21 Haswell rPGA EDS 22 22 H29 J29 FDI_CSYNC FDI_INT FDI_CSYNC DISP_INT B FDI C PEG_RCOMP PEG_RXN_0 PEG_RXN_1 PEG_RXN_2 PEG_RXN_3 PEG_RXN_4 PEG_RXN_5 PEG_RXN_6 PEG_RXN_7 PEG_RXN_8 PEG_RXN_9 PEG_RXN_10 PEG_RXN_11 PEG_RXN_12 PEG_RXN_13 PEG_RXN_14 PEG_RXN_15 PEG_RXP_0 PEG_RXP_1 PEG_RXP_2 PEG_RXP_3 PEG_RXP_4 PEG_RXP_5 PEG_RXP_6 PEG_RXP_7 PEG_RXP_8 PEG_RXP_9 PEG_RXP_10 PEG_RXP_11 PEG_RXP_12 PEG_RXP_13 PEG_RXP_14 PEG_RXP_15 PEG_TXN_0 PEG_TXN_1 PEG_TXN_2 PEG_TXN_3 PEG_TXN_4 PEG_TXN_5 PEG_TXN_6 PEG_TXN_7 PEG_TXN_8 PEG_TXN_9 PEG_TXN_10 PEG_TXN_11 PEG_TXN_12 PEG_TXN_13 PEG_TXN_14 PEG_TXN_15 PEG_TXP_0 PEG_TXP_1 PEG_TXP_2 PEG_TXP_3 PEG_TXP_4 PEG_TXP_5 PEG_TXP_6 PEG_TXP_7 PEG_TXP_8 PEG_TXP_9 PEG_TXP_10 PEG_TXP_11 PEG_TXP_12 PEG_TXP_13 PEG_TXP_14 PEG_TXP_15 SOCKET_947P 12V012BSM001 E23 M29 K28 M31 L30 M33 L32 M35 L34 E29 D28 E31 D30 E35 D34 E33 E32 L29 L28 L31 K30 L33 K32 L35 K34 F29 E28 F31 E30 F35 E34 F33 D32 H35 H34 J33 H32 J31 G30 C33 B32 B31 A30 B29 A28 B27 A26 B25 A24 J35 G34 H33 G32 H31 H30 B33 A32 C31 B30 C29 B28 C27 B26 C25 B24 PEG_RXN15 PEG_RXN14 PEG_RXN13 PEG_RXN12 PEG_RXN11 PEG_RXN10 PEG_RXN9 PEG_RXN8 PEG_RXN7 PEG_RXN6 PEG_RXN5 PEG_RXN4 PEG_RXN3 PEG_RXN2 PEG_RXN1 PEG_RXN0 PEG_RXP15 PEG_RXP14 PEG_RXP13 PEG_RXP12 PEG_RXP11 PEG_RXP10 PEG_RXP9 PEG_RXP8 PEG_RXP7 PEG_RXP6 PEG_RXP5 PEG_RXP4 PEG_RXP3 PEG_RXP2 PEG_RXP1 PEG_RXP0 PEG_TXN0_C PEG_TXN1_C PEG_TXN2_C PEG_TXN3_C PEG_TXN4_C PEG_TXN5_C PEG_TXN6_C PEG_TXN7_C PEG_TXN8_C PEG_TXN9_C PEG_TXN10_C PEG_TXN11_C PEG_TXN12_C PEG_TXN13_C PEG_TXN14_C PEG_TXN15_C PEG_TXP0_C PEG_TXP1_C PEG_TXP2_C PEG_TXP3_C PEG_TXP4_C PEG_TXP5_C PEG_TXP6_C PEG_TXP7_C PEG_TXP8_C PEG_TXP9_C PEG_TXP10_C PEG_TXP11_C PEG_TXP12_C PEG_TXP13_C PEG_TXP14_C PEG_TXP15_C 1 1% +VCCIOA_OUT +VCCIOA_OUT 1 4,6 2 24.9Ohm PEG_RXN[15:0] 70 PEG Compensation D Enable PCIE Lane Reversal Need to PD CFG[2] PEG_RXP[15:0] 70 C R1.2 2012/12/19 CX0301~CX0308, CX0317~CX0324 options are changed to /EGL CX0301 CX0302 CX0303 CX0304 CX0305 CX0306 CX0307 CX0308 CX0309 CX0310 CX0311 CX0312 CX0313 CX0314 CX0315 CX0316 CX0317 CX0318 CX0319 CX0320 CX0321 CX0322 CX0323 CX0324 CX0325 CX0326 CX0327 CX0328 CX0329 CX0330 CX0331 CX0332 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0.22UF/10V 0.22UF/10V 0.22UF/10V 0.22UF/10V 0.22UF/10V 0.22UF/10V 0.22UF/10V 0.22UF/10V 0.22UF/10V 0.22UF/10V 0.22UF/10V 0.22UF/10V 0.22UF/10V 0.22UF/10V 0.22UF/10V 0.22UF/10V 0.22UF/10V 0.22UF/10V 0.22UF/10V 0.22UF/10V 0.22UF/10V 0.22UF/10V 0.22UF/10V 0.22UF/10V 0.22UF/10V 0.22UF/10V 0.22UF/10V 0.22UF/10V 0.22UF/10V 0.22UF/10V 0.22UF/10V 0.22UF/10V /EGL /EGL /EGL /EGL /EGL /EGL /EGL /EGL /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU /EGL /EGL /EGL /EGL /EGL /EGL /EGL /EGL /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU /DGPU PEG_TXN15 PEG_TXN14 PEG_TXN13 PEG_TXN12 PEG_TXN11 PEG_TXN10 PEG_TXN9 PEG_TXN8 PEG_TXN7 PEG_TXN6 PEG_TXN5 PEG_TXN4 PEG_TXN3 PEG_TXN2 PEG_TXN1 PEG_TXN0 PEG_TXP15 PEG_TXP14 PEG_TXP13 PEG_TXP12 PEG_TXP11 PEG_TXP10 PEG_TXP9 PEG_TXP8 PEG_TXP7 PEG_TXP6 PEG_TXP5 PEG_TXP4 PEG_TXP3 PEG_TXP2 PEG_TXP1 PEG_TXP0 70 70 70 70 70 70 70 70 70 70 70 70 70 70 70 70 70 70 70 70 70 70 70 70 70 70 70 70 70 70 70 70 B If Support PCIE Gen3, change AC Cap to 0.22uF A A Title : CPU(1)_DMI,PEG,FDI,CLK,MISC PEGATRON COMPUTER INC Size B 4 3 2 Wing_Cheng Project Name Rev VA70_HW Date: Friday, January 18, 2013 5 Engineer: 1.0 Sheet 3 of 1 96 5 4 3 2 1 +VCCIO_OUT +VCCIO_OUT 1 1 AP32 1 D 1 R0404 25,47 TP_CATERR#_R AN32 AR27 AK31 AM30 AM35 2 R0402 1 R0408 R0402 2 SP0408 1 SP0409 1 2 1SP0403 2 R0402 2 R0402 R0417 21 21 R0418 1 1KOhm2 @ PM_SYNC PWRGOOD SM_DRAMPWROK PLTRSTIN# R1.2 2012/11/08 cost dwon 0ohm G28 H28 2 R0603 CLK_DP_SSC_N_R F27 2 R0603 CLK_DP_SSC_P_R E27 2 R0402 CLK_EXP_N_R D26 2 R0402 CLK_EXP_P_R E26 CLK_DP_N_R CLK_DP_P_R R1.2 2012/11/08 cost dwon 0ohm CATERR# PECI FC1 PROCHOT# THERMTRIP# AT28 H_CPUPWRGD_R AL34 VDDPWRGOOD_R AC10 AT26 SP0410 1 SP0411 1 SP0405 1 SP0404 1 CLK_DP_SSC_N CLK_DP_SSC_P 21 CLK_EXP_N 21 CLK_EXP_P SM_RCOMP_0 SM_RCOMP_1 SM_RCOMP_2 SM_DRAMRST# PRDY# PREQ# TCK TMS TRST# TDI TDO DBR# BPM_N_0 BPM_N_1 BPM_N_2 BPM_N_3 BPM_N_4 BPM_N_5 BPM_N_6 BPM_N_7 DPLL_REF_CLKN DPLL_REF_CLKP SSC_DPLL_REF_CLKN SSC_DPLL_REF_CLKP BCLKN BCLKP CLOCK SP0406 1 SP0407 1 2 25 H_CPUPWRGD PM_DRAM_PWRGD PCH_PLTRST_CPU# 22 25 1 @ 1KOhm 2R0603 2R0603 2 0Ohm 156Ohm H_PROCHOT#_D 1 H_THRMTRIP#_R SP0401 1 H_PM_SYNC_R SP0402 @ R0402 H_PM_SYNC 10KOhm 1 2 2 MISC PWR 2 +VCCIO_OUT H_PROCHOT# H_THRMTRIP# 22 Intel MOW WW14: stuff H_CPUPWRGD PD 10Kohm R1.1 R1.2 2012/11/26 reserved for 2014 processor CLK_DP_N CLK_DP_P 2 Stuff R0408 @ 0.1UF/10V 62Ohm +VCCIO_OUT R0430 R0403 SKTOCC# DDR3 2 T0420 TP_SKTOCC#_R H_PECI H_PECI C0404 21 21 1 THERMAL 25 T0419 +VCCIO_OUT +1.35V_VCCDDQ Haswell rPGA EDS U0301B R0440 100KOhm @ JTAG +1.05VS AP3 SM_RCOMP_0 AR3 SM_RCOMP_1 AP2 SM_RCOMP_2 AN3 AR29 AT29 AM34 AN33 AM33 AM31 AL33 AP33 R0411 2 R0412 2 R0413 2 +3VSUS 1 100Ohm 1 75Ohm 1 100Ohm 1% 1% 1% +3VSUS +3V CPUDRAMRST# 1 1 1 1 1 1 1 1 XDP_PRDY# XDP_PREQ# XDP_TCK XDP_TMS XDP_TRST# XDP_TDI_R XDP_TDO_R H_DBR#_R AR30 AN31 AN29 AP31 AP30 AN28 AP29 AP28 XDP_BPM01 XDP_BPM11 XDP_BPM21 XDP_BPM31 XDP_BPM41 XDP_BPM51 XDP_BPM61 XDP_BPM71 +3V +1.05VS 5 T0403 T0404 T0405 T0406 T0407 T0408 T0409 T0410 6,37,47,63 +1.35V_VCCDDQ 37,43,63,65,91 +1.05VS +VCCIOA_OUT 6 22,23,27,28,30,33,43,61,81,92 25,26,27,47,63,80,82 +VCCIOA_OUT 3,6 D T0411 T0412 T0413 T0414 T0415 T0416 T0417 T0418 SOCKET_947P 12V012BSM001 +VCCIO_OUT @ CLK_DP_SSC_P_R R0419 1 SSC CLOCK TERMINATION Stuff R0445 & R0446 only when SSC clock not used 2 10KOhm CLK_DP_SSC_N_R R0420 1 2 10KOhm @ U0301H T28 U28 T30 U30 U29 V29 U31 V31 C R1.0 PU/PD for JTAG signals 39 39 39 39 39 39 39 39 +1.05VS XDP_TCK R0407 XDP_TRST# R0405 1 1 2 51Ohm 2 51Ohm 2 51Ohm @ @ P29 R29 N28 P28 P31 R31 N30 P30 @ 2 51Ohm 2 51Ohm DDI DDI DDI DDI B +1.35V_VCCDDQ EDP_TXN_0 EDP_TXP_0 EDP_TXN_1 EDP_TXP_1 FDI_TXN_0 FDI_TXP_0 FDI_TXN_1 FDI_TXP_1 DDI C 2 24.9Ohm EDP_DISP_UTIL P35 R35 N34 P34 P33 R33 N32 P32 EDP_TXN0 EDP_TXP0 EDP_TXN1 EDP_TXP1 37 37 37 37 37 R1.2 2012/10/29 option changed from /non_FDI R1.2 2012/12/06 remove R0436~R0439 for GDDR5 DDID_TXDN_0 DDID_TXDP_0 DDID_TXDN_1 DDID_TXDP_1 DDID_TXDN_2 DDID_TXDP_2 DDID_TXDN_3 DDID_TXDP_3 2 2 2 2 R0432 R0433 R0434 R0435 1 1 1 1 0Ohm 0Ohm 0Ohm 0Ohm FDI_TXN0 FDI_TXP0 FDI_TXN1 FDI_TXP1 22 22 22 22 R1.2 2012/10/29 option changed from /FDI B VR_HOT# R0431 1 @ 2 0Ohm 1 80 2 GND Y Vcc=1.65~5.5 @ +1.35V_VCCDDQ @ 3 3 C H_PROCHOT# Q0402 PMBS3904 R0426 1 B 1 1 1 B E 2 C0403 0.22UF/10V @ @ 1 4 A C0402 0.22UF/10V 2 2 VCC @ 2 9.09KOHM 1% R0425 10KOhm U0401 5 0.87 Volt R0424@ 2 1 1 R1.1 1% +VCCIOA_OUT +3VSUS R0421 1.8KOhm 1% R0422 3.3KOHM 2 A Intel MOW WW14: change R0449, R0450 value DP_COMP R0410 1 37 37 37 eDP SOCKET_947P 12V012BSM001 Port B: N/A Port C: HDMI Port D: DP to VGA signals Mapping, check 497750 2 2 1 R0423 1 PM_DRAM_PWRGD 0Ohm 2 EDP_AUXN EDP_AUXP EDP_HPD# +3VSUS 1 R1.2 2012/11/27 design gude and check list use 5% Intel CRB 1% M27 N27 P27 E24 R27 17.4KOhm @ R0427 47KOhm 1% 2 2 1 1 1 DDIC_TXCN_0 DDIC_TXCP_0 DDIC_TXCN_1 DDIC_TXCP_1 DDIC_TXCN_2 DDIC_TXCP_2 DDIC_TXCN_3 DDIC_TXCP_3 EDP_AUXN EDP_AUXP EDP_HPD EDP_RCOMP EDP_DISP_UTIL Intel Comments C0401 47PF/50V @ D 1 VCCST XDP_TMS R0401 XDP_TDI_R R0402 XDP_PREQ# R0406 T34 U34 U35 V35 U32 T32 U33 V33 HDMI_TXN2_PCH HDMI_TXP2_PCH HDMI_TXN1_PCH HDMI_TXP1_PCH HDMI_TXN0_PCH HDMI_TXP0_PCH HDMI_CLKN_PCH HDMI_CLKP_PCH Haswell rPGA EDS DDIB_TXBN_0 DDIB_TXBP_0 DDIB_TXBN_1 DDIB_TXBP_1 DDIB_TXBN_2 DDIB_TXBP_2 DDIB_TXBN_3 DDIB_TXBP_3 3 Q0401 1 2N7002 @ S 2 THRO_CPU THRO_CPU G A 30 Title : CPU(1)_DMI,PEG,FDI,CLK,MISC Power good for +1.35V_VCCDDQ (delay > 15ns) Processor may be damaged if VIH exceeds the maximum voltage for extended periods. SM_DRAMPWROK VIH MAX = 1.0V ; VIH MIN=0.45*VDDQ PEGATRON COMPUTER INC Size Custom Date: 5 4 3 2 Engineer: Wing_Cheng Project Name Rev VA70_HW Friday, January 18, 2013 1.0 Sheet 4 1 of 96 5 4 3 +1.35V +1.35V 2 1 6,16,18,63,83 R0520,R0521 must be grounded. CRB 0.7 16 Haswell rPGA EDS M_A_DQ[63:0] D C M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63 DDR_CA_VREF DDR_WR_VREF01 DDR_WR_VREF02 3 1 DIMM_VREF_CA Q0506 2N7002 R1.2 2012/11/08 cost dwon 0ohm D SP0501 R0603 1 DRAMRST_CNTRL_PCH G 2 18 2 S @ DIMM0_VREF_DQ 1 16,18 SP0502 R0603 3 R1.2 2012/11/28 cost dwon 0ohmQ0502B D @ 5 2 DRAMRST_CNTRL_PCH U0301C SA_DQ_0 SA_DQ_1 SA_DQ_2 SA_DQ_3 SA_DQ_4 SA_DQ_5 SA_DQ_6 SA_DQ_7 SA_DQ_8 SA_DQ_9 SA_DQ_10 SA_DQ_11 SA_DQ_12 SA_DQ_13 SA_DQ_14 SA_DQ_15 SA_DQ_16 SA_DQ_17 SA_DQ_18 SA_DQ_19 SA_DQ_20 SA_DQ_21 SA_DQ_22 SA_DQ_23 SA_DQ_24 SA_DQ_25 SA_DQ_26 SA_DQ_27 SA_DQ_28 SA_DQ_29 SA_DQ_30 SA_DQ_31 SA_DQ_32 SA_DQ_33 SA_DQ_34 SA_DQ_35 SA_DQ_36 SA_DQ_37 SA_DQ_38 SA_DQ_39 SA_DQ_40 SA_DQ_41 SA_DQ_42 SA_DQ_43 SA_DQ_44 SA_DQ_45 SA_DQ_46 SA_DQ_47 SA_DQ_48 SA_DQ_49 SA_DQ_50 SA_DQ_51 SA_DQ_52 SA_DQ_53 SA_DQ_54 SA_DQ_55 SA_DQ_56 SA_DQ_57 SA_DQ_58 SA_DQ_59 SA_DQ_60 SA_DQ_61 SA_DQ_62 SA_DQ_63 SM_VREF SA_DIMM_VREFDQ SB_DIMM_VREFDQ RSVD_AC7 SA_CK_N_0 SA_CK_P_0 SA_CKE_0 SA_CK_N_1 SA_CK_P_1 SA_CKE_1 SA_CK_N_2 SA_CK_P_2 SA_CKE_2 SA_CK_N_3 SA_CK_P_3 SA_CKE_3 SA_CS_N_0 SA_CS_N_1 SA_CS_N_2 SA_CS_N_3 SA_ODT_0 SA_ODT_1 SA_ODT_2 SA_ODT_3 SA_BS_0 SA_BS_1 SA_BS_2 VSS1 SA_RAS# SA_WE# SA_CAS# SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8 SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13 SA_MA_14 SA_MA_15 SA_DQS_N_0 SA_DQS_N_1 SA_DQS_N_2 SA_DQS_N_3 SA_DQS_N_4 SA_DQS_N_5 SA_DQS_N_6 SA_DQS_N_7 SA_DQS_P_0 SA_DQS_P_1 SA_DQS_P_2 SA_DQS_P_3 SA_DQS_P_4 SA_DQS_P_5 SA_DQS_P_6 SA_DQS_P_7 17 AC7 U4 V4 AD9 U3 V3 AC9 U2 V2 AD8 U1 V1 AC8 M7 L9 M9 M10 M8 L7 L8 L10 V5 U5 AD1 M_A_DIM0_CS#0 M_A_DIM0_CS#1 M_A_DIM0_CS#2 M_A_DIM0_CS#3 M_A_DIM0_ODT0 M_A_DIM0_ODT1 M_A_DIM0_ODT2 M_A_DIM0_ODT3 M_A_BS0 16 M_A_BS1 16 M_A_BS2 16 V10 U6 U7 U8 V8 AC6 V9 U9 AC5 AC4 AD6 AC3 AD5 AC2 V6 AC1 AD4 V7 AD3 AD2 M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15 AP15 AP8 AJ8 AF3 J3 E2 C5 C11 AP14 AP9 AK8 AG3 H3 E3 C6 C12 M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7 M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7 Haswell rPGA EDS M_B_DQ[63:0] M_A_DIM0_CLK_DDR#0 M_A_DIM0_CLK_DDR0 M_A_DIM0_CKE0 16 M_A_DIM0_CLK_DDR#1 M_A_DIM0_CLK_DDR1 M_A_DIM0_CKE1 16 M_A_DIM0_CLK_DDR#2 M_A_DIM0_CLK_DDR2 M_A_DIM0_CKE2 16 M_A_DIM0_CLK_DDR#3 M_A_DIM0_CLK_DDR3 M_A_DIM0_CKE3 16 M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 16 M_A_RAS# 16 M_A_WE# 16 M_A_CAS# 16 M_A_A[15:0] M_A_DQS#[7:0] M_A_DQS[7:0] 16 16 16 AR18 AT18 AM17 AM18 AR17 AT17 AN17 AN18 AT12 AR12 AN12 AM11 AT11 AR11 AM12 AN11 AR5 AR6 AM5 AM6 AT5 AT6 AN5 AN6 AJ4 AK4 AJ1 AJ2 AM1 AN1 AK2 AK1 L2 M2 L4 M4 L1 M1 L5 M5 G7 J8 G8 G9 J7 J9 G10 J10 A8 B8 A9 B9 D8 E8 D9 E9 E15 D15 A15 B15 E14 D14 A14 B14 SB_DQ_0 SB_DQ_1 SB_DQ_2 SB_DQ_3 SB_DQ_4 SB_DQ_5 SB_DQ_6 SB_DQ_7 SB_DQ_8 SB_DQ_9 SB_DQ_10 SB_DQ_11 SB_DQ_12 SB_DQ_13 SB_DQ_14 SB_DQ_15 SB_DQ_16 SB_DQ_17 SB_DQ_18 SB_DQ_19 SB_DQ_20 SB_DQ_21 SB_DQ_22 SB_DQ_23 SB_DQ_24 SB_DQ_25 SB_DQ_26 SB_DQ_27 SB_DQ_28 SB_DQ_29 SB_DQ_30 SB_DQ_31 SB_DQ_32 SB_DQ_33 SB_DQ_34 SB_DQ_35 SB_DQ_36 SB_DQ_37 SB_DQ_38 SB_DQ_39 SB_DQ_40 SB_DQ_41 SB_DQ_42 SB_DQ_43 SB_DQ_44 SB_DQ_45 SB_DQ_46 SB_DQ_47 SB_DQ_48 SB_DQ_49 SB_DQ_50 SB_DQ_51 SB_DQ_52 SB_DQ_53 SB_DQ_54 SB_DQ_55 SB_DQ_56 SB_DQ_57 SB_DQ_58 SB_DQ_59 SB_DQ_60 SB_DQ_61 SB_DQ_62 SB_DQ_63 1 R0510 1 R0509 1 R0515 U0301D D AG8 Y4 AA4 AF10 Y3 AA3 AG10 Y2 AA2 AG9 Y1 AA1 AF9 RSVD1 SB_CKN0 SB_CK0 SB_CKE_0 SB_CKN1 SB_CK1 SB_CKE_1 SB_CKN2 SB_CK2 SB_CKE_2 SB_CKN3 SB_CK3 SB_CKE_3 M_B_DIM0_CLK_DDR#0 M_B_DIM0_CLK_DDR0 M_B_DIM0_CKE0 17 M_B_DIM0_CLK_DDR#1 M_B_DIM0_CLK_DDR1 M_B_DIM0_CKE1 17 M_B_DIM0_CLK_DDR#2 M_B_DIM0_CLK_DDR2 M_B_DIM0_CKE2 17 M_B_DIM0_CLK_DDR#3 M_B_DIM0_CLK_DDR3 M_B_DIM0_CKE3 17 P4 R2 P3 P1 SB_CS_N_0 SB_CS_N_1 SB_CS_N_2 SB_CS_N_3 R4 R3 R1 P2 R7 P8 AA9 SB_ODT_0 SB_ODT_1 SB_ODT_2 SB_ODT_3 SB_BS_0 SB_BS_1 SB_BS_2 R10 R6 P6 P7 VSS2 SB_RAS# SB_WE# SB_CAS# SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8 SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 SB_MA_14 SB_MA_15 SB_DQS_N_0 SB_DQS_N_1 SB_DQS_N_2 SB_DQS_N_3 SB_DQS_N_4 SB_DQS_N_5 SB_DQS_N_6 SB_DQS_N_7 SB_DQS_P_0 SB_DQS_P_1 SB_DQS_P_2 SB_DQS_P_3 SB_DQS_P_4 SB_DQS_P_5 SB_DQS_P_6 SB_DQS_P_7 4 S G UM6K1NG1DTN AR15 AT14 AM14 AN14 AT15 AR14 AN15 AM15 AM9 AN9 AM8 AN8 AR9 AT9 AR8 AT8 AJ9 AK9 AJ6 AK6 AJ10 AK10 AJ7 AK7 AF4 AF5 AF1 AF2 AG4 AG5 AG1 AG2 J1 J2 J5 H5 H2 H1 J4 H4 F2 F1 D2 D3 D1 F3 C3 B3 B5 E6 A5 D6 D5 E5 B6 A6 E12 D12 B11 A11 E11 D11 B12 A12 AM3 F16 F13 M_B_DIM0_CS#0 M_B_DIM0_CS#1 M_B_DIM0_CS#2 M_B_DIM0_CS#3 17 17 17 17 M_B_DIM0_ODT0 M_B_DIM0_ODT1 M_B_DIM0_ODT2 M_B_DIM0_ODT3 M_B_BS0 17 M_B_BS1 17 M_B_BS2 17 17 17 17 17 M_B_RAS# 17 M_B_WE# 17 M_B_CAS# 17 M_B_A[15:0] R8 Y5 Y10 AA5 Y7 AA6 Y6 AA7 Y8 AA10 R9 Y9 AF7 P9 AA8 AG7 M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15 AP18 AP11 AP5 AJ3 L3 H9 C8 C14 AP17 AP12 AP6 AK3 M3 H8 C9 C15 M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7 M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 17 17 17 17 17 17 17 17 17 C M_B_DQS#[7:0] M_B_DQS[7:0] 17 17 SOCKET_947P 12V012BSM001 SOCKET_947P 12V012BSM001 2 2 2 1KOhm 1KOhm B R1.0 S3 circuit:- DRAM_RST# to memory should be high during S3 +1.35V 1 1KOhm 1% 1% 1% @ @ @ B R1.0 0209 Change R0508 to 1K ohm R0508 close to DIMM DDR3_DRAMRST# 2 1 0Ohm @ Q0501 2N7002 R0508 1 2 1KOhm CPUDRAMRST#_R 1 G 16,17 R0501 2 S CPU driven VREF path is stuffed by default CRB 0.7 0614-change Q0501 from UM6K1N to 2N7002 D R1.2 2012/11/28 cost dwon 0ohm DIMM1_VREF_DQ 3 6 R0507 1KOhm @ 2 D Q0502A 2 SP0503 R0603 1 G S 2 @ 17,18 1 UM6K1NG1DTN DRAMRST_CNTRL_PCH 1% 4 2 4.99KOhm DRAMRST_CNTRL_PCH @ C0501 0.047UF/16V 2 1 21 CPUDRAMRST# 1 @ R0506 Reserve S3 power reduction schematic If don't support S3 power reduction 1. Unmount R0450, R0452, U0404, R0453, Q0403, C0404, R0455, R0454, C0405 2. Change R0449 to 200ohm from 1kohm, change R0409 to 130ohm from 0ohm - Design Guide 1.0 page 106 A A 3. Unmount Q0501, C0501, R0506, R0504, R0507 4. Mount R0501, change r0508 to 0ohm from 1kohm 5 Unmount Q0701, R0703, R0705, Q0702 6. Mount R0702 and short JP0701 7. Unmount R2232, R2231, Q2203 Title : CPU(2)_DDR3 Engineer: PEGATRON COMPUTER INC Size C Date: 5 4 3 2 Wing_Cheng Project Name Rev VA70_HW 1.0 Sheet Friday, January 18, 2013 1 5 of 96 5 4 3 2 +1.35V_VCCDDQ D Decoupling guide from Intel (SPEC) Decoupling guide from Intel (EE) VDDQ 22uF * 11 pcs (stuff) 10uF * 10 pcs (stuff) 330uF * 2 pcs (stuff) VDDQ 22uF * 2pcs (stuff) 10uF * 2pcs (stuff) 330uF * 1pcs (stuff) Decoupling guide from Intel ( SPEC) Decoupling guide from Intel ( EE) +VCORE 10uF * 11pcs (stuff) 22uF * 19pcs (stuff) 470uF * 4pcs (stuff) +VCORE 10uF * 11 pcs (stuff) 22uF * 19 pcs (stuff) 470uF * 5 pcs (stuff) 1 +1.35V_VCCDDQ +1.35V +1.35V +VCORE +VCORE 4 5,16,18,63,83 9,63,80 +VCCIO_OUT +VCCIO_OUT 4,37,47,63 +VCCIO2PCH +VCCIO2PCH 27 +VCCIOA_OUT +VCCIOA_OUT 3,4 D +VCORE U0301E 22 1 R0608 PS_S3CNTRL_1.5V 2 0Ohm @ K27 L27 T27 V27 @ 1 C0623 @ SIR472DP-T1-GE3 1 1 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 1 @ C0601 10UF/10V @ C0617 10UF/10V @ C0602 10UF/10V 2 1 @ C0613 10UF/10V 2 1 @ C0615 10UF/10V 2 1 @ C0646 10UF/10V 2 1 @ C0643 10UF/10V 2 1 @ C0642 10UF/10V 2 @ C0622 10UF/10V 1 @ C0603 10UF/10V 2 2 1 2 1 1MM_OPEN_M1M2 1 1 JP0602 2 2 vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small 2 1 1 3MM_OPEN_5MIL 1 2 1 1 JP0601 2 CE0602 560UF/2.5V @ AB11 AB2 AB5 AB8 AE11 AE2 AE5 AE8 AH11 K11 N11 N8 T11 T2 T5 T8 W11 W2 W5 W8 @ @ @ @ @ @ @ @ @ CE0601 C0604 C0605 C0614 C0625 C0626 C0606 C0618 C0619 C0621 C0620 C0624 560UF/2.5V22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V 22UF/6.3V + 2 4.2A 2 Default: no support S3 power reduction + 2 8 7 6 D 5 S Q0601 vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small +VCORE C N26 K26 AL27 AK27 +VCCIO_OUT(1---1.05V) output from CPU +VCCIOA_OUT CPU CPU VR CPU VR CPU Unstuff R0622 +VCORE RSVD19 VCC103 RSVD18 RSVD24 2 +VCCIO2PCH VDDQ13 VDDQ12 VDDQ11 VDDQ10 VDDQ9 VDDQ8 VDDQ7 VDDQ6 VDDQ14 VDDQ15 VDDQ5 VDDQ16 VDDQ4 VDDQ17 VDDQ3 VDDQ18 VDDQ2 VDDQ19 VDDQ1 VDDQ20 Intel MOW WW09: renamed +VCCIO_OUT R0601 R1.1 VCCIO2PCH to RSVD 100Ohm R1.2 2012/11/08 R1.2 2012/11/16 1% cost dwon 0ohm follow Intel CRB Place as close to CPU as possible 2VCC_SENSE_R AL35 SP0601 1 R0402 80 VCCSENSE E17 R1.2 2012/11/26 2 +VCCIO_OUT_R AN35 R0603 1 0Ohm follow design guide 1 Placement note: 1. R0602 close to 2. R0603 close to 3. R0605 close to 4. R0608 close to 5. R0607 close to 6. R0611 close to C0644 22UF/6.3V SP0603 1 1 +VCCIO2PCH_R +VCCIOA_OUT_R 2 1 2 1 1 2 2012/11/08 cost dwon 0ohm VR_SVID_ALERT# 2 1 80 R0604 1 0Ohm@ 2 2 R0605 1 0Ohm C0655 4.7UF/6.3V C0657 R0611 22UF/6.3V C0611 @ 75Ohm @ 0.01UF/50V 1% 2 2 1 VR_SVID_CLK 1 1 C0645 22UF/6.3V 2 C0649 22UF/6.3V 2 2 C0651 22UF/6.3V 1 1 1 C0653 22UF/6.3V 2 1 C0648 22UF/6.3V R0613 54.9Ohm 1% R1.2 R0609 130Ohm 1% 80 2 R0402 SP0602 1 VR_SVID_DATA 2 1 C0650 22UF/6.3V 2 1 C0652 22UF/6.3V 2 1 C0654 22UF/6.3V 2 1 C0647 22UF/6.3V 2 2 1 80 R1.2 2012/11/08 cost dwon 0ohm 2 1 R0610 130Ohm 1% +VCORE +VCCIO_OUT 1 +VCCIO_OUT 2 +VCCIO_OUT 2 +VCCIO_OUT R0612 C0612 T0601 0.01UF/50V H_CPU_SVIDALRT# H_CPU_SVIDCLK H_CPU_SVIDDAT 43Ohm 2 R0402 Power team suggestion C0616 22UF/6.3V 1 T0606 1PWR_DEBUG T0602 T0603 T0605 T0604 1 1 1 1 vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small 1 C0627 22UF/6.3V 2 C0607 22UF/6.3V 2 2 C0637 22UF/6.3V 1 1 1 C0639 22UF/6.3V 2 1 C0634 22UF/6.3V 2 1 C0636 22UF/6.3V 2 1 C0640 22UF/6.3V 2 1 C0641 22UF/6.3V 2 1 C0630 22UF/6.3V 2 2 1 B C0608 22UF/6.3V If XDP not implemented, then Route Processor PWR_DEBUG as a test point. This Test point must be clearly labeled(shark bay schematic check list 497750) A23 F22 W32 AL16 J27 AL13 AM28 AM29 AL28 AP35 H27 AP34 AT35 AR35 AR32 AL26 AT34 AL22 AT33 AM21 AM25 AM22 AM20 AM24 AL19 AM23 AT32 VCC_SENSE RSVD27 VCCIO_OUT RSVD25 VCOMP_OUT RSVD30 RSVD29 RSVD26 RSVD28 VIDALERT# VIDSCLK VIDSOUT VSS3 PWR_DEBUG VSS4 RSVD_TP4 RSVD_TP3 RSVD_TP2 RSVD_TP1 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small C0609 22UF/6.3V 2 2 C0633 22UF/6.3V Y25 Y26 Y27 Y28 Y29 Y30 Y31 Y32 Y33 Y34 Y35 1 1 1 C0635 22UF/6.3V 2 1 C0631 22UF/6.3V 2 1 C0629 22UF/6.3V 2 1 C0632 22UF/6.3V 2 1 C0628 22UF/6.3V 2 1 2 2 1 +VCORE C0638 22UF/6.3V C0610 22UF/6.3V vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small vx_c0805_h57_small AA26 AA28 AA34 AA30 AA32 AB26 AB29 AB25 AB27 AB28 AB30 AB31 AB33 AB34 AB32 AC26 AB35 AC28 AD25 AC30 AD28 AC32 AD31 AC34 AD34 AD26 AD27 AD29 AD30 AD32 AD33 AD35 AE26 AE32 AE28 AE30 AG28 AG34 AE34 AF25 AF26 AF27 AF28 AF29 AF30 AF31 AF32 AF33 AF34 AF35 AG26 AH26 AH29 AG30 AG32 AH32 AH35 AH25 AH27 AH28 AH30 AH31 AH33 AH34 AJ25 AJ26 AJ27 AJ28 AJ29 AJ30 AJ31 AJ32 AJ33 AJ34 AJ35 G25 H25 J25 K25 L25 M25 N25 P25 R25 T25 VCC100 VCC99 VCC98 VCC97 VCC96 VCC95 VCC94 VCC93 VCC92 VCC91 VCC90 VCC89 VCC88 VCC87 VCC86 VCC85 VCC84 VCC83 VCC82 VCC81 VCC80 VCC79 VCC78 VCC77 VCC76 VCC75 VCC74 VCC73 VCC72 VCC71 VCC70 VCC69 VCC68 VCC67 VCC66 VCC65 VCC64 VCC63 VCC62 VCC61 VCC60 VCC59 VCC58 VCC57 VCC56 VCC55 VCC54 VCC53 VCC52 VCC51 VCC50 VCC49 VCC48 VCC102 VCC101 VCC47 VCC46 VCC45 VCC44 VCC43 VCC42 VCC41 VCC40 VCC39 VCC38 VCC37 VCC36 VCC35 VCC34 VCC33 VCC32 VCC31 VCC30 VCC29 VCC28 VCC27 VCC26 VCC25 VCC24 VCC23 VCC22 VCC21 VCC20 VCC19 VCC18 RSVD23 RSVD22 RSVD21 RSVD20 +1.35V_VCCDDQ 4 3 2 1 1 5 +1.35V 2 470PF/50V G 2 Haswell rPGA EDS PS_S3CNTRL_1.5V_R VCC11 VCC10 VCC9 VCC8 VCC7 VCC6 VCC5 VCC4 VCC3 VCC2 VCC1 C B U25 U26 V25 V26 VCC17 VCC16 VCC15 VCC14 W26 W27 VCC13 VCC12 SOCKET_947P 12V012BSM001 Cap of 470UF or more place at power schematic A A Title : CPU(4)_PWR PEGATRON COMPUTER INC Size 5 4 3 Wing_Cheng Rev VA70_HW Custom Date: Engineer: Project Name Friday, January 18, 2013 2 1.0 Sheet 6 of 96 1 5 4 3 2 1 D D C C B B A A Title : CPU(4)_PWR Engineer: PEGATRON COMPUTER INC Size C Date: 5 4 3 2 Wing_Cheng Project Name Rev VA70_HW Friday, January 18, 2013 1.0 Sheet 1 7 of 96 5 C B A 2 1 VSS16 VSS127 VSS238 VSS268 VSS279 VSS290 VSS301 VSS312 VSS323 VSS17 VSS28 VSS39 VSS50 VSS61 VSS72 VSS83 VSS94 VSS105 VSS116 VSS128 VSS139 VSS150 VSS161 VSS172 VSS183 VSS194 VSS205 VSS216 VSS227 VSS239 VSS250 VSS260 VSS261 VSS262 VSS263 VSS264 VSS265 VSS266 VSS267 VSS269 VSS270 VSS271 VSS272 VSS273 VSS274 VSS275 VSS276 VSS277 VSS278 VSS280 VSS281 VSS282 VSS283 VSS284 VSS285 VSS286 VSS287 VSS288 VSS289 VSS291 VSS292 VSS293 VSS294 VSS295 VSS296 VSS297 VSS298 VSS299 VSS300 VSS302 VSS303 VSS304 VSS305 VSS306 VSS307 VSS308 VSS309 VSS310 VSS311 VSS313 VSS314 VSS315 VSS316 VSS317 VSS318 VSS319 VSS320 VSS321 VSS322 VSS324 VSS325 VSS326 VSS327 VSS328 VSS329 VSS330 VSS331 VSS332 VSS333 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 AK34 AK5 AL1 AL10 AL11 AL12 AL14 AL15 AL17 AL18 AL2 AL20 AL21 AL23 E22 AL3 AL4 AL5 AL6 AL7 AL8 AL9 AM10 AM13 AM16 AM19 E25 AM32 AM4 AM7 AN10 AN13 AN16 AN19 AN2 AN21 AN24 AN27 AN30 AN34 AN4 AN7 AP1 AP10 AP13 AP16 AP19 AP4 AP7 W25 AR10 AR13 AR16 AR19 AR2 AR22 AR25 AR28 AR31 AR34 AR4 AR7 AT10 AT13 AT16 AT19 AT21 AT24 AT27 AT3 AT30 AT4 AT7 B10 B13 B16 B19 B2 B22 U0301G B34 B4 B7 C1 C10 C13 C16 C19 C2 C22 C24 C26 C28 C30 C32 C34 C4 C7 D10 D13 D16 D19 D22 D25 D27 D29 D31 D33 D35 D4 D7 E1 E10 E13 E16 E4 E7 F10 F11 F12 F14 F15 F17 F18 F20 F21 F23 F24 F26 F28 F30 F32 F34 F4 F6 F7 F8 F9 G1 G11 G2 G27 G29 G3 G31 G33 G35 G4 G5 H10 H26 H6 H7 J11 J26 J28 J30 J32 J34 J6 K1 SOCKET_947P 12V012BSM001 Haswell rPGA EDS VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191 VSS192 VSS193 VSS195 VSS196 VSS197 VSS198 VSS199 VSS200 VSS201 VSS202 VSS203 VSS204 VSS206 VSS207 VSS208 VSS209 VSS210 VSS211 VSS212 VSS213 VSS214 VSS215 VSS217 VSS218 VSS219 VSS220 VSS221 VSS222 VSS223 VSS224 VSS225 VSS226 VSS228 VSS229 VSS230 VSS231 VSS232 VSS233 VSS234 VSS235 VSS236 VSS237 VSS240 VSS241 VSS242 VSS243 VSS244 VSS245 VSS246 VSS247 VSS248 VSS249 VSS251 VSS252 VSS253 VSS254 VSS255 VSS256 VSS257 VSS_SENSE RSVD31 K10 K2 K29 K3 K31 K33 K35 K4 K5 K7 K8 K9 L11 L26 L6 M11 M26 M28 M30 M32 M34 M6 N1 N10 N2 N29 N3 N31 N33 N35 N4 N5 N6 N7 N9 P11 P26 P5 R11 R26 R28 R30 R32 R34 R5 T1 T10 T29 T3 T31 T33 T35 T4 T6 T7 T9 U11 U27 V11 V28 V30 V32 V34 W1 W10 W3 W35 W4 W6 W7 W9 Y11 H11 AL24 F19 T26 AK35 AK33 D C B R1.2 2012/11/08 cost dwon 0ohm Placement note: 1. SP0801 close to CPU SP0801 VSS_SENSE_R 1 R0402 2 VSSSENSE R0802 100Ohm 1% T0801 1 A Title : CPU(3)_CFG,RSVD,GND PEGATRON COMPUTER INC SOCKET_947P 12V012BSM001 Size B 4 3 2 Engineer: Wing_Cheng Project Name Rev VA70_HW Date: Friday, January 18, 2013 5 80 2 D 3 1 U0301F A10 A13 A16 A19 A22 A25 A27 A29 A3 A31 A33 A4 A7 AA11 AA25 AA27 AA31 AA29 AB1 AB10 AA33 AA35 AB3 AC25 AC27 AB4 AB6 AB7 AB9 AC11 AD11 AC29 AC31 AC33 AC35 AD7 AE1 AE10 AE25 AE29 AE3 AE27 AE35 AE4 AE6 AE7 AE9 AF11 AF6 AF8 AG11 AG25 AE31 AG31 AE33 AG6 AH1 AH10 AH2 AG27 AG29 AH3 AG33 AG35 AH4 AH5 AH6 AH7 AH8 AH9 AJ11 AJ5 AK11 AK25 AK26 AK28 AK29 AK30 AK32 E19 4 Haswell rPGA EDS 1.0 Sheet 8 1 of 96 +VCORE U0301I CFG[1:0]: Reserved configuration lane. AT1 AT2 AD10 CFG[2]: PCIE Static Numbering Lane Reversal- CFG[2] is for the 16x - 1: (Default) Normal Operation, Lane # definition matches sockect pin map definition - 0: Lane Numbers Reversed 15 -> 0, 14 -> 1, ... A34 A35 CFG[4]: eDP enable R0901 2 1% 1 49.9Ohm H_CPU_RSVDG26 -1 = Disabled -0 = Enabled +VCORE 1 x8, 2 x4 PCI Express* reserved 2 x8 PCI Express* 1 x16 PCI Express* RSVD_TP18 RSVD_TP19 TESTLO1 RSVD3 RSVD4 RSVD5 VCC104 RSVD_TP13 RSVD_TP12 AL25 R0902 2 C RSVD_TP15 RSVD_TP14 W29 W28 G26 W33 AL30 AL29 F25 C35 B35 CFG[6:5]: PCI Express Port Bifurcation Straps = = = = RSVD_TP17 RSVD_TP16 RSVD2 1% 1 49.9Ohm H_CPU_RSVDW34 T0905 T0906 T0907 T0908 T0910 T0911 T0912 T0914 T0913 T0915 T0917 T0916 T0918 T0919 T0920 T0921 CFG[19:7]: Reserved configuration lane. 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 RSVD_TP20 W30 W31 W34 RSVD_TP21 RSVD_TP22 TESTLO2 +VCORE CFG_0 CFG_1 CFG_2 CFG_3 CFG_4 CFG_5 CFG_6 CFG_7 CFG_8 CFG_9 CFG_10 CFG_11 CFG_12 CFG_13 CFG_14 CFG_15 6,63,80 Haswell rPGA EDS D RSVD_TP11 RSVD_TP10 RSVD_TP9 RSVD_TP8 C23 B23 D24 D23 R1.2 2012/11/26 reserved for 2014 processor PM_PWROK CFG_RCOMP CFG_16 CFG_18 CFG_17 CFG_19 RSVD6 FC2 RSVD7 RSVD8 RSVD9 RSVD10 RSVD11 RSVD12 AT20 AR20 AP20 AP22 AT22 AN22 AT25 AN23 AR24 AT23 AN20 AP24 AP26 AN25 AN26 AP25 1 AT31 AR21 AR23 AP21 AP23 CFG_RCOMP 1 CFG16 1 CFG17 1 CFG18 1 CFG19 49.9Ohm T0922 T0923 T0925 T0924 1 1% RSVD13 RSVD14 NC RSVD15 RSVD_TP7 RSVD_TP6 RSVD_TP5 RSVD16 RSVD17 VSS258 VSS259 AR33 G6 AM27 AM26 F5 AM2 K6 FC_G6 E18 U10 P10 B1 A2 AR1 22,30,92 2 R0908 1 The CFG signals have a default value of '1' D -00 -01 -10 -11 2 2 CFG strapping information: 3 1 4 2 5 R0910 4.7KOhm @ 1% R1.2 2012/11/28 channged from 2.2k/5% R0911 2.2KOhm 1% @ FC signals are signals that are available for compatibility with other processors. A test point may be placed on the board for these lands. Refer to the appropriate platform design guide for implementation details.(haswell EDS 487246) C E21 E20 AP27 AR26 AL31 AL32 SOCKET_947P 12V012BSM001 CFG2 1 1% 2 1KOhm 1 1% 2 1KOhm 1 1% @ 2 1KOhm 1 1% @ 2 1KOhm 1 1% @ 2 1KOhm R0903 B B CFG4 R0905 CFG5 R0904 CFG6 R0906 CFG7 R0907 1 CFG9 1% R0909 2 1KOhm @ A A Title : CPU(3)_CFG,RSVD,GND PEGATRON COMPUTER INC Size Custom Date: 5 4 3 2 Engineer: Wing_Cheng Project Name Rev VA70_HW 1.0 Friday, January 18, 2013 Sheet 1 9 of 96 5 4 3 2 1 D D C C B B A A Title : NB(3)_**** PEGATRON COMPUTER INC Size C Date: 5 4 3 2 Engineer: Wing_Cheng Project Name Rev VA70_HW Friday, January 18, 2013 1.0 Sheet 1 10 of 96 5 4 3 +1.35V M_A_A[15:0] M_A_DQ[63:0] ok 1 T1601 77 122 126 1 ok C1609 2.2UF/6.3V @ RESET# 30 DDR3_DRAMRST# 5,17 C1607 2.2UF/6.3V @ 5 5 M_A_BS2 M_A_BS1 M_A_BS0 79 108 109 1 3 201 197 74 73 M_A_DIM0_CKE3 M_A_DIM0_CKE2 +3VS SMBus Slave Address: A2H DM should connect to GND directly Design Guide 0.9 p86 (436735) SMB_CLK_S SMB_DAT_S 2 RN1602A 10KOhm 4 RN1602B 10KOhm /DGPU /DGPU M_A_DQS7 M_A_DQS#7 M_A_DQS6 M_A_DQS#6 M_A_DQS5 M_A_DQS#5 M_A_DQS4 M_A_DQS#4 M_A_DQS3 M_A_DQS#3 M_A_DQS2 M_A_DQS#2 M_A_DQS1 M_A_DQS#1 M_A_DQS0 M_A_DQS#0 188 186 171 169 154 152 137 135 64 62 47 45 29 27 12 10 187 170 153 136 63 46 28 11 202 200 1 2 1 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 2 1 1 2 2 1 2 C1630 1UF/6.3V @ C1634 1UF/6.3V @ C C1610 0.1UF/10V 4 5 6 7 RESET# 30 1 T1602 PM_EXTTS#0_DIM_A 198 125 Reserve 77 122 EVENT# TEST NC1 NC2 GND1 GND2 NP_NC1 NP_NC2 VTT1 VTT2 +V_VREF_CA_DIMM0 126 1 C1619 2.2UF/6.3V @ C1618 0.1UF/10V /DGPU VREFCA VREFDQ VDDSPD DDR3_DIMM_204P 12V02GBRM001 /DGPU 3 9 14 20 26 32 38 44 49 55 61 66 72 128 134 139 145 151 156 162 168 173 179 185 190 196 +1.35V_DDR3 +0.675VS Layout Note: Place these caps near SO DIMM 0 C1638 10UF/10V /DGPU C1643 10UF/10V @ C1641 10UF/10V @ C1637 10UF/10V @ C1642 1UF/6.3V /DGPU C1639 1UF/6.3V /DGPU C1640 1UF/6.3V @ 2 C1635 10UF/10V /DGPU 1 B C1636 10UF/10V /DGPU 1 VSS2 VSS4 VSS6 VSS8 VSS10 VSS12 VSS14 VSS16 VSS18 VSS20 VSS22 VSS24 VSS26 VSS28 VSS30 VSS32 VSS34 VSS36 VSS38 VSS40 VSS42 VSS44 VSS46 VSS48 VSS50 VSS52 0.1UF/10V 2 VSS1 VSS3 VSS5 VSS7 VSS9 VSS11 VSS13 VSS15 VSS17 VSS19 VSS21 VSS23 VSS25 VSS27 VSS29 VSS31 VSS33 VSS35 VSS37 VSS39 VSS41 VSS43 VSS45 VSS47 VSS49 VSS51 C1614 /DGPU 1 2 8 13 19 25 31 37 43 48 54 60 65 71 127 133 138 144 150 155 161 167 172 178 184 189 195 0.1UF/10V /DGPU 2 Layout Note: Place these caps near SO DIMM 0 C1617 1 1 2 1 2 0.1UF/10V /DGPU DDR3_DIMM_204P 76 VDD112V02GIRM001 VDD2 82 VDD3 VDD4 88 VDD5 VDD6 94 VDD7 VDD8 100 VDD9 VDD10 106 VDD11 VDD12 112 VDD13 VDD14 118 VDD15 VDD16 124 VDD17 VDD18 2 3 0.1UF/10V /DGPU 75 81 87 93 99 105 111 117 123 1 2 SCL SDA C1629 1UF/6.3V C1605 2.2UF/6.3V @ 2 113 110 115 0.1UF/10V 1 M_A_WE# M_A_RAS# M_A_CAS# C1632 1UF/6.3V +3VS C1606 2 120 116 +0.675VS 1 121 114 C1627 10UF/10V @ 199 2 M_A_DIM0_ODT3 M_A_DIM0_ODT2 203 204 1 5 5 C1631 10UF/10V @ 205 206 0.1UF/10V C1612 1 M_A_DIM0_CS#3 M_A_DIM0_CS#2 C1633 10UF/10V @ +1.35V_DDR3 C1616 2 B 5 5 1 M_A_DQ0 M_A_DQ4 M_A_DQ3 M_A_DQ2 M_A_DQ7 M_A_DQ6 M_A_DQ1 M_A_DQ5 M_A_DQ11 M_A_DQ9 M_A_DQ15 M_A_DQ14 M_A_DQ10 M_A_DQ8 M_A_DQ12 M_A_DQ13 M_A_DQ20 M_A_DQ17 M_A_DQ18 M_A_DQ23 M_A_DQ16 M_A_DQ21 M_A_DQ19 M_A_DQ22 M_A_DQ24 M_A_DQ28 M_A_DQ27 M_A_DQ31 M_A_DQ25 M_A_DQ29 M_A_DQ30 M_A_DQ26 M_A_DQ37 M_A_DQ32 M_A_DQ35 M_A_DQ34 M_A_DQ38 M_A_DQ33 M_A_DQ36 M_A_DQ39 M_A_DQ44 M_A_DQ42 M_A_DQ47 M_A_DQ45 M_A_DQ40 M_A_DQ41 M_A_DQ43 M_A_DQ46 M_A_DQ52 M_A_DQ53 M_A_DQ55 M_A_DQ54 M_A_DQ51 M_A_DQ49 M_A_DQ48 M_A_DQ50 M_A_DQ58 M_A_DQ61 M_A_DQ63 M_A_DQ57 M_A_DQ60 M_A_DQ56 M_A_DQ62 M_A_DQ59 C1644 1UF/6.3V @ 207 208 205 206 203 204 +0.675VS +3VS 199 C1620 0.1UF/10V /DGPU C1615 2.2UF/6.3V @ +V_VREF_DQ_DIMM0 1 102 104 101 103 5 M_A_DIM0_CLK_DDR3 5 M_A_DIM0_CLK_DDR#3 5 M_A_DIM0_CLK_DDR2 5 M_A_DIM0_CLK_DDR#2 0 5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194 C1611 2.2UF/6.3V @ 2 @ C1628 10UF/10V CON1602B DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 CK1 DQ18 CK1# DQ19 CK0 DQ20 CK0# DQ21 DQ22 S1# DQ23 S0# DQ24 DQ25 ODT1 DQ26 ODT0 DQ27 DQ28 WE# DQ29 RAS# DQ30 CAS# DQ31 DQ32 BA2 DQ33 BA1 DQ34 BA0 DQ35 DQ36 CKE1 DQ37 CKE0 DQ38 DQ39 SA1 DQ40 SA0 DQ41 DQ42 DQ43 DQS7 DQ44 DQS#7 DQ45 DQS6 DQ46 DQS#6 DQ47 DQS5 DQ48 DQS#5 DDR3_DIMM_204P DQ49 DQS4 DQ50 12V02GBRM001 DQS#4 DQ51 DQS3 DQ52 DQS#3 DQ53 DQS2 DQ54 DQS#2 DQ55 DQS1 DQ56 DQS#1 DQ57 DQS0 DQ58 DQS#0 DQ59 DQ60 DM7 DQ61 DM6 DQ62 DM5 DQ63 DM4 DM3 DM2 DM1 DM0 1 M_A_DIM0_CLK_DDR#3 C1625 10UF/10V R1.2 2012/11/20 Part ref. changed 2 C1623 10PF/50V C1626 10UF/10V 207 208 +1.35V_DDR3 1 2 2 R1603 150Ohm @ 1 1 M_A_DIM0_CLK_DDR3 1BV090000003 2 SCL SDA A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15 +0.675VS Layout Note: Place these caps near SO DIMM 0 @ + CE1603 220UF/6.3V Reference schematic have 2.2 uf cap. 2 2 1 1 2 M_A_DIM0_CLK_DDR#2 @ 98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78 VDDSPD +1.35V_DDR3 +1.35V_DDR3 C1608 CON1602A M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15 VREFCA VREFDQ 3 9 14 20 26 32 38 44 49 55 61 66 72 128 134 139 145 151 156 162 168 173 179 185 190 196 +V_VREF_DQ_DIMM0 H:8mm C1624 10PF/50V NP_NC1 NP_NC2 NC1 NC2 VTT1 VTT2 R1.2 2012/11/20 Part ref. changed R1604 150Ohm @ GND1 GND2 EVENT# TEST +V_VREF_CA_DIMM0 DDR3_DIMM_204P 12V02GIRM001 M_A_DIM0_CLK_DDR2 198 125 PM_EXTTS#0_DIM_A Reserve ok 0.1UF/10V 1 1 2 1 2 ok VSS2 VSS4 VSS6 VSS8 VSS10 VSS12 VSS14 VSS16 VSS18 VSS20 VSS22 VSS24 VSS26 VSS28 VSS30 VSS32 VSS34 VSS36 VSS38 VSS40 VSS42 VSS44 VSS46 VSS48 VSS50 VSS52 D C1604 1 202 200 SMB_CLK_S SMB_DAT_S 7 ok VSS1 VSS3 VSS5 VSS7 VSS9 VSS11 VSS13 VSS15 VSS17 VSS19 VSS21 VSS23 VSS25 VSS27 VSS29 VSS31 VSS33 VSS35 VSS37 VSS39 VSS41 VSS43 VSS45 VSS47 VSS49 VSS51 0.1UF/10V 2 17,28,48,53,55 17,28,48,53,55 DM7 DM6 DM5 DM4 DM3 DM2 DM1 DM0 2 8 13 19 25 31 37 43 48 54 60 65 71 127 133 138 144 150 155 161 167 172 178 184 189 195 C1603 1 DM should connect to GND directly Design Guide 0.9 p86 (436735) 6 Layout Note: Place these caps near SO DIMM 0 ok 76 82 88 94 100 106 112 118 124 2 187 170 153 136 63 46 28 11 C 5 0.1UF/10V VDD2 VDD4 VDD6 VDD8 VDD10 VDD12 VDD14 VDD16 VDD18 2 M_A_DQS#[7:0] DQS7 DQS#7 DQS6 DQS#6 DQS5 DQS#5 DQS4 DQS#4 DQS3 DQS#3 DQS2 DQS#2 DQS1 DQS#1 DQS0 DQS#0 C1602 0.1UF/10V VDD1 VDD3 VDD5 VDD7 VDD9 VDD11 VDD13 VDD15 VDD17 1 188 186 171 169 154 152 137 135 64 62 47 45 29 27 12 10 4 SA1 SA0 C1601 CON1601B 2 M_A_DQS7 M_A_DQS#7 M_A_DQS6 M_A_DQS#6 M_A_DQS5 M_A_DQS#5 M_A_DQS4 M_A_DQS#4 M_A_DQS3 M_A_DQS#3 M_A_DQS2 M_A_DQS#2 M_A_DQS1 M_A_DQS#1 M_A_DQS0 M_A_DQS#0 M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7 M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7 CKE1 CKE0 ok +1.35V_DDR3 75 81 87 93 99 105 111 117 123 1 201 197 1 1 2 5 M_A_DQS[7:0] 2 RN1601A 10KOhm 4 RN1601B 10KOhm 2 1 1 3 SMBus Slave Address: A0H 5 74 73 M_A_DIM0_CKE1 M_A_DIM0_CKE0 BA2 BA1 BA0 2 2MM_OPEN_5MIL +1.35V_DDR3 2 5 5 M_A_BS2 M_A_BS1 M_A_BS0 3 WE# RAS# CAS# JP1602 ok 1 5 5 5 79 108 109 R1.2 2012/11/20 Part ref. changed 2 113 110 115 5 M_A_WE# 5 M_A_RAS# 5 M_A_CAS# ODT1 ODT0 17 2 2 1 120 116 2 S1# S0# 1 3MM_OPEN_5MIL 2 M_A_DIM0_ODT1 M_A_DIM0_ODT0 CK1 CK1# CK0 CK0# 1 1 5 5 121 114 17,63,83 17,20,21,22,23,25,26,27,28,30,33,37,38,39,40,41,43,47,48,49,53,55,60,63,65,66,91,92 +1.35V_DDR3 5 2 M_A_DIM0_CS#1 M_A_DIM0_CS#0 M_A_DQ0 M_A_DQ4 M_A_DQ3 M_A_DQ2 M_A_DQ7 M_A_DQ6 M_A_DQ1 M_A_DQ5 M_A_DQ11 M_A_DQ9 M_A_DQ15 M_A_DQ14 M_A_DQ10 M_A_DQ8 M_A_DQ12 M_A_DQ13 M_A_DQ20 M_A_DQ17 M_A_DQ18 M_A_DQ23 M_A_DQ16 M_A_DQ21 M_A_DQ19 M_A_DQ22 M_A_DQ24 M_A_DQ28 M_A_DQ27 M_A_DQ31 M_A_DQ25 M_A_DQ29 M_A_DQ30 M_A_DQ26 M_A_DQ37 M_A_DQ32 M_A_DQ35 M_A_DQ34 M_A_DQ38 M_A_DQ33 M_A_DQ36 M_A_DQ39 M_A_DQ44 M_A_DQ42 M_A_DQ47 M_A_DQ45 M_A_DQ40 M_A_DQ41 M_A_DQ43 M_A_DQ46 M_A_DQ52 M_A_DQ53 M_A_DQ55 M_A_DQ54 M_A_DQ51 M_A_DQ49 M_A_DQ48 M_A_DQ50 M_A_DQ58 M_A_DQ61 M_A_DQ63 M_A_DQ57 M_A_DQ60 M_A_DQ56 M_A_DQ62 M_A_DQ59 1 5 5 1 5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194 1 102 104 101 103 5 M_A_DIM0_CLK_DDR1 5 M_A_DIM0_CLK_DDR#1 5 M_A_DIM0_CLK_DDR0 5 M_A_DIM0_CLK_DDR#0 0 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 2 M_A_DIM0_CLK_DDR#1 @ A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15 +3VS +1.35V_DDR3 1 JP1601 CON1601A 1 2 C1622 10PF/50V 2 D 1 1 M_A_DIM0_CLK_DDR1 98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78 2 M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15 M_A_DIM0_CLK_DDR#0 +1.35V_DDR3 2 1 1 2 2 5 C1621 10PF/50V +1.35V 2 5,6,18,63,83 +0.675VS +3VS H:4mm @ R1602 150Ohm @ +0.675VS R1.2 2012/11/20 Part ref. changed M_A_DIM0_CLK_DDR0 R1601 150Ohm @ +1.35V C1613 0.1UF/10V /DGPU DDR3_DRAMRST# /DGPU A A Title : DDR3(1)_SO-DIMM0 BG1-CSC-HW R&D Dept.5 Size 4 3 2 Wing_Cheng Rev VA70_HW D Date: 5 Engineer: Project Name Friday, January 18, 2013 1 1.0 Sheet 16 of 96 5 4 3 2 +1.35V +1.35V 1 5,6,16,18,63,83 H:4MM 120 116 113 110 115 5 M_B_WE# 5 M_B_RAS# 5 M_B_CAS# 5 5 5 5 5 SMBus Slave Address: A4H 5 5 M_B_DQS[7:0] 79 108 109 M_B_BS2 M_B_BS1 M_B_BS0 74 73 M_B_DIM0_CKE1 M_B_DIM0_CKE0 1 3 +3VS 2 RN1701A 10KOhm 4 RN1701B 10KOhm M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7 M_B_DQS#[7:0] M_B_DQS7 M_B_DQS#7 M_B_DQS6 M_B_DQS#6 M_B_DQS5 M_B_DQS#5 M_B_DQS4 M_B_DQS#4 M_B_DQS3 M_B_DQS#3 M_B_DQS2 M_B_DQS#2 M_B_DQS1 M_B_DQS#1 M_B_DQS0 M_B_DQS#0 C 188 186 171 169 154 152 137 135 64 62 47 45 29 27 12 10 187 170 153 136 63 46 28 11 DM should connect to GND directly Design Guide 0.9 p86 (436735) 16,28,48,53,55 16,28,48,53,55 201 197 202 200 SMB_CLK_S SMB_DAT_S ODT1 ODT0 WE# RAS# CAS# 3 BA2 BA1 BA0 CKE1 CKE0 4 SA1 SA0 DQS7 DQS#7 DQS6 DQS#6 DQS5 DQS#5 DQS4 DQS#4 DQS3 DQS#3 DQS2 DQS#2 DQS1 DQS#1 DQS0 DQS#0 5 DM7 DM6 DM5 DM4 DM3 DM2 DM1 DM0 7 SCL SDA 6 RESET# 30 ok ok 1 T1701 PM_EXTTS#0_DIM_B 198 125 Reserve 77 122 ok EVENT# TEST NC1 NC2 GND1 GND2 NP_NC1 NP_NC2 VTT1 VTT2 +V_VREF_CA_DIMM1 126 1 ok C1724 2.2UF/6.3V @ VREFCA VREFDQ VDDSPD 0.1UF/10V 2 0.1UF/10V +3VS 16,63,83 16,20,21,22,23,25,26,27,28,30,33,37,38,39,40,41,43,47,48,49,53,55,60,63,65,66,91,92 +1.35V_DDR3 16 C1704 0.1UF/10V D 3 9 14 20 26 32 38 44 49 55 61 66 72 128 134 139 145 151 156 162 168 173 179 185 190 196 +1.35V_DDR3 +1.35V_DDR3 +0.675VS 1 C1748 1UF/6.3V @ 2 1 C1743 1UF/6.3V 2 1 C1746 1UF/6.3V 2 1 C1749 10UF/10V @ 2 1 C1750 10UF/10V @ 2 1 C1745 10UF/10V @ 2 1 C1744 10UF/10V 2 C1742 10UF/10V 1 C1741 10UF/10V 2 1 @ CE1703 220UF/6.3V 2 + 1BV090000003 2 1 Layout Note: Place these caps near SO DIMM 1 C1747 1UF/6.3V @ 207 208 205 206 203 204 +0.675VS +3VS 199 DDR3_DIMM_204P 12V02GISM001 C1723 1 1 VSS2 VSS4 VSS6 VSS8 VSS10 VSS12 VSS14 VSS16 VSS18 VSS20 VSS22 VSS24 VSS26 VSS28 VSS30 VSS32 VSS34 VSS36 VSS38 VSS40 VSS42 VSS44 VSS46 VSS48 VSS50 VSS52 +1.35V_DDR3 C1703 2 1 2 1 2 ok VSS1 VSS3 VSS5 VSS7 VSS9 VSS11 VSS13 VSS15 VSS17 VSS19 VSS21 VSS23 VSS25 VSS27 VSS29 VSS31 VSS33 VSS35 VSS37 VSS39 VSS41 VSS43 VSS45 VSS47 VSS49 VSS51 76 82 88 94 100 106 112 118 124 +0.675VS 1 M_B_DIM0_ODT1 M_B_DIM0_ODT0 S1# S0# 2 8 13 19 25 31 37 43 48 54 60 65 71 127 133 138 144 150 155 161 167 172 178 184 189 195 VDD2 VDD4 VDD6 VDD8 VDD10 VDD12 VDD14 VDD16 VDD18 C1715 0.1UF/10V 2 5 5 121 114 Layout Note: Place these caps near SO DIMM 1 ok VDD1 VDD3 VDD5 VDD7 VDD9 VDD11 VDD13 VDD15 VDD17 1 M_B_DIM0_CS#1 M_B_DIM0_CS#0 2 0.1UF/10V 75 81 87 93 99 105 111 117 123 2 5 5 CK1 CK1# CK0 CK0# 0.1UF/10V C1702 1 102 104 101 103 5 M_B_DIM0_CLK_DDR1 5 M_B_DIM0_CLK_DDR#1 5 M_B_DIM0_CLK_DDR0 5 M_B_DIM0_CLK_DDR#0 M_B_DIM0_CLK_DDR#1 @ 1 ok C1701 2 C1738 10PF/50V 2 2 R1702 150Ohm @ M_B_DQ1 M_B_DQ5 M_B_DQ4 M_B_DQ7 M_B_DQ3 M_B_DQ0 M_B_DQ2 M_B_DQ6 M_B_DQ14 M_B_DQ10 M_B_DQ15 M_B_DQ12 M_B_DQ9 M_B_DQ8 M_B_DQ11 M_B_DQ13 M_B_DQ16 M_B_DQ17 M_B_DQ22 M_B_DQ19 M_B_DQ21 M_B_DQ20 M_B_DQ18 M_B_DQ23 M_B_DQ27 M_B_DQ25 M_B_DQ31 M_B_DQ28 M_B_DQ26 M_B_DQ24 M_B_DQ29 M_B_DQ30 M_B_DQ33 M_B_DQ32 M_B_DQ38 M_B_DQ34 M_B_DQ36 M_B_DQ37 M_B_DQ35 M_B_DQ39 M_B_DQ41 M_B_DQ40 M_B_DQ47 M_B_DQ46 M_B_DQ45 M_B_DQ44 M_B_DQ42 M_B_DQ43 M_B_DQ53 M_B_DQ52 M_B_DQ50 M_B_DQ49 M_B_DQ48 M_B_DQ54 M_B_DQ51 M_B_DQ55 M_B_DQ59 M_B_DQ63 M_B_DQ61 M_B_DQ60 M_B_DQ58 M_B_DQ57 M_B_DQ62 M_B_DQ56 C1714 2.2UF/6.3V @ +V_VREF_DQ_DIMM1 ok DDR3_DRAMRST# 1 1 1 M_B_DIM0_CLK_DDR1 0 5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194 C1722 2.2UF/6.3V @ C1725 C 0.1UF/10V 2 M_B_DIM0_CLK_DDR#0 @ D DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 1 2 2 C1737 10PF/50V +3VS CON1701B CON1701A A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15 +0.675VS +1.35V_DDR3 2 1 1 R1701 150Ohm @ 98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78 +1.35V_DDR3 1 M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15 M_B_DIM0_CLK_DDR0 5 1 M_B_DQ[63:0] 2 M_B_A[15:0] 2 5 5,16 DDR3_DIMM_204P 12V02GISM001 M_B_DIM0_CLK_DDR2 H:8MM 120 116 M_B_WE# M_B_RAS# M_B_CAS# 113 110 115 M_B_BS2 M_B_BS1 M_B_BS0 79 108 109 74 73 M_B_DIM0_CKE3 M_B_DIM0_CKE2 +3VS SMBus Slave Address: A6H 1 3 2 RN1702A 10KOhm 4 RN1702B 10KOhm /DGPU M_B_DQS7 M_B_DQS#7 M_B_DQS6 M_B_DQS#6 M_B_DQS5 M_B_DQS#5 M_B_DQS4 M_B_DQS#4 M_B_DQS3 M_B_DQS#3 M_B_DQS2 M_B_DQS#2 M_B_DQS1 M_B_DQS#1 M_B_DQS0 M_B_DQS#0 201 197 188 186 171 169 154 152 137 135 64 62 47 45 29 27 12 10 DM should connect to GND directly Design Guide 0.9 p86 (436735) 187 170 153 136 63 46 28 11 SMB_CLK_S SMB_DAT_S 202 200 A 2 S1# S0# ODT1 ODT0 WE# RAS# CAS# 3 BA2 BA1 BA0 CKE1 CKE0 4 SA1 SA0 DQS7 DQS#7 DQS6 DQS#6 DQS5 DQS#5 DQS4 DQS#4 DQS3 DQS#3 DQS2 DQS#2 DQS1 DQS#1 DQS0 DQS#0 5 DM7 DM6 DM5 DM4 DM3 DM2 DM1 DM0 7 SCL SDA 6 1 T1702 PM_EXTTS#0_DIM_B 198 125 Reserve 77 122 EVENT# TEST NC1 NC2 GND1 GND2 NP_NC1 NP_NC2 VTT1 VTT2 +V_VREF_CA_DIMM1 126 1 C1732 2.2UF/6.3V @ C1729 0.1UF/10V /DGPU VREFCA VREFDQ VDDSPD DDR3_DIMM_204P 12V02GISM000 /DGPU 1 C1718 1UF/6.3V @ 2 1 C1717 1UF/6.3V /DGPU 2 1 C1716 1UF/6.3V /DGPU 2 1 C1726 10UF/10V @ 2 C1713 10UF/10V @ 1 1 C1712 10UF/10V @ 2 /DGPU 2 /DGPU 1 C1711 10UF/10V /DGPU 2 C1710 10UF/10V 1 C1705 10UF/10V 2 0.1UF/10V 2 C1720 1 1 /DGPU 2 1 0.1UF/10V 2 VSS2 VSS4 VSS6 VSS8 VSS10 VSS12 VSS14 VSS16 VSS18 VSS20 VSS22 VSS24 VSS26 VSS28 VSS30 VSS32 VSS34 VSS36 VSS38 VSS40 VSS42 VSS44 VSS46 VSS48 VSS50 VSS52 1 VSS1 VSS3 VSS5 VSS7 VSS9 VSS11 VSS13 VSS15 VSS17 VSS19 VSS21 VSS23 VSS25 VSS27 VSS29 VSS31 VSS33 VSS35 VSS37 VSS39 VSS41 VSS43 VSS45 VSS47 VSS49 VSS51 C1728 2 1 2 1 DDR3_DRAMRST# 2 30 2 8 13 19 25 31 37 43 48 54 60 65 71 127 133 138 144 150 155 161 167 172 178 184 189 195 VDD2 VDD4 VDD6 VDD8 VDD10 VDD12 VDD14 VDD16 VDD18 C1719 1UF/6.3V @ /DGPU 3 9 14 20 26 32 38 44 49 55 61 66 72 128 134 139 145 151 156 162 168 173 179 185 190 196 B 207 208 205 206 203 204 +0.675VS +3VS 199 C1736 0.1UF/10V /DGPU 1 5 5 121 114 Layout Note: Place these caps near SO DIMM 1 VDD1 VDD3 VDD5 VDD7 VDD9 VDD11 VDD13 VDD15 VDD17 2 M_B_DIM0_ODT3 M_B_DIM0_ODT2 0.1UF/10V 76 82 88 94 100 106 112 118 124 1 M_B_DIM0_CS#3 M_B_DIM0_CS#2 5 5 C1730 /DGPU 75 81 87 93 99 105 111 117 123 2 5 5 CK1 CK1# CK0 CK0# 0.1UF/10V 1 102 104 101 103 5 M_B_DIM0_CLK_DDR3 5 M_B_DIM0_CLK_DDR#3 5 M_B_DIM0_CLK_DDR2 5 M_B_DIM0_CLK_DDR#2 C1735 /DGPU 2 B 1 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 M_B_DQ1 M_B_DQ5 M_B_DQ4 M_B_DQ7 M_B_DQ3 M_B_DQ0 M_B_DQ2 M_B_DQ6 M_B_DQ14 M_B_DQ10 M_B_DQ15 M_B_DQ12 M_B_DQ9 M_B_DQ8 M_B_DQ11 M_B_DQ13 M_B_DQ16 M_B_DQ17 M_B_DQ22 M_B_DQ19 M_B_DQ21 M_B_DQ20 M_B_DQ18 M_B_DQ23 M_B_DQ27 M_B_DQ25 M_B_DQ31 M_B_DQ28 M_B_DQ26 M_B_DQ24 M_B_DQ29 M_B_DQ30 M_B_DQ33 M_B_DQ32 M_B_DQ38 M_B_DQ34 M_B_DQ36 M_B_DQ37 M_B_DQ35 M_B_DQ39 M_B_DQ41 M_B_DQ40 M_B_DQ47 M_B_DQ46 M_B_DQ45 M_B_DQ44 M_B_DQ42 M_B_DQ43 M_B_DQ53 M_B_DQ52 M_B_DQ50 M_B_DQ49 M_B_DQ48 M_B_DQ54 M_B_DQ51 M_B_DQ55 M_B_DQ59 M_B_DQ63 M_B_DQ61 M_B_DQ60 M_B_DQ58 M_B_DQ57 M_B_DQ62 M_B_DQ56 C1734 2.2UF/6.3V @ +V_VREF_DQ_DIMM1 1 M_B_DIM0_CLK_DDR#3 0 5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194 C1733 2.2UF/6.3V @ 2 C1740 10PF/50V @ A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15 +0.675VS Layout Note: Place these caps near SO DIMM 1 +1.35V_DDR3 CON1702B CON1702A 1 2 2 1 1 M_B_DIM0_CLK_DDR3 98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78 2 M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15 1 M_B_DIM0_CLK_DDR#2 @ R1704 150Ohm @ +1.35V_DDR3 +1.35V_DDR3 C1739 10PF/50V 2 2 1 1 2 R1703 150Ohm @ C1727 0.1UF/10V /DGPU A RESET# DDR3_DIMM_204P 12V02GISM000 /DGPU 1202-000R000 (12V02GIRM001) Title : DDR3(2)_SO-DIMM1 BG1-CSC-HW R&D Dept.5 Size Date: 5 4 3 2 Engineer: Wing_Cheng Project Name Rev VA70_HW D Friday, January 18, 2013 1 1.0 Sheet 17 of 96 5 4 3 2 +1.35V_DDR3 DDR3L Vref 1 +1.35V_DDR3 16,17 +V_VREF_CA_DIMM0 +V_VREF_CA_DIMM0 +V_VREF_DQ_DIMM0 +V_VREF_DQ_DIMM0 5,16 +V_VREF_CA_DIMM1 +V_VREF_CA_DIMM1 17 +V_VREF_DQ_DIMM1 +V_VREF_DQ_DIMM1 5,17 16 D D M3: CPU driven VREF path is stuffed be default. M1: VREF_DQ driven by a Voltage Divider Network during Processor power-off +V_VREF_DQ_DIMM0 M3 DIMM0_VREF_DQ +V_VREF_DQ_DIMM1 1 5,16 R1803 0Ohm 2 @ DIMM1_VREF_DQ R1815 1KOhm 1 2 C1804 0.022UF/16V C1805 0.022UF/16V CHKLST, 497750 2 R1808 24.9Ohm 1% 2 R1807 24.9Ohm 1% 2 2 C1802 0.1UF/16V 1 1 1 2 SP1804 R0402 nb_r0402_short_25mil 1 1 R1805 1KOhm 2 1 1 1 2 C1803 0.1UF/16V 1 2 SP1805 R0402 nb_r0402_short_25mil C 1 R1816 1KOhm 1KOhm R1.2 2012/11/08 cost dwon 0ohm R1.2 2012/12/04 change short pin size 2 C +1.35V R1.2 2012/11/08 cost dwon 0ohm R1.2 2012/12/04 R1804 change short pin size 2 2 +1.35V 1 5,17 M1 Intel 0203 M3+M1: Default Recommendation B B +V_VREF_CA_DIMM0 M3 2 +1.35V R1.2 2012/11/08 cost dwon 0ohm R1.2 2012/12/04 change short pin size 1 1 2 SP1803 R0402 nb_r0402_short_25mil R1811 1KOhm CHKLST, 497750 2 2 1 1 R1810 1KOhm C1801 0.1UF/16V +V_VREF_CA_DIMM1 SP1802 R0402 nb_r0402_short_25mil 1 2 SP1801 R0402 nb_r0402_short_25mil DIMM_VREF_CA C1806 0.022UF/16V A 1 2 A 2 1 5 1 2 R1809 24.9Ohm 1% Title : DDR3(3)_CA/DQ Voltage M1 PEGATRON COMPUTER INC Size Custom 4 3 2 Wing_Cheng Project Name Rev VA70_HW Date: Friday, January 18, 2013 5 Engineer: 1.0 Sheet 1 18 of 96 5 4 3 2 1 D D C C B B A A R1.4--2 Title : VID Controller Engineer: PEGATRON COMPUTER INC Size C Date: 5 4 3 2 Wing_Cheng Project Name Rev VA70_HW Friday, January 18, 2013 1.0 Sheet 1 19 of 96 5 4 2012/11/06 工工工工工工 3 2 R1.2 +RTCBAT +3VA T2011 1 T2010 1 2 R2001 1+RTC_BAT 1KOhm +VCC_RTC T2012 1 D2001 1 3 2 1 RTC battery 1 2 增增增增增 J2001 BATT_HOLDER_2P +VCC_RTC C2003 1UF/6.3V 1V/0.2A 3 4 R1.0 0110 GND 12V20GBSM000 GND +VCC_RTC +3VA 27,30,63,65,81,88,93 +3VS +3VS 16,17,21,22,23,25,26,27,28,30,33,37,38,39,40,41,43,47,48,49,53,55,60,63,65,66,91,92 +3VSUS_ORG +12VS +12VS +1.5VS +1.5VS 1 SGL_JUMP JRST2001 2 Shunt GND C2001 1RTC_X1_C 15PF/50V Open (Default) 2 R0402 X2001 32.768KHZ R2002 10MOhm 3 2 T2005 1 GND C2002 T2007 1 R2023 1 RTC_X2 B4 1 R2020 +VCC_RTC 1% 2 330KOhm 5% 1 20KOhm 1 2 1 1UF/6.3V JRST2002 SGL_JUMP 41 ACZ_SYNC_AUD 41 @ 2 1 C2004 41,42 2 33Ohm R2011 1 R2012 1 2 33Ohm R2015 1 2 33Ohm 30 Request by CSC for CMOS clear function CMOS Settings Clear CMOS Keep CMOS SPKR HDA_SDI0 41 JRST2002 G22 ACZ_SDOUT_AUD 30 R20311 2 10KOhm R20131 2 33Ohm B17 HDA_SDI3 2 10KOhm R2017 R1.1 SATA_TXN4/PETN1 SATA_TXP4/PETP1 HDA_SDO SATA_RXN5/PERN2 SATA_RXP5/PERP2 DOCKEN#/GPIO33 C22 EXT_SCI# 1 Shunt Open (Default) A24 HDA_DOCK_EN# SATA_RXN4/PERN1 SATA_RXP4/PERP1 HDA_SDI2 F22 ACZ_SDOUT SATA_TXN_3 SATA_TXP_3 HDA_SDI1 Remove TP PCH_FLASH_DESCRIPTOR SATA_RXN_3 SATA_RXP_3 HDA_RST# L22 K22 R1.2 2012/12/03 Add R2031 SATA_TXN_2 SATA_TXP_2 HDA_SYNC C24 ACZ_RST# ACZ_SDIN0_AUD SATA_RXN_2 SATA_RXP_2 HDA_BCLK AL10 GND SATA_TXN_1 SATA_TXP_1 RTCRST# A22 SB_SPKR ACZ_RST#_AUD INTVRMEN B25 ACZ_SYNC SATA_RXN_1 SATA_RXP_1 INTRUDER# D9 ACZ_BCLK SATA_TXN_0 SATA_TXP_0 AZALIA 41 GND ACZ_BCLK_AUD SRTCRST# A8 RTC_RST# 41 RTCX2 G10 PCH_INTVRMEN SATA_RXN_0 SATA_RXP_0 RTCX1 B9 SM_INTRUDER# 2 C B5 SRTC_RST# GND T2006 1 2 R2021 07V080000003 1 15PF/50V RTC_X1 SATA 2 LPT_PCH_M_EDS U2001A @ 4 1MOhm 26,27 RTC GND +VTT_PCH_VCCIO SP2002 1 2 GND 21,22,24,26,27,41,53,55,63,84 2 1UF/6.3V JRST2001 2 C2005 2 2 1 1 Clear ME RTC Registers Keep ME RTC Registers 28,39,41,63,91 1 TPM Settings 1 5% 20KOhm 1 RTCRST# RC delay should be 18ms~25ms 21,22,24,25,26,27 D Connector Type 1217-001L000 +VTT_PCH_VCCIO 2 R2018 22,27 +3VA +3VSUS_ORG 2 D +VCC_RTC 1 HDA_DOCK_RST#/GPIO13 SATA_TXN5/PETN2 SATA_TXP5/PETP2 +3VSUS_ORG SATA_RCOMP SATALED# PCH_INTVRMEN 330KOhm 2 1% @ 1 PCH_JTAG_TCK_BUF AB3 T2002 1 PCH_JTAG_TMS AD1 T2003 1 T2004 1 GND R2027 1 PCH_JTAG_TDI AE2 PCH_JTAG_TDO AD3 @ 2 0Ohm R1.2 2012/11/28 follow Intel design guide 1 R2028 B T2008 1 SATA0GP/GPIO21 JTAG_TMS SATA1GP/GPIO19 JTAG_TDI F8 C26 PM_TEST_RST_N JTAG_TCK JTAG INTVRMEN: Integrated SUS 1.05V VRM Enables Low: Enable External VRs High:Enable Internal VRs T2001 SATA_IREF JTAG_TDO TP9 TP25 TP8 BC8 BE8 SATA_RXN0 SATA_RXP0 AW8 AY8 60 60 SATA_TXN0 SATA_TXP0 60 60 HDD1 BC10 BE10 AV10 AW10 BB9 BD9 SATA_RXN2 SATA_RXP2 60 60 AY13 AW13 SATA_TXN2 SATA_TXP2 60 60 ODD C BC12 BE12 AR13 AT13 R1.3 2013/1/11 mSATA move to port 4 BD13 BB13 SATA_RXN4 SATA_RXP4 53 53 AV15 AW15 SATA_TXN4 SATA_TXP4 53 53 BC14 BE14 SATA_RXN5 SATA_RXP5 60 60 SATA_TXN5 SATA_TXP5 60 60 AP15 AR15 AY5 SATA_COMP R2026 AP3 AT1 AU2 Int. PU 1 1 2 7.5KOhm 2 10KOhm R2024 SATA_LED# 1 SP2001 2 HDD2 +1.5VS +3VS SATA_DET0_R_N BBS_BIT0_R mSATA 66 T2009 1 R0402 BBS_BIT0 23 BD4 BA2 R2016 2 1 0Ohm +1.5VS BB2 TP22 B AB6 TP20 GND DH82LPMS 02V000000012 HDA_DKEN : Flash Descriptor Security Overide H = Disabled (Default) L = Enabled 的 Note : Rising edge of PWROK HDA_DOCK_EN# JRST2003 1MM_OPEN_M1M2 1 2 1 2 電電，參參參參(43K ohm)和check list(10K ohm))寫的寫寫??先先參參參參 SATA0GP pull up 2 R2030 1 1KOhm @ +3VS Strap information: HDA_SPKR: No reboot strap Low: Disable (Default) High:Enable SB_SPKR R2019 1 @ 2 1KOhm +3VS HDA_SDO: 1.Flash descriptor security: Sampled Low: in effect. Sampled High: override ACZ_SDOUT R2022 1 @ 2 1KOhm +3VSUS_ORG 1 SATA_DET0_R_N R2025 2 10KOhm @ 2.HDA_SDO which sample high on the rising edge of PWROK Will also disable Intel ME. A A HDA_DOCK_EN#: Reserved [0216] : ACZ_SYNC strap is no longer supported on LPT, by Intel FAE Stu. Title : PCH(1)_SATA,IHDA,RTC,LPC Engineer: PEGATRON COMPUTER INC Size C Date: 5 4 3 2 Wing_Cheng Project Name Rev VA70_HW Friday, January 18, 2013 1.0 Sheet 1 20 of 96 5 4 3 2 +3VS +3VS +1.5VS +1.5VS +3VSUS_ORG 40 CLK_REQ1_CR# CLK_PCIE_mSATA#_PCH CLK_PCIE_mSATA_PCH CLK_REQ2_PCIE_mSATA# 1 1 SP2119 2 1 2 R0402 CLK_PCH_SRC2_N AB43 SP2105 1 2 R0402 CLK_PCH_SRC2_P AB45 SP2106 1 2 R0402 CLK_REQ2# SP2101 1 SP2102 1 SP2103 1 2 R0402 2 R0402 2 R0402 SP2107 1 SP2108 1 SP2109 1 33 CLK_PCIE_LAN# 33 CLK_PCIE_LAN 33 CLK_REQ4_LAN# 2 R0402 2 R0402 2 R0402 1 1 1 T2116 T2117 T2118 1 1 1 PEGB_CLKRQ#/GPIO56 CLKOUT_PCIE_N_2 CLKOUT_DMI CLKOUT_PCIE_P_2 CLKOUT_DMI_P PCIECLKRQ2#/GPIO20/SMI# 1 CLK_PCH_SRC7_N AJ44 T2115 1 CLK_PCH_SRC7_P AJ42 T2111 1 CLK_REQ7# Y3 T2132 1 CLK_XDP_N AH43 T2131 1 22Ohm LPCCLK 30 CLK_KBCPCI_PCH CLK_PCI_FB 22Ohm C 65 22Ohm PCIECLKRQ7#/GPIO46 1 R2128 1 R2129 2 1 R2130 1 CLKOUTFLEX0/GPIO64 CLKOUT_ITPXDP_P CLKOUTFLEX1/GPIO65 CLKOUT_33MHZ0 CLKOUTFLEX2/GPIO66 E44 CLK_PCI_FB_R CLKOUT_33MHZ1 CLKOUTFLEX3/GPIO67 B42 CLK_KBCPCI_PCH_R CLKOUT_33MHZ2 ICLK_IREF F41 CLK_DEBUG_R CLKOUT_33MHZ3 A40 CLK_DBG_R XTAL25_OUT XTAL25_IN CLKOUT_ITPXDP D44 CLKOUT_PCI0_R CLKIN_SATA CLKIN_SATA_P REFCLK14IN CLKIN_33MHZLOOPBACK CLKOUT_PCIE_P_7 TP19 TP18 CLKOUT_33MHZ4 2 T2130 2 2 22Ohm CLK_DEBUG 1 R2132 CLKIN_DOT96N CLKIN_DOT96P CLKOUT_PCIE_N_7 AH45 CLK_XDP_P /TPM 2 CLKIN_GND CLKIN_GND_P CLKOUT_PCIE_N_6 CLKOUT_PCIE_P_6 PCIECLKRQ6#/GPIO45 100MHz 43 CLKIN_DMI CLKIN_DMI_P CLKOUT_PCIE_N5 CLKOUT_PCIE_P_5 PCIECLKRQ5#/GPIO44 AB40 AB39 AE4 T2114 CLKOUT_DPNS CLKOUT_DPNS_P CLKOUT_PCIE_N_4 CLKOUT_PCIE_P_4 PCIECLKRQ4#/GPIO26 AE44 AE42 AA2 CLK_PCH_SRC6_N CLK_PCH_SRC6_P CLK_REQ6# CLKOUT_DP CLKOUT_DP_P CLKOUT_PCIE_N_3 CLKOUT_PCIE_P_3 PCIECLKRQ3#/GPIO25 AF43 AF45 V3 CLK_PCH_SRC5_N CLK_PCH_SRC5_P CLK_REQ5# T2134 T2133 T2135 PCIECLKRQ1#/GPIO18 AD43 AD45 T3 CLK_PCH_SRC4_N CLK_PCH_SRC4_P CLK_REQ4# CLKOUT_PEG_B CLKOUT_PEG_B_P AF3 CLK_PCH_SRC3_N CLK_PCH_SRC3_P CLK_REQ3# PEGA_CLKRQ#/GPIO47 CLKOUT_PCIE_N_1 CLKOUT_PCIE_P_1 AF1 CLK_REQ1# CLKOUT_PEG_A_P PCIECLKRQ0#/GPIO73 CLK_PCH_SRC1_N AA44 CLK_PCH_SRC1_P AA42 SP2104 1 55 CLK_PCIE_WLAN#_PCH 55 CLK_PCIE_WLAN_PCH 55 CLK_REQ3_WLAN# CLKOUT_PCIE_P_0 AB1 CLK_REQ0# SP2117 2 SP2118 2 1 DIFFCLK_BIASREF CLOCK SIGNAL C2103 10PF/50V @ AB35 CLK_PCIE_PEG#_PCH_L SP2113 1 2 R0402 AB36 CLK_PCIE_PEG_PCH_L SP2114 1 2 R0402 CLK_PCIE_PEG_PCH AF6 CLK_REQ_PEG_A# SP2112 1 2 R0402 CLKREQ_PEG# Y39 CLK_PCH_PEG_B_N 1 T2109 Y38 CLK_PCH_PEG_B_P 1 T2110 CLK_PCIE_PEG#_PCH 70 70 70 CLK_BUF_CPYCLK_N CLK_BUF_CPYCLK_P 1 3 2 10KOhm 4 10KOhm RN2108A RN2108B CLK_BUF_EXP_N CLK_BUF_EXP_P CLK_BUF_DOT96_N CLK_BUF_DOT96_P CLK_BUF_CKSSCD_N CLK_BUF_CKSSCD_P 1 3 1 3 3 1 2 10KOhm 4 10KOhm 2 10KOhm 4 10KOhm 4 10KOhm 2 10KOhm RN2109A RN2109B RN2110A RN2110B RN2111B RN2111A R2101 1 CLK_BUF_REF14 2 10KOhm D U4 1 CLK_REQ_PEG_B# CLOCK TERMINATION for FCIM Default power-on mode is ICC. T2105 AF39 CLK_EXP_N AF40 CLK_EXP_P AJ40 AJ39 4 100MHz CLK_DP_SSC_N CLK_DP_SSC_P AF35 AF36 CLK_DP_N CLK_DP_P AY24 AW24 CLK_BUF_EXP_N CLK_BUF_EXP_P CLK_DP_N CLK_DP_P AR24 AT24 CLK_BUF_CPYCLK_N CLK_BUF_CPYCLK_P H33 G33 CLK_BUF_DOT96_N CLK_BUF_DOT96_P BE6 BC6 CLK_BUF_CKSSCD_N CLK_BUF_CKSSCD_P F45 D17 CLK_BUF_REF14 CLK_PCI_FB 4 4 4 4 +3VS 135MHz 135MHz XTAL25_OUT XTAL25_IN C40 DGPU_EDID_SELECT# 1 T2113 F38 CLK_OUT1 1 T2128 F36 CLK_OUT2 1 T2126 F39 DGPU_PRSNT# 1 T2127 AM45 ICLK_IREF SP21201 2 2 C2102 12PF/50V 1 2 XTAL25_OUT_C GND X2101 25MHZ 2 DIFFCLK_BIASREF R2107 1 2 10KOhm DGPU_EDID_SELECT# R2113 1 DGPU_PRSNT# R2106 1 /UMA 2 10KOhm DGPU_PRSNT# R2109 1 /DGPU 2 10KOhm 2 10KOhm @ PCH CLKREQ Setting: Not connected to device. GND +3VSUS_ORG 4 C2101 12PF/50V 1 2 GND 07V080000010 R2116 CLK_REQ4_LAN# R2117 1 2 10KOhm CLK_REQ0# R2118 1 2 10KOhm CLK_REQ3_WLAN# R2133 @ 1 R1.2 2012/12/17 Add R2133 2 10KOhm NB_R0402_20MIL_SMALL +1.5VS R1.2 2012/11/28 R1.2 2012/12/04 cost dwon 0ohm change short pin size AD39 AD38 AN44 INT_SERIRQ GND SP2111 R0402 1 AL44 AM43 GND 4 1 1 CLK_PCIE_CR#_PCH CLK_PCIE_CR_PCH CLKOUT_PEG_A 3 T2101 40 40 CLKOUT_PCIE_N_0 1 53 Y45 1MOhm 53 Y43 CLK_PCH_SRC0_P 2 53 CLK_PCH_SRC0_N 1 27 R2111 D 1 T2104 20,22,24,25,26,27 +VCCAXCK_VRM LPT_PCH_M_EDS U2001C T2102 20,22,24,26,27,41,53,55,63,84 +3VSUS_ORG +VCCAXCK_VRM 1 16,17,20,22,23,25,26,27,28,30,33,37,38,39,40,41,43,47,48,49,53,55,60,63,65,66,91,92 1 1% 2 7.5KOhm +VCCAXCK_VRM DH82LPMS 02V000000012 CLK_REQ6# R2121 1 2 10KOhm CLK_REQ5# R2122 1 2 10KOhm CLK_REQ7# R2123 1 2 10KOhm CLK_REQ_PEG_B# R2124 1 2 10KOhm CLK_REQ_PEG_A# R2125 1 2 10KOhm C GND DGPU_PWR_EN is active high Connected to device. U2001D LPT_PCH_M_EDS R1.1 LPC_AD0 30,43,65 LPC_AD1 30,43,65 LPC_AD2 30,43,65 LPC_AD3 30,43,65 A20 C20 A18 C18 B21 LPC_FRAME# D21 B T2121 30,43,65 INT_SERIRQ 1 SNN_LPC_DRQ#1 G20 Serial Interrupt Request AL11 SMBALERT#/GPIO11 LAD_0 SMBus SMBCLK LAD_1 LAD_2 SMBDATA LPC 30,43,65 SML0ALERT#/GPIO60 LAD_3 SML0CLK LFRAME# SML0DATA LDRQ0# SML1ALERT#/PCHHOT#/GPIO74 LDRQ1#/GPIO23 SML1CLK/GPIO58 SERIRQ SML1DATA/GPIO75 N7 R10 U11 ELAN_ALERT# SCL_3A SDA_3A SCL_3A 28 SDA_3A 28 N8 DRAMRST_CNTRL_PCH U8 SML0_CLK 1 T2120 R7 SML0_DAT 1 T2122 SCL_3A 1 T2136 SDA_3A 1 T2137 SML1ALERT# K6 SML1_CLK N11 1 5 AJ7 PCH_SPICS0# 28,30 PCH_SPICS1# PCH_SPICS1# AL7 AJ10 28,30 PCH_SPISI 28,30 PCH_SPISO 28,30 28,30 SPI_WP_IO2 SPI_HOLD#_IO3 AH1 AH3 AJ4 AJ2 SPI_CLK CL_CLK SPI 28 AJ11 PCH_SPICLK C-Link CL_DATA SPI_CS0# CL_RST# TP1 SPI_MOSI Thermal TP2 SPI_MISO TP4 SPI_IO2 TP3 SPI_IO3 R2119 1 2 10KOhm 1 R2120 +3VS 2 10KOhm 2 10KOhm CLK_REQ6# R2114 1 @ 2 10KOhm RN2103B 4 3 2.2KOhm SDA_3A RN2103A 2 1 2.2KOhm CLK_REQ4_LAN# R2112 1 @ 2 10KOhm 2 1KOhm CLK_REQ3_WLAN# R2110 1 @ 2 10KOhm CLK_REQ2# R2126 1 @ 2 10KOhm CLK_REQ1# R2127 1 @ 2 10KOhm R2104 1 SML1_DAT SML1_CLK 28 SML0_CLK SML1_DAT 28 SML0_DAT AF11 1 T2123 AF10 1 T2124 SML1_DAT AF7 1 3 1 1 3 2.2KOhm 2.2KOhm 2.2KOhm 2.2KOhm 4 RN2104B 2 RN2104A 2 RN2105A 4 RN2105B SML1ALERT# R2105 1 2 10KOhm ELAN_ALERT# R2131 1 2 10KOhm B GND T2125 BA45 BC45 BE43 BE44 AY43 1 TD_IREF 1 T2112 SPI_CS1# SPI_CS2# CLK_REQ2# R2108 SCL_3A SML1_CLK 28,30 CLK_REQ1# +3VSUS_ORG DRAMRST_CNTRL_PCH H6 CLK_REQ3_WLAN# 48 DRAMRST_CNTRL_PCH 換換+3VS R1.2 2012/12/13 WLAN clk pull-high Debug It must be 8.2k ohm 1% ??? 2 R2103 8.06KOhm GND A A DH82LPMS 02V000000012 Title : PCH(2)_PCIE,CLK,SMB,PEG Engineer: BG1\CORE Size Custom Date: 5 4 3 2 Wing_Cheng Project Name Rev VA70_HW 1.1 Friday, January 18, 2013 Sheet 1 21 of 96 5 4 3 2 1 +3VSUS_ORG +3VS +1.5VS +VCC_RTC D AW22 AR20 DMI_RXN0 DMI_RXN1 3 3 DMI_RXN2 DMI_RXN3 AP17 AV20 3 3 DMI_RXP0 DMI_RXP1 AY22 AP20 3 3 DMI_RXP2 DMI_RXP3 AR17 AW20 3 3 DMI_TXN0 DMI_TXN1 BD21 BE20 3 3 DMI_TXN2 DMI_TXN3 BD17 BE18 3 3 DMI_TXP0 DMI_TXP1 BB21 BC20 3 3 DMI_TXP2 DMI_TXP3 BB17 BC18 R2225 +1.5VS 2 1 0Ohm DMI_IREF BE16 AW17 AV17 If SUSWARN #/SUS_ACK # handshake is not used, these signals are tied on the board R2231 +1.5VS R1.2 2012/11/06 工工工工工工 T2211 1 1 SP2208 1 R2203 2 SUS_PWR_ACK_R SUSACK#_PCH R2205 +3VS T2212 SYS_PWROK 1 9,30,92 PM_PWROK 4 @ 2 2 R0402 1 0Ohm DMI_RCOMP SUSACK#_R AY17 R6 1 10KOhm PM_SYSRST#_R AM1 SP2209 1 2 R0402 SYS_PWROK_R AD7 SP2205 1 2 R0402 PM_PCH_PWROK_R F10 SP2212 1 2 R0402 PM_APWROK_R AB7 H3 PM_DRAM_PWRGD SP2206 1 2 R0402 PM_RSMRST_R J2 ME_SUSPWRDNACK SP2210 1 2 R0402 SUS_PWR_ACK_R J4 30 PM_PWRBTN# SP2207 1 2 R0402 30 ME_AC_PRESENT SP2211 1 2 R0402 PM_RSMRST# has pull down 10k ohm in EC 30 30 C 2 7.5KOhm PM_RSMRST# K1 AC_PRESENT_R T2201 1 T2202 1 BATLOW# E6 K7 N4 RI# AB10 T2203 1 SLP_WLAN# D2 FDI_RXN_0 DMI_RXN_2 DMI_RXN_3 FDI_RXN_1 DMI_RXP_0 DMI_RXP_1 FDI_RXP_0 FDI FDI_RXP_1 DMI_RXP_2 DMI_RXP_3 DMI TP16 DMI_TXN_0 DMI_TXN_1 TP5 TP15 DMI_TXN_2 DMI_TXN_3 TP10 DMI_TXP_0 DMI_TXP_1 FDI_CSYNC FDI_INT DMI_TXP_2 DMI_TXP_3 FDI_IREF DMI_IREF TP17 TP12 TP13 TP7 FDI_RCOMP FDI_TXN0 AL35 FDI_TXN1 4 AJ36 FDI_TXP0 4 AL36 FDI_TXP1 4 20,21,24,26,27,41,53,55,63,84 +VCC_RTC 20,27 4,23,27,28,30,33,43,61,81,92 +5VSUS +5VSUS 30,60,61,63,65,66,83,91 +3VA AJ35 16,17,20,21,23,25,26,27,28,30,33,37,38,39,40,41,43,47,48,49,53,55,60,63,65,66,91,92 +1.5VS +3VSUS +VCCDSW DMI_RXN_0 DMI_RXN_1 +3VS 20,21,24,25,26,27 +3VSUS +12VSUS LPT_PCH_M_EDS U2001B 3 3 +3VSUS_ORG +12VSUS +VCCDSW +3VA 28,33,55,60,81,91 27 20,27,30,63,65,81,88,93 4 D AV43 AY45 AV45 AW44 AL39 FDI_CSYNC_R SP2213 1 AL40 FDI_INT_R SP2201 1 AT45 2 R0402 FDI_CSYNC 2 R0402 0Ohm FDI_IREF FDI_INT 1 2 1 2 7.5KOhm 3 3 R2226 +1.5VS AU42 AU44 AR44 R2230 FDI_RCOMP +1.5VS R1.2 2012/10/29 option changed from /FDI R1.2 2012/12/19 option changed from /non_RETINA DMI_RCOMP SUSACK# DSWVRMEN SYS_RESET# System Power Management DPWROK SYS_PWROK WAKE# PWROK CLKRUN# APWROK SUS_STAT#/GPIO61 DRAMPWROK SUSCLK/GPIO62 RSMRST# SLP_S5#/GPIO63 SUSWARN#/SUSPWRNACK/GPIO30 SLP_S4# PWRBTN# SLP_S3# ACPRESENT/GPIO31 SLP_A# BATLOW#/GPIO72 SLP_SUS# RI# PMSYNCH TP21 DH82LPMS SLP_LAN# C8 DSWODVREN L13 PCH_DPROK R2208 R2207 1 1 @ SP2214 1 2 330KOhm 2 330KOhm 2 R0402 GND +VCC_RTC DSWODVREN - On Die DSW VR Enable HIGH - Enabled(DEFAULT) ; LOW-Disabled PM_RSMRST_R K3 PCIE_WAKE# 33,53 AN7 PM_CLKRUN# U7 SUS_STAT Y6 SUSCLK_C Y7 SLP_S5# C6 SLP_S4#_R SP2202 1 2 R0402 PM_SUSC# 30 H1 SLP_S3#_R SP2203 1 30 ME_PM_SLP_A#_R 2 R0402 T2209 1 PM_SUSB# F3 F1 SLP_DSW#_R SLP_SUS# 30 PM_CLKRUN# T2206 1 T2205 1 T2204 1 R2210 2 @ 1 0Ohm AY3 G5 43 H_PM_SYNC ME_PM_SLP_LAN#_R 1 C i-AMT 4 T2210 i-AMT SLP_WLAN#/GPIO29 02V000000012 R1.2 2012/12/17 U2201 @ R2204 mount SYS_PWROK for PCH R2204 2 1 0Ohm +3VSUS U2201 1 A PM_PWROK 92 VCC +3VSUS_ORG 5 2 B DELAY_VR_AND_ALL_SYS 3 GND 4 SYS_PWROK Y Vcc=2~5.5 @ B R2206 2 PCIE_WAKE# R2232 1 2 10KOhm ME_AC_PRESENT BATLOW# R2234 1 R2233 1 2 10KOhm 2 10KOhm ME_PM_SLP_A#_R R2217 1 ME_SUSPWRDNACK R2218 1 2 10KOhm RI# R2214 1 2 10KOhm ME_PM_SLP_LAN#_R R2220 1 B 1 0Ohm @ +3VS R2212 1 PM_PWROK R2213 1 2 8.2KOhm 5% R2222 100KOhm @ PCH_DPROK R2235 1 2 100KOhm GND SUSCLK_C 1 @ 2 1KOhm PLL ON DIE VR ENABLE GND HIGH - ENABLED LOW - DISABLED (DEFAULT @ 2 10KOhm SP2204 1 SUSB_EC# PM_SUSB# R2224 2 R0402 2 1 0Ohm Q2201A UM6K1N @ 2 1 23,30,63,91,92 6 4 Q2201B UM6K1N @ 5 R2229 6 2 10KOhm 3 PS_S3CNTRL_1.5V @ 2 10KOhm @ 1 2 R2223 10KOhm @ 2 R2221 10KOhm @ PM_CLKRUN# +12VSUS 2 +5VSUS 1 1 +3VSUS /TPM @ GND A GND A Title : PCH(3)_FDI,DMI,SYS PWR PEGATRON COMPUTER INC Size Custom Date: 5 4 3 2 Engineer: Wing_Cheng Project Name Rev VA70_HW 1.0 Friday, January 18, 2013 Sheet 1 22 of 96 5 4 3 2 +3VS R1.2 2012/10/29 option changed from /non_FDI_@ R1.2 2012/12/06 remove R2335~R2337, R2339~R2341, JP2304~JP2306 for GDDR5 CRT_B_PCH 50 ohm JP2301 2 1 SHORT_PIN 37.5 ohm B_PCH T45 38 DAC_G_PCH CRT_G_PCH 50 ohm JP2302 2 1 SHORT_PIN 37.5 ohm G_PCH U44 38 DAC_R_PCH CRT_R_PCH 50 ohm JP2303 2 1 SHORT_PIN 37.5 ohm R_PCH V45 VGA_BLUE DDPB_CTRLCLK VGA_GREEN DDPB_CTRLDATA VGA_RED 2 1KOhm 2 @ 1 R2318 LCD_VDD_EN_PCH DGPU_PWM_SELECT# 2 10KOhm +3VS 10KOhm 2 /DGPU @ 1 R2319 2 /DGPU 1 R2320 DDPD_CTRLDATA LCD_BL_PWM_PCH 37 LCD_BACKEN_PCH 37 LCD_VDD_EN_PCH DDPB_AUXN DDPC_AUXN option changed from /non_RETINA EDP_BKLTCTL SP2307 1 2 R0402 K36 SP2308 1 2 R0402 G36 DISPLAY 37 EDP_BKLTEN DGPU_HOLD_RST#_R EDP_VDDEN 4 1 2.2KOhm DDC2BC_PCH 1 2.2KOhm DDC2BD_PCH 7 RN2301D INT_PIRQB# L20 DDPD_AUXP 70 10KOhm SP2301 1 DGPU_HOLD_RST# T2305 63 C 3 RN2301B INT_PIRQC# K17 1 RN2301A INT_PIRQD# M20 2 R0402 1 A12 DGPU_SELECT# B13 DDPC_HPD PIRQB# 1 3. Connected to GND: DDPD_HPD PIRQD# C10 DGPU_PWM_SELECT# A10 STP_A16OVR Int. PU AL6 2. 1KΩ+-5% pull-down to GND: PCI PIRQE#/GPIO2 GPIO50 PIRQF#/GPIO3 GPIO52 PIRQG#/GPIO4 GPIO54 PIRQH#/GPIO5 GPIO51 PME# GPIO53 D R39 R35 HDMI_DDC_CLK_PCH R36 39 HDMI_DDC_DATA_PCH N40 1 39 是否會浪費電? T2306 N38 R1.1 H45 K43 DPC_AUXN 1 T2303 DPC_AUXP 1 T2304 J42 H43 K45 R1.2 2012/10/29 option changed from /non_FDI R1.2 2012/12/06 remove R2338, R2329~R2331, R2349 for GDDR5 J44 K40 K38 HDMI_HPD_PCH R1.2 2012/11/27 follow intel design guide 39 H39 PLTRST# G17 MPC_PWR_CTRL# F17 SATA_ODD_DA# L15 EXTTS_SNI_DRV0_PCH M15 EXTTS_SNI_DRV1_PCH AD10 PCI_PME# Y11 PLT_RST# 1KOhm 2 @ 1 R2322 SATA_ODD_DA# GND 60 C 1 T2301 GPIO55 CRT_ITRN DAC_IREF CRT_HSYCN,CRT_VSYNC R40 PIRQC# C12 Int. PU BBS_BIT1 T2302 CRT_R,CRT_G,CRT_B DGPU_HOLD_RST#_R DGPU_PWR_EN DGPU_PWR_EN CRT Disable: (For discrete graphic) 1. NC: PIRQA# 10KOhm 2 DDPB_AUXP DDPB_HPD 10KOhm DGPU_PWR_EN R2328 2 H20 10KOhm 8 R2327 2 5 RN2301C INT_PIRQA# DDPD_AUXN DDPC_AUXP DGPU_SELECT# 6 10KOhm 16,17,20,21,22,25,26,27,28,30,33,37,38,39,40,41,43,47,48,49,53,55,60,63,65,66,91,92 37,43,63,65,91 2 2 2 R2313 1 DDPD_CTRLCLK LVDS 10KOhm DDPC_CTRLDATA CRT R2309 1 DDPC_CTRLCLK 1 @ 1 R2308 1 1 R2307 1 R1.2 2012/10/29 M43 38 DDC2BC_PCH VGA_DDC_CLK option changed from /FDI M45 R2304 R2305 R2306 38 DDC2BD_PCH VGA_DDC_DATA R1.2 2012/12/19 1 2 N42 150Ohm 150Ohm 150Ohm SP2304 R0402 option changed from /non_RETINA 38 DAC_HSYNC_PCH VGA_HSYNC 1 2 N44 SP2305 R0402 R1.3 2013/1/8 38 DAC_VSYNC_PCH VGA_VSYNC R1.2 2012/10/29 R2332~R2334 are removed 1 2 U40 R2326 1% 649OHM GND DAC_IREF option changed fromGND /FDI Close to CPU U39 R1.2 2012/11/27 R1.2 2012/12/06 VGA_IRTN R1.2 2012/12/19 2 1KOhm LCD_BL_PWM_PCH @ follow intel design guide remove R2348 for GDDR5 R1.2 2012/12/19 option changed from /non_RETINA co-lay with R2326 2 1KOhm 2 R0402 N36 @ LCD_BACKEN_PCH SP2306 1 +3VS +3V LPT_PCH_M_EV U2001E DAC_B_PCH D +3VS +3V 38 1 +3VS 10KOhm 10KOhm 10KOhm 10KOhm 4. Connect to +V3.3: BBS_BIT1 BBS_BIT0 Boot BIOS Location 0 0 LPC 0 1 Reserved (NAND) DH82LPMS 02V000000012 20 BBS_BIT0 1 0 Reserved 1 SPI (PCH) DEFAULT @ 2 1KOhm 1 @ 2 1KOhm 2 2 2 2 @ @ @ R2342 R2343 R2344 R2345 SATA_ODD_DA# EXTTS_SNI_DRV1_PCH EXTTS_SNI_DRV0_PCH MPC_PWR_CTRL# Strap information: R2346 0Ohm @ There signals have a weak internal pull down DDPB_CTRLDATA: "0" = Port is not detected; "1"= Port is detected DDPC_CTRLDATA: "0" = Port is not detected; "1"= Port is detected DDPD_CTRLDATA: "0" = Port is not detected; "1"= Port is detected U2302 1 2 3 PLT_RST# STP_A16OVR 1 R2312 @ 2 1KOhm A VCC B GND Y 1 @ 2 10KOhm R2317 1 @ 2 10KOhm BUF_PLT_RST# B R2315 100KOhm 2 0Ohm R2314 30,33,40,43,47,53,55,70 2 GND R2316 1 4 SN74LVC1G08DCKR @ GND GND 5 1 1 BBS_BIT1 R2311 1 1 1 1 High=Default 1 BBS_BIT0 R2310 +3VSUS R2347 0Ohm @ Low=Enabled A16 swap override/ Top-Block swap override Sampled on rising edge of PWROK. B +3VS 1 STP_A16OVR: A16 swap override Strap/ Top-Block swap override jumper 2 Boot BIOS Strap 2 BBS_BIT0,BBS_BIT1 : Boot BIOS Strap 1 VCCADAC +3VS GND +3VS R2321 10KOhm @ 2 1 R1.1 U2301 91 R2325 VGA_PWRON 1 @ +3VSUS 5 2 0Ohm 4 VCC Y A B GND 1 2 3 R2323 1 @ 2 0Ohm SUSB_EC# DGPU_PWR_EN 22,30,63,91,92 GND SN74LVC1G08DCKR @ R2324 1 2 0Ohm A A Title : PCH(4)_DP,LVDS,CRT PEGATRON COMPUTER INC Size C Date: 5 4 3 2 Engineer: Wing_Cheng Project Name Rev VA70_HW 1.0 Friday, January 18, 2013 Sheet 1 23 of 96 5 4 3 2 1 LPT_PCH_M_EDS U2001I D 40 40 PCIE_RXN1_CR PCIE_RXP1_CR 40 40 PCIE_TXN1_CR PCIE_TXP1_CR AW31 AY31 2 0.1UF/10V 2 0.1UF/10V BE32 BC32 PCIE_TXN1_CR_C PCIE_TXP1_CR_C AT31 AR31 53 PCIE_RXN6_mSATA 53 PCIE_RXP6_mSATA 53 53 1 1 C2409 C2410 @ C2404 1 C2403 1 PCIE_TXN6_mSATA PCIE_TXP6_mSATA 2 0.1UF/10V 2 0.1UF/10V PCIE_TXN6_mSATA_C PCIE_TXP6_mSATA_C BD33 BB33 PERN1/USB3RN3 PERP1/USB3RP3 PETN1/USB3TN3 PETP1/USB3TP3 PERN2/USB3RN4 PERP2/USB3RP4 PETN2/USB3TN4 PETP2/USB3TP4 @ 55 55 33 33 33 33 C2401 C2402 PCIE_TXN2_WLAN PCIE_TXP2_WLAN 1 1 2 0.1UF/10V 2 0.1UF/10V PCIE_TXN2_WLAN_C PCIE_TXP2_WLAN_C BE34 BC34 AT33 AR33 PCIE_RXN3_LAN PCIE_RXP3_LAN C2406 C2407 PCIE_TXN3_LAN PCIE_TXP3_LAN 1 1 2 0.1UF/10V 2 0.1UF/10V PCIE_TXN3_GLAN_C PCIE_TXP3_GLAN_C BE36 BC36 BD37 BB37 AY38 AW38 BC38 BE38 AT40 AT39 BE40 BC40 AN38 AN39 BD42 BD41 B SP2403 +1.5VS 1 2NB_R0402_20MIL_SMALL PCIE_IREF BE30 BC30 R1.2 2012/11/28 cost dwon 0ohm R1.2 2012/12/04 change short pin size BB29 PETN_3 PETP_3 PERN_4 PERP_4 PETN_4 PETP_4 PERN_5 PERP_5 PCIe AW36 AV36 C PERN_3 PERP_3 USB AW33 AY33 55 PCIE_RXN2_WLAN 55 PCIE_RXP2_WLAN PETN_5 PETP_5 USB3RN1 USB3RP1 USB3TN1 USB3TP1 USB3RN2 USB3RP2 USB3TN2 USB3TP2 USB3RN5 USB3RP5 USB3TN5 USB3TP5 USB3RN6 USB3RP6 USB3TN6 USB3TP6 PERN_6 PERP_6 PETN_6 PETP_6 PERN_7 PERP_7 PETN_7 PETP_7 PERN_8 PERP_8 PETN_8 PETP_8 USBRBIAS# USBRBIAS PCIE_IREF TP24 TP23 TP11 OC0#/GPIO59 OC1#/GPIO40 OC2#/GPIO41 OC3#/GPIO42 OC4#/GPIO43 OC5#/GPIO9 OC6#/GPIO10 OC7#/GPIO14 TP6 DH82LPMS +1.5VS R2401 1 2 7.5KOhm PCIE_RCOMP USB2N0 USB2P0 USB2N1 USB2P1 USB2N2 USB2P2 USB2N3 USB2P3 USB2N4 USB2P4 USB2N5 USB2P5 USB2N6 USB2P6 USB2N7 USB2P7 USB2N8 USB2P8 USB2N9 USB2P9 USB2N10 USB2P10 USB2N11 USB2P11 USB2N12 USB2P12 USB2N13 USB2P13 BD29 02V000000012 PCIE_RCOMP B37 D37 A38 C38 A36 C36 A34 C34 B33 D33 F31 G31 K31 L31 G29 H29 A32 C32 A30 C30 B29 D29 A28 C28 G26 F26 F24 G24 USB PORT USB_PN0 USB_PP0 USB_PN1 USB_PP1 USB_PN2 USB_PP2 USB_PN0 USB_PP0 USB_PN1 USB_PP1 USB_PN2 USB_PP2 USB_PN4 USB_PP4 USB_PN5 USB_PP5 1 1 T2403 T2405 USB_PN7 USB_PP7 USB_PN8 USB_PP8 USB_PN9 USB_PP9 USB_PN10 USB_PP10 USB_PN11 USB_PP11 USB_PN12 USB_PP12 1 1 T2404 T2406 1 1 1 1 61 61 61 61 61 61 USB P00 External 2.0/3.0 +3VSUS USB P01 External 2.0/3.0 +3VS USB P02 External 2.0 USB P03 USB_PN5 USB_PP5 55 55 USB_PN8 USB_PP8 USB_PN9 USB_PP9 37 37 61 61 +3VS +3V +3VSUS_ORG USB P04 USB P05 +3VSUS +3V 4,22,23,27,28,30,33,43,61,81,92 16,17,20,21,22,23,25,26,27,28,30,33,37,38,39,40,41,43,47,48,49,53,55,60,63,65,66,91,92 D 37,43,63,65,91 +3VSUS_ORG +12VS +12VS +1.5VS +1.5VS 20,21,22,25,26,27 28,39,41,63,91 WiFi USB P07 T2407 T2408 USB_PN11 USB_PP11 T2401 T2402 53 53 USB P08 Camera USB P09 External 2.0 USB P10 BT USB P11 PCIE/mSATA 20,21,22,26,27,41,53,55,63,84 USB P12 USB P13 C AR26 AP26 BE24 BD23 AW26 AV26 BD25 BC24 AW29 AV29 BE26 BC26 AR29 AP29 BD27 BE28 USB3_RX1_N USB3_RX1_P USB3_TX1_N USB3_TX1_P USB3_RX2_N USB3_RX2_P USB3_TX2_N USB3_TX2_P 61 61 61 61 61 61 61 61 K24 K26 +3VSUS_ORG M33 L33 USB_BIAS P3 V1 U2 P1 M3 T1 N2 M1 OC0#/GPIO59 OC1#/GPIO40 OC2#/GPIO41 OC3#/GPIO42 OC4#/GPIO43 OC5#/GPIO9 OC6#/GPIO10 OC7#/GPIO14 R2403 1 1% 2 22.6Ohm 7 1 3 1 7 5 3 5 B GND 8 10KOhm 2 10KOhm 4 10KOhm 2 10KOhm 8 10KOhm 6 10KOhm 4 10KOhm 6 10KOhm RN2401D RN2401A RN2401B RN2402A RN2402D RN2401C RN2402B RN2402C Place within 500 mils of PCH SP2402 1 SP2401 1 2 R0402 2 R0402 USB_OC0# 61 USB_OC1# 61 A A Title : PCH(5)_PCI,NVRAM,USB @ R2404 1 Size Date: 4 3 2 Wing_Cheng Project Name Custom 5 Engineer: PEGATRON COMPUTER INC 2 0Ohm Rev VA70_HW Friday, January 18, 2013 1.0 Sheet 1 24 of 96 5 4 3 +3VS +3VS +3VSUS +3VSUS +VCCDSW +3VS PCB ID2 PCB_ID1 R1.0 TBD 0 R1.1 TBD 0 R1.2 TBD 1 R1.3 TBD 1 1 1 1 R2559 R2553 10KOhm @ 10KOhm 10KOhm @ 2 R2561 2 R1.2 2012/11/30 PCB_ID R1.2 2 D +3VS 1 4,22,23,27,28,30,33,43,61,81,92 +VCCDSW +3VSUS_ORG +3VS 2 16,17,20,21,22,23,26,27,28,30,33,37,38,39,40,41,43,47,48,49,53,55,60,63,65,66,91,92 27 +3VSUS_ORG 20,21,22,24,26,27 PCB_ID0 0 1 0 1 D R2558 R1.2 2012/11/28 eDP_ON# is not used PCH_GPIO0_R R1.2 2012/11/29 GPIO1 T2505, R2563 are removed, too Reserved This signal has a weak internal pull-up but requires an external pull down. 1 1 1 PCB_ID0 PCB_ID1 PCB_ID2 R2560 R2554 10KOhm 10KOhm @ 2 2 2 SP2506 1 PCH_GPIO8 A14 2 R0402 G15 @ Y1 PCH_GPIO8_R 53,55 GND F13 1 DGPU_HPD_INTR# T2503 10KOhm U2001F AT8 GND GND WLAN_RST#_PCH 30,65 EXT_SMI# SP2502 1 2 R0402 PM_LANPHY_EN SP2501 1 2 R0402 HOST_ALERT#1_R K13 AB11 AN2 SATA_DET#4 87,92 DGPU_PWROK 66 WLAN_LED 55 AOAC_ON C14 DGPU_PWROK BB4 SP2504 1 2 R0402 PCH_GPIO24 AD11 WLAN_ON_R R1.2 2012/11/08 cost dwon 0ohm Y10 R11 GPIO27 STP_PCI# AN6 SATA_PWR_EN#1_R AP1 C 42 60 +3VS EXT_SMI# 1 2 R0402 SP2503 1 SATA_ODD_PRSNT# 2 R0402 +3VS SATA_ODD_PRSNT#_R AT3 FDI_OVRVLTG AK1 PCB_ID0 AT7 PCB_ID1 AM3 2 1KOhm 2 1 10KOhm PM_LANPHY_EN R2518 2 @ 1 10KOhm PCH_GPIO24 R2520 2 1 10KOhm 55 R2525 10KOhm @ T2504 AN4 BT_ON_PCH 1 SP2505 1 PCH_ALERT# PCB_ID2 @ 2 R2513 2 PCH_GPIO8 R2524 10KOhm 1 1 R2512 SP2507 1 OP_SD# +3VSUS_ORG 2 R0402 CRIT_TEMP_REP#_R 0Ohm 1 @ R2552 2 U12 @ 53,55 60 WLAN_ON Q2501B UM6K1N 4 @ 5 RCIN# has pull high at EC side R2514 2 @ 1 10KOhm PCH_ALERT# R2515 2 @ 1 10KOhm DGPU_PWROK R2519 2 Q2501A UM6K1N GPIO70 G13 GPIO71 H15 2 BE41 BE5 C45 A5 WLAN_ON_R @ 1 10KOhm R1.2 2012/11/29 R2523, eDP_ON# pull-up is removed 2 R2502 D13 1 DGPU_HPD_INTR# GPIO69 @ TACH1/GPIO1 GND TP14 is Intel Reserved Pin: Must have a pull up resistor to VCC3_3. Standard resistor value in the range of 4.7K to 15K ok(shark bay LPT EDS 486708) TACH2/GPIO6 CPU/Misc TACH3/GPIO7 need close to EC GPIO8 LAN_PHY_PWR_CTRL/GPIO12 TP14 GPIO15 PECI SATA4GP/GPIO16 GPIO RCIN# TACH0/GPIO17 PROCPWRGD SCLOCK/GPIO22 THRMTRIP# GPIO24 PLTRST_PROC# GPIO27 VSS3 AN10 AY1 A20GATE 0Ohm 1 H_PECI_R @ 2 R2503 43Ohm 1 2 R2504 AT6 AV3 AV1 30 H_PECI 4 H_PECI_EC 30 RCIN# 30 H_CPUPWRGD PM_THRMTRIP# 390Ohm 1 1% 2 R2505 R2506 AU4 N10 2 1% @ 1 1KOhm 4 H_THRMTRIP# 4,47 +1.05VS PCH_PLTRST_CPU# 4 GND GPIO28 GPIO34 C GPIO35/NMI# SATA2GP/GPIO36 SATA3GP/GPIO37 SLOAD/GPIO38 SDATAOUT0/GPIO39 SDATAOUT1/GPIO48 SATA5GP/GPIO49 GPIO57 TACH4/GPIO68 TACH5/GPIO69 TACH6/GPIO70 TACH7/GPIO71 6 +3VS GPIO69 C16 SATA_ODD_PWRGT 3 @ AK3 LPT_PCH_M_EDS BMBUSY#/GPIO0 VSS25 VSS24 VSS23 VSS22 NCTF VSS4 VSS13 VSS14 VSS12 VSS11 VSS10 VSS21 VSS9 VSS1 VSS2 VSS8 VSS6 VSS7 VSS5 VSS20 VSS19 VSS18 VSS17 VSS16 VSS15 A2 A41 A43 A44 B1 B2 B44 B45 BA1 BC1 BD1 BD2 BD44 BD45 BE2 BE3 D1 E1 E45 A4 DH82LPMS 02V000000012 GND GND GND GPIO change: CIO_PLUG_EVENT/PCIE_WAKE#/OP_SD#/DDR_VOLT_SEL PCB_ID2 1 10KOhm B B R1.1 GPIO1 2 R2521 @ 1 10KOhm DGPU_PWROK STP_PCI# R2517 2 SATA_DET#4 R2522 2 PCH_GPIO0_R R2556 2 1 10KOhm PCH_GPIO8_R 1 10KOhm 2 @ 1 1 R1.1 +3VSUS_ORG 10KOhm 10KOhm 2 1 10KOhm @ +3VS IO Flexible: GND 2 1KOhm FDI_OVRVLTG 1% R2531 1 @ Functional Strap Definitions @ Usage: TLS Confidentiality(Intel Crypto Transport Layer Security) "0" = Disable "1" = Enable R2534 R2533 +3VS R2557 R2526 @ 1 10KOhm @ +3VS GPIO27 2 R2532 1 1 1% 2 200KOhm SATA_ODD_PRSNT#_R 2 100KOhm GND GPIO70 R2527 2 @ 1 10KOhm GPIO71 R2528 2 @ 1 10KOhm GPIO70 R2529 2 @ 1 10KOhm GPIO71 R2530 2 @ 1 10KOhm Functional Strap @ Definitions Usage: Reserved This signal has a weak internal pull-down. NOTES: 1. The internal pull-down is disabled after PLTRST# deasserts. 2. This signal should not be pulled high when strap is sampled USB3 Port 3 PCIE Port2 Mode (USB3P3_PCIEP2_MODE) USB3p3_tach6_gp70 pin is a ‘0’, then Root Port 2 is assigned to USB3 Port 3, else it is assigned to PCI Express. USB3 Port 2 PCIE Port1 Mode (USB3P2_PCIEP1_MODE) USB3p2_tach7_gp71 pin is a ‘0’, then Root Port 1is assigned to USB3 Port 2, else it is assigned to PCI Express. GND A A GPIO27 R2535 2 1 10KOhm @ Title : PCH(6)_CPU,GPIO,MISC GND PEGATRON COMPUTER INC Size Date: 5 4 3 2 Engineer: Wing_Cheng Project Name Rev VA70_HW Custom Friday, January 18, 2013 1 1.0 Sheet 25 of 96 5 4 3 2 1 R1.2 2012/11/27 follow intel design guide R1.2 2012/11/28 +1.5VS R2611 is removed R1.2 2012/12/06 remove R2612, R2610 for GDDR5 R1.2 2012/12/19 option changed to N/A +VCCA_DAC_1_2 B2601 2 C GND 2 1UF/6.3V R2601 1 2 5.1Ohm +PCH_VCCDSW 0.67A GND ， C2604 1UF/6.3V GND C2605 1UF/6.3V 2 2 C2603 22UF/6.3V 1 1 +V1.05VM_VCCASW U14 AA18 U18 U20 U22 U24 V18 V20 V22 V24 Y18 Y20 Y22 GND USB3 DCPSUSBYP VCCASW12 VCCASW11 VCCASW1 VCCASW2 VCCASW3 VCCASW9 VCCASW10 VCCASW4 VCCASW5 VCCASW6 VCCASW7 VCCASW8 PCIe/DMI DCPSUS3_1 DCPSUS3_2 VCCIO3 VCCVRM3 VCCVRM4 VCCVRM5 VCCIO4 VCCVRM1 SATA VCCIO9 頁， VCCMPHY DCPSUS1 DCPSUS2(27 ) DCPSUS3: If INTVRMEN is strapped high then power to this well is supplied internally and this pin should be left as no connect. If INTVRMEN is strapped low then power to this well must be supplied by an external 1.05 V suspend rail. Note: External VR mode applies to Mobile Only. (shark bay GaryReff schematic 481356) VCCIO11 VCCIO10 VCCIO5 VCCIO6 VCCIO7 VCCIO8 1 2 10UF/10V +V1.5S_VCCAPLL_FDI R30 R32 0Ohm +3VS R1.2 +VTT_PCH_VCCIO 2012/12/03 R1.2 2012/12/04 0ohm change short pin size 1 C2613 1UF/6.3V C2622 10UF/10V R1.2 2012/12/17 R2606 is removed 2 1 C2607 1UF/6.3V 1 C2608 1UF/6.3V 2 C2606 1UF/6.3V 2 C2609 1UF/6.3V AN35 2 D 1 +V1.05S_VCC_EXP AN34 1 BB44 1 GND NB_R0402_20MIL_SMALL cost dwon 2 SP26131 +1.5VS +3VS +3VS_VCC_GIO Y12 1 GND T2601 0Ohm 1 AJ30 AJ32 AJ26 AJ28 AK20 AK26 AK28 BE22 1 T2602 NB_R0402_20MIL_SMALL 2 SP26141 2 R2602 C2617 0.1UF/16V +3VSUS_ORG R1.2 2012/12/03 cost dwon 0ohm R1.2 2012/12/04 change short pin size 1 DCPSUS1 VCCSUS3_3_1 VCCSUS3_3_2 C2623 1 C2618 0.1UF/16V +3VSUS_VCCPSUS 2 VCC3_3_R30 VCC3_3_R32 @ 2 VCCIO2 HVCMOS 13mA 2 VCCIO1 M31 1 VCCVRM2 FDI R2603 P43 2 VSS26 VCCADACBG3_3 1 GND CRT DAC GND +V3.3S_ADACBG 2 1 GND 2 1 2 1 GND C2601 1UF/6.3V VCC7 VCC8 VCC9 VCC11 VCC10 VCC12 VCC13 VCC1 VCC17 VCC2 VCC16 VCC15 VCC14 VCC6 VCC5 VCC4 VCC3 GND GND +1.5VS GND +V1.05S_VCC_EXP +VCCAPLL_USB3 GND AK18 +VCCAPLL_EXP 210UF/10V C2610 1 @ AN11 +VCCAPLL_SATA3 NB_R0402_20MIL_SMALL 2 SP26151 AK22 NB_R0402_20MIL_SMALL 2 SP26171 +1.5VS AM18 AM20 AM22 AP22 AR22 AT22 C2602 1UF/6.3V GND NB_R0402_20MIL_SMALL 2 SP26161 +1.5VS C2611 10UF/10V @ R1.2 2012/12/03 cost dwon 0ohm R1.2 2012/12/04 change short pin size 1 C2612 1 GND C2614 1UF/6.3V AA24 AA26 AD20 AD22 AD24 AD26 AD28 AE18 AE20 AE22 AE24 AE26 AG18 AG20 AG22 AG24 Y26 1kOhm/100Mhz C2621 10UF/10V @ 2 GND C2615 1UF/6.3V 2 C2616 10UF/10V 2 1 +V1.05VS_PCH_VCC 70mA 1 K39 L2 L44 M17 M22 N12 N35 N39 N6 P22 P24 P26 P28 P30 P32 R12 R14 R16 R2 R34 R38 R44 R8 T43 U10 U16 U28 U34 U38 U42 U6 V14 V16 V26 V43 W2 W44 Y14 Y16 Y24 Y28 Y34 Y36 Y40 Y8 1 VSS96 VSS95 VSS94 VSS93 VSS92 VSS40 VSS42 VSS41 VSS43 VSS45 VSS44 VSS48 VSS47 VSS46 VSS49 VSS50 VSS53 VSS52 VSS51 VSS55 VSS54 VSS56 VSS58 VSS57 VSS60 VSS59 VSS61 VSS62 VSS63 VSS65 VSS64 VSS66 VSS67 VSS68 VSS71 VSS70 VSS69 VSS73 VSS72 VSS74 VSS76 VSS75 VSS78 VSS77 VSS79 2 D VSS116 VSS115 VSS114 VSS113 VSS112 VSS111 VSS91 VSS90 VSS110 VSS118 VSS89 VSS88 VSS117 VSS109 VSS108 VSS87 VSS107 VSS86 VSS85 VSS84 VSS83 VSS82 VSS37 VSS36 VSS35 VSS38 VSS34 VSS80 VSS33 VSS32 VSS119 VSS39 VSS28 VSS31 VSS29 VSS30 VSS106 VSS105 VSS81 VSS104 VSS103 VSS102 VSS101 VSS100 VSS99 VSS98 VSS97 P45 2 VCCADAC1_5 Core AL34 AL38 AL8 AM14 AM24 AM26 AM28 AM30 AM32 AM16 AN36 AN40 AN42 AN8 AP13 AP24 AP31 AP43 AR2 AK16 AT10 AT15 AT17 AT20 AT26 AT29 AT36 AT38 D42 AV13 AV22 AV24 AV31 AV33 BB25 AV40 AV6 AW2 F43 AY10 AY15 AY20 AY26 AY29 AY7 B11 B15 GND LPT_PCH_M_EDS 1.31A 2 2 LPT_PCH_M_EDS U2001G U2001J C2620 0.1UF/16V 2 1 1 1 C2619 0.01UF/50V GND R1.2 2012/12/03 cost dwon 0ohm R1.2 2012/12/04 change short pin size GND C GND DH82LPMS 02V000000012 DH82LPMS 02V000000012 +1.05VS +V1.05VS_PCH_VCC JP2601 1 1 2 2 1.29A +V1.05VM_VCCASW +V1.05VM_VCCASW 27 2MM_OPEN_5MIL +VTT_PCH_VCCIO +V1.05VM_VCCASW JP2602 0.67A 2 2 1 1 2MM_OPEN_5MIL B 1 2 +1.05VS +1.5VS +1.5VS 27 4,25,27,47,63,80,82 20,21,22,24,27,41,53,55,63,84 B +3VS +VTT_PCH_VCCIO JP2603 1 +VTT_PCH_VCCIO +1.05VS +3VS 16,17,20,21,22,23,25,27,28,30,33,37,38,39,40,41,43,47,48,49,53,55,60,63,65,66,91,92 3.629A 2 2MM_OPEN_5MIL +3VSUS_VCCPSUS +3VSUS_VCCPSUS 27 A A Title : PCH(7)_POWER,GND Engineer: BG1\CORE Size C Date: 5 4 3 2 Wing_Cheng Project Name Rev VA70_HW 1.1 Sheet Friday, January 18, 2013 1 26 of 96 5 4 3 2 1 U2001K LPT_PCH_M_EDS +VCCDSW NB_R0402_20MIL_SMALL 2 +3VSUS_VCCPUSB SP27081 +3VSUS_VCCPSUS D DH82LPMS 02V000000012 GND +1.05VS_VCC_SSCFF AA30 AA32 +1.05VS_VCCCLKF100 AD35 +1.05VS_VCCSSCF100 AG30 AG32 +1.05VS_VCCCLKF100 AD36 +1.05VS_VCCSSCF100 AE30 AE32 GND R1.2 2012/12/03 cost dwon 0ohm R1.2 2012/12/04 change short pin size +3VS +3VS NB_R0402_20MIL_SMALL 2 +3VS_VCC_FLEX0 SP27141 NB_R0402_20MIL_SMALL 2 +3VS_VCC_FLEX1 SP27151 +3VS GND 1 C2720 1UF/6.3V 1 2 1 2 AD12 VCCSPI SPI 1 1 2 2 2 1 2 R2732 0Ohm 1 0Ohm @ +1.05VS 2 R2733 +VCCIO2PCH GND +3VM_VCCPSPI VCC18 VCC19 VCCCLK3 VCCCLK4 VCCASW13 Fuse VCCCLK5 VCCASW14 VCCCLK6 VCCCLK7 VCCVRM6 VCCCLK8 VCCCLK9 VCCCLK10 P18 P20 +3VS_VCCPFUSE L17 PCH_VCC_1_1_20 R18 PCH_VCC_1_1_21 AW40 +V1.5S_VCCATS NB_R0402_20MIL_SMALL 2 SP27071 DH82LPMS 02V000000012 @ C C2729 1UF/6.3V +1.5VS GND NB_R0402_20MIL_SMALL 2 SP27211 +3VS C2711 0.1UF/16V R1.2 2012/12/03 cost dwon 0ohm R1.2 2012/12/04 change short pin size +3VSUS_ORG +3VA GND +3VM_VCCPSPI R2719 1 +3VS 2 0Ohm @ 20mA C2723 1UF/6.3V R2701 2 @ 1 0Ohm R2718 1 +VCCPRTCSUS +3VM_SPI C2728 1UF/6.3V R2702 2 1 0Ohm 2 0Ohm C2726 1UF/6.3V 2 2 1 C2722 1UF/6.3V +3VS R2734 0Ohm R1.1 R1.2 2012/12/03 cost dwon 0ohm R1.2 2012/12/04 change short pin size AK32 VCC3_3_6 Intel MOW WW09: renamed VCCIO2PCH to RSVD NB_R0402_20MIL_SMALL 2 SP27051 +V1.05VM_VCCASW NB_R0402_20MIL_SMALL 2 SP27061 +V1.05VM_VCCASW AK30 VCC3_3_5 Thermal R2720 0Ohm Unstuff R2731, stuff R2732 GND VCCCLK2 +1.05VS C2708 0.1UF/16V 2 C2727 1UF/6.3V 2 C2710 0.1UF/16V 2 C2709 0.1UF/16V 1 GND 1 VCCCLK3_3_5 VCCCLK3_3_6 1 1 AJ12 AJ14 V_PROC_IO_1 V_PROC_IO_2 CPU NB_R0402_20MIL_SMALL 2 +VCCCLKF135 SP27181 2 1 2 VCCCLK3_3_3 VCCCLK3_3_4 +VCCRTCEXT +1.05VS_VCCPCPU VCCCLK3_3_2 GND NB_R0402_20MIL_SMALL 2 +3VS_VCC_ASEPCI SP27171 C2721 1UF/6.3V P14 P16 DCPRTC1 DCPRTC2 C2731 0.1UF/16V 0.1UF/16V1UF/6.3V +1.05VS GND NB_R0402_20MIL_SMALL 2 +3VS_VCC_FLEX23 SP27161 GND RTC VCCCLK3_3_1 C2713 +VCCPRTCSUS A6 VCCRTC +3VS_VCCPTS 1 +3VS K8 VCCSUS3_3_8 VCCCLK1 2 C2719 1UF/6.3V 2 C2718 1UF/6.3V 2 1 NB_R0402_20MIL_SMALL 2 +1.05VS_VCC_SSCFF SP27131 1 +1.05VS VCC20 R1.2 2012/12/03R1.2 2012/12/04 +VCC_RTC cost dwon 0ohm change short pin size C2712 1 U32 V32 AD34 C2706 0.1UF/16V 1 C L26 M26 A26 VCCSUSHDA VCCVRM7 1 +VCCCLKF135 L29 GND 2 +3VS_VCC_ASEPCI M29 U36 VCCIO15 Azalia DCPSUS2 C2704 0.1UF/16V R1.2 2012/12/03 cost dwon 0ohm R1.2 2012/12/04 change short pin size +VTT_PCH_VCCIO NB_R0402_20MIL_SMALL C2701 2 +V1.05S_VCCAUX SP27031 0.01UF/50V +3VSUS_ORG NB_R0402_20MIL_SMALL 1 2 +3VSUS_VCCPAZSUS SP2704 GND 1 +3VS_VCC_FLEX23 Y32 AE14 AF12 AG14 VCC3_3_2 VCC3_3_3 VCC3_3_4 VCCIO12 VCCIO14 VCCIO13 VCCIO16 2 GND AP45 +3VS_VCCPCORE 1 1 1 2 2 R1.2 2012/12/04 change short pin size AF34 VCC3_3_1 +3VS NB_R0402_20MIL_SMALL 2 SP27021 2 +1.5VS Y35 DCPSST VCCUSBPLL GND AA14 2 +VTT_PCH_VCCIO GND GND 1 2 +VCCAXCK_VRM 1 C2730 0.1UF/16V T2701 NB_R0402_20MIL_SMALL 2 SP27111 NB_R0402_20MIL_SMALL +1.05VS 2 +1.05VS_VCC_AXCK_DCB SP27121 C2715 +1.05VS_VCC_SSCFF 10UF/10V C2717 @ C2716 1UF/6.3V 10UF/10V +3VS_VCC_FLEX0 GNDR1.2 2012/12/03 cost dwon 0ohm +3VS_VCC_FLEX1 L24 U30 V28 V30 Y30 2 C2705 A16 VCCDSW3_3 VSS27 1 +3VS_VCCAUBG 2 0.1UF/16V C2714 1 GND NB_R0402_20MIL_SMALL 2 +1.05VS_VCCUSBCORE SP27101 1 +VCCSST 0.1UF/16V GPIO/LPC R1.2 2012/12/04 change short pin size 1 NB_R0402_20MIL_SMALL 2 SP27091 U35 NB_R0402_20MIL_SMALL 2 SP27011 +VCCDSW 2 R1.2 2012/12/03 cost dwon 0ohm R1.2 2012/12/04 change short pin size +3VS +1.05VS_VCCAUSB R20 R22 VCCSUS3_3_6 VCCSUS3_3_7 1 2 C2703 0.1UF/16V M24 VCCSUS3_3_9 VCCSUS3_3_3 VCCSUS3_3_4 VCCSUS3_3_5 2 2 0Ohm R24 R26 R28 U26 2 C2702 R1.2 2012/12/03 0.1UF/16V cost dwon 0ohm R1.2 2012/12/04 change short pin size GND R1.2 2012/12/03 cost dwon 0ohm R1.2 2012/12/04 GND change short pin size 2 1 1 +1.05VS R2726 +3VSUS_ORG LPT_PCH_M_EDS U2001H 1 +3VSUS_ORG 1 B19 B23 B27 B31 B35 B39 B7 BA40 BD11 BD15 BD19 AY36 AT43 BD31 BD35 BD39 BD7 D25 AV7 F15 F20 F29 F33 BC16 D4 G2 G38 G44 G8 H10 H13 H17 H22 H24 H26 H31 H36 H40 H7 K10 K15 K20 K29 K33 BC28 ICC VSS171 VSS170 VSS169 VSS168 VSS167 VSS166 VSS165 VSS164 VSS163 VSS162 VSS161 VSS160 VSS159 VSS129 VSS130 VSS131 VSS132 VSS144 VSS133 VSS143 VSS134 VSS142 VSS135 VSS121 VSS120 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS139 VSS140 VSS141 VSS138 VSS158 VSS137 VSS157 VSS156 VSS155 VSS154 VSS153 VSS152 VSS151 VSS207 2 D VSS136 VSS197 VSS196 VSS195 VSS194 VSS193 VSS192 VSS146 VSS128 VSS145 VSS191 VSS190 VSS189 VSS204 VSS203 VSS202 VSS209 VSS208 VSS188 VSS187 VSS186 VSS185 VSS184 VSS183 VSS201 VSS200 VSS199 VSS198 VSS182 VSS148 VSS147 VSS150 VSS149 VSS181 VSS180 VSS179 VSS178 VSS177 VSS176 VSS175 VSS174 VSS173 VSS172 VSS206 VSS205 USB AA16 AA20 AA22 AA28 AA4 AB12 AB34 AB38 AB8 AC2 AC44 AD14 AD16 AD18 AD30 AD32 AD40 AD6 AD8 AE16 AE28 AF38 AF8 AG16 AG2 AG26 AG28 AG44 AJ16 AJ18 AJ20 AJ22 AJ24 AJ34 AJ38 AJ6 AJ8 AK14 AK24 AK43 AK45 AL12 AL2 BC22 BB42 +1.05VS +1.05VS GND GND GND GND GND 1 C2724 1UF/6.3V 2 B NB_R0402_20MIL_SMALL 2 +1.05VS_VCCSSCF100 SP27201 2 1 NB_R0402_20MIL_SMALL 2 +1.05VS_VCCCLKF100 SP27191 GND GND B C2725 1UF/6.3V +3VSUS_ORG +3VSUS +V1.05VM_VCCASW JP2702 2 2 1 1 +3VSUS +3VSUS_ORG +1.5VS +3VS +1.05VS +VTT_PCH_VCCIO +VCCAXCK_VRM +3VSUS_VCCPSUS +3VA +VCC_RTC +VCCIO2PCH A +V1.05VM_VCCASW 26 261mA 1MM_OPEN_M1M2 +3VSUS 4,22,23,28,30,33,43,61,81,92 +3VSUS_ORG +1.5VS +3VS 20,21,22,24,25,26 20,21,22,24,26,41,53,55,63,84 16,17,20,21,22,23,25,26,28,30,33,37,38,39,40,41,43,47,48,49,53,55,60,63,65,66,91,92 +1.05VS 4,25,26,47,63,80,82 +VTT_PCH_VCCIO +VCCAXCK_VRM +3VSUS_VCCPSUS +3VA 26 21 26 20,30,63,65,81,88,93 +VCC_RTC +VCCIO2PCH 20,22 6 A Title : PCH(8)_POWER,GND Engineer: PEGATRON COMPUTER INC Size Custom Rev VA70_HW Date: Friday, January 18, 2013 5 4 3 2 Wing_Cheng Project Name 1.0 Sheet 1 27 of 96 5 4 3 2 1 PCH SPI ROM R1.0 +3VA_EC +3VSUS 2 @ 1 R2802 0Ohm 2 0106 +3VM_SPI D2801 1 R2803 1 +3VS +3VS +12VS +12VS 16,17,20,21,22,23,25,26,27,30,33,37,38,39,40,41,43,47,48,49,53,55,60,63,65,66,91,92 39,41,63,91 +12VSUS +12VSUS +3VM_SPI +3VM_SPI +3VSUS +3VSUS 22,33,55,60,81,91 27 4,22,23,27,30,33,43,61,81,92 3 0Ohm 2 @ 1V/0.2A 2 R2801 <6.5 inch <6.5 inch PCH 1 0Ohm EC SPI ROM (32Mb) D D SPI ROM (128 Kb) +3VM_SPI +3VM_SPI R1.2 2012/11/28 follow intel design guide 2 1 R2807 1KOhm R2808 1KOhm R1.2 2012/11/29 reserved for intel design guide R2823 1KOhm @ 1 1 2 C2802 0.1UF/16V 1 1 R2822 1KOhm @ +3VM_SPI R1.2 2012/11/28 follow intel design guide 2 2 R1.2 2012/11/29 reserved for intel design guide 2 +3VM_SPI U2801 PCH_SPICS0# PCH_SPISO 21 PCH_SPICS0# 21,30 PCH_SPISO 21,30 SPI_WP_IO2 1 1 1 0Ohm 2 R2804 33Ohm 2 R2805 33Ohm 2 R2806 1 2 3 4 SPI1_CS#0 SPI1_SO +3VM_SPI1_WP# CS# VCC SO/SIO1 NC/SIO3 WP#/SIO2 SCLK GND SI/SIO0 MX25L1675EM2I-10G 05V000000023 8 7 6 5 R2811 1 R2809 1 R2810 1 SPI1_HOLD# SPI1_CLK SPI1_SI 2 33Ohm 2 33Ohm 2 33Ohm SPI_HOLD#_IO3 21,30 PCH_SPICLK 21,30 PCH_SPISI 21,30 ROM setting: Configuration 1. ITE HSPI -> short J2803 pin2 & 3 and no stuff U2801,U2802 Configuration 2. One ROM solution -> short J2803 pin1&2 and no stuff U2802 ; stuff U2801(BIOS+ME) Configuration 3. Two ROM solution -> short J2803 pin1&2 , J2802 pin2&3 Stuff U2801(ME), Stuff U2802(BIOS) (16Mb) +3VM_SPI R1.2 2012/11/28 follow intel design guide 2 @ +3VM_SPI R2821 1KOhm C2801 0.1UF/16V @ 2 R2815 1KOhm 2 1 1 R1.2 2012/11/28 follow intel design guide Follow Intel setting: U2801: ME U2802: BIOS 1 @ U2802 C 21,30 PCH_SPICS1# PCH_SPICS1# 0Ohm 33Ohm 33Ohm 1 1 1 @ @ @ 2 R2817 2 R2816 2 R2818 1 2 3 4 SPI2_CS#1 SPI2_SO +3VM_SPI2_WP# CS# VCC DO(IO1) HOLD#/RESET#(IO3) WP#(IO2) CLK GND DI(IO0) 8 7 6 5 @ C R2814 1 R2812 1 R2813 1 @ @ @ SPI2_HOLD# SPI2_CLK SPI2_SI W25Q32FVSSIQ 05V000000022 @ (32Mb) 2 33Ohm 2 33Ohm 2 33Ohm +3VS PCH SMBus SPI Debug Connector SMBUS Link device eDP WLAN CPU XDP PCH XDP 3 1 +12VS 2 +3VSUS RN2801B 4.7KOHM 4 RN2801A 4.7KOHM +3VS 2 21 6 SCL_3A 1 B 21 16,17,48,53,55 SMB_DAT_S 16,17,48,53,55 5 Q2801A UM6K1N PCH SMB_CLK_S 3 SDA_3A B 4 Q2801B UM6K1N 1 @ R2820 1 2 0Ohm 2 R2819 0Ohm +12VSUS +12VS +3VSUS 2 +3VS 30,49,74 1 SMB1_CLK 30,49,74 5 EC, VGA Thermal Q2802A UM6K1N 6 4 SMB1_DAT SML1_CLK 21 SML1_DAT 21 PCH Q2802B UM6K1N 3 R1.2 2012/10/29 option changed from /non_FDI_@ A A R1.2 2012/11/28 R2822, R2823 are removed SCL_VGA 30,49,74 SDA_VGA 30,49,74 +3VS ANX6211 Title : PCH(9)_SPI,SMB Size C Date: 5 4 3 2 Engineer: PEGATRON COMPUTER INC Wing_Cheng Project Name Rev VA70_HW Friday, January 18, 2013 1.0 Sheet 1 28 of 96 5 4 3 2 1 D D C C B B A A Title : CLK_ICS9LRS3197 PEGATRON COMPUTER INC Size Custom Date: 5 4 3 2 Engineer: Wing_Cheng Project Name Rev VA70_HW Friday, January 18, 2013 1.0 Sheet 1 29 of 96 5 4 3 2 1 T3010 1 AC_IN_OC# 90 T3011 1 M_VREF 83 D D +3VA_EC +3VS +3VSUS +3VA +3VA_EC 28,47 +3VS 16,17,20,21,22,23,25,26,27,28,33,37,38,39,40,41,43,47,48,49,53,55,60,63,65,66,91,92 +3VSUS 4,22,23,27,28,33,43,61,81,92 +3VA 20,27,63,65,81,88,93 +3VA +3VA_EC @ L3001 1kOhm/100Mhz 1 1 0Ohm R3074 工工工工工工 R1.2 2 2012/11/06 T3014 2 1 T3015 1 T3016 +3VA_EC +3VA_EC SP3013 1 SP3021 1 SP3017 1 2 R0402 2 R0402 2 R0402 SLP_SUS#_R SP3018 1 2 R0402 R3075 1 2 0Ohm @ C3002 0.1UF/16V C3003 0.1UF/16V 92 74 C3004 10UF/10V 1 1 1 1 C3001 10UF/10V AD_IINP 88 SUS_PWRGD 81,92 ALL_SYSTEM_PWRGD VRM_PWRGD 80,92 THERM_ALERT#_EC SLP_SUS# 22 WLAN_WAKE# 55 VR_IMON 80 2 SUS_PWRGD_R ALL_SYSTEM_PWRGD_R VRM_PWRGD_R 1 66 67 68 69 70 71 72 73 2 ADC0/GPI0 ADC1/GPI1 ADC2/GPI2 ADC3/GPI3 ADC4/GPI4 ADC5/DCD1#/GPI5 ADC6/DSR1#/GPI6 ADC7/CTS1#/GPI7 VSTBY(PLL) VSTBY5 VSTBY4 VSTBY3 VSTBY2 VSTBY1 2 VBAT 2 3 127 121 114 92 50 26 2 U3001 1 +3VA_EC R1.2 2012/11/08 cost dwon 0ohm GND +3VACC SP3001 1 2 SP3002 +3VS 1 2 11 +3VS C 7 5 3 1 21,43,65 LPC_AD0 21,43,65 LPC_AD1 21,43,65 LPC_AD2 21,43,65 LPC_AD3 21 CLK_KBCPCI_PCH 21,43,65 LPC_FRAME# 23,33,40,43,47,53,55,70 BUF_PLT_RST# 21,43,65 INT_SERIRQ 25,65 EXT_SMI# 20 EXT_SCI# 25 A20GATE 25 RCIN# 47 EC_RST# 2012/11/06 22 119 123 ME_SUSPWRDNACK 4 THRO_CPU 48 48 B 工工工工工工 2012/11/06 Battery Thermal sensor H_PECI_EC H_PECI_EC 1 25 +3VS_WLAN T3012 +3VS_WLAN 1 2 1 85 86 87 1 63,88 63,88 28,49,74 28,49,74 C3011 37 1 T3009 88 eDP_ON#_EC 89 90 TP_CLK TP_DAT 110 111 115 116 117 118 SMB0_CLK SMB0_DAT SMB1_CLK SMB1_DAT LCD_BACKOFF# 10PF/50V 49 @71,74,84 CTL_FAN FB_CLAMP USBCHG_EN 55,81 R3041 10KOhm IOAC_EN 21,28 SPI_HOLD#_IO3 21,28 SPI_WP_IO2 2 R3044 1 0Ohm R3042 1 0Ohm 2 SPI_HOLD#_IO3_R SPI_WP_IO2_R 81 80 79 78 77 76 VCC RXD/SIN0/GPB0 TXD/SOUT0/GPB1 RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7 LAD0/GPM0 LAD1/GPM1 LAD2/GPM2 KSO16/SMOSI/GPC3 LAD3/GPM3 TMRI0/GPC4 LPCCLK/GPM4 KSO17/SMISO/GPC5 LFRAME#/GPM5 TMRI1/GPC6 LPCRST#/GPD2 PWUREQ#/BBO/SMCLK2ALT/GPC7 SERIRQ/GPM6 ECSMI#/GPD4 ECSCI#/GPD3 RI1#/GPD0 GA20/GPB5 RI2#/GPD1 KBRST#/GPB6 GINT/CTS0#/GPD5 WRST# TACH0A/GPD6 TACH1A/TMA1/GPD7 108 109 112 56 120 57 124 16 18 21 33 47 48 1 2 RF_ON 3 55 20 Q3001B UM6K1N PCH_FLASH_DESCRIPTOR 6 4 5 Q3001A UM6K1N 2 1 RF_ON_R GND GND R3035 2 1 0Ohm PCH_FLASH_DESCRIPTOR 61 SCLCDP_EC R3079 1 128 2 0OhmSCLCDP_EC_R 2 @ R1.2 2012/11/08 R1.2 2012/11/08 cost dwon 0ohm SCE# cost dwon 0ohm R1.2 2012/12/04SCK SI R1.2 2012/11/28 remove R3016 SO change back to 0ohm R1.2 2012/12/06 R3042, R3044 are replaced by SP3008, SP3012 R1.2 2012/12/17 SP3008, SP3012 replaced by 0ohm 101 105 102 103 2 R1.2 2012/11/08 follow MA50 For PU / PD +3VS R3062 1 10KOhm 2 @ AC_IN_OC R3004 1 BAT1_IN_OC# R3025 RN3001A RN3001B PM_SUSB# 22 PM_SUSC# 22 PM_PWROK 9,22,92 FAN0_TACH 49 USBP1_EN 61 FAN0_TACH C3007 0.1UF/16V C +3VA_EC KSO16 48 AC_IN_OC 74,88,90 KSO17 48 BAT1_IN_OC# 90 ME_AC_PRESENT 22 KSO17 C3006 0.1UF/16V EC_AGND LAN_PWR_ON# 33 BT_ON_EC 55 PM_RSMRST# 22 KSO16 R0603 2 47KOhm 1 10KOhm 2 1 2 3 4.7KOHM 4 4.7KOHM 1 3 3 1 RN3002A RN3002B RN3003B RN3003A PWR_SW#_M SMB0_CLK SMB0_DAT 2 TP_CLK TP_DAT SUSB_EC# SUSC_EC# 4.7KOHM4 4.7KOHM4 4.7KOHM2 4.7KOHM GND +3VS +3VS KSI0/STB# KSI1/AFD# KSI2/INIT# KSI3/SLIN# KSI4 KSI5 KSI6 KSI7 KSO0/PD0 KSO1/PD1 KSO2/PD2 KSO3/PD3 KSO4/PD4 KSO5/PD5 KSO6/PD6 KSO7/PD7 KSO8/ACK# KSO9/BUSY KSO10/PE KSO11/ERR# KSO12/SLCT KSO13 KSO14 KSO15 L80HLAT/BAO/GPE0 EGAD/GPE1 EGCS#/GPE2 EGCLK/GPE3 PWRSW/GPE4 RTS1#/GPE5 LPCPD#/GPE6 L80LLAT/GPE7 SSCE1#/FSCE1#/GPG0 FDIO2/DTR1#/SBUSY/GPG1/ID7 SSCE0#/GPG2 FDIO3/DSR0#/GPG6 CLKRUN#/GPH0/ID0 CRX1/SIN1/SMCLK3/GPH1/ID1 CTX1/SOUT1/GPH2/SMDAT3/ID2 HSCE#/GPH3/ID3 HSCK/GPH4/ID4 HMISO/GPH5/ID5 HMOSI/GPH6/ID6 19 82 83 84 125 35 17 20 SP3003 1 VSUS_ON_EC 1 LAN_WAKE# 106 107 100 104 93 94 95 96 97 98 99 EN_POC_PWR HSPI_CS HSPI_CLK HSPI_SO HSPI_SI R0402 VSUS_ON 63,81,91,93 SUSC_EC# 63,91 SUSB_EC# 22,23,63,91,92 CPU_VRON 80 PWR_SW#_M 65 RF_DET# 55 LID_SW# 37,65 T3008 1 RF_ON_R FDIO2 T3006 FDIO3 1 T3003 R3056 R3057 R3058 R3059 CRX0/GPC0 CTX0/TMA0/GPB2 2 RN3001D RN3001C R3055 SMCLK0/GPB3 SMDAT0/GPB4 SMCLK1/GPC1 SMDAT1/GPC2 SMCLK2/PECI/GPF6 SMDAT2/PECIRQT#/GPF7 8 SMB1_DAT SMB1_CLK 4.7KOHM 6 4.7KOHM 1 2 10KOhm THERM_ALERT#_EC R3017 1 10KOhm 2 A20GATE R3018 1 10KOhm 2 RCIN# R3060 1 10KOhm 2 FAN0_TACH R3066 1 10KOhm 2 R3038 1 10KOhm 2 1 1 1 1 CHGCB0 61 USBP2_EN 61 PCH_SPICS1# 21,28 PCH_SPICLK 21,28 PCH_SPISO 21,28 PCH_SPISI 21,28 2 0Ohm 2 0Ohm 2 0Ohm 2 0Ohm PM_SUSB# PM_SUSC# CPU_VRON R3006 R3007 1 1 2 100KOHM 2 100KOHM R3009 1 2 100KOHM PCH_FLASH_DESCRIPTOR R3076 1 2 100KOHM PM_RSMRST# 1 2 10KOhm R3011 1 10KOhm 2 IOAC_EN R3064 1 10KOhm 2 @ RF_DET# R3063 1 10KOhm 2 RF_DET# R3020 1 10KOhm 2 PM_PWRBTN# R3065 1 10KOhm 2 @ LAN_PWR_ON# R3014 47KOhm R3027 2 47KOhm 2 @ +3VSUS VSUS_ON R3008 1 2 100KOHM +3VSUS R3053 2 +5VSUS 1 100KOHM VSUS_ON @ FSCE# FSCK FMOSI FMISO AVSS 1 12 27 49 91 113 122 C3008 1 R3054 1 2 10KOhm VSUS_ON +5VA 75 1 PWR_BLUE_LED# 1 PWR_AMBER_LED# R1.2 2012/11/30 cost down @ R3015 47KOhm 2 1 BAT_ORG_LED# R3022 @ 47KOhm 2 1 CHG_LED_BLUE# @ mSATA_PWR_ON# LAN_PWR_ON# AUD_PWR_ON# CAMERA_PWR_ON# ODD_PWR_ON# 0.1UF/16V 2 GND GND R1.2 2012/12/05 R3065 changed to @ B +3VA_EC @ VSUS_ON Default Pull High to +3VSUS VSS1 VCORE VSS2 VSS3 VSS4 VSS5 VSS6 WLAN_WAKE# R3061 AC_IN_OC is pulled high at power DAC5/RIG0#/GPJ5 DAC4/DCD0#/GPJ4 DAC3/TACH1B/GPJ3 DAC2/TACH0B/GPJ2 HDIO3/GPJ1 TACH2/HDIO2/GPJ0 CK32K/GPJ6 CK32KE/GPJ7 FB_CLAMP_TGL_REQ# +3VA_EC R1.2 2012/11/08 cost dwon 0ohm R1.2 2012/11/28 change to 33ohm for Intel check list R1.2 2012/12/07 R3056~R3059 are replaced by SP3014, SP3015, SP3019, SP3020 R1.2 2012/12/17 SP3014, SP3015, SP3019, SP3020 are replaced by 0ohm PS2CLK0/TMB0/CEC/GPF0 PS2DAT0/TMB1/GPF1 PS2CLK1/DTR0#/GPF2 PS2DAT1/RTS0#/GPF3 PS2CLK2/GPF4 PS2DAT2/GPF5 7 5 2 R3040 10KOhm 81 2 R0402 2 R0402 2 R0402 2 R0402 10 9 8 7 13 6 22 5 15 23 126 4 14 58 59 60 61 62 63 64 65 36 37 38 39 40 41 42 43 44 45 46 51 52 53 54 55 88 BAT_LEARN 55 WLAN_RST#_EC 22 PM_PWRBTN# R1.2 1 1 1 1 1 T3013 48 KSI0 48 KSI1 48 KSI2 48 KSI3 48 KSI4 48 KSI5 48 KSI6 48 KSI7 48 KSO0 48 KSO1 48 KSO2 48 KSO3 48 KSO4 48 KSO5 48 KSO6 48 KSO7 48 KSO8 48 KSO9 48 KSO10 48 KSO11 48 KSO12 48 KSO13 48 KSO14 48 KSO15 工工工工工工 R1.2 SP3004 SP3005 SP3006 SP3007 8 RN3004DLAD0 6 RN3004CLAD1 4 RN3004BLAD2 2 RN3004ALAD3 47OHM 47OHM 47OHM 47OHM PWM0/GPA0 PWM1/GPA1 PWM2/GPA2 PWM3/GPA3 PWM4/GPA4 PWM5/GPA5 PWM6/SSCK/GPA6 PWM7/RIG1#/GPA7 AVCC EC_AGND 2 74 +3VACC GND PWR_BLUE_LED# 65,66 CHG_LED_BLUE# 66 BAT_ORG_LED# 66 PWR_AMBER_LED# 65,66 FB_CLAMP_TGL_REQ# 74 USBP0_EN 61 EC_SPKR 41 LCD_EC_PWM 37 1 R0603 24 25 28 29 30 31 32 34 C3005 0.1UF/16V EC_AGND IT8528E/AX 06V380000016 @ Cload=12.5PF place close to EC +3VA_EC +3VA_EC_SPI D3001@ 1 3 non-Share ROM Share ROM 2 R3039 1 0.8V/0.2mA 07V030000001 2 0Ohm A A +3VA_EC_SPI 1 0Ohm 15Ohm 1 R3072 2 0Ohm 1 SCE#_S SO_S ROM_WP#_S 1 2 3 4 CS# VCC DO(IO1) HOLD#/RESET#(IO3) WP#(IO2) CLK GND DI(IO0) 8 7 6 5 R30731 R3030 R3067 ROM_HD#_S SCLK_S SI_S 2 0Ohm 15Ohm 15Ohm FDIO3 SCK SI SCE# SO R3068 2 R3031 @ @ 1 0Ohm SCE#_nonS SO_nonS 15Ohm ROM_WP#_nonS W25Q32FVSSIQ 05V000000022 @ (32Mb) need to check ROM P/N 5 U3002 1 2 CE# 3 SO 4 WP# GND VCC HOLD# SCK SIO PM25LD010C-SCE @ GND 4 R3001 3.3KOhm 1 R3013 3.3KOhm C3010 0.1UF/16V 2 R3069 2 R3029 SCE# SO FDIO2 +3VA_EC_SPI R1.2 2012/11/08 cost dwon 0ohm R1.2 2012/11/28 change back to 0ohm 2 2 R3070 1KOhm U3003 +3VA_EC_SPI 1 C9201 0.1UF/16V R1.2 2012/11/28 follow Intel design guide 2 R3071 1KOhm 1 R1.2 2012/11/08 cost dwon 0ohm R1.2 2012/11/28 change back to 0ohm 2 1 2 R1.2 2012/11/28 follow Intel design guide 1 +3VA_EC_SPI 3 8 7 6 5 @ Title : ITE8528E @ ROM_HD#_nonS SCK_nonS SI_nonS (128KB) 15Ohm 15Ohm R3016 R3023 Engineer: BU2/RD3 SCK SI Size @ @ Date: 2 Wing_Cheng Project Name Custom Rev VA70_HW Friday, January 18, 2013 1.0 Sheet 30 of 96 1 5 4 3 2 1 Close to LAN chip within 250mils 24 24 +VDD1.2_LAN 2 PCIE_TXP3 PCIE_TXN3 C3310 4.7UF/6.3V C3307 0.1UF/10V C3304 0.1UF/10V C3305 C3321 2 2 CLK_PCIE_LAN 21 CLK_PCIE_LAN# 21 1KOhm/100Mhz 09V010000038 C3320 4.7UF/6.3V 0.1UF/10V CLK_PCIE_LAN CLK_PCIE_LAN# L3301 2 1 +VDD_GPHYPLL 0.1UF/10V 1 PCIE_TXP3_LAN PCIE_TXN3_LAN +VDD1.2_LAN 1 24 1 24 PCIE_RXN3_LAN 1 PCIE_RXP3_LAN 2 1 0.1UF/10V 2 1 0.1UF/10V 2 1 2 C3314 2 C3315 PCIE_RXN3_LOM 1 PCIE_RXP3_LOM D D +VDD1.2_LAN R1.2 2012/10/29 pin 46~48 has been connected together. 4.7KOhm 2 4.7KOhm 1 2 2 1 2 X3301 XTALO_R 1 25MHZ 3 XTALI C C3309 15PF/50V 1AV200000005 AVDDL 1 1 2 2 4.7UF/6.3V AVDDH R1.1 AVDDL AVDDH AVDDL RDAC R3302 1 BIASVDD L_TRDN2 L_TRDP2 34 34 L_TRDP1 L_TRDN1 34 34 L_TRDN0 L_TRDP0 34 34 10/31 EMI CHANGE +VDD33_LOM C3313 L3302 2 1 AVDDH 2 1.24KOhm 10V220000198 C3312 0.1UF/10V 1KOhm/100Mhz 09V010000038 0.1UF/10V BCM57780A0KMLG 02V0H0000001 XTALO XTALVDD 4 2 200Ohm 0.1UF/10V 36 35 34 33 32 31 30 29 28 27 26 25 13 14 15 16 17 18 19 20 21 22 23 24 R3301 XTALO AVDDH2 TRD2_N TRD2_P AVDDL2 TRD1_P TRD1_N AVDDH1 TRD0_N TRD0_P AVDDL1 RDAC BIASVDDH 1.5KOhm/100Mhz 09V010000039 1 2 LOW_PWR PERST# CLKREQ# WAKE# MODE VDDC1 VREGPNP_CTL SR_VFB SR_VDD SR_VDDP SR_LX XTALI L3306 2 1 C3317 C3325 15PF/50V 1AV200000005 R1.1 change value for -R test report +VDD33_LOM 1 XTALVDD C3324 L3303 2 C 1KOhm/100Mhz 09V010000038 0.1UF/10V 2 @ U3301 C3318 2 LAN_LPWR_R 1 2 23,30,40,43,47,53,55,70 BUF_PLT_RST# 2 R0402 3 SP3302 1 21 CLK_REQ4_LAN# 4 PCIE_WAKE#_LAN 5 R1.1 IOAC 10/31 6 VDDC 7 +VDD33_LOM 8 NB_R0603_32MIL_SMALL +VDD1.2_LAN 2 9 SR_VDD SP3301 1 10 11 LX 12 XTALI C3302 C3316 4.7UF/6.3V 0.1UF/10V GND LINKLED# SPD100LED# SPD1000LED# TRAFFICLED# EECLK EEDATA VDDO VDDC3 VMAIN_PRSNT AVDDL3 TRD3_P TRD3_N 1 0Ohm @1 VDDC PCIE_RXN3_LOM PCIE_RXP3_LOM +VDD_LANPLL CLK_PCIE_LAN# CLK_PCIE_LAN +VDD_LANPLL PCIE_TXP3 PCIE_TXN3 +VDD_GPHYPLL 1 R3311 R3308 2 1 R3312 1 +VDD1.2_LAN R1.0 chnge VP P/N. XTALO XTALVDDH VDDC2 PCIE_TXD_N PCIE_TXD_P PCIE_PLLVDDL1 PCIE_REFCLK_N PCIE_REFCLK_P PCIE_PLLVDDL2 PCIE_RXD_P PCIE_RXD_N GPHY_PLLVDDL R1.2 2012/11/08 cost dwon 0ohm T3301 R1.2-26 EMI AVDDL 2 +VDD33_LOM PCIE_WAKE#_LAN 1KOhm/100Mhz 09V010000038 4.7UF/6.3V 34 34 49 48 47 46 45 44 43 42 41 40 39 38 37 EECLK EEDAT VDDO VDDC L_TRDP3 L_TRDN3 BUF_PLT_RST# C3323 1 C3322 0.1UF/10V 2 Frank 0503 LAN_LPWR is not defined GPIO in PCH . 1 +VDD_LANPLL R3303 1KOhm LED_LINKn 2 LED_BLINKINGn 34 2 34 1 10UF/6.3V L3307 2 1 2 2 4.7UH 09V030000084 Irat=1.2A C3308 +VDD1.2_LAN +VDD33_LOM +3VS 1 1 1 C3301 0.1UF/10V LX 1 L3304 VDDC +VDD33_LOM +VDD33_LOM +VDD33_LOM 1 R3304 1KOhm 2 R3305 1KOhm 1 1 U3302 8 7 6 5 2 2 EECLK @ EEDAT R3307 R3306 1KOhm 1KOhm 0.1UF/10V @ 1 L3305 2 1KOhm/100Mhz 09V010000038 0.1UF/10V 1 2 3 4 AT24C02C-XHM-T 05V020000003 @ 1 1 @ VCC A0 WP A1 SCL A2 SDAGND C3319 2 1 2 2 BIASVDD C3303 Title : LAN_RTL8411 BG1-HW RD Div.2-NB RD Dept.5 Size Engineer: Wing_Cheng Project Name D Date: Friday, January 18, 2013 Rev VA70_HW Sheet 1.0 33 of 96 B B R1.2 2012/10/29 option changed from /ABCT For LAN power control on S5 state R3315 1 2 0Ohm 10V440000001 @ +3VSUS +VDD33_LOM 1.5KOhm/100Mhz 09V010000039 1 SI2304BDS-T1-GE3 Q3301 /TP1_LAN 2 2 +12VSUS 10/31 EMI CHANGE L3308 2 1 1 G 3 D 2 S 1 C3311 4.7UF/6.3V C3306 0.1UF/10V 2 R1.1 R3313 10KOhm 2 S 2N7002 /TP1_LAN PCIE_WAKE# D 22,53 2 G 1 1 LAN_PWR_ON# 3 G D Q3302 30 S 2 3 1 1 R3314 100KOhm /TP1_LAN PCIE_WAKE#_LAN R1.1 IOAC 10/31 2N7002 Q3303 @ 0Ohm 1 R3309 2 C3355 1UF/25V 1AV300000031 /TP1_LAN A A 5 4 3 2 1 5 4 3 2 1 FAE suggestion 1003 Co-Layout LU3401 33 D L_TRDP0 L_TXP_T 2 33 L_TRDN0 33 L_TRDP1 L_TXN_T L_TRDN1 33 L_TRDP2 L_RXP_T 33 L_TRDN2 L_TRDP3 L_RXN_T L_TRDN3 3 5 1 4 6 0.1UF/16V L_TRLP2_T 8 C3408 L_TRLM2_T 1 7 9 0.1UF/16V L_TRLP3_T 11 C3407 2 33 1 C3409 2 33 1 0.1UF/16V 2 33 2 C3410 L_TRLM3_T 1 10 12 0.1UF/16V TD1+ MX1+ TCT1 MCT1 TD1- MX1- TD2+ MX2+ TCT2 MCT2 TD2- MX2- TD3+ MX3+ TCT3 MCT3 TD3- MX3- TD4+ MX4+ TCT4 MCT4 TD4- MX4- L_TXP 24 L_CMT0 22 L_TXN 20 L_RXP 21 L_CMT1 D 19 L_RXN 17 L_TRLP2 18 L_CMT2 16 L_TRLM2 14 L_TRLP3 15 L_CMT3 13 L_TRLM3 R3401 1 2 75Ohm EMI suggest to change 0805 size 0921 GST5009 C3403 1500PF/2KV 2 1 09V120000003 23 C C D3401 EMI Req @ 1 2 LAN_GND AZ2025-01H.R7G 2 0Ohm R3402 1 2 1 C3404 10PF/50V 2 1 C3405 10PF/50V 2 1 C3406 +VDD33_LOM 510Ohm 1 2 LED_LINKn R3405 LED_LINKn 33 C3402 470PF/50V @ 1 LAN_GND R1.2 2012/11/08 cost dwon 0ohm R1.2 2012/12/04 change short pin size SP3401 NB_R0402_20MIL_SMALL 2 1 10PF/50V 2 LAN_GND 10 13 11 1 CON3401 12V23GBSD009 P_GND1 P_GND2 2 SP3402 NB_R0402_20MIL_SMALL 1 2 3 4 5 6 7 8 Y R1.2 2012/11/08 cost dwon 0ohm R1.2 2012/12/04 change short pin size L_TXP L_TXN L_RXP L_TRLP2 L_TRLM2 L_RXN L_TRLP3 L_TRLM3 G +VDD33_LOM LAN_GND LAN_JACK_8P 14 9 B 12 B 1 2 510Ohm LED_BLINKINGn 33 1 R3404 2 @ C3401 470PF/50V Close Connector LAN_GND LAN_GND A ATitle : RJ45/ RJ11 Engineer: Wing_Cheng BG1-CSC-HW R&D Dept.5 Size Project Name Custom Date: 5 4 3 2 Rev VA70_HW Sheet Friday, January 18, 2013 1 1.0 34 of 96 5 4 3 2 1 R1.2 2012/10/29 All components options changed from /non_FDI R1.2 2012/12/06 remove U3501 for GDDR5 D D C C B B A A Title : DP to VGA Engineer: Wing_Cheng BG1-CSC-HW R&D Dept.5 Size Project Name Rev Custom Date: 5 4 3 2 VA70_HW Friday, January 18, 2013 1 Sheet 1.0 35 of 96 5 4 3 2 1 D D C C B B Initial Code EEPROM A A Title : LVDS CONN BU1-RD Div.1-HW RD Dept.1 Size Date: 5 4 3 2 Engineer: Wing_Cheng Project Name Custom Rev VA70_HW Friday, January 18, 2013 1 Sheet 1.0 36 of 96 A B C D LVDS LVDS/eDP control signal LVDS/EDP 1 E 共共pin LVDS/EDP 共共pin 1 CH A LCD_BACKOFF LCD_VDD_EN LCD_BL_PWM LCD_BACKEN_PCH LCD_VDD_EN_PCH 23 23 LCD_BL_PWM_PCH 23 CH B 2 +EDP_VCC D3704 1 R3704 10KOhm 2 LCD_BACKOFF# 30 1 RB751V-40 D3701 2 LID_SW# 3 1 LCD_BACKOFF 2 1V/0.1A 30,65 R3712 100KOhm BACK_EN_C 2 1 1 2 C3706 2 100PF/50V @ 1kOhm/100Mhz 2 L3703 1 @ 1 C3707 LCD_EC_PWM 30 Irat=300mA 2 L3702 LCD_BL_PWM_C 1 0Ohm LCD_BL_PWM 1 R3703 0Ohm 2 @ R1.3 2013/1/21 L3702 is changed to 0ohm EDP_DISP_UTIL 4 2 100PF/50V R1.2 2012/11/29 P/N changed to 12V37GBSM011 R1.2 2012/11/19 Pin mapping changed R1.2 2012/11/29 option changed from N/A R1.2 2012/12/06 remove CON3704 for GDDR5 3 From CPU eDP DP_AUXP DP_AUXN C3716 C3717 1 1 2 0.1UF/10V 2 0.1UF/10V EDP_AUXP 4 EDP_AUXN 4 DP_TXP0 DP_TXN0 C3722 C3718 1 1 2 0.1UF/10V 2 0.1UF/10V EDP_TXP0 4 EDP_TXN0 4 DP_TXP1 DP_TXN1 C3724 C3723 1 1 2 0.1UF/10V 2 0.1UF/10V EDP_TXP1 4 EDP_TXN1 4 R1.2 2012/11/15 Changing to 30pins+10pins 3 +EDP_VCC 1 +3VS +3V_CMOS 1 R3719 10KOhm CPU HPD low active 0.1UF/16V 41 EDP_HPD# D DP_TXN1 DP_TXP1 DP_TXN0 DP_TXP0 S 2 D3703 L3701 80Ohm/100Mhz 1 DP_AUXP DP_AUXN G +EDP_VCC R3720 100KOhm 2 T3701 1 2 2 1 AC_INV 2 Irat=2A DP_HPD_C 1 +AC_BAT_SYS ANALOG INT_MIC_AC_IN INT_MIC_AC_IN Q3701 2N7002 3 1 1 +3V_CMOS_C USBP8-_E USBP8+_E C3733 2 4 2 CON3703 2 Irat=500mA C3702 1UF/6.3V 1AV200000038 4.7UF/6.3V 2 2 C3701 C3708 C3709 @ 0.1UF/25V 0.1UF/25V C3721 39PF/50V 1AV200000014 @ AZ2025-01H.R7G BIST @ 1 10PF/50V C3726 AC_INV AC_INV AC_INV AC_INV SP3702 1 2 R0402 A_GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 +3V @ R3706 SIDE3 1 33 0Ohm RN3711A 2 1 @ 24 USB_PN8 +3VS SIDE4 24 USB_PP8 +3V_CMOS R3707 34 0Ohm @ 1 2 0Ohm 3 0Ohm RN3711B @ SIDE5 2 4 C3732 22PF/50V USBP8-_E L3704 90Ohm/100Mhz USBP8+_E 4 C3731 22PF/50V @ 35 WTOB_CON_30P 32 ANALOG 1 DP_HPD_C BACK_EN_C LCD_BL_PWM_C @ 2 USB Camera L3705 120Ohm 1 1 1 +VCCIO_OUT 2 HPD 1 1+EDP_VCC_OUT 150Ohm 1 2 2 2 +EDP_VCC_R 1 4 2 DSG 4 EN 3 R3701 GND 3 R1.2 2012/10/29 option changed from /non_FDI R1.2 2012/12/06 remove C3727~C3730 for GDDR5 31 5 G5244T11U 1 4 IN SIDE1 OUT 2 LCD_VDD_EN R3713 100KOhm R1.2 2012/11/26 prevent +EDP_VCC voltage drop R1.2 2012/11/28 SCL, SDA changed to +EDP_VCC R1.2 2012/11/30 CON3704 pin8 chaged to NC U3701 +EDP_VCC_OUT 1 SIDE2 2 R3724 0Ohm 12V37GBSM007 +3VS D3702 +EDP_VCC 5 INT_MIC_AC_IN C3719 39PF/50V 1AV200000014 @ C3710 0.1UF/10V 1AV200000024 AZ2025-01H.R7G 1 R1.2 2012/11/20 P/N changed @ 2 5 C3720 39PF/50V 1AV200000014 @ Title : LVDS CONN BU1-RD Div.1-HW RD Dept.1 Size Date: A B C D Engineer: Wing_Cheng Project Name Custom Monday, January 21, 2013 E Rev VA70_HW Sheet 1.0 37 of 96 5 4 23 DAC_R_PCH 23 DAC_G_PCH D 23 DAC_B_PCH 3 2 DAC_R 1 JP3801 2 V_RED_J SHORT_PIN L3801 1 DAC_G 1 JP3802 2 V_GREEN_J SHORT_PIN L3802 1 DAC_B 1 JP3803 2 V_BLUE_J SHORT_PIN L3803 1 2 75Ohm/100Mhz 1 RED 09V010000050 2 75Ohm/100Mhz GREEN 09V010000050 2 75Ohm/100Mhz D BLUE 09V010000050 DDC2BD_5 R3814 1 2 0Ohm R1.2 2012/10/29 option changed from /non_FDI HSYNC_CRT R3804 2 1 0Ohm HSYNC VSYNC_CRT R3805 2 1 0Ohm VSYNC R1.2 2012/12/06 remove R3837, R3838 for GDDR5 DDC2BC_5 R3815 1 2 0Ohm DDC2BC_S DDC2BD_S 23 23 DDC2BD_PCH DDC2BC_PCH C3809 2 C3808 1 C3807 1 C3806 2 1 C3805 C3810 1 2 2 1 10PF/50V10PF/50V10PF/50V12PF/50V6.8PF/50V6.8PF/50V12PF/50V 2 2 C3804 1 C3803 10PF/50V10PF/50V10PF/50V 2 1 C3802 1 1 C3801 2 2 R3803 150Ohm 1% 2 1 1 1 2 Q3801A 1 R3807 2.2KOhm 2 DDC2BD 1 6 2 DDC2BC 4 2 C 2 2 R3806 2.2KOhm 5 UM6K1N R3802 150Ohm 1% +5VS_CRT 1 2 +3VS C 1 R3833 0Ohm 1 R3834 R3801 150Ohm 1% D3804 RB751V-40 2 R1.2 2012/10/29 option changed from /FDI R1.2 2012/12/19 option changed from /non_RETINA 2 1 1 +5VS 3 DDC2BD_5 DDC2BC_5 0Ohm Q3801B UM6K1N The LC filter circuit(NV DSC only) DDC:L=27nH,C=12PF HSYNC/VSYNC:L=27nH,C=47PF RGB:L=100nH,C=10PF CON3801 16 5 CRT_IN#_EC_CON 4 3 BLUE 2 GREEN 1 RED R3822 0Ohm +5VS U3801 R1.2 2012/10/29 option changed from /FDI DAC_VSYNC_PCH R3823 1 2 0Ohm GND Y A OE# Vcc 4 DAC_VSYNC B HSYNC_CRT 17 5 74AHCT1G125GW 06V030000010 R1.2 2012/12/19 option changed from /non_RETINA 23 3 2 1 4 DAC_HSYNC D3801 CM1293_04SO @ D_SUB_15P 12V10GBRD012 +5VS_CRT U3802 1 2 3 OE# Vcc A GND Y 5 4 VSYNC_CRT HSYNC 1 74AHCT1G125GW 06V030000010 R1.2 2012/10/29 option changed from /non_FDI_@ 3 2 0Ohm DDC2BC_S R3824 1 5 DAC_HSYNC_PCH 2 23 6 B DDC2BD_S DDC2BD_S 15 10 14 9 13 8 12 7 11 6 VSYNC HSYNC 1 VSYNC R1.2 2012/12/06 remove R3825, R3826, R3835, R3836 for GDDR5 2 DDC2BC_S R1.2 2012/10/29 option changed from /non_FDI_@ R1.2 2012/12/06 remove R3825, R2826, R3835, R3836 for GDDR5 A A Title : CRT Engineer: Wing_Cheng BU1-RD Div.1-HW RD Dept.1 Size Project Name Custom Date: 5 4 3 2 Rev VA70_HW Friday, January 18, 2013 Sheet 1 1.0 38 of 96 5 4 4 HDMI_CLKP_PCH C3908 1 2 0.1UF/16V HDMI_CLKP 4 HDMI_CLKN_PCH C3910 1 2 0.1UF/16V HDMI_CLKN HDMI_TXP0_PCH C3909 1 2 0.1UF/16V HDMI_TXP0 4 HDMI_TXN0_PCH C3911 1 2 0.1UF/16V HDMI_TXN0 4 HDMI_TXP1_PCH C3904 1 2 0.1UF/16V HDMI_TXP1 4 HDMI_TXN1_PCH C3905 1 2 0.1UF/16V HDMI_TXN1 4 HDMI_TXP2_PCH C3906 1 2 0.1UF/16V HDMI_TXP2 4 HDMI_TXN2_PCH C3907 1 2 0.1UF/16V HDMI_TXN2 2 R3915 2 R3910 680OHM 1 2 R3912 680OHM 1 2 R3911 2 R3913 2 R3917 2 R3916 680OHM 1 680OHM 1 680OHM 1 680OHM 1 2 R3914 680OHM 1 3 D Q3902 G EMI solution 2N7002 N/A 2 S HDMI_CLKP R3922 1 @ 2 220Ohm 10V220000339 HDMI_CLKN HDMI_TXP0 R3923 1 @ 2 220Ohm 10V220000339 HDMI_TXN0 HDMI_TXP1 R3924 1 @ 2 220Ohm 10V220000339 HDMI_TXN1 HDMI_TXP2 R3925 1 @ 2 220Ohm 10V220000339 HDMI_TXN2 GND @ 1 HDMI_TXN2_CON 3 2 4 suggestion 0922 2 RN3901A 0Ohm 1 2 3 @ 0Ohm 1 R3910,R3911,R3912,R3913,R3914,R3915,R3916,R3917 Intel design guide : 680ohm /UMA NV reference schematics : 499ohm /DGPUO 1 +5VS 3 1 4 R1.2 2012/12/03 L3901~L3904 are changed to 90ohm for layout to change footpring 0ohm are removed cause they can't co-lay with new footprint R1.2 2012/12/04 L3903, L3902 pin mapping changed Add RN3901~RN3904 for layout R1.2 2012/12/11 changed to 45ohm R1.3 2013/1/15 @ changed to 67ohm 1 2 RN3903A HDMI_TXN0 HDMI_TXN0_CON HDMI_TXN2 0Ohm R1.3 2013/1/16 L3901~L3904 are swaped L3904 67ohm N/A EMI 09V090000007 2 D Close to connector and do T routing 680OHM 1 4 D 3 3 @ 0Ohm L3901 67ohm N/A 09V090000007 EMI suggestion 0922 C C HDMI_TXP0 4 HDMI_TXP0_CON HDMI_TXP2 RN3903B @ 3 HDMI_CLKP 4 HDMI_TXP2_CON RN3901B @ 0Ohm 4 RN3904B HDMI_CLKP_CON 3 HDMI_TXP1 0Ohm 4 RN3902B HDMI_TXP1_CON HDMI_SCL & HDMI_SDA : no via , trace length should be as short as possible 2 4 +12VS HDMI_CLKN_CON @ 0Ohm 1 HDMI_TXN1 RN3904A 2 HDMI_TXN1_CON RN3902A G 2 3 HDMI_TXP2_CON HDMI_TXN2_CON 3 2 C3901 HDMI_TXP0_CON HDMI_TXN0_CON D3902 1V/0.1A 1 0.1UF/25V +3VS RN3905,RN3906 Intel design guide:2.2K ohm /UMA NV reference schematics:4.7K ohm /DGPUO +5VS_HDMI 0.35A/6V NDS351AN_NL Q3901 1 2 2 4 HDMI_SCL HDMI_HPD_CON 1 3 5 7 9 11 13 15 17 19 1 3 5 7 9 11 13 15 17 19 2 4 6 8 10 12 14 16 18 2 4 6 8 10 12 14 16 18 HDMI_TXP1_CON HDMI_TXN1_CON HDMI_CLKP_CON HDMI_CLKN_CON HDMI_SDA +5VS_HDMI RN3906A 2.2KOhm RN3906B 2.2KOhm HDMI_SCL HDMI_SDA 11KOhm C3902 10PF/50V @ R3920 2 @ C3903 10PF/50V @ 2 +3VS 1 3 Q3904B UM6K1N 1 6 4 Q3904A UM6K1N 2 1 HDMI_SCL_PCH HDMI_SDA_PCH HDMI_DDC_CLK_PCH HDMI_DDC_DATA_PCH 5 23 23 R1.0 0106 HDMI HPD Cost Reduced Level Shifter Design Recommendation 1 R3902 2 HDMI_HPD_CON 4.7KOhm EMI solution 1 HDMI_HPD HDMI_HPD_PCH 3 23 11KOhm HDMI_CLKN_CON HDMI_CLKP_CON 3 1 CON3901 2 3 1 +3VS @ RN3905A 2.2KOhm 21 23 RN3905B 2.2KOhm P_GND2 P_GND4 B 4 2 B 1 D 2 S +5VS 12V12GBRD001 HDMI_CON_19P P_GND1 P_GND3 1 F3901 R39212 2 3 1 2 @ 0Ohm L3903 67ohm N/A 09V090000007 EMI suggestion 0922 L3902 67ohm N/A 09V090000007 20 22 1 HDMI_CLKN 3 4 1 EMI suggestion 0922 R3918 10KOhm A 1 2 2 D3901 1.25V/0.15A A +3VS Title : HDMI BG1-HW RD Div.2-NB RD Dept.5 Size Custom Engineer: Rev VA70_HW 1.0 Date: Friday, January 18, 2013 5 4 3 2 Wing_Cheng Project Name Sheet 1 39 of 96 5 4 3 2 1 From System's PCIE interface PCIE_TXN1_CR 24 PCIE_RXP1_CR PCIE_RXP1_CR 24 PCIE_RXN1_CR PCIE_RXN1_CR SD_D3 R0402 @ @ +3V_CARD MS_CLK_R SD_CMD MS_D3 MS_INS# C4011 10PF/50V MS_D2 +3V_CARD 2 R0402 1 P_GND1 1 SD/MMC/MMC plus/MS/xD 2 GND C4022 0.1UF/16V +3V_CARD C4008 C4002 SD CARD CAP C4003 MS CARD CAP C4004 XD CARD CAP DV12 C4023 10UF/10V RREF 3V3_IN2 CLK_REQ# PERST# EEDO EECS EESK GPIO/EEDI MS_INS# SD_CD# SP15 SP14 2 SP1 SP2 SP3 SP4 SD_D1 SD_D0 SD_CLK SD_CMD SD_D3 2 XD_CD# DV33_18 1 1 C 4.7UF/6.3V C4021 1 2 Part number:020J-007D000 R4001 GND C4002 0.1UF/16V 1 GND GND SD_D2 GND C4003 0.1UF/16V 2 RTS5209-GR AV12 +3V_CARD GND 1 C4008 0.1UF/16V SP13 SP12 SP11 SP10 SP9 SP8 SP7 SP6 SP5 DV12_S 2 2 2 C4006 10UF/10V 36 35 34 33 32 31 30 29 28 27 26 25 1 1 trace width 40mils 2 DV12 0.1UF/16V +3VS SP13 SP12 SP11 SP10 SP9 SP8 SP7 SP6 SP5 DV12_S GND3 SD_D2 1 1 C4007 HSIP HSIN REFCLKP REFCLKN AV12 HSOP HSON GND1 DV12 Card1_3V3 3V3_IN1 Card2_3V3 xD_CD# DV33_18 GND2 SP1 SP2 SP3 SP4 SD_D1 SD_D0 SD_CLK SD_CMD SD_D3 GND +3V_CARD 1 GND CARD_READER_40P 12V34GBSM002 13 14 15 16 17 18 19 20 21 22 23 24 U4000 1 2 3 4 5 6 7 8 9 10 11 12 T4010 T4009 T4005 T4008 +3VS CLK_REQ1_CR# BUF_PLT_RST# 1 1 1 1 MS_INS# SD_CD# SP15 SP14 2 1% R4019 RES 6.2K OHM 1/16W (0402) 1% 10V220000088 0.1UF/16V 2 2 0.1UF/16V SD_CD# SD_D0 SD_D1 SD_WP XD_D0 XD_D1 XD_D2 XD_D3 XD_D4 XD_D5 XD_D6 XD_D7 48 47 46 45 44 43 42 41 40 39 38 37 1 GND PCIE_TXP1_CR PCIE_TXN1_CR CLK_PCIE_CR_PCH CLK_PCIE_CR#_PCH C4016 2 4.7UF/6.3V 1 AV12 HSOP_R HSON_R C4010 10PF/50V C4019 0.1UF/16V 2 1 GND C MS_D1 MS_BS 2 @ MS_D0 SD_CLK_R @ 2 C4014 10PF/50V SP4002 1 1 SD_CLK XD_CD# XD_RDY XD_RE# XD_CE# XD_CLE XD_ALE XD_WE# XD_WP# NP_NC2 2 2 C4013 10PF/50V SP4001 1 P40 P39 P38 P37 P36 P35 P34 P33 P32 P31 P30 P29 P28 P27 P26 P25 P24 P23 P22 P21 2 MS_CLK BUF_PLT_RST# BUF_PLT_RST# C4012 PCIE_RXP1_CR 1 PCIE_RXN1_CR 1 C4009 D SD_DAT2 XD_GND2 MS_VSS(GND)2 XD_CD SD_DAT3/MMC_RSV XD_R/XD_B MS_VCC XD_RE MS_SCLK XD_CE SD_CMD/MMC_CMD XD_CLE MS_DATA3 XD_ALE MS_INS XD_WE SD_VSS/MMC_VSS1 XD_WP MS_DATA2 XD_GND1 SD_VDD/MMC_VDD XD_D0 MS_SDIO/DATA0 XD_D1 SD_CLK/MMC_CLK XD_D2 MS_DATA1 XD_D3 MS_BS XD_D4 MS_VSS(GND)1 XD_D5 SD_CD XD_D6 SD_DAT0/MMC_DAT XD_D7 SD_DAT1 XD_VCC SD_WP SD_VSS/MMC_VSS2/GND_FOR_CD/WP 3 CLK_REQ1_CR# CLK_REQ1_CR# P20 P19 P18 P17 P16 P15 P14 P13 P12 P11 P10 P9 P8 P7 P6 P5 P4 P3 P2 P1 SD_D2 R1.2 2012/11/08 cost dwon 0ohm CLK_PCIE_CR#_PCH 2 21 23,30,33,43,47,53,55,70 GND CLK_PCIE_CR_PCH 1 CLK_PCIE_CR#_PCH 2 21 1 CLK_PCIE_CR_PCH CON4001 NP_NC1 D 21 +3VS +3VS PCIE_TXN1_CR 4 PCIE_TXP1_CR PCIE_TXP1_CR 16,17,20,21,22,23,25,26,27,28,30,33,37,38,39,41,43,47,48,49,53,55,60,63,65,66,91,92 24 P_GND2 24 C4004 0.1UF/16V Close to connector 0Ohm @ 2 C4020 2 C4024 GND 1 4.7UF/6.3V 1 0.1UF/16V @ GND B Remove Serial Flash Reserve for BIOS boot function Pin Name Description SP1 SD_D7/XD_RDY SP1 SD_D7 XD_RDY SP2 SD_D6/XD_RE# SP2 SD_D6 XD_RE# SP3 SD_D5/XD_CE# SP3 SD_D5 XD_CE# SP4 SD_D4/XD_WE# SP4 SD_D4 SP5 MS_BS/XD_CLE SP5 MS_BS XD_CLE SP6 MS_D5/XD_ALE SP6 MS_D5 XD_ALE SP7 MS_D1/XD_WP# SP7 MS_D1 XD_WP# SP8 MS_D4/XD_D0 SP8 MS_D4 XD_D0 SP9 MS_D0/XD_D1 SP9 MS_D0 XD_D1 SP10 MS_D2/XD_D2 SP10 MS_D2 XD_D2 SP11 MS_D6/XD_D3 SP11 MS_D6 XD_D3 SP12 MS_D3/XD_D4 SP12 MS_D3 XD_D4 SP13 MS_D7/XD_D5 SP13 MS_D7 XD_D5 SP14 MS_CLK/XD_D6 SP14 MS_CLK XD_D6 SP15 SD_WP/XD_D7 SP15 XD_WE# SD_WP B XD_D7 Share Pin When EECS switch to be D3-Delink sideband signal, Serial Flash function is disabled. A A Title : Engineer: BG1/CSC/HW5 Size C Date: 5 4 3 2 RTS5209 Wing_Cheng Project Name Rev VA70_HW 1.0 Sheet Friday, January 18, 2013 1 40 of 96 5 4 +12VS Intel 1.01 Design Guide update #440484 R1.3 use dual mosfet 3 +12VS 2 +5VS +5VS 38,39,42,49,60,63,66,80,87,91 +3VS +3VS 16,17,20,21,22,23,25,26,27,28,30,33,37,38,39,40,43,47,48,49,53,55,60,63,65,66,91,92 1 @ 5 Q4101B UM6K1N 6 SP4103 1 ACZ_SDOUT_AUD SP4104 1 ACZ_SYNC_AUD 2 R0402 2 R0402 ACZ_SYNC_AUD_R ACZ_SDOUT_AUD_R R1.2 2012/11/08 cost dwon 0ohm R1.2 2012/11/08 cost dwon 0ohm D 1 4 20 20 UM6K1N Q4101A 2 @ 3 D Moat +5VS +5VS_AUDIO B4102 1 Irat=2A 2 80Ohm/100Mhz vx_l0805_h43_small B4104 1 Irat=2A 2 80Ohm/100Mhz vx_l0805_h43_small +3VS_DVDD +5VS_AMP +5VS +3VS >30 mil or shape +5VS_AMP B4101 2 Placement near audio codec AVDD +5VS_AMP 2 2 1 2 C4108 10UF/10V 1 1 B4108 C4102 0.1UF/16V 1 C4115 0.1UF/16V C4113 10UF/10V 2 Moat 120Ohm 1 +1.5VS Placement near audio codec 2 120Ohm B4107 1 2 @ H_SPKR+_M H_SPKR-_M H_SPKL-_M H_SPKL+_M 1 AVDD 1 C4101 0.1UF/16V 1 2 3 VREFOUT_A_E_L 61 61 HP_JD# MIC_EXT_JD# A_GND @ R4104 R4101 1 1 1% 1% 2 39.2KOhm 2 20KOhm R4102 1 1% 2 20KOhm COMBO_MIC_IN_AC_E_L COMBO_MIC_IN_AC_E_R COMBO JACK MIC 1 1UF/6.3V 2 R4114 C4104 2.2UF/10V 42 42 C4144 1 2 A_GND 10UF/10V @ C4158 10UF/10V @ C4135 2 1 1UF/6.3V 2 R4125 1 VREFOUT_A_E_L AUD_LDO_CAP 2 2 C4136 @ 1000PF/50V 2 MIC2_VREFO JP4101 AUD_LDO_CAP 1 1KOhm R4126 10KOhm VREFOUT_A_E_R 1 1KOhm A_GND C4154 @ 1000PF/50V INT_MIC_AC_IN 37 A_GND Frank 0503 Vender request close codec IC R1.2 2012/11/08 cost dwon 0ohm R1.2 2012/12/18 short pin changed to 20 mil 1 C4142 10UF/10V @ 2 1 2 2 C4145 10UF/10V @ C4117 10UF/10V @ 2 2 1 1 2 C4160 10UF/10V C4105 10UF/10V A_GND SHORTPIN @ A_GND A_GND A_GND A_GND U4101B 50 51 52 53 54 55 56 57 GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 1 SP4101 1 SP4102 1 SP4106 1 SP4105 H_SPKL+_M H_SPKL-_M H_SPKR+_M H_SPKR-_M B CON4101 2 NB_R0402_20MIL_SMALL H_SPKL+ 2 NB_R0402_20MIL_SMALL H_SPKL2 NB_R0402_20MIL_SMALL H_SPKR+ 2 NB_R0402_20MIL_SMALL H_SPKR- 1 2 3 4 GND2 1 2 3 4 GND1 ALC3225-CG 02V0J0000026 6 5 WTOB_CON_4P 12V17ABSM000 2 10PF/50V 2 10PF/50V 2 10PF/50V 2 10PF/50V A_GND R1.0 remove VG70 connector 0719 1 C4131 1 C4109 1 C4112 1 C4143 JP4104 2 @ 1 LDO2_CAP C4120 22PF/50V 1 ACZ_BCLK_AUD SHORTPIN @ 1 1 C4106 0.1UF/16V A_GND C4134 2 2 SHORTPIN @ B VREFOUT_A_E_R A_GND A_GND INT_MIC_AC_IN_L INT_MIC_AC_IN_R JP4102 1 1 C4121 10UF/10V 2 C4107 0.1UF/16V 2 10UF/10V @ 1 2 0Ohm 1 C4116 1 +5VS_AUDIO 2 02V0J0000026 A_GND HP Jack Detect EXT MIC Detect 1V/0.2A R4108 42 42 PC_BEEP_R 2 1 AC_HP_R AC_HP_L VREF_CODEC AUD_LDO_CAP 1 EC_SPKR C4147 1 2 MIC2_VREFO ANALOG GND AUD_EXT_MIC_L AUD_EXT_MIC_R SB_SPKR 30 2.2UF/10V AC_HP_R AC_HP_L 13 14 15 16 17 18 19 20 21 22 23 24 20 ALC3225-CG 36 35 34 33 32 31 30 29 28 27 26 25 2 C4123 10UF/10V CPVDD CBN CPVEE HPOUT-R(PORT-I-R) HPOUT-L(PORT-I-L) MIC1-VREFO-L MIC1-VREFO-R MIC2-VREFO VREF LDO1-CAP AVDD1 AVSS1 2 C4159 22PF/50V 100PF/50V D4101 1 C 2 0.1UF/16V 1 PC_BEEP 1 1 1UF/6.3V 2 2 C4150 1 1 PC_BEEP_C C4114 R4106 4.7KOhm ACZ_RST#_AUD 2 2 47KOhm 1 1 R4103 2 0Ohm 2 PC_BEEP_R @ 1 2 22Ohm ACZ_SDIN0_R ACZ_SYNC_AUD_R 20,42 R4109 1 R4105 ACZ_SDIN0_AUD C4155 1 2 20 C4148 0.1UF/16V DVDD GPIO0/DMIC-DATA GPIO1/DMIC-CLK DVSS SDATA-OUT BCLK LDO3-CAP SDATA-IN DVDD-IO SYNC RESETB PCBEEP +3VS_DVDD DIGITAL GND 1 1 2 1 2 C4126 10UF/10V 1 2 3 4 5 6 7 8 9 10 11 12 SenseA SenseB JDREF MONO-OUT MIC2-L(PORT-F-L) MIC2-R(PORT-F-R) MIC1-L(PORT-B-L) MIC1-R(PORT-B-R) LINE1-R(PORT-C-R) LINE1-L(PORT-C-L) LINE2-R(PORT-E-R) LINE2-L(PORT-E-L) ACZ_SDOUT_AUD_R ACZ_BCLK_AUD EXT MIC Vref. EXT MIC Vref. COMBO MIC Vref. INT MIC Vref. 2 C4118 2.2UF/10V 49 48 47 46 45 44 43 42 41 40 39 38 37 DIGITAL GND +3VS_DVDD 20 GND RSPDIF-OUT/GPIO2 PDB PVDD2 SPK-OUT-R+ SPK-OUT-RSPK-OUT-LSPK-OUT-L+ PVDD1 AVDD2 LDO2-CAP AVSS2 CBP 2 C4111 0.1UF/16V 1 2 C4110 0.1UF/16V @ 1 1 2 C 1 U4101A HeadPhone Out A_GND +3VS_DVDD C4141 10UF/10V C4103 10UF/10V 1 GPIO 2 MUTE_AMP# LDO2_CAP 42 2 2 120Ohm R4111 1 MIC2_VREFO 2.2KOhm 2 C4140 1 2 2.2UF/6.3V COMBO_MIC_IN_AC_E_R C4139 1 2 2.2UF/6.3V COMBO_MIC_IN_AC_E_L 1 COMBO_MIC 2 AUD_EXT_MIC_L AUD_EXT_MIC_R R4112 61 R4124 2 22KOhm 1 R4110 22KOhm 2 C4156 10UF/6.3V A_GND C4137 2 1000PF/50V 1 A_GND 1 1 GPIO 2 1KOhm A_GND C4146 1 2 2.2UF/6.3V C4119 1 2 2.2UF/6.3V C4138 1000PF/50V 1 2 A MIC_IN_AC_E_R 42 MIC_IN_AC_E_L 42 EXT MIC IN A_GND A Title : CODEC-ALC3225 ASUSTeK COMPUTER INC. NB1 Size Project Name Date: 5 4 3 2 Engineer: Wing_Cheng Rev VA70_HW D Friday, January 18, 2013 1 1.0 Sheet 41 of 96 5 4 3 2 1 +5VS 1 +5VA R4202 10KOhm 1 AMP De-Pop Control circuit D 2 R4201 100KOhm 2 3 MUTE_AMP# D MUTE_AMP# 41 D Q4201 1 2 R0402 Q4202A UM6K1N 2 2 R0402 Q4202B UM6K1N 5 SP4201 OP_SD# SP4202 1 ACZ_RST#_AUD 4 20,41 3 1 25 1 2N7002 2 S 6 G C C VREFOUT_A_E_R 41 VREFOUT_A_E_L 2 41 2 GND 41 MIC_IN_AC_E_L 41 MIC_IN_AC_E_R R4210 4.7KOhm 1 1 R4211 4.7KOhm 1 2 R4207 1KOhm 1 2 R4204 1KOhm MIC_IN_AC_E_L_J 61 MIC_IN_AC_E_R_J 61 B B 41 AC_HP_R 41 AC_HP_L R4205 1 2 51Ohm R4206 1 2 51Ohm HP_JACK_R 61 HP_JACK_L 61 A A Title :AUDIO ALC269 BU1-RD Div.1-HW RD Dept.1 Size Project Name B Date: Friday, January 18, 2013 5 4 3 2 Engineer: Wing_Cheng Rev VA70_HW Sheet 1 1.0 42 of 96 5 4 3 2 1 D D 旋旋 度 R1.2 2012/11/30 follow MA50, 180 +3VSUS 9 10 11 12 13 14 15 16 2 靠靠PCH分分分 TPM_CLKRUN# /TPM 2 0Ohm TPM_RST# /TPM 2 0Ohm 1 R4309 1 R4308 PM_CLKRUN# 22 BUF_PLT_RST# 23,30,33,40,47,53,55,70 C C4303 @ 0.1UF/16V 1 C4302 @ 1UF/6.3V 2 C4301 @ 0.1UF/16V GND 1 CON4301 2 1 R4302 INT_SERIRQ_TPM 9 10 11 12 13 14 15 16 1 /TPM 2 0Ohm 8 7 6 5 4 3 2 1 2 1 R4305LPC_FRAME#_TPM 1 R4304 LPC_AD1_TPM 1 R4303 LPC_AD0_TPM 8 7 6 5 4 3 2 1 1 INT_SERIRQ /TPM 2 0Ohm /TPM 2 0Ohm /TPM 2 0Ohm LPCPDN_TPM 21,30,65 1 R4307 LPC_AD3_TPM 1 R4306 LPC_AD2_TPM 2 C /TPM 2 0Ohm /TPM 2 0Ohm R4311 0Ohm /TPM 2 靠靠PCH分分分 21,30,65 LPC_AD3 21,30,65 LPC_AD2 21 LPCCLK 21,30,65 LPC_FRAME# 21,30,65 LPC_AD1 21,30,65 LPC_AD0 R4310 0Ohm @ /TPM 12V162BSM003 BTOB_CON_16P 1 +3V 1 +3VS C4304 @ 1UF/6.3V R4301 4.7KOhm @ GND +3VS B B A A Title : TPM CONN BG1-HW RD Div.2-NB RD Dept.5 Size B 4 3 2 Wing_Cheng Project Name Rev VA70_HW Date: Friday, January 18, 2013 5 Engineer: 1.0 Sheet 1 43 of 96 5 4 3 2 1 D D C C B B Del Entry audio circuit SR-8 0121-11 A A Title : CODEC-ALC269 ASUSTeK COMPUTER INC. NB1 Size Project Name Custom Date: 5 4 3 2 Engineer: Wing_Cheng Rev VA70_HW 1.0 Friday, January 18, 2013 Sheet 1 44 of 96 5 4 3 2 1 D D C C Del Entry audio circuit SR-8 0121-11 B B A A Title : AUDIO ALC269 BU1-RD Div.1-HW RD Dept.1 Size Project Name Custom Date: 5 4 3 2 Engineer: Wing_Cheng Rev VA70_HW Friday, January 18, 2013 Sheet 1 1.0 45 of 96 5 4 3 2 1 Thermal Policy +3VS +3VS D 2 2 D R4709 10KOhm @ Q4703A UM6K1N @ 2 74 R4705 VGA_OVERTEMP# 1 3 Q4703B UM6K1N @ 1 VGA_HOT# 5 4 T4701 6 1 1 R4706 10KOhm 1 /DGPU 2 0Ohm CPU_VGA_THERM# C C 49 1 PR_OVERTEMP# R4702 2 0Ohm @ 49 1 CPU_THERM# R4708 2 0Ohm 92 1 FORCE_OFF# 6 2 UM6K1N Q4702A NPCE795 has internal power-on reset circuit Use 47k ohm to make sure that raising time of POR is less than 10us 1 +3VA_EC R4703 2 R4704 2 1 47KOhm D4702 2 1 1.2V/0.1A D4703 2 1 1.2V/0.1A EC_RST# 30 1 0Ohm 23,30,33,40,43,53,55,70 BUF_PLT_RST# +1.05VS 4,25 2 C4701 4.7UF/6.3V @ B 4 Q4702B UM6K1N 5 3 B +VCCIO_OUT 3 C R4701 2 R4707 2 @ 1 330Ohm 1 B E 2 1 330Ohm Q4701 PMBS3904 H_THRMTRIP# A A +3VA_EC +3VS +3VA_EC +3VS 28,30 Title : RST_Reset Circuit 16,17,20,21,22,23,25,26,27,28,30,33,37,38,39,40,41,43,48,49,53,55,60,63,65,66,91,92 BG1-HW RD Div.2-NB RD Dept.5 Size B 4 3 2 Wing_Cheng Project Name Rev VA70_HW Date: Friday, January 25, 2013 5 Engineer: 1.0 Sheet 1 47 of 96 5 4 3 Touch Pad Button 2 Keyboard 12V18GWSM059 1 C4818 GND +3VS 30 30 D 2 GND 16,17,28,53,55 16,17,28,53,55 SMB_DAT_S SMB_CLK_S +3VS 100KOhm 2 @ @ 1 1 10KOhm R4802 1 2 3 4 5 6 7 8 1 2 SIDE1 3 4 5 6 7 SIDE2 8 CON4802 27 9 TP_CLK TP_DAT SMB_DAT_S SMB_CLK_S @ C4801 1 @ C4802 1 @ C4803 1 @ C4819 1 D ELAN_ALERT# S 2 3 G R2.0 12/14 21 Q4801 2N7002 21000PF/50V 21000PF/50V 21000PF/50V 21000PF/50V GND1 10 GND 2012/11/08 與 吃吃吃吃吃吃吃 R1.2 TP 1 +3VS EXT_SCI#_R R4801 2 CON4801 FPC_CON_8P 10UF/10V TP_CLK TP_DAT TP_CLK TP_DAT 1 GND +3VS D4802 @ 要要SB5接ELAN_ALERT#，還還要JM50接EXT_SCI# TP_CLK 1 I/O1 6 I/O4 2 GND 5 VDD 3 I/O2 4 I/O3 TP_DAT 28 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17 KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 D KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 30 30 30 30 30 30 30 30 FPC_CON_26P 12V18ABSM001 CM1293_04SO C GND2 N/A 1218-00MW000 C @ 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 1 3 5 7 B C4816 C4817 2 CN4801A 33PF/50V4 CN4801B 33PF/50V6 CN4801C @ 33PF/50V 8 CN4801D @ 33PF/50V 2 CN4802A @ 33PF/50V 4 CN4802B @ 33PF/50V 6 CN4802C @ 33PF/50V 8 CN4802D @ 33PF/50V 2 CN4803A @ 33PF/50V4 CN4803B @ 33PF/50V 6 CN4803C @ 33PF/50V 8 CN4803D @ 33PF/50V 2 CN4804A @ 33PF/50V 4 CN4804B @ 33PF/50V 6 CN4804C @ 33PF/50V 8 CN4804D @ 33PF/50V 2 CN4805A @ 33PF/50V 4 CN4805B @ 33PF/50V 6 CN4805C @ 33PF/50V 8 CN4805D @ 33PF/50V 2 CN4806A @ 33PF/50V4 CN4806B @ 33PF/50V6 CN4806C @ 33PF/50V 8 CN4806D @ 33PF/50V 1@ 2 33PF/50V 1@ 2 33PF/50V @ @ KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17 KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 B A A Title : KB/ TP/ FLASH BU1-RD Div.1-HW RD Dept.1 Size Project Name Custom Date: 5 4 3 2 Engineer: Wing_Cheng Rev VA70_HW Friday, January 18, 2013 Sheet 1 1.0 48 of 96 5 4 3 2 1 D D Plam Rest Thermal Sensor +3VS_THEM U5001 Close to CPU R4901 U4902 R4906 1 2 SET GND HYST OT# 1 2 3 THERM_SET R4903 1 1% 2 17.4KOhm Palmrest_THRM_DA CPU_THERM# CPU_THERM# C4902 0.1UF/16V @ 47 G709T1UF 06V220000007 @ 1 R4908 U4903 3 C 1 B 0Ohm Place near PCH 1 2 3 4 1 4 C4904 0.1UF/10V VCC Q4902 PMBS3904 2 1 5 2 150Ohm @ 2 X5R is changed to X7R 1 Pleace in the center of Plamrest. temp setting : 97 degree 1 PHILIP PMBS3904 +3VS 2 +3VS E 2 C4901 2200PF/50V @ VCC SMBCLK DXP SMBDATA DXN ALERT# THERM# GND 8 7 6 5 SMB1_CLK_Thermal SMB1_DAT_Thermal 1 R4909 @ 2 0Ohm 2 0Ohm SMB1_CLK 28,30,74 SMB1_DAT 28,30,74 G781 @ @ Plamrest_THRM_DC C PR_OVERTEMP# C 47 U4903 under palmrest SMBUS addr=1001100x (98) U4903: Remote(Local) thermal sensor,use remote mode. R1.2-10 R4907 1@ C4907 22PF/50V @ D4901 SS0520 FAN0_TACH 2 2 1 2 1 0Ohm 1 FAN 2 30 C4908 100PF/50V @ +5VS B B 4 U4901 12V17GISM046 C4905 2.2UF/10V 1 W TOB_CON_3P 2 5 HOLD2 30 2 +5VS_FAN 1 CON4901 HOLD1 1 2 3 C4906 2.2UF/10V CTL_FAN 1 2 3 4 FON# VIN VO VSET GND4 GND3 GND2 GND1 8 7 6 5 G991P11U 06V520000001 A A Title : THERMAL/ FAN BU1-RD Div.1-HW RD Dept.1 Size Project Name Custom Date: 5 4 3 2 Engineer: Wing_Cheng Rev VA70_HW Friday, January 18, 2013 Sheet 1 1.0 49 of 96 5 4 3 2 1 D D C C B B A A Title : Realtek_RTS5138 Engineer: BG1-HW RD Div.2-NB RD Dept.5 Size C Date: 5 4 3 2 Wing_Cheng Project Name Rev VA70_HW Friday, January 18, 2013 1.0 Sheet 1 50 of 96 5 4 3 2 1 D D C C B B A A Title : USB3.0 uPD720200 Engineer: BG1\HW1 Size C Date: 5 4 3 2 Wing_Cheng Project Name Rev VA70_HW Friday, January 18, 2013 1.0 Sheet 1 51 of 96 5 4 3 2 1 D D C C B B A A Title : PCIE NEW CARD BU1-RD Div.1-HW RD Dept.1 Size Project Name Custom Date: 5 4 3 2 Engineer: Wing_Cheng Rev VA70_HW Friday, January 18, 2013 Sheet 1 1.0 52 of 96 5 4 3 2 1 PCIE/mSATA Select PCIE or mSATA 24 24 PCIE_RXN6_mSATA PCIE_RXP6_mSATA 24 24 PCIE_TXN6_mSATA PCIE_TXP6_mSATA D R5320 1 R5321 1 @ @ 2 0Ohm 2 0Ohm R5318 1 R5319 1 @ @ 2 0Ohm 2 0Ohm IF select mSATA(only +3VAUX) PCIE_mSATA_C23 PCIE_mSATA_C25 PCIE_mSATA_C31 PCIE_mSATA_C33 C5314 C5315 1 1 2 0.01UF/50V 2 0.01UF/50V C5316 C5317 1 1 2 0.01UF/50V 2 0.01UF/50V SATA_RXP4 SATA_RXN4 20 20 D SATA_TXN4 20 SATA_TXP4 20 2 +3.3VS_mSATA +3.3VS_mSATA H5301 H5302 +1.5VS_mSATA HT-G4041M20TFE 1 1 R5315 10KOhm @ HT-G4041M20TFE S 2 PCIE_W AKE# D 22,33 3 G Q5310 2N7002 @ PCIE_W AKE#_mSATA CON5301 PCIE_W AKE#_mSATA 21 CLK_REQ2_PCIE_mSATA# 21 21 C CLK_PCIE_mSATA#_PCH CLK_PCIE_mSATA_PCH 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 Follow SanDisk SSD U100 spec. PCIE_mSATA_C23 23 TXP PCIE_mSATA_C25 25 TXN 31 RXN PCIE_mSATA_C31 PCIE_mSATA_C33 33 RXP +3.3VS_mSATA WAKE# Reserved1 Reserved2 CLKREQ# GND1 REFCLKREFCLK+ GND2 3.3V_1 GND7 1.5V_1 UIM_PWR UIM_DATA UIM_CLK UIM_RESET UIM_VPP Reserved/UIM_C8 GND8 Reserved/UIM_C4W_DISABLE# GND3 PERST# PERn0 +3.3Vaux PERp0 GND9 GND4 1.5V_2 GND5 SMB_CLK PETn0 SMB_DATA PETp0 GND10 GND6 USB_DReserved3 USB_D+ Reserved4 GND11 Reserved5 LED_WWAN# Reserved6 LED_WLAN# Reserved7 LED_WPAN# Reserved8 1.5V_3 Reserved9 GND12 Reserved10 3.3V_2 2 4 6 8 10 12 14 16 C 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 MINICARD_RST#_mSATA R5305 2 R5306 2 W LAN_ON 25,55 BUF_PLT_RST# 23,30,33,40,43,47,55,70 W LAN_RST#_PCH 25,55 1 0Ohm 1 0Ohm @ SMBC_mSATA SMBD_mSATA R5316 1 R5317 1 2 0Ohm 2 0Ohm @ @ SMB_CLK_S SMB_DAT_S 16,17,28,48,55 16,17,28,48,55 USBP11USBP11+ 3 USBP11- RN5301B 4 0Ohm NP_NC2 NP_NC1 B 2 MINI_PCI_LATCH_52P 12V44GISM005 4 56 55 1 USBP11+ L5301 90Ohm/100MHz 09V090000002 1 GND13 GND14 3 @ 53 54 USB_PN11 USB_PP11 24 24 @ B RN5301A 2 0Ohm +3.3VS_mSATA @ R5308 0.01UF/50V @ 1 C5305 2 1 C5304 0.1UF/16V 2 1 C5303 0.1UF/16V 2 2 C5302 10UF/10V 1AV500000008 1 1 C5301 2 0Ohm 10V440000001 +3VS R5313 1 +3.3VS_mSATA 0.01UF/50V 2 0Ohm 10V440000001 @ +1.5VS +1.5VS_mSATA 1 1 C5308 0.1UF/16V @ C5309 0.1UF/16V @ 2 2 C5307 10UF/10V 1AV500000008 @ 2 1 +1.5VS_mSATA C5310 0.01UF/50V @ A A Title : WiFi/WiMAX BU1-RD Div.1-HW RD Dept.1 Size Project Name Custom Date: 5 4 3 2 Engineer: Friday, January 18, 2013 Rev VA70_HW 1.0 Sheet 1 53 of 96 5 4 3 2 1 D D C C B B A A Title : MINICARD (WUSB /UPCONVERT) BU1-RD Div.1-HW RD Dept.1 Size Project Name Custom Date: 5 4 3 2 Engineer: Wing_Cheng Rev VA70_HW Friday, January 18, 2013 Sheet 1 1.0 54 of 96 5 4 3 1 訊訊訊訊 R1.2 2012/12/13 wake+3VS_WLAN MOS 1215 2 G +3VS_WLAN S 2 3 D WLAN_WAKE# PCIE_WAKE#_WLAN @ 09V090000002 90Ohm/100MHz L5501 R5524 1 R1.2 2012/12/05 option changed from N/A @ USBP5+ 3 RN5501B 0Ohm WiFi/WiMAX 2 0Ohm 4 2N7002 Q5511 3 +1.5VS_WLAN D 2 USBP51 1 1 RN5501A 0Ohm /IOAC 30 2 USB_PN5 USB_PP5 24 24 D 4 CON5501 BT_ON/OFF#_R 21 CLK_REQ3_WLAN# 21 21 R5509 2 0Ohm @ 1 BT_DISABLE_M5 CLK_PCIE_WLAN#_PCH CLK_PCIE_WLAN_PCH R1.1 For IOAC, 10/31 +3VS_WLAN 24 24 PCIE_RXN2_WLAN PCIE_RXP2_WLAN 24 24 PCIE_TXN2_WLAN PCIE_TXP2_WLAN 2 +3VS_WLAN BT_ON_PCH R5530 @ 30 BT_ON_EC R5531 R5518 10KOhm 0Ohm D5501 2 0Ohm 1 BT_ON/OFF#_R 1 25 SP5501 2 1 R0402 BT_DISABLE_M51 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 WAKE# Reserved1 Reserved2 CLKREQ# GND1 REFCLKREFCLK+ GND2 3.3V_1 GND7 1.5V_1 UIM_PWR UIM_DATA UIM_CLK UIM_RESET UIM_VPP Reserved/UIM_C8 GND8 Reserved/UIM_C4 W_DISABLE# GND3 PERST# PERn0 +3.3Vaux PERp0 GND9 GND4 1.5V_2 GND5 SMB_CLK PETn0 SMB_DATA PETp0 GND10 GND6 USB_DReserved3 USB_D+ Reserved4 GND11 Reserved5 LED_WWAN# Reserved6 LED_WLAN# Reserved7 LED_WPAN# Reserved8 1.5V_3 Reserved9 GND12 Reserved10 3.3V_2 2 4 6 8 10 12 14 16 1215 R5522 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 0Ohm RF_ON 30 @ WLAN_ON_C MINICARD_RST# R5505 2 @ R5506 2 @ R5507 2 R5516 1 R5517 1 SMBC SMBD R5523 1 0Ohm 1 0Ohm 1 0Ohm 2 0Ohm 2 0Ohm @ @ 0Ohm WLAN_ON 25,53 BUF_PLT_RST# 23,30,33,40,43,47,53,70 WLAN_RST#_PCH 25,53 WLAN_RST#_EC 30 SMB_CLK_S SMB_DAT_S 16,17,28,48,53 16,17,28,48,53 USBP5USBP5+ LED_WLAN# 66 +3VS_WLAN RB751V-40 53 54 C 2 0Ohm @ 56 55 C @ 2N7002 Q5502 RF_DET# D RF_DET#_R 3 2 S MINI_PCI_LATCH_52P 12V44GBSD000 G 1 NP_NC2 NP_NC1 1 R5514 GND13 GND14 1 R5501 30 2 0Ohm 2012/11/06 工工工工工工 C5505 1 1 T5502 1 +3VS_WLAN +3VO +1.5VS C5506 R5534 0.01UF/50V @ 2 C5504 0.1UF/16V 2 1 C5503 0.1UF/16V 2 1 2 C5502 10UF/10V 1AV500000008 T5501 1 R1.2 +3VS_WLAN 1 +3VS R5513 /IOAC @ R5508 1 2 0Ohm 1 R5528 1 2 0Ohm /non_IOAC 2 0Ohm 1 +12VSUS SI2304BDS-T1-GE3 Q5501 2 +3VO R5525 180KOHM @ R5535 560KOhm vx_r0402_small 5% R1.2 2012/12/05 Add 5535 change R5525 and R5532 options B 2 0.01UF/50V @ 1 /IOAC C5513 1 1 1 C5512 0.1UF/16V @ 2 2 C5511 0.1UF/16V @ 2 1 +AC_BAT_SYS C5510 10UF/10V 1AV500000008 @ G 3 D 2 S /non_IOAC +1.5VS_WLAN B +1.5VS_WLAN 2 0Ohm 0.01UF/50V 2 1 UM6K1N Q5513B 5 1 R5533 IOAC_EN 0Ohm 2 1 R5527 0Ohm 2 UM6K1N Q5513A 2 C5501 1UF/25V /IOAC 4 2 /IOAC 1 AOAC_ON 0Ohm 6 25 3 1 /IOAC @ 30,81 R5532 1MOhm @ 1 R5526 100KOhm R1.2 2012/10/29 option changed from /AOAC 2 2 /IOAC RF_ON /IOAC @ /IOAC 1 R5529 A A Title : WiFi/WiMAX Engineer: BU1-RD Div.1-HW RD Dept.1 Size Project Name 5 4 3 2 Rev VA70_HW C Date: Friday, January 18, 2013 Sheet 1 1.0 55 of 96 5 4 3 2 1 D D C C B B A A Title :TP_M BG1-HW RD Div.2-NB RD Dept.5 Size Project Name B Date: Friday, January 18, 2013 5 4 3 2 Engineer: Wing_Cheng Rev VA70_HW Sheet 1 1.0 56 of 96 5 4 Screw G x 2 Fix Hole H x 1 3 2 1 Fix Hole I x 1 PWR_H1 1 PWR_H3 1 C276D110 PWR_H4 1 OT39DO142X118N CT197D118N PWR_H2 1 C276D110 D D PWR_GND +5VSUS_PWR PWR_C01 47PF/50V 1 @ 2 1 POWER Button LED PWR_GND 2 2 + PWR_LED01 BLUE 07V130000054 1 PWR_R02 300Ohm PWRLED_ON#_PWR C C R1.1 reverse PWR_CON01 and change pin 1~4 pin define 1024 +3VA_PWR PWR_CON01 10 10 9 9 8 8 7 7 6 6 5 5 4 4 3 3 2 2 1 1 +5VSUS_PWR LID_SW#_PWR LID Switch +3VA_PWR PWRLED_ON#_PWR PWR_SW#_PWR PWR_C02 1 PWR_R05 100KOhm 1 Vdd 3 GND 1 LID_SW#_PWR GND1 OUTPUT PWR_U01 5 R1.2 2012/11/28 cost down 1 PWR_GND PWR_D4 PWR_D5 PWR_GND PWR_GND @ 2 AZ5123-01H 07V180000006 @ 2 2 PWR_C04 1000PF/50V 1AV200000003 AZ5123-01H 07V180000006 @ 1 1 @ 2 PWR_GND 3 B 2 1 2 AH180-WG-7 2 B SWITCH_4P GND2 4 2 0.1UF/16V 1 PWR_SW01 6 HOTBAR_10P PWR_C03 1000PF/50V 1AV200000003 PWR_GND PWR_GND PWR_GND A A Title : PWR BTN BU1-RD Div.1-HW RD Dept.1 Size Project Name Custom Date: 5 4 3 2 Engineer: Wing_Cheng Friday, January 18, 2013 Rev VA70_HW Sheet 1 1.0 57 of 96 5 4 3 2 1 +5VUSB0_IO USB 2.0 +5V_USB_DB_C D 2 0.01UF/16V 1 1 2 IOC13 IOC14 + IOCE1 100UF/6.3V 1BV080000001 D_GND_IO 1 6 IO_USB_PN9 MIC_IN_AC_E_R_IO MIC_IN_AC_E_L_IO MIC_EXT_JD#_IO AC_HP_L_IO AC_HP_R_IO HP_JD#_IO COMBO_MIC_IO D_GND_IO 5 6 7 8 1 P_GND1 2 P_GND2 3 P_GND3 4 P_GND4 IOCON4 12V13GBSD021 USB_CON_1x4P +5VUSB0_IO IO_USB_PN9 IO_USB_PP9 5 3 4 1 2 3 4 IO_USB_PP9 D_GND_IO D_GND_IO Moat D_GND_IO A_GND_IO R1.2 2012/11/08 cost dwon 0ohm R1.2 2012/12/04 change short pin size D_GND_IO Headphone & MIC combo Jack IOCON6 COMBO_MIC_IO 7 1 1 NB_R0402_20MIL_SMALL 2 AU_HP_LL_JACK AC_HP_R_IO IOSP2 1 2NB_R0402_20MIL_SMALL AU_HP_RR_JACK HP_JD#_IO IOSP3 1 2NB_R0402_20MIL_SMALL 2 6 3 4 5 C 1 IOC6 2 100PF/50V A_GND_IO C IOC7 P_GND1 P_GND2 8 9 NP_NC1 NP_NC2 10 11 100PF/50V PHONE_JACK_9P 12V14GBSD006 A_GND_IO A_GND_IO A_GND_IO R1.2 2012/12/05 options are chaned from Entry @ 2 AZ2025-02S 1 2 AZ2025-01H.R7G 2 @ 2 1 AZ2025-02S 1 @ C354D118 100PF/50V A_GND_IO IO_H2 1 1 1 2 MIC_IN_AC_E_L_JACK MIC_IN_AC_E_R_JACK HP_JD#_Jack MIC_EXT_JD#_IO COMBO_MIC_IO C354D118 AU_HP_RR_JACK OB291X283DO118X130N AU_HP_LL_JACK IO_H3 1 IO_H1 1 HP_JD#_Jack IOC9 2 IOSP1 AC_HP_L_IO Fix Hole F x 1 5 6 7 8 1 P_GND1 2 P_GND2 3 P_GND3 4 P_GND4 IOCON3 CM1293_04SO A_GND_IO Screw L x 2 D D_GND_IO IO_USB_PN2 D_GND_IO A_GND_IO D_GND_IO IO_USB_PN2 IO_USB_PP2 IO_USB_PN9 IO_USB_PP9 1 2 3 4 +5VUSB0_IO 2 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 +5VUSB0_IO IO_USB_PN2 IO_USB_PP2 IOC11 HOTBAR_20P 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 IOCON5 12V13GBSD021 USB_CON_1x4P IOC18 33PF/50V D_GND_IO 1 +5V_USB_DB_C 2 0.1UF/16V IOD4 @ IO_USB_PP2 0.01UF/16V IOC17 2 1 R1.2 2012/11/20 IOCE1 IOL1 layout layout MB P.61 R1.2 2012/11/20 layout R1.3 2013/1/21 IOL1 is changed to 0ohm 1 0Ohm 2 1 暫暫暫暫 給 暫暫暫暫暫暫 評評評評暫評 作作 評評評評暫評 IOC12 2 2 0.01UF/16V 1 1 IOL1 2 0.01UF/16V AZ2025-02S IOD5 IOD3 3 IOD2 1 IOD1 3 D_GND_IO 3 @ Fix Hole E x 1 A_GND_IO A_GND_IO A_GND_IO A_GND_IO IO_H4 1 2 B 2 1 COMBO_MIC_IO IOC10 10PF/50V @ @ IOC2 33PF/50V B A_GND_IO 1 CB276D118N MIC JACK IOCON2 R1.2 2012/11/08 cost dwon 0ohm MIC_IN_AC_E_L_IO IOSP4 1 2 R0603 MIC_IN_AC_E_L_JACK MIC_IN_AC_E_R_IO IOSP5 1 2 R0603 MIC_IN_AC_E_R_JACK 8 7 1 2 6 3 4 5 1 IOC16 100PF/50V 2 100PF/50V 1 IOC8 2 2 1 MIC_EXT_JD#_IO 9 10 IOC15 8 7 1 2 6 3 4 5 NP_NC1 NP_NC2 100PF/50V PHONE_JACK_8P A A A_GND_IO A_GND_IO A_GND_IO A_GND_IO R1.1 Add 2nd MIC schematic 0804 Title : IO Engineer: Wing_Cheng BG1-NB1-HW-NB5 Size C Date: 5 4 3 2 Project Name Rev VA70_HW Monday, January 21, 2013 Sheet 1 1.0 58 of 96 5 4 3 HDD 1 2 1 HDD 2 9.5mm 12.5mm CON6001 20 20 D SATA_TXP0 SATA_TXN0 20 20 SATA_RXN0 SATA_RXP0 C6001 C6002 2 2 1 0.01UF/50V 1 0.01UF/50V SATA_TXP0_C SATA_TXN0_C C6003 C6004 2 2 1 0.01UF/50V 1 0.01UF/50V SATA_RXN0_C SATA_RXP0_C 1 2 3 4 5 6 7 1 2 3 4 5 6 7 NP_NC3 NP_NC1 25 CON6002 23 20 20 SATA_TXP5 SATA_TXN5 20 20 SATA_RXN5 SATA_RXP5 C6006 C6008 2 2 1 0.01UF/50V 1 0.01UF/50V SATA_TXP5_C SATA_TXN5_C C6005 C6007 2 2 1 0.01UF/50V 1 0.01UF/50V SATA_RXN5_C SATA_RXP5_C S1 S2 S3 S4 S5 S6 S7 S1 S2 S3 S4 S5 S6 S7 NP_NC3 NP_NC1 3 1 D +3VS +3VS 1 C6020 @ 10UF/6.3V 1 C6019 +5VS_HDD2 2 1 1 SHORT_PIN +5VS_HDD2 NP_NC2 NP_NC4 T6002 1 24 26 SATA_CON_22P 12V241BRD010 0.1UF/25V P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 SP6002 1 2 2 1 2 1 2 C6021 @ 10UF/6.3V T6001 +5VS C6024 @ 10UF/6.3V C6023 @ 10UF/6.3V 1 SHORT_PIN +5VS_HDD1 C6025 @ 0.1UF/25V 2 2 2 SP6001 1 1 +5VS_HDD1 +3VS C6026 @ 10UF/6.3V 2 +5VS 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 2 C6017 @ 0.1UF/25V 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 1 1 C6018 @ 10UF/6.3V 2 2 1 +3VS C6022 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 NP_NC2 P14 P15 NP_NC4 2 4 SATA_CON_22P 12V24GBRD019 0.1UF/25V C C ZERO POWER ODD SUPPORT ODD R6003 support Hokey turn off ODD power 1 2 0Ohm +5VS +5VS_ODD SI2304BDS-T1-GE3 Q6002 /Zero_ODD 1 G 3 D 2 S /non_Zero_ODD +12VSUS CON6003 1 1 2 C6013 2 C6014 SATA_RXN2 SATA_RXP2 NP_NC3 SATA_CON_13P 12V24GBRD020 SATA_ODD_PRSNT# R6006 100KOhm /Zero_ODD 1 R6007 10KOhm 25 /Zero_ODD C6015 0.01UF/50V @ 0Ohm 1 C6016 10UF/10V + CE5101 100UF/6.3V 1BV170000001 25 0Ohm 1 SATA_ODD_PW RGT SATA_ODD_DA# 2 UM6K1N Q6001A /Zero_ODD /Zero_ODD UM6K1N Q6001B /Zero_ODD /Zero_ODD R6011 10KOhm /Zero_ODD C6010 1UF/25V /Zero_ODD /Zero_ODD @ 2 R6002 /Zero_ODD 2 R6009 5 4 2 R6005 6 1 0Ohm 1 1 3 NP_NC1 P1 P2 P3 P4 P5 P6 1 1 P1 P2 P3 P4 P5 P6 2 R6001 /Zero_ODD +5VS_ODD 2 0Ohm 1 B R6004 100KOhm 20 20 1 0.01UF/50V 0.01UF/50V 2 SATA_ODD_RXN2 SATA_ODD_RXP2 +5VSUS +3VS 2 SATA_TXP2 20 SATA_TXN2 20 1 2 C6011 2 C6012 3 1 1 2 0.01UF/50V 0.01UF/50V 1 SATA_ODD_TXP2 SATA_ODD_TXN2 2 NP_NC2 S1 S2 S3 S4 S5 S6 S7 1 2 S1 S2 S3 S4 S5 S6 S7 2 B NP_NC4 2 4 3 23 D 1 G Q6003 2N7002 /Zero_ODD 2 S A A Title : SATA HDD/ ODD BU1-RD Div.1-HW RD Dept.1 Size Project Name Custom Date: 5 4 3 2 Engineer: Wing_Cheng Friday, January 18, 2013 Rev VA70_HW Sheet 1 1.0 60 of 96 A B MB USB C E 1 +5VO 3 +5VO U6101 1 2 3 4 GND 4 GND Y Vcc=2~5.5 /USBSLP 2 GND 1 D 2 B USBCEN 2N7002 Q6105 /USBSLP R1.3 2013/1/21 L6110 is changed to 0ohm +5V_USB1 C6107 0.1UF/16V /USBSLP GND OUT1 IN1 OUT2 IN2 OUT/NC EN#/EN OC# 8 7 6 5 L6110 C6110 1UF/6.3V 1 2 0Ohm USB 3.0 D6102 1 USB_CHG_OC# 3 G547E1P81U 06V290000008 Active High 2.5A USB_OC0# 2 USB30_OC# 24 CON6101 1V/0.1A /USBSLP 5 4 6 3 7 2 8 1 9 SSRN GND +5V_USB1 1 R1.2 2012/11/20 Changed from 560UF/2.5V SSRP DPP0_CON_P GND DPN0_CON_N SSTN 1 SSTP + 1 2 SSRXPGND SSRX+ D+ GND DSSTXVBUS SSTX+ USB_CON_9P 12V13GURD006 2 CE6104 220UF/6.3V 1BV090000003 10 12 5 VCC P_GND1 P_GND3 2 3 2 S /USBSLP 1 P_GND2 P_GND4 G USBP0_EN 2 1 U6107 1 A 11 13 1 R6125 100KOhm 30 D +5VO C6101 0.1UF/25V 1AV200000041 GND U6102 SSTN SSTP 1 1 Sleep & Charge 4 RN6113B /USBSLP 3 0Ohm 10 9 SSRN SSRP 7 6 SSTN SSTP 2 U6105 1 30 DPP0_CON_P 90Ohm/100Mhz DPN0_CON_N L6114 @ +5VO 10KOhm /USBSLP SLG55584AVTR 06V150000009 /USBSLP 3 SCLCDP_EC USB_P0+ USB_N0USBCEN 2 R6115 4 /USBSLP 4 3 2 1 SELCDP DP DM CEN 2 2 VDD TDP TDM CB GND 1 5 6 7 8 9 24 USB_PP0 24 USB_PN0 30 CHGCB0 LINE_1 NC4 LINE_2 NC3 GND(Pin8) LINE_3 NC2 LINE_4 NC1 AZ1045_04F @ 2 +5VO R6116 100KOhm C6116 0.1UF/25V /USBSLP 1 2 3 4 5 SSRN SSRP +3VSUS 1 0Ohm RN6113A /USBSLP RN6103B 4 0.1UF/25V C6102 2 1 C6104 2 1 0Ohm USB3_TX1_C_N SSTN @ 3 USB3_TX1_N 4 24 3 2 24 USB3_TX1_P 1 L6101 @ 90Ohm/100MHz USB3_TX1_C_P 2 2 GND 2 C6119 10PF/50V 2 1 0.1UF/25V SSTP 1 0Ohm @ 1 RN6103A 2 no sleep & charge GND C6120 10PF/50V RN6111B 4 3 0Ohm SSRN @ D6101 3 USB3_RX1_N 4 24 DPP0_CON_P +5V_USB1 1 6 USB3_RX1_P SSRP 1 0Ohm 2 5 3 4 1 RN6111A @ @ GND GND 1 C6111 C6122 10PF/50V 2 2 1 2 C6121 10PF/50V R6120 +5V_USB1 2 1 L6102 @ 90Ohm/100MHz 24 +5V_USB2 DPN0_CON_N USB_PP1_R 1 @ 2 0Ohm 10V540000001 2 0.1UF/16V @ USB_PN1_R CM1293_04SO 07V000000006 R1.3 2013/1/21 L6111 is changed to 0ohm PLACE ESD Diodes 0700-0014000 near Connector +5V_USB2 +5VSUS U6104 1 L6111 2 0Ohm /USBSLP USB 3.0 USB30_OC# 1UF/6.3V /USBSLP CON6105 5 4 6 3 7 2 8 1 9 SSRN1 GND +5V_USB2 R1.2 2012/11/20 Changed from 100UF/6.3V R1.2 2012/11/23 changed from 220UF/6.3V GND SSRP1 USB_PP1_R USB_PN1_R SSTN1 3 2 USB_CON_9P 12V13GURD006 2 1 USB_PN1_R L6109 @ 90Ohm/100MHz 1 2 CE6103 100UF/6.3V 3 USB_PP1 4 USB_PN1 24 2 0Ohm + 24 SSRXPGND SSRX+ D+ GND DSSTXVBUS SSTX+ 3 1 SSTP1 RN6120A 1 10 12 8 7 6 5 P_GND1 P_GND3 GND OUT1 IN1 OUT2 IN2 OUT/NC EN#/EN OC# G547E1P81U 06V290000008 /USBSLP Active High 2.5A P_GND2 P_GND4 1 2 3 4 USBP1_EN C6108 0.1UF/25V 11 13 2 1 30 C6109 USB_PP1_R GND RN6120B 3 0Ohm 4 U6106 1 2 3 4 5 SSRN1 SSRP1 C6115 2 1 USB3_TX_C_N @ 1 USB3_TX_C_P 2 1 2 7 6 SSTN1 SSTP1 GND SSTP1 1 0Ohm SSRN1 SSRP1 C6123 10PF/50V 2 2 1 C6112 USB3_TX2_P 10 9 AZ1045_04F @ SSTN1 L6104 @ 90Ohm/100MHz 0.1UF/25V 24 SSTN1 SSTP1 RN6123B 3 0Ohm 4 USB3_TX2_N 3 4 0.1UF/25V 24 LINE_1 NC4 LINE_2 NC3 GND(Pin8) LINE_3 NC2 LINE_4 NC1 @ RN6123A 1 2 GND C6124 10PF/50V USB3_RX2_N 24 USB3_RX2_P 4 24 RN6126B 3 0Ohm SSRN1 3 4 0Ohm 1 2 C6128 10PF/50V @ SSRP1 1 RN6126A C6127 10PF/50V 2 1 2 1 L6108 @ 90Ohm/100MHz 2 @ 4 4 GND GND IO Board AUDIO BOARD/w USB2.0 x2 R1.2 2012/11/20 Add 560UF/2.5V for layout to estimate R1.2 2012/11/23 changed from 560/2.5V R1.2 2012/11/27 L6115, CE6105 are removed USB Power Switch for USB DB Main +5VSUS +5V_USB_DB U6103 1 30 USBP2_EN 1 2 3 4 N/A 8 7 6 5 GND OUT1 IN1 OUT2 IN2 OUT/NC EN#/EN OC# USB_OC1# 24 G547E1P81U 06V290000008 C6106 +5V_USB_DB 2 CON6104 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 1UF/6.3V Active High 2.5A USB_PN2_C USB_PP2_C 1 2 0Ohm RN6107A USB_PN2_C USB_PN9_C USB_PP9_C 3 USB_PN2 4 24 24 USB_PP2 3 A_GND 2 1 L6107 @ 90Ohm/100Mhz 0Ohm 4 RN6107B USB_PP2_C 5 42 42 MIC_IN_AC_E_R_J MIC_IN_AC_E_L_J 41 MIC_EXT_JD# 42 HP_JACK_L 42 HP_JACK_R 41 HP_JD# 41 COMBO_MIC BIOS debug port 1 2 RN6106A 21 5 A_GND USB_PN9_C 3 0Ohm 4 USB_PN9 22 FPC_CON_20P 12V18AWSM019 A_GND 24 20 19 SIDE2 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 SIDE1 1 24 USB_PP9 3 2 1 L6106 @ 90Ohm/100Mhz 0Ohm 4 RN6106B USB_PP9_C Title : USB PORTS/ eSATA Engineer: Wing_Cheng BU1-RD Div.1-HW RD Dept.1 Size Project Name Custom Date: A B C D Rev VA70_HW Sheet Monday, January 21, 2013 E 1.0 61 of 96 5 4 3 2 1 D D C C B B A A Title : Camera/ BT/ FL CONN BU1-RD Div.1-HW RD Dept.1 Size Project Name Custom Date: 5 4 3 2 Engineer: Wing_Cheng Friday, January 18, 2013 Rev VA70_HW 1.0 Sheet 62 1 of 96 5 4 3 2 R1.3 2013/1/4 L6304 is changed to Irat=8A CON6302 12V17AISD002 C6310 0.1UF/25V 1AV300000007 @ T6303 PI TS1#_C SMB0_CLK_C SMB0_DAT_C @ 11kOhm/100Mhz 11kOhm/100Mhz 11kOhm/100Mhz Irat=300mA Irat=300mA Irat=300mA TS1# 90 SMB0_CLK SMB0_DAT D 30,88 30,88 C6304 100PF/50V 1 1 @ C6303 100PF/50V L6301 2 L6303 2 L6302 2 @ D6301 1 TS1#_C 2 2 C6308 1UF/25V 1AV300000031 1 1 1 BAT_CON_F CON6301 12V20GBSD008 D_A/D_DOCK_IN C6307 0.1UF/25V 1AV300000024 1 2 3 4 5 6 7 8 2 10 P_GND1 1 2 3 4 5 6 7 8 P_GND2 C6302 100PF/50V 9 T6311 WTOB_4P 4 3 2 1 T6302 BATT_CON_8P 1 T6310 T6323 C6301 0.1UF/25V 1AV300000024 T6309 T6322 T6301 C6306 0.1UF/25V 1AV300000024 D T6308 T6321 1 L6304 2 80Ohm/100Mhz C6309 09V010000051 1000PF/50V 1AV200000018 Irat=8A 1 1 1 1 T6312 1 D_A/D_DOCK_IN 1 +BAT_CON T6320 C6305 0.1UF/25V 1AV300000024 2012/11/21 +A/D_DOCK_IN 1 1 A/D_DOCK_IN_F T6307 1 1 T6306 R1.2 Battery ConnectorF6301 is removed R1.2 2012/11/21 F6301 is removed 1 T6305 1 T6304 1 T6313 1 DC IN 1 5 SMB0_CLK_C 4 SMB0_DAT_C GND 2 1220-00FD000 PI 3 2 T6316 1 BAT_CON_F SR-5 0120-11 @ 1 2 +12VS_DISCHRG Q6305A UM6K1N 2 @ 1 @ C R6327 330Ohm @ 6 +5VS_DISCHRG Q6304B UM6K1N 5 4 @ R6313 330Ohm @ 3 6 +VTT_CPU_DISCHRG Q6304A UM6K1N 2 4 @ 1 3 +VTT_PCH_DISCHRG R6308 330Ohm @ +12VS 2 2 R6307 330Ohm @ +5VS 1 1 1 2 2 2 @ Q6303B UM6K1N 5 @ 1 Q6303A UM6K1N 2 4 1 6 Q6302B UM6K1N 5 R6314 330Ohm @ +VCC_CORE_DISCHRG +1.5VS_DISCHRG 3 6 3 +3VS_DISCHRG Q6302A UM6K1N 2 4 2 SUSB_EC# 2 1 +0.675VS_DISCHRG Q6301B UM6K1N 5 R6305 330Ohm @ +VCCIO_OUT @ 1 22,23,30,91,92 R6304 330Ohm 2 R6303 330Ohm +1.05VS 1 1 +3VA +VCORE +1.5VS 6 +3VS 1 +0.675VS 1 C Q6301A UM6K1N 2 GND Frank 0505 Follow EVEREST Discharge Circuit R6301 100KOhm DF5A6.8FU @ R6315 1KOhm 1 T6315 1 T6318 1 T6317 1 T6314 1 T6319 1 +A/D_DOCK_IN @ +1.35V +3V 1 1 1 +5VSUS 30,81,91,93 VSUS_ON 1 @ 6 Q6311A UM6K1N 2 @ 3 +5VSUS_DISCHRG Q6311B UM6K1N 5 2 @ @ @ 2 1 3 4 3 R6324 100KOhm @ 1 6 Q6306A @ UM6K1N 2 B Q6305B UM6K1N 5 4 2 Q6306B UM6K1N 5 4 2 1 @ R6302 100KOhm SUSC_EC# +1.35V_DISCHRG @ +3V_DISCHRG R6325 330Ohm @ +3VA 2 R6311 330Ohm +3VA 30,91 R6328 330Ohm B R1.1 Mount SUSC_EC# discharge schematic for power timing 0808 VGA Discharge Circuit R1.2 2012/12/10 changed to +1.35VS_VGA R1.2 2013/01/02 changed to 124ohm from 330ohm +VGA_VCORE +1.35VS_VGA DGPU_PWR_EN 1 2 100KOhm VGA_DISCHRG_CTL /DGPU 5 4 23 A Q6308B UM6K1N /DGPU 1 2 2 Q6310B UM6K1N /DGPU 2 1 5 6 +1.05VS_VGA_DISCHRG 3 Q6309A UM6K1N 2 4 Q6309B UM6K1N /DGPU R6321 10Ohm /DGPU 10V320000071 /DGPU +1.35VS_VGA_DISCHRG 6 +3VS_VGA_DISCHRG 5 1 Q6308A UM6K1N /DGPU 4 1 3 R6316 2 R6320 124Ohm 3 6 +VGA_VCORE_DISCHRG 2 VGA_DISCHRG_EN R6319 330Ohm /DGPU 10V320000071 /DGPU 2 2 1 R6318 124Ohm R6317 100KOhm /DGPU +1.05VS_VGA 1 +3VS_VGA 1 R1.2 2013/01/13 changed to 124ohm from +3VA 330ohm 1 R1.2 2013/01/02 changed to 124ohm from 330ohm Q6310A UM6K1N /DGPU /DGPU A Unmount +VGA_Vcore discharg Title : DC-IN/ DISCHARGE BU1-RD Div.1-HW RD Dept.1 Size Custom Date: 5 4 3 2 Engineer: Wing_Cheng Project Name Rev VA70_HW Friday, January 18, 2013 Sheet 1 1.0 63 of 96 5 4 3 2 1 D D C C B B A A Title :DC-IN/ DISCHARGE BU1-RD Div.1-HW RD Dept.1 Size 5 4 3 2 1 Engineer:Wing_Cheng Project Name Rev VA70_HW E Date: Friday, January 18, 2013 Sheet 1.0 64 of 96 5 4 3 2 1 PWR BRD/ AMBIENT/ HALL CONN. +5VSUS +3VA 12V18AWSM001 FPC_CON_10P 12 10 9 8 7 6 5 4 3 2 1 11 D T6501 30,66 PWR_BLUE_LED# 2 2 10PF/50V C6512 0.1UF/25V C6505 1 10PF/50V C6508 1 1 3 D CON6504 2 @ 0.1UF/16V C6504 2 D6501 SIDE2 10 9 8 7 6 5 4 3 2 1 SIDE1 1 1 PWRLED_ON# PWR_SW#_S 2 R1.2 2012/11/28 D6501 pin2 is connected 1 33Ohm 1 PWR_SW#_M 2 2 30 R6503 2012/11/06 LID_SW# 1 工工工工工工 R1.2 30,37 30,66 10PF/50V C6506 PWR_AMBER_LED# R6509 2 1 0Ohm R6510 2 1 0Ohm PWRLED_ON# @ AZ2025-02S @ R1.2-28 change Power LED CON6503 circuit C R1.0 remove VG70 C POWER connector CON6503 0719 DEBUG CARD CONN. +3VS +3V 1 B 1 B C6503 1 R6505 0Ohm @ Debug port power is changed to +3VS 2 2 R6506 0Ohm 2 0.1UF/16V @ CON6502 21,30,43 LPC_AD0 21,30,43 LPC_AD1 21,30,43 LPC_AD2 21,30,43 LPC_AD3 21,30,43 21 LPC_FRAME# CLK_DEBUG LPC_AD0 LPC_AD1 EXT_SMI#_C LPC_AD2 INT_SERIRQ_C LPC_AD3 LPC_FRAME# CLK_DEBUG 12 11 10 9 8 7 6 5 4 3 2 1 12 SIDE1 11 10 9 8 7 6 5 4 3 2 1 SIDE2 13 14 FPC_CON_12P 12V18GWSM045 A 21,30,43 25,30 INT_SERIRQ R6501 2 @ 1 0Ohm INT_SERIRQ_C EXT_SMI# R6502 2 @ 1 0Ohm EXT_SMI#_C A Frank 0425_modify Debug port (add EXT_SMI#_C and INT_SERIRQ_C) Title : MDC/ PWR SW/ Debug CR R1.0 change part for EOL. Joyoung0803 PS. Pin define is reverse. BU1-RD Div.1-HW RD Dept.1 Size Project Name Custom Date: 5 4 3 2 Engineer: Wing_Cheng Rev VA70_HW Friday, January 18, 2013 Sheet 1 1.0 65 of 96 5 4 3 2 1 +5VA +5VSUS Charger LED 1 1 Power LED 1 1 1 +5VS R6618 1 2 0Ohm @ 30 C1 2 2 3 R6620 0Ohm 1 4 Q6601B UM6K1N 5@ CHG_LED_BLUE# BAT_ORG_LED# +5VS 2 0Ohm 1 3 1 3 R6617 R1.2 2012/11/29 cost dwon R6619 0Ohm @ C6603 1UF/6.3V 2 30 +5VA 2 1 2 200KOhm PWR_AMBER_LED# WLAN LED 3 C2 Q6601A UM6K1N @ 2 1 1 @ 1 R6611 R0402 2 R6602 560Ohm 2 0209 1 1 +5VA 6 2 2 30,65 SP6601 1 PWR_BLUE_LED# R6606 560Ohm 10V240000029 1 R6607 360Ohm R1.2 2012/11/08 cost dwon 0ohm 30,65 D 2 3 3 R6604 360Ohm 4 @ 2 C1 C2 2 6 Q6602B UM6K1N 5 1 @ C6601 47PF/50V 1AV200000015 BLUE&ORANGE 07V130000038 BLUE&ORANGE 07V130000038 D Q6602A UM6K1N 2 @ SR-65 A LED6602 A LED6601 R6608 10KOhm @ C6602 47PF/50V 1AV200000015 2 1 1 @ SR-65 2 +5VSUS LED6605 AMBER 07V130000055 LED6604 BLUE 07V130000017 2 HDD LED C D 2 R6616 499Ohm 10V220000076 1 2N7002 2 S R6613 100KOhm @ R6605 300OHM 1 2 0Ohm Storage_LED# 1 2 20 Q6603A UM6K1N 2 SATA_LED# @ Q6603B UM6K1N 5 1 Q6605B UM6K1N 5 3 2 6 LED_WLAN 1 Q6605A UM6K1N 2 R6612 100KOhm 4 2 LED_WLAN# LED_WLAN#_C 1 R6614 100KOhm R6615 10KOhm 55 +3VS 1 +3VS_WLAN @ @ Screw A x 4 (PTH) CPU Screw B x 4 3 2 R6610 +3VS_WLAN 4 1 G 1 WLAN_LED 1 Q6604 25 6 3 2 2 C Screw hole R x 1 @ Screw hole Q x 6 WLAN NUT B H6615 H6601 H6608 B H6613 1 CRT276X315D157 1 2 3 H6621 1 H6602 1 C354D126 NP_NC GND1 GND4 GND2 GND3 1 2 3 5 4 NP_NC GND1 GND4 GND2 GND3 1 2 3 5 4 NP_NC GND1 GND4 GND2 GND3 5 4 H6628 H6629 A40M20-64AS A40M20-64AS CRT276X315D157 H6603 H6622 1 1 CRT276X315D157 C354D126 RT413X394CBD126N ST354CB354D126N 1 CRT276X315D157 H6614 Screw hole T x 1 1 H6625 GPU Screw P x 2 1 2 3 H6623 1 1 C354D126 C354D126 1 2 3 H6616 C354D126 NP_NC GND1 GND4 GND2 GND3 ST354CB354D126N H6609 Screw hole S x 2 H6604 NP_NC GND1 GND4 GND2 GND3 H6618 1 2 3 5 4 NP_NC GND1 GND4 GND2 GND3 5 4 PCH 5 4 Local Side Symbol Screw hole V x 1 H6611 ST354CB354D126N ST354CB354D126N H6607 1 H6610 RT394x384CB354D126N H6605 1 1 2 3 H6617 CRT315x335CB236D138 1 2 3 H6606 1 CRT315x335CB236D138 Screw A x 2 (NPTH) NP_NC GND1 GND4 GND2 GND3 NP_NC GND1 GND4 GND2 GND3 H6619 5 4 1 2 3 NP_NC GND1 GND4 GND2 GND3 CT236B67ID47 5 4 5 4 H6612 ST354CB354D126N ST354CB354D126N RT394x384CB354D126N CT236B67ID47 A Fix hole D x 1 H6620 H6624 1 2 3 H6633 1 CB276D138N NP_NC GND1 GND4 GND2 GND3 S6635 5 4 1 2 3 NP_NC GND1 GND4 GND2 GND3 NP_NC19 NP_NC20 NP_NC21 NP_NC22 NP_NC23 NP_NC24 NP_NC25 NP_NC26 NP_NC27 NP_NC28 NP_NC29 NP_NC30 NP_NC31 NP_NC32 NP_NC33 NP_NC34 NP_NC35 NP_NC36 43 44 45 46 47 48 49 50 51 61 62 63 64 65 66 67 68 69 A RTCBD126 1 EMI_SPRING_PAD Title : LED/ CIR/ FN/ SCREW C354D126N BU1-RD Div.1-HW RD Dept.1 H6634 1 Size OB248x236DO150x138N 4 3 2 Engineer: Wing_Cheng Project Name Custom Date: 5 NP_NC1 NP_NC2 NP_NC3 NP_NC4 NP_NC5 NP_NC6 NP_NC7 NP_NC8 NP_NC9 NP_NC10 NP_NC11 NP_NC12 NP_NC13 NP_NC14 NP_NC15 NP_NC16 NP_NC17 NP_NC18 /DGPU C354D126N Fix hole N x 1 1 5 4 P_GND 7 8 9 10 11 12 13 14 15 25 26 27 28 29 30 31 32 33 Rev VA70_HW Friday, January 18, 2013 Sheet 1 1.0 66 of 96 5 4 3 2 1 D D C C B B A A Title : TPM Engineer: Pegatron Corp. Size B Rev VA70_HW Date: Friday, January 18, 2013 5 4 3 2 Wing_Cheng Project Name 1.0 Sheet 1 67 of 96 5 4 3 2 1 D D C C B B Title : Finger Printer A Engineer: Pegatron Corp. Size Rev VA70_HW Date: Friday, January 18, 2013 4 3 Wing_Cheng Project Name A 5 A 2 1.0 Sheet 68 1 of 96 5 4 3 2 1 D D C C B B A A Title : G-Sensor TSH35TR BU1-RD Div.1-HW RD Dept.1 Size Engineer: Wing_Cheng Project Name Rev A 1.0 Date: Friday, January 18, 2013 5 4 3 2 Sheet 69 1 of 96 5 4 3 3 PEG_TXP[15:0] 3 PEG_TXN[15:0] 3 PEG_RXP[15:0] 3 PEG_RXN[15:0] 2 1 +1.05VS_VGA +3VS_VGA +3VS_VGA +1.05VS_VGA 63,71,72,91 +3VS_VGA 63,71,72,74,75,87,91 23 23,30,33,40,43,47,53,55 U7002 1 A DGPU_HOLD_RST# 2 1 GPU BOM Optional Definition VCC C7053 0.1UF/10V 10% @ @ => Unmount. /DGPU => Optimus SKU. 5 /EGL => When N14E-GL is mounted, we need to mount this optional. 2 B BUF_PLT_RST# D 3 PEX_RST @ PEX_RST D /EGL_PGV => When N14E-GL or N14P-GV are mounted, we need to mount this optional. 74 1 0Ohm 2 R7020 2 /PGV => When N14P-GV is mounted, we need to mount this optional. 4 Y SN74LVC1G08DCKR /DGPU GND R7009 100KOhm /DGPU AN17 AM17 PEG_TXP4 PEG_TXN4 PEG_RXP5 PEG_RXN5 C7036 2 C7030 2 /DGPU 1 0.22UF/10V 1 0.22UF/10V /DGPU PEG_RXP6 PEG_RXN6 C7026 2 C7025 2 /DGPU 1 0.22UF/10V 1 0.22UF/10V /DGPU PEG_RXP7 PEG_RXN7 C7029 2 C7027 2 /DGPU 1 0.22UF/10V 1 0.22UF/10V /DGPU PEX_TX7+ AL19 PEX_TX7- AK19 PEG_RXP8 PEG_RXN8 C7034 2 C7033 2 /EGL 1 0.22UF/10V 1 0.22UF/10V /EGL PEX_TX8+ AK20 PEX_TX8- AJ20 AN20 AM20 PEG_TXP7 PEG_TXN7 AP20 AP21 PEG_TXP8 PEG_TXN8 PEG_RXP9 PEG_RXN9 C7046 2 C7035 2 /EGL 1 0.22UF/10V 1 0.22UF/10V /EGL PEG_RXP10 PEG_RXN10 C7038 2 C7037 2 /EGL 1 0.22UF/10V 1 0.22UF/10V /EGL PEG_RXP11 PEG_RXN11 C7040 2 C7039 2 /EGL 1 0.22UF/10V 1 0.22UF/10V /EGL PEX_TX11+ AL22 PEX_TX11- AK22 AP23 AP24 PEG_TXP11 PEG_TXN11 Port 0~7 PEX_TX10+ AK21 PEX_TX10- AJ21 AN23 AM23 PEG_TXP10 PEG_TXN10 X8 PEX_TX9+ AH20 PEX_TX9- AG20 AN21 AM21 PEG_TXP9 PEG_TXN9 PGV PEX_TX6+ AK18 PEX_TX6- AJ18 AN18 AM18 PEG_TXP6 PEG_TXN6 Port 0~15 PEX_TX5+ AH17 PEX_TX5- AG17 AP17 AP18 PEG_TXP5 PEG_TXN5 X16 PEX_TX4+ AK17 PEX_TX4- AJ17 PEG_RXP12 PEG_RXN12 C7042 2 C7041 2 /EGL 1 0.22UF/10V 1 0.22UF/10V /EGL PEX_TX12+ AK23 PEX_TX12- AJ23 PEG_RXP13 PEG_RXN13 C7047 2 C7043 2 /EGL 1 0.22UF/10V 1 0.22UF/10V /EGL PEX_TX13+ AH23 PEX_TX13- AG23 PEG_RXP14 PEG_RXN14 C7049 2 C7048 2 /EGL 1 0.22UF/10V 1 0.22UF/10V /EGL PEX_TX14+ AK24 PEX_TX14- AJ24 /EGL 1 0.22UF/10V 1 0.22UF/10V /EGL PEX_TX15+ AL25 PEX_TX15- AK25 AN24 AM24 PEG_TXP12 PEG_TXN12 AN26 AM26 PEG_TXP13 PEG_TXN13 AP26 AP27 PEG_TXP14 PEG_TXN14 A PEG_RXP15 PEG_RXN15 C7051 2 C7050 2 AN27 AM27 PEG_TXP15 PEG_TXN15 1 2 1 1 2 2 2 1 2 1 1 1 2 22UF/6.3V /DGPU C7010 22UF/6.3V /DGPU PEX_RX1 PEX_RX1_N PEX_TX2 PEX_TX2_N PEX_RX2 PEX_RX2_N PLACE UNDER BGA 10UF/6.3V /DGPU PLACE NEAR BGA C7011 10UF/6.3V /DGPU C7012 22UF/6.3V /DGPU 1 C7013 2 4.7UF/6.3V /DGPU 1 C7007 2 1UF/6.3V /DGPU 1 C7006 2 1UF/6.3V /DGPU 1 C7008 2 AG13 AG15 AG16 AG18 AG25 AH15 AH18 AH26 AH27 AJ27 AK27 AL27 AM28 AN28 C7014 22UF/6.3V /DGPU PLACE BETWEEN BGA AND POWER SUPPLY C PEX_TX3 PEX_TX3_N PEX_RX3 PEX_RX3_N PEX_TX4 PEX_TX4_N PEX_RX4 PEX_RX4_N +3VS_VGA PEX_TX5 PEX_TX5_N PEX_PLL_HVDD PEX_RX5 PEX_RX5_N PEX_SVDD_3V3 AH12 AG12 PEX_TX6 PEX_TX6_N C7016 0.1UF/16V /DGPU PEX_RX6 PEX_RX6_N C7017 4.7UF/6.3V /DGPU C7015 4.7UF/6.3V /DGPU PLACE NEAR BGA PEX_TX7 PEX_TX7_N PEX_RX7 PEX_RX7N PEX_TX8 PEX_TX8_N 0.2 mm VDD_SENSE PEX_RX8 PEX_RX8_N L4 NVDD_SENSE 87 B 0.2 mm GND_SENSE L5 NVDD_GND_SENSE 87 PEX_TX9 PEX_TX9_N PEX_RX9 PEX_RX9_N PEX_TX10 PEX_TX10_N NC12 P8 PEX_RX10 PEX_RX10_N PEX_TX11 PEX_TX11_N PEX_RX11 PEX_RX11_N PEX_TX12 PEX_TX12_N PEX_TSTCLK_OUT PEX_TSTCLK_OUT_N AJ26 AK26 PEX_TSTCLK_OUT PEX_TSTCLK_OUT# R7007 1 @ 2 200Ohm 1% PEX_RX12 PEX_RX12_N +1.05VS_VGA PEX_TX13 PEX_TX13_N PEX_PLLVDD AG26 R7022 2 /DGPU +PEX_PLLVDD PEX_RX13 PEX_RX13_N PEX_TX14 PEX_TX14_N TESTMODE AK11 GPU_TESTMODE R7004 1 /DGPU C7052 0.1UF/16V /DGPU C7044 1UF/6.3V /DGPU 2 /DGPU 1 0.22UF/10V 1 0.22UF/10V /DGPU C7005 1 C7023 2 C7028 2 10UF/6.3V /DGPU 1 AN15 AM15 PEG_RXP4 PEG_RXN4 EGL PEX_TX3+ AL16 PEX_TX3- AK16 C7004 2 C7020 2 C7022 2 PEX_IOVDDQ1 PEX_IOVDDQ2 PEX_IOVDDQ3 PEX_IOVDDQ4 PEX_IOVDDQ5 PEX_IOVDDQ6 PEX_IOVDDQ7 PEX_IOVDDQ8 PEX_IOVDDQ9 PEX_IOVDDQ10 PEX_IOVDDQ11 PEX_IOVDDQ12 PEX_IOVDDQ13 PEX_IOVDDQ14 PEX_TX1 PEX_TX1_N 2 PEG_RXP3 PEG_RXN3 /DGPU 1 0.22UF/10V 1 0.22UF/10V /DGPU 10UF/6.3V /DGPU 1 AP14 AP15 PEG_TXP3 PEG_TXN3 Port PEX_TX2+ AK15 PEX_TX2- AJ15 PEX_RX0 PEX_RX0_N 2 C7024 2 C7031 2 PEG_TXP2 PEG_TXN2 C7009 PEX_TX0 PEX_TX0_N 1 PEG_RXP2 PEG_RXN2 C /DGPU 1 0.22UF/10V 1 0.22UF/10V /DGPU 4.7UF/6.3V /DGPU 1 AN14 AM14 PEG_TXP1 PEG_TXN1 PCIE PEX_TX1+ AH14 PEX_TX1- AG14 C7003 2 /DGPU 1 0.22UF/10V 1 0.22UF/10V /DGPU 1UF/6.3V /DGPU 2 C7018 2 C7019 2 C7002 1 AN12 AM12 PEG_RXP1 PEG_RXN1 B PEX_TX0+ AK14 PEX_TX0- AJ14 1UF/6.3V /DGPU 1 C7032 2 C7021 2 PEG_TXP0 PEG_TXN0 PEX_REFCLK PEX_REFCLK_N C7001 2 PEG_RXP0 PEG_RXN0 /DGPU 1 0.22UF/10V 1 0.22UF/10V /DGPU PEX_CLKREQ_N AG19 AG21 AG22 AG24 AH21 AH25 1 CLK_PCIE_PEG_PCH CLK_PCIE_PEG#_PCH PEX_IOVDD1 PEX_IOVDD2 PEX_IOVDD3 PEX_IOVDD4 PEX_IOVDD5 PEX_IOVDD6 PEX_RST_N 2 AL13 AK13 PEX_WAKE_N 2 1 21 21 AK12 1 2 1 AJ12 CLKREQ_PEG#_R S 2 3 CLKREQ_PEG# D 21 +1.05VS_VGA 1/19 PCI_EXPRESS AJ11 R7008 10KOhm /DGPU G Q7001 2N7002 /DGPU U7001A 1 +3VS_VGA 2 +3VS_VGA 1 0Ohm C7045 4.7UF/6.3V /DGPU 2 10KOhm PLACE NEAR BALL PLACE NEAR BGA PEX_RX14 PEX_RX14_N A PEX_TX15 PEX_TX15_N PEX_RX15 PEX_RX15_N PEX_TERMP AP29 PEX_TERMP R7003 1 /DGPU 2 2.49KOhm N14P-GT1 /DGPU Title : Engineer: PEGATRON COMPUTER INC Size C Date: 5 4 3 2 Project Name N14xxx-PCIE Panda_Wang Rev VA70_HW P/N Friday, January 18, 2013 Sheet 1 1.3 70 of 99 5 4 76,77 FBAD[0..63] 76,77 FBA_DBI[0..7] 76,77 FBA_EDC[0..7] 76,77 FBA_CMD[0..31] 3 2 1 +1.05VS_VGA +1.35VS_VGA +3VS_VGA 78,79 FBBD[0..63] 78,79 FBB_DBI[0..7] 78,79 FBB_EDC[0..7] 78,79 FBB_CMD[0..31] U7001B +1.05VS_VGA 63,70,72,91 +1.35VS_VGA 63,75,76,77,78,79,84 +3VS_VGA 63,70,72,74,75,87,91 U7001C 2/19 FBA 3/19 FBB BOT SIDE P30 F31 F34 M32 AD31 AL29 AM32 AF34 FBA_EDC0 FBA_EDC1 FBA_EDC2 FBA_EDC3 FBA_EDC4 FBA_EDC5 FBA_EDC6 FBA_EDC7 M31 G31 E33 M33 AE31 AK30 AN33 AF33 FB_CLAMP E1 FB_CLAMP_R R7121 2 /DGPU 1 0Ohm R7130 2 /DGPU 1 10KOhm FB_CLAMP FB_CLAMP 30,74,84 +1.05VS_VGA /DGPU K27 +FB_DLL_AVDD_R L7102 1 GND 1 C7115 0.1UF/10V 10% /DGPU 2 50mA 1 FB_DLL_AVDD 2 30Ohm/100Mhz C7121 22UF/6.3V /DGPU FB_DLL_AVDD EGL GDDR5 CMD Mapping Table 1.05V PGV <0..31> <32..63> 35mA 12 28 RAS* 15 31 CAS* 5 21 WE* 0 16 CS* 8 24 ABI* 10 26 A0_A10 11 27 A1_A9 20121212(Eli) FB_DLL_AVDD table follow NV SPEC DG_06246_001_V04 Page121 FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8 FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28 FBA_CMD29 FBA_CMD30 FBA_CMD31 FBA_DQM0 FBA_DQM1 FBA_DQM2 FBA_DQM3 FBA_DQM4 FBA_DQM5 FBA_DQM6 FBA_DQM7 FBA_CMD_RFU0 FBA_CMD_RFU1 U30 T31 U29 R34 R33 U32 U33 U28 V28 V29 V30 U34 U31 V34 V33 Y32 AA31 AA29 AA28 AC34 AC33 AA32 AA33 Y28 Y29 W31 Y30 AA34 Y31 Y34 Y33 V31 FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8 FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28 FBA_CMD29 FBA_CMD30 FBA_CMD31 MEMORY 50mA +1.35VS_VGA FBA_CMD14 R7124 2 /DGPU 1 10KOhm FBA_CMD30 R7123 2 /DGPU 1 10KOhm FBA_CMD29 R7125 2 /DGPU 1 10KOhm FBA_CMD13 R7126 2 /DGPU 1 10KOhm 2 18 A2_BA0 1 17 A3_BA3 3 19 A4_BA2 4 20 A5_BA1 7 23 A6_A11 6 22 A7_A8 9 25 A12_RFU 14 30 CKE* 13 29 RESET* GND R32 AC32 +1.35VS_VGA FBA_DEBUG0 FBA_DEBUG1 FBA_DQS_WP0 FBA_DQS_WP1 FBA_DQS_WP2 FBA_DQS_WP3 FBA_DQS_WP4 FBA_DQS_WP5 FBA_DQS_WP6 FBA_DQS_WP7 FBA_CLK0 FBA_CLK0_N FBA_CLK1 FBA_CLK1_N FBA_DQS_RN0 FBA_DQS_RN1 FBA_DQS_RN2 FBA_DQS_RN3 FBA_DQS_RN4 FBA_DQS_RN5 FBA_DQS_RN6 FBA_DQS_RN7 FBA_WCK01 FBA_WCK01_N FBA_WCK23 FBA_WCK23_N FBA_WCK45 FBA_WCK45_N FBA_WCK67 FBA_WCK67_N R28 FBA_DEBUG0 AC28 FBA_DEBUG1 R7101 1 R7102 1 @ @ R30 R31 AB31 AC31 2 60.4Ohm 1% 2 60.4Ohm 1% FBA_CLK0 FBA_CLK0# FBA_CLK1 FBA_CLK1# 76 76 77 77 +FB_PLL_AVDD 1 H26 FB_VREF FBA_PLL_AVDD J30 J31 J32 J33 AH31 AJ31 AJ32 AJ33 E11 E3 A3 C9 F23 F27 C30 A24 FBB_EDC0 FBB_EDC1 FBB_EDC2 FBB_EDC3 FBB_EDC4 FBB_EDC5 FBB_EDC6 FBB_EDC7 D10 D5 C3 B9 E23 E28 B30 A23 D +1.35VS_VGA FBB_CMD0 FBB_CMD1 FBB_CMD2 FBB_CMD3 FBB_CMD4 FBB_CMD5 FBB_CMD6 FBB_CMD7 FBB_CMD8 FBB_CMD9 FBB_CMD10 FBB_CMD11 FBB_CMD12 FBB_CMD13 FBB_CMD14 FBB_CMD15 FBB_CMD16 FBB_CMD17 FBB_CMD18 FBB_CMD19 FBB_CMD20 FBB_CMD21 FBB_CMD22 FBB_CMD23 FBB_CMD24 FBB_CMD25 FBB_CMD26 FBB_CMD27 FBB_CMD28 FBB_CMD29 FBB_CMD30 FBB_CMD31 FBB_DQM0 FBB_DQM1 FBB_DQM2 FBB_DQM3 FBB_DQM4 FBB_DQM5 FBB_DQM6 FBB_DQM7 FBB_CMD_RFU0 FBB_CMD_RFU1 1 30Ohm/100Mhz /PGV 30Ohm/100Mhz /EGL 2 FBx_PLL_AVDD C7119 22UF/6.3V /DGPU FBB_CMD0 FBB_CMD1 FBB_CMD2 FBB_CMD3 FBB_CMD4 FBB_CMD5 FBB_CMD6 FBB_CMD7 FBB_CMD8 FBB_CMD9 FBB_CMD10 FBB_CMD11 FBB_CMD12 FBB_CMD13 FBB_CMD14 FBB_CMD15 FBB_CMD16 FBB_CMD17 FBB_CMD18 FBB_CMD19 FBB_CMD20 FBB_CMD21 FBB_CMD22 FBB_CMD23 FBB_CMD24 FBB_CMD25 FBB_CMD26 FBB_CMD27 FBB_CMD28 FBB_CMD29 FBB_CMD30 FBB_CMD31 FBB_CMD30 R7119 2 /DGPU 1 10KOhm FBB_CMD14 R7122 2 /DGPU 1 10KOhm FBB_CMD29 R7120 2 /DGPU 1 10KOhm FBB_CMD13 R7127 2 /DGPU 1 10KOhm C GND C12 C20 G14 G20 R7103 1 R7104 1 FBC_DEBUG0 FBC_DEBUG1 2 60.4Ohm 1% 2 60.4Ohm 1% @ @ B FBB_DQS_WP0 FBB_DQS_WP1 FBB_DQS_WP2 FBB_DQS_WP3 FBB_DQS_WP4 FBB_DQS_WP5 FBB_DQS_WP6 FBB_DQS_WP7 FBB_CLK0 FBB_CLK0_N FBB_CLK1 FBB_CLK1_N C7113 1UF/6.3V 10% /PGV D9 E4 B2 A9 D22 D28 A30 B23 FBB_DQS_RN0 FBB_DQS_RN1 FBB_DQS_RN2 FBB_DQS_RN3 FBB_DQS_RN4 FBB_DQS_RN5 FBB_DQS_RN6 FBB_DQS_RN7 FBB_WCK01 FBB_WCK01_N FBB_WCK23 FBB_WCK23_N FBB_WCK45 FBB_WCK45_N FBB_WCK67 FBB_WCK67_N FBB_WCKB01 FBB_WCKB01_N FBB_WCKB23 FBB_WCKB23_N FBB_WCKB45 FBB_WCKB45_N FBB_WCKB67 FBB_WCKB67_N 2 1 +FB_PLL_AVDD C7109 0.1UF/10V /DGPU D13 E14 F14 A12 B12 C14 B14 G15 F15 E15 D15 A14 D14 A15 B15 C17 D18 E18 F18 A20 B20 C18 B18 G18 G17 F17 D16 A18 D17 A17 B17 E17 +1.35VS_VGA FBB_DEBUG0 FBB_DEBUG1 +3VS_VGA 2 Place Close to BALL C7112 1UF/6.3V 10% /DGPU 2 2 2 1 1 EGL 3.3V 120mA PGV 1.05V 62mA Place Close to BGA A FBB_DBI0 FBB_DBI1 FBB_DBI2 FBB_DBI3 FBB_DBI4 FBB_DBI5 FBB_DBI6 FBB_DBI7 FBB_D0 FBB_D1 FBB_D2 FBB_D3 FBB_D4 FBB_D5 FBB_D6 FBB_D7 FBB_D8 FBB_D9 FBB_D10 FBB_D11 FBB_D12 FBB_D13 FBB_D14 FBB_D15 FBB_D16 FBB_D17 FBB_D18 FBB_D19 FBB_D20 FBB_D21 FBB_D22 FBB_D23 FBB_D24 FBB_D25 FBB_D26 FBB_D27 FBB_D28 FBB_D29 FBB_D30 FBB_D31 FBB_D32 FBB_D33 FBB_D34 FBB_D35 FBB_D36 FBB_D37 FBB_D38 FBB_D39 FBB_D40 FBB_D41 FBB_D42 FBB_D43 FBB_D44 FBB_D45 FBB_D46 FBB_D47 FBB_D48 FBB_D49 FBB_D50 FBB_D51 FBB_D52 FBB_D53 FBB_D54 FBB_D55 FBB_D56 FBB_D57 FBB_D58 FBB_D59 FBB_D60 FBB_D61 FBB_D62 FBB_D63 L7103 U27 120mA N14P-GT1 /DGPU G9 E9 G8 F9 F11 G11 F12 G12 G6 F5 E6 F6 F4 G4 E2 F3 C2 D4 D3 C1 B3 C4 B5 C5 A11 C11 D11 B11 D8 A8 C8 B8 F24 G23 E24 G24 D21 E21 G21 F21 G27 D27 G26 E27 E29 F29 E30 D30 A32 C31 C32 B32 D29 A29 C29 B29 B21 C23 A21 C21 B24 C24 B26 C26 D12 E12 E20 F20 FBB_CLK0 FBB_CLK0# FBB_CLK1 FBB_CLK1# 78 78 79 79 +1.05VS_VGA L7101 76 76 76 76 77 77 77 77 1 1 T7101 FBA_WCK01 FBA_WCK01# FBA_WCK23 FBA_WCK23# FBA_WCK45 FBA_WCK45# FBA_WCK67 FBA_WCK67# 2 FBA_WCKB01 FBA_WCKB01_N FBA_WCKB23 FBA_WCKB23_N FBA_WCKB45 FBA_WCKB45_N FBA_WCKB67 FBA_WCKB67_N K31 L30 H34 J34 AG30 AG31 AJ34 AK34 1 M30 H30 E34 M34 AF30 AK31 AM34 AF32 FBBD0 FBBD1 FBBD2 FBBD3 FBBD4 FBBD5 FBBD6 FBBD7 FBBD8 FBBD9 FBBD10 FBBD11 FBBD12 FBBD13 FBBD14 FBBD15 FBBD16 FBBD17 FBBD18 FBBD19 FBBD20 FBBD21 FBBD22 FBBD23 FBBD24 FBBD25 FBBD26 FBBD27 FBBD28 FBBD29 FBBD30 FBBD31 FBBD32 FBBD33 FBBD34 FBBD35 FBBD36 FBBD37 FBBD38 FBBD39 FBBD40 FBBD41 FBBD42 FBBD43 FBBD44 FBBD45 FBBD46 FBBD47 FBBD48 FBBD49 FBBD50 FBBD51 FBBD52 FBBD53 FBBD54 FBBD55 FBBD56 FBBD57 FBBD58 FBBD59 FBBD60 FBBD61 FBBD62 FBBD63 C7122 1UF/6.3V 10% /EGL FBB_PLL_AVDD 20121214(Eli) R7129 change to bead type 30ohm(ESR=0.01ohm) follow NV FAE recommend F8 E8 A5 A6 D24 D25 B27 C27 D6 D7 C6 B6 F26 E26 A26 A27 Place Close to BGA 78 78 78 78 79 79 79 79 +FB_PLL_AVDD H17 120mA N14P-GT1 /DGPU FBB_WCK01 FBB_WCK01# FBB_WCK23 FBB_WCK23# FBB_WCK45 FBB_WCK45# FBB_WCK67 FBB_WCK67# 1 B FBA_DBI0 FBA_DBI1 FBA_DBI2 FBA_DBI3 FBA_DBI4 FBA_DBI5 FBA_DBI6 FBA_DBI7 FBA_D0 FBA_D1 FBA_D2 FBA_D3 FBA_D4 FBA_D5 FBA_D6 FBA_D7 FBA_D8 FBA_D9 FBA_D10 FBA_D11 FBA_D12 FBA_D13 FBA_D14 FBA_D15 FBA_D16 FBA_D17 FBA_D18 FBA_D19 FBA_D20 FBA_D21 FBA_D22 FBA_D23 FBA_D24 FBA_D25 FBA_D26 FBA_D27 FBA_D28 FBA_D29 FBA_D30 FBA_D31 FBA_D32 FBA_D33 FBA_D34 FBA_D35 FBA_D36 FBA_D37 FBA_D38 FBA_D39 FBA_D40 FBA_D41 FBA_D42 FBA_D43 FBA_D44 FBA_D45 FBA_D46 FBA_D47 FBA_D48 FBA_D49 FBA_D50 FBA_D51 FBA_D52 FBA_D53 FBA_D54 FBA_D55 FBA_D56 FBA_D57 FBA_D58 FBA_D59 FBA_D60 FBA_D61 FBA_D62 FBA_D63 C7120 0.1UF/10V 10% /DGPU 2 C L28 M29 L29 M28 N31 P29 R29 P28 J28 H29 J29 H28 G29 E31 E32 F30 C34 D32 B33 C33 F33 F32 H33 H32 P34 P32 P31 P33 L31 L34 L32 L33 AG28 AF29 AG29 AF28 AD30 AD29 AC29 AD28 AJ29 AK29 AJ30 AK28 AM29 AM31 AN29 AM30 AN31 AN32 AP30 AP32 AM33 AL31 AK33 AK32 AD34 AD32 AC30 AD33 AF31 AG34 AG32 AG33 2 FBAD0 FBAD1 FBAD2 FBAD3 FBAD4 FBAD5 FBAD6 FBAD7 FBAD8 FBAD9 FBAD10 FBAD11 FBAD12 FBAD13 FBAD14 FBAD15 FBAD16 FBAD17 FBAD18 FBAD19 FBAD20 FBAD21 FBAD22 FBAD23 FBAD24 FBAD25 FBAD26 FBAD27 FBAD28 FBAD29 FBAD30 FBAD31 FBAD32 FBAD33 FBAD34 FBAD35 FBAD36 FBAD37 FBAD38 FBAD39 FBAD40 FBAD41 FBAD42 FBAD43 FBAD44 FBAD45 FBAD46 FBAD47 FBAD48 FBAD49 FBAD50 FBAD51 FBAD52 FBAD53 FBAD54 FBAD55 FBAD56 FBAD57 FBAD58 FBAD59 FBAD60 FBAD61 FBAD62 FBAD63 D Place Close to BALL A Title : Engineer: PEGATRON COMPUTER INC Size C Date: 5 4 3 2 Project Name N14xxx BUFFER Panda_Wang Rev VA70_HW P/N Friday, January 18, 2013 Sheet 1 1.3 71 of 99 5 4 3 2 1 VGA +1.05VS_VGA +3VS_VGA +1.05VS_VGA 63,70,71,91 +3VS_VGA 63,70,71,74,75,87,91 D D 4 2 +3VS_VGA 20120731(Eli) follow NV SPEC DG_06246_001_V03 page171 DAC didn't use 1.DACA_VDD floating 2.DAC I/O Pins floating RN7201B 2.2KOhm /DGPU RN7201A 2.2KOhm /DGPU AG10 AP9 AP8 3 4/19 DACA 20121214(Eli) Modify RN7201 optional from @ to /DGPU and remove R7201 follow NV FAE recommend DACA_VDD I2CA_SCL I2CA_SDA R4 R5 1 U7001N DDC_CLK_VGA DDC_DATA_VGA DACA_VREF DACA_RSET DACA_HSYNC DACA_VSYNC DACA_RED DACA_GREEN DACA_BLUE N14P-GT1 AM9 AN9 AK9 AL10 AL9 /DGPU C C X'TAL B B +1.05VS_VGA 12/19 XTAL_PLL +PLL_VDD 1 2 180Ohm/100Mhz +SP_PLLVDD 78 mA 71 mA AD8 AE8 AD7 PLLVDD SP_PLLVDD VID_PLLVDD 1 H1 H3 RN7203B 10KOhm /DGPU XTAL_SSIN XTAL_IN N14P-GT1 VGA_XTALIN C7212 8.2PF/50V 1AV200000082 /DGPU 4 XTAL_OUTBUFF XTAL_OUT J4 XTAL_OUTB H2 1 XTALSSIN /DGPU 1 3 RN7203A 10KOhm /DGPU VGA_XTALOUT X7201 27MHZ /DGPU C7213 8.2PF/50V 1AV200000082 /DGPU 2 Place Close to BALLS 4 C7215 0.1UF/16V /DGPU 3 C7210 0.1UF/16V /DGPU 2 1 C7209 4.7UF/6.3V /DGPU 2 2 C7211 22UF/6.3V /DGPU 1 2 41 mA 1 L7203 1 /DGPU U7001O C7208 0.1UF/16V /DGPU 2 +1.05VS_VGA C7207 22UF/6.3V /DGPU 2 1 2 30Ohm/100Mhz 2 L7202 1 /DGPU STUFF PDs on XTALSSIN and XTALOUTBUFF WHEN EXT_SS IS NOT USED A A Title : N14xxx_RGB,XTAL Engineer: PEGATRON COMPUTER INC Size C Date: 5 4 3 2 Project Name Panda_Wang Rev VA70_HW P/N Friday, January 18, 2013 Sheet 1 1.3 72 of 99 5 4 3 LVDS 2 1 +3VS_VGA DVI +3VS_VGA 63,70,71,72,74,75,87,91 U7001J 20121214(Eli) Remove R7303, R7304, R7305, R7306, R7308, R7309, R7310, R7312, RN7301, RN7302 follow NV FAE recommend 6/19 IFPAB AJ8 IFPA_TXC_N IFPA_TXC AH8 IFPA_TXD2_N IFPA_TXD2 IFPA_TXD3_N IFPA_TXD3 IFPB_TXC_N IFPB_TXC AG9 AN6 AM6 IFPA_IOVDD IFPB_IOVDD AN3 AP3 AB8 IFPAB_PLLVDD IFPA_TXD1_N IFPA_TXD1 AG8 9/19 IFPEF IFPAB_RSET IFPA_TXD0_N IFPA_TXD0 D U7001M IFPB_TXD4_N IFPB_TXD4 IFPB_TXD5_N IFPB_TXD5 IFPB_TXD6_N IFPB_TXD6 IFPB_TXD7_N IFPB_TXD7 AM5 AN5 AD6 AB4 AB3 IFPE_AUX_I2CY_SDA_N IFPE_AUX_I2CY_SCL AC5 AC4 IFPE_L3_N IFPE_L3 IFPEF_RSET AK6 AL6 AC3 AC2 IFPE_L2_N IFPE_L2 AH6 AJ6 AC1 AD1 IFPE_L1_N IFPE_L1 IFPE AD3 AD2 IFPE_L0_N IFPE_L0 AH9 AJ9 AP5 AP6 R1 GPIO18 AL7 AM7 AM8 AN8 AC7 AL8 AK8 AC8 IFPE_IOVDD AF2 AF3 IFPF_AUX_I2CZ_SDA_N IFPF_AUX_I2CZ_SCL IFPF_IOVDD AF1 AG1 IFPF_L3_N IFPF_L3 GPIO14 IFPAB C D IFPEF_PLLVDD AD5 AD4 IFPF_L2_N IFPF_L2 N4 IFPF AF5 AF4 IFPF_L1_N IFPF_L1 N14P-GT1 /DGPU HDMI P3 GPIO19 U7001K C AE4 AE3 IFPF_L0_N IFPF_L0 7/19 IFPC N14P-GT1 /DGPU AF8 AF7 20121221(Eli) Remove T7301, T7302, T7303, T7304 follow NV FAE recommend IFPC_RSET IFPC_PLLVDD IFPC_AUX_I2CW_SDA_N IFPC_AUX_I2CW_SCL IFPC_L3_N IFPC_L3 IFPC_L2_N IFPC_L2 IFPC IFPC_L1_N IFPC_L1 IFPC_L0_N IFPC_L0 B AF6 IFPC_IOVDD GPIO15 AG2 AG3 AG4 AG5 AH4 AH3 IFPX channel AJ2 AJ3 N14E-GL Standard Mode AJ1 AK1 P2 N14P-GT1 /DGPU eDP N14P-GV Combined Mode IFPA LVDS LVDS(DP/DVI) IFPB LVDS LVDS(DP/DVI) IFPC DP/HDMI DP/HDMI IFPD DP/eDP DP/eDP IFPE DP/DVI X IFPF DP/DVI X B U7001L 8/19 IFPD AN2 AG7 IFPD_RSET IFPD_PLLVDD GPIO Definition IFPD_AUX_I2CX_SDA_N IFPD_AUX_I2CX_SCL IFPD_L3_N IFPD_L3 IFPD_L2_N IFPD_L2 IFPD IFPD_L1_N IFPD_L1 A IFPD_L0_N IFPD_L0 AG6 IFPD_IOVDD GPIO17 AK2 AK3 NV SPEC Standard mode DG_06246_001_V03 VA70_HW AK5 AK4 GPIO14 IFPAB_HPD(LVDS) NC AL4 AL3 GPIO15 IFPC_HPD(HDMI) NC AM4 AM3 GPIO17 IFPD_HPD(eDP) NC AM2 AM1 GPIO18 IFPE_HPD(DVI) NC GPIO19 IFPF_HPD(DVI) NC M6 A Title : N14xxx_LVDS_HDMI N14P-GT1 /DGPU Engineer: PEGATRON COMPUTER INC Size C Date: 5 4 3 2 Project Name Panda_Wang Rev VA70_HW P/N Friday, January 18, 2013 Sheet 1 1.3 73 of 99 5 4 3 2 1 +3VS_VGA +3VS_VGA 63,70,71,72,75,87,91 N14E-GL/P-GV Strap Resistance Mapping to Hex Values Resistor Values GPU DEVICE ID +3VS_VGA 1 R7455 10KOhm /EGL C7401 0.1UF/16V /EGL 1 R7459 1KOhm /EGL +3VS_VGA R7460 1KOhm /EGL 1001 0x11E3 0x1294 15.0K 1010 0010 20.0K 1011 0011 2 /EGL 1 33Ohm VGA_ROM_CS_R H5 H7 H4 ROM_SI ROM_SO ROM_SCLK R7452 2 /EGL 1 33Ohm VGA_ROM_SI_R R7453 2 /EGL 1 33Ohm VGA_ROM_SCLK_R 1 2 2 1 1 2 1 2 R7419 45.3KOhm 1% /DGPU 1 2 1 R7416 4.99KOhm 1% /DGPU R7401 40.2KOhm 1% /DGPU 2 1 ROM_SI ROM_SO ROM_SCLK R7407 34.8KOhm 1% /DGPU 2 1 10KOhm T7402 1 C R7418 45.3KOhm 1% @ R7406 4.99KOhm 1% /PGV R7408 10KOhm 1% @ R7409 34.8KOhm 1% /EGL 1 @ 1 R7405 4.99KOhm 1% /DGPU 2 2 R7402 1 VGA_CEC 1 CEC VGA_BUFRST_N L3 2 MULTI_STRAP_REF0_GND L2 1 R7404 5.1KOhm 1% @ 2 BUFRST_N J1 R7417 45.3KOhm 1% @ +3VS_VGA 10/17 Change R7402 optional from /DGPU to @ (NV FAE confirmed)(Panda) STRAP_REFGND R7415 20KOhm 1% /EGL_PGV 2 STRAP0 STRAP1 STRAP2 STRAP3 STRAP4 R7454 R7413 4.99KOhm 1% /EGL_PGV 2 J2 J7 J6 J5 J3 STRAP0 STRAP1 STRAP2 STRAP3 STRAP4 ROM_SI ROM_SO ROM_SCLK ROM_CS_N 2 1 ROM_CS_N H6 R7414 30KOhm 1% @ 2 R7411 45.3KOhm 1% @ 13/19 MISC2 1 U7001P R7412 34.8KOhm 1% @ 24.9K 1100 0100 64Mx32 30.1K 1101 0101 0x6 34.8K 1110 0110 45.3K 1111 0111 HYNIX N14E-GL/P-GV 2 PM25LD010C-SCE /EGL (2 Mb) R7410 45.3KOhm 1% /DGPU 1 STRAP0 STRAP1 STRAP2 STRAP3 STRAP4 2 2 VGA_HOLD# VGA_ROM_SCLK_R VGA_ROM_SI_R 1 8 7 6 5 Multi-Level Mode Strapping Bit3 Bit2 Bit1 Bit0 STRAP0 USER[3] USER[2] USER[1] USER[0] STRAP1 3GIO_PADCFG[3] 3GIO_PADCFG[2] 3GIO_PADCFG[1] 3GIO_PADCFG[0] STRAP2 PCI_DEVID[3] PCI_DEVID[2] PCI_DEVID[1] PCI_DEVID[0] STRAP3 SOR3_EXPOSED SOR2_EXPOSED SOR1_EXPOSED SOR0_EXPOSED STRAP4 RESERVED PCIE_SPEED_CHANGE_GEN3 PCIE_MAX_SPEED DP_PLL_VDD33V ROM_SCLK PCI_DEVICE[4] SUB_VENDOR PCI_DEVID[5] PEX_PLL_EN_TERM ROM_SI RAM_CFG[3] RAM_CFG[2] RAM_CFG[1] RAM_CFG[0] ROM_SO FB[1] FB[0] SMB_ALT_ADDR VGA_DEVICE C SUB_VRNDOR N14E-GL N14P-GV 1 0 BIOS ROM is present No Video BIOS ROM 1 3 +3VS_VGA RN7422A 10KOhm /DGPU RN7422B 10KOhm /DGPU PEX_RST 1 G 1 1 2 2 2 1 K3 4 2.2KOhm 2 2.2KOhm 3 /DGPU 1 /DGPU UM6K1N Q7405B /DGPU +3VS_VGA +3VS_VGA 5 RN7415B RN7415A +3VS_VGA THERMDP JTAG_TCK JTAG_TMS JTAG_TDI JTAG_TDO JTAG_TRST_N FB_CLAMP_MON R7458 2 R7448 10KOhm /DGPU GPIO5_PWM_VID_BOOT_EN 1 FB_CLAMP_TGL_REQ_R @ R7450 2 1 0Ohm 1 0Ohm Q7406 2N7002 /DGPU D VGA_OVERTEMP#_R VGA_THERM_ALERT# GPIO10_FBVREF_ALTV VGA_VID AC_BATT# VGA_DPRSLPVR_GPIO16 T7427 3 P6 M3 L6 P5 P7 L7 M7 N8 M1 M2 L1 M5 N3 M4 R8 P4 P1 2 S GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO16 GPIO20 GPIO21 G 1 +3VS_VGA 1 R7440 10KOhm /DGPU @ +3VS_VGA R7457 2 /DGPU PEX_RST 70,74 5 +3VS_VGA FB_CLAMP_TGL_REQ# GPIO10_FBVREF_ALTV VGA_VID 87 R7444 2 /DGPU 1 0Ohm R7443 10KOhm /DGPU VGA_PSI# U7401 A 1 B 2 GND Y SN74LVC1G08DCKR /DGPU 30 76,77,78,79 VCC 4 FB_CLAMP_MON FB_CLAMP 30,71,84 DGPU_EN_PWR 84,87,91,93 3 R7451 10KOhm @ VGA_PSI# 87 GPIO10_FBVREF_ALTV R7456 1 /DGPU +3VS_VGA 0x11E3 0x1294 STRAP0 45K PU 45K PU STRAP1 5K PD 45K PD STRAP2 20K PD 25K PD STRAP3 5K PD 5K PD STRAP4 45K PD 45K PD ROM_SCLK 35K PD 5K PU ROM_SI 35K PD 35K PD ROM_SO 5K PU 47 5K PU NV SPEC Standard mode DG_06246_001_V03 30 VA70_HW GPIO0 FB_CLAMP_MON FB_CLAMP_MON GPIO1 MEM_VDD_CTL NC GPIO2 LCD_BL_PWM NC GPIO3 LCD_VCC NC GPIO4 LCD_BLEN NC GPIO5 Reserved Reserved GPIO6 FB_CLAMP_TGL_REQ FB_CLAMP_TGL_REQ# GPIO7 3DVision NC GPIO8 OVERT VGA_OVERTEMP# GPIO9 ALERT VGA_THERM_ALERT# GPIO10 MEM_VREF_CTL MEM_VREF_CTL GPIO11 PWM_VID VGA_VID GPIO12 PWR_LEVEL AC_BATT# GPIO13 PSI VGA_PSI# GPIO16 FRM_LCK NC GPIO20 Reserved NC GPIO21 Reserved NC B 2 +3VS_VGA 2 A DEVICE ID 2 100KOhm 12/12 Change R7456 from 10K to 100K follow NV SPEC DG_06246_001_V04 Page185 (NV FAE confirmed)(Panda) N14P-GT1 /DGPU N14P-GV 1 0Ohm +3VS_VGA 2 AM10 VGA_JTAG_TCK AP11 VGA_JTAG_TMS AM11 VGA_JTAG_TDI AP12 VGA_JTAG_TDO VGA_JTAG_TRST_N AN11 R7 R6 1 0Ohm /DGPU 2N7002 Q7402 1 VGA_THERMDP 1 1 1 1 1 3 /DGPU 1 /DGPU THERM_ALERT#_EC 12/19 Add R7461, R7462 reserved for protect battery(Eli) +3VS_VGA 28,30,49 28,30,49 1 1 T7422 T7423 T7424 T7425 T7426 2 T7421 THERMDN 4 2.2KOhm 2 2.2KOhm R7462 2 /DGPU AC_BATT# SMB1_CLK SMB1_DAT 3 2 K4 RN7423B RN7423A 1 VGA_THERMDN R2 R3 6 4 2 1 1 SMB_CLK_VGA SMB_DAT_VGA N14E-GL GPIO Definition VGA_OVERTEMP# 3 T7420 I2CB_SCL I2CB_SDA 3 G I2CC_SCL I2CC_SDA B T4 T3 @ B build D Q7405A UM6K1N /DGPU 11/19 MISC1 I2CS_SCL I2CS_SDA 1 0OhmVGA_THERM_ALERT#_Q S 2 R7461 2 VGA_THERM_ALERT# +3VS_VGA R7442 2.2KOhm /DGPU Q7403 2N7002 /DGPU D 2 S VGA_OVERTEMP#_R U7001Q 70,74 2 4 +3VS_VGA D Resistor Values N14P-GT1 /DGPU R7441 2.2KOhm /DGPU 0001 10.0K VRAM CFG--ROM_SI 1 VGA_ROM_CS_R ROM_SO VGA_WP# 0000 N14P-GV +3VS_VGA 2 2 2 U7402 1 VCC 2 CE# HOLD# 3 SO SCK 4 WP# GND SIO Pull-down to GND 1000 N14E-GL 2 D +3VS_VGA 1 1 +3VS_VGA Pull-up to VDD33 4.99K A 1 R7423 10KOhm @ 1 R7421 10KOhm /DGPU 6 Q7401B UM6K1N @ 5 Q7401A UM6K1N @ 2 Title : N14xxx_GPIO,STRAP AC_IN_OC 30,88,90 PEGATRON COMPUTER INC 1 4 3 AC_BATT# Size A2 Date: 5 4 3 2 Project Name Engineer: Panda_Wang Rev VA70_HW P/N Friday, January 18, 2013 1 Sheet 1.3 74 of 99 5 4 3 2 1 +3VS_VGA +1.35VS_VGA +VGA_VCORE +3VS_VGA 63,70,71,72,74,87,91 +1.35VS_VGA 63,71,76,77,78,79,84 +VGA_VCORE 63,87 +VGA_VCORE U7001E +3VS_VGA 85mA AG11 0.1UF/16V /DGPU 2 2 C7524 4.7UF/6.3V /DGPU C7530 4.7UF/6.3V /DGPU NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9 NC10 NC11 NC13 NC14 3V3MISC_1 3V3MISC_2 VDD33_1 VDD33_2 0.1UF/16V /DGPU 0.1UF/16V /DGPU 0.1UF/16V /DGPU 2 1 1 1 1 J8 K8 L8 M8 C7502 1UF/6.3V /DGPU XVDD 1 0Ohm C7503 EGL floating 4.7UF/6.3V /DGPU PGV NC 10/19 XVDD Place near BGA GND Place near BALLs CONFIGURABLE POWER CHANNELS XVDD_1 XVDD_2 XVDD_3 XVDD_4 XVDD_5 XVDD_6 XVDD_7 XVDD_8 1 N14P-GT1 /DGPU XVDD_9 XVDD_10 XVDD_11 XVDD_12 XVDD_13 XVDD_14 XVDD_15 XVDD_16 1 C7552 22UF/6.3V /DGPU 2 1 C7534 4.7UF/6.3V /DGPU 2 1 C7535 4.7UF/6.3V /DGPU 2 1 C7533 4.7UF/6.3V /DGPU 2 1 C7532 4.7UF/6.3V /DGPU 2 1 2 2 1 GND C7531 4.7UF/6.3V /DGPU C7553 47UF/4V @ CE7501 330UF/2V /DGPU XVDD_17 XVDD_18 XVDD_19 XVDD_20 XVDD_21 XVDD_22 1 C7570 22UF/6.3V @ 2 1 C7569 22UF/6.3V @ 2 1 C7568 22UF/6.3V @ 2 1 C7567 22UF/6.3V @ 2 1 C7566 22UF/6.3V @ 2 1 2 1 GND C7547 4.7UF/6.3V @ D U7001H GND C7537 4.7UF/6.3V /DGPU 2 C7536 4.7UF/6.3V /DGPU 1 1 1 2 1 C7529 4.7UF/6.3V /DGPU C7523 4.7UF/6.3V /DGPU 2 1 2 1 C7528 4.7UF/6.3V /DGPU C7522 4.7UF/6.3V /DGPU AC6 AJ28 AJ4 AJ5 AL11 C15 D19 D20 D23 D26 H31 T8 V32 C7504 1 C7516 C7501 2 0.1UF/16V /DGPU C7507 2 C7517 2 0.1UF/16V /DGPU 2 C7514 1 1 1 0.1UF/16V /DGPU 2 1 C7515 2 1 2 1 C7527 4.7UF/6.3V /DGPU C7521 4.7UF/6.3V /DGPU 2 1 2 1 C7526 4.7UF/6.3V /DGPU C7520 4.7UF/6.3V /DGPU 2 1 2 1 C7525 4.7UF/6.3V /DGPU C7519 4.7UF/6.3V /DGPU 2 1 2 1 2 C7518 4.7UF/6.3V /DGPU C7571 22UF/6.3V @ U1 U2 U3 U4 U5 U6 U7 U8 V1 V2 V3 V4 V5 V6 V7 V8 W2 W3 W4 W5 W7 W8 C XVDD_23 XVDD_24 XVDD_25 XVDD_26 XVDD_27 XVDD_28 XVDD_29 XVDD_30 GND PLACE NEAR GPU +1.35VS_VGA +1.35VS_VGA U7001G GND34 GND36 T28 T32 T5 T7 U12 U14 U16 U19 U21 U23 V12 V14 V16 V19 V21 V23 W13 W15 W17 W18 W20 W22 W28 Y12 Y14 Y16 Y19 Y21 Y23 AH11 GND GND_OPT1 GND_OPT2 C16 W32 4.7UF/6.3V /DGPU C7554 10UF/6.3V /DGPU 1 C7555 2 4.7UF/6.3V /DGPU 1 2 C7574 2 1UF/6.3V /DGPU 2 C7538 1 1UF/6.3V /DGPU 1 C7544 1 0.1UF/16V /DGPU 2 1 C7559 2 0.1UF/16V /DGPU 1 C7539 2 2 1 FBVDDQ1 FBVDDQ2 FBVDDQ3 FBVDDQ4 FBVDDQ5 FBVDDQ6 FBVDDQ7 FBVDDQ8 FBVDDQ9 FBVDDQ10 FBVDDQ11 FBVDDQ12 FBVDDQ13 FBVDDQ14 FBVDDQ15 FBVDDQ16 FBVDDQ17 FBVDDQ18 FBVDDQ19 FBVDDQ20 FBVDDQ21 FBVDDQ22 FBVDDQ23 FBVDDQ24 FBVDDQ25 FBVDDQ26 FBVDDQ27 FBVDDQ28 FBVDDQ29 FBVDDQ30 FBVDDQ31 FBVDDQ32 FBVDDQ33 FBVDDQ34 FBVDDQ35 FBVDDQ36 FBVDDQ37 FBVDDQ38 FBVDDQ39 FBVDDQ40 FBVDDQ41 FBVDDQ42 FBVDDQ43 FBVDDQ44 C7541 22UF/6.3V /DGPU 4.7UF/6.3V /DGPU C7550 10UF/6.3V /DGPU 1 C7562 2 4.7UF/6.3V /DGPU 1 2 C7575 2 1UF/6.3V /DGPU 2 C7560 1 1UF/6.3V /DGPU 1 C7545 1 0.1UF/16V /DGPU 2 1 1 C7556 2 0.1UF/16V /DGPU 2 1 C7551 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 AA1 AA2 AA3 AA4 AA5 AA6 AA7 AA8 N14P-GT1 /DGPU GND 2 C7557 22UF/6.3V /DGPU GND C7563 @ 0.1UF/16V Place Under to BGA C7564 @ 0.1UF/16V 1 Place Close to BALLs 1 AA27 AA30 AB27 AB33 AC27 AD27 AE27 AF27 AG27 B13 B16 B19 E13 E16 E19 H10 H11 H12 H13 H14 H15 H16 H18 H19 H20 H21 H22 H23 H24 H8 H9 L27 M27 N27 P27 R27 T27 T30 T33 V27 W27 W30 W33 Y27 1 GND73 GND74 GND75 GND76 GND77 GND78 GND79 GND80 GND81 GND82 GND83 GND84 GND85 GND86 GND87 GND88 GND89 GND90 GND91 GND92 GND93 GND94 GND95 GND96 GND97 GND98 GND99 GND100 GND101 GND102 GND103 GND104 GND105 GND106 GND107 GND108 GND109 GND110 GND111 GND112 GND113 GND114 GND115 GND116 GND117 GND118 GND119 GND120 GND121 GND122 GND123 GND124 GND125 GND126 GND127 GND128 GND129 GND130 GND131 GND132 GND133 GND134 GND135 GND136 GND137 GND138 GND139 GND140 GND141 GND142 2 GND172 GND173 GND174 GND175 GND176 GND177 GND178 GND179 GND180 GND181 GND182 GND183 GND184 GND185 GND186 GND187 GND188 GND189 GND190 GND191 GND192 GND193 GND194 GND195 GND196 GND197 GND198 GND199 GND200 GND1 GND5 GND6 GND7 GND8 GND9 GND10 GND11 GND12 GND13 GND14 GND2 GND15 GND16 GND17 GND18 GND19 GND20 GND21 GND22 GND23 GND24 GND3 GND25 GND26 GND27 GND28 GND29 GND30 GND31 GND32 GND33 GND35 GND4 GND37 GND38 GND39 GND40 GND41 GND42 GND43 GND44 GND45 GND46 GND47 GND48 GND49 GND50 GND51 GND52 GND53 GND54 GND55 GND56 GND57 GND58 GND59 GND60 GND61 GND62 GND63 GND64 GND65 GND66 GND67 GND68 GND69 GND70 GND71 GND72 15/19 FBVDDQ AM25 AN1 AN10 AN13 AN16 AN19 AN22 AN25 AN30 AN34 AN4 AN7 AP2 AP33 B1 B10 B22 B25 B28 B31 B34 B4 B7 C10 C13 C19 C22 C25 C28 C7 D2 D31 D33 E10 E22 E25 E5 E7 F28 F7 G10 G13 G16 G19 G2 G22 G25 G28 G3 G30 G32 G33 G5 G7 K2 K28 K30 K32 K33 K5 K7 M13 M15 M17 M18 M20 M22 N12 N14 N16 2 GND143 GND144 GND145 GND146 GND147 GND148 GND149 GND150 GND151 GND152 GND153 GND154 GND155 GND156 GND157 GND158 GND159 GND160 GND161 GND162 GND163 GND164 GND165 GND166 GND167 GND168 GND169 GND170 GND171 XVDD_31 XVDD_32 XVDD_33 XVDD_34 XVDD_35 XVDD_36 XVDD_37 XVDD_38 U7001D 16/19 GND_1/2 A2 AA17 AA18 AA20 AA22 AB12 AB14 AB16 AB19 AB2 AB21 A33 AB23 AB28 AB30 AB32 AB5 AB7 AC13 AC15 AC17 AC18 AA13 AC20 AC22 AE2 AE28 AE30 AE32 AE33 AE5 AE7 AH10 AA15 AH13 AH16 AH19 AH2 AH22 AH24 AH28 AH29 AH30 AH32 AH33 AH5 AH7 AJ7 AK10 AK7 AL12 AL14 AL15 AL17 AL18 AL2 AL20 AL21 AL23 AL24 AL26 AL28 AL30 AL32 AL33 AL5 AM13 AM16 AM19 AM22 17/19 GND_2/2 A 0.1UF/16V /DGPU GND U7001I N19 N2 N21 N23 N28 N30 N32 N33 N5 N7 P13 P15 P17 P18 P20 P22 R12 R14 R16 R19 R21 R23 T13 T15 T17 T18 T2 T20 T22 C7512 2 0.1UF/16V /DGPU N14P-GT1 /DGPU B 1 C7513 2 0.1UF/16V /DGPU 1 1 C7510 2 0.1UF/16V /DGPU 2 1 2 C7511 R7501 2 /DGPU +VDD33_GPU 2 C 18/19 NC/VDD33 2 D AA12 AA14 AA16 AA19 AA21 AA23 AB13 AB15 AB17 AB18 AB20 AB22 AC12 AC14 AC16 AC19 AC21 AC23 M12 M14 M16 M19 M21 M23 N13 N15 N17 N18 N20 N22 P12 P14 P16 P19 P21 P23 R13 R15 R17 R18 R20 R22 T12 T14 T16 T19 T21 T23 U13 U15 U17 U18 U20 U22 V13 V15 V17 V18 V20 V22 W12 W14 W16 W19 W21 W23 Y13 Y15 Y17 Y18 Y20 Y22 2 U7001F PLACE UNDER GPU VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 VDD19 VDD20 VDD21 VDD22 VDD23 VDD24 VDD25 VDD26 VDD27 VDD28 VDD29 VDD30 VDD31 VDD32 VDD33 VDD34 VDD35 VDD36 VDD37 VDD38 VDD39 VDD40 VDD41 VDD42 VDD43 VDD44 VDD45 VDD46 VDD47 VDD48 VDD49 VDD50 VDD51 VDD52 VDD53 VDD54 VDD55 VDD56 VDD57 VDD58 VDD59 VDD60 VDD61 VDD62 VDD63 VDD64 VDD65 VDD66 VDD67 VDD68 VDD69 VDD70 VDD71 VDD72 2 14/19 NVVDD Place Close to BGA B C7565 @ 0.1UF/16V GND Add C7563,C7564,C7565 (0.1uF) at +1.35VS_VGA (EMI Recommend) Check with NV T7508 FB_VDDQ_SENSE F1 FBVDDQ_SENSE 1 F2 FBVDDQ_GND_SENSE 1 J27 +FB_CAL_PD_VDDQ R7507 1 /DGPU 2 40.2Ohm 1% H27 +FB_CAL_PU_GND R7509 1 /DGPU 2 40.2Ohm 1% H25 +FB_CAL_TERM_GND R7510 /DGPU T7509 FB_GND_SENSE FB_CAL_PD_VDDQ FB_CAL_PU_GND FB_CAL_TERM_GND +1.35VS_VGA CALIBRATION PIN FB_CALx_PD_VDDQ 60.4Ohm FB_CALx_PU_GND GND N14P-GT1 /DGPU FB_CALx_TERM_GND DDR3 GDDR5 40 40.2 42.2 40.2 51.1 60.4 A Place Close to BALLs Title : N14xxx_Power,GND Optional CMD GNDs (2) NC for 4-Lyr cards GND GND N14P-GT1 /DGPU Size C Date: 5 4 Engineer: PEGATRON COMPUTER INC GND N14P-GT1 /DGPU 3 2 Project Name Panda_Wang Rev VA70_HW P/N Friday, January 18, 2013 Sheet 1 1.3 75 of 99 5 4 3 2 U7601A G3 L3 L12 G12 FBA_CMD12 FBA_CMD15 FBA_CMD5 FBA_CMD0 U7601B J4 FBA_CMD8 FBA_WCK23 FBA_WCK23# FBA_WCK23 FBA_WCK23# 1 R7601 1.33KOhm 1% /DGPU R7603 931OHM 1% /DGPU 71,76 71,76 GND FBA_CMD13 FBA_CMD14 J2 J3 J12 J11 FBA_CLK0 FBA_CLK0# GND EDC3 DBI3# P4 P5 R7645 40.2Ohm 1% /DGPU WCK23 WCK23# H5GQ2H24MFR-T2C /DGPU H5GQ2H24MFR-T2C /DGPU GND R7609 1KOhm 5% /DGPU GND A5 U5 C7603 0.01UF/50V 10% /DGPU CK CK# VPP/NC1 VPP/NC2 2 0.4 mm 2 G GND J13 GND R7608 121OHM 1% /DGPU GND 2 S J10 VREFC ZQ SEN 2 1 2 FBA_SEN0 1 D C7665 820PF/50V MLCC/+/-10% /DGPU 1 FBA_VREF_FET_L 3 R7605 1.33KOhm 1% /DGPU FBA_ZQ0 2 R7606 931OHM 1% /DGPU 1 1 C Q7601 2N7002 /DGPU 1 J14 FBA_VREFC0 2 1 R7604 549Ohm 1% /DGPU H5GQ2H24MFR-T2C /DGPU R7607 1KOhm 5% /DGPU J1 B10 B5 D10 G10 G5 H1 H14 K1 K14 L10 L5 P10 T10 T5 A1 A12 A14 A3 C1 C11 C12 C14 C3 C4 E1 E12 E14 E3 F10 F5 H13 H2 K13 K2 M10 M5 N1 N12 N14 N3 R1 R11 R12 R14 R3 R4 U1 U12 U14 U3 RESET# CKE# GND GPIO10_FBVREF_ALTV 63,71,75,77,78,79,84 +1.35VS_VGA A10/A0 A9/A1 BA0/A2 BA3/A3 BA2/A4 BA1/A5 A11/A6 A8/A7 A12/RFU/NC R7646 40.2Ohm 1% /DGPU +1.35VS_VGA 74,77,78,79 +1.35VS_VGA U7601D FBA_SOE0 ABI# 2 C7664 820PF/50V MLCC/+/-10% /DGPU 1 R2 P2 EDC1 DBI1# 71,76 71,76 2 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 2 U4 U2 T4 T2 N4 N2 M4 M2 GND WCK01 WCK01# FBA_VREFD_L 1 FBA_WCK01 FBA_WCK01# U10 H4 H5 H11 H10 K11 K10 K5 K4 J5 2 71,76 71,76 D4 D5 0.4 mm EDC2 DBI2# VREFD2 C7663 820PF/50V MLCC/+/-10% /DGPU R7602 549Ohm 1% /DGPU 1 C13 D13 FBA_WCK01 FBA_WCK01# DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 R13 P13 FBA_VREFD_L 2 A11 A13 B11 B13 E11 E13 F11 F13 FBA_EDC2 FBA_DBI2 +1.35VS_VGA FBA_CMD10 FBA_CMD11 FBA_CMD2 FBA_CMD1 FBA_CMD3 FBA_CMD4 FBA_CMD7 FBA_CMD6 FBA_CMD9 RAS# CAS# WE# CS# 2 A10 1 VREFD1 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 1 EDC0 DBI0# U11 U13 T11 T13 N11 N13 M11 M13 2 C2 D2 FBAD16 FBAD17 FBAD18 FBAD19 FBAD20 FBAD21 FBAD22 FBAD23 1 FBA_EDC0 FBA_DBI0 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 1 A4 A2 B4 B2 E4 E2 F4 F2 2 FBAD0 FBAD1 FBAD2 FBAD3 FBAD4 FBAD5 FBAD6 FBAD7 +1.35VS_VGA U7601C Byte 2 2 Byte 0 D 1 FBA-Lower Half FBAD[0..63] FBA_CMD[0..31] FBA_DBI[0..7] FBA_EDC[0..7] 1 71,77 71,77 71,77 71,77 MF VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 C10 C5 D11 G1 G11 G14 G4 L1 L11 L14 L4 P11 R10 R5 VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9 VSSQ10 VSSQ11 VSSQ12 VSSQ13 VSSQ14 VSSQ15 VSSQ16 VSSQ17 VSSQ18 VSSQ19 VSSQ20 VSSQ21 VSSQ22 VSSQ23 VSSQ24 VSSQ25 VSSQ26 VSSQ27 VSSQ28 VSSQ29 VSSQ30 VSSQ31 VSSQ32 VSSQ33 VSSQ34 VSSQ35 VSSQ36 D +1.35VS_VGA B1 B12 B14 B3 D1 D12 D14 D3 E10 E5 F1 F12 F14 F3 G13 G2 H12 H3 K12 K3 L13 L2 M1 M12 M14 M3 N10 N5 P1 P12 P14 P3 T1 T12 T14 T3 VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18 VDDQ19 VDDQ20 VDDQ21 VDDQ22 VDDQ23 VDDQ24 VDDQ25 VDDQ26 VDDQ27 VDDQ28 VDDQ29 VDDQ30 VDDQ31 VDDQ32 VDDQ33 VDDQ34 VDDQ35 VDDQ36 C H5GQ2H24MFR-T2C /DGPU GND GND GND VREFD1 A11 A13 B11 B13 E11 E13 F11 F13 C13 D13 A 71,76 71,76 FBA_WCK23 FBA_WCK23# FBA_WCK23 FBA_WCK23# D4 D5 R2 P2 71,76 71,76 FBA_WCK01 FBA_WCK01# P4 P5 U10 A5 U5 FBA_VREFD_L 0.4 mm DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 CK CK# VPP/NC1 VPP/NC2 0.4 mm EDC3 DBI3# FBA_VREFC0 J14 FBA_ZQ1 J13 WCK23 WCK23# FBA_SEN0 H5GQ2H24MFR-T2C /DGPU J10 VREFC ZQ R7613 121OHM 1% /DGPU SEN H5GQ2H24MFR-T2C /DGPU GND C7655 0.1UF/10V 10% @ C7660 0.1UF/10V 10% @ C7657 0.1UF/10V 10% @ C7658 0.1UF/10V 10% @ C7654 0.1UF/10V 10% @ 1 2 1 2 1 C7661 1UF/10V 10% /DGPU C7601 10UF/6.3V 10% /DGPU B 1 C7622 1UF/10V 10% /DGPU 2 1 2 C7621 1UF/10V 10% /DGPU C7602 10UF/6.3V 10% /DGPU C7653 0.1UF/10V 10% @ GND PLACE NEAR U7601/U7602 A H5GQ2H24MFR-T2C /DGPU Title : N14xxx_FBA LOWER Engineer: PEGATRON CORPORATION Date: 2 Panda Wang Project Name Rev VA70_HW C 3 1 C7620 0.1UF/10V 10% /DGPU 2 1 C7617 0.1UF/10V 10% /DGPU 2 1 C7618 0.1UF/10V 10% /DGPU 2 1 C7615 0.1UF/10V 10% /DGPU 2 1 2 C7614 0.1UF/10V 10% /DGPU Size 4 C7662 1UF/10V 10% /DGPU GND GND 5 2 1 2 1 2 1 2 1 2 1 2 B1 B12 B14 B3 D1 D12 D14 D3 E10 E5 F1 F12 F14 F3 G13 G2 H12 H3 K12 K3 L13 L2 M1 M12 M14 M3 N10 N5 P1 P12 P14 P3 T1 T12 T14 T3 1 RESET# CKE# C7656 0.1UF/10V 10% /DGPU GND 1 J12 J11 FBA_CLK0 FBA_CLK0# 1 FBA_WCK01 FBA_WCK01# EDC2 DBI2# VREFD2 U4 U2 T4 T2 N4 N2 M4 M2 EDC1 DBI1# WCK01 WCK01# 71,76 71,76 C7659 0.1UF/10V 10% /DGPU +1.35VS_VGA 1 R13 P13 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 H5GQ2H24MFR-T2C /DGPU GND FBA_EDC1 FBA_DBI1 FBA_VREFD_L DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 C7616 0.1UF/10V 10% /DGPU 2 A10 U11 U13 T11 T13 N11 N13 M11 M13 C7623 0.1UF/10V 10% /DGPU 2 EDC0 DBI0# FBAD8 FBAD9 FBAD10 FBAD11 FBAD12 FBAD13 FBAD14 FBAD15 VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18 VDDQ19 VDDQ20 VDDQ21 VDDQ22 VDDQ23 VDDQ24 VDDQ25 VDDQ26 VDDQ27 VDDQ28 VDDQ29 VDDQ30 VDDQ31 VDDQ32 VDDQ33 VDDQ34 VDDQ35 VDDQ36 C7619 0.1UF/10V 10% /DGPU 2 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 J2 J3 VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9 VSSQ10 VSSQ11 VSSQ12 VSSQ13 VSSQ14 VSSQ15 VSSQ16 VSSQ17 VSSQ18 VSSQ19 VSSQ20 VSSQ21 VSSQ22 VSSQ23 VSSQ24 VSSQ25 VSSQ26 VSSQ27 VSSQ28 VSSQ29 VSSQ30 VSSQ31 VSSQ32 VSSQ33 VSSQ34 VSSQ35 VSSQ36 +1.35VS_VGA 1 C2 D2 A1 A12 A14 A3 C1 C11 C12 C14 C3 C4 E1 E12 E14 E3 F10 F5 H13 H2 K13 K2 M10 M5 N1 N12 N14 N3 R1 R11 R12 R14 R3 R4 U1 U12 U14 U3 C10 C5 D11 G1 G11 G14 G4 L1 L11 L14 L4 P11 R10 R5 2 FBA_EDC3 FBA_DBI3 A8/A7 A11/A6 BA2/A4 BA1/A5 BA0/A2 BA3/A3 A9/A1 A10/A0 A12/RFU 2 A4 A2 B4 B2 E4 E2 F4 F2 ABI# U7602B FBA_CMD13 FBA_CMD14 FBAD24 FBAD25 FBAD26 FBAD27 FBAD28 FBAD29 FBAD30 FBAD31 A10/A0 A9/A1 BA0/A2 BA3/A3 BA2/A4 BA1/A5 A11/A6 A8/A7 A12/RFU/NC VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 1 Byte 1 U7602A ABI# +1.35VS_VGA MF VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 2 Byte 3 H4 H5 H11 H10 K11 K10 K5 K4 J5 U7602D FBA_SOE1 J1 B10 B5 D10 G10 G5 H1 H14 K1 K14 L10 L5 P10 T10 T5 1 FBA_CMD6 FBA_CMD7 FBA_CMD3 FBA_CMD4 FBA_CMD2 FBA_CMD1 FBA_CMD11 FBA_CMD10 FBA_CMD9 RAS# CAS# WE# CS# 2 J4 FBA_CMD8 B G3 L3 L12 G12 R7610 1KOhm 5% /DGPU 1 FBA_CMD15 FBA_CMD12 FBA_CMD0 FBA_CMD5 Mirrored CAS# RAS# CS# WE# 1 U7602C 2 2 +1.35VS_VGA Friday, January 18, 2013 Sheet 1 1.3 76 of 99 3 FBA_CMD29 FBA_CMD30 J2 J3 J12 J11 1 1 1 R7712 40.2Ohm 1% /DGPU 2 WCK23 WCK23# +1.35VS_VGA A10/A0 A9/A1 BA0/A2 BA3/A3 BA2/A4 BA1/A5 A11/A6 A8/A7 A12/RFU/NC R7705 1KOhm 5% /DGPU GND CK CK# R7713 40.2Ohm 1% /DGPU C7701 0.01UF/50V 10% /DGPU A5 U5 VPP/NC1 VPP/NC2 FBA_VREF_FET_H 3 Q7701 2N7002 /DGPU 1 GPIO10_FBVREF_ALTV 1 R7706 1.33KOhm 1% /DGPU J14 GND D FBA_SEN2 GND R7708 121OHM 1% /DGPU GND G J13 FBA_ZQ2 C7720 820PF/50V MLCC/+/-10% /DGPU J10 VREFC ZQ SEN 2 R7707 931OHM 1% /DGPU 2 C 0.4 mm FBA_VREFC1 2 1 GND R7710 1KOhm 5% /DGPU J1 B10 B5 D10 G10 G5 H1 H14 K1 K14 L10 L5 P10 T10 T5 MF VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 A1 A12 A14 A3 C1 C11 C12 C14 C3 C4 E1 E12 E14 E3 F10 F5 H13 H2 K13 K2 M10 M5 N1 N12 N14 N3 R1 R11 R12 R14 R3 R4 U1 U12 U14 U3 RESET# CKE# GND R7704 549Ohm 1% /DGPU 63,71,75,76,78,79,84 +1.35VS_VGA ABI# 2 2 FBA_CLK1 FBA_CLK1# GND H5GQ2H24MFR-T2C /DGPU 74,76,78,79 H4 H5 H11 H10 K11 K10 K5 K4 J5 1 71,77 71,77 R7702 931OHM 1% /DGPU 1 H5GQ2H24MFR-T2C /DGPU GND R7709 1.33KOhm 1% /DGPU 1 FBA_WCK67 FBA_WCK67# FBA_CMD26 FBA_CMD27 FBA_CMD18 FBA_CMD17 FBA_CMD19 FBA_CMD20 FBA_CMD23 FBA_CMD22 FBA_CMD25 EDC3 DBI3# P4 P5 FBA_WCK67 FBA_WCK67# C7723 820PF/50V MLCC/+/-10% /DGPU +1.35VS_VGA U7701D FBA_SOE2 2 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 R2 P2 EDC1 DBI1# 71,77 71,77 FBA_VREFD_H 2 2 U4 U2 T4 T2 N4 N2 M4 M2 GND WCK01 WCK01# U10 2 FBA_WCK45 FBA_WCK45# D4 D5 VREFD2 C7716 820PF/50V MLCC/+/-10% /DGPU R7701 549Ohm 1% /DGPU 0.4 mm EDC2 DBI2# 1 71,77 71,77 FBA_WCK45 FBA_WCK45# DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 +1.35VS_VGA J4 RAS# CAS# WE# CS# 2 1 C13 D13 R13 P13 A10 FBA_VREFD_H VREFD1 A11 A13 B11 B13 E11 E13 F11 F13 FBA_EDC6 FBA_DBI6 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 FBA_CMD24 2 EDC0 DBI0# U11 U13 T11 T13 N11 N13 M11 M13 2 C2 D2 FBAD48 FBAD49 FBAD50 FBAD51 FBAD52 FBAD53 FBAD54 FBAD55 1 FBA_EDC4 FBA_DBI4 U7701B DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 1 A4 A2 B4 B2 E4 E2 F4 F2 1 U7701A FBAD32 FBAD33 FBAD34 FBAD35 FBAD36 FBAD37 FBAD38 FBAD39 +1.35VS_VGA G3 L3 L12 G12 2 Byte 6 1 U7701C FBA_CMD28 FBA_CMD31 FBA_CMD21 FBA_CMD16 1 Byte 4 D 2 FBA-Upper Half FBAD[0..63] FBA_CMD[0..31] FBA_DBI[0..7] FBA_EDC[0..7] 2 71,76 71,76 71,76 71,76 4 1 5 H5GQ2H24MFR-T2C /DGPU VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9 VSSQ10 VSSQ11 VSSQ12 VSSQ13 VSSQ14 VSSQ15 VSSQ16 VSSQ17 VSSQ18 VSSQ19 VSSQ20 VSSQ21 VSSQ22 VSSQ23 VSSQ24 VSSQ25 VSSQ26 VSSQ27 VSSQ28 VSSQ29 VSSQ30 VSSQ31 VSSQ32 VSSQ33 VSSQ34 VSSQ35 VSSQ36 VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18 VDDQ19 VDDQ20 VDDQ21 VDDQ22 VDDQ23 VDDQ24 VDDQ25 VDDQ26 VDDQ27 VDDQ28 VDDQ29 VDDQ30 VDDQ31 VDDQ32 VDDQ33 VDDQ34 VDDQ35 VDDQ36 C10 C5 D11 G1 G11 G14 G4 L1 L11 L14 L4 P11 R10 R5 D +1.35VS_VGA B1 B12 B14 B3 D1 D12 D14 D3 E10 E5 F1 F12 F14 F3 G13 G2 H12 H3 K12 K3 L13 L2 M1 M12 M14 M3 N10 N5 P1 P12 P14 P3 T1 T12 T14 T3 C H5GQ2H24MFR-T2C /DGPU GND GND 2 S VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 GND 2 +1.35VS_VGA C13 D13 A 71,77 71,77 FBA_WCK67 FBA_WCK67# FBA_WCK67 FBA_WCK67# D4 D5 R2 P2 EDC1 DBI1# FBA_WCK45 FBA_WCK45# H5GQ2H24MFR-T2C /DGPU FBA_WCK45 FBA_WCK45# P4 P5 EDC3 DBI3# WCK23 WCK23# 0.4 mm FBA_VREFC1 J14 FBA_ZQ3 J13 H5GQ2H24MFR-T2C /DGPU J10 VREFC ZQ SEN 2 FBA_SEN2 1 GND R7703 121OHM 1% /DGPU H5GQ2H24MFR-T2C /DGPU GND C7724 0.1UF/10V 10% @ C7717 0.1UF/10V 10% @ C7726 0.1UF/10V 10% @ 1 2 1 2 1 2 1 2 1 1 C7718 1UF/10V 10% /DGPU 2 1 C7719 1UF/10V 10% /DGPU 2 1 C7725 0.1UF/10V 10% /DGPU 2 1 2 1 2 C7715 0.1UF/10V 10% /DGPU C7714 0.1UF/10V 10% @ C7722 0.1UF/10V 10% @ C7702 10UF/6.3V 10% /DGPU C7703 10UF/6.3V 10% /DGPU C7721 0.1UF/10V 10% @ GND A Title : N14xxx_FBA UPPER Engineer: PEGATRON CORPORATION H5GQ2H24MFR-T2C /DGPU Size 2 PANDA WANG Project Name Rev VA70_HW C 3 C7712 1UF/10V 10% /DGPU PLACE NEAR U7701/U7702 Date: 4 C7704 1UF/10V 10% /DGPU GND GND 5 2 1 1 2 1 2 2 1 C7706 0.1UF/10V 10% /DGPU 1 VPP/NC1 VPP/NC2 C7711 0.1UF/10V 10% /DGPU 2 A5 U5 C7709 0.1UF/10V 10% /DGPU 1 0.4 mm C7707 0.1UF/10V 10% /DGPU 2 U10 FBA_VREFD_H DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 C7705 0.1UF/10V 10% /DGPU GND 2 CK CK# C7713 0.1UF/10V 10% /DGPU 1 VREFD2 U4 U2 T4 T2 N4 N2 M4 M2 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 WCK01 71,77 WCK01# 71,77 EDC2 DBI2# RESET# CKE# C7708 0.1UF/10V 10% /DGPU +1.35VS_VGA B1 B12 B14 B3 D1 D12 D14 D3 E10 E5 F1 F12 F14 F3 G13 G2 H12 H3 K12 K3 L13 L2 M1 M12 M14 M3 N10 N5 P1 P12 P14 P3 T1 T12 T14 T3 1 R13 P13 FBA_CLK1 FBA_CLK1# VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18 VDDQ19 VDDQ20 VDDQ21 VDDQ22 VDDQ23 VDDQ24 VDDQ25 VDDQ26 VDDQ27 VDDQ28 VDDQ29 VDDQ30 VDDQ31 VDDQ32 VDDQ33 VDDQ34 VDDQ35 VDDQ36 C7710 0.1UF/10V 10% /DGPU 2 A11 A13 B11 B13 E11 E13 F11 F13 FBA_EDC5 FBA_DBI5 A10 FBA_VREFD_H 71,77 71,77 J2 J3 J12 J11 VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9 VSSQ10 VSSQ11 VSSQ12 VSSQ13 VSSQ14 VSSQ15 VSSQ16 VSSQ17 VSSQ18 VSSQ19 VSSQ20 VSSQ21 VSSQ22 VSSQ23 VSSQ24 VSSQ25 VSSQ26 VSSQ27 VSSQ28 VSSQ29 VSSQ30 VSSQ31 VSSQ32 VSSQ33 VSSQ34 VSSQ35 VSSQ36 B 1 VREFD1 FBA_CMD29 FBA_CMD30 A1 A12 A14 A3 C1 C11 C12 C14 C3 C4 E1 E12 E14 E3 F10 F5 H13 H2 K13 K2 M10 M5 N1 N12 N14 N3 R1 R11 R12 R14 R3 R4 U1 U12 U14 U3 +1.35VS_VGA 2 EDC0 DBI0# DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 A8/A7 A11/A6 BA2/A4 BA1/A5 BA0/A2 BA3/A3 A9/A1 A10/A0 A12/RFU C10 C5 D11 G1 G11 G14 G4 L1 L11 L14 L4 P11 R10 R5 2 C2 D2 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 U11 U13 T11 T13 N11 N13 M11 M13 ABI# VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 1 FBA_EDC7 FBA_DBI7 U7702B FBAD40 FBAD41 FBAD42 FBAD43 FBAD44 FBAD45 FBAD46 FBAD47 A10/A0 A9/A1 BA0/A2 BA3/A3 BA2/A4 BA1/A5 A11/A6 A8/A7 A12/RFU/NC +1.35VS_VGA MF VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 2 A4 A2 B4 B2 E4 E2 F4 F2 ABI# U7702D J1 B10 B5 D10 G10 G5 H1 H14 K1 K14 L10 L5 P10 T10 T5 1 U7702A FBAD56 FBAD57 FBAD58 FBAD59 FBAD60 FBAD61 FBAD62 FBAD63 H4 H5 H11 H10 K11 K10 K5 K4 J5 R7711 1KOhm 5% /DGPU FBA_SOE3 2 Byte 5 J4 FBA_CMD22 FBA_CMD23 FBA_CMD19 FBA_CMD20 FBA_CMD18 FBA_CMD17 FBA_CMD27 FBA_CMD26 FBA_CMD25 Mirrored CAS# RAS# CS# WE# 1 Byte 7 FBA_CMD24 RAS# CAS# WE# CS# 2 B G3 L3 L12 G12 1 U7702C FBA_CMD31 FBA_CMD28 FBA_CMD16 FBA_CMD21 Friday, January 18, 2013 Sheet 1 1.3 77 of 99 5 4 3 2 Byte 2 2 63,71,75,76,77,79,84 +1.35VS_VGA GND 1 G 2 RESET# CKE# R7807 931OHM 1% /EGL D R7806 1.33KOhm 1% /EGL J14 GND J13 FBB_ZQ0 C7825 820PF/50V MLCC/+/-10% /EGL GND 2 S FBB_SEN0 R7808 121OHM 1% /EGL J10 CK CK# VPP/NC1 VPP/NC2 VREFC ZQ SEN GND GND H5GQ2H24MFR-T2C /EGL R7810 1KOhm 5% /EGL MF VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 A1 A12 A14 A3 C1 C11 C12 C14 C3 C4 E1 E12 E14 E3 F10 F5 H13 H2 K13 K2 M10 M5 N1 N12 N14 N3 R1 R11 R12 R14 R3 R4 U1 U12 U14 U3 0.4 mm FBB_VREFC0 FBB_VREF_FET_L Q7801 2N7002 /EGL 1 A5 U5 C7801 0.01UF/50V 10% /EGL 1 GND C GPIO10_FBVREF_ALTV GND R7804 549Ohm 1% /EGL 2 WCK23 WCK23# H5GQ2H24MFR-T2C /EGL 74,76,77,79 R7805 1KOhm 5% /EGL GND EDC3 DBI3# 3 +1.35VS_VGA J1 B10 B5 D10 G10 G5 H1 H14 K1 K14 L10 L5 P10 T10 T5 FBB_SOE0 A10/A0 A9/A1 BA0/A2 BA3/A3 BA2/A4 BA1/A5 A11/A6 A8/A7 A12/RFU/NC R7813 40.2Ohm 1% /EGL 1 GND J2 J3 U7801D ABI# 2 2 1 R7802 931OHM 1% /EGL 1 2 1 R7809 1.33KOhm 1% /EGL 1 P4 P5 FBB_WCK23 FBB_WCK23# FBB_WCK23 FBB_WCK23# C7826 820PF/50V MLCC/+/-10% /EGL 2 71,78 71,78 H5GQ2H24MFR-T2C /EGL R7812 40.2Ohm 1% /EGL 2 R2 P2 EDC1 DBI1# DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 2 2 GND WCK01 WCK01# FBB_VREFD_L FBB_CLK0 FBB_CLK0# 1 D4 D5 U4 U2 T4 T2 N4 N2 M4 M2 H4 H5 H11 H10 K11 K10 K5 K4 J5 J12 J11 1 FBB_WCK01 FBB_WCK01# U10 VREFD2 C7824 820PF/50V MLCC/+/-10% /EGL 71,78 71,78 R7801 549Ohm 1% /EGL 0.4 mm EDC2 DBI2# 1 FBB_VREFD_L FBB_CMD13 FBB_CMD14 2 C13 D13 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 R13 P13 +1.35VS_VGA 2 A10 1 VREFD1 A11 A13 B11 B13 E11 E13 F11 F13 FBB_EDC2 FBB_DBI2 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 2 EDC0 DBI0# U11 U13 T11 T13 N11 N13 M11 M13 1 C2 D2 FBBD16 FBBD17 FBBD18 FBBD19 FBBD20 FBBD21 FBBD22 FBBD23 1 FBB_EDC0 FBB_DBI0 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 2 A4 A2 B4 B2 E4 E2 F4 F2 U7801B 1 U7801A FBBD0 FBBD1 FBBD2 FBBD3 FBBD4 FBBD5 FBBD6 FBBD7 FBB_CMD10 FBB_CMD11 FBB_CMD2 FBB_CMD1 FBB_CMD3 FBB_CMD4 FBB_CMD7 FBB_CMD6 FBB_CMD9 RAS# CAS# WE# CS# 2 Byte 0 D G3 L3 L12 G12 J4 FBB_CMD8 FBB_WCK01 FBB_WCK01# +1.35VS_VGA U7801C FBB_CMD12 FBB_CMD15 FBB_CMD5 FBB_CMD0 71,78 71,78 1 +1.35VS_VGA FBBD[0..63] FBB_CMD[0..31] FBB_DBI[0..7] FBB_EDC[0..7] 1 71,79 71,79 71,79 71,79 VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9 VSSQ10 VSSQ11 VSSQ12 VSSQ13 VSSQ14 VSSQ15 VSSQ16 VSSQ17 VSSQ18 VSSQ19 VSSQ20 VSSQ21 VSSQ22 VSSQ23 VSSQ24 VSSQ25 VSSQ26 VSSQ27 VSSQ28 VSSQ29 VSSQ30 VSSQ31 VSSQ32 VSSQ33 VSSQ34 VSSQ35 VSSQ36 VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18 VDDQ19 VDDQ20 VDDQ21 VDDQ22 VDDQ23 VDDQ24 VDDQ25 VDDQ26 VDDQ27 VDDQ28 VDDQ29 VDDQ30 VDDQ31 VDDQ32 VDDQ33 VDDQ34 VDDQ35 VDDQ36 C10 C5 D11 G1 G11 G14 G4 L1 L11 L14 L4 P11 R10 R5 D +1.35VS_VGA B1 B12 B14 B3 D1 D12 D14 D3 E10 E5 F1 F12 F14 F3 G13 G2 H12 H3 K12 K3 L13 L2 M1 M12 M14 M3 N10 N5 P1 P12 P14 P3 T1 T12 T14 T3 C H5GQ2H24MFR-T2C /EGL GND GND VREFD1 A11 A13 B11 B13 E11 E13 F11 F13 A C13 D13 71,78 71,78 FBB_WCK23 FBB_WCK23# FBB_WCK23 FBB_WCK23# D4 D5 A10 FBB_VREFD_L VREFD2 U4 U2 T4 T2 N4 N2 M4 M2 R2 P2 EDC1 DBI1# 71,78 71,78 H5GQ2H24MFR-T2C /EGL FBB_WCK01 FBB_WCK01# EDC2 DBI2# FBB_WCK01 FBB_WCK01# P4 P5 U10 FBB_VREFD_L 0.4 mm A5 U5 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 EDC3 DBI3# VPP/NC1 VPP/NC2 0.4 mm WCK23 WCK23# H5GQ2H24MFR-T2C /EGL CK CK# FBB_VREFC0 J14 FBB_ZQ1 J13 FBB_SEN0 1 GND R7803 121OHM 1% /EGL J10 VREFC ZQ 1 C7811 1UF/10V 10% /EGL 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 C7804 1UF/10V 10% /EGL C7802 10UF/6.3V 10% /EGL B GND 1 C7817 1UF/10V 10% /EGL 2 1 C7818 1UF/10V 10% /EGL 2 1 C7822 0.1UF/10V 10% /EGL 2 1 C7816 0.1UF/10V 10% /EGL 2 1 C7806 0.1UF/10V 10% /EGL 2 1 C7809 0.1UF/10V 10% /EGL 2 2 C7807 0.1UF/10V 10% /EGL 1 +1.35VS_VGA C7803 10UF/6.3V 10% /EGL GND C7821 0.1UF/10V 10% @ C7815 0.1UF/10V 10% @ C7823 0.1UF/10V 10% @ C7814 0.1UF/10V 10% @ C7820 0.1UF/10V 10% @ C7819 0.1UF/10V 10% @ GND PLACE NEAR U7801/U7802 A SEN H5GQ2H24MFR-T2C /EGL GND H5GQ2H24MFR-T2C /EGL Title : N14xxx_FBB LOWER PEGATRON CORPORATION Size GND C7812 0.1UF/10V 10% /EGL 1 FBB_CLK0 FBB_CLK0# RESET# CKE# C7805 0.1UF/10V 10% /EGL 2 R13 P13 71,78 71,78 J2 J3 J12 J11 B1 B12 B14 B3 D1 D12 D14 D3 E10 E5 F1 F12 F14 F3 G13 G2 H12 H3 K12 K3 L13 L2 M1 M12 M14 M3 N10 N5 P1 P12 P14 P3 T1 T12 T14 T3 C7813 0.1UF/10V 10% /EGL 1 FBB_EDC1 FBB_DBI1 FBB_CMD13 FBB_CMD14 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18 VDDQ19 VDDQ20 VDDQ21 VDDQ22 VDDQ23 VDDQ24 VDDQ25 VDDQ26 VDDQ27 VDDQ28 VDDQ29 VDDQ30 VDDQ31 VDDQ32 VDDQ33 VDDQ34 VDDQ35 VDDQ36 C7808 0.1UF/10V 10% /EGL 2 U11 U13 T11 T13 N11 N13 M11 M13 VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9 VSSQ10 VSSQ11 VSSQ12 VSSQ13 VSSQ14 VSSQ15 VSSQ16 VSSQ17 VSSQ18 VSSQ19 VSSQ20 VSSQ21 VSSQ22 VSSQ23 VSSQ24 VSSQ25 VSSQ26 VSSQ27 VSSQ28 VSSQ29 VSSQ30 VSSQ31 VSSQ32 VSSQ33 VSSQ34 VSSQ35 VSSQ36 C7810 0.1UF/10V 10% /EGL 1 FBBD8 FBBD9 FBBD10 FBBD11 FBBD12 FBBD13 FBBD14 FBBD15 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 WCK01 WCK01# A1 A12 A14 A3 C1 C11 C12 C14 C3 C4 E1 E12 E14 E3 F10 F5 H13 H2 K13 K2 M10 M5 N1 N12 N14 N3 R1 R11 R12 R14 R3 R4 U1 U12 U14 U3 U7802B DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 EDC0 DBI0# A8/A7 A11/A6 BA2/A4 BA1/A5 BA0/A2 BA3/A3 A9/A1 A10/A0 A12/RFU +1.35VS_VGA 2 C2 D2 ABI# C10 C5 D11 G1 G11 G14 G4 L1 L11 L14 L4 P11 R10 R5 1 FBB_EDC3 FBB_DBI3 A10/A0 A9/A1 BA0/A2 BA3/A3 BA2/A4 BA1/A5 A11/A6 A8/A7 A12/RFU/NC VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 2 A4 A2 B4 B2 E4 E2 F4 F2 2 U7802A FBBD24 FBBD25 FBBD26 FBBD27 FBBD28 FBBD29 FBBD30 FBBD31 ABI# MF VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 1 Byte 1 H4 H5 H11 H10 K11 K10 K5 K4 J5 +1.35VS_VGA Mirrored CAS# RAS# CS# WE# 2 Byte 3 FBB_CMD6 FBB_CMD7 FBB_CMD3 FBB_CMD4 FBB_CMD2 FBB_CMD1 FBB_CMD11 FBB_CMD10 FBB_CMD9 RAS# CAS# WE# CS# 1 J4 FBB_CMD8 B G3 L3 L12 G12 J1 B10 B5 D10 G10 G5 H1 H14 K1 K14 L10 L5 P10 T10 T5 2 FBB_CMD15 FBB_CMD12 FBB_CMD0 FBB_CMD5 U7802D FBB_SOE1 1 U7802C R7811 1KOhm 5% /EGL 2 1 2 +1.35VS_VGA PANDA WANG Project Name Rev VA70_HW C Date: Engineer: Friday, January 18, 2013 Sheet 1.3 78 of 99 5 4 3 2 FBBD[0..63] FBB_CMD[0..31] FBB_DBI[0..7] FBB_EDC[0..7] Byte 4 Byte 6 63,71,75,76,77,78,84 H5GQ2H24MFR-T2C /EGL 2 +1.35VS_VGA GND WCK23 WCK23# 2 R7905 1KOhm 5% /EGL GND RESET# CKE# C7903 0.01UF/50V 10% /EGL A5 U5 CK CK# VPP/NC1 VPP/NC2 GND 0.4 mm R7908 931OHM 1% /EGL 1 FBB_VREF_FET_H J14 FBB_VREFC1 R7906 1.33KOhm 1% /EGL FBB_SEN2 GND G D GND GND 1 3 Q7901 2N7002 /EGL 1 J13 FBB_ZQ2 C7902 820PF/50V MLCC/+/-10% /EGL R7909 121OHM 1% /EGL GND 2 S J10 R7912 1KOhm 5% /EGL J1 B10 B5 D10 G10 G5 H1 H14 K1 K14 L10 L5 P10 T10 T5 MF VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 A1 A12 A14 A3 C1 C11 C12 C14 C3 C4 E1 E12 E14 E3 F10 F5 H13 H2 K13 K2 M10 M5 N1 N12 N14 N3 R1 R11 R12 R14 R3 R4 U1 U12 U14 U3 R7904 549Ohm 1% /EGL C GPIO10_FBVREF_ALTV +1.35VS_VGA FBB_SOE2 A10/A0 A9/A1 BA0/A2 BA3/A3 BA2/A4 BA1/A5 A11/A6 A8/A7 A12/RFU/NC GND EDC3 DBI3# H5GQ2H24MFR-T2C /EGL 74,76,77,78 2 2 1 1 2 1 R7903 931OHM 1% /EGL U7901D ABI# VREFC ZQ SEN 2 P4 P5 R7911 1.33KOhm 1% /EGL J2 J3 RAS# CAS# WE# CS# R7910 40.2Ohm 1% /EGL 1 FBB_WCK67 FBB_WCK67# C7904 820PF/50V MLCC/+/-10% /EGL R7907 40.2Ohm 1% /EGL 2 FBB_WCK67 FBB_WCK67# DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 1 71,79 71,79 FBB_VREFD_H 2 R2 P2 EDC1 DBI1# WCK01 WCK01# U10 2 2 GND H4 H5 H11 H10 K11 K10 K5 K4 J5 FBB_CLK1 FBB_CLK1# 2 D4 D5 U4 U2 T4 T2 N4 N2 M4 M2 J4 FBB_CMD26 FBB_CMD27 FBB_CMD18 FBB_CMD17 FBB_CMD19 FBB_CMD20 FBB_CMD23 FBB_CMD22 FBB_CMD25 J12 J11 1 FBB_WCK45 FBB_WCK45# VREFD2 C7901 820PF/50V MLCC/+/-10% /EGL 71,79 71,79 R7902 549Ohm 1% /EGL 0.4 mm EDC2 DBI2# G3 L3 L12 G12 FBB_CMD24 FBB_CMD29 FBB_CMD30 1 FBB_VREFD_H 1 C13 D13 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 R13 P13 +1.35VS_VGA 2 A10 VREFD1 A11 A13 B11 B13 E11 E13 F11 F13 FBB_EDC6 FBB_DBI6 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 1 EDC0 DBI0# U11 U13 T11 T13 N11 N13 M11 M13 2 C2 D2 FBBD48 FBBD49 FBBD50 FBBD51 FBBD52 FBBD53 FBBD54 FBBD55 2 FBB_EDC4 FBB_DBI4 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 1 A4 A2 B4 B2 E4 E2 F4 F2 1 FBBD32 FBBD33 FBBD34 FBBD35 FBBD36 FBBD37 FBBD38 FBBD39 U7901B 1 U7901A 2 D FBB_WCK45 FBB_WCK45# +1.35VS_VGA U7901C FBB_CMD28 FBB_CMD31 FBB_CMD21 FBB_CMD16 71,79 71,79 1 +1.35VS_VGA 1 71,78 71,78 71,78 71,78 H5GQ2H24MFR-T2C /EGL VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9 VSSQ10 VSSQ11 VSSQ12 VSSQ13 VSSQ14 VSSQ15 VSSQ16 VSSQ17 VSSQ18 VSSQ19 VSSQ20 VSSQ21 VSSQ22 VSSQ23 VSSQ24 VSSQ25 VSSQ26 VSSQ27 VSSQ28 VSSQ29 VSSQ30 VSSQ31 VSSQ32 VSSQ33 VSSQ34 VSSQ35 VSSQ36 GND VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18 VDDQ19 VDDQ20 VDDQ21 VDDQ22 VDDQ23 VDDQ24 VDDQ25 VDDQ26 VDDQ27 VDDQ28 VDDQ29 VDDQ30 VDDQ31 VDDQ32 VDDQ33 VDDQ34 VDDQ35 VDDQ36 C10 C5 D11 G1 G11 G14 G4 L1 L11 L14 L4 P11 R10 R5 D +1.35VS_VGA B1 B12 B14 B3 D1 D12 D14 D3 E10 E5 F1 F12 F14 F3 G13 G2 H12 H3 K12 K3 L13 L2 M1 M12 M14 M3 N10 N5 P1 P12 P14 P3 T1 T12 T14 T3 C H5GQ2H24MFR-T2C /EGL GND GND A11 A13 B11 B13 E11 E13 F11 F13 C13 D13 A 71,79 71,79 FBB_WCK67 FBB_WCK67# FBB_WCK67 FBB_WCK67# D4 D5 U4 U2 T4 T2 N4 N2 M4 M2 R2 P2 EDC1 DBI1# FBB_WCK45 FBB_WCK45# FBB_WCK45 FBB_WCK45# P4 P5 U10 CK CK# FBB_VREFD_H 0.4 mm A5 U5 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 EDC3 DBI3# VPP/NC1 VPP/NC2 0.4 mm WCK23 WCK23# FBB_VREFC1 J14 FBB_ZQ3 J13 H5GQ2H24MFR-T2C /EGL FBB_SEN2 R7901 121OHM 1% /EGL J10 VREFC ZQ SEN H5GQ2H24MFR-T2C /EGL GND 1 C7918 1UF/10V 10% /EGL 2 1 C7905 1UF/10V 10% /EGL 2 1 2 1 2 1 2 1 2 1 2 1 2 C7919 0.1UF/10V 10% /EGL C7916 10UF/6.3V 10% /EGL 1 C7914 1UF/10V 10% /EGL 2 1 C7915 1UF/10V 10% /EGL 2 1 C7925 0.1UF/10V 10% /EGL 2 1 C7911 0.1UF/10V 10% /EGL 2 1 C7907 0.1UF/10V 10% /EGL 2 1 C7913 0.1UF/10V 10% /EGL 2 2 C7909 0.1UF/10V 10% /EGL 1 +1.35VS_VGA C7922 10UF/6.3V 10% /EGL GND C7923 0.1UF/10V 10% @ C7910 0.1UF/10V 10% @ C7926 0.1UF/10V 10% @ C7906 0.1UF/10V 10% @ C7921 0.1UF/10V 10% @ C7920 0.1UF/10V 10% @ GND PLACE NEAR U7901/U7902 A H5GQ2H24MFR-T2C /EGL Title : N14xxx_FBB UPPER PEGATRON CORPORATION GND B GND 1 GND RESET# CKE# C7908 0.1UF/10V 10% /EGL 1 FBB_CLK1 FBB_CLK1# 2 H5GQ2H24MFR-T2C /EGL 71,79 71,79 EDC2 DBI2# VREFD2 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 WCK01 WCK01# 71,79 71,79 J2 J3 J12 J11 C7924 0.1UF/10V 10% /EGL 2 R13 P13 FBB_CMD29 FBB_CMD30 C7912 0.1UF/10V 10% /EGL 1 FBB_EDC5 FBB_DBI5 FBB_VREFD_H DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 B1 B12 B14 B3 D1 D12 D14 D3 E10 E5 F1 F12 F14 F3 G13 G2 H12 H3 K12 K3 L13 L2 M1 M12 M14 M3 N10 N5 P1 P12 P14 P3 T1 T12 T14 T3 C7917 0.1UF/10V 10% /EGL 1 U11 U13 T11 T13 N11 N13 M11 M13 VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18 VDDQ19 VDDQ20 VDDQ21 VDDQ22 VDDQ23 VDDQ24 VDDQ25 VDDQ26 VDDQ27 VDDQ28 VDDQ29 VDDQ30 VDDQ31 VDDQ32 VDDQ33 VDDQ34 VDDQ35 VDDQ36 +1.35VS_VGA 2 A10 FBBD40 FBBD41 FBBD42 FBBD43 FBBD44 FBBD45 FBBD46 FBBD47 VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5 VSSQ6 VSSQ7 VSSQ8 VSSQ9 VSSQ10 VSSQ11 VSSQ12 VSSQ13 VSSQ14 VSSQ15 VSSQ16 VSSQ17 VSSQ18 VSSQ19 VSSQ20 VSSQ21 VSSQ22 VSSQ23 VSSQ24 VSSQ25 VSSQ26 VSSQ27 VSSQ28 VSSQ29 VSSQ30 VSSQ31 VSSQ32 VSSQ33 VSSQ34 VSSQ35 VSSQ36 C10 C5 D11 G1 G11 G14 G4 L1 L11 L14 L4 P11 R10 R5 2 VREFD1 A1 A12 A14 A3 C1 C11 C12 C14 C3 C4 E1 E12 E14 E3 F10 F5 H13 H2 K13 K2 M10 M5 N1 N12 N14 N3 R1 R11 R12 R14 R3 R4 U1 U12 U14 U3 U7902B DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 EDC0 DBI0# A8/A7 A11/A6 BA2/A4 BA1/A5 BA0/A2 BA3/A3 A9/A1 A10/A0 A12/RFU VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 1 C2 D2 A10/A0 A9/A1 BA0/A2 BA3/A3 BA2/A4 BA1/A5 A11/A6 A8/A7 A12/RFU/NC ABI# MF VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 2 FBB_EDC7 FBB_DBI7 H4 H5 H11 H10 K11 K10 K5 K4 J5 +1.35VS_VGA J1 B10 B5 D10 G10 G5 H1 H14 K1 K14 L10 L5 P10 T10 T5 1 A4 A2 B4 B2 E4 E2 F4 F2 FBB_CMD22 FBB_CMD23 FBB_CMD19 FBB_CMD20 FBB_CMD18 FBB_CMD17 FBB_CMD27 FBB_CMD26 FBB_CMD25 ABI# U7902D FBB_SOE3 2 FBBD56 FBBD57 FBBD58 FBBD59 FBBD60 FBBD61 FBBD62 FBBD63 J4 Mirrored CAS# RAS# CS# WE# 1 Byte 5 U7902A FBB_CMD24 RAS# CAS# WE# CS# 2 Byte 7 G3 L3 L12 G12 R7913 1KOhm 5% /EGL 1 B FBB_CMD31 FBB_CMD28 FBB_CMD16 FBB_CMD21 1 U7902C 2 2 +1.35VS_VGA Size PANDA WANG Project Name Rev VA70_HW C Date: Engineer: Friday, January 18, 2013 Sheet 1.3 79 of 99 5 4 3 2 1 Icc_TDC: Icc_Max SV-QC 27A SV-QC 95A SV-DC 21A SV-DC 55A 2 121017 T8095 1 2 1 2 1 1 2 2 1 JP8001 SHORT_PIN 2 1 JP8000 SHORT_PIN ISEN2 1 R8036 1% @ 10KOhm 2 ISEN3 22UF/6.3V total R8034 1% 1Ohm 2 C8006 330PF/50V @ 2 R8025 100Ohm @ 10V220000001 C8045 22UF/6.3V C8044 22UF/6.3V 1 2 C8048 22UF/6.3V 2 1 C8043 22UF/6.3V 1 2 C8047 22UF/6.3V 2 1 C8042 22UF/6.3V 1 2 C8046 22UF/6.3V 1 1 2 1 2 1 VSUM+ R8038 1% 3.65KOhm 1 2 VSUM- 1 1 2 R8040 @ 1% 10KOhm 2 ISEN1 1 R8041 @ 1% 10KOhm 2 ISEN3 2 2 2 1 2 1 JP8003 SHORT_PIN 1 @ @ C8049 22UF/6.3V 1 2 1 1 @ R8039 1% 1Ohm 2 1 1 1 T8064 TPC28T T8042 TPC28T T8043 TPC28T T8044 TPC28T T8045 TPC28T 1 T8004 TPC28T 1 T8003 TPC28T 1 +VCORE T8002 TPC28T 1 1 T8001 TPC28T 1 T8000 TPC28T 2 1 VCCSENSE +VCORE R8037 10KOhm 1% 2 ISEN2 @ + CE8005 330UF/2V 1BV080000033 ESR=9mOHM B 1 C8015 @ 390PF/50V MLCC/+/-10% 1 6 2 1 1 2 C8010 @ 10% 0.1UF/25V 1AV300000007 1AV200000021 1% 121017 2 09V030000069 JP8002 SHORT_PIN @ L8002 0.24uH 1 VRM_LG2 C8016 10% 0.01UF/50V 2 1 1 For IFDIM CE8006 100UF/25V @ DCR=1.0mohm R8048 @ 2.2Ohm 0.05 2 C8040 56PF/50V 5% 1AV200000047 C8041 22UF/6.3V 1 1 2 VRM_RTN R8017 100Ohm 8 VSSSENSE + Irat=25A 2 C8027 MLCC/+/-10% 0.22UF/16V 1AV200000091 1 VRM_RC2 R8051 0Ohm 10V340000001 121017 Q8002 1 Q8001 SIRA10DP-T1-GE3 2 5 1 SIRA10DP-T1-GE3 2VRM_BST2_R 4 3 2 1 1 2 1 C 5 VRM_BST2 4 3 2 1 OK C8052 10UF/25V MLCC/+/-10% 1AV500000015 4 3 2 1 T8091 TPC28T R8023 Close to phase1 L8001 121017 1 C8032 10UF/25V MLCC/+/-10% 1AV500000015 VRM_LX2 2 2KOhm 2200PF/50V 1AV200000026 10V220000035 2 1 +AC_BAT_SYS C8033 10UF/25V MLCC/+/-10% 1AV500000015 VRM_HG2 R8019 1 C8034 1000PF/50V 2 2 1 1 1 VSUM- 5 C8018 1 Q8000 SIRA14DP-T1-GE3 07V040000100 10VS40000002 T8006 TPC28T 2 1% R8023 5% 10KOHM set OCP=120A ISEN1 C8011 MLCC/+/-10% 0.22UF/16V 1AV200000091 1 2 1% 需需30pcs +VCORE C8050 22UF/6.3V 1 1 VRM_RC1 SIRA10DP-T1-GE3 1 5 2 R8035 1% @ 10KOhm 2 2 ISEN2 1 2 ISEN3 R8030 0Ohm 10V240000001 R8020 499Ohm 10V220000076 2 VRM_ISUMN 1 2 VRM_FB2_R 2 C8013 0.1UF/10V 10% 1AV200000024 2 1 Ri R8022 2.61KOhm R8021 11KOhm 1 2 2 C8020 0.022UF/16V 1AV200000027 G 1 Ci S 1 1 1 T8008 TPC28T 8 7 6 5 D 2 VSUM+ R8033 1% 3.65KOhm 1 2 VSUM+ G 2 T8005 TPC28T S 2 1.65KOhm 10V220000276 1 1 VSUM- 8 7 6 5 D 1 2 C8009 MLCC/+/-10% 0.22UF/16V 1AV200000091 1 2 VSUM- For DC LL 1.5mOHM Check 3.01KOHM C8039 3300PF/25V 1AV200000030 R8032 1% 10KOhm 2 ISEN1 S 2 R8009 C8054 @ 1000PF/50V 10% C8012 @ 0.1UF/25V 1AV300000007 10% CE8002 560UF/2.5V 1BV090000002 ESR=16mOHM G C8003 MLCC/+/-10% 390PF/50V 1AV200000080 1 2 R8007 1KOhm 10V220000002 Check C8025 1UF/6.3V 10% 2 2 C8019 0.22UF/10V 10% 1AV200000050 C8008 @ 0.22UF/16V 1 2 1AV200000091 R8010 2KOhm 1% @ 2 Irat=25A 09V030000069 R8024 1% 1Ohm VSUM+ 121017 R8012 4.02KOhm 10V220000069 C8023 1UF/6.3V 10% VRM_VDD VRM_FB 1 1 C8024 0.1UF/25V 10% 1AV300000007 1 R8015 @ 0Ohm VRM_FB2_R VRM_COMP 1 SR8007 R0603 2VRM_FB2 06V070000048 R8014 1% 5.9KOHM 10V220000244 2 121017 +AC_BAT_SYS 8 7 6 5 D R8005 1% 27.4KOhm 1 @ 1 1 1 R8004 @ 5% 470KOHM 1 2 @ L8001 0.24uH 1 DCR=1.0mohm R8047 @ 2.2Ohm 0.05 1 R8006 @ 1% 3.83KOhm 1 2 B CE8000 100UF/25V @ VRM_LG1 2 2 R0402 2 1 VR_HOT# Close to phase1 Mosfet VRM_PWM3 VRM_LG1 VRM_LX1 VRM_HG1 VRM_BST1 2 VRM_VIN 2 SR8005 C8026 0.22UF/16V MLCC/+/-10% 1AV200000091 VRM_LG2 9 10 11 12 13 14 15 16 +1.05VS 24 23 22 21 20 19 18 17 LGATE2 VDDP PWM3 LGATE1 PHASE1 UGATE1 BOOT1 VIN 1 C8001Change to 0.01uF R8050 0Ohm 10V340000001 +5VS SIRA10DP-T1-GE3 33 32 31 30 29 28 27 26 25 GND ALERT# SDA SLOPE/PROG1 PROG3 PROG2 BOOT2 UGATE2 PHASE2 R8003 @ 1% 499Ohm 1 2 1 R0603 Q8005 G SCLK VR_ON PGOOD IMON VR_HOT# NTC COMP FB 2 +5VS_VRM Q8004 S C8001 0.01UF/16V 11AV200000019 2 SR8006 2 2 G 1 2 3 4 5 6 7 8 VRM_SCLK VRM_ON VRM_PWRGD VRM_IMON VRM_HOT# VRM_NTC VRM_COMP VRM_FB R8001 1% 100KOhm 2 1 1 2VRM_BST1_R 1 S R0402 30,92 VR_IMON 121017 U8000A ISL95812HRTZ FB2/VSEN ISEN3 ISEN2 ISEN1 RTN ISUMN ISUMP VDD 2 1 VRM_BST1 8 7 6 5 D SR8004 1 30 CPU_VRON 30,92 VRM_PWRGD VRM_LX1 8 7 6 5 D 93 CPU_VRON_PWR R8029 0Ohm T8092 TPC28T VRM_HG1 4 3 2 1 R0402 上上 Pull high to 5V R8029 5 1 Disable PWM3 4 3 2 1 T8094 2 2 SR8014 1 121017 + D 1 T8096 R0402 6 VR_SVID_CLK 1 2 1 1 6 VR_SVID_ALERT# VRM_ALERT# VRM_SDA VRM_PROG1 VRM_PROG3 VRM_PROG2 VRM_BST2 VRM_HG2 VRM_LX2 SR8013 C C8051 10UF/25V MLCC/+/-10% 1AV500000015 4 3 2 1 1 2 R0402 4 C8029 10UF/25V MLCC/+/-10% 1AV500000015 G 1 VR_SVID_DATA C8030 10UF/25V MLCC/+/-10% 1AV500000015 S 6 2 07V040000100 SR8012 D C8031 1000PF/50V 2 8 7 6 5 D Q8003 SIRA14DP-T1-GE3 2 1 5 +AC_BAT_SYS 1 1 1 R8028 R8027 R8026 102KOhm 3.24KOhm 49.9KOhm 10V220000007 10V220000057 10V220000078 1 2 2 Shark bay R8018 100Ohm U8000B 34 35 36 37 GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 38 39 40 41 ISL95812HRTZ 06V070000048 A A Title : Engineer: Size 5 4 3 2 Alex Rev VP70HW Custom Date: POWER_VCORE Project Name Friday, January 18, 2013 1 Sheet 80 1.2 of 94 5 4 3 2 1 +5VO & +3VO POWER SUPPLY Q8111 IRFHS8342TRPBF 07V040000087 4 7 Q8101 IRFHS8342TRPBF 07V040000087 4 1 Q8104 IRFHS8342TRPBF 07V040000087 30,92 R8122 130KOHM 10V220000227 S 121015 6 Enable1 2 2 2 R8105 10KOhm vx_r0402_small 1% C8137 10% @ 39PF/50V vx_c0402_small 1 22 23 GND1 GND2 G 1 C8151 0.1UF/25V 20mil 2 1 1 1 1 Q8112B UM6K1N @ C8153 0.1UF/25V @ 1AV300000007 B C8152 1500PF/50V @ C8132 0.1UF/25V 上上 上上 1 VSUS_ON_EN @ JP8106 1MM_OPEN_M1M2 2 1 2 R8127 5% 1KOhm 2 2 +12VO +12VSUS 1 1 1 2 1 T8119 T8120 T8121 TPC28T TPC28T TPC28T 1 1 +5VO_2_2 3 30,91,93 VSUS_ON 1 T8150 TPC28T D8103 1V/0.2A Q8112A UM6K1N @ 4 5 1 2 1 C8136 0.1UF/25V 2 1 1 +10VO R8142 1% 100KOhm @ 2 2 1 C8131 @ 10% 0.1UF/25V vx_c0603_small 1AV300000007 T8118 T8143 T8144 TPC28TTPC28TTPC28T 20mil 2 2 S D 3 C8147 0.1UF/25V 1 T8152 TPC28T VCLK 1 3 2 5% +5VA R8133 5% 560KOhm @ 2 20mil 2 +5VO 1 1 1 +5VO_1_1 3 2 T8117 TPC28T 1 @ +3VSUS 1 2 R8132 1% 110KOHM vx_r0402_small @ 6 2 C8140 1UF/6.3V vx_c0402_small 10% 1 @ Q8110 SSM3K315T @ +3VO +AC_BAT_SYS 1 2 [30,53] IOAC_EN 2 2 +3VAO D8100 1V/0.2A R8112 560KOhm vx_r0402_small 1 U8100B 1 1 1 R8128 560KOhm 5% D8111 1.2V/0.1A 2 R8143 5% D8112 1KOhm 1.2V/0.1A 1 2 1 2 2 3V_FB_R R8118 6.65KOHM vx_r0402_small 1% 1 2 2 1 1 1 C8144 10% @ 0.1UF/25V 1AV300000007 vx_c0603_small JP8111 1MM_OPEN_M1M2 2 1 2 1 +3VA 3 2 B 121108 TPS51225CRUKR 06V950000017 SR8105 R0402 1 1 R8106 10KOhm vx_r0402_small 1% 2 Q8109B UM6K1N +3VSUS 0.954A C8141 @ 0.1UF/25V 2 0.8V/0.2mA 07V030000001 5 4 D8104 2 2 3V_FB C8130 @ 10% 0.1UF/25V vx_c0603_small SR8104 R0402 1 5V_FB C8149 @ 10% 39PF/50V vx_c0402_small Enable2 1 Q8109A UM6K1N 2 R8119 15.4KOHM vx_r0402_small 1% 1 2 2 1 1 3 VSUS_ON_EN JP8112 SHORT_PIN C8133 @ 0.1UF/25V vx_c0603_small 10% 1AV300000007 + CE8103 C8156 220UF/6.3V 1BV090000004 10UF/6.3V 1AV300000018 C 2 T8145 TPC28T R8134 5% 1KOhm 1 2 JP8107 1MM_OPEN_M1M2 2 1 2 IRFHS8342 RDSON=25mOHM 1 SIR166 RDSON=4mOHM 30,52 USBCHG_EN R8121 @ 2.2Ohm vx_r0805_h24_small 0.05 2 D Enable2 5V_FB_R FORCE_OFF_PWR 1 1 1 2 5 6 G 3 SUS_PWRGD R8103 130KOHM 10V220000227 +3VO=5.585A 2 1 4 @ Q8102 IRFHS8342TRPBF 07V040000087 L8101 3.3UH Irat=6.6A 1 0.1UF/25V 1 2 3 4 5 TPS51225CRUKR 06V950000017 S S C8145 @ 0.1UF/25V vx_c0603_small 10% 1AV300000007 +3VO 7 DRVL1 VO1 VREG5 VIN DRVL2 3 3 T8149 TPC28T 2 3V_RC G G 2 1 D 1 7 D 1 3V_BST 4 1 121108 1 6 5 2 10 9 8 7 6 DRVH2 VBST2 SW2 PGOOD EN2 2 JP8114 SHORT_PIN R8126 @ 2.2Ohm vx_r0805_h24_small 0.05 Enable1 DRVH1 VBST1 SW1 VCLK EN1 GND C8138 2 2 1 JP8113 SHORT_PIN 16 17 18 19 20 21 VCLK 6 5 2 7 15V_RC 2 CE8100 220UF/6.3V EL/Lf_T=2000hrs_105c/+/-20% 1BV090000003 1 2 C8155 10UF/6.3V 1AV300000018 2 5V_BST_R 1 5V_LX S T8111 TPC28T SR8102 R0603 3V_HG 2 3V_BST_R 3V_LX 1 1 SR8103 R0603 25V_BST CS1 VFB1 VREG3 VFB2 CS2 4 7 C8142 0.1UF/25V 2 1 + C8146 0.1UF/25V @ C 1 1 1 2 2 U8100A 1 1 VSUS_ON_EN C8139 @ 0.1UF/25V vx_c0603_small 10% 2 5 6 D G 3 S L8100 3.3UH Irat=6.6A +5VO= 6.263A [32,92] FORCE_OFF_PWR +AC_BAT_SYS 15 14 13 12 11 +5VO 3V_LG 3 C8118 10UF/25V vx_c0805_h57_small MLCC/+/-10% 2 1 1 2 C8135 1UF/25V vx_c0603_small 10% 5V_LG D G 2 C8150 1UF/6.3V vx_c0402_small 10% D Input Current 2.34A 1 6 5 2 1 +5VA (0.1A) C8134 @ 0.1UF/25V vx_c0603_small 10% T8151 TPC28T +AC_BAT_SYS 1 2 2 1 C8148 10UF/25V vx_c0805_h57_small MLCC/+/-10% @ 1 1 1 2 C8143 10UF/25V vx_c0805_h57_small MLCC/+/-10% Q8100 IRFHS8342TRPBF 07V040000087 1 T8114 TPC28T JP8110 1MM_OPEN_M1M2 1 2 +5VAO 1 2 Input Current 5.46 A +AC_BAT_SYS 1 T8108 TPC28T D 11.47V-14.37V C8154 0.1UF/25V 1AV300000007 (0.01A) 不上上 不上上 Support ACOC =>AOAC_@ nonAOAC_@ nonsupport AOAC=>nonAOAC_@ AOAC_@ A A T8125 T8126 T8127 TPC28T TPC28T TPC28T 1 1 1 1 1 +3VSUS T8131 T8136 T8137 TPC28T TPC28T TPC28T 1 1 +3VO 1 1 Title : T8146 T8147 T8148 TPC28T TPC28T TPC28T 1 1 1 1 T8138 T8139 T8140 TPC28T TPC28T TPC28T 1 1 1 1 1 1 T8128 T8129 T8130 TPC28T TPC28T TPC28T +3VA T8132 T8141 T8142 TPC28T TPC28T TPC28T 1 +5VA T8133 T8134 T8135 TPC28T TPC28T TPC28T 1 1 1 +5VO 1 T8122 T8123 T8124 TPC28T TPC28T TPC28T Date: 4 3 2 Alex Project Name Rev VP70HW Custom 5 POWER_SYSTEM Engineer: Size Friday, January 18, 2013 1 Sheet 1.1 81 of 99 5 4 3 2 1 +1.05VS POWER SUPPLY SR8200 2 1 +5VO 2 1 1.05V_VDD TRIP OCL TPS51362 GND 8A TPS51367 5V 12A TPS51367 Float 16A D 2 C8208 0.01UF/50V 10% vx_c0402_small 1AV200000021 1 D R0402 C8206 2.2UF/6.3V 10% vx_c0603_small 1AV300000020 1.05V_VSNS 1.05V_GSNS +AC_BAT_SYS Input Current 0.75A 1 C8207 10% 0.1UF/10V vx_c0402_small 2 1 1 2 2 @ @ 2 C 2 +1.05VS (3.328A) C8201 22UF/6.3V C8204 22UF/6.3V 1 C8202 22UF/6.3V 1 @ 2 1MHz C8203 22UF/6.3V 1 800KHz 5V 2 400KHz Float C8231 1500PF/50V @ C8200 22UF/6.3V 2 1 Fsw GND 1 R8201 2.2Ohm @ 2 MODE JP8201 1 3mm_open_5mil_m1m2 C8205 22UF/6.3V 1 2 2 1 2 0.68UH 4.7Ohm 10V340000013 R8202 0Ohm @ +5VO 21.05V_BST_R C8235 10% 0.1UF/25V (0603) X7R 10% 2 1 (5.993A) 2 R8209 1 1 1 1.05V_LX 2 L8200 2 1 11.05V_RC 1 +1.05VS_PWRGD 1.05V_BST 10,92 JP8200 SHORT_PIN +1.05VO T8234 TPC28T 1AV200000024 R8208 0Ohm C 2 1 JP8202 SHORT_PIN 1 2 3 4 5 6 7 8 9 2 C8217 0.1UF/25V 1AV300000007 PGND5 PGND4 PGND3 PGND2 PGND1 @ 14 13 12 11 10 PGOOD LP# MODE NC BST SW1 SW2 SW3 SW4 2 R8200 10KOhm 1% REFIN2 REFIN VREF RA EN GND2 C8223 10UF/25V 1 2 C8222 10UF/25V 1 1 2 1 SUSB#_PWR 1 46,82,84,91,93 2 24 25 26 27 28 29 C8225 10UF/25V MLCC/+/-10% 1 1 R8204 0Ohm @ C8234 @ 1500PF/50V MLCC/+/-10% 2 R8203 0Ohm 2 D8200 @ 1.2V/0.1A 2 1 U8200A TPS51363RVET_7VIA GSNS VSNS SLEW TRIP GND1 V5 VIN3 VIN2 VIN1 REFIN = FLOAT ,Vout = 1.2V 2 23 22 21 20 19 18 17 16 15 REFIN = GND , Vout = 1.05V 1 Vref = 2.0V 8/7 +1.05VO enable from Susb change to Vsus_on; +1.05VUSU&PGD is for intel XDP/debug U8200B 30 31 32 33 GND3 GND9 GND4 GND8 GND5 GND7 GND6 36 35 34 TPS51363RVET_7VIA B B GND 1 1 1 1 1 T8213 T8214 T8215 TPC28TTPC28TTPC28T 1 1 1 T8209 T8210 T8211 TPC28TTPC28TTPC28T 1 T8205 T8206 T8207 TPC28TTPC28TTPC28T +1.05VO 1 1 1 T8201 T8202 T8203 TPC28TTPC28TTPC28T +1.05VS GND A A Title : POWER_+1.05VS Engineer: Size Rev VP70HW Custom Date: 5 4 3 2 Alex Project Name Friday, January 18, 2013 Sheet 1 1.1 82 of 94 5 4 3 2 1 DDR & VTT POWER SUPPLY 1 R8303 68KOhm 1% 2 Input Current 1.42A D D DDR_VTTSNS R0603 2 Q8300 IRFHS8342TRPBF 2 5 6 07V040000087 SR8303 R0603 2 7 4 RDSon=25mOHM U8300B TPS51216RUKR 22 GND4 B GND A T8302 T8301 T8303 TPC28T TPC28T TPC28T C8315 0.1UF/25V vx_c0603_small 10% 1AV300000007 Title : T8315 T8311 T8306 TPC28T TPC28T TPC28T POWER_DDR & VTT +0.675VS 1 Engineer: 1 2 R8306 10KOhm vx_r0402_small 1% 1 T8314 T8313 T8309 TPC28T TPC28T TPC28T CCM S5 1 T8308 T8310 T8305 TPC28T TPC28T TPC28T 1 D8301 @ 1.2V/0.1A vx_sod323_h37 2 Function Diode-emulation 1 VDD 1 EN/DEM +1.35V Size 4 3 2 Alex Project Name Rev VP70HW Custom Date: 5 1 GND3 1 1 1 1 C8314 0.1UF/25V vx_c0603_small 10% 1AV300000007 1 A C8318 10UF/6.3V 20% GND_TPS51216 S3 2 R8307 0Ohm vx_r0402_small @ 2 C8317 10UF/6.3V 20% C 2 GND_TPS51216 1 2 C8306 0.01UF/50V 10% 1AV200000021 1 R8305 39KOhm vx_r0402_small 1% 1 1 CE8300 560UF/2.5V 1BV090000002 2 1 D8300 @ 1.2V/0.1A vx_sod323_h37 1 2 1 91,93 SUSC#_PWR 2 + 1 3mm_open_5mil_m1m2 C8308 1UF/6.3V 10% @ 1 2 B +1.35V 9.1A 2 GND_TPS51216 23 R8301 32.4KOhm 7 4 DDR_REFIN DDR_FB 1 10% 2 DDR_FB 2 2 1 C8305 0.1UF/25V vx_c0603_small C8307 @ 0.1UF/25V vx_c0603_small 10% 1AV300000007 2 S 2 S 2 JP8304 1 F=300KHz 1 1 2 G 1 3 2 3mm_open_5mil_m1m2 2 D G 3 1 R8302 @ 2.2Ohm vx_r0805_h24_small 0.05 10V440000006 1 D TPS51216RUKR Q8303 IRFHS8342TRPBF 2 5 6 07V040000087 2 JP8300 (9.1A) 2 Q8302 IRFHS8342TRPBF 2 5 6 07V040000087 L8300 1.5UH 09V030000030 1 2 JP8302 SHORT_PIN 7 4 10% vx_c0603_small 1AV300000007 1 3mm_open_5mil_m1m2 1 1 DDR_BST DDR_HG DDR_LX DDR_VDD DDR_LG 1 VBST DRVH SW V5IN DRVL 1 SR8302 1 JP8305 1 T8307 TPC28T 1DDR_RC 2 15 14 13 12 11 C8310 0.1UF/25V 2DDR_BST_R 1 2 1 VTTSNS VLDOIN VTT VTTGND VTTREF SR8301 R0603 1 2 R8300 10KOhm 1% 1 2 G 21 20 19 18 17 16 GND2 PGOOD MODE TRIP S3 S5 1 2 3 4 5 Close Pin 6 SUSB#_PWR 1 +DDR_O S DDR_REF 82,84,86,91,93 C8312 C8313 10UF/25V 10UF/25V vx_c0805_h57_small vx_c0805_h57_small MLCC/+/-10% MLCC/+/-10% 1AV500000015 @ D 3 GND_TPS51216 2 C8311 @ 0.1UF/25V vx_c0603_small 10% 1AV300000007 2 2 C8309 1UF/6.3V vx_c0402_small 10% 1 1 GND_TPS51216 GND_TPS51216 U8300A SR8305 C8304 R0603 0.22UF/16V vx_c0402_small C +5VSUS 6 7 8 9 10 M_VREF C8303 @ 0.1UF/25V vx_c0603_small 10% 1AV300000007 1 1% VLDOIN C8300 @ 10UF/6.3V vx_c0603_small 20% 2 1 C8302 @ 10UF/6.3V vx_c0603_small 20% 2 2 C8301 10UF/6.3V vx_c0603_small 20% 1 SR8304 1 1 1 +1.35V SHORT_PIN 2 JP8301 @ 1MM_OPEN_M1M2 1 2 1 1 2 2 +0.675VS (Max:1.2A) VREF GND1 REFIN VDDQSNS PGND 2 2 SR8300 2 DDR_MODE DDR_TRIP S3 S5 JP8303 1 1 2 120KOhm 1 92 DDR_PWRGD 1 2 R8304 T8304 TPC28T +0.675VO (Max:1.2A) 1 1 +AC_BAT_SYS C8316 @ 1500PF/50V vx_c0402_small MLCC/+/-10% 1AV200000095 Friday, January 18, 2013 Sheet 1 1.1 83 of 94 5 4 3 2 1 +1.35VS POWER SUPPLY SR8402 1 1.35V_VDD 1 +5VO 2 /VGA R0402 C8401 2.2UF/6.3V 10% vx_c0603_small 1AV300000020 TRIP OCL TPS51362 GND 8A TPS51367 5V 12A TPS51367 Float 16A D 2 1 D C8415 /VGA 0.01UF/50V 10% vx_c0402_small 1AV200000021 2 1.35V_VSNS 1.35V_GSNS +AC_BAT_SYS Input Current 0.94A 1 2 1 2 1 2 2 2 GSNS VSNS SLEW TRIP GND1 V5 VIN3 VIN2 VIN1 2 JP8400 SHORT_PIN PGOOD LP# MODE NC BST SW1 SW2 SW3 SW4 1 2 3 4 5 6 7 8 9 T8409 TPC28T 2 MODE Fsw GND 400KHz Float 800KHz 5V 1MHz /N14E-GL /N14E-GL /VGA /VGA C8402 22UF/6.3V C8405 22UF/6.3V 1 C8412 1500PF/50V @ 2 2 R8401 2.2Ohm @ C8403 22UF/6.3V 1 /VGA +1.35VS_VGA (8A) 2 1 21.35V_BST_R 4.7Ohm 10V340000013 /VGA C 2 0.68UH /VGA C8408 22UF/6.3V 1 R8409 1 R8407 0Ohm @ C8409 10% 0.1UF/25V (0603) X7R 10% 2 1 2 T8414 TPC28T L8400 1 C8411 22UF/6.3V 1 1.35V_LX 2 /VGA C8406 22UF/6.3V 1 1AV200000024 +5VO /N14E-GL 2 6 C8414 10% 0.1UF/10V vx_c0402_small /VGA Q8400A UM6K1N /VGA R8416 560KOhm 5% /VGA C8404 10UF/25V 1 2 0.8V/0.2mA 07V030000001 /VGA JP8402 SHORT_PIN 1 2 C8407 0.1UF/25V /VGA 1AV300000007 PGND5 PGND4 PGND3 PGND2 PGND1 1.5V_BST 3 Q8400B UM6K1N /VGA 1 87 DGPU_EN_PWR /VGA 1 1 87 FB_CLAMP 1 1 5 1 D8400 C 47.5KOhm 10V220000250 /VGA 2 2 560KOhm 5% /VGA 2 105KOhm 10V220000008 /VGA 2 1 4 +5VA 1 82KOhm /VGA R8415 3 2 +3VO REFIN2 REFIN VREF RA EN GND2 1 11.35V_RC 2 2 C8413 10UF/25V 14 13 12 11 10 2 2 R8414 C8416 10UF/25V MLCC/+/-10% /VGA 1 R8408 R8402 1 24 25 26 27 28 29 C8410 @ 1500PF/50V MLCC/+/-10% 1 121226 U8400A TPS51362RVET_7VIA 1 23 22 21 20 19 18 17 16 15 REFIN = GND , Vout = 1.05V REFIN = FLOAT ,Vout = 1.2V 1 Vref = 2.0V /VGA /N14E-GL U8400B 30 31 32 33 GND3 GND4 GND5 GND6 GND9 GND8 GND7 36 35 34 TPS51362RVET_7VIA /VGA 1 C8418 10UF/6.3V vx_c0603_small 20% 2 2 1 C8400 @ 56PF/50V vx_c0402_small 5% 1 1 0.353A C8421 @ 10UF/6.3V vx_c0603_small 20% GND R8412 10.5KOHM vx_r0402_small 1% 10V220000238 T8411 T8413 TPC26T TPC26T T8410 T8412 TPC26T TPC26T +1.5VS 1 Vref=0.8V R8410 9.31KOhm vx_r0402_small 1% 10V220000171 1 U8401 RT9042-25GSP 5 6 7 8 9 2 NC VOUT ADJ GND1 GND2 1 C8419 10UF/6.3V vx_c0603_small 20% VDD VIN EN PGOOD 1 1 4 3 2 1 1 1 C8417 1UF/25V vx_c0603_small 10% 2 1 2 1 2 C8420 0.1UF/25V 10% vx_c0603_small 1AV300000007 Input current=0.353A 2 2 GND +1.5VS 1 2 R8413 2.2Ohm 0.05 vx_r0805_h24_small 1.5V_LDO_VDD SUSB#_PWR R8404 30KOhm 1% vx_r0402_small JP8403 1MM_OPEN_M1M2 2 1 2 1 +3VO 2 1 1 +1.5VO_LDO 1 1 D8401 @ 1.2V/0.1A 82,83,86,91,93 B T8403 T8404 T8405 TPC28TTPC28TTPC28T +5VO 2 1 +1.35VS_VGA 1 T8407 T8408 T8406 TPC28TTPC28TTPC28T 2 R8411 0Ohm vx_r0402_small 1 1 92 +1.5VS_PWRGD B A A Title : Engineer: Size 5 4 3 2 Alex Rev VP70HW C Date: POWER_1.5VS Project Name Friday, January 18, 2013 Sheet 1 1.1 84 of 94 5 4 3 2 1 VGA_CORE POWER SUPPLY 1 VGA_VREF Vmin Vmax Vboot 0.65V 1.15V 0.9V 0.6V 1.2V 0.9V optional naming /N14M-GL /N14P-GV2 Q8706 SIRA14DP-T1-GE3 07V040000100 @ C8702 1500PF/50V 1AV200000095 2 /VGA 1 1 C8710 0.1UF/25V @ C8718 10UF/25V MLCC/+/-10% 1AV500000015 /VGA @ S S 4 3 2 1 4 3 2 1 G G 121024 C8717 10UF/25V MLCC/+/-10% 1AV500000015 /VGA 2 Q8701 SIRA14DP-T1-GE3 07V040000100 R8725 @ 100Ohm 1% vx_r0402_small 2 1 VGA_PSI# 8 7 6 5 D GND_RT8812A VGA Input current=9.37A R8724 @ 100Ohm 1% vx_r0402_small 2 1 8 7 6 5 D GND_RT8812A +AC_BAT_SYS +3VS_VGA 2 1 R8713 /VGA 1% 18KOhm vx_r0402_small 1 2 VGA_REFIN 1 2 C8720 2700PF/50V X7R/+/-10% /VGA vx_c0402_small D 2 R8716 /VGA 2KOhm 1% vx_r0402_small 121030 one two phase phase 39K 20K 30K 20K 3K 2K 27K 18K >1.8nF 2.7nF 1 D R8723 R8721 R8716 R8713 C8703 2 VGA_REFADJ 5 R8723 /VGA 20KOhm 1% vx_r0402_small 1 1 2 5 2 R8721 /VGA 20KOhm 1% vx_r0402_small 121015 1 /VGA +VGA_VCORE_O 2 /N14E-GL +VGA_VCORE CE8701 @ 330UF/2V 1BV080000033 CE8700 560UF/2.5V 1BV090000002 /VGA 1 C8727 10UF/6.3V 20% /VGA 2 1 121016 C8712 1500PF/50V 1AV200000095 /VGA 2 2 VGA_RC1 2 Irat=24A /VGA R8705 2.2Ohm 10V440000006 /VGA 1 SIRA10DP-T1-GE3 5 SIRA10DP-T1-GE3 4 3 2 1 G G 2 S S SR8703 1 nb_r0402_short_5mil_small VGA_VID 4 3 2 1 5 VGA_VRON VGA_HG1 VGA_BST1 /VGA 2 Q8703 8 7 6 5 D R8722 1% 10KOhm SR8701 1 VGA_PSI# Q8702 8 7 6 5 D C 2 C8713 /VGA 0.1UF/10V 1AV200000024 2 1 L8701 0.36UH 1 1 DGPU_EN_PWR T8711 TPC28T T8709 TPC28T 1 91 121017 D8700 @ 1.2V/0.1A 2 1 C8701 /VGA 0.22UF/16V MLCC/+/-10% vx_c0402_small 1 2 1 121016 R8708 /VGA 0Ohm 0 vx_r0603_h28_small 1 2 VGA_BST1_R C8728 10UF/6.3V 20% /VGA EDP=50A OCP:60A TDC=35A C nb_r0402_short_5mil_small 4 3 2 1 1 2 1 2 1 1 2 C8716 10UF/25V MLCC/+/-10% 1AV500000015 /VGA T8712 TPC28T L8700 0.36UH 1 B 2 1 1 2 VGA_RC2 R8715 2.2Ohm 10V440000006 /VGA 1 /N14E-GL 2 SIRA10DP-T1-GE3 5 G G SIRA10DP-T1-GE3 /VGA S S 4 3 2 1 8 7 6 5 D 8 7 6 5 D 2 nb_r0402_short_5mil_small Q8707 4 3 2 1 Q8705 2 Irat=24A /VGA C8725 10UF/6.3V 20% /VGA 2 C8704 /VGA MLCC/+/-10% 0.22UF/16V vx_c0402_small 1 2 SR8700 1 DGPU_PWROK C8719 10UF/25V MLCC/+/-10% 1AV500000015 /VGA 1 R8711 /VGA 0 0Ohm vx_r0603_h28_small 2 VGA_BST2_R 1 VGA_BST2 10% 1 @ 91,92 @ 1 @ 5 B 1 2 @ C8724 4700PF/25V 121206 C8714 0.1UF/25V @ 121015 2 GND_RT8812A C8715 1500PF/50V 1AV200000095 VGA_HG2 2 1 C8711 390PF/50V R8730 16KOHM GND_RT8812A 2 121009 /VGA Q8708 SIRA14DP-T1-GE3 07V040000100 @ 4 3 2 1 1 C8709 /VGA 1UF/10V 1AV300000025 5 +5VS Q8704 SIRA14DP-T1-GE3 07V040000100 G 2 R8727 15KOhm /VGA 10V220000023 2 130115 +AC_BAT_SYS 5 R8710 /VGA 0Ohm 0 vx_r0603_h28_small 2 1 VID PSI EN UGATE1 BOOT1 2 SS VSNS PGOOD UGATE2 BOOT2 1 1 1 C8703 @ 2700PF/50V MLCC/+/-10% vx_c0402_small 1 S 2 Phase FCCM C8721 /VGA 0.1UF/10V vx_c0402_small 10% VGA_LX1 VGA_LG1 VGA_VDD VGA_LG2 VGA_LX2 G R8720 /VGA 100Ohm 1% vx_r0402_small R8729 80.6KOhm 10V220000098 @ 21 20 19 18 17 16 S 1 Phase FCCM 1 2 2 121030 GND REFADJ PHASE1 REFIN LGATE1 VREF PVCC TON LGATE2 RGND PHASE2 11 12 13 14 15 2 1 2 2 @ SR8705 NB_R0402_20MIL_SMALL +VGA_VCORE 6 7 8 9 10 VGA_REFADJ VGA_REFIN VGA_VREF 8 7 6 5 D 1 Phase DEM R8728 1 43KOhm 2 8 7 6 5 D ~ 0.8V 1.2 ~ 1.8V 2.4V ~ NVDD_SENSE VO_action 1 VGA_PSI# R8700 /VGA 499KOhm 1% vx_r0402_small 1 121030 NVDD_GND_SENSE C8723 /VGA 100PF/50V vx_c0402_small 5% 5 4 3 2 1 +AC_BAT_SYS R8718 /VGA 1% 100Ohm vx_r0402_small 1 2 2 U8700A /VGA RT8812AGQW C8726 10UF/6.3V 20% /VGA CE8702 560UF/2.5V 1BV090000002 /VGA C8705 1500PF/50V 1AV200000095 /VGA T8703 TPC28T T8707 TPC28T T8708 TPC28T 1 1 22 23 1 U8700B /VGA GND1 GND2 +VGA_VCORE 1 T8704 TPC28T T8701 TPC28T T8702 TPC28T 1 A 1 RT8812AGQW A Title : Engineer: Size Rev VA70HW Custom Date: 5 4 3 2 POWER_VGACORE Alex Project Name Friday, January 18, 2013 1 Sheet 1.1 87 of 99 5 4 3 2 1 BATTERY CHARGER Adapter 120W=6.32A Adapter 90W=4.74A Adapter 65W=3.42A 2 EMI Request,Close Q8806 1 2 2 C8816 0.01UF/50V 1AV200000021 R8818 560KOhm 10V240000037 @ EMI Request,Close Q8806 2 1 1 1 1 1 1 1 1 1 1 1 1 C8812 10UF/25V MLCC/+/-10% 2 1 2 JP8803 SHORT_PIN C8811 10UF/25V MLCC/+/-10% +BAT C8815 @ 10UF/25V MLCC/+/-10% 2 2 1 2 1 +BAT JP8802 SHORT_PIN C8826 @ 0.1UF/25V 1AV300000007 MLCC 0.1UF/25V(0603) X7R 10% C8807 2 CHG_SRN_R C8808 0.1UF/25V MLCC 0.1UF/25V(0603) X7R 10% 1AV300000007 CGH_SRP 2 1 0.1UF/25V 1AV300000007 SR8806 SR8807 R0603 R0603 1 4.02KOhm RES 4.02K OHM 1/10W(0603)1% 10V320000061 2 2 CHG_SRP_R 1 1 CHG_LG 2 10mOhm (1206) 1% 1 1 G 2 CHG_RC 8 7 6 5 D S 1 2 Q8805 IRF8707PBF 07V040000099 1 2 3 4 2 1 BATDRV SRN SRP GND1 LODRV D8800 0.8V/0.2mA T8826 TPC28T 1 +BAT_R 1 1 1 C8821 0.01UF/50V 10% @ 1AV200000021 2 2 R8819 @ 2.2Ohm 10V440000006 +AC_BAT_SYS R8810 2 2 BATG 1 R8816 @ 150KOhm 1% RES 150K OHM 1/16W (0402)1% C8810 10% 0.047UF/16V 1AV200000048 C8824 1UF/25V (0603) X5R 10% CHG_LDO R8809 22Ohm RES 22 OHM 1/8W(0805)5% 10V440000007 0.8V/0.2mA 1 CHG_LX 1 2 +BAT 2 SR8801 R0603 R2.0 L8800 4.7UH Irat=5.5A CHG_HG 2CHG_BST_R 2 1 CHG_BST 1 2 2CHG_VCC 1 30,60 SMB0_CLK R8815 560KOhm 5% RES 560K OHM 1/16W(0402)5% 10V240000037 ACDET IOUT SDA SCL ILIM C8819 0.47UF/25V MLCC 0.47UF/25V (0603) X5R 10% CHG_VCC 1AV300000032 1 1 R8817 3CHG_VCC_R 1 2 R0603 SR8803 21 20 19 18 17 16 3 1 SMB0_DAT GND2 VCC PHASE HIDRV BTST REGN 1 30,60 2 1 6 7 8 9 10 R0603 SR8802 1 1 C T8822 T8821 TPC28T T8824 T8823 TPC28T TPC28T T8820 TPC28T TPC28T 121015 11 12 13 14 15 D8801 ACOK ACDRV CMSRC ACP ACN C8820 100PF/50V (0402) NPO 5% 1 R8814 12.4KOHM 1% RES 12.4K OHM 1/16W(0402) 1% 10V220000278 +3VA 2 1 1 1 R8804 C8825 68KOhm 0.1UF/10V RES 68K OHM 1/16W (0402) 1% 10V220000168 1AV200000024 1 1 1 1 2 C8823 @ 0.1UF/25V 10% 1AV300000007 1 5 4 3 2 1 2 30 2 2 2 AD_IINP +BAT T8808 T8809 TPC28T T8811 T8819 TPC28T TPC28T T8810 TPC28T TPC28T 1 2 3 4 G D T8825 TPC28T C C8818 10UF/25V MLCC/+/-10% @ 2 1 2 1 1 2 8 7 6 5 C8817 10UF/25V MLCC/+/-10% +BAT_CON T8804 T8805 TPC28T T8807 T8812 TPC28T TPC28T T8806 TPC28T TPC28T 1 1 CHG_ACP C8822 Q8804 1500PF/50V IRF8707PBF 1AV200000095 07V040000099 1 2 T8800 T8801 TPC28T T8803 T8813 TPC28T TPC28T T8802 TPC28T TPC28T +AC_BAT_SYS U8800A BQ24735RGRR 06V370000005 +BAT_CON 1AV200000095 +AC_BAT_SYS ACDRV 1/16W (0402) 1% +BAT_CON @ JP8801 C8827 3MM_OPEN_5MIL 1 2 1500PF/50V 1 2 X7R 10% MLCC 1500PF/50V(0402) 1 @ S 1 AC_IN_OC BATG CHG_ACN R8813 1% 10KOhm 1 30,74,90 +BAT IRF8707PBF 07V040000099 C8805 0.1UF/25V MLCC 0.1UF/25V(0603) X7R 10% 1AV300000007 1 1 2 R8803 432KOhm 10V220000320 G JP8800 3MM_OPEN_5MIL 1 2 1 2 1 1 2 2 C8814 0.1UF/25V MLCC 0.1UF/25V(0603) X7R 10% 0.1UF/25V MLCC 0.1UF/25V(0603) X7R 10% 1AV300000007 1AV300000007 1 2 3 4 S C8828 C8813 1500PF/50V 1500PF/50V MLCC 1500PF/50V(0402) X7R 10% 1AV200000095 1AV200000095 @ C8806 1 2 2 1 CHG_LDO SR8805 R0603 1 SR8804 R0603 R8806 4.02KOhm RES 4.02K OHM 1/10W(0603)1% R8802 10V320000061 4.02KOhm 1% RES 4.02K OHM 1/10W(0603)1% 10V320000061 2 2 C8801 2.2UF/25V MLCC/+/-10% MLCC 2.2UF/25V (1206) X7R 10% +AC_BAT_SYS 2 IRF8707PBF 07V040000099 C8803 0.1UF/25V MLCC 0.1UF/25V(0603) X7R 10% 1AV300000007 ACG 10mOhm D 1 +A/D_DOCK_IN_Q_Q 8 7 6 5 1 R8808 RES 10m OHM 1W (1206) 1% 1 2 2 G 8 7 6 5 2 D 1 2 IRF8707PBF 07V040000099 1 1 S 2 G 1 2 3 4 +A/D_DOCK_IN_Q 1 Q8802 1 2 3 4 S 2 D 1 1 1 8 7 6 5 2 C8830 10UF/25V MLCC/+/-10% @ R8801 C8802 2.2ohm 2200PF/50V RES FILM 2.2 ohm 1/2W 1206 5% 1 4/24 2 +A/D_DOCK_IN 1 1 1 60 +A/D_DOCK_IN D Q8806 Q8800 T8818 T8814 T8815 T8816 T8817 TPC28T TPC28T TPC28T TPC28T TPC28T 1 D C8809 0.1UF/25V MLCC 0.1UF/25V(0603) X7R 10% 1AV300000007 CGH_SRN B B 1 AC_IN_OC R8820 100KOhm 1% 2 U8800B SR8808 1 GND6 GND5 GND4 GND3 BAT_LEARN 2 R0402 RES 1M OHM 1/16W (0402) 5% 1 G 2 S 2N7002 2 R8805 1MOhm 1 1 5% 1 2 SR8800 R0603 BQ24735RGRR 06V370000005 D Q8803 2 ACDRV 3 R8807 5% 2MOHM (0402)5% 2 1 25 24 23 22 C8829 0.022UF/16V 10% 1AV200000027 R2.0 A A Title : POWER_CHARGER Engineer: Size Date: 5 4 3 2 Alex Project Name Rev VP70HW Custom Friday, January 18, 2013 Sheet 1 88 1.1 of 15 5 4 3 2 1 P.90 ADAPTER IN DETECT D D 30,74,88 AC_IN_OC 1 BATTERY IN DETECT TPC28T T9018 BAT1_IN_OC# 30 1 3 C JP9024 SHORT_PIN R9008 100KOhm @ @ B 1 1 Q9006 PMBS3904 E 2 2 TS1# AC_IN_OC# 1 2 60 2 C9001 0.1UF/25V 10% @ 1AV300000007 C C B B A A Title : POWER_DETECT Engineer: Alex Size Project Name Custom Date: 5 4 3 2 Rev VP70HW Friday, January 18, 2013 Sheet 1 1.1 90 of 99 3 2 SUSB#_PWR POWER 1 SUSC#_PWR POWER T9103 T9107 T9121 TPC26T TPC26T TPC26T 1 2 1 1 D 3 1 1 C9115 @ 0.1UF/25V vx_c0603_small 10% 1AV300000007 T9119 T9123 T9102 TPC26T TPC26T TPC26T 2 2 1 G C9109 @ Q9103 @ VGS= 4.5V , Rdson = 41mOhm 47PF/50V IRFML8244TRPBF VGS= 10V , Rdson = 24mOhm vx_c0402_small 2 1 +3V_SW_1 5% R9104 22KOhm vx_r0402_small 1% 2 R9105 47KOhm vx_r0402_small 1% 1 1 1 2 1 2 C9101 0.1UF/25V vx_c0603_small 10% 1AV300000007 +3VS (Max:3.973A) C9108 0.1UF/25V vx_c0603_small 10% 1AV300000007 G C9100 @ Q9100 VGS= 4.5V , Rdson = 41mOhm 47PF/50V IRFML8244TRPBF VGS= 10V , Rdson = 24mOhm vx_c0402_small 2 1 5% +3VS_SW_R 1 +3VO 2 S D 1 3 +3VO 2 S T9101 T9115 T9106 TPC26T TPC26T TPC26T +3V (Max:1.3875A) 1 4 1 5 C9114 @ 0.1UF/25V vx_c0603_small 10% 1AV300000007 @ C9103 0.1UF/25V vx_c0603_small 10% 1AV300000007 1 R9106 47KOhm vx_r0402_small 1% 2 C9107 0.033UF/16V vx_c0402_small 10% 2 2 1 G C9116 @ Q9101 VGS= 4.5V , Rdson = 41mOhm 47PF/50V IRFML8244TRPBF VGS= 10V , Rdson = 24mOhm vx_c0402_small 2 1 +5VS_SW_R 5% +5VS (Max:2.263A) 1 1 1 D 1 3 +5VO 1 D 2 S D 121015 1 +5VO Q9107B UM6K1N Q9107A UM6K1N 1 2 2 R9124 @ 560KOhm T9120 TPC26T vx_r0402_small 5% 2 1 3 1 +12V (Max:0.005A) 5 1 SUSC#_PWR 1 5% Q9106B UM6K1N @ 4 6 560KOhm 1 SUSB#_PWR 5 4 2 T9142 TPC28T 2 R9103 @ 560KOhm vx_r0402_small 5% 6 1 1 R9125 1 +5VO 1 +12VSUS +12VS (Max:0.01A) 3 1 T9108 T9124 T9111 TPC26T TPC26T TPC26T R9126 5% 560KOhm 2 1 +12VSUS 1 T9113 T9114 T9117 TPC26T TPC26T TPC26T Q9106A UM6K1N @ C C DSC#_PWR POWER(dGPU) 1 2 C9119 200KOhm 0.1UF/25V vx_c0402_small 10V220000037 10% /VGA /VGA 121028 1 JP9101 2 2 2 3mm_open_5mil_m1m2 Q9112 @ IRFML8244TRPBF 1 1 G 1 C9128 @ 47PF/50V vx_c0402_small 5% VGS= 4.5V , Rdson = 22mOhm VGS= 10V , Rdson = 17mOhm 2 2 1 3 +5VO 10KOhm C9118 0.1UF/25V vx_c0402_small 10V220000003 10% /VGA 1 +3VS_VGA (Max:0.543A) C9122 @ 0.1UF/25V 10% 121023 B 2 S D B T9139 T9141 T9140 TPC26T TPC26T TPC26T +5VSUS 1 1 1 1 /VGA 1 2 R9114 2 1 VSUS_ON POWER +1.05VS_VGA (Max:2.665A) C9102 @ 0.1UF/25V 10% T9126 T9132 T9138 TPC26TTPC26TTPC26T 121016 G 3 D 2 S Q9115 /VGA IRFML8244TRPBF /VGA 2 1 G SIRA10DP-T1-GE3 /VGA VGS= 10V , Rdson = 3.2mOhm +3VO D9102 1.2V/0.1A 2 R9113 1 1 1 1 1 S 2 5 1 2 3 4 1 1 +1.05VO 8 7 6 5 D 1 T9130 T9129 T9136 TPC26TTPC26TTPC26T Q9116 C9127 @ 0.1UF/25V vx_c0402_small 10% (Max:4A) 121206 1 R9115 +12VSUS 1KOhm vx_r0402_small 1% 2 C9129 @ 0.1UF/25V vx_c0402_small 10% 2 R9129 @ 560KOhm vx_r0402_small 5% @ 3 1 +5VSUS_SW_R @ 2 R9128 @ 560KOhm vx_r0402_small 5% 5 4 1 Q9113B UM6K1N 6 +5VA @ 2 VSUS_ON 1 30,57,81,93 Q9113A UM6K1N T9125 T9143 T9144 TPC26TTPC26TTPC26T A SUSB#_PWR SP9100@ nb_r0402_short_5mil_small 2 T9118 TPC26T 30,50,57 SUSC_EC# 83,93 SUSC#_PWR 1 82,83,84,86,93 1 1 SUSB_EC# 1 22,23,30,57,92 B B 6 10K 2 47K 47K C 1 T9109 TPC26T 68@-5mA/Vceo=+/-50V 1 SP9101@ nb_r0402_short_5mil_small 2 R9111 10KOhm 10V220000003 /VGA 1 1 121028 /VGA T9116 TPC26T A 1 T9122 TPC26T E 1 87 DGPU_EN_PWR DGPU_EN_PWR +12VS_VGA (Max:0.01A) 2 47K 3 4 1 C E Q9111 +12VSUS DSC_VGA_PWR POWER Control TPC26T T9135 R1.0 0103 1 TPC26T T9149 2 Title : POWER_LOAD SWITCH R0603(1KOhm) Engineer: 1 87 DGPU_EN_PWR 1 SR9123 VGA_PWRON Size Custom Date: 5 4 3 2 Alex Project Name Rev VP70HW Friday, January 18, 2013 Sheet 1 91 1.1 of 94 5 4 3 +3VS 2 1 1 POWER GOOD DETECTER 2 R9205 100KOhm 1% T9203 TPC28T D 1 84 +1.5VS_PWRGD D 1 2 SR9204 R0402 T9202 TPC28T 1 A 3 T9210 TPC28T 1 1 +1.05VS_PWRGD T9200 TPC28T 2 GND 4 1 T9204 TPC28T Y U9200 @ Vcc=2~5.5 2 SR9201 R0402 C VCC 2 B SR9200 R0402 82 5 1 SR9203 R0402 2 ALL_SYSTEM_PWRGD 10,30 PM_PWROK 10,22,30 1 2 1 1 83 DDR_PWRGD +3VSUS 1 R9202 @ 0Ohm C T9207 TPC26T 1 1 87,91 DGPU_PWROK 2 R9208 @ 0Ohm vx_r0402_small 1 +3VSUS R9206 100KOhm 1% 2 1 30,81 SUS_PWRGD 2 T9206 TPC28T 1 D9201 1.2V/0.1A B B 1 2 DELAY_VR_AND_ALL_SYS 22 SR9202 R0402 T9201 TPC28T +3VS SUSB_EC# FORCE_OFF# 3 GND 2 3 1 2 1 4 4 Q9200A UM6K1N 2 Y U9201 @ Vcc=2~5.5 1 2 B ALL_SYSTEM_PWRGD D9202 1.2V/0.1A 32,50,81 FORCE_OFF_PWR 81 5 2 2 5 6 1 A VCC R9201 560KOhm 5% D9200 1.2V/0.1A +3VSUS 1 A 1 30,80 VRM_PWRGD R9204 100KOhm 1% 2 T9208 TPC28T 1 Change to 1.91K 1 1 22,23,30,57,91 SUSB_EC# Q9200B UM6K1N C9200 4.7UF/6.3V 10% A Title : Engineer: Size Date: Friday, January 18, 2013 4 3 2 Alex Project Name Custom 5 POWER_PROTECT Rev VP70HW Sheet 1 92 1.1 of 94 5 4 3 2 1 FOR POWER TEST +AC_BAT_SYS +AC_BAT_SYS 45,80,81,82,83,86,87,88 +BAT_CON 60,88 +3VA +3VA 20,27,30,52,56,57,65,81,88 +3VA +5VO +5VO 81,84,91 +3VO +3VO 37,81,84,91 +1.05VS +1.05VS +1.05VO +1.05VO +12VSUS JP9301 @ SGL_JUMP 1 2 1 2 86,91 82,91 JP9303 @ SGL_JUMP 1 2 1 2 +12VSUS 22,28,53,81,91 +5VSUS +5VSUS 22,25,52,53,81,82,83,86,91 +3VSUS +3VSUS 4,10,22,23,27,28,30,33,53,81,92 +12V +12V 91 +3V +3V 4,23,31,40,55,57,91 +12VS +12VS 20,28,48,91 +5VS +5VS 25,30,31,36,37,46,48,50,51,56,57,58,80,87,91 +3VS +3VS 16,17,20,21,22,23,25,26,27,28,30,32,33,36,37,44,45,46,48,50,51,53,57,58,91,92 C JP9302 @ SGL_JUMP 2 1 2 1 +1.5VS +1.5VS 20,21,22,24,26,27,53,57,84,86,91 +1.05VS +1.05VS 4,10,26,27,57,82,87 +VCORE +VCORE 6,9,57,80 1 JP9304 @ SGL_JUMP 2 1 2 D CPU_VRON_PWR 1 50,52,81,91 80 T9301 TPC28T SUSB#_PWR 82,83,84,86,91 1 +5VA T9302 TPC28T SUSC#_PWR 83,91 1 +5VA T9300 TPC28T T9303 TPC28T VSUS_ON 30,81,91 1 JP9300 @ SGL_JUMP 1 2 1 2 T9304 TPC28T 1 +BAT_CON D DGPU_EN_PWR C 84,87,91 B B A A Title : Engineer: Size Date: Friday, January 18, 2013 4 3 2 Alex Project Name Custom 5 POWER_SIGNAL Rev VP70HW Sheet 1 93 1.1 of 94 www.s-manuals.com
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