Quanta FX6 Schematics. Www.s Manuals.com. R3a Schematics
User Manual: Motherboard Quanta FX6 Hepburn AMD UMA - Schematics. Free.
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1 2 3 4 5 6 7 8 Hepburn AMD UMA POWER VER : A00 A REGULATOR CPU VR +1.5V_RUN/+1.1V_RUN FAN & THERMAL EMC1423 DDRII-SODIMM1 PG 16,17 PG 29 AMD S1G2 800 MHz DDR II 64 X2 CLOCK (638 S1 socket) DDRII-SODIMM2 PG 16,17 Panel Connector PG 26 B VGA RS780M Fixed SATA ODD PG 34 C PCIEx1 528 FCBGA 21mmX21mm Side Port Memory PG 11 SATA - HDD PG 30 PCIEx1 USB2.0 USB2.0 USB2.0 SATA SB700 USB2.0 x 4 528 BGA 21mmX21mm PG 32 PG 31 USB2.0 PG 55 PG 37 MINI-CARD WWAN PG 40 MINI-CARD WPAN PG 39 C PG 44 1394 1394 CONN. PG 36 8-in-1 Card Reader R5C833 PG 35 Card Reader CONN. PG 36 LPC Audio Jacks x3 PG 32 CIR PG 43 TSOP36136TS KBC ITE8512 18X8 PG 42 SPI USER INTERFACE PG 44 3 FLASH 16Mbits PG 41 B RJ45/Magnetics PG 34 PG 39 Biometric 33MHz PCI Camera + D-MIC PG 32 2 PG 46 M82_POWER PG 60 MINI-CARD WLAN PG 12,13,14,15 D 1 +3.3V/+1.2V_SUS USB conn x 4 PG 38 AUDIO/AMP SPK conn +2.5V_RUN R5538 A_LINK USB2.0 Azalia USB2.0 A-MIC VCC_NB 1.2V_ALW_SUS PG 51,54 PG 52 +5V/+3.3V/+1.8V/+1.2V_RUN EXPRESS-CARD SATA SATA IDT_92HD73C PG 31 PG 49 AC/BATT CONNECTOR PG 54 PCIEx2 PG 7,8,9,10,11 E-SATA+USB CONN PG 38 +3.3V_ALW/+5V_ALW +15V_ALW/+5V_SUS PG 33 LAN 5784M PCIEx1 CRT CONN. PG 27 +1.8V_SUS/+1.2V_ALW /+0.9V_DDR_VTT PG 47 RUN POWER SW HT_LINK LVDS HDMI DC/DC A BATT CHARGER SLG8SP628VTR(QFN) PG 25 PG 3,4,5,6 HDMI CONN. PG 28 PG 53 PG 50 REGULATOR SYSTEM RESET CIRCUIT PG 45 PS/2 Keyboard PG 43 D Touchpad Title PG 43 4 QUANTA COMPUTER BLOCK DIAGRAM 5 6 Size Document Number FX6 Date: Tuesday, June 03, 2008 7 Rev 3A Sheet 1 8 of 70 1 2 3 4 5 INDEX Pg# A Description 1 Schematic Block Diagram 2 Index/Power States and USB/PCI/PCIe map 3-6 CPU page 7-11 12-15 RS780M page 16-17 DDRII SO-DIMM(200P) 18-23 Blank 24 B C SB700 page SB700 25 LCD/CRT HYBRID Clock Generator 26 LCD Conn. 27 CRT Conn 28 HDMI 29 FAN /THERMAL 30 SATA (HDD&CD_ROM) 31-32 Audio CODEC(92HD73)/Phone Jack 33-34 LOM /Switch 35-36 PC CARD/1394 37 EXPRESS 38 USB 39 Mini Card 40 WWAN 41 Flash ROM, RTC 42 ITE8512 43 TP/KB/CIR/BT 44 Switch,Keyboard & LED 45 System Reset Circuit 46 RUN POWER 47 Battery Charger 48 DCIN,Batt 49 1.8V_SUS,0.9VTT 50 1.5V_RUN AND 1.1V_RUN 51 +VCC_NB 52 +3.3V_ALW/+5V_SUS 53 VCC_VCORE 54 +1.2V_ALW_SUS 55 Blank 56 Power Rail for system 57 Power Sequence Diagram 58 SMBUS BLOCK 59 Stitch caps and Screw hole. 6 USB PORT# 7 8 DESTINATION 0 Left side USB. 1 Left side USB. 2 IO board 3 IO board 4 WLAN 5 WWAN 6 WPAN 7 EXPRESS 10 Biometric 11 Camera A B PCI TABLE PCI DEVICE IDSEL CardBus AD17 REQ#/GNT# PIRQ PCI EXPRESS DESTINATION Lane 1 WLAN Lane 2 WPAN Lane 3 LOM REQ#1/GNT#1 IRQ_SERIRQ IRQD Lane 4 EXPRESS CARD Lane 5 WWAN C PM TABLE +5V_RUN +3.3V_RUN power plane +2.5V_RUN +15V_ALW +5V_SUS +1.8V_RUN +5V_ALW +3.3V_SUS +1.2V_RUN +3.3V_ALW +1.8V_SUS +1.5V_RUN +0.9V_DDR_VTT +VCC_CORE +1.2V_ALW_SUS +NB_VCORE POWER STATES Signal SLP S3# SLP S5# S0 (Full ON) HIGH HIGH S3 (Suspend to RAM) LOW S4 (Suspend to DISK) S5 (SOFT OFF) State ALWAYS PLANE SUS PLANE RUN PLANE CLOCKS State ON ON ON ON S0 ON ON ON HIGH ON ON OFF OFF S3 ON ON OFF LOW HIGH ON OFF OFF OFF S5 S4/AC ON OFF OFF LOW LOW ON OFF OFF OFF S5 S4 on Battery OFF OFF OFF D D QUANTA COMPUTER Title 1 2 3 4 5 Index 6 Size Document Number FX6 Date: Tuesday, June 03, 2008 7 Rev 3A Sheet 2 of 8 70 5 4 3 2 1 +1.2V_RUN (19) C481 10U 10 X7R 0805 C489 10U 10 X7R 0805 C490 10U 10 X7R 0805 C483 0.22U 10 X7R 0603 C486 0.22U 10 X7R 0603 C484 180P 50 NPO C487 180P 50 NPO D D Place close to socket * If VLDT is connected only on one side, one 4.7uF C101 cap should be added to the island side U24A +1.2V_RUN D1 D2 D3 D4 C B VLDT_A0 VLDT_A1 VLDT_A2 VLDT_A3 +1.2V_RUN HT LINK VLDT_B0 VLDT_B1 VLDT_B2 VLDT_B3 AE2 AE3 AE4 AE5 L0_CADOUT_H0 L0_CADOUT_L0 L0_CADOUT_H1 L0_CADOUT_L1 L0_CADOUT_H2 L0_CADOUT_L2 L0_CADOUT_H3 L0_CADOUT_L3 L0_CADOUT_H4 L0_CADOUT_L4 L0_CADOUT_H5 L0_CADOUT_L5 L0_CADOUT_H6 L0_CADOUT_L6 L0_CADOUT_H7 L0_CADOUT_L7 L0_CADOUT_H8 L0_CADOUT_L8 L0_CADOUT_H9 L0_CADOUT_L9 L0_CADOUT_H10 L0_CADOUT_L10 L0_CADOUT_H11 L0_CADOUT_L11 L0_CADOUT_H12 L0_CADOUT_L12 L0_CADOUT_H13 L0_CADOUT_L13 L0_CADOUT_H14 L0_CADOUT_L14 L0_CADOUT_H15 L0_CADOUT_L15 AD1 AC1 AC2 AC3 AB1 AA1 AA2 AA3 W2 W3 V1 U1 U2 U3 T1 R1 AD4 AD3 AD5 AC5 AB4 AB3 AB5 AA5 Y5 W5 V4 V3 V5 U5 T4 T3 HT_CADOUT0 7 HT_CADOUT#0 7 HT_CADOUT1 7 HT_CADOUT#1 7 HT_CADOUT2 7 HT_CADOUT#2 7 HT_CADOUT3 7 HT_CADOUT#3 7 HT_CADOUT4 7 HT_CADOUT#4 7 HT_CADOUT5 7 HT_CADOUT#5 7 HT_CADOUT6 7 HT_CADOUT#6 7 HT_CADOUT7 7 HT_CADOUT#7 7 HT_CADOUT8 7 HT_CADOUT#8 7 HT_CADOUT9 7 HT_CADOUT#9 7 HT_CADOUT10 7 HT_CADOUT#10 7 HT_CADOUT11 7 HT_CADOUT#11 7 HT_CADOUT12 7 HT_CADOUT#12 7 HT_CADOUT13 7 HT_CADOUT#13 7 HT_CADOUT14 7 HT_CADOUT#14 7 HT_CADOUT15 7 HT_CADOUT#15 7 500mA C 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 HT_CADIN0 HT_CADIN#0 HT_CADIN1 HT_CADIN#1 HT_CADIN2 HT_CADIN#2 HT_CADIN3 HT_CADIN#3 HT_CADIN4 HT_CADIN#4 HT_CADIN5 HT_CADIN#5 HT_CADIN6 HT_CADIN#6 HT_CADIN7 HT_CADIN#7 HT_CADIN8 HT_CADIN#8 HT_CADIN9 HT_CADIN#9 HT_CADIN10 HT_CADIN#10 HT_CADIN11 HT_CADIN#11 HT_CADIN12 HT_CADIN#12 HT_CADIN13 HT_CADIN#13 HT_CADIN14 HT_CADIN#14 HT_CADIN15 HT_CADIN#15 E3 E2 E1 F1 G3 G2 G1 H1 J1 K1 L3 L2 L1 M1 N3 N2 E5 F5 F3 F4 G5 H5 H3 H4 K3 K4 L5 M5 M3 M4 N5 P5 7 7 7 7 HT_CLKIN0 HT_CLKIN#0 HT_CLKIN1 HT_CLKIN#1 J3 J2 J5 K5 L0_CLKIN_H0 L0_CLKIN_L0 L0_CLKIN_H1 L0_CLKIN_L1 L0_CLKOUT_H0 L0_CLKOUT_L0 L0_CLKOUT_H1 L0_CLKOUT_L1 Y1 W1 Y4 Y3 HT_CLKOUT0 7 HT_CLKOUT#0 7 HT_CLKOUT1 7 HT_CLKOUT#1 7 7 7 7 7 HT_CTLIN0 HT_CTLIN#0 HT_CTLIN1 HT_CTLIN#1 N1 P1 P3 P4 L0_CTLIN_H0 L0_CTLIN_L0 L0_CTLIN_H1 L0_CTLIN_L1 L0_CTLOUT_H0 L0_CTLOUT_L0 L0_CTLOUT_H1 L0_CTLOUT_L1 R2 R3 T5 R5 HT_CTLOUT0 7 HT_CTLOUT#0 7 HT_CTLOUT1 7 HT_CTLOUT#1 7 L0_CADIN_H0 L0_CADIN_L0 L0_CADIN_H1 L0_CADIN_L1 L0_CADIN_H2 L0_CADIN_L2 L0_CADIN_H3 L0_CADIN_L3 L0_CADIN_H4 L0_CADIN_L4 L0_CADIN_H5 L0_CADIN_L5 L0_CADIN_H6 L0_CADIN_L6 L0_CADIN_H7 L0_CADIN_L7 L0_CADIN_H8 L0_CADIN_L8 L0_CADIN_H9 L0_CADIN_L9 L0_CADIN_H10 L0_CADIN_L10 L0_CADIN_H11 L0_CADIN_L11 L0_CADIN_H12 L0_CADIN_L12 L0_CADIN_H13 L0_CADIN_L13 L0_CADIN_H14 L0_CADIN_L14 L0_CADIN_H15 L0_CADIN_L15 B FOX_PZ6382A-284S-41F A Title A QUANTA COMPUTER S1G2 HT I/F 5 4 3 2 Size Document Number FX6 Date: Wednesday, June 25, 2008 Rev 3A Sheet 1 3 of 70 A B C D E Notes for the SODIMM locations: DIMMA = CN5 DIMMB = CN6 VDD_VTT_SUS_CPU IS CONNECTED TO THE VDD_VTT_SUS POWER SUPPLY THROUGH THE PACKAGE OR ON THE DIE. IT IS ONLY CONNECTED ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE Processor DDR2 Memory Interface U24C MEM:DATA Place Capacitors for +0.9V_CPU_M_VREF_SUS < 1" from the RS780. +0.9V_CPU_M_VREF_SUS trace length < 6", trace width > 15mils and 20mils spacing from any adjacent signals in X, Y, Z directions. KEEP TRACE TO RESISTORS LESS THAN 1.0" FROM CPU PIN +0.9V_DDR_VTT D10 C10 B10 AD10 39.2/F R426 M_ZP M_ZN 39.2/F R423 +1.8V_SUS T28 16,17 16,17 AF10 AE10 MEM_MA_RESET# H16 T19 V22 U21 V19 M_ODT0 M_ODT1 16,17 DDR_CS0_DIMMA# 16,17 DDR_CS1_DIMMA# T20 U19 U20 V20 16,17 DDR_CKE0_DIMMA 16,17 DDR_CKE1_DIMMA J22 J20 16 M_CLK_DDR0 16 M_CLK_DDR#0 16 M_CLK_DDR1 16 M_CLK_DDR#1 N19 N20 E16 F16 Y16 AA16 P19 P20 3 16,17 DDR_A_MA[0..15] DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15 N21 M20 N22 M19 M22 L20 M24 L21 L19 K22 R21 L22 K20 V24 K24 K19 16,17 DDR_A_BS0 16,17 DDR_A_BS1 16,17 DDR_A_BS2 R20 R23 J21 16,17 DDR_A_RAS# 16,17 DDR_A_CAS# 16,17 DDR_A_WE# R19 T22 T24 U24B VTT1 VTT2 VTT3 VTT4 +0.9V_DDR_VTT MEM:CMD/CTRL/CLK VTT5 VTT6 VTT7 VTT8 VTT9 MEMZP MEMZN RSVD_M1 MA0_ODT0 MA0_ODT1 MA1_ODT0 MA1_ODT1 MA0_CS_L0 MA0_CS_L1 MA1_CS_L0 MA1_CS_L1 VTT_SENSE MEMVREF RSVD_M2 MB0_ODT0 MB0_ODT1 MB1_ODT0 MB0_CS_L0 MB0_CS_L1 MB1_CS_L0 MA_CKE0 MA_CKE1 MA_CLK_H5 MA_CLK_L5 MA_CLK_H1 MA_CLK_L1 MA_CLK_H7 MA_CLK_L7 MA_CLK_H4 MA_CLK_L4 MB_CKE0 MB_CKE1 MB_CLK_H5 MB_CLK_L5 MB_CLK_H1 MB_CLK_L1 MB_CLK_H7 MB_CLK_L7 MB_CLK_H4 MB_CLK_L4 MA_ADD0 MA_ADD1 MA_ADD2 MA_ADD3 MA_ADD4 MA_ADD5 MA_ADD6 MA_ADD7 MA_ADD8 MA_ADD9 MA_ADD10 MA_ADD11 MA_ADD12 MA_ADD13 MA_ADD14 MA_ADD15 MB_ADD0 MB_ADD1 MB_ADD2 MB_ADD3 MB_ADD4 MB_ADD5 MB_ADD6 MB_ADD7 MB_ADD8 MB_ADD9 MB_ADD10 MB_ADD11 MB_ADD12 MB_ADD13 MB_ADD14 MB_ADD15 MA_BANK0 MA_BANK1 MA_BANK2 MB_BANK0 MB_BANK1 MB_BANK2 MA_RAS_L MA_CAS_L MA_WE_L MB_RAS_L MB_CAS_L MB_WE_L W10 AC10 AB10 AA10 A10 Y10 1750mA CPU_VTT_SUS_SENSE 49 C398 *470P_NC 50 X7R CPU_VTT_SUS_SENSE W17 +0.9V_CPU_M_VREF_SUS B18 MEM_MB_RESET# T31 W26 W23 Y26 M_ODT2 M_ODT3 V26 W25 U22 DDR_CS0_DIMMB# DDR_CS1_DIMMB# 16,17 16,17 J25 H26 DDR_CKE2_DIMMB DDR_CKE3_DIMMB 16,17 16,17 P22 R22 A17 A18 AF18 AF17 R26 R25 M_CLK_DDR2 16 M_CLK_DDR#2 16 M_CLK_DDR3 16 M_CLK_DDR#3 16 P24 N24 P26 N23 N26 L23 N25 L24 M26 K26 T26 L26 L25 W24 J23 J24 DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15 16,17 16,17 DDR_B_MA[0..15] To SODIMM socket B (Near/TOP) 4 16 DDR_B_D[0..63] 16,17 R24 U26 J26 DDR_B_BS0 DDR_B_BS1 DDR_B_BS2 U25 U24 U23 DDR_B_RAS# 16,17 DDR_B_CAS# 16,17 DDR_B_WE# 16,17 16,17 16,17 16,17 2 16 DDR_B_DM[0..7] +1.8V_SUS R145 1K/F 0603 C140 0.1U 10 X7R +0.9V_CPU_M_VREF_SUS C141 0.1U 10 X7R C171 1000P 50 X7R DDR_B_DM0 DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7 DDR_B_DQS0 DDR_B_DQS#0 DDR_B_DQS1 DDR_B_DQS#1 DDR_B_DQS2 DDR_B_DQS#2 DDR_B_DQS3 DDR_B_DQS#3 DDR_B_DQS4 DDR_B_DQS#4 DDR_B_DQS5 DDR_B_DQS#5 DDR_B_DQS6 DDR_B_DQS#6 DDR_B_DQS7 DDR_B_DQS#7 FOX_PZ6382A-284S-41F R114 1K/F 0603 DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63 16 DDR_B_DQS[0..7] 1 PLACE CLOSE TO CPU 16 DDR_B_DQS#[0..7] sensing point for op-amp feedback routed near CPU DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7 C11 A11 A14 B14 G11 E11 D12 A13 A15 A16 A19 A20 C14 D14 C18 D18 D20 A21 D24 C25 B20 C20 B24 C24 E23 E24 G25 G26 C26 D26 G23 G24 AA24 AA23 AD24 AE24 AA26 AA25 AD26 AE25 AC22 AD22 AE20 AF20 AF24 AF23 AC20 AD20 AD18 AE18 AC14 AD14 AF19 AC18 AF16 AF15 AF13 AC12 AB11 Y11 AE14 AF14 AF11 AD11 A12 B16 A22 E25 AB26 AE22 AC16 AD12 C12 B12 D16 C16 A24 A23 F26 E26 AC25 AC26 AF21 AF22 AE16 AD16 AF12 AE12 MB_DATA0 MB_DATA1 MB_DATA2 MB_DATA3 MB_DATA4 MB_DATA5 MB_DATA6 MB_DATA7 MB_DATA8 MB_DATA9 MB_DATA10 MB_DATA11 MB_DATA12 MB_DATA13 MB_DATA14 MB_DATA15 MB_DATA16 MB_DATA17 MB_DATA18 MB_DATA19 MB_DATA20 MB_DATA21 MB_DATA22 MB_DATA23 MB_DATA24 MB_DATA25 MB_DATA26 MB_DATA27 MB_DATA28 MB_DATA29 MB_DATA30 MB_DATA31 MB_DATA32 MB_DATA33 MB_DATA34 MB_DATA35 MB_DATA36 MB_DATA37 MB_DATA38 MB_DATA39 MB_DATA40 MB_DATA41 MB_DATA42 MB_DATA43 MB_DATA44 MB_DATA45 MB_DATA46 MB_DATA47 MB_DATA48 MB_DATA49 MB_DATA50 MB_DATA51 MB_DATA52 MB_DATA53 MB_DATA54 MB_DATA55 MB_DATA56 MB_DATA57 MB_DATA58 MB_DATA59 MB_DATA60 MB_DATA61 MB_DATA62 MB_DATA63 MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7 MA_DATA8 MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15 MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23 MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31 MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39 MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47 MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55 MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63 MB_DM0 MB_DM1 MB_DM2 MB_DM3 MB_DM4 MB_DM5 MB_DM6 MB_DM7 MA_DM0 MA_DM1 MA_DM2 MA_DM3 MA_DM4 MA_DM5 MA_DM6 MA_DM7 MB_DQS_H0 MB_DQS_L0 MB_DQS_H1 MB_DQS_L1 MB_DQS_H2 MB_DQS_L2 MB_DQS_H3 MB_DQS_L3 MB_DQS_H4 MB_DQS_L4 MB_DQS_H5 MB_DQS_L5 MB_DQS_H6 MB_DQS_L6 MB_DQS_H7 MB_DQS_L7 MA_DQS_H0 MA_DQS_L0 MA_DQS_H1 MA_DQS_L1 MA_DQS_H2 MA_DQS_L2 MA_DQS_H3 MA_DQS_L3 MA_DQS_H4 MA_DQS_L4 MA_DQS_H5 MA_DQS_L5 MA_DQS_H6 MA_DQS_L6 MA_DQS_H7 MA_DQS_L7 G12 F12 H14 G14 H11 H12 C13 E13 H15 E15 E17 H17 E14 F14 C17 G17 G18 C19 D22 E20 E18 F18 B22 C23 F20 F22 H24 J19 E21 E22 H20 H22 Y24 AB24 AB22 AA21 W22 W21 Y22 AA22 Y20 AA20 AA18 AB18 AB21 AD21 AD19 Y18 AD17 W16 W14 Y14 Y17 AB17 AB15 AD15 AB13 AD13 Y12 W11 AB14 AA14 AB12 AA12 E12 C15 E19 F24 AC24 Y19 AB16 Y13 G13 H13 G16 G15 C22 C21 G22 G21 AD23 AC23 AB19 AB20 Y15 W15 W12 W13 DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63 DDR_A_D[0..63] 4 DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7 3 DDR_A_DM[0..7] 2 16 DDR_A_DQS0 DDR_A_DQS#0 DDR_A_DQS1 DDR_A_DQS#1 DDR_A_DQS2 DDR_A_DQS#2 DDR_A_DQS3 DDR_A_DQS#3 DDR_A_DQS4 DDR_A_DQS#4 DDR_A_DQS5 DDR_A_DQS#5 DDR_A_DQS6 DDR_A_DQS#6 DDR_A_DQS7 DDR_A_DQS#7 FOX_PZ6382A-284S-41F Athlon 64 S1 Processor Socket 16 DDR_A_DQS[0..7] DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7 16 To SODIMM socket A (Far/Bottom) CPU_VTT_SUS_SENSE should be routed as 10mils and 10mils spacing from any adjacent signals in X, Y, Z directions. 16 DDR_A_DQS#[0..7] Title DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7 DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7 1 QUANTA COMPUTER S1G2 DDRII MEMORY A B C D Size Document Number FX6 Date: Wednesday, June 25, 2008 Rev 3A Sheet E 4 of 70 5 4 3 2 1 +1.8V_SUS +3.3V_RUN R80 +3.3V_RUN +3.3V_RUN +1.8V_RUN C98 *0.1U_NC R79 10 *34.8K_NC X7R 3 CPU_LDT_REQ# 9 CPU_THERMTRIP# CPU_MEMHOT#_L Q84 FDV301N 2 Q12 *FDV301N_NC 1 3 1 3 1 CPU_MEMHOT# 16 2N7002W-7-F C761 0.1U 10 X7R +1.8V_SUS D R395 10K 1 D Q83 R59 *680_NC Q5 MMBT3904 2 2 CPU_LDT_REQ#_R R63 10K H_THERMTRIP# 52 R776 1M 2 R389 300 3 *20K_NC 0 Q61 MMBT3904 CPU_THERMTRIP#_1.8V 1 +5V_ALW2 2-Bit Boot VID Codes 53 Q17 FDV301N SVC 2 3 R90 300 C744 *0.1U_NC 16 X7R LAYOUT: ROUTE VDDA TRACE APPROX. 50 mils WIDE (USE 2x25 mil TRACES TO L65 ferrite bead with an approximate impedance of 33 , a maximum DC resistance of 0.025 ohm , and a current rating of at least 3000mA. 2 D5 1 (20) Q14 FDV301N 1 CPU_PWRGD 12 CPU_PWRGD CPU_THERMTRIP# 13 EXIT BALL FIELD) AND 500 mils LONG. This trace should be kept at least 20 mils away from all other signals. 0 0 1 1 CPU_PROCHOT# Voltage Output SVD (CPU Power) 0 1.1V 1 1.0V 0 0.9V 1 0.8V +2.5V_CPU_VDDA_RUN 3 3 CPU_PWRGD_SVID_REG CPU_THERMTRIP# 3 (16) Q86 2N7002W-7-F 2 BID1 42 1 CPU_PWRGD_SVID_REG R87 10K +1.8V_RUN 2 R72 +1.8V_SUS *RB500V-40_NC +1.8V_RUN +2.5V_RUN L18 CPU_PWRGD CPU_PWRGD_SVID_REG *0_NC R89 R99 300 C LDT_STOP# 9,12 LDT_STOP# C89 4.7U 10 X7R 0805 +2.5V_CPU_VDDA_RUN C94 C93 0.22U 3300P 10 50 X7R X7R 0603 40mA RB500V-40 Place R78 and R77 < 1.5". Route CPU_HTREF1/0 with 5mils trace width and 10mils spacing from other signals in X, Y, Z directions R97 300 9,12 +2.5V_CPU_VDDA_RUN BLM18PG330SN1B 0603 + C88 100U 6.3 Polymer 3528 If AMD SI is not used, the SID pin can be left unconnected and SIC should have a 300- ( 5%) pulldown to VSS. D8 +1.8V_RUN U24D R76 R74 +1.2V_RUN 44.2/F 44.2/F F8 F9 CPU_CLKIN_SC_P CPU_CLKIN_SC_N A9 A8 LDT_RST# CPU_PWRGD LDT_STOP# CPU_LDT_REQ#_R B7 A7 F10 C6 CPU_SIC CPU_SID CPU_ALERT AF4 AF5 AE6 CPU_HTREF0 CPU_HTREF1 R6 P6 CPU_VDD0_RUN_FB_H CPU_VDD0_RUN_FB_L F6 E6 CPU_VDD1_RUN_FB_H CPU_VDD1_RUN_FB_L Y6 AB6 CPU_DBRDY CPU_TMS CPU_TCK CPU_TRST# CPU_TDI G10 AA9 AC9 AD9 AF9 LDT_RST# LDT_RST# D7 13,45 SB_PWRGD RB500V-40 T12 +1.8V_SUS 53 CPU_VDD0_RUN_FB_H 53 CPU_VDD0_RUN_FB_L CPU_VDD0_RUN_FB_H CPU_VDD0_RUN_FB_L T25 T17 T27 T29 R383 R391 R394 T14 390 390 53 CPU_VDD1_RUN_FB_H 53 CPU_VDD1_RUN_FB_L 1K T23 T22 CPU_VDD1_RUN_FB_H CPU_VDD1_RUN_FB_L T19 13 13 SCLK3 SDATA3 SCLK3 SDATA3 R385 R388 T16 T75 T73 T76 T24 T77 CPU_SIC CPU_SID CPU_ALERT *0_NC *0_NC B 25 CPU_CLK C499 T71 CPU_CLKIN_SC_P CPU_CLKIN_SC_N 3900P 50 X7R CPU_CLK# C498 AD7 CPU_TEST18_PLLTEST1 CPU_TEST19_PLLTEST0 H10 G9 CPU_TEST25_H_BYPASSCLK_H CPU_TEST25_L_BYPASSCLK_L 3900P 50 X7R E9 E8 CPU_TEST21_SCANEN CPU_TEST20_SCANCLK2 CPU_TEST24_SCANCLK1 CPU_TEST22_SCANSHIFTEN CPU_TEST12_SCANSHIFTENB CPU_TEST27_SINGLECHAIN AB8 AF7 AE7 AE8 AC8 AF8 CPU_TEST9_ANALOGIN C2 AA6 R378 0 R402 169/F 25 CPU_TEST23_TSTUPD A3 A5 B3 B5 C1 VDDA1 VDDA2 KEY1 KEY2 CLKIN_H CLKIN_L RESET_L PWROK LDTSTOP_L LDTREQ_L SVC SVD R452 300 M11 W18 A6 A4 R400 300 R64 300 R398 1K R71 1K CPU_SVC_R CPU_SVD_R CPU_SVC 53 CPU_SVD 53 C THERMTRIP_L PROCHOT_L MEMHOT_L AF6 CPU_THERMTRIP#_1.8V AC7 CPU_PROCHOT# AA8 CPU_MEMHOT#_L CPU_PROCHOT# 12 H_THERMDC 29 SIC SID ALERT_L THERMDC THERMDA W7 W8 HT_REF0 HT_REF1 VDD0_FB_H VDD0_FB_L VDDIO_FB_H VDDIO_FB_L VDD1_FB_H VDD1_FB_L VDDNB_FB_H VDDNB_FB_L DBRDY TMS TCK TRST_L TDI DBREQ_L TDO TEST23 TEST28_H TEST28_L TEST18 TEST19 TEST17 TEST16 TEST15 TEST14 TEST25_H TEST25_L TEST21 TEST20 TEST24 TEST22 TEST12 TEST27 TEST7 TEST10 TEST8 TEST29_H TEST29_L TEST9 TEST6 RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 RSVD10 RSVD9 RSVD8 RSVD7 RSVD6 W9 Y9 H_THERMDC H_THERMDA C100 *220P/50V_NC H_THERMDA 29 Place C212< 100mils from CPU. CPU_VDDIO_SUS_FB_H CPU_VDDIO_SUS_FB_L H6 G6 E10 CPU_VDDNB_RUN_FB_H CPU_VDDNB_RUN_FB_L 49 49 53 53 CPU_DBREQ# AE9 CPU_TDO J7 H8 CPU_TEST28_H_PLLCHRZ_P CPU_TEST28_L_PLLCHRZ_N D7 E7 F7 C7 CPU_TEST17_BP3 CPU_TEST16_BP2 CPU_TEST15_BP1 CPU_TEST14_BP0 T11 T15 T72 T18 T13 T74 C3 K8 C4 C9 C8 CPU_TEST29_H_FBCLKOUT_P CPU_TEST29_L_FBCLKOUT_N T21 T20 B H18 H19 AA7 D5 C5 FOX_PZ6382A-284S-41F 1.KEEP TRACE TO RESISTOR LESS THAN 600MILS FROM CPU PIN AND TRACE TO AC CAPS LESS THAN 1.2". 2. CPUCLK and CPUCLK# mismatch < 35 mils. (18) +1.8V_SUS 300 *220_NC *220_NC *220_NC *220_NC CPU_TEST23_TSTUPD CPU_TEST21_SCANEN CPU_TEST24_SCANCLK1 R790 R777 R778 *300_NC 300 300 HDT CONNECTOR A +1.8V_SUS GND GND Resreved1 GND Resreved2 GND DBREQ_L GND DBRDY GND TCK GND TMS GND TDI GND TRST_L GND TDO GND VDDIO1 GND VDDIO2 RESET_L GND 2 4 6 8 10 12 14 16 18 20 22 24 25 +3.3V_RUN +1.8V_RUN If no use which Net need pull-up or down R117 *4.7K_NC CPU_RESET# 3 A R109 *4.7K_NC 2 R121 R126 R127 R137 R139 CN1 1 3 5 7 9 11 13 15 17 19 21 23 CPU_DBREQ# CPU_DBRDY CPU_TCK CPU_TMS CPU_TDI CPU_TRST# CPU_TDO Q19 *MMBT3904_NC 1 LDT_RST# *HDT conn_NC R110 R116 *100K_NC 0 Title S1G2 CTRL & DEBUG NOTE:HDT TERMINATION IS REQUIRED FOR REV.Ax SILICON ONLY. 5 QUANTA COMPUTER 4 3 2 Size Document Number FX6 Date: Wednesday, June 25, 2008 Rev 3A Sheet 1 5 of 70 5 4 3 PROCESSOR POWER AND GROUND +CPU_VDD1_RUN +CPU_VDDNB_RUN G4 H2 J9 J11 J13 J15 K6 K10 K12 K14 L4 L7 L9 L11 L13 L15 M2 M6 M8 M10 N7 N9 N11 VDD0_1 VDD0_2 VDD0_3 VDD0_4 VDD0_5 VDD0_6 VDD0_7 VDD0_8 VDD0_9 VDD0_10 VDD0_11 VDD0_12 VDD0_13 VDD0_14 VDD0_15 VDD0_16 VDD0_17 VDD0_18 VDD0_19 VDD0_20 VDD0_21 VDD0_22 VDD0_23 +1.8V_SUS K16 M16 P16 T16 V16 VDDNB_1 VDDNB_2 VDDNB_3 VDDNB_4 VDDNB_5 H25 J17 K18 K21 K23 K25 L17 M18 M21 M23 M25 N17 VDDIO1 VDDIO2 VDDIO3 VDDIO4 VDDIO5 VDDIO6 VDDIO7 VDDIO8 VDDIO9 VDDIO10 VDDIO11 VDDIO12 D C U24E VDD1_1 VDD1_2 VDD1_3 VDD1_4 VDD1_5 VDD1_6 VDD1_7 VDD1_8 VDD1_9 VDD1_10 VDD1_11 VDD1_12 VDD1_13 VDD1_14 VDD1_15 VDD1_16 VDD1_17 VDD1_18 VDD1_19 VDD1_20 VDD1_21 VDD1_22 VDD1_23 VDD1_24 VDD1_25 VDD1_26 P8 P10 R4 R7 R9 R11 T2 T6 T8 T10 T12 T14 U7 U9 U11 U13 U15 V6 V8 V10 V12 V14 W4 Y2 AC4 AD2 VDDIO27 VDDIO26 VDDIO25 VDDIO24 VDDIO23 VDDIO22 VDDIO21 VDDIO20 VDDIO19 VDDIO18 VDDIO17 VDDIO16 VDDIO15 VDDIO14 VDDIO13 Y25 V25 V23 V21 V18 U17 T25 T23 T21 T18 R17 P25 P23 P21 P18 AA4 AA11 AA13 AA15 AA17 AA19 AB2 AB7 AB9 AB23 AB25 AC11 AC13 AC15 AC17 AC19 AC21 AD6 AD8 AD25 AE11 AE13 AE15 AE17 AE19 AE21 AE23 B4 B6 B8 B9 B11 B13 B15 B17 B19 B21 B23 B25 D6 D8 D9 D11 D13 D15 D17 D19 D21 D23 D25 E4 F2 F11 F13 F15 F17 F19 F21 F23 F25 H7 H9 H21 H23 J4 +1.8V_SUS FOX_PZ6382A-284S-41F Athlon 64 S1 Processor Socket B VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 AC6 M17 N4 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y23 N6 BOTTOMSIDE DECOUPLING C103 22U 4 X6S 0805 C109 22U 4 X6S 0805 C115 22U 4 X6S 0805 C122 22U 4 X6S 0805 C123 0.22U 10 X7R 0603 C116 0.01U 16 X7R C111 22U 4 X6S 0805 C112 22U 4 X6S 0805 C118 22U 4 X6S 0805 C99 0.22U 10 X7R 0603 C105 0.01U 16 X7R C133 22U 4 X6S 0805 C128 0.22U 10 X7R 0603 C134 0.22U 10 X7R 0603 C136 180P 50 NPO C137 180P 50 NPO C104 180P 50 NPO D +CPU_VDD1_RUN C101 22U 4 X6S 0805 +1.8V_SUS C184 22U 4 X6S 0805 C102 180P 50 NPO +CPU_VDDNB_RUN C120 22U 4 X6S 0805 C127 22U 4 X6S 0805 C126 22U 4 X6S 0805 C DECOUPLING BETWEEN PROCESSOR AND DIMMs PLACE CLOSE TO PROCESSOR AS POSSIBLE +1.8V_SUS C173 4.7U 10 X7R 0805 C587 4.7U 10 X7R 0805 C172 4.7U 10 X7R 0805 C132 0.01U 16 X7R C585 4.7U 10 X7R 0805 C168 0.22U 10 0603 X7R C582 0.22U 10 0603 X7R C169 0.22U 10 0603 X7R C581 0.22U 10 0603 X7R C195,and C135 to be evenly spaced along the VDDIO/VSS plane split +1.8V_SUS C196 0.01U 16 X7R C179 180P 50 NPO C195 180P 50 NPO C135 180P 50 NPO B +0.9V_DDR_VTT C511 4.7U 10 X7R 0805 FOX_PZ6382A-284S-41F Athlon 64 S1 Processor Socket A1 1 +CPU_VDD0_RUN U24F +CPU_VDD0_RUN 2 C521 4.7U 10 X7R 0805 C504 4.7U 10 X7R 0805 C497 4.7U 10 X7R 0805 C509 1000P 50 X7R C508 1000P 50 X7R C510 1000P 50 X7R C513 0.22U 10 0603 X7R C512 0.22U 10 0603 X7R C517 0.22U 10 0603 X7R C519 0.22U 10 0603 X7R C110 180P 50 NPO C505 180P 50 NPO C507 180P 50 NPO C515 180P 50 NPO A26 +0.9V_DDR_VTT C500 1000P 50 X7R S1g2 uPGA638 Top View A A AF1 Title QUANTA COMPUTER S1G2 PWR & GND 5 4 3 2 Size Document Number FX6 Date: Wednesday, June 25, 2008 Rev 3A Sheet 1 6 of 70 5 4 3 2 1 D D U10A D24 D25 E24 E25 F24 F25 F23 F22 H23 H22 J25 J24 K24 K25 K23 K22 HT_CADIN0 HT_CADIN#0 HT_CADIN1 HT_CADIN#1 HT_CADIN2 HT_CADIN#2 HT_CADIN3 HT_CADIN#3 HT_CADIN4 HT_CADIN#4 HT_CADIN5 HT_CADIN#5 HT_CADIN6 HT_CADIN#6 HT_CADIN7 HT_CADIN#7 HT_TXCAD8P HT_TXCAD8N HT_TXCAD9P HT_TXCAD9N HT_TXCAD10P HT_TXCAD10N HT_TXCAD11P HT_TXCAD11N HT_TXCAD12P HT_TXCAD12N HT_TXCAD13P HT_TXCAD13N HT_TXCAD14P HT_TXCAD14N HT_TXCAD15P HT_TXCAD15N F21 G21 G20 H21 J20 J21 J18 K17 L19 J19 M19 L18 M21 P21 P18 M18 HT_CADIN8 3 HT_CADIN#8 3 HT_CADIN9 3 HT_CADIN#9 3 HT_CADIN10 3 HT_CADIN#10 3 HT_CADIN11 3 HT_CADIN#11 3 HT_CADIN12 3 HT_CADIN#12 3 HT_CADIN13 3 HT_CADIN#13 3 HT_CADIN14 3 HT_CADIN#14 3 HT_CADIN15 3 HT_CADIN#15 3 HT_TXCLK0P HT_TXCLK0N HT_TXCLK1P HT_TXCLK1N H24 H25 L21 L20 HT_CLKIN0 HT_CLKIN#0 HT_CLKIN1 HT_CLKIN#1 3 HT_RXCTL0P HT_RXCTL0N HT_RXCTL1P HT_RXCTL1N HT_TXCTL0P HT_TXCTL0N HT_TXCTL1P HT_TXCTL1N M24 M25 P19 R18 HT_CTLIN0 HT_CTLIN#0 HT_CTLIN1 HT_CTLIN#1 3 HT_RXCALP HT_RXCALN HT_TXCALP HT_TXCALN B24 B25 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 HT_CADOUT8 HT_CADOUT#8 HT_CADOUT9 HT_CADOUT#9 HT_CADOUT10 HT_CADOUT#10 HT_CADOUT11 HT_CADOUT#11 HT_CADOUT12 HT_CADOUT#12 HT_CADOUT13 HT_CADOUT#13 HT_CADOUT14 HT_CADOUT#14 HT_CADOUT15 HT_CADOUT#15 AC24 AC25 AB25 AB24 AA24 AA25 Y22 Y23 W21 W20 V21 V20 U20 U21 U19 U18 HT_RXCAD8P HT_RXCAD8N HT_RXCAD9P HT_RXCAD9N HT_RXCAD10P HT_RXCAD10N HT_RXCAD11P HT_RXCAD11N HT_RXCAD12P HT_RXCAD12N HT_RXCAD13P HT_RXCAD13N HT_RXCAD14P HT_RXCAD14N HT_RXCAD15P HT_RXCAD15N 3 3 3 3 HT_CLKOUT0 HT_CLKOUT#0 HT_CLKOUT1 HT_CLKOUT#1 T22 T23 AB23 AA22 HT_RXCLK0P HT_RXCLK0N HT_RXCLK1P HT_RXCLK1N 3 3 3 3 HT_CTLOUT0 HT_CTLOUT#0 HT_CTLOUT1 HT_CTLOUT#1 M22 M23 R21 R20 C23 A24 C B HT_TXCAD0P HT_TXCAD0N HT_TXCAD1P HT_TXCAD1N HT_TXCAD2P HT_TXCAD2N HT_TXCAD3P HT_TXCAD3N HT_TXCAD4P HT_TXCAD4N HT_TXCAD5P HT_TXCAD5N HT_TXCAD6P HT_TXCAD6N HT_TXCAD7P HT_TXCAD7N HT_CADOUT0 HT_CADOUT#0 HT_CADOUT1 HT_CADOUT#1 HT_CADOUT2 HT_CADOUT#2 HT_CADOUT3 HT_CADOUT#3 HT_CADOUT4 HT_CADOUT#4 HT_CADOUT5 HT_CADOUT#5 HT_CADOUT6 HT_CADOUT#6 HT_CADOUT7 HT_CADOUT#7 R363 300/F HT_RXCAD0P HT_RXCAD0N PART HT_RXCAD1P HT_RXCAD1N HT_RXCAD2P HT_RXCAD2N HT_RXCAD3P HT_RXCAD3N HT_RXCAD4P HT_RXCAD4N HT_RXCAD5P HT_RXCAD5N HT_RXCAD6P HT_RXCAD6N HT_RXCAD7P HT_RXCAD7N 1 OF 6 HYPER TRANSPORT CPU I/F Y25 Y24 V22 V23 V25 V24 U24 U25 T25 T24 P22 P23 P25 P24 N24 N25 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 C R367 3 3 3 B 3 3 3 300/F Rev.A12 RS780M A13 RS780 RX780 3 R363,R367 301 1.21K A Title A QUANTA COMPUTER RS780-HT LINK I/F 5 4 3 2 Size Document Number FX6 Date: Tuesday, June 03, 2008 Rev 3A Sheet 1 7 of 70 5 4 3 2 1 D D Place near RS780 U10B C B WLAN <----WPAN <----GIGA LAN <----EXPRESS CARD <----WWAN <----- AE3 AD4 AE2 AD3 AD1 AD2 V5 W6 U5 U6 U8 U7 39 PCIE_RX1+ 39 PCIE_RX139 PCIE_RX2+ 39 PCIE_RX233 PCIE_RX3+/GLAN_RX+ 33 PCIE_RX3-/GLAN_RX37 PCIE_RX4+ 37 PCIE_RX440 PCIE_RX5+ 40 PCIE_RX512 12 12 12 12 12 12 12 AA8 Y8 AA7 Y7 AA5 AA6 W5 Y5 ALINK_NBRX_SBTX_P0 ALINK_NBRX_SBTX_N0 ALINK_NBRX_SBTX_P1 ALINK_NBRX_SBTX_N1 ALINK_NBRX_SBTX_P2 ALINK_NBRX_SBTX_N2 ALINK_NBRX_SBTX_P3 ALINK_NBRX_SBTX_N3 GFX_RX0P GFX_RX0N GFX_RX1P GFX_RX1N GFX_RX2P GFX_RX2N GFX_RX3P GFX_RX3N GFX_RX4P GFX_RX4N GFX_RX5P GFX_RX5N GFX_RX6P GFX_RX6N GFX_RX7P GFX_RX7N GFX_RX8P GFX_RX8N GFX_RX9P GFX_RX9N GFX_RX10P GFX_RX10N GFX_RX11P GFX_RX11N GFX_RX12P GFX_RX12N GFX_RX13P GFX_RX13N GFX_RX14P GFX_RX14N GFX_RX15P GFX_RX15N GPP_RX0P GPP_RX0N GPP_RX1P GPP_RX1N GPP_RX2P GPP_RX2N GPP_RX3P GPP_RX3N GPP_RX4P GPP_RX4N GPP_RX5P GPP_RX5N SB_RX0P SB_RX0N SB_RX1P SB_RX1N SB_RX2P SB_RX2N SB_RX3P SB_RX3N PART 2 OF 6 PCIE I/F GFX D4 C4 A3 B3 C2 C1 E5 F5 G5 G6 H5 H6 J6 J5 J7 J8 L5 L6 M8 L8 P7 M7 P5 M5 R8 P8 R6 R5 P4 P3 T4 T3 PCIE I/F GPP PCIE I/F SB GFX_TX0P GFX_TX0N GFX_TX1P GFX_TX1N GFX_TX2P GFX_TX2N GFX_TX3P GFX_TX3N GFX_TX4P GFX_TX4N GFX_TX5P GFX_TX5N GFX_TX6P GFX_TX6N GFX_TX7P GFX_TX7N GFX_TX8P GFX_TX8N GFX_TX9P GFX_TX9N GFX_TX10P GFX_TX10N GFX_TX11P GFX_TX11N GFX_TX12P GFX_TX12N GFX_TX13P GFX_TX13N GFX_TX14P GFX_TX14N GFX_TX15P GFX_TX15N GPP_TX0P GPP_TX0N GPP_TX1P GPP_TX1N GPP_TX2P GPP_TX2N GPP_TX3P GPP_TX3N GPP_TX4P GPP_TX4N GPP_TX5P GPP_TX5N SB_TX0P SB_TX0N SB_TX1P SB_TX1N SB_TX2P SB_TX2N SB_TX3P SB_TX3N PCE_CALRP(PCE_BCALRP) PCE_CALRN(PCE_BCALRN) PCIE_MTX_GRX_P0 PCIE_MTX_GRX_N0 C421 PCIE_MTX_GRX_P1 C424 PCIE_MTX_GRX_N1 C416 PCIE_MTX_GRX_P2 C418 PCIE_MTX_GRX_N2 C407 PCIE_MTX_GRX_P3 C406 PCIE_MTX_GRX_N3 C408 C409 A5 B5 A4 B4 C3 B2 D1 D2 E2 E1 F4 F3 F1 F2 H4 H3 H1 H2 J2 J1 K4 K3 K1 K2 M4 M3 M1 M2 N2 N1 P1 P2 AC1 AC2 AB4 AB3 AA2 AA1 Y1 Y2 Y4 Y3 V1 V2 PCIE_TXP1_C PCIE_TXN1_C PCIE_TXP2_C PCIE_TXN2_C GLAN_TXP_C GLAN_TXN_C PCIE_TXP4_C PCIE_TXN4_C PCIE_TXP5_C PCIE_TXN5_C AD7 AE7 AE6 AD6 AB6 AC6 AD5 AE5 ALINK_NBTX_SBRX_P0 ALINK_NBTX_SBRX_N0 ALINK_NBTX_SBRX_P1 ALINK_NBTX_SBRX_N1 ALINK_NBTX_SBRX_P2 ALINK_NBTX_SBRX_N2 ALINK_NBTX_SBRX_P3 ALINK_NBTX_SBRX_N3 AC8 PCE_PCAL AB8 PCE_NCAL R33 R30 HDMI_TX2+ 28 HDMI_TX2- 28 HDMI_TX1+ 28 HDMI_TX1- 28 HDMI_TX0+ 28 HDMI_TX0- 28 HDMI_CLK+ 28 HDMI_CLK- 28 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V C19 C15 C415 C414 C411 C410 C413 C412 C12 C13 .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V C428 C427 C426 C423 C17 C18 C417 C419 .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V .1U/10V 1.27K/F 2K/F TX2P TX2M TX1P TX1M TX0P TX0M TXCP TXCM TX5P TX5M TX4P TX4M TX3P TX3M PCIE_TX1+ 39 PCIE_TX1- 39 PCIE_TX2+ 39 PCIE_TX2- 39 PCIE_TX3+/GLAN_TX+ 33 PCIE_TX3-/GLAN_TX- 33 PCIE_TX4+ 37 PCIE_TX4- 37 PCIE_TX5+ 40 PCIE_TX5- 40 ALINK_NBTX_C_SBRX_P0 ALINK_NBTX_C_SBRX_N0 ALINK_NBTX_C_SBRX_P1 ALINK_NBTX_C_SBRX_N1 ALINK_NBTX_C_SBRX_P2 ALINK_NBTX_C_SBRX_N2 ALINK_NBTX_C_SBRX_P3 ALINK_NBTX_C_SBRX_N3 - 1st Link 1st Link 1st Link 1st Link 1st Link 1st Link Clock+ Clock2nd Link 2nd Link 2nd Link 2nd Link 2nd Link 2nd Link Red+ RedGreen+ GreenBlue+ Blue- HDMI Red+ RedGreen+ GreenBlue+ Blue- C ----->WLAN ----->WPAN ----->GIGA LAN ----->EXPRESS CARD ----->WWAN B 12 12 12 12 12 12 12 12 +NB_VDD_MUX RS780M A13 A A Title QUANTA COMPUTER RS780-PCIE I/F 5 4 3 2 Size Document Number FX6 Date: Wednesday, June 25, 2008 Rev 3A Sheet 1 8 of 70 3 +1.8V_RUN +1.8V_AVDDQ L12 L14 0/0805 C71 2.2U 10 X5R 0603 100mA C85 2.2U 10 X5R 0603 BLM15AG221SN1D D 220 ohm @ 100MHz C84 *10U/10V/0805_NC BLM15AG221SN1D 220 ohm @ 100MHz C69 *10U/10V/0805_NC C67 2.2U 10 X5R 0603 C82 2.2U 10 X5R 0603 BLM21PG221SN1D 0805 220 ohm @ 100MHz LCD_A1- LCD_B0+ R637 0 +1.8V_RUN 27 VGA_RED T4 27 VGA_GRN T6 27 VGA_BLU R48 R49 R50 140/F 150/F 150/F 2 Q3 *BSS138_NL_NC C 5 CPU_LDT_REQ# 1 12 ALLOW_LDTSTOP 3 R638 R39 *4.7K_NC NB_ALLOW_LDTSTOP 27 27 INT_VGAHSYNC INT_VGAVSYNC INT_VGA_DDCDAT INT_VGA_DDCCLK VGAHSYNC VGAVSYNC R48,R49,R50 CLOSE TO NB R45 Only for RS780 +VDDA18PCIEPLL R344 SYSRESET# 26,45 NB_PWRGD R47 4.7K INT_VGA_DDCCLK NB_LDT_STOP# NB_ALLOW_LDTSTOP 27 G_CLK_DDC2 CLK_NB_14M REFCLK_N 25 CLK_NB_14M STRAP_DEBUG_BUS_GPIO_ENABLEb Enables the Test Debug Bus using GPIO. RX780:NB_TV_C; RS780:VSYNC# RS780 RX780 1 Disable Enable 0 Enable Disable 25 CLK_NB_GFX 25 CLK_NB_GFX# RX780->Pop 25 CLK_GPP_REFCLK 25 CLK_GPP_REFCLK# R21 R22 *0_NC *0_NC +3.3V_RUN R639 *3K_NC R349 *3K_NC R369 *3K_NC 26 LCD_DDCCLK 26 LCD_DDCDAT 28 HDMI_SCL 28 HDMI_SDA INT_VGAVSYNC T61 T62 T60 NB_TV_C R40 RS780: Enables Side port memory LCD_B1- 51 CLK_NB_14M 0 STRP_DATA RS780:HSYNC# Selects if Memory SIDE PORT is available or not 1 = Memory Side port Not available 0 = Memory Side port available Register Readback of strap: NB_CLKCFG:CLK_TOP_SPARE_D[1] AC Term closely clock pin for length: 50 mils VDDA18HTPLL LCD_B2- T68 T7 T9 B18 A18 A17 B17 D20 D21 D18 D19 12,14,37,39,45 PLTRST# 5,12 LDT_RST# R25 *0_NC VDDLTP18(NC) VSSLTP18(NC) VDDLT18_1(NC) VDDLT18_2(NC) VDDLT33_1(NC) VDDLT33_2(NC) VSSLT1(VSS) VSSLT2(VSS) VSSLT3(VSS) VSSLT4(VSS) VSSLT5(VSS) VSSLT6(VSS) VSSLT7(VSS) A13 B13 +LPVDD A15 B15 A14 B14 +LVDDR18D REFCLK_P/OSCIN(OSCIN) REFCLK_N(PWM_GPIO3) GPP_REFCLKP GPP_REFCLKN V4 V3 GPPSB_REFCLKP(SB_REFCLKP) GPPSB_REFCLKN(SB_REFCLKN) B9 A9 A8 B8 B7 A7 I2C_CLK I2C_DATA DDC_CLK0/AUX0P(NC) DDC_DATA0/AUX0N(NC) DDC_CLK1/AUX1P(NC) DDC_DATA1/AUX1N(NC) LVDS_DIGON(PCE_TCALRP) LVDS_BLON(PCE_RCALRP) LVDS_ENA_BL(PWM_GPIO2) D9 D10 TVCLKIN(PWM_GPIO5) D12 THERMALDIODE_P THERMALDIODE_N AE8 AD8 STRP_DATA RSVD TESTMODE +VDDG_NB 1 2 VCC WP SCL SDA 8 7 6 5 R23 4.7K C64 0.1U/10V 4.7U/6.3V/0603 R5 2K SUS_STAT#_R 3 HDMI_DET 28 0 SUS_STAT#_R NB_THERMDA T63 C432 *220P_NC 50 NB_THERMDC R42 1.8K/F +3.3V_RUN SUS_STAT# 13 RX780/RS780 DEBUG PIN MAPPING RX780 T64 DEBUG_OUT0 LCD_DDCCLK LCD_DDCDAT SUS_STAT# 2 Title RS780 RED(DFT_GPIO0) LVDS_DIGON DEBUG_OUT1 GREEN(DFT_GPIO1) LVDS_ENA_BL DEBUG_OUT2 Y(DFT_GPIO2) LVDS_BLON DEBUG_OUT3 BLUE(DFT_GPIO3) TMDS_HPD DEBUG_OUT4 TXOUT_L2N(DBG_GPIO0) AUX1N DEBUG_OUT5 TXCLK_LP(DBG_GPIO1) AUX1P DEBUG_OUT6 TXOUT_L3N(DBG_GPIO2) HPD DEBUG_OUT7 TXCLK_LN(DBG_GPIO3) AUX_CAL COMB_Pb(DFT_GPIO4) X C_Pr(DFT_GPIO5) X R43 4.7K NOTE: ACCESS TO STRAP_DATA and I2C_CLK PINS IS MANDATORY. 4 220 ohm @ 100MHz R41 D13 R28 4.7K LCD_DDCCLK STRP_DATA C8 *0.1U_NC 16 X7R *SDMK0340L-7-F_NC 5 NC A1 A2 VSS R8 *2K_NC *AT24C04N-10SU-2.7_NC D1 12,14,37,39,45 PLTRST# C63 TMDS_HPD T1 *10P/50V_NC 1 2 3 4 Selects Loading of STRAPS from EPROM 1 : Bypass the loading of EEPROM straps and use Hardware Default Values 0 : I2C Master can load strap values from EEPROM if connected, or use default values if not connected RX780: RS780_AUX_CAL RS780:SUS_STAT C ohm @ 100MHz *2.7K_NC *100K_NC INT_VGAHSYNC R10 *10K_NC C440 220 2.2U/10V/0603 EN_LCDVDD 26 BIA_PWM 26 PANEL_BKEN 42 AUX_CAL(NC) *4.7K_NC SUS_STAT#_R U1 +1.8V_RUN L47 +1.8V_RUN Place C432 close to U16. DFT_GPIO1: LOAD_EEPROM_STRAPS 26 26 26 26 E9 F7 G12 C54 3K 0 L11 C14 D15 C16 C18 C20 E20 C22 TMDS_HPD(NC) HPD(NC) *10P/50V_NC R346 +VDDG_NB R24 B *10P/50V_NC C16 *3K_NC +3.3V_RUN BLM15AG221SN1D R35 R338 MIS. C14 R347 26 26 26 26 26 26 C441 0.1U/10V +VDDG_NB R787 LCD_B0+ LCD_B0LCD_B1+ LCD_B1LCD_B2+ LCD_B2- LCD_ACLK+ LCD_ACLKLCD_BCLK+ LCD_BCLK- T65 T66 R31 *150/F_NC 0 SYSRESET# 26 26 26 26 26 26 D T8 T10 B16 A16 D16 D17 RS780M A13 R26 LCD_A0+ LCD_A0LCD_A1+ LCD_A1LCD_A2+ LCD_A2- LCD_BCLK- HT_REFCLKP HT_REFCLKN U1 U2 C8 +3.3V_RUN A PLLVDD(NC) PLLVDD18(NC) PLLVSS(NC) GFX_REFCLKP GFX_REFCLKN B10 A22 B22 A21 B21 B20 A20 A19 B19 LCD_BCLK+ BLM15AG221SN1D T2 T1 G11 C50 49.9/F TXCLK_LP(DBG_GPIO1) TXCLK_LN(DBG_GPIO3) TXCLK_UP(PCIE_RESET_GPIO4) TXCLK_UN(PCIE_RESET_GPIO1) DAC_RSET(PWM_GPIO1) SYSRESETb POWERGOOD LDTSTOPb ALLOW_LDTSTOP E11 F11 TXOUT_L0P(NC) TXOUT_L0N(NC) TXOUT_L1P(NC) TXOUT_L1N(NC) TXOUT_L2P(NC) TXOUT_L2N(DBG_GPIO0) TXOUT_L3P(NC) TXOUT_L3N(DBG_GPIO2) TXOUT_U0P(NC) TXOUT_U0N(NC) TXOUT_U1P(PCIE_RESET_GPIO3) TXOUT_U1N(PCIE_RESET_GPIO2) TXOUT_U2P(NC) TXOUT_U2N(NC) TXOUT_U3P(PCIE_RESET_GPIO5) TXOUT_U3N(NC) DAC_HSYNC(PWM_GPIO4) DAC_VSYNC(PWM_GPIO6) DAC_SDA(PCE_TCALRN) DAC_SCL(PCE_RCALRN) VDDA18PCIEPLL1 VDDA18PCIEPLL2 25 CLK_NB_SBLINK 25 CLK_NB_SBLINK# B RED(DFT_GPIO0) REDb(NC) GREEN(DFT_GPIO1) GREENb(NC) BLUE(DFT_GPIO3) BLUEb(NC) D8 A10 C10 C12 C25 C24 25 HT_REFCLK 25 HT_REFCLK# C_Pr(DFT_GPIO5) Y(DFT_GPIO2) COMP_Pb(DFT_GPIO4) D7 E7 300 INT_VGA_DDCDAT 27 G_DAT_DDC2 A12 D14 B12 H17 +VDDA18PCIEPLL +1.8V_RUN A11 B11 E8 F8 G14 +1.8V_HTPLL R46 4.7K REFCLK_N 715/F +PLLVDD +PLLVDD18 +PLLVDD +PLLVDD18 +1.1V_RUN 0 G18 G17 E18 F18 E19 F19 T67 +VDDG_NB E17 F17 F15 CRT/TVOUT 3 NB_TV_C T70 T5 T3 R341 *4.7K_NC NB_LDT_STOP# PART 3 OF 6 PLL PWR LVTM +1.8V_AVDDQ AVDD1(NC) AVDD2(NC) AVDDDI(NC) AVSSDI(NC) AVDDQ(NC) AVSSQ(NC) PM 2 1 F12 E12 F14 G15 H15 H14 +1.8V_AVDD Q52 *BSS138_NL_NC 5,12 LDT_STOP# 100mA CLOCKs +VDDG_NB LCD_ACLK- LCD_B2+ U10C +3.3V_AVDD +1.8V_RUN C443 C453 LCD_A2- LCD_B1+ LCD_B0- LCD_ACLK+ *10P/50V_NC LCD_A0- LCD_A2+ *10P/50V_NC L17 +PLLVDD18 LCD_A1+ C444 +1.8V_RUN LCD_A0+ +3.3V +1.8V +1.8V +1.1V +1.8V +1.8V +1.8V +1.8V +1.8V NC *10P/50V_NC +1.8V_AVDD R52 +1.8V_HTPLL RS780 NC NC NC NC NC +1.8V +1.8V NC NC NC *10P/50V_NC +1.8V_RUN +1.8V_RUN RX780 C457 *10U/10V/0805_NC 220 ohm @ 100MHz PIN NAME AVDD AVDDDI AVDDQ PLLVDD PLLVDD19 VDDA18PCIEPLL VDDA18HTPLL VDDLTP18 VDDLT18 VDDLT33 C44 2.2U 10 X5R 0603 C459 135mA BK1608HS220-T 0603 C436 2.2U 10 X5R 0603 C434 *10P/50V_NC BLM15AG221SN1D 220 ohm @ 100MHz Close RS780. C447 C20 2.2U 10 *10U/10V/0805_NC X5R 0603 C21 1 RX780/RS780 POWER DIFFERENCE TABLE *10P/50V_NC 150mA BLM15AG221SN1D 220 ohm @ 100MHz 2 +3.3V_AVDD L9 *10P/50V_NC +3.3V_RUN C463 +PLLVDD L46 *10P/50V_NC 4 +NB_VDD_MUX +VDDA18PCIEPLL L6 C449 5 +1.8V_RUN A QUANTA COMPUTER RS780-LVDS Size Document Number FX6 Date: Wednesday, June 25, 2008 Rev 3A Sheet 1 9 of 70 5 4 3 2 1 PART 6/6 U10F RS780M A13 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSSAHT1 VSSAHT2 VSSAHT3 VSSAHT4 VSSAHT5 VSSAHT6 VSSAHT7 VSSAHT8 VSSAHT9 VSSAHT10 VSSAHT11 VSSAHT12 VSSAHT13 VSSAHT14 VSSAHT15 VSSAHT16 VSSAHT17 VSSAHT18 VSSAHT19 VSSAHT20 VSSAHT21 VSSAHT22 VSSAHT23 VSSAHT24 VSSAHT25 VSSAHT26 VSSAHT27 A25 D23 E22 G22 G24 G25 H19 J22 L17 L22 L24 L25 M20 N22 P20 R19 R22 R24 R25 H20 U22 V19 W22 W24 W25 Y21 AD25 RX780 RS780 VDDHT +1.1V +1.1V VDDHTRX +1.1V +1.1V VDDHTTX +1.2V +1.2V VDDA18PCIE +1.8V +1.8V VDDG18 +1.8V +1.8V VDD18_MEM NC +1.8V VDDPCIE +1.1V +1.1V VDDC +1.1V VDD_MEM NC VDDG33 NC D GROUND +1.1V_RUN PIN NAME +1.1V +1.8V/1.5V DDR2/DDR3 +3.3V L12 M14 N13 P12 P15 R11 R14 T12 U14 U11 U15 V12 W11 W15 AC12 AA14 Y18 AB11 AB15 AB17 AB19 AE20 AB21 K11 D VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSSAPCIE1 VSSAPCIE2 VSSAPCIE3 VSSAPCIE4 VSSAPCIE5 VSSAPCIE6 VSSAPCIE7 VSSAPCIE8 VSSAPCIE9 VSSAPCIE10 VSSAPCIE11 VSSAPCIE12 VSSAPCIE13 VSSAPCIE14 VSSAPCIE15 VSSAPCIE16 VSSAPCIE17 VSSAPCIE18 VSSAPCIE19 VSSAPCIE20 VSSAPCIE21 VSSAPCIE22 VSSAPCIE23 VSSAPCIE24 VSSAPCIE25 VSSAPCIE26 VSSAPCIE27 VSSAPCIE28 VSSAPCIE29 VSSAPCIE30 VSSAPCIE31 VSSAPCIE32 VSSAPCIE33 VSSAPCIE34 VSSAPCIE35 VSSAPCIE36 VSSAPCIE37 VSSAPCIE38 VSSAPCIE39 VSSAPCIE40 A2 B1 D3 D5 E4 G1 G2 G4 H7 J4 R7 L1 L2 L4 L7 M6 N4 P6 R1 R2 R4 V7 U4 V8 V6 W1 W2 W4 W7 W8 Y6 AA4 AB5 AB1 AB7 AC3 AC4 AE1 AE4 AB2 AE14 D11 G8 E14 E15 J15 J12 K14 M11 L15 RX780/RS780 POWER DIFFERENCE TABLE +NB_VDD_MUX R56 80 ohm(4A) C32 4.7U 6.3 X5R 0603 0/0805 C60 0.1U 16 X7R C61 0.1U 16 X7R C59 0.1U 16 X7R VDD_PCIE C U10E +VDDHTRX L16 BLM21PG221SN1D 0805 220 ohm @ 100MHz, 2A +1.2V_RUN C80 4.7U 6.3 X5R 0603 C74 0.1U 16 X7R C81 0.1U 16 X7R C66 0.1U 16 X7R +VDDHTTX L54 BLM21PG221SN1D 0805 220 ohm @ 100MHz, 2A C473 4.7U 6.3 X5R 0603 +1.35V_HT_VCC L55 C70 0.1U 16 X7R C65 0.1U 16 X7R C62 0.1U 16 X7R C68 0.1U 16 X7R *BLM21PG221SN1D_NC 0805 B +1.8V_RUN L8 +VDDA18PCIE 40mil Width BLM21PG221SN1D 0805 220 ohm @ 100MHz, 2A C30 4.7U 6.3 X5R 0603 C31 4.7U 6.3 X5R 0603 C37 0.1U 16 X7R C29 0.1U 16 X7R C38 0.1U 16 X7R C35 0.1U 16 X7R +1.8V_RUN C28 1U 10 X6S 0603 +3.3V_RUN 3 2 1 42,45,46 1.2V_RUN_ON GND1 IN EN +1.8V_RUN OUT RESET#/FB GND2 J10 P10 K10 M10 L10 W9 H9 T10 R10 Y9 AA9 AB9 AD9 AE9 U10 PART 5/6 VDDHTRX_1 VDDHTRX_2 VDDHTRX_3 VDDHTRX_4 VDDHTRX_5 VDDHTRX_6 VDDHTRX_7 VDDHTTX_1 VDDHTTX_2 VDDHTTX_3 VDDHTTX_4 VDDHTTX_5 VDDHTTX_6 VDDHTTX_7 VDDHTTX_8 VDDHTTX_9 VDDHTTX_10 VDDHTTX_11 VDDHTTX_12 VDDHTTX_13 VDDA18PCIE_1 VDDA18PCIE_2 VDDA18PCIE_3 VDDA18PCIE_4 VDDA18PCIE_5 VDDA18PCIE_6 VDDA18PCIE_7 VDDA18PCIE_8 VDDA18PCIE_9 VDDA18PCIE_10 VDDA18PCIE_11 VDDA18PCIE_12 VDDA18PCIE_13 VDDA18PCIE_14 VDDA18PCIE_15 VDDG18_1(VDD18_1) VDDG18_2(VDD18_2) VDD18_MEM1(NC) VDD18_MEM2(NC) VDDPCIE_1 VDDPCIE_2 VDDPCIE_3 VDDPCIE_4 VDDPCIE_5 VDDPCIE_6 VDDPCIE_7 VDDPCIE_8 VDDPCIE_9 VDDPCIE_10 VDDPCIE_11 VDDPCIE_12 VDDPCIE_13 VDDPCIE_14 VDDPCIE_15 VDDPCIE_16 VDDPCIE_17 VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8 VDDC_9 VDDC_10 VDDC_11 VDDC_12 VDDC_13 VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22 VDD_MEM1(NC) VDD_MEM2(NC) VDD_MEM3(NC) VDD_MEM4(NC) VDD_MEM5(NC) VDD_MEM6(NC) VDDG33_1(NC) VDDG33_2(NC) A6 B6 C6 D6 E6 F6 G7 H8 J9 K9 M9 L9 P9 R9 T9 V9 U9 C27 0.1U 16 X7R C25 1U 10 X6S 0603 C24 0.1U 16 X7R 0/0805 6 R381 *12.7K_NC C491 *1U_NC C22 4.7U 6.3 X5R 0603 C BLM21PG221SN1D 0805 +NB_VCORE K12 J14 U16 J11 K15 M12 L14 L11 M13 M15 N12 N14 P11 P13 P14 R12 R15 T11 T15 U12 T14 J16 AE10 AA11 Y11 AD10 AB10 AC10 C34 0.1U 10 X7R C9 10U 4 X6S 0805 C10 10U 4 X6S 0805 C46 0.1U 10 X7R C47 0.1U 10 X7R C43 0.1U 10 X7R C52 0.1U 10 X7R C56 0.1U 10 X7R C55 0.1U 10 X7R B 220 ohm @ 100MHz, 2A +1.8V_VDD_MEM 80mil Width C42 0.1U 16 X7R C41 0.1U 16 X7R C40 0.1U 16 X7R C39 0.1U 16 X7R L10 +1.8V_RUN BLM21PG221SN1D C48 0805 4.7U 6.3 X5R 0603 H11 H12 RS780M A13 +3.3V_RUN +3.3V_VDDR 5 *TPS72501DCQ_NC C26 1U 10 X6S 0603 +NB_VDD_MUX L7 100 mil Width +VDD18_MEM R350 4 AE25 AD24 AC23 AB22 AA21 Y20 W19 V18 U17 T17 R17 P17 M17 F9 G9 AE11 AD11 +1.35V_HT_VCC U20 H18 G19 F20 E21 D22 B23 A23 VDDHT_1 VDDHT_2 VDDHT_3 VDDHT_4 VDDHT_5 VDDHT_6 VDDHT_7 POWER J17 K16 L16 M16 P16 R16 T16 C435 1U 10 X6S 0603 L5 20mil Width C49 0.1U 16 X7R A C488 *2.2U_NC 10 X5R 0603 BLM15AG221SN1D C36 0.1U 16 X7R R382 *120K_NC A Title QUANTA COMPUTER RS780-POWER 5 4 3 2 Size Document Number FX6 Date: Wednesday, June 25, 2008 Rev 3A Sheet 1 10 of 70 1 2 3 4 5 6 7 RX780/RS780 POWER DIFFERENCE TABLE U10D U2 A R343 MEM_A0 MEM_A1 MEM_A2 MEM_A3 MEM_A4 MEM_A5 MEM_A6 MEM_A7 MEM_A8 MEM_A9 MEM_A10 MEM_A11 MEM_A12 M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 MEM_BA0 MEM_BA1 L2 L3 BA0 BA1 MEM_DM1 MEM_DM0 B3 F3 UDM LDM MEM_RAS# MEM_CAS# MEM_WE# MEM_CS# MEM_CKE MEM_ODT MEM_CLKP K7 L7 K3 L8 K2 K9 RAS CAS WE CS CKE ODT J8 K8 CLK CLK# J1 VDDL J7 VSSDL A3 E3 J3 N1 P9 VSS_0 VSS_1 VSS_2 VSS_3 VSS_4 A7 B2 B8 D2 D8 E7 F2 F8 H2 H8 VSSQ_0 VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9 *100_NC MEM_CLKN L50 SBK160808G221 +1.8V_MEM_VDDQ B C458 1U 10 X5R 0603 Place This CAP near to SDRAM with 0.2". DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 G8 G2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9 UDQS UDQS# B7 A8 LDQS LDQS# F7 E8 NC1 NC2 NC3 NC4 NC5 NC6 A2 E2 L1 R3 R7 R8 VREF J2 VDD_0 VDD_1 VDD_2 VDD_3 VDD_4 A1 E1 J9 M9 R1 VDDQ_0 VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9 A9 C1 C3 C7 C9 E9 G1 G3 G7 G9 Bit Swap MEM_DQ6 MEM_DQ2 MEM_DQ7 MEM_DQ0 MEM_DQ1 MEM_DQ4 MEM_DQ3 MEM_DQ5 MEM_DQ11 MEM_DQ13 MEM_DQ10 MEM_DQ8 MEM_DQ12 MEM_DQ9 MEM_DQ14 MEM_DQ15 AB12 AE16 V11 AE15 AA12 AB16 AB14 AD14 AD13 AD15 AC16 AE13 AC14 Y14 MEM_A0(NC) MEM_A1(NC) MEM_A2(NC) MEM_A3(NC) MEM_A4(NC) MEM_A5(NC) MEM_A6(NC) MEM_A7(NC) MEM_A8(NC) MEM_A9(NC) MEM_A10(NC) MEM_A11(NC) MEM_A12(NC) MEM_A13(NC) MEM_BA0 MEM_BA1 MEM_BA2 AD16 AE17 AD17 MEM_BA0(NC) MEM_BA1(NC) MEM_BA2(NC) MEM_RAS# MEM_CAS# MEM_WE# MEM_CS# MEM_CKE MEM_ODT W12 Y12 AD18 AB13 AB18 V14 MEM_RASb(NC) MEM_CASb(NC) MEM_WEb(NC) MEM_CSb(NC) MEM_CKE(NC) MEM_ODT(NC) T2 MEM_DQS_P1 MEM_DQS_N1 MEM_DQS_P0 MEM_DQS_N0 MEM_CLKP MEM_CLKN +1.8V_MEM_VDDQ 40.2/F 40.2/F R355 R354 MEM_BA2 PAR 4 OF 6 MEM_A0 MEM_A1 MEM_A2 MEM_A3 MEM_A4 MEM_A5 MEM_A6 MEM_A7 MEM_A8 MEM_A9 MEM_A10 MEM_A11 MEM_A12 V15 W14 MEM_COMP_P AE12 MEM_COMP_N AD12 SBD_MEM/DVO_I/F 256-Mbit DDR2 16Mbit*16(4bank) MEM_CKP(NC) MEM_CKN(NC) MEM_COMPP(NC) MEM_COMPN(NC) MEM_VREF +1.8V_MEM_VDDQ MEM_DQS0P/DVO_IDCKP(NC) MEM_DQS0N/DVO_IDCKN(NC) MEM_DQS1P(NC) MEM_DQS1N(NC) Y17 W18 AD20 AE21 MEM_DQS_P0 MEM_DQS_N0 MEM_DQS_P1 MEM_DQS_N1 MEM_DM0(NC) MEM_DM1/DVO_D8(NC) W17 AE19 MEM_DM0 MEM_DM1 IOPLLVDD18(NC) IOPLLVDD(NC) AE23 AE24 +1.8V_IOPLLVDD +1.1V_IOPLLVDD IOPLLVSS(NC) AD23 MEM_VREF(NC) AE18 RX780 RS780 IOPLLVDD18 NC +1.8V IOPLLVDD NC +1.1V A 220 ohm @ 100MHz L49 BLM15AG221SN1D C465 MEM_VREF1 C460 L52 BLM15AG221SN1D 2.2U 10 0603 X7R 2.2U 10 X5R 0603 +1.8V_RUN +NB_VDD_MUX B At least 200mils wide and locate after DDR2 SDRAM +0.9V_MEM_VTT MEM_A8 MEM_A0 +1.8V_MEM_VDDQ C +0.9V_MEM_VTT C472 0.1U 10 X7R +0.9V_DDR_VTT R365 1K/F C451 0.1U 10 X7R MEM_VREF 4 C471 0.1U 10 X7R 46 1.8V_RUN_ENABLE R364 1K/F R359 1K/F RP24 4 2 3 *4P2R-47_NC C467 1 C429 0.1U/10V 0.1U/10V +1.8V_MEM_VDDQ 0.1U/10V MEM_A2 MEM_A6 RP26 4 2 MEM_A7 MEM_A9 RP27 4 2 MEM_A11 MEM_A4 RP25 4 2 3 *4P2R-47_NC C433 1 C431 3 *4P2R-47_NC 1 C469 3 *4P2R-47_NC C442 1 MEM_BA0 MEM_BA2 RP30 4 2 3 *4P2R-47_NC 1 C468 0.1U/10V MEM_A10 MEM_A5 RP32 4 2 3 *4P2R-47_NC 1 MEM_BA1 MEM_A1 RP31 4 2 3 *4P2R-47_NC C448 1 0.1U/10V MEM_A12 MEM_A3 RP28 4 2 3 *4P2R-47_NC C454 1 0.1U/10V MEM_CS# MEM_ODT RP22 4 2 MEM_CAS# MEM_RAS# RP23 4 2 3 *4P2R-47_NC C437 1 C470 3 *4P2R-47_NC C466 1 MEM_CKE MEM_WE# RP29 4 2 3 *4P2R-47_NC C430 1 +1.8V_MEM_VDDQ 0.1U/10V 0.1U/10V C +1.8V_MEM_VDDQ 0.1U/10V +1.8V_MEM_VDDQ MEM_VREF1 C446 0.1U 10 X7R R358 1K/F +1.8V_MEM_VDDQ L45 +1.8V_RUN PIN NAME ALL external components connected to SPMEM signals must be removed for RX780. +1.8V_MEM_VDDQ C87 22U 6.3 X5R 0805 MEM_DQ0 MEM_DQ1 MEM_DQ2 MEM_DQ3 MEM_DQ4 MEM_DQ5 MEM_DQ6 MEM_DQ7 MEM_DQ8 MEM_DQ9 MEM_DQ10 MEM_DQ11 MEM_DQ12 MEM_DQ13 MEM_DQ14 MEM_DQ15 MEM_COMP_P and MEM_COMP_N trace width >=10mils and 10mils spacing from other Signals in X,Y,Z directions Only for RS780 + C86 100U 6.3 3528 MEM_DQ0/DVO_VSYNC(NC) MEM_DQ1/DVO_HSYNC(NC) MEM_DQ2/DVO_DE(NC) MEM_DQ3/DVO_D0(NC) MEM_DQ4(NC) MEM_DQ5/DVO_D1(NC) MEM_DQ6/DVO_D2(NC) MEM_DQ7/DVO_D4(NC) MEM_DQ8/DVO_D3(NC) MEM_DQ9/DVO_D5(NC) MEM_DQ10/DVO_D6(NC) MEM_DQ11/DVO_D7(NC) MEM_DQ12(NC) MEM_DQ13/DVO_D9(NC) MEM_DQ14/DVO_D10(NC) MEM_DQ15/DVO_D11(NC) AA18 AA20 AA19 Y19 V17 AA17 AA15 Y15 AC20 AD19 AE22 AC18 AB20 AD22 AC22 AD21 RS780M A13 HY5PS561621BFP-25 400M PBGA84 256M EP Q4 BSC032N03S 9 3 8 2 7 1 6 5 8 +1.8V_MEM_VDDQ 0.1U/10V 0.1U/10V +1.8V_MEM_VDDQ *0.1U/10V_NC 0.1U/10V BLM21PG221SN1D + C425 330U 6.3 7343 C420 22U 6.3 X5R 0805 D C439 1U 6.3 X5R C445 1U 6.3 X5R C438 0.1U 10 X7R C452 0.1U 10 X7R D QUANTA COMPUTER Local Frame Buffer(64MB) DDRII Power Title RS780-SIDE PORT I/O 1 2 3 4 5 6 Size Document Number FX6 Date: Wednesday, June 25, 2008 7 Rev 3A Sheet 11 of 8 70 5 4 3 PLACE THESE PCIE AC COUPLING CAPS CLOSE TO U30 R576 *8.2K_NC R579 33 2 1 U30A 8 8 8 8 8 8 8 8 J6 PLTRST# D *3800/2/1_NC 8 8 8 8 8 8 8 8 Place R580,R578 < 100mils from pins E27,E28,E29 +1.2V_RUN +1.2V_PCIE_PVDD_R L34 U22 U21 U19 V19 R20 R21 R18 R17 ALINK_NBTX_C_SBRX_P0 ALINK_NBTX_C_SBRX_N0 ALINK_NBTX_C_SBRX_P1 ALINK_NBTX_C_SBRX_N1 ALINK_NBTX_C_SBRX_P2 ALINK_NBTX_C_SBRX_N2 ALINK_NBTX_C_SBRX_P3 ALINK_NBTX_C_SBRX_N3 20mil Width R580 R578 +1.2V_PCIE_VDDR 562/F 2.05K/F PCIE_CALRP PCIE_CALRN BLM21PG221SN1D 0805 P25 C310 10U 4 X5R 0603 C310 AND C312 CLOSE TO U600.P24 C312 1U 6.3 X5R R306 *10K_NC K23 K22 R307 *10K_NC 3 CPU_PWRGD_Q Q36 *FDV301N_NC M24 M25 CPU_PWRGD_Q 42 Q35 P17 M18 2 1 *0_NC 2 *2N7002W-7-F_NC M23 M22 1 J19 J18 PCIE_RX0P PCIE_RX0N PCIE_RX1P PCIE_RX1N PCIE_RX2P PCIE_RX2N PCIE_RX3P PCIE_RX3N PCIE_CALRP PCIE_CALRN PCIE_PVDD PCIE_RCLKP/NB_LNK_CLKP PCIE_RCLKN/NB_LNK_CLKN NB_DISP_CLKP NB_DISP_CLKN NB_HT_CLKP NB_HT_CLKN CPU_HT_CLKP CPU_HT_CLKN SLT_GFX_CLKP SLT_GFX_CLKN GPP_CLK0P GPP_CLK0N GPP_CLK1P GPP_CLK1N M19 M20 GPP_CLK2P GPP_CLK2N PLACE THESE COMPONENTS CLOSE TO SB700, AND USE GROUND GUARD FOR 32K_X1 AND 32K_X2 N22 P22 ATi Recommend Vendor: NSK Part Number: NXG 32.768KAE12FUD 16 PPM. GPP_CLK3P GPP_CLK3N L18 25M_48M_66M_OSC J21 25M_X1 B 32K_X1 Y5 4 1 3 2 R596 R246 0 32K_X2 0 J20 32.768KHZ R605 25M_X2 20M C699 18P 50 COG A3 32K_X2 B3 X1 +1.8V_RUN X2 R268 *10K_NC 9 ALLOW_LDTSTOP 5 CPU_PROCHOT# 5 CPU_PWRGD 5,9 LDT_STOP# 5,9 LDT_RST# +3.3V_RUN CPU_PWRGD F23 F24 F22 G25 G24 ALLOW_LDTSTP PROCHOT# LDT_PG LDT_STP# LDT_RST# LPC C691 18P 50 COG 32K_X1 RTC XTAL R595 *20M_NC A PCI_GNT4# PCI_REQ4# U12 8 7 6 5 VCC WC SCL SDA A0 A1 A2 GND 1 2 3 4 N1 PCI_CLK0_R PCI_CLK1_R PCI_CLK2 PCI_CLK3 PCI_CLK4_R PCI_CLK5 T48 R239 R232 R229 R574 R573 U2 P7 V4 T1 V3 U1 V1 V2 T2 W1 T9 R6 R7 R5 U8 U5 Y7 W8 V9 Y8 AA8 Y4 Y3 Y2 AA2 AB4 AA1 AB3 AB2 AC1 AC2 AD1 W2 U7 AA7 Y1 AA6 W5 AA5 Y5 U6 W6 W4 V7 AC3 AD4 AB7 AE6 AB6 AD2 AE4 AD5 AC6 AE5 AD6 V5 PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31 INTE#/GPIO33 INTF#/GPIO34 INTG#/GPIO35 INTH#/GPIO36 AD3 AC4 AE2 AE3 PCI_PIRQA# PCI_PIRQB# NB_LCD_BKL_EN PE_GPIO0 LPCCLK0 LPCCLK1 LAD0 LAD1 LAD2 LAD3 LFRAME# LDRQ0# LDRQ1#/GNT5#/GPIO68 BMREQ#/REQ5#/GPIO65 SERIRQ RTCCLK INTRUDER_ALERT# VBAT 22 CLK_PCI_8512 CLK_PCI_DEBUG 39 CLK_PCI_PCCARD 35 PCI_CLK2 14 PCI_CLK3 14 CLK_PCI_8512 14,42 PCI_CLK5 14 D PCI_RST# 35 PCI_AD[0..31] 35 CLK_PCI_DEBUG C309 *10P/50V_NC CLK_PCI_8512 C281 *10P/50V_NC CLK_PCI_PCCARD C292 10P/50V +3.3V_RUN C RP34 6 7 8 9 10 +3.3V_RUN PCI_C_BE0# 35 PCI_C_BE1# 35 PCI_C_BE2# 35 PCI_C_BE3# 35 PCI_FRAME# 35 PCI_DEVSEL# 35 PCI_IRDY# 35 PCI_TRDY# 35 PCI_PAR 35 PCI_STOP# 35 PCI_PERR# 35 PCI_SERR# 35 T82 PCI_REQ1# 35 T84 T93 T32 T102 PCI_GNT1# 35 T38 T37 T35 CLKRUN# 35,42 T45 PCI_FRAME# PCI_DEVSEL# PCI_IRDY# PCI_TRDY# PCI_PAR PCI_STOP# PCI_PERR# PCI_SERR# PCI_REQ0# PCI_REQ1# PCI_REQ2# PCI_REQ3# PCI_REQ4# PCI_GNT0# PCI_GNT1# PCI_GNT2# PCI_GNT3# PCI_GNT4# CLKRUN# LOCK# 5 4 3 2 1 PCI_REQ4# *10P8R-8.2k_NC +3.3V_RUN R563 8.2K CLKRUN# B PCI_PIRQA# 35 PCI_PIRQB# 35 T91 T89 R564 *8.2K_NC LPCCLK0 14 LPCCLK1 14 LPC_LAD0 39,42 LPC_LAD1 39,42 LPC_LAD2 39,42 LPC_LAD3 39,42 LPC_LFRAME# 39,42 T51 T41 Option to "Disable" clkrun. Pulling it down will keep the clocks running. +RTC_CELL IRQ_SERIRQ 35,42 INTRUDER_ALERT# +VBAT_IN C690 1U 10 X6S 0603 CLK_PCI_DEBUG CLK_PCI_PCCARD PCI_REQ0# PCI_REQ1# PCI_REQ2# PCI_REQ3# 22 G22 R259 22 E22 R269 LPC_LAD0 H24 LPC_LAD1 H23 LPC_LAD2 J25 LPC_LAD3 J24 LPC_LFRAME# H25 LPC_LDRQ0# H22 LPC_LDRQ1# AB8 AD7 IRQ_SERIRQ V15 C3 C2 B2 22 22 *8.2K_NC 33 AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 CBE0# CBE1# CBE2# CBE3# FRAME# DEVSEL# IRDY# TRDY# PAR STOP# PERR# SERR# REQ0# REQ1# REQ2# REQ3#/GPIO70 REQ4#/GPIO71 GNT0# GNT1# GNT2# GNT3#/GPIO72 GNT4#/GPIO73 CLKRUN# LOCK# Rev.A21 SB700 A12 R205 *1K_NC P4 P3 P1 P2 T4 T3 PCI_AD[0..31] PCIE_PVSS L20 L19 Place the translation circuit for CPU_PWRGD close to the SB700 to minimize stubbs when the circuit is No Stuff. PCICLK0 PCICLK1 PCICLK2 PCICLK3 PCICLK4 PCICLK5/GPIO41 PCIRST# PCI INTERFACE N25 N24 25 CLK_PCIE_SB 25 CLK_PCIE_SB# 3 PCIE_TX0P PCIE_TX0N PCIE_TX1P PCIE_TX1N PCIE_TX2P PCIE_TX2N PCIE_TX3P PCIE_TX3N +3.3V_ALW C CPU_PWRGD R308 Part 1 of 5 CLOCK GENERATOR +5V_ALW2 T25 T24 P24 SB700 A_RST# RTC 2 1 V23 V22 V24 V25 U25 U24 T23 T22 CPU 2 1 ALINK_NBRX_SBTX_P0 ALINK_NBRX_SBTX_N0 ALINK_NBRX_SBTX_P1 ALINK_NBRX_SBTX_N1 ALINK_NBRX_SBTX_P2 ALINK_NBRX_SBTX_N2 ALINK_NBRX_SBTX_P3 ALINK_NBRX_SBTX_N3 ALINK_NBRX_C_SBTX_P0 ALINK_NBRX_C_SBTX_N0 ALINK_NBRX_C_SBTX_P1 ALINK_NBRX_C_SBTX_N1 ALINK_NBRX_C_SBTX_P2 ALINK_NBRX_C_SBTX_N2 ALINK_NBRX_C_SBTX_P3 ALINK_NBRX_C_SBTX_N3 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V PCI CLKS Reserved for Rubuto. C278 C273 C673 C676 C680 C679 C294 C282 N2 PCI EXPRESS INTERFACE 9,14,37,39,45 PLTRST# C689 0.1U/16V 16 X7R R590 RTC_CLK 14 R591 INTRUDER_ALERT# 510/F +RTC_CELL *1M_NC R604 *0_NC A CMOS Clear (Top or easy access place) *AT24C04N-10SI-2.7_NC C231 *0.1U_NC Title QUANTA COMPUTER SB700-PCIE/PCI/LPC 5 4 3 2 Size Document Number FX6 Date: Wednesday, June 25, 2008 Rev 3A Sheet 1 12 of 70 5 4 3 2 1 +3.3V_ALW U30D SB_PME# SIO_EXT_WAKE# 35,42 SB_PME# 42 SIO_EXT_WAKE# SIO_SLP_S3# SIO_SLP_S5# SIO_PWRBTN# 42 SIO_SLP_S3# 42 SIO_SLP_S5# 42 SIO_PWRBTN# 5,45 SB_PWRGD 9 SUS_STAT# D +3.3V_SUS R273 R292 R593 R599 R598 *10K_NC *10K_NC *10K_NC *10K_NC *10K_NC USB_OC0_1# USB_OC2_3# USB_OC6# USB_OC4# EXPRCRD_PWREN# SUS_STAT# SB_TEST2 SB_TEST1 SB_TEST0 SIO_A20GATE 42 SIO_A20GATE 42 SIO_RCIN# 42 SIO_EXT_SCI# SIO_EXT_SCI# T109 T110 33,37,39,40 SB_PCIE_WAKE# 42 SIO_EXT_SMI# 5 CPU_THERMTRIP# 45 WD_PWRGD SYS_RESET# SB_PCIE_WAKE# SIO_EXT_SMI# SB_RSMRST# 42 SB_RSMRST# E1 E2 H7 F5 G1 H2 H1 K3 H5 H4 H3 Y15 W15 K4 K24 F1 J2 H6 F2 J6 W14 D3 PCI_PME#/GEVENT4# RI#/EXTEVNT0# SLP_S2/GPM9# SLP_S3# SLP_S5# PWR_BTN# PWR_GOOD SUS_STAT# TEST2 TEST1 TEST0 GA20IN/GEVENT0# KBRST#/GEVENT1# LPC_PME#/GEVENT3# LPC_SMI#/EXTEVNT1# S3_STATE/GEVENT5# SYS_RESET#/GPM7# WAKE#/GEVENT8# BLINK/GPM6# SMBALERT#/THRMTRIP#/GEVENT2# NB_PWRGD USBCLK/14M_25M_48M_OSC USB_RCOMP USB_FSDP13+ USB_FSDM13- RSMRST# USB_HSDP8+ USB_HSDM8- SATA_DET# SIO_EXT_SMI# SIO_EXT_SCI# SB_PME# R264 *10K_NC SB_PCIE_WAKE# 31 SPKR 16,37,39,40 SB_SMBCLK 16,37,39,40 SB_SMBDATA C R586 R584 R247 *10K_NC 10K *10K_NC AE18 AD18 AA19 W17 V17 W20 SPKR W21 SB_SMBCLK AA18 SB_SMBDATA W18 K1 K2 AA20 Y18 SATA_DET# C1 SHUTDOWN#/GPIO5 Y19 G5 SIO_EXT_WAKE# SYS_RESET# CPU_THERMTRIP# +3.3V_RUN 29 THERM_ALERT# USB_HSDP6+ USB_HSDM6- 0 38 USB_OC0_1# USB_OC0_1# R267 0 R260 USB_OC6# EXPRCRD_PWREN# USB_OC4# 0 JTAG_TDO JTAG_TCK 0 JTAG_TDI SB_JTAG_RST# SB_AZ_BITCLK SB_AZ_SDOUT SB_AZ_CODEC_SDIN0 SB_AZ_CODEC_SDIN0 SB_AZ_CODEC_BITCLK SB_AZ_RST# SB_AZ_SYNC SB_AZ_RST# B9 B8 A8 A9 E5 F8 E4 M1 M2 J7 J8 L8 M3 L6 M4 L5 USB_OC6#/IR_TX1/GEVENT6# USB_OC5#/IR_TX0/GPM5# USB_OC4#/IR_RX0/GPM4# USB_OC3#/IR_RX1/GPM3# USB_OC2#/GPM2# USB_OC1#/GPM1# USB_OC0#/GPM0# AZ_BITCLK AZ_SDOUT AZ_SDIN0/GPIO42 AZ_SDIN1/GPIO43 AZ_SDIN2/GPIO44 AZ_SDIN3/GPIO46 AZ_SYNC AZ_RST# AZ_DOCK_RST#/GPM8# C376 *4.7P_NC 50 NPO A 31 SB_AZ_CODEC_SDOUT 31 SB_AZ_CODEC_SYNC 14,31,42 SB_AZ_CODEC_RST# 31 SB_AZ_CODEC_BITCLK *27P/50V_NC C684 *27P/50V_NC R582 R245 33 33 SB_AZ_SDOUT SB_AZ_SYNC SB_AZ_CODEC_RST# SB_AZ_CODEC_BITCLK R243 R581 33 33 SB_AZ_RST# SB_AZ_BITCLK C681 *27P/50V_NC C323 *27P/50V_NC PS2_DAT/EC_GPIO0 PS2_CLK/EC_GPIO1 SPI_CS2#/EC_GPIO2 IDE_RST#/F_RST#/EC_GPO3 D22 E24 E25 D23 PS2KB_DAT/EC_GPIO4 PS2KB_CLK/EC_GPIO5 PS2M_DAT/EC_GPIO6 PS2M_CLK/EC_GPIO7 C8 CLK_SB_48M_R R600 G8 USB_RCOMP R251 0 CLK_SB_48M 25 11.8K/F Place R251 near pin G8. Route it with 10mils Trace width and 25mils spacing to any signals in X, Y, Z directions. D E6 E7 F7 E8 H11 J10 SB_USBP11+ 32 SB_USBP11- 32 Camera E11 F11 SB_USBP10+ 44 SB_USBP10- 44 Biometric G11 H12 SB_USBP7+ 37 SB_USBP7- 37 EXPRESS E12 E14 SB_USBP6+ 39 SB_USBP6- 39 WPAN C12 D12 SB_USBP5+ 40 SB_USBP5- 40 WWAN B12 A12 SB_USBP4+ 39 SB_USBP4- 39 WLAN G12 G14 SB_USBP3+ 38 SB_USBP3- 38 IO board H14 H15 SB_USBP2+ 38 SB_USBP2- 38 IO board A13 B13 SB_USBP1+ 38 SB_USBP1- 38 Left side USB. B14 A14 SB_USBP0+ 38 SB_USBP0- 38 Left side USB. A11 B11 C10 D10 KSO_16/EC_GPIO8 KSO_17/EC_GPIO9 EC_PWM0/EC_GPIO10 SCL2/EC_GPIO11 SDA2/EC_GPIO12 SCL3_LV/EC_GPIO13 SDA3_LV/EC_GPIO14 EC_PWM1/EC_GPIO15 EC_PWM2/EC_GPO16 EC_PWM3/EC_GPO17 A18 B18 F21 D21 F19 E20 E21 E19 D19 E18 KSI_0/EC_GPIO18 KSI_1/EC_GPIO19 KSI_2/EC_GPIO20 KSI_3/EC_GPIO21 KSI_4/EC_GPIO22 KSI_5/EC_GPIO23 KSI_6/EC_GPIO24 KSI_7/EC_GPIO25 G20 G21 D25 D24 C25 C24 B25 C23 KSO_0/EC_GPIO26 KSO_1/EC_GPIO27 KSO_2/EC_GPIO28 KSO_3/EC_GPIO29 KSO_4/EC_GPIO30 KSO_5/EC_GPIO31 KSO_6/EC_GPIO32 KSO_7/EC_GPIO33 KSO_8/EC_GPIO34 KSO_9/EC_GPIO35 KSO_10/EC_GPIO36 KSO_11/EC_GPIO37 KSO_12/EC_GPIO38 KSO_13/EC_GPIO39 KSO_14/EC_GPIO40 KSO_15/EC_GPIO41 B24 B23 A23 C22 A22 B22 B21 A21 D20 C20 A20 B20 B19 A19 D18 C18 C SB JTAG SB_TEST1 JTAG_TDI JTAG_TDO JTAG_TCK T50 T53 T111 T55 T58 T56 +3.3V_SUS TMS TDI TDO TCK GND +3.3V SCLK3 5 SDATA3 5 GP16 GP17 GP16 GP17 14 14 STRAP pin to define use LPC or SPI ROM B Rev.A12 SB700 A12 SB_AZ_CODEC_SDOUT SB_AZ_CODEC_SYNC Close to U30 5 C331 H19 H20 H21 F25 EMBEDDED CTRL Close to SB.(~50 mils from clock pin). EMBEDDED CTRL CLK_SB_48M_R R295 *10_NC USB_HSDP3+ USB_HSDM3- USB_HSDP0+ USB_HSDM0- USB OC 38 USB_OC2_3# USB_OC2_3# R293 31 SB_AZ_CODEC_SDIN0 *10K_NC *10K_NC *10K_NC USB_HSDP4+ USB_HSDM4- USB_HSDP1+ USB_HSDM1- R294 R788 R789 R242 USB_HSDP5+ USB_HSDM5- USB_HSDP2+ USB_HSDM2- *10K_NC SHUTDOWN#/GPIO5 SB_SMBCLK 2.2K 2.2K SB_SMBDATA 37,42 EXPRCRD_PWREN# B USB_HSDP7+ USB_HSDM7- HD AUDIO R228 R560 R561 SATA_IS0#/GPIO10 CLK_REQ3#/SATA_IS1#/GPIO6 SMARTVOLT/SATA_IS2#/GPIO4 CLK_REQ0#/SATA_IS3#/GPIO0 CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39 CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40 SPKR/GPIO2 SCL0/GPOC0# SDA0/GPOC1# SCL1/GPOC2# SDA1/GPOC3# DDC1_SCL/GPIO9 DDC1_SDA/GPIO8 LLB#/GPIO66 SHUTDOWN#/GPIO5 DDR3_RST#/GEVENT7# USB 2.0 *10K_NC *10K_NC *10K_NC *10K_NC USB_HSDP11+ USB_HSDM11- USB_HSDP9+ USB_HSDM9- GPIO R589 R585 R248 R261 USB_FSDP12+ USB_FSDM12- USB_HSDP10+ USB_HSDM10- Delay 20ms after S5 powerOK +3.3V_SUS When External Clock Gen, used as 48M Clock input When Internal Clock Gen, used as 48M Clock output Part 4 of 5 SB700 USB MISC SB_TEST2 SB_TEST1 SB_TEST0 USB 1.1 *2.2K_NC *2.2K_NC *2.2K_NC ACPI / WAKE UP EVENTS R253 R252 R256 A Symbol: 2N7002W-7-F D(3) Title G(2) 4 3 2 QUANTA COMPUTER SB700-ACPI/USB/AC97 S(1) Size Document Number FX6 Date: Wednesday, June 25, 2008 Rev 3A Sheet 1 13 of 70 5 4 3 2 1 U30B 30 30 SATA_TX1+ SATA_TX1- 30 30 SATA_RX1SATA_RX1+ C652 C653 0.01U/16V 0.01U/16V SATA_TX0+_C SATA_TX0-_C SATA_TX1+_C SATA_TX1-_C SATA_TX0+ SATA_TX0- AB10 AC10 SATA_RX0SATA_RX0+ AE10 AD10 SATA_TX1+ SATA_TX1- AD11 AE11 AB12 AC12 PLACE SATA AC COUPLING CAPS CLOSE TO SB700 AE12 AD12 38 38 SATA_TX3+_C SATA_TX3-_C AD13 AE13 38 38 SATA_RX3SATA_RX3+ AB14 AC14 AE14 AD14 AD15 AE15 AB16 AC16 ESATA AE16 AD16 R237 SATA_CAL 1K/F SATA_X1 Y12 SATA_X2 AA12 C W11 SATA_ACT# 12P/50V/COG C658 12P/50V/COG AA11 +3.3V_XTLVDD_SATA W12 SATA_TX2+ SATA_TX2SATA_RX2SATA_RX2+ SATA_RX3SATA_RX3+ SATA_TX4+ SATA_TX4SATA_RX4SATA_RX4+ SATA_RX5SATA_RX5+ SATA_CAL SATA_X1 2 LAN_RST#/GPIO13 ROM_RST#/GPIO14 PLLVDD_SATA_1 XTLVDD_SATA SATA_X2 T104 T99 T46 T39 T42 T105 T98 T103 T34 T107 T108 AD24 IDE_DD0 AD23 IDE_DD1 AE22 IDE_DD2 AC22 IDE_DD3 AD21 IDE_DD4 AE20 IDE_DD5 AB20 IDE_DD6 AD19 IDE_DD7 AE19 IDE_DD8 AC20 IDE_DD9 AD20 IDE_DD10 AE21 IDE_DD11 AB22 IDE_DD12 AD22 IDE_DD13 AE23 IDE_DD14 AC23 IDE_DD15 T96 T90 T97 T40 T92 T95 T44 T106 T100 T43 T101 T36 T94 T33 T85 T88 G6 D2 D1 F4 F3 R279 R287 R296 PCIE_MCARD2_DET# USB_MCARD2_DET# WPAN_RADIO_DIS_MINI# C6 B6 A6 A5 B5 TEMP_COMM PCIE_MCARD3_DET# USB_MCARD3_DET# WWAN_RADIO_DIS# VIN0/GPIO53 VIN1/GPIO54 VIN2/GPIO55 VIN3/GPIO56 VIN4/GPIO57 VIN5/GPIO58 VIN6/GPIO59 VIN7/GPIO60 A4 B4 C4 D4 D5 D6 A7 B7 SB_WWAN_PCIE_RST# SB_WLAN_PCIE_RST# SB_WPAN_PCIE_RST# SB_LOM_PCIE_RST# LBF_ID0 LBF_ID1 LBF_ID2 AVDD F6 L31 BLM15AG221SN1D AVSS G7 KB_LED_DET 43 CAMERA_CBL_DET# 32 B C650 CLOSE TO THE BALL OF U30 C256 1U 6.3 X5R C260 *0.1U_NC 10 X7R C257 22U 6.3 X5R 0805 SB700 A12 LBF_ID2 LBF_ID1 D LBF_ID0 Hynix 0 0 Qimonda 0 0 1 Samsung 0 1 0 0 (11) CAMERA_CBL_DET# R588 *100K_NC +3.3V_RUN *0_NC T49 T47 PLTRST# 9,12,37,39,45 PCIE_MCARD1_DET# USB_MCARD1_DET# PCIE_MCARD2_DET# USB_MCARD2_DET# PCIE_MCARD3_DET# USB_MCARD3_DET# WLAN_RADIO_DIS# 39 PCIE_MCARD1_DET# 39 USB_MCARD1_DET# 39 PCIE_MCARD2_DET# 40 USB_MCARD2_DET# 40 WPAN_RADIO_DIS_MINI# T52 R244 R241 R490 R445 R553 R543 100K 100K 100K 100K 100K 100K C 39 T54 SB_WPAN_PCIE_RST# SB_WWAN_PCIE_RST# SB_WLAN_PCIE_RST# SB_LOM_PCIE_RST# PCIE_MCARD3_DET# 39 USB_MCARD3_DET# 39 WWAN_RADIO_DIS# 40 R271 R597 R275 R276 TEMP_COMM SB_WWAN_PCIE_RST# 40 SB_WLAN_PCIE_RST# 39 SB_WPAN_PCIE_RST# 39 SB_LOM_PCIE_RST# 33 20K 20K 20K 20K R644 0 +3.3V_SUS REQUIRED STRAPS BLM15AG221SN1D C344 2.2U 10 X5R 0603 LBF_ID0 LBF_ID1 LBF_ID2 +3.3V_ALW 20mil Width +1.2V_PLLVDD_SATA R297 *10K_NC BIOS should not enable the internal GPIO pull up resistor +3.3V_AVDD_HWM L38 +1.2V_RUN R286 *10K_NC 10K 10K 10K Memory Vendor U15 SB700_ROM_RST# R583 J1 P5 P8 R8 TEMP_COMM TEMPIN0/GPIO61 TEMPIN1/GPIO62 TEMPIN2/GPIO63 TEMPIN3/TALERT#/GPIO64 R280 *10K_NC CAMERA_CBL_DET# WLAN_RADIO_DIS# PCIE_MCARD1_DET# USB_MCARD1_DET# FANIN0/GPIO50 FANIN1/GPIO51 FANIN2/GPIO52 0 AA24 IDE_DIORDY# AA25 IDE_IRQ Y22 IDE_DA0 AB23 IDE_DA1 Y23 IDE_DA2 AB24 IDE_DDACK# AD25 IDE_DDREQ AC25 IDE_DIOR# AC24 IDE_DIOW# Y25 IDE_DCS1# Y24 IDE_DCS3# M8 M5 M7 FANOUT0/GPIO3 FANOUT1/GPIO48 FANOUT2/GPIO49 SATA_ACT#/GPIO67 R555 10M R193 SPI_DI/GPIO12 SPI_DO/GPIO11 SPI_CLK/GPIO47 SPI_HOLD#/GPIO31 SPI_CS#/GPIO32 SATA_X2 SATA_X1 Y4 25MHz 30PPM SATA_X2_R IDE_D0/GPIO15 IDE_D1/GPIO16 IDE_D2/GPIO17 IDE_D3/GPIO18 IDE_D4/GPIO19 IDE_D5/GPIO20 IDE_D6/GPIO21 IDE_D7/GPIO22 IDE_D8/GPIO23 IDE_D9/GPIO24 IDE_D10/GPIO25 IDE_D11/GPIO26 IDE_D12/GPIO27 IDE_D13/GPIO28 IDE_D14/GPIO29 IDE_D15/GPIO30 SATA_TX5+ SATA_TX5- 1 C659 +1.2V_PLLVDD_SATA SATA_RX1SATA_RX1+ HW MONITOR 44 V12 IDE_IORDY IDE_IRQ IDE_A0 IDE_A1 IDE_A2 IDE_DACK# IDE_DRQ IDE_IOR# IDE_IOW# IDE_CS1# IDE_CS3# Part 2 of 5 SATA_TX3+ SATA_TX3- +3.3V_RUN For Side port memory setting. SB700 AD9 AE9 ATA 66/100/133 SATA_RX0SATA_RX0+ 0.01U/16V 0.01U/16V SPI ROM 30 30 C650 C651 SERIAL ATA SATA_TX0+ SATA_TX0- SATA PWR D 30 30 C345 0.1U 10 X7R B Close to SB700 HWM_AGND +3.3V_RUN +3.3V_RUN +3.3V_RUN +3.3V_RUN +3.3V_SUS +3.3V_SUS +3.3V_RUN +3.3V_ALW +3.3V_ALW +3.3V_ALW HWM_AGND TRACE AT LEAST 10MIL WIDE +3.3V_RUN +3.3V_XTLVDD_SATA PCI_CLK2 A C264 1U 10 X6S 0603 R230 *10K_NC R568 *10K_NC R566 *10K_NC R282 2.2K R284 *2.2K_NC R216 *10K_NC R233 *10K_NC R571 10K R565 10K R281 *2.2K_NC R278 2.2K R594 *10K_NC R258 *10K_NC R265 *10K_NC R240 *10K_NC R255 10K R262 10K R236 10K 12,42 CLK_PCI_8512 12 PCI_CLK5 12 PCI_CLK2 12 PCI_CLK3 13 GP16 13 GP17 12 RTC_CLK 12 LPCCLK0 12 LPCCLK1 13,31,42 SB_AZ_CODEC_RST# L32 BLM15AG221SN1D C650 CLOSE TO THE BALL OF U30 R215 *10K_NC C293 *0.1U_NC 10 X7R PCI_CLK3 LPC_CLK0 LPC_CLK1 RTC_CLK SB_AZ_CODEC_RST# INTERNAL RTC EC ENABLED GP17 GP16 ROM TYPE: PULL HIGH BOOTFAIL TIMER ENABLED USE DEBUG STRAPS ENABLE PCI MEM BOOT CLKGEN ENABLED PULL LOW BOOTFAIL TIMER DISABLED IGNORE DEBUG STRAPS DISABLE PCI MEM BOOT CLKGEN DISABLED DEFAULT DEFAULT DEFAULT DEFAULT 5 DEFAULT A H, H = Reserved H, L = SPI ROM EXT. RTC (PD on X1, apply 32KHz to RTC_CLK) 4 EC DISABLED L, H = LPC ROM DEFAULT L, L = FWH ROM DEFAULT Title QUANTA COMPUTER SB700-HDD/POWER 3 2 Size Document Number FX6 Date: Wednesday, June 25, 2008 Rev 3A Sheet 1 14 of 70 5 4 3 2 1 +1.2V_VDD L43 +1.2V_ALW_SUS FBMJ4516HS111-T 1806 U30C C308 C327 C339 1U 6.3 X5R 1U 6.3 X5R 1U 6.3 X5R 1U 6.3 X5R Y20 AA21 AA22 AE25 +3.3V_RUN C258 *22U_NC 6.3 X5R 0805 C296 C298 C274 C295 *0.1U_NC*0.1U_NC*0.1U_NC*0.1U_NC 10 10 10 10 X7R X7R X7R X7R VDD33_18_1 VDD33_18_2 VDD33_18_3 VDD33_18_4 +1.2V_PCIE_VDDR C 50mil Width BLM21PG221SN1D 0805 C683 22U 6.3 X5R 0805 C686 1U 6.3 X5R C687 1U 6.3 X5R C320 1U 6.3 X5R C325 1U 6.3 X5R +1.2V_RUN C314 0.1U 10 X7R P18 P19 P20 P21 R22 R24 R25 C326 0.1U 10 X7R PCIE_VDDR_1 PCIE_VDDR_2 PCIE_VDDR_3 PCIE_VDDR_4 PCIE_VDDR_5 PCIE_VDDR_6 PCIE_VDDR_7 +1.2V_AVDD_SATA C291 1U 6.3 X5R C263 1U 6.3 X5R C277 0.1U 10 X7R AA14 AB18 AA15 AA17 AC18 AD17 AE17 C280 0.1U 10 X7R AVDD_SATA_1 AVDD_SATA_4 AVDD_SATA_2 AVDD_SATA_3 AVDD_SATA_5 AVDD_SATA_6 AVDD_SATA_7 SATA I/O C259 22U 6.3 X5R 0805 S5_3.3V_1 S5_3.3V_2 S5_3.3V_3 S5_3.3V_4 S5_3.3V_5 S5_3.3V_6 S5_3.3V_7 +3.3V_SUS C380 1U 10 X6S 0603 +1.2V_CKVDD C332 2.2U 10 X5R 0603 L40 100mil Width C379 1U 10 X6S 0603 C381 1U 10 X6S 0603 C378 1U 10 X6S 0603 C377 22U 6.3 X5R 0805 C313 0.1U 10 X7R BLM21PG221SN1D 0805 C334 2.2U 10 X5R 0603 A17 A24 B17 J4 J5 L1 L2 SB700 T10 U10 U11 U12 V11 V14 W9 Y9 Y11 Y14 Y17 AA9 AB9 AB11 AB13 AB15 AB17 AC8 AD8 AE8 +1.2V_RUN C330 10U 4 X5R 0603 +3.3V_ALW R290 *0_NC R298 *0_NC 0805 C366 1U 6.3 X5R 2 C363 1U 6.3 X5R C391 0.1U 10 X7R 0805 +3.3V_SUS PJP9 50mil Width C370 22U 6.3 X5R 0805 S5_1.2V_1 S5_1.2V_2 G2 G4 A10 B10 C361 1U 6.3 X5R C358 1U 6.3 X5R C704 0.1U 10 X7R C708 1U 6.3 X5R POWER_JP A15 B15 C14 D8 D9 D11 D13 D14 D15 E15 F12 F14 G9 H9 H17 J9 J11 J12 J14 J15 K10 K12 K14 K15 Use shape short Jump. +1.2V_SUS C709 22U 6.3 X5R 0805 C707 1U 6.3 X5R C382 1U 6.3 X5R C362 1U 6.3 X5R C365 1U 6.3 X5R C360 0.1U 10 X7R C357 0.1U 10 X7R C353 0.1U 10 X7R AVDDTX_0 AVDDTX_1 AVDDTX_2 AVDDTX_3 AVDDTX_4 AVDDTX_5 AVDDRX_0 AVDDRX_1 AVDDRX_2 AVDDRX_3 AVDDRX_4 AVDDRX_5 PLL C372 22U 6.3 X5R 0805 A16 B16 C16 D16 D17 E17 F15 F17 F18 G15 G17 G18 USB I/O L42 BLM21PG221SN1D 0805 +V5_VREF1 V5_VREF AE7 AVDDCK_3.3V J16 +3.3V_AVDDCK K17 +1.2V_AVDDCK AVDDCK_1.2V AVDDC L37 20mil Width 20mil Width L39 BLM15AG221SN1D BLM15AG221SN1D E9 +3.3V_AVDDC C347 2.2U 10 X5R 0603 +1.2V_RUN +3.3V_AVDDC +3.3V_RUN C343 2.2U 10 X5R 0603 H18 J17 J22 K25 M16 M17 M21 P16 L41 BLM15AG221SN1D C356 0.1U 10 X7R SB700 A12 AVSS_SATA_1 AVSS_SATA_2 AVSS_SATA_3 AVSS_SATA_4 AVSS_SATA_5 AVSS_SATA_6 AVSS_SATA_7 AVSS_SATA_8 AVSS_SATA_9 AVSS_SATA_10 AVSS_SATA_11 AVSS_SATA_12 AVSS_SATA_13 AVSS_SATA_14 AVSS_SATA_15 AVSS_SATA_16 AVSS_SATA_17 AVSS_SATA_18 AVSS_SATA_19 AVSS_SATA_20 1 20mil Width C696 0.1U 10 X7R +AVDD_USB C355 1U 6.3 X5R VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 (5) C385 0.1U 10 X7R +1.2V_ALW_SUS C352 1U 6.3 X5R D U30E 4A DC 0.014ohm L35 30mil Width C333 2.2U 10 X5R 0603 +1.2V_RUN *FBMJ4516HS111-T_NC C329 1806 0.1U 10 Note: FBMJ4516HS111-T X7R was 110 ohm@100MHz 20mil Width USB_PHY_1.2V_1 USB_PHY_1.2V_2 B L21 L22 L24 L25 +1.2V_VDD +3.3V_ALW_R L33 BLM21PG221SN1D 0805 CKVDD_1.2V_1 CKVDD_1.2V_2 CKVDD_1.2V_3 CKVDD_1.2V_4 L15 M12 M14 N13 P12 P14 R11 R15 T16 POWER +1.2V_RUN L78 VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 +3.3V_SUS C383 2.2U 10 X5R 0603 F9 AVSS_USB_1 AVSS_USB_2 AVSS_USB_3 AVSS_USB_4 AVSS_USB_5 AVSS_USB_6 AVSS_USB_7 AVSS_USB_8 AVSS_USB_9 AVSS_USB_10 AVSS_USB_11 AVSS_USB_12 AVSS_USB_13 AVSS_USB_14 AVSS_USB_15 AVSS_USB_16 AVSS_USB_17 AVSS_USB_18 AVSS_USB_19 AVSS_USB_20 AVSS_USB_21 AVSS_USB_22 AVSS_USB_23 AVSS_USB_24 PCIE_CK_VSS_1 PCIE_CK_VSS_2 PCIE_CK_VSS_3 PCIE_CK_VSS_4 PCIE_CK_VSS_5 PCIE_CK_VSS_6 PCIE_CK_VSS_7 PCIE_CK_VSS_8 AVSSC GROUND C272 1U 6.3 X5R CORE S0 C279 1U 6.3 X5R CLKGEN I/O C311 3.3V_S5 I/O 220U 6.3 Polymer 7343 CORE S5 C261 0.1U 10 X7R Part 3 of 5 PCI/GPIO I/O C266 0.1U 10 X7R D SB700 VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9 VDDQ_10 VDDQ_11 VDDQ_12 A-LINK I/O + C233 IDE/FLSH I/O L9 M9 T15 U9 U16 U17 V8 W7 Y6 AA4 AB5 AB21 +3.3V_RUN PCIE_CK_VSS_9 PCIE_CK_VSS_10 PCIE_CK_VSS_11 PCIE_CK_VSS_12 PCIE_CK_VSS_13 PCIE_CK_VSS_14 PCIE_CK_VSS_15 PCIE_CK_VSS_16 PCIE_CK_VSS_17 PCIE_CK_VSS_18 PCIE_CK_VSS_19 PCIE_CK_VSS_20 PCIE_CK_VSS_21 AVSSCK Part 5 of 5 A2 A25 B1 D7 F20 G19 H8 K9 K11 K16 L4 L7 L10 L11 L12 L14 L16 M6 M10 M11 M13 M15 N4 N12 N14 P6 P9 P10 P11 P13 P15 R1 R2 R4 R9 R10 R12 R14 T11 T12 T14 U4 U14 V6 Y21 AB1 AB19 AB25 AE1 AE24 C B P23 R16 R19 T17 U18 U20 V18 V20 V21 W19 W22 W24 W25 L17 SB700 A12 +5V_RUN A +3.3V_RUN R556 D31 2 SDMK0340L-7-F 1K 1 SOD-323 +V5_VREF1 A C641 1U 6.3 X5R Title QUANTA COMPUTER SB700-POWER 5 4 3 2 Size Document Number FX6 Date: Wednesday, June 25, 2008 Rev 3A Sheet 1 15 of 70 A B +1.8V_SUS C +1.8V_SUS D +1.8V_SUS E +1.8V_SUS +0.9V_DDR_REF +0.9V_DDR_REF +1.8V_SUS DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 4 DDR_A_DQS#1 DDR_A_DQS1 DDR_A_D10 DDR_A_D14 DDR_A_D16 DDR_A_D17 DDR_A_DQS#2 DDR_A_DQS2 DDR_A_D19 DDR_A_D18 DDR_A_D25 DDR_A_D24 DDR_A_DM3 DDR_A_D30 DDR_A_D27 4,17 DDR_CKE0_DIMMA 4,17 DDR_A_BS2 DDR_A_MA12 DDR_A_MA9 DDR_A_MA8 DDR_A_MA5 DDR_A_MA3 DDR_A_MA1 3 4,17 DDR_A_BS0 4,17 DDR_A_WE# 4,17 DDR_A_CAS# 4,17 DDR_CS1_DIMMA# 4,17 DDR_A_MA10 DDR_A_BS0 DDR_A_WE# DDR_A_CAS# M_ODT1 M_ODT1 DDR_A_D36 DDR_A_D37 DDR_A_DQS#4 DDR_A_DQS4 DDR_A_D39 DDR_A_D38 DDR_A_D40 DDR_A_D41 DDR_A_DM5 DDR_A_D46 DDR_A_D47 DDR_A_D52 DDR_A_D49 DDR_A_DQS#6 DDR_A_DQS6 2 DDR_A_D54 DDR_A_D55 DDR_A_D61 DDR_A_D60 DDR_A_DM7 DDR_A_D63 DDR_A_D62 13,37,39,40 SB_SMBDATA 13,37,39,40 SB_SMBCLK +3.3V_RUN C221 2.2U 10 X7R 0603 SB_SMBDATA SB_SMBCLK C223 0.1U 10 X7R 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203 BOT-UP VREF VSS47 DQ0 DQ1 VSS37 DQS#0 DQS0 VSS48 DQ2 DQ3 VSS38 DQ8 DQ9 VSS49 DQS#1 DQS1 VSS39 DQ10 DQ11 VSS50 VSS46 DQ4 DQ5 VSS15 DM0 VSS5 DQ6 DQ7 VSS16 DQ12 DQ13 VSS17 DM1 VSS53 CK0 CK0# VSS41 DQ14 DQ15 VSS54 VSS18 DQ16 DQ17 VSS1 DQS#2 DQS2 VSS19 DQ18 DQ19 VSS22 DQ24 DQ25 VSS23 DM3 NC4 VSS9 DQ26 DQ27 VSS4 CKE0 VDD7 NC1 A16_BA2 VDD9 A12 A9 A8 VDD5 A5 A3 A1 VDD10 A10/AP BA0 WE# VDD2 CAS# S1# VDD3 ODT1 VSS11 DQ32 DQ33 VSS26 DQS#4 DQS4 VSS2 DQ34 DQ35 VSS27 DQ40 DQ41 VSS29 DM5 VSS51 DQ42 DQ43 VSS40 DQ48 DQ49 VSS52 NCTEST VSS30 DQS#6 DQS6 VSS31 DQ50 DQ51 VSS33 DQ56 DQ57 VSS3 DM7 VSS34 DQ58 DQ59 VSS14 SDA SCL VDD(SPD) GNDPAD1 H1 VSS20 DQ20 DQ21 VSS6 NC3 DM2 VSS21 DQ22 DQ23 VSS24 DQ28 DQ29 VSS25 DQS#3 DQS3 VSS10 DQ30 DQ31 VSS8 CKE1 VDD8 A15 A14 VDD11 A11 A7 A6 VDD4 A4 A2 A0 VDD12 BA1 RAS# S0# VDD1 ODT0 A13 VDD6 NC2 VSS12 DQ36 DQ37 VSS28 DM4 VSS42 DQ38 DQ39 VSS55 DQ44 DQ45 VSS43 DQS#5 DQS5 VSS56 DQ46 DQ47 VSS44 DQ52 DQ53 VSS57 CK1 CK1# VSS45 DM6 VSS32 DQ54 DQ55 VSS35 DQ60 DQ61 VSS7 DQS#7 DQS7 VSS36 DQ62 DQ63 VSS13 SA0 SA1 GNDPAD2 H2 PC4800 DDR2 SDRAM SO-DIMM (200P) DDR_A_DQS#0 DDR_A_DQS0 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204 C628 2.2U 10 X7R 0603 DDR_A_D5 DDR_A_D4 C629 0.1U 10 X7R DDR_A_DM0 DDR_B_DQS#0 DDR_B_DQS0 DDR_A_D2 DDR_A_D3 DDR_A_D12 DDR_A_D13 Place C628 2.2uF and C629 0.1uF < 500mils from DDR connector DDR_A_DM1 M_CLK_DDR0 M_CLK_DDR#0 CKE 0,1 DDR_B_D3 DDR_B_D2 DDR_B_D8 DDR_B_D9 DDR_B_DQS#1 DDR_B_DQS1 M_CLK_DDR0 4 M_CLK_DDR#0 4 DDR_A_D11 DDR_A_D15 DDR_A_DM[0..7] 4 DDR_A_D[0..63] 4 DDR_A_DQS[0..7] 4 DDR_A_DQS#[0..7] 4 DDR_A_MA[0..15] 4,17 DDR_A_D20 DDR_A_D21 NC_PM_EXTTS#0 DDR_A_DM2 CPU_MEMHOT# DDR_B_D10 DDR_B_D14 DDR_B_D16 DDR_B_D21 DDR_B_DQS#2 DDR_B_DQS2 DDR_A_D22 DDR_A_D23 DDR_B_D18 DDR_B_D19 DDR_A_D28 DDR_A_D29 DDR_B_D25 DDR_B_D29 DDR_A_DQS#3 DDR_A_DQS3 DDR_B_DM3 DDR_A_D31 DDR_A_D26 DDR_B_D27 DDR_B_D31 DDR_CKE1_DIMMA 4,17 4,17 DDR_CKE2_DIMMB DDR_A_MA15 DDR_A_MA14 DDR_B_BS2 4,17 DDR_B_BS2 DDR_A_MA11 DDR_A_MA7 DDR_A_MA6 DDR_B_MA12 DDR_B_MA9 DDR_B_MA8 DDR_A_MA4 DDR_A_MA2 DDR_A_MA0 DDR_A_BS1 DDR_A_RAS# DDR_B_MA5 DDR_B_MA3 DDR_B_MA1 DDR_A_BS1 4,17 DDR_A_RAS# 4,17 DDR_CS0_DIMMA# 4,17 M_ODT0 DDR_A_MA13 M_ODT0 4,17 4,17 DDR_B_BS0 4,17 DDR_B_WE# 4,17 DDR_B_MA10 DDR_B_BS0 DDR_B_WE# DDR_B_CAS# 4,17 DDR_B_CAS# 4,17 DDR_CS1_DIMMB# M_ODT3 DDR_A_D33 DDR_A_D32 M_ODT3 DDR_B_D37 DDR_B_D36 M_CLK_DDR0 DDR_A_DM4 DDR_A_D35 DDR_A_D34 DDR_A_D44 DDR_A_D45 DDR_A_DQS#5 DDR_A_DQS5 DDR_A_D42 DDR_A_D43 DDR_A_D53 DDR_A_D48 M_CLK_DDR1 M_CLK_DDR#1 DDR_B_DQS#4 DDR_B_DQS4 C143 1.5P/50V M_CLK_DDR#0 DDR_B_D34 DDR_B_D38 M_CLK_DDR1 DDR_B_D40 DDR_B_D45 C138 1.5P/50V M_CLK_DDR#1 DDR_B_DM5 DDR_B_D42 DDR_B_D46 PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH DDR_B_D53 DDR_B_D52 M_CLK_DDR1 4 M_CLK_DDR#1 4 DDR_A_DM6 DDR_B_DQS#6 DDR_B_DQS6 DDR_A_D50 DDR_A_D51 DDR_B_D50 DDR_B_D54 DDR_A_D56 DDR_A_D57 DDR_B_D57 DDR_B_D60 DDR_A_DQS#7 DDR_A_DQS7 DDR_B_DM7 DDR_B_D58 DDR_B_D59 DDR_A_D58 DDR_A_D59 SB_SMBDATA SB_SMBCLK +3.3V_RUN R202 10K R201 10K TYCO_1775804-2 CLOCK 0,1 CN6 DDR_B_D4 DDR_B_D5 SMbus address A0 C248 2.2U 10 X7R 0603 C249 0.1U 10 X7R 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203 BOT-DOWN VREF VSS47 DQ0 DQ1 VSS37 DQS#0 DQS0 VSS48 DQ2 DQ3 VSS38 DQ8 DQ9 VSS49 DQS#1 DQS1 VSS39 DQ10 DQ11 VSS50 VSS46 DQ4 DQ5 VSS15 DM0 VSS5 DQ6 DQ7 VSS16 DQ12 DQ13 VSS17 DM1 VSS53 CK0 CK0# VSS41 DQ14 DQ15 VSS54 VSS18 DQ16 DQ17 VSS1 DQS#2 DQS2 VSS19 DQ18 DQ19 VSS22 DQ24 DQ25 VSS23 DM3 NC4 VSS9 DQ26 DQ27 VSS4 CKE0 VDD7 NC1 A16_BA2 VDD9 A12 A9 A8 VDD5 A5 A3 A1 VDD10 A10/AP BA0 WE# VDD2 CAS# S1# VDD3 ODT1 VSS11 DQ32 DQ33 VSS26 DQS#4 DQS4 VSS2 DQ34 DQ35 VSS27 DQ40 DQ41 VSS29 DM5 VSS51 DQ42 DQ43 VSS40 DQ48 DQ49 VSS52 NCTEST VSS30 DQS#6 DQS6 VSS31 DQ50 DQ51 VSS33 DQ56 DQ57 VSS3 DM7 VSS34 DQ58 DQ59 VSS14 SDA SCL VDD(SPD) GNDPAD1 H1 VSS20 DQ20 DQ21 VSS6 NC3 DM2 VSS21 DQ22 DQ23 VSS24 DQ28 DQ29 VSS25 DQS#3 DQS3 VSS10 DQ30 DQ31 VSS8 CKE1 VDD8 A15 A14 VDD11 A11 A7 A6 VDD4 A4 A2 A0 VDD12 BA1 RAS# S0# VDD1 ODT0 A13 VDD6 NC2 VSS12 DQ36 DQ37 VSS28 DM4 VSS42 DQ38 DQ39 VSS55 DQ44 DQ45 VSS43 DQS#5 DQS5 VSS56 DQ46 DQ47 VSS44 DQ52 DQ53 VSS57 CK1 CK1# VSS45 DM6 VSS32 DQ54 DQ55 VSS35 DQ60 DQ61 VSS7 DQS#7 DQS7 VSS36 DQ62 DQ63 VSS13 SA0 SA1 GNDPAD2 H2 PC4800 DDR2 SDRAM SO-DIMM (200P) CN5 DDR_A_D1 DDR_A_D0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204 TYCO_292406-4 CLOCK 2,3 CKE 2,3 C656 2.2U 10 X7R 0603 C663 0.1U 10 X7R C627 2.2U/10V/0603 C624 2.2U/10V/0603 DDR_B_DM0 C626 2.2U/10V/0603 DDR_B_D7 DDR_B_D6 C240 2.2U/10V/0603 C239 2.2U/10V/0603 C268 2.2U/10V/0603 C267 2.2U/10V/0603 C241 2.2U/10V/0603 C271 2.2U/10V/0603 C269 2.2U/10V/0603 DDR_B_D1 DDR_B_D0 Place C656 2.2uF and C663 0.1uF < 500mils from DDR connector DDR_B_D12 DDR_B_D13 4 DDR_B_DM1 M_CLK_DDR2 4 M_CLK_DDR#2 4 DDR_B_D15 DDR_B_D11 DDR_B_DM[0..7] 4 DDR_B_D[0..63] 4 DDR_B_DQS[0..7] 4 DDR_B_DQS#[0..7] 4 DDR_B_MA[0..15] 4,17 DDR_B_D20 DDR_B_D17 NC_PM_EXTTS#1 DDR_B_DM2 CPU_MEMHOT# CPU_MEMHOT# 5 C270 0.1U/10V C238 0.1U/10V C244 0.1U/10V DDR_B_D22 DDR_B_D23 C623 0.1U/10V DDR_B_D28 DDR_B_D24 C237 0.1U/10V C625 0.1U/10V C245 0.1U/10V C243 0.1U/10V DDR_B_DQS#3 DDR_B_DQS3 DDR_B_D30 DDR_B_D26 DDR_CKE3_DIMMB 4,17 DDR_B_MA15 DDR_B_MA14 Note: Place C627,C624,C240,C626,C239 and C268,C267,C241,C271,C269 close to CN5 Place C270,C238,C244,C623,C237 and C625,C245,C243 close to CN6 DDR_B_MA11 DDR_B_MA7 DDR_B_MA6 DDR_B_MA4 DDR_B_MA2 DDR_B_MA0 3 DDR_B_BS1 4,17 DDR_B_RAS# 4,17 DDR_CS0_DIMMB# 4,17 M_ODT2 DDR_B_MA13 4,17 +1.8V_SUS DDR_B_D33 DDR_B_D32 PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH DDR_B_DM4 R572 DDR_B_D35 DDR_B_D39 M_CLK_DDR2 1K 1% DDR_B_D44 DDR_B_D41 C544 1.5P/50V M_CLK_DDR#2 R567 DDR_B_DQS#5 DDR_B_DQS5 M_CLK_DDR3 DDR_B_D43 DDR_B_D47 1K 1% C672 0.1U 10 X7R C669 0.1U 10 X7R +0.9V_DDR_REF C664 1000P 50 X7R C144 1.5P/50V M_CLK_DDR#3 DDR_B_D48 DDR_B_D49 Note: Place close to DIMM M_CLK_DDR3 4 M_CLK_DDR#3 4 DDR_B_DM6 2 DDR_B_D51 DDR_B_D55 DDR_B_D56 DDR_B_D61 DDR_B_DQS#7 DDR_B_DQS7 DDR_B_D62 DDR_B_D63 +3.3V_RUN R226 10K R227 10K SMbus address A4 1 1 Title QUANTA COMPUTER DDRII SODIMMX2 A B C D Size Document Number FX6 Date: Wednesday, June 25, 2008 Rev 3A Sheet E 16 of 70 1 2 3 4 5 6 7 8 +0.9V_DDR_VTT +0.9V_DDR_VTT 4,16 DDR_A_MA[0..15] DDR_A_MA3 DDR_A_MA1 A C287 C229 C215 C285 C307 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V C217 C289 C252 C227 C216 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V C247 C214 C286 C212 C288 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V C219 C220 C284 C283 C230 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V C213 C228 C251 C226 C211 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V DDR_A_MA[0..15] 2 RP9 4 1 3 RP12 1 3 RP13 1 3 4P2R-47 R181 4,16 DDR_A_BS0 DDR_A_MA12 DDR_A_MA9 4,16 DDR_A_BS2 4,16 DDR_CKE1_DIMMA DDR_A_MA4 DDR_A_MA6 2 4 DDR_A_MA0 DDR_A_MA2 4P2R-47 47 2 RP7 4 1 3 4P2R-47 4,16 DDR_CKE0_DIMMA 2 4 R179 47 R178 47 R195 R180 R184 R183 R185 4P2R-47 47 47 47 47 R199 R196 47 47 R198 47 RP11 1 3 RP10 1 3 47 A DDR_A_WE# 4,16 DDR_A_CAS# 4,16 DDR_CS1_DIMMA# 4,16 M_ODT1 4,16 DDR_CS0_DIMMA# DDR_A_RAS# DDR_CS0_DIMMA# 4,16 DDR_A_RAS# 4,16 M_ODT0 2 4 DDR_A_MA11 DDR_A_MA7 2 4 DDR_A_MA14 DDR_A_MA15 M_ODT0 4,16 4P2R-47 B C250 C301 C253 C218 C254 DDR_A_MA5 DDR_A_MA8 2 RP8 4 1 3 4P2R-47 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V R197 4,16 DDR_A_BS1 47 DDR_B_MA[0..15] 4,16 DDR_B_MA[0..15] R182 R200 DDR_B_MA8 DDR_B_MA5 1 3 DDR_B_MA3 DDR_B_MA1 1 3 2 RP15 4 2 RP16 4 4P2R-47 DDR_B_MA9 DDR_B_MA12 Note: Reserve stitching function for CN5. 4,16 DDR_CKE2_DIMMB +1.8V_SUS +1.8V_SUS +1.8V_SUS +1.8V_SUS +1.8V_SUS +1.8V_SUS C299 C306 C207 C206 C305 C236 C235 C302 0.1U 16 X7R 0.1U 16 X7R *0.1U_NC 16 X7R *0.1U_NC 16 X7R 0.1U 16 X7R *0.1U_NC 16 X7R *0.1U_NC 16 X7R 0.1U 16 X7R +0.9V_DDR_VTT +0.9V_DDR_VTT +0.9V_DDR_VTT +0.9V_DDR_VTT DDR_B_MA14 DDR_B_MA11 1 3 47 47 4P2R-47 C +1.8V_SUS 2 4 B 4P2R-47 Layout Note: Place one cap close to every 2 pullup resistors terminated to +0.9V_DDR_VTT +1.8V_SUS DDR_A_MA10 DDR_A_MA13 +0.9V_DDR_VTT RP18 R210 R211 4,16 DDR_B_BS0 4,16 DDR_B_WE# 4P2R-47 47 47 +0.9V_DDR_VTT +0.9V_DDR_VTT +0.9V_DDR_VTT 4,16 DDR_B_BS2 R208 4P2R-47 47 R207 47 1 3 DDR_B_MA6 DDR_B_MA4 1 3 4,16 DDR_B_BS1 R223 R220 47 47 DDR_CS0_DIMMB# DDR_B_RAS# R214 47 M_ODT3 DDR_B_CAS# 4,16 DDR_CS1_DIMMB# 4,16 M_ODT2 4,16 DDR_CKE3_DIMMB 4,16 RP17 M_ODT3 DDR_B_MA15 DDR_B_MA7 47 47 DDR_B_MA10 DDR_B_MA13 4,16 4P2R-47 R209 R224 4P2R-47 R221 47 2 4 1 3 2 RP19 4 C DDR_CS0_DIMMB# 4,16 DDR_B_RAS# 4,16 2 RP20 4 4P2R-47 +0.9V_DDR_VTT 47 47 47 47 2 RP14 4 1 3 DDR_B_MA2 DDR_B_MA0 R212 R213 R222 R225 Note: Reserve stitching function for CN6. D +1.8V_SUS +1.8V_SUS +1.8V_SUS +1.8V_SUS +1.8V_SUS +1.8V_SUS +1.8V_SUS +1.8V_SUS C242 C300 C208 C303 C209 C210 C246 C304 0.1U 16 X7R *0.1U_NC 16 X7R 0.1U 16 X7R *0.1U_NC 16 X7R *0.1U_NC 16 X7R *0.1U_NC 16 X7R 0.1U 16 X7R 0.1U 16 X7R +0.9V_DDR_VTT +0.9V_DDR_VTT +0.9V_DDR_VTT Title +0.9V_DDR_VTT +0.9V_DDR_VTT 1 +0.9V_DDR_VTT 2 3 +0.9V_DDR_VTT D QUANTA COMPUTER DDRII TERMINATION Size Document Number FX6 Date: Wednesday, June 25, 2008 +0.9V_DDR_VTT 4 5 6 7 Rev 3A Sheet 17 of 8 70 5 4 3 2 1 D D BLANK PAGE FOR PAGE NUMBER SAME AS DISCRETE C C B B A A Title Blank Page Size B Date: 5 4 3 2 Document Number FX6 Tuesday, June 03, 2008 Rev 3A Sheet 1 18 of 70 5 4 3 2 1 D D C C BLANK PAGE FOR PAGE NUMBER SAME AS DISCRETE B B A A Title Blank Page Size Document Number CustomFX6 Date: 5 4 3 2 Tuesday, June 03, 2008 Rev 3A Sheet 1 19 of 70 5 4 3 2 1 D D C C BLANK PAGE FOR PAGE NUMBER SAME AS DISCRETE B B A A Title Blank Page Size Document Number CustomFX6 Date: 5 4 3 2 Tuesday, June 03, 2008 Rev 3A Sheet 1 20 of 70 5 4 3 2 1 D D C C BLANK PAGE FOR PAGE NUMBER SAME AS DISCRETE B B A Title A QUANTA COMPUTER Blank Page 5 4 3 2 Size Document Number FX6 Date: Tuesday, June 03, 2008 Rev 3A Sheet 1 21 of 70 5 4 3 2 1 D D C C BLANK PAGE FOR PAGE NUMBER SAME AS DISCRETE B B A A Title Blank Page Size Document Number CustomFX6 Date: 5 4 3 2 Tuesday, June 03, 2008 Rev 3A Sheet 1 22 of 70 5 4 3 2 1 D D C C BLANK PAGE FOR PAGE NUMBER SAME AS DISCRETE B B A A Title QUANTA COMPUTER Blank Page 5 4 3 2 Size Document Number FX6 Date: Tuesday, June 03, 2008 Rev 3A Sheet 1 23 of 70 5 4 3 2 1 D D C C BLANK PAGE FOR PAGE NUMBER SAME AS DISCRETE B B A A Title Blank Page Size Document Number CustomFX6 Date: 5 4 3 2 Rev 3A Tuesday, June 03, 2008 Sheet 1 24 of 70 1 2 3 600 ohm +-25%@100MHz 25m ohm max DC resistance 1A current rating 5 6 Place Decoupling Cap close to GROUP1 each VDD pin as possibble. C576 0.1U 10 X7R C546 0.1U 10 X7R C578 0.1U 10 X7R C547 0.1U 10 X7R C566 0.1U 10 X7R C545 0.1U 10 X7R 8 Place Decoupling Cap close to GROUP2 each VDD pin as possibble. +3.3V_CLK(40 mils) L26 FBM-11-160808-601A10T 0603 C178 22U 6.3 X5R 0805 +3.3V_CLK(40 mils) L27 FBM-11-160808-601A10T 0603 C583 C170 10U 22U 6.3 10 X5R X5R 0805 0805 7 +3.3V_VDDIO +3.3V_RUN +3.3V_CLK +3.3V_RUN A 4 C150 0.1U 10 X7R C156 0.1U 10 X7R C176 0.1U 10 X7R C177 0.1U 10 X7R C167 0.1U 10 X7R C151 0.1U 10 X7R C152 0.1U 10 X7R C164 0.1U 10 X7R A +3.3V_RUN +3VS_CLK_VDDREF C563 0.1U 10 X7R (GROUP1) +3.3V_RUN L25 FBM-11-160808-601A10T 0603 +3VS_CLK_VDD48 C175 22U 6.3 X5R 0805 C174 0.1U 10 X7R +3.3V_VDDIO (GROUP2) Place Decoupling Cap close to each VDD pin as possibble. B 33P 50 NPO 2 Parallel Resonance Crystal C567 R487 1 Y3 14.318MHZ C570 33P 50 NPO 4 16 26 35 48 55 56 40 63 VDDDOT VDDSRC VDDATIG VDDSB VDDCPU VDDHTT VDDREF VDD_SATA VDD48 11 17 25 34 47 VDDSRC_IO VDDSRC_IO VDDATIG_IO VDDSB_IO VDDCPU_IO 1 7 10 18 24 33 43 46 52 60 GND48 GNDDOT GNDSRC GNDSRC GNDATIG GNDSB GNDSATA GNDCPU GNDHTT GNDREF XTALIN_CLK 61 XTALOUT_CLK 62 R489 0 +3.3V_RUN R138 QFN64 2 3 PD# 10K *10K_NC 10K 10K 10K 10K 51 23 38 39 44 45 37 EXPRESSCARD_REQ# 33 LOM_CLKREQ# 40 MINI3CLK_REQ# 39 MINI2CLK_REQ# 39 MINI1CLK_REQ# CPUK8_0T CPUK8_0C 50 49 CPUCLK_R CPUCLK_R# ATIG0T ATIG0C ATIG1T ATIG1C 30 29 28 27 NB_GFX NB_GFX# GFX_CLK GFX_CLK# R470 R473 R477 R480 0 0 0 0 SB_SRC0T SB_SRC0C SB_SRC1T SB_SRC1C 37 36 32 31 NB_SBLINK NB_SBLINK# PCIE_SB PCIE_SB# R459 R458 R465 R468 0 0 0 0 SRC0T SRC0C SRC1T SRC1C SRC2T SRC2C SRC3T SRC3C SRC4T SRC4C SRC7T/27M_SS SRC7C/27M SRC6T/SATAT SRC6C/SATAC 22 21 20 19 15 14 13 12 9 8 6 5 42 41 PCIE_EXPCARD PCIE_EXPCARD# PCIE_MINI1 PCIE_MINI1# PCIE_MINI2 PCIE_MINI2# PCIE_MINI3 PCIE_MINI3# PCIE_LOM PCIE_LOM# VGA_27M_SS VGA_27M_NSS GPP_REFCLK GPP_REFCLK# R484 R486 R488 R491 R496 R497 R498 R499 R500 R501 R494 R495 R457 R456 0 0 0 0 0 0 0 0 0 0 0 0 0 0 HTT0T/66M HTT0C/66M 54 53 NBHT NBHT# R476 R472 0 0 48MHz_0 64 CLK_SB REF0/SEL_HTT66 REF1/SEL_SATA REF2/SEL_27 59 58 57 SEL_HT66 SEL_SATA R146 SEL_27 X1 X2 SMBCLK SMBDAT PD# *CLKREQ0# *CLKREQ4# *CLKREQ3# *CLKREQ2# *CLKREQ1# R469 R466 R493 33 C SLG8SP628VTR(QFN) +3.3V_RUN 2 26,29,42 SMBDAT1 CPU_CLK 5 CPU_CLK# 5 3 CLK_NB_GFX 9 CLK_NB_GFX# 9 CLK_PCIE_VGA CLK_PCIE_VGA# CLK_NB_SBLINK 9 CLK_NB_SBLINK# 9 CLK_PCIE_SB 12 CLK_PCIE_SB# 12 CLK_PCIE_EXPCARD 37 CLK_PCIE_EXPCARD# 37 B CLK_PCIE_MINI1 39 CLK_PCIE_MINI1# 39 CLK_PCIE_MINI2 39 CLK_PCIE_MINI2# 39 CLK_PCIE_MINI3 40 CLK_PCIE_MINI3# 40 CLK_PCIE_LOM 33 CLK_PCIE_LOM# 33 CLK_VGA_27M_SS CLK_VGA_27M_NSS CLK_GPP_REFCLK 9 CLK_GPP_REFCLK# 9 HT_REFCLK 9 HT_REFCLK# 9 CLK_SB_48M 13 43.2/F CLK_NB_14M 9 R483 90.9/F C +3.3V_RUN SMbus address D2 These are for backdrive issue. *261/F_NC 0 0 TGND R471 R775 R454 R453 R123 R144 U26 *1M_NC XTALOUT_CLK_C CLK_SCLK CLK_SDATA PD# LOM_CLKREQ# MINI1CLK_REQ# MINI2CLK_REQ# MINI3CLK_REQ# EXPRESSCARD_REQ# Need check footprint +3.3V_CLK C163 2.2U 10 X5R 0603 65 L24 FBM-11-160808-601A10T 0603 R482 R143 R140 *10K_NC *10K_NC 10K SEL_HT66 SEL_SATA SEL_27 R148 2.2K Q20 CLK_SB_48M CLK_NB_14M CLK_SDATA 1 2N7002W-7-F R485 R142 R141 10K *10K_NC *10K_NC C565 10P 50 NPO D 3 G 2 1 S 2N7002W-7-F C575 10P 50 NPO +3.3V_RUN 1 Pin54/53: 66MHz 3.3V single ended HTT clock 0 Pin54/53: 100MHz differential HTT clock SEL_HTT66 OSC 14M_NB D 2 D R147 2.2K 1 Pin42/41: 100MHz No_SSC-Differential SATA clock 3 0 Pin42/41: 100MHz SRC clock R607 RX780 +1.8V 82R RS780 +1.1V 158R R637 Q21 SEL_SATA 26,29,42 SMBCLK1 LEVEL CLK_SCLK 1 2N7002W-7-F 1 Pin6/5: 27 MHz / 27_SSC MHz 0 Pin6/5: 100MHz SRC clock Title CLOCK GENERATOR SEL_27 1 2 QUANTA COMPUTER 130R 90.9R 3 4 5 6 Size Document Number FX6 Date: Wednesday, June 25, 2008 7 Rev 3A Sheet 25 of 8 70 5 4 3 2 1 J1 Symbol: 2N7002W-7-F 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 LCD_BCLK- D(3) G(2) R2 *33_NC S(1) C1 *3.3P_NC LCD_BCLK+ D Symbol: DTC124EUA Design current: 560mA Max current: 800mA Q40 SI4835BDY-T1-E3 +PWR_SRC OUT(3) IN(2) LCD_ACLK- GND(1) 40mil +INV_PWR_SRC 8 7 6 5 1 2 3 R3 *33_NC C2 *3.3P_NC LCD_ACLK+ 40mil C402 4 R324 200K 0.1U 50 X7R 0603 C405 1000P_50V 3 R323 100K 42,46,49,50,52 Q46 2N7002W-7-F 2 RUN_ON 1 C 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 LCD_BCLKLCD_BCLK+ LCD_B2LCD_B2+ LCD_B1LCD_B1+ LCD_B0LCD_B0+ LCD_ACLKLCD_ACLK+ LCD_A2LCD_A2+ LCD_A1LCD_A1+ LCD_A0LCD_A0+ LCD_DDCCLK LCD_DDCDAT LCD_BCLK- 9 LCD_BCLK+ 9 LCD_B2LCD_B2+ 9 9 LCD_B1LCD_B1+ 9 9 LCD_B0LCD_B0+ 9 9 +LCDVDD LCD_ACLK- 9 LCD_ACLK+ 9 LCD_A2LCD_A2+ 9 9 LCD_A1LCD_A1+ 9 9 LCD_A0LCD_A0+ 9 9 +3.3V_RUN D C5 0.1U 16 X5R C4 0.1U 16 X5R +INV_PWR_SRC LCD_DDCCLK 9 LCD_DDCDAT 9 C3 0.1U 50 X7R 0603 +3.3V_RUN +LCDVDD LCD_TST 42 +INV_PWR_SRC BACKLITEON Adress : A9H --Contrast AAH --Backlight SMBCLK1 25,29,42 SMBDAT1 25,29,42 INVERTER_CBL_DET# 42 LCD_BAK# 42 PWM_VADJ 42 LCD_CBL_DET# 42 C JAE_FI-TD44SB-LE C6 *47P_NC C7 *47P_NC +15V_ALW Check with ATI FAE. The errata skip or not. R316 0 R319 100K R322 *0_NC 3 Q41 *BSS138_NL_NC +15V_ALW D16 9 EN_LCDVDD 3 EN_LCDVDD_1 1 2 1 EN_LCDVDD_2 +3.3V_RUN Q44 DTC124EUAT-106 2 NB_PWRGD_5V *2K_NC 2 1 D17 42 LCDVCC_TST_EN 6 5 2 1 1 R320 100K 2 SDMK0340L-7-F C404 0.1U 16 X5R 4 B 3 R318 2 B +LCDVDD Q42 FDC655BN SDMK0340L-7-F R314 470 LCDVCC_ON D 3 G 2 1 S BSS138_NL 3 1 Q45 *BSS138_NL_NC R329 R315 *100K_NC *2K_NC R327 0 +3.3V_SUS +5V_RUN 9,45 NB_PWRGD 1 Q38 2N7002W-7-F R328 *10K_NC 2 A 2 Q39 2N7002W-7-F 1 1 2 C403 0.1U 50 X7R 0603 3 BIA_PWM 3 9 BACKLITEON NB_PWRGD_5V 3 A *2N7002W-7-F_NC Q48 Title QUANTA COMPUTER LCD CONN,CK-SSCD 5 4 3 2 Size Document Number FX6 Date: Wednesday, June 25, 2008 Rev 3A Sheet 1 26 of 70 A Symbol: BSS138_NL B C D E Symbol: DA204U +5V_RUN D(3) 2 P(3)N S(1) N(1) P(2) D20 SDM10U45-7 1 G(2) 5V_CRT_REF 4 2 1 2 1 2 1 +3.3V_RUN D25 *DA204U_NC R357 0_1206 3 3 D22 *DA204U_NC 3 D21 *DA204U_NC 4 C450 0.01U 16 X7R L53 9 VGA_RED 9 VGA_GRN RED BLM18BB600SN1D L51 GREEN BLM18BB600SN1D JVGA1 6 11 1 7 12 2 8 13 3 9 14 4 10 15 5 L48 9 BLUE VGA_BLU BLM18BB600SN1D 3 R360 150/F R362 150/F R370 140/F C455 22P 50 NPO C462 22P 50 NPO C476 22P 50 NPO C456 10P 50 NPO C464 10P 50 NPO C478 10P 50 NPO T69 (3) +5V_RUN D33 2 SDM10U45-7 1 +3.3V_RUN CRT_VCC C422 1 5 R60 CRT_HSYNC_R 2 4 R352 4.7K R58 VGAHSYNC_R R340 4.7K R353 6.8K Q51 BSS138_NL 0 9 G_DAT_DDC2 R342 0 1 SUY_070549FR015S512ZR R339 6.8K 3 74AHCT1G125GW 2 3 0.1U 16 X5R 1K U4 39 VGAHSYNC C477 CRT_VCC R57 9 M_ID2# 0.1U/10V/X7R 3 2 R53 CRT_VSYNC_R VGAVSYNC 2 9 U3 39 4 R54 VGAVSYNC_R G_CLK_DDC2 R356 0 1 0 3 2 CRT_VCC Q53 BSS138_NL R55 *1K_NC 3 9 1 5 2 +3.3V_RUN 74AHCT1G125GW R51 *1K_NC L15 HSYNC JVGA_HS BLM18AG121SN1D L13 VSYNC JVGA_VS BLM18AG121SN1D C73 10P 50 NPO C83 10P 50 NPO C79 10P 50 NPO C72 10P 50 NPO Place near JVGA1 connector < 200 mil 1 1 Title QUANTA COMPUTER CRT CONN A B C D Size Document Number FX6 Date: Wednesday, June 25, 2008 Rev 3A Sheet E 27 of 70 1 2 3 4 5 6 7 8 HDMI Connector CN3 HDMI_TX2+_C 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 HDMI_TX2-_C HDMI_TX1+_C A HDMI_TX1-_C HDMI_TX0+_C HDMI_TX0-_C HDMI_CLK+_C HDMI_CLK-_C HDMI_CEC T59 HDMI_CLK HDMI_DAT +5V_RUN HDMI_DET_R 20 22 SHELL1 D2+ GND D2 Shield D2D1+ D1 Shield D1D0+ D0 Shield D0CK+ CK Shield CKCE Remote NC DDC CLK DDC DATA GND +5V HP DETGND SHELL2 A 23 21 LTS_ABA-HDM-018-K05 +5V_RUN L4 8 8 D2 RB500V-40 HDMI_TX2+ HDMI_TX2- 1 4 2 3 HDMI_TX2+ Q2 FDV301N R4 6.8K 1 1 1 *0_NC 2 R15 6.8K R330 715/F HDMI_TX1+ HDMI_TX1- HDMI_TX1+ HDMI_TX1- HDMI_TX1+_C HDMI_TX1-_C 2 Q49 2N7002W-7-F 2 HDMI_CLK 3 R14 1 *0_NC 2 +3.3V_RUN 1 *0_NC 2 UMA-----Need level shift and change 6.7k R290,R293. FDV301N Q1 R7 R16 1 Q50 2N7002W-7-F 2 +3.3V_RUN 1 2 1 HDMI_SCL 2 3 EXC24CG900U +3.3V_RUN 9 1 4 2 8 8 3 HDMI_DAT 3 2 1 HDMI_SDA 2 L3 9 R333 715/F R332 715/F R331 715/F 3 R20 4.7K B HDMI_TX2HDMI_TX1- R18 1 R13 4.7K HDMI_TX1+ *0_NC 2 *0_NC 1 R19 1 B R17 HDMI_TX2+_C HDMI_TX2-_C EXC24CG900U 2 +3.3V_RUN HDMI_TX2+ HDMI_TX2- L1 8 8 *0_NC HDMI_TX0+ HDMI_TX0- HDMI_TX0+ HDMI_TX0- 4 1 3 2 HDMI_TX0+_C HDMI_TX0-_C EXC24CG900U HDMI_TX0+ 2 3 HDMI_CLK+_C HDMI_CLK-_C EXC24CG900U +3.3V_RUN *0_NC 2 R11 1 *0_NC 2 1 1 2 Q47 2N7002W-7-F 2 +3.3V_RUN 1 R12 1 Q43 2N7002W-7-F C R326 715/F 3 1 4 R325 715/F +3.3V_RUN 1 HDMI_CLK+ HDMI_CLK- 3 HDMI_CLK+ HDMI_CLK- 2 L2 8 8 R317 715/F 2 R321 715/F 2 *0_NC 2 HDMI_CLK- 1 R9 1 HDMI_CLK+ HDMI_TX0- 1 *0_NC 2 2 C R6 1 +3.3V_RUN for EMI R785 10K HDMI_DET 1 Q85 2 MMST3904-7-F 3 3 9 R786 10K (12) D Q80 2 R334 HDMI_DET_R QUANTA COMPUTER R335 10K 1 FDV301N D 1K Title HDMI 1 2 3 4 5 6 Size Document Number FX6 Date: Wednesday, June 25, 2008 7 Rev 3A Sheet 28 of 8 70 1 2 3 4 5 6 7 8 2 1 +5V_RUN 3 *DA204U_NC D3 A A J9 0/0805 FAN1_VOUT 42 C461 2.2U 10 X5R 0805 4 3 2 1 FAN1_PWM D23 *SSM34PT_NC C475 0.1U 10 X7R 0402 +5V_RUN 4 3 2 1 MLX_53398-0471 R366 4.7K FAN1_TACH 42 C185 close to EMC1423. Place under CPU +3.3V_SUS +3.3V_RUN +3.3V_RUN 3 U6 B Q18 MMST3904-7-F 1 2 5 C117 *2200P/50V_NC X7R 10/20mils C185 2200P/50V X7R REM_DIODE1_N H_THERMDA 10/20mils 5 REM_DIODE1_P H_THERMDC VDD SCL 10 THERM_SCL 2 DP1 SDA 9 THERM_SDA 3 DN1 ALERT# 8 H_THERMDA 4 DP2 SYS_SHDN# 7 H_THERMDC 5 DN2 GND 6 C187 2200P/50V X7R R158 10K THERM_ALERT#_C 1 R151 *0_NC THERM_STP# 42,52 +3.3V_RUN +3.3V_RUN R154 1M 25,26,42 SMBDAT1 C 1 2 3 C186 0.1U/10V 2 Q23 2N7002W-7-F THERM_SDA +3.3V_RUN 25,26,42 SMBCLK1 1 3 R153 10K Q22 2N7002W-7-F 1 2 3 R157 10K THERM_ALERT# 13 RB500V-40 SYS_SHDN# 2 Q26 2N7002W-7-F THERM_ALERT# 3 Q25 2N7002W-7-F C181 0.1U/10V B D36 close to IC EMC1423 (B) C187 close to EMC1423. +3.3V_RUN 1 3 R361 2 +5V_RUN C OTP 85+7 degree C Q24 2N7002W-7-F 1 +3.3V_RUN THERM_SCL R152 10K/F THERM_ALERT#_C R155 6.8K/F SYS_SHDN# D D QUANTA COMPUTER Title FAN/THERMAL 1 2 3 4 5 6 Size Document Number FX6 Date: Wednesday, June 25, 2008 7 Rev 3A Sheet 29 of 8 70 1 2 A 4 Place caps close to connector. +3.3V_RUN SATA Connector. 3 C668 *10U/10V/0805_NC C670 *1U_10V_0603_NC 6 C671 *0.1U/16V_NC C678 *0.1U/16V_NC +5V_MOD C647 C639 C648 C662 C657 10U/10V/0805 1U/10V/0603 0.1U/16V 0.1U/16V 0.1U/16V 1000P/50V A Place caps close to connector. C165 C162 C161 C557 C159 *10U/10V/0805_NC 1U/10V/0603 0.1U/16V 0.1U/16V 1000P/50V JMOD1 B Need check footprint Need check footprint GND1 RXP RXN GND2 TXN TXP GND3 1 2 3 4 5 6 7 3.3V_0 3.3V_1 3.3V_2 GND4 GND5 GND6 5V_0 5V_1 5V_2 GND7 8 9 10 11 12 13 14 15 16 17 GND8 12V_0 12V_1 18 19 20 8 C675 *1000P/50V_NC C643 CON1 7 ODD Connector. Place caps close to connector. +5V_HDD 5 SATA_TX0+ 14 SATA_TX0- 14 SATA_RXN0_C SATA_RXP0_C C685 C682 0.01U/16V 0.01U/16V SATA_RX0- 14 SATA_RX0+ 14 GND1 RXP RXN GND2 TXN TXP GND3 1 2 3 4 5 6 7 DP 5V_0 5V_1 MD GND GND GND GND GND 8 9 10 11 12 13 14 15 16 NOTE: C685,C682 Close to CON1 +3.3V_RUN +5V_HDD SATA_TX1+ 14 SATA_TX1- 14 SATA_RXN1_C SATA_RXP1_C C183 C182 0.01U/16V 0.01U/16V SATA_RX1- 14 SATA_RX1+ 14 +5V_MOD B MOLEX_47628-1022 TYCO_2006114-1 Design current: 1050mA Max current: 1500mA C +5V_ALW Design current: 700mA Max current: 1000mA +5V_RUN +5V_HDD R481 4 C560 10U 10 0805 X5R 3 +5V_ALW +15V_ALW +3.3V_ALW Q34 FDC655BN 6 5 2 1 R435 100K 4 (3) MODC_EN 3 1 3 HDDC_EN 2 1 42 R577 100K 2N7002W-7-F Current = 115m Vgs = 20 Vds = 60 Type = Single N C532 1 2N7002W-7-F Current = 115m Vgs = 20 Vds = 60 Type = Single N 2N7002W-7-F Current = 115m Vgs = 20 Vds = 60 Type = Single N Symbol: 2N7002W-7-F 0.1U 50 X7R 0603 D(3) G(2) S(1) C290 2 Q74 R421 100K Q33 Q63 2 HDD_EN_5V D Q64 2 42 R234 100K 3 R422 100K R231 100K 1 R570 100K MOD_EN *0/0805_NC C297 4.7U 6.3 X5R 0603 3 +3.3V_ALW *0/0805_NC R467 100K R217 3 +15V_ALW C +5V_RUN +5V_MOD Q66 FDC655BN 6 5 2 1 2N7002W-7-F Current = 115m Vgs = 20 Vds = 60 Type = Single N D 0.1U 50 X7R 0603 QUANTA COMPUTER Title SATA (HDD&CD_ROM) 1 2 3 4 5 6 Size Document Number FX6 Date: Wednesday, June 25, 2008 7 Rev 3A Sheet 30 of 8 70 6dB 0 1 10dB 1 0 15.6dB 1 1 21.6dB C714 *47P_NC 50 COH 5 HP2_OUT_L C718 *47P_NC 50 COH C726 220P 50 X7R C727 220P 50 X7R (2) JSPK1 REGEN *0_NC Pop Depop R609 Depop Pop R602 5.1K/F 1 C701 C694 1 1U 0805 0603 10 2 50 2 1U 16 1 1 2 MIC1_JD 17 9 HPVDD CPVDD 10 12 11 C1P C1N CPGND 14 13 PVSS CPVSS C695 1U 0805 16 1 HP2_JD 2 Q75 2N7002W-7-F C700 1000P C693 10U 0805 10 2 1 1 2 3 2 3 2 R603 39.2K/F 2 1 1 R601 20K/F B HP2_JD 1 2 SENSEB +VDDA 32 HPR REGEN SET 5 C740 U33 TC7SZ08FU(T5L,F,T) HP1_JD 2 AMP_HP1_SHUD_L# 1 U36 TC7SZ08FU(T5L,F,T) EAPD# 2 4 16 15 AUD_HP2_L1 32 AUD_HP2_R1 32 REGEN SET 4 1 VOUT 29 VDD PVDD_8 PVDD_18 30 8 18 GND_28 PGND_5 PGND_21 28 5 21 +VDDA EMI Request +5V_SPK_AMP C706 1U 0603 10 C710 10U 0805 10 C722 1U 0603 10 R511 R504 R163 R618 R619 R592 R631 C728 1U 0603 10 C703 0.1U 10 AZ_CODEC_SDIN0 HDA_BITCLK HDA_SDI HDA_SDO HDA_SYNC HDA_RST# Q77 2N7002W-7-F Layout Note: Close to U32 Pin 13 18 19 20 2 2 +5V_SPK_AMP 3 32 2 DMIC_DATA R629 EAPD# R627 *0_NC *0_NC 2 3 DVDD 47 48 EAPD# Q79 2N7002W-7-F 32 DMIC_CLK R607 DMIC_DATA 4 7 R634 DMIC_CLK/GPIO0/SPDIF_IN SPDIF_OUT_0 *0_NC DVSS1 DVSS2 *0_NC 2 3 4 HP2_JD 1 5 AMP_HP2_EN_L 1 EAPD# 2 U34 TC7SZ08FU(T5L,F,T) 2 PORT_A_L PORT_A_R NC/VREFOUT_A 39 41 37 PORT_B_L PORT_B_R VREFOUT_B 21 22 28 PORT_C_L PORT_C_R VREFOUT_C 23 24 29 PORT_D_L PORT_D_R VREFOUT_D 35 36 32 PORT_E_L PORT_E_R GPIO4/VREFOUT_E 14 15 31 PORT_F_L PORT_F_R GPIO3/VREFOUT_F 16 17 30 PORT_G_L PORT_G_R 43 44 PORT_H_L PORT_H_R 45 46 PC_BEEP CAP2 VREFFILT 12 33 27 AVSS1 AVSS2 26 42 SENSEA SENSEB AMP_HP2_EN 4 R615 2 SET AUD_HP1_L 32 AUD_HP1_R 32 AUD_INT_MIC_IN C723 0.033U 16 X7R 32 *2.2K_NC 1 +VDDA +5V_SPK_AMP +5V_RUN C723 Pop Depop R616 Depop Pop C734 1U 0603 10 C736 10U 0805 10 FB_60ohm+-25%_100MHz _3A_0.05ohm DC Layout Note: Place close to U31 pin 8. AUD_FRONT_L AUD_FRONT_R Close to U32. +VDDA C739 0.1U/16/0603 AUD_MIC_L 32 AUD_MIC_R 32 AUD_MIC1_VREFO 32 AUD_HP2_L0 AUD_HP2_R0 C L79 BLM21PG600SN1D R616 *0_NC TPA6040 MAX9789 AUD_PC_BEEP C729 BEEP2 1U 10 X5R 0603 R630 10K BEEP1 4 R624 2.2K 1 BEEP 42 2 SPKR 13 U37 74LVC1G86GW D QUANTA COMPUTER AUD_PC_BEEP 92HD73C/STAC9228 1 4 3 13 34 1 3 EAPD# 2 NB_MUTE# DMIC0/VOL_UP/GPIO1 DMIC1/VOL_DN/GPIO2 R628 *10K_NC 1 42 DMIC_DATA 1 Q78 2N7002W-7-F D +3.3V_RUN SENSE_A SENSE_B 2 EAPD# R625 100K 1 AUD_SPK_ENABLE# 1 R617 100K Depop R629, R627, R607,R634 Pop R635, R612, R626 ,R636 for using 92HD73C R627,R635 close to U32, Let DVDD width be 10-mils NC/CD_L NC/CD_GND NC/CD_R 25 38 U35 TC7SZ08FU(T5L,F,T) 1 1 33 6 8 5 10 11 AVDD AVDD NB_MUTE# C702 0.1U 10 5 1 HP1_JD R623 *100K_NC C717 *1000P_NC B 0.1U/10/X7R 3 HP1_JD 2 13 SB_AZ_CODEC_BITCLK 13 SB_AZ_CODEC_SDIN0 13 SB_AZ_CODEC_SDOUT 13 SB_AZ_CODEC_SYNC 13,14,42 SB_AZ_CODEC_RST# 32 C737 1 3 2 50 0.1U/10/X7R 2 1 2 1 C Depop R606,C717 for using 92HD73C DVDD_CORE DVDD_CORE DVDD 0805 0805 0805 0603 0603 0603 0603 3 1 9 40 C711 1U 10 0603 5 1 10 R606 R610 39.2K/F C738 5 U32 2 1 C731 0.1U 2 1 1 C732 1U 10 0603 2 C720 1000P +VDDA C692 10U 0805 10 2 1 +VDDA 2 R611 5.1K/F SENSEA C733 1U 10 0603 0 0 0 0 0 0 0 +3.3V_RUN AZALIA (HD) CODEC DVDD 0 0805 2 R622 2 2 2 1 1 1 1 R633 *0_NC 1 2 +3.3V_RUN FB_60ohm+-25%_100MHz _3A_0.05ohm DC 1 1 1 2 2 2 2 Layout Note: Place close U31. Layout Note: Place close to pin 18. TPA6040A4 Q76 2N7002W-7-F +3.3V_RUN AMP_HP1_SHUD# 32 3 4 0.1U/10/X7R 3 BIAS SPKR_EN# HP_EN MUTE# GAIN1 GAIN2 AUD_SPK_R1 AUD_SPK_R2 1 1 +3.3V_RUN 24 23 22 25 31 32 TPA6040A4 OUTR+ OUTRQFN 32PIN HPL 20 19 NB_MUTE# 2 2 1U 0603 10 AUD_SPK_ENABLE# AMP_HP2_EN AUD_AMP_MUTE# AUD_AMP_GAIN1 AUD_AMP_GAIN2 HP_INL HP_INR AUD_SPK_L1 AUD_SPK_L2 1 C715 1 HP2_OUT_L 27 HP2_OUT_R 26 2.2K 2.2K 6 7 *0_NC +3.3V_RUN 0.1U/10/X7R 2 R791 R792 C599 100P 50 NPO +3.3V_RUN 1 AUD_HP2_L0_R AUD_HP2_R0_R OUTL+ OUTL- C600 100P 50 NPO A 2 2.2U/50V/1206 2.2U/50V/1206 SPKR_INL SPKR_INR 1 Note: Place close U31 pin 30. C730 C724 3 2 C601 100P 50 NPO R632 2 AUD_HP2_L0 AUD_HP2_R0 50 LIN50 RIN- 2 6800P 1206 2 6800P 1206 1 C721 0.1U 10Layout X7R C713 1 C712 1 1 2 3 4 TPA6040 MAX9789 C719 2 1 2 1 2 1 2 AUD_FRONT_L AUD_FRONT_R 1 2 3 4 5 C719 0.033U 16 U31 (2) Layout Note: Close to U32 Pin 34 0/0603 0/0603 0/0603 0/0603 AUD_AMP_MUTE# R609 1 INTERNAL SPEAKER AMP +5V_SPK_AMP C705 1U 0603 10 X5R R162 R161 R160 R159 C602 100P 50 NPO C735 C698 1U 0603 10 X5R 8 TYCO_1775295-4 1 AUD_AMP_GAIN1 AUD_AMP_GAIN2 R614 *100K_NC 1 A 7 AUD_SPK_R1 AUD_SPK_R2 AUD_SPK_L1 AUD_SPK_L2 R608 100K 2 R613 100K 6 +5V_SPK_AMP HP2_OUT_R 1 R621 100K 1 GAIN 0 4 RIN- 2 2 1 R620 *100K_NC GAIN2 0 2 2 GAIN1 3 LIN- 2 2 2 1 +5V_SPK_AMP Title C697 1U 0603 10 AZALIA(HD) CODEC 6 Size Document Number FX6 Date: Wednesday, June 25, 2008 7 Rev 3A Sheet 31 of 8 70 1 2 3 4 5 6 7 Headphone Jack Stereo MIC Jack 8 Array Microphone & Camera JCAMERA1 R509 31 AUD_MIC1_VREFO 0 C580 1U/10/X5R/0603 L70,L71,L72,L73,L75,L77 FB_600ohm+-25%_100MHz _200mA_0.6ohm DC A 31 AUD_MIC_L 31 AUD_MIC_R 100K 2.2U/10/x5R/0805 AUD_MIC_L1 L70 BLM18BD601SN1D AUD_MIC_L3 C588 2.2U/10/x5R/0805 AUD_MIC_R1 L71 BLM18BD601SN1D AUD_MIC_R3 C573 470P 50 NPO DMIC_DATA 31 DMIC_CLK 14 CAMERA_CBL_DET# R508 4.7K C574 31 +3.3V_RUN R514 R502 4.7K 31 AUD_HP2_L1 0 AUD_HP2_L2 L72 BLM18BD601SN1D AUD_HP2_L3 0 AUD_HP2_R2 L73 BLM18BD601SN1D AUD_HP2_R3 C595 470P 50 NPO B DMIC_CLK_L CAMERA_CBL_DET# A JACK 2 (MIC) R524 R522 R521 *20K_NC DMIC_DATA_L 22 R438 CAMERA_CBL_DET# 100K +3.3V_RUN R520 R519 *20K_NC 0 L61 I-pex_20374-010E-1 100K HP2_JD 31 CON4 2 TYCO_1770882-1 4 3 1 6 5 C603 470P 50 NPO DMIC_DATA L58 *BLM11A05S_NC L59 BLM11A05S +3.6V_CAMERA 31 AUD_HP2_R1 L60 MIC1_JD 31 CON3 2 TYCO_1770882-1 4 3 1 6 5 +3.3V_RUN C584 470P 50 NPO 1 2 3 4 5 6 7 8 9 10 USBP11_D+ USBP11_D+CAM_VCC +3.3V_RUN +CAM_VCC C528 33P 50 COH C525 10U 10 X5R 0805 JACK 1 (HP2) DMIC_CLK C529 33P 50 COH +3.3V_RUN R548 100K B HP1_JD 31 AUD_HP1_L1 R529 0 AUD_HP1_L2 L75 BLM18BD601SN1D AUD_HP1_L3 AUD_HP1_R1 R546 0 AUD_HP1_R2 L77 BLM18BD601SN1D AUD_HP1_R3 R532 *20K_NC +5V_RUN C C741 *1U/10V/0603_NC IN 3 EN 2 GND (14) C609 270P 25 NPO L23 13 13 JACK 3 (HP1) 1 4 SB_USBP11SB_USBP11+ USBP11_DUSBP11_D+ 2 3 *DLW21SN900SQ2L_NC C621 270P 25 NPO R124 0 R125 0 +3.6V_CAMERA U43 1 R547 *20K_NC CON5 2 TYCO_1770882-1 4 3 1 6 5 OUT NC/FB +VDDA 5 R640 *100K/F_NC 4 C743 *20P/50V_NC C742 *4.7U/6.3V/0603_NC *TPS73601DBVR_NC C R510 100K 8 +VDDA U27A LM358ADR2G 3 R642 *49.9K/F_NC 1 Reserve for camera power 31 AUD_HP1_L AUD_HP1_R 0 +VDDA 270P/25/NPO C622 2.2U/50V/1206 AUD_HP1_L_R R793 2.2K AUD_HP1_L0 C620 2.2U/50V/1206 AUD_HP1_R_R R794 2.2K AUD_HP1_R0 C772 (14) 270P/25/NPO J5 2 1 2 1 4 C577 2.2U 10 X5R 0805 INT_MIC_C_L+ C605 2.2U 10 X5R 0805 INT_MIC_2_L+ R506 100K C586 0.1U 10 X7R R531 1K 8 C771 (2) 31 R516 2 R526 1K C596 INT_MIC_2_LC594 INT_MIC_L1+ R518 0.1U/16/X7R/0603 INT_MIC_L1- R517 0.1U/16/X7R/0603 10K INT_MIC_L0+ 5 10K INT_MIC_L0- 6 U27B LM358ADR2G 7 AUD_INT_MIC_IN 31 C590 0.1U/16/X7R/0603 4 MLX_53780-0270 INT_MIC_IN_OP U9 C598 2.2U/25/X5R/1206 1 3 5 7 SHDNR SHDNL C1P C1N PVSS SVSS C597 2.2U 25 X5R 1206 1 2 AUD_HP1_L1 AUD_HP1_R1 R530 1K INT_MIC_C_L- R515 2 9 11 4 6 8 12 16 20 10 19 2 17 21 1 OUTL OUTR NC1 NC2 NC3 NC4 NC5 NC6 SVDD PVDD PGND SGND AGND 100K D30 *SM05_NC C604 2.2U 10 X5R 0805 +3.3V_RUN C202 1U/16/0805/X5R R525 1K 3 14 18 31 AMP_HP1_SHUD# INL INR 25 24 23 22 D 13 15 AGND AGND AGND AGND AUD_HP1_L0 AUD_HP1_R0 D Layout Note: Place close to CODEC. QUANTA COMPUTER Title MAX4411ETP+ AUDIO CONN 3 4 5 6 Size Document Number FX6 Date: Wednesday, June 25, 2008 7 Rev 3A Sheet 32 of 8 70 5 4 3 2 +3.3V_LAN C553 0.1U 10 X7R C548 0.1U 10 X7R C523 0.1U 10 X7R C524 0.1U 10 X7R +2.5V_LOM +3.3V_LAN C549 0.1U 10 X7R R407 +2.5V_LOM VDDP Power Decoupling +2.5V_LOM R418 5 55 13 20 34 60 *0/0805_NC C108 0.1U 10 X7R C531 0.1U 10 X7R U25 DC/VDDP +1.2V_LOM R479 *0/0805_NC BIASVDDH VDDC_IO/VDDC VDDC_IO/VDDC VDDC VDDC VDDC VDDC XTALVDDH LAN_BIASVDDH 36 L56 LAN_AVDDL C518 4.7U 10 X5R 0805 C526 0.1U 10 X7R C502 0.1U 10 X7R C543 0.1U 10 X7R BLM18AG601SN1D C514 39 51 4.7U/10V/0805 C516 0.1U/10V LAN_GPHYPLLVDDL C541 4.7U/10V/0805 35 C542 L67 AVDDL/AVDDH 45 DC/AVDDH 38 DC/AVDDH 52 TRD3_N TRD3_P 49 50 AVDDH/TRD2_N TRD2_N/TRD2_P TRD2_P/AVDDL 48 47 46 GPHY_PLLVDDL R429 +3.3V_LAN BLM18AG601SN1D C559 4.7U/10V/0805 0.1U/10V LAN_PCIESDSVDDL R431 *4.7K_NC BLM18AG601SN1D R434 0 200/F LAN_XTALO C550 0.1U/10V 27 33 PCIE_PLLVDDL PCIE_VDDL R461 *0_NC 24 PCIE_VDDL/GND 8 PCIE_RX3+/GLAN_RX+ 8 PCIE_RX3-/GLAN_RX8 PCIE_TX3+/GLAN_TX+ 8 PCIE_TX3-/GLAN_TX13,37,39,40 SB_PCIE_WAKE# 39,40,45,51 PLTRST_SYS# 14 SB_LOM_PCIE_RST# 25 CLK_PCIE_LOM 25 CLK_PCIE_LOM# C153 0.1U/10V C154 0.1U/10V R430 R427 0 *0_NC +3.3V_LAN LAN_PCIETXDP LAN_PCIETXDN PCIE_TXD_P PCIE_TXD_N PCIE_RXD_P PCIE_RXD_N WAKE# PERST# PCIE_REFCLK_P PCIE_REFCLK_N R479,R429,R407,R96,R103, R106,R120,R115,R108,Q67,C142, C145,C157,C158,R418,R464, R461,L68 R413 4.7K R410 1K R106 *0_NC LAN_AVDDL TRD2+ R120 *0_NC TRD1LAN_AVDDH R115 *0_NC TRD1+ TRD1- TRD0_N TRD0_P 41 40 TRD0TRD0+ R108 *0_NC LAN_AVDDL TRD1+ LINKLED# SPD100LED# SPD1000LED# TRAFFICLED# 2 1 67 66 LINKLED# 34 SPD100LED# 34 SPD1000LED# 34 IO_LOM_ACTLED_YEL# GPIO2 8 UART_MODE GPIO1_SERIALDI GPIO0_SERIALDO 9 7 4 LAN_TRD1N_TRD1P 34 34 LAN_TRD1P_AVDDL R411 1K 54 53 3 VAUX_PRSNT VMAIN_PRSNT LOW_PWR TEST1/SMB_CLK TEST2/SMB_DATA 22 21 XTALO XTALI LAN_RDAC 37 RDAC TRD1- 34 TRD1+ 34 R403 4.7K R405 *4.7K_NC C533 0.1U 10 X7R U22 8 7 6 5 VCC NC SCL SDA A0 A1 A2 VSS 1 2 3 4 24LC02BT-I/STG 17 18 R919 & R922: Stuff only if U8 is installed BCM_SCL R401 4.7K SI R415 4.7K CS# R414 4.7K 14 B +3.3V_LAN LAN_REGCTL25 R437 1.24K/F 11 CLK_REQ# LAN_REGCTL12 1 R406 1W 2512 1 +3.3V_LAN 1 Q62 MMJT9435T1G Package Body GND R479,R429,R407,R96,R103, R106,R120,R115,R108,Q67,C142, C145,C157,C158,R418,R464, R461,L68 SUPER_IDDQ/GND 16 69 BCM5784MB0KMLG R440 *20K_NC 5784M 5787M C142 *0.1U_NC 10 Q67 X7R *MMJT9435T1G_NC C113 0.1U 10 X7R C107 4.7U 10 X5R 0805 +1.2V_LOM C125 0.1U 10 X7R C124 10U 10 X7R 0805 C145 *4.7U_NC 10 X5R 0805 +2.5V_LOM C158 *0.1U_NC 10 X7R C157 *10U_NC 10 X7R 0805 A LAN_DISABLE# 42 Title LAN(BCM5784M/5787M) Note:thermal pad R439 39k R440 20k 0 *20k_NC Size Document Number CustomFX6 Date: 5 4 3 C 5784M------24LC02 5787M------1M flash to support ASF feature. +3.3V_LAN BCM_SCL SI BCM_SDA CS# 65 63 64 62 VDDC_IO/VDDP REGCTL12 34 BCM_WP REGOUT12_IO/REGCTL25 R428,R425,R94,R101,R105, R122,R119,R111,R449, R408,R463,R460 34 TRD2+ 34 +2.5V_LOM 58 57 TRD2- T30 Pin 59 : Connect with GPIO to detect RJ45 cable insert or not. if not used, please NC. LAN_ENERGY_DET T26 ENERGY_DET 59 A 5784 AVDDH_LAN_TRD1N LAN_TRD1N_TRD1P LAN_TRD1P_AVDDL R926 is required only if Q1 can not dissipate the required power NOT INSTALL *0_NC TRD2+ TRD2- LAN_TRD2N_TRD2P 42 43 44 SCLK_EECLK SI SO_EEDATA CS# LAN_XTALO LAN_XTALI LOM_CLKREQ# R428,R425,R94,R101,R105, R122,R119,R111,R449, R408,R463,R460 34 34 R399 4.7K +3.3V_RUN +3.3V_LAN 42 LAN_DISABLE# INSTALL *0_NC TRD2LAN_AVDDH R103 3 C556 22P 50 NPO R412 4.7K Table 1 - Component Stuffing Requirements 5787M 26 25 31 32 12 10 29 28 LAN_XTALI LAN_DISABLE# is active high. R96 LAN_TRD2P_AVDDL 3 C555 27P 50 NPO TRD3TRD3+ AVDDH_LAN_TRD2N LAN_TRD2N_TRD2P LAN_TRD2P_AVDDL +3.3V_LAN 25MHz B 0.1U/10V 2 4 2 *0_NC Ensure an external pull-up at pin 12 (WAKE#).(0725) R823 & R824: Stuff only if no pull-ups on system side Y2 1 R464 4.7U/10V/0805 LOM_CLKREQ# 25 LOM_CLKREQ# R462 C558 C501 BLM18AG601SN1D Place one cap close to each of the pins, 38,45, and 52 AVDDH/TRD1_N TRD1_N/TRD1_P TRD1_P/AVDDL PCIE_PLLVDDL LAN_PCIEPLLVDDL L69 0.1U/10V AVDDH_LAN_TRD1N 30 C551 BLM18AG601SN1D L57 C522 0.1U/10V LAN_PCIEPLLVDDL D 0.1U/10V AVDDH_LAN_TRD2N 68-Pin QFN L66 C 0.1U/10V LAN_AVDDL *0_NC LAN_AVDDH 10mm x 10mm AVDDL AVDDL L64 BLM18AG601SN1D BLM18AG601SN1D C530 C160 BCM5784M/5787M +1.2V_LOM L62 LAN_XTALVDDH 23 VDDIO Power Decoupling +3.3V_LAN +2.5V_LOM *0/0805_NC 2 4 C562 0.1U 10 X7R 68 C506 0.1U 10 X7R 6 15 19 56 61 C552 0.1U 10 X7R VDDIO VDDIO VDDIO VDDIO VDDIO C554 4.7U 10 X5R 0805 D 1 Core Power Decoupling +1.2V_LOM 2 Thursday, June 26, 2008 Rev 3A Sheet 1 33 of 70 A B C D E RJ-45 Connector CON2 R424 33 IO_LOM_ACTLED_YEL# 330 4 +3.3V_LAN +3.3V_LAN 1 L65 TRD3+ 1 TD0+ TRD3- 2 TD0- TDCT TDCT 33 TRD2+ 33 TRD2- 33 TRD1+ 33 TRD1- 33 TRD0+ 33 TRD0- 4 TDCT0 5 TD1+ TRD2- 6 TD1- TRD1+ 7 TD2+ TRD1- 8 TD2- 9 1:1 TX0- 23 TXCT0 22 TXCT3 TXCT1 21 TXCT2 TX1+ 20 RJ45-TX2+ TX1- 19 RJ45-TX2- TX2+ 18 RJ45-TX1+ TX2- 17 RJ45-TX1- TXCT2 16 TXCT1 TXCT3 15 TXCT0 TX3+ 14 RJ45-TX0+ TX3- 13 RJ45-TX0- TDCT1 TRD2+ TDCT 3 3 24 TDCT2 TDCT 10 TDCT3 TRD0+ 11 TD3+ TRD0- 12 TD3- 1:1 1:1 1 33 SPD100LED# RJ45-TX3- Q68 DDTA114YUA-7-F 47K 2 2 10K SDMK0340L-7-F +3.3V_LAN 10 LED_GND 9 11 LED_GN/AP LED_GP/AN O R492 R774 4.7K 4 8 7 6 5 4 3 2 1 330 D34 1 2 SDMK0340L-7-F G 33 SPD1000LED# 14 15 TRD3- D28 RJ45-TX3+ TX0+ 8 7 6 5 4 3 2 1 Y 3 TRD3+ 33 MEDIA SIDE LED_YP D35 1 2 SDMK0340L-7-F +3.3V_LAN 3 1 33 CHIP SIDE LED_YN 13 CHSGND1 CHSGND2 TRANSFORM RJ45-TX3RJ45-TX3+ RJ45-TX1RJ45-TX2RJ45-TX2+ RJ45-TX1+ RJ45-TX0RJ45-TX0+ 12 1:1 LFE9283-R D29 33 47K 1 LINKLED# Q69 DDTA114YUA-7-F 2 2 10K 3 SDMK0340L-7-F TRD3+ TRD3TRD2+ TRD2TRD1+ TRD1TRD0+ TRD0- C750 C751 C752 C753 C754 C755 C756 C757 R503 330 6.8P 50 6.8P 50 6.8P 50 6.8P 50 6.8P 50 6.8P 50 6.8P 50 6.8P 50 +2.5V_LOM pop L68 for 5787M. depop L68 for 5784M. 2 0603 package. +3.3V_LAN TXCT0 TXCT1 TXCT2 TXCT3 R478 R474 R450 R442 2 R451 R475 *0_NC 0603 +3.3V_SUS 75/F 75/F 75/F 75/F L68 *BLM18AG601SN1D_NC 0 0603 C129 1000P 3K NPO 1808 TDCT TDCT TDCT TDCT C540 0.1U 10 X7R C561 0.1U 10 X7R C534 0.1U 10 X7R C564 0.1U 10 X7R Reserved for EMI. 1 1 Title QUANTA COMPUTER LAN SWITCH A B C D Size Document Number FX6 Date: Wednesday, June 25, 2008 Rev 3A Sheet E 34 of 70 5 4 3 2 1 +3.3V_R5C833 +3.3V_R5C833 C324 10U 10 X5R 0805 C335 0.01U 25 X7R C351 0.01U 25 X7R C388 0.01U 25 X7R C315 0.01U 25 X7R C373 0.01U 25 X7R +3.3V_R5C833 D C321 0.1U 10 X7R C317 0.01U 25 X7R Place the power caps close to the relation pins. C375 0.01U 25 X7R 12 PCI Bus C318 0.01U 25 X7R C354 0.47U 10 X7R 0603 C +3.3V_R5C833 R303 100K GBRST# should be asserted only when system power supply is on. C393 1U 10 X5R 0603 PCI Bus 12 PCI_PAR 12 PCI_C_BE3# 12 PCI_C_BE2# 12 PCI_C_BE1# 12 PCI_C_BE0# B PCI_AD17 R238 61 VCC_RIN 125 126 127 1 2 3 5 6 9 11 12 14 15 17 18 19 36 37 38 39 40 42 43 44 46 47 48 49 50 51 52 53 33 7 21 35 45 8 100 REQ# GNT# FRAME# IRDY# TRDY# DEVSEL# STOP# PERR# SERR# 12 71 119 GBRST# PCIRST# 121 PCICLK PCI_RST# SB_PME# 70 R302 *0_NC 117 12,42 CoreLogic CLOCKRUN# AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 PAR C/BE3# C/BE2# C/BE1# C/BE0# IDSEL 124 123 23 24 25 26 29 30 31 12 CLK_PCI_PCCARD CLKRUN# The ICH schematics need to include a pull-up resistor to implement CLKRUN#, and the ICH schematics must have a pull-down, or constantly drive thesignal low, in order to disable CLKRUN#. CLK_PCI_PCCARD +3.3V_RUN +3.3V_R5C833 67 C392 0.01U 25 X7R C328 10U 10 X5R 0805 R235 0/0805 VCC_ROUT1 VCC_ROUT2 VCC_ROUT3 VCC_ROUT4 VCC_ROUT5 12 PCI_REQ1# 12 PCI_GNT1# 12 PCI_FRAME# 12 PCI_IRDY# 12 PCI_TRDY# 12 PCI_DEVSEL# 12 PCI_STOP# 12 PCI_PERR# 12 PCI_SERR# 13,42 VCC_3V VCC_MD PCI_AD31 PCI_AD30 PCI_AD29 PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 PCI_AD22 PCI_AD21 PCI_AD20 PCI_AD19 PCI_AD18 PCI_AD17 PCI_AD16 PCI_AD15 PCI_AD14 PCI_AD13 PCI_AD12 PCI_AD11 PCI_AD10 PCI_AD9 PCI_AD8 PCI_AD7 PCI_AD6 PCI_AD5 PCI_AD4 PCI_AD3 PCI_AD2 PCI_AD1 PCI_AD0 PowerOnReset for VccCore VCC_PCI1 VCC_PCI2 VCC_PCI3 VCC_PCI4 VCC_PCI5 VCC_PCI6 16 34 64 114 120 C340 0.47U 10 X7R 0603 PCI_AD[31..0] 10 20 27 32 41 128 86 GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 GND9 GND10 4 13 22 28 54 62 63 68 118 122 AGND1 AGND2 AGND3 AGND4 AGND5 99 102 103 107 111 C +3.3V_R5C833 R301 10K PCI / OTHER C316 0.01U 25 X7R D Place the power caps close to the relation pins. U13B C319 10U 10 X5R 0805 PME# Route to GPIOG6 (pin 94) on the SIO companion chip ECE5011, with the signal named CB_HWSPND# +3.3V_R5C833 +3.3V_R5C833 R277 10K R283 100K HWSPND# 69 MSEN 58 Memory Stick Enable XDEN 55 XD Card Enable UDIO5 57 UDIO3 UDIO4 65 59 UDIO2 56 UDIO1 60 UDIO0/SRIRQ# 72 Serial ROM disable SD Card Enable MMC Card Enable B IRQ_SERIRQ 12,42 PCI Bus INTA# 115 PCI_PIRQB# 12 INTB# 116 PCI_PIRQA# 12 TEST 66 1394 Interrupt Media card Interrupt T112 PAD CLKRUN# R5C833T_V00 AJ5C8320H00 R300 100K R257 33 A C348 12P 50 COG A Refer to DELL M07 schematic X06 Title QUANTA COMPUTER R5C833/PCI 5 4 3 2 Size Document Number FX6 Date: Wednesday, June 25, 2008 Rev 3A Sheet 1 35 of 70 A B C D E +3.3V_R5C833 1 1 80 mils L44 J7 +3.3V_RUN_PHY C384 10U 10 X5R 0805 U13A C368 0.1U 10 X7R BLM18PG181SN1D C386 0603 1000P modify 50 X7R C369 0.01U 25 X7R 1 2 3 4 5 6 TPB0N TPB0P TPA0N TPA0P 8 7 JST_06FFS-SP-TF(LF)(SN) AVCC_PHY1 AVCC_PHY2 AVCC_PHY3 AVCC_PHY4 Place these caps as close to the U20 as possible. 98 106 110 112 AS CLOSE AS POSSIBLE TO R5C833 TPBIAS0 GUARD GND 113 TPBIAS0 C359 R266 94 R272 XI C364 2 C389 1394_XI 22P/50V Y1 24.576MHZ 56.2/F/0603 104 56.2/F/0603 1 TPBN0 0.33U 16 X7R 0603 0.01U 25 X7R TPB0N C394 1394_XO 27P/50V 95 R299 0 XO TPBP0 105 TPB0P 108 TPA0N 109 TPA0P *TPA0P/TPA0N,TPB0P/TPB0N pair trace : Same length electrically. *TPA0P/TPA0N,TPB0P/TPB0N pair trace : As close as possible. *Termination resistor for TPA+/- TPB+/- : As close as possible to its cable driver (device pin out). 8 IN1 CARD READER Populate C390 for R5C832 chip C390 RICOH_FILO 96 *0.01U/25V_NC R291 RICOH_REXT101 10K/F C374 RICOH_VREF100 0.01U/25V FIL0 IEEE1394/SD 2 TPAN0 TPAP0 +3.3V_RUN_CARD R288 C371 56.2/F/0603 VREF 270P 25 NPO 56.2/F/0603 R289 5.11K/F Circuit area : As small as possible. 87 XD/MMS_DATA7 MDIO16 92 XD/MMS_DATA6 MDIO15 89 XD/MMS_DATA5 MDIO14 91 XD/MMS_DATA4 90 SD/XD/MS_DATA3 MDIO17 MDIO13 93 SD/XD/MS_DATA2 MDIO11 81 SD/XD/MS_DATA1 MDIO10 82 SD/XD/MS_DATA0 MDIO05 75 XD_WP# MDIO08 88 SD/XD/MS_CMD MDIO19 83 XD_ALE MDIO18 85 XD_CLE MDIO02 78 XD_CE# MDIO03 77 SD_WP#(XDR/B#) MDIO00 80 SD_CD# MDIO01 79 MS_INS# MDIO09 84 SD/XD/MS_CLK 76 MC_PWR_CTRL_0 MDIO12 3 MDIO04 MDIO06 97 RSV MDIO07 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 SD_CD# SD_WP# XD/MMS_DATA7 XD/MMS_DATA6 XD/MMS_DATA5 XD/MMS_DATA4 SD/XD/MS_DATA1 SD/XD/MS_DATA3 SD/XD/MS_DATA0 SD/XD/MS_DATA2 XD/MMS_DATA7 SD/XD/MS_DATA1 XD/MMS_DATA6 SD/XD/MS_CMD SD/XD/MS_CLK SD/XD/MS_DATA1 SD/XD/MS_DATA0 SD/XD/MS_DATA0 R569 0 C638 *270P_NC 25 NPO SD(CD2/WP2/GND) SD(CD1) SD(WP1) XD-18(VCC) XD-17(D7) XD-16(D6) XD-15(D5) XD-14(D4) SD-8(DAT1) XD-13(D3) SD-7(DAT0) XD-12(D2) MMC-(D7) XD-11(D1) SD-6(GND/VSS2) MS-1(VSS) MMC-(D6) MS-2(BS) SD-5(CLK) MS-3(VCC/DATA1) XD-10(D0) MS-4(SDIO/DATA0) SD-4(VCC/VDD) MS-5(DATA2) XD-9(GND) MS-6(INS) SD-3(VSS1) MS-7(DATA3) MMC-(D5) MS-8(SCLK) SD-2(CMD) MS-9(VCC) MMC-(D4) MS-10(VSS) SD-1(DAT3) XD-8(-WP) SD-9(DAT2) XD-7(WE) XD-6(ALE) XD-5(CLE) XD-4(CE) XD-3(RE) XD-2(R/-B) XD-1(CD) XD-0(GND) GND GND SD/XD/MS_DATA2 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 MS_INS# R575 SD/XD/MS_DATA3 XD/MMS_DATA5 0 SD/XD/MS_CLK SD/XD/MS_CMD XD/MMS_DATA4 SD/XD/MS_DATA3 XD_WP# SD/XD/MS_DATA2 SD/XD/MS_CMD XD_ALE XD_CLE XD_CE# SD/XD/MS_CLK SD_WP#(XDR/B#) XD_CDSW# 3 TAISOL_144-2400002900 C758 *27P_NC 50 NPO C646 2.2U 6.3 X5R 0603 C633 *270P_NC 25 NPO C677 270P 25 NPO C759 *27P_NC 50 NPO C760 27P 50 NPO (15) +3.3V_R5C833 +3.3V_R5C833 +3.3V_RUN_CARD Close CON6 pin4 U14 R305 *10K/F_NC MC_PWR_CTRL_0 D15 1SS355 1SS355 5 3 IN OUT NC 1 4 EN GND 2 +3.3V_RUN_CARD TPS2051BDBV close to the Chip D14 4 +3.3V_RUN_CARD CON6 R285 REXT Place these caps as close to the U13 as possible. 2 XD_CDSW# C397 0.1U 10 X7R SD Protect C674 0.01U 25 X7R C396 1U 10 X5R 0603 C644 0.01U 25 X7R C640 0.01U 25 X7R R304 150K AAT4250 will be tested by 2'nd source after proto2 build. 74 T57 PAD R309 0 4 49 73 Q37 R5C833T_V00 3 1 2 SD_WP#(XDR/B#) SD_WP# *2N7002W-7-F_NC Title XD_CDSW# A B C QUANTA COMPUTER IEEE1394/CARD READER D Size Document Number FX6 Date: Wednesday, June 25, 2008 Rev 3A Sheet E 36 of 70 1 2 3 4 5 6 7 8 A A +1.5V_CARD L36 13 13 4 1 SB_USBP7SB_USBP7+ C337 0.1U 10 X7R *DLW21SN900SQ2L_NC R250 0 R249 0 Express Card USBP7_DUSBP7_D+ 3 2 C342 0.1U 10 X7R +1.5V_CARD Max. 650mA, Average 500mA. +3V_CARD Max. 1300mA, Average 1000mA. +1.5V_RUN +3.3V_RUN +3.3V_SUS Please the cap near connector. B 17 2 4 12 14 +3.3V_CARD CN2 C336 0.1U 10 X7R C346 10U 6.3 X5R 0603 USBP7_DUSBP7_D+ CPUSB# Please the cap near connector. 13,16,39,40 SB_SMBCLK 13,16,39,40 SB_SMBDATA +1.5V_CARD 13,33,39,40 SB_PCIE_WAKE# +3.3V_CARDAUX CARD_RESET# +3.3V_CARD 25 EXPRESSCARD_REQ# 13,42 EXPRCRD_PWREN# 25 CLK_PCIE_EXPCARD# 25 CLK_PCIE_EXPCARD 8 8 PCIE_RX4PCIE_RX4+ 8 8 PCIE_TX4PCIE_TX4+ EXPRCRD_PWREN# C 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 GND_1 USBUSB+ CPUSB# RSV_0 RSV_1 SMBCLK SMBDATA +1.5V_0 +1.5V_1 WAKE# +3.3VAUX PERST# +3.3V_1 +3.3V_2 CLKREQ# CPPE# REFCLKREFCLK+ GND_2 PERn0 PERp0 GND_3 PETn0 PETp0 GND_4 +3.3V_SUS T83 9,12,14,39,45 PLTRST# R558 100K EXPRCRD_STDBY# AUXIN 3.3VIN_0 3.3VIN_1 1.5VIN_0 1.5VIN_1 AUXOUT 3.3VOUT_0 3.3VOUT_1 1.5VOUT_0 1.5VOUT_1 SHDN# STBY# SYSRST# 16 7 NC GND0 +1.5V_CARD 15 3 5 11 13 B +3.3V_SUS ExpressSwitch 20 1 6 +3.3V_CARD CARD_RESET# PERST# CPPE# CPUSB# OC# 8 10 9 19 RCLKEN 18 EXPRCRD_PWREN# CPUSB# R562 R559 100K 100K R5538D001-TR-F +1.5V_RUN NC1 NC2 NC3 NC4 NC5 C341 0.1U 10 X7R +3.3V_CARDAUX U28 27 28 29 30 31 MOLEX_48303-0033 +3.3V_RUN +3.3V_SUS +3.3V_CARDAUX +3.3V_CARD +1.5V_CARD C665 0.1U 10 X7R C635 0.1U 10 X7R C645 0.1U 10 X7R C667 0.1U 10 X7R C636 0.1U 10 X7R C666 0.1U 10 X7R Please the cap near pin 12 & 14(1.5VIN). Please the cap near pin 2 & 4 (3.3VIN). Please the cap near pin 17 (AUXIN). Please the cap near pin 15 (AUXOUT). Please the cap near pin 3 & 5 (3.3VOUT). Please the cap near pin 11 & 13(1.5VOUT). C PCI-Express TX and RX direct to connector. D D QUANTA COMPUTER Title EXPRESS 1 2 3 4 5 6 Size Document Number FX6 Date: Wednesday, June 25, 2008 7 Rev 3A Sheet 37 of 8 70 1 2 3 4 5 External USB PORT hookup reference. Your design may need more or less external ports and may be mapped differently 6 7 Side External USBX2 +USB_SIDE_PWR (10) L19 13 13 4 1 SB_USBP0SB_USBP0+ 3 2 USBP0_DUSBP0_D+ DLP11SN900HL2L (6) 3 2 C496 0.1U 10 X7R C492 150P 25 NPO USBP1_DUSBP1_D+ 5 6 7 8 USBP1_DUSBP1_D+ + C482 *150U_NCC495 6.3 150P Polymer 25 7343 NPO L20 4 1 SB_USBP1SB_USBP1+ 1 2 3 4 USBP0_DUSBP0_D+ + C485 150U 6.3 Polymer 7343 A 13 13 8 VBUS GND DA+ D+ AGND GND BB+ VBUS GND DShield D+ Shield GND GND GND 9 10 11 12 13 14 15 16 17 18 19 ESATA_TX3+_R ESATA_TX3-_R SATA_RX3-_C C96 SATA_RX3+_C C95 USBx2 & ESATA COMBO (7) PJP14 1 2 (3) (4) Place one 150uF cap by each USB connector. +5V_ALW FS2 *455/5A_NC 1 2 Platforms should put in PADS for the USB chokes if they have the room. Chokes should be NOPOP. B U7 42 USB_SIDE_EN# ESD3 1 2 3 USBP0_D+ 1 2 3 2 IN 3 EN1# 4 6 5 4 6 5 4 A CN4 ESATA+USB CONN C503 0.1U 10 X7R DLP11SN900HL2L USBP0_D- 2200P/50V/X7R ESATA_RX3-_R 2200P/50V/X7R ESATA_RX3+_R USBP1_DUSBP1_D+ C494 0.1U 10 X7R +USB_SIDE_PWR C493 *10U_NC 10 X5R 0805 SRV05-4.TCT EN2# GND 1 OUT1 OC1# 7 8 OUT2 OC2# 6 5 +USB_SIDE_PWR B USB_OC0_1# 13 TPS2062DR (7) PJP5 E-SATA Re-driver 1 (3) 1 C762 0.1U/ 10V C764 0.1U/ 10V C763 0.1U/ 10V C765 0.1U/ 10V FS1 *455/5A_NC 2 42 USB_BACK_EN# +1.8V_RUN USB_BACK_PWR U16 C204 0.1U 10 X7R (10) (4) +5V_ALW +1.8V_RUN C Place one 150uF cap by each USB connector. 2 C205 *10U_NC 10 X5R 0805 2 IN GND 1 3 EN1# OUT1 OC1# 7 8 4 EN2# OUT2 OC2# 6 5 C USB_OC2_3# 13 TPS2062DR +1.8V_RUN U50 R779 14 SATA_TX3+_C 14 SATA_TX3-_C 14 14 SATA_RX3+ SATA_RX3- C655 C654 2200P/50V/X7R 2200P/50V/X7R C768 C769 2200P/50V/X7R 2200P/50V/X7R 0 1 2 SATA_TX3+ 3 SATA_TX34 5 6 ESATA_RX3+_L 7 ESATA_RX3-_L 8 9 10 R780 0 EQA VDD AI+ AIGND VDD BO+ BOGND EQB EN VDD AO+ AOGND VDD BI+ BIGND VDD R795 20 19 18 17 16 15 14 13 12 11 300 ESATA_TX3+_L ESATA_TX3-_L C766 C767 2200P/50V/X7R 2200P/50V/X7R ESATA_TX3+_R ESATA_TX3-_R ESATA_RX3+_R ESATA_RX3-_R USB_BACK_PWR 13 SB_USBP3+ 13 SB_USBP3- D SATA_TX3+ SATA_TX3- R781 *0_NC R782 *0_NC ESATA_RX3+_L ESATA_RX3-_L R783 *0_NC R784 *0_NC JUSB1 MB side PI2EQX3211BHE ESATA_TX3+_L ESATA_TX3-_L 13 SB_USBP2+ 13 SB_USBP2- ESATA_RX3+_R ESATA_RX3-_R 10 9 8 7 6 5 4 3 2 1 USBP3+ USBP3USBP2+ USBP2- D QUANTA COMPUTER ACES_88513-104N Title USB 1 2 3 4 5 6 Size Document Number FX6 Date: Wednesday, June 25, 2008 7 Rev 3A Sheet 38 of 8 70 2 3 TH22 H-TC118BC197D63P2 4 5 6 7 MiniCard WLAN connector USBP4_DUSBP4_D+ +3.3V_WLAN 1 4 2 3 SB_USBP4- 13 SB_USBP4+ 13 Layout Note: R528 and R527 close to choke as possible to minimize stubs. R528 0 R527 0 J12 25 MINI1CLK_REQ# 25 CLK_PCIE_MINI1# 25 CLK_PCIE_MINI1 MINI1CLK_REQ# C637 220P 50 X7R 8 8 PCIE_RX1PCIE_RX1+ 8 8 PCIE_TX1PCIE_TX1+ PCIE_MCARD1_DET# 14 PCIE_MCARD1_DET# PCI-Express TX and RX direct to connector Non-iAMT T87 T86 T81 RSV_ICH_CL_CLK1 RSV_ICH_CL_DATA1 RSV_ICH_CL_RST1# PAD PAD PAD 1 3 5 7 9 11 13 15 WAKE# Reserved Reserved CLKREQ# GND REFCLKREFCLK+ GND 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 Reserved Reserved GND PERn0 PERp0 GND GND PETn0 PETp0 GND Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved +3.3V GND +1.5V Reserved Reserved Reserved Reserved Reserved 2 4 6 8 10 12 14 16 GND Reserved PERST# +3.3Vaux GND +1.5V SMB_CLK SMB_DATA GND USB_DUSB_D+ GND LED_WWAN# LED_WLAN# LED_WPAN# +1.5V GND +3.3V 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 WLAN_SMBCLK 1 A R446 R173 0 R176 SB_WLAN_PCIE_RST# 14 +3.3V_WLAN WLAN_SMBDATA 1 R174 USBP4_DUSBP4_D+ USB_MCARD1_DET# Suport for WoW LED_WLAN_OUT# 44 WLAN_RADIO_OFF# 2 HOST_DEBUG_RX 71 19 8051_TX 82 42 8051_RX 81 +3.3V_WLAN R170 WLAN_RADIO_DIS# Place caps close to connector. +3.3V_WLAN *0_NC +PWR_SRC +PWR_SRC +3.3V_ALW C619 0.1U 10 X7R C608 0.047U 10 X7R C613 0.1U 10 X7R C612 0.047U 10 X7R R171 *100K_NC R175 *100K_NC + C642 *330U_NC 6.3 POSCAP 7343 C606 4.7U 10 X5R 0805 C610 0.047U 10 X7R C611 0.047U 10 X7R WLAN_ENABLE Q28A R169 *470K_NC 5 *2N7002DW-7-F_NC R172 *200K_NC 2 42 AUX_EN_WOWL 1 MiniCard WPAN connector Q28B 4 6 0_0805 C203 *4700P_NC 50 X7R 0603 R177 *2N7002DW-7-F_NC *100K_NC +3.3V_RUN +1.5V_RUN +3.3V_RUN +3.3V_WLAN Q27 *SI3456DV_NC 6 5 4 2 1 +1.5V_RUN +3.3V_RUN R557 14 Prevent backdrive when WoW is enabled. B 70 17 1 D13 SDMK0340L-7-F EC Pin HOST_DEBUG_TX *0_NC USB_MCARD1_DET# 14 3 Debug Pin Name 16 Q30 *2N7002W-7-F_NC 3 SB_SMBDATA 13,16,37,40 WLAN_SMBCLK WLAN_SMBDATA DEBUG PINS JMINI Pin *0_NC +3.3V_WLAN PLTRST_SYS# 33,40,45,51 WLAN_RADIO_OFF# *0_NC LTS_AAA-PCI-041-K01 B Q29 *2N7002W-7-F_NC 3 SB_SMBCLK 13,16,37,40 3 A COEX2_WLAN_ACTIVE COEX1_BT_ACTIVE_MINI MINI1CLK_REQ# 2 13,33,37,40 SB_PCIE_WAKE# RP6 4P2R-2.2K 2 +3.3V_WLAN +1.5V_RUN 3 1 1 1 *DLW21SN900SQ2L_NC +3.3V_WLAN 8 L74 4 2 1 TH21 H-TC118BC197D63P2 J11 13,33,37,40 SB_PCIE_WAKE# COEX2_WLAN_ACTIVE COEX1_BT_ACTIVE_MINI MINI2CLK_REQ# C 25 MINI2CLK_REQ# 25 CLK_PCIE_MINI2# 25 CLK_PCIE_MINI2 COEX2_WLAN_ACTIVE (17) R191 *100K_NC C225 *33P_NC 50 COH 9,12,14,37,45 PLTRST# 12 CLK_PCI_DEBUG 8 8 8 8 R187 R552 *0_NC *0_NC PCIE_RX2PCIE_RX2+ PCIE_TX2PCIE_TX2+ PCIE_MCARD3_DET# 14 PCIE_MCARD3_DET# PCI-Express TX and RX direct to connector MINI2CLK_REQ# C630 220P 50 X7R 1 3 5 7 9 11 13 15 WAKE# Reserved Reserved CLKREQ# GND REFCLKREFCLK+ GND 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 Reserved Reserved GND PERn0 PERp0 GND GND PETn0 PETp0 GND Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved +3.3V GND +1.5V Reserved Reserved Reserved Reserved Reserved 2 4 6 8 10 12 14 16 GND Reserved PERST# +3.3Vaux GND +1.5V SMB_CLK SMB_DATA GND USB_DUSB_D+ GND LED_WWAN# LED_WLAN# LED_WPAN# +1.5V GND +3.3V 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 (17) R539 R538 R537 R536 R535 R541 Place caps close to connector. *0_NC *0_NC *0_NC *0_NC *0_NC 0 R540 *0_NC WPAN_RADIO_DIS_MINI# SB_WPAN_PCIE_RST# 14 +3.3V_RUN SB_SMBCLK 13,16,37,40 SB_SMBDATA 13,16,37,40 USBP6_DUSBP6_D+ USB_MCARD3_DET# C +1.5V_RUN LPC_LFRAME# 12,42 LPC_LAD3 12,42 LPC_LAD2 12,42 LPC_LAD1 12,42 LPC_LAD0 12,42 PLTRST_SYS# 33,40,45,51 14 C618 0.047U 10 X7R C617 0.047U 10 X7R C614 0.047U 10 X7R C632 0.1U 10 X7R C615 *100P_NC 50 X7R +3.3V_RUN USB_MCARD3_DET# 14 LED_WPAN# C616 0.1U 10 X7R LED_WPAN# 44 C634 0.047U 10 X7R C607 4.7U 10 X5R 0805 LTS_AAA-PCI-041-K01 D D L76 USBP6_DUSBP6_D+ TH15 H-TC118BC197D63P2 2 3 SB_USBP6- 13 SB_USBP6+ 13 1 QUANTA COMPUTER *DLW21SN900SQ2L_NC R545 0 R544 0 Layout Note: R545 and R544 close to choke as possible to minimize stubs. 1 1 TH16 H-TC118BC197D63P2 1 4 2 3 4 5 6 Title MINI CARD Size Document Number FX6 Date: Wednesday, June 25, 2008 7 Rev 3A Sheet 39 of 8 70 1 2 3 5 6 7 8 1 TH8 H-TC118BC197D63P2 1 TH7 H-TC118BC197D63P2 4 A A MiniCard WWAN connector +3.3V_RUN +3.3V_RUN +1.5V_RUN J10 13,33,37,39 SB_PCIE_WAKE# T79 PAD T80 PAD 25 MINI3CLK_REQ# 1 3 5 7 9 11 13 15 MINI3CLK_REQ# 25 CLK_PCIE_MINI3# 25 CLK_PCIE_MINI3 B 8 8 PCIE_RX5PCIE_RX5+ 8 8 PCIE_TX5PCIE_TX5+ 14 PCIE_MCARD2_DET# 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 PCIE_MCARD2_DET# PCI-Express TX and RX direct to connector MINI3CLK_REQ# +3.3V GND +1.5V Reserved Reserved Reserved Reserved Reserved 2 4 6 8 10 12 14 16 GND Reserved PERST# +3.3Vaux GND +1.5V SMB_CLK SMB_DATA GND USB_DUSB_D+ GND LED_WWAN# LED_WLAN# LED_WPAN# +1.5V GND +3.3V 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 WAKE# Reserved Reserved CLKREQ# GND REFCLKREFCLK+ GND Reserved Reserved GND PERn0 PERp0 GND GND PETn0 PETp0 GND Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved UIM_PWR UIM_DATA UIM_CLK UIM_RESET UIM_VPP R448 R447 Place C484 close to J10 0 PLTRST_SYS# 33,39,45,51 WWAN_RADIO_DIS# 14 SB_WWAN_PCIE_RST# 14 *0_NC Place caps close to connector. +1.5V_RUN +3.3V_RUN SB_SMBCLK 13,16,37,39 SB_SMBDATA 13,16,37,39 USBP5_DUSBP5_D+ USB_MCARD2_DET# PAD C535 0.047U 10 X7R USB_MCARD2_DET# 14 C536 33P 50 COH B T78 +3.3V_RUN LTS_AAA-PCI-041-K01 C568 220P 50 X7R C537 33P 50 COH C571 0.047U 10 X7R C538 33P 50 COH C539 0.047U 10 X7R + C572 330U 6.3 POSCAP 7343 + C520 *330U_NC 6.3 POSCAP 7343 Place C383, C367 close to JSIM1 ESD1 UIM_RESET UIM_PWR UIM_RESET C2 C3 VCC GND UIM_CLK RST VPP C6 CLK DATA C7 1 2 3 C 1 2 3 C5 UIM_VPP 1 2 3 6 5 4 6 5 4 UIM_VPP UIM_PWR UIM_DATA UIM_PWR L63 USBP5_DUSBP5_D+ SRV05-4.TCT UIM_DATA GND GND GND UIM_CLK C1 C57 33P 50 COH C51 33P 50 COH C53 *100P_NC 50 X7R C58 33P 50 COH C33 33P 50 COH 1 4 C45 1U 10 X5R 0603 2 3 SB_USBP5- 13 SB_USBP5+ 13 *DLW21SN900SQ2L_NC R444 0 R443 0 JSIM1 FOX_2WM610C1C-DS-7F Note: Place caps on UIMlines close to WWAN connector Layout Note: R444 and R443 close to choke as possible to minimize stubs. C D D QUANTA COMPUTER Title WWAN 1 2 3 4 5 6 Size Document Number FX6 Date: Wednesday, June 25, 2008 7 Rev 3A Sheet 40 of 8 70 A B C D E RTC BATTERY +RTC_CELL +PWR_SRC +3.3V_ALW D32 4 1 3 4 OUT 5/3# IN 1 2 GND SHDN 5 SDMK0340L-7-F 16Mbit (2M Byte), SPI +3.3V_ALW C661 *4.7U_NC 6.3 X5R 0603 +3.3V_ALW D18 R167 10K 1 U8 42 42 42 42 EC_FLASH_SPI_CS# EC_FLASH_SPI_CLK EC_FLASH_SPI_DIN EC_FLASH_SPI_DO R533 R168 R166 15 15 15 C201 22P 50 NPO 1 6 5 2 CE# SCK SI SO HOLD# 7 3 WP# VSS 4 VDD SST25VF016B-50-4C-S2AF C649 *1U_NC 25 X7R 0805 *MAX1615EUK-T+_NC BT1 2 +RTC_1 R218 1K +RTC 2 1 SDMK0340L-7-F R165 10K 8 4 U29 2 LTS_AAA-BAT-019-K01 C660 1U 25 X5R 0603 RTC-BATTERY (3) C199 0.1U 10 X7R 3 3 2 2 1 1 Title QUANTA COMPUTER FLASH /RTC A B C D Size Document Number FX6 Date: Wednesday, June 25, 2008 Rev 3A Sheet E 41 of 70 1 2 43 43 44 LED_MASK# KSO16 KSO15 KSO14 KSO13 KSO12 KSO11 KSO10 KSO9 KSO8 KSO7 KSO6 KSO5 KSO4 KSO3 KSO2 KSO1 KSO0 +3.3V_ALW A C155 10U C106 6.3 0603 X5R 0.1U C148 10 X7R 0.1U C130 10 X7R 0.1U C97 10 X7R 0.1U 10 X7R Place these caps close to ITE8512. KSI7 KSI6 KSI5 KSI4 KSI3 KSI2 KSI1 KSI0 12,35 CLKRUN# 12,35 IRQ_SERIRQ 13 SIO_EXT_SMI# 13 SIO_EXT_SCI# 13 SIO_A20GATE 26 LCD_TST 2 D6 2 D4 2 D12 1 D11 4 SDMK0340L-7-F 14 16 31 NB_MUTE# 13,35 SB_PME# 19 20 GFX THM,LAN,MEDIA SMBCLK2 SMBDAT2 C VSTBY1 VSTBY2 VSTBY3 VSTBY4 VSTBY5 VSTBY6 PWM LPC IR/UART SMBCLK1 SMBDAT1 115 116 SMCLK1/GPC1 SMDAT1/GPC2 SMBCLK2 SMBDAT2 117 118 SMCLK2/GPF6 SMDAT2/GPF7 SMBUS PS2CLK0/GPF0 PS2DAT0/GPF1 45 RESET_OUT# 43 NUM_LED# 87 88 PS2CLK1/GPF2 PS2DAT1/GPF3 43 CLK_TP_SIO 43 DAT_TP_SIO 89 90 PS2CLK2/GPF4 PS2DAT2/GPF5 128 ITE8512_XTAL2 2 R95 ITE8512IX_JX 100K D9 1 29,52 THERM_STP# 2 SDMK0340L-7-F WRST# C119 0.1U 16 X7R 0603 +3.3V_ALW L21 1 12 27 49 91 113 122 74 75 BLM11A05S W1 need close U13. L22 0 +3.3V_RUN 26 50 92 114 121 127 +3.3V_ALW R112 *0_NC C131 0.1U 10 X7R A HWPG CPU_PWRGD_Q 66 67 68 69 70 71 72 73 DAC0/GPJ0 DAC1/GPJ1 DAC2/GPJ2 DAC3/GPJ3 DAC4/GPJ4 DAC5/GPJ5 76 77 78 79 80 81 PWM0/GPA0 PWM1/GPA1 PWM2/GPA2 PWM3/GPA3 PWM4/GPA4 PWM5/GPA5 PWM6/GPA6 PWM7/GPA7 24 25 28 29 30 31 32 34 TACH0/GPD6 TACH1/GPD7 47 48 FAN1_TACH 29 PANEL_BKEN 9 TMRI0/WUI2/GPC4 TMRI1/WUI3/GPC6 120 124 LID_SW# 43 MEDIA_INT# 43 RXD/GPB0 TXD/GPB1 CRX0/GPC0 CTX0/GPB2 CRX1/GPH1/ID1 CTX1/GPH2/ID2 108 109 119 123 94 95 WIRELESS_ON/OFF# 44 AUX_EN_WOWL 39 CIRRX 43 RUN_ON 26,46,49,50,52 HDDC_EN 30 CPU_VCORE_ENABLE 53 FLFRAME/GPG2/LF FLRST/GPG0/TM FLAD3/GPG6 100 106 104 LPC/FWH FLASH FLAD2/SO FLAD1/SI FLAD0/SCE FLCLK 103 102 101 105 EC_FLASH_SPI_DO 41 EC_FLASH_SPI_DIN 41 EC_FLASH_SPI_CS# 41 EC_FLASH_SPI_CLK 41 EGPC 82 83 84 PS_ID 48 5V_ALW_ON 52 SNIFFER_GREEN# PS/2 EGAD/GPE1 EGCS/GPE2 EGCLK/GPE3 HWPG 45 CPU_PWRGD_Q 12 LCD_CBL_DET# INVERTER_CBL_DET# ADP_OC IRQ_SERIRQ LCD_BAK# SIO_SLP_S5# 13 1 D10 2 SDMK0340L-7-F ADAPT_TRIP_SEL 47 SIO_EXT_WAKE# 13 LAN_DISABLE# 33 EXPRCRD_PWREN# 13,37 SB_RSMRST# 13 SIO_PWRBTN# 13 KB_BACKLITE_EN 10K 10K SMBDAT0 SMBCLK0 1 3 2 RP3 4 2.2KX2 SMBDAT1 SMBCLK1 1 3 2 RP4 4 10KX2 SMBDAT2 SMBCLK2 1 3 2 RP5 4 2.2KX2 INVERTER_CBL_DET# KB_DET# LCD_CBL_DET# R270 R587 R1 HWPG SUS_ON RUN_ON 100K *100K_NC 100K R417 R134 R135 SUS_ON KB_DET# B 100K 100K 100K +3.3V_ALW Board ID Straps SUS_ON 46,49 KB_DET# 43 1.2V_ALW_SUS_ON 54 R433 R132 R130 R129 *10K_NC 10K 10K 10K (1) USB_BACK_EN# BID1 CHIPSET_ID1 USB_SIDE_EN# 44 CK32K 96 97 98 99 107 USB_SIDE_EN# USB_BACK_EN# BID1 CHIPSET_ID1 USB_SIDE_EN# 38 USB_BACK_EN# 38 BID1 5 R432 R133 R131 R128 10K *10K_NC *10K_NC *10K_NC MODC_EN 30 UMA CK32KE VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 18 21 35 SIO_SLP_S3# 13 ACAV_IN 47 SNIFFER_PWR_SW# RING/PWRFAIL/LPCRST/GPB7 112 NB_VCORE_RUN_ON PWRSW/GPE4 125 MAIN_PWR_SW# 44 RI1/WUI0/GPD0 RI2/WUI1/GPD1 WUI5/GPE5 AVCC AVSS GINT/GPD5 C114 0.1U/10V 33 LCDVCC_TST_EN VGA_IDENTIFY USB_SIDE_EN# 1 = Discrete Gfx. 0 = UMA. 44 51 LCDVCC_TST_EN 26 IT8512E/JX LQFP128-16X16-4-FX2 CHIPSET_ID1 BID1 CHIPSET_ID1 1 1 1 1 1 1 BID1 0 0 1 1 0 0 BID0 USB_BACK_EN# 0 1 0 1 0 1 FX6 (UMA) SSI (X00) PT (X01) ST (X02) QT (A00) (A01) FX6A (Dis) SSI (X00) PT (X01) ST (X02) QT (A00) (A01) BLM11A05S CLK_PCI_8512 D R104 R93 +3.3V_ALW BREATH_LED# 44 BAT2_LED# 44 FAN1_PWM 29 PWM_VADJ 26 BAT1_LED# 44 KB_BACKLITE_EN 43 CAP_LED# 43 BEEP 31 32KHz Clock. ITE8512_XTAL2 +3.3V_RUN LCD_CBL_DET# 26 INVERTER_CBL_DET# 26 PBAT_PRES# 48 C GPH3/ID3 GPH4/ID4 GPH5/ID5 GPH6/ID6 GPG1/ID7 GPIO ITE8512_XTAL1 R113 3 11 Discrete SMCLK0/GPB3 SMDAT0/GPB4 +3.3V_ALW 5 ADC0/GPI0 ADC1/GPI1 ADC2/GPI2 ADC3/GPI3 ADC4/GPI4 ADC5/GPI5 ADC6/GPI6 ADC7/GPI7 ADC/DAC L80HLAT/GPE0 L80LLAT/WUI7/GPE7 110 111 85 86 VBAT1 VCC KEYBOARD LPCRST/WUI4/GPD2 LPCCLK LFRAME LAD0 LAD1 LAD2 LAD3 SMBCLK0 SMBDAT0 1.2V_RUN_ON 10,45,46 1.2V_RUN_ON 45,53 CPU_VCORE_PWRGD ITE8512E LQFP-128L KSI7 KSI6 KSI5 KSI4 KSI3/SLIN KSI2/INT KSI1/AFD KSI0/STB KBRST/GPB6 WRST PWUREQ/GPC7 LCD_BAK# 43 43 KSO17/GPC5 KSO16/GPC3 KSO15 KSO14 KSO13 KSO12/SLCT KSO11/ERR KSO10/PE KSO9/BUSY KSO8/ACK KSO7/PD7 KSO6/PD6 KSO5/PD5 KSO4/PD4 KSO3/PD3 KSO2/PD2 KSO1/PD1 KSO0/PD0 CLKRUN/GPH0/ID0 SERIRQ ECSMI/GPD4 ECSCI/GPD3 GA20/GPB5 LPCPD/WUI6/GPE6 SIO_RCIN# 2 WRST# 4 +RTC_CELL 93 5 1 15 1SDMK0340L-7-F 23 1SDMK0340L-7-F 126 SDMK0340L-7-F 17 26 25,26,29 SMBCLK1 25,26,29 SMBDAT1 CLK,LCD,THERMAL 65 64 63 62 61 60 59 58 13 47,48 SMBCLK0 47,48 SMBDAT0 BAT 57 56 55 54 53 52 51 46 45 44 43 42 41 40 39 38 37 36 22 13 6 10 9 8 7 13,14,31 SB_AZ_CODEC_RST# 12,14 CLK_PCI_8512 12,39 LPC_LFRAME# 12,39 LPC_LAD0 12,39 LPC_LAD1 12,39 LPC_LAD2 12,39 LPC_LAD3 B 3 U5 KSO[0..16] KSI[0..7] ITE8512IX_JX R118 0 D (8) W1 4 1 ITE8512_XTAL1 3 2 C139 32.768KHZ 18P 50 COG R102 10 C149 18P 50 COG 1 C745 *1U_NC 10 X5R 0603 C121 2.2P 50 NPO C770 0.1U 16 X7R ADP_OC ITE8512IX pin12 connect to GND. ITE8512JX pin12 connect to 0.1uF, 1uF. 2 3 R86 R91 0 *0_NC IINP 47 ADAPT_OC 47 4 QUANTA COMPUTER Title ITE8512 Size Document Number FX6 Date: Wednesday, June 25, 2008 Rev 3A Sheet 5 42 of 70 1 TP 2 3 4 5 6 7 8 KEYBOARD CONNECTOR +5V_RUN +3.3V_ALW 42 KSO[0..16] 42 KSI[0..7] 42 DAT_TP_SIO L29 BLM11A601S L30 BLM11A601S TP_DATA +5V_RUN C592 10P 50 NPO C192 10P 50 NPO C190 10P 50 NPO C198 0.1U 10 X7R C197 0.047U 10 X7R C191 0.047U 10 X7R 1 KSI7 KSI6 KSI4 KSI2 KSI5 KSI1 KSI3 KSI0 KSO5 KSO4 KSO7 KSO6 KSO8 KSO3 KSO1 KSO2 KSO0 KSO12 KSO16 KSO15 KSO13 KSO14 KSO9 KSO11 KSO10 42 1 NUM_LED# Q59 DDTA114YUA-7-F 47K 3 2 10K Q60 2N7002W-7-F ACES_88513-064N C193 0.1U 10 X7R KB_DET# +3.3V_RUN +3.3V_RUN R66 220 NUM_LED_L +5V_RUN 1 C593 10P 50 NPO R380 100K 1 2 3 4 5 6 TP_CLK 3 LID_SW# CLK_TP_SIO 2 42 42 42 +5V_RUN JP2 2 4 A +3.3V_RUN MEDIA_INT# 2 +3.3V_ALW JP1 10K 1 2 3 4 5 6 7 8 9 10 SMBCLK2 SMBDAT2 44 HDD_LED 44 WLAN_LED 44 BT_LED B 5V_PWR CLK DAT INT GND LED1 LED2 LED3 3V_ALW REV HRS-FH28-60(30)SB-1SH(05) ACES_88511-1041 Consumer IR +3.3V_ALW +3.3V_ALW C90 KSI7 R310 100 42 CIRRX 220 CAP_LED_L R67 A +5V_ALW I2C 42 42 C474 1U 10 X5R 0603 C CAP_LED_L NUM_LED_L 3 Q58 2N7002W-7-F 3 R368 3 10K R136 100K B CAP_LED# *DA204U_NC D24 +3.3V_ALW 42 47K 1 2 1 42 Q57 DDTA114YUA-7-F 2 R379 100K +3.3V_ALW Media Button 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 GND1 4.7KX2 +3.3V_RUN 10K JKB1 RP33 R156 100K R68 GND2 1 3 +3.3V_ALW R311 10K *100P_NC 50 NPO U15 CIRRX 4 3 2 1 IRTX VCC GND1 GND2 CP2 *100PX4_NC 8 7 KSO12 6 5 KSO16 4 3 KSO15 2 1 KSO13 50 NPO 1206 CP1 *100PX4_NC 8 7 KSO14 6 5 KSO9 4 3 KSO11 2 1 KSO10 50 NPO 1206 CP4 *100PX4_NC 8 7 KSO4 6 5 KSO7 4 3 KSO6 2 1 KSO8 50 NPO 1206 CP3 *100PX4_NC 8 7 KSO3 6 5 KSO1 4 3 KSO2 2 1 KSO0 50 NPO 1206 CP6 *100PX4_NC 8 7 KSI6 6 5 KSI4 4 3 KSI2 2 1 KSI5 50 NPO 1206 CP5 *100PX4_NC 8 7 KSI1 6 5 KSI3 4 3 KSI0 2 1 KSO5 50 NPO 1206 C 100P CAPS CLOSE TO JKB1 TSOP36136TS C399 4.7U 10 X5R 0805 C400 0.1U 10 X7R Key board Illumination (11) +KB_LED +KB_LED J4 +3.3V_ALW +15V_ALW +5V_RUN 1 FS3 1206L050YR 2 Q82 SI2304BDS-T1-E3 +KB_LED LED_PWM 3 14 KB_LED_DET R796 100K LED_PWM 1 R797 200K 3 42 KB_BACKLITE_EN 1 6 D 1 3 2 Q71B *2N7002DW-7-F_NC C579 *10U_NC 6.3 X5R 0603 R505 *20K_NC D QUANTA COMPUTER C589 *4700P/50V/0603_NC 5 4 42 KB_BACKLITE_EN C188 0.1U 10 X7R ACES_88513-044N R512 *100K_NC 2 R513 *100K_NC 1 2 3 4 2 Q70 *SI2304BDS-T1-E3_NC 1 2 3 4 Q71A *2N7002DW-7-F_NC Title TP/KB/CIR/BT 1 2 3 4 5 6 Size Document Number FX6 Date: Wednesday, June 25, 2008 7 Rev 3A Sheet 43 of 8 70 A B C D E ESD2 Biometric 1 2 3 USBP10_D+ 1 2 3 6 5 4 6 5 4 WLAN +3.3V_ALW +3.3V_WLAN +3.3V_WLAN +3.3V_ALW +1.8V_RUN +3.3V_RUN *SRV05-4.TCT_NC Sniffer Switch ON/OFF Sniffer Switch +5V_RUN SW1 1 USBP10_D- J3 USBP10_DUSBP10_D+ 3 2 *DLW21SN900SQ2L_NC 4 47K 1 39 LED_WLAN_OUT# R313 100K 2 10K R312 42 WIRELESS_ON/OFF# Q72 2N7002W-7-F ACES_88511-0641 R150 3 0 R523 0 220 HDD activity LED. Power Buttom +3.3V_RUN G 3 S0 +5V_SUS +5V_SUS Sniffer Buttom +3.3V_SUS LSS12P-PC-V-T/R +3.3V_SUS +5V_SUS 1 LED_MASK# R204 0 1 42 BREATH_LED# 3 2 4 Q56 2N7002W-7-F BREATH_PWRLED U17 TC7SZ04FU(T5L,F,T) 2 Q6 DDTA114YUA-7-F 47K 1 42 SNIFFER_GREEN# 3 2 10K Q7 2N7002W-7-F 3 47K 1 SATA_ACT# R62 100K 5 3 Q31 DDTA114YUA-7-F 2 R206 100K R38 100K 3 R203 *0_NC 1 +3.3V_RUN 14 2 +5V_RUN 2 42 +3.3V_SUS SNIFFER1 0 C401 *1U_NC 10 X5R 0603 WLAN_LED 43 R149 S1 4 3 4 1 SB_USBP10SB_USBP10+ 1 Q73 DDTA114YUA-7-F 2 1 2 3 4 5 6 L28 13 13 R534 4.7K R61 2 220 SNIFFER G_R 10K +3.3V_ALW R192 3 Q32 2N7002W-7-F HDD_LED 43 Power Switch 220 3 42 3 R372 100K BT / UWB LED +3.3V_RUN LED_MASK# R373 42 MAIN_PWR_SW# R73 *0_NC +5V_RUN R75 0 Q8 DDTA114YUA-7-F 2 R81 100K 39 47K 1 LED_WPAN# 3 POWER_ SW_IN0# C480 1U 10 X5R 0603 1 +3.3V_RUN 10K +3.3V_ALW 2 10K R376 100K 3 Q11 2N7002W-7-F BT_LED This circuit is only needed if the platform has the SNIFFER. SNIFFER2 42 SNIFFER_PWR_SW# R65 43 220 C479 *1U_NC 10 X5R 0603 2 2 Battery status. +3.3V_ALW +5V_ALW2 1 +3.3V_ALW 42 BAT1_LED# 3 +3.3V_ALW 2 +3.3V_ALW 1 Q15 DDTA114YUA-7-F 1 47K 1 2 2 R84 100K 2 10K BAT1_LED *DA204U_NC D26 3 R82 RBAT1_LED 48 3 *DA204U_NC D27 3 Q16 2N7002W-7-F SNIFFER2 POWER_ SW_IN0# 220 SNIFFER2 SNIFFER G_R RBREATH_PWRLED POWER_ SW_IN0# +3.3V_ALW 1 47K SNIFFER2 SNIFFER G_R Q13 DDTA114YUA-7-F 2 BREATH_PWRLED R374 10K RBREATH_PWRLED POWER_ SW_IN0# GND SSW1 SLED1 SLED2 GND PLED PSW 1 R77 BAT2_LED Title B C QUANTA COMPUTER SWITCH/LED SNIFFER Y_R:WLAN on/off SNIFFER G_R:AP detection RBAT2_LED 48 68 A 220 1 2 3 4 5 6 7 JST_SM07B-SHLS-TF(LF)(SN) 3 BAT2_LED# 100P/50/X7R 100P/50/X7R 100P/50/X7R 100P/50/X7R J2 1 42 C746 C747 C748 C749 D Size Document Number FX6 Date: Wednesday, June 25, 2008 Rev 3A Sheet E 44 of 70 1 2 3 4 5 6 7 8 Symbol: 2N7002W-7-F D(3) G(2) S(1) A A B B 14 +3.3V_ALW 0 +3.3V_ALW 3 R386 R404 *0_NC 1.2V_RUN_ON U18A 10,42,46 1 0 2 HWPG +3.3V_ALW 42 U21A 14 49 1.8V_SUS_PWRGD R384 14 54 1.2V_ALW_SUS_PWRGD U21B 1 SN74AHC08PW 3 4 2 6 U23A U23B 1 5 3 SN74AHC08PW R416 0 4 2 SB_PWRGD 6 SN74AHC08PW SN74AHC08PW R419 42 RESET_OUT# SB_PWRGD 5,13 05 SN74AHC08PW 42,53 CPU_VCORE_PWRGD R397 0 U18B 50 1.5V_RUN_PWRGD 50 1.1V_RUN_PWRGD R390 0 4 R393 0 5 51 NB_VCORE_PWRGD 6 R409 0 +1.8V_RUN SN74AHC08PW C C SB_PWRGD R189 *0_NC 13 R190 WD_PWRGD U11 0 1 NC VCC 2 A 3 GND Y C222 5 R186 4 *0.1U/10V/X7R_NC *33_NC NB_PWRGD 9,26 *SN74AUC1G17DBVR_NC +3.3V_SUS 5 C200 9,12,14,37,39 PLTRST# PLTRST# U19 R188 0.1U 16 X5R (3) 2 4 R164 0 WD_PWRGD: Push/Pull when A11SB700, OD when A12SB700. *0_NC 1 PLTRST_SYS# 33,39,40,51 74AHC1G08GW D D QUANTA COMPUTER Title System Reset Circuit 1 2 3 4 5 6 Size Document Number FX6 Date: Wednesday, June 25, 2008 7 Rev 3A Sheet 45 of 8 70 3 2 1 PC30 0.1U 50 0603 PR172 100K 4 RUN_ON# PC29 4700P/50V/0603 8 7 6 5 26,42,49,50,52 5 RUN_ENABLE PQ50A 2N7002DW-7-F 1 PQ33 SI4800BDY-T1-E3 8 7 6 5 3 2 1 3 8 7 6 5 PQ34 PR80 20K 2N7002W-7-F PC43 0.1U 50 0603 PR69 20K PC42 4700P/50V/0603 +1.2V_SUS FL11 *FBMH3225HM202NT_NC PQ13 FDS8880_NL +1.8V_SUS 8 7 6 5 +1.2V_ALW_SUS PR169 100K 6 5 2 1 3 RUN_ON# 1.2V_SUS_ENABLE PC175 0.1U 50 0603 PQ51 B PC32 0.1U 50 0603 PQ49 PR53 20K 2 1 4 3 PR189 100K +1.8V_RUN MAX : 2.735A +1.8V_RUN 3 2 1 1.8V_RUN_ENABLE PQ52 FDC655BN 3 3 2 1 PC63 4700P/50V/0603 +15V_ALW 2N7002W-7-F PR184 20K 1.8V_RUN_ENABLE PC31 4700P/50V/0603 11 2 1 SUS_ON# +3.3V_RUN MAX : 5.228A RUN_ON# 2 1 2N7002W-7-F A +3.3V_RUN PQ20 +15V_ALW B PQ21 FDS8880_NL +3.3V_ALW PR67 100K 2 1 SUS_ON# +3.3V_SUS MAX : 0.431A 3 SUS_ENABLE PR57 20K PC38 4700P/50V/0603 3.3V_RUN_ENABLE PC58 0.1U 50 0603 4 PR94 100K +3.3V_SUS PC36 0.1U 50 0603 PQ50B 2N7002DW-7-F +15V_ALW +3.3V_ALW +5V_RUN MAX : 0.432 2 RUN_ON PQ11B 2N7002DW-7-F +15V_ALW +5V_RUN 3 2 1 RUN_ENABLE 4 6 PQ11A 2N7002DW-7-F +5V_ALW PR173 100K PR50 20K 5 2 1 42,49 SUS_ON +15V_ALW 6 SUS_ON# +5V_ALW2 PR171 *100K_NC 3 +5V_SUS_ENABLE A +3.3V_ALW +5V_SUS 4 8 7 6 5 PR49 100K +5V_SUS 4 PR52 100K PQ10 SI4800BDY-T1-E3 +5V_ALW 5 PQ17 SI4800BDY-T1-E3 4 PR51 *100K_NC +15V_ALW 4 (19) 2N7002W-7-F PC179 4700P/50V/0603 +3.3V_ALW +5V_ALW2 +15V_ALW PQ27 FDS6298 +1.2V_ALW_SUS PR70 *100K_NC PR71 100K 8 7 6 5 PR72 100K +3.3V_SUS +1.8V_SUS +0.9V_DDR_VTT +1.2V_RUN MAX : 1.883A 3 2 1 PC51 0.1U 50 0603 3 1.2V_RUN_ENABLE +5V_SUS +1.2V_RUN 4 +5V_ALW2 3 4 +3.3V_ALW 2 3 1 PR73 20K 5 PQ25A 2N7002DW-7-F 6 4 C 10,42,45 1.2V_RUN_ON PC49 4700P/50V/0603 1 C PQ25B 2N7002DW-7-F 3 3 PR76 *22_NC 2 Reserve discharge path 3 PR58 *1K_NC 3 2 2 PQ18 *2N7002W-7-F_NC +1.8V_RUN PR63 *1K_NC 3 2 PQ19 *2N7002W-7-F_NC 1 2 PQ14 *2N7002W-7-F_NC 1 RUN_ON# +1.5V_RUN PR64 *1K_NC 3 PR65 *1K_NC 3 PR55 *1K_NC +2.5V_RUN PQ16 *2N7002W-7-F_NC 2 PQ15 *2N7002W-7-F_NC 1 +3.3V_RUN 1 +5V_RUN 1 PQ31 *2N7002W-7-F_NC 1 2 PQ30 *2N7002W-7-F_NC 1 2 PQ29 *2N7002W-7-F_NC 1 2 PQ32 *2N7002W-7-F_NC 1 SUS_ON# PR75 *22_NC 3 PR74 *22_NC 3 PR77 *22_NC 2 D D Reserve discharge path Title QUANTA COMPUTER RUN POWER SW 1 2 3 4 Size Document Number M-09 Date: Wednesday, June 25, 2008 Rev 3A Sheet 5 46 of 70 A B C D E +PWR_SRC PQ37 SI4835BDY-T1-E3 8 7 6 5 1 2 3 PQ39 SI4835BDY-T1-E3 Id=9.6A@Vgs=10V CHGR_IN 1 2 +DC_IN_SS 3 4 1 PC125 *2200P/50V_NC PR26 100K 1 PC128 *0.1U/50V/0603_NC PR114 470K 3 PR27 10K FL6 HI1206T161R-10(160,6A) 4 PR135 0.01/F/2512 1 2 3 4 8 7 6 5 +DC_IN_SS +DC_IN_SS 1 2 PQ9 2N7002W-7-F +DC_IN_SS 2 CSSP CSSN LDO RB500V-40 PD8 PC100 27 ACOK 11 VDD 26 DHI 24 DHI LX 23 LX DLO 17 5 CCI FBSA 15 FBSB 16 5 6 7 8 1 2 3 1/0603 +VCHGR PR127 2.2/0805 4 PQ40 SI4812BDY-T1-E3 PC101 1000P/50V PC112 PC114 PC115 PC109 PC108 PC96 PC99 PC105 10U/25V/1206 18 FL3 HI1206T161R-10(160,6A) 2 10U/25V/1206 CSIP CSIN PR124 0.01/F/2512 1 10U/25V/1206 19 SIL104R-5R8PF (6A/16mOhm) CHG_CS 10U/25V/1206 CCV PR133 20 2 +VCHGR_1 PL5 PC110 3300P/50V VCC DLO IINP 6 21 PGND PQ41 SI4800BDY-T1-E3 4 PR132 33/F/0603 PC120 1U/10V/0603 0.1U/50V/0603 8 PC121 0.1U/50V/0603 2200P/50V IINP SCL SDA BATSEL PC113 1U/10V/0603 LDO 25 1000P/50V 10 9 14 BST CSSN LDO 13 0.1U/50V/0603 SMBCLK0 SMBDAT0 IINP BST 3300P/50V/0603 42 ACIN 48 4 PR123 15.8K/F DCIN 2 3 +3.3V_ALW 42,48 42,48 PC124 10U/25V/1206 5 6 7 8 ACAV_IN SMBUS Address 12 PC122 10U/25V/1206 1 2 3 2 22 28 1 8731_ACIN GND PC116 0.01U/25V PR122 10K/F CSSP PR130 49.9K/F ACAV_IN PC127 0.1U/50V/0603 PC118 1U/25V/0805 LDO 42 PC126 2200P/50V 1 PR131 365K/F CSIP PC102 0.1U/10V PC103 0.01U/25V PC106 0.01U/25V 8731REF PC107 0.01U/25V PC111 Max Charging current setting 4.7A CSIN PC119 220P/50V MAX8731AETI+ PU7 SIL104R-5R8PF ( 5.8U +/-30%/Isat=5.5A/Irms=6A/DCR_typ=16mOhm/10X10.1X3.8 ) SI4800BDY-T1-E3 ( Vds=30V/Id=7A/Rdson=30mOhm ) SI4812BDY-T1-E3 (Vds=30V/ ID=7.7A/Rdson=21mOhm/Vsd=0.5V@1.4A) PC104 0.1U/10V 1U/10V/0603 3 +VCHGR PR128 100 GND REF DAC CCS 3 12 PR120 8.45K 4 7 PR126 10K/F SJ1 2 2 1 1 Jump20X10 TABLE 1 TRIP CURRENT ADAPTER(W) Ra (A) +3.3V_ALW +5V_ALW2 PR2 *100K_NC +5V_ALW2 PC5 8 PU6A *LM393DR2G_NC Rd 42 ADAPT_TRIP_SEL PR7 + 2 - *33.2K/F_NC 1 PR115 *100K_NC 2 1 *0_NC 42 PQ3 *2N7002W-7-F_NC Rb Rc **Rd 65 3.17 57.6K 13K 105 N/A 90 4.43 51.1K 17.8K 348 33.2K 130 6.43 32.4K 20.5K 100 27.4K 150 7.43 30.9K 24.9K 432 88.7K **PR119 is popluated if ADAPT_TRIP_SEL is used to program for the next lower adapter. PR1 *1K_NC 4 PR117 3 ADAPT_OC 3 PC4 *100P/50V_NC PR116 *1M_NC Ra *0.01U/25V_NC PR6 *51.1K/F_NC 3 4 PC94 PC92 *100P/50V_NC Rc PC93 *100P/50V_NC PC95 *0.01U/25V_NC PR118 *348/F/0603_NC Rb *0.01U/25V_NC PR119 *17.8K/F_NC 4 PC91 *0.1U/10V_NC 5 6 + 7 - PU6B *LM393DR2G_NC Title QUANTA COMPUTER BATTERY CHARGER For GPRS immunity place PC41 & PC39 as close to the IC as possible A B C D Size Document Number FX6 Date: Wednesday, June 25, 2008 Rev 3A Sheet E 47 of 70 A B C D E 2 1 2 1 2 1 2 1 +3.3V_ALW PC89 2200P/50V PD1 *DA204U_NC PD6 DA204U 3 PD2 *DA204U_NC 3 0.1U/50V/0603 3 PC90 3 +3.3V_ALW 1 1 +VCHGR SUY_200185MR009S509ZL BATT1+ 1 BATT2+ 2 SMB_CLK 3 SMB_DAT 4 BATT_PRES# 5 SYSPRES# 6 BATT_VOLT 7 BATT1- 8 BATT2- 9 JABT1 47 PR113 10K SMBUS Address=16H RP1 100/4P2R 1 3 2 4 1 3 2 4 +3.3V_ALW PD7 *DA204U_NC PR112 10K SMBCLK0 42,47 SMBDAT0 42,47 PBAT_PRES# 42 PBAT_ALARM# RP21 100/4P2R Change F/T:BAT-200045MR009GX31ZR-9P-R-V(0822) +3.3V_ALW 2 1 +5V_ALW2 PR20 2.2K 3 *DA204U_NC PD4 PQ4 FDV301N 2 1 PR17 2 3 100 PS_ID +5V_ALW2 +5V_ALW2 1 PR18 100K/F PR22 10K 3 PD3 *SSM24PT_NC PR24 *100_NC 1 2 42 *DA204U_NC PD5 3 DOCK_PSID 2 2 PQ8 MMST3904-7-F PS_ID_DISABLE# PR21 15K/F RBAT2_LED 44 RBAT1_LED 44 PL1 BLM11B102SPT J8 Change Value per GG updated EMI requirement on 0812 3 8 7 6 5 4 3 2 1 PQ38 SI4835BDY-T1-E3 3 +DC_IN_SS +DC_IN FL5 BLM41PG600SN1L FL4 BLM41PG600SN1L 8 7 6 5 1 2 3 +DCIN_JACK PC10 0.1U/50V/0603 PC12 0.01U/25V 4 BAT2_LED BAT1_LED LED_DET PSID GND GND DC DC PR16 10K/F/0603 PC16 0.1U/50V/0603 PC14 0.1U/50V/0603 PC117 10U/25V/1206 -DCIN_JACK MOLEX_87438-0843 PC15 0.47U/25V/0805 RV2 *VZ0603M260APT_NC PR23 240K RV1 *VZ0603M260APT_NC PR25 47K 4 4 +DCIN_JACK -DCIN_JACK PC200 1000P PC201 0.01U PC202 0.1U PC203 1000P PC204 0.01U PC205 0.1U Title QUANTA COMPUTER DCIN & BATT A B C D Size Document Number FX6 Date: Wednesday, June 25, 2008 Rev 3A Sheet E 48 of 70 5 4 3 2 1 +PWR_SRC FL1 HI1206T161R-10(160,6A) 1P8V_SUS_PWR_SRC SJ6 51116S3 (5) 1 1 51116S5 PC83 *0.1U/10V_NC PC53 2200P/50V PC84 *0.1U/10V_NC PR212 *0/0603_NC PC74 10U/10V/0805 DIS_MODE +0.9V_DDR_REF 5VIN VBST 20 LL 18 51116LX GND DRVL 17 51116DL 3 VTTGND PGND 16 6 MODE S3 11 51116S3 7 VTTREF S5 12 51116S5 V5IN 14 5VIN PGOOD 13 CS 15 VTT 4 VTTSNS 5 8 9 PC189 0.033U/16V 10 COMP VDDSNS VDDQSET PC62 PR110 0.1U/50V/0603 *0_NC PR105 +1.8V_SUS TDC : 11.473A MAX : 11.473A OCP : 16.39A RUN_ON 26,42,46,50,52 SUS_ON 42,46 D (100) (5) +1.8V_SUS PC182 0.1U/10V PR213 PQ36 2.2/F/0603 PHK28NQ03LT 4 + PC184 220U/4V/ESR25 + PC183 220U/4V/ESR25 (P3) +3.3V_ALW 100K PC54 10U/25V/1206 PL3 MPC1040LR88_0.88uH(17A/2.3mOhm) 5 6 7 8 9 PC73 10U/10V/0805 19 1 2 3 +0.9V_DDR_VTT 51116DH DRVH VLDOIN 2 1 2 3 PU4 TPS51116PWPRG4 1 PC55 10U/25V/1206 PQ28 FDS8880_NL 4 PR96 *0_NC PC52 0.1U/50V/0603 5 6 7 8 9 PC60 1U/10V/0603 4 CPU_VTT_SUS_SENSE (5) 2 Jump20X10 GND GND GND GND GND GND GND D 2 +1.8V_SUS +0.9V_DDR_VTT TDC : 1.925A MAX : 1.925A OCP : 2.75A PC188 2200p/50V C 21 22 23 24 25 26 27 C FOR DDR II PR208 *0_NC DIS_MODE PC72 0.1U/10V PC185 *1000P/50V_NC PR210 11.8K/F 5VIN +5V_ALW2 PR220 *0/0603_NC +1.8V_SUS 1.8V_SUS_PWRGD 45 OCP Setting (Note 1) PC69 4.7U/25V/0805 +5V_ALW (5) Mode Discharge Mode +1.8V Tracking Discharge GND PC82 *18P/50V_NC PR108 *143K/F_NC PR104 *0_NC 5 CPU_VDDIO_SUS_FB_H Non-Tracking Discharge 5 CPU_VDDIO_SUS_FB_L PR109 *100K/F_NC B Routing as Differential signal. PR111 *0_NC B SJ7 2 2 1 1 Jump20X10 MPC1040LR88 (0.88U +/- 20%/Isat=24A/Irms=17A/DCR_typ=2.3mOhm/11.5X10X4) Frequency=400KHz, I_ripple=4.54A, Rtrip=11.8Kohm (Note 1) Current Limiting Setting : Rtrip(Kohm)=100*(Iocp-0.5*Iripple)*Rds(on) A A Title QUANTA COMPUTER 1.8V_SUS&0.9VTT 5 4 3 2 Size Document Number FX6 Date: Wednesday, June 25, 2008 Rev 3A Sheet 1 49 of 70 5 4 3 PC79 10U/4V/0805 +1.8V_SUS D PU5 PR91 *30K/F/0603_NC PR227 +3.3V_ALW PR209 45 1.5V_RUN_PWRGD 10 *0_NC 100K OUT 9 VCC OUTS 6 5 7 PGOOD SHDN PGND AGND 8 3 4 REFIN REFOUT 1 2 +1.5V_RUN (5) PC71 10U/4V/0805 PC66 10U/4V/0805 11 26,42,46,49,52 RUN_ON D MAX8794ETB+ IN BP +3.3V_SUS PR90 49.9K/F/0603 1 +1.5V_RUN TDC : 0.805A MAX : 0.805A (5) +1.8V_SUS 6237REF 2 PR95 150K/F/0603 PC70 1U/10V/0603 PC64 *0.01U/16V_NC PC80 1U/10V/0603 PC75 1U/10V/0603 SJ4 2 2 1 1 C C Jump20X10 PC34 10U/4V/0805 +1.8V_SUS +1.8V_SUS 6237REF PU2 +3.3V_SUS B PR59 90.9K/F/0603 +1.1V_RUN TDC : 1.330A MAX : 1.330A (5) PR60 *69.8/F/0603_NC +3.3V_ALW PR228 PR61 45 1.1V_RUN_PWRGD *0_NC 100K 10 MAX8794ETB+ IN OUT 9 2 VCC OUTS 6 5 7 PGOOD SHDN PGND AGND 8 3 4 REFIN REFOUT 1 B +1.1V_RUN PR56 110K/F/0603 PR62 200K PC41 0.1U 10 X7R PC39 1U/10V/0603 PC37 10U/4V/0805 PC40 10U/4V/0805 11 26,42,46,49,52 RUN_ON BP (5) PC35 1U/10V/0603 PC33 1U/10V/0603 SJ5 2 2 1 1 Jump20X10 A Title A QUANTA COMPUTER 1.5V_RUN&1.1V_RUN 5 4 3 2 Size Document Number FX6 Date: Wednesday, June 25, 2008 Rev 3A Sheet 1 50 of 70 5 4 3 2 1 +PWR_SRC FL2 HI1206T161R-10(160,6A) NBCORE_PWR_SRC PC87 2200P/50V PC88 0.1U/50V/0603 PC1 10U/25V/1206 +NB_VCORE 5 6 7 8 D PR214 *100K_NC 2 3 +5VCC_NB 4 NB_VCORE_FB 5 6 45 NB_VCORE_PWRGD 7 DRVH VOUT LL V5FILT TRIP VFB V5DRV PGOOD GND DRVL PGND PC98 1U/10V/0603 PC8 0.1U/10V (5) PL4 SIL104R-1R5PF (10A/8.1mOhm) 13 51117LX 12 11 10 +5VCC_NB 9 51117DL 8 PQ2 SI4812BDY-T1-E3 PC6 1U/10V/0603 PC85 0.1U/10V R1 PR8 24.9K/F/0603 PR10 11.8K/F/0603 + PC86 220U/4V C PC97 *0.015U/50V/0603_NC PC3 2200p/50V SJ8 2 1 1 Jump20X10 +5VCC_NB PR224 *0/0603_NC PR3 2.2/F/0603 (54) 2 +5V_ALW2 (P3) 4 +3.3V_ALW PR11 178K/F/0603 NB_VCORE_FB PR15 237K/F PR225 100K R2 PR182 10K/F Frequency=300khZ +5V_ALW 3 +3.3V_ALW TON PC7 0.1U/50V/0603 14 15 PR5 100K C VBST 5 6 7 8 +NB_VCORE PR125 300/0603 TPS51117RGYR EN_PSV THERM 1 D 1 2 3 PU1 (5) 42 NB_VCORE_RUN_ON 4 NB_VCORE TDC : 4.9A MAX : 4.9A OCP : 7A 1 2 3 51117DH PQ1 SI4800BDY-T1-E3 2 1 3 PQ6 2N7002W-7-F PC9 0.01U/25V 3 B PQ5 2N7002W-7-F STRP_DATA +NB_VCORE HIGH LOW 1.1V HIGH HIGH 1.0V LOW LOW 1.1V LOW HIGH 1.1V B +NB_VCORE=0.75*(1+R1/R2) 2 33,39,40,45 PLTRST_SYS# PLTRST_SYS# 1 SIL104R-1R5A-R ( 1.5U +/- 30%/ Irms=10A/DCR_max=8.1mOhm/10.1X10X3.8 ) SI4800BDY-T1-E3 ( Vds=30V/Id=7A/Rdson=30mOhm ) SI4812BDY-T1-E3 (Vds=30V/ ID=7.7A/Rdson=21mOhm/Vsd=0.5V@1.4A) 2 STRP_DATA 1 9 PR9 75K/F/0603 PQ53 2N7002W-7-F A A QUANTA COMPUTER Title VCC_NB 5 4 3 2 Size Document Number FX6 Date: Wednesday, June 25, 2008 Rev 3A Sheet 1 51 of 70 5 4 3 2 TON GND Frequency (KHz) 400/500 (5V/3.3V) FL10 HI1206T161R-10(160,6A) OPEN 400/300 1 VCC 200/300 +DC1_PWR_SRC +PWR_SRC +5V_ALW2 D PC46 10U/25V/1206 PC45 10U/25V/1206 PC162 0.1U/50V/0603 PR81 390K PC163 2200P/50V PR198 *10/0603_NC +5V_VCC1 D PC164 0.1U/50V/0603 6237REF PC165 2200P/50V PC47 10U/25V/1206 PC48 10U/25V/1206 ISL6237_ONLOD PC180 4.7U/25V/0805 PR194 *0_NC +5V_ALW TDC : 5.69A MAX : 5.69A OCP : 8.13A PQ24 SI4800BDY-T1-E3 (5) 1 2 3 42 8 7 6 5 4 3 2 1 +5V_LX PR181 POK1 +5V_EN1 8 7 6 5 PR187 *0/0603_NC 270K/F 4 PC171 0.1U/50V/0603 +5V_DL PAD PAD PAD PC44 0.1U/10V ISL6237IRZ-T 35 34 33 3 2 1 PQ22 SI4812BDY-T1-E3 (5) 32 31 30 29 28 27 26 25 +5V_ALW PR188 340K/F C POK2 +3.3V_EN2 +3.3V_DH PC169 0.1U/50V/0603 PQ26 SI4812BDY-T1-E3 +3.3V_ALW SJ2 2 PC167 1U/10V/0603 2 1 1 Jump20X10 PR180 100K PD9 BAT54S-7-F PR179 42 200K THERM_STP# 29,42 PC172 0.1U/50V/0603 B 2 POK1 H_THERMTRIP# 5 PD10 BAT54S-7-F 1 PR218 *100K_NC POK2 3 PD11 BAS316 +5V_EN1 5V_ALW_ON PR183 100K PC170 0.1U/50V/0603 1 +3.3V_EN2 PR79 *0/0603_NC PR176 1/0603 +5V_ALW2 B + PC166 220U/6.3V/ESR25 PC50 0.1U/10V 4 +3.3V_DL +5V_ALW2 PR191 39K +3.3V_LX REFIN2 ILIM2 OUT2 SKIP# PGOOD2 EN2 DH2 LX2 SECFB PR177 1/0603 PL10 SIL1045R-3R3A (8A/21mOhm) 5 6 7 8 3 2 1 +5V_ALW PAD PAD PAD PAD BYP OUT1 FB1 ILIM1 PGOOD1 EN1 DH1 LX1 PAD PAD 1 2 3 (5) PAD LDOREFIN LDO VIN NC ONLDO VCC TON REF +5V_DH +3.3V_ALW PU10 BST1 DL1 VDD NC GND PGND DL2 BST2 4 41 40 39 38 9 10 11 12 13 14 15 16 37 36 +3.3V_ALW TDC : 6.04A MAX : 6.04A OCP : 8.63A PR190 *0_NC PR193 *0_NC 17 18 19 20 21 22 23 24 PQ23 SI4800BDY-T1-E3 PL9 SIL1045R-3R3A (8A/21mOhm) PC161+ 220U/6.3V/ESR25 PC176 0.1U/10V 4 (5) C PC178 1U/10V/0603 8 7 6 5 +5V_ALW PC59 *1U/10V/0603_NC PR192 *0_NC 5 6 7 8 PC177 0.1U/50V/0603 ISL6237_ONLOD PR82 150K PR202 *0_NC +15V_ALW PC173 0.1U/50V/0603 3 PR174 +5V_ALW2 2 *0_NC SECFB (5) (5) PC174 0.1U/50V/0603 PC133 1U/10V/0603 +3.3V_SUS +2.5V_RUN SIL1045R-3R3A ( 3.3U +/- 30%/ Isat=9A/Irms=8A/DCR_max=21mOhm/10.1X10X4.5 ) SI4800BDY-T1-E3 ( Vds=30V/Id=7A/Rdson=30mOhm ) SI4812BDY-T1-E3 (Vds=30V/ ID=7.7A/Rdson=21mOhm/Vsd=0.5V@1.4A) PU8 26,42,46,49,50 3 1 2 RUN_ON IN OUT SHDN GND SET 4 5 (5) MAX8863SEUK+T PC137 *0.01U/16V_NC A PR137 100K PC136 *20P/50V_NC PC131 10U/4V/0805 PR136 *100K_NC A PR139 100K Title QUANTA COMPUTER 3.3V_ALW & 5V_ALW 5 4 3 2 Size Document Number FX6 Date: Wednesday, June 25, 2008 Rev 3A Sheet 1 52 of 70 A B C D 2 2 1 1 OFS 1.2V VFIXEN V X X V X X +5V_SUS 3.3V 5V 1 +5V_ALW2 UGATE_NB CPU_VDDNB_RUN_J G1 8 D1 H +PWR_SRC 1 (P1) 2 6 G2 3 5 S2 4 + PC140 330U/2.5V/ESR9 PR28 47/F +5VCC G FL8 HI1206T161R-10(160,6A) 7 S1D2 PR29 47/F 5 CPU_VDDNB_RUN_FB_H 6265AGND F PQ44 +CPU_VDDNB_RUN Jump20X10 ISL6265 Pin1 E PL7 MPLC0730L3R3 (5.7A/30mOhm) CPU_VDDNB_RUN TDC : 2.1A OCP : 3A SJ9 LGATE_NB PC138 2200P/50V PC139 0.1U/50V/0603 PC141 4.7U/25V/0805 PC168 1000P PC192 0.01U PC193 0.1U SI4914DY-T1-E3 5 CPU_VDDNB_RUN_FB_L PR31 *0/0603_NC 6265AGND 6265AGND 1 PR32 10/0603 +PWR_SRC VFIXEN VID Codes Output PR141 10/0603 42,45 CPU_VCORE_PWRGD 5 PR219 *100K_NC 5 CPU_SVD 4 CPU_SVC 5 BOOT_0 PWROK 6265AGND PR151 1/0603 PC148 0.22U/25V/0603 4 18K/F PR43 100K/F PHASE_0 ISL6265HRTZ-T SVC PGND_0 ENABLE 7 LGATE_0 RBIAS PVCC 4700P/25V 8 OCSET LGATE_1 VDIFF_0 PGND_1 33 FB_0 PHASE_1 COMP_0 UGATE_1 PQ45 *NTMFS4108NT1G_NC PHASE_0 31 LGATE_0 +5VCC FL9 HI1206T161R-10(160,6A) PC150 2.2U/10V/0603 29 (P1) LGATE_1 PC159 2200P/50V PR36 10 27 PHASE_1 26 UGATE_1 PR162 4.02K/F ISN_1 PR157 1/0603 PC153 0.22U/25V/0603 4 24 ISP_1 23 22 VW_1 COMP_1 21 FB_1 20 VSEN_1 VDIFF_1 19 18 PC191 10U/25V/1206 PC194 1000P PL8 ETQP4LR36WFC_0.36UH 1 2 25 PC196 0.1U +CPU_VDD1_RUN PC21 + 330U/2V/ESR9 PC22 + 330U/2V/ESR9 PC156 0.1U/16V/0603 PC26 + 330U/2V/ESR9 3 PC160 2200P/50V/0603 PQ46 *NTMFS4108NT1G_NC +CPU_VDD1_RUN TDC : 18A PC155 0.1U/16V/0603 ISN_0 PC195 0.01U PR167 2.2/0805 4 PR163 4.02K/F PR165 22K/F ISP_1 5 CPU_VDD0_RUN_FB_H 5 CPU_VDD0_RUN_FB_L PC154 10U/25V/1206 PQ48 NTMFS4707NT1G PQ47 NTMFS4108NT1G Close to CPU socket PC157 10U/25V/1206 4 ISP_0 +CPU_VDD0_RUN PC158 0.1U/50V/0603 28 ISN_1 PR164 22K/F +PWR_SRC CPU_VIN1 30 1 2 3 3 17 (P4) RTN_0 1000P/50V 16 ISP_0 PC152 BOOT_1 RTN_1 VW_0 ISN_0 3 12 VSEN_0 6.81K/F 180P/50V ISN_0 PR156 PC23 2 +CPU_VDD0_RUN TDC : 18A 32 5 6 7 8 9 11 15 1200P/50V 14 PC151 13 54.9K/F PC19 + 330U/2V/ESR9 PC143 2200P/50V/0603 ISP_0 PQ43 NTMFS4108NT1G 1 2 3 10 PR155 PC18 + 330U/2V/ESR9 34 UGATE_0 5 6 7 8 9 9 PC17 + 330U/2V/ESR9 1 2 3 1K/F PR142 2.2/0805 4 35 (105) 255/F PC149 PR154 4 3 5 6 7 8 9 36 5 6 7 8 9 PR153 PR44 UGATE_0 Pin 49 is GND Pin SVD 6 42 CPU_VCORE_ENABLE + PC129 100U/25V 5 6 7 8 9 PR149 1/0603 BOOT_NB 5 6 7 8 9 38 37 UGATE_NB 39 40 41 42 43 PGOOD 3 5 CPU_PWRGD_SVID_REG + PC123 100U/25V PL6 ETQP4LR36WFC_0.36UH 1 2 PU9 1 2 3 2 LGATE_NB OFS/VFIXEN PHASE_NB 1 PGND_NB *10K_NC OCSET_NB PR145 GND PR38 10K PC199 0.1U +CPU_VDD0_RUN 1 2 3 2 PR216 10K 6265AGND PR217 *10K_NC *0_NC PC198 0.01U PQ42 NTMFS4707NT1G PC147 0.1U/50V/0603 PR147 PC197 1000P UGATE_NB 6265AGND +3.3V_ALW PC190 10U/25V/1206 4 +5VCC RTN_NB +3.3V_SUS +3.3V_RUN PC130 10U/25V/1206 4 PHASE_NB VSEN_NB +1.8V_SUS PC132 10U/25V/1206 1 2 3 0.8 44 1 PC135 0.1U/50V/0603 LGATE_NB PR144 11.3K/F PR143 44.2K/F 6265AGND 45 1 PC145 0.01U/50V FSET_NB 0.9 46 0 PC134 2200P/50V PC142 1200P/50V COMP_NB 1 47 1.0 PC146 33P/50V VCC 1 (P1) CPU_VIN0 1.1 0 FL7 HI1206T161R-10(160,6A) CPU_VIN0 FB_NB 0 49 0 PC20 1000P/50V 6265AGND 48 SVD VIN SVC PR35 22.1K/F PC144 1U/10V PR37 10 PR47 6.81K/F PR41 10 ISN_1 (P4) PC27 1000P/50V Close to CPU socket PR166 *10_NC PC25 4700P/25V PC28 1200P/50V PR46 1K/F 5 CPU_VDD1_RUN_FB_L PC24 180P/50V 5 CPU_VDD1_RUN_FB_H PR39 10 4 +1.8V_SUS +CPU_VDD1_RUN Option for Uni-plane PR48 255/F PR45 54.9K/F 4 Title QUANTA COMPUTER CPU_CORE_POWER A B C D E F G Size Document Number FX6 Date: Wednesday, June 25, 2008 Rev 3A Sheet 53 H of 70 5 4 3 2 1 +PWR_SRC FL12 HI1206T161R-10(160,6A) D D 1P2V_PWR_SRC PC186 2200P/50V PC187 0.1U/50V/0603 PC77 10U/25V/1206 +1.2V_ALW_SUS TDC : 2.177A MAX : 2.177A OCP : 3.11A +1.2V_ALW_SUS PR215 100K 1P2V_DH PU3 1 42 1.2V_ALW_SUS_ON +1.2V_ALW_SUS 2 PR98 300/0603 3 +5VCC_1P2V 4 1P2V_FB 5 6 45 1.2V_ALW_SUS_PWRGD 7 TPS51117RGYR EN_PSV VBST TON DRVH VOUT LL V5FILT TRIP VFB V5DRV PGOOD THERM (5) C GND PGND PC67 1U/10V/0603 PQ35 1 13 2 1P2V_LX 12 11 10 +5VCC_1P2V D1 G1 8 S1D2 7 3 G2 6 4 S2 5 (5) C PL2 MPLC0730L3R3 (5.7A/30mOhm) (19) SI4914DY-T1-E3 1P2V_DL 9 PR201 PR87 *2.2/F/0603_NC 47.5K/F/0603 PC65 *0.015U/50V/0603_NC PC56 0.1U/10V + PC57 220U/4V 8 15 PR85 100K DRVL PC68 0.1U/50V/0603 14 PC61 1U/10V/0603 PC76 0.1U/10V PR205 7.5K/F/0603 1P2V_FB PC181 *2200p/50V_NC +3.3V_ALW SJ3 2 2 1 1 PR86 75K/F/0603 Jump20X10 B B +5VCC_1P2V +5V_ALW2 PR222 *0/0603_NC PR103 237K/F Frequency=300KHz +5V_ALW MPLC0730L3R3 ( 3.3U +/- 20%/ Isat=5.7A/DCR_max=30mOhm/7.2X7X3 ) SI4914DY-T1-E3 ( Vds=30V/Id_U=5.6A/Id_L=6.4A/Rdson_L=27mOhm ) A Title A QUANTA COMPUTER 1.2V_ALW_SUS 5 4 3 2 Size Document Number FX6 Date: Wednesday, June 25, 2008 Rev 3A Sheet 1 54 of 70 1 2 3 4 5 A A BLANK PAGE FOR PAGE NUMBER SAME AS DISCRETE B B C C D D Title QUANTA COMPUTER VGA_M82 1 2 3 4 Size Document Number FX6 Date: Tuesday, June 03, 2008 Rev 3A Sheet 5 55 of 70 5 4 3 2 1 D D AMD S1G2 C +2.5V_RUN CPU_VDD0_RUN CPU_VDD0_RUN BATTERY CHARGER MAX8731 BATTERY +PWR_SRC CPU core PWM MAX17009 CPU_VDD1_RUN CPU_VDD1_RUN CPU_VDD_NB CPU_VDD_NB +1.2V_RUN DDR2 PWM LDO VTT MAX8632 AC ADAPTOR +1.2V SW +1V~+1.2V SW MAX8717 +1.8V_SUS +1.8V_SUS +0.9V_DDR_VTT +0.9V_DDR_VTT +1.2V_ALW_SUS +NB_VDD_MUX RS780 +NB_VDD_MUX +3.3V_ALW +NB_VDD_MUX +5V_ALW +1.8V_RUN +1.8V VLDT 1.2V TPDA VDDIO MEM TPDA +1.2V +3.3V VTT_MEM TPDA +1.5V_RUN BEAD VDDHT 1.1V 0.6A VDDPCIE 1.1V 0.7A +2.5VDUAL BEAD VDDA18HTPLL 1.8V 0.25A +3.3VDUAL BEAD VDDA18PCIE 1.8V 0.25A BEAD VDDA18PCIEPLL 1.8V 0.25A +1.2VDUAL +3.3VDUAL VDDC 1.0V-1.1V 7A +3.3V_RUN BEAD +1.8V_RUN +3.3VALW VDDG33 3.3V 0.03A VDD18_MEM 1.8V 0.005A +3.3V_RUN +1.8V_RUN +1.8V_RUN +3.3V_RUN +NB_VDD_MUX SWITCH +1.2V_RUN +1.2V_RUN +1.2V_RUN +3.3V_SUS SWITCH +3.3V_RUN +1.2V_RUN +3.3V_RUN VDD33_18 +5V_ALW SWITCH +5V_SUS SWITCH +1.8V_SUS SWITCH +5V_RUN +3.3V +1.2V_ALW_SUS SWITCH 3.3V CORE 0.3A 5V ANALOG 0.1A AUDIO OP GBIT ENTHENET BEAD 1.2V 0.5A BEAD 2.5V 0.5A BEAD Jumper RS780 3.3V 0.5A ITE8512-EC 3.3V 0.5A LCD PANEL VDDLT18 0.08A BEAD VDDLTP18 0.08A +5V BEAD VDDLT33 0.22A VDD_LED_BL_RUN BEAD PLLs 1.8V 0.1A +VIN +5V +5VDUAL SB SB700 BEAD PCIE IO 0.8A BEAD PCIE PVDD 80mA BEAD ATA I/O 0.2A BEAD ATA PLL 0.01A +1.5V +3.3V +3.3VDUAL 3.3V OR 1.8v I/O 0.45A SW 3.3V 1.5A BEAD 5V 0.5A B BACK LIGHT +5V LED_BL +VDD_MAIN USB X2 FR 5VDual USB X7 FR 5VDual EXPRESS CARD 1.5V (S0, S1) 0.7A 3.3V (S0, S1) 1.3A 3.3V (S3, S5) 0.3A SB CORE 0.6A 1.2V S5 PW 0.22A +1.5V 3.3V S5 PW 0.01A +3.3V BEAD USB I/O 0.2A +3.3VDUAL BEAD USB CORE 0.2A +1.5V +1.8V_RUN +3.3V +3.3VDUAL A 3.3V 0.5A BEAD BEAD +1.2V_RUN +1.2V_SUS 1.2V 0.2A BEAD AVDD 3.3V 0.135A +1.2V_ALW_SUS +3.3V_SUS VDD MEM HD CODEC VDD_MEM 1.8V 0.15A +3.3V_SUS +5V_SUS BEAD BEAD +5VDUAL +3.3V_SUS VTT_MEM 0.5A CLOCK GEN BEAD BEAD PLLs 1.1/1.2V 0.15A +3.3V_ALW VDD MEM 4A VDDG18 1.8V 0.005A +1.8V_RUN +1.1V_RUN +5V DDRII SODIMMX2--SYSTEM DDRII SIDE PORT MEMORY BEAD VDDHTRX 1.1V 0.45A +1.8V_RUN B +1.1V SW MAX8794 VDD NB VDDHTTX 1.2V 0.5A +1.8V_RUN +3.3V_ALW CPU_VTT_SUS RS780 +1.2V_RUN Jumper +NB_VCORE +1.5V SW MAX8794 CPU_VDDIO_SUS +3.3V +1.8V_RUN +1.8V_SUS VDD CORE0 0.375-1.500V 18A VDD CORE1 0.375-1.500V 18A +NB_VCORE +1.1V_RUN +5V SW +3V SW MAX8744 C VCCA 2.5V +1.2V_RUN MINI PCIE SLOT1 1.5V (S0, S1) 0.7A SIM 3.3V (S0, S1) 1.3A 3.3V (S3, S5) 0.3A MINI PCIE SLOT2 1.5V (S0, S1) 0.7A 3.3V (S0, S1) 1.3A 3.3V (S3, S5) 0.3A A +1.5V +3.3V +3.3VDUAL MINI PCIE SLOT2 1.5V (S0, S1) 0.7A 3.3V (S0, S1) 1.3A 3.3V (S3, S5) 0.3A Title QUANTA COMPUTER Power Rail for system 5 4 3 2 Size Document Number FX6 Date: Tuesday, June 03, 2008 Rev 3A Sheet 1 56 of 70 5 4 3 2 1 ADAPTER D D RUN_ON +PWR_SRC FDS4435BZ +INV_PWR_SRC BATTERY 1.2V_ALW_SUS_ON TPS51117 RUN_ON MODC_EN# HDDC_EN# MAX8863 GFX_RUN_ON CPU_VCORE_ENABLE +1.1V_GFX_PCIE +1.2V_SUS SI4856ADY MAX8794 MAX8794 +3.3V_RUN +3.3V_LAN +3.3VSUS 5784M +1.8V_RUN +1.5V_RUN +1.1V_RUN LOM_REGCTL12_PNP +5V_RUN MMJT9435T1G ( Q62 ) +VDDA +1.2V_LOM LOM_REGCTL25 5784M ( Q25) L41 A +2.5V_LOM Title +5V_SPK_AMP 5 +VCC_GFX_CORE B +3.3V_WLAN A +CPU_VDD0_RUN +CPU_VDD1_RUN +CPU_VDDNB_RUN SI4800BDY +1.2V_RUN +2.5VRUN +5V_HDD +5V_MOD SUS_ON 1.2V_RUN_ON SUS_ON ENAB_3VLAN SI3456DV-T1-E3 MAX8632 FDC655BN RUN_ON SI4800BDY SI4336DY SI4336DY RUN_ON FDC655BN FDC655BN +NB_VCORE +1.8V_SUS +0.9V_DDR_VTT RUN_ON FDC655BN RUN_ON B WLAN_3V_ENABLE RUN_ON +3.3V_ALW ISL6265 C +1.2V_ALW_SUS +5V_ALW TPS51116 SUS_ON 5V_ALW_ON TPS51117 NB_VCORE_RUN_ON +15V_ALW MAX8731 Charger SUS_ON +5V_ALW ISL6237 C QUANTA COMPUTER Power Sequence Diagram 4 3 2 Size Document Number FX6 Date: Tuesday, June 03, 2008 Rev 3A 1 Sheet 57 of 70 1 2 3 4 5 6 7 8 +3.3V_RUN 2.2K 2.2K AA18 SB_SMBCLK A SB700 W18 197 DIMM0 SB_SMBDATA 195 P16 A 197 DIMM1 195 P16 8 +3.3V_ALW P37 CHARGER 9 2.2K 110 SMBCLK0 111 SMBDAT0 P47 2.2K 32 100 3 4 P40 B 32 2.2K 10K MiniCard WPAN 30 +3.3V_RUN +3.3V_ALW MiniCard WWAN 30 BATTERY CONN P48 100 B 10K Express Card 7 10 P39 2.2K +3.3V_RUN 115 SMBCLK1 116 SMBDAT1 SIO 2N7002 CLK_SCLK 2 2N7002 CLK_SDATA 3 +3.3V_RUN CLK GEN. P25 +3.3V_RUN 10K 10K +3.3V_RUN C 2N7002 THERM_SCL 10 2N7002 THERM_SDA 9 ITE8512E C EMC1423 P29 +3.3V_RUN 6 5 +3.3V_ALW 2.2K INVERTER P26 2.2K 117 SMBCLK2 2 118 SMBDAT2 3 Media Button P49 D D Title QUANTA COMPUTER SMBUS BLOCK 1 2 3 4 5 6 7 Size Document Number FX6 Date: Tuesday, June 03, 2008 Rev 3A Sheet 58 8 of 70 TH17 H-RE36X107D16X87P2 5 PAD138X98XH PAD158X98XH 1 5 TH13 H-RE36X107D16X87P2 3 3 1 TH6 h-tc197bc216d126p2-v4 5 3 TH32 H-C126D126N 4 5 1 3 5 TH14 h-c236d126p2-v4 2 TH24 h-ts335bc335d126p2-v4 TH9 H-OB166X87D166X87N 1 3 D 5 3 4 4 4 1 4 1 2 1 2 3 TH27 h-tc354bs335d126p2-v4 2 5 2 TH20 h-tc315bc236d126p2-v4 4 4 UMA only. 1 H-TC276BC3 15D110P2 1 1 D TH4 h-tc276bc236d126p2-v4 2 (13) 1 3 TH26 H-O126X158D126X158N H-RE36X107D16X87P2 GND 2 TH31 H-TC216BC236D126P2-V4 1 1 PV2 1 5 TH23 h-c236d126p2-v4 2 PV1 1 1 3 GND 4 2 5 B C166 *0.1U_NC 50 X7R 0603 C194 *0.1U_NC 50 X7R 0603 C224 *0.1U_NC 50 X7R 0603 +CPU_VDD0_RUN +3.3V_RUN +3.3V_RUN +3.3V_ALW C350 *0.1U_NC 10 X7R +3.3V_RUN +3.3V_ALW +3.3V_ALW_R C77 *0.01U_NC 25 X7R C76 *0.01U_NC 25 X7R TH3 h-tc197bc236d126p2-v4 C275 *0.01U_NC 25 X7R 5 3 +PWR_SRC +NB_VCORE C688 *0.1U_NC 50 X7R 0603 C591 *0.1U_NC 50 X7R 0603 C569 *1000P_NC 50 X7R TH28 h-tsbc315d126p2-v4 1 C11 *0.1U_NC 10 X7R h-o71x118d32x79p2 +PWR_SRC TH34 h-o71x118d32x79p2 5 3 4 1 TH29 h-tsbc315d110p2-v4 5 3 TH35 h-o71x118d32x79p2 A Title SCREL HOLE Size B Date: 5 2 TH33 H-TC138BC205D83P2 B +PWR_SRC C725 *0.1U_NC 50 X7R 0603 C255 C395 C387 *0.1U_NC *0.1U_NC *0.1U_NC 10 10 10 X7R X7R X7R +3.3V_RUN +3.3V_ALW_R +1.2V_VDD 2 1 H-TC197BC236D110P2 +CPU_VDD0_RUN C75 *0.01U_NC 25 X7R 4 1 C234 *0.01U_NC 25 X7R +CPU_VDD0_RUN C78 *0.01U_NC 25 X7R 3 4 2 5 +3.3V_RUN C92 *0.01U_NC 25 X7R +PWR_SRC +CPU_VDD0_RUN A +3.3V_RUN C232 *0.01U_NC 25 X7R +3.3V_RUN C262 C367 C349 *0.1U_NC *0.1U_NC *0.1U_NC 10 10 10 X7R X7R X7R +1.2V_AVDD_SATA +1.2V_VDD +1.2V_VDD 3 +CPU_VDD0_RUN C91 *0.01U_NC 25 X7R +CPU_VDD0_RUN 5 4 +PWR_SRC+PWR_SRC+PWR_SRC 3 C 1 C23 *0.1U_NC 10 X7R 5 TH2 H-TC197BC236D110P2-V4 4 C716 *0.1U_NC 10 X7R TH11 H-C276D177P2 2 C631 *0.1U_NC 10 X7R 1 C338 *0.1U_NC 10 X7R 1 +3.3V_ALW +3.3V_RUN C276 *0.1U_NC 10 X7R TH1 h-tc197bc236d126p2-v4 2 +NB_VDD_MUX 1 2 +1.2V_VDD C147 *0.1U_NC 10 X7R TH25 h-tc197bc236d126p2-v4 4 +3.3V_RUN +3.3V_RUN +3.3V_RUN C146 *0.1U_NC 10 X7R 1 1 C265 *0.1U_NC 10 X7R TH10 H-C276D157P2 1 C322 *0.1U_NC 10 X7R +CPU_VDDNB_RUN TH18 H-C276D157P2 1 C189 *0.1U_NC 10 X7R +CPU_VDDNB_RUN TH19 H-C276D157P2 H-C276D177P2 4 H-C276D157P2 +1.8V_SUS +1.8V_SUS +1.8V_SUS +1.8V_SUS C180 *0.1U_NC 10 X7R CPU TH 4 H-C315D 110P2-V4 1 C 3 2 Document Number FX6 Wednesday, June 25, 2008 Rev 3A Sheet 1 59 of 70 A B C D E Change List Item Page# Date T Issue Description Solution Description Rev X00-1 4 1 25 8/13/2007 EE CLK_NB_14MB need resistor to a voltage divider. RS780 voltage level is +1.1V. Chagne R607 from 33 ohm to 158/F, added R637 90.9/F, depop R608 10k for RS780. 2 4 8/13/2007 EE Remove R516 0 ohm reserved resistor for MEMVREF. FX6/GX3 use 1.8V/2 Remove R516 0 ohm. X00-1 3 5,12 8/13/2007 EE CPU_LDT_REQ#R should pull up to +1.8V_SUS. POP R38 and Depop R415. X00-1 X00-1 4 8,51 8/13/2007 EE Connect STRP_DATA to VCORE PWM of NB for Power play. Connect STRP_DATA from U23.B10 to PQ1.2. X00-1 5 13 8/13/2007 EE IDE_RST#/F_RST#/IMC_GPO3 defaults to output driven low. Remove R720 20k. X00-1 6 14 8/13/2007 EE GP16,GP17 for ROM sel. Hepburn connect to EC spi rom. For SB, EC is on LPC bus. Depop R430 and pop R420. For LPC. X00-1 7 14 8/13/2007 EE ATI recommend that AVDD should tie to +3.3V_S5 power rail. Chagne L46 from +3.3V_SUS to +3.3V_ALW. X00-1 8 14 8/13/2007 EE ATI recommend that AZ_RST#, LPCCLK0, LPCCLK1 should pull up to +3.3V_S5 with a 10-k. Chagne R378,R396,R408 from +3.3V_SUS to +3.3V_ALW. X00-1 9 8 8/13/2007 EE S1G2 didn't use DDR_CS2_DIMMA/B# pin. Remove DDR_CS2_DIMMA/B# from CN5,CN6 X00-1 10 08 8/14/2007 EE Follow ATI recommend. Change Q59,Q20 from MMBT3904 to FDV301N and remove R54,R492. X00-2 11 5 8/14/2007 EE Follow ATI recommend. Modify VID table. X00-2 12 16 8/14/2007 EE Remove single net DDR_CS3_DIMMA/B# Remove single net CN5.120,CN6.120 X00-2 13 5 8/14/2007 EE Change the CPU_PWRGD,LDT_STOP#, LDT_RST# from +1.8V_RUN to +1.8V_SUS. Pull-up R193,R180,R184 from +1.8V_RUN to +1.8V_SUS(VDDIO). X00-2 14 5 8/14/2007 EE Follow ATI recommend.CPU pin C2 need pull-down with 0 ohm. Pop R536 0 ohm. X00-2 15 5 8/14/2007 EE To save the space. There is no need to have these resister in Griffin system. Remove R556,R169,R161,R554,R553,R555,R172,R191,R165,R168,R196,R205 X00-2 16 5 8/14/2007 EE Follow ATI.The HDT we have (you have) right now is Purple Possum system. It's 1.8V level design. Pop R213 0 ohm and depop R212,Q35,R216. X00-2 17 5,53 8/14/2007 EE CPU_PWRGD_SVID_REG should be level shifted to 3.3V for the ISL6265. Vih(min) is 2V. Added Q76,R161. X00-2 18 5 8/14/2007 EE Diode D7 blocks a low input to the CPU MEMHOT_L so the circuit would not work as drawn Remove D7 and reserved R159 680 ohm for DDRII thermal IC in the future. X00-2 19 19 8/14/2007 EE HDMI strap is on Hsync.Add 10k-ohm PU (to 3.3V) on VGAHSYNC before buffer U6. Discrete only. Pull up R191 10k ohm to +3.3V_RUN at VGASYNC X00-2 20 8,28 8/14/2007 EE DDC3 is 5V tolerance. There is no need to add level shifters, Discrete only. Remove R18,R19,R22,R30,Q12,Q18. Remove off page HDMI_SCL,HDMI_SDA.Add TP on U23.A8 X00-2 21 39 8/14/2007 EE For LPC connect to WPAN socket: Reserve 0ohm, and NC when PD. Added R720,R763~R766 0 ohm for LPC signals. X00-2 Chagne from X00-1 to X00-2 3 4 3 2 2 Chagne from X00-2 to X00-3 1 22 29 8/15/2007 EE Reserve the caps for any noise coupling issue happening. Depop C338 and close Q37. Added C920 and close EMC1423. X00-3 23 29 8/15/2007 EE Added Q77 2N7002 isolation circuit. Added Q77 instead R406 ohm and change Q42 from +3.3V_SUS to +3.3V_RUN. X00-3 24 X00-3 25 X00-3 26 49 8/15/2007 P FAE Suggetion for OCP setting Change PR97 from 7.15K to 8.45K X00-3 27 52 8/15/2007 P Charge pump from +5V LDO, might cause high ripple voltage Add P112 to reduce ripple voltage X00-3 28 52 8/15/2007 P PR219 no need such hige rating component Change PR219 from 0805 to 0603 and remove one X00-3 PROJECT : Hepburn DOC. NO. : 204 APPROVED BY : Cory Lin REV: CHECKED BY: Cory Lin A QUANTA X00 DRAWN BY : Leo Tseng B DATE : C Aug. 13 , 2007 SHEET 1 OF D COMPUTER 11 E 1 A B C D E Change List Item Page# 4 Date T Issue Description Solution Description Rev 29 52 8/15/2007 P PC474 should populated for filter Populate PC474 X00-3 30 52 8/15/2007 P Reserve feedback circuit for testing Add PR169 and PR218 X00-3 31 28 8/15/2007 EE No need to implement shunt resistors for HDMI on M82S Remove R159,R160,R163,R164 180 ohm. X00-3 32 36 8/15/2007 EE Follow vendor review. Added RC to include more different memory card. Pop C860 270pF and added C921 0.01u, R456 150k. X00-3 33 19,27 8/15/2007 EE Follow M82-S reference schematic. There is double PU for CRT DDC.Remove R522,R519 2.2k and change R520,R486,R521,R485 to 2.2k. X00-3 Discrete only. Discrete only. 4 Chagne from X00-3 to X00-4 34 42 8/16/2007 P Load switch voltage drop is out of spec. Change PQ13 from SI4800BDY to SI4856BDY X00-4 35 42 8/16/2007 P Load switch voltage drop is out of spec. Change PQ29 from SI4800BDY to SI4336DY X00-4 36 42 8/16/2007 P Load switch voltage drop is out of spec. Change PQ20 from SI4800BDY to SI4336DY X00-4 37 5,29 8/16/2007 EE Follow SMSC feedback. Change C341 from 220p to 2200p and depop C212 X00-4 38 15 8/16/2007 EE Follow ATI SB700 checklist. Change C518,C519,C529 to 1uF, C524 to 22uF. X00-4 39 15 8/16/2007 EE Follow ATI SB700 checklist. Change C496,C494,C495,C489 to 2.2uF. X00-4 3 3 EE 40 19 41 29,43,44 42 38 43 Chagne from X00-4 to X00-5 EE Move CLK_VGA_27M_SS to GPIO16 and reserved it for spread spectrum. Reserved R196 0 ohm for EXT CLK GEN. X00-5 8/17/2007 EE Added ESD diode. Added D35,D36,D37,D38 X00-5 8/17/2007 EE Follow ATI SB700 checklist. Change C96,C208 from 0.01u to 0.1u to meet SB700 checklist. X00-5 8 8/20/2007 EE Change VGAH(V)SYNC to INT_VGAH(V)SYNC from PU to PD for disable side prot memry. Discrete only. Depop R497 and pop R500. 44 25 8/20/2007 EE It's no need to reserve 49.9 ohm and change R243,R235 from 47.5 to 0 ohm, depop R236 261/F. Remove 49.9 ohm, change R243,R235 from 47.5 to 0 ohm and depop R236. X00-6 45 25 8/20/2007 EE Follow FAE feedback. Added Decoupling caps for U16's VDDIO. Added Decoupling caps C685,C924~C930 and L93 for U16's VDDIO. X00-6 46 12,20 8/20/2007 EE Follow ATI FAE recommend. Set GPIO to turn on M82 +3.3V_DELAY. Discrete only. Connect GFX_RUN_ON from SB700 pin AC6 to R513. X00-6 47 12,14,18 8/20/2007 EE Follow ATI FAE recommend to change the M82 reset signal for power express. Discrete only. Added R458,R457,D39,D40,R205 for power express. X00-6 48 14 8/20/2007 EE Follow ATI FAE recommend. Change R421,R429 from 10k to 2.2k. X00-6 49 34 8/20/2007 EE Follow BCM FAE recommend to remove external RC termination. Remove (R690~R697 and C794~C797) X00-6 50 33 8/20/2007 EE Follow BCM recommend to add the required grounding for all the package signals and powertermination. Add U29 pin 69 thermal GND pad. X00-6 51 42 8/21/2007 EE Follow Card reader vendor recommend to add PU resistor for IRQ_SERIRQ. 52 41 8/21/2007 EE There is no +3.3V_RTC_LDO power rail. 53 21 8/21/2007 EE Added +1.8V_GFX power rail for M82-S power express 54 51 8/21/2007 P 55 52 8/21/2007 56 54 8/21/2007 8/17/2007 Discrete only. Chagne from X00-5 to X00-6 2 X00-6 2 Chagne from X00-6 to X00-7 Add R267 10K ohm to pull-up +3.3V_RUN. X00-7 Change the +3.3V_RTC_LDO to +3.3V_ALW. X00-7 Change the M82-S +1.8V_RUN to +1.8V_GFX and added +1.8V_GFX power switch. X00-7 Connect thermal pad to AGND Add pin15 to AGND X00-7 P Preserve component for MAX8778 Add PC115 X00-7 P Connect thermal pad to AGND Add pin15 to AGND X00-7 Discrete only. 1 1 PROJECT : Hepburn REV: DOC. NO. : 204 APPROVED BY : Cory Lin DRAWN BY : Leo Tseng CHECKED BY: Cory Lin A QUANTA X00 B DATE : C Sep. 19 , 2007 SHEET 2 OF D COMPUTER 11 E A B C D E Change List Item Page# 4 Date T Issue Description Solution Description Rev 57 55 8/21/2007 P Change feedback resistor for 1.1V output Change PR66 to 63.4K X00-7 58 55 8/21/2007 P Change feedback resistor for +1.1V_GFX_PCIE output Change PR68 to 4.53K X00-7 59 12,35 8/22/2007 EE Change the PCI_PIRQD to PCI_PIRQB. ATI must use INTH#/GPIO36 to control M82-S reset signal. Change the PCI_PIRQD to PCI_PIRQB and move to U31.AC4 X00-8 60 12 8/22/2007 EE ATI use INTH#/GPIO36 (PE_GPIO0) to control M82-S reset signal. Added PE_GPIO0 on U31.AE3 to control M82-S reset. X00-8 61 48 8/22/2007 P Pin define is wrong. Change JABT1 pin define X00-8 62 48 8/22/2007 P Remove AC_OFF function Remove PQ24 X00-8 63 9 8/23/2007 EE Remove resistor for RX780. Remove R490,R42,R84,R32,R63,R112,R119,R131 for RX780. X00-8 64 22 8/23/2007 EE Added level shift on M82-S thermal IC SMBUS2. Added Q88,Q87 and remove R144,R137 0 ohm. X00-8 4 Chagne from X00-7 to X00-8 Discrete only. 65 34 8/23/2007 EE Follow FM6 to modify the +3.3V_LAN power source form +3.3V_ALW to +3.3V_SUS. Depop +3.3V_ALW to +3.3V_LAN switch circuit and added R767 to connect +3.3V_SUS to +3.3V_LAN. X00-8 66 55 8/23/2007 EE We don't use RUNPWROK and use GFX_RUN_ON to turn on GFX power. Remove PR169. X00-8 67 12 8/23/2007 EE Follow ATI checklist. Reserved J13 for Rubuto. Added J13 for Rubuto system. X00-8 68 34 8/23/2007 EE Follow Dell. Change the LED signals. LINKLED connect to G_LED.SPD100LED connect to amber LED. 69 9 8/24/2007 EE Check the CLK GEN vendor (RT&CLG). They don't have PA_RS7X0A1 issue. Remove R29,R33,R37,R34 and connect to GPP_SB_REFCLK directly from CLK GEN SB_SRC CLK. X00-9 70 26 8/24/2007 EE Added OR gate to support backlight from EC and NB. Added U225,C932 and pop R464. X00-9 71 45 8/24/2007 EE Added AND gate in system reset circuit. Remove R204,R209 and added U226,U227. X00-9 72 31,32 8/24/2007 EE Change the audio to IDT STAC9228/92HD73C. Change the audio to IDT STAC9228/92HD73C. X00-9 73 25 8/24/2007 EE Follow RS780 check list to change the ferrite bead for CLK GEN power. Change the L34 ,L93 and added L107,L108 to FBM-11-160808-601A10T X00-9 74 11 8/24/2007 EE Follow RS780 check list. Added C997,C998 1U and change L15 from 4.7U to 1U. X00-9 75 22,26 8/28/2007 EE Added reduce WWAN interference solution. Added C1001~C1008, R835,R836. X00-10 76 42,43 8/28/2007 EE Chagne MEDIA_INT to active low. MEDIA_INT# need pull-up +3.3V_ALW. Move R217 to page 43, pull-up to +3.3V_ALW. Added RC to MEDIA_INT#. X00-10 77 44 8/28/2007 EE Chagne power switch and sniffer switch power rail. Chagne R461,R21 from +RTC_CELL to +3.3V_ALW. X00-10 78 42,53 8/28/2007 EE Chagne CPU_VCORE_PWRGD pull up power rail. Chagne PR35 from +3.3V_ALW to +3.3V_SUS and depop R574. X00-10 3 3 X00-8 Chagne from X00-8 to X00-9 Chagne from X00-9 to X00-10 2 2 79 43 8/28/2007 EE Added the NUM, CAP low active circuit and swap keyboard signals. Added CP7 and Q80,Q82,Q81,Q83,R834,R832. X00-10 80 39 8/28/2007 EE Depop debug board's 0 ohm. Depop debug board's 0 ohm R322,R685,R720,R763,R764,R765,R766 X00-10 81 30 8/28/2007 EE ODD SATA is not need +3.3V_RUN. Remove +3.3V_RUN decoup caps for ODD SATA. Remove R745,R747,R307,R744,R313. X00-10 82 46 8/28/2007 P USB Charger Function Add +5V_ALW to +5V_SUS Load Switch for USB Charger X00-10 83 52 8/28/2007 P USB Charger Function Change +5V_ALW to +5V_ALW2 X00-10 84 52 8/28/2007 P USB Charger Function Change +5V_SUS to +5V_ALW X00-10 85 52 8/28/2007 P USB Charger Function Remove PR213 and PD1 X00-10 1 1 PROJECT : Hepburn REV: DOC. NO. : 204 APPROVED BY : Cory Lin DRAWN BY : Leo Tseng CHECKED BY: Cory Lin A QUANTA X00 B DATE : C Sep. 19 , 2007 SHEET 3 OF D COMPUTER 11 E A B C D E Change List Item Page# 4 Date T Issue Description Solution Description Rev 86 52 8/28/2007 P USB Charger Function Change +3.3V_DL to +5V_DL X00-10 87 51 8/28/2007 P FAE Suggest 237K for 300KHz frequency Change from 178K to 237K X00-10 88 54 8/28/2007 P FAE Suggest 237K for 300KHz frequency Change from 178K to 237K X00-10 89 49 8/28/2008 P FAE Suggest connect to GND Change to connect to GND X00-10 90 49 8/28/2008 EE Follow AMD recomment. Added buffer work around circuit to NB_PWRGD. Added U234 buffer to seperate NB_PWRGD and WD_PWRGD. X00-10 4 Chagne from X00-10 to X00-11 91 25 8/29/2008 EE Added MINI3CLK_REQ#,EXPRESSCARD_REQ# pull-up resistor. Added R837,R859 10k pull up to +3.3V_RUN. X00-11 92 9 8/29/2008 EE pop R495 and remove PANEL_BKEN from RS7800 pop R495 0 ohm and remove R806. X00-11 93 28,44 8/29/2008 EE Add ESD, Choke for Biometric and HDMI. Add ESD3 for Biometric and L109~L112 for HDMI. X00-11 94 24 8/29/2008 EE Follow AMD recomment. Change the voltage level for hybrid IC SEL pin. Change R89 from 0 ohm to 8.2k ohm. X00-11 95 10 8/30/2008 EE Add work around TPS72501 to create 1.35V to RS780 VDDHTTX power rail. RS780 Rev.A11 only. Used TPS72501 to create +1.35V_HT_VCC and added L113 for option. X00-11 96 9 8/30/2008 EE Added PD resistor 2.7k for INT_EN_LCDVDD. Added R863 2.7k for INT_EN_LCDVDD. X00-11 97 10 8/30/2008 EE Follow ATI checklist. Added L114 to reduce noise for VDDPCIE. Added L114 to VDD_PCIE. X00-11 98 46 8/30/2007 P For more suitable RDSON Change to SI4800BDY X00-11 99 48 8/30/2007 P Footprint is not correct Change to new footprint "BAT-200045MR009H577ZR-9P-R-V" X00-11 100 49 8/30/2007 P MPL104S-0R9 is not PSL Change to MPC1040LR88 X00-11 101 52 8/30/2007 P Reserve GPIO for USB Charger Add 5V_ALW_ON GPIO for USB charger enable X00-11 102 52 8/30/2007 P FAE suggest connect to +3.3V_DL Connect to +3.3V_DL X00-11 103 52 8/30/2007 P For Uni material Change to 0.1u/0603 X00-11 104 53 8/30/2007 P MPL73-3R3 is not PSL Change to MPLC0730L3R3 X00-11 105 53 8/30/2007 P FAE Suggest PR43=18K, PR42=100K Change to PR43=18K, PR42=100K X00-11 106 53 8/30/2007 P FAE Suggest PR198=16.2K, PR205=4.02K Change to PR198=16.2K, PR205=4.02K X00-11 107 53 8/30/2007 P FAE Suggest PR199=16.2K, PR200=4.02K Change to PR199=16.2K, PR200=4.02K X00-11 108 54 8/30/2007 P MPL73-4R7 is not PSL Change to MPLC0730L4R7 X00-11 109 54 8/30/2007 P For High=1.0, Low=0.9 Output Change PR207 to 20K/F X00-11 110 55 8/30/2007 P For High=1.0, Low=0.9 Output Change PR64 to 69.8K/F X00-11 111 56 8/30/2007 P For High=1.0, Low=0.9 Output Change PR66 to 22.6K/F X00-11 112 32 8/31/2007 EE Follow ME feedback. Used MIC connector in MB side. Pop J14 and remove M1 X00-12 113 19,20 8/31/2007 EE Follow ATI FAE. Reserved GFX thermal protect function. Added U241,Q98,Q99,R870,R871.R872 X00-12 114 53 9/1/2007 P FAE Suggest to remove sense resistor for saving space Remove PR179, PR180 X00-12 115 53 9/1/2007 P FAE Suggest to remove sense resistor for saving space Remove PR194, PR195 X00-12 3 2 3 2 Chagne from X00-11 to X00-12 1 1 PROJECT : Hepburn REV: DOC. NO. : 204 APPROVED BY : Cory Lin DRAWN BY : Cory Lin CHECKED BY: Cory Lin A QUANTA X00 B DATE : C Sep. 19 , 2007 SHEET 4 OF D COMPUTER 11 E A B C D E Change List Item Page# 4 Date T Issue Description Solution Description Rev 116 55 9/01/2008 P Change to hight rating mosfet for 9.4A Change to FDS8880_NL 117 55 9/01/2008 P Change to hight rating mosfet for 9.4A Change to FDS6676AS_NL 118 55 9/01/2008 P Change to hight rating mosfet for 9.4A Change to SIL104R-1R0 119 47 9/01/2008 P Cancel this function. It's no use. Remove PR74, PQ15 120 29 9/01/2008 EE Follow FAE feedback. Pull up resistor to +3.3V_SUS. Added R877 10k ohm to pull up +3.3V_SUS. 121 36 9/01/2008 EE Follow FAE feedback. Added C1032 270p_NC to SD_CD# Added C1032 270p_NC to CON5 pin 2 SD_CD#. X00-12 122 15 9/01/2008 EE Follow AMD feedback. Change SB700 VDD power rail from +1.2V_RUN to +1.2V_ALW_SUS. Added L90 and connect to +1.2V_ALW_SUS. Depop L39. X00-12 4 X00-12 123 24 9/01/2008 EE Follow AMD feedback. Change R89 from 0 ohm to 8.2k ohm. Change R89 from 0 ohm to 8.2k ohm. X00-12 124 26 9/01/2008 EE Reserved caps for reduce SMBUS1 overshoot and under shoot. Reserved C1011,C1012 47p in J1 pin5,6 X00-12 125 52 9/03/2008 P Reserved for MAX8778 Add PR114 X00-12 126 55 9/03/2008 P Reserved snubber Add PR245, PC211 X00-12 127 42 9/03/2008 EE ITE 8512 FAE concern pin 126,pin 23,pin 4,pin 15 have leakage . Added D43~D46 to U13 pin 126, pin 23, pin 4, pin 15. X00-12 128 5 9/03/2008 EE Follow AMD feedback. Added 2 * MOSFET for CPU_PWRGD_SVID_REG level shift. Added Q100,R881and modify Q76 to gate by CPU_PWRGD. X00-12 129 49,51,54 9/04/2008 P Dell suggest to add 0.1u cap near IC feedback pin to reduce feedback noise. Add 0.1u cap X00-13 130 51 9/04/2008 P FAE suggest to add PR460,PC451 and PQ115 for voltage shift function. Aadd PR460,PC451 and PQ115 for voltage shift function. X00-13 131 19 9/04/2008 EE Follow ATI feedback. Reserved R889 1M for Y2 27Mhz. X00-13 132 42 9/04/2008 EE Added D47 Added D47 to connect WRST# and THERM_STP# X00-13 133 33 9/04/2008 EE Reserved BCM5784M SUPER_IDDQ circuit. Reserved R888 20k ohm. X00-13 134 9,27 9/04/2008 EE Add RS780 CRT I2C function. Connect U13 pin E8,F8 to CRT DDC bus. X00-13 135 9,28 9/04/2008 EE Add RS780 HDMI I2C function. Connect U13 pin A8,B8 to HDMI DDC bus and Added level shift(R886,R887,Q101,Q102) X00-13 136 31 9/05/2008 EE Added R898~R901 to JSPK1. X00-14 137 55 9/05/2008 EE Footprint is different with PL9 sepc. Change PL9 footprint to SIL104. X00-14 138 24 9/05/2008 EE ATI has update power express circuit. Added R890~R897and depop Q3~Q10. X00-14 139 13,39 9/05/2008 EE Added SB_USBP8 to WLAN. Added L115, R902, R903. X00-14 3 3 Chagne from X00-12 to X00-13 2 X00-12 2 Chagne from X00-13 to X00-14 Added 4 * 0 ohm for EMI. Chagne from X00-14 to X00-15 140 X00-15 141 43 9/06/2008 EE Added KB BACKLITE power switch circuit. Added Q104,Q103,C1033,C1034,R190,R907,R908,R909 to option +KB_LED power source. X00-15 142 43 9/06/2008 EE Added TP power rail and change LID_SW# power rail Added C385 and PU to +3.3V_SUS to JP2.5. Change R455 to +3.3V_ALW. X00-15 Chagne from X00-15 to X00-16 1 1 143 9 9/11/2008 EE There is on need pull-up resistor to work around for RS780 A11. Depop R416 X00-16 144 44 9/12/2008 EE There is not work in DC IN LED for SSI build. Depop Q16, Q17, R44, R45 X00-16 PROJECT : Hepburn REV: DOC. NO. : 204 APPROVED BY : Cory Lin DRAWN BY : Leo Tseng CHECKED BY: Cory Lin A QUANTA X00 B DATE : C Sep. 19 , 2007 SHEET 5 OF D COMPUTER 11 E A B C D E Change List Item Page# 9 145 Date T 9/14/2007 EE Issue Description Solution Description Follow ATI FAE feedback. Change the RS780 strap pin. Rev Depop R419 and pop R420. X00-16 Chagne from X00-16 to X01-1 4 4 1 9 10/01/2007 EE Follow ATI FAE feedback. Don't need LDT_STOP#, CPU_LDT_REQ# level shift. Depop the level shift Q52,Q3,R341,R39 and added R637, R638 0 ohm. X01-1 2 9 10/01/2007 EE Follow ATI FAE feedback. Change the RS780 debug strap pin. Added R639 3k ohm to PU +3.3V_RUN and depop the R349. X01-1 3 12 10/26/2007 EE Follow AMD SCL. Depop R694 1M ohm. X01-1 P1 52 10/30/2007 P ALW_PWRGD_3V_5V is dummy net Remove PR178,PR182 and change connect to +3.3V_ALW X01-1 P2 51 10/30/2007 P NB_VCORE will OVP when voltage switch Follow FAE suggestion to put PR178 and PR182 X01-1 P3 47,48 10/30/2007 P +5V_ALW issue when USB charger disabled in S5 Change +5V_ALW to +5V_ALW2 for below terminal PU6.8, PR115,PR22, PD4.1, PD5.1 X01-1 P4 47 10/30/2007 P To solve EE noise made by charger Change charger output Cap 10U/25V from X6S to X5R CAP (PN: CH6104K9207) X01-1 P5 51 10/30/2007 P Change capacitor to resistor for reserve pull low Change PC11 to PR214 X01-1 P6 54 10/30/2007 P 1.2V_ALW_SUS_ON is floating Add a resistor PR215 to pull low X01-1 P7 47,51,52 10/30/2007 P SI4810 EOL Issue Change PQ40,PQ2,PQ22,PQ26 to SI4812 X01-1 P8 51,54 10/30/2007 P To reduce Vo jitter issue Change PC57 and PC86 to 220u/2.5V/ESR15 X01-1 3 2 3 4 10 10/31/2007 EE RS780M change form A11 to A12 and don't need work around. Pop L54 and Depop L55,C488,U20,R381,R382,C491. X01-1 5 13,37,42 10/31/2007 EE Added Express card power enable on SB700. It's for Express card hot plug. Change U30.B8 from USB_OC5# to EXPRCRD_PWREN# and connect to CN2. X01-1 6 28 10/31/2007 EE Follow ANT HDMI detect circuit. Added Q80, and remove R336,D19 X01-1 7 32 10/31/2007 EE Added +3.6V_CAMERA Camera power circuit Added U43,C741,C743,C742,R640,R642.Remove C527. Modify JCAMERA1 pin define and L58 power rail. X01-1 8 38 10/31/2007 EE Added USB charge circuit for leakage. Added Q81,R643,U44,U45. X01-1 9 42 10/31/2007 EE Swap U5.31 NUM_LED# and U5.98 KB_BACKLITE_EN X01-1 10 44 10/31/2007 EE Depop SNIFFER_YELLOW LED circuit. and Swap WIRELESS_ON/OFF#, SNIFFER_PWR_SW# circuit. Depop R377,Q55,Q54,R371 and Swap R376 SNIFFER_PWR_SW#, R313 WIRELESS_ON/OFF# signals X01-1 11 43 10/31/2007 EE Change KB_LED pwoer ciruit. Pop R507, Add Q82 and Depop R513,R512,Q71,Q70,C589,C579,R505 and modify J4 pin define. X01-1 12 9,45 10/31/2007 EE Depop SB700 A11 WD_PWRGD work around circuit. Depop U11,C222,R186 and pop R186,R344 X01-1 13 42 11/01/2007 EE Change GPIO and remove SNIFFER_YELLOW function. Move 5V_ALW_ON to U5.83, Move NUM_LED# to U5.88 and remove R377,Q55,Q54,R371 X01-1 14 5,12 11/01/2007 EE +5V_ALW issue when USB charger disabled in S5 Change R87,R306 from +5V_ALW to +5V_ALW2. Swap U5.31 NUM_LED# and U9.98 KB_BACKLITE_EN 2 Chagne from X01-1 to X01-2 X01-2 15 33,34 11/02/2007 EE Change BCM5787M to BCM5784M. Change BCM5787M to BCM5784M. X01-2 16 31 11/02/2007 EE Change STAC9228 to 92HD73C. Change STAC9228 to 92HD73C. X01-2 17 14 11/05/2007 EE Follow ATI SCL and feedback. Added R644 0 ohm connect U30.C6 TEMP_COMM to GND. X01-2 18 13,39 11/05/2007 EE Change WLAN from USB port 8 to USB port 4. Change WLAN from SB_USBP8+/- to SB_USBP4+/- and Move to U30.B12,U30.A12. X01-2 19 38 11/05/2007 EE Co-lay USB Q-switch and 0 ohm Reserved R645~R648 0 ohm with U44 pin 2,3,5,6,U45 pin 2,3,5,6. X01-2 P1 52 10/30/2007 P ALW_PWRGD_3V_5V is dummy net Remove PR178,PR182 and change connect to +3.3V_ALW X01-2 P2 51 10/30/2007 P NB_VCORE will OVP when voltage switch Follow FAE suggestion to put PR178 and PR182 X01-2 1 1 PROJECT : Hepburn REV: DOC. NO. : 204 APPROVED BY : Cory Lin DRAWN BY : Leo Tseng CHECKED BY: Cory Lin A QUANTA X01 B DATE : C Sep. 19 , 2007 SHEET 6 OF D COMPUTER 11 E A B C D E Change List Item Page# 4 Date T Issue Description Solution Description Rev P3 47,48 10/30/2007 P +5V_ALW issue when USB charger disabled in S5 Change +5V_ALW to +5V_ALW2 for below terminal PU6.8, PR115,PR22, PD4.1, PD5.1 X01-2 P4 47 10/30/2007 P To solve EE noise made by charger Change charger output Cap 10U/25V from X6S to X5R CAP (PN: CH6104K9207) X01-2 P5 51 10/30/2007 P Change capacitor to resistor for reserve pull low Change PC11 to PR214 X01-2 P6 54 10/30/2007 P 1.2V_ALW_SUS_ON is floating Add a resistor PR215 to pull low X01-2 P7 47,51,52 10/30/2007 P SI4810 EOL Issue Change PQ40,PQ2,PQ22,PQ26 to SI4812 X01-2 P8 51,54 10/30/2007 P To reduce Vo jitter issue Change PC57 and PC86 to 220u/2.5V/ESR15 X01-2 P9 46 11/05/2007 P Modify +5V_SUS load switch Remove PQ12 X01-2 P10 53 11/05/2007 P FAE suggest to reserve Add PR241 X01-2 P11 54 11/05/2007 P Modify current limit value Change PR228 from 10K to 5.9K X01-2 11/05/2007 P To solve power good glitch issue Connect IC power to +5V_ALW2 X01-2 P13 49 11/05/2007 P Set tracking discharge mode PR206 populate and PR208 NC X01-2 P14 52 11/05/2007 P 5V_ALW_ON pull low at initial state Add PR218 X01-2 P15 53 11/05/2007 P CPU_VCORE_ENABLE pull low at initial state Add PR219 X01-2 P12 49,51,53,54,55 3 4 3 20 42,44,48 11/06/2007 EE Remove DC IN LED circuit and change signal name DCIN_DETECT_LED# to CHIPSET_ID1. Remove R37,Q10,Q9,R69 and change U5.99 signal name DCIN_DETECT_LED# to CHIPSET_ID1. P16 51,54 11/06/2007 P For space saving. Remove PC2,PC81. X01-2 X01-2 21 42 11/07/2007 EE Add BID1 to EC pin98 Connect R130,R131 to U5.98 X01-2 22 25,42 11/07/2007 EE Remove double pull-up resistor. Remove R107,RP2,R455 X01-2 Chagne from X01-2 to X01-3 2 23 5 11/09/2007 EE Solve glitch from CPU_PWRGD. Added C744 0.1uF on CPU_PWRGD. X01-3 24 14,42 11/09/2007 EE Solve S5 leakage. Connect L38 from +3.3V_ALW to +3.3V_SUS and remove R92 for SIO_SLP_S5#. X01-3 P17 49,51,54 11/12/2007 P Reserve for solving giltch issue caused by IC power rail Add PR220,PR221,PR222,PR223,PR224 X01-3 P18 51 11/12/2007 P Follow AMD FAE suggest +NB_VCORE dynamic voltage design Remove PQ7,PC13,PR19,PR12 X01-3 P19 54 11/12/2007 P To solve jitter issue Change PL2 from 4R7 to 3R3 X01-3 25 43 11/14/2007 EE Follow ANT reference to solve S3 leakage. Change R389,R99,R97,R90 pull-up from +1.8V_SUS to +1.8V_RUN. X01-3 26 12 11/15/2007 EE Solve CPU_PWRGD voltage too low(+1.5V). Change Q36 from MMBT3904 to FDV301N. X01-3 27 42 11/15/2007 EE Check with power team and EC. The charge IC INP pin can be read with EC ADC function. Pop R86 0 ohm and depop R91 0 ohm. X01-3 28 14,33,36,42 11/15/2007 EE Follow XTAL vendor feedback to change the XTAL caps. Change C139, C149 to 18pF. C394 to 27pF. C556 to 22pF, C658, C659 to 12pF X01-3 29 43 11/15/2007 EE Follow Dell recommend. Change R507 0 ohm to FS3. X01-3 30 31,32 11/16/2007 EE Follow IDT recommend to change caps for batter Audio Precision. Change C730, C724, C622, C620 from 1uF to 2.2uF. X01-3 31 5,12 11/16/2007 EE Follow ANT 3.2 reference schematic to remove CPU_PROCHOT# level shift. Remove R441, R436, Q65. X01-3 1 2 1 Chagne from X01-3 to X01-4 32 9 11/19/2007 PROJECT : Hepburn EE Update RS780M symbol. Update U16 symbol. REV: DOC. NO. : 204 APPROVED BY : Cory Lin QUANTA X01 DRAWN BY : Leo Tseng CHECKED BY: Cory Lin A B X01-4 DATE : C Sep. 19 , 2007 SHEET 7 OF D COMPUTER 11 E A B C D E Change List Item Page# 4 Date T Issue Description Solution Description Rev P20 46 11/19/2007 P Reduce RUN/SUS PW switch circuit. Remove PR(89,93,197,200,170,168,68,66) and change PQ(34,51,49,20) to 2N7002W-7-F. P21 46 11/19/2007 P Reduce RUN/SUS PW switch circuit. PC58,PC32,PC43,PC51,PC30,PC36,PC175 from 10U/1206 to 0.1U/0603 X01-4 33 44 11/19/2007 EE Sniffer should be during S5.Dell define our Sniffer switch need to stay 'ON' after the WiFi can be enable. change R313 to +3.3V_ALW. X01-4 34 14 11/19/2007 EE Follow AMD SB700 design guideline to add series resistor. Add R649, R650 4.99 ohm at U39 AD13,AE13 SATA_TX3+/- for ESATA signals. X01-4 35 14 11/20/2007 EE Depop Q-switch function on PT build. Depop Q81,R643,U44,U45 and pop R645~R648. X01-4 P22 47 11/20/2007 P UL schemaitc are going to be replaced by EC control UL schemaitc components are NC X01-4 P23 49 11/20/2007 P Reduce Jitter Change PC183 and PC184 from 330u/ESR15 to 220u/ESR25 X01-4 P24 52 11/20/2007 P PC168 is no use for schematic Remove PC168 X01-4 P25 53 11/20/2007 P To reduce input ripple Add PC190 and PC191 X01-4 P26 X01-4 X01-4 47,48 11/20/2007 P 2nd Source suggest to change Change PD8 to RB500V-40 , PQ4 to FDV301N 36 42 11/21/2007 EE Follow ITE feedback to reserve caps for ITE8512JX. Add C745, R651 to U9 pin 12. X01-4 37 38 11/21/2007 EE Change USB Q-switch power rail from +3.3V_RUN to +3.3V_SUS. Change U44 pin 8, U45 pin 8 from +3.3V_RUN to +3.3V_SUS, Q81 pin2 from RUN_ON to SUS_ON. X01-4 38 33,34 11/21/2007 EE Modify LAN 1000 LED circuit to solve BCM5784M LED issue. Add D36,R774 to solve BCM5784M 1000 LED issue. X01-4 39 28 11/22/2007 EE Change HDMI connector symbol. Change CN3 connector symbol. X01-4 40 28 11/22/2007 EE Remove these 20K ohm resistors because it is for desktop design or codec internal headphone amplifier. Depop R519, R521, R532, and R547. X01-4 41 38 11/22/2007 EE For EMI solution to pop choke. Pop L19,L20 and depop R78, R83,R85,R88. X01-4 42 50 11/23/2007 EE Base on RS780M T13 timing. +1.8V_RUN rise need before then +1.1V_RUN. Change PR62 from 0 ohm to 200k ohm and depop PC41 from 0.01u to 0.1u. X01-4 P27 53 11/24/2007 P EMI Solution Add PC168,PC192,PC193,PC197,PC198,PC199,PC194,PC195,PC196 X01-4 P28 48 11/24/2007 P For ESD protect EMI Suggestion PD6 populate X01-4 43 25 11/23/2007 EE EMI Solution EMI Suggestion C565, C575 populate X01-4 3 2 4 3 44 12 11/23/2007 EE EMI Solution EMI Suggestion C292 populate X01-4 45 32 11/23/2007 EE EMI Solution EMI Suggestion C573,C584,C595,C603 change form 220pF to 470pF. X01-4 46 32 11/23/2007 EE IDT had found out the resonance on portA and suggested change 220pF to 47pF for EMI. Change C621, C609 from 220pF to 47pF. X01-4 47 41 11/26/2007 EE BT1 connector pin define is different before. Change BT1 pin 2 to GND, pin 1 to +RTC. X01-5 48 42 11/26/2007 EE Sniffer power switch needs to wake up EC, when battery only. So it needs to use WUI pin. Swap U5.108 SNIFFER_PWR_SW# and U5.35 WIRELESS_ON/OFF# X01-5 49 36 11/26/2007 EE EMI Solution Add C758~C760 27pF for EMI solution. X01-5 P29 51 11/26/2007 P FAE suggest to reserve RC to slow down voltage switch add the R/C at PQ53 to slow down PQ53 switcher to against OVP, and remove R/C in front of PQ5 X01-5 P30 51,54 11/26/2007 P Got more performance for jitter issue Change PC97 and PC72 from 220u/2.5V/ESR15 to 220u/4V/ESR40 X01-5 50 32 11/26/2007 EE Follow FAE suggest. Change U9 pin 21~25 to NC. X01-5 51 38 11/26/2007 EE EMI Solution Populate ESD3 for EMI suggest. X01-5 52 5 11/26/2007 EE Solve system shut down issue from CPU_THERMTRIP#. Add Q83,Q84,R776,C761 and connect H_THERMTRIP# to 3V, 5V ALW circuit. X01-5 2 Chagne from X01-4 to X01-5 1 1 PROJECT : Hepburn REV: DOC. NO. : 204 APPROVED BY : Cory Lin DRAWN BY : Leo Tseng CHECKED BY: Cory Lin A QUANTA X01 B DATE : C Sep. 19 , 2007 SHEET 8 OF D COMPUTER 11 E A B C D E Change List Item Page# 4 Date T Issue Description Solution Description Rev 53 12 11/28/2007 EE Follow ANT 3.2 schematic. Depop R576, R574. X01-5 54 33 11/28/2007 EE Follow Broadcom FAE feedback. BCM5784M CLKREQ# can't work. Pop R434 ohm and depop R431 4.7k ohm before CLKREQ can work. X01-5 1 5 12/28/2007 EE Follow AMD Griffin sighting Dec 18.pdf to reserve resistor for system hang or shut downboot issue. Add R777,R778 and pop R121 300 ohm resistor for system hang or shut down issue. X02-1 2 43 1/2/2008 EE Change MMB pin 1 power source to 5V_ALW to fix LED flash issue when AC/Bat plug in. Change JP1.1 from +5V_ALW2 to +5V_ALW. X02-1 3 43 1/4/2008 EE Change Num, Cap power rail to +5V_RUN to fix Num, Cap LED flash issue when AC/Bat plug in. Change Q57~Q60, R380, R379 power rail to +5V_RUN. 4 38 1/10/2008 EE Fulfill Reliability team request. Connect JUSB1.8 to USB_BACK_PWR. 4 Chagne from X01-5 to X02-1 X02-1 X02-1 5 43 1/11/2008 EE Avoid system can enter S3 mode but wake up fail problem. Change the lid switch IC power source from 3.3V_SUS to 3.3V_ALW. X02-1 6 32 1/11/2008 EE Change L61 to 22 ohm. It will help DMIC_CLK_L performance. Change L61 to from 0 ohm to 22 ohm. X02-1 X02-1 7 38 1/11/2008 EE Remove USB charge function. Remove R643, Q81, U44, U45, R645~R648. 8 38 1/14/2008 EE Follow AMD AN_SB700AB5. Added re-driver IC to increase signal stress for ESATA. Remove R649,R650 4.99 ohm. Added U50 3211B,R769~R784 0 ohm, C762~C765 0.1u, C766~C769 0.01u. 9 28 1/14/2008 EE Modify HDMI detect circuit. Added Q85,R785,R786. 10 42 1/14/2008 EE Change EC from ITE8512IX to ITE8512JX. The pin12 need connect to 0.1uF, 1uF. Change R651 to C770 0.1u, pop C745 1u for EC ITE8512 rev change. 11 12,14, 1/16/2008 EE Follow DELL recommand to void the PCICLK5 emission issue even AMD solved it in BIOS code Move R232 22 ohm and CLK_PCI_PCCARD signal form PCICLK5 to PCICLK1. X02-1 P1 47 1/21/2008 P Change to X6S material due to not support pulse charge Change PC105, PC99, PC96 and PC108 to X6S material X02-1 P2 51 1/21/2008 P Derating team suggest for WCETPA Change PR10 from 10K ohm to 11.8K ohm. X02-1 P3 52 1/21/2008 P Derating team suggest for WCETPA Change PR188 from 294K ohm to 340K ohm. X02-1 P4 54 1/21/2008 P Derating team suggest for WCETPA Change PR205 from 5.9K ohm to 7.5K ohm. X02-1 12 28 1/29/2008 EE DDC Capacitance over spec 50pf. We will add level shift circuit to reduce Capacitance. 13 15 1/29/2008 EE Follow AMD feedback.IDE and Flash Interface Not Implemented: Decoupling caps not used. Depop C258, C296, C298, C274, C295. X02-2 14 15 1/29/2008 EE Follow AMD SB700 checklist item 1-34, 1-35. Change L35 to BLM21PG221SN1D, C330 to 10U. X02-2 15 9, 13 1/29/2008 EE Follow AMD RS780M item 8-7, SB700 item 7-1, 7-2 checklist to reserve PD resistor. Reserve R787 4.7k ohm and R788, R789 10k ohm. X02-2 16 12 1/30/2008 EE Follow AMD SB700 checklist item 12-4 to depop RP34. Depop RP34 8.2k ohm. X02-2 17 9 1/30/2008 EE Follow AMD SB700 checklist item 24-17. Change PU resistor to 300 ohm. Change R344 4.7k to 300 ohm. X02-2 18 13 1/30/2008 EE Follow AMD SB700 checklist item 24-24. Depop PU resistor. Depop R264 10k ohm. X02-2 19 11 1/30/2008 EE Follow AMD checklist item 17-2, 17-4, 17-6. Depop termination resistors. Depop R343, RP22~RP32 47 ohm. X02-2 20 9 1/30/2008 EE Follow AMD checklist item 18-31. Depop PD resistors. Depop R338 100k ohm. X02-2 21 28 1/30/2008 EE Follow EMI suggest to pop comon mode choke for HDMI. Pop L1~L4 EXC24CG240Uand depop R6, R9, R11, R12, R14, R16, R18, R19 ohm. X02-2 22 28 1/30/2008 EE HDMI test Voltage level fail. Change R317, R321, R325, R326, R330~R333 to 715 ohm. 23 38 1/30/2008 EE Follow EMI suggest to pop comon mode choke for USB. Pop L19, L20 DLP11SN900HL2L. Depop R78, R83, R85, R88 0 ohm. X02-2 24 29 1/30/2008 EE OTP change to 85C.THERM_ALERT#_C and SYS_SHDN# leakage will affect OTP thermal limit. Change OTP resistor to 10k, 6.8k ohm. Add D35 to prevent leakage. X02-2 X02-1 3 3 X02-1 X02-1 Chagne from X02-1 to X02-2 2 Change Q1, Q2 to FDV301N. It will reduce the DDC Capacitance. X02-2 2 X02-2 1 1 PROJECT : Hepburn REV: DOC. NO. : 204 APPROVED BY : Cory Lin DRAWN BY : Leo Tseng CHECKED BY: Cory Lin A QUANTA X01 B DATE : C Sep. 19 , 2007 SHEET 9 OF D COMPUTER 11 E A B C D E Change List Item Page# 4 Date T Issue Description Solution Description Rev 25 27 1/31/2008 EE Follow EMI suggest to pop caps for CRT. Pop C455, C462, C476 22pF and C456, C464, C478, C79, C72 10pF. X02-2 26 9,25 2/1/2008 EE Follow CLK Gen vendor feedback to solve EA fail. Change R146 to 43.2 ohm, R40 to 0 ohm, C50 to 49.9 ohm. X02-2 P5 53 2/1/2008 EE To solve transient response fail Change PC17~PC19, PC21, PC22, PC26. X02-2 27 27 2/1/2008 EE Follow AMD AN_RS780G1.pdf. DAC Output Imbalance. Change R48, R370 to 140 ohm. X02-2 28 42 2/12/2008 EE Use ITE8512 pin 22 detect SB_AZ_CODEC_RST# to mute speaker pop noise. Connect SB_AZ_CODEC_RST# and U5 pin 22. X02-2 29 5 2/12/2008 EE Follow ANT 4.1d. CPU_TEST23_TSTUPD need PD 300 ohm. PD R790 300 ohm for CPU_TEST23_TSTUPD. X02-2 30 43 2/12/2008 EE Add JP1 pin 10 to +3.3V_ALW, let +3.3V_ALW get lower drop voltage on MMB side. Add JP1 pin 10 to +3.3V_ALW. X02-2 P6 50,52 2/13/2008 P Change PU2, PU5 and PU8 VCC power rail to reduce S5 power consumption. Change PJP2.1 to +3.3V_SUS and add PR226~PR229 0 ohm. X02-2 31 38 2/22/2008 EE Pop ESATA re-driver for stress ESATA signals on formal build. Pop C726~C765, U50, depop R781~R784 and change C654, C655, C768, C769 to 0.01u. X02-2 32 31 2/22/2008 EE Dell recommend change caps for IDT AP test on formal build. Change C712, C713 to 6800pF. X02-2 3 4 3 Chagne from X02-2 to A00-1 2 1 42 3/14/2008 EE Chagne board ID for A00. Pop R129 and depop R128. A00-1 P1 53 3/14/2008 P Follow EMI suggest. Pop PC192, PC198, PC195 0.01u and PC193, PC196, PC199 0.1u. A00-1 2 31,32 3/14/2008 EE Need meet WLP4.0 : 1. Add 2.2K-ohm resistors to prevent amplifier clipping. Add R791~R794 2.2k ohm. A00-1 Need meet WLP4.0 : 2. Add 220PF capacitors to allow proper dynamic range measurent. Add C771, C772 220pF and pop C726, C727 to 220pF. A00-1 3 7~11,27,30, 38,45 3/17/2008 EE Follow Safety request. Change USB power control IC location same as FM6 location. Swap U7, U19 and U10, U16 location. U7 and U16 are 2062AD. Swap D33 and D18, R218 and R570 4 38 3/18/2008 EE TI can't finish some necessary legal submission for new 2062AD. Change to old part 2062DR. Change U7, U16 to 2062DR (AL002062005). A00-1 A00-1 5 15,49,50,51 ,52,55 3/18/2008 EE Remove Power Jump for QT build. Remove PJP1~PJP4, PJP6~PJP8, PJP10~PJP13, PJP15~PJP17 and short PJP9. A00-1 6 38 3/18/2008 EE Follow QSMC request to remove USB co-lay 0 ohm. Remove R78, R83, R85, R88 0 ohm. A00-1 7 38 3/18/2008 EE Change the USB Power Jump to short pad fp. Change PJP5, PJP14 fp to SHORT-10A. A00-1 8 42 3/19/2008 EE Follow IT8512JX glitch.doc FA report. Depop 1uF for ITE8512JX pin 12. Depop C745 1uF. A00-1 Add R795 300 ohm. Chagne C95,C96,C654,C655,C766~C769 to 2.2nF and PD U50 pin1, pin10 to GND. A00-1 10 38 3/20/2008 EE Pericom request. Add 300ohm to reduce output swing, change AC caps to 2.2nF and set EQ to GND. 11 14, 43 3/20/2008 EE Follow Dell request. Add LED KB BK detect function. Add R796 100k ohm , PD R797 200k ohm to J4 pin2 and connect to U30 pin G6. A00-1 12 28 3/20/2008 EE Change to FDV301N will pass HDMI 7-12 HDMI detect test. Change Q80 from MM3904 to FDV301N. A00-1 13 59 3/26/2008 EE Follow EMI team request, add two EMI SPRING near sniffer switch area and HDMI connector. Add PV1 near SW1 and PV2 near CN3. A00-1 14 32 3/26/2008 EE Follow IDT request, change 220pF to 270pF will over 80db on DTM. Change C609, C621, C771, C772 from 220pF to 270pF. A00-1 15 36 3/27/2008 EE Follow EMI team request, add a 27p capacitor for 8 in 1 card reader. Pop C760 27pF for EMI. A00-1 P2 48 3/27/2008 EE Follow EMI team request, add two set of 1000pF, 0.01uF, 0.1uF on J8 +DCIN_JACK , -DCIN_JACK. Add PC200~PC202 on J8 +DCINI_JACK, PC203~PC205 on J8 -DCIN_JACK. A00-1 P3 49, 51 3/27/2008 EE Follow EMI team request, pop PR3, PC3 for NB_VCORE and pop PR213, PC188 for +1.8V_SUS 16 5, 42 3/27/2008 EE Use BID1 to control CPU_PROCHOT#. When system need change state to P1 by HTC. 1 2 1 PROJECT : Hepburn REV: DOC. NO. : 204 APPROVED BY : Cory Lin B A00-1 Add Q86 2N7002W-7-F and remove R420 0 ohm for use BID1 to control CPU_PROCHOT#. A00-1 QUANTA A00 DRAWN BY : Leo Tseng CHECKED BY: Cory Lin A pop PR3, PC3 for NB_VCORE and pop PR213, PC188 for +1.8V_SUS DATE : C Mar. 20 , 2008 SHEET 9 OF D COMPUTER 11 E www.s-manuals.com
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