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User Manual: Motherboard Quanta GM7 DAGM7MB1AE0, DAGM7MB1AE1 - Schematics. Free.
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1 2 3 4 5 6 System Block Diagram of GM7 7 POWER REGULATOR CPU VCORE CLOCK SLG8SP585VTR (QFN-32) PG 02 PG 30 +1.05V_RUN DC/DC PG 32 +3.3V_ALW/+5V_ALW/ AC/BATT PG 27 CONNECTOR PG 37 BATT CHARGER CPU/NB (Arranndale) PG 28 GFX UMA RUN POWER SW +5V/+3.3V/+1.8V PG 13 PG 35 PG 36 2 Core 1067/1333 MHz DDR III LVDS conn. DDR3-SODIMM_B0 PG 16 1067/1333 MHz DDR III B PG 34 +1.8V_RUN +3.3V_SUS/+5V_SUS DDR3-SODIMM_A0 PG 33 PG31 SYSTEM RESET CIRCUIT PG 37 A +15V_ALW +1.1V_RUN_VTT USER INTERFACE PG 29 +1.5V_SUS/+0.75V_DDR_VTT A FAN & THERMAL SMSC1422 PG 26 8 B PG 14 (989 PGA) PG 3-6 FDI(ARD) E-Module Bay SATA - ODD PG 23 SATA - HDD0 SATA - HDD1 PG 23 PG 23 LVDS HDMI Level Shifter SN75DP139RGZR PG 18 PCIE[6] (HM57) SATA[4] DB1 Conn. USB[0] PCIE[5] JMicron JMB389 PG 17 HDMI PCIE[6] C Card Reader conn. PG 17 USB[1,2,3] PG 7,8,9,10,11,12 PCIE[7] USB[4,5] USB[4] PG 22 PG 19 19X8 PG 20 USB 3.0 SPI D USB[5] Azalia I/F Keyboard PS/2 Azalia I/F LAN RTL8111EL RJ45 conn. eSATA Redriver SN75LVCP412 E-SATA Combo with USB CONN MINI-CARD WLAN MINI-CARD WWAN AUDIO Codec ALC665 Main SPK Amp MAX9736AETJ+ Main SPK 1.5W*2 Subwoofer Amp MAX9736AETJ+ SPK 3W*1 D Audio Jacks X3 PG 39 Quanta Computer Inc. Project Name: MB Block Diagram Document Number XM2_MB Date: Friday, January 15, 2010 2 3 XM2 Title PG 24 Size 1 C PG 21 Touchpad PG 30 HDMI conn. PG 24 uPD720200F1 FLASH 1Mbyts HDMI Redriver TMDS141 PCIE[3] SPI ROM 8M bytes ITE8502 USB[1] PCIE[1] SPI KBC SATA[4] PCIE[1,3] LPC DB2 USB conn. X3 USB[1,2,3] Conn. DP conn. HDMI PCH USB[8] Bluetooth BTB Conn PG 32 DP Redriver SN75DP120 DMI X 4 SATA[1] SATA[0] SATA[5] DP DP 4 5 6 7 Rev D Sheet of 1 8 40 5 4 3 2 1 U7 +3.3V_RUN L8 40mil BLM21PG600SN1D 805 D +1.5V_RUN +3.3V_CLK_VDD L10 *BLM21PG600SN1D_NC C238 C220 C236 C221 C224 C232 10U 0.1U 0.1U 0.1U 0.1U 0.1U +VDDIO_CLK 805 0805 Reserve for SLG8SP595VTR 0.1uF near the every power pin. +3.3V_RUN 27 CK_PWRGD_R 9 CLK_PCH_14M CLK_PCH_14M R198 10K/J_4 R177 33/J_4 Place the 33 ohm resistors close to the CK 505 1 5 17 24 29 15 18 VDD_USB VDD_LCD VDD_SRC VDD_CPU VDD_REF VDD_SRC_IO VDD_CPU_IO 9 2 8 12 21 26 VSS_SATA VSS_USB VSS_LCD VSS_SRC VSS_CPU VSS_REF CK505 QFN32 CPU_SEL 16 25 30 CPU_STOP# CK_PWRGD/PD#_3.3 REF_0/CPU_SEL XTAL_OUT XTAL_IN 27 28 XOUT XIN 31 32 SDATA SCLK 22,26 EC_SMBDAT2 22,26 EC_SMBCLK2 C CPU-0 CPU-0# 23 22 CPU-1 CPU-1# 20 19 CLK_BUF_BCLKP 9 CLK_BUF_BCLKN 9 D 3 4 CLK_BUF_DREFCLKP CLK_BUF_DREFCLKN SRC-1 SRC-1# 13 14 CLK_BUF_PCIE_3GPLLP 9 CLK_BUF_PCIE_3GPLLN 9 SATA SATA# 10 11 CLK_BUF_DREFSSCLKP CLK_BUF_DREFSSCLKN DOT96T_LPR DOT96C_LPR 27MHz_nonSS 27MHz_SS GND 9 9 9 9 6 7 33 C SLG8SP585VTR Realtek: 0.1uFx3pcs, 22uFx1pcs IDT: 0.1uFx2pcs, 10uFx1pcs CLK_PCH_14M EMI Y2 XTAL_IN *27P_NC C225 1 2 XTAL_OUT +3.3V_RUN +VDDIO_CLK 2 14.318MHZ C231 C237 L9 R206 +1.05V_RUN 1 C219 *10P_NC 50 2 50 BLM21PG600SN1D *0_NC 40mil 805 C229 10U 0805 R205 1 EC_SMBCLK2 C222 *10P_NC 2 EC_SMBDAT2 33P 1 33P 0 C233 0.1U C228 0.1U 0805 0805 SLG,IDT: +1.05V Realtek: +3.3V B Place each 0.1uF cap as close as possible to each VDD IO pin. Place the 10uF caps on the VDD_IO plane. B +VDDIO_CLK: SLG date sheet (V0.2) P15: Min 1.05V,Max3.465V. Realtek date sheet(V1.2) P11: Min 1.05V,Max 3.3V. IDT date sheet(V0.7) P10: Min 0.9975V,Max 3.465V. 2 +3.3V_RUN R174 *4.7K_NC CPU_0 CPU_1 0(default) 133MHz 133MHz 1(0.7V-1.5V) 100MHz 100MHz CPU_SEL 2 1 PIN 30 1 R176 4.7K/J_4 C223 *10P-NC EMI Capacitor CPU_SEL: SLG date sheet (V0.2) P15: High Voltage: Min 0.7V, Max 1.5V. Low Voltage: Min Vss-0.3V, Max 0.35V. Realtek date sheet(V1.2) P11: High Voltage: Min 0.7V, Max 1.5V. Low Voltage: Min Vss-0.3V, Max 0.35V. IDT date sheet(V0.7) P10: High Voltage: Min 0.7V, Max 1.5V. Low Voltage: Min Vss-0.3V, Max 0.35V. A A Quanta Computer Inc. Project Name: GM7B Title Clock Gen Size Document Number GM7B Date: Friday, January 15, 2010 5 4 3 2 Rev D Sheet 1 2 of 40 5 4 3 2 AUBURNDALE/CLARKSFIELD PROCESSOR (DMI,PEG,FDI) 1 AUBURNDALE/CLARKSFIELD PROCESSOR (CLK,MISC,JTAG) U8A DMI_TX[0] DMI_TX[1] DMI_TX[2] DMI_TX[3] 7 7 7 7 7 7 7 7 FDI_TXN0 FDI_TXN1 FDI_TXN2 FDI_TXN3 FDI_TXN4 FDI_TXN5 FDI_TXN6 FDI_TXN7 E22 D21 D19 D18 G21 E19 F21 G18 FDI_TX#[0] FDI_TX#[1] FDI_TX#[2] FDI_TX#[3] FDI_TX#[4] FDI_TX#[5] FDI_TX#[6] FDI_TX#[7] 7 7 7 7 7 7 7 7 FDI_TXP0 FDI_TXP1 FDI_TXP2 FDI_TXP3 FDI_TXP4 FDI_TXP5 FDI_TXP6 FDI_TXP7 D22 C21 D20 C18 G22 E20 F20 G19 FDI_TX[0] FDI_TX[1] FDI_TX[2] FDI_TX[3] FDI_TX[4] FDI_TX[5] FDI_TX[6] FDI_TX[7] 7 FDI_FSYNC0 7 FDI_FSYNC1 F17 E17 FDI_FSYNC[0] FDI_FSYNC[1] 7 FDI_INT C17 FDI_INT 7 FDI_LSYNC0 7 FDI_LSYNC1 F18 D17 FDI_LSYNC[0] FDI_LSYNC[1] PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8] PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15] J35 H34 H33 F35 G33 E34 F32 D34 F33 B33 D31 A32 C30 A28 B29 A30 PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9] PEG_TX#[10] PEG_TX#[11] PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15] L33 M35 M33 M30 L31 K32 M29 J31 K29 H30 H29 F29 E28 D29 D27 C26 PEG_TX[0] PEG_TX[1] PEG_TX[2] PEG_TX[3] PEG_TX[4] PEG_TX[5] PEG_TX[6] PEG_TX[7] PEG_TX[8] PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15] L34 M34 M32 L30 M31 K31 M28 H31 K28 G30 G29 F28 E27 D28 C27 C25 U8B 20 H_COMP3 AT23 COMP3 H_COMP2 AT24 COMP2 H_COMP1 G16 COMP1 H_COMP0 AT26 COMP0 AH24 H_CPUDET# SKTOCC# H_CATERR# AK14 10 CATERR# AT15 H_PECI PECI H_PROCHOT# AN26 10 H_THERM# H_THERM# H_CPURST# 7 PM_SYNC 10 H_CPUPWRGD PM_DRAM_PWRGD 7 PM_DRAM_PWRGD 27 H_VTTPWRGD TP17 9,17,20,21 PLTRST# R75 1.5K 1% PROCHOT# AK15 PLTRST#_R THERMTRIP# AP26 RESET_OBS# AL15 PM_SYNC AN14 VCCPWRGOOD_1 AN27 VCCPWRGOOD_0 AK13 SM_DRAMPWROK AM15 VTTPWRGOOD AM26 TAPPWRGOOD AL14 RSTIN# +3.3V_RUN CLK_CPU_BCLK 10 CLK_CPU_BCLK# 10 D BCLK_ITP BCLK_ITP# PEG_CLK PEG_CLK# E16 D16 CLK_PCIE_3GPLL 9 CLK_PCIE_3GPLL# 9 DPLL_REF_SSCLK DPLL_REF_SSCLK# A18 A17 CLK_BUF_SSCLK 9 CLK_BUF_SSCLK# 9 TP43 TP44 F6 DDR3_DRAMRST#_R SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2] AL1 AM1 AN1 SM_RCOMP_0 SM_RCOMP_1 SM_RCOMP_2 PM_EXT_TS#[0] PM_EXT_TS#[1] AN15 AP15 SM_DRAMRST# +1.05V_RUN_VTT R79 2 R77 2 R80 R78 PRDY# PREQ# AT28 AP27 TP41 TP14 TCK TMS TRST# AN28 AP28 AT27 TP15 TP16 XDP_TRST# TDI TDO TDI_M TDO_M AT29 AR27 AR29 AP29 XDP_TDI_M XDP_TDO_M DBR# AN25 H_DBR#_R BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7] AJ22 AK22 AK24 AJ24 AJ25 AH22 AK23 AH23 0 0 1 10K 1 10K PM_EXTTS#0 13 PM_EXTTS#1 14 R76 *12.4K/F_NC TP40 TP42 R90 0 C TP10 TP11 TP8 TP5 TP4 TP7 TP6 TP9 JTAG MAPPING PM_THRMTRIP# 33 +3.3V_RUN R104 10M 3 2 SM_RCOMP_2 1 Q21 MMST3904-7-F 2 H_THERM# 2 DDR3 Compensation Signals Processor Compensation Signals Q22 2N7002W-7-F H_DBR#_R R86 1K XDP_TRST# R271 51/F B 1 B +1.05V_RUN_VTT A16 B16 AR30 AT30 PZ98927-3641-01F R74 750 1% PZ98927-3641-01F Processor Pullups BCLK BCLK# CLOCKS D25 F24 E23 G23 750 DDR3 MISC DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3 49.9/F R229 JTAG & BPM 7 7 7 7 R228 3 DMI_TX#[0] DMI_TX#[1] DMI_TX#[2] DMI_TX#[3] PEG_COMP C183 0.1U 16 1 DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3 PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8] PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15] K35 J34 J33 G35 G32 F34 F31 D35 E33 C33 D32 B32 C31 B28 B30 A31 PCI EXPRESS -- GRAPHICS 7 7 7 7 D24 G24 F23 H23 DMI_RX[0] DMI_RX[1] DMI_RX[2] DMI_RX[3] B26 A26 B27 A25 PWR MANAGEMENT B24 D23 B23 A22 PEG_ICOMPI PEG_ICOMPO PEG_RCOMPO PEG_RBIAS THERMAL DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3 Intel(R) FDI 7 7 7 7 DMI_RX#[0] DMI_RX#[1] DMI_RX#[2] DMI_RX#[3] DMI C DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3 MISC D 7 7 7 7 A24 C23 B22 A21 H_COMP0 SM_RCOMP_1 H_COMP1 SM_RCOMP_0 R54 49.9 1% R89 49.9 1% R88 *68_NC H_COMP2 H_COMP3 H_CATERR# R272 49.9 1% H_PROCHOT# R38 49.9 1% R274 20 1% R276 130 1% R275 20 1% R277 24.9 1% Layout Note: Place these resistors near Processor R278 100 1% H_CPURST# S3 Power reduce S3 Power reduce +1.5V_SUS +1.5V_SUS_CPU R36 *0_NC +3.3V_ALW R37 1K Q14 BSS138-7-F DDR3_DRAMRST#_R 5 R82 *1.1K/F_NC PM_DRAM_PWRGD R84 1.5K/F 2 4 1.5V_DDR_PWRGD 1 3 A DDR3_DRAMRST# 13,14 30 2 A U5 74AHC1G08GW Quanta Computer Inc. 2 R35 100K RST_GATE 10 2 1 R83 750/F 1 3 1 Use a voltage divider with VDDQ (1.5V) rail (ON in S3) and resistor combination of 4.75K (to VDDQ)/12K(to GND) to generate the required voltage. Note: CRB uses a 3.3V (always ON) rail with 2K and 1K combination. Project Name: C40 0.047U CPU 1/4(PEG_DMI) Size Document Number XM2_MB Rev D Date: Friday, January 15, 2010 5 4 3 XM2 Title 10 2 Sheet 1 3 of 40 5 4 3 2 1 AUBURNDALE/CLARKSFIELD PROCESSOR (DDR3) U8D D C 13 13 13 B 13 13 13 M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63 M_A_BS#0 M_A_BS#1 M_A_BS#2 M_A_CAS# M_A_RAS# M_A_WE# A10 C10 C7 A7 B10 D10 E10 A8 D8 F10 E6 F7 E9 B7 E7 C6 H10 G8 K7 J8 G7 G10 J7 J10 L7 M6 M8 L9 L6 K8 N8 P9 AH5 AF5 AK6 AK7 AF6 AG5 AJ7 AJ6 AJ10 AJ9 AL10 AK12 AK8 AL7 AK11 AL8 AN8 AM10 AR11 AL11 AM9 AN9 AT11 AP12 AM12 AN12 AM13 AT14 AT12 AL13 AR14 AP14 SA_DQ[0] SA_DQ[1] SA_DQ[2] SA_DQ[3] SA_DQ[4] SA_DQ[5] SA_DQ[6] SA_DQ[7] SA_DQ[8] SA_DQ[9] SA_DQ[10] SA_DQ[11] SA_DQ[12] SA_DQ[13] SA_DQ[14] SA_DQ[15] SA_DQ[16] SA_DQ[17] SA_DQ[18] SA_DQ[19] SA_DQ[20] SA_DQ[21] SA_DQ[22] SA_DQ[23] SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63] AC3 AB2 U7 SA_BS[0] SA_BS[1] SA_BS[2] AE1 AB3 AE9 SA_CAS# SA_RAS# SA_WE# 14 M_B_DQ[63:0] SA_CK[0] SA_CK#[0] SA_CKE[0] AA6 AA7 P7 M_A_CLK0 13 M_A_CLK0# 13 M_A_CKE0 13 SA_CK[1] SA_CK#[1] SA_CKE[1] Y6 Y5 P6 M_A_CLK1 13 M_A_CLK1# 13 M_A_CKE1 13 SA_CS#[0] SA_CS#[1] AE2 AE8 M_A_CS#0 13 M_A_CS#1 13 SA_ODT[0] SA_ODT[1] AD8 AF9 M_A_ODT0 13 M_A_ODT1 13 SA_DM[0] SA_DM[1] SA_DM[2] SA_DM[3] SA_DM[4] SA_DM[5] SA_DM[6] SA_DM[7] B9 D7 H7 M7 AG6 AM7 AN10 AN13 M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7 SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7] C9 F8 J9 N9 AH7 AK9 AP11 AT13 M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7 SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7] C8 F9 H9 M9 AH8 AK10 AN11 AR13 M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7 SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8] SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15] Y3 W1 AA8 AA3 V1 AA9 V8 T1 Y9 U6 AD4 T2 U3 AG8 T3 V9 M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15 M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63 M_A_DM[7:0] 13 M_A_DQS#[7:0] 13 M_A_DQS[7:0] 13 M_A_A[15:0] 13 14 14 14 14 14 14 M_B_BS#0 M_B_BS#1 M_B_BS#2 M_B_CAS# M_B_RAS# M_B_WE# B5 A5 C3 B3 E4 A6 A4 C4 D1 D2 F2 F1 C2 F5 F3 G4 H6 G2 J6 J3 G1 G5 J2 J1 J5 K2 L3 M1 K5 K4 M4 N5 AF3 AG1 AJ3 AK1 AG4 AG3 AJ4 AH4 AK3 AK4 AM6 AN2 AK5 AK2 AM4 AM3 AP3 AN5 AT4 AN6 AN4 AN3 AT5 AT6 AN7 AP6 AP8 AT9 AT7 AP9 AR10 AT10 SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63] AB1 W5 R7 SB_BS[0] SB_BS[1] SB_BS[2] AC5 Y7 AC6 SB_CAS# SB_RAS# SB_WE# DDR SYSTEM MEMORY - B 13 M_A_DQ[63:0] DDR SYSTEM MEMORY A U8C SB_CK[0] SB_CK#[0] SB_CKE[0] W8 W9 M3 M_B_CLK0 14 M_B_CLK0# 14 M_B_CKE0 14 SB_CK[1] SB_CK#[1] SB_CKE[1] V7 V6 M2 M_B_CLK1 14 M_B_CLK1# 14 M_B_CKE1 14 SB_CS#[0] SB_CS#[1] AB8 AD6 M_B_CS#0 14 M_B_CS#1 14 SB_ODT[0] SB_ODT[1] AC7 AD1 M_B_ODT0 14 M_B_ODT1 14 SB_DM[0] SB_DM[1] SB_DM[2] SB_DM[3] SB_DM[4] SB_DM[5] SB_DM[6] SB_DM[7] D4 E1 H3 K1 AH1 AL2 AR4 AT8 M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7 SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7] D5 F4 J4 L4 AH2 AL4 AR5 AR8 M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7 SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7] C5 E3 H4 M5 AG2 AL5 AP5 AR7 M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8] SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15] U5 V2 T5 V3 R1 T8 R2 R6 R4 R5 AB5 P3 R3 AF7 P5 N1 M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15 D M_B_DM[7:0] 14 M_B_DQS#[7:0] 14 C M_B_DQS[7:0] 14 M_B_A[15:0] 14 B PZ98927-3641-01F PZ98927-3641-01F A A Quanta Computer Inc. Project Name: XM2 Title CPU 2/4(DDR) Size Document Number XM2_MB Rev D Date: Friday, January 15, 2010 5 4 3 2 Sheet 1 4 of 40 3 C300 10U C28 10U C108 *10U_NC C299 10U U8G C327 *10U_NC +VCC_GFX_CORE C123 10U/6.3V 0805 C295 22U C313 22U C63 22U C352 10U/6.3V 0805 C103 22U + C347 330U/2.5V 7343 C69 22U C344 22U/6.3V 0805 C134 22U/6.3V 0805 AT21 AT19 AT18 AT16 AR21 AR19 AR18 AR16 AP21 AP19 AP18 AP16 AN21 AN19 AN18 AN16 AM21 AM19 AM18 AM16 AL21 AL19 AL18 AL16 AK21 AK19 AK18 AK16 AJ21 AJ19 AJ18 AJ16 AH21 AH19 AH18 AH16 VAXG1 VAXG2 VAXG3 VAXG4 VAXG5 VAXG6 VAXG7 VAXG8 VAXG9 VAXG10 VAXG11 VAXG12 VAXG13 VAXG14 VAXG15 VAXG16 VAXG17 VAXG18 VAXG19 VAXG20 VAXG21 VAXG22 VAXG23 VAXG24 VAXG25 VAXG26 VAXG27 VAXG28 VAXG29 VAXG30 VAXG31 VAXG32 VAXG33 VAXG34 VAXG35 VAXG36 C296 22U AR22 AT22 VCC_AXG_SENSE 34 VSS_AXG_SENSE 34 GFX_VID[0] GFX_VID[1] GFX_VID[2] GFX_VID[3] GFX_VID[4] GFX_VID[5] GFX_VID[6] AM22 AP22 AN22 AP23 AM23 AP24 AN24 GFX_VID0 GFX_VID1 GFX_VID2 GFX_VID3 GFX_VID4 GFX_VID5 GFX_VID6 GFX_VR_EN GFX_DPRSLPVR GFX_IMON AR25 AT25 AM24 D 34 34 34 34 34 34 34 R273 4.7K GFX_EN 34 GFX_IMON 34 R71 *1K_NC +1.5V_SUS_CPU +VCC_CORE +1.05V_RUN_VTT J24 J23 H25 VAXG_SENSE VSSAXG_SENSE VTT1_45 VTT1_46 VTT1_47 - 1.5V RAILS C303 10U C33 10U SENSE LINES AF10 AE10 AC10 AB10 Y10 W10 U10 T10 J12 J11 J16 J15 C298 10U DDR3 1.1V RAIL POWER VTT0_33 VTT0_34 VTT0_35 VTT0_36 VTT0_37 VTT0_38 VTT0_39 VTT0_40 VTT0_41 VTT0_42 VTT0_43 VTT0_44 C302 10U FDI AH14 AH12 AH11 AH10 J14 J13 H14 H12 G14 G13 G12 G11 F14 F13 F12 F11 E14 E12 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11 GRAPHICS VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18 AJ1 AF1 AE7 AE4 AC1 AB7 AB4 Y1 W7 W4 U1 T7 T4 P1 N7 N4 L1 H1 C112 1U C55 1U C62 1U C113 1U C49 1U + C83 330U 7343 2.5 C101 22U C72 22U C97 22U C76 22U C98 22U C310 22U C329 22U C315 22U C319 22U C325 22U C326 22U C309 22U S3 Power reduce C106 22U C109 22U C +1.05V_RUN_VTT C307 22U VTT0_59 VTT0_60 VTT0_61 VTT0_62 P10 N10 L10 K10 VTT1_63 VTT1_64 VTT1_65 VTT1_66 VTT1_67 VTT1_68 J22 J20 J18 H21 H20 H19 VCCPLL1 VCCPLL2 VCCPLL3 L26 L27 M26 C79 10U C323 22U C318 22U C324 22U C328 22U C308 22U C75 22U C316 22U C314 22U C321 22U C311 22U C312 22U C73 22U C74 22U C99 22U C100 22U C102 22U C104 10U +1.05V_RUN_VTT AN33 H_PSI# VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6] PROC_DPRSLPVR AK35 AK33 AK34 AL35 AL33 AM33 AM35 AM34 VID0 VID1 VID2 VID3 VID4 VID5 VID6 PM_DPRSLPVR_R VTT_SELECT G15 H_PSI# 29 VID0 VID1 VID2 VID3 VID4 VID5 VID6 29 29 29 29 29 29 29 C32 22U R175 0 C80 22U C95 22U DPRSLPVR C297 22U 1.1V VTT1_48 VTT1_49 VTT1_50 VTT1_51 VTT1_52 VTT1_53 VTT1_54 VTT1_55 VTT1_56 VTT1_57 VTT1_58 C306 22U C330 22U +1.8V_RUN 1.8V PSI# DPRSLPVR 29 C305 *10U_NC C57 1U C56 1U C52 2.2U C58 4.7U C78 *10U_NC C89 *10U_NC C77 *10U_NC C66 22U TP3 PZ98927-3641-01F +VCC_CORE 1 B AN35 VCC_SENSE VSS_SENSE AJ34 AJ35 I_MON 29 +1.5V_SUS_CPU 2 A VCCSENSE 29 VSSSENSE 29 R41 B R211 1K R55 100 1% R207 1K R203 *1K_NC R201 *1K_NC R199 1K R195 *1K_NC R186 1K R190 *1K_NC R47 4 Q17 FDMS7670 0 PS_S3CNTRL_S 7 C105 0.1U 16 PS_S3CNTRL 7,13,30 2 Note: Place A and B near CPU Route VCCSENSE and VSSENSE trace at 27.4 ohms, 7 mils spacing. R209 1K VID0 VID1 VID2 VID3 VID4 VID5 VID6 DPRSLPVR H_PSI# 2 VTT_SENSE 31 VSS_SENSE_VTT 31 3 2 1 B15 A15 +1.5V_SUS *0_NC 9 8 7 6 5 1 VTT_SENSE VSS_SENSE_VTT S3 Power reduce +1.05V_RUN_VTT 1 ISENSE R57 100 1% 2 POWER CPU VIDS +1.05V_RUN_VTT K26 J27 J26 J25 H27 G28 G27 G26 F26 E26 E25 PEG & DMI B CPU CORE SUPPLY C VTT0_1 VTT0_2 VTT0_3 VTT0_4 VTT0_5 VTT0_6 VTT0_7 VTT0_8 VTT0_9 VTT0_10 VTT0_11 VTT0_12 VTT0_13 VTT0_14 VTT0_15 VTT0_16 VTT0_17 VTT0_18 VTT0_19 VTT0_20 VTT0_21 VTT0_22 VTT0_23 VTT0_24 VTT0_25 VTT0_26 VTT0_27 VTT0_28 VTT0_29 VTT0_30 VTT0_31 VTT0_32 +1.05V_RUN_VTT SENSE LINES D VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 VCC50 VCC51 VCC52 VCC53 VCC54 VCC55 VCC56 VCC57 VCC58 VCC59 VCC60 VCC61 VCC62 VCC63 VCC64 VCC65 VCC66 VCC67 VCC68 VCC69 VCC70 VCC71 VCC72 VCC73 VCC74 VCC75 VCC76 VCC77 VCC78 VCC79 VCC80 VCC81 VCC82 VCC83 VCC84 VCC85 VCC86 VCC87 VCC88 VCC89 VCC90 VCC91 VCC92 VCC93 VCC94 VCC95 VCC96 VCC97 VCC98 VCC99 VCC100 1 AUBURNDALE/CLARKSFIELD PROCESSOR (GRAPHICS POWER) +1.05V_RUN_VTT +VCC_CORE AG35 AG34 AG33 AG32 AG31 AG30 AG29 AG28 AG27 AG26 AF35 AF34 AF33 AF32 AF31 AF30 AF29 AF28 AF27 AF26 AD35 AD34 AD33 AD32 AD31 AD30 AD29 AD28 AD27 AD26 AC35 AC34 AC33 AC32 AC31 AC30 AC29 AC28 AC27 AC26 AA35 AA34 AA33 AA32 AA31 AA30 AA29 AA28 AA27 AA26 Y35 Y34 Y33 Y32 Y31 Y30 Y29 Y28 Y27 Y26 V35 V34 V33 V32 V31 V30 V29 V28 V27 V26 U35 U34 U33 U32 U31 U30 U29 U28 U27 U26 R35 R34 R33 R32 R31 R30 R29 R28 R27 R26 P35 P34 P33 P32 P31 P30 P29 P28 P27 P26 2 GRAPHICS VIDs CPU Core Power 4 POWER 5 U8F R212 *1K_NC R210 *1K_NC R208 *1K_NC R204 1K R202 1K R200 *1K_NC R196 1K R187 *1K_NC R191 1K R56 1 220 3 2 1 PZ98927-3641-01F AUBURNDALE PROCESSOR (POWER) Q19 BSS138-7-F Note: For Validating IMVP VR R483 should be STUFF and R2N1 NO_STUFF A A +1.5V_SUS_CPU +1.5V_SUS C68 1 2 0.1U C53 1 2 0.1U C61 1 2 0.1U C64 1 2 0.1U Quanta Computer Inc. Project Name: CPU 3/4(POWER) Size Document Number XM2_MB Rev D Date: Friday, January 15, 2010 5 4 3 2 XM2 Title Sheet 1 5 of 40 5 4 3 AUBURNDALE/CLARKSFIELD PROCESSOR (GND) C U8I VSS VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE6 AD10 AC8 AC4 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 AB6 AA10 Y8 Y4 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 W6 V10 U8 U4 U2 T35 T34 T33 T32 T31 T30 T29 T28 T27 T26 T6 R10 P8 P4 P2 N35 N34 N33 N32 N31 N30 N29 N28 N27 N26 N6 M10 L35 L32 L29 L8 L5 L2 K34 K33 K30 K27 K9 K6 K3 J32 J30 J21 J19 H35 H32 H28 H26 H24 H22 H18 H15 H13 H11 H8 H5 H2 G34 G31 G20 G9 G6 G3 F30 F27 F25 F22 F19 F16 E35 E32 E29 E24 E21 E18 E13 E11 E8 E5 E2 D33 D30 D26 D9 D6 D3 C34 C32 C29 C28 C24 C22 C20 C19 C16 B31 B25 B21 B18 B17 B13 B11 B8 B6 B4 A29 A27 A23 A9 1 U8E VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191 VSS192 VSS193 VSS194 VSS195 VSS196 VSS197 VSS198 VSS199 VSS200 VSS201 VSS202 VSS203 VSS204 VSS205 VSS206 VSS207 VSS208 VSS209 VSS210 VSS211 VSS212 VSS213 VSS214 VSS215 VSS216 VSS217 VSS218 VSS219 VSS220 VSS221 VSS222 VSS223 VSS224 VSS225 VSS226 VSS227 VSS228 VSS229 VSS230 VSS231 VSS232 VSS233 AP25 AL25 AL24 AL22 AJ33 AG9 M27 L28 J17 H17 G25 G17 E31 E30 TP2 TP1 CFG0 CFG3 CFG4 CFG7 VSS VSS_NCTF1 VSS_NCTF2 VSS_NCTF3 VSS_NCTF4 VSS_NCTF5 VSS_NCTF6 VSS_NCTF7 AT35 AT1 AR34 B34 B2 B1 A35 TP38 TP33 TP32 TP30 TP31 AM30 AM28 AP31 AL32 AL30 AM31 AN29 AM32 AK32 AK31 AK28 AJ28 AN30 AN32 AJ32 AJ29 AJ30 AK30 H16 RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 RSVD6 RSVD7 RSVD8 SA_DIMM_VREF SB_DIMM_VREF RSVD11 RSVD12 RSVD13 RSVD14 CFG[0] CFG[1] CFG[2] CFG[3] CFG[4] CFG[5] CFG[6] CFG[7] CFG[8] CFG[9] CFG[10] CFG[11] CFG[12] CFG[13] CFG[14] CFG[15] CFG[16] CFG[17] RSVD_TP_86 B19 A19 RSVD15 RSVD16 A20 B20 RSVD17 RSVD18 U9 T9 RSVD19 RSVD20 AC9 AB9 RSVD21 RSVD22 C1 A3 RSVD_NCTF_23 RSVD_NCTF_24 J29 J28 RSVD26 RSVD27 A34 A33 RSVD_NCTF_28 RSVD_NCTF_29 C35 B35 RSVD_NCTF_30 RSVD_NCTF_31 RSVD32 RSVD33 AJ13 AJ12 RSVD34 RSVD35 AH25 AK26 RSVD36 RSVD_NCTF_37 AL26 AR2 RSVD38 RSVD39 AJ26 AJ27 D RESERVED D VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 NCTF U8H AT20 AT17 AR31 AR28 AR26 AR24 AR23 AR20 AR17 AR15 AR12 AR9 AR6 AR3 AP20 AP17 AP13 AP10 AP7 AP4 AP2 AN34 AN31 AN23 AN20 AN17 AM29 AM27 AM25 AM20 AM17 AM14 AM11 AM8 AM5 AM2 AL34 AL31 AL23 AL20 AL17 AL12 AL9 AL6 AL3 AK29 AK27 AK25 AK20 AK17 AJ31 AJ23 AJ20 AJ17 AJ14 AJ11 AJ8 AJ5 AJ2 AH35 AH34 AH33 AH32 AH31 AH30 AH29 AH28 AH27 AH26 AH20 AH17 AH13 AH9 AH6 AH3 AG10 AF8 AF4 AF2 AE35 2 AUBURNDALE/CLARKSFIELD PROCESSOR( RESERVED, CFG) RSVD_NCTF_40 RSVD_NCTF_41 AP1 AT2 RSVD_NCTF_42 RSVD_NCTF_43 AT3 AR1 RSVD45 RSVD46 RSVD47 RSVD48 RSVD49 RSVD50 RSVD51 RSVD52 RSVD53 RSVD_NCTF_54 RSVD_NCTF_55 RSVD_NCTF_56 RSVD_NCTF_57 RSVD58 AL28 AL29 AP30 AP32 AL27 AT31 AT32 AP33 AR33 AT33 AT34 AP35 AR35 AR32 RSVD_TP_59 RSVD_TP_60 KEY RSVD62 RSVD63 RSVD64 RSVD65 E15 F15 A2 D15 C15 AJ15 AH15 TP12 TP13 C SA_CK[2] SA_CK#[2] SA_CKE[2] SA_CS#[2] SA_ODT[2] SA_CK[3] SA_CK#[3] SA_CKE[3] SA_CS#[3] SA_ODT[3] AA5 AA4 R8 AD3 AD2 AA2 AA1 R9 AG7 AE3 SB_CK[2] SB_CK#[2] SB_CKE[2] SB_CS#[2] SB_ODT[2] SB_CK[3] SB_CK#[3] SB_CKE[3] SB_CS#[3] SB_ODT[3] V4 V5 N2 AD5 AD7 W3 W2 N3 AE5 AD9 VSS AP34 TP39 PZ98927-3641-01F PZ98927-3641-01F PZ98927-3641-01F B B 1 The Clarkfield processor's PCI Express interface may not meet PCI Express 2.0 jitter specifications. Intel recommends placing a 3.01K +/- 5% pull down resistor to VSS on CFG[7] pin for both rPGA and BGA components. This pull down resistor should be removed when this issue is fixed. CFG4 R63 *3.01K_NC CFG0 R66 *3.01K_NC CFG3 R58 *3.01K_NC CFG7 R60 *3.01K_NC CFG4 (Display Port Presence) CFG0 (PCI-Epress Configuration Select) CFG3 (PCI-Epress Static Lane Reversal) CFG7 Clarksfield (only for early samples pre-ES1) 0 Disabled; No Physical Display Port attached to Embedded Diplay Port Enabled; An external Display port device is connected to the Embedded Display port Bifurcation enabled Single PEG Normal Operation Common motherboard design Lane Numbers Reversed For early samples pre-ES1 CFD A A Quanta Computer Inc. Project Name: XM2 Title CPU 4/4( GND_RESV) Size Document Number XM2_MB Rev D Date: Friday, January 15, 2010 5 4 3 2 Sheet 1 6 of 40 5 4 3 2 1 IBEX PEAK-M (DMI,FDI,GPIO) IBEX PEAK-M (LVDS,DDI) U16C 3 3 3 3 DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3 BD22 BH21 BC20 BD18 DMI0TXP DMI1TXP DMI2TXP DMI3TXP R91 +1.05V_RUN 49.9 DMI_COMP BF25 1% DMI_ZCOMP FDI DMI BH25 FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6 FDI_RXP7 BB18 BF17 BC16 BG16 AW16 BD14 BB14 BD12 FDI_TXP0 FDI_TXP1 FDI_TXP2 FDI_TXP3 FDI_TXP4 FDI_TXP5 FDI_TXP6 FDI_TXP7 3 3 3 3 3 3 3 3 U16D 16 BIA_PWM FDI_INT BJ14 FDI_INT 3 BF13 FDI_FSYNC0 3 FDI_FSYNC1 BH13 FDI_FSYNC1 3 FDI_LSYNC0 BJ12 FDI_LSYNC0 3 FDI_LSYNC1 BG14 FDI_LSYNC1 3 L_DDC_CLK L_DDC_DATA L_CTRL_CLK L_CTRL_DATA AB46 V48 L_CTRL_CLK L_CTRL_DATA AP39 AP41 LVD_IBG LVD_VBG AT43 AT42 LVD_VREFH LVD_VREFL 16 INT_TXLCLKOUTN 16 INT_TXLCLKOUTP AV53 AV51 LVDSA_CLK# LVDSA_CLK 16 INT_TXLOUTN0 16 INT_TXLOUTN1 16 INT_TXLOUTN2 T2 PAD INT_TXLOUTN3 BB47 BA52 AY48 AV47 LVDSA_DATA#0 LVDSA_DATA#1 LVDSA_DATA#2 LVDSA_DATA#3 INT_TXLOUTP3 BB48 BA50 AY49 AV48 LVDSA_DATA0 LVDSA_DATA1 LVDSA_DATA2 LVDSA_DATA3 WAKE# M6 SYS_PWROK CLKRUN# / GPIO32 R133 0 SYS_PWROK_R R168 0 PWROK R184 0 MEPWROK B17 K5 MEPWROK PCH_LAN_RST# A10 LAN_RST# PCH_RSMRST# C16 D9 3 PM_DRAM_PWRGD 20 PCH_RSMRST# PWROK 20 SUS_PWR_ACK 20 SIO_PWRBTN# 20 AC_PRESENT PM_BATLOW# PM_RI# DRAMPWROK RSMRST# J12 PCIE_WAKE# 16 INT_TXUCLKOUTN 16 INT_TXUCLKOUTP AP48 AP47 LVDSB_CLK# LVDSB_CLK 16 INT_TXUOUTN0 16 INT_TXUOUTN1 16 INT_TXUOUTN2 T12 PAD INT_TXUOUTN3 AY53 AT49 AU52 AT53 LVDSB_DATA#0 LVDSB_DATA#1 LVDSB_DATA#2 LVDSB_DATA#3 INT_TXUOUTP3 AY51 AT48 AU50 AT51 LVDSB_DATA0 LVDSB_DATA1 LVDSB_DATA2 LVDSB_DATA3 AA52 AB53 AD53 CRT_BLUE CRT_GREEN CRT_RED PAD Y1 CLKRUN# CLKRUN# 20 SUS_STAT# / GPIO61 P8 TP22 SUSCLK / GPIO62 F3 TP51 SLP_S5# / GPIO63 E4 SLP_S4# H7 SLP_S3# P12 SLP_M# K8 TP23 N2 M1 SUS_PWR_ACK / GPIO30 P5 PWRBTN# P7 ACPRESENT / GPIO31 A6 BATLOW# / GPIO72 PMSYNCH BJ10 RI# SLP_LAN# F6 F14 PCIE_WAKE# 21 SLP_S5#_R R145 16 INT_TXUOUTP0 16 INT_TXUOUTP1 16 INT_TXUOUTP2 T13 PAD 0 2.37K/F LVDS_VBG SIO_SLP_S5# 20 TP23 R126 0 SIO_SLP_S3# SIO_SLP_S3# 20 SLP_M# 20 TP46 R115 1K 0.5% TP24 SDVO_STALLN SDVO_STALLP SDVO_INTN SDVO_INTP BF45 BH45 T51 T53 Y53 Y51 CRT_HSYNC CRT_VSYNC D INT_HDMI_SCL INT_HDMI_SDA DDPB_AUXN DDPB_AUXP DDPB_HPD BG44 BJ44 AU38 INT_HDMI_HPD DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P BD42 BC42 BJ42 BG42 BB40 BA40 AW38 BA38 INT_HDMI_TXDN2 INT_HDMI_TXDP2 INT_HDMI_TXDN1 INT_HDMI_TXDP1 INT_HDMI_TXDN0 INT_HDMI_TXDP0 INT_HDMI_TXCN INT_HDMI_TXCP DDPC_CTRLCLK DDPC_CTRLDATA Y49 AB49 INT_DP_SCL INT_DP_SDA DDPC_AUXN DDPC_AUXP DDPC_HPD BE44 BD44 AV40 INT_DP_HPD DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P BE40 BD40 BF41 BH41 BD38 BC38 BB36 BA36 INT_HDMI_SCL 18 INT_HDMI_SDA 18 C143 C146 C141 C142 C147 C149 C170 C169 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U INT_HDMI_TXDN2_C 18 INT_HDMI_TXDP2_C 18 INT_HDMI_TXDN1_C 18 INT_HDMI_TXDP1_C 18 INT_HDMI_TXDN0_C 18 INT_HDMI_TXDP0_C 18 INT_HDMI_TXCN_C 18 INT_HDMI_TXCP_C 18 INT_DP_SCL 21 INT_DP_SDA 21 INT_AUX_SINKN 21 INT_AUX_SINKP 21 INT_DP_TXN0 INT_DP_TXP0 INT_DP_TXN1 INT_DP_TXP1 INT_DP_TXN2 INT_DP_TXP2 INT_DP_TXN3 INT_DP_TXP3 21 21 21 21 21 21 21 21 C U50 U52 DDPD_CTRLCLK DDPD_CTRLDATA CRT_DDC_CLK CRT_DDC_DATA DAC_IREF CRT_IRTN BJ46 BG46 BJ48 BG48 SDVO_CTRLCLK SDVO_CTRLDATA V51 V53 AD48 AB51 PM_SYNC 3 SDVO_TVCLKINN SDVO_TVCLKINP DDPD_AUXN DDPD_AUXP DDPD_HPD BC46 BD46 AT38 DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P BJ40 BG40 BJ38 BG38 BF37 BH37 BE36 BD36 +5V_RUN INT_HDMI_HPD Q34 2N7002K-T1-E3 1 3 INT_HDMI_HPD_Q 18 R250 100K IbexPeak-M_Rev0_9 +5V_RUN 2 C SYS_RESET# System Power Management PCH_PWRGD 20 PCH_PWRGD T6 L_BKLTCTL AB48 Y45 16 INT_TXLOUTP0 16 INT_TXLOUTP1 16 INT_TXLOUTP2 T1 PAD XDP_DBRESET# L_BKLTEN L_VDD_EN LCD_DDCCLK LCD_DDCDAT R100 T3 T48 T47 Y48 16 LCD_DDCCLK 16 LCD_DDCDAT FDI_FSYNC0 DMI_IRCOMP PANEL_BKEN ENVDD 20 PANEL_BKEN 16 ENVDD 2 DMI0TXN DMI1TXN DMI2TXN DMI3TXN 3 3 3 3 3 3 3 3 Display port D DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3 DMI0RXP DMI1RXP DMI2RXP DMI3RXP FDI_TXN0 FDI_TXN1 FDI_TXN2 FDI_TXN3 FDI_TXN4 FDI_TXN5 FDI_TXN6 FDI_TXN7 Digital Display Interface 3 3 3 3 BE22 BF21 BD20 BE18 3 3 3 3 D DMI0RXN DMI1RXN DMI2RXN DMI3RXN BA18 BH17 BD16 BJ16 BA16 BE14 BA14 BC12 LVDS DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3 BD24 BG22 BA20 BG20 3 3 3 3 FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7 CRT DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3 BC24 BJ22 AW20 BJ20 IbexPeak-M_Rev0_9 INT_DP_HPD 1 Q32 2N7002K-T1-E3 3 INT_DP_HPD_R 21 +3.3V_RUN B PCH_RSMRST# R194 CLKRUN# R298 PCH_LAN_RST# R189 2 1 10K 10K LCD_DDCDAT R124 2 1 2.2K 8.2K PM_RI# R181 10K PCH_PWRGD R183 2 1 10K LCD_DDCCLK R123 2 1 2.2K PCIE_WAKE# R137 1K L_CTRL_CLK R129 10K PM_BATLOW# R152 8.2K L_CTRL_DATA R128 10K XDP_DBRESET# R120 10K S3 Power reduce R230 100K +3.3V_SUS PANEL_BKEN ENVDD R127 2 1 100K R131 2 1 100K B +3.3V_RUN +5V_ALW R305 1 2 2.2K INT_HDMI_SCL R304 1 2 2.2K INT_HDMI_SDA R117 1 2 2.2K INT_DP_SCL R116 1 2 2.2K INT_DP_SDA 1 +PWR_SRC SIO_SLP_S3# Q23 BSS138-7-F 2 R50 100K PS_S3CNTRL 5,13,30 Q18 BSS138-7-F PS_S3CNTRL PS_S3CNTRL_S 5 3 PS_S3CNTRL 3 2 R59 10K C107 0.01U 25 2 A 1 1 R130 *10K_NC A Quanta Computer Inc. Project Name: XM2 Title PCH 1/6 (DMI_VIDEO) Size Document Number XM2_MB Rev D Date: Friday, January 15, 2010 5 4 3 2 Sheet 1 7 of 40 5 4 3 2 1 +RTC_CELL Cap values depend on Xtal R193 20K C217 +3.3V_RUN D 18PF R308 *8.2K_NC SPKR 20K C226 D IBEX PEAK-M (HDA,JTAG,SATA) C227 2 R197 1uF W1 R157 10M 1uF R185 1M 32.768KHZ SPKR High=No Reboot ACZ_BIT_CLK INTVRMEN - Integrated SUS 1.1V VRM Enable High - Enable Internal VRs D17 SRTCRST# SM_INTRUDER# A16 PCH_INVRMEN A14 INTVRMEN ACZ_BIT_CLK A30 HDA_BCLK ACZ_SYNC D29 HDA_SYNC SPKR SPKR C216 *27P_NC ACZ_RST# 50 21 ICH_AZ_CODEC_SYNC 20,21 ICH_AZ_CODEC_RST# R170 33 ACZ_SYNC R160 33 ACZ_RST# R169 21 ICH_AZ_CODEC_SDOUT 33 HDA_RST# HDA_SDIN0 TP26 F30 HDA_SDIN1 TP28 E32 HDA_SDIN2 TP27 F32 HDA_SDIN3 ACZ_SDOUT B29 HDA_SDO PCH_GPIO33 H32 HDA_DOCK_EN# / GPIO33 J30 HDA_DOCK_RST# / GPIO13 PCH_JTAG_TCK_BUF M3 JTAG_TCK PCH_JTAG_TMS K3 JTAG_TMS PCH_JTAG_TDI K1 JTAG_TDI PCH_JTAG_TDO J2 JTAG_TDO PCH_JTAG_RST# J4 JTAG_RST# ACZ_SDOUT 20 PCH_GPIO33 24 KB_LED_DET TP47 TP48 TP50 TP49 Note : Only pop when PCH is production stage & need "JTAG boundary Scan". Remember to depop XDP side Res. SPKR C30 0 ohm resistor within 0.5 inch of pin PCH_JTAG_TCK_BUF P1 INTRUDER# G30 21 ICH_AZ_CODEC_SDIN0 Place all series terms close to PCH except for SDIN input lines,which should be close to source.Placement of R773, R775, R776 & R777 should equal distance to the T split trace point. Basically, keep the same distance from T for all series termination resistors. FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3 D33 B33 C32 A32 LPC_LAD0 20,21 LPC_LAD1 20,21 LPC_LAD2 20,21 LPC_LAD3 20,21 FWH4 / LFRAME# C34 LPC_LFRAME# 20,21 LDRQ0# LDRQ1# / GPIO23 A34 F34 SERIRQ AB9 TP29 TP25 IRQ_SERIRQ IRQ_SERIRQ SATA0RXN SATA0RXP SATA0TXN SATA0TXP AK7 AK6 AK11 AK9 SATA_RX0- 23 SATA_RX0+ 23 SATA_TX0- 23 SATA_TX0+ 23 SATA1RXN SATA1RXP SATA1TXN SATA1TXP AH6 AH5 AH9 AH8 SATA_RX1- 23 SATA_RX1+ 23 SATA_TX1- 23 SATA_TX1+ 23 SATA2RXN SATA2RXP SATA2TXN SATA2TXP AF11 AF9 AF7 AF6 SATA3RXN SATA3RXP SATA3TXN SATA3TXP AH3 AH1 AF3 AF1 SATA4RXN SATA4RXP SATA4TXN SATA4TXP AD9 AD8 AD6 AD5 SATA5RXN SATA5RXP SATA5TXN SATA5TXP AD3 AD1 AB3 AB1 SATAICOMPO AF16 SATAICOMPI AF15 20 HDD ODD C ESATA_ITX_DRX_N4 21 ESATA_ITX_DRX_P4 21 ESATA_IRX_DTX_N4_C 21 ESATA_IRX_DTX_P4_C 21 SATA_RX5- 23 SATA_RX5+ 23 SATA_TX5- 23 SATA_TX5+ 23 eSATA HDD2 Close to PCH <500mil SATAICOMPO R105 37.4 1% +1.05V_RUN Layout need to place at the same side of PCB 19 SPI_CLK BA2 SPI_CLK 19 SPI_CS0# AV3 SPI_CS0# AY3 SPI_CS1# SATALED# T3 SPI_SI AY1 SPI_MOSI SATA0GP / GPIO21 Y9 R112 1 2 10K 19 SPI_SO AV1 SATA1GP / GPIO19 V1 R301 1 2 10K TP45 Low = Enabled High = Disabled R303 1 19 Flash Descriptor Security Override GPIO33 RTCRST# SRTC_RST# IHDA 33 330K 21 B C14 SPI_MISO SPI R159 21 ICH_AZ_CODEC_BITCLK 51 RTC_RST# JTAG R192 +RTC_CELL R310 RTCX1 RTCX2 LPC Low=Default C B13 D13 SATA 1 RTC_X1 RTC_X2 18PF RTC U16A C218 No Reboot Strap 2 10K +3.3V_RUN SATA_ACT# 25 B +3.3V_RUN IbexPeak-M_Rev0_9 R136 *1K_NC PCH_GPIO33 (Internal 20K/F pull high to +3.3V_RUN) Note : GPIO33 is a signal used for Flash Descriptor Security Override/ME Debug Mode.This signal should be only asserted lowthrough an external pull-down in manufacturing or debug environments ONLY. A A Quanta Computer Inc. Project Name: XM2 Title PCH 2/6 (SATA_SPI) Size Document Number XM2_MB Rev D Date: Friday, January 15, 2010 5 4 3 2 Sheet 1 8 of 40 4 3 2 IBEX PEAK-M (PCI-E,SMBUS,CLK) IBEX PEAK-M (PCI,USB,NVRAM) 18 HDMI_PWR_CTRL T10 21 USB_MCARD1_DET# 23 PCH_IRQH_GPIO2 22 BT_DET# PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD# G38 H51 B37 A44 PIRQA# PIRQB# PIRQC# PIRQD# PCI_REQ0# HDMI_PWR_CTRL LCD_SEL USB_MCARD1_DET# F51 A46 B45 M53 REQ0# REQ1# / GPIO50 REQ2# / GPIO52 REQ3# / GPIO54 F48 K45 F36 H53 GNT0# GNT1# / GPIO51 GNT2# / GPIO53 GNT3# / GPIO55 PCH_IRQH_GPIO2 PCI_PIRQF# BT_DET# PCI_PIRQH# B41 K53 A36 A48 PIRQE# / GPIO2 PIRQF# / GPIO3 PIRQG# / GPIO4 PIRQH# / GPIO5 PCI_SERR# PCI_PERR# E44 E50 PCI_IRDY# 20 CLK_PCI_8502 CLK_PCI_FB SERR# PERR# A42 H44 F46 C46 IRDY# PAR DEVSEL# FRAME# PCI_PLOCK# D49 PLOCK# PCI_STOP# PCI_TRDY# D41 C48 STOP# TRDY# M7 PME# PCI_PLTRST# 21 CLK_LPC_DEBUG PCIRST# PCI_DEVSEL# PCI_FRAME# T7 D5 R143 22 CLK_LPC_DEBUG_R R134 R141 22 22 CLK_PCI_8502_R CLK_PCI_FB_R N52 P53 P46 P51 P48 AV7 NV_WR#0_RE# NV_WR#1_RE# PLTRST# CLKOUT_PCI0 CLKOUT_PCI1 CLKOUT_PCI2 CLKOUT_PCI3 CLKOUT_PCI4 PCIE_TX5PCIE_TX5+ C145 C144 1 1 2 2 0.1U/10V 0.1U/10V PCIE_TXN2_C PCIE_TXP2_C C139 C140 1 1 2 2 0.1U/10V 0.1U/10V PCIE_TXN5_C PCIE_TXP5_C C138 C137 21 PCIE_TX6-/GLAN_TX21 PCIE_TX6+/GLAN_TX+ 1 1 2 2 0.1U/10V 0.1U/10V U16B Mini_WWAN GLAN_TXN_C GLAN_TXP_C 21 21 Mini_WLAN Card reader NV_ALE NV_CLE 10 10 Giga Bit LOM AY8 AY5 21 21 17 17 PCIE_RX1PCIE_RX1+ PCIE_RX2PCIE_RX2+ PCIE_RX5PCIE_RX5+ 21 PCIE_RX6-/GLAN_RX21 PCIE_RX6+/GLAN_RX+ PCIE_TXN1_C PCIE_TXP1_C BG30 BJ30 BF29 BH29 PCIE_TXN2_C PCIE_TXP2_C AW30 BA30 BC30 BD30 PERN2 PERP2 PETN2 PETP2 AU30 AT30 AU32 AV32 PERN3 PERP3 PETN3 PETP3 PERN4 PERP4 PETN4 PETP4 PCIE_TXN5_C PCIE_TXP5_C BF33 BH33 BG32 BJ32 PERN5 PERP5 PETN5 PETP5 GLAN_TXN_C GLAN_TXP_C BA34 AW34 BC34 BD34 PERN6 PERP6 PETN6 PETP6 AT34 AU34 AU36 AV36 PERN7 PERP7 PETN7 PETP7 BG34 BJ34 BG36 BJ36 PERN8 PERP8 PETN8 PETP8 AK48 AK47 CLKOUT_PCIE0N CLKOUT_PCIE0P PCI-E port 7/8 are not support in HM55 . They are only in PM 55 H18 J18 A18 C18 N20 P20 J20 L20 F20 G20 A20 C20 M22 N22 B21 D21 H22 J22 E22 F22 A22 C22 G24 H24 L24 M24 A24 C24 USBRBIAS# B25 USBRBIAS D25 OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43 OC5# / GPIO9 OC6# / GPIO10 OC7# / GPIO14 N16 J16 F16 L16 E14 G16 F12 T15 USBP0USBP0+ USBP1USBP1+ USBP2USBP2+ USBP3USBP3+ USBP4USBP4+ USBP5USBP5+ 21 21 22 22 22 22 22 22 21 21 21 21 PUSB/ESATA Left Side USB CARD_CLK_REQ# Left Side USB Left Side USB Mini Card (WLAN) WLAN 21 CLK_PCIE_MINI1# 21 CLK_PCIE_MINI1 Card reader 17 CLK_PCIE_MINI2# 17 CLK_PCIE_MINI2 21 MINI1CLK_REQ# Mini Card (WWAN) AM43 AM45 MINI1CLK_REQ# U4 AM47 AM48 MINI2CLK_REQ# USBP8- 22 USBP8+ 22 N4 BT AH42 AH41 21 CLK_PCIE_MINI3# 21 CLK_PCIE_MINI3 WWAN USBP11USBP11+ USBP12USBP12+ P9 CLK_PCIE_REQ3# 16 16 25 25 A8 Camera Touch Screen Module AM51 AM53 MINI4CLK_REQ# M9 B9 RSV_SMBALERT# H14 PCH_SMBCLK C8 PCH_SMBDATA J14 RSV_SML0ALERT# SML0CLK C6 SMB_CLK_ME0 SML0DATA G8 SMB_DATA_ME0 SML1ALERT# / GPIO74 M14 RSV_SML1ALERT# SML1CLK / GPIO58 E10 SMB_CLK_ME1 SML1DATA / GPIO75 G12 SMB_DATA_ME1 SMBALERT# / GPIO11 SMBCLK SMBDATA BA32 BB32 BD32 BE32 AV11 BF5 USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N USBP9P USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P PERN1 PERP1 PETN1 PETP1 SML0ALERT# / GPIO60 SMBus AU2 NV_RB# 17 17 PCIE_TXN1_C PCIE_TXP1_C CL_CLK1 T13 CL_DATA1 T11 CL_RST1# T9 PEG_A_CLKRQ# / GPIO47 H1 Link NV_RCOMP PCIE_TX2PCIE_TX2+ 0.1U/10V 0.1U/10V Controller NV_ALE NV_CLE BD3 AY6 PCIE_TX1PCIE_TX1+ 21 21 2 2 PCI-E* NV_DQ0 / NV_IO0 NV_DQ1 / NV_IO1 NV_DQ2 / NV_IO2 NV_DQ3 / NV_IO3 NV_DQ4 / NV_IO4 NV_DQ5 / NV_IO5 NV_DQ6 / NV_IO6 NV_DQ7 / NV_IO7 NV_DQ8 / NV_IO8 NV_DQ9 / NV_IO9 NV_DQ10 / NV_IO10 NV_DQ11 / NV_IO11 NV_DQ12 / NV_IO12 NV_DQ13 / NV_IO13 NV_DQ14 / NV_IO14 NV_DQ15 / NV_IO15 AP7 AP6 AT6 AT9 BB1 AV6 BB3 BA4 BE4 BB6 BD6 BB7 BC8 BJ8 BJ6 BG6 NV_WE#_CK0 NV_WE#_CK1 GNT3# K6 NV_DQS0 NV_DQS1 AV9 BG8 21 21 1 1 CLKOUT_PEG_A_N CLKOUT_PEG_A_P PCIECLKRQ0# / GPIO73 CLKOUT_PCIE1N CLKOUT_PCIE1P PCIECLKRQ1# / GPIO18 CLKOUT_PCIE2N CLKOUT_PCIE2P PCH_SMBCLK 21 PCH_SMBDATA 21 D Non-iAMT R311 10K AD43 AD45 CLKOUT_DMI_N CLKOUT_DMI_P AN4 AN2 CLK_PCIE_3GPLL# 3 CLK_PCIE_3GPLL 3 CLKOUT_DP_N / CLKOUT_BCLK1_N CLKOUT_DP_P / CLKOUT_BCLK1_P AT1 AT3 CLK_BUF_SSCLK# 3 CLK_BUF_SSCLK 3 AW24 BA24 CLK_BUF_PCIE_3GPLLN 2 CLK_BUF_PCIE_3GPLLP 2 CLKIN_BCLK_N CLKIN_BCLK_P AP3 AP1 CLK_BUF_BCLKN 2 CLK_BUF_BCLKP 2 CLKIN_DOT_96N CLKIN_DOT_96P F18 E18 CLK_BUF_DREFCLKN CLK_BUF_DREFCLKP AH13 AH12 CLK_BUF_DREFSSCLKN CLK_BUF_DREFSSCLKP PEG C/BE0# C/BE1# C/BE2# C/BE3# T9 B NVRAM J50 G42 H47 G34 PCI_GNT0# GNT#1 AY9 BD1 AP15 BD8 USB C NV_CE#0 NV_CE#1 NV_CE#2 NV_CE#3 PCI D AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 C135 C136 From CLK BUFFER U16E H40 N34 C44 A38 C36 J34 A40 D45 E36 H48 E40 C40 M48 M45 F53 M40 M43 J36 K48 F40 C42 K46 M51 J52 K51 L34 F42 J40 G46 F44 M47 H36 1 CLKIN_DMI_N CLKIN_DMI_P CLKIN_SATA_N / CKSSCD_N CLKIN_SATA_P / CKSSCD_P PCIECLKRQ2# / GPIO20 REFCLK14IN P41 CLKIN_PCILOOPBACK J42 CLK_PCI_FB AH51 AH53 XTAL25_IN XTAL25_OUT CLKOUT_PCIE3N CLKOUT_PCIE3P PCIECLKRQ3# / GPIO25 CLKOUT_PCIE4N CLKOUT_PCIE4P XTAL25_IN XTAL25_OUT PCIECLKRQ4# / GPIO26 2 2 2 2 CLK_PCH_14M 2 Per EDS 1.0 support 33MHz and 14.31818MHz. AF38 XCLK_RCOMP R107 CLKOUTFLEX0 / GPIO64 T45 CLK_FLEX0 T5 CLKOUTFLEX1 / GPIO65 P43 CLK_FLEX1 T6 T42 CLK_FLEX2 T4 N50 CLK_FLEX3 T8 XCLK_RCOMP C 90.9 1% +1.05V_RUN USB_BIAS R158 22.6/F Giga Bit LOM 21 LOM_CLKREQ# OC0# OC1# OC2# OC3# OC4# OC5# OC6# OC7# OC0# OC1# AJ50 AJ52 21 CLK_PCIE_LOM# 21 CLK_PCIE_LOM LOM_CLKREQ# 21,22 22 H6 AK53 AK51 USB30_CLKREQ# P13 CLKOUT_PCIE5N CLKOUT_PCIE5P PCIECLKRQ5# / GPIO44 CLKOUT_PEG_B_N CLKOUT_PEG_B_P PEG_B_CLKRQ# / GPIO56 Clock Flex 5 CLKOUTFLEX2 / GPIO66 CLKOUTFLEX3 / GPIO67 B IbexPeak-M_Rev0_9 IbexPeak-M_Rev0_9 25MHz Clock 1 10K 10K 10K 10K 10K CLK_PCIE_REQ3# MINI4CLK_REQ# USB30_CLKREQ# CARD_CLK_REQ# LOM_CLKREQ# R110 1M Y1 1 2 CLK_LPC_DEBUG 1 C213 *27P_NC +3.3V_SUS RP3 C211 OC5# OC2# OC6# OC4# *27P_NC +3.3V_SUS 6 7 8 9 10 5 4 3 2 1 OC3# OC0# OC1# OC7# C195 27P/50V R300 10K MINI1CLK_REQ# 3 4 25MHz R178 Q24 XTAL25_OUT R182 R142 R122 R188 R172 R180 R167 C193 27P/50V 10K/J_4 10K/J_4 10K/J_4 2.2K/J_4 2.2K/J_4 2.2K/J_4 2.2K/J_4 RSV_SMBALERT# RSV_SML0ALERT# RSV_SML1ALERT# PCH_SMBCLK PCH_SMBDATA SMB_CLK_ME0 SMB_DATA_ME0 20 SMBCLK1 3 +3.3V_RUN A R309 R139 R135 RP2 USB_MCARD1_DET# PCI_PIRQB# PCI_REQ0# PCI_TRDY# +3.3V_RUN 6 7 8 9 10 5 4 3 2 1 10K *1K_NC *1K_NC MINI2CLK_REQ# PCI_GNT0# GNT#1 LCD_SEL PCI_PIRQD# HDMI_PWR_CTRL PCI_FRAME# 10P8R-8.2K +3.3V_SUS PCI_GNT0# 5 10 PCI_PLTRST# 2 4 1 TC7SZ32FU(T5L,F,T) PLTRST# 3,17,20,21 +3.3V_RUN 6 7 8 9 10 5 4 3 2 1 10P8R-8.2K 20 R149 GNT#1 Boot BIOS Location +3.3V_RUN R163 PCI_STOP# PCI_PIRQA# PCI_PIRQC# PCI_IRDY# *4.7K_NC SMBDAT1 2.2K/J_4 2N7002K 1 3 4 SMB_DATA_ME1 A GNT3# PCI_SERR# PCI_DEVSEL# PCI_PLOCK# PCI_PERR# 0 0 LPC 0 1 Reserved (NAND) 1 0 PCI 1 1 SPI A16 swap override Strap/Top-Block Swap Override jumper GNT3# Low = A16 swap override/Top-Block Swap Override enabled High = Default Quanta Computer Inc. Project Name: PCH 3/6 (PCI_SMBUS_CLK) Size 3 2 XM2 Title Document Number XM2_MB Rev D Date: Friday, January 15, 2010 5 SMB_CLK_ME1 Boot BIOS Strap C215 0.047U U6 2.2K/J_4 R179 Q25 Non-iAMT 1 +3.3V_SUS 10P8R-8.2K Add Buffers as needed for Loading and fanout concerns. 2N7002K +3.3V_SUS 2 CLK_PCI_8502 +3.3V_RUN 2 R173 R144 R155 R125 R146 1 8.2K 8.2K 8.2K 8.2K 2 R161 R166 R150 R154 2 BT_DET# PCH_IRQH_GPIO2 PCI_PIRQF# PCI_PIRQH# 2 +3.3V_SUS Reserve capacitor pads for improving WWAN. +3.3V_SUS SMBus/Pull-up XTAL25_IN +3.3V_RUN Sheet 1 9 of 40 5 4 3 2 IBEX PEAK-M (GPIO,VSS_NCTF,RSVD) GPIO Pull-up/Pull-down U16F BMBUSY# Y3 BMBUSY# / GPIO0 C38 TACH1 / GPIO1 20 SIO_EXT_SCI# SIO_EXT_SCI# D37 TACH2 / GPIO6 SIO_EXT_WAKE# J32 TACH3 / GPIO7 RSV_GPIO8 F10 GPIO8 K9 LAN_PHY_PWR_CTRL / GPIO12 A20GATE T7 GPIO15 AA2 SATA4GP / GPIO16 CLKOUT_BCLK0_N / CLKOUT_PCIE8N AM3 GPIO17 F38 TACH0 / GPIO17 CLKOUT_BCLK0_P / CLKOUT_PCIE8P AM1 GPIO27 TP_PCH_GPIO28 USB_MCARD2_DET# GPIO35 dGPU_PWR_EN# 17 CPPE_N# AB12 GPIO27 V13 GPIO28 M11 STP_PCI# / GPIO34 V6 PECI RCIN# PROCPWRGD BE10 THRMTRIP# BD10 TP1 BA22 SATA3GP / GPIO37 TP2 AW22 V3 SLOAD / GPIO38 TP3 BB22 BT_RADIO_DIS# P3 SDATAOUT0 / GPIO39 TP4 AY45 GPIO45 H3 PCIECLKRQ6# / GPIO45 TP5 AY46 RST_GATE F1 PCIECLKRQ7# / GPIO46 TP6 AV43 WLAN_RADIO_DIS# WWAN_RADIO_DIS# AB6 SDATAOUT1 / GPIO48 TP7 AV45 CPPE_N# AA4 SATA5GP / GPIO49 TP8 AF13 GPIO57 TP9 M18 TP10 N18 TP11 AJ24 TP12 AK41 TP13 AK42 TP14 M32 TP15 N32 TP16 M30 TP17 N30 TP18 H12 F8 S3 Power reduce VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8 VSS_NCTF_9 VSS_NCTF_10 VSS_NCTF_11 VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14 VSS_NCTF_15 VSS_NCTF_16 VSS_NCTF_17 VSS_NCTF_18 VSS_NCTF_19 VSS_NCTF_20 VSS_NCTF_21 VSS_NCTF_22 VSS_NCTF_23 VSS_NCTF_24 VSS_NCTF_25 VSS_NCTF_26 VSS_NCTF_27 VSS_NCTF_28 VSS_NCTF_29 VSS_NCTF_30 VSS_NCTF_31 10K/J_4 10K/J_4 10K/J_4 10K/J_4 10K/J_4 10K/J_4 dGPU_PWR_EN# R106 10K/J_4 GPIO17 SIO_RCIN# SIO_A20GATE dGPU_HOLD_RST# R138 R302 R299 R295 10K/J_4 10K/J_4 10K/J_4 10K/J_4 dGPU_PRSNT# R113 BT_RADIO_DIS# R306 USB_MCARD2_DET#R147 10K/J_4 10K/J_4 10K/J_4 WLAN_RADIO_DIS# R296 10K/J_4 BMBUSY# R297 10K/J_4 WWAN_RADIO_DIS# R111 10K/J_4 D +1.05V_RUN_VTT CLK_CPU_BCLK 3 R98 H_PECI 3 SIO_RCIN# 20 H_CPUPWRGD 56 +3.3V_RUN 3 PCH_THRMTRIP#_R R99 56 H_THERM# 3 SV_SET_UP 1-X High = Strong (Default) C R148 *1K_NC RSV_GPIO8 Enable when sampled low Disable when sampled high RSV_GPIO8 AA23 AB45 NC_2 AB38 NC_3 AB42 NC_4 AB41 TP24 R294 R114 R171 R162 R165 R132 CPPE_N# PCIE_MCARD2_DET# PCIE_MCARD1_DET#_R SIO_EXT_SMI# SIO_EXT_SCI# SIO_EXT_WAKE# Integrated Clock Chip Enable TP19 NC_5 1K 10K/J_4 10K/J_4 10K/J_4 10K/J_4 10K/J_4 10K/J_4 (Reserve to validate for future platforms) NC_1 INIT3_3V# +3.3V_SUS R121 R118 R312 R313 R164 R156 R153 +3.3V_RUN CLK_CPU_BCLK# 3 SIO_RCIN# CR_WAKE# TP_PCH_GPIO28 GPIO45 RST_GATE GPIO57 LAN_DISABLE# RSV_GPIO8 SIO_A20GATE 20 SATACLKREQ# / GPIO35 SATA2GP / GPIO36 A4 A49 A5 A50 A52 A53 B2 B4 B52 B53 BE1 BE53 BF1 BF53 BH1 BH2 BH52 BH53 BJ1 BJ2 BJ4 BJ49 BJ5 BJ50 BJ52 BJ53 D1 D2 D53 E1 E53 B T1 AB13 GPIO57 C MEM_LED / GPIO24 NCTF 21 WWAN_RADIO_DIS# SCLOCK / GPIO22 SIO_A20GATE BG10 AB7 dGPU_PRSNT# RST_GATE H10 CPU PCIE_MCARD1_DET#_R Y7 GPIO 21 PCIE_MCARD1_DET# 3 U2 dGPU_HOLD_RST# PCIE_MCARD2_DET# 22 BT_RADIO_DIS# TP20 TP19 CR_WAKE# 21 PCIE_MCARD2_DET# 21 WLAN_RADIO_DIS# AF48 AF47 LAN_DISABLE# D 21 USB_MCARD2_DET# TP21 TP18 CLKOUT_PCIE7N CLKOUT_PCIE7P RSVD 20 SIO_EXT_WAKE# CLKOUT_PCIE6N CLKOUT_PCIE6P MISC 20 SIO_EXT_SMI# SIO_EXT_SMI# AH45 AH46 1 R119 10K GPIO35 R108 *10K_NC GPIO27 T39 P6 C10 +V_NVRAM_VCCQ B IbexPeak-M_Rev0_9 9 NV_ALE 9 NV_CLE R92 *8.2K_NC R93 *8.2K_NC DMI Termination Voltage Set to Vcc when LOW NV_CLE Set to Vcc/2 when HIGH Danbury Technology Enabled High = Enable(Default) NV_ALE Low = Disable A A Quanta Computer Inc. Project Name: XM2 Title PCH 4/6 (GPIO) Size Document Number XM2_MB Rev D Date: Friday, January 15, 2010 5 4 3 2 Sheet 1 10 of 40 5 4 BJ24 C351 *10U_NC AN20 AN22 AN23 AN24 AN26 AN28 BJ26 BJ28 AT26 AT28 AU26 AU28 AV26 AV28 AW26 AW28 BA26 BA28 BB26 BB28 BC26 BC28 BD26 BD28 BE26 BE28 BG26 BG28 BH27 VCCIO[25] VCCIO[26] VCCIO[27] VCCIO[28] VCCIO[29] VCCIO[30] VCCIO[31] VCCIO[32] VCCIO[33] VCCIO[34] VCCIO[35] VCCIO[36] VCCIO[37] VCCIO[38] VCCIO[39] VCCIO[40] VCCIO[41] VCCIO[42] VCCIO[43] VCCIO[44] VCCIO[45] VCCIO[46] VCCIO[47] VCCIO[48] VCCIO[49] VCCIO[50] VCCIO[51] VCCIO[52] VCCIO[53] AN30 AN31 VCCIO[54] VCCIO[55] +1.05V_RUN C179 10U C148 1U C171 1U C186 1U C174 1U +3.3V_RUN C C202 0.1U AN35 +VCCAFDI_VRM +1.05V_RUN L17 *1uH_NC +V1.1LAN_VCCAPLL_FDI C353 *10U_NC CRT VSSA_DAC[2] AF51 VCCALVDS AH38 VSSA_LVDS AH39 VCCTX_LVDS[1] VCCTX_LVDS[2] VCCTX_LVDS[3] VCCTX_LVDS[4] AP43 AP45 AT46 AT45 VCC3_3[1] VCCVRM[1] BJ18 VCCFDIPLL VCCIO[1] L7 +1.05V_RUN *10uH_NC +1.05V_RUN_VCCA_CLK C189 *10U_NC AP51 VCCACLK[1] C187 AP53 *1U_NC VCCACLK[2] +1.05V_RUN L5 0.1uH +1.8V_RUN C165 C164 C150 0.01U 0.01U 22U C178 AF23 VCCLAN[1] AF24 VCCLAN[2] POWER 1U/10V Y20 DCPSUSBYP C196 VCCAPLLEXP AT22 AM23 +1.05V_RUN VCC CORE VCCIO[24] +1.05V_RUN_PLLEXP VSSA_DAC[1] VCC3_3[2] AB34 VCC3_3[3] AB35 VCC3_3[4] AD35 0.1U +3.3V_RUN +1.05V_RUN C177 C191 22U 0.1U VCCVRM[2] AT24 VCCDMI[1] AT16 VCCDMI[2] AU16 VCCPNAND[1] VCCPNAND[2] VCCPNAND[3] VCCPNAND[4] VCCPNAND[5] VCCPNAND[6] VCCPNAND[7] VCCPNAND[8] VCCPNAND[9] AM16 AK16 AK20 AK19 AK15 AK13 AM12 AM13 AM15 +1.05V_+1.5V_1.8V_RUN R96 0 C197 1U C200 22U C201 1U +1.05V_RUN_VTT C172 1U C203 +V_NVRAM_VCCQ VCCME[2] AD41 VCCME[3] AF43 VCCME[4] AF41 VCCME[5] AF42 VCCME[6] V39 VCCME[7] V41 VCCME[8] V42 VCCME[9] Y39 VCCME[10] Y41 VCCME[11] Y42 VCCME[12] V9 DCPRTC R102 1 *0_NC 2 C181 2 R103 1 0 +3.3V_RUN +1.05V_+1.5V_1.8V_RUN +1.8V_RUN +V1.1LAN_VCCA_A_DPL 0.1U +1.05V_RUN AM8 AM9 AP11 AP9 VCCME[1] AD39 0.1U +V1.1LAN_VCCA_B_DPL VCCME3_3[1] VCCME3_3[2] VCCME3_3[3] VCCME3_3[4] AD38 C184 C185 C168 +3.3V_RUN 1U 1U 1U C176 0.1U IbexPeak-M_Rev0_9 C204 0.1U AU24 BB51 BB53 VCCVRM[3] VCCADPLLA[1] VCCADPLLA[2] BD51 BD53 VCCADPLLB[1] VCCADPLLB[2] AH23 AJ35 AH35 VCCIO[21] VCCIO[22] VCCIO[23] AF34 VCCIO[2] AH34 VCCIO[3] AF32 VCCIO[4] V12 DCPSST USB *1uH_NC 1 +3.3V_RUN Clock and Miscellaneous L16 AE52 AF53 VCCIO[5] VCCIO[6] VCCIO[7] VCCIO[8] V24 V26 Y24 Y26 VCCSUS3_3[1] VCCSUS3_3[2] VCCSUS3_3[3] VCCSUS3_3[4] VCCSUS3_3[5] VCCSUS3_3[6] VCCSUS3_3[7] VCCSUS3_3[8] VCCSUS3_3[9] VCCSUS3_3[10] VCCSUS3_3[11] VCCSUS3_3[12] VCCSUS3_3[13] VCCSUS3_3[14] VCCSUS3_3[15] VCCSUS3_3[16] VCCSUS3_3[17] VCCSUS3_3[18] VCCSUS3_3[19] VCCSUS3_3[20] VCCSUS3_3[21] VCCSUS3_3[22] VCCSUS3_3[23] VCCSUS3_3[24] VCCSUS3_3[25] VCCSUS3_3[26] VCCSUS3_3[27] V28 U28 U26 U24 P28 P26 N28 N26 M28 M26 L28 L26 J28 J26 H28 H26 G28 G26 F28 F26 E28 E26 C28 C26 B27 A28 A26 VCCSUS3_3[28] U23 VCCIO[56] V23 V5REF_SUS F24 +1.05V_RUN C190 1U C205 C206 *0.022U_NC 0.1U 0.1U +1.05V_RUN +V5REF_SUS Y22 VCC3_3[8] K49 J38 VCC3_3[9] L38 VCC3_3[10] M36 VCC3_3[11] N36 VCC3_3[12] P36 VCC3_3[13] U35 VCC3_3[14] AD13 +V5REF R140 1 D8 C212 VCCIO[9] 1 0 VCCSUS3_3[30] U20 VCCSUS3_3[31] 0.1U 2 +1.8V_RUN U22 VCCSUS3_3[32] R94 2 +1.05V_RUN +1.05V_RUN L19 10uH +V1.1LAN_VCCA_A_DPL 1 *0_0603_NC L18 10uH 220U VCC3_3[6] 0.1U Y16 VCC3_3[7] C54 C356 1U 4.7U 0.1U 0.1U C230 C235 V_CPU_IO[1] V_CPU_IO[2] A12 +RTC_CELL + AT18 AU18 C110 + +V1.1LAN_VCCA_B_DPL C354 VCC3_3[5] V16 +1.05V_RUN_VTT C88 C357 220U V15 C194 +3.3V_RUN VCCRTC C234 IbexPeak-M_Rev0_9 C355 1U 1U 0.1U SATA U19 C207 +3.3V_SUS R101 B VCCSUS3_3[29] PCI/GPIO/LPC 1 *0_0603_NC 2 P18 CPU R97 +1.5V_RUN DCPSUS C198 0.1U +1.05V_+1.5V_1.8V_RUN +VCCAFDI_VRM 100/F_4 +5V_SUS 2 SDM10K45-7-F +3.3V_SUS 100/F_4 +5V_RUN 2 SDM10K45-7-F +3.3V_RUN 1U +3.3V_RUN C173 0.1U C192 VCCSATAPLL[1] VCCSATAPLL[2] RTC 2 0 1 1 D9 C V5REF HDA R95 R151 1U AK3 AK1 L6 *10uH_NC AT20 VCCIO[10] AH19 VCCIO[11] AD20 VCCIO[12] AF22 VCCIO[13] VCCIO[14] VCCIO[15] VCCIO[16] AD19 AF20 AF19 AH20 VCCIO[17] VCCIO[18] VCCIO[19] VCCIO[20] AB19 AB20 AB22 AD22 VCCME[13] VCCME[14] VCCME[15] VCCME[16] AA34 Y34 Y35 AA35 +1.05V_RUN C175 *10U_NC R109 AH22 VCCVRM[4] VCCSUSHDA 0.1U +1.05V_VCCSATAPLL C180 *1U_NC +1.05V_+1.5V_1.8V_RUN D +3.3V_SUS C208 C214 PCI/GPIO/LPC +1.05V_RUN LVDS AK24 +1.05V_RUN 2 U16J HVCMOS D AE50 VCCADAC[2] +3.3V_RUN DMI C199 1U VCCADAC[1] PCI E* C182 10U VCCCORE[1] VCCCORE[2] VCCCORE[3] VCCCORE[4] VCCCORE[5] VCCCORE[6] VCCCORE[7] VCCCORE[8] VCCCORE[9] VCCCORE[10] VCCCORE[11] VCCCORE[12] VCCCORE[13] VCCCORE[14] VCCCORE[15] NAND / SPI AB24 AB26 AB28 AD26 AD28 AF26 AF28 AF30 AF31 AH26 AH28 AH30 AH31 AJ30 AJ31 +1.05V_RUN FDI IBEX PEAK-M (POWER) 3 POWER U16G +1.05V_+1.5V_1.8V_RUN 0 +1.05V_RUN C188 1U B +1.05V_RUN L30 +3.3V_SUS C210 1U 0.1U A A Quanta Computer Inc. Project Name: XM2 Title PCH 5/6 (POWER) Size Document Number XM2_MB Rev D Date: Friday, January 15, 2010 5 4 3 2 Sheet 1 11 of 40 5 4 3 2 1 U16I AY7 B11 B15 B19 B23 B31 B35 B39 B43 B47 B7 BG12 BB12 BB16 BB20 BB24 BB30 BB34 BB38 BB42 BB49 BB5 BC10 BC14 BC18 BC2 BC22 BC32 BC36 BC40 BC44 BC52 BH9 BD48 BD49 BD5 BE12 BE16 BE20 BE24 BE30 BE34 BE38 BE42 BE46 BE48 BE50 BE6 BE8 BF3 BF49 BF51 BG18 BG24 BG4 BG50 BH11 BH15 BH19 BH23 BH31 BH35 BH39 BH43 BH47 BH7 C12 C50 D51 E12 E16 E20 E24 E30 E34 E38 E42 E46 E48 E6 E8 F49 F5 G10 G14 G18 G2 G22 G32 G36 G40 G44 G52 AF39 H16 H20 H30 H34 H38 H42 IBEX PEAK-M (GND) D U16H C B AB16 VSS[0] AA19 AA20 AA22 AM19 AA24 AA26 AA28 AA30 AA31 AA32 AB11 AB15 AB23 AB30 AB31 AB32 AB39 AB43 AB47 AB5 AB8 AC2 AC52 AD11 AD12 AD16 AD23 AD30 AD31 AD32 AD34 AU22 AD42 AD46 AD49 AD7 AE2 AE4 AF12 Y13 AH49 AU4 AF35 AP13 AN34 AF45 AF46 AF49 AF5 AF8 AG2 AG52 AH11 AH15 AH16 AH24 AH32 AV18 AH43 AH47 AH7 AJ19 AJ2 AJ20 AJ22 AJ23 AJ26 AJ28 AJ32 AJ34 AT5 AJ4 AK12 AM41 AN19 AK26 AK22 AK23 AK28 VSS[1] VSS[2] VSS[3] VSS[4] VSS[5] VSS[6] VSS[7] VSS[8] VSS[9] VSS[10] VSS[11] VSS[12] VSS[13] VSS[14] VSS[15] VSS[16] VSS[17] VSS[18] VSS[19] VSS[20] VSS[21] VSS[22] VSS[23] VSS[24] VSS[25] VSS[26] VSS[27] VSS[28] VSS[29] VSS[30] VSS[31] VSS[32] VSS[33] VSS[34] VSS[35] VSS[36] VSS[37] VSS[38] VSS[39] VSS[40] VSS[41] VSS[42] VSS[43] VSS[44] VSS[45] VSS[46] VSS[47] VSS[48] VSS[49] VSS[50] VSS[51] VSS[52] VSS[53] VSS[54] VSS[55] VSS[56] VSS[57] VSS[58] VSS[59] VSS[60] VSS[61] VSS[62] VSS[63] VSS[64] VSS[65] VSS[66] VSS[67] VSS[68] VSS[69] VSS[70] VSS[71] VSS[72] VSS[73] VSS[74] VSS[75] VSS[76] VSS[77] VSS[78] VSS[79] VSS[80] VSS[81] VSS[82] VSS[83] VSS[84] VSS[85] VSS[86] VSS[87] VSS[88] VSS[89] VSS[90] VSS[91] VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97] VSS[98] VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] AK30 AK31 AK32 AK34 AK35 AK38 AK43 AK46 AK49 AK5 AK8 AL2 AL52 AM11 BB44 AD24 AM20 AM22 AM24 AM26 AM28 BA42 AM30 AM31 AM32 AM34 AM35 AM38 AM39 AM42 AU20 AM46 AV22 AM49 AM7 AA50 BB10 AN32 AN50 AN52 AP12 AP42 AP46 AP49 AP5 AP8 AR2 AR52 AT11 BA12 AH48 AT32 AT36 AT41 AT47 AT7 AV12 AV16 AV20 AV24 AV30 AV34 AV38 AV42 AV46 AV49 AV5 AV8 AW14 AW18 AW2 BF9 AW32 AW36 AW40 AW52 AY11 AY43 AY47 IbexPeak-M_Rev0_9 VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180] VSS[181] VSS[182] VSS[183] VSS[184] VSS[185] VSS[186] VSS[187] VSS[188] VSS[189] VSS[190] VSS[191] VSS[192] VSS[193] VSS[194] VSS[195] VSS[196] VSS[197] VSS[198] VSS[199] VSS[200] VSS[201] VSS[202] VSS[203] VSS[204] VSS[205] VSS[206] VSS[207] VSS[208] VSS[209] VSS[210] VSS[211] VSS[212] VSS[213] VSS[214] VSS[215] VSS[216] VSS[217] VSS[218] VSS[219] VSS[220] VSS[221] VSS[222] VSS[223] VSS[224] VSS[225] VSS[226] VSS[227] VSS[228] VSS[229] VSS[230] VSS[231] VSS[232] VSS[233] VSS[234] VSS[235] VSS[236] VSS[237] VSS[238] VSS[239] VSS[240] VSS[241] VSS[242] VSS[243] VSS[244] VSS[245] VSS[246] VSS[247] VSS[248] VSS[249] VSS[250] VSS[251] VSS[252] VSS[253] VSS[254] VSS[255] VSS[256] VSS[257] VSS[258] VSS[259] VSS[260] VSS[261] VSS[262] VSS[263] VSS[264] VSS[265] VSS[266] VSS[267] VSS[268] VSS[269] VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301] VSS[302] VSS[303] VSS[304] VSS[305] VSS[306] VSS[307] VSS[308] VSS[309] VSS[310] VSS[311] VSS[312] VSS[313] VSS[314] VSS[315] VSS[316] VSS[317] VSS[318] VSS[319] VSS[320] VSS[321] VSS[322] VSS[323] VSS[324] VSS[325] VSS[326] VSS[327] VSS[328] VSS[329] VSS[330] VSS[331] VSS[332] VSS[333] VSS[334] VSS[335] VSS[336] VSS[337] VSS[338] VSS[339] VSS[340] VSS[341] VSS[342] VSS[343] VSS[344] VSS[345] VSS[346] VSS[347] VSS[348] VSS[349] VSS[350] VSS[351] VSS[352] VSS[353] VSS[354] VSS[355] VSS[356] VSS[366] H49 H5 J24 K11 K43 K47 K7 L14 L18 L2 L22 L32 L36 L40 L52 M12 M16 M20 N38 M34 M38 M42 M46 M49 M5 M8 N24 P11 AD15 P22 P30 P32 P34 P42 P45 P47 R2 R52 T12 T41 T46 T49 T5 T8 U30 U31 U32 U34 P38 V11 P16 V19 V20 V22 V30 V31 V32 V34 V35 V38 V43 V45 V46 V47 V49 V5 V7 V8 W2 W52 Y11 Y12 Y15 Y19 Y23 Y28 Y30 Y31 Y32 Y38 Y43 Y46 P49 Y5 Y6 Y8 P24 T43 AD51 AT8 AD47 Y47 AT12 AM6 AT13 AM5 AK45 AK39 AV14 D C B IbexPeak-M_Rev0_9 A A Quanta Computer Inc. Project Name: XM2 Title PCH 6/6 (GND) Size Document Number XM2_MB Rev D Date: Friday, January 15, 2010 5 4 3 2 Sheet 1 12 of 40 4 3 Bit swap M_A_DQ[63:0] 4 M_A_A[15:0] M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15 D 4 4 4 4 4 4 4 4 4 4 4 4 4 4 M_A_BS#0 M_A_BS#1 M_A_BS#2 M_A_CS#0 M_A_CS#1 M_A_CLK0 M_A_CLK0# M_A_CLK1 M_A_CLK1# M_A_CKE0 M_A_CKE1 M_A_CAS# M_A_RAS# M_A_WE# 98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15 109 108 79 114 121 101 103 102 104 73 74 115 110 113 197 201 202 200 BA0 BA1 BA2 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# WE# SA0 SA1 SCL SDA 116 120 ODT0 ODT1 M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7 11 28 46 63 136 153 170 187 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7 M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7 12 29 47 64 137 154 171 188 10 27 45 62 135 152 169 186 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7 SA0_DIM0_0 SA1_DIM0_0 14,21,23 WLAN_SMBCLK 14,21,23 WLAN_SMBDATA 4 M_A_ODT0 4 M_A_ODT1 4 M_A_DM[7:0] 4 M_A_DQS[7:0] C 4 M_A_DQS#[7:0] 2 2 +3.3V_RUN R65 *10K_NC M_A_DQ4 M_A_DQ5 M_A_DQ7 M_A_DQ6 M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ12 M_A_DQ13 M_A_DQ10 M_A_DQ11 M_A_DQ9 M_A_DQ8 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ23 M_A_DQ22 M_A_DQ21 M_A_DQ20 M_A_DQ19 M_A_DQ18 M_A_DQ28 M_A_DQ29 M_A_DQ26 M_A_DQ27 M_A_DQ25 M_A_DQ24 M_A_DQ31 M_A_DQ30 M_A_DQ33 M_A_DQ32 M_A_DQ34 M_A_DQ38 M_A_DQ37 M_A_DQ36 M_A_DQ39 M_A_DQ35 M_A_DQ40 M_A_DQ44 M_A_DQ43 M_A_DQ42 M_A_DQ41 M_A_DQ45 M_A_DQ47 M_A_DQ46 M_A_DQ48 M_A_DQ53 M_A_DQ55 M_A_DQ50 M_A_DQ52 M_A_DQ49 M_A_DQ51 M_A_DQ54 M_A_DQ56 M_A_DQ60 M_A_DQ62 M_A_DQ59 M_A_DQ61 M_A_DQ57 M_A_DQ63 M_A_DQ58 CHA_DIMM0_BOT_SIDE +1.5V_SUS +3.3V_RUN R81 *10K/F_NC PM_EXTTS#0 +3.3V_RUN C122 2.2U/6.3V_6 3 C120 .1U/10V_4 PM_EXTTS#0 PM_EXTTS#0 3,14 DDR3_DRAMRST# 15 M_VREF_DQ_DIMM0 C6 C5 2.2U/6.3V_6 .1U/10V_4 C91 VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 199 VDDSPD 77 122 125 NC1 NC2 NCTEST 198 30 EVENT# RESET# 1 126 VREF_DQ VREF_CA 2 3 8 9 13 14 19 20 25 26 31 32 37 38 43 15 M_VREF_CA_DIMM0 C90 2.2U/6.3V_6 JDIM1B 75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124 .1U/10V_4 VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196 VTT1 VTT2 203 204 G1 G2 H1 H2 205 206 207 208 D +0.75V_DDR_VTT C AS0A626-U2RN-7F S3 Power reduce +0.75V_DDR_VTT Bit swap SA0_DIM0_0 SODIMM# A0 Decoupling +1.5V_SUS SA1 0 SA0 0 CHA1 0 1 CHB0 1 0 CHB1 1 1 C42 C81 C39 C43 C59 C48 C37 C87 C65 C84 10U 10U 10U 10U 10U 10U .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 R87 22 + C51 330U 7343 2.5 2 PS_S3CNTRL 5,7,30 Q20 BSS138-7-F 1 CHA0 C70 3 R73 10K 1 R72 10K 1 5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194 1 2 2 SA1_DIM0_0 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 AS0A626-U2RN-7F 1 1 R64 *10K_NC PC2100 DDR3 SDRAM SO-DIMM (204P) JDIM1A 4 2 PC2100 DDR3 SDRAM SO-DIMM (204P) 5 +0.75V_DDR_VTT B B C124 1U/6.3V_4 C125 1U/6.3V_4 C131 1U/6.3V_4 C130 1U/6.3V_4 C133 10U Note: If SA0_DIM0 = 0, SA1_DIM0 = 0 SO-DIMMA SPD Address is 0xA0 SO-DIMMA TS Address is 0x30 If SA0_DIM0 = 1, SA1_DIM0 = 0 SO-DIMMA SPD Address is 0xA2 SO-DIMMA TS Address is 0x32 A A Quanta Computer Inc. Project Name: XM2 Title DDR3 DIMM-A0 Size Document Number XM2_MB Rev D Date: Friday, January 15, 2010 5 4 3 2 Sheet 1 13 of 40 4 M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15 D 4 4 4 4 4 4 4 4 4 4 4 4 4 4 M_B_BS#0 M_B_BS#1 M_B_BS#2 M_B_CS#0 M_B_CS#1 M_B_CLK0 M_B_CLK0# M_B_CLK1 M_B_CLK1# M_B_CKE0 M_B_CKE1 M_B_CAS# M_B_RAS# M_B_WE# SA0_DIM1_0 SA1_DIM1_0 13,21,23 WLAN_SMBCLK 13,21,23 WLAN_SMBDATA 4 M_B_ODT0 4 M_B_ODT1 4 M_B_DM[7:0] 4 M_B_DQS[7:0] C 4 M_B_DQS#[7:0] 2 2 +3.3V_RUN A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15 109 108 79 114 121 101 103 102 104 73 74 115 110 113 197 201 202 200 BA0 BA1 BA2 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# WE# SA0 SA1 SCL SDA 116 120 ODT0 ODT1 M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7 11 28 46 63 136 153 170 187 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7 12 29 47 64 137 154 171 188 10 27 45 62 135 152 169 186 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 Bit swap 5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194 M_B_DQ5 M_B_DQ4 M_B_DQ6 M_B_DQ7 M_B_DQ1 M_B_DQ0 M_B_DQ3 M_B_DQ2 M_B_DQ12 M_B_DQ13 M_B_DQ15 M_B_DQ14 M_B_DQ8 M_B_DQ9 M_B_DQ11 M_B_DQ10 M_B_DQ21 M_B_DQ20 M_B_DQ22 M_B_DQ23 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ24 M_B_DQ29 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ25 M_B_DQ31 M_B_DQ30 M_B_DQ37 M_B_DQ36 M_B_DQ34 M_B_DQ35 M_B_DQ32 M_B_DQ33 M_B_DQ38 M_B_DQ39 M_B_DQ41 M_B_DQ40 M_B_DQ47 M_B_DQ46 M_B_DQ44 M_B_DQ45 M_B_DQ42 M_B_DQ43 M_B_DQ49 M_B_DQ48 M_B_DQ54 M_B_DQ55 M_B_DQ53 M_B_DQ52 M_B_DQ50 M_B_DQ51 M_B_DQ56 M_B_DQ60 M_B_DQ62 M_B_DQ58 M_B_DQ57 M_B_DQ61 M_B_DQ63 M_B_DQ59 M_B_DQ[63:0] 4 +3.3V_RUN R85 *10K/F_NC PM_EXTTS#1 +3.3V_RUN C118 2.2U/6.3V_6 C121 .1U/10V_4 PM_EXTTS#1 3 PM_EXTTS#1 3,13 DDR3_DRAMRST# 15 M_VREF_DQ_DIMM1 C13 C14 2.2U/6.3V_6 .1U/10V_4 C93 C94 2.2U/6.3V_6 75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124 VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 199 VDDSPD 77 122 125 NC1 NC2 NCTEST 198 30 EVENT# RESET# 1 126 VREF_DQ VREF_CA 2 3 8 9 13 14 19 20 25 26 31 32 37 38 43 15 M_VREF_CA_DIMM1 .1U/10V_4 1 JDIM2B VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196 VTT1 VTT2 203 204 G1 G2 H1 H2 205 206 207 208 D +0.75V_DDR_VTT AS0A626-U2SN-7F C 1 R69 *10K_NC 1 R61 10K 98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78 PC2100 DDR3 SDRAM SO-DIMM (204P) M_B_A[15:0] 2 +1.5V_SUS JDIM2A 4 3 PC2100 DDR3 SDRAM SO-DIMM (204P) 5 0105CT: Update JDIM4 footprint 5.2mm, STD type. AS0A626-U2SN-7F SA0_DIM1_0 1 R70 10K 1 R62 *10K_NC SODIMM# B0 Decoupling +1.5V_SUS Bit swap 2 2 SA1_DIM1_0 CHA0 SA1 0 SA0 0 CHA1 0 1 CHB0 1 0 CHB1 1 1 B C41 C71 C85 C38 C47 C46 C36 C67 C82 C44 C60 10U 10U 10U 10U 10U 10U .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 .1U/10V_4 + C111 330U 7343 2.5 B +0.75V_DDR_VTT C128 1U/6.3V_4 C127 1U/6.3V_4 C126 1U/6.3V_4 C129 1U/6.3V_4 C132 10U Note: SO-DIMMA SPD Address is 0xA4 SO-DIMMA TS Address is 0x34 A A Quanta Computer Inc. Project Name: XM2 Title DDR3 DIMM-B0 Size Document Number XM2_MB Rev D Date: Friday, January 15, 2010 5 4 3 2 Sheet 1 14 of 40 5 4 3 2 1 Fixed SO-DIMM VREF_DQ (M1): Default +VTT_DDR_REF +1.5V_SUS R4 *0/_NC R11 3,5,13,14,30,37 1K 1 +1.5V_SUS 2 1% R5 1 C20 *.1U/50V/0603_NC 1K 1 0 2 D M_VREF_DQ_DIMM0 13 2 R6 2 1 1 2 D 1% C12 .1U/50V/0603 +VTT_DDR_REF +1.5V_SUS R1 *0/_NC 3,5,13,14,30,37 R2 1 +1.5V_SUS 1K 1% 2 C21 *.1U/50V/0603_NC 0 2 M_VREF_DQ_DIMM1 14 2 R3 1 1K 2 1 1 2 R8 1 1% C2 .1U/50V/0603 C C +VTT_DDR_REF +1.5V_SUS R46 *0/_NC R52 3,5,13,14,30,37 1K 1 +1.5V_SUS 1% 2 2 1K 1 1% M_VREF_CA_DIMM0 13 2 R49 C86 *.1U/50V/0603_NC 0 2 1 1 2 R48 1 C96 .1U/50V/0603 B B +VTT_DDR_REF +1.5V_SUS R44 *0/_NC +1.5V_SUS 1K 1% 2 1 C50 *.1U/50V/0603_NC R43 1 1K 1% 0 2 M_VREF_CA_DIMM1 14 2 2 R45 1 2 1 3,5,13,14,30,37 R42 1 C92 .1U/50V/0603 A A Quanta Computer Inc. Project Name: XM2 Title DDR3 VREF Size Document Number XM2_MB Rev D Date: Friday, January 15, 2010 5 4 3 2 Sheet 1 15 of 40 5 4 3 2 1 40Pin LVDS & Array Microphone & Camera Connector J1 1 3 D5 1 ENVDD 3 EN_LCDVCC Q7 DDTC124EUA-7-F 2 1 2 20 LCDVCC_TST_EN BAT54C T/R C 41 42 43 41 42 43 44 45 44 45 INT_TXLOUTN2 7 INT_TXLOUTP2 7 INT_TXLCLKOUTN 7 INT_TXLCLKOUTP 7 INT_TXUOUTN0 7 INT_TXUOUTP0 7 INT_TXUOUTN1 7 INT_TXUOUTP1 7 +3.3V_RUN INT_TXUOUTN2 7 INT_TXUOUTP2 7 ATI_PWM L2 BLM11A05S 0603 INT_TXUCLKOUTN 7 INT_TXUCLKOUTP 7 LCD_BAK 20 +GFX_PWR_SRC USBP11+_L USBP11-_L CAM_VCC +3.3V_RUN C DMIC_DATA 21 DMIC_CLK 21 C16 10U 10 X5R FOX_GS12407-11141-9H B R21 1 Q3 FDC658AP +LCDVCC +GFX_PWR_SRC 1 C22 0.1U 402 25 C19 0.1U 402 25 R12 1 0 R13 1 0 +3.3V_RUN 2 1 USBP11+_L USBP11-_L 1 L3 *DLP11SN900HL2L_NC 2 1 3 4 C17 *0.1U_NC 16 C3 *0.047U_NC 10 C15 *0.1U_NC 402 25 C27 *0.1U_NC 16 2 2 R15 TC7SZ32FU(T5L,F,T) 1 2 *0/J_NC C25 0.1U 402 25 USBP11+ USBP11- 2 2 R23 100K 9 9 2 1 ATI_PWM 40mil 1 1 4 3 PWM_VADJ 1 1 2 R18 *10K/J_NC 6 5 2 1 4 2 20 BIA_PWM +GFX_PWR_SRC 40mil U1 2 5 +3.3V_RUN 7 +PWR_SRC 2 +3.3V_RUN C4 *0.1U_NC 10 X7R 1 7 D INT_TXLOUTN1 7 INT_TXLOUTP1 7 2 2 1 Q6 2N7002W-7-F 7 7 7 7 1 1 Q5 2N7002W-7-F LCD_TST 20 LCD_DDCCLK LCD_DDCDAT INT_TXLOUTN0 INT_TXLOUTP0 2 2 LCD_DDCCLK LCD_DDCDAT 1 2 1 25 C26 0.01U 25 1 C11 0.01U 2 R29 47K C23 22U 1206 10 3 2 R28 *100K_NC 3 +3.3V_SUS 1 2 1 1 LCDVCC_ON 2 R24 47 805 3 1 R27 330K 4 2 2 D +LCDVCC 2 Q9 FDC655BN 6 5 2 1 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 1 +LCDVCC 2 +3.3V_RUN 2 +15V_ALW 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 2 *0/J_NC B R22 100K 3 1 C304 RUN_ON DMIC_CLK Q8 2N7002W-7-F 2 1 DMIC_DATA 2 1 *10P_NC 50 1 27,30,31,32,35,37 C301 2 *10P_NC 50 A A Quanta Computer Inc. PROJECT : Calpella UMA Size Document Number Rev 1A LVDS CONN Date: 5 4 3 2 Sheet Friday, January 15, 2010 1 16 of 40 C MMC_D4 MMC_D5 MMC_D6 MMC_D7 MS_D4 MS_D5 MS_D6 MS_D7 SD_LED# SD_PWR# SD_CD# MS_LED# MS_PWR# XD XD_D0 XD_D1 XD_D2 XD_D3 XD_WE# XD_CE# XD_WP# XD_CLE XD_D4 XD_D5 XD_D6 XD_D7 XD_RE# XD_R/B# XD_ALE XD_LED# XD_PWR# +DVDD18 +APVDD +3.3V_RUN +VDD33 R323 0 C85 need close to pin44 0603 (>40mil) SD-CLK_MS-CLK_XD-CE# SD_MS_XD-D3 MS_CD# SD_MS_XD-D2 SD_MS_XD-D0 SD_MS_XD-D1 SD-CMD_MS-BS_XD-WE# XD_CD# +DVDD18 +VDD33 SD-CLK_MS-CLK_XD-CE# SD_MS_XD-D6 SD_MS_XD-D7 SD_MS_XD-D0 SD_MS_XD-D1 (>20mil) +3.3V_CARD 0603 C368 22U/6.3V_8 C375 C373 C369 1 0 C281 0.1U 0.1U 0.1U C279 *10P_NC 0.1U 270P/25V 2 C372 R322 +CR_PWR C282 *10P_NC SD-9(D2) SD-1(D3) MMC-10(D4) SD-2(SD_CMD) MMC-11(D5) SD-3(VSS) SD-4(VDD) MS-10(VSS) MS-9(VCC) MS-8(SCLK) MS-7(D3) MS-6(INS) MS-5(D2) MS-4(D0) MS-3(D1) MS-2(BS) MS-1(VSS) SD-5(CLK) MMC-12(D6) SD-6(GND) MMC-13(D7) SD-7(D0) SD-8(D1) SD(SW.COM) SD(SW.CD) XD-1(GND) XD-0(CDSW) XD-2(R/-B) XD-3(RE) XD-4(CE) XD-5(CLE) XD-6(ALE) XD-7(WE) XD-8(-WP) XD-9(GND) XD-10(D0) XD-11(D1) XD-12(D2) XD-13(D3) XD-14(D4) XD-15(D5) XD-16(D6) XD-17(D7) XD-18(VCC) SD(SW.WP) 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 1 SD_CD# XD_CD# XD-R/B# XD-RE# SD-CLK_MS-CLK_XD-CE# XD-CLE XD-ALE SD-CMD_MS-BS_XD-WE# SD-WP_XD-WP# SD_MS_XD-D0 SD_MS_XD-D1 SD_MS_XD-D2 SD_MS_XD-D3 SD_MS_XD-D4 SD_MS_XD-D5 SD_MS_XD-D6 SD_MS_XD-D7 SD-WP_XD-WP# TAS_5-250907001000-9 5in1-5-250907001000-9-45p C271 *270P/25V_NC C284 0.1U SD_MS_XD-D1 1 XD_CD# +3.3V_CARD R327 10K SD-WP_XD-WP# R328 1K +VDD33 3 C374 22P/50V_4 +VDD33 C371 2.2U SD_MS_XD-D3 SD_MS_XD-D2 SD_MS_XD-D1 SD_MS_XD-D0 TAV33 SPI_SI SPI_SO SPI_CSN GND GND SPI_SCK MDIO8 MDIO9 MDIO10 MDIO11 MDIO12 12K R318 3,9,20,21 PLTRST# 0 C367 0.1U 10 X7R 9 CLK_PCIE_MINI2# 9 CLK_PCIE_MINI2 +APVDD +APVDD +VDD33 +DVDD18 SD_CD# MS_CD# XD_CD# +CR_PWR CPPE_N# 10 CPPE_N#_C 3 2 C370 Q47 *2N7002W-7-F_NC 10U 1 2 3 4 5 6 7 8 9 10 11 12 MIDO[0..5] Single Skew Should be smaller +/- 100 mil for SDA3.Application R320 JMB389 R319 *10K_NC 3 XD-ALE SD-WP_XD-WP# XD-R/B# XD-ALE 24 23 22 21 20 19 18 17 16 15 14 13 MDIO6 MDIO13 MDIO14 CR1_LEDN DV33 DV33 DV18 CR1_PCTLN CR1_CD0N CR1_CD1N CR1_CD2N CPPE_N JMB389 Needs close to Pin18: 12mil/<250mil PCIE_RXP5_C 2 200K XD-CLE SD-CMD_MS-BS_XD-WE# R324 22 DV18 GND TXIN MDIO7 MDIO4 MDIO5 SDDV33_18 DV33 MDIO3 MDIO2 MDIO1 MDIO0 +APV18 PCIE_RXN5_C XD-CLE 37 38 39 40 41 42 43 44 45 46 47 48 MIDO Single End = 50 ohm 1 36 35 34 33 32 31 30 29 28 27 26 25 1 2 C280 *10P_NC *270P/25V_NC +3.3V_SUS U17 XRSTN XTEST APCLKN APCLKP APVDD APGND APREXT APRXP APRXN APV18 APTXN APTXP +DVDD18 SD-CLK_MS-CLK_XD-CE# R325 *0_NC 2 XD-R/B# +3.3V_RUN 10K R224 1 C285 SD_MS_XD-D4 SD_MS_XD-D5 SD_MS_XD-D6 SD_MS_XD-D7 XD-RE# 2 2 R326 2 2.2U 6.3 X5R CON3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 (>40mil) MS_CD# C278 1 C283 2.2U/6.3V CC0603 SD_MS_XD-D2 SD_MS_XD-D3 SD_MS_XD-D4 SD-CMD_MS-BS_XD-WE# SD_MS_XD-D5 R321 0 0603 +3.3V_CARD C7577 need close to pin7 2 MS MS_D0 MS_D1 MS_D2 MS_D3 MS_BS MS_CLK 1 1 SD / MMC SD_D0 SD_D1 SD_D2 SD_D3 SD_CMD SD_CLK SD_WP E +3.3V_CARD 2.2uF cap is no more than 250mils away from the power pin and a have a min trace width of 40mils. Card Reader interface signal mapping PIN Default MDIO00 SD/MMC/MS/xD MDIO01 MDIO02 MDIO03 MDIO04 MDIO05 MDIO06 MDIO07 MDIO08 MDIO09 MDIO10 MDIO11 MDIO12 MDIO13 MDIO14 CR1_LEDN CR1_PCTLN CR1_CD0 CR1_CD1 CR1_CD2 D 2 B 1 A C365 C366 (20mil) +APV18 0.1U 9 10U 4 9 0.1U 0.1U C361 9 9 1000P C363 PCIE_RX5- 0.1U C362 PCIE_RX5+ 10U C364 PCIE_TX5+ PCIE_TX5- C360 4 Quanta Computer Inc. PROJECT : Calpella UMA Size Document Number Rev 1A Card Reader (JMB389A) Date: A B C D Sheet Friday, January 15, 2010 E 17 of 40 5 4 3 2 1 D D 1 +3.3V_RUN L15 BLM18PG181SN1 2 U11 +VCC_HDMI VCC VCC VCC VCC VCC VCC VCC VCC 39 38 IN_D1+ IN_D1- OUT_D1+ OUT_D1- 22 23 HDMI_CLK+_R 21 HDMI_CLK-_R 21 7 INT_HDMI_TXDP0_C 7 INT_HDMI_TXDN0_C 42 41 IN_D2+ IN_D2- OUT_D2+ OUT_D2- 19 20 HDMI_TX0+_R 21 HDMI_TX0-_R 21 7 INT_HDMI_TXDP1_C 7 INT_HDMI_TXDN1_C 45 44 IN_D3+ IN_D3- OUT_D3+ OUT_D3- 16 17 HDMI_TX1+_R 21 HDMI_TX1-_R 21 7 INT_HDMI_TXDP2_C 7 INT_HDMI_TXDN2_C 48 47 IN_D4+ IN_D4- OUT_D4+ OUT_D4- 13 14 HDMI_TX2+_R 21 HDMI_TX2-_R 21 HDMI_SCL_R 21 2 1 2 11 15 21 26 33 40 46 C339 1U EQUALIZATION SETTING PC1:PC0=0:0 8dB PC1:PC0=0:1 4dB Recommanded PC1:PC0=1:0 12dB PC1:PC0=1:1 0dB C C341 0.1U C335 0.1U C331 0.01U 7 INT_HDMI_TXCP_C 7 INT_HDMI_TXCN_C SCLZ/SDAZ Low-level input/output Voltage CFG01:CFG00=0:0 VIL:<0.4V VOL:0.6V (Default) CGF01:CGF00=0:1 VIL:<0.36V VOL:0.55V CGF01:CGF00=1:0 VIL:<0.44V VOL:0.65V CGF01:CGF00=1:1 VIL:<0.36V VOL:0.6V +3.3V_RUN 7 INT_HDMI_SCL 9 SCL SCL_SINK 28 7 INT_HDMI_SDA 8 SDA SDA_SINK 29 7 INT_HDMI_HPD_Q 7 HPD HPD_SINK 30 GND GND GND GND GND GND GND GND GND GND EPAD 1 5 12 18 24 27 31 36 37 43 49 1 +3.3V_RUN R262 R246 R247 R260 4.7K *4.7K_NC 4.7K *4.7K_NC DDC_EN PC0 PC1 CFG00 R257 100K/J_4 9 HDMI_PWR_CTRL 2 R281 *0/J_NC 1 2 OE# R258 *0/J_NC 32 3 4 34 35 DDC_EN PC0 PC1 DDCBUF_EN CFG 10 25 6 RT_EN# OE# REXT CONTROL 2 1 2 3.9K 3 1 R249 B POWER GND C HDMI_SDA_R 21 HDMI_HPD_LS R263 1K/J_4 R261 R245 R248 R259 1 1 1 1 UMA_HDMI_DET 21 2 2 2 2 *0_NC *0_NC *0_NC 0 DDC_EN PC0 PC1 CFG00 SN75DP139RGZR UMA_HDMI_DET 21 Q38 2N7002W-7-F B OE# 21 A A Quanta Computer Inc. PROJECT : Calpella UMA Size Document Number Rev 1A HDMI CONN Date: 5 4 3 2 Friday, January 15, 2010 Sheet 1 18 of 40 5 3 8Mbit (1M Byte) 2 RTC BATTERY +3.3V_ALW +3.3V_ALW 1 1 VDD 8 HOLD# 7 3 WP# VSS 4 1 2 D11 RB751V40T1G 2 EC_FLASH_SPI_CLK_R EC_FLASH_SPI_DIN_R EC_FLASH_SPI_DO_R CE# SCK SI SO 2 2 15 2 15 2 15 1 6 5 2 2 R253 1 R254 1 R231 1 R252 10K/J_4 U9 2 D EC_FLASH_SPI_CS# EC_FLASH_SPI_CLK EC_FLASH_SPI_DIN EC_FLASH_SPI_DO +3.3V_ALW +RTC_CELL R232 10K/J_4 20 20 20 20 1 1 For EC 4 C337 22P/50V 1 W25Q80BVSSIG 50 D C254 2.2U/6.3V/0603 603 6.3 C336 0.1U/16V_4 16 2 +RTC_1 1 RTCR1 2 1K RTCD1 RB751V40T1G +RTC 1 RTCBT1 2 BATT_CONN 1 2 1 C255 1U 603 10 RTC-BATTERY For PCH 64Mbit (8M Byte), SPI +3.3V_RUN +3.3V_RUN C C R291 10K/J_4 R287 10K/J_4 U15 8 8 8 8 R292 R288 R289 R293 SPI_CS0# SPI_CLK SPI_SI SPI_SO 15/J_4 15/J_4 15/J_4 15/J_4 SPI_CS0#_R SPI_CLK_R SPI_SI_R SPI_SO_R 1 6 5 2 C359 3 22P/50V_4 CE# SCK SI SO VDD 8 HOLD# 7 WP# VSS 4 +3.3V_RUN R290 W25Q64BVSSIG C358 0.1U/10V_4 50 10 iTPM ENABLE/DISABLE *1K_NC SPI_SI TPM Function R712 Enable Mount Disable NC (Default) B B A A Quanta Computer Inc. PROJECT : Calpella UMA Size Document Number Rev 1A FLASH / RTC Date: 5 4 3 2 Friday, January 15, 2010 Sheet 1 19 of 40 4 RB751V40T1G 1 R267 28,36 SMBCLK0 28,36 SMBDAT0 PCH MMB, CLOCK, THERMAL 26 26 SMBCLK2 SMBDAT2 0/J_4 4 14 16 KBRST/GPB6 WRST PWUREQ/GPC7 19 20 L80HLAT/GPE0 L80LLAT/WUI7/GPE7 SMBCLK0 SMBDAT0 110 111 SMCLK0/GPB3 SMDAT0/GPB4 SMBCLK1 SMBDAT1 115 116 SMCLK1/GPC1 SMDAT1/GPC2 SMBCLK2 SMBDAT2 117 118 SMCLK2/GPF6 SMDAT2/GPF7 85 86 PS2CLK0/GPF0 PS2DAT0/GPF1 87 88 PS2CLK1/GPF2 PS2DAT1/GPF3 89 90 PS2CLK2/GPF4 PS2DAT2/GPF5 66 67 68 69 70 71 72 73 TP36 36 24 PS_ID LID_SW# 24 CLK_TP_SIO 24 DAT_TP_SIO ITE8502_XTAL1 128 ITE8502_XTAL2 2 CK32KE 12 1 27 49 91 113 122 VCORE VSS1 VSS3 VSS4 VSS5 VSS6 VSS7 +3.3V_ALW BLM11A05S 1 603 2 L14 L13 BLM11A05S C320 0.1U/16V_4 74 75 16 SMBDAT2 SMBCLK2 4 2 3 RP8 1 2.2KX2 CPU_TYPE SUS_ON IMVP_VR_ON R244 R235 DAC0/GPJ0 DAC1/GPJ1 DAC2/GPJ2 DAC3/GPJ3 DAC4/GPJ4 DAC5/GPJ5 76 77 78 79 80 81 PWM0/GPA0 PWM1/GPA1 PWM2/GPA2 PWM3/GPA3 PWM4/GPA4 PWM5/GPA5 PWM6/GPA6 PWM7/GPA7 24 25 28 29 30 31 32 34 TACH0/GPD6 TACH1/GPD7 47 48 PWM LPC TMRI0/WUI2/GPC4 TMRI1/WUI3/GPC6 120 124 RXD/GPB0 TXD/GPB1 GPC0 CTX0/GPB2 CRX1/GPH1/ID1 CTX1/GPH2/ID2 108 109 119 123 94 95 FLFRAME/GPG2/LF FLRST/GPG0/TM FLAD3/GPG6 100 106 104 FLAD2/SO FLAD1/SI FLAD0/SCE FLCLK 103 102 101 105 HWPG 27,29 IMVP6_PROCHOT# 29 SUS_PWR_ACK 7 TP35 LED_WLAN_OUT# 21 PBAT_PRES# 36 IINP 28 SIO_SLP_S5# 7 1 LED_WLAN_OUT# IRQ_SERIRQ USBP0_BUS_SW_CB0 21 SIO_EXT_WAKE# 10 USB_SIDE_EN# 22 LAN_PCIE_PWR_CTRL# 21 PCH_RSMRST# 7 SIO_PWRBTN# 7 2 D 1 100K/J_4 *100K/J_NC 2 +3.3V_RUN R234 R270 1 10K/J_4 1 10K/J_4 2 2 +3.3V_SUS SUS_PWR_ACK AC_PRESENT RB751V40T1G R233 R251 10K/J_4 10K/J_4 BREATH_LED# 25 BAT2_LED# 25 FAN1_PWM 26 PWM_VADJ 16 BAT1_LED# 25 KB_BACKLITE_EN 24 USB_CHG_DET#_R 25 BEEP 21 FAN1_TACH 26 PANEL_BKEN 7 TP37 SIO_SLP_S3# 7 C IR/UART SMBUS LPC/FWH FLASH EGAD/GPE1 EGCS/GPE2 EGCLK/GPE3 EGPC PS/2 GPH3/ID3 GPH4/ID4 GPH5/ID5 GPH6/ID6 GPG1/ID7 CK32K CPU_TYPE RUN_ON_1 27 KSO18 IMVP_VR_ON IMVP_VR_ON 29 SUS_ON SUS_ON 30,37 KB_DET# 24 SLP_M# 7 EC_FLASH_SPI_DO EC_FLASH_SPI_DIN EC_FLASH_SPI_CS# EC_FLASH_SPI_CLK 96 97 98 99 107 18 21 35 RING/PWRFAIL/LPCRST/GPB7 112 PWRSW/GPE4 125 19 19 19 19 Board ID Straps 12P 82 83 84 PCH_PWRGD 7 ALW_ON 25,33 TP34 USB_POWER_EN# USB_BACK_EN# CONFIG_0 CONFIG_1 +3.3V_ALW USB_POWER_EN# 22 USB_BACK_EN# 21 R243 *10K_NC TP_LED1 24 R266 RI1/WUI0/GPD0 RI2/WUI1/GPD1 WUI5/GPE5 TP_LED2 24 H_CPUDET# 3 D16 *100K/J_NC +3.3V_ALW 2 AC_PRESENT 1 RB751V40T1G AVCC AVSS GINT/GPD5 33 +3.3V_ALW R241 *10K_NC MEDIA_INT# 22 ACAV_IN 25,28 IMVP_PWRGD 26,29 R237 *10K_NC R239 *10K_NC B CONFIG_0 USB_BACK_EN# CONFIG_1 USB_POWER_EN# AC_PRESENT 7 2 ITE8502IX_JX 3 RP7 1 2.2KX2 LED_WLAN_OUT# D13 GPIO B 4 2 SUS_PWR_ACK C332 8 PCH_GPIO33 SMBDAT1 SMBCLK1 1 LCD_BAK D19 2 WRST# CLKRUN/GPH0/ID0 SERIRQ ECSMI/GPD4 ECSCI/GPD3 GA20/GPB5 LPCPD/WUI6/GPE6 C346 0.1U/16V_4 2 16 93 5 RB751V40T1G 1 15 RB751V40T1G 1 23 RB751V40T1G 126 1 17 ADC/DAC ADC0/GPI0 ADC1/GPI1 ADC2/GPI2 ADC3/GPI3 ADC4/GPI4 ADC5/GPI5 ADC6/GPI6 ADC7/GPI7 +3.3V_ALW 2 SIO_RCIN# IRQ_SERIRQ D17 2 D15 2 D14 2 KEYBOARD 26 50 92 114 121 127 SYS_PWR_SW# 25 R242 10K/J_4 LCDVCC_TST_EN 16 ITE8502E lqfp128-16x16-4 R240 10K/J_4 R238 10K/J_4 10K/J_4 R236 1 10 SMBCLK1 SMBDAT1 LPCRST/WUI4/GPD2 LPCCLK LFRAME LAD0 LAD1 LAD2 LAD3 VSTBY1 VSTBY2 VSTBY3 VSTBY4 VSTBY5 VSTBY6 2 CLKRUN# IRQ_SERIRQ SIO_EXT_SMI# SIO_EXT_SCI# SIO_A20GATE LCD_TST 9 9 22 13 6 10 9 8 7 2 0/J_4 3 RP6 1 2.2KX2 1 7 8 10 10 10 16 21 NB_MUTE# 8,21 ICH_AZ_CODEC_RST# Charge and BAT KSI7 KSI6 KSI5 KSI4 KSI3/SLIN KSI2/INT KSI1/AFD KSI0/STB 4 2 2 C 65 64 63 62 61 60 59 58 R265 1 CLK_PCI_8502 3,9,17,21 PLTRST# 9 CLK_PCI_8502 8,21 LPC_LFRAME# 8,21 LPC_LAD0 8,21 LPC_LAD1 8,21 LPC_LAD2 8,21 LPC_LAD3 SERIRQ SC(V1.0)P38: 8.2-k pull-up to +V3.3S CRB uses a 10-k pull-up to +V3.3S. KSI7 KSI6 KSI5 KSI4 KSI3 KSI2 KSI1 KSI0 SMBDAT0 SMBCLK0 1 Place these caps close to ITE8502. +3.3V_ALW 0/J 2 +3.3V_RUN 1 16 KSO17/GPC5 KSO16/GPC3 KSO15 KSO14 KSO13 KSO12/SLCT KSO11/ERR KSO10/PE KSO9/BUSY KSO8/ACK KSO7/PD7 KSO6/PD6 KSO5/PD5 KSO4/PD4 KSO3/PD3 KSO2/PD2 KSO1/PD1 KSO0/PD0 R280 1 3 11 2 16 57 56 55 54 53 52 51 46 45 44 43 42 41 40 39 38 37 36 VBAT1 VCC 2 16 C343 0.1U/16V_4 KSO17 KSO16 KSO15 KSO14 KSO13 KSO12 KSO11 KSO10 KSO9 KSO8 KSO7 KSO6 KSO5 KSO4 KSO3 KSO2 KSO1 KSO0 ITE8502E LQFP-128L 1 16 C333 0.1U/16V_4 1 C322 0.1U/16V_4 1 C334 0.1U/16V_4 2 2 2 2 C338 10U/6.3V_6 603 6.3 1 1 D 1 2 +3.3V_ALW 1 1 KSI[0..7] 2 +RTC_CELL 2 24 3 U10 2 KSO[0..18] 1 24 1 5 16 603 ITE8502_XTAL2 2 2 32KHz Clock. C349 0.1U/16V_4 1 ITE8502IX_JX +3.3V_ALW 16 Config_0 0 0 1 Config_1 0 1 0 GM7/GM7B UMA Studio Swtichable Studio Discrete USB_BACK_EN# 0 0 1 1 0 USB_Power_EN# 0 1 0 1 0 GM7/GM7B SSI (X00) PT (X01) ST (X02) QT (A00) (A01) 1 R268 100K/J_4 RB751V40T1G C342 18P 50 A 4 1 ITE8502_XTAL1 3 2 32.768KHZ R269 10/J_4 C340 18P 50 Quanta Computer Inc. 2 C345 1U/10V_6 603 10 CLK_PCI_8502 W2 WRST# 2 1 1 2 26,33 THERM_STP# 1 D18 A Project Name: C348 2.2P/50V_4 XM2 Title CoverPage 50 Size Document Number XM2_MB Rev D Date: Friday, January 15, 2010 5 4 3 2 Sheet 1 20 of 40 1 2 3 4 5 6 7 8 +PWR_SRC +5V_ALW CN3 9 CLK_PCIE_MINI3# 9 CLK_PCIE_MINI3 16 DMIC_DATA 16 DMIC_CLK 8 ICH_AZ_CODEC_BITCLK 9 LOM_CLKREQ# 20 LED_WLAN_OUT# 9 PCIE_RX6+/GLAN_RX+ 9 PCIE_RX6-/GLAN_RX9 CLK_PCIE_LOM 9 CLK_PCIE_LOM# 9 PCIE_TX6+/GLAN_TX+ 9 PCIE_TX6-/GLAN_TX7 INT_AUX_SINKN 7 INT_AUX_SINKP C 7 7 INT_DP_SCL INT_DP_SDA 7 7 INT_DP_TXP3 INT_DP_TXN3 7 7 INT_DP_TXP2 INT_DP_TXN2 7 7 INT_DP_TXP1 INT_DP_TXN1 7 7 INT_DP_TXP0 INT_DP_TXN0 25 BR_LED 7 INT_DP_HPD_R C291 *0.1U_NC +5V_ALW CLK_LPC_DEBUG 9 PCIE_RX1- 9 PCIE_RX1+ 9 C290 *0.1U_NC C1 *0.1U_NC PCIE_TX1- 9 PCIE_TX1+ 9 PCIE_TX2- 9 PCIE_TX2+ 9 +PWR_SRC B CLK_PCIE_MINI1# 9 CLK_PCIE_MINI1 9 USBP4USBP4+ 9 9 NB_MUTE# 20 BEEP 20 SPKR 8 ICH_AZ_CODEC_RST# ICH_AZ_CODEC_SYNC ICH_AZ_CODEC_SDIN0 WLAN_SMBCLK 1 WLAN_SMBDATA C288 *0.1U_NC 603 50 C286 *470P_NC 50 1 PCIE_RX2- 9 PCIE_RX2+ 9 C294 *10P_NC 2 USBP5+ USBP5- +1.5V_RUN C292 *0.1U_NC 2 9 9 C289 *0.1U_NC +3.3V_SUS 50 C293 *10P_NC 50 Close to connector 8,20 8 8 ICH_AZ_CODEC_SDOUT 8 USBP0_BUS_SW_CB0 20 LAN_PCIE_PWR_CTRL# 20 USB_CHG_DET# 25 USB_BACK_EN# 20 OC0# 9,22 +3.3V_RUN ESATA_IRX_DTX_N4_C 8 ESATA_IRX_DTX_P4_C 8 RP5 2.2KX2 USBP0+ 9 USBP0- 9 2 10 USB_MCARD2_DET# 22 COEX2_WLAN_ACTIVE 13,14,23 WLAN_SMBCLK 13,14,23 WLAN_SMBDATA B +5V_RUN +3.3V_RUN 13,14,23 WLAN_SMBCLK ESATA_ITX_DRX_P4 8 ESATA_ITX_DRX_N4 8 WLAN_SMBCLK HDMI_TX0+_R 18 HDMI_TX0-_R 18 Q30 2N7002W-7-F 1 3 1 R226 HDMI_CLK+_R 18 HDMI_CLK-_R 18 PCH_SMBCLK 9 C 2 *0/J_NC +3.3V_RUN HDMI_TX1+_R 18 HDMI_TX1-_R 18 2 +5V_RUN LPC_LFRAME# 8,20 LPC_LAD3 8,20 LPC_LAD2 8,20 LPC_LAD1 8,20 LPC_LAD0 8,20 PLTRST# 3,9,17,20 USB_MCARD1_DET# 9 PCIE_WAKE# 7 MINI1CLK_REQ# 9 PCIE_MCARD1_DET# 10 WLAN_RADIO_DIS# 10 COEX1_BT_ACTIVE_MINI 22 PCIE_MCARD2_DET# 10 WWAN_RADIO_DIS# 10 4 2 +3.3V_SUS A 3 1 +1.5V_RUN 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 1 A 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 2 +3.3V_RUN HDMI_TX2+_R 18 HDMI_TX2-_R 18 13,14,23 WLAN_SMBDATA WLAN_SMBDATA HDMI_SCL_R 18 HDMI_SDA_R 18 1 1 R227 UMA_HDMI_DET 18 OE# 18 Q31 2N7002W-7-F 3 PCH_SMBDATA 9 2 *0/J_NC CON160_1 D D Quanta Computer Inc. PROJECT : Calpella UMA Size Document Number Rev 1A MINI-PCI DB Connector (WLAN/WPAN) Date: 1 2 3 4 5 6 Friday, January 15, 2010 7 Sheet 21 of 8 40 5 4 3 2 1 MMB & Power Board 12pins USB IO 40 pins J3 88511-4001 Cap LED/BAT/WLAN LED on MMB will be control by MMB IC C249 0.1U +3.3V_RUN +5V_RUN +3.3V_ALW D J6 2,26 EC_SMBCLK2 2,26 EC_SMBDAT2 20 MEDIA_INT# 25 BREATH_PWRLED 25 RBAT1_LED 25 RBAT2_LED 25 POWER_ SW_IN0# 1 2 3 4 5 6 7 8 9 10 11 12 BREATH_PWRLED POWER_ SW_IN0# HDD_LED 25 RBAT1_LED 25 RBAT2_LED 25 USB_SIDE_EN# 20 USB_POWER_EN# 20 OC0# 9,21 OC1# 9 RBAT1_LED RBAT2_LED 2 C287 *0.1U_NC USBP1+ USBP1- 9 9 USBP2+ USBP2- 9 9 USBP3+ USBP3- 9 9 *DA204U_NC D10 3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 1 1 C250 0.1U 2 1 +3.3V_RUN POWER_ SW_IN0# 13 14 PTI_AF712L-N2G1Z BREATH_PWRLED C246 *100P_NC POWER_ SW_IN0# C242 *100P_NC +5V_RUN ESD2 1 2 3 1 2 3 C 6 5 4 6 5 4 POWER_ SW_IN0# *SRV05-4.TCT_NC 41 41 C 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 2 42 42 D B +5V_SUS 2 +5V_SUS 1 +5V_RUN B Support Dell BT3xx series module Bluetooth WTB Conn +3.3V_RUN J2 USBP8+_R USBP8-_R COEX2_WLAN_ACTIVE 21 BT_RADIO_DIS# 10 COEX1_BT_ACTIVE_MINI 21 BT_DET# 9 R7 10K L1 1 1 C9 33P C8 100P 2 C10 0.1U C7 0.1U USBP8-_R USBP8+_R *PLW3216S900SQ2T1_NC 4 1 1 2 A 1 1 2 ACS_87216-1200 2 12 11 10 9 8 7 6 5 4 3 2 1 2 USB_DP USB_DN GND VMAIN COEX2_WLAN_ACT RADIO_DIS LINK_IND BT_PRI_STATUS BT_COEX_STATUS2 COEX1_BT_ACTIVE MOD_DET GND 3 2 USBP8USBP8+ A 9 9 1206 R9 R10 1 0 1 0 2 Quanta Computer Inc. 2 PROJECT : Calpella UMA Size Document Number Rev 1A Left USB / MMB CONN Date: 5 4 3 2 Friday, January 15, 2010 Sheet 1 22 of 40 1 2 3 4 SATA Connector. A 24 12V 12V 12V GND RSVD GND 5V 5V 5V GND GND GND 3.3V 3.3V 3.3V 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 GND TXP TXN GND RXN RXP GND 7 6 5 4 3 2 1 GND 23 6 7 8 CON2 CON1 GND 5 FFS_INT2_R +5V_RUN +3.3V_RUN SATA_RXP0_C C161 SATA_RXN0_C C160 0.01U/16V 0.01U/16V SATA_TXN0_C C159 SATA_TXP0_C C158 0.01U/16V 0.01U/16V SATA_RX0+ 8 SATA_RX0- 8 SATA_TX0- 8 SATA_TX0+ 8 GND 24 12V 12V 12V GND RSVD GND 5V 5V 5V GND GND GND 3.3V 3.3V 3.3V 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 GND TXP TXN GND RXN RXP GND 7 6 5 4 3 2 1 GND 23 ODD Connector DG: Place TX cap close to connector CN4 S1 FFS_INT2_R 14 +5V_RUN 14 S7 P1 +3.3V_RUN 15 SATA_RXP5_C C251 SATA_RXN5_C C248 0.01U/16V 0.01U/16V SATA_TXN5_C C244 SATA_TXP5_C C243 0.01U/16V 0.01U/16V SATA_RX5+ 8 SATA_RX5- 8 15 GND1 TXP TXN GND2 RXN RXP GND3 1 2 3 4 5 6 7 DP +5V +5V MD GND GND 8 9 10 11 12 13 P6 LN27131-C40D-9F SATA_TXP1_C SATA_TXN1_C C260 C258 0.01U/16V 0.01U/16V SATA_RXN1_C SATA_RXP1_C C253 C252 0.01U/16V 0.01U/16V SATA_TX1+ 8 SATA_TX1- 8 SATA_RX1- 8 SATA_RX1+ 8 A +5V_RUN SATA_TX5- 8 SATA_TX5+ 8 SATA HDD SATA HDD +3.3V_RUN +3.3V_RUN Place caps close to connector. Place caps close to connector. Place caps close to connector. +5V_RUN C166 *10U/10V/0805_NC C162 *1U/10V/0603_NC C151 *0.1U/16V_NC C153 *0.1U/16V_NC C270 *10U/10V/0805_NC C152 *1000P_NC C269 *1U/10V/0603_NC C267 *0.1U/16V_NC C266 *0.1U/16V_NC C268 *1000P_NC C247 C239 C240 C245 C241 *10U/10V/0805_NC 1U/10V/0603 0.1U/16V 0.1U/16V 1000P B B Place caps close to connector. +5V_RUN Place caps close to connector. +5V_RUN C167 C163 10U C154 1U/10V/0603 0.1U/16V C155 C156 0.1U/16V 0.1U/16V C277 C276 C272 C273 C274 C275 10U 1U/10V/0603 0.1U/16V 0.1U/16V 0.1U/16V 1000P C157 1000P C C 3-axis Fall Sensor (HDD data protector) 1 C209 10U 603 6.3 U3 C119 0.1U/10V 2 2 1 +3.3V_RUN DE351DL is ST vender for DELL Part Number Vender PN: LIS302DLTR Quanta PN: AL000302A00 1 VDD_IO SCL 14 WLAN_SMBCLK 13,14,21 2 GND1 SDA 13 WLAN_SMBDATA 13,14,21 3 Reserved1 SDO 12 4 GND2 Reserved2 11 5 GND3 GND4 10 6 VDD INT2 9 R53 0 7 CS INT1 8 R51 0 FFS_INT2 PCH_IRQH_GPIO2 9 DE351DLTR +3.3V_RUN +5V_RUN D 1 D 2 2 R284 100K FFS_INT2 1 Q40 2N7002W-7-F 3 1 D20 Quanta Computer Inc. FFS_INT2_R 2 RB751V40T1G PROJECT : Calpella UMA Size Document Number Rev 1A SATA (HDD&ODD) Date: 1 2 3 4 5 6 Friday, January 15, 2010 7 Sheet 23 of 8 40 1 2 3 4 5 6 7 8 KEYBOARD CONNECTOR Touch Pad +3.3V_ALW R30 2 10K/J_4 1 JKB1 +3.3V_SUS KB_DET# KSI7 KSI6 KSI4 KSI2 KSI5 KSI1 KSI3 KSI0 KSO5 KSO4 KSO7 KSO6 KSO8 KSO3 KSO1 KSO2 KSO0 KSO12 KSO16 KSO15 KSO13 KSO14 KSO9 KSO11 KSO10 KSO17 KSO18 1 3 2 20 R220 100K RP4 2 4 1 4.7KX2 A 20 LID_SW# 20 CLK_TP_SIO 20 JP1 L11 L12 DAT_TP_SIO 1 1 603 603 2 BLM18AG601SN1D TP_CLK 2 BLM18AG601SN1D TP_DATA 50 50 10 10 TP_LED2_AMBER TP_LED1_WHITE 1 1 C259 0.047U 2 C264 0.047U 2 C263 0.1U 2 C257 10P 1 1 1 C262 10P 2 50 2 1 C261 10P 2 1 2 50 1 C256 10P 2 +5V_RUN 10 C265 0.1U 20 KSO[0..18] 20 KSI[0..7] 8 7 6 5 4 3 2 1 ACS_88513-0841 10 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 GND1 +3.3V_SUS A GND2 +5V_RUN FH28-60(30)SB-1SH(05) 1 220 TP_LED2_AMBER R221 1 220 2 3 R223 2 3 TP_LED1_WHITE B B Q27 2N7002W-7-F 20 Q26 2N7002W-7-F 2 TP_LED2 1 2 TP_LED1 1 20 C29 *100P_NC 50 KSI7 CP2 8 6 4 2 1206 C30 *100P_NC 50 C31 +KB_LED *100P_NC KSO17 50 R33 1 KB_LED_DET 100K 2 LED_PWM 1 2 3 4 50 1206 1206 *100PX4_NC 7 KSO4 5 KSO7 3 KSO6 1 KSO8 CP3 8 6 4 2 50 *100PX4_NC 7 KSO3 5 KSO1 3 KSO2 1 KSO0 1206 *100PX4_NC 7 KSI6 5 KSI4 3 KSI2 1 KSI5 CP5 8 6 4 2 50 50 *100PX4_NC 7 KSI1 5 KSI3 3 KSI0 1 KSO5 1206 C 50 88513-044N R34 200K C45 0.1U/16V_4 1 2 3 4 1206 100P CAPS CLOSE TO JKB1 16 1 2 3 2 Q13 SI2304BDS-T1-E3 LED_PWM 8 1 1206L050YR 1 2 FS1 1206 +KB_LED 1 +KB_LED 50 *100PX4_NC 7 KSO14 5 KSO9 3 KSO11 1 KSO10 2 +5V_RUN CP4 8 6 4 2 CP6 8 6 4 2 J5 C CP1 8 6 4 2 KSO18 Key board illumination +KB_LED power trace width >10 mil *100PX4_NC 7 KSO12 5 KSO16 3 KSO15 1 KSO13 20 KB_BACKLITE_EN D D Quanta Computer Inc. PROJECT : Calpella UMA Size Document Number Rev 1A TP / KB Date: 1 2 3 4 5 6 Friday, January 15, 2010 7 Sheet 24 of 8 40 A B 8 7 6 5 4 3 2 1 R17 2 +5V_RUN 0 1 HDD activity LED. Note: 1. VBUS IND:VBUS indication should be supplied to single the DuoSense to connect According to the USB 2.0 specification. A GND voltage from the host should indicate a connection. 2. Maximum cable resistance on VCC, GND should be 150m ohm. 3. FPC cable should support 12MHz USB singles. A tri-state should indicate no connection. +3.3V_RUN +5V_RUN Power button for Engineer SW1 POWER_ SW_IN0# 47K 8 1 SATA_ACT# 3 Q42 2N7002W-7-F R307 220 USBP12_D+ USBP12_D- 2 3 3VALW ON POWER LOGIC ESD1 R26 1 0 1 2 3 2 1 2 3 6 5 4 USBP12_D+ 6 5 4 +3.3V_ALW 2 *PLW3216S900SQ2T1_NC 1206 +3.3V_ALW +5V_RUN 4 HDD_LED 22 L4 1 4 USBP12+ USBP12- 2 4 DHPSKRBAA00 10K ACS_88460-0801 9 9 1 3 Q41 DDTA114YUA-7-F 2 3 4 E 1 J4 USBP12_D+ USBP12_D- D 2 Touch Screen Module C USBP12_D- R16 100K *SRV05-4.TCT_NC 2 D4 21 USB_CHG_DET# 2 0 1 R25 1 USB_CHG_DET#_R +5V_ALW2 R14 100K 20 2 R19 100K D1 1 +5V_ALW2 +3.3V_ALW 1 1 BAS316 2 2 R264 100K 22 POWER_ SW_IN0# 2 47K 1 BAT1_LED# 3 C18 0.1U 16 3.3V_ALW_ON 33 POWER_ SW_IN0# Q39 2 10K Q35 2N7002W-7-F 3 D2 DDTA114YUA-7-F 3 20 R20 100K 20 1 +3.3V_ALW SYS_PWR_SW# 1 3 2 1 BAS316 Battery status. Q4 2N7002W-7-F 1 BAS316 D3 1 220 RBAT1_LED 22 2 BAT1_LED R283 2 1 3 2 C24 *0.1U_NC 10 3 BAS316 1 3 1 20,28 ACAV_IN Q2 2N7002W-7-F 2 20,33 ALW_ON +3.3V_ALW Q1 2N7002W-7-F 2 2 1 2 47K 20 Q36 2 BAT2_LED# 10K 3 DDTA114YUA-7-F BAT2_LED R279 2 20 BREATH_LED# 1 3 Q37 2N7002W-7-F RBAT2_LED 22 +5V_SUS BR_LED 21 5 R282 100K 2 1 +5V_SUS 2 4 3 +3.3V_SUS 1 68 BR_LED R285 1 100 2 BREATH_PWRLED 22 1 U14 TC7SZ04FU(T5L,F,T) Quanta Computer Inc. PROJECT : Calpella UMA Size Document Number Rev 1A SWITCH / LED / T-Screen Date: A B C D Friday, January 15, 2010 Sheet E 25 of 40 1 2 3 4 5 6 7 8 A A C114 1U/10V_6 *DA204U_NC D7 MLX_53398-0371 U4 +5V_FAN R67 20 +5V_RUN R68 FAN1_PWM VEN VIN VO SET 180K GND GND GND GND 3 2N7002W-7-F G990P11U 4.7K Q10 1 RP1 2.2KX2 8 7 6 5 SMBCLK2 20 +3.3V_RUN EC_SMBCLK2 2,22 EC_SMBCLK2 C115 1000P/50V_4 2 16 1 2 3 4 4 2 C116 0.1U 2 1 2 3 FAN1_TACH 3 1 C117 2.2U/10V 603 10 2 2 1 20 2 J7 +5V_FAN +3.3V_RUN +5V_RUN 1 +5V_RUN 3 1 D6 *SSM34PT_NC 1 2 Q11 1 2N7002W-7-F EC_SMBDAT2 2,22 EC_SMBDAT2 3 SMBDAT2 20 0907 Steg: Need to check C484 if needed B B Place under CPU 10/20mils 1 1 +3.3V_RUN U2 C35 2200P/50V_4 2 2 C317 *220P/50V_NC 2 Q33 MMST3904-7-F 1 3 REM_DIODE1_P 50 REM_DIODE1_N 50 1 VDD SCL 8 EC_SMBCLK2 2 DP SDA 7 EC_SMBDAT2 3 DN ALERT# 6 THERM_ALERT# GND 5 4 SYS_SHDN# 1 EMC1422-1-ACZL-TR 2 1.Place C160 close to EMC1422 2.Place C518 to be close to Q51 Total capacitance between D+/D- is 2200pF(max) if use 2200pF for C160, then C518 should be dummy C34 0.1U Q12 10 2N7002W-7-F SYS_SHDN# 1 3 THERM_STP# 20,33 C 2 C 20,29 IMVP_PWRGD OTP 85 degree C +3.3V_RUN R31 1 2 10K/F_4 THERM_ALERT# R32 1 2 6.8K/F_4 SYS_SHDN# D D Quanta Computer Inc. PROJECT : Calpella UMA Size Document Number Rev 1A FAN & THERMAL Date: 1 2 3 4 5 6 Friday, January 15, 2010 7 Sheet 26 of 8 40 1 2 3 4 5 6 7 8 A A +3.3V_SUS 5 C350 0.1U/16V_4 U13 TC7SZ04FU(T5L,F,T) R286 4 0/J_4 CK_PWRGD_R 2 3 2 29 VR_PWRGD_CLKEN# B B +3.3V_SUS 31 1.05V_RUN_VTT_PWRGD R219 0/J_4 R214 0/J_4 R215 0/J_4 R217 0/J_4 R216 100K/J_4 32 1.05V_RUN_PWRGD HWPG HWPG 20,29 5 34 GFX_PWRGD +3.3V_ALW +3.3V_RUN 30 1.5V_SUS_PWRGD 2 20 RUN_ON_1 1 4 RUN_ON 16,30,31,32,35,37 3 35 1.8V_RUN_PWRGD U12 74AHC1G08GW R213 2K/F_4 1 D12 C 2 SDM10K45-7-F H_VTTPWRGD R218 1K/F_4 H_VTTPWRGD 3 C VTTPWRGOOD SC(V1.0)P18: VTT_1.1 VR power good signal to processor. Signal voltage level is 1.1 V. R256 *10K/J_NC RUN_ON R255 *10K/J_NC RUN_ON_1 D D Quanta Computer Inc. PROJECT : Calpella UMA Size Document Number Rev 1A System Reset Circuit Date: 1 2 3 4 5 6 Friday, January 15, 2010 7 Sheet 27 of 8 40 A B C D E 1 1 PQ19 SI4835DDY-T1-E3 1 3 1 3 SI4835DDY-T1-E3 1 2 3 2 4 2 4 CSSP_1 1 PR114 10K 2 100K 1 PR120 10/F PR121 10/F 47F GNDA_CHG SMBUS Address 12 IINP 3 88731CCV 88731CCS PC114 0.01U 10 9 14 SCL SDA NC 8 ICM 6 5 PR136 2.21K/F PC112 0.1U PC117 0.01U 27 CSSN 25 BST VDDP 21 ICOMP 3 VREF PC111 1U PR133 4.7F VCC 26 UGATE 24 DH PHASE 23 LX LGATE 20 DL PGND 19 DLO CSOP CSON 18 17 CSIP CSIN VFB 15 NC 16 GND_PAD 29 NC 1U 5 6 7 8 BOOT VCOMP 4 88731REF 28 1 0.1U 20,36 SMBCLK0 20,36 SMBDAT0 20 VDDSMB NC PC110 ACOK 11 7 PR131 15.8K/F 13 PC105 PC109 0.1U PC90 10U/25V/1206 PQ17 FDS8884 4 1 2 3 +3.3V_ALW ACIN PC91 10U/25V/1206 LDO 5 6 7 8 20,25 ACAV_IN 2 PC88 0.1U/50V/0603 0 PR107 PL3 0.01_3720 4.7UH 20% 5.6A_7x7_MPLC0730L4R7 CHG_CS 1 1 2 3 3 4 PQ22 PC104 FDS8884 470P/50V CSIP_1 +VCHGR PC83 PC85 PC84 *3300P_NC *1000P_NC *2200P_NC PR125 1_0805 PC86 0.1U PR106 10/F PR128 Max current: 4.5A 2 4 SJ2 4 1 2 3 PC116 0.01U DCIN PR132 PC92 10U close to output Cap PC93 10U PR105 10/F 3 100 PC107 0.1U GND 88731_ACIN PR130 10K/F 22 NC PR142 49.9K/F 2 PC89 2200P/50V PC108 1U CSSP PR143 215K/F 12 PR126 CSSP 2 CSSN +DC_IN_SS LDO PJP6 jumper PC113 0.1U 2 2 PQ24 2N7002W-7-F +DC_IN_SS PR7 470K 3 PR113 8 7 6 5 1 +DC_IN_SRC PQ21 +PWR_SRC 4 +DC_IN_SS PR112 0.01_3720 1 2 3 4 8 7 6 5 PU7 ISL88731AHRZ-T VFB PC118 *1U/10V/0603_NC FREQ(FIXED) OF ISL88731 SJ3 1 400K 2 GNDA_CHG 4 4 Quanta Computer Inc. Project Name: XM2 Title CoverPage Size Document Number XM2_MB Rev D Date: Friday, January 15, 2010 A B C D Sheet E 28 of 39 5 4 3 2 1 D D PJP3 DPRSLPVR +CPU_PWR_SRC 2 1 PC137 + PC143 + *100U/25V_NC +CPU_PWR_SRC + PC140 PR20 10F_0603 1 2 3 PQ29 NTMFS4935N GND SW2 27 3212_LX2 26 3212_DH2 BST2 25 4.7U/6.3V NTMFS4943N 4 PR40 0 PC36 0.22U CSREF +VCC_CORE + P8 PC135 PR154 1_0805 1 2 3 1 2 3 24 23 22 21 20 19 18 17 16 15 14 13 1 2.05K/F 1K/F +CPU_PWR_SRC Thermistor PR42 should be placed close to the hot spot of VR. NTMFS4935N PR19 10F_0603 PQ31 NTMFS4935N + P136 B 3212_CS_PH2 PC51 470P/50V PR61 PR71 *NCP18WM224J03RB_NC 0.36uH_30A_ETQP4LR36WFC 1 4 PR51 PR62 PC69 *0.01U_NC PL6 2 PC146 470P/50V 4 PQ32 PC50 1000P PC57 1000P PR88 *0_NC 649K/F 162K/F PR81 7.32K/F 69.8K/F VSSSENSE 5 NOTE: PR? is reserved for loop gain measurement purpose. PC71 1000P/50V PR60 VCCSENSE 5 80.6K/F 0 PR65 PR96 0 PR68 PR99 PR75 +5V_SUS B +VCC_CORE TDC:32A Max current: 48A 100 3 2 PC25 0.1U/50V/0603 PQ15 *2N7002W-7-F_NC PC27 CSREF 49 PC34 DRVH2 SWFB3 AGND PWM3 12 OD3 TTSNS ILIM VRTT CSCOMP VARFREQ 11 PC23 330U/2V/ESR6 SWFB2 PR38 PC21 PQ4 330U/2V/ESR6 3212_DL2 28 +5V_SUS 3 29 100 4 PH1 VCC PH0 DPRSLP PSI VID6 VID5 VID4 VID3 30 DRVL2 10 20 IMVP6_PROCHOT# VID2 PGND TRDET CSSUM +3.3V_SUS 100K COMP CSREF PR98 32 31 LLINE +5V_SUS PVCC IREF PR97 1.65K/F 3212_DL1 +CPU_PWR_SRC DRVL1 PU2 ADP3212MNR2G RAMP 9 PR37 5 6 7 8 9 7 8 3212_LX1 33 1 2 3 FB 34 5 6 7 8 9 FBRTN 6 SW1 3212_CS_PH1 5 6 7 8 9 5 DRVH1 SWFB1 PC35 0.22U 10U/25V/1206 5.1K_F CLKEN 3212_DH1 10U/25V/1206 PR86 IMON 36 35 0.1U/50V/0603 PC61 12P PR85 39.2K/F PC66 150P PWRGD 3 4 PR35 0 BST1 2200P/50V PC72 150P EN 2 RT 1 PC67 0.068U VID1 I_MON PR80 5.49K/F C CSREF 37 38 39 40 41 42 43 44 45 46 48 PR153 1_0805 4 NTMFS4935N VID0 5 4 PQ30 *100K_NC 47 PR95 1 2 3 20,26 IMVP_PWRGD +1.05V_RUN_VTT RPM C *330U/2V/ESR6_NC PC134 27 VR_PWRGD_CLKEN# + PC139 330U/2V/ESR6 1 2 3 0.36uH_30A_ETQP4LR36WFC 1 3 PR48 PC45 2.2U/6.3V/0603 5 6 7 8 9 PR52 0 PL7 2 PC147 470P/50V 0.1U/50V/0603 0 PR93 1.91K/F PC26 4 PR43 10_0603 +3.3V_SUS PR94 1.91K/F 5 6 7 8 9 NTMFS4943N 4 VID6 H_PSI# +5V_SUS 5 6 7 8 9 5 5 DPRSLPVR 5 5 5 5 5 5 VID5 VID4 VID3 VID2 VID1 VID0 PQ3 10U/25V/1206 *0_NC 10U/25V/1206 PR87 HWPG PC28 2200P/50V 20,27 20 IMVP_VR_ON PC24 0.1U/50V/0603 PC22 5 50 PC138 + *100U/25V_NC 50 +PWR_SRC PJP2 PC144 + PC46 *100P_NC *100U/25V_NC PC49 *100P_NC 100U/25V 1 2 H_PSI# PR53 78.7K/F 165K/F PR44 130K/F PR45 130K/F PR150 220K_NTC Place close to Phase1 output inductor. PC53 1U/6.3V SJ7 2 2 1 1 Jump20X10 A A AGND_VCORE Quanta Computer Inc. Project Name: XM2 Title CoverPage Size Document Number XM2_MB Date: Friday, January 15, 2010 5 4 3 2 Rev D Sheet 1 29 of 39 A B C D E 1 1 PJP7 jumper +1.5V_PWR_SRC PC128 PC129 PC130 0.1U/50V/0603 10U/25V/1206 10U/25V/1206 5 6 7 8 9 PC127 2200P/50V +1.5V_SUS_P +PWR_SRC PR145 0.01_3720/S PC125 10U/4V_0603 +1.5V_DH 4 PQ27 +0.75V_DDR_VTT_P NTMFS4943N LGATE VTTGND PGND 2 VTTSNS CS_GND 17 3 GND CS 16 VDDP 15 VDD 14 PGOOD 13 DEM NC PC119 0.047U/25V 18 PC133 PR11 5.1K_F PR144 SJ5 2 SJ4 close to output Cap 5.1_0603 +1.5_VDD +5V_ALW PC120 1U/10V_0603 TON 6 S5 VTTREF S3 MODE 5 FB 4 RT8207AGQW PU8 1 2 3 PHASE UPGATE BOOT VTT 1 VDDQ +1.5_VDD VLDOIN GND +VTT_DDR_REF NTMFS4935N PC132 *330U/2V/E9/7343_NC 400K PQ28 + PC123 2 5 6 7 8 9 20 + PR148 1_0805 330U/2V/E9/7343 FREQ PR67 = 620K +1.5V_SUS PC131 470P/50V 19 22 21 23 24 +1.5V_DL 0.1U/10V TON 0.88uH_MPC1040LR88 +1.5V_SUS_P +1.5V_LX 4 2 PR147 0.001_3720/S PL5 2 0.1U 1 PC126 +1.5_BST PC122 10U/4V_0603 25 PC124 10U/4V_0603 0 1 PR146 1 2 3 +0.75V_DDR_VTT +1.5V_SUS TDC : 7.4A Peak: 10.5A OCP: 11.6A PC121 1U/10V_0603 PR10 100K 12 11 10 9 8 7 +3.3V_ALW 1.5V_SUS_PWRGD 27 PR141 620K S3 Power reduce +1.5V_PWR_SRC 100K 1 PQ26 BSS138-7-F 3 5,7,13 PS_S3CNTRL S3_1.5V S5_1.5V PR140 0 S3_1.5V PR135 *0_NC SUS_ON 20,37 RUN_ON 16,27,31,32,35,37 VDDQ 3 PR139 2 3 1.5V_DDR_PWRGD 3 +1.5_FB 2 PR137 76.8K/F 1 PC115 18P/50V VFB = 0.75V VDDQ and VTT discharge control VDDQ output voltage selection Outputs Management by S3, S5 control VDDQ(V) VTTREF and VTT NOTE State S3 S5 VDDQ VTTREF VTT V5IN No discharge GND 1.5V VDDQSNS/2 DDR3 S0 HI HI On On On VDDQ Tracking discharge V5IN 1.8V VDDQSNS/2 DDR2 S3 LO HI On On Off (Hi-Z) GND Non-tracking discharge S4/S5 LO LO Off (discharge) Off (discharge) Off (discharge) MODE pin 4 PR138 75K/F Discharge mode FB FB Resistors Adjusting VDDQSNS/2 0.75V < VDDQ < 3.3V 4 Quanta Computer Inc. Project Name: XM2 Title CoverPage Size Document Number XM2_MB Rev D Date: Friday, January 15, 2010 A B C D Sheet E 30 of 39 5 4 3 2 1 D D PJP1 jumper +5V_SUS +1.05VTT_PWR_SRC 1.05VTT_VDD 5 6 7 8 9 PC1 PR108 PR134 0.001_3720/S BOOT UGATE 12 1.05VTT_DH PHASE 11 1.05VTT_LX NTMFS4943N 1 2 3 13 9 2 PQ1 PC87 0.1U_50V PGOOD PR116 VOUT FB 5 6 7 8 9 8 1.05VTT_DL 3 1.05VTT_VFB PQ20 close to output Cap PR6 1_0805 + PC106 0.1U/10V NTMFS4935N B TON PR2 0 4 1 14 PR109 *15K/F_NC PGND PAD 10 PC6 470P/50V PR3 8.45K/F PR74 = 232K PC5 *1500P_NC 50 1.05VTT_VFB FREQ PC103 330U/2V/E9/7343 17 LGATE GND PR110 15K/F EN/DEM 7 15 RUN_ON CS RT8209A 6 16,27,30,32,35,37 PU6 NC NC 5 0.88uH_MPC1040LR88 +1.05V__RUN_VTT_P 9.1K/F 1 2 3 27 1.05V_RUN_VTT_PWRGD C 1 PL2 4 +1.05V_RUN_VTT 4 VDDP TON 1.05VTT_BST VDD 16 PC4 10U/25V/1206 PC94 1U/6.3V PC3 10U/25V/1206 1.05VTT_LX 1U/6.3V PC2 0.1U/25V/0603 C PR111 232K/F PC100 2200P/50V PR117 10_0603 +1.05V_RUN_VTT TDC : 12.6A Peak: 18.06A OCP : 20A +PWR_SRC B PR1 *0_NC VFB=0.75V 339K VTT_SENSE 5 PR4 20.5K/F PR5 *0_NC VSS_SENSE_VTT 5 A A Quanta Computer Inc. Project Name: XM2 Title CoverPage Size Document Number XM2_MB Date: Friday, January 15, 2010 5 4 3 2 Rev D Sheet 1 31 of 39 5 4 3 2 1 D D PJP5 jumper +1.05VPCH_PWR_SRC +PWR_SRC +5V_SUS PC73 1.05PCH_VDD PR69 1 13 9 2 PC56 0.1U/50V BOOT VDDP TON +1.05V_RUN 4 VDD 16 UGATE 12 1.05PCH_DH PHASE 11 1.05PCH_LX PQ14 FDS8884 PR34 0.01_3720/S PL1 PR54 15 VOUT FB 2 8 1.05PCH_DL 3 1.05PCH_VFB 4 PQ13 FDS6690AS close to output Cap SJ1 PR89 1_0805 + PC37 PC33 0.1U/10V 1 14 PR73 *15K/F_NC PGND PAD 10 PC59 470P/50V PR55 8.45K/F PC48 *1500P/50V_NC 220U/2.5V/ESR15 17 LGATE GND EN/DEM 7 PR72 15K/F 6 RUN_ON CS RT8209A NC 16,27,30,31,35,37 PU3 NC +1.05V_RUN_P 10.5K/F 5 6 7 8 5 2.2UH_8.2A(MPLC0730L2R2) 1 PGOOD 1 2 3 4 27 1.05V_RUN_PWRGD C 5 6 7 8 1.05PCH_BST 1U/6.3V PR74 232K/F +1.05_RUN TDC : 4.9A Peak: 7.0A OCP : 7.7A 1U/6.3V 1 2 3 PC55 PC75 10U/25V/1206 1.05PCH_LX PC47 0.1U/25V/0603 C 2200P/50V PR64 10_0603 PC74 B B TON FREQ 1.05PCH_VFB PR91 = 232K VFB=0.75 333K PR46 20.5K/F A A Quanta Computer Inc. Project Name: XM2 Title CoverPage Size Document Number XM2_MB Date: Friday, January 15, 2010 5 4 3 2 Rev D Sheet 1 32 of 39 5 4 3 PR14 2 ISL6237_ONLOD 0 PR15 390K PD4 1 PJP8 jumper D 1 PR16 150K/F 2 *UDZSTE-175.6B_NC D +PWR_SRC +5V_ALW2 PR21 +5V_VCC1 *10/0603_NC PC150 PC151 PC13 1U 5 6 7 8 9 4 FDS8884 9 8 7 6 5 PC161 +5V_DL 4 PQ37 FDS6690AS PQ36 FDS6690AS PR31 PC157 PC158 1 +3.3V_DL PR151 +5V_ALW2 PC18 1U FREQ + PR155 1_0805 4 PC16 0.1U PR32 1 TONSEL C PC155 470P/50V 5 6 7 8 9 PAD LDOREFIN LDO VIN VREF3 EN_LDO V5FILT TONSEL VREF2 35 34 33 PR23 0 3 2 1 0.1U/25V/0603 220U/6.3V/ESR25 PR157 1_0805 200K/F PR28 0 3V5V_PWGD +3.3V_EN2 +3.3V_DH +3.3V_LX 220U/6.3V/ESR25 PC160 PR25 32 31 30 29 28 27 26 25 0.1U/25V/0603 + TPS51427A REFIN2 TRIP2 OUT2 SKIPSEL PGOOD2 EN2 DVRH2 LL2 1 2 3 PR26 PC156 470P/50V PR22 *0_NC PU1 VBST1 DRVL1 V5DRV NC GND PGND DRVL2 VBST2 +5V_LX PL9 2.2UH +-20% 12A(PCMB104T-2R2MN) +3.3V_ALW_P 17 18 19 20 21 22 23 24 3 2 1 +5V_ALW_P PAD PAD PAD PAD VSW VOUT1 VFB1 TRIP1 PGOOD1 EN1 DRVH1 LL1 PAD PAD PAD PAD PAD PQ34 FDS8884 PL10 2.2UH +-20% 12A(PCMB104T-2R2MN) C 41 40 39 38 +5V_ALW_P 9 10 11 12 324K/F 3V5V_PWGD 13 +5V_EN1 14 15 16 37 36 PC17 0.1U PR158 0.01_3720/S PQ35 1 2 3 42 8 7 6 5 4 3 2 1 PR18 *0_NC 9 8 7 6 5 +5V_DH 4 +3.3V_ALW TDC : 6.4A Peak :9.1A OCP: 10A +3.3V_ALW +5V_ALW PR159 0.01_3720/S PC148 10U/25V/1206 1U/25V PC12 0.1U PR17 *0_NC 0.1U/25V/0603 PC11 PC10 0.1U PC149 2200P/50V PC9 4.7U/25V/0805 10U/25V/1206 0.1U/25V/0603 2200P/50V +5V_ALW TDC : 7.6A Peak: 10.8A OCP: 11.9A PC152 ISL6237_ONLOD PC153 +3.3V_ALW Short Jump PR30 100K OPEN OUT1/400K , OUT2/300K 3V5V_PWGD BAT54S-7-F B +5V_ALW 1 PD6 PC14 0.1U PC20 3 3V5V_PWGD B 0.1U 2 PC19 0.1U +15V_ALW PQ6 1 DDTA114YUA-7-F PD5 47K 3 +15V_ALWP 1 3 2 10K BAT54S-7-F 3 2 PC15 0.1U PQ5 2N7002W-7-F 1 2 PR33 A 20,25 ALW_ON 200K +5V_EN1 +3.3V_EN2 PR24 *0_NC PR27 0 PR29 0 A PM_THRMTRIP# 3 Quanta Computer Inc. THERM_STP# 20,26 Project Name: 3.3V_ALW_ON 25 XM2 Title CoverPage Size Document Number XM2_MB Date: Friday, January 15, 2010 5 4 3 2 Rev D Sheet 1 33 of 39 5 4 3 2 1 PJP4 jumper +5V_SUS 3211_VIN 1U/6.3V GFX_VID1 5 GFX_VID2 5 GFX_VID3 5 GFX_VID4 5 GFX_VID5 5 GFX_VID6 VCC 24 3211_VCC VID0 BST 23 3211_BST GFX_VID1 30 VID1 DRVH 22 GFX_VID2 29 VID2 SW 21 3211_SW GFX_VID3 28 VID3 PVCC 20 +5V_SUS GFX_VID4 27 VID4 DRVL 19 3211_DRVL GFX_VID5 26 VID5 PGND 18 PC39 2.2U/6.3V/0603 GFX_VID6 25 VID6 AGND 17 27 GFX_PWRGD 5 GFX_IMON +3.3V_SUS PC58 0.1U/10V T11 PR77 2 PAD 10K 1 PR67 6.98K/F C PC68 3211_VCC 220P/50V PC62 47P/50V PWRGD 2 IMON 3 CLKEN# 4 FBRTN 5 FB 6 COMP 7 GPU 8 ILIM CSCOMP 16 CSFB 15 CSREF 14 LLINE 13 RAMP 12 RT 11 RPM 10 IREF 9 3211_BST1 0_0603 PC38 2 2 1 D 0.22U/25V/0603 1 +VCC_GFX_CORE Fs=400K TDC : 12A OCP:26.4A PQ7 4 3211_DRVH NTMFS4943N PR149 0.001_3720/S PL8 2 CSCOMP PC154 470P/50V 0.88uH_MPC1040LR88 +GFX_VCORE 1 PC145 4 PQ33 NTMFS4935N CSCOMP PR156 1_0805 +VCC_GFX_CORE + PC141 330U/ESR9 2 7343 + PC142 *330U/ESR9_NC 2 7343 C 33 PC60 1000P/50V 1 PR39 PC32 *10U/25V_1206_NC 5 6 7 8 9 EN 31 0.1U/25V_0603 5 32 GFX_VID0 PC29 10U/25V_1206 1 2 3 GFX_VID0 5 6 7 8 9 GFX_EN 5 GNDEP 5 0 GFXVR_EN_R 1 2 3 PR63 PC30 0.1U/25V_0603 1 2 PC31 2200P 50 2 2 3 1 1 SJ6 1 4 PC42 PU4 ADP3211A D 2 +PWR_SRC PR36 10_0603 PR92 PC70 1K/F PR91 20K/F 470P/50V PR79 10.7K/F CSCOMP PR78 0 PR90 0 B B VCC_AXG_SENSE 5 VSS_AXG_SENSE 5 PR76 80.6K/4 PR70 PR66 340K/F_0603 PR152 220K_NTCTSM1B224J4503R 237K/F_0603 Place close to CPU socket VCC_AXG_SENSE & VSS_AXG_SENSE pins PR47 78.7K/F +GFX_VCORE PR13 100/F PR12 100/F PR59 422K/F PC44 470P/50V PR50 165K/F PR49 35.7K/F Place close to PR140, PR141 +GFX_VCORE pins A PC43 1000P/50V 3211_VIN +VCC_GFX_CORE Control IC: ADP3211 H/S MOSFET: FDMS7692(Fairchild), Qg=7nC, Rds(on)=13mohm, PD:2.5W L/S MOSFET: FDMS0310S(Fairchild), Qg=15nC, Rds(on)=5.15mohm, PD:2.5W Inductor: 0.56UH +-20% 25A(MPO104-R56)(Delta), DCR=1.6mohm Output Cap: 1*390U,2.5V(20%,105C,6.3*5.8),ESR=10mohm PR56 1K/F PC54 1000P/50V PC52 1000P/50V A Quanta Computer Inc. PROJECT : GM6 UMA MB Size Document Number Rev 1A GFX_VCORE (ADP3211) Date: 5 4 3 2 Sheet Friday, January 15, 2010 1 34 of 39 5 4 3 2 1 D D +1.8V_RUN TDC : 0.75A Peak: 1.07A PQ16 FDMS7692 9 8 7 6 5 +3.3V_ALW PC80 0.1U PR104 0.01_3720/S 4 PC78 10U 3 2 1 C C +1.8V_RUN PR100 *100K_NC PU5 27 1.8V_RUN_PWRGD 16,27,30,31,32,37 PR103 RUN_ON 0 PGD 1 EN 6 VCC RT9024PE DRV 5 FB PC76 100P PR101 49.9K/F PC82 22U/6.3V PC81 *22U/6.3V_NC 3 Vref =0.8 2 +5V_ALW 4 GND +3.3V_SUS PC77 0.1U PC79 1U/10V/0603 PR102 39K/F B B A A Quanta Computer Inc. Project Name: XM2 Title CoverPage Size Document Number XM2_MB Date: Friday, January 15, 2010 5 4 3 2 Rev D Sheet 1 35 of 39 A B C D E 2 PD3 DA204U 1 2 PD2 DA204U 1 2 1 +3.3V_ALW PD1 DA204U +3.3V_ALW 3 3 1 3 1 PR9 100K CN1 BATT1+ BATT2+ SMB_CLK SMB_DAT BATT_PRES# SYSPRES# BATT_VOLT BATT1BATT2- 1 2 3 4 5 6 7 8 9 PRP1 3 1 PR8 +VCHGR 4P2R-100 4 2 SMBCLK0 20,28 SMBDAT0 20,28 PBAT_PRES# 20 100 SUY_200045MR009G537ZL PQ18 +DC_IN 1 Adapter2- 2 Adapter3- 3 Adapter4- 4 PSID 5 Adapter1+ 6 Adapter2+ 7 Adapter3+ 8 Adapter_DCIN+ +DC_IN_SS 1 2 3 PC98 0.47U/25V/0805 8 7 6 5 PR118 240K 2 PC95 0.01U/25V PR115 10K/F/0603 PC97 0.1U/50V/0603 PC96 4.7U/25V/0805 PC99 0.1U/50V/0603 100K PR119 1 Adapter1- SI4835DDY-T1-E3 4 CN2 2 FL2 *BLM41PG600SN1L_NC 1 2 FL1 BLM41PG600SN1L 1 2 +5V_ALW2 PC101 PC102 4700P/25V 0.01U/25V PQ25 FDV301N PL4 BLM11B102S 1 2 DOCK_PSID PD7 DA204U PR122 2.2K PR127 33 1 PS_ID 20 2 3 +3.3V_ALW 3 3 3 2 PRV1 *VZ0603M260AGT_NC 1 2 MLX_87438-0843 PR124 100K/F PR129 10K +5V_ALW2 3 PD8 *SSM24PT_NC PQ23 2 1 MMST3904-7-F 4 4 Quanta Computer Inc. PR123 15K/F Project Name: XM2 Title CoverPage Size Document Number XM2_MB Date: Friday, January 15, 2010 A B C D Rev D Sheet E 36 of 39 2 +5V_ALW2 3 +5V_ALW +15V_ALW +5V_RUN PQ40 FDS8884 8 7 6 5 PR57 100K +5V_ALW2 +5V_RUN TDC : 3.38A 3 2 1 5 +15V_ALW RUN_ENABLE_5V PR58 100K SUS_3.3V_ENABLE 2 RUN_ON PC40 4700P 25 PQ8B 2N7002DW-7-F +3.3V_SUS TDC : 0.38A 3 2 1 3 SUS_ON# 20,30 2 SUS_ON +1.5V_SUS +15V_ALW +1.5V_RUN PQ2 FDS8884 3 2 1 PC41 4700P 25 PC162 0.1U 0603 50 +15V_ALW PQ41 +5V_ALW FDS8884 8 7 6 5 PR84 100K +5V_SUS +5V_SUS TDC : 2.8A 3 2 1 SUS_ENABLE_5V 2 B +15V_ALW +3.3V_ALW PQ38 FDS8880_NL 8 7 6 5 SUS_ON# PC7 0.1U 0603 50 2 PQ12 2N7002W-7-F PC65 4700P 25 PC164 0.1U 0603 50 B +3.3V_RUN +3.3V_RUN TDC : 5.4A 3 2 1 4 PR83 100K 3 PC63 4700P 25 1 PQ10 2N7002W-7-F 1 RUN_ON# 4 3 RUN_ENABLE_1.5V_GDDR A PQ9A 2N7002DW-7-F +1.5V_RUN TDC : 0.35A 4 8 7 6 5 PR82 100K 5 PQ9B 2N7002DW-7-F 1 1 16,27,30,31,32,35 PC163 0.1U 0603 50 PQ8A 2N7002DW-7-F 4 4 6 5 8 7 6 5 PR42 100K 6 RUN_ON# +3.3V_SUS PQ39 FDS8884 3 A +3.3V_ALW 4 PR41 100K 4 4 1 3 RUN_ENABLE_3.3V RUN_ON# PC64 4700P 25 1 2 PQ11 2N7002W-7-F PC159 0.1U 0603 50 C C Reserve discharge path +1.5V_SUS +3.3V_SUS R316 *1K_NC R315 *1K_NC 3 R39 *30/F_NC 3 R225 *1K_NC +5V_SUS 3 +0.75V_DDR_VTT R40 *1K_NC 3 R222 *1K_NC 3 R314 *10_NC 3 R317 *10_NC +1.5V_RUN 3 +1.8V_RUN +3.3V_RUN 3 +5V_RUN D D 2 2 Q15 *2N7002W-7-F_NC 2 Q45 *2N7002W-7-F_NC Q44 *2N7002W-7-F_NC Quanta Computer Inc. 1 Q29 *2N7002W-7-F_NC 1 SUS_ON# 2 Q16 *2N7002W-7-F_NC 1 1 1 2 Q28 *2N7002W-7-F_NC 1 2 Q43 *2N7002W-7-F_NC 1 2 Q46 *2N7002W-7-F_NC 1 RUN_ON# 2 Project Name: XM2 Title CoverPage Size Document Number XM2_MB Date: Friday, January 15, 2010 1 2 3 4 Rev D Sheet 5 37 of 39 1 2 3 4 5 6 7 8 A A 1 1 H15 *h-tc244bc224d126p2_NC h-tc244bc224d126p2 For CPU Use 1 H5 *H-C283D146P2_NC INTEL-CPU-BRACKET 3 1 4 H13 *h-c295d138p2_NC h-c295d138p2 1 H6 *H-c236d83p2_NC H-c236d83p2 2 H1 *H-c236d83p2_NC H-c236d83p2 B B 1 H4 *h-c276d126p2_NC h-c276d126p2 H20 *H-c315d126p2_NC H-c315d126p2 1 1 H12 *h-tc315bc268d126p2_NC h-tc315bc268d126p2 1 H7 *h-tc276bc315d126p2_NC h-tc276bc315d126p2 1 H3 *h-tc276bc315d126p2_NC h-tc276bc315d126p2 1 H14 *H-c236d126p2_NC H-c236d126p2 1 H17 *H-c236d126p2_NC H-c236d126p2 C C H19 *h-c276d276n_NC h-c276d276n 1 H16 *h-o122x236d122x236n_NC h-o122x236d122x236n 1 H10 *h-c276d276n_NC h-c276d276n H2 *h-c122d122n_NC h-c122d122n H18 *h-c276d276n_NC h-c276d276n 1 1 1 1 H11 *h-c276d276n_NC h-c276d276n H8 *h-c276d276n_NC h-c276d276n 1 1 H9 *h-c276d276n_NC h-c276d276n D D Quanta Computer Inc. Project Name: GM7 Title PAD & SCREW Size Document Number Date: Friday, January 15, 2010 1 2 3 4 5 6 7 Rev D Sheet of 38 8 40 1 2 3 4 5 6 7 8 +3.3V_SUS +3.3V_RUN 202 2.2K 2.2K 2.2K 2.2K 200 WLAN_SMBCLK 30 WLAN_SMBDATA 32 SO-DIMM +3.3V_RUN H14 ICH_SMBCLK C8 ICH_SMBDATA 7002 A MINICARD(WLAN/WWAN) A 7002 +3.3V_RUN 13 +3.3V_SUS G-Sensor 14 2.2K G6 SMB_CLK_ME0 G8 SMB_DATA_ME0 2.2K +3.3V_SUS PCH +3.3V_ALW 2.2K 10K 2.2K 10K +3.3V_SUS E10 SMB_CLK_ME1 G12 SMB_DATA_ME1 7002 SMBCLK1 115 SMBDAT1 116 EC 7002 +3.3V_SUS B B +3.3V_ALW 2.2K 2.2K 110 SMBCLK0 9 111 SMBDAT0 10 100 CHARGER 4 3 BATTERY 100 +3.3V_ALW SIO ITE8502 +3.3V_SUS C 2.2K 2.2K 2.2K C 2.2K +3.3V_SUS 115 SMBCLK1 116 SMBDAT1 SMB_CLK_ME1 115 7002 SMB_DATA_ME1 116 PCH 7002 +3.3V_ALW +3.3V_SUS +3.3V_ALW +3.3V_ADM1032A 2.2K 4.7K 2.2K 4.7K +3.3V_ADM1032A 117 SMBCLK2 118 SMBDAT2 8 7002 7 VGA THERMAL 7002 +3.3V_ADM1032A +3.3V_RUN 32 2.2K 31 2.2K CLOCK +3.3V_RUN 8 7002 D 7 THERMAL(EMC1422) D 7002 +3.3V_RUN MMB Quanta Computer Inc. GM7 Project Name: Title SMBus Size Document Number SMBus Date: Friday, January 15, 2010 1 2 3 4 5 6 7 Rev D Sheet 8 39 of 40 www.s-manuals.com
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