Quanta ZE7 Schematics. Www.s Manuals.com. R1b Schematics
User Manual: Motherboard Quanta ZE7 DA0ZE7MB6D0 - Schematics. Free.
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A A
B B
C C
D D
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
Block Diagram
1B
1 40Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
Block Diagram
1B
1 40Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
Block Diagram
1B
1 40Wednesday, November 02, 2011
ZE7
Micro-FCBGA8
Cedarview-M
P5~9
ZE7 Block Diagram (Intel Cedar Trail-M Platform)
LVDS/eDP CONN
Channel A
VGA CONN
P18
LVDS 18bit,SC
Tigerpoint (NM10)
P10~15
(360 balls,17x17mm)
USB 2.0
DDR III,800/1066 MT/s
P18
(32nm)
400 / 640MHz
UNBUFFERED
DDRIII SODIMM
PCIE Gen1
P4
RC-B/F
P17
DDI0
HDMI CONN
DDI1
CLK Gen.
SLG8LV631V
P2
1366x768
1920x1200
1366x768
HDMI 1.3a
1.5W
vFBGA
USB PORT
P21
RTS5209-GR
CARDREADER
P26
USB interface
module P19
DC(3.5W) & DC(6.5W)
PWM FAN
P6
CCD
P18
USB PORT
P21
USB PORT
P21
0ohm
RTL8105TA-VC-CG
P22
RJ45 CONN
P22
5 IN1 CARDREADER
P26
SD3.0, MS, MS PRO,
xD, MMC
Thermal Protection
P35
BATTERY CHAGER
P29
+1.05V
P32
SYSTEM
5V/3V PCU
P30
DDR 1.5VSUS
P33
Discharge/+1.8V/
+3.3V_PRIME
P34
CPU Core
Gfx Core
P31
x2 DMI Gen1
Charger
Touch Pad
EC
Keyboard
SPI Flash
P27
P27
P19 P19 P29
Nuvoton NPCE791L
DAC
P25
Mini card1
Mini card2
P25
MM-SIM CARD
P25
(22x22mm)
Audio CODEC
Realtek 271X
P20
HD AUDIO I/F
P20
MIC In Jack
Analog MIC
Speaker Header (2W)
Mobile 2.5" HDD
P24
SATA II I/F
CLK2/3, H=4
0
1
3
0
0 21
2
4
5
3
6
7
Right Down Right Up
Left
01
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5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VDD_CLK_3.3V
ITP_EN
33M_SEL FSC
PM_STPPCI#_R
VDD_CLK_1.5V
VDD_CLKIO_1.05V
CG_XIN
CG_XOUT
CG_XOUT
CG_XIN
SMBCK1
SMBDT1
ITP_EN
FSB
PM_STPCPU#_R
PM_STPPCI#_R
CLKREQ_MPC#_R
CLKREQ_MMC#_R
CLKREQ_LAN#_R
33M_SEL
USB_48M
FSB
ITP_EN
FSC
33M_SEL
CLKREQ_LAN#_R
CLKREQ_MMC#_R
CLKREQ_MPC#_R
FSB
FSC
PM_STPCPU#_R
DREFCLK_R
DREFCLK#_R
USB_48M
HWPG
CLKREQ_MPC# [25]
CLKREQ_MMC# [26]
PM_STPCPU# [13]
PM_STPPCI# [13]
CLK_MCH_BCLK [6]
CLK_MCH_BCLK# [6]
CLK_DDR3_REFCLK [8]
CLK_DDR3_REFCLK# [8]
DREFSSCLK [5]
DREFSSCLK# [5]
CLK_PCIE_SATA# [11]
CLK_PCIE_SATA [11]
14M_ICH[13]
PCLK_DEBUG[25]
PCLK_ICH[12]
CLKREQ_LAN# [22]
HWPG [13,16,27]
SMBDT1[4,13,25] SMBCK1[4,13,25]
LCLK_EC[27]
CLK_PCIE_LANP [22]
CLK_PCIE_LANN [22]
CLK_PCIE_DMIP [5]
CLK_PCIE_DMIN [5]
CLK_PCIE_MPC_P [25]
CLK_PCIE_MPC_N [25]
CLK_PCIE_ICH# [10]
CLK_PCIE_ICH [10]
CLK_PCIE_MMC_P [26]
CLK_PCIE_MMC_N [26]
CLKUSB_48[10]
CLK_PCIE_MNC_P [25]
CLK_PCIE_MNC_N [25]
DREFCLK [5]
DREFCLK# [5]
+3V
+1.05V
+3V
+3V +3V +3V
+1.5V
+3V
+3V
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
CLOCK GENERATOR
1B
2 40Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
CLOCK GENERATOR
1B
2 40Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
CLOCK GENERATOR
1B
2 40Wednesday, November 02, 2011
ZE7
0.1uF near every power pin
Place close to L32
0.1uF near every power pin
Place close to L27
Place close to L28
VDD_IO can be ranging from 1.05V to 3.3V.
0= Pin 11 as 25MHz
1 = Pin 11 as 33MHz
FSC FSB Frequency
0 0 133MHz
0 1 166MHz
1 1 200MHz
1 0 100MHz
Register B5b4 for CLKREQ_B#
0 = SRC3, 1=SRC4
Control SRC_3
Control SRC_5 Register B5b3 for CLKREQ_C#
0 = SRC5, 1=SRC6
From SB
To CPU (DDR3 IO CLK)
To CPU (Host CLK) 100 MHz
100 MHz
To CPU (DPLSS CLK) 100 MHz
100 MHzTo SB (SATA CLK)
100 MHzTo LAN (LAN)
0.1uF near every power pin
Load Capacitance=20p
Control SRC_1
<EMI>
02
Register B5b6 for CLKREQ_A#
0 = SRC1, 1=SRC2
CLK GEN (CLK)
<20100720_Sam> Keep 100MHz as default.
<20100819_FAE Poyueh> Add 2.2ohm resistor for noise suppress
<20100803_Sam> Reserve 0ohm to connect to CK505, 10Kohm pull up is required.
To CPU (DMI CLK) 100 MHz
100 MHzTo Mini Card 1 (WLAN)
To SB (DMI CLK) 100 MHz
100 MHzTo Card Reader (MMC)
0 = Pin 43/44 as SRC_1
1 = Pin 43/44 as CPU_ITP
To Mini Card 2 (3G/Wimax) 100 MHz
96 MHzTo CPU (PLL CLK)
<20100819> Add 475ohm resistors to prevent current leakage
<20101109> Place R235/ R241/ R248/ R254 close to U13
<Layout note>
Crystal place within 500mil of CK505
<20110110> CFG input hardware strapping to allocate PLL assignment.
LOW = Both CPU and SRC clock drive from PLL3
HIGH = CPU clock drive from PLL1, SRC clock drive from PLL3.
Contains 100kΩ pull-down resistor.
<20110110> DPL_REFSSCCLK is used to drive internal
registers and logics of the display interface and therefore
needs to be present at all times.
<20110221> Reserve 0.1F cap to solve that PCICLK (EC 33MHz) sometimes
will change to 25MHz after flash BIOS and restart in first time issue.
C228
10U/10V_8
C228
10U/10V_8
R219 2.2/J_6R219 2.2/J_6
1 2
R204 475/F_4R204 475/F_4
C238
33P/50V_4
C238
33P/50V_4
R229 *0/J_4R229 *0/J_4
C277
.1U/10V_4
C277
.1U/10V_4
C278
.1U/10V_4
C278
.1U/10V_4
C357
*0.1U/10V_4
C357
*0.1U/10V_4
R313 *10K/J_4R313 *10K/J_4
R301 10K/J_4R301 10K/J_4
R312 33/J_4R312 33/J_4
U12
SLG8LV631V
U12
SLG8LV631V
VSS_LCD
22
VDD_CORE_1.5 45
SRC_5 32
SRC_5# 31
SRC_2 41
SRC_2# 40
VSS_SRC
39
DOT96#/SRC7# 19
SCL
8SDA
7
REF/FSC
6
VDD_REF_3.3
5
XTAL_IN
4XTAL_OUT
3
VSS_REF
56
CKPWRGD/PD# 55
CPU_1 50
CPU_1# 49
VSS_CPU
51
VDD_CPU_IO_1.05
48
PCI_STOP# 36
DOT96/SRC7 18
VDD_SRC_IO_1.05
35
VDD_CORE_1.5 23
VSS_PCI
12
VDD_48M_3.3
14
Thermal Pad
57
SRC_6# 27
SRC_6 28
PCIF/ITP_EN
10
VDD_PCI_3.3
9
USB48_1/FSB
15
25MHz/PCI_2/SEL_33MHz
11
VSS_48M
16
CLKREQ_B# 46
VSS_SATA
24
SRC_3 38
SRC_3# 37
SRC_4 34
SRC_4# 33
CPU_STOP# 42
SRC_1/CPU_ITP 44
SRC_1/CPU_ITP# 43
CPU_0 53
CPU_0# 52
LCD_CLK 20
LCD_CLK# 21
SATA 26
SATA# 25
VDD_SRC_IO_1.05
30
USB48_2
17
CLKREQ_C# 29
CLKREQ_A# 47
NC
1
NC
2
NC
13
NC
54
C225
.1U/10V_4
C225
.1U/10V_4
R293 33/J_4R293 33/J_4
C259 *10P/50V_4C259 *10P/50V_4
R317 *10K/J_4R317 *10K/J_4
C229
.1U/10V_4
C229
.1U/10V_4
R300 *0/J_4R300 *0/J_4
C266 *10P/50V_4C266 *10P/50V_4
R289 10K/J_4R289 10K/J_4
C224
10U/10V_8
C224
10U/10V_8
R221 *0/short_6R221 *0/short_6
R250 10K/J_4R250 10K/J_4
L27
PBY160808T-301Y-N/2A/300ohm_6
L27
PBY160808T-301Y-N/2A/300ohm_6
R199 475/F_4R199 475/F_4
C249
.1U/10V_4
C249
.1U/10V_4
Y2 14.318MHZY2 14.318MHZ
21
C279 *10P/50V_4C279 *10P/50V_4
C280 *10P/50V_4C280 *10P/50V_4
R318 10K/J_4R318 10K/J_4
C245 *10P/50V_4C245 *10P/50V_4
R230 10K/J_4R230 10K/J_4
C254
.1U/10V_4
C254
.1U/10V_4
R284 475/F_4R284 475/F_4
L32
PBY160808T-301Y-N/2A/300ohm_6
L32
PBY160808T-301Y-N/2A/300ohm_6
R212 10K/J_4R212 10K/J_4
R291 33/J_4R291 33/J_4
C285
10U/10V_8
C285
10U/10V_8
R279 10K/J_4R279 10K/J_4
C242
.1U/10V_4
C242
.1U/10V_4
R306 10K/J_4R306 10K/J_4
R259 *10K/J_4R259 *10K/J_4
R311
*20K/J_4
R311
*20K/J_4
R213 10K/J_4R213 10K/J_4
R299 *0/J_4R299 *0/J_4
R295 *10K/J_4R295 *10K/J_4
C253
.1U/10V_4
C253
.1U/10V_4
C236
33P/50V_4
C236
33P/50V_4
R310
*100K_4
R310
*100K_4
R251 *0/J_4R251 *0/J_4
R296 22/J_4R296 22/J_4
L28
PBY160808T-301Y-N/2A/300ohm_6
L28
PBY160808T-301Y-N/2A/300ohm_6
R304 22/J_4R304 22/J_4
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5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
Reserved
1B
3 40Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
Reserved
1B
3 40Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
Reserved
1B
3 40Wednesday, November 02, 2011
ZE7
03
![](asset-4.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+SMDDR_VREF_DIMM
M_A_A0
M_A_A14
M_A_A13
M_A_A12
M_A_A10
M_A_A9
M_A_A8
M_A_A7
M_A_A6
M_A_A5
M_A_A4
M_A_A2
M_A_A3
M_A_A1
SMBCK1
SMBDT1
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
DIMM1_SA0
DIMM1_SA1
+SMDDR_VREF_DQ0
M_A_A11
M_A_A15
+SMDDR_VREF_DIMM_R
+SMDDR_VREF_DQ0_R
+SMDDR_VREF
+SMDDR_VREF_DQ0
+SMDDR_VREF_DIMM
+SMDDR_VREF
M_A_A[15:0][8]
M_A_BS0[8] M_A_BS1[8] M_A_BS2[8] M_CS#2[8] M_CS#3[8] M_CLK2[8] M_CLK2#[8] M_CLK3[8] M_CLK3#[8] M_CKE2[8] M_CKE3[8] M_A_CAS#[8] M_A_RAS#[8] M_A_WE#[8]
M_A_DQS[7:0][8]
M_A_DQS#[7:0][8]
M_A_DM[7:0][8]
M_ODT2[8] M_ODT3[8]
M_A_DQ[63:0] [8]
SMBCK1[2,13,25] SMBDT1[2,13,25]
DDR3_DRAMRST#[8]
+1.5VSUS
+3V
+SMDDR_VREF_DIMM
+1.5VSUS
+3V
+SMDDR_VREF_DQ0
+0.75V_DDR_VTT
+0.75V_DDR_VTT
+1.5VSUS
+0.75V_DDR_VTT
+1.5VSUS +SMDDR_VREF
+SMDDR_VREF
+1.5VSUS
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
DDRIII SO-DIMM-0
1B
4 40Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
DDRIII SO-DIMM-0
1B
4 40Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
DDRIII SO-DIMM-0
1B
4 40Wednesday, November 02, 2011
ZE7
2.48A
DIMM0 H=4mm
04
LAYOUT NOTE: PLACE CAPS
NEAR DIMM-0
<20100827> Add by DG request
Place these Caps near DIMM0
DDR_STD(DDR)
<Layout note>
PLACE TWO 1K RESISTORS CLOSE TO CPU DIMM ON DDR_VREF_DQ
<Layout note>
PLACE TWO 1K RESISTORS CLOSE TO CPU DIMM ON
DDR_VREF_CA
Populate rules: populate
SODIMM1 first
Strictly follow the mapping
between clock/control signal
groups and SODIMMs, as
well as SMB address. Other
configurations/mappings will
not
be supported by MRC
DESIGN NOTE:
ADDRESS-(A2)H
R150
10K/J_4
R150
10K/J_4
C165
1U/6.3V_4
C165
1U/6.3V_4
R198 *0/J_4R198 *0/J_4
PC2100 DDR3 SDRAM SO-DIMM
(204P)
JDIM1A
DDR3-DIMM0_H=4_STD
PC2100 DDR3 SDRAM SO-DIMM
(204P)
JDIM1A
DDR3-DIMM0_H=4_STD
A0
98
A1
97
A2
96
A3
95
A4
92
A5
91
A6
90
A7
86
A8
89
A9
85
A10/AP
107
A11
84
A12/BC#
83
A13
119
A14
80
A15
78
BA0
109
BA1
108
BA2
79
S0#
114
S1#
121
CK0
101
CK0#
103
CK1
102
CK1#
104
CKE0
73
CKE1
74
CAS#
115
RAS#
110
WE#
113
SA0
197
SA1
201
SCL
202
SDA
200
ODT0
116
ODT1
120
DM0
11
DM1
28
DM2
46
DM3
63
DM4
136
DM5
153
DM6
170
DM7
187
DQS0
12
DQS1
29
DQS2
47
DQS3
64
DQS4
137
DQS5
154
DQS6
171
DQS7
188
DQS#0
10
DQS#1
27
DQS#2
45
DQS#3
62
DQS#4
135
DQS#5
152
DQS#6
169
DQS#7
186
DQ0 5
DQ1 7
DQ2 15
DQ3 17
DQ4 4
DQ5 6
DQ6 16
DQ7 18
DQ8 21
DQ9 23
DQ10 33
DQ11 35
DQ12 22
DQ13 24
DQ14 34
DQ15 36
DQ16 39
DQ17 41
DQ18 51
DQ19 53
DQ20 40
DQ21 42
DQ22 50
DQ23 52
DQ24 57
DQ25 59
DQ26 67
DQ27 69
DQ28 56
DQ29 58
DQ30 68
DQ31 70
DQ32 129
DQ33 131
DQ34 141
DQ35 143
DQ36 130
DQ37 132
DQ38 140
DQ39 142
DQ40 147
DQ41 149
DQ42 157
DQ43 159
DQ44 146
DQ45 148
DQ46 158
DQ47 160
DQ48 163
DQ49 165
DQ50 175
DQ51 177
DQ52 164
DQ53 166
DQ54 174
DQ55 176
DQ56 181
DQ57 183
DQ58 191
DQ59 193
DQ60 180
DQ61 182
DQ62 192
DQ63 194
C214
2.2U/6.3V_6
C214
2.2U/6.3V_6
C185
1U/6.3V_4
C185
1U/6.3V_4
C199
10U/6.3V_6
C199
10U/6.3V_6
C168
10U/6.3V_6
C168
10U/6.3V_6
C169
.1U/10V_4
C169
.1U/10V_4
R149 *0/J_4R149 *0/J_4
C196
10U/6.3V_6
C196
10U/6.3V_6
C192
1U/6.3V_4
C192
1U/6.3V_4 C216
.1U/10V_4
C216
.1U/10V_4
C198
10U/6.3V_6
C198
10U/6.3V_6
C205
0.1U/50V_6
C205
0.1U/50V_6
R191 1K/F_4R191 1K/F_4
R148 1K/F_4R148 1K/F_4
C193
.1U/10V_4
C193
.1U/10V_4
C176
1U/6.3V_4
C176
1U/6.3V_4
C175
1U/6.3V_4
C175
1U/6.3V_4
C161
1U/6.3V_4
C161
1U/6.3V_4
R205 0/J_4R205 0/J_4
C162
1U/6.3V_4
C162
1U/6.3V_4 C170
.1U/10V_4
C170
.1U/10V_4
C179
.1U/10V_4
C179
.1U/10V_4
C173
1U/6.3V_4
C173
1U/6.3V_4
C160
.1U/10V_4
C160
.1U/10V_4
C171
.1U/10V_4
C171
.1U/10V_4
PC2100 DDR3 SDRAM SO-DIMM
(204P)
JDIM1B
DDR3-DIMM0_H=4_STD
PC2100 DDR3 SDRAM SO-DIMM
(204P)
JDIM1B
DDR3-DIMM0_H=4_STD
VDD1
75
VDD2
76
VDD3
81
VDD4
82
VDD5
87
VDD6
88
VDD7
93
VDD8
94
VDD9
99
VDD10
100
VDD11
105
VDD12
106
VDD13
111
VDD14
112
VDD15
117
VDD16
118
VDD17
123
VDD18
124
VDDSPD
199
NC1
77
NC2
122
NCTEST
125
EVENT#
198
RESET#
30
VREF_DQ
1
VREF_CA
126
VSS1
2
VSS2
3
VSS3
8
VSS4
9
VSS5
13
VSS6
14
VSS7
19
VSS8
20
VSS9
25
VSS10
26
VSS11
31
VSS12
32
VSS13
37
VSS14
38
VSS15
43
VSS16 44
VSS17 48
VSS18 49
VSS19 54
VSS20 55
VSS21 60
VSS22 61
VSS23 65
VSS24 66
VSS25 71
VSS26 72
VSS27 127
VSS28 128
VSS29 133
VSS30 134
VSS31 138
VSS32 139
VSS33 144
VSS34 145
VSS35 150
VSS36 151
VSS37 155
VSS38 156
VSS39 161
VSS40 162
VSS41 167
VSS42 168
VSS43 172
VSS44 173
VSS45 178
VSS46 179
VSS47 184
VSS48 185
VSS49 189
VSS50 190
VSS51 195
VSS52 196
VTT1 203
VTT2 204
GND 205
GND 206
R151
*10K/J_4
R151
*10K/J_4
C190
*10U/6.3V_6
C190
*10U/6.3V_6
C197
10U/6.3V_6
C197
10U/6.3V_6
+
C203
*330U/2V_7343
+
C203
*330U/2V_7343
C166
0.1U/50V_6
C166
0.1U/50V_6
C191
1U/6.3V_4
C191
1U/6.3V_4
R208
1K/F_4
R208
1K/F_4
R170
10K/J_4
R170
10K/J_4
C200
*10U/6.3V_6
C200
*10U/6.3V_6
R146 0/J_4R146 0/J_4
C189
1U/6.3V_4
C189
1U/6.3V_4
C194
.1U/10V_4
C194
.1U/10V_4
C163
10U/6.3V_6
C163
10U/6.3V_6
R147
1K/F_4
R147
1K/F_4
C178
.1U/10V_4
C178
.1U/10V_4
C164
1U/6.3V_4
C164
1U/6.3V_4
C172
10U/6.3V_6
C172
10U/6.3V_6
C184
1U/6.3V_4
C184
1U/6.3V_4C167
2.2U/6.3V_6
C167
2.2U/6.3V_6
![](asset-5.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ECPWROK
LBKLT_EN
HDMI_DDI0_HPD#
DDI0_TX2_DP
DDI0_TX2_DN
DDI0_TX1_DP
DDI0_TX1_DN
DDI0_TX0_DP
DDI0_TX0_DN
DDI0_TX3_DP
DDI0_TX3_DN
H_RSVD_TP_H15
H_RSVD_TP_J15
DDI1_AUX_DP
DDI1_AUX_DN
DDI1_HPD#
DDI1_TX0_DN
DDI1_TX0_DP
H_RSVD_TP_J17
H_RSVD_TP_H17
BREF1.8V
EXT_BANDGAP
ACZ_SDINO_R
LIBG
LBKLT_EN
INT_LVDS_DIGON_Q
CRT_DDC_SDA
CRT_DDC_SCL
DMI_REF1.5V_R
LCD_DATA
LCD_CLK
DDI0_AUXN
DDI0_AUXP
DREFCLK_R1
DREFCLK#_R1
DREFCLK_R1
DREFCLK#_R1
ECPWROK
INT_LVDS_DIGON_Q
TX0_HDMI-
TX2_HDMI-
TX1_HDMI+
TX3_HDMI+
TX1_HDMI-
TX0_HDMI+
TX3_HDMI-
TX2_HDMI+
DDI1_TX1_DN
DDI1_TX1_DP
DDI1_TX2_DN
DDI1_TX2_DP
DDI1_TX3_DN
DDI1_TX3_DP
THERMAL_SCL THERMAL_SDA
THERM_ALERT#_1
DDI1_DDC_SDA
DDI1_DDC_SCL
CRT_IREF
INT_LVDS_BLON [18]
CRT_R [18]
CRT_G [18]
CRT_B [18]
CRT_DDC_SCL [18]
HDMI_DDI0_HPD#[17]
DDI1_TX0_DP[18]
DREFSSCLK [2]
DREFSSCLK# [2]
LCD_DATA [18]
TXLOUT0+ [18]
TXLOUT0- [18]
TXLOUT1+ [18]
TXLOUT1- [18]
TXLOUT2+ [18]
TXLOUT2- [18]
INT_LVDS_PWM [18]
TXLCLKOUT+ [18]
TXLCLKOUT- [18]
ACZ_BITCLK_CPU[13] ACZ_SYNC_CPU[13]
ACZ_SDOUT_CPU[13]
ACZ_SDINO[13]
ACZ_RST#_CPU[13]
CRT_DDC_SDA [18]
DMI_TXP0[10] DMI_RXP0 [10]
DMI_RXN0 [10]
DMI_RXP1 [10]
DMI_RXN1 [10]
DMI_TXN0[10] DMI_TXP1[10] DMI_TXN1[10]
CLK_PCIE_DMIP[2] CLK_PCIE_DMIN[2]
ECPWROK[8,13,16,27]
DDI0_HDMI_SDA[17]
DDI1_AUX_DP[18] DDI1_AUX_DN[18]
DDI1_HPD#[18]
DDI1_TX0_DN[18]
LCD_CLK [18]
CRT_HSYNC [18]
CRT_VSYNC [18]
INT_LVDS_DIGON [18]
DDI0_HDMI_SCL[17]
DMI_TXP2[10] DMI_TXN2[10] DMI_TXP3[10] DMI_TXN3[10]
DMI_RXP2 [10]
DMI_RXN2 [10]
DMI_RXP3 [10]
DMI_RXN3 [10]
DREFCLK [2]
DREFCLK# [2]
TX2_HDMI-[17] TX1_HDMI+[17] TX1_HDMI-[17] TX0_HDMI+[17] TX0_HDMI-[17] TX3_HDMI+[17] TX3_HDMI-[17]
TX2_HDMI+[17]
DDI1_TX1_DP[18] DDI1_TX1_DN[18] DDI1_TX2_DP[18] DDI1_TX2_DN[18] DDI1_TX3_DP[18] DDI1_TX3_DN[18]
2ND_MBCLK [27]
2ND_MBDATA [27]
THERM_ALERT#[6,13,27]
+3V
+1.5V
+3V
+1.5V
+3V
+3V
DMI_REF1.5V
+3V
+3V
+3V
DMI_REF1.5V
+3V
+3V
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
Cedarview DMI/Display
1B
Wednesday, November 02, 2011
ZE7
405
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
Cedarview DMI/Display
1B
Wednesday, November 02, 2011
ZE7
405
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
Cedarview DMI/Display
1B
Wednesday, November 02, 2011
ZE7
405
<EMI>
<EMI>
LCD Panel Backlight (LDS)
05
<20100727_Sam> Customer must to use 27MHz due to
accuracy concerns(<1000ppm) from Intel silicon
perspective.
For HDMI deep color mode support
(HDM)
LCD Panel Power (LDS)
Cedar View (CPU)
<20100818_Jerry> If you implement XDP, you need the PU 2.2K
<20101109> Add DMI_REF1.5V to follow CRB v0.7
<20101109> Add C354 to follow CRB v0.7
<20101125_Colt> Please follow PDG, we will
doing BOM stuff changing in next version CRB
HDMI: 7.5", 4 via, 1.65 Gbps
Level Shifter For HDMI
eDP: 7", 3 via, 2.7Gbps
LAYOUT NOTE: PLACE THESE 3 RESISTORS
CLOSE TO PIN
LAYOUT NOTE: PLACE CLOSE TO PIN
ALERT# Pull Up Value
2K ohm
7.5K ohm
10.5K ohm
14K ohm
18.7K ohm
75 degree
90 degree
100 degree
105 degree
110 degree
Alert temperature point
THERMAL SENSOR (THM)
<20110110> DPL_REFSSCCLK is used to drive internal
registers and logics of the display interface and therefore
needs to be present at all times.
*
*
**
*
**
<20110414> Pull up at EC side
<20110414> Unstuff Thermal Sensor and related circuit.
2nd source: BG627000289 (ZYG)
<20110610> Remove PU resistor for Intel update.
<20110630> Stuff R38/ R39 PU resistor. Intel will fixed EDID issue by VGA driver and vbios
R62 *eDP@2.2K/J_4R62 *eDP@2.2K/J_4
R414
150/F_4
R414
150/F_4
R406 *0/J_4R406 *0/J_4
C67 .1U/10V_4C67 .1U/10V_4
R410
0/J_4
R410
0/J_4
T11T11
R119 *0/J_4R119 *0/J_4
R32
0/J_6
R32
0/J_6
C329 .1U/10V_4C329 .1U/10V_4
R428 *0/short_6R428 *0/short_6
C50
*220P/50V_4
C50
*220P/50V_4
R114 *0/J_4R114 *0/J_4
C61 .1U/10V_4C61 .1U/10V_4
R397 *1K/J_4R397 *1K/J_4
R39 2.2K/J_4R39 2.2K/J_4
U2
TC7SH08FU
U2
TC7SH08FU
2
14
3 5
U20
TC7SH08FU
U20
TC7SH08FU
2
14
3 5
C51
*220P/50V_4
C51
*220P/50V_4
C43 .1U/10V_4C43 .1U/10V_4
R415
150/F_4
R415
150/F_4
T51T51
C354
1U/10V_4
C354
1U/10V_4
C155
*0.1U/16V_4
C155
*0.1U/16V_4
R355 *0/J_4R355 *0/J_4
R409
0/J_4
R409
0/J_4
C156
*4.7U/6.3V_6
C156
*4.7U/6.3V_6
R53
100K_4
R53
100K_4
T7T7
C44 .1U/10V_4C44 .1U/10V_4
C334
33P/50V_4
C334
33P/50V_4
C41 .1U/10V_4C41 .1U/10V_4
R426 *0/short_6R426 *0/short_6
IHDA
DDI
CEDARVIEW
LVDS VGA
3 OF 6
REV = 1.10
U24C
CDV_22MM_REV1P10
IHDA
DDI
CEDARVIEW
LVDS VGA
3 OF 6
REV = 1.10
U24C
CDV_22MM_REV1P10
DPL_REFCLKP B9
DPL_REFCLKN A9
AZIL_RST#
E21
AZIL_SDO
F21 AZIL_SDI
E22
AZIL_SYNC
F22 AZIL_BCLK
H21
BREFREXT
F15 BREF18V
E15
RSVD_TP_H17
H17 RSVD_TP_J17
J17
DDI1_TXN3
K13 DDI1_TXP3
J13 DDI1_TXN2
E13 DDI1_TXP2
F13 DDI1_TXN1
H11 DDI1_TXP1
J11 DDI1_TXN0
F11 DDI1_TXP0
E11
DDI1_HPD
D26
DDI1_AUXN
C10 DDI1_AUXP
D10
DDI1_DDC_SDA
G27 DDI1_DDC_SCL
F25
RSVD_TP_J15
J15 RSVD_TP_H15
H15
DDI0_TXN3
A7 DDI0_TXP3
B7 DDI0_TXN2
C3 DDI0_TXP2
D4 DDI0_TXN1
F2 DDI0_TXP1
F3 DDI0_TXN0
G3 DDI0_TXP0
G2
DDI0_HPD
H22
DDI0_AUXN
B8 DDI0_AUXP
C8
DDI0_DDC_SDA
J22 DDI0_DDC_SCL
H25
PANEL_VDDEN F29
PANEL_BKLTEN E25
PANEL_BKLTCTL G22
LVDS_CLKN J4
LVDS_CLKP H4
LVDS_TXN3 G6
LVDS_TXP3 G5
LVDS_TXN2 H8
LVDS_TXP2 H7
LVDS_TXN1 E8
LVDS_TXP1 F8
LVDS_TXN0 H10
LVDS_TXP0 G10
LVDS_VREFL H3
LVDS_VREFH H2
LVDS_VBG F10
LVDS_IBG E10
LVDS_DDC_DATA H24
LVDS_DDC_CLK G24
LVDS_CTRL_DATA E24
LVDS_CTRL_CLK F28
DPL_REFSSCCLKN E17
DPL_REFSSCCLKP F17
CRT_DDC_CLK E27
CRT_DDC_DATA E29
CRT_IREF A13
CRT_IRTN D12
CRT_BLUE C11
CRT_GREEN B11
CRT_RED B12
CRT_VSYNC C14
CRT_HSYNC D14
U5
*NCT7717U
U5
*NCT7717U
GND
2
ALERT#
3
SDA 5
VDD 4
SCL
1
R445 7.5K/F_4
R445 7.5K/F_4
R48 *2.2K/J_4R48 *2.2K/J_4
R385 1M/J_4R385 1M/J_4
C335
33P/50V_4
C335
33P/50V_4
T52T52
R45 7.5K/F_4R45 7.5K/F_4
R52 *2.2K/J_4R52 *2.2K/J_4
C42 .1U/10V_4C42 .1U/10V_4
R360
100K_4
R360
100K_4
R65
*10K/J_4
R65
*10K/J_4
R612.37K/F_4 R612.37K/F_4
R68 *2.2K/J_4R68 *2.2K/J_4
R405 *0/J_4R405 *0/J_4
R111 *0/J_4R111 *0/J_4
T3T3
T9T9
R51 *0/J_4R51 *0/J_4
T33T33
T31T31
C154
*0.1U/16V_4
C154
*0.1U/16V_4
C58
*220P/50V_4
C58
*220P/50V_4
CEDARVIEW
DMI
1 OF 6
REV = 1.10
U24A
CDV_22MM_REV1P10
CEDARVIEW
DMI
1 OF 6
REV = 1.10
U24A
CDV_22MM_REV1P10
DMI_REFCLKP
N9
DMI_REFCLKN
N8
DMI_REF1P5
T2
DMI_RXN3
P3 DMI_RXP3
P2 DMI_RXN2
N1 DMI_RXP2
N2 DMI_RXN1
M2 DMI_RXP1
M3 DMI_RXN0
L2 DMI_RXP0
L3
DMI_RCOMP T1
RSVD_TP_R7 R7
RSVD_TP_R8 R8
DMI_TXN3 N6
DMI_TXP3 N5
DMI_TXN2 L8
DMI_TXP2 L9
DMI_TXN1 L6
DMI_TXP1 L5
DMI_TXN0 K5
DMI_TXP0 K6
C68 .1U/10V_4C68 .1U/10V_4
R56 2.2K/J_4R56 2.2K/J_4
C148
*0.1U/16V_4
C148
*0.1U/16V_4
R408 681/F_6R408 681/F_6
R58 2.2K/J_4R58 2.2K/J_4
R115
*2K/F_4
R115
*2K/F_4
C55 1U/6.3V_4C55 1U/6.3V_4
C48 .1U/10V_4C48 .1U/10V_4
R413
150/F_4
R413
150/F_4
R450 *0/short_4R450 *0/short_4
Y3
27MHz/+-20PPM_20PF
Y3
27MHz/+-20PPM_20PF
C66 .1U/10V_4C66 .1U/10V_4
R398 *1K/J_4R398 *1K/J_4
R38 2.2K/J_4R38 2.2K/J_4
R42 33/J_4R42 33/J_4
C65
*220P/50V_4
C65
*220P/50V_4
![](asset-6.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_FERR#_R
HV_GPIO_RCOMP
MV_GPIO_RCOMP
XDP_TCLK
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TRST#
H_THRMTRIP#
IMVP_PW RGD
H_THRMTRIP#
H_PROCHOT_R#
H_PWRGD
PLTRST#
H_BPM4_PRDY#
H_BPM5_PREQ#
CLK_MCH_BCLK
CLK_MCH_BCLK#
FANSIG
FAN_PW M_CNCPUFAN#
FAN_PW M_CN
FANSIG
+5V_FANVCC
XDP_DBRESET_N_CDV
H_BPM4_PRDY#
XDP_TCLK
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TRST#
H_BPM5_PREQ#
H_A20M# [11]
H_FERR# [11]
H_SMI# [11]
H_NMI [11]
H_STPCLK# [11]
ICH_DPRSTP# [13]
H_DPSLP# [13]
H_INIT# [11]
H_INTR [11]
SYS_SHDN# [30,35]
PM_THRMTRIP# [11]
H_PWRGD [13,16]
PLTRST# [13,16,22,25,26,27]
CLK_MCH_BCLK# [2]
CLK_MCH_BCLK [2]
VR_SVID_ALERT# [31]
VR_SVID_DATA [31]
VR_SVID_CLK [31]
IMVP_PW RGD[27,31]
CPUFAN#[27]
FANSIG [27]
THERM_ALERT#[5,13,27]
H_PROCHOT# [31]
CPUSLP# [11]
+1.05V
+1.05V
+1.05V
+5V
+3V +5V +3V
+3V +1.8V
+1.05V
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
Cedarview Miscellaneous
1B
Wednesday, November 02, 2011
ZE7
406
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
Cedarview Miscellaneous
1B
Wednesday, November 02, 2011
ZE7
406
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
Cedarview Miscellaneous
1B
Wednesday, November 02, 2011
ZE7
406
06
Shutdown System Power Immediately
To System Power
To Tiger Point
CPU FAN CTRL(THM)
For EMI
125 Degree Protection(CPU)
From CPU
Host CLK 100/133 MHz
Cedar View (CPU)
<20100811_Jerry>please use 100+/-5% as in PDG.
<20100811_Jerry>can be NC but please reserve 2.2K pull
low as CRB. can be removed later depends on CRB
validation status.
<20101019>Stuff R74 R71 for using 0xFFFE_0000
as Punit microbase address
EC PWM SIGNAL
Q1
METR3904-G
Q1
METR3904-G
2
1 3
R74 2.2K/J_4R74 2.2K/J_4 R386 *0/short_4R386 *0/short_4
R514 *0/J_4R514 *0/J_4
R72
49.9/F_4
R72
49.9/F_4
R442 *51/J_4R442 *51/J_4
R400 *0/short_4R400 *0/short_4
CPU
CEDARVIEW
ICH
4 OF 6
REV = 1.10
U24D
CDV_22MM_REV1P10
CPU
CEDARVIEW
ICH
4 OF 6
REV = 1.10
U24D
CDV_22MM_REV1P10
CPUSLP# B22
RSVD_N25
N25 RSVD_N24
N24 RSVD_W26
W26 RSVD_W25
W25 RSVD_R6
R6 RSVD_R5
R5
TRST#
B24 TMS
D24 TDO
B25 TDI
C24 TCLK
C25
MV_GPIO_RCOMP
K23 HV_GPIO_RCOMP
K24
RSVD_H30
H30 RSVD_J31
J31 RSVD_K29
K29 RSVD_L30
L30 RSVD_L29
L29 RSVD_K30
K30 RSVD_H27
H27 RSVD_K27
K27 RSVD_K26
K26 RSVD_J28
J28 RSVD_K25
K25 RSVD_K28
K28 RSVD_L27
L27 RSVD_L26
L26
RSVD_L24 L24
RSVD_L22 L22
RSVD_K21 K21
SVID_DATA C16
SVID_CLK D18
SVID_ALERT# B16
RSVD_F19 F19
RSVD_E19 E19
HPLL_REFCLK K19
HPLL_REFCLK_P J19
PREQ# G29
PRDY# H29
DBR# E30
RESET# G30
PWRGOOD D23
PROCHOT# A19
PBE# C20
RSVD_L11 L11
THERMTRIP# B20
INTR/LINT0 D20
INIT# A23
DPLSLP# B21
DPRSTP# C21
STPCLK# D22
RSVD_C18 C18
NMI/LINT1 C22
SMI# B18
Q2
2N7002K
Q2
2N7002K
3
2
1
C372
*220P/50V_6
C372
*220P/50V_6
T46T46
R443 51/J_4R443 51/J_4
R446 51/J_4R446 51/J_4
T47T47
R448 51/J_4R448 51/J_4
T48T48
R449 51/J_4R449 51/J_4
T43T43
R399
75/J_4
R399
75/J_4
C365 0.1U/16V_4C365 0.1U/16V_4
T49T49
R69
49.9/F_4
R69
49.9/F_4
CN18
FAN CONN
CN18
FAN CONN
1
2
3
45
6
Q43 METR3904-GQ43 METR3904-G
2
1 3
R16 *0/short_4R16 *0/short_4
R381
100/J_4
R381
100/J_4
R377 *0/short_4R377 *0/short_4
R459 51/J_4R459 51/J_4
R71 2.2K/J_4R71 2.2K/J_4
T45T45
R416
110/F_4
R416
110/F_4
R505 *0/short_6R505 *0/short_6
R17
1K/J_4
R17
1K/J_4
T44T44
C368
*220P/50V_6
C368
*220P/50V_6
R470 51/J_4R470 51/J_4
C268
.1U/10V_4
C268
.1U/10V_4
R507
10K/J_4
R507
10K/J_4
R512
10K/J_4
R512
10K/J_4
R33 1K/J_4R33 1K/J_4
R509
10K/J_4
R509
10K/J_4
![](asset-7.png)
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
A A
B B
C C
D D
VCCADP0_1.5
VCCADP1_1.5
VCCAGPIO_1.5
VCCADAC_1.8
VCCALVDS_1.8
VCCDLVDS_1.8
V_1.05_CORE_EAST
VCCSFRMPL_1.5
VCCPLLCPU0_1.05
VCCPLLCPU1_1.05
VCCAHPLL_1.05
V_1.05_CORE_RSENSEVCCAZILAON_3.3
V_1.05_VCCDDR
VCCCKDDR_VSM
VCCSFRMPL_1.5
VCCADP0_1.5
VCCADP1_1.5
VCCCKDDR_VSM
VCCAHPLL_1.05
VCCPLLCPU1_1.05
VCCPLLCPU0_1.05 VCCPLLCPU1_1.05
VCCDLVDS_1.8
V_1.05_CORE_EAST
V_1.05_VCCDDR
V_1.05_CORE_EAST
VCCADP_1.05
VCCAGPIO_1.8
VCCAGPIO_3.3
VCCADMI_1.05
V_1.05_CORE_RSENSE
V_1.05_VCCDDR
VCCADMI_1.5
V_1.05_CORE_RSENSE VCCDMPL_1.05
V_1.8_RSENSE
V_1.05_CORE_RSENSE
VCCALVDS_1.8
VCCDDRAON_1.5
VCCPLLCPU0_1.05
V_1.05_CORE_RSENSE
CPUVCC_SENSE [31]
CPUVSS_SENSE [31]
GTVCC_SENSE [31]
GTVSS_SENSE [31]
VCCDDRAON_1.5[8]
+VCC_CORE
VCCGFX
+1.8V
+1.5VSUS
+1.05V
+1.5VSUS
+1.5V
+1.5V
+3.3V_PRIME
+3.3V_PRIME
+1.8V
+1.8V
+1.8V
+1.05V
+1.05V
+1.05V
+1.05V
+1.05V
+1.5V
+1.5V
+1.5V
+1.05V
+1.05V
+1.05V
+1.05V
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
CedarView Power
1B
Wednesday, November 02, 2011
ZE7
407
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
CedarView Power
1B
Wednesday, November 02, 2011
ZE7
407
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
CedarView Power
1B
Wednesday, November 02, 2011
ZE7
407
07
LAYOUT NOTE: OVERLAP RESISTOR AND INDUCTOR
LAYOUT NOTE: PLACE
TWO CAPS ON BOT LAYER
LAYOUT NOTE: PLACE
ONE 1U CAP ON BOT LAYER
Default stuff 1.5VPLL, Intel verify whether
1.05VPLL is ok or not
LAYOUT NOTE: place close to VCCADDR pin
5.95A
1.98A
1.1V (0.75V~1.18V)
1.05V (0.76V~1.05V)
<20100830> Add Farrite bead for VCCDAC low pass filter
w/LVDS: stuff R436/ C345/ L38/ C75
w/EDP: unstuff R436/ C75
change L38/ C345 to 0ohm
BOM structure
Cedar View (CPU) Cedar View PLL Power
Cedar View LVDS Power
For Deep Standby
<2010/9/27>Reserve 0805 footprint for farrite bead
CV01001MN16 due to co-layout issue.
<20101125_Colt> Please follow PDG, we will doing BOM
stuff changing in next version CRB
<20101125_Colt> Please follow PDG, we will doing BOM
stuff changing in next version CRB
<20101126_Colt> Please follow PDG to
placehold the 0805 capacitor
<20101125_Colt> Please follow PDG, we will doing BOM
stuff changing in next version CRB
2nd source: CV01001MN32
C152
2.2U/6.3V_6
C152
2.2U/6.3V_6
R384 0.2A/600ohm_6R384 0.2A/600ohm_6
R47 *0/short_6R47 *0/short_6
R436 LVDS@0/J_6R436 LVDS@0/J_6
C350
*1U/10V_4
C350
*1U/10V_4
C125
22U/6.3V_8
C125
22U/6.3V_8
R77 *0/short_6R77 *0/short_6 R54 *0/J_6R54 *0/J_6
C82 *0.1U/10V_4C82 *0.1U/10V_4
C52
1U/10V_4
C52
1U/10V_4
L38BOM@0.1uH/300mA_6 L38BOM@0.1uH/300mA_6
C117
1U/10V_4
C117
1U/10V_4
C91 1U/10V_4C91 1U/10V_4
C94
1U/10V_4
C94
1U/10V_4
C115
22U/6.3V_8
C115
22U/6.3V_8
C53
1U/10V_4
C53
1U/10V_4
R419 *0/short_6R419 *0/short_6
C88 1U/10V_4C88 1U/10V_4
C116 1U/10V_4C116 1U/10V_4
C45
4.7u/6.3V_6
C45
4.7u/6.3V_6
R31 *0/short_6R31 *0/short_6
R423 *0/short_6R423 *0/short_6
C118
*1U/10V_4
C118
*1U/10V_4
C345
BOM@1U/10V_4
C345
BOM@1U/10V_4
R40 *0/J_6R40 *0/J_6
L18
*1.05VPLL@10uH/100mA_8
L18
*1.05VPLL@10uH/100mA_8
C112
22U/6.3V_8
C112
22U/6.3V_8
R36 *1.5VPLL@0/short_6R36 *1.5VPLL@0/short_6
C359
1U/6.3V_4
C359
1U/6.3V_4
C337 *47U/6.3V_8C337 *47U/6.3V_8
C31
4.7u/6.3V_6
C31
4.7u/6.3V_6
C105
*1U/10V_4
C105
*1U/10V_4
L1010uH/100mA_8 L1010uH/100mA_8
R112 *1.5VPLL@0/short_6R112 *1.5VPLL@0/short_6
R29 *1.5VPLL@0/short_6R29 *1.5VPLL@0/short_6
C92 *1U/10V_4C92 *1U/10V_4
R55 *0/short_6R55 *0/short_6
C120
1U/10V_4
C120
1U/10V_4
R437 *0/short_6R437 *0/short_6
C54 2.2U/6.3V_6C54 2.2U/6.3V_6
R94 *0/short_6R94 *0/short_6
C59 2.2U/6.3V_6C59 2.2U/6.3V_6
R440 *0/short_6R440 *0/short_6
R46 *0/short_6R46 *0/short_6
C101
*1U/10V_4
C101
*1U/10V_4
DDR
PLL
CEDARVIEW
POWER
DMI
CPU
5 OF 6
REV = 1.10
U24E
CDV_22MM_REV1P10
DDR
PLL
CEDARVIEW
POWER
DMI
CPU
5 OF 6
REV = 1.10
U24E
CDV_22MM_REV1P10
V_SM_7
AL21
VCCAHPLL
B26
VCCPLLCPU1_2
B30 VCCPLLCPU1_1
C29 VCCPLLCPU0
B27
VCCDMPL
AA11 VCCSFRMPL
AA18
VCCAZILAON_2
A30 VCCAZILAON_1
B29
VCCDIO
L21
VCCDLVDS
J1 VCCALVDS
H5
VCCADAC
B13
VCCAGPIO_2
D31 VCCAGPIO_1
D30
VCCAGPIO_DIO
N18 VCCAGPIO_REF
L16 VCCAGPIO_LV
L19
VCCADP1_SFR
L18 VCCADP0_SFR
K17
VCCADP_3
D6 VCCADP_2
C6 VCCADP_1
B5
V_SM_8
AG31
V_SM_6
AL16 V_SM_5
AL11 V_SM_4
AK5 V_SM_3
AK23 V_SM_2
AH19 V_SM_1
AH14
VCCCKDDR_2
AK6 VCCCKDDR_1
AJ6
VCCADLLDDR_2
W13 VCCADLLDDR_1
W11
VCCACKDDR_2
W9 VCCACKDDR_1
W8
VCCRAMXXX_3
V4 VCCRAMXXX_2
N31 VCCRAMXXX_1
N30
VCCADDR_4
W18 VCCADDR_3
W16 VCCADDR_2
AA16 VCCADDR_1
AA14
VCCTHRM_2 K2
VCCTHRM_1 N16
VSS_GFXSENSE U7
VCC_GFXSENSE U8
VSS_CPUSENSE M30
VCC_CPUSENSE M28
VCCFHV_3 V14
VCCFHV_2 T16
VCCFHV_1 V16
VCCADMI_PLLSFR K4
VCCADMI_3 A4
VCCADMI_2 C5
VCCADMI_1 B4
VCC_GFX_11 V13
VCC_GFX_10 V11
VCC_GFX_09 U10
VCC_GFX_08 T13
VCC_GFX_07 T11
VCC_GFX_06 R9
VCC_GFX_05 R10
VCC_GFX_04 P13
VCC_GFX_03 P11
VCC_GFX_02 N13
VCC_GFX_01 N11
VCC_CPU_29 V30
VCC_CPU_28 V29
VCC_CPU_27 V28
VCC_CPU_26 V21
VCC_CPU_25 V19
VCC_CPU_24 V18
VCC_CPU_23 U27
VCC_CPU_22 U26
VCC_CPU_21 U25
VCC_CPU_20 U24
VCC_CPU_19 U23
VCC_CPU_18 U22
VCC_CPU_17 T31
VCC_CPU_16 T30
VCC_CPU_15 T29
VCC_CPU_14 T21
VCC_CPU_13 T19
VCC_CPU_12 R27
VCC_CPU_11 R26
VCC_CPU_10 R25
VCC_CPU_09 R24
VCC_CPU_08 R23
VCC_CPU_07 R22
VCC_CPU_06 P30
VCC_CPU_05 P29
VCC_CPU_04 P28
VCC_CPU_03 P21
VCC_CPU_02 P19
VCC_CPU_01 P18
C100
1U/10V_4
C100
1U/10V_4
C134
1U/10V_4
C134
1U/10V_4
C95
1U/10V_4
C95
1U/10V_4
C28
*10U/6.3V_8
C28
*10U/6.3V_8
C103
22U/6.3V_8
C103
22U/6.3V_8
C98
1U/10V_4
C98
1U/10V_4
C32
4.7u/6.3V_6
C32
4.7u/6.3V_6
C362
10U/6.3V_8
C362
10U/6.3V_8
R456 *0/short_6R456 *0/short_6
C40
1U/10V_4
C40
1U/10V_4
C93 1U/10V_4C93 1U/10V_4
C153
2.2U/6.3V_6
C153
2.2U/6.3V_6
C126
1U/10V_4
C126
1U/10V_4
C75
LVDS@4.7u/6.3V_6
C75
LVDS@4.7u/6.3V_6
C29
*10U/6.3V_8
C29
*10U/6.3V_8
C149
2.2U/6.3V_6
C149
2.2U/6.3V_6
C128
1U/10V_4
C128
1U/10V_4
C146
2.2U/6.3V_6
C146
2.2U/6.3V_6
C130
1U/10V_4
C130
1U/10V_4
L1110uH/100mA_8 L1110uH/100mA_8
C46
1U/10V_4
C46
1U/10V_4
C56 1U/10V_4C56 1U/10V_4
C106
22U/6.3V_8
C106
22U/6.3V_8
L610uH/100mA_8 L610uH/100mA_8
C129
*1U/10V_4
C129
*1U/10V_4
R489 *0/short_8R489 *0/short_8
C142
*10U/6.3V_8
C142
*10U/6.3V_8
R89 *0/short_6R89 *0/short_6
C141
*1U/10V_4
C141
*1U/10V_4
C83
1U/10V_4
C83
1U/10V_4
C60 1U/10V_4C60 1U/10V_4
L4
*1.05VPLL@10uH/100mA_8
L4
*1.05VPLL@10uH/100mA_8
C49
1U/10V_4
C49
1U/10V_4
L3
*1.05VPLL@10uH/100mA_8
L3
*1.05VPLL@10uH/100mA_8
R134 *0/short_8R134 *0/short_8
C336 22U/6.3V_8C336 22U/6.3V_8
C352
*22U/6.3V_8
C352
*22U/6.3V_8
C139
*2.2U/6.3V_4
C139
*2.2U/6.3V_4
![](asset-8.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
M_A_BS0
M_A_BS1
M_A_BS2
M_ODTPU
M_A_WE#
M_CMDPU
M_A_CAS#
M_A_RAS#
M_CS#2
M_CS#3
M_CLK2
M_CLK2#
M_CLK3
M_CLK3#
M_CKE2
M_CKE3
M_ODT2
M_ODT3
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
DDR3_DRAMRST#_R
DDR_VREF
M_DQPU
DELAY_VR_PWRGD_CDV
M_A_DM0
M_A_DM2
M_A_DM1
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ24
M_A_DQ30
M_A_DQ25
M_A_DQ20
M_A_DQ26
M_A_DQ21
M_A_DQ27
M_A_DQ22
M_A_DQ28
M_A_DQ23
M_A_DQ29
M_A_DQ35
M_A_DQ41
M_A_DQ36
M_A_DQ31
M_A_DQ37
M_A_DQ32
M_A_DQ38
M_A_DQ33
M_A_DQ39
M_A_DQ34
M_A_DQ40
M_A_DQ46
M_A_DQ52
M_A_DQ47
M_A_DQ42
M_A_DQ48
M_A_DQ43
M_A_DQ49
M_A_DQ44
M_A_DQ50
M_A_DQ45
M_A_DQ51
M_A_DQ57
M_A_DQ63
M_A_DQ58
M_A_DQ53
M_A_DQ59
M_A_DQ54
M_A_DQ60
M_A_DQ55
M_A_DQ61
M_A_DQ56
M_A_DQ62
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#7
M_A_DQS#6
M_A_DQS#5
M_A_DQS#4
M_A_DQS#3
M_A_DQS#2
DDRAM_PWROK
DDR3_DRAMRST#_NS
DDRAM_PWROK
DDR3_DRAMRST#_R
VCCDDRAON_1.5
M_A_WE#[4] M_A_CAS#[4] M_A_RAS#[4]
M_A_BS0[4] M_A_BS1[4] M_A_BS2[4]
M_A_DQ[63:0] [4]
M_A_DQS[7:0] [4]
M_A_DQS#[7:0] [4]
M_CS#2[4] M_CS#3[4]
M_CLK2[4] M_CLK2#[4] M_CLK3[4] M_CLK3#[4]
M_CKE2[4] M_CKE3[4]
M_ODT2[4] M_ODT3[4]
M_A_A[15:0][4]
ECPWROK[5,13,16,27]
M_A_DM[7:0][4]
CLK_DDR3_REFCLK[2] CLK_DDR3_REFCLK#[2]
VCCDDRAON_1.5[7]
DDR3_DRAMRST#[4]
DDRAM_PWROK[27,32]
+SMDDR_VREF
+1.5VSUS
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
CedarView DDR
1B
Wednesday, November 02, 2011
ZE7
408
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
CedarView DDR
1B
Wednesday, November 02, 2011
ZE7
408
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
CedarView DDR
1B
Wednesday, November 02, 2011
ZE7
408
08
<Layout note>
PLACE RESISTORS AND CAP CLOSE TO CPU DDR_VREF PIN
<20100810_Jerry> Please refer to Cedar Trail CPET HW section(#454349),
it is to implement Deep Standby. And please waiting the whitepaper for implementation detail.
*
<20100817_Jerry>DELAY_VR_PWRGOOD on CDV should be connected to the XDP_PWRGOOD
because the SV folks expressed a preference on using PWROK over PWRGOOD for CDV.
This has changed from PNV to CDV.
1.5V
1.5V
Cedar View (CPU)
<20100811_Jerry> R485 please follow CRB schematic. (274ohm)
<20110520>Change 12.1K to 121ohm to follow CRBv1.5
<20110520>Change 10K to 100ohm to follow CRBv1.5
<20110520>Need to confirm with Intel if
we need to add series 100ohm resistor
DRAM Reset (CPU)
<20110607>Keep original design first for DRAMRST#
<20110707_Nick> Please un-stuff 1K pull up
<20110607>Keep original design first for DRAMRST#
<20110707_Nick> Please stuff 100K pull down
+1.5VSUS
<20110727>Connect DDRAM_PWROK between CDV and RT8207L to meet JEDEC timing spec
<20110727> Reserve C388 for RC delay
<20110727> Add C159 to suppress glitch
R537 *0/short_4R537 *0/short_4
C159
0.1U/16V_4
C159
0.1U/16V_4
R538
*1K/F_4
R538
*1K/F_4
C361
*0.01U/25V_4
C361
*0.01U/25V_4
R98
100/F_4
R98
100/F_4
DDR3
CEDARVIEW
2 OF 6
REV = 1.10
U24B
CDV_22MM_REV1P10
DDR3
CEDARVIEW
2 OF 6
REV = 1.10
U24B
CDV_22MM_REV1P10
DDR3_W E#
AH10
DDR3_VREF
AJ27
DDR3_VCCA_PWROK
W7
DDR3_REFP
AC19
DDR3_REFN
AB19
DDR3_RAS#
AJ11
DDR3_ODTPU
AJ26
DDR3_ODT3
AJ7 DDR3_ODT2
AL9 DDR3_ODT1
AK7 DDR3_ODT0
AK10
RSVD_TP_AF19
AF19
RSVD_TP_AG19
AG19
RSVD_TP_AB11
AB11
RSVD_TP_AB13
AB13
DDR3_MA9
AH20 DDR3_MA8
AJ20 DDR3_MA7
AK20 DDR3_MA6
AJ18 DDR3_MA5
AH18 DDR3_MA4
AK18 DDR3_MA3
AJ16 DDR3_MA2
AJ14
DDR3_MA15
AJ22 DDR3_MA14
AH22 DDR3_MA13
AJ8 DDR3_MA12
AJ21 DDR3_MA11
AK21 DDR3_MA10
AJ12
DDR3_MA1
AK16 DDR3_MA0
AK14
DDR3_DRAMRST#
AK25
DDR3_DRAM_PWROK
AA5
DDR3_DQS#7 AA2
DDR3_DQS#6 AB7
DDR3_DQS#5 AF3
DDR3_DQS#4 AF10
DDR3_DQS#3 AF22
DDR3_DQS#2 AF29
DDR3_DQS#1 AB25
DDR3_DQS#0 AA31
DDR3_DQS7 Y3
DDR3_DQS6 AB6
DDR3_DQS5 AF4
DDR3_DQS4 AG10
DDR3_DQS3 AE22
DDR3_DQS2 AF30
DDR3_DQS1 AB24
DDR3_DQS0 AA30
DDR3_DQPU
AK27
DDR3_DQ9 AA22
DDR3_DQ8 AA24
DDR3_DQ7 AB30
DDR3_DQ63 W1
DDR3_DQ62 Y2
DDR3_DQ61 AB3
DDR3_DQ60 AC2
DDR3_DQ6 AB28
DDR3_DQ59 V3
DDR3_DQ58 W4
DDR3_DQ57 AB4
DDR3_DQ56 AB2
DDR3_DQ55 AA8
DDR3_DQ54 AB9
DDR3_DQ53 AE5
DDR3_DQ52 AE8
DDR3_DQ51 AB5
DDR3_DQ50 AA6
DDR3_DQ5 W28
DDR3_DQ49 AD6
DDR3_DQ48 AD7
DDR3_DQ47 AD4
DDR3_DQ46 AE2
DDR3_DQ45 AK3
DDR3_DQ44 AH4
DDR3_DQ43 AD3
DDR3_DQ42 AD2
DDR3_DQ41 AG3
DDR3_DQ40 AH2
DDR3_DQ4 W31
DDR3_DQ39 AF8
DDR3_DQ38 AD10
DDR3_DQ37 AE13
DDR3_DQ36 AG13
DDR3_DQ35 AG7
DDR3_DQ34 AG8
DDR3_DQ33 AD11
DDR3_DQ32 AD13
DDR3_DQ31 AE21
DDR3_DQ30 AG21
DDR3_DQ3 AC31
DDR3_DQ29 AG25
DDR3_DQ28 AG27
DDR3_DQ27 AC21
DDR3_DQ26 AD22
DDR3_DQ25 AG24
DDR3_DQ24 AE24
DDR3_DQ23 AJ29
DDR3_DQ22 AG30
DDR3_DQ21 AD30
DDR3_DQ20 AD28
DDR3_DQ2 AC30
DDR3_DQ19 AK29
DDR3_DQ18 AJ30
DDR3_DQ17 AE29
DDR3_DQ16 AD29
DDR3_DQ15 AD27
DDR3_DQ14 AD25
DDR3_DQ13 AA25
DDR3_DQ12 AB27
DDR3_DQ11 AE26
DDR3_DQ10 AE27
DDR3_DQ1 Y29
DDR3_DQ0 Y30
DDR3_DM7
AA3 DDR3_DM6
AB8 DDR3_DM5
AG2 DDR3_DM4
AG11 DDR3_DM3
AB21 DDR3_DM2
AE30 DDR3_DM1
AB26 DDR3_DM0
Y28
DDR3_CS#3
AK8 DDR3_CS#2
AK11 DDR3_CS#1
AH8 DDR3_CS#0
AH12
DDR3_CMDPU
AJ25
DDR3_CKE3
AH24 DDR3_CKE2
AK24 DDR3_CKE1
AJ24 DDR3_CKE0
AH23
DDR3_CK#3
AD15
DDR3_CK#2
AC17
DDR3_CK#1
AG17
DDR3_CK#0
AF15
DDR3_CK3
AC15
DDR3_CK2
AD17
DDR3_CK1
AF17
DDR3_CK0
AG15
DDR3_CAS#
AJ10
DDR3_BS2
AK22 DDR3_BS1
AH13 DDR3_BS0
AK12
DDR3_VREF_NCTF
AL28
R484
33.2/F_4
R484
33.2/F_4
R483 *0/short_4R483 *0/short_4
*1U/10V_6
C388
*1U/10V_6
C388
R488
22.6/F_4
R488
22.6/F_4
R474
100K/J_4
R474
100K/J_4
R99 121/F_4R99 121/F_4
R485
274/F_4
R485
274/F_4
C360
0.1U/16V_4
C360
0.1U/16V_4
R492 *0/J_4R492 *0/J_4
T53T53
R493
1K/F_4
R493
1K/F_4
R482 1K/F_4R482 1K/F_4
R539 *0/short_4R539 *0/short_4
R97
*0/J_4
R97
*0/J_4
R100
10K/J_4
R100
10K/J_4
![](asset-9.png)
1
1
A A
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
CedarView GND/ Deep Standby
1B
Wednesday, November 02, 2011
ZE7
409
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
CedarView GND/ Deep Standby
1B
Wednesday, November 02, 2011
ZE7
409
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
CedarView GND/ Deep Standby
1B
Wednesday, November 02, 2011
ZE7
409
09
Cedar View (CPU)
GND
CEDARVIEW
6 OF 6
REV = 1.10
U24F
CDV_22MM_REV1P10
GND
CEDARVIEW
6 OF 6
REV = 1.10
U24F
CDV_22MM_REV1P10
VSS
H13 VSS
G8 VSS
G31 VSS
G21 VSS
G19 VSS
G17 VSS
G15 VSS
G13 VSS
G11 VSS
G1 VSS
F4 VSS
F24 VSS
E7 VSS
E5 VSS
E2 VSS
D9 VSS
D8 VSS
D28 VSS
D19 VSS
C7 VSS
C30 VSS
C26 VSS
C12 VSS
B23 VSS
B19 VSS
B14 VSS
B10 VSS
AL7 VSS
AL25 VSS
AL23 VSS
AL19 VSS
AL13 VSS
AK9 VSS
AK28 VSS
AK19 VSS
AK13 VSS
AJ3 VSS
AJ2 VSS
AH9 VSS
AH6 VSS
AH28 VSS
AH26 VSS
AG5 VSS
AG22 VSS
AF7 VSS
AF28 VSS
AF24 VSS
AF21 VSS
AF13 VSS
AF11 VSS
AE31 VSS
AE3 VSS
AE19 VSS
AE17 VSS
AE15 VSS
AE11 VSS
AE10 VSS
AE1 VSS
AD8 VSS
AD5 VSS
AD26 VSS
AD24 VSS
AD21 VSS
AD19 VSS
AC4 VSS
AC28 VSS
AC22 VSS
AC13 VSS
AC11 VSS
AC10 VSS
AC1 VSS
AB29 VSS
AB23 VSS
AB17 VSS
AB15 VSS
AA9 VSS
AA7 VSS
AA29 VSS
AA27 VSS
AA26 VSS
AA23 VSS
AA21 VSS
AA19 VSS
AA13 VSS
AA10 VSS
AA1 VSS
A25 VSS
A21 VSS
A16 VSS
A11
VSSA_CRTDAC D13
VSS_CDVDET L14
VSS E1
VSS C31
VSS C2
VSS C1
VSS B31
VSS B3
VSS B2
VSS AL5
VSS AL30
VSS AL3
VSS AL29
VSS AL2
VSS AK31
VSS AK30
VSS AK2
VSS AK1
VSS AJ31
VSS AJ1
VSS AH1
VSS A3
VSS A29
VSS A27
VSS Y4
VSS W6
VSS W5
VSS W30
VSS W27
VSS W24
VSS W23
VSS W22
VSS W21
VSS W2
VSS W19
VSS W14
VSS W10
VSS V2
VSS U9
VSS U6
VSS U5
VSS T3
VSS T18
VSS T14
VSS P4
VSS P16
VSS P14
VSS N7
VSS N4
VSS N28
VSS N27
VSS N26
VSS N23
VSS N22
VSS N21
VSS N19
VSS N14
VSS N10
VSS M4
VSS M29
VSS L7
VSS L31
VSS L25
VSS L23
VSS L13
VSS L10
VSS L1
VSS K9
VSS K8
VSS K7
VSS K3
VSS K15
VSS K11
VSS J30
VSS J21
VSS J2
VSS J10
VSS H6
VSS H28
VSS H26
VSS H19
![](asset-a.png)
1
1
A A
DMI_COMP
DMI_TXN1_C
DMI_TXP1_C
USBOC#
USBOC#
USBOC#
USBRBIAS
DMI_TXP0_C
DMI_TXN0_C
PCIE_TXN1_C
PCIE_TXP1_C
PCIE_TXN0_C
PCIE_TXP0_C
PCIE_TXN2_C
PCIE_TXP2_C
USBOC#
USBOC#R_1
USBOC#R_1
USBOC#L_1
USBOC#
DMI_TXN2_C
DMI_TXP2_C
DMI_TXN3_C
DMI_TXP3_C
DMI_RXN3_R
DMI_RXP3_R
DMI_RXN2_R
DMI_RXP2_R
PCIE_TXN3_C
PCIE_TXP3_C
USBOC#R_1
USBOC#L_1
USBOC#
CLKUSB_48
DMI_RXN0[5] DMI_RXP0[5]
DMI_RXN1[5] DMI_RXP1[5]
DMI_TXN0[5] DMI_TXP0[5]
DMI_TXN1[5] DMI_TXP1[5]
PCIE_TXP1[25]
PCIE_RXN1[25] PCIE_RXP1[25] PCIE_TXN1[25]
PCIE_RXN2[26]
PCIE_TXN2[26] PCIE_TXP2[26]
CLK_PCIE_ICH#[2] CLK_PCIE_ICH[2]
USBP0- [21]
USBP0+ [21]
USBP1- [21]
USBP1+ [21]
USBP2- [18]
USBP2+ [18]
USBP3- [21]
USBP3+ [21]
USBP6- [19]
USBP6+ [19]
PCIE_RXN0[22] PCIE_RXP0[22]
PCIE_TXP0[22] PCIE_TXN0[22]
PCIE_RXP2[26]
USBOC#R [21,27]
DMI_RXN2[5] DMI_RXP2[5]
DMI_RXN3[5] DMI_RXP3[5]
DMI_TXN2[5] DMI_TXP2[5]
DMI_TXN3[5] DMI_TXP3[5]
PCIE_RXN3[25]
PCIE_TXN3[25] PCIE_TXP3[25]
PCIE_RXP3[25]
CLKUSB_48 [2]
USBP4- [25]
USBP4+ [25]
USBP5- [25]
USBP5+ [25]
USBP7- [25]
USBP7+ [25]
USBOC#L [21,27]
+1.5V
+3V_S5
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
Tiger Point DMI/PCIE/USB
1B
Wednesday, November 02, 2011
ZE7
4010
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
Tiger Point DMI/PCIE/USB
1B
Wednesday, November 02, 2011
ZE7
4010
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
Tiger Point DMI/PCIE/USB
1B
Wednesday, November 02, 2011
ZE7
4010
10
<Layout note>
Close to pin within 500mil
<Layout note>
Close to pin within 200mil ; keep away from CLK/High speed signals
CRB ties unused OC pins together with 1k ohm
SYSTEM (Right Down)
SYSTEM (Right Up)
CCD
SYSTEM (Left/ USB Charger)
3G
LAN
WLAN
Media Processor
WLAN
SIM
BT
Tiger Point (CLG)
Card Reader
EMI
<20110222> ES2 CPU DMI will
change from x4 to x2
<20110630> No support PCI-e in 3G card
2
TGP
USB
DMI PCI-E
U22B
Tiger Point
2
TGP
USB
DMI PCI-E
U22B
Tiger Point
DMI3RXN
V21
USBP0N H7
USBP0P H6
USBP1N H3
USBP1P H2
USBP2N J2
USBP2P J3
USBP3N K6
USBP3P K5
USBP4N K1
USBP4P K2
USBP5N L2
USBP5P L3
USBP6N M6
USBP6P M5
USBP7N N1
USBP7P N2
OC7#/GPIO31 C3
USBRBIAS G2
USBRBIAS# G3
CLK48 F4
DMI0RXN
R23
DMI0RXP
R24
DMI0TXN
P21
DMI0TXP
P20
DMI1RXN
T21
DMI1RXP
T20
DMI2RXP
T18
DMI2TXP
U24
DMI3RXP
V20
DMI3TXN
V24
DMI3TXP
V23
PERN1
K21
PERP1
K22
PETN1
J23
PETP1
J24
PERN2
M18
PERP2
M19
PETN2
K24
PETP2
K25
PERN3
L23
PERP3
L24
PETN3
L22
PETP3
M21
PERN4
P17
PERP4
P18
PETN4
N25
PETP4
N24
DMI_ZCOMP
H24
DMI_IRCOMP
J22
DMI_CLKN
W23
DMI_CLKP
W24
OC6#/GPIO30 C2
OC5#/GPIO29 E6
OC4# E5
OC1# C5
OC3# D2
OC2# D3
OC0# D4
DMI2RXN
T19 DMI1TXP
T25 DMI1TXN
T24
DMI2TXN
U23
R81 *0/J_4R81 *0/J_4
C96 .1U/10V_4C96 .1U/10V_4
C87 .1U/10V_4C87 .1U/10V_4
C80 .1U/10V_4C80 .1U/10V_4
C347 *.1U/10V_4C347 *.1U/10V_4
C122 *.1U/10V_4C122 *.1U/10V_4
R429 8.2K/J_4R429 8.2K/J_4
C346 *.1U/10V_4C346 *.1U/10V_4
R432 1K/F_4R432 1K/F_4
R66
*10/F_4
R66
*10/F_4
R86 *0/J_4R86 *0/J_4
C113 .1U/10V_4C113 .1U/10V_4
C104 .1U/10V_4C104 .1U/10V_4
C132 *.1U/10V_4C132 *.1U/10V_4
R433 8.2K/J_4R433 8.2K/J_4
R438 22.6/F_4R438 22.6/F_4
C81
*10P/50V_4
C81
*10P/50V_4
C343 .1U/10V_4C343 .1U/10V_4
R435 *0/short_4R435 *0/short_4
R88 *0/J_4R88 *0/J_4
C110 *.1U/10V_4C110 *.1U/10V_4
C63 .1U/10V_4C63 .1U/10V_4
R80 *0/J_4R80 *0/J_4
C344 .1U/10V_4C344 .1U/10V_4
R427 *0/short_4R427 *0/short_4
C124 *.1U/10V_4C124 *.1U/10V_4
C71 .1U/10V_4C71 .1U/10V_4
R425 24.9/F_4R425 24.9/F_4
C90 .1U/10V_4C90 .1U/10V_4
![](asset-b.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_IGNNE#
H_INIT#
H_INTR
H_FERR#
H_NMI
SATALED#
H_SMI#
SATARBIAS#
SERIRQ
H_STPCLK#
KBRST#
GA20
H_A20M#
GA20
PCH_GPIO36
PCH_GPIO36
H_A20M#
SERIRQ
KBRST#
PM_THRMTRIP#
H_IGNNE#
CPUSLP#_R
CPUSLP#_R
SATA_RXN0 [24]
SATA_RXP0 [24]
SATA_TXN0 [24]
SATA_TXP0 [24]
CLK_PCIE_SATA# [2]
CLK_PCIE_SATA [2]
GA20 [27]
H_A20M# [6]
H_INIT# [6]
H_INTR [6] H_FERR# [6]
PM_THRMTRIP# [6]
KBRST# [27]
H_NMI [6]
H_SMI# [6]
H_STPCLK# [6]
SERIRQ [27]
SATALED# [24]
VCC3_VCC3[12,13,14]
CPUSLP# [6]
+1.05V
+3V
+1.05V
+3V
+1.05V
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
Tiger Point Sata/Host
1B
Wednesday, November 02, 2011
ZE7
4011
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
Tiger Point Sata/Host
1B
Wednesday, November 02, 2011
ZE7
4011
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
Tiger Point Sata/Host
1B
Wednesday, November 02, 2011
ZE7
4011
<Layout note>
Close to pin within 1"
11
<Layout note>
Close to pin within 500mil
<Layout note>
Close to pin within 200mil
<Layout note>
Close to pin
SATA HDD
Tiger Point (CLG)
Follow CRB
<20100811_Jerry>CDV doesn't support A20M,
please follow CRB to have a 1K pull up at the moment.
<20100811_Jerry>for Thermtrip#, please use 60 ohms+/-5% pull up.
<20100811_Jerry>you can follow PDG for the pull up
resistor value and tolerance requirement. CRB is more
strictly.
<20100811_Jerry> Please follow CRB schematic (8.2K)
<20100813_Jerry> Update for the IGNNE#, please no
stuff the resister and follow CRB's circuit first.
<20110516>Reserve 1K PU to +1.05V for C6-state
<20110607_C-stage> Stuff 1K to follow CRB V1.5
3
TGP
HOST SATA
U22C
Tiger Point
3
TGP
HOST SATA
U22C
Tiger Point
SATA0RXN AE6
SATA0RXP AD6
SATA0TXN AC7
SATA0TXP AD7
SATA1RXN AE8
SATA1RXP AD8
SATA1TXN AD9
SATA1TXP AC9
SATA_CLKN AD4
GPIO36
AD23
A20M# Y20
CPUSLP# Y21
IGNNE# Y18
INIT3_3V# AD21
INIT# AC25
INTR AB24
FERR# Y22
NMI T17
RCIN# AC21
SERIRQ AA16
SMI# AA21
STPCLK# V18
THERMTRIP# AA20
RSVD03
R12
RSVD04
AE20
RSVD05
AD17
RSVD06
AC15
RSVD07
AD18
RSVD08
Y12
RSVD09
AA10
RSVD10
AA12
RSVD11
Y10
RSVD12
AD15
RSVD13
W10
RSVD14
V12
RSVD15
AE21
RSVD16
AE18
RSVD17
AD19
RSVD18
U12
RSVD19
AC17
RSVD20
AB13
RSVD21
AC13
RSVD22
AB15
RSVD23
Y14
RSVD24
AB16
RSVD25
AE24
RSVD26
AE23
RSVD27
AA14
RSVD28
V14
RSVD29
AD16
SATA_CLKP AC4
SATARBIAS# AD11
SATARBIAS AC11
SATALED# AD25
RSVD31
AB10
A20GATE U16
RSVD30
AB11
R466 24.9/F_4R466 24.9/F_4
R102 10K/J_4R102 10K/J_4
R117 10K/J_4R117 10K/J_4
R95 8.2K/J_4R95 8.2K/J_4
R109 1K/J_4R109 1K/J_4
R105 1K/J_4R105 1K/J_4
R96 4.7K/J_4R96 4.7K/J_4
R110 60.4/F_4R110 60.4/F_4
R103 *10K/J_4R103 *10K/J_4
R104
60.4/F_4
R104
60.4/F_4
R532 *1K/J_4R532 *1K/J_4
R533 0/J_4R533 0/J_4
![](asset-c.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCH_GPIO48
PCH_GPIO17
PCH_GPIO22
PCI_DEVSEL#
PCI_INTE#
PCI_INTG#
PCI_INTD#
PCI_INTA#
PCI_INTB#
PCI_INTC#
PCI_REQ2#
PCI_IRDY#
PCI_LOCK#
PCI_REQ1#
PCI_DEVSEL#
PCI_FRAME#
PCI_PERR#
PCI_SERR#
PCI_STOP#
PCI_TRDY#
PCI_FRAME#
PCI_INTD#
PCH_A16WP
EC_SCI#
PCI_REQ1#
PCI_TRDY#
PCI_INTH#
PCI_INTF#
PCI_REQ2#
PCI_PERR#
EC_SCI#
PCI_STOP#
PCI_INTA#
PCI_INTH#
PCI_INTF#
PCI_INTC#
PCI_SERR#
PCI_INTG#
PCH_GPIO48
PCH_GPIO17
PCI_IRDY#
PCI_INTB#
PCI_LOCK#
PCI_INTE#
PCH_GPIO22
PCLK_ICH[2]
EC_SCI#[27]
VCC3_VCC3[11,13,14]
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
TigerPoint PCI
1B
Wednesday, November 02, 2011
ZE7
4012
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
TigerPoint PCI
1B
Wednesday, November 02, 2011
ZE7
4012
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
TigerPoint PCI
1B
Wednesday, November 02, 2011
ZE7
4012
PCI_GNT#2
Internal PU
Should not be PD
AC'97 Codec; option for SMBUS
USB UH Controller #3; SATA/IDE Native Mode
USB UHCI Controller #2
Internal LAN; Option for SCI, TCO, HPET#0,1,2
Option for SCI, TCO, HPET#0,1,2
Option for SCI, TCO, HPET#0,1,2
USB EHCI Controller; Option for SCI, TCO, HPET#0,1,2
PIRQA
PIRQB
PIRQC
PIRQD
PIRQE
PIRQF
PIRQG
PIRQH
IRQ
Description
USB UHCI Controller #1, #4
0 1 SPI
1 1 LPC
1 0 PCI
PCH_GPIO48
(INT PU)
PCH_GPIO17
(INT PU) Boot BIOS Location
PCH_A16WP
(INT PU) Low = A16 swap override enabled
High = Default
12
ICH Boot BIOS select
PCI CLK 33MHz
A16 SWAP Override strap
Tiger Point (CLG)
<20101104> Reserve R389(PCH_GPIO22 PD) for 27MHz or 96MHz choosing, need vBIOS support
Pull up --> for 27MHz
Pull down --> for 96MHz
<20090601(A1A)_Checklist Rev0.7>
Strap1#/strap2#: signals have weak
internal pull-ups
(CURRENTLY USE)
EMI
RP4 8.2K_8P4RRP4 8.2K_8P4R
1
3
5
7
2
4
6
8
T32T32
R43 8.2K/J_4R43 8.2K/J_4
R41 10K/J_4R41 10K/J_4
T13T13
R421 *1K/J_4R421 *1K/J_4R424 *1K/J_4R424 *1K/J_4 R35 *1K/J_4R35 *1K/J_4
R388 8.2K/J_4R388 8.2K/J_4
C99
*10P/50V_4
C99
*10P/50V_4
RP2 8.2K_8P4RRP2 8.2K_8P4R
1
3
5
7
2
4
6
8
R73
*33/J_4
R73
*33/J_4
R389 *8.2K/J_4R389 *8.2K/J_4
RP1 8.2K_8P4RRP1 8.2K_8P4R
1
3
5
7
2
4
6
8
R391 8.2K/J_4R391 8.2K/J_4
PCI
TGP
1
U22A
Tiger Point
PCI
TGP
1
U22A
Tiger Point
PIRQH#/GPIO5
F8 PIRQG#/GPIO4
H8 PIRQF#/GPIO3
D6 PIRQE#/GPIO2
E8 PIRQD#
H10 PIRQC#
B3 PIRQB#
D7 PIRQA#
B2
GPIO1
C9 GPIO22
C15
RSVD02
M13
REQ2#
A20 REQ1#
G16
RSVD01
K9
GPIO17/ STRAP2#
A2 GPIO48/ STRAP1#
G14
STRAP0#
D11
GNT2#
E16 GNT1#
A18
FRAME#
A16 PERR#
D10 TRDY#
A10 PLOCK#
A8 STOP#
F14 SERR#
B11 PME#
C22 IRDY#
B7 PCIRST#
A23 PCICLK
J12 DEVSEL#
B15 PAR
A5
C/BE3# L16
C/BE2# C13
C/BE1# M15
C/BE0# H16
AD31 B1
AD30 C1
AD29 C7
AD28 D9
AD27 C8
AD26 H12
AD25 G12
AD24 A6
AD23 B5
AD22 A3
AD21 B8
AD20 L12
AD19 B13
AD18 B9
AD17 E12
AD16 C11
AD15 E10
AD14 J14
AD13 L14
AD12 H14
AD11 E14
AD10 A13
AD9 D15
AD8 D16
AD7 B19
AD6 B18
AD5 C19
AD4 B17
AD3 C18
AD2 C17
AD1 D18
AD0 B22
R70 10K/J_4R70 10K/J_4
T34T34
T4T4
R392 8.2K/J_4R392 8.2K/J_4
R30 *1K/J_4R30 *1K/J_4
RP3 8.2K_8P4RRP3 8.2K_8P4R
1
3
5
7
2
4
6
8
![](asset-d.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PM_BATLOW#
ICH_RI#
TPT_PWROK
ICH_INTVRMEN
BOARDID0
RTC_X1
RTC_X2
BOARDID1
DMI_AC_ENABLE
SMLINK0
SMLINK1
BOARDID2
SYS_RST#
SUSC#
SUSB#
PDAT_SMB
PCLK_SMB
SMB_LINK_ALERT#
H_DPSLP#
SMBALERT#
MCH_SYNC#
H_PWRGD
THERM_ALERT#
14M_ICH
EC_RSMRST#
PCIE_WAKE#
PM_DPRSLPVR
DNBSWON#
RTCRST#
SM_INTRUDER#
DNBSWON#
SMB_LINK_ALERT#
SMBALERT#
SYS_RST#
EC_SMI#
CLKRUN#
PLT_RST#
PCIE_WAKE#
DMI_AC_ENABLE
SMLINK0
SMLINK1
BM_BUSY#
RTCRST#VCCRTC_3
SUSCLK
HWPG
EC_RSMRST#
TPT_PWROK
BM_BUSY#
ICH_RI#
PCLK_SMB
PDAT_SMB
PM_BATLOW#
MCH_SYNC#
VCCRTC_2VCCRTC_1VCCRTC_4
HWPG
PCH_GPIO26
PCH_GPIO27
PCH_GPIO9
PCH_GPIO28
PCH_GPIO24
PCH_GPIO33
PCH_GPIO12
PCH_GPIO13
PCH_GPIO14
PCH_GPIO15
BOARDID0
CLKRUN#
PLT_RST#
ICH_DPRSTP_R#
ACZ_BITCLK_AUDIO_R
ACZ_RST#_AUDIO_R
ACZ_SDOUT_AUDIO_R
ACZ_SYNC_AUDIO_R
THERM_ALERT#
PCH_GPIO6
PCH_GPIO7
PCH_GPIO14
PCH_GPIO15
PCH_GPIO9
PCH_GPIO8
ACZ_BITCLK_AUDIO_R
ACZ_RST#_AUDIO_R
ACZ_SDOUT_AUDIO_R
ACZ_SYNC_AUDIO_R
ACZ_RST#_AUDIO_R
ACZ_SDOUT_AUDIO_R
ACZ_SYNC_AUDIO_R
SM_INTRUDER#
ICH_INTVRMEN
BOARDID1
PCH_GPIO12
PCH_GPIO13
BOARDID2
EC_SMI#
PCH_GPIO8
TPT_PWROK
ACZ_BITCLK_AUDIO_R
PLTRST# [6,16,22,25,26,27]
LAD0[25,27] LAD1[25,27] LAD2[25,27] LAD3[25,27]
ACZ_SDINO[5]
14M_ICH[2]
CLKRUN# [27]
PM_STPPCI# [2]
PM_STPCPU# [2]
H_PWRGD [6,16]
DNBSWON# [16,27]
PCIE_WAKE# [22,25]
EC_RSMRST# [16,27]
SPKR [20]
SUSB# [16,27]
SUSC# [16,27]
H_DPSLP# [6]
HWPG [2,16,27]
LFRAME#[25,27]
SUSCLK [27]
ICH_DPRSTP# [6]
SMBDT1 [2,4,25]
SMBCK1 [2,4,25]
ACZ_SDIN1[20]
ACZ_RST#_CODEC[20]
ACZ_SDOUT_CODEC[20]
ACZ_SYNC_CODEC[20]
ACZ_BITCLK_CODEC[20] ACZ_BITCLK_CPU[5]
ACZ_RST#_CPU[5]
ACZ_SDOUT_CPU[5]
ACZ_SYNC_CPU[5]
ECPWROK[5,8,16,27]
TPT_PWROK [16]
VCC3_VCC3[11,12,14]
PDAT_SMB[25]
PCLK_SMB[25]
EC_SMI# [27]
THERM_ALERT# [5,6,27]
RTCRST#_EC [27]
+3V_S5
+3V
+3VPCU VCCRTC
+5V_S5
+3V
+1.05V
+3V
+3V
+3V
VCCRTC
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
TPT ACZ/GPIO/RTC
1B
Wednesday, November 16, 2011
ZE7
4013
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
TPT ACZ/GPIO/RTC
1B
Wednesday, November 16, 2011
ZE7
4013
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
TPT ACZ/GPIO/RTC
1B
Wednesday, November 16, 2011
ZE7
4013
INTVRMEN
Disable
Enable internal VccSus1_5 VRM
(default)
0
1
1
4 x 1s
ACZ_SYNC
(INT PD)
0
Description
1
Reserved1
Reserved
ACZ_SDOUT
(INT PD)
0
1 1 x 4s(1 port/4 lanes)
*
0
0
Platform Reset (CLG)
20MIL 20MIL
RTC (RTC)
13
TPT Power OK (CLG)
Mother Board ID (CLG)
Clock GEN I2C Level Shift
Tiger Point (CLG)
Follow CRB
<20101105> GPIO12 for A3-test CLKREQ setting
GPIO12 Command: For CLK Gen Byte5 CLKREQ# strap
Pull-high: 0x58 -> SRC2/4/6
Pull-low: 0x00 -> SRC1/3/5
<20101108> GPIO13 for A3-test LAN chip selection
Pull-high -> for Atheros LAN AR8158
Pull-down -> for Realtek LAN RTL8105TA-VC-CG
<20090529(A1A)_Checklist Rev0.7>
If integrated LAN is not used
LAN_RST# tie it to GND.
PCH: +3V_S5
CLK GEN: +3V
PCH: +3V_S5
CLK GEN: +3V
ML1220 Coin type
AHL03001406 Maxell (HML) 18mAH
AHL03001424 FDK (SAY) 15mAH
AHL03017100 Panasonic (MAT) 17mAH
Stuff -> Unuse thermal sensor
Unstuff -> Use thermal sensor
<20110426 (G1A)>
Add 0.1uF CAP to prevent PWROK glitch issue
2011/4/28 For EMI Sam request
<20110428 (G1A)>
Stuff 10K PD resistors from ZE7 A2-stage
<20110516_DGv1.5>
Change ACZ BITCLK/RST/SDOUT/SYNC to CPU RES from 33ohm to 90.9ohm
<20110607> PU to +3V_S5 for GPIO12/13 no use to
follow checklist v1.0
R451 33/J_4R451 33/J_4
EPROM
TGP
MISC
RTC SMB SPI
LPC AUDIO LAN
U22D
Tiger Point
EPROM
TGP
MISC
RTC SMB SPI
LPC AUDIO LAN
U22D
Tiger Point
DPRSTP# AB23
DPSLP# AA18
RSVD31 F20
GPIO8 K18
GPIO9 H19
GPIO10 M17
GPIO12 A24
GPIO13 C23
GPIO14 P5
GPIO15 E24
DPRSLPVR AB20
STP_PCI# Y16
STP_CPU# AB19
GPIO24 R3
GPIO25 C24
GPIO26 D19
GPIO27 D20
GPIO28 F22
CLKRUN# AC19
GPIO33 U14
GPIO34 AC1
GPIO38 AC23
GPIO39 AC24
CPUPWRGD/GPIO49 AB22
THRM# AB17
VRMPWRGD V16
MCH_SYNC# AC18
PWRBTN# E21
RI# H23
SUS_STAT#/LPCPD# G22
SUSCLK D22
SYS_RESET# G18
PLTRSTB G23
WAKE# C25
INTRUDER# T8
PWROK U10
RSMRST# AC3
INTVRMEN AD3
SPKR J16
SLP_S3# H20
SLP_S4# E25
SLP_S5# F21
BATLOW# B25
LDRQ1#/GPIO23
AA5
LAD0/FWH0
V6
LAD1/FWH1
AA6
LAD2/FWH2
Y5
LAD3/FWH3
W8
LFRAME#
Y4
HDA_RST#
U2
HDA_SDI0
W2
HDA_SDIN1
V2
HDA_SDIN2
P8
HDA_SDOUT
AA1
HDA_SYNC
Y1
CLK14
AA3
EE_CS
U3
EE_DIN
AE2
EE_DOUT
T6
EE_SHCLK
V3
LAN_CLK
T4
LANR_STSYNC
P7
LAN_RST#
B23
LAN_RXD0
AA2
LAN_RXD1
AD1
LAN_RXD2
AC2
LAN_TXD0
W3
LAN_TXD1
T7
LAN_TXD2
U4
RTCX1
W4
RTCX2
V5
RTCRST#
T5
SMBALERT#/GPIO11
E20
SMBCLK
H18
SMBDATA
E23
SMLALERT#
H21
SMLINK0
F25
SMLINK1
F24
SPI_MISO
R2
SPI_MOSI
T1
SPI_CS#
M8
SPI_CLK
P9
SPI_ARB
R4
GPIO6 W16
GPIO7 W14
BM_BUSY#/GPIO0 T15
HDA_BIT_CLK
P6
LDRQ0#
Y8
R215
150K/F_4
R215
150K/F_4
R458 332K/F_4R458 332K/F_4
T12T12
R28 10K/J_4R28 10K/J_4
C136
*30P/50V_4
C136
*30P/50V_4
T37T37
R393 10K/J_4R393 10K/J_4
R376
8.2K/J_4
R376
8.2K/J_4
R469
10K/J_4
R469
10K/J_4
R422 10K/J_4R422 10K/J_4
CN5
RTC SOCKET
CN5
RTC SOCKET
12
R211
20K/F_6
R211
20K/F_6
R401 1K/J_4R401 1K/J_4
R465 10K/J_4R465 10K/J_4
G1
*SHORT_PAD
G1
*SHORT_PAD
12
T5T5
Y4
32.768KHz,+-20PPM
Y4
32.768KHz,+-20PPM
1 4
2 3
R457
*10K/J_4
R457
*10K/J_4
R93 90.9/F_4R93 90.9/F_4
T21T21
R375 10K/J_4R375 10K/J_4
T17T17
T19T19
R218 2K/F_4R218 2K/F_4
Q38
2N7002K
Q38
2N7002K
3
2
1
T14T14
R90 33/J_4R90 33/J_4
R407 10K/J_4R407 10K/J_4
R378 8.2K/J_4R378 8.2K/J_4
R379 10K/J_4R379 10K/J_4
R467 10K/J_4R467 10K/J_4
R462
*10K/J_4
R462
*10K/J_4
R513 *0/J_4R513 *0/J_4 R92
*10K/J_4
R92
*10K/J_4
T10T10
R87
10K/J_4
R87
10K/J_4
C223
1U/10V_6
C223
1U/10V_6
C222
1U/10V_6
C222
1U/10V_6
R473 1M/F_6R473 1M/F_6
R402 8.2K/J_4R402 8.2K/J_4
U21
*TC7SH08FU
U21
*TC7SH08FU
2
14
3 5
R460 10K/J_4R460 10K/J_4
R418 10K/J_4R418 10K/J_4
T35T35
R380 10K/J_4R380 10K/J_4
R452 33/J_4R452 33/J_4
R417 0/J_4R417 0/J_4
T16T16
R49 10K/J_4R49 10K/J_4
R471 1K/F_4R471 1K/F_4
R495 10K/J_4R495 10K/J_4
T38T38
T18T18
C144 0.1U/10V_4C144 0.1U/10V_4
R108 *0/short_4R108 *0/short_4
T36T36
C349 6P/50V_4C349 6P/50V_4
Q27
METR3904-G
Q27
METR3904-G
2
1 3
T15T15R472 90.9/F_4R472 90.9/F_4
R434
10M/J_4
R434
10M/J_4
R420 10K/J_4R420 10K/J_4
T6T6
Q37
2N7002K
Q37
2N7002K
3
2
1
R395
100K_4
R395
100K_4
R394 10K/J_4R394 10K/J_4
R463
10K/J_4
R463
10K/J_4
C348 6P/50V_4C348 6P/50V_4
R374
8.2K/J_4
R374
8.2K/J_4
D16
CH500H-40
D16
CH500H-40
R468 90.9/F_4R468 90.9/F_4
R217 2K/F_4R217 2K/F_4
R216
68.1K/F_4
R216
68.1K/F_4
U4
TC7SH08FU
U4
TC7SH08FU
2
14
3 5
R404 10K/J_4R404 10K/J_4
R403 10K/J_4R403 10K/J_4
R383 8.2K/J_4R383 8.2K/J_4
D15
CH500H-40
D15
CH500H-40
C338 *0.1U/10V_4C338 *0.1U/10V_4
R461 33/J_4R461 33/J_4
R254
1K/J_4
R254
1K/J_4
R107 *56/F_4R107 *56/F_4
T20T20
R431 *10K/J_4R431 *10K/J_4
R101 *0/J_4R101 *0/J_4
R382 10K/J_4R382 10K/J_4
R454 90.9/F_4R454 90.9/F_4
C143
0.1U/10V_4
C143
0.1U/10V_4
R464 8.2K/J_4R464 8.2K/J_4
T8T8
![](asset-e.png)
1
1
A A
VCC1.5_SATAPLL
RVCC5_VCC5REF_SUS
VCCP_VCC1_05
VCC5_VCC5REF
VCC1.5_VCCDMIPLL
VCCP_VCC1_05
VCC1.5_VCC1.5
RVCC3_VCCSUS3
VCC3_VCC3
VCC3_VCC3 [11,12,13]
+1.5V
+3.3V_PRIME
+3V_S5
+5V_S5
+3V_S5
+1.5V
VCCRTC
+1.05V
+5V
+3V
+1.5V
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
TigerPoint Power
1B
Wednesday, November 02, 2011
ZE7
4014
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
TigerPoint Power
1B
Wednesday, November 02, 2011
ZE7
4014
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
TigerPoint Power
1B
Wednesday, November 02, 2011
ZE7
4014
45mA
10mA
0.216A
0.092A
10mA
14mA
6uA
1.422A
0.955A
6mA
24mA
14
<Layout note>
Place 0402 caps close to ball
Place 0603/0805 caps close to ICH
LAYOUT NOTE: place 10U CAP close to pin F18
Tiger Point (CLG)
C137 4.7U/10V_8C137 4.7U/10V_8
C351 .1U/10V_4C351 .1U/10V_4
R503 *0/short_6R503 *0/short_6
C57 .1U/10V_4C57 .1U/10V_4
R390 100/F_4R390 100/F_4
C97 1U/6.3V_4C97 1U/6.3V_4
R120 *0/short_6R120 *0/short_6
C76 1U/6.3V_4C76 1U/6.3V_4
C84 .1U/10V_4C84 .1U/10V_4
C121 .1U/10V_4C121 .1U/10V_4
POWER
TGP
5
U22E
Tiger Point
POWER
TGP
5
U22E
Tiger Point
VCC1_5_2 M9
VCC1_5_3 M20
VCC1_5_4 N22
VCC1_05_4 V10
V_CPU_IO W18
VCC1_5_1 AA8
VCCSUS3_3_4 F1
VCCSUS3_3_3 K7
VCCSUS3_3_2 N4
VCCSUS3_3_1 F18
VCC3_3_6 T9
VCC3_3_5 R10
VCC3_3_4 G10
VCC3_3_3 F10
VCC3_3_2 AD13
VCC3_3_1 H25
VCC1_05_3 P15
VCC1_05_2 K17
VCC1_05_1 J10
VCCUSBPLL F6
VCCDMIPLL Y25
VCCRTC AE3
VCCSATAPLL Y6
VCC5REF_SUS F5
VCC5REF F12
1U/10V_4C333 1U/10V_4C333
L20 *0/short_6L20 *0/short_6
R106 *0/short_6R106 *0/short_6
C151 .01U/25V_4C151 .01U/25V_4
C358 .1U/10V_4C358 .1U/10V_4
C72 1U/6.3V_4C72 1U/6.3V_4
C64 1U/6.3V_4C64 1U/6.3V_4
C135 1U/6.3V_4C135 1U/6.3V_4
C355 .01U/25V_4C355 .01U/25V_4
C70 1U/6.3V_4C70 1U/6.3V_4
C157 4.7U/10V_8C157 4.7U/10V_8
C119 1U/6.3V_4C119 1U/6.3V_4
R37 10/F_4R37 10/F_4
C102 1U/6.3V_4C102 1U/6.3V_4
C150
*4.7U/6.3V_6
C150
*4.7U/6.3V_6
C127 .1U/10V_4C127 .1U/10V_4
L19 *0/short_6L19 *0/short_6
D36 RB500V-40D36 RB500V-40
R430 *0/short_6R430 *0/short_6
C147
10U/10V_8
C147
10U/10V_8
C133 .1U/10V_4C133 .1U/10V_4
D4 RB500V-40D4 RB500V-40
C69 *10U/10V_8C69 *10U/10V_8
C74 1U/6.3V_4C74 1U/6.3V_4
C107 .1U/10V_4C107 .1U/10V_4
![](asset-f.png)
1
1
A A
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
TigerPoint GND
1B
Wednesday, November 02, 2011
ZE7
4015
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
TigerPoint GND
1B
Wednesday, November 02, 2011
ZE7
4015
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
TigerPoint GND
1B
Wednesday, November 02, 2011
ZE7
4015
15
Tiger Point (CLG)
TGP
U1LB
U22F
Tiger Point
TGP
U1LB
U22F
Tiger Point
VSS59 F2
VSS58 AE13
VSS57 G24
VSS56 AE25
VSS55 AE10
VSS54 AE1
VSS53 AD24
VSS52 AD20
VSS51 AD10
VSS50 AD2
VSS49 AC8
VSS48 AB8
VSS47 AB7
VSS46 AB6
VSS45 AB4
VSS44 Y24
VSS43 Y2
VSS42 W22
VSS41 W12
VSS40 V25
VSS39 V22
VSS38 V19
VSS37 V8
VSS36 V7
VSS35 V1
VSS34 T22
VSS33 T2
VSS32 R22
VSS31 R14
VSS30 P19
VSS29 P13
VSS28 P11
VSS27 N23
VSS26 N14
VSS25 N13
VSS24 N12
VSS23 N3
VSS22 M11
VSS21 M7
VSS20 L4
VSS19 K20
VSS18 K19
VSS17 K11
VSS16 K8
VSS15 K4
VSS14 H5
VSS13 H4
VSS12 H1
VSS11 G8
VSS10 G4
VSS09 F16
VSS08 E18
VSS07 B24
VSS06 B20
VSS05 B16
VSS04 B10
VSS03 B6
VSS02 A25
VSS01 A1
RSVD32 AE16
![](asset-10.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
HWPG_1.05V
+3.3V_PRIME_ON
NBSWON#
S5_ON EC_RSMRST#
DNBSWON# SUSC#
SUSB# SUSON
MAINON
HWPG ECPWROK
TPT_PWROK H_PWRGD
PLTRST#
NBSWON# [24,27]
EC_RSMRST# [13,27]
SUSC# [13,27]
SUSON [27,32,34]
S5_ON[27,30,35]
DNBSWON#[13,27]
+3.3V_PRIME_ON[27,31,34]
SUSB#[13,27] MAINON [27,32,33,34]
HWPG_1.05V [31,33,34]
HWPG[2,13,27] ECPWROK [5,8,13,27]
TPT_PWROK[13] H_PWRGD [6,13]
PLTRST#[6,13,22,25,26,27]
+5V_S5
+1.5V
+3V_S5
+1.5VSUS
+5V
+1.05V +VCC_CORE
+3.3V_PRIME +1.8V
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
Cedarview XDP
1B
Wednesday, November 02, 2011
ZE7
4016
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
Cedarview XDP
1B
Wednesday, November 02, 2011
ZE7
4016
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
Cedarview XDP
1B
Wednesday, November 02, 2011
ZE7
4016
16
Power Sequence Connector 30pin (CPU)
1
2
3
4
5
6
7
8
9
10
GND
NBSWON#
S5_ON
+5V_S5
+3V_S5
RSMRST#
DNBSWON#
SUSC#
SUSB#
SUSON
11
13
14
15
16
17
18
19
20
+1.5VSUS
MAINON
+5V
+1.5V
+1.05V
HWPG_1.05V
VRON
+VCC_CORE
+3.3V_PRIME
+1.8V
21
22
23
24
25
26
27
28
29
30
HWPG
ECPWROK
TPT_PWROK
H_PWRGD
PLTRST#
RESERVE
RESERVE
RESERVE
RESERVE
RESERVE
12
CN17
*30pin POWER SEQ CONN
CN17
*30pin POWER SEQ CONN
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
![](asset-11.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+5V_HDMI
TX2_HDMI-
HDMI_DDC_DATA
TX0_HDMI-
TX1_HDMI+
HDMI_DDC_CLK
TX3_HDMI+
TX1_HDMI-
TX2_HDMI+
TX3_HDMI-
TX0_HDMI+
HDMI_DDC_DATA
HDMI_DDC_CLK HDMI_DDC_CLK
HDMI_HPD
TX2_HDMI-
TX2_HDMI+
TX3_HDMI-
TX3_HDMI+
TX0_HDMI+
TX0_HDMI-
TX1_HDMI+
TX1_HDMI-TX1_HDMI-
TX1_HDMI+
HDMI_HPD
TX2_HDMI+
TX2_HDMI-
TX3_HDMI-
TX3_HDMI+
TX1_HDMI-
TX1_HDMI+
TX3_HDMI-
TX3_HDMI+
TX2_HDMI-
TX2_HDMI+
TX0_HDMI-
TX0_HDMI+
TX0_HDMI-
TX0_HDMI+
HDMI_DDC_DATA
HDMI_HPD
HDMI_DDI0_HPD#
HDMI_HPD
TX0_HDMI-
TX0_HDMI+
HDMITX1N_MOS
HDMITX1P_MOS
HDMITX2N_MOS
HDMITX2P_MOS
TX3_HDMI-
TX3_HDMI+
TX2_HDMI-
TX2_HDMI+
TX1_HDMI+
TX1_HDMI-
HDMITX3N_MOS
HDMITX3P_MOS
HDMITX0N_MOS
HDMITX0P_MOS
HDMI_DDC_DATA
HDMI_DDC_CLKHDMI_DDC_CLK_L
HDMI_DDC_DATA_L
HDMI_DDI0_HPD#[5]
TX2_HDMI+[5]
TX2_HDMI-[5] TX1_HDMI+[5]
TX1_HDMI-[5] TX0_HDMI+[5]
TX0_HDMI-[5] TX3_HDMI+[5]
TX3_HDMI-[5]
DDI0_HDMI_SCL[5]
DDI0_HDMI_SDA[5]
+5V
+3V
+3V
+3V +3V
+3V
+3V
+3V +5V
+5V
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
HDMI
1B
Wednesday, November 16, 2011
ZE7
4017
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
HDMI
1B
Wednesday, November 16, 2011
ZE7
4017
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
HDMI
1B
Wednesday, November 16, 2011
ZE7
4017
17
HDMI (HDM)
Close to HDMI Connector
EMI reserve for HDMI (EMC) ESD Protect (HDM)
Close to HDMI Connector
Close to HDMI connector
Level Shifter motherboard topology for max data rate of 1.65Gb/s
SDVO I2C Control (HDM)
The DDC signals are rated at 5V at connector. The
passgate can also be used to protect against
back-power
when computer is OFF but the display is ON and still
pulled up to 5 V.
<20101209> Change to DFHS19FR015 by ME design change
<20101001> Change from 100K to 1M ohm (follow DG0.7)
<20100115(B2A)>
Add fuse to meet IEC 60950-1
2nd certificationand.
<20100909_Jennifer> Change R500/ R502
from 1.5k to 2.2k to follow CRB.
C183
*0.1u/10V_4
C183
*0.1u/10V_4
R515 100K/J_4R515 100K/J_4
D39 RB500V-40D39 RB500V-40
Q23
2N7002K
Q23
2N7002K
3
2
1
0.22U/6.3V_4
C367
0.22U/6.3V_4
C367
R180 100K/J_4R180 100K/J_4
U6
*RClamp0524P
U6
*RClamp0524P
1
1
2
2
GND_3/8
3
4
4
5
566
77
99
10 10
R534 2.2K/J_4R534 2.2K/J_4
R200 620/F_4R200 620/F_4
CN16
HDMI connector
CN16
HDMI connector
SHELL1 20
SHELL2 21
D2+
1
D2 Shield
2
D2-
3
D1+
4
D1 Shield
5
D1-
6
D0+
7
D0 Shield
8
D0-
9
CK+
10
CK Shield
11
CK-
12
CE Remote
13
NC
14
DDC CLK
15
DDC DATA
16
GND
17
+5V
18
HP DET
19
GND 23
GND 22
R209 100K/J_4R209 100K/J_4
Q22
2N7002K
Q22
2N7002K
3
2
1
R535 2.2K/J_4R535 2.2K/J_4
R502 2.2K/J_4R502 2.2K/J_4
R126
10K/J_4
R126
10K/J_4
R174 620/F_4R174 620/F_4
R171 620/F_4R171 620/F_4
F2
1.1A 8V POLY(SMD1206P110TFT)
F2
1.1A 8V POLY(SMD1206P110TFT)
12
R189 620/F_4R189 620/F_4
Q14
2N7002K
Q14
2N7002K
3
2
1
Q13
2N7002K
Q13
2N7002K
3
2
1
R192 100K/J_4R192 100K/J_4
L22 BLM18AG601_6L22 BLM18AG601_6
R177 620/F_4R177 620/F_4R195 620/F_4R195 620/F_4
Q19
2N7002K
Q19
2N7002K
3
2
1
U7
*RClamp0524P
U7
*RClamp0524P
1
1
2
2
GND_3/8
3
4
4
5
566
77
99
10 10
L23 BLM18AG601_6L23 BLM18AG601_6
R245 100K/J_4R245 100K/J_4
R142
1M/F_6
R142
1M/F_6
Q16
2N7002K
Q16
2N7002K
3
2
1
R138
*100K_4
R138
*100K_4
Q24
2N7002K
Q24
2N7002K
3
2
1
R185 620/F_4R185 620/F_4
R179
*100/F_4
R179
*100/F_4
Q17
2N7002K
Q17
2N7002K
3
2
1
C180
*0.1u/10V_4
C180
*0.1u/10V_4
Q25
2N7002K
Q25
2N7002K
3
2
1
D41 RB500V-40D41 RB500V-40
R173
*100/F_4
R173
*100/F_4
R500 2.2K/J_4R500 2.2K/J_4
R176 100K/J_4R176 100K/J_4
R233 100K/J_4R233 100K/J_4
U9
*RClamp0524P
U9
*RClamp0524P
1
1
2
2
GND_3/8
3
4
4
5
566
77
99
10 10
R190 100K/J_4R190 100K/J_4
R187
*100/F_4
R187
*100/F_4
Q7
2N7002K
Q7
2N7002K
3
2
1
Q18
2N7002K
Q18
2N7002K
3
2
1
R196
*100/F_4
R196
*100/F_4
R181 620/F_4R181 620/F_4
![](asset-12.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LCD_VADJ
CCD_POWER
CRTVDD5
CRT_VSYNC1
CRT_11
CRT_G1
CRT_HSYNC1
CRT_R1
CRT_B1 CRTHSYNC
CRTVSYNC
CRT_SDA
CRT_SCL
CRTVDD5
CRTVDD5
CRT_BYP
CRT_B1
CRT_R1
CRT_G1
CRTVSYNC
CRTHSYNC
VSYNC_R
HSYNC_R
CRTVSYNC
CRT_SCL
CRTHSYNC
CRTVDD5
CCD_POWER
LCD_CLK_R_EDPTX3+
LCD_DATA_R_EDPTX3-
TXLOUT0_R-_EDPTX1-_R1
TXLOUT1_R+_EDP_AUXP_R1
TXLOUT1_R-_EDP_AUXN_R1
TXLOUT2_R+_EDPTX0+_R1
TXLCLKOUT+_R_EDPTX2+_R1
TXLCLKOUT-_R_EDPTX2-_R1
TXLOUT0_R+_EDPTX1+_R1
LCDVCC_1
CRT_SDACRT_SCL
CRT_SDA
TXLOUT2_R-_EDPTX0-_R1
+3V_EDP_HPD
DDI1_TX0_DP
DDI1_TX0_DN TXLOUT2_R+_EDPTX0+
TXLOUT2_R-_EDPTX0-
TXLOUT0_R+_EDPTX1+
TXLOUT0_R-_EDPTX1-
TXLOUT1_R+_EDP_AUXP
TXLOUT1_R-_EDP_AUXN
TXLOUT2_R+_EDPTX0+
TXLOUT2_R-_EDPTX0-
V_BLIGHT
USBP2+_R
USBP2-_R
+3V_EDP_HPD
+3V_EDP_HPD
TXLOUT1_R-_EDP_AUXN
TXLOUT1_R+_EDP_AUXP
DDI1_AUX_DN
DDI1_AUX_DP
DISPON
LCD_VADJ
DDI1_HPD
DDI1_HPD
TXLOUT1_R-_EDP_AUXN
TXLOUT1_R+_EDP_AUXP
TXLCLKOUT-_R_EDPTX2-
TXLCLKOUT+_R_EDPTX2+
LCD_CLK_R_EDPTX3+
LCD_DATA_R_EDPTX3-
USBP2-_R
USBP2+_R
BL#
DISPON
LID#
DDI1_TX1_DP
DDI1_TX1_DN
DDI1_TX2_DP
DDI1_TX2_DN
DDI1_TX3_DP
DDI1_TX3_DN
TXLOUT0_R+_EDPTX1+
TXLOUT0_R-_EDPTX1-
TXLCLKOUT+_R_EDPTX2+
TXLCLKOUT-_R_EDPTX2-
LCD_DATA_R_EDPTX3-
LCD_CLK_R_EDPTX3+
TXLOUT2_R-_EDPTX0-
TXLOUT2_R+_EDPTX0+
TXLCLKOUT+_R_EDPTX2+_R1
TXLCLKOUT-_R_EDPTX2-_R1
TXLOUT1_R+_EDP_AUXP
TXLOUT1_R-_EDP_AUXN
TXLOUT0_R-_EDPTX1-
TXLOUT0_R+_EDPTX1+
TXLCLKOUT+_R_EDPTX2+
TXLCLKOUT-_R_EDPTX2-
TXLOUT2_R+_EDPTX0+_R1
TXLOUT2_R-_EDPTX0-_R1
TXLOUT1_R+_EDP_AUXP_R1
TXLOUT1_R-_EDP_AUXN_R1
TXLOUT0_R-_EDPTX1-_R1
TXLOUT0_R+_EDPTX1+_R1
+5V_LCD
INT_LVDS_PWM[5]
CONTRAST[27]
CRT_B[5]
CRT_G[5]
CRT_R[5]
INT_LVDS_DIGON[5]
CRT_VSYNC [5]
CRT_HSYNC [5]
DDI1_TX0_DP[5] DDI1_TX0_DN[5]
TXLOUT0+[5] TXLOUT0-[5]
TXLOUT1+[5] TXLOUT1-[5]
TXLOUT2+[5] TXLOUT2-[5]
DDI1_AUX_DP[5] DDI1_AUX_DN[5]
CRT_DDC_SCL [5]
CRT_DDC_SDA [5]
DDI1_HPD#[5]
TXLCLKOUT-[5] TXLCLKOUT+[5]
LCD_CLK[5] LCD_DATA[5]
USBP2-[10] USBP2+[10]
INT_LVDS_BLON [5]
EC_FPBACK# [27]
LID# [27]
DDI1_TX1_DP[5] DDI1_TX1_DN[5]
DDI1_TX2_DP[5] DDI1_TX2_DN[5]
DDI1_TX3_DP[5] DDI1_TX3_DN[5]
CCD_POWER
+3V
+3V
+3V
LCDVCC
VIN
CCD_POWER
LCDVCC
+3V
+5V
+3V
+3V
+3V
+3V
+3VPCU
+3V
+3V
+5V
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
CRT/LVDS/EDP
1B
18 40Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
CRT/LVDS/EDP
1B
18 40Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
CRT/LVDS/EDP
1B
18 40Wednesday, November 02, 2011
ZE7
<Layout note>
PLACE inductances 90 DEGREE FROM EACH OTHER
<Layout note>
Close to CONN
18
HALL IC (HSR) LCD POWER SWITCH (LDS) CAMERA POWER (CCD)
LCD MODULE (LDS)
CRT(CRT)
<EMI>
<20100115(B2A)>
Add F1(fuse) to meet IEC 60950-1 2nd certificationand.
Refer to INTEL DG co-layout
Refer to INTEL DG co-layout
Refer to INTEL DG co-layout
Refer to INTEL DG co-layout
Refer to INTEL DG co-layout
20mA*24pcs=480mA
0.15A
Irush=1.5A
AVG=0.24A
Trace Impedance use
single-ended 50ohm and differential 90ohm
Single-ended 50ohm
Differential 90ohm
eDP (LDS)
IVO panel : 21.W/5V=0.42A
2nd source: 4.7P(+-0.25P) CH-4706TB01
Reserve for IVO panel
<G1A>
Change C138 from 4.7U to 1U
Pull up at CPU side
<C-test> Chang to DFHS30FR048 for SMT ME Peter request
R76 47/F_4R76 47/F_4
C310
4.7u/10V_8
C310
4.7u/10V_8
L15 PBY160808T-220Y-NL15 PBY160808T-220Y-N
C325 *EDP@.1U/16V_4C325 *EDP@.1U/16V_4
R85
150/F_4
R85
150/F_4
R83
150/F_4
R83
150/F_4
R84
150/F_4
R84
150/F_4
D8 RB500V-40D8 RB500V-40
C313 *EDP@.1U/16V_4C313 *EDP@.1U/16V_4
R368 *0/short_4R368 *0/short_4
L13 PBY160808T-220Y-NL13 PBY160808T-220Y-N
D44 *VPORT_6D44 *VPORT_6
2 1
C316 *EDP@.1U/16V_4C316 *EDP@.1U/16V_4
C86 *100P/50V_4C86 *100P/50V_4
R22 LVDS@0/J_4R22 LVDS@0/J_4
R356 LVDS@0/J_4R356 LVDS@0/J_4
L16 0/J_6L16 0/J_6
C123 *100P/50V_4C123 *100P/50V_4
4.7U/6.3V_6
C328
4.7U/6.3V_6
C328
C131 *100P/50V_4C131 *100P/50V_4
C322 *EDP@.1U/16V_4C322 *EDP@.1U/16V_4
C108
*10P/50V_4
C108
*10P/50V_4
C327
.1U/10V_4
C327
.1U/10V_4
MR1
APX9132H AI-TRG
MR1
APX9132H AI-TRG
2
3
1
C77
4.7P/50V_4
C77
4.7P/50V_4
C331 *EDP@.1U/16V_4C331 *EDP@.1U/16V_4
C78
4.7P/50V_4
C78
4.7P/50V_4
R367 *0/short_4R367 *0/short_4
R27 *EDP@0/J_4R27 *EDP@0/J_4
R354
100K/J_4
R354
100K/J_4
L17 0/J_6L17 0/J_6
R118
10K_4
R118
10K_4
R373 *0/short_4R373 *0/short_4
C79
4.7P/50V_4
C79
4.7P/50V_4
R536
47/F_6
R536
47/F_6
C35
.1U/10V_4
C35
.1U/10V_4
C319
.1U/10V_4
C319
.1U/10V_4
C114
*10P/50V_4
C114
*10P/50V_4
L14 PBY160808T-220Y-NL14 PBY160808T-220Y-N
CN10
CRT CONN
CN10
CRT CONN
15
14
13
12
111
2
3
4
5
6
7
8
9
10
1617
R21 *EDP@0/J_4R21 *EDP@0/J_4
C109
*10P/50V_4
C109
*10P/50V_4
R359 LVDS@0/J_4R359 LVDS@0/J_4
R25
*EDP@100K/J_4
R25
*EDP@100K/J_4
CN1
LCD CONN
CN1
LCD CONN
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30 33 33
34 34
32 32
31 31
4.7U/25V_8
C18
4.7U/25V_8
C18
C38 .1U/10V_4C38 .1U/10V_4
Q6
2N7002K
Q6
2N7002K
3
2
1
D7 *VPORT_6D7 *VPORT_6
21
0.1U/50V_6
C19
0.1U/50V_6
C19
R372 *0/short_4R372 *0/short_4
C36
.1U/10V_4
C36
.1U/10V_4 R79
2.2K/J_4
R79
2.2K/J_4
R91 *100K_4R91 *100K_4
R352 LVDS@0/J_4R352 LVDS@0/J_4
R357 LVDS@0/J_4R357 LVDS@0/J_4
C37 *10P/50V_4C37 *10P/50V_4
R353 LVDS@0/J_4R353 LVDS@0/J_4
T2T2
C332 *EDP@.1U/16V_4C332 *EDP@.1U/16V_4
R364 *0/short_4R364 *0/short_4
R350 0/J_4R350 0/J_4
R347 LVDS@0/J_4R347 LVDS@0/J_4
C47 0.22U/25V_6C47 0.22U/25V_6
C314 *EDP@.1U/16V_4C314 *EDP@.1U/16V_4
C326 *EDP@.1U/16V_4C326 *EDP@.1U/16V_4
*IVO@4.7U/25V_8
C22
*IVO@4.7U/25V_8
C22
1U/10V_6
C138
1U/10V_6
C138
C312 *0.1U/10V_4C312 *0.1U/10V_4
R23
*EDP@1K/J_4
R23
*EDP@1K/J_4
R366
*EDP@100K_4
R366
*EDP@100K_4
C308 1000P/50V_4C308 1000P/50V_4
R362 *0/short_4R362 *0/short_4
R345 *EDP@0/J_8R345 *EDP@0/J_8
R13 0/J_6R13 0/J_6
R75 47/F_4R75 47/F_4
R358 LVDS@0/J_4R358 LVDS@0/J_4
R20 *0/short_4R20 *0/short_4
U19
IC(5P) G5243AT11U
U19
IC(5P) G5243AT11U
OUT 1
GND 2
ON/OFF
3
IN
4
GND 5
IN
6
R365
*EDP@100K_4
R365
*EDP@100K_4
R78
2.2K/J_4
R78
2.2K/J_4
R113
10K_4
R113
10K_4
R363 *0/short_4R363 *0/short_4
R361 *0/short_4R361 *0/short_4
+
C309 4.7U/10V_8
+
C309 4.7U/10V_8
R349 *0/short_8R349 *0/short_8
R370 LVDS@0/J_4R370 LVDS@0/J_4
Q5
DTC144EUA
Q5
DTC144EUA
1 3
2
U3
IP4772_Rout=10ohm
U3
IP4772_Rout=10ohm
VCC_SYNC
1
VCC_VIDEO
2
VIDEO_1
3
VIDEO_2
4
VCC_DDC
7
GND
6
BYP
8
VIDEO_3
5
SYNC_OUT2 16
SYNC_OUT1 14
SYNC_IN2 15
SYNC_IN1 13
DDC_IN1 10
DDC_IN2 11
DDC_OUT1 9
DDC_OUT2 12
R59 0/J_4R59 0/J_4
Q4
2N7002K
Q4
2N7002K
3
2
1
C315 *EDP@.1U/16V_4C315 *EDP@.1U/16V_4
R26 0/J_6R26 0/J_6
R344 *0/short_6R344 *0/short_6
R371 LVDS@0/J_4R371 LVDS@0/J_4
Q3
*EDP@2N7002K
Q3
*EDP@2N7002K
3
2
1
F1
1.1A 8V POLY(SMD1206P110TFT)
F1
1.1A 8V POLY(SMD1206P110TFT)
12
R60 *0/J_4R60 *0/J_4
R348 LVDS@0/J_4R348 LVDS@0/J_4
C85 *100P/50V_4C85 *100P/50V_4
C318
.01U/16V_4
C318
.01U/16V_4
*IVO@0.1U/50V_6
C21
*IVO@0.1U/50V_6
C21
R19 *0/short_4R19 *0/short_4
C324
*2.2U/6.3V_6
C324
*2.2U/6.3V_6
R131
100K_4
R131
100K_4
C323 *EDP@.1U/16V_4C323 *EDP@.1U/16V_4
C39 *0.1U/10V_4C39 *0.1U/10V_4
![](asset-13.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MX7
MX5
MY13
MY0
MY3
MY5
MY8
MX2
MX1
MY10
MY11
MX0
MY12
MY14
MY15
MY2
MX6
MY1
MX4
MY4
MY6
MY7
MX3
MY9
MX0
MX1
MY8
MX2
MY9
MX3
MX4
MY2
MX6
MX5
MY0
MX7
MY1
MY3
MY10
MY11
MY12
MY15
MY13
MY14
MY4
MY7
MY5
MY6
TP_R#
TP_L#
BT_LED
BT_POWER
TPDATA_CN
TPCLK_CN
TP_L#
TP_R#
MX7 [27]
MX6 [27]
MX5 [27]
MY0 [27]
MY1 [27]
MY2 [27]
MX4 [27]
MY3 [27]
MY4 [27]
MY5 [27]
MY6 [27]
MY7 [27]
MY8 [27]
MX3 [27]
MY9 [27]
MX2 [27]
MX1 [27]
MY10 [27]
MY11 [27]
MX0 [27]
MY12 [27]
MY14 [27]
MY15 [27]
MY13 [27]
BT_POWERON#[25,27]
USBP6-[10] USBP6+[10]
TPCLK [27]
TPDATA [27]
+5V+5V_TP
+3V
+5V_TP
+5V_TP
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
KB/BT/TP/LED/Power Connector
1B
19 40Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
KB/BT/TP/LED/Power Connector
1B
19 40Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
KB/BT/TP/LED/Power Connector
1B
19 40Wednesday, November 02, 2011
ZE7
0603 size
CX121T30001:3A/120ohm_8
<EMI>
<EMI>
3mA
19
BLUETOOTH (BTM)KEYBOARD (KBC)
TOUCH PAD (TPD)
61mA
<EMI>
CX08T121000:0.4A/120ohm_6
CX121T04000:0.4A/120ohm_6
<20110214(E1A)>
Change CP1~CP6 footprint from
8p4r-0402-smt to 8P4R, for SMT open issue.
Left Button
Right Button
C248
BT@1000p/50V_4
C248
BT@1000p/50V_4
L7 0.4A/120ohm_6L7 0.4A/120ohm_6
T30T30
D42
*14V/38V/100P_4
D42
*14V/38V/100P_4
12
R18
4.7K/J_4
R18
4.7K/J_4
CP4
*220P_8P4R
CP4
*220P_8P4R
1
3
5
7
2
4
6
8
CN3
TP_CONN
CN3
TP_CONN
4
3
2
1
5
6
7
8
C33
10P/50V_4
C33
10P/50V_4
C270
*BT@1000p/50V_4
C270
*BT@1000p/50V_4
C34
10P/50V_4
C34
10P/50V_4
L9 3A/120ohm_8L9 3A/120ohm_8
CN2
KB CONN
CN2
KB CONN
3
4
5
6
7
2
9
10
11
12
13
14
15
16
17
18
19
20
21
22
8
1
23
24
25
26
SW3
TP switch
SW3
TP switch
1
2
3
4
5
6
R24
4.7K/J_4
R24
4.7K/J_4
R282
BT@10K/J_4
R282
BT@10K/J_4
L8 0.4A/120ohm_6L8 0.4A/120ohm_6
C30
.1U/10V_4
C30
.1U/10V_4
CP5
*220P_8P4R
CP5
*220P_8P4R
1
3
5
7
2
4
6
8
+
C246
BT@0.22u/25V_6
+
C246
BT@0.22u/25V_6
D43
*14V/38V/100P_4
D43
*14V/38V/100P_4
12
CP3
*220P_8P4R
CP3
*220P_8P4R
1
3
5
7
2
4
6
8
SW2
TP switch
SW2
TP switch
1
2
3
4
5
6
C283
*BT@0.1U/10V_4
C283
*BT@0.1U/10V_4
Q33
BT@AO3413
Q33
BT@AO3413
3
2
1
CN7
BT@BT_CONN
CN7
BT@BT_CONN
1
2
3
4
56
7
CP2
*220P_8P4R
CP2
*220P_8P4R
1
3
5
7
2
4
6
8
CP6
*220P_8P4R
CP6
*220P_8P4R
1
3
5
7
2
4
6
8
CP1
*220P_8P4R
CP1
*220P_8P4R
1
3
5
7
2
4
6
8
![](asset-14.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+AZA_VDD_R
PD#
MIC1_R1
HP_JD#
MIC1_L1
MIC1_JD#
L_SPK+
L_SPK-
R_SPK-
R_SPK+
SENSEA
+AZA_VDD
HPR
ACZ_SDIN1_R
HPL
DMIC_CLK
EAPD#
BEEP_1PCBEEP_C
DMIC_DAT
HPL_SYSHPL
HPR
HPL-1
R_SPK+
R_SPK- L_SPK-_1L_SPK- L_SPK+_1
R_SPK-_1
L_SPK+
R_SPK+_1
EAPD#
ACZ_RST#_CODEC
MIC1-VREFO-L
+5VPVDD1
+5VPVDD2
INT_AMIC-VREFO
HP_JD#
HPR-1
MIC2-JD#
MIC2-JD#
MIC2_L2
MIC2-VREFO
MIC2_R2
MIC2_R2
MIC2_L2
MIC2-VREFO
SENSEB
PD#
LIN2_INT_L1
LIN2_INT_R1
MIC1-VREFO-R
MIC1-VREFO-L
MIC1_L3
MIC1_JD#
MIC1_R
MIC1_L
MIC1_R3
MIC1_JD#
MIC1_L2
MIC1_R2
MIC1_L1
MIC1_R1
MIC1-VREFO-R
HPR_SYS
INT_AMIC-VREFO
COMBO_MIC
AMIC2_INT AMIC2_INT_R
AMIC2_INT
ACZ_SDOUT_CODEC [13]
ACZ_BITCLK_CODEC [13]
ACZ_SDIN1 [13]
ACZ_SYNC_CODEC [13]
ACZ_RST#_CODEC [13]
SPKR [13]
AMP_MUTE# [27]
PCBEEP [27]
+5VA
ADOGND
ADOGND
ADOGND
ADOGND
ADOGND
ADOGND
ADOGND
+5VA
ADOGND
+5V
+5V
+5V
+AZA_VDD
+3V
ADOGND
ADOGND
ADOGND
ADOGNDADOGND
+5VA
+5V
ADOGND ADOGND
ADOGND
ADOGNDADOGND
ADOGND
ADOGND
ADOGND
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
ALC271X / AMP / SPK
1B
20 40Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
ALC271X / AMP / SPK
1B
20 40Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
ALC271X / AMP / SPK
1B
20 40Wednesday, November 02, 2011
ZE7
Place next to pin 27
0V : Power down Class D SPK amplifier
5V : Power up Class D SPK amplifier
Spilt by AGND
DIGITAL
ALC271X-VB3-GR
ANALOG
Place next to pin 1
Place next to pin 9
Place next to pin 39
Placement near Audio Codec
Place next to pin 25
1.6Vrms
Demodulation Filter
Place close to Codec
ANALOG
Place next to pin 38
Place next to pin 46 PCBEEP dont coupling any signals if possible
8/17 separate PCBEEP to Digital from Realtek suggestion
ANALOG DIGITAL
If either HDA device io power use +1.5V,
all device IO power change to +1.5V
Spilt by PGND
Spilt by DGND
40mil for each signal
Place near codec
20
Codec ALC271X (ADO) EARPHONE (AMP)
MIC (AMP)
Internal Speaker (AMP)
Mute (ADO)
Power (ADO)
<20100917> Add 22k PD by FAE
suggestion for discharing
<20101103> Add EC PWM control
for beep sound volumn control
<20101115> Change to 10K by codec FAE suggestion
Near CN13
Internal Analog MIC (AMP)
Normal Open Jack
Normal Open Jack
<20101115> Change to 10K by codec FAE suggestion
GND
<20110428> Add 1n PD to AGND for amic
noise depressing by FAE Vic suggestion
<20110706> Stuff TVS BC040201Z00 for ESD solution
<20110811> For analog mic ESD protection using
+
C206
2.2U/6.3V_6
+
C206
2.2U/6.3V_6
R226 20K/F_4R226 20K/F_4
D37
*14V/38V/100P_4
D37
*14V/38V/100P_4
12
C257 *22P/50V_4C257 *22P/50V_4
C239 1u/16V_6C239 1u/16V_6
C264
100P/50V_4
C264
100P/50V_4
D9
TVS/6pF_4
D9
TVS/6pF_4
12
R183 0_6R183 0_6
C260 1U/10V_6C260 1U/10V_6
L25 0/J_8L25 0/J_8
T55T55
C207
.1U/10V_4
C207
.1U/10V_4 C219
10U/6.3V_6
C219
10U/6.3V_6
R14010K/J_4 R14010K/J_4
R268 *0/short_6R268 *0/short_6
C2402.2U/6.3V_6 C2402.2U/6.3V_6
C269
*68p/50V_6
C269
*68p/50V_6
UNIVERSAL JACK
CN13
010030FR006G119ZR
UNIVERSAL JACK
CN13
010030FR006G119ZR
3
1
6
2
4
5
R497 47/F_4R497 47/F_4
R184 *0/J_6R184 *0/J_6
R274 47K/J_4R274 47K/J_4
C230
4.7U/6.3V_6
C230
4.7U/6.3V_6
R285
*10K/J_4
R285
*10K/J_4
R2431K/J_4 R2431K/J_4
C243
.1U/10V_4
C243
.1U/10V_4
R236
22K/F_4
R236
22K/F_4
C158
*22P-50V_4
C158
*22P-50V_4
R261 *0/J_6R261 *0/J_6
R283 *0/short_6R283 *0/short_6
D38
*14V/38V/100P_4
D38
*14V/38V/100P_4
12
R447 0_6R447 0_6
C275
*68p/50V_6
C275
*68p/50V_6
UNIVERSAL JACK
CN15
010030FR006G119ZR
UNIVERSAL JACK
CN15
010030FR006G119ZR
3
1
6
2
4
5
D11
*14V/38V/100P_4
D11
*14V/38V/100P_4
12
D40
*14V/38V/100P_4
D40
*14V/38V/100P_4
12
C261
*68p/50V_6
C261
*68p/50V_6
R242 *0/short_6R242 *0/short_6
R441 *0/J_6R441 *0/J_6
C2442.2U/6.3V_6 C2442.2U/6.3V_6
R202 1K/F_4R202 1K/F_4
+
C213
2.2U/6.3V_6
+
C213
2.2U/6.3V_6
R273 47K/J_4R273 47K/J_4
C265
4.7U/6.3V_6
C265
4.7U/6.3V_6
C258
.1U/10V_4
C258
.1U/10V_4
R455 1K/F_4R455 1K/F_4
C221
4.7U/6.3V_6
C221
4.7U/6.3V_6
R178
4.7K/F_4
R178
4.7K/F_4
R265 33/J_4R265 33/J_4
+
C209
2.2U/6.3V_6
+
C209
2.2U/6.3V_6
R511 *Short_6R511 *Short_6
R225 *0/J_6R225 *0/J_6
C204
1n/50V_4
C204
1n/50V_4
*0.1u/16V_6
C201
*0.1u/16V_6
C201
R257 20K/F_4R257 20K/F_4
R439 *0/J_6R439 *0/J_6
C231
*10U/6.3V_8
C231
*10U/6.3V_8
D12
*VPORT_6
D12
*VPORT_6
12
C218 4.7u/6.3V_6C218 4.7u/6.3V_6
R244
2.2K/J_4
R244
2.2K/J_4
C363
2200P/50V_4
C363
2200P/50V_4
R1301K/J_4 R1301K/J_4
C256
.1U/10V_4
C256
.1U/10V_4
R249 39.2K/F_4R249 39.2K/F_4
R175 *0/J_6R175 *0/J_6
R168 *0/J_6R168 *0/J_6
D25 RB500V-40D25 RB500V-40
U11
ALC271X-VB3-GR
U11
ALC271X-VB3-GR
DVDD1
1
GPIO0/DMIC-DATA
2
GPIO1/DMIC-CLK
3
PD#
4
SDATA-OUT
5
BIT-CLK
6
DVSS2
7
SDATA-IN
8
DVDD-IO
9
SYNC
10
RESET#
11
PCBEEP
12
Sense A 13
LINE2-L 14
LINE2-R 15
MIC2-L 16
MIC2-R 17
Sense-B 18
JDREF 19
MONO-OUT 20
MIC1-L 21
MIC1-R 22
LINE1-L 23
LINE1-R 24
AVDD1 25
AVSS1 26
VREF 27
LDO-CAP 28
MIC2-VREFO 29
MIC1-VREFO-R 30
MIC1-VREFO-L 31
HP-OUT-L 32
HP-OUT-R 33
CPVEE 34
CBN 35
CBP 36
AVSS2
37
AVDD2
38
PVDD1
39
SPK-L+
40
SPK-L-
41
PVSS1
42
PVSS2
43
SPK-R-
44
SPK-R+
45
PVDD2
46
SPDIFO2/EAPD
47
SPDIFO
48
PGND
49
R188 *0/J_6R188 *0/J_6
R232 20K/F_4R232 20K/F_4
R520 *0/J_6R520 *0/J_6
C237 1u/16V_6C237 1u/16V_6
C251 1000P/50V_4C251 1000P/50V_4
R220 *0/short_6R220 *0/short_6
R272 *0/short_6R272 *0/short_6
L39 0_6L39 0_6
D24 RB500V-40D24 RB500V-40
C208 10U/6.3V_6C208 10U/6.3V_6
R172 47/F_4R172 47/F_4
C252
.1U/10V_4
C252
.1U/10V_4
CN6
R-L-SPEAKERS
CN6
R-L-SPEAKERS
1
2
3
4
C247
4.7U/6.3V_6
C247
4.7U/6.3V_6
C217
10U/6.3V_6
C217
10U/6.3V_6
D23 RB500V-40D23 RB500V-40
C241
*68p/50V_6
C241
*68p/50V_6
C174
2200P/50V_4
C174
2200P/50V_4
R267
4.7K/J_4
R267
4.7K/J_4
R203 0/J_6R203 0/J_6
R444 0/J_6R444 0/J_6
R152
*1K/J_4
R152
*1K/J_4
R453
4.7K/F_4
R453
4.7K/F_4
R496
*1K/J_4
R496
*1K/J_4
C356 4.7u/6.3V_6C356 4.7u/6.3V_6
C234
4.7U/6.3V_6
C234
4.7U/6.3V_6
C220
.1U/10V_4
C220
.1U/10V_4
C212
0.1U/10V_4
C212
0.1U/10V_4
R501 0/J_6R501 0/J_6
C226
.1U/10V_4
C226
.1U/10V_4
T54T54
C187
*470p/50V_4
C187
*470p/50V_4
L21 0_6L21 0_6
C195 1000P/50V_4C195 1000P/50V_4
C353
*470p/50V_4
C353
*470p/50V_4
C263
4.7U/6.3V_6
C263
4.7U/6.3V_6
C227
.1U/10V_4
C227
.1U/10V_4
CN4
INT_MIC
CN4
INT_MIC
1
2
R290 *0/short_6R290 *0/short_6
C210
*10U/6.3V_6
C210
*10U/6.3V_6
R297 *0/short_6R297 *0/short_6
R266 *0/short_6R266 *0/short_6
Q26
2SK3018
Q26
2SK3018
3
2
1
R23522K/F_4 R23522K/F_4
![](asset-15.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USBP3-_CN
USBP3+_CN
USBP0+_CN
USBP0-_CN
USBP1-_CN
USBP1+_CN
USB_EN#
5VUSB_0
USB_EN#
5VUSB_1
USBOC#L [10,27]
USBOC#R [10,27]
USB_EN#[27]
USBP1+[10] USBP1-[10]
USBP0+[10] USBP0-[10]
USBP3+[10] USBP3-[10]
+5VPCU
+5VPCU
+3VPCU
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
USB Port
D3E
21 43Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
USB Port
D3E
21 43Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
USB Port
D3E
21 43Wednesday, November 02, 2011
ZE7
21
USB Right (USB)
Left
<Layout note>
Close to CONN
2A
USB Left (USB)
<Layout note>
Close to CONN
<Layout note>
Close to CONN
Right up
Right down
G547E2P81U: Enable: Low Active /2.5A
Follow ZH9
G547E2P81U: Enable: Low Active /2.5A
Follow ZH9
<2nd Source> CH71001M687
<Layout note>3528 type H=1.9mm
2A
D3
*5V/30V/0.2p_4
D3
*5V/30V/0.2p_4
12
R50 *0/short_4R50 *0/short_4
R248 *0/short_4R248 *0/short_4
R82
*10K/J_4
R82
*10K/J_4
C111
4.7u/10V_6
C111
4.7u/10V_6
D18
*5V/30V/0.2P_4
D18
*5V/30V/0.2P_4
12
+
C379
100U/6.3V_3528
+
C379
100U/6.3V_3528
CN12
USB_CONN
CN12
USB_CONN
GND1
4D+
3D-
2VDD
1
GND5 5
GND6 6
GND7 7
GND8 8
R14 *0/short_4R14 *0/short_4
+
C26
220u/6.3V_7343
+
C26
220u/6.3V_7343
C380
1U/6.3V_4
C380
1U/6.3V_4
CN21
USB_CONN
CN21
USB_CONN
GND1
4D+
3D-
2VDD
1
GND5 5
GND6 6
GND7 7
GND8 8
R44 *0/short_4R44 *0/short_4
R253 *0/short_4R253 *0/short_4
C73
0.1u/10V_4
C73
0.1u/10V_4
D20
*5V/30V/0.2P_4
D20
*5V/30V/0.2P_4
12
R15 *0/short_4R15 *0/short_4
C24
0.1u/10V_4
C24
0.1u/10V_4
D6
*5V/30V/0.2p_4
D6
*5V/30V/0.2p_4
12
D5
*5V/30V/0.2p_4
D5
*5V/30V/0.2p_4
12
CN9
USB_CONN
CN9
USB_CONN
GND1
4D+
3D-
2VDD
1
GND5 5
GND6 6
GND7 7
GND8 8
U23
IC(8P)G547E2P81U
U23
IC(8P)G547E2P81U
IN1
2
OC# 5
EN
4OUT1 6
GND
1
IN2
3OUT3 8
OUT2 7
+
C89
*100u/6.3V_3528
+
C89
*100u/6.3V_3528
U25
IC(8P)G547E2P81U
U25
IC(8P)G547E2P81U
IN1
2
OC# 5
EN
4OUT1 6
GND
1
IN2
3OUT3 8
OUT2 7
D2
*5V/30V/0.2p_4
D2
*5V/30V/0.2p_4
12
C377
.1U/10V_4
C377
.1U/10V_4
![](asset-16.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
X-TX1N
X-TX1P
X-TX0N
X-TX0P
TERM9
TERM9
EEDI/SDA
EECS/SCL
VDD10
CLKREQ_LAN#_R1
EECS/SCL
GPOCTRL12
ISOLATE#
RSET
CLKREQ_LAN#_R1
EEDI/SDA
VDD10
LED3/EEDO
PCIE_WAKE#
PCIE_RXP0_LAN
PCIE_RXN0_LAN
EVDD10
LAN_LINKLED#
LAN_ACTLED#
PCIE_WAKE#TX1N
TX1P
TX0P
TX0N
25MCLKX2
25MCLKX1
LAN_LINKLED#
LAN_ACTLED#
TX0P_R X-TX0N
TX1N_R X-TX1P
X-TX1N
X-TX0P
TX1P
TX1N
TX0P
TX0N TX1P_R
TERM9
TERM0
TX0N_R
VDD10 EVDD10
CTRL12
X-TX1N
X-TX1P
X-TX0P
X-TX0NTX0N_R
TX0P_R
TX1N_R
TX1P_R
PCIE_TXP0[10] PCIE_TXN0[10]
PLTRST# [6,13,16,25,26,27]
CLK_PCIE_LANN[2] CLK_PCIE_LANP[2]
PCIE_RXN0[10] PCIE_RXP0[10]
CLKREQ_LAN#[2]
PCIE_WAKE# [13,25]
+3V_LAN
+3V
+3V_LAN
+3V_LAN
+3V_LAN
+3V_LAN
+3V_LAN
+3V_S5 +3V_LAN
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
LAN RTL8105TA-VC-CG
1B
22 40Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
LAN RTL8105TA-VC-CG
1B
22 40Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
LAN RTL8105TA-VC-CG
1B
22 40Wednesday, November 02, 2011
ZE7
LAN (LAN)
TRANSFORMER (LAN) RJ45 Connector (LAN)
22
Close to IC
Close To IC Close To IC Pin 13.
Close To IC Pin 31.
For Rural
For Rural, use 1/F_4 (CS-1002FB23)
For Normal, use 0/J_4 (CS00002JB38)
For Rural, stuff 0/J_4 (CS00002JB38)
For Normal, unstuff 0/J_4 (CS00002JB38)
The value should be
0.01uF-0.4uF
Int. PU in SB
Pull-Up at CLK Gen side
Reserve for EMI request
<20110105> Will add RJ45 connector without LED type by inner document
DFTJ08FR221 (FOX)
DFTJ08FR222 (AEC)
AMBER
GREEN
<20110510> Change from 27P to 33P by vendor's measure report.
0.1U/16V_4
C5
0.1U/16V_4
C5
C300
*10P/50V_4
C300
*10P/50V_4
R10 15K/J_4R10 15K/J_4
C306
0.01U/25V_4
C306
0.01U/25V_4
C6
1U/10V_4
C6
1U/10V_4
12
R9 10K/J_4R9 10K/J_4
C14 .1U/10V_4C14 .1U/10V_4
R351 *0/short_6R351 *0/short_6
R2 *0/short_4R2 *0/short_4
D35
*P3100SBLRP
D35
*P3100SBLRP
1 2
C303
*10P/50V_4
C303
*10P/50V_4
C299
*0.1U/50V_8
C299
*0.1U/50V_8
C4 33P/50V_4C4 33P/50V_4
0.1U/16V_4
C320
0.1U/16V_4
C320
R336 0/J_4R336 0/J_4
R335 0/J_4R335 0/J_4
R343 *0/short_4R343 *0/short_4
C301
*10P/50V_4
C301
*10P/50V_4
U1
RTL8105TA-VC-CG
U1
RTL8105TA-VC-CG
GNDTX
16
HSIP
9
HSIN
10
REFCLK_P
11
REFCLK_N
12
VDDTX
13
HSOP
14
HSON
15
CLKREQBPIN
8
MDIP0
2
MDIN0
3
MDIP1
4
MDIN1
5
EEDIPIN/TDI/SPISI/SDA 24
EEDOPIN/LED3/SPISO 23
EECSPIN/TCS/SCL 22
VDD1 21
LANWAKEBPIN 20
VDD3 19
ISOLATEBPIN 18
PERSTBPIN 17
NC
6
RSET 32
CTRL12 31
CKXTAL2 30
CKXTAL1 29
LEDPIN/SPICSB 28
VDD3 27
GPOUTPIN 26
EESKPIN/LED1/TCLK/SPISCK 25
GND
33
HV
1
VDD1
7
GND
34
GND
35
GND
36
GND
37
GND
38
GND
40
GND
41
GND
42
GND
39
R340
75/F_8
R340
75/F_8
R8 10K/J_4R8 10K/J_4
C305
1000P/3KV_1808
C305
1000P/3KV_1808
0.1U/16V_4
C3
0.1U/16V_4
C3
R12 *0/short_4R12 *0/short_4
R334 *510/J_6R334 *510/J_6
R341
75/F_8
R341
75/F_8
U17
*UCLAMP2512T.TCT
U17
*UCLAMP2512T.TCT
1
1
2
2
3
3
4
455
66
77
88
R7 *10K/J_4R7 *10K/J_4
C302
*10P/50V_4
C302
*10P/50V_4
0.1U/16V_4
C1
0.1U/16V_4
C1
CN8
RJ45-CONN
CN8
RJ45-CONN
RX+/1+
3
NC1/2+
4
TX-/0-
2
TX+/0+
1
NC2/2-
5
RX-/1-
6
NC/3+
7
NC4/3-
8
A-
9
G-
11
A+
10
G+
12
GND 14
GND 13
R346 *510/J_6R346 *510/J_6
R6 1K/J_4R6 1K/J_4
0.1U/16V_4
C16
0.1U/16V_4
C16
Y1
25MHz-LAN
Y1
25MHz-LAN
2 1
C311
*0.1U/50V_8
C311
*0.1U/50V_8
U16
NS0014 LF_Bothhand
U16
NS0014 LF_Bothhand
TD-
8
TD+
7
CT
6
NC
5
NC
4
CT
3
RD-
2
RD+
1RX+ 16
RX- 15
CT 14
NC 13
NC 12
CT 11
TX+ 10
TX- 9
0.1U/16V_4
C304
0.1U/16V_4
C304
R3 2.49K/F_4R3 2.49K/F_4
C8 .1U/10V_4C8 .1U/10V_4
R342 *10K/J_4R342 *10K/J_4
R339 *0/J_4R339 *0/J_4
R338 0/J_4R338 0/J_4
R1 *0/short_4R1 *0/short_4
T1T1
C7 33P/50V_4C7 33P/50V_4
0.1U/16V_4
C307
0.1U/16V_4
C307 C317
*4.7U/10V/8
C317
*4.7U/10V/8
12
R337 0/J_4R337 0/J_4
R11 1K/J_4R11 1K/J_4
C17
*4.7U/10V/8
C17
*4.7U/10V/8
12
U15
*UCLAMP2512T.TCT
U15
*UCLAMP2512T.TCT
1
1
2
2
3
3
4
455
66
77
88
0.1U/16V_4
C2
0.1U/16V_4
C2
![](asset-17.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.05V
VIN
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
Stitching Cap
1B
23 40Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
Stitching Cap
1B
23 40Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
Stitching Cap
1B
23 40Wednesday, November 02, 2011
ZE7
23
Stitching Capacitor (CLG)
For CRT R/G/B Signals
For RF Request
C140
1U/25V_6
C140
1U/25V_6
C145
1000P/50V_4
C145
1000P/50V_4
C27
1000P/50V_4
C27
1000P/50V_4
![](asset-18.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
NBSWON#
SATA_RXN0
SATA_RXP0
SATA_TXP0
SATA_TXN0
SATA_RXN0_C1
SATA_TXP0_C1
SATA_TXN0_C1
SATA_RXP0_C1
5V_SATA1
PWRLED# [27]
SUSLED# [27]
BATLED0# [27]
BATLED1# [27]
3G_MINI_LED# [25]
WLAN_LED# [25]
SATALED# [11]
NBSWON# [16,27]
SATA_TXN0 [11]
SATA_TXP0 [11]
SATA_RXP0 [11]
SATA_RXN0 [11]
+3V_S5
+3VPCU
+5V
+5V
+5V
+3V
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
SATA HDD/LED/SW
1B
24 40Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
SATA HDD/LED/SW
1B
24 40Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
SATA HDD/LED/SW
1B
24 40Wednesday, November 02, 2011
ZE7
24
2.5" SATA HDD (HDD)
SUS LED
PWR LED
CHG LED
FULL LED
WLAN LED
3G LED
HDD LED
LED/SW (UIF)
<20090609(A1A)_Checklist Rev1.0>
Need the buffer for LED driving
capability since the IOL is 6mA only.
1A
PWR indicator
<20101229> Unstuff HDD LED
<20110223> In S5 and battery only mode,
EC will turn off PWRLED#/SUSLED# while EC is idle.
<20110530> Change from +3V to +5V Due to there is the
internal series resister in 3G/WLAN module, cause the forward voltage of LED4 is too small
PWR button
SW1
Power Switch
SW1
Power Switch
314 2
5
6
Q36
*BSS84
Q36
*BSS84
3
2
1
C25
0.1U/10V_4
C25
0.1U/10V_4
LED1
LED_BLUE_TOP
LED1
LED_BLUE_TOP
2 1
D33 *5.5V/25V/410P_4D33 *5.5V/25V/410P_4
1 2
D28 *3G@5.5V/25V/410P_4D28 *3G@5.5V/25V/410P_4
1 2
R330 33/J_4R330 33/J_4
D32 *5.5V/25V/410P_4D32 *5.5V/25V/410P_4
1 2
D31 *5.5V/25V/410P_4D31 *5.5V/25V/410P_4
1 2
R369 *0/short_8R369 *0/short_8
D1
*5.5V/25V/410P_4
D1
*5.5V/25V/410P_4
12
0.01u/16V_4C341 0.01u/16V_4C341
0.01u/16V_4C339 0.01u/16V_4C339
D34 *5.5V/25V/410P_4D34 *5.5V/25V/410P_4
1 2
R328 220/F_4R328 220/F_4
D29 *5.5V/25V/410P_4D29 *5.5V/25V/410P_4
1 2
R327 33/J_4R327 33/J_4
0.01u/16V_4C340 0.01u/16V_4C340
LED4
LED_AMBER/BLUE
LED4
LED_AMBER/BLUE
23
1
C23
*0.1U/10V_4
C23
*0.1U/10V_4
R333 51/J_4R333 51/J_4
LED3
LED_AMBER/BLUE
LED3
LED_AMBER/BLUE
23
1
R329 *330/J_4R329 *330/J_4
R325 3G@150/F_4R325 3G@150/F_4
R331 220/F_4R331 220/F_4
R326 470/J_4R326 470/J_4
D30 *5.5V/25V/410P_4D30 *5.5V/25V/410P_4
1 2
C20
4.7U/10V_8
C20
4.7U/10V_8
CN11
MAIN_SATA
CN11
MAIN_SATA
3
4
5
6
7
2
1
8
9
10
11
12
13
14
15
16
17
+
C330
*100U/6.3V_3528
+
C330
*100U/6.3V_3528
LED2
LED_AMBER/BLUE
LED2
LED_AMBER/BLUE
23
1
0.01u/16V_4C342 0.01u/16V_4C342
LED5
*LED_BULE_SIDE
LED5
*LED_BULE_SIDE
3 1
![](asset-19.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
RF_EN
WLAN_LED1#
MINI1_WAKE#
WL_SMDATA
WL_SMCLK
WIMAX_LED#
UIM_VPP
UIM_DATA
UIM_PWR
UIM_VPPUIM_RST
UIM_CLK
UIM_DATA
UIM_RST
UIM_PWR
UIM_DATA
UIM_VPP
UIM_RST
UIM_PWR
UIM_CLK
UIM_CLK
USBP5+_R
USBP5-_R
PLTRST#
WLAN_LED1#
PLTRST#_1
UIM_CLK
UIM_VPP
UIM_PWR
UIM_DATA
UIM_RST
RF_LED_ON
PLTRST#
3G_MINI_LED#
3G_MINI_LED#
PLTRST#_2
WL_SMCLK
WL_SMDATA
CLKREQ_3G#
3G_SMCLK
3G_SMDATA
USBP5+_R
USBP5-_R
PCLK_SMB 3G_SMCLK
3G_SMDATAPDAT_SMB
PLTRST# [6,13,16,22,26,27]
RF_EN [27]
CLKREQ_MPC#[2]
CLK_PCIE_MPC_N[2] CLK_PCIE_MPC_P[2]
PCIE_WAKE#[13,22]
PCIE_TXP1[10] PCIE_TXN1[10]
PCIE_RXP1[10] PCIE_RXN1[10]
3G_MINI_LED# [24]
3G_EN [27]
CLK_PCIE_MNC_N[2] CLK_PCIE_MNC_P[2]
PCIE_TXP3[10] PCIE_TXN3[10]
PCIE_RXP3[10] PCIE_RXN3[10]
WLAN_LED# [24]
PCLK_DEBUG[2]
LAD3 [13,27]
LAD1 [13,27]
LAD2 [13,27]
LAD0 [13,27]
LFRAME# [13,27]
BT_POWERON#[19,27]
SMBDT1[2,4,13]
SMBCK1[2,4,13]
PDAT_SMB[13]
PCLK_SMB[13]
USBP4-[10] USBP4+[10]
USBP7+ [10]
USBP7- [10]
USBP5+ [10]
USBP5- [10]
+3V_Mini1_VDD
+1.5V_Mini1_VDD
+3V_Mini1_VDD
+1.5V_Mini1_VDD +3V_Mini1_VDD
+1.5V
+3V_Mini1_VDD
+3V
+3V_Mini2_VDD
+3V_Mini2_VDD
+1.5V_Mini2_VDD
+3V_Mini2_VDD
+1.5V_Mini2_VDD
+3V_Mini2_VDD
+3V
+3VSUS
+1.5V
+3V_Mini1_VDD
+3V_Mini1_VDD
+3V_Mini1_VDD+3V
+3VSUS
+3V_Mini2_VDD
+3V_Mini2_VDD
+3V_Mini2_VDD
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
Mini-Card/WL/3G/SIM
1B
25 40Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
Mini-Card/WL/3G/SIM
1B
25 40Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
Mini-Card/WL/3G/SIM
1B
25 40Wednesday, November 02, 2011
ZE7
0.5A
Max: 7.5mA (Option)
0.5A
Peak:2.75A
Normal:1.1A
25
no matter have 3G function or not,
need to stuff this PU.
Mini Card 1 (MPC)
Mini Card 2 (MNC)
MultiMedia SIM (MNC)
0.75A
Turn off WLAN LED when 3G module is on
<20090604(A1A)_Qualcomm design guide>
Place 0.1uF near connector's VCC pin
<Layout Notes> Keep USIM signals max length within 8000mils.
<2011/1/24(E1A)> Change from 10k to 100k to reduce leakage
<20110609> Un-stuff C9 since EM820W doesn't use Vpp
2nd source: CH4471K9B03
R521 *0/short_4R521 *0/short_4
T41T41
C233
3G@10U/10V_8
C233
3G@10U/10V_8
R516 *3G@0/J_4R516 *3G@0/J_4
R518 *0/short_4R518 *0/short_4
C389
3G@0.47U/6.3V_4
C389
3G@0.47U/6.3V_4
12
CN22
WLAN CONN
CN22
WLAN CONN
Reserved
51
Reserved
49
Reserved
47
Reserved
45
GND
43
+3.3Vaux
41
+3.3Vaux
39
GND
37
GND
35
PETp0
33
PETn0
31
GND
29
GND
27
PERp0
25
PERn0
23
GND
21
UIM_C4
19
UIM_C8
17
GND
15
REFCLK+
13
REFCLK-
11
GND
9
CLKREQ#
7
Reserved
5
+3.3V 52
GND 50
+1.5V 48
LED_WPAN# 46
LED_WLAN# 44
LED_WWAN# 42
GND 40
USB_D+ 38
USB_D- 36
GND 34
SMB_DATA 32
SMB_CLK 30
+1.5V 28
GND 26
+3.3Vaux 24
PERST# 22
W_DISABLE# 20
GND 18
UIM_VPP 16
+1.5V 6
Reserved
3
WAKE#
1
UIM_RESET 14
UIM_CLK 12
UIM_DATA 10
UIM_PWR 8
GND 4
+3.3V 2
GND
54
GND
53
R228 *3G@0/J_8R228 *3G@0/J_8
Q15
*3G@2N7002E
Q15
*3G@2N7002E
3
2
1
R302
4.7K/J_4
R302
4.7K/J_4
C321
3G@1U/10V_6
C321
3G@1U/10V_6
1 2
C10 3G@27P/50V_4C10 3G@27P/50V_4
Q44
*2N7002K
Q44
*2N7002K
3
2
1
R314 *0/J_4R314 *0/J_4
C369
*3G@0.1U/10V_4
C369
*3G@0.1U/10V_4
C391
.1U/10V_4
C391
.1U/10V_4
R224 *3G@0/J_8R224 *3G@0/J_8
C370
3G@0.1U/10V_4
C370
3G@0.1U/10V_4
R294 *0/J_4R294 *0/J_4
C390
*10U/10V_8
C390
*10U/10V_8
R525 *0/short_4R525 *0/short_4
R201 *3G@0_4R201 *3G@0_4
C250
*10U/10V_8
C250
*10U/10V_8
C383
*0.1U/10V_4
C383
*0.1U/10V_4
C13 3G@27P/50V_4C13 3G@27P/50V_4
JSIM1
3G@SIM-CONN
JSIM1
3G@SIM-CONN
CLK(C3)
6
VPP(C6) 3
D-(C8)
7VCC(C1) 2
D+(C4)
8
GND(C5) 1
GND
14 GND
12
GND
11 GND
13
RST(C2) 4
DATA(C7) 5
CT
9
CD
10
R510 3G@0_4R510 3G@0_4
R517 *0/short_4R517 *0/short_4
C373
3G@0.1U/10V_4
C373
3G@0.1U/10V_4
RN1
*4.7K_4P2R
RN1
*4.7K_4P2R
2
4
1
3
R519 *0/short_4R519 *0/short_4
R241 *0/short_8R241 *0/short_8
R530 *10K/J_4R530 *10K/J_4
C384
.1U/10V_4
C384
.1U/10V_4
C386
.1U/10V_4
C386
.1U/10V_4
R529 0/J_4R529 0/J_4
C378
3G@10P/50V_4
C378
3G@10P/50V_4
C371
3G@0.1U/10V_4
C371
3G@0.1U/10V_4
R528 *0/J_4R528 *0/J_4
R526 0/J_4R526 0/J_4
U18
*3G@CM1293-04SO
U18
*3G@CM1293-04SO
VP 5
CH2
3CH3 4
CH1
1
VN
2
CH4 6
C366
3G@0.1U/10V_4
C366
3G@0.1U/10V_4 R194
*3G@10K_4
R194
*3G@10K_4
R260 *0/J_8R260 *0/J_8
R523 *0/short_4R523 *0/short_4
C12 3G@10P/50V_4C12 3G@10P/50V_4
CN19
3G@3G CONN
CN19
3G@3G CONN
Reserved
51
Reserved
49
Reserved
47
Reserved
45
GND
43
+3.3Vaux
41
+3.3Vaux
39
GND
37
GND
35
PETp0
33
PETn0
31
GND
29
GND
27
PERp0
25
PERn0
23
GND
21
UIM_C4
19
UIM_C8
17
GND
15
REFCLK+
13
REFCLK-
11
GND
9
CLKREQ#
7
Reserved
5
+3.3V 52
GND 50
+1.5V 48
LED_WPAN# 46
LED_WLAN# 44
LED_WWAN# 42
GND 40
USB_D+ 38
USB_D- 36
GND 34
SMB_DATA 32
SMB_CLK 30
+1.5V 28
GND 26
+3.3Vaux 24
PERST# 22
W_DISABLE# 20
GND 18
UIM_VPP 16
+1.5V 6
Reserved
3
WAKE#
1
UIM_RESET 14
UIM_CLK 12
UIM_DATA 10
UIM_PWR 8
GND 4
+3.3V 2
GND
54
GND
53
C11 3G@10P/50V_4C11 3G@10P/50V_4
R522 *0/short_4R522 *0/short_4
R210
*3G@10K_4
R210
*3G@10K_4
Q29
*2N7002E
Q29
*2N7002E
3
2
1
C9 *3G@33P/50V_4C9 *3G@33P/50V_4
R308 *0/short_4R308 *0/short_4
R508 3G@0_4R508 3G@0_4
R252 *0/short_6R252 *0/short_6
R531 *0/short_8R531 *0/short_8
Q32
*2N7002E
Q32
*2N7002E
3
2
1
R527 *0/J_8R527 *0/J_8
C385
*1000P/50V_4
C385
*1000P/50V_4
C15
3G@0.1U/10V_4
C15
3G@0.1U/10V_4
Q30
2N7002K
Q30
2N7002K
3
2
1
Q21
*3G@2N7002E
Q21
*3G@2N7002E
3
2
1
R222 *3G@0/J_6R222 *3G@0/J_6
R262
100K/J_4
R262
100K/J_4
C382
.1U/10V_4
C382
.1U/10V_4
R207 *3G@0_4R207 *3G@0_4
C235
*3G@1000P/50V_4
C235
*3G@1000P/50V_4
T39T39
T42T42
![](asset-1a.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
XD_D6
SD_WP/XD_D7
SD_D7/XD_RDY
SD_D6/XD_RE#
SD_D5/XD_CE#
SD_D4/XD_WE#
SD_D1
SD_D0
EEDO
EECS
CARDREFXD_CD#
GND
GND
DV12_S
DV12
SD_CLK
AV12
DV33_18
AV12
DV12
GND
PLTRST#
EESK
SD_CMD
SD_D3
PCIE_RXP2_C
PCIE_RXN2_C
SD_D2
+3V3_IN
VCC_XD
VCC_XD
SD_CD#
MS_INS#
MS_D7/XD_D5
MS_D3/XD_D4
MS_D6/XD_D3
MS_D2/XD_D2
MS_BS/XD_CLE
MS_D5/XD_ALE
MS_D1/XD_WP#
MS_D4/XD_D0
MS_D0/XD_D1
MS_BS/XD_CLE
SD_CMD_R
SD_D1_R
SD_D2_R
SD_D3_R
SD_CLK_R
SD_D0_R
SD_CD#
SD_WP/XD_D7
MS_D2/XD_D2
MS_D6/XD_D3
XD_D6
MS_D7/XD_D5
MS_D3/XD_D4
SD_WP/XD_D7
MS_D4/XD_D0
MS_D0/XD_D1
XD_CD#
MS_D5/XD_ALE
SD_D4/XD_WE#
SD_D5/XD_CE#
SD_D6/XD_RE#
SD_D7/XD_RDY
MS_D1/XD_WP#
MS_D0/XD_D1
MS_D1/XD_WP#
MS_CLK
MS_D3/XD_D4
MS_BS/XD_CLE
MS_INS#
MS_D2/XD_D2
SD_D7/XD_RDY
SD_D6/XD_RE#
SD_D5/XD_CE#
SD_D4/XD_WE#
SD_CLK_R
SD_D2_R
SD_CMD_R
SD_D1_R
SD_D3_R
SD_CLK_R
SD_D0_R
MS_CLK
SD_CMD_R
SD_D1_R
SD_D3_R
SD_CLK_R
SD_D0_R
SD_D2_R
PCIE_RXN2[10]
PCIE_RXP2[10]
PCIE_TXP2[10]
PCIE_TXN2[10]
CLK_PCIE_MMC_P[2]
CLK_PCIE_MMC_N[2]
PLTRST#[6,13,16,22,25,27]
CLKREQ_MMC#[2]
+3V3_IN
+3V3_IN
+3V
VCC_XD VCC_XD
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
RTS5209-GR (Card Reader)
1B
26 40Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
RTS5209-GR (Card Reader)
1B
26 40Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
RTS5209-GR (Card Reader)
1B
26 40Wednesday, November 02, 2011
ZE7
Card reader controller (MMC) 5 IN 1 Card Reader CONN (MMC) 26
Zdiff = 95 ohm
Zdiff = 80 ohm
Zdiff = 80 ohm
<Layout Note> Place Close to Chip Pin
<Layout Note> Place Close to Chip Pin
<Layout Note> Place Close to Chip Pin
<20101206> Change to DFHS44FR015 by ME design change
<EMI>
0.1u/10V_4
C297
0.1u/10V_4
C297
C288
*4.7U/6.3V_6
C288
*4.7U/6.3V_6
C276 10P/50V_4C276 10P/50V_4
R319
*100K_4
R319
*100K_4
R286 33/J_4R286 33/J_4
C393 *10P/50V_4C393 *10P/50V_4
C387
4.7U/10V_8
C387
4.7U/10V_8
TP1TP1
C289 0.1U/10V_4C289 0.1U/10V_4
0.1u/10V_4
C381
0.1u/10V_4
C381
CN20
Card Reader CONN
CN20
Card Reader CONN
SD-CD-SW
1
SD-WP-SW
2
SD-DAT1
3
SD-DAT0
4
MMC-DATA7
5
MS-GND1
6
SD-GND1
7
MMC-DATA6
8
MS-BS
9
SD-CLK
10
MS-DATA1
11
MS-DATA0
12
SD-VCC
13
MS-DATA2
14
SD-GND2
15
MS-INS
16
MMC-DATA5
17
MS-DATA3
18
SD-CMD
19
MS-SCLK
20
MMC-DATA4
21
MS-VCC
22
SD-DATA3
23
MS-GND2
24
SD-DAT2
25
SD-WP-GND
26
SD-CD-GND
27
XD-CD 28
XD-R/B 29
XD-RE 30
XD-CE 31
XD-CLE 32
XD-ALE 33
XD-WE 34
XD-WP 35
XD-GND1 36
XD-D0 37
XD-D1 38
XD-D2 39
XD-D3 40
XD-D4 41
XD-D5 42
XD-D6 43
XD-D7 44
XD-VCC 45
XD-GND2 46
XD-GND3 47
C392 *10P/50V_4C392 *10P/50V_4
TP4TP4
C295 4.7U/6.3V_6C295 4.7U/6.3V_6
C262 0.1U/10V_4C262 0.1U/10V_4
C287
0.1U/10V_4
C287
0.1U/10V_4
C282 *10P/50V_4C282 *10P/50V_4
C296 *10P/50V_4C296 *10P/50V_4
C293 0.1U/10V_4C293 0.1U/10V_4
R305 33/J_4R305 33/J_4
R323 6.2K/F_4R323 6.2K/F_4
C298
4.7U/10V_8
C298
4.7U/10V_8
C274 10P/50V_4C274 10P/50V_4
0.1u/10V_4
C376
0.1u/10V_4
C376
C255 4.7U/6.3V_6C255 4.7U/6.3V_6
C291 *10P/50V_4C291 *10P/50V_4
R269 33/J_4R269 33/J_4
TP2TP2
R315 33/J_4R315 33/J_4
C294 0.1U/10V_4C294 0.1U/10V_4
C284 *10P/50V_4C284 *10P/50V_4
C290
0.1U/10V_4
C290
0.1U/10V_4
TP3TP3
R307 33/J_4R307 33/J_4
R332 *0/short_6R332 *0/short_6
R303 33/J_4R303 33/J_4
L33 *PBY160808T-601Y-N_1AL33 *PBY160808T-601Y-N_1A
C292 0.1U/10V_4C292 0.1U/10V_4
*1U/6.3V_4
C286
*1U/6.3V_4
C286
R292 33/J_4R292 33/J_4
U14
RTS5209-GR
U14
RTS5209-GR
SD_D2 25
SP5 28
SP6 29
SP7 30
SP8 31
SP9 32
SP10 33
SP11 34
SP12 35
SP13 36
GND 26
DV12_S 27
HSIP
1
HSIN
2
REFCLKP
3
REFCLKN
4
AV12
5
HSOP
6
HSON
7
GND
8
DV12
9
Card1_3V3
10
3V3_IN
11
Card2_3V3
12
XD_CD#
13
DV33_18
14
GND
15
SP1
16
SP2
17
SP3
18
SP4
19
SD_D1
20
SD_D0
21
SD_CLK
22
SD_CMD
23
SD_D3
24 SP14 37
SP15 38
SD_CD# 39
MS_INS# 40
GPIO/EEDI 41
EESK 42
EECS 43
EEDO 44
PERST# 45
CLK_REQ# 46
3V3_IN 47
RREF 48
![](asset-1b.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
HWPG
S5_ON
SPI_CS0#_uR
SPI_SDI_uR
E791AGND
MBDATA
2ND_MBCLK
+A3VPCU
E791AGND
MY0
HWPG_R
ICMNT_EC
PWROK_EC_uR
TPDATA
MBCLK
MBDATA
2ND_MBDATA
2ND_MBCLK
RSMRST#_uR
TPCLK
ECDB_CLOCK
LCLK_EC
LCLK_EC
MY12
MY13
MY6
MY15
MY10
MY9
MY7
MY1
MY4
MY5
MY2
MY11
MY8
MY14
MY3
MX2
MX4
MX0
MX7
MX6
MX3
MX5
MX1
+3VPCU_EC
VCORF_uR
VREF_uR +A3VPCU
VCC_POR#
MBCLK
2ND_MBDATA
MX5
MX6
MX7
MX4 MX2
MX0
MX3
MX1
+3.3V_PRIME_ON
BATLED0#
BATLED1#
3G_EN
E775_32KX1
SPI_SCK_uR_R
SPI_CS0#_uR
SPI_SDO_uR_R
SPI_SDI_uR SPI_SDI_uR_R
+3V_EC
SPI_SDI_uR
SPI_SDO_uR SPI_SDO_uR_R
SPI_SCK_uR SPI_SCK_uR_R
HDMI_IN
HWPG
USB_CHARGE_ON
THERM_ALERT#_R
USBOC#R2_R
USBOC#R1_R
MY0
CHARGE_IC_ON
DNBSWON#_1
KBRST#[11]
EC_SMI#[13]
EC_SCI#[12]
SERIRQ[11]
CLKRUN#[13]
GA20[11]
PLTRST#[6,13,16,22,25,26]
MBCLK[29] MBDATA[29]
TEMP_MBAT [29]
EC_FPBACK#[18]
MY12[19] MY13[19]
MY6[19]
MY15[19]
MY10[19] MY9[19]
MY7[19]
MY1[19]
MY4[19] MY5[19]
MY2[19]
MY11[19]
MY8[19]
MY14[19]
MY3[19]
MX2[19]
MX4[19]
MX0[19]
MX7[19] MX6[19]
MX3[19]
MX5[19]
MX1[19]
MY0[19]
SUSCLK[13]
LCLK_EC[2]
LFRAME#[13,25] LAD0[13,25]
BT_POWERON#[19,25]
TPDATA[19]
TPCLK[19]
ACIN [29]
NBSWON# [16,24]
LID# [18]
BATLED0# [24]
BATLED1# [24]
DNBSWON# [13,16]
D/C# [29]
CPUFAN# [6]
S5_ON [16,30,35]
SUSC# [13,16]
ECPWROK [5,8,13,16]
EC_RSMRST# [13,16]
SUSON [16,32,34]
PWRLED# [24]
CONTRAST [18]
MAINON [16,32,33,34]
+3.3V_PRIME_ON [16,31,34]
SUSB# [13,16]
AMP_MUTE#[20]
HWPG_VCCGFX[31]
DDRAM_PWROK[8,32]
HWPG_1.8V[34]
SYS_HWPG[30]
RF_EN[25]
USB_EN# [21]
ICMNT [29]
SUSLED# [24]
LAD1[13,25] LAD2[13,25] LAD3[13,25]
3G_EN [25]
HWPG [2,13,16]
MAINON_ON_G[34]
THERM_ALERT# [5,6,13]
IMVP_PWRGD[6,31]
PCBEEP [20]
USBOC#R [10,21]
USBOC#L [10,21]
2ND_MBDATA[5] 2ND_MBCLK[5]
FANSIG [6]
RTCRST#_EC [13]
+3VPCU
+3VPCU
+3VPCU
+3V
+3V
+3VPCU
+3VPCU
+3VPCU
+3VPCU
+3VPCU
+3V
E791AGND
E791AGND
E791AGND
E791AGND
+3VPCU
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
NPCE791L & FLASH
1B
27 40Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
NPCE791L & FLASH
1B
27 40Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
NPCE791L & FLASH
1B
27 40Wednesday, November 02, 2011
ZE7
1/13 Comfirm by vendor mail :
If the Southbridge enables 'Long Wait Abort' by default, the
flash device should be 50MHz (or faster)
30mil
1ST: Battery
2ND: CPU Thermal Sensor / DTS
3RD: VGA Thermal Sensor
SPI FLASH(KBC)
SM BUS PU(KBC)
27
<Layout note>
Place every 0.1uF
close to every
power pin
<EMI>
*
**
*
0.03A (30mils)
10mA
EC (KBC)
INTERNAL KEYBOARD STRIP SET (KBC) HWPG (KBC)
I/O ADDRESS SETTING(KBC)
1/13 Comfirm by vendor mail :
Disabled ('1') if using FWH device on LPC.
Enabled ('0') if using SPI flash for both system BIOS and EC firmware
SHBM=0: Enable shared memory with host BIOS
SHBM
10/26 UnStuff
W25Q16BVSSIG
W25Q16CVSSIG
AKE38FP0N01
AKE38ZP0N02
ZS9 A1~A3-test
ZS9 A4-test
16M bit
16M bit
FOR CPU Thermal Sensor
FOR VGA
<20090721_FAE suggestion>
Stuff 100K and close to EC side
for improving power consumption
<20090831(A1A)_EC team suggest>
1.change R166/R167 to 1M or 100K ohm
2.change PWR/SUS LED's power from +3VPCU to +3V_S5 or +3VSUS
can reduce pull-high resistor of SUSLED#/PWRLED#
If PECI 3.0 access functionality is not used,
connect VTT pin to GND.
<20090602(A1A)_Vendor suggest>
Place 10nF-0.1uF capacitors for
every AD input. And close to the AD
input.
<20110308> Change from +3V_S5 to
+3V for thermal sensor
ZS9 A5-test 16M bit
MX25L1606EM2I-12G
AKE38FP0Z01
Winbond W25Q16BVSSIG AKE38FP0N01
EON EN25F16-75HCP AKE38ZA0Q00
MXIC MX25L1606EM2I-12G AKE38FP0Z01 (ZE6 MAC ID fail)
*
ZS9 A6-test 16M bit
MX25L1606EM2I-12G
AKE38FP0Z01
ZS9 A7-test W25Q16BVSSIG
AKE38FP0N01
16M bit
<20110829> DDRAM_PWROK no need connecting to EC side
.1U/10V_4
C232
.1U/10V_4
C232
R504 2.2/J_6R504 2.2/J_6
1 2
D13 *RB500V-40D13 *RB500V-40
.1U/10V_4
C374
.1U/10V_4
C374
T25T25
R160 10K/J_4R160 10K/J_4
.1U/10V_4
C181
.1U/10V_4
C181
R278
10K/J_4
R278
10K/J_4
R155 *0/J_4R155 *0/J_4
R166 100K/J_4R166 100K/J_4
T23T23
R159 22/J_4R159 22/J_4
D21 *RB500V-40D21 *RB500V-40
T26T26
R157
100K/J_4
R157
100K/J_4
R506 47K/J_4R506 47K/J_4
R161 *0/short_4R161 *0/short_4
4.7U/6.3V_6
C202
4.7U/6.3V_6
C202
R156 22/J_4R156 22/J_4
T40T40
C188 3300P/50V_4C188 3300P/50V_4
R281 *0/short_6R281 *0/short_6
D19 RB500V-40D19 RB500V-40
RP5 10K/J_10P8RRP5 10K/J_10P8R
10
9
8
7 4
3
2
1
56
R277 *0/short_4R277 *0/short_4
.1U/10V_4
C272
.1U/10V_4
C272
R206 *0/short_4R206 *0/short_4
L24
PBY160808T-250Y-N/3A/25ohm_6
L24
PBY160808T-250Y-N/3A/25ohm_6
R158 10K/J_4R158 10K/J_4
R193 *10K/J_4R193 *10K/J_4
T22T22
T56T56
D14 *RB500V-40D14 *RB500V-40
C271
*10P/50V_4
C271
*10P/50V_4
.1U/10V_4
C267
.1U/10V_4
C267
T24T24
U8
W25Q16BVSSIG
U8
W25Q16BVSSIG
CE
1
SO
2
WP 3
VSS 4
SI
5
SCK
6
HOLD 7
VDD 8
R163 *0/short_4R163 *0/short_4
Q28
2N7002K
Q28
2N7002K
3
2
1
R164 4.7K/J_4R164 4.7K/J_4
R153 22/J_4R153 22/J_4
R154 *4.7K/J_4R154 *4.7K/J_4
R182 *0/short_4R182 *0/short_4
1U/6.3V_4
C375
1U/6.3V_4
C375
R169 *4.7K/J_4R169 *4.7K/J_4
4.7U/6.3V_6
C177
4.7U/6.3V_6
C177
R214 *0/J_4R214 *0/J_4
T28T28
R275 *0/short_4R275 *0/short_4
C186 .01U/16V_4C186 .01U/16V_4
R167 100K/J_4R167 100K/J_4
R162 *0/short_4R162 *0/short_4
.1U/10V_4
C211
.1U/10V_4
C211
LPC
KB
SMB
PS/2
A/D
D/A
GPIO
IR
FIU
TIMER
U10
NPCE791L
LPC
KB
SMB
PS/2
A/D
D/A
GPIO
IR
FIU
TIMER
U10
NPCE791L
LAD3
1
LCLK
2
LFRAME
3
VDD 4
GND1
5
GPIO24/LDRQ
6
LREST
7
GPIO11/CLKRUN
8
GPIO65/SMI
9
GPIO26/PSCLK2
10
GPIO27PSDAT2
11
VTT
12
PECI
13
GPIO34/SIN1/CIRRXL 14
GPIO36/CTS1 15
GPIO40/F_PWM/RI1 16
GPIO42/SCL3B/TCK 17
GND2
18
VCC1 19
GPIO43/SDA3B/TMS 20
GPIO44/TDI 21
GPIO45/E_PWM 22
GPIO46/CIRRXM/TRST 23
GPO47/SCL4 24
GPIO50/PSCLK3/TDO 25
GPIO51 26
GPIO52/PSDAT3/RDY 27
GPIO53/SDA4 28
ECSCI/GPIO54
29
GPIO55/CLKOUT/IOX_DIN_DIO 30
GPIO56/TA1 31
GPIO15/A_PWM 32
GPIO57/KBSOUT17
33 GPIO60/KBSOUT16
34 KBSOUT15/GPIO61/XOR_OUT
35 KBSOUT14/GPIO62
36 KBSOUT13/GPIO63
37 KBSOUT12/GPIO64
38 KBSOUT11/P80_DAT
39 KBSOUT10/P80_CLK
40 KBSOUT9/SDP_VIS
41 KBSOUT8
42 KBSOUT7
43
VCORF
44
GND3
45
VCC2 46
KBSOUT6/RDY
47 KBSOUT5/TDO
48 KBSOUT4/JEN0
49 KBSOUT3/TDI
50 KBSOUT2/TMS
51 KBSOUT1/TCK
52 KBSOUT0/JENK
53
KBSIN0
54
KBSIN1
55
KBSIN2
56
KBSIN3
57
KBSIN4
58
KBSIN5
59
KBSIN6
60
KBSIN7
61
GPIO13/C_PWM 62
GPIO14/TB1 63
GPIO01/TB2 64
GPIO32/D_PWM 65
GPIO33/H_PWM/SOUT1 66
GPIO73/SCL2
67
GPIO74/SDA2
68
GPIO22/SDA1
69 GPIO17/SCL1
70
GPIO35/PSDAT1
71 GPIO37/PSCLK1
72
GPIO70 73
GPIO71 74
GPIO72 75
VCC3 76
GPIO00/32KCLKIN
77
GND4
78
GPIO02 79
GPIO41 80
GPIO66/G_PWM 81
GPIO75/SPI_SCK 82
GPO76/SHBM 83
GPIO77 84
VCC_POR 85
F_SDI/F_SDIO1 86
F_SDO/F_SDIO0 87
VCC4 88
GND5
89
F_CS0 90
GPIO81 91
F_SCK 92
GPIO06/IOX_DOUT/RTS1 93
GPIO07 94
GPIO03 95
GPIO04 96
GPIO90/AD0 97
GPIO91/AD1 98
GPIO92/AD2 99
GPIO93/AD3 100
GPIO94/DA0 101
AVCC 102
AGND
103
VREF 104
GPI95/DA1 105
GPI96/DA2 106
GPIO97 107
GPIO05 108
GPIO30 109
GPO82/IOX_LDSH/TEST 110
GPO83/SOUT_CR/TRIST 111
GPO84/IOX_SCLK/XORTR 112
GPIO87/CIRRXM/SIN_CR 113
GPIO16 114
VCC5 115
GND6
116
GPIO20/TA2/IOX_DIN_DIO 117
GPIO21/B_PWM 118
GPIO23/SCL3
119
GPIO31/SDA3
120
GPIO85/GA20
121
KBRST/GPIO86
122
GPIO67/PWUREQ
123
GPIO10/LPCPD
124
SERIRQ
125
LAD0
126
LAD1
127
LAD2
128
.1U/10V_4
C182
.1U/10V_4
C182
D17 *RB500V-40D17 *RB500V-40
R276 *0/J_4R276 *0/J_4
D10 RB500V-40D10 RB500V-40
4.7U/6.3V_6
C281
4.7U/6.3V_6
C281
0.1U/16V_4
C364
0.1U/16V_4
C364
D22 *RB500V-40D22 *RB500V-40
T27T27
R280
*22/J_4
R280
*22/J_4
R165 4.7K/J_4R165 4.7K/J_4
L26 PBY160808T-250Y-N/3A/25ohm_6L26 PBY160808T-250Y-N/3A/25ohm_6
![](asset-1c.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
EMI/Hole
1B
Wednesday, November 02, 2011
ZE7
4028
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
EMI/Hole
1B
Wednesday, November 02, 2011
ZE7
4028
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
EMI/Hole
1B
Wednesday, November 02, 2011
ZE7
4028
28
HOLE (OTH)
TOP(HDD Hole) BOT(Thermal Hole) BOT(Mini-PCIe Hole) LED ESD PAD TP ESD PAD
HOLE12
*HG-C276D98P2
HOLE12
*HG-C276D98P2
1
2
3
4
5
6
7
8
9
PAD1PAD1
HOLE2
*HG-TC276BC315D98P2
HOLE2
*HG-TC276BC315D98P2
1
2
3
4
5
6
7
8
9
HOLE10
*HG-TC276BC315D98P2
HOLE10
*HG-TC276BC315D98P2
1
2
3
4
5
6
7
8
9
HOLE7
*HG-TC276BC315D98P2
HOLE7
*HG-TC276BC315D98P2
1
2
3
4
5
6
7
8
9
HOLE19
h-c197d63p2
HOLE19
h-c197d63p2
1
HOLE3
*HG-TC276BC315D98P2
HOLE3
*HG-TC276BC315D98P2
1
2
3
4
5
6
7
8
9
HOLE1
*ZE7-P3
HOLE1
*ZE7-P3
1
2
3
4
5
6
7
8
9
HOLE5
*HG-C276D98P2
HOLE5
*HG-C276D98P2
1
2
3
4
5
6
7
8
9
HOLE18
h-tc177bc295d120p2
HOLE18
h-tc177bc295d120p2
1
HOLE8
*HG-C276D98P2
HOLE8
*HG-C276D98P2
1
2
3
4
5
6
7
8
9
HOLE20
h-c197d63p2
HOLE20
h-c197d63p2
1
HOLE13
*HG-C276D98P2
HOLE13
*HG-C276D98P2
1
2
3
4
5
6
7
8
9
HOLE6
*O-ZE6-2
HOLE6
*O-ZE6-2
1
HOLE14
*HG-C276D98P2
HOLE14
*HG-C276D98P2
1
2
3
4
5
6
7
8
9
HOLE17
h-tc177bc295d120p2
HOLE17
h-tc177bc295d120p2
1
HOLE21
h-c197d63p2
HOLE21
h-c197d63p2
1
HOLE9
*HG-TC276BC256D98P2
HOLE9
*HG-TC276BC256D98P2
1
2
3
4
5
6
7
8
9
HOLE11
*O-ZE6-3
HOLE11
*O-ZE6-3
1
HOLE16
* ZE7-P2
HOLE16
* ZE7-P2
1
2
3
4
5
6
7
8
9
HOLE4
*HG-C276D98P2
HOLE4
*HG-C276D98P2
1
2
3
4
5
6
7
8
9
PAD2PAD2
HOLE15
*ZE7-P1
HOLE15
*ZE7-P1
1
2
3
4
5
6
7
8
9
![](asset-1d.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ICMNT
MBCLK
VA2
BAT-V
BAT-V
ISL88731_LGATE
CSIP_1
CSIN
88731B_2
ISL88731_PHASE
CSIP
88731ACSET
88731B_1
ISL88731_VDDP
ISL88731_UGATE
CSOP_1
VIN
CSOP
CSON
CSOP_1
BAT-V
BAT-V
DCIN
MBDATA
BAT-VMBAT+
TEMP_MBAT_C
MBDATA
MBCLKTEMP_MBAT
CSIP_1 VIN
VAVA
ICMNT [27]
ACIN[27]
D/C# [27]
TEMP_MBAT [27]
MBCLK [27]
MBDATA [27]
+3VPCU
VA1 VIN
VIN
+3VPCU
+3VPCU
+3VPCU
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
CHARGER (ISL88731)
1B
29 40Wednesday, November 16, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
CHARGER (ISL88731)
1B
29 40Wednesday, November 16, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
CHARGER (ISL88731)
1B
29 40Wednesday, November 16, 2011
ZE7
ISL88731 thermal pad
tie to Pin12
Add ESD diode base on EC FAE suggestion
29
Close battery side
PR170
49.9/F_4
PR170
49.9/F_4
PQ39
IMD2AT108
PQ39
IMD2AT108
3
2
1 6
5
4
PU2
ISL88731C
PU2
ISL88731C
ICOMP
4
NC
7
SDA
9
CSSP 28
CSSN 27
VDDP 21
ICM
8
CSON 17
CSOP 18
VREF
3
NC
5
VCOMP
6
LGATE 20
ACOK
13
SCL
10
VDDSMB
11
GND
12
PGND 19
ACIN
2
DCIN
22
VCC 26
UGATE 24
PHASE 23
BOOT 25
NC
14
VBF 15
NC 16
NC 1
GND 29
GND 33
GND 32
GND 31
GND 30
PC83
0.1U/50V_6
PC83
0.1U/50V_6
PD1
*RB500V-40
PD1
*RB500V-40
PC31
0.1U/25V_4
PC31
0.1U/25V_4
PR51
22K/F_4
PR51
22K/F_4
PR131
220K/F_6
PR131
220K/F_6
PC100
1U/10V_4
PC100
1U/10V_4
PC34
1U/10V_4
PC34
1U/10V_4
PC8
0.1U/25V_4
PC8
0.1U/25V_4
PR55
10/F_6
PR55
10/F_6 PC26
2200P/50V_4
PC26
2200P/50V_4
PD6
1SS355
PD6
1SS355
PC84
2200P/50V_6
PC84
2200P/50V_6
PC28
0.01U/25V_4
PC28
0.01U/25V_4
PC17
0.1U/50V_6
PC17
0.1U/50V_6
PC6
47P/50V_4
PC6
47P/50V_4
PR25
100K_4
PR25
100K_4
PL6
FBMA-11-201209-800A50T
PL6
FBMA-11-201209-800A50T
PR132
220K/F_6
PR132
220K/F_6
PC24
*1U/10V_4
PC24
*1U/10V_4
PC91
10U/25V_1206PC91
10U/25V_1206
PR173
4.7/J_6
PR173
4.7/J_6
PR148
100/J_4
PR148
100/J_4
PQ1
AON7410
PQ1
AON7410
352
4
1
PU1
*CM1293A-04SO
PU1
*CM1293A-04SO
VP 5
CH2
3CH3 4
CH1
1
VN
2
CH4 6
PC85
0.1U/50V_6
PC85
0.1U/50V_6
PR24 100/J_4PR24 100/J_4
PR48
82.5K/F_4
PR48
82.5K/F_4
PC99
4.7U/25V_8
PC99
4.7U/25V_8
PC21
0.1U/25V_4
PC21
0.1U/25V_4
PR59
100K/F_4
PR59
100K/F_4
PC90
10U/25V_1206
PC90
10U/25V_1206
PR56
10/F_6
PR56
10/F_6
PR155
.01_3216
PR155
.01_3216
1 2
PC25
1U/10V_4
PC25
1U/10V_4
PC88
2200P/50V_4
PC88
2200P/50V_4
PL2
FBMA-11-201209-800A50T
PL2
FBMA-11-201209-800A50T
PQ50
AON7410
PQ50
AON7410
352
4
1
PR47
2.7/J_6
PR47
2.7/J_6
PR57
2.21K/F_4
PR57
2.21K/F_4
PC33
.01U/25V_4
PC33
.01U/25V_4
PC22
0.1U/25V_4
PC22
0.1U/25V_4
PR54
2.2/F_4
PR54
2.2/F_4
PR133
.01_3216
PR133
.01_3216
1 2
PC30
*0.01U/25V_4
PC30
*0.01U/25V_4
PC4
100P/50V_4
PC4
100P/50V_4
PD8
SMAJ20A(400W,20V)
PD8
SMAJ20A(400W,20V)
2 1
PR157
33K/J_6
PR157
33K/J_6
PL7
6.8uH/4.5A_7X7X3
PL7
6.8uH/4.5A_7X7X3
PR58
*0/short_4
PR58
*0/short_4
PC19
0.1U/50V_6
PC19
0.1U/50V_6
PJ2
Batt_Conn
bat-btj-08tc0b-8p-l-v
PJ2
Batt_Conn
bat-btj-08tc0b-8p-l-v
1
2
3
4
5
6
7
89
10
PC86
0.1U/50V_6
PC86
0.1U/50V_6
PC20
2200P/50V_4
PC20
2200P/50V_4
PR23
*0/short_4
PR23
*0/short_4
PD7
SBR1045SP5-13
PD7
SBR1045SP5-13
2
13
PC10
2200P/50V_4
PC10
2200P/50V_4
PC9
.01U/25V_4
PC9
.01U/25V_4
PR156
10K/J_6
PR156
10K/J_6
PQ41
AO4427
PQ41
AO4427
8
7
6
5
4
3
2
1
PR26
100/J_4
PR26
100/J_4
PL1
FBMA-11-201209-800A50T
PL1
FBMA-11-201209-800A50T
PR43
10/F_6
PR43
10/F_6
PQ40
2N7002K
PQ40
2N7002K
3
2
1
PR42
10/F_6
PR42
10/F_6
PQ38
AO4427
PQ38
AO4427
8
7
6
5
4
3
2
1
PR134
*0/short_4
PR134
*0/short_4
PJ1
POWER_JACK
dcjk-2dc2003-000111-3p-v
PJ1
POWER_JACK
dcjk-2dc2003-000111-3p-v
1
2
3
4
5
6
7
PR27
100/J_4
PR27
100/J_4
PC5
47P/50V_4
PC5
47P/50V_4
PC87
0.1U/50V_6
PC87
0.1U/50V_6
![](asset-1e.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MAIND
MAIND MAIND S5D
S5D
SUSD
SUSD
SYS_SHDN#
+5V_LX
+15V_ALWP
+3V_DL
+5V_B
+5V_DH
+5V_DL
+5V_FB
+3V_PG
8223_EN
+3V_DH
+3V_LX
+3V_DL
+3V_B
+3V_TON
+3V_SKIP
+3V_FB
8223_VIN
SYS_SHDN#
8223_EN
+5V_DL
MAIND [32,34]
S5_ON[16,27,35]
SUSD [34]
SYS_SHDN# [6,35]
SYS_HWPG[27]
+15VVIN +5V_S5+3V_S5 +5VPCU
+5V
+3VPCU
+3V
+3V_S5
+3VPCU+5VPCU
+5V_S5
+3VSUS
+3VPCU
VIN VIN
+15V
+3VPCU
+3VPCU 8223REF +3VPCUVINVIN
+5VPCU
VL
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
SYSTEM 5V/3V (RT8206)
1B
30 40Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
SYSTEM 5V/3V (RT8206)
1B
30 40Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
SYSTEM 5V/3V (RT8206)
1B
30 40Wednesday, November 02, 2011
ZE7
30
TDC : 0.008A
PEAK : 0.01A
Width : 10mil
TDC : 1.858A
PEAK : 2.477A
Width : 80mil
TDC : 1.03A
PEAK : 1.38A
Width : 50mil
TDC : 0.15A
PEAK : 0.2A
Width : 10mil
TDC : 0.94A
PEAK : 1.25A
Width : 40mil
+3VPCU
3 Volt +/- 5%
TDC : 2.368A
PEAK : 3.16A
OCP : 4A
Width : 100mil
Iocp=8-(2.525/2)=6.74A
Vth=6.74A*14mOhm=94.32mV
R(Ilim)=(94.32mV*10)/10uA
~94.32K
OCP:8A
L(ripple current)
=(9-5)*5/(2.2u*0.4M*9)
=2.525A
L(ripple current)
=(9-3.3)*3.3/(2.2u*0.5M*9)
~1.9A
OCP:4A
Iocp=4-(1.9/2)=3.05A
Vth=3.05A*14mOhm=42.7mV
R(Ilim)=(42.7mV*10)/10uA
=42.7K
+5VPCU
5 Volt +/- 5%
TDC : 4.858A
PEAK : 6.5A
OCP : 8A
Width : 200mil
PC111
680p/50V_6
PC111
680p/50V_6
PC113
0.1u/50V_6
PC113
0.1u/50V_6
PQ15
AO3404
PQ15
AO3404
3
2
1
PQ32
DTC144EU
PQ32
DTC144EU
1 3
2
PC51
0.1u/50V_6
PC51
0.1u/50V_6
PQ16
2N7002K
PQ16
2N7002K
3
2
1
PR81
*0/short_4
PR81
*0/short_4
PR124
22/J_8
PR124
22/J_8
PR185
10K/F_4
PR185
10K/F_4
PR123
1M_6
PR123
1M_6
PQ33
2N7002K
PQ33
2N7002K
3
2
1
+
PC58
220uF/6.3V_6X4.2
+
PC58
220uF/6.3V_6X4.2
PR73
100K/F_4
PR73
100K/F_4
PQ24
AO3404
PQ24
AO3404
3
2
1
PR68
*0/short_6
PR68
*0/short_6
PQ21
AON7702
PQ21
AON7702
352
4
1
PC40
2200p/50V_6
PC40
2200p/50V_6
PC48
0.1u/10V_4
PC48
0.1u/10V_4
PR67
*0/short_4
PR67
*0/short_4
PR86
*0/short_6
PR86
*0/short_6
PU3
RT8223M
PU3
RT8223M
REF 3
TONSEL 4
VREG5 17
EN
13
VREG3 8
VIN 16
FB1
2
PGOOD
23
ENTRIP1
1
UGATE1
21
PHASE1
20
BOOT1
22
LGATE1
19
ENC
18
GND
15
LGATE2 12
BOOT2 9
PHASE2 11
UGATE2 10
ENTRIP2
6
SKIPSEL 14
FB2 5
OUT2 7
GND
25
VOUT1
24
+
PC46
220uF/6.3V_6X4.2
+
PC46
220uF/6.3V_6X4.2
PR70
97.6K/F_4
PR70
97.6K/F_4
PC37
1u/6.3V_4
PC37
1u/6.3V_4
PR183
6.81K/F_4
PR183
6.81K/F_4
PQ35
AO3404
PQ35
AO3404
3
2
1
PR83
330K/F_4
PR83
330K/F_4
PR125
1M_6
PR125
1M_6
PR186
*0/short_4
PR186
*0/short_4
PR126
1M_6
PR126
1M_6
PD2
1PS302
PD2
1PS302
1
2
3
PC42
0.1u/50V_6
PC42
0.1u/50V_6
PR71
*0/short_6
PR71
*0/short_6
PR74
22/J_8
PR74
22/J_8
PQ13
AON7410
PQ13
AON7410
352
4
1
PQ14
AON7410
PQ14
AON7410
352
4
1
PC39
4.7u/25V_8
PC39
4.7u/25V_8
PL3
2.2uH_7X7X3
PL3
2.2uH_7X7X3
PC115
0.1u/50V_6
PC115
0.1u/50V_6
PR187
4.7_6
PR187
4.7_6
PR84
100K/F_4
PR84
100K/F_4
1 2
PC43
0.1u/50V_6
PC43
0.1u/50V_6
PQ12
AO3404
PQ12
AO3404
3
2
1
PC112
680p/50V_6
PC112
680p/50V_6
PR82
665K/F_4
PR82
665K/F_4
PL4
2.2uH_7X7X3
PL4
2.2uH_7X7X3
PR191
22_8
PR191
22_8
PR190
10_8
PR190
10_8
PC49 4.7u/6.3V_6PC49 4.7u/6.3V_6
PD3
1PS302
PD3
1PS302
1
2
3
PC47
0.1u/25V_4
PC47
0.1u/25V_4
PQ17
AON7702
PQ17
AON7702
352
4
1
PR188
4.7_6
PR188
4.7_6
PQ22
AO3404
PQ22
AO3404
3
2
1
PR189
*0_4
PR189
*0_4
PR184
10K/F_4
PR184
10K/F_4
PR76
1/F_6
PR76
1/F_6
PC52
0.1u/50V_6
PC52
0.1u/50V_6
PC44
4.7u/25V_8
PC44
4.7u/25V_8
PC38 4.7u/6.3V_6PC38 4.7u/6.3V_6
PR75
*0/short_4
PR75
*0/short_4
PR85
*0_6
PR85
*0_6
PQ34
2N7002K
PQ34
2N7002K
3
2
1
PR72
*0_4
PR72
*0_4
PC118
0.1u/50V_6
PC118
0.1u/50V_6
PC50
0.1u/50V_6
PC50
0.1u/50V_6
PC45
2200p/50V_6
PC45
2200p/50V_6
PR182
15.4K/F_4
PR182
15.4K/F_4
PR69
48.7K/F_4
PR69
48.7K/F_4
PR78
1/F_6
PR78
1/F_6
![](asset-1f.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
8165_LX2
8165_BOOTA
8165_DL2
8165_ISENAN
8165_DH2
8165_ISEN1N
8165_ISEN1P
8165_TONSETA
8165_VCC
8165_DH1
8165_BOOT1
8165_LX1
8165_DL1
8165_VCLK
8165_VDIO
8165_ALERT#
8165_VRA
8165_VR
8165_VRHOT#
8165_RGND
8165_COMP
8165_FB
8165_ISENAP
8165_TONSET
8165_EN
8165_RGNDA
8165_COMPA
8165_FBA
8165_TEMPMAX
8165_ICCMAX
8165_ICCMAXA
8165_OCSET
8165_OCSETA
8165_SETINI
8165_SETINIA
8165_IBIAS
8165_VR
8165_VRA
8165_VCLK
8165_VDIO
8165_ALERT#
8165_VRHOT#
8165_TSENA 8165_TSEN
8165_TSEN
8165_TSENA
8165_OCSETA
8165_OCSET
8165_SETINIA
8165_SETINI
8165_ICCMAXA
8165_ICCMAX
8165_TEMPMAX
8165_GFXPS2
8165_GFXPS2
CPUVSS_SENSE[7]
CPUVCC_SENSE[7]
HWPG_1.05V[16,33,34]
+3.3V_PRIME_ON[16,27,34]
GTVCC_SENSE[7]
GTVSS_SENSE[7]
VR_SVID_CLK[6]
VR_SVID_DATA[6]
VR_SVID_ALERT#[6]
HWPG_VCCGFX[27]
IMVP_PWRGD[6,27]
H_PROCHOT#[6]
VIN
VCCGFX
+VCC_CORE
VIN
+5V_S58165_VCC
+VCC_CORE
VCCGFX
+3V
+1.05V
8165_VCC
8165_VCC
VIN
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
CPU CORE (RT8165B)
1B
31 40Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
CPU CORE (RT8165B)
1B
31 40Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
CPU CORE (RT8165B)
1B
31 40Wednesday, November 02, 2011
ZE7
Rsense=12.63m-ohm
assume
ESR=9m-ohm
assume
ESR=9m-ohm
Rsense=4.24m-ohm
for noise filtering,
place close to
RT8165B
for droop fine tune
For HW Debug
+VCC_CORE
TDC : 3.18A
PEAK : 4.23A
OCP : 10.4A
Width : 160mil
Load-line = -5.9mv/A
for Cedar trial-M
L=1.5uH, typ.DCR=14m-ohm
VCCGFX
TDC : 2.58A
PEAK : 3.44A
OCP : 9A
Width : 120mil
L=2.2uH, typ.DCR=18m-ohm
for compensation fine
tune
place close to
Vcore inductor
place close to
GFX inductor
Place close to VR
OCSETA=2.619V
OCSET=2.56V
Temp max=100C
VICCMAX=164mV, /19.2mV=8.563
VICCMAXA=68mV, /19.2mV=3.532
VBOOT=1V
VBOOTA=1V
GFX Not force PS2
<20110428> For EMI request
<20110428> For EMI request
31
PR13 10K/F_4PR13 10K/F_4
PR40
100K_4
PR40
100K_4
PR34
11K/F_4
PR34
11K/F_4
PU8
RT8167BGQW
PU8
RT8167BGQW
TONSETA 31
UGATEA 34
BOOTA 33
PHASEA 35
LGATEA 36
ISENAP 30
ISENAN 29
COMPA
28
FBA
27
RGNDA
26
OCSETA
18
ICCMAXA
14
SETINIA
10
GFXPS2
8VCC 9
PVCC 37
TONSET 2
UGATE1 40
BOOT1 1
PHASE1 39
LGATE1 38
ISEN1P 3
ISEN1N 4
COMP
5
FB
6
RGND
7
OCSET
16
ICCMAX
13
TEMPMAX
12
SETINI
11
TSEN
15
TSENA
17
IBIAS
19
VRHOT
20
VR_READY
21
VRA_READY
22
ALERT
23
VDIO
24
VCLK
25
EN
32
GND 41
PR50 0_4PR50 0_4
PR32
100/F_4
PR32
100/F_4
PC3
470p/50V_4
PC3
470p/50V_4
PR8 10K/F_4PR8 10K/F_4
PR2 10K/F_4PR2 10K/F_4
PR146 *0/short_4PR146 *0/short_4
PC23
0.1u/25V_6
PC23
0.1u/25V_6
PR165
1.15K/F_4
PR165
1.15K/F_4
PR163
6.98K/F_4
PR163
6.98K/F_4
PC29
2200P/50V_4
PC29
2200P/50V_4
PC108
*1000P/50V_6
PC108
*1000P/50V_6
PC18
0.1u/25V_6
PC18
0.1u/25V_6
PR141 21K/F_4PR141 21K/F_4
PC123
*22U/25V_1210
PC123
*22U/25V_1210
PC92 0.1u/25V_4PC92 0.1u/25V_4
PC97
0.22U/25V_6
PC97
0.22U/25V_6
PR160
*0/short_4
PR160
*0/short_4
PR3 10K/F_4PR3 10K/F_4
PC11
36p/50V_4
PC11
36p/50V_4
PR152
*0/short_4
PR152
*0/short_4
PC95
0.1u/25V_4
PC95
0.1u/25V_4
PC104
0.1u/50V_6
PC104
0.1u/50V_6
PR144 *0/short_4PR144 *0/short_4
PR45
130K/F_4
PR45
130K/F_4
PR137 51K/F_4PR137 51K/F_4
PR6 2.21K/F_4PR6 2.21K/F_4
PR166
2.2_6
PR166
2.2_6
PR9
1K/F_4
PR9
1K/F_4
PR28
100/F_4
PR28
100/F_4
PC124
*22U/25V_1210
PC124
*22U/25V_1210
PC2
1u/10V_4
PC2
1u/10V_4
PR16
750/F_4
PR16
750/F_4
PC102
0.1u/50V_6
PC102
0.1u/50V_6
PC7
100p/50V_4
PC7
100p/50V_4 PC12
33P/50V_4
PC12
33P/50V_4
PR162
3.57K/F_4
PR162
3.57K/F_4
PR21 *0/short_8PR21 *0/short_8
PR175
*2.2/F_6
PR175
*2.2/F_6
PR37
2_6
PR37
2_6
PR17
750/F_4
PR17
750/F_4
PR147 10K/F_4PR147 10K/F_4
PL9
1.5uH_7X7X3
PL9
1.5uH_7X7X3
PR164
1K/F_4
PR164
1K/F_4
PC105
4.7u/25V_8
PC105
4.7u/25V_8
PR168
10K_6_NTC
PR168
10K_6_NTC
PR161
*0/short_4
PR161
*0/short_4
PR4 33K/F_4PR4 33K/F_4
PR7
1K/F_4
PR7
1K/F_4
PR135 16.9K/F_4PR135 16.9K/F_4
PR1 *90.9/F_4PR1 *90.9/F_4
PR143 *0/short_4PR143 *0/short_4
PR5 5.1K/F_4PR5 5.1K/F_4
PR31
10K/F_4
PR31
10K/F_4
PR159
1K/F_4
PR159
1K/F_4
PR18
10K/F_4
PR18
10K/F_4
PC98
4.7u/6.3V_6
PC98
4.7u/6.3V_6
PR149 *0/short_4PR149 *0/short_4
PQ2
AON7410
PQ2
AON7410
352
4
1
PR12 100/J_4PR12 100/J_4
PR38
88.7K/F_4
PR38
88.7K/F_4
PR140 11.8K/F_4PR140 11.8K/F_4
PR150 *0/short_4PR150 *0/short_4
PC15
*0.1u/50V_6
PC15
*0.1u/50V_6
+
PC32
*330u/2V_7343
+
PC32
*330u/2V_7343
PR154
1K/F_4
PR154
1K/F_4
PR174
*2.2/F_6
PR174
*2.2/F_6
PQ5
AON7410
PQ5
AON7410
352
4
1
PR36
*0/short_4
PR36
*0/short_4
PC89
4.7u/6.3V_6
PC89
4.7u/6.3V_6
PR10 10K/F_4PR10 10K/F_4
+
PC14
330u/2V_7343
+
PC14
330u/2V_7343
PC103
4.7u/25V_8
PC103
4.7u/25V_8
PR11
53.6K/F_4
PR11
53.6K/F_4
PR139 182K/F_4PR139 182K/F_4
PC106
4.7u/25V_8
PC106
4.7u/25V_8
PR169
2.2_6
PR169
2.2_6
PR142 *0/short_4PR142 *0/short_4
PR30
2.55K/F_4
PR30
2.55K/F_4
PR46
130K/F_4
PR46
130K/F_4
PR20
10K/F_4
PR20
10K/F_4
PR52
4.7_6
PR52
4.7_6
PR171
1K_6_NTC(B=3650)
PR171
1K_6_NTC(B=3650)
PR35
750/F_4
PR35
750/F_4
PR158
100/F_4
PR158
100/F_4
PR15 110/F_4PR15 110/F_4
PR153
*0/short_4
PR153
*0/short_4
PC13
*0.1u/50V_6
PC13
*0.1u/50V_6
PQ4
AON7702
PQ4
AON7702
352
4
1
PC1
1u/10V_4
PC1
1u/10V_4
PR14 10K/F_4PR14 10K/F_4
PR151
100/F_4
PR151
100/F_4
PC16
0.1u/50V_6
PC16
0.1u/50V_6
PC93
*0.1u/10V_4
PC93
*0.1u/10V_4
PC101
*1000P/50V_6
PC101
*1000P/50V_6
PR39
*0/short_4
PR39
*0/short_4
PC96
0.22U/25V_6
PC96
0.22U/25V_6
PL8
2.2uH_7X7X3
PL8
2.2uH_7X7X3
PR53
4.7_6
PR53
4.7_6
PR44
*0/short_4
PR44
*0/short_4
PC94
*0.1u/10V_4
PC94
*0.1u/10V_4
PC127
*22U/25V_1210
PC127
*22U/25V_1210
PC27
2200P/50V_4
PC27
2200P/50V_4
PR167
1K_6_NTC(B=3650)
PR167
1K_6_NTC(B=3650)
PR138 274K/F_4PR138 274K/F_4
PR49 *0_4PR49 *0_4
+
PC107
330U/2V_7343
+
PC107
330U/2V_7343
PR29
*0/short_4
PR29
*0/short_4
PQ3
AON7702
PQ3
AON7702
352
4
1
PR41
88.7K/F_4
PR41
88.7K/F_4
PC109
0.1u/50V_6
PC109
0.1u/50V_6
PR136 16.9K/F_4PR136 16.9K/F_4
PR22
*0/short_4
PR22
*0/short_4
PR172
10K_6_NTC
PR172
10K_6_NTC
PR33 *0/short_8PR33 *0/short_8
PR145 *0_4PR145 *0_4
PR19 54.9/F_4PR19 54.9/F_4
![](asset-20.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
8207A_DH
8207A_LX
8207A_DL
S5_1.8V
S3_1.8V
8207A_VBST
+1.5VSUS
+5V_S5
MAIND
8207A_SET
+5V_S5
S3_1.8VS5_1.8V
SUSON [16,27,34]
DDRAM_PWROK [8,27]
MAIND[30,34]
MAINON [16,27,33,34]
+1.5VSUS
VIN
VIN
+3V_S5
+5V_S5
+0.75V_DDR_VTT
+SMDDR_VREF
+1.5VSUS
+1.5V
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
DDR 1.5V(TPS51116)
1B
32 40Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
DDR 1.5V(TPS51116)
1B
32 40Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
DDR 1.5V(TPS51116)
1B
32 40Wednesday, November 02, 2011
ZE7
Vout = (PR150/PR149) X 0.75 + 0.75
(For RT8207A 400KHZ) close to PC2016
0.188A
[PWM]
Vtrip= (10-1.57/2)*14mohm=0.12901V
RILIM=Vtrip/10uA~12.901Kohm
L(ripple current)
=(19-1.5)*1.5/(2.2u*400k*19)
~1.57A
AON7702 Rdson=11~14mOhm
VTTREF+1.5VSUS
ON ON ON
ON ON
OFF
OFF
OFFOFF
S3 S5
S0
S3
S4/S5
1 1
10
0 0
0.375A
20mil
10mil
32
+1.5VSUS
1.5 Volt +/- 5%
TDC : 4.32A
PEAK : 5.76A
OCP : 10A
Width : 200mil
TDC : 1.24A
PEAK : 1.65A
Width : 60mil
<20110728> Change DDRAM_PWROK PU from +3V_S5 to +1.5VSUS (no connect at EC side )
+
PC61
330U/2V_7343
+
PC61
330U/2V_7343
PR96
*0/short_6
PR96
*0/short_6
PU5
RT8207L
PU5
RT8207L
VTTGND
1
VTTSNS
2
GND
3
MODE
4
VTTREF
5
COMP
6
NC
7
VDDQSNS
8
VDDQSET
9
S3
10
S5
11
NC
12
PGOOD 13
V5FILT 14
V5IN 15
CS 16
CS_GND 17
PGND 18
DRVL 19
LL 20
DRVH 21
VBST 22
VLDOIN 23
VTT 24
GND 25
PQ11
AO3404
PQ11
AO3404
3
2
1
PR120
620K/F_4
PR120
620K/F_4
PC66
4.7U/25V_8
PC66
4.7U/25V_8
PR122
5.1/F_6
PR122
5.1/F_6
PR119
13K/F_4
PR119
13K/F_4
PR121 *100K/F_4PR121 *100K/F_4
PR117 *0/J_4PR117 *0/J_4
PC59
10U/10V_8
PC59
10U/10V_8
PC77
1U/10V_4
PC77
1U/10V_4
PR97
*0/short_6
PR97
*0/short_6
PR111
*0/short_6
PR111
*0/short_6
PR198 0/J_4PR198 0/J_4
PC76
1U/10V_4
PC76
1U/10V_4
12
PC63
2200P/50V_6
PC63
2200P/50V_6
PC73
0.1U/50V_6
PC73
0.1U/50V_6
PC72
*680p/50V_6
PC72
*680p/50V_6
PR100
*0/J_4
PR100
*0/J_4
PR110
10K/F_4
PR110
10K/F_4
PC60
10U/10V_8
PC60
10U/10V_8
PR113 *0/short_4PR113 *0/short_4
PC65
4.7U/25V_8
PC65
4.7U/25V_8
PR118 *0/short_4PR118 *0/short_4
PQ28
AON7702
PQ28
AON7702
352
4
1
PL5
2.2uH_7X7X3
PL5
2.2uH_7X7X3
PC68
*33P/50V_6
PC68
*33P/50V_6
PC67
10U/10V_8
PC67
10U/10V_8
PC64
10U/10V_8
PC64
10U/10V_8
PQ25
AON7410
PQ25
AON7410
352
4
1
PR115
*4.7/J_6
PR115
*4.7/J_6
PC56
0.033U/50V_6
PC56
0.033U/50V_6
PR103
10K/F_4
PR103
10K/F_4
![](asset-21.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LGATE-1.05V
UGATE-1.05V
PHASE-1.05V
1.05V_FB
HWPG_1.05V[16,31,34]
MAINON[16,27,32,34]
+3V
VIN
+5V_S5
+1.05V
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
+1.05V(UP6111AQDD)
1B
33 40Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
+1.05V(UP6111AQDD)
1B
33 40Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
+1.05V(UP6111AQDD)
1B
33 40Wednesday, November 02, 2011
ZE7
R1
R2
VOUT=(1+R1/R2)*0.75
[PWM]
AON7702 Rdson=11~14mOhm
L(ripple current)
=(19-1.05)*1.05/(2.2u*272k*19)
~1.658A
Rth=14m*(5-0.829)/20uA
RILIM=2.92Kohm
TON=3.85p*RTON*Vout/(Vin-0.5)
Frequency=Vout/(Vin*TON)
TON=3.85p*1M*1/(Vin-0.5)
Frequency=1/(0.0036767)=272K
33
+1.05V
1.05 Volt +/- 5%
TDC : 1.36A
PEAK : 1.82A
OCP : 5A
Width : 60mil
PC116
*10U/10V_8
PC116
*10U/10V_8
PD4
RB500V-40
PD4
RB500V-40
PR99
33K/J_4
PR99
33K/J_4
PC70
1U/10V_4
PC70
1U/10V_4
PC74
4.7U/10V_6
PC74
4.7U/10V_6
12
PR104
*0/short_6
PR104
*0/short_6
PR114
2.2/F_6
PR114
2.2/F_6
PC53
*33P/50V_6
PC53
*33P/50V_6
PR94
*0/short_6
PR94
*0/short_6
PR88
4.02K/F_4
PR88
4.02K/F_4
PC54
1U/10V_4
PC54
1U/10V_4
PR89
10/J_6
PR89
10/J_6
PR92
1M/F_4
PR92
1M/F_4
PC121
2.2n/50V_4
PC121
2.2n/50V_4
PR192
*4.7/J_6
PR192
*4.7/J_6
PU4 G5602PU4 G5602
EN/DEM
15
TON
16
VOUT
1
VDD
2
FB
3
PGOOD
4
GND
6PGND 7
LGATE 8
VDDP 9
OC 10
PHASE 11
UGATE 12
BOOT 13
NC
5TPAD 17
NC
14
PC57
0.1U/50V_6
PC57
0.1U/50V_6
PR90
10K/J_4
PR90
10K/J_4
PC55
*1000P/50V_6
PC55
*1000P/50V_6
PC117
.1U/10V_4
PC117
.1U/10V_4
12
PQ51
AON7702
PQ51
AON7702
352
4
1
PR95
*0/short_6
PR95
*0/short_6
PC119
*680p/50V_6
PC119
*680p/50V_6
PQ45
AON7410
PQ45
AON7410
352
4
1
PL10
2.2uH_7X7X3
PL10
2.2uH_7X7X3
PC122
4.7U/25V_8
PC122
4.7U/25V_8
+
PC114
330U/2.5V
+
PC114
330U/2.5V
PR93
10K/F_4
PR93
10K/F_4
PC69
0.1U/50V_6
PC69
0.1U/50V_6
PR108
3K/F_4
PR108
3K/F_4
![](asset-22.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MAINDMAINON_ON_G
SUSDSUS_ON_G
+3.3V_PRIME_ON
MAINON_ON_G
MAINON_ON_G
MAIND [30,32]
SUSON[16,27,32]
SUSD [30]
HWPG_1.8V [27]
HWPG_1.05V[16,31,33]
+3.3V_PRIME_ON[16,27,31]
MAINON[16,27,32,33]
MAINON_ON_G [27]
+3VSUS +15V
VIN +1.5VSUS
VIN +15V+5V+3V +1.05V +1.5V
+1.8V
+3VSUS
VIN VCCGFX
+5V
+3V
VIN +15V+3.3V_PRIME
+3.3V_PRIME
+3V
+1.8V
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
Discharge/1.8V
1B
34 40Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
Discharge/1.8V
1B
34 40Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
Discharge/1.8V
1B
34 40Wednesday, November 02, 2011
ZE7
Rg
Rh
Vout1 = (1+Rg/Rh)*0.5
34
For +3V_PRIME
Reserve For VCCGFX
<20100902> reserve for H/W debug
TDC : 0.17A
PEAK : 0.22A
Width : 10mil
+1.8V
1.8Volt +/- 5%
TDC : 0.113A
PEAK : 0.151A
Width : 20mil
<20101217> Reserve 30K for Duncan suggestion
PC120
*2200P/50V_4
PC120
*2200P/50V_4
PR176
*1M/J_4
PR176
*1M/J_4
PR180 *0/J_4PR180 *0/J_4
PC35
*1U/10V_4
PC35
*1U/10V_4
PQ48
2N7002K
PQ48
2N7002K
3
2
1
PQ29
AO4468
PQ29
AO4468
3 6
5
7
8
2
4
1
PR181 0/J_4PR181 0/J_4
PQ27
2N7002K
PQ27
2N7002K
3
2
1
PC41
*2200P/50V_4
PC41
*2200P/50V_4
PR196
1M/J_4
PR196
1M/J_4
PC71
.1U/10V_4
PC71
.1U/10V_4
12
PC110
*0.1U/10V_4
PC110
*0.1U/10V_4
12
PC80
.1U/10V_4
PC80
.1U/10V_4
12
PR64
1M/J_4
PR64
1M/J_4
PR62
1M/J_4
PR62
1M/J_4
PQ49
2N7002K
PQ49
2N7002K
3
2
1
PU7
G9334 ADJ
PU7
G9334 ADJ
VCC 6
GND
2
PGD 4
EN 1
FB
3
DRV
5
PQ43
*DMN601K-7
PQ43
*DMN601K-7
3
2
1
PR60
1M/J_4
PR60
1M/J_4
PQ26
2N7002K
PQ26
2N7002K
3
2
1
PR107
47/F_4
PR107
47/F_4
PR178
*22/J_8
PR178
*22/J_8
PC82
10U/10V_8
PC82
10U/10V_8
PR87
1M/J_4
PR87
1M/J_4
PR105 *30K/F_4PR105 *30K/F_4
PQ19
2N7002K
PQ19
2N7002K
3
2
1
PR177
*1M/J_4
PR177
*1M/J_4
PQ20
*DMN601K-7
PQ20
*DMN601K-7
3
2
1
PR197
22/J_8
PR197
22/J_8
PR98
22/J_8
PR98
22/J_8
PR80
*22/J_8
PR80
*22/J_8
PR101
22/J_8
PR101
22/J_8
PQ47
*DMN601K-7
PQ47
*DMN601K-7
3
2
1
PR102
100K_4
PR102
100K_4
PR61
22/J_8
PR61
22/J_8
PR179
22/J_8
PR179
22/J_8
PR91
1M/J_4
PR91
1M/J_4
PQ6
2N7002K
PQ6
2N7002K
3
2
1
PQ46
DTC144EU
PQ46
DTC144EU
1 3
2
PQ18
2N7002K
PQ18
2N7002K
3
2
1
PR65 *0/short_4PR65 *0/short_4
PR194
1M/J_4
PR194
1M/J_4
PQ44
2N7002K
PQ44
2N7002K
3
2
1
PQ8
2N7002K
PQ8
2N7002K
3
2
1
PR63
*100K_4
PR63
*100K_4
12
PC62
33N/25V_4
PC62
33N/25V_4
PQ7
DTC144EU
PQ7
DTC144EU
1 3
2
PQ42
*DTC144EU
PQ42
*DTC144EU
1 3
2
PC36
*2.2n/50V_4
PC36
*2.2n/50V_4
PR129
261/F_4
PR129
261/F_4
PR130
100/F_4
PR130
100/F_4
PR195
*22/J_8
PR195
*22/J_8
PC79
10U/10V_8
PC79
10U/10V_8
PR193
1M/J_4
PR193
1M/J_4
PQ9
2N7002K
PQ9
2N7002K
3
2
1
PQ10
AO3404
PQ10
AO3404
3
2
1
PR79
22/J_8
PR79
22/J_8
PQ23
DTC144EU
PQ23
DTC144EU
1 3
2
PR77
1M/J_4
PR77
1M/J_4
PC81
10U/10V_8
PC81
10U/10V_8
PR66 *0/short_4PR66 *0/short_4
![](asset-23.png)
1
1
2
2
3
3
4
4
5
5
A A
B B
C C
D D
2.469V
TSNS_ON
S5_ON
SYS_SHDN# [6,30]
S5_ON[16,27,30]
VIN
VLVL
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
Thermal protect
1B
35 40Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
Thermal protect
1B
35 40Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
Thermal protect
1B
35 40Wednesday, November 02, 2011
ZE7
35
Thermal Protection (DCD)
2.52V
Thermal protection temperature = 70C
<20111018>
Change PR112 from CS22212FB11 to CS21502FB14,
for change M/B from 60 to 70℃ ℃
PR109
200K/F_4
PR109
200K/F_4
PD5
1SS355
PD5
1SS355
PQ31
2N7002K
PQ31
2N7002K
3
2
1
+
-
PU6B
AS393MTR-E1
+
-
PU6B
AS393MTR-E1
5
67
PR116
10K/J(NTC) _6
PR116
10K/J(NTC) _6
PC78
0.1U/25V_4
PC78
0.1U/25V_4
PQ30
AO3409
PQ30
AO3409
3
2
1
PQ37
DTC144EU
PQ37
DTC144EU
1 3
2
PR112
1.5K/F_4
PR112
1.5K/F_4
PC75
0.1U/25V_4
PC75
0.1U/25V_4
+
-
PU6A
AS393MTR-E1
+
-
PU6A
AS393MTR-E1
3
21
84
PQ36
2N7002K
PQ36
2N7002K
3
2
1
PR106
200K/F_4
PR106
200K/F_4
PR128
200K/F_4
PR128
200K/F_4
PR127
1M/F_4
PR127
1M/F_4
![](asset-24.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
Clock Distribution Diagram
1B
36 40Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
Clock Distribution Diagram
1B
36 40Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
Clock Distribution Diagram
1B
36 40Wednesday, November 02, 2011
ZE7
(100/133MHz)
Y2(14.318 MHz)
Page 25
WLAN(Mini Card 2)
Page 10~15
Y4(32.768K KHz)
(24MHz)
Page 20
Audio
ALC271X
CLOCK GEN CK505
SLG8LV631V
Page 5~9 Page 2
Cedarview-M
LAN
RTL8105TA-VC-CG
(32.768KHz)
Page 22
Y5(25 MHz)
Tigerpoint
Card Reader
RTS5209-GR
Page 26
DDR3 SO-DIMM0
Page 4
Page 18
10.1" LED Panel
HPLLREFCLK_P/N
DDR3REF_P/N
DPL_REFSSCLKIN_P/N
DMICLKIN_P/N
DPLREFCLK_P/N
DDR_CLK1P/N
LVDS_CLKP/N
DDR_CLK2P/N
DDR_CLK3P/N
(100MHz)
(96MHz)
DDR_CLK0P/N
CPU_0P/N
CPU_1P/N
LCD_CLKP/N
SRC_P/N
DOT_96P/N
(Max. 112MHz)
CPU_ITPP/N
Y3(27 MHz)
SATAP/N
SRC_P/N
PCI_33
REF
USB_48
(33MHz)
(14.318MHz)
(48MHz)
PCI_33
SRC_P/N
SRC_P/N
SRC_P/N
BIT_CLK
SUSCLK
(100MHz)
(100MHz)
(100MHz)
(100MHz)
(100MHz)
Page 17
HDMI
(Max. 340MHz)
SATACLKP/N
DMICLK100P/N
PCICLK
CLK14
CLK48
LVDS_CLKP/N
DDI0_TXP/N3
(400/533MHz)
(400/533MHz)
(100/133MHz)
36
Page 25
WLAN(Mini Card 1)
Debug Card
(100MHz)
EC
WPCE791L
Page 27
(33MHz)
SPICLK
Page 27
SPI Flash
(33MHz)
(100MHz)
To CPU
From TPT
(24MHz)
AZIL_BCLK SRC_P/N
![](asset-25.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
Power Tree
1B
37 40Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
Power Tree
1B
37 40Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
Power Tree
1B
37 40Wednesday, November 02, 2011
ZE7
CHARGER
ADAPTER
BATTERY PU9001
CPU core
PU8
SYSTEM
PU3
AO3404
PQ35
+VCC_CORE(0.75V-1.18V,4.234A)
<HWPG_1.05V>
+5VPCU(4.03A)
<AC/DC Insert>
+5VPCU
(6.517A)
<S5D>
+5V_S5(10mA)
VIN
VIN
VIN
(5.48A)
(ISL88731)
5V/3V
(RT8223)
<HWPG_1.05V>
(RT8165)
AO3404
PQ15
+3VPCU(55mA)
<AC/DC Insert>
+3VPCU
(3.034A)
AO3404
PQ24 <SUSD>
+3VSUS(1.1A)
<S5D>
+3V_S5(197mA)
VCCGFX(0.76V~1.05V,3.438A)
DDR PWR
PU5
AO3404
PQ11
+1.5VSUS(3.362A)
<SUSON>
+1.5VSUS
(5.008A)
<MAIND>
+1.5V(1.646A)
1.5V
(RT8207)
+0.75V_DDR_VTT(0.5A)
<MAINON>
VIN
37
AO3404
PQ12 <MAIND>
+5V(2.477A)
PU4
+1.05V(1.8164A)
+1.05V
(G5602) <MAINON+RC>
AO3404
PQ22 <MAIND>
+3V(1.38A)
G9334
AO4468
PU7/PQ29 <+3.3V_PRIME_ON>
+1.8V(151mA)
AO3404
PQ10 <+3.3V_PRIME_ON>
+3.3V_PRIME(220mA)
+3VSUS
(1.182A)
+3V
(1.6A)
+SMDDR_VREF(0.25A)
<SUSON>
BOM Structure
Description
w/ LVDS (default)
w/ BT module
w/ EDP
LVDS@
BT@
EDP@
Function
3G@ w/ 3G module
1.5VPLL@ w/ 1.5VPLL (default)
1.05VPLL@ w/ 1.05VPLL
w/o 3G module
stuff 3G@
unstuff 3G@
w/o BT module
stuff BT@
unstuff BT@
stuff LVDS@
L38: CV+1003JN01 (0.1UH)
C334: CH5102K9B06 (1UF)
stuff EDP@
L38: CS00003J951 (0ohm)
C334:CS00002JB38 (0ohm)
stuff 1.5VPLL@
stuff 1.05VPLL@
3G
BT
LVDS/EDP
PLL Power
![](asset-26.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
Power Sequence
1B
38 40Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
Power Sequence
1B
38 40Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
Power Sequence
1B
38 40Wednesday, November 02, 2011
ZE7
*Note: EC will sampling SUSB# & SUSC# every 5ms.
HWPG_1.5V (SUS)
MAINON
SUSON
SUSB#(SLP_S3#),SUSC#(SLP_S4#)
H_PWRGD
+5V +3V +1.5V +0.75V_DDR_VTT
+3VSUS +SMDDR_VREF +1.5VSUS(to DDR3_DRAM_PWROK)
From Button to EC
From SB to EC
From PWM to EC
PLTRST#
EC_RSMRST#
DNBSWON#(PWRBTN#)
+5VPCU +3VPCU VCCRTC
S5_ON
JE01_CT(Cedar Trail) Power On Sequence
HWPG_SYS(PCU)
+3V_S5
NBSWON#
VIN
>=5ms
100ms
From EC to PWM
From EC to SB
From EC to SB
From EC to SB
From EC to PWM
From PWM to EC
From EC to PWM
From SB to CPU
+5V_S5
38
TPT_PWROK
*=Reserve
Stuff Stuff
+3V +3V
VV
+3V
(SMB_DATA)/(SMB_CLK) (+3V_S5)
Power Plane
MOS CKT (Level shift)
CLK GEN RAM *Mini Card (WLAN)
V
ICH SMBUS Table
EC791 SDA2 / SCL2
EC791 SDA1 / SCL1 (+3VPCU)
EC SMBUS Table
GFX Thermal SensorCPU Thermal SensorBattery
V
Power Plane +3VPCU
MOS CKT (Level shift)
X
EC791 SDA3 / SCL3
From AC,BATT
From SB to All
+1.05V (also for V_CPU_IO of PCH)
HWPG_1.05V
+VCC_CORE VCCGFX
From PWM to CPU VR
+3.3V_PRIME_ON
From PWM to EC
ECPWROK(AND with HWPG to PWROK,to DDR3_VCCA_PWROK)
From EC to CPU,SB
BCLK
From CLK Gen
RTCRST#
>=18ms
+5V_S5 power up before +3V_S5, or
after +3V_S5 within 0.7V (t201)
>=0ms
(VCCRTC to RTCRST#)(t200)
(VCCRTC to S5 well)(t203)
(EC define)
+5V power up before +3V, or
after +3V within 0.7V (t209)
99ms(S0 well of TPT to TPT_PWROK)(t214)
1~2 RTCCLK (SUSC# to SUSB#)(t234)
CPU: +1.5V power up before +1.05V ; PCH: +1.5V power up
before V_CPU_IO, or after V_CPU_IO within 0.7V (t211)
+3V_S5 power down before +5V_S5,
or after +5V_S5 within 0.7V
+3V power down before +5V,
or after +5V within 0.7V
V_CPU_IO power down before +1.5V,
or after +1.5V within 0.7V
HWPG(to EC,VRMPWRGD,CK505)
(S5 well to EC_RSMRST#)(t205)
(1RTC: 28.992 µs to 32.044 µs)
NOTE:PWROK assertion indicates that PCICLK has been stable for at least 1 ms.
+3V_PRIME +1.8V
CPU:+3V_PRIME and +1.8V needs to be <700mV
HWPG_1.8V
100ms(EC define)
From PWM
*XDP
V
+3V
Stuff Stuff
From EC
From PWM to EC IMVP_PWRGD/HWPG_VCCGFX
![](asset-27.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
power sequence block diagram
1B
39 40We dnesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
power sequence block diagram
1B
39 40We dnesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
power sequence block diagram
1B
39 40We dnesday, November 02, 2011
ZE7
BATT Charger
AC Adapter
Battery
VIN
Always System power
+3VPCU
+5VPCU
EC
1
4
PCH
EC_RSMRST#
7
DNBSWON#
8
NBSWON#
SUSB#
SUSC# 9
SUSON(SUSD)
SLP_S3#(SUSB#):
S3 Sleep Power plane control Assertion of SLP_S3# shuts off power to non-critical components
when system transitions to S3, S4, or S5 states.
SLP_S4#(SUSC#):
S4 Sleep Power plane control - Assertion of SLP_S4# shuts power off to non-critical components
when system transitions to S4 or S5 state.
MAINON(MAIND)
10
HWPG
HWPG_SYS
RSMRST#
PWRBTN#
SLP_S4#
SLP_S3#
2
13
HWPG_1.8V
HWPG_1.5V
11
+SMDDR_VREF
MOS +3VSUS
12
Regulator
+0.75V_DDR_VTT
3
ECPWROK
PWRGD
21
CPU_PG
+3VPCU
VIN
Regulator
PQ33
+5VPCU
MOS
S5_ON
(S5D)
5
6
+3V_PRIME
+3V
MOS
22
VRM_PWRGOOD
PLTRST#
39
PU2
PU2
PQ9
PU5
PQ12
+3VPCU
MOS
+5V_S5
+3V_S5
RESET_L
CPU
DDR3_DRAM_PWROK
+1.5VSUS
+1.5V
MOS
+1.5VSUS
+1.05V
VR
VIN
18
Regulator
+VCC_CORE
PU8
17
VIN
VCCGFX
IMVP_PWRGD/ HWPG_VCCGFX
16
HWPG_1.05V
+5V
+3V
MOS
14
+3VPCU/+5VPCU
PU7 +1.8V
+3VSUS
19b
MOS
+3.3V_PRIME_ON
MAIND
MAINON
+RC
MAIND
MAINON
SUSON
SUSD
15
20
CK505
EN
TPT_PWROK
23
PWRGD
H_PWRGD PLTRST_N
24 25
NMOS
G
D
S
GND
MAINON_ON_G
For Power Down Sequence
NMOS
G
D
S
GND
For Power Down Sequence
DDR3_VCCA_PWROK
MAINON_ON_G
100ms
(From EC)
19a
PQ22
![](asset-28.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
Change List1
1B
40 40Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
Change List1
1B
40 40Wednesday, November 02, 2011
ZE7
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.
PROJECT :
Change List1
1B
40 40Wednesday, November 02, 2011
ZE7
REV
FROM To
CHANGE LIST
PART NUMBER: DRAWING BY: REVISON:
APPROVED BY:PROJECT MODEL : ZE7
ZE7
Model
ZE7 MB
DOC NO.
MODEL
1A
DATE:
1A 1B
First Released (PCB: A)
1B
1B
<Page 5> Update CPU P/N to MP P/N
<Page 19> Un-stuff CA122084N98 at CP1 - CP6 by EMI confirmation
<Page 18> Stuff R26 CS00003J951 (0/J_6) for +5V_LCD (IVO panel)
Change 0ohm resistors to short PAD
2011/11/2