Si2309DS Datasheet. Www.s Manuals.com. Vishay

User Manual: Marking of electronic components, SMD Codes A9, A9*, A9**, A9***, A9-**, A9-***, A933AS, A9A, A9A#. Datasheets 2SA933AS, 74AHC1G09GW, AD8591ART, AD8591ARTZ, AO3409, AO3409L, ELM9709NBA, FAN54015UCX, FMA9N, RT8008-12PJ5, RT9011-CCPQV, RT9011-KMPJ6, RT9014-FMPQV, RT9198-33PU5, RT9818E-22PY, Si2309DS, Si9183DT-AD-T1, TPS3831K50DQNR, UMA9N.

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Si2309DS
Vishay Siliconix

P-Channel 60-V (D-S) MOSFET

FEATURES

PRODUCT SUMMARY
VDS (V)
- 60

RDS(on) (Ω)

ID (A)

0.340 at VGS = - 10 V

- 1.25

0.550 at VGS = - 4.5 V

-1

• Halogen-free According to IEC 61249-2-21
Available
• TrenchFET® Power MOSFET

TO-236
(SOT-23)

G

1
3

S

D

2

Top View
Si2309DS (A9)*
* Marking Code
Ordering Information: Si2309DS-T1
Si2309DS-T1-E3 (Lead (Pb)-free)
Si2309DS-T1-GE3 (Lead (Pb)-free and Halogen-free)

ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted
Parameter

Symbol

Limit

Drain-Source Voltage

VDS

- 60

Gate-Source Voltage

VGS

± 20

Continuous Drain Current (TJ = 150 °C)a, b

TA = 25 °C
TA = 70 °C

Avalanche Current
Maximum Power Dissipationa, b

L = 0.1 mH
TA = 25 °C
TA = 70 °C

- 0.85

A

-8

IAS

-5
1.25

PD

W

0.8

TJ, Tstg

Operating Junction and Storage Temperature Range

V

- 1.25

ID
IDM

Pulsed Drain Current

Unit

- 55 to 150

°C

THERMAL RESISTANCE RATINGS
Parameter
Maximum Junction-to-Ambienta
Maximum

Junction-to-Leada

Symbol
t≤5s
Steady State
Steady State

RthJA
RthJL

Typical

Maximum

Unit

100
130

166

45

60

°C/W

Notes:
a. Surface Mounted on FR4 board.
b. t ≤ 5 s.
* Pb containing terminations are not RoHS compliant, exemptions may apply.
Document Number: 70835
S09-0133-Rev. D, 02-Feb-09

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1

Si2309DS
Vishay Siliconix
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
Parameter

Symbol

Test Conditions

Min.

V(BR)DSS

VDS = 0 V, ID = - 250 µA

- 60

VGS(th)

VDS = VGS, ID = - 250 µA

-1

IGSS

VDS = 0 V, VGS = ± 20 V

Typ.

Max.

Unit

Static
Drain-Source Breakdown Voltage
Gate Threshold Voltage
Gate-Body Leakage
Zero Gate Voltage Drain Current

IDSS

On-State Drain Currenta

ID(on)

Drain-Source On-State Resistancea

± 100

VDS = - 48 V, VGS = 0 V

-1

VDS = - 48 V, VGS = 0 V, TJ = 125 °C

- 50

VDS ≥ - 4.5 V, VGS = - 10 V

µA
A

0.275

0.340

VGS = - 4.5 V, ID = - 1 A

0.406

0.550

VDS = - 4.5 V, ID = - 1 A

1.9

VDS = - 30 V, VGS = - 10 V, ID = - 1.25 A

1.15

gfs

nA

-6

VGS = - 10 V, ID = - 1.25 A

RDS(on)

Forward Transconductancea

V

Ω
S

Dynamicb
Total Gate Charge

Qg

Gate-Source Charge

Qgs

Gate-Drain Charge

Qgd

Turn-On Delay Time

td(on)

5.4

VDD = - 30 V, RL = 30 Ω
ID ≅ - 1 A, VGEN = - 4.5 V, RG = 6 Ω

td(off)

Turn-Off Delay Time

tf

Fall Time
Source-Drain Rating Characteristics

nC

0.92

tr

Rise Time

12

10.5

20

11.5

20

15.5

30

7.5

15

ns

b

IS

- 1.25

Pulsed Current

ISM

-8

Diode Forward Voltagea

VSD

IS = - 1.25 A, VGS = 0 V

- 0.82

- 1.2

V

trr

IF = - 1.25 A, dI/dt = 100 A/µs

30

55

ns

Continuous Current

Source-Drain Reverse Recovery Time

A

Notes:
a. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 %.
b. Guaranteed by design, not subject to production testing.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.

TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
6

8

TC = - 55 °C

VGS = 10 thru 6 V

5

5V

25 °C
I D - Drain Current (A)

I D - Drain Current (A)

6

4
4V

4

3

125 °C

2

2
1

3V

1 V, 2 V

0

0
0

2

4

6

8

VDS - Drain-to-Source Voltage (V)

Output Characteristics
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2

10

0

1

2

3

4

5

VGS - Gate-to-Source Voltage (V)

Transfer Characteristics
Document Number: 70835
S09-0133-Rev. D, 02-Feb-09

Si2309DS
Vishay Siliconix

1.5

500

1.2

400
C - Capacitance (pF)

R DS(on) - On-Resistance (Ω)

TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted

0.9
VGS = 4.5 V

0.6

VGS = 10 V

Ciss
300

200
Coss

0.3

100
Crss

0.0

0
0

2

4

6

8

0

6

ID - Drain Current (A)

12

24

30

VDS - Drain-to-Source Voltage (V)

On-Resistance vs. Drain Current

Capacitance

10

2.0
VDS = 30 V
ID = 1.25 A

VGS = 10 V
ID = 1.25 A

1.8

8

RDS(on) - On-Resistance
(Normalized)

VGS - Gate-to-Source Voltage (V)

18

6

4

1.6
1.4
1.2
1.0

2
0.8
0
0

1

2

3

4

5

0.6
- 50

6

0

25

50

75

100

125

Qg - Total Gate Charge (nC)

TJ - Junction Temperature (°C)

Gate Charge

On-Resistance vs. Junction Temperature

10

150

1.0

R DS(on) - On-Resistance (Ω)

I S - Source Current (A)

- 25

TJ = 150 °C
1
TJ = 25 °C

0.8

0.6
ID = 1.25 A
0.4

0.2

0.0

0.1
0

0.2

0.4

0.6

0.8

1.0

1.2

0

2

4

6

8

VSD - Source-to-Drain Voltage (V)

VGS - Gate-to-Source Voltage (V)

Source-Drain Diode Forward Voltage

On-Resistance vs. Gate-to-Source Voltage

Document Number: 70835
S09-0133-Rev. D, 02-Feb-09

10

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3

Si2309DS
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
0.6

12
ID = 250 µA

10

8
Power (W)

VGS(th) Variance (V)

0.4

0.2

0.0

6
TA = 25 °C
4

- 0.2

2

- 0.4
- 50

- 25

0

25
50
75
100
TJ - Temperature (°C)

125

0
0.01

150

0.1

10

1

100

500

Time (s)

Single Pulse Power

Threshold Voltage
100

I D - Drain Current (A)

10

10 µs
Limited
by RDS(on)*

100 µs

1
1 ms
10 ms
0.1

TA = 25 °C
Single Pulse

0.01
0.1
* VGS

100 ms
100 s, 10 s, 1 s, DC

1
10
100
VDS - Drain-to-Source Voltage (V)
minimum VGS at which RDS(on) is specified

Safe Operating Area, Junction-to-Ambient
2

Normalized Effective Transient
Thermal Impedance

1
Duty Cycle = 0.5

Notes:

0.2

PDM

0.1

0.1
t1

0.05

t2
1. Duty Cycle, D =

0.02

t1
t2

2. Per Unit Base = R thJA = 130 °C/W
3. T JM - TA = PDMZthJA(t)
4. Surface Mounted

Single Pulse
0.01
10- 4

10- 3

10- 2

10- 1
1
Square Wave Pulse Duration (s)

10

100

500

Normalized Thermal Transient Impedance, Junction-to-Ambient
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?70835.

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4

Document Number: 70835
S09-0133-Rev. D, 02-Feb-09

Package Information
Vishay Siliconix
SOT-23 (TO-236): 3-LEAD

b

3
E1
1

E

2

e

S
e1

D
0.10 mm

C

0.004"

A2

A

C

q

Gauge Plane
Seating Plane

Seating Plane
C

A1

Dim

0.25 mm

L
L1

MILLIMETERS
Min

INCHES
Max

Min

Max
0.044

A

0.89

1.12

0.035

A1

0.01

0.10

0.0004

0.004

A2

0.88

1.02

0.0346

0.040

b

0.35

0.50

0.014

0.020

c

0.085

0.18

0.003

0.007

D

2.80

3.04

0.110

0.120

E

2.10

2.64

0.083

0.104

E1

1.20

1.40

0.047

e

0.95 BSC

e1
L

1.90 BSC
0.40

L1
q

0.0748 Ref
0.60

0.016

0.64 Ref

S

0.024
0.025 Ref

0.50 Ref
3°

0.055
0.0374 Ref

0.020 Ref
8°

3°

8°

ECN: S-03946-Rev. K, 09-Jul-01
DWG: 5479

Document Number: 71196
09-Jul-01

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1

AN807
Vishay Siliconix

Mounting LITTLE FOOTR SOT-23 Power MOSFETs

Wharton McDaniel

Surface-mounted LITTLE FOOT power MOSFETs use integrated
circuit and small-signal packages which have been been modified
to provide the heat transfer capabilities required by power devices.
Leadframe materials and design, molding compounds, and die
attach materials have been changed, while the footprint of the
packages remains the same.

See Application Note 826, Recommended Minimum Pad
Patterns With Outline Drawing Access for Vishay Siliconix
MOSFETs, (http://www.vishay.com/doc?72286), for the basis
of the pad design for a LITTLE FOOT SOT-23 power MOSFET
footprint . In converting this footprint to the pad set for a power
device, designers must make two connections: an electrical
connection and a thermal connection, to draw heat away from the
package.

ambient air. This pattern uses all the available area underneath the
body for this purpose.

0.114
2.9

0.081
2.05
0.150
3.8
0.059
1.5

0.0394
1.0

0.037
0.95

FIGURE 1. Footprint With Copper Spreading

The electrical connections for the SOT-23 are very simple. Pin 1 is
the gate, pin 2 is the source, and pin 3 is the drain. As in the other
LITTLE FOOT packages, the drain pin serves the additional
function of providing the thermal connection from the package to
the PC board. The total cross section of a copper trace connected
to the drain may be adequate to carry the current required for the
application, but it may be inadequate thermally. Also, heat spreads
in a circular fashion from the heat source. In this case the drain pin
is the heat source when looking at heat spread on the PC board.

Figure 1 shows the footprint with copper spreading for the SOT-23
package. This pattern shows the starting point for utilizing the
board area available for the heat spreading copper. To create this
pattern, a plane of copper overlies the drain pin and provides
planar copper to draw heat from the drain lead and start the
process of spreading the heat so it can be dissipated into the

Document Number: 70739
26-Nov-03

Since surface-mounted packages are small, and reflow soldering
is the most common way in which these are affixed to the PC
board, “thermal” connections from the planar copper to the pads
have not been used. Even if additional planar copper area is used,
there should be no problems in the soldering process. The actual
solder connections are defined by the solder mask openings. By
combining the basic footprint with the copper plane on the drain
pins, the solder mask generation occurs automatically.

A final item to keep in mind is the width of the power traces. The
absolute minimum power trace width must be determined by the
amount of current it has to carry. For thermal reasons, this
minimum width should be at least 0.020 inches. The use of wide
traces connected to the drain plane provides a low-impedance
path for heat to move away from the device.

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1

Application Note 826
Vishay Siliconix

0.049

(1.245)

0.029

0.022
(0.559)

(0.724)

0.037
(0.950)

(2.692)

0.106

RECOMMENDED MINIMUM PADS FOR SOT-23

0.053
(1.341)
0.097
(2.459)
Recommended Minimum Pads
Dimensions in Inches/(mm)

Return to Index Return to Index

APPLICATION NOTE

Document Number: 72609
Revision: 21-Jan-08

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25

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Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that
all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU.
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requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference
to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21
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