Si9183 Datasheet. Www.s Manuals.com. Vishay

User Manual: Marking of electronic components, SMD Codes A9, A9*, A9**, A9***, A9-**, A9-***, A933AS, A9A, A9A#. Datasheets 2SA933AS, 74AHC1G09GW, AD8591ART, AD8591ARTZ, AO3409, AO3409L, ELM9709NBA, FAN54015UCX, FMA9N, RT8008-12PJ5, RT9011-CCPQV, RT9011-KMPJ6, RT9014-FMPQV, RT9198-33PU5, RT9818E-22PY, Si2309DS, Si9183DT-AD-T1, TPS3831K50DQNR, UMA9N.

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Si9183

Vishay Siliconix

Document Number: 71258

S-51147—Rev. G, 20-Jun-05

www.vishay.com

1

High-Performance, Size Saving 150-mA CMOS LDO Regulator

FEATURES

DLow 135-mV Dropout at 150-mA Load

DGuaranteed 150-mA Output Current

D300-mA Peak Output Current Capability

DUses Low ESR Ceramic Output Capacitor

DFast Load And Line Transient Response

DLow Output Noise

D1-mA Maximum Shutdown Current

DBuilt-in Short Circuit And Thermal Protection

DFixed 1.8-V, 2.5-V, 2.8-V, 2.85-V, 3.0-V, 3.3-V, 5.0-V

or Adjustable Output Voltage Options (Version B)

DThin SOT-23 5-Pin Package

APPLICATIONS

DBattery Powered Portable Systems

DCellular Phones

DPDAs, Palmtops

DPagers

DPost Regulators for Multi-Output Converters

DNotebook Computers

DESCRIPTION

The Si9183 is a high performance yet size saving 150-mA

CMOS LDO (low dropout) voltage regulator. Its ultra low

ground current and dropout voltage prolong battery life in

portable electronics. The device provides LINE/LOAD

transient response and ripple rejection superior to that of

Bipolar or BiCMOS LDO regulators. It is designed to maintain

regulation while delivering 300-mA peak current. The Si9183

drives lower cost ceramic, as well as tantalum, output

capacitors. Stability is guaranteed from maximum load current

down to 0-mA load. An external noise bypass capacitor

connected to the device’s CBP pin will reduce the LDO’s

self-noise for low noise applications. The Si9183 includes a

shutdown feature that allows users to completely disable the

device and save power when no output is required.

The Si9183, in Thin SOT23-5 packaging, is available in two

versions (Version A or B). Version A offers low noise

performance, while Version B features adjustable output

voltage.

The Si9183 is available in both standard and lead (Pb)-free

packages.

TYPICAL APPLICATIONS CIRCUITS

FIGURE 1. Version A with Low Output Noise FIGURE 2. Version B with Adjustable Output

3

2

Si9183-A

1

4

5

VIN

GND

SD

VOUT

BP

VIN

SD

VOUT

1 mF2.2 mF

Thin SOT-23, 5-Lead

3

2

Si9183-B

1

4

5

VIN

GND

SD

VOUT

FB

VIN

SD

VOUT

1 mF2.2 mF

0.1 mFON

OFF

ON

OFF Thin SOT-23, 5-Lead

Si9183

Vishay Siliconix

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2

Document Number: 71258

S-51147—Rev. G, 20-Jun-05

ABSOLUTE MAXIMUM RATINGS

Input Voltage, VIN 6.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

SD Input Voltage, VSD −0.3 V to VIN

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output Current, IOUT Short Circuit Protected. . . . . . . . . . . . . . . . . . . . . . . . . .

Output Voltage, VOUT −0.3 V to VO(nom) + 0.3 V. . . . . . . . . . . . . . . . . . . . . . . .

Maximum Junction Temperature, TJ(max) 150_C. . . . . . . . . . . . . . . . . . . . . . .

Storage Temperature, TSTG −65_C to 125_C. . . . . . . . . . . . . . . . . . . . . . . . . .

ESD (Human Body Model) 2 kV. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Power Dissipation (Package)a, b

5-Pin SOT-23 555 mW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Thermal Impedance (QJA)

5-Pin SOT-23 180 _C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Notes

a. Device mounted with all leads soldered or welded to multi-layer (1S2P)

JEDEC board, horizontal orientation.

b. Derate 5.5 mW/_C above TA = 25_C.

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation

of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating

conditions for extended periods may affect device reliability.

RECOMMENDED OPERATING RANGE

Input Voltage, VIN 2 V to 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output Voltage, VOUT (Adjustable Version) 1.5 V to 5 V. . . . . . . . . . . . . . . . . .

SD Input Voltage, VSD 0 V to VIN

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating Ambient Temperature, TA−40_C to 85_C. . . . . . . . . . . . . . . . . . . .

Operating Junction Temperature, TJ−40_C to 125_C. . . . . . . . . . . . . . . . . . .

CIN = 1 mF, COUT = 2.2 mF (ceramic, X5R or X7R type) , CBP = 0.1 mF (ceramic)

COUTRange = 1 mF to 10 mF ("20% tolerance, "20% over temperature; ESR = 0.4 to 4 W at dc to 100 kHz, 0 t0 0.4 W > 100 kHz) )

SPECIFICATIONS (TA = 25_C)

Test Conditions

Unless Otherwise Specified

V V 1 V I 1 A

Limits

−40 to 85_C

Parameter Symbol

VIN = VOUT(nom) + 1 V, IOUT = 1 mA

CIN = 1 mF, C OUT = 2.2 mF, VSD = 1.5 V TempaMinbTypcMaxbUnit

Input Voltage Range VIN Full 2 6

V

Output Voltage Range Adjustable Version Full 1.5 5 V

Out

p

ut Volta

g

e Accurac

y

VOUT

1 mA v IOUT v 150 mA

Room −1.5 1.5

% VO( )

Output Voltage Accuracy

(Fixed Versions)

OUT

1 mA v IOUT v 150 mA Full −2.5 2.5 % VO(nom)

Feedback Voltage (ADJ version)

VFB

Room 1.188 1.215 1.240

V

Feedback Voltage (ADJ version) VFB Full 1.176 1.252 V

Line Regulation

(Except 5-V Version)

DVOUT 100

From VIN = VOUT(nom) + 1 V

to VOUT(nom) + 2 V Full −0.18 0.18

Line Regulation (5-V Version)

DV

OUT

100

V

IN

V

OUT(nom)

From VIN = 5.5 V to 6 V Full −0.18 0.18 %/V

Line Regulation (ADJ Version)

V

IN

V

OUT(nom)

VOUT = 1.5 V, From VIN = 2.5 V to 3.5 V Full −0.18 0.18

%/V

Line Regulation (ADJ Version) VOUT = 5 V, From VIN = 5.5 V to 6 V Full −0.18 0.18

d

IOUT = 10 mA Room 1 20

Dropout Voltaged

@

V

OUT

w 2.5 V

)

VIN − VOUT

IOUT = 150 mA

Room 135 170

@V

OUT

w 2

.

5 V)

IN OUT

IOUT = 150 mA Full 180 220 mV

Dro

p

out Volta

g

ed

VIN VOUT

IOUT = 150 mA

Room 235 320

Dropout Voltaged

(@VOUT t 2.5 V, VIN w 2 V) VIN − VOUT IOUT = 150 mA Full 380

IOUT = 0 mA Room 150

Ground Pin Current IGND

IOUT = 150 mA

Room 500 mA

GND

IOUT = 150 mA Full 900

m

Shutdown Supply Current IIN(off) VSD = 0 V Full 0.1 1 mA

FB Pin Current IFB VFB = 1.2 V Room 2 100 nA

Peak Output Current IO(peak) VOUT w 0.95 x VOUT(nom), tpw = 2 ms Room 250 300 mA

Output Noise Voltage

eN

BW = 50 Hz to 100 kHz w/o CBP Room 300

mV (rms)

Output Noise Voltage eN

BW = 50 Hz to 100 kHz

IOUT = 150 mA CBP = 0.1 mF Room 100 mV (rms)

Si9183

Vishay Siliconix

Document Number: 71258

S-51147—Rev. G, 20-Jun-05

www.vishay.com

3

SPECIFICATIONS (TA = 25_C)

Limits

−40 to 85_C

Test Conditions

Unless Otherwise Specified

VIN = VOUT(nom) + 1 V, IOUT = 1 mA

CIN = 1 mF, C OUT = 2.2 mF, VSD = 1.5 V

Parameter UnitMaxb

Typc

Minb

Tempa

Test Conditions

Unless Otherwise Specified

VIN = VOUT(nom) + 1 V, IOUT = 1 mA

CIN = 1 mF, C OUT = 2.2 mF, VSD = 1.5 V

Symbol

f = 1 kHz Room 60

Ripple Rejection DVOUT/DVIN IOUT = 150 mA f = 10 kHz Room 40 dB

pp j

OUT IN

OUT

f = 100 kHz Room 30

Dynamic Line Regulation DVO(line) VIN : VOUT(nom) + 1 V to VOUT(nom) + 2 V

tR/tF = 5 ms, IOUT = 150 mA Room 10

mV

Dynamic Load Regulation DVO(load) IOUT : 1 mA to 150 mA, tR/tF = 2 ms Room 30

mV

VOUT Turn On Time

tON

VIN = 4.3 V w/o CBP Cap Room 5

ms

VOUT Turn-On-Time tON

VIN = 4

.

3 V

VOUT = 3.3 V CBP = 0.1 mF Room 1000 ms

Thermal Shutdown

Thermal Shutdown Junction Temp tJ(s/d) Room 165

_

C

Thermal Hysteresis tHYST Room 20

_C

Short Circuit Current ISC VOUT = 0 V Room 400 mA

Shutdown Input

SD Input Voltage

VIH High = Regulator ON (Rising) Full 1.2 VIN

V

SD Input Voltage VIL Low = Regulator OFF (Falling) Full 0.4 V

SD Input Currente

IIL VSD = 0 V, Regulator OFF Room 0.01

mA

SD Input Currente

IIH VSD = 6 V, Regulator ON Room 1.0 mA

Shutdown Hysteresis VHYST Full 100 mV

Notes

a. Room = 25_C, Full = −40 to 85_C.

b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.

c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Typical values for dropout voltage at VOUT w 2 V are measured at

VOUT = 2.5 V, while typical values for dropout voltage at VOUT < 2 V are measured at VOUT = 1.8 V.

d. Dropout voltage is defined as the input to output differential voltage at which the output voltage drops 2% below the output voltage measured with a 1-V

differential, provided that VIN does not not drop below 2.0 V.

e. The device’s shutdown pin includes a typical 6-MW internal pull-down resistor connected to ground.

f. VOUT is defined as the output voltage of the DUT at 1 mA.

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Vishay Siliconix

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4

Document Number: 71258

S-51147—Rev. G, 20-Jun-05

TIMING WAVEFORMS

VIN

0.95 VNOM

VOUT

VOUT

VNOM

FIGURE 3. Timing Diagram for Power-Up

tON

PIN CONFIGURATION

3

2

Thin SOT-23, 5-Pin

1

4

5

VIN

GND

SD

VOUT

BP (Version A)

FB (Version B)

PIN DESCRIPTION

Pin Number Name Function

1 VIN Input supply pin. Bypass this pin with a 1-mF ceramic or tantalum capacitor to ground.

2 GND Ground pin. Local ground for CBP and COUT

.

3 SD By applying less than 0.4 V to this pin, the device will be turned off. Connect this pin to VIN if unused.

4 (Version A) BP Noise bypass pin. For low noise applications, a 0.1-mF or larger ceramic capacitor should be connected from this pin to

ground.

4 (Version B) FB Connect to divided output voltage to adjust the regulation point.

5 VOUT Output voltage. Connect COUT between this pin and ground.

Si9183

Vishay Siliconix

Document Number: 71258

S-51147—Rev. G, 20-Jun-05

www.vishay.com

5

ORDERING INFORMATION

Part Number

Lead (Pb)-Free

Part Number Marking Voltage Temperature Range Package

Si9183DT-18-T1 Si9183DT-18-T1—E3 A2LL 1.8 V

Si9183DT-25-T1 Si9183DT-25-T1—E3 A4LL 2.5 V

Si9183DT-28-T1 Si9183DT-28-T1—E3 A5LL 2.8 V

Si9183DT-285-T1 Si9183DT-285-T1—E3 B3LL 2.85 V

40 to 85

_

C

Thin

Si9183DT-30-T1 Si9183DT-30-T1—E3 A6LL 3.0 V −40 to 85_C

Thin

SOT23-5

Si9183DT-33-T1 Si9183DT-33-T1—E3 A7LL 3.3 V

Si9183DT-50-T1 Si9183DT-50-T1—E3 A8LL 5.0 V

Si9183DT-AD-T1 Si9183DT-AD-T1—E3 A9LL Adjustable

NOTE: LL = Lot Code

Eval Kit Temperature Range Board Type

Si9183DB −40 to 85_CSurface Mount

TYPICAL CHARACTERISTICS (INTERNALLY REGULATED, 25_C UNLESS NOTED)

0

50

100

150

200

250

300

0 60 120 180 240 300

Dropout Voltage vs. Load Current

ILOAD (mA)

(mV)VDROP

0

25

50

75

100

125

150

175

200

225

250

275

300

325

350

375

−50 −25 0 25 50 75 100 125 150

Dropout Voltage vs. Temperature

0.0

0.5

1.0

1.5

2.0

2.5

0123456

VIN − VOUT Transfer Characteristic

VIN (V)

(V)VOUT

Junction Temperature (_C)

0

100

200

300

400

500

1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0

Dropout Voltage vs. VOUT

Dropout Voltage (mV)

VOUT

(mV)VDROP

IOUT = 0 mA

IOUT = 150 mA

IOUT = 10 mA

IOUT = 75 mA

VOUT = 2.5 V

VOUT = 2.5 V

IOUT = 10 mA

IOUT = 75 mA

IOUT = 150 mA

IOUT = 300 mA

IOUT = 300 mA

RLOAD = 16.6 W

RLOAD = 250 W

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Document Number: 71258

S-51147—Rev. G, 20-Jun-05

TYPICAL CHARACTERISTICS (INTERNALLY REGULATED, 25_C UNLESS NOTED)

−1.2

−1.0

−0.8

−0.6

−0.4

−0.2

−0.0

−40 −15 10 35 60 85

Normalized VOUT vs. Temperature

Ambient Temperature (_C)

(%)VOUT

0

50

100

150

200

250

300

23456

No Load GND Pin Current vs. Input Voltage

(I GND mA)

Input Voltage (V)

IOUT = 0 mA

IOUT = 150 mA IOUT = 75 mA

−40_C

85_C

0

100

200

300

400

500

0 25 50 75 100 125 150

GND Current vs. Load Current

(I GND mA)

Load Current (mA)

0.4

0.5

0.6

0.7

0.8

0.9

1.0

1.1

1.2

1.3

1.4

1.5

−40 −15 10 35 60 85

Shutdown Threshold vs. Temperature

(V)VIL

Ambient Temperature

Shutdown Pin Input Current vs. Temperature

Ambient Temperature

−0.75

−0.60

−0.45

−0.30

−0.15

0.00

0.15

0.30

0 25 50 75 100 125 150

Normalized Output Voltage vs. Load Current

Output Voltage (%)

Load Current (mA)

VIN = VOUT(nom) + 1 V

VOUT = 2.5 V

VIN = 3.5 V

VIN = VOUT(nom) + 1 V

0.5

0.6

0.7

0.8

0.9

1.0

1.1

1.2

1.3

1.4

1.5

−40 −15 10 35 60 85

−40_C

85_C

VOUT = 2.5 V

VSD = 6.5 V

VOUT = 2.5 V

VIH

VIL

, VIH

IIH

Si9183

Vishay Siliconix

Document Number: 71258

S-51147—Rev. G, 20-Jun-05

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TYPICAL CHARACTERISTICS (INTERNALLY REGULATED, 25_C UNLESS NOTED)

−80

−60

−40

−20

0

Power Supply Rejection

Frequency (Hz)

Gain (dB)

CIN = 1 mF

COUT = 2.2 mF

ILOAD = 150 mA

0.25

0.35

0.45

0.55

0.65

0.75

−40 −15 10 35 60 85

ISC vs. Temperature

Ambient Temperature

VOUT = 2.5 V

10 100 1 K 10 K 100 K 1 M

(A)I SC

TYPICAL WAVEFORMS

VIN = 4.2 V

VOUT = 3.3 V

CBP = 0.1 mF

ILOAD = 350 mA

Turn-On Delay

10.00 ms/div 5.00 ms/div

Output Noise

VIN = 4 V

VOUT = 3 V

IOUT = 150 mA

CIN = 1 mF

COUT = 2.2 mF

CBP = 0.1 mF

BW = 10 Hz to 1 MHz

Noise Spectrum

VIN = 4 V

VOUT = 3

IOUT = 150 mA

CIN = 1 mF

COUT = 2.2 mF

CBP = 0.1 mF

100 Hz

VOUT 2 V/div

VIN = 4.2 V

VOUT = 3.3 V

CBP = 0.1 mF

ILOAD = 350 mA

Turn-Off Delay

SD 2 V/div

VOUT 2 V/div

1 ms/div

mVńHz

Ǹ

1 MHz

10.0

0.01

SD 2 V/div

100 mV/div

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Document Number: 71258

S-51147—Rev. G, 20-Jun-05

TYPICAL WAVEFORMS

Load Transient Response-1 Load Transient Response-2

M 5.00 msM 5.00 ms

Load Transient Response-3 Load Transient Response-4

M 5.00 msM 5.00 ms

VOUT

10 mV/div

VOUT

10 mV/div

ILOAD

100 mA/div

ILOAD

100 mA/div

VOUT

10 mV/div

ILOAD

100 mA/div

VOUT

10 mV/div

ILOAD

100 mA/div

M 20.0 msM 20.0 ms

VOUT

10 mV/div VOUT

10 mV/div

VIN

1 V/div VIN

1 V/div

VOUT = 3.0 V

COUT = 2.2 mF

ILOAD = 1 to 150 mA

trise = 2 msec

VOUT = 3.0 V

COUT = 2.2 mF

ILOAD = 150 to 1 mA

tfall = 2 msec

VOUT = 3.0 V

COUT = 1.0 mF

ILOAD = 1 to 150 mA

trise = 2 msec

VOUT = 3.0 V

COUT = 1.0 mF

ILOAD = 150 to 1 mA

tfall = 2 msec

VOUT = 3.0 V

ILOAD = 150 mA

VIN = 4 to 5 V

COUT = 2.2 mF

trise = 5 msec

VOUT = 3.0 V

ILOAD = 150 mA

VIN = 5 to 4 V

COUT = 2.2 mF

tfall = 5 msec

Line Transient Response-1 Line Transient Response-2

Si9183

Vishay Siliconix

Document Number: 71258

S-51147—Rev. G, 20-Jun-05

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9

BLOCK DIAGRAMS

CIN

1.0 mF

VIN

1

SD

3

ON

OFF

2

GND

RFB2

RFB1

−

+

1.215 V

VREF

−

4BP

+

5

COUT

2.2 mF

VOUT

FIGURE 4. 150-mA CMOS LDO Regulator (Fixed Output)

6 MW

CIN

1.0 mF

VIN

1

4

SD

3

ON

OFF

2

GND

FB

−

+

1.215 V

VREF

−

+

5

COUT

2.2 mF

VOUT

FIGURE 5. 150-mA CMOS LDO Regulator (Adjustable Output)

6 MW

R2

R1

VFB

Switches shown for device in normal operating mode (SD = HIGH)

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Vishay Siliconix

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Document Number: 71258

S-51147—Rev. G, 20-Jun-05

DETAILED DESCRIPTION

The Si9183 is a low drop out, low quiescent current, linear

regulator family with very fast transient response. It is primarily

designed for battery powered applications where battery run

time is at a premium. The low quiescent current allows

extended standby time while low drop out voltage enables the

system to fully utilize battery power before recharge. The

Si9183 is a very fast regulator with bandwidth exceeding

50 kHz while maintaining low quiescent current at light load

conditions. With this bandwidth, the Si9183 is one of the

fastest LDO available today. The Si9183 is stable with one of

any output capacitor types from 1 mF to 10.0 mF. However,

X5R or X7R ceramic capacitors are recommended for best

output noise and transient performance.

VIN

VIN is the input supply pin. The bypass capacitor for this pin

is not critical as long as the input supply has low enough source

impedance. For practical circuits, a 1.0-mF or larger ceramic

capacitor is recommended. When the source impedance is

not low enough and/or the source is several inches from the

Si9183, then a larger input bypass capacitor is needed. It is

required that the equivalent impedance (source impedance,

wire, and trace impedance in parallel with input bypass

capacitor impedance) must be smaller than the input

impedance of the Si9183 for stable operation. When the

source impedance, wire, and trace impedance are unknown,

it is recommended that an input bypass capacitor be used of

a value that is equal to or greater than the output capacitor.

VOUT

VOUT is the output voltage of the regulator. Connect a bypass

capacitor from VOUT to ground. The output capacitor can be

any value from 1.0 mF to 10.0 mF. A ceramic capacitor with

X5R or X7R dielectric type is recommended for best output

noise, line transient, and load transient performance.

GND

Ground is the common ground connection for VIN and VOUT

.

It is also the local ground connection for CBP

, ADJ, and SD.

ADJ

For the adjustable output version, use a resistor divider R1 and

R2, connect R1 from VOUT to ADJ and R2 from ADJ to ground.

R2 should be in the 25-kW to 150-kW range for low power

consumption, while maintaining adequate noise immunity.

The formula below calculates the value of R1, given the

desired output voltage and the R2 value,

(1)

R1 +ǒVOUT *VADJǓR2

VADJ

VADJ is nominally 1.215 V.

SHUTDOWN (SD)

SD controls the turning on and off of the Si9183. VOUT is

guaranteed to be on when the SD pin voltage equals or is

greater than 1.2 V. VOUT is guaranteed to be off when theSD

pin voltage equals or is less than 0.4 V. During shutdown

mode, the Si9183 will draw less than 1-mA current from the

source. To automatically turn on VOUT whenever the input is

applied, tie the SD pin to VIN.

CBP

For low noise application, connect a high frequency ceramic

capacitor from CBP to ground. A 0.01-mF or a 0.1-mF X5R or

X7R is recommended.

Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and

Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see

http://www.vishay.com/ppg?71258.

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