Wistron LLW 1/LGG 1 Schematics. Www.s Manuals.com. 1, Lgg Rsb Schematics
User Manual: Motherboard Wistron LLW-1/LGG-1 - Schematics. Free.
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Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
Cover Page
A3
1 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
Cover Page
A3
1 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
Cover Page
A3
1 94
Tuesday, November 09, 2010
<Core Design>
Cougar Point
2010-11-08
REV : SB
LLW-1/LGG-1 Schematics
Sandy Bridge
DY:None Installed
UMA:UMA platform installed only
PX:Discrete(both Robson and Whistler) SKU installed
RBS:Robson SKU installed only
WTL:Whistler SKU installed only
SAMSUNG:Use SAMSUNG VRAM
Hynix:Use Hynix VRAM
VRAM_1G:Use 1G VRAM
VRAM_2G:Use 2G VRAM
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Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
Block Diagram
A3
2 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
Block Diagram
A3
2 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
Block Diagram
A3
2 94Tuesday, November 09, 2010
<Core Design>
LLW-1 / LGG-1 Block Diagram
Project Code:
PCB(Raw Card):10282
PCB Layer Stackup
XDP
Conn.
11
ThermalSensor
EMC2103
28
SATA Port5
Azalia bus
Int.KB/Track point
69
USB 2.0
USB 2.0
LVDS
VGA connector50
14" HD
1366*768
49
CH8
PCI Express 2
17~25
Intel
PCH
USB 2.0 (14 ports)
AC97 2.3/Azalia Interface
ACPI 2.0
INT. RTC
LPC I/F
PCI Rev 2.3
4~10
Intel CPU
Sandy Bridge
DDR3 1333MHz
DMI x4
Serial ATA 150MB/s
PCI Express
G-Sensor
79
27
Nuvoton NPCE795
KBC
LPC Bus / 33MHz
LPC Debug
Board Conn
71
56
SATA CONN
UNBUFFERED
DDR3 SODIMM
DDR3 1333
Channel A
VGA Port 204-PIN DDR3 SODIMM
14
15
Channel B
DDR3 1333
65
WLAN Card
Mini PCI-E
USB 2.0 CH11
PCI Express 4
Media Card Reader
CH9
Camera
CH3
FingerPrint
CH2
Bluetooth
CH1
49
SATA Port 0
HD AUDIO CODEC
CX20671
29
69
63
UNBUFFERED
DDR3 SODIMM
80
I2C/SM Bus Switch
SM Bus
AUDIO
COMBO Jack
58
USB 2.0
FDI
eSATA Combo CN
eSATA
57
CH12
USB 2.0
USB 2.0
PORT2
PORT1
PORT3
61
61
SATA
USB 2.0 CH4
Mini PCI-E
WWAN Card
66
SIM
Slot
L2: GND
L4: Signal
L1: TOP L5: VCC
L3: Signal L6: Signal
60
SPI FLASH
HDMI connector
51
Display Port
RFID
Touch Pad
0D75V
3D3V_S5
VCCSA
RT8208B
48
0D85V_S0
TPS51218
PWR_VCCSA_DCBATOUT
PWR_1D5V_DCBATOUT 1D5V_S3
RT8015
1D5V_S3
46
GFX CORE
RT8208B
92
PWR_DCBATOUT_VGA_COREVGA_CORE
42~44
45
46
1D8V_S0
47
1D8V_S0
System DC/DC
PWR_3D3V_DCBATOUT
OUTPUTSINPUTS
BD95280
5V_S5
3D3V_S5
Battery Charger/Selector
BQ24745
DCBATOUT BT+
DCBATOUT
NCP6131
CPU DC/DC
VCC_CORE
40
41
1D05V_VTT
PWR_1D05V_DCBATOUT
1D5V_S3
1D05V_VTT
DDR_VREF_S3
RT9026
TPS51218
LOM
32
PCI Express 3
RJ45
NEW CARD
R5U220
RTL8111E
SATA Port 4
56
ODD CONN
PCI Express 2
USB 2.0 CH13
PCI Express 8PCI Express 8
USB 2.0 CH13
USB 2.0 CH10 USB 2.0 CH10
USB 2.0 PORT4
CONNCONN
82
82
L7: GND
L8: BOTTOM
PWR_5V_DCBATOUT
DCBATOUT_VCC_GFXCOREVCC_GFXCORE
0D75V_S0
93
RT9025
1V_VGA
1V_VGA_S01D5V_S3
93
3D3V_S5 1D8V_VGA_S0
1D8V_VGA
RT9025
66
PEG x16
Whistler-LP 1G/2G
Seymour-XT 1G
2GB/1GB
VRAM
##OnMainBoard
AMD GPU
83~87
88~91
DDR3
800MHz
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E
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1 1
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
Table of Content
A3
3 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
Table of Content
A3
3 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
Table of Content
A3
3 94Tuesday, November 09, 2010
<Core Design>
PCIE Routing
LANE2
LANE3
LAN
MiniCard WLANLANE4
CARD READER
SATA Table
Pair
SATA
Device
0
5
4
3
2
1
HDD
ODD
N/A
ESATA
N/A
LANE1
LANE5
LANE6
LANE7
LANE8 NEW CARD
RESERVED
CFG[6:5]
CFG[7]
Processor Strapping
CFG[2]
Disabled - No Physical Display Port attached to
Embedded DisplayPort.
CFG[4]
Pin Name Strap Description Configuration (Default value for each bit is
1 unless specified otherwise)
1:
Huron River Schematic Checklist Rev.0_7
0:
PCI-Express Static
Lane Reversal
Normal Operation.
Lane Numbers Reversed 15 -> 0, 14 -> 1, ...
Default
Value
PCI-Express
Port Bifurcation
Straps
11 : x16 - Device 1 functions 1 and 2 disabled
10 : x8, x8 - Device 1 function 1 enabled ;
function 2 disabled
01 : Reserved - (Device 1 function 1 disabled ;
function 2 enabled)
00 : x8, x4, x4 - Device 1 functions 1 and 2
enabled
PEG DEFER TRAINING
1
0
1
1:
0: Enabled - An external Display Port device is
connectd to the EMBEDDED display Port
11
1:
0:
PEG Train immediately following xxRESETB de assertion
PEG Wait for BIOS for training
SPKR
Name Schematics Notes
HAD_DOCK_EN#
/GPIO[33]
HDA_SDO Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#.
HDA_SYNC
Huron River Schematic Checklist Rev.0_7
INIT3_3V# Weak internal pull-up. Leave as "No Connect".
GNT3#/GPIO55
GNT2#/GPIO53
GNT1#/GPIO51
Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#.
GPIO8 on PCH is the Integrated Clock Enable strap and is required to be pulled-down
using a 1k +/- 5% resistor. When this signal is sampled high at the rising edge of
RSMRST#, Integrated Clocking is enabled, When sampled low, Buffer Through Mode is
enabled.
PCH Strapping
SPI_MOSI
Internal weak Pull-down.
Connect to Vcc3_3 with 8.2-kΩ
- 10-kΩ weak pull-up resistor.
NV_ALE
Enable Danbury:
Disable Danbury:
NC_CLE DMI termination voltage. Weak internal pull-up. Do not pull low.
GPIO15
GPIO8
Reboot option at power-up
Default Mode:
No Reboot Mode with TCO Disabled:
Connect to Vcc3_3 with 8.2-k? weak pull-up resistor.
Left floating, no pull-down required.
Connect to +NVRAM_VCCQ with 8.2-kohm
weak pull-up resistor [CRB has it pulled up
with 1-kohm no-stuff resistor]
Leave floating (internal pull-down)
Low (0) - Flash Descriptor Security will be overridden. Also,
when this signals is sampled on the rising edge of PWROK
then it will also disable Intel ME and its features.
High (1) - Security measure defined in the Flash Descriptor will be enabled.
Platform design should provide appropriate pull-up or pull-down depending on
the desired settings. If a jumper option is used to tie this signal to GND as
required by the functional strap, the signal should be pulled low through a weak
pull-down in order to avoid asserting HDA_DOCK_EN# inadvertently.
Note: CRB recommends 1-kohm pull-down for FD Override. There is an internal
pull-up of 20 kohm for DA_DOCK_EN# which is only enabled at boot/reset for
strapping functions.
GPIO27
Default = Do not connect (floating)
High(1) = Enables the internal VccVRM to have a clean supply for
analog rails. No need to use on-board filter circuit.
Low (0) = Disables the VccVRM. Need to use on-board filter
circuits for analog rails.
Voltage Rails
VOLTAGE DESCRIPTION
ACTIVE IN
POWER PLANE
CPU Core Rail
Graphics Core Rail
AC Brick Mode only
Legacy WOL
Powered by Li Coin Cell in G3
and +V3ALW in Sx
3D3V_AUX_KBC
3.3V
DSW, Sx ON for supporting Deep Sleep states
S0
S3
All S states
WOL_EN
G3, Sx
5V_S0
3D3V_S0
1D8V_S0
1D5V_S0
1D05V_VTT
0D85V_S0
0D75V_S0
VCC_CORE
VCC_GFXCORE
1D8V_VGA_S0
3D3V_VGA_S0
1V_VGA_S0
5V
3.3V
1.8V
1.5V
1.05V
0.95 - 0.85V
0.75V
0.35V to 1.5V
0.4 to 1.25V
1.8V
3.3V
1V
5V
1.5V
0.75V
5V_USBX_S3
1D5V_S3
DDR_VREF_S3
BT+
DCBATOUT
5V_S5
5V_AUX_S5
3D3V_S5
3D3V_AUX_S5
6V-14.1V
6V-14.1V
5V
5V
3.3V
3.3V
3.3V3D3V_LAN_S5
3.3V
3D3V_AUX_S5
GNT[3:0]# functionality is not available on Mobile.
Mobile: Used as GPIO only
Pull-up resistors are not required on these signals.
If pull-ups are used, they should be tied to the Vcc3_3power rail.
Enable Danbury:
Disable Danbury:
Low (1) - Intel ME Crypto Transport Layer Security (TLS) cipher suite with no
confidentiality High (1) - Intel ME Crypto Transport Layer Security (TLS) cipher
suite with confidentiality
Note : This is an un-muxed signal.
This signal has a weak internal pull-down of 20 kohm which is enabled when PWROK is low.
Sampled at rising edge of RSMRST#.
CRB has a 1-kohm pull-up on this signal to +3.3VA rail.
KBC_SDA1/KBC_SCL1
KBC_SDA2/KBC_SCL2
KBC_SDA2/KBC_SCL2
KBC_SDA2/KBC_SCL2
KBC_SDA2/KBC_SCL2
PCH_SMBDATA/PCH_SMBCLK
PCH_SMBDATA/PCH_SMBCLK
PCH_SMBDATA/PCH_SMBCLK
PCH_SMBDATA/PCH_SMBCLK
Device
I C / SMBus Addresses
2
EC SMBus 1
Battery
Capacity Board
EC SMBus 2
PCH
MXM
LCD
Thermal Sensor
PCH SMBus
CK505 Clock Generator
SO-DIMMA (SPD)
SO-DIMMB (SPD)
Digital Pot
KBC_SDA1/KBC_SCL1
SMBus ADDRESSES
HURON RIVER ORB
Address Hex Bus Ref Des
USB Table
RESERVED
RESERVED
13
12
X
X
USB2
11
0
10
4
Pair Device
1
3
2
5
9
8
7
6
X
BLUETOOTH
FINGERPRINT
Mini Card2 (WWAN)
USB Ext. port 4
USB1
New Card
Mini Card1 (WLAN)
ESATA1
CAMERA
X
mSATA
RESERVED
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5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PEG_C_TXN3
PEG_C_TXN15
PEG_C_TXN10
PEG_C_TXN5
PEG_C_TXN0
PEG_C_TXN12
PEG_C_TXN7
PEG_C_TXN2
PEG_C_TXN14
PEG_C_TXN9
PEG_C_TXN4
PEG_C_TXN11
PEG_C_TXN6
PEG_C_TXN1
PEG_C_TXN13
PEG_C_TXN8
PEG_IRCOMP_R
PEG_RXN5
PEG_RXN4
PEG_RXN3
PEG_RXN2
PEG_RXN1
PEG_RXP5
PEG_RXN0
PEG_RXP4
PEG_RXP3
PEG_RXP2
PEG_RXP1
PEG_RXN[0..15]
PEG_RXP0
PEG_RXP15
PEG_RXN15
PEG_RXN14
PEG_RXP14
PEG_RXP13
PEG_RXP12
PEG_RXN13
PEG_RXN12
PEG_RXP11
PEG_RXN11
PEG_RXP10
PEG_RXN10
PEG_RXP9
PEG_RXN9
PEG_RXP8
PEG_RXN8
PEG_RXP7
PEG_RXP[0..15]
PEG_RXP6
PEG_RXN7
PEG_RXN6
PEG_C_TXP3
PEG_C_TXP15
PEG_C_TXP10
PEG_C_TXP5
PEG_C_TXP0
PEG_C_TXP12
PEG_C_TXP7
PEG_C_TXP2
PEG_C_TXP14
PEG_C_TXP9
PEG_C_TXP4
PEG_C_TXP11
PEG_C_TXP6
PEG_C_TXP1
PEG_C_TXP13
PEG_C_TXP8
PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15
PEG_TXP15
PEG_TXP14
PEG_TXP13
PEG_TXP12
PEG_TXP11
PEG_TXP10
PEG_TXP9
PEG_TXP8
PEG_TXP7
PEG_TXP6
PEG_TXP5
PEG_TXP4
PEG_TXP3
PEG_TXP2
PEG_TXP1
PEG_TXP0
DP_COMP
eDP_HPD
FDI_TXP4
FDI_TXP5
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
FDI_TXP6
FDI_TXP7
FDI_TXN0
FDI_TXN1
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXN7
FDI_TXN2
FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP3
1D05V_VTT
1D05V_VTT
PEG_TXN[0..15] 83
PEG_RXP[0..15] 83
PEG_RXN[0..15] 83
FDI_TXN[7:0]19
FDI_TXP[7:0]19
FDI_FSYNC019 FDI_FSYNC119
FDI_INT19
FDI_LSYNC019 FDI_LSYNC119
DMI_RXP[3..0]19
DMI_RXN[3..0]19
DMI_TXN[3..0]19
DMI_TXP[3..0]19
PEG_TXP[0..15] 83
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
CPU (PCIE/DMI/FDI)
A3
4 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
CPU (PCIE/DMI/FDI)
A3
4 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
CPU (PCIE/DMI/FDI)
A3
4 94
Tuesday, November 09, 2010
<Core Design>
SSID = CPU
NOTE.
If PEG is not implemented, the RX&TX pairs can be left as No Connect
NOTE.
Processor strap CFG[4] should be pulled low to enable Embedded DisplayPort.
PEG Static Lane Reversal
Signal Routing Guideline:
PEG_ICOMPO keep W/S=12/15 mils and routing length less than 500 mils.
PEG_ICOMPI & PEG_RCOMPO keep W/S=4/15 mils and routing length less than 500 mils.
Note:
Intel DMI supports both Lane
Reversal and polarity inversion
but only at PCH side. This is
enabled via a soft strap.
Note:
Lane reversal does not apply to
FDI sideband signals.
Note:
Intel FDI supports both Lane
Reversal and polarity inversion
but only at PCH side. This is
enabled via a soft strap.
Signal Routing Guideline:
EDP_ICOMPO keep W/S=12/15 mils and routing
length less than 500 mils.
EDP_COMPIO keep W/S=4/15 mils and routing
length less than 500 mils.
N/A 62.10055.421
62.10040.771
FOXCONN
TYCO
Description Lenovo P/N Wistron P/N
N/A2-2013620-3
PZ98827-364B-41F
Supplier
Table 4.1- Central Processing Unit slot multi-source
1 2
C405 SCD1U6D3V1KX-GP
PX
C405 SCD1U6D3V1KX-GP
PX
1 2
C431 SCD1U6D3V1KX-GP
PX
C431 SCD1U6D3V1KX-GP
PX
1 2
C420 SCD1U6D3V1KX-GP
PX
C420 SCD1U6D3V1KX-GP
PX
1 2
C417 SCD1U6D3V1KX-GP
PX
C417 SCD1U6D3V1KX-GP
PX
1 2
C406 SCD1U6D3V1KX-GP
PX
C406 SCD1U6D3V1KX-GP
PX
1 2
C401 SCD1U6D3V1KX-GP
PX
C401 SCD1U6D3V1KX-GP
PX
1 2
R401 24D9R2F-L-GPR401 24D9R2F-L-GP
1 2
C432 SCD1U6D3V1KX-GP
PX
C432 SCD1U6D3V1KX-GP
PX
1 2
C421 SCD1U6D3V1KX-GP
PX
C421 SCD1U6D3V1KX-GP
PX
1 2
C407 SCD1U6D3V1KX-GP
PX
C407 SCD1U6D3V1KX-GP
PX
1 2
C422 SCD1U6D3V1KX-GP
PX
C422 SCD1U6D3V1KX-GP
PX
1 2
C408 SCD1U6D3V1KX-GP
PX
C408 SCD1U6D3V1KX-GP
PX
1 2
C423 SCD1U6D3V1KX-GP
PX
C423 SCD1U6D3V1KX-GP
PX
1 2
C409 SCD1U6D3V1KX-GP
PX
C409 SCD1U6D3V1KX-GP
PX
1 2
C424 SCD1U6D3V1KX-GP
PX
C424 SCD1U6D3V1KX-GP
PX
1 2
C402 SCD1U6D3V1KX-GP
PX
C402 SCD1U6D3V1KX-GP
PX
1 2
C410 SCD1U6D3V1KX-GP
PX
C410 SCD1U6D3V1KX-GP
PX
1 2
C425 SCD1U6D3V1KX-GP
PX
C425 SCD1U6D3V1KX-GP
PX
1 2
R403 10KR2J-3-GP
DY
R403 10KR2J-3-GP
DY
DMI_RX#0
B27
DMI_RX#1
B25
DMI_RX#2
A25
DMI_RX#3
B24
DMI_RX0
B28
DMI_RX1
B26
DMI_RX2
A24
DMI_RX3
B23
DMI_TX#0
G21
DMI_TX#1
E22
DMI_TX#2
F21
DMI_TX#3
D21
DMI_TX0
G22
DMI_TX1
D22
DMI_TX3
C21 DMI_TX2
F20
FDI0_TX#0
A21
FDI0_TX#1
H19
FDI0_TX#2
E19
FDI0_TX#3
F18
FDI1_TX#0
B21
FDI1_TX#1
C20
FDI1_TX#2
D18
FDI1_TX#3
E17
FDI0_TX0
A22
FDI0_TX1
G19
FDI0_TX2
E20
FDI0_TX3
G18
FDI1_TX0
B20
FDI1_TX1
C19
FDI1_TX2
D19
FDI1_TX3
F17
FDI0_FSYNC
J18
FDI1_FSYNC
J17
FDI_INT
H20
FDI0_LSYNC
J19
FDI1_LSYNC
H17
PEG_ICOMPI J22
PEG_ICOMPO J21
PEG_RCOMPO H22
PEG_RX#0 K33
PEG_RX#1 M35
PEG_RX#2 L34
PEG_RX#3 J35
PEG_RX#4 J32
PEG_RX#5 H34
PEG_RX#6 H31
PEG_RX#7 G33
PEG_RX#8 G30
PEG_RX#9 F35
PEG_RX#10 E34
PEG_RX#11 E32
PEG_RX#12 D33
PEG_RX#13 D31
PEG_RX#14 B33
PEG_RX#15 C32
PEG_RX0 J33
PEG_RX1 L35
PEG_RX2 K34
PEG_RX3 H35
PEG_RX4 H32
PEG_RX5 G34
PEG_RX6 G31
PEG_RX7 F33
PEG_RX8 F30
PEG_RX9 E35
PEG_RX10 E33
PEG_RX11 F32
PEG_RX12 D34
PEG_RX13 E31
PEG_RX14 C33
PEG_RX15 B32
PEG_TX#0 M29
PEG_TX#1 M32
PEG_TX#2 M31
PEG_TX#3 L32
PEG_TX#4 L29
PEG_TX#5 K31
PEG_TX#6 K28
PEG_TX#7 J30
PEG_TX#8 J28
PEG_TX#9 H29
PEG_TX#10 G27
PEG_TX#11 E29
PEG_TX#12 F27
PEG_TX#13 D28
PEG_TX#14 F26
PEG_TX#15 E25
PEG_TX0 M28
PEG_TX1 M33
PEG_TX2 M30
PEG_TX3 L31
PEG_TX4 L28
PEG_TX5 K30
PEG_TX6 K27
PEG_TX7 J29
PEG_TX8 J27
PEG_TX9 H28
PEG_TX10 G28
PEG_TX11 E28
PEG_TX12 F28
PEG_TX13 D27
PEG_TX14 E26
PEG_TX15 D25
EDP_AUX
C15
EDP_AUX#
D15
EDP_TX0
C17
EDP_TX1
F16
EDP_TX2
C16
EDP_TX3
G15
EDP_TX#0
C18
EDP_TX#1
E16
EDP_TX#2
D16
EDP_TX#3
F15
EDP_COMPIO
A18
EDP_HPD
B16 EDP_ICOMPO
A17
PCI EXPRESS* - GRAPHICS
DMI
Intel(R) FDI
eDP
1 OF 9
SANDY
CPU1A
SANDY
PCI EXPRESS* - GRAPHICS
DMI
Intel(R) FDI
eDP
1 OF 9
SANDY
CPU1A
SANDY
1 2
C418 SCD1U6D3V1KX-GP
PX
C418 SCD1U6D3V1KX-GP
PX
1 2
C411 SCD1U6D3V1KX-GP
PX
C411 SCD1U6D3V1KX-GP
PX
1 2
C426 SCD1U6D3V1KX-GP
PX
C426 SCD1U6D3V1KX-GP
PX
1 2
C412 SCD1U6D3V1KX-GP
PX
C412 SCD1U6D3V1KX-GP
PX
1 2
C427 SCD1U6D3V1KX-GP
PX
C427 SCD1U6D3V1KX-GP
PX
1 2
C413 SCD1U6D3V1KX-GP
PX
C413 SCD1U6D3V1KX-GP
PX
1 2
C428 SCD1U6D3V1KX-GP
PX
C428 SCD1U6D3V1KX-GP
PX
1 2
C414 SCD1U6D3V1KX-GP
PX
C414 SCD1U6D3V1KX-GP
PX
1 2
C403 SCD1U6D3V1KX-GP
PX
C403 SCD1U6D3V1KX-GP
PX
1 2
C429 SCD1U6D3V1KX-GP
PX
C429 SCD1U6D3V1KX-GP
PX
1 2
C415 SCD1U6D3V1KX-GP
PX
C415 SCD1U6D3V1KX-GP
PX
1 2
C404 SCD1U6D3V1KX-GP
PX
C404 SCD1U6D3V1KX-GP
PX
1 2
R402 24D9R2F-L-GPR402 24D9R2F-L-GP
1 2
C430 SCD1U6D3V1KX-GP
PX
C430 SCD1U6D3V1KX-GP
PX
1 2
C419 SCD1U6D3V1KX-GP
PX
C419 SCD1U6D3V1KX-GP
PX
1 2
C416 SCD1U6D3V1KX-GP
PX
C416 SCD1U6D3V1KX-GP
PX
![](asset-5.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BUF_PLT_RST#
SKTOCC#_R
H_CATERR#
BUF_PLT_RST#
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
XDP_TRST#
XDP_TCLK
XDP_PRDY#
XDP_PREQ#
XDP_TCLK
XDP_TMS
XDP_TRST#
XDP_DBRESET#
VDDPWRGOOD XDP_TMS
CLK_DP_N_R
CLK_DP_P_R
H_CPUPWRGD_R
H_PROCHOT#
XDP_TDI
XDP_TDI
XDP_TMS
XDP_TRST#
XDP_TDO
XDP_TCLK
XDP_PRDY#
XDP_PREQ#
XDP_BPM1
XDP_BPM2
XDP_BPM3
XDP_BPM0
XDP_BPM4
XDP_BPM5
XDP_BPM6
XDP_BPM7
H_CPUPWRGD_R
XDP_TDO
XDP_DBRESET#
XDP_DBRESET#
XDP_TDO
XDP_TDI
H_PROCHOT#_R
CLK_DP_P_R
CLK_DP_N_R
1D05V_VTT3D3V_S0
1D05V_VTT
1D05V_VTT
1D05V_VTT
3D3V_S0
PLT_RST#18,27,32,36,65,66,71,80,82,83
CLK_EXP_P 20
CLK_EXP_N 20
H_PM_SYNC19
H_PECI22,27
H_SNB_IVB#18
H_THERMTRIP#22,36,85
H_CPUPWRGD22,36
PM_DRAM_PWRGD19,37
VDDPWRGOOD37
H_PROCHOT#27,42
SM_DRAMRST# 37
CLK_DP_N_R 20
CLK_DP_P_R 20
XDP_PREQ# 11
XDP_PRDY# 11
XDP_DBRESET# 11,19
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
CPU (Thermal/CLK/PM)
A3
5 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
CPU (Thermal/CLK/PM)
A3
5 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
CPU (Thermal/CLK/PM)
A3
5 94Tuesday, November 09, 2010
<Core Design>
SSID = CPU
Connect EC to PROCHOT# through inverting OD buffer.
Disabling Guidelines:
If motherboard only supports external graphics:
Connect DPLL_REF_SSCLK on Processor to GND through
1K +/- 5% resistor.
Connect DPLL_REF_SSCLK# on Processor to VCCP
through 1K +/- 5% resistorpower (~15 mW) may be
wasted.
Signal Routing Guideline:
SM_RCOMP keep routing length less than 500 mils.
N/A 84.2N702.J31
84.2N702.031
PANJIT
DIODES
Description Lenovo P/N Wistron P/N
N/A2N7002K
2N7002K
Supplier
Table 5.1- N-Channel MOSFET multi-source
84.07002.I31NXP N/A2N7002BK
1
2 3
4
RN502
SRN1KJ-11-GP-U
DY
RN502
SRN1KJ-11-GP-U
DY
1 2
R504 0R2J-2-GPR504 0R2J-2-GP
1
2
3
4 5
6
7
8
RN501
SRN51J-1-GP
RN501
SRN51J-1-GP
1 2
R516 1KR2J-1-GPR516 1KR2J-1-GP
1
TP504TP504
1 2
R501 62R2J-GPR501 62R2J-GP
1 2
R513 56R2F-1-GP
R513 56R2F-1-GP
1 2
R511 51R2J-2-GPR511 51R2J-2-GP
1 2
R505 0R2J-2-GP
DY
R505 0R2J-2-GP
DY
1
TP505TP505
1
TP501TPAD14-GP TP501TPAD14-GP
1
TP506TP506
1
TP511TP511
1 2
R506 10KR2J-3-GP
R506 10KR2J-3-GP
1
TP507TP507
1
TP512TP512
1
TP508TP508
G
S
D
Q501
2N7002K-2-GP
84.2N702.J31
2nd = 84.2N702.031
Q501
2N7002K-2-GP
84.2N702.J31
2nd = 84.2N702.031
1 2
R503
4K99R2F-L-GP
R503
4K99R2F-L-GP
1 2
R507 25D5R2F-GPR507 25D5R2F-GP
1
TP513TP513
SM_RCOMP1 A5
SM_RCOMP2 A4
SM_DRAMRST# R8
SM_RCOMP0 AK1
BCLK# A27
BCLK A28
DPLL_REF_SSCLK# A15
DPLL_REF_SSCLK A16
CATERR#
AL33
PECI
AN33
PROCHOT#
AL32
THERMTRIP#
AN32
SM_DRAMPWROK
V8
RESET#
AR33
PRDY# AP29
PREQ# AP27
TCK AR26
TMS AR27
TRST# AP30
TDI AR28
TDO AP26
DBR# AL35
BPM#0 AT28
BPM#1 AR29
BPM#2 AR30
BPM#3 AT30
BPM#4 AP32
BPM#5 AR31
BPM#6 AT31
BPM#7 AR32
PM_SYNC
AM34
SKTOCC#
AN34
SNB_IVB#
C26
UNCOREPWRGOOD
AP33
CLOCKS
MISCTHERMALPWR MANAGEMENT
DDR3
MISC
JTAG & BPM
2 OF 9
SANDY
CPU1B
SANDY
CLOCKS
MISCTHERMALPWR MANAGEMENT
DDR3
MISC
JTAG & BPM
2 OF 9
SANDY
CPU1B
SANDY
1
TP509TP509
12
R502
1KR2J-1-GP
R502
1KR2J-1-GP
1 2
R508 140R2F-GPR508 140R2F-GP
1
TP502TPAD14-GP TP502TPAD14-GP
12
R509
75R2F-2-GP
R509
75R2F-2-GP
G
S
D
Q502
2N7002K-2-GP
84.2N702.J31
2nd = 84.2N702.031
Q502
2N7002K-2-GP
84.2N702.J31
2nd = 84.2N702.031
1
TP514TP514
1 2
R512
43R2J-GP
R512
43R2J-GP
1
TP510TP510
1 2
R510 200R2F-L-GPR510 200R2F-L-GP
12
C502
SC47P50V2JN-3GP
C502
SC47P50V2JN-3GP
1
TP515TP515
1
TP503TP503
![](asset-6.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
M_A_DQ44
M_A_DQ36
M_A_DQ47
M_A_DQ40
M_A_DQ39
M_A_DQ37
M_A_DQ35
M_A_DQ34
M_A_DQ59
M_A_DQ54
M_A_DQ53
M_A_DQ63
M_A_DQ60
M_A_DQ61
M_A_DQ58
M_A_DQ51
M_A_DQ48
M_A_DQ57
M_A_DQ55
M_A_DQ49
M_A_DQ50
M_A_DQ62
M_A_DQ52
M_A_DQ56
M_A_DQ[63:0]
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ7
M_A_DQ5
M_A_DQ4
M_A_DQ6
M_A_DQ12
M_A_DQ10
M_A_DQ13
M_A_DQ9
M_A_DQ8
M_A_DQ11
M_A_DQ15
M_A_DQ14
M_A_DQ27
M_A_DQ25
M_A_DQ20
M_A_DQ19
M_A_DQ30
M_A_DQ18
M_A_DQ16
M_A_DQ28
M_A_DQ17
M_A_DQ26
M_A_DQ31
M_A_DQ29
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ21
M_A_DQ46
M_A_DQ42
M_A_DQ38
M_A_DQ32
M_A_DQ45
M_A_DQ33
M_A_DQ43
M_A_DQ41
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ15
M_B_DQ13
M_B_DQ12
M_B_DQ14
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ23
M_B_DQ21
M_B_DQ20
M_B_DQ22
M_B_DQ28
M_B_DQ26
M_B_DQ29
M_B_DQ25
M_B_DQ31
M_B_DQ24
M_B_DQ27
M_B_DQ30
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ39
M_B_DQ37
M_B_DQ36
M_B_DQ38
M_B_DQ44
M_B_DQ42
M_B_DQ45
M_B_DQ41
M_B_DQ47
M_B_DQ40
M_B_DQ43
M_B_DQ46
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ55
M_B_DQ53
M_B_DQ52
M_B_DQ54
M_B_DQ60
M_B_DQ58
M_B_DQ61
M_B_DQ57
M_B_DQ63
M_B_DQ56
M_B_DQ59
M_B_DQ62
M_B_DQ[63:0]
M_A_DQS4
M_A_DQS3
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS2
M_A_DQS1
M_A_DQS0
M_A_A7
M_A_A12
M_A_A14
M_A_A13
M_A_A9
M_A_A15
M_A_A10
M_A_A0
M_A_A6
M_A_A8
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A11
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_DQS#3
M_A_DQS#2
M_A_DQS#1
M_A_DQS#0
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#3
M_B_DQS#2
M_B_DQS#1
M_B_DQS#0
M_B_DQS#7
M_B_DQS#6
M_B_DQS#5
M_B_DQS#4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_A4
M_B_A3
M_B_A2
M_B_A1
M_B_A0
M_A_DQ[63:0]14 M_B_DQ[63:0]15
M_A_DQS#[7:0] 14
M_A_A[15:0] 14
M_A_DQS[7:0] 14
M_A_DIM0_CKE0 14
M_A_DIM0_CKE1 14
M_A_DIM0_CS#0 14
M_A_DIM0_CS#1 14
M_A_DIM0_ODT0 14
M_A_DIM0_ODT1 14
M_A_DIM0_CLK_DDR0 14
M_A_DIM0_CLK_DDR#0 14
M_A_DIM0_CLK_DDR1 14
M_A_DIM0_CLK_DDR#1 14
M_B_A[15:0] 15
M_B_DQS[7:0] 15
M_B_DQS#[7:0] 15
M_B_DIM0_CKE0 15
M_B_DIM0_CKE1 15
M_B_DIM0_CS#0 15
M_B_DIM0_CS#1 15
M_B_DIM0_ODT0 15
M_B_DIM0_ODT1 15
M_B_DIM0_CLK_DDR0 15
M_B_DIM0_CLK_DDR#0 15
M_B_DIM0_CLK_DDR1 15
M_B_DIM0_CLK_DDR#1 15
M_A_BS014 M_A_BS114 M_A_BS214
M_A_WE#14
M_A_CAS#14 M_A_RAS#14
M_B_BS215
M_B_BS015
M_B_WE#15
M_B_CAS#15 M_B_RAS#15
M_B_BS115
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
CPU (DDR)
A3
6 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
CPU (DDR)
A3
6 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
CPU (DDR)
A3
6 94
Tuesday, November 09, 2010
<Core Design>
SSID = CPU
SB_BS0
AA9
SB_BS1
AA7
SB_BS2
R6
SB_CAS#
AA10
SB_RAS#
AB8
SB_WE#
AB9
SB_CLK0 AE2
SB_CLK1 AE1
SB_CLK#0 AD2
SB_CLK#1 AD1
SB_CKE0 R9
SB_CKE1 R10
SB_ODT0 AE4
SB_ODT1 AD4
SB_DQS4 AN6
SB_DQS#4 AN5
SB_DQS5 AP8
SB_DQS#5 AP9
SB_DQS6 AK11
SB_DQS#6 AK12
SB_DQS7 AP14
SB_DQS#7 AP15
SB_DQS0 C7
SB_DQS#0 D7
SB_DQS1 G3
SB_DQS#1 F3
SB_DQS2 J6
SB_DQS#2 K6
SB_DQS3 M3
SB_DQS#3 N3
SB_MA0 AA8
SB_MA1 T7
SB_MA2 R7
SB_MA3 T6
SB_MA4 T2
SB_MA5 T4
SB_MA6 T3
SB_MA7 R2
SB_MA8 T5
SB_MA9 R3
SB_MA10 AB7
SB_MA11 R1
SB_MA12 T1
SB_MA13 AB10
SB_MA14 R5
SB_MA15 R4
SB_DQ0
C9
SB_DQ1
A7
SB_DQ2
D10
SB_DQ3
C8
SB_DQ4
A9
SB_DQ5
A8
SB_DQ6
D9
SB_DQ7
D8
SB_DQ8
G4
SB_DQ9
F4
SB_DQ10
F1
SB_DQ11
G1
SB_DQ12
G5
SB_DQ13
F5
SB_DQ14
F2
SB_DQ15
G2
SB_DQ16
J7
SB_DQ17
J8
SB_DQ18
K10
SB_DQ19
K9
SB_DQ20
J9
SB_DQ21
J10
SB_DQ22
K8
SB_DQ23
K7
SB_DQ24
M5
SB_DQ25
N4
SB_DQ26
N2
SB_DQ27
N1
SB_DQ28
M4
SB_DQ29
N5
SB_DQ30
M2
SB_DQ31
M1
SB_DQ32
AM5
SB_DQ33
AM6
SB_DQ34
AR3
SB_DQ35
AP3
SB_DQ36
AN3
SB_DQ37
AN2
SB_DQ38
AN1
SB_DQ39
AP2
SB_DQ40
AP5
SB_DQ41
AN9
SB_DQ42
AT5
SB_DQ43
AT6
SB_DQ44
AP6
SB_DQ45
AN8
SB_DQ46
AR6
SB_DQ47
AR5
SB_DQ48
AR9
SB_DQ49
AJ11
SB_DQ50
AT8
SB_DQ51
AT9
SB_DQ52
AH11
SB_DQ53
AR8
SB_DQ54
AJ12
SB_DQ55
AH12
SB_DQ56
AT11
SB_DQ57
AN14
SB_DQ58
AR14
SB_DQ59
AT14
SB_DQ60
AT12
SB_DQ61
AN15
SB_DQ62
AR15
SB_DQ63
AT15
SB_CLK2 AB2
SB_CLK#2 AA2
SB_CKE2 T9
SB_CLK3 AA1
SB_CLK#3 AB1
SB_CKE3 T10
SB_CS#0 AD3
SB_CS#1 AE3
SB_CS#2 AD6
SB_CS#3 AE6
SB_ODT2 AD5
SB_ODT3 AE5
DDR SYSTEM MEMORY B
4 OF 9
SANDY
CPU1D
SANDY
DDR SYSTEM MEMORY B
4 OF 9
SANDY
CPU1D
SANDY
SA_BS0
AE10
SA_BS1
AF10
SA_BS2
V6
SA_CAS#
AE8
SA_RAS#
AD9
SA_WE#
AF9
SA_CLK0 AB6
SA_CLK1 AA5
SA_CLK#0 AA6
SA_CLK#1 AB5
SA_CKE0 V9
SA_CKE1 V10
SA_CS#0 AK3
SA_CS#1 AL3
SA_ODT0 AH3
SA_ODT1 AG3
SA_DQS0 D4
SA_DQS#0 C4
SA_DQS1 F6
SA_DQS#1 G6
SA_DQS2 K3
SA_DQS#2 J3
SA_DQS3 N6
SA_DQS#3 M6
SA_DQS4 AL5
SA_DQS#4 AL6
SA_DQS5 AM9
SA_DQS#5 AM8
SA_DQS6 AR11
SA_DQS#6 AR12
SA_DQS7 AM14
SA_DQS#7 AM15
SA_MA0 AD10
SA_MA1 W1
SA_MA2 W2
SA_MA3 W7
SA_MA4 V3
SA_MA5 V2
SA_MA6 W3
SA_MA7 W6
SA_MA8 V1
SA_MA9 W5
SA_MA10 AD8
SA_MA11 V4
SA_MA12 W4
SA_MA13 AF8
SA_MA14 V5
SA_MA15 V7
SA_DQ0
C5
SA_DQ1
D5
SA_DQ2
D3
SA_DQ3
D2
SA_DQ4
D6
SA_DQ5
C6
SA_DQ6
C2
SA_DQ7
C3
SA_DQ8
F10
SA_DQ9
F8
SA_DQ10
G10
SA_DQ11
G9
SA_DQ12
F9
SA_DQ13
F7
SA_DQ14
G8
SA_DQ15
G7
SA_DQ16
K4
SA_DQ17
K5
SA_DQ18
K1
SA_DQ19
J1
SA_DQ20
J5
SA_DQ21
J4
SA_DQ22
J2
SA_DQ23
K2
SA_DQ24
M8
SA_DQ25
N10
SA_DQ26
N8
SA_DQ27
N7
SA_DQ28
M10
SA_DQ29
M9
SA_DQ30
N9
SA_DQ31
M7
SA_DQ32
AG6
SA_DQ33
AG5
SA_DQ34
AK6
SA_DQ35
AK5
SA_DQ36
AH5
SA_DQ37
AH6
SA_DQ38
AJ5
SA_DQ39
AJ6
SA_DQ40
AJ8
SA_DQ41
AK8
SA_DQ42
AJ9
SA_DQ43
AK9
SA_DQ44
AH8
SA_DQ45
AH9
SA_DQ46
AL9
SA_DQ47
AL8
SA_DQ48
AP11
SA_DQ49
AN11
SA_DQ50
AL12
SA_DQ51
AM12
SA_DQ52
AM11
SA_DQ53
AL11
SA_DQ54
AP12
SA_DQ55
AN12
SA_DQ56
AJ14
SA_DQ57
AH14
SA_DQ58
AL15
SA_DQ59
AK15
SA_DQ60
AL14
SA_DQ61
AK14
SA_DQ62
AJ15
SA_DQ63
AH15
SA_CLK2 AB4
SA_CLK#2 AA4
SA_CLK3 AB3
SA_CLK#3 AA3
SA_CKE2 W9
SA_CKE3 W10
SA_CS#2 AG1
SA_CS#3 AH1
SA_ODT2 AG2
SA_ODT3 AH2
DDR SYSTEM MEMORY A
3 OF 9
SANDY
CPU1C
SANDY
DDR SYSTEM MEMORY A
3 OF 9
SANDY
CPU1C
SANDY
![](asset-7.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CFG0
CFG3
CFG4
CFG1
CFG2
CFG5
CFG6
CFG7
CFG9
CFG10
CFG8
CFG12
CFG13
CFG11
CFG15
CFG16
CFG14
CFG17
CFG2
CFG6
CFG5
CFG7
M_VREF_DQ_DIMM0_C
CFG4
M_VREF_CA_DIMM0_CM_VREF_CA_DIMM0_C
H_VCCP_SEL
VCC_VALIDATION_SENSE
VSS_VALIDATION_SENSE
VCC_DIE_SENSE
3D3V_S5
CFG011
PCIE_CLK_XDP_P 11,20
PCIE_CLK_XDP_N 11,20
M_VREF_DQ_DIMM014,37 M_VREF_DQ_DIMM115
M_VREF_CA_DIMM014 M_VREF_CA_DIMM115
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
CPU (RESERVED)
A3
7 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
CPU (RESERVED)
A3
7 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
CPU (RESERVED)
A3
7 94
Tuesday, November 09, 2010
<Core Design>
SSID = CPU
PEG Static Lane Reversal
1: Normal Operation; Lane #
definition matches socket pin map definition
CFG2
CFG[6:5] 11: x16 - Device 1 functions 1 and 2 disabled
PCIE Port Bifurcation Straps
1: PEG Train immediately following xxRESETB de assertion
CFG7
PEG DEFER TRAINING
0:Lane Reversed
10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled
01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
0: PEG Wait for BIOS for training
B4:VREF_DQ CHA
D1:VREF_DQ CHB
M3 - Processor Generated SO-DIMM VREF_DQ
20 mils
0: Enabled; An external Display Port device is
connected to the Embedded Display Port
Display Port Presence Strap
1: Disabled; No Physical Display Port
attached to Embedded Display Port
CFG4
1
TP703TP703
1
TP708TP708
1
TP715TP715
12
R704
1KR2J-1-GP
DY
R704
1KR2J-1-GP
DY
1
TP716TP716
12
R711
1KR2F-3-GP
R711
1KR2F-3-GP
1
TP702TP702
1
TP711TP711
1
TP706TP706
1
TP712TP712
12
R703
1KR2J-1-GP
DY
R703
1KR2J-1-GP
DY
12
R702
1KR2J-1-GP
PX
R702
1KR2J-1-GP
PX
1
TP704TP704
1
TP705TP705
1
TP714TP714
12
R705
1KR2J-1-GP
DY
R705
1KR2J-1-GP
DY
1 2
R708 0R2J-2-GP
DY
R708 0R2J-2-GP
DY
1 2
R706 0R2J-2-GP
DY
R706 0R2J-2-GP
DY
CFG0
AK28
CFG1
AK29
CFG2
AL26
CFG3
AL27
CFG4
AK26
CFG5
AL29
CFG6
AL30
CFG7
AM31
CFG8
AM32
CFG9
AM30
CFG10
AM28
CFG11
AM26
CFG12
AN28
CFG13
AN31
CFG14
AN26
CFG15
AM27
CFG16
AK31
CFG17
AN29
RSVD#AM33 AM33
RSVD#AJ27 AJ27
RSVD#J16 J16
RSVD#AT34 AT34
RSVD#H16 H16
RSVD#G16 G16
RSVD#AR35 AR35
RSVD#AT33 AT33
RSVD#AR34 AR34
RSVD#AT2 AT2
RSVD#AT1 AT1
RSVD#AR1 AR1
RSVD#B34 B34
RSVD#A33 A33
RSVD#A34 A34
RSVD#B35 B35
RSVD#C35 C35
RSVD#AJ32 AJ32
RSVD#AK32 AK32
RSVD#AE7 AE7
RSVD#AK2 AK2
RSVD#L7 L7
RSVD#AG7 AG7
RSVD#J15
J15
RSVD#C30
C30 RSVD#D23
D23
RSVD#A31
A31
RSVD#B30
B30
RSVD#D30
D30 RSVD#B29
B29
RSVD#A30
A30 RSVD#B31
B31
RSVD#C29
C29
RSVD#J20
J20
RSVD#T8 T8
RSVD#B4
B4
RSVD#D1
D1
RSVD#F25
F25
RSVD#F24
F24
RSVD#D24
D24
RSVD#G25
G25
RSVD#G24
G24
RSVD#E23
E23
RSVD#W8 W8
RSVD#AT26 AT26
RSVD#B18
B18
RSVD#AP35 AP35
RSVD#F23
F23
RSVD#AJ26
AJ26
RSVD#AJ31
AJ31
RSVD#AH31
AH31
RSVD#AJ33
AJ33
RSVD#AH33
AH33
RSVD#AH27 AH27
RSVD#A19
A19
RSVD#AN35 AN35
RSVD#AM35 AM35
RESERVED
5 OF 9
SANDY
CPU1E
SANDY
RESERVED
5 OF 9
SANDY
CPU1E
SANDY
1
TP710TP710
12
R701
1KR2J-1-GP
DY
R701
1KR2J-1-GP
DY
1 2
R707 0R2J-2-GP
DY
R707 0R2J-2-GP
DY
1
TP709TP709
1 2
R709 0R2J-2-GP
DY
R709 0R2J-2-GP
DY
12
R710
10KR2J-3-GP
R710
10KR2J-3-GP
12
R712
1KR2F-3-GP
R712
1KR2F-3-GP
1
TP707TP707
1
TP701TP701
![](asset-8.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_CPU_SVIDCLK
H_CPU_SVIDALRT#
H_CPU_SVIDDAT
H_CPU_SVIDDAT
VCC_CORE 1D05V_VTT
VCC_CORE
VCC_CORE
1D05V_VTT
1D05V_VTT
H_CPU_SVIDDAT 42
VR_SVID_ALERT# 42
H_CPU_SVIDCLK 42
VCCIO_SENSE 45
VSSIO_SENSE 45
VCCSENSE 42
VSSSENSE 42
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
CPU (VCC_CORE)
Custom
8 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
CPU (VCC_CORE)
Custom
8 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
CPU (VCC_CORE)
Custom
8 94
Tuesday, November 09, 2010
<Core Design>
PROCESSOR CORE POWER
53A
SSID = CPU
No-stuff sites outside the socket may be removed.
No-stuff sites inside the socket cavity need to remain.
VCC Output Decoupling Recommendation:
4 x 470 uF at Bottom Socket Edge
8 x 22 uF at Top Socket Cavity
8 x 22 uF at Top Socket Edge
8 x 22 uF at Bottom Socket Cavity
VCCIO Output Decoupling Recommendation:
2 x 330 uF (3 x 330 uF for 2012 capable designs)
5 x 22 uF & 5 x 0805 no-stuff at Bottom
7 x 22 uF & 2 x 0805 no-stuff at Top
S-HS_20100610 V1.0
R801, R802 need to close to CPU
For CRB VIDSOUT need to pull high 130 ohm closr to CPU and IMVP7
For CRB VIDALERT# need to pull high 75 ohm close to CPU
12
C830
SC10U6D3V5KX-1GP
C830
SC10U6D3V5KX-1GP
12
C806
SC10U6D3V5KX-1GP
C806
SC10U6D3V5KX-1GP
12
C815
SC10U6D3V3MX-GP
C815
SC10U6D3V3MX-GP
12
C821
SC10U6D3V5KX-1GP
C821
SC10U6D3V5KX-1GP
12
C841
SC10U6D3V5KX-1GP
C841
SC10U6D3V5KX-1GP
12
C836
SC10U6D3V5KX-1GP
C836
SC10U6D3V5KX-1GP
12
R802
100R2F-L1-GP-U
R802
100R2F-L1-GP-U
12
C827
SC10U6D3V5KX-1GP
C827
SC10U6D3V5KX-1GP
12
C803
SC10U6D3V3MX-GP
C803
SC10U6D3V3MX-GP
12
C839
SC10U6D3V5KX-1GP
C839
SC10U6D3V5KX-1GP
12
C816
SC10U6D3V5KX-1GP
C816
SC10U6D3V5KX-1GP
12
C805
SC10U6D3V5KX-1GP
C805
SC10U6D3V5KX-1GP
12
C818
SC10U6D3V3MX-GP
C818
SC10U6D3V3MX-GP
12
C801
SC10U6D3V3MX-GP
C801
SC10U6D3V3MX-GP
12
C845
SC10U6D3V5KX-1GP
C845
SC10U6D3V5KX-1GP
12
C802
SC10U6D3V3MX-GP
C802
SC10U6D3V3MX-GP
12
C810
SC10U6D3V5KX-1GP
C810
SC10U6D3V5KX-1GP
12
C809
SC10U6D3V5KX-1GP
C809
SC10U6D3V5KX-1GP
12
C811
SC10U6D3V3MX-GP
C811
SC10U6D3V3MX-GP
12
C835
SC10U6D3V5KX-1GP
C835
SC10U6D3V5KX-1GP
1 2
R804 130R2F-1-GPR804 130R2F-1-GP
12
C832
SC10U6D3V5KX-1GP
C832
SC10U6D3V5KX-1GP
VCC_SENSE AJ35
VSS_SENSE AJ34
VIDALERT# AJ29
VIDSCLK AJ30
VIDSOUT AJ28
VSSIO_SENSE A10
VCC
AG35
VCC
AG34
VCC
AG33
VCC
AG32
VCC
AG31
VCC
AG30
VCC
AG29
VCC
AG28
VCC
AG27
VCC
AG26
VCC
AF35
VCC
AF34
VCC
AF33
VCC
AF32
VCC
AF31
VCC
AF30
VCC
AF29
VCC
AF28
VCC
AF27
VCC
AF26
VCC
AD35
VCC
AD34
VCC
AD33
VCC
AD32
VCC
AD31
VCC
AD30
VCC
AD29
VCC
AD28
VCC
AD27
VCC
AD26
VCC
AC35
VCC
AC34
VCC
AC33
VCC
AC32
VCC
AC31
VCC
AC30
VCC
AC29
VCC
AC28
VCC
AC27
VCC
AC26
VCC
AA35
VCC
AA34
VCC
AA33
VCC
AA32
VCC
AA31
VCC
AA30
VCC
AA29
VCC
AA28
VCC
AA27
VCC
AA26
VCC
Y35
VCC
Y34
VCC
Y33
VCC
Y32
VCC
Y31
VCC
Y30
VCC
Y29
VCC
Y28
VCC
Y27
VCC
Y26
VCC
V35
VCC
V34
VCC
V33
VCC
V32
VCC
V31
VCC
V30
VCC
V29
VCC
V28
VCC
V27
VCC
V26
VCC
U35
VCC
U34
VCC
U33
VCC
U32
VCC
U31
VCC
U30
VCC
U29
VCC
U28
VCC
U27
VCC
U26
VCC
R35
VCC
R34
VCC
R33
VCC
R32
VCC
R31
VCC
R30
VCC
R29
VCC
R28
VCC
R27
VCC
R26
VCC
P35
VCC
P34
VCC
P33
VCC
P32
VCC
P31
VCC
P30
VCC
P29
VCC
P28
VCC
P27
VCC
P26
VCCIO AH13
VCCIO J11
VCCIO G12
VCCIO F14
VCCIO F13
VCCIO F12
VCCIO F11
VCCIO E14
VCCIO E12
VCCIO AH10
VCCIO AG10
VCCIO AC10
VCCIO Y10
VCCIO U10
VCCIO P10
VCCIO L10
VCCIO J14
VCCIO J13
VCCIO J12
VCCIO H14
VCCIO H12
VCCIO H11
VCCIO G14
VCCIO G13
VCCIO E11
VCCIO C12
VCCIO C11
VCCIO B14
VCCIO B12
VCCIO A14
VCCIO A13
VCCIO A12
VCCIO A11
VCCIO D14
VCCIO D13
VCCIO D12
VCCIO D11
VCCIO C14
VCCIO C13
VCCIO_SENSE B10
VCCIO J23
POWER
CORE SUPPLY
PEG AND DDR
SENSE LINES SVID
6 OF 9
SANDY
CPU1F
SANDY
POWER
CORE SUPPLY
PEG AND DDR
SENSE LINES SVID
6 OF 9
SANDY
CPU1F
SANDY
12
C826
SC10U6D3V5KX-1GP
C826
SC10U6D3V5KX-1GP
12
C820
SC10U6D3V3MX-GP
C820
SC10U6D3V3MX-GP
12
R801
100R2F-L1-GP-U
R801
100R2F-L1-GP-U
12
C829
SC10U6D3V5KX-1GP
C829
SC10U6D3V5KX-1GP
12
C838
SC10U6D3V5KX-1GP
C838
SC10U6D3V5KX-1GP
12
C833
SC10U6D3V5KX-1GP
C833
SC10U6D3V5KX-1GP
12
C823
SC10U6D3V5KX-1GP
C823
SC10U6D3V5KX-1GP
12
C844
SC10U6D3V5KX-1GP
C844
SC10U6D3V5KX-1GP
12
C817
SC10U6D3V3MX-GP
C817
SC10U6D3V3MX-GP
12
C834
SC10U6D3V5KX-1GP
C834
SC10U6D3V5KX-1GP
12
C824
SC10U6D3V5KX-1GP
C824
SC10U6D3V5KX-1GP
1 2
R803 43R2J-GPR803 43R2J-GP
12
C807
SC10U6D3V5KX-1GP
C807
SC10U6D3V5KX-1GP
12
C808
SC10U6D3V5KX-1GP
C808
SC10U6D3V5KX-1GP
12
C825
SC10U6D3V5KX-1GP
C825
SC10U6D3V5KX-1GP
12
C813
SC10U6D3V5KX-1GP
C813
SC10U6D3V5KX-1GP
12
C812
SC10U6D3V5KX-1GP
C812
SC10U6D3V5KX-1GP
12
C804
SC10U6D3V3MX-GP
C804
SC10U6D3V3MX-GP
12
C837
SC10U6D3V5KX-1GP
C837
SC10U6D3V5KX-1GP
12
C831
SC10U6D3V5KX-1GP
C831
SC10U6D3V5KX-1GP
12
C814
SC10U6D3V5KX-1GP
C814
SC10U6D3V5KX-1GP
12
C842
SC10U6D3V5KX-1GP
C842
SC10U6D3V5KX-1GP
12
C828
SC10U6D3V5KX-1GP
C828
SC10U6D3V5KX-1GP
12
C822
SC10U6D3V5KX-1GP
C822
SC10U6D3V5KX-1GP
12
C843
SC10U6D3V5KX-1GP
C843
SC10U6D3V5KX-1GP
12
C819
SC10U6D3V3MX-GP
C819
SC10U6D3V3MX-GP
12
C840
SC10U6D3V5KX-1GP
C840
SC10U6D3V5KX-1GP
![](asset-9.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VCCSA_SEL
VCCSA_SENSE
H_FC_C22
+V_SM_VREF_CNT
VCC_AXG_SENSE
VSS_AXG_SENSE
1D5V_S0
VCC_GFXCORE
1D8V_S0
0D85V_S0
0D85V_S0
VCC_GFXCORE
VCCSA_SEL 48
H_FC_C22 48
VCCSA_SENSE 48
VSS_AXG_SENSE 42
VCC_AXG_SENSE 42
+V_SM_VREF_CNT 37
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
CPU (VCC_GFXCORE)
A3
9 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
CPU (VCC_GFXCORE)
A3
9 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
CPU (VCC_GFXCORE)
A3
9 94
Tuesday, November 09, 2010
<Core Design>
SSID = CPU
R902 need be close to pin H23.
VAXG Output Decoupling Recommendation:
2 x 470 uF at Bottom Socket Edge
2 x 22 uF at Top Socket Cavity
4 x 22 uF at Top Socket Edge
2 x 22 uF at Bottom Socket Cavity
4 x 22 uF at Bottom Socket Edge
PROCESSOR VAXG: 24A
VCCPLL Output Decoupling Recommendation:
1 x 330 uF
2 x 1 uF
1 x 10 uF
Disabling Guidelines for External Graphics Designs:
Can connect to GND if motherboard only supports external
graphics and if GFX VR is not stuffed.
Can be left floating (Gfx VR keeps VAXG rail from floating)
if the VR is stuffed
PROCESSOR VCCPLL: 1.2A
PROCESSOR VCCSA: 6A
VDDQ Output Decoupling Recommendation:
1 x 330 uF
6 x 10 uF
PROCESSOR VDDQ: 10A
VCCSA Output Decoupling Recommendation:
1 x 330 uF
2 x 10 uF at Bottom Socket Cavity
1 x 10 uF at Bottom Socket Edge
Routing Guideline:
Power from DDR_VREF_S3 and +V_SM_VREF_CNT
should have 10 mils trace width.
Refer to the latest Huron River Mainstream PDG
(Doc# 436735) for more details on S3 power
reduction implementation.
+V_SM_VREF_CNT should have 10 mil trace width
S-HR_20100609 V1.0
R906,R907 close to CPU
12
C910
SC10U6D3V5KX-1GP
C910
SC10U6D3V5KX-1GP
SM_VREF AL1
VSSAXG_SENSE AK34
VAXG_SENSE AK35
VAXG
AT24
VAXG
AT23
VAXG
AT21
VAXG
AT20
VAXG
AT18
VAXG
AT17
VAXG
AR24
VAXG
AR23
VAXG
AR21
VAXG
AR20
VAXG
AR18
VAXG
AR17
VAXG
AP24
VAXG
AP23
VAXG
AP21
VAXG
AP20
VAXG
AP18
VAXG
AP17
VAXG
AN24
VAXG
AN23
VAXG
AN21
VAXG
AN20
VAXG
AN18
VAXG
AN17
VAXG
AM24
VAXG
AM23
VAXG
AM21
VAXG
AM20
VAXG
AM18
VAXG
AM17
VAXG
AL24
VAXG
AL23
VAXG
AL21
VAXG
AL20
VAXG
AL18
VAXG
AL17
VAXG
AK24
VAXG
AK23
VAXG
AK21
VAXG
AK20
VAXG
AK18
VAXG
AK17
VAXG
AJ24
VAXG
AJ23
VAXG
AJ21
VAXG
AJ20
VAXG
AJ18
VAXG
AJ17
VAXG
AH24
VAXG
AH23
VAXG
AH21
VAXG
AH20
VAXG
AH18
VAXG
AH17
VDDQ U4
VDDQ U1
VDDQ P7
VDDQ P4
VDDQ P1
VDDQ AF7
VDDQ AF4
VDDQ AF1
VDDQ AC7
VDDQ AC4
VDDQ AC1
VDDQ Y7
VDDQ Y4
VDDQ Y1
VDDQ U7
VCCPLL
B6
VCCPLL
A6
VCCSA M27
VCCSA M26
VCCSA L26
VCCSA J26
VCCSA J25
VCCSA J24
VCCSA H26
VCCSA H25
VCCSA_SENSE H23
VCCSA_VID1 C24
VCCPLL
A2
FC_C22 C22
POWER
GRAPHICS
DDR3 -1.5V RAILS SENSE
LINES
1.8V RAIL
SA RAIL
VREFMISC
7 OF 9
SANDY
CPU1G
SANDY
POWER
GRAPHICS
DDR3 -1.5V RAILS SENSE
LINES
1.8V RAIL
SA RAIL
VREFMISC
7 OF 9
SANDY
CPU1G
SANDY
12
C907
SC10U6D3V5KX-1GP
C907
SC10U6D3V5KX-1GP
12
C915
SC10U6D3V5KX-1GP
C915
SC10U6D3V5KX-1GP
12
C920
SC10U6D3V5KX-1GP
C920
SC10U6D3V5KX-1GP
12
C923
SC10U6D3V5KX-1GP
C923
SC10U6D3V5KX-1GP
12
C916
SC10U6D3V5KX-1GP
C916
SC10U6D3V5KX-1GP
12
C906
SC10U6D3V5KX-1GP
C906
SC10U6D3V5KX-1GP
12
C925
SC10U6D3V5KX-1GP
C925
SC10U6D3V5KX-1GP
12
C919
SC10U6D3V5KX-1GP
C919
SC10U6D3V5KX-1GP
12
C909
SC10U6D3V5KX-1GP
C909
SC10U6D3V5KX-1GP
12
C912
SC10U6D3V5KX-1GP
C912
SC10U6D3V5KX-1GP
12
TC903
ST330U2VDM-4-GP
79.33719.20L
TC903
ST330U2VDM-4-GP
79.33719.20L
12
C905
SC10U6D3V5KX-1GP
C905
SC10U6D3V5KX-1GP
12
R906
100R2F-L1-GP-U
R906
100R2F-L1-GP-U
12
C918
SC10U6D3V5KX-1GP
C918
SC10U6D3V5KX-1GP
12
C901
SC10U6D3V5KX-1GP
C901
SC10U6D3V5KX-1GP
12
C904
SC10U6D3V5KX-1GP
C904
SC10U6D3V5KX-1GP
12
C917
SC10U6D3V5KX-1GP
C917
SC10U6D3V5KX-1GP
12
C908
SC10U6D3V5KX-1GP
C908
SC10U6D3V5KX-1GP
12
C914
SC10U6D3V5KX-1GP
C914
SC10U6D3V5KX-1GP
12
C913
SC10U6D3V5KX-1GP
C913
SC10U6D3V5KX-1GP
12
C903
SC10U6D3V5KX-1GP
C903
SC10U6D3V5KX-1GP
12
C924
SC1U10V2KX-1GP
C924
SC1U10V2KX-1GP
12
C922
SC1U10V2KX-1GP
C922
SC1U10V2KX-1GP
12
C911
SC10U6D3V5KX-1GP
C911
SC10U6D3V5KX-1GP
12
R907
100R2F-L1-GP-U
R907
100R2F-L1-GP-U
12
R902
10R2J-2-GP
R902
10R2J-2-GP
12
C902
SC10U6D3V5KX-1GP
C902
SC10U6D3V5KX-1GP
12
C921
SC10U6D3V5KX-1GP
C921
SC10U6D3V5KX-1GP
1
23
4
RN901
SRN1KJ-7-GP
RN901
SRN1KJ-7-GP
![](asset-a.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
CPU (VSS)
A3
10 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
CPU (VSS)
A3
10 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
CPU (VSS)
A3
10 94
Tuesday, November 09, 2010
<Core Design>
SSID = CPU
VSS
T35
VSS
T34
VSS
T33
VSS
T32
VSS
T31
VSS
T30
VSS
T29
VSS
T28
VSS
T27
VSS
T26
VSS
P9
VSS
P8
VSS
P6
VSS
P5
VSS
P3
VSS
P2
VSS
N35
VSS
N34
VSS
N33
VSS
N32
VSS
N31
VSS
N30
VSS
N29
VSS
N28
VSS
N27
VSS
N26
VSS
M34
VSS
L33
VSS
L30
VSS
L27
VSS
L9
VSS
L8
VSS
L6
VSS
L5
VSS
L4
VSS
L3
VSS
L2
VSS
L1
VSS
K35
VSS
K32
VSS
K29
VSS
K26
VSS
J34
VSS
J31
VSS
H33
VSS
H30
VSS
H27
VSS
H24
VSS
H21
VSS
H18
VSS
H15
VSS
H13
VSS
H10
VSS
H9
VSS
H8
VSS
H7
VSS
H6
VSS
H5
VSS
H4
VSS
H3
VSS
H2
VSS
H1
VSS
G35
VSS
G32
VSS
G29
VSS
G26
VSS
G23
VSS
G20
VSS
G17
VSS
G11
VSS
F34
VSS
F31
VSS
F29
VSS F22
VSS F19
VSS E30
VSS E27
VSS E24
VSS E21
VSS E18
VSS E15
VSS E13
VSS E10
VSS E9
VSS E8
VSS E7
VSS E6
VSS E5
VSS E4
VSS E3
VSS E2
VSS E1
VSS D35
VSS D32
VSS D29
VSS D26
VSS D20
VSS D17
VSS C34
VSS C31
VSS C28
VSS C27
VSS C25
VSS C23
VSS C10
VSS C1
VSS B22
VSS B19
VSS B17
VSS B15
VSS B13
VSS B11
VSS B9
VSS B8
VSS B7
VSS B5
VSS B3
VSS B2
VSS A35
VSS A32
VSS A29
VSS A26
VSS A23
VSS A20
VSS A3
VSS
9 OF 9
SANDY
CPU1I
SANDY
VSS
9 OF 9
SANDY
CPU1I
SANDY
VSS
AT35
VSS
AT32
VSS
AT29
VSS
AT27
VSS
AT25
VSS
AT22
VSS
AT19
VSS
AT16
VSS
AT13
VSS
AT10
VSS
AT7
VSS
AT4
VSS
AT3
VSS
AR25
VSS
AR22
VSS
AR19
VSS
AR16
VSS
AR13
VSS
AR10
VSS
AR7
VSS
AR4
VSS
AR2
VSS
AP34
VSS
AP31
VSS
AP28
VSS
AP25
VSS
AP22
VSS
AP19
VSS
AP16
VSS
AP13
VSS
AP10
VSS
AP7
VSS
AP4
VSS
AP1
VSS
AN30
VSS
AN27
VSS
AN25
VSS
AN22
VSS
AN19
VSS
AN16
VSS
AN13
VSS
AN10
VSS
AN7
VSS
AN4
VSS
AM29
VSS
AM25
VSS
AM22
VSS
AM19
VSS
AM16
VSS
AM13
VSS
AM10
VSS
AM7
VSS
AM4
VSS
AM3
VSS
AM2
VSS
AM1
VSS
AL34
VSS
AL31
VSS
AL28
VSS
AL25
VSS
AL22
VSS
AL19
VSS
AL16
VSS
AL13
VSS
AL10
VSS
AL7
VSS
AL4
VSS
AL2
VSS
AK33
VSS
AK30
VSS
AK27
VSS
AK25
VSS
AK22
VSS
AK19
VSS
AK16
VSS
AK13
VSS
AK10
VSS
AK7
VSS
AK4
VSS
AJ25
VSS AJ22
VSS AJ19
VSS AJ16
VSS AJ13
VSS AJ10
VSS AJ7
VSS AJ4
VSS AJ3
VSS AJ2
VSS AJ1
VSS AH35
VSS AH34
VSS AH32
VSS AH30
VSS AH29
VSS AH28
VSS AH26
VSS AH25
VSS AH22
VSS AH19
VSS AH16
VSS AH7
VSS AH4
VSS AG9
VSS AG8
VSS AG4
VSS AF6
VSS AF5
VSS AF3
VSS AF2
VSS AE35
VSS AE34
VSS AE33
VSS AE32
VSS AE31
VSS AE30
VSS AE29
VSS AE28
VSS AE27
VSS AE26
VSS AE9
VSS AD7
VSS AC9
VSS AC8
VSS AC6
VSS AC5
VSS AC3
VSS AC2
VSS AB35
VSS AB34
VSS AB33
VSS AB32
VSS AB31
VSS AB30
VSS AB29
VSS AB28
VSS AB27
VSS AB26
VSS Y9
VSS Y8
VSS Y6
VSS Y5
VSS Y3
VSS Y2
VSS W35
VSS W34
VSS W33
VSS W32
VSS W31
VSS W30
VSS W29
VSS W28
VSS W27
VSS W26
VSS U9
VSS U8
VSS U6
VSS U5
VSS U3
VSS U2
VSS
8 OF 9
SANDY
CPU1H
SANDY
VSS
8 OF 9
SANDY
CPU1H
SANDY
![](asset-b.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
3D3V_S53D3V_S5
PCIE_CLK_XDP_N7,20
CFG07 XDP_PRDY#5
XDP_PREQ#5
PCIE_CLK_XDP_P7,20
PCH_TMS21
PCH_TCK21
PCH_TDI21
PCH_TDO21
PM_RSMRST#19
XDP_DBRESET#5,19
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
XDP CONN
A3
11 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
XDP CONN
A3
11 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
XDP CONN
A3
11 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
DEBUG Interface for Processor.
DEBUG Interface for PCH.
20K Ohms
10K Ohms
DY
DY
DY
DY
DY
DY
DY
DY
DY
DY
DY
DY
PCH ES2 JTAG
PCH
PIN
TDO
TMS
TDI
TCK
TRST#
PCH ES1 JTAG
R1110
R1116
R1112
R1118
R1111
R1117
R541
R535
200 Ohms
200 Ohms
200 Ohms
200 Ohms
200 Ohms
100 Ohms
100 Ohms100 Ohms
100 Ohms
51 Ohms 51 Ohms
20K Ohms
10K Ohms
51 Ohms 51 Ohms
PRODUCTION
DY
DY
DY
DY
DY
DY
DY
DY
51 Ohms
R103
R953
R90
100 Ohms
R91
R2 DY DY DY DY 51 Ohms
DY DY
DY DY
DY DY
DY DY
DYDY
DY DY
51 Ohms
51 Ohms
Enable Disable
DY
DY
DY
DY
DY
DY
51 Ohms
DY
DY
DY
DY
DY
DY
Enable EnableDisable Disable
REF
DES
DY
DY
DY
DY
DY
DY
DY
TABLE
LOGIC
CPU XDP SFF 26pin IF
Pin 1 OBSFN_A0 (PREQ#, I/O)
Pin 2 OBSFN_A1 (PRDY#, I/O)
Pin 3 GND
Pin 4 OBSDATA_A0 (Open, I/O)
Pin 5 OBSDATA_A1 (Open, I/O)
Pin 6 GND
Pin 7 OBSDATA_A2 (Open, I/O)
Pin 8 OBSDATA_A3 (Open, I/O)
Pin 9 GND
Pin 10 HOOK0 (PWRGD, In)
Pin 11 HOOK1 (BP_PWRGD_RST#, Out)
Pin 12 HOOK2 (CFG0, Out)
Pin 13 HOOK3 (vr_READYSYS_PWROK,Out)
Pin 14 HOOK4 (BCLK, In)
Pin 15 HOOK5 (BCLK#, In)
Pin 16 VCCOBS_AB (VCCP Voltage of CPU, In)
Pin 17 HOOK6 (RESET#, Out)
Pin 18 HOOK7 (DBR#, Out)
Pin 19 GND
Pin 20 TDO, In
Pin 21 TRST#, Out
Pin 22 TDI, Out
Pin 23 TMS, Out
Pin 24 TCK1 (Open)
Pin 25 GND
Pin 26 TCK0 ,Out
PCH XDP SFF 26pin IF
Pin 1 OBSFN_A0 (Open), I/O)
Pin 2 OBSFN_A1 (Open, I/O)
Pin 3 GND
Pin 4 OBSDATA_A0 (Open, I/O)
Pin 5 OBSDATA_A1 (Open, I/O)
Pin 6 GND
Pin 7 OBSDATA_A2 (Open, I/O)
Pin 8 OBSDATA_A3 (Open, I/O)
Pin 9 GND
Pin 10 HOOK0 (RSMRST#, In)
Pin 11 HOOK1 (BP_PWRGD_RST#, Out)
Pin 12 HOOK2 (Open)
Pin 13 HOOK3 (Open)
Pin 14 HOOK4 (Open)
Pin 15 HOOK5 (Open)
Pin 16 VCCOBS_AB (3.3VSUS, In)
Pin 17 HOOK6 (RSMRST#, Out)
Pin 18 HOOK7 (DBR#, Out)
Pin 19 GND
Pin 20 TDO (JTAG, In)
Pin 21 TRST# (Open)
Pin 22 TDI (JTAG, Out)
Pin 23 TMS (JTAG, Out)
Pin 24 TCK1 (Open)
Pin 25 GND
Pin 26 TCK0 (JTAG, Out)
12
R1117
100R2J-2-GP
DY
R1117
100R2J-2-GP
DY
12
R1112
200R2J-L1-GP
DY
R1112
200R2J-L1-GP
DY
12
R1110
200R2J-L1-GP
DY
R1110
200R2J-L1-GP
DY
1
TP1105TP1105
12
R1118
100R2J-2-GP
DY
R1118
100R2J-2-GP
DY
12
R1111
200R2J-L1-GP
DY
R1111
200R2J-L1-GP
DY
1
TP1101TP1101
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
27
28
25
26
XDP1102
MLX-CON26-8-GP
DY
XDP1102
MLX-CON26-8-GP
DY
1 2
R1123 1KR2J-1-GP
DY
R1123 1KR2J-1-GP
DY
1 2
R1124 1KR2J-1-GP
DY
R1124 1KR2J-1-GP
DY
12
R1116
100R2J-2-GP
DY
R1116
100R2J-2-GP
DY
1
TP1102TP1102
1
TP1103TP1103
1
TP1104TP1104
![](asset-c.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
Reserved
A4
12 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
Reserved
A4
12 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
Reserved
A4
12 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
BLANK
![](asset-d.png)
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
CLOCK GEN
A4
13 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
CLOCK GEN
A4
13 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
CLOCK GEN
A4
13 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
BLANK
![](asset-e.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
M_A_A1
M_A_DQS#0
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQS3
M_A_DQ0
M_A_DQS#5
M_A_A2
SA0_DIM0
SA0_DIM0
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQS4
M_A_A3
M_A_DQS#6
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
SA1_DIM0
M_A_DQ1
M_A_A4
M_A_DQS5
M_A_DQS#7
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQS#1
M_A_A5
M_A_DQ2
SA1_DIM0
M_A_DQS6
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQS0
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A6
M_A_DQ3
M_A_DQS#2
M_A_DQS7
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQS1
M_A_A13
M_A_A14
M_A_A15
M_A_A12
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQS#3
M_A_A0
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQS2
M_A_DQS#4
M_VREF_DQ_DIMM0
TS#_DIMM0_1
M_VREF_CA_DIMM0
M_VREF_DQ_DIMM0
M_VREF_CA_DIMM0
1D5V_S3
1D5V_S3
3D3V_S0
0D75V_S0
0D75V_S0
DDR_VREF_S3
3D3V_S0
DDR_VREF_S3
M_A_DQ[63:0]6
PCH_SMBCLK 15,20,65,66
PCH_SMBDATA 15,20,65,66
M_A_A[15:0] 6
M_A_DQS#[7:0] 6
M_A_DQS[7:0] 6
M_A_RAS# 6
M_A_WE# 6
M_A_CAS# 6
M_A_DIM0_CS#0 6
M_A_DIM0_CS#1 6
M_A_DIM0_CKE0 6
M_A_DIM0_CKE1 6
M_A_DIM0_CLK_DDR0 6
M_A_DIM0_CLK_DDR#0 6
M_A_DIM0_CLK_DDR1 6
M_A_DIM0_CLK_DDR#1 6
M_A_DIM0_ODT06 M_A_DIM0_ODT16
DDR3_DRAMRST#15,37
M_VREF_CA_DIMM07 M_VREF_DQ_DIMM07,37
TS#_DIMM0_1 15
M_A_BS26
M_A_BS06 M_A_BS16
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
DDR3-SODIMM1
Custom
14 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
DDR3-SODIMM1
Custom
14 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
DDR3-SODIMM1
Custom
14 94
Tuesday, November 09, 2010
<Core Design>
Place these caps
close to VTT1 and
VTT2.
Note:
If SA0 DIM0 = 0, SA1_DIM0 = 0
SO-DIMMA SPD Address is 0xA0
SO-DIMMA TS Address is 0x30
If SA0 DIM0 = 1, SA1_DIM0 = 0
SO-DIMMA SPD Address is 0xA2
SO-DIMMA TS Address is 0x32
SODIMM A DECOUPLING
Layout Note:
Place these Caps near
SO-DIMMA.
H =9.2mm
SSID = MEMORY
Thermal EVENT
20100706
20100706
12
C1407
SC10U6D3V5KX-1GP
C1407
SC10U6D3V5KX-1GP
12
C1406
SC10U6D3V5KX-1GP
C1406
SC10U6D3V5KX-1GP
12
C1405
SC10U10V5ZY-1GP
DY
C1405
SC10U10V5ZY-1GP
DY
12
R1402
10KR2J-3-GP
R1402
10KR2J-3-GP
12
C1424
SCD1U10V2KX-5GP
C1424
SCD1U10V2KX-5GP
12
C1416
SCD1U10V2KX-5GP
C1416
SCD1U10V2KX-5GP
12
C1413
SCD1U10V2KX-5GP
C1413
SCD1U10V2KX-5GP
12
C1409
SC10U6D3V5KX-1GP
DY
C1409
SC10U6D3V5KX-1GP
DY
12
C1422
SC1U6D3V2KX-GP
DY
C1422
SC1U6D3V2KX-GP
DY
12
C1411
SCD1U10V2KX-5GP
C1411
SCD1U10V2KX-5GP
12
C1418
SC10U6D3V5KX-1GP
DY
C1418
SC10U6D3V5KX-1GP
DY
12
C1417
SCD1U10V2KX-5GP
C1417
SCD1U10V2KX-5GP
12
C1408
SC10U10V5ZY-1GP
DY
C1408
SC10U10V5ZY-1GP
DY
12
C1419
SC1U6D3V2KX-GP
C1419
SC1U6D3V2KX-GP
12
C1412
SC2D2U10V3KX-1GP
DY
C1412
SC2D2U10V3KX-1GP
DY
12
C1421
SC1U6D3V2KX-GP
C1421
SC1U6D3V2KX-GP
12
C1401
SCD1U10V2KX-5GP
C1401
SCD1U10V2KX-5GP
12
TC1401
ST330U2VDM-4-GP
79.33719.20L
TC1401
ST330U2VDM-4-GP
79.33719.20L
12
C1404
SC10U6D3V5KX-1GP
C1404
SC10U6D3V5KX-1GP
12
C1420
SC1U6D3V2KX-GP
DY
C1420
SC1U6D3V2KX-GP
DY
12
C1402
SC2D2U10V3KX-1GP
DY
C1402
SC2D2U10V3KX-1GP
DY
12
R1401
10KR2J-3-GP
R1401
10KR2J-3-GP
1 2
R1403 10KR2J-3-GPR1403 10KR2J-3-GP
12
C1410
SC10U6D3V5KX-1GP
DY
C1410
SC10U6D3V5KX-1GP
DY
12
C1414
SCD1U10V2KX-5GP
C1414
SCD1U10V2KX-5GP
12
C1425
SC2D2U10V3KX-1GP
DY
C1425
SC2D2U10V3KX-1GP
DY
12
C1403
SC10U6D3V5KX-1GP
C1403
SC10U6D3V5KX-1GP
12
C1415
SCD1U10V2KX-5GP
C1415
SCD1U10V2KX-5GP
12
C1423
SCD1U10V2KX-5GP
C1423
SCD1U10V2KX-5GP
A0
98
A1
97
A2
96
A3
95
A4
92
A5
91
A6
90
A7
86
A8
89
A9
85
A10/AP
107
A11
84
A12
83
A13
119
A14
80
A15
78
A16/BA2
79
BA0
109
BA1
108
DQ0
5
DQ1
7
DQ2
15
DQ3
17
DQ4
4
DQ5
6
DQ6
16
DQ7
18
DQ8
21
DQ9
23
DQ10
33
DQ11
35
DQ12
22
DQ13
24
DQ14
34
DQ15
36
DQ16
39
DQ17
41
DQ18
51
DQ19
53
DQ20
40
DQ21
42
DQ22
50
DQ23
52
DQ24
57
DQ25
59
DQ26
67
DQ27
69
DQ28
56
DQ29
58
DQ30
68
DQ31
70
DQ32
129
DQ33
131
DQ34
141
DQ35
143
DQ36
130
DQ37
132
DQ38
140
DQ39
142
DQ40
147
DQ41
149
DQ42
157
DQ43
159
DQ44
146
DQ45
148
DQ46
158
DQ47
160
DQ48
163
DQ49
165
DQ50
175
DQ51
177
DQ52
164
DQ53
166
DQ54
174
DQ55
176
DQ56
181
DQ57
183
DQ58
191
DQ59
193
DQ60
180
DQ61
182
DQ62
192
DQ63
194
DQS0#
10
DQS1#
27
DQS2#
45
DQS3#
62
DQS4#
135
DQS5#
152
DQS6#
169
DQS7#
186
DQS0
12
DQS1
29
DQS2
47
DQS3
64
DQS4
137
DQS5
154
DQS6
171
DQS7
188
ODT0
116
ODT1
120
VREF_DQ
1
VSS 2
NP1 NP1
NP2 NP2
RAS# 110
WE# 113
CAS# 115
CS0# 114
CS1# 121
CKE0 73
CKE1 74
CK0 101
CK0# 103
CK1 102
CK1# 104
DM0 11
DM1 28
DM2 46
DM3 63
DM4 136
DM5 153
DM6 170
DM7 187
SDA 200
SCL 202
VDDSPD 199
SA0 197
SA1 201
VREF_CA
126
VDD18 124
NC#1 77
NC#2 122
NC#/TEST 125
VDD3 81
VDD4 82
VDD5 87
VDD6 88
VDD7 93
VDD8 94
VDD9 99
VDD10 100
VDD13 111
VDD14 112
VDD15 117
VDD16 118
VSS 3
VSS 8
VSS 9
VSS 13
VSS 14
VSS 19
VSS 20
VSS 25
VSS 26
VSS 31
VSS 32
VSS 37
VSS 38
VSS 43
VSS 44
VSS 48
VSS 49
VSS 54
VSS 55
VSS 60
VSS 61
VDD1 75
VSS 65
VSS 66
VSS 71
VSS 72
VDD2 76
VDD11 105
VDD12 106
VDD17 123
VSS 127
VSS 128
VSS 134
VSS 133
VSS 138
VSS 139
VSS 144
VSS 145
VSS 151
VSS 150
VSS 155
VSS 156
VSS 161
VSS 162
VSS 167
VSS 168
VSS 173
VSS 172
VSS 179
VSS 178
VSS 185
VSS 184
VSS 189
VSS 190
VSS 195
VSS 196
RESET#
30
EVENT# 198
VSS 205
VSS 206
VTT1
203
VTT2
204
DM1
DDR3-204P-82-GP
62.10017.U01
3rd = 62.10017.T61
2nd = 62.10017.T11
DM1
DDR3-204P-82-GP
62.10017.U01
3rd = 62.10017.T61
2nd = 62.10017.T11
12
R1405
0R2J-2-GP
R1405
0R2J-2-GP
12
R1404
0R2J-2-GP
R1404
0R2J-2-GP
![](asset-f.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
M_B_A1
M_B_DQ42
M_B_DQ41
M_B_DQ40
M_B_DQS#0
M_B_DQ43
M_B_DQ14
M_B_DQ13
M_B_DQ12
M_B_DQ15
M_B_DQS3
M_B_DQ0
M_B_A2
M_B_DQS#5
SA0_DIM1
SA1_DIM1
M_B_DQ46
M_B_DQ45
M_B_DQ44
M_B_DQ47
M_B_DQ19
M_B_DQ18
M_B_DQ17
M_B_DQ16
M_B_DQS4
M_B_A3
M_B_DQS#6
M_B_DQ51
M_B_DQ50
M_B_DQ49
M_B_DQ48
M_B_DQ23
M_B_DQ22
M_B_DQ21
M_B_DQ20
SA1_DIM1
M_B_DQ1
M_B_A4
M_B_DQS5
M_B_DQS#7
M_B_DQ53
M_B_DQ52
M_B_DQ24
M_B_DQ55
M_B_DQ54
M_B_DQ27
M_B_DQ26
M_B_DQ25
M_B_DQS#1
SA0_DIM1
M_B_DQ2
M_B_A5
M_B_DQS6
M_B_DQ57
M_B_DQ56
M_B_DQS0
M_B_DQ59
M_B_DQ58
M_B_DQ31
M_B_DQ30
M_B_DQ29
M_B_DQ28
M_B_A7
M_B_A6
M_B_A11
M_B_A10
M_B_A9
M_B_A8
M_B_DQ3
M_B_DQS#2
M_B_DQS7
M_B_DQ63
M_B_DQ62
M_B_DQ61
M_B_DQ60
M_B_DQ33
M_B_DQ32
M_B_DQ35
M_B_DQ34
M_B_DQS1
M_B_A12
M_B_A15
M_B_A14
M_B_A13
M_B_DQ5
M_B_DQ4
M_B_DQ7
M_B_DQ6
M_B_DQS#3
M_B_A0
M_B_DQ39
M_B_DQ38
M_B_DQ37
M_B_DQ36
M_B_DQ8
M_B_DQ11
M_B_DQ10
M_B_DQ9
M_B_DQS2
M_B_DQS#4
M_VREF_DQ_DIMM1
M_VREF_CA_DIMM1
M_VREF_DQ_DIMM1
M_VREF_CA_DIMM1
3D3V_S0
1D5V_S3
3D3V_S0
1D5V_S3
0D75V_S0
DDR_VREF_S3
DDR_VREF_S3
0D75V_S0
M_B_DQ[63:0]6
PCH_SMBCLK 14,20,65,66
PCH_SMBDATA 14,20,65,66
M_B_A[15:0] 6
M_B_DQS[7:0] 6
M_B_DQS#[7:0] 6
M_B_CAS# 6
M_B_DIM0_CS#0 6
M_B_DIM0_CS#1 6
M_B_DIM0_CKE0 6
M_B_DIM0_CKE1 6
M_B_DIM0_CLK_DDR0 6
M_B_DIM0_CLK_DDR#0 6
M_B_DIM0_CLK_DDR1 6
M_B_DIM0_CLK_DDR#1 6
M_B_RAS# 6
M_B_WE# 6
TS#_DIMM0_1 14
M_B_DIM0_ODT16
DDR3_DRAMRST#14,37
M_B_DIM0_ODT06
M_VREF_CA_DIMM17M_VREF_DQ_DIMM17
M_B_BS26
M_B_BS06 M_B_BS16
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
DDR3-SODIMM2
Custom
15 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
DDR3-SODIMM2
Custom
15 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
DDR3-SODIMM2
Custom
15 94
Tuesday, November 09, 2010
<Core Design>
Note:
SO-DIMMB SPD Address is 0xA4
SO-DIMMB TS Address is 0x34
SO-DIMMB is placed farther from
the Processor than SO-DIMMA
Place these caps
close to VTT1 and
VTT2.
SODIMM B DECOUPLING
Layout Note:
Place these Caps near
SO-DIMMB.
H = 5.2mm
SSID = MEMORY
12
C1520
SC1U6D3V2KX-GP
DY
C1520
SC1U6D3V2KX-GP
DY
1 2
R1503
0R2J-2-GP
R1503
0R2J-2-GP
A0
98
A1
97
A2
96
A3
95
A4
92
A5
91
A6
90
A7
86
A8
89
A9
85
A10/AP
107
A11
84
A12
83
A13
119
A14
80
A15
78
A16/BA2
79
BA0
109
BA1
108
DQ0
5
DQ1
7
DQ2
15
DQ3
17
DQ4
4
DQ5
6
DQ6
16
DQ7
18
DQ8
21
DQ9
23
DQ10
33
DQ11
35
DQ12
22
DQ13
24
DQ14
34
DQ15
36
DQ16
39
DQ17
41
DQ18
51
DQ19
53
DQ20
40
DQ21
42
DQ22
50
DQ23
52
DQ24
57
DQ25
59
DQ26
67
DQ27
69
DQ28
56
DQ29
58
DQ30
68
DQ31
70
DQ32
129
DQ33
131
DQ34
141
DQ35
143
DQ36
130
DQ37
132
DQ38
140
DQ39
142
DQ40
147
DQ41
149
DQ42
157
DQ43
159
DQ44
146
DQ45
148
DQ46
158
DQ47
160
DQ48
163
DQ49
165
DQ50
175
DQ51
177
DQ52
164
DQ53
166
DQ54
174
DQ55
176
DQ56
181
DQ57
183
DQ58
191
DQ59
193
DQ60
180
DQ61
182
DQ62
192
DQ63
194
DQS0#
10
DQS1#
27
DQS2#
45
DQS3#
62
DQS4#
135
DQS5#
152
DQS6#
169
DQS7#
186
DQS0
12
DQS1
29
DQS2
47
DQS3
64
DQS4
137
DQS5
154
DQS6
171
DQS7
188
ODT0
116
ODT1
120
VREF_DQ
1
VSS 2
NP1 NP1
NP2 NP2
RAS# 110
WE# 113
CAS# 115
CS0# 114
CS1# 121
CKE0 73
CKE1 74
CK0 101
CK0# 103
CK1 102
CK1# 104
DM0 11
DM1 28
DM2 46
DM3 63
DM4 136
DM5 153
DM6 170
DM7 187
SDA 200
SCL 202
VDDSPD 199
SA0 197
SA1 201
VREF_CA
126
VDD18 124
NC#1 77
NC#2 122
NC#/TEST 125
VDD3 81
VDD4 82
VDD5 87
VDD6 88
VDD7 93
VDD8 94
VDD9 99
VDD10 100
VDD13 111
VDD14 112
VDD15 117
VDD16 118
VSS 3
VSS 8
VSS 9
VSS 13
VSS 14
VSS 19
VSS 20
VSS 25
VSS 26
VSS 31
VSS 32
VSS 37
VSS 38
VSS 43
VSS 44
VSS 48
VSS 49
VSS 54
VSS 55
VSS 60
VSS 61
VDD1 75
VSS 65
VSS 66
VSS 71
VSS 72
VDD2 76
VDD11 105
VDD12 106
VDD17 123
VSS 127
VSS 128
VSS 134
VSS 133
VSS 138
VSS 139
VSS 144
VSS 145
VSS 151
VSS 150
VSS 155
VSS 156
VSS 161
VSS 162
VSS 167
VSS 168
VSS 173
VSS 172
VSS 179
VSS 178
VSS 185
VSS 184
VSS 189
VSS 190
VSS 195
VSS 196
RESET#
30
EVENT# 198
VSS 205
VSS 206
VTT1
203
VTT2
204
DM2
DDR3-204P-83-GP
62.10017.T91
3rd = 62.10017.T51
2nd = 62.10017.T01
DM2
DDR3-204P-83-GP
62.10017.T91
3rd = 62.10017.T51
2nd = 62.10017.T01
12
C1510
SC10U6D3V5KX-1GP
DY
C1510
SC10U6D3V5KX-1GP
DY
12
C1513
SCD1U10V2KX-5GP
C1513
SCD1U10V2KX-5GP
12
C1521
SC1U6D3V2KX-GP
C1521
SC1U6D3V2KX-GP
12
C1502
SC2D2U10V3KX-1GP
DY
C1502
SC2D2U10V3KX-1GP
DY
12
C1506
SC10U6D3V5KX-1GP
C1506
SC10U6D3V5KX-1GP
12
C1518
SC1U6D3V2KX-GP
DY
C1518
SC1U6D3V2KX-GP
DY
12
C1501
SCD1U10V2KX-5GP
C1501
SCD1U10V2KX-5GP
12
C1504
SC10U10V5ZY-1GP
DY
C1504
SC10U10V5ZY-1GP
DY
12
C1516
SC2D2U10V3KX-1GP
DY
C1516
SC2D2U10V3KX-1GP
DY
12
C1503
SC10U10V5ZY-1GP
DY
C1503
SC10U10V5ZY-1GP
DY
12
C1515
SCD1U10V2KX-5GP
C1515
SCD1U10V2KX-5GP
12
C1511
SCD1U10V2KX-5GP
C1511
SCD1U10V2KX-5GP
12
C1505
SC10U6D3V5KX-1GP
C1505
SC10U6D3V5KX-1GP
12
C1524
SC2D2U10V3KX-1GP
DY
C1524
SC2D2U10V3KX-1GP
DY
1 2
R1504
0R2J-2-GP
R1504
0R2J-2-GP
12
C1512
SCD1U10V2KX-5GP
C1512
SCD1U10V2KX-5GP
12
C1514
SCD1U10V2KX-5GP
C1514
SCD1U10V2KX-5GP
12
C1522
SCD1U10V2KX-5GP
C1522
SCD1U10V2KX-5GP
12
C1508
SC10U10V5ZY-1GP
DY
C1508
SC10U10V5ZY-1GP
DY
12
R1501
10KR2J-3-GP
R1501
10KR2J-3-GP
12
C1519
SC1U6D3V2KX-GP
C1519
SC1U6D3V2KX-GP
12
R1502
10KR2J-3-GP
R1502
10KR2J-3-GP
12
C1507
SC10U6D3V5KX-1GP
C1507
SC10U6D3V5KX-1GP
12
C1523
SCD1U10V2KX-5GP
C1523
SCD1U10V2KX-5GP
12
C1517
SCD1U10V2KX-5GP
C1517
SCD1U10V2KX-5GP
12
C1509
SC10U6D3V5KX-1GP
C1509
SC10U6D3V5KX-1GP
![](asset-10.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
DDR3-SODIMM2
A4
16 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
DDR3-SODIMM2
A4
16 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
DDR3-SODIMM2
A4
16 94
Tuesday, November 09, 2010
<Core Design>
(Blanking)
![](asset-11.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LVDS_VBG
LVDS_IBG
DAC_IREF_R
CRT_BLUE
LVDS_VDD_EN
L_CTRL_DATA
L_CTRL_DATA
L_CTRL_CLK
CRT_RED
L_BKLT_EN
DDBP_DATA0
DDBP_DATA0#
DDBP_DATA2#
DDBP_DATA2
DDBP_CLK#
DDBP_DATA1#
DDBP_CLK
DDBP_DATA1
CRT_GREEN
L_CTRL_CLK
3D3V_S0
3D3V_S0
PCH_HDMI_CLK 51
PCH_HDMI_DATA 51
L_BKLT_CTRL49
L_BKLT_EN27 LVDS_VDD_EN49
LVDS_DDC_CLK49 LVDS_DDC_DATA49
LVDSA_CLK#49 LVDSA_CLK49
LVDSA_DATA0#49 LVDSA_DATA1#49 LVDSA_DATA2#49
LVDSA_DATA049 LVDSA_DATA149 LVDSA_DATA249
CRT_BLUE50 CRT_GREEN50 CRT_RED50
CRT_VSYNC50 CRT_HSYNC50
CRT_DDC_CLK50 CRT_DDC_DATA50
HDMI_DATA2_R# 51
HDMI_DATA2_R 51
HDMI_DATA1_R# 51
HDMI_DATA1_R 51
HDMI_DATA0_R# 51
HDMI_DATA0_R 51
HDMI_CLK_R# 51
HDMI_CLK_R 51
PCH_HDMI_DET 51
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
PCH (LVDS/CRT/DDI)
A3
17 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
PCH (LVDS/CRT/DDI)
A3
17 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
PCH (LVDS/CRT/DDI)
A3
17 94
Tuesday, November 09, 2010
<Core Design>
Place near PCH
Impedance:90 ohm
Impedance:100 ohm
Close to level shifter side
Impedance:90 ohm
Close to PCH side
DDI Port B Detect:(SDVO_CTRL_ DATA)
1: Port B detected
0: Port B not detected
L_DDC_DATA(PAGE17):
This signal is on the LVDS interface.
This signal needs to be left NC if eDP is
used for the local flat panel display
12
R1702
1KR2D-1-GP
R1702
1KR2D-1-GP
1 2
C1707 SCD1U10V2KX-5GPC1707 SCD1U10V2KX-5GP
1 2
C1708 SCD1U10V2KX-5GPC1708 SCD1U10V2KX-5GP
1 2
C1703 SCD1U10V2KX-5GPC1703 SCD1U10V2KX-5GP
1 2
C1701 SCD1U10V2KX-5GPC1701 SCD1U10V2KX-5GP
12
R1701
2K37R2F-GP
R1701
2K37R2F-GP
L_BKLTCTL
P45
L_BKLTEN
J47
L_CTRL_CLK
T45
L_CTRL_DATA
P39
L_DDC_CLK
T40
L_DDC_DATA
K47
L_VDD_EN
M45
LVDSA_CLK#
AK39
LVDSA_CLK
AK40
LVDSA_DATA#0
AN48
LVDSA_DATA#1
AM47
LVDSA_DATA#2
AK47
LVDSA_DATA#3
AJ48
LVDSA_DATA0
AN47
LVDSA_DATA1
AM49
LVDSA_DATA2
AK49
LVDSA_DATA3
AJ47
LVDSB_CLK#
AF40
LVDSB_CLK
AF39
LVDSB_DATA#0
AH45
LVDSB_DATA#1
AH47
LVDSB_DATA#2
AF49
LVDSB_DATA#3
AF45
LVDSB_DATA0
AH43
DDPB_0N AV42
DDPB_1N AV45
LVD_VREFH
AE48
LVD_VREFL
AE47
DDPD_2N BF42
DDPD_3N BJ42
DDPB_2N AU48
DDPB_3N AV47
DDPC_0N AY47
DDPC_1N AY43
DDPC_2N BA47
DDPC_3N BB47
DDPD_0N BB43
DDPD_1N BF44
DDPB_0P AV40
DDPB_1P AV46
DDPD_2P BE42
DDPD_3P BG42
DDPB_2P AU47
DDPB_3P AV49
LVDSB_DATA1
AH49
LVDSB_DATA2
AF47
LVDSB_DATA3
AF43
LVD_IBG
AF37
LVD_VBG
AF36
DDPC_1P AY45
DDPC_0P AY49
DDPC_2P BA48
DDPC_3P BB49
DDPD_0P BB45
DDPD_1P BE44
CRT_BLUE
N48
CRT_DDC_CLK
T39
CRT_DDC_DATA
M40
CRT_GREEN
P49
CRT_HSYNC
M47
CRT_IRTN
T42
CRT_RED
T49
CRT_VSYNC
M49
DAC_IREF
T43
SDVO_CTRLCLK P38
SDVO_CTRLDATA M39
DDPC_CTRLCLK P46
DDPC_CTRLDATA P42
DDPD_CTRLCLK M43
DDPD_CTRLDATA M36
DDPB_AUXN AT49
DDPC_AUXN AP47
DDPD_AUXN AT45
DDPB_AUXP AT47
DDPC_AUXP AP49
DDPD_AUXP AT43
DDPB_HPD AT40
DDPC_HPD AT38
DDPD_HPD BH41
SDVO_TVCLKINP AP45
SDVO_TVCLKINN AP43
SDVO_STALLP AM40
SDVO_STALLN AM42
SDVO_INTP AP40
SDVO_INTN AP39
LVDS
Digital Display Interface
CRT
4 OF 10
Cougar
Point
PCH1D
COUGAR-GP-U2-NF
LVDS
Digital Display Interface
CRT
4 OF 10
Cougar
Point
PCH1D
COUGAR-GP-U2-NF
1 2
C1704 SCD1U10V2KX-5GPC1704 SCD1U10V2KX-5GP
1
2 3
4
RN1701
SRN2K2J-1-GP
RN1701
SRN2K2J-1-GP
1
TP1701TPAD14-GP TP1701TPAD14-GP
1 2
C1706 SCD1U10V2KX-5GPC1706 SCD1U10V2KX-5GP
1 2
C1705 SCD1U10V2KX-5GPC1705 SCD1U10V2KX-5GP
1
2 3
4
RN1706
SRN2K2J-1-GP
RN1706
SRN2K2J-1-GP
1
2
3
4 5
6
7
8
RN1705
SRN150F-1-GP
RN1705
SRN150F-1-GP
1
2 3
4
RN1702
SRN100KJ-6-GP
RN1702
SRN100KJ-6-GP
1 2
C1702 SCD1U10V2KX-5GPC1702 SCD1U10V2KX-5GP
![](asset-12.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
INT_PIRQB#
USB_OC#2_3
PCH_GPIO14
USB_OC#0_1
USB_OC#8_9
USB_OC#10_11
USB_OC#12_13
USB_OC#6_7
WWAN_IN
BBS_BIT1
CLK_PCI_LPC_R
CLK_PCI_FB_R
CLK_PCI_KBC_R
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#
INT_PIRQA#
PCI_PLTRST#
PCI_PME#
BBS_BIT0
NV_ALE
NV_CLE
PCI_GNT3#
USB_RBIAS
LAN_PWR_ON
BDC_PRESENCE#
LCD_PRESENCE#
INT_PIRQC#
INT_PIRQA#
NV_CLE
INT_PIRQD#
DGPU_PWR_EN#
DGPU_HOLD_RST#
DGPU_SELECT#
BDC_PRESENCE#
SATA_ODD_DA#
LCD_PRESENCE#
BBS_BIT1
DGPU_PWM_SELECT# PCI_GNT3#
DGPU_PWR_EN#
PCI_PLTRST#
NV_ALE
SATA_ODD_DA#
USB_OC#8_9 USB_OC#6_7
USB_OC#12_13
USB_OC#10_11
USB_OC#0_1 PCH_GPIO14
LAN_PWR_ON
USB_OC#2_3
3D3V_S0 3D3V_S0
3D3V_S0
+V_NVRAM_VCCQ
3D3V_S0
+V_NVRAM_VCCQ
3D3V_S5 3D3V_S5
USB_PN12 49
USB_PP12 49
USB_PN9 61
USB_PP9 61
USB_PN11 65
USB_PP11 65
USB_PN1 61
USB_PP1 61
USB_PN3 63
USB_PP3 63
USB_PN4 66
USB_PP4 66
USB_PN8 57
USB_PP8 57
H_SNB_IVB# 5
BBS_BIT0 21
USB_PP2 69
USB_PN2 69
CLK_PCI_LPC65,71 CLK_PCI_FB20 CLK_PCI_KBC27
DGPU_HOLD_RST#83
USB_PP13 82
USB_PN13 82
USB_PP10 82
USB_PN10 82
USB_OC#10_11 82
USB_OC#8_9 57,61
USB_OC#0_1 61
LAN_PWR_ON 31
LCD_PRESENCE#49
BDC_PRESENCE#63 SATA_ODD_DA#56
DGPU_PWR_EN#93
PLT_RST#5,27,32,36,65,66,71,80,82,83
WWAN_IN66
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
PCH (PCI/USB/NVRAM)
A3
18 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
PCH (PCI/USB/NVRAM)
A3
18 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
PCH (PCI/USB/NVRAM)
A3
18 94Tuesday, November 09, 2010
<Core Design>
Danbury Technology:
Disabled when Low.
Enable when High.
13
KBC CLK EMI
Reserved
12
X
01
11
BOOT BIOS Strap
GNT1#/GPIO51 BOOT BIOS LocationSATA1GP/GPIO19
0 1 Reserved
SPI(Default)
SSID = PCH
0 0 LPC
A16 swap override Strap/Top-Block
Swap Override jumper
PCI_GNT#3 Low = A16 swap
override/Top-Block
Swap Override enabled
High = Default
X
NV_CLE Set to Vss when LOW
DMI & FDI Termination Voltage
Set to Vcc when HIGH
10
0
11
USB2
Pair
4
USB
5
2
3
1
Device
6
7
8
9
OC[3:0]# for Device 29 (Ports 0-7)
OC[7:4]# for Device 26 (Ports 8-13)
FINGERPRINT
BLUETOOTH
Mini Card2 (WWAN)
Mini Card1 (WLAN)
New Card
USB1
USB Ext. port 4
CAMERA
ESATA1
X
X
1 2
R1803 1KR2J-1-GP
DY
R1803 1KR2J-1-GP
DY
1 2
EC1802
SC4D7P50V2CN-1GP
DY
EC1802
SC4D7P50V2CN-1GP
DY
1 2
R1814
8K2R2J-3-GP
R1814
8K2R2J-3-GP
B1
A2
GND 3
Y
4
VCC
5
U1801
74LVC1G08GW-1-GP
73.01G08.L04
DY
2ND = 73.7SZ08.DAH
U1801
74LVC1G08GW-1-GP
73.01G08.L04
DY
2ND = 73.7SZ08.DAH
RSVD AV5
RSVD AY7
RSVD AV7
RSVD AU3
RSVD BG4
DF_TVS AY1
RSVD AT10
RSVD BC8
RSVD AU2
RSVD AT4
RSVD BB5
RSVD BB3
RSVD BB7
RSVD BE8
RSVD BD4
RSVD BF6
RSVD AT3
RSVD AT1
RSVD AY3
RSVD AT5
RSVD AV3
RSVD AV1
RSVD BB1
RSVD BA3
RSVD AT8
RSVD AV10
RSVD AY5
RSVD BA2
RSVD AT12
RSVD BF3
PIRQA#
K40
PIRQB#
K38
PIRQC#
H38
PIRQD#
G38
REQ1#/GPIO50
C46
REQ2#/GPIO52
C44
REQ3#/GPIO54
E40
GNT1#/GPIO51
D47
GNT2#/GPIO53
E42
GNT3#/GPIO55
F46
PIRQE#/GPIO2
G42
PIRQF#/GPIO3
G40
PIRQG#/GPIO4
C42
PIRQH#/GPIO5
D44
USBP0N C24
USBP0P A24
USBP1N C25
USBP1P B25
USBP2N C26
USBP2P A26
USBP3N K28
USBP3P H28
USBP4N E28
USBP4P D28
USBP5N C28
USBP5P A28
USBP6N C29
USBP6P B29
USBP7N N28
USBP7P M28
USBP8N L30
USBP8P K30
USBP9N G30
USBP9P E30
USBP10N C30
USBP10P A30
USBP11N L32
USBP11P K32
USBP12N G32
USBP12P E32
USBP13N C32
USBP13P A32
PME#
K10
CLKOUT_PCI0
H49
CLKOUT_PCI1
H43
CLKOUT_PCI2
J48
USBRBIAS# C33
USBRBIAS B33
OC0#/GPIO59 A14
OC1#/GPIO40 K20
OC2#/GPIO41 B17
OC3#/GPIO42 C16
OC4#/GPIO43 L16
OC5#/GPIO9 A16
OC6#/GPIO10 D14
OC7#/GPIO14 C14
CLKOUT_PCI4
H40 CLKOUT_PCI3
K42
PLTRST#
C6
TP1
BG26
TP2
BJ26
TP3
BH25
TP6
AH38
TP7
AH37
TP8
AK43
TP9
AK45
TP16
Y13
TP17
K24
TP18
L24
TP19
AB46
TP20
AB45
TP21
B21
TP22
M20
TP23
AY16
TP25
BE28
TP26
BC30
TP27
BE32
TP28
BJ32
TP29
BC28
TP30
BE30
TP31
BF32
TP32
BG32
TP33
AV26
TP34
BB26
TP35
AU28
TP36
AY30
TP37
AU26
TP38
AY26
TP39
AV28
TP40
AW30
TP4
BJ16
TP5
BG16
TP15
AM5 TP14
AM4 TP13
AH12 TP12
H3 TP11
N30 TP10
C18
TP24
BG46
RSVD
NVRAM
PCI
USB
5 OF 10
Cougar
Point
PCH1E
COUGAR-GP-U2-NF
RSVD
NVRAM
PCI
USB
5 OF 10
Cougar
Point
PCH1E
COUGAR-GP-U2-NF
1 2
R1804 22R2J-2-GPR1804 22R2J-2-GP
12
R1810
1KR2J-1-GP
DY
R1810
1KR2J-1-GP
DY
1 2
R1802 1KR2J-1-GP
DY
R1802 1KR2J-1-GP
DY
1 2
EC1801
SC4D7P50V2CN-1GP
DY
EC1801
SC4D7P50V2CN-1GP
DY
1
TP1806TP1806
1 2
R1811 22D6R2F-L1-GPR1811 22D6R2F-L1-GP
1
2
3
4
5 6
7
8
9
10
RN1802
SRN8K2J-2-GP-U
RN1802
SRN8K2J-2-GP-U
1 2
R1805 22R2J-2-GPR1805 22R2J-2-GP
12
R1801 4K7R2J-2-GP
DY
R1801 4K7R2J-2-GP
DY
1
2
3
4
5 6
7
8
9
10
RN1801
SRN8K2J-2-GP-U
RN1801
SRN8K2J-2-GP-U
1 2
R1807 0R2J-2-GPR1807 0R2J-2-GP
1
TP1801TP1801
1 2
R1806 22R2J-2-GPR1806 22R2J-2-GP
1 2
R1809
1KR2J-1-GP
R1809
1KR2J-1-GP
1
2 3
4
RN1803
SRN10KJ-5-GP
RN1803
SRN10KJ-5-GP
1
TP1804TP1804
12
R1808
2K2R2J-2-GP
R1808
2K2R2J-2-GP
12
C1802
SC220P50V2KX-3GP
DY
C1802
SC220P50V2KX-3GP
DY
12
C1801
SC220P50V2KX-3GP
DY
C1801
SC220P50V2KX-3GP
DY
12
R1816
100KR2J-1-GP
DY
R1816
100KR2J-1-GP
DY
![](asset-13.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PWROK
PM_CLKRUN#
MEPWROK
SUS_PWR_ACK
RBIAS_CPY
SYS_RESET#
SUS_PWR_ACK
H_PM_SYNC
PCIE_WAKE#
DSWODVREN
SLP_S4#_R
PM_RSMRST#
PM_SUS_STAT#
SUS_CLK
AC_PRESENT
SUSACK#SUS_PWR_ACK
SLP_S3#_R
PM_SLP_A#
PM_SLP_SUS#
PM_SLP_S5#
PM_SLP_LAN#
PM_CLKRUN#
DSWODVREN
PM_RSMRST#
PCH_DPWROK
PM_RSMRST#
DMI_COMP_R
AC_PRESENT
PM_SLP_LAN#
PCIE_WAKE#
PM_PWRBTN#
PM_RSMRST#
3V_5V_POK_#
PWROKSYS_PWROK
RTC_AUX_S5
3D3V_S5
3D3V_S0
1D05V_VTT
RTC_AUX_S5
3D3V_AUX_S5
3D3V_S0
H_PM_SYNC 5
PM_CLKRUN# 27
DMI_TXN04
DMI_RXN04 DMI_RXN14 DMI_RXN24 DMI_RXN34
DMI_RXP04 DMI_RXP14 DMI_RXP24 DMI_RXP34
DMI_TXN14 DMI_TXN24
DMI_TXP04
DMI_TXN34
DMI_TXP14 DMI_TXP24 DMI_TXP34
XDP_DBRESET#5,11
PM_DRAM_PWRGD5,37
SYS_PWROK36
S0_PWR_GOOD27,36
PM_PWRBTN#27
AC_PRESENT27
SUS_PWR_ACK27
RUNPWROK36,37,45,46,47
3V_5V_POK 41
PCIE_WAKE# 65,82
FDI_INT 4
FDI_FSYNC0 4
FDI_FSYNC1 4
FDI_LSYNC0 4
FDI_LSYNC1 4
PCH_SUSCLK_KBC 27
PM_SLP_S4# 27,46,82
PM_SLP_S3# 27,36,37,47,82
FDI_TXN0 4
FDI_TXP0 4
FDI_TXN1 4
FDI_TXP1 4
FDI_TXP2 4
FDI_TXN2 4
FDI_TXN3 4
FDI_TXP3 4
FDI_TXP4 4
FDI_TXN4 4
FDI_TXP5 4
FDI_TXN5 4
FDI_TXN6 4
FDI_TXP6 4
FDI_TXP7 4
FDI_TXN7 4
RSMRST#_KBC 27
PM_RSMRST#11
DMI_RXP[3..0]4 DMI_RXN[3..0]4
DMI_TXP[3..0]4 DMI_TXN[3..0]4 FDI_TXP[7:0] 4
FDI_TXN[7:0] 4
BATLOW#20
PM_RI#20
PEG_B_CLK_RQ# 20
D85V_PWRGD42,48
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
PCH (DMI/FDI/PM)
A3
19 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
PCH (DMI/FDI/PM)
A3
19 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
PCH (DMI/FDI/PM)
A3
19 94Tuesday, November 09, 2010
<Core Design>
DSWODVREN - On Die DSW VR Enable
HIGH Enabled (DEFAULT)
LOW Disabled
SSID = PCH
S0_PWR_GOOD after PM_SLP_S3# delay 200 ms
PCIE_WAKE#
CRB : 1K
CEKLT: 10K
PM_RSMRST#
CRB : PL 10K
ANNIE : PL 100K
For platforms not supporting Deep S4/S5
1.VccSUS3_3 and VccDSW3_3 will rise at the same time (connected on board)
2.DPWROK and RSMRST# will rise at the same time (connected on board)
3.SLP_SUS# and SUSACK# are left as ‘no connect’
4.SUSWARN# used as SUSPWRDNACK/GPIO30
Signal Routing Guideline:
DMI_ZCOMP keep W=4 mils and
routing length less than 500
mils.
DMI_IRCOMP keep W=4 mils and
routing length less than 500
mils.
Need Check!!
1 2
R1919 8K2R2J-3-GPR1919 8K2R2J-3-GP
1
TP1904TPAD14-GPTP1904TPAD14-GP
DMI0RXN
BC24
DMI1RXN
BE20
DMI2RXN
BG18
DMI3RXN
BG20
DMI0RXP
BE24
DMI1RXP
BC20
DMI2RXP
BJ18
DMI3RXP
BJ20
DMI0TXN
AW24
DMI1TXN
AW20
DMI2TXN
BB18
DMI3TXN
AV18
DMI0TXP
AY24
DMI1TXP
AY20
DMI2TXP
AY18
DMI3TXP
AU18
DMI_ZCOMP
BJ24
DMI_IRCOMP
BG25
FDI_RXN0 BJ14
FDI_RXN1 AY14
FDI_RXN2 BE14
FDI_RXN3 BH13
FDI_RXN4 BC12
FDI_RXN5 BJ12
FDI_RXN6 BG10
FDI_RXN7 BG9
FDI_RXP0 BG14
FDI_RXP1 BB14
FDI_RXP2 BF14
FDI_RXP3 BG13
FDI_RXP4 BE12
FDI_RXP5 BG12
FDI_RXP6 BJ10
FDI_RXP7 BH9
FDI_FSYNC0 AV12
FDI_FSYNC1 BC10
FDI_LSYNC0 AV14
FDI_LSYNC1 BB10
FDI_INT AW16
PMSYNCH AP14
SLP_SUS# G16
SLP_S3# F4
SLP_S4# H4
SLP_S5#/GPIO63 D10
SYS_RESET#
K3
SYS_PWROK
P12
PWRBTN#
E20
RI#
A10
WAKE# B9
SUS_STAT#/GPIO61 G8
SUSCLK/GPIO62 N14
ACPRESENT/GPIO31
H20
BATLOW#/GPIO72
E10
PWROK
L22
CLKRUN#/GPIO32 N3
SUSWARN#/SUSPWRDNACK/GPIO30
K16
RSMRST#
C21
DRAMPWROK
B13
SLP_LAN#/GPIO29 K14
APWROK
L10
DPWROK E22
DMI2RBIAS
BH21
SLP_A# G10
DSWVRMEN A18
SUSACK#
C12
DMI
FDI
System Power Management
3 OF 10
Cougar
Point
PCH1C
COUGAR-GP-U2-NF
DMI
FDI
System Power Management
3 OF 10
Cougar
Point
PCH1C
COUGAR-GP-U2-NF
1 2
R1904
100KR2J-1-GP
R1904
100KR2J-1-GP
1 2
R1917 330KR2J-L1-GPR1917 330KR2J-L1-GP
1
2
3
45
6
7
8
RN1901
SRN10KJ-6-GP
RN1901
SRN10KJ-6-GP
1 2
R1915 0R2J-2-GPR1915 0R2J-2-GP
1 2
R1923 0R2J-2-GP
DY
R1923 0R2J-2-GP
DY
1 2
R1926
10KR2J-3-GP
DY
R1926
10KR2J-3-GP
DY
12
R1922 10KR2J-3-GP
DY
R1922 10KR2J-3-GP
DY
1 2
R1927 0R2J-2-GPR1927 0R2J-2-GP
1
TP1901 TPAD14-GPTP1901 TPAD14-GP
1 2
R1903 0R2J-2-GP
DY
R1903 0R2J-2-GP
DY
1 2
R1910 0R2J-2-GPR1910 0R2J-2-GP
12
R1916
10KR2J-3-GP
R1916
10KR2J-3-GP
1 2
R1905 10KR2J-3-GPR1905 10KR2J-3-GP
1
TP1903TPAD14-GPTP1903TPAD14-GP
1
TP1905TPAD14-GPTP1905TPAD14-GP
1 2
R1907 0R2J-2-GP
DY
R1907 0R2J-2-GP
DY
1 2
R1901 49D9R2F-GPR1901 49D9R2F-GP
1
2
34
5
6
Q1901
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
Q1901
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
1 2
R1914 0R2J-2-GPR1914 0R2J-2-GP
12
R1908 10KR2J-3-GPR1908 10KR2J-3-GP
1 2
R1902 750R2F-GPR1902 750R2F-GP
1 2
R1909 100KR2J-1-GPR1909 100KR2J-1-GP
12
R1920 10KR2J-3-GPR1920 10KR2J-3-GP
1 2
R1912 1KR2J-1-GPR1912 1KR2J-1-GP
1 2
R1906 0R2J-2-GPR1906 0R2J-2-GP
12
R1921 10KR2J-3-GPR1921 10KR2J-3-GP
1 2
R1925 0R2J-2-GP
DY
R1925 0R2J-2-GP
DY
1 2
R1918 330KR2J-L1-GP
DY
R1918 330KR2J-L1-GP
DY
1
TP1902 TPAD14-GPTP1902 TPAD14-GP
1 2
R1913 0R2J-2-GPR1913 0R2J-2-GP
1 2
R1924 0R2J-2-GPR1924 0R2J-2-GP
1 2
R1911 10KR2J-3-GP
DY
R1911 10KR2J-3-GP
DY
![](asset-14.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SML1_CLK
PCIE_CLK_WLAN_RQ3#
PCIE_CLK_RQ4#
PCIE_CLK_NEW _RQ5#
PCIE_CLK_LAN_RQ0#
EC_SW I#
PEG_CLKREQ#_R
SML1_DATA
PCH_GPIO74
DRAMRST_CNTRL_PCH
SMB_DATA
XCLK_RCOMP
CLK_BUF_REF14
SML0_DATA
SML0_CLK
CL_CLK
CL_DATA
CL_RST#
SMB_DATA
SML0_CLK
PCIE_TXP4_C
PCIE_TXN4_C
PCIE_TXP3_C
PCIE_TXN3_C
PCIE_TXP2_C
PCIE_TXN2_C
SML1_DATA
SML1_CLK
CLK_BUF_DOT96_P
CLK_BUF_DOT96_N
CLK_BUF_CKSSCD_N
SMB_CLK
PEG_CLKREQ#_R
SML0_DATA
SMB_CLK
SMB_DATA
CLK_BUF_CPYCLK_N
CLK_BUF_CPYCLK_P
PCIE_CLK_LAN_RQ0#
PCIE_CLK_RQ1#
XTAL25_IN
PCIE_CLK_RQ6#
CLK_BUF_EXP_N
CLK_BUF_EXP_P
SMB_CLK
XTAL25_OUT
CLK_BUF_CKSSCD_P
XTAL25_IN
XTAL25_OUT
PCH_GPIO74
PCIE_CLK_RQ6#
CLK_BUF_CPYCLK_P
CLK_BUF_CPYCLK_N
CLK_BUF_REF14
CLK_BUF_EXP_P
CLK_BUF_EXP_N
CLK_BUF_DOT96_N
CLK_BUF_DOT96_P
PCIE_CLK_CR_RQ2#
PCIE_CLK_WLAN_RQ3#
CLK_PCH_SRC3_P
CLK_PCH_SRC3_N
CLK_PCH_SRC2_P
CLK_PCH_SRC2_N
PCIE_CLK_RQ4#
PCIE_CLK_NEW _RQ5#
DRAMRST_CNTRL_PCH
PCIE_CLK_RQ7#
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_DMI_N
CLKOUT_DMI_P
CLKOUT_DP_N
CLKOUT_DP_P
JTAG_TCK
CLK_48_USB30
LAN_25M
DGPU_PRSNT#
XTAL25_IN
PCIE_RXP1
PCIE_RXN1
PCIE_TXP1_C
PCIE_TXN1_C
PCIE_CLK_CR_RQ2#
DGPU_PRSNT#
UMA_DIS#
PCIE_TXP8_C
PCIE_TXN8_C
PCIE_CLK_RQ7#
PCIE_CLK_RQ1#
CLK_PCH_SRC0_P
CLK_PCH_SRC0_N
CLK_PCH_SRC5_N
CLK_PCH_SRC5_P
3D3V_S5
+VCCDIFFCLKN
3D3V_S0
3D3V_S5 3D3V_S5
3D3V_S0
3D3V_S0 3D3V_S0
PCIE_RXN282 PCIE_RXP282 PCIE_TXN282 PCIE_TXP282
PCIE_RXN332 PCIE_RXP332 PCIE_TXN332 PCIE_TXP332
PCIE_RXN465 PCIE_RXP465 PCIE_TXN465 PCIE_TXP465
PCH_SMBDATA 14,15,65,66
PCH_SMBCLK 14,15,65,66
SML1_DATA 27
SML1_CLK 27
SMB_CLK 80,82
SMB_DATA 80,82
DRAMRST_CNTRL_PCH 37
CLK_PCIE_CR#32 CLK_PCIE_CR32
PCIE_CLK_CR_RQ2#32
PCIE_CLK_WLAN_RQ3#65
CLK_PCIE_WLAN#65 CLK_PCIE_WLAN65
PCIE_CLK_XDP_N7,11 PCIE_CLK_XDP_P7,11
PEG_CLKREQ# 85
CLK_PCIE_VGA# 83
CLK_PCIE_VGA 83
CLK_EXP_N 5
CLK_EXP_P 5
CLK_DP_N_R 5
CLK_DP_P_R 5
CLK_PCI_FB 18
JTAG_TCK_VGA 83,85
LAN_XI 82
UMA_DIS# 22
PCIE_RXN882 PCIE_RXP882 PCIE_TXN882 PCIE_TXP882
CLK_PCIE_LAN#82 CLK_PCIE_LAN82
PCIE_CLK_LAN_RQ0#82
CLK_PCIE_NEW82 CLK_PCIE_NEW #82
PCIE_CLK_NEW _RQ5#82
PEG_B_CLK_RQ#19
BATLOW# 19
PM_RI# 19
EC_SW I# 27
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
PCH (PCI-E/SMBUS/CLOCK/CL)
A2
20 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
PCH (PCI-E/SMBUS/CLOCK/CL)
A2
20 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
PCH (PCI-E/SMBUS/CLOCK/CL)
A2
20 94Tuesday, November 09, 2010
<Core Design>
LAN
WLAN
SSID = PCH
PL 10K FOR Integrated CLOCK GEN mode.
need very close to PCH
PCIECLKRQ{0,3,4,5,6,7}# should have a 10K pull-up to +3.3V_ALW.
PCIECLKRQ{1,2} should have a 10K pull-up to +3.3_RUN
Card Reader
LAN CLK
CARD READER CLK
WLAN CLK
CRB : 1K
CEKLT: 10K
R2008 and C2008 CO-LAY
For VGA_ 27M
PCIECLKRQ1# and PCIECLKRQ2#
support S0 power only
UMA_DISCRETE#
UMA: 1 1
DIS :0 1
SG(PX) : 0 0
Optimus(Muxless) : 1 0
NEW CARD
N/A 84.2N702.A3F
84.DM601.03F
PANJIT
DIODES
Description Lenovo P/N Wistron P/N
N/ADMN601DWK-7
2N7002KDW
Supplier
Table 20.1- Dual N-Channel MOSFET multi-source
84.2N702.E3FNXP N/A2N7002BKS
1
2 3
4
RN2016 SRN0J-6-GPRN2016 SRN0J-6-GP
12
C2007
SC12P50V2JN-3GP
C2007
SC12P50V2JN-3GP
1 2
R2009 1KR2J-1-GP
R2009 1KR2J-1-GP
1
TP2004TPAD14-GP TP2004TPAD14-GP
1
23
4
RN2003
SRN2K2J-1-GP
RN2003
SRN2K2J-1-GP
12
R2005
10KR2J-3-GP
DY
R2005
10KR2J-3-GP
DY
12
R2010
10KR2J-3-GP
DY
R2010
10KR2J-3-GP
DY
1 2
R2001 22R2J-2-GP
DY
R2001 22R2J-2-GP
DY
1
2 3
4
RN2010 SRN0J-6-GPRN2010 SRN0J-6-GP
1 2
C2004 SCD1U10V2KX-5GPC2004 SCD1U10V2KX-5GP
1
TP2005TPAD14-GP TP2005TPAD14-GP
1
2 3
4
RN2006
SRN10KJ-5-GP
RN2006
SRN10KJ-5-GP
12
R2013
10KR2J-3-GP
UMA
R2013
10KR2J-3-GP
UMA
1
TP2006TPAD14-GP TP2006TPAD14-GP
1 2
C2002 SCD1U10V2KX-5GPC2002 SCD1U10V2KX-5GP
1
TP2007TPAD14-GP TP2007TPAD14-GP
12
R2012
10KR2J-3-GP
R2012
10KR2J-3-GP
12
R2004
10KR2J-3-GP
R2004
10KR2J-3-GP
1
2 3
4
RN2011
SRN10KJ-5-GP
RN2011
SRN10KJ-5-GP
1
2
34
5
6
Q2001
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
Q2001
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
1
2 3
4
RN2014 SRN0J-6-GPRN2014 SRN0J-6-GP
1
2 3
4
RN2015 SRN0J-6-GPRN2015 SRN0J-6-GP
12
R2011
10KR2J-3-GP
PX
R2011
10KR2J-3-GP
PX
1 2
X2001
XTAL-25MHZ-96GP
X2001
XTAL-25MHZ-96GP
1 2
C2003 SCD1U10V2KX-5GPC2003 SCD1U10V2KX-5GP
1
2
3
4
5 6
7
8
9
10
RN2009
SRN10KJ-L3-GP
RN2009
SRN10KJ-L3-GP
1 2
R2008 0R2J-2-GP
DY
R2008 0R2J-2-GP
DY
1
23
4
RN2004
SRN2K2J-1-GP
RN2004
SRN2K2J-1-GP
1
TP2001 TPAD14-GPTP2001 TPAD14-GP
1
2 3
4
RN2012 SRN0J-6-GPRN2012 SRN0J-6-GP
12
C2008
SC12P50V2JN-3GP
C2008
SC12P50V2JN-3GP
1 2
C2009 SCD1U10V2KX-5GPC2009 SCD1U10V2KX-5GP
1
2 3
4
RN2018
SRN10KJ-5-GP
RN2018
SRN10KJ-5-GP
1 2
R2003 0R2J-2-GP
PX
R2003 0R2J-2-GP
PX
1
2
3
4 5
6
7
8
RN2001
SRN10KJ-6-GP
RN2001
SRN10KJ-6-GP
1 2
R2015 22R2J-2-GP
DY
R2015 22R2J-2-GP
DY
1
TP2003 TPAD14-GPTP2003 TPAD14-GP
1 2
C2010 SCD1U10V2KX-5GPC2010 SCD1U10V2KX-5GP
1 2
C2005 SCD1U10V2KX-5GPC2005 SCD1U10V2KX-5GP
1
2 3
4
RN2007
SRN2K2J-1-GP
RN2007
SRN2K2J-1-GP
1
TP2002 TPAD14-GPTP2002 TPAD14-GP
1
2 3
4
RN2013 SRN0J-6-GPRN2013 SRN0J-6-GP
1 2
C2001 SCD1U10V2KX-5GPC2001 SCD1U10V2KX-5GP
1 2
R2006
1M1R2J-GP
R2006
1M1R2J-GP
1 2
R2007 90D9R2F-1-GPR2007 90D9R2F-1-GP
PERN1
BG34
PERP1
BJ34
PERN2
BE34
PERP2
BF34
PERN3
BG36
PERP3
BJ36
PERN4
BF36
PERP4
BE36
PERN5
BG37
PERP5
BH37
PERN6
BJ38
PERP6
BG38
PERN7
BG40
PERP7
BJ40
PERN8
BE38
PERP8
BC38
PETN1
AV32
PETP1
AU32
PETN2
BB32
PETP2
AY32
PETN3
AV34
PETP3
AU34
PETN4
AY34
PETP4
BB34
PETN5
AY36
PETP5
BB36
PETN6
AU36
PETP6
AV36
PETN7
AY40
PETP7
BB40
PETN8
AW38
PETP8
AY38
CLKOUT_PCIE0N
Y40
CLKOUT_PCIE0P
Y39
CLKOUT_PCIE1N
AB49
CLKOUT_PCIE1P
AB47
CLKOUT_PCIE2N
AA48
CLKOUT_PCIE2P
AA47
CLKOUT_PCIE3N
Y37
CLKOUT_PCIE3P
Y36
CLKOUT_PCIE4N
Y43
CLKOUT_PCIE4P
Y45
CLKOUT_PCIE5N
V45
CLKOUT_PCIE5P
V46
CLKIN_GND1_N BJ30
CLKIN_GND1_P BG30
CLKIN_DMI_N BF18
CLKIN_DMI_P BE18
CLKIN_DOT_96N G24
CLKIN_DOT_96P E24
CLKIN_SATA_N AK7
CLKIN_SATA_P AK5
XTAL25_IN V47
XTAL25_OUT V49
REFCLK14IN K45
CLKIN_PCILOOPBACK H45
CLKOUT_PEG_A_N AB37
CLKOUT_PEG_A_P AB38
PEG_A_CLKRQ#/GPIO47 M10
PCIECLKRQ0#/GPIO73
J2
PCIECLKRQ1#/GPIO18
M1
PCIECLKRQ2#/GPIO20
V10
PCIECLKRQ3#/GPIO25
A8
PCIECLKRQ4#/GPIO26
L12
PCIECLKRQ5#/GPIO44
L14
CLKOUTFLEX0/GPIO64 K43
CLKOUTFLEX1/GPIO65 F47
CLKOUTFLEX2/GPIO66 H47
CLKOUTFLEX3/GPIO67 K49
CLKOUT_DMI_N AV22
CLKOUT_DMI_P AU22
PEG_B_CLKRQ#/GPIO56
E6
CLKOUT_PEG_B_P
AB40 CLKOUT_PEG_B_N
AB42
XCLK_RCOMP Y47
CLKOUT_DP_P AM13
CLKOUT_DP_N AM12
CLKOUT_PCIE6N
V40
CLKOUT_PCIE6P
V42
PCIECLKRQ7#/GPIO46
K12
CLKOUT_PCIE7N
V38
CLKOUT_PCIE7P
V37
CLKOUT_ITPXDP_N
AK14
CLKOUT_ITPXDP_P
AK13
SMBALERT#/GPIO11 E12
SMBCLK H14
SMBDATA C9
SML0ALERT#/GPIO60 A12
SML0CLK C8
SML0DATA G12
SML1ALERT#/PCHHOT#/GPIO74 C13
SML1CLK/GPIO58 E14
SML1DATA/GPIO75 M16
CL_CLK1 M7
CL_DATA1 T11
CL_RST1# P10
PCIECLKRQ6#/GPIO45
T13
PCI-E*
CLOCKS
FLEX CLOCKS
SMBUSController
Link
2 OF 10
Cougar
Point
PCH1B
COUGAR-GP-U2-NF
PCI-E*
CLOCKS
FLEX CLOCKS
SMBUSController
Link
2 OF 10
Cougar
Point
PCH1B
COUGAR-GP-U2-NF
1
2 3
4
RN2017 SRN0J-6-GP
DY
RN2017 SRN0J-6-GP
DY
1
TP2008 TPAD14-GPTP2008 TPAD14-GP
1
2
3
4 5
6
7
8
RN2002
SRN10KJ-6-GP
RN2002
SRN10KJ-6-GP
1 2
C2006 SCD1U10V2KX-5GPC2006 SCD1U10V2KX-5GP
1
2 3
4
RN2005
SRN2K2J-1-GP
RN2005
SRN2K2J-1-GP
![](asset-15.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
HDA_BITCLK
HDA_RST#
HDA_SYNC
HDA_BITCLK
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
PCH_GPIO33
RBIAS_SATA3
SATA_COMP
SPI_CS0#_R
HDA_RST#
PCH_TCK
RTC_X2
SM_INTRUDER#
RTC_X2
RTC_X1
SRTC_RST#
PCH_INTVRMEN
SRTC_RST#
BBS_BIT0
RTC_X1
RTC_RST#
SATA3_COMP
HDA_SPKR
HDA_SYNC
HDA_RST#
HDA_SDOUT
HDA_BITCLK
HDA_SDOUT
LPC_AD[0..3]
HDA_SYNC
HDA_SDOUT
SPI_CS0#_R
HDA_CODEC_SDOUT
PCH_GPIO33
PCH_TCK
BBS_BIT0
LW_GG_SEL
LW_GG_SEL
RTC_RST#
RTC_AUX_S5
RTC_AUX_S5
1D05V_VTT
1D05V_VTT
3D3V_S0
+3VS_+1.5VS_HDA_IO
+3VS_+1.5VS_HDA_IO
3D3V_S0 3D3V_S0
3D3V_S0
LPC_AD[0..3] 27,65,71
HDA_CODEC_BITCLK29 HDA_CODEC_RST#29
HDA_CODEC_SDOUT29 HDA_CODEC_SYNC29
HDA_SPKR29
HDA_SDIN029
SPI_CLK_R27,60
SPI_SO_R27,60
SPI_CS0#_R27,60
SPI_SI_R27,60
SATA_RXN0 56
BBS_BIT0 18
LPC_FRAME# 27,65,71
INT_SERIRQ 22,27
SATA_TXP0 56
SATA_RXP0 56
SATA_TXN0 56
SATA_RXN1 66
SATA_TXP1 66
SATA_RXP1 66
SATA_TXN1 66
SATA_RXN4 56
SATA_TXN4 56
SATA_RXP4 56
SATA_TXP4 56
SATA_RXN5 57
SATA_TXP5 57
SATA_RXP5 57
SATA_TXN5 57
PCH_TCK11
PCH_TMS11
PCH_TDI11
PCH_TDO11
SATA_DET#0 22
SATA_LED# 22
PSW_CLR#22 MFG_MODE22 S_GPIO22
ME_UNLOCK27
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
PCH (SPI/RTC/LPC/SATA/IHDA)
A3
21 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
PCH (SPI/RTC/LPC/SATA/IHDA)
A3
21 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
PCH (SPI/RTC/LPC/SATA/IHDA)
A3
21 94Tuesday, November 09, 2010
<Core Design>
For EMI
SSID = PCH
INTVRMEN- Integrated SUS
1.05V VRM Enable
High - Enable internal VRs
Low - Enable external VRs
ESATA
ODD
HDD
NO REBOOT STRAP
No Reboot Strap
HDA_SPKR Low = Default
High = No Reboot
HDA_SDOUT Low = Default
High = Enable
Flash Descriptor Security Overide
PLL ODVR VOLTAGE
HDA_SYNC Low = 1.8V (Default)
High = 1.5V
This signal has a weak internal pull down.
On Die PLL VR is supplied by 1.5V when
sampled high, 1.8 V when sampled low.
Needs to be pulled High for Huron River platform.
co-operate with R2310
mSATA
HDA_SYNC: This strap is sampled on rising edge of RSMRST# and is used to
sample 1.5V VccVRM supply mode. 1K external pull-up resistor is required on this
signal on the board. Signal may have leakage paths via powered off devices (Audio
Codec) and hence contend with the external pull-up. A blocking FET is
recommended in such a case to isolate HDA_SYNC from the Audio Codec device
until after the Strap sampling is complete.
0827
HighLW
LW_GG_SEL
GG
Table 21.1 Project_ID
LOW
1 2
R2107 1KR2J-1-GPR2107 1KR2J-1-GP
1
TP2105TPAD14-GP TP2105TPAD14-GP
12
R212333R2J-2-GP R212333R2J-2-GP
RTCX1
A20
RTCX2
C20
INTVRMEN
C17
INTRUDER#
K22
HDA_BCLK
N34
HDA_SYNC
L34
HDA_RST#
K34
HDA_SDIN0
E34
HDA_SDIN1
G34
HDA_SDIN2
C34
HDA_SDO
A36
SATALED# P3
FWH0/LAD0 C38
FWH1/LAD1 A38
FWH2/LAD2 B37
FWH3/LAD3 C37
LDRQ1#/GPIO23 K36
FWH4/LFRAME# D36
LDRQ0# E36
RTCRST#
D20
HDA_SDIN3
A34
HDA_DOCK_EN#/GPIO33
C36
HDA_DOCK_RST#/GPIO13
N32
SRTCRST#
G22
SATA0RXN AM3
SATA0RXP AM1
SATA0TXN AP7
SATA0TXP AP5
SATA1RXN AM10
SATA1RXP AM8
SATA1TXN AP11
SATA1TXP AP10
SATA2RXN AD7
SATA2RXP AD5
SATA2TXN AH5
SATA2TXP AH4
SATA3RXN AB8
SATA3RXP AB10
SATA3TXN AF3
SATA3TXP AF1
SATA4RXN Y7
SATA4RXP Y5
SATA4TXN AD3
SATA4TXP AD1
SATA5RXN Y3
SATA5RXP Y1
SATA5TXN AB3
SATA5TXP AB1
SATAICOMPI Y10
SPI_CLK
T3
SPI_CS0#
Y14
SPI_CS1#
T1
SPI_MOSI
V4
SPI_MISO
U3
SATA0GP/GPIO21 V14
SATA1GP/GPIO19 P1
JTAG_TCK
J3
JTAG_TMS
H7
JTAG_TDI
K5
JTAG_TDO
H1
SERIRQ V5
SPKR
T10
SATAICOMPO Y11
SATA3COMPI AB13
SATA3RCOMPO AB12
SATA3RBIAS AH1
RTCIHDA
SATA
LPC
SPI JTAG
SATA 6G
1 OF 10
Cougar
Point
PCH1A
COUGAR-GP-U2-NF
RTCIHDA
SATA
LPC
SPI JTAG
SATA 6G
1 OF 10
Cougar
Point
PCH1A
COUGAR-GP-U2-NF
1 2
R2103 1KR2J-1-GPR2103 1KR2J-1-GP
12
C2101
SC15P50V2JN-2-GP
C2101
SC15P50V2JN-2-GP
1 2
EC2105
SC4D7P50V2CN-1GP
DY
EC2105
SC4D7P50V2CN-1GP
DY
1
2 3
4
RN2104
SRN20KJ-GP-U
RN2104
SRN20KJ-GP-U
12
C2104
SC1U6D3V2KX-GP
C2104
SC1U6D3V2KX-GP
1 2
R2104 1M1R2J-GPR2104 1M1R2J-GP
1 2
R2105 330KR2F-L-GPR2105 330KR2F-L-GP
12
EC2102
SC22P50V2JN-4GP
DY
EC2102
SC22P50V2JN-4GP
DY
1
2 3
4
X2101
X-32D768KHZ-40GPU
X2101
X-32D768KHZ-40GPU
1
2 3
4
RN2102
SRN33J-5-GP-U
RN2102
SRN33J-5-GP-U
21
G2101
GAP-OPEN
G2101
GAP-OPEN
1 2
R2114 750R2F-GPR2114 750R2F-GP
1 2
R2108 10KR2J-3-GPR2108 10KR2J-3-GP
1 2
R2115 1KR2J-1-GP
DY
R2115 1KR2J-1-GP
DY
12
C2102
SC15P50V2JN-2-GP
C2102
SC15P50V2JN-2-GP
1 2
R2106 1KR2J-1-GP
DY
R2106 1KR2J-1-GP
DY
1 2
R2101 10MR2J-L-GPR2101 10MR2J-L-GP
12
R2110
10KR2J-3-GP
GG
R2110
10KR2J-3-GP
GG
1
2
3
4 5
6
7
8
RN2103
SRN10KJ-6-GP
RN2103
SRN10KJ-6-GP
12
EC2101
SCD1U10V2KX-5GP
DY
EC2101
SCD1U10V2KX-5GP
DY
1 2
R2102 51R2J-2-GPR2102 51R2J-2-GP
1 2
EC2103
SC4D7P50V2CN-1GP
DY
EC2103
SC4D7P50V2CN-1GP
DY
12
R2109
10KR2J-3-GP
LW
R2109
10KR2J-3-GP
LW
12
R2125 1KR2J-1-GP
DY
R2125 1KR2J-1-GP
DY
1 2
R2112 37D4R2F-GPR2112 37D4R2F-GP
12
C2103
SC1U6D3V2KX-GP
C2103
SC1U6D3V2KX-GP
12
R212233R2J-2-GP R212233R2J-2-GP
1 2
R2113 49D9R2F-GPR2113 49D9R2F-GP
![](asset-16.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCH_GPIO57
PCH_THERMTRIP_R
H_A20GATE
INIT3_3V#
PCH_TEMP_ALERT#
FDI_OVRVLTG
DMI_OVRVLTG
FFS_INT2_R
GPIO16 H_PECI_R
NC_FP_DET#
PLL_ODVR_EN
GFX_CRB_DET
PCH_GPIO12
PCH_GPIO22
PCH_GPIO24
PCH_GPIO15
EC_SMI#
DGPU_HPD_INTR#
ICC_EN#
mSATA_DTCT#
PLL_ODVR_EN
DMI_OVRVLTG
FDI_OVRVLTG
ICC_EN#
SATA_ODD_PRSNT#
H_RCIN#
H_A20GATE
EC_SMI#
PCH_TEMP_ALERT#
PCH_GPIO15
PCH_GPIO12
PCH_GPIO57
DGPU_HPD_INTR#
EC_SCI#
PCH_GPIO24
NC_FP_DET#
EC_SCI#
TS_VSS
UMA_DIS#
VRAM_SIZE1
VRAM_SIZE2
GFX_CRB_DET
FFS_INT2_R
PCH_THERMTRIP_R
PCH_NCTF_2
PCH_NCTF_4
PCH_NCTF_3
PCH_NCTF_1
PCH_GPIO22 mSATA_DTCT#
3D3V_S0
3D3V_S0
3D3V_S0
3D3V_S0
3D3V_S0
3D3V_S5
3D3V_S0
3D3V_S0
1D05V_VTT
3D3V_S5
3D3V_S5
H_A20GATE 27
H_CPUPWRGD 5,36
H_THERMTRIP# 5,36,85
H_RCIN# 27
H_PECI 5,27
PCH_TEMP_ALERT#27
SATA_ODD_PRSNT#56
EC_SCI#27
UMA_DIS# 20
SATA_ODD_PWRGT 56
DGPU_PWROK92,93
INT_SERIRQ21,27
SATA_LED#21
SATA_DET#021
S_GPIO21
PSW_CLR#21
MFG_MODE21
mSATA_DTCT#27,66
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
PCH (GPIO/CPU)
A3
22 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
PCH (GPIO/CPU)
A3
22 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
PCH (GPIO/CPU)
A3
22 94Tuesday, November 09, 2010
<Core Design>
SSID = PCH
ICC_EN#
GPIO36
DMI TERMINATION VOLTAGE OVERRIDE
LOW - Tx, Rx terminated to same voltage
(DC Coupling Model DEFAULT)
PLL ON DIE VR ENABLE
ENABLED -- HIGH (R2212 UNSTUFFED) DEFAULT
DISABLED -- LOW (R2212 STUFFED)
LOW (R2211)- ENABLED
Integrated Clock Chip Enable
HIGH (R2211 DY)- DISABLED [DEFAULT]
Integrated Clock Enable functionality is achieved
via soft-strap. The default is integrated clock
enable.
GPIO37
(FDI_OVRVLTG)
FDI TERMINATION VOLTAGE OVERRIDE
LOW - Tx, Rx terminated to same voltage
(DC Coupling Model DEFAULT)
Integrated Clock Enable functionality is achieved
via soft-strap. The default is integrated clock
enable.
Note:
For PCH debug with XDP, need to NO STUFF R2218
GPIO27 has a weak[20K] internal pull up.
To enable on-die PLL Voltage regurator,
should not place external pull down.
INTERNAL GFX EXTERNAL GFX
R2205 DY 10K
R2206 100K DY
20100723 V1.62
0827
0827
12
R2225
10KR2J-3-GP
DY
R2225
10KR2J-3-GP
DY
12
R2211
1KR2J-1-GP
DY
R2211
1KR2J-1-GP
DY
12
R2212
1KR2J-1-GP
DY
R2212
1KR2J-1-GP
DY
12
R2215
10KR2J-3-GP
R2215
10KR2J-3-GP
1
2
3
4 5
6
7
8
RN2201
SRN10KJ-6-GP
RN2201
SRN10KJ-6-GP
1
TP2211TPAD14-GP TP2211TPAD14-GP
1 2
R2202 200KR2F-L-GPR2202 200KR2F-L-GP
1 2
R2204 390R2J-1-GPR2204 390R2J-1-GP
1
TP2207TP2207
12
R2224
56R2F-1-GP
DY
R2224
56R2F-1-GP
DY
12
R2207
10KR2J-3-GP
DY
R2207
10KR2J-3-GP
DY
1
TP2208TP2208
1 2
R2222
0R0402-PAD
R2222
0R0402-PAD
12
R2208
10KR2J-3-GP
R2208
10KR2J-3-GP
1
2
3
4 5
6
7
8
RN2202
SRN10KJ-6-GP
RN2202
SRN10KJ-6-GP
12
R2209
10KR2J-3-GP
DY
R2209
10KR2J-3-GP
DY
1 2
R2218 100R2J-2-GPR2218 100R2J-2-GP
1 2
R2203 0R2J-2-GP
DY
R2203 0R2J-2-GP
DY
1
TP2205 TPAD14-GP
TP2205 TPAD14-GP
1 2
R2221 10KR2J-3-GPR2221 10KR2J-3-GP
1 2
R2201 1KR2J-1-GPR2201 1KR2J-1-GP
GPIO27
E16
GPIO28
P8
GPIO24/MEM_LED
E8
GPIO57
D6
LAN_PHY_PWR_CTRL/GPIO12
C4
NCTF_VSS#A4
A4
NCTF_VSS#A44
A44
NCTF_VSS#A45
A45
NCTF_VSS#A46
A46
NCTF_VSS#A5
A5
NCTF_VSS#A6
A6
NCTF_VSS#B3
B3
NCTF_VSS#B47
B47
NCTF_VSS#BD1
BD1
NCTF_VSS#BD49
BD49
NCTF_VSS#BE1
BE1
NCTF_VSS#BE49
BE49
TACH2/GPIO6
H36
TACH0/GPIO17
D40
TACH3/GPIO7
E38
SATA3GP/GPIO37
M5
SATA5GP/GPIO49
V3
SCLOCK/GPIO22
T5
SLOAD/GPIO38
N2
SDATAOUT0/GPIO39
M3
SDATAOUT1/GPIO48
V13
PROCPWRGD AY11
RCIN# P5
PECI AU16
THRMTRIP# AY10
GPIO8
C10
BMBUSY#/GPIO0
T7
GPIO15
G2
TACH1/GPIO1
A42
SATA2GP/GPIO36
V8
INIT3_3V# T14
STP_PCI#/GPIO34
K1
GPIO35
K4
SATA4GP/GPIO16
U2
NCTF_VSS#F49 F49
A20GATE P4
TACH4/GPIO68 C40
TACH6/GPIO70 C41
TACH7/GPIO71 A40
TACH5/GPIO69 B41
NCTF_VSS#BH3 BH3
NCTF_VSS#BH47 BH47
NCTF_VSS#BJ4 BJ4
NCTF_VSS#BJ44 BJ44
NCTF_VSS#BJ45 BJ45
NCTF_VSS#BJ46 BJ46
NCTF_VSS#BJ5 BJ5
NCTF_VSS#BJ6 BJ6
NCTF_VSS#C2 C2
NCTF_VSS#C48 C48
NCTF_VSS#D1 D1
NCTF_VSS#D49 D49
NCTF_VSS#E1 E1
NCTF_VSS#E49 E49
NCTF_VSS#F1 F1
TS_VSS4 AK10
TS_VSS3 AH10
TS_VSS2 AK11
TS_VSS1 AH8
NC_1 P37
NCTF_VSS#BF1
BF1
NCTF_VSS#BF49
BF49
NCTF_VSS#BG2 BG2
NCTF_VSS#BG48 BG48
CPU/MISC
NCTF
GPIO
6 OF 10
NCTF TEST PIN:
A4,A44,A45,A46,A5,A6,B3,B47,BD1,BD49,BE1,BE49,BF1,BF49
BG2,BG48,BH3,BH47,BJ4,BJ44,BJ45,BJ46,BJ5,BJ6,C2,C48
D1,D49,E1,E49,F1,F49
Cougar
Point
PCH1F
COUGAR-GP-U2-NF
CPU/MISC
NCTF
GPIO
6 OF 10
NCTF TEST PIN:
A4,A44,A45,A46,A5,A6,B3,B47,BD1,BD49,BE1,BE49,BF1,BF49
BG2,BG48,BH3,BH47,BJ4,BJ44,BJ45,BJ46,BJ5,BJ6,C2,C48
D1,D49,E1,E49,F1,F49
Cougar
Point
PCH1F
COUGAR-GP-U2-NF
1
TP2201 TPAD14-GP
TP2201 TPAD14-GP
12
R2210
10KR2J-3-GP
R2210
10KR2J-3-GP
1 2
R2213 0R2J-2-GPR2213 0R2J-2-GP
1
TP2206 TPAD14-GP
TP2206 TPAD14-GP
1
TP2212TPAD14-GP TP2212TPAD14-GP
1
TP2202
TPAD14-GP TP2202
TPAD14-GP
12
R2205
10KR2J-3-GP
DY
R2205
10KR2J-3-GP
DY
12
R2214
10KR2J-3-GP
R2214
10KR2J-3-GP
1
TP2204
TPAD14-GP TP2204
TPAD14-GP
1
2 3
4
RN2203
SRN10KJ-5-GP
RN2203
SRN10KJ-5-GP
1
23
4
RN2204
SRN10KJ-5-GP
RN2204
SRN10KJ-5-GP
1
TP2209TPAD14-GP TP2209TPAD14-GP
12
R2220
10KR2J-3-GP
R2220
10KR2J-3-GP
12
R2206
100KR2J-1-GP
R2206
100KR2J-1-GP
1 2
R2223
10KR2J-3-GP
R2223
10KR2J-3-GP
21
G2201
GAP-OPEN
G2201
GAP-OPEN
1
TP2210TPAD14-GP TP2210TPAD14-GP
![](asset-17.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.8VS_VCCTX_LVDS
+1.05VS_VCC_DMI_CCI
+1.05VS_VCC_DMI
+VCCA_DAC_1_2
+1.05VS_VCC_DMI
+3VS_VCCA_LVD
VCCAPLLEXP
VCCFDIPLL
VCCAPLLEXP
VCCSPI
VCCAFDI_VRM
1D05V_VTT
1D05V_VTT
1D05V_VTT
1D05V_VTT
3D3V_S0
1D05V_VTT
3D3V_S0
1D5V_S0_1D8V_S0
1D05V_VTT
+V_NVRAM_VCCQ 1D8V_S0
3D3V_S0
1D8V_S0
1D05V_VTT
1D5V_S0 1D5V_S0_1D8V_S0
3D3V_S5 3D3V_S0
3D3V_DAC_S05V_S0
3D3V_S03D3V_DAC_S0
1D5V_S0_1D8V_S0
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
PCH (POWER1)
A3
23 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
PCH (POWER1)
A3
23 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
PCH (POWER1)
A3
23 94Tuesday, November 09, 2010
<Core Design>
SSID = PCH
6A
20100625 V1.2
0.266A (Totally VCC3_3 current)
0.159A(Totally current of VCCVRM)
0.042A (Totally current of VCCDMI)
VCCVRM(Internal PLL and VRMs):
A.1.5V for Mobile
B.1.8 V for Desktop
co-operate with R2103
(1uFx1)
The same BIOS SPI ROM power
3.3V CRT LDO
0.02A
0.19A
0.02A
0.001A
0.06A
N/A 74.09091.J3F
74.09198.Q7F
GMT
RICHTEK
Description Lenovo P/N Wistron P/N
N/ART9198-33GBR
G9091-330T11U
Supplier
Table 23.1- LDO Regulator multi-source
12
C2309
SC1U6D3V2KX-GP
C2309
SC1U6D3V2KX-GP
1 2
R23070R2J-2-GP R23070R2J-2-GP
12
R2309
0R2J-2-GP
DY
R2309
0R2J-2-GP
DY
1
TP2301TPAD14-GP TP2301TPAD14-GP
1 2
R2303 0R2J-2-GP
DY
R2303 0R2J-2-GP
DY
1 2
L2302
IND-1UH-100-GP
DY
L2302
IND-1UH-100-GP
DY
12
C2306
SC1U6D3V2KX-GP
C2306
SC1U6D3V2KX-GP
12
C2307
SC1U6D3V2KX-GP
C2307
SC1U6D3V2KX-GP
12
C2311
SC1U10V2KX-1GP
C2311
SC1U10V2KX-1GP
1 2
R23100R3J-0-U-GP R23100R3J-0-U-GP
12
C2314
SCD1U10V2KX-5GP
C2314
SCD1U10V2KX-5GP
12
C2301
SC10U6D3V5KX-1GP
C2301
SC10U6D3V5KX-1GP
12
C2302
SC1U6D3V2KX-GP
C2302
SC1U6D3V2KX-GP
1
TP2302TPAD14-GP TP2302TPAD14-GP
1 2
R2302 0R3J-0-U-GPR2302 0R3J-0-U-GP
12
C2305
SC10U6D3V5KX-1GP
C2305
SC10U6D3V5KX-1GP
12
C2310
SCD1U10V2KX-5GP
C2310
SCD1U10V2KX-5GP
12
C2323
SC1U6D3V2KX-GP
C2323
SC1U6D3V2KX-GP
12
R2313
0R2J-2-GP
R2313
0R2J-2-GP
12
C2324
SC10U6D3V5KX-1GP
DY
C2324
SC10U6D3V5KX-1GP
DY
12
C2322
SCD1U10V2KX-5GP
C2322
SCD1U10V2KX-5GP
1 2
R23120R2J-2-GP
DY
R23120R2J-2-GP
DY
12
R23080R2J-2-GP R23080R2J-2-GP
12
C2304
SC1U6D3V2KX-GP
C2304
SC1U6D3V2KX-GP
12
C2308
SC1U6D3V2KX-GP
C2308
SC1U6D3V2KX-GP
12
R2314
0R2J-2-GP
DY
R2314
0R2J-2-GP
DY
12
C2313
SCD01U16V2KX-3GP
C2313
SCD01U16V2KX-3GP
12
R23040R3J-0-U-GP R23040R3J-0-U-GP
1 2
L2301
HCB1608KF-181-GP
L2301
HCB1608KF-181-GP
VIN
1
GND
2
EN
3NC#4 4
VOUT 5
U2301
G9091-330T11U-GP
U2301
G9091-330T11U-GP
12
C2321
SC1U6D3V2KX-GP
C2321
SC1U6D3V2KX-GP
12
C2320
SC1U6D3V2KX-GP
C2320
SC1U6D3V2KX-GP
1 2
R23050R5J-5-GP R23050R5J-5-GP
12
C2312
SC1U6D3V2KX-GP
C2312
SC1U6D3V2KX-GP
12
C2315
SC10U6D3V5KX-1GP
C2315
SC10U6D3V5KX-1GP
12
C2303
SC1U6D3V2KX-GP
C2303
SC1U6D3V2KX-GP
VCCCORE
AA23
VCCCORE
AC23
VCCCORE
AD21
VCCCORE
AD23
VCCCORE
AF21
VCCCORE
AF23
VCCCORE
AG21
VCCCORE
AG23
VCCCORE
AG24
VCCCORE
AG26
VCCCORE
AG27
VCCCORE
AG29
VCCCORE
AJ23
VCCCORE
AJ26
VCCCORE
AJ27
VccDFTERM AJ17
VccDFTERM AJ16
VCCIO
AN21
VCCIO
AN26
VCCIO
AN27
VCCIO
AP21
VCCIO
AP26
VCCIO
AT24
VCCIO
AN16
VCCIO
AN17
VCCIO
AP23
VCCIO
AP24
VCCADAC U48
VCCTX_LVDS AM37
VCCTX_LVDS AM38
VCCALVDS AK36
VCCVRM AT16
VCCVRM
AP16
VCCAPLLEXP
BJ22
VCCAFDIPLL
BG6
VCCIO
AN19 VCCTX_LVDS AP37
VCCTX_LVDS AP36
VSSADAC U47
VSSALVDS AK37
VCCIO
AP17
VCC3_3 V33
VCC3_3 V34
VCC3_3
BH29 VccDFTERM AG17
VccDFTERM AG16
VCCDMI AT20
VCCIO
AN33
VCCIO
AN34
VCCCORE
AJ29
VCCCORE
AJ31
VCCSPI V1
VCCCLKDMI AB36
VCCDMI
AU20
POWER
VCC CORE
DMI
VCCIO
CRTLVDS
FDI
NAND / SPI HVCMOS
7 OF 10
Cougar
Point
PCH1G
COUGAR-GP-U2-NF
POWER
VCC CORE
DMI
VCCIO
CRTLVDS
FDI
NAND / SPI HVCMOS
7 OF 10
Cougar
Point
PCH1G
COUGAR-GP-U2-NF
12
C2319
SCD1U10V2KX-5GP
C2319
SCD1U10V2KX-5GP
1 2
R23060R2J-2-GP R23060R2J-2-GP
12
C2317
SCD01U16V2KX-3GP
C2317
SCD01U16V2KX-3GP
12
C2318
SC10U6D3V5KX-1GP
C2318
SC10U6D3V5KX-1GP
12
C2316
SCD01U16V2KX-3GP
C2316
SCD01U16V2KX-3GP
![](asset-18.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+V1.05S_SSCVCC
+VCCSUS1
+V1.05S_VCCAPLL_SATA3
+V3.3S_VCC_CLKF33
+V1.05S_SSCVCC
+1.05VS_VCCA_A_DPL
+VCCRTCEXT
DCPSUSBYP
VCCACLK
+1.05VS_VCCA_B_DPL
+VCCSST
+VCCDIFFCLK
+V1.05S_VCC_SATA
+V3.3A_VCCPSUS
+1.05VS_VCCA_B_DPL
+5VA_PCH_VCC5REFSUS
+V3.3S_VCC_CLKF33
+VCCAPLL_CPY_PCH
+V3.3A_VCCPSUS
+5VS_PCH_VCC5REF
+1.05VS_VCCA_A_DPL
+VCCPDSW
+VCCDIFFCLK
+VCCAPLL_CPY_PCH
+VCCSUS1
DCPSUSBYP
DCPSUS
VCCACLK
+VCCPDSW
DCPSUS
+VCCA_USBSUS
3D3V_S5
3D3V_S5
3D3V_S0
3D3V_S5
1D05V_VTT
1D05V_VTT
3D3V_S0
1D05V_VTT
3D3V_S0
1D05V_VTT
1D05V_VTT
1D5V_S0_1D8V_S0
1D05V_VTT
1D05V_VTT
RTC_AUX_S5
1D05V_VTT
1D05V_VTT
3D3V_S0
1D5V_S0_1D8V_S0
1D05V_VTT
1D05V_VTT
+3VS_+1.5VS_HDA_IO
+VCCDIFFCLKN
3D3V_S5
1D05V_VTT
3D3V_S5
1D05V_VTT
5V_S0
5V_S5
3D3V_AUX_S5
1D05V_VTT
1D5V_S5
3D3V_S5
1D5V_S0 1D5V_S5+3VS_+1.5VS_HDA_IO 3D3V_S5
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
PCH (POWER2)
A3
24 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
PCH (POWER2)
A3
24 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
PCH (POWER2)
A3
24 94Tuesday, November 09, 2010
<Core Design>
SSID = PCH
0.08A
0.08A
0.002A
1.01A (Total current of VCCASW)
(1uFx3)
(22uFx2_0603)
0.16A (Totally current of VCCVRM
0.055A
0.095A
0.001A
6uA
0.01A
0.001A
0.001A
12
R2417 0R2J-2-GP
DY
R2417 0R2J-2-GP
DY
1 2
L2403
IND-10UH-66-GP
68.1001A.10B
2nd = 68.10010.10T
L2403
IND-10UH-66-GP
68.1001A.10B
2nd = 68.10010.10T
1 2
C2439
SCD1U10V2KX-5GP
DY
C2439
SCD1U10V2KX-5GP
DY
12
C2421
SCD1U10V2KX-5GP
C2421
SCD1U10V2KX-5GP
1
TP2401TPAD14-GP TP2401TPAD14-GP
12
C2435
SC1U6D3V2KX-GP
C2435
SC1U6D3V2KX-GP
1 2
R2403 0R3J-0-U-GPR2403 0R3J-0-U-GP
1 2
R2419
0R3J-0-U-GP
DY
R2419
0R3J-0-U-GP
DY
12
C2422
SCD1U10V2KX-5GP
C2422
SCD1U10V2KX-5GP
12
R2405 0R2J-2-GPR2405 0R2J-2-GP
1
TP2406TPAD14-GP TP2406TPAD14-GP
12
C2423
SC1U6D3V2KX-GP
C2423
SC1U6D3V2KX-GP
12
C2408
SC1U6D3V2KX-GP
C2408
SC1U6D3V2KX-GP
12
C2411
SCD1U10V2KX-5GP
C2411
SCD1U10V2KX-5GP
1 2
R2413 0R3J-0-U-GP
DY
R2413 0R3J-0-U-GP
DY
DCPSUSBYP
V12
VCCASW
AA19
VCCASW
AA21
VCCASW
AA24
VCCASW
AA27
VCCASW
AA29
VCCSUSHDA P32
VCCSUS3_3 P24
VCCIO T26
VCCIO AD17
VCCASW
AA31
VCCASW
AC26
VCCASW
AC27
VCCASW
AC29
VCCASW
AC31
VCCASW
AD29
V5REF P34
VCC3_3 T34
VCCRTC
A22
VCCSUS3_3 V24
VCCSUS3_3 V23
VCCSUS3_3 T24
VCCSUS3_3 T23
VCCIO AC16
VCCADPLLB
BF47
VCCDIFFCLKN
AF33
V5REF_SUS M26
VCCIO AC17
DCPSUS
T17
VCCSSC
AG33
VCCADPLLA
BD47
VCCVRM
Y49
VCCACLK
AD49
DCPRTC
N16
VCCASW
AA26
VCCDIFFCLKN
AF34
VCCIO
AF17
DCPSST
V16
VCCIO AF13
VCCASW T21
VCCASW V21
VCCASW T19
VCC3_3 AA16
VCC3_3 W16
VCCSUS3_3 N20
VCCSUS3_3 N22
VCCSUS3_3 P20
VCCSUS3_3 P22
VCCIO N26
VCCIO P26
VCCIO P28
VCCIO T27
V_PROC_IO
BJ8
VCCIO T29
VCCDIFFCLKN
AG34
VCCASW
AD31
VCCASW
W21
VCCASW
W23
VCCASW
W24
VCCASW
W26
VCCASW
W29
VCCASW
W31
VCCASW
W33
VCCIO AF14
VCCVRM AF11
VCCIO AH13
VCCIO AH14
VCC3_3 AJ2
VCCAPLLSATA AK1
DCPSUS
AL24
VCCIO
AL29
DCPSUS AN23
VCCSUS3_3 AN24
VCCAPLLDMI2
BH23
DCPSUS
V19
VCCDSW3_3
T16
VCC3_3
T38
POWER
SATA USB
Clock and Miscellaneous
HDA
CPURTC
PCI/GPIO/LPCMISC
10 OF 10
Cougar
Point
PCH1J
COUGAR-GP-U2-NF
POWER
SATA USB
Clock and Miscellaneous
HDA
CPURTC
PCI/GPIO/LPCMISC
10 OF 10
Cougar
Point
PCH1J
COUGAR-GP-U2-NF
1 2
L2404 IND-10UH-66-GP
68.1001A.10B
2nd = 68.10010.10T
DY
L2404 IND-10UH-66-GP
68.1001A.10B
2nd = 68.10010.10T
DY
12
C2418
SCD1U10V2KX-5GP
C2418
SCD1U10V2KX-5GP
12
C2402
SC1U10V2KX-1GP
C2402
SC1U10V2KX-1GP
12
C2407
SC1U6D3V2KX-GP
C2407
SC1U6D3V2KX-GP
1
TP2405TPAD14-GP TP2405TPAD14-GP
1 2
R2414 0R3J-0-U-GPR2414 0R3J-0-U-GP
12
C2427
SC1U10V2KX-1GP
C2427
SC1U10V2KX-1GP
12
C2443
SC1U10V2KX-1GP
DY
C2443
SC1U10V2KX-1GP
DY
12
C2401
SC10U6D3V3MX-GP
C2401
SC10U6D3V3MX-GP
12
C2431
SCD1U10V2KX-5GP
C2431
SCD1U10V2KX-5GP
1
TP2402TPAD14-GP TP2402TPAD14-GP
12
C2434
SC10U6D3V3MX-GP
DY
C2434
SC10U6D3V3MX-GP
DY
12
C2413
SC1U6D3V2KX-GP
C2413
SC1U6D3V2KX-GP
12
C2414
SC1U6D3V2KX-GP
C2414
SC1U6D3V2KX-GP
1 2
R240710R2J-2-GP R240710R2J-2-GP
1
TP2404
TPAD14-GP
TP2404
TPAD14-GP
12
C2406
SC1U6D3V2KX-GP
C2406
SC1U6D3V2KX-GP
12
C2410
SC1U6D3V2KX-GP
C2410
SC1U6D3V2KX-GP
1 2
R2402
1R2F-GP
R2402
1R2F-GP
AK
D2402
CH751H-40-1-GP
D2402
CH751H-40-1-GP
12
C2442
SC1U6D3V2KX-GP
DY
C2442
SC1U6D3V2KX-GP
DY
12
C2436
SC1U10V3ZY-6GP
DY
C2436
SC1U10V3ZY-6GP
DY
1 2
R24110R3J-0-U-GP
DY
R24110R3J-0-U-GP
DY
1 2
L2402
IND-10UH-66-GP
68.1001A.10B
2nd = 68.10010.10T
L2402
IND-10UH-66-GP
68.1001A.10B
2nd = 68.10010.10T
1 2
L2401
IND-10UH-66-GP
68.1001A.10B
2nd = 68.10010.10T
L2401
IND-10UH-66-GP
68.1001A.10B
2nd = 68.10010.10T
12
C2433
SCD1U10V2KX-5GP
C2433
SCD1U10V2KX-5GP
12
C2424
SCD1U10V2KX-5GP
C2424
SCD1U10V2KX-5GP
12
C2438
SCD1U10V2KX-5GP
DY
C2438
SCD1U10V2KX-5GP
DY
12
C2444
SC10U6D3V3MX-GP
DY
C2444
SC10U6D3V3MX-GP
DY
12
C2425
SCD1U10V2KX-5GP
C2425
SCD1U10V2KX-5GP
12
C2441
SC1U10V2KX-1GP
DY
C2441
SC1U10V2KX-1GP
DY
1 2
R2415 0R3J-0-U-GP
DY
R2415 0R3J-0-U-GP
DY
12
C2409
SC1U6D3V2KX-GP
C2409
SC1U6D3V2KX-GP
1 2
R240810R2J-2-GP R240810R2J-2-GP
12
C2404
SC10U6D3V5KX-1GP
C2404
SC10U6D3V5KX-1GP
12
C2445
SC10U6D3V3MX-GP
DY
C2445
SC10U6D3V3MX-GP
DY
12
C2419
SCD1U10V2KX-5GP
C2419
SCD1U10V2KX-5GP
12
R2420 0R2J-2-GP
DY
R2420 0R2J-2-GP
DY
1 2
R2418 0R3J-0-U-GP
DY
R2418 0R3J-0-U-GP
DY
12
C2416
SC10U6D3V5KX-1GP
DY
C2416
SC10U6D3V5KX-1GP
DY
12
C2415 SCD1U10V2KX-5GPC2415 SCD1U10V2KX-5GP
12
C2432
SC1U6D3V2KX-GP
C2432
SC1U6D3V2KX-GP
12
C2429
SCD1U10V2KX-5GP
C2429
SCD1U10V2KX-5GP
12
C2403
SC10U6D3V5KX-1GP
C2403
SC10U6D3V5KX-1GP
12
C2417
SC4D7U6D3V3KX-GP
C2417
SC4D7U6D3V3KX-GP
12
C2428
SC1U6D3V2KX-GP
C2428
SC1U6D3V2KX-GP
12
C2412
SC1U6D3V2KX-GP
C2412
SC1U6D3V2KX-GP
1
TP2403 TPAD14-GPTP2403 TPAD14-GP
12
C2437
SC1U10V3ZY-6GP
DY
C2437
SC1U10V3ZY-6GP
DY
1 2
R24120R3J-0-U-GP R24120R3J-0-U-GP
AK
D2401
CH751H-40-1-GP
D2401
CH751H-40-1-GP
12
C2420
SC1U6D3V2KX-GP
C2420
SC1U6D3V2KX-GP
12
C2430
SCD1U10V2KX-5GP
C2430
SCD1U10V2KX-5GP
12
R2404 0R2J-2-GPR2404 0R2J-2-GP
12
C2426
SCD1U10V2KX-5GP
C2426
SCD1U10V2KX-5GP
12
C2440
SC10U6D3V5KX-1GP
DY
C2440
SC10U6D3V5KX-1GP
DY
1 2
R24100R3J-0-U-GP R24100R3J-0-U-GP
1 2
R2401 0R3J-0-U-GP
DY
R2401 0R3J-0-U-GP
DY
12
R2406 0R3J-0-U-GPR2406 0R3J-0-U-GP
VIN
1
GND
2
EN
3NC#4 4
VOUT 5
U2401
G9091-150T11U-GP
DY
U2401
G9091-150T11U-GP
DY
![](asset-19.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
PCH (VSS)
A3
25 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
PCH (VSS)
A3
25 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
PCH (VSS)
A3
25 94Tuesday, November 09, 2010
<Core Design>
SSID = PCH
VSS
AA17
VSS
AA2
VSS
AA3
VSS
AA34
VSS
AB11
VSS
AB14
VSS
AB39
VSS
AB4
VSS
AB43
VSS
AB5
VSS
AB7
VSS
AC19
VSS
AC2
VSS
AC21
VSS
AC24
VSS
AC33
VSS
AC34
VSS
AC48
VSS
AD10
VSS
AD11
VSS
AD12
VSS
AD13
VSS
AD19
VSS
AD24
VSS
AD26
VSS
AD27
VSS
AD33
VSS
AD34
VSS
AD36
VSS
AD37
VSS
AD39
VSS
AD4
VSS
AD40
VSS
AD42
VSS
AD43
VSS
AD45
VSS
AD46
VSS
AF10
VSS
AF12
VSS
AD16
VSS
AF16
VSS
AF19
VSS
AF24
VSS
AF26
VSS
AF27
VSS
AF29
VSS
AF31
VSS
AF38
VSS
AF4
VSS
AF42
VSS
AF46
VSS
AF7
VSS
AF8
VSS
AG19
VSS
AG2
VSS
AG31
VSS
AG48
VSS
AH11
VSS
AH3
VSS
AH36
VSS
AH39
VSS
AH40
VSS
AH42
VSS
AH46
VSS
AH7
VSS
AJ19
VSS
AJ33
VSS
AJ34
VSS
AK12
VSS
AK3
VSS AK38
VSS AK4
VSS AK42
VSS AK46
VSS AK8
VSS AL16
VSS AL17
VSS AL19
VSS AL2
VSS AL21
VSS AL23
VSS AL26
VSS AL27
VSS AL31
VSS AL48
VSS AM11
VSS AM14
VSS AM36
VSS AM39
VSS AM45
VSS AM46
VSS AM7
VSS AN2
VSS AN29
VSS AN3
VSS AN31
VSS AP12
VSS AP19
VSS AP28
VSS AP30
VSS AP32
VSS AP38
VSS AP42
VSS AP46
VSS AP8
VSS AR2
VSS AR48
VSS AT11
VSS AT13
VSS AT18
VSS AT22
VSS AT26
VSS AT28
VSS AT30
VSS AT32
VSS AT42
VSS AT46
VSS AT7
VSS AU24
VSS AU30
VSS AV16
VSS AV20
VSS AV24
VSS AV30
VSS AV38
VSS AV4
VSS AV43
VSS AV8
VSS AW14
VSS AW18
VSS AW2
VSS AW22
VSS AW26
VSS AW28
VSS AW32
VSS AW34
VSS AW36
VSS AW40
VSS AW48
VSS AV11
VSS AY12
VSS AY22
VSS AY28
VSS
AD8
VSS
AE3
VSS
AD14
VSS AP4
VSS
H5
VSS
AF5
VSS
AD38
VSS
AA33
VSS
AJ21
VSS
AJ24
VSS
AE2
VSS AT34
VSS AT39
VSS AM43
VSS AL34
VSS AL33
8 OF 10
Cougar
Point
PCH1H
COUGAR-GP-U2-NF
8 OF 10
Cougar
Point
PCH1H
COUGAR-GP-U2-NF
VSS
AY4
VSS
AY42
VSS
AY46
VSS
AY8
VSS
B11
VSS
B15
VSS
B19
VSS
B23
VSS
B27
VSS
B31
VSS
B35
VSS
B39
VSS
B7
VSS
BB12
VSS
BB16
VSS
BB20
VSS
BB22
VSS
BB24
VSS
BB28
VSS
BB30
VSS
BB38
VSS
BB4
VSS
BB46
VSS
BC14
VSS
BC18
VSS
BC2
VSS
BC22
VSS
BC26
VSS
BC32
VSS
BC34
VSS
BC36
VSS
BC40
VSS
BC42
VSS
BC48
VSS
BD46
VSS
BD5
VSS
BE22
VSS
BE26
VSS
BE40
VSS
BF10
VSS
BF12
VSS
BF16
VSS
BF20
VSS
BF22
VSS
BF24
VSS
BF26
VSS
BF28
VSS
BD3
VSS
BF30
VSS
BF38
VSS
BF40
VSS
BF8
VSS
BG17
VSS
BG21
VSS
BG33
VSS
BG44
VSS
BG8
VSS
BH11
VSS
BH15
VSS
BH17
VSS
BH19
VSS
BH27
VSS
BH31
VSS
BH33
VSS
BH35
VSS
BH39
VSS
BH43
VSS
BH7
VSS
D3
VSS
D12
VSS
D16
VSS
D18
VSS
D22
VSS
D24
VSS
D26
VSS
D30
VSS
D32
VSS K7
VSS L18
VSS L2
VSS L20
VSS L26
VSS L28
VSS L36
VSS L48
VSS M12
VSS P16
VSS M18
VSS M22
VSS M24
VSS M30
VSS M32
VSS M34
VSS M38
VSS M4
VSS M42
VSS M46
VSS M8
VSS N18
VSS P30
VSS P11
VSS P18
VSS T33
VSS P40
VSS P43
VSS P47
VSS P7
VSS R2
VSS R48
VSS T12
VSS T31
VSS T37
VSS T4
VSS W34
VSS T46
VSS T47
VSS T8
VSS V11
VSS V17
VSS V26
VSS V27
VSS V29
VSS V31
VSS V36
VSS V39
VSS V43
VSS V7
VSS W17
VSS W19
VSS
D34
VSS
D38
VSS
D42
VSS
D8
VSS
E18
VSS
E26
VSS
G18
VSS
G20
VSS
G26
VSS
G28
VSS
G36
VSS
G48
VSS
H12
VSS
H18
VSS W2
VSS W27
VSS W48
VSS Y12
VSS Y38
VSS Y4
VSS Y42
VSS Y46
VSS Y8
VSS BG29
VSS N24
VSS AJ3
VSS N47
VSS
H22
VSS
H24
VSS
H26
VSS
H30
VSS
H32
VSS
H34
VSS
F3
VSS K39
VSS K46
VSS H46
VSS K18
VSS K26
VSS AD47
VSS B43
VSS BE10
VSS BG41
VSS G14
VSS H16
VSS T36
VSS BG22
VSS BG24
VSS C22
VSS AP13
VSS
F45
VSS
H10
VSS M14
VSS AP3
VSS AP1
VSS BE16
VSS BC16
VSS BG28
VSS BJ28
9 OF 10
Cougar
Point
PCH1I
COUGAR-GP-U2-NF
9 OF 10
Cougar
Point
PCH1I
COUGAR-GP-U2-NF
![](asset-1a.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
Reserved
A4
26 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
Reserved
A4
26 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
Reserved
A4
26 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
BLANK
![](asset-1b.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
KCOL17
EC_ENABLE AC_IN_KBC
PCB_VER_AD
PROCHOT_EC
GSENSOR_ID
E51_RxD
DISCRETE_ID
KBC_PWRBTN_EC#
ECRST#
VGA_THRM
EC_SPI_DO_C
EC_SPI_CLK_C
BAT_SCL
BAT_SDA
AMP_MUTE#
ECSW I#_KBC
ECSCI#_KBC
PECI
KCOL0
ECRST#
KCOL9
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
KROW0
KROW1
KCOL1
KROW2
KCOL2
KROW3
KCOL3
KCOL4
KROW4
KROW5
KCOL5
KCOL6
KROW6
KROW7
KCOL7
KCOL8
KBC_VCORF
BLUETOOTH_EN
EC_AGND
PURE_HW _SHUTDOWN#
ECSCI#_KBC
ECSW I#_KBC
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
EC_VTT
VBAT
3D3V_AUX_KBC_VCC
H_PROCHOT#_EC
PROCHOT_EC
LID_CLOSE#
BAT_IN#
BRIGHTNESS
EC_SPI_DI_C
AC_IN_KBC
PLT_RST#_EC
ECRST#
PCB_VER_AD
FAN1_PWM
EC_SPI_CS#_C
KBC_PWRBTN_EC#
S5_ENABLE
PCIE_RST#
SMBC_THERM
SMBD_THERM
SML1_DATA
SML1_CLK
AD_OFF
KB_ID1
ACDC_ID2
FAN_ID
KB_ID1
GSENSOR_ID
DISCRETE_ID
AMP_MUTE#
PAD_DETECT#
PAD_DETECT#
HDD_DTCT#
mSATA_DTCT#_C
mSATA_DTCT#_C
3D3V_S0
3D3V_AUX_KBC
3D3V_AUX_KBC
1D05V_VTT
3D3V_AUX_S5
RTC_AUX_S5
3D3V_S0
3D3V_AUX_S5
3D3V_AUX_KBC
3D3V_AUX_S53D3V_AUX_KBC
3D3V_AUX_S5
3D3V_S0
3D3V_AUX_KBC
3D3V_AUX_S5
3D3V_S0
3D3V_AUX_KBC
EC_AGND
EC_AGND
EC_AGND
EC_AGND
EC_AGND
3D3V_S0
3D3V_AUX_S5
3D3V_S0
SPI_CLK_R 21,60
SPI_SI_R 21,60
SPI_SO_R 21,60
SPI_CS0#_R 21,60
KCOL[0..17] 69
KROW[0..7] 69
BAT_SDA 39,40
BAT_SCL 39,40
LPC_AD[0..3] 21,65,71
SML1_DATA 20
SML1_CLK 20
AC_IN 40
SMBD_THERM 28,85
SMBC_THERM 28,85
ACDC_ID282
GSENSE_X79
GSENSE_Y79
GSENSE_Z79
AD_IA40
TPDATA 69
USB_AO_SEL0 82
GSENSE_ON# 79
TPCLK 69
BLON_OUT 49
PCIE_RST# 83,85
USB_PWR_EN2 82
USB_AO_SEL182 GSENSE_TST79 3G_EN66
PCH_TEMP_ALERT# 22
AD_OFF82
S5_ENABLE36 3G_POWERON66 BAT_IN#39 LID_CLOSE#49 RSMRST#_KBC19 PM_SLP_S4#19,46,82 ME_UNLOCK21
H_PROCHOT# 5,42
CHG_ON# 40
AMP_MUTE#29
L_BKLT_EN 17
BLUETOOTH_EN63 WIFI_RF_EN65
S0_PWR_GOOD19,36
USB_PWR_EN57,61
E51_RxD65 E51_TxD65
AC_PRESENT19
PM_CLKRUN# 19
H_A20GATE 22
H_RCIN# 22
LPC_FRAME# 21,65,71
CLK_PCI_KBC 18
PLT_RST# 5,18,32,36,65,66,71,80,82,83
INT_SERIRQ 21,22
H_PECI5,22
PCH_SUSCLK_KBC19
PM_SLP_S3#19,36,37,47,82
STOP_CHG#40
KBC_BEEP29
PM_PWRBTN#19
SUS_PWR_ACK19
BEEP_ENABLE29
AC_IN_LED82
PANEL_LED49
PALM_LED69
PAD_RESET#69
TP4_RESET69
PAD_DETECT#69
EC_SCI#22
KBC_PWRBTN#82
EC_SW I#20
PURE_HW _SHUTDOWN#28,36
FAN_ID28
HDD_DTCT#56
mSATA_DTCT#22,66
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
KBC Nuvoton NPCE795
A2
27 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
KBC Nuvoton NPCE795
A2
27 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
KBC Nuvoton NPCE795
A2
27 94
Tuesday, November 09, 2010
<Core Design>
<------PCH / eDP
<------ BATTERY / CHARGER
SSID = KBC
NOTE:
Connect GND and AGND planes via either
0R resistor or one point layout connection.
R2701 and C2716
Need very close to EC
EC_GPIO47 High Active
NOTE:
Locate resistors R2719 and R2722 close
to the NPCE791L.
<------ TP
Prevent BIOS data loss solution
EC GPIO standard PH/PL
G Sensor ID:
High: ST
Low:ADI
20100709
NOTE:
Please be aware that the SPI interface trace length between
PCH and EC should not exceed 6500mils,. The mismatch
of SPI interface signals between EC and SPI flash should
not exceed 500mils.
NOTE:
C2712 must place close to VCORF pin.
NOTE:
Pleae place R2711 close to AGND pin.
NOTE:
PWM Signal :
1. If unused, select altrnative GPIO function
and enable internal pull-down.
2. Please measure and make sure that the
rise time of VCC_POR is less than 10us.
12
C2701
SC2D2U10V3KX-1GP
C2701
SC2D2U10V3KX-1GP
1
2
3
D2701
BAS16GP-GP
D2701
BAS16GP-GP
12
R2740
10KR2J-3-GP
R2740
10KR2J-3-GP
12
R2703 470R2J-2-GPR2703 470R2J-2-GP
1 2
R2712
0R0402-PAD
R2712
0R0402-PAD
12
R2701 100KR2J-1-GPR2701 100KR2J-1-GP
1 2
R2729 100KR2J-1-GP
R2729 100KR2J-1-GP
12
C2703
SC2D2U10V3KX-1GP
C2703
SC2D2U10V3KX-1GP
12
R2711
0R2J-2-GP
R2711
0R2J-2-GP
1
23
4
RN2701
SRN4K7J-8-GP
RN2701
SRN4K7J-8-GP
1 2
R2700
1MR2J-1-GP
R2700
1MR2J-1-GP
1 2
R2714 10KR2J-3-GP
R2714 10KR2J-3-GP
GPIO56/TA1
31
GPIO20/TA2/IOX_DIN_DIO
117
GPIO14/TB1
63
GPIO1/TB2
64
GPIO15/A_PWM
32
GPIO21/B_PWM
118
GPIO13/C_PWM
62
GPIO32/D_PWM
65
GPIO66/G_PWM
81
GPIO33/H_PWM
66
GPIO45/E_PWM
22
GPIO40/F_PWM
16
VCC_POR#
85
GPI/O83/SOUT_CR/TRIST#
111 GPIO87/CIRRXM/SIN_CR
113
GPIO0/EXTCLK
77 GPIO55/CLKOUT/IOX_DIN_DIO
30
PECI
13
VTT
12
KBSOUT0/JENK# 53
KBSOUT1/TCK 52
KBSOUT2/TMS 51
KBSOUT3/TDI 50
KBSOUT4/JEN0# 49
KBSOUT5/TDO 48
KBSOUT6/RDY# 47
KBSOUT7 43
KBSOUT8 42
KBSOUT9/SDP_VIS# 41
KBSOUT10/P80_CLK 40
KBSOUT11/P80_DAT 39
KBSOUT12/GPIO64 38
KBSOUT13/GPIO63 37
KBSOUT14/GPIO62 36
KBSOUT15/GPIO61/XOR_OUT 35
GPIO60/KBSOUT16 34
GPIO57/KBSOUT17 33
KBSIN0 54
KBSIN1 55
KBSIN2 56
KBSIN3 57
KBSIN4 58
KBSIN5 59
KBSIN6 60
KBSIN7 61
2 OF 2
U2701B
NPCE795GA0DX-GP
71.00795.A0G
2 OF 2
U2701B
NPCE795GA0DX-GP
71.00795.A0G
12
R2709 10KR2J-3-GPR2709 10KR2J-3-GP
12
R2717
22KR2J-GP
R2717
22KR2J-GP
12
R2705
10KR2J-3-GP
R2705
10KR2J-3-GP
12
33R2J-2-GPR2736 33R2J-2-GPR2736
12
R2774
100KR2J-1-GP
R2774
100KR2J-1-GP
12
R2726
100KR2J-1-GP
R2726
100KR2J-1-GP
12
C2715
SC1U6D3V2KX-GP
DY
C2715
SC1U6D3V2KX-GP
DY
GND
1
RESET#
2VCC 3
U2702
G690L293T73UF-GP
74.00690.I7B
DY
U2702
G690L293T73UF-GP
74.00690.I7B
DY
12
C2712
SC1U10V3ZY-6GP
C2712
SC1U10V3ZY-6GP
12
R2728
10KR2J-3-GP R2728
10KR2J-3-GP
12
R2770 1KR2J-1-GPR2770 1KR2J-1-GP
12
C2705
SCD1U10V2KX-5GP
DY
C2705
SCD1U10V2KX-5GP
DY
1 2
R2733 0R2J-2-GPR2733 0R2J-2-GP
1 2
R2725 0R5J-5-GPR2725 0R5J-5-GP
12
R2718
100KR2J-1-GP
R2718
100KR2J-1-GP
2 1
G2701
GAP-OPEN
G2701
GAP-OPEN
12
R2732
100KR2J-1-GP
R2732
100KR2J-1-GP
12
C2716
SCD1U16V2KX-3GP
C2716
SCD1U16V2KX-3GP
1
TP2711TP2711
C
B
E
Q2701
MMBT3906-4-GP
2nd = 84.03906.F11
84.T3906.A11
Q2701
MMBT3906-4-GP
2nd = 84.03906.F11
84.T3906.A11
1 2
R2707 10KR2J-3-GP
DY
R2707 10KR2J-3-GP
DY
12
33R2J-2-GPR2719 33R2J-2-GPR2719
12
C2704
SCD1U10V2KX-5GP
C2704
SCD1U10V2KX-5GP
12
R2710
100KR2J-1-GP
DY
R2710
100KR2J-1-GP
DY
12
R2737 0R2J-2-GPR2737 0R2J-2-GP
1
2
3
D2704
BAS16GP-GP
D2704
BAS16GP-GP
G
S
D
Q2702
2N7002K-2-GP
84.2N702.J31
2nd = 84.2N702.031
Q2702
2N7002K-2-GP
84.2N702.J31
2nd = 84.2N702.031
1
TP2707TP2707
12
C2709
SC2D2U10V3KX-1GP
C2709
SC2D2U10V3KX-1GP
1
23
4
RN48
SRN10KJ-5-GP
RN48
SRN10KJ-5-GP
1 2
R2721 43R2J-GPR2721 43R2J-GP
1
TP2710TP2710
1 2
R2771
2D2R3-1-U-GP
R2771
2D2R3-1-U-GP
1
TP2709TP2709
12
C2710
SCD1U10V2KX-5GP
C2710
SCD1U10V2KX-5GP
12
R2706
100KR2J-1-GP
DY
R2706
100KR2J-1-GP
DY
1
TP2705TP2705
1
23
4
RN2702
SRN10KJ-5-GP
RN2702
SRN10KJ-5-GP
1
2
34
5
6
Q2703
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
Q2703
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
12
R2723 10KR2J-3-GPR2723 10KR2J-3-GP
1
23
4
RN2705
SRN10KJ-5-GP
RN2705
SRN10KJ-5-GP
1 2
R2720 0R2J-2-GPR2720 0R2J-2-GP
1 2
R2735 0R2J-2-GP
R2735 0R2J-2-GP
1 2
R2708 10KR2J-3-GP
DY
R2708 10KR2J-3-GP
DY
1
TP2708TP2708
12
C2708
SCD1U10V2KX-5GP
C2708
SCD1U10V2KX-5GP
12
C2702
SCD1U10V2KX-5GP
C2702
SCD1U10V2KX-5GP
1 2
R2715 0R2J-2-GP
DY
R2715 0R2J-2-GP
DY
12
R2713
10KR2J-3-GP
UMA
R2713
10KR2J-3-GP
UMA
1 2
R2724
10KR2J-3-GP
BOM Ctrl
R2724
10KR2J-3-GP
BOM Ctrl
12
R2722 33R2J-2-GPR2722 33R2J-2-GP
12
C2707
SCD1U10V2KX-5GP
C2707
SCD1U10V2KX-5GP
1 2
C2714 SCD1U10V2KX-5GP
DY
C2714 SCD1U10V2KX-5GP
DY
VREF
104
GPIO90/AD0
97
GPIO91/AD1
98
GPIO92/AD2
99
GPIO93/AD3
100
GPIO94/DA0
101
GPIO95/DA1
105
GPIO96/DA2
106
GPIO2
79
GPIO3/AD6
95
GPIO4/AD5
96
GPIO5/AD4
108
PSL_IN2_GPI6#
93
GPIO7/AD7
94
GPIO16
114
GPIO24
6
GPIO30
109
GPIO34/CIRRXL
14
GPIO41
80
GPIO42/TCK
17
GPIO43/TMS
20
GPIO44/TDI
21
GPIO46/CIRRXM/TRST#
23
GPIO51
26
PSL_IN1_GPI70
73
PSL_OUT_GPIO71
74
VBKUP
75
GPIO75
82
GPO76/SHBM
83
GPIO77
84
GPIO81
91
GPO82/IOX_LDSH/TEST#
110
GPI/O84/IOX_SCLK/XORTR#
112
GPIO97
107
GPIO36
15
VCORF
44
GND
18
GND
45
GND
78
GND
89
GND
116
GND
5
AGND
103
GPIO11/CLKRUN# 8
LAD3 1
LAD2 128
LAD1 127
LAD0 126
LFRAME# 3
LCLK 2
LRESET# 7
SERIRQ 125
GPIO85/GA20 121
KBRST#/GPIO86 122
ECSCI#/GPIO54 29
GPIO65/SMI# 9
GPIO10/LPCPD# 124
GPIO67/PWUREQ# 123
GPIO37/PSCLK1 72
GPIO26/PSCLK2 10
GPIO35/PSDAT1 71
GPIO27/PSDAT2 11
GPIO50/PSCLK3/TDO 25
GPIO52/PSDAT3/RDY# 27
GPIO17/SCL1 70
GPIO73/SCL2 67
GPIO23/SCL3 119
GPIO22/SDA1 69
GPIO74/SDA2 68
GPIO31/SDA3 120
GPIO47/SCL4 24
GPIO53/SDA4 28
F_SDI/F_SDIO1 86
F_SDIO/F_SDIO0 87
F_SCK 92
F_CS0# 90
VCC 19
VCC 46
VCC 76
VCC 88
VCC 115
AVCC 102
VDD 4
1 OF 2
U2701A
NPCE795GA0DX-GP
71.00795.A0G
1 OF 2
U2701A
NPCE795GA0DX-GP
71.00795.A0G
12
C2706
SCD1U10V2KX-5GP
C2706
SCD1U10V2KX-5GP
1 2
R2727 10KR2J-3-GP
R2727 10KR2J-3-GP
12
R2704
10KR2J-3-GP
R2704
10KR2J-3-GP
1 2
R2716 0R2J-2-GP
DY
R2716 0R2J-2-GP
DY
12
R2702 0R3J-0-U-GPR2702 0R3J-0-U-GP
12
R2741
10KR2J-3-GP
PX
R2741
10KR2J-3-GP
PX
12
C2717
SC220P50V2KX-3GP
DY
C2717
SC220P50V2KX-3GP
DY
1 2
C2711
SC220P50V2KX-3GP
DY
C2711
SC220P50V2KX-3GP
DY
![](asset-1c.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
THERM_SYS_SHDN#
H_THERMDC
H_THERMDA
SHDN_SEL
REMOTE2-
THERM_SCI#_R
THERM_SYS_SHDN# SHDN_SEL
TRIP_SET
THERM_SCI#
2103_VDD
REMOTE2+
FAN_PWM_CFAN_PWM
2103_5
FAN_TACH
2103_4
H_THERMDC
H_THERMDA
REMOTE2+
REMOTE2-THER_UMA_DXN
THER_UMA_DXP
FAN_PWM
FAN_TACH
THER_VGA_DXN
THER_VGA_DXP
FAN_TACH
FAN_ID
5V_S0
FAN_PWM_C
3D3V_S0
3D3V_S0
3D3V_AUX_S5
3D3V_S0
3D3V_S0 3D3V_S0
5V_S0
PURE_HW_SHUTDOWN#27,36
SMBC_THERM27,85 SMBD_THERM27,85
FAN_ID27
IMVP_PWRGD 36,42
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
THERMAL SENSOR SMSC EMC2103
A3
28 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
THERMAL SENSOR SMSC EMC2103
A3
28 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
THERMAL SENSOR SMSC EMC2103
A3
28 94
Tuesday, November 09, 2010
<Core Design>
SSID = Thermal
Thermal sensor
SA 0905 change to 390p
T8
SA 0905
CPU TEMP:
H_THERMDA and H_THERMDC routing 10mil trace width
and spacing. Locate Capacity near Thermal diode.
SHDN --> 2N3904 ON External diode
T8 = 105
between CPU, VGA and DIMM on bottom side
1
CPU backside or inside the socket
Close to SO-DIMM side.
2200p close to smsc2103 chip
2200p close to smsc2103 chip
pin6, ALERT# OD
pin7, SYS_SHDN# OD
2
3
20100709_EMI
2
Close to VGA side.
84.03904.R11ON
PANJIT
Description Lenovo P/N Wistron P/N
Table 28.1- General Purpose Transistors multi-source
N/A
N/A
MMBT3904WT1G
MMBT3904W 84.M3904.A11
Supplier
12
C2807
SCD1U10V2KX-5GP
DY
C2807
SCD1U10V2KX-5GP
DY
12
C2809
SC390P50V2KX-GP
C2809
SC390P50V2KX-GP
1
2 3
4
RN2801
SRN10KJ-5-GP
RN2801
SRN10KJ-5-GP
12
C2804
SC2200P50V2KX-2GP
C2804
SC2200P50V2KX-2GP
12
R2810
10KR2J-3-GP
DY
R2810
10KR2J-3-GP
DY
1 2
C2803
SCD1U10V2KX-5GP
C2803
SCD1U10V2KX-5GP
1 2
R2803 2K05R2F-GPR2803 2K05R2F-GP
1
TP2103TP2103
1 2
R2813 0R2J-2-GP
UMA
R2813 0R2J-2-GP
UMA
1
TP2803TPAD14-GPTP2803TPAD14-GP
12
R2805
10KR2J-3-GP
R2805
10KR2J-3-GP
1 2
R2814 0R2J-2-GP
UMA
R2814 0R2J-2-GP
UMA
1
TP2104TP2104
C
B
E
Q2803
MMBT3904WT1G-GP
84.03904.R11
2nd = 84.M3904.A11
Q2803
MMBT3904WT1G-GP
84.03904.R11
2nd = 84.M3904.A11
12
EC2801
SC1KP50V2KX-1GP
DY
EC2801
SC1KP50V2KX-1GP
DY
1 2
R2806 0R0402-PADR2806 0R0402-PAD
C
B
E
Q2805
MMBT3904WT1G-GP
PX
84.03904.R11
2nd = 84.M3904.A11
Q2805
MMBT3904WT1G-GP
PX
84.03904.R11
2nd = 84.M3904.A11
12
C2801
SC4D7U6D3V3KX-GP
C2801
SC4D7U6D3V3KX-GP
1 2
R2812 0R2J-2-GP
PX
R2812 0R2J-2-GP
PX
VDD
3
GND 12
SMCLK
9
TACH 10
GPIO2 5
ND2/DP3
15 DP2/DN3
16 DN1
1DP1
2
ALERT#
6SYS_SHDN#
7
PWM 11
SHDN_SEL 13
TRIP_SET 14
GPIO1 4
SMDATA
8GND 17
U2801
EMC2103-2-AP-GP
74.02103.A73
U2801
EMC2103-2-AP-GP
74.02103.A73
1
TP2801TPAD14-GPTP2801TPAD14-GP
12
EC2802
SC1KP50V2KX-1GP
DY
EC2802
SC1KP50V2KX-1GP
DY
C
B
E
Q2801
MMBT3904WT1G-GP
84.03904.R11
2nd = 84.M3904.A11
Q2801
MMBT3904WT1G-GP
84.03904.R11
2nd = 84.M3904.A11
1
TP2101TP2101
1
TP2802
TPAD14-GP
TP2802
TPAD14-GP
12
R2801
68R2-GP
R2801
68R2-GP
1
2
3
D2803
BAT54PT-GP
2ND = 83.BAT54.D81
83.00054.T81
DY
3rd = 83.BAT54.S81
D2803
BAT54PT-GP
2ND = 83.BAT54.D81
83.00054.T81
DY
3rd = 83.BAT54.S81
1
TP2102TP2102
G
S
D
Q2804
2N7002K-2-GP
84.2N702.J31
2nd = 84.2N702.031
Q2804
2N7002K-2-GP
84.2N702.J31
2nd = 84.2N702.031
12
C2806
SC2200P50V2KX-2GP
C2806
SC2200P50V2KX-2GP
1 2
R2802 0R0402-PADR2802 0R0402-PAD
1 2
R2808 0R2J-2-GP
DY
R2808 0R2J-2-GP
DY
12
R2804
6K8R2J-GP
R2804
6K8R2J-GP
1 2
R2811 0R2J-2-GP
PX
R2811 0R2J-2-GP
PX
12
C2808
SC390P50V2KX-GP
PX
C2808
SC390P50V2KX-GP
PX
12
R2807
100KR2J-1-GP
R2807
100KR2J-1-GP
12
C2805
SC390P50V2KX-GP
UMA
C2805
SC390P50V2KX-GP
UMA
KA
D2802
CH551H-30GP-GP
D2802
CH551H-30GP-GP
1 2
R2809 0R2J-2-GPR2809 0R2J-2-GP
C
B
E
Q2802
MMBT3904WT1G-GP
UMA
84.03904.R11
2nd = 84.M3904.A11
Q2802
MMBT3904WT1G-GP
UMA
84.03904.R11
2nd = 84.M3904.A11
12
C2802
SC390P50V2KX-GP
C2802
SC390P50V2KX-GP
1
2
3
4
5
6
7
8
FAN1
ACES-CON6-35-GP
FAN1
ACES-CON6-35-GP
![](asset-1d.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
AUD_SPK_R-
AUD_SPK_L-
AUD_SPK_L+
AUD_PC_BEEP
AUD_FILT_1D8V
AUD_DMIC_CLK_R
AUD_FLY_P
AUD_FLY_N
AUD_FILT_1D65V
AUD_AVEE
AUD_SYNC
AUD_SDATA_OUT
AUD_SDATAIN AUD_SENSE_A
AUD_SPK_R+
AUD_SENSE_A
AUD_PORTC_R
AUD_PORTC_L
AUD_SYNC_G
AUD_SYNC
AUD_SDATA_OUT_G
AUD_PC_BEEP_C
AUD_PC_BEEP_C_R
AUD_CLASSDREF
AUD_SDATA_OUT
AUD_SPK_L+
AUD_SPK_L-
AUD_SPK_R-
AUD_SPK_R+
AUD_3D3V
AU_GND
AUD_3D3V
AUD_5V 5V_S0
3D3V_S0AUD_3D3V
AUD_3D3V
AUD_3D3V
AUD_3D3V
AUD_5V
AU_GND
AU_GND
AUD_3D3V
AUD_LDO_OUT_3D3V
HDA_CODEC_SYNC21 HDA_CODEC_SDOUT21
AMP_MUTE#27
AUD_DMIC_DATA49 AUD_DMIC_CLK49
AUD_SPK_R+_L 58
AUD_SENSE_A 58
AUD_SPK_R-_L 58
AUD_SPK_L-_L 58
AUD_SPK_L+_L 58
KBC_BEEP27
HDA_SPKR21
HDA_SDIN021
AUD_PORTA_R 58
AUD_PORTC_R_C 58
AUD_PORTC_L_C 58
AUD_PORTA_L 58
HDA_CODEC_BITCLK21
HDA_CODEC_RST#21
BEEP_ENABLE27
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
AUDIO CODEC
A2
29 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
AUDIO CODEC
A2
29 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
AUDIO CODEC
A2
29 94
Tuesday, November 09, 2010
<Core Design>
SENSE PIN A
JACK DETECT RESISTORS
Close to Pin36
AUDIO CODEC
Port Configuration
Layout Note: Path from +5V to LPWR_5.0 and
RPWR_5.0 must be very low resistance ( <0.01 ohms).
Place bypass caps very close to device.
Port A: Headphone jack
Port B:
Port C: Microphone jack
Port G: Internal stereo speakers
Port J: Internal stereo digital mic
Place EMI components
close to audio codec.
20100705_AUD
Place R2913/R2914 under CODEC,
and place R2921/R2922 near CODEC
Should be used at least 20 MIL width copper line for
"AUD_SPK_L+","AUD_SPK_L-", "AUD_SPK_R+", "AUD_SPK_R-
For EMI issue.
1
2
3
D2901
BAT54CGP-GP
D2901
BAT54CGP-GP
1 2
R2921 0R2J-2-GP
DY
R2921 0R2J-2-GP
DY
1 2
R2906 100R2J-2-GPR2906 100R2J-2-GP
12
C2927
SCD1U25V2ZY-1GP
C2927
SCD1U25V2ZY-1GP
1 2
R2911 0R2J-2-GPR2911 0R2J-2-GP
12
EC2904
SC1KP50V2KX-1GP
EC2904
SC1KP50V2KX-1GP
12
EC2901
SC1KP50V2KX-1GP
EC2901
SC1KP50V2KX-1GP
12
C2931
SC33P50V2JN-3GP
C2931
SC33P50V2JN-3GP
12
C2921
SC10U10V5ZY-1GP
C2921
SC10U10V5ZY-1GP
12
EC2903
SC1KP50V2KX-1GP
EC2903
SC1KP50V2KX-1GP
1 2
R2908 0R2J-2-GPR2908 0R2J-2-GP
1 2
C2916
SC22P50V2JN-4GP
DY
C2916
SC22P50V2JN-4GP
DY
12
C2903
SC10U10V5ZY-1GP
C2903
SC10U10V5ZY-1GP
1 2
R2922 0R2J-2-GP
DY
R2922 0R2J-2-GP
DY
12
C2911
SCD1U25V2ZY-1GP
C2911
SCD1U25V2ZY-1GP
12
C2905
SC10U10V5ZY-1GP
C2905
SC10U10V5ZY-1GP
1 2
C2923 SC2D2U10V3KX-1GPC2923 SC2D2U10V3KX-1GP
12
C2913
SCD1U25V2ZY-1GP
C2913
SCD1U25V2ZY-1GP
12
R2903
10KR2F-2-GP
DY
R2903
10KR2F-2-GP
DY
12
C2907
SCD1U25V2ZY-1GP
C2907
SCD1U25V2ZY-1GP
1 2
C2919
SC2D2U10V3KX-1GP
C2919
SC2D2U10V3KX-1GP
1 2
R2914 0R0805-PAD-1-GPR2914 0R0805-PAD-1-GP
12
R2920
33KR2F-GP
DY
R2920
33KR2F-GP
DY
1 2
C2926
SCD1U10V2KX-5GP
C2926
SCD1U10V2KX-5GP
1 2
R2913 0R0805-PAD-1-GPR2913 0R0805-PAD-1-GP
12
C2902
SCD1U25V2ZY-1GP
C2902
SCD1U25V2ZY-1GP
DMIC_CLK
40
DMIC_1/2
1
VAUX_3_3 2
FILT_1_8 3
SDATA_OUT
4
BIT_CLK
5
SDATA_IN
6
VDD_IO 7
SYNC
8
RESET#
9
PC_BEEP
10
LEFT+
11
LPWR_5_0 12
LEFT-
13
RIGHT-
14
RPWR_5_0 15
RIGHT+
16
CLASS_D_REF 17
DVDD_3_3 18
FLY_P 19
FLY_N 20
AVEE 21
PORTA_L 22
PORTA_R 23
NC#24 24
NC#25 25
AVDD_HP 26
AVDD_3_3 27
AVDD_5V 28
FILT_1_65 29
PORTC_L 30
PORTC_R 31
C_BIAS 32
B_BIAS 33
PORTB_L 34
PORTB_R 35
SENSE_A 36
GPIO1/SPK_MUTE#
37 GPIO0/EAPD#
38 SPDIF
39
GND
41
U2901
CX20671-21Z-GP
71.20671.A03
U2901
CX20671-21Z-GP
71.20671.A03
12
C2906
SCD1U25V2ZY-1GP
C2906
SCD1U25V2ZY-1GP
1 2
R2910 0R2J-2-GPR2910 0R2J-2-GP
12
C2930
SC10U10V5ZY-1GP
C2930
SC10U10V5ZY-1GP
1 2
R2901 0R5J-5-GPR2901 0R5J-5-GP
12
C2901
SC1U10V2KX-1GP
C2901
SC1U10V2KX-1GP
12
R2905
10KR2J-3-GP
R2905
10KR2J-3-GP
12
C2908
SC1U10V2KX-1GP
C2908
SC1U10V2KX-1GP
1 2
C2915
SC6D8P50V2DN-GP
DY
C2915
SC6D8P50V2DN-GP
DY
12
C2925
SCD1U25V2ZY-1GP
C2925
SCD1U25V2ZY-1GP
12
C2924
SC10U10V5ZY-1GP
C2924
SC10U10V5ZY-1GP
12
C2914
SC6D8P50V2DN-GP
DY
C2914
SC6D8P50V2DN-GP
DY
12
C2909
SCD1U25V2ZY-1GP
C2909
SCD1U25V2ZY-1GP
1 2
C2922 SC2D2U10V3KX-1GPC2922 SC2D2U10V3KX-1GP
1 2
R2907 100R2F-L1-GP-UR2907 100R2F-L1-GP-U
12
C2912
SC10U10V5ZY-1GP
C2912
SC10U10V5ZY-1GP
1 2
R2909 0R2J-2-GPR2909 0R2J-2-GP
12
C2934
SC33P50V2JN-3GP
DY
C2934
SC33P50V2JN-3GP
DY
12
C2904
SCD1U25V2ZY-1GP
C2904
SCD1U25V2ZY-1GP
1 2
R2912 33R2J-2-GPR2912 33R2J-2-GP
1 2
R2902 0R3J-0-U-GPR2902 0R3J-0-U-GP
12
C2928
SCD1U25V2ZY-1GP
C2928
SCD1U25V2ZY-1GP
12
C2932
SC100P50V2JN-3GP
DY
C2932
SC100P50V2JN-3GP
DY
12
C2910
SC10U10V5ZY-1GP
DY
C2910
SC10U10V5ZY-1GP
DY
G
S
D
Q2901
2N7002K-2-GP
84.2N702.J31
2nd = 84.2N702.031
Q2901
2N7002K-2-GP
84.2N702.J31
2nd = 84.2N702.031
12
C2929
SC10U10V5ZY-1GP
C2929
SC10U10V5ZY-1GP
1 2
C2917 SCD1U10V2KX-5GPC2917 SCD1U10V2KX-5GP
12
C2920
SCD1U25V2ZY-1GP
C2920
SCD1U25V2ZY-1GP
12
R2918
33KR2F-GP
R2918
33KR2F-GP
G
S
D
Q2902
2N7002K-2-GP
84.2N702.J31
DY
2nd = 84.2N702.031
Q2902
2N7002K-2-GP
84.2N702.J31
DY
2nd = 84.2N702.031
G
S
D
Q2903
2N7002K-2-GP
84.2N702.J31
2nd = 84.2N702.031
Q2903
2N7002K-2-GP
84.2N702.J31
2nd = 84.2N702.031
12
R2915
5K11R2F-L1-GP
R2915
5K11R2F-L1-GP
12
EC2902
SC1KP50V2KX-1GP
EC2902
SC1KP50V2KX-1GP
12
C2933
SC33P50V2JN-3GP
DY
C2933
SC33P50V2JN-3GP
DY
1 2
R2919 0R2J-2-GPR2919 0R2J-2-GP
![](asset-1e.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
AMP
A3
30 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
AMP
A3
30 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
AMP
A3
30 94
Tuesday, November 09, 2010
<Core Design>
![](asset-1f.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LAN_PWR_ON_T
3D3V_S5
3D3V_LAN_S5
LAN_PWR_ON18
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
LAN PWR SW
A4
31 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
LAN PWR SW
A4
31 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
LAN PWR SW
A4
31 94
Tuesday, November 09, 2010
<Core Design>
-1 0114
G
S
D
Q3104
2N7002K-2-GP
84.2N702.J31
2nd = 84.2N702.031
Q3104
2N7002K-2-GP
84.2N702.J31
2nd = 84.2N702.031
1 2
R3135 0R3J-0-U-GP
DY
R3135 0R3J-0-U-GP
DY
12
C3152
SCD1U16V2KX-3GP
C3152
SCD1U16V2KX-3GP
12
C3151
SCD1U10V2KX-5GP
C3151
SCD1U10V2KX-5GP
D
G
S
Q3103
AO3419L-GP
84.03419.031
Q3103
AO3419L-GP
84.03419.031
12
R3133
100KR2J-1-GP
R3133
100KR2J-1-GP
12
C3150
SC1U10V2KX-1GP
C3150
SC1U10V2KX-1GP
![](asset-20.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CDR_PCIE_VOUT_VIN
SD_D1_U
PCIE_RXN3_C
SD_D2_U
PCIE_RXP3_C
CDR_SD18C_R
PLT_RST#_CR
CDR_UDIO0_MEDIA
CDR_MFIO5_MEDIA
CDR_MFIO8_MEDIA
CDR_RXC_MEDIA
CDR_CPO_MEDIA
CDR_RREF_MEDIA
SD_D3_U CDR_LUDIO2_R
SD_D0_U
+3.3V_RUN_CARD
3D3V_S0
3D3V_S0
3D3V_CARD_S0
PLT_RST# 5,18,27,36,65,66,71,80,82,83
SD_CLK74
SD_D074 SD_D174 SD_WP74
SD_CMD74
SD_DET#74
CLK_PCIE_CR# 20
PCIE_CLK_CR_RQ2# 20
PCIE_TXN3 20
CLK_PCIE_CR 20
SD_D274 SD_D374
PCIE_TXP3 20
PCIE_RXN3 20
PCIE_RXP3 20
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
R5U220 (CARD READER)
A3
32 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
R5U220 (CARD READER)
A3
32 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
R5U220 (CARD READER)
A3
32 94
Tuesday, November 09, 2010
<Core Design>
SD_D0
SD_D1
(SD_D6)
(SD_D7)
SD_CDM
(SD_D5)
SD_CLK
SD_D2
SD_D3
(SD_D4)
MSD0
(MS_D5)
MS_D1
MSBS
SDDC#
(MS_D4)
(MS_D6)
MS_D2
MS_D3
MSINS#
MS_CLK
(MS_D7)
XD_D6
XD_D7
XD_D3
XD_D5
XD_WP#
XD_D4
XD_D0
XD_D1
XD_D2
XD_CE#
XD_CLE
XD_ALE
XD_WE#
XDCD0#
XD_R/B
XD_RE#
XDCD1#
MFIO00
MFIO07
MFIO06
MFIO05
MFIO04
MFIO02
MFIO10
MFIO09
MFIO08
MFIO01
MFIO03
MFIO12
MFIO11
MFCD1#
MFCD0#
MFIO14
MFIO13
XDMEMORYSTICKMEDIA I/F SD/MMC
SDWP#
Please apply external parts, R456, C457, R415 for RXC,
CPO, and RREF, as close as possible to R5U220.
Please apply 50 ohm impedance control
for these SDXC signals;
MDIF_05, SD_CLK MDIF_08, SD_CMD
MDIF_02, SD_DATA0 MDIF_01, SD_DATA1
MDIF_11, SD_DATA2 MDIF_1O, SD_DATA3
Please apply wide trace for MF_VOUT
between R5U220 and SD Card Slot.
- 2A (W=2mm) Recommended.
- Please consider the number of
vias when layer of MF_VOUT is changed.
Please apply capacitor C3210 for SD18C
as close as possible to R5U220.
RICOH recommends strongly, Trace length Difference
among these SDXC signals are smaller than 0.5 inches.
MDIF_05, SD_CLK MDIF_08, SD_CMD
MDIF_02, SD_DATA0 MDIF_01, SD_DATA1
MDIF_11, SD_DATA2 MDIF_1O, SD_DATA3
Please use Microstrip trace routing
for these SDXC signals
MDIF_05, SD_CLK MDIF_08, SD_CMD
MDIF_02, SD_DATA0 MDIF_01, SD_DATA1
MDIF_11, SD_DATA2 MDIF_1O, SD_DATA3
Please apply differential impedance control for these
signal pairs
in conformity with Motherboard Design Guide;
CLK_PCIE_CR, CLK_PCIE_CR#
PCIE_TXN3, PCIE_TXP3
PCIE_RXN3_C, PCIE_RXP3_C
PCIE_RXN3, PCIE_RXP3
Please apply equal trace length for these signal pairs;
CLK_PCIE_CR, CLK_PCIE_CR#
PCIE_TXN3, PCIE_TXP3
PCIE_RXN3_C, PCIE_RXP3_C
PCIE_RXN3, PCIE_RXP3
Please place these capacitors
for VCC_3Vx as close to R5U220 as possible
Please place these capacitors,
for PCIE_VOUT as close to R5U220 as possible.
Please place these capacitors,
for PCIE_VIN as close to R5U220 as possible.
Please apply AC Coupling capacitors, C455 and C454,
for TXP/TXN as close as possible to R5U220.
RICOH recommends strongly, the trace length
for these SDXC signals are less than 6-inches.
MDIF_05, SD_CLK MDIF_08, SD_CMD
MDIF_02, SD_DATA0 MDIF_01, SD_DATA1
MDIF_11, SD_DATA2 MDIF_1O, SD_DATA3
Please apply capacitors for MF_VOUT
as close as possible to connector
Otherwise
1 2
C3213SCD022U25V2KX-GP C3213SCD022U25V2KX-GP
1 2
R3202 0R2J-2-GPR3202 0R2J-2-GP
1 2
R3204 33R2J-2-GP
R3204 33R2J-2-GP
1 2
C3214
SC8200P25V2JX-GP
C3214
SC8200P25V2JX-GP
1 2
R3201
0R3J-0-U-GP
R3201
0R3J-0-U-GP
12
C3202
SCD1U10V2KX-5GP
C3202
SCD1U10V2KX-5GP
EB
C
R1
Q3201
PDTC115TE-GP
R1
Q3201
PDTC115TE-GP
1 2
R3209 0R2J-2-GPR3209 0R2J-2-GP
12
C3207
SCD1U10V2KX-5GP
C3207
SCD1U10V2KX-5GP
12
C3203
SC1U10V2KX-1GP
C3203
SC1U10V2KX-1GP
12
C3201
SCD1U10V2KX-5GP
C3201
SCD1U10V2KX-5GP
1 2
R3210
33KR2F-GP
R3210
33KR2F-GP
12
C3208
SCD1U10V2KX-5GP
C3208
SCD1U10V2KX-5GP
12
C3206
SCD1U10V2KX-5GP
C3206
SCD1U10V2KX-5GP
1 2
C3212 SCD1U10V2KX-5GPC3212 SCD1U10V2KX-5GP
12
C3209
SC10U6D3V3MX-GP
C3209
SC10U6D3V3MX-GP
1 2
R3205 0R2J-2-GP
R3205 0R2J-2-GP
REFCLKN 15
PERST# 10
NCTEST2 5
NCTEST1 4
CPO 22
MDIF0
25
MDIF1
26
MDIF2
27
MDIF3
28
MDIF4
29
MDIF5
31
MDIF6
33
MDIF7
34
MDIF8
35
MDIF9
38
MDIF10
39
MDIF11
40
MDIF12
41
MDIF13
42
MDIF14
43
MFCD0#
8
MFCD1#
9
VCC_3V
37
PCIE_VOUT
47 PCIE_VOUT
32 PCIE_VOUT
13
VCC_3V
48
VCC_3V
12
MF_VOUT 36
SDA/UDIO3 44
SROMEN/SCL/UDIO2 45
CLKREQ#/UDIO1 46
TXP 20
TXN 21
TEST 11
SD18C
30
RXP 16
RXN 18
RXC 17
RREF 24
REFCLKP 14
NCTEST0 1
GND 49
NCTEST3 6
NCTEST4 7
UDIO4 2
UDIO5 3
PCIE_VIN
19
PCIE_VIN
23
U3201
R5U220-QFN48P-1-GP
71.5U220.A03
U3201
R5U220-QFN48P-1-GP
71.5U220.A03
1 2
R3207 0R2J-2-GPR3207 0R2J-2-GP
12
C3210
SC1U10V2KX-1GP
C3210
SC1U10V2KX-1GP
1 2
C3211 SCD1U10V2KX-5GPC3211 SCD1U10V2KX-5GP
1 2
R3206 0R2J-2-GPR3206 0R2J-2-GP
12
C3204
SCD1U10V2KX-5GP
C3204
SCD1U10V2KX-5GP
1 2
R3208
5K1R2F-2-GP
R3208
5K1R2F-2-GP
1 2
R3203 0R2J-2-GPR3203 0R2J-2-GP
12
C3205
SCD1U10V2KX-5GP
C3205
SCD1U10V2KX-5GP
![](asset-21.png)
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
1394
A4
33 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
1394
A4
33 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
1394
A4
33 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
BLANK
![](asset-22.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
Smart Card Reader
A4
34 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
Smart Card Reader
A4
34 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
Smart Card Reader
A4
34 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
BLANK
![](asset-23.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
USB3.0
A4
35 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
USB3.0
A4
35 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
USB3.0
A4
35 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
BLANK
![](asset-24.png)
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
PM_SLP_S3#
PS_S3CNTRL
PM_SLP_S3 PM_SLP_S3#
Z_12V_D4
Z_12V_G3
IMVP_PWRGD_R PM_SLP_S3#
SYS_PWROK
S0_PWR_GOOD_R
IMVP_PWRGD
H_PWRGD_R
PM_SLP_S3# SLG_RUN_ENABLE
Z_12V
3D3V_S5
RUN_ENABLE
1D5V_S0 1D5V_S3
3D3V_S0 3D3V_S5
DCBATOUT
5V_S0 5V_S5
3D3V_AUX_S5
3D3V_S5
3D3V_S5
1D05V_VTT
5V_S0
5V_S5 5V_S5 3D3V_S0
RUN_ENABLE_S
RUN_ENABLE_S
RUNPWROK19,37,45,46,47
PS_S3CNTRL 37
PM_SLP_S3#19,27,37,47,82
H_THERMTRIP# 5,22,85
H_CPUPWRGD5,22
PURE_HW_SHUTDOWN# 27,28
S5_ENABLE 27
PLT_RST#5,18,27,32,65,66,71,80,82,83
3V_5V_EN41
IMVP_PWRGD28,42
S0_PWR_GOOD19,27 PWR_1D05V_EN 45
SYS_PWROK 19
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
POWER SEQUENCE
A3
36 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
POWER SEQUENCE
A3
36 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
POWER SEQUENCE
A3
36 94Tuesday, November 09, 2010
<Core Design>
Total= 15A
1D5V_S0
MAX Current 3000 mA
Design Current 2100 mA
Run Power
Power Sequence
Change to Diode??
20100805 V1.8
1 2
R3610 0R2J-2-GPR3610 0R2J-2-GP
12
R3620
10KR2J-3-GP
R3620
10KR2J-3-GP
1 2
R3609 0R2J-2-GPR3609 0R2J-2-GP
12
C3612
SCD01U50V2KX-1GP
C3612
SCD01U50V2KX-1GP
12
R3632
2K2R2J-2-GP
R3632
2K2R2J-2-GP
12
C3611
SCD01U50V2KX-1GP
C3611
SCD01U50V2KX-1GP
1
2
3
4 5
6
7
8
S
S
S
G D
D
D
D
U3607
AO4468-GP
84.04468.037
S
S
S
G D
D
D
D
U3607
AO4468-GP
84.04468.037
12
R3616 4K7R2J-2-GPR3616 4K7R2J-2-GP
1 2
R3612 10KR2J-3-GPR3612 10KR2J-3-GP
12
C3602
SCD1U10V2KX-5GP
C3602
SCD1U10V2KX-5GP
1 2
R3619 10KR2J-3-GPR3619 10KR2J-3-GP
1 2
R3608 100KR2J-1-GPR3608 100KR2J-1-GP
12
R3602
200KR2J-L1-GP
DY
R3602
200KR2J-L1-GP
DY
1 2
C3607
SCD1U25V3KX-GP
DY
C3607
SCD1U25V3KX-GP
DY
12
R3622 56R2F-1-GP
DY
R3622 56R2F-1-GP
DY
KA
D3602
MMPZ5239BGP-GP
D3602
MMPZ5239BGP-GP
12
C3613
SCD01U50V2KX-1GP
DY
C3613
SCD01U50V2KX-1GP
DY
1 2
R3614 0R2J-2-GP
DY
R3614 0R2J-2-GP
DY
G
DS
Q3604
NDS0610-G-GP
Q3604
NDS0610-G-GP
1
2
3
4 5
6
7
8
S
S
S
D
D
D
D
G
U3605
SIR460DP-T1-GE3-GP
84.00460.037
2nd = 84.08039.037
S
S
S
D
D
D
D
G
U3605
SIR460DP-T1-GE3-GP
84.00460.037
2nd = 84.08039.037
VCC
1
ON
2
DIS2
3
GND
4
D5
S/DIS1 6
G1/G2 7
PG 8
NC#9 9
U3610
SLG55221-130010VTR-GP
74.55221.0E3
U3610
SLG55221-130010VTR-GP
74.55221.0E3
G
S
D
Q3606
2N7002K-2-GP
84.2N702.J31
2nd = 84.2N702.031
Q3606
2N7002K-2-GP
84.2N702.J31
2nd = 84.2N702.031
12
C3606
SCD22U25V3KX-GP
C3606
SCD22U25V3KX-GP
1 2
R3601 1KR2J-1-GP
DY
R3601 1KR2J-1-GP
DY
B
1
A
2
GND
3Y4
VCC 5
U3603
74LVC1G08GW-1-GP
2ND = 73.7SZ08.DAH
73.01G08.L04
U3603
74LVC1G08GW-1-GP
2ND = 73.7SZ08.DAH
73.01G08.L04
1
2
3
D3601
BAS16GP-GP
D3601
BAS16GP-GP
1
2
3
4 5
6
7
8
S
S
S
G D
D
D
D
U3608
AO4468-GP
84.04468.037
S
S
S
G D
D
D
D
U3608
AO4468-GP
84.04468.037
1 2
R3626
0R2J-2-GP
R3626
0R2J-2-GP
C
B
E
Q3601
CHT2222AGP-GP-U
Q3601
CHT2222AGP-GP-U
G
S
D
Q3603
2N7002K-2-GP
84.2N702.J31
2nd = 84.2N702.031
Q3603
2N7002K-2-GP
84.2N702.J31
2nd = 84.2N702.031
12
R3621
330KR2J-L1-GP
R3621
330KR2J-L1-GP
12
R3615
0R2J-2-GP
DY
R3615
0R2J-2-GP
DY
12
R3603 2KR2F-3-GPR3603 2KR2F-3-GP
12
R3617
100KR2J-1-GP
R3617
100KR2J-1-GP
1 2
R3613 0R2J-2-GPR3613 0R2J-2-GP
1 2
R3618 330KR2J-L1-GPR3618 330KR2J-L1-GP
1
2
34
5
6
Q3605
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
Q3605
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
B
1
A
2
GND
3Y4
VCC 5
U3609
74LVC1G08GW-1-GP
2ND = 73.7SZ08.DAH
73.01G08.L04
DY
U3609
74LVC1G08GW-1-GP
2ND = 73.7SZ08.DAH
73.01G08.L04
DY
![](asset-25.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PS_S3CNTRLPS_S3CNTRL
0D75V_EN_L
1.5V_RUN_CPU_EN#
1.5V_RUN_CPU_EN PM_SLP_S3#
SM_DRAMRST#_D
DRAMRST_CNTRL_PCH
+V_SM_VREF
0D75V_EN_1
VDDPWRGOOD_R
VDDPWRGOOD_R
0D75V_EN
1D5V_S00D75V_S0
1D5V_S0
5V_S5
3D3V_S0
1D5V_S3
3D3V_S5
1D5V_S03D3V_S5
+V_SM_VREF_CNT 9
0D75V_EN 46
DDR3_DRAMRST# 14,15
PM_DRAM_PWRGD5,19
PS_S3CNTRL36
M_VREF_DQ_DIMM07,14
DRAMRST_CNTRL_PCH 20
SM_DRAMRST#5
1.05VTT_PWRGD 45,48
PM_SLP_S3# 19,27,36,47,82
VDDPWRGOOD 5
PM_DRAM_PWRGD5,19
RUNPWROK19,36,45,46,47
1.05VTT_PWRGD45,48
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
ADAPTER OCP / S3 reduction
A3
37 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
ADAPTER OCP / S3 reduction
A3
37 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
ADAPTER OCP / S3 reduction
A3
37 94Tuesday, November 09, 2010
<Core Design>
Close to CPU
S3 Power Reduction Circuit SM_DRAMPWROK
Close to CPU
S3 Power Reduction Circuit Processor VREF_DQ Implementation
2
S3 Power Reduction Circuit
SM_DRAMRST#
Close to DIMM
S3 Power Reduction Circuit SM_DRAMPWROK
For U3701 not OD AND gate
R3719 to 64.15015.6DL
R3720 to 64.75005.6DL
R3702 to DY
Close to CPU
S3 Power Reduction Circuit SM_DRAMPWROK
OD AND gate required
SM_DRAMPWROK must have a maximum of 15ns rise or fall time
over VDDQ * 0.55± 200mV and the edge must be monotonic
CEKLT V1.0: PCH to 1K,CUP to 200R
1 2
R3721
1KR2J-1-GP
R3721
1KR2J-1-GP
12
C3702
SC100P50V2JN-3GP
C3702
SC100P50V2JN-3GP
12
C3705
SCD1U10V2KX-5GP
DY
C3705
SCD1U10V2KX-5GP
DY
G
S
D
Q3704
2N7002K-2-GP
84.2N702.J31
2nd = 84.2N702.031
Q3704
2N7002K-2-GP
84.2N702.J31
2nd = 84.2N702.031
G
S
D
Q3705
2N7002K-2-GP
84.2N702.J31
DY
2nd = 84.2N702.031
Q3705
2N7002K-2-GP
84.2N702.J31
DY
2nd = 84.2N702.031
12
R3722 0R2J-2-GP
DY
R3722 0R2J-2-GP
DY
G
S
D
Q3703
2N7002K-2-GP
84.2N702.J31
2nd = 84.2N702.031
Q3703
2N7002K-2-GP
84.2N702.J31
2nd = 84.2N702.031
IN B
1
IN A
2
GND
3OUT Y 4
VCC 5
U3701
74VHC1G09DFT2G-GP
73.01G09.AAH
2ND =
U3701
74VHC1G09DFT2G-GP
73.01G09.AAH
2ND =
12
C3704
SCD1U10V2KX-5GP
DY
C3704
SCD1U10V2KX-5GP
DY
12
R3706
1KR2J-1-GP
R3706
1KR2J-1-GP
12
R3718
200R2F-L-GP
R3718
200R2F-L-GP
1 2
R3719
130R2F-1-GP
R3719
130R2F-1-GP
12
R3703
22R2J-2-GP
R3703
22R2J-2-GP
12
R3711
0R0402-PAD
R3711
0R0402-PAD
G
S
D
Q3702
2N7002K-2-GP
84.2N702.J31
DY
2nd = 84.2N702.031
Q3702
2N7002K-2-GP
84.2N702.J31
DY
2nd = 84.2N702.031
1 2
R3720
0R2J-2-GP
DY
R3720
0R2J-2-GP
DY
1 2
R37090R2J-2-GP
DY
R37090R2J-2-GP
DY
12
R3702
200R2F-L-GP
R3702
200R2F-L-GP
1 2
R3710
0R2J-2-GP
R3710
0R2J-2-GP
1 2
R3707 0R2J-2-GP
DY
R3707 0R2J-2-GP
DY
G
S
D
Q3701
2N7002K-2-GP
84.2N702.J31
2nd = 84.2N702.031
Q3701
2N7002K-2-GP
84.2N702.J31
2nd = 84.2N702.031
3
1
2
Q3706
PMBS3904-1-GP
DY
84.03904.L06
3rd = 84.03904.L06
2ND = 84.03904.P11
Q3706
PMBS3904-1-GP
DY
84.03904.L06
3rd = 84.03904.L06
2ND = 84.03904.P11
G
S
D
Q3708
2N7002K-2-GP
84.2N702.J31
2nd = 84.2N702.031
Q3708
2N7002K-2-GP
84.2N702.J31
2nd = 84.2N702.031
1 2
R3708 0R2J-2-GPR3708 0R2J-2-GP
1 2
R3716
0R2J-2-GP
DY
R3716
0R2J-2-GP
DY
12
R3714
100KR2J-1-GP
DY
R3714
100KR2J-1-GP
DY
1 2
R3701 0R2J-2-GP
DY
R3701 0R2J-2-GP
DY
1 2
R3713 0R2J-2-GPR3713 0R2J-2-GP
1 2
R3705
100KR2J-1-GP
R3705
100KR2J-1-GP
12
C3701
SCD1U10V2KX-5GP
DY
C3701
SCD1U10V2KX-5GP
DY
12
R3704
220R2J-L2-GP
DY
R3704
220R2J-L2-GP
DY
12
R3715
4K7R2J-2-GP
DY
R3715
4K7R2J-2-GP
DY
12
C3703 SCD047U16V2KX-1-GP
C3703 SCD047U16V2KX-1-GP
12
R3712
10KR2J-3-GP
DY
R3712
10KR2J-3-GP
DY
![](asset-26.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
DCIN_JACK
38 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
DCIN_JACK
38 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
DCIN_JACK
38 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
![](asset-27.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BATA_SDA_1
BATA_SCL_1
BAT_IN#_1
BT+_F3901
BATA_SCL_1
BT+_F3901
BAT_IN#_1
BATA_SDA_1
BT+
BAT_IN#27
BAT_SCL27,40 BAT_SDA27,40
BATT_SENSE40
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
BATT_CONN
39 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
BATT_CONN
39 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
BATT_CONN
39 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
BATTERY CONNECTOR
N/A 83.5R603.R3F
83.5R603.K3F
CHENMKO
DIODES
Description Lenovo P/N Wistron P/N
N/AMMSZ5232BS-7-F
MMPZ5232BGP
Supplier
Table 39.1- Surface Mount Zener ESD multi-source
83.5R603.Q3FPANJIT MMSZ5232BS N/A
GND 6
GND 7
88
99
BAT_VCC
1
BAT_VCC
2
I2C_CLK
3
I2C_DATA
4
TEMP
5
NP1 NP1
NP2 NP2
BAT1
TYCO-CON7-30-GP
20.81506.007
BAT1
TYCO-CON7-30-GP
20.81506.007
12
PL3903
MLVS0402M04-GP
DY
PL3903
MLVS0402M04-GP
DY
12
PL3901
MLVS0402M04-GP
DY
PL3901
MLVS0402M04-GP
DY
KA
PD3901
MMPZ5232BGP-GP
PD3901
MMPZ5232BGP-GP
12
F3901
FUSE-20A24V-1-GP
F3901
FUSE-20A24V-1-GP
1
2
3
4 5
6
7
8
PRN3901
SRN33J-7-GP
PRN3901
SRN33J-7-GP
12
PC3905
SC1000P50V3JN-GP-U
DY
PC3905
SC1000P50V3JN-GP-U
DY
12
PC3904
SC10P50V2JN-4GP
DY
PC3904
SC10P50V2JN-4GP
DY
1
TP3904 AFTE14P-GPTP3904 AFTE14P-GP
1 2
PR3901 0R2J-2-GPPR3901 0R2J-2-GP
1
TP3903 AFTE14P-GPTP3903 AFTE14P-GP
12
PC3903
SC10P50V2JN-4GP
DY
PC3903
SC10P50V2JN-4GP
DY
1
TP3902 AFTE14P-GPTP3902 AFTE14P-GP
12
PC3902
SC2200P50V2KX-2GP
PC3902
SC2200P50V2KX-2GP
12
PL3902
MLVS0402M04-GP
DY
PL3902
MLVS0402M04-GP
DY
1
TP3901 AFTE14P-GPTP3901 AFTE14P-GP
12
PC3901
SCD1U50V3KX-GP
PC3901
SCD1U50V3KX-GP
![](asset-28.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CHG_ICREF
STOP_CHG#
CHG_ON#
BQ24745_ICOUT
BQ24745_BST
24745_HIGH_G
BQ24745_VDDP
BQ24745_EAO_RC
BQ24745_CSSP
BQ24745_CSSN
BQ24745_FBO_RC BQ24745_FBO
MAX8731A_CSIP
AD+_G_2
BQ24745_LX1
AD+_TO_SYS
24745_LOW_G
BQ24745_DCIN
BT+_R
BQ24745_EAO
AD+_G_1
BQ24745_ACIN
DC_IN_D
AC_IN
BQ24745_EAI
MAX8731A_CSIN
BQ24745_ACOK
BQ24745_VREF
BQ24745_ACOK
BQ24745_CHG_ON
BQ24745_IINP
BQ24745_CHG_ON
BATT_SENSE
CHG_ON#
BQ24745_CHG_ON
BQ24745_VREF
CHG_AGND
3D3V_AUX_S5
3D3V_AUX_S5
AD+
CHG_AGND
AD+
DCBATOUT
BT+
CHG_AGND
CHG_AGND
DCBATOUT
BT+
AD+
AD+
CHG_AGND
CHG_AGND
CHG_AGND
BQ24745_VREF
CHG_AGND
3D3V_AUX_S5
CHG_AGND
BT+
AD_IA27
BATT_SENSE 39
AC_IN 27
CHG_ON# 27
BAT_SDA27,39
BAT_SCL27,39
STOP_CHG# 27
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
Charger_BQ24745
40 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
Charger_BQ24745
40 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
Charger_BQ24745
40 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
R1
R2
STOP_CHG#
connects to KBC
NEAR
AD+ total power R1 R2
65w
90w
49.9k
49.9k
187k
121k
AD+ total power R1 R2
80w 49.9k137k
20100518 WAYNE
20100518 WAYNE
AC_IN to KBC
20100707
12
PC4019
SC10U25V6KX-1GP
PC4019
SC10U25V6KX-1GP
12
PC4003
SCD1U50V3KX-GP
PC4003
SCD1U50V3KX-GP
12
PC4006
SCD1U25V2ZY-1GP
PC4006
SCD1U25V2ZY-1GP
1
2
3
4 5
6
7
8
S
S
S
G D
D
D
D
PU4002
P1403EV8-GP
84.P1403.B37
S
S
S
G D
D
D
D
PU4002
P1403EV8-GP
84.P1403.B37
1 2
PR4015
200KR2F-L-GP
PR4015
200KR2F-L-GP
12
PC4018
SC10U25V6KX-1GP
PC4018
SC10U25V6KX-1GP
12
PC4002
SCD1U50V3KX-GP
PC4002
SCD1U50V3KX-GP
12
PR4010
49K9R2F-L-GP
PR4010
49K9R2F-L-GP
12
PC4011
SC220P50V2KX-3GP
PC4011
SC220P50V2KX-3GP
12
PR4003
49K9R2F-L-GP
PR4003
49K9R2F-L-GP
1 2
PC4009
SC1U10V3KX-3GP
PC4009
SC1U10V3KX-3GP
12
PC4020
SC10U25V6KX-1GP
PC4020
SC10U25V6KX-1GP
1 2
PC4004
SCD1U25V3KX-GP
PC4004
SCD1U25V3KX-GP
12
PC4007
SCD01U50V2KX-1GP
PC4007
SCD01U50V2KX-1GP
1 2
PC4010
SC150P50V2JN-3GP
PC4010
SC150P50V2JN-3GP
12
PC4016
SCD1U50V3KX-GP
PC4016
SCD1U50V3KX-GP
12
PC4008
SC1U10V3KX-3GP
PC4008
SC1U10V3KX-3GP
12
PC4025
SC10U25V6KX-1GP
PC4025
SC10U25V6KX-1GP
12
PC4024
SC470P50V2KX-3GP
DY
PC4024
SC470P50V2KX-3GP
DY
12
PC4021
SC10U25V6KX-1GP
PC4021
SC10U25V6KX-1GP
1 2
PR4008
49K9R2F-L-GP
PR4008
49K9R2F-L-GP
A K
PD4002
SMF18A-GP
83.SMF18.AAH
PD4002
SMF18A-GP
83.SMF18.AAH
12
PR4006
316KR3F-2-GP
PR4006
316KR3F-2-GP
1 2
PL4001
IND-5D6UH-39-GP
68.5R610.10P
PL4001
IND-5D6UH-39-GP
68.5R610.10P
12
PG4001
GAP-CLOSE-PWR-3-GP
PG4001
GAP-CLOSE-PWR-3-GP
12
PC4005
SC10U25V5KX-GP
PC4005
SC10U25V5KX-GP
1 2
PR4018 0R2J-2-GPPR4018 0R2J-2-GP
12
PC4015
SCD1U25V2ZY-1GP
PC4015
SCD1U25V2ZY-1GP
1 2
PR4013
0R0402-PAD
PR4013
0R0402-PAD
12
PC4014
SC1U10V3KX-3GP
PC4014
SC1U10V3KX-3GP
1 2
PR4017
D01R3721F-GP-U
PR4017
D01R3721F-GP-U
12
PC4001
SC1U25V5KX-1GP
PC4001
SC1U25V5KX-1GP
1 2
PR4012
0R2J-2-GP
PR4012
0R2J-2-GP
1
2
3
45
6
7
8
S
S
S
GD
D
D
D
PU4001
P1403EV8-GP
84.P1403.B37
S
S
S
GD
D
D
D
PU4001
P1403EV8-GP
84.P1403.B37
12
PR4005
470KR2F-GP
PR4005
470KR2F-GP
12
PG4004
GAP-CLOSE-PWR-3-GP
PG4004
GAP-CLOSE-PWR-3-GP
1 2
PR4001
10KR2F-2-GP
PR4001
10KR2F-2-GP
1 2
PR4011
0R0402-PAD
PR4011
0R0402-PAD
1
2
34
5
6
PQ4001
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
PQ4001
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
12
PC4012
SC2200P50V2KX-2GP
PC4012
SC2200P50V2KX-2GP
12
PR4007
121KR2F-L-GP
PR4007
121KR2F-L-GP
12
PR4002
100KR2J-1-GP
PR4002
100KR2J-1-GP
12
C4001
SCD1U10V2KX-5GP
DY
C4001
SCD1U10V2KX-5GP
DY
1
2
3
4 5
6
7
8
S
S
S
GD
D
D
D
PU4004
SIS412DN-T1-GE3-GP
84.00412.037
S
S
S
GD
D
D
D
PU4004
SIS412DN-T1-GE3-GP
84.00412.037
1 2
PC4013SC56P50V2JN-2GP PC4013SC56P50V2JN-2GP
12
PC4023
SC10U25V5KX-GP
PC4023
SC10U25V5KX-GP
1
2
3
4 5
6
7
8
S
S
S
GD
D
D
D
PU4005
SIS412DN-T1-GE3-GP
84.00412.037
S
S
S
GD
D
D
D
PU4005
SIS412DN-T1-GE3-GP
84.00412.037
1 2
PR4014
4K7R2J-2-GP
PR4014
4K7R2J-2-GP
1 2
PR4004
D01R3721F-GP-U
PR4004
D01R3721F-GP-U
1
2
3
4 5
6
7
8
PRN4001
SRN100KJ-8-GP-U
PRN4001
SRN100KJ-8-GP-U
12
PR4009
10KR2F-2-GP
DY
PR4009
10KR2F-2-GP
DY
AK
PD4001
1SS400GGP-GP
PD4001
1SS400GGP-GP
12
PG4003
GAP-CLOSE-PWR-3-GP
PG4003
GAP-CLOSE-PWR-3-GP
12
PC4022
SCD1U50V3KX-GP
PC4022
SCD1U50V3KX-GP
CE
7
VDDSMB
11
DCIN
22
PGND 19
SCL
10
SDA
9
ACIN
2
NC#14
14
VICM
8
ACOK
13
GND
12
FBO
6
EAI
5
EAO
4
CSSP 28
CSSN 27
VREF
3
BOOT 25
VDDP 21
UGATE 24
PHASE 23
LGATE 20
ICREF 1
CSON 17
NC#16 16
VFB 15
ICOUT 26
CSOP 18
GND
29
PU4003
BQ24745RHDR-GP
74.24745.073
PU4003
BQ24745RHDR-GP
74.24745.073
12
PG4002
GAP-CLOSE-PWR-3-GP
PG4002
GAP-CLOSE-PWR-3-GP
12
PR4016
7K5R2F-1-GP
PR4016
7K5R2F-1-GP
K A
PD4003
CH520S-30GP-GP-U
PD4003
CH520S-30GP-GP-U
1 2
PC4017
SCD1U50V3KX-GP
PC4017
SCD1U50V3KX-GP
G
S
D
PQ4002
2N7002K-2-GP
84.2N702.J31
2nd = 84.2N702.031
PQ4002
2N7002K-2-GP
84.2N702.J31
2nd = 84.2N702.031
12
PR4019
2D2R3-1-U-GP
DY
PR4019
2D2R3-1-U-GP
DY
![](asset-29.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PWR_5V3D3V_VREG2
PWR_5V_UGATE1
PWR_5V_FB1_R
PWR_3D3V_FB2_R
3V_5V_EN9528EN2
PWR_5V_BOOT1_1PWR_3D3V_BOOT1
PWR_5V3D3V_VREG1
PWR_5V_BOOT1
9528FS1
PWR_5V_LGATE1
PWR_3D3V_VOUT2
PWR_3D3V_BOOT2
PWR_3D3V_UGATE2
PWR_3D3V_PHASE2
PWR_3D3V_LGATE2
PWR_3D3V_FB2
9528FS2
9528ILIM2
PWR_5V_PHASE1
PWR_5V_FB1
PWR_5V_VOUT1
9528EN1
9528MCTL2
9528MCTL1
9528ILIM1
9528MCTL1
9528MCTL2
PWR_5V3D3V_VREF
3D3V_PWR_2
3D3V_PWR
DCBATOUT
3D3V_PWR3D3V_S5
PWR_5V_DCBATOUT
5V_PWR_2
3D3V_S5
5V_PWR 5V_S5
5V_PWR
PWR_3D3V_DCBATOUT
DCBATOUT
PWR_5V_DCBATOUT
DCBATOUT
PWR_3D3V_DCBATOUT
5V_AUX_S5 5V_AUX_S5
3D3V_PWR_2 3D3V_AUX_S5
5V_AUX_S55V_PWR_2
3V_5V_EN36
3V_5V_POK 19
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
DC/DC 3D3V5V
41 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
DC/DC 3D3V5V
41 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
DC/DC 3D3V5V
41 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Close to VFB Pin (pin5)
Close to VFB Pin (pin2)
D
S G
G
D
S
G
D
D
SG
S
SSID = PWR.Plane.Regulator_5v3p3v
SANYO cap 220uF
6.3V, ESR=25mohm
68.2R21B.10J
Matsuki cap 220uF
6.3V, ESR=17mohm
77.22271.27L
77.C2271.00L
SANYO
Description Lenovo P/N Wistron P/N
Table 41.1 - POSCAP multi-source
N/A
N/A
V0J227M(25)12RE
6TPE220MAP
Supplier
NEC-TOKIN
12
PC4122
SCD22U10V2KX-1GP
PC4122
SCD22U10V2KX-1GP
12
PC4111
SC4D7U25V5KX-GP
PC4111
SC4D7U25V5KX-GP
12
PR4137
68KR2F-GP
PR4137
68KR2F-GP
1 2
PG4105
GAP-CLOSE-PWR
PG4105
GAP-CLOSE-PWR
1
2
3
4 5
6
7
8
S
S
S
D
D
D
D
G
PU4105
SIS406DN-T1-GE3-GP
S
S
S
D
D
D
D
G
PU4105
SIS406DN-T1-GE3-GP
1 2
PR4105 2D2R3J-2-GPPR4105 2D2R3J-2-GP
1 2
PL4101
IND-3D3UH-116-GP
68.3R31A.10V
PL4101
IND-3D3UH-116-GP
68.3R31A.10V
1 2
PG4103
GAP-CLOSE-PWR
PG4103
GAP-CLOSE-PWR
1 2
PG4125
GAP-CLOSE-PWR
PG4125
GAP-CLOSE-PWR
12
PC4124
SC18P50V2JN-1-GP
DY
PC4124
SC18P50V2JN-1-GP
DY
12
PG4111
GAP-CLOSE-PWR
PG4111
GAP-CLOSE-PWR
12
PC4126
SC10U6D3V3MX-GP
PC4126
SC10U6D3V3MX-GP
12
PR4110
100KR2J-1-GP
DY
PR4110
100KR2J-1-GP
DY
12
PC4113
SCD01U50V2KX-1GP
PC4113
SCD01U50V2KX-1GP
12
EC4101
SCD1U25V2KX-GP
DY
EC4101
SCD1U25V2KX-GP
DY
12
PR4111
6K65R2F-GP
PR4111
6K65R2F-GP
12
PR4130 0R2J-2-GPPR4130 0R2J-2-GP
12
PR4134
0R2J-2-GP
PR4134
0R2J-2-GP
12
PR4136
0R2J-2-GP
DY
PR4136
0R2J-2-GP
DY
12
PC4125
SC10U6D3V3MX-GP
PC4125
SC10U6D3V3MX-GP
1 2
PC4115
SCD47U25V3KX-1GP
PC4115
SCD47U25V3KX-1GP
12
PC4101
SC10U25V6KX-1GP
PC4101
SC10U25V6KX-1GP
12
PC4112
SC4D7U25V5KX-GP
PC4112
SC4D7U25V5KX-GP
1 2
PG4101
GAP-CLOSE-PWR
PG4101
GAP-CLOSE-PWR
12
PR4114
0R2J-2-GP
DY
PR4114
0R2J-2-GP
DY
1 2
PL4102
IND-2D2UH-122-GP
PL4102
IND-2D2UH-122-GP
12
PC4128
SC18P50V2JN-1-GP
DY
PC4128
SC18P50V2JN-1-GP
DY
12
PC4119
SCD1U10V2KX-5GP
PC4119
SCD1U10V2KX-5GP
12
PR4112
0R2J-2-GP
DY
PR4112
0R2J-2-GP
DY
12
PR4115
33KR2F-GP
PR4115
33KR2F-GP
1
2
3
4 5
6
7
8
S
S
S
G D
D
D
D
PU4102
SIS412DN-T1-GE3-GP
S
S
S
G D
D
D
D
PU4102
SIS412DN-T1-GE3-GP
1
2
3
4 5
6
7
8
S
S
S
D
D
D
D
G
PU4104
SIS406DN-T1-GE3-GP
S
S
S
D
D
D
D
G
PU4104
SIS406DN-T1-GE3-GP
12
PR4101
2D2R3-1-U-GP
DY
PR4101
2D2R3-1-U-GP
DY
12
PR4122 0R2J-2-GPPR4122 0R2J-2-GP
1 2
PG4113
GAP-CLOSE-PWR
PG4113
GAP-CLOSE-PWR
12
PC4114
SC4D7U25V5KX-GP
PC4114
SC4D7U25V5KX-GP
12
PG4106
GAP-CLOSE-PWR
PG4106
GAP-CLOSE-PWR
1 2
PG4102
GAP-CLOSE-PWR
PG4102
GAP-CLOSE-PWR
12
PR4119
21K5R2F-GP
PR4119
21K5R2F-GP
12
PC4102
SC470P50V2KX-3GP
DY
PC4102
SC470P50V2KX-3GP
DY
12
PR4116
10KR2F-2-GP
PR4116
10KR2F-2-GP
12
PR4123 0R2J-2-GP
DY
PR4123 0R2J-2-GP
DY
1 2
PR41062D2R3J-2-GP PR41062D2R3J-2-GP
12
PG4108
GAP-CLOSE-PWR
PG4108
GAP-CLOSE-PWR
12
PG4107
GAP-CLOSE-PWR
PG4107
GAP-CLOSE-PWR
1 2
PG4119
GAP-CLOSE-PWR-3-GP
PG4119
GAP-CLOSE-PWR-3-GP
12
PR4139 0R2J-2-GPPR4139 0R2J-2-GP
12
PTC4102
ST220U6D3VDM-20GP
PTC4102
ST220U6D3VDM-20GP
1 2
PR4109 0R2J-2-GPPR4109 0R2J-2-GP
12
PR4102
2D2R3-1-U-GP
DY
PR4102
2D2R3-1-U-GP
DY
1 2
PG4123
GAP-CLOSE-PWR
PG4123
GAP-CLOSE-PWR
12
PC4130
SC1KP50V2KX-1GP
DY
PC4130
SC1KP50V2KX-1GP
DY
1 2
PG4124
GAP-CLOSE-PWR
PG4124
GAP-CLOSE-PWR
12
PG4109
GAP-CLOSE-PWR
PG4109
GAP-CLOSE-PWR
12
PR4131
41K2R2F-GP
PR4131
41K2R2F-GP
12
PR4132
0R2J-2-GP
DY
PR4132
0R2J-2-GP
DY
1 2
PG4104
GAP-CLOSE-PWR
PG4104
GAP-CLOSE-PWR
1 2
PC4118
SCD47U25V3KX-1GP
PC4118
SCD47U25V3KX-1GP
12
PG4110
GAP-CLOSE-PWR
PG4110
GAP-CLOSE-PWR
12
PR4135
75KR2F-GP
PR4135
75KR2F-GP
12
PC4103
SC470P50V2KX-3GP
DY
PC4103
SC470P50V2KX-3GP
DY
1 2
PG4120
GAP-CLOSE-PWR
PG4120
GAP-CLOSE-PWR
VIN 30
CTL
9
EN1 21
EN2
4
REG1
29
REG2
28
REF2V
12
NC#19 19
NC#6
6
ILIM1 17
ILIM2
8
FS1 15
FS2
10
MCTL1 18
MCTL2 16
BOOT1 22
HG1 23
SW1 24
LG1 26
PGND1 25
FB1 14
HG2
2
SW2
1
LG2
31
PGND2
32
FB2
11
BOOT2
3
VO1 27
VO2
7
AGND 13
NC#5
5PGOOD 20
FIN
33
U4103
BD95280MUV-GP
U4103
BD95280MUV-GP
1 2
PG4116
GAP-CLOSE-PWR
PG4116
GAP-CLOSE-PWR
1 2
PG4114
GAP-CLOSE-PWR
PG4114
GAP-CLOSE-PWR
1 2
PG4115
GAP-CLOSE-PWR
PG4115
GAP-CLOSE-PWR
12
EC4102
SCD1U25V2KX-GP
DY
EC4102
SCD1U25V2KX-GP
DY
12
PC4110
SC4D7U25V5KX-GP
PC4110
SC4D7U25V5KX-GP
12
PC4131
SC1KP50V2KX-1GP
DY
PC4131
SC1KP50V2KX-1GP
DY
12
PC4120
SCD1U10V2KX-5GP
PC4120
SCD1U10V2KX-5GP
1
2
3
4 5
6
7
8
S
S
S
G D
D
D
D
PU4101
SIS412DN-T1-GE3-GP
S
S
S
G D
D
D
D
PU4101
SIS412DN-T1-GE3-GP
12
PG4121
GAP-CLOSE-PWR-3-GP
PG4121
GAP-CLOSE-PWR-3-GP
12
PR4133
0R2J-2-GP
PR4133
0R2J-2-GP
1 2
G9306
GAP-CLOSE-PWR-3-GP
G9306
GAP-CLOSE-PWR-3-GP
12
PR4138
41K2R2F-GP
PR4138
41K2R2F-GP
1 2
PG4122
GAP-CLOSE-PWR
PG4122
GAP-CLOSE-PWR
1 2
PG4112
GAP-CLOSE-PWR
PG4112
GAP-CLOSE-PWR
1 2
PG4118
GAP-CLOSE-PWR
PG4118
GAP-CLOSE-PWR
12
PG4117
GAP-CLOSE-PWR-3-GP
PG4117
GAP-CLOSE-PWR-3-GP
12
PTC4101
SE220U6D3VM-21-GP
PTC4101
SE220U6D3VM-21-GP
![](asset-2a.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_PROCHOT_R#
VR_SVID_ALERT#
H_CPU_SVIDCLK
H_CPU_SVIDDAT
PWR_CPUCORE_EN
PWR_CPUCORE_RDYA
PWR_CPUCORE_ROSC
PWR_CPUCORE_VSPA
PWR_CPUCORE_VSNA
PWR_CPUCORE_TSN
PWR_CPUCORE_VSP
PWR_CPUCORE_VBTA
PWR_CPUCORE_CSREF
PR4219_R
PR4217_R
PWR_CPUCORE_COMPAPWR_CPUCORE_COMPA
PWR_CPUCORE_DOUTAPWR_CPUCORE_DOUTA
PWR_CPUCORE_FBAPWR_CPUCORE_FBA
PR4262_R
PWR_CPUCORE_CSSUMAPWR_CPUCORE_CSSUMA
PWR_CPUCORE_ILIMA
PWR_CPUCORE_CSCOMPA
PWR_CPUCORE_IOUTA
PWR_CPUCORE_CSP1
PWR_CPUCORE_CSP3
PWR_CPUCORE_IOUT
PWR_CPUCORE_TSNA
PWR_CPUCORE_VSN
PWR_CPUCORE_DOUT
PWR_CPUCORE_DOUTPWR_CPUCORE_DOUTPWR_CPUCORE_DOUTPWR_CPUCORE_DOUT
PWR_CPUCORE_FB
PWR_CPUCORE_TRBSTPW R_CPUCORE_TRBSTPWR_CPUCORE_TRBST
PWR_CPUCORE_TRBST
PWR_CPUCORE_COMPPWR_CPUCORE_COMP
PWR_CPUCORE_CSCOMPPWR_CPUCORE_CSCOMPPWR_CPUCORE_CSCOMPPW R_CPUCORE_CSCOMPPWR_CPUCORE_CSCOMPPWR_CPUCORE_CSCOMPPW R_CPUCORE_CSCOMPPW R_CPUCORE_CSCOMPPWR_CPUCORE_CSCOMPPWR_CPUCORE_CSCOMPPWR_CPUCORE_CSCOMPPWR_CPUCORE_CSCOMPPWR_CPUCORE_CSCOMPPW R_CPUCORE_CSCOMPPW R_CPUCORE_CSCOMPPWR_CPUCORE_CSCOMPPWR_CPUCORE_CSCOMPPWR_CPUCORE_CSCOMPPWR_CPUCORE_CSCOMPPWR_CPUCORE_CSCOMP
PWR_CPUCORE_CSSUMPW R_CPUCORE_CSSUMPWR_CPUCORE_CSSUMPWR_CPUCORE_CSSUMPWR_CPUCORE_CSSUMPWR_CPUCORE_CSSUMPW R_CPUCORE_CSSUMPWR_CPUCORE_CSSUMPWR_CPUCORE_CSSUMPWR_CPUCORE_CSSUMPWR_CPUCORE_CSSUMPW R_CPUCORE_CSSUMPWR_CPUCORE_CSSUMPW R_CPUCORE_CSSUM
PWR_CPUCORE_RDY
PWR_CPUCORE_CSPA
PWR_CPUCORE_CSNA
PWR_CPUCORE_VCC
PWR_CPUCORE_VRMP
PWR_CPUCORE_TRBSTA
PWR_CPUCORE_IMAX
PWR_CPUCORE_ILIM
5V_PWR
1D05V_VTT
1D05V_VTT
3D3V_S0
3D3V_S0
DCBATOUT
5V_PWR
5V_PWR
5V_PWR
PWR_CPUCORE_PWM1 43
PWR_CPUCORE_PWM3 43
H_PROCHOT#5,27
H_CPU_SVIDDAT8
H_CPU_SVIDCLK8 VR_SVID_ALERT#8
D85V_PWRGD19,48
IMVP_PWRGD28,36
VSS_AXG_SENSE9
VCC_AXG_SENSE9
VCCSENSE8
VSSSENSE8
PWR_CPUCORE_DRON 43,44
PWR_CPUCORE_PWMA 44
CSN1 43
CSN3 43
CSPA 44
CSNA 44
CSP1 43
CSN1 43
CSN3 43
CSP3 43
CSP1 43
CSP3 43
CSPA 44
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
DC/DC CPU CORE1 _NCP6131
94Tuesday, November 09, 2010
LLW-1 / LGG-1
42
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
DC/DC CPU CORE1 _NCP6131
94Tuesday, November 09, 2010
LLW-1 / LGG-1
42
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
DC/DC CPU CORE1 _NCP6131
94Tuesday, November 09, 2010
LLW-1 / LGG-1
42
<Core Design>
For Discrete only,
UMA need to DY
Place close to
VCC_GFXCORE hot spot
Place close to
VCC_CORE hot spot
Place close to
VCC_GFXCORE Inductor
Place close to
VCC_CORE Inductor
GT1_24A_4.6m GT2_33A_3.9m
PR4259
PR4260
PR4215
PR4211
53.6K_1%
13.7K_1%
24.9K_1%
18.7K_1%
63.4K_1%
14.7K_1%
23.2K_1%
26.1K_1%
0830
0830
0830
12
PC4204
SCD1U25V2KX-GP
PC4204
SCD1U25V2KX-GP
1 2
PC4223
SC22P50V2JN-4GP
PC4223
SC22P50V2JN-4GP
12
PR4247
8K25R2F-1-GP
PR4247
8K25R2F-1-GP
12
PR4236
10KR2F-2-GP
PR4236
10KR2F-2-GP
1 2
PR4250
1KR2F-3-GP
PR4250
1KR2F-3-GP
1 2
PR4251
6K19R2F-GP
PR4251
6K19R2F-GP
1 2
PR4242
10R2J-2-GP
PR4242
10R2J-2-GP
1 2
PR4262
165KR2F-L-GP
PR4262
165KR2F-L-GP
1 2
PR4226
6K98R2-GP
PR4226
6K98R2-GP
12
PR4264
NTC-100K-11-GP
PR4264
NTC-100K-11-GP
1 2
PR4244
1K21R2F-2-GP
PR4244
1K21R2F-2-GP
12
PR4216 24K3R2F-1-GPPR4216 24K3R2F-1-GP
1 2
PR4228
6K98R2-GP
PR4228
6K98R2-GP
1 2
PR4261
75KR2J-GP
PR4261
75KR2J-GP
1 2
PR4206
0R2J-2-GP
PR4206
0R2J-2-GP
1 2
PR4263
NTC-220K-5-GP
PR4263
NTC-220K-5-GP
1 2
PR4268
0R2J-2-GP
PR4268
0R2J-2-GP
12
PR4239
0R2J-2-GP
PR4239
0R2J-2-GP
1 2
PR4223
6K98R2-GP
PR4223
6K98R2-GP
12
PR4210
41K2R2F-GP
PR4210
41K2R2F-GP
12
PR4233
130R2F-1-GP
PR4233
130R2F-1-GP
1 2
PC4212
SCD047U25V2KX-GP
PC4212
SCD047U25V2KX-GP
12
PR4204
10KR2F-2-GP
PR4204
10KR2F-2-GP
12
PR4238
0R2J-2-GP
PR4238
0R2J-2-GP
1 2
PR4266
0R2J-2-GP
PR4266
0R2J-2-GP
1 2
PC4206
SC100P50V2JN-3GP
PC4206
SC100P50V2JN-3GP
1 2
PR4229
0R2J-2-GP
PR4229
0R2J-2-GP
1 2
PR4201
2R3J-2-GP
PR4201
2R3J-2-GP
12
PR4213
10R2J-2-GP
PR4213
10R2J-2-GP
1 2
PC4203
SC1KP50V2KX-1GP
PC4203
SC1KP50V2KX-1GP
12
PR4230
0R2J-2-GP
PR4230
0R2J-2-GP
1 2
PC4226
SC470P50V2KX-3GP
PC4226
SC470P50V2KX-3GP
1 2
PR4218 1KR2F-3-GPPR4218 1KR2F-3-GP
12
PC4221
SCD1U25V2KX-GP
PC4221
SCD1U25V2KX-GP
12
PR4254
12K4R2F-GP
PR4254
12K4R2F-GP
1 2
PR4237
10KR2F-2-GP
PR4237
10KR2F-2-GP
12
PR4234
75R2F-2-GP
PR4234
75R2F-2-GP
1 2
PR4203
75R2F-2-GP
PR4203
75R2F-2-GP
12
PR4235
56R2F-1-GP
PR4235
56R2F-1-GP
1 2
PR4258
NTC-220K-5-GP
PR4258
NTC-220K-5-GP
1 2
PR4214
0R2J-2-GP
PR4214
0R2J-2-GP
1 2
PR4257
165KR2F-L-GP
PR4257
165KR2F-L-GP
1 2
PC4205
SCD1U25V2KX-GP
PC4205
SCD1U25V2KX-GP
1 2
PC4218
SC3300P50V2KX-1GP
PC4218
SC3300P50V2KX-1GP
12
PR4208
10KR2F-2-GP
PR4208
10KR2F-2-GP
1 2
PC4228
SC330P50V2KX-3GP
PC4228
SC330P50V2KX-3GP
1 2
PR4253 137KR3-GPPR4253 137KR3-GP
1 2
PR4211
26K1R2F-2-GP
PR4211
26K1R2F-2-GP
12
PR4260
14K7R2F-L-GP
PR4260
14K7R2F-L-GP
12
PR4205
10KR2F-2-GP
PR4205
10KR2F-2-GP
12
PR4265
NTC-100K-11-GP
PR4265
NTC-100K-11-GP
1 2
PC4215
SCD047U25V2KX-GP
PC4215
SCD047U25V2KX-GP
1 2
PR425971K5R3F-1-GP PR425971K5R3F-1-GP
1 2
PC4217
SC1KP50V2KX-1GP
PC4217
SC1KP50V2KX-1GP
1 2
PG4201
GAP-CLOSE-PWR-3-GP
PG4201
GAP-CLOSE-PWR-3-GP
1 2
PR4243
24K9R2F-L-GP
PR4243
24K9R2F-L-GP
1 2
PR4246
0R2J-2-GP
DY
PR4246
0R2J-2-GP
DY
1 2
PR4209
1KR2F-3-GP
PR4209
1KR2F-3-GP
12
PC4220
SCD1U25V2KX-GP
PC4220
SCD1U25V2KX-GP
1 2
PR4221
0R2J-2-GP
DY
PR4221
0R2J-2-GP
DY
1 2
PC4227
SC1200P50V2KX-1GP
PC4227
SC1200P50V2KX-1GP
1 2
PC4213
SCD047U25V2KX-GP
PC4213
SCD047U25V2KX-GP
12
PR4212
10R2J-2-GP
PR4212
10R2J-2-GP
1 2
PR4249
24D9R2F-L-GP
PR4249
24D9R2F-L-GP
1 2
PC4216
SC1KP50V2KX-1GP
PC4216
SC1KP50V2KX-1GP
12
PR4245
8K25R2F-1-GP
PR4245
8K25R2F-1-GP
12
PR4231
0R2J-2-GP
PR4231
0R2J-2-GP
1 2
PR4256
75KR2J-GP
PR4256
75KR2J-GP
1 2
PR4207
10KR2F-2-GP
PR4207
10KR2F-2-GP
12
PR4215
23K7R2F-GP
PR4215
23K7R2F-GP
1 2
PC4211
SC1KP50V2KX-1GP
PC4211
SC1KP50V2KX-1GP
1 2
PR4219
4K75R2F-1-GP
PR4219
4K75R2F-1-GP
1 2
PC4207 SC39P50V2JN-1GPPC4207 SC39P50V2JN-1GP
1 2
PC4222
SC100P50V2JN-3GP
PC4222
SC100P50V2JN-3GP
12
PC4219
SC3300P50V2KX-1GP
PC4219
SC3300P50V2KX-1GP
1
TP4202
TPAD14-GP
TP4202
TPAD14-GP
1 2
PR4220
0R2J-2-GP
PR4220
0R2J-2-GP
1 2
PC4225
SC1200P50V2KX-1GP
PC4225
SC1200P50V2KX-1GP
VR_RDY
7
VR_RDYA
8
VSNA
14
VSPA
15
PWM2/ISHED 30
PWM3/VBOOT 31
PWM1/ADDR 32
NC#40 40
NC#41 41
CSCOMPA
22
CSSUMA
24
CSP1 34
CSN1 35
CSP3 36
CSN3 37
CSP2 38
CSN2 39
CSSUM 44
CSCOMP 45
CSPA
25
CSNA
26
DIFFOUTA
17
DIFFOUT 52
TSENSE
2
SDIO
4
SCLK
5
VCC
10
TSENSEA
13
FBA
16
TRBSTA
18
COMPA
19
ILIMA
20
DROOPA
21
IOUTA
23
PWMA/IMAXA 28
IMAX 29
IOUT 43
DROOP 46
ILIM 47
COMP 48
FB 49
TRBST 50
VSN 51
GND 53
VSP
1
VRHOT#
3
ALERT#
6
ENABLE
9
ROSC
11
VRMP
12
DRON 33
VBOOTA 27
CSREF 42
PU4201
NCP6131S52MNR2G-GP-U
PU4201
NCP6131S52MNR2G-GP-U
1 2
PC4224
SC2200P50V2KX-2GP
PC4224
SC2200P50V2KX-2GP
1 2
PR4252 137KR3-GPPR4252 137KR3-GP
1 2
PC4208
SC2200P50V2KX-2GP
PC4208
SC2200P50V2KX-2GP
1 2
PR4217
10R2J-2-GP
PR4217
10R2J-2-GP
1 2
PC4202
SCD01U50V2KX-1GP
PC4202
SCD01U50V2KX-1GP
1 2
PC4201
SC1U10V2KX-1GP
PC4201
SC1U10V2KX-1GP
![](asset-2b.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PWR_VCORE3_PH
VCORE3_LG
PWR_VCORE1_PH
PWR_VCORE1_BT1_R
PWR_VCORE1_HGPWR_VCORE1_BT1
PWR_VCORE3_LG
PWR_VCORE3_PH
PWR_VCORE3_BT3_R
PWR_VCORE3_HGPWR_VCORE3_BT3
PWR_VCORE1_EN
PWR_VCORE3_EN
VCORE3_HGPWR_VCORE3_HG
PWR_VCORE3_LG
PWR_VCORE1_LG
VCORE1_HG
PWR_VCORE1_PH
PWR_VCORE1_HG
VCORE1_LGPWR_VCORE1_LG
DCBATOUT
VCC_CORE
VCC_CORE
DCBATOUT
5V_PWR
5V_PWR
DCBATOUT DCBATOUT
CSN342
CSN1 42
CSP342
PWR_CPUCORE_PWM142 PWR_CPUCORE_DRON42,44
PWR_CPUCORE_PWM342 PWR_CPUCORE_DRON42,44
CSP1 42
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
DC/DC CPU CORE2 _NCP6131
94Tuesday, November 09, 2010
LLW-1 / LGG-1
43
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
DC/DC CPU CORE2 _NCP6131
94Tuesday, November 09, 2010
LLW-1 / LGG-1
43
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
DC/DC CPU CORE2 _NCP6131
94Tuesday, November 09, 2010
LLW-1 / LGG-1
43
<Core Design>
1 2
PL4301
L-D36UH-1-GP
PL4301
L-D36UH-1-GP
1 2
PR4302
2D2R3-1-U-GP
PR4302
2D2R3-1-U-GP
12
PC4308
SC4D7U25V6KX-3GP
PC4308
SC4D7U25V6KX-3GP
12
PTC4306
SE330U2D5VDM-1GP
PTC4306
SE330U2D5VDM-1GP
12
PTC4301
SE100U25VM-L1-GP
79.10712.L02
PTC4301
SE100U25VM-L1-GP
79.10712.L02
1
23
45
6
S
G
D
D
D
D
PU4307
IRF6721SPBF-GP-U
84.06721.030
S
G
D
D
D
D
PU4307
IRF6721SPBF-GP-U
84.06721.030
12
PTC4304
SE330U2D5VDM-1GP
PTC4304
SE330U2D5VDM-1GP
12
PC4304
SC4D7U25V6KX-3GP
PC4304
SC4D7U25V6KX-3GP
BST
1
PWM
2
EN
3
VCC
4DRVL 5
GND 6
SW 7
DRVH 8
FLAG
9
PU4301
NCP5911MNTBG-GP
PU4301
NCP5911MNTBG-GP
1
TP4303
TPAD40-GP
TP4303
TPAD40-GP
1 2
PR4309
0R0402-PAD
PR4309
0R0402-PAD
12
PC4307
SC1U10V2KX-1GP
PC4307
SC1U10V2KX-1GP
1 2
PG4311
GAP-CLOSE-PWR-3-GP
PG4311
GAP-CLOSE-PWR-3-GP
1 2
PC4306
SCD22U25V3KX-GP
PC4306
SCD22U25V3KX-GP
12
PC4305
SC4D7U25V6KX-3GP
PC4305
SC4D7U25V6KX-3GP
12
PC4302
SC1U10V2KX-1GP
PC4302
SC1U10V2KX-1GP
12
PTC4305
SE330U2D5VDM-1GP
PTC4305
SE330U2D5VDM-1GP
1 2
PG4314
GAP-CLOSE-PWR-3-GP
PG4314
GAP-CLOSE-PWR-3-GP
12
PC4303
SC4D7U25V6KX-3GP
PC4303
SC4D7U25V6KX-3GP
1 2
PR4308
0R0402-PAD
PR4308
0R0402-PAD
12
PTC4303
SE330U2D5VDM-1GP
PTC4303
SE330U2D5VDM-1GP
1 2
PR4303
2D2R3-1-U-GP
PR4303
2D2R3-1-U-GP
1 2
PG4312
GAP-CLOSE-PWR-3-GP
PG4312
GAP-CLOSE-PWR-3-GP
12
PC4309
SC4D7U25V6KX-3GP
PC4309
SC4D7U25V6KX-3GP
12
PTC4308
SE100U25VM-L1-GP
79.10712.L02
PTC4308
SE100U25VM-L1-GP
79.10712.L02
1 2
PR4304 49D9R2F-GPPR4304 49D9R2F-GP
1
TP4301
TPAD40-GP
TP4301
TPAD40-GP
1
23
45
6
S
G
D
D
D
D
PU4313
IRF6721SPBF-GP-U
84.06721.030
S
G
D
D
D
D
PU4313
IRF6721SPBF-GP-U
84.06721.030
12
PTC4307
SE330U2D5VDM-1GP
PTC4307
SE330U2D5VDM-1GP
1 2
PR4301 49D9R2F-GPPR4301 49D9R2F-GP
1
23
4
56
7
S
S
GD
D
D
D
PU4308
IRF6725MTRPBF-GP-U
84.06725.030
S
S
GD
D
D
D
PU4308
IRF6725MTRPBF-GP-U
84.06725.030
1 2
PG4313
GAP-CLOSE-PWR-3-GP
PG4313
GAP-CLOSE-PWR-3-GP
1 2
PL4302
L-D36UH-1-GP
PL4302
L-D36UH-1-GP
1 2
PR4313
0R0402-PAD
PR4313
0R0402-PAD
1 2
PC4301
SCD22U25V3KX-GP
PC4301
SCD22U25V3KX-GP
1 2
PR4312
0R0402-PAD
PR4312
0R0402-PAD
1
23
4
56
7
S
S
GD
D
D
D
PU4312
IRF6725MTRPBF-GP-U
84.06725.030
S
S
GD
D
D
D
PU4312
IRF6725MTRPBF-GP-U
84.06725.030
12
PC4310
SC4D7U25V6KX-3GP
PC4310
SC4D7U25V6KX-3GP
BST
1
PWM
2
EN
3
VCC
4DRVL 5
GND 6
SW 7
DRVH 8
FLAG
9
PU4306
NCP5911MNTBG-GP
PU4306
NCP5911MNTBG-GP
![](asset-2c.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VREG_SWA_LG
VREG_SWA
VREG_SWA_LG
VREG_SWA
VREG_GFX_BOOT_1
VREG_SWA_HGVREG_GFX_BOOT
VREG_GFX_EN
SWA_HG
SWA_LG
VREG_SWA_HG
DCBATOUT_VCC_GFXCORE
VCC_GFXCORE
DCBATOUT_VCC_GFXCOREDCBATOUT
5V_PWR
CSNA 42
CSPA 42
PWR_CPUCORE_PWMA42 PWR_CPUCORE_DRON42,43
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
DC/DC CPU CORE3 _NCP6131
44 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
DC/DC CPU CORE3 _NCP6131
44 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
DC/DC CPU CORE3 _NCP6131
44 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
12
PC4403
SC4D7U25V6KX-3GP
PC4403
SC4D7U25V6KX-3GP
12
PTC4403
ST330U2VDM-4-GP
PTC4403
ST330U2VDM-4-GP
1 2
PG4404
GAP-CLOSE-PWR-3-GP
PG4404
GAP-CLOSE-PWR-3-GP
1 2
PC4404
SCD22U25V3KX-GP
PC4404
SCD22U25V3KX-GP
1
23
45
6
S
G
D
D
D
D
PU4401
IRF6721SPBF-GP-U
84.06721.030
S
G
D
D
D
D
PU4401
IRF6721SPBF-GP-U
84.06721.030
1 2
PR4404
0R0402-PAD
PR4404
0R0402-PAD
12
PTC4402
ST330U2VDM-4-GP
PTC4402
ST330U2VDM-4-GP
1 2
PR4403
0R0402-PAD
PR4403
0R0402-PAD
1 2
PL4401 L-D36UH-1-GPPL4401 L-D36UH-1-GP
1 2
PG4403
GAP-CLOSE-PWR-3-GP
PG4403
GAP-CLOSE-PWR-3-GP
1 2
PG4401
GAP-CLOSE-PWR-3-GP
PG4401
GAP-CLOSE-PWR-3-GP
1 2
PG4406
GAP-CLOSE-PWR-3-GP
PG4406
GAP-CLOSE-PWR-3-GP
1 2
PG4402
GAP-CLOSE-PWR-3-GP
PG4402
GAP-CLOSE-PWR-3-GP
1 2
PG4408
GAP-CLOSE-PWR-3-GP
PG4408
GAP-CLOSE-PWR-3-GP
1 2
PR4401
2D2R3-1-U-GP
PR4401
2D2R3-1-U-GP
1
TP4401
TPAD40-GP
TP4401
TPAD40-GP
1 2
PG4407
GAP-CLOSE-PWR-3-GP
PG4407
GAP-CLOSE-PWR-3-GP
1 2
PR4402 49D9R2F-GP
PR4402 49D9R2F-GP
12
PC4405
SC1U10V2KX-1GP
PC4405
SC1U10V2KX-1GP
BST
1
PWM
2
EN
3
VCC
4DRVL 5
GND 6
SW 7
DRVH 8
FLAG
9
PU4405
NCP5911MNTBG-GP
PU4405
NCP5911MNTBG-GP
1 2
PG4405
GAP-CLOSE-PWR-3-GP
PG4405
GAP-CLOSE-PWR-3-GP
12
PC4401
SC4D7U25V6KX-3GP
PC4401
SC4D7U25V6KX-3GP
12
PC4402
SC4D7U25V6KX-3GP
PC4402
SC4D7U25V6KX-3GP
1
23
4
56
7
S
S
GD
D
D
D
PU4403
IRF6725MTRPBF-GP-U
84.06725.030
S
S
GD
D
D
D
PU4403
IRF6725MTRPBF-GP-U
84.06725.030
![](asset-2d.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PWR_1D05V_VFB
PWR_1D05V_CCM PWR_1D05V_LGATE
PWR_1D05V_BOOT_R
PWR_1D05V_UGATE
PWR_1D05V_BOOT
PWR_1D05V_PHASEPWR_1D05V_VFB
PWR_1D05V_EN
PWR_1D05V_TRIP
VSS_SENSE_L
VTT_SENSE_L
VTT_SENSE_L
VSS_SENSE_L
3D3V_S0
1D05V_VTT
5V_S5
PWR_1D05V_DCBATOUT
DCBATOUT PWR_1D05V_DCBATOUT
VCCIO_SENSE 8
1.05VTT_PWRGD37,48
RUNPW ROK19,36,37,46,47
VSSIO_SENSE 8
PWR_1D05V_EN36
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
TPS51218_1D05V
45 94Tuesday, November 09, 2010
<Core Design>
LLW-1 / LGG-1
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
TPS51218_1D05V
45 94Tuesday, November 09, 2010
<Core Design>
LLW-1 / LGG-1
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
TPS51218_1D05V
45 94Tuesday, November 09, 2010
<Core Design>
LLW-1 / LGG-1
Id=14.3A
Qg=9.2~14nC
Rdson=11~14mohm
Id=26.5A
Qg=40.6~61nC,
Rdson=2.6~3.2mohm
TPS51218 for 1D05V
Iomax=16A
OCP>24A
Vout=0.704V*(R1+R2)/R2
Mag. 0.56uH 10*10*4
DCR=1.6~1.8mohm
Idc=25A, Isat=40A
1 2
PG4501
GAP-CLOSE-PWR-3-GP
PG4501
GAP-CLOSE-PWR-3-GP
12
PC4506
SC4D7U25V5KX-GP
PC4506
SC4D7U25V5KX-GP
12
PR4508
20K5R2F-GP
PR4508
20K5R2F-GP
12
PR4506
10R2F-L-GP
PR4506
10R2F-L-GP
12
PR4507
10KR2F-2-GP
PR4507
10KR2F-2-GP
12
PR4501
64K9R2F-1-GP
PR4501
64K9R2F-1-GP
1 2
PR4510 0R2J-2-GP
DY
PR4510 0R2J-2-GP
DY
12
PC4509
SCD1U25V3KX-GP
PC4509
SCD1U25V3KX-GP
12
PR4512
10KR2J-3-GP
PR4512
10KR2J-3-GP
1 2
PR4502 0R2J-2-GPPR4502 0R2J-2-GP
12
PTC4502
SE330U2D5VDM-1GP
PTC4502
SE330U2D5VDM-1GP
1 2
PG4503
GAP-CLOSE-PWR-3-GP
PG4503
GAP-CLOSE-PWR-3-GP
12
PC4510
SC1000P50V3JN-GP-U
DY
PC4510
SC1000P50V3JN-GP-U
DY
12
PC4507
SC4D7U25V5KX-GP
PC4507
SC4D7U25V5KX-GP
DRVL 6
V5IN 7
SW 8
DRVH 9
VBST 10
GND 11
PGOOD
1
TRIP
2
EN
3
VFB
4
CCM
5
PU4501
TPS51218DSCR-GP-U1
PU4501
TPS51218DSCR-GP-U1
12
PR4509
10R2F-L-GP
PR4509
10R2F-L-GP
12
PC4504
SC4D7U25V5KX-GP
PC4504
SC4D7U25V5KX-GP
1 2
PR4505
2D2R3J-2-GP
PR4505
2D2R3J-2-GP
1
2
3
4 5
6
7
8
S
S
S
GD
D
D
D
PU4502
SIR172DP-T1-GE3-GP
S
S
S
GD
D
D
D
PU4502
SIR172DP-T1-GE3-GP
1
2
3
4 5
6
7
8
S
S
S
D
D
D
D
G
PU4503
SIR460DP-T1-GE3-GP
S
S
S
D
D
D
D
G
PU4503
SIR460DP-T1-GE3-GP
12
PR4503
2D2R3-1-U-GP
DY
PR4503
2D2R3-1-U-GP
DY
1 2
PG4502
GAP-CLOSE-PWR-3-GP
PG4502
GAP-CLOSE-PWR-3-GP
12
PC4501
SC1U10V2KX-1GP
PC4501
SC1U10V2KX-1GP
12
PTC4503
SE330U2D5VDM-1GP
PTC4503
SE330U2D5VDM-1GP
12
PC4502
SC470P50V2KX-3GP
DY
PC4502
SC470P50V2KX-3GP
DY
1 2
PG4504
GAP-CLOSE-PWR-3-GP
PG4504
GAP-CLOSE-PWR-3-GP
1 2
PR4511 0R2J-2-GP
DY
PR4511 0R2J-2-GP
DY
12
PC4508
SC4D7U25V5KX-GP
PC4508
SC4D7U25V5KX-GP
12
PR4504
470KR2F-GP
PR4504
470KR2F-GP
12
PC4505
SC1KP50V2KX-1GP
PC4505
SC1KP50V2KX-1GP
1 2
PL4501
IND-D56UH-27-GP
PL4501
IND-D56UH-27-GP
12
PC4503
SCD1U25V3KX-GP
PC4503
SCD1U25V3KX-GP
![](asset-2e.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PWR_1D5V_VFB
PWR_1D5V_CCM PWR_1D5V_LGATE
PWR_1D5V_BOOT_R
PWR_1D5V_UGATE
PWR_1D5V_BOOT
PWR_1D5V_PHASEPWR_1D5V_VFB
PWR_1D5V_EN
PWR_1D5V_TRIP
PWR_0D75V_S3
PWR_0D75V_S5
DDR_VREF_S3
1D5V_S3
5V_S5
PWR_1D5V_DCBATOUT
5V_S5
1D5V_S3
0D75V_S0
0D75V_PW R
DCBATOUT PWR_1D5V_DCBATOUT
3D3V_S0
DDR_VREF_S3
1D5V_S3
RUNPW ROK19,36,37,45,47
PM_SLP_S4#19,27,82
0D75V_EN37
PM_SLP_S4#19,27,82
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
TPS51128_1D5V & RT9026_0D75V
46 94Tuesday, November 09, 2010
<Core Design>
LLW-1 / LGG-1
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
TPS51128_1D5V & RT9026_0D75V
46 94Tuesday, November 09, 2010
<Core Design>
LLW-1 / LGG-1
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
TPS51128_1D5V & RT9026_0D75V
46 94Tuesday, November 09, 2010
<Core Design>
LLW-1 / LGG-1
TPS51218 for 1D5V
Vout=0.704V*(R1+R2)/R2
Iomax=16A
OCP>24A
Id=14.3A
Qg=9.2~14nC
Rdson=11~14mohm
Id=26.5A
Qg=40.6~61nC,
Rdson=2.6~3.2mohm
Mag. 0.56uH 10*10*4
DCR=1.6~1.8mohm
Idc=25A, Isat=40A
Iomax=1.2A
OCP>1.8A
RT9026 for 0D75V_S0
12
EC4601
SCD1U25V2KX-GP
DY
EC4601
SCD1U25V2KX-GP
DY
1 2
PR4602 0R2J-2-GPPR4602 0R2J-2-GP
VDDQSNS 1
VLDOIN 2
VTT 3
PGND 4
VTTSNS 5
VIN
10
S5
9
GND
8
S3
7
VTTREF
6
GND
11
PU4604
RT9026PFP-GP
PU4604
RT9026PFP-GP
12
PR4608
11K5R2F-GP
PR4608
11K5R2F-GP
1
2
3
4 5
6
7
8
S
S
S
D
D
D
D
G
PU4603
SIR460DP-T1-GE3-GP
S
S
S
D
D
D
D
G
PU4603
SIR460DP-T1-GE3-GP
12
PC4607
SC4D7U25V5KX-GP
PC4607
SC4D7U25V5KX-GP
12
PR4603
2D2R3-1-U-GP
DY
PR4603
2D2R3-1-U-GP
DY
12
PC4602
SC470P50V2KX-3GP
DY
PC4602
SC470P50V2KX-3GP
DY
1 2
PR4610 0R2J-2-GPPR4610 0R2J-2-GP
12
PR4609
10KR2F-2-GP
PR4609
10KR2F-2-GP
1 2
PG4603
GAP-CLOSE-PWR-3-GP
PG4603
GAP-CLOSE-PWR-3-GP
1 2
PG4601
GAP-CLOSE-PWR-3-GP
PG4601
GAP-CLOSE-PWR-3-GP
1 2
PG4622
GAP-CLOSE-PWR-3-GP
PG4622
GAP-CLOSE-PWR-3-GP
1 2
PR4611 0R2J-2-GPPR4611 0R2J-2-GP
12
PC4606
SC4D7U25V5KX-GP
PC4606
SC4D7U25V5KX-GP
12
PC4613
SC1U10V2KX-1GP
PC4613
SC1U10V2KX-1GP
1
2
3
4 5
6
7
8
S
S
S
GD
D
D
D
PU4602
SIR172DP-T1-GE3-GP
S
S
S
GD
D
D
D
PU4602
SIR172DP-T1-GE3-GP
12
PC4616
SC10U6D3V3MX-GP
PC4616
SC10U6D3V3MX-GP
1 2
PG4621
GAP-CLOSE-PWR-3-GP
PG4621
GAP-CLOSE-PWR-3-GP
12
PTC4603
SE330U2D5VDM-1GP
PTC4603
SE330U2D5VDM-1GP
12
PC4601
SC1U10V2KX-1GP
PC4601
SC1U10V2KX-1GP
12
PC4604
SCD1U25V3KX-GP
PC4604
SCD1U25V3KX-GP
12
PC4603
SC1KP50V2KX-1GP
PC4603
SC1KP50V2KX-1GP
1 2
PL4601
IND-D56UH-27-GP
PL4601
IND-D56UH-27-GP
12
PC4605
SC4D7U25V5KX-GP
PC4605
SC4D7U25V5KX-GP
12
PC4617
SC10U6D3V3MX-GP
PC4617
SC10U6D3V3MX-GP
DRVL 6
V5IN 7
SW 8
DRVH 9
VBST 10
GND 11
PGOOD
1
TRIP
2
EN
3
VFB
4
CCM
5
PU4601
TPS51218DSCR-GP-U1
PU4601
TPS51218DSCR-GP-U1
12
PC4612
SC1U10V2KX-1GP
PC4612
SC1U10V2KX-1GP
12
PTC4602
SE330U2D5VDM-1GP
PTC4602
SE330U2D5VDM-1GP
12
PR4601
64K9R2F-1-GP
PR4601
64K9R2F-1-GP
1 2
PG4604
GAP-CLOSE-PWR-3-GP
PG4604
GAP-CLOSE-PWR-3-GP
12
PR4605
470KR2F-GP
PR4605
470KR2F-GP
12
PC4610
SC1U16V3KX-5GP
PC4610
SC1U16V3KX-5GP
1 2
PR4606
2D2R3J-2-GP
PR4606
2D2R3J-2-GP
12
PC4614
SC10U6D3V3MX-GP
PC4614
SC10U6D3V3MX-GP
12
PC4608
SC4D7U25V5KX-GP
PC4608
SC4D7U25V5KX-GP
12
PR4607
10KR2J-3-GP
PR4607
10KR2J-3-GP
12
PC4611
SCD1U10V2KX-5GP
PC4611
SCD1U10V2KX-5GP
12
PC4615
SCD1U10V2KX-5GP
PC4615
SCD1U10V2KX-5GP
1 2
PG4602
GAP-CLOSE-PWR-3-GP
PG4602
GAP-CLOSE-PWR-3-GP
![](asset-2f.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PWR_1D8V_LX
PWR_1D8V_COMP_R
PWR_1D8V_FB
1D8V_PW R
PWR_1D8V_FB
PWR_1D8V_COMP
PWR_1D8V_GD
PWR_1D8V_RUN_EN
PWR_1D8V_RT
1D8V_S0
3D3V_S5
3D3V_S5
RUNPW ROK19,36,37,45,46
PM_SLP_S3#19,27,36,37,82
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
PWM_1D8V_RT8015B
47 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
PWM_1D8V_RT8015B
47 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
PWM_1D8V_RT8015B
47 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Vo=0.8*(1+(R1/R2))
Iomax=3A
RT8015B for 1D8V_S0
Mag.7*7*3
DCR=28~30mohm, Irating=6A
Isat=13.5A
SHDN/RT 1
GND 2
LX#3 3
LX#4 4
PGND 5
PVDD
6
VDD
7
PGOOD
8
FB
9
COMP
10
GND
11
PU4701
RT8015BGQW-GP
PU4701
RT8015BGQW-GP
1 2
PR4702
14KR2F-GP
PR4702
14KR2F-GP
12
PR4703
820KR2F-GP
PR4703
820KR2F-GP
12
PC4707
SC22U6D3V5MX-2GP
PC4707
SC22U6D3V5MX-2GP
1 2
PR4709
0R2J-2-GP
PR4709
0R2J-2-GP
12
PC4701
SC10U6D3V3MX-GP
PC4701
SC10U6D3V3MX-GP
12
PR4706
16KR2F-GP
PR4706
16KR2F-GP
12
PC4708
SC22U6D3V5MX-2GP
PC4708
SC22U6D3V5MX-2GP
1 2
PR4701
10KR2F-2-GP
DY
PR4701
10KR2F-2-GP
DY
12
PC4702
SC10U6D3V3MX-GP
PC4702
SC10U6D3V3MX-GP
12
PC4709
SC100P50V2JN-3GP
PC4709
SC100P50V2JN-3GP
1 2
PG4703
GAP-CLOSE-PWR-3-GP
PG4703
GAP-CLOSE-PWR-3-GP
12
PC4710
SCD1U10V2KX-5GP
DY
PC4710
SCD1U10V2KX-5GP
DY
12
PR4707
20KR2F-L-GP
PR4707
20KR2F-L-GP
1 2
PG4702
GAP-CLOSE-PWR-3-GP
PG4702
GAP-CLOSE-PWR-3-GP
G
DS
PQ4701
AO7401-GP
84.07401.031
PQ4701
AO7401-GP
84.07401.031
1 2
PR4708 0R2J-2-GPPR4708 0R2J-2-GP
12
PL4701 IND-3D3UH-57GPPL4701 IND-3D3UH-57GP
1 2
PC4703
SC1500P50V2KX-2GP
PC4703
SC1500P50V2KX-2GP
12
PC4705
SCD1U25V2KX-GP
PC4705
SCD1U25V2KX-GP
1 2
PG4701
GAP-CLOSE-PWR-3-GP
PG4701
GAP-CLOSE-PWR-3-GP
1 2
PC4704 SC47P50V2JN-3GPPC4704 SC47P50V2JN-3GP
![](asset-30.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PWR_VCCSA_BOOT
PWR_VCCSA_HG
PWR_VCCSA_CS
PWR_VCCSA_TON
PWR_VCCSA_FB
PWR_VCCSA_VDD
PWR_VCCSA_LG
PWR_VCCSA_BOOT_R
PWR_VCCSA_EN
PWR_VCCSA_PH
PWR_VCCSA_FB
PWR_VCCSA_D0
PWR_VCCSA_D1
PWR_VCCSA_G1
PWR_VCCSA_G0
PWR_VCCSA_D1
PWR_VCCSA_D0
PWR_VCCSA_GD
PWR_VCCSA_FB_R
VCCSA_PWR
PWR_VCCSA_DCBATOUT
5V_S5
DCBATOUT PWR_VCCSA_DCBATOUT
VCCSA_PWR 0D85V_S0
VCCSA_PWR
VCCSA_PWR
3D3V_S5
1.05VTT_PWRGD37,45
VCCSA_SEL 9
VCCSA_SENSE 9
H_FC_C22 9
D85V_PW RGD19,42
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
RT8208B_VCCSA
48 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
RT8208B_VCCSA
48 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
RT8208B_VCCSA
48 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
RT8208A for VCCSA
Freq=300KHz
Vout=0.75*(1+R1/R2)
G
D
SIomax=6A
OCP>9A
VCCSA=0.8V/0.9V
D
G S
Matsuki cap 390uF
2.5V, ESR=10mohm
Mag. 1.5uH 7*7*3
DCR=14~15mohm
Idc=9A, Isat=18A
H
VCCSA_SEL VCCSA_PWR
L
0.8V
0.9V
Id=12.5A
Qg=15.4~23nC
Rdson=14.5~17.5mohm
S-HR_20100614 V1.1
for CRB board
12
PR4812
76K8R2F-GP
PR4812
76K8R2F-GP
1 2
PG4808
GAP-CLOSE-PWR-3-GP
PG4808
GAP-CLOSE-PWR-3-GP
1 2
PG4801
GAP-CLOSE-PWR-3-GP
PG4801
GAP-CLOSE-PWR-3-GP
1 2
PG4806
GAP-CLOSE-PWR-3-GP
PG4806
GAP-CLOSE-PWR-3-GP
1 2
PG4810
GAP-CLOSE-PWR-3-GP
PG4810
GAP-CLOSE-PWR-3-GP
1 2
PG4803
GAP-CLOSE-PWR-3-GP
PG4803
GAP-CLOSE-PWR-3-GP
VOUT 1
VDD
2
FB 3
PGOOD
4
D1 5
D0 6
G0 7
LGATE 8
VDDP
9
CS
10
PHASE 11
UGATE 12
BOOT 13
G1 14
EM/DEM
15
TON
16
GND
17
PU4801
RT8208BGQW-GP
PU4801
RT8208BGQW-GP
12
PR4816
2D2R3-1-U-GP
DY
PR4816
2D2R3-1-U-GP
DY
1 2
PR4802
249KR2F-GP
PR4802
249KR2F-GP
12
PC4803
SCD1U25V3KX-GP
PC4803
SCD1U25V3KX-GP
12
PTC4801
SE390U2D5VM-7GP
PTC4801
SE390U2D5VM-7GP
12
PC4811
SC470P50V2KX-3GP
DY
PC4811
SC470P50V2KX-3GP
DY
12
PC4806
SC4D7U25V6KX-3GP
PC4806
SC4D7U25V6KX-3GP
1 2
PR4814
100KR2J-1-GP
PR4814
100KR2J-1-GP
12
PC4812
SCD1U25V2KX-GP
DY
PC4812
SCD1U25V2KX-GP
DY
12
PC4810
SC18P50V2JN-1-GP
DY
PC4810
SC18P50V2JN-1-GP
DY
12
PR4805
18K7R2F-GP
PR4805
18K7R2F-GP
12
PC4808
SCD1U25V3KX-GP
PC4808
SCD1U25V3KX-GP
1
2
3
4 5
6
7
8
S
S
S
GD
D
D
D
PU4803
SIS412DN-T1-GE3-GP
S
S
S
GD
D
D
D
PU4803
SIS412DN-T1-GE3-GP
1 2
PR4803
2D2R3J-2-GP
PR4803
2D2R3J-2-GP
1 2
PR4804
0R2J-2-GP
PR4804
0R2J-2-GP
1 2
PR4807
0R2J-2-GP
PR4807
0R2J-2-GP
12
PC4804
SC4D7U25V6KX-3GP
PC4804
SC4D7U25V6KX-3GP
12
PR4801
2D2R3J-2-GP
PR4801
2D2R3J-2-GP
12
PR4811
49K9R2F-L-GP
DY
PR4811
49K9R2F-L-GP
DY
1 2
PR4815
0R2J-2-GP
PR4815
0R2J-2-GP
1 2
PC4807
SCD1U25V3KX-GP
PC4807
SCD1U25V3KX-GP
1 2
PR4810 0R2J-2-GPPR4810 0R2J-2-GP
12
PR4808
10KR2F-2-GP
PR4808
10KR2F-2-GP
1 2
PG4809
GAP-CLOSE-PWR-3-GP
PG4809
GAP-CLOSE-PWR-3-GP
12
PC4809
SC1U6D3V2KX-GP
DY
PC4809
SC1U6D3V2KX-GP
DY
12
PR4809
0R2J-2-GP
DY
PR4809
0R2J-2-GP
DY
1 2
PG4805
GAP-CLOSE-PWR-3-GP
PG4805
GAP-CLOSE-PWR-3-GP
1 2
PL4801
IND-1D5UH-53-GP
PL4801
IND-1D5UH-53-GP
1 2
PG4807
GAP-CLOSE-PWR-3-GP
PG4807
GAP-CLOSE-PWR-3-GP
12
PC4801
SC1U10V2KX-1GP
PC4801
SC1U10V2KX-1GP
1 2
PR4806
0R2J-2-GP
PR4806
0R2J-2-GP
1
2
3
4 5
6
7
8
S
S
S
GD
D
D
D
PU4802
SIS412DN-T1-GE3-GP
S
S
S
GD
D
D
D
PU4802
SIS412DN-T1-GE3-GP
12
PC4805
SC4D7U25V6KX-3GP
PC4805
SC4D7U25V6KX-3GP
1 2
PG4804
GAP-CLOSE-PWR-3-GP
PG4804
GAP-CLOSE-PWR-3-GP
1 2
PG4802
GAP-CLOSE-PWR-3-GP
PG4802
GAP-CLOSE-PWR-3-GP
12
PR4813
143KR2F-L-1-GP
PR4813
143KR2F-L-1-GP
12
PC4802
SC1U10V2KX-1GP
PC4802
SC1U10V2KX-1GP
![](asset-31.png)
LVDS_DDC_CLK
LVDS_DDC_DATA
LCD_PRESENCE#
LVDS_DDC_DATA
LVDS_DDC_CLK
3D3V_CAM_S0
PANEL_LED_P
3D3V_DDC_S0
MIC_DET#
PANEL_LED_N
PANEL_LED_N
LCD_PRESENCE#
AUD_DMIC_CLK
AUD_DMIC_DATA
3D3V_DDC_S0
LID_CLOSE#
LCDVDD 3D3V_S0
DCBATOUT_LCDDCBATOUT
3D3V_S0
DCBATOUT_LCD
LCDVDD
3D3V_S0
3D3V_S0
3D3V_AUX_S5
3D3V_S5
3D3V_S5
L_BKLT_CTRL17
AUD_DMIC_CLK29 AUD_DMIC_DATA29
USB_PP1218 USB_PN1218
LID_CLOSE#27
LVDS_VDD_EN17
BLON_OUT27
LCD_PRESENCE#18
LVDSA_CLK17 LVDSA_CLK#17
LVDSA_DATA217 LVDSA_DATA2#17
LVDSA_DATA117 LVDSA_DATA1#17
LVDSA_DATA017 LVDSA_DATA0#17
LVDS_DDC_CLK17
LVDS_DDC_DATA17
PANEL_LED27
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
LCD CONNECTOR
A3
49 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
LCD CONNECTOR
A3
49 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
LCD CONNECTOR
A3
49 94Tuesday, November 09, 2010
<Core Design>
1.2A
Layout 40 mil
LCD / Inverter Connector
Near LCD1
12
C4908
SC4D7U6D3V3KX-GP
C4908
SC4D7U6D3V3KX-GP
1 2
R4902 100KR2J-1-GP
R4902 100KR2J-1-GP
1 2
F4903
FUSE-D75A32V-3-GP
F4903
FUSE-D75A32V-3-GP
1 2
C4901
SCD01U25V2KX-3GP
C4901
SCD01U25V2KX-3GP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
LCD1
JAE-CON40-4-GP
20.K0568.040
LCD1
JAE-CON40-4-GP
20.K0568.040
EN
1
GND
2
OUT
3IN#4 4
IN#5 5
U4901
G5285T11U-GP
74.05285.07F
2nd = 74.09724.09F
U4901
G5285T11U-GP
74.05285.07F
2nd = 74.09724.09F
1 2
C4903
SCD1U25V3KX-GP
C4903
SCD1U25V3KX-GP
1
AFTP4904 AFTE14P-GPAFTP4904 AFTE14P-GP
1 2
C4904
SCD01U25V2KX-3GP
C4904
SCD01U25V2KX-3GP
1 2
F4902 FUSE-D5A32V-14-GPF4902 FUSE-D5A32V-14-GP
2
13
R1
R2
Q4901
LTC043ZUB-FS8-GP
R1
R2
Q4901
LTC043ZUB-FS8-GP
1
AFTP4901 AFTE14P-GPAFTP4901 AFTE14P-GP
1
TP4901TP4901
1
AFTP4902 AFTE14P-GPAFTP4902 AFTE14P-GP
1
AFTP4903 AFTE14P-GPAFTP4903 AFTE14P-GP
12
R4914
100KR2J-1-GP
R4914
100KR2J-1-GP
1 2
F4901
FUSE-3A24V-1-GP
69.43001.331
2nd = 69.43001.371
F4901
FUSE-3A24V-1-GP
69.43001.331
2nd = 69.43001.371
12
C4909
SCD1U16V2KX-3GP
DY
C4909
SCD1U16V2KX-3GP
DY
12
R4901 330R2F-GPR4901 330R2F-GP
1 2
C4902
SC1U25V3KX-1-GP
C4902
SC1U25V3KX-1-GP
1
23
4
RN4901
SRN2K2J-1-GP
RN4901
SRN2K2J-1-GP
12
C4907
SC4D7U6D3V3KX-GP
C4907
SC4D7U6D3V3KX-GP
![](asset-32.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CRT_R
CRT_G
CRT_B
3D3V_S0_DDC
CRT_DDCCLK_CON
CRT_DDCDATA_CON
CRT_DDCCLK_CON
CRT_VSYNC_CON
CRT_DDCDATA_CON
CRT_HSYNC_CON
5V_CRT_DDC
CRT_HSYNC1_2CRT_VSYNC1_2CRT_VSYNC_CON CRT_HSYNC_CON
3D3V_S0_DDC
CRT_BLUE
CRT_HSYNC_CON CRT_RED
CRT_DDCDATA_CON
CRT_GREEN
CRT_DDCCLK_CON
CRT_VSYNC_CON
CRT_HSYNC_R
CRT_VSYNC_R
CRT_R
CRT_G
CRT_B
CRT_DDCDATA_CON
CRT_HSYNC_CON
CRT_VSYNC_CON
CRT_DDCCLK_CON
CRT_VSYNC_CON
CRT_DDCDATA_CON
CRT_DDCCLK_CON
CRT_HSYNC_CON
CRT_R
CRT_G
CRT_B
5V_CRT_S0
3D3V_S0
5V_S0
5V_CRT_S0
5V_CRT_S0
5V_S0
3D3V_S0
5V_CRT_S0 5V_CRT_S0
CRT_DDC_CLK17
CRT_DDC_DATA17
CRT_HSYNC17
CRT_VSYNC 17
CRT_RED17
CRT_GREEN17
CRT_BLUE17
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
CRT Connector
A3
50 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
CRT Connector
A3
50 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
CRT Connector
A3
50 94
Tuesday, November 09, 2010
<Core Design>
CRT RGB
Pull High 5V Design on CRT Board
CRT DDCDATA & DDCCLK level shift
500mA
CRT Hsync & Vsync level shift
CRT CONNECTOR
Near CRT1
1 2
L5003 FCM1608CF-220T05-GPL5003 FCM1608CF-220T05-GP
1
AFTP5002 AFTE14P-GPAFTP5002 AFTE14P-GP
1
AFTP5006 AFTE14P-GPAFTP5006 AFTE14P-GP
12
C5008
SC100P50V2JN-3GP
DY
C5008
SC100P50V2JN-3GP
DY
12
C5004
SC10P50V2JN-4GP
C5004
SC10P50V2JN-4GP
1 2
R5006 0R2J-2-GPR5006 0R2J-2-GP
12
C5010
SC18P50V2JN-1-GP
DY
C5010
SC18P50V2JN-1-GP
DY
1
AFTP5007 AFTE14P-GPAFTP5007 AFTE14P-GP
1
2
3
D5004
CH221GP-GP-U
D5004
CH221GP-GP-U
12
R5010
150R2F-1-GP
R5010
150R2F-1-GP
12
C5002
SC8P250V2CC-GP
DY
C5002
SC8P250V2CC-GP
DY
12
C5009
SC18P50V2JN-1-GP
DY
C5009
SC18P50V2JN-1-GP
DY
1
2
34
5
6
Q5001
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
Q5001
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
1
AFTP5001 AFTE14P-GPAFTP5001 AFTE14P-GP
12
C5001
SC8P250V2CC-GP
DY
C5001
SC8P250V2CC-GP
DY
1
2
3
D5003
CH221GP-GP-U
D5003
CH221GP-GP-U
12
C5005
SC10P50V2JN-4GP
C5005
SC10P50V2JN-4GP
12
C5011
SC100P50V2JN-3GP
DY
C5011
SC100P50V2JN-3GP
DY
1 2
L5001 FCM1608CF-220T05-GPL5001 FCM1608CF-220T05-GP
1
AFTP5003 AFTE14P-GPAFTP5003 AFTE14P-GP
1 2
L5002 FCM1608CF-220T05-GPL5002 FCM1608CF-220T05-GP
1 2
R5002 10R2J-2-GPR5002 10R2J-2-GP
12
C5007
SCD1U10V2KX-5GP
C5007
SCD1U10V2KX-5GP
12
R5009
150R2F-1-GP
R5009
150R2F-1-GP
1
AFTP5008 AFTE14P-GPAFTP5008 AFTE14P-GP
1
2
3
D5002
CH221GP-GP-U
D5002
CH221GP-GP-U
1 2
R5007 0R2J-2-GPR5007 0R2J-2-GP
1 2
R5001 10R2J-2-GPR5001 10R2J-2-GP
1OE#
1
1A
2
2Y
3
GND
4
VCC 8
2OE# 7
1Y 6
2A 5
U5001
74AHCT2G125DP-GP
73.2G125.00B
U5001
74AHCT2G125DP-GP
73.2G125.00B
1 2
R5005 0R2J-2-GPR5005 0R2J-2-GP
12
C5006
SC10P50V2JN-4GP
C5006
SC10P50V2JN-4GP
1 2
R5004 0R2J-2-GP
R5004 0R2J-2-GP
1
2
3
D5008
CH221GP-GP-U
D5008
CH221GP-GP-U
1 2
R500310KR2J-3-GP R500310KR2J-3-GP
12
R5008
150R2F-1-GP
R5008
150R2F-1-GP
12
C5003
SC8P250V2CC-GP
DY
C5003
SC8P250V2CC-GP
DY
K A
D5001
CH551H-30GP-GP
D5001
CH551H-30GP-GP
1
2
3
D5007
CH221GP-GP-U
D5007
CH221GP-GP-U
12
F5001
POLYSW-1D1A6V-GP
F5001
POLYSW-1D1A6V-GP
12
C5012
SCD01U16V2KX-3GP
C5012
SCD01U16V2KX-3GP
CRT_RED
1
CRT_GREEN
2
CRT_BLUE
3
NC#4 4
VCC_CRT
9
NC#11 11
DDCDATA_ID1
12
DDCCLK_ID3
15
VSYNC
14
HSYNC
13
NP1 NP1
NP2 NP2
GND 5
GND 6
GND 7
GND 8
GND 10
GND 16
GND 17
CRT1
D-SUB-15-97-GP
20.20918.015
CRT1
D-SUB-15-97-GP
20.20918.015
1
AFTP5004 AFTE14P-GPAFTP5004 AFTE14P-GP
1
2 3
4
RN5003
SRN10KJ-5-GP
RN5003
SRN10KJ-5-GP
1
2
3
D5005
CH221GP-GP-U
D5005
CH221GP-GP-U
1
2
3
D5006
CH221GP-GP-U
D5006
CH221GP-GP-U
1
AFTP5005 AFTE14P-GPAFTP5005 AFTE14P-GP
1
23
4
RN5002
SRN2K2J-1-GP
RN5002
SRN2K2J-1-GP
![](asset-33.png)
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
5V_HDMI_S0
HDMI_A_HPD_CN
HDMI_TX1+
HDMI_TX1-
HDMI_A_CEC
HDMI_TX0-
HDMI_TX0+
TDMS_A_CLK
TDMS_A_DAT
HDMI_TXC-
HDMI_TXC+
HDMI_DETECT_R
HDMI_TX2-
HDMI_TX2+
TDMS_A_CLK
TDMS_A_DAT
8101_NC35
HDMI_DETECT_R
HDMI_TX0+
HDMI_TXC-
HDMI_TXC+
HDMI_TX2+
HDMI_TX2-
HDMI_TX0-
HDMI_TX1+
HDMI_TX1-
REXT_HDMI
PC0
DDC_EN_PS8101
8101_NC34
HDMI_A_HPD_CN
PC1
HDMI_OE#
TDMS_A_DAT
TDMS_A_CLK
HDMI_A_HPD_CN
HDMI_TX1-
HDMI_TX1+
HDMI_DATA2_R#
HDMI_DATA1_R
HDMI_DATA2_R
HDMI_DATA1_R#
HDMI_CLK_R
HDMI_DATA0_R
HDMI_DATA0_R#
HDMI_A_HPD_CN
TDMS_A_DAT
TDMS_A_CLK
PCH_HDMI_DATA
PCH_HDMI_CLK
HDMI_OE#
HDMI_TX2+
HDMI_TX2-
HDMI_CLK_R#
HDMI_TX1-
HDMI_TX1+
HDMI_TX2-
HDMI_TX2+
HDMI_TX1-
HDMI_TX2+
HDMI_TX2-
HDMI_TX1+
HDMI_TX0+
HDMI_TX0-
HDMI_TXC+
HDMI_TXC- HDMI_TXC-
HDMI_TXC+
HDMI_TX0-
HDMI_TX0+
HDMI_TXC-
HDMI_TXC+
HDMI_TX0+
HDMI_TX0-
5V_HDMI_S0
3D3V_S0
3D3V_S0
3D3V_S0
3D3V_S0
3D3V_S0
5V_S0
5V_S0
3D3V_S0
3D3V_S0
3D3V_S0
PCH_HDMI_DET17
PCH_HDMI_CLK 17
PCH_HDMI_DATA 17
HDMI_DATA2_R17 HDMI_DATA2_R#17
HDMI_DATA1_R17 HDMI_DATA1_R#17
HDMI_DATA0_R17 HDMI_DATA0_R#17
HDMI_CLK_R17 HDMI_CLK_R#17
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
HDMI
A2
51 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
HDMI
A2
51 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
HDMI
A2
51 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Recommended Equalization: [PC1,PC0]=01, 4dB
HDMI Passive Level Shifter
Close to HDMI Connector
HDMI DDC Passive Level Shifter
HDMI Connector
1 2
R5101
0R2J-2-GP
R5101
0R2J-2-GP
1 2
R5110
499R2F-2-GP
DY
R5110
499R2F-2-GP
DY
1
2 3
4
RN5103SRN0J-6-GP RN5103SRN0J-6-GP
1
2 3
4
RN5108SRN0J-6-GP RN5108SRN0J-6-GP
12
R51142K2R2J-2-GP R51142K2R2J-2-GP
K A
D5102
CH551H-30GP-GP
D5102
CH551H-30GP-GP
GND
1VCC 2
PC0
3
PC1
4
GND
5
REXT
6
HPD 7
SDA 8
SCL 9
RT_EN#
10
VCC 11
GND
12
OUT_D4+ 13
OUT_D4- 14
VCC 15
OUT_D3+ 16
OUT_D3- 17
GND
18
OUT_D2+ 19
OUT_D2- 20
VCC 21
OUT_D1+ 22
OUT_D1- 23
GND
24
OE#
25
VCC 26
GND
27
SCL_SINK 28
SDA_SINK 29
HPD_SINK 30
GND
31
DDC_EN
32
VCC 33
NC#34 34
NC#35 35
GND
36
GND
37
IN_D1-
38
IN_D1+
39
VCC 40
IN_D2-
41
IN_D2+
42
GND
43
IN_D3-
44
IN_D3+
45
VCC 46
IN_D4-
47
IN_D4+
48
GND
49
U5101
PS8101-GP
71.P8101.003
DY
2ND = 71.03360.A0K
U5101
PS8101-GP
71.P8101.003
DY
2ND = 71.03360.A0K
12
C5121
SCD1U10V2KX-5GP
DY
C5121
SCD1U10V2KX-5GP
DY
1
2
3
4 5
6
7
8
RN5101
SRN680J-1-GP
RN5101
SRN680J-1-GP
12
C5119
SCD1U10V2KX-5GP
DY
C5119
SCD1U10V2KX-5GP
DY
G
S
D
Q5101
2N7002K-2-GP
84.2N702.J31
2nd = 84.2N702.031
DY
Q5101
2N7002K-2-GP
84.2N702.J31
2nd = 84.2N702.031
DY
1
2 3
4
RN5104SRN0J-6-GP RN5104SRN0J-6-GP
12
C5101
SCD1U10V2KX-5GP
DY
C5101
SCD1U10V2KX-5GP
DY
1
3
5
7
9
11
13
15
17
2
4
6
8
10
12
14
16
18
19
20
21
22
23
HDMI1
SKT-HDMI23-26-GP-U
22.10296.511
HDMI1
SKT-HDMI23-26-GP-U
22.10296.511
1
2
3 4
5
6
Q5104
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
Q5104
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
12
R5111
5K1R2F-2-GP
DY
R5111
5K1R2F-2-GP
DY
12
R51152K2R2J-2-GP R51152K2R2J-2-GP
1
TP5101
TPAD14-GP
TP5101
TPAD14-GP
G
S
D
Q5103
2N7002K-2-GP
84.2N702.J31
2nd = 84.2N702.031
Q5103
2N7002K-2-GP
84.2N702.J31
2nd = 84.2N702.031
G
S
D
Q5102
2N7002K-2-GP
84.2N702.J31
2nd = 84.2N702.031
Q5102
2N7002K-2-GP
84.2N702.J31
2nd = 84.2N702.031
1 2
R5108 4K7R2J-2-GP
DY
R5108 4K7R2J-2-GP
DY
12
R5109
4K7R2J-2-GP
DY
R5109
4K7R2J-2-GP
DY
12
R5113 4K7R2J-2-GP
DY
R5113 4K7R2J-2-GP
DY
12
R5106
1MR2J-1-GP
R5106
1MR2J-1-GP
1 2
R5107 4K7R2J-2-GP
DY
R5107 4K7R2J-2-GP
DY
12
R5102
20KR2J-L2-GP
DY
R5102
20KR2J-L2-GP
DY
1
2 3
4
RN5107SRN0J-6-GP RN5107SRN0J-6-GP
L1#1
1
L2#2
2
GND
G1
L3#3
3
L4#4
4L4#5 5
L3#6 6
L2#7 7
L1#8 8
GND G2
D5103
RCLAMP0524P-GP
DY
D5103
RCLAMP0524P-GP
DY
12
R5104
100KR2J-1-GP
DY
R5104
100KR2J-1-GP
DY
12
R5112 4K7R2J-2-GP
DY
R5112 4K7R2J-2-GP
DY
1
2
3
4 5
6
7
8
RN5102
SRN680J-1-GP
RN5102
SRN680J-1-GP
L1#1
1
L2#2
2
GND
G1
L3#3
3
L4#4
4L4#5 5
L3#6 6
L2#7 7
L1#8 8
GND G2
D5104
RCLAMP0524P-GP
DY
D5104
RCLAMP0524P-GP
DY
1
TP5102 TPAD14-GPTP5102 TPAD14-GP
12
R5105
100KR2J-1-GP
R5105
100KR2J-1-GP
1
2
3
D5101
BAV99PT-GP-U
DY
83.00099.K11
D5101
BAV99PT-GP-U
DY
83.00099.K11
12
C5102
SCD1U10V2KX-5GP
DY
C5102
SCD1U10V2KX-5GP
DY
![](asset-34.png)
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
DISPLAY PORT CONNECTOR
A4
52 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
DISPLAY PORT CONNECTOR
A4
52 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
DISPLAY PORT CONNECTOR
A4
52 94Tuesday, November 09, 2010
<Core Design>
BLANK
![](asset-35.png)
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
BLANK
A4
53 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
BLANK
A4
53 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
BLANK
A4
53 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
BLANK
![](asset-36.png)
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
BLANK
A4
54 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
BLANK
A4
54 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
BLANK
A4
54 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
BLANK
![](asset-37.png)
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
FAN CONTROL
A4
55 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
FAN CONTROL
A4
55 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
FAN CONTROL
A4
55 94Tuesday, November 09, 2010
<Core Design>
![](asset-38.png)
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
SATA_ODD_PWRGT
SATA_ODD_DA#
SATA_ODD_DA#_C
SATA_ODD_PWRGT SATA_ODD_DA#
ODD_PWRGT#
SATA_RXN0_C
SATA_RXP0_C
SATA_TXN0_C
SATA_TXP0_C
SATA_ODD_PWRGT_T
3D3V_S0_HDD
5V_S0_HDD
SATA_TXP4_C
SATA_TXN4_C
SATA_ODD_DA#_C
SATA_RXP4_C
SATA_RXN4_C
ODD_PWR_5V
3D3V_S0
5V_S0
3D3V_S0
3D3V_S0
5V_S0
ODD_PWR_5V
5V_S0
SATA_TXP0 21
SATA_TXN0 21
SATA_RXN0 21
SATA_RXP0 21
SATA_ODD_PWRGT22
SATA_TXN4 21
SATA_TXP4 21
SATA_ODD_DA#18
SATA_RXP4 21
SATA_RXN4 21
SATA_ODD_PRSNT#22
HDD_DTCT#27
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
SATA HDD
A3
56 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
SATA HDD
A3
56 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
SATA HDD
A3
56 94Tuesday, November 09, 2010
<Core Design>
SATA_RX- and SATA_RX+ Trace
Length match within 20 mil
ODD Connector
Mars:
Exchange ODD and ESATA differential pair each other.
SUPPORT ZERO SATA ODD
0707 Modify:
Change Q5601 to DUAL 2N7002 for isolate MD/DA signal between PCH and ODD.
When the drive is powered on, the FET to the MD/DA pin drive is OFF.
When the drive is powered off, the FET to the MD/DA pin is ON
SATA Zero Power ODD
20100709 V1.4
-1 0114
100 mil
HDD Connector
1 2
C5612 SCD01U16V2KX-3GPC5612 SCD01U16V2KX-3GP
12
R5606
10KR2J-3-GP
R5606
10KR2J-3-GP
1 2
C5614
SC10U6D3V3MX-GP
C5614
SC10U6D3V3MX-GP
12
C5605
SC1U10V2KX-1GP
C5605
SC1U10V2KX-1GP
1
23
4
RN5601
SRN10KJ-5-GP
RN5601
SRN10KJ-5-GP
G
S
D
Q5602
2N7002K-2-GP
84.2N702.J31
2nd = 84.2N702.031
Q5602
2N7002K-2-GP
84.2N702.J31
2nd = 84.2N702.031
1 2
R56100R3J-0-U-GP R56100R3J-0-U-GP
1 2
R5605 0R2J-2-GP
DY
R5605 0R2J-2-GP
DY
GND
S1 A+ S2
A- S3
GND
S4
B- S5
B+ S6
GND
S7
DP
P1 +5V P2
+5V P3
MD
P4
GND
P5
GND
P6
GND
14
GND
15 NP1 NP1
NP2 NP2
ODD1
SKT-SATA7P-6P-56-GP
22.10300.B51
ODD1
SKT-SATA7P-6P-56-GP
22.10300.B51
1 2
R56110R3J-0-U-GP R56110R3J-0-U-GP
1 2
C5615
SCD01U25V2KX-3GP
DY
C5615
SCD01U25V2KX-3GP
DY
1 2
R56030R5J-5-GP
DY
R56030R5J-5-GP
DY
12
C5606
SC10U10V5ZY-1GP
C5606
SC10U10V5ZY-1GP
12
C5604
SCD1U16V2KX-3GP
C5604
SCD1U16V2KX-3GP
1 2
R56090R3J-0-U-GP R56090R3J-0-U-GP
1 2
R56080R3J-0-U-GP R56080R3J-0-U-GP
1 2
C5613
SCD01U25V2KX-3GP
DY
C5613
SCD01U25V2KX-3GP
DY
1 2
C5608 SCD01U16V2KX-3GPC5608 SCD01U16V2KX-3GP
12
C5609SCD01U16V2KX-3GP C5609SCD01U16V2KX-3GP
PN5603PWRNC PN5603PWRNC
1 2
C5607 SCD01U16V2KX-3GPC5607 SCD01U16V2KX-3GP
PN5602PWRNC PN5602PWRNC
12
C5610SCD01U16V2KX-3GP C5610SCD01U16V2KX-3GP
PN5601PWRNC PN5601PWRNC
12
R5601
100KR2J-1-GP
R5601
100KR2J-1-GP
1
2
3 4
5
6
Q5601 2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
Q5601 2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
D
G
S
Q5603
AO3419L-GP
Q5603
AO3419L-GP
1 2
C5603SCD01U16V2KX-3GP C5603SCD01U16V2KX-3GP
12
C5601
SCD1U10V2KX-5GP
C5601
SCD1U10V2KX-5GP
1 2
C5602SCD01U16V2KX-3GP C5602SCD01U16V2KX-3GP
GND
S1
GND
S4
GND
S7
V33 P1
V33 P2
V33 P3
GND
P4
GND
P5
GND
P6
V5 P7
V5 P8
V5 P9
GND
P10
DAS/DSS
P11
GND
P12
V12 P13
V12 P14
V12 P15
NP1
NP1
NP2
NP2
A+ S2
A- S3
B+ S6
B- S5
GND
23
GND
24
HDD1
SKT-SATA7P-15P-65-GP
22.10300.B31
HDD1
SKT-SATA7P-15P-65-GP
22.10300.B31
12
R5604
10KR2J-3-GP
DY
R5604
10KR2J-3-GP
DY
1 2
C5611 SCD01U16V2KX-3GPC5611 SCD01U16V2KX-3GP
1 2
R5602 0R3J-0-U-GP
DY
R5602 0R3J-0-U-GP
DY
![](asset-39.png)
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
USB_PP8
USB_PN8
USB_PP8 USB_PN8
USB_PP8
USB_PN8
USB_PWR1
USB_PWR1
5V_S5
5V_S5
USB_PWR1
USB_PP818 USB_PN818
SATA_TXP521
SATA_RXP521
SATA_TXN521
SATA_RXN521
USB_PWR_EN27,61 USB_OC#8_9 18,61
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
ESATA CONNECTOR
A4
57 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
ESATA CONNECTOR
A4
57 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
ESATA CONNECTOR
A4
57 94Tuesday, November 09, 2010
<Core Design>
WIDE PATTERN (MIN 500MA)
PLACE NEAR USB CONNECTOR
ESATA Connector
HPC
54Y9024BA
77.C1571.09LNEC-TOKIN
SANYO
Description Lenovo P/N Wistron P/N
Table 57.2- 150U 6.3V POSCAP multi-source
74.02065.079
74.08012.07G
TI
ROHM
Description Lenovo P/N Wistron P/N
54Y9024AABD8012FVJ
TPS2065DGN4
Supplier
Table 57.1- USB2.0 PWR SW multi-source
N/A
N/ATEPSLB20J157M
6TPE150MAZB 77.21571.111
Supplier
TNCB0J157MTRZTF N/A 80.15715.12L
Near ESATA1
IN
3IN#2
2GND
1
EN
4OC# 5
OUT 6
OUT#7 7
OUT#8 8
GND
9
U5701
TPS2065DGN-GP
U5701
TPS2065DGN-GP
12
C5704
SCD1U10V2KX-5GP
C5704
SCD1U10V2KX-5GP
12 C5707SCD01U16V2KX-3GP C5707SCD01U16V2KX-3GP
12 C5708SCD01U16V2KX-3GP C5708SCD01U16V2KX-3GP
1 2
C5702
SCD1U10V2KX-5GP
C5702
SCD1U10V2KX-5GP
12 C5705SCD01U16V2KX-3GP C5705SCD01U16V2KX-3GP
12 C5706SCD01U16V2KX-3GP C5706SCD01U16V2KX-3GP
1 2
C5703
SCD1U10V2KX-5GP
C5703
SCD1U10V2KX-5GP
12
TC5701
ST150U6D3VBM-1-GP
TC5701
ST150U6D3VBM-1-GP
GND S1
A+
S2
A-
S3 GND S4
B-
S5 B+
S6 GND S7
CHASSIS#12 12
CHASSIS#13 13
CHASSIS#14 14
CHASSIS#15 15
NP1 NP1
NP2 NP2
VBUS
U1
D-
U2 D+
U3
GND U4
ESATA1
SKT-ESATA-USB-S7-U4-5-GP-U
ESATA1
SKT-ESATA-USB-S7-U4-5-GP-U
ESD I/O1
1
GND
2
ESD I/O2
3VP 5
ESD I/O3 4
ESD I/O4 6
D5702
IP4223CZ6-GP
DY
D5702
IP4223CZ6-GP
DY
1AFTP5704 AFTE14P-GPAFTP5704 AFTE14P-GP
L1#1 1
L2#2 2
GND G1
L3#3 3
L4#4 4
L4#5
5L3#6
6
L2#7
7L1#8
8
GND
G2
D5701
RCLAMP0524P-GP
DY
D5701
RCLAMP0524P-GP
DY
1AFTP5702 AFTE14P-GPAFTP5702 AFTE14P-GP
1AFTP5703 AFTE14P-GPAFTP5703 AFTE14P-GP
1AFTP5701 AFTE14P-GPAFTP5701 AFTE14P-GP
![](asset-3a.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
HP_JACK_SYS
HP_JACK_SYS
HP_JACK_SYS
HP_R_JACK_R
HP_L_JACK_R
MIC_JACK_3
MIC_JACK_3
HP_L_JACK_R
HP_R_JACK_R
MIC_JACK_3
AUD_5V
AU_GND
AU_GND
AU_GND
AU_GND AU_GND AU_GND
AU_GND
AU_GND
AU_GND
AU_GND
AUD_LDO_OUT_3D3V
AU_GND
AUD_SPK_L+_L29
AUD_SPK_L-_L29
AUD_SPK_R+_L29
AUD_SPK_R-_L29
AUD_PORTC_L_C29
AUD_SENSE_A 29
AUD_PORTC_R_C29
AUD_PORTA_L29
AUD_PORTA_R29 AUD_SENSE_A 29
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
Audio Jack
A2
58 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
Audio Jack
A2
58 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
Audio Jack
A2
58 94
Tuesday, November 09, 2010
<Core Design>
Place these EMI components
close to speaker connector.
Only needed if speaker
connector is physically far from
audio codec. When in doubt, it's
always a good idea to have
population option.
INTERNAL STEREO SPEAKERS
Port G
JACK SENSENEAR HEADPHONE CONN
confirm HPMIC1 is NO type's
connector
1 2
R5817
0R2J-2-GP
R5817
0R2J-2-GP
12
EC5801
SC47P50V2JN-3GP
EC5801
SC47P50V2JN-3GP
1
TP5809
AFTE14P-GP
TP5809
AFTE14P-GP
1 2
R5810
1KR2J-1-GP
R5810
1KR2J-1-GP
12
EC5804
SC47P50V2JN-3GP
EC5804
SC47P50V2JN-3GP
1 2
EC5809 SCD01U25V2KX-3GP
DY
EC5809 SCD01U25V2KX-3GP
DY
1
TP5803AFTE14P-GP TP5803AFTE14P-GP
1 2
R5811
1KR2J-1-GP
R5811
1KR2J-1-GP
1
TP5805AFTE14P-GP TP5805AFTE14P-GP
1
TP5804AFTE14P-GP TP5804AFTE14P-GP
1 2
R5805 5D1R2J-1-GPR5805 5D1R2J-1-GP
1 2
R5816
0R2J-2-GP
R5816
0R2J-2-GP
1
TP5806AFTE14P-GP TP5806AFTE14P-GP
12
EC5802
SC47P50V2JN-3GP
EC5802
SC47P50V2JN-3GP
G
S
D
Q5801
2N7002K-2-GP
84.2N702.J31
2nd = 84.2N702.031
Q5801
2N7002K-2-GP
84.2N702.J31
2nd = 84.2N702.031
1
TP5807AFTE14P-GP TP5807AFTE14P-GP
1 2
R5808 10KR2F-2-GPR5808 10KR2F-2-GP
12
D5803
RSB5D6SGTE61-GP
D5803
RSB5D6SGTE61-GP
1 2
R5802 39K2R2F-L-GPR5802 39K2R2F-L-GP
1
TP5808
AFTE14P-GP
TP5808
AFTE14P-GP
12
R5801
2K2R2J-2-GP
R5801
2K2R2J-2-GP
12
EC5803
SC47P50V2JN-3GP
EC5803
SC47P50V2JN-3GP
1 2
EC5808 SCD01U25V2KX-3GPEC5808 SCD01U25V2KX-3GP
12
D5801
RSB5D6SGTE61-GP
D5801
RSB5D6SGTE61-GP
1 2
R5803 10KR2J-3-GPR5803 10KR2J-3-GP
1 2
EC5806 SCD01U25V2KX-3GPEC5806 SCD01U25V2KX-3GP
1 2
R5804 5D1R2J-1-GPR5804 5D1R2J-1-GP
12
D5802
RSB5D6SGTE61-GP
D5802
RSB5D6SGTE61-GP
G
S
D
Q5803
2N7002K-2-GP
84.2N702.J31
2nd = 84.2N702.031
Q5803
2N7002K-2-GP
84.2N702.J31
2nd = 84.2N702.031
G
S
D
Q5804
2N7002K-2-GP
84.2N702.J31
2nd = 84.2N702.031
Q5804
2N7002K-2-GP
84.2N702.J31
2nd = 84.2N702.031
AGND
1
NP1
NP1
NP2
NP2
MIC_JACK3
7
HP_R_JACK 3
VCC3MA 4
DGND
8
HP_JACK_SYS 5
HP_L_JACK 2
DGND
9NC#6 6
HPMIC1
PHONE-JK367-GP-U
22.10088.H81
HPMIC1
PHONE-JK367-GP-U
22.10088.H81
1 2
C5812 SC1U10V2KX-1GPC5812 SC1U10V2KX-1GP
12
C5813
SC1U10V2KX-1GP
C5813
SC1U10V2KX-1GP
1
TP5801AFTE14P-GP TP5801AFTE14P-GP
1 2
R5814
100KR2J-1-GP
R5814
100KR2J-1-GP
4
3
2
15
6
SPK1
ACES-CON4-29-GP
SPK1
ACES-CON4-29-GP
12
C5808
SC10U6D3V3MX-GP
C5808
SC10U6D3V3MX-GP
1 2
EC5807 SCD01U25V2KX-3GPEC5807 SCD01U25V2KX-3GP
1
TP5802AFTE14P-GP TP5802AFTE14P-GP
1 2
R5815
0R2J-2-GP
R5815
0R2J-2-GP
![](asset-3b.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
BLANK
A3
59 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
BLANK
A3
59 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
BLANK
A3
59 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
![](asset-3c.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
RTC_PWR
+RTC_VCC
SPI_SO
SPI_WP#
SPI_HOLD_0#
3D3V_SPI
3D3V_SPI
3D3V_SPI
RTC_AUX_S5
3D3V_AUX_S5
+RTC_VCC
3D3V_SPI 3D3V_S0 3D3V_S5
SPI_CLK_R 21,27
SPI_SO_R21,27
SPI_SI_R 21,27
SPI_CS0#_R21,27
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
Flash/RTC
A3
60 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
Flash/RTC
A3
60 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
Flash/RTC
A3
60 94
Tuesday, November 09, 2010
<Core Design>
SSID = Flash.ROM
Width=20mils
SSID = RBATT
SPI FLASH ROM (4M byte) for PCH
20100622 V1.2
the same page 23 VCCSPI power
NUMONYX
72.25032.D01
72.25320.C01
SST
MXIC
WINBOND
Description Lenovo P/N Wistron P/N
Table 60.1- SPI Serial Flash Memory multi-source
N/A
N/A
N/A
MX25L3206EM2I-12G
SST25VF032B-80-4I-S2A
W25Q32BVSSIG 72.25Q32.A01
Supplier
M25PX32-VMW6F N/A 72.25P32.C01
83.R0304.D81
83.00040.R81
CHENMKO
Description Lenovo P/N Wistron P/N
Table 60.2 - Schottky Barrier Diode multi-source
N/A
N/A
BAS40CWGP
CH715FGP
Supplier
83.00040.E81PANJIT N/ABAS40CW
CHENMKO
1 2
C6003
SC1U6D3V2KX-GP
C6003
SC1U6D3V2KX-GP
12
R6011 0R2J-2-GP
DY
R6011 0R2J-2-GP
DY
1
2
3
4
RTC1
ACES-CON2-31-GP
RTC1
ACES-CON2-31-GP
12
C6001
SC10U6D3V5KX-1GP
DY
C6001
SC10U6D3V5KX-1GP
DY
1
2
3
4 5
6
7
8
RN6001
SRN4K7J-10-GP
RN6001
SRN4K7J-10-GP
12
EC6003
SC4D7P50V2CN-1GP
DY
EC6003
SC4D7P50V2CN-1GP
DY
1 2
R6002 1KR2J-1-GPR6002 1KR2J-1-GP
12
R6010 0R2J-2-GPR6010 0R2J-2-GP
CE#
1
SO
2
WP#
3
VSS
4SI 5
SCK 6
HOLD# 7
VDD 8
U6001
SST25VF032B-80-4I-S2AF-GP
U6001
SST25VF032B-80-4I-S2AF-GP
1
TP6001TP6001
1 2
R6001 33R2J-2-GPR6001 33R2J-2-GP
12
C6002
SCD1U10V2KX-5GP
C6002
SCD1U10V2KX-5GP
1
TP6002TPAD14-GP TP6002TPAD14-GP
1
2
3
Q6001
CH715FGP-GP-U
Q6001
CH715FGP-GP-U
12
EC6001
SC4D7P50V2CN-1GP
DY
EC6001
SC4D7P50V2CN-1GP
DY
12
EC6002
SC4D7P50V2CN-1GP
DY
EC6002
SC4D7P50V2CN-1GP
DY
![](asset-3d.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USBPP9_TVS
USBPN9_TVS
USBPN9_TVSUSBPP9_TVS
USBPN1_TVS
USBPP1_TVS
USBPP1_TVS USBPN1_TVS
USBPN1_TVS
USBPP1_TVS
USBPN9_TVS
USBPP9_TVS
USB_PWR2
5V_S5
5V_S5
USB_PWR2 USB_PWR3
USB_PWR3
USB_PWR3
USB_PWR2
USB_PN918
USB_PP918
USB_PWR_EN27,57
USB_OC#8_9 18,57
USB_OC#0_1 18
USB_PP118
USB_PN118
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
USB Connector
A3
61 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
USB Connector
A3
61 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
USB Connector
A3
61 94Tuesday, November 09, 2010
<Core Design>
WIDE PATTERN (MIN 500MA)
PLACE NEAR USB CONNECTOR
WIDE PATTERN (MIN 500MA)
PLACE NEAR USB CONNECTOR
USB Connector
Left Rear USB Connector
Left Front USB Connector
41R0511AA
77.C1571.09LNEC-TOKIN
SANYO
Description Lenovo P/N Wistron P/N
Table 61.2- 150U 6.3V POSCAP multi-source
74.02066.A71
74.02066.B71
TI
TI
Description Lenovo P/N Wistron P/N
N/ATPS2066DGN-1
TPS2066DGN
Supplier
Table 61.1- USB2.0 PWR SW multi-source
N/A
N/ATEPSLB20J157M
6TPE150MAZB 77.21571.111
Supplier
HPC TNCB0J157MTRZTF N/A 80.15715.12L
Near USB2
Near USB1
1
2
3
4
5
6
USB1
SKT-USB6-21-GP
22.10321.Z61
USB1
SKT-USB6-21-GP
22.10321.Z61
1 2
R6103 0R3J-0-U-GPR6103 0R3J-0-U-GP
EN1
3IN
2GND
1
EN2
4OC2# 5
OUT2 6
OUT1 7
OC1# 8
GND
9
U6101
TPS2066DGN-GP-U
U6101
TPS2066DGN-GP-U
1
AFTP6101 AFTE14P-GPAFTP6101 AFTE14P-GP
12
C6105
SCD1U10V2KX-5GP
C6105
SCD1U10V2KX-5GP
1 2
R6102 0R3J-0-U-GPR6102 0R3J-0-U-GP
1
AFTP6105 AFTE14P-GPAFTP6105 AFTE14P-GP
1 2
R6101 0R3J-0-U-GPR6101 0R3J-0-U-GP
1
AFTP6107 AFTE14P-GPAFTP6107 AFTE14P-GP
12
C6104
SC470P50V2KX-3GP
C6104
SC470P50V2KX-3GP
1
AFTP6106 AFTE14P-GPAFTP6106 AFTE14P-GP
1
34
2
TR6102
ACM2012-900-1GP
DY
TR6102
ACM2012-900-1GP
DY
1
AFTP6108 AFTE14P-GPAFTP6108 AFTE14P-GP
12
TC6102
ST150U6D3VBM-1-GP
TC6102
ST150U6D3VBM-1-GP
1
3 4
2
TR6101
ACM2012-900-1GP
DY
TR6101
ACM2012-900-1GP
DY
12
C6101
SCD1U10V2KX-5GP
C6101
SCD1U10V2KX-5GP
12
C6102
SC470P50V2KX-3GP
C6102
SC470P50V2KX-3GP
1
AFTP6104 AFTE14P-GPAFTP6104 AFTE14P-GP
ESD I/O1
1
GND
2
ESD I/O2
3VP 5
ESD I/O3 4
ESD I/O4 6
U6102
IP4223CZ6-GP
DY
U6102
IP4223CZ6-GP
DY
1
2
3
4
5
6
USB2
SKT-USB6-21-GP
22.10321.Z61
USB2
SKT-USB6-21-GP
22.10321.Z61
1 2
R6104 0R3J-0-U-GPR6104 0R3J-0-U-GP
1
AFTP6102 AFTE14P-GPAFTP6102 AFTE14P-GP
12
TC6101
ST150U6D3VBM-1-GP
TC6101
ST150U6D3VBM-1-GP
1
AFTP6103 AFTE14P-GPAFTP6103 AFTE14P-GP
12
C6103
SCD1U10V2KX-5GP
C6103
SCD1U10V2KX-5GP
![](asset-3e.png)
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
BLANK
A4
62 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
BLANK
A4
62 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
BLANK
A4
62 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
BLANK
![](asset-3f.png)
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
3D3V_BT_S0
LED_BDC_IN
BDC_PRESENCE#
WIFI_BUSY
BLUETOOTH_EN
BT_BUSY
3D3V_BT_S0
3D3V_S0
USB_PN3 18
WIFI_BUSY65
BLUETOOTH_EN27
BT_BUSY 65BDC_PRESENCE#18
USB_PP3 18
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
Bluetooth
A4
63 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
Bluetooth
A4
63 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
Bluetooth
A4
63 94Tuesday, November 09, 2010
<Core Design>
Bluetooth Connector
1
TP1702TPAD14-GP TP1702TPAD14-GP
12
C6301
SC2D2U10V3KX-1GP
C6301
SC2D2U10V3KX-1GP
1 2
F6301
POLYSW-D5A6V-1-GP
F6301
POLYSW-D5A6V-1-GP
1TP1106TP1106
1TP1107TP1107
15
NP1
2
4
6
8
10
12
14
NP2
16
1
3
5
7
9
11
13
BT1
HRS-CONN14D-1-GP
BT1
HRS-CONN14D-1-GP
1TP1108TP1108
1TP1109TP1109
1TP1110TP1110
![](asset-40.png)
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
FingerPrint
A4
64 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
FingerPrint
A4
64 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
FingerPrint
A4
64 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
BLANK
![](asset-41.png)
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
CLK_PCI_LPC_C WLAN_LED#
E51_RXD_R
PCH_SMBCLK_WLAN
PLT_RST#_WLAN
E51_TXD_R
PCH_SMBDATA_WLAN
+5V_MINI_DEBUG
LPC_FRAME#_C
LPC_AD2_C
LPC_AD0_C
LPC_AD3_C
LPC_AD1_C
3D3V_S01D5V_S0
5V_S5
1D5V_S0
5V_S5
3D3V_S0
3D3V_S0
3D3V_S0
PCIE_WAKE#19,82
CLK_PCI_LPC 18,71
CLK_PCIE_WLAN#20 CLK_PCIE_WLAN20
PCH_SMBCLK 14,15,20,66
PCH_SMBDATA 14,15,20,66
WIFI_RF_EN 27
E51_RXD27 E51_TXD27
PCIE_CLK_WLAN_RQ3#20
USB_PP11 18
USB_PN11 18
PCIE_TXN420 PCIE_TXP420
PCIE_RXP420 PCIE_RXN420
LPC_FRAME# 21,27,71
LPC_AD0 21,27,71
LPC_AD1 21,27,71
LPC_AD2 21,27,71
LPC_AD3 21,27,71
PLT_RST# 5,18,27,32,36,66,71,80,82,83
BT_BUSY63
WIFI_BUSY63
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
MINI CARD SLOT 1
A4
65 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
MINI CARD SLOT 1
A4
65 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
MINI CARD SLOT 1
A4
65 94Tuesday, November 09, 2010
<Core Design>
HALF MINI CARD FOR WLAN
R6504~R6509 close to Debug connector
12
C6506
SCD1U16V2KX-3GP
C6506
SCD1U16V2KX-3GP
1 2
R6501 0R2J-2-GPR6501 0R2J-2-GP
1 2
R6509
0R2J-2-GP
DY
R6509
0R2J-2-GP
DY
12
C6503
SC10U6D3V5KX-1GP
C6503
SC10U6D3V5KX-1GP
1 2
R6512 0R2J-2-GPR6512 0R2J-2-GP
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
NP1
NP2
53
54
WLAN1
TCN-CONN52A-2-GP
20.F1665.052
2nd = 20.F1517.052
WLAN1
TCN-CONN52A-2-GP
20.F1665.052
2nd = 20.F1517.052
12
C6504
SCD1U16V2KX-3GP
C6504
SCD1U16V2KX-3GP
12
C6507
SCD1U16V2KX-3GP
C6507
SCD1U16V2KX-3GP
12
C6502
SCD1U16V2KX-3GP
C6502
SCD1U16V2KX-3GP
1 2
R6510 0R2J-2-GPR6510 0R2J-2-GP
1 2
R6513 0R2J-2-GPR6513 0R2J-2-GP
12
C6501
SCD1U16V2KX-3GP
C6501
SCD1U16V2KX-3GP
1 2
R6511 0R2J-2-GP
DY
R6511 0R2J-2-GP
DY
12
R6508 0R2J-2-GP
DY
R6508 0R2J-2-GP
DY
1 2
R6504
0R2J-2-GP
DY
R6504
0R2J-2-GP
DY
12
C6505
SC10U6D3V5KX-1GP
C6505
SC10U6D3V5KX-1GP
1 2
R6505
0R2J-2-GP
DY
R6505
0R2J-2-GP
DY
1 2
R6503 0R3J-0-U-GPR6503 0R3J-0-U-GP
1TP6501TP6501
1 2
R6506
0R2J-2-GP
DY
R6506
0R2J-2-GP
DY
1 2
R6502 0R2J-2-GPR6502 0R2J-2-GP
1 2
R6507
0R2J-2-GP
DY
R6507
0R2J-2-GP
DY
![](asset-42.png)
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
UIM_DATA
UIM_PWR
UIM_RESET
UIM_VPP
UIM_CLK
UIM_DATA
UIM_PWR
UIM_RESET
UIM_VPP
UIM_CLK_SIM
3G_LED#
UIM_CLK
PCH_SMBCLK_WWAN
PLT_RST#
PCH_SMBDATA_WWAN
USB_PN4_R
USB_PP4_R
UIM_CLK_SIM
CD
SATA_RXP1_C
SATA_RXN1_C
SATA_TXN1_C
SATA_TXP1_C
1D5V_S0
3D3V_S0
1D5V_S0
1D5V_S0 3D3V_WWAN
3D3V_S0
3D3V_WWAN
3D3V_S0
3D3V_S03D3V_S5 3D3V_WWAN
PCH_SMBCLK 14,15,20,65
PCH_SMBDATA 14,15,20,65
USB_PN4 18
USB_PP4 18
SATA_RXP121
SATA_TXP121 SATA_TXN121
SATA_RXN121
3G_EN 27
PLT_RST# 5,18,27,32,36,65,71,80,82,83
3G_POWERON27
mSATA_DTCT#22,27
WWAN_IN18
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
MINI CARD SLOT 2
A3
66 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
MINI CARD SLOT 2
A3
66 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
MINI CARD SLOT 2
A3
66 94Tuesday, November 09, 2010
<Core Design>
Place near MINI Card CONN
Place near Pin 24
Mini Card Connector(WWAN)
10A2.7A
SIM Connector
1 2
C6612 SCD01U16V2KX-3GPC6612 SCD01U16V2KX-3GP
12
R6606
100KR2J-1-GP
DY
R6606
100KR2J-1-GP
DY
1 2
C6613 SCD01U16V2KX-3GPC6613 SCD01U16V2KX-3GP
E
BC
R1
R2
Q6601
PDTC115EE-1-GP
DY
R1
R2
Q6601
PDTC115EE-1-GP
DY
1 2
C6614 SCD01U16V2KX-3GPC6614 SCD01U16V2KX-3GP
VCC
1
RST
2
CLK
3
GND
5
VPP
6
I/O
7
GND
8
GND
9
CD
10
NP1
NP1
NP2
NP2
SIM1
CARD-PUSH-7P-2-GP
20.I0046.011
2nd = 20.I0123.001
SIM1
CARD-PUSH-7P-2-GP
20.I0046.011
2nd = 20.I0123.001
12
C6611
SCD1U10V2KX-5GP
DY
C6611
SCD1U10V2KX-5GP
DY
1 2
C6615 SCD01U16V2KX-3GPC6615 SCD01U16V2KX-3GP
1 2
R6609 0R2J-2-GPR6609 0R2J-2-GP
12
R6608
10KR2J-3-GP
DY
R6608
10KR2J-3-GP
DY
12
C6616
SCD22U10V2KX-1GP
DY
C6616
SCD22U10V2KX-1GP
DY
12
C6601
SCD047U16V2KX-1-GP
C6601
SCD047U16V2KX-1-GP
12
R6607
10KR2J-3-GP
DY
R6607
10KR2J-3-GP
DY
1 2
R6603 0R0402-PADR6603 0R0402-PAD
12
C6607
SC33P50V2JN-3GP
C6607
SC33P50V2JN-3GP
12
TC6601
ST220U6D3VDM-15GP
TC6601
ST220U6D3VDM-15GP
12
C6602
SCD047U16V2KX-1-GP
C6602
SCD047U16V2KX-1-GP
12
C6605
SC100P50V2JN-3GP
DY
C6605
SC100P50V2JN-3GP
DY
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
NP1
NP2
53
54
WWAN1
TCN-CONN52A-2-GP
20.F1665.052
2nd = 20.F1517.052
WWAN1
TCN-CONN52A-2-GP
20.F1665.052
2nd = 20.F1517.052
12
C6604
SC33P50V2JN-3GP
DY
C6604
SC33P50V2JN-3GP
DY
1 2
R6605
0R3J-0-U-GP
R6605
0R3J-0-U-GP
1
TP6602 TPAD14-GPTP6602 TPAD14-GP
1 2
R6604 0R2J-2-GPR6604 0R2J-2-GP
12
C6603
SC33P50V2JN-3GP
C6603
SC33P50V2JN-3GP
12
C6606
SCD047U16V2KX-1-GP
C6606
SCD047U16V2KX-1-GP
6
54
3
2
1
7
8
U6601
TPCF8102-GP
DY
U6601
TPCF8102-GP
DY
1 2
R6601 0R0402-PADR6601 0R0402-PAD
12
R6602
0R0402-PAD
R6602
0R0402-PAD
12
C6609
SCD047U16V2KX-1-GP
C6609
SCD047U16V2KX-1-GP
12
C6610
SC33P50V2JN-3GP
C6610
SC33P50V2JN-3GP
12
C6608
SCD1U16V2KX-3GP
C6608
SCD1U16V2KX-3GP
1
TP6601TP6601
![](asset-43.png)
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
BLANK
A4
67 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
BLANK
A4
67 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
BLANK
A4
67 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
BLANK
![](asset-44.png)
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
BLANK
A4
68 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
BLANK
A4
68 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
BLANK
A4
68 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
BLANK
![](asset-45.png)
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
TP4CLKPAD
TP4DATAPAD
KCOL13
KCOL4
KROW7
KCOL3
KROW5
KCOL12
KCOL5
KCOL8
KROW2
KCOL0
KROW0
KCOL9
KCOL6
KROW4
KCOL2
KROW3
KCOL15
KCOL10
KCOL14
KCOL7
KROW6
KCOL1
KROW1
KCOL11
TP4LEFT
TP4MIDDLE
TP4RIGHT
KCOL16
KCOL17
TP4CLKPAD
TP4DATAPAD
TP4_RESET
TPDATA_R
TPCLK_R
5V_TP_FUSE
TP4CLKPAD_R
TP4DATAPAD_R
3D3V_FP_FUSE
TRP1_PWR
PALM_LED_P
PALM_LED_N
PALM_LED_N
TP4MIDDLE
TP4RIGHT
TP4LEFT
TP4DATAPAD
TP4_RESET
TP4MIDDLE
TP4RIGHT
TP4LEFT
TP4CLKPAD
TRP1_PWR
TP4DATAPAD_R
PAD_RESET#
TPDATA_R
5V_TP_FUSE
TP4CLKPAD_R
TPCLK_R
PAD_DETECT#
USB_PP2
USB_PN2
PALM_LED_P
3D3V_FP_FUSE
PALM_LED_N
TP4RIGHT
TP4MIDDLE
KCOL17
TP4LEFT
KCOL16
KCOL11
KCOL14
KCOL15
KCOL13
KCOL10
KCOL4
KROW7
KCOL3
KROW5
KCOL12
KCOL5
KCOL8
KROW2
KCOL0
KROW0
KCOL9
KCOL6
KROW4
KCOL2
KROW3
KCOL7
KROW6
KCOL1
KROW1
5V_S0
3D3V_S0
5V_S0
5V_S0
5V_S0
3D3V_S5
PAD_RESET# 27
PAD_DETECT# 27
KROW[0..7] 27
KCOL[0..17] 27
USB_PP2 18
USB_PN2 18
TP4_RESET 27
TPCLK 27
TPDATA 27
PALM_LED27
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
TOUCH PAD CONNECTOR
A3
69 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
TOUCH PAD CONNECTOR
A3
69 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
TOUCH PAD CONNECTOR
A3
69 94Tuesday, November 09, 2010
<Core Design>
Touch Pad Connector Track Point Connector
KeyBoard Connector
LTC043ZUB
N/A
N/A
Table 69.1- Transistor multi-source
84.00143.E1K
84.DT114.B11
NXP
ON
ROHM
Description Lenovo P/N Wistron P/N
N/A
N/A
84.05143.011
DTA114EET1G
PDTC143ZU
DRC5143Z0L
84.00043.011
Supplier
Panasonic
1
TP6902 AFTE14P-GPTP6902 AFTE14P-GP
1 2
C6902
SC2D2U10V3KX-1GP
C6902
SC2D2U10V3KX-1GP
1
TP6950 AFTE14P-GPTP6950 AFTE14P-GP
1
TP6946 AFTE14P-GPTP6946 AFTE14P-GP
1
TP6909AFTE14P-GP TP6909AFTE14P-GP
1 2
R6902
100KR2J-1-GP
R6902
100KR2J-1-GP
1 2
R6901
100KR2J-1-GP
R6901
100KR2J-1-GP
1
TP6943 AFTE14P-GPTP6943 AFTE14P-GP
1
TP6927 AFTE14P-GPTP6927 AFTE14P-GP
1
2 3
4
RN6901 SRN0J-6-GPRN6901 SRN0J-6-GP
1
TP6922 AFTE14P-GPTP6922 AFTE14P-GP
1 2
R6903
100KR2J-1-GP
R6903
100KR2J-1-GP
1
TP6940 AFTE14P-GPTP6940 AFTE14P-GP
1
TP6910 AFTE14P-GPTP6910 AFTE14P-GP
1
TP6937 AFTE14P-GPTP6937 AFTE14P-GP
1
TP6949 AFTE14P-GPTP6949 AFTE14P-GP
1
TP6928 AFTE14P-GPTP6928 AFTE14P-GP
2
13
R1
R2
Q6901
LTC043ZUB-FS8-GP
R1
R2
Q6901
LTC043ZUB-FS8-GP
1
TP6934 AFTE14P-GPTP6934 AFTE14P-GP
1
TP6911 AFTE14P-GPTP6911 AFTE14P-GP
1 2
F6901
FUSE-D5A32V-14-GP
F6901
FUSE-D5A32V-14-GP
1
TP6915 AFTE14P-GPTP6915 AFTE14P-GP
1
TP6929 AFTE14P-GPTP6929 AFTE14P-GP
1
TP6923 AFTE14P-GPTP6923 AFTE14P-GP
1
TP6916 AFTE14P-GPTP6916 AFTE14P-GP
1 2
R6904
100KR2J-1-GP
R6904
100KR2J-1-GP
1
TP6930 AFTE14P-GPTP6930 AFTE14P-GP
1
TP6912 AFTE14P-GPTP6912 AFTE14P-GP
1
TP6924 AFTE14P-GPTP6924 AFTE14P-GP
1
TP6944 AFTE14P-GPTP6944 AFTE14P-GP
1
TP6913 AFTE14P-GPTP6913 AFTE14P-GP
1
TP6931 AFTE14P-GPTP6931 AFTE14P-GP
1
TP6941 AFTE14P-GPTP6941 AFTE14P-GP
1 2
R6907 0R2J-2-GPR6907 0R2J-2-GP
12
R6906330R2F-GP R6906330R2F-GP
1
TP6925 AFTE14P-GPTP6925 AFTE14P-GP
1
TP6917 AFTE14P-GPTP6917 AFTE14P-GP
1
TP6903 AFTE14P-GPTP6903 AFTE14P-GP
1
TP6938 AFTE14P-GPTP6938 AFTE14P-GP
1
TP6914 AFTE14P-GPTP6914 AFTE14P-GP
12
F6902
FUSE-D5A32V-14-GP
F6902
FUSE-D5A32V-14-GP
1
TP6935 AFTE14P-GPTP6935 AFTE14P-GP
1
TP6926 AFTE14P-GPTP6926 AFTE14P-GP
1
TP6904 AFTE14P-GPTP6904 AFTE14P-GP
1
TP6918 AFTE14P-GPTP6918 AFTE14P-GP
1
TP6947 AFTE14P-GPTP6947 AFTE14P-GP
1
TP6907 AFTE14P-GPTP6907 AFTE14P-GP
1 2
R6905
100KR2J-1-GP
R6905
100KR2J-1-GP
1
2 3
4
RN6902 SRN0J-6-GPRN6902 SRN0J-6-GP
1
TP6932 AFTE14P-GPTP6932 AFTE14P-GP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
KB1
ACES-CON30-8-GP
20.K0524.030
2nd = 20.K0385.030
KB1
ACES-CON30-8-GP
20.K0524.030
2nd = 20.K0385.030
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
TPAD1
PTWO-CON20-2-GP-U
20.K0392.020
TPAD1
PTWO-CON20-2-GP-U
20.K0392.020
1
TP6919 AFTE14P-GPTP6919 AFTE14P-GP
1
TP6945 AFTE14P-GPTP6945 AFTE14P-GP
1
TP6906 AFTE14P-GPTP6906 AFTE14P-GP
12
R6908
10KR2F-2-GP
R6908
10KR2F-2-GP
1
TP6920 AFTE14P-GPTP6920 AFTE14P-GP
1
TP6942 AFTE14P-GPTP6942 AFTE14P-GP
1
TP6901 AFTE14P-GPTP6901 AFTE14P-GP
1
TP6939 AFTE14P-GPTP6939 AFTE14P-GP
1 2
C6903
SC4P50V2CN-GP
DY
C6903
SC4P50V2CN-GP
DY
1
TP6936 AFTE14P-GPTP6936 AFTE14P-GP
1
TP6905 AFTE14P-GPTP6905 AFTE14P-GP
1
TP6948 AFTE14P-GPTP6948 AFTE14P-GP
1
TP6933 AFTE14P-GPTP6933 AFTE14P-GP
1
2
3
4
5
6
7
8
9
10
11
12
TRP1
ACES-CON10-26-GP
20.K0585.010
TRP1
ACES-CON10-26-GP
20.K0585.010
1
TP6908 AFTE14P-GPTP6908 AFTE14P-GP
1
TP6921AFTE14P-GP TP6921AFTE14P-GP
![](asset-46.png)
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
BLANK
A4
70 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
BLANK
A4
70 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
BLANK
A4
70 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
BLANK
![](asset-47.png)
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
LPC_AD0
LPC_AD3
LPC_AD2
LPC_FRAME#_R
PLT_RST#_DEBUG
EXT_FWH# LPC_AD0_R
LPC_AD1_R
LPC_AD2_R
LPC_AD3_R
LPC_AD0_R
LPC_AD1_R
LPC_AD2_R
LPC_AD3_R
PLT_RST#
PLT_RST#_DEBUG
CLK_PCI_LPC
LPC_FRAME#_R
LPC_AD1
EXT_FWH#
PLT_RST#
3D3V_S0
5V_S0
3D3V_S0
PLT_RST#5,18,27,32,36,65,66,80,82,83
CLK_PCI_LPC18,65
LPC_FRAME#21,27,65
LPC_AD021,27,65 LPC_AD121,27,65 LPC_AD221,27,65 LPC_AD321,27,65
LPC_FRAME# 21,27,65
CLK_PCI_LPC 18,65
PLT_RST# 5,18,27,32,36,65,66,80,82,83
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
DEBUG CONN
A4
71 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
DEBUG CONN
A4
71 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
DEBUG CONN
A4
71 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
20.D0183.110
For EMI
(BOTTOM VIEW)
(14)
12
(25)(15)
13
2
TOP VIEW
....
....
1
(26)
Golden Finger for Debug Board
1 2
R7106
0R0402-PAD
R7106
0R0402-PAD
12
C7101
SCD1U10V2KX-5GP
C7101
SCD1U10V2KX-5GP
1 2
R7101 0R2J-2-GPR7101 0R2J-2-GP
1 2
R7102 0R2J-2-GPR7102 0R2J-2-GP
1 2
R7104 0R2J-2-GPR7104 0R2J-2-GP
1
2
3
4
5
6
7
8
9
10
11
12
DB1
MLX-CON10-7-GP
DY
DB1
MLX-CON10-7-GP
DY
1 2
R7105 0R2J-2-GPR7105 0R2J-2-GP
TP80 TPAD30TP80 TPAD30
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14 14
15 15
16 16
17 17
18 18
19 19
20 20
21 21
22 22
23 23
24 24
25 25
26 26
TOP BOTTOM
02 Do not mirror
GFDB1
GF-26P-GP-U1
ZZ.80648.026
TOP BOTTOM
02 Do not mirror
GFDB1
GF-26P-GP-U1
ZZ.80648.026
1 2
R7103 0R2J-2-GPR7103 0R2J-2-GP
![](asset-48.png)
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
BLANK
A4
72 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
BLANK
A4
72 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
BLANK
A4
72 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
BLANK
![](asset-49.png)
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
BLANK
A4
73 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
BLANK
A4
73 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
BLANK
A4
73 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
BLANK
![](asset-4a.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SD_D0
SD_D1
SD_D2
SD_D3
SD_CLK
SD_D0 SD_D1 SD_D2 SD_D3 SD_CLK
+3.3V_RUN_CARD
+3.3V_RUN_CARD
+3.3V_RUN_CARD
SD_D032
SD_D332
SD_WP 32
SD_CMD 32
SD_CLK 32
SD_D132 SD_D232
SD_DET# 32
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
CARD Reader CONN
A4
74 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
CARD Reader CONN
A4
74 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
CARD Reader CONN
A4
74 94
Tuesday, November 09, 2010
<Core Design>
+3.3V_RUN_CARD trace = 40mil
Please apply Shield GND for SD_CLK signal between
R5U220 and SD Card Slot to decrease external noise.
C7402 lose CDR1
Card Reader Connector
12
R7401
10KR2J-3-GP
DY
R7401
10KR2J-3-GP
DY
12
EC7402
SC12P50V2JN-3GP
DY
EC7402
SC12P50V2JN-3GP
DY
12
EC7401
SC12P50V2JN-3GP
DY
EC7401
SC12P50V2JN-3GP
DY
CD/DAT3
1
CMD 2
VSS 3
VDD
4
CLK 5
VSS 6
DAT0
7
DAT1
8
DAT2
9
CD 10
CD/WP/GND 11
WP 12
GND 13
EMPTY 14
NP1
NP1
NP2
NP2
CDR1
CARD-PUSH-14P-1-GP
20.I0078.011
CDR1
CARD-PUSH-14P-1-GP
20.I0078.011
12
C7403
SCD01U25V2KX-3GP
C7403
SCD01U25V2KX-3GP
12
EC7404
SC12P50V2JN-3GP
DY
EC7404
SC12P50V2JN-3GP
DY
12
EC7405
SC12P50V2JN-3GP
DY
EC7405
SC12P50V2JN-3GP
DY
12
C7402
SC47U6D3V5MX-1-GP
C7402
SC47U6D3V5MX-1-GP
12
EC7403
SC12P50V2JN-3GP
DY
EC7403
SC12P50V2JN-3GP
DY
![](asset-4b.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
New Card
A3
75 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
New Card
A3
75 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
New Card
A3
75 94
Tuesday, November 09, 2010
<Core Design>
SSID = ExpressCard
+1.5V_CARD Max. 650mA, Average 500mA.
+3.3V_CARD Max. 1300mA, Average 1000mA
+3.3V_CARDAUX Max. 275mA
![](asset-4c.png)
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
BLANK
A4
76 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
BLANK
A4
76 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
BLANK
A4
76 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
BLANK
![](asset-4d.png)
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
TPM
Custom
77 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
TPM
Custom
77 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
TPM
Custom
77 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
BLANK
![](asset-4e.png)
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
BLANK
A4
78 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
BLANK
A4
78 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB
BLANK
A4
78 94Tuesday, November 09, 2010
LLW-1 / LGG-1
<Core Design>
BLANK
![](asset-4f.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
GSENSE_X
GSENSE_Z_R
VCC3M_Q VCC3_ACC
GSENSE_X_R
GSENSE_Y_R
ANALOG_AGND
ANALOG_AGND
ANALOG_AGND
3D3V_S5
ANALOG_AGND
ANALOG_AGND
GSENSE_TST27
GSENSE_Z 27
GSENSE_Y 27
GSENSE_X 27
GSENSE_ON#27
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
G-Sensor
Custom
79 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
G-Sensor
Custom
79 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
G-Sensor
Custom
79 94
Tuesday, November 09, 2010
<Core Design>
G-Sensor
LIS34AL Layout Comment :
(1) Place C7904, C7905, Q7901, R7901, R7902,
C7901, C7902, R7903, R508 close to U7901.
(2) Avoid routing under DCDC switching area.
KXTC8-2850
No Accel
R7902
R7903
All other
NO_ASM
NO_ASM
ASM
ASM
ASM
ASM
ST
ROHM-KIONIX
LIS34ALTR-GP
KXTC8-2850-GP 74.KXTC8.0BZ
41R0828AA
N/A
74.00034.0BZ
Supplier Description Lenovo P/N Wistron P/N
84.00114.H1K
84.DT114.B11
NXP
ON
ROHM
Description Lenovo P/N Wistron P/N
N/A
N/A
84.09114.A11
DTA114EET1G
PDTA114EE
DRA9114E0L
84.00014.01H
Supplier
Panasonic
LTA014EEB
N/A
N/A
Table 79.1- Transistor multi-source
Table 79.2- Accelerometer multi-source
12
C7905
SCD1U10V2KX-5GP
C7905
SCD1U10V2KX-5GP
1 2
R7901 10R2J-2-GPR7901 10R2J-2-GP
12
R7904
0R0402-PAD-1-GP
R7904
0R0402-PAD-1-GP
ST
2
GND
3
GND
5
GND
6
GND
7
NC#1
1
NC#4
4
NC#9
9NC#16 16
NC#13 13
RES 15
VDD 14
VOUTZ 8
VOUTY 10
VOUTX 12
NC#11 11
U7901
LIS34ALTR-GP
U7901
LIS34ALTR-GP
12
R7902
100KR2J-1-GP
DY
R7902
100KR2J-1-GP
DY
1 2
R7906 56KR2J-L1-GPR7906 56KR2J-L1-GP
12
C7907
SCD1U10V2KX-5GP
C7907
SCD1U10V2KX-5GP
12
C7903
SCD1U10V2KX-5GP
DY
C7903
SCD1U10V2KX-5GP
DY
12
R7903
100KR2J-1-GP
R7903
100KR2J-1-GP
12
C7904
SCD1U10V2KX-5GP
C7904
SCD1U10V2KX-5GP
12
C7908
SCD1U10V2KX-5GP
C7908
SCD1U10V2KX-5GP
1 2
R7905 56KR2J-L1-GP
DY
R7905 56KR2J-L1-GP
DY
E
BC
R1
R2
Q7901
PDTA114EE-3-GP-U
R1
R2
Q7901
PDTA114EE-3-GP-U
12
C7906
SCD1U10V2KX-5GP
DY
C7906
SCD1U10V2KX-5GP
DY
12
C7901
SC10U6D3V5KX-1GP
C7901
SC10U6D3V5KX-1GP
12
C7902
SCD1U10V2KX-5GP
C7902
SCD1U10V2KX-5GP
1 2
R7907 56KR2J-L1-GPR7907 56KR2J-L1-GP
![](asset-50.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PROT_EEPROM
3D3V_S5
3D3V_S5
3D3V_S0
PLT_RST# 5,18,27,32,36,65,66,71,82,83
SMB_CLK 20,82
SMB_DATA 20,82
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
RFID
A4
80 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
RFID
A4
80 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
RFID
A4
80 94Tuesday, November 09, 2010
<Core Design>
RFID
LTC015EEB
N/A
N/A
72.BUL08.00Q
72.24S08.A0Q
ROHM
NXP
SANYO
Description Lenovo P/N Wistron P/N
Table 80.1- Transistor multi-source
84.00115.E1KNXP
ROHM
Description Lenovo P/N Wistron P/N
N/A
84.09115.A11
PDTC115TE
DRC9115T0L
84.00015.01H
Supplier
Panasonic
Table 80.2- EEPROM multi-source
N/A
N/A
54Y9016AA
PCA24S08ADP
BUL08-1FVJ-W
LE26CAP08TT-TLM-H 72.26C08.00R
Supplier
NC#1
1
NC#2
2
PROT#
3
GND
4SDA 5
SCL 6
WP 7
VDD 8
U8001
BUL08-1FVJ-W-GP
U8001
BUL08-1FVJ-W-GP
12
C8001
SCD01U16V2KX-3GP
C8001
SCD01U16V2KX-3GP
12
R8001
4K7R2J-2-GP
R8001
4K7R2J-2-GP
E
BC
R1
Q8001
PDTC115TE-GP
R1
Q8001
PDTC115TE-GP
![](asset-51.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
Reserved
A3
81 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
Reserved
A3
81 94Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
Reserved
A3
81 94Tuesday, November 09, 2010
<Core Design>
BLANK
![](asset-52.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
AC_IN_LED_N
AC_IN_LED_P
ACDC_ID2
AD_OFF
AC_IN_LED_P
AC_IN_LED_N
AD+
1D5V_S0
3D3V_S5
5V_S5
3D3V_S0
3D3V_AUX_S5
AD+3D3V_LAN_S5
3D3V_S0
PCIE_TXN8 20
PCIE_TXP8 20
PCIE_RXN8 20
PCIE_RXP8 20
SMB_DATA20,80 SMB_CLK20,80
PCIE_WAKE#19,65
CLK_PCIE_NEW 20
CLK_PCIE_NEW# 20
USB_PP13 18
USB_PN13 18
PCIE_CLK_NEW_RQ5#20
PM_SLP_S3#19,27,36,37,47 PM_SLP_S4#19,27,46
PLT_RST#5,18,27,32,36,65,66,71,80,83
USB_PN10 18
USB_PP10 18
USB_OC#10_11 18
USB_AO_SEL1 27
USB_AO_SEL0 27
USB_PWR_EN2 27
ACDC_ID2 27
AD_OFF 27
PCIE_TXN2 20
PCIE_TXP2 20
CLK_PCIE_LAN# 20
CLK_PCIE_LAN 20
PCIE_CLK_LAN_RQ0# 20
PCIE_WAKE# 19,65
PLT_RST# 5,18,27,32,36,65,66,71,80,83
LAN_XI 20
KBC_PWRBTN#27
PCIE_RXP2 20
PCIE_RXN2 20
AC_IN_LED 27
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
IO Board Connector
A3
82 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
IO Board Connector
A3
82 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
IO Board Connector
A3
82 94
Tuesday, November 09, 2010
<Core Design>
2A
650mA
1.3A
275mA
TO EXP BOARD CONN
TO DC BOARD CONN
TP2
TPAD30
TP2
TPAD30
21
3
R1
R2
Q8201
LTC043ZUB-FS8-GP
R1
R2
Q8201
LTC043ZUB-FS8-GP
1
TP8205 AFTE14P-GPTP8205 AFTE14P-GP
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
41
42
DCCN1
ACES-CONN40A-9-GP
20.F1844.040
DCCN1
ACES-CONN40A-9-GP
20.F1844.040
1
TP8201 AFTE14P-GPTP8201 AFTE14P-GP
12
R8201
330R2F-GP
R8201
330R2F-GP
1
TP8202 AFTE14P-GPTP8202 AFTE14P-GP
1
TP8203 AFTE14P-GPTP8203 AFTE14P-GP
11
33
55
77
99
11 11
13 13
15 15
17 17
19 19
21 21
23 23
25 25
27 27
29 29
31 31
33 33
35 35
37 37
39 39
41 41
43 43
45 45
47 47
49 49
51 51
2
2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
18
18
20
20
22
22
24
24
26
26
28
28
30
30
32
32
34
34
36
36
38
38
40
40
42
42
44
44
46
46
48
48
50
50
52
52
TOPBOTTOM
02 Do not mirror
GF1
GF-MINIPCI52P-GP
ZZ.00PAD.U71
TOPBOTTOM
02 Do not mirror
GF1
GF-MINIPCI52P-GP
ZZ.00PAD.U71
1
TP8204 AFTE14P-GPTP8204 AFTE14P-GP
![](asset-53.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PEG_RXN4
PEG_RXN5
PEG_RXP5
PEG_RXN6
PEG_RXN7
PEG_RXP7
PEG_RXP6
PEG_RXP4
PEG_TXP1
PEG_TXN1
PEG_TXP13
PEG_TXN13
PEG_TXP15
PEG_TXN15
PEG_TXP14
PEG_TXN14
PEG_TXP12
PEG_TXN12
PEG_RXN0
PEG_C_RXP5
PEG_C_RXN5
PEG_C_RXP7
PEG_C_RXN7
PEG_C_RXP6
PEG_C_RXN6
PEG_C_RXP4
PEG_C_RXN4
PEG_RXN12
PEG_RXN13
PEG_RXP13
PEG_RXN14
PEG_RXN15
PEG_RXP15
PEG_RXP14
PEG_RXP12
PEG_RXN8
PEG_RXN9
PEG_RXP9
PEG_RXN10
PEG_RXN11
PEG_RXP11
PEG_RXP10
PEG_RXP8
PEG_TXP3
PEG_TXN3
PEG_TXP2
PEG_TXN2
PCIE_CALRP
PEG_RXN1
PEG_RXP1
PWRGOOD
PEG_C_RXP9
PEG_C_RXN9
PEG_C_RXP11
PEG_C_RXN11
PEG_C_RXP10
PEG_C_RXN10
PEG_C_RXP8
PEG_C_RXN8
PEG_TXP0
PEG_TXP5
PEG_TXN5
PEG_TXP7
PEG_TXN7
PEG_TXP6
PEG_TXN6
PEG_TXP4
PEG_TXN4
PEG_RXN2
PEG_RXN3
PEG_RXP3
PEG_RXP2
PEG_C_RXP13
PEG_C_RXN13
PEG_C_RXP15
PEG_C_RXN15
PEG_C_RXP14
PEG_C_RXN14
PEG_C_RXP12
PEG_C_RXN12
PEG_TXN0
PEG_TXP9
PEG_TXN9
PEG_TXP11
PEG_TXN11
PEG_TXP10
PEG_TXN10
PEG_TXP8
PEG_TXN8
PEG_RXP0
PCIE_CALRN
PEG_C_RXP1
PEG_C_RXN1
PEG_C_RXP3
PEG_C_RXN3
PEG_C_RXP2
PEG_C_RXN2
PEG_C_RXP0
PEG_C_RXN0
VGA_RST#
1D8V_S0_VGA_PG_1
VGA_RST#
VGA_RST#
PLT_RST#
1V_VGA_S0
3D3V_VGA_S0
3D3V_VGA_S0 3D3V_VGA_S0
3D3V_VGA_S0
PEG_RXN[0..15] 4
PEG_RXP[0..15] 4
PEG_TXN[0..15]4
PEG_TXP[0..15]4
GPIO5_AC_BATT85
BIOS_ROM_EN85
TX_PWRS_ENB85
TX_DEEMPH_EN85
BIF_GEN2_EN_A85
GPIO8_ROMSO85
VGA_DIS85
CONFIG085
CONFIG185
CONFIG285
GPIO21_BB_EN85
CLK_PCIE_VGA20 CLK_PCIE_VGA#20
PLT_RST#5,18,27,32,36,65,66,71,80,82
JTAG_TCK_VGA20,85
JTAG_TMS_VGA85
TESTEN84
DGPU_HOLD_RST#18
1D8V_S0_VGA_PG93
1D5V_VGA_PWOK86
PCIE_RST#27,85
VGA_RST# 85
JTAG_TRST#_VGA85
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
GPU_PCIE/STRAPPING(1/5)
A3
83 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
GPU_PCIE/STRAPPING(1/5)
A3
83 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
GPU_PCIE/STRAPPING(1/5)
A3
83 94
Tuesday, November 09, 2010
<Core Design>
0
0
?
1
1
1
1
RESERVED
0
GPIO8_ROMSO
HSYNC XAUD[1]
X
ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
THEY MUST NOT CONFLICT DURING RESET
0:Disable external BIOS ROM device
1:Enable external BIOS ROM device
GPIO0 Transmitter Power Savings Enable
0: 50% Tx output swing 1: Full Tx output swing
TX_PWRS_ENB
GPIO1TX_DEEMPH_EN PCIE TRANSMITTER DE-EMPHASIS ENABLED
0:Tx de-emphasis disabled 1:Tx de-emphasis enabled
X XX
X
0GPIO9 0:VGA Controller capacity enabled
1:The device won't be recognized as the system's VGA controller
VGA_DIS
VIP_DEVICE_STRAP_EN
V2SYNC VIP Device Strap Enable indicates to the software driver that it sense
whether or not a VIP device is connected on the VIP Host interface.
RECOMMENDED SETTINGS
0= DO NOT INSTALL RESISTOR
1 = INSTALL 3K RESISTOR
X = DESIGN DEPENDANT
NA = NOT APPLICABLE
GPIO_22_ROMCSB
STRAPS
DESCRIPTION OF DEFAULT SETTINGS
PIN
GPIO[13:11]ROMIDCFG[2:0]
BIOS_ROM_EN=1, Config[2:0] defines the ROM type
BIOS_ROM_EN=0, Config[2:0] defines the primary memory aperture size
CONFIGURATION STRAPS
BIOS_ROM_EN
X
VSYNC XAUD[0]
H2SYNC 0
0:Advertises the PCIe device as 2.5GT/s capable at power on.
1:Advertises the PCIe device as 5.0GT/s capable at power on.
RSVD
GPIO21_BB_EN
GENERICC 0RSVD
GPIO8 RESERVED
PIN STRAPS
0
GPIO21 RESERVED
GPIO2BIF_GEN2_EN_A 0
RECOMMEND PLATFORM
SETTING
GPIO5GPIO5_AC_BATT optional input allow the system to request a fast
power reduction by setting GPIO5 to low. 0
0
0
0
0
0
0
0 0 1
(256MB)
X
RESERVED
AUD[1:0]:11-Audio for both DisplayPort and HDMI
NC
NC
pilot run
mode
NC
"0"(PD)
Debug
mode
Normal
mode
Signal
CLK
"1"(PU)TESTEN "1"(PU)
"0"(PD) "1"(PU)JTAG_TRST#
JTAG_TCK
JTAG_TMS
"1"(PU)
"1"(PU)"1"(PU)
JTAG SIGNAL OPTION
H
dGPU mode
IGPU
IGPU with BACO
PE_GPIO0
H
L
dGPU reset for PX/SG transitions
TESTEN Vancouver need to 5.1K ohm
Mannhatton need to 1K ohm
1 2
C8311 SCD1U6D3V1KX-GP
PX
C8311 SCD1U6D3V1KX-GP
PX
B
1
A
2
GND
3Y4
VCC 5
U8302
74LVC1G08GW-1-GP
2ND = 73.7SZ08.DAH
73.01G08.L04
PX
U8302
74LVC1G08GW-1-GP
2ND = 73.7SZ08.DAH
73.01G08.L04
PX
1 2
C8328 SCD1U6D3V1KX-GP
PX
C8328 SCD1U6D3V1KX-GP
PX
1 2
C8326 SCD1U6D3V1KX-GP
PX
C8326 SCD1U6D3V1KX-GP
PX
1 2
R8327 5K11R2F-L1-GP
PX
R8327 5K11R2F-L1-GP
PX
B
1
A
2
GND
3Y4
VCC 5
U8301
74LVC1G08GW-1-GP
2ND = 73.7SZ08.DAH
73.01G08.L04
PX
U8301
74LVC1G08GW-1-GP
2ND = 73.7SZ08.DAH
73.01G08.L04
PX
1 2
C8303 SCD1U6D3V1KX-GP
PX
C8303 SCD1U6D3V1KX-GP
PX
1 2
R8307 10KR2J-3-GP
DY
R8307 10KR2J-3-GP
DY
1 2
R8315 10KR2J-3-GP
DY
R8315 10KR2J-3-GP
DY
1 2
C8312 SCD1U6D3V1KX-GP
PX
C8312 SCD1U6D3V1KX-GP
PX
1 2
C8323 SCD1U6D3V1KX-GP
PX
C8323 SCD1U6D3V1KX-GP
PX
1 2
C8319 SCD1U6D3V1KX-GP
PX
C8319 SCD1U6D3V1KX-GP
PX
1 2
C8315 SCD1U6D3V1KX-GP
PX
C8315 SCD1U6D3V1KX-GP
PX
1 2
R8324 10KR2J-3-GP
PX
R8324 10KR2J-3-GP
PX
1 2
C8309 SCD1U6D3V1KX-GP
PX
C8309 SCD1U6D3V1KX-GP
PX
1 2
R8301 3KR2J-2-GP
PX
R8301 3KR2J-2-GP
PX
1 2
R8303 10KR2J-3-GP
PX
R8303 10KR2J-3-GP
PX
1 2
C8320 SCD1U6D3V1KX-GP
PX
C8320 SCD1U6D3V1KX-GP
PX
1 2
R8323 10KR2J-3-GP
DY
R8323 10KR2J-3-GP
DY
1 2
C8329 SCD1U6D3V1KX-GP
PX
C8329 SCD1U6D3V1KX-GP
PX
1 2
R8313 10KR2J-3-GP
DY
R8313 10KR2J-3-GP
DY
1 2
R8308 10KR2J-3-GP
DY
R8308 10KR2J-3-GP
DY
1 2
C8304 SCD1U6D3V1KX-GP
PX
C8304 SCD1U6D3V1KX-GP
PX
1 2
C8302 SCD1U6D3V1KX-GP
PX
C8302 SCD1U6D3V1KX-GP
PX
1 2
R8306 10KR2J-3-GP
PX
R8306 10KR2J-3-GP
PX
1 2
R8322 10KR2J-3-GP
PX
R8322 10KR2J-3-GP
PX
1 2
R8316 1K27R2F-L-GP
PX
R8316 1K27R2F-L-GP
PX
1 2
C8324 SCD1U6D3V1KX-GP
PX
C8324 SCD1U6D3V1KX-GP
PX
1 2
C8316 SCD1U6D3V1KX-GP
PX
C8316 SCD1U6D3V1KX-GP
PX
1 2
C8330 SCD1U6D3V1KX-GP
PX
C8330 SCD1U6D3V1KX-GP
PX
1 2
C8310 SCD1U6D3V1KX-GP
PX
C8310 SCD1U6D3V1KX-GP
PX
12
R8326 10KR2J-3-GP
DY
R8326 10KR2J-3-GP
DY
1 2
R8321 0R2J-2-GP
DY
R8321 0R2J-2-GP
DY
1 2
R8317 10KR2F-2-GP
PX
R8317 10KR2F-2-GP
PX
1 2
R8318 2KR2F-3-GP
PX
R8318 2KR2F-3-GP
PX
1 2
R8305 10KR2J-3-GP
DY
R8305 10KR2J-3-GP
DY
1 2
C8321 SCD1U6D3V1KX-GP
PX
C8321 SCD1U6D3V1KX-GP
PX
1 2
C8313 SCD1U6D3V1KX-GP
PX
C8313 SCD1U6D3V1KX-GP
PX
NC#AJ21
AJ21
NC#AK21
AK21
PWRGOOD
AH16 PCIE_CALRN Y29
PCIE_CALRP Y30
PCIE_REFCLKN
AA36 PCIE_REFCLKP
AB35
PCIE_RX0N
Y37 PCIE_RX0P
AA38
PCIE_RX10N
K37 PCIE_RX10P
L38
PCIE_RX11N
J36 PCIE_RX11P
K35
PCIE_RX12N
H37 PCIE_RX12P
J38
PCIE_RX13N
G36 PCIE_RX13P
H35
PCIE_RX14N
F37 PCIE_RX14P
G38
PCIE_RX15N
E37 PCIE_RX15P
F35
PCIE_RX1N
W36 PCIE_RX1P
Y35
PCIE_RX2N
V37 PCIE_RX2P
W38
PCIE_RX3N
U36 PCIE_RX3P
V35
PCIE_RX4N
T37 PCIE_RX4P
U38
PCIE_RX5N
R36 PCIE_RX5P
T35
PCIE_RX6N
P37 PCIE_RX6P
R38
PCIE_RX7N
N36 PCIE_RX7P
P35
PCIE_RX8N
M37 PCIE_RX8P
N38
PCIE_RX9N
L36 PCIE_RX9P
M35
PERST#
AA30
PCIE_TX0N Y32
PCIE_TX0P Y33
PCIE_TX10N L32
PCIE_TX10P L33
PCIE_TX11N L29
PCIE_TX11P L30
PCIE_TX12N K32
PCIE_TX12P K33
PCIE_TX13N J32
PCIE_TX13P J33
PCIE_TX14N K29
PCIE_TX14P K30
PCIE_TX15N H32
PCIE_TX15P H33
PCIE_TX1N W32
PCIE_TX1P W33
PCIE_TX2N U32
PCIE_TX2P U33
PCIE_TX3N U29
PCIE_TX3P U30
PCIE_TX4N T32
PCIE_TX4P T33
PCIE_TX5N T29
PCIE_TX5P T30
PCIE_TX6N P32
PCIE_TX6P P33
PCIE_TX7N P29
PCIE_TX7P P30
PCIE_TX8N N32
PCIE_TX8P N33
PCIE_TX9N N29
PCIE_TX9P N30
PCI EXPRESS INTERFACE
CLOCK
CALIBRATION
1 OF 8
VGA1A
MADISON-PRO-2-GP
PX
PCI EXPRESS INTERFACE
CLOCK
CALIBRATION
1 OF 8
VGA1A
MADISON-PRO-2-GP
PX
12
C8333
SC47P50V2JN-3GP
DY
C8333
SC47P50V2JN-3GP
DY
1 2
C8301 SCD1U6D3V1KX-GP
PX
C8301 SCD1U6D3V1KX-GP
PX
1 2
C8307 SCD1U6D3V1KX-GP
PX
C8307 SCD1U6D3V1KX-GP
PX
1 2
C8305 SCD1U6D3V1KX-GP
PX
C8305 SCD1U6D3V1KX-GP
PX
1 2
R8302 3KR2J-2-GP
PX
R8302 3KR2J-2-GP
PX
12
R8319 0R2J-2-GP
DY
R8319 0R2J-2-GP
DY
12
C8334
SCD1U10V2KX-5GP
DY
C8334
SCD1U10V2KX-5GP
DY
1 2
C8331 SCD1U6D3V1KX-GP
PX
C8331 SCD1U6D3V1KX-GP
PX
1 2
C8327 SCD1U6D3V1KX-GP
PX
C8327 SCD1U6D3V1KX-GP
PX
1 2
C8325 SCD1U6D3V1KX-GP
PX
C8325 SCD1U6D3V1KX-GP
PX
1 2
C8317 SCD1U6D3V1KX-GP
PX
C8317 SCD1U6D3V1KX-GP
PX
12
R8325 0R2J-2-GP
PX
R8325 0R2J-2-GP
PX
1 2
R8314 10KR2J-3-GP
DY
R8314 10KR2J-3-GP
DY
1 2
R8304 10KR2J-3-GP
DY
R8304 10KR2J-3-GP
DY
1 2
C8314 SCD1U6D3V1KX-GP
PX
C8314 SCD1U6D3V1KX-GP
PX
1 2
C8332 SCD1U6D3V1KX-GP
PX
C8332 SCD1U6D3V1KX-GP
PX
1 2
C8322 SCD1U6D3V1KX-GP
PX
C8322 SCD1U6D3V1KX-GP
PX
1 2
C8318 SCD1U6D3V1KX-GP
PX
C8318 SCD1U6D3V1KX-GP
PX
1 2
R8320
0R2J-2-GP
DY
R8320
0R2J-2-GP
DY
1 2
C8308 SCD1U6D3V1KX-GP
PX
C8308 SCD1U6D3V1KX-GP
PX
1 2
C8306 SCD1U6D3V1KX-GP
PX
C8306 SCD1U6D3V1KX-GP
PX
![](asset-54.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MDB50
MDB59
MDB16
MDB47
MDB22
MDB24
MDB40
MDB18
MDB11
MDB7
MDB30
MDB46
MDB55
MDB58
MDB1
MDB53
MDB26
MDB14
MDB49
MDB52
MDB45
MDB21
MDB43
MDB23
MDB3
MDB5
MDB15
MDB25
MDB60
MDB61
MDB41
MDB4
MDB56
MDB57
MDB13
MDB2
MDB6
MDB44
MDB33
MDB54
MDB32
MDB20
MDB27
MDB36
MDB10
MDB51
MDB19
MDB38
MDB9
MDB48
MDB12
MDB34
MDB28
MDB62
MDB8
MDB37
MDB63
MDB31
MDB35
MDB29
MDB0
MDB42
MDB17
MDB39
MEM_CALRN1
CLKTESTB
MEM_CALRN2
MDA12
MDA45
MDA28
MDA11
MDA52
MDA30
MDA34
MDA38
MDA40
MDA35
MDA31
MDA51
MDA47
MDA57
MDA54
MDA0
MDA59
MDA25
MDA1
MDA55
MDA44
MDA15
MDA49
MDA36
MDA37
MDA21
MDA18
MDA4
MDA23
MDA48
MDA20
MDA46
MDA9
MDA27
MDA13
MDA61
MDA53
MDA8
MDA62
MDA29
MDA22
MDA5
MDA41
MDA39
MVREFDB
MDA24
MDA19
MDA14
MDA50
MDA42
MDA17
MDA60
MDA56
MDA33
MDA26
MDA2
MDA43
MDA58
MDA6
MDA3
MDA7
MDA10
MDA16
MDA32
MDA63
CLKTESTA
MVREFSAMVREFDA
MEM_CALRP1
MVREFSB
MEM_CALRN1
MEM_CALRN2
MEM_CALRP1
MEM_CALRP0
MEM_CALRN0
MEM_CALRP2
MVREFDA
MEM_CALRP0
MEM_CALRN0
MVREFSA
MEM_CALRP2
MVREFDB MVREFSB
DRAM_RST
1D5V_VGA_S01D5V_VGA_S01D5V_VGA_S01D5V_VGA_S0
1D5V_VGA_S0
1D5V_VGA_S0
ODTB1 91
ODTB0 90
ODTA1 89
ODTA0 88
MDA[32..63]89
MDA[0..31]88 MDB[0..31]90
MDB[32..63]91
A_BA2 88,89
A_BA0 88,89
A_BA1 88,89
B_BA2 90,91
B_BA0 90,91
B_BA1 90,91
DQMA0 88
DQMA1 88
DQMA2 88
DQMA3 88
DQMA4 89
DQMA5 89
DQMA6 89
DQMA7 89
DQMB0 90
DQMB1 90
DQMB2 90
DQMB3 90
DQMB4 91
DQMB5 91
DQMB6 91
DQMB7 91
QSAP_0 88
QSAN_0 88
QSAP_1 88
QSAN_1 88
QSAP_2 88
QSAN_2 88
QSAN_3 88
QSAP_3 88
QSAN_4 89
QSAP_4 89
QSAP_5 89
QSAN_5 89
QSAP_6 89
QSAN_6 89
QSAN_7 89
QSAP_7 89
QSBP_0 90
QSBN_0 90
QSBP_1 90
QSBN_1 90
QSBP_2 90
QSBN_2 90
QSBP_3 90
QSBN_3 90
QSBP_4 91
QSBN_4 91
QSBP_5 91
QSBN_5 91
QSBP_6 91
QSBN_6 91
QSBP_7 91
QSBN_7 91
CLKA0# 88
CLKA0 88
CLKA1 89
CLKA1# 89
RASA0# 88
RASA1# 89
CASA1# 89
CASA0# 88
CSA0#_0 88
CSA1#_0 89
CKEA0 88
CKEA1 89
WEA1# 89
WEA0# 88
CKEB0 90
CKEB1 91
CASB1# 91
CASB0# 90
CLKB0# 90
CLKB0 90
WEB1# 91
WEB0# 90
CSB0#_0 90
CLKB1 91
CLKB1# 91
CSB1#_0 91
RASB0# 90
RASB1# 91
MAA0 88,89
MAA1 88,89
MAA2 88,89
MAA3 88,89
MAA4 88,89
MAA5 88,89
MAA6 88,89
MAA7 88,89
MAA8 88,89
MAA9 88,89
MAA10 88,89
MAA11 88,89
MAA12 88,89
MAA13 88,89
MAB0 90,91
MAB1 90,91
MAB2 90,91
MAB3 90,91
MAB4 90,91
MAB5 90,91
MAB6 90,91
MAB7 90,91
MAB8 90,91
MAB9 90,91
MAB10 90,91
MAB11 90,91
MAB12 90,91
TESTEN83
MEM_RST 88,89,90,91
MAB13 90,91
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
GPU Memory(2/5)
Custom
84 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
GPU Memory(2/5)
Custom
84 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
GPU Memory(2/5)
Custom
84 94
Tuesday, November 09, 2010
<Core Design>
**
This basic topology should be used for DRAM_RST for
DDR3/GDDR3/GDDR5.These Capacitors and Resistor values
are an example only. The Series R and || Cap values
will depend on the DRAM load and will have to be
calculated for different Memory ,DRAM Load and board
to pass Reset Signal Spec.
DDR3/GDDR3 Memory Stuff Option(Mad/Park)
GDDR3
1.8V/1.5V
Rb
Ra
Ra Ra
Ra Ra
Rb Rb RbRb
40.2R
MVDDQ
GDDR5
100R
1.5V
DDR3
40.2R
100R
1.5V
100R
40.2R
PLACE MVREF DIVIDERS AND CAPS CLOSE TO ASIC
DDR3/GDDR3 Memory Stuff Option(M92/M96)
GDDR3
1.8V/1.5V
Rb
Ra
MVDDQ
40.2R
100R
1.5V
DDR3
100R
100R
Madison: MEM_CALRP[0,2] signals are used.
Park: MEM_CALRP1 and MEM_CALRN1 are used
Mannhatton
Vancouver
1 2
R8408 243R2F-2-GP
PX
R8408 243R2F-2-GP
PX
DQA0_0/DQA_0
C37
DQA0_1/DQA_1
C35
DQA0_10/DQA_10
C30
DQA0_11/DQA_11
A30
DQA0_12/DQA_12
F28
DQA0_13/DQA_13
C28
DQA0_14/DQA_14
A28
DQA0_15/DQA_15
E28
DQA0_16/DQA_16
D27
DQA0_17/DQA_17
F26
DQA0_18/DQA_18
C26
DQA0_19/DQA_19
A26
DQA0_2/DQA_2
A35
DQA0_20/DQA_20
F24
DQA0_21/DQA_21
C24
DQA0_22/DQA_22
A24
DQA0_23/DQA_23
E24
DQA0_24/DQA_24
C22
DQA0_25/DQA_25
A22
DQA0_26/DQA_26
F22
DQA0_27/DQA_27
D21
DQA0_28/DQA_28
A20
DQA0_29/DQA_29
F20
DQA0_3/DQA_3
E34
DQA0_30/DQA_30
D19
DQA0_31/DQA_31
E18
DQA1_0/DQA_32
C18
DQA1_1/DQA_33
A18
DQA1_2/DQA_34
F18
DQA1_3/DQA_35
D17
DQA1_4/DQA_36
A16
DQA1_5/DQA_37
F16
DQA1_6/DQA_38
D15
DQA1_7/DQA_39
E14
DQA0_4/DQA_4
G32
DQA1_8/DQA_40
F14
DQA1_9/DQA_41
D13
DQA1_10/DQA_42
F12
DQA1_11/DQA_43
A12
DQA1_12/DQA_44
D11
DQA1_13/DQA_45
F10
DQA1_14/DQA_46
A10
DQA1_15/DQA_47
C10
DQA1_16/DQA_48
G13
DQA1_17/DQA_49
H13
DQA0_5/DQA_5
D33
DQA1_18/DQA_50
J13
DQA1_19/DQA_51
H11
DQA1_20/DQA_52
G10
DQA1_21/DQA_53
G8
DQA1_22/DQA_54
K9
DQA1_23/DQA_55
K10
DQA1_24/DQA_56
G9
DQA1_25/DQA_57
A8
DQA1_26/DQA_58
C8
DQA1_27/DQA_59
E8
DQA0_6/DQA_6
F32
DQA1_28/DQA_60
A6
DQA1_29/DQA_61
C6
DQA1_30/DQA_62
E6
DQA1_31/DQA_63
A5
DQA0_7/DQA_7
E32
DQA0_8/DQA_8
D31
DQA0_9/DQA_9
F30
MEM_CALRP1
M12
MVREFDA
L18
MVREFSA
L20
MEM_CALRN0
L27
MEM_CALRN1
N12
MEM_CALRN2
AG12
MEM_CALRP0
M27
MEM_CALRP2
AH12
CASA0# K20
CASA1# K17
CKEA0 K21
CKEA1 J20
CLKA0 H27
CLKA0# G27
CLKA1 J14
CLKA1# H14
CSA0#_0 K24
CSA0#_1 K27
CSA1#_0 M13
CSA1#_1 K16
WCKA0_0/DQMA_0 A32
WCKA0#_0/DQMA_1 C32
WCKA0_1/DQMA_2 D23
WCKA0#_1/DQMA_3 E22
WCKA1_0/DQMA_4 C14
WCKA1#_0/DQMA_5 A14
WCKA1_1/DQMA_6 E10
WCKA1#_1/DQMA_7 D9
MAA0_0/MAA_0 G24
MAA0_1/MAA_1 J23
MAA1_2/MAA_10 L13
MAA1_3/MAA_11 G16
MAA1_4/MAA_12 J16
MAA1_5/MAA_13_BA2 H16
MAA1_6/MAA_14_BA0 J17
MAA1_7/MAA_A15_BA1 H17
MAA0_2/MAA_2 H24
MAA0_3/MAA_3 J24
MAA0_4/MAA_4 H26
MAA0_5/MAA_5 J26
MAA0_6/MAA_6 H21
MAA0_7/MAA_7 G21
MAA1_0/MAA_8 H19
MAA1_1/MAA_9 H20
ADBIA0/ODTA0 J21
ADBIA1/ODTA1 G19
RASA0# K23
RASA1# K19
EDCA0_0/QSA_0/RDQSA_0 C34
EDCA0_1/QSA_1/RDQSA_1 D29
EDCA0_2/QSA_2/RDQSA_2 D25
EDCA0_3/QSA_3/RDQSA_3 E20
EDCA1_0/QSA_4/RDQSA_4 E16
EDCA1_1/QSA_5/RDQSA_5 E12
EDCA1_2/QSA_6/RDQSA_6 J10
EDCA1_3/QSA_7/RDQSA_7 D7
MAA0_8 H23
MAA1_8 J19
DDBIA0_0/QSA_0#/WDQSA_0 A34
DDBIA0_1/QSA_1#/WDQSA_1 E30
DDBIA0_2/QSA_2#/WDQSA_2 E26
DDBIA0_3/QSA_3#/WDQSA_3 C20
DDBIA1_0/QSA_4#/WDQSA_4 C16
DDBIA1_1/QSA_5#/WDQSA_5 C12
DDBIA1_2/QSA_6#/WDQSA_6 J11
DDBIA1_3/QSA_7#/WDQSA_7 F8
WEA0# K26
WEA1# L15
MEMORY INTERFACE A
DDR2
GDDR3/GDDR5
DDR3
GDDR5/DDR2/GDDR3
DDR2
GDDR5/GDDR3
DDR3
GDDR5
3 OF 8
VGA1C
MADISON-PRO-2-GP
PX
MEMORY INTERFACE A
DDR2
GDDR3/GDDR5
DDR3
GDDR5/DDR2/GDDR3
DDR2
GDDR5/GDDR3
DDR3
GDDR5
3 OF 8
VGA1C
MADISON-PRO-2-GP
PX
1 2
R8402 51R2J-2-GP
PX
R8402 51R2J-2-GP
PX
12
R8413
40D2R2F-GP
PX
R8413
40D2R2F-GP
PX
12
R8420
5K1R2J-4-GP
PX
R8420
5K1R2J-4-GP
PX
DQB0_0/DQB_0
C5
DQB0_1/DQB_1
C3
DQB0_10/DQB_10
J4
DQB0_11/DQB_11
K6
DQB0_12/DQB_12
K5
DQB0_13/DQB_13
L4
DQB0_14/DQB_14
M6
DQB0_15/DQB_15
M1
DQB0_16/DQB_16
M3
DQB0_17/DQB_17
M5
DQB0_18/DQB_18
N4
DQB0_19/DQB_19
P6
DQB0_2/DQB_2
E3
DQB0_20/DQB_20
P5
DQB0_21/DQB_21
R4
DQB0_22/DQB_22
T6
DQB0_23/DQB_23
T1
DQB0_24/DQB_24
U4
DQB0_25/DQB_25
V6
DQB0_26/DQB_26
V1
DQB0_27/DQB_27
V3
DQB0_28/DQB_28
Y6
DQB0_29/DQB_29
Y1
DQB0_3/DQB_3
E1
DQB0_30/DQB_30
Y3
DQB0_31/DQB_31
Y5
DQB1_0/DQB_32
AA4
DQB1_1/DQB_33
AB6
DQB1_2/DQB_34
AB1
DQB1_3/DQB_35
AB3
DQB1_4/DQB_36
AD6
DQB1_5/DQB_37
AD1
DQB1_6/DQB_38
AD3
DQB1_7/DQB_39
AD5
DQB0_4/DQB_4
F1
DQB1_8/DQB_40
AF1
DQB1_9/DQB_41
AF3
DQB1_10/DQB_42
AF6
DQB1_11/DQB_43
AG4
DQB1_12/DQB_44
AH5
DQB1_13/DQB_45
AH6
DQB1_14/DQB_46
AJ4
DQB1_15/DQB_47
AK3
DQB1_16/DQB_48
AF8
DQB1_17/DQB_49
AF9
DQB0_5/DQB_5
F3
DQB1_18/DQB_50
AG8
DQB1_19/DQB_51
AG7
DQB1_20/DQB_52
AK9
DQB1_21/DQB_53
AL7
DQB1_22/DQB_54
AM8
DQB1_23/DQB_55
AM7
DQB1_24/DQB_56
AK1
DQB1_25/DQB_57
AL4
DQB1_26/DQB_58
AM6
DQB1_27/DQB_59
AM1
DQB0_6/DQB_6
F5
DQB1_28/DQB_60
AN4
DQB1_29/DQB_61
AP3
DQB1_30/DQB_62
AP1
DQB1_31/DQB_63
AP5
DQB0_7/DQB_7
G4
DQB0_8/DQB_8
H5
DQB0_9/DQB_9
H6
MVREFDB
Y12
MVREFSB
AA12
TESTEN
AD28
CASB0# W10
CASB1# AA10
CKEB0 U10
CKEB1 AA11
CLKB0 L9
CLKB0# L8
CLKB1 AD8
CLKB1# AD7
CLKTESTA
AK10
CLKTESTB
AL10
CSB0#_0 P10
CSB0#_1 L10
CSB1#_0 AD10
CSB1#_1 AC10
WCKB0_0/DQMB_0 H3
WCKB0#_0/DQMB_1 H1
WCKB0_1/DQMB_2 T3
WCKB0#_1/DQMB_3 T5
WCKB1_0/DQMB_4 AE4
WCKB1#_0/DQMB_5 AF5
WCKB1_1/DQMB_6 AK6
WCKB1#_1/DQMB_7 AK5
DRAM_RST# AH11
MAB0_0/MAB_0 P8
MAB0_1/MAB_1 T9
MAB1_2/MAB_10 AC8
MAB1_3/MAB_11 AC9
MAB1_4/MAB_12 AA7
MAB1_5/BA2 AA8
MAB1_6/BA0 Y8
MAB1_7/BA1 AA9
MAB0_2/MAB_2 P9
MAB0_3/MAB_3 N7
MAB0_4/MAB_4 N8
MAB0_5/MAB_5 N9
MAB0_6/MAB_6 U9
MAB0_7/MAB_7 U8
MAB1_0/MAB_8 Y9
MAB1_1/MAB_9 W9
ADBIB0/ODTB0 T7
ADBIB1/ODTB1 W7
RASB0# T10
RASB1# Y10
EDCB0_0/QSB_0/RDQSB_0 F6
EDCB0_1/QSB_1/RDQSB_1 K3
EDCB0_2/QSB_2/RDQSB_2 P3
EDCB0_3/QSB_3/RDQSB_3 V5
EDCB1_0/QSB_4/RDQSB_4 AB5
EDCB1_1/QSB_5/RDQSB_5 AH1
EDCB1_2/QSB_6/RDQSB_6 AJ9
EDCB1_3/QSB_7/RDQSB_7 AM5
DDBIB0_0/QSB_0#/WDQSB_0 G7
DDBIB0_1/QSB_1#/WDQSB_1 K1
DDBIB0_2/QSB_2#/WDQSB_2 P1
DDBIB0_3/QSB_3#/WDQSB_3 W4
DDBIB1_0/QSB_4#/WDQSB_4 AC4
DDBIB1_1/QSB_5#/WDQSB_5 AH3
DDBIB1_2/QSB_6#/WDQSB_6 AJ8
DDBIB1_3/QSB_7#/WDQSB_7 AM3
WEB0# N10
WEB1# AB11
MAB0_8 T8
MAB1_8 W8
MEMORY INTERFACE B
DDR2
GDDR5/GDDR3
DDR3
DDR2
GDDR3/GDDR5
DDR3
GDDR5
GDDR5/DDR2/GDDR3
4 OF 8
VGA1D
MADISON-PRO-2-GP
PX
MEMORY INTERFACE B
DDR2
GDDR5/GDDR3
DDR3
DDR2
GDDR3/GDDR5
DDR3
GDDR5
GDDR5/DDR2/GDDR3
4 OF 8
VGA1D
MADISON-PRO-2-GP
PX
12
R8401
2K2R2J-2-GP
DY
R8401
2K2R2J-2-GP
DY
12
C8401
SC120P50V2JN-1GP
PX
C8401
SC120P50V2JN-1GP
PX
12
C8402
SCD1U10V2KX-5GP
PX
C8402
SCD1U10V2KX-5GP
PX
1
23
4
RN8401
SRN4K7J-8-GP
DY
RN8401
SRN4K7J-8-GP
DY
12
R8417
100R2F-L1-GP-U
PX
R8417
100R2F-L1-GP-U
PX
12
R8410
40D2R2F-GP
PX
R8410
40D2R2F-GP
PX
12
R8416
100R2F-L1-GP-U
PX
R8416
100R2F-L1-GP-U
PX
1 2
R8409 243R2F-2-GP
PX
R8409 243R2F-2-GP
PX
1 2
R8406 243R2F-2-GP
PX
R8406 243R2F-2-GP
PX
12
C8405
SCD1U10V2KX-5GP
PX
C8405
SCD1U10V2KX-5GP
PX
12
R8411
40D2R2F-GP
PX
R8411
40D2R2F-GP
PX
12
R8412
40D2R2F-GP
PX
R8412
40D2R2F-GP
PX
1 2
R8405 243R2F-2-GP
PX
R8405 243R2F-2-GP
PX
12
C8403
SCD1U10V2KX-5GP
PX
C8403
SCD1U10V2KX-5GP
PX
1 2
R8407 243R2F-2-GP
PX
R8407 243R2F-2-GP
PX
1 2
R8418 10R2J-2-GP
PX
R8418 10R2J-2-GP
PX
12
R8415
100R2F-L1-GP-U
PX
R8415
100R2F-L1-GP-U
PX
1 2
R8403 243R2F-2-GP
PX
R8403 243R2F-2-GP
PX
12
R8414
100R2F-L1-GP-U
PX
R8414
100R2F-L1-GP-U
PX
1 2
R8419
0R2J-2-GP
DY
R8419
0R2J-2-GP
DY
12
C8404
SCD1U10V2KX-5GP
PX
C8404
SCD1U10V2KX-5GP
PX
![](asset-55.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MEM_ID1
MEM_ID2
GPIO17_VGA
GPIO_VGA_04_CLK
XTALIN
GPIO_VGA_03_DATA
GENERICC
VGA_CRT_BLUE
GENERICG
VGA_CRT_GREEN
GPIO16_SSIN
VPIO14_VGA
GPIO17_VGA
GPIO18_VGA
GPU_RSET
GENERICD
XTALIN
VGA_LCDVDD_EN
VGA_LBKLT_CTL
XTALOUT
GPU_VREFG
THERMTRIP_VGA
GENERICE_HPD4
HDMI_HPD_GPU
VGA_TS_FDO
R2SET
VGA_CRT_GREEN
JTAG_TDI_VGA
JTAG_TDO_VGA
VGA_CRT_RED
GENERICF
VGA_DMINUS
VGA_CRT_RED
VGA_CRT_BLUE
VGA_DPLUS
XTALOUT
XO_IN
MEM_ID3
XTALIN
Q5801_2
THERMTRIP_R
THERMTRIP_VGA
VGA_CRT_HSYNC
VGA_CRT_VSYNC
VGA_CRT_DDCCLK
VGA_CRT_DDCDATA
MEM_ID0
A2VDD
1D8V_VGA_S0
AVSSQ
1D8V_VGA_S0
1D8V_VGA_S0
1D8V_VGA_S0
TSVDD
DPLL_VDDC
1D8V_VGA_S0
DPLL_PVDD
1V_VGA_S0
DPLL_PVDD
AVDD
VDD1DI
3D3V_VGA_S0
AVDD
VDD1DI
VDD2DI
A2VDDQ
A2VDD
A2VDDQ
VDD2DI
AVSSQ
3D3V_VGA_S0
AVSSQ
GPIO21_BB_EN83
GPIO5_AC_BATT83
TX_PW RS_ENB83
BIOS_ROM_EN83
VGA_DIS83GPIO8_ROMSO83
BIF_GEN2_EN_A83 TX_DEEMPH_EN83
CONFIG283 CONFIG183 CONFIG083
PWRCNTL_092
PWRCNTL_192
PEG_CLKREQ#20 JTAG_TRST#_VGA83
JTAG_TCK_VGA20,83 JTAG_TMS_VGA83
JTAG_TCK_VGA20,83 SMBD_THERM27,28 SMBC_THERM27,28
H_THERMTRIP# 5,22,36
VGA_RST#83
PCIE_RST#27,83
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
GPU_DP/LVDS/CRT/GPIO(3/5)
A2
85 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
GPU_DP/LVDS/CRT/GPIO(3/5)
A2
85 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
GPU_DP/LVDS/CRT/GPIO(3/5)
A2
85 94
Tuesday, November 09, 2010
<Core Design>
DVPDATA [3:0]
0111 2Gbit Hynix-H5TQ2G63BFR-12C (800MHz) (Whistler-LP 2G / Seymour-XT 1G)
1111 2Gbit Samsung-K4W2G1646C-HC12 (800MHz) (Whistler-LP 2G / Seymour-XT 1G)
0011 1Gbit Hynix-H5TQ1G63BFR-12C (800MHz) (Whistler-LP 1G)
1011 1Gbit Samsung-K4W1G1646E-HC12 (800MHz) (Whistler-LP 1G)
DVPDATA [3:2:1:0] for VRAM type
selection H/W strap
Should provide VRAM Table for VBios request
(1.1V@150mA DPLL_VDDC For M96/M92)
PLACE VREFG DIVIDER AND CAP CLOSE TO ASIC
(1.8V@1.5mA A2VDDQ)
(1.8V@65mA AVDD)
(1.8V@100mA VDD1DI)
(1.8V@50mA VDD2DI)
+3.3V tolerant
(3.3V@130mA A2VDD)
DDC1/DDC2/DDC6 have 5V-tolerant
Clock Input Configuraiton -GDDR3/DDR3
a) 27MHz crystal connected to XTALIN or XTALOUT or
b) 27MHz (1.8V) oscillator connected to XTALIN or
c) 27MHz (3.3V) oscillator connected to XO_IN (Park, Madison, and Broadway only)
LVDS Interface
(1.8V@20mA TSVDD)
(1.0V@125mA DPLL_VDDC)
(1.8V@75mA DPLL_PVDD)
Voltage Swing:1.8V
12
R8518
10KR2J-3-GP
Hynix
R8518
10KR2J-3-GP
Hynix
12
C8513
SCD1U10V2KX-5GP
DY
C8513
SCD1U10V2KX-5GP
DY
1 2
R8521
124R2F-U-GP
DY
R8521
124R2F-U-GP
DY
1
TP8514TP8514
1 2
R8506
0R0402-PAD
R8506
0R0402-PAD
1
TP8529TP8529
1
TP8523TP8523
1 2
R8525 0R2J-2-GP
RBS
R8525 0R2J-2-GP
RBS
1
TP8515TP8515
12
C8503
SCD1U10V2KX-5GP
PX
C8503
SCD1U10V2KX-5GP
PX
12
R8519
150R2F-1-GP
DY
R8519
150R2F-1-GP
DY
12
R8516
249R2F-GP
PX
R8516
249R2F-GP
PX
12
R8510
10KR2J-3-GP
DY
R8510
10KR2J-3-GP
DY
1 2
R8504 10MR2J-L-GP
PX
R8504 10MR2J-L-GP
PX
12
C8514
SCD1U10V2KX-5GP
PX
C8514
SCD1U10V2KX-5GP
PX
1
TP8513TP8513
1
TP8516 TPAD14-GPTP8516 TPAD14-GP
12
C8519
SCD1U10V2KX-5GP
PX
C8519
SCD1U10V2KX-5GP
PX
1
TP8517TP8517
1
TP8524TP8524
12
C8521
SC1U6D3V2KX-GP
PX
C8521
SC1U6D3V2KX-GP
PX
1 2
L8506
BLM18PG471SN1D-GP
PX
L8506
BLM18PG471SN1D-GP
PX
1 2
X8501
XTAL-27MHZ-65-GP-U
PX
X8501
XTAL-27MHZ-65-GP-U
PX
12
R8512
10KR2J-3-GP
VRAM_1G
R8512
10KR2J-3-GP
VRAM_1G
1 2
R8517
715R2F-GP
RBS
R8517
715R2F-GP
RBS
12
C8522
SCD1U10V2KX-5GP
PX
C8522
SCD1U10V2KX-5GP
PX
1 2
R8524 0R0402-PADR8524 0R0402-PAD
1
TP8503TP8503
12
R8513
10KR2J-3-GP
SAMSUNG
R8513
10KR2J-3-GP
SAMSUNG
1 2
R8526 0R2J-2-GP
RBS
R8526 0R2J-2-GP
RBS
12
C8516
SCD1U10V2KX-5GP
PX
C8516
SCD1U10V2KX-5GP
PX
1
2
3 4
5
6
Q8501
2N7002KDW-GP
DY
Q8501
2N7002KDW-GP
DY
12
R8503
10KR2J-3-GP
DY
R8503
10KR2J-3-GP
DY
12
C8518
SC1U6D3V2KX-GP
PX
C8518
SC1U6D3V2KX-GP
PX
1
TP8525TP8525
1 2
L8504
BLM15BD121SS1D-GP
PX
L8504
BLM15BD121SS1D-GP
PX
12
C8505
SC4D7U6D3V3KX-GP
DY
C8505
SC4D7U6D3V3KX-GP
DY
12
C8525
SC10P50V2JN-4GP
PX
C8525
SC10P50V2JN-4GP
PX
12
C8508
SCD1U10V2KX-5GP
DY
C8508
SCD1U10V2KX-5GP
DY
12
R8505
10KR2J-3-GP
PX
R8505
10KR2J-3-GP
PX
1 2
R8502 0R0402-PADR8502 0R0402-PAD
1 2
L8501
BLM18PG471SN1D-GP
PX
L8501
BLM18PG471SN1D-GP
PX
1
TP8507TP8507
1 2
R8514 499R2F-2-GP
PX
R8514 499R2F-2-GP
PX
1
TP8522TP8522
1
TP8501TP8501
1
TP8526TP8526
12
C8510
SCD1U10V2KX-5GP
RBS
C8510
SCD1U10V2KX-5GP
RBS
1
23
4
RN8503
SRN10KJ-5-GP
PX
RN8503
SRN10KJ-5-GP
PX
1 2
R8509 0R2J-2-GP
RBS
R8509 0R2J-2-GP
RBS
1
TP8502TP8502
12
R8511
10KR2J-3-GP
VRAM_2G
R8511
10KR2J-3-GP
VRAM_2G
12
R8522 0R2J-2-GP
DY
R8522 0R2J-2-GP
DY
12
R8501
10KR2J-3-GP
PX
R8501
10KR2J-3-GP
PX
1
TP8527TP8527
12
C8506
SC1U6D3V2KX-GP
PX
C8506
SC1U6D3V2KX-GP
PX
DIGON AJ27
TXCLK_LN_DPE3N AR34
TXCLK_LP_DPE3P AP34
TXCLK_UN_DPF3N AL36
TXCLK_UP_DPF3P AK35
TXOUT_L0N_DPE2N AU35
TXOUT_L0P_DPE2P AW37
TXOUT_L1N_DPE1N AU39
TXOUT_L1P_DPE1P AR37
TXOUT_L2N_DPE0N AR35
TXOUT_L2P_DPE0P AP35
TXOUT_L3N AP37
TXOUT_L3P AN36
TXOUT_U0N_DPF2N AK37
TXOUT_U0P_DPF2P AJ38
TXOUT_U1N_DPF1N AJ36
TXOUT_U1P_DPF1P AH35
TXOUT_U2N_DPF0N AH37
TXOUT_U2P_DPF0P AG38
TXOUT_U3N AG36
TXOUT_U3P AF35
VARY_BL AK27
LVTMDP
LVDS CONTROL
7 OF 8
VGA1G
MADISON-PRO-2-GP
PX
LVTMDP
LVDS CONTROL
7 OF 8
VGA1G
MADISON-PRO-2-GP
PX
1
TP8506TP8506
12
C8524
SC10P50V2JN-4GP
PX
C8524
SC10P50V2JN-4GP
PX
DMINUS
AG29
DPLL_PVDD
AM32
DPLL_PVSS
AN32
DPLL_VDDC
AN31
DPLUS
AF29
DVPCLK
AR1
DVPCNTL_0
AP8
DVPCNTL_1
AW8
DVPCNTL_2
AR3
DVPCNTL_MVP_0
AR8
DVPCNTL_MVP_1
AU8
DVPDATA_0
AU1
DVPDATA_1
AU3
DVPDATA_10
AV7
DVPDATA_11
AN7
DVPDATA_12
AV9
DVPDATA_13
AT9
DVPDATA_14
AR10
DVPDATA_15
AW10
DVPDATA_16
AU10
DVPDATA_17
AP10
DVPDATA_18
AV11
DVPDATA_19
AT11
DVPDATA_2
AW3
DVPDATA_20
AR12
DVPDATA_21
AW12
DVPDATA_22
AU12
DVPDATA_23
AP12
DVPDATA_3
AP6
DVPDATA_4
AW5
DVPDATA_5
AU5
DVPDATA_6
AR6
DVPDATA_7
AW6
DVPDATA_8
AU6
DVPDATA_9
AT7
GENERICA
AJ19
GENERICB
AK19
GENERICC
AJ20
GENERICD
AK20
GENERICE_HPD4
AJ24
GENERICF
AH26
GENERICG
AH24
GPIO_0
AH20
GPIO_1
AH18
GPIO_10_ROMSCK
AJ16
GPIO_11
AK16
GPIO_12
AL16
GPIO_13
AM16
GPIO_14_HPD2
AM14
GPIO_15_PWRCNTL_0
AM13
GPIO_16_SSIN
AK14
GPIO_17_THERMAL_INT
AG30
GPIO_18_HPD3
AN14
GPIO_19_CTF
AM17
GPIO_2
AN16
GPIO_20_PWRCNTL_1
AL13
GPIO_21_BB_EN
AJ14
GPIO_22_ROMCS#
AK13
GPIO_23_CLKREQ#
AN13
GPIO_3_SMBDATA
AH23
GPIO_4_SMBCLK
AJ23
GPIO_5_AC_BATT
AH17
GPIO_6
AJ17
GPIO_7_BLON
AK17
GPIO_8_ROMSO
AJ13
GPIO_9_ROMSI
AH15
H2SYNC AD29
HPD1
AK24
HSYNC AC36
JTAG_TCK
AK23 JTAG_TDI
AN23
JTAG_TDO
AM24 JTAG_TMS
AL24
JTAG_TRST#
AM23
DDCDATA_AUX7N AK29
DDCCLK_AUX7P AK30
TS_FDO
AK32
TSVDD
AJ32
TSVSS
AJ33
VREFG
AH13
VSS1DI AC34
VSS2DI AG32
XTALIN
AV33
XTALOUT
AU34
A2VDD AG33
A2VDDQ AD33
A2VSSQ AF33
AUX1N AL27
AUX1P AM27
AUX2N AM20
AUX2P AN20
AVDD AD34
AVSSQ AE34
BAF37
B2 AF30
B2# AF31
B# AE38
CAC32
COMP AF32
DDC1CLK AM26
DDC1DATA AN26
DDC2CLK AM19
DDC2DATA AL19
DDC6CLK AJ30
DDC6DATA AJ31
DDCDATA_AUX3N AM30
DDCCLK_AUX3P AL30
DDCDATA_AUX4N AM29
DDCCLK_AUX4P AL29
DDCDATA_AUX5N AM21
DDCCLK_AUX5P AN21
GAE36
G2 AD30
G2# AD31
G# AD35
RAD39
R2 AC30
R2# AC31
R2SET AA29
R# AD37
RSET AB34
SCL
AK26
SDA
AJ26
TX0M_DPA2N AR24
TX0M_DPC2N AR14
TX0P_DPA2P AT25
TX0P_DPC2P AT15
TX1M_DPA1N AV25
TX1M_DPC1N AV15
TX1P_DPA1P AU26
TX1P_DPC1P AU16
TX2M_DPA0N AR26
TX2M_DPC0N AR16
TX2P_DPA0P AT27
TX2P_DPC0P AT17
TX3M_DPB2N AU30
TX3M_DPD2N AR20
TX3P_DPB2P AV31
TX3P_DPD2P AT21
TX4M_DPB1N AT31
TX4M_DPD1N AV21
TX4P_DPB1P AR32
TX4P_DPD1P AU22
TX5M_DPB0N AU32
TX5M_DPD0N AR22
TX5P_DPB0P AT33
TX5P_DPD0P AT23
TXCAM_DPA3N AV23
TXCAP_DPA3P AU24
TXCBM_DPB3N AT29
TXCBP_DPB3P AR30
TXCCM_DPC3N AV13
TXCCP_DPC3P AU14
TXCDM_DPD3N AT19
TXCDP_DPD3P AU20
V2SYNC AC29
VDD1DI AC33
VDD2DI AG31
VSYNC AC38
YAD32
TS_A
AL31
XO_IN
AW34
XO_IN2
AW35
DPA
DPB
DPC
DPD
MUTI GFX
I2C
GENERAL PURPOSE I/O
DAC1
DAC2
DDC/AUX
THERMAL
PLL/CLOCK
2 OF 8
VGA1B
MADISON-PRO-2-GP
PX
DPA
DPB
DPC
DPD
MUTI GFX
I2C
GENERAL PURPOSE I/O
DAC1
DAC2
DDC/AUX
THERMAL
PLL/CLOCK
2 OF 8
VGA1B
MADISON-PRO-2-GP
PX
12
C8526
SCD1U10V2KX-5GP
DY
C8526
SCD1U10V2KX-5GP
DY
12
R8508 0R2J-2-GP
DY
R8508 0R2J-2-GP
DY
1
TP8512TP8512
12
R8515
499R2F-2-GP
PX
R8515
499R2F-2-GP
PX
1 2
R8507 0R2J-2-GP
RBS
R8507 0R2J-2-GP
RBS
12
C8520
SC4D7U6D3V3KX-GP
DY
C8520
SC4D7U6D3V3KX-GP
DY
1
2 3
4
RN8501 SRN0J-6-GP
PX
RN8501 SRN0J-6-GP
PX
1
TP8511 TPAD14-GPTP8511 TPAD14-GP
12
C8517
SC4D7U6D3V3KX-GP
DY
C8517
SC4D7U6D3V3KX-GP
DY
12
R8520 10KR2J-3-GP
PX
R8520 10KR2J-3-GP
PX
12
C8515
SC1U6D3V2KX-GP
PX
C8515
SC1U6D3V2KX-GP
PX
1
2
3
4 5
6
7
8
RN8502
SRN150F-1-GP
PX
RN8502
SRN150F-1-GP
PX
1
TP8509TP8509
12
R8523
10KR2J-3-GP
DY
R8523
10KR2J-3-GP
DY
1
TP8528TP8528
1
TP8521TP8521
![](asset-56.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PX_EN##
PX_EN#
PX_EN#
1D5V_VGA_PWOK_R
PX_EN##
BIF_VDDC_1V
FB_VDDCI
1D5V_VGA_PWOK_R1D5V_VGA_PWOK
BIF_VDDC_CORE
1V_VGA_S0
SPV18
SPV18
1D8V_VGA_S0
1D5V_VGA_S0
VGA_CORE
1D8V_VGA_S0
VGA_CORE
MPV18
MPV18
VDDC_CT
PCIE_PVDD
3D3V_VGA_S0
BIF_VDDC VGA_CORE
BIF_VDDC
3D3V_VGA_S0
BIF_VDDC
3D3V_VGA_S0
VGA_CORE
3D3V_VGA_S0
VGA_CORE 1V_VGA_S0
1D5V_VGA_S0
3D3V_VGA_S03D3V_S5
1V_VGA_S0 SPV10
1D5V_VGA_PWOK83
8209A_EN/DEM_VGA92
PX_EN87
VGA_SENSE92
GND_SENSE92
1D5V_VGA_PWOK 83
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
GPU_POWER(4/5)
A2
86 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
GPU_POWER(4/5)
A2
86 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
GPU_POWER(4/5)
A2
86 94
Tuesday, November 09, 2010
<Core Design>
(For M97, Broadway, Madison and Park SPV10 = 1.0V)
(GDDR5 1.12V@16A VDDCI)
For DDR3/GDDR5, MVDDQ = 1.5V
(1.8V@110mA VDD_CT)
(GDDR3/DDR3 1.12V@4A VDDCI)
(1.8V@40mA PCIE_PVDD)
(1.8V@504mA PCIE_VDDR)
(M97, Broadway and Madison: 1.8V@150mA MPV18)
(Park: 1.8V@75mA MPV18)
(1.0V@1920mA PCIE_VDDC)
(1.8V@75mA SPV18)
PX_EN Mode
0 Normal
BACO1
BIF_VDDC
1V_VGA
VGA_Core
55mA in BACO mode
1D5V_VGA_PWOK
BACO mode
CHECK!!
(120mA SPV10)
G
D S
U8604
AO3418-GP
84.03418.031
PX
U8604
AO3418-GP
84.03418.031
PX
12
C8645
SC1U6D3V2KX-GP
PX
C8645
SC1U6D3V2KX-GP
PX
12
C8605
SC1U6D3V2KX-GP
PX
C8605
SC1U6D3V2KX-GP
PX
12
R8604
1KR2J-1-GP
PX
R8604
1KR2J-1-GP
PX
12
C8640
SC1U6D3V2KX-GP
PX
C8640
SC1U6D3V2KX-GP
PX
12
C8646
SCD1U10V2KX-5GP
PX
C8646
SCD1U10V2KX-5GP
PX
12
C8674
SCD1U10V2KX-5GP
PX
C8674
SCD1U10V2KX-5GP
PX
12
C8679
SC1U6D3V2KX-GP
PX
C8679
SC1U6D3V2KX-GP
PX
12
C8617
SC4D7U6D3V3KX-GP
PX
C8617
SC4D7U6D3V3KX-GP
PX
12
C8667
SC1U6D3V2KX-GP
PX
C8667
SC1U6D3V2KX-GP
PX
1 2
R8601
0R2J-2-GP
DY
R8601
0R2J-2-GP
DY
12
C8684
SC1U6D3V2KX-GP
PX
C8684
SC1U6D3V2KX-GP
PX
12
C8656
SC1U6D3V2KX-GP
PX
C8656
SC1U6D3V2KX-GP
PX
12
C8611
SC1U6D3V2KX-GP
PX
C8611
SC1U6D3V2KX-GP
PX
1 2
L8603
BLM15BD121SS1D-GP
PX
L8603
BLM15BD121SS1D-GP
PX
12
C8687
SC10U6D3V3MX-GP
PX
C8687
SC10U6D3V3MX-GP
PX
12
C8638
SC1U6D3V2KX-GP
PX
C8638
SC1U6D3V2KX-GP
PX
12
C8647
SC1U6D3V2KX-GP
PX
C8647
SC1U6D3V2KX-GP
PX
12
C8626
SC1U6D3V2KX-GP
PX
C8626
SC1U6D3V2KX-GP
PX
12
C8639
SC1U6D3V2KX-GP
PX
C8639
SC1U6D3V2KX-GP
PX
12
C8604
SC1U6D3V2KX-GP
PX
C8604
SC1U6D3V2KX-GP
PX
12
C8636
SC1U6D3V2KX-GP
PX
C8636
SC1U6D3V2KX-GP
PX
12
C8629
SC1U6D3V2KX-GP
PX
C8629
SC1U6D3V2KX-GP
PX
G
S
D
Q8601
2N7002K-2-GP
PX
Q8601
2N7002K-2-GP
PX
12
C8642
SC1U6D3V2KX-GP
PX
C8642
SC1U6D3V2KX-GP
PX
12
C8601
SC1U6D3V2KX-GP
PX
C8601
SC1U6D3V2KX-GP
PX
12
C8650
SC4D7U6D3V3KX-GP
PX
C8650
SC4D7U6D3V3KX-GP
PX
PCIE_PVDD
AB37
MPV18
H7
MPV18
H8
SPV18
AM10
PCIE_VDDC G30
PCIE_VDDC R28
PCIE_VDDC T28
PCIE_VDDC U28
PCIE_VDDC G31
PCIE_VDDC H29
PCIE_VDDC H30
PCIE_VDDC J29
PCIE_VDDC J30
PCIE_VDDC L28
PCIE_VDDC M28
PCIE_VDDC N28
PCIE_VDDR AA31
PCIE_VDDR AA32
PCIE_VDDR AA33
PCIE_VDDR AA34
PCIE_VDDR V28
PCIE_VDDR W29
PCIE_VDDR W30
PCIE_VDDR Y31
SPV10
AN9
SPVSS
AN10
VDDR1
AC7
VDDR1
G17
VDDR1
G20
VDDR1
G23
VDDR1
G26
VDDR1
G29
VDDR1
H10
VDDR1
J7
VDDR1
J9
VDDR1
K11
VDDR1
K13
VDDR1
AD11
VDDR1
K8
VDDR1
L12
VDDR1
L16
VDDR1
L21
VDDR1
L23
VDDR1
L26
VDDR1
L7
VDDR1
M11
VDDR1
N11
VDDR1
P7
VDDR1
AF7
VDDR1
R11
VDDR1
U11
VDDR1
U7
VDDR1
Y11
VDDR1
Y7
VDDR1
AG10
VDDR1
AJ7
VDDR1
AK8
VDDR1
AL9
VDDR1
G11
VDDR1
G14
VDDR3
AF23
VDDR3
AF24
VDDR3
AG23
VDDR3
AG24
VDDR4
AF13
VDDR4
AF15
VDDR4
AG13
VDDR4
AG15
VDDR4
AD12
VDDR4
AF11
VDDR4
AF12
VDDR4
AG11
NC_VDDRHA
M20
NC_VDDRHB
V12
NC_VSSRHA
M21
NC_VSSRHB
U12
VDD_CT
AF26
VDD_CT
AF27
VDD_CT
AG26
VDD_CT
AG27
VDDC AA15
VDDC AB21
VDDC AB23
VDDC AB26
VDDC AB28
VDDCI AC12
VDDCI AC15
VDDC AC17
VDDC AC20
VDDC AC22
VDDC AC24
VDDC AA17
VDDC AC27
VDDCI AD13
VDDCI AD16
VDDC AD18
VDDC AD21
VDDC AD23
VDDC AD26
VDDC AF17
VDDC AF20
VDDC AF22
VDDC AA20
VDDC AG16
VDDC AG18
VDDC AG21
VDDC AH22
VDDCI M16
VDDCI M18
VDDCI M23
VDDC M26
VDDCI N15
VDDCI N17
VDDC AA22
VDDCI N20
VDDCI N22
VDDC N24
VDDC/BIF_VDDC N27
VDDCI R13
VDDCI R16
VDDC R18
VDDC R21
VDDC R23
VDDC R26
VDDC AA24
VDDCI T15
VDDC T17
VDDC T20
VDDC T22
VDDC T24
VDDC/BIF_VDDC T27
VDDC U16
VDDC U18
VDDC U21
VDDC U23
VDDC AA27
VDDC U26
VDDCI V15
VDDC V17
VDDC V20
VDDC V22
VDDC V24
VDDC V27
VDDC Y16
VDDC Y18
VDDC Y21
VDDCI AB13
VDDC Y23
VDDC Y26
VDDC Y28
VDDC AB16
VDDC AB18
VDDCI M15
VDDCI N13
VDDCI R12
VDDCI T12
VDDCI AA13
VDDCI Y13
VDDC AH27
VDDC AH28
FB_VDDC
AF28
FB_VDDCI
AG28
FB_GND
AH29
POWER
PLL
PCIE
CORE
MEM I/O
I/O
LEVEL
TRANSLATION
ISOLATED
CORE I/O
VOLTAGE
SENESE
5 OF 8
VGA1E
MADISON-PRO-2-GP
PX
POWER
PLL
PCIE
CORE
MEM I/O
I/O
LEVEL
TRANSLATION
ISOLATED
CORE I/O
VOLTAGE
SENESE
5 OF 8
VGA1E
MADISON-PRO-2-GP
PX
1 2
L8604
BLM15BD121SS1D-GP
PX
L8604
BLM15BD121SS1D-GP
PX
12
C8622
SCD1U10V2KX-5GP
PX
C8622
SCD1U10V2KX-5GP
PX
12
C8693
SCD1U10V2KX-5GP
DY
C8693
SCD1U10V2KX-5GP
DY
12
C8668
SC1U6D3V2KX-GP
PX
C8668
SC1U6D3V2KX-GP
PX
12
C8654
SC1U6D3V2KX-GP
PX
C8654
SC1U6D3V2KX-GP
PX
12
C8630
SC1U6D3V2KX-GP
PX
C8630
SC1U6D3V2KX-GP
PX
1 2
R8608
2K2R2J-2-GP
PX
R8608
2K2R2J-2-GP
PX
12
C8657
SC1U6D3V2KX-GP
PX
C8657
SC1U6D3V2KX-GP
PX
12
C8675
SC4D7U6D3V3KX-GP
PX
C8675
SC4D7U6D3V3KX-GP
PX
12
C8686
SC1U6D3V2KX-GP
PX
C8686
SC1U6D3V2KX-GP
PX
1 2
L8601
BLM15BD121SS1D-GP
PX
L8601
BLM15BD121SS1D-GP
PX
G
S
D
Q8603
2N7002K-2-GP
84.2N702.J31
PX
2nd = 84.2N702.031
Q8603
2N7002K-2-GP
84.2N702.J31
PX
2nd = 84.2N702.031
12
C8672
SC10U6D3V3MX-GP
PX
C8672
SC10U6D3V3MX-GP
PX
12
C8670
SC10U6D3V3MX-GP
PX
C8670
SC10U6D3V3MX-GP
PX
12
C8607
SC1U6D3V2KX-GP
PX
C8607
SC1U6D3V2KX-GP
PX
12
C8618
SCD1U10V2KX-5GP
PX
C8618
SCD1U10V2KX-5GP
PX
12
C8633
SC1U6D3V2KX-GP
PX
C8633
SC1U6D3V2KX-GP
PX
12
C8689
SC1U6D3V2KX-GP
PX
C8689
SC1U6D3V2KX-GP
PX
12
C8685
SC1U6D3V2KX-GP
PX
C8685
SC1U6D3V2KX-GP
PX
12
C8677
SCD1U10V2KX-5GP
PX
C8677
SCD1U10V2KX-5GP
PX
12
C8625
SC1U6D3V2KX-GP
PX
C8625
SC1U6D3V2KX-GP
PX
12
C8673
SC1U6D3V2KX-GP
PX
C8673
SC1U6D3V2KX-GP
PX
12
C8641
SC1U6D3V2KX-GP
PX
C8641
SC1U6D3V2KX-GP
PX
12
C8635
SC10U6D3V3MX-GP
PX
C8635
SC10U6D3V3MX-GP
PX
12
C8643
SC1U6D3V2KX-GP
PX
C8643
SC1U6D3V2KX-GP
PX
1
TP8602 TPAD14-GPTP8602 TPAD14-GP
B
1
A
2
GND
3Y4
VCC 5
U8605
74LVC1G08GW-1-GP
2ND = 73.7SZ08.DAH
73.01G08.L04
PX
U8605
74LVC1G08GW-1-GP
2ND = 73.7SZ08.DAH
73.01G08.L04
PX
12
C8688
SC4D7U6D3V3KX-GP
PX
C8688
SC4D7U6D3V3KX-GP
PX
12
C8691
SC4D7U6D3V3KX-GP
PX
C8691
SC4D7U6D3V3KX-GP
PX
12
C8623
SC1U6D3V2KX-GP
PX
C8623
SC1U6D3V2KX-GP
PX
12
C8614
SC1U6D3V2KX-GP
PX
C8614
SC1U6D3V2KX-GP
PX
12
C8644
SC1U6D3V2KX-GP
PX
C8644
SC1U6D3V2KX-GP
PX
12
C8664
SCD1U10V2KX-5GP
PX
C8664
SCD1U10V2KX-5GP
PX
12
C8692
SC1U6D3V2KX-GP
PX
C8692
SC1U6D3V2KX-GP
PX
G
DS
U8602
AO3418-GP
84.03418.031
PX
U8602
AO3418-GP
84.03418.031
PX
12
C8690
SCD1U10V2KX-5GP
PX
C8690
SCD1U10V2KX-5GP
PX
12
C8648
SC1U6D3V2KX-GP
PX
C8648
SC1U6D3V2KX-GP
PX
12
C8669
SC10U6D3V3MX-GP
PX
C8669
SC10U6D3V3MX-GP
PX
12
C8682
SC1U6D3V2KX-GP
PX
C8682
SC1U6D3V2KX-GP
PX
G
DS
U8601
AO3400A-GP
PX
84.03400.B37
U8601
AO3400A-GP
PX
84.03400.B37
12
C8619
SC1U6D3V2KX-GP
PX
C8619
SC1U6D3V2KX-GP
PX
12
C8631
SC1U6D3V2KX-GP
PX
C8631
SC1U6D3V2KX-GP
PX
12
C8608
SC1U6D3V2KX-GP
PX
C8608
SC1U6D3V2KX-GP
PX
12
C8610
SC1U6D3V2KX-GP
PX
C8610
SC1U6D3V2KX-GP
PX
12
C8627
SC1U6D3V2KX-GP
PX
C8627
SC1U6D3V2KX-GP
PX
12
R8607
10KR2J-3-GP
PX
R8607
10KR2J-3-GP
PX
12
C8615
SC1U6D3V2KX-GP
PX
C8615
SC1U6D3V2KX-GP
PX
12
C8628
SC1U6D3V2KX-GP
PX
C8628
SC1U6D3V2KX-GP
PX
12
C8676
SC1U6D3V2KX-GP
PX
C8676
SC1U6D3V2KX-GP
PX
12
C8663
SCD1U10V2KX-5GP
PX
C8663
SCD1U10V2KX-5GP
PX
12
C8665
SC4D7U6D3V3KX-GP
PX
C8665
SC4D7U6D3V3KX-GP
PX
12
C8612
SC1U6D3V2KX-GP
PX
C8612
SC1U6D3V2KX-GP
PX
12
C8652
SC1U6D3V2KX-GP
PX
C8652
SC1U6D3V2KX-GP
PX
12
C8616
SC1U6D3V2KX-GP
PX
C8616
SC1U6D3V2KX-GP
PX
1 2
L8602
BLM15BD121SS1D-GP
PX
L8602
BLM15BD121SS1D-GP
PX
12
C8681
SCD1U10V2KX-5GP
PX
C8681
SCD1U10V2KX-5GP
PX
12
C8658
SCD1U10V2KX-5GP
PX
C8658
SCD1U10V2KX-5GP
PX
12
R8606
10KR2J-3-GP
PX
R8606
10KR2J-3-GP
PX
12
C8683
SC1U6D3V2KX-GP
PX
C8683
SC1U6D3V2KX-GP
PX
12
C8661
SC1U6D3V2KX-GP
PX
C8661
SC1U6D3V2KX-GP
PX
12
C8655
SC1U6D3V2KX-GP
PX
C8655
SC1U6D3V2KX-GP
PX
12
C8606
SC1U6D3V2KX-GP
PX
C8606
SC1U6D3V2KX-GP
PX
12
C8603
SC10U6D3V3MX-GP
PX
C8603
SC10U6D3V3MX-GP
PX
12
C8609
SC1U6D3V2KX-GP
PX
C8609
SC1U6D3V2KX-GP
PX
12
C8602
SC1U6D3V2KX-GP
PX
C8602
SC1U6D3V2KX-GP
PX
12
C8620
SC1U6D3V2KX-GP
PX
C8620
SC1U6D3V2KX-GP
PX
1 2
R86050R3J-0-U-GP
DY
R86050R3J-0-U-GP
DY
12
C8632
SC1U6D3V2KX-GP
PX
C8632
SC1U6D3V2KX-GP
PX
12
C8671
SC10U6D3V3MX-GP
PX
C8671
SC10U6D3V3MX-GP
PX
12
C8666
SC1U6D3V2KX-GP
PX
C8666
SC1U6D3V2KX-GP
PX
12
C8660
SC1U6D3V2KX-GP
PX
C8660
SC1U6D3V2KX-GP
PX
12
C8624
SC1U6D3V2KX-GP
PX
C8624
SC1U6D3V2KX-GP
PX
12
C8678
SC4D7U6D3V3KX-GP
PX
C8678
SC4D7U6D3V3KX-GP
PX
12
C8621
SCD1U10V2KX-5GP
PX
C8621
SCD1U10V2KX-5GP
PX
12
C8649
SC1U6D3V2KX-GP
PX
C8649
SC1U6D3V2KX-GP
PX
12
C8634
SC4D7U6D3V3KX-GP
PX
C8634
SC4D7U6D3V3KX-GP
PX
12
R8603
1KR2J-1-GP
PX
R8603
1KR2J-1-GP
PX
12
C8659
SC1U6D3V2KX-GP
PX
C8659
SC1U6D3V2KX-GP
PX
1 2
L8605
BLM15BD121SS1D-GP
PX
L8605
BLM15BD121SS1D-GP
PX
12
C8680
SCD1U10V2KX-5GP
PX
C8680
SCD1U10V2KX-5GP
PX
12
C8637
SC1U6D3V2KX-GP
PX
C8637
SC1U6D3V2KX-GP
PX
12
C8662
SC1U6D3V2KX-GP
PX
C8662
SC1U6D3V2KX-GP
PX
12
C8613
SCD1U10V2KX-5GP
PX
C8613
SCD1U10V2KX-5GP
PX
G
D S
U8603
AO3400A-GP
PX
84.03400.B37
U8603
AO3400A-GP
PX
84.03400.B37
C
B
E
Q8604
MMBT3904-4-GP
84.T3904.C11
2ND = 84.03904.P11
3rd = 84.03904.L06
PX
Q8604
MMBT3904-4-GP
84.T3904.C11
2ND = 84.03904.P11
3rd = 84.03904.L06
PX
1
2
34
5
6
Q8602
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
PX
Q8602
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
PX
![](asset-57.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DPCD_CALR DPAB_CALR
DPEF_CALR
VSS_MECH1
VSS_MECH2
VSS_MECH3
DPF_PVDD_1
DPF_PVSS
PX_EN_R DPF_VDD18
DPA_VDD18
DPA_VDD18
1V_VGA_S0
DPA_VDD10
DPD_VDD18 DPA_VDD18
1V_VGA_S0
1V_VGA_S0
1D8V_VGA_S0
1V_VGA_S0
DPD_VDD18
DPF_VDD18
DPF_VDD10
DPF_VDD18
DPF_VDD10
DPD_VDD18
DPA_VDD181D8V_VGA_S0
DPA_VDD10
DPA_VDD18
DPD_VDD18
DPD_VDD18
PX_EN 86
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
GPU_DPPWR/GND(5/5)
A2
87 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
GPU_DPPWR/GND(5/5)
A2
87 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
GPU_DPPWR/GND(5/5)
A2
87 94
Tuesday, November 09, 2010
<Core Design>
(1.8V@20mA DPB_PVDD)
(1.8V@130mA DPA_VDD18)
(1.8V@130mA DPD_VDD18)
(1.0V@110mA DPA_VDD10)
(1.0V@110mA DPB_VDD10)
(1.8V@20mA DPA_PVDD)
LVDS mode
LVDS mode
(1.8V@20mA DPC_PVDD)
(1.0V@120mA DPE_VDD10)
(1.8V@200mA DPE_VDD18)
(1.0V@110mA DPD_VDD10)
For dual link LVDS, DPE_VDDxx and DPF_VDDxx can be shared respectively
LVDS mode
(1.8V@200mA DPF_VDD18)
(1.8V@20mA DPF_PVDD)
For M97/M96, DPF_VDD18 can be shared with DPE_VDD18
LVDS mode
(1.0V@120mA DPF_VDD10)
For M97/M96, DPF_VDD10 can be shared with DPE_VDD10
For dual link DVI using DPC AND DPD, DPC_VDDxx and DPD_VDDxx can be shared respectively
For dual link DVI using DPA AND DPB, DPA_VDDxx and DPB_VDDxx can be shared respectively
(1.0V@110mA DPC_VDD10)
(1.8V@20mA DPD_PVDD)
(1.8V@20mA DPE_PVDD)
PX_EN is tri-state before internal PWRGOOD
is asserted and PERSTb is de-asserted.
0831
0831
0831
0831
0831
0831
1 2
R8713
0R0603-PAD
PX
R8713
0R0603-PAD
PX
12
C8719
SC1U6D3V2KX-GP
PX
C8719
SC1U6D3V2KX-GP
PX
1 2
R8706
0R2J-2-GP
PX
R8706
0R2J-2-GP
PX
1 2
R8705
150R2F-1-GP
PX
R8705
150R2F-1-GP
PX
PCIE_VSS
AB39
PCIE_VSS
J31
PCIE_VSS
J34
PCIE_VSS
K31
PCIE_VSS
K34
PCIE_VSS
K39
PCIE_VSS
L31
PCIE_VSS
L34
PCIE_VSS
M34
PCIE_VSS
M39
PCIE_VSS
N31
PCIE_VSS
E39
PCIE_VSS
N34
PCIE_VSS
P31
PCIE_VSS
P34
PCIE_VSS
P39
PCIE_VSS
R34
PCIE_VSS
T31
PCIE_VSS
T34
PCIE_VSS
T39
PCIE_VSS
U31
PCIE_VSS
U34
PCIE_VSS
F34
PCIE_VSS
V34
PCIE_VSS
V39
PCIE_VSS
W31
PCIE_VSS
W34
PCIE_VSS
Y34
PCIE_VSS
Y39
PCIE_VSS
F39
PCIE_VSS
G33
PCIE_VSS
G34
PCIE_VSS
H31
PCIE_VSS
H34
PCIE_VSS
H39
VSS_MECH A39
VSS_MECH AW1
VSS_MECH AW39
GND A3
GND AA6
GND F13
GND
F15
GND
F17
GND
F19
GND
F21
GND
F23
GND
F25
GND
F27
GND
F29
GND
F31
GND AB12
GND
F33
GND
F7
GND
F9
GND
G2
GND
G6
GND
H9
GND
J2
GND
J27
GND
J6
GND
J8
GND AB15
GND
K14
GND
K7
GND
L11
GND
L17
GND
L2
GND
L22
GND
L24
GND
L6
GND
M17
GND
M22
GND AB17
GND
M24
GND
N16
GND
N18
GND
N2
GND
N21
GND
N23
GND
N26
GND
N6
GND
R15
GND
R17
GND AB20
GND
R2
GND
R20
GND
R22
GND
R24
GND
R27
GND
R6
GND
T11
GND
T13
GND
T16
GND
T18
GND AB22
GND
T21
GND
T23
GND
T26
GND
U15
GND
U17
GND
U2
GND
U20
GND
U22
GND
U24
GND
U27
GND AB24
GND
U6
GND
V11
GND
V16
GND
V18
GND
V21
GND
V23
GND
V26
GND
W2
GND
W6
GND
Y15
GND AB27
GND
Y17
GND
Y20
GND
Y22
GND
Y24
GND
Y27
GND AC11
GND AC13
GND A37
GND AC16
GND AC18
GND AC2
GND AC21
GND AC23
GND AC26
GND AC28
GND AC6
GND AD15
GND AD17
GND AA16
GND AD20
GND AD22
GND AD24
GND AD27
GND AD9
GND AE2
GND AE6
GND AF10
GND AF16
GND AF18
GND AA18
GND AF21
GND AG17
GND AG2
GND AG20
GND AG22
GND AG6
GND AG9
GND AH21
GND AJ10
GND AA2
GND AJ11
GND AJ2
GND AJ28
GND AJ6
GND AK11
GND AK31
GND AK7
GND AL11
GND AL14
GND AL17
GND AA21
GND AL2
GND AL20
GND/PX_EN AL21
GND AL23
GND AL26
GND AL32
GND AL6
GND AL8
GND AM11
GND AM31
GND AA23
GND AM9
GND AN11
GND AN2
GND AN30
GND AN6
GND AN8
GND AP11
GND AP7
GND AP9
GND AR5
GND AA26
GND B11
GND B13
GND B15
GND B17
GND B19
GND B21
GND B23
GND B25
GND B27
GND AA28
GND B29
GND B31
GND B33
GND B7
GND B9
GND C1
GND C39
GND E35
GND E5
GND F11
GND
U13
GND
V13
GND
6 OF 8
VGA1F
MADISON-PRO-2-GP
PX
GND
6 OF 8
VGA1F
MADISON-PRO-2-GP
PX
1
TP8701TP8701
1 2
R8715
0R2J-2-GP
PX
R8715
0R2J-2-GP
PX
1 2
R8708 0R2J-2-GP
PX
R8708 0R2J-2-GP
PX
12
R8709
10KR2J-3-GP
PX
R8709
10KR2J-3-GP
PX
12
C8702
SCD1U10V2KX-5GP
PX
C8702
SCD1U10V2KX-5GP
PX
1 2
R8704
0R2J-2-GP
PX
R8704
0R2J-2-GP
PX
12
C8730
SCD1U10V2KX-5GP
PX
C8730
SCD1U10V2KX-5GP
PX
12
C8708
SCD1U10V2KX-5GP
PX
C8708
SCD1U10V2KX-5GP
PX
DPA_PVDD AU28
DPA_PVSS AV27
DPA_VDD10 AP31
DPA_VDD10 AP32
DPA_VDD18 AN24
DPA_VDD18 AP24
DPA_VSSR AN27
DPA_VSSR AP27
DPA_VSSR AP28
DPA_VSSR AW24
DPA_VSSR AW26
DPAB_CALR AW28
DPB_PVDD AV29
DPB_PVSS AR28
DPB_VDD10 AN33
DPB_VDD10 AP33
DPB_VDD18 AP25
DPB_VDD18 AP26
DPB_VSSR AN29
DPB_VSSR AP29
DPB_VSSR AP30
DPB_VSSR AW30
DPB_VSSR AW32
DPC_PVDD AU18
DPC_PVSS AV17
DPC_VDD10
AP13
DPC_VDD10
AT13
DPC_VDD18
AP20
DPC_VDD18
AP21
DPC_VSSR
AN17
DPC_VSSR
AP16
DPC_VSSR
AP17
DPC_VSSR
AW14
DPC_VSSR
AW16
DPCD_CALR
AW18
DPD_PVDD AV19
DPD_PVSS AR18
DPD_VDD10
AP14
DPD_VDD10
AP15
DPD_VDD18
AP22
DPD_VDD18
AP23
DPD_VSSR
AN19
DPD_VSSR
AP18
DPD_VSSR
AP19
DPD_VSSR
AW20
DPD_VSSR
AW22
DPE_PVDD AM37
DPE_PVSS AN38
DPE_VDD10
AL33
DPE_VDD10
AM33
DPE_VDD18
AH34
DPE_VDD18
AJ34
DPE_VSSR
AN34
DPE_VSSR
AP39
DPE_VSSR
AR39
DPE_VSSR
AU37
DPEF_CALR
AM39
DPF_PVDD AL38
DPF_PVSS AM35
DPF_VDD10
AK33
DPF_VDD10
AK34
DPF_VDD18
AF34
DPF_VDD18
AG34
DPF_VSSR
AF39
DPF_VSSR
AH39
DPF_VSSR
AK39
DPF_VSSR
AL34
DPF_VSSR
AM34
DP PLL POWER
DP A/B POWERDP C/D POWER
DP E/F POWER
8 OF 8
VGA1H
MADISON-PRO-2-GP
PX
DP PLL POWER
DP A/B POWERDP C/D POWER
DP E/F POWER
8 OF 8
VGA1H
MADISON-PRO-2-GP
PX
1 2
C8726
SCD1U10V2KX-5GP
PX
C8726
SCD1U10V2KX-5GP
PX
1 2
R8703
150R2F-1-GP
PX
R8703
150R2F-1-GP
PX
1
TP8703TP8703
12
C8703
SC1U6D3V2KX-GP
PX
C8703
SC1U6D3V2KX-GP
PX
1 2
R8707
0R2J-2-GP
PX
R8707
0R2J-2-GP
PX
1 2
R8710
0R2J-2-GP
PX
R8710
0R2J-2-GP
PX
1 2
R8701
150R2F-1-GP
PX
R8701
150R2F-1-GP
PX
12
C8707
SC1U6D3V2KX-GP
PX
C8707
SC1U6D3V2KX-GP
PX
1 2
C8720
SCD1U10V2KX-5GP
PX
C8720
SCD1U10V2KX-5GP
PX
1 2
R8714
0R0402-PAD
PX
R8714
0R0402-PAD
PX
1
TP8702TP8702
![](asset-58.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VRAM_ZQ1 VRAM_ZQ2
GPU_CLKA0_T
VRAM1_2_VREF
MDA0
MDA3
MDA2 MDA29
MDA17 MDA8
MDA28
MDA16
MDA12
MDA24
MDA23 MDA15
MDA26
MDA21
MDA14
MDA30
MDA22 MDA9
MDA19 MDA10
MDA31
MDA11
MDA25
MDA20 MDA13
MDA27
MDA18
MDA1
MDA6
MDA4
MDA5
MDA7
VRAM1_2_VREFVRAM1_2_VREF
1D5V_VGA_S0 1D5V_VGA_S0
1D5V_VGA_S0
MAA084,89 MAA184,89 MAA284,89 MAA384,89 MAA484,89 MAA584,89 MAA684,89 MAA784,89 MAA884,89 MAA984,89 MAA1084,89 MAA1184,89 MAA1284,89 MAA1384,89
RASA0#84 CASA0#84 WEA0#84
CSA0#_0 84
A_BA084,89 A_BA184,89 A_BA284,89
CKEA084
CLKA084 CLKA0#84
MEM_RST 84,89,90,91
ODTA0 84
QSAP_0 84
QSAN_0 84
MDA[0..31] 84
CASA0#84 WEA0#84
MDA[0..31] 84
CSA0#_0 84
MEM_RST 84,89,90,91
CKEA084
ODTA0 84
RASA0#84
A_BA084,89 A_BA184,89 A_BA284,89
MAA084,89 MAA184,89 MAA284,89 MAA384,89 MAA484,89 MAA584,89 MAA684,89 MAA784,89 MAA884,89 MAA984,89 MAA1084,89 MAA1184,89 MAA1284,89 MAA1384,89
CLKA0#84 CLKA084
QSAP_3 84
QSAN_3 84
QSAP_2 84
QSAN_2 84 QSAP_1 84
QSAN_1 84
DQMA384
DQMA284 DQMA184
DQMA084
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
GPU-VRAM1,2 (1/4)
A3
88 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
GPU-VRAM1,2 (1/4)
A3
88 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
GPU-VRAM1,2 (1/4)
A3
88 94
Tuesday, November 09, 2010
<Core Design>
12
C8816
SC1U6D3V2KX-GP
WTL
C8816
SC1U6D3V2KX-GP
WTL
12
C8803
SCD1U10V2KX-5GP
WTL
C8803
SCD1U10V2KX-5GP
WTL
1 2
R8801 243R2F-2-GP
WTL
R8801 243R2F-2-GP
WTL
12
C8823
SCD1U10V2KX-5GP
WTL
C8823
SCD1U10V2KX-5GP
WTL
12
C8804
SC10U6D3V5KX-1GP
WTL
C8804
SC10U6D3V5KX-1GP
WTL
12
C8811
SC1U6D3V2KX-GP
WTL
C8811
SC1U6D3V2KX-GP
WTL
12
C8820
SC10U6D3V5KX-1GP
WTL
C8820
SC10U6D3V5KX-1GP
WTL
12
C8812
SC1U6D3V2KX-GP
WTL
C8812
SC1U6D3V2KX-GP
WTL
12
R8803
56R2F-1-GP
WTL
R8803
56R2F-1-GP
WTL
12
C8808
SC1U6D3V2KX-GP
WTL
C8808
SC1U6D3V2KX-GP
WTL
12
R8805
2K1R2F-GP
WTL
R8805
2K1R2F-GP
WTL
12
R8806
2K1R2F-GP
WTL
R8806
2K1R2F-GP
WTL
12
C8821
SC10U6D3V5KX-1GP
WTL
C8821
SC10U6D3V5KX-1GP
WTL
12
C8801
SC10U6D3V5KX-1GP
WTL
C8801
SC10U6D3V5KX-1GP
WTL
12
C8806
SCD1U10V2KX-5GP
WTL
C8806
SCD1U10V2KX-5GP
WTL
12
C8810
SC1U6D3V2KX-GP
WTL
C8810
SC1U6D3V2KX-GP
WTL
12
C8814
SC1U6D3V2KX-GP
WTL
C8814
SC1U6D3V2KX-GP
WTL
DQSL F3
DQSL# G3
DQSU# B7
DQSU C7
DQU0 D7
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
ODT K1
RESET# T2
CS# L2
NC#J1 J1
NC#J9 J9
NC#L1 L1
NC#L9 L9
NC#M7
M7
NC#T7 T7
VSS A9
VSS B3
VSS E1
VSS G8
VSS J2
VSS J8
VSS M1
VSS M9
VSS P1
VSS P9
VSS T1
VSS T9
VSSQ B1
VSSQ B9
VSSQ D1
VSSQ D8
VSSQ E2
VSSQ E8
VSSQ F9
VSSQ G1
VSSQ G9
ZQ
L8
VDD
B2
VDD
D9
VDD
G7
VDD
K2 VDD
K8
VDD
N1
VDD
N9 VDD
R1
VDD
R9
VDDQ
A1 VDDQ
A8
VDDQ
C1
VDDQ
C9
VDDQ
D2
VDDQ
E9
VDDQ
F1
VDDQ
H2 VDDQ
H9
VREFCA
M8 VREFDQ
H1
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC#
N7
A13
T3
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK#
K7
CKE
K9
DML
E7 DMU
D3
CAS#
K3 WE#
L3
RAS#
J3
DQL7 H7
DQL6 G2
DQL5 H8
DQL4 H3
DQL3 F8
DQL2 F2
DQL1 F7
DQL0 E3
VRAM1
H5TQ2G63BFR-12C-GP
72.52G63.00U
2nd = 72.42164.C0U
WTL
VRAM1
H5TQ2G63BFR-12C-GP
72.52G63.00U
2nd = 72.42164.C0U
WTL
12
C8809
SC1U6D3V2KX-GP
WTL
C8809
SC1U6D3V2KX-GP
WTL
12
C8822
SC1U6D3V2KX-GP
WTL
C8822
SC1U6D3V2KX-GP
WTL
12
C8813
SC1U6D3V2KX-GP
WTL
C8813
SC1U6D3V2KX-GP
WTL
12
R8804
56R2F-1-GP
WTL
R8804
56R2F-1-GP
WTL
12
C8807
SC1U6D3V2KX-GP
WTL
C8807
SC1U6D3V2KX-GP
WTL
12
C8818
SCD1U10V2KX-5GP
WTL
C8818
SCD1U10V2KX-5GP
WTL
1 2
R8802 243R2F-2-GP
WTL
R8802 243R2F-2-GP
WTL
12
C8802
SCD01U16V2KX-3GP
WTL
C8802
SCD01U16V2KX-3GP
WTL
DQSL F3
DQSL# G3
DQSU# B7
DQSU C7
DQU0 D7
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
ODT K1
RESET# T2
CS# L2
NC#J1 J1
NC#J9 J9
NC#L1 L1
NC#L9 L9
NC#M7
M7
NC#T7 T7
VSS A9
VSS B3
VSS E1
VSS G8
VSS J2
VSS J8
VSS M1
VSS M9
VSS P1
VSS P9
VSS T1
VSS T9
VSSQ B1
VSSQ B9
VSSQ D1
VSSQ D8
VSSQ E2
VSSQ E8
VSSQ F9
VSSQ G1
VSSQ G9
ZQ
L8
VDD
B2
VDD
D9
VDD
G7
VDD
K2 VDD
K8
VDD
N1
VDD
N9 VDD
R1
VDD
R9
VDDQ
A1 VDDQ
A8
VDDQ
C1
VDDQ
C9
VDDQ
D2
VDDQ
E9
VDDQ
F1
VDDQ
H2 VDDQ
H9
VREFCA
M8 VREFDQ
H1
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC#
N7
A13
T3
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK#
K7
CKE
K9
DML
E7 DMU
D3
CAS#
K3 WE#
L3
RAS#
J3
DQL7 H7
DQL6 G2
DQL5 H8
DQL4 H3
DQL3 F8
DQL2 F2
DQL1 F7
DQL0 E3
VRAM2
H5TQ2G63BFR-12C-GP
72.52G63.00U
2nd = 72.42164.C0U
WTL
VRAM2
H5TQ2G63BFR-12C-GP
72.52G63.00U
2nd = 72.42164.C0U
WTL
12
C8817
SCD1U10V2KX-5GP
WTL
C8817
SCD1U10V2KX-5GP
WTL
12
C8819
SC1U6D3V2KX-GP
WTL
C8819
SC1U6D3V2KX-GP
WTL
12
C8815
SC1U6D3V2KX-GP
WTL
C8815
SC1U6D3V2KX-GP
WTL
![](asset-59.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VRAM_ZQ3 VRAM_ZQ4
MDA44
GPU_CLKA1_T
VRAM3_4_VREF
MDA36
MDA37
MDA32
MDA38
MDA33
MDA39
MDA34
MDA35
MDA40
MDA46
MDA45
MDA41
MDA47
MDA48
MDA57
MDA49
MDA56
MDA55
MDA60
MDA50
MDA58
MDA52
MDA63
MDA51
MDA62
MDA54
MDA61
MDA53
MDA59
MDA42
MDA43
VRAM3_4_VREFVRAM3_4_VREF
1D5V_VGA_S01D5V_VGA_S0
1D5V_VGA_S0
CASA1#84
CLKA1#84
WEA1#84
MDA[32..63] 84
CSA1#_0 84
MEM_RST 84,88,90,91
CKEA184
CASA1#84
ODTA1 84
RASA1#84
WEA1#84
DQMA584
MDA[32..63] 84
DQMA484
CSA1#_0 84
QSAP_5 84
QSAN_5 84
MEM_RST 84,88,90,91
CKEA184
ODTA1 84
CLKA184
RASA1#84
QSAP_4 84
QSAN_4 84
MAA384,88 MAA284,88 MAA184,88
MAA684,88 MAA584,88 MAA484,88
MAA984,88 MAA884,88 MAA784,88
MAA1284,88 MAA1184,88 MAA1084,88
MAA1384,88
A_BA284,88 A_BA184,88 A_BA084,88
MAA084,88
MAA384,88 MAA284,88 MAA184,88
MAA684,88 MAA584,88 MAA484,88
MAA984,88 MAA884,88 MAA784,88
MAA1284,88 MAA1184,88 MAA1084,88
MAA1384,88
A_BA284,88 A_BA184,88 A_BA084,88
MAA084,88
CLKA1#84 CLKA184
QSAN_7 84
QSAN_6 84
QSAP_7 84
QSAP_6 84
DQMA784 DQMA684
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
GPU-VRAM3,4 (2/4)
A3
89 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
GPU-VRAM3,4 (2/4)
A3
89 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
GPU-VRAM3,4 (2/4)
A3
89 94
Tuesday, November 09, 2010
<Core Design>
12
C8901
SCD1U10V2KX-5GP
WTL
C8901
SCD1U10V2KX-5GP
WTL
12
C8907
SC10U6D3V5KX-1GP
WTL
C8907
SC10U6D3V5KX-1GP
WTL
12
C8908
SC1U6D3V2KX-GP
WTL
C8908
SC1U6D3V2KX-GP
WTL
12
C8910
SC1U6D3V2KX-GP
WTL
C8910
SC1U6D3V2KX-GP
WTL
12
C8923
SCD1U10V2KX-5GP
WTL
C8923
SCD1U10V2KX-5GP
WTL
12
C8902
SC1U6D3V2KX-GP
WTL
C8902
SC1U6D3V2KX-GP
WTL
12
C8906
SC1U6D3V2KX-GP
WTL
C8906
SC1U6D3V2KX-GP
WTL
12
C8920
SC1U6D3V2KX-GP
WTL
C8920
SC1U6D3V2KX-GP
WTL
12
C8917
SCD1U10V2KX-5GP
WTL
C8917
SCD1U10V2KX-5GP
WTL
12
R8901
2K1R2F-GP
WTL
R8901
2K1R2F-GP
WTL
12
C8911
SC1U6D3V2KX-GP
WTL
C8911
SC1U6D3V2KX-GP
WTL
12
C8909
SC1U6D3V2KX-GP
WTL
C8909
SC1U6D3V2KX-GP
WTL
1 2
R8903 243R2F-2-GP
WTL
R8903 243R2F-2-GP
WTL
12
C8915
SC1U6D3V2KX-GP
WTL
C8915
SC1U6D3V2KX-GP
WTL
12
C8905
SC10U6D3V5KX-1GP
WTL
C8905
SC10U6D3V5KX-1GP
WTL
12
R8908
56R2F-1-GP
WTL
R8908
56R2F-1-GP
WTL
1 2
R8904 243R2F-2-GP
WTL
R8904 243R2F-2-GP
WTL
DQSL F3
DQSL# G3
DQSU# B7
DQSU C7
DQU0 D7
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
ODT K1
RESET# T2
CS# L2
NC#J1 J1
NC#J9 J9
NC#L1 L1
NC#L9 L9
NC#M7
M7
NC#T7 T7
VSS A9
VSS B3
VSS E1
VSS G8
VSS J2
VSS J8
VSS M1
VSS M9
VSS P1
VSS P9
VSS T1
VSS T9
VSSQ B1
VSSQ B9
VSSQ D1
VSSQ D8
VSSQ E2
VSSQ E8
VSSQ F9
VSSQ G1
VSSQ G9
ZQ
L8
VDD
B2
VDD
D9
VDD
G7
VDD
K2 VDD
K8
VDD
N1
VDD
N9 VDD
R1
VDD
R9
VDDQ
A1 VDDQ
A8
VDDQ
C1
VDDQ
C9
VDDQ
D2
VDDQ
E9
VDDQ
F1
VDDQ
H2 VDDQ
H9
VREFCA
M8 VREFDQ
H1
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC#
N7
A13
T3
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK#
K7
CKE
K9
DML
E7 DMU
D3
CAS#
K3 WE#
L3
RAS#
J3
DQL7 H7
DQL6 G2
DQL5 H8
DQL4 H3
DQL3 F8
DQL2 F2
DQL1 F7
DQL0 E3
VRAM4
H5TQ2G63BFR-12C-GP
72.52G63.00U
2nd = 72.42164.C0U
WTL
VRAM4
H5TQ2G63BFR-12C-GP
72.52G63.00U
2nd = 72.42164.C0U
WTL
12
C8919
SCD1U10V2KX-5GP
WTL
C8919
SCD1U10V2KX-5GP
WTL
12
C8914
SC1U6D3V2KX-GP
WTL
C8914
SC1U6D3V2KX-GP
WTL
12
C8903
SCD01U16V2KX-3GP
WTL
C8903
SCD01U16V2KX-3GP
WTL
12
C8916
SC10U6D3V5KX-1GP
WTL
C8916
SC10U6D3V5KX-1GP
WTL
12
C8912
SC1U6D3V2KX-GP
WTL
C8912
SC1U6D3V2KX-GP
WTL
DQSL F3
DQSL# G3
DQSU# B7
DQSU C7
DQU0 D7
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
ODT K1
RESET# T2
CS# L2
NC#J1 J1
NC#J9 J9
NC#L1 L1
NC#L9 L9
NC#M7
M7
NC#T7 T7
VSS A9
VSS B3
VSS E1
VSS G8
VSS J2
VSS J8
VSS M1
VSS M9
VSS P1
VSS P9
VSS T1
VSS T9
VSSQ B1
VSSQ B9
VSSQ D1
VSSQ D8
VSSQ E2
VSSQ E8
VSSQ F9
VSSQ G1
VSSQ G9
ZQ
L8
VDD
B2
VDD
D9
VDD
G7
VDD
K2 VDD
K8
VDD
N1
VDD
N9 VDD
R1
VDD
R9
VDDQ
A1 VDDQ
A8
VDDQ
C1
VDDQ
C9
VDDQ
D2
VDDQ
E9
VDDQ
F1
VDDQ
H2 VDDQ
H9
VREFCA
M8 VREFDQ
H1
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC#
N7
A13
T3
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK#
K7
CKE
K9
DML
E7 DMU
D3
CAS#
K3 WE#
L3
RAS#
J3
DQL7 H7
DQL6 G2
DQL5 H8
DQL4 H3
DQL3 F8
DQL2 F2
DQL1 F7
DQL0 E3
VRAM3
H5TQ2G63BFR-12C-GP
72.52G63.00U
2nd = 72.42164.C0U
WTL
VRAM3
H5TQ2G63BFR-12C-GP
72.52G63.00U
2nd = 72.42164.C0U
WTL
12
C8921
SC1U6D3V2KX-GP
WTL
C8921
SC1U6D3V2KX-GP
WTL
12
R8902
2K1R2F-GP
WTL
R8902
2K1R2F-GP
WTL
12
C8922
SCD1U10V2KX-5GP
WTL
C8922
SCD1U10V2KX-5GP
WTL
12
C8913
SC1U6D3V2KX-GP
WTL
C8913
SC1U6D3V2KX-GP
WTL
12
R8907
56R2F-1-GP
WTL
R8907
56R2F-1-GP
WTL
12
C8918
SC10U6D3V5KX-1GP
WTL
C8918
SC10U6D3V5KX-1GP
WTL
![](asset-5a.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VRAM_ZQ5 VRAM_ZQ6
MDB16
MDB19
GPU_CLKB0_T
VRAM5_6_VREF
MDB0
MDB30
MDB13
MDB8
MDB10
MDB5
MDB25 MDB7
MDB29
MDB14
MDB15
MDB3
MDB28
MDB2
MDB26 MDB1
MDB11
MDB24 MDB4
MDB27
MDB9
MDB6
MDB31
MDB12
MDB17
MDB21
MDB23
MDB22
MDB20
MDB18
VRAM5_6_VREFVRAM5_6_VREF
1D5V_VGA_S01D5V_VGA_S0
1D5V_VGA_S0
DQMB284
CASB0#84
CLKB0#84
WEB0#84
MDB[0..31] 84
CSB0#_0 84
MEM_RST 84,88,89,91
CKEB084
CASB0#84
ODTB0 84
RASB0#84
WEB0#84
MDB[0..31] 84
CSB0#_0 84
MEM_RST 84,88,89,91
CKEB084
ODTB0 84
CLKB084
RASB0#84
QSBP_2 84
QSBN_2 84
MAB384,91 MAB284,91 MAB184,91
MAB684,91 MAB584,91 MAB484,91
MAB984,91 MAB884,91 MAB784,91
MAB1284,91 MAB1184,91 MAB1084,91
MAB1384,91
B_BA284,91 B_BA184,91 B_BA084,91
MAB084,91
MAB384,91 MAB284,91 MAB184,91
MAB684,91 MAB584,91 MAB484,91
MAB984,91 MAB884,91 MAB784,91
MAB1284,91 MAB1184,91 MAB1084,91
MAB1384,91
B_BA284,91 B_BA184,91 B_BA084,91
MAB084,91
CLKB0#84 CLKB084
QSBN_3 84 QSBN_0 84
QSBP_0 84QSBP_3 84
QSBP_1 84
QSBN_1 84
DQMB384 DQMB184 DQMB084
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
GPU-VRAM5,6 (3/4)
A3
90 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
GPU-VRAM5,6 (3/4)
A3
90 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
GPU-VRAM5,6 (3/4)
A3
90 94
Tuesday, November 09, 2010
<Core Design>
20090902
12
C9002
SC1U6D3V2KX-GP
PX
C9002
SC1U6D3V2KX-GP
PX
12
C9014
SC10U6D3V5KX-1GP
PX
C9014
SC10U6D3V5KX-1GP
PX
12
C9018
SC1U6D3V2KX-GP
PX
C9018
SC1U6D3V2KX-GP
PX
12
C9016
SCD1U10V2KX-5GP
PX
C9016
SCD1U10V2KX-5GP
PX
DQSL F3
DQSL# G3
DQSU# B7
DQSU C7
DQU0 D7
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
ODT K1
RESET# T2
CS# L2
NC#J1 J1
NC#J9 J9
NC#L1 L1
NC#L9 L9
NC#M7
M7
NC#T7 T7
VSS A9
VSS B3
VSS E1
VSS G8
VSS J2
VSS J8
VSS M1
VSS M9
VSS P1
VSS P9
VSS T1
VSS T9
VSSQ B1
VSSQ B9
VSSQ D1
VSSQ D8
VSSQ E2
VSSQ E8
VSSQ F9
VSSQ G1
VSSQ G9
ZQ
L8
VDD
B2
VDD
D9
VDD
G7
VDD
K2 VDD
K8
VDD
N1
VDD
N9 VDD
R1
VDD
R9
VDDQ
A1 VDDQ
A8
VDDQ
C1
VDDQ
C9
VDDQ
D2
VDDQ
E9
VDDQ
F1
VDDQ
H2 VDDQ
H9
VREFCA
M8 VREFDQ
H1
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC#
N7
A13
T3
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK#
K7
CKE
K9
DML
E7 DMU
D3
CAS#
K3 WE#
L3
RAS#
J3
DQL7 H7
DQL6 G2
DQL5 H8
DQL4 H3
DQL3 F8
DQL2 F2
DQL1 F7
DQL0 E3
VRAM6
H5TQ2G63BFR-12C-GP
72.52G63.00U
2nd = 72.42164.C0U
PX
VRAM6
H5TQ2G63BFR-12C-GP
72.52G63.00U
2nd = 72.42164.C0U
PX
12
C9007
SC10U6D3V5KX-1GP
PX
C9007
SC10U6D3V5KX-1GP
PX
12
C9021
SC1U6D3V2KX-GP
PX
C9021
SC1U6D3V2KX-GP
PX
DQSL F3
DQSL# G3
DQSU# B7
DQSU C7
DQU0 D7
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
ODT K1
RESET# T2
CS# L2
NC#J1 J1
NC#J9 J9
NC#L1 L1
NC#L9 L9
NC#M7
M7
NC#T7 T7
VSS A9
VSS B3
VSS E1
VSS G8
VSS J2
VSS J8
VSS M1
VSS M9
VSS P1
VSS P9
VSS T1
VSS T9
VSSQ B1
VSSQ B9
VSSQ D1
VSSQ D8
VSSQ E2
VSSQ E8
VSSQ F9
VSSQ G1
VSSQ G9
ZQ
L8
VDD
B2
VDD
D9
VDD
G7
VDD
K2 VDD
K8
VDD
N1
VDD
N9 VDD
R1
VDD
R9
VDDQ
A1 VDDQ
A8
VDDQ
C1
VDDQ
C9
VDDQ
D2
VDDQ
E9
VDDQ
F1
VDDQ
H2 VDDQ
H9
VREFCA
M8 VREFDQ
H1
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC#
N7
A13
T3
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK#
K7
CKE
K9
DML
E7 DMU
D3
CAS#
K3 WE#
L3
RAS#
J3
DQL7 H7
DQL6 G2
DQL5 H8
DQL4 H3
DQL3 F8
DQL2 F2
DQL1 F7
DQL0 E3
VRAM5
H5TQ2G63BFR-12C-GP
72.52G63.00U
2nd = 72.42164.C0U
PX
VRAM5
H5TQ2G63BFR-12C-GP
72.52G63.00U
2nd = 72.42164.C0U
PX
12
C9005
SC10U6D3V5KX-1GP
PX
C9005
SC10U6D3V5KX-1GP
PX
12
C9020
SCD1U10V2KX-5GP
PX
C9020
SCD1U10V2KX-5GP
PX
12
R9008
56R2F-1-GP
PX
R9008
56R2F-1-GP
PX
12
C9009
SC1U6D3V2KX-GP
PX
C9009
SC1U6D3V2KX-GP
PX
12
C9001
SCD1U10V2KX-5GP
PX
C9001
SCD1U10V2KX-5GP
PX
12
C9023
SC1U6D3V2KX-GP
PX
C9023
SC1U6D3V2KX-GP
PX
12
C9003
SCD01U16V2KX-3GP
PX
C9003
SCD01U16V2KX-3GP
PX
12
C9012
SC1U6D3V2KX-GP
PX
C9012
SC1U6D3V2KX-GP
PX
12
C9019
SC1U6D3V2KX-GP
PX
C9019
SC1U6D3V2KX-GP
PX
12
C9017
SC1U6D3V2KX-GP
PX
C9017
SC1U6D3V2KX-GP
PX
12
C9015
SC1U6D3V2KX-GP
PX
C9015
SC1U6D3V2KX-GP
PX
12
R9007
56R2F-1-GP
PX
R9007
56R2F-1-GP
PX
12
C9006
SCD1U10V2KX-5GP
PX
C9006
SCD1U10V2KX-5GP
PX
12
R9001
2K1R2F-GP
PX
R9001
2K1R2F-GP
PX
12
C9010
SC1U6D3V2KX-GP
PX
C9010
SC1U6D3V2KX-GP
PX
1 2
R9006 243R2F-2-GP
PX
R9006 243R2F-2-GP
PX
12
C9008
SCD1U10V2KX-5GP
PX
C9008
SCD1U10V2KX-5GP
PX
12
C9011
SC1U6D3V2KX-GP
PX
C9011
SC1U6D3V2KX-GP
PX
12
C9022
SC1U6D3V2KX-GP
PX
C9022
SC1U6D3V2KX-GP
PX
12
R9002
2K1R2F-GP
PX
R9002
2K1R2F-GP
PX
12
C9013
SC10U6D3V5KX-1GP
PX
C9013
SC10U6D3V5KX-1GP
PX
1 2
R9004 243R2F-2-GP
PX
R9004 243R2F-2-GP
PX
![](asset-5b.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VRAM_ZQ7 VRAM_ZQ8
MDB58
MDB59
GPU_CLKB1_T
VRAM7_8_VREF
MDB33
MDB45
MDB37
MDB44
MDB35
MDB41
MDB36
MDB40
MDB32
MDB43
MDB38
MDB46
MDB39
MDB42
MDB47
MDB34
MDB48
MDB53
MDB49
MDB51
MDB50
MDB55
MDB56
MDB61
MDB57
MDB62
MDB52
MDB54
MDB60
MDB63
VRAM7_8_VREFVRAM7_8_VREF
1D5V_VGA_S01D5V_VGA_S0
1D5V_VGA_S0
CASB1#84
CLKB1#84
WEB1#84
DQMB784
MDB[32..63] 84
DQMB684
CSB1#_0 84
QSBP_7 84
QSBN_7 84
MEM_RST 84,88,89,90
CKEB184
CASB1#84
ODTB1 84
RASB1#84
QSBP_6 84
QSBN_6 84
WEB1#84
MDB[32..63] 84
CSB1#_0 84
MEM_RST 84,88,89,90
CKEB184
ODTB1 84
CLKB184
RASB1#84
MAB384,90 MAB284,90 MAB184,90
MAB684,90 MAB584,90 MAB484,90
MAB984,90 MAB884,90 MAB784,90
MAB1284,90 MAB1184,90 MAB1084,90
MAB1384,90
B_BA284,90 B_BA184,90 B_BA084,90
MAB084,90
MAB384,90 MAB284,90 MAB184,90
MAB684,90 MAB584,90 MAB484,90
MAB984,90 MAB884,90 MAB784,90
MAB1284,90 MAB1184,90 MAB1084,90
MAB1384,90
B_BA284,90 B_BA184,90 B_BA084,90
MAB084,90
CLKB1#84 CLKB184
QSBP_4 84
QSBN_4 84
QSBP_5 84
QSBN_5 84
DQMB584 DQMB484
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
GPU-VRAM7,8 (4/4)
A3
91 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
GPU-VRAM7,8 (4/4)
A3
91 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
GPU-VRAM7,8 (4/4)
A3
91 94
Tuesday, November 09, 2010
<Core Design>
20100712 V1.5
20100712 V1.5 20100712 V1.5
12
C9109
SC1U6D3V2KX-GP
PX
C9109
SC1U6D3V2KX-GP
PX
12
C9123
SCD1U10V2KX-5GP
PX
C9123
SCD1U10V2KX-5GP
PX
12
C9105
SC10U6D3V5KX-1GP
PX
C9105
SC10U6D3V5KX-1GP
PX
12
C9113
SC1U6D3V2KX-GP
PX
C9113
SC1U6D3V2KX-GP
PX
12
C9108
SC1U6D3V2KX-GP
PX
C9108
SC1U6D3V2KX-GP
PX
DQSL F3
DQSL# G3
DQSU# B7
DQSU C7
DQU0 D7
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
ODT K1
RESET# T2
CS# L2
NC#J1 J1
NC#J9 J9
NC#L1 L1
NC#L9 L9
NC#M7
M7
NC#T7 T7
VSS A9
VSS B3
VSS E1
VSS G8
VSS J2
VSS J8
VSS M1
VSS M9
VSS P1
VSS P9
VSS T1
VSS T9
VSSQ B1
VSSQ B9
VSSQ D1
VSSQ D8
VSSQ E2
VSSQ E8
VSSQ F9
VSSQ G1
VSSQ G9
ZQ
L8
VDD
B2
VDD
D9
VDD
G7
VDD
K2 VDD
K8
VDD
N1
VDD
N9 VDD
R1
VDD
R9
VDDQ
A1 VDDQ
A8
VDDQ
C1
VDDQ
C9
VDDQ
D2
VDDQ
E9
VDDQ
F1
VDDQ
H2 VDDQ
H9
VREFCA
M8 VREFDQ
H1
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC#
N7
A13
T3
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK#
K7
CKE
K9
DML
E7 DMU
D3
CAS#
K3 WE#
L3
RAS#
J3
DQL7 H7
DQL6 G2
DQL5 H8
DQL4 H3
DQL3 F8
DQL2 F2
DQL1 F7
DQL0 E3
VRAM7
H5TQ2G63BFR-12C-GP
72.52G63.00U
2nd = 72.42164.C0U
PX
VRAM7
H5TQ2G63BFR-12C-GP
72.52G63.00U
2nd = 72.42164.C0U
PX
12
C9114
SC1U6D3V2KX-GP
PX
C9114
SC1U6D3V2KX-GP
PX
12
C9118
SC1U6D3V2KX-GP
PX
C9118
SC1U6D3V2KX-GP
PX
12
C9115
SC10U6D3V5KX-1GP
PX
C9115
SC10U6D3V5KX-1GP
PX
12
C9116
SC10U6D3V5KX-1GP
PX
C9116
SC10U6D3V5KX-1GP
PX
12
C9121
SC1U6D3V2KX-GP
PX
C9121
SC1U6D3V2KX-GP
PX
12
R9108
56R2F-1-GP
PX
R9108
56R2F-1-GP
PX
12
C9120
SC1U6D3V2KX-GP
PX
C9120
SC1U6D3V2KX-GP
PX
12
C9107
SC1U6D3V2KX-GP
PX
C9107
SC1U6D3V2KX-GP
PX
12
C9111
SCD1U10V2KX-5GP
PX
C9111
SCD1U10V2KX-5GP
PX
12
C9119
SCD1U10V2KX-5GP
PX
C9119
SCD1U10V2KX-5GP
PX
12
C9117
SC1U6D3V2KX-GP
PX
C9117
SC1U6D3V2KX-GP
PX
12
R9107
56R2F-1-GP
PX
R9107
56R2F-1-GP
PX
12
C9112
SC1U6D3V2KX-GP
PX
C9112
SC1U6D3V2KX-GP
PX
12
C9102
SC1U6D3V2KX-GP
PX
C9102
SC1U6D3V2KX-GP
PX
DQSL F3
DQSL# G3
DQSU# B7
DQSU C7
DQU0 D7
DQU1 C3
DQU2 C8
DQU3 C2
DQU4 A7
DQU5 A2
DQU6 B8
DQU7 A3
ODT K1
RESET# T2
CS# L2
NC#J1 J1
NC#J9 J9
NC#L1 L1
NC#L9 L9
NC#M7
M7
NC#T7 T7
VSS A9
VSS B3
VSS E1
VSS G8
VSS J2
VSS J8
VSS M1
VSS M9
VSS P1
VSS P9
VSS T1
VSS T9
VSSQ B1
VSSQ B9
VSSQ D1
VSSQ D8
VSSQ E2
VSSQ E8
VSSQ F9
VSSQ G1
VSSQ G9
ZQ
L8
VDD
B2
VDD
D9
VDD
G7
VDD
K2 VDD
K8
VDD
N1
VDD
N9 VDD
R1
VDD
R9
VDDQ
A1 VDDQ
A8
VDDQ
C1
VDDQ
C9
VDDQ
D2
VDDQ
E9
VDDQ
F1
VDDQ
H2 VDDQ
H9
VREFCA
M8 VREFDQ
H1
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC#
N7
A13
T3
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK#
K7
CKE
K9
DML
E7 DMU
D3
CAS#
K3 WE#
L3
RAS#
J3
DQL7 H7
DQL6 G2
DQL5 H8
DQL4 H3
DQL3 F8
DQL2 F2
DQL1 F7
DQL0 E3
VRAM8
H5TQ2G63BFR-12C-GP
72.52G63.00U
2nd = 72.42164.C0U
PX
VRAM8
H5TQ2G63BFR-12C-GP
72.52G63.00U
2nd = 72.42164.C0U
PX
12
C9122
SC1U6D3V2KX-GP
PX
C9122
SC1U6D3V2KX-GP
PX
12
R9101
2K1R2F-GP
PX
R9101
2K1R2F-GP
PX
1 2
R9104 243R2F-2-GP
PX
R9104 243R2F-2-GP
PX
12
C9101
SCD1U10V2KX-5GP
PX
C9101
SCD1U10V2KX-5GP
PX
12
R9102
2K1R2F-GP
PX
R9102
2K1R2F-GP
PX
12
C9106
SC10U6D3V5KX-1GP
PX
C9106
SC10U6D3V5KX-1GP
PX
12
C9110
SCD1U10V2KX-5GP
PX
C9110
SCD1U10V2KX-5GP
PX
1 2
R9103 243R2F-2-GP
PX
R9103 243R2F-2-GP
PX
12
C9103
SCD01U16V2KX-3GP
PX
C9103
SCD01U16V2KX-3GP
PX
![](asset-5c.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PWR_VGA_CORE_BOOT
PWR_VGA_CORE_VDD
PWR_VGA_CORE_PGOOD
PWR_VGA_CORE_TON
PWR_VGA_CORE_D0
PWR_VGA_CORE_FB
PWR_VGA_CORE_VOUT
PWR_VGA_CORE_D0
PWR_VGA_CORE_FB
PWR_VGA_CORE_D1
PWR_VGA_CORE_BOOT_C
PWR_VGA_CORE_LGATE
PWR_VGA_CORE_CS
PWR_VGA_CORE_D1
PWR_VGA_CORE_EN_R#
8209A_EN/DEM_VGA PQ9206_3
PWR_VGA_CORE_PGOOD
PWR_VGA_CORE_PHASE
PWR_VGA_CORE_UGATE
PWR_GND_SENSE_1
PWR_VGA_CORE_VOUT
3D3V_VGA_S0
5V_PWR
VGA_CORE_PWR
3D3V_AUX_S5
DCBATOUT PWR_DCBATOUT_VGA_CORE VGA_CORE VGA_CORE_PWR VGA_CORE
PWR_DCBATOUT_VGA_CORE
VGA_CORE_PWR
3D3V_VGA_S0
8209A_EN/DEM_VGA86
PWRCNTL_0 85
VGA_SENSE86
PWRCNTL_1 85
GND_SENSE86
DGPU_PWR_EN93 8209A_EN/DEM_VGA 86
DGPU_PWROK 22,93
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
RT8208B_+VGA_CORE
A3
92 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
RT8208B_+VGA_CORE
A3
92 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
RT8208B_+VGA_CORE
A3
92 94
Tuesday, November 09, 2010
<Core Design>
OUT=(R9208+R9210)/R9210
MADSION PRO
GPU VOLTAGE L: 1.12V
GPU VOLTAGE H: 0.90V
GPIO TABLEI/O Inter
Pull Low
PARK XT
YES
GPIO TABLE
GPU VOLTAGE L: 1.00V
GPU VOLTAGE H: 0.90V
NVVDD_ALTV0
I/O
O
Inter
Pull Low
H
NVVDD_ALTV0 +VGA_CORE
H
NVVDD_ALTV1
H
L
0.9V
1.12V or 1V
OUT=[R9208+(R9210//R9209)}/(R9210//R9209)
Park==>R9209=33K (64.33025.6DL)
Madison==>R9209=71.5K (64.71525.6DL)
SSID = PWR.Plane.Regulator_GFX
Vout=0.75V*(R1+R2)/R2
RT8208B:74.08208.A73
Design Current = 21.94A
24.14A<OCP< 28.53A
12
PC9205
SC10U25V5KX-GP
PX
PC9205
SC10U25V5KX-GP
PX
1 2
PG9226
GAP-CLOSE-PWR-3-GP
PG9226
GAP-CLOSE-PWR-3-GP
1 2
PG9227
GAP-CLOSE-PWR-3-GP
PG9227
GAP-CLOSE-PWR-3-GP
1 2
PG9206
GAP-CLOSE-PWR-3-GP
PG9206
GAP-CLOSE-PWR-3-GP
12
R9201
10R2F-L-GP
PX
R9201
10R2F-L-GP
PX
12
PC9211
SC10U25V5KX-GP
PX
PC9211
SC10U25V5KX-GP
PX
12
PC9210
SC10U25V5KX-GP
PX
PC9210
SC10U25V5KX-GP
PX
12
PC9207
SC10U25V5KX-GP
PX
PC9207
SC10U25V5KX-GP
PX
1
2
3 4
5
6
PQ9201
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
DY
PQ9201
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
DY
12
C9211
SCD1U10V2KX-5GP
DY
C9211
SCD1U10V2KX-5GP
DY
12
PC9206
SCD1U10V2KX-5GP
PX
PC9206
SCD1U10V2KX-5GP
PX
12
PR9208
10KR2F-2-GP
PX
PR9208
10KR2F-2-GP
PX
1
23
4
56
7
S
S
GD
D
D
D
PU9204
IRF6725MTRPBF-GP-U
84.06725.030
PX
S
S
GD
D
D
D
PU9204
IRF6725MTRPBF-GP-U
84.06725.030
PX
1 2
PR9204
2R3J-2-GP
PX
PR9204
2R3J-2-GP
PX
1 2
PG9203
GAP-CLOSE-PWR-3-GP
PG9203
GAP-CLOSE-PWR-3-GP
K A
D9201
CH551H-30GP-GP
DY
D9201
CH551H-30GP-GP
DY
1 2
PR9201
0R0402-PAD
PR9201
0R0402-PAD
12
PTC9203
SE470UF2VDM-GP
PX
PTC9203
SE470UF2VDM-GP
PX
12
C9201
SC1U10V2KX-1GP
PX
C9201
SC1U10V2KX-1GP
PX
12
PC9208
SC10P50V2JN-4GP
DY
PC9208
SC10P50V2JN-4GP
DY
1 2
PG9201
GAP-CLOSE-PWR-3-GP
PG9201
GAP-CLOSE-PWR-3-GP
12
PC9201
SC1KP50V2KX-1GP
DY
PC9201
SC1KP50V2KX-1GP
DY
1 2
PR9215
100R2J-2-GP
DY
PR9215
100R2J-2-GP
DY
1 2
PL9201 L-D36UH-1-GP
PX
PL9201 L-D36UH-1-GP
PX
1 2
PG9218
GAP-CLOSE-PWR-3-GP
PG9218
GAP-CLOSE-PWR-3-GP
12
R9211
49K9R2F-L-GP
DY
R9211
49K9R2F-L-GP
DY
12
R9213
10KR2J-3-GP
PX
R9213
10KR2J-3-GP
PX
1
23
45
6
S
G
D
D
D
D
PU9202
IRF6721SPBF-GP-U
84.06721.030
PX
S
G
D
D
D
D
PU9202
IRF6721SPBF-GP-U
84.06721.030
PX
1 2
PG9208
GAP-CLOSE-PWR-3-GP
PG9208
GAP-CLOSE-PWR-3-GP
12
C9212
SC100P50V2JN-3GP
PX
C9212
SC100P50V2JN-3GP
PX
1 2
PR9205
6K34R2F-GP
PX
PR9205
6K34R2F-GP
PX
VOUT 1
VDD
2
FB 3
PGOOD
4
D1 5
D0 6
G0 7
LGATE 8
VDDP
9
CS
10
PHASE 11
UGATE 12
BOOT 13
G1 14
EM/DEM
15
TON
16
GND
17
PU9201
RT8208BGQW-GP
PX
PU9201
RT8208BGQW-GP
PX
1 2
PG9219
GAP-CLOSE-PWR-3-GP
PG9219
GAP-CLOSE-PWR-3-GP
12
PR9213
10R2J-2-GP
PX
PR9213
10R2J-2-GP
PX
1 2
PR9203 249KR2F-GP
PX
PR9203 249KR2F-GP
PX
1 2
PG9209
GAP-CLOSE-PWR-3-GP
PG9209
GAP-CLOSE-PWR-3-GP
1 2
PG9216
GAP-CLOSE-PWR-3-GP
PG9216
GAP-CLOSE-PWR-3-GP
1 2
PG9220
GAP-CLOSE-PWR-3-GP
PG9220
GAP-CLOSE-PWR-3-GP
1 2
PR9214
100KR2J-1-GP
DY
PR9214
100KR2J-1-GP
DY
1 2
PG9210
GAP-CLOSE-PWR-3-GP
PG9210
GAP-CLOSE-PWR-3-GP
1 2
PG9204
GAP-CLOSE-PWR-3-GP
PG9204
GAP-CLOSE-PWR-3-GP
1 2
PG9221
GAP-CLOSE-PWR-3-GP
PG9221
GAP-CLOSE-PWR-3-GP
12
C9202
SC1U10V2KX-1GP
PX
C9202
SC1U10V2KX-1GP
PX
1 2
R9214
0R0402-PAD
R9214
0R0402-PAD
12
R9210
49K9R2F-L-GP
PX
R9210
49K9R2F-L-GP
PX
1 2
PG9211
GAP-CLOSE-PWR-3-GP
PG9211
GAP-CLOSE-PWR-3-GP
1 2
PG9222
GAP-CLOSE-PWR-3-GP
PG9222
GAP-CLOSE-PWR-3-GP
1 2
PG9202
GAP-CLOSE-PWR-3-GP
PG9202
GAP-CLOSE-PWR-3-GP
1 2
PG9212
GAP-CLOSE-PWR-3-GP
PG9212
GAP-CLOSE-PWR-3-GP
12
PR9206
10R2J-2-GP
PX
PR9206
10R2J-2-GP
PX
12
PC9209
SCD1U10V2KX-5GP
DY
PC9209
SCD1U10V2KX-5GP
DY
12
PTC9202
SE470UF2VDM-GP
PX
PTC9202
SE470UF2VDM-GP
PX
1 2
PG9223
GAP-CLOSE-PWR-3-GP
PG9223
GAP-CLOSE-PWR-3-GP
12
PG9205
GAP-CLOSE-PWR-3-GP
PG9205
GAP-CLOSE-PWR-3-GP
12
R9212
10KR2F-2-GP
PX
R9212
10KR2F-2-GP
PX
1 2
PG9213
GAP-CLOSE-PWR-3-GP
PG9213
GAP-CLOSE-PWR-3-GP
1 2
PG9224
GAP-CLOSE-PWR-3-GP
PG9224
GAP-CLOSE-PWR-3-GP
1
TP9201
TPAD40-GP
TP9201
TPAD40-GP
1 2
PG9214
GAP-CLOSE-PWR-3-GP
PG9214
GAP-CLOSE-PWR-3-GP
1 2
PR9212
0R2J-2-GP
PX
PR9212
0R2J-2-GP
PX
1 2
PR9207 0R2J-2-GP
PX
PR9207 0R2J-2-GP
PX
1 2
PG9217
GAP-CLOSE-PWR-3-GP
PG9217
GAP-CLOSE-PWR-3-GP
1 2
PG9225
GAP-CLOSE-PWR-3-GP
PG9225
GAP-CLOSE-PWR-3-GP
1 2
PC9203
SCD1U25V3KX-GP
PX
PC9203
SCD1U25V3KX-GP
PX
12
R9209
33KR2F-GP
PX
R9209
33KR2F-GP
PX
1 2
PG9207
GAP-CLOSE-PWR-3-GP
PG9207
GAP-CLOSE-PWR-3-GP
1 2
PG9215
GAP-CLOSE-PWR-3-GP
PG9215
GAP-CLOSE-PWR-3-GP
1 2
PR9202
0R0402-PAD
PR9202
0R0402-PAD
![](asset-5d.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
3.3V_RUN_VGA_1
DGPU_PWR_EN
3.3V_ALW_1
RUNON_R_1
9025_FB
9025_PGOOD_1V
RUNON_R
DIS_EN_1D5_RUN_R
9025_ADJ_VGA
9025_PGOOD_1V 9025_EN_VGA
1D8V_S0_VGA_PG 9025_PGOOD_VGA
9025_EN
9025_PGOOD_1V
DIS_EN_1D5_RUN
DIS_FBVDD
DIS_EN_1D5_RUN
SLG_RUN_ENABLE_VGA
3D3V_S0
3D3V_VGA_S0
5V_S5
1V_VGA_S0
1D5V_S3
1DV_M92_PWR
3D3V_VGA_S0
1D5V_S3 1D5V_VGA_S0
5V_S5
1D8V_LDO_VGA
1D8V_VGA_S0
3D3V_S5
RUN_ENABLE
3D3V_S0
3D3V_VGA_S0
3D3V_VGA_S0
1D5V_VGA_S0
RUNON_R_1
1D5V_VGA_S05V_S5 5V_S5
RUNON_R_1
1D8V_S0_VGA_PG83
DGPU_PWROK22,92
DGPU_PWROK22,92
DGPU_PWR_EN 92
DGPU_PWR_EN92
DGPU_PWROK22,92
DGPU_PWR_EN#18
DGPU_PWR_EN92
DGPU_PWR_EN92
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
DISCRETE VGA POWER
C
93 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
DISCRETE VGA POWER
C
93 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
DISCRETE VGA POWER
C
93 94
Tuesday, November 09, 2010
<Core Design>
Iomax=1A
OCP>1.35A
Iomax=1.5A
+3VS to 3.3V_DELAY Transfer
Vo=0.8*(1+(R1/R2))
RT9025 for 1V_VGA
RT9025 for 1D8V_VGA
Vo(cal.)=1.8069V
Vo=0.8*((R1+R2)/R2)
DIS mode:R9309,R9311 follow Old Sequence
PX_Muxless :R9310,C9308,R9320,C9304 value
need fine tune for BACO sequecne
1D5V_VGA_S0
20100629 V1.3
20100629 V1.3
Discharge Circuit
Reserved PD9301 connect DGPU_PWR_EN to
PWR_1D5V_EN for power down sequence.
Reserved PD9302 connect DGPU_PWR_EN to
PWR_1V_EN for power down sequence.
Reserved PD9303 connect DGPU_PWR_EN to
PWR_1D8V_EN for power down sequence.
20100629 V1.3
20100629 V1.3
20100629 V1.3 DIS mode:R9309,R9311 follow Old Sequence
PX_Muxless :R9310,C9308,R9320,C9304 value
need fine tune for BACO sequecne
20100805 V1.8
N/A 74.09661.07D
74.09025.A3D
GMT
RICHTEK
Description Lenovo P/N Wistron P/N
N/ART9025-25GSP
G9661-25ADJF11U
Supplier
Table 93.1- Adjustable LDO Regulator multi-source
12
G9304
GAP-CLOSE-PWR
G9304
GAP-CLOSE-PWR
12
C9309
SC100P50V2JN-3GP
PX
C9309
SC100P50V2JN-3GP
PX
12
C9313
SC10U6D3V5KX-1GP
PX
C9313
SC10U6D3V5KX-1GP
PX
K A
D9302
CH551H-30GP-GP
DY
D9302
CH551H-30GP-GP
DY
12
C9306
SC10U6D3V5KX-1GP
PX
C9306
SC10U6D3V5KX-1GP
PX
PGOOD
1EN
2VIN
3VDD
4NC#5 5
VOUT 6
ADJ 7
GND 8
GND 9
U9303
RT9025-25GSP-GP
PX
U9303
RT9025-25GSP-GP
PX
12
R9313
2K2R2J-2-GP
PX
R9313
2K2R2J-2-GP
PX
12
C9303
SCD1U10V2KX-5GP
PX
C9303
SCD1U10V2KX-5GP
PX
12
C9311
SC10U6D3V5KX-1GP
PX
C9311
SC10U6D3V5KX-1GP
PX
12
C9305
SC10U6D3V5KX-1GP
PX
C9305
SC10U6D3V5KX-1GP
PX
1
2
3
45
6
7
8
S
S
S
D
D
D
D
G
U9301
SIR460DP-T1-GE3-GP
PX
S
S
S
D
D
D
D
G
U9301
SIR460DP-T1-GE3-GP
PX
12
TC9302
ST100U6D3VBM-5GP
77.C1071.081
PX
2nd = 77.21071.07L
TC9302
ST100U6D3VBM-5GP
77.C1071.081
PX
2nd = 77.21071.07L
12
C9318
SC10U6D3V5KX-1GP
DY
C9318
SC10U6D3V5KX-1GP
DY
G
S
D
Q9305
2N7002K-2-GP
84.2N702.J31
PX
2nd = 84.2N702.031
Q9305
2N7002K-2-GP
84.2N702.J31
PX
2nd = 84.2N702.031
12
C9304
SC1U10V3ZY-6GP
PX
C9304
SC1U10V3ZY-6GP
PX
12
G9305
GAP-CLOSE-PWR
G9305
GAP-CLOSE-PWR
1 2
R9320 10KR2F-2-GP
PX
R9320 10KR2F-2-GP
PX
12
R9321
470R2J-2-GP
PX
R9321
470R2J-2-GP
PX
12
R9304
100R2J-2-GP
PX
R9304
100R2J-2-GP
PX
1 2
R9310
10KR2F-2-GP
PX
R9310
10KR2F-2-GP
PX
G
DS
Q9303
NDS0610-G-GP
Q9303
NDS0610-G-GP
12
C9316
SC100P50V2JN-3GP
DY
C9316
SC100P50V2JN-3GP
DY
12
C9317
SC10U6D3V5KX-1GP
PX
C9317
SC10U6D3V5KX-1GP
PX
12
G9303
GAP-CLOSE-PWR
G9303
GAP-CLOSE-PWR
12
R9312
5K1R2F-2-GP
PX
R9312
5K1R2F-2-GP
PX
1 2
R9303
20KR2F-L-GP
PX
R9303
20KR2F-L-GP
PX
12
C9312
SC10U6D3V5KX-1GP
DY
C9312
SC10U6D3V5KX-1GP
DY
SD
G
G
D
Q9302
DMP2130L-7-GP
2ND = 84.03413.A31
PX
84.02130.031
G
D
Q9302
DMP2130L-7-GP
2ND = 84.03413.A31
PX
84.02130.031
VCC
1
ON
2
DIS2
3
GND
4
D5
S/DIS1 6
G1/G2 7
PG 8
NC#9 9
U9304
SLG55221-130010VTR-GP
74.55221.0E3
U9304
SLG55221-130010VTR-GP
74.55221.0E3
12
TC9301
ST330U2D5VDM-13GP
77.C3371.10L
PX
2nd = 79.33719.20D
TC9301
ST330U2D5VDM-13GP
77.C3371.10L
PX
2nd = 79.33719.20D
12
R9314
20KR2F-L-GP
PX
R9314
20KR2F-L-GP
PX
1 2
R9315
0R2J-2-GP
PX
R9315
0R2J-2-GP
PX
1 2
C9308
SCD1U25V3KX-GP
PX
C9308
SCD1U25V3KX-GP
PX
1 2
R9308
10KR2F-2-GP
PX
R9308
10KR2F-2-GP
PX
1 2
R9311 0R2J-2-GP
DY
R9311 0R2J-2-GP
DY
12
R9322
0R2J-2-GP
DY
R9322
0R2J-2-GP
DY
12
C9302
SCD1U16V2KX-3GP
PX
C9302
SCD1U16V2KX-3GP
PX
12
C9314
SC1U6D3V2KX-GP
PX
C9314
SC1U6D3V2KX-GP
PX
1 2
R9319
0R2J-2-GP
PX
R9319
0R2J-2-GP
PX
K A
D9303
CH551H-30GP-GP
DY
D9303
CH551H-30GP-GP
DY
1
2
3 4
5
6
Q9301
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
PX
Q9301
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
PX
12
R9307
330KR2J-L1-GP
PX
R9307
330KR2J-L1-GP
PX
12
G9302
GAP-CLOSE-PWR
G9302
GAP-CLOSE-PWR
12
C9315
SCD1U10V2KX-5GP
DY
C9315
SCD1U10V2KX-5GP
DY
1 2
R9305
330KR2J-L1-GP
PX
R9305
330KR2J-L1-GP
PX
12
C9301
SC10U6D3V5KX-1GP
PX
C9301
SC10U6D3V5KX-1GP
PX
12
G9301
GAP-CLOSE-PWR
G9301
GAP-CLOSE-PWR
12
R9302
100KR2J-1-GP
PX
R9302
100KR2J-1-GP
PX
12
R9318
14K3R2F-GP
PX
R9318
14K3R2F-GP
PX
G
S
D
Q9306
2N7002K-2-GP
84.2N702.J31
PX
2nd = 84.2N702.031
Q9306
2N7002K-2-GP
84.2N702.J31
PX
2nd = 84.2N702.031
12
C9307
SC1U10V3ZY-6GP
PX
C9307
SC1U10V3ZY-6GP
PX
12
C9310
SC10U6D3V5KX-1GP
PX
C9310
SC10U6D3V5KX-1GP
PX
K A
D9301
CH551H-30GP-GP
DY
D9301
CH551H-30GP-GP
DY
PGOOD
1EN
2VIN
3VDD
4NC#5 5
VOUT 6
ADJ 7
GND 8
GND 9
U9302
RT9025-25GSP-GP
PX
U9302
RT9025-25GSP-GP
PX
1 2
R9309 0R2J-2-GP
DY
R9309 0R2J-2-GP
DY
G
S
D
Q9304
2N7002K-2-GP
84.2N702.J31
PX
2nd = 84.2N702.031
Q9304
2N7002K-2-GP
84.2N702.J31
PX
2nd = 84.2N702.031
12
R9306
100KR2J-1-GP
PX
R9306
100KR2J-1-GP
PX
12
R9316
18KR2F-GP
PX
R9316
18KR2F-GP
PX
1 2
R9301 0R5J-5-GP
PX
R9301 0R5J-5-GP
PX
12
R9317
10KR2F-2-GP
PX
R9317
10KR2F-2-GP
PX
![](asset-5e.png)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DCBATOUT
3D3V_S5
3D3V_S0
1D5V_VGA_S0
1D05V_VTT
1D5V_S0
5V_S5
1D8V_S0
5V_S0
1D5V_S3
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
UNUSED PARTS/EMI Capacitors
A2
94 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
UNUSED PARTS/EMI Capacitors
A2
94 94
Tuesday, November 09, 2010
<Core Design>
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
LLW-1 / LGG-1
SB
UNUSED PARTS/EMI Capacitors
A2
94 94
Tuesday, November 09, 2010
<Core Design>
VGACPU
EMI CAP
LGG Use
1
H28
HT6BE75R24-U-45-GP
ZZ.00PAD.971
H28
HT6BE75R24-U-45-GP
ZZ.00PAD.971
12
EC9718
SCD1U25V2ZY-1GP
EC9718
SCD1U25V2ZY-1GP
12
EC9748
SCD1U25V2ZY-1GP
EC9748
SCD1U25V2ZY-1GP
12
EC9720
SCD1U25V2ZY-1GP
EC9720
SCD1U25V2ZY-1GP
1
H30
HOLE315R95-GP
ZZ.00PAD.911
H30
HOLE315R95-GP
ZZ.00PAD.911
1
H25
GNDPADSR197
ZZ.NDPAD.XXX
H25
GNDPADSR197
ZZ.NDPAD.XXX
1
H4
HOLET157B276R134-GP
ZZ.SCREW.091
H4
HOLET157B276R134-GP
ZZ.SCREW.091
12
EC9734
SCD1U25V2ZY-1GP
EC9734
SCD1U25V2ZY-1GP
12
EC9727
SCD1U25V2ZY-1GP
EC9727
SCD1U25V2ZY-1GP
12
EC9732
SCD1U25V2ZY-1GP
EC9732
SCD1U25V2ZY-1GP
12
EC9739
SCD1U25V2ZY-1GP
EC9739
SCD1U25V2ZY-1GP
12
EC9703
SCD1U25V2ZY-1GP
EC9703
SCD1U25V2ZY-1GP
12
EC9735
SCD1U25V2ZY-1GP
EC9735
SCD1U25V2ZY-1GP
12
EC9701
SCD1U25V2ZY-1GP
EC9701
SCD1U25V2ZY-1GP
1
H31
HOLE237R95-GP
ZZ.00PAD.921
H31
HOLE237R95-GP
ZZ.00PAD.921
1
H2
HOLET157B276R134-GP
ZZ.SCREW.091
H2
HOLET157B276R134-GP
ZZ.SCREW.091
12
EC9725
SCD1U25V2ZY-1GP
EC9725
SCD1U25V2ZY-1GP
1
H1
HOLET157B276R134-GP
ZZ.SCREW.091
H1
HOLET157B276R134-GP
ZZ.SCREW.091
1
H18
HOLE315R95-GP
ZZ.00PAD.911
H18
HOLE315R95-GP
ZZ.00PAD.911
1
H26
GNDPADSR197
ZZ.NDPAD.XXX
H26
GNDPADSR197
ZZ.NDPAD.XXX
1
H10
HT85X105B85R26-S-GP
ZZ.SCREW.191
H10
HT85X105B85R26-S-GP
ZZ.SCREW.191
12
EC9730
SCD1U25V2ZY-1GP
EC9730
SCD1U25V2ZY-1GP
12
EC9751
SCD1U25V2ZY-1GP
EC9751
SCD1U25V2ZY-1GP
12
EC9706
SCD1U25V2ZY-1GP
EC9706
SCD1U25V2ZY-1GP
12
EC9744
SCD1U25V2ZY-1GP
EC9744
SCD1U25V2ZY-1GP
12
EC9737
SCD1U25V2ZY-1GP
EC9737
SCD1U25V2ZY-1GP
1
H11
HOLE237R95-GP
ZZ.00PAD.921
H11
HOLE237R95-GP
ZZ.00PAD.921
1
H5
HOLET157B276R134-GP
ZZ.SCREW.091
H5
HOLET157B276R134-GP
ZZ.SCREW.091
1
H20
HOLE315R95-GP
ZZ.00PAD.911
H20
HOLE315R95-GP
ZZ.00PAD.911
12
EC9719
SCD1U25V2ZY-1GP
EC9719
SCD1U25V2ZY-1GP
12
EC9723
SCD1U25V2ZY-1GP
EC9723
SCD1U25V2ZY-1GP
12
EC9749
SCD1U25V2ZY-1GP
EC9749
SCD1U25V2ZY-1GP
12
EC9742
SCD1U25V2ZY-1GP
EC9742
SCD1U25V2ZY-1GP
12
EC9704
SCD1U25V2ZY-1GP
EC9704
SCD1U25V2ZY-1GP
12
EC9713
SCD1U25V2ZY-1GP
EC9713
SCD1U25V2ZY-1GP
12
EC9711
SCD1U25V2ZY-1GP
EC9711
SCD1U25V2ZY-1GP
1
H9
HT85X105B85R26-S-GP
ZZ.SCREW.191
H9
HT85X105B85R26-S-GP
ZZ.SCREW.191
1
H8
HOLE237R95-GP
ZZ.00PAD.921
H8
HOLE237R95-GP
ZZ.00PAD.921
12
EC9721
SCD1U25V2ZY-1GP
EC9721
SCD1U25V2ZY-1GP
1
H13
HT6BE75R24-U-45-GP
ZZ.00PAD.971
H13
HT6BE75R24-U-45-GP
ZZ.00PAD.971
12
EC9722
SCD1U25V2ZY-1GP
EC9722
SCD1U25V2ZY-1GP
1
H21
HOLE197R67X146
KN1.PAD.01
H21
HOLE197R67X146
KN1.PAD.01
12
EC9728
SCD1U25V2ZY-1GP
EC9728
SCD1U25V2ZY-1GP
1
H14
HOLE237R95-GP
ZZ.00PAD.921
H14
HOLE237R95-GP
ZZ.00PAD.921
1
H15
STF217R113H119-GP
34.4C408.001
H15
STF217R113H119-GP
34.4C408.001
12
EC9733
SCD1U25V2ZY-1GP
EC9733
SCD1U25V2ZY-1GP
1
H16
STF256R117H221-GP
34.4B804.001
H16
STF256R117H221-GP
34.4B804.001
12
EC9712
SCD1U25V2ZY-1GP
EC9712
SCD1U25V2ZY-1GP
12
EC9714
SCD1U25V2ZY-1GP
EC9714
SCD1U25V2ZY-1GP
1
H12
HOLE237R95-GP
ZZ.00PAD.921
H12
HOLE237R95-GP
ZZ.00PAD.921
12
EC9746
SCD1U25V2ZY-1GP
EC9746
SCD1U25V2ZY-1GP
12
EC9708
SCD1U25V2ZY-1GP
EC9708
SCD1U25V2ZY-1GP
1
H22
HOLE197R67X146
KN1.PAD.01
H22
HOLE197R67X146
KN1.PAD.01
12
EC9726
SCD1U25V2ZY-1GP
EC9726
SCD1U25V2ZY-1GP
12
EC9715
SCD1U25V2ZY-1GP
EC9715
SCD1U25V2ZY-1GP
12
EC9740
SCD1U25V2ZY-1GP
EC9740
SCD1U25V2ZY-1GP
12
EC9731
SCD1U25V2ZY-1GP
EC9731
SCD1U25V2ZY-1GP
12
EC9707
SCD1U25V2ZY-1GP
EC9707
SCD1U25V2ZY-1GP
12
EC9745
SCD1U25V2ZY-1GP
EC9745
SCD1U25V2ZY-1GP
1
H3
HOLET157B276R134-GP
ZZ.SCREW.091
H3
HOLET157B276R134-GP
ZZ.SCREW.091
12
EC9738
SCD1U25V2ZY-1GP
EC9738
SCD1U25V2ZY-1GP
12
EC9709
SCD1U25V2ZY-1GP
EC9709
SCD1U25V2ZY-1GP
12
EC9717
SCD1U25V2ZY-1GP
EC9717
SCD1U25V2ZY-1GP
12
EC9747
SCD1U25V2ZY-1GP
EC9747
SCD1U25V2ZY-1GP
1
H23
GNDPADSR197
ZZ.NDPAD.XXX
H23
GNDPADSR197
ZZ.NDPAD.XXX
1
H17
STF256R117H221-GP
34.4B804.001
H17
STF256R117H221-GP
34.4B804.001
1
H24
GNDPADSR197
ZZ.NDPAD.XXX
H24
GNDPADSR197
ZZ.NDPAD.XXX
12
EC9724
SCD1U25V2ZY-1GP
EC9724
SCD1U25V2ZY-1GP
12
EC9710
SCD1U25V2ZY-1GP
EC9710
SCD1U25V2ZY-1GP
12
EC9750
SCD1U25V2ZY-1GP
EC9750
SCD1U25V2ZY-1GP
12
EC9729
SCD1U25V2ZY-1GP
EC9729
SCD1U25V2ZY-1GP
1
H19
HOLE315R95-GP
ZZ.00PAD.911
H19
HOLE315R95-GP
ZZ.00PAD.911
1
H6
HOLET157B276R134-GP
ZZ.SCREW.091
H6
HOLET157B276R134-GP
ZZ.SCREW.091
12
EC9743
SCD1U25V2ZY-1GP
EC9743
SCD1U25V2ZY-1GP
1
H27
HT85X105B85R26-S-GP
ZZ.SCREW.191
H27
HT85X105B85R26-S-GP
ZZ.SCREW.191
12
EC9741
SCD1U25V2ZY-1GP
EC9741
SCD1U25V2ZY-1GP
12
EC9736
SCD1U25V2ZY-1GP
EC9736
SCD1U25V2ZY-1GP
12
EC9705
SCD1U25V2ZY-1GP
EC9705
SCD1U25V2ZY-1GP
12
EC9702
SCD1U25V2ZY-1GP
EC9702
SCD1U25V2ZY-1GP
12
EC9716
SCD1U25V2ZY-1GP
EC9716
SCD1U25V2ZY-1GP