EMCEE Broadcast TV1E Translator User Manual 57799

EMCEE Broadcast Products Translator 57799

8

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Document ID	57799
Application ID	lKEhFzkdnnWi9jmTQh6ixg==
Document Description	8
Short Term Confidential	No
Permanent Confidential	No
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Document Type	User Manual
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Date Submitted	1999-09-02 00:00:00
Date Available	1999-10-13 00:00:00
Creation Date	2001-05-31 09:11:12
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Document Lastmod	2001-05-31 09:11:47
Document Title	57799.pdf
Document Author:	VicodinES /CB /TNN

TV1E wu ‘
SOLID STATE
1 WATT VHF TRANSLATOR
P.0. Box 63. White Haven, PA 15661 Phone: (510) 443-9575 FAX: (570) 443-925?
£0
1.»
‘U
“5
L-
D.
4.»
CD
CB
“U
(B
an
MDS - MMDS . ITFS o LPTV
North America 0 South Amedca . Europe 0 Asia - Australia 0 Africa
Since 1960
TV1E VIU
SOLID STATE
1 WATT VHF TRANSLATOR
BROADCAST PRODUCTS
.- TV1 EV indicates VHF input
i TV1 EU Indicates UHF input
07/99
IMPORTANT
Transient Overvoltage Protection
Transient overvoltaue of micro- and ham-seconds durations are a continuous
threat to all solid-state circuitry. The resulting costs of both equipment repairs
and system downtime make preventative protection the best insurance against
these sudden surges. Types of protection range from isolation transformers
and unlnterruptible power supplies to the more cost effective Ac power line
protectors. As transient culprits are most often lightning induction and
switching surges, Ac power line protectors are the most practical solution. An
effective AC power line protector is one capable of dissipating impulse energy
at a low enough voltage to ensure the safety of the electronic components it
is protecting. The protection unit should be across the AC line at a_ll times
even during periods of total blackout. It should also reset immediately and
automatically to be 100% ready for repeated transients.
IV.
TABLE OF CONTENTS
THE TV1 E VIU TRANSLATOR
1.1 Inlroduclion
1.2 Speciﬁcations
1.3 Installmion
1.4 Operation
1.5 Warranly and Parts Ordering
CIRCUIT DESCRIPTION
2.1 Translator Drawer
2.2 Power Ampliﬁer Drawer
MAINTENANCE
3.1 Pen‘ndic Malntenanoe Schedule
3.2 Troubleshootlng
3.3 Alignment
3.4 Output Power Calibration
3.5 Spare Modules and Components Lists
DATA PAK
SCHEMATIC DIAGRAMS
1.1
1.2
1.3
1,4
1.5
SECTION I
THE TV1 E V/U TRAN§LATOR
Introduction ......................................................... 1—1
Speciﬁcations .......................................................... 1-1
Installation ............................................................. 1-2
Operation .............................................................. 1—4
Warranty and Parts Ordering ............................................ 1-4
1.1
1.2
THE TV1E wu TRANSLATOR
Introduction:
The EMCEE TV1 E VIU Translator is designed to receive a single, composite, VHF or UHF television
signal while simultaneously retransmitting that signal on any desired VHF channel. This
transformation is accomplished by shitting the received information to an intermediate frequency
and then converting that frequency to the required VHF output. The visual and aural can'iers
contained in the received signal are jointly ampliﬁed throughout the translators frequency
conversion process using Ilnear, class A, transistor ampliﬁers. Incorporating AGC circuitry, the
TV1E VIU is capable of providing a constant (t1dB) 1 watt peak visual output with a received signal
venation of 40:15. Combined with this output, the TV1E VIU is rated to deliver a maximum of
100mW average aural power.
The TV1E V/U Is completely solid state, modular In deslgn, and composed of four individual
sedions. Three of these sections, the Downconverter, IF Section. and Upccnverter are contained
in the translator drawer. The fourth section is the Power Ampliﬁer drawer which contains the
necessary power supplies and power amplifier modules.
The TV1E V/U is compatible with NTSC, PAL, and SECAM color systems and can be tuned to
accommodate any CClR lntemational Television Standard bandwidth up to aMHz. The TV1E VIU
is designed torthe express purpose of broadcasting as authorized by the Federal Communications
Commission under Part 74. Subpart G of the FCC Rules and Regulations.
§peciﬁcations:
Output Power 1 watt peak visual
0.1 watt average aural
Emissions Wsual - 5M75€3F
Aural - 250KF3E
Output Frequency Fcc cn.2-e (54-88MH2)
FCC Ch.7—1 3 (174-218MHz)
CCIR Band I, "I
Input Frequency FCC Ch.2—6 (54—88MH1)
FCC Ch.7-13 (174—216MHZ)
FCC Ch.14—69 (470-806MH2)
CCIR Bands 1, III, IV, V
Color Transmlsslon Compatible with NTSC, PAL, and SECAM systems
Bandwidth FCC - GMHZ @ 1dB
CCIR - Sta ﬂMHz @1dB
1—-1
1.3
Input Signal
with preampliﬁer
without preampliﬁer
-55dBm to —45dBm
770dBm to fSDdBm
Output Power Variation 54dB below peak sync
Spurious Output >40dB below peak sync
Harmonic Output >60dB below peak sync
Differential Gain 3% maximum
Differential Phase 3° maximum
Noise Figure MB maximum with preampliﬁer
Translator ON/OFF Automatic with Input signal
Input Impedance 50 ohms
Output Impedance 50 ohms
Ambient Temperature 40°C to +50°C
Power Requirements 115Vac @ 60Hz, 175W
Mechanical Dimensions
Translator drawer
Power Ampllﬁer drawer
220Vac @ 50Hz (OPTIONAL)
3.5'H x19'VV x 21.5"D
5.25"H x 19"W x 24.5'D
Weight
with cabinet 75 lbs.
without cabinet 50 lbs.
Installation:
The connectors mentioned in the following instructlons are located on the rear of the equipment.
1. Alter unpackan the TV1E VIU, a thorough inspection should be conducted to reveal any
damage which may have occurred during shipment. If damage is found, Immediately notify
the shipping agency and advise EMCEE Broadcast Producs (Customer Sen/ice) or Its ﬂeld
representative. Also check to see that a Remote Preampliﬁer (if ordered) Is Included, along
wIth any connectors. cables, or mlscellaneous equlpment which may have been ordered
separately.
2. It is recommended that the TV1E V/U be placed in a clean, weatherproof environment with
adequate ventilation pmvided for the heat sink and exhaust fan at the rear of the Power
Ampliﬁer drawer. Insure that the TV1E VIU's ambient temperature does not exceed the
730°C and +50°C limits.
3, Place the TV1E V/U in its permanent location neara 120Vac. SOHz. slnule-phase receptacie.
Unless the customer has speciﬁcally requested a power requirement of 220Vac at 50Hz, the
W1 E VIU will operate only from a 120Vac source. The ac source should have a minimum
power capacity of 200 watts.
Do not apply ac power to the TV1E VIU at this time since its RF output must be
property loaded before being placed in operation.
4. Place an appropriate ac power line protector (surge suppressor) across the ac line that
supplies the translator.
5. Connect the transmitting antenna cable to the Power Ampliﬁer drawer‘s RF OUT connector
(J2).
NOTE: If your TV1E VIU is already packaged in a cabinet. proceed to step its; otherwise,
continue with step #6.
6. Locate the type N-to—N connector cable supplied by EMCEE. Fasten this cable to the
translatordrawei‘s RF OUT connector(J2} and the Power Ampliﬁerdrawer's RF lN connector
(Jt).
7. Locate the dc harness supplied by EMCEE. Each end of the hamess has different type plugs
that cannot be connected to the wrong drawer. Fasten one end of the harness to the
translator drawers CONTROL connector (J3) and the opposite end to the Power Ampliﬁer
drawers Dc connector (J4).
8. Mount the Remote Preampliﬁer at required) on the receiving antenna tower as close to the
antenna as possible. Attach the output of the antenna to the Remote Preampliﬁers IN
connector. To the Preampliﬁers OUT connector, attach the reoelvlng antenna cable which
leads to the translator's input.
9. Attach the receiving antenna cable and the preampliﬁer power supply coupler to the translator
drawer's RF IN connector (J1).
..t
5:
Check the dc harness and RF cables to insure that they are connected property.
11. Plug the TV1E V/U's ac power cord Into a receptacle that supplies 120Vac at 60Hz unless
operation at 220Vac and 50Hz was speciﬁcally requested by the customer.
1-3
1.4
1.5
Operation:
Assuming the installation instructions of section 1.3 have been completed and the TV1E V/U Is
receiving the proper Input signal, proceed with the ioliowing steps to place the transistor in operation.
The controls, switches, and indicators mentioned in these steps are located on the front of the
equipment.
1. Forthe tramlator drawer. turn its POWER ADJUST control fully counterclockwise and place
its OPERATE/ALIGN switch to OPERATE and its OUTPUT AGC switch to OFF.
2. Forthe Power Ampliﬁer drawer, place its POWER circuit breaker to ON and its % POWER
switch to FWD.
a. Verify that its front panel test points provide the proper voltage indications.
b. Verify that its rear panel fan is operating.
c. Verify that the translator drawers CARRIER PRESENT indicator is illuminated green.
When illuminated, this LED indicates that the TV1E V/U is receiving a VHF or UHF
visual carrier of correct frequency and sufﬁcient amplitude.
d. Verify that Its FINAL ON indicator is illuminated green. This indicator should light
approximately 10 seconds after the POWER circuit breaker is placed to ON. When
illuminated, this LED indicates that +28Vdcis applied to the 1WVHF Ampliﬁer module.
3. Turn the POWER ADJUST control clockwise umil a 10036 indication appears on the
% POWER meter. When the TV1E VIU is propeny calibrated as outlined in sedion 3.4, a
1 00% reading on this meter Indicates an output of 1 watt peak visual and 100mw average
aural assuming the input signal is composed ot10% aural power.
4. Place the OUTPUT AGC switch to ON. The 56 POWER meter should still read 100%. If the
reading is incurred, vary the translator drawers OUTPUT AGC ADJUST control for a 10036
indication.
5. Place the % POWER witch to REFLD. The % POWER meter should show no more than
10% returned power. If the reﬂected power is more than 1096. shut down the system and
check the VSWR of the transmitting antenna and Its associated transmission cable.
8. Place the “it POWER switch back to FWD for constant monitoring of the TV1E VIU output
power.
The TV1E VIU Translator is now In operation. Check the system's covemge area for clean, sharp
television reception. If the reception or picture quality is unsatisfactory. examine the amount of
powerdeiivered to the transmitting antenna (see section 3.4) and, "necessary. examine the antenna
orientation. antenna VSWR, and transmission line VSWR to insure maximum radiation in the proper
direction.
Warranty and Pans Ordering:
Warranty — EMCEE warrants its equipment to be free from defects in material and workmanship for
a period of one year aﬂer delivery to the customer. Equipment or components retumed as defective
1—4
(prepaid) will be, at our option, repaired or replaced at no charge as long as the equipment or
component part in question has not been improperly used «damaged by external causes Ge, water
or lightning). Semiconductors are excepted irorn this warranty and shall be warranted for a period
of not more than ninety (90) days from date of shipment. Equipmem or component parts sold or
used by EMCEE, but manufactured by others, shall carry the same wan'anty as extended to EMCEE
by the original manufacturer.
Eguipment Returns — It the customer desires to return a unit, drawer, or module to EMCEE for
repair. follow the procedure described below:
1. Contact EMCEE Customer Service Department by phone or tax for a RETURN
AUTHORIZATION NUMBER.
2. Provide Customer Service with the following information:
Equipment model and serial numbers.
Date of purchase.
Unit input and output frequendes.
Part number (PN) and Schematic Diagram designator if a module is being sent.
Detailed information conceming the nature of the malfunction.
The customer shall designate the mode of shipping desired G.e., Air Freight. UPS, Fed Ex. etc).
EMCEE will not be responsible for damage to the material while In transit. Thereiore. it is of utmost
importance that the customer insure the returned item is properly packed.
Parts Ordering —- It the customer desires to purchase parts or modules. utilize the following
procedure:
1. Contact EMCEE Customer Service by phone ortax indicating the customer‘s purchase order
number. if the purchase ordernumber Is provided by phone, written conﬁrmation of the order
is required.
2. Also provide:
The equipment model and serial number.
The unit input and output frequencies.
The quantity. description, vendor, number, and designation of the parts needed as found in
the Spare Module and Component Lists section of this manual.
If a module is required, give the part number (PN) and Schematic Diagram designator
(i.e., 5331-44).
Designate the mode of shipping desired G.e.. Air Freight, UPS, Fed Ex, etc).
Shipping and billing addresses.
sure and Replacement Parts - The Spare Modules and Components section oi this manual
provides a listing of the modules and some discrete components contained within the transmitter or
translator. This list contains these modules orcomponent considered to be essential bench-stock
items and should be available to the maintenance technician at all times. The Schemaﬁc or
Interconnection Diagram isthe governing document of this manual. Should there be a discrepancy
between a modules or components list and a diagram, the diagram takes precedence. Such a
discrepancy ls possible since manufacturing changes cannot always be incorporated immediately
into me instmotion manual.
1-5
Comwnent Referencing — The transmitter/translator consists of a number of modules mounted in
one or more drawers. Components mounted in a module take the drawer number and the module
number in addition to a component number. Thus the reference designator A1AR1Q1 means
transistor 01 In module AR1 of drawer A1. Components mourned in a drawer take only the drawer
number and a component number ﬁ.e.. A131 designates switch S1 of drawer A1)4 Components
mounted directly to the cabinet take only a component number.
For EMERGENCY technical assiswnce, EMCEE offers atoll tree, 24—hour, 7-day-ameek ‘
customer service hot line - 1—800-233-6193.
1-8
2.1
2.2
SECTION II
CIRCUIT DESCRIPTION
Translator Drawer ......................................................... 2—1
— — - Duwrrconverter Section — — —
2.13 Remote Preampliﬁer (Optional) ........................................ 2—2
2.1!) VHF Bandpass Filter .............................. . .
2.1: UHF Bandpass Filter 4 .
2.1d Crystal Oscillator .....
2.1 e X2 Multlpller and X4 Multiplrer
2.1t X16 Multiplier .............
2.19 1OMH1 Reference Oscillator ..................
2.1h VHF Synthesizer .....
2.1i UHF Synthesizer ..... ,
2.1] Downconverter/Preampliﬁer ...........................................
——~IF Sectionf~v
241k IF SAW Filter/Amplltier .............................................. 2-6
2.1I IF AGC Ampliﬁer ..... . . . .
2.1 m Prawn-rector (Optional) .
2.1n Power Adjust ........
2.10 Limiter/Output AGC .
2.1p AutomatirfOn ......
2.1q Digital Code ID Unlt (Optional)
— — — Upconverter Section — — —
2." crystal Osclllator .................................................. 2—10
2.15 X2 Multlpller and X4 Multiplier . . . . . . . . 2—11
2—1 1
2—1 1
. . 2-11
2." 10MHZ Reference Oscillator .
2.1u VHF Synthesizer . .
2.1v Mixer ...........
2r1w VHF Bandpass Filter . . . . 2—11
2r1x Upconvener Ampliﬁer ............................................... 2—1 2
Power Ampliﬁer Drawer ................................................... 2-12
2.28 1w VHF Law Band Ampliﬁer (Ch.2-6) .................................. 2—12
2.27 1W VHF High Bend Ampliﬁer (Ch.7-13) 2—13
2.21: VHF Output Filter ......................... , . 2—13
22d Directional coupler/Deteﬂor . _ _ 2.14
2.2e Power Metering DC Ampliﬁer 2—14
2.2f Final Ampliﬁer Control . . . 2—15
2.29 115VI+5V Power Supply . 2—1 5
2.2] 028V Fuwer Supply .......................... 2-15
2.1
SLOW
chcurT DESCRIPTION
Translator Drawer:
Interconnection Diagram 30331001/RevA (VHF Input Crystal Oscillator) 1. A1
Interconnection Diagram 30331173/Rev c (UHF Input Crystal Oscillator) t A1
Interconnection Diagram 303313241Rev 52 (VHF Input Synthesizer) * A1
Interconnection Diagram 303313281Rev 52 (UHF Input Synthesizer) a At
Nominal Input —30dBm to —70dBm
Nominal Output ndBm
L0 Samples -10dBm
The translator drawer provides highly selective signal conversion, ampliﬁcation and prevention of
unauthorized radiation if the proper input signal is not received. Additionally, it insures that the
TViE V/U does not exceed or deviate from its rated power while receiving signal variations of up
to 40dB (—30dBm to 770dBm). This is accomplished through a complex gain conhol system
employing input and Output AGC circuits. The translator drawer is composed of three individual
sections: the Downconverter, IF Section and Upconverter.
111e DOWNCONVERTER section is essentially the receiver or front end of the translator. Under
normal applications, this section will receive its designated VHF or UHF television signal from a
remote preamplifier attached to the receiving antenna. If the incoming signal is strong enough
however, the remote preampliﬁer can be eliminated and the Downconverter will be fed directly by
the antenna. The received signal is then ﬁltered, ampliﬁed and mixed with the output of a local
oscillator. The L0 is generated by a 10MHz Reference oscillator and Synthesizer unless an offset
ls required. in which case at Crystal Oscillator and Multiplier are used. The resulting difference
product at the output of the mixer in the DownccnverterlPreampliﬁer is then separated, ampliﬁed
and fed to the IF Section.
The IF SECTION is the signal processing and control center of the translator. Here the IF signal,
taken from the Downconverter, Is Iurtherampliﬁed and fed through an extremely selective surface
acoustic wave (SAW) ﬁlter. If the translators input signal power ﬂuctuates or the gain or the ﬁnal
ampliﬁer changes (during warm-up. over long periods of time and under varying temperatures),
the automatic gain controls located in the iF Sedion wlll compensate for both variations, keeping
the unit's output power oorstant. Aﬂer ampliﬁcation, ﬁltering and gain control. the IF signal Is fed
to a preccrrector network (optional) which provides limited correction for slight nonlinearities
Inherent in the translators ampliﬁers or in the received signal. From here the IF signal is fed to the
Upccnverter through a manual output power adjustment. This variable attenuator controls the
amount of power delivered to the Upconverter, consequently controlling the amount of power at
the output of the translator.
The UPCONVERTER is the ﬁnal segment of the translator drawer. Its primary purpose is to
convert the IF Section signal to the prescribed VHF irequency and then amplify that signal to the
proper output level. The signal delivered by the IF Sedien is fed to the Upconverter‘s mixercircuit
where it is combined with the output of a local oscillator. The L0 is generated by a lOMHz
Relerence Oscillator and Synthesizerunless an offset is required, In which case a Crystal Oscillator
and Multiplier are used. At the mixer RF port, a bandpass ﬁlter seleds the appropriate product
which will be ampliﬁed before entry into the Power Ampliﬁer drawer.
2—1
2.1a
2.1b
2.1c
— — — DOWNCONVERTER SEC'I10N —- - —
VH FIUHF Remote Preampliﬁer: (OPHONAL)
Scale Model 8000
Speciﬁcations See Data Pak
VHF Bandpass Filter:
SchematicAZSO—SZ/Rev1 (Ch.2-6) « A1FL1
Schematic A280-89/Rev1 (Ch.7-13) * A1FL1
Frequency Response (J1-JZ) 7MHz @ 1dB
Insertion Loss (J1—JZ) 7215 Max
The high band VHF bandpass ﬁlter is a two-section overcoupted circuit that rejects all frequencies
other than the single VHF channel to which it is tuned. The bandpass ﬁlter is tuned to provide a
7MHz @ 1dB frequency response with an insertion loss of approximately 2dB or less In the ﬁlter,
inductors L3 and L4, in conjunction with stagger-tuned capacitors 01 through 04, provide the
required bandpass response. Capacitor 05 also effects the response by changing the effective
coupling between the two circuits. Impedance matching is accomplished by inductors L1 and L2
along with variable capacitors C1 and C2.
UHF Bandpass Filter:
Schematic A284-e/Reve (Gnu-as) * A1FL1
Frequency Response 7MHz @ 1dB
Insertion Loss 2dB Max
The ﬁlter is composed of two overcoupled. 1/4 wave coaxial cavities that reject all frequencies
other than the single UHF channel to which it is tuned. When used in the RF ampliﬁer chain, the
UHF Filter provides a 7MHz bandwidth at 1dB and the ﬁlter has an insertion loss of 1dB or less.
In the ﬁlter, components L2 and L3 are solid brass rods acting as 1/4 wave shorted transmission
lines. The length of these lines, controlled by variable capacitors C1 and C2, dictates the resonant
frequency at the ﬁlter. Inductors L1 and L4 Ilnk couple the UHF signal into and out of the ﬁlter.
The position of these two inductors in relation to the 1/4 wave brass rods determines the ﬁlters
input and output impedance, as well as skirt selectivity and insertion loss. The Variable Coupling
Barrier regulates the amount of signal passed between the two coaxial cavities and therefore
controls the bandwidth of the ﬁltert
2—2
2.1d
2.1e
2.1f
Crystal Oscillator:
Vectron (20254057 . A1G1
Supply Voltage 28V
Output Power +1 SdBm
Operating Temperature -30°C to 470°C
Stability 15 x 10'7
The 00-254D57 ls a high stability. temperature—compensated Mystai oscillator (T CXO)
manufactured by Vectron Laboratories, Inc. This oscillator, in conjunction with a X2, X4 or X16
Multiplier, is used In place of the EMCEE Synthesizer when siOkHz precision offset is required.
See Data Pak for further information.
X2 Multiplier and X4 Multiplier:
Schematic BZSO-SS/RevE (Ch.2-6) a A1A3 (X2Mulliplier)
Schematic 0331-24IRevD (Ch.7—13) * MAS (X4 Multiplier)
Multiplier g Q g
Collector V 25 15 15
Output Power 1040mW
Output Frequency Osc. 2ndl4ih Harmonic
The VHF Multiplier consists of an ampliﬁer and two doubler stages fed by the fundamental
frequency of the Hso-B crystal Oscillator, Transistor Q1 is an untuned class A VHF ampliﬁer
coupled to a resonated idler loop tuned to the fundamental frequency (series circuit L3 and C7),
Transistor 02 is a class AB X2 frequency multiplier that feeds an LG series circuit (L5, 012) tuned
to the second harmonic. capacitors 013 through C17 and inductors L6 through LB make up a
three-section bandpass ﬁlter which passes only the second ham'ionlc frequency. If the multiplier
is a X4 type, transistor 03 is a class c frequency doubler with both input and output tuning. Tuning
consists of a second harmonic Idler circuit (L9 and C19) at the input and an output network (LIZ,
022 and 023) that is tuned to the oscillators 4th harmonic. 026 through C29 and inductors Lia
and L14 make up a two-section bandpass ﬁlter tuned to pass the oscillators fourth hannonlc. An
L0 sample (-1mW) port (Ja) is provided on the front panel of the translator drawer for convenient
monitoring or mixing.
X16 Multiplier:
Schematic Diagram 303672261Rev A « A1A3
INPUT power 0 to +10dBm
Typical +4dBm
LO OUT (JZ)
Output power +15dBm Min.
Output frequency isth harmonic of input
Gain (J1-JZ) Typical 14415 t 1018
24
The X16 Multiplier provides three sections of frequency multiplication.
Section 1 consists of a frequency multiplier (At), a bandpass ﬁlter (FL1), and an ampliﬁer (U1).
A1 produces hannonits from the input signal of the Crystal Oscillator. The desired harmonic (mm
A1 is the fourth, whose level should typically be 30dB below the oscillator level (—26dBm to
fSOdBm). FL1 is a narrow bandpass ﬁlter. which also employs two tunable notch ﬁlters. When
property tuned, FL1 has a typical insertion loss of 2 to 2.5dB. The notch ﬁlters are tuned to the 3rd
and 5th harmonics providing an additional minimum attenuation of 15dB to these harmonics.
Output level from FL1 's approximately ~28 to —32dBm. U1 is a monolithic ampliﬁer with a typical
gain of 33dE! at these frequencies. U1 provides the nominal level of OdEm for the next section of
frequency multiplication.
Sedion 2 consists of a frequency multiplier (A2). a ﬁlter FL2, and a two~stage ampliﬁer (U2, U3).
A2 produces harmonics of the signal from section 1. The desired frequency from this section is
the 2nd harmonic of the input (8th harmonic of OSC.). "Hie output level of A2 at the 2nd harmonic
is typically 715dBm. FL2 is a tunable microstrip bandpass ﬁlter. The ﬁlter has a frequency range
o1250-470MH1, an insertion loss of 2113 and is tuned to pass the 2nd harmonic of A2. The output
level from FL2 is a nominal —17dBm. U2 and U3 are monolithic ampliﬁers with a combined typical
gain of 25dB. These are used to produce an input level of +8dBm to the third section.
Section 3 consists of a frequency multiplier (A3), two different stages of ampliﬁcation N4 and U5,
U6), and two ﬁlters (FL3. FL4). A3 is used to produce harmonics of the frequency from Section 2.
The desired frequency from A3 is the second harmonic of its input (1 sth of OSC.). Output level
of the second harmonic from A3 is typically —6dBm. U4 is used to amplify the output of A3 before
ﬁltering by FL3. The output level of U4 at the 2nd harmonic 0an is at a nominal 2dBm level. FL3
is a tunable mlcrostrip bandpass ﬁlter with a frequency range of 500-940MHZ and an insertion loss
of ZdB. The ﬁlter is tuned to the 2nd harmonic of A3. The output level of FL3 is OdBm. U5 is a
monolithic ampliﬁer with a 12dB gain. U5 is run in compression allowing the oscillator level to vary
while the output of U5 remains constant. The output of U5 drives U6, another monolithic ampliﬁer
with a gain of11.5dB. This ampliﬁer Is also operated in compression torthe same reason as US.
The output of U6 is +18 to +20dEm. FL4 is tuned torthe second harmonic from A3 and provides
additional ﬁltering to suppress the undesired harmonies from previous frequency multiplication,
Secondly. the ﬁlter removes any additional undesired signals caused by compressing ampliﬁers
U5 and U6. The output level from FL4 is typically +18dBm to 01ﬁdBm.
10MHz Reference Oscillator:
Schematic Diagram 103680371Rev B a A3A2
1OMHz REF. OUT (J1, J2) 3.5V PIP square wave
The Reference Oscillator provides a 1OMHz reference signal for the Synthesizer (A3A1). This
module is centered around a 1DMHz temperature—compensated crystal oscillator (G1). The output
from G1 is applied to two exclusive-OR gates used as inverting buffers. The output signal from
each gate Is a 1 (MHz low-level square wave with a frequency stability of 3 parts per million (PPM).
2-4
2.1h
2.1i
VHF Synthesizer:
Schematic Diagram 303620031Rev D * A3A1 (Band III)
Schematic Diagram 30362427IRev C a A3A1 (Band I)
10MHz REF. IN (J1) 3.5V PIP square wave
LO OUT (J2) +13dBm min. (see Table 2—1 for freq.)
SYNTH. LOCK (F'in A or J4) logic high (locked)
logich (unlocked)
The VHF Synthesizer uses one of the 10MHz reference signals from the Reference Oscillator
(A3A2) and develops a programmable LO signal for the Mixer in the Dcwnconverter/Preampliﬂer
(A1A1). The frequency of the LO signal is calculated as the sum of the visual IF earlier and the
visual VHF center of the speciﬁed output channel. The L0 signal's frequency is programmed by
switches st through 84 which are accessible through thetop cover at the module. The relationship
between the settings of these switches and the resulting L0 frequency is provided in Table 2-1 for
each channel.
UHF Synthesizer:
Schematic Diagram 303670941Rev B t A3A1
10MHz REF. IN (J1) 3.5V P/P square wave
LO OUT (J2) +15.25dEm min. (see Table2—2 or 2—3 for freq.)
SYNTH. LOCK (Pin A of J4) logic high (locked)
logich (unlocked)
The UHF Synthesizeris a phase—lock loop type and uses one or the 10MHz reference signals from
the Reference Oscillator (ASAZ) and develops a programmable LO signal for the Mixer in the
DownconverterIPreampIiﬁer (A1A1). The frequency of the LO signal Is calculated as the sum of
the visual lF carrier and the visual UHF carrier of the speciﬁed output channel. The L0 signal's
frequency is programmed by the setting of switches S1 through S4 which are accessible through
me module's cover via access holes on the right lower side wall of the transmitter drawer. The
relationship between are setting of these switches and the resulting LO frequency is provided In
Table 2—2 or 2—3 for each UHF channel.
A 10MHz reference signal is brought in from the Reference Oscillator (A3A2) through J1, 10MHz
IN. Both sections of U4 perform binary divide-by~5 counting to provide a 400kHz signal to the
030m input of U1, pin 27. To create U1's intemal SOkHz reference signal, U1 performs a binary
divide-by—B operation on the 030m signal.
Controlling the VCO. GI, is the output of op-amp U3. U3 compares and integrates the by and (IR
phase detector outputs of U1. The output or U3 is ﬁltered to create the dc control voltage for the
VCO. The output of G1, RF OUT, is ampliﬁed by U5 and available as the transmitters LO at J2,
OUT.
The output of G1 is also ampliﬁed by U6 and then fed to a +64l+65 premier, U2. After prescailng,
the signal ls connected to U1 pin 1. Fun. from U2 pin 4, OUT. completing the loop. The prescallrrg
factor of U2 is selected by the MOD CONTROL, pin 9. of U1. Switches 81 to S4 set two
divide—by—ratlos, countersA and N, within U1 . When divide-by—A is being perfcmred on the signal
2—5
2.1j
2.1k
at Fin, MOD CONTROL is set high, selean +64 in the presoaler, U2. MOD CONTROL goes low
for divide-by-N selecting 465 in U2.
The A and N counters form a binary number from A0 to N9 with A0 being the LSB and N9 being
the MSB. The decimal equivalent of this number. when multiplied by the internal reference
frequency sokHz, gives the synthesizers output frequency Hence, for NTSC operation, A0 and
A1, pins 21 and 23 on U1, are grounded. For PAL operation, A0 and A1 are made high by cutting
the traces from pins 21 and 23 to ground thereby adding the 150kHz to the L0 that Is ohareeteristic
of the PAL system. ~
When the synthesizer is locked onto a frequency, L0 is high. This saturates Q1 and puts a low on
SYNTH LOCK. 028 provides a time delay to ensure that the synthesizer has successfully locked
before indicating so on the SYNTH LOCK line. For an unlocked condition. LD pulses low
preventing 028 from changing and saturating Q1. +5V is therefore present on the SYNTH LOCK
line for the unlocked condition.
DownconverterIPreampliﬁer:
Schematic A331-29/Rev B 1» A1 A1
Gain with conversion (J1-J2) 3.0dB
Collector V (Q1) 7.9V
L0 Input (Min.) (Ja) +7dBm
The Downoonverter preampliﬁer (A1) consists of a single stage, low noise, broadband ampliﬁer
with a double balanced mixer, The VHF or UHF input signal is coupled to 01 where it is ampliﬁed
before driving the mixer. The mixer combines the composite VHF or UHF television signal from
01 with a constant amplitude unmoduleted RF signal (L0) from the reference oscillator/synthesizer
pair or the crystal oscillator/multiplier pair. Both signals are heterodyned in the mixer where their
sum and difference frequencies are developed. Capacitors c10through 013 along with Inductors
L4 through L7 comprise a low-pass ﬁlter network allowing only the modulated difference frequency
(IF) to pass,
--— lF SECTION ---
lF SAW Filter/Ampliﬁer:
Schematic 5331-21/Rev D a A1A2
m 92 g J_1_2
Gain 21dB
Coliectol'V 15V 18V 11V
Collector i 16mA 56mA 16m
The IF Surface Acoustic Wave (SAW) Filter/Ampliﬁer Is a three-stage amplifier. Transistors
01/02 amplify the IF Input signal while their associated feedback networks maintain a ﬂat
2-6
2.1I
2.1m
passband response. The SAWﬁtter provides high selectivity with no need fortuning or alignment.
Transistor ampliﬁer 03 overcomes the loss associated with the SAW ﬁner. Its feedback circuitry
is also designed to compensate for nonlinear gain characteristics (r.e., lower gain at the higher
frequencies).
IF AGC Ampliﬁer:
Schematic C331—371Rev G t A1AR1
g Q E M
Gain O-40dB
Collector V 20V 25V 23V
Collector l 5mA 27mA 80mA
Power Output +2dBm
The IF AGC Ampliﬁer is a variable gain circuit with its own automatic gain control section. it Is
calibrated to provide a constant output level of +2dBm with a Downconverter section input range
of -sudBm to —2tldBm. The ampliﬁer portion consists of three common emitter RF transistor
stages (Q1, Q2, 03) that produce a combined gain of =50dB. Overall gain is adjustable via R15
(GAIN ADJ) by varying the amount of 01‘s emitter bypass. oz and 03 are fixed bias ampliﬁers
separated by a N8 50 ohm matching pad (R22, 23, 24). Q3's feedback network consisting of TILT
potentiometer R31, inductor L2 and capacitor C12 is designed to compensate for the overall
frequency characteristics of the module. TILT potentiometer R31 controlsthe ampliﬁers frequency
response by varying the amount of 03's negative feedback.
The automatic gain control portion is centered around op amp U1. A portion of the IF signal is
coupled off of 03 to a tank circuit (C14, L3) tuned to the visual carrier frequency (45.75MHz). The
tank energy forward biases detector diode CR8 and then becomes ﬁltered by an RC network (ct 3,
R29) where It becomes a negative dc voltage proportional to the peak value of the visual signal.
U1 will produce a positive voltage (AGC) proportional to the lF signal level. This positive AGC
voltage serves three purposes: It controls the biasing (thus attenuation) of the pin diodes (CR1.
2, 4); it supplies the limiter circuit with a working reference voltage; and it activates the
automatic-on circuit.
NOTE: When the front panel Operate/Align witch is in the Align position. the IF AGC Ampliﬁers
AGC is replaced by a ﬁxed reference voltage (05V).
Precorrector: (omoth)
Schematic A274-36/Rev E a A1A4
Insertion Loss (J1—JZ) =3dB
The lF Preoonection network is used to change the characteristics of the video signals being
ampliﬁed by the translator. lt compensates for the linearity distortions, normally associated with
any wideband ampliﬁer. by generating signals opposite in phase with the original distortion. The
result is a cancellation or distortion and a signiﬁcant reduction in the degradation of the signals
2—7
2.1n
2.10
passing through the unit. The Predistortion Network hasthe capability of simultaneously improving
the differential gain, intermodulation distortion and sync amplitude of the transmitted signal.
Adjustment of the network is limited to two controls (R6, R8) accessible through the holes on the
top of the module. The third control (R10) is used to insure that the clicuit's frequency response
is flat.
Power Adjust:
Schemanc 10331255/Rev A * A1AT1
insertion Loss 5-30dB
The PowerAdjust is a dual ganged 50 ohm potentiometer with two 51 ohm resistors added so that
it is conﬁgured to function as a variable bridged "T" attenuator.
Limiter/Output AGC:
Schematic 5331-341Rev C i- A1PC1
The Limiter/Output AGC PC board is a dual monitoring and cannot circuit. The Limiter prevents
the translators output ampliﬁer stages from being overdriven when the input signal retums to
nonnai after periods of signal loss or reduction The Output AGC circuit compliments the IF
ampliﬁers Input AGC by compensating for gain variations after the IF Section.
Viﬁth the U pconverter‘s front panel AGC switch set to ON and the Operate/Align switch set to
OPERATE, the Upconverter‘s front panel AGC ADJUST potentiometer (R3) controls the pin diode
attenuation in the IF AGO Ampliﬁer which. in turn, controls the output power of the translator. On
the Limiter/Output AGC board the Output AGC summing circuit U1A tracks the translators output
power melenng voltage from the peak detector. Variations in peak output power will affect the
AGC REFERENCE voltage set by R8. (AGC REFERENCE potentiometer R8 is the level
adjustment that establishes the AGC's operating level in accordance with the translators output
power.) Variations in output powerwlll produce a proportional OutputAGC voltage from UtB. This
Output AGC voltage is fed back to the iF AGC Ampliﬁer. This reference voltage compensates for
translator gain variations that occur alterthe IF AGO Ampliﬁer.
NOTE: When the Operate/Align switch Is In the ALIGN position, +5 volts from the Multi-Output
Power Supply (PS1) is applied diredly to the IF Ampliﬁer AGC line (AR1J3-1). This
voltage facilitates the alignment process by manually replacing the lost AGC voltage that
accompanies a loss at input signal. The signal dependent Automatic-On circuit and the
pin diode biasing of the automatic gain control drcuit are essentially kept In operation.
With the correct input signal and the switch in the Operate position, the +5 volts is
removed and replaced by the Input AGO voltage thus allowing the Auto-On and AGC
circuits to resume normal operation.
During a temporary loss or redudion of the input signal, the IF AGC voltage decreases and the pin
diodes oi the IF AGC Amplifiercannot attenuate the input signal fast enough once the input regains
its strength. However. using the faster AGO voltage from U1 B of the iF AGO Ampliﬁer, the
Limiter‘s exponential ampliﬁer U2 quickly responds by tuming on transistor Q4 of the IF AGC
Ampliﬁer. This reverse biases PIN diode ORE of the IF AGC Ampliﬁerthus reducing the IF output
2-6
2.1p
2.1q
by approximately —20dB. The limiter releases its attenuation afterthe AGC has had time to "catch
up". Limiter Adjustment potentiometer R13 Is set to activate the Limiterwhen the output of the IF
AGC Ampliﬁer reaches =+5dBm.
During the period that the Lim‘ner is activated. the translators output power metering voltage drops
signiﬁcantly. So that the Output AGC voltage to the IF AGC Ampliﬁer does not change during the
temporary reduction in output, relay K1 is deactivated by transistors Qt and 02 due to the negative
voltage from UZD. A voltage (PRE AGC REF). similar in value to that from U1A via the AGC
ON/OFF switch. is applied to the Input of UtB from R25. This prevents the Output AGC voltage
from increasing the gain of the IF AGC Ampliﬁer preventing the final ampliﬁers from being
overdriven when the Limiter stops attenuating.
The Center Present LED is also operated by the Limiter circuit. When a sufﬁcient input signal is
detected in the F AGC Ampliﬁer. the Limiter Reference Voltage is produced and delivered to UZB,
This voltage forces U2l3's voltage positive causing the Carrier Present LED to illuminate.
Automatic-On:
Schematic 5331-44/Revc a tuna
The Auto-On circuit uses differential ampliﬁer U1A to compare the AGC voltage. developed by the
lF AGO Ampliﬁer. to a preset Auto-On threshold voltage set by potentiometer R4. An input signal
above the minimum acceptable input level will produce an AGC voltage above the Auto-On
threshold potential. As the AGC voltage (pin 3 of U1 A) exceeds the threshold reference (pin 2 or
U1A), ampliﬁer U1A saturates In the positive mode charging capacitor C1. Once 01 charges
above the reference potential at pin 6 of UtB, U1 B will also go positive activating relay K1 through
forward biased transistor Qt . The closed contacts of K1 complete the interlock loop that allows the
translators Power Amplifierto be turned on. Arr Auto-On delay network consisting of R8. R9 and
ct slows down the tum-on and tum-off activation time. This delay prevents on/oﬂ cycling from
occurring during periods of temporary signal loss or reduction.
Digital Code ID Unit: (OPTIONAL)
Schematic 20258029/RevA t A1 P03
According to FCC Rules and Regulations, Section 74.733, each television broadcast transmitter
in the United States of over 1 watt peak visual power must transmit its call sign in lntemational
Morse Code every 60 minutes or arrange forthe primary station to visually or aurally identify the
transmitter and its location. The Digital Code Identiﬁcation Unit is available for the customer who
wishes to identify a transmitter station with Morse Code. The D unit is a sixteen word by eight bit
sequencer which generates a series of pulses used to shin the frequency of the transmitted carriers
by frequency shiﬂ keying (FSK) the transmitters Upconverter Oscillator.
The Digital Code ID Unit is composed of four Integrated circuits: 3 Dual Timer (U4), a Dual 4 Bit
Counter (U3), a Programmable Read Only Memory (U2) and an a to 1 Line Multiplex (U1). The
Dual Timer or maﬁer clock contains two sections which control the operation of the ID unit by
didating when and at what rate pulses will be fed to the Upconverter oscillator. The ﬁrst section
of the timer is a gated astable oscillator or bit clock which produces square-wave pulses at a rate
of approximately 20Hz. The bit rate is controlled by U4 resistors R11. R12 and capacitor CZ. The
2—9
2.1r
second section of U4 is a 20 minute timer controlled by resistors R9, R10 and capacitor Ct. When
01 charges to 6356 of its capacity (after 20 minutes), pin 9 of U4 will go low, reverse biasing
transistor Q3 which presents a high (4Vdc) at pin 4. This high gates on the bit generator which
feeds the 20Hz pulses to pin 1 ofthe Dual 4 Bit Counter (U3).
As each clock pulse reaches pin 1 of U3, the 4 Bit Counter "counts" the number of pulses entering
the chip and displays that count in binary code at its own pins 3, 4 and 5. For example, as the ﬁrst
pulse is fed to U3, pin 3 goes high representing the decimal number 1 in binary code (001). With
the second clock pulse, U3 pin 4 goes high and pin 3 goes low representing the binary number 2
(010). This counting process will continue up to the number 7 (111) and, as the eighth pulse is fed
to the counter, pins 3, 4, and 5 will all go low (000) to begin the sequence over again. During this
time integrated circuit U2, the Programmable Read Only Memory (PROM), has a series of high and
low voltages present at its pins 1 through 9 (excluding pin 8 which is ground). These voltages are
bits which make up the ﬁrst word (Morse code letters or numbers) of the transmitters call sign.
(The transmitters call sign Is programmed Into the PROM by the EMCEE test department.) in
order for this information to be delivered to the Upconverter oscillator, it must be convened from
parallel form to serial form by the 8 Line to 1 Line Multiplexer(U1). The binary numbers developed
by the Dual 4 Bit Counter are fed to pins 9, 10, and 11 of the 8 to 1 Line Multiplexer. Each binary
number (or voltage ﬂuctuation) presented to U1 signals the multiplexer circuit to individually read
(take) the parallel bits presented by the PROM and deliver them serially to the oscillator via
transistor 04. Therefore. as the Dual 4 Bit Counter (U3) feeds the binary numbers 1 (001) to pins
9, 10 and 11 of the Line Multiplexer (bit address), the Multiplexer reads the bit at pin 1 of the
PROM (U2) and delivers it to the base of transistor 04. With each subsequent binary number
(010, 011, 100, 101, 110, 111, 000) provided by the Dual Counter, the Line Multiplexer will read
each individual PROM bit present at U2 pins 2 through 9 (exclude pin 8) until the Dual Counter
reaches 111. The next pulse then resets the count to O (000) The transition from high to low (1
to 0) at pin 5 of the counter is seen by pin 13, causing pin 11 of U3 to go high. This binary
numbert (0001) seen by pins 10, 11, 12 and 13 (word address) of U2 causes the PROM to present
the second set (word) of eight bits to the Line Multiplexer. The Dual Counter (U3 — pins 3, 4, 5)
presents another binary eight count to the Line Multiplexer (U1 — pins 9, 10. 11) which individually
reads the eight new PROM bits (UZ - pins 1 through 9) and delivers them to transistor Qt At the
end of the second eight count, pin 13 of U3 again sees a high to lowtransition which causes pin 10
of U3 to go high while pin 11 goes low (binary number2 = 0010). With U2 pins 10 through 13
receiving a binary number 2, a third word is presented to the Line Multiplexer by the PROM. This
entire process occurs so that the PROM delivers 16, eight bit words to the Upconverter oscillator
via the Line Multiplexer. Atter word 16, pins 8 through 10 of U3, which were all high (binary
number 16 = 1111), drop to zero. The negative going transition at pin 8 of U3 is coupled to
transistor 01 via CS. This action remand biases transistor 02 which discharges capacitor 01. As
the voltage at pin 12 of the Dual Timer drops, pin 9 goes high causing pin 4 of U4 to go low. ”ﬁle
Dual Timers bit clock is gated off, disabling the Digital Code Identiﬁcation Unit for20 minutes until
capacitor C1 recharges.
— — — — — UPCONVERTER SECTION — — —
Crystal Oscillator:
Vectron co-zs4o57 * A162
See paragraph 2.1d for description.
2—1 0
2.1s
2.1t
2.1u
2.1v
2.1w
X2 Multiplier and X4 Multiplier:
Schematic 8280»351Rev E (Ch.2-6) * AtAﬂ (X2 Multiplier)
Schematic C331—24IRev D (Ch.7-13) t A1A6 (X4 Multiplier)
See paragraph 2.115 for description.
10MHz Reference Oscillator:
Schematic Diagram 10368037lRev B * A6A2
See paragraph 2.19 for description.
VHF Synthesizer:
Schematic Diagram 30362003/Rev D t ABA1 (Band III)
Schematic Diagram 30362427/Rev o v: A6A1 (Band I)
See paragraph 2.1 h for description.
Mixer:
Schematic A331 -1 89/Rev A i- A1A7
Conversion Loss (J1-J3) 13dE Max.
LO Input (J2) +7dBm Nom
IF Input (J1) —10dBm Max.
The Upconverter Mb(er is a double-balanced circuit whlch combines an inverted composite
television signal item the output of the IF Sectlon and an unmodulated CW signal (LO) from the
multiplier or synthesizer These two signals are heterodyned in the mixer where the sum and
difference frequencies are developed and coupled to the RF output. The difference frequency is
selected by the VHF Bandpass Filter (A1 FL2) and Is then ampliﬁed by the Upconverter Ampliﬁer
(MAS). To insure the mixer operates in its most linear region, a MS attenuator has been placed
at the IF input of the circuit.
VHF Bandpass Filter:
schematic A280-92/Rev t (Ch.2-S) 1: A1 FL2
Schemaﬁc A280-89/Rev 1 (Ch.7-13) t A1 FL2
See paragraph 2.1!) for descriptlon.
2—1 1
2.1x
2.2
2.251
Upconverter Ampliﬁer:
Schematic 20331117/Rev A a» A1A5
g Q Q M
Gain +9dB +BdB +7dB +20dB Min.
Collector V +5Vdc +5th: +5th:
Collector I 25mA 35mA 50mA
The Upconverter Ampliﬁer contains three broadband monolithic ampliﬁers (Q1. 02, 03) capable
of delivering a total of more than 20dB gain at both VHF and UHF frequencies. Resistors R4, R5
and R6 are used to properly bias each device with capacitors C1 through C4 acting as signal
coupling components. The pi attenuator (R1, R2, R3) conﬁgured at the ampliﬁers input provides
isolation and impedance matching with the adjoining bandpass ﬁlter. The incoming UHF signal is
ampliﬁed to the proper level (=0dBm) necessary to drive the Power Ampliﬁer drawer.
Power Ampliﬁer Drawer:
Interconnection Diagram 3033133OIRev 51 1 A2
The Power Ampliﬁer drawer contains one VHF Ampliﬁer module: Ttre 1W Ampliﬁer (A1). Also
contained in the drawer is a Directional Coupler/Detector (001). a Power Metering DC Ampliﬁer
Board (P01), a Final Ampliﬁer Control Board (PCZ) and two power supplies — one supplying
t15V/s5Vdc (PS1) and the other +28vdc (P52). The main purpose of the ampliﬁer drawer is to
amplify the incoming VHF signal from the Upconverter drawerto the required 1 watt output level.
At the same time this output is sampled and fed to meter circuitry which provides forward and
reﬂected power output indications
1W VHF Low Band Ampliﬁer:
Schematic 20331081/Rev 56 (Ch.2-6) t A2A1
g L
Gain 3163 31 dB Mill.
Collector] 400mA
Collector V 27.3Vdc
The 1W VHF Low Band Ampliﬁer consists of a single transistor stage Q2 capable of delivering
31dB minimum gain. The transistor is designed using strip lines and inductors (L1, L2, L3) to
match the Input and output impedance of the device. Variable capacitors 04, co and co are used
to tune the reactance of each strip line so that the transistors input and output impedanoes are
optimized for broadband operation. Capacitors 02. CS, C7, and 03 further enhance the matching
of the ampliﬁer. Inductors L4 and L5, located in the base and collector circuits of the transistor
serve as both RF choke and ampliﬁer load respectively. To operate 02 in its most linear mode.
2—1 2
2.2b
2.2c
comm! circuit Q1 maintains the collector current of 02 at a speciﬁc operating level. The setting
of R3 dictates the amount or current delivered to the collector at 024 Capacitors C1 and C10 are
coupling components All other capacitors not mentioned are used for bypassing.
1W VHF High Band Amplifier:
Schematic B331-12/Rev 54 (Ch.7-13) t A2A1
m 2 M
Gain 16dB 16GB 3165 Min.
Collector I 400mA 400mA
Colledor V 27.3Vdc 27.3Vdc
The 1 W VHF High Band Ampliﬁer consists of two RF power transistorstages (Q1, 02) capable of
delivering a total of «MB minimum gain. The transistor stages are identical In design, using strip
lines (L3, L5, L11, L13) and various components 0.1, ca, 04, L2, 05, ca, L7, 09, C10, L8, C11,
etc.) to match the input and output impedance of each device. Variable capacitors 02 and 014
are used to tune the transistor input for a ﬂat frequency response. Resistors R1 , R2 and R3 form
a we attenuator for further matching and ampliﬁer stability. Inductors L4 and L12 function as RF
chokes whlle Inductors L6, L18, L14 and L15 act as RF loads. Signal coupling is provided by
capacitors C1, C12, C13, and 024. In orderto operate the RF powertransistors in their most linear
mode, bias control circuits have been provided for each stage. These control circuits (Q3. 04) are
constant current regulators maintaining the collarmr current of each powertransistor (03. 04) at
a speciﬁc operating level. Potentiometers R11 and R16 dictate the amount of current to be
delivered to ampliﬁers Qt and 02.
VHF Output Filter:
Schematic A280-58/Rev1B (Ch‘Z-G) e A2FL1
Schematic AZBD-GQIRev 1B (Ch.7-13) it A2FL1
Insertion Loss (J1-JZ) 0.5dB
Notch Depth (Jt-JZ) 10dB
2nd Harmonic Rejection (J1-Jz) 20dB
The VHF Output Filter is a four-section notch and low»pass circuit combination. The two sections
which comprise the notch ﬁlter (L1 102, LAIC7) are adjustable circuits resonated to absorb the upper
and lower4.5MHz products contained in the transmitted VHF channel. The low-pass portion of the
ﬁlter, made up or capacitors ca. 04 and 06 (plus co and C10 for low band) and inductors L2, L3.
is tuned to attenuate the second harmonic of the VHF channel.
2—13
2. 2d
2.2e
Directional Coupler/Detector:
Schematic 3199-89/Rev C (Ch.2~6) t A2DC1
Schematic BiQS-HD/Rev B (Ch.7-13) e AZDCi
insertion Loss (J1-JZ) 0.5dB Max.
The two port Directional Coupler/Detector is used to sample and detect the forward and reﬂected
RF signals found at the output of the translator. A small portion of the forward power led to it from
the VHF 1 Watt Ampliﬁer is absorbed from the couplers "through line" and detected by diode CR1A
The remaining RF component is eliminated by capacitors C1 and 02 with resistor R3 providing “is
correct time constant (or peak detection The resulting positive dc voltage, which is proportional
to the translators peak output power, is then fed to pin 6 of the Power Metering DC Amplifier
AZPCt. The Directional Coupler/Detector‘s reﬂected coupling line turnishes a fraction of any
standing-wave power which might be present at the output of the translator. The reflected power
sample is detected by diode CR2 and ﬁltered by capacitor C3. This resistor-capacitor combination
delivers a positive dc voltage. proportional to the translators average reflected output power, to
pin 10 of the Power Metering DC Ampliﬁer A2PCi. Resistors R1, R2, R4 and R5 provide 50 ohm
input and output ten'nlnatlons for the forward and reverse coupling lines adjacent to the couplers
“through line." Due to the light coupling employed, the module's insertion loss is less than 0.5dB.
Power Metering DC Amplifier:
Schematic B331-184/Rev D t A2PC1
The Power Metenng DC Ampliﬁer is used to operate the translators Front Panel ”is POWER meter.
The positive do voltages developed by the Directional Coupler/Detector, proportional to the peak
and renamed power outputs of the translator. are ted to pins 3 (PEAK PWR no N) and 10 (REFL
PWR Dc IN) of the plug-in Po hoard. Operational Ampliﬁers UtA and U15 act as noninverting
buffers, isolating the Directional Coupler’s peak detector circuit from the % POWER meter.
capacitor 02 charges to a positive dc voltage proportional to the peak power output of the
translatorr When monitoring forward peak power, the current provided by WA and B to drive the
Front Panel % POWER meter is controlled try potentiometer R8. This resistor is set so that with
meter switch A281 set to the PEAK PWR position the “A: POWER meter registers 10051, when the
translator is producing its rated output power. Resistor R5 is a current limiter placed in series with
the output of U1 B to protect both the op amp and the meter if potentiometer R8 is inadvertently set
to minimum resistance. Resistor R6 and the Upconverter front panel OUTPUT AGC ADJUST
A1 R3 also form a voltage divider at the output of U1 B. OUTPUT AGC potentiometer A1R3 Is
adjusted to provide a reference voltage, proportional to the translators peak output power. iorthe
Output AGC circuit located on the Limiter/Output AGC Board (A1PC1). (The purpose of this
voltage is explained in the TRANSLATOR portion of this manual.)
In order to calibrate the Front Panel meter for reﬂected power monitoring, the reﬂected power dc
voltage developed by the Directional Coupler/Detector is placed across resistor R9 of the Power
Metering oc Ampliﬁer. A portion of this dc voltage is picked off and sent to the Front Panel
56 POWER meiervie the two-position meterswitch (A281). Potentiometer R8 is calibrated so that
an open output circuit of the Final Ampliﬁerwill registera 10056 meter indication with switch A281
placed in the REFL PWR position
2—14
2.2f
2.2h
Final Ampliﬁer Control:
Schematic 10331074IRev B * A2PC2
The Final Amplifier Control supplies +28V to the 1W VHF Arnpllﬂer module (A2A1) when an input
signal is detected by the translator. AGC voltage is developed and applled to the Auto-on board
where A1 PCZK1 energizes (see circuit descnption 2.1 m). This In tum provides a ground path from
pin 12 to 11 in the Final Ampliﬁer Control which energizes K1 closing contacts 6 to 7, 12 to 13, and
15 to 16. Closure of contacts 15 to 16 supplies +28V to the 1WAmpliﬂer via pin 8 and the Final
On LED (ASDS1) via pin 5.
1:1 5VI+5V Power Supply:
Schematic 8326—12/Rev D t A2PS1
Voltage Rated Current
+15V 1A
>15V 1A
+5V 1A
—5V 1A
120Vac is placed across the primary of transformer T1 which is provided voltage transient
protection by surge suppressor E1 . Transformeth supplies a secondary voltage to bridge rectiﬁer
CR1. The output of CR1 Is divided, with the negative voltage applied to —15V regulator U2 and
the positive potential fed to +15V regulator U1. Voltage regulators U3 and U4 tap off of the 15V
lines to provide a +5V and 45V respectively. The capacitors provide ﬁltering for the different
regulators.
+28V Power Supply:
Schematic NIA t AZPSZ
Voltage Rated Current
28V 6A
Field repair NOT recommended.
2—1 5
VHF SYNTHESIZER PROGRAMMING CHART (NTSC!
5525-5915
60-66 6125-6515
66-72 6725-7175
76-82 7725-8175
82-88 8325-8775
174-180 17525-17915
180-186 18125—18515
186-192 18725-19115
192-198 19325-19715
198-204 19925-20375
204—21 0 20525-20975
210-216 21125-21515
wmqom&wm
...~_...
M-nc
[1
mbbhhbhm-hAhm
om0>oomuuooamm
_.
TABLE 2-1
UHF SYNTHESIZER PROGRAMMING CHART NTSC
wmxlmmU'n—nmumﬂm
AmUmwmmAmomo>w~1wm
oooooowwmmmmmmw>>>>)>>>
)m~1mu
TABLE 2—2
Page 1 at 3
UHF SYNTHESIZER PROGRAMMING CHART (NTSC)
_.
umuwmc‘n
wmqmmo'nA
mm'n-nmmrnmmrnmmoccooucoooo
TABLE 2—2
Page 2 of 3
UHF SYNTHESIZER PROGRAMMING CHART (NTSC)
TABLE 2—2
Page 3 of 3
UHF SYNTHESIZER PRQGRAMMING CHART (PAL)
ooucooooonmmmmmmm>>>>>>m
mmmamamammmmmmmmmmmmmmmm
mmmamocﬂhwﬂ0>mu~uommoaa
For PAL operaiion the grounds to Pins 21 and 23 of U1 046145152) must be removem
TABLE 24
Page 1 of 2
UHF SYNTHESIZER PROGRAMMING CHART PAL
—‘T10)~lu1MOUUJ
mommmmmmmmmmmmmmmmrnmmmmm
For PAL operation the grounds to Pins 21 and 23 of U1 (MC145152) must be removed.
TABLE 2—3
Page 2 of 2
3.1
3.2
3.3
34
3.5
SECTION III
MAINTENANCE
Periodic Maintenance Schedule ......................................... 3-1
Troubleshooting ....................................................... 3-1
3.23 Front Panel Indications
3.2b Recommended Test Eq p
3.2c Troubleshooting Procedure , . . . , . . . , . . . . . . t .. ......................... 3—2
Alignment .................................. 4 3—3
3.33 Local 0 star . 3—3
3.3b RF Ampliﬁer Chain . . . . 3—6
3.31: AGCILImIter Calibration ......... . . 3—9
3.3d Precorrector Adjustment (OPTIONAL) .................................. 3—10
Output Power Calibration ............................................. 3—10
3.43 Forward Power . . . . . 3—10
3.4b Reﬂected Power ................................................... 3—11
Spare Modules and Components Lists ................................... 3-1
3.1
3.2
3.23
mam
Periodic Maintenance Chart:
ALIGNMENT RESPONSE
OUTPUT POWER CALIBRATION
FANS
ENVIRONMENT
AMBIENTTEMPERATURE
Troubleshooting:
Front Panel Indications:
POWER ONIOFF
28VI41 5V/f15V/4-5V
36 POWER FWDIREFLD
OPERATE/ALIGN
POWER ADJUST
RECEIVE LO
Upon installation and at one year lntenrals
thereafter (see section 33).
SAME As ABOVE (see section 3.4),
Check for blockage.
No lubrication nemary.
Check for proper vent space.
Keep moisture. dust and dirt to a minimum.
—30°Cto +50°C; however, coolertemperature
equals longer life.
Controls the ac line voltage that Is ted to all power
supplles in the Power Amplifier drawer.
Provides convenient test pointson the PowerAmpliﬁer
drawer that can be used to measure the voltages from
the power supplies wilhout having to open the unit.
Provldes a peak forward or average reﬂected power
indication from the lranslator‘s output.
Controls the IF AGC loop placing it In the OPERATE
(closed loop) or ALlGN (open loop) mode.
Controls the output power of the translator.
Provides a sample of the Downconverter‘s LO signal
which Is used to mix the input channel to IF,
3—1
3.2b
3.2c
CARRIER PRESENT Indicates that the translator is receiving an adequate
Input signal which is necessary to developlhe IF AGC
voltage.
FINAL ON Indicates that supply voltage has been applied to the
1W VHF Ampliﬁer in the Power Ampliﬁer drawer.
TRANSMIT L0 Provides a sample of the Upconverter‘s LO signal
which mixes the IF to the output channel
OUTPUT AGC ON/OFF Opens or closes the secondary or output AGC loopt
Recommended Test Equipment:
murmsm ~ , ,; MANUFACTURER < ”mooe‘w
Digital Multimeter HEWLETT PACKARD E2378A
Oscilloscope TEKTRONIX 2232
Sweep Generator WAVETEK 2001
RF Detector TELONIC BERKELEY 8553
“MB Attenuator NARDA 766-10
ZDdB Attenuator NARDA 766-20
Power Meter HEWLETT PACKARD 4353
Frequency Counter HEWLETT PACKARD 5386A
Spectmm Analyzer HEWLETT PACKARD 8594E
NTSC Video Generator TEKTRONIX TSG1OD
Troubleshooting Procedure:
If the translators output signal appears distorted, noisy or nonexistent, check the unit's front panel
indications. The monitoring of both Forward and Reﬂected power Is possible with the front panel
”it: POWER meter while Power Supply voltages can be measured at test points located on the
Power Ampliﬁer front panel. The carrier Present LED indicates an input signal is present when
illuminated, and the Final ON LED is illuminated when supply voltage Is applied to the 1W
amplifier Both must be activated for the translator to operate. The front panel Indications may
point to a problem area and should not be oveﬂooked.
Since the 5, 15 and 28 volt power supplies contain short circuit protection, an unusually low supply
voltage reading may indicate a short in any circuit using that supply. The short circuit can be
isolated by Individually removing the plugs from the modules in each drawer.
3—2
3.3
3.3a
NOTE: After removing a short circuit from the output of eitherthe 1:15 or +5 volt supply, wait
5 minutes before checking the supply voltage so that the associated to regulator cools
sufﬁciently. The voltage regulators within the t15V/25V Power supplies feature
thermal shutdown protection and must cool before retuming to their normal operating
voltages.
A problem area can also be determined by dividing the system into subsystems or sections, each
of these smaller semions having a separate function. This unit is divided into two separate
drawers, the translator and the Power Ampliﬁer, while the translator drawer is subdivided Into the
Downconverter Section, the IF Section and the Upconverier Section. Using the Signal Flow Chart
(Figure 3—1), in conjunction with a sweep and madter generator, will aid in pinpointing the problem
to a speciﬁc module. This procedure assumes the cabling, connectors, power supplies and front
panel indications are correct.
Alignment:
The primary purpose of this section is to aid the operator in troubleshooting and maintaining the
performance (frequency response, gain, etc.) of the translator. If the operator determines that a
malfunction or misalignment has occurred within the translator, then completion of the following
procedure should prove effective in locating the problem. Alignment should not be performed
unless the recommended test equipment (section 3.2b) is available.
NOTE: Before applying ac power to the vanslator, insure that a proper 50 ohm RF load (ZOdE
attenuator) is attached to the RF Out connector (A2J2) located on the rear panel of tt'ie
Power Ampliﬁer.
Local Oscillator Chain:
If translator operation requires precision offset, the Upconverter or Downoonverter synthesizer has
been replaced by an oscillator-multiplier combination. This procedure applies to either the
Upconverter or Downconverter oscillator-multiplier section. Before proceeding with the following
steps, first determine if L.O. chain alignment is necessary. Apply ac power to the uansiator by
placing the POWER circuit breaker (051, front panel of Power Amplifier drawer) to ON. Check
the oscillator (A1G1/A1GZ) output (Point A, Figure 3-3) fora minimum of 10mW and a measured
frequency within 20Hz of its correct frequency. (Oscillator frequency equals the input or output
channel visual frequency plus the IF visual frequency diw‘ded by 2 for a low band channel, 4 for
a high band channel or 16 fora UHF channel.)
NOTE: The Vectron precision oscillator is not ﬁeld repairable and should be retumed to
EMCEE if defective.
if the oscillator output is correct. check the multiplier (A1A3/A1AB) output for a minimum of tDmW.
A X2 multiplier is used for channels 2-6, a X4 multiplier is used for channels 7-13 and the X16
multiplier is used for channels 14-69. If the multiplier output power and frequency are correct,
proceed to section 3.3b, RF Ampliﬁer Chain alignment.
1. Set up the test equipment as shown in Figure 3—3 and place the translator ac POWER
switch (M031) to the ON position for 5+ (28Vdc) to be applied to the oscillator (G1 or 62).
3-3
10.
11.
Wait approximately ﬁfteen (15) minutes for the oscillator to heat or until the frequency
stabilizes.
If, after the warm-up period. the measured frequency differs from the oscillator frequency
entered on the Test Data Sheet (refer to last page of this manual) by more than ZOHz,
proceed to step #4. If the measured frequency is within 20Hz of the frequency marked on
the Test Data sheet, then remove the counter from the oscillator output, reconned the
cable leading to the multiplier module and proceed to step 116.
Remove the frequency adjust access cover screw and, with a tuning tool orsmall
screwdriver. slowly rotate the slotted adjustment for the proper oscillator frequency.
Disconnect the frequency counter from the output of the oscillator and connect the power
meter. The oscillator output power should be no less than 1DmW.
Remove the power meter from the output of the oscillator and reconnectthe oscillator to the
input of the multiplier (A3 or A6).
Check the output power of the multiplier. if there is less than 10mW, remove the retaining
screws and lift the module off the drawer ﬂoor.
Connect the output of the multlplierto a spectrum analyzer (Point B. Figure 3-3) and tune
the analyzer to the second, fourth. or sixteenth harmonic of the oscillator. (LO. frequency
equals the sum of the input or output channel visual mrrier frequency and the IF visual
carrier frequency.)
Carefully "touch up" the capacitors accessible through the bottom cover of the module for
maximum power (10mW min/30mW max) at the proper harmonic of the oscillator
frequency. If power is low or nonexistent, proceed to step #10, #11 or #12. Otherwise,
proceed to step #13.
X2 Multiplier tCh.2-6
a. Remove the module's bottom cover and tune capacitors C7, 012, C13, C14. 015,
C16, C17 and inductors L7, L8 for a minimum of 10mW at the oscillators second
han'nonlc (see Schematic 5280-35). Insure that the fundamental and other harmonlcs
are down at least —20dB.
b. If the multiplier output power is low or nonexistent. troubleshoot the circuit and repeat
the tuning procedure.
X4 Multi Iier Chi-13
8. Remove the bottom cover of the module and disconnect thejumper wlre attached to
termlnal post D on the multIleer PC board (see Schematic 0331-24).
b. Solder an open ended so ohm coaxial cable to terminal posts D (center conductor)
and K (shield) and connect e spectrum analyzer to the cable's opposite end.
0. Tune the spectmm analyzer to the second hemmnlc of the oscillators output
frequency and adjust capacitors c7, 012 through C17 and Inductors L6, L7 and L8 for
maxlmum power (25 to 50mW) at the second hamtonlc of the oscillator frequency.
Insure that the other harmonies are at least was below the second by tuning
3—4
12.
capacitors C14 and C18 nearminimum coupling (least capacitance) withoutsacriﬁcing
power.
Remove the coaxial cable from terminal posts D and K. Resolder the jumper wire
which connects terminal posts D and E.
Disconnect the jumper wire attached to terminal post M on the multiplier PC board
(see Schematlc 6331-24).
Solder the open ended coax cable to terminal post M (center conductor) and N
(shield). Connect a spectrum analyzer to the cable's opposite end.
Tune the test equipment to the frequency of the oscillators fourth harmonic and adjust
capacitors 019, 622 and C23 for maximum power (75 to 100mW) at that fmquency.
lnsure that all other hannoniw are at least ZOdB lower.
Remove the coaxial cable from terminal post M and ground. Resolderthejumper wire
to terminal post M.
Attach the spectrum analyzerto the output connector (JZ) of the X4 Multiplier module
(8, Figure 3—3).
Tune the test equipment to the frequency of the oscillators fourth harmonic and adjust
capacitors 026, 027 and 029 for maximum power (10 to 30mW) at the same
frequency. Insure that all other harmonics are at least ZOdB down.
NOTE: If the output power of any section of the X4 Multiplier Is low or nonexistent,
k.
troubleshoot the circuit responsible and repeat the alignment procedure,
Replace the bottom cover and slightly readjust all of the multipliers variable capacitors
for the speciﬁcations stated above.
X16 Mumﬂier (0114—69!
a.
Remove the bottom cover from the module and dlsconnect the leads of capacitor
Pc1c1 and inductor PC2L2 which connect to capacitor P0202 (see schematic
30367226).
Solder an open ended coax cable to the input side of npacltor PC202. Insure that
the coax center conductor is connected to the RF line and the shield is at ground.
Canned the cable to a spectrum analyzer and tune capacltors PC1 06/07/011101 31
015 and PctctB for 100 to 200mw at the osclllator‘s fourth harmonic.
Remove the coaxial cable from the clrcuit and reconnect the leads of rum and
inductor PCZL1 to each side of PCZCZ.
Connect the spectmm analyzer to the output connector of the module (A3J2) and tune
capacitors PC201/02163/C4 for maximum power at the 16th hamtonio of the
oscillator. Only if necessary, carefull expand or compress the tours of Inductor
Pcht for the proper output and retune the adjolnlng capacitors. Insure that the other
harmonics are ZOdB down.
3.3b
13.
NOTE: If the output power of either multiplier section is low or nonexistent, trouble-
shoot the circuit responsible.
f. Replace the bottom cover and slightly readjust all of the variable capacitors for the
correct speciﬁcations
Reconnect the output or the multiplier to the L0 input (L) of the associated mixer module.
RF Ampliﬁer Chain:
14.
15.
16.
17.
16.
19.
— — — DOWNCONVERTER SECTION — — —
Set the translator drawer CPR/ALIGN switch to the ALIGN position and remove the drawer
cover.
Set up the test equipment as shown In Figure 3—4 with the 10dB attenuator and RF detector
connected to the output of the bandpass ﬁlter (FL1 - point B, Figure 3-2).
Adjust the sweep and marker generator for an oscilloscope display width of 10MHz at the
Input frequency of the translator. To prevent overdriving any ampliﬁers, setthe oscilloscope
for maximum sensitivity and the sweeper for minimum output.
a. For VHF Input: Adjust capacitors C1 through C5 of the VHF Bandpass Filter (FL1) to
obtain a response similartn thatshown in Figure 3—5A. There should be less than ZdB
of insertion loss.
b. For UHF input: Through the rear of the translator drawer tune capacitors Ct and CZ
of the UHF Filter (FL1) for a frequency response as that shown in Figure 3—5A. only
if absolutely necessary, adjust the Variable Coupling Banter and inductors L1 and L4
for the correct response (see Schematic A284-o) with less than 2dB of insertion loss.
Remove the attenuator and RF detector from the output of the Bandpass Filter (FL1) and
connect them to the output c of the DownoonverterIPreampliﬁer module (A1). Reconnect
the ﬁlter to the Input of the DownoonverterIPreampiiﬁer.
Check the output of the Downconverter/Preampllﬁerfor a minimum oonverslon gain of Goa
(t1dB) end a frequency response as shown in Figure 3-5A. correct any slight frequency
response variations (tilt) with the VHF or UHF Bandpass Filter as explained in step #17
above. If there are any major frequency response or gain problems, sweep and trouble-
shoot the ampliﬁer by itself. The module frequency response can be found in Figure 3—55.
———IF SECTION———
Remove the detedor and attenuatorfrom the output of the DownconverterIPreampIiﬁer and
connect them to the output of the IF SAW Filter/Ampliﬁer (A2) (Point D, Figure 3-2).
Reconnect the output of the DownoonverterrPreampliﬂerto the input of the IF SAW Filter!
Ampliﬁer.
21.
23.
24.
25.
27.
28.
Check for a frequency response as shown in Figure 3-50 and a minimum gain of Zde. If
there is a major discrepancy In frequency response or gain. sweep and troubleshoot the
circuit by itself.
Disconnect the attenuator and detector from the output of the IF SAW FIIter/Ampliﬁer and
connect them to the outpm of the IF AGC Ampliﬁer (E, Figure 3-2). Reconnect the output
of the lF SAW Filler/Ampliﬁer to the input of the IF AGC Ampliﬁer.
With the front panel OPERATE/ALIGN switch in the ALIGN position, adjust the IF AGO
Amplifier TILT control (R31) to obtain a ﬂat frequency response as shown in Figure 3—50.
The TILT pot is accessible through the top of the ampliﬁer module. Check for a module
gain of approximately 25113. This gain is dependent on the align voltage provided to the
module‘s AGC circuit.
Remove the cable from the IF AGO Ampliﬁer output and connect it to the Preoorrector
(optional) out jack (F. Figure 3-2). Reconnect the output of the IF AGC Ampliﬁer to the IF
input (I) of the Mixer. The oscilloscope display should resemble Figure 3-50. If necessary,
adjust TILT potentiometer (R10) tor a ﬂat response and check for the proper gain (=—2dB).
— - — DOWNCONVERTER SECTION — — —
Remove the cable from the Precon'edor out jack and connect It to the Mixer RF (R) output
(G, Figure 3-2). Reconnect the Precon'ector output to the Power Adjust. The oscilloscope
display should resemble Figure 3—50.
Vary the Power Adjust potentiometer on the translator drawer front panel to insure proper
operation. Remember, this adjustment presents loss to the signal.
Remove the attenuator and detector from the Mixer (A7) and connect the Mixer RF port (R)
to the VHF Bandpass Filter (FL2).
Connect the test equipment to the output of the bandpass ﬁlter (H. Figure 3—2), and check
for a frequency response resembling Figure 3—50. If necessary. slightly tune ﬁlter
capacitors C1 through 05 for minimum less (-2dB) and the corned response. (Since the
response presented Is actually that of the SAW Filter, it may be necessary to sweep the
VHF Bandpass Filter [FL2] by itself at its proper operating frequency. It should have a
response similar to that of Figure 3-5A.)
Connect the attenuatorand detectorto the output of the translatordrawer (I, Figure 3-2) and
reconnect the bandpass ﬁllerto the input of the UpconverterAmleﬁer. The ampliﬁershould
provide the same frequency response as Figure 3—50 (Figure 3-5A lf sweeping ﬁlter FL2
alone with the Upoonverter Ampliﬁer) and at least 20dB of gain. If the response is tilted,
slight adjustment of the VHF Bandpass Filter (FL2) may be necessary due to termination
differences between the test equipment and the Upoonverter Amplifier.
3—7
30.
31.
32.
33.
34.
35.
Fri
l.
— — —- POWER AMPLIFIER DRAWER — — —
Shut off the circuit breaker (031) on the front panel ofthe PowerAmpliﬁerdrawer. Replace
the RF cable connecting the translator drawerOUTput (A1J2) to the Power Ampliﬁerdrawer
RF INput (A211).
Remove the top cover from the center portion of the Power Ampliﬁer drawer and attach the
detector and attenuator to the output of the 1 Watt VHF Ampliﬁer (J, Figure 3-2). Reapply
power with CB1 ON. This ampliﬁer should provide a flat response (Figure 3-50) and at
least 31dB of gain.
If there is a problem with frequency response or gain. remove the module iron-r the drawer
bottom and take off the ampliﬁer cover. For channels 2 to B tune capacitors C4, CG and 09
of the 1 Watt VHF Low Band Ampliﬁer (see Schematic 20331081) for the proper
parameters. For channels 7 to 13. tune capacitors CZ and 014 of the 1 Watt VHF High
Band Amplifier (see Schematic 3331-12) for the proper response. if proper gain or
frequency response cannot be obtained, troubleshoot the circuit and retune.
Place the POWER switch (C81) back to the OFF position and remove the test equipment
fmm the output of the 1 Watt VHF Amplifier (A1).
Connect the test equipment to the output of Power Ampliﬁer drawer (M, Figure 3—2) and
reconnect the output of the 1 Watt VHF Ampliﬁer to the input of the VHF Output Filter(FL1).
Reapply ac powervia (381 and check for approﬁmately 1dB of loss through the VHF Output
Filter (FL1) and Directional Coupler (DC1). Insure that capacitors ca, C4 and CG of the
VHF Output Filter (FL1) are adjusted for minimum loss am a ﬂat frequency response (see
Schematic A280-68 for Ch.2—6 or Azau-aa for Ch.7—13)t
Capacitors oz and 07 mounted on top of the VHF Output Filter control the frequency
of each 4.5MHz notch used to attenuate the out-of-band spurs of the transmitted
channel. Because of the highly selective response of the IF SAW Filter/Ampliﬁer
(A1A2), these notches cannot be seen when viewing the overall sweep response of the
translator, Therefore, in order to check the position of each notch, the VHF Output
Filter must be swept by itself.
Remove the sweep generator output from the translator drawer leut (A1J1 or A.
Figure 3-2) and connect It to the input of the VHF Output Filter (K, Figure 3—2).
Tune the sweep generator to the translators output channel using a 15 to ZOMHz sweep
width on the oscilloscope.
Check the oscilloscope display for a notch 4.5MHz above the aural frequency and 4.5MHz
below the visual frequency of the output channel (see Figure 3-5D). If the notches are not
in their comect position, carefully adjust VHF Output Filter capacitors 02 and C7 (see
Schematic A280-68 or 69).
if a spectrum analyzer is available. disconned the sweep equipment and connect the
spectrum analyzer to the output of the translator‘ Vinth the translator receiving the
correct input signal and operating at Its rated output power, tune the analyzerto each
4.5MHz product and carefully null Its power with the appropriate tuning capacitor
(oz/C7).
39. Disconnect all test equlpment from the translator and replace all interconnection cables
between modules.
3.3c AGO/LimiterCalibration:
1. Connect a power meter or spectrum analyzer to the output of the IF AGC Amplifier
(A1AR1J2).
2. connect a continuous wave generator (CW mode of sweep generator) or IF modulator to
the input at the IF AGC Ampliﬁer (A1AR1J1). Adjust the generator to deliver the visual
carrier frequency (45.75MHz) at —38dBm peak power. Place the translator drawer front
panel OPERATE/ALIGN switch (A1 S1) to OPERATE and the OUTPUT AGC switch (A282)
to OFF.
3. Turn AGC REFerence potentiometerRe fully CWandtum LIMITER ADJUST potentiometer
R13 fully CCW. Potentiometers R8 and R13 are located on the Limiter/Output AGC board
P01 (see Schematic B331—34).
4. Adjust lF AGO Ampliﬁer potentiometer R15 (GAIN) for a ¢2dBm output (see Schematic
0331-37). The GAIN control is accessible through the top of the IF AGC Ampliﬁer module.
5. CenterAGc REFerenee potentlometer RS on the Limiter/Output AGC board and recalibrate
the Input generator so that it now delivers a odsm peak visual signal to the ampliﬁer
module. Slowly adjust IF AGC Ampliﬁer inductor L3 or the visual tank circuit so that a
minimum power indication is seen on the external power meter or spectrum analyzer.
NOTE: If the IF AGC Ampliﬁer tank circuit (L3, 014) tuned to the IF visual can’ier becomes
seveme detuned and the output power of the module cannot be nulled, remove the
module from the bottom of the drawer. Attach a high impedance voltmeter to the
cathode of diode CRB (pin 5 of U1B, Schematic 0331-37) and slowly tune tank
capacitor C14 for a maximum negative voltage. As the voltage becomes more
negative. the output power of the ampliﬁer wlIl drop.
6. Adjust the AGC REFerenoe potentiometer R8 on the Limiter/Output AGC board fora
+6dEm output from the IF AGC Ampliﬁer (ARt).
7. Slowly adjust leiterReference potentiometer R13 CW untll the +6dBm output level begins
to ﬂuctuate, I.e.. as the limiter beglns to activate.
8. Readjust AGC REF potentiometer R8 to bring the IF AGO Ampliﬁer output level from
+6dBm down to +2dBm.
9. Short capacitor CZ on the Limiter/Output AGC board. Relay K1 on the Limiter/Output AGO
board will deenerglze causing the AGC voltage to be replaced by the PRE AGC Reference
Voltage set by potentiometer R25.
10. Adjust potentiometer R25 for a +3dBm output level. This PRE AGC REFerenoe ADJust ls
located on the Limiter/Output AGC board.
11. Remove the short from across CZ.
3-9
3.3d
3.4
3.4a
12. Disconnect the power meter or spectrum analyzer from the IF AGC Ampliﬁer output and
reconnect the module's input and output cables.
Precorrector Adjustment: (OPTIONAL)
Adjustment of the Precorrector ls limited to two controls and should not be realigned unless
absoluter necessag. To adjust the Preconector a speotnrm analyzer for measurement of sync
and intermodulatlon Is needed. If this equipment is not available and a situation occurs wan'anting
Preoon'eotion readjustment, a linear diode detector and oscilloscope may be used to inspect and
adjust sync amplitude. Also. the Precorrector ON/OFF swltch can be placed to the OFF position
as a temporary defeat in case the circuit causes adverse distortion due to misalignment or
malfunction. The ON/OFF Stilton is lunher utilized to compare the effects of preoorrection against
a normally ampliﬁed translator output signal. However, changing the position of this switch will
slightly alter (ti dB) the output power of the translator unless the OUTPUT AGC switch (A182) is
ON. It is assumed that the translators overall frequency rosponse is correct, allowing the unit to
operate with maximum efﬁciency. Set up the test equipment and perform the following steps.
1. To the output of the translatorconnectthe test equipment available for monitoring intermed-
ulation distortion and sync amplitude. Insure that the translator is operating at Its rated
output.
2. While viewing the test equipment display, vary the two potentiometers (R6, R8), accessible
through the holes In the top of the module, to correct for 100% sync amplitude. With the
horizontal sync corrected, the intermodulation distortion will be well below the — 54415 level.
3. Reoheck and, if necessary, correct the translators output power with the POWER ADJUST
or OUTPUT AGC ADJUST.
Output Power Calibration:
To insure correct transmission parameters the output power level and % POWER meter calibration
of the TV1 E V/U Translator should be checked at least once every six months. Wrth the
% POWER switch in the FWD position, the % POWER meter has been fadery calibrated for 10096
with the translator providing 1 watt peak visual and 0.1 watt average aural power. The following
calibration procedure assumes that the composite VHF signal emanating from the translator has
a visual/aural can'ier power ratio of 10:1 with the visual carrler conslaing of 87.5% video
modulation and 0% average picture level (APL).
In the following steps. the power levels stated are those expected at the output of the TV1E V/U.
Therefore, when measuring these power levels via an external power melerand a 20dB attenuator
(see Flgure 3-6). be sure to take Into account the attenuation factor provided by this attenuator.
Power levels at 50% APL are Included in brackets following the power levels at 016 APL.
Forward Power:
1. Place the POWER circuit breaker to OFF and set up the test equipment as shown In
Figure 3-6 wiﬂr the extemal power meter connected to the 20115 attenuator. Provide the
3—10
3.4b
m:
translator with the correct Input signal (— 70 to —30dBm peak visual power) from eitherthe
originatlng station, from an ran-channel (VHF/UHF output) television modulator, or by mixing
a modulators IF centers up to the correct Input frequencies
Using an off-the-air signal from the primary or originating station will result In some
calibration inaccuracy when monitoring the translators output with an average power
meter. As the picture content (brightness) of the input signal varies, the average
output power of the translator will also change causing ﬂuctuations in the readings of
the external power meter. The customer must, therefore, estimate a 50% (gray) or 0%
(black) average picture level when calibrating for 1 watt peak vlsual power.
Place the POWER circuit breaker to ON, the OPERATE/ALIGN switch to OPERATE. the
OUTPUT AGC Mitch to OFF. and the % POWER switch to FWD.
Vlﬁth the POWER ADJUST control, set the output power of the TV1E VIU so that the
extemal power meter registers 695W [.44W]. (1W peak visual with 0% APL and 87.596
video modulation is equal to 595W [.34W at 5056 APL] average visual while 1096 aural
power is equal to 100mW average aural.) It is assumed that the received visual carrier
consists of 87.596 video modulation with a visual/aural can-ier power ratio of 10:1. A
spectrum analyzer can be used to check the visual/aural carrier ratio. If the aural carrier
can be turned oft, the average power should drop to .595W [AM-W].
With the extemal power meter reading 595W [44W], check the % POWER meter for a
10096 indication. It the reading is Incorrect. adjust potentiometer RS on the Power Metering
DC Ampliﬁer board (A2PC1) tor a 10056 indication (see schematic Diagram 8331—184).
This board is located in the Power Ampliﬁer drawer.
Place the OUTPUT AGC switch to ON and check the % POWER meter for 810096
Indication. lithe reading is incorrect, set the OUTPUT AGC ADJUST control for a 10096
indicatlon.
Reﬂected Power:
6,
Vlﬁth the extemal power meterstill reading .695W L44W], place the POWER circuit breaker
to OFF. Remove and reverse the cables connected to the input (J1) and output (JZ) ports
of the Directional Coupler/Detector (AZDC1). In other words, connect input cable to output
port and canned output cable to input port. The reﬂected power circuit of the Directional
Coupler/Detectorwlll now monitor the translators {onward power, simulating an open circuit
(total retumed power) at the translators outputt
Place the POWER circuit breakerto ON. With the visual carrier consisting of 87.556 video
modulation and 096 APL, place the % POWER witch to REFLD and check for a 100%
(70% for 50% APL) indication on the 36 POWER meter. If this reading is not obtained.
adjust potentiometer R9 on the Power Metering DC Ampliﬁer for a 10096 indication (see
Schematic Diagram 5331-184).
Place the POWER circuit breaker to OFF.
a. Remove the cables connected to the Input and output ports of the Diredionai Coupler!
Detector and connect them to their original positions.
3-11
b. Reinstall the top cover to each drawer. Slide each drawer back into the cabinet and
secure them pmperty.
c. Disconnect the test equipment from the translator.
d. Reconnect the transmitting antenna's associated cable to the RF OUT connector (J2)
of the TV1E VIU Power Ampliﬁer drawer.
e. li applicable, reconnect the receiving antenna‘s associated cable to the RF lN
connector (J1) of the TV1E VIU Translator drawer.
Place the POWER circuit breaker to ON to place the TV1 E VIU in an on-the-air condltlon.
For constant monitoring of the translators output power, place the % POWER switch to
FWD.
3—12

Source Exif Data:

File Type                       : PDF
File Type Extension             : pdf
MIME Type                       : application/pdf
PDF Version                     : 1.3
Linearized                      : Yes
Create Date                     : 2001:05:31 09:11:12
Producer                        : Acrobat Distiller 4.0 for Windows
Author                          : VicodinES /CB /TNN
Title                           : 57799.pdf
Modify Date                     : 2001:05:31 09:11:47-04:00
Page Count                      : 46

EXIF Metadata provided by EXIF.tools

EMCEE Broadcast TV1E Translator User Manual 57799

EMCEE Broadcast Products Translator 57799

8

FCC ID Filing: BMTTV1E

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